diff --git a/.github/ISSUE_TEMPLATE/Feature-request.yml b/.github/ISSUE_TEMPLATE/Feature-request.yml
index d50524433da..0788288036c 100644
--- a/.github/ISSUE_TEMPLATE/Feature-request.yml
+++ b/.github/ISSUE_TEMPLATE/Feature-request.yml
@@ -52,3 +52,11 @@ body:
       label: Additional context
       description: Please add any other context or screenshots about the feature request here.
       placeholder: ex. This would work only when ...
+  - type: checkboxes
+    id: confirmation
+    attributes:
+      label: I have checked existing list of Feature requests and the Contribution Guide
+      description: You agree to check all the resources above before opening a new Feature request.
+      options:
+        - label: I confirm I have checked existing list of Feature requests and Contribution Guide.
+          required: true
diff --git a/.github/ISSUE_TEMPLATE/Issue-report.yml b/.github/ISSUE_TEMPLATE/Issue-report.yml
index f355f26628a..ad68d2cba32 100644
--- a/.github/ISSUE_TEMPLATE/Issue-report.yml
+++ b/.github/ISSUE_TEMPLATE/Issue-report.yml
@@ -39,7 +39,9 @@ body:
       label: Version
       description: What version of Arduino ESP32 are you running? If possible, consider updating to the latest version.
       options:
-        - latest master
+        - latest master (checkout manually)
+        - latest development Release Candidate (RC-X)
+        - v2.0.2
         - v2.0.1
         - v2.0.0
         - v1.0.6
@@ -51,7 +53,7 @@ body:
     attributes:
      label: IDE Name
      description: What IDE are you using?
-     placeholder: eg. Arduino IDE, PlatformIO, IDF component...
+     placeholder: eg. Arduino IDE, PlatformIO, Sloeber...
     validations:
      required: true
   - type: input
@@ -100,8 +102,8 @@ body:
     id: sketch
     attributes:
       label: Sketch
-      description: Please provide your sketch/code which was run
-      placeholder: ex. related part of the code
+      description: Please provide full minimal sketch/code which can be run to reproduce your issue
+      placeholder: ex. Related part of the code to replicate the issue
       render: cpp
     validations:
      required: true
diff --git a/.github/PULL_REQUEST_TEMPLATE.md b/.github/PULL_REQUEST_TEMPLATE.md
index 737f55dcc61..d68a0cea8a2 100644
--- a/.github/PULL_REQUEST_TEMPLATE.md
+++ b/.github/PULL_REQUEST_TEMPLATE.md
@@ -1,18 +1,23 @@
-*By completing this PR sufficiently, you help us to improve the quality of Release Notes*
+*By completing this PR sufficiently, you help us to review this Pull Request quicker and also help improve the quality of Release Notes*
 
 ### Checklist
-1. [ ] Please provide specific title of the PR describing the change, including the component name (eg. *„Update of Documentation link on Readme.md“*)
-2. [ ] Please provide related links (eg. Issue, other Project, submodule PR..)
-3. [ ] Please check [Contributing guide](https://docs.espressif.com/projects/arduino-esp32/en/latest/contributing.html)
+1. [ ] Please provide specific title of the PR describing the change, including the component name (*eg. „Update of Documentation link on Readme.md“*)
+2. [ ] Please provide related links (*eg. Issue which will be closed by this Pull Request*)
+3. [ ] Please **update relevant Documentation** if applicable
+4. [ ] Please check [Contributing guide](https://docs.espressif.com/projects/arduino-esp32/en/latest/contributing.html)
 
 *This entire section above can be deleted if all items are checked.*
 
 -----------
-## Summary
-Please describe your proposed PR and what it contains.
+## Description of Change
+Please describe your proposed Pull Request and it's impact.
 
-## Impact
-Please describe impact of your PR and it's function.
+## Tests scenarios
+Please describe on what Hardware and Software combinations you have tested this Pull Request and how.
+
+(*eg. I have tested my Pull Request on Arduino-esp32 core v2.0.2 with ESP32 and ESP32-S2 Board with this scenario*)
 
 ## Related links
 Please provide links to related issue, PRs etc.
+
+(*eg. Closes #number of issue*)
diff --git a/.github/scripts/install-arduino-core-esp32.sh b/.github/scripts/install-arduino-core-esp32.sh
index 374d0401547..8584da5b6e2 100755
--- a/.github/scripts/install-arduino-core-esp32.sh
+++ b/.github/scripts/install-arduino-core-esp32.sh
@@ -2,35 +2,35 @@
 
 export ARDUINO_ESP32_PATH="$ARDUINO_USR_PATH/hardware/espressif/esp32"
 if [ ! -d "$ARDUINO_ESP32_PATH" ]; then
-	echo "Installing ESP32 Arduino Core ..."
-	script_init_path="$PWD"
-	mkdir -p "$ARDUINO_USR_PATH/hardware/espressif"
-	cd "$ARDUINO_USR_PATH/hardware/espressif"
+    echo "Installing ESP32 Arduino Core ..."
+    script_init_path="$PWD"
+    mkdir -p "$ARDUINO_USR_PATH/hardware/espressif"
+    cd "$ARDUINO_USR_PATH/hardware/espressif"
 
-	echo "Installing Python Serial ..."
-	pip install pyserial > /dev/null
+    echo "Installing Python Serial ..."
+    pip install pyserial > /dev/null
 
-	if [ "$OS_IS_WINDOWS" == "1" ]; then
-		echo "Installing Python Requests ..."
-		pip install requests > /dev/null
-	fi
+    if [ "$OS_IS_WINDOWS" == "1" ]; then
+        echo "Installing Python Requests ..."
+        pip install requests > /dev/null
+    fi
 
-	if [ "$GITHUB_REPOSITORY" == "espressif/arduino-esp32" ];  then
-		echo "Linking Core..."
-		ln -s $GITHUB_WORKSPACE esp32
-	else
-		echo "Cloning Core Repository..."
-		git clone https://github.com/espressif/arduino-esp32.git esp32 > /dev/null 2>&1
-	fi
+    if [ ! -z "$GITHUB_REPOSITORY" ];  then
+        echo "Linking Core..."
+        ln -s $GITHUB_WORKSPACE esp32
+    else
+        echo "Cloning Core Repository..."
+        git clone https://github.com/espressif/arduino-esp32.git esp32 > /dev/null 2>&1
+    fi
 
-	#echo "Updating Submodules ..."
-	cd esp32
-	#git submodule update --init --recursive > /dev/null 2>&1
+    #echo "Updating Submodules ..."
+    cd esp32
+    #git submodule update --init --recursive > /dev/null 2>&1
 
-	echo "Installing Platform Tools ..."
-	cd tools && python get.py
-	cd $script_init_path
+    echo "Installing Platform Tools ..."
+    cd tools && python get.py
+    cd $script_init_path
 
-	echo "ESP32 Arduino has been installed in '$ARDUINO_ESP32_PATH'"
-	echo ""
+    echo "ESP32 Arduino has been installed in '$ARDUINO_ESP32_PATH'"
+    echo ""
 fi
diff --git a/.github/scripts/install-arduino-ide.sh b/.github/scripts/install-arduino-ide.sh
index 902c95b9e95..0f36120b3a9 100755
--- a/.github/scripts/install-arduino-ide.sh
+++ b/.github/scripts/install-arduino-ide.sh
@@ -6,46 +6,43 @@
 
 OSBITS=`arch`
 if [[ "$OSTYPE" == "linux"* ]]; then
-	export OS_IS_LINUX="1"
-	ARCHIVE_FORMAT="tar.xz"
-	if [[ "$OSBITS" == "i686" ]]; then
-		OS_NAME="linux32"
-	elif [[ "$OSBITS" == "x86_64" ]]; then
-		OS_NAME="linux64"
-	elif [[ "$OSBITS" == "armv7l" || "$OSBITS" == "aarch64" ]]; then
-		OS_NAME="linuxarm"
-	else
-		OS_NAME="$OSTYPE-$OSBITS"
-		echo "Unknown OS '$OS_NAME'"
-		exit 1
-	fi
+    export OS_IS_LINUX="1"
+    ARCHIVE_FORMAT="tar.xz"
+    if [[ "$OSBITS" == "i686" ]]; then
+        OS_NAME="linux32"
+    elif [[ "$OSBITS" == "x86_64" ]]; then
+        OS_NAME="linux64"
+    elif [[ "$OSBITS" == "armv7l" || "$OSBITS" == "aarch64" ]]; then
+        OS_NAME="linuxarm"
+    else
+        OS_NAME="$OSTYPE-$OSBITS"
+        echo "Unknown OS '$OS_NAME'"
+        exit 1
+    fi
 elif [[ "$OSTYPE" == "darwin"* ]]; then
-	export OS_IS_MACOS="1"
-	ARCHIVE_FORMAT="zip"
-	OS_NAME="macosx"
+    export OS_IS_MACOS="1"
+    ARCHIVE_FORMAT="zip"
+    OS_NAME="macosx"
 elif [[ "$OSTYPE" == "cygwin" ]] || [[ "$OSTYPE" == "msys" ]] || [[ "$OSTYPE" == "win32" ]]; then
-	export OS_IS_WINDOWS="1"
-	ARCHIVE_FORMAT="zip"
-	OS_NAME="windows"
+    export OS_IS_WINDOWS="1"
+    ARCHIVE_FORMAT="zip"
+    OS_NAME="windows"
 else
-	OS_NAME="$OSTYPE-$OSBITS"
-	echo "Unknown OS '$OS_NAME'"
-	exit 1
+    OS_NAME="$OSTYPE-$OSBITS"
+    echo "Unknown OS '$OS_NAME'"
+    exit 1
 fi
 export OS_NAME
 
-ARDUINO_BUILD_DIR="$HOME/.arduino/build.tmp"
-ARDUINO_CACHE_DIR="$HOME/.arduino/cache.tmp"
-
 if [ "$OS_IS_MACOS" == "1" ]; then
-	export ARDUINO_IDE_PATH="/Applications/Arduino.app/Contents/Java"
-	export ARDUINO_USR_PATH="$HOME/Documents/Arduino"
+    export ARDUINO_IDE_PATH="/Applications/Arduino.app/Contents/Java"
+    export ARDUINO_USR_PATH="$HOME/Documents/Arduino"
 elif [ "$OS_IS_WINDOWS" == "1" ]; then
-	export ARDUINO_IDE_PATH="$HOME/arduino_ide"
-	export ARDUINO_USR_PATH="$HOME/Documents/Arduino"
+    export ARDUINO_IDE_PATH="$HOME/arduino_ide"
+    export ARDUINO_USR_PATH="$HOME/Documents/Arduino"
 else
-	export ARDUINO_IDE_PATH="$HOME/arduino_ide"
-	export ARDUINO_USR_PATH="$HOME/Arduino"
+    export ARDUINO_IDE_PATH="$HOME/arduino_ide"
+    export ARDUINO_USR_PATH="$HOME/Arduino"
 fi
 
 # Updated as of Nov 3rd 2020
@@ -55,184 +52,29 @@ ARDUINO_IDE_URL="https://github.com/espressif/arduino-esp32/releases/download/1.
 #ARDUINO_IDE_URL="https://www.arduino.cc/download.php?f=/arduino-nightly-"
 
 if [ ! -d "$ARDUINO_IDE_PATH" ]; then
-	echo "Installing Arduino IDE on $OS_NAME ..."
-	echo "Downloading '$ARDUINO_IDE_URL$OS_NAME.$ARCHIVE_FORMAT' to 'arduino.$ARCHIVE_FORMAT' ..."
-	if [ "$OS_IS_LINUX" == "1" ]; then
-		wget -O "arduino.$ARCHIVE_FORMAT" "$ARDUINO_IDE_URL$OS_NAME.$ARCHIVE_FORMAT" > /dev/null 2>&1
-		echo "Extracting 'arduino.$ARCHIVE_FORMAT' ..."
-		tar xf "arduino.$ARCHIVE_FORMAT" > /dev/null
-		mv arduino-nightly "$ARDUINO_IDE_PATH"
-	else
-		curl -o "arduino.$ARCHIVE_FORMAT" -L "$ARDUINO_IDE_URL$OS_NAME.$ARCHIVE_FORMAT" > /dev/null 2>&1
-		echo "Extracting 'arduino.$ARCHIVE_FORMAT' ..."
-		unzip "arduino.$ARCHIVE_FORMAT" > /dev/null
-		if [ "$OS_IS_MACOS" == "1" ]; then
-			mv "Arduino.app" "/Applications/Arduino.app"
-		else
-			mv arduino-nightly "$ARDUINO_IDE_PATH"
-		fi
-	fi
-	rm -rf "arduino.$ARCHIVE_FORMAT"
-
-	mkdir -p "$ARDUINO_USR_PATH/libraries"
-	mkdir -p "$ARDUINO_USR_PATH/hardware"
-
-	echo "Arduino IDE Installed in '$ARDUINO_IDE_PATH'"
-	echo ""
-fi
-
-function build_sketch(){ # build_sketch <fqbn> <path-to-ino> [extra-options]
-    if [ "$#" -lt 2 ]; then
-		echo "ERROR: Illegal number of parameters"
-		echo "USAGE: build_sketch <fqbn> <path-to-ino> [extra-options]"
-		return 1
-	fi
-
-	local fqbn="$1"
-	local sketch="$2"
-	local xtra_opts="$3"
-	local win_opts=""
-	if [ "$OS_IS_WINDOWS" == "1" ]; then
-		local ctags_version=`ls "$ARDUINO_IDE_PATH/tools-builder/ctags/"`
-		local preprocessor_version=`ls "$ARDUINO_IDE_PATH/tools-builder/arduino-preprocessor/"`
-		win_opts="-prefs=runtime.tools.ctags.path=$ARDUINO_IDE_PATH/tools-builder/ctags/$ctags_version -prefs=runtime.tools.arduino-preprocessor.path=$ARDUINO_IDE_PATH/tools-builder/arduino-preprocessor/$preprocessor_version"
-	fi
-
-	#echo ""
-	#echo "Compiling '"$(basename "$sketch")"' ..."
-	mkdir -p "$ARDUINO_BUILD_DIR"
-	mkdir -p "$ARDUINO_CACHE_DIR"
-	$ARDUINO_IDE_PATH/arduino-builder -compile -logger=human -core-api-version=10810 \
-		-fqbn=$fqbn \
-		-warnings="all" \
-		-tools "$ARDUINO_IDE_PATH/tools-builder" \
-		-tools "$ARDUINO_IDE_PATH/tools" \
-		-built-in-libraries "$ARDUINO_IDE_PATH/libraries" \
-		-hardware "$ARDUINO_IDE_PATH/hardware" \
-		-hardware "$ARDUINO_USR_PATH/hardware" \
-		-libraries "$ARDUINO_USR_PATH/libraries" \
-		-build-cache "$ARDUINO_CACHE_DIR" \
-		-build-path "$ARDUINO_BUILD_DIR" \
-		$win_opts $xtra_opts "$sketch"
-}
-
-function count_sketches() # count_sketches <examples-path> <target-mcu>
-{
-	local examples="$1"
-	local target="$2"
-    rm -rf sketches.txt
-	if [ ! -d "$examples" ]; then
-		touch sketches.txt
-		return 0
-	fi
-    local sketches=$(find $examples -name *.ino)
-    local sketchnum=0
-    for sketch in $sketches; do
-        local sketchdir=$(dirname $sketch)
-        local sketchdirname=$(basename $sketchdir)
-        local sketchname=$(basename $sketch)
-        if [[ "$sketchdirname.ino" != "$sketchname" ]]; then
-            continue
-        elif [[ -f "$sketchdir/.skip.$target" ]]; then
-            continue
+    echo "Installing Arduino IDE on $OS_NAME ..."
+    echo "Downloading '$ARDUINO_IDE_URL$OS_NAME.$ARCHIVE_FORMAT' to 'arduino.$ARCHIVE_FORMAT' ..."
+    if [ "$OS_IS_LINUX" == "1" ]; then
+        wget -O "arduino.$ARCHIVE_FORMAT" "$ARDUINO_IDE_URL$OS_NAME.$ARCHIVE_FORMAT" > /dev/null 2>&1
+        echo "Extracting 'arduino.$ARCHIVE_FORMAT' ..."
+        tar xf "arduino.$ARCHIVE_FORMAT" > /dev/null
+        mv arduino-nightly "$ARDUINO_IDE_PATH"
+    else
+        curl -o "arduino.$ARCHIVE_FORMAT" -L "$ARDUINO_IDE_URL$OS_NAME.$ARCHIVE_FORMAT" > /dev/null 2>&1
+        echo "Extracting 'arduino.$ARCHIVE_FORMAT' ..."
+        unzip "arduino.$ARCHIVE_FORMAT" > /dev/null
+        if [ "$OS_IS_MACOS" == "1" ]; then
+            mv "Arduino.app" "/Applications/Arduino.app"
         else
-        	echo $sketch >> sketches.txt
-        	sketchnum=$(($sketchnum + 1))
+            mv arduino-nightly "$ARDUINO_IDE_PATH"
         fi
-    done
-    return $sketchnum
-}
-
-function build_sketches() # build_sketches <fqbn> <target-mcu> <examples-path> <chunk> <total-chunks> [extra-options]
-{
-    local fqbn=$1
-	local target="$2"
-    local examples=$3
-    local chunk_idex=$4
-    local chunks_num=$5
-    local xtra_opts=$6
-
-    if [ "$#" -lt 3 ]; then
-		echo "ERROR: Illegal number of parameters"
-		echo "USAGE: build_sketches <fqbn> <target-mcu <examples-path> [<chunk> <total-chunks>] [extra-options]"
-		return 1
-	fi
-
-    if [ "$#" -lt 5 ]; then
-		chunk_idex="0"
-		chunks_num="1"
-		xtra_opts=$4
-	fi
-
-	if [ "$chunks_num" -le 0 ]; then
-		echo "ERROR: Chunks count must be positive number"
-		return 1
-	fi
-	if [ "$chunk_idex" -ge "$chunks_num" ] && [ "$chunks_num" -ge 2 ]; then
-		echo "ERROR: Chunk index must be less than chunks count"
-		return 1
-	fi
-
-	set +e
-    count_sketches "$examples" "$target"
-    local sketchcount=$?
-	set -e
-    local sketches=$(cat sketches.txt)
-    rm -rf sketches.txt
-
-    local chunk_size=$(( $sketchcount / $chunks_num ))
-    local all_chunks=$(( $chunks_num * $chunk_size ))
-    if [ "$all_chunks" -lt "$sketchcount" ]; then
-    	chunk_size=$(( $chunk_size + 1 ))
     fi
+    rm -rf "arduino.$ARCHIVE_FORMAT"
 
-    local start_index=0
-    local end_index=0
-    if [ "$chunk_idex" -ge "$chunks_num" ]; then
-    	start_index=$chunk_idex
-    	end_index=$sketchcount
-    else
-	    start_index=$(( $chunk_idex * $chunk_size ))
-	    if [ "$sketchcount" -le "$start_index" ]; then
-	    	echo "Skipping job"
-	    	return 0
-	    fi
+    mkdir -p "$ARDUINO_USR_PATH/libraries"
+    mkdir -p "$ARDUINO_USR_PATH/hardware"
 
-	    end_index=$(( $(( $chunk_idex + 1 )) * $chunk_size ))
-	    if [ "$end_index" -gt "$sketchcount" ]; then
-	    	end_index=$sketchcount
-	    fi
-	fi
-
-    local start_num=$(( $start_index + 1 ))
-    echo "Found $sketchcount Sketches for target '$target'";
-    echo "Chunk Index : $chunk_idex"
-    echo "Chunk Count : $chunks_num"
-    echo "Chunk Size  : $chunk_size"
-    echo "Start Sketch: $start_num"
-    echo "End Sketch  : $end_index"
+    echo "Arduino IDE Installed in '$ARDUINO_IDE_PATH'"
+    echo ""
+fi
 
-    local sketchnum=0
-    for sketch in $sketches; do
-        local sketchdir=$(dirname $sketch)
-        local sketchdirname=$(basename $sketchdir)
-        local sketchname=$(basename $sketch)
-        if [ "${sketchdirname}.ino" != "$sketchname" ] \
-        || [ -f "$sketchdir/.skip.$target" ]; then
-            continue
-        fi
-        sketchnum=$(($sketchnum + 1))
-        if [ "$sketchnum" -le "$start_index" ] \
-        || [ "$sketchnum" -gt "$end_index" ]; then
-        	continue
-        fi
-        echo ""
-        echo "Building Sketch Index $(($sketchnum - 1)) - $sketchdirname"
-        build_sketch "$fqbn" "$sketch" "$xtra_opts"
-        local result=$?
-        if [ $result -ne 0 ]; then
-            return $result
-        fi
-    done
-    return 0
-}
diff --git a/.github/scripts/install-platformio-esp32.sh b/.github/scripts/install-platformio-esp32.sh
index 71e3251bff2..71c1a55b297 100755
--- a/.github/scripts/install-platformio-esp32.sh
+++ b/.github/scripts/install-platformio-esp32.sh
@@ -1,11 +1,9 @@
 #!/bin/bash
 
 export PLATFORMIO_ESP32_PATH="$HOME/.platformio/packages/framework-arduinoespressif32"
-PLATFORMIO_ESP32_URL="https://github.com/platformio/platform-espressif32.git#feature/arduino-idf-master"
+PLATFORMIO_ESP32_URL="https://github.com/platformio/platform-espressif32.git"
 
-XTENSA32_TOOLCHAIN_VERSION="8.4.0+2021r1"
-XTENSA32S2_TOOLCHAIN_VERSION="8.4.0+2021r1"
-RISCV_TOOLCHAIN_VERSION="8.4.0+2021r1"
+TOOLCHAIN_VERSION="8.4.0+2021r2-patch3"
 ESPTOOLPY_VERSION="~1.30100.0"
 ESPRESSIF_ORGANIZATION_NAME="espressif"
 
@@ -30,9 +28,12 @@ replace_script+="data['packages']['toolchain-xtensa-esp32']['owner']='$ESPRESSIF
 replace_script+="data['packages']['toolchain-xtensa-esp32s2']['owner']='$ESPRESSIF_ORGANIZATION_NAME';"
 replace_script+="data['packages']['toolchain-riscv32-esp']['owner']='$ESPRESSIF_ORGANIZATION_NAME';"
 # Update versions to use the upstream
-replace_script+="data['packages']['toolchain-xtensa-esp32']['version']='$XTENSA32_TOOLCHAIN_VERSION';"
-replace_script+="data['packages']['toolchain-xtensa-esp32s2']['version']='$XTENSA32S2_TOOLCHAIN_VERSION';"
-replace_script+="data['packages']['toolchain-riscv32-esp']['version']='$RISCV_TOOLCHAIN_VERSION';"
+replace_script+="data['packages']['toolchain-xtensa-esp32']['version']='$TOOLCHAIN_VERSION';"
+replace_script+="data['packages']['toolchain-xtensa-esp32s2']['version']='$TOOLCHAIN_VERSION';"
+replace_script+="data['packages']['toolchain-riscv32-esp']['version']='$TOOLCHAIN_VERSION';"
+# Add ESP32-S3 Toolchain
+replace_script+="data['packages'].update({'toolchain-xtensa-esp32s3':{'type':'toolchain','optional':True,'owner':'$ESPRESSIF_ORGANIZATION_NAME','version':'$TOOLCHAIN_VERSION'}});"
+replace_script+="data['packages']['toolchain-xtensa-esp32'].update({'optional':False});"
 # esptool.py may require an upstream version (for now platformio is the owner)
 replace_script+="data['packages']['tool-esptoolpy']['version']='$ESPTOOLPY_VERSION';"
 # Save results
@@ -40,11 +41,11 @@ replace_script+="fp.seek(0);fp.truncate();json.dump(data, fp, indent=2);fp.close
 python -c "$replace_script"
 
 if [ "$GITHUB_REPOSITORY" == "espressif/arduino-esp32" ];  then
-	echo "Linking Core..."
-	ln -s $GITHUB_WORKSPACE "$PLATFORMIO_ESP32_PATH"
+    echo "Linking Core..."
+    ln -s $GITHUB_WORKSPACE "$PLATFORMIO_ESP32_PATH"
 else
-	echo "Cloning Core Repository ..."
-	git clone --recursive https://github.com/espressif/arduino-esp32.git "$PLATFORMIO_ESP32_PATH" > /dev/null 2>&1
+    echo "Cloning Core Repository ..."
+    git clone --recursive https://github.com/espressif/arduino-esp32.git "$PLATFORMIO_ESP32_PATH" > /dev/null 2>&1
 fi
 
 echo "PlatformIO for ESP32 has been installed"
@@ -66,8 +67,7 @@ function build_pio_sketch(){ # build_pio_sketch <board> <options> <path-to-ino>
     python -m platformio ci --board "$board" "$sketch_dir" --project-option="$options"
 }
 
-function count_sketches() # count_sketches <examples-path>
-{
+function count_sketches(){ # count_sketches <examples-path>
     local examples="$1"
     rm -rf sketches.txt
     if [ ! -d "$examples" ]; then
@@ -82,7 +82,7 @@ function count_sketches() # count_sketches <examples-path>
         local sketchname=$(basename $sketch)
         if [[ "${sketchdirname}.ino" != "$sketchname" ]]; then
             continue
-        fi;
+        fi
         if [[ -f "$sketchdir/.test.skip" ]]; then
             continue
         fi
@@ -92,8 +92,7 @@ function count_sketches() # count_sketches <examples-path>
     return $sketchnum
 }
 
-function build_pio_sketches() # build_pio_sketches <board> <options> <examples-path> <chunk> <total-chunks>
-{
+function build_pio_sketches(){ # build_pio_sketches <board> <options> <examples-path> <chunk> <total-chunks>
     if [ "$#" -lt 3 ]; then
         echo "ERROR: Illegal number of parameters"
         echo "USAGE: build_pio_sketches <board> <options> <examples-path> [<chunk> <total-chunks>]"
diff --git a/.github/scripts/on-pages.sh b/.github/scripts/on-pages.sh
index 8b88209db2f..124518469d2 100755
--- a/.github/scripts/on-pages.sh
+++ b/.github/scripts/on-pages.sh
@@ -71,7 +71,7 @@ function git_safe_upload_to_pages(){
     local name=$(basename "$file")
     local size=`get_file_size "$file"`
     local upload_res=`git_upload_to_pages "$path" "$file"`
-    if [ $? -ne 0 ]; then 
+    if [ $? -ne 0 ]; then
         >&2 echo "ERROR: Failed to upload '$name' ($?)"
         return 1
     fi
diff --git a/.github/scripts/on-push.sh b/.github/scripts/on-push.sh
index aa30fe746d5..53dbb2250bb 100755
--- a/.github/scripts/on-push.sh
+++ b/.github/scripts/on-push.sh
@@ -2,92 +2,118 @@
 
 set -e
 
+export ARDUINO_BUILD_DIR="$HOME/.arduino/build.tmp"
+
+function build(){
+    local target=$1
+    local fqbn=$2
+    local chunk_index=$3
+    local chunks_cnt=$4
+    local sketches=$5
+
+    local BUILD_SKETCH="${SCRIPTS_DIR}/sketch_utils.sh build"
+    local BUILD_SKETCHES="${SCRIPTS_DIR}/sketch_utils.sh chunk_build"
+
+    local args="$ARDUINO_IDE_PATH $ARDUINO_USR_PATH"
+
+    args+=" \"$fqbn\""
+
+    if [ "$OS_IS_LINUX" == "1" ]; then
+        args+=" $target"
+        args+=" $ARDUINO_ESP32_PATH/libraries"
+        args+=" $chunk_index $chunks_cnt"
+        ${BUILD_SKETCHES} ${args}
+    else
+        if [ "$OS_IS_WINDOWS" == "1" ]; then
+            local ctags_version=`ls "$ARDUINO_IDE_PATH/tools-builder/ctags/"`
+            local preprocessor_version=`ls "$ARDUINO_IDE_PATH/tools-builder/arduino-preprocessor/"`
+            win_opts="-prefs=runtime.tools.ctags.path=$ARDUINO_IDE_PATH/tools-builder/ctags/$ctags_version
+            -prefs=runtime.tools.arduino-preprocessor.path=$ARDUINO_IDE_PATH/tools-builder/arduino-preprocessor/$preprocessor_version"
+            args+=" ${win_opts}"
+        fi
+
+        for sketch in ${sketches}; do
+            ${BUILD_SKETCH} ${args} ${sketch}
+        done
+    fi
+}
+
 if [ -z "$GITHUB_WORKSPACE" ]; then
-	export GITHUB_WORKSPACE="$PWD"
-	export GITHUB_REPOSITORY="espressif/arduino-esp32"
+    export GITHUB_WORKSPACE="$PWD"
+    export GITHUB_REPOSITORY="espressif/arduino-esp32"
 fi
 
 CHUNK_INDEX=$1
 CHUNKS_CNT=$2
 BUILD_PIO=0
 if [ "$#" -lt 2 ] || [ "$CHUNKS_CNT" -le 0 ]; then
-	CHUNK_INDEX=0
-	CHUNKS_CNT=1
+    CHUNK_INDEX=0
+    CHUNKS_CNT=1
 elif [ "$CHUNK_INDEX" -gt "$CHUNKS_CNT" ] &&  [ "$CHUNKS_CNT" -ge 2 ]; then
-	CHUNK_INDEX=$CHUNKS_CNT
+    CHUNK_INDEX=$CHUNKS_CNT
 elif [ "$CHUNK_INDEX" -eq "$CHUNKS_CNT" ]; then
-	BUILD_PIO=1
+    BUILD_PIO=1
 fi
 
 #echo "Updating submodules ..."
 #git -C "$GITHUB_WORKSPACE" submodule update --init --recursive > /dev/null 2>&1
 
+SCRIPTS_DIR="./.github/scripts"
 if [ "$BUILD_PIO" -eq 0 ]; then
-	# ArduinoIDE ESP32 Test
-    TARGET="esp32"
-	FQBN="espressif:esp32:esp32:PSRAM=enabled,PartitionScheme=huge_app"
-	source ./.github/scripts/install-arduino-ide.sh
-	source ./.github/scripts/install-arduino-core-esp32.sh
-	if [ "$OS_IS_WINDOWS" == "1" ]; then
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino" && \
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/BLE/examples/BLE_server/BLE_server.ino" && \
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/ESP32/examples/Camera/CameraWebServer/CameraWebServer.ino"
-	elif [ "$OS_IS_MACOS" == "1" ]; then
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/WiFi/examples/WiFiClient/WiFiClient.ino" && \
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino" && \
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/BluetoothSerial/examples/SerialToSerialBT/SerialToSerialBT.ino" && \
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/BLE/examples/BLE_server/BLE_server.ino" && \
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/ESP32/examples/Camera/CameraWebServer/CameraWebServer.ino"
-	else
-		# CMake Test
-		if [ "$CHUNK_INDEX" -eq 0 ]; then
-			bash "$ARDUINO_ESP32_PATH/.github/scripts/check-cmakelists.sh"
-		fi
-		build_sketches "$FQBN" "$TARGET" "$ARDUINO_ESP32_PATH/libraries" "$CHUNK_INDEX" "$CHUNKS_CNT"
-	fi
-
-	# ArduinoIDE ESP32S2 Test
-    TARGET="esp32s2"
-	FQBN="espressif:esp32:esp32s2:PSRAM=enabled,PartitionScheme=huge_app"
-	if [ "$OS_IS_WINDOWS" == "1" ]; then
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/WiFi/examples/WiFiClient/WiFiClient.ino" && \
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino"
-	elif [ "$OS_IS_MACOS" == "1" ]; then
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/WiFi/examples/WiFiClient/WiFiClient.ino" && \
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino"
-	else
-		build_sketches "$FQBN" "$TARGET" "$ARDUINO_ESP32_PATH/libraries" "$CHUNK_INDEX" "$CHUNKS_CNT"
-    fi
+    source ${SCRIPTS_DIR}/install-arduino-ide.sh
+    source ${SCRIPTS_DIR}/install-arduino-core-esp32.sh
 
-	# ArduinoIDE ESP32C3 Test
-    TARGET="esp32c3"
-	FQBN="espressif:esp32:esp32c3:PartitionScheme=huge_app"
-	if [ "$OS_IS_WINDOWS" == "1" ]; then
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/WiFi/examples/WiFiClient/WiFiClient.ino" && \
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino"
-	elif [ "$OS_IS_MACOS" == "1" ]; then
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/WiFi/examples/WiFiClient/WiFiClient.ino" && \
-		build_sketch "$FQBN" "$ARDUINO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino"
-	else
-		build_sketches "$FQBN" "$TARGET" "$ARDUINO_ESP32_PATH/libraries" "$CHUNK_INDEX" "$CHUNKS_CNT"
-    fi
+    FQBN_ESP32="espressif:esp32:esp32:PSRAM=enabled,PartitionScheme=huge_app"
+    FQBN_ESP32S2="espressif:esp32:esp32s2:PSRAM=enabled,PartitionScheme=huge_app"
+    FQBN_ESP32S3="espressif:esp32:esp32s3:PSRAM=opi,USBMode=default,PartitionScheme=huge_app"
+    FQBN_ESP32C3="espressif:esp32:esp32c3:PartitionScheme=huge_app"
+
+    SKETCHES_ESP32="\
+      $ARDUINO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino\
+      $ARDUINO_ESP32_PATH/libraries/BLE/examples/BLE_server/BLE_server.ino\
+      $ARDUINO_ESP32_PATH/libraries/ESP32/examples/Camera/CameraWebServer/CameraWebServer.ino\
+    "
+
+    SKETCHES_ESP32XX="\
+      $ARDUINO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino\
+      $ARDUINO_ESP32_PATH/libraries/WiFi/examples/WiFiClient/WiFiClient.ino\
+    "
+
+    build "esp32s3" $FQBN_ESP32S3 $CHUNK_INDEX $CHUNKS_CNT $SKETCHES_ESP32
+    build "esp32s2" $FQBN_ESP32S2 $CHUNK_INDEX $CHUNKS_CNT $SKETCHES_ESP32XX
+    build "esp32c3" $FQBN_ESP32C3 $CHUNK_INDEX $CHUNKS_CNT $SKETCHES_ESP32XX
+    build "esp32" $FQBN_ESP32 $CHUNK_INDEX $CHUNKS_CNT $SKETCHES_ESP32
 else
-	source ./.github/scripts/install-platformio-esp32.sh
-	# PlatformIO ESP32 Test
-	BOARD="esp32dev"
+    source ${SCRIPTS_DIR}/install-platformio-esp32.sh
+    # PlatformIO ESP32 Test
+    BOARD="esp32dev"
     OPTIONS="board_build.partitions = huge_app.csv"
-	build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/WiFi/examples/WiFiClient/WiFiClient.ino" && \
-	build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino" && \
-	build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/BluetoothSerial/examples/SerialToSerialBT/SerialToSerialBT.ino" && \
-	build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/BLE/examples/BLE_server/BLE_server.ino" && \
-	build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/ESP32/examples/Camera/CameraWebServer/CameraWebServer.ino"
-	
-	# PlatformIO ESP32 Test
+    build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/WiFi/examples/WiFiClient/WiFiClient.ino" && \
+    build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino" && \
+    build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/BluetoothSerial/examples/SerialToSerialBT/SerialToSerialBT.ino" && \
+    build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/BLE/examples/BLE_server/BLE_server.ino" && \
+    build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/ESP32/examples/Camera/CameraWebServer/CameraWebServer.ino"
+
+    # PlatformIO ESP32 Test
     # OPTIONS="board_build.mcu = esp32s2"
     # build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/WiFi/examples/WiFiClient/WiFiClient.ino" && \
     # build_pio_sketch "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino"
 
     python -m platformio ci --board "$BOARD" "$PLATFORMIO_ESP32_PATH/libraries/WiFi/examples/WiFiClient" --project-option="board_build.mcu = esp32s2" --project-option="board_build.partitions = huge_app.csv"
-    
-	#build_pio_sketches "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries"
+    python -m platformio ci --board "$BOARD" "$PLATFORMIO_ESP32_PATH/libraries/WiFi/examples/WiFiClient" --project-option="board_build.mcu = esp32c3" --project-option="board_build.partitions = huge_app.csv"
+
+    echo "Hacking in S3 support ..."
+    replace_script="import json; import os;"
+    replace_script+="fp=open(os.path.expanduser('~/.platformio/platforms/espressif32/platform.json'), 'r+');"
+    replace_script+="data=json.load(fp);"
+    replace_script+="data['packages']['toolchain-xtensa-esp32']['optional']=True;"
+    replace_script+="data['packages']['toolchain-xtensa-esp32s3']['optional']=False;"
+    replace_script+="data['packages']['tool-esptoolpy']['owner']='tasmota';"
+    replace_script+="data['packages']['tool-esptoolpy']['version']='https://github.com/tasmota/esptool/releases/download/v3.3/esptool-3.3.zip';"
+    replace_script+="fp.seek(0);fp.truncate();json.dump(data, fp, indent=2);fp.close()"
+    python -c "$replace_script"
+
+    python -m platformio ci --board "$BOARD" "$PLATFORMIO_ESP32_PATH/libraries/WiFi/examples/WiFiClient" --project-option="board_build.mcu = esp32s3" --project-option="board_build.partitions = huge_app.csv"
+
+    #build_pio_sketches "$BOARD" "$OPTIONS" "$PLATFORMIO_ESP32_PATH/libraries"
 fi
diff --git a/.github/scripts/on-release.sh b/.github/scripts/on-release.sh
index 9e1c51ff48d..7222baba128 100755
--- a/.github/scripts/on-release.sh
+++ b/.github/scripts/on-release.sh
@@ -33,7 +33,7 @@ PACKAGE_JSON_DEV="package_esp32_dev_index.json"
 PACKAGE_JSON_REL="package_esp32_index.json"
 
 echo "Event: $GITHUB_EVENT_NAME, Repo: $GITHUB_REPOSITORY, Path: $GITHUB_WORKSPACE, Ref: $GITHUB_REF"
-echo "Action: $action, Branch: $RELEASE_BRANCH, ID: $RELEASE_ID" 
+echo "Action: $action, Branch: $RELEASE_BRANCH, ID: $RELEASE_ID"
 echo "Tag: $RELEASE_TAG, Draft: $draft, Pre-Release: $RELEASE_PRE"
 
 function get_file_size(){
@@ -60,7 +60,7 @@ function git_safe_upload_asset(){
     local name=$(basename "$file")
     local size=`get_file_size "$file"`
     local upload_res=`git_upload_asset "$file"`
-    if [ $? -ne 0 ]; then 
+    if [ $? -ne 0 ]; then
         >&2 echo "ERROR: Failed to upload '$name' ($?)"
         return 1
     fi
@@ -112,7 +112,7 @@ function git_safe_upload_to_pages(){
     local name=$(basename "$file")
     local size=`get_file_size "$file"`
     local upload_res=`git_upload_to_pages "$path" "$file"`
-    if [ $? -ne 0 ]; then 
+    if [ $? -ne 0 ]; then
         >&2 echo "ERROR: Failed to upload '$name' ($?)"
         return 1
     fi
@@ -131,7 +131,7 @@ function merge_package_json(){
     local jsonOut=$2
     local old_json=$OUTPUT_DIR/oldJson.json
     local merged_json=$OUTPUT_DIR/mergedJson.json
-    
+
     echo "Downloading previous JSON $jsonLink ..."
     curl -L -o "$old_json" "https://github.com/$GITHUB_REPOSITORY/releases/download/$jsonLink?access_token=$GITHUB_TOKEN" 2>/dev/null
     if [ $? -ne 0 ]; then echo "ERROR: Download Failed! $?"; exit 1; fi
@@ -140,7 +140,7 @@ function merge_package_json(){
     set +e
     stdbuf -oL python "$PACKAGE_JSON_MERGE" "$jsonOut" "$old_json" > "$merged_json"
     set -e
-    
+
     set -v
     if [ ! -s $merged_json ]; then
         rm -f "$merged_json"
@@ -172,6 +172,7 @@ mkdir -p "$PKG_DIR/tools"
 # Copy all core files to the package folder
 echo "Copying files for packaging ..."
 cp -f  "$GITHUB_WORKSPACE/boards.txt"              "$PKG_DIR/"
+cp -f  "$GITHUB_WORKSPACE/package.json"            "$PKG_DIR/"
 cp -f  "$GITHUB_WORKSPACE/programmers.txt"         "$PKG_DIR/"
 cp -Rf "$GITHUB_WORKSPACE/cores"                   "$PKG_DIR/"
 cp -Rf "$GITHUB_WORKSPACE/libraries"               "$PKG_DIR/"
@@ -317,7 +318,7 @@ releaseNotes=""
 relNotesRaw=`git -C "$GITHUB_WORKSPACE" show -s --format=%b $RELEASE_TAG`
 readarray -t msgArray <<<"$relNotesRaw"
 arrLen=${#msgArray[@]}
-if [ $arrLen > 3 ] && [ "${msgArray[0]:0:3}" == "tag" ]; then 
+if [ $arrLen > 3 ] && [ "${msgArray[0]:0:3}" == "tag" ]; then
     ind=3
     while [ $ind -lt $arrLen ]; do
         if [ $ind -eq 3 ]; then
@@ -327,7 +328,7 @@ if [ $arrLen > 3 ] && [ "${msgArray[0]:0:3}" == "tag" ]; then
             oneLine="$(echo -e "${msgArray[ind]}" | sed -e 's/^[[:space:]]*//')"
             if [ ${#oneLine} -gt 0 ]; then
                 if [ "${oneLine:0:2}" == "* " ]; then oneLine=$(echo ${oneLine/\*/-}); fi
-                if [ "${oneLine:0:2}" != "- " ]; then releaseNotes+="- "; fi        
+                if [ "${oneLine:0:2}" != "- " ]; then releaseNotes+="- "; fi
                 releaseNotes+="$oneLine"
                 releaseNotes+=$'\r\n'
             fi
@@ -368,9 +369,9 @@ done
 rm -f $commitFile
 
 # Prepend the original release body
-if [ "${RELEASE_BODY: -1}" == $'\r' ]; then         
+if [ "${RELEASE_BODY: -1}" == $'\r' ]; then
     RELEASE_BODY="${RELEASE_BODY:0:-1}"
-else 
+else
     RELEASE_BODY="$RELEASE_BODY"
 fi
 RELEASE_BODY+=$'\r\n'
diff --git a/.github/scripts/sketch_utils.sh b/.github/scripts/sketch_utils.sh
new file mode 100755
index 00000000000..abe3db2b977
--- /dev/null
+++ b/.github/scripts/sketch_utils.sh
@@ -0,0 +1,192 @@
+#!/bin/bash
+
+function build_sketch(){ # build_sketch <ide_path> <user_path> <fqbn> <path-to-ino> [extra-options]
+    if [ "$#" -lt 4 ]; then
+        echo "ERROR: Illegal number of parameters"
+        echo "USAGE: ${0} build <ide_path> <user_path> <fqbn> <path-to-ino> [extra-options]"
+        return 1
+    fi
+
+    local ide_path=$1
+    local usr_path=$2
+    local fqbn=$3
+    local sketch=$4
+    local xtra_opts=$5
+    local win_opts=$6
+
+    ARDUINO_CACHE_DIR="$HOME/.arduino/cache.tmp"
+    if [ -z "$ARDUINO_BUILD_DIR" ]; then
+        build_dir="$(dirname $sketch)/build"
+    else
+        build_dir="$ARDUINO_BUILD_DIR"
+    fi
+
+    echo $sketch
+
+    rm -rf "$build_dir"
+    mkdir -p "$build_dir"
+    mkdir -p "$ARDUINO_CACHE_DIR"
+    $ide_path/arduino-builder -compile -logger=human -core-api-version=10810 \
+        -fqbn=$fqbn \
+        -warnings="all" \
+        -tools "$ide_path/tools-builder" \
+        -tools "$ide_path/tools" \
+        -built-in-libraries "$ide_path/libraries" \
+        -hardware "$ide_path/hardware" \
+        -hardware "$usr_path/hardware" \
+        -libraries "$usr_path/libraries" \
+        -build-cache "$ARDUINO_CACHE_DIR" \
+        -build-path "$build_dir" \
+        $win_opts $xtra_opts "$sketch"
+}
+
+function count_sketches(){ # count_sketches <path> [target]
+    local path=$1
+    local target=$2
+
+    if [ $# -lt 1 ]; then
+      echo "ERROR: Illegal number of parameters"
+      echo "USAGE: ${0} count <path> [target]"
+    fi
+
+    rm -rf sketches.txt
+    if [ ! -d "$path" ]; then
+        touch sketches.txt
+        return 0
+    fi
+
+    local sketches=$(find $path -name *.ino | sort)
+    local sketchnum=0
+    for sketch in $sketches; do
+        local sketchdir=$(dirname $sketch)
+        local sketchdirname=$(basename $sketchdir)
+        local sketchname=$(basename $sketch)
+        if [[ "$sketchdirname.ino" != "$sketchname" ]]; then
+            continue
+        elif [[ -n $target ]] && [[ -f "$sketchdir/.skip.$target" ]]; then
+            continue
+        else
+            echo $sketch >> sketches.txt
+            sketchnum=$(($sketchnum + 1))
+        fi
+    done
+    return $sketchnum
+}
+
+function build_sketches(){ # build_sketches <ide_path> <user_path> <fqbn> <target> <path> <chunk> <total-chunks> [extra-options]
+    local ide_path=$1
+    local usr_path=$2
+    local fqbn=$3
+    local target=$4
+    local path=$5
+    local chunk_idex=$6
+    local chunks_num=$7
+    local xtra_opts=$8
+
+    if [ "$#" -lt 7 ]; then
+        echo "ERROR: Illegal number of parameters"
+        echo "USAGE: ${0} chunk_build <ide_path> <user_path> <fqbn> <target> <path> [<chunk> <total-chunks>] [extra-options]"
+        return 1
+    fi
+
+    if [ "$chunks_num" -le 0 ]; then
+        echo "ERROR: Chunks count must be positive number"
+        return 1
+    fi
+    if [ "$chunk_idex" -ge "$chunks_num" ] && [ "$chunks_num" -ge 2 ]; then
+        echo "ERROR: Chunk index must be less than chunks count"
+        return 1
+    fi
+
+    set +e
+    count_sketches "$path" "$target"
+    local sketchcount=$?
+    set -e
+    local sketches=$(cat sketches.txt)
+    rm -rf sketches.txt
+
+    local chunk_size=$(( $sketchcount / $chunks_num ))
+    local all_chunks=$(( $chunks_num * $chunk_size ))
+    if [ "$all_chunks" -lt "$sketchcount" ]; then
+        chunk_size=$(( $chunk_size + 1 ))
+    fi
+
+    local start_index=0
+    local end_index=0
+    if [ "$chunk_idex" -ge "$chunks_num" ]; then
+        start_index=$chunk_idex
+        end_index=$sketchcount
+    else
+        start_index=$(( $chunk_idex * $chunk_size ))
+        if [ "$sketchcount" -le "$start_index" ]; then
+            echo "Skipping job"
+            return 0
+        fi
+
+        end_index=$(( $(( $chunk_idex + 1 )) * $chunk_size ))
+        if [ "$end_index" -gt "$sketchcount" ]; then
+            end_index=$sketchcount
+        fi
+    fi
+
+    local start_num=$(( $start_index + 1 ))
+    echo "Found $sketchcount Sketches for target '$target'";
+    echo "Chunk Index : $chunk_idex"
+    echo "Chunk Count : $chunks_num"
+    echo "Chunk Size  : $chunk_size"
+    echo "Start Sketch: $start_num"
+    echo "End Sketch  : $end_index"
+
+    local sketchnum=0
+    for sketch in $sketches; do
+        local sketchdir=$(dirname $sketch)
+        local sketchdirname=$(basename $sketchdir)
+        local sketchname=$(basename $sketch)
+        sketchnum=$(($sketchnum + 1))
+        if [ "$sketchnum" -le "$start_index" ] \
+        || [ "$sketchnum" -gt "$end_index" ]; then
+            continue
+        fi
+        echo ""
+        echo "Building Sketch Index $(($sketchnum - 1)) - $sketchdirname"
+        build_sketch "$ide_path" "$usr_path" "$fqbn" "$sketch" "$xtra_opts"
+        local result=$?
+        if [ $result -ne 0 ]; then
+            return $result
+        fi
+    done
+    return 0
+}
+
+USAGE="
+USAGE: ${0} [command] [options]
+Available commands:
+  count: Count sketches.
+  build: Build a sketch.
+  chunk_build: Build a chunk of sketches.
+"
+
+cmd=$1
+shift
+if [ -z $cmd ]; then
+  echo "ERROR: No command supplied"
+  echo "$USAGE"
+  exit 2
+fi
+
+case "$cmd" in
+  "count")
+    count_sketches $*
+    ;;
+  "build")
+    build_sketch $*
+    ;;
+  "chunk_build")
+    build_sketches $*
+    ;;
+  *)
+    echo "ERROR: Unrecognized command"
+    echo "$USAGE"
+    exit 2
+esac
+
diff --git a/.github/scripts/tests_build.sh b/.github/scripts/tests_build.sh
new file mode 100755
index 00000000000..fd0d2db2d2f
--- /dev/null
+++ b/.github/scripts/tests_build.sh
@@ -0,0 +1,58 @@
+#!/bin/bash
+
+SCRIPTS_DIR="./.github/scripts"
+BUILD_CMD=""
+
+if [ $# -eq 3 ]; then
+    chunk_build=1
+elif [ $# -eq 2 ]; then
+    chunk_build=0
+else
+  echo "ERROR: Illegal number of parameters"
+  echo "USAGE:
+        ${0} <target> <sketch_dir>
+        ${0} <target> <chunk> <total_chunks>
+        "
+  exit 0
+fi
+
+target=$1
+
+case "$target" in
+    "esp32") fqbn="espressif:esp32:esp32:PSRAM=enabled,PartitionScheme=huge_app"
+    ;;
+    "esp32s2") fqbn="espressif:esp32:esp32s2:PSRAM=enabled,PartitionScheme=huge_app"
+    ;;
+    "esp32c3") fqbn="espressif:esp32:esp32c3:PartitionScheme=huge_app"
+    ;;
+    "esp32s3") fqbn="espressif:esp32:esp32s3:PSRAM=opi,USBMode=default,PartitionScheme=huge_app"
+    ;;
+esac
+
+if [ -z $fqbn ]; then
+  echo "Unvalid chip $1"
+  exit 0
+fi
+
+source ${SCRIPTS_DIR}/install-arduino-ide.sh
+source ${SCRIPTS_DIR}/install-arduino-core-esp32.sh
+
+args="$ARDUINO_IDE_PATH $ARDUINO_USR_PATH \"$fqbn\""
+
+if [ $chunk_build -eq 1 ]; then
+    chunk_index=$2
+    chunk_max=$3
+
+    if [ "$chunk_index" -gt "$chunk_max" ] &&  [ "$chunk_max" -ge 2 ]; then
+        chunk_index=$chunk_max
+    fi
+    BUILD_CMD="${SCRIPTS_DIR}/sketch_utils.sh chunk_build"
+    args+=" $target $PWD/tests $chunk_index $chunk_max"
+else
+    sketchdir=$2
+    BUILD_CMD="${SCRIPTS_DIR}/sketch_utils.sh build"
+    args+=" $PWD/tests/$sketchdir/$sketchdir.ino"
+fi
+
+${BUILD_CMD} ${args}
+
diff --git a/.github/scripts/tests_run.sh b/.github/scripts/tests_run.sh
new file mode 100755
index 00000000000..a13f3c00c1d
--- /dev/null
+++ b/.github/scripts/tests_run.sh
@@ -0,0 +1,71 @@
+#!/bin/bash
+
+target=$1
+chunk_idex=$2
+chunks_num=$3
+
+SCRIPTS_DIR="./.github/scripts"
+COUNT_SKETCHES="${SCRIPTS_DIR}/sketch_utils.sh count"
+
+source ${SCRIPTS_DIR}/install-arduino-ide.sh
+
+if [ "$chunks_num" -le 0 ]; then
+    echo "ERROR: Chunks count must be positive number"
+    return 1
+fi
+if [ "$chunk_idex" -ge "$chunks_num" ] && [ "$chunks_num" -ge 2 ]; then
+    echo "ERROR: Chunk index must be less than chunks count"
+    return 1
+fi
+
+set +e
+${COUNT_SKETCHES} $PWD/tests $target
+sketchcount=$?
+set -e
+sketches=$(cat sketches.txt)
+rm -rf sketches.txt
+
+chunk_size=$(( $sketchcount / $chunks_num ))
+all_chunks=$(( $chunks_num * $chunk_size ))
+if [ "$all_chunks" -lt "$sketchcount" ]; then
+    chunk_size=$(( $chunk_size + 1 ))
+fi
+
+start_index=0
+end_index=0
+if [ "$chunk_idex" -ge "$chunks_num" ]; then
+    start_index=$chunk_idex
+    end_index=$sketchcount
+else
+    start_index=$(( $chunk_idex * $chunk_size ))
+    if [ "$sketchcount" -le "$start_index" ]; then
+        echo "Skipping job"
+        return 0
+    fi
+
+    end_index=$(( $(( $chunk_idex + 1 )) * $chunk_size ))
+    if [ "$end_index" -gt "$sketchcount" ]; then
+        end_index=$sketchcount
+    fi
+fi
+
+start_num=$(( $start_index + 1 ))
+sketchnum=0
+
+for sketch in $sketches; do
+    sketchdir=$(dirname $sketch)
+    sketchdirname=$(basename $sketchdir)
+    sketchname=$(basename $sketch)
+    sketchnum=$(($sketchnum + 1))
+    if [ "$sketchnum" -le "$start_index" ] \
+    || [ "$sketchnum" -gt "$end_index" ]; then
+        continue
+    fi
+    echo ""
+    echo "Test for Sketch Index $(($sketchnum - 1)) - $sketchdirname"
+    pytest tests -k test_$sketchdirname --junit-xml=tests/$sketchdirname/$sketchdirname.xml
+    result=$?
+    if [ $result -ne 0 ]; then
+        return $result
+    fi
+done
diff --git a/.github/scripts/update-version.sh b/.github/scripts/update-version.sh
new file mode 100755
index 00000000000..aac4f527c0f
--- /dev/null
+++ b/.github/scripts/update-version.sh
@@ -0,0 +1,39 @@
+#!/bin/bash
+
+# For reference: add tools for all boards by replacing one line in each board
+# "[board].upload.tool=esptool_py" to "[board].upload.tool=esptool_py\n[board].upload.tool.default=esptool_py\n[board].upload.tool.network=esp_ota"
+#cat boards.txt | sed "s/\([a-zA-Z0-9_\-]*\)\.upload\.tool\=esptool_py/\1\.upload\.tool\=esptool_py\\n\1\.upload\.tool\.default\=esptool_py\\n\1\.upload\.tool\.network\=esp_ota/"
+
+if [ ! $# -eq 3 ]; then
+	echo "Bad number of arguments: $#" >&2
+	echo "usage: $0 <major> <minor> <patch>" >&2
+	exit 1
+fi
+
+re='^[0-9]+$'
+if [[ ! $1 =~ $re ]] || [[ ! $2 =~ $re ]] || [[ ! $3 =~ $re ]] ; then
+	echo "error: Not a valid version: $1.$2.$3" >&2
+	echo "usage: $0 <major> <minor> <patch>" >&2
+	exit 1
+fi
+
+ESP_ARDUINO_VERSION_MAJOR="$1"
+ESP_ARDUINO_VERSION_MINOR="$2"
+ESP_ARDUINO_VERSION_PATCH="$3"
+ESP_ARDUINO_VERSION="$ESP_ARDUINO_VERSION_MAJOR.$ESP_ARDUINO_VERSION_MINOR.$ESP_ARDUINO_VERSION_PATCH"
+
+echo "New Arduino Version: $ESP_ARDUINO_VERSION"
+
+echo "Updating platform.txt..."
+cat platform.txt | sed "s/version=.*/version=$ESP_ARDUINO_VERSION/g" > __platform.txt && mv __platform.txt platform.txt
+
+echo "Updating package.json..."
+cat package.json | sed "s/.*\"version\":.*/  \"version\": \"$ESP_ARDUINO_VERSION\",/g" > __package.json && mv __package.json package.json
+
+echo "Updating cores/esp32/esp_arduino_version.h..."
+cat cores/esp32/esp_arduino_version.h | \
+sed "s/#define ESP_ARDUINO_VERSION_MAJOR.*/#define ESP_ARDUINO_VERSION_MAJOR   $ESP_ARDUINO_VERSION_MAJOR/g" | \
+sed "s/#define ESP_ARDUINO_VERSION_MINOR.*/#define ESP_ARDUINO_VERSION_MINOR   $ESP_ARDUINO_VERSION_MINOR/g" | \
+sed "s/#define ESP_ARDUINO_VERSION_PATCH.*/#define ESP_ARDUINO_VERSION_PATCH   $ESP_ARDUINO_VERSION_PATCH/g" > __esp_arduino_version.h && mv __esp_arduino_version.h cores/esp32/esp_arduino_version.h
+
+exit 0
diff --git a/.github/stale.yml b/.github/stale.yml
deleted file mode 100644
index 8b7ca846187..00000000000
--- a/.github/stale.yml
+++ /dev/null
@@ -1,26 +0,0 @@
-# This workflow firstly warns and then closes issues that have had no activity for a specified amount of time.
-#
-# You can adjust the behavior by modifying this file.
-# For more information can be found here: https://github.com/actions/stale
-
-name: Mark stale issues
-on:
-  schedule:
-  - cron: '30 9 * * *'
-
-jobs:
-  stale:
-
-    runs-on: ubuntu-latest
-    permissions:
-      issues: write  
-
-    steps:
-    - uses: actions/stale@v3
-      with:
-        repo-token: ${{ secrets.GITHUB_TOKEN }}
-        stale-issue-message: 'This issue has been automatically marked as stale because it has not had recent activity. It will be closed in 14 days if no further activity occurs. Thank you for your contributions.'
-        days-before-stale: 60
-        days-before-close: 14
-        exempt-issue-labels: 'Type: For reference,Type: To be implemented,Type: Feature request'
-        stale-issue-label: 'Status: Stale'
\ No newline at end of file
diff --git a/.github/workflows/hil.yml b/.github/workflows/hil.yml
new file mode 100644
index 00000000000..037a7432c6e
--- /dev/null
+++ b/.github/workflows/hil.yml
@@ -0,0 +1,121 @@
+name: Run tests in hardware
+
+on:
+  pull_request:
+    types: [opened, reopened, synchronize, labeled]
+
+  schedule:
+    - cron: '0 2 * * *'
+
+env:
+  MAX_CHUNKS: 15
+
+concurrency:
+  group: hil-${{github.event.pull_request.number || github.ref}}
+  cancel-in-progress: true
+
+jobs:
+  gen_chunks:
+    if: |
+      contains(github.event.pull_request.labels.*.name, 'hil_test') ||
+      github.event_name == 'schedule'
+    name: Generate Chunks matrix
+    runs-on: ubuntu-latest
+    outputs:
+      chunks: ${{ steps.gen-chunks.outputs.chunks }}
+    steps:
+      - name: Checkout Repository
+        uses: actions/checkout@v2
+
+      - name: Generate Chunks matrix
+        id: gen-chunks
+        run: |
+          set +e
+          bash .github/scripts/sketch_utils.sh count tests
+          sketches=$((? - 1))
+          if [[ $sketches -gt ${{env.MAX_CHUNKS}} ]]; then
+            $sketches=${{env.MAX_CHUNKS}}
+          fi
+          set -e
+          rm sketches.txt
+          CHUNKS=$(jq -c -n '$ARGS.positional' --args `seq 0 1 $sketches`)
+          echo "::set-output name=chunks::${CHUNKS}"
+
+  Build:
+    needs: gen_chunks
+    name: ${{matrix.chip}}-Build#${{matrix.chunks}}
+    runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        chip: ['esp32', 'esp32s2', 'esp32s3', 'esp32c3']
+        chunks: ${{fromJson(needs.gen_chunks.outputs.chunks)}}
+
+    steps:
+      - name: Checkout Repository
+        uses: actions/checkout@v2
+
+      - name: Build sketches
+        run: |
+          bash .github/scripts/tests_build.sh ${{matrix.chip}} ${{matrix.chunks}} ${{env.MAX_CHUNKS}}
+      - name: Upload ${{matrix.chip}}-${{matrix.chunks}} artifacts
+        uses: actions/upload-artifact@v2
+        with:
+          name: ${{matrix.chip}}-${{matrix.chunks}}.artifacts
+          path: |
+             tests/*/build/*.bin
+             tests/*/build/*.json
+  Test:
+    needs: [gen_chunks, Build]
+    name: ${{matrix.chip}}-Test#${{matrix.chunks}}
+    runs-on:
+      - ESP32
+      - ESP32-S2
+      - ESP32-S3
+      - ESP32-C3
+
+    strategy:
+      fail-fast: false
+      matrix:
+        chip: ['esp32', 'esp32s2', 'esp32s3', 'esp32c3']
+        chunks: ${{fromJson(needs.gen_chunks.outputs.chunks)}}
+    container:
+      image: python:3.10.1-bullseye
+      options: --privileged
+
+    steps:
+       - name: Checkout repository
+         uses: actions/checkout@v2
+
+       - name: Download ${{matrix.chip}}-${{matrix.chunks}} artifacts
+         uses: actions/download-artifact@v2
+         with:
+           name: ${{matrix.chip}}-${{matrix.chunks}}.artifacts
+           path: tests/
+
+       - name: Install dependencies
+         run: |
+           pip install -U pip
+           pip install -r tests/requirements.txt
+
+       - name: Run Tests
+         run: |
+           bash .github/scripts/tests_run.sh ${{matrix.chip}} ${{matrix.chunks}} ${{env.MAX_CHUNKS}}
+
+       - name: Upload test result artifacts
+         uses: actions/upload-artifact@v2
+         if: always()
+         with:
+           name: test_results-${{matrix.chip}}-${{matrix.chunks}}
+           path: tests/*/*.xml
+
+  event_file:
+    name: "Event File"
+    if: ${{ always() }}
+    needs: Test
+    runs-on: ubuntu-latest
+    steps:
+       - name: Upload
+         uses: actions/upload-artifact@v2
+         with:
+           name: Event File
+           path: ${{github.event_path}}
diff --git a/.github/workflows/publish.yml b/.github/workflows/publish.yml
new file mode 100644
index 00000000000..34d3564c4a8
--- /dev/null
+++ b/.github/workflows/publish.yml
@@ -0,0 +1,38 @@
+name: Unit Test Results
+
+on:
+  workflow_run:
+    workflows: [Run tests in hardware]
+    branches-ignore: [master]
+
+    types:
+      - completed
+
+jobs:
+  unit-test-results:
+    name: Unit Test Results
+    runs-on: ubuntu-latest
+    if: |
+      github.event.workflow_run.event == 'pull_request' &&
+      (github.event.workflow_run.conclusion == 'success' ||
+       github.event.workflow_run.conclusion == 'failure')
+    steps:
+      - name: Download and Extract Artifacts
+        env:
+          GITHUB_TOKEN: ${{secrets.GITHUB_TOKEN}}
+        run: |
+          mkdir -p artifacts && cd artifacts
+          artifacts_url=${{ github.event.workflow_run.artifacts_url }}
+          gh api "$artifacts_url" -q '.artifacts[] | [.name, .archive_download_url] | @tsv' | while read artifact
+          do
+            IFS=$'\t' read name url <<< "$artifact"
+            gh api $url > "$name.zip"
+            unzip -d "$name" "$name.zip"
+          done
+      - name: Publish Unit Test Results
+        uses: EnricoMi/publish-unit-test-result-action@v1
+        with:
+          commit: ${{ github.event.workflow_run.head_sha }}
+          event_file: artifacts/Event File/event.json
+          event_name: ${{ github.event.workflow_run.event }}
+          files: "artifacts/**/*.xml"
diff --git a/.github/workflows/push.yml b/.github/workflows/push.yml
index b73b4d34c67..f2f75d7b1ac 100644
--- a/.github/workflows/push.yml
+++ b/.github/workflows/push.yml
@@ -1,14 +1,26 @@
 name: ESP32 Arduino CI
 
 on:
+  workflow_dispatch:
   push:
     branches:
     - master
     - release/*
   pull_request:
 
+concurrency:
+  group: build-${{github.event.pull_request.number || github.ref}}
+  cancel-in-progress: true
+
 jobs:
-  
+
+  cmake-check:
+    name: Check cmake file
+    runs-on: ubuntu-latest
+    steps:
+    - uses: actions/checkout@v2
+    - run: bash ./.github/scripts/check-cmakelists.sh
+
   # Ubuntu
   build-arduino-linux:
     name: Arduino ${{ matrix.chunk }} on ubuntu-latest
@@ -16,12 +28,22 @@ jobs:
     strategy:
       matrix:
         chunk: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14]
-    
+
     steps:
     - uses: actions/checkout@v2
     - uses: actions/setup-python@v2
       with:
         python-version: '3.x'
+    - name: Cache tools
+      id: cache-linux
+      uses: actions/cache@v2
+      with:
+        path: |
+          ./tools/dist
+          ~/arduino_ide
+        key: ${{ runner.os }}-${{ hashFiles('package/package_esp32_index.template.json',
+                                            'tools/get.py',
+                                            '.github/scripts/install-arduino-ide.sh') }}
     - name: Build Sketches
       run: bash ./.github/scripts/on-push.sh ${{ matrix.chunk }} 15
 
@@ -32,7 +54,7 @@ jobs:
     strategy:
       matrix:
         os: [windows-latest, macOS-latest]
-    
+
     steps:
     - uses: actions/checkout@v2
     - uses: actions/setup-python@v2
@@ -48,7 +70,7 @@ jobs:
     strategy:
       matrix:
         os: [ubuntu-latest, windows-latest, macOS-latest]
-    
+
     steps:
     - uses: actions/checkout@v2
     - uses: actions/setup-python@v2
@@ -56,3 +78,30 @@ jobs:
         python-version: '3.x'
     - name: Build Sketches
       run: bash ./.github/scripts/on-push.sh 1 1 #equal and non-zero to trigger PIO
+
+  build-esp-idf-component:
+    name: Build with ESP-IDF ${{ matrix.idf_ver }} for ${{ matrix.idf_target }}
+    runs-on: ubuntu-20.04
+    strategy:
+      matrix:
+        # The version names here correspond to the versions of espressif/idf Docker image.
+        # See https://hub.docker.com/r/espressif/idf/tags and
+        # https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-guides/tools/idf-docker-image.html
+        # for details.
+        idf_ver: ["release-v4.4"]
+        idf_target: ["esp32", "esp32s2", "esp32s3", "esp32c3"]
+    container: espressif/idf:${{ matrix.idf_ver }}
+    steps:
+      - name: Check out arduino-esp32 as a component
+        uses: actions/checkout@v2
+        with:
+          submodules: recursive
+          path: components/arduino-esp32
+      - name: Build
+        env:
+          IDF_TARGET: ${{ matrix.idf_target }}
+        shell: bash
+        run: |
+          . ${IDF_PATH}/export.sh
+          idf.py create-project test
+          idf.py -C test -DEXTRA_COMPONENT_DIRS=$PWD/components build
diff --git a/.github/workflows/test_selfhosted_runner.yml b/.github/workflows/test_selfhosted_runner.yml
deleted file mode 100644
index ddac78abbc3..00000000000
--- a/.github/workflows/test_selfhosted_runner.yml
+++ /dev/null
@@ -1,28 +0,0 @@
-name: Test Github action on self hosted RPI runnes
-
-on:
-  push:
-    branches:
-    - master
-  pull_request:
-
-jobs:
-  build:
-    name: Dummy test - self hosted GHR
-    runs-on: self-hosted
-    if: github.repository == 'espressif/arduino-esp32'
-    steps:
-      - name: Check out repo
-        uses: actions/checkout@v2
-      - name: Test message 1
-        run: echo "This is test message"
-      - name: Test message 2
-        run: echo "This is test message2"
-      - name: List directory
-        run: ls
-      - name: Create copy of README
-        run: cp README.md README2.md
-      - name: Read README2
-        run: cat README2.md
-      - name: Delete README2
-        run: rm README2.md
diff --git a/.github/workflows/upload-idf-component.yml b/.github/workflows/upload-idf-component.yml
new file mode 100644
index 00000000000..d9e4032df08
--- /dev/null
+++ b/.github/workflows/upload-idf-component.yml
@@ -0,0 +1,19 @@
+name: Push components to https://components.espressif.com
+on:
+  push:
+    tags:
+      - v*
+jobs:
+  upload_components:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v2
+        with:
+          submodules: "recursive"
+
+      - name: Upload components to the component registry
+        uses: espressif/github-actions/upload_components@master
+        with:
+          name: arduino-esp32
+          namespace: espressif
+          api_token: ${{ secrets.IDF_COMPONENT_API_TOKEN }}
diff --git a/.gitignore b/.gitignore
index 5114d19da5c..90f3ff87709 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,5 +1,6 @@
 tools/xtensa-esp32-elf
 tools/xtensa-esp32s2-elf
+tools/xtensa-esp32s3-elf
 tools/riscv32-esp-elf
 tools/dist
 tools/esptool
@@ -22,3 +23,6 @@ boards.sloeber.txt
 # Ignore docs build (Sphinx)
 docs/build
 docs/source/_build
+
+# Test log files
+*.log
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 59d1ded8e80..1b0300fc743 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -57,6 +57,7 @@ set(CORE_SRCS
   cores/esp32/stdlib_noniso.c
   cores/esp32/Stream.cpp
   cores/esp32/StreamString.cpp
+  cores/esp32/Tone.cpp
   cores/esp32/HWCDC.cpp
   cores/esp32/USB.cpp
   cores/esp32/USBCDC.cpp
@@ -86,6 +87,7 @@ set(LIBRARY_SRCS
   libraries/HTTPClient/src/HTTPClient.cpp
   libraries/HTTPUpdate/src/HTTPUpdate.cpp
   libraries/LittleFS/src/LittleFS.cpp
+  libraries/I2S/src/I2S.cpp
   libraries/NetBIOS/src/NetBIOS.cpp
   libraries/Preferences/src/Preferences.cpp
   libraries/RainMaker/src/RMaker.cpp
@@ -115,6 +117,7 @@ set(LIBRARY_SRCS
   libraries/WebServer/src/Parsing.cpp
   libraries/WebServer/src/detail/mimetable.cpp
   libraries/WiFiClientSecure/src/ssl_client.cpp
+  libraries/WiFiClientSecure/src/esp_crt_bundle.c
   libraries/WiFiClientSecure/src/WiFiClientSecure.cpp
   libraries/WiFi/src/WiFiAP.cpp
   libraries/WiFi/src/WiFiClient.cpp
@@ -161,7 +164,6 @@ set(BLE_SRCS
   libraries/BLE/src/GeneralUtils.cpp
   )
 
-
 set(includedirs
   variants/${IDF_TARGET}/
   cores/esp32/
@@ -173,11 +175,13 @@ set(includedirs
   libraries/EEPROM/src
   libraries/ESP32/src
   libraries/ESPmDNS/src
+  libraries/Ethernet/src
   libraries/FFat/src
   libraries/FS/src
   libraries/HTTPClient/src
   libraries/HTTPUpdate/src
   libraries/LittleFS/src
+  libraries/I2S/src
   libraries/NetBIOS/src
   libraries/Preferences/src
   libraries/RainMaker/src
@@ -198,7 +202,7 @@ set(includedirs
 
 set(srcs ${CORE_SRCS} ${LIBRARY_SRCS} ${BLE_SRCS})
 set(priv_includes cores/esp32/libb64)
-set(requires spi_flash mbedtls mdns esp_adc_cal wifi_provisioning nghttp)
+set(requires spi_flash mbedtls mdns esp_adc_cal wifi_provisioning nghttp wpa_supplicant)
 set(priv_requires fatfs nvs_flash app_update spiffs bootloader_support openssl bt esp_ipc esp_hid)
 
 idf_component_register(INCLUDE_DIRS ${includedirs} PRIV_INCLUDE_DIRS ${priv_includes} SRCS ${srcs} REQUIRES ${requires} PRIV_REQUIRES ${priv_requires})
@@ -233,7 +237,9 @@ function(maybe_add_component component_name)
     endif()
 endfunction()
 
-if(IDF_TARGET MATCHES "esp32" AND CONFIG_ESP_RMAKER_TASK_STACK)
+maybe_add_component(esp-dsp)
+
+if(CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK)
     maybe_add_component(esp_rainmaker)
     maybe_add_component(qrcode)
 endif()
diff --git a/Makefile.projbuild b/Makefile.projbuild
deleted file mode 100644
index 26b43787a6f..00000000000
--- a/Makefile.projbuild
+++ /dev/null
@@ -1,7 +0,0 @@
-BOOT_APP_BIN_ROOT := $(call dequote,$(COMPONENT_PATH))
-
-ifndef CONFIG_PARTITION_TABLE_CUSTOM
-PARTITION_TABLE_CSV_PATH = $(call dequote,$(abspath $(BOOT_APP_BIN_ROOT)/$(subst $(quote),,tools/partitions/$(CONFIG_ARDUHAL_PARTITION_SCHEME).csv)))
-endif
-
-CPPFLAGS += -DARDUINO=10800 -DESP32=1 -DARDUINO_ARCH_ESP32=1 -DBOARD_HAS_PSRAM
diff --git a/README.md b/README.md
index 969a8f6fb11..0fb4c3a244b 100644
--- a/README.md
+++ b/README.md
@@ -1,14 +1,18 @@
-# Arduino core for the ESP32, ESP32-S2 and ESP32-C3
+# Arduino core for the ESP32, ESP32-S2, ESP32-S3 and ESP32-C3
 
 ![Build Status](https://github.com/espressif/arduino-esp32/workflows/ESP32%20Arduino%20CI/badge.svg) [![Documentation Status](https://readthedocs.com/projects/espressif-arduino-esp32/badge/?version=latest)](https://docs.espressif.com/projects/arduino-esp32/en/latest/?badge=latest)
 
-### Need help or have a question? Join the chat at [![https://gitter.im/espressif/arduino-esp32](https://badges.gitter.im/espressif/arduino-esp32.svg)](https://gitter.im/espressif/arduino-esp32?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge)
+### Need help or have a question? Join the chat at [![https://gitter.im/espressif/arduino-esp32](https://badges.gitter.im/espressif/arduino-esp32.svg)](https://gitter.im/espressif/arduino-esp32?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge) or [open a new Discussion](https://github.com/espressif/arduino-esp32/discussions)
 
 ## Contents
 
-- [Development Status](#development-status)
-- [Decoding Exceptions](#decoding-exceptions)
-- [Issue/Bug report template](#issuebug-report-template)
+  - [Development Status](#development-status)
+  - [Development Planning](#development-planning)
+  - [Documentation](#documentation)
+  - [Supported Chips](#supported-chips)
+  - [Decoding exceptions](#decoding-exceptions)
+  - [Issue/Bug report template](#issuebug-report-template)
+  - [Contributing](#contributing)
 
 ### Development Status
 
@@ -16,9 +20,15 @@ Latest Stable Release  [![Release Version](https://img.shields.io/github/release
 
 Latest Development Release  [![Release Version](https://img.shields.io/github/release/espressif/arduino-esp32/all.svg?style=plastic)](https://github.com/espressif/arduino-esp32/releases/) [![Release Date](https://img.shields.io/github/release-date-pre/espressif/arduino-esp32.svg?style=plastic)](https://github.com/espressif/arduino-esp32/releases/) [![Downloads](https://img.shields.io/github/downloads-pre/espressif/arduino-esp32/latest/total.svg?style=plastic)](https://github.com/espressif/arduino-esp32/releases/)
 
+### Development Planning
+
+Our Development is fully tracked on this public **[Roadmap 🎉](https://github.com/orgs/espressif/projects/3)** 
+
+For even more information you can take a look at [Sprint Meeting notes](https://github.com/espressif/arduino-esp32/discussions/categories/sprints-meeting-notes) or join [Monthly Community Meetings 🔔](https://github.com/espressif/arduino-esp32/discussions/categories/monthly-community-meetings)
+
 ### Documentation
 
-You can use [Arduino-ESP32 Online Documentation](https://docs.espressif.com/projects/arduino-esp32/en/latest/) to get all information about this project.
+You can use the [Arduino-ESP32 Online Documentation](https://docs.espressif.com/projects/arduino-esp32/en/latest/) to get all information about this project.
 
 * [Getting Started](https://docs.espressif.com/projects/arduino-esp32/en/latest/getting_started.html)
 * [Installing (Windows, Linux and macOS)](https://docs.espressif.com/projects/arduino-esp32/en/latest/installing.html)
@@ -36,6 +46,7 @@ Visit the [supported chips](https://docs.espressif.com/projects/arduino-esp32/en
 You can use [EspExceptionDecoder](https://github.com/me-no-dev/EspExceptionDecoder) to get meaningful call trace.
 
 ### Issue/Bug report template
+
 Before reporting an issue, make sure you've searched for similar one that was already created. Also make sure to go through all the issues labelled as [Type: For reference](https://github.com/espressif/arduino-esp32/issues?q=is%3Aissue+label%3A%22Type%3A+For+reference%22+).
 
 Finally, if you are sure no one else had the issue, follow the **Issue template** or **Feature request template** while reporting any [new Issue](https://github.com/espressif/arduino-esp32/issues/new/choose).
diff --git a/boards.txt b/boards.txt
index 2a74cdf751c..388dc6175a4 100644
--- a/boards.txt
+++ b/boards.txt
@@ -1,4 +1,5 @@
 menu.UploadSpeed=Upload Speed
+menu.USBMode=USB Mode
 menu.CDCOnBoot=USB CDC On Boot
 menu.MSCOnBoot=USB Firmware MSC On Boot
 menu.DFUOnBoot=USB DFU On Boot
@@ -15,16 +16,232 @@ menu.LORAWAN_REGION=LoRaWan Region
 menu.LoRaWanDebugLevel=LoRaWan Debug Level
 menu.LoopCore=Arduino Runs On
 menu.EventsCore=Events Run On
+menu.MemoryType=Memory Type
 
 ##############################################################
 ### DO NOT PUT BOARDS ABOVE THE OFFICIAL ESPRESSIF BOARDS! ###
 ##############################################################
 
+esp32s3.name=ESP32S3 Dev Module
+esp32s3.vid.0=0x303a
+esp32s3.pid.0=0x1001
+
+esp32s3.bootloader.tool=esptool_py
+esp32s3.bootloader.tool.default=esptool_py
+
+esp32s3.upload.tool=esptool_py
+esp32s3.upload.tool.default=esptool_py
+esp32s3.upload.tool.network=esp_ota
+
+esp32s3.upload.maximum_size=1310720
+esp32s3.upload.maximum_data_size=327680
+esp32s3.upload.flags=
+esp32s3.upload.extra_flags=
+esp32s3.upload.use_1200bps_touch=false
+esp32s3.upload.wait_for_upload_port=false
+
+esp32s3.serial.disableDTR=false
+esp32s3.serial.disableRTS=false
+
+esp32s3.build.tarch=xtensa
+esp32s3.build.bootloader_addr=0x0
+esp32s3.build.target=esp32s3
+esp32s3.build.mcu=esp32s3
+esp32s3.build.core=esp32
+esp32s3.build.variant=esp32s3
+esp32s3.build.board=ESP32S3_DEV
+
+esp32s3.build.usb_mode=1
+esp32s3.build.cdc_on_boot=0
+esp32s3.build.msc_on_boot=0
+esp32s3.build.dfu_on_boot=0
+esp32s3.build.f_cpu=240000000L
+esp32s3.build.flash_size=4MB
+esp32s3.build.flash_freq=80m
+esp32s3.build.flash_mode=dio
+esp32s3.build.boot=qio
+esp32s3.build.boot_freq=80m
+esp32s3.build.partitions=default
+esp32s3.build.defines=
+esp32s3.build.loop_core=
+esp32s3.build.event_core=
+esp32s3.build.flash_type=qspi
+esp32s3.build.psram_type=qspi
+esp32s3.build.memory_type={build.flash_type}_{build.psram_type}
+
+esp32s3.menu.PSRAM.disabled=Disabled
+esp32s3.menu.PSRAM.disabled.build.defines=
+esp32s3.menu.PSRAM.disabled.build.psram_type=qspi
+esp32s3.menu.PSRAM.enabled=QSPI PSRAM
+esp32s3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
+esp32s3.menu.PSRAM.enabled.build.psram_type=qspi
+esp32s3.menu.PSRAM.opi=OPI PSRAM
+esp32s3.menu.PSRAM.opi.build.defines=-DBOARD_HAS_PSRAM
+esp32s3.menu.PSRAM.opi.build.psram_type=opi
+
+esp32s3.menu.FlashMode.qio=QIO 80MHz
+esp32s3.menu.FlashMode.qio.build.flash_mode=dio
+esp32s3.menu.FlashMode.qio.build.boot=qio
+esp32s3.menu.FlashMode.qio.build.boot_freq=80m
+esp32s3.menu.FlashMode.qio.build.flash_freq=80m
+esp32s3.menu.FlashMode.qio.build.flash_type=qspi
+esp32s3.menu.FlashMode.qio120=QIO 120MHz
+esp32s3.menu.FlashMode.qio120.build.flash_mode=dio
+esp32s3.menu.FlashMode.qio120.build.boot=qio
+esp32s3.menu.FlashMode.qio120.build.boot_freq=120m
+esp32s3.menu.FlashMode.qio120.build.flash_freq=80m
+esp32s3.menu.FlashMode.qio120.build.flash_type=qspi
+esp32s3.menu.FlashMode.dio=DIO 80MHz
+esp32s3.menu.FlashMode.dio.build.flash_mode=dio
+esp32s3.menu.FlashMode.dio.build.boot=dio
+esp32s3.menu.FlashMode.dio.build.boot_freq=80m
+esp32s3.menu.FlashMode.dio.build.flash_freq=80m
+esp32s3.menu.FlashMode.dio.build.flash_type=qspi
+esp32s3.menu.FlashMode.opi=OPI 80MHz
+esp32s3.menu.FlashMode.opi.build.flash_mode=dout
+esp32s3.menu.FlashMode.opi.build.boot=opi
+esp32s3.menu.FlashMode.opi.build.boot_freq=80m
+esp32s3.menu.FlashMode.opi.build.flash_freq=80m
+esp32s3.menu.FlashMode.opi.build.flash_type=opi
+
+esp32s3.menu.FlashSize.4M=4MB (32Mb)
+esp32s3.menu.FlashSize.4M.build.flash_size=4MB
+esp32s3.menu.FlashSize.8M=8MB (64Mb)
+esp32s3.menu.FlashSize.8M.build.flash_size=8MB
+esp32s3.menu.FlashSize.8M.build.partitions=default_8MB
+esp32s3.menu.FlashSize.16M=16MB (128Mb)
+esp32s3.menu.FlashSize.16M.build.flash_size=16MB
+#esp32s3.menu.FlashSize.32M=32MB (256Mb)
+#esp32s3.menu.FlashSize.32M.build.flash_size=32MB
+
+esp32s3.menu.LoopCore.1=Core 1
+esp32s3.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
+esp32s3.menu.LoopCore.0=Core 0
+esp32s3.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
+
+esp32s3.menu.EventsCore.1=Core 1
+esp32s3.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+esp32s3.menu.EventsCore.0=Core 0
+esp32s3.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
+
+esp32s3.menu.USBMode.hwcdc=Hardware CDC and JTAG
+esp32s3.menu.USBMode.hwcdc.build.usb_mode=1
+esp32s3.menu.USBMode.default=USB-OTG (TinyUSB)
+esp32s3.menu.USBMode.default.build.usb_mode=0
+
+esp32s3.menu.CDCOnBoot.default=Disabled
+esp32s3.menu.CDCOnBoot.default.build.cdc_on_boot=0
+esp32s3.menu.CDCOnBoot.cdc=Enabled
+esp32s3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
+
+esp32s3.menu.MSCOnBoot.default=Disabled
+esp32s3.menu.MSCOnBoot.default.build.msc_on_boot=0
+esp32s3.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
+esp32s3.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+esp32s3.menu.DFUOnBoot.default=Disabled
+esp32s3.menu.DFUOnBoot.default.build.dfu_on_boot=0
+esp32s3.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
+esp32s3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
+
+esp32s3.menu.UploadMode.default=UART0 / Hardware CDC
+esp32s3.menu.UploadMode.default.upload.use_1200bps_touch=false
+esp32s3.menu.UploadMode.default.upload.wait_for_upload_port=false
+esp32s3.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
+esp32s3.menu.UploadMode.cdc.upload.use_1200bps_touch=true
+esp32s3.menu.UploadMode.cdc.upload.wait_for_upload_port=true
+
+esp32s3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+esp32s3.menu.PartitionScheme.default.build.partitions=default
+esp32s3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+esp32s3.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+esp32s3.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
+esp32s3.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+esp32s3.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+esp32s3.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+esp32s3.menu.PartitionScheme.minimal.build.partitions=minimal
+esp32s3.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+esp32s3.menu.PartitionScheme.no_ota.build.partitions=no_ota
+esp32s3.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+esp32s3.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+esp32s3.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+esp32s3.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+esp32s3.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+esp32s3.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+esp32s3.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+esp32s3.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+esp32s3.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+esp32s3.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+esp32s3.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+esp32s3.menu.PartitionScheme.huge_app.build.partitions=huge_app
+esp32s3.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+esp32s3.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+esp32s3.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+esp32s3.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+esp32s3.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
+esp32s3.menu.PartitionScheme.fatflash.build.partitions=ffat
+esp32s3.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+esp32s3.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
+esp32s3.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+esp32s3.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+esp32s3.menu.PartitionScheme.rainmaker=RainMaker
+esp32s3.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
+esp32s3.menu.PartitionScheme.rainmaker.upload.maximum_size=3145728
+
+esp32s3.menu.CPUFreq.240=240MHz (WiFi)
+esp32s3.menu.CPUFreq.240.build.f_cpu=240000000L
+esp32s3.menu.CPUFreq.160=160MHz (WiFi)
+esp32s3.menu.CPUFreq.160.build.f_cpu=160000000L
+esp32s3.menu.CPUFreq.80=80MHz (WiFi)
+esp32s3.menu.CPUFreq.80.build.f_cpu=80000000L
+esp32s3.menu.CPUFreq.40=40MHz
+esp32s3.menu.CPUFreq.40.build.f_cpu=40000000L
+esp32s3.menu.CPUFreq.20=20MHz
+esp32s3.menu.CPUFreq.20.build.f_cpu=20000000L
+esp32s3.menu.CPUFreq.10=10MHz
+esp32s3.menu.CPUFreq.10.build.f_cpu=10000000L
+
+esp32s3.menu.UploadSpeed.921600=921600
+esp32s3.menu.UploadSpeed.921600.upload.speed=921600
+esp32s3.menu.UploadSpeed.115200=115200
+esp32s3.menu.UploadSpeed.115200.upload.speed=115200
+esp32s3.menu.UploadSpeed.256000.windows=256000
+esp32s3.menu.UploadSpeed.256000.upload.speed=256000
+esp32s3.menu.UploadSpeed.230400.windows.upload.speed=256000
+esp32s3.menu.UploadSpeed.230400=230400
+esp32s3.menu.UploadSpeed.230400.upload.speed=230400
+esp32s3.menu.UploadSpeed.460800.linux=460800
+esp32s3.menu.UploadSpeed.460800.macosx=460800
+esp32s3.menu.UploadSpeed.460800.upload.speed=460800
+esp32s3.menu.UploadSpeed.512000.windows=512000
+esp32s3.menu.UploadSpeed.512000.upload.speed=512000
+
+esp32s3.menu.DebugLevel.none=None
+esp32s3.menu.DebugLevel.none.build.code_debug=0
+esp32s3.menu.DebugLevel.error=Error
+esp32s3.menu.DebugLevel.error.build.code_debug=1
+esp32s3.menu.DebugLevel.warn=Warn
+esp32s3.menu.DebugLevel.warn.build.code_debug=2
+esp32s3.menu.DebugLevel.info=Info
+esp32s3.menu.DebugLevel.info.build.code_debug=3
+esp32s3.menu.DebugLevel.debug=Debug
+esp32s3.menu.DebugLevel.debug.build.code_debug=4
+esp32s3.menu.DebugLevel.verbose=Verbose
+esp32s3.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
 esp32c3.name=ESP32C3 Dev Module
 esp32c3.vid.0=0x303a
 esp32c3.pid.0=0x1001
 
+esp32c3.bootloader.tool=esptool_py
+esp32c3.bootloader.tool.default=esptool_py
+
 esp32c3.upload.tool=esptool_py
+esp32c3.upload.tool.default=esptool_py
+esp32c3.upload.tool.network=esp_ota
+
 esp32c3.upload.maximum_size=1310720
 esp32c3.upload.maximum_data_size=327680
 esp32c3.upload.flags=
@@ -90,6 +307,9 @@ esp32c3.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
 esp32c3.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
 esp32c3.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
 esp32c3.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+esp32c3.menu.PartitionScheme.rainmaker=RainMaker
+esp32c3.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
+esp32c3.menu.PartitionScheme.rainmaker.upload.maximum_size=3145728
 
 esp32c3.menu.CPUFreq.160=160MHz (WiFi)
 esp32c3.menu.CPUFreq.160.build.f_cpu=160000000L
@@ -165,7 +385,13 @@ esp32s2.name=ESP32S2 Dev Module
 esp32s2.vid.0=0x303a
 esp32s2.pid.0=0x0002
 
+esp32s2.bootloader.tool=esptool_py
+esp32s2.bootloader.tool.default=esptool_py
+
 esp32s2.upload.tool=esptool_py
+esp32s2.upload.tool.default=esptool_py
+esp32s2.upload.tool.network=esp_ota
+
 esp32s2.upload.maximum_size=1310720
 esp32s2.upload.maximum_data_size=327680
 esp32s2.upload.flags=
@@ -255,6 +481,9 @@ esp32s2.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
 esp32s2.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
 esp32s2.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
 esp32s2.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+esp32s2.menu.PartitionScheme.rainmaker=RainMaker
+esp32s2.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
+esp32s2.menu.PartitionScheme.rainmaker.upload.maximum_size=3145728
 
 esp32s2.menu.CPUFreq.240=240MHz (WiFi)
 esp32s2.menu.CPUFreq.240.build.f_cpu=240000000L
@@ -330,7 +559,13 @@ esp32s2.menu.DebugLevel.verbose.build.code_debug=5
 
 esp32.name=ESP32 Dev Module
 
+esp32.bootloader.tool=esptool_py
+esp32.bootloader.tool.default=esptool_py
+
 esp32.upload.tool=esptool_py
+esp32.upload.tool.default=esptool_py
+esp32.upload.tool.network=esp_ota
+
 esp32.upload.maximum_size=1310720
 esp32.upload.maximum_data_size=327680
 esp32.upload.flags=
@@ -487,9 +722,170 @@ esp32.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
 
+esp32da.name=ESP32-WROOM-DA Module
+
+esp32da.bootloader.tool=esptool_py
+esp32da.bootloader.tool.default=esptool_py
+
+esp32da.upload.tool=esptool_py
+esp32da.upload.tool.default=esptool_py
+esp32da.upload.tool.network=esp_ota
+
+esp32da.upload.maximum_size=1310720
+esp32da.upload.maximum_data_size=327680
+esp32da.upload.flags=
+esp32da.upload.extra_flags=
+
+esp32da.serial.disableDTR=true
+esp32da.serial.disableRTS=true
+
+esp32da.build.tarch=xtensa
+esp32da.build.bootloader_addr=0x1000
+esp32da.build.target=esp32
+esp32da.build.mcu=esp32
+esp32da.build.core=esp32
+esp32da.build.variant=esp32da
+esp32da.build.board=ESP32_WROOM_DA
+
+esp32da.build.f_cpu=240000000L
+esp32da.build.flash_size=4MB
+esp32da.build.flash_freq=40m
+esp32da.build.flash_mode=dio
+esp32da.build.boot=dio
+esp32da.build.partitions=default
+esp32da.build.defines=
+esp32da.build.loop_core=
+esp32da.build.event_core=
+
+esp32da.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+esp32da.menu.PartitionScheme.default.build.partitions=default
+esp32da.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+esp32da.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+esp32da.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
+esp32da.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+esp32da.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+esp32da.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+esp32da.menu.PartitionScheme.minimal.build.partitions=minimal
+esp32da.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+esp32da.menu.PartitionScheme.no_ota.build.partitions=no_ota
+esp32da.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+esp32da.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+esp32da.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+esp32da.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+esp32da.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+esp32da.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+esp32da.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+esp32da.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+esp32da.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+esp32da.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+esp32da.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+esp32da.menu.PartitionScheme.huge_app.build.partitions=huge_app
+esp32da.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+esp32da.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+esp32da.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+esp32da.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+esp32da.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
+esp32da.menu.PartitionScheme.fatflash.build.partitions=ffat
+esp32da.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+esp32da.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
+esp32da.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+esp32da.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+esp32da.menu.PartitionScheme.rainmaker=RainMaker
+esp32da.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
+esp32da.menu.PartitionScheme.rainmaker.upload.maximum_size=3145728
+
+esp32da.menu.CPUFreq.240=240MHz (WiFi/BT)
+esp32da.menu.CPUFreq.240.build.f_cpu=240000000L
+esp32da.menu.CPUFreq.160=160MHz (WiFi/BT)
+esp32da.menu.CPUFreq.160.build.f_cpu=160000000L
+esp32da.menu.CPUFreq.80=80MHz (WiFi/BT)
+esp32da.menu.CPUFreq.80.build.f_cpu=80000000L
+esp32da.menu.CPUFreq.40=40MHz (40MHz XTAL)
+esp32da.menu.CPUFreq.40.build.f_cpu=40000000L
+esp32da.menu.CPUFreq.26=26MHz (26MHz XTAL)
+esp32da.menu.CPUFreq.26.build.f_cpu=26000000L
+esp32da.menu.CPUFreq.20=20MHz (40MHz XTAL)
+esp32da.menu.CPUFreq.20.build.f_cpu=20000000L
+esp32da.menu.CPUFreq.13=13MHz (26MHz XTAL)
+esp32da.menu.CPUFreq.13.build.f_cpu=13000000L
+esp32da.menu.CPUFreq.10=10MHz (40MHz XTAL)
+esp32da.menu.CPUFreq.10.build.f_cpu=10000000L
+
+esp32da.menu.FlashMode.qio=QIO
+esp32da.menu.FlashMode.qio.build.flash_mode=dio
+esp32da.menu.FlashMode.qio.build.boot=qio
+esp32da.menu.FlashMode.dio=DIO
+esp32da.menu.FlashMode.dio.build.flash_mode=dio
+esp32da.menu.FlashMode.dio.build.boot=dio
+esp32da.menu.FlashMode.qout=QOUT
+esp32da.menu.FlashMode.qout.build.flash_mode=dout
+esp32da.menu.FlashMode.qout.build.boot=qout
+esp32da.menu.FlashMode.dout=DOUT
+esp32da.menu.FlashMode.dout.build.flash_mode=dout
+esp32da.menu.FlashMode.dout.build.boot=dout
+
+esp32da.menu.FlashFreq.80=80MHz
+esp32da.menu.FlashFreq.80.build.flash_freq=80m
+esp32da.menu.FlashFreq.40=40MHz
+esp32da.menu.FlashFreq.40.build.flash_freq=40m
+
+esp32da.menu.FlashSize.4M=4MB (32Mb)
+esp32da.menu.FlashSize.4M.build.flash_size=4MB
+esp32da.menu.FlashSize.8M=8MB (64Mb)
+esp32da.menu.FlashSize.8M.build.flash_size=8MB
+esp32da.menu.FlashSize.8M.build.partitions=default_8MB
+esp32da.menu.FlashSize.16M=16MB (128Mb)
+esp32da.menu.FlashSize.16M.build.flash_size=16MB
+
+esp32da.menu.UploadSpeed.921600=921600
+esp32da.menu.UploadSpeed.921600.upload.speed=921600
+esp32da.menu.UploadSpeed.115200=115200
+esp32da.menu.UploadSpeed.115200.upload.speed=115200
+esp32da.menu.UploadSpeed.256000.windows=256000
+esp32da.menu.UploadSpeed.256000.upload.speed=256000
+esp32da.menu.UploadSpeed.230400.windows.upload.speed=256000
+esp32da.menu.UploadSpeed.230400=230400
+esp32da.menu.UploadSpeed.230400.upload.speed=230400
+esp32da.menu.UploadSpeed.460800.linux=460800
+esp32da.menu.UploadSpeed.460800.macosx=460800
+esp32da.menu.UploadSpeed.460800.upload.speed=460800
+esp32da.menu.UploadSpeed.512000.windows=512000
+esp32da.menu.UploadSpeed.512000.upload.speed=512000
+
+esp32da.menu.LoopCore.1=Core 1
+esp32da.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
+esp32da.menu.LoopCore.0=Core 0
+esp32da.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
+
+esp32da.menu.EventsCore.1=Core 1
+esp32da.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+esp32da.menu.EventsCore.0=Core 0
+esp32da.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
+
+esp32da.menu.DebugLevel.none=None
+esp32da.menu.DebugLevel.none.build.code_debug=0
+esp32da.menu.DebugLevel.error=Error
+esp32da.menu.DebugLevel.error.build.code_debug=1
+esp32da.menu.DebugLevel.warn=Warn
+esp32da.menu.DebugLevel.warn.build.code_debug=2
+esp32da.menu.DebugLevel.info=Info
+esp32da.menu.DebugLevel.info.build.code_debug=3
+esp32da.menu.DebugLevel.debug=Debug
+esp32da.menu.DebugLevel.debug.build.code_debug=4
+esp32da.menu.DebugLevel.verbose=Verbose
+esp32da.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
 esp32wrover.name=ESP32 Wrover Module
 
+esp32wrover.bootloader.tool=esptool_py
+esp32wrover.bootloader.tool.default=esptool_py
+
 esp32wrover.upload.tool=esptool_py
+esp32wrover.upload.tool.default=esptool_py
+esp32wrover.upload.tool.network=esp_ota
+
 esp32wrover.upload.maximum_size=1310720
 esp32wrover.upload.maximum_data_size=327680
 esp32wrover.upload.flags=
@@ -594,7 +990,13 @@ esp32wrover.menu.DebugLevel.verbose.build.code_debug=5
 
 pico32.name=ESP32 PICO-D4
 
+pico32.bootloader.tool=esptool_py
+pico32.bootloader.tool.default=esptool_py
+
 pico32.upload.tool=esptool_py
+pico32.upload.tool.default=esptool_py
+pico32.upload.tool.network=esp_ota
+
 pico32.upload.maximum_size=1310720
 pico32.upload.maximum_data_size=327680
 pico32.upload.flags=
@@ -658,11 +1060,352 @@ pico32.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
 
+esp32s3box.name=ESP32-S3-Box
+esp32s3box.vid.0=0x303a
+esp32s3box.pid.0=0x1001
+
+esp32s3box.bootloader.tool=esptool_py
+esp32s3box.bootloader.tool.default=esptool_py
+
+esp32s3box.upload.tool=esptool_py
+esp32s3box.upload.tool.default=esptool_py
+esp32s3box.upload.tool.network=esp_ota
+
+esp32s3box.upload.maximum_size=1310720
+esp32s3box.upload.maximum_data_size=327680
+esp32s3box.upload.speed=921600
+esp32s3box.upload.flags=
+esp32s3box.upload.extra_flags=
+esp32s3box.upload.use_1200bps_touch=false
+esp32s3box.upload.wait_for_upload_port=false
+
+esp32s3box.serial.disableDTR=false
+esp32s3box.serial.disableRTS=false
+
+esp32s3box.build.tarch=xtensa
+esp32s3box.build.bootloader_addr=0x0
+esp32s3box.build.target=esp32s3
+esp32s3box.build.mcu=esp32s3
+esp32s3box.build.core=esp32
+esp32s3box.build.variant=esp32s3box
+esp32s3box.build.board=ESP32_S3_BOX
+
+esp32s3box.build.usb_mode=1
+esp32s3box.build.cdc_on_boot=1
+esp32s3box.build.msc_on_boot=0
+esp32s3box.build.dfu_on_boot=0
+esp32s3box.build.f_cpu=240000000L
+esp32s3box.build.flash_size=16MB
+esp32s3box.build.flash_freq=80m
+esp32s3box.build.flash_mode=dio
+esp32s3box.build.boot=qio
+esp32s3box.build.partitions=default
+esp32s3box.build.defines=-DBOARD_HAS_PSRAM
+esp32s3box.build.memory_type=qspi_opi
+esp32s3box.build.loop_core=-DARDUINO_RUNNING_CORE=1
+esp32s3box.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+
+esp32s3box.menu.USBMode.hwcdc=Hardware CDC and JTAG
+esp32s3box.menu.USBMode.hwcdc.build.usb_mode=1
+esp32s3box.menu.USBMode.hwcdc.upload.use_1200bps_touch=false
+esp32s3box.menu.USBMode.hwcdc.upload.wait_for_upload_port=false
+esp32s3box.menu.USBMode.default=USB-OTG
+esp32s3box.menu.USBMode.default.build.usb_mode=0
+esp32s3box.menu.USBMode.default.upload.use_1200bps_touch=true
+esp32s3box.menu.USBMode.default.upload.wait_for_upload_port=true
+
+esp32s3box.menu.MSCOnBoot.default=Disabled
+esp32s3box.menu.MSCOnBoot.default.build.msc_on_boot=0
+esp32s3box.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
+esp32s3box.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+esp32s3box.menu.DFUOnBoot.default=Disabled
+esp32s3box.menu.DFUOnBoot.default.build.dfu_on_boot=0
+esp32s3box.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
+esp32s3box.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
+
+esp32s3box.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+esp32s3box.menu.PartitionScheme.default.build.partitions=default
+esp32s3box.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+esp32s3box.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+esp32s3box.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
+esp32s3box.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+esp32s3box.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+esp32s3box.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+esp32s3box.menu.PartitionScheme.no_ota.build.partitions=no_ota
+esp32s3box.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+esp32s3box.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+esp32s3box.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+esp32s3box.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+esp32s3box.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+esp32s3box.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+esp32s3box.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+esp32s3box.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+esp32s3box.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+esp32s3box.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+esp32s3box.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+esp32s3box.menu.PartitionScheme.huge_app.build.partitions=huge_app
+esp32s3box.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+esp32s3box.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+esp32s3box.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+esp32s3box.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+esp32s3box.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
+esp32s3box.menu.PartitionScheme.fatflash.build.partitions=ffat
+esp32s3box.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+esp32s3box.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
+esp32s3box.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+esp32s3box.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+
+esp32s3box.menu.DebugLevel.none=None
+esp32s3box.menu.DebugLevel.none.build.code_debug=0
+esp32s3box.menu.DebugLevel.error=Error
+esp32s3box.menu.DebugLevel.error.build.code_debug=1
+esp32s3box.menu.DebugLevel.warn=Warn
+esp32s3box.menu.DebugLevel.warn.build.code_debug=2
+esp32s3box.menu.DebugLevel.info=Info
+esp32s3box.menu.DebugLevel.info.build.code_debug=3
+esp32s3box.menu.DebugLevel.debug=Debug
+esp32s3box.menu.DebugLevel.debug.build.code_debug=4
+esp32s3box.menu.DebugLevel.verbose=Verbose
+esp32s3box.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
+esp32s3usbotg.name=ESP32-S3-USB-OTG
+esp32s3usbotg.vid.0=0x303a
+esp32s3usbotg.pid.0=0x1001
+
+esp32s3usbotg.bootloader.tool=esptool_py
+esp32s3usbotg.bootloader.tool.default=esptool_py
+
+esp32s3usbotg.upload.tool=esptool_py
+esp32s3usbotg.upload.tool.default=esptool_py
+esp32s3usbotg.upload.tool.network=esp_ota
+
+esp32s3usbotg.upload.maximum_size=1310720
+esp32s3usbotg.upload.maximum_data_size=327680
+esp32s3usbotg.upload.speed=921600
+esp32s3usbotg.upload.flags=
+esp32s3usbotg.upload.extra_flags=
+esp32s3usbotg.upload.use_1200bps_touch=false
+esp32s3usbotg.upload.wait_for_upload_port=false
+
+esp32s3usbotg.serial.disableDTR=false
+esp32s3usbotg.serial.disableRTS=false
+
+esp32s3usbotg.build.tarch=xtensa
+esp32s3usbotg.build.bootloader_addr=0x0
+esp32s3usbotg.build.target=esp32s3
+esp32s3usbotg.build.mcu=esp32s3
+esp32s3usbotg.build.core=esp32
+esp32s3usbotg.build.variant=esp32s3usbotg
+esp32s3usbotg.build.board=ESP32_S3_USB_OTG
+
+esp32s3usbotg.build.usb_mode=0
+esp32s3usbotg.build.cdc_on_boot=0
+esp32s3usbotg.build.msc_on_boot=0
+esp32s3usbotg.build.dfu_on_boot=0
+esp32s3usbotg.build.f_cpu=240000000L
+esp32s3usbotg.build.flash_size=8MB
+esp32s3usbotg.build.flash_freq=80m
+esp32s3usbotg.build.flash_mode=dio
+esp32s3usbotg.build.boot=qio
+esp32s3usbotg.build.partitions=default
+esp32s3usbotg.build.defines=
+esp32s3usbotg.build.memory_type=qspi_qspi
+esp32s3usbotg.build.loop_core=-DARDUINO_RUNNING_CORE=1
+esp32s3usbotg.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+
+esp32s3usbotg.menu.USBMode.default=USB-OTG
+esp32s3usbotg.menu.USBMode.default.build.usb_mode=0
+esp32s3usbotg.menu.USBMode.default.build.cdc_on_boot=0
+esp32s3usbotg.menu.USBMode.hwcdc=Hardware CDC and JTAG
+esp32s3usbotg.menu.USBMode.hwcdc.build.usb_mode=1
+esp32s3usbotg.menu.USBMode.hwcdc.build.cdc_on_boot=1
+
+esp32s3usbotg.menu.UploadMode.default=UART0 / Hardware CDC
+esp32s3usbotg.menu.UploadMode.default.upload.use_1200bps_touch=false
+esp32s3usbotg.menu.UploadMode.default.upload.wait_for_upload_port=false
+esp32s3usbotg.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
+esp32s3usbotg.menu.UploadMode.cdc.upload.use_1200bps_touch=true
+esp32s3usbotg.menu.UploadMode.cdc.upload.wait_for_upload_port=true
+
+esp32s3usbotg.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+esp32s3usbotg.menu.PartitionScheme.default.build.partitions=default
+esp32s3usbotg.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+esp32s3usbotg.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+esp32s3usbotg.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
+esp32s3usbotg.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+esp32s3usbotg.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+esp32s3usbotg.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+esp32s3usbotg.menu.PartitionScheme.no_ota.build.partitions=no_ota
+esp32s3usbotg.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+esp32s3usbotg.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+esp32s3usbotg.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+esp32s3usbotg.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+esp32s3usbotg.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+esp32s3usbotg.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+esp32s3usbotg.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+esp32s3usbotg.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+esp32s3usbotg.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+esp32s3usbotg.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+esp32s3usbotg.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+esp32s3usbotg.menu.PartitionScheme.huge_app.build.partitions=huge_app
+esp32s3usbotg.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+esp32s3usbotg.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+esp32s3usbotg.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+esp32s3usbotg.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+esp32s3usbotg.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
+esp32s3usbotg.menu.PartitionScheme.fatflash.build.partitions=ffat
+esp32s3usbotg.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+esp32s3usbotg.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
+esp32s3usbotg.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+esp32s3usbotg.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+
+esp32s3usbotg.menu.DebugLevel.none=None
+esp32s3usbotg.menu.DebugLevel.none.build.code_debug=0
+esp32s3usbotg.menu.DebugLevel.error=Error
+esp32s3usbotg.menu.DebugLevel.error.build.code_debug=1
+esp32s3usbotg.menu.DebugLevel.warn=Warn
+esp32s3usbotg.menu.DebugLevel.warn.build.code_debug=2
+esp32s3usbotg.menu.DebugLevel.info=Info
+esp32s3usbotg.menu.DebugLevel.info.build.code_debug=3
+esp32s3usbotg.menu.DebugLevel.debug=Debug
+esp32s3usbotg.menu.DebugLevel.debug.build.code_debug=4
+esp32s3usbotg.menu.DebugLevel.verbose=Verbose
+esp32s3usbotg.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
+esp32s3camlcd.name=ESP32S3 CAM LCD
+esp32s3camlcd.vid.0=0x303a
+esp32s3camlcd.pid.0=0x1001
+
+esp32s3camlcd.bootloader.tool=esptool_py
+esp32s3camlcd.bootloader.tool.default=esptool_py
+
+esp32s3camlcd.upload.tool=esptool_py
+esp32s3camlcd.upload.tool.default=esptool_py
+esp32s3camlcd.upload.tool.network=esp_ota
+
+esp32s3camlcd.upload.maximum_size=1310720
+esp32s3camlcd.upload.maximum_data_size=327680
+esp32s3camlcd.upload.flags=
+esp32s3camlcd.upload.extra_flags=
+esp32s3camlcd.upload.use_1200bps_touch=false
+esp32s3camlcd.upload.wait_for_upload_port=false
+
+esp32s3camlcd.serial.disableDTR=false
+esp32s3camlcd.serial.disableRTS=false
+
+esp32s3camlcd.build.tarch=xtensa
+esp32s3camlcd.build.bootloader_addr=0x0
+esp32s3camlcd.build.target=esp32s3
+esp32s3camlcd.build.mcu=esp32s3
+esp32s3camlcd.build.core=esp32
+esp32s3camlcd.build.variant=esp32s3camlcd
+esp32s3camlcd.build.board=ESP32S3_CAM_LCD
+
+esp32s3camlcd.build.usb_mode=1
+esp32s3camlcd.build.cdc_on_boot=0
+esp32s3camlcd.build.msc_on_boot=0
+esp32s3camlcd.build.dfu_on_boot=0
+esp32s3camlcd.build.f_cpu=240000000L
+esp32s3camlcd.build.flash_size=4MB
+esp32s3camlcd.build.flash_freq=80m
+esp32s3camlcd.build.flash_mode=dout
+esp32s3camlcd.build.boot=opi
+esp32s3camlcd.build.partitions=default
+esp32s3camlcd.build.defines=-DBOARD_HAS_PSRAM
+esp32s3camlcd.build.memory_type=opi_opi
+esp32s3camlcd.build.loop_core=
+esp32s3camlcd.build.event_core=
+
+esp32s3camlcd.menu.LoopCore.1=Core 1
+esp32s3camlcd.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
+esp32s3camlcd.menu.LoopCore.0=Core 0
+esp32s3camlcd.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
+
+esp32s3camlcd.menu.EventsCore.1=Core 1
+esp32s3camlcd.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+esp32s3camlcd.menu.EventsCore.0=Core 0
+esp32s3camlcd.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
+
+esp32s3camlcd.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+esp32s3camlcd.menu.PartitionScheme.default.build.partitions=default
+esp32s3camlcd.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+esp32s3camlcd.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+esp32s3camlcd.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
+esp32s3camlcd.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+esp32s3camlcd.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+esp32s3camlcd.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+esp32s3camlcd.menu.PartitionScheme.minimal.build.partitions=minimal
+esp32s3camlcd.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+esp32s3camlcd.menu.PartitionScheme.no_ota.build.partitions=no_ota
+esp32s3camlcd.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+esp32s3camlcd.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+esp32s3camlcd.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+esp32s3camlcd.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+esp32s3camlcd.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+esp32s3camlcd.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+esp32s3camlcd.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+esp32s3camlcd.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+esp32s3camlcd.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+esp32s3camlcd.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+esp32s3camlcd.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+esp32s3camlcd.menu.PartitionScheme.huge_app.build.partitions=huge_app
+esp32s3camlcd.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+esp32s3camlcd.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+esp32s3camlcd.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+esp32s3camlcd.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+esp32s3camlcd.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
+esp32s3camlcd.menu.PartitionScheme.fatflash.build.partitions=ffat
+esp32s3camlcd.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+esp32s3camlcd.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
+esp32s3camlcd.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+esp32s3camlcd.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+
+esp32s3camlcd.menu.UploadSpeed.921600=921600
+esp32s3camlcd.menu.UploadSpeed.921600.upload.speed=921600
+esp32s3camlcd.menu.UploadSpeed.115200=115200
+esp32s3camlcd.menu.UploadSpeed.115200.upload.speed=115200
+esp32s3camlcd.menu.UploadSpeed.256000.windows=256000
+esp32s3camlcd.menu.UploadSpeed.256000.upload.speed=256000
+esp32s3camlcd.menu.UploadSpeed.230400.windows.upload.speed=256000
+esp32s3camlcd.menu.UploadSpeed.230400=230400
+esp32s3camlcd.menu.UploadSpeed.230400.upload.speed=230400
+esp32s3camlcd.menu.UploadSpeed.460800.linux=460800
+esp32s3camlcd.menu.UploadSpeed.460800.macosx=460800
+esp32s3camlcd.menu.UploadSpeed.460800.upload.speed=460800
+esp32s3camlcd.menu.UploadSpeed.512000.windows=512000
+esp32s3camlcd.menu.UploadSpeed.512000.upload.speed=512000
+
+esp32s3camlcd.menu.DebugLevel.none=None
+esp32s3camlcd.menu.DebugLevel.none.build.code_debug=0
+esp32s3camlcd.menu.DebugLevel.error=Error
+esp32s3camlcd.menu.DebugLevel.error.build.code_debug=1
+esp32s3camlcd.menu.DebugLevel.warn=Warn
+esp32s3camlcd.menu.DebugLevel.warn.build.code_debug=2
+esp32s3camlcd.menu.DebugLevel.info=Info
+esp32s3camlcd.menu.DebugLevel.info.build.code_debug=3
+esp32s3camlcd.menu.DebugLevel.debug=Debug
+esp32s3camlcd.menu.DebugLevel.debug.build.code_debug=4
+esp32s3camlcd.menu.DebugLevel.verbose=Verbose
+esp32s3camlcd.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
 esp32s2usb.name=ESP32S2 Native USB
 esp32s2usb.vid.0=0x303a
 esp32s2usb.pid.0=0x0003
 
+esp32s2usb.bootloader.tool=esptool_py
+esp32s2usb.bootloader.tool.default=esptool_py
+
 esp32s2usb.upload.tool=esptool_py
+esp32s2usb.upload.tool.default=esptool_py
+esp32s2usb.upload.tool.network=esp_ota
+
 esp32s2usb.upload.maximum_size=1310720
 esp32s2usb.upload.maximum_data_size=327680
 esp32s2usb.upload.flags=
@@ -756,7 +1499,13 @@ esp32s2usb.menu.DebugLevel.verbose.build.code_debug=5
 ##############################################################
 
 esp32wroverkit.name=ESP32 Wrover Kit (all versions)
+esp32wroverkit.bootloader.tool=esptool_py
+esp32wroverkit.bootloader.tool.default=esptool_py
+
 esp32wroverkit.upload.tool=esptool_py
+esp32wroverkit.upload.tool.default=esptool_py
+esp32wroverkit.upload.tool.network=esp_ota
+
 esp32wroverkit.upload.maximum_size=1310720
 esp32wroverkit.upload.maximum_data_size=327680
 esp32wroverkit.upload.flags=
@@ -878,9 +1627,16 @@ esp32wroverkit.menu.DebugLevel.verbose=Verbose
 esp32wroverkit.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
+
 tinypico.name=UM TinyPICO
 
+tinypico.bootloader.tool=esptool_py
+tinypico.bootloader.tool.default=esptool_py
+
 tinypico.upload.tool=esptool_py
+tinypico.upload.tool.default=esptool_py
+tinypico.upload.tool.network=esp_ota
+
 tinypico.upload.maximum_size=1310720
 tinypico.upload.maximum_data_size=327680
 tinypico.upload.flags=
@@ -962,11 +1718,18 @@ tinypico.menu.DebugLevel.verbose=Verbose
 tinypico.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
+
 feathers2.name=UM FeatherS2
 feathers2.vid.0=0x239A
 feathers2.pid.0=0x80AB
 
+feathers2.bootloader.tool=esptool_py
+feathers2.bootloader.tool.default=esptool_py
+
 feathers2.upload.tool=esptool_py
+feathers2.upload.tool.default=esptool_py
+feathers2.upload.tool.network=esp_ota
+
 feathers2.upload.maximum_size=1310720
 feathers2.upload.maximum_data_size=327680
 feathers2.upload.flags=
@@ -1101,11 +1864,18 @@ feathers2.menu.DebugLevel.verbose=Verbose
 feathers2.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
+
 feathers2neo.name=UM FeatherS2 Neo
 feathers2neo.vid.0=0x303a
 feathers2neo.pid.0=0x80B4
 
+feathers2neo.bootloader.tool=esptool_py
+feathers2neo.bootloader.tool.default=esptool_py
+
 feathers2neo.upload.tool=esptool_py
+feathers2neo.upload.tool.default=esptool_py
+feathers2neo.upload.tool.network=esp_ota
+
 feathers2neo.upload.maximum_size=1310720
 feathers2neo.upload.maximum_data_size=327680
 feathers2neo.upload.flags=
@@ -1226,11 +1996,18 @@ feathers2neo.menu.DebugLevel.verbose=Verbose
 feathers2neo.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
+
 tinys2.name=UM TinyS2
 tinys2.vid.0=0x303a
 tinys2.pid.0=0x8001
 
+tinys2.bootloader.tool=esptool_py
+tinys2.bootloader.tool.default=esptool_py
+
 tinys2.upload.tool=esptool_py
+tinys2.upload.tool.default=esptool_py
+tinys2.upload.tool.network=esp_ota
+
 tinys2.upload.maximum_size=1310720
 tinys2.upload.maximum_data_size=327680
 tinys2.upload.flags=
@@ -1351,9 +2128,599 @@ tinys2.menu.DebugLevel.verbose=Verbose
 tinys2.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
+rmp.name=UM RMP
+rmp.vid.0=0x303a
+rmp.pid.0=0x80F6
+
+rmp.upload.tool=esptool_py
+rmp.upload.maximum_size=1310720
+rmp.upload.maximum_data_size=327680
+rmp.upload.flags=
+rmp.upload.extra_flags=
+rmp.upload.use_1200bps_touch=true
+rmp.upload.wait_for_upload_port=true
+
+rmp.serial.disableDTR=false
+rmp.serial.disableRTS=false
+
+rmp.build.tarch=xtensa
+rmp.build.bootloader_addr=0x1000
+rmp.build.target=esp32s2
+rmp.build.mcu=esp32s2
+rmp.build.core=esp32
+rmp.build.variant=um_rmp
+rmp.build.board=RMP
+
+rmp.build.cdc_on_boot=1
+rmp.build.msc_on_boot=0
+rmp.build.dfu_on_boot=0
+rmp.build.f_cpu=240000000L
+rmp.build.flash_size=4MB
+rmp.build.flash_freq=80m
+rmp.build.flash_mode=dio
+rmp.build.boot=qio
+rmp.build.partitions=default
+rmp.build.defines=
+
+rmp.menu.CDCOnBoot.cdc=Enabled
+rmp.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
+rmp.menu.CDCOnBoot.default=Disabled
+rmp.menu.CDCOnBoot.default.build.cdc_on_boot=0
+
+rmp.menu.MSCOnBoot.default=Disabled
+rmp.menu.MSCOnBoot.default.build.msc_on_boot=0
+rmp.menu.MSCOnBoot.msc=Enabled
+rmp.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+rmp.menu.DFUOnBoot.default=Disabled
+rmp.menu.DFUOnBoot.default.build.dfu_on_boot=0
+rmp.menu.DFUOnBoot.dfu=Enabled
+rmp.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
+
+rmp.menu.PSRAM.enabled=Enabled
+rmp.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
+rmp.menu.PSRAM.disabled=Disabled
+rmp.menu.PSRAM.disabled.build.defines=
+
+rmp.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+rmp.menu.PartitionScheme.default.build.partitions=default
+rmp.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+rmp.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+rmp.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+rmp.menu.PartitionScheme.minimal.build.partitions=minimal
+rmp.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+rmp.menu.PartitionScheme.no_ota.build.partitions=no_ota
+rmp.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+rmp.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+rmp.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+rmp.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+rmp.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+rmp.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+rmp.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+rmp.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+rmp.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+rmp.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+rmp.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+rmp.menu.PartitionScheme.huge_app.build.partitions=huge_app
+rmp.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+rmp.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+rmp.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+rmp.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+
+rmp.menu.CPUFreq.240=240MHz (WiFi)
+rmp.menu.CPUFreq.240.build.f_cpu=240000000L
+rmp.menu.CPUFreq.160=160MHz (WiFi)
+rmp.menu.CPUFreq.160.build.f_cpu=160000000L
+rmp.menu.CPUFreq.80=80MHz (WiFi)
+rmp.menu.CPUFreq.80.build.f_cpu=80000000L
+rmp.menu.CPUFreq.40=40MHz
+rmp.menu.CPUFreq.40.build.f_cpu=40000000L
+rmp.menu.CPUFreq.20=20MHz
+rmp.menu.CPUFreq.20.build.f_cpu=20000000L
+rmp.menu.CPUFreq.10=10MHz
+rmp.menu.CPUFreq.10.build.f_cpu=10000000L
+
+rmp.menu.FlashSize.4M=4MB (32Mb)
+rmp.menu.FlashSize.4M.build.flash_size=4MB
+rmp.menu.FlashSize.2M=2MB (16Mb)
+rmp.menu.FlashSize.2M.build.flash_size=2MB
+rmp.menu.FlashSize.2M.build.partitions=minimal
+
+rmp.menu.UploadSpeed.921600=921600
+rmp.menu.UploadSpeed.921600.upload.speed=921600
+rmp.menu.UploadSpeed.115200=115200
+rmp.menu.UploadSpeed.115200.upload.speed=115200
+rmp.menu.UploadSpeed.256000.windows=256000
+rmp.menu.UploadSpeed.256000.upload.speed=256000
+rmp.menu.UploadSpeed.230400.windows.upload.speed=256000
+rmp.menu.UploadSpeed.230400=230400
+rmp.menu.UploadSpeed.230400.upload.speed=230400
+rmp.menu.UploadSpeed.460800.linux=460800
+rmp.menu.UploadSpeed.460800.macosx=460800
+rmp.menu.UploadSpeed.460800.upload.speed=460800
+
+rmp.menu.DebugLevel.none=None
+rmp.menu.DebugLevel.none.build.code_debug=0
+rmp.menu.DebugLevel.error=Error
+rmp.menu.DebugLevel.error.build.code_debug=1
+rmp.menu.DebugLevel.warn=Warn
+rmp.menu.DebugLevel.warn.build.code_debug=2
+rmp.menu.DebugLevel.info=Info
+rmp.menu.DebugLevel.info.build.code_debug=3
+rmp.menu.DebugLevel.debug=Debug
+rmp.menu.DebugLevel.debug.build.code_debug=4
+rmp.menu.DebugLevel.verbose=Verbose
+rmp.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+tinys3.name=UM TinyS3
+tinys3.vid.0=0x303a
+tinys3.pid.0=0x80D0
+
+tinys3.bootloader.tool=esptool_py
+tinys3.bootloader.tool.default=esptool_py
+
+tinys3.upload.tool=esptool_py
+tinys3.upload.tool.default=esptool_py
+tinys3.upload.tool.network=esp_ota
+
+tinys3.upload.maximum_size=1310720
+tinys3.upload.maximum_data_size=327680
+tinys3.upload.flags=
+tinys3.upload.extra_flags=
+tinys3.upload.use_1200bps_touch=false
+tinys3.upload.wait_for_upload_port=false
+
+tinys3.serial.disableDTR=false
+tinys3.serial.disableRTS=false
+
+tinys3.build.tarch=xtensa
+tinys3.build.bootloader_addr=0x0
+tinys3.build.target=esp32s3
+tinys3.build.mcu=esp32s3
+tinys3.build.core=esp32
+tinys3.build.variant=um_tinys3
+tinys3.build.board=TINYS3
+
+tinys3.build.usb_mode=1
+tinys3.build.cdc_on_boot=0
+tinys3.build.msc_on_boot=0
+tinys3.build.dfu_on_boot=0
+tinys3.build.f_cpu=240000000L
+tinys3.build.flash_size=8MB
+tinys3.build.flash_freq=80m
+tinys3.build.flash_mode=dio
+tinys3.build.boot=qio
+tinys3.build.partitions=default
+tinys3.build.defines=
+tinys3.build.loop_core=
+tinys3.build.event_core=
+tinys3.build.flash_type=qspi
+tinys3.build.psram_type=qspi
+tinys3.build.memory_type=qspi_qspi
+
+tinys3.menu.LoopCore.1=Core 1
+tinys3.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
+tinys3.menu.LoopCore.0=Core 0
+tinys3.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
+
+tinys3.menu.EventsCore.1=Core 1
+tinys3.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+tinys3.menu.EventsCore.0=Core 0
+tinys3.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
+
+tinys3.menu.USBMode.default=USB-OTG (TinyUSB)
+tinys3.menu.USBMode.default.build.usb_mode=0
+tinys3.menu.USBMode.hwcdc=Hardware CDC and JTAG
+tinys3.menu.USBMode.hwcdc.build.usb_mode=1
+
+tinys3.menu.CDCOnBoot.cdc=Enabled
+tinys3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
+tinys3.menu.CDCOnBoot.default=Disabled
+tinys3.menu.CDCOnBoot.default.build.cdc_on_boot=0
+
+tinys3.menu.MSCOnBoot.default=Disabled
+tinys3.menu.MSCOnBoot.default.build.msc_on_boot=0
+tinys3.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
+tinys3.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+tinys3.menu.DFUOnBoot.default=Disabled
+tinys3.menu.DFUOnBoot.default.build.dfu_on_boot=0
+tinys3.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
+tinys3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
+
+tinys3.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
+tinys3.menu.UploadMode.cdc.upload.use_1200bps_touch=true
+tinys3.menu.UploadMode.cdc.upload.wait_for_upload_port=true
+tinys3.menu.UploadMode.default=UART0 / Hardware CDC
+tinys3.menu.UploadMode.default.upload.use_1200bps_touch=false
+tinys3.menu.UploadMode.default.upload.wait_for_upload_port=false
+
+tinys3.menu.PSRAM.enabled=Enabled
+tinys3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
+tinys3.menu.PSRAM.disabled=Disabled
+tinys3.menu.PSRAM.disabled.build.defines=
+
+tinys3.menu.PartitionScheme.default_8MB=Default (3MB APP/1.5MB SPIFFS)
+tinys3.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+tinys3.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+tinys3.menu.PartitionScheme.tinyuf2=TinyUF2 Compatibility (2MB APP/3.7MB FFAT)
+tinys3.menu.PartitionScheme.tinyuf2.build.custom_bootloader=bootloader_tinyuf2
+tinys3.menu.PartitionScheme.tinyuf2.build.custom_partitions=partitions_tinyuf2
+tinys3.menu.PartitionScheme.tinyuf2.upload.extra_flags=0x410000 "{runtime.platform.path}/variants/{build.variant}/tinyuf2.bin"
+tinys3.menu.PartitionScheme.tinyuf2.upload.maximum_size=2097152
+
+tinys3.menu.CPUFreq.240=240MHz (WiFi)
+tinys3.menu.CPUFreq.240.build.f_cpu=240000000L
+tinys3.menu.CPUFreq.160=160MHz (WiFi)
+tinys3.menu.CPUFreq.160.build.f_cpu=160000000L
+tinys3.menu.CPUFreq.80=80MHz (WiFi)
+tinys3.menu.CPUFreq.80.build.f_cpu=80000000L
+tinys3.menu.CPUFreq.40=40MHz
+tinys3.menu.CPUFreq.40.build.f_cpu=40000000L
+tinys3.menu.CPUFreq.20=20MHz
+tinys3.menu.CPUFreq.20.build.f_cpu=20000000L
+tinys3.menu.CPUFreq.10=10MHz
+tinys3.menu.CPUFreq.10.build.f_cpu=10000000L
+
+tinys3.menu.FlashMode.qio=QIO
+tinys3.menu.FlashMode.qio.build.flash_mode=dio
+tinys3.menu.FlashMode.qio.build.boot=qio
+tinys3.menu.FlashMode.dio=DIO
+tinys3.menu.FlashMode.dio.build.flash_mode=dio
+tinys3.menu.FlashMode.dio.build.boot=dio
+
+tinys3.menu.UploadSpeed.921600=921600
+tinys3.menu.UploadSpeed.921600.upload.speed=921600
+tinys3.menu.UploadSpeed.115200=115200
+tinys3.menu.UploadSpeed.115200.upload.speed=115200
+tinys3.menu.UploadSpeed.256000.windows=256000
+tinys3.menu.UploadSpeed.256000.upload.speed=256000
+tinys3.menu.UploadSpeed.230400.windows.upload.speed=256000
+tinys3.menu.UploadSpeed.230400=230400
+tinys3.menu.UploadSpeed.230400.upload.speed=230400
+tinys3.menu.UploadSpeed.460800.linux=460800
+tinys3.menu.UploadSpeed.460800.macosx=460800
+tinys3.menu.UploadSpeed.460800.upload.speed=460800
+tinys3.menu.UploadSpeed.512000.windows=512000
+tinys3.menu.UploadSpeed.512000.upload.speed=512000
+
+tinys3.menu.DebugLevel.none=None
+tinys3.menu.DebugLevel.none.build.code_debug=0
+tinys3.menu.DebugLevel.error=Error
+tinys3.menu.DebugLevel.error.build.code_debug=1
+tinys3.menu.DebugLevel.warn=Warn
+tinys3.menu.DebugLevel.warn.build.code_debug=2
+tinys3.menu.DebugLevel.info=Info
+tinys3.menu.DebugLevel.info.build.code_debug=3
+tinys3.menu.DebugLevel.debug=Debug
+tinys3.menu.DebugLevel.debug.build.code_debug=4
+tinys3.menu.DebugLevel.verbose=Verbose
+tinys3.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
+pros3.name=UM PROS3
+pros3.vid.0=0x303a
+pros3.pid.0=0x80D3
+
+pros3.bootloader.tool=esptool_py
+pros3.bootloader.tool.default=esptool_py
+
+pros3.upload.tool=esptool_py
+pros3.upload.tool.default=esptool_py
+pros3.upload.tool.network=esp_ota
+
+pros3.upload.maximum_size=1310720
+pros3.upload.maximum_data_size=327680
+pros3.upload.flags=
+pros3.upload.extra_flags=
+pros3.upload.use_1200bps_touch=false
+pros3.upload.wait_for_upload_port=false
+
+pros3.serial.disableDTR=false
+pros3.serial.disableRTS=false
+
+pros3.build.tarch=xtensa
+pros3.build.bootloader_addr=0x0
+pros3.build.target=esp32s3
+pros3.build.mcu=esp32s3
+pros3.build.core=esp32
+pros3.build.variant=um_pros3
+pros3.build.board=PROS3
+
+pros3.build.usb_mode=1
+pros3.build.cdc_on_boot=0
+pros3.build.msc_on_boot=0
+pros3.build.dfu_on_boot=0
+pros3.build.f_cpu=240000000L
+pros3.build.flash_size=16MB
+pros3.build.flash_freq=80m
+pros3.build.flash_mode=dio
+pros3.build.boot=qio
+pros3.build.partitions=default
+pros3.build.defines=
+pros3.build.loop_core=
+pros3.build.event_core=
+pros3.build.flash_type=qspi
+pros3.build.psram_type=qspi
+pros3.build.memory_type=qspi_qspi
+
+pros3.menu.LoopCore.1=Core 1
+pros3.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
+pros3.menu.LoopCore.0=Core 0
+pros3.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
+
+pros3.menu.EventsCore.1=Core 1
+pros3.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+pros3.menu.EventsCore.0=Core 0
+pros3.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
+
+pros3.menu.USBMode.default=USB-OTG (TinyUSB)
+pros3.menu.USBMode.default.build.usb_mode=0
+pros3.menu.USBMode.hwcdc=Hardware CDC and JTAG
+pros3.menu.USBMode.hwcdc.build.usb_mode=1
+
+pros3.menu.CDCOnBoot.cdc=Enabled
+pros3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
+pros3.menu.CDCOnBoot.default=Disabled
+pros3.menu.CDCOnBoot.default.build.cdc_on_boot=0
+
+pros3.menu.MSCOnBoot.default=Disabled
+pros3.menu.MSCOnBoot.default.build.msc_on_boot=0
+pros3.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
+pros3.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+pros3.menu.DFUOnBoot.default=Disabled
+pros3.menu.DFUOnBoot.default.build.dfu_on_boot=0
+pros3.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
+pros3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
+
+pros3.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
+pros3.menu.UploadMode.cdc.upload.use_1200bps_touch=true
+pros3.menu.UploadMode.cdc.upload.wait_for_upload_port=true
+pros3.menu.UploadMode.default=UART0 / Hardware CDC
+pros3.menu.UploadMode.default.upload.use_1200bps_touch=false
+pros3.menu.UploadMode.default.upload.wait_for_upload_port=false
+
+pros3.menu.PSRAM.enabled=Enabled
+pros3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
+pros3.menu.PSRAM.disabled=Disabled
+pros3.menu.PSRAM.disabled.build.defines=
+
+pros3.menu.PartitionScheme.default_16MB=Default (6.25MB APP/3.43MB SPIFFS)
+pros3.menu.PartitionScheme.default_16MB.build.partitions=default_16MB
+pros3.menu.PartitionScheme.default_16MB.upload.maximum_size=6553600
+pros3.menu.PartitionScheme.tinyuf2=TinyUF2 Compatibility (2MB APP/12MB FFAT)
+pros3.menu.PartitionScheme.tinyuf2.build.custom_bootloader=bootloader_tinyuf2
+pros3.menu.PartitionScheme.tinyuf2.build.custom_partitions=partitions_tinyuf2
+pros3.menu.PartitionScheme.tinyuf2.upload.extra_flags=0x410000 "{runtime.platform.path}/variants/{build.variant}/tinyuf2.bin"
+pros3.menu.PartitionScheme.tinyuf2.upload.maximum_size=2097152
+pros3.menu.PartitionScheme.large_spiffs=Large SPIFFS (4.5MB APP/6.93MB SPIFFS)
+pros3.menu.PartitionScheme.large_spiffs.build.partitions=large_spiffs_16MB
+pros3.menu.PartitionScheme.large_spiffs.upload.maximum_size=4718592
+pros3.menu.PartitionScheme.app3M_fat9M_16MB=FFAT (3MB APP/9MB FATFS)
+pros3.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+pros3.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+pros3.menu.PartitionScheme.fatflash=Large FFAT (2MB APP/12.5MB FATFS)
+pros3.menu.PartitionScheme.fatflash.build.partitions=ffat
+pros3.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+
+pros3.menu.CPUFreq.240=240MHz (WiFi)
+pros3.menu.CPUFreq.240.build.f_cpu=240000000L
+pros3.menu.CPUFreq.160=160MHz (WiFi)
+pros3.menu.CPUFreq.160.build.f_cpu=160000000L
+pros3.menu.CPUFreq.80=80MHz (WiFi)
+pros3.menu.CPUFreq.80.build.f_cpu=80000000L
+pros3.menu.CPUFreq.40=40MHz
+pros3.menu.CPUFreq.40.build.f_cpu=40000000L
+pros3.menu.CPUFreq.20=20MHz
+pros3.menu.CPUFreq.20.build.f_cpu=20000000L
+pros3.menu.CPUFreq.10=10MHz
+pros3.menu.CPUFreq.10.build.f_cpu=10000000L
+
+pros3.menu.FlashMode.qio=QIO
+pros3.menu.FlashMode.qio.build.flash_mode=dio
+pros3.menu.FlashMode.qio.build.boot=qio
+pros3.menu.FlashMode.dio=DIO
+pros3.menu.FlashMode.dio.build.flash_mode=dio
+pros3.menu.FlashMode.dio.build.boot=dio
+
+pros3.menu.UploadSpeed.921600=921600
+pros3.menu.UploadSpeed.921600.upload.speed=921600
+pros3.menu.UploadSpeed.115200=115200
+pros3.menu.UploadSpeed.115200.upload.speed=115200
+pros3.menu.UploadSpeed.256000.windows=256000
+pros3.menu.UploadSpeed.256000.upload.speed=256000
+pros3.menu.UploadSpeed.230400.windows.upload.speed=256000
+pros3.menu.UploadSpeed.230400=230400
+pros3.menu.UploadSpeed.230400.upload.speed=230400
+pros3.menu.UploadSpeed.460800.linux=460800
+pros3.menu.UploadSpeed.460800.macosx=460800
+pros3.menu.UploadSpeed.460800.upload.speed=460800
+pros3.menu.UploadSpeed.512000.windows=512000
+pros3.menu.UploadSpeed.512000.upload.speed=512000
+
+pros3.menu.DebugLevel.none=None
+pros3.menu.DebugLevel.none.build.code_debug=0
+pros3.menu.DebugLevel.error=Error
+pros3.menu.DebugLevel.error.build.code_debug=1
+pros3.menu.DebugLevel.warn=Warn
+pros3.menu.DebugLevel.warn.build.code_debug=2
+pros3.menu.DebugLevel.info=Info
+pros3.menu.DebugLevel.info.build.code_debug=3
+pros3.menu.DebugLevel.debug=Debug
+pros3.menu.DebugLevel.debug.build.code_debug=4
+pros3.menu.DebugLevel.verbose=Verbose
+pros3.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
+feathers3.name=UM FeatherS3
+feathers3.vid.0=0x303a
+feathers3.pid.0=0x80D6
+
+feathers3.bootloader.tool=esptool_py
+feathers3.bootloader.tool.default=esptool_py
+
+feathers3.upload.tool=esptool_py
+feathers3.upload.tool.default=esptool_py
+feathers3.upload.tool.network=esp_ota
+
+feathers3.upload.maximum_size=1310720
+feathers3.upload.maximum_data_size=327680
+feathers3.upload.flags=
+feathers3.upload.extra_flags=
+feathers3.upload.use_1200bps_touch=false
+feathers3.upload.wait_for_upload_port=false
+
+feathers3.serial.disableDTR=false
+feathers3.serial.disableRTS=false
+
+feathers3.build.tarch=xtensa
+feathers3.build.bootloader_addr=0x0
+feathers3.build.target=esp32s3
+feathers3.build.mcu=esp32s3
+feathers3.build.core=esp32
+feathers3.build.variant=um_feathers3
+feathers3.build.board=FEATHERS3
+
+feathers3.build.usb_mode=1
+feathers3.build.cdc_on_boot=0
+feathers3.build.msc_on_boot=0
+feathers3.build.dfu_on_boot=0
+feathers3.build.f_cpu=240000000L
+feathers3.build.flash_size=16MB
+feathers3.build.flash_freq=80m
+feathers3.build.flash_mode=dio
+feathers3.build.boot=qio
+feathers3.build.partitions=default
+feathers3.build.defines=
+feathers3.build.loop_core=
+feathers3.build.event_core=
+feathers3.build.flash_type=qspi
+feathers3.build.psram_type=qspi
+feathers3.build.memory_type=qspi_qspi
+
+feathers3.menu.LoopCore.1=Core 1
+feathers3.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
+feathers3.menu.LoopCore.0=Core 0
+feathers3.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
+
+feathers3.menu.EventsCore.1=Core 1
+feathers3.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+feathers3.menu.EventsCore.0=Core 0
+feathers3.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
+
+feathers3.menu.USBMode.default=USB-OTG (TinyUSB)
+feathers3.menu.USBMode.default.build.usb_mode=0
+feathers3.menu.USBMode.hwcdc=Hardware CDC and JTAG
+feathers3.menu.USBMode.hwcdc.build.usb_mode=1
+
+feathers3.menu.CDCOnBoot.cdc=Enabled
+feathers3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
+feathers3.menu.CDCOnBoot.default=Disabled
+feathers3.menu.CDCOnBoot.default.build.cdc_on_boot=0
+
+feathers3.menu.MSCOnBoot.default=Disabled
+feathers3.menu.MSCOnBoot.default.build.msc_on_boot=0
+feathers3.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
+feathers3.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+feathers3.menu.DFUOnBoot.default=Disabled
+feathers3.menu.DFUOnBoot.default.build.dfu_on_boot=0
+feathers3.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
+feathers3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
+
+feathers3.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
+feathers3.menu.UploadMode.cdc.upload.use_1200bps_touch=true
+feathers3.menu.UploadMode.cdc.upload.wait_for_upload_port=true
+feathers3.menu.UploadMode.default=UART0 / Hardware CDC
+feathers3.menu.UploadMode.default.upload.use_1200bps_touch=false
+feathers3.menu.UploadMode.default.upload.wait_for_upload_port=false
+
+feathers3.menu.PSRAM.enabled=Enabled
+feathers3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
+feathers3.menu.PSRAM.disabled=Disabled
+feathers3.menu.PSRAM.disabled.build.defines=
+
+feathers3.menu.PartitionScheme.default_16MB=Default (6.25MB APP/3.43MB SPIFFS)
+feathers3.menu.PartitionScheme.default_16MB.build.partitions=default_16MB
+feathers3.menu.PartitionScheme.default_16MB.upload.maximum_size=6553600
+feathers3.menu.PartitionScheme.tinyuf2=TinyUF2 Compatibility (2MB APP/12MB FFAT)
+feathers3.menu.PartitionScheme.tinyuf2.build.custom_bootloader=bootloader_tinyuf2
+feathers3.menu.PartitionScheme.tinyuf2.build.custom_partitions=partitions_tinyuf2
+feathers3.menu.PartitionScheme.tinyuf2.upload.extra_flags=0x410000 "{runtime.platform.path}/variants/{build.variant}/tinyuf2.bin"
+feathers3.menu.PartitionScheme.tinyuf2.upload.maximum_size=2097152
+feathers3.menu.PartitionScheme.large_spiffs=Large SPIFFS (4.5MB APP/6.93MB SPIFFS)
+feathers3.menu.PartitionScheme.large_spiffs.build.partitions=large_spiffs_16MB
+feathers3.menu.PartitionScheme.large_spiffs.upload.maximum_size=4718592
+feathers3.menu.PartitionScheme.app3M_fat9M_16MB=FFAT (3MB APP/9MB FATFS)
+feathers3.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+feathers3.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+feathers3.menu.PartitionScheme.fatflash=Large FFAT (2MB APP/12.5MB FATFS)
+feathers3.menu.PartitionScheme.fatflash.build.partitions=ffat
+feathers3.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+
+feathers3.menu.CPUFreq.240=240MHz (WiFi)
+feathers3.menu.CPUFreq.240.build.f_cpu=240000000L
+feathers3.menu.CPUFreq.160=160MHz (WiFi)
+feathers3.menu.CPUFreq.160.build.f_cpu=160000000L
+feathers3.menu.CPUFreq.80=80MHz (WiFi)
+feathers3.menu.CPUFreq.80.build.f_cpu=80000000L
+feathers3.menu.CPUFreq.40=40MHz
+feathers3.menu.CPUFreq.40.build.f_cpu=40000000L
+feathers3.menu.CPUFreq.20=20MHz
+feathers3.menu.CPUFreq.20.build.f_cpu=20000000L
+feathers3.menu.CPUFreq.10=10MHz
+feathers3.menu.CPUFreq.10.build.f_cpu=10000000L
+
+feathers3.menu.FlashMode.qio=QIO
+feathers3.menu.FlashMode.qio.build.flash_mode=dio
+feathers3.menu.FlashMode.qio.build.boot=qio
+feathers3.menu.FlashMode.dio=DIO
+feathers3.menu.FlashMode.dio.build.flash_mode=dio
+feathers3.menu.FlashMode.dio.build.boot=dio
+
+feathers3.menu.UploadSpeed.921600=921600
+feathers3.menu.UploadSpeed.921600.upload.speed=921600
+feathers3.menu.UploadSpeed.115200=115200
+feathers3.menu.UploadSpeed.115200.upload.speed=115200
+feathers3.menu.UploadSpeed.256000.windows=256000
+feathers3.menu.UploadSpeed.256000.upload.speed=256000
+feathers3.menu.UploadSpeed.230400.windows.upload.speed=256000
+feathers3.menu.UploadSpeed.230400=230400
+feathers3.menu.UploadSpeed.230400.upload.speed=230400
+feathers3.menu.UploadSpeed.460800.linux=460800
+feathers3.menu.UploadSpeed.460800.macosx=460800
+feathers3.menu.UploadSpeed.460800.upload.speed=460800
+feathers3.menu.UploadSpeed.512000.windows=512000
+feathers3.menu.UploadSpeed.512000.upload.speed=512000
+
+feathers3.menu.DebugLevel.none=None
+feathers3.menu.DebugLevel.none.build.code_debug=0
+feathers3.menu.DebugLevel.error=Error
+feathers3.menu.DebugLevel.error.build.code_debug=1
+feathers3.menu.DebugLevel.warn=Warn
+feathers3.menu.DebugLevel.warn.build.code_debug=2
+feathers3.menu.DebugLevel.info=Info
+feathers3.menu.DebugLevel.info.build.code_debug=3
+feathers3.menu.DebugLevel.debug=Debug
+feathers3.menu.DebugLevel.debug.build.code_debug=4
+feathers3.menu.DebugLevel.verbose=Verbose
+feathers3.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
 S_ODI_Ultra.name=S.ODI Ultra v1
 
+S_ODI_Ultra.bootloader.tool=esptool_py
+S_ODI_Ultra.bootloader.tool.default=esptool_py
+
 S_ODI_Ultra.upload.tool=esptool_py
+S_ODI_Ultra.upload.tool.default=esptool_py
+S_ODI_Ultra.upload.tool.network=esp_ota
+
 S_ODI_Ultra.upload.maximum_size=1310720
 S_ODI_Ultra.upload.maximum_data_size=327680
 S_ODI_Ultra.upload.wait_for_upload_port=true
@@ -1415,7 +2782,13 @@ micros2.name=microS2
 micros2.vid.0=0x239A
 micros2.pid.0=0x80C5
 
+micros2.bootloader.tool=esptool_py
+micros2.bootloader.tool.default=esptool_py
+
 micros2.upload.tool=esptool_py
+micros2.upload.tool.default=esptool_py
+micros2.upload.tool.network=esp_ota
+
 micros2.upload.maximum_size=1310720
 micros2.upload.maximum_data_size=327680
 micros2.upload.flags=
@@ -1550,9 +2923,16 @@ micros2.menu.DebugLevel.verbose=Verbose
 micros2.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
+
 magicbit.name=MagicBit
 
+magicbit.bootloader.tool=esptool_py
+magicbit.bootloader.tool.default=esptool_py
+
 magicbit.upload.tool=esptool_py
+magicbit.upload.tool.default=esptool_py
+magicbit.upload.tool.network=esp_ota
+
 magicbit.upload.maximum_size=1310720
 magicbit.upload.maximum_data_size=327680
 magicbit.upload.flags=
@@ -1588,10 +2968,31 @@ magicbit.menu.UploadSpeed.921600=921600
 magicbit.menu.UploadSpeed.921600.upload.speed=921600
 magicbit.menu.UploadSpeed.115200=115200
 magicbit.menu.UploadSpeed.115200.upload.speed=115200
+
+magicbit.menu.DebugLevel.none=None
+magicbit.menu.DebugLevel.none.build.code_debug=0
+magicbit.menu.DebugLevel.error=Error
+magicbit.menu.DebugLevel.error.build.code_debug=1
+magicbit.menu.DebugLevel.warn=Warn
+magicbit.menu.DebugLevel.warn.build.code_debug=2
+magicbit.menu.DebugLevel.info=Info
+magicbit.menu.DebugLevel.info.build.code_debug=3
+magicbit.menu.DebugLevel.debug=Debug
+magicbit.menu.DebugLevel.debug.build.code_debug=4
+magicbit.menu.DebugLevel.verbose=Verbose
+magicbit.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
+
 turta_iot_node.name=Turta IoT Node
 
+turta_iot_node.bootloader.tool=esptool_py
+turta_iot_node.bootloader.tool.default=esptool_py
+
 turta_iot_node.upload.tool=esptool_py
+turta_iot_node.upload.tool.default=esptool_py
+turta_iot_node.upload.tool.network=esp_ota
+
 turta_iot_node.upload.maximum_size=1310720
 turta_iot_node.upload.maximum_data_size=327680
 turta_iot_node.upload.flags=
@@ -1636,10 +3037,15 @@ turta_iot_node.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
 
-
 ttgo-lora32.name=TTGO LoRa32-OLED
 
+ttgo-lora32.bootloader.tool=esptool_py
+ttgo-lora32.bootloader.tool.default=esptool_py
+
 ttgo-lora32.upload.tool=esptool_py
+ttgo-lora32.upload.tool.default=esptool_py
+ttgo-lora32.upload.tool.network=esp_ota
+
 ttgo-lora32.upload.maximum_size=1310720
 ttgo-lora32.upload.maximum_data_size=294912
 ttgo-lora32.upload.flags=
@@ -1706,12 +3112,17 @@ ttgo-lora32.menu.DebugLevel.debug.build.code_debug=4
 ttgo-lora32.menu.DebugLevel.verbose=Verbose
 ttgo-lora32.menu.DebugLevel.verbose.build.code_debug=5
 
-
 ##############################################################
 
 ttgo-t1.name=TTGO T1
 
+ttgo-t1.bootloader.tool=esptool_py
+ttgo-t1.bootloader.tool.default=esptool_py
+
 ttgo-t1.upload.tool=esptool_py
+ttgo-t1.upload.tool.default=esptool_py
+ttgo-t1.upload.tool.network=esp_ota
+
 ttgo-t1.upload.maximum_size=1310720
 ttgo-t1.upload.maximum_data_size=327680
 ttgo-t1.upload.flags=
@@ -1837,7 +3248,13 @@ ttgo-t1.menu.DebugLevel.verbose.build.code_debug=5
 
 ttgo-t7-v13-mini32.name=TTGO T7 V1.3 Mini32
 
+ttgo-t7-v13-mini32.bootloader.tool=esptool_py
+ttgo-t7-v13-mini32.bootloader.tool.default=esptool_py
+
 ttgo-t7-v13-mini32.upload.tool=esptool_py
+ttgo-t7-v13-mini32.upload.tool.default=esptool_py
+ttgo-t7-v13-mini32.upload.tool.network=esp_ota
+
 ttgo-t7-v13-mini32.upload.maximum_size=1310720
 ttgo-t7-v13-mini32.upload.maximum_data_size=327680
 ttgo-t7-v13-mini32.upload.wait_for_upload_port=true
@@ -1958,7 +3375,13 @@ ttgo-t7-v13-mini32.menu.DebugLevel.verbose.build.code_debug=5
 
 ttgo-t7-v14-mini32.name=TTGO T7 V1.4 Mini32
 
+ttgo-t7-v14-mini32.bootloader.tool=esptool_py
+ttgo-t7-v14-mini32.bootloader.tool.default=esptool_py
+
 ttgo-t7-v14-mini32.upload.tool=esptool_py
+ttgo-t7-v14-mini32.upload.tool.default=esptool_py
+ttgo-t7-v14-mini32.upload.tool.network=esp_ota
+
 ttgo-t7-v14-mini32.upload.maximum_size=1310720
 ttgo-t7-v14-mini32.upload.maximum_data_size=327680
 ttgo-t7-v14-mini32.upload.wait_for_upload_port=true
@@ -2079,7 +3502,13 @@ ttgo-t7-v14-mini32.menu.DebugLevel.verbose.build.code_debug=5
 
 ttgo-t-oi-plus.name=TTGO T-OI PLUS RISC-V ESP32-C3
 
+ttgo-t-oi-plus.bootloader.tool=esptool_py
+ttgo-t-oi-plus.bootloader.tool.default=esptool_py
+
 ttgo-t-oi-plus.upload.tool=esptool_py
+ttgo-t-oi-plus.upload.tool.default=esptool_py
+ttgo-t-oi-plus.upload.tool.network=esp_ota
+
 ttgo-t-oi-plus.upload.maximum_size=1310720
 ttgo-t-oi-plus.upload.maximum_data_size=327680
 ttgo-t-oi-plus.upload.flags=
@@ -2130,7 +3559,6 @@ ttgo-t-oi-plus.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OT
 ttgo-t-oi-plus.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
 ttgo-t-oi-plus.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
 
-
 ttgo-t-oi-plus.menu.CPUFreq.160=160MHz (WiFi)
 ttgo-t-oi-plus.menu.CPUFreq.160.build.f_cpu=160000000L
 ttgo-t-oi-plus.menu.CPUFreq.80=80MHz (WiFi)
@@ -2195,7 +3623,13 @@ ttgo-t-oi-plus.menu.DebugLevel.verbose.build.code_debug=5
 
 cw02.name=XinaBox CW02
 
+cw02.bootloader.tool=esptool_py
+cw02.bootloader.tool.default=esptool_py
+
 cw02.upload.tool=esptool_py
+cw02.upload.tool.default=esptool_py
+cw02.upload.tool.network=esp_ota
+
 cw02.upload.maximum_size=1310720
 cw02.upload.maximum_data_size=294912
 cw02.upload.flags=
@@ -2275,7 +3709,13 @@ cw02.menu.DebugLevel.verbose.build.code_debug=5
 
 esp32thing.name=SparkFun ESP32 Thing
 
+esp32thing.bootloader.tool=esptool_py
+esp32thing.bootloader.tool.default=esptool_py
+
 esp32thing.upload.tool=esptool_py
+esp32thing.upload.tool.default=esptool_py
+esp32thing.upload.tool.network=esp_ota
+
 esp32thing.upload.maximum_size=1310720
 esp32thing.upload.maximum_data_size=327680
 esp32thing.upload.flags=
@@ -2345,7 +3785,13 @@ esp32thing.menu.DebugLevel.verbose.build.code_debug=5
 
 esp32thing_plus.name=SparkFun ESP32 Thing Plus
 
+esp32thing_plus.bootloader.tool=esptool_py
+esp32thing_plus.bootloader.tool.default=esptool_py
+
 esp32thing_plus.upload.tool=esptool_py
+esp32thing_plus.upload.tool.default=esptool_py
+esp32thing_plus.upload.tool.network=esp_ota
+
 esp32thing_plus.upload.maximum_size=1310720
 esp32thing_plus.upload.maximum_data_size=327680
 esp32thing_plus.upload.wait_for_upload_port=true
@@ -2416,7 +3862,13 @@ sparkfun_esp32s2_thing_plus.name=SparkFun ESP32-S2 Thing Plus
 sparkfun_esp32s2_thing_plus.vid.0=0x1B4F
 sparkfun_esp32s2_thing_plus.pid.0=0x0027
 
+sparkfun_esp32s2_thing_plus.bootloader.tool=esptool_py
+sparkfun_esp32s2_thing_plus.bootloader.tool.default=esptool_py
+
 sparkfun_esp32s2_thing_plus.upload.tool=esptool_py
+sparkfun_esp32s2_thing_plus.upload.tool.default=esptool_py
+sparkfun_esp32s2_thing_plus.upload.tool.network=esp_ota
+
 sparkfun_esp32s2_thing_plus.upload.maximum_size=1310720
 sparkfun_esp32s2_thing_plus.upload.maximum_data_size=327680
 sparkfun_esp32s2_thing_plus.upload.flags=
@@ -2574,7 +4026,13 @@ sparkfun_esp32s2_thing_plus.menu.DebugLevel.verbose.build.code_debug=5
 
 esp32micromod.name=SparkFun ESP32 MicroMod
 
+esp32micromod.bootloader.tool=esptool_py
+esp32micromod.bootloader.tool.default=esptool_py
+
 esp32micromod.upload.tool=esptool_py
+esp32micromod.upload.tool.default=esptool_py
+esp32micromod.upload.tool.network=esp_ota
+
 esp32micromod.upload.maximum_size=1310720
 esp32micromod.upload.maximum_data_size=327680
 esp32micromod.upload.wait_for_upload_port=true
@@ -2717,7 +4175,13 @@ esp32micromod.menu.DebugLevel.verbose.build.code_debug=5
 
 sparkfun_lora_gateway_1-channel.name=SparkFun LoRa Gateway 1-Channel
 
+sparkfun_lora_gateway_1-channel.bootloader.tool=esptool_py
+sparkfun_lora_gateway_1-channel.bootloader.tool.default=esptool_py
+
 sparkfun_lora_gateway_1-channel.upload.tool=esptool_py
+sparkfun_lora_gateway_1-channel.upload.tool.default=esptool_py
+sparkfun_lora_gateway_1-channel.upload.tool.network=esp_ota
+
 sparkfun_lora_gateway_1-channel.upload.maximum_size=1310720
 sparkfun_lora_gateway_1-channel.upload.maximum_data_size=294912
 sparkfun_lora_gateway_1-channel.upload.flags=
@@ -2788,11 +4252,30 @@ sparkfun_lora_gateway_1-channel.menu.UploadSpeed.460800.upload.speed=460800
 sparkfun_lora_gateway_1-channel.menu.UploadSpeed.512000.windows=512000
 sparkfun_lora_gateway_1-channel.menu.UploadSpeed.512000.upload.speed=512000
 
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.none=None
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.none.build.code_debug=0
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.error=Error
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.error.build.code_debug=1
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.warn=Warn
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.warn.build.code_debug=2
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.info=Info
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.info.build.code_debug=3
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.debug=Debug
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.debug.build.code_debug=4
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.verbose=Verbose
+sparkfun_lora_gateway_1-channel.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 nina_w10.name=u-blox NINA-W10 series (ESP32)
 
+nina_w10.bootloader.tool=esptool_py
+nina_w10.bootloader.tool.default=esptool_py
+
 nina_w10.upload.tool=esptool_py
+nina_w10.upload.tool.default=esptool_py
+nina_w10.upload.tool.network=esp_ota
+
 nina_w10.upload.maximum_size=1310720
 nina_w10.upload.maximum_data_size=327680
 nina_w10.upload.flags=
@@ -2831,11 +4314,30 @@ nina_w10.menu.UploadSpeed.460800.upload.speed=460800
 nina_w10.menu.UploadSpeed.512000.windows=512000
 nina_w10.menu.UploadSpeed.512000.upload.speed=512000
 
+nina_w10.menu.DebugLevel.none=None
+nina_w10.menu.DebugLevel.none.build.code_debug=0
+nina_w10.menu.DebugLevel.error=Error
+nina_w10.menu.DebugLevel.error.build.code_debug=1
+nina_w10.menu.DebugLevel.warn=Warn
+nina_w10.menu.DebugLevel.warn.build.code_debug=2
+nina_w10.menu.DebugLevel.info=Info
+nina_w10.menu.DebugLevel.info.build.code_debug=3
+nina_w10.menu.DebugLevel.debug=Debug
+nina_w10.menu.DebugLevel.debug.build.code_debug=4
+nina_w10.menu.DebugLevel.verbose=Verbose
+nina_w10.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 widora-air.name=Widora AIR
 
+widora-air.bootloader.tool=esptool_py
+widora-air.bootloader.tool.default=esptool_py
+
 widora-air.upload.tool=esptool_py
+widora-air.upload.tool.default=esptool_py
+widora-air.upload.tool.network=esp_ota
+
 widora-air.upload.maximum_size=1310720
 widora-air.upload.maximum_data_size=327680
 widora-air.upload.flags=
@@ -2879,11 +4381,30 @@ widora-air.menu.UploadSpeed.460800.upload.speed=460800
 widora-air.menu.UploadSpeed.512000.windows=512000
 widora-air.menu.UploadSpeed.512000.upload.speed=512000
 
+widora-air.menu.DebugLevel.none=None
+widora-air.menu.DebugLevel.none.build.code_debug=0
+widora-air.menu.DebugLevel.error=Error
+widora-air.menu.DebugLevel.error.build.code_debug=1
+widora-air.menu.DebugLevel.warn=Warn
+widora-air.menu.DebugLevel.warn.build.code_debug=2
+widora-air.menu.DebugLevel.info=Info
+widora-air.menu.DebugLevel.info.build.code_debug=3
+widora-air.menu.DebugLevel.debug=Debug
+widora-air.menu.DebugLevel.debug.build.code_debug=4
+widora-air.menu.DebugLevel.verbose=Verbose
+widora-air.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 esp320.name=Electronic SweetPeas - ESP320
 
+esp320.bootloader.tool=esptool_py
+esp320.bootloader.tool.default=esptool_py
+
 esp320.upload.tool=esptool_py
+esp320.upload.tool.default=esptool_py
+esp320.upload.tool.network=esp_ota
+
 esp320.upload.maximum_size=1310720
 esp320.upload.maximum_data_size=327680
 esp320.upload.flags=
@@ -2927,11 +4448,30 @@ esp320.menu.UploadSpeed.460800.upload.speed=460800
 esp320.menu.UploadSpeed.512000.windows=512000
 esp320.menu.UploadSpeed.512000.upload.speed=512000
 
+esp320.menu.DebugLevel.none=None
+esp320.menu.DebugLevel.none.build.code_debug=0
+esp320.menu.DebugLevel.error=Error
+esp320.menu.DebugLevel.error.build.code_debug=1
+esp320.menu.DebugLevel.warn=Warn
+esp320.menu.DebugLevel.warn.build.code_debug=2
+esp320.menu.DebugLevel.info=Info
+esp320.menu.DebugLevel.info.build.code_debug=3
+esp320.menu.DebugLevel.debug=Debug
+esp320.menu.DebugLevel.debug.build.code_debug=4
+esp320.menu.DebugLevel.verbose=Verbose
+esp320.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 nano32.name=Nano32
 
+nano32.bootloader.tool=esptool_py
+nano32.bootloader.tool.default=esptool_py
+
 nano32.upload.tool=esptool_py
+nano32.upload.tool.default=esptool_py
+nano32.upload.tool.network=esp_ota
+
 nano32.upload.maximum_size=1310720
 nano32.upload.maximum_data_size=327680
 nano32.upload.flags=
@@ -2975,11 +4515,30 @@ nano32.menu.UploadSpeed.460800.upload.speed=460800
 nano32.menu.UploadSpeed.512000.windows=512000
 nano32.menu.UploadSpeed.512000.upload.speed=512000
 
+nano32.menu.DebugLevel.none=None
+nano32.menu.DebugLevel.none.build.code_debug=0
+nano32.menu.DebugLevel.error=Error
+nano32.menu.DebugLevel.error.build.code_debug=1
+nano32.menu.DebugLevel.warn=Warn
+nano32.menu.DebugLevel.warn.build.code_debug=2
+nano32.menu.DebugLevel.info=Info
+nano32.menu.DebugLevel.info.build.code_debug=3
+nano32.menu.DebugLevel.debug=Debug
+nano32.menu.DebugLevel.debug.build.code_debug=4
+nano32.menu.DebugLevel.verbose=Verbose
+nano32.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 d32.name=LOLIN D32
 
+d32.bootloader.tool=esptool_py
+d32.bootloader.tool.default=esptool_py
+
 d32.upload.tool=esptool_py
+d32.upload.tool.default=esptool_py
+d32.upload.tool.network=esp_ota
+
 d32.upload.maximum_size=1310720
 d32.upload.maximum_data_size=327680
 d32.upload.flags=
@@ -3015,15 +4574,11 @@ d32.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (Large APPS with OTA)
 d32.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
 d32.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
 
-
-
 d32.menu.FlashFreq.80=80MHz
 d32.menu.FlashFreq.80.build.flash_freq=80m
 d32.menu.FlashFreq.40=40MHz
 d32.menu.FlashFreq.40.build.flash_freq=40m
 
-
-
 d32.menu.UploadSpeed.921600=921600
 d32.menu.UploadSpeed.921600.upload.speed=921600
 d32.menu.UploadSpeed.115200=115200
@@ -3056,7 +4611,13 @@ d32.menu.DebugLevel.verbose.build.code_debug=5
 
 d32_pro.name=LOLIN D32 PRO
 
+d32_pro.bootloader.tool=esptool_py
+d32_pro.bootloader.tool.default=esptool_py
+
 d32_pro.upload.tool=esptool_py
+d32_pro.upload.tool.default=esptool_py
+d32_pro.upload.tool.network=esp_ota
+
 d32_pro.upload.maximum_size=1310720
 d32_pro.upload.maximum_data_size=327680
 d32_pro.upload.flags=
@@ -3099,15 +4660,11 @@ d32_pro.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (Large APPS with OTA)
 d32_pro.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
 d32_pro.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
 
-
-
 d32_pro.menu.FlashFreq.80=80MHz
 d32_pro.menu.FlashFreq.80.build.flash_freq=80m
 d32_pro.menu.FlashFreq.40=40MHz
 d32_pro.menu.FlashFreq.40.build.flash_freq=40m
 
-
-
 d32_pro.menu.UploadSpeed.921600=921600
 d32_pro.menu.UploadSpeed.921600.upload.speed=921600
 d32_pro.menu.UploadSpeed.115200=115200
@@ -3140,9 +4697,313 @@ d32_pro.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
 
+lolin_c3_mini.name=LOLIN C3 Mini
+lolin_c3_mini.vid.0=0x303a
+lolin_c3_mini.pid.0=0x1001
+
+lolin_c3_mini.bootloader.tool=esptool_py
+lolin_c3_mini.bootloader.tool.default=esptool_py
+
+lolin_c3_mini.upload.tool=esptool_py
+lolin_c3_mini.upload.tool.default=esptool_py
+lolin_c3_mini.upload.tool.network=esp_ota
+
+lolin_c3_mini.upload.maximum_size=1310720
+lolin_c3_mini.upload.maximum_data_size=327680
+lolin_c3_mini.upload.flags=
+lolin_c3_mini.upload.extra_flags=
+lolin_c3_mini.upload.use_1200bps_touch=false
+lolin_c3_mini.upload.wait_for_upload_port=false
+
+lolin_c3_mini.serial.disableDTR=true
+lolin_c3_mini.serial.disableRTS=true
+
+lolin_c3_mini.build.tarch=riscv32
+lolin_c3_mini.build.target=esp
+lolin_c3_mini.build.mcu=esp32c3
+lolin_c3_mini.build.core=esp32
+lolin_c3_mini.build.variant=lolin_c3_mini
+lolin_c3_mini.build.board=LOLIN_C3_MINI
+lolin_c3_mini.build.bootloader_addr=0x0
+
+lolin_c3_mini.build.cdc_on_boot=1
+lolin_c3_mini.build.f_cpu=160000000L
+lolin_c3_mini.build.flash_size=4MB
+lolin_c3_mini.build.flash_freq=80m
+lolin_c3_mini.build.flash_mode=dio
+lolin_c3_mini.build.boot=qio
+lolin_c3_mini.build.partitions=default
+lolin_c3_mini.build.defines=
+
+lolin_c3_mini.menu.CDCOnBoot.default=Enabled
+lolin_c3_mini.menu.CDCOnBoot.default.build.cdc_on_boot=1
+lolin_c3_mini.menu.CDCOnBoot.dis_cdc=Disabled
+lolin_c3_mini.menu.CDCOnBoot.dis_cdc.build.cdc_on_boot=0
+
+lolin_c3_mini.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+lolin_c3_mini.menu.PartitionScheme.default.build.partitions=default
+lolin_c3_mini.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+lolin_c3_mini.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+lolin_c3_mini.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+lolin_c3_mini.menu.PartitionScheme.no_ota.build.partitions=no_ota
+lolin_c3_mini.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+lolin_c3_mini.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+lolin_c3_mini.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+lolin_c3_mini.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+lolin_c3_mini.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+lolin_c3_mini.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+lolin_c3_mini.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+lolin_c3_mini.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+lolin_c3_mini.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+lolin_c3_mini.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+lolin_c3_mini.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+lolin_c3_mini.menu.PartitionScheme.huge_app.build.partitions=huge_app
+lolin_c3_mini.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+
+
+lolin_c3_mini.menu.CPUFreq.160=160MHz (WiFi)
+lolin_c3_mini.menu.CPUFreq.160.build.f_cpu=160000000L
+lolin_c3_mini.menu.CPUFreq.80=80MHz (WiFi)
+lolin_c3_mini.menu.CPUFreq.80.build.f_cpu=80000000L
+lolin_c3_mini.menu.CPUFreq.40=40MHz
+lolin_c3_mini.menu.CPUFreq.40.build.f_cpu=40000000L
+lolin_c3_mini.menu.CPUFreq.20=20MHz
+lolin_c3_mini.menu.CPUFreq.20.build.f_cpu=20000000L
+lolin_c3_mini.menu.CPUFreq.10=10MHz
+lolin_c3_mini.menu.CPUFreq.10.build.f_cpu=10000000L
+
+
+
+lolin_c3_mini.menu.FlashFreq.80=80MHz
+lolin_c3_mini.menu.FlashFreq.80.build.flash_freq=80m
+lolin_c3_mini.menu.FlashFreq.40=40MHz
+lolin_c3_mini.menu.FlashFreq.40.build.flash_freq=40m
+
+lolin_c3_mini.menu.UploadSpeed.921600=921600
+lolin_c3_mini.menu.UploadSpeed.921600.upload.speed=921600
+lolin_c3_mini.menu.UploadSpeed.115200=115200
+lolin_c3_mini.menu.UploadSpeed.115200.upload.speed=115200
+lolin_c3_mini.menu.UploadSpeed.256000.windows=256000
+lolin_c3_mini.menu.UploadSpeed.256000.upload.speed=256000
+lolin_c3_mini.menu.UploadSpeed.230400.windows.upload.speed=256000
+lolin_c3_mini.menu.UploadSpeed.230400=230400
+lolin_c3_mini.menu.UploadSpeed.230400.upload.speed=230400
+lolin_c3_mini.menu.UploadSpeed.460800.linux=460800
+lolin_c3_mini.menu.UploadSpeed.460800.macosx=460800
+lolin_c3_mini.menu.UploadSpeed.460800.upload.speed=460800
+lolin_c3_mini.menu.UploadSpeed.512000.windows=512000
+lolin_c3_mini.menu.UploadSpeed.512000.upload.speed=512000
+
+lolin_c3_mini.menu.DebugLevel.none=None
+lolin_c3_mini.menu.DebugLevel.none.build.code_debug=0
+lolin_c3_mini.menu.DebugLevel.error=Error
+lolin_c3_mini.menu.DebugLevel.error.build.code_debug=1
+lolin_c3_mini.menu.DebugLevel.warn=Warn
+lolin_c3_mini.menu.DebugLevel.warn.build.code_debug=2
+lolin_c3_mini.menu.DebugLevel.info=Info
+lolin_c3_mini.menu.DebugLevel.info.build.code_debug=3
+lolin_c3_mini.menu.DebugLevel.debug=Debug
+lolin_c3_mini.menu.DebugLevel.debug.build.code_debug=4
+lolin_c3_mini.menu.DebugLevel.verbose=Verbose
+lolin_c3_mini.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
+lolin_s2_mini.name=LOLIN S2 Mini
+lolin_s2_mini.vid.0=0x303a
+lolin_s2_mini.pid.0=0x80C2
+
+lolin_s2_mini.bootloader.tool=esptool_py
+lolin_s2_mini.bootloader.tool.default=esptool_py
+
+lolin_s2_mini.upload.tool=esptool_py
+lolin_s2_mini.upload.tool.default=esptool_py
+lolin_s2_mini.upload.tool.network=esp_ota
+
+lolin_s2_mini.upload.maximum_size=1310720
+lolin_s2_mini.upload.maximum_data_size=327680
+lolin_s2_mini.upload.flags=
+lolin_s2_mini.upload.extra_flags=
+lolin_s2_mini.upload.use_1200bps_touch=true
+lolin_s2_mini.upload.wait_for_upload_port=true
+lolin_s2_mini.upload.speed=921600
+
+lolin_s2_mini.serial.disableDTR=false
+lolin_s2_mini.serial.disableRTS=false
+
+lolin_s2_mini.build.tarch=xtensa
+lolin_s2_mini.build.bootloader_addr=0x1000
+lolin_s2_mini.build.target=esp32s2
+lolin_s2_mini.build.mcu=esp32s2
+lolin_s2_mini.build.core=esp32
+lolin_s2_mini.build.variant=lolin_s2_mini
+lolin_s2_mini.build.board=LOLIN_S2_MINI
+
+lolin_s2_mini.build.cdc_on_boot=1
+lolin_s2_mini.build.msc_on_boot=1
+lolin_s2_mini.build.dfu_on_boot=1
+lolin_s2_mini.build.f_cpu=240000000L
+lolin_s2_mini.build.flash_size=4MB
+lolin_s2_mini.build.flash_freq=80m
+lolin_s2_mini.build.flash_mode=dio
+lolin_s2_mini.build.boot=qio
+lolin_s2_mini.build.partitions=default
+lolin_s2_mini.build.defines=
+
+lolin_s2_mini.build.defines=-DBOARD_HAS_PSRAM
+
+lolin_s2_mini.menu.CDCOnBoot.default=Enabled
+lolin_s2_mini.menu.CDCOnBoot.default.build.cdc_on_boot=1
+lolin_s2_mini.menu.CDCOnBoot.dis_cdc=Disabled
+lolin_s2_mini.menu.CDCOnBoot.dis_cdc.build.cdc_on_boot=0
+
+lolin_s2_mini.menu.MSCOnBoot.default=Disabled
+lolin_s2_mini.menu.MSCOnBoot.default.build.msc_on_boot=0
+lolin_s2_mini.menu.MSCOnBoot.msc=Enabled
+lolin_s2_mini.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+lolin_s2_mini.menu.DFUOnBoot.default=Disabled
+lolin_s2_mini.menu.DFUOnBoot.default.build.dfu_on_boot=0
+lolin_s2_mini.menu.DFUOnBoot.dfu=Enabled
+lolin_s2_mini.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
+
+lolin_s2_mini.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+lolin_s2_mini.menu.PartitionScheme.default.build.partitions=default
+lolin_s2_mini.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+lolin_s2_mini.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+lolin_s2_mini.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+lolin_s2_mini.menu.PartitionScheme.no_ota.build.partitions=no_ota
+lolin_s2_mini.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+lolin_s2_mini.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+lolin_s2_mini.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+lolin_s2_mini.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+lolin_s2_mini.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+lolin_s2_mini.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+lolin_s2_mini.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+lolin_s2_mini.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+lolin_s2_mini.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+lolin_s2_mini.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+lolin_s2_mini.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+lolin_s2_mini.menu.PartitionScheme.huge_app.build.partitions=huge_app
+lolin_s2_mini.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+
+lolin_s2_mini.menu.DebugLevel.none=None
+lolin_s2_mini.menu.DebugLevel.none.build.code_debug=0
+lolin_s2_mini.menu.DebugLevel.error=Error
+lolin_s2_mini.menu.DebugLevel.error.build.code_debug=1
+lolin_s2_mini.menu.DebugLevel.warn=Warn
+lolin_s2_mini.menu.DebugLevel.warn.build.code_debug=2
+lolin_s2_mini.menu.DebugLevel.info=Info
+lolin_s2_mini.menu.DebugLevel.info.build.code_debug=3
+lolin_s2_mini.menu.DebugLevel.debug=Debug
+lolin_s2_mini.menu.DebugLevel.debug.build.code_debug=4
+lolin_s2_mini.menu.DebugLevel.verbose=Verbose
+lolin_s2_mini.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
+lolin_s2_pico.name=LOLIN S2 PICO
+lolin_s2_pico.vid.0=0x303a
+lolin_s2_pico.pid.0=0x80C5
+
+lolin_s2_pico.bootloader.tool=esptool_py
+lolin_s2_pico.bootloader.tool.default=esptool_py
+
+lolin_s2_pico.upload.tool=esptool_py
+lolin_s2_pico.upload.tool.default=esptool_py
+lolin_s2_pico.upload.tool.network=esp_ota
+
+lolin_s2_pico.upload.maximum_size=1310720
+lolin_s2_pico.upload.maximum_data_size=327680
+lolin_s2_pico.upload.flags=
+lolin_s2_pico.upload.extra_flags=
+lolin_s2_pico.upload.use_1200bps_touch=true
+lolin_s2_pico.upload.wait_for_upload_port=true
+lolin_s2_pico.upload.speed=921600
+
+lolin_s2_pico.serial.disableDTR=false
+lolin_s2_pico.serial.disableRTS=false
+
+lolin_s2_pico.build.tarch=xtensa
+lolin_s2_pico.build.bootloader_addr=0x1000
+lolin_s2_pico.build.target=esp32s2
+lolin_s2_pico.build.mcu=esp32s2
+lolin_s2_pico.build.core=esp32
+lolin_s2_pico.build.variant=lolin_s2_pico
+lolin_s2_pico.build.board=LOLIN_S2_PICO
+
+lolin_s2_pico.build.cdc_on_boot=1
+lolin_s2_pico.build.msc_on_boot=1
+lolin_s2_pico.build.dfu_on_boot=1
+lolin_s2_pico.build.f_cpu=240000000L
+lolin_s2_pico.build.flash_size=4MB
+lolin_s2_pico.build.flash_freq=80m
+lolin_s2_pico.build.flash_mode=dio
+lolin_s2_pico.build.boot=qio
+lolin_s2_pico.build.partitions=default
+lolin_s2_pico.build.defines=
+
+lolin_s2_pico.build.defines=-DBOARD_HAS_PSRAM
+
+lolin_s2_pico.menu.CDCOnBoot.default=Enabled
+lolin_s2_pico.menu.CDCOnBoot.default.build.cdc_on_boot=1
+lolin_s2_pico.menu.CDCOnBoot.dis_cdc=Disabled
+lolin_s2_pico.menu.CDCOnBoot.dis_cdc.build.cdc_on_boot=0
+
+lolin_s2_pico.menu.MSCOnBoot.default=Disabled
+lolin_s2_pico.menu.MSCOnBoot.default.build.msc_on_boot=0
+lolin_s2_pico.menu.MSCOnBoot.msc=Enabled
+lolin_s2_pico.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+lolin_s2_pico.menu.DFUOnBoot.default=Disabled
+lolin_s2_pico.menu.DFUOnBoot.default.build.dfu_on_boot=0
+lolin_s2_pico.menu.DFUOnBoot.dfu=Enabled
+lolin_s2_pico.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
+
+lolin_s2_pico.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+lolin_s2_pico.menu.PartitionScheme.default.build.partitions=default
+lolin_s2_pico.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+lolin_s2_pico.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+lolin_s2_pico.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+lolin_s2_pico.menu.PartitionScheme.no_ota.build.partitions=no_ota
+lolin_s2_pico.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+lolin_s2_pico.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+lolin_s2_pico.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+lolin_s2_pico.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+lolin_s2_pico.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+lolin_s2_pico.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+lolin_s2_pico.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+lolin_s2_pico.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+lolin_s2_pico.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+lolin_s2_pico.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+lolin_s2_pico.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+lolin_s2_pico.menu.PartitionScheme.huge_app.build.partitions=huge_app
+lolin_s2_pico.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+
+lolin_s2_pico.menu.DebugLevel.none=None
+lolin_s2_pico.menu.DebugLevel.none.build.code_debug=0
+lolin_s2_pico.menu.DebugLevel.error=Error
+lolin_s2_pico.menu.DebugLevel.error.build.code_debug=1
+lolin_s2_pico.menu.DebugLevel.warn=Warn
+lolin_s2_pico.menu.DebugLevel.warn.build.code_debug=2
+lolin_s2_pico.menu.DebugLevel.info=Info
+lolin_s2_pico.menu.DebugLevel.info.build.code_debug=3
+lolin_s2_pico.menu.DebugLevel.debug=Debug
+lolin_s2_pico.menu.DebugLevel.debug.build.code_debug=4
+lolin_s2_pico.menu.DebugLevel.verbose=Verbose
+lolin_s2_pico.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
 lolin32.name=WEMOS LOLIN32
 
+lolin32.bootloader.tool=esptool_py
+lolin32.bootloader.tool.default=esptool_py
+
 lolin32.upload.tool=esptool_py
+lolin32.upload.tool.default=esptool_py
+lolin32.upload.tool.network=esp_ota
+
 lolin32.upload.maximum_size=1310720
 lolin32.upload.maximum_data_size=327680
 lolin32.upload.flags=
@@ -3212,11 +5073,30 @@ lolin32.menu.UploadSpeed.460800.upload.speed=460800
 lolin32.menu.UploadSpeed.512000.windows=512000
 lolin32.menu.UploadSpeed.512000.upload.speed=512000
 
+lolin32.menu.DebugLevel.none=None
+lolin32.menu.DebugLevel.none.build.code_debug=0
+lolin32.menu.DebugLevel.error=Error
+lolin32.menu.DebugLevel.error.build.code_debug=1
+lolin32.menu.DebugLevel.warn=Warn
+lolin32.menu.DebugLevel.warn.build.code_debug=2
+lolin32.menu.DebugLevel.info=Info
+lolin32.menu.DebugLevel.info.build.code_debug=3
+lolin32.menu.DebugLevel.debug=Debug
+lolin32.menu.DebugLevel.debug.build.code_debug=4
+lolin32.menu.DebugLevel.verbose=Verbose
+lolin32.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 lolin32-lite.name=WEMOS LOLIN32 Lite
 
+lolin32-lite.bootloader.tool=esptool_py
+lolin32-lite.bootloader.tool.default=esptool_py
+
 lolin32-lite.upload.tool=esptool_py
+lolin32-lite.upload.tool.default=esptool_py
+lolin32-lite.upload.tool.network=esp_ota
+
 lolin32-lite.upload.maximum_size=1310720
 lolin32-lite.upload.maximum_data_size=327680
 lolin32-lite.upload.wait_for_upload_port=true
@@ -3287,11 +5167,30 @@ lolin32-lite.menu.UploadSpeed.460800.upload.speed=460800
 lolin32-lite.menu.UploadSpeed.512000.windows=512000
 lolin32-lite.menu.UploadSpeed.512000.upload.speed=512000
 
+lolin32-lite.menu.DebugLevel.none=None
+lolin32-lite.menu.DebugLevel.none.build.code_debug=0
+lolin32-lite.menu.DebugLevel.error=Error
+lolin32-lite.menu.DebugLevel.error.build.code_debug=1
+lolin32-lite.menu.DebugLevel.warn=Warn
+lolin32-lite.menu.DebugLevel.warn.build.code_debug=2
+lolin32-lite.menu.DebugLevel.info=Info
+lolin32-lite.menu.DebugLevel.info.build.code_debug=3
+lolin32-lite.menu.DebugLevel.debug=Debug
+lolin32-lite.menu.DebugLevel.debug.build.code_debug=4
+lolin32-lite.menu.DebugLevel.verbose=Verbose
+lolin32-lite.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 pocket_32.name=Dongsen Tech Pocket 32
 
+pocket_32.bootloader.tool=esptool_py
+pocket_32.bootloader.tool.default=esptool_py
+
 pocket_32.upload.tool=esptool_py
+pocket_32.upload.tool.default=esptool_py
+pocket_32.upload.tool.network=esp_ota
+
 pocket_32.upload.maximum_size=1310720
 pocket_32.upload.maximum_data_size=327680
 pocket_32.upload.flags=
@@ -3335,11 +5234,30 @@ pocket_32.menu.UploadSpeed.460800.upload.speed=460800
 pocket_32.menu.UploadSpeed.512000.windows=512000
 pocket_32.menu.UploadSpeed.512000.upload.speed=512000
 
+pocket_32.menu.DebugLevel.none=None
+pocket_32.menu.DebugLevel.none.build.code_debug=0
+pocket_32.menu.DebugLevel.error=Error
+pocket_32.menu.DebugLevel.error.build.code_debug=1
+pocket_32.menu.DebugLevel.warn=Warn
+pocket_32.menu.DebugLevel.warn.build.code_debug=2
+pocket_32.menu.DebugLevel.info=Info
+pocket_32.menu.DebugLevel.info.build.code_debug=3
+pocket_32.menu.DebugLevel.debug=Debug
+pocket_32.menu.DebugLevel.debug.build.code_debug=4
+pocket_32.menu.DebugLevel.verbose=Verbose
+pocket_32.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 WeMosBat.name=WeMos WiFi&Bluetooth Battery
 
+WeMosBat.bootloader.tool=esptool_py
+WeMosBat.bootloader.tool.default=esptool_py
+
 WeMosBat.upload.tool=esptool_py
+WeMosBat.upload.tool.default=esptool_py
+WeMosBat.upload.tool.network=esp_ota
+
 WeMosBat.upload.maximum_size=1310720
 WeMosBat.upload.maximum_data_size=327680
 WeMosBat.upload.flags=
@@ -3363,6 +5281,43 @@ WeMosBat.build.boot=dio
 WeMosBat.build.partitions=default
 WeMosBat.build.defines=
 
+WeMosBat.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+WeMosBat.menu.PartitionScheme.default.build.partitions=default
+WeMosBat.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+WeMosBat.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+WeMosBat.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
+WeMosBat.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+WeMosBat.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+WeMosBat.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+WeMosBat.menu.PartitionScheme.minimal.build.partitions=minimal
+WeMosBat.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+WeMosBat.menu.PartitionScheme.no_ota.build.partitions=no_ota
+WeMosBat.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+WeMosBat.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+WeMosBat.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+WeMosBat.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+WeMosBat.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+WeMosBat.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+WeMosBat.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+WeMosBat.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+WeMosBat.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+WeMosBat.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+WeMosBat.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+WeMosBat.menu.PartitionScheme.huge_app.build.partitions=huge_app
+WeMosBat.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+WeMosBat.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+WeMosBat.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+WeMosBat.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+WeMosBat.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
+WeMosBat.menu.PartitionScheme.fatflash.build.partitions=ffat
+WeMosBat.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+WeMosBat.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
+WeMosBat.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+WeMosBat.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+WeMosBat.menu.PartitionScheme.rainmaker=RainMaker
+WeMosBat.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
+WeMosBat.menu.PartitionScheme.rainmaker.upload.maximum_size=3145728
+
 WeMosBat.menu.FlashFreq.80=80MHz
 WeMosBat.menu.FlashFreq.80.build.flash_freq=80m
 WeMosBat.menu.FlashFreq.40=40MHz
@@ -3400,7 +5355,13 @@ WeMosBat.menu.DebugLevel.verbose.build.code_debug=5
 
 espea32.name=ESPea32
 
+espea32.bootloader.tool=esptool_py
+espea32.bootloader.tool.default=esptool_py
+
 espea32.upload.tool=esptool_py
+espea32.upload.tool.default=esptool_py
+espea32.upload.tool.network=esp_ota
+
 espea32.upload.maximum_size=1310720
 espea32.upload.maximum_data_size=327680
 espea32.upload.flags=
@@ -3444,11 +5405,30 @@ espea32.menu.UploadSpeed.460800.upload.speed=460800
 espea32.menu.UploadSpeed.512000.windows=512000
 espea32.menu.UploadSpeed.512000.upload.speed=512000
 
+espea32.menu.DebugLevel.none=None
+espea32.menu.DebugLevel.none.build.code_debug=0
+espea32.menu.DebugLevel.error=Error
+espea32.menu.DebugLevel.error.build.code_debug=1
+espea32.menu.DebugLevel.warn=Warn
+espea32.menu.DebugLevel.warn.build.code_debug=2
+espea32.menu.DebugLevel.info=Info
+espea32.menu.DebugLevel.info.build.code_debug=3
+espea32.menu.DebugLevel.debug=Debug
+espea32.menu.DebugLevel.debug.build.code_debug=4
+espea32.menu.DebugLevel.verbose=Verbose
+espea32.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 quantum.name=Noduino Quantum
 
+quantum.bootloader.tool=esptool_py
+quantum.bootloader.tool.default=esptool_py
+
 quantum.upload.tool=esptool_py
+quantum.upload.tool.default=esptool_py
+quantum.upload.tool.network=esp_ota
+
 quantum.upload.maximum_size=1310720
 quantum.upload.maximum_data_size=327680
 quantum.upload.flags=
@@ -3492,11 +5472,30 @@ quantum.menu.UploadSpeed.460800.upload.speed=460800
 quantum.menu.UploadSpeed.512000.windows=512000
 quantum.menu.UploadSpeed.512000.upload.speed=512000
 
+quantum.menu.DebugLevel.none=None
+quantum.menu.DebugLevel.none.build.code_debug=0
+quantum.menu.DebugLevel.error=Error
+quantum.menu.DebugLevel.error.build.code_debug=1
+quantum.menu.DebugLevel.warn=Warn
+quantum.menu.DebugLevel.warn.build.code_debug=2
+quantum.menu.DebugLevel.info=Info
+quantum.menu.DebugLevel.info.build.code_debug=3
+quantum.menu.DebugLevel.debug=Debug
+quantum.menu.DebugLevel.debug.build.code_debug=4
+quantum.menu.DebugLevel.verbose=Verbose
+quantum.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 node32s.name=Node32s
 
+node32s.bootloader.tool=esptool_py
+node32s.bootloader.tool.default=esptool_py
+
 node32s.upload.tool=esptool_py
+node32s.upload.tool.default=esptool_py
+node32s.upload.tool.network=esp_ota
+
 node32s.upload.maximum_size=1310720
 node32s.upload.maximum_data_size=327680
 node32s.upload.flags=
@@ -3566,7 +5565,13 @@ node32s.menu.DebugLevel.verbose.build.code_debug=5
 
 hornbill32dev.name=Hornbill ESP32 Dev
 
+hornbill32dev.bootloader.tool=esptool_py
+hornbill32dev.bootloader.tool.default=esptool_py
+
 hornbill32dev.upload.tool=esptool_py
+hornbill32dev.upload.tool.default=esptool_py
+hornbill32dev.upload.tool.network=esp_ota
+
 hornbill32dev.upload.maximum_size=1310720
 hornbill32dev.upload.maximum_data_size=327680
 hornbill32dev.upload.flags=
@@ -3610,11 +5615,30 @@ hornbill32dev.menu.UploadSpeed.460800.upload.speed=460800
 hornbill32dev.menu.UploadSpeed.512000.windows=512000
 hornbill32dev.menu.UploadSpeed.512000.upload.speed=512000
 
+hornbill32dev.menu.DebugLevel.none=None
+hornbill32dev.menu.DebugLevel.none.build.code_debug=0
+hornbill32dev.menu.DebugLevel.error=Error
+hornbill32dev.menu.DebugLevel.error.build.code_debug=1
+hornbill32dev.menu.DebugLevel.warn=Warn
+hornbill32dev.menu.DebugLevel.warn.build.code_debug=2
+hornbill32dev.menu.DebugLevel.info=Info
+hornbill32dev.menu.DebugLevel.info.build.code_debug=3
+hornbill32dev.menu.DebugLevel.debug=Debug
+hornbill32dev.menu.DebugLevel.debug.build.code_debug=4
+hornbill32dev.menu.DebugLevel.verbose=Verbose
+hornbill32dev.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 hornbill32minima.name=Hornbill ESP32 Minima
 
+hornbill32minima.bootloader.tool=esptool_py
+hornbill32minima.bootloader.tool.default=esptool_py
+
 hornbill32minima.upload.tool=esptool_py
+hornbill32minima.upload.tool.default=esptool_py
+hornbill32minima.upload.tool.network=esp_ota
+
 hornbill32minima.upload.maximum_size=1310720
 hornbill32minima.upload.maximum_data_size=327680
 hornbill32minima.upload.flags=
@@ -3657,11 +5681,30 @@ hornbill32minima.menu.UploadSpeed.460800.upload.speed=460800
 hornbill32minima.menu.UploadSpeed.512000.windows=512000
 hornbill32minima.menu.UploadSpeed.512000.upload.speed=512000
 
+hornbill32minima.menu.DebugLevel.none=None
+hornbill32minima.menu.DebugLevel.none.build.code_debug=0
+hornbill32minima.menu.DebugLevel.error=Error
+hornbill32minima.menu.DebugLevel.error.build.code_debug=1
+hornbill32minima.menu.DebugLevel.warn=Warn
+hornbill32minima.menu.DebugLevel.warn.build.code_debug=2
+hornbill32minima.menu.DebugLevel.info=Info
+hornbill32minima.menu.DebugLevel.info.build.code_debug=3
+hornbill32minima.menu.DebugLevel.debug=Debug
+hornbill32minima.menu.DebugLevel.debug.build.code_debug=4
+hornbill32minima.menu.DebugLevel.verbose=Verbose
+hornbill32minima.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 firebeetle32.name=FireBeetle-ESP32
 
+firebeetle32.bootloader.tool=esptool_py
+firebeetle32.bootloader.tool.default=esptool_py
+
 firebeetle32.upload.tool=esptool_py
+firebeetle32.upload.tool.default=esptool_py
+firebeetle32.upload.tool.network=esp_ota
+
 firebeetle32.upload.maximum_size=1310720
 firebeetle32.upload.maximum_data_size=327680
 firebeetle32.upload.flags=
@@ -3705,11 +5748,30 @@ firebeetle32.menu.UploadSpeed.460800.upload.speed=460800
 firebeetle32.menu.UploadSpeed.512000.windows=512000
 firebeetle32.menu.UploadSpeed.512000.upload.speed=512000
 
+firebeetle32.menu.DebugLevel.none=None
+firebeetle32.menu.DebugLevel.none.build.code_debug=0
+firebeetle32.menu.DebugLevel.error=Error
+firebeetle32.menu.DebugLevel.error.build.code_debug=1
+firebeetle32.menu.DebugLevel.warn=Warn
+firebeetle32.menu.DebugLevel.warn.build.code_debug=2
+firebeetle32.menu.DebugLevel.info=Info
+firebeetle32.menu.DebugLevel.info.build.code_debug=3
+firebeetle32.menu.DebugLevel.debug=Debug
+firebeetle32.menu.DebugLevel.debug.build.code_debug=4
+firebeetle32.menu.DebugLevel.verbose=Verbose
+firebeetle32.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 intorobot-fig.name=IntoRobot Fig
 
+intorobot-fig.bootloader.tool=esptool_py
+intorobot-fig.bootloader.tool.default=esptool_py
+
 intorobot-fig.upload.tool=esptool_py
+intorobot-fig.upload.tool.default=esptool_py
+intorobot-fig.upload.tool.network=esp_ota
+
 intorobot-fig.upload.maximum_size=1310720
 intorobot-fig.upload.maximum_data_size=327680
 intorobot-fig.upload.flags=
@@ -3753,11 +5815,30 @@ intorobot-fig.menu.UploadSpeed.460800.upload.speed=460800
 intorobot-fig.menu.UploadSpeed.512000.windows=512000
 intorobot-fig.menu.UploadSpeed.512000.upload.speed=512000
 
+intorobot-fig.menu.DebugLevel.none=None
+intorobot-fig.menu.DebugLevel.none.build.code_debug=0
+intorobot-fig.menu.DebugLevel.error=Error
+intorobot-fig.menu.DebugLevel.error.build.code_debug=1
+intorobot-fig.menu.DebugLevel.warn=Warn
+intorobot-fig.menu.DebugLevel.warn.build.code_debug=2
+intorobot-fig.menu.DebugLevel.info=Info
+intorobot-fig.menu.DebugLevel.info.build.code_debug=3
+intorobot-fig.menu.DebugLevel.debug=Debug
+intorobot-fig.menu.DebugLevel.debug.build.code_debug=4
+intorobot-fig.menu.DebugLevel.verbose=Verbose
+intorobot-fig.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 onehorse32dev.name=Onehorse ESP32 Dev Module
 
+onehorse32dev.bootloader.tool=esptool_py
+onehorse32dev.bootloader.tool.default=esptool_py
+
 onehorse32dev.upload.tool=esptool_py
+onehorse32dev.upload.tool.default=esptool_py
+onehorse32dev.upload.tool.network=esp_ota
+
 onehorse32dev.upload.maximum_size=1310720
 onehorse32dev.upload.maximum_data_size=327680
 onehorse32dev.upload.flags=
@@ -3801,11 +5882,30 @@ onehorse32dev.menu.UploadSpeed.460800.upload.speed=460800
 onehorse32dev.menu.UploadSpeed.512000.windows=512000
 onehorse32dev.menu.UploadSpeed.512000.upload.speed=512000
 
+onehorse32dev.menu.DebugLevel.none=None
+onehorse32dev.menu.DebugLevel.none.build.code_debug=0
+onehorse32dev.menu.DebugLevel.error=Error
+onehorse32dev.menu.DebugLevel.error.build.code_debug=1
+onehorse32dev.menu.DebugLevel.warn=Warn
+onehorse32dev.menu.DebugLevel.warn.build.code_debug=2
+onehorse32dev.menu.DebugLevel.info=Info
+onehorse32dev.menu.DebugLevel.info.build.code_debug=3
+onehorse32dev.menu.DebugLevel.debug=Debug
+onehorse32dev.menu.DebugLevel.debug.build.code_debug=4
+onehorse32dev.menu.DebugLevel.verbose=Verbose
+onehorse32dev.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 featheresp32.name=Adafruit ESP32 Feather
 
+featheresp32.bootloader.tool=esptool_py
+featheresp32.bootloader.tool.default=esptool_py
+
 featheresp32.upload.tool=esptool_py
+featheresp32.upload.tool.default=esptool_py
+featheresp32.upload.tool.network=esp_ota
+
 featheresp32.upload.maximum_size=1310720
 featheresp32.upload.maximum_data_size=327680
 featheresp32.upload.flags=
@@ -3881,7 +5981,13 @@ adafruit_metro_esp32s2.pid.1=0x00DF
 adafruit_metro_esp32s2.vid.1=0x239A
 adafruit_metro_esp32s2.pid.1=0x80E0
 
+adafruit_metro_esp32s2.bootloader.tool=esptool_py
+adafruit_metro_esp32s2.bootloader.tool.default=esptool_py
+
 adafruit_metro_esp32s2.upload.tool=esptool_py
+adafruit_metro_esp32s2.upload.tool.default=esptool_py
+adafruit_metro_esp32s2.upload.tool.network=esp_ota
+
 adafruit_metro_esp32s2.upload.maximum_size=1310720
 adafruit_metro_esp32s2.upload.maximum_data_size=327680
 adafruit_metro_esp32s2.upload.flags=
@@ -4042,7 +6148,6 @@ adafruit_metro_esp32s2.menu.DebugLevel.debug.build.code_debug=4
 adafruit_metro_esp32s2.menu.DebugLevel.verbose=Verbose
 adafruit_metro_esp32s2.menu.DebugLevel.verbose.build.code_debug=5
 
-
 ##############################################################
 
 adafruit_magtag29_esp32s2.name=Adafruit MagTag 2.9"
@@ -4053,7 +6158,13 @@ adafruit_magtag29_esp32s2.pid.1=0x00E5
 adafruit_magtag29_esp32s2.vid.1=0x239A
 adafruit_magtag29_esp32s2.pid.1=0x80E6
 
+adafruit_magtag29_esp32s2.bootloader.tool=esptool_py
+adafruit_magtag29_esp32s2.bootloader.tool.default=esptool_py
+
 adafruit_magtag29_esp32s2.upload.tool=esptool_py
+adafruit_magtag29_esp32s2.upload.tool.default=esptool_py
+adafruit_magtag29_esp32s2.upload.tool.network=esp_ota
+
 adafruit_magtag29_esp32s2.upload.maximum_size=1310720
 adafruit_magtag29_esp32s2.upload.maximum_data_size=327680
 adafruit_magtag29_esp32s2.upload.flags=
@@ -4214,7 +6325,6 @@ adafruit_magtag29_esp32s2.menu.DebugLevel.debug.build.code_debug=4
 adafruit_magtag29_esp32s2.menu.DebugLevel.verbose=Verbose
 adafruit_magtag29_esp32s2.menu.DebugLevel.verbose.build.code_debug=5
 
-
 ##############################################################
 
 adafruit_funhouse_esp32s2.name=Adafruit FunHouse
@@ -4225,7 +6335,13 @@ adafruit_funhouse_esp32s2.pid.1=0x00F9
 adafruit_funhouse_esp32s2.vid.1=0x239A
 adafruit_funhouse_esp32s2.pid.1=0x80FA
 
+adafruit_funhouse_esp32s2.bootloader.tool=esptool_py
+adafruit_funhouse_esp32s2.bootloader.tool.default=esptool_py
+
 adafruit_funhouse_esp32s2.upload.tool=esptool_py
+adafruit_funhouse_esp32s2.upload.tool.default=esptool_py
+adafruit_funhouse_esp32s2.upload.tool.network=esp_ota
+
 adafruit_funhouse_esp32s2.upload.maximum_size=1310720
 adafruit_funhouse_esp32s2.upload.maximum_data_size=327680
 adafruit_funhouse_esp32s2.upload.flags=
@@ -4386,7 +6502,6 @@ adafruit_funhouse_esp32s2.menu.DebugLevel.debug.build.code_debug=4
 adafruit_funhouse_esp32s2.menu.DebugLevel.verbose=Verbose
 adafruit_funhouse_esp32s2.menu.DebugLevel.verbose.build.code_debug=5
 
-
 ##############################################################
 
 adafruit_feather_esp32s2.name=Adafruit Feather ESP32-S2
@@ -4397,7 +6512,13 @@ adafruit_feather_esp32s2.pid.1=0x00EB
 adafruit_feather_esp32s2.vid.1=0x239A
 adafruit_feather_esp32s2.pid.1=0x80EC
 
+adafruit_feather_esp32s2.bootloader.tool=esptool_py
+adafruit_feather_esp32s2.bootloader.tool.default=esptool_py
+
 adafruit_feather_esp32s2.upload.tool=esptool_py
+adafruit_feather_esp32s2.upload.tool.default=esptool_py
+adafruit_feather_esp32s2.upload.tool.network=esp_ota
+
 adafruit_feather_esp32s2.upload.maximum_size=1310720
 adafruit_feather_esp32s2.upload.maximum_data_size=327680
 adafruit_feather_esp32s2.upload.flags=
@@ -4568,7 +6689,13 @@ adafruit_feather_esp32s2_tft.pid.1=0x010F
 adafruit_feather_esp32s2_tft.vid.1=0x239A
 adafruit_feather_esp32s2_tft.pid.1=0x8110
 
+adafruit_feather_esp32s2_tft.bootloader.tool=esptool_py
+adafruit_feather_esp32s2_tft.bootloader.tool.default=esptool_py
+
 adafruit_feather_esp32s2_tft.upload.tool=esptool_py
+adafruit_feather_esp32s2_tft.upload.tool.default=esptool_py
+adafruit_feather_esp32s2_tft.upload.tool.network=esp_ota
+
 adafruit_feather_esp32s2_tft.upload.maximum_size=1310720
 adafruit_feather_esp32s2_tft.upload.maximum_data_size=327680
 adafruit_feather_esp32s2_tft.upload.flags=
@@ -4732,7 +6859,13 @@ adafruit_qtpy_esp32s2.pid.1=0x0111
 adafruit_qtpy_esp32s2.vid.1=0x239A
 adafruit_qtpy_esp32s2.pid.1=0x8112
 
+adafruit_qtpy_esp32s2.bootloader.tool=esptool_py
+adafruit_qtpy_esp32s2.bootloader.tool.default=esptool_py
+
 adafruit_qtpy_esp32s2.upload.tool=esptool_py
+adafruit_qtpy_esp32s2.upload.tool.default=esptool_py
+adafruit_qtpy_esp32s2.upload.tool.network=esp_ota
+
 adafruit_qtpy_esp32s2.upload.maximum_size=1310720
 adafruit_qtpy_esp32s2.upload.maximum_data_size=327680
 adafruit_qtpy_esp32s2.upload.flags=
@@ -4886,11 +7019,607 @@ adafruit_qtpy_esp32s2.menu.DebugLevel.debug.build.code_debug=4
 adafruit_qtpy_esp32s2.menu.DebugLevel.verbose=Verbose
 adafruit_qtpy_esp32s2.menu.DebugLevel.verbose.build.code_debug=5
 
+##############################################################
+
+adafruit_qtpy_esp32c3.name=Adafruit QT Py ESP32-C3
+adafruit_qtpy_esp32c3.vid.0=0x303a
+adafruit_qtpy_esp32c3.pid.0=0x1001
+
+adafruit_qtpy_esp32c3.bootloader.tool=esptool_py
+adafruit_qtpy_esp32c3.bootloader.tool.default=esptool_py
+
+adafruit_qtpy_esp32c3.upload.tool=esptool_py
+adafruit_qtpy_esp32c3.upload.tool.default=esptool_py
+adafruit_qtpy_esp32c3.upload.tool.network=esp_ota
+
+adafruit_qtpy_esp32c3.upload.maximum_size=1310720
+adafruit_qtpy_esp32c3.upload.maximum_data_size=327680
+adafruit_qtpy_esp32c3.upload.flags=
+adafruit_qtpy_esp32c3.upload.extra_flags=
+adafruit_qtpy_esp32c3.upload.use_1200bps_touch=false
+adafruit_qtpy_esp32c3.upload.wait_for_upload_port=false
+
+adafruit_qtpy_esp32c3.serial.disableDTR=false
+adafruit_qtpy_esp32c3.serial.disableRTS=false
+
+adafruit_qtpy_esp32c3.build.tarch=riscv32
+adafruit_qtpy_esp32c3.build.target=esp
+adafruit_qtpy_esp32c3.build.mcu=esp32c3
+adafruit_qtpy_esp32c3.build.core=esp32
+adafruit_qtpy_esp32c3.build.variant=adafruit_qtpy_esp32c3
+adafruit_qtpy_esp32c3.build.board=ADAFRUIT_QTPY_ESP32C3
+adafruit_qtpy_esp32c3.build.bootloader_addr=0x0
+
+adafruit_qtpy_esp32c3.build.cdc_on_boot=0
+adafruit_qtpy_esp32c3.build.f_cpu=160000000L
+adafruit_qtpy_esp32c3.build.flash_size=4MB
+adafruit_qtpy_esp32c3.build.flash_freq=80m
+adafruit_qtpy_esp32c3.build.flash_mode=dout
+adafruit_qtpy_esp32c3.build.boot=dout
+adafruit_qtpy_esp32c3.build.partitions=default
+adafruit_qtpy_esp32c3.build.defines=
+
+adafruit_qtpy_esp32c3.menu.CDCOnBoot.cdc=Enabled
+adafruit_qtpy_esp32c3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
+adafruit_qtpy_esp32c3.menu.CDCOnBoot.default=Disabled
+adafruit_qtpy_esp32c3.menu.CDCOnBoot.default.build.cdc_on_boot=0
+
+adafruit_qtpy_esp32c3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+adafruit_qtpy_esp32c3.menu.PartitionScheme.default.build.partitions=default
+adafruit_qtpy_esp32c3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+adafruit_qtpy_esp32c3.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+adafruit_qtpy_esp32c3.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+adafruit_qtpy_esp32c3.menu.PartitionScheme.minimal.build.partitions=minimal
+adafruit_qtpy_esp32c3.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+adafruit_qtpy_esp32c3.menu.PartitionScheme.no_ota.build.partitions=no_ota
+adafruit_qtpy_esp32c3.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+adafruit_qtpy_esp32c3.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+adafruit_qtpy_esp32c3.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+adafruit_qtpy_esp32c3.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+adafruit_qtpy_esp32c3.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+adafruit_qtpy_esp32c3.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+adafruit_qtpy_esp32c3.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+adafruit_qtpy_esp32c3.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+adafruit_qtpy_esp32c3.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+adafruit_qtpy_esp32c3.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+adafruit_qtpy_esp32c3.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+adafruit_qtpy_esp32c3.menu.PartitionScheme.huge_app.build.partitions=huge_app
+adafruit_qtpy_esp32c3.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+adafruit_qtpy_esp32c3.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+adafruit_qtpy_esp32c3.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+adafruit_qtpy_esp32c3.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+
+adafruit_qtpy_esp32c3.menu.CPUFreq.160=160MHz (WiFi)
+adafruit_qtpy_esp32c3.menu.CPUFreq.160.build.f_cpu=160000000L
+adafruit_qtpy_esp32c3.menu.CPUFreq.80=80MHz (WiFi)
+adafruit_qtpy_esp32c3.menu.CPUFreq.80.build.f_cpu=80000000L
+adafruit_qtpy_esp32c3.menu.CPUFreq.40=40MHz
+adafruit_qtpy_esp32c3.menu.CPUFreq.40.build.f_cpu=40000000L
+adafruit_qtpy_esp32c3.menu.CPUFreq.20=20MHz
+adafruit_qtpy_esp32c3.menu.CPUFreq.20.build.f_cpu=20000000L
+adafruit_qtpy_esp32c3.menu.CPUFreq.10=10MHz
+adafruit_qtpy_esp32c3.menu.CPUFreq.10.build.f_cpu=10000000L
+
+adafruit_qtpy_esp32c3.menu.FlashMode.dout=DOUT
+adafruit_qtpy_esp32c3.menu.FlashMode.dout.build.flash_mode=dout
+adafruit_qtpy_esp32c3.menu.FlashMode.dout.build.boot=dout
+adafruit_qtpy_esp32c3.menu.FlashMode.qio=QIO
+adafruit_qtpy_esp32c3.menu.FlashMode.qio.build.flash_mode=dio
+adafruit_qtpy_esp32c3.menu.FlashMode.qio.build.boot=qio
+adafruit_qtpy_esp32c3.menu.FlashMode.dio=DIO
+adafruit_qtpy_esp32c3.menu.FlashMode.dio.build.flash_mode=dio
+adafruit_qtpy_esp32c3.menu.FlashMode.dio.build.boot=dio
+adafruit_qtpy_esp32c3.menu.FlashMode.qout=QOUT
+adafruit_qtpy_esp32c3.menu.FlashMode.qout.build.flash_mode=dout
+adafruit_qtpy_esp32c3.menu.FlashMode.qout.build.boot=qout
+
+adafruit_qtpy_esp32c3.menu.FlashFreq.80=80MHz
+adafruit_qtpy_esp32c3.menu.FlashFreq.80.build.flash_freq=80m
+adafruit_qtpy_esp32c3.menu.FlashFreq.40=40MHz
+adafruit_qtpy_esp32c3.menu.FlashFreq.40.build.flash_freq=40m
+
+adafruit_qtpy_esp32c3.menu.FlashSize.4M=4MB (32Mb)
+adafruit_qtpy_esp32c3.menu.FlashSize.4M.build.flash_size=4MB
+adafruit_qtpy_esp32c3.menu.FlashSize.2M=2MB (16Mb)
+adafruit_qtpy_esp32c3.menu.FlashSize.2M.build.flash_size=2MB
+adafruit_qtpy_esp32c3.menu.FlashSize.2M.build.partitions=minimal
+
+adafruit_qtpy_esp32c3.menu.UploadSpeed.115200=115200
+adafruit_qtpy_esp32c3.menu.UploadSpeed.115200.upload.speed=115200
+adafruit_qtpy_esp32c3.menu.UploadSpeed.921600=921600
+adafruit_qtpy_esp32c3.menu.UploadSpeed.921600.upload.speed=921600
+adafruit_qtpy_esp32c3.menu.UploadSpeed.921600=921600
+adafruit_qtpy_esp32c3.menu.UploadSpeed.921600.upload.speed=921600
+adafruit_qtpy_esp32c3.menu.UploadSpeed.115200=115200
+adafruit_qtpy_esp32c3.menu.UploadSpeed.115200.upload.speed=115200
+adafruit_qtpy_esp32c3.menu.UploadSpeed.256000.windows=256000
+adafruit_qtpy_esp32c3.menu.UploadSpeed.256000.upload.speed=256000
+adafruit_qtpy_esp32c3.menu.UploadSpeed.230400.windows.upload.speed=256000
+adafruit_qtpy_esp32c3.menu.UploadSpeed.230400=230400
+adafruit_qtpy_esp32c3.menu.UploadSpeed.230400.upload.speed=230400
+adafruit_qtpy_esp32c3.menu.UploadSpeed.460800.linux=460800
+adafruit_qtpy_esp32c3.menu.UploadSpeed.460800.macosx=460800
+adafruit_qtpy_esp32c3.menu.UploadSpeed.460800.upload.speed=460800
+adafruit_qtpy_esp32c3.menu.UploadSpeed.512000.windows=512000
+adafruit_qtpy_esp32c3.menu.UploadSpeed.512000.upload.speed=512000
+
+adafruit_qtpy_esp32c3.menu.DebugLevel.none=None
+adafruit_qtpy_esp32c3.menu.DebugLevel.none.build.code_debug=0
+adafruit_qtpy_esp32c3.menu.DebugLevel.error=Error
+adafruit_qtpy_esp32c3.menu.DebugLevel.error.build.code_debug=1
+adafruit_qtpy_esp32c3.menu.DebugLevel.warn=Warn
+adafruit_qtpy_esp32c3.menu.DebugLevel.warn.build.code_debug=2
+adafruit_qtpy_esp32c3.menu.DebugLevel.info=Info
+adafruit_qtpy_esp32c3.menu.DebugLevel.info.build.code_debug=3
+adafruit_qtpy_esp32c3.menu.DebugLevel.debug=Debug
+adafruit_qtpy_esp32c3.menu.DebugLevel.debug.build.code_debug=4
+adafruit_qtpy_esp32c3.menu.DebugLevel.verbose=Verbose
+adafruit_qtpy_esp32c3.menu.DebugLevel.verbose.build.code_debug=5
+
+
+adafruit_qtpy_esp32_pico.name=Adafruit QT Py ESP32
+
+adafruit_qtpy_esp32_pico.bootloader.tool=esptool_py
+adafruit_qtpy_esp32_pico.bootloader.tool.default=esptool_py
+
+adafruit_qtpy_esp32_pico.upload.tool=esptool_py
+adafruit_qtpy_esp32_pico.upload.tool.default=esptool_py
+adafruit_qtpy_esp32_pico.upload.tool.network=esp_ota
+
+adafruit_qtpy_esp32_pico.upload.maximum_size=1310720
+adafruit_qtpy_esp32_pico.upload.maximum_data_size=327680
+adafruit_qtpy_esp32_pico.upload.flags=
+adafruit_qtpy_esp32_pico.upload.extra_flags=
+
+adafruit_qtpy_esp32_pico.serial.disableDTR=true
+adafruit_qtpy_esp32_pico.serial.disableRTS=true
+
+adafruit_qtpy_esp32_pico.build.tarch=xtensa
+adafruit_qtpy_esp32_pico.build.bootloader_addr=0x1000
+adafruit_qtpy_esp32_pico.build.target=esp32
+adafruit_qtpy_esp32_pico.build.mcu=esp32
+adafruit_qtpy_esp32_pico.build.core=esp32
+adafruit_qtpy_esp32_pico.build.variant=adafruit_qtpy_esp32
+adafruit_qtpy_esp32_pico.build.board=ADAFRUIT_QTPY_ESP32_PICO
+
+adafruit_qtpy_esp32_pico.build.f_cpu=240000000L
+adafruit_qtpy_esp32_pico.build.flash_size=8MB
+adafruit_qtpy_esp32_pico.build.flash_freq=80m
+adafruit_qtpy_esp32_pico.build.flash_mode=dio
+adafruit_qtpy_esp32_pico.build.boot=dio
+adafruit_qtpy_esp32_pico.build.partitions=default
+adafruit_qtpy_esp32_pico.build.defines=
+
+adafruit_qtpy_esp32_pico.menu.PartitionScheme.default=Default
+adafruit_qtpy_esp32_pico.menu.PartitionScheme.default.build.partitions=default
+adafruit_qtpy_esp32_pico.menu.PartitionScheme.no_ota=No OTA (Large APP)
+adafruit_qtpy_esp32_pico.menu.PartitionScheme.no_ota.build.partitions=no_ota
+adafruit_qtpy_esp32_pico.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+adafruit_qtpy_esp32_pico.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (Large APPS with OTA)
+adafruit_qtpy_esp32_pico.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+adafruit_qtpy_esp32_pico.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.921600=921600
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.921600.upload.speed=921600
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.115200=115200
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.115200.upload.speed=115200
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.256000.windows=256000
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.256000.upload.speed=256000
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.230400.windows.upload.speed=256000
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.230400=230400
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.230400.upload.speed=230400
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.460800.linux=460800
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.460800.macosx=460800
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.460800.upload.speed=460800
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.512000.windows=512000
+adafruit_qtpy_esp32_pico.menu.UploadSpeed.512000.upload.speed=512000
+
+adafruit_qtpy_esp32_pico.menu.PSRAM.enabled=Enabled
+adafruit_qtpy_esp32_pico.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-strategy=memw
+adafruit_qtpy_esp32_pico.menu.PSRAM.enabled.build.extra_libs=
+adafruit_qtpy_esp32_pico.menu.PSRAM.disabled=Disabled
+adafruit_qtpy_esp32_pico.menu.PSRAM.disabled.build.defines=
+adafruit_qtpy_esp32_pico.menu.PSRAM.disabled.build.extra_libs=
+
+adafruit_qtpy_esp32_pico.menu.DebugLevel.none=None
+adafruit_qtpy_esp32_pico.menu.DebugLevel.none.build.code_debug=0
+adafruit_qtpy_esp32_pico.menu.DebugLevel.error=Error
+adafruit_qtpy_esp32_pico.menu.DebugLevel.error.build.code_debug=1
+adafruit_qtpy_esp32_pico.menu.DebugLevel.warn=Warn
+adafruit_qtpy_esp32_pico.menu.DebugLevel.warn.build.code_debug=2
+adafruit_qtpy_esp32_pico.menu.DebugLevel.info=Info
+adafruit_qtpy_esp32_pico.menu.DebugLevel.info.build.code_debug=3
+adafruit_qtpy_esp32_pico.menu.DebugLevel.debug=Debug
+adafruit_qtpy_esp32_pico.menu.DebugLevel.debug.build.code_debug=4
+adafruit_qtpy_esp32_pico.menu.DebugLevel.verbose=Verbose
+adafruit_qtpy_esp32_pico.menu.DebugLevel.verbose.build.code_debug=5
+
+
+
+adafruit_feather_esp32_v2.name=Adafruit Feather ESP32 V2
+
+adafruit_feather_esp32_v2.bootloader.tool=esptool_py
+adafruit_feather_esp32_v2.bootloader.tool.default=esptool_py
+
+adafruit_feather_esp32_v2.upload.tool=esptool_py
+adafruit_feather_esp32_v2.upload.tool.default=esptool_py
+adafruit_feather_esp32_v2.upload.tool.network=esp_ota
+
+adafruit_feather_esp32_v2.upload.maximum_size=1310720
+adafruit_feather_esp32_v2.upload.maximum_data_size=327680
+adafruit_feather_esp32_v2.upload.flags=
+adafruit_feather_esp32_v2.upload.extra_flags=
+
+adafruit_feather_esp32_v2.serial.disableDTR=true
+adafruit_feather_esp32_v2.serial.disableRTS=true
+
+adafruit_feather_esp32_v2.build.tarch=xtensa
+adafruit_feather_esp32_v2.build.bootloader_addr=0x1000
+adafruit_feather_esp32_v2.build.target=esp32
+adafruit_feather_esp32_v2.build.mcu=esp32
+adafruit_feather_esp32_v2.build.core=esp32
+adafruit_feather_esp32_v2.build.variant=adafruit_feather_esp32_v2
+adafruit_feather_esp32_v2.build.board=ADAFRUIT_FEATHER_ESP32_V2
+
+adafruit_feather_esp32_v2.build.f_cpu=240000000L
+adafruit_feather_esp32_v2.build.flash_size=8MB
+adafruit_feather_esp32_v2.build.flash_freq=80m
+adafruit_feather_esp32_v2.build.flash_mode=dio
+adafruit_feather_esp32_v2.build.boot=dio
+adafruit_feather_esp32_v2.build.partitions=default
+adafruit_feather_esp32_v2.build.defines=
+
+adafruit_feather_esp32_v2.menu.PartitionScheme.default=Default
+adafruit_feather_esp32_v2.menu.PartitionScheme.default.build.partitions=default
+adafruit_feather_esp32_v2.menu.PartitionScheme.no_ota=No OTA (Large APP)
+adafruit_feather_esp32_v2.menu.PartitionScheme.no_ota.build.partitions=no_ota
+adafruit_feather_esp32_v2.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+adafruit_feather_esp32_v2.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (Large APPS with OTA)
+adafruit_feather_esp32_v2.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+adafruit_feather_esp32_v2.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+
+adafruit_feather_esp32_v2.menu.UploadSpeed.921600=921600
+adafruit_feather_esp32_v2.menu.UploadSpeed.921600.upload.speed=921600
+adafruit_feather_esp32_v2.menu.UploadSpeed.115200=115200
+adafruit_feather_esp32_v2.menu.UploadSpeed.115200.upload.speed=115200
+adafruit_feather_esp32_v2.menu.UploadSpeed.256000.windows=256000
+adafruit_feather_esp32_v2.menu.UploadSpeed.256000.upload.speed=256000
+adafruit_feather_esp32_v2.menu.UploadSpeed.230400.windows.upload.speed=256000
+adafruit_feather_esp32_v2.menu.UploadSpeed.230400=230400
+adafruit_feather_esp32_v2.menu.UploadSpeed.230400.upload.speed=230400
+adafruit_feather_esp32_v2.menu.UploadSpeed.460800.linux=460800
+adafruit_feather_esp32_v2.menu.UploadSpeed.460800.macosx=460800
+adafruit_feather_esp32_v2.menu.UploadSpeed.460800.upload.speed=460800
+adafruit_feather_esp32_v2.menu.UploadSpeed.512000.windows=512000
+adafruit_feather_esp32_v2.menu.UploadSpeed.512000.upload.speed=512000
+
+adafruit_feather_esp32_v2.menu.PSRAM.enabled=Enabled
+adafruit_feather_esp32_v2.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-strategy=memw
+adafruit_feather_esp32_v2.menu.PSRAM.enabled.build.extra_libs=
+adafruit_feather_esp32_v2.menu.PSRAM.disabled=Disabled
+adafruit_feather_esp32_v2.menu.PSRAM.disabled.build.defines=
+adafruit_feather_esp32_v2.menu.PSRAM.disabled.build.extra_libs=
+
+adafruit_feather_esp32_v2.menu.DebugLevel.none=None
+adafruit_feather_esp32_v2.menu.DebugLevel.none.build.code_debug=0
+adafruit_feather_esp32_v2.menu.DebugLevel.error=Error
+adafruit_feather_esp32_v2.menu.DebugLevel.error.build.code_debug=1
+adafruit_feather_esp32_v2.menu.DebugLevel.warn=Warn
+adafruit_feather_esp32_v2.menu.DebugLevel.warn.build.code_debug=2
+adafruit_feather_esp32_v2.menu.DebugLevel.info=Info
+adafruit_feather_esp32_v2.menu.DebugLevel.info.build.code_debug=3
+adafruit_feather_esp32_v2.menu.DebugLevel.debug=Debug
+adafruit_feather_esp32_v2.menu.DebugLevel.debug.build.code_debug=4
+adafruit_feather_esp32_v2.menu.DebugLevel.verbose=Verbose
+adafruit_feather_esp32_v2.menu.DebugLevel.verbose.build.code_debug=5
+
+
+##############################################################
+
+adafruit_feather_esp32s3.name=Adafruit Feather ESP32-S3 No PSRAM
+adafruit_feather_esp32s3.vid.0=0x239A
+adafruit_feather_esp32s3.pid.0=0x8113
+adafruit_feather_esp32s3.vid.1=0x239A
+adafruit_feather_esp32s3.pid.1=0x0113
+adafruit_feather_esp32s3.vid.1=0x239A
+adafruit_feather_esp32s3.pid.1=0x8114
+
+adafruit_feather_esp32s3.bootloader.tool=esptool_py
+adafruit_feather_esp32s3.bootloader.tool.default=esptool_py
+
+adafruit_feather_esp32s3.upload.tool=esptool_py
+adafruit_feather_esp32s3.upload.tool.default=esptool_py
+adafruit_feather_esp32s3.upload.tool.network=esp_ota
+
+adafruit_feather_esp32s3.upload.maximum_size=1310720
+adafruit_feather_esp32s3.upload.maximum_data_size=327680
+adafruit_feather_esp32s3.upload.flags=
+adafruit_feather_esp32s3.upload.extra_flags=0x410000 "{runtime.platform.path}/variants/{build.variant}/tinyuf2.bin"
+adafruit_feather_esp32s3.upload.use_1200bps_touch=true
+adafruit_feather_esp32s3.upload.wait_for_upload_port=true
+
+adafruit_feather_esp32s3.serial.disableDTR=false
+adafruit_feather_esp32s3.serial.disableRTS=false
+
+adafruit_feather_esp32s3.build.tarch=xtensa
+adafruit_feather_esp32s3.build.bootloader_addr=0x0
+adafruit_feather_esp32s3.build.target=esp32s3
+adafruit_feather_esp32s3.build.mcu=esp32s3
+adafruit_feather_esp32s3.build.core=esp32
+adafruit_feather_esp32s3.build.variant=adafruit_feather_esp32s3_nopsram
+adafruit_feather_esp32s3.build.board=ADAFRUIT_FEATHER_ESP32S3_NOPSRAM
+
+adafruit_feather_esp32s3.build.usb_mode=1
+adafruit_feather_esp32s3.build.cdc_on_boot=1
+adafruit_feather_esp32s3.build.msc_on_boot=0
+adafruit_feather_esp32s3.build.dfu_on_boot=0
+adafruit_feather_esp32s3.build.f_cpu=240000000L
+adafruit_feather_esp32s3.build.flash_size=8MB
+adafruit_feather_esp32s3.build.flash_freq=80m
+adafruit_feather_esp32s3.build.flash_mode=dio
+adafruit_feather_esp32s3.build.boot=qio
+adafruit_feather_esp32s3.build.partitions=default
+adafruit_feather_esp32s3.build.defines=
+adafruit_feather_esp32s3.build.loop_core=-DARDUINO_RUNNING_CORE=1
+adafruit_feather_esp32s3.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+
+adafruit_feather_esp32s3.menu.USBMode.default=USB-OTG
+adafruit_feather_esp32s3.menu.USBMode.default.build.usb_mode=0
+adafruit_feather_esp32s3.menu.USBMode.default.upload.use_1200bps_touch=true
+adafruit_feather_esp32s3.menu.USBMode.default.upload.wait_for_upload_port=true
+adafruit_feather_esp32s3.menu.USBMode.hwcdc=Hardware CDC and JTAG
+adafruit_feather_esp32s3.menu.USBMode.hwcdc.build.usb_mode=1
+adafruit_feather_esp32s3.menu.USBMode.hwcdc.upload.use_1200bps_touch=false
+adafruit_feather_esp32s3.menu.USBMode.hwcdc.upload.wait_for_upload_port=false
+
+adafruit_feather_esp32s3.menu.CDCOnBoot.cdc=Enabled
+adafruit_feather_esp32s3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
+adafruit_feather_esp32s3.menu.CDCOnBoot.default=Disabled
+adafruit_feather_esp32s3.menu.CDCOnBoot.default.build.cdc_on_boot=0
+
+adafruit_feather_esp32s3.menu.MSCOnBoot.default=Disabled
+adafruit_feather_esp32s3.menu.MSCOnBoot.default.build.msc_on_boot=0
+adafruit_feather_esp32s3.menu.MSCOnBoot.msc=Enabled
+adafruit_feather_esp32s3.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+adafruit_feather_esp32s3.menu.DFUOnBoot.default=Disabled
+adafruit_feather_esp32s3.menu.DFUOnBoot.default.build.dfu_on_boot=0
+adafruit_feather_esp32s3.menu.DFUOnBoot.dfu=Enabled
+adafruit_feather_esp32s3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
+
+adafruit_feather_esp32s3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+adafruit_feather_esp32s3.menu.PartitionScheme.default.build.partitions=default
+adafruit_feather_esp32s3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+adafruit_feather_esp32s3.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+adafruit_feather_esp32s3.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
+adafruit_feather_esp32s3.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+adafruit_feather_esp32s3.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+adafruit_feather_esp32s3.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+adafruit_feather_esp32s3.menu.PartitionScheme.minimal.build.partitions=minimal
+adafruit_feather_esp32s3.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+adafruit_feather_esp32s3.menu.PartitionScheme.no_ota.build.partitions=no_ota
+adafruit_feather_esp32s3.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+adafruit_feather_esp32s3.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+adafruit_feather_esp32s3.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+adafruit_feather_esp32s3.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+adafruit_feather_esp32s3.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+adafruit_feather_esp32s3.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+adafruit_feather_esp32s3.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+adafruit_feather_esp32s3.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+adafruit_feather_esp32s3.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+adafruit_feather_esp32s3.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+adafruit_feather_esp32s3.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+adafruit_feather_esp32s3.menu.PartitionScheme.huge_app.build.partitions=huge_app
+adafruit_feather_esp32s3.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+adafruit_feather_esp32s3.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+adafruit_feather_esp32s3.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+adafruit_feather_esp32s3.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+adafruit_feather_esp32s3.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
+adafruit_feather_esp32s3.menu.PartitionScheme.fatflash.build.partitions=ffat
+adafruit_feather_esp32s3.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+adafruit_feather_esp32s3.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
+adafruit_feather_esp32s3.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+adafruit_feather_esp32s3.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+
+adafruit_feather_esp32s3.menu.CPUFreq.240=240MHz (WiFi)
+adafruit_feather_esp32s3.menu.CPUFreq.240.build.f_cpu=240000000L
+adafruit_feather_esp32s3.menu.CPUFreq.160=160MHz (WiFi)
+adafruit_feather_esp32s3.menu.CPUFreq.160.build.f_cpu=160000000L
+adafruit_feather_esp32s3.menu.CPUFreq.80=80MHz (WiFi)
+adafruit_feather_esp32s3.menu.CPUFreq.80.build.f_cpu=80000000L
+adafruit_feather_esp32s3.menu.CPUFreq.40=40MHz
+adafruit_feather_esp32s3.menu.CPUFreq.40.build.f_cpu=40000000L
+adafruit_feather_esp32s3.menu.CPUFreq.20=20MHz
+adafruit_feather_esp32s3.menu.CPUFreq.20.build.f_cpu=20000000L
+adafruit_feather_esp32s3.menu.CPUFreq.10=10MHz
+adafruit_feather_esp32s3.menu.CPUFreq.10.build.f_cpu=10000000L
+
+adafruit_feather_esp32s3.menu.FlashFreq.80=80MHz
+adafruit_feather_esp32s3.menu.FlashFreq.80.build.flash_freq=80m
+adafruit_feather_esp32s3.menu.FlashFreq.40=40MHz
+adafruit_feather_esp32s3.menu.FlashFreq.40.build.flash_freq=40m
+
+adafruit_feather_esp32s3.menu.UploadSpeed.921600=921600
+adafruit_feather_esp32s3.menu.UploadSpeed.921600.upload.speed=921600
+adafruit_feather_esp32s3.menu.UploadSpeed.115200=115200
+adafruit_feather_esp32s3.menu.UploadSpeed.115200.upload.speed=115200
+adafruit_feather_esp32s3.menu.UploadSpeed.256000.windows=256000
+adafruit_feather_esp32s3.menu.UploadSpeed.256000.upload.speed=256000
+adafruit_feather_esp32s3.menu.UploadSpeed.230400.windows.upload.speed=256000
+adafruit_feather_esp32s3.menu.UploadSpeed.230400=230400
+adafruit_feather_esp32s3.menu.UploadSpeed.230400.upload.speed=230400
+adafruit_feather_esp32s3.menu.UploadSpeed.460800.linux=460800
+adafruit_feather_esp32s3.menu.UploadSpeed.460800.macosx=460800
+adafruit_feather_esp32s3.menu.UploadSpeed.460800.upload.speed=460800
+adafruit_feather_esp32s3.menu.UploadSpeed.512000.windows=512000
+adafruit_feather_esp32s3.menu.UploadSpeed.512000.upload.speed=512000
+
+adafruit_feather_esp32s3.menu.DebugLevel.none=None
+adafruit_feather_esp32s3.menu.DebugLevel.none.build.code_debug=0
+adafruit_feather_esp32s3.menu.DebugLevel.error=Error
+adafruit_feather_esp32s3.menu.DebugLevel.error.build.code_debug=1
+adafruit_feather_esp32s3.menu.DebugLevel.warn=Warn
+adafruit_feather_esp32s3.menu.DebugLevel.warn.build.code_debug=2
+adafruit_feather_esp32s3.menu.DebugLevel.info=Info
+adafruit_feather_esp32s3.menu.DebugLevel.info.build.code_debug=3
+adafruit_feather_esp32s3.menu.DebugLevel.debug=Debug
+adafruit_feather_esp32s3.menu.DebugLevel.debug.build.code_debug=4
+adafruit_feather_esp32s3.menu.DebugLevel.verbose=Verbose
+adafruit_feather_esp32s3.menu.DebugLevel.verbose.build.code_debug=5
+
+
+##############################################################
+
+adafruit_qtpy_esp32s3.name=Adafruit QT Py ESP32-S3 No PSRAM
+adafruit_qtpy_esp32s3.vid.0=0x239A
+adafruit_qtpy_esp32s3.pid.0=0x8119
+adafruit_qtpy_esp32s3.vid.1=0x239A
+adafruit_qtpy_esp32s3.pid.1=0x0119
+adafruit_qtpy_esp32s3.vid.1=0x239A
+adafruit_qtpy_esp32s3.pid.1=0x811A
+
+adafruit_qtpy_esp32s3.bootloader.tool=esptool_py
+adafruit_qtpy_esp32s3.bootloader.tool.default=esptool_py
+
+adafruit_qtpy_esp32s3.upload.tool=esptool_py
+adafruit_qtpy_esp32s3.upload.tool.default=esptool_py
+adafruit_qtpy_esp32s3.upload.tool.network=esp_ota
+
+adafruit_qtpy_esp32s3.upload.maximum_size=1310720
+adafruit_qtpy_esp32s3.upload.maximum_data_size=327680
+adafruit_qtpy_esp32s3.upload.flags=
+adafruit_qtpy_esp32s3.upload.extra_flags=0x410000 "{runtime.platform.path}/variants/{build.variant}/tinyuf2.bin"
+adafruit_qtpy_esp32s3.upload.use_1200bps_touch=true
+adafruit_qtpy_esp32s3.upload.wait_for_upload_port=true
+adafruit_qtpy_esp32s3.upload.speed=921600
+
+adafruit_qtpy_esp32s3.serial.disableDTR=false
+adafruit_qtpy_esp32s3.serial.disableRTS=false
+
+adafruit_qtpy_esp32s3.build.tarch=xtensa
+adafruit_qtpy_esp32s3.build.bootloader_addr=0x0
+adafruit_qtpy_esp32s3.build.target=esp32s3
+adafruit_qtpy_esp32s3.build.mcu=esp32s3
+adafruit_qtpy_esp32s3.build.core=esp32
+adafruit_qtpy_esp32s3.build.variant=adafruit_qtpy_esp32s3_nopsram
+adafruit_qtpy_esp32s3.build.board=ADAFRUIT_QTPY_ESP32S3_NOPSRAM
+
+adafruit_qtpy_esp32s3.build.usb_mode=1
+adafruit_qtpy_esp32s3.build.cdc_on_boot=1
+adafruit_qtpy_esp32s3.build.msc_on_boot=0
+adafruit_qtpy_esp32s3.build.dfu_on_boot=0
+adafruit_qtpy_esp32s3.build.f_cpu=240000000L
+adafruit_qtpy_esp32s3.build.flash_size=8MB
+adafruit_qtpy_esp32s3.build.flash_freq=80m
+adafruit_qtpy_esp32s3.build.flash_mode=dio
+adafruit_qtpy_esp32s3.build.boot=qio
+adafruit_qtpy_esp32s3.build.partitions=default_8MB
+adafruit_qtpy_esp32s3.build.defines=
+adafruit_qtpy_esp32s3.build.loop_core=-DARDUINO_RUNNING_CORE=1
+adafruit_qtpy_esp32s3.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+
+adafruit_qtpy_esp32s3.menu.USBMode.default=USB-OTG
+adafruit_qtpy_esp32s3.menu.USBMode.default.build.usb_mode=0
+adafruit_qtpy_esp32s3.menu.USBMode.default.upload.use_1200bps_touch=true
+adafruit_qtpy_esp32s3.menu.USBMode.default.upload.wait_for_upload_port=true
+adafruit_qtpy_esp32s3.menu.USBMode.hwcdc=Hardware CDC and JTAG
+adafruit_qtpy_esp32s3.menu.USBMode.hwcdc.build.usb_mode=1
+adafruit_qtpy_esp32s3.menu.USBMode.hwcdc.upload.use_1200bps_touch=false
+adafruit_qtpy_esp32s3.menu.USBMode.hwcdc.upload.wait_for_upload_port=false
+
+adafruit_qtpy_esp32s3.menu.CDCOnBoot.cdc=Enabled
+adafruit_qtpy_esp32s3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
+adafruit_qtpy_esp32s3.menu.CDCOnBoot.default=Disabled
+adafruit_qtpy_esp32s3.menu.CDCOnBoot.default.build.cdc_on_boot=0
+
+adafruit_qtpy_esp32s3.menu.MSCOnBoot.default=Disabled
+adafruit_qtpy_esp32s3.menu.MSCOnBoot.default.build.msc_on_boot=0
+adafruit_qtpy_esp32s3.menu.MSCOnBoot.msc=Enabled
+adafruit_qtpy_esp32s3.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+adafruit_qtpy_esp32s3.menu.DFUOnBoot.default=Disabled
+adafruit_qtpy_esp32s3.menu.DFUOnBoot.default.build.dfu_on_boot=0
+adafruit_qtpy_esp32s3.menu.DFUOnBoot.dfu=Enabled
+adafruit_qtpy_esp32s3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
+
+adafruit_qtpy_esp32s3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.default.build.partitions=default
+adafruit_qtpy_esp32s3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+adafruit_qtpy_esp32s3.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+adafruit_qtpy_esp32s3.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+adafruit_qtpy_esp32s3.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.minimal.build.partitions=minimal
+adafruit_qtpy_esp32s3.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.no_ota.build.partitions=no_ota
+adafruit_qtpy_esp32s3.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+adafruit_qtpy_esp32s3.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+adafruit_qtpy_esp32s3.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+adafruit_qtpy_esp32s3.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+adafruit_qtpy_esp32s3.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+adafruit_qtpy_esp32s3.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+adafruit_qtpy_esp32s3.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+adafruit_qtpy_esp32s3.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.huge_app.build.partitions=huge_app
+adafruit_qtpy_esp32s3.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+adafruit_qtpy_esp32s3.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+adafruit_qtpy_esp32s3.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+adafruit_qtpy_esp32s3.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.fatflash.build.partitions=ffat
+adafruit_qtpy_esp32s3.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+adafruit_qtpy_esp32s3.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
+adafruit_qtpy_esp32s3.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+adafruit_qtpy_esp32s3.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+
+adafruit_qtpy_esp32s3.menu.CPUFreq.240=240MHz (WiFi)
+adafruit_qtpy_esp32s3.menu.CPUFreq.240.build.f_cpu=240000000L
+adafruit_qtpy_esp32s3.menu.CPUFreq.160=160MHz (WiFi)
+adafruit_qtpy_esp32s3.menu.CPUFreq.160.build.f_cpu=160000000L
+adafruit_qtpy_esp32s3.menu.CPUFreq.80=80MHz (WiFi)
+adafruit_qtpy_esp32s3.menu.CPUFreq.80.build.f_cpu=80000000L
+adafruit_qtpy_esp32s3.menu.CPUFreq.40=40MHz
+adafruit_qtpy_esp32s3.menu.CPUFreq.40.build.f_cpu=40000000L
+adafruit_qtpy_esp32s3.menu.CPUFreq.20=20MHz
+adafruit_qtpy_esp32s3.menu.CPUFreq.20.build.f_cpu=20000000L
+adafruit_qtpy_esp32s3.menu.CPUFreq.10=10MHz
+adafruit_qtpy_esp32s3.menu.CPUFreq.10.build.f_cpu=10000000L
+
+adafruit_qtpy_esp32s3.menu.FlashFreq.80=80MHz
+adafruit_qtpy_esp32s3.menu.FlashFreq.80.build.flash_freq=80m
+adafruit_qtpy_esp32s3.menu.FlashFreq.40=40MHz
+adafruit_qtpy_esp32s3.menu.FlashFreq.40.build.flash_freq=40m
+
+adafruit_qtpy_esp32s3.menu.DebugLevel.none=None
+adafruit_qtpy_esp32s3.menu.DebugLevel.none.build.code_debug=0
+adafruit_qtpy_esp32s3.menu.DebugLevel.error=Error
+adafruit_qtpy_esp32s3.menu.DebugLevel.error.build.code_debug=1
+adafruit_qtpy_esp32s3.menu.DebugLevel.warn=Warn
+adafruit_qtpy_esp32s3.menu.DebugLevel.warn.build.code_debug=2
+adafruit_qtpy_esp32s3.menu.DebugLevel.info=Info
+adafruit_qtpy_esp32s3.menu.DebugLevel.info.build.code_debug=3
+adafruit_qtpy_esp32s3.menu.DebugLevel.debug=Debug
+adafruit_qtpy_esp32s3.menu.DebugLevel.debug.build.code_debug=4
+adafruit_qtpy_esp32s3.menu.DebugLevel.verbose=Verbose
+adafruit_qtpy_esp32s3.menu.DebugLevel.verbose.build.code_debug=5
+
+
+
 ##############################################################
 
 nodemcu-32s.name=NodeMCU-32S
 
+nodemcu-32s.bootloader.tool=esptool_py
+nodemcu-32s.bootloader.tool.default=esptool_py
+
 nodemcu-32s.upload.tool=esptool_py
+nodemcu-32s.upload.tool.default=esptool_py
+nodemcu-32s.upload.tool.network=esp_ota
+
 nodemcu-32s.upload.maximum_size=1310720
 nodemcu-32s.upload.maximum_data_size=327680
 nodemcu-32s.upload.flags=
@@ -4934,11 +7663,30 @@ nodemcu-32s.menu.UploadSpeed.460800.upload.speed=460800
 nodemcu-32s.menu.UploadSpeed.512000.windows=512000
 nodemcu-32s.menu.UploadSpeed.512000.upload.speed=512000
 
+nodemcu-32s.menu.DebugLevel.none=None
+nodemcu-32s.menu.DebugLevel.none.build.code_debug=0
+nodemcu-32s.menu.DebugLevel.error=Error
+nodemcu-32s.menu.DebugLevel.error.build.code_debug=1
+nodemcu-32s.menu.DebugLevel.warn=Warn
+nodemcu-32s.menu.DebugLevel.warn.build.code_debug=2
+nodemcu-32s.menu.DebugLevel.info=Info
+nodemcu-32s.menu.DebugLevel.info.build.code_debug=3
+nodemcu-32s.menu.DebugLevel.debug=Debug
+nodemcu-32s.menu.DebugLevel.debug.build.code_debug=4
+nodemcu-32s.menu.DebugLevel.verbose=Verbose
+nodemcu-32s.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 mhetesp32devkit.name=MH ET LIVE ESP32DevKIT
 
+mhetesp32devkit.bootloader.tool=esptool_py
+mhetesp32devkit.bootloader.tool.default=esptool_py
+
 mhetesp32devkit.upload.tool=esptool_py
+mhetesp32devkit.upload.tool.default=esptool_py
+mhetesp32devkit.upload.tool.network=esp_ota
+
 mhetesp32devkit.upload.maximum_size=1310720
 mhetesp32devkit.upload.maximum_data_size=327680
 mhetesp32devkit.upload.flags=
@@ -5008,7 +7756,13 @@ mhetesp32devkit.menu.DebugLevel.verbose.build.code_debug=5
 
 mhetesp32minikit.name=MH ET LIVE ESP32MiniKit
 
+mhetesp32minikit.bootloader.tool=esptool_py
+mhetesp32minikit.bootloader.tool.default=esptool_py
+
 mhetesp32minikit.upload.tool=esptool_py
+mhetesp32minikit.upload.tool.default=esptool_py
+mhetesp32minikit.upload.tool.network=esp_ota
+
 mhetesp32minikit.upload.maximum_size=1310720
 mhetesp32minikit.upload.maximum_data_size=327680
 mhetesp32minikit.upload.flags=
@@ -5076,11 +7830,17 @@ mhetesp32minikit.menu.DebugLevel.debug.build.code_debug=4
 mhetesp32minikit.menu.DebugLevel.verbose=Verbose
 mhetesp32minikit.menu.DebugLevel.verbose.build.code_debug=5
 
-#################################################################
+##############################################################
 
 esp32vn-iot-uno.name=ESP32vn IoT Uno
 
+esp32vn-iot-uno.bootloader.tool=esptool_py
+esp32vn-iot-uno.bootloader.tool.default=esptool_py
+
 esp32vn-iot-uno.upload.tool=esptool_py
+esp32vn-iot-uno.upload.tool.default=esptool_py
+esp32vn-iot-uno.upload.tool.network=esp_ota
+
 esp32vn-iot-uno.upload.maximum_size=1310720
 esp32vn-iot-uno.upload.maximum_data_size=327680
 esp32vn-iot-uno.upload.flags=
@@ -5124,11 +7884,30 @@ esp32vn-iot-uno.menu.UploadSpeed.460800.upload.speed=460800
 esp32vn-iot-uno.menu.UploadSpeed.512000.windows=512000
 esp32vn-iot-uno.menu.UploadSpeed.512000.upload.speed=512000
 
+esp32vn-iot-uno.menu.DebugLevel.none=None
+esp32vn-iot-uno.menu.DebugLevel.none.build.code_debug=0
+esp32vn-iot-uno.menu.DebugLevel.error=Error
+esp32vn-iot-uno.menu.DebugLevel.error.build.code_debug=1
+esp32vn-iot-uno.menu.DebugLevel.warn=Warn
+esp32vn-iot-uno.menu.DebugLevel.warn.build.code_debug=2
+esp32vn-iot-uno.menu.DebugLevel.info=Info
+esp32vn-iot-uno.menu.DebugLevel.info.build.code_debug=3
+esp32vn-iot-uno.menu.DebugLevel.debug=Debug
+esp32vn-iot-uno.menu.DebugLevel.debug.build.code_debug=4
+esp32vn-iot-uno.menu.DebugLevel.verbose=Verbose
+esp32vn-iot-uno.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 esp32doit-devkit-v1.name=DOIT ESP32 DEVKIT V1
 
+esp32doit-devkit-v1.bootloader.tool=esptool_py
+esp32doit-devkit-v1.bootloader.tool.default=esptool_py
+
 esp32doit-devkit-v1.upload.tool=esptool_py
+esp32doit-devkit-v1.upload.tool.default=esptool_py
+esp32doit-devkit-v1.upload.tool.network=esp_ota
+
 esp32doit-devkit-v1.upload.maximum_size=1310720
 esp32doit-devkit-v1.upload.maximum_data_size=327680
 esp32doit-devkit-v1.upload.flags=
@@ -5187,7 +7966,7 @@ esp32doit-devkit-v1.menu.DebugLevel.debug.build.code_debug=4
 
 esp32doit-espduino.name=DOIT ESPduino32
 
-esp32doit-espduino.upload.tool=esptool
+esp32doit-espduino.upload.tool=esptool_py
 esp32doit-espduino.upload.maximum_size=1310720
 esp32doit-espduino.upload.maximum_data_size=327680
 esp32doit-espduino.upload.wait_for_upload_port=true
@@ -5247,7 +8026,13 @@ esp32doit-espduino.menu.DebugLevel.debug.build.code_debug=4
 
 esp32-evb.name=OLIMEX ESP32-EVB
 
+esp32-evb.bootloader.tool=esptool_py
+esp32-evb.bootloader.tool.default=esptool_py
+
 esp32-evb.upload.tool=esptool_py
+esp32-evb.upload.tool.default=esptool_py
+esp32-evb.upload.tool.network=esp_ota
+
 esp32-evb.upload.maximum_size=1310720
 esp32-evb.upload.maximum_data_size=327680
 esp32-evb.upload.flags=
@@ -5276,7 +8061,6 @@ esp32-evb.menu.FlashFreq.80.build.flash_freq=80m
 esp32-evb.menu.FlashFreq.40=40MHz
 esp32-evb.menu.FlashFreq.40.build.flash_freq=40m
 
-
 esp32-evb.menu.UploadSpeed.115200=115200
 esp32-evb.menu.UploadSpeed.115200.upload.speed=115200
 
@@ -5289,11 +8073,30 @@ esp32-evb.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (Large APPS with OTA)
 esp32-evb.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
 esp32-evb.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
 
+esp32-evb.menu.DebugLevel.none=None
+esp32-evb.menu.DebugLevel.none.build.code_debug=0
+esp32-evb.menu.DebugLevel.error=Error
+esp32-evb.menu.DebugLevel.error.build.code_debug=1
+esp32-evb.menu.DebugLevel.warn=Warn
+esp32-evb.menu.DebugLevel.warn.build.code_debug=2
+esp32-evb.menu.DebugLevel.info=Info
+esp32-evb.menu.DebugLevel.info.build.code_debug=3
+esp32-evb.menu.DebugLevel.debug=Debug
+esp32-evb.menu.DebugLevel.debug.build.code_debug=4
+esp32-evb.menu.DebugLevel.verbose=Verbose
+esp32-evb.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 esp32-gateway.name=OLIMEX ESP32-GATEWAY
 
+esp32-gateway.bootloader.tool=esptool_py
+esp32-gateway.bootloader.tool.default=esptool_py
+
 esp32-gateway.upload.tool=esptool_py
+esp32-gateway.upload.tool.default=esptool_py
+esp32-gateway.upload.tool.network=esp_ota
+
 esp32-gateway.upload.maximum_size=1310720
 esp32-gateway.upload.maximum_data_size=327680
 esp32-gateway.upload.flags=
@@ -5328,7 +8131,6 @@ esp32-gateway.menu.FlashFreq.80.build.flash_freq=80m
 esp32-gateway.menu.FlashFreq.40=40MHz
 esp32-gateway.menu.FlashFreq.40.build.flash_freq=40m
 
-
 esp32-gateway.menu.UploadSpeed.115200=115200
 esp32-gateway.menu.UploadSpeed.115200.upload.speed=115200
 
@@ -5341,11 +8143,30 @@ esp32-gateway.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (Large APPS with OT
 esp32-gateway.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
 esp32-gateway.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
 
+esp32-gateway.menu.DebugLevel.none=None
+esp32-gateway.menu.DebugLevel.none.build.code_debug=0
+esp32-gateway.menu.DebugLevel.error=Error
+esp32-gateway.menu.DebugLevel.error.build.code_debug=1
+esp32-gateway.menu.DebugLevel.warn=Warn
+esp32-gateway.menu.DebugLevel.warn.build.code_debug=2
+esp32-gateway.menu.DebugLevel.info=Info
+esp32-gateway.menu.DebugLevel.info.build.code_debug=3
+esp32-gateway.menu.DebugLevel.debug=Debug
+esp32-gateway.menu.DebugLevel.debug.build.code_debug=4
+esp32-gateway.menu.DebugLevel.verbose=Verbose
+esp32-gateway.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 esp32-poe.name=OLIMEX ESP32-PoE
 
+esp32-poe.bootloader.tool=esptool_py
+esp32-poe.bootloader.tool.default=esptool_py
+
 esp32-poe.upload.tool=esptool_py
+esp32-poe.upload.tool.default=esptool_py
+esp32-poe.upload.tool.network=esp_ota
+
 esp32-poe.upload.maximum_size=1310720
 esp32-poe.upload.maximum_data_size=327680
 esp32-poe.upload.flags=
@@ -5374,7 +8195,6 @@ esp32-poe.menu.FlashFreq.80.build.flash_freq=80m
 esp32-poe.menu.FlashFreq.40=40MHz
 esp32-poe.menu.FlashFreq.40.build.flash_freq=40m
 
-
 esp32-poe.menu.UploadSpeed.115200=115200
 esp32-poe.menu.UploadSpeed.115200.upload.speed=115200
 
@@ -5387,11 +8207,30 @@ esp32-poe.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (Large APPS with OTA)
 esp32-poe.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
 esp32-poe.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
 
+esp32-poe.menu.DebugLevel.none=None
+esp32-poe.menu.DebugLevel.none.build.code_debug=0
+esp32-poe.menu.DebugLevel.error=Error
+esp32-poe.menu.DebugLevel.error.build.code_debug=1
+esp32-poe.menu.DebugLevel.warn=Warn
+esp32-poe.menu.DebugLevel.warn.build.code_debug=2
+esp32-poe.menu.DebugLevel.info=Info
+esp32-poe.menu.DebugLevel.info.build.code_debug=3
+esp32-poe.menu.DebugLevel.debug=Debug
+esp32-poe.menu.DebugLevel.debug.build.code_debug=4
+esp32-poe.menu.DebugLevel.verbose=Verbose
+esp32-poe.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 esp32-poe-iso.name=OLIMEX ESP32-PoE-ISO
 
+esp32-poe-iso.bootloader.tool=esptool_py
+esp32-poe-iso.bootloader.tool.default=esptool_py
+
 esp32-poe-iso.upload.tool=esptool_py
+esp32-poe-iso.upload.tool.default=esptool_py
+esp32-poe-iso.upload.tool.network=esp_ota
+
 esp32-poe-iso.upload.maximum_size=1310720
 esp32-poe-iso.upload.maximum_data_size=327680
 esp32-poe-iso.upload.flags=
@@ -5420,7 +8259,6 @@ esp32-poe-iso.menu.FlashFreq.80.build.flash_freq=80m
 esp32-poe-iso.menu.FlashFreq.40=40MHz
 esp32-poe-iso.menu.FlashFreq.40.build.flash_freq=40m
 
-
 esp32-poe-iso.menu.UploadSpeed.115200=115200
 esp32-poe-iso.menu.UploadSpeed.115200.upload.speed=115200
 
@@ -5433,11 +8271,30 @@ esp32-poe-iso.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (Large APPS with OT
 esp32-poe-iso.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
 esp32-poe-iso.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
 
+esp32-poe-iso.menu.DebugLevel.none=None
+esp32-poe-iso.menu.DebugLevel.none.build.code_debug=0
+esp32-poe-iso.menu.DebugLevel.error=Error
+esp32-poe-iso.menu.DebugLevel.error.build.code_debug=1
+esp32-poe-iso.menu.DebugLevel.warn=Warn
+esp32-poe-iso.menu.DebugLevel.warn.build.code_debug=2
+esp32-poe-iso.menu.DebugLevel.info=Info
+esp32-poe-iso.menu.DebugLevel.info.build.code_debug=3
+esp32-poe-iso.menu.DebugLevel.debug=Debug
+esp32-poe-iso.menu.DebugLevel.debug.build.code_debug=4
+esp32-poe-iso.menu.DebugLevel.verbose=Verbose
+esp32-poe-iso.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 esp32-DevKitLipo.name=OLIMEX ESP32-DevKit-LiPo
 
+esp32-DevKitLipo.bootloader.tool=esptool_py
+esp32-DevKitLipo.bootloader.tool.default=esptool_py
+
 esp32-DevKitLipo.upload.tool=esptool_py
+esp32-DevKitLipo.upload.tool.default=esptool_py
+esp32-DevKitLipo.upload.tool.network=esp_ota
+
 esp32-DevKitLipo.upload.maximum_size=1310720
 esp32-DevKitLipo.upload.maximum_data_size=327680
 esp32-DevKitLipo.upload.flags=
@@ -5510,11 +8367,31 @@ esp32-DevKitLipo.menu.UploadSpeed.460800.macosx=460800
 esp32-DevKitLipo.menu.UploadSpeed.460800.upload.speed=460800
 esp32-DevKitLipo.menu.UploadSpeed.512000.windows=512000
 esp32-DevKitLipo.menu.UploadSpeed.512000.upload.speed=512000
+
+esp32-DevKitLipo.menu.DebugLevel.none=None
+esp32-DevKitLipo.menu.DebugLevel.none.build.code_debug=0
+esp32-DevKitLipo.menu.DebugLevel.error=Error
+esp32-DevKitLipo.menu.DebugLevel.error.build.code_debug=1
+esp32-DevKitLipo.menu.DebugLevel.warn=Warn
+esp32-DevKitLipo.menu.DebugLevel.warn.build.code_debug=2
+esp32-DevKitLipo.menu.DebugLevel.info=Info
+esp32-DevKitLipo.menu.DebugLevel.info.build.code_debug=3
+esp32-DevKitLipo.menu.DebugLevel.debug=Debug
+esp32-DevKitLipo.menu.DebugLevel.debug.build.code_debug=4
+esp32-DevKitLipo.menu.DebugLevel.verbose=Verbose
+esp32-DevKitLipo.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 espino32.name=ThaiEasyElec's ESPino32
 
+espino32.bootloader.tool=esptool_py
+espino32.bootloader.tool.default=esptool_py
+
 espino32.upload.tool=esptool_py
+espino32.upload.tool.default=esptool_py
+espino32.upload.tool.network=esp_ota
+
 espino32.upload.maximum_size=1310720
 espino32.upload.maximum_data_size=327680
 espino32.upload.flags=
@@ -5558,11 +8435,30 @@ espino32.menu.UploadSpeed.460800.upload.speed=460800
 espino32.menu.UploadSpeed.512000.windows=512000
 espino32.menu.UploadSpeed.512000.upload.speed=512000
 
+espino32.menu.DebugLevel.none=None
+espino32.menu.DebugLevel.none.build.code_debug=0
+espino32.menu.DebugLevel.error=Error
+espino32.menu.DebugLevel.error.build.code_debug=1
+espino32.menu.DebugLevel.warn=Warn
+espino32.menu.DebugLevel.warn.build.code_debug=2
+espino32.menu.DebugLevel.info=Info
+espino32.menu.DebugLevel.info.build.code_debug=3
+espino32.menu.DebugLevel.debug=Debug
+espino32.menu.DebugLevel.debug.build.code_debug=4
+espino32.menu.DebugLevel.verbose=Verbose
+espino32.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 m5stack-core-esp32.name=M5Stack-Core-ESP32
 
+m5stack-core-esp32.bootloader.tool=esptool_py
+m5stack-core-esp32.bootloader.tool.default=esptool_py
+
 m5stack-core-esp32.upload.tool=esptool_py
+m5stack-core-esp32.upload.tool.default=esptool_py
+m5stack-core-esp32.upload.tool.network=esp_ota
+
 m5stack-core-esp32.upload.maximum_size=1310720
 m5stack-core-esp32.upload.maximum_data_size=327680
 m5stack-core-esp32.upload.flags=
@@ -5645,7 +8541,13 @@ m5stack-core-esp32.menu.DebugLevel.verbose.build.code_debug=5
 
 m5stack-fire.name=M5Stack-FIRE
 
+m5stack-fire.bootloader.tool=esptool_py
+m5stack-fire.bootloader.tool.default=esptool_py
+
 m5stack-fire.upload.tool=esptool_py
+m5stack-fire.upload.tool.default=esptool_py
+m5stack-fire.upload.tool.network=esp_ota
+
 m5stack-fire.upload.maximum_size=6553600
 m5stack-fire.upload.maximum_data_size=4521984
 m5stack-fire.upload.flags=
@@ -5716,7 +8618,13 @@ m5stack-fire.menu.DebugLevel.verbose.build.code_debug=5
 
 m5stick-c.name=M5Stick-C
 
+m5stick-c.bootloader.tool=esptool_py
+m5stick-c.bootloader.tool.default=esptool_py
+
 m5stick-c.upload.tool=esptool_py
+m5stick-c.upload.tool.default=esptool_py
+m5stick-c.upload.tool.network=esp_ota
+
 m5stick-c.upload.maximum_size=1310720
 m5stick-c.upload.maximum_data_size=327680
 m5stick-c.upload.flags=
@@ -5750,7 +8658,6 @@ m5stick-c.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (Large APPS with OTA)
 m5stick-c.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
 m5stick-c.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
 
-
 m5stick-c.menu.UploadSpeed.1500000=1500000
 m5stick-c.menu.UploadSpeed.1500000.upload.speed=1500000
 m5stick-c.menu.UploadSpeed.750000=750000
@@ -5762,8 +8669,6 @@ m5stick-c.menu.UploadSpeed.250000.upload.speed=250000
 m5stick-c.menu.UploadSpeed.115200=115200
 m5stick-c.menu.UploadSpeed.115200.upload.speed=115200
 
-
-
 m5stick-c.menu.DebugLevel.none=None
 m5stick-c.menu.DebugLevel.none.build.code_debug=0
 m5stick-c.menu.DebugLevel.error=Error
@@ -5781,7 +8686,13 @@ m5stick-c.menu.DebugLevel.verbose.build.code_debug=5
 
 m5stack-atom.name=M5Stack-ATOM
 
+m5stack-atom.bootloader.tool=esptool_py
+m5stack-atom.bootloader.tool.default=esptool_py
+
 m5stack-atom.upload.tool=esptool_py
+m5stack-atom.upload.tool.default=esptool_py
+m5stack-atom.upload.tool.network=esp_ota
+
 m5stack-atom.upload.maximum_size=1310720
 m5stack-atom.upload.maximum_data_size=327680
 m5stack-atom.upload.flags=
@@ -5815,7 +8726,6 @@ m5stack-atom.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (Large APPS with OTA
 m5stack-atom.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
 m5stack-atom.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
 
-
 m5stack-atom.menu.UploadSpeed.1500000=1500000
 m5stack-atom.menu.UploadSpeed.1500000.upload.speed=1500000
 m5stack-atom.menu.UploadSpeed.750000=750000
@@ -5827,8 +8737,6 @@ m5stack-atom.menu.UploadSpeed.250000.upload.speed=250000
 m5stack-atom.menu.UploadSpeed.115200=115200
 m5stack-atom.menu.UploadSpeed.115200.upload.speed=115200
 
-
-
 m5stack-atom.menu.DebugLevel.none=None
 m5stack-atom.menu.DebugLevel.none.build.code_debug=0
 m5stack-atom.menu.DebugLevel.error=Error
@@ -5842,12 +8750,17 @@ m5stack-atom.menu.DebugLevel.debug.build.code_debug=4
 m5stack-atom.menu.DebugLevel.verbose=Verbose
 m5stack-atom.menu.DebugLevel.verbose.build.code_debug=5
 
-
 ##############################################################
 
 m5stack-core2.name=M5Stack-Core2
 
+m5stack-core2.bootloader.tool=esptool_py
+m5stack-core2.bootloader.tool.default=esptool_py
+
 m5stack-core2.upload.tool=esptool_py
+m5stack-core2.upload.tool.default=esptool_py
+m5stack-core2.upload.tool.network=esp_ota
+
 m5stack-core2.upload.maximum_size=6553600
 m5stack-core2.upload.maximum_data_size=4521984
 m5stack-core2.upload.wait_for_upload_port=true
@@ -5953,7 +8866,13 @@ m5stack-core2.menu.DebugLevel.verbose.build.code_debug=5
 
 m5stack-timer-cam.name=M5Stack-Timer-CAM
 
+m5stack-timer-cam.bootloader.tool=esptool_py
+m5stack-timer-cam.bootloader.tool.default=esptool_py
+
 m5stack-timer-cam.upload.tool=esptool_py
+m5stack-timer-cam.upload.tool.default=esptool_py
+m5stack-timer-cam.upload.tool.network=esp_ota
+
 m5stack-timer-cam.upload.maximum_size=1310720
 m5stack-timer-cam.upload.maximum_data_size=327680
 m5stack-timer-cam.upload.wait_for_upload_port=true
@@ -6051,7 +8970,13 @@ m5stack-timer-cam.menu.DebugLevel.verbose.build.code_debug=5
 
 m5stack-coreink.name=M5Stack-CoreInk
 
+m5stack-coreink.bootloader.tool=esptool_py
+m5stack-coreink.bootloader.tool.default=esptool_py
+
 m5stack-coreink.upload.tool=esptool_py
+m5stack-coreink.upload.tool.default=esptool_py
+m5stack-coreink.upload.tool.network=esp_ota
+
 m5stack-coreink.upload.maximum_size=1310720
 m5stack-coreink.upload.maximum_data_size=327680
 m5stack-coreink.upload.wait_for_upload_port=true
@@ -6120,7 +9045,13 @@ m5stack-coreink.menu.DebugLevel.verbose.build.code_debug=5
 
 odroid_esp32.name=ODROID ESP32
 
+odroid_esp32.bootloader.tool=esptool_py
+odroid_esp32.bootloader.tool.default=esptool_py
+
 odroid_esp32.upload.tool=esptool_py
+odroid_esp32.upload.tool.default=esptool_py
+odroid_esp32.upload.tool.network=esp_ota
+
 odroid_esp32.upload.maximum_size=1310720
 odroid_esp32.upload.maximum_data_size=327680
 odroid_esp32.upload.flags=
@@ -6204,7 +9135,13 @@ odroid_esp32.menu.DebugLevel.verbose.build.code_debug=5
 
 heltec_wifi_kit_32.name=Heltec WiFi Kit 32
 
+heltec_wifi_kit_32.bootloader.tool=esptool_py
+heltec_wifi_kit_32.bootloader.tool.default=esptool_py
+
 heltec_wifi_kit_32.upload.tool=esptool_py
+heltec_wifi_kit_32.upload.tool.default=esptool_py
+heltec_wifi_kit_32.upload.tool.network=esp_ota
+
 heltec_wifi_kit_32.upload.maximum_size=1310720
 heltec_wifi_kit_32.upload.maximum_data_size=327680
 heltec_wifi_kit_32.upload.flags=
@@ -6277,7 +9214,13 @@ heltec_wifi_kit_32.menu.DebugLevel.verbose.build.code_debug=5
 
 heltec_wifi_lora_32.name=Heltec WiFi LoRa 32
 
+heltec_wifi_lora_32.bootloader.tool=esptool_py
+heltec_wifi_lora_32.bootloader.tool.default=esptool_py
+
 heltec_wifi_lora_32.upload.tool=esptool_py
+heltec_wifi_lora_32.upload.tool.default=esptool_py
+heltec_wifi_lora_32.upload.tool.network=esp_ota
+
 heltec_wifi_lora_32.upload.maximum_size=1310720
 heltec_wifi_lora_32.upload.maximum_data_size=327680
 heltec_wifi_lora_32.upload.flags=
@@ -6378,7 +9321,13 @@ heltec_wifi_lora_32.menu.LoRaWanDebugLevel.3.build.LoRaWanDebugLevel=3
 
 heltec_wifi_lora_32_V2.name=Heltec WiFi LoRa 32(V2)
 
+heltec_wifi_lora_32_V2.bootloader.tool=esptool_py
+heltec_wifi_lora_32_V2.bootloader.tool.default=esptool_py
+
 heltec_wifi_lora_32_V2.upload.tool=esptool_py
+heltec_wifi_lora_32_V2.upload.tool.default=esptool_py
+heltec_wifi_lora_32_V2.upload.tool.network=esp_ota
+
 heltec_wifi_lora_32_V2.upload.maximum_size=3342336
 heltec_wifi_lora_32_V2.upload.maximum_data_size=327680
 heltec_wifi_lora_32_V2.upload.flags=
@@ -6479,7 +9428,13 @@ heltec_wifi_lora_32_V2.menu.LoRaWanDebugLevel.3.build.LoRaWanDebugLevel=3
 
 heltec_wireless_stick.name=Heltec Wireless Stick
 
+heltec_wireless_stick.bootloader.tool=esptool_py
+heltec_wireless_stick.bootloader.tool.default=esptool_py
+
 heltec_wireless_stick.upload.tool=esptool_py
+heltec_wireless_stick.upload.tool.default=esptool_py
+heltec_wireless_stick.upload.tool.network=esp_ota
+
 heltec_wireless_stick.upload.maximum_size=3342336
 heltec_wireless_stick.upload.maximum_data_size=327680
 heltec_wireless_stick.upload.flags=
@@ -6580,7 +9535,13 @@ heltec_wireless_stick.menu.LoRaWanDebugLevel.3.build.LoRaWanDebugLevel=3
 
 heltec_wireless_stick_lite.name=Heltec Wireless Stick Lite
 
+heltec_wireless_stick_lite.bootloader.tool=esptool_py
+heltec_wireless_stick_lite.bootloader.tool.default=esptool_py
+
 heltec_wireless_stick_lite.upload.tool=esptool_py
+heltec_wireless_stick_lite.upload.tool.default=esptool_py
+heltec_wireless_stick_lite.upload.tool.network=esp_ota
+
 heltec_wireless_stick_lite.upload.maximum_size=1310720
 heltec_wireless_stick_lite.upload.maximum_data_size=327680
 heltec_wireless_stick_lite.upload.wait_for_upload_port=true
@@ -6682,7 +9643,13 @@ heltec_wireless_stick_lite.menu.LoRaWanDebugLevel.3.build.LoRaWanDebugLevel=3
 
 espectro32.name=ESPectro32
 
+espectro32.bootloader.tool=esptool_py
+espectro32.bootloader.tool.default=esptool_py
+
 espectro32.upload.tool=esptool_py
+espectro32.upload.tool.default=esptool_py
+espectro32.upload.tool.network=esp_ota
+
 espectro32.upload.maximum_size=1310720
 espectro32.upload.maximum_data_size=327680
 espectro32.upload.flags=
@@ -6758,11 +9725,17 @@ espectro32.menu.DebugLevel.debug.build.code_debug=4
 espectro32.menu.DebugLevel.verbose=Verbose
 espectro32.menu.DebugLevel.verbose.build.code_debug=5
 
-
 ##############################################################
+
 CoreESP32.name=Microduino-CoreESP32
 
+CoreESP32.bootloader.tool=esptool_py
+CoreESP32.bootloader.tool.default=esptool_py
+
 CoreESP32.upload.tool=esptool_py
+CoreESP32.upload.tool.default=esptool_py
+CoreESP32.upload.tool.network=esp_ota
+
 CoreESP32.upload.maximum_size=1310720
 CoreESP32.upload.maximum_data_size=327680
 CoreESP32.upload.flags=
@@ -6841,10 +9814,15 @@ CoreESP32.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
 
-
 alksesp32.name=ALKS ESP32
 
+alksesp32.bootloader.tool=esptool_py
+alksesp32.bootloader.tool.default=esptool_py
+
 alksesp32.upload.tool=esptool_py
+alksesp32.upload.tool.default=esptool_py
+alksesp32.upload.tool.network=esp_ota
+
 alksesp32.upload.maximum_size=1310720
 alksesp32.upload.maximum_data_size=327680
 alksesp32.upload.flags=
@@ -6977,10 +9955,15 @@ alksesp32.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
 
-
 wipy3.name=WiPy 3.0
 
+wipy3.bootloader.tool=esptool_py
+wipy3.bootloader.tool.default=esptool_py
+
 wipy3.upload.tool=esptool_py
+wipy3.upload.tool.default=esptool_py
+wipy3.upload.tool.network=esp_ota
+
 wipy3.upload.maximum_size=1310720
 wipy3.upload.maximum_data_size=294912
 wipy3.upload.flags=
@@ -7041,7 +10024,13 @@ wipy3.menu.DebugLevel.verbose.build.code_debug=5
 
 wt32-eth01.name=WT32-ETH01 Ethernet Module
 
+wt32-eth01.bootloader.tool=esptool_py
+wt32-eth01.bootloader.tool.default=esptool_py
+
 wt32-eth01.upload.tool=esptool_py
+wt32-eth01.upload.tool.default=esptool_py
+wt32-eth01.upload.tool.network=esp_ota
+
 wt32-eth01.upload.maximum_size=8388608
 wt32-eth01.upload.maximum_data_size=327680
 wt32-eth01.upload.flags=
@@ -7055,7 +10044,7 @@ wt32-eth01.build.bootloader_addr=0x1000
 wt32-eth01.build.target=esp32
 wt32-eth01.build.mcu=esp32
 wt32-eth01.build.core=esp32
-wt32-eth01.build.variant=wt32-eth0
+wt32-eth01.build.variant=wt32-eth01
 wt32-eth01.build.board=WT32_ETH01
 
 wt32-eth01.build.f_cpu=240000000L
@@ -7136,7 +10125,13 @@ wt32-eth01.menu.DebugLevel.verbose.build.code_debug=5
 
 bpi-bit.name=BPI-BIT
 
+bpi-bit.bootloader.tool=esptool_py
+bpi-bit.bootloader.tool.default=esptool_py
+
 bpi-bit.upload.tool=esptool_py
+bpi-bit.upload.tool.default=esptool_py
+bpi-bit.upload.tool.network=esp_ota
+
 bpi-bit.upload.maximum_size=1310720
 bpi-bit.upload.maximum_data_size=294912
 bpi-bit.upload.flags=
@@ -7179,11 +10174,30 @@ bpi-bit.menu.UploadSpeed.460800.upload.speed=460800
 bpi-bit.menu.UploadSpeed.512000.windows=512000
 bpi-bit.menu.UploadSpeed.512000.upload.speed=512000
 
+bpi-bit.menu.DebugLevel.none=None
+bpi-bit.menu.DebugLevel.none.build.code_debug=0
+bpi-bit.menu.DebugLevel.error=Error
+bpi-bit.menu.DebugLevel.error.build.code_debug=1
+bpi-bit.menu.DebugLevel.warn=Warn
+bpi-bit.menu.DebugLevel.warn.build.code_debug=2
+bpi-bit.menu.DebugLevel.info=Info
+bpi-bit.menu.DebugLevel.info.build.code_debug=3
+bpi-bit.menu.DebugLevel.debug=Debug
+bpi-bit.menu.DebugLevel.debug.build.code_debug=4
+bpi-bit.menu.DebugLevel.verbose=Verbose
+bpi-bit.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 wesp32.name=Silicognition wESP32
 
+wesp32.bootloader.tool=esptool_py
+wesp32.bootloader.tool.default=esptool_py
+
 wesp32.upload.tool=esptool_py
+wesp32.upload.tool.default=esptool_py
+wesp32.upload.tool.network=esp_ota
+
 wesp32.upload.maximum_size=1310720
 wesp32.upload.maximum_data_size=327680
 wesp32.upload.flags=
@@ -7244,7 +10258,13 @@ wesp32.menu.DebugLevel.verbose.build.code_debug=5
 
 t-beam.name=T-Beam
 
+t-beam.bootloader.tool=esptool_py
+t-beam.bootloader.tool.default=esptool_py
+
 t-beam.upload.tool=esptool_py
+t-beam.upload.tool.default=esptool_py
+t-beam.upload.tool.network=esp_ota
+
 t-beam.upload.maximum_size=1310720
 t-beam.upload.maximum_data_size=327680
 t-beam.upload.flags=
@@ -7311,7 +10331,13 @@ t-beam.menu.DebugLevel.verbose.build.code_debug=5
 
 d-duino-32.name=D-duino-32
 
+d-duino-32.bootloader.tool=esptool_py
+d-duino-32.bootloader.tool.default=esptool_py
+
 d-duino-32.upload.tool=esptool_py
+d-duino-32.upload.tool.default=esptool_py
+d-duino-32.upload.tool.network=esp_ota
+
 d-duino-32.upload.maximum_size=1310720
 d-duino-32.upload.maximum_data_size=327680
 d-duino-32.upload.flags=
@@ -7386,7 +10412,13 @@ d-duino-32.menu.DebugLevel.verbose.build.code_debug=5
 
 lopy.name=LoPy
 
+lopy.bootloader.tool=esptool_py
+lopy.bootloader.tool.default=esptool_py
+
 lopy.upload.tool=esptool_py
+lopy.upload.tool.default=esptool_py
+lopy.upload.tool.network=esp_ota
+
 lopy.upload.maximum_size=1310720
 lopy.upload.maximum_data_size=327680
 lopy.upload.flags=
@@ -7446,7 +10478,13 @@ lopy.menu.DebugLevel.verbose.build.code_debug=5
 
 lopy4.name=LoPy4
 
+lopy4.bootloader.tool=esptool_py
+lopy4.bootloader.tool.default=esptool_py
+
 lopy4.upload.tool=esptool_py
+lopy4.upload.tool.default=esptool_py
+lopy4.upload.tool.network=esp_ota
+
 lopy4.upload.maximum_size=1310720
 lopy4.upload.maximum_data_size=327680
 lopy4.upload.flags=
@@ -7513,7 +10551,13 @@ lopy4.menu.DebugLevel.verbose.build.code_debug=5
 
 oroca_edubot.name=OROCA EduBot
 
+oroca_edubot.bootloader.tool=esptool_py
+oroca_edubot.bootloader.tool.default=esptool_py
+
 oroca_edubot.upload.tool=esptool_py
+oroca_edubot.upload.tool.default=esptool_py
+oroca_edubot.upload.tool.network=esp_ota
+
 oroca_edubot.upload.maximum_size=3145728
 oroca_edubot.upload.maximum_data_size=327680
 oroca_edubot.upload.flags=
@@ -7577,8 +10621,6 @@ oroca_edubot.menu.DebugLevel.debug.build.code_debug=4
 oroca_edubot.menu.DebugLevel.verbose=Verbose
 oroca_edubot.menu.DebugLevel.verbose.build.code_debug=5
 
-
-
 ##############################################################
 
 fm-devkit.name=ESP32 FM DevKit
@@ -7640,7 +10682,13 @@ fm-devkit.menu.DebugLevel.verbose.build.code_debug=5
 
 frogboard.name=Frog Board ESP32
 
+frogboard.bootloader.tool=esptool_py
+frogboard.bootloader.tool.default=esptool_py
+
 frogboard.upload.tool=esptool_py
+frogboard.upload.tool.default=esptool_py
+frogboard.upload.tool.network=esp_ota
+
 frogboard.upload.maximum_size=1310720
 frogboard.upload.maximum_data_size=327680
 frogboard.upload.flags=
@@ -7736,7 +10784,13 @@ frogboard.menu.DebugLevel.verbose.build.code_debug=5
 
 esp32cam.name=AI Thinker ESP32-CAM
 
+esp32cam.bootloader.tool=esptool_py
+esp32cam.bootloader.tool.default=esptool_py
+
 esp32cam.upload.tool=esptool_py
+esp32cam.upload.tool.default=esptool_py
+esp32cam.upload.tool.network=esp_ota
+
 esp32cam.upload.maximum_size=3145728
 esp32cam.upload.maximum_data_size=327680
 esp32cam.upload.flags=
@@ -7789,16 +10843,60 @@ esp32cam.menu.FlashMode.dout=DOUT
 esp32cam.menu.FlashMode.dout.build.flash_mode=dout
 esp32cam.menu.FlashMode.dout.build.boot=dout
 
+esp32cam.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+esp32cam.menu.PartitionScheme.huge_app.build.partitions=huge_app
+esp32cam.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+esp32cam.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+esp32cam.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+esp32cam.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+esp32cam.menu.PartitionScheme.default=Regular 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+esp32cam.menu.PartitionScheme.default.build.partitions=default
+esp32cam.menu.PartitionScheme.defaultffat=Regular 4MB with ffat (1.2MB APP/1.5MB FATFS)
+esp32cam.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+esp32cam.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+esp32cam.menu.PartitionScheme.minimal.build.partitions=minimal
+esp32cam.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+esp32cam.menu.PartitionScheme.no_ota.build.partitions=no_ota
+esp32cam.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+esp32cam.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+esp32cam.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+esp32cam.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+esp32cam.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+esp32cam.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+esp32cam.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+esp32cam.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+esp32cam.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+esp32cam.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+
 esp32cam.menu.FlashFreq.80=80MHz
 esp32cam.menu.FlashFreq.80.build.flash_freq=80m
 esp32cam.menu.FlashFreq.40=40MHz
 esp32cam.menu.FlashFreq.40.build.flash_freq=40m
 
+esp32cam.menu.DebugLevel.none=None
+esp32cam.menu.DebugLevel.none.build.code_debug=0
+esp32cam.menu.DebugLevel.error=Error
+esp32cam.menu.DebugLevel.error.build.code_debug=1
+esp32cam.menu.DebugLevel.warn=Warn
+esp32cam.menu.DebugLevel.warn.build.code_debug=2
+esp32cam.menu.DebugLevel.info=Info
+esp32cam.menu.DebugLevel.info.build.code_debug=3
+esp32cam.menu.DebugLevel.debug=Debug
+esp32cam.menu.DebugLevel.debug.build.code_debug=4
+esp32cam.menu.DebugLevel.verbose=Verbose
+esp32cam.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 twatch.name=TTGO T-Watch
 
+twatch.bootloader.tool=esptool_py
+twatch.bootloader.tool.default=esptool_py
+
 twatch.upload.tool=esptool_py
+twatch.upload.tool.default=esptool_py
+twatch.upload.tool.network=esp_ota
+
 twatch.upload.maximum_size=6553600
 twatch.upload.maximum_data_size=4521984
 twatch.upload.wait_for_upload_port=true
@@ -7883,7 +10981,13 @@ twatch.menu.DebugLevel.verbose.build.code_debug=5
 
 d1_mini32.name=WEMOS D1 MINI ESP32
 
+d1_mini32.bootloader.tool=esptool_py
+d1_mini32.bootloader.tool.default=esptool_py
+
 d1_mini32.upload.tool=esptool_py
+d1_mini32.upload.tool.default=esptool_py
+d1_mini32.upload.tool.network=esp_ota
+
 d1_mini32.upload.maximum_size=1310720
 d1_mini32.upload.maximum_data_size=327680
 d1_mini32.upload.flags=
@@ -7953,11 +11057,30 @@ d1_mini32.menu.UploadSpeed.460800.upload.speed=460800
 d1_mini32.menu.UploadSpeed.512000.windows=512000
 d1_mini32.menu.UploadSpeed.512000.upload.speed=512000
 
+d1_mini32.menu.DebugLevel.none=None
+d1_mini32.menu.DebugLevel.none.build.code_debug=0
+d1_mini32.menu.DebugLevel.error=Error
+d1_mini32.menu.DebugLevel.error.build.code_debug=1
+d1_mini32.menu.DebugLevel.warn=Warn
+d1_mini32.menu.DebugLevel.warn.build.code_debug=2
+d1_mini32.menu.DebugLevel.info=Info
+d1_mini32.menu.DebugLevel.info.build.code_debug=3
+d1_mini32.menu.DebugLevel.debug=Debug
+d1_mini32.menu.DebugLevel.debug.build.code_debug=4
+d1_mini32.menu.DebugLevel.verbose=Verbose
+d1_mini32.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 gpy.name=Pycom GPy
 
+gpy.bootloader.tool=esptool_py
+gpy.bootloader.tool.default=esptool_py
+
 gpy.upload.tool=esptool_py
+gpy.upload.tool.default=esptool_py
+gpy.upload.tool.network=esp_ota
+
 gpy.upload.maximum_size=1310720
 gpy.upload.maximum_data_size=327680
 gpy.upload.flags=
@@ -8017,7 +11140,13 @@ gpy.menu.DebugLevel.verbose.build.code_debug=5
 
 vintlabs-devkit-v1.name=VintLabs ESP32 Devkit
 
+vintlabs-devkit-v1.bootloader.tool=esptool_py
+vintlabs-devkit-v1.bootloader.tool.default=esptool_py
+
 vintlabs-devkit-v1.upload.tool=esptool_py
+vintlabs-devkit-v1.upload.tool.default=esptool_py
+vintlabs-devkit-v1.upload.tool.network=esp_ota
+
 vintlabs-devkit-v1.upload.maximum_size=1310720
 vintlabs-devkit-v1.upload.maximum_data_size=327680
 vintlabs-devkit-v1.upload.flags=
@@ -8123,7 +11252,13 @@ vintlabs-devkit-v1.menu.DebugLevel.debug.build.code_debug=4
 
 honeylemon.name=HONEYLemon
 
+honeylemon.bootloader.tool=esptool_py
+honeylemon.bootloader.tool.default=esptool_py
+
 honeylemon.upload.tool=esptool_py
+honeylemon.upload.tool.default=esptool_py
+honeylemon.upload.tool.network=esp_ota
+
 honeylemon.upload.maximum_size=1310720
 honeylemon.upload.maximum_data_size=327680
 honeylemon.upload.flags=
@@ -8167,11 +11302,30 @@ honeylemon.menu.UploadSpeed.460800.upload.speed=460800
 honeylemon.menu.UploadSpeed.512000.windows=512000
 honeylemon.menu.UploadSpeed.512000.upload.speed=512000
 
+honeylemon.menu.DebugLevel.none=None
+honeylemon.menu.DebugLevel.none.build.code_debug=0
+honeylemon.menu.DebugLevel.error=Error
+honeylemon.menu.DebugLevel.error.build.code_debug=1
+honeylemon.menu.DebugLevel.warn=Warn
+honeylemon.menu.DebugLevel.warn.build.code_debug=2
+honeylemon.menu.DebugLevel.info=Info
+honeylemon.menu.DebugLevel.info.build.code_debug=3
+honeylemon.menu.DebugLevel.debug=Debug
+honeylemon.menu.DebugLevel.debug.build.code_debug=4
+honeylemon.menu.DebugLevel.verbose=Verbose
+honeylemon.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 mgbot-iotik32a.name=MGBOT IOTIK 32A
 
+mgbot-iotik32a.bootloader.tool=esptool_py
+mgbot-iotik32a.bootloader.tool.default=esptool_py
+
 mgbot-iotik32a.upload.tool=esptool_py
+mgbot-iotik32a.upload.tool.default=esptool_py
+mgbot-iotik32a.upload.tool.network=esp_ota
+
 mgbot-iotik32a.upload.maximum_size=1310720
 mgbot-iotik32a.upload.maximum_data_size=327680
 mgbot-iotik32a.upload.flags=
@@ -8315,7 +11469,13 @@ mgbot-iotik32a.menu.DebugLevel.verbose.build.code_debug=5
 
 mgbot-iotik32b.name=MGBOT IOTIK 32B
 
+mgbot-iotik32b.bootloader.tool=esptool_py
+mgbot-iotik32b.bootloader.tool.default=esptool_py
+
 mgbot-iotik32b.upload.tool=esptool_py
+mgbot-iotik32b.upload.tool.default=esptool_py
+mgbot-iotik32b.upload.tool.network=esp_ota
+
 mgbot-iotik32b.upload.maximum_size=1310720
 mgbot-iotik32b.upload.maximum_data_size=327680
 mgbot-iotik32b.upload.flags=
@@ -8456,9 +11616,16 @@ mgbot-iotik32b.menu.DebugLevel.verbose=Verbose
 mgbot-iotik32b.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
+
 piranha_esp-32.name=Piranha ESP-32
 
+piranha_esp-32.bootloader.tool=esptool_py
+piranha_esp-32.bootloader.tool.default=esptool_py
+
 piranha_esp-32.upload.tool=esptool_py
+piranha_esp-32.upload.tool.default=esptool_py
+piranha_esp-32.upload.tool.network=esp_ota
+
 piranha_esp-32.upload.maximum_size=1310720
 piranha_esp-32.upload.maximum_data_size=327680
 piranha_esp-32.upload.flags=
@@ -8528,7 +11695,13 @@ piranha_esp-32.menu.DebugLevel.verbose.build.code_debug=5
 
 metro_esp-32.name=Metro ESP-32
 
+metro_esp-32.bootloader.tool=esptool_py
+metro_esp-32.bootloader.tool.default=esptool_py
+
 metro_esp-32.upload.tool=esptool_py
+metro_esp-32.upload.tool.default=esptool_py
+metro_esp-32.upload.tool.network=esp_ota
+
 metro_esp-32.upload.maximum_size=1310720
 metro_esp-32.upload.maximum_data_size=327680
 metro_esp-32.upload.flags=
@@ -8595,9 +11768,16 @@ metro_esp-32.menu.DebugLevel.verbose=Verbose
 metro_esp-32.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
+
 sensesiot_weizen.name=Senses's WEIZEN
 
+sensesiot_weizen.bootloader.tool=esptool_py
+sensesiot_weizen.bootloader.tool.default=esptool_py
+
 sensesiot_weizen.upload.tool=esptool_py
+sensesiot_weizen.upload.tool.default=esptool_py
+sensesiot_weizen.upload.tool.network=esp_ota
+
 sensesiot_weizen.upload.maximum_size=1310720
 sensesiot_weizen.upload.maximum_data_size=327680
 sensesiot_weizen.upload.flags=
@@ -8641,10 +11821,30 @@ sensesiot_weizen.menu.UploadSpeed.460800.upload.speed=460800
 sensesiot_weizen.menu.UploadSpeed.512000.windows=512000
 sensesiot_weizen.menu.UploadSpeed.512000.upload.speed=512000
 
+sensesiot_weizen.menu.DebugLevel.none=None
+sensesiot_weizen.menu.DebugLevel.none.build.code_debug=0
+sensesiot_weizen.menu.DebugLevel.error=Error
+sensesiot_weizen.menu.DebugLevel.error.build.code_debug=1
+sensesiot_weizen.menu.DebugLevel.warn=Warn
+sensesiot_weizen.menu.DebugLevel.warn.build.code_debug=2
+sensesiot_weizen.menu.DebugLevel.info=Info
+sensesiot_weizen.menu.DebugLevel.info.build.code_debug=3
+sensesiot_weizen.menu.DebugLevel.debug=Debug
+sensesiot_weizen.menu.DebugLevel.debug.build.code_debug=4
+sensesiot_weizen.menu.DebugLevel.verbose=Verbose
+sensesiot_weizen.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
+
 kits-edu.name=KITS ESP32 EDU
 
+kits-edu.bootloader.tool=esptool_py
+kits-edu.bootloader.tool.default=esptool_py
+
 kits-edu.upload.tool=esptool_py
+kits-edu.upload.tool.default=esptool_py
+kits-edu.upload.tool.network=esp_ota
+
 kits-edu.upload.maximum_size=1310720
 kits-edu.upload.maximum_data_size=327680
 kits-edu.upload.wait_for_upload_port=true
@@ -8710,7 +11910,13 @@ kits-edu.menu.DebugLevel.verbose.build.code_debug=5
 ##############################################################
 
 mPython.name=Labplus mPython
+mPython.bootloader.tool=esptool_py
+mPython.bootloader.tool.default=esptool_py
+
 mPython.upload.tool=esptool_py
+mPython.upload.tool.default=esptool_py
+mPython.upload.tool.network=esp_ota
+
 mPython.upload.maximum_size=1310720
 mPython.upload.maximum_data_size=327680
 mPython.upload.flags=
@@ -8772,7 +11978,6 @@ mPython.menu.PartitionScheme.fatflash.build.partitions=ffat
 mPython.menu.CPUFreq.240=240MHz (WiFi/BT)
 mPython.menu.CPUFreq.240.build.f_cpu=240000000L
 
-
 mPython.menu.FlashMode.qio=QIO
 mPython.menu.FlashMode.qio.build.flash_mode=dio
 mPython.menu.FlashMode.qio.build.boot=qio
@@ -8794,7 +11999,6 @@ mPython.menu.FlashFreq.40.build.flash_freq=40m
 mPython.menu.FlashSize.8M=8MB (64Mb)
 mPython.menu.FlashSize.8M.build.flash_size=8MB
 
-
 mPython.menu.UploadSpeed.921600=921600
 mPython.menu.UploadSpeed.921600.upload.speed=921600
 mPython.menu.UploadSpeed.115200=115200
@@ -8827,7 +12031,13 @@ mPython.menu.DebugLevel.verbose.build.code_debug=5
 
 OpenKB.name=INEX OpenKB
 
+OpenKB.bootloader.tool=esptool_py
+OpenKB.bootloader.tool.default=esptool_py
+
 OpenKB.upload.tool=esptool_py
+OpenKB.upload.tool.default=esptool_py
+OpenKB.upload.tool.network=esp_ota
+
 OpenKB.upload.maximum_size=1310720
 OpenKB.upload.maximum_data_size=327680
 OpenKB.upload.wait_for_upload_port=true
@@ -8872,11 +12082,30 @@ OpenKB.menu.UploadSpeed.460800.upload.speed=460800
 OpenKB.menu.UploadSpeed.512000.windows=512000
 OpenKB.menu.UploadSpeed.512000.upload.speed=512000
 
+OpenKB.menu.DebugLevel.none=None
+OpenKB.menu.DebugLevel.none.build.code_debug=0
+OpenKB.menu.DebugLevel.error=Error
+OpenKB.menu.DebugLevel.error.build.code_debug=1
+OpenKB.menu.DebugLevel.warn=Warn
+OpenKB.menu.DebugLevel.warn.build.code_debug=2
+OpenKB.menu.DebugLevel.info=Info
+OpenKB.menu.DebugLevel.info.build.code_debug=3
+OpenKB.menu.DebugLevel.debug=Debug
+OpenKB.menu.DebugLevel.debug.build.code_debug=4
+OpenKB.menu.DebugLevel.verbose=Verbose
+OpenKB.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 wifiduino32.name=WiFiduino32
 
+wifiduino32.bootloader.tool=esptool_py
+wifiduino32.bootloader.tool.default=esptool_py
+
 wifiduino32.upload.tool=esptool_py
+wifiduino32.upload.tool.default=esptool_py
+wifiduino32.upload.tool.network=esp_ota
+
 wifiduino32.upload.maximum_size=1310720
 wifiduino32.upload.maximum_data_size=327680
 wifiduino32.upload.wait_for_upload_port=true
@@ -8943,12 +12172,17 @@ wifiduino32.menu.DebugLevel.debug.build.code_debug=4
 wifiduino32.menu.DebugLevel.verbose=Verbose
 wifiduino32.menu.DebugLevel.verbose.build.code_debug=5
 
-
 ##############################################################
 
 imbrios-logsens-v1p1.name=IMBRIOS LOGSENS_V1P1
 
+imbrios-logsens-v1p1.bootloader.tool=esptool_py
+imbrios-logsens-v1p1.bootloader.tool.default=esptool_py
+
 imbrios-logsens-v1p1.upload.tool=esptool_py
+imbrios-logsens-v1p1.upload.tool.default=esptool_py
+imbrios-logsens-v1p1.upload.tool.network=esp_ota
+
 imbrios-logsens-v1p1.upload.maximum_size=1310720
 imbrios-logsens-v1p1.upload.maximum_data_size=327680
 imbrios-logsens-v1p1.upload.wait_for_upload_port=true
@@ -9019,11 +12253,30 @@ imbrios-logsens-v1p1.menu.UploadSpeed.460800.upload.speed=460800
 imbrios-logsens-v1p1.menu.UploadSpeed.512000.windows=512000
 imbrios-logsens-v1p1.menu.UploadSpeed.512000.upload.speed=512000
 
+imbrios-logsens-v1p1.menu.DebugLevel.none=None
+imbrios-logsens-v1p1.menu.DebugLevel.none.build.code_debug=0
+imbrios-logsens-v1p1.menu.DebugLevel.error=Error
+imbrios-logsens-v1p1.menu.DebugLevel.error.build.code_debug=1
+imbrios-logsens-v1p1.menu.DebugLevel.warn=Warn
+imbrios-logsens-v1p1.menu.DebugLevel.warn.build.code_debug=2
+imbrios-logsens-v1p1.menu.DebugLevel.info=Info
+imbrios-logsens-v1p1.menu.DebugLevel.info.build.code_debug=3
+imbrios-logsens-v1p1.menu.DebugLevel.debug=Debug
+imbrios-logsens-v1p1.menu.DebugLevel.debug.build.code_debug=4
+imbrios-logsens-v1p1.menu.DebugLevel.verbose=Verbose
+imbrios-logsens-v1p1.menu.DebugLevel.verbose.build.code_debug=5
+
 ##############################################################
 
 healthypi4.name=ProtoCentral HealthyPi 4
 
+healthypi4.bootloader.tool=esptool_py
+healthypi4.bootloader.tool.default=esptool_py
+
 healthypi4.upload.tool=esptool_py
+healthypi4.upload.tool.default=esptool_py
+healthypi4.upload.tool.network=esp_ota
+
 healthypi4.upload.maximum_size=1310720
 healthypi4.upload.maximum_data_size=327680
 healthypi4.upload.wait_for_upload_port=true
@@ -9092,10 +12345,15 @@ healthypi4.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
 
-
 ET-Board.name=ET-Board
 
+ET-Board.bootloader.tool=esptool_py
+ET-Board.bootloader.tool.default=esptool_py
+
 ET-Board.upload.tool=esptool_py
+ET-Board.upload.tool.default=esptool_py
+ET-Board.upload.tool.network=esp_ota
+
 ET-Board.upload.maximum_size=1310720
 ET-Board.upload.maximum_data_size=327680
 ET-Board.upload.wait_for_upload_port=true
@@ -9165,7 +12423,13 @@ ET-Board.menu.DebugLevel.verbose.build.code_debug=5
 
 ch_denky.name=Denky
 
+ch_denky.bootloader.tool=esptool_py
+ch_denky.bootloader.tool.default=esptool_py
+
 ch_denky.upload.tool=esptool_py
+ch_denky.upload.tool.default=esptool_py
+ch_denky.upload.tool.network=esp_ota
+
 ch_denky.upload.maximum_size=1310720
 ch_denky.upload.maximum_data_size=327680
 ch_denky.upload.flags=
@@ -9245,7 +12509,13 @@ ch_denky.menu.DebugLevel.verbose.build.code_debug=5
 
 uPesy_wrover.name=uPesy ESP32 Wrover DevKit
 
+uPesy_wrover.bootloader.tool=esptool_py
+uPesy_wrover.bootloader.tool.default=esptool_py
+
 uPesy_wrover.upload.tool=esptool_py
+uPesy_wrover.upload.tool.default=esptool_py
+uPesy_wrover.upload.tool.network=esp_ota
+
 uPesy_wrover.upload.maximum_size=1310720
 uPesy_wrover.upload.maximum_data_size=327680
 uPesy_wrover.upload.flags=
@@ -9351,7 +12621,13 @@ uPesy_wrover.menu.DebugLevel.verbose.build.code_debug=5
 
 uPesy_wroom.name=uPesy ESP32 Wroom DevKit
 
+uPesy_wroom.bootloader.tool=esptool_py
+uPesy_wroom.bootloader.tool.default=esptool_py
+
 uPesy_wroom.upload.tool=esptool_py
+uPesy_wroom.upload.tool.default=esptool_py
+uPesy_wroom.upload.tool.network=esp_ota
+
 uPesy_wroom.upload.maximum_size=1310720
 uPesy_wroom.upload.maximum_data_size=327680
 uPesy_wroom.upload.flags=
@@ -9450,7 +12726,13 @@ uPesy_wroom.menu.DebugLevel.verbose.build.code_debug=5
 
 kb32.name=KB32-FT
 
+kb32.bootloader.tool=esptool_py
+kb32.bootloader.tool.default=esptool_py
+
 kb32.upload.tool=esptool_py
+kb32.upload.tool.default=esptool_py
+kb32.upload.tool.network=esp_ota
+
 kb32.upload.maximum_size=1310720
 kb32.upload.maximum_data_size=327680
 kb32.upload.flags=
@@ -9609,7 +12891,13 @@ kb32.menu.DebugLevel.verbose.build.code_debug=5
 
 deneyapkart.name=Deneyap Kart
 
+deneyapkart.bootloader.tool=esptool_py
+deneyapkart.bootloader.tool.default=esptool_py
+
 deneyapkart.upload.tool=esptool_py
+deneyapkart.upload.tool.default=esptool_py
+deneyapkart.upload.tool.network=esp_ota
+
 deneyapkart.upload.maximum_size=1310720
 deneyapkart.upload.maximum_data_size=327680
 deneyapkart.upload.wait_for_upload_port=true
@@ -9664,6 +12952,11 @@ deneyapkart.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
 deneyapkart.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
 deneyapkart.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
 deneyapkart.menu.PartitionScheme.fatflash.build.partitions=ffat
+deneyapkart.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+deneyapkart.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+deneyapkart.menu.PartitionScheme.rainmaker=RainMaker
+deneyapkart.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
+deneyapkart.menu.PartitionScheme.rainmaker.upload.maximum_size=3145728
 
 deneyapkart.menu.CPUFreq.240=240MHz (WiFi/BT)
 deneyapkart.menu.CPUFreq.240.build.f_cpu=240000000L
@@ -9728,7 +13021,13 @@ deneyapkart.menu.DebugLevel.verbose.build.code_debug=5
 
 esp32-trueverit-iot-driver.name=Trueverit ESP32 Universal IoT Driver
 
+esp32-trueverit-iot-driver.bootloader.tool=esptool_py
+esp32-trueverit-iot-driver.bootloader.tool.default=esptool_py
+
 esp32-trueverit-iot-driver.upload.tool=esptool_py
+esp32-trueverit-iot-driver.upload.tool.default=esptool_py
+esp32-trueverit-iot-driver.upload.tool.network=esp_ota
+
 esp32-trueverit-iot-driver.upload.maximum_size=1310720
 esp32-trueverit-iot-driver.upload.maximum_data_size=327680
 esp32-trueverit-iot-driver.upload.flags=
@@ -9785,7 +13084,13 @@ esp32-trueverit-iot-driver.menu.DebugLevel.verbose.build.code_debug=5
 
 esp32-trueverit-iot-driver-mkii.name=Trueverit ESP32 Universal IoT Driver MK II
 
+esp32-trueverit-iot-driver-mkii.bootloader.tool=esptool_py
+esp32-trueverit-iot-driver-mkii.bootloader.tool.default=esptool_py
+
 esp32-trueverit-iot-driver-mkii.upload.tool=esptool_py
+esp32-trueverit-iot-driver-mkii.upload.tool.default=esptool_py
+esp32-trueverit-iot-driver-mkii.upload.tool.network=esp_ota
+
 esp32-trueverit-iot-driver-mkii.upload.maximum_size=1310720
 esp32-trueverit-iot-driver-mkii.upload.maximum_data_size=327680
 esp32-trueverit-iot-driver-mkii.upload.flags=
@@ -9844,7 +13149,13 @@ atmegazero_esp32s2.name=ATMegaZero ESP32-S2
 atmegazero_esp32s2.vid.0=0x239A
 atmegazero_esp32s2.pid.0=0x800A
 
+atmegazero_esp32s2.bootloader.tool=esptool_py
+atmegazero_esp32s2.bootloader.tool.default=esptool_py
+
 atmegazero_esp32s2.upload.tool=esptool_py
+atmegazero_esp32s2.upload.tool.default=esptool_py
+atmegazero_esp32s2.upload.tool.network=esp_ota
+
 atmegazero_esp32s2.upload.maximum_size=1310720
 atmegazero_esp32s2.upload.maximum_data_size=327680
 atmegazero_esp32s2.upload.flags=
@@ -10006,7 +13317,13 @@ deneyapmini.name=Deneyap Mini
 deneyapmini.vid.0=0x303a
 deneyapmini.pid.0=0x0002
 
+deneyapmini.bootloader.tool=esptool_py
+deneyapmini.bootloader.tool.default=esptool_py
+
 deneyapmini.upload.tool=esptool_py
+deneyapmini.upload.tool.default=esptool_py
+deneyapmini.upload.tool.network=esp_ota
+
 deneyapmini.upload.maximum_size=1310720
 deneyapmini.upload.maximum_data_size=327680
 deneyapmini.upload.flags=
@@ -10173,7 +13490,13 @@ franzininho_wifi_esp32s2.name=Franzininho WiFi
 franzininho_wifi_esp32s2.vid.0=0x303A
 franzininho_wifi_esp32s2.pid.0=0x80A9
 
+franzininho_wifi_esp32s2.bootloader.tool=esptool_py
+franzininho_wifi_esp32s2.bootloader.tool.default=esptool_py
+
 franzininho_wifi_esp32s2.upload.tool=esptool_py
+franzininho_wifi_esp32s2.upload.tool.default=esptool_py
+franzininho_wifi_esp32s2.upload.tool.network=esp_ota
+
 franzininho_wifi_esp32s2.upload.maximum_size=1310720
 franzininho_wifi_esp32s2.upload.maximum_data_size=327680
 franzininho_wifi_esp32s2.upload.flags=
@@ -10270,7 +13593,13 @@ franzininho_wifi_msc_esp32s2.name=Franzininho WiFi MSC
 franzininho_wifi_msc_esp32s2.vid.0=0x303A
 franzininho_wifi_msc_esp32s2.pid.0=0x80A9
 
+franzininho_wifi_msc_esp32s2.bootloader.tool=esptool_py
+franzininho_wifi_msc_esp32s2.bootloader.tool.default=esptool_py
+
 franzininho_wifi_msc_esp32s2.upload.tool=esptool_py
+franzininho_wifi_msc_esp32s2.upload.tool.default=esptool_py
+franzininho_wifi_msc_esp32s2.upload.tool.network=esp_ota
+
 franzininho_wifi_msc_esp32s2.upload.maximum_size=1310720
 franzininho_wifi_msc_esp32s2.upload.maximum_data_size=327680
 franzininho_wifi_msc_esp32s2.upload.flags=
@@ -10365,7 +13694,13 @@ franzininho_wifi_msc_esp32s2.menu.DebugLevel.verbose.build.code_debug=5
 
 dpu_esp32.name=DPU ESP32
 
+dpu_esp32.bootloader.tool=esptool_py
+dpu_esp32.bootloader.tool.default=esptool_py
+
 dpu_esp32.upload.tool=esptool_py
+dpu_esp32.upload.tool.default=esptool_py
+dpu_esp32.upload.tool.network=esp_ota
+
 dpu_esp32.upload.maximum_size=3342336
 dpu_esp32.upload.maximum_data_size=327680
 dpu_esp32.upload.flags=
@@ -10474,7 +13809,13 @@ dpu_esp32.menu.DebugLevel.verbose.build.code_debug=5
 
 sonoff_dualr3.name=Sonoff DUALR3
 
+sonoff_dualr3.bootloader.tool=esptool_py
+sonoff_dualr3.bootloader.tool.default=esptool_py
+
 sonoff_dualr3.upload.tool=esptool_py
+sonoff_dualr3.upload.tool.default=esptool_py
+sonoff_dualr3.upload.tool.network=esp_ota
+
 sonoff_dualr3.upload.maximum_size=1310720
 sonoff_dualr3.upload.maximum_data_size=327680
 sonoff_dualr3.upload.flags=
@@ -10572,3 +13913,465 @@ sonoff_dualr3.menu.DebugLevel.verbose=Verbose
 sonoff_dualr3.menu.DebugLevel.verbose.build.code_debug=5
 
 ##############################################################
+lionbit.name=Lion:Bit Dev Board
+
+lionbit.bootloader.tool=esptool_py
+lionbit.bootloader.tool.default=esptool_py
+
+lionbit.upload.tool=esptool_py
+lionbit.upload.tool.default=esptool_py
+lionbit.upload.tool.network=esp_ota
+
+lionbit.upload.maximum_size=1310720
+lionbit.upload.maximum_data_size=327680
+lionbit.upload.flags=
+lionbit.upload.extra_flags=
+
+lionbit.serial.disableDTR=true
+lionbit.serial.disableRTS=true
+
+lionbit.build.tarch=xtensa
+lionbit.build.bootloader_addr=0x1000
+lionbit.build.target=esp32
+lionbit.build.mcu=esp32
+lionbit.build.core=esp32
+lionbit.build.variant=lionbit
+lionbit.build.board=Lion:Bit_Dev_Board
+
+lionbit.build.f_cpu=240000000L
+lionbit.build.flash_size=4MB
+lionbit.build.flash_freq=80m
+lionbit.build.flash_mode=dio
+lionbit.build.boot=dio
+lionbit.build.partitions=default
+lionbit.build.defines=
+lionbit.build.loop_core=
+lionbit.build.event_core=
+
+
+lionbit.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+lionbit.menu.PartitionScheme.default.build.partitions=default
+lionbit.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+lionbit.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+lionbit.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
+lionbit.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+lionbit.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+lionbit.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+lionbit.menu.PartitionScheme.minimal.build.partitions=minimal
+lionbit.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+lionbit.menu.PartitionScheme.no_ota.build.partitions=no_ota
+lionbit.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+lionbit.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+lionbit.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+lionbit.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+lionbit.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+lionbit.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+lionbit.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+lionbit.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+lionbit.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+lionbit.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+lionbit.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+lionbit.menu.PartitionScheme.huge_app.build.partitions=huge_app
+lionbit.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+lionbit.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+lionbit.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+lionbit.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+lionbit.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
+lionbit.menu.PartitionScheme.fatflash.build.partitions=ffat
+lionbit.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+lionbit.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
+lionbit.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+lionbit.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+lionbit.menu.PartitionScheme.rainmaker=RainMaker
+lionbit.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
+lionbit.menu.PartitionScheme.rainmaker.upload.maximum_size=3145728
+
+lionbit.menu.CPUFreq.240=240MHz (WiFi/BT)
+lionbit.menu.CPUFreq.240.build.f_cpu=240000000L
+lionbit.menu.CPUFreq.160=160MHz (WiFi/BT)
+lionbit.menu.CPUFreq.160.build.f_cpu=160000000L
+lionbit.menu.CPUFreq.80=80MHz (WiFi/BT)
+lionbit.menu.CPUFreq.80.build.f_cpu=80000000L
+lionbit.menu.CPUFreq.40=40MHz (40MHz XTAL)
+lionbit.menu.CPUFreq.40.build.f_cpu=40000000L
+lionbit.menu.CPUFreq.26=26MHz (26MHz XTAL)
+lionbit.menu.CPUFreq.26.build.f_cpu=26000000L
+lionbit.menu.CPUFreq.20=20MHz (40MHz XTAL)
+lionbit.menu.CPUFreq.20.build.f_cpu=20000000L
+lionbit.menu.CPUFreq.13=13MHz (26MHz XTAL)
+lionbit.menu.CPUFreq.13.build.f_cpu=13000000L
+lionbit.menu.CPUFreq.10=10MHz (40MHz XTAL)
+lionbit.menu.CPUFreq.10.build.f_cpu=10000000L
+
+
+lionbit.menu.FlashMode.dio=DIO
+lionbit.menu.FlashMode.dio.build.flash_mode=dio
+lionbit.menu.FlashMode.dio.build.boot=dio
+lionbit.menu.FlashMode.qio=QIO
+lionbit.menu.FlashMode.qio.build.flash_mode=dio
+lionbit.menu.FlashMode.qio.build.boot=qio
+lionbit.menu.FlashMode.qout=QOUT
+lionbit.menu.FlashMode.qout.build.flash_mode=dout
+lionbit.menu.FlashMode.qout.build.boot=qout
+lionbit.menu.FlashMode.dout=DOUT
+lionbit.menu.FlashMode.dout.build.flash_mode=dout
+lionbit.menu.FlashMode.dout.build.boot=dout
+
+lionbit.menu.FlashFreq.80=80MHz
+lionbit.menu.FlashFreq.80.build.flash_freq=80m
+lionbit.menu.FlashFreq.40=40MHz
+lionbit.menu.FlashFreq.40.build.flash_freq=40m
+
+lionbit.menu.FlashSize.4M=4MB (32Mb)
+lionbit.menu.FlashSize.4M.build.flash_size=4MB
+lionbit.menu.FlashSize.4M.build.partitions=default
+
+
+
+lionbit.menu.UploadSpeed.115200=115200
+lionbit.menu.UploadSpeed.115200.upload.speed=115200
+lionbit.menu.UploadSpeed.256000.windows=256000
+lionbit.menu.UploadSpeed.256000.upload.speed=256000
+lionbit.menu.UploadSpeed.230400.windows.upload.speed=256000
+lionbit.menu.UploadSpeed.230400=230400
+lionbit.menu.UploadSpeed.230400.upload.speed=230400
+lionbit.menu.UploadSpeed.460800.linux=460800
+lionbit.menu.UploadSpeed.460800.macosx=460800
+lionbit.menu.UploadSpeed.460800.upload.speed=460800
+
+
+lionbit.menu.LoopCore.1=Core 1
+lionbit.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
+lionbit.menu.LoopCore.0=Core 0
+lionbit.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
+
+lionbit.menu.EventsCore.1=Core 1
+lionbit.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
+lionbit.menu.EventsCore.0=Core 0
+lionbit.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
+
+lionbit.menu.DebugLevel.none=None
+lionbit.menu.DebugLevel.none.build.code_debug=0
+lionbit.menu.DebugLevel.error=Error
+lionbit.menu.DebugLevel.error.build.code_debug=1
+lionbit.menu.DebugLevel.warn=Warn
+lionbit.menu.DebugLevel.warn.build.code_debug=2
+lionbit.menu.DebugLevel.info=Info
+lionbit.menu.DebugLevel.info.build.code_debug=3
+lionbit.menu.DebugLevel.debug=Debug
+lionbit.menu.DebugLevel.debug.build.code_debug=4
+lionbit.menu.DebugLevel.verbose=Verbose
+lionbit.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
+watchy.name=Watchy
+
+watchy.bootloader.tool=esptool_py
+watchy.bootloader.tool.default=esptool_py
+
+watchy.upload.tool=esptool_py
+watchy.upload.tool.default=esptool_py
+watchy.upload.tool.network=esp_ota
+
+watchy.upload.maximum_size=1310720
+watchy.upload.maximum_data_size=327680
+watchy.upload.flags=
+watchy.upload.extra_flags=
+
+watchy.serial.disableDTR=true
+watchy.serial.disableRTS=true
+
+watchy.build.tarch=xtensa
+watchy.build.bootloader_addr=0x1000
+watchy.build.target=esp32
+watchy.build.mcu=esp32
+watchy.build.core=esp32
+watchy.build.variant=watchy
+watchy.build.board=WATCHY
+
+watchy.build.f_cpu=240000000L
+watchy.build.flash_size=4MB
+watchy.build.flash_freq=80m
+watchy.build.flash_mode=dio
+watchy.build.boot=qio
+watchy.build.partitions=min_spiffs
+watchy.build.defines=
+
+watchy.menu.Revision.v10=Watchy v1.0
+watchy.menu.Revision.v10.build.board=WATCHY_V10
+watchy.menu.Revision.v15=Watchy v1.5
+watchy.menu.Revision.v15.build.board=WATCHY_V15
+watchy.menu.Revision.v20=Watchy v2.0
+watchy.menu.Revision.v20.build.board=WATCHY_V20
+
+watchy.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+watchy.menu.PartitionScheme.huge_app.build.partitions=huge_app
+watchy.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+watchy.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+watchy.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+watchy.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+
+watchy.menu.UploadSpeed.921600=921600
+watchy.menu.UploadSpeed.921600.upload.speed=921600
+watchy.menu.UploadSpeed.115200=115200
+watchy.menu.UploadSpeed.115200.upload.speed=115200
+watchy.menu.UploadSpeed.256000.windows=256000
+watchy.menu.UploadSpeed.256000.upload.speed=256000
+watchy.menu.UploadSpeed.230400.windows.upload.speed=256000
+watchy.menu.UploadSpeed.230400=230400
+watchy.menu.UploadSpeed.230400.upload.speed=230400
+watchy.menu.UploadSpeed.460800.linux=460800
+watchy.menu.UploadSpeed.460800.macosx=460800
+watchy.menu.UploadSpeed.460800.upload.speed=460800
+watchy.menu.UploadSpeed.512000.windows=512000
+watchy.menu.UploadSpeed.512000.upload.speed=512000
+
+watchy.menu.DebugLevel.none=None
+watchy.menu.DebugLevel.none.build.code_debug=0
+watchy.menu.DebugLevel.error=Error
+watchy.menu.DebugLevel.error.build.code_debug=1
+watchy.menu.DebugLevel.warn=Warn
+watchy.menu.DebugLevel.warn.build.code_debug=2
+watchy.menu.DebugLevel.info=Info
+watchy.menu.DebugLevel.info.build.code_debug=3
+watchy.menu.DebugLevel.debug=Debug
+watchy.menu.DebugLevel.debug.build.code_debug=4
+watchy.menu.DebugLevel.verbose=Verbose
+watchy.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
+deneyapkart1A.name=Deneyap Kart 1A
+
+deneyapkart1A.bootloader.tool=esptool_py
+deneyapkart1A.bootloader.tool.default=esptool_py
+
+deneyapkart1A.upload.tool=esptool_py
+deneyapkart1A.upload.tool.default=esptool_py
+deneyapkart1A.upload.tool.network=esp_ota
+
+deneyapkart1A.upload.maximum_size=1310720
+deneyapkart1A.upload.maximum_data_size=327680
+deneyapkart1A.upload.wait_for_upload_port=true
+deneyapkart1A.upload.flags=
+deneyapkart1A.upload.extra_flags=
+
+deneyapkart1A.serial.disableDTR=true
+deneyapkart1A.serial.disableRTS=true
+
+deneyapkart1A.build.tarch=xtensa
+deneyapkart1A.build.bootloader_addr=0x1000
+deneyapkart1A.build.target=esp32
+deneyapkart1A.build.mcu=esp32
+deneyapkart1A.build.core=esp32
+deneyapkart1A.build.variant=deneyapkart1A
+deneyapkart1A.build.board=DYDK1A
+
+deneyapkart1A.build.f_cpu=240000000L
+deneyapkart1A.build.flash_size=4MB
+deneyapkart1A.build.flash_freq=40m
+deneyapkart1A.build.flash_mode=dio
+deneyapkart1A.build.boot=dio
+deneyapkart1A.build.partitions=default
+deneyapkart1A.build.defines=-DBOARD_HAS_PSRAM -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-strategy=memw
+deneyapkart1A.build.extra_libs=
+
+deneyapkart1A.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+deneyapkart1A.menu.PartitionScheme.default.build.partitions=default
+deneyapkart1A.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+deneyapkart1A.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+deneyapkart1A.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
+deneyapkart1A.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+deneyapkart1A.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+deneyapkart1A.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+deneyapkart1A.menu.PartitionScheme.minimal.build.partitions=minimal
+deneyapkart1A.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+deneyapkart1A.menu.PartitionScheme.no_ota.build.partitions=no_ota
+deneyapkart1A.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+deneyapkart1A.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+deneyapkart1A.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+deneyapkart1A.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+deneyapkart1A.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+deneyapkart1A.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+deneyapkart1A.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+deneyapkart1A.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+deneyapkart1A.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+deneyapkart1A.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+deneyapkart1A.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+deneyapkart1A.menu.PartitionScheme.huge_app.build.partitions=huge_app
+deneyapkart1A.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+deneyapkart1A.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+deneyapkart1A.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+deneyapkart1A.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+deneyapkart1A.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
+deneyapkart1A.menu.PartitionScheme.fatflash.build.partitions=ffat
+deneyapkart1A.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
+deneyapkart1A.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
+deneyapkart1A.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
+deneyapkart1A.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
+deneyapkart1A.menu.PartitionScheme.rainmaker=RainMaker
+deneyapkart1A.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
+deneyapkart1A.menu.PartitionScheme.rainmaker.upload.maximum_size=3145728
+
+deneyapkart1A.menu.CPUFreq.240=240MHz (WiFi/BT)
+deneyapkart1A.menu.CPUFreq.240.build.f_cpu=240000000L
+deneyapkart1A.menu.CPUFreq.160=160MHz (WiFi/BT)
+deneyapkart1A.menu.CPUFreq.160.build.f_cpu=160000000L
+deneyapkart1A.menu.CPUFreq.80=80MHz (WiFi/BT)
+deneyapkart1A.menu.CPUFreq.80.build.f_cpu=80000000L
+deneyapkart1A.menu.CPUFreq.40=40MHz
+deneyapkart1A.menu.CPUFreq.40.build.f_cpu=40000000L
+deneyapkart1A.menu.CPUFreq.20=20MHz 
+deneyapkart1A.menu.CPUFreq.20.build.f_cpu=20000000L
+deneyapkart1A.menu.CPUFreq.10=10MHz
+deneyapkart1A.menu.CPUFreq.10.build.f_cpu=10000000L
+
+deneyapkart1A.menu.FlashMode.qio=QIO
+deneyapkart1A.menu.FlashMode.qio.build.flash_mode=dio
+deneyapkart1A.menu.FlashMode.qio.build.boot=qio
+deneyapkart1A.menu.FlashMode.dio=DIO
+deneyapkart1A.menu.FlashMode.dio.build.flash_mode=dio
+deneyapkart1A.menu.FlashMode.dio.build.boot=dio
+deneyapkart1A.menu.FlashMode.qout=QOUT
+deneyapkart1A.menu.FlashMode.qout.build.flash_mode=dout
+deneyapkart1A.menu.FlashMode.qout.build.boot=qout
+deneyapkart1A.menu.FlashMode.dout=DOUT
+deneyapkart1A.menu.FlashMode.dout.build.flash_mode=dout
+deneyapkart1A.menu.FlashMode.dout.build.boot=dout
+
+deneyapkart1A.menu.FlashFreq.80=80MHz
+deneyapkart1A.menu.FlashFreq.80.build.flash_freq=80m
+deneyapkart1A.menu.FlashFreq.40=40MHz
+deneyapkart1A.menu.FlashFreq.40.build.flash_freq=40m
+
+deneyapkart1A.menu.UploadSpeed.921600=921600
+deneyapkart1A.menu.UploadSpeed.921600.upload.speed=921600
+deneyapkart1A.menu.UploadSpeed.115200=115200
+deneyapkart1A.menu.UploadSpeed.115200.upload.speed=115200
+deneyapkart1A.menu.UploadSpeed.256000.windows=256000
+deneyapkart1A.menu.UploadSpeed.256000.upload.speed=256000
+deneyapkart1A.menu.UploadSpeed.230400.windows.upload.speed=256000
+deneyapkart1A.menu.UploadSpeed.230400=230400
+deneyapkart1A.menu.UploadSpeed.230400.upload.speed=230400
+deneyapkart1A.menu.UploadSpeed.460800.linux=460800
+deneyapkart1A.menu.UploadSpeed.460800.macosx=460800
+deneyapkart1A.menu.UploadSpeed.460800.upload.speed=460800
+deneyapkart1A.menu.UploadSpeed.512000.windows=512000
+deneyapkart1A.menu.UploadSpeed.512000.upload.speed=512000
+
+deneyapkart1A.menu.DebugLevel.none=None
+deneyapkart1A.menu.DebugLevel.none.build.code_debug=0
+deneyapkart1A.menu.DebugLevel.error=Error
+deneyapkart1A.menu.DebugLevel.error.build.code_debug=1
+deneyapkart1A.menu.DebugLevel.warn=Warn
+deneyapkart1A.menu.DebugLevel.warn.build.code_debug=2
+deneyapkart1A.menu.DebugLevel.info=Info
+deneyapkart1A.menu.DebugLevel.info.build.code_debug=3
+deneyapkart1A.menu.DebugLevel.debug=Debug
+deneyapkart1A.menu.DebugLevel.debug.build.code_debug=4
+deneyapkart1A.menu.DebugLevel.verbose=Verbose
+deneyapkart1A.menu.DebugLevel.verbose.build.code_debug=5
+
+##############################################################
+
+AirM2M_CORE_ESP32C3.name=AirM2M_CORE_ESP32C3
+AirM2M_CORE_ESP32C3.vid.0=0x303a
+AirM2M_CORE_ESP32C3.pid.0=0x1001
+
+AirM2M_CORE_ESP32C3.upload.tool=esptool_py
+AirM2M_CORE_ESP32C3.upload.maximum_size=1310720
+AirM2M_CORE_ESP32C3.upload.maximum_data_size=327680
+AirM2M_CORE_ESP32C3.upload.flags=
+AirM2M_CORE_ESP32C3.upload.extra_flags=
+AirM2M_CORE_ESP32C3.upload.use_1200bps_touch=false
+AirM2M_CORE_ESP32C3.upload.wait_for_upload_port=false
+
+AirM2M_CORE_ESP32C3.serial.disableDTR=false
+AirM2M_CORE_ESP32C3.serial.disableRTS=false
+
+AirM2M_CORE_ESP32C3.build.tarch=riscv32
+AirM2M_CORE_ESP32C3.build.target=esp
+AirM2M_CORE_ESP32C3.build.mcu=esp32c3
+AirM2M_CORE_ESP32C3.build.core=esp32
+AirM2M_CORE_ESP32C3.build.variant=AirM2M_CORE_ESP32C3
+AirM2M_CORE_ESP32C3.build.board=AirM2M_CORE_ESP32C3
+AirM2M_CORE_ESP32C3.build.bootloader_addr=0x0
+
+AirM2M_CORE_ESP32C3.build.cdc_on_boot=0
+AirM2M_CORE_ESP32C3.build.f_cpu=160000000L
+AirM2M_CORE_ESP32C3.build.flash_size=4MB
+AirM2M_CORE_ESP32C3.build.flash_freq=80m
+AirM2M_CORE_ESP32C3.build.flash_mode=dio
+AirM2M_CORE_ESP32C3.build.boot=dio
+AirM2M_CORE_ESP32C3.build.partitions=default
+AirM2M_CORE_ESP32C3.build.defines=
+
+AirM2M_CORE_ESP32C3.menu.CDCOnBoot.default=Disabled
+AirM2M_CORE_ESP32C3.menu.CDCOnBoot.default.build.cdc_on_boot=0
+AirM2M_CORE_ESP32C3.menu.CDCOnBoot.cdc=Enabled
+AirM2M_CORE_ESP32C3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
+
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.default.build.partitions=default
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.minimal.build.partitions=minimal
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.no_ota.build.partitions=no_ota
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.huge_app.build.partitions=huge_app
+AirM2M_CORE_ESP32C3.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+
+AirM2M_CORE_ESP32C3.menu.CPUFreq.160=160MHz (WiFi)
+AirM2M_CORE_ESP32C3.menu.CPUFreq.160.build.f_cpu=160000000L
+AirM2M_CORE_ESP32C3.menu.CPUFreq.80=80MHz (WiFi)
+AirM2M_CORE_ESP32C3.menu.CPUFreq.80.build.f_cpu=80000000L
+AirM2M_CORE_ESP32C3.menu.CPUFreq.40=40MHz
+AirM2M_CORE_ESP32C3.menu.CPUFreq.40.build.f_cpu=40000000L
+AirM2M_CORE_ESP32C3.menu.CPUFreq.20=20MHz
+AirM2M_CORE_ESP32C3.menu.CPUFreq.20.build.f_cpu=20000000L
+AirM2M_CORE_ESP32C3.menu.CPUFreq.10=10MHz
+AirM2M_CORE_ESP32C3.menu.CPUFreq.10.build.f_cpu=10000000L
+
+AirM2M_CORE_ESP32C3.menu.FlashFreq.80=80MHz
+AirM2M_CORE_ESP32C3.menu.FlashFreq.80.build.flash_freq=80m
+AirM2M_CORE_ESP32C3.menu.FlashFreq.40=40MHz
+AirM2M_CORE_ESP32C3.menu.FlashFreq.40.build.flash_freq=40m
+
+AirM2M_CORE_ESP32C3.menu.UploadSpeed.921600=921600
+AirM2M_CORE_ESP32C3.menu.UploadSpeed.921600.upload.speed=921600
+AirM2M_CORE_ESP32C3.menu.UploadSpeed.115200=115200
+AirM2M_CORE_ESP32C3.menu.UploadSpeed.115200.upload.speed=115200
+AirM2M_CORE_ESP32C3.menu.UploadSpeed.1152000=1152000
+AirM2M_CORE_ESP32C3.menu.UploadSpeed.1152000.upload.speed=1152000
+
+
+AirM2M_CORE_ESP32C3.menu.DebugLevel.none=None
+AirM2M_CORE_ESP32C3.menu.DebugLevel.none.build.code_debug=0
+AirM2M_CORE_ESP32C3.menu.DebugLevel.error=Error
+AirM2M_CORE_ESP32C3.menu.DebugLevel.error.build.code_debug=1
+AirM2M_CORE_ESP32C3.menu.DebugLevel.warn=Warn
+AirM2M_CORE_ESP32C3.menu.DebugLevel.warn.build.code_debug=2
+AirM2M_CORE_ESP32C3.menu.DebugLevel.info=Info
+AirM2M_CORE_ESP32C3.menu.DebugLevel.info.build.code_debug=3
+AirM2M_CORE_ESP32C3.menu.DebugLevel.debug=Debug
+AirM2M_CORE_ESP32C3.menu.DebugLevel.debug.build.code_debug=4
+AirM2M_CORE_ESP32C3.menu.DebugLevel.verbose=Verbose
+AirM2M_CORE_ESP32C3.menu.DebugLevel.verbose.build.code_debug=5
+
+#############################################################
diff --git a/component.mk b/component.mk
deleted file mode 100644
index 4b85ee4f217..00000000000
--- a/component.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-ARDUINO_ALL_LIBRARIES := $(patsubst $(COMPONENT_PATH)/libraries/%,%,$(wildcard $(COMPONENT_PATH)/libraries/*))
-
-# Macro returns non-empty if Arduino library $(1) should be included in the build
-# (either because selective compilation is of, or this library is enabled
-define ARDUINO_LIBRARY_ENABLED
-$(if $(CONFIG_ARDUINO_SELECTIVE_COMPILATION),$(CONFIG_ARDUINO_SELECTIVE_$(1)),y)
-endef
-
-ARDUINO_ENABLED_LIBRARIES := $(foreach LIBRARY,$(sort $(ARDUINO_ALL_LIBRARIES)),$(if $(call ARDUINO_LIBRARY_ENABLED,$(LIBRARY)),$(LIBRARY)))
-
-$(info Arduino libraries in build: $(ARDUINO_ENABLED_LIBRARIES))
-
-# Expand all subdirs under $(1)
-define EXPAND_SUBDIRS
-$(sort $(dir $(wildcard $(1)/* $(1)/*/* $(1)/*/*/* $(1)/*/*/*/* $(1)/*/*/*/*/*)))
-endef
-
-# Macro returns SRCDIRS for library
-define ARDUINO_LIBRARY_GET_SRCDIRS
-	$(if $(wildcard $(COMPONENT_PATH)/libraries/$(1)/src/.), 							\
-		$(call EXPAND_SUBDIRS,$(COMPONENT_PATH)/libraries/$(1)/src), 					\
-		$(filter-out $(call EXPAND_SUBDIRS,$(COMPONENT_PATH)/libraries/$(1)/examples),  \
-			$(call EXPAND_SUBDIRS,$(COMPONENT_PATH)/libraries/$(1)) 				   	\
-		) 																				\
-	)
-endef
-
-# Make a list of all srcdirs in enabled libraries
-ARDUINO_LIBRARY_SRCDIRS := $(patsubst $(COMPONENT_PATH)/%,%,$(foreach LIBRARY,$(ARDUINO_ENABLED_LIBRARIES),$(call ARDUINO_LIBRARY_GET_SRCDIRS,$(LIBRARY))))
-
-#$(info Arduino libraries src dirs: $(ARDUINO_LIBRARY_SRCDIRS))
-
-COMPONENT_ADD_INCLUDEDIRS := cores/esp32 variants/esp32 $(ARDUINO_LIBRARY_SRCDIRS)
-COMPONENT_PRIV_INCLUDEDIRS := cores/esp32/libb64
-COMPONENT_SRCDIRS := cores/esp32/libb64 cores/esp32 variants/esp32 $(ARDUINO_LIBRARY_SRCDIRS)
-CXXFLAGS += -fno-rtti
diff --git a/cores/esp32/Arduino.h b/cores/esp32/Arduino.h
index 8014d3c8342..c8be9222b39 100644
--- a/cores/esp32/Arduino.h
+++ b/cores/esp32/Arduino.h
@@ -166,6 +166,7 @@ void shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t val);
 #include "Udp.h"
 #include "HardwareSerial.h"
 #include "Esp.h"
+#include "esp32/spiram.h"
 
 using std::abs;
 using std::isinf;
@@ -181,7 +182,10 @@ uint16_t makeWord(uint8_t h, uint8_t l);
 
 size_t getArduinoLoopTaskStackSize(void);
 #define SET_LOOP_TASK_STACK_SIZE(sz) size_t getArduinoLoopTaskStackSize() { return sz;}
-    
+
+// allows user to bypass esp_spiram_test()
+#define BYPASS_SPIRAM_TEST(bypass) bool testSPIRAM(void) { if (bypass) return true; else return esp_spiram_test(); }
+
 unsigned long pulseIn(uint8_t pin, uint8_t state, unsigned long timeout = 1000000L);
 unsigned long pulseInLong(uint8_t pin, uint8_t state, unsigned long timeout = 1000000L);
 
@@ -191,6 +195,10 @@ extern "C" void configTime(long gmtOffset_sec, int daylightOffset_sec,
 extern "C" void configTzTime(const char* tz,
         const char* server1, const char* server2 = nullptr, const char* server3 = nullptr);
 
+void setToneChannel(uint8_t channel = 0);
+void tone(uint8_t _pin, unsigned int frequency, unsigned long duration = 0);
+void noTone(uint8_t _pin);
+
 // WMath prototypes
 long random(long);
 #endif /* __cplusplus */
diff --git a/cores/esp32/Esp.cpp b/cores/esp32/Esp.cpp
index 49126b881a5..6cca85ac64c 100644
--- a/cores/esp32/Esp.cpp
+++ b/cores/esp32/Esp.cpp
@@ -40,6 +40,10 @@ extern "C" {
 #include "esp32s2/rom/spi_flash.h"
 #include "soc/efuse_reg.h"
 #define ESP_FLASH_IMAGE_BASE 0x1000
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/spi_flash.h"
+#include "soc/efuse_reg.h"
+#define ESP_FLASH_IMAGE_BASE 0x0000     // Esp32s3 is located at 0x0000
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/spi_flash.h"
 #define ESP_FLASH_IMAGE_BASE 0x0000     // Esp32c3 is located at 0x0000
diff --git a/cores/esp32/HWCDC.cpp b/cores/esp32/HWCDC.cpp
index 3f6927dda27..8912fed9330 100644
--- a/cores/esp32/HWCDC.cpp
+++ b/cores/esp32/HWCDC.cpp
@@ -12,7 +12,7 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 #include "USB.h"
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
 
 #include "esp32-hal.h"
 #include "HWCDC.h"
@@ -167,19 +167,21 @@ void HWCDC::begin(unsigned long baud)
     setRxBufferSize(256);//default if not preset
     setTxBufferSize(256);//default if not preset
 
-    usb_serial_jtag_ll_clr_intsts_mask(USB_SERIAL_JTAG_INTR_SERIAL_IN_EMPTY | USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT | USB_SERIAL_JTAG_INTR_BUS_RESET);
+    usb_serial_jtag_ll_disable_intr_mask(USB_SERIAL_JTAG_LL_INTR_MASK);
+    usb_serial_jtag_ll_clr_intsts_mask(USB_SERIAL_JTAG_LL_INTR_MASK);
     usb_serial_jtag_ll_ena_intr_mask(USB_SERIAL_JTAG_INTR_SERIAL_IN_EMPTY | USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT | USB_SERIAL_JTAG_INTR_BUS_RESET);
     if(!intr_handle && esp_intr_alloc(ETS_USB_SERIAL_JTAG_INTR_SOURCE, 0, hw_cdc_isr_handler, NULL, &intr_handle) != ESP_OK){
         isr_log_e("HW USB CDC failed to init interrupts");
         end();
         return;
     }
+    usb_serial_jtag_ll_txfifo_flush();
 }
 
 void HWCDC::end()
 {
     //Disable tx/rx interrupt.
-    usb_serial_jtag_ll_disable_intr_mask(USB_SERIAL_JTAG_INTR_SERIAL_IN_EMPTY | USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT | USB_SERIAL_JTAG_INTR_BUS_RESET);
+    usb_serial_jtag_ll_disable_intr_mask(USB_SERIAL_JTAG_LL_INTR_MASK);
     esp_intr_free(intr_handle);
     intr_handle = NULL;
     if(tx_lock != NULL) {
@@ -379,10 +381,12 @@ void HWCDC::setDebugOutput(bool en)
     }
 }
 
-#if ARDUINO_HW_CDC_ON_BOOT //Serial used for USB CDC
+#if ARDUINO_USB_MODE
+#if ARDUINO_USB_CDC_ON_BOOT//Serial used for USB CDC
 HWCDC Serial;
 #else
 HWCDC USBSerial;
 #endif
+#endif
 
 #endif /* CONFIG_TINYUSB_CDC_ENABLED */
diff --git a/cores/esp32/HWCDC.h b/cores/esp32/HWCDC.h
index 81a334b76b9..5878ad0377f 100644
--- a/cores/esp32/HWCDC.h
+++ b/cores/esp32/HWCDC.h
@@ -14,7 +14,7 @@
 #pragma once
 
 #include "sdkconfig.h"
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
 
 #include <inttypes.h>
 #include "esp_event.h"
@@ -98,10 +98,12 @@ class HWCDC: public Stream
 
 };
 
-#if ARDUINO_HW_CDC_ON_BOOT //Serial used for USB CDC
+#if ARDUINO_USB_MODE
+#if ARDUINO_USB_CDC_ON_BOOT//Serial used for USB CDC
 extern HWCDC Serial;
 #else
 extern HWCDC USBSerial;
 #endif
+#endif
 
 #endif /* CONFIG_IDF_TARGET_ESP32C3 */
diff --git a/cores/esp32/HardwareSerial.cpp b/cores/esp32/HardwareSerial.cpp
index aed14b19c72..323482a6bbf 100644
--- a/cores/esp32/HardwareSerial.cpp
+++ b/cores/esp32/HardwareSerial.cpp
@@ -6,11 +6,13 @@
 #include "pins_arduino.h"
 #include "HardwareSerial.h"
 #include "soc/soc_caps.h"
+#include "driver/uart.h"
+#include "freertos/queue.h"
 
 #ifndef SOC_RX0
 #if CONFIG_IDF_TARGET_ESP32
 #define SOC_RX0 3
-#elif CONFIG_IDF_TARGET_ESP32S2
+#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
 #define SOC_RX0 44
 #elif CONFIG_IDF_TARGET_ESP32C3
 #define SOC_RX0 20
@@ -20,7 +22,7 @@
 #ifndef SOC_TX0
 #if CONFIG_IDF_TARGET_ESP32
 #define SOC_TX0 1
-#elif CONFIG_IDF_TARGET_ESP32S2
+#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
 #define SOC_TX0 43
 #elif CONFIG_IDF_TARGET_ESP32C3
 #define SOC_TX0 21
@@ -39,6 +41,8 @@ void serialEvent(void) {}
 #define RX1 18
 #elif CONFIG_IDF_TARGET_ESP32C3
 #define RX1 18
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define RX1 15
 #endif
 #endif
 
@@ -49,6 +53,8 @@ void serialEvent(void) {}
 #define TX1 17
 #elif CONFIG_IDF_TARGET_ESP32C3
 #define TX1 19
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define TX1 16
 #endif
 #endif
 
@@ -60,12 +66,16 @@ void serialEvent1(void) {}
 #ifndef RX2
 #if CONFIG_IDF_TARGET_ESP32
 #define RX2 16
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define RX2 19 
 #endif
 #endif
 
 #ifndef TX2
 #if CONFIG_IDF_TARGET_ESP32
 #define TX2 17
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define TX2 20
 #endif
 #endif
 
@@ -76,8 +86,6 @@ void serialEvent2(void) {}
 #if !defined(NO_GLOBAL_INSTANCES) && !defined(NO_GLOBAL_SERIAL)
 #if ARDUINO_USB_CDC_ON_BOOT //Serial used for USB CDC
 HardwareSerial Serial0(0);
-#elif ARDUINO_HW_CDC_ON_BOOT
-HardwareSerial Serial0(0);
 #else
 HardwareSerial Serial(0);
 #endif
@@ -92,8 +100,6 @@ void serialEventRun(void)
 {
 #if ARDUINO_USB_CDC_ON_BOOT //Serial used for USB CDC
     if(Serial0.available()) serialEvent();
-#elif ARDUINO_HW_CDC_ON_BOOT
-    if(Serial0.available()) serialEvent();
 #else
     if(Serial.available()) serialEvent();
 #endif
@@ -106,8 +112,167 @@ void serialEventRun(void)
 }
 #endif
 
+#if !CONFIG_DISABLE_HAL_LOCKS
+#define HSERIAL_MUTEX_LOCK()    do {} while (xSemaphoreTake(_lock, portMAX_DELAY) != pdPASS)
+#define HSERIAL_MUTEX_UNLOCK()  xSemaphoreGive(_lock)
+#else
+#define HSERIAL_MUTEX_LOCK()    
+#define HSERIAL_MUTEX_UNLOCK()  
+#endif
+
+HardwareSerial::HardwareSerial(int uart_nr) : 
+_uart_nr(uart_nr), 
+_uart(NULL),
+_rxBufferSize(256),
+_txBufferSize(0), 
+_onReceiveCB(NULL), 
+_onReceiveErrorCB(NULL),
+_onReceiveTimeout(true),
+_rxTimeout(10),
+_eventTask(NULL)
+#if !CONFIG_DISABLE_HAL_LOCKS
+    ,_lock(NULL)
+#endif
+{
+#if !CONFIG_DISABLE_HAL_LOCKS
+    if(_lock == NULL){
+        _lock = xSemaphoreCreateMutex();
+        if(_lock == NULL){
+            log_e("xSemaphoreCreateMutex failed");
+            return;
+        }
+    }
+#endif
+}
+
+HardwareSerial::~HardwareSerial()
+{
+    end();
+#if !CONFIG_DISABLE_HAL_LOCKS
+    if(_lock != NULL){
+        vSemaphoreDelete(_lock);
+    }
+#endif
+}
+
+
+void HardwareSerial::_createEventTask(void *args)
+{
+    // Creating UART event Task
+    xTaskCreate(_uartEventTask, "uart_event_task", 2048, this, configMAX_PRIORITIES - 1, &_eventTask);
+    if (_eventTask == NULL) {
+        log_e(" -- UART%d Event Task not Created!", _uart_nr);
+    }
+}
+
+void HardwareSerial::_destroyEventTask(void)
+{
+    if (_eventTask != NULL) {
+        vTaskDelete(_eventTask);
+        _eventTask = NULL;
+    }
+}
 
-HardwareSerial::HardwareSerial(int uart_nr) : _uart_nr(uart_nr), _uart(NULL), _rxBufferSize(256) {}
+void HardwareSerial::onReceiveError(OnReceiveErrorCb function) 
+{
+    HSERIAL_MUTEX_LOCK();
+    // function may be NULL to cancel onReceive() from its respective task 
+    _onReceiveErrorCB = function;
+    // this can be called after Serial.begin(), therefore it shall create the event task
+    if (function != NULL && _uart != NULL && _eventTask == NULL) {
+        _createEventTask(this);
+    }
+    HSERIAL_MUTEX_UNLOCK();
+}
+
+void HardwareSerial::onReceive(OnReceiveCb function, bool onlyOnTimeout)
+{
+    HSERIAL_MUTEX_LOCK();
+    // function may be NULL to cancel onReceive() from its respective task 
+    _onReceiveCB = function;
+    // When Rx timeout is Zero (disabled), there is only one possible option that is callback when FIFO reaches 120 bytes
+    _onReceiveTimeout = _rxTimeout > 0 ? onlyOnTimeout : false;
+
+    // this can be called after Serial.begin(), therefore it shall create the event task
+    if (function != NULL && _uart != NULL && _eventTask == NULL) {
+        _createEventTask(this); // Create event task
+    }
+    HSERIAL_MUTEX_UNLOCK();
+}
+
+// timout is calculates in time to receive UART symbols at the UART baudrate.
+// the estimation is about 11 bits per symbol (SERIAL_8N1)
+void HardwareSerial::setRxTimeout(uint8_t symbols_timeout)
+{
+    HSERIAL_MUTEX_LOCK();
+    
+    // Zero disables timeout, thus, onReceive callback will only be called when RX FIFO reaches 120 bytes
+    // Any non-zero value will activate onReceive callback based on UART baudrate with about 11 bits per symbol 
+    _rxTimeout = symbols_timeout;   
+    if (!symbols_timeout) _onReceiveTimeout = false;  // only when RX timeout is disabled, we also must disable this flag 
+
+    if(_uart != NULL) uart_set_rx_timeout(_uart_nr, _rxTimeout); // Set new timeout
+    
+    HSERIAL_MUTEX_UNLOCK();
+}
+
+void HardwareSerial::eventQueueReset()
+{
+    QueueHandle_t uartEventQueue = NULL;
+    if (_uart == NULL) {
+	    return;
+    }
+    uartGetEventQueue(_uart, &uartEventQueue);
+    if (uartEventQueue != NULL) {
+        xQueueReset(uartEventQueue);
+    }
+}
+
+void HardwareSerial::_uartEventTask(void *args)
+{
+    HardwareSerial *uart = (HardwareSerial *)args;
+    uart_event_t event;
+    QueueHandle_t uartEventQueue = NULL;
+    uartGetEventQueue(uart->_uart, &uartEventQueue);
+    if (uartEventQueue != NULL) {
+        for(;;) {
+            //Waiting for UART event.
+            if(xQueueReceive(uartEventQueue, (void * )&event, (portTickType)portMAX_DELAY)) {
+                switch(event.type) {
+                    case UART_DATA:
+                        if(uart->_onReceiveCB && uart->available() > 0 && 
+                            ((uart->_onReceiveTimeout && event.timeout_flag) || !uart->_onReceiveTimeout) ) 
+                                uart->_onReceiveCB();
+                        break;
+                    case UART_FIFO_OVF:
+                        log_w("UART%d FIFO Overflow. Consider adding Hardware Flow Control to your Application.", uart->_uart_nr);
+                        if(uart->_onReceiveErrorCB) uart->_onReceiveErrorCB(UART_FIFO_OVF_ERROR);
+                        break;
+                    case UART_BUFFER_FULL:
+                        log_w("UART%d Buffer Full. Consider increasing your buffer size of your Application.", uart->_uart_nr);
+                        if(uart->_onReceiveErrorCB) uart->_onReceiveErrorCB(UART_BUFFER_FULL_ERROR);
+                        break;
+                    case UART_BREAK:
+                        log_w("UART%d RX break.", uart->_uart_nr);
+                        if(uart->_onReceiveErrorCB) uart->_onReceiveErrorCB(UART_BREAK_ERROR);
+                        break;
+                    case UART_PARITY_ERR:
+                        log_w("UART%d parity error.", uart->_uart_nr);
+                        if(uart->_onReceiveErrorCB) uart->_onReceiveErrorCB(UART_PARITY_ERROR);
+                        break;
+                    case UART_FRAME_ERR:
+                        log_w("UART%d frame error.", uart->_uart_nr);
+                        if(uart->_onReceiveErrorCB) uart->_onReceiveErrorCB(UART_FRAME_ERROR);
+                        break;
+                    default:
+                        log_w("UART%d unknown event type %d.", uart->_uart_nr, event.type);
+                        break;
+                }
+            }
+        }
+    }
+    vTaskDelete(NULL);
+}
 
 void HardwareSerial::begin(unsigned long baud, uint32_t config, int8_t rxPin, int8_t txPin, bool invert, unsigned long timeout_ms, uint8_t rxfifo_full_thrhd)
 {
@@ -115,29 +280,54 @@ void HardwareSerial::begin(unsigned long baud, uint32_t config, int8_t rxPin, in
         log_e("Serial number is invalid, please use numers from 0 to %u", SOC_UART_NUM - 1);
         return;
     }
+
+#if !CONFIG_DISABLE_HAL_LOCKS
+    if(_lock == NULL){
+        log_e("MUTEX Lock failed. Can't begin.");
+        return;
+    }
+#endif
+
+    HSERIAL_MUTEX_LOCK();
+    // First Time or after end() --> set default Pins
+    if (!uartIsDriverInstalled(_uart)) {
+        switch (_uart_nr) {
+            case UART_NUM_0:
+                if (rxPin < 0 && txPin < 0) {
+                    rxPin = SOC_RX0;
+                    txPin = SOC_TX0;
+                }
+            break;
+#if SOC_UART_NUM > 1                   // may save some flash bytes...
+            case UART_NUM_1:
+               if (rxPin < 0 && txPin < 0) {
+                    rxPin = RX1;
+                    txPin = TX1;
+                }
+            break;
+#endif
+#if SOC_UART_NUM > 2                   // may save some flash bytes...
+            case UART_NUM_2:
+               if (rxPin < 0 && txPin < 0) {
+                    rxPin = RX2;
+                    txPin = TX2;
+                }
+            break;
+#endif
+            default:
+                log_e("Bad UART Number");
+                return;
+        }
+    }
+
     if(_uart) {
         // in this case it is a begin() over a previous begin() - maybe to change baud rate
         // thus do not disable debug output
         end(false);
     }
-    if(_uart_nr == 0 && rxPin < 0 && txPin < 0) {
-        rxPin = SOC_RX0;
-        txPin = SOC_TX0;
-    }
-#if SOC_UART_NUM > 1
-    if(_uart_nr == 1 && rxPin < 0 && txPin < 0) {
-        rxPin = RX1;
-        txPin = TX1;
-    }
-#endif
-#if SOC_UART_NUM > 2
-    if(_uart_nr == 2 && rxPin < 0 && txPin < 0) {
-        rxPin = RX2;
-        txPin = TX2;
-    }
-#endif
 
-    _uart = uartBegin(_uart_nr, baud ? baud : 9600, config, rxPin, txPin, _rxBufferSize, invert, rxfifo_full_thrhd);
+    // IDF UART driver keeps Pin setting on restarting. Negative Pin number will keep it unmodified.
+    _uart = uartBegin(_uart_nr, baud ? baud : 9600, config, rxPin, txPin, _rxBufferSize, _txBufferSize, invert, rxfifo_full_thrhd);
     if (!baud) {
         // using baud rate as zero, forces it to try to detect the current baud rate in place
         uartStartDetectBaudrate(_uart);
@@ -151,12 +341,24 @@ void HardwareSerial::begin(unsigned long baud, uint32_t config, int8_t rxPin, in
 
         if(detectedBaudRate) {
             delay(100); // Give some time...
-            _uart = uartBegin(_uart_nr, detectedBaudRate, config, rxPin, txPin, _rxBufferSize, invert, rxfifo_full_thrhd);
+            _uart = uartBegin(_uart_nr, detectedBaudRate, config, rxPin, txPin, _rxBufferSize, _txBufferSize, invert, rxfifo_full_thrhd);
         } else {
             log_e("Could not detect baudrate. Serial data at the port must be present within the timeout for detection to be possible");
             _uart = NULL;
         }
     }
+    // create a task to deal with Serial Events when, for example, calling begin() twice to change the baudrate,
+    // or when setting the callback before calling begin() 
+    if (_uart != NULL && (_onReceiveCB != NULL || _onReceiveErrorCB != NULL) && _eventTask == NULL) {
+        _createEventTask(this);
+    }
+
+    // Set UART RX timeout
+    if (_uart != NULL) {
+        uart_set_rx_timeout(_uart_nr, _rxTimeout);
+    }
+
+    HSERIAL_MUTEX_UNLOCK();
 }
 
 void HardwareSerial::updateBaudRate(unsigned long baud)
@@ -164,14 +366,21 @@ void HardwareSerial::updateBaudRate(unsigned long baud)
 	uartSetBaudRate(_uart, baud);
 }
 
-void HardwareSerial::end(bool turnOffDebug)
+void HardwareSerial::end(bool fullyTerminate)
 {
-    if(turnOffDebug && uartGetDebug() == _uart_nr) {
-        uartSetDebug(0);
+    // default Serial.end() will completely disable HardwareSerial, 
+    // including any tasks or debug message channel (log_x()) - but not for IDF log messages!
+    if(fullyTerminate) {
+        _onReceiveCB = NULL;
+        _onReceiveErrorCB = NULL;
+        if (uartGetDebug() == _uart_nr) {
+            uartSetDebug(0);
+        }
     }
     delay(10);
     uartEnd(_uart);
     _uart = 0;
+    _destroyEventTask();
 }
 
 void HardwareSerial::setDebugOutput(bool en)
@@ -267,9 +476,16 @@ void HardwareSerial::setRxInvert(bool invert)
     uartSetRxInvert(_uart, invert);
 }
 
-void HardwareSerial::setPins(uint8_t rxPin, uint8_t txPin)
+// negative Pin value will keep it unmodified
+void HardwareSerial::setPins(int8_t rxPin, int8_t txPin, int8_t ctsPin, int8_t rtsPin)
 {
-    uartSetPins(_uart, rxPin, txPin);
+    uartSetPins(_uart, rxPin, txPin, ctsPin, rtsPin);
+}
+
+// Enables or disables Hardware Flow Control using RTS and/or CTS pins (must use setAllPins() before)
+void HardwareSerial::setHwFlowCtrlMode(uint8_t mode, uint8_t threshold)
+{
+    uartSetHwFlowCtrlMode(_uart, mode, threshold);
 }
 
 size_t HardwareSerial::setRxBufferSize(size_t new_size) {
@@ -280,10 +496,26 @@ size_t HardwareSerial::setRxBufferSize(size_t new_size) {
     }
 
     if (new_size <= SOC_UART_FIFO_LEN) {
-        log_e("RX Buffer must be higher than %d.\n", SOC_UART_FIFO_LEN);
+        log_e("RX Buffer must be higher than %d.\n", SOC_UART_FIFO_LEN);  // ESP32, S2, S3 and C3 means higher than 128
         return 0;
     }
 
     _rxBufferSize = new_size;
     return _rxBufferSize;
 }
+
+size_t HardwareSerial::setTxBufferSize(size_t new_size) {
+
+    if (_uart) {
+        log_e("TX Buffer can't be resized when Serial is already running.\n");
+        return 0;
+    }
+
+    if (new_size <= SOC_UART_FIFO_LEN) {
+        log_e("TX Buffer must be higher than %d.\n", SOC_UART_FIFO_LEN);  // ESP32, S2, S3 and C3 means higher than 128
+        return 0;
+    }
+
+    _txBufferSize = new_size;
+    return _txBufferSize;
+}
diff --git a/cores/esp32/HardwareSerial.h b/cores/esp32/HardwareSerial.h
index 40282361bf5..b7aafb68520 100644
--- a/cores/esp32/HardwareSerial.h
+++ b/cores/esp32/HardwareSerial.h
@@ -46,19 +46,61 @@
 #define HardwareSerial_h
 
 #include <inttypes.h>
-
+#include <functional>
 #include "Stream.h"
 #include "esp32-hal.h"
 #include "soc/soc_caps.h"
 #include "HWCDC.h"
 
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/semphr.h"
+
+typedef enum {
+    UART_BREAK_ERROR,
+    UART_BUFFER_FULL_ERROR,
+    UART_FIFO_OVF_ERROR,
+    UART_FRAME_ERROR,
+    UART_PARITY_ERROR
+} hardwareSerial_error_t;
+
+typedef std::function<void(void)> OnReceiveCb;
+typedef std::function<void(hardwareSerial_error_t)> OnReceiveErrorCb;
+
 class HardwareSerial: public Stream
 {
 public:
     HardwareSerial(int uart_nr);
-
+    ~HardwareSerial();
+
+    // setRxTimeout sets the timeout after which onReceive callback will be called (after receiving data, it waits for this time of UART rx inactivity to call the callback fnc)
+    // param symbols_timeout defines a timeout threshold in uart symbol periods. Setting 0 symbol timeout disables the callback call by timeout.
+    //                       Maximum timeout setting is calculacted automatically by IDF. If set above the maximum, it is ignored and an error is printed on Serial0 (check console).
+    //                       Examples: Maximum for 11 bits symbol is 92 (SERIAL_8N2, SERIAL_8E1, SERIAL_8O1, etc), Maximum for 10 bits symbol is 101 (SERIAL_8N1).
+    //                       For example symbols_timeout=1 defines a timeout equal to transmission time of one symbol (~11 bit) on current baudrate. 
+    //                       For a baudrate of 9600, SERIAL_8N1 (10 bit symbol) and symbols_timeout = 3, the timeout would be 3 / (9600 / 10) = 3.125 ms
+    void setRxTimeout(uint8_t symbols_timeout);
+
+    // onReceive will setup a callback that will be called whenever an UART interruption occurs (UART_INTR_RXFIFO_FULL or UART_INTR_RXFIFO_TOUT)
+    // UART_INTR_RXFIFO_FULL interrupt triggers at UART_FULL_THRESH_DEFAULT bytes received (defined as 120 bytes by default in IDF)
+    // UART_INTR_RXFIFO_TOUT interrupt triggers at UART_TOUT_THRESH_DEFAULT symbols passed without any reception (defined as 10 symbos by default in IDF)
+    // onlyOnTimeout parameter will define how onReceive will behave:
+    // Default: true -- The callback will only be called when RX Timeout happens. 
+    //                  Whole stream of bytes will be ready for being read on the callback function at once.
+    //                  This option may lead to Rx Overflow depending on the Rx Buffer Size and number of bytes received in the streaming
+    //         false -- The callback will be called when FIFO reaches 120 bytes and also on RX Timeout.
+    //                  The stream of incommig bytes will be "split" into blocks of 120 bytes on each callback.
+    //                  This option avoid any sort of Rx Overflow, but leaves the UART packet reassembling work to the Application.
+    void onReceive(OnReceiveCb function, bool onlyOnTimeout = true);
+
+    // onReceive will be called on error events (see hardwareSerial_error_t)
+    void onReceiveError(OnReceiveErrorCb function);
+
+    // eventQueueReset clears all events in the queue (the events that trigger onReceive and onReceiveError) - maybe usefull in some use cases
+    void eventQueueReset();
+ 
     void begin(unsigned long baud, uint32_t config=SERIAL_8N1, int8_t rxPin=-1, int8_t txPin=-1, bool invert=false, unsigned long timeout_ms = 20000UL, uint8_t rxfifo_full_thrhd = 112);
-    void end(bool turnOffDebug = true);
+    void end(bool fullyTerminate = true);
     void updateBaudRate(unsigned long baud);
     int available(void);
     int availableForWrite(void);
@@ -103,13 +145,34 @@ class HardwareSerial: public Stream
     void setDebugOutput(bool);
     
     void setRxInvert(bool);
-    void setPins(uint8_t rxPin, uint8_t txPin);
+
+    // Negative Pin Number will keep it unmodified, thus this function can set individual pins
+    // SetPins shall be called after Serial begin()
+    void setPins(int8_t rxPin, int8_t txPin, int8_t ctsPin = -1, int8_t rtsPin = -1);
+    // Enables or disables Hardware Flow Control using RTS and/or CTS pins (must use setAllPins() before)
+    void setHwFlowCtrlMode(uint8_t mode = HW_FLOWCTRL_CTS_RTS, uint8_t threshold = 64);   // 64 is half FIFO Length
+
     size_t setRxBufferSize(size_t new_size);
+    size_t setTxBufferSize(size_t new_size);
 
 protected:
     int _uart_nr;
     uart_t* _uart;
     size_t _rxBufferSize;
+    size_t _txBufferSize;
+    OnReceiveCb _onReceiveCB;
+    OnReceiveErrorCb _onReceiveErrorCB;
+    // _onReceive and _rxTimeout have be consistent when timeout is disabled
+    bool _onReceiveTimeout;
+    uint8_t _rxTimeout;
+    TaskHandle_t _eventTask;
+#if !CONFIG_DISABLE_HAL_LOCKS
+    SemaphoreHandle_t _lock;
+#endif
+
+    void _createEventTask(void *args);
+    void _destroyEventTask(void);
+    static void _uartEventTask(void *args);
 };
 
 extern void serialEventRun(void) __attribute__((weak));
@@ -119,10 +182,10 @@ extern void serialEventRun(void) __attribute__((weak));
 #define ARDUINO_USB_CDC_ON_BOOT 0
 #endif
 #if ARDUINO_USB_CDC_ON_BOOT //Serial used for USB CDC
+#if !ARDUINO_USB_MODE
 #include "USB.h"
 #include "USBCDC.h"
-extern HardwareSerial Serial0;
-#elif ARDUINO_HW_CDC_ON_BOOT
+#endif
 extern HardwareSerial Serial0;
 #else
 extern HardwareSerial Serial;
diff --git a/cores/esp32/IPAddress.cpp b/cores/esp32/IPAddress.cpp
index cabfdf32d26..0575363f254 100644
--- a/cores/esp32/IPAddress.cpp
+++ b/cores/esp32/IPAddress.cpp
@@ -120,3 +120,6 @@ bool IPAddress::fromString(const char *address)
     _address.bytes[3] = acc;
     return true;
 }
+
+// declared one time - as external in IPAddress.h
+IPAddress INADDR_NONE(0, 0, 0, 0);
diff --git a/cores/esp32/IPAddress.h b/cores/esp32/IPAddress.h
index aa1d10cee29..3bedd4f8749 100644
--- a/cores/esp32/IPAddress.h
+++ b/cores/esp32/IPAddress.h
@@ -91,6 +91,6 @@ class IPAddress: public Printable
     friend class DNSClient;
 };
 
-const IPAddress INADDR_NONE(0, 0, 0, 0);
-
+// changed to extern because const declaration creates copies in BSS of INADDR_NONE for each CPP unit that includes it
+extern IPAddress INADDR_NONE;
 #endif
diff --git a/cores/esp32/Print.h b/cores/esp32/Print.h
index 4493d4f819f..7aa1a2d00a2 100644
--- a/cores/esp32/Print.h
+++ b/cores/esp32/Print.h
@@ -108,6 +108,9 @@ class Print
     size_t println(const Printable&);
     size_t println(struct tm * timeinfo, const char * format = NULL);
     size_t println(void);
+    
+    virtual void flush() { /* Empty implementation for backward compatibility */ }
+    
 };
 
 #endif
diff --git a/cores/esp32/Stream.h b/cores/esp32/Stream.h
index 2debee7e4f9..8df8226d730 100644
--- a/cores/esp32/Stream.h
+++ b/cores/esp32/Stream.h
@@ -48,7 +48,6 @@ class Stream: public Print
     virtual int available() = 0;
     virtual int read() = 0;
     virtual int peek() = 0;
-    virtual void flush() = 0;
 
     Stream():_startMillis(0)
     {
diff --git a/cores/esp32/Tone.cpp b/cores/esp32/Tone.cpp
new file mode 100644
index 00000000000..ca69c10c13b
--- /dev/null
+++ b/cores/esp32/Tone.cpp
@@ -0,0 +1,131 @@
+#include <Arduino.h>
+#include "esp32-hal-ledc.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "freertos/semphr.h"
+
+static TaskHandle_t _tone_task = NULL;
+static QueueHandle_t _tone_queue = NULL;
+static uint8_t _channel = 0;
+
+typedef enum{
+  TONE_START,
+  TONE_END,
+  TONE_SET_CHANNEL
+} tone_cmd_t;
+
+typedef struct{
+  tone_cmd_t tone_cmd;
+  uint8_t pin;
+  unsigned int frequency;
+  unsigned long duration;
+  uint8_t channel;
+} tone_msg_t;
+
+static void tone_task(void*){
+  tone_msg_t tone_msg;
+  while(1){
+    xQueueReceive(_tone_queue, &tone_msg, portMAX_DELAY);
+    switch(tone_msg.tone_cmd){
+      case TONE_START:
+        log_d("Task received from queue TONE_START: _pin=%d, frequency=%u Hz, duration=%u ms", tone_msg.pin, tone_msg.frequency, tone_msg.duration);
+
+        log_d("Setup LED controll on channel %d", _channel);
+        // ledcSetup(_channel, tone_msg.frequency, 11);
+        // ledcAttachPin(tone_msg.pin, _channel);
+        // ledcWrite(_channel, 1024);
+        ledcWriteTone(_channel, tone_msg.frequency);
+        ledcAttachPin(tone_msg.pin, _channel);
+
+        if(tone_msg.duration){
+          delay(tone_msg.duration);
+          ledcDetachPin(tone_msg.pin);
+          ledcWriteTone(_channel, 0);
+        }
+        break;
+
+      case TONE_END:
+        log_d("Task received from queue TONE_END: pin=%d", tone_msg.pin);
+        ledcDetachPin(tone_msg.pin);
+        ledcWriteTone(_channel, 0);
+        break;
+
+      case TONE_SET_CHANNEL:
+        log_d("Task received from queue TONE_SET_CHANNEL: channel=%d", tone_msg.channel);
+        _channel = tone_msg.channel;
+        break;
+
+      default: ; // do nothing
+    } // switch
+  } // infinite loop
+}
+
+static int tone_init(){
+  if(_tone_queue == NULL){
+    log_v("Creating tone queue");
+    _tone_queue = xQueueCreate(128, sizeof(tone_msg_t));
+    if(_tone_queue == NULL){
+      log_e("Could not create tone queue");
+      return 0; // ERR
+    }
+    log_v("Tone queue created");
+  }
+
+  if(_tone_task == NULL){
+    log_v("Creating tone task");
+    xTaskCreate(
+      tone_task, // Function to implement the task
+      "toneTask", // Name of the task
+      3500,  // Stack size in words
+      NULL,  // Task input parameter
+      1,  // Priority of the task
+      &_tone_task  // Task handle.
+      );
+    if(_tone_task == NULL){
+      log_e("Could not create tone task");
+      return 0; // ERR
+    }
+    log_v("Tone task created");
+  }
+  return 1; // OK
+}
+
+void setToneChannel(uint8_t channel){
+  log_d("channel=%d", channel);
+  if(tone_init()){
+    tone_msg_t tone_msg = {
+      .tone_cmd = TONE_SET_CHANNEL,
+      .channel = channel
+    };
+    xQueueSend(_tone_queue, &tone_msg, portMAX_DELAY);
+  }
+}
+
+void noTone(uint8_t _pin){
+  log_d("noTone was called");
+  if(tone_init()){
+    tone_msg_t tone_msg = {
+      .tone_cmd = TONE_END,
+      .pin = _pin
+    };
+    xQueueSend(_tone_queue, &tone_msg, portMAX_DELAY);
+  }
+}
+
+// parameters:
+// _pin - pin number which will output the signal
+// frequency - PWM frequency in Hz
+// duration - time in ms - how long will the signal be outputted.
+//   If not provided, or 0 you must manually call noTone to end output
+void tone(uint8_t _pin, unsigned int frequency, unsigned long duration){
+  log_d("_pin=%d, frequency=%u Hz, duration=%u ms", _pin, frequency, duration);
+  if(tone_init()){
+    tone_msg_t tone_msg = {
+      .tone_cmd = TONE_START,
+      .pin = _pin,
+      .frequency = frequency,
+      .duration = duration
+    };
+    xQueueSend(_tone_queue, &tone_msg, portMAX_DELAY);
+  }
+}
diff --git a/cores/esp32/USB.cpp b/cores/esp32/USB.cpp
index 5bf78b3bc27..a1fe50944db 100644
--- a/cores/esp32/USB.cpp
+++ b/cores/esp32/USB.cpp
@@ -19,6 +19,7 @@
 #include "esp32-hal.h"
 #include "esp32-hal-tinyusb.h"
 #include "common/tusb_common.h"
+#include "StreamString.h"
 
 #ifndef USB_VID
 #define USB_VID USB_ESPRESSIF_VID
@@ -33,8 +34,12 @@
 #define USB_PRODUCT ARDUINO_BOARD
 #endif
 #ifndef USB_SERIAL
+#if CONFIG_IDF_TARGET_ESP32S3
+#define USB_SERIAL "__MAC__"
+#else
 #define USB_SERIAL "0"
 #endif
+#endif
 #ifndef USB_WEBUSB_ENABLED
 #define USB_WEBUSB_ENABLED false
 #endif
@@ -155,6 +160,15 @@ ESPUSB::~ESPUSB(){
 
 bool ESPUSB::begin(){
     if(!_started){
+#if CONFIG_IDF_TARGET_ESP32S3
+        if(serial_number == "__MAC__"){
+            StreamString s;
+            uint8_t m[6];
+            esp_efuse_mac_get_default(m);
+            s.printf("%02X:%02X:%02X:%02X:%02X:%02X", m[0], m[1], m[2], m[3], m[4], m[5]);
+            serial_number = s;
+        }
+#endif
         tinyusb_device_config_t tinyusb_device_config = {
                 .vid = vid,
                 .pid = pid,
diff --git a/cores/esp32/USBCDC.cpp b/cores/esp32/USBCDC.cpp
index a7b75eada4f..ccf5180d7c7 100644
--- a/cores/esp32/USBCDC.cpp
+++ b/cores/esp32/USBCDC.cpp
@@ -114,16 +114,42 @@ void USBCDC::onEvent(arduino_usb_cdc_event_t event, esp_event_handler_t callback
 }
 
 size_t USBCDC::setRxBufferSize(size_t rx_queue_len){
-    if(rx_queue){
-        if(!rx_queue_len){
-            vQueueDelete(rx_queue);
-            rx_queue = NULL;
+    size_t currentQueueSize = rx_queue ? 
+            uxQueueSpacesAvailable(rx_queue) + uxQueueMessagesWaiting(rx_queue) : 0;
+
+    if (rx_queue_len != currentQueueSize) {
+        xQueueHandle new_rx_queue = NULL;
+        if (rx_queue_len) {
+            new_rx_queue = xQueueCreate(rx_queue_len, sizeof(uint8_t));
+            if(!new_rx_queue){
+                log_e("CDC Queue creation failed.");
+                return 0;
+            }
+            if (rx_queue) {
+                size_t copySize = uxQueueMessagesWaiting(rx_queue);
+                if (copySize > 0) {
+                    for(size_t i = 0; i < copySize; i++) {
+                        uint8_t ch = 0;
+                        xQueueReceive(rx_queue, &ch, 0);
+                        if (!xQueueSend(new_rx_queue, &ch, 0)) {
+                            arduino_usb_cdc_event_data_t p;
+                            p.rx_overflow.dropped_bytes = copySize - i;
+                            arduino_usb_event_post(ARDUINO_USB_CDC_EVENTS, ARDUINO_USB_CDC_RX_OVERFLOW_EVENT, &p, sizeof(arduino_usb_cdc_event_data_t), portMAX_DELAY);
+                            log_e("CDC RX Overflow.");
+                            break;
+                        }
+                    }    
+                }
+                vQueueDelete(rx_queue);
+            }
+            rx_queue = new_rx_queue;
+            return rx_queue_len;
+        } else {
+            if (rx_queue) {
+                    vQueueDelete(rx_queue);
+                    rx_queue = NULL;
+            }
         }
-        return 0;
-    }
-    rx_queue = xQueueCreate(rx_queue_len, sizeof(uint8_t));
-    if(!rx_queue){
-        return 0;
     }
     return rx_queue_len;
 }
@@ -133,7 +159,8 @@ void USBCDC::begin(unsigned long baud)
     if(tx_lock == NULL) {
         tx_lock = xSemaphoreCreateMutex();
     }
-    setRxBufferSize(256);//default if not preset
+    // if rx_queue was set before begin(), keep it
+    if (!rx_queue) setRxBufferSize(256); //default if not preset
     devices[itf] = this;
 }
 
@@ -144,6 +171,7 @@ void USBCDC::end()
     setRxBufferSize(0);
     if(tx_lock != NULL) {
         vSemaphoreDelete(tx_lock);
+        tx_lock = NULL;
     }
 }
 
@@ -244,16 +272,22 @@ void USBCDC::_onLineCoding(uint32_t _bit_rate, uint8_t _stop_bits, uint8_t _pari
 }
 
 void USBCDC::_onRX(){
+    arduino_usb_cdc_event_data_t p;
     uint8_t buf[CONFIG_TINYUSB_CDC_RX_BUFSIZE+1];
     uint32_t count = tud_cdc_n_read(itf, buf, CONFIG_TINYUSB_CDC_RX_BUFSIZE);
     for(uint32_t i=0; i<count; i++){
-        if(rx_queue == NULL || !xQueueSend(rx_queue, buf+i, 0)){
-            return;
+        if(rx_queue == NULL || !xQueueSend(rx_queue, buf+i, 10)) {
+            p.rx_overflow.dropped_bytes = count - i;
+            arduino_usb_event_post(ARDUINO_USB_CDC_EVENTS, ARDUINO_USB_CDC_RX_OVERFLOW_EVENT, &p, sizeof(arduino_usb_cdc_event_data_t), portMAX_DELAY);
+            log_e("CDC RX Overflow.");
+            count = i;
+            break;
         }
     }
-    arduino_usb_cdc_event_data_t p;
-    p.rx.len = count;
-    arduino_usb_event_post(ARDUINO_USB_CDC_EVENTS, ARDUINO_USB_CDC_RX_EVENT, &p, sizeof(arduino_usb_cdc_event_data_t), portMAX_DELAY);
+    if (count) {
+        p.rx.len = count;
+        arduino_usb_event_post(ARDUINO_USB_CDC_EVENTS, ARDUINO_USB_CDC_RX_EVENT, &p, sizeof(arduino_usb_cdc_event_data_t), portMAX_DELAY);
+    }
 }
 
 void USBCDC::_onTX(){
@@ -412,7 +446,7 @@ USBCDC::operator bool() const
     return connected;
 }
 
-#if ARDUINO_USB_CDC_ON_BOOT //Serial used for USB CDC
+#if ARDUINO_USB_CDC_ON_BOOT && !ARDUINO_USB_MODE //Serial used for USB CDC
 USBCDC Serial(0);
 #endif
 
diff --git a/cores/esp32/USBCDC.h b/cores/esp32/USBCDC.h
index 3dfe7d9e69c..baccb22e844 100644
--- a/cores/esp32/USBCDC.h
+++ b/cores/esp32/USBCDC.h
@@ -33,6 +33,7 @@ typedef enum {
     ARDUINO_USB_CDC_LINE_CODING_EVENT,
     ARDUINO_USB_CDC_RX_EVENT,
     ARDUINO_USB_CDC_TX_EVENT,
+    ARDUINO_USB_CDC_RX_OVERFLOW_EVENT,
     ARDUINO_USB_CDC_MAX_EVENT,
 } arduino_usb_cdc_event_t;
 
@@ -50,6 +51,9 @@ typedef union {
     struct {
             size_t len;
     } rx;
+    struct {
+            size_t dropped_bytes;
+    } rx_overflow;
 } arduino_usb_cdc_event_data_t;
 
 class USBCDC: public Stream
@@ -134,7 +138,7 @@ class USBCDC: public Stream
     
 };
 
-#if ARDUINO_USB_CDC_ON_BOOT //Serial used for USB CDC
+#if ARDUINO_USB_CDC_ON_BOOT && !ARDUINO_USB_MODE //Serial used for USB CDC
 extern USBCDC Serial;
 #endif
 
diff --git a/cores/esp32/WMath.cpp b/cores/esp32/WMath.cpp
index bb75fc8a2f6..931ac96637b 100644
--- a/cores/esp32/WMath.cpp
+++ b/cores/esp32/WMath.cpp
@@ -67,14 +67,14 @@ long random(long howsmall, long howbig)
 }
 
 long map(long x, long in_min, long in_max, long out_min, long out_max) {
-    const long dividend = out_max - out_min;
-    const long divisor = in_max - in_min;
-    const long delta = x - in_min;
-    if(divisor == 0){
-        log_e("Invalid map input range, min == max");
-        return -1; //AVR returns -1, SAM returns 0
+    const long run = in_max - in_min;
+    if(run == 0){
+        log_e("map(): Invalid input range, min == max");
+        return -1; // AVR returns -1, SAM returns 0
     }
-    return (delta * dividend + (divisor / 2)) / divisor + out_min;
+    const long rise = out_max - out_min;
+    const long delta = x - in_min;
+    return (delta * rise) / run + out_min;
 }
 
 uint16_t makeWord(uint16_t w)
diff --git a/cores/esp32/WString.cpp b/cores/esp32/WString.cpp
index b78cf2eed90..f69302a253f 100644
--- a/cores/esp32/WString.cpp
+++ b/cores/esp32/WString.cpp
@@ -24,6 +24,7 @@
 #include <Arduino.h>
 #include "WString.h"
 #include "stdlib_noniso.h"
+#include "esp32-hal-log.h"
 
 /*********************************************/
 /*  Constructors                             */
@@ -112,16 +113,28 @@ String::String(unsigned long value, unsigned char base) {
     *this = buf;
 }
 
-String::String(float value, unsigned char decimalPlaces) {
+String::String(float value, unsigned int decimalPlaces) {
     init();
-    char buf[33];
-    *this = dtostrf(value, (decimalPlaces + 2), decimalPlaces, buf);
+    char *buf = (char*)malloc(decimalPlaces + 42);
+    if (buf) {
+        *this = dtostrf(value, (decimalPlaces + 2), decimalPlaces, buf);
+        free(buf);
+    } else {
+        *this = "nan";
+        log_e("No enought memory for the operation.");
+    }
 }
 
-String::String(double value, unsigned char decimalPlaces) {
+String::String(double value, unsigned int decimalPlaces) {
     init();
-    char buf[33];
-    *this = dtostrf(value, (decimalPlaces + 2), decimalPlaces, buf);
+    char *buf = (char*)malloc(decimalPlaces + 312);
+    if (buf) {
+        *this = dtostrf(value, (decimalPlaces + 2), decimalPlaces, buf);
+        free(buf);
+    } else {
+        *this = "nan";
+        log_e("No enought memory for the operation.");
+    }
 }
 
 String::~String() {
@@ -761,8 +774,10 @@ void String::replace(const String& find, const String& replace) {
         }
         if(size == len())
             return;
-        if(size > capacity() && !changeBuffer(size))
-            return; // XXX: tell user!
+        if(size > capacity() && !changeBuffer(size)) {
+            log_w("String.Replace() Insufficient space to replace string");
+            return;
+        }
         int index = len() - 1;
         while(index >= 0 && (index = lastIndexOf(find, index)) >= 0) {
             readFrom = wbuffer() + index + find.len();
diff --git a/cores/esp32/WString.h b/cores/esp32/WString.h
index 958b01792e8..3190a247dda 100644
--- a/cores/esp32/WString.h
+++ b/cores/esp32/WString.h
@@ -71,8 +71,8 @@ class String {
         explicit String(unsigned int, unsigned char base = 10);
         explicit String(long, unsigned char base = 10);
         explicit String(unsigned long, unsigned char base = 10);
-        explicit String(float, unsigned char decimalPlaces = 2);
-        explicit String(double, unsigned char decimalPlaces = 2);
+        explicit String(float, unsigned int decimalPlaces = 2);
+        explicit String(double, unsigned int decimalPlaces = 2);
         ~String(void);
 
         // memory management
diff --git a/cores/esp32/esp32-hal-adc.c b/cores/esp32/esp32-hal-adc.c
index 674554fcce9..1d2fa17988a 100644
--- a/cores/esp32/esp32-hal-adc.c
+++ b/cores/esp32/esp32-hal-adc.c
@@ -27,6 +27,7 @@
 #include "soc/rtc_io_reg.h"
 #include "esp32/rom/ets_sys.h"
 #include "esp_intr_alloc.h"
+#include "soc/dac_channel.h"
 #define DEFAULT_VREF    1100
 static esp_adc_cal_characteristics_t *__analogCharacteristics[2] = {NULL, NULL};
 static uint16_t __analogVRef = 0;
@@ -35,6 +36,11 @@ static uint8_t __analogVRefPin = 0;
 #include "esp32s2/rom/ets_sys.h"
 #include "soc/sens_reg.h"
 #include "soc/rtc_io_reg.h"
+#include "soc/dac_channel.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/ets_sys.h"
+#include "soc/sens_reg.h"
+#include "soc/rtc_io_reg.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/ets_sys.h"
 #else
@@ -141,10 +147,10 @@ bool __adcAttachPin(uint8_t pin){
         }
 #endif
     }
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
-    else if(pin == 25){
+#if SOC_DAC_SUPPORTED
+    else if(pin == DAC_CHANNEL_1_GPIO_NUM){
         CLEAR_PERI_REG_MASK(RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_XPD_DAC | RTC_IO_PDAC1_DAC_XPD_FORCE);//stop dac1
-    } else if(pin == 26){
+    } else if(pin == DAC_CHANNEL_2_GPIO_NUM){
         CLEAR_PERI_REG_MASK(RTC_IO_PAD_DAC2_REG, RTC_IO_PDAC2_XPD_DAC | RTC_IO_PDAC2_DAC_XPD_FORCE);//stop dac2
     }
 #endif
diff --git a/cores/esp32/esp32-hal-cpu.c b/cores/esp32/esp32-hal-cpu.c
index 34124db1249..d79803f6124 100644
--- a/cores/esp32/esp32-hal-cpu.c
+++ b/cores/esp32/esp32-hal-cpu.c
@@ -33,6 +33,9 @@
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "freertos/xtensa_timer.h"
 #include "esp32s2/rom/rtc.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "freertos/xtensa_timer.h"
+#include "esp32s3/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/rtc.h"
 #else 
@@ -144,7 +147,7 @@ bool removeApbChangeCallback(void * arg, apb_change_cb_t cb){
 }
 
 static uint32_t calculateApb(rtc_cpu_freq_config_t * conf){
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
 	return APB_CLK_FREQ;
 #else
     if(conf->freq_mhz >= 80){
@@ -228,6 +231,8 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
     //Update FreeRTOS Tick Divisor
 #if CONFIG_IDF_TARGET_ESP32C3
 
+#elif CONFIG_IDF_TARGET_ESP32S3
+
 #else
     uint32_t fcpu = (conf.freq_mhz >= 80)?(conf.freq_mhz * MHZ):(apb);
     _xt_tick_divisor = fcpu / XT_TICK_PER_SEC;
diff --git a/cores/esp32/esp32-hal-gpio.c b/cores/esp32/esp32-hal-gpio.c
index 552126b848d..e21063a8596 100644
--- a/cores/esp32/esp32-hal-gpio.c
+++ b/cores/esp32/esp32-hal-gpio.c
@@ -13,167 +13,70 @@
 // limitations under the License.
 
 #include "esp32-hal-gpio.h"
-#include "pins_arduino.h"
-#include "freertos/FreeRTOS.h"
-#include "freertos/task.h"
-#include "esp_attr.h"
-#include "soc/gpio_reg.h"
-#include "soc/io_mux_reg.h"
-#include "soc/gpio_struct.h"
-#include "driver/gpio.h"
-#include "esp_system.h"
+#include "hal/gpio_hal.h"
+#include "soc/soc_caps.h"
 
-#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
-#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
-#include "esp32/rom/ets_sys.h"
-#include "esp32/rom/gpio.h"
-#include "esp_intr_alloc.h"
-#include "soc/rtc_io_reg.h"
-#define GPIO_FUNC 2
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#include "esp32s2/rom/gpio.h"
-#include "esp_intr_alloc.h"
-#include "soc/periph_defs.h"
-#include "soc/rtc_io_reg.h"
-#define GPIO_FUNC 1
-#elif CONFIG_IDF_TARGET_ESP32C3
-#include "esp32c3/rom/ets_sys.h"
-#include "esp32c3/rom/gpio.h"
-#include "esp_intr_alloc.h"
-#include "soc/periph_defs.h"
-#define USE_ESP_IDF_GPIO 1
+// It fixes lack of pin definition for S3 and for any future SoC
+// this function works for ESP32, ESP32-S2 and ESP32-S3 - including the C3, it will return -1 for any pin
+#if SOC_TOUCH_SENSOR_NUM >  0
+#include "soc/touch_sensor_periph.h"
+
+int8_t digitalPinToTouchChannel(uint8_t pin) 
+{
+    int8_t ret = -1;
+    if (pin < SOC_GPIO_PIN_COUNT) {
+        for (uint8_t i = 0; i < SOC_TOUCH_SENSOR_NUM; i++) {
+            if (touch_sensor_channel_io_map[i] == pin) {
+                ret = i;
+                break;
+            }
+        }
+    }
+    return ret;
+}
 #else
-#define USE_ESP_IDF_GPIO 1
-#endif
-#else // ESP32 Before IDF 4.0
-#include "rom/ets_sys.h"
-#include "rom/gpio.h"
-#include "esp_intr.h"
+// No Touch Sensor available
+int8_t digitalPinToTouchChannel(uint8_t pin) 
+{
+    return -1;
+}
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32
-const int8_t esp32_adc2gpio[20] = {36, 37, 38, 39, 32, 33, 34, 35, -1, -1, 4, 0, 2, 15, 13, 12, 14, 27, 25, 26};
-#elif CONFIG_IDF_TARGET_ESP32S2
-const int8_t esp32_adc2gpio[20] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20};
-#endif
+#ifdef SOC_ADC_SUPPORTED
+#include "soc/adc_periph.h"
+
+int8_t digitalPinToAnalogChannel(uint8_t pin) 
+{
+    uint8_t channel = 0;
+    if (pin < SOC_GPIO_PIN_COUNT) {
+        for (uint8_t i = 0; i < SOC_ADC_PERIPH_NUM; i++) {
+            for (uint8_t j = 0; j < SOC_ADC_MAX_CHANNEL_NUM; j++) {
+                if (adc_channel_io_map[i][j] == pin) {
+                    return channel;
+                }
+                channel++;
+            }
+        }
+    }
+    return -1;
+}
 
-const DRAM_ATTR esp32_gpioMux_t esp32_gpioMux[SOC_GPIO_PIN_COUNT]={
-#if CONFIG_IDF_TARGET_ESP32
-    {0x44, 11, 11, 1},
-    {0x88, -1, -1, -1},
-    {0x40, 12, 12, 2},
-    {0x84, -1, -1, -1},
-    {0x48, 10, 10, 0},
-    {0x6c, -1, -1, -1},
-    {0x60, -1, -1, -1},
-    {0x64, -1, -1, -1},
-    {0x68, -1, -1, -1},
-    {0x54, -1, -1, -1},
-    {0x58, -1, -1, -1},
-    {0x5c, -1, -1, -1},
-    {0x34, 15, 15, 5},
-    {0x38, 14, 14, 4},
-    {0x30, 16, 16, 6},
-    {0x3c, 13, 13, 3},
-    {0x4c, -1, -1, -1},
-    {0x50, -1, -1, -1},
-    {0x70, -1, -1, -1},
-    {0x74, -1, -1, -1},
-    {0x78, -1, -1, -1},
-    {0x7c, -1, -1, -1},
-    {0x80, -1, -1, -1},
-    {0x8c, -1, -1, -1},
-    {0, -1, -1, -1},
-    {0x24, 6, 18, -1}, //DAC1
-    {0x28, 7, 19, -1}, //DAC2
-    {0x2c, 17, 17, 7},
-    {0, -1, -1, -1},
-    {0, -1, -1, -1},
-    {0, -1, -1, -1},
-    {0, -1, -1, -1},
-    {0x1c, 9, 4, 8},
-    {0x20, 8, 5, 9},
-    {0x14, 4, 6, -1},
-    {0x18, 5, 7, -1},
-    {0x04, 0, 0, -1},
-    {0x08, 1, 1, -1},
-    {0x0c, 2, 2, -1},
-    {0x10, 3, 3, -1}
-#elif CONFIG_IDF_TARGET_ESP32S2
-    {0x04,  0, -1, -1},
-    {0x08,  1,  0,  1},
-    {0x0c,  2,  1,  2},
-    {0x10,  3,  2,  3},
-    {0x14,  4,  3,  4},
-    {0x18,  5,  4,  5},
-    {0x1c,  6,  5,  6},
-    {0x20,  7,  6,  7},
-    {0x24,  8,  7,  8},
-    {0x28,  9,  8,  9},//FSPI_HD
-    {0x2c, 10,  9, 10},//FSPI_CS0 / FSPI_D4
-    {0x30, 11, 10, 11},//FSPI_D / FSPI_D5
-    {0x34, 12, 11, 12},//FSPI_CLK / FSPI_D6
-    {0x38, 13, 12, 13},//FSPI_Q / FSPI_D7
-    {0x3c, 14, 13, 14},//FSPI_WP / FSPI_DQS
-    {0x40, 15, 14, -1},//32K+ / RTS0
-    {0x44, 16, 15, -1},//32K- / CTS0
-    {0x48, 17, 16, -1},//DAC1 / TXD1
-    {0x4c, 18, 17, -1},//DAC2 / RXD1
-    {0x50, 19, 18, -1},//USB D- / RTS1
-    {0x54, 20, 19, -1},//USB D+ / CTS1
-    {0x58, 21, -1, -1},//SDA?
-    {   0, -1, -1, -1},//UNAVAILABLE
-    {   0, -1, -1, -1},//UNAVAILABLE
-    {   0, -1, -1, -1},//UNAVAILABLE
-    {   0, -1, -1, -1},//UNAVAILABLE
-    {0x6c, -1, -1, -1},//RESERVED SPI_CS1
-    {0x70, -1, -1, -1},//RESERVED SPI_HD
-    {0x74, -1, -1, -1},//RESERVED SPI_WP
-    {0x78, -1, -1, -1},//RESERVED SPI_CS0
-    {0x7c, -1, -1, -1},//RESERVED SPI_CLK
-    {0x80, -1, -1, -1},//RESERVED SPI_Q
-    {0x84, -1, -1, -1},//RESERVED SPI_D
-    {0x88, -1, -1, -1},//FSPI_HD
-    {0x8c, -1, -1, -1},//FSPI_CS0
-    {0x90, -1, -1, -1},//FSPI_D
-    {0x94, -1, -1, -1},//FSPI_CLK
-    {0x98, -1, -1, -1},//FSPI_Q
-    {0x9c, -1, -1, -1},//FSPI_WP
-    {0xa0, -1, -1, -1},//MTCK
-    {0xa4, -1, -1, -1},//MTDO
-    {0xa8, -1, -1, -1},//MTDI
-    {0xac, -1, -1, -1},//MTMS
-    {0xb0, -1, -1, -1},//TXD0
-    {0xb4, -1, -1, -1},//RXD0
-    {0xb8, -1, -1, -1},//SCL?
-    {0xbc, -1, -1, -1},//INPUT ONLY
-    {0, -1, -1, -1}
-#elif CONFIG_IDF_TARGET_ESP32C3
-    {0x04, -1, 0, -1}, // ADC1_CH0
-    {0x08, -1, 1, -1}, // ADC1_CH1
-    {0x0c, -1, 2, -1}, // ADC1_CH2 | FSPIQ
-    {0x10, -1, 3, -1}, // ADC1_CH3
-    {0x14, -1, 4, -1}, // MTMS | ADC1_CH4 | FSPIHD
-    {0x18, -1, 5, -1}, // MTDI | ADC2_CH0 | FSPIWP
-    {0x1c, -1, -1, -1}, // MTCK | FSPICLK
-    {0x20, -1, -1, -1}, // MTDO | FSPID
-    {0x24, -1, -1, -1}, //
-    {0x28, -1, -1, -1}, //
-    {0x2c, -1, -1, -1}, // FSPICSO
-    {0x30, -1, -1, -1}, //
-    {0x34, -1, -1, -1}, // SPIHD
-    {0x38, -1, -1, -1}, // SPIWP
-    {0x3c, -1, -1, -1}, // SPICSO
-    {0x40, -1, -1, -1}, // SPICLK
-    {0x44, -1, -1, -1}, // SPID
-    {0x48, -1, -1, -1}, // SPIQ
-    {0x4c, -1, -1, -1}, // USB-
-    {0x50, -1, -1, -1}, // USB+
-    {0x54, -1, -1, -1}, // U0RXD
-    {0x58, -1, -1, -1}, // U0TXD
+int8_t analogChannelToDigitalPin(uint8_t channel) 
+{
+    if (channel >= (SOC_ADC_PERIPH_NUM * SOC_ADC_MAX_CHANNEL_NUM)) {
+        return -1;
+    }
+    uint8_t adc_unit = (channel / SOC_ADC_MAX_CHANNEL_NUM);
+    uint8_t adc_chan = (channel % SOC_ADC_MAX_CHANNEL_NUM);
+    return adc_channel_io_map[adc_unit][adc_chan];
+}
+#else
+// No Analog channels availible
+int8_t analogChannelToDigitalPin(uint8_t channel) 
+{
+    return -1;
+}
 #endif
-};
 
 typedef void (*voidFuncPtr)(void);
 typedef void (*voidFuncPtrArg)(void*);
@@ -188,8 +91,8 @@ static InterruptHandle_t __pinInterruptHandlers[SOC_GPIO_PIN_COUNT] = {0,};
 
 extern void ARDUINO_ISR_ATTR __pinMode(uint8_t pin, uint8_t mode)
 {
-#if USE_ESP_IDF_GPIO
 	if (!GPIO_IS_VALID_GPIO(pin)) {
+        log_e("Invalid pin selected");
 		return;
 	}
 	gpio_config_t conf = {
@@ -211,157 +114,23 @@ extern void ARDUINO_ISR_ATTR __pinMode(uint8_t pin, uint8_t mode)
 			conf.pull_down_en = GPIO_PULLDOWN_ENABLE;
 		}
 	}
-	gpio_config(&conf);
-
-	if(mode == SPECIAL){
-#if CONFIG_IDF_TARGET_ESP32
-		PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[pin], (uint32_t)(((pin)==RX||(pin)==TX)?0:1));
-#elif CONFIG_IDF_TARGET_ESP32S2
-		PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[pin], (uint32_t)(((pin)==RX||(pin)==TX)?0:2));
-#endif
-	} else if(mode == ANALOG){
-#if !CONFIG_IDF_TARGET_ESP32C3
-		//adc_gpio_init(ADC_UNIT_1, ADC_CHANNEL_0);
-#endif
-	} else if(mode >= 0x20 && mode < ANALOG) {//function
-		PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[pin], mode >> 5);
-	}
-#else
-    if(!digitalPinIsValid(pin)) {
-        return;
-    }
-
-    int8_t rtc_io = esp32_gpioMux[pin].rtc;
-    uint32_t rtc_reg = (rtc_io != -1)?rtc_io_desc[rtc_io].reg:0;
-    if(mode == ANALOG) {
-        if(!rtc_reg) {
-            return;//not rtc pin
-        }
-#if CONFIG_IDF_TARGET_ESP32S2
-        SENS.sar_io_mux_conf.iomux_clk_gate_en = 1;
-#endif
-        SET_PERI_REG_MASK(rtc_io_desc[rtc_io].reg, (rtc_io_desc[rtc_io].mux));
-        SET_PERI_REG_BITS(rtc_io_desc[rtc_io].reg, RTC_IO_TOUCH_PAD1_FUN_SEL_V, 0, rtc_io_desc[rtc_io].func);
-
-        RTCIO.pin[rtc_io].pad_driver = 0;//OD = 1
-        RTCIO.enable_w1tc.w1tc = (1U << rtc_io);
-        CLEAR_PERI_REG_MASK(rtc_io_desc[rtc_io].reg, rtc_io_desc[rtc_io].ie);
-
-        if (rtc_io_desc[rtc_io].pullup) {
-            CLEAR_PERI_REG_MASK(rtc_io_desc[rtc_io].reg, rtc_io_desc[rtc_io].pullup);
-        }
-        if (rtc_io_desc[rtc_io].pulldown) {
-            CLEAR_PERI_REG_MASK(rtc_io_desc[rtc_io].reg, rtc_io_desc[rtc_io].pulldown);
-        }
-        ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = ((uint32_t)GPIO_FUNC << MCU_SEL_S) | ((uint32_t)2 << FUN_DRV_S) | FUN_IE;
+	if(gpio_config(&conf) != ESP_OK)
+    {
+        log_e("GPIO config failed");
         return;
     }
-
-    //RTC pins PULL settings
-    if(rtc_reg) {
-        ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_io_desc[rtc_io].mux);
-        if(mode & PULLUP) {
-            ESP_REG(rtc_reg) = (ESP_REG(rtc_reg) | rtc_io_desc[rtc_io].pullup) & ~(rtc_io_desc[rtc_io].pulldown);
-        } else if(mode & PULLDOWN) {
-            ESP_REG(rtc_reg) = (ESP_REG(rtc_reg) | rtc_io_desc[rtc_io].pulldown) & ~(rtc_io_desc[rtc_io].pullup);
-        } else {
-            ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_io_desc[rtc_io].pullup | rtc_io_desc[rtc_io].pulldown);
-        }
-    }
-
-    uint32_t pinFunction = 0, pinControl = 0;
-
-    if(mode & INPUT) {
-        if(pin < 32) {
-            GPIO.enable_w1tc = ((uint32_t)1 << pin);
-        } else {
-            GPIO.enable1_w1tc.val = ((uint32_t)1 << (pin - 32));
-        }
-    } else if(mode & OUTPUT) {
-        if(pin >= NUM_OUPUT_PINS){
-            return;
-        } else if(pin < 32) {
-            GPIO.enable_w1ts = ((uint32_t)1 << pin);
-        } else {
-            GPIO.enable1_w1ts.val = ((uint32_t)1 << (pin - 32));
-        }
-    }
-
-    if(mode & PULLUP) {
-        pinFunction |= FUN_PU;
-    } else if(mode & PULLDOWN) {
-        pinFunction |= FUN_PD;
-    }
-
-    pinFunction |= ((uint32_t)2 << FUN_DRV_S);//what are the drivers?
-    pinFunction |= FUN_IE;//input enable but required for output as well?
-
-    if(mode & (INPUT | OUTPUT)) {
-        pinFunction |= ((uint32_t)PIN_FUNC_GPIO << MCU_SEL_S);
-    } else if(mode == SPECIAL) {
-#if CONFIG_IDF_TARGET_ESP32
-        pinFunction |= ((uint32_t)(((pin)==RX||(pin)==TX)?0:1) << MCU_SEL_S);
-#elif CONFIG_IDF_TARGET_ESP32S2
-        pinFunction |= ((uint32_t)(((pin)==RX||(pin)==TX)?0:2) << MCU_SEL_S);
-#endif
-    } else {
-        pinFunction |= ((uint32_t)(mode >> 5) << MCU_SEL_S);
-    }
-
-    ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = pinFunction;
-
-    if(mode & OPEN_DRAIN) {
-        pinControl = (1 << GPIO_PIN0_PAD_DRIVER_S);
-    }
-
-    GPIO.pin[pin].val = pinControl;
-#endif
 }
 
 extern void ARDUINO_ISR_ATTR __digitalWrite(uint8_t pin, uint8_t val)
 {
-#if USE_ESP_IDF_GPIO
 	gpio_set_level((gpio_num_t)pin, val);
-#elif CONFIG_IDF_TARGET_ESP32C3
-    if (val) {
-    	GPIO.out_w1ts.out_w1ts = (1 << pin);
-    } else {
-    	GPIO.out_w1tc.out_w1tc = (1 << pin);
-    }
-#else
-    if(val) {
-        if(pin < 32) {
-            GPIO.out_w1ts = ((uint32_t)1 << pin);
-        } else if(pin < NUM_OUPUT_PINS) {
-            GPIO.out1_w1ts.val = ((uint32_t)1 << (pin - 32));
-        }
-    } else {
-        if(pin < 32) {
-            GPIO.out_w1tc = ((uint32_t)1 << pin);
-        } else if(pin < NUM_OUPUT_PINS) {
-            GPIO.out1_w1tc.val = ((uint32_t)1 << (pin - 32));
-        }
-    }
-#endif
 }
 
 extern int ARDUINO_ISR_ATTR __digitalRead(uint8_t pin)
 {
-#if USE_ESP_IDF_GPIO
 	return gpio_get_level((gpio_num_t)pin);
-#elif CONFIG_IDF_TARGET_ESP32C3
-	return (GPIO.in.data >> pin) & 0x1;
-#else
-    if(pin < 32) {
-        return (GPIO.in >> pin) & 0x1;
-    } else if(pin < GPIO_PIN_COUNT) {
-        return (GPIO.in1.val >> (pin - 32)) & 0x1;
-    }
-    return 0;
-#endif
 }
 
-#if USE_ESP_IDF_GPIO
 static void ARDUINO_ISR_ATTR __onPinInterrupt(void * arg) {
 	InterruptHandle_t * isr = (InterruptHandle_t*)arg;
     if(isr->fn) {
@@ -372,49 +141,6 @@ static void ARDUINO_ISR_ATTR __onPinInterrupt(void * arg) {
         }
     }
 }
-#else
-static intr_handle_t gpio_intr_handle = NULL;
-
-static void ARDUINO_ISR_ATTR __onPinInterrupt()
-{
-    uint32_t gpio_intr_status_l=0;
-    uint32_t gpio_intr_status_h=0;
-
-    gpio_intr_status_l = GPIO.status;
-    gpio_intr_status_h = GPIO.status1.val;
-    GPIO.status_w1tc = gpio_intr_status_l;//Clear intr for gpio0-gpio31
-    GPIO.status1_w1tc.val = gpio_intr_status_h;//Clear intr for gpio32-39
-
-    uint8_t pin=0;
-    if(gpio_intr_status_l) {
-        do {
-            if(gpio_intr_status_l & ((uint32_t)1 << pin)) {
-                if(__pinInterruptHandlers[pin].fn) {
-                    if(__pinInterruptHandlers[pin].arg){
-                        ((voidFuncPtrArg)__pinInterruptHandlers[pin].fn)(__pinInterruptHandlers[pin].arg);
-                    } else {
-                        __pinInterruptHandlers[pin].fn();
-                    }
-                }
-            }
-        } while(++pin<32);
-    }
-    if(gpio_intr_status_h) {
-        pin=32;
-        do {
-            if(gpio_intr_status_h & ((uint32_t)1 << (pin - 32))) {
-                if(__pinInterruptHandlers[pin].fn) {
-                    if(__pinInterruptHandlers[pin].arg){
-                        ((voidFuncPtrArg)__pinInterruptHandlers[pin].fn)(__pinInterruptHandlers[pin].arg);
-                    } else {
-                        __pinInterruptHandlers[pin].fn();
-                    }
-                }
-            }
-        } while(++pin<GPIO_PIN_COUNT);
-    }
-}
-#endif
 
 extern void cleanupFunctional(void* arg);
 
@@ -423,13 +149,8 @@ extern void __attachInterruptFunctionalArg(uint8_t pin, voidFuncPtrArg userFunc,
     static bool interrupt_initialized = false;
 
     if(!interrupt_initialized) {
-#if USE_ESP_IDF_GPIO
     	esp_err_t err = gpio_install_isr_service((int)ARDUINO_ISR_FLAG);
     	interrupt_initialized = (err == ESP_OK) || (err == ESP_ERR_INVALID_STATE);
-#else
-        interrupt_initialized = true;
-        esp_intr_alloc(ETS_GPIO_INTR_SOURCE, (int)ARDUINO_ISR_FLAG, __onPinInterrupt, NULL, &gpio_intr_handle);
-#endif
     }
     if(!interrupt_initialized) {
     	log_e("GPIO ISR Service Failed To Start");
@@ -445,27 +166,18 @@ extern void __attachInterruptFunctionalArg(uint8_t pin, voidFuncPtrArg userFunc,
     __pinInterruptHandlers[pin].arg = arg;
     __pinInterruptHandlers[pin].functional = functional;
 
-#if USE_ESP_IDF_GPIO
     gpio_set_intr_type((gpio_num_t)pin, (gpio_int_type_t)(intr_type & 0x7));
     if(intr_type & 0x8){
     	gpio_wakeup_enable((gpio_num_t)pin, (gpio_int_type_t)(intr_type & 0x7));
     }
     gpio_isr_handler_add((gpio_num_t)pin, __onPinInterrupt, &__pinInterruptHandlers[pin]);
-    gpio_intr_enable((gpio_num_t)pin);
-#else
-    esp_intr_disable(gpio_intr_handle);
-#if CONFIG_IDF_TARGET_ESP32
-    if(esp_intr_get_cpu(gpio_intr_handle)) { //APP_CPU
-#endif
-        GPIO.pin[pin].int_ena = 1;
-#if CONFIG_IDF_TARGET_ESP32
-    } else { //PRO_CPU
-        GPIO.pin[pin].int_ena = 4;
-    }
-#endif
-    GPIO.pin[pin].int_type = intr_type;
-    esp_intr_enable(gpio_intr_handle);
-#endif
+
+
+    //FIX interrupts on peripherals outputs (eg. LEDC,...)
+    //Enable input in GPIO register
+    gpio_hal_context_t gpiohal;
+    gpiohal.dev = GPIO_LL_GET_HW(GPIO_PORT_0);
+    gpio_hal_input_enable(&gpiohal, pin);
 }
 
 extern void __attachInterruptArg(uint8_t pin, voidFuncPtrArg userFunc, void * arg, int intr_type)
@@ -479,13 +191,9 @@ extern void __attachInterrupt(uint8_t pin, voidFuncPtr userFunc, int intr_type)
 
 extern void __detachInterrupt(uint8_t pin)
 {
-#if USE_ESP_IDF_GPIO
-	gpio_intr_disable((gpio_num_t)pin);
-	gpio_isr_handler_remove((gpio_num_t)pin);
+	gpio_isr_handler_remove((gpio_num_t)pin); //remove handle and disable isr for pin
 	gpio_wakeup_disable((gpio_num_t)pin);
-#else
-    esp_intr_disable(gpio_intr_handle);
-#endif
+
     if (__pinInterruptHandlers[pin].functional && __pinInterruptHandlers[pin].arg)
     {
     	cleanupFunctional(__pinInterruptHandlers[pin].arg);
@@ -494,13 +202,7 @@ extern void __detachInterrupt(uint8_t pin)
     __pinInterruptHandlers[pin].arg = NULL;
     __pinInterruptHandlers[pin].functional = false;
 
-#if USE_ESP_IDF_GPIO
     gpio_set_intr_type((gpio_num_t)pin, GPIO_INTR_DISABLE);
-#else
-    GPIO.pin[pin].int_ena = 0;
-    GPIO.pin[pin].int_type = 0;
-    esp_intr_enable(gpio_intr_handle);
-#endif
 }
 
 
diff --git a/cores/esp32/esp32-hal-gpio.h b/cores/esp32/esp32-hal-gpio.h
index d7618392619..ff3808e9856 100644
--- a/cores/esp32/esp32-hal-gpio.h
+++ b/cores/esp32/esp32-hal-gpio.h
@@ -42,20 +42,15 @@ extern "C" {
 
 //GPIO FUNCTIONS
 #define INPUT             0x01
-#define OUTPUT            0x02
+// Changed OUTPUT from 0x02 to behave the same as Arduino pinMode(pin,OUTPUT) 
+// where you can read the state of pin even when it is set as OUTPUT
+#define OUTPUT            0x03 
 #define PULLUP            0x04
 #define INPUT_PULLUP      0x05
 #define PULLDOWN          0x08
 #define INPUT_PULLDOWN    0x09
 #define OPEN_DRAIN        0x10
 #define OUTPUT_OPEN_DRAIN 0x12
-#define SPECIAL           0xF0
-#define FUNCTION_1        0x00
-#define FUNCTION_2        0x20
-#define FUNCTION_3        0x40
-#define FUNCTION_4        0x60
-#define FUNCTION_5        0x80
-#define FUNCTION_6        0xA0
 #define ANALOG            0xC0
 
 //Interrupt Modes
@@ -68,22 +63,11 @@ extern "C" {
 #define ONLOW_WE  0x0C
 #define ONHIGH_WE 0x0D
 
-typedef struct {
-    uint8_t reg;      /*!< GPIO register offset from DR_REG_IO_MUX_BASE */
-    int8_t rtc;       /*!< RTC GPIO number (-1 if not RTC GPIO pin) */
-    int8_t adc;       /*!< ADC Channel number (-1 if not ADC pin) */
-    int8_t touch;     /*!< Touch Channel number (-1 if not Touch pin) */
-} esp32_gpioMux_t;
+#define digitalPinIsValid(pin)          GPIO_IS_VALID_GPIO(pin)
+#define digitalPinCanOutput(pin)        GPIO_IS_VALID_OUTPUT_GPIO(pin)
 
-extern const esp32_gpioMux_t esp32_gpioMux[SOC_GPIO_PIN_COUNT];
-extern const int8_t esp32_adc2gpio[20];
-
-#define digitalPinIsValid(pin)          ((pin) < SOC_GPIO_PIN_COUNT && esp32_gpioMux[(pin)].reg)
-#define digitalPinCanOutput(pin)        ((pin) < NUM_OUPUT_PINS && esp32_gpioMux[(pin)].reg)
-#define digitalPinToRtcPin(pin)         (((pin) < SOC_GPIO_PIN_COUNT)?esp32_gpioMux[(pin)].rtc:-1)
-#define digitalPinToAnalogChannel(pin)  (((pin) < SOC_GPIO_PIN_COUNT)?esp32_gpioMux[(pin)].adc:-1)
-#define digitalPinToTouchChannel(pin)   (((pin) < SOC_GPIO_PIN_COUNT)?esp32_gpioMux[(pin)].touch:-1)
-#define digitalPinToDacChannel(pin)     (((pin) == PIN_DAC1)?0:((pin) == PIN_DAC2)?1:-1)
+#define digitalPinToRtcPin(pin)         ((RTC_GPIO_IS_VALID_GPIO(pin))?rtc_io_number_get(pin):-1) 
+#define digitalPinToDacChannel(pin)     (((pin) == DAC_CHANNEL_1_GPIO_NUM)?0:((pin) == DAC_CHANNEL_2_GPIO_NUM)?1:-1)
 
 void pinMode(uint8_t pin, uint8_t mode);
 void digitalWrite(uint8_t pin, uint8_t val);
@@ -93,6 +77,10 @@ void attachInterrupt(uint8_t pin, void (*)(void), int mode);
 void attachInterruptArg(uint8_t pin, void (*)(void*), void * arg, int mode);
 void detachInterrupt(uint8_t pin);
 
+int8_t digitalPinToTouchChannel(uint8_t pin);
+int8_t digitalPinToAnalogChannel(uint8_t pin);
+int8_t analogChannelToDigitalPin(uint8_t channel);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/cores/esp32/esp32-hal-i2c-slave.c b/cores/esp32/esp32-hal-i2c-slave.c
index 49da0c82b0d..99bc2c54c9b 100644
--- a/cores/esp32/esp32-hal-i2c-slave.c
+++ b/cores/esp32/esp32-hal-i2c-slave.c
@@ -127,7 +127,7 @@ typedef enum {
 
 static inline i2c_stretch_cause_t i2c_ll_stretch_cause(i2c_dev_t *hw)
 {
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     return hw->sr.stretch_cause;
 #elif CONFIG_IDF_TARGET_ESP32S2
     return hw->status_reg.stretch_cause;
@@ -164,7 +164,7 @@ static inline void i2c_ll_stretch_clr(i2c_dev_t *hw)
 
 static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)
 {
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     return hw->sr.slave_addressed;
 #else
     return hw->status_reg.slave_addressed;
@@ -173,7 +173,7 @@ static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)
 
 static inline bool i2c_ll_slave_rw(i2c_dev_t *hw)//not exposed by hal_ll
 {
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     return hw->sr.slave_rw;
 #else
     return hw->status_reg.slave_rw;
@@ -360,10 +360,12 @@ esp_err_t i2cSlaveDeinit(uint8_t num){
     }
 
     i2c_slave_struct_t * i2c = &_i2c_bus_array[num];
+#if !CONFIG_DISABLE_HAL_LOCKS
     if(!i2c->lock){
         log_e("Lock is not initialized! Did you call i2c_slave_init()?");
         return ESP_ERR_NO_MEM;
     }
+#endif
     I2C_SLAVE_MUTEX_LOCK();
     i2c_slave_free_resources(i2c);
     I2C_SLAVE_MUTEX_UNLOCK();
@@ -377,10 +379,12 @@ size_t i2cSlaveWrite(uint8_t num, const uint8_t *buf, uint32_t len, uint32_t tim
     }
     size_t to_queue = 0, to_fifo = 0;
     i2c_slave_struct_t * i2c = &_i2c_bus_array[num];
+#if !CONFIG_DISABLE_HAL_LOCKS
     if(!i2c->lock){
         log_e("Lock is not initialized! Did you call i2c_slave_init()?");
         return ESP_ERR_NO_MEM;
     }
+#endif
     if(!i2c->tx_queue){
         return 0;
     }
@@ -715,10 +719,12 @@ static void i2c_slave_isr_handler(void* arg)
         }
         if(slave_rw){ // READ
 #if CONFIG_IDF_TARGET_ESP32
-            //SEND TX Event
-            i2c_slave_queue_event_t event;
-            event.event = I2C_SLAVE_EVT_TX;
-            pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event);
+            if(i2c->dev->status_reg.scl_main_state_last == 6){
+                //SEND TX Event
+                i2c_slave_queue_event_t event;
+                event.event = I2C_SLAVE_EVT_TX;
+                pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event);
+            }
 #else
             //reset TX data
             i2c_ll_txfifo_rst(i2c->dev);
diff --git a/cores/esp32/esp32-hal-i2c.c b/cores/esp32/esp32-hal-i2c.c
index c4ec85e732c..f01b501a020 100644
--- a/cores/esp32/esp32-hal-i2c.c
+++ b/cores/esp32/esp32-hal-i2c.c
@@ -317,6 +317,8 @@ esp_err_t i2cSetClock(uint8_t i2c_num, uint32_t frequency){
         hal.dev = I2C_LL_GET_HW(i2c_num);
         i2c_hal_set_bus_timing(&(hal), frequency, src_clk);
         bus[i2c_num].frequency = frequency;
+        //Clock Stretching Timeout: 20b:esp32, 5b:esp32-c3, 24b:esp32-s2
+        i2c_set_timeout((i2c_port_t)i2c_num, I2C_LL_MAX_TIMEOUT);
     }
 
 end:
diff --git a/cores/esp32/esp32-hal-ledc.c b/cores/esp32/esp32-hal-ledc.c
index 6274ed0708c..44a3667333d 100644
--- a/cores/esp32/esp32-hal-ledc.c
+++ b/cores/esp32/esp32-hal-ledc.c
@@ -54,12 +54,13 @@
 
 uint8_t channels_resolution[LEDC_CHANNELS] = {0};
 
-double ledcSetup(uint8_t chan, double freq, uint8_t bit_num)
+uint32_t ledcSetup(uint8_t chan, uint32_t freq, uint8_t bit_num)
 {
-    if(chan >= LEDC_CHANNELS){
-        log_e("No more LEDC channels available! You can have maximum %u", LEDC_CHANNELS);
+    if(chan >= LEDC_CHANNELS || bit_num > LEDC_MAX_BIT_WIDTH){
+        log_e("No more LEDC channels available! (maximum %u) or bit width too big (maximum %u)", LEDC_CHANNELS, LEDC_MAX_BIT_WIDTH);
         return 0;
     }
+
     uint8_t group=(chan/8), timer=((chan/2)%4);
 
     ledc_timer_config_t ledc_timer = {
@@ -69,9 +70,12 @@ double ledcSetup(uint8_t chan, double freq, uint8_t bit_num)
         .freq_hz          = freq,
         .clk_cfg          = LEDC_DEFAULT_CLK
     };
-    ledc_timer_config(&ledc_timer);
+    if(ledc_timer_config(&ledc_timer) != ESP_OK)
+    {
+        log_e("ledc setup failed!");
+        return 0;
+    }
     channels_resolution[chan] = bit_num;
-
     return ledc_get_freq(group,timer);
 }
 
@@ -95,14 +99,14 @@ void ledcWrite(uint8_t chan, uint32_t duty)
 
 uint32_t ledcRead(uint8_t chan)
 {
-     if(chan >= LEDC_CHANNELS){
+    if(chan >= LEDC_CHANNELS){
         return 0;
     }
     uint8_t group=(chan/8), channel=(chan%8);
     return ledc_get_duty(group,channel);
 }
 
-double ledcReadFreq(uint8_t chan)
+uint32_t ledcReadFreq(uint8_t chan)
 {
     if(!ledcRead(chan)){
         return 0;
@@ -111,7 +115,7 @@ double ledcReadFreq(uint8_t chan)
     return ledc_get_freq(group,timer);
 }
 
-double ledcWriteTone(uint8_t chan, double freq)
+uint32_t ledcWriteTone(uint8_t chan, uint32_t freq)
 {
     if(chan >= LEDC_CHANNELS){
         return 0;
@@ -130,15 +134,20 @@ double ledcWriteTone(uint8_t chan, double freq)
         .freq_hz          = freq, 
         .clk_cfg          = LEDC_DEFAULT_CLK
     };
-    ledc_timer_config(&ledc_timer);
+
+    if(ledc_timer_config(&ledc_timer) != ESP_OK)
+    {
+        log_e("ledcSetup failed!");
+        return 0;
+    }
     channels_resolution[chan] = 10;
 
-    double res_freq = ledc_get_freq(group,timer);
+    uint32_t res_freq = ledc_get_freq(group,timer);
     ledcWrite(chan, 0x1FF);
     return res_freq;
 }
 
-double ledcWriteNote(uint8_t chan, note_t note, uint8_t octave){
+uint32_t ledcWriteNote(uint8_t chan, note_t note, uint8_t octave){
     const uint16_t noteFrequencyBase[12] = {
     //   C        C#       D        Eb       E        F       F#        G       G#        A       Bb        B
         4186,    4435,    4699,    4978,    5274,    5588,    5920,    6272,    6645,    7040,    7459,    7902
@@ -147,13 +156,13 @@ double ledcWriteNote(uint8_t chan, note_t note, uint8_t octave){
     if(octave > 8 || note >= NOTE_MAX){
         return 0;
     }
-    double noteFreq =  (double)noteFrequencyBase[note] / (double)(1 << (8-octave));
+    uint32_t noteFreq =  (uint32_t)noteFrequencyBase[note] / (uint32_t)(1 << (8-octave));
     return ledcWriteTone(chan, noteFreq);
 }
 
 void ledcAttachPin(uint8_t pin, uint8_t chan)
 {
-     if(chan >= LEDC_CHANNELS){
+    if(chan >= LEDC_CHANNELS){
         return;
     }
     uint8_t group=(chan/8), channel=(chan%8), timer=((chan/2)%4);
@@ -175,9 +184,10 @@ void ledcDetachPin(uint8_t pin)
     pinMatrixOutDetach(pin, false, false);
 }
 
-double ledcChangeFrequency(uint8_t chan, double freq, uint8_t bit_num)
+uint32_t ledcChangeFrequency(uint8_t chan, uint32_t freq, uint8_t bit_num)
 {
-     if(chan >= LEDC_CHANNELS){
+    if(chan >= LEDC_CHANNELS || bit_num > LEDC_MAX_BIT_WIDTH){
+        log_e("LEDC channel not available! (maximum %u) or bit width too big (maximum %u)", LEDC_CHANNELS, LEDC_MAX_BIT_WIDTH);
         return 0;
     }
     uint8_t group=(chan/8), timer=((chan/2)%4);
@@ -189,9 +199,13 @@ double ledcChangeFrequency(uint8_t chan, double freq, uint8_t bit_num)
         .freq_hz          = freq, 
         .clk_cfg          = LEDC_DEFAULT_CLK
     };
-    ledc_timer_config(&ledc_timer);
-    channels_resolution[chan] = bit_num;
 
+    if(ledc_timer_config(&ledc_timer) != ESP_OK)
+    {
+        log_e("ledcChangeFrequency failed!");
+        return 0;
+    }
+    channels_resolution[chan] = bit_num;
     return ledc_get_freq(group,timer);
 }
 
diff --git a/cores/esp32/esp32-hal-ledc.h b/cores/esp32/esp32-hal-ledc.h
index 1d640b32eae..4b8bc7d712a 100644
--- a/cores/esp32/esp32-hal-ledc.h
+++ b/cores/esp32/esp32-hal-ledc.h
@@ -27,15 +27,15 @@ typedef enum {
 } note_t;
 
 //channel 0-15 resolution 1-16bits freq limits depend on resolution
-double      ledcSetup(uint8_t channel, double freq, uint8_t resolution_bits);
+uint32_t    ledcSetup(uint8_t channel, uint32_t freq, uint8_t resolution_bits);
 void        ledcWrite(uint8_t channel, uint32_t duty);
-double      ledcWriteTone(uint8_t channel, double freq);
-double      ledcWriteNote(uint8_t channel, note_t note, uint8_t octave);
+uint32_t    ledcWriteTone(uint8_t channel, uint32_t freq);
+uint32_t    ledcWriteNote(uint8_t channel, note_t note, uint8_t octave);
 uint32_t    ledcRead(uint8_t channel);
-double      ledcReadFreq(uint8_t channel);
+uint32_t    ledcReadFreq(uint8_t channel);
 void        ledcAttachPin(uint8_t pin, uint8_t channel);
 void        ledcDetachPin(uint8_t pin);
-double      ledcChangeFrequency(uint8_t channel, double freq, uint8_t resolution_bits);
+uint32_t    ledcChangeFrequency(uint8_t channel, uint32_t freq, uint8_t resolution_bits);
 
 
 #ifdef __cplusplus
diff --git a/cores/esp32/esp32-hal-log.h b/cores/esp32/esp32-hal-log.h
index 7f6d554213f..3198387fdd8 100644
--- a/cores/esp32/esp32-hal-log.h
+++ b/cores/esp32/esp32-hal-log.h
@@ -38,9 +38,11 @@ extern "C"
 #else
 #define ARDUHAL_LOG_LEVEL CORE_DEBUG_LEVEL
 #ifdef USE_ESP_IDF_LOG
+#ifndef LOG_LOCAL_LEVEL
 #define LOG_LOCAL_LEVEL CORE_DEBUG_LEVEL
 #endif
 #endif
+#endif
 
 #ifndef CONFIG_ARDUHAL_LOG_COLORS
 #define CONFIG_ARDUHAL_LOG_COLORS 0
@@ -158,7 +160,7 @@ void log_print_buf(const uint8_t *b, size_t len);
 #define isr_log_e(format, ...) ets_printf(ARDUHAL_LOG_FORMAT(E, format), ##__VA_ARGS__)
 #define log_buf_e(b,l) do{ARDUHAL_LOG_COLOR_PRINT(E);log_print_buf(b,l);ARDUHAL_LOG_COLOR_PRINT_END;}while(0)
 #else
-#define log_e(format, ...) do {log_to_esp(TAG, ESP_LOG_ERROR, format, ##__VA_ARGS__);}while(0)
+#define log_e(format, ...) do {ESP_LOG_LEVEL_LOCAL(ESP_LOG_ERROR, TAG, format, ##__VA_ARGS__);}while(0)
 #define isr_log_e(format, ...) do {ets_printf(LOG_FORMAT(E, format), esp_log_timestamp(), TAG, ##__VA_ARGS__);}while(0)
 #define log_buf_e(b,l) do {ESP_LOG_BUFFER_HEXDUMP(TAG, b, l, ESP_LOG_ERROR);}while(0)
 #endif
@@ -187,9 +189,9 @@ void log_print_buf(const uint8_t *b, size_t len);
 #include "esp_log.h"
 
 #ifdef USE_ESP_IDF_LOG
-#ifndef TAG
-#define TAG "ARDUINO"
-#endif
+//#ifndef TAG
+//#define TAG "ARDUINO"
+//#endif
 //#define log_n(format, ...) myLog(ESP_LOG_NONE, format, ##__VA_ARGS__)
 #else
 #ifdef CONFIG_ARDUHAL_ESP_LOG
@@ -204,16 +206,16 @@ void log_print_buf(const uint8_t *b, size_t len);
 #undef ESP_EARLY_LOGD
 #undef ESP_EARLY_LOGV
 
-#define ESP_LOGE(tag, ...)  log_e(__VA_ARGS__)
-#define ESP_LOGW(tag, ...)  log_w(__VA_ARGS__)
-#define ESP_LOGI(tag, ...)  log_i(__VA_ARGS__)
-#define ESP_LOGD(tag, ...)  log_d(__VA_ARGS__)
-#define ESP_LOGV(tag, ...)  log_v(__VA_ARGS__)
-#define ESP_EARLY_LOGE(tag, ...)  isr_log_e(__VA_ARGS__)
-#define ESP_EARLY_LOGW(tag, ...)  isr_log_w(__VA_ARGS__)
-#define ESP_EARLY_LOGI(tag, ...)  isr_log_i(__VA_ARGS__)
-#define ESP_EARLY_LOGD(tag, ...)  isr_log_d(__VA_ARGS__)
-#define ESP_EARLY_LOGV(tag, ...)  isr_log_v(__VA_ARGS__)
+#define ESP_LOGE(tag, format, ...)  log_e("[%s] " format, tag, ##__VA_ARGS__)
+#define ESP_LOGW(tag, format, ...)  log_w("[%s] " format, tag, ##__VA_ARGS__)
+#define ESP_LOGI(tag, format, ...)  log_i("[%s] " format, tag, ##__VA_ARGS__)
+#define ESP_LOGD(tag, format, ...)  log_d("[%s] " format, tag, ##__VA_ARGS__)
+#define ESP_LOGV(tag, format, ...)  log_v("[%s] " format, tag, ##__VA_ARGS__)
+#define ESP_EARLY_LOGE(tag, format, ...)  isr_log_e("[%s] " format, tag, ##__VA_ARGS__)
+#define ESP_EARLY_LOGW(tag, format, ...)  isr_log_w("[%s] " format, tag, ##__VA_ARGS__)
+#define ESP_EARLY_LOGI(tag, format, ...)  isr_log_i("[%s] " format, tag, ##__VA_ARGS__)
+#define ESP_EARLY_LOGD(tag, format, ...)  isr_log_d("[%s] " format, tag, ##__VA_ARGS__)
+#define ESP_EARLY_LOGV(tag, format, ...)  isr_log_v("[%s] " format, tag, ##__VA_ARGS__)
 #endif
 #endif
 
diff --git a/cores/esp32/esp32-hal-matrix.c b/cores/esp32/esp32-hal-matrix.c
index 3d6069b8b63..869761a9ac7 100644
--- a/cores/esp32/esp32-hal-matrix.c
+++ b/cores/esp32/esp32-hal-matrix.c
@@ -21,6 +21,8 @@
 #include "esp32/rom/gpio.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/gpio.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/gpio.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/gpio.h"
 #else 
diff --git a/cores/esp32/esp32-hal-misc.c b/cores/esp32/esp32-hal-misc.c
index 102ff6947a4..d50885b32dd 100644
--- a/cores/esp32/esp32-hal-misc.c
+++ b/cores/esp32/esp32-hal-misc.c
@@ -41,6 +41,9 @@
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/rtc.h"
 #include "driver/temp_sensor.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/rtc.h"
+#include "driver/temp_sensor.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/rtc.h"
 #include "driver/temp_sensor.h"
@@ -232,7 +235,7 @@ void initArduino()
 #endif
     esp_log_level_set("*", CONFIG_LOG_DEFAULT_LEVEL);
     esp_err_t err = nvs_flash_init();
-    if(err == ESP_ERR_NVS_NO_FREE_PAGES){
+    if(err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND){
         const esp_partition_t* partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_NVS, NULL);
         if (partition != NULL) {
             err = esp_partition_erase_range(partition, 0, partition->size);
@@ -241,6 +244,8 @@ void initArduino()
             } else {
                 log_e("Failed to format the broken NVS partition!");
             }
+        } else {
+            log_e("Could not find NVS partition");
         }
     }
     if(err) {
diff --git a/cores/esp32/esp32-hal-psram.c b/cores/esp32/esp32-hal-psram.c
index 7a8cc0befef..424499e0058 100644
--- a/cores/esp32/esp32-hal-psram.c
+++ b/cores/esp32/esp32-hal-psram.c
@@ -25,6 +25,9 @@
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/spiram.h"
 #include "esp32s2/rom/cache.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/spiram.h"
+#include "esp32s3/rom/cache.h"
 #else 
 #error Target CONFIG_IDF_TARGET is not supported
 #endif
@@ -35,6 +38,13 @@
 static volatile bool spiramDetected = false;
 static volatile bool spiramFailed = false;
 
+//allows user to bypass SPI RAM test routine
+__attribute__((weak)) bool testSPIRAM(void) 
+{ 
+     return esp_spiram_test(); 
+}
+
+
 bool psramInit(){
     if (spiramDetected) {
         return true;
@@ -60,13 +70,16 @@ bool psramInit(){
         spiramFailed = true;
         log_w("PSRAM init failed!");
 #if CONFIG_IDF_TARGET_ESP32
-        pinMatrixOutDetach(16, false, false);
-        pinMatrixOutDetach(17, false, false);
+        if (pkg_ver != EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4) {
+            pinMatrixOutDetach(16, false, false);
+            pinMatrixOutDetach(17, false, false);
+        }
 #endif
         return false;
     }
     esp_spiram_init_cache();
-    if (!esp_spiram_test()) {
+    //testSPIRAM() allows user to bypass SPI RAM test routine
+    if (!testSPIRAM()) {
         spiramFailed = true;
         log_e("PSRAM test failed!");
         return false;
@@ -76,12 +89,12 @@ bool psramInit(){
         log_e("PSRAM could not be added to the heap!");
         return false;
     }
-#if CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL && !CONFIG_ARDUINO_ISR_IRAM
-        heap_caps_malloc_extmem_enable(CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL);
-#endif
+#if CONFIG_SPIRAM_USE_MALLOC && !CONFIG_ARDUINO_ISR_IRAM
+    heap_caps_malloc_extmem_enable(CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL);
 #endif
+#endif /* CONFIG_SPIRAM_BOOT_INIT */
+    log_i("PSRAM enabled");
     spiramDetected = true;
-    log_d("PSRAM enabled");
     return true;
 }
 
diff --git a/cores/esp32/esp32-hal-rmt.c b/cores/esp32/esp32-hal-rmt.c
index 9c619eea2c8..a220119d316 100644
--- a/cores/esp32/esp32-hal-rmt.c
+++ b/cores/esp32/esp32-hal-rmt.c
@@ -96,6 +96,7 @@ struct rmt_obj_s
     void * arg;
     TaskHandle_t rxTaskHandle;  
     bool rx_completed;
+    bool tx_not_rx;
 };
 
 /**
@@ -109,15 +110,15 @@ static xSemaphoreHandle g_rmt_objlocks[MAX_CHANNELS] = {
 };
 
 static rmt_obj_t g_rmt_objects[MAX_CHANNELS] = {
-    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true},
-    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true},
-    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true},
-    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true},
+    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true, true},
+    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true, true},
+    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true, true},
+    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true, true},
 #if MAX_CHANNELS > 4
-    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true},
-    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true},
-    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true},
-    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true},
+    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true, true},
+    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true, true},
+    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true, true},
+    { false, NULL, 0, 0, 0, NULL, NULL, NULL, NULL, true, true},
 #endif
 };
 
@@ -248,6 +249,26 @@ static bool _rmtCreateRxTask(rmt_obj_t* rmt)
     return true;
 }
 
+// Helper function to test if an RMT channel is correctly assigned to TX or RX, issuing an error message if necessary
+// Also test RMT pointer for NULL and returns false in case it is NULL
+// return true when it is correctly assigned, false otherwise
+static bool _rmtCheckTXnotRX(rmt_obj_t* rmt, bool tx_not_rx)
+{
+    if (!rmt) {           // also returns false on NULL
+        return false;
+    }
+
+    if (rmt->tx_not_rx == tx_not_rx) {  // matches expected RX/TX channel
+        return true;
+    }
+   
+    if (tx_not_rx) {    // expected TX channel
+        log_e("Can't write on a RX RMT Channel");
+    } else{             // expected RX channel
+        log_e("Can't read on a TX RMT Channel");
+    }
+    return false;       // missmatched
+}
 
 /**
  * Public method definitions
@@ -255,7 +276,7 @@ static bool _rmtCreateRxTask(rmt_obj_t* rmt)
 
 bool rmtSetCarrier(rmt_obj_t* rmt, bool carrier_en, bool carrier_level, uint32_t low, uint32_t high)
 {
-    if (!rmt || low > 0xFFFF || high > 0xFFFF) {
+    if (!_rmtCheckTXnotRX(rmt, RMT_TX_MODE) || low > 0xFFFF || high > 0xFFFF) {
         return false;
     }
     size_t channel = rmt->channel;
@@ -268,7 +289,7 @@ bool rmtSetCarrier(rmt_obj_t* rmt, bool carrier_en, bool carrier_level, uint32_t
 
 bool rmtSetFilter(rmt_obj_t* rmt, bool filter_en, uint32_t filter_level)
 {
-    if (!rmt || filter_level > 0xFF) {
+    if (!_rmtCheckTXnotRX(rmt, RMT_RX_MODE) || filter_level > 0xFF) {
         return false;
     }
     size_t channel = rmt->channel;
@@ -281,7 +302,7 @@ bool rmtSetFilter(rmt_obj_t* rmt, bool filter_en, uint32_t filter_level)
 
 bool rmtSetRxThreshold(rmt_obj_t* rmt, uint32_t value)
 {
-    if (!rmt || value > 0xFFFF) {
+    if (!_rmtCheckTXnotRX(rmt, RMT_RX_MODE) || value > 0xFFFF) {
         return false;
     }
     size_t channel = rmt->channel;
@@ -306,14 +327,17 @@ bool rmtDeinit(rmt_obj_t *rmt)
 
     RMT_MUTEX_LOCK(rmt->channel);
     // force stopping rmt processing
-    rmt_rx_stop(rmt->channel);
-    rmt_tx_stop(rmt->channel);
+    if (rmt->tx_not_rx) {
+        rmt_tx_stop(rmt->channel);
+    } else {
+        rmt_rx_stop(rmt->channel);
+        if(rmt->rxTaskHandle){
+            vTaskDelete(rmt->rxTaskHandle);
+            rmt->rxTaskHandle = NULL;
+        }       
+    }
 
-    if(rmt->rxTaskHandle){
-        vTaskDelete(rmt->rxTaskHandle);
-        rmt->rxTaskHandle = NULL;
-    }    
-   rmt_driver_uninstall(rmt->channel);
+    rmt_driver_uninstall(rmt->channel);
 
     size_t from = rmt->channel;
     size_t to = rmt->buffers + rmt->channel;
@@ -330,6 +354,7 @@ bool rmtDeinit(rmt_obj_t *rmt)
 #if !CONFIG_DISABLE_HAL_LOCKS
     if(g_rmt_objlocks[from] != NULL) {
         vSemaphoreDelete(g_rmt_objlocks[from]);
+        g_rmt_objlocks[from] = NULL;
     }
 #endif
 
@@ -338,10 +363,9 @@ bool rmtDeinit(rmt_obj_t *rmt)
 
 bool rmtLoop(rmt_obj_t* rmt, rmt_data_t* data, size_t size)
 {
-    if (!rmt) {
+    if (!_rmtCheckTXnotRX(rmt, RMT_TX_MODE)) {
         return false;
     }
-
     int channel = rmt->channel;
     RMT_MUTEX_LOCK(channel);
     rmt_tx_stop(channel);
@@ -353,10 +377,9 @@ bool rmtLoop(rmt_obj_t* rmt, rmt_data_t* data, size_t size)
 
 bool rmtWrite(rmt_obj_t* rmt, rmt_data_t* data, size_t size)
 {
-    if (!rmt) {
+    if (!_rmtCheckTXnotRX(rmt, RMT_TX_MODE)) {
         return false;
     }
-    
     int channel = rmt->channel;
     RMT_MUTEX_LOCK(channel);
     rmt_tx_stop(channel);
@@ -368,10 +391,9 @@ bool rmtWrite(rmt_obj_t* rmt, rmt_data_t* data, size_t size)
 
 bool rmtWriteBlocking(rmt_obj_t* rmt, rmt_data_t* data, size_t size)
 {
-    if (!rmt) {
+    if (!_rmtCheckTXnotRX(rmt, RMT_TX_MODE)) {
         return false;
     }
-    
     int channel = rmt->channel;
     RMT_MUTEX_LOCK(channel);
     rmt_tx_stop(channel);
@@ -383,10 +405,9 @@ bool rmtWriteBlocking(rmt_obj_t* rmt, rmt_data_t* data, size_t size)
 
 bool rmtReadData(rmt_obj_t* rmt, uint32_t* data, size_t size)
 {
-    if (!rmt) {
+    if (!_rmtCheckTXnotRX(rmt, RMT_RX_MODE)) {
         return false;
     }
-
     rmtReadAsync(rmt, (rmt_data_t*) data, size, NULL, false, 0);
     return true;
 }
@@ -394,7 +415,7 @@ bool rmtReadData(rmt_obj_t* rmt, uint32_t* data, size_t size)
 
 bool rmtBeginReceive(rmt_obj_t* rmt)
 {
-    if (!rmt) {
+    if (!_rmtCheckTXnotRX(rmt, RMT_RX_MODE)) {
         return false;
     }
     int channel = rmt->channel;
@@ -418,7 +439,7 @@ bool rmtReceiveCompleted(rmt_obj_t* rmt)
 
 bool rmtRead(rmt_obj_t* rmt, rmt_rx_data_cb_t cb, void * arg)
 {
-    if (!rmt || !cb) {
+    if (!_rmtCheckTXnotRX(rmt, RMT_RX_MODE)) {
         return false;
     }
     int channel = rmt->channel;
@@ -449,15 +470,19 @@ bool rmtEnd(rmt_obj_t* rmt)
     int channel = rmt->channel;
 
     RMT_MUTEX_LOCK(channel);
-    rmt_rx_stop(channel);
-    rmt->rx_completed = true;
+    if (rmt->tx_not_rx) {
+        rmt_tx_stop(channel);
+    } else {
+        rmt_rx_stop(channel);
+        rmt->rx_completed = true;
+    }
     RMT_MUTEX_UNLOCK(channel);
     return  true;
 }
 
 bool rmtReadAsync(rmt_obj_t* rmt, rmt_data_t* data, size_t size, void* eventFlag, bool waitForData, uint32_t timeout)
 {
-    if (!rmt) {
+    if (!_rmtCheckTXnotRX(rmt, RMT_RX_MODE)) {
         return false;
     }
     int channel = rmt->channel;
@@ -568,6 +593,7 @@ rmt_obj_t* rmtInit(int pin, bool tx_not_rx, rmt_reserve_memsize_t memsize)
     rmt->data_size = 0;
     rmt->rx_completed = false;
     rmt->events = NULL;
+    rmt->tx_not_rx = tx_not_rx;
 
 #if !CONFIG_DISABLE_HAL_LOCKS
     if(g_rmt_objlocks[channel] == NULL) {
diff --git a/cores/esp32/esp32-hal-spi.c b/cores/esp32/esp32-hal-spi.c
index c2671836a07..39ad027be55 100644
--- a/cores/esp32/esp32-hal-spi.c
+++ b/cores/esp32/esp32-hal-spi.c
@@ -37,6 +37,11 @@
 #include "esp32s2/rom/ets_sys.h"
 #include "esp32s2/rom/gpio.h"
 #include "esp_intr_alloc.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "soc/dport_reg.h"
+#include "esp32s3/rom/ets_sys.h"
+#include "esp32s3/rom/gpio.h"
+#include "esp_intr_alloc.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/ets_sys.h"
 #include "esp32c3/rom/gpio.h"
@@ -71,10 +76,20 @@ struct spi_struct_t {
 #define SPI_FSPI_SS_IDX(n)  ((n==0)?FSPICS0_OUT_IDX:((n==1)?FSPICS1_OUT_IDX:((n==2)?FSPICS2_OUT_IDX:FSPICS0_OUT_IDX)))
 #define SPI_SS_IDX(p, n)    ((p==0)?SPI_SPI_SS_IDX(n):((p==1)?SPI_SPI_SS_IDX(n):((p==2)?SPI_HSPI_SS_IDX(n):0)))
 
-#define SPI_INTR_SOURCE(u)  ((u==0)?ETS_SPI1_INTR_SOURCE:((u==1)?ETS_SPI2_INTR_SOURCE:((u==2)?ETS_SPI3_INTR_SOURCE:0)))
+#elif CONFIG_IDF_TARGET_ESP32S3
+// ESP32S3
+#define SPI_COUNT           (2)
+
+#define SPI_CLK_IDX(p)      ((p==0)?FSPICLK_OUT_IDX:((p==1)?SPI3_CLK_OUT_IDX:0))
+#define SPI_MISO_IDX(p)     ((p==0)?FSPIQ_OUT_IDX:((p==1)?SPI3_Q_OUT_IDX:0))
+#define SPI_MOSI_IDX(p)     ((p==0)?FSPID_IN_IDX:((p==1)?SPI3_D_IN_IDX:0))
+
+#define SPI_HSPI_SS_IDX(n)  ((n==0)?SPI3_CS0_OUT_IDX:((n==1)?SPI3_CS1_OUT_IDX:0))
+#define SPI_FSPI_SS_IDX(n)  ((n==0)?FSPICS0_OUT_IDX:((n==1)?FSPICS1_OUT_IDX:0))
+#define SPI_SS_IDX(p, n)    ((p==0)?SPI_FSPI_SS_IDX(n):((p==1)?SPI_HSPI_SS_IDX(n):0))
 
 #elif CONFIG_IDF_TARGET_ESP32C3
-// ESP32S2
+// ESP32C3
 #define SPI_COUNT           (1)
 
 #define SPI_CLK_IDX(p)      FSPICLK_OUT_IDX
@@ -84,8 +99,6 @@ struct spi_struct_t {
 #define SPI_SPI_SS_IDX(n)   ((n==0)?FSPICS0_OUT_IDX:((n==1)?FSPICS1_OUT_IDX:((n==2)?FSPICS2_OUT_IDX:FSPICS0_OUT_IDX)))
 #define SPI_SS_IDX(p, n)    SPI_SPI_SS_IDX(n)
 
-#define SPI_INTR_SOURCE(u)  ETS_SPI2_INTR_SOURCE
-
 #else
 // ESP32
 #define SPI_COUNT           (4)
@@ -99,8 +112,6 @@ struct spi_struct_t {
 #define SPI_VSPI_SS_IDX(n)  ((n==0)?VSPICS0_OUT_IDX:((n==1)?VSPICS1_OUT_IDX:((n==2)?VSPICS2_OUT_IDX:VSPICS0_OUT_IDX)))
 #define SPI_SS_IDX(p, n)    ((p==0)?SPI_SPI_SS_IDX(n):((p==1)?SPI_SPI_SS_IDX(n):((p==2)?SPI_HSPI_SS_IDX(n):((p==3)?SPI_VSPI_SS_IDX(n):0))))
 
-#define SPI_INTR_SOURCE(u)  ((u==0)?ETS_SPI0_INTR_SOURCE:((u==1)?ETS_SPI1_INTR_SOURCE:((u==2)?ETS_SPI2_INTR_SOURCE:((p==3)?ETS_SPI3_INTR_SOURCE:0))))
-
 #endif
 
 #if CONFIG_DISABLE_HAL_LOCKS
@@ -112,6 +123,11 @@ static spi_t _spi_bus_array[] = {
     {(volatile spi_dev_t *)(DR_REG_SPI1_BASE), 0},
     {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 1},
     {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 2}
+#elif CONFIG_IDF_TARGET_ESP32S3
+    {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0},
+    {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 1}
+#elif CONFIG_IDF_TARGET_ESP32C3
+    {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0}
 #else
     {(volatile spi_dev_t *)(DR_REG_SPI0_BASE), 0},
     {(volatile spi_dev_t *)(DR_REG_SPI1_BASE), 1},
@@ -128,8 +144,11 @@ static spi_t _spi_bus_array[] = {
     {(volatile spi_dev_t *)(DR_REG_SPI1_BASE), NULL, 0},
     {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 1},
     {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 2}
+#elif CONFIG_IDF_TARGET_ESP32S3
+    {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0},
+    {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 1}
 #elif CONFIG_IDF_TARGET_ESP32C3
-    {(volatile spi_dev_t *)(&GPSPI2), NULL, FSPI}
+    {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0}
 #else
     {(volatile spi_dev_t *)(DR_REG_SPI0_BASE), NULL, 0},
     {(volatile spi_dev_t *)(DR_REG_SPI1_BASE), NULL, 1},
@@ -152,6 +171,13 @@ void spiAttachSCK(spi_t * spi, int8_t sck)
             log_e("HSPI Does not have default pins on ESP32S2!");
             return;
         }
+#elif CONFIG_IDF_TARGET_ESP32S3
+        if(spi->num == FSPI) {
+            sck = 12;
+        } else {
+            log_e("HSPI Does not have default pins on ESP32S3!");
+            return;
+        }
 #elif CONFIG_IDF_TARGET_ESP32
         if(spi->num == HSPI) {
             sck = 14;
@@ -182,6 +208,13 @@ void spiAttachMISO(spi_t * spi, int8_t miso)
             log_e("HSPI Does not have default pins on ESP32S2!");
             return;
         }
+#elif CONFIG_IDF_TARGET_ESP32S3
+        if(spi->num == FSPI) {
+            miso = 13;
+        } else {
+            log_e("HSPI Does not have default pins on ESP32S3!");
+            return;
+        }
 #elif CONFIG_IDF_TARGET_ESP32
         if(spi->num == HSPI) {
             miso = 12;
@@ -207,13 +240,20 @@ void spiAttachMOSI(spi_t * spi, int8_t mosi)
         return;
     }
     if(mosi < 0) {
-#if CONFIG_IDF_TARGET_ESP32S2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
         if(spi->num == FSPI) {
             mosi = 35;
         } else {
             log_e("HSPI Does not have default pins on ESP32S2!");
             return;
         }
+#elif CONFIG_IDF_TARGET_ESP32S3
+        if(spi->num == FSPI) {
+            mosi = 11;
+        } else {
+            log_e("HSPI Does not have default pins on ESP32S3!");
+            return;
+        }
 #elif CONFIG_IDF_TARGET_ESP32
         if(spi->num == HSPI) {
             mosi = 13;
@@ -237,13 +277,20 @@ void spiDetachSCK(spi_t * spi, int8_t sck)
         return;
     }
     if(sck < 0) {
-#if CONFIG_IDF_TARGET_ESP32S2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
         if(spi->num == FSPI) {
             sck = 36;
         } else {
             log_e("HSPI Does not have default pins on ESP32S2!");
             return;
         }
+#elif CONFIG_IDF_TARGET_ESP32S3
+        if(spi->num == FSPI) {
+            sck = 12;
+        } else {
+            log_e("HSPI Does not have default pins on ESP32S3!");
+            return;
+        }
 #elif CONFIG_IDF_TARGET_ESP32
         if(spi->num == HSPI) {
             sck = 14;
@@ -267,13 +314,20 @@ void spiDetachMISO(spi_t * spi, int8_t miso)
         return;
     }
     if(miso < 0) {
-#if CONFIG_IDF_TARGET_ESP32S2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
         if(spi->num == FSPI) {
             miso = 37;
         } else {
             log_e("HSPI Does not have default pins on ESP32S2!");
             return;
         }
+#elif CONFIG_IDF_TARGET_ESP32S3
+        if(spi->num == FSPI) {
+            miso = 13;
+        } else {
+            log_e("HSPI Does not have default pins on ESP32S3!");
+            return;
+        }
 #elif CONFIG_IDF_TARGET_ESP32
         if(spi->num == HSPI) {
             miso = 12;
@@ -297,13 +351,20 @@ void spiDetachMOSI(spi_t * spi, int8_t mosi)
         return;
     }
     if(mosi < 0) {
-#if CONFIG_IDF_TARGET_ESP32S2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
         if(spi->num == FSPI) {
             mosi = 35;
         } else {
             log_e("HSPI Does not have default pins on ESP32S2!");
             return;
         }
+#elif CONFIG_IDF_TARGET_ESP32S3
+        if(spi->num == FSPI) {
+            mosi = 11;
+        } else {
+            log_e("HSPI Does not have default pins on ESP32S3!");
+            return;
+        }
 #elif CONFIG_IDF_TARGET_ESP32
         if(spi->num == HSPI) {
             mosi = 13;
@@ -338,6 +399,13 @@ void spiAttachSS(spi_t * spi, uint8_t cs_num, int8_t ss)
             log_e("HSPI Does not have default pins on ESP32S2!");
             return;
         }
+#elif CONFIG_IDF_TARGET_ESP32S3
+        if(spi->num == FSPI) {
+            ss = 10;
+        } else {
+            log_e("HSPI Does not have default pins on ESP32S3!");
+            return;
+        }
 #elif CONFIG_IDF_TARGET_ESP32
         if(spi->num == HSPI) {
             ss = 15;
@@ -369,6 +437,13 @@ void spiDetachSS(spi_t * spi, int8_t ss)
             log_e("HSPI Does not have default pins on ESP32S2!");
             return;
         }
+#elif CONFIG_IDF_TARGET_ESP32S3
+        if(spi->num == FSPI) {
+            ss = 10;
+        } else {
+            log_e("HSPI Does not have default pins on ESP32S3!");
+            return;
+        }
 #elif CONFIG_IDF_TARGET_ESP32
         if(spi->num == HSPI) {
             ss = 15;
@@ -392,7 +467,7 @@ void spiEnableSSPins(spi_t * spi, uint8_t cs_mask)
         return;
     }
     SPI_MUTEX_LOCK();
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
     spi->dev->misc.val &= ~(cs_mask & SPI_CS_MASK_ALL);
 #else
     spi->dev->pin.val &= ~(cs_mask & SPI_CS_MASK_ALL);
@@ -406,7 +481,7 @@ void spiDisableSSPins(spi_t * spi, uint8_t cs_mask)
         return;
     }
     SPI_MUTEX_LOCK();
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
     spi->dev->misc.val |= (cs_mask & SPI_CS_MASK_ALL);
 #else
     spi->dev->pin.val |= (cs_mask & SPI_CS_MASK_ALL);
@@ -442,7 +517,7 @@ void spiSSSet(spi_t * spi)
         return;
     }
     SPI_MUTEX_LOCK();
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
     spi->dev->misc.cs_keep_active = 1;
 #else
     spi->dev->pin.cs_keep_active = 1;
@@ -456,7 +531,7 @@ void spiSSClear(spi_t * spi)
         return;
     }
     SPI_MUTEX_LOCK();
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
     spi->dev->misc.cs_keep_active = 0;
 #else
     spi->dev->pin.cs_keep_active = 0;
@@ -487,7 +562,7 @@ uint8_t spiGetDataMode(spi_t * spi)
     if(!spi) {
         return 0;
     }
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
     bool idleEdge = spi->dev->misc.ck_idle_edge;
 #else
     bool idleEdge = spi->dev->pin.ck_idle_edge;
@@ -513,7 +588,7 @@ void spiSetDataMode(spi_t * spi, uint8_t dataMode)
     SPI_MUTEX_LOCK();
     switch (dataMode) {
     case SPI_MODE1:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
         spi->dev->misc.ck_idle_edge = 0;
 #else
         spi->dev->pin.ck_idle_edge = 0;
@@ -521,7 +596,7 @@ void spiSetDataMode(spi_t * spi, uint8_t dataMode)
         spi->dev->user.ck_out_edge = 1;
         break;
     case SPI_MODE2:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
         spi->dev->misc.ck_idle_edge = 1;
 #else
         spi->dev->pin.ck_idle_edge = 1;
@@ -529,7 +604,7 @@ void spiSetDataMode(spi_t * spi, uint8_t dataMode)
         spi->dev->user.ck_out_edge = 1;
         break;
     case SPI_MODE3:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
         spi->dev->misc.ck_idle_edge = 1;
 #else
         spi->dev->pin.ck_idle_edge = 1;
@@ -538,7 +613,7 @@ void spiSetDataMode(spi_t * spi, uint8_t dataMode)
         break;
     case SPI_MODE0:
     default:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
         spi->dev->misc.ck_idle_edge = 0;
 #else
         spi->dev->pin.ck_idle_edge = 0;
@@ -587,11 +662,11 @@ static void _on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old_apb
 
 static void spiInitBus(spi_t * spi)
 {
-#ifndef CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
     spi->dev->slave.trans_done = 0;
 #endif
     spi->dev->slave.val = 0;
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
     spi->dev->misc.val = 0;
 #else
     spi->dev->pin.val = 0;
@@ -599,7 +674,7 @@ static void spiInitBus(spi_t * spi)
     spi->dev->user.val = 0;
     spi->dev->user1.val = 0;
     spi->dev->ctrl.val = 0;
-#ifndef CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
     spi->dev->ctrl1.val = 0;
     spi->dev->ctrl2.val = 0;
 #else
@@ -652,6 +727,14 @@ spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_
         DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI01_CLK_EN);
         DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI01_RST);
     }
+#elif CONFIG_IDF_TARGET_ESP32S3
+    if(spi_num == FSPI) {
+        periph_module_reset( PERIPH_SPI2_MODULE );
+        periph_module_enable( PERIPH_SPI2_MODULE );
+    } else if(spi_num == HSPI) {
+        periph_module_reset( PERIPH_SPI3_MODULE );
+        periph_module_enable( PERIPH_SPI3_MODULE );
+    }
 #elif CONFIG_IDF_TARGET_ESP32
     if(spi_num == HSPI) {
         DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI2_CLK_EN);
@@ -670,7 +753,7 @@ spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_
 
     SPI_MUTEX_LOCK();
     spiInitBus(spi);
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->clk_gate.clk_en = 1;
     spi->dev->clk_gate.mst_clk_sel = 1;
     spi->dev->clk_gate.mst_clk_active = 1;
@@ -707,7 +790,7 @@ void spiWaitReady(spi_t * spi)
 #if CONFIG_IDF_TARGET_ESP32S2
 #define usr_mosi_dbitlen usr_mosi_bit_len
 #define usr_miso_dbitlen usr_miso_bit_len
-#elif CONFIG_IDF_TARGET_ESP32C3
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
 #define usr_mosi_dbitlen ms_data_bitlen
 #define usr_miso_dbitlen ms_data_bitlen
 #define mosi_dlen ms_dlen
@@ -725,13 +808,13 @@ void spiWrite(spi_t * spi, const uint32_t *data, uint8_t len)
     }
     SPI_MUTEX_LOCK();
     spi->dev->mosi_dlen.usr_mosi_dbitlen = (len * 32) - 1;
-#ifndef CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
     spi->dev->miso_dlen.usr_miso_dbitlen = 0;
 #endif
     for(i=0; i<len; i++) {
         spi->dev->data_buf[i] = data[i];
     }
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -755,7 +838,7 @@ void spiTransfer(spi_t * spi, uint32_t *data, uint8_t len)
     for(i=0; i<len; i++) {
         spi->dev->data_buf[i] = data[i];
     }
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -774,11 +857,11 @@ void spiWriteByte(spi_t * spi, uint8_t data)
     }
     SPI_MUTEX_LOCK();
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
-#ifndef CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
     spi->dev->miso_dlen.usr_miso_dbitlen = 0;
 #endif
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -796,7 +879,7 @@ uint8_t spiTransferByte(spi_t * spi, uint8_t data)
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
     spi->dev->miso_dlen.usr_miso_dbitlen = 7;
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -827,11 +910,11 @@ void spiWriteWord(spi_t * spi, uint16_t data)
     }
     SPI_MUTEX_LOCK();
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
-#ifndef CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
     spi->dev->miso_dlen.usr_miso_dbitlen = 0;
 #endif
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -852,7 +935,7 @@ uint16_t spiTransferWord(spi_t * spi, uint16_t data)
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
     spi->dev->miso_dlen.usr_miso_dbitlen = 15;
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -876,11 +959,11 @@ void spiWriteLong(spi_t * spi, uint32_t data)
     }
     SPI_MUTEX_LOCK();
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
-#ifndef CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
     spi->dev->miso_dlen.usr_miso_dbitlen = 0;
 #endif
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -901,7 +984,7 @@ uint32_t spiTransferLong(spi_t * spi, uint32_t data)
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
     spi->dev->miso_dlen.usr_miso_dbitlen = 31;
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -944,7 +1027,7 @@ static void __spiTransferBytes(spi_t * spi, const uint8_t * data, uint8_t * out,
         spi->dev->data_buf[i] = wordsBuf[i];    //copy buffer to spi fifo
     }
 
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1012,7 +1095,7 @@ void spiTransaction(spi_t * spi, uint32_t clockDiv, uint8_t dataMode, uint8_t bi
     spi->dev->clock.val = clockDiv;
     switch (dataMode) {
     case SPI_MODE1:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
         spi->dev->misc.ck_idle_edge = 0;
 #else
         spi->dev->pin.ck_idle_edge = 0;
@@ -1020,7 +1103,7 @@ void spiTransaction(spi_t * spi, uint32_t clockDiv, uint8_t dataMode, uint8_t bi
         spi->dev->user.ck_out_edge = 1;
         break;
     case SPI_MODE2:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
         spi->dev->misc.ck_idle_edge = 1;
 #else
         spi->dev->pin.ck_idle_edge = 1;
@@ -1028,7 +1111,7 @@ void spiTransaction(spi_t * spi, uint32_t clockDiv, uint8_t dataMode, uint8_t bi
         spi->dev->user.ck_out_edge = 1;
         break;
     case SPI_MODE3:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
         spi->dev->misc.ck_idle_edge = 1;
 #else
         spi->dev->pin.ck_idle_edge = 1;
@@ -1037,7 +1120,7 @@ void spiTransaction(spi_t * spi, uint32_t clockDiv, uint8_t dataMode, uint8_t bi
         break;
     case SPI_MODE0:
     default:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
         spi->dev->misc.ck_idle_edge = 0;
 #else
         spi->dev->pin.ck_idle_edge = 0;
@@ -1076,11 +1159,11 @@ void ARDUINO_ISR_ATTR spiWriteByteNL(spi_t * spi, uint8_t data)
         return;
     }
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
-#ifndef CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
     spi->dev->miso_dlen.usr_miso_dbitlen = 0;
 #endif
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1096,7 +1179,7 @@ uint8_t spiTransferByteNL(spi_t * spi, uint8_t data)
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
     spi->dev->miso_dlen.usr_miso_dbitlen = 7;
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1115,11 +1198,11 @@ void ARDUINO_ISR_ATTR spiWriteShortNL(spi_t * spi, uint16_t data)
         MSB_16_SET(data, data);
     }
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
-#ifndef CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
     spi->dev->miso_dlen.usr_miso_dbitlen = 0;
 #endif
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1138,7 +1221,7 @@ uint16_t spiTransferShortNL(spi_t * spi, uint16_t data)
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
     spi->dev->miso_dlen.usr_miso_dbitlen = 15;
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1160,11 +1243,11 @@ void ARDUINO_ISR_ATTR spiWriteLongNL(spi_t * spi, uint32_t data)
         MSB_32_SET(data, data);
     }
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
-#ifndef CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
     spi->dev->miso_dlen.usr_miso_dbitlen = 0;
 #endif
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1183,7 +1266,7 @@ uint32_t spiTransferLongNL(spi_t * spi, uint32_t data)
     spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
     spi->dev->miso_dlen.usr_miso_dbitlen = 31;
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1212,13 +1295,13 @@ void spiWriteNL(spi_t * spi, const void * data_in, uint32_t len){
         c_longs = (longs > 16)?16:longs;
 
         spi->dev->mosi_dlen.usr_mosi_dbitlen = (c_len*8)-1;
-#ifndef CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
     spi->dev->miso_dlen.usr_miso_dbitlen = 0;
 #endif
         for (int i=0; i<c_longs; i++) {
             spi->dev->data_buf[i] = data[i];
         }
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
         spi->dev->cmd.update = 1;
         while (spi->dev->cmd.update);
 #endif
@@ -1258,7 +1341,7 @@ void spiTransferBytesNL(spi_t * spi, const void * data_in, uint8_t * data_out, u
                 spi->dev->data_buf[i] = 0xFFFFFFFF;
             }
         }
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
         spi->dev->cmd.update = 1;
         while (spi->dev->cmd.update);
 #endif
@@ -1317,7 +1400,7 @@ void spiTransferBitsNL(spi_t * spi, uint32_t data, uint32_t * out, uint8_t bits)
     spi->dev->mosi_dlen.usr_mosi_dbitlen = (bits - 1);
     spi->dev->miso_dlen.usr_miso_dbitlen = (bits - 1);
     spi->dev->data_buf[0] = data;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1353,7 +1436,7 @@ void ARDUINO_ISR_ATTR spiWritePixelsNL(spi_t * spi, const void * data_in, uint32
         l_bytes = (c_len & 3);
 
         spi->dev->mosi_dlen.usr_mosi_dbitlen = (c_len*8)-1;
-#ifndef CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
     spi->dev->miso_dlen.usr_miso_dbitlen = 0;
 #endif
         for (int i=0; i<c_longs; i++) {
@@ -1371,7 +1454,7 @@ void ARDUINO_ISR_ATTR spiWritePixelsNL(spi_t * spi, const void * data_in, uint32
                 spi->dev->data_buf[i] = data[i];
             }
         }
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
         spi->dev->cmd.update = 1;
         while (spi->dev->cmd.update);
 #endif
@@ -1397,7 +1480,7 @@ typedef union {
             uint32_t clkcnt_l:       6;                     /*it must be equal to spi_clkcnt_N.*/
             uint32_t clkcnt_h:       6;                     /*it must be floor((spi_clkcnt_N+1)/2-1).*/
             uint32_t clkcnt_n:       6;                     /*it is the divider of spi_clk. So spi_clk frequency is system/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1)*/
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
             uint32_t clkdiv_pre:     4;                     /*it is pre-divider of spi_clk.*/
             uint32_t reserved:       9;  					/*reserved*/
 #else
@@ -1444,7 +1527,7 @@ uint32_t spiFrequencyToClockDiv(uint32_t freq)
 
         while(calPreVari++ <= 1) {
             calPre = (((apb_freq / (reg.clkcnt_n + 1)) / freq) - 1) + calPreVari;
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
             if(calPre > 0xF) {
                 reg.clkdiv_pre = 0xF;
 #else
@@ -1475,4 +1558,3 @@ uint32_t spiFrequencyToClockDiv(uint32_t freq)
     }
     return bestReg.value;
 }
-
diff --git a/cores/esp32/esp32-hal-spi.h b/cores/esp32/esp32-hal-spi.h
index 6fbb7b3dca7..89ceefccd60 100644
--- a/cores/esp32/esp32-hal-spi.h
+++ b/cores/esp32/esp32-hal-spi.h
@@ -25,7 +25,7 @@ extern "C" {
 
 #define SPI_HAS_TRANSACTION
 
-#if CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
 #define FSPI  0
 #define HSPI  1
 #else
diff --git a/cores/esp32/esp32-hal-time.c b/cores/esp32/esp32-hal-time.c
index 2d0276ff3e3..e7048307284 100644
--- a/cores/esp32/esp32-hal-time.c
+++ b/cores/esp32/esp32-hal-time.c
@@ -44,8 +44,6 @@ static void setTimeZone(long offset, int daylight)
 /*
  * configTime
  * Source: https://github.com/esp8266/Arduino/blob/master/cores/esp8266/time.c
- * Note: Bundled Arduino lwip supports only ONE ntp server, 2nd and 3rd options are silently ignored
- *       see CONFIG_LWIP_DHCP_MAX_NTP_SERVERS define in ./tools/sdk/esp32/sdkconfig
  * */
 void configTime(long gmtOffset_sec, int daylightOffset_sec, const char* server1, const char* server2, const char* server3)
 {
@@ -65,8 +63,6 @@ void configTime(long gmtOffset_sec, int daylightOffset_sec, const char* server1,
 /*
  * configTzTime
  * sntp setup using TZ environment variable
- * Note: Bundled Arduino lwip supports only ONE ntp server, 2nd and 3rd options are silently ignored
- *       see CONFIG_LWIP_DHCP_MAX_NTP_SERVERS define in ./tools/sdk/esp32/sdkconfig
  * */
 void configTzTime(const char* tz, const char* server1, const char* server2, const char* server3)
 {
diff --git a/cores/esp32/esp32-hal-timer.h b/cores/esp32/esp32-hal-timer.h
index 7d0fe1f6336..5bbed623586 100644
--- a/cores/esp32/esp32-hal-timer.h
+++ b/cores/esp32/esp32-hal-timer.h
@@ -58,7 +58,7 @@ bool timerGetAutoReload(hw_timer_t *timer);
 
 void timerAlarmEnable(hw_timer_t *timer);
 void timerAlarmDisable(hw_timer_t *timer);
-void timerAlarmWrite(hw_timer_t *timer, uint64_t interruptAt, bool autoreload);
+void timerAlarmWrite(hw_timer_t *timer, uint64_t alarm_value, bool autoreload);
 
 bool timerAlarmEnabled(hw_timer_t *timer);
 uint64_t timerAlarmRead(hw_timer_t *timer);
diff --git a/cores/esp32/esp32-hal-tinyusb.c b/cores/esp32/esp32-hal-tinyusb.c
index a413c75260e..c34af2a9ef6 100644
--- a/cores/esp32/esp32-hal-tinyusb.c
+++ b/cores/esp32/esp32-hal-tinyusb.c
@@ -34,9 +34,16 @@
 #include "esp32-hal.h"
 
 #include "esp32-hal-tinyusb.h"
+#if CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/usb/usb_persist.h"
 #include "esp32s2/rom/usb/usb_dc.h"
 #include "esp32s2/rom/usb/chip_usb_dw_wrapper.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "hal/usb_serial_jtag_ll.h"
+#include "esp32s3/rom/usb/usb_persist.h"
+#include "esp32s3/rom/usb/usb_dc.h"
+#include "esp32s3/rom/usb/chip_usb_dw_wrapper.h"
+#endif
 
 typedef enum{
     TINYUSB_USBDEV_0,
@@ -370,6 +377,120 @@ __attribute__ ((weak)) int32_t tud_msc_scsi_cb (uint8_t lun, uint8_t const scsi_
 static bool usb_persist_enabled = false;
 static restart_type_t usb_persist_mode = RESTART_NO_PERSIST;
 
+#if CONFIG_IDF_TARGET_ESP32S3
+
+static void hw_cdc_reset_handler(void *arg) {
+    portBASE_TYPE xTaskWoken = 0;
+    uint32_t usbjtag_intr_status = usb_serial_jtag_ll_get_intsts_mask();
+    usb_serial_jtag_ll_clr_intsts_mask(usbjtag_intr_status);
+    
+    if (usbjtag_intr_status & USB_SERIAL_JTAG_INTR_BUS_RESET) {
+        xSemaphoreGiveFromISR((xSemaphoreHandle)arg, &xTaskWoken);
+    }
+
+    if (xTaskWoken == pdTRUE) {
+        portYIELD_FROM_ISR();
+    }
+}
+
+static void usb_switch_to_cdc_jtag(){
+    // Disable USB-OTG
+    periph_module_reset(PERIPH_USB_MODULE);
+    //periph_module_enable(PERIPH_USB_MODULE);
+    periph_module_disable(PERIPH_USB_MODULE);
+
+    // Switch to hardware CDC+JTAG
+    CLEAR_PERI_REG_MASK(RTC_CNTL_USB_CONF_REG, (RTC_CNTL_SW_HW_USB_PHY_SEL|RTC_CNTL_SW_USB_PHY_SEL|RTC_CNTL_USB_PAD_ENABLE));
+
+    // Do not use external PHY
+    CLEAR_PERI_REG_MASK(USB_SERIAL_JTAG_CONF0_REG, USB_SERIAL_JTAG_PHY_SEL);
+
+    // Release GPIO pins from  CDC+JTAG
+    CLEAR_PERI_REG_MASK(USB_SERIAL_JTAG_CONF0_REG, USB_SERIAL_JTAG_USB_PAD_ENABLE);
+
+    // Force the host to re-enumerate (BUS_RESET)
+    pinMode(USBPHY_DM_NUM, OUTPUT_OPEN_DRAIN);
+    pinMode(USBPHY_DP_NUM, OUTPUT_OPEN_DRAIN);
+    digitalWrite(USBPHY_DM_NUM, LOW);
+    digitalWrite(USBPHY_DP_NUM, LOW);
+
+    // Initialize CDC+JTAG ISR to listen for BUS_RESET
+    usb_serial_jtag_ll_disable_intr_mask(USB_SERIAL_JTAG_LL_INTR_MASK);
+    usb_serial_jtag_ll_clr_intsts_mask(USB_SERIAL_JTAG_LL_INTR_MASK);
+    usb_serial_jtag_ll_ena_intr_mask(USB_SERIAL_JTAG_INTR_BUS_RESET);
+    intr_handle_t intr_handle = NULL;
+    xSemaphoreHandle reset_sem = xSemaphoreCreateBinary();
+    if(reset_sem){
+        if(esp_intr_alloc(ETS_USB_SERIAL_JTAG_INTR_SOURCE, 0, hw_cdc_reset_handler, reset_sem, &intr_handle) != ESP_OK){
+            vSemaphoreDelete(reset_sem);
+            reset_sem = NULL;
+            log_e("HW USB CDC failed to init interrupts");
+        }
+    } else {
+        log_e("reset_sem init failed");
+    }
+
+    // Connect GPIOs to integrated CDC+JTAG
+    SET_PERI_REG_MASK(USB_SERIAL_JTAG_CONF0_REG, USB_SERIAL_JTAG_USB_PAD_ENABLE);
+
+    // Wait for BUS_RESET to give us back the semaphore
+    if(reset_sem){
+        if(xSemaphoreTake(reset_sem, 1000 / portTICK_PERIOD_MS) != pdPASS){
+            log_e("reset_sem timeout");
+        }
+        usb_serial_jtag_ll_disable_intr_mask(USB_SERIAL_JTAG_LL_INTR_MASK);
+        esp_intr_free(intr_handle);
+        vSemaphoreDelete(reset_sem);
+    }
+}
+#endif
+
+static void IRAM_ATTR usb_persist_shutdown_handler(void)
+{
+    if(usb_persist_mode != RESTART_NO_PERSIST){
+        if (usb_persist_enabled) {
+            usb_dc_prepare_persist();
+        }
+        if (usb_persist_mode == RESTART_BOOTLOADER) {
+            //USB CDC Download
+            if (usb_persist_enabled) {
+                chip_usb_set_persist_flags(USBDC_PERSIST_ENA);
+#if CONFIG_IDF_TARGET_ESP32S2
+            } else {
+                periph_module_reset(PERIPH_USB_MODULE);
+                periph_module_enable(PERIPH_USB_MODULE);
+#endif
+            }
+            REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT);
+        } else if (usb_persist_mode == RESTART_BOOTLOADER_DFU) {
+            //DFU Download
+#if CONFIG_IDF_TARGET_ESP32S2
+            // Reset USB Core
+            USB0.grstctl |= USB_CSFTRST;
+            while ((USB0.grstctl & USB_CSFTRST) == USB_CSFTRST){}
+#endif
+            chip_usb_set_persist_flags(USBDC_BOOT_DFU);
+            REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT);
+        } else if (usb_persist_enabled) {
+            //USB Persist reboot
+            chip_usb_set_persist_flags(USBDC_PERSIST_ENA);
+        }
+    }
+}
+
+void usb_persist_restart(restart_type_t mode)
+{
+    if (mode < RESTART_TYPE_MAX && esp_register_shutdown_handler(usb_persist_shutdown_handler) == ESP_OK) {
+        usb_persist_mode = mode;
+#if CONFIG_IDF_TARGET_ESP32S3
+        if (mode == RESTART_BOOTLOADER) {
+            usb_switch_to_cdc_jtag();
+        }
+#endif
+        esp_restart();
+    }
+}
+
 static bool tinyusb_reserve_in_endpoint(uint8_t endpoint){
     if(endpoint > 6 || (tinyusb_endpoints.in & BIT(endpoint)) != 0){
         return false;
@@ -515,35 +636,6 @@ static void tinyusb_apply_device_config(tinyusb_device_config_t *config){
     tinyusb_device_descriptor.bDeviceProtocol = config->usb_protocol;
 }
 
-static void IRAM_ATTR usb_persist_shutdown_handler(void)
-{
-    if(usb_persist_mode != RESTART_NO_PERSIST){
-        if (usb_persist_enabled) {
-            usb_dc_prepare_persist();
-        }
-        if (usb_persist_mode == RESTART_BOOTLOADER) {
-            //USB CDC Download
-            if (usb_persist_enabled) {
-                chip_usb_set_persist_flags(USBDC_PERSIST_ENA);
-            } else {
-                periph_module_reset(PERIPH_USB_MODULE);
-                periph_module_enable(PERIPH_USB_MODULE);
-            }
-            REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT);
-        } else if (usb_persist_mode == RESTART_BOOTLOADER_DFU) {
-            //DFU Download
-            // Reset USB Core
-            USB0.grstctl |= USB_CSFTRST;
-            while ((USB0.grstctl & USB_CSFTRST) == USB_CSFTRST){}
-            chip_usb_set_persist_flags(USBDC_BOOT_DFU);
-            REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT);
-        } else if (usb_persist_enabled) {
-            //USB Persist reboot
-            chip_usb_set_persist_flags(USBDC_PERSIST_ENA);
-        }
-    }
-}
-
 // USB Device Driver task
 // This top level thread processes all usb events and invokes callbacks
 static void usb_device_task(void *param) {
@@ -607,11 +699,6 @@ esp_err_t tinyusb_init(tinyusb_device_config_t *config) {
         periph_module_enable(PERIPH_USB_MODULE);
     }
 
-    if (esp_register_shutdown_handler(usb_persist_shutdown_handler) != ESP_OK) {
-        tinyusb_is_initialized = false;
-        return ESP_FAIL;
-    }
-
     tinyusb_config_t tusb_cfg = {
             .external_phy = false // In the most cases you need to use a `false` value
     };
@@ -624,14 +711,6 @@ esp_err_t tinyusb_init(tinyusb_device_config_t *config) {
     return err;
 }
 
-void usb_persist_restart(restart_type_t mode)
-{
-    if (mode < RESTART_TYPE_MAX) {
-        usb_persist_mode = mode;
-        esp_restart();
-    }
-}
-
 uint8_t tinyusb_add_string_descriptor(const char * str){
     if(str == NULL || tinyusb_string_descriptor_len >= MAX_STRING_DESCRIPTORS){
         return 0;
diff --git a/cores/esp32/esp32-hal-tinyusb.h b/cores/esp32/esp32-hal-tinyusb.h
index 7332887a2b0..84e156e874d 100644
--- a/cores/esp32/esp32-hal-tinyusb.h
+++ b/cores/esp32/esp32-hal-tinyusb.h
@@ -15,7 +15,6 @@
 
 #include "esp32-hal.h"
 
-#if CONFIG_IDF_TARGET_ESP32S2
 #if CONFIG_TINYUSB_ENABLED
 
 #ifdef __cplusplus
@@ -105,4 +104,3 @@ uint8_t tinyusb_get_free_out_endpoint(void);
 #endif
 
 #endif /* CONFIG_TINYUSB_ENABLED */
-#endif /* CONFIG_IDF_TARGET_ESP32S2 */
diff --git a/cores/esp32/esp32-hal-touch.c b/cores/esp32/esp32-hal-touch.c
index 1492eff78a8..539c0004f98 100644
--- a/cores/esp32/esp32-hal-touch.c
+++ b/cores/esp32/esp32-hal-touch.c
@@ -12,219 +12,268 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include "esp32-hal-touch.h"
-#ifndef CONFIG_IDF_TARGET_ESP32C3
-#include "freertos/FreeRTOS.h"
-#include "freertos/task.h"
-#include "esp_attr.h"
-#include "soc/rtc_io_reg.h"
-#include "soc/sens_reg.h"
-#include "soc/sens_struct.h"
-#include "soc/rtc_cntl_reg.h"
+#include "soc/soc_caps.h"
+#if SOC_TOUCH_SENSOR_NUM > 0
+
 #include "driver/touch_sensor.h"
+#include "esp32-hal-touch.h"
 
-#include "esp_system.h"
-#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
-#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
-#include "esp32/rom/ets_sys.h"
-#include "esp_intr_alloc.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#include "esp_intr_alloc.h"
-#include "soc/periph_defs.h"
-#else 
-#error Target CONFIG_IDF_TARGET is not supported
-#endif
-#else // ESP32 Before IDF 4.0
-#include "rom/ets_sys.h"
-#include "esp_intr.h"
-#endif
+/*
+    Internal Private Touch Data Structure and Functions
+*/
 
+#if SOC_TOUCH_VERSION_1         // ESP32 
 static uint16_t __touchSleepCycles = 0x1000;
 static uint16_t __touchMeasureCycles = 0x1000;
+#elif SOC_TOUCH_VERSION_2       // ESP32S2, ESP32S3
+static uint16_t __touchSleepCycles = TOUCH_PAD_SLEEP_CYCLE_DEFAULT;
+static uint16_t __touchMeasureCycles = TOUCH_PAD_MEASURE_CYCLE_DEFAULT;
+#endif
 
 typedef void (*voidFuncPtr)(void);
-static voidFuncPtr __touchInterruptHandlers[10] = {0,};
-static intr_handle_t touch_intr_handle = NULL;
+typedef void (*voidArgFuncPtr)(void *);
+
+typedef struct {
+    voidFuncPtr fn;
+    bool callWithArgs;
+    void* arg;
+#if SOC_TOUCH_VERSION_2     // Only for ESP32S2 and ESP32S3
+    bool lastStatusIsPressed;
+#endif
+} TouchInterruptHandle_t;
 
-void ARDUINO_ISR_ATTR __touchISR(void * arg)
+static TouchInterruptHandle_t __touchInterruptHandlers[SOC_TOUCH_SENSOR_NUM] = {0,};
+
+static void ARDUINO_ISR_ATTR __touchISR(void * arg)
 {
-#if CONFIG_IDF_TARGET_ESP32
-    uint32_t pad_intr = READ_PERI_REG(SENS_SAR_TOUCH_CTRL2_REG) & 0x3ff;
-    uint32_t rtc_intr = READ_PERI_REG(RTC_CNTL_INT_ST_REG);
-    uint8_t i = 0;
+#if SOC_TOUCH_VERSION_1         // ESP32 
+    uint32_t pad_intr = touch_pad_get_status();
     //clear interrupt
-    WRITE_PERI_REG(RTC_CNTL_INT_CLR_REG, rtc_intr);
-    SET_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_MEAS_EN_CLR);
-
-    if (rtc_intr & RTC_CNTL_TOUCH_INT_ST) {
-        for (i = 0; i < 10; ++i) {
-            if ((pad_intr >> i) & 0x01) {
-                if(__touchInterruptHandlers[i]){
-                    __touchInterruptHandlers[i]();
+    touch_pad_clear_status();
+    // call Pad ISR User callback
+    for (int i = 0; i < SOC_TOUCH_SENSOR_NUM; i++) {
+        if ((pad_intr >> i) & 0x01) {
+            if(__touchInterruptHandlers[i].fn){
+                // keeping backward compatibility with "void cb(void)" and with new "void cb(vooid *)"
+                if (__touchInterruptHandlers[i].callWithArgs) {
+                    ((voidArgFuncPtr)__touchInterruptHandlers[i].fn)(__touchInterruptHandlers[i].arg);
+                } else {
+                    __touchInterruptHandlers[i].fn();
                 }
             }
         }
     }
+#elif SOC_TOUCH_VERSION_2     // ESP32S2, ESP32S3
+    touch_pad_intr_mask_t evt = touch_pad_read_intr_status_mask();
+    uint8_t pad_num = touch_pad_get_current_meas_channel();
+    if (evt & TOUCH_PAD_INTR_MASK_ACTIVE) {
+        // touch has been pressed / touched
+        __touchInterruptHandlers[pad_num].lastStatusIsPressed = true;
+    }
+    if (evt & TOUCH_PAD_INTR_MASK_INACTIVE) {
+        // touch has been released / untouched
+        __touchInterruptHandlers[pad_num].lastStatusIsPressed = false;
+    }
+    if(__touchInterruptHandlers[pad_num].fn){
+        // keeping backward compatibility with "void cb(void)" and with new "void cb(vooid *)"
+        if (__touchInterruptHandlers[pad_num].callWithArgs) {
+            ((voidArgFuncPtr)__touchInterruptHandlers[pad_num].fn)(__touchInterruptHandlers[pad_num].arg);
+        } else {
+            __touchInterruptHandlers[pad_num].fn();
+        }
+    }
 #endif
 }
 
-void __touchSetCycles(uint16_t measure, uint16_t sleep)
+
+
+static void __touchSetCycles(uint16_t measure, uint16_t sleep)
 {
     __touchSleepCycles = sleep;
     __touchMeasureCycles = measure;
-#if CONFIG_IDF_TARGET_ESP32
-    //Touch pad SleepCycle Time
-    SET_PERI_REG_BITS(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_SLEEP_CYCLES, __touchSleepCycles, SENS_TOUCH_SLEEP_CYCLES_S);
-    //Touch Pad Measure Time
-    SET_PERI_REG_BITS(SENS_SAR_TOUCH_CTRL1_REG, SENS_TOUCH_MEAS_DELAY, __touchMeasureCycles, SENS_TOUCH_MEAS_DELAY_S);
-#else
     touch_pad_set_meas_time(sleep, measure);
-#endif
 }
 
-void __touchInit()
+
+
+static void __touchInit()
 {
     static bool initialized = false;
     if(initialized){
         return;
     }
-    initialized = true;
-#if CONFIG_IDF_TARGET_ESP32
-    SET_PERI_REG_BITS(RTC_IO_TOUCH_CFG_REG, RTC_IO_TOUCH_XPD_BIAS, 1, RTC_IO_TOUCH_XPD_BIAS_S);
-    SET_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_MEAS_EN_CLR);
-    //clear touch enable
-    WRITE_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG, 0x0);
-    SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_TOUCH_SLP_TIMER_EN);
-    __touchSetCycles(__touchMeasureCycles, __touchSleepCycles);
-    esp_intr_alloc(ETS_RTC_CORE_INTR_SOURCE, (int)ARDUINO_ISR_FLAG, __touchISR, NULL, &touch_intr_handle);
-#else
-    touch_pad_init();
-    touch_pad_set_voltage(TOUCH_HVOLT_2V7, TOUCH_LVOLT_0V5, TOUCH_HVOLT_ATTEN_0V5);
-    touch_pad_set_idle_channel_connect(TOUCH_PAD_CONN_GND);
-    __touchSetCycles(__touchMeasureCycles, __touchSleepCycles);
+ 
+   esp_err_t err = ESP_OK;
+
+#if SOC_TOUCH_VERSION_1                         // ESP32
+    err = touch_pad_init();
+    if (err != ESP_OK) {
+        goto err;
+    }
+    // the next two lines will drive the touch reading values -- both will return ESP_OK
+    touch_pad_set_voltage(TOUCH_HVOLT_2V7, TOUCH_LVOLT_0V5, TOUCH_HVOLT_ATTEN_0V); 
+    touch_pad_set_meas_time(__touchMeasureCycles, __touchSleepCycles);
+    // Touch Sensor Timer initiated
+    touch_pad_set_fsm_mode(TOUCH_FSM_MODE_TIMER);   // returns ESP_OK
+    err = touch_pad_filter_start(10);
+    if (err != ESP_OK) {
+        goto err;
+    }
+    // keep ISR activated - it can run all together (ISR + touchRead())
+    err = touch_pad_isr_register(__touchISR, NULL);
+    if (err != ESP_OK) {
+        goto err;
+    }
+    touch_pad_intr_enable();  // returns ESP_OK
+#elif SOC_TOUCH_VERSION_2                         // ESP32S2, ESP32S3
+    err = touch_pad_init();
+    if (err != ESP_OK) {
+        goto err;
+    }
+    // the next lines will drive the touch reading values -- all os them return ESP_OK
+    touch_pad_set_meas_time(__touchSleepCycles, __touchMeasureCycles);
+    touch_pad_set_voltage(TOUCH_PAD_HIGH_VOLTAGE_THRESHOLD, TOUCH_PAD_LOW_VOLTAGE_THRESHOLD, TOUCH_PAD_ATTEN_VOLTAGE_THRESHOLD);
+    touch_pad_set_idle_channel_connect(TOUCH_PAD_IDLE_CH_CONNECT_DEFAULT);
     touch_pad_denoise_t denoise = {
         .grade = TOUCH_PAD_DENOISE_BIT4,
         .cap_level = TOUCH_PAD_DENOISE_CAP_L4,
     };
     touch_pad_denoise_set_config(&denoise);
     touch_pad_denoise_enable();
-    touch_pad_set_fsm_mode(TOUCH_FSM_MODE_TIMER);
-    touch_pad_fsm_start();
+    // Touch Sensor Timer initiated
+    touch_pad_set_fsm_mode(TOUCH_FSM_MODE_TIMER);  // returns ESP_OK
+    touch_pad_fsm_start();                         // returns ESP_OK
+    //ISR setup moved to __touchChannelInit
+#endif
+
+    initialized = true;
+    return;
+err:
+    log_e(" Touch sensor initialization error.");
+    initialized = false;
+    return;
+}
+
+static void __touchChannelInit(int pad)
+{
+   static bool channels_initialized[SOC_TOUCH_SENSOR_NUM] = { false };
+       if(channels_initialized[pad]){
+        return;
+    }
+
+#if SOC_TOUCH_VERSION_1                         // ESP32
+    // Initial no Threshold and setup
+    __touchInterruptHandlers[pad].fn =  NULL;
+    touch_pad_config(pad, SOC_TOUCH_PAD_THRESHOLD_MAX);  // returns ESP_OK
+#elif SOC_TOUCH_VERSION_2                       // ESP32S2, ESP32S3
+    // Initial no Threshold and setup
+    __touchInterruptHandlers[pad].fn =  NULL;
+    touch_pad_config(pad);                       // returns ESP_OK
+    // keep ISR activated - it can run all together (ISR + touchRead())
+    esp_err_t err = touch_pad_isr_register(__touchISR, NULL, TOUCH_PAD_INTR_MASK_ACTIVE | TOUCH_PAD_INTR_MASK_INACTIVE);
+    if (err != ESP_OK) {
+        log_e(" Touch sensor initialization error.");
+        return;
+    }
+    touch_pad_intr_enable(TOUCH_PAD_INTR_MASK_ACTIVE | TOUCH_PAD_INTR_MASK_INACTIVE); // returns ESP_OK
 #endif
+
+    channels_initialized[pad] = true;
+    delay(20);  //delay needed before reading from touch channel after config
 }
 
-uint16_t __touchRead(uint8_t pin)
+static touch_value_t __touchRead(uint8_t pin)
 {
     int8_t pad = digitalPinToTouchChannel(pin);
     if(pad < 0){
         return 0;
     }
 
-    pinMode(pin, ANALOG);
-
     __touchInit();
+    __touchChannelInit(pad);
 
-#if CONFIG_IDF_TARGET_ESP32
-    uint32_t v0 = READ_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG);
-    //Disable Intr & enable touch pad
-    WRITE_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG,
-            (v0 & ~((1 << (pad + SENS_TOUCH_PAD_OUTEN2_S)) | (1 << (pad + SENS_TOUCH_PAD_OUTEN1_S))))
-            | (1 << (pad + SENS_TOUCH_PAD_WORKEN_S)));
-
-    SET_PERI_REG_MASK(SENS_SAR_TOUCH_ENABLE_REG, (1 << (pad + SENS_TOUCH_PAD_WORKEN_S)));
-
-    uint32_t rtc_tio_reg = RTC_IO_TOUCH_PAD0_REG + pad * 4;
-    WRITE_PERI_REG(rtc_tio_reg, (READ_PERI_REG(rtc_tio_reg)
-                      & ~(RTC_IO_TOUCH_PAD0_DAC_M))
-                      | (7 << RTC_IO_TOUCH_PAD0_DAC_S)//Touch Set Slope
-                      | RTC_IO_TOUCH_PAD0_TIE_OPT_M   //Enable Tie,Init Level
-                      | RTC_IO_TOUCH_PAD0_START_M     //Enable Touch Pad IO
-                      | RTC_IO_TOUCH_PAD0_XPD_M);     //Enable Touch Pad Power on
-
-    //force oneTime test start
-    SET_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_START_EN_M|SENS_TOUCH_START_FORCE_M);
-
-    SET_PERI_REG_BITS(SENS_SAR_TOUCH_CTRL1_REG, SENS_TOUCH_XPD_WAIT, 10, SENS_TOUCH_XPD_WAIT_S);
+    touch_value_t touch_value;
+    touch_pad_read_raw_data(pad, &touch_value);
 
-    while (GET_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_MEAS_DONE) == 0) {};
-
-    uint16_t touch_value = READ_PERI_REG(SENS_SAR_TOUCH_OUT1_REG + (pad / 2) * 4) >> ((pad & 1) ? SENS_TOUCH_MEAS_OUT1_S : SENS_TOUCH_MEAS_OUT0_S);
-
-    //clear touch force ,select the Touch mode is Timer
-    CLEAR_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_START_EN_M|SENS_TOUCH_START_FORCE_M);
-
-    //restore previous value
-    WRITE_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG, v0);
     return touch_value;
-#else
-    static uint32_t chan_mask = 0;
-    uint32_t value = 0;
-    if((chan_mask & (1 << pad)) == 0){
-        if(touch_pad_set_thresh((touch_pad_t)pad, TOUCH_PAD_THRESHOLD_MAX) != ESP_OK){
-        	log_e("touch_pad_set_thresh failed");
-        } else if(touch_pad_config((touch_pad_t)pad) != ESP_OK){
-        	log_e("touch_pad_config failed");
-        } else {
-        	chan_mask |= (1 << pad);
-        }
-    }
-    if((chan_mask & (1 << pad)) != 0) {
-        if(touch_pad_read_raw_data((touch_pad_t)pad, &value) != ESP_OK){
-        	log_e("touch_pad_read_raw_data failed");
-        }
-    }
-    return value;
-#endif
 }
 
-void __touchAttachInterrupt(uint8_t pin, void (*userFunc)(void), uint16_t threshold)
+static void __touchConfigInterrupt(uint8_t pin, void (*userFunc)(void), void *Args, touch_value_t threshold, bool callWithArgs)
 {
     int8_t pad = digitalPinToTouchChannel(pin);
     if(pad < 0){
         return;
     }
 
-    pinMode(pin, ANALOG);
+    if (userFunc == NULL) {
+        // dettach ISR User Call
+        __touchInterruptHandlers[pad].fn = NULL;
+        threshold = SOC_TOUCH_PAD_THRESHOLD_MAX;   // deactivate the ISR with SOC_TOUCH_PAD_THRESHOLD_MAX
+    } else {
+        // attach ISR User Call
+        __touchInit();
+        #if SOC_TOUCH_VERSION_2                 // ESP32S2, ESP32S3
+        __touchChannelInit(pad);
+        #endif
+        __touchInterruptHandlers[pad].fn = userFunc;
+        __touchInterruptHandlers[pad].callWithArgs = callWithArgs;
+        __touchInterruptHandlers[pad].arg = Args;
+    }
 
-    __touchInit();
+#if SOC_TOUCH_VERSION_1                         // ESP32
+    touch_pad_config(pad, threshold);
+#elif SOC_TOUCH_VERSION_2                       // ESP32S2, ESP32S3
+    touch_pad_set_thresh(pad, threshold);
+#endif
+}
 
-    __touchInterruptHandlers[pad] = userFunc;
-
-#if CONFIG_IDF_TARGET_ESP32
-    //clear touch force ,select the Touch mode is Timer
-    CLEAR_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_START_EN_M|SENS_TOUCH_START_FORCE_M);
-
-    //interrupt when touch value < threshold
-    CLEAR_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL1_REG, SENS_TOUCH_OUT_SEL);
-    //Intr will give ,when SET0 < threshold
-    SET_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL1_REG, SENS_TOUCH_OUT_1EN);
-    //Enable Rtc Touch Module Intr,the Interrupt need Rtc out  Enable
-    SET_PERI_REG_MASK(RTC_CNTL_INT_ENA_REG, RTC_CNTL_TOUCH_INT_ENA);
-
-    //set threshold
-    uint8_t shift = (pad & 1) ? SENS_TOUCH_OUT_TH1_S : SENS_TOUCH_OUT_TH0_S;
-    SET_PERI_REG_BITS((SENS_SAR_TOUCH_THRES1_REG + (pad / 2) * 4), SENS_TOUCH_OUT_TH0, threshold, shift);
-
-    uint32_t rtc_tio_reg = RTC_IO_TOUCH_PAD0_REG + pad * 4;
-    WRITE_PERI_REG(rtc_tio_reg, (READ_PERI_REG(rtc_tio_reg)
-                      & ~(RTC_IO_TOUCH_PAD0_DAC_M))
-                      | (7 << RTC_IO_TOUCH_PAD0_DAC_S)//Touch Set Slope
-                      | RTC_IO_TOUCH_PAD0_TIE_OPT_M   //Enable Tie,Init Level
-                      | RTC_IO_TOUCH_PAD0_START_M     //Enable Touch Pad IO
-                      | RTC_IO_TOUCH_PAD0_XPD_M);     //Enable Touch Pad Power on
-
-    //Enable Digital rtc control :work mode and out mode
-    SET_PERI_REG_MASK(SENS_SAR_TOUCH_ENABLE_REG,
-                      (1 << (pad + SENS_TOUCH_PAD_WORKEN_S)) | \
-                      (1 << (pad + SENS_TOUCH_PAD_OUTEN2_S)) | \
-                      (1 << (pad + SENS_TOUCH_PAD_OUTEN1_S)));
-#else
+// it keeps backwards compatibility
+static void __touchAttachInterrupt(uint8_t pin, void (*userFunc)(void), touch_value_t threshold)
+{
+    __touchConfigInterrupt(pin, userFunc, NULL, threshold, false);
+}
 
-#endif
+// new additional version of the API with User Args
+static void __touchAttachArgsInterrupt(uint8_t pin, void (*userFunc)(void), void *args, touch_value_t threshold)
+{
+    __touchConfigInterrupt(pin, userFunc, args, threshold, true);
+}
+
+// new additional API to dettach touch ISR
+static void __touchDettachInterrupt(uint8_t pin)
+{
+    __touchConfigInterrupt(pin, NULL, NULL, 0, false);  // userFunc as NULL acts as dettaching 
+}
+
+
+/*
+    External Public Touch API Functions
+*/
+
+#if SOC_TOUCH_VERSION_1        // Only for ESP32 SoC
+void touchInterruptSetThresholdDirection(bool mustbeLower) {
+    if (mustbeLower) {
+        touch_pad_set_trigger_mode(TOUCH_TRIGGER_BELOW);
+    } else {
+        touch_pad_set_trigger_mode(TOUCH_TRIGGER_ABOVE);
+    }
 }
+#elif SOC_TOUCH_VERSION_2     // Only for ESP32S2 and ESP32S3
+// returns true if touch pad has been and continues pressed and false otherwise 
+bool touchInterruptGetLastStatus(uint8_t pin) {
+    int8_t pad = digitalPinToTouchChannel(pin);
+    if(pad < 0){
+        return false;
+    }
 
-extern uint16_t touchRead(uint8_t pin) __attribute__ ((weak, alias("__touchRead")));
-extern void touchAttachInterrupt(uint8_t pin, void (*userFunc)(void), uint16_t threshold) __attribute__ ((weak, alias("__touchAttachInterrupt")));
-extern void touchSetCycles(uint16_t measure, uint16_t sleep) __attribute__ ((weak, alias("__touchSetCycles")));
+    return __touchInterruptHandlers[pad].lastStatusIsPressed;
+}
 #endif
+
+extern touch_value_t touchRead(uint8_t) __attribute__ ((weak, alias("__touchRead")));
+extern void touchAttachInterrupt(uint8_t, voidFuncPtr, touch_value_t) __attribute__ ((weak, alias("__touchAttachInterrupt")));
+extern void touchAttachInterruptArg(uint8_t, voidArgFuncPtr, void *, touch_value_t) __attribute__ ((weak, alias("__touchAttachArgsInterrupt")));
+extern void touchDetachInterrupt(uint8_t) __attribute__ ((weak, alias("__touchDettachInterrupt")));
+extern void touchSetCycles(uint16_t, uint16_t) __attribute__ ((weak, alias("__touchSetCycles")));
+
+#endif      // #if SOC_TOUCH_SENSOR_NUM > 0
diff --git a/cores/esp32/esp32-hal-touch.h b/cores/esp32/esp32-hal-touch.h
index 6f3b0fd0f7d..a8cda191c31 100644
--- a/cores/esp32/esp32-hal-touch.h
+++ b/cores/esp32/esp32-hal-touch.h
@@ -24,8 +24,21 @@
 extern "C" {
 #endif
 
+#include "soc/soc_caps.h"
 #include "esp32-hal.h"
 
+#if SOC_TOUCH_SENSOR_NUM > 0
+
+#if !defined(SOC_TOUCH_VERSION_1) && !defined(SOC_TOUCH_VERSION_2)
+#error Touch IDF driver Not supported!
+#endif
+
+#if SOC_TOUCH_VERSION_1 // ESP32
+typedef uint16_t touch_value_t;
+#elif SOC_TOUCH_VERSION_2 // ESP32S2 ESP32S3
+typedef uint32_t touch_value_t;
+#endif
+
 /*
  * Set cycles that measurement operation takes
  * The result from touchRead, threshold and detection
@@ -40,17 +53,44 @@ void touchSetCycles(uint16_t measure, uint16_t sleep);
  * You can use this method to chose a good threshold value
  * to use as value for touchAttachInterrupt
  * */
-uint16_t touchRead(uint8_t pin);
+touch_value_t touchRead(uint8_t pin);
 
 /*
- * Set function to be called if touch pad value falls
- * below the given threshold. Use touchRead to determine
- * a proper threshold between touched and untouched state
+ * Set function to be called if touch pad value falls (ESP32)
+ * below the given threshold / rises (ESP32-S2/S3) by given increment (threshold). 
+ * Use touchRead to determine a proper threshold between touched and untouched state
  * */
-void touchAttachInterrupt(uint8_t pin, void (*userFunc)(void), uint16_t threshold);
+void touchAttachInterrupt(uint8_t pin, void (*userFunc)(void), touch_value_t threshold);
+void touchAttachInterruptArg(uint8_t pin, void (*userFunc)(void*), void *arg, touch_value_t threshold);
+void touchDetachInterrupt(uint8_t pin);
+
+/*
+ * Specific functions to ESP32 
+ * Tells the driver if it shall activate the ISR if the sensor is Lower or Higher than the Threshold
+ * Default if Lower.
+ **/
+
+#if SOC_TOUCH_VERSION_1     // Only for ESP32 SoC
+void touchInterruptSetThresholdDirection(bool mustbeLower);
+#endif
+
+
+/*
+ * Specific functions to ESP32-S2 and ESP32-S3
+ * Returns true when the latest ISR status for the Touchpad is that it is touched (Active)
+ * and false when the Touchpad is untoouched (Inactive)
+ * This function can be used in conjunction with ISR User callback in order to take action 
+ * as soon as the touchpad is touched and/or released
+ **/
+
+#if SOC_TOUCH_VERSION_2     // Only for ESP32S2 and ESP32S3
+// returns true if touch pad has been and continues pressed and false otherwise 
+bool touchInterruptGetLastStatus(uint8_t pin);
+#endif
+
+#endif // SOC_TOUCH_SENSOR_NUM > 0
 
 #ifdef __cplusplus
 }
 #endif
-
 #endif /* MAIN_ESP32_HAL_TOUCH_H_ */
diff --git a/cores/esp32/esp32-hal-uart.c b/cores/esp32/esp32-hal-uart.c
index c34c54b1a25..80030b8fabc 100644
--- a/cores/esp32/esp32-hal-uart.c
+++ b/cores/esp32/esp32-hal-uart.c
@@ -34,7 +34,7 @@ struct uart_struct_t {
     uint8_t num;
     bool has_peek;
     uint8_t peek_byte;
-
+    QueueHandle_t uart_event_queue;   // export it by some uartGetEventQueue() function
 };
 
 #if CONFIG_DISABLE_HAL_LOCKS
@@ -43,12 +43,12 @@ struct uart_struct_t {
 #define UART_MUTEX_UNLOCK()
 
 static uart_t _uart_bus_array[] = {
-    {0, false, 0},
+    {0, false, 0, NULL},
 #if SOC_UART_NUM > 1
-    {1, false, 0},
+    {1, false, 0, NULL},
 #endif
 #if SOC_UART_NUM > 2
-    {2, false, 0},
+    {2, false, 0, NULL},
 #endif
 };
 
@@ -58,12 +58,12 @@ static uart_t _uart_bus_array[] = {
 #define UART_MUTEX_UNLOCK()  xSemaphoreGive(uart->lock)
 
 static uart_t _uart_bus_array[] = {
-    {NULL, 0, false, 0},
+    {NULL, 0, false, 0, NULL},
 #if SOC_UART_NUM > 1
-    {NULL, 1, false, 0},
+    {NULL, 1, false, 0, NULL},
 #endif
 #if SOC_UART_NUM > 2
-    {NULL, 2, false, 0},
+    {NULL, 2, false, 0, NULL},
 #endif
 };
 
@@ -82,10 +82,22 @@ uint32_t _get_effective_baudrate(uint32_t baudrate)
     }
 }
 
+// Routines that take care of UART events will be in the HardwareSerial Class code
+void uartGetEventQueue(uart_t* uart, QueueHandle_t *q)
+{
+    // passing back NULL for the Queue pointer when UART is not initialized yet
+    *q = NULL;
+    if(uart == NULL) {
+        return;
+    }
+    *q = uart->uart_event_queue;
+    return;
+}
+
 bool uartIsDriverInstalled(uart_t* uart) 
 {
     if(uart == NULL) {
-        return 0;
+        return false;
     }
 
     if (uart_is_driver_installed(uart->num)) {
@@ -94,28 +106,36 @@ bool uartIsDriverInstalled(uart_t* uart)
     return false;
 }
 
-void uartSetPins(uart_t* uart, uint8_t rxPin, uint8_t txPin)
+// Valid pin UART_PIN_NO_CHANGE is defined to (-1)
+// Negative Pin Number will keep it unmodified, thus this function can set individual pins
+void uartSetPins(uart_t* uart, int8_t rxPin, int8_t txPin, int8_t ctsPin, int8_t rtsPin)
 {
-    if(uart == NULL || rxPin >= SOC_GPIO_PIN_COUNT || txPin >= SOC_GPIO_PIN_COUNT) {
+    if(uart == NULL) {
         return;
     }
     UART_MUTEX_LOCK();
-    ESP_ERROR_CHECK(uart_set_pin(uart->num, txPin, rxPin, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE)); 
-    UART_MUTEX_UNLOCK();
-    
+    // IDF uart_set_pin() will issue necessary Error Message and take care of all GPIO Number validation.
+    uart_set_pin(uart->num, txPin, rxPin, ctsPin, rtsPin); 
+    UART_MUTEX_UNLOCK();  
 }
 
+// 
+void uartSetHwFlowCtrlMode(uart_t *uart, uint8_t mode, uint8_t threshold) {
+    if(uart == NULL) {
+        return;
+    }
+    // IDF will issue corresponding error message when mode or threshold are wrong and prevent crashing
+    // IDF will check (mode > HW_FLOWCTRL_CTS_RTS || threshold >= SOC_UART_FIFO_LEN)
+    uart_set_hw_flow_ctrl(uart->num, (uart_hw_flowcontrol_t) mode, threshold);
+}
 
-uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rxPin, int8_t txPin, uint16_t queueLen, bool inverted, uint8_t rxfifo_full_thrhd)
+
+uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rxPin, int8_t txPin, uint16_t rx_buffer_size, uint16_t tx_buffer_size, bool inverted, uint8_t rxfifo_full_thrhd)
 {
     if(uart_nr >= SOC_UART_NUM) {
         return NULL;
     }
 
-    if(rxPin == -1 && txPin == -1) {
-        return NULL;
-    }
-
     uart_t* uart = &_uart_bus_array[uart_nr];
 
     if (uart_is_driver_installed(uart_nr)) {
@@ -143,7 +163,7 @@ uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rx
     uart_config.source_clk = UART_SCLK_APB;
 
 
-    ESP_ERROR_CHECK(uart_driver_install(uart_nr, 2*queueLen, 0, 0, NULL, 0));
+    ESP_ERROR_CHECK(uart_driver_install(uart_nr, rx_buffer_size, tx_buffer_size, 20, &(uart->uart_event_queue), 0));
     ESP_ERROR_CHECK(uart_param_config(uart_nr, &uart_config));
     ESP_ERROR_CHECK(uart_set_pin(uart_nr, txPin, rxPin, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
 
@@ -153,9 +173,6 @@ uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rx
         ESP_ERROR_CHECK(uart_set_line_inverse(uart_nr, UART_SIGNAL_TXD_INV | UART_SIGNAL_RXD_INV));    
     }
 
-    // Set RS485 half duplex mode on UART.  This shall force flush to wait up to sending all bits out
-    ESP_ERROR_CHECK(uart_set_mode(uart_nr, UART_MODE_RS485_HALF_DUPLEX));
-
     UART_MUTEX_UNLOCK();
 
     uartFlush(uart);
@@ -306,7 +323,7 @@ void uartFlushTxOnly(uart_t* uart, bool txOnly)
     }
     
     UART_MUTEX_LOCK();
-    ESP_ERROR_CHECK(uart_wait_tx_done(uart->num, portMAX_DELAY));
+    while(!uart_ll_is_tx_idle(UART_LL_GET_HW(uart->num)));
 
     if ( !txOnly ) {
         ESP_ERROR_CHECK(uart_flush_input(uart->num));
@@ -404,11 +421,12 @@ int log_printf(const char *format, ...)
     va_list copy;
     va_start(arg, format);
     va_copy(copy, arg);
-    len = vsnprintf(NULL, 0, format, arg);
+    len = vsnprintf(NULL, 0, format, copy);
     va_end(copy);
     if(len >= sizeof(loc_buf)){
         temp = (char*)malloc(len+1);
         if(temp == NULL) {
+            va_end(arg);
             return 0;
         }
     }
@@ -470,6 +488,7 @@ void log_print_buf(const uint8_t *b, size_t len){
  */
 unsigned long uartBaudrateDetect(uart_t *uart, bool flg)
 {
+#ifndef CONFIG_IDF_TARGET_ESP32S3
     if(uart == NULL) {
         return 0;
     }
@@ -487,6 +506,9 @@ unsigned long uartBaudrateDetect(uart_t *uart, bool flg)
     UART_MUTEX_UNLOCK();
 
     return ret;
+#else
+    return 0;
+#endif
 }
 
 
@@ -531,7 +553,7 @@ void uartStartDetectBaudrate(uart_t *uart) {
     //hw->rx_filt.glitch_filt_en = 1;
     //hw->conf0.autobaud_en = 0;
     //hw->conf0.autobaud_en = 1;
-
+#elif CONFIG_IDF_TARGET_ESP32S3
 #else
     hw->auto_baud.glitch_filt = 0x08;
     hw->auto_baud.en = 0;
@@ -568,6 +590,7 @@ uartDetectBaudrate(uart_t *uart)
 
 #ifdef CONFIG_IDF_TARGET_ESP32C3
     //hw->conf0.autobaud_en = 0;
+#elif CONFIG_IDF_TARGET_ESP32S3
 #else
     hw->auto_baud.en = 0;
 #endif
diff --git a/cores/esp32/esp32-hal-uart.h b/cores/esp32/esp32-hal-uart.h
index 609f380f59e..ec7912c3d7a 100644
--- a/cores/esp32/esp32-hal-uart.h
+++ b/cores/esp32/esp32-hal-uart.h
@@ -22,6 +22,8 @@ extern "C" {
 #include <stdint.h>
 #include <stdbool.h>
 #include <stdlib.h>
+#include "freertos/FreeRTOS.h"
+#include "freertos/queue.h"
 
 #define SERIAL_5N1 0x8000010
 #define SERIAL_6N1 0x8000014
@@ -48,12 +50,23 @@ extern "C" {
 #define SERIAL_7O2 0x800003b
 #define SERIAL_8O2 0x800003f
 
+// These are Hardware Flow Contol possible usage
+// equivalent to UDF enum uart_hw_flowcontrol_t from 
+// https://github.com/espressif/esp-idf/blob/master/components/hal/include/hal/uart_types.h#L75-L81
+#define HW_FLOWCTRL_DISABLE   0x0       // disable HW Flow Control
+#define HW_FLOWCTRL_RTS       0x1       // use only RTS PIN for HW Flow Control
+#define HW_FLOWCTRL_CTS       0x2       // use only CTS PIN for HW Flow Control
+#define HW_FLOWCTRL_CTS_RTS   0x3       // use both CTS and RTS PIN for HW Flow Control
+
 struct uart_struct_t;
 typedef struct uart_struct_t uart_t;
 
-uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rxPin, int8_t txPin, uint16_t queueLen, bool inverted, uint8_t rxfifo_full_thrhd);
+uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rxPin, int8_t txPin, uint16_t rx_buffer_size, uint16_t tx_buffer_size, bool inverted, uint8_t rxfifo_full_thrhd);
 void uartEnd(uart_t* uart);
 
+// This is used to retrieve the Event Queue pointer from a UART IDF Driver in order to allow user to deal with its events
+void uartGetEventQueue(uart_t* uart, QueueHandle_t *q); 
+
 uint32_t uartAvailable(uart_t* uart);
 uint32_t uartAvailableForWrite(uart_t* uart);
 uint8_t uartRead(uart_t* uart);
@@ -74,7 +87,12 @@ void uartSetDebug(uart_t* uart);
 int uartGetDebug();
 
 bool uartIsDriverInstalled(uart_t* uart);
-void uartSetPins(uart_t* uart, uint8_t rxPin, uint8_t txPin);
+
+// Negative Pin Number will keep it unmodified, thus this function can set individual pins
+void uartSetPins(uart_t* uart, int8_t rxPin, int8_t txPin, int8_t ctsPin, int8_t rtsPin);
+
+// Enables or disables HW Flow Control function -- needs also to set CTS and/or RTS pins
+void uartSetHwFlowCtrlMode(uart_t *uart, uint8_t mode, uint8_t threshold);
 
 void uartStartDetectBaudrate(uart_t *uart);
 unsigned long uartDetectBaudrate(uart_t *uart);
diff --git a/cores/esp32/esp32-hal.h b/cores/esp32/esp32-hal.h
index 115a050b172..55e9f95769b 100644
--- a/cores/esp32/esp32-hal.h
+++ b/cores/esp32/esp32-hal.h
@@ -95,6 +95,9 @@ void analogWrite(uint8_t pin, int value);
 //returns chip temperature in Celsius
 float temperatureRead();
 
+//allows user to bypass SPI RAM test routine
+bool testSPIRAM(void);
+
 #if CONFIG_AUTOSTART_ARDUINO
 //enable/disable WDT for Arduino's setup and loop functions
 void enableLoopWDT();
diff --git a/cores/esp32/esp_arduino_version.h b/cores/esp32/esp_arduino_version.h
index 03fbeea2396..9b053df2640 100644
--- a/cores/esp32/esp_arduino_version.h
+++ b/cores/esp32/esp_arduino_version.h
@@ -23,7 +23,7 @@ extern "C" {
 /** Minor version number (x.X.x) */
 #define ESP_ARDUINO_VERSION_MINOR   0
 /** Patch version number (x.x.X) */
-#define ESP_ARDUINO_VERSION_PATCH   0
+#define ESP_ARDUINO_VERSION_PATCH   3
 
 /**
  * Macro to convert ARDUINO version number into an integer
diff --git a/cores/esp32/main.cpp b/cores/esp32/main.cpp
index f4e79844818..27b92948d5d 100644
--- a/cores/esp32/main.cpp
+++ b/cores/esp32/main.cpp
@@ -2,7 +2,7 @@
 #include "freertos/task.h"
 #include "esp_task_wdt.h"
 #include "Arduino.h"
-#if (ARDUINO_USB_CDC_ON_BOOT|ARDUINO_USB_MSC_ON_BOOT|ARDUINO_USB_DFU_ON_BOOT)
+#if (ARDUINO_USB_CDC_ON_BOOT|ARDUINO_USB_MSC_ON_BOOT|ARDUINO_USB_DFU_ON_BOOT) && !ARDUINO_USB_MODE
 #include "USB.h"
 #if ARDUINO_USB_MSC_ON_BOOT
 #include "FirmwareMSC.h"
@@ -54,16 +54,16 @@ void loopTask(void *pvParameters)
 
 extern "C" void app_main()
 {
-#if ARDUINO_USB_CDC_ON_BOOT
+#if ARDUINO_USB_CDC_ON_BOOT && !ARDUINO_USB_MODE
     Serial.begin();
 #endif
-#if ARDUINO_USB_MSC_ON_BOOT
+#if ARDUINO_USB_MSC_ON_BOOT && !ARDUINO_USB_MODE
     MSC_Update.begin();
 #endif
-#if ARDUINO_USB_DFU_ON_BOOT
+#if ARDUINO_USB_DFU_ON_BOOT && !ARDUINO_USB_MODE
     USB.enableDFU();
 #endif
-#if ARDUINO_USB_ON_BOOT
+#if ARDUINO_USB_ON_BOOT && !ARDUINO_USB_MODE
     USB.begin();
 #endif
     loopTaskWDTEnabled = false;
diff --git a/cores/esp32/stdlib_noniso.c b/cores/esp32/stdlib_noniso.c
index 8f24520dac3..e66edace7e3 100644
--- a/cores/esp32/stdlib_noniso.c
+++ b/cores/esp32/stdlib_noniso.c
@@ -88,7 +88,7 @@ char* ultoa(unsigned long value, char* result, int base) {
     return result;
 }
 
-char * dtostrf(double number, signed char width, unsigned char prec, char *s) {
+char * dtostrf(double number, signed int width, unsigned int prec, char *s) {
     bool negative = false;
 
     if (isnan(number)) {
@@ -117,7 +117,7 @@ char * dtostrf(double number, signed char width, unsigned char prec, char *s) {
     // Round correctly so that print(1.999, 2) prints as "2.00"
     // I optimized out most of the divisions
     double rounding = 2.0;
-    for (uint8_t i = 0; i < prec; ++i)
+    for (uint32_t i = 0; i < prec; ++i)
         rounding *= 10.0;
     rounding = 1.0 / rounding;
 
diff --git a/cores/esp32/stdlib_noniso.h b/cores/esp32/stdlib_noniso.h
index 3df2cc2a1b6..e5bb44e563a 100644
--- a/cores/esp32/stdlib_noniso.h
+++ b/cores/esp32/stdlib_noniso.h
@@ -39,7 +39,7 @@ char* utoa (unsigned int val, char *s, int radix);
 
 char* ultoa (unsigned long val, char *s, int radix);
 
-char* dtostrf (double val, signed char width, unsigned char prec, char *s);
+char* dtostrf (double val, signed int width, unsigned int prec, char *s);
 
 #ifdef __cplusplus
 } // extern "C"
diff --git a/docs/ISSUE_TEMPLATE.md b/docs/ISSUE_TEMPLATE.md
deleted file mode 100644
index 5cf96ef213b..00000000000
--- a/docs/ISSUE_TEMPLATE.md
+++ /dev/null
@@ -1,47 +0,0 @@
-Make your question, not a Statement, inclusive. Include all pertinent information:
-
-What you are trying to do  
-Describe your system (Hardware, computer, O/S, core version, environment)  
-Describe what is failing  
-Show the shortest possible code that will duplicate the error  
-Show the EXACT error message (it doesn't work is not enough)  
-Then if someone is interested and knowledgeable you might get a answer.  All of this work on your part shows us that you have worked to solve YOUR problem. The more complete your issue posting is, the more likely someone will volunteer their time to help you.
-
-If you have a Guru Meditation Error or Backtrace, ***please decode it***:
-[ExceptionDecoder](https://github.com/me-no-dev/EspExceptionDecoder)
-
------------------------------ Remove above -----------------------------
-
-
-### Hardware:
-|||||||
-|:---|---|---|---|---|---|
-|<B>Board</B>|ESP32 Dev Module|node32|ttgo_lora|ESP32-S2-Saola|Custom w/ ESP32-S2-WROVER 16MB|
-|<B>Version/Date</B>|1.0.4|2.0.0|0badbeef|11/jul/2017|today's master|
-|<B>IDE name</B>|Arduino IDE|Atom + Platform.io|IDF component|VSCode|
-|<B>Flash Frequency</B>|40Mhz|80Mhz|
-|<B>PSRAM enabled</B>|yes|no|
-|<B>Upload Speed</B>|115200|
-|<B>Computer OS</B>|Windows 10|Mac OSX|Ubuntu|
-
-### Description:
-Describe your problem here
-
-
-### Sketch:  (leave the backquotes for [code formatting](https://help.github.com/articles/creating-and-highlighting-code-blocks/))
-```cpp
-
-//Change the code below by your sketch
-#include <Arduino.h>
-
-void setup() {
-}
-
-void loop() {
-}
-```
-
-### Debug Messages:
-```
-Enable Core debug level: Debug on tools menu of Arduino IDE, then put the serial output here 
-```
diff --git a/docs/requirements.txt b/docs/requirements.txt
index 0e4fb8ab59c..9e40946ec2b 100644
--- a/docs/requirements.txt
+++ b/docs/requirements.txt
@@ -3,3 +3,4 @@
 #
 # matplotlib is currently required only by the script generate_chart.py
 sphinx-copybutton==0.3.0
+sphinx-tabs==3.2.0
\ No newline at end of file
diff --git a/docs/source/_static/logo_arduino.png b/docs/source/_static/logo_arduino.png
new file mode 100644
index 00000000000..a3a7cd942e9
Binary files /dev/null and b/docs/source/_static/logo_arduino.png differ
diff --git a/docs/source/_static/logo_pio.png b/docs/source/_static/logo_pio.png
new file mode 100644
index 00000000000..a64c1563964
Binary files /dev/null and b/docs/source/_static/logo_pio.png differ
diff --git a/docs/source/_static/usb_msc_drive.png b/docs/source/_static/usb_msc_drive.png
new file mode 100644
index 00000000000..de0796c3980
Binary files /dev/null and b/docs/source/_static/usb_msc_drive.png differ
diff --git a/docs/source/api/adc.rst b/docs/source/api/adc.rst
new file mode 100644
index 00000000000..1947fdcf990
--- /dev/null
+++ b/docs/source/api/adc.rst
@@ -0,0 +1,208 @@
+###
+ADC
+###
+
+About
+-----
+
+ADC (analog to digital converter) is a very common peripheral used to convert an analog signal such as voltage 
+to a digital form so that it can be read and processed by a microcontroller. 
+
+ADCs are very useful in control and monitoring applications since most sensors 
+(e.g., temperature, pressure, force) produce analogue output voltages.
+
+.. note:: Each SoC or module has a different number of ADC's with a different number of channels and pins availible. Refer to datasheet of each board for more info.
+
+Arduino-ESP32 ADC API
+---------------------
+
+ADC common API
+**************
+
+analogRead
+^^^^^^^^^^
+
+This function is used to get the ADC raw value for a given pin/ADC channel.
+
+.. code-block:: arduino
+
+    uint16_t analogRead(uint8_t pin);
+
+* ``pin`` GPIO pin to read analog value
+  
+This function will return analog raw value.
+
+analogReadMillivolts
+^^^^^^^^^^^^^^^^^^^^
+
+This function is used to get ADC value for a given pin/ADC channel in millivolts.
+
+.. code-block:: arduino
+
+    uint32_t analogReadMilliVolts(uint8_t pin);
+
+* ``pin`` GPIO pin to read analog value
+
+This function will return analog value in millivolts.
+
+analogReadResolution
+^^^^^^^^^^^^^^^^^^^^
+
+This function is used to set the resolution of ``analogRead`` return value. Default is 12 bits (range from 0 to 4096) 
+for all chips except ESP32S3 where default is 13 bits (range from 0 to 8192). 
+When different resolution is set, the values read will be shifted to match the given resolution.
+
+Range is 1 - 16 .The default value will be used, if this function is not used.
+
+.. note:: For the ESP32, the resolution is between 9 to12 and it will change the ADC hardware resolution. Else value will be shifted.
+
+.. code-block:: arduino
+
+    void analogReadResolution(uint8_t bits);
+
+* ``bits`` sets analog read resolution
+
+analogSetClockDiv
+^^^^^^^^^^^^^^^^^
+
+This function is used to set the divider for the ADC clock.
+
+Range is 1 - 255. Default value is 1.
+
+.. code-block:: arduino
+
+    void analogSetClockDiv(uint8_t clockDiv);
+
+* ``clockDiv`` sets the divider for ADC clock.
+
+analogSetAttenuation
+^^^^^^^^^^^^^^^^^^^^
+
+This function is used to set the attenuation for all channels.
+
+Input voltages can be attenuated before being input to the ADCs.
+There are 4 available attenuation options, the higher the attenuation is, the higher the measurable input voltage could be.
+
+The measurable input voltage differs for each chip, see table below for detailed information.
+
+.. tabs::
+
+   .. tab:: ESP32
+
+      =====================  ===========================================
+      Attenuation            Measurable input voltage range
+      =====================  ===========================================
+      ``ADC_ATTEN_DB_0``     100 mV ~ 950 mV
+      ``ADC_ATTEN_DB_2_5``   100 mV ~ 1250 mV
+      ``ADC_ATTEN_DB_6``     150 mV ~ 1750 mV
+      ``ADC_ATTEN_DB_11``    150 mV ~ 2450 mV
+      =====================  ===========================================
+
+   .. tab:: ESP32-S2
+
+      =====================  ===========================================
+      Attenuation            Measurable input voltage range
+      =====================  ===========================================
+      ``ADC_ATTEN_DB_0``     0 mV ~ 750 mV
+      ``ADC_ATTEN_DB_2_5``   0 mV ~ 1050 mV
+      ``ADC_ATTEN_DB_6``     0 mV ~ 1300 mV
+      ``ADC_ATTEN_DB_11``    0 mV ~ 2500 mV
+      =====================  ===========================================
+
+   .. tab:: ESP32-C3
+
+      =====================  ===========================================
+      Attenuation            Measurable input voltage range
+      =====================  ===========================================
+      ``ADC_ATTEN_DB_0``     0 mV ~ 750 mV
+      ``ADC_ATTEN_DB_2_5``   0 mV ~ 1050 mV
+      ``ADC_ATTEN_DB_6``     0 mV ~ 1300 mV
+      ``ADC_ATTEN_DB_11``    0 mV ~ 2500 mV
+      =====================  ===========================================
+
+   .. tab:: ESP32-S3
+
+      =====================  ===========================================
+      Attenuation            Measurable input voltage range
+      =====================  ===========================================
+      ``ADC_ATTEN_DB_0``     0 mV ~ 950 mV
+      ``ADC_ATTEN_DB_2_5``   0 mV ~ 1250 mV
+      ``ADC_ATTEN_DB_6``     0 mV ~ 1750 mV
+      ``ADC_ATTEN_DB_11``    0 mV ~ 3100 mV
+      =====================  ===========================================
+
+.. code-block:: arduino
+
+    void analogSetAttenuation(adc_attenuation_t attenuation);
+
+* ``attenuation`` sets the attenuation.
+
+analogSetPinAttenuation
+^^^^^^^^^^^^^^^^^^^^^^^
+
+This function is used to set the attenuation for a specific pin/ADC channel. For more information refer to `analogSetAttenuation`_.
+
+.. code-block:: arduino
+
+    void analogSetPinAttenuation(uint8_t pin, adc_attenuation_t attenuation);
+
+* ``pin`` selects specific pin for attenuation settings.
+* ``attenuation`` sets the attenuation.
+      
+adcAttachPin
+^^^^^^^^^^^^
+
+This function is used to attach the pin to ADC (it will also clear any other analog mode that could be on)
+
+.. code-block:: arduino
+
+    bool adcAttachPin(uint8_t pin);
+
+This function will return ``true`` if configuration is successful. Else returns ``false``.
+
+ADC API specific for ESP32 chip
+*******************************
+
+analogSetWidth
+^^^^^^^^^^^^^^
+
+This function is used to set the hardware sample bits and read resolution.
+Default is 12bit (0 - 4095).
+Range is 9 - 12.
+
+.. code-block:: arduino
+
+    void analogSetWidth(uint8_t bits);
+ 
+analogSetVRefPin
+^^^^^^^^^^^^^^^^
+
+This function is used to set pin to use for ADC calibration if the esp is not already calibrated (pins 25, 26 or 27).
+
+.. code-block:: arduino
+
+    void analogSetVRefPin(uint8_t pin);
+
+* ``pin`` GPIO pin to set VRefPin for ADC calibration
+  
+hallRead
+^^^^^^^^
+
+This function is used to get the ADC value of the HALL sensor conneted to pins 36(SVP) and 39(SVN).
+
+.. code-block:: arduino
+
+    int hallRead();
+    
+This function will return the hall sensor value.
+
+
+Example Applications
+********************
+
+Here is an example of how to use the ADC.
+
+.. literalinclude:: ../../../libraries/ESP32/examples/AnalogRead/AnalogRead.ino
+    :language: arduino
+
+Or you can run Arduino example 01.Basics -> AnalogReadSerial.
\ No newline at end of file
diff --git a/docs/source/api/dac.rst b/docs/source/api/dac.rst
new file mode 100644
index 00000000000..9fd91feeefd
--- /dev/null
+++ b/docs/source/api/dac.rst
@@ -0,0 +1,47 @@
+###
+DAC
+###
+
+About
+-----
+
+DAC (digital to analog converter) is a very common peripheral used to convert a digital signal to an
+analog form. 
+
+ESP32 and ESP32-S2 have two 8-bit DAC channels. The DAC driver allows these channels to be set to arbitrary voltages.
+
+DACs can be used for generating a specific (and dynamic) reference voltage for external sensors,
+controlling transistors, etc.
+
+========= ========= =========
+ESP32 SoC DAC_1 pin DAC_2 pin
+========= ========= =========
+ESP32     GPIO 25   GPIO 26
+ESP32-S2  GPIO 17   GPIO 18
+========= ========= =========
+
+Arduino-ESP32 DAC API
+---------------------
+
+dacWrite
+********
+
+This function is used to set the DAC value for a given pin/DAC channel.
+
+.. code-block:: arduino
+
+    void dacWrite(uint8_t pin, uint8_t value);
+
+* ``pin`` GPIO pin.
+* ``value`` to be set. Range is 0 - 255 (equals 0V - 3.3V).
+
+dacDisable
+**********
+
+This function is used to disable DAC output on a given pin/DAC channel.
+
+.. code-block:: arduino
+
+    void dacDisable(uint8_t pin);
+
+* ``pin`` GPIO pin.
\ No newline at end of file
diff --git a/docs/source/api/i2c.rst b/docs/source/api/i2c.rst
index 4c690488e28..f53d8f27a3c 100644
--- a/docs/source/api/i2c.rst
+++ b/docs/source/api/i2c.rst
@@ -381,4 +381,4 @@ Here is an example of how to use the I2C in Slave Mode.
 .. literalinclude:: ../../../libraries/Wire/examples/WireSlave/WireSlave.ino
     :language: arduino
 
-.. _Arduino Wire Library: https://www.arduino.cc/en/reference/wire
\ No newline at end of file
+.. _Arduino Wire Library: https://www.arduino.cc/en/reference/wire
diff --git a/docs/source/api/i2s.rst b/docs/source/api/i2s.rst
new file mode 100644
index 00000000000..02539fb3f2b
--- /dev/null
+++ b/docs/source/api/i2s.rst
@@ -0,0 +1,566 @@
+###
+I2S
+###
+
+About
+-----
+
+I2S - Inter-IC Sound, correctly written I²S pronounced "eye-squared-ess", alternative notation is IIS. I²S is an electrical serial bus interface standard used for connecting digital audio devices together.
+
+It is used to communicate PCM (Pulse-Code Modulation) audio data between integrated circuits in an electronic device. The I²S bus separates clock and serial data signals, resulting in simpler receivers than those required for asynchronous communications systems that need to recover the clock from the data stream.
+
+Despite the similar name, I²S is unrelated and incompatible with the bidirectional I²C (IIC) bus.
+
+The I²S bus consists of at least three lines:
+
+.. note:: All lines can be attached to almost any pin and this change can occur even during operation.
+
+* **Bit clock line**
+  
+  * Officially "continuous serial clock (SCK)". Typically written "bit clock (BCLK)".
+  *  In this library function parameter ``sckPin`` or constant ``PIN_I2S_SCK``.
+
+* **Word clock line**
+  
+  * Officially "word select (WS)". Typically called "left-right clock (LRCLK)" or "frame sync (FS)".
+  * 0 = Left channel, 1 = Right channel
+  * In this library function parameter ``fsPin`` or constant ``PIN_I2S_FS``.
+
+* **Data line**
+
+  * Officially "serial data (SD)", but can be called SDATA, SDIN, SDOUT, DACDAT, ADCDAT, etc.
+  * Unlike Arduino I2S with single data pin switching between input and output, in ESP core driver use separate data line for input and output.
+  * For backward compatibility, the shared data pin is ``sdPin`` or constant ``PIN_I2S_SD`` when using simplex mode.
+  
+  * When using in duplex mode, there are two data lines:
+    
+    * Output data line is called ``outSdPin`` for function parameter, or constant ``PIN_I2S_SD_OUT``
+    * Input data line is called ``inSdPin`` for function parameter, or constant ``PIN_I2S_SD_IN``
+
+I2S Modes
+---------
+
+The I2S can be set up in three groups of modes:
+
+* Master (default) or Slave.
+* Simplex (default) or Duplex.
+* Operation modes (Philips standard, ADC/DAC, PDM)
+  
+  * Most of them are dual-channel, some can be single channel
+
+.. note:: Officially supported operation mode is only ``I2S_PHILIPS_MODE``. Other modes are implemented, but we cannot guarantee flawless execution and behavior.
+
+Master / Slave Mode
+*******************
+
+In **Master mode** (default) the device is generating clock signal ``sckPin`` and word select signal on ``fsPin``.
+
+In **Slave mode** the device listens on attached pins for the clock signal and word select - i.e. unless externally driven the pins will remain LOW.
+
+How to enter either mode is described in the function section.
+
+Operation Modes
+***************
+
+Setting the operation mode is done with function ``begin`` (see API section)
+
+* ``I2S_PHILIPS_MODE``
+    * Currently the only official* ``PIN_I2S_SCK``
+* ``PIN_I2S_FS``
+* ``PIN_I2S_SD``
+* ``PIN_I2S_SD_OUT`` only need to send one channel data but the data will be copied for another channel automatically, then both channels will transmit same data.
+
+* ``ADC_DAC_MODE``
+    The output will be an analog signal on pins ``25`` (L or R?) and ``26`` (L or R?).
+    Input will be received on pin ``_inSdPin``.
+    The data are sampled in 12 bits and stored in a 16 bits, with the 4 most significant bits set to zero.
+
+* ``PDM_STEREO_MODE``
+    Pulse-density-modulation is similar to PWM, but instead, the pulses have constant width. The signal is modulated with the number of ones or zeroes in sequence.
+
+* ``PDM_MONO_MODE``
+    Single-channel version of PDM mode described above.
+
+Simplex / Duplex Mode
+*********************
+
+The **Simplex** mode is the default after driver initialization. Simplex mode uses the shared data pin ``sdPin`` or constant ``PIN_I2S_SD`` for both output and input, but can only read or write. This is the same behavior as in original Arduino library.
+
+The **Duplex** mode uses two separate data pins:
+
+* Output pin ``outSdPin`` for function parameter, or constant ``PIN_I2S_SD_OUT``
+* Input pin ``inSdPin`` for function parameter, or constant ``PIN_I2S_SD_IN``
+
+In this mode, the driver is able to read and write simultaneously on each line and is suitable for applications like walkie-talkie or phone.
+
+Switching between these modes is performed simply by calling setDuplex() or setSimplex() (see APi section for details and more functions).
+
+Arduino-ESP32 I2S API
+---------------------
+
+The ESP32 I2S library is based on the Arduino I2S Library and implements a few more APIs, described in this `documentation <https://www.arduino.cc/en/Reference/I2S>`_.
+
+Initialization and deinitialization
+***********************************
+
+Before initialization, choose which pins you want to use. In DAC mode you can use only pins `25` and `26` for the output.
+
+begin (Master Mode)
+^^^^^^^^^^^^^^^^^^^
+
+Before usage choose which pins you want to use. In DAC mode you can use only pins 25 and 26 as output.
+
+.. code-block:: arduino
+
+    int begin(int mode, int sampleRate, int bitsPerSample)
+
+Parameters:
+ 
+* [in] ``mode`` one of above mentioned operation mode, for example ``I2S_PHILIPS_MODE``.
+
+* [in] ``sampleRate`` is the sampling rate in Hz. Currently officially supported value is only 16000 - other than this value will print warning, but continue to operate, however the resulting audio quality may suffer and the app may crash.
+
+* [in] ``bitsPerSample``  is the number of bits in a channel sample.
+  
+Currently, the supported value is only 16 - other than this value will print a warning, but continues to operate, however, the resulting audio quality may suffer and the application may crash.
+
+For ``ADC_DAC_MODE`` the only possible value will remain 16.
+
+This function will return ``true`` on success or ``fail`` in case of failure.
+
+When failed, an error message will be printed if subscribed.
+
+begin (Slave Mode)
+^^^^^^^^^^^^^^^^^^
+
+Performs initialization before use - creates buffers, task handling underlying driver messages, configuring and starting the driver operation.
+
+This version initializes I2S in SLAVE mode (see previous entry for MASTER mode).
+
+.. code-block:: arduino
+
+    int begin(int mode, int bitsPerSample)
+
+Parameters:
+
+* [in] ``mode`` one of above mentioned modes for example ``I2S_PHILIPS_MODE``.
+
+* [in] ``bitsPerSample`` is the umber of bits in a channel sample. Currently, the only supported value is only 16 - other than this value will print warning, but continue to operate, however the resulting audio quality may suffer and the app may crash.
+
+For ``ADC_DAC_MODE`` the only possible value will remain 16.
+
+This function will return ``true`` on success or ``fail`` in case of failure.
+
+When failed, an error message will be printed if subscribed.
+
+end
+^^^
+
+Performs safe deinitialization - free buffers, destroy task, end driver operation, etc.
+
+.. code-block:: arduino
+
+  void end()
+
+Pin setup
+*********
+
+Pins can be changed in two ways- 1st constants, 2nd functions.
+
+.. note:: Shared data pin can be equal to any other data pin, but must not be equal to clock pin nor frame sync pin! Input and Output pins must not be equal, but one of them can be equal to shared data pin!
+
+.. code-block:: arduino
+
+    sckPin != fsPin != outSdPin != inSdPin
+
+.. code-block:: arduino
+
+    sckPin != fsPin != sdPin
+
+By default, the pin numbers are defined in constants in the header file. You can redefine any of those constants before including ``I2S.h``. This way the driver will use these new default values and you will not need to specify pins in your code. The constants and their default values are:
+
+* ``PIN_I2S_SCK`` 14
+* ``PIN_I2S_FS`` 25
+* ``PIN_I2S_SD`` 26
+* ``PIN_I2S_SD_OUT`` 26
+* ``PIN_I2S_SD_IN`` 35
+
+The second option to change pins is using the following functions. These functions can be called on either on initialized or uninitialized object.
+
+If called on the initialized object (after calling ``begin``) the pins will change during operation.
+If called on the uninitialized object (before calling ``begin``, or after calling ``end``) the new pin setup will be used on next initialization.
+
+setSckPin
+^^^^^^^^^
+
+Set and apply clock pin.
+
+.. code-block:: arduino
+
+  int setSckPin(int sckPin)
+
+This function will return ``true`` on success or ``fail`` in case of failure.
+
+setFsPin
+^^^^^^^^
+
+Set and apply frame sync pin.
+
+.. code-block:: arduino
+
+  int setFsPin(int fsPin)
+
+This function will return ``true`` on success or ``fail`` in case of failure.
+
+setDataPin
+^^^^^^^^^^
+
+Set and apply shared data pin used in simplex mode.
+
+.. code-block:: arduino
+
+  int setDataPin(int sdPin)
+
+This function will return ``true`` on success or ``fail`` in case of failure.
+
+setDataInPin
+^^^^^^^^^^^^
+
+Set and apply data input pin.
+
+.. code-block:: arduino
+
+  int setDataInPin(int inSdPin)
+
+This function will return ``true`` on success or ``fail`` in case of failure.
+
+setDataOutPin
+^^^^^^^^^^^^^
+
+Set and apply data output pin.
+
+.. code-block:: arduino
+
+  int setDataOutPin(int outSdPin)
+
+This function will return ``true`` on success or ``fail`` in case of failure.
+
+setAllPins
+^^^^^^^^^^
+
+Set all pins using given values in parameters. This is simply a wrapper of four functions mentioned above.
+
+.. code-block:: arduino
+
+  int setAllPins(int sckPin, int fsPin, int sdPin, int outSdPin, int inSdPin)
+
+Set all pins to default i.e. take values from constants mentioned above. This simply calls the the function with the following constants.
+
+* ``PIN_I2S_SCK`` 14
+* ``PIN_I2S_FS`` 25
+* ``PIN_I2S_SD`` 26
+* ``PIN_I2S_SD_OUT`` 26
+* ``PIN_I2S_SD_IN`` 35
+
+.. code-block:: arduino
+
+  int setAllPins()
+
+getSckPin
+^^^^^^^^^
+
+Get the current value of the clock pin.
+
+.. code-block:: arduino
+
+  int getSckPin()
+
+getFsPin
+^^^^^^^^
+
+Get the current value of frame sync pin.
+
+.. code-block:: arduino
+
+  int getFsPin()
+
+getDataPin
+^^^^^^^^^^
+
+Get the current value of shared data pin.
+
+.. code-block:: arduino
+
+  int getDataPin()
+
+getDataInPin
+^^^^^^^^^^^^
+
+Get the current value of data input pin.
+
+.. code-block:: arduino
+
+  int getDataInPin()
+
+getDataOutPin
+^^^^^^^^^^^^^
+
+Get the current value of data output pin.
+
+.. code-block:: arduino
+
+  int getDataOutPin()
+
+onTransmit
+^^^^^^^^^^
+
+Register the function to be called on each successful transmit event.
+
+.. code-block:: arduino
+
+  void onTransmit(void(*)(void))
+
+onReceive
+^^^^^^^^^
+
+Register the function to be called on each successful receives event.
+
+.. code-block:: arduino
+
+  void onReceive(void(*)(void))
+
+setBufferSize
+^^^^^^^^^^^^^
+
+Set the size of buffer.
+
+.. code-block:: arduino
+
+  int setBufferSize(int bufferSize)
+
+This function can be called on both the initialized or uninitialized driver.
+
+If called on initialized, it will change internal values for buffer size and re-initialize driver with new value.
+If called on uninitialized, it will only change the internal values which will be used for next initialization.
+
+Parameter ``bufferSize`` must be in range from 8 to 1024 and the unit is sample words. The default value is 128.
+
+Example: 16 bit sample, dual channel, buffer size for input: 
+
+  ``128 = 2B sample * 2 channels * 128 buffer size * buffer count (default 2) = 1024B``
+  
+And more ```1024B`` for output buffer in total of ``2kB`` used.
+
+This function always assumes dual-channel, keeping the same size even for MONO modes.
+
+This function will return ``true`` on success or ``fail`` in case of failure.
+
+When failed, an error message will be printed.
+
+getBufferSize
+^^^^^^^^^^^^^
+
+Get current buffer sizes in sample words (see description for ``setBufferSize``).
+
+.. code-block:: arduino
+
+  int getBufferSize()
+
+Duplex vs Simplex
+*****************
+
+Original Arduino I2S library supports only *simplex* mode (only transmit or only receive at a time). For compatibility, we kept this behavior, but ESP natively supports *duplex* mode (receive and transmit simultaneously on separate pins).
+By default this library is initialized in simplex mode as it would in Arduino, switching input and output on ``sdPin`` (constant ``PIN_I2S_SD`` default pin 26).
+
+setDuplex
+^^^^^^^^^
+
+Switch to duplex mode and use separate pins:
+
+.. code-block:: arduino
+
+  int setDuplex()
+
+input: inSdPin (constant PIN_I2S_SD_IN, default 35)
+output: outSdPin (constant PIN_I2S_SD, default 26)
+
+setSimplex
+^^^^^^^^^^
+
+(Default mode)
+
+Switch to simplex mode using shared data pin sdPin (constant PIN_I2S_SD, default 26).
+
+.. code-block:: arduino
+
+  int setSimplex()
+
+isDuplex
+^^^^^^^^
+
+Returns 1 if current mode is duplex, 0 if current mode is simplex (default).
+
+.. code-block:: arduino
+
+  int isDuplex()
+
+Data stream
+***********
+
+available
+^^^^^^^^^
+
+Returns number of **bytes** ready to read.
+
+.. code-block:: arduino
+
+  int available()
+
+read
+^^^^
+
+Read ``size`` bytes from internal buffer if possible.
+
+.. code-block:: arduino
+
+  int read(void* buffer, size_t size)
+
+This function is non-blocking, i.e. if the requested number of bytes is not available, it will return as much as possible without waiting.
+
+Hint: use ``available()`` before calling this function.
+
+Parameters:
+
+[out] ``void* buffer`` buffer into which will be copied data read from internal buffer. WARNING: this buffer must be allocated before use!
+
+[in] ``size_t size`` number of bytes required to be read.
+
+Returns number of successfully bytes read. Returns ``false``` in case of reading error.
+
+Read one sample.
+
+.. code-block:: arduino
+
+  int read()
+
+peek
+^^^^
+
+Read one sample from the internal buffer and returns it.
+
+.. code-block:: arduino
+
+  int peek()
+
+Repeated peeks will be returned in the same sample until ``read`` is called.
+
+flush
+^^^^^
+
+Force write internal buffer to driver.
+
+.. code-block:: arduino
+
+  void flush()
+
+write
+^^^^^
+
+Write a single byte.
+
+.. code-block:: arduino
+
+  size_t write(uint8_t)
+
+Single-sample writes are blocking - waiting until there is free space in the internal buffer to be written into.
+
+Returns number of successfully written bytes, in this case, 1. Returns 0 on error.
+
+Write single sample.
+
+.. code-block:: arduino
+
+  size_t write(int32_t)
+
+Single-sample writes are blocking - waiting until there is free space in the internal buffer to be written into.
+
+Returns number of successfully written bytes. Returns 0 on error.
+
+Expected return number is ``bitsPerSample/8``.
+
+Write buffer of supplied size;
+
+.. code-block:: arduino
+
+  size_t write(const void *buffer, size_t size)
+
+Parameters:
+
+[in] ``const void *buffer`` buffer to be written
+[in] ``size_t size`` size of buffer in bytes
+
+Returns number of successfully written bytes. Returns 0 in case of error.
+The expected return number is equal to ``size``.
+
+write
+^^^^^
+
+This is a wrapper of the previous function performing typecast from `uint8_t*`` to ``void*``.
+
+.. code-block:: arduino
+
+  size_t write(const uint8_t *buffer, size_t size)
+
+availableForWrite
+^^^^^^^^^^^^^^^^^
+
+Returns number of bytes available for write.
+
+.. code-block:: arduino
+
+  int availableForWrite()
+
+write_blocking
+^^^^^^^^^^^^^^
+
+Core function implementing blocking write, i.e. waits until all requested data are written.
+
+.. code-block:: arduino
+
+  size_t write_blocking(const void *buffer, size_t size)
+
+WARNING: If too many bytes are requested, this can cause WatchDog Trigger Reset!
+
+Returns number of successfully written bytes. Returns 0 on error.
+
+write_nonblocking
+^^^^^^^^^^^^^^^^^
+
+Core function implementing non-blocking write, i.e. writes as much as possible and exits.
+
+.. code-block:: arduino
+
+  size_t write_nonblocking(const void *buffer, size_t size)
+
+Returns number of successfully written bytes. Returns 0 on error.
+
+Sample code
+-----------
+
+.. code-block:: c
+
+  #include <I2S.h>
+  const int buff_size = 128;
+  int available, read;
+  uint8_t buffer[buff_size];
+
+  I2S.begin(I2S_PHILIPS_MODE, 16000, 16);
+  I2S.read(); // Switch the driver in simplex mode to receive
+  available = I2S.available();
+  if(available < buff_size){
+    read = I2S.read(buffer, available);
+  }else{
+    read = I2S.read(buffer, buff_size);
+  }
+  I2S.write(buffer, read);
+  I2S.end();
diff --git a/docs/source/api/ledc.rst b/docs/source/api/ledc.rst
new file mode 100644
index 00000000000..b6c72821304
--- /dev/null
+++ b/docs/source/api/ledc.rst
@@ -0,0 +1,183 @@
+##################
+LED Control (LEDC)
+##################
+
+About
+-----
+The LED control (LEDC) peripheral is primarly designed to control the intensity of LEDs, 
+although it can also be used to generate PWM signals for other purposes. 
+
+ESP32 SoCs has from 6 to 16 channels (variates on socs, see table below) which can generate independent waveforms, that can be used for example to drive RGB LED devices.
+
+========= =======================
+ESP32 SoC Number of LEDC channels
+========= =======================
+ESP32     16
+ESP32-S2  8
+ESP32-C3  6
+ESP32-S3  8
+========= =======================
+
+Arduino-ESP32 LEDC API
+----------------------
+
+ledcSetup
+*********
+
+This function is used to setup the LEDC channel frequency and resolution.
+
+.. code-block:: arduino
+
+    double ledcSetup(uint8_t channel, double freq, uint8_t resolution_bits);
+
+* ``channel`` select LEDC channel to config.
+* ``freq`` select frequency of pwm.
+* ``resolution_bits`` select resolution for ledc channel. 
+ 
+  * range is 1-14 bits (1-20 bits for ESP32).
+  
+This function will return ``frequency`` configured for LEDC channel.
+If ``0`` is returned, error occurs and ledc channel was not configured.
+
+ledcWrite
+*********
+
+This function is used to set duty for the LEDC channel.
+
+.. code-block:: arduino
+
+    void ledcWrite(uint8_t chan, uint32_t duty);
+
+* ``chan`` select the LEDC channel for writing duty.
+* ``duty`` select duty to be set for selected channel.
+
+ledcRead
+********
+
+This function is used to get configured duty for the LEDC channel.
+
+.. code-block:: arduino
+
+    uint32_t ledcRead(uint8_t chan);
+
+* ``chan`` select LEDC channel to read the configured duty.
+
+This function will return ``duty`` set for selected LEDC channel.
+
+ledcReadFreq
+************
+
+This function is used to get configured frequency for the LEDC channel.
+
+.. code-block:: arduino
+
+    double ledcReadFreq(uint8_t chan);
+
+* ``chan`` select the LEDC channel to read the configured frequency.
+
+This function will return ``frequency`` configured for selected LEDC channel.
+
+ledcWriteTone
+*************
+
+This function is used to setup the LEDC channel to 50 % PWM tone on selected frequency.
+
+.. code-block:: arduino
+
+    double ledcWriteTone(uint8_t chan, double freq);
+
+* ``chan`` select LEDC channel.
+* ``freq`` select frequency of pwm signal.
+
+This function will return ``frequency`` set for channel.
+If ``0`` is returned, error occurs and ledc cahnnel was not configured.
+
+ledcWriteNote
+*************
+
+This function is used to setup the LEDC channel to specific note.
+
+.. code-block:: arduino
+
+    double ledcWriteNote(uint8_t chan, note_t note, uint8_t octave);
+
+* ``chan`` select LEDC channel.
+* ``note`` select note to be set.
+  
+======= ======= ======= ======= ======= ======
+NOTE_C  NOTE_Cs NOTE_D  NOTE_Eb NOTE_E  NOTE_F
+NOTE_Fs NOTE_G  NOTE_Gs NOTE_A  NOTE_Bb NOTE_B
+======= ======= ======= ======= ======= ======
+
+* ``octave`` select octave for note.
+
+This function will return ``frequency`` configured for the LEDC channel according to note and octave inputs.
+If ``0`` is returned, error occurs and the LEDC channel was not configured.
+      
+ledcAttachPin
+*************
+
+This function is used to attach the pin to the LEDC channel.
+
+.. code-block:: arduino
+
+    void ledcAttachPin(uint8_t pin, uint8_t chan);
+
+* ``pin`` select GPIO pin.
+* ``chan`` select LEDC channel.
+
+ledcDetachPin
+*************
+
+This function is used to detach the pin from LEDC.
+
+.. code-block:: arduino
+
+    void ledcDetachPin(uint8_t pin);
+
+* ``pin`` select GPIO pin.
+
+ledcChangeFrequency
+*******************
+
+This function is used to set frequency for the LEDC channel.
+
+.. code-block:: arduino
+
+    double ledcChangeFrequency(uint8_t chan, double freq, uint8_t bit_num);
+
+* ``channel`` select LEDC channel.
+* ``freq`` select frequency of pwm.
+* ``bit_num`` select resolution for LEDC channel. 
+ 
+  * range is 1-14 bits (1-20 bits for ESP32).
+  
+This function will return ``frequency`` configured for the LEDC channel.
+If ``0`` is returned, error occurs and the LEDC channel frequency was not set.
+
+analogWrite
+***********
+
+This function is used to write an analog value (PWM wave) on the pin.
+It is compatible with Arduinos analogWrite function.
+
+.. code-block:: arduino
+
+    void analogWrite(uint8_t pin, int value);
+
+* ``pin`` select the GPIO pin.
+* ``value`` select the duty cycle of pwm.
+  * range is from 0 (always off) to 255 (always on).
+
+Example Applications
+********************
+
+LEDC software fade example:
+
+.. literalinclude:: ../../../libraries/ESP32/examples/AnalogOut/LEDCSoftwareFade/LEDCSoftwareFade.ino
+    :language: arduino
+
+LEDC Write RGB example:
+
+.. literalinclude:: ../../../libraries/ESP32/examples/AnalogOut/ledcWrite_RGB/ledcWrite_RGB.ino
+    :language: arduino
diff --git a/docs/source/api/preferences.rst b/docs/source/api/preferences.rst
new file mode 100644
index 00000000000..86268cfc507
--- /dev/null
+++ b/docs/source/api/preferences.rst
@@ -0,0 +1,701 @@
+###########
+Preferences
+###########
+
+About
+-----
+
+The Preferences library is unique to arduino-esp32. It should be considered as the replacement for the Arduino EEPROM library.
+
+It uses a portion of the on-board non-volatile memory (NVS) of the ESP32 to store data. This data is retained across restarts and loss of power events to the system. 
+
+Preferences works best for storing many small values, rather than a few large values. If large amounts of data are to be stored, consider using a file system library such as LitteFS.
+
+The Preferences library is usable by all ESP32 variants.
+
+
+Header File
+-----------
+
+.. code-block:: arduino
+
+    #include <Preferences.h>
+..
+
+
+Overview
+--------
+
+Library methods are provided to:
+   - create a namespace;
+   - open and close a namespace;
+   - store and retrieve data within a namespace for supported data types;
+   - determine if a key value has been initialized;
+   - delete a ``key-value`` pair;
+   - delete all ``key-value`` pairs in a namespace;
+   - determine data types stored against a key;
+   - determine the number of key entries in the namespace.
+
+Preferences directly supports the following data types:
+
+.. table:: **Table 1 — Preferences Data Types**
+   :align: center
+   
+   +-------------------+-------------------+---------------+
+   | Preferences Type  | Data Type         | Size (bytes)  |
+   +===================+===================+===============+
+   | Bool              | bool              | 1             |
+   +-------------------+-------------------+---------------+
+   | Char              | int8_t            | 1             |
+   +-------------------+-------------------+---------------+
+   | UChar             | uint8_t           | 1             |
+   +-------------------+-------------------+---------------+
+   | Short             | int16_t           | 2             |
+   +-------------------+-------------------+---------------+
+   | UShort            | uint16_t          | 2             |
+   +-------------------+-------------------+---------------+
+   | Int               | int32_t           | 4             |
+   +-------------------+-------------------+---------------+
+   | UInt              | uint32_t          | 4             |
+   +-------------------+-------------------+---------------+
+   | Long              | int32_t           | 4             |
+   +-------------------+-------------------+---------------+
+   | ULong             | uint32_t          | 4             |
+   +-------------------+-------------------+---------------+
+   | Long64            | int64_t           | 8             |
+   +-------------------+-------------------+---------------+
+   | ULong64           | uint64_t          | 8             |
+   +-------------------+-------------------+---------------+
+   | Float             | float_t           | 8             |
+   +-------------------+-------------------+---------------+
+   | Double            | double_t          | 8             |
+   +-------------------+-------------------+---------------+
+   |                   | const char*       | variable      |
+   | String            +-------------------+               |
+   |                   | String            |               |
+   +-------------------+-------------------+---------------+
+   | Bytes             | uint8_t           | variable      |
+   +-------------------+-------------------+---------------+
+
+String values can be stored and retrieved either as an Arduino String or as a null terminated ``char`` array (c-string).
+
+Bytes type is used for storing and retrieving an arbitrary number of bytes in a namespace.
+
+
+Arduino-esp32 Preferences API
+-----------------------------
+
+``begin``
+**********
+
+   Open non-volatile storage with a given namespace name from an NVS partition.
+
+   .. code-block:: arduino
+
+     bool begin(const char * name, bool readOnly=false, const char* partition_label=NULL)
+   ..
+
+   **Parameters**
+      * ``name`` (Required)
+         - Namespace name. Maximum length is 15 characters.
+
+      * ``readOnly`` (Optional)
+         - ``false`` will open the namespace in read-write mode.
+         - ``true``  will open the namespace in read-only mode.
+         - if omitted, the namespace is opened in read-write mode.
+
+      * ``partition_label`` (Optional)
+         - name of the NVS partition in which to open the namespace.
+         - if omitted, the namespace is opened in the "``nvs``" partition.
+
+   **Returns**
+      * ``true`` if the namespace was opened successfully; ``false`` otherwise.
+
+   **Notes**
+      * If the namespace does not exist within the partition, it is first created.
+      * Attempting to write a key value to a namespace open in read-only mode will fail. 
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``end``
+*********
+
+   Close the currently opened namespace.
+
+   .. code-block:: arduino
+                       
+      void end()          
+   ..
+
+   **Parameters**
+      * None
+
+   **Returns**
+      * Nothing
+
+   **Note**
+      * After closing a namespace, methods used to access it will fail. 
+
+
+``clear``
+**********
+
+   Delete all keys and values from the currently opened namespace.
+
+   .. code-block:: arduino 
+                        
+      bool clear()         
+   ..
+
+   **Parameters**
+      * None
+   
+   **Returns**
+      * ``true`` if all keys and values were deleted; ``false`` otherwise.
+   
+   **Note**
+      * the namespace name still exists afterward. 
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+  
+  
+``remove``
+*************
+
+   Delete a key-value pair from the currently open namespace.
+   
+   .. code-block:: arduino
+   
+       bool remove(const char * key)
+   ..
+
+   **Parameters**
+      * ``key`` (Required)
+         -  the name of the key to be deleted. 
+   
+   **Returns**
+      * ``true`` if key-value pair was deleted; ``false`` otherwise.
+   
+   **Note** 
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``putChar, putUChar``
+**********************
+
+   Store a value against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+       size_t putChar(const char* key, int8_t value)
+       size_t putUChar(const char* key, uint8_t value)
+
+   ..
+
+   **Parameters**
+      * ``key`` (Required)
+         - if the key does not exist in the currently opened namespace it is first created.
+
+      * ``value`` (Required)
+         - must match the data type of the method.
+         
+   **Returns**
+      * ``1`` (the number of bytes stored for these data types) if the call is successful; ``0`` otherwise.
+
+   **Notes**
+      * Attempting to store a value without a namespace being open in read-write mode will fail.
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``putShort, putUShort``
+************************
+
+   Store a value against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+       size_t putShort(const char* key, int16_t value)
+       size_t putUShort(const char* key, uint16_t value)
+
+   ..
+
+   **Parameters**
+      * ``key`` (Required)
+         - if the key does not exist in the currently opened namespace it is first created.
+
+      * ``value`` (Required)
+         - must match the data type of the method.
+         
+   **Returns**
+      * ``2`` (the number of bytes stored for these data types) if the call is successful; ``0`` otherwise.
+
+   **Notes**
+      * Attempting to store a value without a namespace being open in read-write mode will fail.
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+
+``putInt, putUInt``
+********************
+``putLong, putULong``
+**********************
+
+   Store a value against a given key in the currently open namespace.
+   
+   .. code-block:: arduino
+
+       size_t putInt(const char* key, int32_t value)
+       size_t putUInt(const char* key, uint32_t value)
+       size_t putLong(const char* key, int32_t value)
+       size_t putULong(const char* key, uint32_t value)
+
+   ..
+
+   **Parameters**
+      * ``key`` (Required)
+         - if the key does not exist in the currently opened namespace it is first created.
+
+      * ``value`` (Required)
+         - must match the data type of the method.
+         
+   **Returns**
+      * ``4`` (the number of bytes stored for these data types) if the call is successful; ``0`` otherwise.
+
+   **Notes**
+      * Attempting to store a value without a namespace being open in read-write mode will fail.
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``putLong64, putULong64``
+*************************
+``putFloat, putDouble``
+***********************
+
+   Store a value against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+       size_t putLong64(const char* key, int64_t value)
+       size_t putULong64(const char* key, uint64_t value)
+       size_t putFloat(const char* key, float_t value)
+       size_t putDouble(const char* key, double_t value)
+
+   ..
+
+   **Parameters**
+      * ``key`` (Required)
+         - if the key does not exist in the currently opened namespace it is first created.
+
+      * ``value`` (Required)
+         - must match the data type of the method.
+         
+   **Returns**
+      * ``8`` (the number of bytes stored for these data types) if the call is successful; ``0`` otherwise.
+
+   **Notes**
+      * Attempting to store a value without a namespace being open in read-write mode will fail.
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``putBool``
+***********
+
+   Store a value against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+          size_t putBool(const char* key, bool value)
+
+   ..
+
+   **Parameters**
+      * ``key`` (Required)
+         - if the key does not exist in the currently opened namespace it is first created.
+
+      * ``value`` (Required)
+         - must match the data type of the method.
+         
+   **Returns**
+      * ``true`` if successful; ``false`` otherwise.
+
+   **Notes**
+      * Attempting to store a value without a namespace being open in read-write mode will fail.
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``putString``
+**************
+
+   Store a variable length value against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+       size_t putString(const char* key, const char* value);
+       size_t putString(const char* key, String value);
+
+   ..
+
+   **Parameters**
+      * ``key`` (Required)
+         - if the key does not exist in the currently opened namespace it is first created.
+
+      * ``value`` (Required)
+         - if ``const char*``, a null-terminated (c-string) character array.         
+         - if ``String``, a valid Arduino String type.
+         
+   **Returns**
+      * if successful: the number of bytes stored; ``0`` otherwise.
+
+   **Notes**
+      * Attempting to store a value without a namespace being open in read-write mode will fail.
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``putBytes``
+************
+
+   Store a variable number of bytes against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+       size_t putBytes(const char* key, const void* value, size_t len);
+
+   ..
+
+   **Parameters**
+      * ``key`` (Required)
+         - if the key does not exist in the currently opened namespace it is first created.
+
+      * ``value`` (Required)
+         - pointer to an array or buffer containing the bytes to be stored.
+
+      * ``len`` (Required)
+         - the number of bytes from ``value`` to be stored.
+         
+   **Returns**
+      *  if successful: the number of bytes stored; ``0`` otherwise.
+
+   **Notes**
+      * Attempting to store a value without a namespace being open in read-write mode will fail.
+      * This method operates on the bytes used by the underlying data type, not the number of elements of a given data type. The data type of ``value`` is not retained by the Preferences library afterward. 
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``getChar, getUChar``
+*********************
+
+   Retrieve a value stored against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+      int8_t getChar(const char* key, int8_t defaultValue = 0)
+      uint8_t getUChar(const char* key, uint8_t defaultValue = 0)
+
+   ..
+
+   **Parameters**
+      * ``key`` (Required)
+
+      * ``defaultValue`` (Optional)
+         - must match the data type of the method if provided.
+         
+   **Returns**
+      * the value stored against ``key`` if the call is successful.
+      * ``defaultValue``, if it is provided; ``0`` otherwise.
+
+   **Notes**
+      * Attempting to retrieve a key without a namespace being available will fail.
+      * Attempting to retrieve value from a non existant key will fail.
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``getShort, getUShort``
+****************************
+
+   Retrieve a value stored against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+      int16_t getShort(const char* key, int16_t defaultValue = 0)
+      uint16_t getUShort(const char* key, uint16_t defaultValue = 0)
+   ..
+   
+   Except for the data type returned, behaves exactly like ``getChar``.
+
+
+
+``getInt, getUInt``
+*******************
+
+   Retrieve a value stored against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+    int32_t getInt(const char* key, int32_t defaultValue = 0)
+    uint32_t getUInt(const char* key, uint32_t defaultValue = 0)
+
+   ..
+   
+   Except for the data type returned, behaves exactly like ``getChar``.
+
+
+``getLong, getULong``
+*********************
+
+   Retrieve a value stored against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+      int32_t getLong(const char* key, int32_t defaultValue = 0)
+      uint32_t getULong(const char* key, uint32_t defaultValue = 0)
+
+   ..
+   
+   Except for the data type returned, behaves exactly like ``getChar``.
+
+
+``getLong64, getULong64``
+*************************
+
+   Retrieve a value stored against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+      int64_t getLong64(const char* key, int64_t defaultValue = 0)
+      uint64_t getULong64(const char* key, uint64_t defaultValue = 0)
+
+   ..
+   
+   Except for the data type returned, behaves exactly like ``getChar``.
+
+
+``getFloat``
+*************
+
+   Retrieve a value stored against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+      float_t getFloat(const char* key, float_t defaultValue = NAN)
+
+   ..
+   
+   Except for the data type returned and the value of ``defaultValue``, behaves exactly like ``getChar``.
+
+
+``getDouble``
+*************
+
+   Retrieve a value stored against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+      double_t getDouble(const char* key, double_t defaultValue = NAN)
+
+   ..
+   
+   Except for the data type returned and the value of ``defaultValue``, behaves exactly like ``getChar``.
+
+
+``getBool``
+************
+
+   Retrieve a value stored against a given key in the currently open namespace.
+
+   .. code-block:: arduino
+
+      uint8_t getUChar(const char* key, uint8_t defaultValue = 0);
+
+   ..
+   
+   Except for the data type returned, behaves exactly like ``getChar``.
+
+
+``getString``
+*************
+
+   Copy a string of ``char`` stored against a given key in the currently open namespace to a buffer.
+
+.. code-block:: arduino
+
+    size_t getString(const char* key, char* value, size_t len);
+..
+
+   **Parameters**
+      * ``key`` (Required)
+      * ``value`` (Required)
+         - a buffer of a size large enough to hold ``len`` bytes
+      * ``len`` (Required)
+         - the number of type ``char``` to be written to the buffer pointed to by ``value``
+
+   **Returns**
+      * if successful; the number of bytes equal to ``len`` is written to the buffer pointed to by ``value``, and the method returns ``1``.
+      * if the method fails, nothing is written to the buffer pointed to by ``value`` and the method returns ``0``.
+
+   **Notes**
+      * ``len`` must equal the number of bytes stored against the key or the call will fail.
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``getString``
+*************
+
+   Retrieve an Arduino String value stored against a given key in the currently open namespace.
+
+.. code-block:: arduino
+
+    String getString(const char* key, String defaultValue = String());
+
+..
+
+   **Parameters**
+      * ``key`` (Required)
+      * ``defaultValue`` (Optional)
+         
+   **Returns**
+      * the value stored against ``key`` if the call if successful
+      * if the method fails: it returns ``defaultValue``, if provided; ``""`` (an empty String) otherwise.
+
+   **Notes**
+      * ``defaultValue`` must be of type ``String``.
+
+
+``getBytes``
+*************
+
+Copy a series of bytes stored against a given key in the currently open namespace to a buffer.
+
+.. code-block:: arduino
+
+   size_t getBytes(const char* key, void * buf, size_t len);
+
+..
+
+   **Parameters**
+      * ``key`` (Required)
+      * ``buf`` (Required)
+         - a buffer of a size large enough to hold ``len`` bytes.
+      * ``len`` (Required)
+         - the number of bytes to be written to the buffer pointed to by ``buf``
+
+   **Returns**
+      * if successful, the number of bytes equal to ``len`` is written to buffer ``buf``, and the method returns ``1``.
+      * if the method fails, nothing is written to the buffer and the method returns ``0``.
+
+   **Notes**
+      * ``len`` must equal the number of bytes stored against the key or the call will fail.
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``getBytesLength``
+******************
+
+Get the number of bytes stored in the value against a key of type ``Bytes`` in the currently open namespace.
+
+.. code-block:: arduino
+
+   size_t getBytesLength(const char* key)
+
+..
+
+   **Parameters**
+      * ``key`` (Required)
+
+   **Returns**
+      * if successful: the number of bytes in the value stored against ``key``; ``0`` otherwise.
+      
+   **Notes**
+      * This method will fail if ``key`` is not of type ``Bytes``.
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+
+
+``getType``
+***********
+
+Get the Preferences data type of a given key within the currently open namespace.
+
+.. code-block:: arduino
+
+   PreferenceType getType(const char* key)
+
+..
+
+   **Parameters**
+      * ``key`` (Required)
+
+   **Returns**
+      * an ``int`` value as per Table 2 below.
+      * a value of ``10`` (PT_INVALID) if the call fails.
+      
+   **Notes**
+      * The return values are enumerated in ``Preferences.h``. Table 2 includes the enumerated values for information.
+      * A return value can map to more than one Prefs Type.
+      * The method will fail if: the namespace is not open; the key does not exist; the provided key exceeds 15 characters.
+
+.. table:: **Table 2 — getType Return Values**
+   :align: center
+   
+   +---------------+---------------+-------------------+-----------------------+
+   | Return value  | Prefs Type    | Data Type         | Enumerated Value      |
+   +===============+===============+===================+=======================+
+   | 0             | Char          | int8_t            | PT_I8                 |
+   +---------------+---------------+-------------------+-----------------------+
+   | 1             | UChar         | uint8_t           | PT_U8                 |
+   |               +---------------+-------------------+                       |
+   |               | Bool          | bool              |                       |
+   +---------------+---------------+-------------------+-----------------------+
+   | 2             | Short         | int16_t           | PT_I16                |
+   +---------------+---------------+-------------------+-----------------------+
+   | 3             | UShort        | uint16_t          | PT_U16                |
+   +---------------+---------------+-------------------+-----------------------+
+   | 4             | Int           | int32_t           | PT_I32                |
+   |               +---------------+                   |                       |
+   |               | Long          |                   |                       |
+   +---------------+---------------+-------------------+-----------------------+
+   | 5             | UInt          | uint32_t          | PT_U32                |
+   |               +---------------+                   |                       |
+   |               | ULong         |                   |                       |
+   +---------------+---------------+-------------------+-----------------------+
+   | 6             | Long64        | int64_t           | PT_I64                |
+   +---------------+---------------+-------------------+-----------------------+
+   | 7             | ULong64       | uint64_t          | PT_U64                |
+   +---------------+---------------+-------------------+-----------------------+
+   | 8             | String        | String            | PT_STR                |
+   |               |               +-------------------+                       |
+   |               |               | \*char            |                       |
+   +---------------+---------------+-------------------+-----------------------+
+   | 9             | Double        | double_t          | PT_BLOB               |
+   |               +---------------+-------------------+                       |
+   |               | Float         | float_t           |                       |
+   |               +---------------+-------------------+                       |   
+   |               | Bytes         | uint8_t           |                       |
+   +---------------+---------------+-------------------+-----------------------+
+   | 10            | \-            | \-                | PT_INVALID            |
+   +---------------+---------------+-------------------+-----------------------+
+
+
+``freeEntries``
+***************
+
+Get the number of free entries available in the key table of the currently open namespace.
+
+.. code-block:: arduino
+
+   size_t freeEntries()
+
+..
+
+   **Parameters**
+      * none
+
+   **Returns**
+      * if successful: the number of free entries available in the key table of the currently open namespace; ``0`` otherwise.
+      
+   **Notes**
+      * keys storing values of type ``Bool``, ``Char``, ``UChar``, ``Short``, ``UShort``, ``Int``, ``UInt``, ``Long``, ``ULong``, ``Long64``, ``ULong64`` use one entry in the key table.
+      * keys storing values of type ``Float`` and ``Double`` use three entries in the key table.
+      * Arduino or c-string ``String`` types use a minimum of two key table entries with the number of entries increasing with the length of the string. 
+      * keys storing values of type ``Bytes`` use a minimum of three key table entries with the number of entries increasing with the number of bytes stored. 
+      * A message providing the reason for a failed call is sent to the arduino-esp32 ``log_e`` facility.
+      
+
+..    --- EOF ----
\ No newline at end of file
diff --git a/docs/source/api/sigmadelta.rst b/docs/source/api/sigmadelta.rst
new file mode 100644
index 00000000000..d5036a38487
--- /dev/null
+++ b/docs/source/api/sigmadelta.rst
@@ -0,0 +1,84 @@
+##########
+SigmaDelta
+##########
+
+About
+-----
+
+ESP32 provides a second-order sigma delta modulation module and 8 (4 for ESP32-C3)
+independent modulation channels. The channels are capable to output 1-bit 
+signals (output index: 100 ~ 107) with sigma delta modulation.
+
+========= =============================
+ESP32 SoC Number of SigmaDelta channels
+========= =============================
+ESP32     8
+ESP32-S2  8
+ESP32-C3  4
+ESP32-S3  8
+========= =============================
+
+Arduino-ESP32 SigmaDelta API
+----------------------------
+
+sigmaDeltaSetup
+***************
+
+This function is used to setup the SigmaDelta channel frequency and resolution.
+
+.. code-block:: arduino
+
+    double ledcSetup(uint8_t channel, double freq, uint8_t resolution_bits);
+
+* ``pin`` select GPIO pin.
+* ``channel`` select SigmaDelta channel.
+* ``freq`` select frequency.
+
+  * range is 1-14 bits (1-20 bits for ESP32).
+  
+This function will return ``frequency`` configured for the SigmaDelta channel.
+If ``0`` is returned, error occurs and the SigmaDelta channel was not configured.
+
+sigmaDeltaWrite
+***************
+
+This function is used to set duty for the SigmaDelta channel.
+
+.. code-block:: arduino
+
+    void sigmaDeltaWrite(uint8_t channel, uint8_t duty);
+
+* ``channel`` select SigmaDelta channel.
+* ``duty`` select duty to be set for selected channel.
+
+sigmaDeltaRead
+**************
+
+This function is used to get configured duty for the SigmaDelta channel.
+
+.. code-block:: arduino
+
+    uint8_t sigmaDeltaRead(uint8_t channel)
+
+* ``channnel`` select SigmaDelta channel.
+
+This function will return ``duty`` configured for the selected SigmaDelta channel.
+
+sigmaDeltaDetachPin
+*******************
+
+This function is used to detach pin from SigmaDelta.
+
+.. code-block:: arduino
+
+    void sigmaDeltaDetachPin(uint8_t pin);
+
+* ``pin`` select GPIO pin.
+
+Example Applications
+********************
+
+Here is example use of SigmaDelta:
+
+.. literalinclude:: ../../../libraries/ESP32/examples/AnalogOut/SigmaDelta/SigmaDelta.ino
+    :language: arduino
diff --git a/docs/source/api/timer.rst b/docs/source/api/timer.rst
new file mode 100644
index 00000000000..67bdd65effa
--- /dev/null
+++ b/docs/source/api/timer.rst
@@ -0,0 +1,377 @@
+##########
+Timer
+##########
+
+About
+-----
+
+The ESP32 SoCs contains from 2 to 4 hardware timers. 
+They are all 64-bit (54-bit for ESP32-C3) generic timers based on 16-bit pre-scalers and 64-bit (54-bit for ESP32-C3) 
+up / down counters which are capable of being auto-reloaded.
+
+========= ================
+ESP32 SoC Number of timers
+========= ================
+ESP32     4
+ESP32-S2  4
+ESP32-C3  2
+ESP32-S3  4
+========= ================
+
+Arduino-ESP32 Timer API
+----------------------------
+
+timerBegin
+**********
+
+This function is used to configure the timer. After successful setup the timer will automatically start.
+
+.. code-block:: arduino
+
+    hw_timer_t * timerBegin(uint8_t num, uint16_t divider, bool countUp);
+
+* ``num`` select timer number.
+* ``divider`` select timer divider.
+* ``resolution`` select timer resolution.
+
+  * range is 1-14 bits (1-20 bits for ESP32).
+  
+This function will return ``timer`` structure if configuration is successful.
+If ``NULL`` is returned, error occurs and the timer was not configured.
+
+timerEnd
+********
+
+This function is used to end timer.
+
+.. code-block:: arduino
+
+    void timerEnd(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+timerSetConfig
+**************
+
+This function is used to configure initialized timer (timerBegin() called).
+
+.. code-block:: arduino
+
+    uint32_t timerGetConfig(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``configuration`` as uint32_t number. 
+This can be translated by inserting it to struct ``timer_cfg_t.val``.
+
+timerAttachInterrupt
+********************
+
+This function is used to attach interrupt to timer.
+
+.. code-block:: arduino
+
+    void timerAttachInterrupt(hw_timer_t *timer, void (*fn)(void), bool edge);
+
+* ``timer`` timer struct.
+* ``fn`` funtion to be called when interrupt is triggered.
+* ``edge`` select edge to trigger interrupt (only LEVEL trigger is currently supported).
+
+timerDetachInterrupt
+********************
+
+This function is used to detach interrupt from timer.
+
+.. code-block:: arduino
+
+    void timerDetachInterrupt(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+timerStart
+**********
+
+This function is used to start counter of the timer.
+
+.. code-block:: arduino
+
+    void timerStart(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+timerStop
+*********
+
+This function is used to stop counter of the timer.
+
+.. code-block:: arduino
+
+    void timerStop(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+timerRestart
+************
+
+This function is used to restart counter of the timer.
+
+.. code-block:: arduino
+
+    void timerRestart(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+timerWrite
+**********
+
+This function is used to set counter value of the timer.
+
+.. code-block:: arduino
+
+    void timerWrite(hw_timer_t *timer, uint64_t val);
+
+* ``timer`` timer struct.
+* ``val`` counter value to be set.
+
+timerSetDivider
+***************
+
+This function is used to set the divider of the timer.
+
+.. code-block:: arduino
+
+    void timerSetDivider(hw_timer_t *timer, uint16_t divider);
+
+* ``timer`` timer struct.
+* ``divider`` divider to be set.
+
+timerSetCountUp
+***************
+
+This function is used to configure counting direction of the timer.
+
+.. code-block:: arduino
+
+    void timerSetCountUp(hw_timer_t *timer, bool countUp);
+
+* ``timer`` timer struct.
+* ``countUp`` select counting direction (``true`` = increment).
+
+timerSetAutoReload
+******************
+
+This function is used to set counter value of the timer.
+
+.. code-block:: arduino
+
+    void timerSetAutoReload(hw_timer_t *timer, bool autoreload);
+
+* ``timer`` timer struct.
+* ``autoreload`` select autoreload (``true`` = enabled).
+
+timerStarted
+************
+
+This function is used to get if the timer is running.
+
+.. code-block:: arduino
+
+    bool timerStarted(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``true`` if the timer is running. If ``false`` is returned, timer is stopped.
+
+timerRead
+*********
+
+This function is used to read counter value of the timer.
+
+.. code-block:: arduino
+
+    uint64_t timerRead(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``counter value`` of the timer.
+
+timerReadMicros
+***************
+
+This function is used to read counter value in microseconds of the timer.
+
+.. code-block:: arduino
+
+    uint64_t timerReadMicros(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``counter value`` of the timer in microseconds.
+
+timerReadMilis
+**************
+
+This function is used to read counter value in miliseconds of the timer.
+
+.. code-block:: arduino
+
+    uint64_t timerReadMilis(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``counter value`` of the timer in miliseconds.
+
+timerReadSeconds
+****************
+
+This function is used to read counter value in seconds of the timer.
+
+.. code-block:: arduino
+
+    double timerReadSeconds(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``counter value`` of the timer in seconds.
+
+timerGetDivider
+***************
+
+This function is used to get divider of the timer.
+
+.. code-block:: arduino
+
+    uint16_t timerGetDivider(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``divider`` of the timer.
+
+timerGetCountUp
+***************
+
+This function is used get counting direction of the timer.
+
+.. code-block:: arduino
+
+    bool timerGetCountUp(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``true`` if the timer counting direction is UP (incrementing).
+If ``false`` returned, the timer counting direction is DOWN (decrementing).
+
+timerGetAutoReload
+******************
+
+This function is used to get configuration of auto reload of the timer.
+
+.. code-block:: arduino
+
+    bool timerGetAutoReload(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``true`` if the timer auto reload is enabled.
+If ``false`` returned, the timer auto reload is disabled.
+
+timerAlarmEnable
+****************
+
+This function is used to enable generation of timer alarm events.
+
+.. code-block:: arduino
+
+    void timerAlarmEnable(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+timerAlarmDisable
+*****************
+
+This function is used to disable generation of timer alarm events.
+
+.. code-block:: arduino
+
+    void timerAlarmDisable(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+  
+timerAlarmWrite
+***************
+
+This function is used to configure alarm value and autoreload of the timer.
+
+.. code-block:: arduino
+
+    void timerAlarmWrite(hw_timer_t *timer, uint64_t alarm_value, bool autoreload);
+
+* ``timer`` timer struct.
+* ``alarm_value`` alarm value to generate event.
+* ``autoreload`` enabled/disabled autorealod.
+
+timerAlarmEnabled
+*****************
+
+This function is used to get status of timer alarm.
+
+.. code-block:: arduino
+
+    bool timerAlarmEnabled(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``true`` if the timer alarm is enabled.
+If ``false`` returned, the timer alarm is disabled.
+
+timerAlarmRead
+**************
+
+This function is used to read alarm value of the timer.
+
+.. code-block:: arduino
+
+    uint64_t timerAlarmRead(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+timerAlarmReadMicros
+********************
+
+This function is used to read alarm value of the timer in microseconds.
+
+.. code-block:: arduino
+
+    uint64_t timerAlarmReadMicros(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``alarm value`` of the timer in microseconds.
+
+timerAlarmReadSeconds
+*********************
+
+This function is used to read alarm value of the timer in seconds.
+
+.. code-block:: arduino
+
+    double timerAlarmReadSeconds(hw_timer_t *timer);
+
+* ``timer`` timer struct.
+
+This function will return ``alarm value`` of the timer in seconds.
+
+Example Applications
+********************
+
+There are 2 examples uses of Timer:
+
+Repeat timer example:
+
+.. literalinclude:: ../../../libraries/ESP32/examples/Timer/RepeatTimer/RepeatTimer.ino
+    :language: arduino
+
+Watchdog timer example:
+
+.. literalinclude:: ../../../libraries/ESP32/examples/Timer/WatchdogTimer/WatchdogTimer.ino
+    :language: arduino
\ No newline at end of file
diff --git a/docs/source/api/usb_cdc.rst b/docs/source/api/usb_cdc.rst
index 1c0b04f2f3c..7d700b955a8 100644
--- a/docs/source/api/usb_cdc.rst
+++ b/docs/source/api/usb_cdc.rst
@@ -34,6 +34,7 @@ Where ``event`` can be:
 * ARDUINO_USB_CDC_LINE_CODING_EVENT
 * ARDUINO_USB_CDC_RX_EVENT
 * ARDUINO_USB_CDC_TX_EVENT
+* ARDUINO_USB_CDC_RX_OVERFLOW_EVENT
 * ARDUINO_USB_CDC_MAX_EVENT
 
 setRxBufferSize
diff --git a/docs/source/api/wifi.rst b/docs/source/api/wifi.rst
index b5214838084..5f1d100493e 100644
--- a/docs/source/api/wifi.rst
+++ b/docs/source/api/wifi.rst
@@ -67,6 +67,35 @@ Use static allocation if you want to have more performance and if your applicati
 
 By default, the memory allocation will be set to **dynamic** if this function is not being used.
 
+setDualAntennaConfig
+********************
+
+Configures the Dual antenna functionallity. This function should be used only on the **ESP32-WROOM-DA** module or any other ESP32 with RF switch.
+
+.. code-block:: arduino
+
+    bool setDualAntennaConfig(uint8_t gpio_ant1, uint8_t gpio_ant2, wifi_rx_ant_t rx_mode, wifi_tx_ant_t tx_mode);
+
+
+* ``gpio_ant1`` Configure the GPIO number for the antenna 1 connected to the RF switch (default ``GPIO2`` on ESP32-WROOM-DA)
+* ``gpio_ant2`` Configure the GPIO number for the antenna 2 connected to the RF switch (default ``GPIO25`` on ESP32-WROOM-DA)
+* ``rx_mode`` Set the RX antenna mode. See wifi_rx_ant_t for the options.
+* ``tx_mode`` Set the TX antenna mode. See wifi_tx_ant_t for the options.
+
+Return ``true`` if the configuration was successful.
+
+For the ``rx_mode`` you can use the following configuration:
+
+* ``WIFI_RX_ANT0`` Selects the antenna 1 for all RX activity.
+* ``WIFI_RX_ANT1`` Selects the antenna 2 for all RX activity.
+* ``WIFI_RX_ANT_AUTO``  Selects the antenna for RX automatically.
+
+For the ``tx_mode`` you can use the following configuration:
+
+* ``WIFI_TX_ANT0`` Selects the antenna 1 for all TX activity.
+* ``WIFI_TX_ANT1`` Selects the antenna 2 for all TX activity.
+* ``WIFI_TX_ANT_AUTO`` Selects the antenna for TX automatically.
+
 WiFiAP
 ------
 
diff --git a/docs/source/boards/boards.rst b/docs/source/boards/boards.rst
index 12dbe4b175d..b0376f9c398 100644
--- a/docs/source/boards/boards.rst
+++ b/docs/source/boards/boards.rst
@@ -98,18 +98,13 @@ Generic Vendor
     .. note::
         Create one file per board or one file with multiple boards. Do not add board information/description on this file.
 
+.. include:: ../common/datasheet.inc
+
 Resources
 ---------
 
-* `ESP32 Datasheet`_ (Datasheet)
-* `ESP32-S2 Datasheet`_ (Datasheet)
-* `ESP32-C3 Datasheet`_ (Datasheet)
-
 .. _Espressif Systems: https://www.espressif.com 
 .. _Espressif Product Selector: https://products.espressif.com/
-.. _ESP32 Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf
-.. _ESP32-S2 Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf
-.. _ESP32-C3 Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf
 
 .. |board_lolin_d32| raw:: html
 
diff --git a/docs/source/boards/generic.rst b/docs/source/boards/generic.rst
index 95bbcbeda4f..8ca4a79eace 100644
--- a/docs/source/boards/generic.rst
+++ b/docs/source/boards/generic.rst
@@ -26,9 +26,4 @@ Pin Layout
 
 Add here the pin layout image (not required).
 
-Resources
----------
-
-* `ESP32`_ (Datasheet)
-
-.. _ESP32: https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf
+.. include:: ../common/datasheet.inc
diff --git a/docs/source/common/datasheet.inc b/docs/source/common/datasheet.inc
new file mode 100644
index 00000000000..5f68b0115ff
--- /dev/null
+++ b/docs/source/common/datasheet.inc
@@ -0,0 +1,13 @@
+Datasheet
+---------
+
+* `ESP32`_ (Datasheet)
+* `ESP32-S2`_ (Datasheet)
+* `ESP32-C3`_ (Datasheet)
+* `ESP32-S3`_ (Datasheet)
+
+.. _Espressif Product Selector: https://products.espressif.com/
+.. _ESP32: https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf
+.. _ESP32-S2: https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf
+.. _ESP32-C3: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf
+.. _ESP32-S3: https://www.espressif.com/sites/default/files/documentation/esp32-s3_datasheet_en.pdf
diff --git a/docs/source/conf.py b/docs/source/conf.py
index 33b42328007..7fd7e721150 100644
--- a/docs/source/conf.py
+++ b/docs/source/conf.py
@@ -18,11 +18,11 @@
 # -- Project information -----------------------------------------------------
 
 project = 'Arduino-ESP32'
-copyright = '2021, Espressif'
+copyright = '2022, Espressif'
 author = 'Espressif'
 
 # The full version, including alpha/beta/rc tags
-release = '2.0.0'
+release = '2.0.2'
 
 # -- General configuration ---------------------------------------------------
 
@@ -30,7 +30,8 @@
 # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
 # ones.
 extensions = [
-    'sphinx_copybutton'
+    'sphinx_copybutton',
+    'sphinx_tabs.tabs'
 ]
 
 # Add any paths that contain templates here, relative to this directory.
diff --git a/docs/source/esp-idf_component.rst b/docs/source/esp-idf_component.rst
index 3be9d85575d..f153f267e6b 100644
--- a/docs/source/esp-idf_component.rst
+++ b/docs/source/esp-idf_component.rst
@@ -1,20 +1,31 @@
-##############################
-Arduino as a ESP-IDF component
-##############################
+###############################
+Arduino as an ESP-IDF component
+###############################
+
+This method is recommended for advanced users. To use this method, you will need to have the ESP-IDF toolchain installed.
+
+For a simplified method, see `Installing using Boards Manager <https://docs.espressif.com/projects/arduino-esp32/en/latest/installing.html#installing-using-boards-manager>`_.
 
 ESP32 Arduino lib-builder
 -------------------------
 
-For a simplified method, see `lib-builder <https://github.com/espressif/esp32-arduino-lib-builder>`_.
+If you don't need any modifications in the default Arduino ESP32 core, we recommend you to install using the Boards Manager.
+
+Arduino Lib Builder is the tool that integrates ESP-IDF into Arduino. It allows you to customize the default settings used by Espressif and try them in Arduino IDE.
+
+For more information see `Arduino lib builder <https://github.com/espressif/esp32-arduino-lib-builder>`_
+
 
 Installation
 ------------
 
-.. note:: Latest Arduino Core ESP32 version is now compatible with `ESP-IDF v4.4 <https://github.com/espressif/esp-idf/tree/release/v4.4>`_. Please consider this compability when using Arduino as component in ESP-IDF.
+.. note:: Latest Arduino Core ESP32 version is now compatible with `ESP-IDF v4.4 <https://github.com/espressif/esp-idf/tree/release/v4.4>`_. Please consider this compatibility when using Arduino as a component in ESP-IDF.
+
+#. Download and install `ESP-IDF <https://github.com/espressif/esp-idf>`_.
 
-- Download and install `ESP-IDF <https://github.com/espressif/esp-idf>`_.
-- Create blank ESP-IDF project (use sample_project from /examples/get-started) or choose one of the examples.
-- In the project folder, create a new folder called `components` and clone this repository inside the new created folder.
+   * For more information see `Get Started <https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html#installation-step-by-step>`_.
+#. Create a blank ESP-IDF project (use sample_project from /examples/get-started) or choose one of the examples.
+#. In the project folder, create a new folder called ``components`` and clone this repository inside the newly created folder.
 
 .. code-block:: bash
     
@@ -26,19 +37,33 @@ Installation
     cd ../.. && \
     idf.py menuconfig
 
+Configuration
+-------------
+
+Depending on one of the two following options, in the menuconfig set the appropriate settings.
+
+Go to the section ``Arduino Configuration --->``
+
+1. For usage of ``app_main()`` function - Turn off ``Autostart Arduino setup and loop on boot``
+2. For usage of ``setup()`` and ``loop()`` functions - Turn on ``Autostart Arduino setup and loop on boot``
+
+Experienced users can explore other options in the Arduino section.
+
+After the setup you can save and exit:
+
+- Save [S]
+- Confirm default filename [Enter]
+- Close confirmation window [Enter] or [Space] or [Esc]
+- Quit [Q]
+
 Option 1. Using Arduino setup() and loop()
 ******************************************
 
-- The `idf.py menuconfig` has some Arduino options.
-    - Turn on `Autostart Arduino setup and loop on boot`.
-    - In main folder rename file `main.c` to `main.cpp`.
-    - In main folder open file `CMakeList.txt` and change `main.c` to `main.cpp` as described below.
-
-.. code-block:: bash
+- In main folder rename file `main.c` to `main.cpp`.
 
-    idf_component_register(SRCS "main.cpp" INCLUDE_DIRS ".")
+- In main folder open file `CMakeList.txt` and change `main.c` to `main.cpp` as described below.
 
-- Your main.cpp should be formated like any other sketch.
+- Your main.cpp should be formatted like any other sketch.
 
 .. code-block:: c
 
@@ -46,7 +71,10 @@ Option 1. Using Arduino setup() and loop()
     #include "Arduino.h"
 
     void setup(){
-        Serial.begin(115200);
+      Serial.begin(115200);
+      while(!Serial){
+        ; // wait for serial port to connect
+      }
     }
 
     void loop(){
@@ -57,10 +85,10 @@ Option 1. Using Arduino setup() and loop()
 Option 2. Using ESP-IDF appmain()
 *********************************
 
-- You need to implement ``app_main()`` and call ``initArduino();`` in it.
+In main.c or main.cpp you need to implement ``app_main()`` and call ``initArduino();`` in it.
 
 Keep in mind that setup() and loop() will not be called in this case.
-If you plan to base your code on examples provided in `examples <https://github.com/espressif/esp-idf/tree/master/examples>`_, please make sure to move the app_main() function in main.cpp from the files in the example.
+Furthermore the ``app_main()`` is single execution as a normal function so if you need an infinite loop as in Arduino place it there.
 
 .. code-block:: cpp
 
@@ -69,28 +97,39 @@ If you plan to base your code on examples provided in `examples <https://github.
 
     extern "C" void app_main()
     {
-        initArduino();
-        pinMode(4, OUTPUT);
-        digitalWrite(4, HIGH);
-        //do your own thing
-    }
+      initArduino();
+
+      // Arduino-like setup()
+      Serial.begin(115200);
+      while(!Serial){
+        ; // wait for serial port to connect
+      }
+
+      // Arduino-like loop()
+      while(true){
+        Serial.println("loop");
+      }
 
-- "Disable mutex locks for HAL"
-- If enabled, there will be no protection on the drivers from concurently accessing them from another thread/interrupt/core
-    - "Autoconnect WiFi on boot"
-- If enabled, WiFi will start with the last known configuration
-- Otherwise it will wait for WiFi.begin
+      // WARNING: if program reaches end of function app_main() the MCU will restart.
+    }
 
 Build, flash and monitor
 ************************
 
 - For both options use command ``idf.py -p <your-board-serial-port> flash monitor``
-- It will build, upload and open serial monitor to your board.
+
+- The project will build, upload and open the serial monitor to your board
+
+  - Some boards require button combo press on the board: press-and-hold Boot button + press-and-release RST button, release Boot button
+
+  - After a successful flash, you may need to press the RST button again
+
+  - To terminate the serial monitor press [Ctrl] + [ ] ]
 
 Logging To Serial
 -----------------
 
-If you are writing code that does not require Arduino to compile and you want your `ESP_LOGx` macros to work in Arduino IDE, you can enable the compatibility by adding the following lines after:
+If you are writing code that does not require Arduino to compile and you want your `ESP_LOGx` macros to work in Arduino IDE, you can enable the compatibility by adding the following lines:
 
 .. code-block:: c
 
@@ -107,4 +146,4 @@ To fix that behavior, you need to set FreeRTOS tick rate to 1000Hz in `make menu
 Compilation Errors
 ------------------
 
-As commits are made to esp-idf and submodules, the codebases can develop incompatibilities which cause compilation errors.  If you have problems compiling, follow the instructions in `Issue #1142 <https://github.com/espressif/arduino-esp32/issues/1142>`_ to roll esp-idf back to a different version.
+As commits are made to esp-idf and submodules, the codebases can develop incompatibilities that cause compilation errors.  If you have problems compiling, follow the instructions in `Issue #1142 <https://github.com/espressif/arduino-esp32/issues/1142>`_ to roll esp-idf back to a different version.
diff --git a/docs/source/getting_started.rst b/docs/source/getting_started.rst
index 91b66b343a3..e69373ea499 100644
--- a/docs/source/getting_started.rst
+++ b/docs/source/getting_started.rst
@@ -26,6 +26,9 @@ power consumption.
 
 The ESP32 series is available as a chip or module.
 
+
+.. _supported_socs:
+
 Supported SoC's
 ---------------
 
@@ -34,10 +37,10 @@ Here are the ESP32 series supported by the Arduino-ESP32 project:
 ======== ====== =========== ===================================
 SoC      Stable Development Datasheet
 ======== ====== =========== ===================================
-ESP32    Yes    Yes         `ESP32 Datasheet`_
-ESP32-S2 Yes    Yes         `ESP32-S2 Datasheet`_
-ESP32-C3 Yes    Yes         `ESP32-C3 Datasheet`_
-ESP32-S3 No     No          `ESP32-S3 Datasheet`_
+ESP32    Yes    Yes         `ESP32`_
+ESP32-S2 Yes    Yes         `ESP32-S2`_
+ESP32-C3 Yes    Yes         `ESP32-C3`_
+ESP32-S3 No     Yes         `ESP32-S3`_
 ======== ====== =========== ===================================
 
 See `Boards <boards/boards.html>`_ for more details about ESP32 development boards.
@@ -63,6 +66,20 @@ Supported Operating Systems
 .. |linux-logo| image:: _static/logo_linux.png
 .. |macos-logo| image:: _static/logo_macos.png
 
+Supported IDEs
+---------------------------
+
+Here is the list of supported IDE for Arduino ESP32 support integration.
+
++-------------------+-------------------+
+| |arduino-logo|    | |pio-logo|        |
++-------------------+-------------------+
+| Arduino IDE       | PlatformIO        |
++-------------------+-------------------+
+
+.. |arduino-logo| image:: _static/logo_arduino.png
+.. |pio-logo| image:: _static/logo_pio.png
+
 See `Installing Guides <installing.html>`_ for more details on how to install the Arduino ESP32 support.
 
 Support
@@ -91,7 +108,9 @@ Before opening a new issue, please read this:
 Be sure to search for a similar reported issue. This avoids duplicating or creating noise in the GitHub Issues reporting.
 We also have the troubleshooting guide to save your time on the most common issues reported by users.
 
-For more details, see the `Issue Template <https://github.com/espressif/arduino-esp32/blob/master/docs/ISSUE_TEMPLATE.md>`_.
+For more details about creating new Issue, see the `Issue Template <https://github.com/espressif/arduino-esp32/blob/master/.github/ISSUE_TEMPLATE/Issue-report.yml>`_.
+
+If you have any new idea, see the `Feature request Template <https://github.com/espressif/arduino-esp32/blob/master/.github/ISSUE_TEMPLATE/Feature-request.yml>`_.
 
 First Steps
 -----------
@@ -114,15 +133,14 @@ in the examples menu or inside each library folder.
 
     https://github.com/espressif/arduino-esp32/tree/master/libraries
 
+
+.. include:: common/datasheet.inc
+
 Resources
 ---------
 
 .. _Espressif Systems: https://www.espressif.com 
 .. _Espressif Product Selector: https://products.espressif.com/
-.. _ESP32 Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf
-.. _ESP32-S2 Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf
-.. _ESP32-C3 Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf
-.. _ESP32-S3 Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32-s3_datasheet_en.pdf
 .. _Arduino.cc: https://www.arduino.cc/en/Main/Software
 .. _Arduino Reference: https://www.arduino.cc/reference/en/
 .. _ESP32 Forum: https://esp32.com
diff --git a/docs/source/guides/docs_contributing.rst b/docs/source/guides/docs_contributing.rst
new file mode 100644
index 00000000000..be5a54e4b37
--- /dev/null
+++ b/docs/source/guides/docs_contributing.rst
@@ -0,0 +1,334 @@
+#####################################
+Documentation Contribution Guidelines
+#####################################
+
+Introduction
+------------
+
+This is a guideline for the Arduino ESP32 project documentation. The idea for this guideline is to show how to start collaborating on the project.
+
+The guideline works to give you the directions and to keep the documentation more concise, helping users to better understand the structure.
+
+About Documentation
+-------------------
+
+We all know how important documentation is. This project is no different.
+
+This documentation was created in a collaborative and open way, letting everyone contribute, from a small typo fix to a new chapter writing. We try to motivate our community by giving all the support needed through this guide.
+
+The documentation is in **English only**. Future translations can be added when we finish the essential content in English first.
+
+How to Collaborate
+------------------
+
+Everyone with some knowledge to share is welcome to collaborate.
+
+One thing you need to consider is the fact that your contribution must be concise and assertive since it will be used by people developing projects. The information is very important for everyone, be sure you are not making the developer's life harder!
+
+Documentation Guide
+-------------------
+
+This documentation is based on the `Sphinx`_ with `reStructuredText`_ and hosted by `ReadTheDocs`_.
+
+If you want to get started with `Sphinx`_, see the official documentation:
+
+* `Documentation Index <https://www.sphinx-doc.org/en/master/usage/restructuredtext/index.html>`_
+* `Basics <https://www.sphinx-doc.org/en/master/usage/restructuredtext/basics.html>`_
+* `Directives <https://www.sphinx-doc.org/en/master/usage/restructuredtext/directives.html>`_
+
+First Steps
+***********
+
+Before starting your collaboration, you need to get the documentation source code from the Arduino-ESP32 project.
+
+* **Step 1** - Fork the `Arduino-ESP32`_ to your GitHub account.
+* **Step 2** - Check out the recently created fork.
+* **Step 3** - Create a new branch for the changes/addition to the docs.
+* **Step 4** - Write!
+
+Requirements
+************
+
+To properly work with the documentation, you need to install some packages in your system.
+
+.. code-block::
+
+    pip install -U Sphinx
+    pip install -r requirements.txt
+
+The requirements file is under the ``docs`` folder.
+
+Using Visual Studio Code
+************************
+
+If you are using the Visual Studio Code, you can install some extensions to help you while writing documentation.
+
+`reStructuredText Pack <https://marketplace.visualstudio.com/items?itemName=lextudio.restructuredtext-pack>`_
+
+We also recommend you install to grammar check extension to help you to review English grammar.
+
+`Grammarly <https://marketplace.visualstudio.com/items?itemName=znck.grammarly>`_
+
+Building
+********
+
+To build the documentation and generate the HTLM files, you can use the following command inside the ``docs`` folder. After a successful build, you can check the files inside the `build/html` folder.
+
+.. code-block::
+
+    make html
+
+This step is essential to ensure that there are no syntax errors and also to see the final result.
+
+If everything is ok, you will see some output logs similar to this one:
+
+.. code-block::
+
+    Running Sphinx v2.3.1
+    loading pickled environment... done
+    building [mo]: targets for 0 po files that are out of date
+    building [html]: targets for 35 source files that are out of date
+    updating environment: [extensions changed ('sphinx_tabs.tabs')] 41 added, 3 changed, 0 removed
+    reading sources... [100%] tutorials/tutorials                                                                                                                                                                                                                                                             
+    looking for now-outdated files... none found
+    pickling environment... done
+    checking consistency... done
+    preparing documents... done
+    writing output... [100%] tutorials/tutorials                                                                                                                                                                                                                                                              
+    generating indices...  genindexdone
+    writing additional pages...  searchdone
+    copying images... [100%] tutorials/../_static/tutorials/peripherals/tutorial_peripheral_diagram.png                                                                                                                                                                                                       
+    copying static files... ... done
+    copying extra files... done
+    dumping search index in English (code: en)... done
+    dumping object inventory... done
+    build succeeded.
+
+The HTML pages are in build/html.
+
+Sections
+--------
+
+The Arduino ESP32 is structured in some sections to make it easier to maintain. Here is a brief description of this structure.
+
+API
+***
+
+In this section, you will include all the documentation about drivers, libraries, and any other related to the core.
+
+In this section, we do not add general information. For more general information, we have sections for other related parts, like the FAQ, library builder, troubleshooting, etc.
+
+Boards
+******
+
+Here is the place to add any special guide on the development boards, pin layout, schematics, and any other relevant content.
+
+Common
+******
+
+In this folder, you can add all common information used in several different places. This helps to make documentation easily maintainable.
+
+
+Guides
+******
+
+This is the place to add the guides for common applications, IDEs configuration, and any other information that can be used as a guideline.
+
+Tutorials
+*********
+
+If you want to add a specific tutorial related to the Arduino core for ESP32, this is the place. The intention is not to create a blog or a demo area, but this can be used to add some complex description or to add some more information about APIs.
+
+Images and Assets
+*****************
+
+All the files used on the documentation must be stored in the ``_static`` folder. Be sure that the content used is not with any copyright restriction.
+
+Documentation Rules
+-------------------
+
+Here are some guidelines to help you. We also recommend copying a sample file from the same category you are creating.
+
+This will help you to follow the structure as well as to get inspired.
+
+Basic Structure
+***************
+
+To help you create a new section from scratch, we recommend you include this structure in your content if it applies.
+
+* **About** - Brief description of the document.
+    * Description of the peripheral, driver, protocol, including all different modes and configurations.
+* **API** - Description of each public function, macros, and structs.
+* **Basic Usage**
+* **Example Application**
+
+About Section
+^^^^^^^^^^^^^
+
+In this section, you need to add a brief description of the API. If you are describing a peripheral API, you should explain a little bit about the peripheral and the working modes, if it's applicable.
+
+API Functions
+^^^^^^^^^^^^^
+
+To add a new function description, you must know that the users only have access to the public functions.
+
+
+Here is an example of how to add the function description from `I2C API <https://docs.espressif.com/projects/arduino-esp32/en/latest/api/i2c.html>`_:
+
+.. code-block::
+
+    setPins
+    ^^^^^^^
+
+    This function is used to define the ``SDA`` and ``SCL`` pins. 
+
+    .. note:: Call this function before ``begin`` to change the pins from the default ones.
+
+    .. code-block:: arduino
+
+        bool setPins(int sdaPin, int sclPin);
+
+    * ``sdaPin`` sets the GPIO to be used as the I2C peripheral data line.
+
+    * ``sclPin`` sets the GPIO to be used as the I2C peripheral clock line.
+
+    The default pins may vary from board to board. On the *Generic ESP32* the default I2C pins are:
+
+    * ``sdaPin`` **GPIO21**
+
+    * ``sclPin`` **GPIO22**
+
+    This function will return ``true`` if the peripheral was configured correctly.
+
+Be sure to include a very comprehensive description, add all the parameters in and out, and describe the desired output.
+
+If the function uses a specific structure, you can also describe the structure in the same function block or add a specific section if the structure is shared with other functions.
+
+Basic Usage
+^^^^^^^^^^^
+
+Some APIs are more complex to use or require more steps in order to configure or initialize. If the API is not straightforward in terms of usability, please consider adding a how-to-use section describing all the steps to get the API configured.
+
+Here is an example:
+
+.. code-block::
+
+    Basic Usage
+    ^^^^^^^^^^^
+
+    To start using I2C as slave mode on the Arduino, the first step is to include the ``Wire.h`` header to the sketch.
+
+    .. code-block:: arduino
+
+        #include "Wire.h"
+
+    Before calling ``begin``, you must create two callback functions to handle the communication with the master device.
+
+    .. code-block:: arduino
+
+        Wire.onReceive(onReceive);
+
+    and
+
+    .. code-block:: arduino
+
+        Wire.onRequest(onRequest);
+
+    The ``onReceive`` will handle the request from the ``master`` device upon a slave read request and the ``onRequest`` will handle the answer to the master.
+
+    Now, we can start the peripheral configuration by calling ``begin`` function with the device address.
+
+    .. code-block:: arduino
+
+        Wire.begin((uint8_t)I2C_DEV_ADDR);
+
+    By using ``begin`` without any arguments, all the settings will be done by using the default values. To set the values on your own, see the function description. This function is described here: `i2c begin`_
+
+
+
+Example Application
+^^^^^^^^^^^^^^^^^^^
+It is very important to include at least one application example or a code snippet to help people using the API.
+
+If the API does not have any application example, you can embed the code directly. However, if the example is available, you must include it as a literal block.
+
+.. code-block::
+
+    .. literalinclude:: ../../../libraries/WiFi/examples/WiFiAccessPoint/WiFiAccessPoint.ino
+        :language: arduino
+
+
+Sphinx Basics
+-------------
+
+Heading Levels
+**************
+
+The heading levels used on this documentation are:
+
+* **H1**: - (Dash)
+* **H2**: * (Asterisk)
+* **H3**: ^ (Circumflex)
+* **H4**: # (Sharp)
+
+Code Block
+**********
+
+To add a code block, you can use the following structure:
+
+.. code-block::
+
+    .. code-block:: arduino
+        bool begin(); //Code example
+
+Links
+*****
+
+To include links to external content, you can use two ways.
+
+* First option:
+
+.. code-block::
+
+    `Arduino Wire Library`_
+
+    _Arduino Wire Library: https://www.arduino.cc/en/reference/wire
+
+* Second option:
+
+.. code-block::
+
+    `Arduino Wire Library <https://www.arduino.cc/en/reference/wire>`_
+
+Images
+******
+
+To include images in the docs, first, add all the files into the ``_static`` folder with a filename that makes sense for the topic.
+
+After that, you can use the following structure to include the image in the docs.
+
+.. code-block::
+
+    .. figure:: ../_static/arduino_i2c_master.png
+        :align: center
+        :width: 720
+        :figclass: align-center
+
+You can adjust the ``width`` according to the image size.
+
+Be sure the file size does not exceed 600kB.
+
+Support
+*******
+
+If you need support on the documentation, you can ask a question in the discussion `here <https://github.com/espressif/arduino-esp32/discussions>`_.
+
+Additional Guidelines
+---------------------
+
+If you want to contribute with code on the Arduino ESP32 core, be sure to follow the `ESP-IDF Documenting Code <https://docs.espressif.com/projects/esp-idf/en/latest/esp32/contribute/documenting-code.html>`_ as a reference.
+
+.. _Arduino-ESP32: https://github.com/espressif/arduino-esp32
+.. _Sphinx: https://www.sphinx-doc.org/en/master/
+.. _ReadTheDocs: https://readthedocs.org/
+.. _reStructuredText: https://docutils.sourceforge.io/rst.html
diff --git a/docs/source/guides/guides.rst b/docs/source/guides/guides.rst
new file mode 100644
index 00000000000..4aa538a7e22
--- /dev/null
+++ b/docs/source/guides/guides.rst
@@ -0,0 +1,10 @@
+######
+Guides
+######
+
+.. toctree::
+    :caption: Guides:
+    :maxdepth: 1
+    :glob:
+
+    *
diff --git a/docs/source/guides/tools_menu.rst b/docs/source/guides/tools_menu.rst
new file mode 100644
index 00000000000..432511c191e
--- /dev/null
+++ b/docs/source/guides/tools_menu.rst
@@ -0,0 +1,248 @@
+######################
+Arduino IDE Tools Menu
+######################
+
+Introduction
+------------
+
+This guide is a walkthrough of the Arduino IDE configuration menu for the ESP32 System on Chip (SoC's). In this guide, you will see the most relevant configuration
+to get your project optimized and working.
+
+Since some boards and SoC's may vary in terms of hardware configuration, be sure you know all the board characteristics that you are using, like flash memory size, SoC variant (ESP32 family), PSRAM, etc.
+
+.. note:: To help you identify the characteristics, you can see the `Espressif Product Selector`_.
+
+Arduino IDE
+-----------
+
+The Arduino IDE is widely used for ESP32 on Arduino development and offers a wide variety of configurations.
+
+Tools Menu
+----------
+
+To properly configure your project build and flash, some settings must be done in order to get it compiled and flashed without any issues.
+Some boards are natively supported and almost no configuration is required. However, if your is not yet supported or you have a custom board, you need to configure the environment by yourself.
+
+For more details or to add a new board, see the `boards.txt`_ file.
+
+Generic Options
+---------------
+
+Most of the options are available for every ESP32 family. Some options will be available only for specific targets, like the USB configuration.
+
+Board
+*****
+
+This option is the target board and must be selected in order to get all the default configuration settings. Once you select the correct board, you will see that some configurations will be automatically selected, but be aware that some boards can have multiple versions (i.e different flash sizes).
+
+To select the board, go to ``Tools -> Board -> ESP32 Arduino`` and select the target board.
+
+If your board is not present on this list, you can select the generic ``ESP32-XX Dev Module``.
+
+Currently, we have one generic development module for each of the supported targets.
+
+If the board selected belongs to another SoC family, you will see the following information at the build output:
+
+    ``A fatal error occurred: This chip is ESP32 not ESP32-S2. Wrong --chip argument?``
+
+Upload Speed
+************
+
+To select the flashing speed, change the ``Tools -> Upload Speed``. This value will be used for flashing the code to the device.
+
+.. note:: If you have issues while flashing the device at high speed, try to decrease this value. This could be due to the external serial-to-USB chip limitations.
+
+CPU Frequency
+*************
+
+On this option, you can select the CPU clock frequency. This option is critical and must be selected according to the high-frequency crystal present on the board and the radio usage (Wi-Fi and Bluetooth).
+
+In some applications, reducing the CPU clock frequency is recommended in order to reduce power consumption.
+
+If you don't know why you should change this frequency, leave the default option.
+
+Flash Frequency
+***************
+
+Use this function to select the flash memory frequency. The frequency will be dependent on the memory model.
+
+* **40MHz**
+* **80MHz**
+
+If you don't know if your memory supports **80Mhz**, you can try to upload the sketch using the **80MHz** option and watch the log output via the serial monitor.
+
+.. note:: In some boards/SoC, the flash frequency is automatically selected according to the flash mode. In some cases (i.e ESP32-S3), the flash frequency is up to 120MHz.
+
+Flash Mode
+**********
+
+This option is used to select the SPI communication mode with the flash memory.
+
+Depending on the application, this mode can be changed in order to increase the flash communication speed.
+
+* **QIO** - Quad I/O Fast Read
+    * Four SPI pins are used to write to the flash and to read from the flash.
+
+* **DIO** - Dual I/O Fast Read
+    * Two SPI pins are used to write to the flash and to read from the flash.
+
+* **QOUT** - Quad Output Fast Read
+    * Four SPI pins are used to read the flash data.
+
+* **DOUT** - Dual Output Fast Read
+    * Two SPI pins are used to read flash data.
+
+* **OPI** - Octal I/O
+    * Eight SPI pins are used to write and to read from the flash.
+
+If you don't know how the board flash is physically connected or the flash memory model, try the **QIO** at **80MHz** first.
+
+Flash Size
+**********
+
+This option is used to select the flash size. The flash size should be selected according to the flash model used on your board.
+
+* **2MB** (16Mb)
+* **4MB** (32Mb)
+* **8MB** (64Mb)
+* **16MB** (128Mb)
+
+If you choose the wrong size, you may have issues when selecting the partition scheme.
+
+Embedded Flash
+^^^^^^^^^^^^^^
+
+Some SoC has embedded flash. The ESP32-S3 is a good example.
+
+.. note:: Check the manufacturer part number of your SoC/module to see the right version.
+
+Example: **ESP32-S3FH4R2**
+
+This particular ESP32-S3 variant comes with 4MB Flash and 2MB PSRAM.
+
+**Options for Embedded Flash**
+
+* **Fx4** 4MB Flash (*QIO*)
+* **Fx8** 8MB Flash (*QIO*)
+* **V** 1.8V SPI
+
+The **x** stands for the temperature range specification.
+
+* **H** High Temperature (*-40 to 85ºC*)
+* **N** Low Temeprature (*-40 to 65ºC*)
+
+For more details, please see the corresponding datasheet at `Espressif Product Selector`_.
+
+Partition Scheme
+****************
+
+This option is used to select the partition model according to the flash size and the resources needed, like storage area and OTA (Over The Air updates).
+
+.. note:: Be careful selecting the right partition according to the flash size. If you select the wrong partition, the system will crash.
+
+Core Debug Level
+****************
+
+This option is used to select the Arduino core debugging level to be printed to the serial debug.
+
+* **None** - Prints nothing.
+* **Error** - Only at error level.
+* **Warning** - Only at warning level and above.
+* **Info** - Only at info level and above.
+* **Debug** - Only at debug level and above.
+* **Verbose** - Prints everything.
+
+PSRAM
+*****
+
+The PSRAM is an internal or external extended RAM present on some boards, modules or SoC.
+
+This option can be used to ``Enable`` or ``Disable`` PSRAM. In some SoCs, you can select the PSRAM mode as the following.
+
+* **QSPI PSRAM** - Quad PSRAM
+* **OPI PSRAM** - Octal PSRAM
+
+Embedded PSRAM
+^^^^^^^^^^^^^^
+
+Some SoC has embedded PSRAM. The ESP32-S3 is a good example.
+
+Example: **ESP32-S3FH4R2**
+
+This particular ESP32-S3 comes with 4MB Flash and 2MB PSRAM.
+
+**Options for Embedded Flash and PSRAM**
+
+* **R2** 2MB PSRAM (*QSPI*)
+* **R8** 8MB PSRAM (*OPI*)
+* **V** 1.8V SPI
+
+The **x** stands for the temperature range specification.
+
+* **H** High Temperature (*-40 to 85ºC*)
+* **N** Low Temeprature (*-40 to 65ºC*)
+
+For more details, please see the corresponding datasheet at `Espressif Product Selector`_.
+
+Arduino Runs On
+***************
+
+This function is used to select the core that runs the Arduino core. This is only valid if the target SoC has 2 cores.
+
+When you have some heavy task running, you might want to run this task on a different core than the Arduino tasks. For this reason, you have this configuration to select the right core.
+
+Events Run On
+*************
+
+This function is also used to select the core that runs the Arduino events. This is only valid if the target SoC has 2 cores.
+
+Port
+****
+
+This option is used to select the serial port to be used on the flashing and monitor.
+
+USB Options
+-----------
+
+Some ESP32 families have a USB peripheral. This peripheral can be used for flashing and debugging.
+
+To see the supported list for each SoC, see this section: `Libraries <../libraries.html>`_.
+
+The USB option will be available only if the correct target is selected.
+
+USB CDC On Boot
+***************
+
+The USB Communications Device Class, or USB CDC, is a class used for basic communication to be used as a regular serial controller (like RS-232).
+
+This class is used for flashing the device without any other external device attached to the SoC.
+
+This option can be used to ``Enable`` or ``Disable`` this function at the boot. If this option is ``Enabled``, once the device is connected via USB, one new serial port will appear in the list of the serial ports.
+Use this new serial port for flashing the device.
+
+This option can be used as well for debugging via the ``Serial Monitor`` using **CDC** instead of the **UART0**.
+
+To use the UART as serial output, you can use ``Serial0.print("Hello World!");`` instead of ``Serial.print("Hello World!");`` which will be printed using USB CDC.
+
+USB Firmware MSC On Boot
+************************
+
+The USB Mass Storage Class, or USB MSC, is a class used for storage devices, like a USB flash drive.
+
+This option can be used to ``Enable`` or ``Disable`` this function at the boot. If this option is ``Enabled``, once the device is connected via USB, one new storage device will appear in the system as a storage drive.
+Use this new storage drive to write and read files or to drop a new firmware binary to flash the device.
+
+.. figure:: ../_static/usb_msc_drive.png
+    :align: center
+    :width: 720
+    :figclass: align-center
+
+USB DFU On Boot
+***************
+
+The USB Device Firmware Upgrade is a class used for flashing the device through USB.
+
+This option can be used to ``Enable`` or ``Disable`` this function at the boot. If this option is ``Enabled``, once the device is connected via USB, the device will appear as a USB DFU capable device.
+
+.. _Espressif Product Selector: https://products.espressif.com/
+.. _boards.txt: https://github.com/espressif/arduino-esp32/blob/master/boards.txt
diff --git a/docs/source/index.rst b/docs/source/index.rst
index 60d39d8442a..48f30396270 100644
--- a/docs/source/index.rst
+++ b/docs/source/index.rst
@@ -8,11 +8,12 @@ Here you will find all the relevant information about the project.
    This is a work in progress documentation and we will appreciate your help! We are looking for contributors! 
 
 .. toctree::
-   :maxdepth: 2
+   :maxdepth: 1
    :caption: Contents:
 
    Getting Started <getting_started>
    Libraries <libraries>
+   Guides <guides/guides>
    Tutorials <tutorials/tutorials>
    Advanced Utilities <advanced_utils>
    FAQ <faq>
diff --git a/docs/source/installing.rst b/docs/source/installing.rst
index 59028fcbf1b..6120973fb87 100644
--- a/docs/source/installing.rst
+++ b/docs/source/installing.rst
@@ -7,16 +7,21 @@ This guide will show how to install the Arduino-ESP32 support.
 Before Installing
 -----------------
 
-We recommend you install the support using the Boards Manager, but other options are available depending on your operating system. 
+We recommend you install the support using your favorite IDE, but other options are available depending on your operating system. 
 To install Arduino-ESP32 support, you can use one of the following options.
 
-Installing using Boards Manager
--------------------------------
+Installing using Arduino IDE
+----------------------------
 
-This is the preferred and easiest way to install Arduino-ESP32.
+.. figure:: _static/logo_arduino.png
+   :align: center
+   :width: 200
+   :figclass: align-center
+
+This is the way to install Arduino-ESP32 directly from the Arduino IDE.
 
 .. note::
-   Currently, the support for new chips (ESP32-S2 and ESP32-C3) is in the development release. Consider installing the development release if you need to test the new supported SoC in beta.
+   For overview of SoC's support, take a look on `Supported Soc's table <https://docs.espressif.com/projects/arduino-esp32/en/latest/getting_started.html#supported-soc-s>`_ where you can find if the particular chip is under stable or development release.
 
 - Stable release link::
 
@@ -58,8 +63,92 @@ To start the installation process using the Boards Managaer, follow these steps:
 
 - Restart Arduino IDE.
 
-Windows
--------
+Installing using PlatformIO
+---------------------------
+
+.. figure:: _static/logo_pio.png
+   :align: center
+   :width: 200
+   :figclass: align-center
+
+PlatformIO is a professional collaborative platform for embedded development. It has out-of-the-box support for ESP32 SoCs and allows working with Arduino ESP32 as well as ESP-IDF from Espressif without changing your development environment. PlatformIO includes lots of instruments for the most common development tasks such as debugging, unit testing, and static code analysis.
+
+A detailed overview of the PlatformIO ecosystem and its philosophy can be found in `the official documentation <https://docs.platformio.org/en/latest/core/index.html>`_.
+
+PlatformIO can be used in two flavors:
+
+- `PlatformIO IDE <https://platformio.org/platformio-ide>`_ is a toolset for embedded C/C++ development available on Windows, macOS and Linux platforms
+
+- `PlatformIO Core (CLI) <https://docs.platformio.org/en/latest/core/index.html>`_ is a command-line tool that consists of a multi-platform build system, platform and library managers and other integration components. It can be used with a variety of code development environments and allows integration with cloud platforms and web services
+
+To install PlatformIO, you can follow this Getting Started, provided at `docs.platformio.org`_.
+
+Using the stable code
+*********************
+
+.. note::
+   A detailed overview of supported development boards, examples and frameworks can be found on `the official Espressif32 dev-platform page <https://registry.platformio.org/platforms/platformio/espressif32>`_ in the PlatformIO Registry.
+
+The most reliable and easiest way to get started is to use the latest stable version of the ESP32 development platform that passed all tests/verifications and can be used in production.
+
+Create a new project and select one of the available boards. You can change after by changing the `platformio.ini <https://docs.platformio.org/en/latest/projectconf/index.html>`_ file.
+
+- For ESP32
+
+.. code-block:: bash
+
+   [env:esp32dev]
+   platform = espressif32
+   board = esp32dev
+   framework = arduino
+
+- For ESP32-S2 (ESP32-S2-Saola-1 board)
+
+.. code-block:: bash
+
+   [env:esp32-s2-saola-1]
+   platform = espressif32
+   board = esp32-s2-saola-1
+   framework = arduino
+
+- For ESP32-C3 (ESP32-C3-DevKitM-1 board)
+
+.. code-block:: bash
+
+   [env:esp32-c3-devkitm-1]
+   platform = espressif32
+   board = esp32-c3-devkitm-1
+   framework = arduino
+
+How to update to the latest code
+********************************
+
+To test the latest Arduino ESP32, you need to change your project *platformio.ini* accordingly.
+The following configuration uses the upstream version of the Espressif development platform and the latest Arduino core directly from the Espressif GitHub repository:
+
+.. code-block:: bash
+
+   [env:esp32-c3-devkitm-1]
+   platform = https://github.com/platformio/platform-espressif32.git
+   board = esp32-c3-devkitm-1
+   framework = arduino
+   platform_packages =
+       framework-arduinoespressif32 @ https://github.com/espressif/arduino-esp32#master
+
+
+To get more information about PlatformIO, see the following links:
+
+- `PlatformIO Core (CLI) <https://docs.platformio.org/en/latest/core/index.html>`_
+
+- `PlatformIO Home <https://docs.platformio.org/en/latest/home/index.html>`_
+
+- `Tutorials and Examples <https://docs.platformio.org/en/latest/tutorials/index.html>`_
+
+- `Library Management <https://docs.platformio.org/en/latest/librarymanager/index.html>`_
+
+
+Windows (manual installation)
+-----------------------------
 
 .. warning:: Arduino ESP32 core v2.x.x cannot be used on Windows 8.x x86 (32 bits), Windows 7 or earlier. The Windows 32 bits OS is no longer supported by this toolchain.
 
@@ -150,6 +239,11 @@ How to update to the latest code
 Linux
 -----
 
+.. figure:: _static/logo_linux.png
+   :align: center
+   :width: 200
+   :figclass: align-center
+
 Debian/Ubuntu
 *************
 
@@ -263,20 +357,5 @@ Where ``~/Documents/Arduino`` represents your sketch book location as per "Ardui
 
 - Restart Arduino IDE.
 
-PlatformIO
-----------
-
-- `What is PlatformIO? <https://docs.platformio.org/en/latest/what-is-platformio.html?utm_source=github&utm_medium=arduino-esp32>`_
-
-- `PlatformIO IDE <https://platformio.org/platformio-ide?utm_source=github&utm_medium=arduino-esp32>`_
-
-- `PlatformIO Core <https://docs.platformio.org/en/latest/core.html?utm_source=github&utm_medium=arduino-esp32>`_
-
-- `Advanced usage <https://docs.platformio.org/en/latest/platforms/espressif32.html?utm_source=github&utm_medium=arduino-esp32>`_: Custom settings, uploading to SPIFFS, Over-the-Air (OTA), staging version
-
-- `Integration with Cloud and Standalone IDEs <https://docs.platformio.org/en/latest/ide.html?utm_source=github&utm_medium=arduino-esp32>`_: Cloud9, Codeanywhere, Eclipse Che (Codenvy), Atom, CLion, Eclipse, Emacs, NetBeans, Qt Creator, Sublime Text, VIM, Visual Studio, and VSCode
-
-- `Project Examples <https://docs.platformio.org/en/latest/platforms/espressif32.html?utm_source=github&utm_medium=arduino-esp32#examples>`_
-
-
 .. _Arduino.cc: https://www.arduino.cc/en/Main/Software
+.. _docs.platformio.org: https://docs.platformio.org/en/latest/integration/ide/pioide.html
diff --git a/docs/source/lib_builder.rst b/docs/source/lib_builder.rst
index e9a270362d2..5c62aafe55d 100644
--- a/docs/source/lib_builder.rst
+++ b/docs/source/lib_builder.rst
@@ -2,37 +2,178 @@
 Library Builder
 ###############
 
-How to Use Library Builder
---------------------------
+About
+-----
 
-Espressif has provided a `tool <https://github.com/espressif/esp32-arduino-lib-builder>`_ to simplify building your own compiled libraries for use in Arduino IDE (or your favorite IDE).
-To generate custom libraries, follow these steps:
+Espressif provides a `tool <https://github.com/espressif/esp32-arduino-lib-builder>`_ to simplify building your own compiled libraries for use in Arduino IDE (or your favorite IDE).
 
+This tool can be used to change the project or a specific configuration according to your needs.
 
-- Step 1 - Clone the ESP32 Arduino lib builder::
+Installing
+----------
+
+To install the Library Builder into your environment, please, follow the instructions below.
+
+- Clone the ESP32 Arduino lib builder:
+
+.. code-block:: bash
 
     git clone https://github.com/espressif/esp32-arduino-lib-builder
 
-- Step 2 - Go to the ``esp32-arduino-lib-builder`` folder::
+- Go to the ``esp32-arduino-lib-builder`` folder:
+
+.. code-block:: bash
 
     cd esp32-arduino-lib-builder
 
-- Step 3 - Run the ``update-components`` script::
+- Build:
+
+.. code-block:: bash
+
+    ./build.sh
+
+If everything works, you may see the following message: ``Successfully created esp32 image.``
+
+Dependencies
+************
+
+To build the library you will need to install some dependencies. Maybe you already have installed it, but it is a good idea to check before building.
+
+- Install all dependencies (**Ubuntu**):
+
+.. code-block:: bash
+
+    sudo apt-get install git wget curl libssl-dev libncurses-dev flex bison gperf cmake ninja-build ccache jq
+
+- Install Python and upgrade pip:
+
+.. code-block:: bash
+
+    sudo apt-get install python3
+    sudo pip install --upgrade pip
+
+- Install all required packages:
+
+.. code-block:: bash
+
+    pip install --user setuptools pyserial click cryptography future pyparsing pyelftools
+
+Building
+--------
+
+If you have all the dependencies met, it is time to build the libraries.
+
+To build using the default configuration:
+
+.. code-block:: bash
+
+    ./build.sh
+
+Custom Build
+************
+
+There are some options to help you create custom libraries. You can use the following options:
+
+Usage
+^^^^^
+
+.. code-block:: bash
+
+    build.sh [-s] [-A arduino_branch] [-I idf_branch] [-i idf_commit] [-c path] [-t <target>] [-b <build|menuconfig|idf_libs|copy_bootloader|mem_variant>] [config ...]
+
+Skip Install/Update
+^^^^^^^^^^^^^^^^^^^
+
+Skip installing/updating of ESP-IDF and all components
+
+.. code-block:: bash
+
+    ./build.sh -s
+
+This option can be used if you already have the ESP-IDF and all components already in your environment.
+
+Set Arduino-ESP32 Branch
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+Set which branch of arduino-esp32 to be used for compilation
+
+.. code-block:: bash
+
+    ./build.sh -A <arduino_branch>
+
+Set ESP-IDF Branch
+^^^^^^^^^^^^^^^^^^
+
+Set which branch of ESP-IDF is to be used for compilation
+
+.. code-block:: bash
+
+    ./build.sh -I <idf_branch>
+
+Set the ESP-IDF Commit
+^^^^^^^^^^^^^^^^^^^^^^
+
+Set which commit of ESP-IDF to be used for compilation
+
+.. code-block:: bash
+
+    ./build.sh -i <idf_commit>
+
+Deploy
+^^^^^^
+
+Deploy the build to github arduino-esp32
+
+.. code-block:: bash
+
+    ./build.sh -d
+
+Set the Arduino-ESP32 Destination Folder
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Set the arduino-esp32 folder to copy the result to. ex. '$HOME/Arduino/hardware/espressif/esp32'
+
+.. code-block:: bash
+
+    ./build.sh -c <path>
+
+This function is used to copy the compiled libraries to the Arduino folder.
+
+Set the Target
+^^^^^^^^^^^^^^
+
+Set the build target(chip). ex. 'esp32s3'
+
+.. code-block:: bash
+
+    ./build.sh -t <target>
+
+This build command will build for the ESP32-S3 target. You can specify other targets.
+
+* esp32
+* esp32s2
+* esp32c3
+* esp32s3
+
+Set Build Type
+^^^^^^^^^^^^^^
+
+Set the build type. ex. 'build' to build the project and prepare for uploading to a board.
+
+.. note:: This command depends on the ``-t`` argument.
 
-    ./tools/update-components.sh`
+.. code-block:: bash
 
-- Step 4 - Run ``install-esp-idf`` installation script (if you already have an ``$IDF_PATH`` defined, it will use your local copy of the repository)::
+    ./build.sh -t esp32 -b <build|menuconfig|idf_libs|copy_bootloader|mem_variant>
 
-    ./tools/install-esp-idf.sh
+Additional Configuration
+^^^^^^^^^^^^^^^^^^^^^^^^
 
-- Step 5 - Copy the configuration (recommended) or directly edit sdkconfig using ``idf.py menuconfig``::
+Specify additional configs to be applied. ex. 'qio 80m' to compile for QIO Flash@80MHz. Requires -b
 
-    cp sdkconfig.esp32s2 sdkconfig
+.. note:: This command requires the ``-b`` to work properly.
 
-- Step 6 - Build::
 
-    idf.py build
+.. code-block:: bash
 
-The script automates the process of building `Arduino as an ESP-IDF component <https://github.com/espressif/arduino-esp32/blob/master/docs/esp-idf_component.md>`_.
-Once it is complete, you can cherry pick the needed libraries from ``out/tools/sdk/lib``, or run ``tools/copy-to-arduino.sh`` to copy the entire built system.
-``tools/config.sh`` contains a number of variables that control the process, particularly the ``$IDF_BRANCH`` variable.  You can adjust this to try building against newer versions, but there are absolutely no guarantees that any components will work or even successfully compile against a newer IDF.
+    ./build.sh -t esp32 -b idf_libs qio 80m
diff --git a/docs/source/libraries.rst b/docs/source/libraries.rst
index 12dd8cfd37f..d9febb08a1a 100644
--- a/docs/source/libraries.rst
+++ b/docs/source/libraries.rst
@@ -28,7 +28,7 @@ Currently, the Arduino ESP32 supports the following peripherals with Arduino API
 +---------------+---------------+---------------+---------------+-------------------------------+
 | I2C           | Yes           | Yes           | Yes           |                               |
 +---------------+---------------+---------------+---------------+-------------------------------+
-| I2S           | No            | No            | No            | WIP                           |
+| I2S           | Yes           | No            | No            | WIP                           |
 +---------------+---------------+---------------+---------------+-------------------------------+
 | LEDC          | Yes           | Yes           | Yes           |                               |
 +---------------+---------------+---------------+---------------+-------------------------------+
@@ -64,12 +64,7 @@ Notes
 
 .. note:: Some peripherals are not available for all ESP32 families. To see more details about it, see the corresponding SoC at `Product Selector <https://products.espressif.com>`_ page.
 
-Datasheet
-^^^^^^^^^
-
-* `ESP32 <https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf>`_
-* `ESP32-S2 <https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf>`_
-* `ESP32-C3 <https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf>`_
+.. include:: common/datasheet.inc
 
 APIs
 ----
@@ -78,13 +73,6 @@ The Arduino ESP32 offers some unique APIs, described in this section:
 
 .. toctree::
     :maxdepth: 1
-
-    Bluetooth <api/bluetooth>
-    Deep Sleep <api/deepsleep>
-    ESPNOW <api/espnow>
-    GPIO <api/gpio>
-    I2C <api/i2c>
-    RainMaker <api/rainmaker>
-    Reset Reason <api/reset_reason>
-    USB <api/usb.rst>
-    Wi-Fi <api/wifi>
+    :glob:
+    
+    api/*
diff --git a/docs/source/tutorials/io_mux.rst b/docs/source/tutorials/io_mux.rst
index 547be0e184b..8bdbb0799c3 100644
--- a/docs/source/tutorials/io_mux.rst
+++ b/docs/source/tutorials/io_mux.rst
@@ -62,7 +62,7 @@ JTAG                            Dedicated GPIOs
 SD/SDIO/MMC HostController      Dedicated GPIOs
 Motor PWM                       Any GPIO
 SDIO/SPI SlaveController        Dedicated GPIOs
-UART                            Any GPIO
+UART                            Any GPIO[1]
 I2C                             Any GPIO
 I2S                             Any GPIO
 LED PWM                         Any GPIO
@@ -72,8 +72,11 @@ Parallel QSPI                   Dedicated GPIOs
 EMAC                            Dedicated GPIOs
 Pulse Counter                   Any GPIO
 TWAI                            Any GPIO
+USB                             Dedicated GPIOs
 ==============================  ===================================
 
+[1] except for the download/programming mode decided by the bootloader.
+
 This table is present on each datasheet provided by Espressif.
 
 Usage Examples
@@ -106,16 +109,11 @@ To change the pins, we must call the ``Wire.setPins(int sda, int scl);`` functio
 
 A similar approach also applies for the other peripherals.
 
+.. include:: ../common/datasheet.inc
+
 Resources
 ---------
 
-* `ESP32`_ (Datasheet)
-* `ESP32-S2`_ (Datasheet)
-* `ESP32-C3`_ (Datasheet)
-
 .. _Espressif Systems: https://www.espressif.com 
 .. _Espressif Product Selector: https://products.espressif.com/
-.. _ESP32: https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf
-.. _ESP32-S2: https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf
-.. _ESP32-C3: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf
 .. _IO MUX GPIO: https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf#iomuxgpio
diff --git a/docs/source/tutorials/preferences.rst b/docs/source/tutorials/preferences.rst
new file mode 100644
index 00000000000..eb0397af543
--- /dev/null
+++ b/docs/source/tutorials/preferences.rst
@@ -0,0 +1,697 @@
+###########
+Preferences
+###########
+
+
+Introduction
+------------
+
+The Preferences library is unique to arduino-esp32. It should be considered as the replacement for the Arduino EEPROM library.
+
+It uses a portion of the on-board non-volatile memory (NVS) of the ESP32 to store data. This data is retained across restarts and loss of power events to the system. 
+
+Preferences works best for storing many small values, rather than a few large values. If you need to store large amounts of data, consider using a file system library such as LitteFS.
+
+The Preferences library is usable by all ESP32 variants.
+
+
+Preferences Attributes
+----------------------
+
+Preferences data is stored in NVS in sections called a "``namespace``". Within each namespace are a set of ``key-value`` pairs. The "``key``" is the name of the data item and the "``value``" is, well, the value of that piece of data. Kind of like variables. The key is the name of the variable and the value is its value. Like variables, a ``key-value`` pair has a data type.
+
+Multiple namespaces are permitted within NVS. The name of each namespace must be unique. The keys within that namespace are unique to that namespace. Meaning the same key name can be used in multiple namespaces without conflict.
+
+Namespace and key names are case sensitive.
+
+Each key name must be unique within a namespace.
+
+Namespace and key names are character strings and are limited to a maximum of 15 characters.
+
+Only one namespace can be open (in use) at a time.
+
+
+Library Overview
+----------------
+
+Library methods are provided to:
+   - create a namespace;
+   - open and close a namespace;
+   - store and retrieve data within a namespace for supported data types;
+   - determine if a key value has been initialized;
+   - delete a ``key-value`` pair;
+   - delete all ``key-value`` pairs in a namespace;
+   - determine data types stored against a key;
+   - determine the number of key entries available in the namespace.
+
+Preferences directly suports the following data types:
+
+.. table:: **Table 1 — Preferences Types**
+   :align: center
+   
+   +-------------------+-------------------+---------------+
+   | Preferences Type  | Data Type         | Size (bytes)  |
+   +===================+===================+===============+
+   | Bool              | bool              | 1             |
+   +-------------------+-------------------+---------------+
+   | Char              | int8_t            | 1             |
+   +-------------------+-------------------+---------------+
+   | UChar             | uint8_t           | 1             |
+   +-------------------+-------------------+---------------+
+   | Short             | int16_t           | 2             |
+   +-------------------+-------------------+---------------+
+   | UShort            | uint16_t          | 2             |
+   +-------------------+-------------------+---------------+
+   | Int               | int32_t           | 4             |
+   +-------------------+-------------------+---------------+
+   | UInt              | uint32_t          | 4             |
+   +-------------------+-------------------+---------------+
+   | Long              | int32_t           | 4             |
+   +-------------------+-------------------+---------------+
+   | ULong             | uint32_t          | 4             |
+   +-------------------+-------------------+---------------+
+   | Long64            | int64_t           | 8             |
+   +-------------------+-------------------+---------------+
+   | ULong64           | uint64_t          | 8             |
+   +-------------------+-------------------+---------------+
+   | Float             | float_t           | 8             |
+   +-------------------+-------------------+---------------+
+   | Double            | double_t          | 8             |
+   +-------------------+-------------------+---------------+
+   |                   | const char*       |               |
+   | String            +-------------------+ variable      |
+   |                   | String            |               |
+   +-------------------+-------------------+---------------+
+   | Bytes             | uint8_t           | variable      |
+   +-------------------+-------------------+---------------+
+
+String values can be stored and retrieved either as an Arduino String or as a null terminated ``char`` array (C-string).
+
+Bytes type is used for storing and retrieving an arbitrary number of bytes in a namespace.
+
+
+Workflow
+--------
+
+Preferences workflow, once everything is initialized, is pretty simple.
+
+To store a value:
+   -  Open the namespace in read-write mode.
+   -  Put the value into the key.
+   -  Close the namespace.
+
+To retrieve a value:
+   -  Open the namespace in read-only mode.
+   -  Use the key to get the value.
+   -  Close the namespace.
+
+*(Technically, you can retrieve a value if the namespace is open in either read-only or read-write mode but it's good practice to open the namespace in read-only mode if you are only retrieving values.)*
+
+When storing information, a "``put[PreferencesType]``" method referenced to its key is used. 
+
+When retrieving information a "``get[PreferencesType]``" method referenced to its key is used.
+
+Ensuring that the data types of your “``get``'s” and “``put``'s” all match, you’re good to go.
+
+The nuance is in initializing everything at the start.
+
+Before you can store or retrieve anything using Preferences, both the namespace and the key within that namespace need to exist. So the workflow is:
+
+#. Create or open the namespace.
+#. Test for the existence of a key that should exist if the namespace has been initialized.
+#. If that key does not exist, create the key(s).
+#. Carry on with the rest of your sketch where data can now be stored and retrieved from the namespace.
+
+Each step is discussed below.
+
+.. note::
+
+   From here on when referring in general to a method used to store or retrieve data we'll use the shorthand "``putX``" and "``getX``" where the "``X``" is understood to be a Preferences Type; Bool, UInt, Char, and so on from the Preferences Types table above.
+
+..
+
+ 
+Create or Open the Namespace
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+In your sketch, first insert a declaration of a ``Preferences`` object by including a line like;
+
+.. code-block:: arduino
+
+   Preferences mySketchPrefs;    // "mySketchPrefs" is the name of the Preferences object.
+                                 //  Can be whatever you want.
+   
+This object is used with the Preferences methods to access the namespace and the key-value pairs it contains.
+
+A namespace is made available for use with the ``.begin`` method:
+
+.. code-block:: arduino
+
+  mySketchPrefs.begin("myPrefs", false)
+
+If the namespace does not yet exist, this will create and then open the namespace ``myPrefs``.
+
+If the namespace already exists, this will open the namespace ``myPrefs``.
+
+If the second argument is ``false`` the namespace is opened in read-write (RW) mode — values can be stored in to and retrieved from the namespace. If it is ``true`` the namespace is opened in read-only (RO) mode — values can be retrieved from the namespace but nothing can be stored.
+
+
+Test for Initial Existence of Your Key(s)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+When the ESP32 boots, there is no inherent way to know if this is the very first time it has ever powered on or if it is a subsequent launch and it has run its sketch before. We can use Preferences to store information that is retained across reboots that we can read, and based on that, decide if this is a first-time run and take the required actions if so.
+
+We do this by testing for the existence of a certain key within a namespace. If that key exists, it is safe to assume the key was created during the first-time run of the sketch and so the namespace has already been initialized.
+
+To determine if a key exists, use:
+
+.. code-block:: arduino
+
+   isKey("myTestKey")
+
+This returns ``true`` if  ``"myTestKey"`` exists in the namespace, and ``false`` if it does not.
+
+By example, consider this code segment:
+
+.. code-block:: arduino
+
+   Preferences mySketchPrefs;
+   String doesExist;
+
+   mySketchPrefs.begin("myPrefs", false);   // open (or create and then open if it does not 
+                                            //  yet exist) the namespace "myPrefs" in RW mode.
+   
+   bool doesExist = mySketchPrefs.isKey("myTestKey");
+   
+   if (doesExist == false) {
+       /* 
+          If doesExist is false, we will need to create our
+           namespace key(s) and store a value into them.
+      */    
+       
+      // Insert your "first time run" code to create your keys & assign their values below here.
+   }
+   else {
+      /* 
+          If doesExist is true, the key(s) we need have been created before
+           and so we can access their values as needed during startup.
+      */
+      
+      // Insert your "we've been here before" startup code below here.
+   }
+
+
+
+Creating Namespace Keys and Storing Values
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+To create a key, we use one of the  ``.putX`` methods, matching ``"X"`` to the Preferences Type of the data we wish to store:
+
+.. code-block:: arduino
+
+   myPreferences.putX("myKeyName", value)
+
+If ``"myKeyName"`` does not exist in the namespace, it is first created and then ``value`` is stored against that keyname. The namespace must be open in RW mode to do this. Note that ``value`` is not optional and must be provided with every "``.putX``" statement. Thus every key within a namespace will always hold a valid value.
+
+An example is:
+
+.. code-block:: arduino
+
+   myPreferences.putFloat("pi", 3.14159265359);    // stores an float_t data type 
+                                                   //  against the key "pi".
+
+Reading Values From a Namespace
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Once a key exists in a namespace and the namespace is open, its value is retrieved using one of the ``getX`` methods, matching ``"X"`` to the type of data stored against that key.
+
+.. code-block:: arduino
+
+   myPreferences.getX("myKeyName")
+
+Like so:
+
+.. code-block:: arduino
+
+   String myString = myPreferences.getString("myStringKey");
+
+This will retrieve the String value from the namespace key ``"myStringKey"`` and assign it to the String type variable ``myString``. 
+
+
+Summary
+~~~~~~~
+
+So the basics of using Preferences are:
+
+   #. You cannot store into or retrieve from a ``key-value`` pair until a namespace is created and opened and the key exists in that namespace.
+   
+   #. If the key already exists, it was created the first time the sketch was run.
+
+   #. A key value can be retrieved regardless of the mode in which the namespace was opened, but a value can only be stored if the namespace is open in read-write mode.
+   
+   #. Data types of the “``get``'s” and “``put``'s” must match.
+   
+   #. Remember the 15 character limit for namespace and key names.
+
+
+Real World Example
+------------------
+
+Here is part of a ``setup()`` function that uses Preferences.
+
+Its purpose is to set either a factory default configuration if the system has never run before, or use the last configuration if it has.
+
+When started, the system has no way of knowing which of the above conditions is true. So the first thing it does after opening the namespace is check for the existence of a key that we have predetermined can only exist if we have previously run the sketch. Based on its existence we decide if a factory default set of operating parameters should be used (and in so doing create the namespace keys and populate the values with defaults) or if we should use operating parameters from the last time the system was running.
+
+.. code-block:: arduino
+   
+   #include <Preferences.h>
+   
+   #define RW_MODE false
+   #define RO_MODE true
+   
+   Preferences stcPrefs;
+
+   void setup() {
+   
+      // not the complete setup(), but in setup(), include this...
+   
+      stcPrefs.begin("STCPrefs", RO_MODE);           // Open our namespace (or create it
+                                                     //  if it doesn't exist) in in RO mode.
+      
+      bool tpInit = stcPrefs.isKey("nvsInit");       // Test for the existence of the "already initialized" key.
+
+      if (tpInit == false) {
+         // If tpInit is 'false', the key "nvsInit" does not yet exist therefore this 
+         //  must be our first-time run. We need to set up our Preferences namespace keys. So...
+         stcPrefs.end();                             // close the namespace in RO mode and...
+         stcPrefs.begin("STCPrefs", RW_MODE);        //  reopen it in RW mode.
+       
+
+         // The .begin() method created the "STCPrefs" namespace and since this is our 
+         //  first-time run we will create our keys and store the initial "factory default" values.
+         stcPrefs.putUChar("curBright", 10);
+         stcPrefs.putString("talChan", "one");
+         stcPrefs.putLong("talMax", -220226);
+         stcPrefs.putBool("ctMde", true);
+         
+         stcPrefs.putBool("nvsInit", true);          // Create the "already initialized" key and store a value.
+         
+         // The "factory defaults" are created and stored so...
+         stcPrefs.end();                             // Close the namespace in RW mode and...
+         stcPrefs.begin("STCPrefs", RO_MODE);        //  reopen it in RO mode so the setup code
+                                                     //  outside this first-time run 'if' block
+                                                     //  can retrieve the run-time values
+                                                     //  from the "STCPrefs" namespace. 
+      }
+
+      // Retrieve the operational parameters from the namespace
+      //  and save them into their run-time variables.
+      currentBrightness = stcPrefs.getUChar("curBright");  //  
+      tChannel = stcPrefs.getString("talChan");            //  The LHS variables were defined
+      tChanMax = stcPrefs.getLong("talMax");               //   earlier in the sketch.
+      ctMode = stcPrefs.getBool("ctMde");                  //
+      
+      // All done. Last run state (or the factory default) is now restored.
+      stcPrefs.end();                                      // Close our preferences namespace.
+      
+      // Carry on with the rest of your setup code...
+      
+      // When the sketch is running, it updates any changes to an operational parameter  
+      //  to the appropriate key-value pair in the namespace.
+      
+   }
+
+
+Utility Functions
+-----------------
+
+There are a few other functions useful when working with namespaces.
+
+Deleting key-value Pairs
+~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. code-block:: arduino
+
+   preferences.clear();
+   
+.. 
+
+      - Deletes *all* the key-value pairs in the currently opened namespace.
+      
+        - The namespace still exists.
+      
+        - The namespace must be open in read-write mode for this to work.
+
+.. code-block:: arduino
+
+   preferences.remove("keyname");
+   
+.. 
+
+      - Deletes the "keyname" and value associated with it from the currently opened namespace.
+      
+        - The namespace must be open in read-write mode for this to work.
+        - Tip: use this to remove the "test key" to force a "factory reset" during the next reboot (see the *Real World Example* above).
+
+If either of the above are used, the ``key-value`` pair will need to be recreated before using it again.
+
+
+Determining the Number of Available Keys
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+For each namespace, Preferences keeps track of the keys in a key table. There must be an open entry in the table before a key can be created. This method will return the number of entires available in the table.
+
+.. code-block:: arduino
+
+   freeEntries()
+   
+.. 
+
+To send to the serial monitor the number of available entries the following could be used.
+
+.. code-block:: arduino
+
+   Preferences mySketchPrefs;
+
+   mySketchPrefs.begin("myPrefs", true);
+   size_t whatsLeft = freeEntries();    // this method works regardless of the mode in which the namespace is opened.
+   Serial.printf("There are: %u entries available in the namespace table.\n, whatsLeft);
+   mySketchPrefs.end();
+
+..
+
+The number of available entries in the key table changes depending on the number of keys in the namespace and also the dynamic size of certain types of data stored in the namespace. Details are in the `Preferences API Reference`_.
+
+Do note that the number of entries in the key table does not guarantee that there is room in the opened NVS namespace for all the data to be stored in that namespace. Refer to the espressif `Non-volatile storage library`_ documentation for full details.
+
+
+Determining the Type of a key-value Pair
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Keeping track of the data types stored against a key-value pair is one of the bookkeeping tasks left to you. Should you want to discover the Preferences data type stored against a given key, use this method:
+
+.. code-block:: arduino
+
+   getType("myKey")
+
+..
+
+As in:
+
+.. code-block:: arduino
+
+   PreferenceType whatType = getType("myKey");
+   
+..
+
+The value returned is a ``PreferenceType`` value that maps to a Preferences Type. Refer to the description in the `Preferences API Reference`_ for details.
+
+
+
+Working with Large Data
+-----------------------
+
+Recall that the Preferences library works best for storing many small values, rather than a few large values. Regardless, it may be desirable to store larger amounts of arbitrary data than what is provided by the basic types in the Preferences Types table above.
+
+The library provides the following methods to facilitate this.
+
+.. code-block:: arduino
+
+   putBytes("myBytesKey", value, valueLen)
+   getBytes("myBytesKey", buffer, valueLen)
+   getBytesLength("myBytesKey")
+   
+..
+
+The ``put`` and ``get`` ``Bytes`` methods store and retrieve the data. The ``getBytesLength`` method is used to find the size of the data stored against the key (which is needed to retrieve ``Bytes`` data).
+
+As the names of the methods imply, they operate on variable length bytes of data (often referred to as a "blob") and not on individual elements of a certain data type.
+
+Meaning if you store for example an array of type ``int16_t`` against a ``Bytes`` type key, the value of that key becomes a series of bytes with no associated data type. Or if you like, all data stored as a blob gets converted to a series of ``uint8_t`` type bytes.
+
+As a result, when using the ``getBytes`` method to retrieve the value of the key, what is returned to the buffer is a series of ``uint8_t`` bytes. It is up to you to manage the data types and size of the arrays and buffers when retrieving ``Bytes`` data.
+
+Fortunately this is not as difficult as it may sound as the ``getBytesLength`` method and the ``sizeof`` operator help with keeping track of it all.
+
+This is best explained with an example. Here the ``Bytes`` methods are used to store and retrieve an array, while ensuring the data type is preserved.
+
+.. code-block:: arduino
+
+   /*
+    *  An example sketch using the Preferences "Bytes" methods
+    *   to store and retrieve an arbitrary number of bytes in
+    *   a namespace.
+    */
+
+   #include <Preferences.h>
+
+   #define RO_MODE true
+   #define RW_MODE false
+
+   void setup() {
+
+       Preferences mySketchPrefs;
+
+       Serial.begin(115200);
+       delay(250);
+    
+       mySketchPrefs.begin("myPrefs", RW_MODE);   // open (or create) the namespace "myPrefs" in RW mode
+       mySketchPrefs.clear();                     // delete any previous keys in this namespace
+    
+       // Create an array of test values. We're using hex numbers throughout to better show how the bytes move around.
+       int16_t myArray[] = { 0x1112, 0x2122, 0x3132, 0x4142, 0x5152, 0x6162, 0x7172 };
+    
+       Serial.println("Printing myArray...");
+       for (int i = 0; i < sizeof(myArray) / sizeof(int16_t); i++) {
+           Serial.print(myArray[i], HEX); Serial.print(", ");
+       }
+       Serial.println("\r\n");
+    
+       // In the next statement, the second sizeof() needs to match the data type of the elements of myArray
+       Serial.print("The number of elements in myArray is: "); Serial.println( sizeof(myArray) / sizeof(int16_t) );
+       Serial.print("But the size of myArray in bytes is: "); Serial.println( sizeof(myArray) );
+       Serial.println("");
+    
+       Serial.println("Storing myArray into the Preferences namespace \"myPrefs\" against the key \"myPrefsBytes\".");
+       // Note: in the next statement, to store the entire array, we must use the 
+       //  size of the arrray in bytes, not the number of elements in the array.
+       mySketchPrefs.putBytes( "myPrefsBytes", myArray, sizeof(myArray) );
+       Serial.print("The size of \"myPrefsBytes\" is (in bytes): "); Serial.println( mySketchPrefs.getBytesLength("myPrefsBytes") );
+       Serial.println("");
+    
+       int16_t myIntBuffer[20] = {};   // No magic about 20. Just making a buffer (array) big enough.
+       Serial.println("Retrieving the value of myPrefsBytes into myIntBuffer.");
+       Serial.println("   - Note the data type of myIntBuffer matches that of myArray");
+       mySketchPrefs.getBytes( "myPrefsBytes", myIntBuffer, mySketchPrefs.getBytesLength("myPrefsBytes") );
+    
+       Serial.println("Printing myIntBuffer...");
+       // In the next statement, sizeof() needs to match the data type of the elements of myArray
+       for (int i = 0; i < mySketchPrefs.getBytesLength("myPrefsBytes") / sizeof(int16_t); i++) {
+          Serial.print(myIntBuffer[i], HEX); Serial.print(", ");
+       }
+       Serial.println("\r\n");
+
+       Serial.println("We can see how the data from myArray is actually stored in the namespace as follows.");
+       uint8_t myByteBuffer[40] = {};  // No magic about 40. Just making a buffer (array) big enough.
+       mySketchPrefs.getBytes( "myPrefsBytes", myByteBuffer, mySketchPrefs.getBytesLength("myPrefsBytes") );
+    
+       Serial.println("Printing myByteBuffer...");
+       for (int i = 0; i < mySketchPrefs.getBytesLength("myPrefsBytes"); i++) {
+          Serial.print(myByteBuffer[i], HEX); Serial.print(", ");
+       }
+       Serial.println("");
+
+   }
+
+   void loop() {
+     ;
+   }
+
+..
+
+The resulting output is:
+::
+
+   Printing myArray...
+   1112, 2122, 3132, 4142, 5152, 6162, 7172, 
+
+   The number of elements in myArray is: 7
+   But the size of myArray in bytes is: 14
+
+   Storing myArray into the Preferences namespace "myPrefs" against the key "myPrefsBytes".
+   The size of "myPrefsBytes" is (in bytes): 14
+
+   Retrieving the value of myPrefsBytes into myIntBuffer.
+      - Note the data type of myIntBuffer matches that of myArray
+   Printing myIntBuffer...
+   1112, 2122, 3132, 4142, 5152, 6162, 7172, 
+
+   We can see how the data from myArray is actually stored in the namespace as follows.
+   Printing myByteBuffer...
+   12, 11, 22, 21, 32, 31, 42, 41, 52, 51, 62, 61, 72, 71, 
+
+You can copy the sketch and change the data type and values in ``myArray`` and follow along with the code and output to see how the ``Bytes`` methods work. The data type of ``myIntBuffer`` should be changed to match that of ``myArray`` (and check the "``sizeof()``'s" where indicated in the comments).
+
+The main takeaway is to remember you're working with bytes and so attention needs to be paid to store all the data based on the size of its type and to manage the buffer size and data type for the value retrieved.
+
+
+Multiple Namespaces
+-------------------
+
+As stated earlier, multiple namespaces can exist in the Preferences NVS partition. However, only one namespace at a time can be open (in use).
+
+If you need to access a different namespace, close the one before opening the other. For example:
+
+.. code-block:: arduino
+
+   Preferences currentNamespace;
+
+      currentNamespace.begin("myNamespace", false);
+         // do stuff...
+
+      currentNamespace.end();                              // closes 'myNamespace' 
+   
+      currentNamespace.begin("myOtherNamespace", false);   // opens a different Preferences namesspace.
+         // do other stuff...
+         
+      currentNamespace.end();                              // closes 'myOtherNamespace'
+
+Here the "``currentNamespace``" object is reused, but different Preferences objects can be declared and used. Just remember to keep it all straight as all "``putX``'s" and "``getX``'s", etc. will only operate on the single currently opened namespace.
+
+
+A Closer Look at ``getX`` 
+--------------------------
+
+Methods in the Preferences library return a status code that can be used to determine if the method completed successfully. This is described in the `Preferences API Reference`_.
+
+Assume we have a key named "``favourites``" that contains a value of a ``String`` data type.
+
+After executing the statement:
+
+.. code-block:: arduino
+
+  dessert = mySketchPrefs.getString("favourites");
+  
+..
+
+the variable ``dessert`` will contain the value of the string stored against the key ``"favourites"``.
+
+But what if something went wrong and the ``getString`` call failed to retrieve the key value? How would we be able to detect the error?
+
+With Preferences, the ``getX`` methods listed in Table 2 below will return a default value if an error is encountered.
+
+.. table:: **Table 2 — getX Methods Defaults**
+   :align: center
+
+   +------------------+-----------------+
+   | Preferences      | Default Return  |
+   | Type             | Value           |
+   +==================+=================+
+   | Char, UChar,     | 0               |
+   |                  |                 |
+   | Short, UShort,   |                 |
+   |                  |                 |
+   | Int, UInt,       |                 |
+   |                  |                 |
+   | Long, ULong,     |                 |
+   |                  |                 |
+   | Long64, ULong64  |                 |
+   +------------------+-----------------+
+   | Bool             | false           |
+   +------------------+-----------------+
+   | Float            | NAN             |
+   |                  |                 |
+   | Double           |                 |
+   +------------------+-----------------+
+   | String (String)  | ""              |
+   +------------------+-----------------+
+   | String (* buf)   | \\0             |
+   +------------------+-----------------+
+
+Thus to detect an error we could compare the value returned against its default return value and if they are equal assume an error occurred and take the appropriate action.
+
+But what if a method default return value is also a potential legitimate value? How can we then know if an error occurred?
+
+As it turns out, the complete form of the ``getX`` methods for each of the Preferences Types in Table 2 is:
+
+.. code-block:: arduino
+
+   preferences.getX("myKey", myDefault)
+
+..
+
+In this form the method will return either the value associated with "``myKey``" or, if an error occurred, return the value ``myDefault``, where ``myDefault`` must be the same data type as the ``getX``.
+
+Returning to the example above:
+
+.. code-block:: arduino
+
+  dessert = mySketchPrefs.getString("favourites", "gravel");
+
+..
+
+will assign to the variable ``dessert`` the String ``gravel`` if an error occurred, or the value stored against the key ``favourites`` if not.
+
+If we predetermine a default value that is outside all legitimate values, we now have a way to test if an error actually occurred.
+
+In summary, if you need to confirm that a value was retrieved without error from a namespace, use the complete form of the ``getX`` method with a predetermined default "this can only happen if an error" value and compare that against the value returned by the call. Otherwise, you can omit the default value as the call will return the default for that particular ``getX`` method.
+
+Additional detail is given in the `Preferences API Reference`_.
+
+
+Advanced Item
+-------------
+
+In the arduino-esp32 implementation of Preferences there is no method to completely remove a namespace. As a result, over the course of a number of projects, it is possible that the ESP32 NVS Preferences partition becomes cluttered or full.
+
+To completely erase and reformat the NVS memory used by Preferences, create and run a sketch that contains:
+
+.. code-block:: arduino
+
+   #include <nvs_flash.h>
+
+   void setup() {
+
+       nvs_flash_erase();      // erase the NVS partition and...
+       nvs_flash_init();       // initialize the NVS partition.
+       while (true);
+
+   }
+
+   void loop() {
+      ;
+   }
+
+.. 
+
+.. warning:: 
+   **You should download a new sketch to your board immediately after running the above or else it will reformat the NVS partition every time it is powered up or restarted!**
+
+
+Resources
+---------
+
+* `Preferences API Reference <../api/preferences.html>`_
+* `Non-volatile storage library`_ (espressif-IDF API Reference)
+* `Official ESP-IDF documentation`_ (espressif-IDF Reference)
+
+
+.. _Non-volatile storage library: https://docs.espressif.com/projects/esp-idf/en/stable/esp32/api-reference/storage/nvs_flash.html
+.. _Official ESP-IDF documentation: https://docs.espressif.com/projects/esp-idf/en/stable
+
+
+Contribute
+----------
+
+.. ==*Do not change! Keep as is.*==
+
+To contribute to this project, see `How to contribute`_.
+
+If you have any **feedback** or **issue** to report on this tutorial, please open an issue or fix it by creating a new PR. Contributions are more than welcome!
+
+Before creating a new issue, be sure to try the Troubleshooting and to check if the same issue was already created by someone else.
+
+.. _How to Contribute: https://github.com/espressif/arduino-esp32/blob/master/CONTRIBUTING.rst
+
+.. ---- EOF ----
diff --git a/docs/source/tutorials/tutorials.rst b/docs/source/tutorials/tutorials.rst
index 57eead06f31..9fca4ac3ce5 100644
--- a/docs/source/tutorials/tutorials.rst
+++ b/docs/source/tutorials/tutorials.rst
@@ -3,10 +3,8 @@ Tutorials
 #########
 
 .. toctree::
-    :maxdepth: 2
     :caption: Tutorials:
+    :maxdepth: 1
+    :glob:
 
-    Blink <blink>
-    Basic <basic>
-    DFU <dfu>
-    GPIO Matrix and Pin Mux <io_mux>
+    *
diff --git a/idf_component.yml b/idf_component.yml
new file mode 100644
index 00000000000..9894a2ce923
--- /dev/null
+++ b/idf_component.yml
@@ -0,0 +1,21 @@
+description: "Arduino core for ESP32, ESP32-S and ESP32-C series of SoCs"
+url: "https://github.com/espressif/arduino-esp32"
+targets:
+  - esp32
+  - esp32s2
+  - esp32s3
+  - esp32c3
+tags:
+  - arduino
+files:
+  include:
+    - "cores/**/*"
+    - "variants/esp32/**/*"
+    - "variants/esp32s2/**/*"
+    - "variants/esp32s3/**/*"
+    - "variants/esp32c3/**/*"
+    - "libraries/**/*"
+    - "CMakeLists.txt"
+    - "Kconfig.projbuild"
+  exclude:
+    - "**/*"
diff --git a/libraries/AsyncUDP/src/AsyncUDP.h b/libraries/AsyncUDP/src/AsyncUDP.h
index 3f3724a8af8..be04c01ffaa 100644
--- a/libraries/AsyncUDP/src/AsyncUDP.h
+++ b/libraries/AsyncUDP/src/AsyncUDP.h
@@ -4,9 +4,9 @@
 #include "IPAddress.h"
 #include "IPv6Address.h"
 #include "Print.h"
+#include "Stream.h"
 #include <functional>
 extern "C" {
-#include "lwip/ip_addr.h"
 #include "esp_netif.h"
 #include "freertos/queue.h"
 #include "freertos/semphr.h"
diff --git a/libraries/BLE/src/BLEAddress.cpp b/libraries/BLE/src/BLEAddress.cpp
index 7ba677f0642..f9abae1803b 100644
--- a/libraries/BLE/src/BLEAddress.cpp
+++ b/libraries/BLE/src/BLEAddress.cpp
@@ -71,7 +71,7 @@ bool BLEAddress::operator!=(const BLEAddress& otherAddress) const {
 }
 
 bool BLEAddress::operator<(const BLEAddress& otherAddress) const {
-  return memcmp(otherAddress.m_address, m_address, ESP_BD_ADDR_LEN) < 0;
+  return memcmp(m_address, otherAddress.m_address, ESP_BD_ADDR_LEN) < 0;
 }
 
 bool BLEAddress::operator<=(const BLEAddress& otherAddress) const {
@@ -83,7 +83,7 @@ bool BLEAddress::operator>=(const BLEAddress& otherAddress) const {
 }
 
 bool BLEAddress::operator>(const BLEAddress& otherAddress) const {
-  return memcmp(otherAddress.m_address, m_address, ESP_BD_ADDR_LEN) > 0;
+  return memcmp(m_address, otherAddress.m_address, ESP_BD_ADDR_LEN) > 0;
 }
 
 /**
diff --git a/libraries/BLE/examples/BLE_Beacon_Scanner/.skip.esp32c3 b/libraries/BluetoothSerial/examples/DiscoverConnect/.skip.esp32c3
similarity index 100%
rename from libraries/BLE/examples/BLE_Beacon_Scanner/.skip.esp32c3
rename to libraries/BluetoothSerial/examples/DiscoverConnect/.skip.esp32c3
diff --git a/libraries/RainMaker/examples/RMakerCustom/.skip.esp32s2 b/libraries/BluetoothSerial/examples/DiscoverConnect/.skip.esp32s2
similarity index 100%
rename from libraries/RainMaker/examples/RMakerCustom/.skip.esp32s2
rename to libraries/BluetoothSerial/examples/DiscoverConnect/.skip.esp32s2
diff --git a/libraries/BLE/examples/BLE_EddystoneTLM_Beacon/.skip.esp32c3 b/libraries/BluetoothSerial/examples/DiscoverConnect/.skip.esp32s3
similarity index 100%
rename from libraries/BLE/examples/BLE_EddystoneTLM_Beacon/.skip.esp32c3
rename to libraries/BluetoothSerial/examples/DiscoverConnect/.skip.esp32s3
diff --git a/libraries/BluetoothSerial/examples/DiscoverConnect/DiscoverConnect.ino b/libraries/BluetoothSerial/examples/DiscoverConnect/DiscoverConnect.ino
new file mode 100644
index 00000000000..168ea9d19c4
--- /dev/null
+++ b/libraries/BluetoothSerial/examples/DiscoverConnect/DiscoverConnect.ino
@@ -0,0 +1,114 @@
+/**
+ * Bluetooth Classic Example
+ * Scan for devices - asyncronously, print device as soon as found
+ * query devices for SPP - SDP profile
+ * connect to first device offering a SPP connection
+ * 
+ * Example python server:
+ * source: https://gist.github.com/ukBaz/217875c83c2535d22a16ba38fc8f2a91
+ *
+ * Tested with Raspberry Pi onboard Wifi/BT, USB BT 4.0 dongles, USB BT 1.1 dongles, 
+ * 202202: does NOT work with USB BT 2.0 dongles when esp32 aduino lib is compiled with SSP support!
+ *         see https://github.com/espressif/esp-idf/issues/8394
+ *         
+ * use ESP_SPP_SEC_ENCRYPT|ESP_SPP_SEC_AUTHENTICATE in connect() if remote side requests 'RequireAuthentication': dbus.Boolean(True),
+ * use ESP_SPP_SEC_NONE or ESP_SPP_SEC_ENCRYPT|ESP_SPP_SEC_AUTHENTICATE in connect() if remote side has Authentication: False
+ */
+
+#include <map>
+#include <BluetoothSerial.h>
+
+#if !defined(CONFIG_BT_ENABLED) || !defined(CONFIG_BLUEDROID_ENABLED)
+#error Bluetooth is not enabled! Please run `make menuconfig` to and enable it
+#endif
+
+#if !defined(CONFIG_BT_SPP_ENABLED)
+#error Serial Bluetooth not available or not enabled. It is only available for the ESP32 chip.
+#endif
+
+BluetoothSerial SerialBT;
+
+
+#define BT_DISCOVER_TIME  10000
+esp_spp_sec_t sec_mask=ESP_SPP_SEC_NONE; // or ESP_SPP_SEC_ENCRYPT|ESP_SPP_SEC_AUTHENTICATE to request pincode confirmation
+esp_spp_role_t role=ESP_SPP_ROLE_SLAVE; // or ESP_SPP_ROLE_MASTER
+
+// std::map<BTAddress, BTAdvertisedDeviceSet> btDeviceList;
+
+void setup() {
+  Serial.begin(115200);
+  if(! SerialBT.begin("ESP32test", true) ) {
+    Serial.println("========== serialBT failed!");
+    abort();
+  }
+  // SerialBT.setPin("1234"); // doesn't seem to change anything
+  // SerialBT.enableSSP(); // doesn't seem to change anything
+
+
+  Serial.println("Starting discoverAsync...");
+  BTScanResults* btDeviceList = SerialBT.getScanResults();  // maybe accessing from different threads!
+  if (SerialBT.discoverAsync([](BTAdvertisedDevice* pDevice) {
+      // BTAdvertisedDeviceSet*set = reinterpret_cast<BTAdvertisedDeviceSet*>(pDevice);
+      // btDeviceList[pDevice->getAddress()] = * set;
+      Serial.printf(">>>>>>>>>>>Found a new device asynchronously: %s\n", pDevice->toString().c_str());
+    } )
+    ) {
+    delay(BT_DISCOVER_TIME);
+    Serial.print("Stopping discoverAsync... ");
+    SerialBT.discoverAsyncStop();
+    Serial.println("discoverAsync stopped");
+    delay(5000);
+    if(btDeviceList->getCount() > 0) {
+      BTAddress addr;
+      int channel=0;
+      Serial.println("Found devices:");
+      for (int i=0; i < btDeviceList->getCount(); i++) {
+        BTAdvertisedDevice *device=btDeviceList->getDevice(i);
+        Serial.printf(" ----- %s  %s %d\n", device->getAddress().toString().c_str(), device->getName().c_str(), device->getRSSI());
+        std::map<int,std::string> channels=SerialBT.getChannels(device->getAddress());
+        Serial.printf("scanned for services, found %d\n", channels.size());
+        for(auto const &entry : channels) {
+          Serial.printf("     channel %d (%s)\n", entry.first, entry.second.c_str());
+        }
+        if(channels.size() > 0) {
+          addr = device->getAddress();
+          channel=channels.begin()->first;
+        }
+      }
+      if(addr) {
+        Serial.printf("connecting to %s - %d\n", addr.toString().c_str(), channel);
+        SerialBT.connect(addr, channel, sec_mask, role);
+      }
+    } else {
+      Serial.println("Didn't find any devices");
+    }
+  } else {
+    Serial.println("Error on discoverAsync f.e. not workin after a \"connect\"");
+  }
+}
+
+
+String sendData="Hi from esp32!\n";
+
+void loop() {
+  if(! SerialBT.isClosed() && SerialBT.connected()) {
+    if( SerialBT.write((const uint8_t*) sendData.c_str(),sendData.length()) != sendData.length()) {
+      Serial.println("tx: error");
+    } else {
+      Serial.printf("tx: %s",sendData.c_str());
+    }
+    if(SerialBT.available()) {
+      Serial.print("rx: ");
+      while(SerialBT.available()) {
+        int c=SerialBT.read();
+        if(c >= 0) {
+          Serial.print((char) c);
+        }
+      }
+      Serial.println();
+    }
+  } else {
+    Serial.println("not connected");
+  }
+  delay(1000);
+}
diff --git a/libraries/BLE/examples/BLE_EddystoneURL_Beacon/.skip.esp32c3 b/libraries/BluetoothSerial/examples/SerialToSerialBT/.skip.esp32s3
similarity index 100%
rename from libraries/BLE/examples/BLE_EddystoneURL_Beacon/.skip.esp32c3
rename to libraries/BluetoothSerial/examples/SerialToSerialBT/.skip.esp32s3
diff --git a/libraries/BluetoothSerial/examples/SerialToSerialBT/SerialToSerialBT.ino b/libraries/BluetoothSerial/examples/SerialToSerialBT/SerialToSerialBT.ino
index d779c6d349e..86cbe168a14 100644
--- a/libraries/BluetoothSerial/examples/SerialToSerialBT/SerialToSerialBT.ino
+++ b/libraries/BluetoothSerial/examples/SerialToSerialBT/SerialToSerialBT.ino
@@ -10,6 +10,10 @@
 #error Bluetooth is not enabled! Please run `make menuconfig` to and enable it
 #endif
 
+#if !defined(CONFIG_BT_SPP_ENABLED)
+#error Serial Bluetooth not available or not enabled. It is only available for the ESP32 chip.
+#endif
+
 BluetoothSerial SerialBT;
 
 void setup() {
diff --git a/libraries/BLE/examples/BLE_client/.skip.esp32c3 b/libraries/BluetoothSerial/examples/SerialToSerialBTM/.skip.esp32s3
similarity index 100%
rename from libraries/BLE/examples/BLE_client/.skip.esp32c3
rename to libraries/BluetoothSerial/examples/SerialToSerialBTM/.skip.esp32s3
diff --git a/libraries/BluetoothSerial/examples/SerialToSerialBTM/SerialToSerialBTM.ino b/libraries/BluetoothSerial/examples/SerialToSerialBTM/SerialToSerialBTM.ino
index 3d17fb9005a..fc650059fb7 100644
--- a/libraries/BluetoothSerial/examples/SerialToSerialBTM/SerialToSerialBTM.ino
+++ b/libraries/BluetoothSerial/examples/SerialToSerialBTM/SerialToSerialBTM.ino
@@ -8,6 +8,10 @@
 
 #include "BluetoothSerial.h"
 
+#if !defined(CONFIG_BT_SPP_ENABLED)
+#error Serial Bluetooth not available or not enabled. It is only available for the ESP32 chip.
+#endif
+
 BluetoothSerial SerialBT;
 
 String MACadd = "AA:BB:CC:11:22:33";
diff --git a/libraries/BLE/examples/BLE_iBeacon/.skip.esp32c3 b/libraries/BluetoothSerial/examples/SerialToSerialBT_SSP_pairing/.skip.esp32s3
similarity index 100%
rename from libraries/BLE/examples/BLE_iBeacon/.skip.esp32c3
rename to libraries/BluetoothSerial/examples/SerialToSerialBT_SSP_pairing/.skip.esp32s3
diff --git a/libraries/BluetoothSerial/examples/SerialToSerialBT_SSP_pairing/SerialToSerialBT_SSP_pairing.ino b/libraries/BluetoothSerial/examples/SerialToSerialBT_SSP_pairing/SerialToSerialBT_SSP_pairing.ino
index 8791b6c7a02..c440545fcf3 100644
--- a/libraries/BluetoothSerial/examples/SerialToSerialBT_SSP_pairing/SerialToSerialBT_SSP_pairing.ino
+++ b/libraries/BluetoothSerial/examples/SerialToSerialBT_SSP_pairing/SerialToSerialBT_SSP_pairing.ino
@@ -10,6 +10,10 @@
 #error Bluetooth is not enabled! Please run `make menuconfig` to and enable it
 #endif
 
+#if !defined(CONFIG_BT_SPP_ENABLED)
+#error Serial Bluetooth not available or not enabled. It is only available for the ESP32 chip.
+#endif
+
 BluetoothSerial SerialBT;
 boolean confirmRequestPending = true;
 
diff --git a/libraries/BLE/examples/BLE_notify/.skip.esp32c3 b/libraries/BluetoothSerial/examples/bt_classic_device_discovery/.skip.esp32s3
similarity index 100%
rename from libraries/BLE/examples/BLE_notify/.skip.esp32c3
rename to libraries/BluetoothSerial/examples/bt_classic_device_discovery/.skip.esp32s3
diff --git a/libraries/BluetoothSerial/examples/bt_classic_device_discovery/bt_classic_device_discovery.ino b/libraries/BluetoothSerial/examples/bt_classic_device_discovery/bt_classic_device_discovery.ino
index b3ec78ccf2a..8d44f262174 100644
--- a/libraries/BluetoothSerial/examples/bt_classic_device_discovery/bt_classic_device_discovery.ino
+++ b/libraries/BluetoothSerial/examples/bt_classic_device_discovery/bt_classic_device_discovery.ino
@@ -4,6 +4,10 @@
 #error Bluetooth is not enabled! Please run `make menuconfig` to and enable it
 #endif
 
+#if !defined(CONFIG_BT_SPP_ENABLED)
+#error Serial Bluetooth not available or not enabled. It is only available for the ESP32 chip.
+#endif
+
 BluetoothSerial SerialBT;
 
 
diff --git a/libraries/BLE/examples/BLE_scan/.skip.esp32c3 b/libraries/BluetoothSerial/examples/bt_remove_paired_devices/.skip.esp32s3
similarity index 100%
rename from libraries/BLE/examples/BLE_scan/.skip.esp32c3
rename to libraries/BluetoothSerial/examples/bt_remove_paired_devices/.skip.esp32s3
diff --git a/libraries/BluetoothSerial/examples/bt_remove_paired_devices/bt_remove_paired_devices.ino b/libraries/BluetoothSerial/examples/bt_remove_paired_devices/bt_remove_paired_devices.ino
index c316a73b2bc..0d49fe46414 100755
--- a/libraries/BluetoothSerial/examples/bt_remove_paired_devices/bt_remove_paired_devices.ino
+++ b/libraries/BluetoothSerial/examples/bt_remove_paired_devices/bt_remove_paired_devices.ino
@@ -15,6 +15,10 @@
 #include"esp_gap_bt_api.h"
 #include "esp_err.h"
 
+#if !defined(CONFIG_BT_SPP_ENABLED)
+#error Serial Bluetooth not available or not enabled. It is only available for the ESP32 chip.
+#endif
+
 #define REMOVE_BONDED_DEVICES 0   // <- Set to 0 to view all bonded devices addresses, set to 1 to remove
 
 #define PAIR_MAX_DEVICES 20
diff --git a/libraries/BluetoothSerial/src/BTAddress.cpp b/libraries/BluetoothSerial/src/BTAddress.cpp
index 7ef1eb1a85e..72fe7587b72 100644
--- a/libraries/BluetoothSerial/src/BTAddress.cpp
+++ b/libraries/BluetoothSerial/src/BTAddress.cpp
@@ -29,6 +29,9 @@ BTAddress::BTAddress(esp_bd_addr_t address) {
 	memcpy(m_address, address, ESP_BD_ADDR_LEN);
 } // BTAddress
 
+BTAddress::BTAddress() {
+	bzero(m_address, ESP_BD_ADDR_LEN);
+} // BTAddress
 
 /**
  * @brief Create an address from a hex string
@@ -64,13 +67,20 @@ bool BTAddress::equals(BTAddress otherAddress) {
 	return memcmp(otherAddress.getNative(), m_address, 6) == 0;
 } // equals
 
+BTAddress::operator bool () const {
+	for(int i = 0; i < ESP_BD_ADDR_LEN; i++){
+		if(this->m_address[i])
+			return true;
+	}
+	return false;
+} // operator ()
 
 /**
  * @brief Return the native representation of the address.
  * @return The native representation of the address.
  */
-esp_bd_addr_t *BTAddress::getNative() {
-	return &m_address;
+esp_bd_addr_t *BTAddress::getNative() const {
+	return const_cast<esp_bd_addr_t *>(&m_address);
 } // getNative
 
 
@@ -85,7 +95,7 @@ esp_bd_addr_t *BTAddress::getNative() {
  *
  * @return The string representation of the address.
  */
-std::string BTAddress::toString() {
+std::string BTAddress::toString() const {
 	auto size = 18;
 	char *res = (char*)malloc(size);
 	snprintf(res, size, "%02x:%02x:%02x:%02x:%02x:%02x", m_address[0], m_address[1], m_address[2], m_address[3], m_address[4], m_address[5]);
diff --git a/libraries/BluetoothSerial/src/BTAddress.h b/libraries/BluetoothSerial/src/BTAddress.h
index 6213d01fdf2..3e51d053ebb 100644
--- a/libraries/BluetoothSerial/src/BTAddress.h
+++ b/libraries/BluetoothSerial/src/BTAddress.h
@@ -22,11 +22,14 @@
  */
 class BTAddress {
 public:
+	BTAddress();
 	BTAddress(esp_bd_addr_t address);
 	BTAddress(std::string stringAddress);
 	bool           equals(BTAddress otherAddress);
-	esp_bd_addr_t* getNative();
-	std::string    toString();
+	operator bool () const;
+
+	esp_bd_addr_t* getNative() const;
+	std::string    toString() const;
 
 private:
 	esp_bd_addr_t m_address;
diff --git a/libraries/BluetoothSerial/src/BTAdvertisedDevice.h b/libraries/BluetoothSerial/src/BTAdvertisedDevice.h
index 07e93622e92..918946f1910 100644
--- a/libraries/BluetoothSerial/src/BTAdvertisedDevice.h
+++ b/libraries/BluetoothSerial/src/BTAdvertisedDevice.h
@@ -16,14 +16,14 @@ class BTAdvertisedDevice {
     virtual ~BTAdvertisedDevice() = default;
 
     virtual BTAddress   getAddress();
-    virtual uint32_t    getCOD();
-    virtual std::string getName();
-    virtual int8_t      getRSSI();
+    virtual uint32_t    getCOD() const;
+    virtual std::string getName() const;
+    virtual int8_t      getRSSI() const;
 
 
-    virtual bool        haveCOD();
-    virtual bool        haveName();
-    virtual bool        haveRSSI();
+    virtual bool        haveCOD() const;
+    virtual bool        haveName() const;
+    virtual bool        haveRSSI() const;
 
     virtual std::string toString();
 };
@@ -35,14 +35,14 @@ class BTAdvertisedDeviceSet : public virtual BTAdvertisedDevice {
     
 
     BTAddress   getAddress();
-    uint32_t    getCOD();
-    std::string getName();
-    int8_t      getRSSI();
+    uint32_t    getCOD() const;
+    std::string getName() const;
+    int8_t      getRSSI() const;
 
 
-    bool        haveCOD();
-    bool        haveName();
-    bool        haveRSSI();
+    bool        haveCOD() const;
+    bool        haveName() const;
+    bool        haveRSSI() const;
 
     std::string toString();
 
@@ -62,4 +62,4 @@ class BTAdvertisedDeviceSet : public virtual BTAdvertisedDevice {
     int8_t      m_rssi;
 };
 
-#endif
\ No newline at end of file
+#endif
diff --git a/libraries/BluetoothSerial/src/BTAdvertisedDeviceSet.cpp b/libraries/BluetoothSerial/src/BTAdvertisedDeviceSet.cpp
index c8f28e9c39e..8a9e26e4d5a 100644
--- a/libraries/BluetoothSerial/src/BTAdvertisedDeviceSet.cpp
+++ b/libraries/BluetoothSerial/src/BTAdvertisedDeviceSet.cpp
@@ -25,14 +25,14 @@ BTAdvertisedDeviceSet::BTAdvertisedDeviceSet() {
 } // BTAdvertisedDeviceSet
 
 BTAddress   BTAdvertisedDeviceSet::getAddress()    { return m_address; }
-uint32_t    BTAdvertisedDeviceSet::getCOD()        { return m_cod; }
-std::string BTAdvertisedDeviceSet::getName()       { return m_name; }
-int8_t      BTAdvertisedDeviceSet::getRSSI()	    { return m_rssi; }
+uint32_t    BTAdvertisedDeviceSet::getCOD() const       { return m_cod; }
+std::string BTAdvertisedDeviceSet::getName() const      { return m_name; }
+int8_t      BTAdvertisedDeviceSet::getRSSI() const	    { return m_rssi; }
 
 
-bool        BTAdvertisedDeviceSet::haveCOD()   { return m_haveCOD; }
-bool        BTAdvertisedDeviceSet::haveName()  { return m_haveName; }
-bool        BTAdvertisedDeviceSet::haveRSSI()  { return m_haveRSSI; }
+bool        BTAdvertisedDeviceSet::haveCOD() const  { return m_haveCOD; }
+bool        BTAdvertisedDeviceSet::haveName() const { return m_haveName; }
+bool        BTAdvertisedDeviceSet::haveRSSI() const { return m_haveRSSI; }
 
 /**
  * @brief Create a string representation of this device.
diff --git a/libraries/BluetoothSerial/src/BTScan.h b/libraries/BluetoothSerial/src/BTScan.h
index 3650d41625b..2851fdd3626 100644
--- a/libraries/BluetoothSerial/src/BTScan.h
+++ b/libraries/BluetoothSerial/src/BTScan.h
@@ -24,14 +24,14 @@ class BTScanResults {
 
     virtual void        		dump(Print *print = nullptr);
     virtual int         		getCount();
-    virtual BTAdvertisedDevice* getDevice(uint32_t i);
+    virtual BTAdvertisedDevice* getDevice(int i);
 };
 
 class BTScanResultsSet : public BTScanResults {
 public:
     void                	dump(Print *print = nullptr);
     int                 	getCount();
-    BTAdvertisedDevice*		getDevice(uint32_t i);
+    BTAdvertisedDevice*		getDevice(int i);
 
 	bool add(BTAdvertisedDeviceSet advertisedDevice, bool unique = true);
 	void clear();
@@ -39,4 +39,4 @@ class BTScanResultsSet : public BTScanResults {
     std::map<std::string, BTAdvertisedDeviceSet> m_vectorAdvertisedDevices;
 };
 
-#endif
\ No newline at end of file
+#endif
diff --git a/libraries/BluetoothSerial/src/BTScanResultsSet.cpp b/libraries/BluetoothSerial/src/BTScanResultsSet.cpp
index 79d23e463cd..e347228c848 100644
--- a/libraries/BluetoothSerial/src/BTScanResultsSet.cpp
+++ b/libraries/BluetoothSerial/src/BTScanResultsSet.cpp
@@ -63,11 +63,11 @@ int BTScanResultsSet::getCount() {
  * @param [in] i The index of the device.
  * @return The device at the specified index.
  */
-BTAdvertisedDevice* BTScanResultsSet::getDevice(uint32_t i) {
+BTAdvertisedDevice* BTScanResultsSet::getDevice(int i) {
 	if (i < 0)
 		return nullptr;
 
-	uint32_t x = 0;
+	int x = 0;
 	BTAdvertisedDeviceSet* pDev = &m_vectorAdvertisedDevices.begin()->second;
 	for (auto it = m_vectorAdvertisedDevices.begin(); it != m_vectorAdvertisedDevices.end(); it++) {
 		pDev = &it->second;
@@ -92,4 +92,4 @@ bool BTScanResultsSet::add(BTAdvertisedDeviceSet advertisedDevice, bool unique)
 		return false;
 }
 
-#endif
\ No newline at end of file
+#endif
diff --git a/libraries/BluetoothSerial/src/BluetoothSerial.cpp b/libraries/BluetoothSerial/src/BluetoothSerial.cpp
index b20452c186a..ea72f787ebf 100644
--- a/libraries/BluetoothSerial/src/BluetoothSerial.cpp
+++ b/libraries/BluetoothSerial/src/BluetoothSerial.cpp
@@ -72,18 +72,30 @@ static esp_bt_pin_code_t _pin_code;
 static int _pin_len;
 static bool _isPinSet;
 static bool _enableSSP;
+static esp_spp_sec_t _sec_mask;
+static esp_spp_role_t _role;
+// start connect on ESP_SPP_DISCOVERY_COMP_EVT or save entry for getChannels
+static bool _doConnect;
+static std::map <int, std::string> sdpRecords;
 
 static BTScanResultsSet scanResults;
 static BTAdvertisedDeviceCb advertisedDeviceCb = nullptr;
 
+// _spp_event_group
 #define SPP_RUNNING     0x01
 #define SPP_CONNECTED   0x02
 #define SPP_CONGESTED   0x04
+// true until OPEN successful, changes to false on CLOSE
 #define SPP_DISCONNECTED 0x08
+// true until connect(), changes to true on CLOSE
+#define SPP_CLOSED      0x10
 
+// _bt_event_group
 #define BT_DISCOVERY_RUNNING    0x01
 #define BT_DISCOVERY_COMPLETED  0x02
 
+#define BT_SDP_RUNNING          0x04
+#define BT_SDP_COMPLETED        0x08
 
 typedef struct {
         size_t len;
@@ -98,7 +110,7 @@ static char *bda2str(esp_bd_addr_t bda, char *str, size_t size)
   }
 
   uint8_t *p = bda;
-  sprintf(str, "%02x:%02x:%02x:%02x:%02x:%02x",
+  snprintf(str, size, "%02x:%02x:%02x:%02x:%02x:%02x",
           p[0], p[1], p[2], p[3], p[4], p[5]);
   return str;
 }
@@ -280,13 +292,15 @@ static void esp_spp_cb(esp_spp_cb_event_t event, esp_spp_cb_param_t *param)
 
     case ESP_SPP_CLOSE_EVT://Client connection closed
         if ((param->close.async == false && param->close.status == ESP_SPP_SUCCESS) || param->close.async) {
-            log_i("ESP_SPP_CLOSE_EVT: %u", secondConnectionAttempt);
+            log_i("ESP_SPP_CLOSE_EVT status:%d handle:%d close_by_remote:%d attempt %u", param->close.status,
+                 param->close.handle, param->close.async, secondConnectionAttempt);
             if(secondConnectionAttempt) {
                 secondConnectionAttempt = false;
             } else {
                 _spp_client = 0;
                 xEventGroupSetBits(_spp_event_group, SPP_DISCONNECTED);
                 xEventGroupSetBits(_spp_event_group, SPP_CONGESTED);
+                xEventGroupSetBits(_spp_event_group, SPP_CLOSED);
             }        
             xEventGroupClearBits(_spp_event_group, SPP_CONNECTED);
         } else {
@@ -333,13 +347,37 @@ static void esp_spp_cb(esp_spp_cb_event_t event, esp_spp_cb_param_t *param)
         break;
 
     case ESP_SPP_DISCOVERY_COMP_EVT://discovery complete
-        log_i("ESP_SPP_DISCOVERY_COMP_EVT");
+        log_i("ESP_SPP_DISCOVERY_COMP_EVT num=%d", param->disc_comp.scn_num);
         if (param->disc_comp.status == ESP_SPP_SUCCESS) {
-            log_i("ESP_SPP_DISCOVERY_COMP_EVT: spp connect to remote");
-            esp_spp_connect(ESP_SPP_SEC_AUTHENTICATE, ESP_SPP_ROLE_MASTER, param->disc_comp.scn[0], _peer_bd_addr);
+            for(int i=0; i < param->disc_comp.scn_num; i++) {
+                log_d("ESP_SPP_DISCOVERY_COMP_EVT: spp [%d] channel: %d service name:%s", i, param->disc_comp.scn[i], param->disc_comp.service_name[0]);
+            }
+            if(_doConnect) {
+                if(param->disc_comp.scn_num > 0) {
+#if (ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_INFO)
+                    char bda_str[18];
+                    log_i("ESP_SPP_DISCOVERY_COMP_EVT: spp connect to remote %s channel %d",
+                        bda2str(_peer_bd_addr, bda_str, sizeof(bda_str)),
+                        param->disc_comp.scn[0]);
+#endif
+                    xEventGroupClearBits(_spp_event_group, SPP_CLOSED);
+                    if(esp_spp_connect(_sec_mask, _role, param->disc_comp.scn[0], _peer_bd_addr) != ESP_OK) {
+                        log_e("ESP_SPP_DISCOVERY_COMP_EVT connect failed");
+                        xEventGroupSetBits(_spp_event_group, SPP_CLOSED);
+                    }
+                } else {
+                    log_e("ESP_SPP_DISCOVERY_COMP_EVT remote doesn't offer an SPP channel");
+                    xEventGroupSetBits(_spp_event_group, SPP_CLOSED);
+                }
+            } else {
+                for(int i=0; i < param->disc_comp.scn_num; i++) {
+                    sdpRecords[param->disc_comp.scn[i]] = param->disc_comp.service_name[0];
+                }
+            }
         } else {
             log_e("ESP_SPP_DISCOVERY_COMP_EVT failed!, status:%d", param->disc_comp.status);
         }
+        xEventGroupSetBits(_bt_event_group, BT_SDP_COMPLETED);
         break;
 
     case ESP_SPP_OPEN_EVT://Client connection open
@@ -360,10 +398,15 @@ static void esp_spp_cb(esp_spp_cb_event_t event, esp_spp_cb_param_t *param)
         break;
 
     case ESP_SPP_CL_INIT_EVT://client initiated a connection
-        log_i("ESP_SPP_CL_INIT_EVT");
+        if (param->cl_init.status == ESP_SPP_SUCCESS) {
+            log_i("ESP_SPP_CL_INIT_EVT handle:%d sec_id:%d", param->cl_init.handle, param->cl_init.sec_id);
+        } else {
+            log_i("ESP_SPP_CL_INIT_EVT status:%d", param->cl_init.status);
+        }
         break;
 
     default:
+        log_i("ESP_SPP_* event unhandled %d", event);
         break;
     }
     if(custom_spp_callback)(*custom_spp_callback)(event, param);
@@ -377,7 +420,7 @@ static void esp_bt_gap_cb(esp_bt_gap_cb_event_t event, esp_bt_gap_cb_param_t *pa
 {
     switch(event){
         case ESP_BT_GAP_DISC_RES_EVT: {
-            log_i("ESP_BT_GAP_DISC_RES_EVT");
+            log_i("ESP_BT_GAP_DISC_RES_EVT properties=%d", param->disc_res.num_prop);
 #if (ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_INFO)
             char bda_str[18];
             log_i("Scanned device: %s", bda2str(param->disc_res.bda, bda_str, 18));
@@ -417,28 +460,29 @@ static void esp_bt_gap_cb(esp_bt_gap_cb_event_t event, esp_bt_gap_cb_param_t *pa
                         break;
 
                     case ESP_BT_GAP_DEV_PROP_COD:
-                        log_d("ESP_BT_GAP_DEV_PROP_COD");
                         if (param->disc_res.prop[i].len <= sizeof(int)) {
                             uint32_t cod = 0;
                             memcpy(&cod, param->disc_res.prop[i].val, param->disc_res.prop[i].len);
                             advertisedDevice.setCOD(cod);
+                            log_d("ESP_BT_GAP_DEV_PROP_COD 0x%x", cod);
                         } else {
-                            log_d("Value size larger than integer");
+                            log_d("ESP_BT_GAP_DEV_PROP_COD invalid COD: Value size larger than integer");
                         }
                         break;
 
                     case ESP_BT_GAP_DEV_PROP_RSSI:
-                        log_d("ESP_BT_GAP_DEV_PROP_RSSI");
                         if (param->disc_res.prop[i].len <= sizeof(int)) {
                             uint8_t rssi = 0;
                             memcpy(&rssi, param->disc_res.prop[i].val, param->disc_res.prop[i].len);
+                            log_d("ESP_BT_GAP_DEV_PROP_RSSI %d", rssi);
                             advertisedDevice.setRSSI(rssi);
                         } else {
-                            log_d("Value size larger than integer");
+                            log_d("ESP_BT_GAP_DEV_PROP_RSSI invalid RSSI: Value size larger than integer");
                         }
                         break;
                         
                     default:
+                        log_i("ESP_BT_GAP_DISC_RES_EVT unknown property [%d]:type:%d", i, param->disc_res.prop[i].type);
                         break;
                 }
                 if (_isRemoteAddressSet)
@@ -455,11 +499,12 @@ static void esp_bt_gap_cb(esp_bt_gap_cb_event_t event, esp_bt_gap_cb_param_t *pa
         break;
 
         case ESP_BT_GAP_DISC_STATE_CHANGED_EVT:
-            log_i("ESP_BT_GAP_DISC_STATE_CHANGED_EVT");
             if (param->disc_st_chg.state == ESP_BT_GAP_DISCOVERY_STOPPED) {
+                log_i("ESP_BT_GAP_DISC_STATE_CHANGED_EVT stopped");
                 xEventGroupClearBits(_bt_event_group, BT_DISCOVERY_RUNNING);
                 xEventGroupSetBits(_bt_event_group, BT_DISCOVERY_COMPLETED);
             } else { // ESP_BT_GAP_DISCOVERY_STARTED
+                log_i("ESP_BT_GAP_DISC_STATE_CHANGED_EVT started");
                 xEventGroupClearBits(_bt_event_group, BT_DISCOVERY_COMPLETED);
                 xEventGroupSetBits(_bt_event_group, BT_DISCOVERY_RUNNING);
             }
@@ -522,7 +567,24 @@ static void esp_bt_gap_cb(esp_bt_gap_cb_event_t event, esp_bt_gap_cb_param_t *pa
             log_i("ESP_BT_GAP_KEY_REQ_EVT Please enter passkey!");
             break;
 
+        case ESP_BT_GAP_CONFIG_EIR_DATA_EVT:
+            log_i("ESP_BT_GAP_CONFIG_EIR_DATA_EVT: stat:%d num:%d", param->config_eir_data.stat, param->config_eir_data.eir_type_num);
+            break;
+
+        case ESP_BT_GAP_READ_REMOTE_NAME_EVT:
+            if (param->read_rmt_name.stat == ESP_BT_STATUS_SUCCESS ) {
+                log_i("ESP_BT_GAP_READ_REMOTE_NAME_EVT: %s", param->read_rmt_name.rmt_name);
+            } else {
+                log_i("ESP_BT_GAP_READ_REMOTE_NAME_EVT: no success stat:%d", param->read_rmt_name.stat);
+            }
+            break;
+
+        case ESP_BT_GAP_MODE_CHG_EVT:
+            log_i("ESP_BT_GAP_MODE_CHG_EVT: mode: %d", param->mode_chg.mode);
+            break;
+
         default:
+            log_i("ESP-BT_GAP_* unknown message: %d", event);
             break;
     }
 }
@@ -546,6 +608,7 @@ static bool _init_bt(const char *deviceName)
         xEventGroupClearBits(_spp_event_group, 0xFFFFFF);
         xEventGroupSetBits(_spp_event_group, SPP_CONGESTED);
         xEventGroupSetBits(_spp_event_group, SPP_DISCONNECTED);
+        xEventGroupSetBits(_spp_event_group, SPP_CLOSED);
     }
     if (_spp_rx_queue == NULL){
         _spp_rx_queue = xQueueCreate(RX_QUEUE_SIZE, sizeof(uint8_t)); //initialize the queue
@@ -623,6 +686,7 @@ static bool _init_bt(const char *deviceName)
     esp_bt_dev_set_device_name(deviceName);
 
     if (_isPinSet) {
+        log_i("pin set");
         btSetPin();
     }
 
@@ -690,7 +754,16 @@ static bool _stop_bt()
 
 static bool waitForConnect(int timeout) {
     TickType_t xTicksToWait = timeout / portTICK_PERIOD_MS;
-    return (xEventGroupWaitBits(_spp_event_group, SPP_CONNECTED, pdFALSE, pdTRUE, xTicksToWait) & SPP_CONNECTED) != 0;
+    // wait for connected or closed
+    EventBits_t rc = xEventGroupWaitBits(_spp_event_group, SPP_CONNECTED | SPP_CLOSED, pdFALSE, pdFALSE, xTicksToWait);
+    if((rc & SPP_CONNECTED) != 0)
+        return true;
+    else if((rc & SPP_CLOSED) != 0) {
+        log_d("connection closed!");
+        return false;
+    }
+    log_d("timeout");
+    return false;
 }
 
 static bool waitForDiscovered(int timeout) {
@@ -698,6 +771,11 @@ static bool waitForDiscovered(int timeout) {
     return (xEventGroupWaitBits(_spp_event_group, BT_DISCOVERY_COMPLETED, pdFALSE, pdTRUE, xTicksToWait) & BT_DISCOVERY_COMPLETED) != 0;
 }
 
+static bool waitForSDPRecord(int timeout) {
+    TickType_t xTicksToWait = timeout / portTICK_PERIOD_MS;
+    return (xEventGroupWaitBits(_bt_event_group, BT_SDP_COMPLETED, pdFALSE, pdTRUE, xTicksToWait) & BT_SDP_COMPLETED) != 0;
+}
+
 /*
  * Serial Bluetooth Arduino
  *
@@ -713,6 +791,9 @@ BluetoothSerial::~BluetoothSerial(void)
     _stop_bt();
 }
 
+/**
+ * @Param isMaster set to true if you want to connect to an other device
+ */
 bool BluetoothSerial::begin(String localName, bool isMaster)
 {
     _isMaster = isMaster;
@@ -733,7 +814,7 @@ int BluetoothSerial::available(void)
 int BluetoothSerial::peek(void)
 {
     uint8_t c;
-    if (_spp_rx_queue && xQueuePeek(_spp_rx_queue, &c, 0)){
+    if (_spp_rx_queue && xQueuePeek(_spp_rx_queue, &c, this->timeoutTicks)){
         return c;
     }
     return -1;
@@ -744,16 +825,24 @@ bool BluetoothSerial::hasClient(void)
     return _spp_client > 0;
 }
 
-int BluetoothSerial::read(void)
+int BluetoothSerial::read()
 {
 
     uint8_t c = 0;
-    if (_spp_rx_queue && xQueueReceive(_spp_rx_queue, &c, 0)){
+    if (_spp_rx_queue && xQueueReceive(_spp_rx_queue, &c, this->timeoutTicks)){
         return c;
     }
     return -1;
 }
 
+/**
+ * Set timeout for read / peek
+ */
+void BluetoothSerial::setTimeout(int timeoutMS)
+{
+    this->timeoutTicks=timeoutMS / portTICK_PERIOD_MS;
+}
+
 size_t BluetoothSerial::write(uint8_t c)
 {
     return write(&c, 1);
@@ -812,6 +901,7 @@ void BluetoothSerial::enableSSP() {
      * Use fixed pin code
 */
 bool BluetoothSerial::setPin(const char *pin) {
+    log_i("pin: %s", pin);
     bool isEmpty =  !(pin  && *pin);
     if (isEmpty && !_isPinSet) {
         return true; // nothing to do
@@ -837,7 +927,10 @@ bool BluetoothSerial::connect(String remoteName)
         return false; 
     }
     disconnect();
+    _doConnect = true;
     _isRemoteAddressSet = false;
+	_sec_mask = ESP_SPP_SEC_ENCRYPT|ESP_SPP_SEC_AUTHENTICATE;
+	_role = ESP_SPP_ROLE_MASTER;
     strncpy(_remote_name, remoteName.c_str(), ESP_BT_GAP_MAX_BDNAME_LEN);
     _remote_name[ESP_BT_GAP_MAX_BDNAME_LEN] = 0;
     log_i("master : remoteName");
@@ -847,13 +940,23 @@ bool BluetoothSerial::connect(String remoteName)
 #else
         esp_bt_gap_set_scan_mode(ESP_BT_SCAN_MODE_CONNECTABLE_DISCOVERABLE);
 #endif
+    xEventGroupClearBits(_spp_event_group, SPP_CLOSED);
     if (esp_bt_gap_start_discovery(ESP_BT_INQ_MODE_GENERAL_INQUIRY, INQ_LEN, INQ_NUM_RSPS) == ESP_OK) {
         return waitForConnect(SCAN_TIMEOUT);
     }
     return false;
 }
 
-bool BluetoothSerial::connect(uint8_t remoteAddress[])
+/**
+ * @Param channel: specify channel or 0 for auto-detect
+ * @Param sec_mask:
+ *           ESP_SPP_SEC_ENCRYPT|ESP_SPP_SEC_AUTHENTICATE
+ *           ESP_SPP_SEC_NONE
+ * @Param role:
+ *           ESP_SPP_ROLE_MASTER   master can handle up to 7 connections to slaves
+ *           ESP_SPP_ROLE_SLAVE    can only have one connection to a master
+ */
+bool BluetoothSerial::connect(uint8_t remoteAddress[], int channel, esp_spp_sec_t sec_mask, esp_spp_role_t role)
 {
     if (!isReady(true, READY_TIMEOUT)) return false;
     if (!remoteAddress) {
@@ -861,10 +964,35 @@ bool BluetoothSerial::connect(uint8_t remoteAddress[])
         return false; 
     }
     disconnect();
+    _doConnect = true;
     _remote_name[0] = 0;
     _isRemoteAddressSet = true;
+	_sec_mask = sec_mask;
+	_role = role;
     memcpy(_peer_bd_addr, remoteAddress, ESP_BD_ADDR_LEN);
     log_i("master : remoteAddress");
+    xEventGroupClearBits(_spp_event_group, SPP_CLOSED);
+    if (channel > 0) {
+        char bda_str[18];
+        log_i("spp connect to remote %s channel %d",
+            bda2str(_peer_bd_addr, bda_str, sizeof(bda_str)),
+            channel);
+        if(esp_spp_connect(sec_mask, role, channel, _peer_bd_addr) != ESP_OK ) {
+			log_e("spp connect failed");
+			return false;
+		}
+        bool rc=waitForConnect(READY_TIMEOUT);
+        if(rc) {
+            log_i("connected");
+        } else {
+            if(this->isClosed()) {
+                log_e("connect failed");
+            } else {
+                log_e("connect timed out after %dms", READY_TIMEOUT);
+            }
+        }
+        return rc;
+    }
     if (esp_spp_start_discovery(_peer_bd_addr) == ESP_OK) {
         return waitForConnect(READY_TIMEOUT);
     }
@@ -874,6 +1002,7 @@ bool BluetoothSerial::connect(uint8_t remoteAddress[])
 bool BluetoothSerial::connect()
 {
     if (!isReady(true, READY_TIMEOUT)) return false;
+    _doConnect = true;
     if (_isRemoteAddressSet){
         disconnect();
         // use resolved or set address first
@@ -924,6 +1053,13 @@ bool BluetoothSerial::connected(int timeout) {
     return waitForConnect(timeout);
 }
 
+/**
+ * true if a connection terminated or a connection attempt failed
+ */
+bool BluetoothSerial::isClosed() {
+    return xEventGroupGetBits(_spp_event_group) & SPP_CLOSED;
+}
+
 bool BluetoothSerial::isReady(bool checkMaster, int timeout) {
     if (checkMaster && !_isMaster) {
         log_e("Master mode is not active. Call begin(localName, true) to enable Master mode");
@@ -956,6 +1092,7 @@ BTScanResults* BluetoothSerial::discover(int timeoutMs) {
     esp_bt_gap_set_scan_mode(ESP_BT_CONNECTABLE, ESP_BT_GENERAL_DISCOVERABLE);
     if (esp_bt_gap_start_discovery(ESP_BT_INQ_MODE_GENERAL_INQUIRY, timeout, 0) == ESP_OK) {
         waitForDiscovered(timeoutMs);
+        log_i("gap_cancel_discovery()");
         esp_bt_gap_cancel_discovery();
     }
     return &scanResults;
@@ -1008,4 +1145,31 @@ BluetoothSerial::operator bool() const
 {
     return true;
 }
+
+/**
+ * SDP scan address
+ * esp_spp_start_discovery doesn't tell us the btAddress in the callback, so we have to wait until it's finished
+ */
+std::map<int, std::string> BluetoothSerial::getChannels(const BTAddress &remoteAddress) {
+    if(xEventGroupGetBits(_bt_event_group) & BT_SDP_RUNNING) {
+        log_e("getChannels failed - already running");
+    }
+    xEventGroupSetBits(_bt_event_group, BT_SDP_RUNNING);
+    xEventGroupClearBits(_bt_event_group, BT_SDP_COMPLETED);
+    _doConnect = false;
+    sdpRecords.clear();
+    log_d("esp_spp_start_discovery");
+    if (esp_spp_start_discovery(*remoteAddress.getNative()) != ESP_OK) {
+        log_e("esp_spp_start_discovery failed");
+    } else {
+        if(! waitForSDPRecord(READY_TIMEOUT)) {
+            log_e("getChannels failed timeout");
+        }
+        log_d("esp_spp_start_discovery wait for BT_SDP_COMPLETED done (%dms)", READY_TIMEOUT);
+    }
+    log_d("esp_spp_start_discovery done, found %d services", sdpRecords.size());
+    xEventGroupClearBits(_bt_event_group, BT_SDP_RUNNING);
+    return sdpRecords;
+}
+
 #endif
diff --git a/libraries/BluetoothSerial/src/BluetoothSerial.h b/libraries/BluetoothSerial/src/BluetoothSerial.h
index cfb8b823045..0c087b06360 100644
--- a/libraries/BluetoothSerial/src/BluetoothSerial.h
+++ b/libraries/BluetoothSerial/src/BluetoothSerial.h
@@ -24,6 +24,7 @@
 #include <esp_gap_bt_api.h>
 #include <esp_spp_api.h>
 #include <functional>
+#include <map>
 #include "BTScan.h"
 
 typedef std::function<void(const uint8_t *buffer, size_t size)> BluetoothSerialDataCb;
@@ -50,6 +51,7 @@ class BluetoothSerial: public Stream
         size_t write(const uint8_t *buffer, size_t size);
         void flush();
         void end(void);
+        void setTimeout(int timeoutMS);
         void onData(BluetoothSerialDataCb cb);
         esp_err_t register_callback(esp_spp_cb_t * callback);
         
@@ -60,9 +62,12 @@ class BluetoothSerial: public Stream
         void enableSSP();
         bool setPin(const char *pin);
         bool connect(String remoteName);
-        bool connect(uint8_t remoteAddress[]);
+        bool connect(uint8_t remoteAddress[], int channel=0, esp_spp_sec_t sec_mask=(ESP_SPP_SEC_ENCRYPT|ESP_SPP_SEC_AUTHENTICATE), esp_spp_role_t role=ESP_SPP_ROLE_MASTER);
+        bool connect(const BTAddress &remoteAddress, int channel=0, esp_spp_sec_t sec_mask=(ESP_SPP_SEC_ENCRYPT|ESP_SPP_SEC_AUTHENTICATE), esp_spp_role_t role=ESP_SPP_ROLE_MASTER) {
+			return connect(*remoteAddress.getNative(), channel, sec_mask); };
         bool connect();
         bool connected(int timeout=0);
+        bool isClosed();
         bool isReady(bool checkMaster=false, int timeout=0);
         bool disconnect();
         bool unpairDevice(uint8_t remoteAddress[]);
@@ -73,6 +78,8 @@ class BluetoothSerial: public Stream
         void discoverClear();
         BTScanResults* getScanResults();
         
+        std::map<int, std::string> getChannels(const BTAddress &remoteAddress);
+
         const int INQ_TIME = 1280;   // Inquire Time unit 1280 ms
         const int MIN_INQ_TIME = (ESP_BT_GAP_MIN_INQ_LEN * INQ_TIME);
         const int MAX_INQ_TIME = (ESP_BT_GAP_MAX_INQ_LEN * INQ_TIME);
@@ -80,7 +87,7 @@ class BluetoothSerial: public Stream
         operator bool() const;
     private:
         String local_name;
-
+        int timeoutTicks=0;
 };
 
 #endif
diff --git a/libraries/DNSServer/src/DNSServer.h b/libraries/DNSServer/src/DNSServer.h
index a10ef9eaaf1..f237a4e358d 100644
--- a/libraries/DNSServer/src/DNSServer.h
+++ b/libraries/DNSServer/src/DNSServer.h
@@ -66,8 +66,8 @@ struct DNSHeader
 
 struct DNSQuestion
 {
-  uint8_t   QName[255] ;
-  int8_t    QNameLength ; 
+  uint8_t   QName[256] ; //need 1 Byte for zero termination!
+  uint16_t  QNameLength ; 
   uint16_t  QType ; 
   uint16_t  QClass ; 
 } ; 
@@ -106,4 +106,4 @@ class DNSServer
     void replyWithIP();
     void replyWithCustomCode();
 };
-#endif
\ No newline at end of file
+#endif
diff --git a/libraries/ESP32/examples/AnalogOut/LEDCSoftwareFade/LEDCSoftwareFade.ino b/libraries/ESP32/examples/AnalogOut/LEDCSoftwareFade/LEDCSoftwareFade.ino
index a4f2e5b41ba..c8b3e139396 100644
--- a/libraries/ESP32/examples/AnalogOut/LEDCSoftwareFade/LEDCSoftwareFade.ino
+++ b/libraries/ESP32/examples/AnalogOut/LEDCSoftwareFade/LEDCSoftwareFade.ino
@@ -13,8 +13,8 @@
 // use first channel of 16 channels (started from zero)
 #define LEDC_CHANNEL_0     0
 
-// use 13 bit precission for LEDC timer
-#define LEDC_TIMER_13_BIT  13
+// use 12 bit precission for LEDC timer
+#define LEDC_TIMER_12_BIT  12
 
 // use 5000 Hz as a LEDC base frequency
 #define LEDC_BASE_FREQ     5000
@@ -28,8 +28,8 @@ int fadeAmount = 5;    // how many points to fade the LED by
 // Arduino like analogWrite
 // value has to be between 0 and valueMax
 void ledcAnalogWrite(uint8_t channel, uint32_t value, uint32_t valueMax = 255) {
-  // calculate duty, 8191 from 2 ^ 13 - 1
-  uint32_t duty = (8191 / valueMax) * min(value, valueMax);
+  // calculate duty, 4095 from 2 ^ 12 - 1
+  uint32_t duty = (4095 / valueMax) * min(value, valueMax);
 
   // write duty to LEDC
   ledcWrite(channel, duty);
@@ -37,7 +37,7 @@ void ledcAnalogWrite(uint8_t channel, uint32_t value, uint32_t valueMax = 255) {
 
 void setup() {
   // Setup timer and attach timer to a led pin
-  ledcSetup(LEDC_CHANNEL_0, LEDC_BASE_FREQ, LEDC_TIMER_13_BIT);
+  ledcSetup(LEDC_CHANNEL_0, LEDC_BASE_FREQ, LEDC_TIMER_12_BIT);
   ledcAttachPin(LED_PIN, LEDC_CHANNEL_0);
 }
 
diff --git a/libraries/ESP32/examples/AnalogRead/AnalogRead.ino b/libraries/ESP32/examples/AnalogRead/AnalogRead.ino
new file mode 100644
index 00000000000..c238517d380
--- /dev/null
+++ b/libraries/ESP32/examples/AnalogRead/AnalogRead.ino
@@ -0,0 +1,19 @@
+void setup() {
+  // initialize serial communication at 115200 bits per second:
+  Serial.begin(115200);
+  
+  //set the resolution to 12 bits (0-4096)
+  analogReadResolution(12);
+}
+
+void loop() {
+  // read the analog / millivolts value for pin 2:
+  int analogValue = analogRead(2);
+  int analogVolts = analogReadMilliVolts(2);
+  
+  // print out the values you read:
+  Serial.printf("ADC analog value = %d\n",analogValue);
+  Serial.printf("ADC millivolts value = %d\n",analogVolts);
+  
+  delay(100);  // delay in between reads for clear read from serial
+}
diff --git a/libraries/ESP32/examples/Camera/CameraWebServer/CameraWebServer.ino b/libraries/ESP32/examples/Camera/CameraWebServer/CameraWebServer.ino
index 44ff625bf05..0e268b4fefa 100644
--- a/libraries/ESP32/examples/Camera/CameraWebServer/CameraWebServer.ino
+++ b/libraries/ESP32/examples/Camera/CameraWebServer/CameraWebServer.ino
@@ -6,22 +6,35 @@
 //            Ensure ESP32 Wrover Module or other board with PSRAM is selected
 //            Partial images will be transmitted if image exceeds buffer size
 //
+//            You must select partition scheme from the board menu that has at least 3MB APP space.
+//            Face Recognition is DISABLED for ESP32 and ESP32-S2, because it takes up from 15 
+//            seconds to process single frame. Face Detection is ENABLED if PSRAM is enabled as well
 
+// ===================
 // Select camera model
-#define CAMERA_MODEL_WROVER_KIT // Has PSRAM
+// ===================
+//#define CAMERA_MODEL_WROVER_KIT // Has PSRAM
 //#define CAMERA_MODEL_ESP_EYE // Has PSRAM
+//#define CAMERA_MODEL_ESP32S3_EYE // Has PSRAM
 //#define CAMERA_MODEL_M5STACK_PSRAM // Has PSRAM
 //#define CAMERA_MODEL_M5STACK_V2_PSRAM // M5Camera version B Has PSRAM
 //#define CAMERA_MODEL_M5STACK_WIDE // Has PSRAM
 //#define CAMERA_MODEL_M5STACK_ESP32CAM // No PSRAM
 //#define CAMERA_MODEL_M5STACK_UNITCAM // No PSRAM
-//#define CAMERA_MODEL_AI_THINKER // Has PSRAM
+#define CAMERA_MODEL_AI_THINKER // Has PSRAM
 //#define CAMERA_MODEL_TTGO_T_JOURNAL // No PSRAM
+// ** Espressif Internal Boards **
+//#define CAMERA_MODEL_ESP32_CAM_BOARD
+//#define CAMERA_MODEL_ESP32S2_CAM_BOARD
+//#define CAMERA_MODEL_ESP32S3_CAM_LCD
 
 #include "camera_pins.h"
 
-const char* ssid = "*********";
-const char* password = "*********";
+// ===========================
+// Enter your WiFi credentials
+// ===========================
+const char* ssid = "**********";
+const char* password = "**********";
 
 void startCameraServer();
 
@@ -50,18 +63,32 @@ void setup() {
   config.pin_pwdn = PWDN_GPIO_NUM;
   config.pin_reset = RESET_GPIO_NUM;
   config.xclk_freq_hz = 20000000;
-  config.pixel_format = PIXFORMAT_JPEG;
+  config.frame_size = FRAMESIZE_UXGA;
+  config.pixel_format = PIXFORMAT_JPEG; // for streaming
+  //config.pixel_format = PIXFORMAT_RGB565; // for face detection/recognition
+  config.grab_mode = CAMERA_GRAB_WHEN_EMPTY;
+  config.fb_location = CAMERA_FB_IN_PSRAM;
+  config.jpeg_quality = 12;
+  config.fb_count = 1;
   
   // if PSRAM IC present, init with UXGA resolution and higher JPEG quality
   //                      for larger pre-allocated frame buffer.
-  if(psramFound()){
-    config.frame_size = FRAMESIZE_UXGA;
-    config.jpeg_quality = 10;
-    config.fb_count = 2;
+  if(config.pixel_format == PIXFORMAT_JPEG){
+    if(psramFound()){
+      config.jpeg_quality = 10;
+      config.fb_count = 2;
+      config.grab_mode = CAMERA_GRAB_LATEST;
+    } else {
+      // Limit the frame size when PSRAM is not available
+      config.frame_size = FRAMESIZE_SVGA;
+      config.fb_location = CAMERA_FB_IN_DRAM;
+    }
   } else {
-    config.frame_size = FRAMESIZE_SVGA;
-    config.jpeg_quality = 12;
-    config.fb_count = 1;
+    // Best option for face detection/recognition
+    config.frame_size = FRAMESIZE_240X240;
+#if CONFIG_IDF_TARGET_ESP32S3
+    config.fb_count = 2;
+#endif
   }
 
 #if defined(CAMERA_MODEL_ESP_EYE)
@@ -84,14 +111,21 @@ void setup() {
     s->set_saturation(s, -2); // lower the saturation
   }
   // drop down frame size for higher initial frame rate
-  s->set_framesize(s, FRAMESIZE_QVGA);
+  if(config.pixel_format == PIXFORMAT_JPEG){
+    s->set_framesize(s, FRAMESIZE_QVGA);
+  }
 
 #if defined(CAMERA_MODEL_M5STACK_WIDE) || defined(CAMERA_MODEL_M5STACK_ESP32CAM)
   s->set_vflip(s, 1);
   s->set_hmirror(s, 1);
 #endif
 
+#if defined(CAMERA_MODEL_ESP32S3_EYE)
+  s->set_vflip(s, 1);
+#endif
+
   WiFi.begin(ssid, password);
+  WiFi.setSleep(false);
 
   while (WiFi.status() != WL_CONNECTED) {
     delay(500);
@@ -108,6 +142,6 @@ void setup() {
 }
 
 void loop() {
-  // put your main code here, to run repeatedly:
+  // Do nothing. Everything is done in another task by the web server
   delay(10000);
 }
diff --git a/libraries/ESP32/examples/Camera/CameraWebServer/app_httpd.cpp b/libraries/ESP32/examples/Camera/CameraWebServer/app_httpd.cpp
index 278964720f1..79ff0ba6aa1 100644
--- a/libraries/ESP32/examples/Camera/CameraWebServer/app_httpd.cpp
+++ b/libraries/ESP32/examples/Camera/CameraWebServer/app_httpd.cpp
@@ -17,7 +17,6 @@
 #include "img_converters.h"
 #include "fb_gfx.h"
 #include "driver/ledc.h"
-//#include "camera_index.h"
 #include "sdkconfig.h"
 #include "camera_index.h"
 
@@ -29,14 +28,37 @@
 static const char *TAG = "camera_httpd";
 #endif
 
+// Face Detection will not work on boards without (or with disabled) PSRAM 
+#ifdef BOARD_HAS_PSRAM
+#define CONFIG_ESP_FACE_DETECT_ENABLED 1
+// Face Recognition takes upward from 15 seconds per frame on chips other than ESP32S3
+// Makes no sense to have it enabled for them
+#if CONFIG_IDF_TARGET_ESP32S3
+#define CONFIG_ESP_FACE_RECOGNITION_ENABLED 1
+#else
+#define CONFIG_ESP_FACE_RECOGNITION_ENABLED 0
+#endif
+#else
+#define CONFIG_ESP_FACE_DETECT_ENABLED 0
+#define CONFIG_ESP_FACE_RECOGNITION_ENABLED 0
+#endif
+
 #if CONFIG_ESP_FACE_DETECT_ENABLED
 
-#include "fd_forward.h"
+#include <vector>
+#include "human_face_detect_msr01.hpp"
+#include "human_face_detect_mnp01.hpp"
+
+#define TWO_STAGE 1 /*<! 1: detect by two-stage which is more accurate but slower(with keypoints). */
+                    /*<! 0: detect by one-stage which is less accurate but faster(without keypoints). */
 
 #if CONFIG_ESP_FACE_RECOGNITION_ENABLED
-#include "fr_forward.h"
+#include "face_recognition_tool.hpp"
+#include "face_recognition_112_v1_s16.hpp"
+#include "face_recognition_112_v1_s8.hpp"
+
+#define QUANT_TYPE 0 //if set to 1 => very large firmware, very slow, reboots when streaming...
 
-#define ENROLL_CONFIRM_TIMES 5
 #define FACE_ID_SAVE_NUMBER 7
 #endif
 
@@ -78,12 +100,24 @@ httpd_handle_t camera_httpd = NULL;
 
 static int8_t detection_enabled = 0;
 
-static mtmn_config_t mtmn_config = {0};
+// #if TWO_STAGE
+// static HumanFaceDetectMSR01 s1(0.1F, 0.5F, 10, 0.2F);
+// static HumanFaceDetectMNP01 s2(0.5F, 0.3F, 5);
+// #else
+// static HumanFaceDetectMSR01 s1(0.3F, 0.5F, 10, 0.2F);
+// #endif
 
 #if CONFIG_ESP_FACE_RECOGNITION_ENABLED
 static int8_t recognition_enabled = 0;
 static int8_t is_enrolling = 0;
-static face_id_list id_list = {0};
+
+#if QUANT_TYPE
+    // S16 model
+    FaceRecognition112V1S16 recognizer;
+#else
+    // S8 model
+    FaceRecognition112V1S8 recognizer;
+#endif
 #endif
 
 #endif
@@ -134,18 +168,12 @@ static int ra_filter_run(ra_filter_t *filter, int value)
 
 #if CONFIG_ESP_FACE_DETECT_ENABLED
 #if CONFIG_ESP_FACE_RECOGNITION_ENABLED
-static void rgb_print(dl_matrix3du_t *image_matrix, uint32_t color, const char *str)
+static void rgb_print(fb_data_t *fb, uint32_t color, const char *str)
 {
-    fb_data_t fb;
-    fb.width = image_matrix->w;
-    fb.height = image_matrix->h;
-    fb.data = image_matrix->item;
-    fb.bytes_per_pixel = 3;
-    fb.format = FB_BGR888;
-    fb_gfx_print(&fb, (fb.width - (strlen(str) * 14)) / 2, 10, color, str);
+    fb_gfx_print(fb, (fb->width - (strlen(str) * 14)) / 2, 10, color, str);
 }
 
-static int rgb_printf(dl_matrix3du_t *image_matrix, uint32_t color, const char *format, ...)
+static int rgb_printf(fb_data_t *fb, uint32_t color, const char *format, ...)
 {
     char loc_buf[64];
     char *temp = loc_buf;
@@ -166,7 +194,7 @@ static int rgb_printf(dl_matrix3du_t *image_matrix, uint32_t color, const char *
     }
     vsnprintf(temp, len + 1, format, arg);
     va_end(arg);
-    rgb_print(image_matrix, color, temp);
+    rgb_print(fb, color, temp);
     if (len > 64)
     {
         free(temp);
@@ -174,9 +202,9 @@ static int rgb_printf(dl_matrix3du_t *image_matrix, uint32_t color, const char *
     return len;
 }
 #endif
-static void draw_face_boxes(dl_matrix3du_t *image_matrix, box_array_t *boxes, int face_id)
+static void draw_face_boxes(fb_data_t *fb, std::list<dl::detect::result_t> *results, int face_id)
 {
-    int x, y, w, h, i;
+    int x, y, w, h;
     uint32_t color = FACE_COLOR_YELLOW;
     if (face_id < 0)
     {
@@ -186,89 +214,64 @@ static void draw_face_boxes(dl_matrix3du_t *image_matrix, box_array_t *boxes, in
     {
         color = FACE_COLOR_GREEN;
     }
-    fb_data_t fb;
-    fb.width = image_matrix->w;
-    fb.height = image_matrix->h;
-    fb.data = image_matrix->item;
-    fb.bytes_per_pixel = 3;
-    fb.format = FB_BGR888;
-    for (i = 0; i < boxes->len; i++)
+    if(fb->bytes_per_pixel == 2){
+        //color = ((color >> 8) & 0xF800) | ((color >> 3) & 0x07E0) | (color & 0x001F);
+        color = ((color >> 16) & 0x001F) | ((color >> 3) & 0x07E0) | ((color << 8) & 0xF800);
+    }
+    int i = 0;
+    for (std::list<dl::detect::result_t>::iterator prediction = results->begin(); prediction != results->end(); prediction++, i++)
     {
         // rectangle box
-        x = (int)boxes->box[i].box_p[0];
-        y = (int)boxes->box[i].box_p[1];
-        w = (int)boxes->box[i].box_p[2] - x + 1;
-        h = (int)boxes->box[i].box_p[3] - y + 1;
-        fb_gfx_drawFastHLine(&fb, x, y, w, color);
-        fb_gfx_drawFastHLine(&fb, x, y + h - 1, w, color);
-        fb_gfx_drawFastVLine(&fb, x, y, h, color);
-        fb_gfx_drawFastVLine(&fb, x + w - 1, y, h, color);
-#if 0
-        // landmark
+        x = (int)prediction->box[0];
+        y = (int)prediction->box[1];
+        w = (int)prediction->box[2] - x + 1;
+        h = (int)prediction->box[3] - y + 1;
+        if((x + w) > fb->width){
+            w = fb->width - x;
+        }
+        if((y + h) > fb->height){
+            h = fb->height - y;
+        }
+        fb_gfx_drawFastHLine(fb, x, y, w, color);
+        fb_gfx_drawFastHLine(fb, x, y + h - 1, w, color);
+        fb_gfx_drawFastVLine(fb, x, y, h, color);
+        fb_gfx_drawFastVLine(fb, x + w - 1, y, h, color);
+#if TWO_STAGE
+        // landmarks (left eye, mouth left, nose, right eye, mouth right)
         int x0, y0, j;
         for (j = 0; j < 10; j+=2) {
-            x0 = (int)boxes->landmark[i].landmark_p[j];
-            y0 = (int)boxes->landmark[i].landmark_p[j+1];
-            fb_gfx_fillRect(&fb, x0, y0, 3, 3, color);
+            x0 = (int)prediction->keypoint[j];
+            y0 = (int)prediction->keypoint[j+1];
+            fb_gfx_fillRect(fb, x0, y0, 3, 3, color);
         }
 #endif
     }
 }
 
 #if CONFIG_ESP_FACE_RECOGNITION_ENABLED
-static int run_face_recognition(dl_matrix3du_t *image_matrix, box_array_t *net_boxes)
+static int run_face_recognition(fb_data_t *fb, std::list<dl::detect::result_t> *results)
 {
-    dl_matrix3du_t *aligned_face = NULL;
-    int matched_id = 0;
+    std::vector<int> landmarks = results->front().keypoint;
+    int id = -1;
 
-    aligned_face = dl_matrix3du_alloc(1, FACE_WIDTH, FACE_HEIGHT, 3);
-    if (!aligned_face)
-    {
-        ESP_LOGE(TAG, "Could not allocate face recognition buffer");
-        return matched_id;
-    }
-    if (align_face(net_boxes, image_matrix, aligned_face) == ESP_OK)
-    {
-        if (is_enrolling == 1)
-        {
-            int8_t left_sample_face = enroll_face(&id_list, aligned_face);
+    Tensor<uint8_t> tensor;
+    tensor.set_element((uint8_t *)fb->data).set_shape({fb->height, fb->width, 3}).set_auto_free(false);
 
-            if (left_sample_face == (ENROLL_CONFIRM_TIMES - 1))
-            {
-                ESP_LOGD(TAG, "Enrolling Face ID: %d", id_list.tail);
-            }
-            ESP_LOGD(TAG, "Enrolling Face ID: %d sample %d", id_list.tail, ENROLL_CONFIRM_TIMES - left_sample_face);
-            rgb_printf(image_matrix, FACE_COLOR_CYAN, "ID[%u] Sample[%u]", id_list.tail, ENROLL_CONFIRM_TIMES - left_sample_face);
-            if (left_sample_face == 0)
-            {
-                is_enrolling = 0;
-                ESP_LOGD(TAG, "Enrolled Face ID: %d", id_list.tail);
-            }
-        }
-        else
-        {
-            matched_id = recognize_face(&id_list, aligned_face);
-            if (matched_id >= 0)
-            {
-                ESP_LOGW(TAG, "Match Face ID: %u", matched_id);
-                rgb_printf(image_matrix, FACE_COLOR_GREEN, "Hello Subject %u", matched_id);
-            }
-            else
-            {
-                ESP_LOGW(TAG, "No Match Found");
-                rgb_print(image_matrix, FACE_COLOR_RED, "Intruder Alert!");
-                matched_id = -1;
-            }
-        }
-    }
-    else
-    {
-        ESP_LOGW(TAG, "Face Not Aligned");
-        //rgb_print(image_matrix, FACE_COLOR_YELLOW, "Human Detected");
+    int enrolled_count = recognizer.get_enrolled_id_num();
+
+    if (enrolled_count < FACE_ID_SAVE_NUMBER && is_enrolling){
+        id = recognizer.enroll_id(tensor, landmarks, "", true);
+        ESP_LOGI(TAG, "Enrolled ID: %d", id);
+        rgb_printf(fb, FACE_COLOR_CYAN, "ID[%u]", id);
     }
 
-    dl_matrix3du_free(aligned_face);
-    return matched_id;
+    face_info_t recognize = recognizer.recognize(tensor, landmarks);
+    if(recognize.id >= 0){
+        rgb_printf(fb, FACE_COLOR_GREEN, "ID[%u]: %.2f", recognize.id, recognize.similarity);
+    } else {
+        rgb_print(fb, FACE_COLOR_RED, "Intruder Alert!");
+    }
+    return recognize.id;
 }
 #endif
 #endif
@@ -399,55 +402,88 @@ static esp_err_t capture_handler(httpd_req_t *req)
 #if CONFIG_ESP_FACE_DETECT_ENABLED
     }
 
-    dl_matrix3du_t *image_matrix = dl_matrix3du_alloc(1, fb->width, fb->height, 3);
-    if (!image_matrix)
-    {
-        esp_camera_fb_return(fb);
-        ESP_LOGE(TAG, "dl_matrix3du_alloc failed");
-        httpd_resp_send_500(req);
-        return ESP_FAIL;
-    }
-
-    out_buf = image_matrix->item;
-    out_len = fb->width * fb->height * 3;
-    out_width = fb->width;
-    out_height = fb->height;
+    jpg_chunking_t jchunk = {req, 0};
 
-    s = fmt2rgb888(fb->buf, fb->len, fb->format, out_buf);
-    esp_camera_fb_return(fb);
-    if (!s)
+    if (fb->format == PIXFORMAT_RGB565
+#if CONFIG_ESP_FACE_RECOGNITION_ENABLED
+     && !recognition_enabled
+#endif
+     ){
+#if TWO_STAGE
+        HumanFaceDetectMSR01 s1(0.1F, 0.5F, 10, 0.2F);
+        HumanFaceDetectMNP01 s2(0.5F, 0.3F, 5);
+        std::list<dl::detect::result_t> &candidates = s1.infer((uint16_t *)fb->buf, {(int)fb->height, (int)fb->width, 3});
+        std::list<dl::detect::result_t> &results = s2.infer((uint16_t *)fb->buf, {(int)fb->height, (int)fb->width, 3}, candidates);
+#else
+        HumanFaceDetectMSR01 s1(0.3F, 0.5F, 10, 0.2F);
+        std::list<dl::detect::result_t> &results = s1.infer((uint16_t *)fb->buf, {(int)fb->height, (int)fb->width, 3});
+#endif
+        if (results.size() > 0) {
+            fb_data_t rfb;
+            rfb.width = fb->width;
+            rfb.height = fb->height;
+            rfb.data = fb->buf;
+            rfb.bytes_per_pixel = 2;
+            rfb.format = FB_RGB565;
+            detected = true;
+            draw_face_boxes(&rfb, &results, face_id);
+        }
+        s = fmt2jpg_cb(fb->buf, fb->len, fb->width, fb->height, PIXFORMAT_RGB565, 90, jpg_encode_stream, &jchunk);
+        esp_camera_fb_return(fb);
+    } else 
     {
-        dl_matrix3du_free(image_matrix);
-        ESP_LOGE(TAG, "to rgb888 failed");
-        httpd_resp_send_500(req);
-        return ESP_FAIL;
-    }
+        out_len = fb->width * fb->height * 3;
+        out_width = fb->width;
+        out_height = fb->height;
+        out_buf = (uint8_t*)malloc(out_len);
+        if (!out_buf) {
+            ESP_LOGE(TAG, "out_buf malloc failed");
+            httpd_resp_send_500(req);
+            return ESP_FAIL;
+        }
+        s = fmt2rgb888(fb->buf, fb->len, fb->format, out_buf);
+        esp_camera_fb_return(fb);
+        if (!s) {
+            free(out_buf);
+            ESP_LOGE(TAG, "to rgb888 failed");
+            httpd_resp_send_500(req);
+            return ESP_FAIL;
+        }
 
-    box_array_t *net_boxes = face_detect(image_matrix, &mtmn_config);
+        fb_data_t rfb;
+        rfb.width = out_width;
+        rfb.height = out_height;
+        rfb.data = out_buf;
+        rfb.bytes_per_pixel = 3;
+        rfb.format = FB_BGR888;
+
+#if TWO_STAGE
+        HumanFaceDetectMSR01 s1(0.1F, 0.5F, 10, 0.2F);
+        HumanFaceDetectMNP01 s2(0.5F, 0.3F, 5);
+        std::list<dl::detect::result_t> &candidates = s1.infer((uint8_t *)out_buf, {(int)out_height, (int)out_width, 3});
+        std::list<dl::detect::result_t> &results = s2.infer((uint8_t *)out_buf, {(int)out_height, (int)out_width, 3}, candidates);
+#else
+        HumanFaceDetectMSR01 s1(0.3F, 0.5F, 10, 0.2F);
+        std::list<dl::detect::result_t> &results = s1.infer((uint8_t *)out_buf, {(int)out_height, (int)out_width, 3});
+#endif
 
-    if (net_boxes)
-    {
-        detected = true;
+        if (results.size() > 0) {
+            detected = true;
 #if CONFIG_ESP_FACE_RECOGNITION_ENABLED
-        if (recognition_enabled)
-        {
-            face_id = run_face_recognition(image_matrix, net_boxes);
-        }
+            if (recognition_enabled) {
+                face_id = run_face_recognition(&rfb, &results);
+            }
 #endif
-        draw_face_boxes(image_matrix, net_boxes, face_id);
-        dl_lib_free(net_boxes->score);
-        dl_lib_free(net_boxes->box);
-        if (net_boxes->landmark != NULL)
-            dl_lib_free(net_boxes->landmark);
-        dl_lib_free(net_boxes);
+            draw_face_boxes(&rfb, &results, face_id);
+        }
+
+        s = fmt2jpg_cb(out_buf, out_len, out_width, out_height, PIXFORMAT_RGB888, 90, jpg_encode_stream, &jchunk);
+        free(out_buf);
     }
 
-    jpg_chunking_t jchunk = {req, 0};
-    s = fmt2jpg_cb(out_buf, out_len, out_width, out_height, PIXFORMAT_RGB888, 90, jpg_encode_stream, &jchunk);
-    dl_matrix3du_free(image_matrix);
-    if (!s)
-    {
+    if (!s) {
         ESP_LOGE(TAG, "JPEG compression failed");
+        httpd_resp_send_500(req);
         return ESP_FAIL;
     }
 
@@ -466,7 +502,6 @@ static esp_err_t stream_handler(httpd_req_t *req)
     uint8_t *_jpg_buf = NULL;
     char *part_buf[128];
 #if CONFIG_ESP_FACE_DETECT_ENABLED
-    dl_matrix3du_t *image_matrix = NULL;
     bool detected = false;
     int face_id = 0;
     int64_t fr_start = 0;
@@ -474,6 +509,16 @@ static esp_err_t stream_handler(httpd_req_t *req)
     int64_t fr_face = 0;
     int64_t fr_recognize = 0;
     int64_t fr_encode = 0;
+
+    size_t out_len = 0, out_width = 0, out_height = 0;
+    uint8_t *out_buf = NULL;
+    bool s = false;
+#if TWO_STAGE
+    HumanFaceDetectMSR01 s1(0.1F, 0.5F, 10, 0.2F);
+    HumanFaceDetectMNP01 s2(0.5F, 0.3F, 5);
+#else
+    HumanFaceDetectMSR01 s1(0.3F, 0.5F, 10, 0.2F);
+#endif
 #endif
 
     static int64_t last_frame = 0;
@@ -542,65 +587,94 @@ static esp_err_t stream_handler(httpd_req_t *req)
             }
             else
             {
-
-                image_matrix = dl_matrix3du_alloc(1, fb->width, fb->height, 3);
-
-                if (!image_matrix)
-                {
-                    ESP_LOGE(TAG, "dl_matrix3du_alloc failed");
-                    res = ESP_FAIL;
-                }
-                else
-                {
-                    if (!fmt2rgb888(fb->buf, fb->len, fb->format, image_matrix->item))
-                    {
-                        ESP_LOGE(TAG, "fmt2rgb888 failed");
+                if (fb->format == PIXFORMAT_RGB565
+#if CONFIG_ESP_FACE_RECOGNITION_ENABLED
+                    && !recognition_enabled
+#endif
+                ){
+                    fr_ready = esp_timer_get_time();
+#if TWO_STAGE
+                    std::list<dl::detect::result_t> &candidates = s1.infer((uint16_t *)fb->buf, {(int)fb->height, (int)fb->width, 3});
+                    std::list<dl::detect::result_t> &results = s2.infer((uint16_t *)fb->buf, {(int)fb->height, (int)fb->width, 3}, candidates);
+#else
+                    std::list<dl::detect::result_t> &results = s1.infer((uint16_t *)fb->buf, {(int)fb->height, (int)fb->width, 3});
+#endif
+                    fr_face = esp_timer_get_time();
+                    fr_recognize = fr_face;
+                    if (results.size() > 0) {
+                        fb_data_t rfb;
+                        rfb.width = fb->width;
+                        rfb.height = fb->height;
+                        rfb.data = fb->buf;
+                        rfb.bytes_per_pixel = 2;
+                        rfb.format = FB_RGB565;
+                        detected = true;
+                        draw_face_boxes(&rfb, &results, face_id);
+                    }
+                    s = fmt2jpg(fb->buf, fb->len, fb->width, fb->height, PIXFORMAT_RGB565, 80, &_jpg_buf, &_jpg_buf_len);
+                    esp_camera_fb_return(fb);
+                    fb = NULL;
+                    if (!s) {
+                        ESP_LOGE(TAG, "fmt2jpg failed");
                         res = ESP_FAIL;
                     }
-                    else
-                    {
-                        fr_ready = esp_timer_get_time();
-                        box_array_t *net_boxes = NULL;
-                        if (detection_enabled)
-                        {
-                            net_boxes = face_detect(image_matrix, &mtmn_config);
-                        }
-                        fr_face = esp_timer_get_time();
-                        fr_recognize = fr_face;
-                        if (net_boxes || fb->format != PIXFORMAT_JPEG)
-                        {
-                            if (net_boxes)
-                            {
+                    fr_encode = esp_timer_get_time();
+                } else 
+                {
+                    out_len = fb->width * fb->height * 3;
+                    out_width = fb->width;
+                    out_height = fb->height;
+                    out_buf = (uint8_t*)malloc(out_len);
+                    if (!out_buf) {
+                        ESP_LOGE(TAG, "out_buf malloc failed");
+                        res = ESP_FAIL;
+                    } else {
+                        s = fmt2rgb888(fb->buf, fb->len, fb->format, out_buf);
+                        esp_camera_fb_return(fb);
+                        fb = NULL;
+                        if (!s) {
+                            free(out_buf);
+                            ESP_LOGE(TAG, "to rgb888 failed");
+                            res = ESP_FAIL;
+                        } else {
+                            fr_ready = esp_timer_get_time();
+
+                            fb_data_t rfb;
+                            rfb.width = out_width;
+                            rfb.height = out_height;
+                            rfb.data = out_buf;
+                            rfb.bytes_per_pixel = 3;
+                            rfb.format = FB_BGR888;
+
+#if TWO_STAGE
+                            std::list<dl::detect::result_t> &candidates = s1.infer((uint8_t *)out_buf, {(int)out_height, (int)out_width, 3});
+                            std::list<dl::detect::result_t> &results = s2.infer((uint8_t *)out_buf, {(int)out_height, (int)out_width, 3}, candidates);
+#else
+                            std::list<dl::detect::result_t> &results = s1.infer((uint8_t *)out_buf, {(int)out_height, (int)out_width, 3});
+#endif
+
+                            fr_face = esp_timer_get_time();
+                            fr_recognize = fr_face;
+
+                            if (results.size() > 0) {
                                 detected = true;
 #if CONFIG_ESP_FACE_RECOGNITION_ENABLED
-                                if (recognition_enabled)
-                                {
-                                    face_id = run_face_recognition(image_matrix, net_boxes);
+                                if (recognition_enabled) {
+                                    face_id = run_face_recognition(&rfb, &results);
+                                    fr_recognize = esp_timer_get_time();
                                 }
-                                fr_recognize = esp_timer_get_time();
 #endif
-                                draw_face_boxes(image_matrix, net_boxes, face_id);
-                                dl_lib_free(net_boxes->score);
-                                dl_lib_free(net_boxes->box);
-                                if (net_boxes->landmark != NULL)
-                                    dl_lib_free(net_boxes->landmark);
-                                dl_lib_free(net_boxes);
+                                draw_face_boxes(&rfb, &results, face_id);
                             }
-                            if (!fmt2jpg(image_matrix->item, fb->width * fb->height * 3, fb->width, fb->height, PIXFORMAT_RGB888, 90, &_jpg_buf, &_jpg_buf_len))
-                            {
+                            s = fmt2jpg(out_buf, out_len, out_width, out_height, PIXFORMAT_RGB888, 90, &_jpg_buf, &_jpg_buf_len);
+                            free(out_buf);
+                            if (!s) {
                                 ESP_LOGE(TAG, "fmt2jpg failed");
+                                res = ESP_FAIL;
                             }
-                            esp_camera_fb_return(fb);
-                            fb = NULL;
+                            fr_encode = esp_timer_get_time();
                         }
-                        else
-                        {
-                            _jpg_buf = fb->buf;
-                            _jpg_buf_len = fb->len;
-                        }
-                        fr_encode = esp_timer_get_time();
                     }
-                    dl_matrix3du_free(image_matrix);
                 }
             }
 #endif
@@ -631,6 +705,7 @@ static esp_err_t stream_handler(httpd_req_t *req)
         }
         if (res != ESP_OK)
         {
+            ESP_LOGE(TAG, "send frame failed failed");
             break;
         }
         int64_t fr_end = esp_timer_get_time();
@@ -785,8 +860,10 @@ static esp_err_t cmd_handler(httpd_req_t *req)
 #endif
     }
 #if CONFIG_ESP_FACE_RECOGNITION_ENABLED
-    else if (!strcmp(variable, "face_enroll"))
-        is_enrolling = val;
+    else if (!strcmp(variable, "face_enroll")){
+        is_enrolling = !is_enrolling;
+        ESP_LOGI(TAG, "Enrolling: %s", is_enrolling?"true":"false");
+    }
     else if (!strcmp(variable, "face_recognize")) {
         recognition_enabled = val;
         if (recognition_enabled) {
@@ -1151,26 +1228,11 @@ void startCameraServer()
 
     ra_filter_init(&ra_filter, 20);
 
-#if CONFIG_ESP_FACE_DETECT_ENABLED
-
-    mtmn_config.type = FAST;
-    mtmn_config.min_face = 80;
-    mtmn_config.pyramid = 0.707;
-    mtmn_config.pyramid_times = 4;
-    mtmn_config.p_threshold.score = 0.6;
-    mtmn_config.p_threshold.nms = 0.7;
-    mtmn_config.p_threshold.candidate_number = 20;
-    mtmn_config.r_threshold.score = 0.7;
-    mtmn_config.r_threshold.nms = 0.7;
-    mtmn_config.r_threshold.candidate_number = 10;
-    mtmn_config.o_threshold.score = 0.7;
-    mtmn_config.o_threshold.nms = 0.7;
-    mtmn_config.o_threshold.candidate_number = 1;
-
 #if CONFIG_ESP_FACE_RECOGNITION_ENABLED
-    face_id_init(&id_list, FACE_ID_SAVE_NUMBER, ENROLL_CONFIRM_TIMES);
-#endif
+    recognizer.set_partition(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_ANY, "fr");
 
+    // load ids from flash partition
+    recognizer.set_ids_from_flash();
 #endif
     ESP_LOGI(TAG, "Starting web server on port: '%d'", config.server_port);
     if (httpd_start(&camera_httpd, &config) == ESP_OK)
diff --git a/libraries/ESP32/examples/Camera/CameraWebServer/camera_pins.h b/libraries/ESP32/examples/Camera/CameraWebServer/camera_pins.h
index 8b7e1d88c5a..e1be287fc53 100644
--- a/libraries/ESP32/examples/Camera/CameraWebServer/camera_pins.h
+++ b/libraries/ESP32/examples/Camera/CameraWebServer/camera_pins.h
@@ -170,6 +170,104 @@
 #define HREF_GPIO_NUM     26
 #define PCLK_GPIO_NUM     21
 
+
+#elif defined(CAMERA_MODEL_ESP32_CAM_BOARD)
+// The 18 pin header on the board has Y5 and Y3 swapped
+#define USE_BOARD_HEADER 0 
+#define PWDN_GPIO_NUM    32
+#define RESET_GPIO_NUM   33
+#define XCLK_GPIO_NUM     4
+#define SIOD_GPIO_NUM    18
+#define SIOC_GPIO_NUM    23
+
+#define Y9_GPIO_NUM      36
+#define Y8_GPIO_NUM      19
+#define Y7_GPIO_NUM      21
+#define Y6_GPIO_NUM      39
+#if USE_BOARD_HEADER
+#define Y5_GPIO_NUM      13
+#else
+#define Y5_GPIO_NUM      35
+#endif
+#define Y4_GPIO_NUM      14
+#if USE_BOARD_HEADER
+#define Y3_GPIO_NUM      35
+#else
+#define Y3_GPIO_NUM      13
+#endif
+#define Y2_GPIO_NUM      34
+#define VSYNC_GPIO_NUM    5
+#define HREF_GPIO_NUM    27
+#define PCLK_GPIO_NUM    25
+
+#elif defined(CAMERA_MODEL_ESP32S3_CAM_LCD)
+#define PWDN_GPIO_NUM     -1
+#define RESET_GPIO_NUM    -1
+#define XCLK_GPIO_NUM     40
+#define SIOD_GPIO_NUM     17
+#define SIOC_GPIO_NUM     18
+
+#define Y9_GPIO_NUM       39
+#define Y8_GPIO_NUM       41
+#define Y7_GPIO_NUM       42
+#define Y6_GPIO_NUM       12
+#define Y5_GPIO_NUM       3
+#define Y4_GPIO_NUM       14
+#define Y3_GPIO_NUM       47
+#define Y2_GPIO_NUM       13
+#define VSYNC_GPIO_NUM    21
+#define HREF_GPIO_NUM     38
+#define PCLK_GPIO_NUM     11
+
+#elif defined(CAMERA_MODEL_ESP32S2_CAM_BOARD)
+// The 18 pin header on the board has Y5 and Y3 swapped
+#define USE_BOARD_HEADER 0
+#define PWDN_GPIO_NUM     1
+#define RESET_GPIO_NUM    2
+#define XCLK_GPIO_NUM     42
+#define SIOD_GPIO_NUM     41
+#define SIOC_GPIO_NUM     18
+
+#define Y9_GPIO_NUM       16
+#define Y8_GPIO_NUM       39
+#define Y7_GPIO_NUM       40
+#define Y6_GPIO_NUM       15
+#if USE_BOARD_HEADER
+#define Y5_GPIO_NUM       12
+#else
+#define Y5_GPIO_NUM       13
+#endif
+#define Y4_GPIO_NUM       5
+#if USE_BOARD_HEADER
+#define Y3_GPIO_NUM       13
+#else
+#define Y3_GPIO_NUM       12
+#endif
+#define Y2_GPIO_NUM       14
+#define VSYNC_GPIO_NUM    38
+#define HREF_GPIO_NUM     4
+#define PCLK_GPIO_NUM     3
+
+#elif defined(CAMERA_MODEL_ESP32S3_EYE)
+#define PWDN_GPIO_NUM -1
+#define RESET_GPIO_NUM -1
+#define XCLK_GPIO_NUM 15
+#define SIOD_GPIO_NUM 4
+#define SIOC_GPIO_NUM 5
+
+#define Y2_GPIO_NUM 11
+#define Y3_GPIO_NUM 9
+#define Y4_GPIO_NUM 8
+#define Y5_GPIO_NUM 10
+#define Y6_GPIO_NUM 12
+#define Y7_GPIO_NUM 18
+#define Y8_GPIO_NUM 17
+#define Y9_GPIO_NUM 16
+
+#define VSYNC_GPIO_NUM 6
+#define HREF_GPIO_NUM 7
+#define PCLK_GPIO_NUM 13
+
 #else
 #error "Camera model not selected"
 #endif
diff --git a/libraries/ESP32/examples/Camera/CameraWebServer/partitions.csv b/libraries/ESP32/examples/Camera/CameraWebServer/partitions.csv
new file mode 100644
index 00000000000..4f76ca6d746
--- /dev/null
+++ b/libraries/ESP32/examples/Camera/CameraWebServer/partitions.csv
@@ -0,0 +1,5 @@
+# Name,   Type,  SubType, Offset,   Size,    Flags
+nvs,      data,  nvs,     0x9000,   0x5000,
+otadata,  data,  ota,     0xe000,   0x2000,
+app0,     app,   ota_0,   0x10000,  0x3d0000,
+fr,       data,        ,  0x3e0000, 0x20000,
diff --git a/libraries/BLE/examples/BLE_server/.skip.esp32c3 b/libraries/ESP32/examples/HallSensor/.skip.esp32s3
similarity index 100%
rename from libraries/BLE/examples/BLE_server/.skip.esp32c3
rename to libraries/ESP32/examples/HallSensor/.skip.esp32s3
diff --git a/libraries/BLE/examples/BLE_server_multiconnect/.skip.esp32c3 b/libraries/ESP32/examples/I2S/HiFreq_ADC/.skip.esp32s3
similarity index 100%
rename from libraries/BLE/examples/BLE_server_multiconnect/.skip.esp32c3
rename to libraries/ESP32/examples/I2S/HiFreq_ADC/.skip.esp32s3
diff --git a/libraries/ESP32/examples/RMT/RMTCallback/RMTCallback.ino b/libraries/ESP32/examples/RMT/RMTCallback/RMTCallback.ino
index 7fd56d8a453..de28da6c85d 100644
--- a/libraries/ESP32/examples/RMT/RMTCallback/RMTCallback.ino
+++ b/libraries/ESP32/examples/RMT/RMTCallback/RMTCallback.ino
@@ -12,7 +12,10 @@ class MyProcessor {
 
   public:
     MyProcessor(uint8_t pin, float nanoTicks) {
-      assert((rmt_recv = rmtInit(21, RMT_RX_MODE, RMT_MEM_192)));
+      if ((rmt_recv = rmtInit(pin, RMT_RX_MODE, RMT_MEM_192)) == NULL)
+      {
+        Serial.println("init receiver failed\n");
+      }
 
       realNanoTick = rmtSetTick(rmt_recv, nanoTicks);
     };
@@ -59,6 +62,6 @@ void setup()
 
 void loop()
 {
-  Serial.printf("GPIO 4: %08x 5: %08x 6: %08x\n", mp1.val(), mp2.val(), mp3.val());
+  Serial.printf("GPIO 4: %08x 5: %08x 10: %08x\n", mp1.val(), mp2.val(), mp3.val());
   delay(500);
 }
\ No newline at end of file
diff --git a/libraries/ESP32/examples/RMT/RMTWriteNeoPixel/RMTWriteNeoPixel.ino b/libraries/ESP32/examples/RMT/RMTWriteNeoPixel/RMTWriteNeoPixel.ino
index 094e5f0fc1d..11f659f8895 100644
--- a/libraries/ESP32/examples/RMT/RMTWriteNeoPixel/RMTWriteNeoPixel.ino
+++ b/libraries/ESP32/examples/RMT/RMTWriteNeoPixel/RMTWriteNeoPixel.ino
@@ -5,6 +5,17 @@
 
 #include "esp32-hal.h"
 
+// The effect seen in ESP32C3, ESP32S2 and ESP32S3 is like a Blink of RGB LED
+#if CONFIG_IDF_TARGET_ESP32S2
+#define BUILTIN_RGBLED_PIN   18
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define BUILTIN_RGBLED_PIN   48
+#elif CONFIG_IDF_TARGET_ESP32C3
+#define BUILTIN_RGBLED_PIN   8
+#else
+#define BUILTIN_RGBLED_PIN   21   // ESP32 has no builtin RGB LED
+#endif
+
 #define NR_OF_LEDS   8*4
 #define NR_OF_ALL_BITS 24*NR_OF_LEDS
 
@@ -41,7 +52,7 @@ void setup()
 {
     Serial.begin(115200);
     
-    if ((rmt_send = rmtInit(18, RMT_TX_MODE, RMT_MEM_64)) == NULL)
+    if ((rmt_send = rmtInit(BUILTIN_RGBLED_PIN, RMT_TX_MODE, RMT_MEM_64)) == NULL)
     {
         Serial.println("init sender failed\n");
     }
diff --git a/libraries/ESP32/examples/ResetReason/ResetReason.ino b/libraries/ESP32/examples/ResetReason/ResetReason.ino
index 628895874ae..608edde31e0 100644
--- a/libraries/ESP32/examples/ResetReason/ResetReason.ino
+++ b/libraries/ESP32/examples/ResetReason/ResetReason.ino
@@ -19,6 +19,8 @@
 #include "esp32s2/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/rtc.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/rtc.h"
 #else 
 #error Target CONFIG_IDF_TARGET is not supported
 #endif
diff --git a/libraries/ESP32/examples/Time/SimpleTime/SimpleTime.ino b/libraries/ESP32/examples/Time/SimpleTime/SimpleTime.ino
index 988c2a4d83b..427deb014de 100644
--- a/libraries/ESP32/examples/Time/SimpleTime/SimpleTime.ino
+++ b/libraries/ESP32/examples/Time/SimpleTime/SimpleTime.ino
@@ -1,27 +1,65 @@
 #include <WiFi.h>
 #include "time.h"
+#include "sntp.h"
 
 const char* ssid       = "YOUR_SSID";
 const char* password   = "YOUR_PASS";
 
-const char* ntpServer = "pool.ntp.org";
+const char* ntpServer1 = "pool.ntp.org";
+const char* ntpServer2 = "time.nist.gov";
 const long  gmtOffset_sec = 3600;
 const int   daylightOffset_sec = 3600;
 
+const char* time_zone = "CET-1CEST,M3.5.0,M10.5.0/3";  // TimeZone rule for Europe/Rome including daylight adjustment rules (optional)
+
 void printLocalTime()
 {
   struct tm timeinfo;
   if(!getLocalTime(&timeinfo)){
-    Serial.println("Failed to obtain time");
+    Serial.println("No time available (yet)");
     return;
   }
   Serial.println(&timeinfo, "%A, %B %d %Y %H:%M:%S");
 }
 
+// Callback function (get's called when time adjusts via NTP)
+void timeavailable(struct timeval *t)
+{
+  Serial.println("Got time adjustment from NTP!");
+  printLocalTime();
+}
+
 void setup()
 {
   Serial.begin(115200);
-  
+
+  // set notification call-back function
+  sntp_set_time_sync_notification_cb( timeavailable );
+
+  /**
+   * NTP server address could be aquired via DHCP,
+   *
+   * NOTE: This call should be made BEFORE esp32 aquires IP address via DHCP,
+   * otherwise SNTP option 42 would be rejected by default.
+   * NOTE: configTime() function call if made AFTER DHCP-client run
+   * will OVERRIDE aquired NTP server address
+   */
+  sntp_servermode_dhcp(1);    // (optional)
+
+  /**
+   * This will set configured ntp servers and constant TimeZone/daylightOffset
+   * should be OK if your time zone does not need to adjust daylightOffset twice a year,
+   * in such a case time adjustment won't be handled automagicaly.
+   */
+  configTime(gmtOffset_sec, daylightOffset_sec, ntpServer1, ntpServer2);
+
+  /**
+   * A more convenient approach to handle TimeZones with daylightOffset 
+   * would be to specify a environmnet variable with TimeZone definition including daylight adjustmnet rules.
+   * A list of rules for your zone could be obtained from https://github.com/esp8266/Arduino/blob/master/cores/esp8266/TZ.h
+   */
+  //configTzTime(time_zone, ntpServer1, ntpServer2);
+
   //connect to WiFi
   Serial.printf("Connecting to %s ", ssid);
   WiFi.begin(ssid, password);
@@ -30,18 +68,11 @@ void setup()
       Serial.print(".");
   }
   Serial.println(" CONNECTED");
-  
-  //init and get the time
-  configTime(gmtOffset_sec, daylightOffset_sec, ntpServer);
-  printLocalTime();
 
-  //disconnect WiFi as it's no longer needed
-  WiFi.disconnect(true);
-  WiFi.mode(WIFI_OFF);
 }
 
 void loop()
 {
-  delay(1000);
-  printLocalTime();
+  delay(5000);
+  printLocalTime();     // it will take some time to sync time :)
 }
diff --git a/libraries/BLE/examples/BLE_uart/.skip.esp32c3 b/libraries/ESP32/examples/Touch/TouchButton/.skip.esp32c3
similarity index 100%
rename from libraries/BLE/examples/BLE_uart/.skip.esp32c3
rename to libraries/ESP32/examples/Touch/TouchButton/.skip.esp32c3
diff --git a/libraries/RainMaker/examples/RMakerSonoffDualR3/.skip.esp32s2 b/libraries/ESP32/examples/Touch/TouchButton/.skip.esp32s2
similarity index 100%
rename from libraries/RainMaker/examples/RMakerSonoffDualR3/.skip.esp32s2
rename to libraries/ESP32/examples/Touch/TouchButton/.skip.esp32s2
diff --git a/libraries/BLE/examples/BLE_write/.skip.esp32c3 b/libraries/ESP32/examples/Touch/TouchButton/.skip.esp32s3
similarity index 100%
rename from libraries/BLE/examples/BLE_write/.skip.esp32c3
rename to libraries/ESP32/examples/Touch/TouchButton/.skip.esp32s3
diff --git a/libraries/ESP32/examples/Touch/TouchButton/TouchButton.ino b/libraries/ESP32/examples/Touch/TouchButton/TouchButton.ino
new file mode 100644
index 00000000000..b1dbc63fdcb
--- /dev/null
+++ b/libraries/ESP32/examples/Touch/TouchButton/TouchButton.ino
@@ -0,0 +1,46 @@
+/*
+
+This is an example how to use Touch Intrrerupts
+The sketh will tell when it is touched and then relesased as like a push-button
+
+This method based on touchInterruptSetThresholdDirection() is only available for ESP32
+*/
+
+#include "Arduino.h"
+
+int threshold = 40;
+bool touchActive = false;
+bool lastTouchActive = false;
+bool testingLower = true;
+
+void gotTouchEvent(){
+  if (lastTouchActive != testingLower) {
+    touchActive = !touchActive;
+    testingLower = !testingLower;
+    // Touch ISR will be inverted: Lower <--> Higher than the Threshold after ISR event is noticed
+    touchInterruptSetThresholdDirection(testingLower);
+  }
+}
+
+void setup() {
+  Serial.begin(115200);
+  delay(1000); // give me time to bring up serial monitor
+  Serial.println("ESP32 Touch Interrupt Test");
+  touchAttachInterrupt(T2, gotTouchEvent, threshold);
+
+  // Touch ISR will be activated when touchRead is lower than the Threshold
+  touchInterruptSetThresholdDirection(testingLower);
+}
+
+void loop(){
+  if(lastTouchActive != touchActive){
+    lastTouchActive = touchActive;
+    if (touchActive) {
+      Serial.println("  ---- Touch was Pressed");
+    } else {
+      Serial.println("  ---- Touch was Released");
+    }
+  }
+  Serial.printf("T2 pin2 = %d \n", touchRead(T2));
+  delay(125);
+}
diff --git a/libraries/LittleFS/examples/LITTLEFS_test/.skip.esp32c3 b/libraries/ESP32/examples/Touch/TouchButtonV2/.skip.esp32
similarity index 100%
rename from libraries/LittleFS/examples/LITTLEFS_test/.skip.esp32c3
rename to libraries/ESP32/examples/Touch/TouchButtonV2/.skip.esp32
diff --git a/libraries/LittleFS/examples/LITTLEFS_time/.skip.esp32c3 b/libraries/ESP32/examples/Touch/TouchButtonV2/.skip.esp32c3
similarity index 100%
rename from libraries/LittleFS/examples/LITTLEFS_time/.skip.esp32c3
rename to libraries/ESP32/examples/Touch/TouchButtonV2/.skip.esp32c3
diff --git a/libraries/ESP32/examples/Touch/TouchButtonV2/TouchButtonV2.ino b/libraries/ESP32/examples/Touch/TouchButtonV2/TouchButtonV2.ino
new file mode 100644
index 00000000000..640fd2d3b59
--- /dev/null
+++ b/libraries/ESP32/examples/Touch/TouchButtonV2/TouchButtonV2.ino
@@ -0,0 +1,53 @@
+/*
+
+This is an example how to use Touch Intrrerupts
+The sketh will tell when it is touched and then relesased as like a push-button
+
+This method based on touchInterruptGetLastStatus() is only available for ESP32 S2 and S3
+*/
+
+#include "Arduino.h"
+
+int threshold = 1500;   // ESP32S2 
+bool touch1detected = false;
+bool touch2detected = false;
+
+void gotTouch1() {
+  touch1detected = true;
+}
+
+void gotTouch2() {
+  touch2detected = true;
+}
+
+void setup() {
+  Serial.begin(115200);
+  delay(1000); // give me time to bring up serial monitor
+
+  Serial.println("\n ESP32 Touch Interrupt Test\n");
+  touchAttachInterrupt(T1, gotTouch1, threshold); 
+  touchAttachInterrupt(T2, gotTouch2, threshold);
+}
+
+void loop() {
+  static uint32_t count = 0;
+
+  if (touch1detected) {
+    touch1detected = false;
+    if (touchInterruptGetLastStatus(T1)) {
+        Serial.println(" --- T1 Touched");
+    } else {
+        Serial.println(" --- T1 Released");
+    }
+  }
+  if (touch2detected) {
+    touch2detected = false;
+    if (touchInterruptGetLastStatus(T2)) {
+        Serial.println(" --- T2 Touched");
+    } else {
+        Serial.println(" --- T2 Released");
+    }
+  }
+
+  delay(80);
+}
diff --git a/libraries/RainMaker/examples/RMakerCustom/.skip.esp32c3 b/libraries/Ethernet/examples/ETH_LAN8720/.skip.esp32c3
similarity index 100%
rename from libraries/RainMaker/examples/RMakerCustom/.skip.esp32c3
rename to libraries/Ethernet/examples/ETH_LAN8720/.skip.esp32c3
diff --git a/libraries/RainMaker/examples/RMakerSonoffDualR3/.skip.esp32c3 b/libraries/Ethernet/examples/ETH_LAN8720/.skip.esp32s3
similarity index 100%
rename from libraries/RainMaker/examples/RMakerSonoffDualR3/.skip.esp32c3
rename to libraries/Ethernet/examples/ETH_LAN8720/.skip.esp32s3
diff --git a/libraries/RainMaker/examples/RMakerSwitch/.skip.esp32c3 b/libraries/Ethernet/examples/ETH_TLK110/.skip.esp32c3
similarity index 100%
rename from libraries/RainMaker/examples/RMakerSwitch/.skip.esp32c3
rename to libraries/Ethernet/examples/ETH_TLK110/.skip.esp32c3
diff --git a/libraries/RainMaker/examples/RMakerSwitch/.skip.esp32s2 b/libraries/Ethernet/examples/ETH_TLK110/.skip.esp32s3
similarity index 100%
rename from libraries/RainMaker/examples/RMakerSwitch/.skip.esp32s2
rename to libraries/Ethernet/examples/ETH_TLK110/.skip.esp32s3
diff --git a/libraries/Ethernet/src/ETH.cpp b/libraries/Ethernet/src/ETH.cpp
index 851eb846170..86c804fd6e5 100644
--- a/libraries/Ethernet/src/ETH.cpp
+++ b/libraries/Ethernet/src/ETH.cpp
@@ -123,7 +123,7 @@ static esp_err_t on_lowlevel_init_done(esp_eth_handle_t eth_handle){
         //gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_GPIO0_U, FUNC_GPIO0_EMAC_TX_CLK);
         //PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[0]);
         pinMode(0, INPUT);
-        pinMode(0, FUNCTION_6);
+        PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[0], 5);
         EMAC_EXT.ex_clk_ctrl.ext_en = 1;
         EMAC_EXT.ex_clk_ctrl.int_en = 0;
         EMAC_EXT.ex_oscclk_conf.clk_sel = 1;
@@ -135,7 +135,7 @@ static esp_err_t on_lowlevel_init_done(esp_eth_handle_t eth_handle){
             //gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_GPIO0_U, FUNC_GPIO0_CLK_OUT1);
             //PIN_INPUT_DISABLE(GPIO_PIN_MUX_REG[0]);
             pinMode(0, OUTPUT);
-            pinMode(0, FUNCTION_2);
+            PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[0], 1);
             // Choose the APLL clock to output on GPIO
             REG_WRITE(PIN_CTRL, 6);
 #endif
@@ -145,7 +145,7 @@ static esp_err_t on_lowlevel_init_done(esp_eth_handle_t eth_handle){
             //gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_GPIO16_U, FUNC_GPIO16_EMAC_CLK_OUT);
             //PIN_INPUT_DISABLE(GPIO_PIN_MUX_REG[16]);
             pinMode(16, OUTPUT);
-            pinMode(16, FUNCTION_6);
+            PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[16], 5);
 #endif
         } else if(eth_clock_mode == ETH_CLOCK_GPIO17_OUT){
 #if CONFIG_ETH_RMII_CLK_OUT_GPIO != 17
@@ -153,7 +153,7 @@ static esp_err_t on_lowlevel_init_done(esp_eth_handle_t eth_handle){
             //gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_GPIO17_U, FUNC_GPIO17_EMAC_CLK_OUT_180);
             //PIN_INPUT_DISABLE(GPIO_PIN_MUX_REG[17]);
             pinMode(17, OUTPUT);
-            pinMode(17, FUNCTION_6);
+            PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[17], 5);
 #endif
         }
 #if CONFIG_ETH_RMII_CLK_INPUT
@@ -226,12 +226,19 @@ ETHClass::ETHClass()
 ETHClass::~ETHClass()
 {}
 
-bool ETHClass::begin(uint8_t phy_addr, int power, int mdc, int mdio, eth_phy_type_t type, eth_clock_mode_t clock_mode)
+bool ETHClass::begin(uint8_t phy_addr, int power, int mdc, int mdio, eth_phy_type_t type, eth_clock_mode_t clock_mode, bool use_mac_from_efuse)
 {
 #if ESP_IDF_VERSION_MAJOR > 3
     eth_clock_mode = clock_mode;
     tcpipInit();
 
+    if (use_mac_from_efuse)
+    {
+        uint8_t p[6] = { 0x00,0x00,0x00,0x00,0x00,0x00 };
+        esp_efuse_mac_get_custom(p);
+        esp_base_mac_addr_set(p);
+    }
+
     tcpip_adapter_set_default_eth_handlers();
     
     esp_netif_config_t cfg = ESP_NETIF_DEFAULT_ETH();
@@ -245,6 +252,8 @@ bool ETHClass::begin(uint8_t phy_addr, int power, int mdc, int mdio, eth_phy_typ
 #endif
 #if CONFIG_ETH_USE_ESP32_EMAC
         eth_mac_config_t mac_config = ETH_MAC_DEFAULT_CONFIG();
+        mac_config.clock_config.rmii.clock_mode = (eth_clock_mode) ? EMAC_CLK_OUT : EMAC_CLK_EXT_IN;
+        mac_config.clock_config.rmii.clock_gpio = (1 == eth_clock_mode) ? EMAC_APPL_CLK_OUT_GPIO : (2 == eth_clock_mode) ? EMAC_CLK_OUT_GPIO : (3 == eth_clock_mode) ? EMAC_CLK_OUT_180_GPIO : EMAC_CLK_IN_GPIO;
         mac_config.smi_mdc_gpio_num = mdc;
         mac_config.smi_mdio_gpio_num = mdio;
         mac_config.sw_reset_timeout_ms = 1000;
@@ -281,6 +290,13 @@ bool ETHClass::begin(uint8_t phy_addr, int power, int mdc, int mdio, eth_phy_typ
             eth_phy = esp_eth_phy_new_dm9051(&phy_config);
             break;
 #endif
+        case ETH_PHY_KSZ8041:
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4,4,0)
+            eth_phy = esp_eth_phy_new_ksz8041(&phy_config);
+#else
+            log_e("unsupported ethernet type 'ETH_PHY_KSZ8041'");
+#endif
+            break;
         case ETH_PHY_KSZ8081:
 #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4,4,0)
             eth_phy = esp_eth_phy_new_ksz8081(&phy_config);
@@ -298,7 +314,7 @@ bool ETHClass::begin(uint8_t phy_addr, int power, int mdc, int mdio, eth_phy_typ
 
     eth_handle = NULL;
     esp_eth_config_t eth_config = ETH_DEFAULT_CONFIG(eth_mac, eth_phy);
-    eth_config.on_lowlevel_init_done = on_lowlevel_init_done;
+    //eth_config.on_lowlevel_init_done = on_lowlevel_init_done;
     //eth_config.on_lowlevel_deinit_done = on_lowlevel_deinit_done;
     if(esp_eth_driver_install(&eth_config, &eth_handle) != ESP_OK || eth_handle == NULL){
         log_e("esp_eth_driver_install failed");
@@ -354,6 +370,14 @@ bool ETHClass::begin(uint8_t phy_addr, int power, int mdc, int mdio, eth_phy_typ
     }
 
     tcpipInit();
+
+    if (use_mac_from_efuse)
+    {
+        uint8_t p[6] = { 0x00,0x00,0x00,0x00,0x00,0x00 };
+        esp_efuse_mac_get_custom(p);
+        esp_base_mac_addr_set(p);
+    }
+
     err = esp_eth_init(&eth_config);
     if(!err){
         initialized = true;
@@ -379,7 +403,7 @@ bool ETHClass::config(IPAddress local_ip, IPAddress gateway, IPAddress subnet, I
 {
     esp_err_t err = ESP_OK;
     tcpip_adapter_ip_info_t info;
-	
+
     if(local_ip != (uint32_t)0x00000000 && local_ip != INADDR_NONE){
         info.ip.addr = static_cast<uint32_t>(local_ip);
         info.gw.addr = static_cast<uint32_t>(gateway);
diff --git a/libraries/Ethernet/src/ETH.h b/libraries/Ethernet/src/ETH.h
index 918cd357d94..647b59848d6 100644
--- a/libraries/Ethernet/src/ETH.h
+++ b/libraries/Ethernet/src/ETH.h
@@ -53,7 +53,7 @@
 typedef enum { ETH_CLOCK_GPIO0_IN, ETH_CLOCK_GPIO0_OUT, ETH_CLOCK_GPIO16_OUT, ETH_CLOCK_GPIO17_OUT } eth_clock_mode_t;
 #endif
 
-typedef enum { ETH_PHY_LAN8720, ETH_PHY_TLK110, ETH_PHY_RTL8201, ETH_PHY_DP83848, ETH_PHY_DM9051, ETH_PHY_KSZ8081, ETH_PHY_MAX } eth_phy_type_t;
+typedef enum { ETH_PHY_LAN8720, ETH_PHY_TLK110, ETH_PHY_RTL8201, ETH_PHY_DP83848, ETH_PHY_DM9051, ETH_PHY_KSZ8041, ETH_PHY_KSZ8081, ETH_PHY_MAX } eth_phy_type_t;
 #define ETH_PHY_IP101 ETH_PHY_TLK110
 
 class ETHClass {
@@ -75,7 +75,7 @@ class ETHClass {
         ETHClass();
         ~ETHClass();
 
-        bool begin(uint8_t phy_addr=ETH_PHY_ADDR, int power=ETH_PHY_POWER, int mdc=ETH_PHY_MDC, int mdio=ETH_PHY_MDIO, eth_phy_type_t type=ETH_PHY_TYPE, eth_clock_mode_t clk_mode=ETH_CLK_MODE);
+        bool begin(uint8_t phy_addr=ETH_PHY_ADDR, int power=ETH_PHY_POWER, int mdc=ETH_PHY_MDC, int mdio=ETH_PHY_MDIO, eth_phy_type_t type=ETH_PHY_TYPE, eth_clock_mode_t clk_mode=ETH_CLK_MODE, bool use_mac_from_efuse=false);
 
         bool config(IPAddress local_ip, IPAddress gateway, IPAddress subnet, IPAddress dns1 = (uint32_t)0x00000000, IPAddress dns2 = (uint32_t)0x00000000);
 
diff --git a/libraries/FFat/examples/FFat_time/FFat_time.ino b/libraries/FFat/examples/FFat_time/FFat_time.ino
index 090a3bbc767..475cfea026b 100644
--- a/libraries/FFat/examples/FFat_time/FFat_time.ino
+++ b/libraries/FFat/examples/FFat_time/FFat_time.ino
@@ -148,10 +148,6 @@ void setup(){
     Serial.println("IP address: ");
     Serial.println(WiFi.localIP());
     Serial.println("Contacting Time Server");
-    /*
-        Note: Bundled Arduino lwip supports only ONE ntp server, 2nd and 3rd options are silently ignored
-        see CONFIG_LWIP_DHCP_MAX_NTP_SERVERS define in ./tools/sdk/esp32/sdkconfig
-     */
 	configTime(3600*timezone, daysavetime*3600, "time.nist.gov", "0.pool.ntp.org", "1.pool.ntp.org");
 	struct tm tmstruct ;
     delay(2000);
diff --git a/libraries/FS/src/FS.cpp b/libraries/FS/src/FS.cpp
index f5e9a8ab2cc..80d0958a759 100644
--- a/libraries/FS/src/FS.cpp
+++ b/libraries/FS/src/FS.cpp
@@ -130,6 +130,15 @@ size_t File::size() const
     return _p->size();
 }
 
+bool File::setBufferSize(size_t size)
+{
+    if (!*this) {
+        return 0;
+    }
+
+    return _p->setBufferSize(size);
+}
+
 void File::close()
 {
     if (_p) {
diff --git a/libraries/FS/src/FS.h b/libraries/FS/src/FS.h
index c3a1c51c5ec..64e630c4577 100644
--- a/libraries/FS/src/FS.h
+++ b/libraries/FS/src/FS.h
@@ -70,6 +70,7 @@ class File : public Stream
     }
     size_t position() const;
     size_t size() const;
+    bool setBufferSize(size_t size);
     void close();
     operator bool() const;
     time_t getLastWrite();
diff --git a/libraries/FS/src/FSImpl.h b/libraries/FS/src/FSImpl.h
index 4c5c9786840..bb20cd499ae 100644
--- a/libraries/FS/src/FSImpl.h
+++ b/libraries/FS/src/FSImpl.h
@@ -36,6 +36,7 @@ class FileImpl
     virtual bool seek(uint32_t pos, SeekMode mode) = 0;
     virtual size_t position() const = 0;
     virtual size_t size() const = 0;
+    virtual bool setBufferSize(size_t size) = 0;
     virtual void close() = 0;
     virtual time_t getLastWrite() = 0;
     virtual const char* path() const = 0;
diff --git a/libraries/FS/src/vfs_api.cpp b/libraries/FS/src/vfs_api.cpp
index e43b4397452..25a27c70bcf 100644
--- a/libraries/FS/src/vfs_api.cpp
+++ b/libraries/FS/src/vfs_api.cpp
@@ -16,6 +16,8 @@
 
 using namespace fs;
 
+#define DEFAULT_FILE_BUFFER_SIZE 4096
+
 FileImplPtr VFSImpl::open(const char* fpath, const char* mode, const bool create)
 {
     if(!_mountpoint) {
@@ -280,6 +282,10 @@ VFSFileImpl::VFSFileImpl(VFSImpl* fs, const char* fpath, const char* mode)
             if(!_f) {
                 log_e("fopen(%s) failed", temp);
             }
+            if(_f && (_stat.st_blksize == 0))
+            {
+                setvbuf(_f,NULL,_IOFBF,DEFAULT_FILE_BUFFER_SIZE);
+            } 
         } else if(S_ISDIR(_stat.st_mode)) {
             _isDirectory = true;
             _d = opendir(temp);
@@ -307,6 +313,10 @@ VFSFileImpl::VFSFileImpl(VFSImpl* fs, const char* fpath, const char* mode)
             if(!_f) {
                 log_e("fopen(%s) failed", temp);
             }
+            if(_f && (_stat.st_blksize == 0))
+            {
+                setvbuf(_f,NULL,_IOFBF,DEFAULT_FILE_BUFFER_SIZE);
+            } 
         }
     }
     free(temp);
@@ -415,6 +425,19 @@ size_t VFSFileImpl::size() const
     return _stat.st_size;
 }
 
+/*
+* Change size of files internal buffer used for read / write operations.
+* Need to be called right after opening file before any other operation!
+*/
+bool VFSFileImpl::setBufferSize(size_t size)
+{
+    if(_isDirectory || !_f) {
+        return 0;
+    }
+    int res = setvbuf(_f,NULL,_IOFBF,size);
+    return res == 0;
+}
+
 const char* VFSFileImpl::path() const
 {
     return (const char*) _path;
diff --git a/libraries/FS/src/vfs_api.h b/libraries/FS/src/vfs_api.h
index f79852cdcfe..780c334aa5c 100644
--- a/libraries/FS/src/vfs_api.h
+++ b/libraries/FS/src/vfs_api.h
@@ -65,10 +65,11 @@ class VFSFileImpl : public FileImpl
     bool        seek(uint32_t pos, SeekMode mode) override;
     size_t      position() const override;
     size_t      size() const override;
+    bool        setBufferSize(size_t size);
     void        close() override;
     const char* path() const override;
     const char* name() const override;
-    time_t getLastWrite()  override;
+    time_t      getLastWrite()  override;
     boolean     isDirectory(void) override;
     FileImplPtr openNextFile(const char* mode) override;
     void        rewindDirectory(void) override;
diff --git a/libraries/HTTPClient/src/HTTPClient.cpp b/libraries/HTTPClient/src/HTTPClient.cpp
index a7bf13e89f5..7e967be9f35 100644
--- a/libraries/HTTPClient/src/HTTPClient.cpp
+++ b/libraries/HTTPClient/src/HTTPClient.cpp
@@ -39,6 +39,9 @@
 
 #include "HTTPClient.h"
 
+/// Cookie jar support
+#include <time.h>
+
 #ifdef HTTPCLIENT_1_1_COMPATIBLE
 class TransportTraits
 {
@@ -157,6 +160,7 @@ bool HTTPClient::begin(WiFiClient &client, String url) {
     }
 
     _port = (protocol == "https" ? 443 : 80);
+    _secure = (protocol == "https");
     return beginInternal(url, protocol.c_str());
 }
 
@@ -187,6 +191,7 @@ bool HTTPClient::begin(WiFiClient &client, String host, uint16_t port, String ur
     _port = port;
     _uri = uri;
     _protocol = (https ? "https" : "http");
+    _secure = https;
     return true;
 }
 
@@ -255,7 +260,7 @@ bool HTTPClient::beginInternal(String url, const char* expectedProtocol)
 
     _protocol = url.substring(0, index);
     if (_protocol != expectedProtocol) {
-        log_w("unexpected protocol: %s, expected %s", _protocol.c_str(), expectedProtocol);
+        log_d("unexpected protocol: %s, expected %s", _protocol.c_str(), expectedProtocol);
         return false;
     }
 
@@ -381,9 +386,7 @@ void HTTPClient::disconnect(bool preserveClient)
     if(connected()) {
         if(_client->available() > 0) {
             log_d("still data in buffer (%d), clean up.\n", _client->available());
-            while(_client->available() > 0) {
-                _client->read();
-            }
+                _client->flush();
         }
 
         if(_reuse && _canReuse) {
@@ -603,6 +606,12 @@ int HTTPClient::sendRequest(const char * type, uint8_t * payload, size_t size)
             addHeader(F("Content-Length"), String(size));
         }
 
+        // add cookies to header, if present
+        String cookie_string;
+        if(generateCookieString(&cookie_string)) {
+            addHeader("Cookie", cookie_string);
+        }
+
         // send Header
         if(!sendHeader(type)) {
             return returnError(HTTPC_ERROR_SEND_HEADER_FAILED);
@@ -706,6 +715,12 @@ int HTTPClient::sendRequest(const char * type, Stream * stream, size_t size)
         addHeader("Content-Length", String(size));
     }
 
+    // add cookies to header, if present
+    String cookie_string;
+    if(generateCookieString(&cookie_string)) {
+        addHeader("Cookie", cookie_string);
+    }
+
     // send Header
     if(!sendHeader(type)) {
         return returnError(HTTPC_ERROR_SEND_HEADER_FAILED);
@@ -1222,6 +1237,7 @@ int HTTPClient::handleHeaderResponse()
     _transferEncoding = HTTPC_TE_IDENTITY;
     unsigned long lastDataTime = millis();
     bool firstLine = true;
+    String date;
 
     while(connected()) {
         size_t len = _client->available();
@@ -1234,7 +1250,7 @@ int HTTPClient::handleHeaderResponse()
             log_v("RX: '%s'", headerLine.c_str());
 
             if(firstLine) {
-		firstLine = false;
+		        firstLine = false;
                 if(_canReuse && headerLine.startsWith("HTTP/1.")) {
                     _canReuse = (headerLine[sizeof "HTTP/1." - 1] != '0');
                 }
@@ -1245,6 +1261,10 @@ int HTTPClient::handleHeaderResponse()
                 String headerValue = headerLine.substring(headerLine.indexOf(':') + 1);
                 headerValue.trim();
 
+                if(headerName.equalsIgnoreCase("Date")) {
+                    date = headerValue;
+                }
+
                 if(headerName.equalsIgnoreCase("Content-Length")) {
                     _size = headerValue.toInt();
                 }
@@ -1263,12 +1283,24 @@ int HTTPClient::handleHeaderResponse()
                     _location = headerValue;
                 }
 
-                for(size_t i = 0; i < _headerKeysCount; i++) {
-                    if(_currentHeaders[i].key.equalsIgnoreCase(headerName)) {
+                if (headerName.equalsIgnoreCase("Set-Cookie")) {
+                    setCookie(date, headerValue);
+                }
+
+                for (size_t i = 0; i < _headerKeysCount; i++) {
+                    if (_currentHeaders[i].key.equalsIgnoreCase(headerName)) {
+                        // Uncomment the following lines if you need to add support for multiple headers with the same key:
+                        // if (!_currentHeaders[i].value.isEmpty()) {
+                        //     // Existing value, append this one with a comma
+                        //     _currentHeaders[i].value += ',';
+                        //     _currentHeaders[i].value += headerValue;
+                        // } else {
                         _currentHeaders[i].value = headerValue;
-                        break;
+                        // }
+                        break; // We found a match, stop looking
                     }
                 }
+
             }
 
             if(headerLine == "") {
@@ -1491,3 +1523,171 @@ const String &HTTPClient::getLocation(void)
 {
     return _location;
 }
+
+void HTTPClient::setCookieJar(CookieJar* cookieJar)
+{
+    _cookieJar = cookieJar;
+}
+
+void HTTPClient::resetCookieJar()
+{
+    _cookieJar = nullptr;
+}
+
+void HTTPClient::clearAllCookies()
+{
+    if (_cookieJar) _cookieJar->clear();
+}
+
+void HTTPClient::setCookie(String date, String headerValue)
+{
+    if (!_cookieJar)
+    {
+        return;
+    }
+    #define HTTP_TIME_PATTERN "%a, %d %b %Y %H:%M:%S"
+
+    Cookie cookie;
+    String value;
+    int pos1, pos2;
+
+    headerValue.toLowerCase();
+
+    struct tm tm;
+    strptime(date.c_str(), HTTP_TIME_PATTERN, &tm);
+    cookie.date = mktime(&tm);
+
+    pos1 = headerValue.indexOf('=');
+    pos2 = headerValue.indexOf(';');
+
+    if (pos1 >= 0 && pos2 > pos1){
+        cookie.name = headerValue.substring(0, pos1);
+        cookie.value = headerValue.substring(pos1 + 1, pos2);
+    } else {
+        return;     // invalid cookie header
+    }
+
+    // expires
+    if (headerValue.indexOf("expires=") >= 0){
+        pos1 = headerValue.indexOf("expires=") + strlen("expires=");
+        pos2 = headerValue.indexOf(';', pos1);
+
+        if (pos2 > pos1)
+            value = headerValue.substring(pos1, pos2);
+        else
+            value = headerValue.substring(pos1);
+
+        strptime(value.c_str(), HTTP_TIME_PATTERN, &tm);
+        cookie.expires.date = mktime(&tm);
+        cookie.expires.valid = true;
+    }
+
+    // max-age
+    if (headerValue.indexOf("max-age=") >= 0){
+        pos1 = headerValue.indexOf("max-age=") + strlen("max-age=");
+        pos2 = headerValue.indexOf(';', pos1);
+
+        if (pos2 > pos1)
+            value = headerValue.substring(pos1, pos2);
+        else
+            value = headerValue.substring(pos1);
+
+        cookie.max_age.duration = value.toInt();
+        cookie.max_age.valid = true;
+    }
+
+    // domain
+    if (headerValue.indexOf("domain=") >= 0){
+        pos1 = headerValue.indexOf("domain=") + strlen("domain=");
+        pos2 = headerValue.indexOf(';', pos1);
+
+        if (pos2 > pos1)
+            value = headerValue.substring(pos1, pos2);
+        else
+            value = headerValue.substring(pos1);
+
+        if (value.startsWith(".")) value.remove(0, 1);
+
+        if (_host.indexOf(value) >= 0) {
+            cookie.domain = value;
+        } else {
+            return;     // server tries to set a cookie on a different domain; ignore it
+        }
+    } else {
+        pos1 = _host.lastIndexOf('.', _host.lastIndexOf('.') - 1);
+        if (pos1 >= 0)
+            cookie.domain = _host.substring(pos1 + 1);
+        else
+            cookie.domain = _host;
+    }
+
+    // path
+    if (headerValue.indexOf("path=") >= 0){
+        pos1 = headerValue.indexOf("path=") + strlen("path=");
+        pos2 = headerValue.indexOf(';', pos1);
+
+        if (pos2 > pos1)
+            cookie.path = headerValue.substring(pos1, pos2);
+        else
+            cookie.path = headerValue.substring(pos1);
+    }
+
+    // HttpOnly
+    cookie.http_only = (headerValue.indexOf("httponly") >= 0);
+
+    // secure
+    cookie.secure = (headerValue.indexOf("secure") >= 0);
+
+    // overwrite or delete cookie in/from cookie jar
+    time_t now_local = time(NULL);
+    time_t now_gmt = mktime(gmtime(&now_local));
+
+    bool found = false;
+
+    for (auto c = _cookieJar->begin(); c != _cookieJar->end(); ++c) {
+        if (c->domain == cookie.domain && c->name == cookie.name) {
+            // when evaluating, max-age takes precedence over expires if both are defined
+            if ((cookie.max_age.valid && ((cookie.date + cookie.max_age.duration) < now_gmt)) || cookie.max_age.duration <= 0
+            || (!cookie.max_age.valid && cookie.expires.valid && cookie.expires.date < now_gmt)) {
+                _cookieJar->erase(c);
+                c--;
+            } else {
+                *c = cookie;
+            }
+            found = true;
+        }
+    }
+
+    // add cookie to jar
+    if (!found && !(cookie.max_age.valid && cookie.max_age.duration <= 0)) 
+        _cookieJar->push_back(cookie);
+
+}
+
+bool HTTPClient::generateCookieString(String *cookieString)
+{
+    time_t now_local = time(NULL);
+    time_t now_gmt = mktime(gmtime(&now_local));
+
+    *cookieString = "";
+    bool found = false;
+
+    if (!_cookieJar)
+    {
+        return false;
+    }
+ 	for (auto c = _cookieJar->begin(); c != _cookieJar->end(); ++c) {
+        if ((c->max_age.valid && ((c->date + c->max_age.duration) < now_gmt)) || (!c->max_age.valid && c->expires.valid && c->expires.date < now_gmt)) {
+            _cookieJar->erase(c);
+            c--;
+        } else if (_host.indexOf(c->domain) >= 0 && (!c->secure || _secure) ) {
+            if (*cookieString == "")
+                *cookieString = c->name + "=" + c->value;
+            else
+                *cookieString += " ;" + c->name + "=" + c->value;
+            found = true;
+        }
+    }
+    
+    return found;
+}
diff --git a/libraries/HTTPClient/src/HTTPClient.h b/libraries/HTTPClient/src/HTTPClient.h
index 1bb84d6d6b5..6a17c0e65f5 100644
--- a/libraries/HTTPClient/src/HTTPClient.h
+++ b/libraries/HTTPClient/src/HTTPClient.h
@@ -27,13 +27,18 @@
 #ifndef HTTPClient_H_
 #define HTTPClient_H_
 
+#ifndef HTTPCLIENT_1_1_COMPATIBLE
 #define HTTPCLIENT_1_1_COMPATIBLE
+#endif
 
 #include <memory>
 #include <Arduino.h>
 #include <WiFiClient.h>
 #include <WiFiClientSecure.h>
 
+/// Cookie jar support
+#include <vector>
+
 #define HTTPCLIENT_DEFAULT_TCP_TIMEOUT (5000)
 
 /// HTTP client errors
@@ -142,6 +147,28 @@ class TransportTraits;
 typedef std::unique_ptr<TransportTraits> TransportTraitsPtr;
 #endif
 
+// cookie jar support
+typedef struct  {
+    String host;       // host which tries to set the cookie
+    time_t date;       // timestamp of the response that set the cookie
+    String name;
+    String value;
+    String domain;
+    String path = "";
+    struct {
+        time_t date = 0;
+        bool valid = false;
+    } expires;
+    struct {
+        time_t duration = 0;
+        bool valid = false;
+    } max_age;
+    bool http_only = false;
+    bool secure = false;
+} Cookie;
+typedef std::vector<Cookie> CookieJar;
+
+
 class HTTPClient
 {
 public:
@@ -215,6 +242,11 @@ class HTTPClient
 
     static String errorToString(int error);
 
+    /// Cookie jar support
+    void setCookieJar(CookieJar* cookieJar);
+    void resetCookieJar();
+    void clearAllCookies();
+
 protected:
     struct RequestArgument {
         String key;
@@ -230,6 +262,9 @@ class HTTPClient
     int handleHeaderResponse();
     int writeToStreamDataBlock(Stream * stream, int len);
 
+    /// Cookie jar support
+    void setCookie(String date, String headerValue);
+    bool generateCookieString(String *cookieString);
 
 #ifdef HTTPCLIENT_1_1_COMPATIBLE
     TransportTraitsPtr _transportTraits;
@@ -241,7 +276,7 @@ class HTTPClient
     /// request handling
     String _host;
     uint16_t _port = 0;
-    int32_t _connectTimeout = -1;
+    int32_t _connectTimeout = HTTPCLIENT_DEFAULT_TCP_TIMEOUT;
     bool _reuse = true;
     uint16_t _tcpTimeout = HTTPCLIENT_DEFAULT_TCP_TIMEOUT;
     bool _useHTTP10 = false;
@@ -265,6 +300,10 @@ class HTTPClient
     uint16_t _redirectLimit = 10;
     String _location;
     transferEncoding_t _transferEncoding = HTTPC_TE_IDENTITY;
+
+    /// Cookie jar support
+    CookieJar* _cookieJar = nullptr;
+
 };
 
 
diff --git a/libraries/HTTPUpdate/examples/httpUpdateSecure/httpUpdateSecure.ino b/libraries/HTTPUpdate/examples/httpUpdateSecure/httpUpdateSecure.ino
index cff8f45cec9..1c85ace02a5 100644
--- a/libraries/HTTPUpdate/examples/httpUpdateSecure/httpUpdateSecure.ino
+++ b/libraries/HTTPUpdate/examples/httpUpdateSecure/httpUpdateSecure.ino
@@ -17,10 +17,6 @@ WiFiMulti WiFiMulti;
 
 // Set time via NTP, as required for x.509 validation
 void setClock() {
-  /*
-    Note: Bundled Arduino lwip supports only ONE ntp server, 2nd and 3rd options are silently ignored
-    see CONFIG_LWIP_DHCP_MAX_NTP_SERVERS define in ./tools/sdk/esp32/sdkconfig
-  */
   configTime(0, 0, "pool.ntp.org", "time.nist.gov");  // UTC
 
   Serial.print(F("Waiting for NTP time sync: "));
diff --git a/libraries/I2S/examples/ADCPlotter/.skip.esp32c3 b/libraries/I2S/examples/ADCPlotter/.skip.esp32c3
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/libraries/I2S/examples/ADCPlotter/ADCPlotter.ino b/libraries/I2S/examples/ADCPlotter/ADCPlotter.ino
new file mode 100644
index 00000000000..5f3bd93ca9d
--- /dev/null
+++ b/libraries/I2S/examples/ADCPlotter/ADCPlotter.ino
@@ -0,0 +1,86 @@
+/*
+ This example is only for ESP devices.
+
+ This example demonstrates usage of integrated Digital to Analog Converter (DAC)
+ You can display sound wave from audio device, or just measure voltage.
+
+ To display audio prepare circuit found in following link or drafted as ASCII art
+ https://forum.arduino.cc/index.php?topic=567581.0
+ (!) Note that unlike in the link we are connecting the supply line to 3.3V (not 5V)
+ because ADC can measure only up to around 3V. Anything above 3V will be very inaccurate.
+
+                      ^ +3.3V
+                      |
+                      _
+                     | |10k
+                     |_|
+                      |            | |10uF
+   GPIO34-------------*------------| |----------- line in
+(Default ADC pin)     |           +| |      
+                      |
+                      _
+                     | |10k
+                     |_|
+                      |
+                      |
+                      V GND
+
+Connect hot wire of your audio to Line in and GNd wire of audio cable to common ground (GND)
+
+Second option to measure voltage on trimmer / potentiometer has following connection
+                      ^ +3.3V
+                      |
+                      _
+                     | |
+   GPIO34----------->| |
+(Default ADC pin)    |_|
+                      |
+                      |
+                      _
+                     | | optional resistor
+                     |_|
+                      |
+                      |
+                      V GND
+ Optional resistor will decrease read value.
+
+ Steps to run:
+ 1. Select target board:
+   Tools -> Board -> ESP32 Arduino -> your board
+ 2. Upload sketch
+   Press upload button (arrow in top left corner)
+   When you see in console line like this: "Connecting........_____.....__"
+     On your board press and hold Boot button and press EN button shortly. Now you can release both buttons.
+     You should see lines like this: "Writing at 0x00010000... (12 %)" with rising percentage on each line.
+     If this fails, try the board buttons right after pressing upload button, or reconnect the USB cable.
+ 3. Open plotter
+   Tools -> Serial Plotter
+     Enjoy
+
+Created by Tomas Pilny
+on 17th June 2021
+*/
+
+#include <I2S.h>
+
+void setup() {
+  // Open serial communications and wait for port to open:
+  // A baud rate of 115200 is used instead of 9600 for a faster data rate
+  // on non-native USB ports
+  Serial.begin(115200);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for native USB port only
+  }
+
+  // start I2S at 8 kHz with 32-bits per sample
+  if (!I2S.begin(ADC_DAC_MODE, 8000, 16)) {
+    Serial.println("Failed to initialize I2S!");
+    while (1); // do nothing
+  }
+}
+
+void loop() {
+  // read a sample
+  int sample = I2S.read();
+  Serial.println(sample);
+}
diff --git a/libraries/I2S/examples/FullDuplex/.skip.esp32c3 b/libraries/I2S/examples/FullDuplex/.skip.esp32c3
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/libraries/I2S/examples/FullDuplex/FullDuplex.ino b/libraries/I2S/examples/FullDuplex/FullDuplex.ino
new file mode 100644
index 00000000000..9b3625fbd60
--- /dev/null
+++ b/libraries/I2S/examples/FullDuplex/FullDuplex.ino
@@ -0,0 +1,59 @@
+/*
+ This example is only for ESP
+ This example demonstrates simultaneous usage of microphone and speaker using single I2S module.
+ The application transfers data from input to output
+
+ Circuit:
+ * ESP32
+   * GND connected GND
+   * VIN connected 5V
+   * SCK 5
+   * FS 25
+   * DIN 35
+   * DOUT 26
+ * I2S microphone
+ * I2S decoder + headphones / speaker
+
+ created 8 October 2021
+ by Tomas Pilny
+ */
+
+#include <I2S.h>
+const long sampleRate = 16000;
+const int bitsPerSample = 32;
+uint8_t *buffer;
+
+void setup() {
+  Serial.begin(115200);
+  //I2S.setAllPins(5, 25, 35, 26); // you can change default pins; order of pins = (CLK, WS, IN, OUT)
+  if(!I2S.setDuplex()){
+    Serial.println("ERROR - could not set duplex");
+    while(true){
+      vTaskDelay(10); // Cannot continue
+    }
+  }
+  if (!I2S.begin(I2S_PHILIPS_MODE, sampleRate, bitsPerSample)) {
+    Serial.println("Failed to initialize I2S!");
+    while(true){
+      vTaskDelay(10); // Cannot continue
+    }
+  }
+  buffer = (uint8_t*) malloc(I2S.getBufferSize() * (bitsPerSample / 8));
+  if(buffer == NULL){
+    Serial.println("Failed to allocate buffer!");
+    while(true){
+      vTaskDelay(10); // Cannot continue
+    }
+  }
+  Serial.println("Setup done");
+}
+
+void loop() {
+  //I2S.write(I2S.read()); // primitive implementation sample-by-sample
+
+  // Buffer based implementation
+  I2S.read(buffer, I2S.getBufferSize() * (bitsPerSample / 8));
+  I2S.write(buffer, I2S.getBufferSize() * (bitsPerSample / 8));
+
+  //optimistic_yield(1000); // yield if last yield occurred before <parameter> CPU clock cycles ago
+}
diff --git a/libraries/I2S/examples/InputSerialPlotter/.skip.esp32c3 b/libraries/I2S/examples/InputSerialPlotter/.skip.esp32c3
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/libraries/I2S/examples/InputSerialPlotter/InputSerialPlotter.ino b/libraries/I2S/examples/InputSerialPlotter/InputSerialPlotter.ino
new file mode 100644
index 00000000000..db9f7d0d4f8
--- /dev/null
+++ b/libraries/I2S/examples/InputSerialPlotter/InputSerialPlotter.ino
@@ -0,0 +1,44 @@
+/*
+ This example reads audio data from an Invensense's ICS43432 I2S microphone
+ breakout board, and prints out the samples to the Serial console. The
+ Serial Plotter built into the Arduino IDE can be used to plot the audio
+ data (Tools -> Serial Plotter)
+
+ Circuit:
+ * Arduino/Genuino Zero, MKR family and Nano 33 IoT
+ * ICS43432:
+   * GND connected GND
+   * 3.3V connected to 3.3V (Zero, Nano, ESP32), VCC (MKR)
+   * WS connected to pin 0 (Zero) or 3 (MKR), A2 (Nano) or 25 (ESP32)
+   * CLK connected to pin 1 (Zero) or 2 (MKR), A3 (Nano) or 5 (ESP32)
+   * SD connected to pin 9 (Zero) or A6 (MKR), 4 (Nano) or 26 (ESP32)
+ created 17 November 2016
+ by Sandeep Mistry
+ */
+
+#include <I2S.h>
+
+void setup() {
+  // Open serial communications and wait for port to open:
+  // A baud rate of 115200 is used instead of 9600 for a faster data rate
+  // on non-native USB ports
+  Serial.begin(115200);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for native USB port only
+  }
+
+  // start I2S at 8 kHz with 32-bits per sample
+  if (!I2S.begin(I2S_PHILIPS_MODE, 8000, 32)) {
+    Serial.println("Failed to initialize I2S!");
+    while (1); // do nothing
+  }
+}
+
+void loop() {
+  // read a sample
+  int sample = I2S.read();
+
+  if (sample && sample != -1 && sample != 1) {
+    Serial.println(sample);
+  }
+}
diff --git a/libraries/I2S/examples/SimpleTone/.skip.esp32c3 b/libraries/I2S/examples/SimpleTone/.skip.esp32c3
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/libraries/I2S/examples/SimpleTone/SimpleTone.ino b/libraries/I2S/examples/SimpleTone/SimpleTone.ino
new file mode 100644
index 00000000000..dd312cf8a82
--- /dev/null
+++ b/libraries/I2S/examples/SimpleTone/SimpleTone.ino
@@ -0,0 +1,79 @@
+/*
+ This example generates a square wave based tone at a specified frequency
+ and sample rate. Then outputs the data using the I2S interface to a
+ MAX08357 I2S Amp Breakout board.
+
+ I2S Circuit:
+ * Arduino/Genuino Zero, MKR family and Nano 33 IoT
+ * MAX08357:
+   * GND connected GND
+   * VIN connected 5V
+   * LRC connected to pin 0 (Zero) or 3 (MKR), A2 (Nano) or 25 (ESP32)
+   * BCLK connected to pin 1 (Zero) or 2 (MKR), A3 (Nano) or 5 (ESP32)
+   * DIN connected to pin 9 (Zero) or A6 (MKR), 4 (Nano) or 26 (ESP32)
+
+ DAC Circuit:
+ * ESP32 or ESP32-S2
+ * Audio amplifier
+   - Note:
+     - ESP32 has DAC on GPIO pins 25 and 26.
+     - ESP32-S2 has DAC on GPIO pins 17 and 18.
+  - Connect speaker(s) or headphones.
+
+ created 17 November 2016
+ by Sandeep Mistry
+ For ESP extended
+ Tomas Pilny
+ 2nd September 2021
+ */
+
+#include <I2S.h>
+const int frequency = 440; // frequency of square wave in Hz
+const int amplitude = 500; // amplitude of square wave
+const int sampleRate = 8000; // sample rate in Hz
+const int bps = 16;
+
+const int halfWavelength = (sampleRate / frequency); // half wavelength of square wave
+
+short sample = amplitude; // current sample value
+int count = 0;
+
+i2s_mode_t mode = I2S_PHILIPS_MODE; // I2S decoder is needed
+// i2s_mode_t mode = ADC_DAC_MODE; // Audio amplifier is needed
+
+// Mono channel input
+// This is ESP specific implementation -
+//   samples will be automatically copied to both channels inside I2S driver
+//   If you want to have true mono output use I2S_PHILIPS_MODE and interlay
+//   second channel with 0-value samples.
+//   The order of channels is RIGH followed by LEFT
+//i2s_mode_t mode = I2S_RIGHT_JUSTIFIED_MODE; // I2S decoder is needed
+
+void setup() {
+  Serial.begin(115200);
+  Serial.println("I2S simple tone");
+
+  // start I2S at the sample rate with 16-bits per sample
+  if (!I2S.begin(mode, sampleRate, bps)) {
+    Serial.println("Failed to initialize I2S!");
+    while (1); // do nothing
+  }
+}
+
+void loop() {
+    if (count % halfWavelength == 0 ) {
+      // invert the sample every half wavelength count multiple to generate square wave
+      sample = -1 * sample;
+    }
+
+    if(mode == I2S_PHILIPS_MODE || mode == ADC_DAC_MODE){ // write the same sample twice, once for Right and once for Left channel
+      I2S.write(sample); // Right channel
+      I2S.write(sample); // Left channel
+    }else if(mode == I2S_RIGHT_JUSTIFIED_MODE || mode == I2S_LEFT_JUSTIFIED_MODE){
+      // write the same only once - it will be automatically copied to the other channel
+      I2S.write(sample);
+    }
+
+    // increment the counter for the next sample
+    count++;
+}
diff --git a/libraries/I2S/keywords.txt b/libraries/I2S/keywords.txt
new file mode 100644
index 00000000000..ad1b8028d42
--- /dev/null
+++ b/libraries/I2S/keywords.txt
@@ -0,0 +1,61 @@
+#######################################
+# Syntax Coloring Map I2S
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+I2S	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+I2SClass	KEYWORD2
+begin	KEYWORD2
+end	KEYWORD2
+
+onReceive	KEYWORD2
+onTransmit	KEYWORD2
+
+setSckPin	KEYWORD2
+setFsPin	KEYWORD2
+setDataInPin	KEYWORD2
+setDataOutPin	KEYWORD2
+setAllPins	KEYWORD2
+
+getSckPin	KEYWORD2
+getFsPin	KEYWORD2
+getDataPin	KEYWORD2
+getDataInPin	KEYWORD2
+getDataOutPin	KEYWORD2
+
+setDuplex	KEYWORD2
+setSimplex	KEYWORD2
+isDuplex	KEYWORD2
+
+setBufferSize	KEYWORD2
+getBufferSize	KEYWORD2
+
+write	KEYWORD2
+availableForWrite	KEYWORD2
+
+read	KEYWORD2
+available	KEYWORD2
+
+gpioToAdcUnit	KEYWORD2
+gpioToAdcChannel	KEYWORD2
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+I2S_PHILIPS_MODE	LITERAL1
+I2S_RIGHT_JUSTIFIED_MODE	LITERAL1
+I2S_LEFT_JUSTIFIED_MODE	LITERAL1
+I2S_ADC_DAC	LITERAL1
+I2S_PDM	LITERAL1
+
+PIN_I2S_SCK	LITERAL1
+PIN_I2S_FS	LITERAL1
+PIN_I2S_SD	LITERAL1
+PIN_I2S_SD_OUT	LITERAL1
diff --git a/libraries/I2S/library.properties b/libraries/I2S/library.properties
new file mode 100644
index 00000000000..bb77e306158
--- /dev/null
+++ b/libraries/I2S/library.properties
@@ -0,0 +1,9 @@
+name=I2S
+version=1.0
+author=Tomas Pilny
+maintainer=Tomas Pilny <tomas.pilny@espressif.com>
+sentence=Enables the communication with devices that use the Inter-IC Sound (I2S) Bus. Specific implementation for ESP.
+paragraph=
+category=Communication
+url=http://www.arduino.cc/en/Reference/I2S
+architectures=esp32
diff --git a/libraries/I2S/src/I2S.cpp b/libraries/I2S/src/I2S.cpp
new file mode 100644
index 00000000000..393052c136f
--- /dev/null
+++ b/libraries/I2S/src/I2S.cpp
@@ -0,0 +1,1209 @@
+/*
+  Copyright (c) 2016 Arduino LLC.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include <Arduino.h>
+#include <wiring_private.h>
+#include "I2S.h"
+#include "freertos/semphr.h"
+
+#define _I2S_EVENT_QUEUE_LENGTH 16
+#define _I2S_DMA_BUFFER_COUNT 2 // BUFFER COUNT must be between 2 and 128
+#define I2S_INTERFACES_COUNT SOC_I2S_NUM
+
+#ifndef I2S_DEVICE
+  #define I2S_DEVICE 0
+#endif
+
+#ifndef I2S_CLOCK_GENERATOR
+  #define I2S_CLOCK_GENERATOR 0 // does nothing for ESP
+#endif
+
+I2SClass::I2SClass(uint8_t deviceIndex, uint8_t clockGenerator, uint8_t sdPin, uint8_t sckPin, uint8_t fsPin) :
+  _deviceIndex(deviceIndex),
+  _sdPin(sdPin),             // shared data pin
+  _inSdPin(PIN_I2S_SD_IN),   // input data pin
+  _outSdPin(PIN_I2S_SD),     // output data pin
+  _sckPin(sckPin),           // clock pin
+  _fsPin(fsPin),             // frame (word) select pin
+
+  _state(I2S_STATE_IDLE),
+  _bitsPerSample(0),
+  _sampleRate(0),
+  _mode(I2S_PHILIPS_MODE),
+
+  _buffer_byte_size(0),
+
+  _driverInstalled(false),
+  _initialized(false),
+  _callbackTaskHandle(NULL),
+  _i2sEventQueue(NULL),
+  _i2s_general_mutex(NULL),
+  _input_ring_buffer(NULL),
+  _output_ring_buffer(NULL),
+  _i2s_dma_buffer_size(128), // Number of frames in each DMA buffer. Frame size = number of channels * Bytes per sample; Must be between 8 and 1024
+  _driveClock(true),
+  _peek_buff(0),
+  _peek_buff_valid(false),
+  _nesting_counter(0),
+
+  _onTransmit(NULL),
+  _onReceive(NULL)
+{
+  _i2s_general_mutex = xSemaphoreCreateMutex();
+  if(_i2s_general_mutex == NULL){
+    log_e("I2S could not create internal mutex!");
+  }
+}
+
+int I2SClass::_createCallbackTask(){
+  int stack_size = 20000;
+  if(_callbackTaskHandle != NULL){
+    log_e("Callback task already exists!");
+    return 0; // ERR
+  }
+
+  xTaskCreate(
+    onDmaTransferComplete,   // Function to implement the task
+    "onDmaTransferComplete", // Name of the task
+    stack_size,              // Stack size in words
+    NULL,                    // Task input parameter
+    2,                       // Priority of the task
+    &_callbackTaskHandle     // Task handle.
+    );
+  if(_callbackTaskHandle == NULL){
+    log_e("Could not create callback task");
+    return 0; // ERR
+  }
+  return 1; // OK
+}
+
+int I2SClass::_installDriver(){
+  if(_driverInstalled){
+    log_e("I2S driver is already installed");
+    return 0; // ERR
+  }
+
+  esp_i2s::i2s_mode_t i2s_mode = (esp_i2s::i2s_mode_t)(esp_i2s::I2S_MODE_RX | esp_i2s::I2S_MODE_TX);
+
+  if(_driveClock){
+    i2s_mode = (esp_i2s::i2s_mode_t)(i2s_mode | esp_i2s::I2S_MODE_MASTER);
+  }else{
+    i2s_mode = (esp_i2s::i2s_mode_t)(i2s_mode | esp_i2s::I2S_MODE_SLAVE);
+  }
+
+  if(_mode == ADC_DAC_MODE){
+    #if (SOC_I2S_SUPPORTS_ADC && SOC_I2S_SUPPORTS_DAC)
+      if(_bitsPerSample != 16){ // ADC/DAC can only work in 16-bit sample mode
+        log_e("ERROR invalid bps for ADC/DAC. Allowed only 16, requested %d", _bitsPerSample);
+        return 0; // ERR
+      }
+      i2s_mode = (esp_i2s::i2s_mode_t)(i2s_mode | esp_i2s::I2S_MODE_DAC_BUILT_IN | esp_i2s::I2S_MODE_ADC_BUILT_IN);
+    #else
+      log_e("This chip does not support ADC / DAC mode");
+      return 0; // ERR
+    #endif
+  }else if(_mode == I2S_PHILIPS_MODE ||
+           _mode == I2S_RIGHT_JUSTIFIED_MODE ||
+           _mode == I2S_LEFT_JUSTIFIED_MODE){ // End of ADC/DAC mode; start of Normal Philips mode
+    if(_bitsPerSample != 8 && _bitsPerSample != 16 && _bitsPerSample != 24 &&  _bitsPerSample != 32){
+        log_e("Invalid bits per sample for normal mode (requested %d)\nAllowed bps = 8 | 16 | 24 | 32", _bitsPerSample);
+      return 0; // ERR
+    }
+    if(_bitsPerSample == 24){
+      log_w("Original Arduino library does not support 24 bits per sample.\nKeep that in mind if you should switch back to Arduino");
+    }
+  }else if(_mode == PDM_STEREO_MODE || _mode == PDM_MONO_MODE){ // end of Normal Philips mode; start of PDM mode
+    #if (SOC_I2S_SUPPORTS_PDM_TX && SOC_I2S_SUPPORTS_PDM_RX)
+      i2s_mode = (esp_i2s::i2s_mode_t)(i2s_mode | esp_i2s::I2S_MODE_PDM);
+    #else
+      log_e("This chip does not support PDM");
+      return 0; // ERR
+    #endif
+  } // Mode
+  esp_i2s::i2s_config_t i2s_config = {
+    .mode = i2s_mode,
+    .sample_rate = _sampleRate,
+    .bits_per_sample = (esp_i2s::i2s_bits_per_sample_t)_bitsPerSample,
+    .channel_format = esp_i2s::I2S_CHANNEL_FMT_RIGHT_LEFT,
+    .communication_format = (esp_i2s::i2s_comm_format_t)(esp_i2s::I2S_COMM_FORMAT_STAND_I2S),
+    .intr_alloc_flags = ESP_INTR_FLAG_LEVEL2,
+    .dma_buf_count = _I2S_DMA_BUFFER_COUNT,
+    .dma_buf_len = _i2s_dma_buffer_size,
+    .use_apll = false
+  };
+
+  if(_driveClock == false){
+    i2s_config.use_apll = true;
+    i2s_config.fixed_mclk = 512*_sampleRate;
+  }
+
+  // Install and start i2s driver
+  while(ESP_OK != esp_i2s::i2s_driver_install((esp_i2s::i2s_port_t) _deviceIndex, &i2s_config, _I2S_EVENT_QUEUE_LENGTH, &_i2sEventQueue)){
+    // increase buffer size
+    if(2*_i2s_dma_buffer_size <= 1024){
+      log_w("WARNING i2s driver install failed.\nTrying to increase I2S DMA buffer size from %d to %d\n", _i2s_dma_buffer_size, 2*_i2s_dma_buffer_size);
+      setBufferSize(2*_i2s_dma_buffer_size);
+    }else if(_i2s_dma_buffer_size < 1024){
+      log_w("WARNING i2s driver install failed.\nTrying to decrease I2S DMA buffer size from %d to 1024\n", _i2s_dma_buffer_size);
+      setBufferSize(1024);
+    }else{ // install failed with max buffer size
+      log_e("ERROR i2s driver install failed");
+      return 0; // ERR
+    }
+  } //try installing with increasing size
+
+  if(_mode == I2S_RIGHT_JUSTIFIED_MODE || _mode == I2S_LEFT_JUSTIFIED_MODE || _mode == PDM_MONO_MODE){ // mono/single channel
+    // Set the clock for MONO. Stereo is not supported yet.
+    if(ESP_OK != esp_i2s::i2s_set_clk((esp_i2s::i2s_port_t) _deviceIndex, _sampleRate, (esp_i2s::i2s_bits_per_sample_t)_bitsPerSample, esp_i2s::I2S_CHANNEL_MONO)){
+      log_e("Setting the I2S Clock has failed!\n");
+      return 0; // ERR
+    }
+  } // mono channel mode
+
+#if (SOC_I2S_SUPPORTS_ADC && SOC_I2S_SUPPORTS_DAC)
+  if(_mode == ADC_DAC_MODE){
+    esp_i2s::i2s_set_dac_mode(esp_i2s::I2S_DAC_CHANNEL_BOTH_EN);
+    esp_i2s::adc_unit_t adc_unit;
+    if(!_gpioToAdcUnit((gpio_num_t)_inSdPin, &adc_unit)){
+      log_e("pin to adc unit conversion failed");
+      return 0; // ERR
+    }
+    esp_i2s::adc_channel_t adc_channel;
+    if(!_gpioToAdcChannel((gpio_num_t)_inSdPin, &adc_channel)){
+      log_e("pin to adc channel conversion failed");
+      return 0; // ERR
+    }
+    if(ESP_OK != esp_i2s::i2s_set_adc_mode(adc_unit, (esp_i2s::adc1_channel_t)adc_channel)){
+      log_e("i2s_set_adc_mode failed");
+      return 0; // ERR
+    }
+    if(ESP_OK != esp_i2s::i2s_set_pin((esp_i2s::i2s_port_t) _deviceIndex, NULL)){
+      log_e("i2s_set_pin failed");
+      return 0; // ERR
+    }
+
+    if(adc_unit == esp_i2s::ADC_UNIT_1){
+      esp_i2s::adc1_config_width(esp_i2s::ADC_WIDTH_BIT_12);
+      esp_i2s::adc1_config_channel_atten((esp_i2s::adc1_channel_t)adc_channel, esp_i2s::ADC_ATTEN_DB_11);
+    }else if(adc_unit == esp_i2s::ADC_UNIT_2){
+      esp_i2s::adc2_config_channel_atten((esp_i2s::adc2_channel_t)adc_channel, esp_i2s::ADC_ATTEN_DB_11);
+    }
+
+    esp_i2s::i2s_adc_enable((esp_i2s::i2s_port_t) _deviceIndex);
+    _driverInstalled = true;
+  }else // End of ADC/DAC mode
+#endif // SOC_I2S_SUPPORTS_ADC_DAC
+  if(_mode == I2S_PHILIPS_MODE || _mode == I2S_RIGHT_JUSTIFIED_MODE || _mode == I2S_LEFT_JUSTIFIED_MODE || _mode == PDM_STEREO_MODE || _mode == PDM_MONO_MODE){ // if I2S mode
+    _driverInstalled = true; // IDF I2S driver must be installed before calling _applyPinSetting
+    if(!_applyPinSetting()){
+      log_e("could not apply pin setting during driver install");
+      _uninstallDriver();
+      return 0; // ERR
+    }
+  } // if I2S _mode
+  return 1; // OK
+}
+
+// Init in MASTER mode: the SCK and FS pins are driven as outputs using the sample rate
+int I2SClass::begin(int mode, int sampleRate, int bitsPerSample){
+  _take_if_not_holding();
+  // master mode (driving clock and frame select pins - output)
+  int ret = begin(mode, sampleRate, bitsPerSample, true);
+  _give_if_top_call();
+  return ret;
+}
+
+// Init in SLAVE mode: the SCK and FS pins are inputs, other side controls sample rate
+int I2SClass::begin(int mode, int bitsPerSample){
+  _take_if_not_holding();
+  // slave mode (not driving clock and frame select pin - input)
+  int ret = begin(mode, 96000, bitsPerSample, false);
+  _give_if_top_call();
+  return ret;
+}
+
+
+// Core function
+int I2SClass::begin(int mode, int sampleRate, int bitsPerSample, bool driveClock){
+  _take_if_not_holding();
+  if(_initialized){
+    log_e("ERROR: Object already initialized! Call I2S.end() to disable");
+    _give_if_top_call();
+    return 0; // ERR
+  }
+  _driveClock = driveClock;
+  _mode = mode;
+  _sampleRate = (uint32_t)sampleRate;
+  _bitsPerSample = bitsPerSample;
+
+  // There is work in progress on this library.
+  if(_bitsPerSample == 16 && _sampleRate > 16000 && driveClock){
+    log_w("This sample rate is not officially supported - audio might be noisy.\nTry using sample rate below or equal to 16000");
+  }
+  if(_bitsPerSample != 16){
+    log_w("This bit-per-sample is not officially supported - audio quality might suffer.\nTry using 16bps, with sample rate below or equal 16000");
+  }
+  if(_mode != I2S_PHILIPS_MODE){
+    log_w("This mode is not officially supported - audio quality might suffer.\nAt the moment the only supported mode is I2S_PHILIPS_MODE");
+  }
+
+  if (_state != I2S_STATE_IDLE && _state != I2S_STATE_DUPLEX) {
+    log_e("Error: unexpected _state (%d)", _state);
+    _give_if_top_call();
+    return 0; // ERR
+  }
+
+  switch (mode) {
+    case I2S_PHILIPS_MODE:
+    case I2S_RIGHT_JUSTIFIED_MODE:
+    case I2S_LEFT_JUSTIFIED_MODE:
+
+    #if (SOC_I2S_SUPPORTS_ADC && SOC_I2S_SUPPORTS_DAC)
+      case ADC_DAC_MODE:
+    #endif
+
+    case PDM_STEREO_MODE:
+    case PDM_MONO_MODE:
+      break;
+
+    default: // invalid mode
+      log_e("ERROR: unknown mode");
+      _give_if_top_call();
+      return 0; // ERR
+  }
+
+  if(!_installDriver()){
+    log_e("ERROR: failed to install driver");
+    end();
+    _give_if_top_call();
+    return 0; // ERR
+  }
+
+  _buffer_byte_size = _i2s_dma_buffer_size * (_bitsPerSample / 8) * _I2S_DMA_BUFFER_COUNT * 2;
+  _input_ring_buffer  = xRingbufferCreate(_buffer_byte_size, RINGBUF_TYPE_BYTEBUF);
+  _output_ring_buffer = xRingbufferCreate(_buffer_byte_size, RINGBUF_TYPE_BYTEBUF);
+  if(_input_ring_buffer == NULL || _output_ring_buffer == NULL){
+    log_e("ERROR: could not create one or both internal buffers. Requested size = %d\n", _buffer_byte_size);
+    _give_if_top_call();
+    return 0; // ERR
+  }
+
+  if(!_createCallbackTask()){
+    log_e("ERROR: failed to create callback task");
+    end();
+    _give_if_top_call();
+    return 0; // ERR
+  }
+  _initialized = true;
+  _give_if_top_call();
+  return 1; // OK
+}
+
+int I2SClass::_applyPinSetting(){
+  if(_driverInstalled){
+    esp_i2s::i2s_pin_config_t pin_config = {
+      .bck_io_num = _sckPin,
+      .ws_io_num = _fsPin,
+      .data_out_num = I2S_PIN_NO_CHANGE,
+      .data_in_num = I2S_PIN_NO_CHANGE
+    };
+    if (_state == I2S_STATE_DUPLEX){ // duplex
+      pin_config.data_out_num = _outSdPin;
+      pin_config.data_in_num = _inSdPin;
+    }else{ // simplex
+      if(_state == I2S_STATE_RECEIVER){
+        pin_config.data_out_num = I2S_PIN_NO_CHANGE;
+        pin_config.data_in_num = _sdPin;
+      }else if(_state == I2S_STATE_TRANSMITTER){
+        pin_config.data_out_num = _sdPin;
+        pin_config.data_in_num = I2S_PIN_NO_CHANGE;
+      }else{
+        pin_config.data_out_num = I2S_PIN_NO_CHANGE;
+        pin_config.data_in_num = _sdPin;
+      }
+    }
+    if(ESP_OK != esp_i2s::i2s_set_pin((esp_i2s::i2s_port_t) _deviceIndex, &pin_config)){
+      log_e("i2s_set_pin failed; attempted settings: SCK=%d; FS=%d; DIN=%d; DOUT=%d", pin_config.bck_io_num, pin_config.ws_io_num, pin_config.data_in_num, pin_config.data_out_num);
+      return 0; // ERR
+    }else{
+      return 1; // OK
+    }
+  } // if(_driverInstalled)
+  return 1; // OK
+}
+
+void I2SClass::_setSckPin(int sckPin){
+  _take_if_not_holding();
+  if(sckPin >= 0){
+    _sckPin = sckPin;
+  }else{
+    _sckPin = PIN_I2S_SCK;
+  }
+  _give_if_top_call();
+}
+
+int I2SClass::setSckPin(int sckPin){
+  _take_if_not_holding();
+  _setSckPin(sckPin);
+  int ret = _applyPinSetting();
+  _applyPinSetting();
+  _give_if_top_call();
+  return ret;
+}
+
+void I2SClass::_setFsPin(int fsPin){
+  if(fsPin >= 0){
+    _fsPin = fsPin;
+  }else{
+    _fsPin = PIN_I2S_FS;
+  }
+}
+
+int I2SClass::setFsPin(int fsPin){
+  _take_if_not_holding();
+  _setFsPin(fsPin);
+  int ret = _applyPinSetting();
+  _give_if_top_call();
+  return ret;
+}
+
+// shared data pin for simplex
+void I2SClass::_setDataPin(int sdPin){
+  if(sdPin >= 0){
+    _sdPin = sdPin;
+  }else{
+    _sdPin = PIN_I2S_SD;
+  }
+}
+
+// shared data pin for simplex
+int I2SClass::setDataPin(int sdPin){
+  _take_if_not_holding();
+  _setDataPin(sdPin);
+  int ret = _applyPinSetting();
+  _give_if_top_call();
+  return ret;
+}
+
+void I2SClass::_setDataInPin(int inSdPin){
+  if(inSdPin >= 0){
+    _inSdPin = inSdPin;
+  }else{
+    _inSdPin = PIN_I2S_SD_IN;
+  }
+}
+
+int I2SClass::setDataInPin(int inSdPin){
+  _take_if_not_holding();
+  _setDataInPin(inSdPin);
+  int ret = _applyPinSetting();
+  _give_if_top_call();
+  return ret;
+}
+
+void I2SClass::_setDataOutPin(int outSdPin){
+  if(outSdPin >= 0){
+    _outSdPin = outSdPin;
+  }else{
+    _outSdPin = PIN_I2S_SD;
+  }
+}
+
+int I2SClass::setDataOutPin(int outSdPin){
+  _take_if_not_holding();
+  _setDataOutPin(outSdPin);
+  int ret = _applyPinSetting();
+  _give_if_top_call();
+  return ret;
+}
+
+int I2SClass::setAllPins(){
+  _take_if_not_holding();
+  int ret = setAllPins(PIN_I2S_SCK, PIN_I2S_FS, PIN_I2S_SD, PIN_I2S_SD_OUT, PIN_I2S_SD_IN);
+  _give_if_top_call();
+  return ret;
+}
+
+int I2SClass::setAllPins(int sckPin, int fsPin, int sdPin, int outSdPin, int inSdPin){
+  _take_if_not_holding();
+  _setSckPin(sckPin);
+  _setFsPin(fsPin);
+  _setDataPin(sdPin);
+  _setDataOutPin(outSdPin);
+  _setDataInPin(inSdPin);
+  int ret = _applyPinSetting();
+  _give_if_top_call();
+  return ret;
+}
+
+int I2SClass::setDuplex(){
+  _take_if_not_holding();
+  _state = I2S_STATE_DUPLEX;
+  _give_if_top_call();
+  return 1;
+}
+
+int I2SClass::setSimplex(){
+  _take_if_not_holding();
+  _state = I2S_STATE_IDLE;
+  _give_if_top_call();
+  return 1;
+}
+
+int I2SClass::isDuplex(){
+  _take_if_not_holding();
+  int ret = (int)(_state == I2S_STATE_DUPLEX);
+  _give_if_top_call();
+  return ret;
+}
+
+int I2SClass::getSckPin(){
+  _take_if_not_holding();
+  int ret = _sckPin;
+  _give_if_top_call();
+  return ret;
+}
+
+int I2SClass::getFsPin(){
+  _take_if_not_holding();
+  int ret = _fsPin;
+  _give_if_top_call();
+  return ret;
+}
+
+int I2SClass::getDataPin(){
+  _take_if_not_holding();
+  int ret = _sdPin;
+  _give_if_top_call();
+  return ret;
+}
+
+int I2SClass::getDataInPin(){
+  _take_if_not_holding();
+  int ret = _inSdPin;
+  _give_if_top_call();
+  return ret;
+}
+
+int I2SClass::getDataOutPin(){
+  _take_if_not_holding();
+  int ret = _outSdPin;
+  _give_if_top_call();
+  return ret;
+}
+
+void I2SClass::_uninstallDriver(){
+  if(_driverInstalled){
+    #if (SOC_I2S_SUPPORTS_ADC && SOC_I2S_SUPPORTS_DAC)
+      if(_mode == ADC_DAC_MODE){
+        esp_i2s::i2s_adc_disable((esp_i2s::i2s_port_t) _deviceIndex);
+      }
+    #endif
+    esp_i2s::i2s_driver_uninstall((esp_i2s::i2s_port_t) _deviceIndex);
+
+    if(_state != I2S_STATE_DUPLEX){
+      _state = I2S_STATE_IDLE;
+    }
+    _driverInstalled = false;
+  } // if(_driverInstalled)
+}
+
+void I2SClass::end(){
+  _take_if_not_holding();
+  if(xTaskGetCurrentTaskHandle() != _callbackTaskHandle){
+    if(_callbackTaskHandle){
+      vTaskDelete(_callbackTaskHandle);
+      _callbackTaskHandle = NULL; // prevent secondary termination to non-existing task
+    }
+    _uninstallDriver();
+    _onTransmit = NULL;
+    _onReceive  = NULL;
+    if(_input_ring_buffer != NULL){
+      vRingbufferDelete(_input_ring_buffer);
+      _input_ring_buffer = NULL;
+    }
+    if(_output_ring_buffer != NULL){
+      vRingbufferDelete(_output_ring_buffer);
+      _output_ring_buffer = NULL;
+    }
+    _initialized = false;
+  }else{
+    log_w("WARNING: ending I2SClass from callback task not permitted, but attempted!");
+  }
+  _give_if_top_call();
+}
+
+// Bytes available to read
+int I2SClass::available(){
+  _take_if_not_holding();
+  int ret = 0;
+  if(_input_ring_buffer != NULL){
+    ret = _buffer_byte_size - (int)xRingbufferGetCurFreeSize(_input_ring_buffer);
+  }
+  _give_if_top_call();
+  return ret;
+}
+
+union i2s_sample_t {
+  uint8_t b8;
+  int16_t b16;
+  int32_t b32;
+};
+
+int I2SClass::read(){
+  _take_if_not_holding();
+  i2s_sample_t sample;
+  sample.b32 = 0;
+  if(_initialized){
+    read(&sample, _bitsPerSample / 8);
+
+    if (_bitsPerSample == 32) {
+      _give_if_top_call();
+      return sample.b32;
+    } else if (_bitsPerSample == 16) {
+      _give_if_top_call();
+      return sample.b16;
+    } else if (_bitsPerSample == 8) {
+      _give_if_top_call();
+      return sample.b8;
+    } else {
+      _give_if_top_call();
+      return 0; // sample value
+    }
+  } // if(_initialized)
+  _give_if_top_call();
+  return 0; // sample value
+}
+
+int I2SClass::read(void* buffer, size_t size){
+  _take_if_not_holding();
+  size_t requested_size = size;
+  if(_initialized){
+    if(!_enableReceiver()){
+      _give_if_top_call();
+      return 0; // There was an error switching to receiver
+    } // _enableReceiver succeeded ?
+
+    size_t item_size = 0;
+    void *tmp_buffer;
+    if(_input_ring_buffer != NULL){
+      if(_peek_buff_valid){
+        memcpy(buffer, &_peek_buff, _bitsPerSample/8);
+        _peek_buff_valid = false;
+        requested_size -= _bitsPerSample/8;
+      }
+      tmp_buffer = xRingbufferReceiveUpTo(_input_ring_buffer, &item_size, pdMS_TO_TICKS(1000), requested_size);
+      if(tmp_buffer != NULL){
+        memcpy(buffer, tmp_buffer, item_size);
+        #if (SOC_I2S_SUPPORTS_ADC && SOC_I2S_SUPPORTS_DAC)
+          if(_mode == ADC_DAC_MODE){
+            for(size_t i = 0; i < item_size / 2; ++i){
+              ((uint16_t*)buffer)[i] = ((uint16_t*)buffer)[i] & 0x0FFF;
+            }
+          } // ADC/DAC mode
+        #endif
+        vRingbufferReturnItem(_input_ring_buffer, tmp_buffer);
+        _give_if_top_call();
+        return item_size;
+      }else{
+        log_w("input buffer is empty - timed out");
+        _give_if_top_call();
+        return 0; // 0 Bytes read / ERR
+      } // tmp buffer not NULL ?
+    } // ring buffer not NULL ?
+  } // if(_initialized)
+  _give_if_top_call();
+  return 0; // 0 Bytes read / ERR
+}
+
+size_t I2SClass::write(uint8_t data){
+  _take_if_not_holding();
+  size_t ret = 0;
+  if(_initialized){
+    ret = write_blocking((int32_t*)&data, 1);
+  }
+  _give_if_top_call();
+  return ret;
+}
+
+size_t I2SClass::write(int32_t sample){
+  _take_if_not_holding();
+  size_t ret = 0;
+  if(_initialized){
+    ret = write_blocking(&sample, _bitsPerSample/8);
+  }
+  _give_if_top_call();
+  return ret;
+}
+
+size_t I2SClass::write(const uint8_t *buffer, size_t size){
+  _take_if_not_holding();
+  size_t ret = 0;
+  if(_initialized){
+    ret = write((const void*)buffer, size);
+  }
+  _give_if_top_call();
+  return ret;
+}
+
+size_t I2SClass::write(const void *buffer, size_t size){
+  _take_if_not_holding();
+  size_t ret = 0;
+  if(_initialized){
+    //size_t ret = write_blocking(buffer, size);
+    ret = write_nonblocking(buffer, size);
+  } // if(_initialized)
+  _give_if_top_call();
+  return ret;
+}
+
+// blocking version of write
+// This version of write will wait indefinitely to write requested samples
+// into output buffer
+size_t I2SClass::write_blocking(const void *buffer, size_t size){
+  _take_if_not_holding();
+  if(_initialized){
+    if(!_enableTransmitter()){
+      _give_if_top_call();
+      return 0; // There was an error switching to transmitter
+    } // _enableTransmitter succeeded ?
+
+    if(_output_ring_buffer != NULL){
+      int ret = xRingbufferSend(_output_ring_buffer, buffer, size, portMAX_DELAY);
+      if(pdTRUE == ret){
+        _give_if_top_call();
+        return size;
+      }else{
+        log_e("xRingbufferSend() with infinite wait returned with error");
+        _give_if_top_call();
+        return 0;
+      } // ring buffer send ok ?
+    } // ring buffer not NULL ?
+  } // if(_initialized)
+  return 0;
+  log_w("I2S not initialized");
+  _give_if_top_call();
+  return 0;
+}
+
+// non-blocking version of write
+// In case there is not enough space in buffer to write requested size
+// this function will try to flush the buffer and write requested data with 0 time-out
+size_t I2SClass::write_nonblocking(const void *buffer, size_t size){
+  _take_if_not_holding();
+  if(_initialized){
+    if(_state != I2S_STATE_TRANSMITTER && _state != I2S_STATE_DUPLEX){
+      if(!_enableTransmitter()){
+        _give_if_top_call();
+        return 0; // There was an error switching to transmitter
+      }
+    }
+    if(availableForWrite() < size){
+      flush();
+    }
+    if(_output_ring_buffer != NULL){
+      if(pdTRUE == xRingbufferSend(_output_ring_buffer, buffer, size, 0)){
+        _give_if_top_call();
+        return size;
+      }else{
+        log_w("I2S could not write all data into ring buffer!");
+        _give_if_top_call();
+        return 0;
+      }
+    }
+  } // if(_initialized)
+  return 0;
+  _give_if_top_call(); // this should not be needed
+}
+
+/*
+  Read 1 sample from internal buffer and return it.
+  Repeated peeks will return the same sample until read is called.
+*/
+int I2SClass::peek(){
+  _take_if_not_holding();
+  int ret = 0;
+  if(_initialized && _input_ring_buffer != NULL && !_peek_buff_valid){
+    size_t item_size = 0;
+    void *item = NULL;
+
+    item = xRingbufferReceiveUpTo(_input_ring_buffer, &item_size, 0, _bitsPerSample/8); // fetch 1 sample
+    if (item != NULL && item_size == _bitsPerSample/8){
+      _peek_buff = *((int*)item);
+      vRingbufferReturnItem(_input_ring_buffer, item);
+      _peek_buff_valid = true;
+    }
+
+  } // if(_initialized)
+  if(_peek_buff_valid){
+    ret = _peek_buff;
+  }
+  _give_if_top_call();
+  return ret;
+}
+
+void I2SClass::flush(){
+  _take_if_not_holding();
+  if(_initialized){
+    const size_t single_dma_buf = _i2s_dma_buffer_size*(_bitsPerSample/8)*2;
+    size_t item_size = 0;
+    void *item = NULL;
+    if(_output_ring_buffer != NULL){
+      item = xRingbufferReceiveUpTo(_output_ring_buffer, &item_size, 0, single_dma_buf);
+      if (item != NULL){
+        _fix_and_write(item, item_size);
+        vRingbufferReturnItem(_output_ring_buffer, item);
+      }
+    }
+  } // if(_initialized)
+  _give_if_top_call();
+}
+
+// Bytes available to write
+int I2SClass::availableForWrite(){
+  _take_if_not_holding();
+  int ret = 0;
+  if(_initialized){
+    if(_output_ring_buffer != NULL){
+      ret = (int)xRingbufferGetCurFreeSize(_output_ring_buffer);
+    }
+  } // if(_initialized)
+  _give_if_top_call();
+  return ret;
+}
+
+void I2SClass::onTransmit(void(*function)(void)){
+  _take_if_not_holding();
+  _onTransmit = function;
+  _give_if_top_call();
+}
+
+void I2SClass::onReceive(void(*function)(void)){
+  _take_if_not_holding();
+  _onReceive = function;
+  _give_if_top_call();
+}
+
+int I2SClass::setBufferSize(int bufferSize){
+  _take_if_not_holding();
+  int ret = 0;
+  if(bufferSize >= 8 && bufferSize <= 1024){
+    _i2s_dma_buffer_size = bufferSize;
+  }else{
+    log_e("setBufferSize: wrong input! Buffer size must be between 8 and 1024. Requested %d", bufferSize);
+    _give_if_top_call();
+    return 0; // ERR
+  } // check requested buffer size
+
+  if(_initialized){
+    _uninstallDriver();
+    ret = _installDriver();
+    _give_if_top_call();
+    return ret;
+  }else{ // check requested buffer size
+    _give_if_top_call();
+    return 1; // It's ok to change buffer size for uninitialized driver - new size will be used on begin()
+  } // if(_initialized)
+  _give_if_top_call();
+  return 0; // ERR
+}
+
+int I2SClass::getBufferSize(){
+  _take_if_not_holding();
+  int ret = _i2s_dma_buffer_size;
+  _give_if_top_call();
+  return ret;
+}
+
+int I2SClass::_enableTransmitter(){
+  if(_state != I2S_STATE_DUPLEX && _state != I2S_STATE_TRANSMITTER){
+    _state = I2S_STATE_TRANSMITTER;
+    return _applyPinSetting();
+  }
+  return 1; // Ok
+}
+
+int I2SClass::_enableReceiver(){
+  if(_state != I2S_STATE_DUPLEX && _state != I2S_STATE_RECEIVER){
+    _state = I2S_STATE_RECEIVER;
+    return _applyPinSetting();
+  }
+  return 1; // Ok
+}
+
+void I2SClass::_tx_done_routine(uint8_t* prev_item){
+  static bool prev_item_valid = false;
+  const size_t single_dma_buf = _i2s_dma_buffer_size*(_bitsPerSample/8)*2; // *2 for stereo - it has double number of samples for 2 channels
+  static size_t item_size = 0;
+  static size_t prev_item_size = 0;
+  static void *item = NULL;
+  static int prev_item_offset = 0;
+  static size_t bytes_written = 0;
+
+  if(prev_item_valid){ // use item from previous round
+    _fix_and_write(prev_item+prev_item_offset, prev_item_size, &bytes_written);
+    if(prev_item_size == bytes_written){
+      prev_item_valid = false;
+    } // write size check
+    prev_item_offset = bytes_written;
+    prev_item_size -= bytes_written;
+  } // prev_item_valid
+
+  if(_output_ring_buffer != NULL && (_buffer_byte_size - xRingbufferGetCurFreeSize(_output_ring_buffer) >= single_dma_buf)){ // fill up the I2S DMA buffer
+    bytes_written = 0;
+    item_size = 0;
+    if(_buffer_byte_size - xRingbufferGetCurFreeSize(_output_ring_buffer) >= _i2s_dma_buffer_size*(_bitsPerSample/8)){ // don't read from almost empty buffer
+      item = xRingbufferReceiveUpTo(_output_ring_buffer, &item_size, pdMS_TO_TICKS(0), single_dma_buf);
+      if (item != NULL){
+        _fix_and_write(item, item_size, &bytes_written);
+        if(item_size != bytes_written){ // save item that was not written correctly for later
+          memcpy(prev_item, (void*)&((uint8_t*)item)[bytes_written], item_size-bytes_written);
+          prev_item_size = item_size - bytes_written;
+          prev_item_offset = 0;
+          prev_item_valid = true;
+        } // save item that was not written correctly for later
+        vRingbufferReturnItem(_output_ring_buffer, item);
+      } // Check received item
+    } // don't read from almost empty buffer
+  } // fill up the I2S DMA buffer
+  if(_onTransmit){
+    _onTransmit();
+  } // user callback
+}
+
+void I2SClass::_rx_done_routine(){
+  size_t bytes_read = 0;
+  const size_t single_dma_buf = _i2s_dma_buffer_size*(_bitsPerSample/8);
+
+  if(_input_ring_buffer != NULL){
+    uint8_t *_inputBuffer = (uint8_t*)malloc(_i2s_dma_buffer_size*4);
+    size_t avail = xRingbufferGetCurFreeSize(_input_ring_buffer);
+    if(avail > 0){
+      esp_err_t ret = esp_i2s::i2s_read((esp_i2s::i2s_port_t) _deviceIndex, _inputBuffer, avail <= single_dma_buf ? avail : single_dma_buf, (size_t*) &bytes_read, 0);
+      if(ret != ESP_OK){
+        log_w("i2s_read returned with error %d", ret);
+      }
+      _post_read_data_fix(_inputBuffer, &bytes_read);
+    }
+
+    if(bytes_read > 0){ // when read more than 0, then send to ring buffer
+      if(pdTRUE != xRingbufferSend(_input_ring_buffer, _inputBuffer, bytes_read, 0)){
+        log_w("I2S failed to send item from DMA to internal buffer\n");
+      } // xRingbufferSendComplete
+    } // if(bytes_read > 0)
+    free(_inputBuffer);
+    if (_onReceive && avail < _buffer_byte_size){ // when user callback is registered && and there is some data in ring buffer to read
+      _onReceive();
+    } // user callback
+  }
+}
+
+void I2SClass::_onTransferComplete(){
+  uint8_t prev_item[_i2s_dma_buffer_size*4];
+  esp_i2s::i2s_event_t i2s_event;
+
+  while(true){
+    xQueueReceive(_i2sEventQueue, &i2s_event, portMAX_DELAY);
+    if(i2s_event.type == esp_i2s::I2S_EVENT_TX_DONE){
+      _tx_done_routine(prev_item);
+    }else if(i2s_event.type == esp_i2s::I2S_EVENT_RX_DONE){
+      _rx_done_routine();
+    } // RX Done
+  } // infinite loop
+}
+
+void I2SClass::onDmaTransferComplete(void*){
+  I2S._onTransferComplete();
+}
+
+void I2SClass::_take_if_not_holding(){
+  TaskHandle_t mutex_holder = xSemaphoreGetMutexHolder(_i2s_general_mutex);
+  if(mutex_holder != NULL && mutex_holder == xTaskGetCurrentTaskHandle()){
+    ++_nesting_counter;
+    return; // we are already holding this mutex - no need to take it
+  }
+
+  // we are not holding the mutex - wait for it and take it
+  if(xSemaphoreTake(_i2s_general_mutex, portMAX_DELAY) != pdTRUE ){
+    log_e("I2S internal mutex take returned with error");
+  }
+  //_give_if_top_call(); // call after this function
+}
+
+void I2SClass::_give_if_top_call(){
+  if(_nesting_counter){
+    --_nesting_counter;
+  }else{
+    if(xSemaphoreGive(_i2s_general_mutex) != pdTRUE){
+      log_e("I2S internal mutex give error");
+    }
+  }
+}
+
+
+// Fixes data in-situ received from esp i2s driver. After fixing they reflect what was on the bus.
+// input - bytes as received from i2s_read - this serves as input and output buffer
+// size - number of bytes (this may be changed during operation)
+void I2SClass::_post_read_data_fix(void *input, size_t *size){
+  ulong dst_ptr = 0;
+  switch(_bitsPerSample){
+    case 8:
+      for(int i = 0; i < *size; i+=4){
+        ((uint8_t*)input)[dst_ptr++] = ((uint8_t*)input)[i+3];
+        ((uint8_t*)input)[dst_ptr++] = ((uint8_t*)input)[i+1];
+      }
+      *size /= 2;
+    break;
+    case 16:
+      uint16_t tmp;
+      for(int i = 0; i < *size/2; i+=2){
+        tmp = ((uint16_t*)input)[i];
+        ((uint16_t*)input)[dst_ptr++] = ((uint16_t*)input)[i+1];
+        ((uint16_t*)input)[dst_ptr++] = tmp;
+      }
+      break;
+      default: ; // Do nothing
+  } // switch
+}
+
+// Prepares data and writes them to IDF i2s driver.
+// This counters possible bug in ESP IDF I2S driver
+// output - bytes to be sent
+// size - number of bytes in original buffer
+// bytes_written - number of bytes used from original buffer
+// actual_bytes_written - number of bytes written by i2s_write after fix
+void I2SClass::_fix_and_write(void *output, size_t size, size_t *bytes_written, size_t *actual_bytes_written){
+  long start = millis();
+  ulong src_ptr = 0;
+  uint8_t* buff = NULL;
+  size_t buff_size = size;
+  switch(_bitsPerSample){
+    case 8:
+      buff_size = size *2;
+      buff = (uint8_t*)calloc(buff_size, sizeof(uint8_t));
+      if(buff == NULL){
+        log_e("callock error");
+        if(bytes_written != NULL){ *bytes_written = 0; }
+        return;
+      }
+      for(int i = 0; i < buff_size ; i+=4){
+        ((uint8_t*)buff)[i+3] = (uint16_t)((uint8_t*)output)[src_ptr++];
+        ((uint8_t*)buff)[i+1] = (uint16_t)((uint8_t*)output)[src_ptr++];
+      }
+    break;
+    case 16:
+      buff = (uint8_t*)malloc(buff_size);
+      if(buff == NULL){
+        log_e("malloc error");
+        if(bytes_written != NULL){ *bytes_written = 0; }
+        return;
+      }
+      for(int i = 0; i < size/2; i += 2 ){
+        ((uint16_t*)buff)[i]   = ((uint16_t*)output)[i+1]; // [1] <- [0]
+        ((uint16_t*)buff)[i+1] = ((uint16_t*)output)[i]; // [0] <- [1]
+      }
+    break;
+    case 24:
+      buff = (uint8_t*)output;
+      break;
+    case 32:
+      buff = (uint8_t*)output;
+      break;
+    default: ; // Do nothing
+  } // switch
+
+  size_t _bytes_written;
+  esp_err_t ret = esp_i2s::i2s_write((esp_i2s::i2s_port_t) _deviceIndex, buff, buff_size, &_bytes_written, 0); // fixed
+  if(ret != ESP_OK){
+    log_e("Error: writing data to i2s - function returned with err code %d", ret);
+  }
+  if(ret == ESP_OK && buff_size != _bytes_written){
+    log_w("Warning: writing data to i2s - written %d B instead of requested %d B", _bytes_written, buff_size);
+  }
+  // free if the buffer was actually allocated
+  if(_bitsPerSample == 8 || _bitsPerSample == 16){
+    free(buff);
+  }
+  if(bytes_written != NULL){
+    *bytes_written = _bitsPerSample == 8 ? _bytes_written/2 : _bytes_written;
+  }
+  if(actual_bytes_written != NULL){
+    *actual_bytes_written = _bytes_written;
+  }
+}
+
+
+#if (SOC_I2S_SUPPORTS_ADC && SOC_I2S_SUPPORTS_DAC)
+int I2SClass::_gpioToAdcUnit(gpio_num_t gpio_num, esp_i2s::adc_unit_t* adc_unit){
+  switch(gpio_num){
+#if CONFIG_IDF_TARGET_ESP32
+    // ADC 1
+    case GPIO_NUM_36:
+    case GPIO_NUM_37:
+    case GPIO_NUM_38:
+    case GPIO_NUM_39:
+    case GPIO_NUM_32:
+    case GPIO_NUM_33:
+    case GPIO_NUM_34:
+    case GPIO_NUM_35:
+      *adc_unit = esp_i2s::ADC_UNIT_1;
+      return 1; // OK
+
+    // ADC 2
+    case GPIO_NUM_0:
+      log_w("GPIO 0 for ADC should not be used for dev boards due to external auto program circuits.");
+    case GPIO_NUM_4:
+    case GPIO_NUM_2:
+    case GPIO_NUM_15:
+    case GPIO_NUM_13:
+    case GPIO_NUM_12:
+    case GPIO_NUM_14:
+    case GPIO_NUM_27:
+    case GPIO_NUM_25:
+    case GPIO_NUM_26:
+      *adc_unit = esp_i2s::ADC_UNIT_2;
+      return 1; // OK
+#endif
+
+#if (CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3)
+    case GPIO_NUM_1:
+    case GPIO_NUM_2:
+    case GPIO_NUM_3:
+    case GPIO_NUM_4:
+    case GPIO_NUM_5:
+    case GPIO_NUM_6:
+    case GPIO_NUM_7:
+    case GPIO_NUM_8:
+    case GPIO_NUM_9:
+    case GPIO_NUM_10:
+      *adc_unit = esp_i2s::ADC_UNIT_1;
+      return 1; // OK
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32S2
+    case GPIO_NUM_11:
+    case GPIO_NUM_12:
+    case GPIO_NUM_13:
+    case GPIO_NUM_14:
+    case GPIO_NUM_15:
+    case GPIO_NUM_16:
+    case GPIO_NUM_17:
+    case GPIO_NUM_18:
+    case GPIO_NUM_19:
+    case GPIO_NUM_20:
+      *adc_unit = esp_i2s::ADC_UNIT_2;
+      return 1; // OK
+#endif
+
+#if (CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2)
+    case GPIO_NUM_0:
+    case GPIO_NUM_1:
+    case GPIO_NUM_2:
+    case GPIO_NUM_3:
+    case GPIO_NUM_4:
+      *adc_unit = esp_i2s::ADC_UNIT_1;
+      return 1; // OK
+    case GPIO_NUM_5:
+      *adc_unit = esp_i2s::ADC_UNIT_2;
+      return 1; // OK
+#endif
+    default:
+      log_e("GPIO %d not usable for ADC!", gpio_num);
+      log_i("Please refer to documentation https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/peripherals/gpio.html");
+      return 0; // ERR
+  }
+}
+
+int I2SClass::_gpioToAdcChannel(gpio_num_t gpio_num, esp_i2s::adc_channel_t* adc_channel){
+ switch(gpio_num){
+#if CONFIG_IDF_TARGET_ESP32
+    // ADC 1
+    case GPIO_NUM_36: *adc_channel =  esp_i2s::ADC_CHANNEL_0; return 1; // OK
+    case GPIO_NUM_37: *adc_channel =  esp_i2s::ADC_CHANNEL_1; return 1; // OK
+    case GPIO_NUM_38: *adc_channel =  esp_i2s::ADC_CHANNEL_2; return 1; // OK
+    case GPIO_NUM_39: *adc_channel =  esp_i2s::ADC_CHANNEL_3; return 1; // OK
+    case GPIO_NUM_32: *adc_channel =  esp_i2s::ADC_CHANNEL_4; return 1; // OK
+    case GPIO_NUM_33: *adc_channel =  esp_i2s::ADC_CHANNEL_5; return 1; // OK
+    case GPIO_NUM_34: *adc_channel =  esp_i2s::ADC_CHANNEL_6; return 1; // OK
+    case GPIO_NUM_35: *adc_channel =  esp_i2s::ADC_CHANNEL_7; return 1; // OK
+
+    // ADC 2
+    case GPIO_NUM_0:
+      log_w("GPIO 0 for ADC should not be used for dev boards due to external auto program circuits.");
+      *adc_channel =  esp_i2s::ADC_CHANNEL_1; return 1; // OK
+    case GPIO_NUM_4:  *adc_channel =  esp_i2s::ADC_CHANNEL_0; return 1; // OK
+    case GPIO_NUM_2:  *adc_channel =  esp_i2s::ADC_CHANNEL_2; return 1; // OK
+    case GPIO_NUM_15: *adc_channel =  esp_i2s::ADC_CHANNEL_3; return 1; // OK
+    case GPIO_NUM_13: *adc_channel =  esp_i2s::ADC_CHANNEL_4; return 1; // OK
+    case GPIO_NUM_12: *adc_channel =  esp_i2s::ADC_CHANNEL_5; return 1; // OK
+    case GPIO_NUM_14: *adc_channel =  esp_i2s::ADC_CHANNEL_6; return 1; // OK
+    case GPIO_NUM_27: *adc_channel =  esp_i2s::ADC_CHANNEL_7; return 1; // OK
+    case GPIO_NUM_25: *adc_channel =  esp_i2s::ADC_CHANNEL_8; return 1; // OK
+    case GPIO_NUM_26: *adc_channel =  esp_i2s::ADC_CHANNEL_9; return 1; // OK
+#endif
+
+#if (CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3)
+    case GPIO_NUM_1: *adc_channel =  esp_i2s::ADC_CHANNEL_0; return 1; // OK
+    case GPIO_NUM_2: *adc_channel =  esp_i2s::ADC_CHANNEL_1; return 1; // OK
+    case GPIO_NUM_3: *adc_channel =  esp_i2s::ADC_CHANNEL_2; return 1; // OK
+    case GPIO_NUM_4: *adc_channel =  esp_i2s::ADC_CHANNEL_3; return 1; // OK
+    case GPIO_NUM_5: *adc_channel =  esp_i2s::ADC_CHANNEL_4; return 1; // OK
+    case GPIO_NUM_6: *adc_channel =  esp_i2s::ADC_CHANNEL_5; return 1; // OK
+    case GPIO_NUM_7: *adc_channel =  esp_i2s::ADC_CHANNEL_6; return 1; // OK
+    case GPIO_NUM_8: *adc_channel =  esp_i2s::ADC_CHANNEL_7; return 1; // OK
+    case GPIO_NUM_9: *adc_channel =  esp_i2s::ADC_CHANNEL_8; return 1; // OK
+    case GPIO_NUM_10: *adc_channel =  esp_i2s::ADC_CHANNEL_9; return 1; // OK
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32S2
+    case GPIO_NUM_11: *adc_channel =  esp_i2s::ADC_CHANNEL_0; return 1; // OK
+    case GPIO_NUM_12: *adc_channel =  esp_i2s::ADC_CHANNEL_1; return 1; // OK
+    case GPIO_NUM_13: *adc_channel =  esp_i2s::ADC_CHANNEL_2; return 1; // OK
+    case GPIO_NUM_14: *adc_channel =  esp_i2s::ADC_CHANNEL_3; return 1; // OK
+    case GPIO_NUM_15: *adc_channel =  esp_i2s::ADC_CHANNEL_4; return 1; // OK
+    case GPIO_NUM_16: *adc_channel =  esp_i2s::ADC_CHANNEL_5; return 1; // OK
+    case GPIO_NUM_17: *adc_channel =  esp_i2s::ADC_CHANNEL_6; return 1; // OK
+    case GPIO_NUM_18: *adc_channel =  esp_i2s::ADC_CHANNEL_7; return 1; // OK
+    case GPIO_NUM_19: *adc_channel =  esp_i2s::ADC_CHANNEL_8; return 1; // OK
+    case GPIO_NUM_20: *adc_channel =  esp_i2s::ADC_CHANNEL_9; return 1; // OK
+#endif
+
+#if (CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2)
+    case GPIO_NUM_0: *adc_channel =  esp_i2s::ADC_CHANNEL_0; return 1; // OK
+    case GPIO_NUM_1: *adc_channel =  esp_i2s::ADC_CHANNEL_1; return 1; // OK
+    case GPIO_NUM_2: *adc_channel =  esp_i2s::ADC_CHANNEL_2; return 1; // OK
+    case GPIO_NUM_3: *adc_channel =  esp_i2s::ADC_CHANNEL_3; return 1; // OK
+    case GPIO_NUM_4: *adc_channel =  esp_i2s::ADC_CHANNEL_4; return 1; // OK
+    case GPIO_NUM_5: *adc_channel =  esp_i2s::ADC_CHANNEL_0; return 1; // OK
+#endif
+    default:
+      log_e("GPIO %d not usable for ADC!", gpio_num);
+      log_i("Please refer to documentation https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/peripherals/gpio.html");
+      return 0; // ERR
+  }
+}
+#endif // SOC_I2S_SUPPORTS_ADC_DAC
+
+#if I2S_INTERFACES_COUNT > 0
+  I2SClass I2S(I2S_DEVICE, I2S_CLOCK_GENERATOR, PIN_I2S_SD, PIN_I2S_SCK, PIN_I2S_FS); // default - half duplex
+#endif
+
+#if I2S_INTERFACES_COUNT > 1
+  // TODO set default pins for second module
+  //I2SClass I2S1(I2S_DEVICE+1, I2S_CLOCK_GENERATOR, PIN_I2S_SD, PIN_I2S_SCK, PIN_I2S_FS); // default - half duplex
+#endif
diff --git a/libraries/I2S/src/I2S.h b/libraries/I2S/src/I2S.h
new file mode 100644
index 00000000000..623fa8917b4
--- /dev/null
+++ b/libraries/I2S/src/I2S.h
@@ -0,0 +1,195 @@
+/*
+  Copyright (c) 2016 Arduino LLC.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _I2S_H_INCLUDED
+#define _I2S_H_INCLUDED
+
+#include <Arduino.h>
+#include "freertos/ringbuf.h"
+
+namespace esp_i2s {
+  #include "driver/i2s.h" // ESP specific i2s driver
+}
+
+// Default pins
+#ifndef PIN_I2S_SCK
+  #define PIN_I2S_SCK 14
+#endif
+
+#ifndef PIN_I2S_FS
+  #if CONFIG_IDF_TARGET_ESP32S2
+    #define PIN_I2S_FS 27
+  #else
+    #define PIN_I2S_FS 25
+  #endif
+#endif
+
+#ifndef PIN_I2S_SD
+  #define PIN_I2S_SD 26
+#endif
+
+#ifndef PIN_I2S_SD_OUT
+  #define PIN_I2S_SD_OUT 26
+#endif
+
+#ifndef PIN_I2S_SD_IN
+  #define PIN_I2S_SD_IN 35 // Pin 35 is only input!
+#endif
+
+typedef enum {
+  I2S_PHILIPS_MODE,
+  I2S_RIGHT_JUSTIFIED_MODE,
+  I2S_LEFT_JUSTIFIED_MODE,
+  ADC_DAC_MODE,
+  PDM_STEREO_MODE,
+  PDM_MONO_MODE
+} i2s_mode_t;
+
+class I2SClass : public Stream
+{
+public:
+  // The device index and pins must map to the "COM" pads in Table 6-1 of the datasheet
+  I2SClass(uint8_t deviceIndex, uint8_t clockGenerator, uint8_t sdPin, uint8_t sckPin, uint8_t fsPin);
+
+  // Init in MASTER mode: the SCK and FS pins are driven as outputs using the sample rate
+  int begin(int mode, int sampleRate, int bitsPerSample);
+
+  // Init in SLAVE mode: the SCK and FS pins are inputs, other side controls sample rate
+  int begin(int mode, int bitsPerSample);
+
+  // change pin setup and mode (default is Half Duplex)
+  // Can be called only on initialized object (after begin)
+  int setSckPin(int sckPin);
+  int setFsPin(int fsPin);
+  int setDataPin(int sdPin); // shared data pin for simplex
+  int setDataOutPin(int outSdPin);
+  int setDataInPin(int inSdPin);
+
+  int setAllPins();
+  int setAllPins(int sckPin, int fsPin, int sdPin, int outSdPin, int inSdPin);
+
+  int getSckPin();
+  int getFsPin();
+  int getDataPin();
+  int getDataOutPin();
+  int getDataInPin();
+
+  int setDuplex();
+  int setSimplex();
+  int isDuplex();
+
+  void end();
+
+  // from Stream
+  virtual int available();
+  virtual int read();
+  virtual int peek();
+  virtual void flush();
+
+  // from Print
+  virtual size_t write(uint8_t);
+  virtual size_t write(const uint8_t *buffer, size_t size);
+
+  virtual int availableForWrite();
+
+  int read(void* buffer, size_t size);
+
+  //size_t write(int);
+  size_t write(int32_t);
+  size_t write(const void *buffer, size_t size);
+  size_t write_blocking(const void *buffer, size_t size);
+  size_t write_nonblocking(const void *buffer, size_t size);
+
+  void onTransmit(void(*)(void));
+  void onReceive(void(*)(void));
+
+  int setBufferSize(int bufferSize);
+  int getBufferSize();
+private:
+  #if (SOC_I2S_SUPPORTS_ADC && SOC_I2S_SUPPORTS_DAC)
+    int _gpioToAdcUnit(gpio_num_t gpio_num, esp_i2s::adc_unit_t* adc_unit);
+    int _gpioToAdcChannel(gpio_num_t gpio_num, esp_i2s::adc_channel_t* adc_channel);
+  #endif
+  int begin(int mode, int sampleRate, int bitsPerSample, bool driveClock);
+
+  int _enableTransmitter();
+  int _enableReceiver();
+  void _onTransferComplete();
+
+  int _createCallbackTask();
+
+  static void onDmaTransferComplete(void*);
+  int _installDriver();
+  void _uninstallDriver();
+  void _setSckPin(int sckPin);
+  void _setFsPin(int fsPin);
+  void _setDataPin(int sdPin);
+  void _setDataOutPin(int outSdPin);
+  void _setDataInPin(int inSdPin);
+  int  _applyPinSetting();
+
+private:
+  typedef enum {
+    I2S_STATE_IDLE,
+    I2S_STATE_TRANSMITTER,
+    I2S_STATE_RECEIVER,
+    I2S_STATE_DUPLEX
+  } i2s_state_t;
+
+  int _deviceIndex;
+  int _sdPin;
+  int _inSdPin;
+  int _outSdPin;
+  int _sckPin;
+  int _fsPin;
+
+  i2s_state_t _state;
+  int _bitsPerSample;
+  uint32_t _sampleRate;
+  int _mode;
+
+  uint16_t _buffer_byte_size;
+
+  bool _driverInstalled; // Is IDF I2S driver installed?
+  bool _initialized; // Is everything initialized (callback task, I2S driver, ring buffers)?
+  TaskHandle_t _callbackTaskHandle;
+  QueueHandle_t _i2sEventQueue;
+  SemaphoreHandle_t _i2s_general_mutex;
+  RingbufHandle_t _input_ring_buffer;
+  RingbufHandle_t _output_ring_buffer;
+  int _i2s_dma_buffer_size;
+  bool _driveClock;
+  uint32_t _peek_buff;
+  bool _peek_buff_valid;
+
+  void _tx_done_routine(uint8_t* prev_item);
+  void _rx_done_routine();
+
+  uint16_t _nesting_counter;
+  void _take_if_not_holding();
+  void _give_if_top_call();
+  void _post_read_data_fix(void *input, size_t *size);
+  void _fix_and_write(void *output, size_t size, size_t *bytes_written = NULL, size_t *actual_bytes_written = NULL);
+
+  void (*_onTransmit)(void);
+  void (*_onReceive)(void);
+};
+
+extern I2SClass I2S;
+
+#endif
diff --git a/libraries/LittleFS/examples/LITTLEFS_PlatformIO/platformio.ini b/libraries/LittleFS/examples/LITTLEFS_PlatformIO/platformio.ini
index 43e34ec0d34..4d3087a3012 100644
--- a/libraries/LittleFS/examples/LITTLEFS_PlatformIO/platformio.ini
+++ b/libraries/LittleFS/examples/LITTLEFS_PlatformIO/platformio.ini
@@ -16,17 +16,6 @@ framework = arduino
 
 [env:esp32]
 platform = espressif32
-;platform = https://github.com/platformio/platform-espressif32.git
-;board_build.mcu = esp32
-platform_packages = framework-arduinoespressif32 @ https://github.com/espressif/arduino-esp32.git
-
-build_flags = 
-	${env.build_flags} 
-	-D=${PIOENV} 
-	;-D CONFIG_LITTLEFS_FOR_IDF_3_2
-
-lib_deps = https://github.com/lorol/LITTLEFS.git
-
 board = esp32dev
 ;board_build.partitions = partitions_custom.csv
 monitor_filters = esp32_exception_decoder
diff --git a/libraries/LittleFS/examples/LITTLEFS_time/LITTLEFS_time.ino b/libraries/LittleFS/examples/LITTLEFS_time/LITTLEFS_time.ino
index bb5b9c3ae91..038261b1127 100644
--- a/libraries/LittleFS/examples/LITTLEFS_time/LITTLEFS_time.ino
+++ b/libraries/LittleFS/examples/LITTLEFS_time/LITTLEFS_time.ino
@@ -160,10 +160,6 @@ void setup(){
     Serial.println("IP address: ");
     Serial.println(WiFi.localIP());
     Serial.println("Contacting Time Server");
-    /*
-        Note: Bundled Arduino lwip supports only ONE ntp server, 2nd and 3rd options are silently ignored
-        see CONFIG_LWIP_DHCP_MAX_NTP_SERVERS define in ./tools/sdk/esp32/sdkconfig
-     */
 	configTime(3600*timezone, daysavetime*3600, "time.nist.gov", "0.pool.ntp.org", "1.pool.ntp.org");
 	struct tm tmstruct ;
     delay(2000);
diff --git a/libraries/README.md b/libraries/README.md
index e7c77efbad5..5edeebba424 100644
--- a/libraries/README.md
+++ b/libraries/README.md
@@ -12,7 +12,9 @@ arduino-esp32 includes libraries for Arduino compatibility along with some objec
   Bluetooth Low Energy v4.2 client/server framework
 
 ### BluetoothSerial
-  Serial to Bluetooth redirection server
+  Serial to Bluetooth redirection server\
+  Note: This library depends on Bluetooth Classic which is only available for ESP32\
+  (Bluetoothserial is **not available** for ESP32-S2, ESP32-C3, ESP32-S3).
 
 ### DNSServer
   A basic UDP DNS daemon (includes captive portal demo)
diff --git a/libraries/RainMaker/examples/README.md b/libraries/RainMaker/examples/README.md
index 6c5bded09ac..0b978040085 100644
--- a/libraries/RainMaker/examples/README.md
+++ b/libraries/RainMaker/examples/README.md
@@ -1,10 +1,13 @@
 # ESP RainMaker Examples
 
 While building any examples for ESP RainMaker, take care of the following:
+
 1. Change partition scheme in Arduino IDE to RainMaker (Tools -> Partition Scheme -> RainMaker).
 2. Once ESP RainMaker gets started, compulsorily call `WiFi.beginProvision()` which is responsible for user-node mapping.
-3. Use appropriate provisioning scheme as per the board.
+3. Use the appropriate provisioning scheme as per the board.
     - ESP32 Board: BLE Provisioning
-    - ESP32S2 Board: SoftAP Provisioning
-4. Set debug level to Info (Tools -> Core Debug Level -> Info). This is recommended, but not mandatory.
+    - ESP32-C3 Board: BLE Provisioning
+    - ESP32-S3 Board: BLE Provisioning
+    - ESP32-S2 Board: SoftAP Provisioning
+4. Set debug level to Info (Tools -> Core Debug Level -> Info). This is recommended debug level but not mandatory to run RainMaker.
 
diff --git a/libraries/RainMaker/examples/RMakerCustom/RMakerCustom.ino b/libraries/RainMaker/examples/RMakerCustom/RMakerCustom.ino
index 55012e413c6..892f285415f 100644
--- a/libraries/RainMaker/examples/RMakerCustom/RMakerCustom.ino
+++ b/libraries/RainMaker/examples/RMakerCustom/RMakerCustom.ino
@@ -9,10 +9,15 @@ const char *service_name = "PROV_1234";
 const char *pop = "abcd1234";
 
 //GPIO for push button
-static int gpio_0 = 0;
+#if CONFIG_IDF_TARGET_ESP32C3
+static int gpio_0 = 9;
+static int gpio_dimmer = 7;
+#else
 //GPIO for virtual device
+static int gpio_0 = 0;
 static int gpio_dimmer = 16;
-/* Variable for reading pin status*/
+#endif
+
 bool dimmer_state = true;
 
 // The framework provides some standard device types like switch, lightbulb, fan, temperature sensor.
@@ -23,12 +28,12 @@ void sysProvEvent(arduino_event_t *sys_event)
 {
     switch (sys_event->event_id) {      
         case ARDUINO_EVENT_PROV_START:
-#if CONFIG_IDF_TARGET_ESP32
-        Serial.printf("\nProvisioning Started with name \"%s\" and PoP \"%s\" on BLE\n", service_name, pop);
-        printQR(service_name, pop, "ble");
-#else
+#if CONFIG_IDF_TARGET_ESP32S2
         Serial.printf("\nProvisioning Started with name \"%s\" and PoP \"%s\" on SoftAP\n", service_name, pop);
         printQR(service_name, pop, "softap");
+#else
+        Serial.printf("\nProvisioning Started with name \"%s\" and PoP \"%s\" on BLE\n", service_name, pop);
+        printQR(service_name, pop, "ble");
 #endif        
         break;
     }
@@ -89,10 +94,10 @@ void setup()
     RMaker.start();
 
     WiFi.onEvent(sysProvEvent);
-#if CONFIG_IDF_TARGET_ESP32
-    WiFiProv.beginProvision(WIFI_PROV_SCHEME_BLE, WIFI_PROV_SCHEME_HANDLER_FREE_BTDM, WIFI_PROV_SECURITY_1, pop, service_name);
-#else
+#if CONFIG_IDF_TARGET_ESP32S2
     WiFiProv.beginProvision(WIFI_PROV_SCHEME_SOFTAP, WIFI_PROV_SCHEME_HANDLER_NONE, WIFI_PROV_SECURITY_1, pop, service_name);
+#else
+    WiFiProv.beginProvision(WIFI_PROV_SCHEME_BLE, WIFI_PROV_SCHEME_HANDLER_FREE_BTDM, WIFI_PROV_SECURITY_1, pop, service_name);
 #endif
 }
 
diff --git a/libraries/RainMaker/examples/RMakerSwitch/RMakerSwitch.ino b/libraries/RainMaker/examples/RMakerSwitch/RMakerSwitch.ino
index e486bd200fb..11f11a586bd 100644
--- a/libraries/RainMaker/examples/RMakerSwitch/RMakerSwitch.ino
+++ b/libraries/RainMaker/examples/RMakerSwitch/RMakerSwitch.ino
@@ -8,9 +8,15 @@ const char *service_name = "PROV_1234";
 const char *pop = "abcd1234";
 
 //GPIO for push button
-static int gpio_0 = 0;
+#if CONFIG_IDF_TARGET_ESP32C3
+static int gpio_0 = 9;
+static int gpio_switch = 7;
+#else
 //GPIO for virtual device
+static int gpio_0 = 0;
 static int gpio_switch = 16;
+#endif
+
 /* Variable for reading pin status*/
 bool switch_state = true;
 
@@ -21,13 +27,13 @@ void sysProvEvent(arduino_event_t *sys_event)
 {
     switch (sys_event->event_id) {      
         case ARDUINO_EVENT_PROV_START:
-#if CONFIG_IDF_TARGET_ESP32
-        Serial.printf("\nProvisioning Started with name \"%s\" and PoP \"%s\" on BLE\n", service_name, pop);
-        printQR(service_name, pop, "ble");
-#else
+#if CONFIG_IDF_TARGET_ESP32S2
         Serial.printf("\nProvisioning Started with name \"%s\" and PoP \"%s\" on SoftAP\n", service_name, pop);
         printQR(service_name, pop, "softap");
-#endif        
+#else
+        Serial.printf("\nProvisioning Started with name \"%s\" and PoP \"%s\" on BLE\n", service_name, pop);
+        printQR(service_name, pop, "ble");
+#endif         
         break;
     }
 }
@@ -74,10 +80,10 @@ void setup()
     RMaker.start();
 
     WiFi.onEvent(sysProvEvent);
-#if CONFIG_IDF_TARGET_ESP32
-    WiFiProv.beginProvision(WIFI_PROV_SCHEME_BLE, WIFI_PROV_SCHEME_HANDLER_FREE_BTDM, WIFI_PROV_SECURITY_1, pop, service_name);
-#else
+#if CONFIG_IDF_TARGET_ESP32S2
     WiFiProv.beginProvision(WIFI_PROV_SCHEME_SOFTAP, WIFI_PROV_SCHEME_HANDLER_NONE, WIFI_PROV_SECURITY_1, pop, service_name);
+#else
+    WiFiProv.beginProvision(WIFI_PROV_SCHEME_BLE, WIFI_PROV_SCHEME_HANDLER_FREE_BTDM, WIFI_PROV_SECURITY_1, pop, service_name);
 #endif
 }
 
diff --git a/libraries/RainMaker/src/RMaker.cpp b/libraries/RainMaker/src/RMaker.cpp
index de6903c0538..2fda954c1ea 100644
--- a/libraries/RainMaker/src/RMaker.cpp
+++ b/libraries/RainMaker/src/RMaker.cpp
@@ -1,11 +1,12 @@
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "RMaker.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
 #include <esp_rmaker_schedule.h>
 #include <esp_rmaker_utils.h>
 bool wifiLowLevelInit(bool persistent);
 static esp_err_t err;
 
-static void event_handler(void *arg, esp_event_base_t event_base, int event_id, void *event_data)
+static void event_handler(void *arg, esp_event_base_t event_base, int32_t event_id, void *event_data)
 {
     if (event_base == RMAKER_EVENT) {
         switch (event_id) {
diff --git a/libraries/RainMaker/src/RMaker.h b/libraries/RainMaker/src/RMaker.h
index 53c60bce189..dbfbe5c49f5 100644
--- a/libraries/RainMaker/src/RMaker.h
+++ b/libraries/RainMaker/src/RMaker.h
@@ -1,6 +1,20 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "esp_system.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
-
 #include "Arduino.h"
 #include "RMakerNode.h"
 #include "RMakerQR.h"
@@ -26,5 +40,4 @@ class RMakerClass
 };
 
 extern RMakerClass RMaker;
-
-#endif
+#endif
\ No newline at end of file
diff --git a/libraries/RainMaker/src/RMakerDevice.cpp b/libraries/RainMaker/src/RMakerDevice.cpp
index e0108c32963..dd1a3ba4ea4 100644
--- a/libraries/RainMaker/src/RMakerDevice.cpp
+++ b/libraries/RainMaker/src/RMakerDevice.cpp
@@ -1,5 +1,6 @@
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "RMakerDevice.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
 
 static esp_err_t err;
 typedef void (*deviceWriteCb)(Device*, Param*, const param_val_t val, void *priv_data, write_ctx_t *ctx);
@@ -205,5 +206,4 @@ esp_err_t Device::updateAndReportParam(const char *param_name, const char *my_va
     }
     return ESP_OK;
 }
-
 #endif
diff --git a/libraries/RainMaker/src/RMakerDevice.h b/libraries/RainMaker/src/RMakerDevice.h
index 13cb67ac302..f813359a25a 100644
--- a/libraries/RainMaker/src/RMakerDevice.h
+++ b/libraries/RainMaker/src/RMakerDevice.h
@@ -1,6 +1,20 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "esp_system.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
-
 #include "RMakerParam.h"
 #include <esp_rmaker_standard_devices.h>
 #include <esp_rmaker_standard_params.h>
@@ -150,5 +164,4 @@ class TemperatureSensor : public Device
             }
         }
 };
-
 #endif
\ No newline at end of file
diff --git a/libraries/RainMaker/src/RMakerNode.cpp b/libraries/RainMaker/src/RMakerNode.cpp
index 3f2555f8b05..5cae9e8dea9 100644
--- a/libraries/RainMaker/src/RMakerNode.cpp
+++ b/libraries/RainMaker/src/RMakerNode.cpp
@@ -1,5 +1,6 @@
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "RMakerNode.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
 static esp_err_t err;
 
 esp_err_t Node::addDevice(Device device)
@@ -38,4 +39,4 @@ esp_err_t Node::addNodeAttr(const char *attr_name, const char *val)
     }   
     return err;
 }
-#endif
+#endif
\ No newline at end of file
diff --git a/libraries/RainMaker/src/RMakerNode.h b/libraries/RainMaker/src/RMakerNode.h
index 733ca407f96..d169870f591 100644
--- a/libraries/RainMaker/src/RMakerNode.h
+++ b/libraries/RainMaker/src/RMakerNode.h
@@ -1,6 +1,20 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "esp_system.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
-
 #include "RMakerDevice.h"
 
 class Node
@@ -29,5 +43,4 @@ class Node
         node_info_t *getNodeInfo();
         esp_err_t addNodeAttr(const char *attr_name, const char *val);
 };
-
 #endif
\ No newline at end of file
diff --git a/libraries/RainMaker/src/RMakerParam.cpp b/libraries/RainMaker/src/RMakerParam.cpp
index e1de774017f..50a994c7590 100644
--- a/libraries/RainMaker/src/RMakerParam.cpp
+++ b/libraries/RainMaker/src/RMakerParam.cpp
@@ -1,5 +1,6 @@
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "RMakerParam.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
 
 static esp_err_t err;
 
@@ -29,5 +30,4 @@ esp_err_t Param::updateAndReport(param_val_t val)
     }
     return err;
 }
-
-#endif
\ No newline at end of file
+#endif
diff --git a/libraries/RainMaker/src/RMakerParam.h b/libraries/RainMaker/src/RMakerParam.h
index 0bd9aedb116..d1b4ea6d9d6 100644
--- a/libraries/RainMaker/src/RMakerParam.h
+++ b/libraries/RainMaker/src/RMakerParam.h
@@ -1,6 +1,20 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "esp_system.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
-
 #include "RMakerType.h"
 
 class Param
@@ -34,5 +48,4 @@ class Param
         esp_err_t addBounds(param_val_t min, param_val_t max, param_val_t step);
         esp_err_t updateAndReport(param_val_t val);
 };
-
 #endif
\ No newline at end of file
diff --git a/libraries/RainMaker/src/RMakerQR.h b/libraries/RainMaker/src/RMakerQR.h
index fd5053d0dde..7b666557fcd 100644
--- a/libraries/RainMaker/src/RMakerQR.h
+++ b/libraries/RainMaker/src/RMakerQR.h
@@ -1,6 +1,20 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "esp_system.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
-
 #include <qrcode.h>
 
 #define PROV_QR_VERSION "v1"
@@ -20,5 +34,4 @@ static void printQR(const char *name, const char *pop, const char *transport)
     qrcode_display(payload);
     Serial.printf("If QR code is not visible, copy paste the below URL in a browser.\n%s?data=%s\n", QRCODE_BASE_URL, payload);
 }
-
-#endif
+#endif
\ No newline at end of file
diff --git a/libraries/RainMaker/src/RMakerType.cpp b/libraries/RainMaker/src/RMakerType.cpp
index a4f6f2f381f..d94337cec4c 100644
--- a/libraries/RainMaker/src/RMakerType.cpp
+++ b/libraries/RainMaker/src/RMakerType.cpp
@@ -1,5 +1,6 @@
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "RMakerType.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
 
 param_val_t value(int ival)
 {
@@ -20,5 +21,4 @@ param_val_t value(float fval)
 {
     return esp_rmaker_float(fval);
 }
-
 #endif
\ No newline at end of file
diff --git a/libraries/RainMaker/src/RMakerType.h b/libraries/RainMaker/src/RMakerType.h
index 09029f9e8a0..003bd32a523 100644
--- a/libraries/RainMaker/src/RMakerType.h
+++ b/libraries/RainMaker/src/RMakerType.h
@@ -1,6 +1,20 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "esp_system.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
-
 #include <esp_rmaker_core.h>
 #include <esp_rmaker_ota.h>
 #include <esp_err.h>
@@ -19,5 +33,4 @@ param_val_t value(int);
 param_val_t value(bool);
 param_val_t value(char *);
 param_val_t value(float);
-
 #endif
\ No newline at end of file
diff --git a/libraries/RainMaker/src/RMakerUtils.h b/libraries/RainMaker/src/RMakerUtils.h
index 41745d2e027..710b0e9a8a4 100644
--- a/libraries/RainMaker/src/RMakerUtils.h
+++ b/libraries/RainMaker/src/RMakerUtils.h
@@ -1,16 +1,29 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK
 #include "esp_system.h"
-#if ESP_IDF_VERSION_MAJOR >= 4 && CONFIG_ESP_RMAKER_TASK_STACK && CONFIG_IDF_TARGET_ESP32
-
 #include <esp_rmaker_utils.h>
 
 static void RMakerFactoryReset(int seconds)
 {
-    esp_rmaker_factory_reset(seconds);
+    esp_rmaker_factory_reset(0, seconds);
 }
 
 static void RMakerWiFiReset(int seconds)
 {
-    esp_rmaker_wifi_reset(seconds);
+    esp_rmaker_wifi_reset(0, seconds);
 }
-
-#endif
+#endif
\ No newline at end of file
diff --git a/libraries/SD/examples/SD_time/SD_time.ino b/libraries/SD/examples/SD_time/SD_time.ino
index ff35d673448..cef80dd600c 100644
--- a/libraries/SD/examples/SD_time/SD_time.ino
+++ b/libraries/SD/examples/SD_time/SD_time.ino
@@ -164,10 +164,6 @@ void setup(){
     Serial.println("IP address: ");
     Serial.println(WiFi.localIP());
     Serial.println("Contacting Time Server");
-    /*
-        Note: Bundled Arduino lwip supports only ONE ntp server, 2nd and 3rd options are silently ignored
-        see CONFIG_LWIP_DHCP_MAX_NTP_SERVERS define in ./tools/sdk/esp32/sdkconfig
-     */
 	configTime(3600*timezone, daysavetime*3600, "time.nist.gov", "0.pool.ntp.org", "1.pool.ntp.org");
 	struct tm tmstruct ;
     delay(2000);
diff --git a/libraries/SD/src/SD.cpp b/libraries/SD/src/SD.cpp
index 8e2b6d234e5..b1731f155ba 100644
--- a/libraries/SD/src/SD.cpp
+++ b/libraries/SD/src/SD.cpp
@@ -75,6 +75,22 @@ uint64_t SDFS::cardSize()
     return (uint64_t)sectors * sectorSize;
 }
 
+size_t SDFS::numSectors()
+{
+    if(_pdrv == 0xFF) {
+        return 0;
+    }
+    return sdcard_num_sectors(_pdrv);
+}
+
+size_t SDFS::sectorSize()
+{
+    if(_pdrv == 0xFF) {
+        return 0;
+    }
+    return sdcard_sector_size(_pdrv);
+}
+
 uint64_t SDFS::totalBytes()
 {
 	FATFS* fsinfo;
diff --git a/libraries/SD/src/SD.h b/libraries/SD/src/SD.h
index 665b33370e4..a5548579bd7 100644
--- a/libraries/SD/src/SD.h
+++ b/libraries/SD/src/SD.h
@@ -32,6 +32,8 @@ class SDFS : public FS
     void end();
     sdcard_type_t cardType();
     uint64_t cardSize();
+    size_t numSectors();
+    size_t sectorSize();
     uint64_t totalBytes();
     uint64_t usedBytes();
     bool readRAW(uint8_t* buffer, uint32_t sector);
diff --git a/libraries/SD/src/sd_diskio.cpp b/libraries/SD/src/sd_diskio.cpp
index e69050a74f1..038c26ade36 100644
--- a/libraries/SD/src/sd_diskio.cpp
+++ b/libraries/SD/src/sd_diskio.cpp
@@ -121,7 +121,7 @@ bool sdSelectCard(uint8_t pdrv)
 {
     ardu_sdcard_t * card = s_cards[pdrv];
     digitalWrite(card->ssPin, LOW);
-    bool s = sdWait(pdrv, 300);
+    bool s = sdWait(pdrv, 500);
     if (!s) {
         log_e("Select Failed");
         digitalWrite(card->ssPin, HIGH);
@@ -506,10 +506,17 @@ DSTATUS ff_sd_initialize(uint8_t pdrv)
         card->spi->transfer(0XFF);
     }
 
-    if (sdTransaction(pdrv, GO_IDLE_STATE, 0, NULL) != 1) {
+    // Fix mount issue - sdWait fail ignored before command GO_IDLE_STATE
+    digitalWrite(card->ssPin, LOW);
+    if(!sdWait(pdrv, 500)){
+        log_w("sdWait fail ignored, card initialize continues");
+    }
+    if (sdCommand(pdrv, GO_IDLE_STATE, 0, NULL) != 1){
+        sdDeselectCard(pdrv);
         log_w("GO_IDLE_STATE failed");
         goto unknown_card;
     }
+    sdDeselectCard(pdrv);
 
     token = sdTransaction(pdrv, CRC_ON_OFF, 1, NULL);
     if (token == 0x5) {
@@ -609,7 +616,7 @@ DSTATUS ff_sd_initialize(uint8_t pdrv)
 
 DSTATUS ff_sd_status(uint8_t pdrv)
 {
-    if(sdCommand(pdrv, SEND_STATUS, 0, NULL) == 0xFF)
+    if(sdTransaction(pdrv, SEND_STATUS, 0, NULL))
     {
         log_e("Check status failed");
         return STA_NOINIT;
diff --git a/libraries/SD_MMC/examples/SDMMC_time/SDMMC_time.ino b/libraries/SD_MMC/examples/SDMMC_time/SDMMC_time.ino
index c15a1648a3c..4472f8c6c37 100644
--- a/libraries/SD_MMC/examples/SDMMC_time/SDMMC_time.ino
+++ b/libraries/SD_MMC/examples/SDMMC_time/SDMMC_time.ino
@@ -164,10 +164,6 @@ void setup(){
     Serial.println("IP address: ");
     Serial.println(WiFi.localIP());
     Serial.println("Contacting Time Server");
-    /*
-        Note: Bundled Arduino lwip supports only ONE ntp server, 2nd and 3rd options are silently ignored
-        see CONFIG_LWIP_DHCP_MAX_NTP_SERVERS define in ./tools/sdk/esp32/sdkconfig
-     */
 	configTime(3600*timezone, daysavetime*3600, "time.nist.gov", "0.pool.ntp.org", "1.pool.ntp.org");
 	struct tm tmstruct ;
     delay(2000);
diff --git a/libraries/SD_MMC/src/SD_MMC.cpp b/libraries/SD_MMC/src/SD_MMC.cpp
index ba06c261cf9..07fab237942 100644
--- a/libraries/SD_MMC/src/SD_MMC.cpp
+++ b/libraries/SD_MMC/src/SD_MMC.cpp
@@ -1,4 +1,4 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
 //
 // Licensed under the Apache License, Version 2.0 (the "License");
 // you may not use this file except in compliance with the License.
@@ -12,29 +12,77 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
+#include "pins_arduino.h"
 #include "SD_MMC.h"
-#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) //SDMMC does not work on ESP32S2
+#ifdef SOC_SDMMC_HOST_SUPPORTED
 #include "vfs_api.h"
 
-extern "C" {
-#include <sys/unistd.h>
-#include <sys/stat.h>
 #include <dirent.h>
 #include "esp_vfs_fat.h"
 #include "driver/sdmmc_host.h"
 #include "driver/sdmmc_defs.h"
 #include "sdmmc_cmd.h"
-}
+#include "soc/sdmmc_pins.h"
 #include "ff.h"
 
 using namespace fs;
-/*
 
-*/
 
 SDMMCFS::SDMMCFS(FSImplPtr impl)
-    : FS(impl), _card(NULL)
-{}
+    : FS(impl), _card(nullptr)
+{
+#if defined(SOC_SDMMC_USE_GPIO_MATRIX) && defined(BOARD_HAS_SDMMC)
+    _pin_clk = SDMMC_CLK;
+    _pin_cmd = SDMMC_CMD;
+    _pin_d0 = SDMMC_D0;
+#ifndef BOARD_HAS_1BIT_SDMMC
+    _pin_d1 = SDMMC_D1;
+    _pin_d2 = SDMMC_D2;
+    _pin_d3 = SDMMC_D3;
+#endif // BOARD_HAS_1BIT_SDMMC
+#endif // defined(SOC_SDMMC_USE_GPIO_MATRIX) && defined(BOARD_HAS_SDMMC)
+}
+
+bool SDMMCFS::setPins(int clk, int cmd, int d0)
+{
+    return setPins(clk, cmd, d0, GPIO_NUM_NC, GPIO_NUM_NC, GPIO_NUM_NC);
+}
+
+bool SDMMCFS::setPins(int clk, int cmd, int d0, int d1, int d2, int d3)
+{
+    if (_card != nullptr) {
+        log_e("SD_MMC.setPins must be called before SD_MMC.begin");
+        return false;
+    }
+#ifdef SOC_SDMMC_USE_GPIO_MATRIX
+    // SoC supports SDMMC pin configuration via GPIO matrix. Save the pins for later use in SDMMCFS::begin.
+    _pin_clk = (int8_t) clk;
+    _pin_cmd = (int8_t) cmd;
+    _pin_d0 = (int8_t) d0;
+    _pin_d1 = (int8_t) d1;
+    _pin_d2 = (int8_t) d2;
+    _pin_d3 = (int8_t) d3;
+    return true;
+#elif CONFIG_IDF_TARGET_ESP32
+    // ESP32 doesn't support SDMMC pin configuration via GPIO matrix.
+    // Since SDMMCFS::begin hardcodes the usage of slot 1, only check if
+    // the pins match slot 1 pins.
+    bool pins_ok = (clk == (int)SDMMC_SLOT1_IOMUX_PIN_NUM_CLK) &&
+        (cmd == (int)SDMMC_SLOT1_IOMUX_PIN_NUM_CMD) &&
+        (d0 == (int)SDMMC_SLOT1_IOMUX_PIN_NUM_D0) &&
+        (((d1 == -1) && (d2 == -1) && (d3 == -1)) ||
+         ((d1 == (int)SDMMC_SLOT1_IOMUX_PIN_NUM_D1) &&
+         (d1 == (int)SDMMC_SLOT1_IOMUX_PIN_NUM_D2) &&
+         (d1 == (int)SDMMC_SLOT1_IOMUX_PIN_NUM_D3)));
+    if (!pins_ok) {
+        log_e("SDMMCFS: specified pins are not supported by this chip.");
+        return false;
+    }
+    return true;
+#else
+#error SoC not supported
+#endif
+}
 
 bool SDMMCFS::begin(const char * mountpoint, bool mode1bit, bool format_if_mount_failed, int sdmmc_frequency)
 {
@@ -43,27 +91,33 @@ bool SDMMCFS::begin(const char * mountpoint, bool mode1bit, bool format_if_mount
     }
     //mount
     sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
-    sdmmc_host_t host;
+#ifdef SOC_SDMMC_USE_GPIO_MATRIX
+    // SoC supports SDMMC pin configuration via GPIO matrix.
+    // Chech that the pins have been set either in the constructor or setPins function.
+    if (_pin_cmd == -1 || _pin_clk == -1 || _pin_d0 == -1
+        || (!mode1bit && (_pin_d1 == -1 || _pin_d2 == -1 || _pin_d3 == -1))) {
+        log_e("SDMMCFS: some SD pins are not set");
+        return false;
+    }
+
+    slot_config.clk = (gpio_num_t) _pin_clk;
+    slot_config.cmd = (gpio_num_t) _pin_cmd;
+    slot_config.d0 = (gpio_num_t) _pin_d0;
+    slot_config.d1 = (gpio_num_t) _pin_d1;
+    slot_config.d2 = (gpio_num_t) _pin_d2;
+    slot_config.d3 = (gpio_num_t) _pin_d3;
+    slot_config.width = 4;
+#endif // SOC_SDMMC_USE_GPIO_MATRIX
+    sdmmc_host_t host = SDMMC_HOST_DEFAULT();
     host.flags = SDMMC_HOST_FLAG_4BIT;
     host.slot = SDMMC_HOST_SLOT_1;
     host.max_freq_khz = sdmmc_frequency;
-    host.io_voltage = 3.3f;
-    host.init = &sdmmc_host_init;
-    host.set_bus_width = &sdmmc_host_set_bus_width;
-    host.get_bus_width = &sdmmc_host_get_slot_width;
-    host.set_bus_ddr_mode = &sdmmc_host_set_bus_ddr_mode;
-    host.set_card_clk = &sdmmc_host_set_card_clk;
-    host.do_transaction = &sdmmc_host_do_transaction;
-    host.deinit = &sdmmc_host_deinit;
-    host.io_int_enable = &sdmmc_host_io_int_enable;
-    host.io_int_wait = &sdmmc_host_io_int_wait;
-    host.command_timeout_ms = 0;
 #ifdef BOARD_HAS_1BIT_SDMMC
     mode1bit = true;
 #endif
     if(mode1bit) {
         host.flags = SDMMC_HOST_FLAG_1BIT; //use 1-line SD mode
-	slot_config.width = 1;
+        slot_config.width = 1;
     }
 
     esp_vfs_fat_sdmmc_mount_config_t mount_config = {
@@ -81,7 +135,7 @@ bool SDMMCFS::begin(const char * mountpoint, bool mode1bit, bool format_if_mount
             log_w("SD Already mounted");
             return true;
         } else {
-            log_e("Failed to initialize the card (%d). Make sure SD card lines have pull-up resistors in place.", ret);
+            log_e("Failed to initialize the card (0x%x). Make sure SD card lines have pull-up resistors in place.", ret);
         }
         _card = NULL;
         return false;
@@ -144,4 +198,4 @@ uint64_t SDMMCFS::usedBytes()
 }
 
 SDMMCFS SD_MMC = SDMMCFS(FSImplPtr(new VFSImpl()));
-#endif /* CONFIG_IDF_TARGET_ESP32 */
+#endif /* SOC_SDMMC_HOST_SUPPORTED */
diff --git a/libraries/SD_MMC/src/SD_MMC.h b/libraries/SD_MMC/src/SD_MMC.h
index e8540b32fc4..8386b23c030 100644
--- a/libraries/SD_MMC/src/SD_MMC.h
+++ b/libraries/SD_MMC/src/SD_MMC.h
@@ -15,7 +15,8 @@
 #define _SDMMC_H_
 
 #include "sdkconfig.h"
-#ifndef CONFIG_IDF_TARGET_ESP32S2
+#include "soc/soc_caps.h"
+#ifdef SOC_SDMMC_HOST_SUPPORTED
 
 #include "FS.h"
 #include "driver/sdmmc_types.h"
@@ -36,8 +37,19 @@ class SDMMCFS : public FS
 protected:
     sdmmc_card_t* _card;
 
+#ifdef SOC_SDMMC_USE_GPIO_MATRIX
+    int8_t _pin_clk = -1;
+    int8_t _pin_cmd = -1;
+    int8_t _pin_d0 = -1;
+    int8_t _pin_d1 = -1;
+    int8_t _pin_d2 = -1;
+    int8_t _pin_d3 = -1;
+#endif
+
 public:
     SDMMCFS(FSImplPtr impl);
+    bool setPins(int clk, int cmd, int d0);
+    bool setPins(int clk, int cmd, int d0, int d1, int d2, int d3);
     bool begin(const char * mountpoint="/sdcard", bool mode1bit=false, bool format_if_mount_failed=false, int sdmmc_frequency=BOARD_MAX_SDMMC_FREQ);
     void end();
     sdcard_type_t cardType();
@@ -50,5 +62,5 @@ class SDMMCFS : public FS
 
 extern fs::SDMMCFS SD_MMC;
 
-#endif /* CONFIG_IDF_TARGET_ESP32S2 */
+#endif /* SOC_SDMMC_HOST_SUPPORTED */
 #endif /* _SDMMC_H_ */
diff --git a/libraries/SPI/examples/SPI_Multiple_Buses/SPI_Multiple_Buses.ino b/libraries/SPI/examples/SPI_Multiple_Buses/SPI_Multiple_Buses.ino
index dcd6f7ed648..b0991d5fe3f 100644
--- a/libraries/SPI/examples/SPI_Multiple_Buses/SPI_Multiple_Buses.ino
+++ b/libraries/SPI/examples/SPI_Multiple_Buses/SPI_Multiple_Buses.ino
@@ -39,7 +39,7 @@
   #define HSPI_SS     15
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32S2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
 #define VSPI FSPI
 #endif
 
diff --git a/libraries/SPI/src/SPI.cpp b/libraries/SPI/src/SPI.cpp
index 5e938f02f7c..90d54a4bb60 100644
--- a/libraries/SPI/src/SPI.cpp
+++ b/libraries/SPI/src/SPI.cpp
@@ -50,7 +50,7 @@ void SPIClass::begin(int8_t sck, int8_t miso, int8_t mosi, int8_t ss)
     }
 
     if(sck == -1 && miso == -1 && mosi == -1 && ss == -1) {
-#if CONFIG_IDF_TARGET_ESP32S2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
         _sck = (_spi_num == FSPI) ? SCK : -1;
         _miso = (_spi_num == FSPI) ? MISO : -1;
         _mosi = (_spi_num == FSPI) ? MOSI : -1;
diff --git a/libraries/SPIFFS/examples/SPIFFS_time/SPIFFS_time.ino b/libraries/SPIFFS/examples/SPIFFS_time/SPIFFS_time.ino
index 60cd6484dfd..a86759693a9 100644
--- a/libraries/SPIFFS/examples/SPIFFS_time/SPIFFS_time.ino
+++ b/libraries/SPIFFS/examples/SPIFFS_time/SPIFFS_time.ino
@@ -148,10 +148,6 @@ void setup(){
     Serial.println("IP address: ");
     Serial.println(WiFi.localIP());
     Serial.println("Contacting Time Server");
-    /*
-        Note: Bundled Arduino lwip supports only ONE ntp server, 2nd and 3rd options are silently ignored
-        see CONFIG_LWIP_DHCP_MAX_NTP_SERVERS define in ./tools/sdk/esp32/sdkconfig
-     */
 	configTime(3600*timezone, daysavetime*3600, "time.nist.gov", "0.pool.ntp.org", "1.pool.ntp.org");
 	struct tm tmstruct ;
     delay(2000);
diff --git a/libraries/Ticker/src/Ticker.cpp b/libraries/Ticker/src/Ticker.cpp
index 1deeb7fb69f..629361b2dd0 100644
--- a/libraries/Ticker/src/Ticker.cpp
+++ b/libraries/Ticker/src/Ticker.cpp
@@ -56,3 +56,8 @@ void Ticker::detach() {
     _timer = nullptr;
   }
 }
+
+bool Ticker::active() {
+  if (!_timer) return false;
+  return esp_timer_is_active(_timer);
+}
diff --git a/libraries/USB/examples/CompositeDevice/CompositeDevice.ino b/libraries/USB/examples/CompositeDevice/CompositeDevice.ino
index af811420590..4c1021bc57b 100644
--- a/libraries/USB/examples/CompositeDevice/CompositeDevice.ino
+++ b/libraries/USB/examples/CompositeDevice/CompositeDevice.ino
@@ -1,3 +1,8 @@
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 #include "USB.h"
 #include "USBHIDMouse.h"
 #include "USBHIDKeyboard.h"
@@ -73,7 +78,10 @@ static void usbEventCallback(void* arg, esp_event_base_t event_base, int32_t eve
         }
         HWSerial.println();
         break;
-      
+      case ARDUINO_USB_CDC_RX_OVERFLOW_EVENT:
+        HWSerial.printf("CDC RX Overflow of %d bytes", data->rx_overflow.dropped_bytes);
+        break;
+
       default:
         break;
     }
@@ -211,3 +219,4 @@ void loop() {
     }
   }
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/ConsumerControl/ConsumerControl.ino b/libraries/USB/examples/ConsumerControl/ConsumerControl.ino
index ab6fb19d9ca..d2747f8a428 100644
--- a/libraries/USB/examples/ConsumerControl/ConsumerControl.ino
+++ b/libraries/USB/examples/ConsumerControl/ConsumerControl.ino
@@ -1,3 +1,8 @@
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 #include "USB.h"
 #include "USBHIDConsumerControl.h"
 USBHIDConsumerControl ConsumerControl;
@@ -19,3 +24,4 @@ void loop() {
   }
   previousButtonState = buttonState;
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/CustomHIDDevice/CustomHIDDevice.ino b/libraries/USB/examples/CustomHIDDevice/CustomHIDDevice.ino
index 15d69b6a63b..3644b167fed 100644
--- a/libraries/USB/examples/CustomHIDDevice/CustomHIDDevice.ino
+++ b/libraries/USB/examples/CustomHIDDevice/CustomHIDDevice.ino
@@ -1,3 +1,8 @@
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 #include "USB.h"
 #include "USBHID.h"
 USBHID HID;
@@ -50,6 +55,7 @@ public:
 };
 
 CustomHIDDevice Device;
+#endif /* ARDUINO_USB_MODE */
 
 const int buttonPin = 0;
 int previousButtonState = HIGH;
diff --git a/libraries/USB/examples/FirmwareMSC/FirmwareMSC.ino b/libraries/USB/examples/FirmwareMSC/FirmwareMSC.ino
index afcd2783b40..4b82cad5f66 100644
--- a/libraries/USB/examples/FirmwareMSC/FirmwareMSC.ino
+++ b/libraries/USB/examples/FirmwareMSC/FirmwareMSC.ino
@@ -1,3 +1,8 @@
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 #include "USB.h"
 #include "FirmwareMSC.h"
 
@@ -72,3 +77,4 @@ void setup() {
 void loop() {
   // put your main code here, to run repeatedly
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/Gamepad/Gamepad.ino b/libraries/USB/examples/Gamepad/Gamepad.ino
index da9ff69e9dd..dad75723797 100644
--- a/libraries/USB/examples/Gamepad/Gamepad.ino
+++ b/libraries/USB/examples/Gamepad/Gamepad.ino
@@ -1,3 +1,8 @@
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 #include "USB.h"
 #include "USBHIDGamepad.h"
 USBHIDGamepad Gamepad;
@@ -19,3 +24,4 @@ void loop() {
   }
   previousButtonState = buttonState;
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/HIDVendor/HIDVendor.ino b/libraries/USB/examples/HIDVendor/HIDVendor.ino
index 223edba1d90..01b91596026 100644
--- a/libraries/USB/examples/HIDVendor/HIDVendor.ino
+++ b/libraries/USB/examples/HIDVendor/HIDVendor.ino
@@ -1,3 +1,8 @@
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 #include "USB.h"
 #include "USBHIDVendor.h"
 USBHIDVendor Vendor;
@@ -50,3 +55,4 @@ void loop() {
     Serial.write(Vendor.read());
   }
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/Keyboard/KeyboardLogout/KeyboardLogout.ino b/libraries/USB/examples/Keyboard/KeyboardLogout/KeyboardLogout.ino
index a7f8214b78a..b4b21180031 100644
--- a/libraries/USB/examples/Keyboard/KeyboardLogout/KeyboardLogout.ino
+++ b/libraries/USB/examples/Keyboard/KeyboardLogout/KeyboardLogout.ino
@@ -24,6 +24,11 @@
 
   http://www.arduino.cc/en/Tutorial/KeyboardLogout
 */
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 
 #define OSX 0
 #define WINDOWS 1
@@ -90,3 +95,4 @@ void loop() {
   // do nothing:
   while (true) delay(1000);
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/Keyboard/KeyboardMessage/KeyboardMessage.ino b/libraries/USB/examples/Keyboard/KeyboardMessage/KeyboardMessage.ino
index 30f92a47821..d87a3384613 100644
--- a/libraries/USB/examples/Keyboard/KeyboardMessage/KeyboardMessage.ino
+++ b/libraries/USB/examples/Keyboard/KeyboardMessage/KeyboardMessage.ino
@@ -19,6 +19,11 @@
 
   http://www.arduino.cc/en/Tutorial/KeyboardMessage
 */
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 
 #include "USB.h"
 #include "USBHIDKeyboard.h"
@@ -53,3 +58,4 @@ void loop() {
   // save the current button state for comparison next time:
   previousButtonState = buttonState;
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/Keyboard/KeyboardReprogram/KeyboardReprogram.ino b/libraries/USB/examples/Keyboard/KeyboardReprogram/KeyboardReprogram.ino
index 3c6520556fe..e1a28add531 100644
--- a/libraries/USB/examples/Keyboard/KeyboardReprogram/KeyboardReprogram.ino
+++ b/libraries/USB/examples/Keyboard/KeyboardReprogram/KeyboardReprogram.ino
@@ -24,6 +24,11 @@
 
   http://www.arduino.cc/en/Tutorial/KeyboardReprogram
 */
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 
 #include "USB.h"
 #include "USBHIDKeyboard.h"
@@ -104,3 +109,4 @@ void loop() {
   // wait for the sweet oblivion of reprogramming:
   while (true)delay(1000);
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/Keyboard/KeyboardSerial/KeyboardSerial.ino b/libraries/USB/examples/Keyboard/KeyboardSerial/KeyboardSerial.ino
index e3bb8769737..2517634b1e8 100644
--- a/libraries/USB/examples/Keyboard/KeyboardSerial/KeyboardSerial.ino
+++ b/libraries/USB/examples/Keyboard/KeyboardSerial/KeyboardSerial.ino
@@ -16,6 +16,11 @@
 
   http://www.arduino.cc/en/Tutorial/KeyboardSerial
 */
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 
 #include "USB.h"
 #include "USBHIDKeyboard.h"
@@ -38,3 +43,4 @@ void loop() {
     Keyboard.write(inChar + 1);
   }
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/KeyboardAndMouseControl/KeyboardAndMouseControl.ino b/libraries/USB/examples/KeyboardAndMouseControl/KeyboardAndMouseControl.ino
index 6cf564bbc9f..b836e4f6bfe 100644
--- a/libraries/USB/examples/KeyboardAndMouseControl/KeyboardAndMouseControl.ino
+++ b/libraries/USB/examples/KeyboardAndMouseControl/KeyboardAndMouseControl.ino
@@ -18,6 +18,11 @@
 
   http://www.arduino.cc/en/Tutorial/KeyboardAndMouseControl
 */
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 
 #include "USB.h"
 #include "USBHIDMouse.h"
@@ -93,3 +98,4 @@ void loop() {
   }
   delay(5);
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/Mouse/ButtonMouseControl/ButtonMouseControl.ino b/libraries/USB/examples/Mouse/ButtonMouseControl/ButtonMouseControl.ino
index 0a7ee0caa34..02ccb8885db 100644
--- a/libraries/USB/examples/Mouse/ButtonMouseControl/ButtonMouseControl.ino
+++ b/libraries/USB/examples/Mouse/ButtonMouseControl/ButtonMouseControl.ino
@@ -20,6 +20,11 @@
 
   http://www.arduino.cc/en/Tutorial/ButtonMouseControl
 */
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 
 #include "USB.h"
 #include "USBHIDMouse.h"
@@ -84,3 +89,4 @@ void loop() {
   // a delay so the mouse doesn't move too fast:
   delay(responseDelay);
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/SystemControl/SystemControl.ino b/libraries/USB/examples/SystemControl/SystemControl.ino
index 7d644ea9164..2e91a28b353 100644
--- a/libraries/USB/examples/SystemControl/SystemControl.ino
+++ b/libraries/USB/examples/SystemControl/SystemControl.ino
@@ -1,3 +1,8 @@
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 #include "USB.h"
 #include "USBHIDSystemControl.h"
 USBHIDSystemControl SystemControl;
@@ -19,3 +24,4 @@ void loop() {
   }
   previousButtonState = buttonState;
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/USBMSC/USBMSC.ino b/libraries/USB/examples/USBMSC/USBMSC.ino
index 0249c3ce14e..67378109985 100644
--- a/libraries/USB/examples/USBMSC/USBMSC.ino
+++ b/libraries/USB/examples/USBMSC/USBMSC.ino
@@ -1,3 +1,8 @@
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 #include "USB.h"
 #include "USBMSC.h"
 
@@ -190,3 +195,4 @@ void setup() {
 void loop() {
   // put your main code here, to run repeatedly:
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/USBSerial/USBSerial.ino b/libraries/USB/examples/USBSerial/USBSerial.ino
index bb23418f507..0f57e2b1b1d 100644
--- a/libraries/USB/examples/USBSerial/USBSerial.ino
+++ b/libraries/USB/examples/USBSerial/USBSerial.ino
@@ -1,3 +1,8 @@
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 #include "USB.h"
 
 #if ARDUINO_USB_CDC_ON_BOOT
@@ -52,7 +57,10 @@ static void usbEventCallback(void* arg, esp_event_base_t event_base, int32_t eve
         }
         HWSerial.println();
         break;
-      
+       case ARDUINO_USB_CDC_RX_OVERFLOW_EVENT:
+        HWSerial.printf("CDC RX Overflow of %d bytes", data->rx_overflow.dropped_bytes);
+        break;
+     
       default:
         break;
     }
@@ -78,3 +86,4 @@ void loop() {
     USBSerial.write(b, l);
   }
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/examples/USBVendor/USBVendor.ino b/libraries/USB/examples/USBVendor/USBVendor.ino
index f8976a07e85..9dbb54fb6e2 100644
--- a/libraries/USB/examples/USBVendor/USBVendor.ino
+++ b/libraries/USB/examples/USBVendor/USBVendor.ino
@@ -1,3 +1,8 @@
+#if ARDUINO_USB_MODE
+#warning This sketch should be used when USB is in OTG mode
+void setup(){}
+void loop(){}
+#else
 #include "USB.h"
 #include "USBVendor.h"
 
@@ -189,3 +194,4 @@ void loop() {
     Vendor.write(b, l);
   }
 }
+#endif /* ARDUINO_USB_MODE */
diff --git a/libraries/USB/src/USBHIDKeyboard.h b/libraries/USB/src/USBHIDKeyboard.h
index 5f9fdfc4696..41b6db9d8fc 100644
--- a/libraries/USB/src/USBHIDKeyboard.h
+++ b/libraries/USB/src/USBHIDKeyboard.h
@@ -114,7 +114,6 @@ class USBHIDKeyboard: public USBHIDDevice, public Print
 private:
     USBHID hid;
     KeyReport _keyReport;
-    void sendReport(KeyReport* keys);
 public:
     USBHIDKeyboard(void);
     void begin(void);
@@ -124,6 +123,7 @@ class USBHIDKeyboard: public USBHIDDevice, public Print
     size_t press(uint8_t k);
     size_t release(uint8_t k);
     void releaseAll(void);
+    void sendReport(KeyReport* keys);
 
     //raw functions work with TinyUSB's HID_KEY_* macros
     size_t pressRaw(uint8_t k);
diff --git a/libraries/Update/src/HttpsOTAUpdate.h b/libraries/Update/src/HttpsOTAUpdate.h
index bc52a3055ce..c2030a96477 100644
--- a/libraries/Update/src/HttpsOTAUpdate.h
+++ b/libraries/Update/src/HttpsOTAUpdate.h
@@ -1,3 +1,5 @@
+#ifndef HTPSPOTUADATE_H
+#define HTPSPOTUADATE_H
 #include "esp_http_client.h"
 #define HttpEvent_t esp_http_client_event_t
 
@@ -19,3 +21,4 @@ class HttpsOTAUpdateClass {
 };
 
 extern HttpsOTAUpdateClass HttpsOTA;
+#endif
diff --git a/libraries/WebServer/examples/SDWebServer/SdRoot/edit/index.htm b/libraries/WebServer/examples/SDWebServer/SdRoot/edit/index.htm
index f535601e7d7..bca3dd05dd7 100644
--- a/libraries/WebServer/examples/SDWebServer/SdRoot/edit/index.htm
+++ b/libraries/WebServer/examples/SDWebServer/SdRoot/edit/index.htm
@@ -375,7 +375,7 @@
   
         function createTreeLeaf(path, name, size){
           var leaf = document.createElement("li");
-          leaf.id = (((path == "/")?"":path)+"/"+name).toLowerCase();
+          leaf.id = name.toLowerCase();
           var label = document.createElement("span");
           label.textContent = name.toLowerCase();
           leaf.appendChild(label);
@@ -398,7 +398,7 @@
           var leaf = document.createElement("li");
           var check = document.createElement("input");
           check.type = "checkbox";
-          check.id = (((path == "/")?"":path)+"/"+name).toLowerCase();
+          check.id = name.toLowerCase();
           if(typeof disabled !== "undefined" && disabled) check.disabled = "disabled";
           leaf.appendChild(check);
           var label = document.createElement("label");
diff --git a/libraries/WebServer/src/WebServer.h b/libraries/WebServer/src/WebServer.h
index c169da82229..0293a09f209 100644
--- a/libraries/WebServer/src/WebServer.h
+++ b/libraries/WebServer/src/WebServer.h
@@ -85,13 +85,13 @@ class WebServer
   void requestAuthentication(HTTPAuthMethod mode = BASIC_AUTH, const char* realm = NULL, const String& authFailMsg = String("") );
 
   typedef std::function<void(void)> THandlerFunction;
-  void on(const Uri &uri, THandlerFunction handler);
-  void on(const Uri &uri, HTTPMethod method, THandlerFunction fn);
-  void on(const Uri &uri, HTTPMethod method, THandlerFunction fn, THandlerFunction ufn);
+  void on(const Uri &uri, THandlerFunction fn);
+  void on(const Uri &uri, HTTPMethod method, THandlerFunction fn); 
+  void on(const Uri &uri, HTTPMethod method, THandlerFunction fn, THandlerFunction ufn); //ufn handles file uploads
   void addHandler(RequestHandler* handler);
   void serveStatic(const char* uri, fs::FS& fs, const char* path, const char* cache_header = NULL );
   void onNotFound(THandlerFunction fn);  //called when handler is not assigned
-  void onFileUpload(THandlerFunction fn); //handle file uploads
+  void onFileUpload(THandlerFunction ufn); //handle file uploads
 
   String uri() { return _currentUri; }
   HTTPMethod method() { return _currentMethod; }
diff --git a/libraries/WebServer/src/detail/RequestHandlersImpl.h b/libraries/WebServer/src/detail/RequestHandlersImpl.h
index 699015746b3..4a7c28e58ae 100644
--- a/libraries/WebServer/src/detail/RequestHandlersImpl.h
+++ b/libraries/WebServer/src/detail/RequestHandlersImpl.h
@@ -68,7 +68,8 @@ class StaticRequestHandler : public RequestHandler {
     , _path(path)
     , _cache_header(cache_header)
     {
-        _isFile = fs.exists(path);
+        File f = fs.open(path);
+        _isFile = (f && (! f.isDirectory()));
         log_v("StaticRequestHandler: path=%s uri=%s isFile=%d, cache_header=%s\r\n", path, uri, _isFile, cache_header ? cache_header : ""); // issue 5506 - cache_header can be nullptr
         _baseUriLength = _uri.length();
     }
diff --git a/libraries/WiFi/examples/WiFiClientEnterprise/WiFiClientEnterprise.ino b/libraries/WiFi/examples/WiFiClientEnterprise/WiFiClientEnterprise.ino
index d7a2d0ad3cf..caaa2139170 100644
--- a/libraries/WiFi/examples/WiFiClientEnterprise/WiFiClientEnterprise.ino
+++ b/libraries/WiFi/examples/WiFiClientEnterprise/WiFiClientEnterprise.ino
@@ -1,10 +1,22 @@
 #include <WiFi.h> //Wifi library
 #include "esp_wpa2.h" //wpa2 library for connections to Enterprise networks
 #define EAP_IDENTITY "login" //if connecting from another corporation, use identity@organisation.domain in Eduroam 
+#define EAP_USERNAME "login" //oftentimes just a repeat of the identity
 #define EAP_PASSWORD "password" //your Eduroam password
 const char* ssid = "eduroam"; // Eduroam SSID
 const char* host = "arduino.php5.sk"; //external server domain for HTTP connection after authentification
 int counter = 0;
+
+// NOTE: For some systems, various certification keys are required to connect to the wifi system.
+//       Usually you are provided these by the IT department of your organization when certs are required
+//       and you can't connect with just an identity and password.
+//       Most eduroam setups we have seen do not require this level of authentication, but you should contact
+//       your IT department to verify.
+//       You should uncomment these and populate with the contents of the files if this is required for your scenario (See Example 2 and Example 3 below).
+//const char *ca_pem = "insert your CA cert from your .pem file here";
+//const char *client_cert = "insert your client cert from your .crt file here";
+//const char *client_key = "insert your client key from your .key file here";
+
 void setup() {
   Serial.begin(115200);
   delay(10);
@@ -13,11 +25,17 @@ void setup() {
   Serial.println(ssid);
   WiFi.disconnect(true);  //disconnect form wifi to set new wifi connection
   WiFi.mode(WIFI_STA); //init wifi mode
-  esp_wifi_sta_wpa2_ent_set_identity((uint8_t *)EAP_IDENTITY, strlen(EAP_IDENTITY)); //provide identity
-  esp_wifi_sta_wpa2_ent_set_username((uint8_t *)EAP_IDENTITY, strlen(EAP_IDENTITY)); //provide username --> identity and username is same
-  esp_wifi_sta_wpa2_ent_set_password((uint8_t *)EAP_PASSWORD, strlen(EAP_PASSWORD)); //provide password
-  esp_wifi_sta_wpa2_ent_enable();
-  WiFi.begin(ssid); //connect to wifi
+  
+  // Example1 (most common): a cert-file-free eduroam with PEAP (or TTLS)
+  WiFi.begin(ssid, WPA2_AUTH_PEAP, EAP_IDENTITY, EAP_USERNAME, EAP_PASSWORD);
+
+  // Example 2: a cert-file WPA2 Enterprise with PEAP
+  //WiFi.begin(ssid, WPA2_AUTH_PEAP, EAP_IDENTITY, EAP_USERNAME, EAP_PASSWORD, ca_pem, client_cert, client_key);
+  
+  // Example 3: TLS with cert-files and no password
+  //WiFi.begin(ssid, WPA2_AUTH_TLS, EAP_IDENTITY, NULL, NULL, ca_pem, client_cert, client_key);
+  
+  
   while (WiFi.status() != WL_CONNECTED) {
     delay(500);
     Serial.print(".");
diff --git a/libraries/WiFi/examples/WiFiScanDualAntenna/README.md b/libraries/WiFi/examples/WiFiScanDualAntenna/README.md
new file mode 100644
index 00000000000..32131a2b6ac
--- /dev/null
+++ b/libraries/WiFi/examples/WiFiScanDualAntenna/README.md
@@ -0,0 +1,70 @@
+# WiFiScan Example
+
+This example demonstrates how to use the WiFi library to scan available WiFi networks and print the results.
+
+This example shows the basic functionality of the dual antenna capability.
+
+# Supported Targets
+
+This example is compatible with the ESP32-WROOM-DA.
+
+## How to Use Example
+
+* How to install the Arduino IDE: [Install Arduino IDE](https://github.com/espressif/arduino-esp32/tree/master/docs/arduino-ide).
+
+#### Using Arduino IDE
+
+* Before Compile/Verify, select the correct board: `Tools -> Board`.
+* Select the COM port: `Tools -> Port: xxx` where the `xxx` is the detected COM port.
+
+#### Using Platform IO
+
+* Select the COM port: `Devices` or set the `upload_port` option on the `platformio.ini` file.
+
+## Example/Log Output
+
+```
+ets Jul 29 2019 12:21:46
+
+rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
+configsip: 0, SPIWP:0xee
+clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
+mode:DIO, clock div:1
+load:0x3fff0030,len:1412
+load:0x40078000,len:13400
+load:0x40080400,len:3672
+entry 0x400805f8
+Setup done
+scan start
+scan done
+17 networks found
+1: IoTNetwork (-62)*
+2: WiFiSSID (-62)*
+3: B3A7992 (-63)*
+4: WiFi (-63) 
+5: IoTNetwork2 (-64)*
+...
+```
+
+## Troubleshooting
+
+***Important: Be sure you're using a good quality USB cable and you have enough power source for your project.***
+
+* **Programming Fail:** If the programming/flash procedure fails, try to reduce the serial connection speed.
+* **COM port not detected:** Check the USB cable connection and the USB to Serial driver installation.
+
+If the error persists, you can ask for help at the official [ESP32 forum](https://esp32.com) or see [Contribute](#contribute).
+
+## Contribute
+
+To know how to contribute to this project, see [How to contribute.](https://github.com/espressif/arduino-esp32/blob/master/CONTRIBUTING.rst)
+
+If you have any **feedback** or **issue** to report on this example/library, please open an issue or fix it by creating a new PR. Contributions are more than welcome!
+
+Before creating a new issue, be sure to try the Troubleshooting and to check if the same issue was already created by someone else.
+
+## Resources
+
+* Arduino-ESP32 Official Repository: [espressif/arduino-esp32](https://github.com/espressif/arduino-esp32)
+* ESP32 Datasheet: [Link to datasheet](https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf)
+* ESP32-WROOM-DA Datasheet: [Link to datasheet](https://www.espressif.com/sites/default/files/documentation/esp32-wroom-da_datasheet_en.pdf)
diff --git a/libraries/WiFi/examples/WiFiScanDualAntenna/WiFiScanDualAntenna.ino b/libraries/WiFi/examples/WiFiScanDualAntenna/WiFiScanDualAntenna.ino
new file mode 100644
index 00000000000..344778ff3df
--- /dev/null
+++ b/libraries/WiFi/examples/WiFiScanDualAntenna/WiFiScanDualAntenna.ino
@@ -0,0 +1,79 @@
+/*
+ *  This sketch demonstrates how to scan WiFi networks.
+ *  The API is almost the same as with the WiFi Shield library,
+ *  the most obvious difference being the different file you need to include:
+ */
+#include "WiFi.h"
+
+/* These are the GPIOs connected to the antenna switch on the ESP32-WROOM-DA.
+ * Both GPIOs are not exposed to the module pins and cannot be used except to
+ * control the antnnas switch.
+ * 
+ * For more details, see the datashhet at:
+ * https://www.espressif.com/sites/default/files/documentation/esp32-wroom-da_datasheet_en.pdf
+ */
+
+#define GPIO_ANT1   2   // GPIO for antenna 1
+#define GPIO_ANT2   25  // GPIO for antenna 2 (default)
+
+void setup()
+{
+    bool err = ESP_FAIL;
+    Serial.begin(115200);
+
+    // Set WiFi to station mode and disconnect from an AP if it was previously connected
+    WiFi.mode(WIFI_STA);
+
+    /* Attention: This is the manual prodecure for the dual antenna configuration.
+     * If you choose the ESP32-WROOM-DA module from the Tools -> Board, this configuration
+     * is not necessary!
+     * 
+     * Set WiFi dual antenna configuration by passing the GPIO and antenna mode for RX ant TX
+     */ 
+    err = WiFi.setDualAntennaConfig(GPIO_ANT1, GPIO_ANT2, WIFI_RX_ANT_AUTO, WIFI_TX_ANT_AUTO);
+
+    /* For more details on how to use this feature, see our docs:
+     * https://docs.espressif.com/projects/arduino-esp32/en/latest/api/wifi.html
+     */
+
+    if(err == ESP_FAIL) {
+        Serial.println("Dual Antenna configuration failed!");
+    } else {
+        Serial.println("Dual Antenna configuration successfuly done!");
+    }
+
+    WiFi.disconnect();
+    delay(100);
+
+    Serial.println("Setup done");
+}
+
+void loop()
+{
+    Serial.println("scan start");
+
+    // WiFi.scanNetworks will return the number of networks found
+    int n = WiFi.scanNetworks();
+    Serial.println("scan done");
+    if (n == 0) {
+        Serial.println("no networks found");
+    } else {
+        Serial.print(n);
+        Serial.println(" networks found");
+        for (int i = 0; i < n; ++i) {
+            // Print SSID and RSSI for each network found
+            Serial.print(i + 1);
+            Serial.print(": ");
+            Serial.print(WiFi.SSID(i));
+            Serial.print(" (");
+            Serial.print(WiFi.RSSI(i));
+            Serial.print(")");
+            Serial.println((WiFi.encryptionType(i) == WIFI_AUTH_OPEN)?" ":"*");
+            delay(10);
+        }
+    }
+    Serial.println("");
+
+    // Wait a bit before scanning again
+    delay(5000);
+}
diff --git a/libraries/WiFi/src/WiFiClient.cpp b/libraries/WiFi/src/WiFiClient.cpp
index c3e9fc86b29..69a691995bd 100644
--- a/libraries/WiFi/src/WiFiClient.cpp
+++ b/libraries/WiFi/src/WiFiClient.cpp
@@ -175,11 +175,11 @@ class WiFiClientSocketHandle {
     }
 };
 
-WiFiClient::WiFiClient():_connected(false),next(NULL)
+WiFiClient::WiFiClient():_connected(false),_timeout(WIFI_CLIENT_DEF_CONN_TIMEOUT_MS),next(NULL)
 {
 }
 
-WiFiClient::WiFiClient(int fd):_connected(true),next(NULL)
+WiFiClient::WiFiClient(int fd):_connected(true),_timeout(WIFI_CLIENT_DEF_CONN_TIMEOUT_MS),next(NULL)
 {
     clientSocketHandle.reset(new WiFiClientSocketHandle(fd));
     _rxBuffer.reset(new WiFiClientRxBuffer(fd));
@@ -208,10 +208,11 @@ void WiFiClient::stop()
 
 int WiFiClient::connect(IPAddress ip, uint16_t port)
 {
-    return connect(ip,port,WIFI_CLIENT_DEF_CONN_TIMEOUT_MS);
-   }
-   int WiFiClient::connect(IPAddress ip, uint16_t port, int32_t timeout   )
+    return connect(ip,port,_timeout);
+}
+int WiFiClient::connect(IPAddress ip, uint16_t port, int32_t timeout)
 {
+    _timeout = timeout;
     int sockfd = socket(AF_INET, SOCK_STREAM, 0);
     if (sockfd < 0) {
         log_e("socket: %d", errno);
@@ -229,8 +230,8 @@ int WiFiClient::connect(IPAddress ip, uint16_t port)
     struct timeval tv;
     FD_ZERO(&fdset);
     FD_SET(sockfd, &fdset);
-    tv.tv_sec = 0;
-    tv.tv_usec = timeout * 1000;
+    tv.tv_sec = _timeout / 1000;
+    tv.tv_usec = 0;
 
 #ifdef ESP_IDF_VERSION_MAJOR
     int res = lwip_connect(sockfd, (struct sockaddr*)&serveraddr, sizeof(serveraddr));
@@ -243,13 +244,13 @@ int WiFiClient::connect(IPAddress ip, uint16_t port)
         return 0;
     }
 
-    res = select(sockfd + 1, nullptr, &fdset, nullptr, timeout<0 ? nullptr : &tv);
+    res = select(sockfd + 1, nullptr, &fdset, nullptr, _timeout<0 ? nullptr : &tv);
     if (res < 0) {
         log_e("select on fd %d, errno: %d, \"%s\"", sockfd, errno, strerror(errno));
         close(sockfd);
         return 0;
     } else if (res == 0) {
-        log_i("select returned due to timeout %d ms for fd %d", timeout, sockfd);
+        log_i("select returned due to timeout %d ms for fd %d", _timeout, sockfd);
         close(sockfd);
         return 0;
     } else {
@@ -270,18 +271,28 @@ int WiFiClient::connect(IPAddress ip, uint16_t port)
         }
     }
 
+#define ROE_WIFICLIENT(x,msg) { if (((x)<0)) { log_e("Setsockopt '" msg "'' on fd %d failed. errno: %d, \"%s\"", sockfd, errno, strerror(errno)); return 0; }}
+    ROE_WIFICLIENT(setsockopt(sockfd, SOL_SOCKET, SO_SNDTIMEO, &tv, sizeof(tv)),"SO_SNDTIMEO");
+    ROE_WIFICLIENT(setsockopt(sockfd, SOL_SOCKET, SO_RCVTIMEO, &tv, sizeof(tv)),"SO_RCVTIMEO");
+
+    // These are also set in WiFiClientSecure, should be set here too?
+    //ROE_WIFICLIENT(setsockopt(sockfd, IPPROTO_TCP, TCP_NODELAY, &enable, sizeof(enable)),"TCP_NODELAY"); 
+    //ROE_WIFICLIENT (setsockopt(sockfd, SOL_SOCKET, SO_KEEPALIVE, &enable, sizeof(enable)),"SO_KEEPALIVE");
+
     fcntl( sockfd, F_SETFL, fcntl( sockfd, F_GETFL, 0 ) & (~O_NONBLOCK) );
     clientSocketHandle.reset(new WiFiClientSocketHandle(sockfd));
     _rxBuffer.reset(new WiFiClientRxBuffer(sockfd));
+
     _connected = true;
     return 1;
 }
 
 int WiFiClient::connect(const char *host, uint16_t port)
 {
-    return connect(host,port,WIFI_CLIENT_DEF_CONN_TIMEOUT_MS);
-   }
-   int WiFiClient::connect(const char *host, uint16_t port, int32_t timeout   )
+    return connect(host,port,_timeout);
+}
+
+int WiFiClient::connect(const char *host, uint16_t port, int32_t timeout)
 {
     IPAddress srv((uint32_t)0);
     if(!WiFiGenericClass::hostByName(host, srv)){
@@ -301,14 +312,20 @@ int WiFiClient::setSocketOption(int option, char* value, size_t len)
 
 int WiFiClient::setTimeout(uint32_t seconds)
 {
-    Client::setTimeout(seconds * 1000);
-    struct timeval tv;
-    tv.tv_sec = seconds;
-    tv.tv_usec = 0;
-    if(setSocketOption(SO_RCVTIMEO, (char *)&tv, sizeof(struct timeval)) < 0) {
-        return -1;
+    Client::setTimeout(seconds * 1000); // This should be here?
+    _timeout = seconds * 1000;
+    if(fd() >= 0) {
+        struct timeval tv;
+        tv.tv_sec = seconds;
+        tv.tv_usec = 0;
+        if(setSocketOption(SO_RCVTIMEO, (char *)&tv, sizeof(struct timeval)) < 0) {
+            return -1;
+        }
+        return setSocketOption(SO_SNDTIMEO, (char *)&tv, sizeof(struct timeval));
+    }
+    else {
+        return 0;
     }
-    return setSocketOption(SO_SNDTIMEO, (char *)&tv, sizeof(struct timeval));
 }
 
 int WiFiClient::setOption(int option, int *value)
diff --git a/libraries/WiFi/src/WiFiClient.h b/libraries/WiFi/src/WiFiClient.h
index 4915cfd5203..5aaa6ba115e 100644
--- a/libraries/WiFi/src/WiFiClient.h
+++ b/libraries/WiFi/src/WiFiClient.h
@@ -42,6 +42,7 @@ class WiFiClient : public ESPLwIPClient
     std::shared_ptr<WiFiClientSocketHandle> clientSocketHandle;
     std::shared_ptr<WiFiClientRxBuffer> _rxBuffer;
     bool _connected;
+    int _timeout;
 
 public:
     WiFiClient *next;
diff --git a/libraries/WiFi/src/WiFiGeneric.cpp b/libraries/WiFi/src/WiFiGeneric.cpp
index 838c23bf5cd..5d31341481a 100644
--- a/libraries/WiFi/src/WiFiGeneric.cpp
+++ b/libraries/WiFi/src/WiFiGeneric.cpp
@@ -138,9 +138,20 @@ esp_err_t set_esp_interface_ip(esp_interface_t interface, IPAddress local_ip=IPA
 
         dhcps_lease_t lease;
         lease.enable = true;
-        lease.start_ip.addr = static_cast<uint32_t>(local_ip) + (1 << 24);
-        lease.end_ip.addr = static_cast<uint32_t>(local_ip) + (11 << 24);
-
+        uint32_t dhcp_ipaddr = static_cast<uint32_t>(local_ip);
+        // prevents DHCP lease range to overflow subnet/24 range
+        // there will be 11 addresses for DHCP to lease
+        uint8_t leaseStart = (uint8_t)(~subnet[3] - 12);  
+        if ((local_ip[3]) < leaseStart) {
+            lease.start_ip.addr = dhcp_ipaddr + (1 << 24);
+            lease.end_ip.addr = dhcp_ipaddr + (11 << 24);
+        } else {
+            // make range stay in the begining of the netmask range
+            dhcp_ipaddr = (dhcp_ipaddr & 0x00FFFFFF);
+            lease.start_ip.addr = dhcp_ipaddr + (1 << 24);
+            lease.end_ip.addr = dhcp_ipaddr + (11 << 24);
+        }
+        log_v("DHCP Server Range: %s to %s", IPAddress(lease.start_ip.addr).toString(), IPAddress(lease.end_ip.addr).toString());
         err = tcpip_adapter_dhcps_option(
             (tcpip_adapter_dhcp_option_mode_t)TCPIP_ADAPTER_OP_SET,
             (tcpip_adapter_dhcp_option_id_t)REQUESTED_IP_ADDRESS,
@@ -555,6 +566,10 @@ void WiFiGenericClass::useStaticBuffers(bool bufferMode){
     _wifiUseStaticBuffers = bufferMode;
 }
 
+// Temporary fix to ensure that CDC+JTAG stay on on ESP32-C3
+#if CONFIG_IDF_TARGET_ESP32C3
+extern "C" void phy_bbpll_en_usb(bool en);
+#endif
 
 bool wifiLowLevelInit(bool persistent){
     if(!lowLevelInitDone){
@@ -587,6 +602,10 @@ bool wifiLowLevelInit(bool persistent){
         	lowLevelInitDone = false;
         	return lowLevelInitDone;
         }
+// Temporary fix to ensure that CDC+JTAG stay on on ESP32-C3
+#if CONFIG_IDF_TARGET_ESP32C3
+	phy_bbpll_en_usb(true);
+#endif
         if(!persistent){
         	lowLevelInitDone = esp_wifi_set_storage(WIFI_STORAGE_RAM) == ESP_OK;
         }
@@ -827,6 +846,8 @@ const char * system_event_reasons[] = { "UNSPECIFIED", "AUTH_EXPIRE", "AUTH_LEAV
 #endif
 esp_err_t WiFiGenericClass::_eventCallback(arduino_event_t *event)
 {
+    static bool first_connect = true;
+
     if(event->event_id < ARDUINO_EVENT_MAX) {
         log_d("Arduino Event: %d - %s", event->event_id, arduino_event_names[event->event_id]);
     }
@@ -852,7 +873,7 @@ esp_err_t WiFiGenericClass::_eventCallback(arduino_event_t *event)
         log_w("Reason: %u - %s", reason, reason2str(reason));
         if(reason == WIFI_REASON_NO_AP_FOUND) {
             WiFiSTAClass::_setStatus(WL_NO_SSID_AVAIL);
-        } else if(reason == WIFI_REASON_AUTH_FAIL || reason == WIFI_REASON_ASSOC_FAIL) {
+        } else if((reason == WIFI_REASON_AUTH_FAIL) && !first_connect){
             WiFiSTAClass::_setStatus(WL_CONNECT_FAILED);
         } else if(reason == WIFI_REASON_BEACON_TIMEOUT || reason == WIFI_REASON_HANDSHAKE_TIMEOUT) {
             WiFiSTAClass::_setStatus(WL_CONNECTION_LOST);
@@ -862,12 +883,25 @@ esp_err_t WiFiGenericClass::_eventCallback(arduino_event_t *event)
             WiFiSTAClass::_setStatus(WL_DISCONNECTED);
         }
         clearStatusBits(STA_CONNECTED_BIT | STA_HAS_IP_BIT | STA_HAS_IP6_BIT);
-        if(((reason == WIFI_REASON_AUTH_EXPIRE) ||
-            (reason >= WIFI_REASON_BEACON_TIMEOUT && reason != WIFI_REASON_AUTH_FAIL)) &&
-            WiFi.getAutoReconnect())
+        if(first_connect && ((reason == WIFI_REASON_AUTH_EXPIRE) ||
+        (reason >= WIFI_REASON_BEACON_TIMEOUT)))
         {
+            log_d("WiFi Reconnect Running");
             WiFi.disconnect();
             WiFi.begin();
+            first_connect = false;
+        }
+        else if(WiFi.getAutoReconnect()){
+            if((reason == WIFI_REASON_AUTH_EXPIRE) ||
+            (reason >= WIFI_REASON_BEACON_TIMEOUT && reason != WIFI_REASON_AUTH_FAIL))
+            {
+                log_d("WiFi AutoReconnect Running");
+                WiFi.disconnect();
+                WiFi.begin();
+            }
+        }
+        else if (reason == WIFI_REASON_ASSOC_FAIL){
+            WiFiSTAClass::_setStatus(WL_CONNECT_FAILED);
         }
     } else if(event->event_id == ARDUINO_EVENT_WIFI_STA_GOT_IP) {
 #if ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_DEBUG
@@ -1038,6 +1072,14 @@ bool WiFiGenericClass::mode(wifi_mode_t m)
     if(!espWiFiStart()){
         return false;
     }
+
+    #ifdef BOARD_HAS_DUAL_ANTENNA
+        if(!setDualAntennaConfig(ANT1, ANT2, WIFI_RX_ANT_AUTO, WIFI_TX_ANT_AUTO)){
+            log_e("Dual Antenna Config failed!");
+            return false;
+        }
+    #endif
+
     return true;
 }
 
@@ -1187,6 +1229,94 @@ bool WiFiGenericClass::initiateFTM(uint8_t frm_count, uint16_t burst_period, uin
   return true;
 }
 
+/**
+ * Configure Dual antenna.
+ * @param gpio_ant1 Configure the GPIO number for the antenna 1 connected to the RF switch (default GPIO2 on ESP32-WROOM-DA)
+ * @param gpio_ant2 Configure the GPIO number for the antenna 2 connected to the RF switch (default GPIO25 on ESP32-WROOM-DA)
+ * @param rx_mode Set the RX antenna mode. See wifi_rx_ant_t for the options.
+ * @param tx_mode Set the TX antenna mode. See wifi_tx_ant_t for the options.
+ * @return true on success
+ */
+bool WiFiGenericClass::setDualAntennaConfig(uint8_t gpio_ant1, uint8_t gpio_ant2, wifi_rx_ant_t rx_mode, wifi_tx_ant_t tx_mode) {
+
+    wifi_ant_gpio_config_t wifi_ant_io;
+
+    if (ESP_OK != esp_wifi_get_ant_gpio(&wifi_ant_io)) {
+        log_e("Failed to get antenna configuration");
+        return false;
+    }
+
+    wifi_ant_io.gpio_cfg[0].gpio_num = gpio_ant1;
+    wifi_ant_io.gpio_cfg[0].gpio_select = 1;
+    wifi_ant_io.gpio_cfg[1].gpio_num = gpio_ant2;
+    wifi_ant_io.gpio_cfg[1].gpio_select = 1;
+
+    if (ESP_OK != esp_wifi_set_ant_gpio(&wifi_ant_io)) {
+        log_e("Failed to set antenna GPIO configuration");
+        return false;
+    }
+
+    // Set antenna default configuration
+    wifi_ant_config_t ant_config = {
+        .rx_ant_mode = WIFI_ANT_MODE_AUTO,
+        .tx_ant_mode = WIFI_ANT_MODE_AUTO,
+        .enabled_ant0 = 0,
+        .enabled_ant1 = 1,
+    };
+
+    switch (rx_mode)
+    {
+    case WIFI_RX_ANT0:
+        ant_config.rx_ant_mode = WIFI_ANT_MODE_ANT0;
+        break;
+    case WIFI_RX_ANT1:
+        ant_config.rx_ant_mode = WIFI_ANT_MODE_ANT1;
+        break;
+    case WIFI_RX_ANT_AUTO:
+        log_i("TX Antenna will be automatically selected");
+        ant_config.rx_ant_default = WIFI_ANT_ANT0;
+        ant_config.rx_ant_mode = WIFI_ANT_MODE_AUTO;
+        // Force TX for AUTO if RX is AUTO
+        ant_config.tx_ant_mode = WIFI_ANT_MODE_AUTO;
+        goto set_ant;
+        break;
+    default:
+        log_e("Invalid default antenna! Falling back to AUTO");
+        ant_config.rx_ant_mode = WIFI_ANT_MODE_AUTO;
+        break;
+    }
+
+    switch (tx_mode)
+    {
+    case WIFI_TX_ANT0:
+        ant_config.tx_ant_mode = WIFI_ANT_MODE_ANT0;
+        break;
+    case WIFI_TX_ANT1:
+        ant_config.tx_ant_mode = WIFI_ANT_MODE_ANT1;
+        break;
+    case WIFI_TX_ANT_AUTO:
+        log_i("RX Antenna will be automatically selected");
+        ant_config.rx_ant_default = WIFI_ANT_ANT0;
+        ant_config.tx_ant_mode = WIFI_ANT_MODE_AUTO;
+        // Force RX for AUTO if RX is AUTO
+        ant_config.rx_ant_mode = WIFI_ANT_MODE_AUTO;
+        break;
+    default:
+        log_e("Invalid default antenna! Falling back to AUTO");
+        ant_config.rx_ant_default = WIFI_ANT_ANT0;
+        ant_config.tx_ant_mode = WIFI_ANT_MODE_AUTO;
+        break;
+    }
+
+set_ant:
+    if (ESP_OK != esp_wifi_set_ant(&ant_config)) {
+        log_e("Failed to set antenna configuration");
+        return false;
+    }
+
+    return true;
+}
+
 // -----------------------------------------------------------------------------------------------------------------------
 // ------------------------------------------------ Generic Network function ---------------------------------------------
 // -----------------------------------------------------------------------------------------------------------------------
diff --git a/libraries/WiFi/src/WiFiGeneric.h b/libraries/WiFi/src/WiFiGeneric.h
index 7079c032993..62642b43dc7 100644
--- a/libraries/WiFi/src/WiFiGeneric.h
+++ b/libraries/WiFi/src/WiFiGeneric.h
@@ -139,6 +139,18 @@ static const int WIFI_SCAN_DONE_BIT= BIT12;
 static const int WIFI_DNS_IDLE_BIT = BIT13;
 static const int WIFI_DNS_DONE_BIT = BIT14;
 
+typedef enum {
+	WIFI_RX_ANT0 = 0,
+	WIFI_RX_ANT1,
+	WIFI_RX_ANT_AUTO
+} wifi_rx_ant_t;
+
+typedef enum {
+	WIFI_TX_ANT0 = 0,
+	WIFI_TX_ANT1,
+	WIFI_TX_ANT_AUTO
+} wifi_tx_ant_t;
+
 class WiFiGenericClass
 {
   public:
@@ -174,6 +186,8 @@ class WiFiGenericClass
 
     bool initiateFTM(uint8_t frm_count=16, uint16_t burst_period=2, uint8_t channel=1, const uint8_t * mac=NULL);
 
+    static bool setDualAntennaConfig(uint8_t gpio_ant1, uint8_t gpio_ant2, wifi_rx_ant_t rx_mode, wifi_tx_ant_t tx_mode);
+
     static const char * getHostname();
     static bool setHostname(const char * hostname);
     static bool hostname(const String& aHostname) { return setHostname(aHostname.c_str()); }
diff --git a/libraries/WiFi/src/WiFiSTA.cpp b/libraries/WiFi/src/WiFiSTA.cpp
index dd468823607..7734f5d79b5 100644
--- a/libraries/WiFi/src/WiFiSTA.cpp
+++ b/libraries/WiFi/src/WiFiSTA.cpp
@@ -42,6 +42,7 @@ extern "C" {
 #include "lwip/dns.h"
 #include <esp_smartconfig.h>
 #include <esp_netif.h>
+#include "esp_wpa2.h"
 }
 
 // -----------------------------------------------------------------------------------------------------------------------
@@ -82,7 +83,7 @@ static bool sta_config_equal(const wifi_config_t& lhs, const wifi_config_t& rhs)
     return true;
 }
 
-static void wifi_sta_config(wifi_config_t * wifi_config, const char * ssid=NULL, const char * password=NULL, const uint8_t * bssid=NULL, uint8_t channel=0, wifi_scan_method_t scan_method=WIFI_ALL_CHANNEL_SCAN, wifi_sort_method_t sort_method=WIFI_CONNECT_AP_BY_SIGNAL, uint16_t listen_interval=0, bool pmf_required=false){
+static void wifi_sta_config(wifi_config_t * wifi_config, const char * ssid=NULL, const char * password=NULL, const uint8_t * bssid=NULL, uint8_t channel=0, wifi_auth_mode_t min_security=WIFI_AUTH_WPA2_PSK, wifi_scan_method_t scan_method=WIFI_ALL_CHANNEL_SCAN, wifi_sort_method_t sort_method=WIFI_CONNECT_AP_BY_SIGNAL, uint16_t listen_interval=0, bool pmf_required=false){
     wifi_config->sta.channel = channel;
     wifi_config->sta.listen_interval = listen_interval;
     wifi_config->sta.scan_method = scan_method;//WIFI_ALL_CHANNEL_SCAN or WIFI_FAST_SCAN
@@ -98,7 +99,7 @@ static void wifi_sta_config(wifi_config_t * wifi_config, const char * ssid=NULL,
     if(ssid != NULL && ssid[0] != 0){
         _wifi_strncpy((char*)wifi_config->sta.ssid, ssid, 32);
     	if(password != NULL && password[0] != 0){
-    		wifi_config->sta.threshold.authmode = WIFI_AUTH_WPA2_PSK;
+    		wifi_config->sta.threshold.authmode = min_security;
     		_wifi_strncpy((char*)wifi_config->sta.password, password, 64);
     	}
         if(bssid != NULL){
@@ -114,6 +115,9 @@ static void wifi_sta_config(wifi_config_t * wifi_config, const char * ssid=NULL,
 
 bool WiFiSTAClass::_autoReconnect = true;
 bool WiFiSTAClass::_useStaticIp = false;
+wifi_auth_mode_t WiFiSTAClass::_minSecurity = WIFI_AUTH_WPA2_PSK;
+wifi_scan_method_t WiFiSTAClass::_scanMethod = WIFI_FAST_SCAN;
+wifi_sort_method_t WiFiSTAClass::_sortMethod = WIFI_CONNECT_AP_BY_SIGNAL;
 
 static wl_status_t _sta_status = WL_NO_SHIELD;
 static EventGroupHandle_t _sta_status_group = NULL;
@@ -145,6 +149,67 @@ wl_status_t WiFiSTAClass::status()
     return (wl_status_t)xEventGroupClearBits(_sta_status_group, 0);
 }
 
+/**
+ * Start Wifi connection with a WPA2 Enterprise AP
+ * if passphrase is set the most secure supported mode will be automatically selected
+ * @param ssid const char*          Pointer to the SSID string.
+ * @param method wpa2_method_t      The authentication method of WPA2 (WPA2_AUTH_TLS, WPA2_AUTH_PEAP, WPA2_AUTH_TTLS)
+ * @param wpa2_identity  const char*          Pointer to the entity
+ * @param wpa2_username  const char*          Pointer to the username
+ * @param password const char *     Pointer to the password.
+ * @param ca_pem const char*        Pointer to a string with the contents of a  .pem  file with CA cert
+ * @param client_crt const char*        Pointer to a string with the contents of a .crt file with client cert
+ * @param client_key const char*        Pointer to a string with the contants of a .key file with client key
+ * @param bssid uint8_t[6]          Optional. BSSID / MAC of AP
+ * @param channel                   Optional. Channel of AP
+ * @param connect                   Optional. call connect
+ * @return
+ */
+wl_status_t WiFiSTAClass::begin(const char* wpa2_ssid, wpa2_auth_method_t method, const char* wpa2_identity, const char* wpa2_username, const char *wpa2_password, const char* ca_pem, const char* client_crt, const char* client_key, int32_t channel, const uint8_t* bssid, bool connect)
+{
+    if(!WiFi.enableSTA(true)) {
+        log_e("STA enable failed!");
+        return WL_CONNECT_FAILED;
+    }
+
+    if(!wpa2_ssid || *wpa2_ssid == 0x00 || strlen(wpa2_ssid) > 32) {
+        log_e("SSID too long or missing!");
+        return WL_CONNECT_FAILED;
+    }
+
+    if(wpa2_identity && strlen(wpa2_identity) > 64) {
+        log_e("identity too long!");
+        return WL_CONNECT_FAILED;
+    }
+
+    if(wpa2_username && strlen(wpa2_username) > 64) {
+        log_e("username too long!");
+        return WL_CONNECT_FAILED;
+    }
+
+    if(wpa2_password && strlen(wpa2_password) > 64) {
+        log_e("password too long!");
+    }
+
+    if(ca_pem) {
+        esp_wifi_sta_wpa2_ent_set_ca_cert((uint8_t *)ca_pem, strlen(ca_pem));
+    }
+
+    if(client_crt) {
+        esp_wifi_sta_wpa2_ent_set_cert_key((uint8_t *)client_crt, strlen(client_crt), (uint8_t *)client_key, strlen(client_key), NULL, 0);
+    }
+
+    esp_wifi_sta_wpa2_ent_set_identity((uint8_t *)wpa2_identity, strlen(wpa2_identity));
+    if(method == WPA2_AUTH_PEAP || method == WPA2_AUTH_TTLS) {
+        esp_wifi_sta_wpa2_ent_set_username((uint8_t *)wpa2_username, strlen(wpa2_username));
+        esp_wifi_sta_wpa2_ent_set_password((uint8_t *)wpa2_password, strlen(wpa2_password));
+    }
+    esp_wifi_sta_wpa2_ent_enable(); //set config settings to enable function
+    WiFi.begin(wpa2_ssid); //connect to wifi
+
+    return status();
+}
+
 /**
  * Start Wifi connection
  * if passphrase is set the most secure supported mode will be automatically selected
@@ -181,12 +246,7 @@ wl_status_t WiFiSTAClass::begin(const char* ssid, const char *passphrase, int32_
         _wifi_strncpy(reinterpret_cast<char*>(conf.sta.password), passphrase, 64);
     }
 
-    if(channel == 0) {
-        // If no specific channel specified, then do an slower WIFI_ALL_CHANNEL_SCAN
-        wifi_sta_config(&conf, ssid, passphrase, bssid, channel, WIFI_ALL_CHANNEL_SCAN);
-    }
-    else
-        wifi_sta_config(&conf, ssid, passphrase, bssid, channel, WIFI_FAST_SCAN);
+    wifi_sta_config(&conf, ssid, passphrase, bssid, channel, _minSecurity, _scanMethod, _sortMethod);
 
     wifi_config_t current_conf;
     if(esp_wifi_get_config((wifi_interface_t)ESP_IF_WIFI_STA, &current_conf) != ESP_OK){
@@ -342,6 +402,37 @@ bool WiFiSTAClass::isConnected()
     return (status() == WL_CONNECTED);
 }
 
+/**
+ * Set the minimum security for AP to be considered connectable
+ * Must be called before WiFi.begin()
+ * @param minSecurity wifi_auth_mode_t
+ */
+void WiFiSTAClass::setMinSecurity(wifi_auth_mode_t minSecurity)
+{
+    _minSecurity = minSecurity;
+}
+
+/**
+ * Set the way that AP is chosen. 
+ * First SSID match[WIFI_FAST_SCAN] or Sorted[WIFI_ALL_CHANNEL_SCAN] (RSSI or Security)
+ * Must be called before WiFi.begin()
+ * @param scanMethod wifi_scan_method_t
+ */
+void WiFiSTAClass::setScanMethod(wifi_scan_method_t scanMethod)
+{
+    _scanMethod = scanMethod;
+}
+
+/**
+ * Set the way that AP is sorted. (requires scanMethod WIFI_ALL_CHANNEL_SCAN) 
+ * By SSID[WIFI_CONNECT_AP_BY_SIGNAL] or Security[WIFI_CONNECT_AP_BY_SECURITY]
+ * Must be called before WiFi.begin()
+ * @param sortMethod wifi_sort_method_t
+ */
+void WiFiSTAClass::setSortMethod(wifi_sort_method_t sortMethod)
+{
+    _sortMethod = sortMethod;
+}
 
 /**
  * Setting the ESP32 station to connect to the AP (which is recorded)
@@ -655,8 +746,15 @@ IPv6Address WiFiSTAClass::localIPv6()
 bool WiFiSTAClass::_smartConfigStarted = false;
 bool WiFiSTAClass::_smartConfigDone = false;
 
-
-bool WiFiSTAClass::beginSmartConfig() {
+/**
+ * @brief 
+ * 
+ * @param type Select type of SmartConfig. Default type is SC_TYPE_ESPTOUCH
+ * @param crypt_key When using type SC_TYPE_ESPTOUTCH_V2 crypt key needed, else ignored. Lenght should be 16 chars.
+ * @return true if configuration is successful.
+ * @return false if configuration fails.
+ */
+bool WiFiSTAClass::beginSmartConfig(smartconfig_type_t type, char* crypt_key) {
     esp_err_t err;
     if (_smartConfigStarted) {
         return false;
@@ -668,7 +766,13 @@ bool WiFiSTAClass::beginSmartConfig() {
     esp_wifi_disconnect();
 
     smartconfig_start_config_t conf = SMARTCONFIG_START_CONFIG_DEFAULT();
-    err = esp_smartconfig_set_type(SC_TYPE_ESPTOUCH);
+
+    if (type == SC_TYPE_ESPTOUCH_V2){
+        conf.esp_touch_v2_enable_crypt = true;
+        conf.esp_touch_v2_key = crypt_key;
+    }
+
+    err = esp_smartconfig_set_type(type);
     if (err != ESP_OK) {
     	log_e("SmartConfig Set Type Failed!");
         return false;
diff --git a/libraries/WiFi/src/WiFiSTA.h b/libraries/WiFi/src/WiFiSTA.h
index afd641f7eb3..b8bb855c198 100644
--- a/libraries/WiFi/src/WiFiSTA.h
+++ b/libraries/WiFi/src/WiFiSTA.h
@@ -30,6 +30,11 @@
 #include "esp_event.h"
 #endif
 
+typedef enum {
+    WPA2_AUTH_TLS = 0,
+    WPA2_AUTH_PEAP = 1,
+    WPA2_AUTH_TTLS = 2
+} wpa2_auth_method_t;
 
 class WiFiSTAClass
 {
@@ -39,6 +44,7 @@ class WiFiSTAClass
 
 public:
 
+    wl_status_t begin(const char* wpa2_ssid, wpa2_auth_method_t method, const char* wpa2_identity=NULL, const char* wpa2_username=NULL, const char *wpa2_password=NULL, const char* ca_pem=NULL, const char* client_crt=NULL, const char* client_key=NULL, int32_t channel=0, const uint8_t* bssid=0, bool connect=true);
     wl_status_t begin(const char* ssid, const char *passphrase = NULL, int32_t channel = 0, const uint8_t* bssid = NULL, bool connect = true);
     wl_status_t begin(char* ssid, char *passphrase = NULL, int32_t channel = 0, const uint8_t* bssid = NULL, bool connect = true);
     wl_status_t begin();
@@ -58,6 +64,11 @@ class WiFiSTAClass
 
     uint8_t waitForConnectResult(unsigned long timeoutLength = 60000);
 
+    // Next group functions must be called before WiFi.begin()
+    void setMinSecurity(wifi_auth_mode_t minSecurity);// Default is WIFI_AUTH_WPA2_PSK
+    void setScanMethod(wifi_scan_method_t scanMethod);// Default is WIFI_FAST_SCAN
+    void setSortMethod(wifi_sort_method_t sortMethod);// Default is WIFI_CONNECT_AP_BY_SIGNAL
+
     // STA network info
     IPAddress localIP();
 
@@ -90,9 +101,12 @@ class WiFiSTAClass
 protected:
     static bool _useStaticIp;
     static bool _autoReconnect;
+    static wifi_auth_mode_t _minSecurity;
+    static wifi_scan_method_t _scanMethod;
+    static wifi_sort_method_t _sortMethod;
 
 public: 
-    bool beginSmartConfig();
+    bool beginSmartConfig(smartconfig_type_t type = SC_TYPE_ESPTOUCH, char* crypt_key = NULL);
     bool stopSmartConfig();
     bool smartConfigDone();
 
diff --git a/libraries/WiFi/src/WiFiScan.cpp b/libraries/WiFi/src/WiFiScan.cpp
index f34badb16dc..5b0c6732a64 100644
--- a/libraries/WiFi/src/WiFiScan.cpp
+++ b/libraries/WiFi/src/WiFiScan.cpp
@@ -81,7 +81,7 @@ void* WiFiScanClass::_scanResult = 0;
  * @param show_hidden   show hidden networks
  * @return Number of discovered networks
  */
-int16_t WiFiScanClass::scanNetworks(bool async, bool show_hidden, bool passive, uint32_t max_ms_per_chan, uint8_t channel)
+int16_t WiFiScanClass::scanNetworks(bool async, bool show_hidden, bool passive, uint32_t max_ms_per_chan, uint8_t channel, const char * ssid, const uint8_t * bssid)
 {
     if(WiFiGenericClass::getStatusBits() & WIFI_SCANNING_BIT) {
         return WIFI_SCAN_RUNNING;
@@ -95,8 +95,8 @@ int16_t WiFiScanClass::scanNetworks(bool async, bool show_hidden, bool passive,
     scanDelete();
 
     wifi_scan_config_t config;
-    config.ssid = 0;
-    config.bssid = 0;
+    config.ssid = (uint8_t*)ssid;
+    config.bssid = (uint8_t*)bssid;
     config.channel = channel;
     config.show_hidden = show_hidden;
     if(passive){
diff --git a/libraries/WiFi/src/WiFiScan.h b/libraries/WiFi/src/WiFiScan.h
index 1929e46627b..b838dc17574 100644
--- a/libraries/WiFi/src/WiFiScan.h
+++ b/libraries/WiFi/src/WiFiScan.h
@@ -31,7 +31,7 @@ class WiFiScanClass
 
 public:
 
-    int16_t scanNetworks(bool async = false, bool show_hidden = false, bool passive = false, uint32_t max_ms_per_chan = 300, uint8_t channel = 0);
+    int16_t scanNetworks(bool async = false, bool show_hidden = false, bool passive = false, uint32_t max_ms_per_chan = 300, uint8_t channel = 0, const char * ssid=nullptr, const uint8_t * bssid=nullptr);
 
     int16_t scanComplete();
     void scanDelete();
diff --git a/libraries/WiFi/src/WiFiServer.h b/libraries/WiFi/src/WiFiServer.h
index f5b7eaa7bf3..346986abad5 100644
--- a/libraries/WiFi/src/WiFiServer.h
+++ b/libraries/WiFi/src/WiFiServer.h
@@ -22,7 +22,6 @@
 #include "Arduino.h"
 #include "Server.h"
 #include "WiFiClient.h"
-#include "arpa/inet.h"
 #include "IPAddress.h"
 
 class WiFiServer : public Server {
@@ -38,7 +37,8 @@ class WiFiServer : public Server {
   public:
     void listenOnLocalhost(){}
 
-    WiFiServer(uint16_t port=80, uint8_t max_clients=4):sockfd(-1),_accepted_sockfd(-1),_addr(INADDR_ANY),_port(port),_max_clients(max_clients),_listening(false),_noDelay(false) {
+    // _addr(INADDR_ANY) is the same as _addr() ==> 0.0.0.0
+    WiFiServer(uint16_t port=80, uint8_t max_clients=4):sockfd(-1),_accepted_sockfd(-1),_addr(),_port(port),_max_clients(max_clients),_listening(false),_noDelay(false) {
       log_v("WiFiServer::WiFiServer(port=%d, ...)", port);
     }
     WiFiServer(const IPAddress& addr, uint16_t port=80, uint8_t max_clients=4):sockfd(-1),_accepted_sockfd(-1),_addr(addr),_port(port),_max_clients(max_clients),_listening(false),_noDelay(false) {
diff --git a/libraries/WiFi/src/WiFiType.h b/libraries/WiFi/src/WiFiType.h
index ee8cfdd2498..9b7b00e2c3a 100644
--- a/libraries/WiFi/src/WiFiType.h
+++ b/libraries/WiFi/src/WiFiType.h
@@ -23,6 +23,8 @@
 #ifndef ESP32WIFITYPE_H_
 #define ESP32WIFITYPE_H_
 
+#include "esp_wifi_types.h"
+
 #define WIFI_SCAN_RUNNING   (-1)
 #define WIFI_SCAN_FAILED    (-2)
 
diff --git a/libraries/WiFiClientSecure/README.md b/libraries/WiFiClientSecure/README.md
index fd5f4f51938..aa5199d2a49 100644
--- a/libraries/WiFiClientSecure/README.md
+++ b/libraries/WiFiClientSecure/README.md
@@ -26,6 +26,32 @@ Then:
 
 Please see the WiFiClientSecure example.
 
+Using a bundle of root certificate authority certificates 
+---------------------------------------------------------
+This method is similar to the single root certificate verfication above, but it uses a standard set of 
+root certificates from Mozilla to authenticate against, while the previous method only accepts a single 
+certificate for a given server. This allows the client to connect to all public SSL servers.
+
+To use this feature in PlatformIO:
+1. create a certificate bundle as described in the document below, or obtain a pre-built one you trust:
+https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/protocols/esp_crt_bundle.htm 
+(gen_crt_bundle.py can be found in the /tools folder)
+   a. note: the full bundle will take up around 64k of flash space, but has minimal RAM usage, as only
+      the index of the certificates is kept in RAM
+2. Place the bundle under the file name "data/cert/x509_crt_bundle.bin" in your platformio project
+3. add "board_build.embed_files = data/cert/x509_crt_bundle.bin" in your platformio.ini
+4. add the following global declaration in your project:
+   extern const uint8_t rootca_crt_bundle_start[] asm("_binary_data_cert_x509_crt_bundle_bin_start");
+5. before initiating the first SSL connection, call
+   my_client.setCACertBundle(rootca_crt_bundle_start);
+
+To use this feature in Android IDE:
+If the Arduino IDE added support for embedding files in the meantime, then follow the instructions above.
+If not, you have three choices:
+1. convert your project to PlatformIO
+2. create a makefile where you can add the idf_component_register() declaration to include the certificate bundle
+3. Store the bundle as a SPIFFS file, but then you have to load it into RAM in runtime and waste 64k of precious memory
+
 Using a root CA cert and client cert/keys
 -----------------------------------------
 This method authenticates the server and additionally also authenticates
diff --git a/libraries/WiFiClientSecure/src/WiFiClientSecure.cpp b/libraries/WiFiClientSecure/src/WiFiClientSecure.cpp
index 4f19d57a4d0..cf22082af06 100644
--- a/libraries/WiFiClientSecure/src/WiFiClientSecure.cpp
+++ b/libraries/WiFiClientSecure/src/WiFiClientSecure.cpp
@@ -19,6 +19,7 @@
 */
 
 #include "WiFiClientSecure.h"
+#include "esp_crt_bundle.h"
 #include <lwip/sockets.h>
 #include <lwip/netdb.h>
 #include <errno.h>
@@ -31,6 +32,7 @@
 WiFiClientSecure::WiFiClientSecure()
 {
     _connected = false;
+    _timeout = 30000; // Same default as ssl_client
 
     sslclient = new sslclient_context;
     ssl_init(sslclient);
@@ -44,13 +46,14 @@ WiFiClientSecure::WiFiClientSecure()
     _psKey = NULL;
     next = NULL;
     _alpn_protos = NULL;
+    _use_ca_bundle = false;
 }
 
 
 WiFiClientSecure::WiFiClientSecure(int sock)
 {
     _connected = false;
-    _timeout = 0;
+    _timeout = 30000; // Same default as ssl_client
 
     sslclient = new sslclient_context;
     ssl_init(sslclient);
@@ -126,10 +129,7 @@ int WiFiClientSecure::connect(IPAddress ip, uint16_t port, const char *CA_cert,
 
 int WiFiClientSecure::connect(const char *host, uint16_t port, const char *CA_cert, const char *cert, const char *private_key)
 {
-    if(_timeout > 0){
-        sslclient->handshake_timeout = _timeout;
-    }
-    int ret = start_ssl_client(sslclient, host, port, _timeout, CA_cert, cert, private_key, NULL, NULL, _use_insecure, _alpn_protos);
+    int ret = start_ssl_client(sslclient, host, port, _timeout, CA_cert, _use_ca_bundle, cert, private_key, NULL, NULL, _use_insecure, _alpn_protos);
     _lastError = ret;
     if (ret < 0) {
         log_e("start_ssl_client: %d", ret);
@@ -146,10 +146,7 @@ int WiFiClientSecure::connect(IPAddress ip, uint16_t port, const char *pskIdent,
 
 int WiFiClientSecure::connect(const char *host, uint16_t port, const char *pskIdent, const char *psKey) {
     log_v("start_ssl_client with PSK");
-    if(_timeout > 0){
-        sslclient->handshake_timeout = _timeout;
-    }
-    int ret = start_ssl_client(sslclient, host, port, _timeout, NULL, NULL, NULL, pskIdent, psKey, _use_insecure, _alpn_protos);
+    int ret = start_ssl_client(sslclient, host, port, _timeout, NULL, false, NULL, NULL, pskIdent, psKey, _use_insecure, _alpn_protos);
     _lastError = ret;
     if (ret < 0) {
         log_e("start_ssl_client: %d", ret);
@@ -263,6 +260,18 @@ void WiFiClientSecure::setCACert (const char *rootCA)
     _CA_cert = rootCA;
 }
 
+ void WiFiClientSecure::setCACertBundle(const uint8_t * bundle)
+ {
+    if (bundle != NULL)
+    {
+        esp_crt_bundle_set(bundle);
+        _use_ca_bundle = true;
+    } else {
+        esp_crt_bundle_detach(NULL);
+        _use_ca_bundle = false;
+    }
+ }
+
 void WiFiClientSecure::setCertificate (const char *client_ca)
 {
     _cert = client_ca;
@@ -301,6 +310,7 @@ char *WiFiClientSecure::_streamLoad(Stream& stream, size_t size) {
 }
 
 bool WiFiClientSecure::loadCACert(Stream& stream, size_t size) {
+  if (_CA_cert != NULL) free(const_cast<char*>(_CA_cert));
   char *dest = _streamLoad(stream, size);
   bool ret = false;
   if (dest) {
@@ -311,6 +321,7 @@ bool WiFiClientSecure::loadCACert(Stream& stream, size_t size) {
 }
 
 bool WiFiClientSecure::loadCertificate(Stream& stream, size_t size) {
+  if (_cert != NULL) free(const_cast<char*>(_cert));
   char *dest = _streamLoad(stream, size);
   bool ret = false;
   if (dest) {
@@ -321,6 +332,7 @@ bool WiFiClientSecure::loadCertificate(Stream& stream, size_t size) {
 }
 
 bool WiFiClientSecure::loadPrivateKey(Stream& stream, size_t size) {
+  if (_private_key != NULL) free(const_cast<char*>(_private_key));
   char *dest = _streamLoad(stream, size);
   bool ret = false;
   if (dest) {
@@ -348,3 +360,27 @@ void WiFiClientSecure::setAlpnProtocols(const char **alpn_protos)
 {
     _alpn_protos = alpn_protos;
 }
+int WiFiClientSecure::setTimeout(uint32_t seconds)
+{
+    _timeout = seconds * 1000;
+    if (sslclient->socket >= 0) {
+        struct timeval tv;
+        tv.tv_sec = seconds;
+        tv.tv_usec = 0;
+        if(setSocketOption(SO_RCVTIMEO, (char *)&tv, sizeof(struct timeval)) < 0) {
+            return -1;
+        }
+        return setSocketOption(SO_SNDTIMEO, (char *)&tv, sizeof(struct timeval));
+    }
+    else {
+        return 0;
+    }
+}
+int WiFiClientSecure::setSocketOption(int option, char* value, size_t len)
+{
+    int res = setsockopt(sslclient->socket, SOL_SOCKET, option, value, len);
+    if(res < 0) {
+        log_e("%X : %d", option, errno);
+    }
+    return res;
+}
diff --git a/libraries/WiFiClientSecure/src/WiFiClientSecure.h b/libraries/WiFiClientSecure/src/WiFiClientSecure.h
index bba94ceffbc..9ea0c04eb4e 100644
--- a/libraries/WiFiClientSecure/src/WiFiClientSecure.h
+++ b/libraries/WiFiClientSecure/src/WiFiClientSecure.h
@@ -32,7 +32,7 @@ class WiFiClientSecure : public WiFiClient
  
     int _lastError = 0;
     int _peek = -1;
-    int _timeout = 0;
+    int _timeout;
     bool _use_insecure;
     const char *_CA_cert;
     const char *_cert;
@@ -40,6 +40,7 @@ class WiFiClientSecure : public WiFiClient
     const char *_pskIdent; // identity for PSK cipher suites
     const char *_psKey; // key in hex for PSK cipher suites
     const char **_alpn_protos;
+    bool _use_ca_bundle;
 
 public:
     WiFiClientSecure *next;
@@ -70,6 +71,7 @@ class WiFiClientSecure : public WiFiClient
     void setCertificate(const char *client_ca);
     void setPrivateKey (const char *private_key);
     bool loadCACert(Stream& stream, size_t size);
+    void setCACertBundle(const uint8_t * bundle);
     bool loadCertificate(Stream& stream, size_t size);
     bool loadPrivateKey(Stream& stream, size_t size);
     bool verify(const char* fingerprint, const char* domain_name);
@@ -77,7 +79,8 @@ class WiFiClientSecure : public WiFiClient
     void setAlpnProtocols(const char **alpn_protos);
     const mbedtls_x509_crt* getPeerCertificate() { return mbedtls_ssl_get_peer_cert(&sslclient->ssl_ctx); };
     bool getFingerprintSHA256(uint8_t sha256_result[32]) { return get_peer_fingerprint(sslclient, sha256_result); };
-    int setTimeout(uint32_t seconds){ return 0; }
+    int setTimeout(uint32_t seconds);
+    int setSocketOption(int option, char* value, size_t len);
 
     operator bool()
     {
diff --git a/libraries/WiFiClientSecure/src/esp_crt_bundle.c b/libraries/WiFiClientSecure/src/esp_crt_bundle.c
new file mode 100644
index 00000000000..747f86239d5
--- /dev/null
+++ b/libraries/WiFiClientSecure/src/esp_crt_bundle.c
@@ -0,0 +1,218 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#include <string.h>
+#include <esp_system.h>
+#include <esp32-hal-log.h>
+#include "esp_crt_bundle.h"
+#include "esp_err.h"
+
+#define BUNDLE_HEADER_OFFSET 2
+#define CRT_HEADER_OFFSET 4
+
+static const char *TAG = "esp-x509-crt-bundle";
+
+/* a dummy certificate so that
+ * cacert_ptr passes non-NULL check during handshake */
+static mbedtls_x509_crt s_dummy_crt;
+
+
+typedef struct crt_bundle_t {
+    const uint8_t **crts;
+    uint16_t num_certs;
+    size_t x509_crt_bundle_len;
+} crt_bundle_t;
+
+static crt_bundle_t s_crt_bundle;
+
+static int esp_crt_verify_callback(void *buf, mbedtls_x509_crt *crt, int data, uint32_t *flags);
+static int esp_crt_check_signature(mbedtls_x509_crt *child, const uint8_t *pub_key_buf, size_t pub_key_len);
+
+
+static int esp_crt_check_signature(mbedtls_x509_crt *child, const uint8_t *pub_key_buf, size_t pub_key_len)
+{
+    int ret = 0;
+    mbedtls_x509_crt parent;
+    const mbedtls_md_info_t *md_info;
+    unsigned char hash[MBEDTLS_MD_MAX_SIZE];
+
+    mbedtls_x509_crt_init(&parent);
+
+    if ( (ret = mbedtls_pk_parse_public_key(&parent.pk, pub_key_buf, pub_key_len) ) != 0) {
+        log_e("PK parse failed with error %X", ret);
+        goto cleanup;
+    }
+
+
+    // Fast check to avoid expensive computations when not necessary
+    if (!mbedtls_pk_can_do(&parent.pk, child->sig_pk)) {
+        log_e("Simple compare failed");
+        ret = -1;
+        goto cleanup;
+    }
+
+    md_info = mbedtls_md_info_from_type(child->sig_md);
+    if ( (ret = mbedtls_md( md_info, child->tbs.p, child->tbs.len, hash )) != 0 ) {
+        log_e("Internal mbedTLS error %X", ret);
+        goto cleanup;
+    }
+
+    if ( (ret = mbedtls_pk_verify_ext( child->sig_pk, child->sig_opts, &parent.pk,
+                                       child->sig_md, hash, mbedtls_md_get_size( md_info ),
+                                       child->sig.p, child->sig.len )) != 0 ) {
+
+        log_e("PK verify failed with error %X", ret);
+        goto cleanup;
+    }
+cleanup:
+    mbedtls_x509_crt_free(&parent);
+
+    return ret;
+}
+
+
+/* This callback is called for every certificate in the chain. If the chain
+ * is proper each intermediate certificate is validated through its parent
+ * in the x509_crt_verify_chain() function. So this callback should
+ * only verify the first untrusted link in the chain is signed by the
+ * root certificate in the trusted bundle
+*/
+int esp_crt_verify_callback(void *buf, mbedtls_x509_crt *crt, int depth, uint32_t *flags)
+{
+    mbedtls_x509_crt *child = crt;
+
+    /* It's OK for a trusted cert to have a weak signature hash alg.
+       as we already trust this certificate */
+    uint32_t flags_filtered = *flags & ~(MBEDTLS_X509_BADCERT_BAD_MD);
+
+    if (flags_filtered != MBEDTLS_X509_BADCERT_NOT_TRUSTED) {
+        return 0;
+    }
+
+
+    if (s_crt_bundle.crts == NULL) {
+        log_e("No certificates in bundle");
+        return MBEDTLS_ERR_X509_FATAL_ERROR;
+    }
+
+    log_d("%d certificates in bundle", s_crt_bundle.num_certs);
+
+    size_t name_len = 0;
+    const uint8_t *crt_name;
+
+    bool crt_found = false;
+    int start = 0;
+    int end = s_crt_bundle.num_certs - 1;
+    int middle = (end - start) / 2;
+
+    /* Look for the certificate using binary search on subject name */
+    while (start <= end) {
+        name_len = s_crt_bundle.crts[middle][0] << 8 | s_crt_bundle.crts[middle][1];
+        crt_name = s_crt_bundle.crts[middle] + CRT_HEADER_OFFSET;
+
+        int cmp_res = memcmp(child->issuer_raw.p, crt_name, name_len );
+        if (cmp_res == 0) {
+            crt_found = true;
+            break;
+        } else if (cmp_res < 0) {
+            end = middle - 1;
+        } else {
+            start = middle + 1;
+        }
+        middle = (start + end) / 2;
+    }
+
+    int ret = MBEDTLS_ERR_X509_FATAL_ERROR;
+    if (crt_found) {
+        size_t key_len = s_crt_bundle.crts[middle][2] << 8 | s_crt_bundle.crts[middle][3];
+        ret = esp_crt_check_signature(child, s_crt_bundle.crts[middle] + CRT_HEADER_OFFSET + name_len, key_len);
+    }
+
+    if (ret == 0) {
+        log_i("Certificate validated");
+        *flags = 0;
+        return 0;
+    }
+
+    log_e("Failed to verify certificate");
+    return MBEDTLS_ERR_X509_FATAL_ERROR;
+}
+
+
+/* Initialize the bundle into an array so we can do binary search for certs,
+   the bundle generated by the python utility is already presorted by subject name
+ */
+static esp_err_t esp_crt_bundle_init(const uint8_t *x509_bundle)
+{
+    s_crt_bundle.num_certs = (x509_bundle[0] << 8) | x509_bundle[1];
+    s_crt_bundle.crts = calloc(s_crt_bundle.num_certs, sizeof(x509_bundle));
+
+    if (s_crt_bundle.crts == NULL) {
+        log_e("Unable to allocate memory for bundle");
+        return ESP_ERR_NO_MEM;
+    }
+
+    const uint8_t *cur_crt;
+    cur_crt = x509_bundle + BUNDLE_HEADER_OFFSET;
+
+    for (int i = 0; i < s_crt_bundle.num_certs; i++) {
+        s_crt_bundle.crts[i] = cur_crt;
+
+        size_t name_len = cur_crt[0] << 8 | cur_crt[1];
+        size_t key_len = cur_crt[2] << 8 | cur_crt[3];
+        cur_crt = cur_crt + CRT_HEADER_OFFSET + name_len + key_len;
+    }
+
+    return ESP_OK;
+}
+
+esp_err_t esp_crt_bundle_attach(void *conf)
+{
+    esp_err_t ret = ESP_OK;
+    // If no bundle has been set by the user then use the bundle embedded in the binary
+    if (s_crt_bundle.crts == NULL) {
+        log_e("Failed to attach bundle");
+        return ret;
+    }
+
+    if (conf) {
+        /* point to a dummy certificate
+         * This is only required so that the
+         * cacert_ptr passes non-NULL check during handshake
+         */
+        mbedtls_ssl_config *ssl_conf = (mbedtls_ssl_config *)conf;
+        mbedtls_x509_crt_init(&s_dummy_crt);
+        mbedtls_ssl_conf_ca_chain(ssl_conf, &s_dummy_crt, NULL);
+        mbedtls_ssl_conf_verify(ssl_conf, esp_crt_verify_callback, NULL);
+    }
+
+    return ret;
+}
+
+void esp_crt_bundle_detach(mbedtls_ssl_config *conf)
+{
+    free(s_crt_bundle.crts);
+    s_crt_bundle.crts = NULL;
+    if (conf) {
+        mbedtls_ssl_conf_verify(conf, NULL, NULL);
+    }
+}
+
+void esp_crt_bundle_set(const uint8_t *x509_bundle)
+{
+    // Free any previously used bundle
+    free(s_crt_bundle.crts);
+    esp_crt_bundle_init(x509_bundle);
+}
diff --git a/libraries/WiFiClientSecure/src/esp_crt_bundle.h b/libraries/WiFiClientSecure/src/esp_crt_bundle.h
new file mode 100644
index 00000000000..33fb98b9969
--- /dev/null
+++ b/libraries/WiFiClientSecure/src/esp_crt_bundle.h
@@ -0,0 +1,68 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _ESP_CRT_BUNDLE_H_
+#define _ESP_CRT_BUNDLE_H_
+
+#include "mbedtls/ssl.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @brief      Attach and enable use of a bundle for certificate verification
+ *
+ * Attach and enable use of a bundle for certificate verification through a verification callback.
+ * If no specific bundle has been set through esp_crt_bundle_set() it will default to the
+ * bundle defined in menuconfig and embedded in the binary.
+ *
+ * @param[in]  conf      The config struct for the SSL connection.
+ *
+ * @return
+ *             - ESP_OK  if adding certificates was successful.
+ *             - Other   if an error occured or an action must be taken by the calling process.
+ */
+esp_err_t esp_crt_bundle_attach(void *conf);
+
+
+/**
+ * @brief      Disable and dealloc the certification bundle
+ *
+ * Removes the certificate verification callback and deallocates used resources
+ *
+ * @param[in]  conf      The config struct for the SSL connection.
+ */
+void esp_crt_bundle_detach(mbedtls_ssl_config *conf);
+
+
+/**
+ * @brief      Set the default certificate bundle used for verification
+ *
+ * Overrides the default certificate bundle. In most use cases the bundle should be
+ * set through menuconfig. The bundle needs to be sorted by subject name since binary search is
+ * used to find certificates.
+ *
+ * @param[in]  x509_bundle     A pointer to the certificate bundle.
+ */
+void esp_crt_bundle_set(const uint8_t *x509_bundle);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_CRT_BUNDLE_H_
diff --git a/libraries/WiFiClientSecure/src/ssl_client.cpp b/libraries/WiFiClientSecure/src/ssl_client.cpp
index 38783aee2e4..6ab9b10570d 100644
--- a/libraries/WiFiClientSecure/src/ssl_client.cpp
+++ b/libraries/WiFiClientSecure/src/ssl_client.cpp
@@ -17,9 +17,10 @@
 #include <algorithm>
 #include <string>
 #include "ssl_client.h"
+#include "esp_crt_bundle.h"
 #include "WiFi.h"
 
-#ifndef MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED
+#if !defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) && !defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
 #  warning "Please configure IDF framework to include mbedTLS -> Enable pre-shared-key ciphersuites and activate at least one cipher"
 #else
 
@@ -53,14 +54,14 @@ void ssl_init(sslclient_context *ssl_client)
 }
 
 
-int start_ssl_client(sslclient_context *ssl_client, const char *host, uint32_t port, int timeout, const char *rootCABuff, const char *cli_cert, const char *cli_key, const char *pskIdent, const char *psKey, bool insecure, const char **alpn_protos)
+int start_ssl_client(sslclient_context *ssl_client, const char *host, uint32_t port, int timeout, const char *rootCABuff, bool useRootCABundle, const char *cli_cert, const char *cli_key, const char *pskIdent, const char *psKey, bool insecure, const char **alpn_protos)
 {
     char buf[512];
     int ret, flags;
     int enable = 1;
     log_v("Free internal heap before TLS %u", ESP.getFreeHeap());
 
-    if (rootCABuff == NULL && pskIdent == NULL && psKey == NULL && !insecure) {
+    if (rootCABuff == NULL && pskIdent == NULL && psKey == NULL && !insecure && !useRootCABundle) {
         return -1;
     }
 
@@ -170,7 +171,7 @@ int start_ssl_client(sslclient_context *ssl_client, const char *host, uint32_t p
 
     if (insecure) {
         mbedtls_ssl_conf_authmode(&ssl_client->ssl_conf, MBEDTLS_SSL_VERIFY_NONE);
-        log_i("WARNING: Skipping SSL Verification. INSECURE!");
+        log_d("WARNING: Skipping SSL Verification. INSECURE!");
     } else if (rootCABuff != NULL) {
         log_v("Loading CA cert");
         mbedtls_x509_crt_init(&ssl_client->ca_cert);
@@ -183,6 +184,13 @@ int start_ssl_client(sslclient_context *ssl_client, const char *host, uint32_t p
             mbedtls_x509_crt_free(&ssl_client->ca_cert);
             return handle_error(ret);
         }
+    } else if (useRootCABundle) {
+        log_v("Attaching root CA cert bundle");
+        ret = esp_crt_bundle_attach(&ssl_client->ssl_conf);
+
+        if (ret < 0) {
+            return handle_error(ret);
+        }
     } else if (pskIdent != NULL && psKey != NULL) {
         log_v("Setting up PSK");
         // convert PSK from hex to binary
@@ -327,8 +335,13 @@ void stop_ssl_socket(sslclient_context *ssl_client, const char *rootCABuff, cons
     mbedtls_ssl_config_free(&ssl_client->ssl_conf);
     mbedtls_ctr_drbg_free(&ssl_client->drbg_ctx);
     mbedtls_entropy_free(&ssl_client->entropy_ctx);
+    
+    // save only interesting field
+    int timeout = ssl_client->handshake_timeout;
     // reset embedded pointers to zero
     memset(ssl_client, 0, sizeof(sslclient_context));
+    
+    ssl_client->handshake_timeout = timeout;
 }
 
 
diff --git a/libraries/WiFiClientSecure/src/ssl_client.h b/libraries/WiFiClientSecure/src/ssl_client.h
index d6be76d18a1..ea89e6bb50a 100644
--- a/libraries/WiFiClientSecure/src/ssl_client.h
+++ b/libraries/WiFiClientSecure/src/ssl_client.h
@@ -29,7 +29,7 @@ typedef struct sslclient_context {
 
 
 void ssl_init(sslclient_context *ssl_client);
-int start_ssl_client(sslclient_context *ssl_client, const char *host, uint32_t port, int timeout, const char *rootCABuff, const char *cli_cert, const char *cli_key, const char *pskIdent, const char *psKey, bool insecure, const char **alpn_protos);
+int start_ssl_client(sslclient_context *ssl_client, const char *host, uint32_t port, int timeout, const char *rootCABuff, bool useRootCABundle, const char *cli_cert, const char *cli_key, const char *pskIdent, const char *psKey, bool insecure, const char **alpn_protos);
 void stop_ssl_socket(sslclient_context *ssl_client, const char *rootCABuff, const char *cli_cert, const char *cli_key);
 int data_to_read(sslclient_context *ssl_client);
 int send_ssl_data(sslclient_context *ssl_client, const uint8_t *data, size_t len);
diff --git a/libraries/WiFiProv/src/WiFiProv.h b/libraries/WiFiProv/src/WiFiProv.h
index 11dfd2e47e1..bbcab41a6f8 100644
--- a/libraries/WiFiProv/src/WiFiProv.h
+++ b/libraries/WiFiProv/src/WiFiProv.h
@@ -17,6 +17,9 @@
     Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */
 
+#ifndef WiFiProv_h
+#define WiFiProv_h
+
 #include "WiFi.h"
 #include "wifi_provisioning/manager.h"
 //Select the scheme using which you want to provision
@@ -48,3 +51,5 @@ class WiFiProvClass
 };
 
 extern WiFiProvClass WiFiProv;
+
+#endif
diff --git a/package.json b/package.json
index 8b4729f1fa5..8204d5e4511 100644
--- a/package.json
+++ b/package.json
@@ -1,6 +1,6 @@
 {
   "name": "framework-arduinoespressif32",
-  "version": "0.0.0",
+  "version": "2.0.3",
   "description": "Arduino Wiring-based Framework for the Espressif ESP32, ESP32-S and ESP32-C series of SoCs",
   "keywords": [
     "framework",
diff --git a/package/package_esp32_index.template.json b/package/package_esp32_index.template.json
index 565baf483bc..3c035f97ce8 100644
--- a/package/package_esp32_index.template.json
+++ b/package/package_esp32_index.template.json
@@ -28,6 +28,9 @@
             {
               "name": "ESP32-S2 Dev Board"
             },
+            {
+              "name": "ESP32-S3 Dev Board"
+            },
             {
               "name": "ESP32-C3 Dev Board"
             }
@@ -36,22 +39,27 @@
             {
               "packager": "esp32",
               "name": "riscv32-esp-elf-gcc",
-              "version": "gcc8_4_0-esp-2021r2"
+              "version": "gcc8_4_0-esp-2021r2-patch3"
             },
             {
               "packager": "esp32",
               "name": "xtensa-esp32-elf-gcc",
-              "version": "gcc8_4_0-esp-2021r2"
+              "version": "gcc8_4_0-esp-2021r2-patch3"
             },
             {
               "packager": "esp32",
               "name": "xtensa-esp32s2-elf-gcc",
-              "version": "gcc8_4_0-esp-2021r2"
+              "version": "gcc8_4_0-esp-2021r2-patch3"
+            },
+            {
+              "packager": "esp32",
+              "name": "xtensa-esp32s3-elf-gcc",
+              "version": "gcc8_4_0-esp-2021r2-patch3"
             },
             {
               "packager": "esp32",
               "name": "esptool_py",
-              "version": "3.1.0"
+              "version": "3.3.0"
             },
             {
               "packager": "esp32",
@@ -69,214 +77,276 @@
       "tools": [
         {
           "name": "riscv32-esp-elf-gcc",
-          "version": "gcc8_4_0-esp-2021r2",
+          "version": "gcc8_4_0-esp-2021r2-patch3",
           "systems": [
             {
               "host": "x86_64-pc-linux-gnu",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/riscv32-esp-elf-gcc8_4_0-esp-2021r2-linux-amd64.tar.gz",
-              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-linux-amd64.tar.gz",
-              "checksum": "SHA-256:812d735063da9d063b374b59f55832a96c41fbd27ddaef19000a75de8607ba21",
-              "size": "106837189"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-linux-amd64.tar.gz",
+              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-linux-amd64.tar.gz",
+              "checksum": "SHA-256:179cbad579790ad35e0f414a18d90017c0f158c397022411a8e9867db2174f15",
+              "size": "106843321"
             },
             {
               "host": "aarch64-linux-gnu",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/riscv32-esp-elf-gcc8_4_0-esp-2021r2-linux-arm64.tar.gz",
-              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-linux-arm64.tar.gz",
-              "checksum": "SHA-256:712f1fbc3e08304a6f32aa18b346b16bbcb413b507b3d4c7c3211bf0d7dc4813",
-              "size": "103273444"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-linux-arm64.tar.gz",
+              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-linux-arm64.tar.gz",
+              "checksum": "SHA-256:fb339d476c79c76db8f903b265cab6bb6950d5ed954dec644445252d3378023c",
+              "size": "103277393"
             },
             {
               "host": "arm-linux-gnueabihf",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/riscv32-esp-elf-gcc8_4_0-esp-2021r2-linux-armel.tar.gz",
-              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-linux-armel.tar.gz",
-              "checksum": "SHA-256:80a3342cda2cd4b6b75ebb2b36d5d12fce7d375cfadadcff01ec3a907f0a16a2",
-              "size": "103058744"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-linux-armel.tar.gz",
+              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-linux-armel.tar.gz",
+              "checksum": "SHA-256:51a6296d8334b7452dba44b2b62e87afd7fd1c74bafa1aa29b1f4ab72cb9e5e0",
+              "size": "103062256"
             },
             {
               "host": "i686-pc-linux-gnu",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/riscv32-esp-elf-gcc8_4_0-esp-2021r2-linux-i686.tar.gz",
-              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-linux-i686.tar.gz",
-              "checksum": "SHA-256:7f0162a81558ab0ed09d6c5d356def25b5cb3d5c2d61358f20152fa260ccc8ae",
-              "size": "109447789"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-linux-i686.tar.gz",
+              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-linux-i686.tar.gz",
+              "checksum": "SHA-256:fef60f7ef37ffaa50416d8f244cdbd710d6729dae41ef06c4ec0e50a1f3b7dd7",
+              "size": "109460025"
             },
             {
               "host": "x86_64-apple-darwin",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/riscv32-esp-elf-gcc8_4_0-esp-2021r2-macos.tar.gz",
-              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-macos.tar.gz",
-              "checksum": "SHA-256:3ff7e5427907cf8e271c1f959b70fb01e39625c3caf61a6567e7b38aa0c11578",
-              "size": "113672945"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-macos.tar.gz",
+              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-macos.tar.gz",
+              "checksum": "SHA-256:4aacc1742a76349d790b1ac8e9e9d963daefda5346dbd6741cfe8e7a35a44e4e",
+              "size": "113703959"
             },
             {
               "host": "i686-mingw32",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/riscv32-esp-elf-gcc8_4_0-esp-2021r2-win32.zip",
-              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-win32.zip",
-              "checksum": "SHA-256:c8ff08883c1456c278fad85e1c43b7c6e251d525683214168655550e85c5b82e",
-              "size": "140809778"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-win32.zip",
+              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-win32.zip",
+              "checksum": "SHA-256:eb2a442d7f551ebeb842995ec372ec4b364314ca2d7aae779399a74972f7d6bc",
+              "size": "144711970"
             },
             {
               "host": "x86_64-mingw32",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/riscv32-esp-elf-gcc8_4_0-esp-2021r2-win64.zip",
-              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-win64.zip",
-              "checksum": "SHA-256:6c04cb4728db928ec6473e63146b695b6dec686a0d40dd73dd3353f05247b19e",
-              "size": "142365782"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-win64.zip",
+              "archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r2-patch3-win64.zip",
+              "checksum": "SHA-256:f5607e5187317d521f0474cade83f8eb590f2d165d95c3779b6ce11fbac21d1f",
+              "size": "146606480"
             }
           ]
         },
         {
           "name": "xtensa-esp32-elf-gcc",
-          "version": "gcc8_4_0-esp-2021r2",
+          "version": "gcc8_4_0-esp-2021r2-patch3",
           "systems": [
             {
               "host": "x86_64-pc-linux-gnu",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-linux-amd64.tar.gz",
-              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-linux-amd64.tar.gz",
-              "checksum": "SHA-256:3eb3d68b27fa6ba5af6f88da21cb8face9be0094daaa8960793cfe570ab785ff",
-              "size": "90565318"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-linux-amd64.tar.gz",
+              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-linux-amd64.tar.gz",
+              "checksum": "SHA-256:9edd1e77627688f435561922d14299f6a0021ba1f6ff67e472e1108695a69e53",
+              "size": "90569312"
             },
             {
               "host": "aarch64-linux-gnu",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-linux-arm64.tar.gz",
-              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-linux-arm64.tar.gz",
-              "checksum": "SHA-256:aa534be24e45e06b7080a6a3bb8cd9e3cfb818f5f8bce2244d7cfb5e91336541",
-              "size": "86860292"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-linux-arm64.tar.gz",
+              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-linux-arm64.tar.gz",
+              "checksum": "SHA-256:3a21a3e310e6b1e7d7bed1f3e59698a5bd29ed3a5ca79fba9265d7dd2f1e0cd2",
+              "size": "86838362"
             },
             {
               "host": "arm-linux-gnueabihf",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-linux-armel.tar.gz",
-              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-linux-armel.tar.gz",
-              "checksum": "SHA-256:f0e49ce06fe7833ff5d76961dc2dac5449d320f823bb8c05a302cf85a3a6eb04",
-              "size": "86183421"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-linux-armel.tar.gz",
+              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-linux-armel.tar.gz",
+              "checksum": "SHA-256:89313c4c1d8db1b01624f31b58bf3fbe527160569828ac4301e9daa75c52716d",
+              "size": "86187540"
             },
             {
               "host": "i686-pc-linux-gnu",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-linux-i686.tar.gz",
-              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-linux-i686.tar.gz",
-              "checksum": "SHA-256:06de09b74652de43e5b22db3b7fc992623044baa75e9faaab68317a986715ba3",
-              "size": "92582250"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-linux-i686.tar.gz",
+              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-linux-i686.tar.gz",
+              "checksum": "SHA-256:a1f165a836f175daa6fbfde4ca99cb93b377f021fbfc41f79a700bd4df965a9a",
+              "size": "92580267"
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             {
               "host": "x86_64-apple-darwin",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-macos.tar.gz",
-              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-macos.tar.gz",
-              "checksum": "SHA-256:96443f69c8569417c780ee749d91ef33cffe22153fffa30a0fbf12107d87381b",
-              "size": "97808961"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-macos.tar.gz",
+              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-macos.tar.gz",
+              "checksum": "SHA-256:dda3d7a43efd995d9a51d5a5741626dbf915df46078aef0b5aea7163ac82398b",
+              "size": "97807647"
             },
             {
               "host": "i686-mingw32",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-win32.zip",
-              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-win32.zip",
-              "checksum": "SHA-256:076a4171bdc33e5ced3952efffb233d70263dfa760e636704050597a9edf61db",
-              "size": "112578260"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-win32.zip",
+              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-win32.zip",
+              "checksum": "SHA-256:fd147592928ef2d7092ba34b01ecd776fe26ba3d7e3f9b6b215a3b46e981ee2c",
+              "size": "116464819"
             },
             {
               "host": "x86_64-mingw32",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-win64.zip",
-              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-win64.zip",
-              "checksum": "SHA-256:c35b7998f7f503e0cb22055d1e279ae14b6b0e09bb3ff3846b17d552ece9c247",
-              "size": "115278695"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-win64.zip",
+              "archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r2-patch3-win64.zip",
+              "checksum": "SHA-256:9395315c07de0b9f05c9a6616ba1f05e76ab651053f2f40479163a8e03cfa830",
+              "size": "119511910"
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           ]
         },
         {
           "name": "xtensa-esp32s2-elf-gcc",
-          "version": "gcc8_4_0-esp-2021r2",
+          "version": "gcc8_4_0-esp-2021r2-patch3",
           "systems": [
             {
               "host": "x86_64-pc-linux-gnu",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-linux-amd64.tar.gz",
-              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-linux-amd64.tar.gz",
-              "checksum": "SHA-256:a6e0947c92b823ca04f062522249f0a428357e0b056f1ff4c6bcabef83cf63a7",
-              "size": "90901736"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-linux-amd64.tar.gz",
+              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-linux-amd64.tar.gz",
+              "checksum": "SHA-256:a32451a8edc1104b83cd9971178e61826e957d7db9ad9f81798a8969fd5a954e",
+              "size": "90894048"
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               "host": "aarch64-linux-gnu",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-linux-arm64.tar.gz",
-              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-linux-arm64.tar.gz",
-              "checksum": "SHA-256:d2e5600fc194b508bd393b236a09fd62ed70afb6c36619d4b106b696a56ca66d",
-              "size": "87176557"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-linux-arm64.tar.gz",
+              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-linux-arm64.tar.gz",
+              "checksum": "SHA-256:2ac2c94a533a99a091d2159c678c611c712c494b5f68d97913254712047260f9",
+              "size": "87178224"
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             {
               "host": "arm-linux-gnueabihf",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-linux-armel.tar.gz",
-              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-linux-armel.tar.gz",
-              "checksum": "SHA-256:3fff4199e986dd74660f17ca27d9414cb98f1b911a7f13bb3b22e784cb1156cf",
-              "size": "86581102"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-linux-armel.tar.gz",
+              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-linux-armel.tar.gz",
+              "checksum": "SHA-256:da49afee1e2e03eaab3f492718789442d33b562800e2a892679f95b50be24d14",
+              "size": "86569314"
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             {
               "host": "i686-pc-linux-gnu",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-linux-i686.tar.gz",
-              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-linux-i686.tar.gz",
-              "checksum": "SHA-256:7732f9fb371d36b6b324820e300beecc33c2719921a61cf1cdb5bc625016b346",
-              "size": "92875986"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-linux-i686.tar.gz",
+              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-linux-i686.tar.gz",
+              "checksum": "SHA-256:36d3c4990a5feb68aa8534463bc9e8ee367fe23886f78e1d726f4411c7571462",
+              "size": "92884013"
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             {
               "host": "x86_64-apple-darwin",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-macos.tar.gz",
-              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-macos.tar.gz",
-              "checksum": "SHA-256:e6dd32782fcff8f633299b97d1c671d6b6513390aca2ddbd7543c2cc62e72d7e",
-              "size": "98212907"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-macos.tar.gz",
+              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-macos.tar.gz",
+              "checksum": "SHA-256:de9af641678c93775e932ee5ec4f478f8925cfc1ebc22e41adc4fb85430a0c35",
+              "size": "98224709"
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             {
               "host": "i686-mingw32",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-win32.zip",
-              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-win32.zip",
-              "checksum": "SHA-256:41b917b35f6fbe7d30b7de91c32cf348c406acfa729a1eabc450d040dc46fbe2",
-              "size": "113022469"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-win32.zip",
+              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-win32.zip",
+              "checksum": "SHA-256:ccf08afe60046f87b0e81ca17dc5073eda68ab5e7522c163dd5b583d713b7b39",
+              "size": "116924759"
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             {
               "host": "x86_64-mingw32",
-              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-win64.zip",
-              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-win64.zip",
-              "checksum": "SHA-256:a764c1a0ee743d69f8cbfadbe4426a2c15c0e233b0894244c7cadf3b4d7dd32a",
-              "size": "115696999"
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-win64.zip",
+              "archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r2-patch3-win64.zip",
+              "checksum": "SHA-256:37c91490b8fc75e638c23785e261eaf553be2dcd106cf6cff5b76981fa02955b",
+              "size": "119912142"
+            }
+          ]
+        },
+        {
+          "name": "xtensa-esp32s3-elf-gcc",
+          "version": "gcc8_4_0-esp-2021r2-patch3",
+          "systems": [
+            {
+              "host": "x86_64-pc-linux-gnu",
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-linux-amd64.tar.gz",
+              "archiveFileName": "xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-linux-amd64.tar.gz",
+              "checksum": "SHA-256:59b271d014ff3915b6db1b43b610a45eea15fe5d6877d12cae8a191cc996ed37",
+              "size": "90903617"
+            },
+            {
+              "host": "aarch64-linux-gnu",
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-linux-arm64.tar.gz",
+              "archiveFileName": "xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-linux-arm64.tar.gz",
+              "checksum": "SHA-256:7051b32483e61f98606d71c98e372929428a5165df791dcd5830ed9517763152",
+              "size": "87065204"
+            },
+            {
+              "host": "arm-linux-gnueabihf",
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-linux-armel.tar.gz",
+              "archiveFileName": "xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-linux-armel.tar.gz",
+              "checksum": "SHA-256:48c8dbbf96eec691a812327dc580042d9718fe989e60c2111ebfd692ac710081",
+              "size": "86455731"
+            },
+            {
+              "host": "i686-pc-linux-gnu",
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-linux-i686.tar.gz",
+              "archiveFileName": "xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-linux-i686.tar.gz",
+              "checksum": "SHA-256:552dca3f4302ab7ca88a934b0391200198c9d10a4d8ac413fe604cbf8601f950",
+              "size": "92906274"
+            },
+            {
+              "host": "x86_64-apple-darwin",
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-macos.tar.gz",
+              "archiveFileName": "xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-macos.tar.gz",
+              "checksum": "SHA-256:e5af78f05d3af07617805d06ebb45ff2fe9b6aed6970a84c35eea28a5d8d5e53",
+              "size": "98553473"
+            },
+            {
+              "host": "i686-mingw32",
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-win32.zip",
+              "archiveFileName": "xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-win32.zip",
+              "checksum": "SHA-256:1b70163acccc5655449de1d149427a54f384156bd35816ec60c422d76d033f05",
+              "size": "116847008"
+            },
+            {
+              "host": "x86_64-mingw32",
+              "url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r2-patch3/xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-win64.zip",
+              "archiveFileName": "xtensa-esp32s3-elf-gcc8_4_0-esp-2021r2-patch3-win64.zip",
+              "checksum": "SHA-256:58e58575d1938879fd51e822181e54bcb343aa846eb3fca8f616c2cde7bd0041",
+              "size": "120066269"
             }
           ]
         },
         {
           "name": "esptool_py",
-          "version": "3.1.0",
+          "version": "3.3.0",
           "systems": [
             {
               "host": "i686-mingw32",
-              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.0-alpha1/esptool-3.1.0-windows.zip",
-              "archiveFileName": "esptool-3.1.0-windows.zip",
-              "checksum": "SHA-256:c9b4f9bc6e94db136c2545c87c00c7ab1441644ca0bac50811bc3c014e22514b",
-              "size": "7411889"
+              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.2/esptool-3.3-windows.zip",
+              "archiveFileName": "esptool-3.3-windows.zip",
+              "checksum": "SHA-256:55a1d7165414bf4dbd2bb16ca094e555d671958450f5d1536b457a518d2b15df",
+              "size": "7436864"
+            },
+            {
+              "host": "x86_64-mingw32",
+              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.2/esptool-3.3-windows.zip",
+              "archiveFileName": "esptool-3.3-windows.zip",
+              "checksum": "SHA-256:55a1d7165414bf4dbd2bb16ca094e555d671958450f5d1536b457a518d2b15df",
+              "size": "7436864"
             },
             {
               "host": "x86_64-apple-darwin",
-              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.0-alpha1/esptool-3.1.0-macos.tar.gz",
-              "archiveFileName": "esptool-3.1.0-macos.tar.gz",
-              "checksum": "SHA-256:1dffcb884665fb616779aea62a68f517aac251ea6dfe95560906c364d6ef3065",
-              "size": "6776909"
+              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.2/esptool-3.3-macos.tar.gz",
+              "archiveFileName": "esptool-3.3-macos.tar.gz",
+              "checksum": "SHA-256:3e5f7b521ae33c8c63f3b48efc909c08f37bef1a083c0eafa408312c09900afd",
+              "size": "6944975"
             },
             {
               "host": "x86_64-pc-linux-gnu",
-              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.0-alpha1/esptool-3.1.0-linux.tar.gz",
-              "archiveFileName": "esptool-3.1.0-linux.tar.gz",
-              "checksum": "SHA-256:15eca9896a30e804aa24be6f7a06e39397541b8b09a7a4c48deb65f826e7baad",
-              "size": "80550"
+              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.2/esptool-3.3-linux.tar.gz",
+              "archiveFileName": "esptool-3.3-linux.tar.gz",
+              "checksum": "SHA-256:fbe91a49e5f5deca4881f5eed32e8903faf97bfd365fe2d0d1512b80bdb67f5e",
+              "size": "97026"
             },
             {
               "host": "i686-pc-linux-gnu",
-              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.0-alpha1/esptool-3.1.0-linux.tar.gz",
-              "archiveFileName": "esptool-3.1.0-linux.tar.gz",
-              "checksum": "SHA-256:15eca9896a30e804aa24be6f7a06e39397541b8b09a7a4c48deb65f826e7baad",
-              "size": "80550"
+              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.2/esptool-3.3-linux.tar.gz",
+              "archiveFileName": "esptool-3.3-linux.tar.gz",
+              "checksum": "SHA-256:fbe91a49e5f5deca4881f5eed32e8903faf97bfd365fe2d0d1512b80bdb67f5e",
+              "size": "97026"
             },
             {
               "host": "arm-linux-gnueabihf",
-              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.0-alpha1/esptool-3.1.0-linux.tar.gz",
-              "archiveFileName": "esptool-3.1.0-linux.tar.gz",
-              "checksum": "SHA-256:15eca9896a30e804aa24be6f7a06e39397541b8b09a7a4c48deb65f826e7baad",
-              "size": "80550"
+              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.2/esptool-3.3-linux.tar.gz",
+              "archiveFileName": "esptool-3.3-linux.tar.gz",
+              "checksum": "SHA-256:fbe91a49e5f5deca4881f5eed32e8903faf97bfd365fe2d0d1512b80bdb67f5e",
+              "size": "97026"
             },
             {
               "host": "aarch64-linux-gnu",
-              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.0-alpha1/esptool-3.1.0-linux.tar.gz",
-              "archiveFileName": "esptool-3.1.0-linux.tar.gz",
-              "checksum": "SHA-256:15eca9896a30e804aa24be6f7a06e39397541b8b09a7a4c48deb65f826e7baad",
-              "size": "80550"
+              "url": "https://github.com/espressif/arduino-esp32/releases/download/2.0.2/esptool-3.3-linux.tar.gz",
+              "archiveFileName": "esptool-3.3-linux.tar.gz",
+              "checksum": "SHA-256:fbe91a49e5f5deca4881f5eed32e8903faf97bfd365fe2d0d1512b80bdb67f5e",
+              "size": "97026"
             }
           ]
         },
diff --git a/platform.txt b/platform.txt
index 2a8a3283b1d..351889e1a22 100644
--- a/platform.txt
+++ b/platform.txt
@@ -1,8 +1,9 @@
 name=ESP32 Arduino
-version=2.0.0
+version=2.0.3
 
 runtime.tools.xtensa-esp32-elf-gcc.path={runtime.platform.path}/tools/xtensa-esp32-elf
 runtime.tools.xtensa-esp32s2-elf-gcc.path={runtime.platform.path}/tools/xtensa-esp32s2-elf
+runtime.tools.xtensa-esp32s3-elf-gcc.path={runtime.platform.path}/tools/xtensa-esp32s3-elf
 runtime.tools.riscv32-esp-elf-gcc.path={runtime.platform.path}/tools/riscv32-esp-elf
 
 tools.esptool_py.path={runtime.platform.path}/tools/esptool
@@ -10,10 +11,13 @@ tools.esptool_py.cmd=esptool
 tools.esptool_py.cmd.linux=esptool.py
 tools.esptool_py.cmd.windows=esptool.exe
 
-tools.esptool_py.network_cmd=python "{runtime.platform.path}/tools/espota.py" -r
+tools.esptool_py.network_cmd=python3 "{runtime.platform.path}/tools/espota.py" -r
 tools.esptool_py.network_cmd.windows="{runtime.platform.path}/tools/espota.exe" -r
 
-tools.gen_esp32part.cmd=python "{runtime.platform.path}/tools/gen_esp32part.py"
+tools.esp_ota.cmd=python3 "{runtime.platform.path}/tools/espota.py" -r
+tools.esp_ota.cmd.windows="{runtime.platform.path}/tools/espota.exe" -r
+
+tools.gen_esp32part.cmd=python3 "{runtime.platform.path}/tools/gen_esp32part.py"
 tools.gen_esp32part.cmd.windows="{runtime.platform.path}/tools/gen_esp32part.exe"
 
 compiler.path={runtime.tools.{build.tarch}-{build.target}-elf-gcc.path}/bin/
@@ -23,29 +27,44 @@ compiler.prefix={build.tarch}-{build.target}-elf-
 #
 # ESP32 Support Start
 #
-compiler.cpreprocessor.flags.esp32=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-beta1-189-ga79dc75f0a" -DESP_PLATFORM -D_POSIX_READER_WRITER_LOCKS   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions/freertos" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc/esp32" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32" "-I{compiler.sdk.path}/include/soc/esp32/include" "-I{compiler.sdk.path}/include/hal/esp32/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/include/esp32" "-I{compiler.sdk.path}/include/esp_rom/esp32" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32/include" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/esp_supplicant/include" "-I{compiler.sdk.path}/include/ieee802154/include" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32/include" "-I{compiler.sdk.path}/include/bt/common/api/include/api" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/blufi/include" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/button/button/include" "-I{compiler.sdk.path}/include/json_parser" "-I{compiler.sdk.path}/include/json_parser/jsmn/include" "-I{compiler.sdk.path}/include/json_generator" "-I{compiler.sdk.path}/include/esp_schedule/include" "-I{compiler.sdk.path}/include/esp_rainmaker/include" "-I{compiler.sdk.path}/include/qrcode/include" "-I{compiler.sdk.path}/include/ws2812_led" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf_imu13states/include" "-I{compiler.sdk.path}/include/esp-face/include" "-I{compiler.sdk.path}/include/esp-face/include/tool" "-I{compiler.sdk.path}/include/esp-face/include/typedef" "-I{compiler.sdk.path}/include/esp-face/include/image" "-I{compiler.sdk.path}/include/esp-face/include/math" "-I{compiler.sdk.path}/include/esp-face/include/nn" "-I{compiler.sdk.path}/include/esp-face/include/layer" "-I{compiler.sdk.path}/include/esp-face/include/detect" "-I{compiler.sdk.path}/include/esp-face/include/model_zoo" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
-compiler.c.elf.libs.esp32=-lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lperfmon -lspiffs -lulp -lwifi_provisioning -lbutton -ljson_parser -ljson_generator -lesp_schedule -lesp_rainmaker -lqrcode -lws2812_led -lesp-dsp -lesp32-camera -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_lcd -lesp_local_ctrl -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lperfmon -lesp_adc_cal -lesp_hid -lfatfs -lwear_levelling -lopenssl -lspiffs -lesp_rainmaker -lmqtt -lwifi_provisioning -lprotocomm -lbt -lbtdm_app -lprotobuf-c -lmdns -ljson -ljson_parser -ljson_generator -lesp_schedule -lqrcode -lcat_face_detect -lhuman_face_detect -lcolor_detect -lmfn -ldl -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lesp_phy -lphy -lrtc -lesp_phy -lphy -lrtc -lxt_hal -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
+compiler.cpreprocessor.flags.esp32=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4.1-1-gb8050b365e" -DESP_PLATFORM -D_POSIX_READER_WRITER_LOCKS   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions/freertos" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc/esp32" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32" "-I{compiler.sdk.path}/include/soc/esp32/include" "-I{compiler.sdk.path}/include/hal/esp32/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/include/esp32" "-I{compiler.sdk.path}/include/esp_rom/esp32" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32/include" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/esp_supplicant/include" "-I{compiler.sdk.path}/include/ieee802154/include" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32/include" "-I{compiler.sdk.path}/include/bt/common/api/include/api" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/blufi/include" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/button/button/include" "-I{compiler.sdk.path}/include/rmaker_common/include" "-I{compiler.sdk.path}/include/json_parser/upstream/include" "-I{compiler.sdk.path}/include/json_parser/upstream" "-I{compiler.sdk.path}/include/json_generator/upstream" "-I{compiler.sdk.path}/include/esp_schedule/include" "-I{compiler.sdk.path}/include/esp_rainmaker/include" "-I{compiler.sdk.path}/include/qrcode/include" "-I{compiler.sdk.path}/include/ws2812_led" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf_imu13states/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dl/include" "-I{compiler.sdk.path}/include/esp-dl/include/tool" "-I{compiler.sdk.path}/include/esp-dl/include/typedef" "-I{compiler.sdk.path}/include/esp-dl/include/image" "-I{compiler.sdk.path}/include/esp-dl/include/math" "-I{compiler.sdk.path}/include/esp-dl/include/nn" "-I{compiler.sdk.path}/include/esp-dl/include/layer" "-I{compiler.sdk.path}/include/esp-dl/include/detect" "-I{compiler.sdk.path}/include/esp-dl/include/model_zoo" "-I{compiler.sdk.path}/include/esp-sr/esp-tts/esp_tts_chinese/include" "-I{compiler.sdk.path}/include/esp-sr/include/esp32" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
+compiler.c.elf.libs.esp32=-lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lperfmon -lspiffs -lulp -lwifi_provisioning -lbutton -lrmaker_common -ljson_parser -ljson_generator -lesp_schedule -lesp_rainmaker -lqrcode -lws2812_led -lesp-dsp -lesp-sr -lesp32-camera -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_lcd -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lperfmon -lesp_adc_cal -lesp_hid -lfatfs -lwear_levelling -lopenssl -lesp_rainmaker -lesp_local_ctrl -lwifi_provisioning -lprotocomm -lbt -lbtdm_app -lprotobuf-c -lmdns -lrmaker_common -lmqtt -ljson_parser -ljson_generator -lesp_schedule -lqrcode -lcat_face_detect -lhuman_face_detect -lcolor_detect -lmfn -ldl -lwakenet -lmultinet -lesp_audio_processor -lesp_audio_front_end -lesp-sr -lwakenet -lmultinet -lesp_audio_processor -lesp_audio_front_end -ljson -lspiffs -ldl_lib -lc_speech_features -lhilexin_wn5 -lhilexin_wn5X2 -lhilexin_wn5X3 -lnihaoxiaozhi_wn5 -lnihaoxiaozhi_wn5X2 -lnihaoxiaozhi_wn5X3 -lnihaoxiaoxin_wn5X3 -lcustomized_word_wn5 -lmultinet2_ch -lesp_tts_chinese -lvoice_set_xiaole -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lesp_phy -lphy -lrtc -lesp_phy -lphy -lrtc -lxt_hal -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
 compiler.c.flags.esp32=-mlongcalls -Wno-frame-address -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu99 -Wno-old-style-declaration  -MMD -c
 compiler.cpp.flags.esp32=-mlongcalls -Wno-frame-address -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu++11 -fexceptions -fno-rtti  -MMD -c
 compiler.S.flags.esp32=-ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion  -x assembler-with-cpp -MMD -c
-compiler.c.elf.flags.esp32=-T esp32.rom.redefined.ld -T memory.ld -T sections.ld -T esp32.rom.ld -T esp32.rom.api.ld -T esp32.rom.libgcc.ld -T esp32.rom.newlib-data.ld -T esp32.rom.syscalls.ld -T esp32.peripherals.ld  -mlongcalls -Wno-frame-address -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u ld_include_hli_vectors_bt -u _Z5setupv -u _Z4loopv -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u pthread_include_pthread_rwlock_impl -u ld_include_highint_hdl -u start_app -u start_app_other_cores -u __ubsan_include -Wl,--wrap=longjmp -u __assert_func -u vfs_include_syscalls_impl -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u newlib_include_assert_impl -u __cxa_guard_dummy 
+compiler.c.elf.flags.esp32=-T esp32.rom.redefined.ld -T memory.ld -T sections.ld -T esp32.rom.ld -T esp32.rom.api.ld -T esp32.rom.libgcc.ld -T esp32.rom.newlib-data.ld -T esp32.rom.syscalls.ld -T esp32.peripherals.ld  -mlongcalls -Wno-frame-address -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u ld_include_hli_vectors_bt -u _Z5setupv -u _Z4loopv -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u pthread_include_pthread_rwlock_impl -u include_esp_phy_override -u ld_include_highint_hdl -u start_app -u start_app_other_cores -u __ubsan_include -Wl,--wrap=longjmp -u __assert_func -u vfs_include_syscalls_impl -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u newlib_include_assert_impl -u __cxa_guard_dummy 
 compiler.ar.flags.esp32=cr
 build.extra_flags.esp32=-DARDUINO_USB_CDC_ON_BOOT=0
 #
 # ESP32 Support End
 #
 
+#
+# ESP32S3 Support Start
+#
+compiler.cpreprocessor.flags.esp32s3=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4.1-1-gb8050b365e" -DESP_PLATFORM -D_POSIX_READER_WRITER_LOCKS   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions/freertos" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc/esp32s3" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s3" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s3/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32s3" "-I{compiler.sdk.path}/include/soc/esp32s3/include" "-I{compiler.sdk.path}/include/hal/esp32s3/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/include/esp32s3" "-I{compiler.sdk.path}/include/esp_rom/esp32s3" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32s3/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32s3/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32s3/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32s3/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32s3" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/esp_supplicant/include" "-I{compiler.sdk.path}/include/ieee802154/include" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32s3/include" "-I{compiler.sdk.path}/include/bt/common/api/include/api" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/blufi/include" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/mesh_common/include" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/mesh_core" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/mesh_core/include" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/mesh_core/storage" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/btc/include" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/mesh_models/common/include" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/mesh_models/client/include" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/mesh_models/server/include" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/api/core/include" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/api/models/include" "-I{compiler.sdk.path}/include/bt/esp_ble_mesh/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32s3" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/usb/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/button/button/include" "-I{compiler.sdk.path}/include/rmaker_common/include" "-I{compiler.sdk.path}/include/json_parser/upstream/include" "-I{compiler.sdk.path}/include/json_parser/upstream" "-I{compiler.sdk.path}/include/json_generator/upstream" "-I{compiler.sdk.path}/include/esp_schedule/include" "-I{compiler.sdk.path}/include/esp_rainmaker/include" "-I{compiler.sdk.path}/include/qrcode/include" "-I{compiler.sdk.path}/include/ws2812_led" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf_imu13states/include" "-I{compiler.sdk.path}/include/freertos/include/freertos" "-I{compiler.sdk.path}/include/arduino_tinyusb/tinyusb/src" "-I{compiler.sdk.path}/include/arduino_tinyusb/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dl/include" "-I{compiler.sdk.path}/include/esp-dl/include/tool" "-I{compiler.sdk.path}/include/esp-dl/include/typedef" "-I{compiler.sdk.path}/include/esp-dl/include/image" "-I{compiler.sdk.path}/include/esp-dl/include/math" "-I{compiler.sdk.path}/include/esp-dl/include/nn" "-I{compiler.sdk.path}/include/esp-dl/include/layer" "-I{compiler.sdk.path}/include/esp-dl/include/detect" "-I{compiler.sdk.path}/include/esp-dl/include/model_zoo" "-I{compiler.sdk.path}/include/esp-sr/esp-tts/esp_tts_chinese/include" "-I{compiler.sdk.path}/include/esp-sr/include/esp32s3" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
+compiler.c.elf.libs.esp32s3=-lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lperfmon -lspiffs -lusb -lulp -lwifi_provisioning -lbutton -lrmaker_common -ljson_parser -ljson_generator -lesp_schedule -lesp_rainmaker -lqrcode -lws2812_led -lesp-dsp -lesp-sr -lesp32-camera -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_lcd -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lperfmon -lusb -lesp_adc_cal -lesp_hid -lfatfs -lwear_levelling -lopenssl -lesp_rainmaker -lesp_local_ctrl -lesp_https_server -lwifi_provisioning -lprotocomm -lbt -lbtdm_app -lprotobuf-c -lmdns -lrmaker_common -lmqtt -ljson_parser -ljson_generator -lesp_schedule -lqrcode -larduino_tinyusb -lcat_face_detect -lhuman_face_detect -lcolor_detect -lmfn -ldl -lwakenet -lhufzip -lesp_audio_front_end -lesp_audio_processor -lmultinet -lesp-sr -lwakenet -lhufzip -lesp_audio_front_end -lesp_audio_processor -lmultinet -ljson -lspiffs -ldl_lib -lc_speech_features -lesp_tts_chinese -lvoice_set_xiaole -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lbtbb -lesp_phy -lphy -lbtbb -lesp_phy -lphy -lbtbb -lxt_hal -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
+compiler.c.flags.esp32s3=-mlongcalls -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu99 -Wno-old-style-declaration  -MMD -c
+compiler.cpp.flags.esp32s3=-mlongcalls -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu++11 -fexceptions -fno-rtti  -MMD -c
+compiler.S.flags.esp32s3=-ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion  -x assembler-with-cpp -MMD -c
+compiler.c.elf.flags.esp32s3=-T memory.ld -T sections.ld -T esp32s3.rom.ld -T esp32s3.rom.api.ld -T esp32s3.rom.libgcc.ld -T esp32s3.rom.newlib.ld -T esp32s3.rom.version.ld -T esp32s3.rom.newlib-time.ld -T esp32s3.peripherals.ld  -mlongcalls -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u _Z5setupv -u _Z4loopv -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u pthread_include_pthread_rwlock_impl -u include_esp_phy_override -u ld_include_highint_hdl -u start_app -u start_app_other_cores -u __ubsan_include -Wl,--wrap=longjmp -u __assert_func -u vfs_include_syscalls_impl -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u newlib_include_assert_impl -u __cxa_guard_dummy 
+compiler.ar.flags.esp32s3=cr
+build.extra_flags.esp32s3=-DARDUINO_USB_MODE={build.usb_mode} -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot}
+#
+# ESP32S3 Support End
+#
+
 #
 # ESP32S2 Support Start
 #
-compiler.cpreprocessor.flags.esp32s2=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-beta1-189-ga79dc75f0a" -DESP_PLATFORM -D_POSIX_READER_WRITER_LOCKS   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions/freertos" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc/esp32s2" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32s2" "-I{compiler.sdk.path}/include/soc/esp32s2/include" "-I{compiler.sdk.path}/include/hal/esp32s2/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/include/esp32s2" "-I{compiler.sdk.path}/include/esp_rom/esp32s2" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32s2/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32s2/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32s2/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32s2/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32s2" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/esp_supplicant/include" "-I{compiler.sdk.path}/include/ieee802154/include" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32s2" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/usb/include" "-I{compiler.sdk.path}/include/touch_element/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/freertos/include/freertos" "-I{compiler.sdk.path}/include/arduino_tinyusb/tinyusb/src" "-I{compiler.sdk.path}/include/arduino_tinyusb/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf_imu13states/include" "-I{compiler.sdk.path}/include/esp-face/include" "-I{compiler.sdk.path}/include/esp-face/include/tool" "-I{compiler.sdk.path}/include/esp-face/include/typedef" "-I{compiler.sdk.path}/include/esp-face/include/image" "-I{compiler.sdk.path}/include/esp-face/include/math" "-I{compiler.sdk.path}/include/esp-face/include/nn" "-I{compiler.sdk.path}/include/esp-face/include/layer" "-I{compiler.sdk.path}/include/esp-face/include/detect" "-I{compiler.sdk.path}/include/esp-face/include/model_zoo" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
-compiler.c.elf.libs.esp32s2=-lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lcbor -lunity -lcmock -lcoap -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lperfmon -lspiffs -lusb -ltouch_element -lulp -lwifi_provisioning -lesp-dsp -lesp32-camera -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_lcd -lesp_local_ctrl -lesp_https_server -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lmqtt -lperfmon -lusb -ltouch_element -lesp_adc_cal -lesp_hid -lfatfs -lwear_levelling -lopenssl -lspiffs -lwifi_provisioning -lprotocomm -lprotobuf-c -lmdns -ljson -larduino_tinyusb -lcat_face_detect -lhuman_face_detect -lcolor_detect -lmfn -ldl -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lesp_phy -lphy -lesp_phy -lphy -lxt_hal -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
+compiler.cpreprocessor.flags.esp32s2=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4.1-1-gb8050b365e" -DESP_PLATFORM -D_POSIX_READER_WRITER_LOCKS   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions/freertos" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc/esp32s2" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32s2" "-I{compiler.sdk.path}/include/soc/esp32s2/include" "-I{compiler.sdk.path}/include/hal/esp32s2/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/include/esp32s2" "-I{compiler.sdk.path}/include/esp_rom/esp32s2" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32s2/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32s2/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32s2/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32s2/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32s2" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/esp_supplicant/include" "-I{compiler.sdk.path}/include/ieee802154/include" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32s2" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/usb/include" "-I{compiler.sdk.path}/include/touch_element/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/button/button/include" "-I{compiler.sdk.path}/include/rmaker_common/include" "-I{compiler.sdk.path}/include/json_parser/upstream/include" "-I{compiler.sdk.path}/include/json_parser/upstream" "-I{compiler.sdk.path}/include/json_generator/upstream" "-I{compiler.sdk.path}/include/esp_schedule/include" "-I{compiler.sdk.path}/include/esp_rainmaker/include" "-I{compiler.sdk.path}/include/qrcode/include" "-I{compiler.sdk.path}/include/ws2812_led" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf_imu13states/include" "-I{compiler.sdk.path}/include/freertos/include/freertos" "-I{compiler.sdk.path}/include/arduino_tinyusb/tinyusb/src" "-I{compiler.sdk.path}/include/arduino_tinyusb/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dl/include" "-I{compiler.sdk.path}/include/esp-dl/include/tool" "-I{compiler.sdk.path}/include/esp-dl/include/typedef" "-I{compiler.sdk.path}/include/esp-dl/include/image" "-I{compiler.sdk.path}/include/esp-dl/include/math" "-I{compiler.sdk.path}/include/esp-dl/include/nn" "-I{compiler.sdk.path}/include/esp-dl/include/layer" "-I{compiler.sdk.path}/include/esp-dl/include/detect" "-I{compiler.sdk.path}/include/esp-dl/include/model_zoo" "-I{compiler.sdk.path}/include/esp-sr/esp-tts/esp_tts_chinese/include" "-I{compiler.sdk.path}/include/esp-sr/include/esp32" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
+compiler.c.elf.libs.esp32s2=-lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lcbor -lunity -lcmock -lcoap -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lperfmon -lspiffs -lusb -ltouch_element -lulp -lwifi_provisioning -lbutton -lrmaker_common -ljson_parser -ljson_generator -lesp_schedule -lesp_rainmaker -lqrcode -lws2812_led -lesp-dsp -lesp-sr -lesp32-camera -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_lcd -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lperfmon -lusb -ltouch_element -lesp_adc_cal -lesp_hid -lfatfs -lwear_levelling -lopenssl -lesp_rainmaker -lesp_local_ctrl -lesp_https_server -lwifi_provisioning -lprotocomm -lprotobuf-c -lmdns -lrmaker_common -lmqtt -ljson_parser -ljson_generator -lesp_schedule -lqrcode -larduino_tinyusb -lcat_face_detect -lhuman_face_detect -lcolor_detect -lmfn -ldl -ljson -lspiffs -lesp_tts_chinese -lvoice_set_xiaole -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lesp_phy -lphy -lesp_phy -lphy -lxt_hal -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
 compiler.c.flags.esp32s2=-mlongcalls -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu99 -Wno-old-style-declaration  -MMD -c
 compiler.cpp.flags.esp32s2=-mlongcalls -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu++11 -fexceptions -fno-rtti  -MMD -c
 compiler.S.flags.esp32s2=-ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion  -x assembler-with-cpp -MMD -c
-compiler.c.elf.flags.esp32s2=-T memory.ld -T sections.ld -T esp32s2.rom.ld -T esp32s2.rom.api.ld -T esp32s2.rom.libgcc.ld -T esp32s2.rom.newlib-funcs.ld -T esp32s2.rom.newlib-data.ld -T esp32s2.rom.spiflash.ld -T esp32s2.peripherals.ld  -mlongcalls -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u _Z5setupv -u _Z4loopv -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u pthread_include_pthread_rwlock_impl -u ld_include_highint_hdl -u start_app -u __ubsan_include -Wl,--wrap=longjmp -u __assert_func -u vfs_include_syscalls_impl -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u newlib_include_assert_impl -u __cxa_guard_dummy 
+compiler.c.elf.flags.esp32s2=-T memory.ld -T sections.ld -T esp32s2.rom.ld -T esp32s2.rom.api.ld -T esp32s2.rom.libgcc.ld -T esp32s2.rom.newlib-funcs.ld -T esp32s2.rom.newlib-data.ld -T esp32s2.rom.spiflash.ld -T esp32s2.rom.newlib-time.ld -T esp32s2.peripherals.ld  -mlongcalls -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u _Z5setupv -u _Z4loopv -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u pthread_include_pthread_rwlock_impl -u include_esp_phy_override -u ld_include_highint_hdl -u start_app -u __ubsan_include -Wl,--wrap=longjmp -u __assert_func -u vfs_include_syscalls_impl -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u newlib_include_assert_impl -u __cxa_guard_dummy 
 compiler.ar.flags.esp32s2=cr
-build.extra_flags.esp32s2=-DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot}
+build.extra_flags.esp32s2=-DARDUINO_USB_MODE=0 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot}
 #
 # ESP32S2 Support End
 #
@@ -53,20 +72,20 @@ build.extra_flags.esp32s2=-DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUIN
 #
 # ESP32C3 Support Start
 #
-compiler.cpreprocessor.flags.esp32c3=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-beta1-189-ga79dc75f0a" -DESP_PLATFORM -D_POSIX_READER_WRITER_LOCKS   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions/freertos" "-I{compiler.sdk.path}/include/freertos/port/riscv/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc/esp32c3" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32c3" "-I{compiler.sdk.path}/include/soc/esp32c3/include" "-I{compiler.sdk.path}/include/hal/esp32c3/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/include/esp32c3" "-I{compiler.sdk.path}/include/esp_rom/esp32c3" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/include/riscv" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/riscv/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32c3/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32c3/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32c3/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/riscv" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32c3" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/riscv" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/esp_supplicant/include" "-I{compiler.sdk.path}/include/ieee802154/include" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32c3/include" "-I{compiler.sdk.path}/include/bt/common/api/include/api" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/blufi/include" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32c3" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-face/include" "-I{compiler.sdk.path}/include/esp-face/include/tool" "-I{compiler.sdk.path}/include/esp-face/include/typedef" "-I{compiler.sdk.path}/include/esp-face/include/image" "-I{compiler.sdk.path}/include/esp-face/include/math" "-I{compiler.sdk.path}/include/esp-face/include/nn" "-I{compiler.sdk.path}/include/esp-face/include/layer" "-I{compiler.sdk.path}/include/esp-face/include/detect" "-I{compiler.sdk.path}/include/esp-face/include/model_zoo" "-I{compiler.sdk.path}/include/fb_gfx/include"
-compiler.c.elf.libs.esp32c3=-lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lspiffs -lwifi_provisioning -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_lcd -lesp_local_ctrl -lesp_https_server -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lmqtt -lesp_adc_cal -lesp_hid -lfatfs -lwear_levelling -lopenssl -lspiffs -lwifi_provisioning -lprotocomm -lbt -lbtdm_app -lprotobuf-c -lmdns -ljson -lcat_face_detect -lhuman_face_detect -lcolor_detect -lmfn -ldl -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lbtbb -lesp_phy -lphy -lbtbb -lesp_phy -lphy -lbtbb -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
-compiler.c.flags.esp32c3=-march=rv32imc -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Os -freorder-blocks -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu99 -Wno-old-style-declaration  -MMD -c
-compiler.cpp.flags.esp32c3=-march=rv32imc -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Os -freorder-blocks -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu++11 -fno-exceptions -fno-rtti  -MMD -c
-compiler.S.flags.esp32c3=-ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Os -freorder-blocks -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion  -x assembler-with-cpp -MMD -c
-compiler.c.elf.flags.esp32c3=-T memory.ld -T sections.ld -T esp32c3.rom.ld -T esp32c3.rom.api.ld -T esp32c3.rom.libgcc.ld -T esp32c3.rom.newlib.ld -T esp32c3.rom.version.ld -T esp32c3.rom.eco3.ld -T esp32c3.peripherals.ld  -nostartfiles -march=rv32imc --specs=nosys.specs -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u _Z5setupv -u _Z4loopv -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u pthread_include_pthread_rwlock_impl -u start_app -u __ubsan_include -u __assert_func -u vfs_include_syscalls_impl -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u newlib_include_assert_impl -Wl,--wrap=_Unwind_SetEnableExceptionFdeSorting -Wl,--wrap=__register_frame_info_bases -Wl,--wrap=__register_frame_info -Wl,--wrap=__register_frame -Wl,--wrap=__register_frame_info_table_bases -Wl,--wrap=__register_frame_info_table -Wl,--wrap=__register_frame_table -Wl,--wrap=__deregister_frame_info_bases -Wl,--wrap=__deregister_frame_info -Wl,--wrap=_Unwind_Find_FDE -Wl,--wrap=_Unwind_GetGR -Wl,--wrap=_Unwind_GetCFA -Wl,--wrap=_Unwind_GetIP -Wl,--wrap=_Unwind_GetIPInfo -Wl,--wrap=_Unwind_GetRegionStart -Wl,--wrap=_Unwind_GetDataRelBase -Wl,--wrap=_Unwind_GetTextRelBase -Wl,--wrap=_Unwind_SetIP -Wl,--wrap=_Unwind_SetGR -Wl,--wrap=_Unwind_GetLanguageSpecificData -Wl,--wrap=_Unwind_FindEnclosingFunction -Wl,--wrap=_Unwind_Resume -Wl,--wrap=_Unwind_RaiseException -Wl,--wrap=_Unwind_DeleteException -Wl,--wrap=_Unwind_ForcedUnwind -Wl,--wrap=_Unwind_Resume_or_Rethrow -Wl,--wrap=_Unwind_Backtrace -Wl,--wrap=__cxa_call_unexpected -Wl,--wrap=__gxx_personality_v0 -u __cxa_guard_dummy -u __cxx_fatal_exception 
+compiler.cpreprocessor.flags.esp32c3=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4.1-1-gb8050b365e" -DESP_PLATFORM -D_POSIX_READER_WRITER_LOCKS   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions/freertos" "-I{compiler.sdk.path}/include/freertos/port/riscv/include" "-I{compiler.sdk.path}/include/freertos/include/esp_additions" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc/esp32c3" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32c3" "-I{compiler.sdk.path}/include/soc/esp32c3/include" "-I{compiler.sdk.path}/include/hal/esp32c3/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/include/esp32c3" "-I{compiler.sdk.path}/include/esp_rom/esp32c3" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/include/riscv" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/riscv/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32c3/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32c3/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32c3/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/riscv" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32c3" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/riscv" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/esp_supplicant/include" "-I{compiler.sdk.path}/include/ieee802154/include" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32c3/include" "-I{compiler.sdk.path}/include/bt/common/api/include/api" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/blufi/include" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32c3" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/button/button/include" "-I{compiler.sdk.path}/include/rmaker_common/include" "-I{compiler.sdk.path}/include/json_parser/upstream/include" "-I{compiler.sdk.path}/include/json_parser/upstream" "-I{compiler.sdk.path}/include/json_generator/upstream" "-I{compiler.sdk.path}/include/esp_schedule/include" "-I{compiler.sdk.path}/include/esp_rainmaker/include" "-I{compiler.sdk.path}/include/qrcode/include" "-I{compiler.sdk.path}/include/ws2812_led" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/kalman/ekf_imu13states/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dl/include" "-I{compiler.sdk.path}/include/esp-dl/include/tool" "-I{compiler.sdk.path}/include/esp-dl/include/typedef" "-I{compiler.sdk.path}/include/esp-dl/include/image" "-I{compiler.sdk.path}/include/esp-dl/include/math" "-I{compiler.sdk.path}/include/esp-dl/include/nn" "-I{compiler.sdk.path}/include/esp-dl/include/layer" "-I{compiler.sdk.path}/include/esp-dl/include/detect" "-I{compiler.sdk.path}/include/esp-dl/include/model_zoo" "-I{compiler.sdk.path}/include/fb_gfx/include"
+compiler.c.elf.libs.esp32c3=-lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lspiffs -lwifi_provisioning -lbutton -lrmaker_common -ljson_parser -ljson_generator -lesp_schedule -lesp_rainmaker -lqrcode -lws2812_led -lesp-dsp -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_lcd -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lesp_adc_cal -lesp_hid -lfatfs -lwear_levelling -lopenssl -lspiffs -lesp_rainmaker -lesp_local_ctrl -lesp_https_server -lwifi_provisioning -lprotocomm -lbt -lbtdm_app -lprotobuf-c -lmdns -ljson -lrmaker_common -lmqtt -ljson_parser -ljson_generator -lesp_schedule -lqrcode -lcat_face_detect -lhuman_face_detect -lcolor_detect -lmfn -ldl -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -lconsole -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lbtbb -lesp_phy -lphy -lbtbb -lesp_phy -lphy -lbtbb -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
+compiler.c.flags.esp32c3=-march=rv32imc -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu99 -Wno-old-style-declaration  -MMD -c
+compiler.cpp.flags.esp32c3=-march=rv32imc -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu++11 -fexceptions -fno-rtti  -MMD -c
+compiler.S.flags.esp32c3=-ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Os -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion  -x assembler-with-cpp -MMD -c
+compiler.c.elf.flags.esp32c3=-T memory.ld -T sections.ld -T esp32c3.rom.ld -T esp32c3.rom.api.ld -T esp32c3.rom.libgcc.ld -T esp32c3.rom.newlib.ld -T esp32c3.rom.version.ld -T esp32c3.rom.newlib-time.ld -T esp32c3.rom.eco3.ld -T esp32c3.peripherals.ld  -nostartfiles -march=rv32imc --specs=nosys.specs -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u _Z5setupv -u _Z4loopv -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u pthread_include_pthread_rwlock_impl -u include_esp_phy_override -u start_app -u __ubsan_include -u __assert_func -u vfs_include_syscalls_impl -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u newlib_include_assert_impl -u __cxa_guard_dummy 
 compiler.ar.flags.esp32c3=cr
-build.extra_flags.esp32c3=-DARDUINO_HW_CDC_ON_BOOT={build.cdc_on_boot}
+build.extra_flags.esp32c3=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
 #
 # ESP32C3 Support End
 #
 
 # Compile Flags
-compiler.cpreprocessor.flags={compiler.cpreprocessor.flags.{build.mcu}}
+compiler.cpreprocessor.flags={compiler.cpreprocessor.flags.{build.mcu}} "-I{compiler.sdk.path}/{build.memory_type}/include"
 compiler.c.flags={compiler.c.flags.{build.mcu}}
 compiler.cpp.flags={compiler.cpp.flags.{build.mcu}}
 compiler.S.flags={compiler.S.flags.{build.mcu}}
@@ -101,15 +120,21 @@ compiler.elf2hex.extra_flags=
 compiler.libraries.ldflags=
 
 # This can be overriden in boards.txt
+build.memory_type=qspi_qspi
 build.flash_size=4MB
 build.flash_mode=dio
-build.boot=bootloader
+build.flash_freq=80m
+build.boot=qio
+build.boot_freq={build.flash_freq}
 build.bootloader_addr=0x1000
+build.custom_bootloader=bootloader
+build.custom_partitions=partitions
 build.code_debug=0
 build.defines=
 build.loop_core=
 build.event_core=
 build.extra_flags=-DESP32 -DCORE_DEBUG_LEVEL={build.code_debug} {build.loop_core} {build.event_core} {build.defines} {build.extra_flags.{build.mcu}}
+build.extra_libs=
 
 # Custom build options
 build.opt.name=build_opt.h
@@ -117,16 +142,16 @@ build.opt.path={build.path}/{build.opt.name}
 
 # Check if custom partitions exist: source > variant > build.partitions
 recipe.hooks.prebuild.1.pattern=bash -c "[ ! -f "{build.source.path}"/partitions.csv ] || cp -f "{build.source.path}"/partitions.csv "{build.path}"/partitions.csv"
-recipe.hooks.prebuild.2.pattern=bash -c "[ -f "{build.path}"/partitions.csv ] || [ ! -f "{build.variant.path}"/partitions.csv ] || cp "{build.variant.path}"/partitions.csv "{build.path}"/partitions.csv"
+recipe.hooks.prebuild.2.pattern=bash -c "[ -f "{build.path}"/partitions.csv ] || [ ! -f "{build.variant.path}"/{build.custom_partitions}.csv ] || cp "{build.variant.path}"/{build.custom_partitions}.csv "{build.path}"/partitions.csv"
 recipe.hooks.prebuild.3.pattern=bash -c "[ -f "{build.path}"/partitions.csv ] || cp "{runtime.platform.path}"/tools/partitions/{build.partitions}.csv "{build.path}"/partitions.csv"
 
 recipe.hooks.prebuild.1.pattern.windows=cmd /c if exist "{build.source.path}\partitions.csv" COPY /y "{build.source.path}\partitions.csv" "{build.path}\partitions.csv"
-recipe.hooks.prebuild.2.pattern.windows=cmd /c if not exist "{build.path}\partitions.csv" if exist "{build.variant.path}\partitions.csv" COPY "{build.variant.path}\partitions.csv" "{build.path}\partitions.csv"
+recipe.hooks.prebuild.2.pattern.windows=cmd /c if not exist "{build.path}\partitions.csv" if exist "{build.variant.path}\{build.custom_partitions}.csv" COPY "{build.variant.path}\{build.custom_partitions}.csv" "{build.path}\partitions.csv"
 recipe.hooks.prebuild.3.pattern.windows=cmd /c if not exist "{build.path}\partitions.csv" COPY "{runtime.platform.path}\tools\partitions\{build.partitions}.csv" "{build.path}\partitions.csv"
 
 # Check if custom bootloader exist: source > variant > build.boot
-recipe.hooks.prebuild.4.pattern=bash -c "[ -f "{build.source.path}"/bootloader.bin ] && cp -f "{build.source.path}"/bootloader.bin "{build.path}"/{build.project_name}.bootloader.bin || ( [ -f "{build.variant.path}"/bootloader.bin ] && cp "{build.variant.path}"/bootloader.bin "{build.path}"/{build.project_name}.bootloader.bin || cp -f "{runtime.platform.path}"/tools/sdk/{build.mcu}/bin/bootloader_{build.boot}_{build.flash_freq}.bin "{build.path}"/{build.project_name}.bootloader.bin )"
-recipe.hooks.prebuild.4.pattern.windows=cmd /c IF EXIST "{build.source.path}\bootloader.bin" ( COPY /y "{build.source.path}\bootloader.bin" "{build.path}\{build.project_name}.bootloader.bin" ) ELSE ( IF EXIST "{build.variant.path}\bootloader.bin" ( COPY "{build.variant.path}\bootloader.bin" "{build.path}\{build.project_name}.bootloader.bin" ) ELSE ( COPY /y "{runtime.platform.path}\tools\sdk\{build.mcu}\bin\bootloader_{build.boot}_{build.flash_freq}.bin" "{build.path}\{build.project_name}.bootloader.bin" ) )
+recipe.hooks.prebuild.4.pattern=bash -c "[ -f "{build.source.path}"/bootloader.bin ] && cp -f "{build.source.path}"/bootloader.bin "{build.path}"/{build.project_name}.bootloader.bin || ( [ -f "{build.variant.path}"/{build.custom_bootloader}.bin ] && cp "{build.variant.path}"/{build.custom_bootloader}.bin "{build.path}"/{build.project_name}.bootloader.bin || cp -f "{runtime.platform.path}"/tools/sdk/{build.mcu}/bin/bootloader_{build.boot}_{build.boot_freq}.bin "{build.path}"/{build.project_name}.bootloader.bin )"
+recipe.hooks.prebuild.4.pattern.windows=cmd /c IF EXIST "{build.source.path}\bootloader.bin" ( COPY /y "{build.source.path}\bootloader.bin" "{build.path}\{build.project_name}.bootloader.bin" ) ELSE ( IF EXIST "{build.variant.path}\{build.custom_bootloader}.bin" ( COPY "{build.variant.path}\{build.custom_bootloader}.bin" "{build.path}\{build.project_name}.bootloader.bin" ) ELSE ( COPY /y "{runtime.platform.path}\tools\sdk\{build.mcu}\bin\bootloader_{build.boot}_{build.boot_freq}.bin" "{build.path}\{build.project_name}.bootloader.bin" ) )
 
 # Check if custom build options exist in the sketch folder
 recipe.hooks.prebuild.5.pattern=bash -c "[ ! -f "{build.source.path}"/build_opt.h ] || cp -f "{build.source.path}"/build_opt.h "{build.path}"/build_opt.h"
@@ -148,7 +173,7 @@ recipe.S.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.cpreprocessor.fla
 recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} {compiler.ar.extra_flags} "{archive_file_path}" "{object_file}"
 
 ## Combine gc-sections, archives, and objects
-recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" "-Wl,--Map={build.path}/{build.project_name}.map" "-L{compiler.sdk.path}/lib" "-L{compiler.sdk.path}/ld" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} {build.extra_flags} -Wl,--start-group {object_files} "{archive_file_path}" {compiler.c.elf.libs} {compiler.libraries.ldflags} -Wl,--end-group -Wl,-EL -o "{build.path}/{build.project_name}.elf"
+recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" "-Wl,--Map={build.path}/{build.project_name}.map" "-L{compiler.sdk.path}/lib" "-L{compiler.sdk.path}/ld" "-L{compiler.sdk.path}/{build.memory_type}" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} {build.extra_flags} -Wl,--start-group {object_files} "{archive_file_path}" {build.extra_libs} {compiler.c.elf.libs} {compiler.libraries.ldflags} -Wl,--end-group -Wl,-EL -o "{build.path}/{build.project_name}.elf"
 
 ## Create partitions.bin
 recipe.objcopy.partitions.bin.pattern={tools.gen_esp32part.cmd} -q "{build.path}/partitions.csv" "{build.path}/{build.project_name}.partitions.bin"
@@ -156,7 +181,7 @@ recipe.objcopy.partitions.bin.pattern={tools.gen_esp32part.cmd} -q "{build.path}
 ## Create bin
 recipe.objcopy.bin.pattern_args=--chip {build.mcu} elf2image --flash_mode "{build.flash_mode}" --flash_freq "{build.flash_freq}" --flash_size "{build.flash_size}" -o "{build.path}/{build.project_name}.bin" "{build.path}/{build.project_name}.elf"
 recipe.objcopy.bin.pattern="{tools.esptool_py.path}/{tools.esptool_py.cmd}" {recipe.objcopy.bin.pattern_args}
-recipe.objcopy.bin.pattern.linux=python "{tools.esptool_py.path}/{tools.esptool_py.cmd}" {recipe.objcopy.bin.pattern_args}
+recipe.objcopy.bin.pattern.linux=python3 "{tools.esptool_py.path}/{tools.esptool_py.cmd}" {recipe.objcopy.bin.pattern_args}
 
 ## Save bin
 recipe.output.tmp_file={build.project_name}.bin
@@ -167,12 +192,65 @@ recipe.size.pattern="{compiler.path}{compiler.size.cmd}" -A "{build.path}/{build
 recipe.size.regex=^(?:\.iram0\.text|\.iram0\.vectors|\.dram0\.data|\.flash\.text|\.flash\.rodata|)\s+([0-9]+).*
 recipe.size.regex.data=^(?:\.dram0\.data|\.dram0\.bss|\.noinit)\s+([0-9]+).*
 
-# ------------------------------
+## Required discoveries and monitors
+## ---------------------------------
+pluggable_discovery.required.0=builtin:serial-discovery
+pluggable_discovery.required.1=builtin:mdns-discovery
+pluggable_monitor.required.serial=builtin:serial-monitor
+
+## ------------------
+## Upload/Debug tools
+## ------------------
 
-tools.esptool_py.upload.protocol=esp32
+##
+## ESPTool
+##
+
+## Upload Sketch
+## -------------
+tools.esptool_py.upload.protocol=serial
 tools.esptool_py.upload.params.verbose=
 tools.esptool_py.upload.params.quiet=
-tools.esptool_py.upload.pattern_args=--chip {build.mcu} --port "{serial.port}" --baud {upload.speed} {upload.flags} --before default_reset --after hard_reset write_flash -z --flash_mode {build.flash_mode} --flash_freq {build.flash_freq} --flash_size {build.flash_size} 0xe000 "{runtime.platform.path}/tools/partitions/boot_app0.bin" {build.bootloader_addr} "{build.path}/{build.project_name}.bootloader.bin" 0x10000 "{build.path}/{build.project_name}.bin" 0x8000 "{build.path}/{build.project_name}.partitions.bin" {upload.extra_flags}
+tools.esptool_py.upload.pattern_args=--chip {build.mcu} --port "{serial.port}" --baud {upload.speed} {upload.flags} --before default_reset --after hard_reset write_flash -z --flash_mode {build.flash_mode} --flash_freq {build.flash_freq} --flash_size {build.flash_size} {build.bootloader_addr} "{build.path}/{build.project_name}.bootloader.bin" 0x8000 "{build.path}/{build.project_name}.partitions.bin" 0xe000 "{runtime.platform.path}/tools/partitions/boot_app0.bin" 0x10000 "{build.path}/{build.project_name}.bin" {upload.extra_flags}
 tools.esptool_py.upload.pattern="{path}/{cmd}" {upload.pattern_args}
-tools.esptool_py.upload.pattern.linux=python "{path}/{cmd}" {upload.pattern_args}
+tools.esptool_py.upload.pattern.linux=python3 "{path}/{cmd}" {upload.pattern_args}
+
+## Program Application
+## -------------------
+tools.esptool_py.program.params.verbose=
+tools.esptool_py.program.params.quiet=
+tools.esptool_py.program.pattern_args=--chip {build.mcu} --port "{serial.port}" --baud {upload.speed} {upload.flags} --before default_reset --after hard_reset write_flash -z --flash_mode {build.flash_mode} --flash_freq {build.flash_freq} --flash_size {build.flash_size} 0x10000 "{build.path}/{build.project_name}.bin"
+tools.esptool_py.program.pattern="{path}/{cmd}" {program.pattern_args}
+tools.esptool_py.program.pattern.linux=python3 "{path}/{cmd}" {program.pattern_args}
+
+## Erase Chip (before burning the bootloader)
+## ------------------------------------------
+tools.esptool_py.erase.protocol=serial
+tools.esptool_py.erase.params.verbose=
+tools.esptool_py.erase.params.quiet=
+tools.esptool_py.erase.pattern_args=--chip {build.mcu} --port "{serial.port}" --baud {upload.speed} {upload.flags} --before default_reset --after hard_reset erase_flash
+tools.esptool_py.erase.pattern="{path}/{cmd}" {erase.pattern_args}
+tools.esptool_py.erase.pattern.linux=python3 "{path}/{cmd}" {erase.pattern_args}
+
+## Burn Bootloader
+## ---------------
+tools.esptool_py.bootloader.protocol=serial
+tools.esptool_py.bootloader.params.verbose=
+tools.esptool_py.bootloader.params.quiet=
+tools.esptool_py.bootloader.pattern=
+
+## Upload Sketch Through OTA (Arduino IDE 1.x)
+## -------------------------------------------
+## The following rule is deprecated by pluggable discovery.
+## We keep it to avoid breaking compatibility with the Arduino Java IDE.
 tools.esptool_py.upload.network_pattern={network_cmd} -i "{serial.port}" -p "{network.port}" "--auth={network.password}" -f "{build.path}/{build.project_name}.bin"
+
+## Upload Sketch Through OTA (Arduino IDE 2.x)
+## -------------------------------------------
+tools.esp_ota.upload.protocol=network
+## Following command does not work currently, because port properties are lost and auth dialog does not permit empty fields
+#tools.esp_ota.upload.field.password=Password
+#tools.esp_ota.upload.field.password.secret=true
+#tools.esp_ota.upload.pattern={cmd} -i "{upload.port.address}" -p "{upload.port.properties.port}" "--auth={upload.field.password}" -f "{build.path}/{build.project_name}.bin"
+## So we do basic default OTA on port 3232 and no auth
+tools.esp_ota.upload.pattern={cmd} -i "{upload.port.address}" -f "{build.path}/{build.project_name}.bin"
diff --git a/programmers.txt b/programmers.txt
index e69de29bb2d..8148c185a52 100644
--- a/programmers.txt
+++ b/programmers.txt
@@ -0,0 +1,8 @@
+esptool.name=Esptool
+esptool.communication=serial
+esptool.protocol=serial
+esptool.program.protocol=serial
+esptool.program.tool=esptool_py
+esptool.program.tool.default=esptool_py
+esptool.program.extra_params=
+esptool.extra_params=
diff --git a/tests/.gitignore b/tests/.gitignore
new file mode 100644
index 00000000000..3d433392930
--- /dev/null
+++ b/tests/.gitignore
@@ -0,0 +1,2 @@
+build/
+__pycache__/
diff --git a/tests/hello_world/hello_world.ino b/tests/hello_world/hello_world.ino
new file mode 100644
index 00000000000..0cc110d42a5
--- /dev/null
+++ b/tests/hello_world/hello_world.ino
@@ -0,0 +1,12 @@
+void setup(){
+  // Open serial communications and wait for port to open:
+  Serial.begin(115200);
+  while (!Serial) {
+    ;
+  }
+
+  Serial.println("Hello Arduino!");
+}
+
+void loop(){
+}
diff --git a/tests/hello_world/test_hello_world.py b/tests/hello_world/test_hello_world.py
new file mode 100644
index 00000000000..f7ed50cde40
--- /dev/null
+++ b/tests/hello_world/test_hello_world.py
@@ -0,0 +1,2 @@
+def test_hello_world(dut):
+    dut.expect('Hello Arduino!')
diff --git a/tests/pytest.ini b/tests/pytest.ini
new file mode 100644
index 00000000000..ef7e6d7c5ae
--- /dev/null
+++ b/tests/pytest.ini
@@ -0,0 +1,13 @@
+[pytest]
+addopts = --embedded-services esp,arduino
+
+# log related
+log_cli = True
+log_cli_level = INFO
+log_cli_format = %(asctime)s %(levelname)s %(message)s
+log_cli_date_format = %Y-%m-%d %H:%M:%S
+
+log_file = test.log
+log_file_level = INFO
+log_file_format = %(asctime)s %(levelname)s %(message)s
+log_file_date_format = %Y-%m-%d %H:%M:%S
diff --git a/tests/requirements.txt b/tests/requirements.txt
new file mode 100644
index 00000000000..c4095ef6c49
--- /dev/null
+++ b/tests/requirements.txt
@@ -0,0 +1,13 @@
+pyserial>=3.0
+esptool>=3.1
+pytest-cov
+cryptography<3.4; platform_machine == "armv7l"
+
+pytest>=6.2.0
+pexpect>=4.4
+
+pytest-embedded>=0.5.1
+pytest-embedded-serial>=0.5.1
+pytest-embedded-serial-esp>=0.5.1
+pytest-embedded-arduino>=0.5.1
+
diff --git a/tests/unity/test_unity.py b/tests/unity/test_unity.py
new file mode 100644
index 00000000000..a5a391cc5af
--- /dev/null
+++ b/tests/unity/test_unity.py
@@ -0,0 +1,2 @@
+def test_unity(dut):
+    dut.expect_unity_test_output(timeout=240)
diff --git a/tests/unity/unity.ino b/tests/unity/unity.ino
new file mode 100644
index 00000000000..2a1c131ca74
--- /dev/null
+++ b/tests/unity/unity.ino
@@ -0,0 +1,33 @@
+#include <unity.h>
+
+
+/* These functions are intended to be called before and after each test. */
+void setUp(void) {
+}
+
+void tearDown(void){
+}
+
+
+void test_pass(void){
+  TEST_ASSERT_EQUAL(1, 1);
+}
+
+void test_fail(void){
+  TEST_ASSERT_EQUAL(1, 1);
+}
+
+void setup() {
+  Serial.begin(115200);
+  while (!Serial) {
+    ;
+  }
+  
+  UNITY_BEGIN();
+  RUN_TEST(test_pass);
+  RUN_TEST(test_fail);
+  UNITY_END();
+}
+
+void loop() {
+}
diff --git a/tools/esptool.py b/tools/esptool.py
index 7b8a32fc8d3..beb06a3098d 100755
--- a/tools/esptool.py
+++ b/tools/esptool.py
@@ -1,20 +1,8 @@
 #!/usr/bin/env python
 #
-# ESP8266 & ESP32 family ROM Bootloader Utility
-# Copyright (C) 2014-2021 Fredrik Ahlberg, Angus Gratton, Espressif Systems (Shanghai) CO LTD, other contributors as noted.
-# https://github.com/espressif/esptool
+# SPDX-FileCopyrightText: 2014-2022 Fredrik Ahlberg, Angus Gratton, Espressif Systems (Shanghai) CO LTD, other contributors as noted.
 #
-# This program is free software; you can redistribute it and/or modify it under
-# the terms of the GNU General Public License as published by the Free Software
-# Foundation; either version 2 of the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, write to the Free Software Foundation, Inc., 51 Franklin
-# Street, Fifth Floor, Boston, MA 02110-1301 USA.
+# SPDX-License-Identifier: GPL-2.0-or-later
 
 from __future__ import division, print_function
 
@@ -69,7 +57,7 @@
         raise
 
 
-__version__ = "3.2-dev"
+__version__ = "3.3-dev"
 
 MAX_UINT32 = 0xffffffff
 MAX_UINT24 = 0xffffff
@@ -86,6 +74,8 @@
 DEFAULT_SERIAL_WRITE_TIMEOUT = 10     # timeout for serial port write
 DEFAULT_CONNECT_ATTEMPTS = 7          # default number of times to try connection
 
+SUPPORTED_CHIPS = ['esp8266', 'esp32', 'esp32s2', 'esp32s3beta2', 'esp32s3', 'esp32c3', 'esp32c6beta', 'esp32h2beta1', 'esp32h2beta2', 'esp32c2']
+
 
 def timeout_per_mb(seconds_per_mb, size_bytes):
     """ Scales timeouts which are size-specific """
@@ -104,7 +94,9 @@ def _chip_to_rom_loader(chip):
         'esp32s3': ESP32S3ROM,
         'esp32c3': ESP32C3ROM,
         'esp32c6beta': ESP32C6BETAROM,
-        'esp32h2': ESP32H2ROM,
+        'esp32h2beta1': ESP32H2BETA1ROM,
+        'esp32h2beta2': ESP32H2BETA2ROM,
+        'esp32c2': ESP32C2ROM,
     }[chip]
 
 
@@ -132,7 +124,7 @@ def get_default_connected_device(serial_list, port, connect_attempts, initial_ba
 
 DETECTED_FLASH_SIZES = {0x12: '256KB', 0x13: '512KB', 0x14: '1MB',
                         0x15: '2MB', 0x16: '4MB', 0x17: '8MB',
-                        0x18: '16MB', 0x19: '32MB', 0x1a: '64MB'}
+                        0x18: '16MB', 0x19: '32MB', 0x1a: '64MB', 0x21: '128MB'}
 
 
 def check_supported_function(func, check_func):
@@ -141,8 +133,8 @@ def check_supported_function(func, check_func):
     bootloader function to check if it's supported.
 
     This is used to capture the multidimensional differences in
-    functionality between the ESP8266 & ESP32/32S2/32S3/32C3 ROM loaders, and the
-    software stub that runs on both. Not possible to do this cleanly
+    functionality between the ESP8266 & ESP32 (and later chips) ROM loaders, and the
+    software stub that runs on these. Not possible to do this cleanly
     via inheritance alone.
     """
     def inner(*args, **kwargs):
@@ -154,18 +146,23 @@ def inner(*args, **kwargs):
     return inner
 
 
+def esp8266_function_only(func):
+    """ Attribute for a function only supported on ESP8266 """
+    return check_supported_function(func, lambda o: o.CHIP_NAME == "ESP8266")
+
+
 def stub_function_only(func):
     """ Attribute for a function only supported in the software stub loader """
     return check_supported_function(func, lambda o: o.IS_STUB)
 
 
 def stub_and_esp32_function_only(func):
-    """ Attribute for a function only supported by software stubs or ESP32/32S2/32S3/32C3 ROM """
+    """ Attribute for a function only supported by software stubs or ESP32 and later chips ROM """
     return check_supported_function(func, lambda o: o.IS_STUB or isinstance(o, ESP32ROM))
 
 
 def esp32s3_or_newer_function_only(func):
-    """ Attribute for a function only supported by ESP32S3/32C3 ROM """
+    """ Attribute for a function only supported by ESP32S3 and later chips ROM """
     return check_supported_function(func, lambda o: isinstance(o, ESP32S3ROM) or isinstance(o, ESP32C3ROM))
 
 
@@ -211,14 +208,9 @@ def _mask_to_shift(mask):
     return shift
 
 
-def esp8266_function_only(func):
-    """ Attribute for a function only supported on ESP8266 """
-    return check_supported_function(func, lambda o: o.CHIP_NAME == "ESP8266")
-
-
 class ESPLoader(object):
     """ Base class providing access to ESP ROM & software stub bootloaders.
-    Subclasses provide ESP8266 & ESP32 specific functionality.
+    Subclasses provide ESP8266 & ESP32 Family specific functionality.
 
     Don't instantiate this base class directly, either instantiate a subclass or
     call ESPLoader.detect_chip() which will interrogate the chip and return the
@@ -232,6 +224,8 @@ class ESPLoader(object):
 
     DEFAULT_PORT = "/dev/ttyUSB0"
 
+    USES_RFC2217 = False
+
     # Commands supported by ESP8266 ROM bootloader
     ESP_FLASH_BEGIN = 0x02
     ESP_FLASH_DATA  = 0x03
@@ -243,7 +237,7 @@ class ESPLoader(object):
     ESP_WRITE_REG   = 0x09
     ESP_READ_REG    = 0x0a
 
-    # Some comands supported by ESP32 ROM bootloader (or -8266 w/ stub)
+    # Some comands supported by ESP32 and later chips ROM bootloader (or -8266 w/ stub)
     ESP_SPI_SET_PARAMS = 0x0B
     ESP_SPI_ATTACH     = 0x0D
     ESP_READ_FLASH_SLOW  = 0x0e  # ROM only, much slower than the stub flash read
@@ -253,7 +247,7 @@ class ESPLoader(object):
     ESP_FLASH_DEFL_END   = 0x12
     ESP_SPI_FLASH_MD5    = 0x13
 
-    # Commands supported by ESP32-S2/S3/C3/C6 ROM bootloader only
+    # Commands supported by ESP32-S2 and later chips ROM bootloader only
     ESP_GET_SECURITY_INFO = 0x14
 
     # Some commands supported by stub only
@@ -367,6 +361,8 @@ def detect_chip(port=DEFAULT_PORT, baud=ESP_ROM_BAUD, connect_mode='default_rese
         """
         inst = None
         detect_port = ESPLoader(port, baud, trace_enabled=trace_enabled)
+        if detect_port.serial_port.startswith("rfc2217:"):
+            detect_port.USES_RFC2217 = True
         detect_port.connect(connect_mode, connect_attempts, detecting=True)
         try:
             print('Detecting chip type...', end='')
@@ -374,20 +370,27 @@ def detect_chip(port=DEFAULT_PORT, baud=ESP_ROM_BAUD, connect_mode='default_rese
             res = struct.unpack("<IBBBBBBBBI", res[:16])  # 4b flags, 1b flash_crypt_cnt, 7*1b key_purposes, 4b chip_id
             chip_id = res[9]  # 2/4 status bytes invariant
 
-            for cls in [ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM, ESP32C6BETAROM, ESP32H2ROM]:
+            for cls in [ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM, ESP32C6BETAROM, ESP32H2BETA1ROM, ESP32C2ROM, ESP32H2BETA2ROM]:
                 if chip_id == cls.IMAGE_CHIP_ID:
                     inst = cls(detect_port._port, baud, trace_enabled=trace_enabled)
                     inst._post_connect()
-        except (UnsupportedCommandError, struct.error, FatalError):
-            # UnsupportedCmdErr: ESP8266, ESP32 ROM | struct.err: ESP32S2 | FatalErr: ESP8266, ESP32 STUB
+                    try:
+                        inst.read_reg(ESPLoader.CHIP_DETECT_MAGIC_REG_ADDR)  # Dummy read to check Secure Download mode
+                    except UnsupportedCommandError:
+                        inst.secure_download_mode = True
+        except (UnsupportedCommandError, struct.error, FatalError) as e:
+            # UnsupportedCmdErr: ESP8266/ESP32 ROM | struct.err: ESP32-S2 | FatalErr: ESP8266/ESP32 STUB
             print(" Unsupported detection protocol, switching and trying again...")
             try:
-                detect_port.connect(connect_mode, connect_attempts, detecting=True, warnings=False)  # Need to connect again
+                # ESP32/ESP8266 are reset after an unsupported command, need to connect again (not needed on ESP32-S2)
+                if not isinstance(e, struct.error):
+                    detect_port.connect(connect_mode, connect_attempts, detecting=True, warnings=False)
                 print('Detecting chip type...', end='')
                 sys.stdout.flush()
                 chip_magic_value = detect_port.read_reg(ESPLoader.CHIP_DETECT_MAGIC_REG_ADDR)
 
-                for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM, ESP32C6BETAROM, ESP32H2ROM]:
+                for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM,
+                            ESP32C3ROM, ESP32C6BETAROM, ESP32H2BETA1ROM, ESP32C2ROM, ESP32H2BETA2ROM]:
                     if chip_magic_value in cls.CHIP_DETECT_MAGIC_VALUE:
                         inst = cls(detect_port._port, baud, trace_enabled=trace_enabled)
                         inst._post_connect()
@@ -542,7 +545,7 @@ def _get_pid(self):
         active_port = self._port.port
 
         # Pyserial only identifies regular ports, URL handlers are not supported
-        if not active_port.startswith(("COM", "/dev/")):
+        if not active_port.lower().startswith(("com", "/dev/")):
             print("\nDevice PID identification is only supported on COM and /dev/ serial ports.")
             return
         # Return the real path if the active port is a symlink
@@ -606,7 +609,8 @@ def _connect_attempt(self, mode='default_reset', usb_jtag_serial=False, extra_de
             return last_error
 
         if mode != 'no_reset':
-            self._port.flushInput()  # Empty serial buffer to isolate boot log
+            if not self.USES_RFC2217:  # Might block on rfc2217 ports
+                self._port.reset_input_buffer()  # Empty serial buffer to isolate boot log
             self.bootloader_reset(usb_jtag_serial, extra_delay)
 
             # Detect the ROM boot log and check actual boot mode (ESP32 and later only)
@@ -664,8 +668,9 @@ def connect(self, mode='default_reset', attempts=DEFAULT_CONNECT_ATTEMPTS, detec
             print('')  # end 'Connecting...' line
 
         if last_error is not None:
-            raise FatalError('Failed to connect to %s: %s'
-                             '\nFor troubleshooting steps visit: https://github.com/espressif/esptool#troubleshooting' % (self.CHIP_NAME, last_error))
+            raise FatalError('Failed to connect to {}: {}'
+                             '\nFor troubleshooting steps visit: '
+                             'https://docs.espressif.com/projects/esptool/en/latest/troubleshooting.html'.format(self.CHIP_NAME, last_error))
 
         if not detecting:
             try:
@@ -673,7 +678,8 @@ def connect(self, mode='default_reset', attempts=DEFAULT_CONNECT_ATTEMPTS, detec
                 chip_magic_value = self.read_reg(ESPLoader.CHIP_DETECT_MAGIC_REG_ADDR)
                 if chip_magic_value not in self.CHIP_DETECT_MAGIC_VALUE:
                     actually = None
-                    for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM, ESP32H2ROM]:
+                    for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM,
+                                ESP32C3ROM, ESP32H2BETA1ROM, ESP32H2BETA2ROM, ESP32C2ROM, ESP32C6BETAROM]:
                         if chip_magic_value in cls.CHIP_DETECT_MAGIC_VALUE:
                             actually = cls
                             break
@@ -781,7 +787,8 @@ def flash_begin(self, size, offset, begin_rom_encrypted=False):
             timeout = timeout_per_mb(ERASE_REGION_TIMEOUT_PER_MB, size)  # ROM performs the erase up front
 
         params = struct.pack('<IIII', erase_size, num_blocks, self.FLASH_WRITE_SIZE, offset)
-        if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM, ESP32C6BETAROM, ESP32H2ROM)) and not self.IS_STUB:
+        if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM,
+                             ESP32C6BETAROM, ESP32H2BETA1ROM, ESP32C2ROM, ESP32H2BETA2ROM)) and not self.IS_STUB:
             params += struct.pack('<I', 1 if begin_rom_encrypted else 0)
         self.check_command("enter Flash download mode", self.ESP_FLASH_BEGIN,
                            params, timeout=timeout)
@@ -799,7 +806,7 @@ def flash_block(self, data, seq, timeout=DEFAULT_TIMEOUT):
 
     """ Encrypt before writing to flash """
     def flash_encrypt_block(self, data, seq, timeout=DEFAULT_TIMEOUT):
-        if isinstance(self, (ESP32S2ROM, ESP32C3ROM, ESP32H2ROM)) and not self.IS_STUB:
+        if isinstance(self, (ESP32S2ROM, ESP32C3ROM, ESP32S3ROM, ESP32H2BETA1ROM, ESP32C2ROM, ESP32H2BETA2ROM)) and not self.IS_STUB:
             # ROM support performs the encrypted writes via the normal write command,
             # triggered by flash_begin(begin_rom_encrypted=True)
             return self.flash_block(data, seq, timeout)
@@ -901,7 +908,8 @@ def flash_defl_begin(self, size, compsize, offset):
             timeout = timeout_per_mb(ERASE_REGION_TIMEOUT_PER_MB, write_size)  # ROM performs the erase up front
         print("Compressed %d bytes to %d..." % (size, compsize))
         params = struct.pack('<IIII', write_size, num_blocks, self.FLASH_WRITE_SIZE, offset)
-        if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM, ESP32C6BETAROM, ESP32H2ROM)) and not self.IS_STUB:
+        if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM,
+                             ESP32C6BETAROM, ESP32H2BETA1ROM, ESP32C2ROM, ESP32H2BETA2ROM)) and not self.IS_STUB:
             params += struct.pack('<I', 0)  # extra param is to enter encrypted flash mode via ROM (not supported currently)
         self.check_command("enter compressed flash mode", self.ESP_FLASH_DEFL_BEGIN, params, timeout=timeout)
         if size != 0 and not self.IS_STUB:
@@ -1040,7 +1048,7 @@ def flash_set_parameters(self, size):
         self.check_command("set SPI params", ESP32ROM.ESP_SPI_SET_PARAMS,
                            struct.pack('<IIIIII', fl_id, total_size, block_size, sector_size, page_size, status_mask))
 
-    def run_spiflash_command(self, spiflash_command, data=b"", read_bits=0):
+    def run_spiflash_command(self, spiflash_command, data=b"", read_bits=0, addr=None, addr_len=0, dummy_len=0):
         """Run an arbitrary SPI flash command.
 
         This function uses the "USR_COMMAND" functionality in the ESP
@@ -1054,20 +1062,23 @@ def run_spiflash_command(self, spiflash_command, data=b"", read_bits=0):
 
         # SPI_USR register flags
         SPI_USR_COMMAND = (1 << 31)
+        SPI_USR_ADDR    = (1 << 30)
+        SPI_USR_DUMMY   = (1 << 29)
         SPI_USR_MISO    = (1 << 28)
         SPI_USR_MOSI    = (1 << 27)
 
         # SPI registers, base address differs ESP32* vs 8266
         base = self.SPI_REG_BASE
         SPI_CMD_REG       = base + 0x00
+        SPI_ADDR_REG      = base + 0x04
         SPI_USR_REG       = base + self.SPI_USR_OFFS
         SPI_USR1_REG      = base + self.SPI_USR1_OFFS
         SPI_USR2_REG      = base + self.SPI_USR2_OFFS
         SPI_W0_REG        = base + self.SPI_W0_OFFS
 
-        # following two registers are ESP32 & 32S2/32C3 only
+        # following two registers are ESP32 and later chips only
         if self.SPI_MOSI_DLEN_OFFS is not None:
-            # ESP32/32S2/32C3 has a more sophisticated way to set up "user" commands
+            # ESP32 and later chips have a more sophisticated way to set up "user" commands
             def set_data_lengths(mosi_bits, miso_bits):
                 SPI_MOSI_DLEN_REG = base + self.SPI_MOSI_DLEN_OFFS
                 SPI_MISO_DLEN_REG = base + self.SPI_MISO_DLEN_OFFS
@@ -1075,23 +1086,33 @@ def set_data_lengths(mosi_bits, miso_bits):
                     self.write_reg(SPI_MOSI_DLEN_REG, mosi_bits - 1)
                 if miso_bits > 0:
                     self.write_reg(SPI_MISO_DLEN_REG, miso_bits - 1)
+                flags = 0
+                if dummy_len > 0:
+                    flags |= (dummy_len - 1)
+                if addr_len > 0:
+                    flags |= (addr_len - 1) << SPI_USR_ADDR_LEN_SHIFT
+                if flags:
+                    self.write_reg(SPI_USR1_REG, flags)
         else:
-
             def set_data_lengths(mosi_bits, miso_bits):
                 SPI_DATA_LEN_REG = SPI_USR1_REG
                 SPI_MOSI_BITLEN_S = 17
                 SPI_MISO_BITLEN_S = 8
                 mosi_mask = 0 if (mosi_bits == 0) else (mosi_bits - 1)
                 miso_mask = 0 if (miso_bits == 0) else (miso_bits - 1)
-                self.write_reg(SPI_DATA_LEN_REG,
-                               (miso_mask << SPI_MISO_BITLEN_S) | (
-                                   mosi_mask << SPI_MOSI_BITLEN_S))
+                flags = (miso_mask << SPI_MISO_BITLEN_S) | (mosi_mask << SPI_MOSI_BITLEN_S)
+                if dummy_len > 0:
+                    flags |= (dummy_len - 1)
+                if addr_len > 0:
+                    flags |= (addr_len - 1) << SPI_USR_ADDR_LEN_SHIFT
+                self.write_reg(SPI_DATA_LEN_REG, flags)
 
         # SPI peripheral "command" bitmasks for SPI_CMD_REG
         SPI_CMD_USR  = (1 << 18)
 
         # shift values
         SPI_USR2_COMMAND_LEN_SHIFT = 28
+        SPI_USR_ADDR_LEN_SHIFT = 26
 
         if read_bits > 32:
             raise FatalError("Reading more than 32 bits back from a SPI flash operation is unsupported")
@@ -1106,10 +1127,16 @@ def set_data_lengths(mosi_bits, miso_bits):
             flags |= SPI_USR_MISO
         if data_bits > 0:
             flags |= SPI_USR_MOSI
+        if addr_len > 0:
+            flags |= SPI_USR_ADDR
+        if dummy_len > 0:
+            flags |= SPI_USR_DUMMY
         set_data_lengths(data_bits, read_bits)
         self.write_reg(SPI_USR_REG, flags)
         self.write_reg(SPI_USR2_REG,
                        (7 << SPI_USR2_COMMAND_LEN_SHIFT) | spiflash_command)
+        if addr and addr_len > 0:
+            self.write_reg(SPI_ADDR_REG, addr)
         if data_bits == 0:
             self.write_reg(SPI_W0_REG, 0)  # clear data register before we read it
         else:
@@ -1134,6 +1161,10 @@ def wait_done():
         self.write_reg(SPI_USR2_REG, old_spi_usr2)
         return status
 
+    def read_spiflash_sfdp(self, addr, read_bits):
+        CMD_RDSFDP = 0x5A
+        return self.run_spiflash_command(CMD_RDSFDP, read_bits=read_bits, addr=addr, addr_len=24, dummy_len=8)
+
     def read_status(self, num_bytes=2):
         """Read up to 24 bits (num_bytes) of SPI flash status register contents
         via RDSR, RDSR2, RDSR3 commands
@@ -1455,7 +1486,10 @@ class ESP32ROM(ESPLoader):
         '2MB': 0x10,
         '4MB': 0x20,
         '8MB': 0x30,
-        '16MB': 0x40
+        '16MB': 0x40,
+        '32MB': 0x50,
+        '64MB': 0x60,
+        '128MB': 0x70
     }
 
     BOOTLOADER_FLASH_OFFSET = 0x1000
@@ -2223,8 +2257,8 @@ def is_flash_encryption_key_valid(self):
         return any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes)
 
 
-class ESP32H2ROM(ESP32ROM):
-    CHIP_NAME = "ESP32-H2"
+class ESP32H2BETA1ROM(ESP32ROM):
+    CHIP_NAME = "ESP32-H2(beta1)"
     IMAGE_CHIP_ID = 10
 
     IROM_MAP_START = 0x42000000
@@ -2301,7 +2335,7 @@ def get_chip_features(self):
         return ["BLE/802.15.4"]
 
     def get_crystal_freq(self):
-        return 40
+        return 32
 
     def override_vddsdio(self, new_voltage):
         raise NotImplementedInROMError("VDD_SDIO overrides are not supported for ESP32-H2")
@@ -2337,6 +2371,41 @@ def is_flash_encryption_key_valid(self):
         return any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes)
 
 
+class ESP32H2BETA2ROM(ESP32H2BETA1ROM):
+    CHIP_NAME = "ESP32-H2(beta2)"
+    IMAGE_CHIP_ID = 14
+
+
+class ESP32C2ROM(ESP32C3ROM):
+    CHIP_NAME = "ESP32-C2"
+    IMAGE_CHIP_ID = 12
+
+    IROM_MAP_START = 0x42000000
+    IROM_MAP_END   = 0x42400000
+    DROM_MAP_START = 0x3c000000
+    DROM_MAP_END   = 0x3c400000
+
+    CHIP_DETECT_MAGIC_VALUE = [0x6f51306f]
+
+    EFUSE_BASE = 0x60008800
+    MAC_EFUSE_REG  = EFUSE_BASE + 0x040
+
+    def get_pkg_version(self):
+        num_word = 3
+        block1_addr = self.EFUSE_BASE + 0x044
+        word3 = self.read_reg(block1_addr + (4 * num_word))
+        pkg_version = (word3 >> 21) & 0x0F
+        return pkg_version
+
+    def get_chip_description(self):
+        chip_name = {
+            0: "ESP32-C2",
+        }.get(self.get_pkg_version(), "unknown ESP32-C2")
+        chip_revision = self.get_chip_revision()
+
+        return "%s (revision %d)" % (chip_name, chip_revision)
+
+
 class ESP32C6BETAROM(ESP32C3ROM):
     CHIP_NAME = "ESP32-C6(beta)"
     IMAGE_CHIP_ID = 7
@@ -2459,8 +2528,8 @@ def __init__(self, rom_loader):
 ESP32C3ROM.STUB_CLASS = ESP32C3StubLoader
 
 
-class ESP32H2StubLoader(ESP32H2ROM):
-    """ Access class for ESP32H2 stub loader, runs on top of ROM.
+class ESP32H2BETA1StubLoader(ESP32H2BETA1ROM):
+    """ Access class for ESP32H2BETA1 stub loader, runs on top of ROM.
 
     (Basically the same as ESP32StubLoader, but different base class.
     Can possibly be made into a mixin.)
@@ -2476,7 +2545,47 @@ def __init__(self, rom_loader):
         self.flush_input()  # resets _slip_reader
 
 
-ESP32H2ROM.STUB_CLASS = ESP32H2StubLoader
+ESP32H2BETA1ROM.STUB_CLASS = ESP32H2BETA1StubLoader
+
+
+class ESP32H2BETA2StubLoader(ESP32H2BETA2ROM):
+    """ Access class for ESP32H2BETA2 stub loader, runs on top of ROM.
+
+    (Basically the same as ESP32StubLoader, but different base class.
+    Can possibly be made into a mixin.)
+    """
+    FLASH_WRITE_SIZE = 0x4000  # matches MAX_WRITE_BLOCK in stub_loader.c
+    STATUS_BYTES_LENGTH = 2  # same as ESP8266, different to ESP32 ROM
+    IS_STUB = True
+
+    def __init__(self, rom_loader):
+        self.secure_download_mode = rom_loader.secure_download_mode
+        self._port = rom_loader._port
+        self._trace_enabled = rom_loader._trace_enabled
+        self.flush_input()  # resets _slip_reader
+
+
+ESP32H2BETA2ROM.STUB_CLASS = ESP32H2BETA2StubLoader
+
+
+class ESP32C2StubLoader(ESP32C2ROM):
+    """ Access class for ESP32C2 stub loader, runs on top of ROM.
+
+    (Basically the same as ESP32StubLoader, but different base class.
+    Can possibly be made into a mixin.)
+    """
+    FLASH_WRITE_SIZE = 0x4000  # matches MAX_WRITE_BLOCK in stub_loader.c
+    STATUS_BYTES_LENGTH = 2  # same as ESP8266, different to ESP32 ROM
+    IS_STUB = True
+
+    def __init__(self, rom_loader):
+        self.secure_download_mode = rom_loader.secure_download_mode
+        self._port = rom_loader._port
+        self._trace_enabled = rom_loader._trace_enabled
+        self.flush_input()  # resets _slip_reader
+
+
+ESP32C2ROM.STUB_CLASS = ESP32C2StubLoader
 
 
 class ESPBOOTLOADER(object):
@@ -2511,8 +2620,12 @@ def LoadFirmwareImage(chip, filename):
             return ESP32C3FirmwareImage(f)
         elif chip == 'esp32c6beta':
             return ESP32C6BETAFirmwareImage(f)
-        elif chip == 'esp32h2':
-            return ESP32H2FirmwareImage(f)
+        elif chip == 'esp32h2beta1':
+            return ESP32H2BETA1FirmwareImage(f)
+        elif chip == 'esp32h2beta2':
+            return ESP32H2BETA2FirmwareImage(f)
+        elif chip == 'esp32c2':
+            return ESP32C2FirmwareImage(f)
         else:  # Otherwise, ESP8266 so look at magic to determine the image type
             magic = ord(f.read(1))
             f.seek(0)
@@ -2729,6 +2842,10 @@ def merge_adjacent_segments(self):
         # script will have produced any adjacent sections in linear order in the ELF, anyhow.
         self.segments = segments
 
+    def set_mmu_page_size(self, size):
+        """ If supported, this should be overridden by the chip-specific class. Gets called in elf2image. """
+        print('WARNING: Changing MMU page size is not supported on {}! Defaulting to 64KB.'.format(self.ROM_LOADER.CHIP_NAME))
+
 
 class ESP8266ROMFirmwareImage(BaseFirmwareImage):
     """ 'Version 1' firmware image, segments loaded directly by the ROM bootloader. """
@@ -2862,11 +2979,6 @@ def save(self, filename):
             f.write(struct.pack(b'<I', crc))
 
 
-# Backwards compatibility for previous API, remove in esptool.py V3
-ESPFirmwareImage = ESP8266ROMFirmwareImage
-OTAFirmwareImage = ESP8266V2FirmwareImage
-
-
 def esp8266_crc32(data):
     """
     CRC32 algorithm used by 8266 SDK bootloader (and gen_appbin.py).
@@ -3118,6 +3230,100 @@ def join_byte(ln, hn):
         save_file.write(packed)
 
 
+class ESP8266V3FirmwareImage(ESP32FirmwareImage):
+    """ ESP8266 V3 firmware image is very similar to ESP32 image
+    """
+
+    EXTENDED_HEADER_STRUCT_FMT = "B" * 16
+
+    def is_flash_addr(self, addr):
+        return (addr > ESP8266ROM.IROM_MAP_START)
+
+    def save(self, filename):
+        total_segments = 0
+        with io.BytesIO() as f:  # write file to memory first
+            self.write_common_header(f, self.segments)
+
+            checksum = ESPLoader.ESP_CHECKSUM_MAGIC
+
+            # split segments into flash-mapped vs ram-loaded, and take copies so we can mutate them
+            flash_segments = [copy.deepcopy(s) for s in sorted(self.segments, key=lambda s:s.addr) if self.is_flash_addr(s.addr) and len(s.data)]
+            ram_segments = [copy.deepcopy(s) for s in sorted(self.segments, key=lambda s:s.addr) if not self.is_flash_addr(s.addr) and len(s.data)]
+
+            # check for multiple ELF sections that are mapped in the same flash mapping region.
+            # this is usually a sign of a broken linker script, but if you have a legitimate
+            # use case then let us know
+            if len(flash_segments) > 0:
+                last_addr = flash_segments[0].addr
+                for segment in flash_segments[1:]:
+                    if segment.addr // self.IROM_ALIGN == last_addr // self.IROM_ALIGN:
+                        raise FatalError(("Segment loaded at 0x%08x lands in same 64KB flash mapping as segment loaded at 0x%08x. "
+                                          "Can't generate binary. Suggest changing linker script or ELF to merge sections.") %
+                                         (segment.addr, last_addr))
+                    last_addr = segment.addr
+
+            # try to fit each flash segment on a 64kB aligned boundary
+            # by padding with parts of the non-flash segments...
+            while len(flash_segments) > 0:
+                segment = flash_segments[0]
+                # remove 8 bytes empty data for insert segment header
+                if segment.name == '.flash.rodata':
+                    segment.data = segment.data[8:]
+                # write the flash segment
+                checksum = self.save_segment(f, segment, checksum)
+                flash_segments.pop(0)
+                total_segments += 1
+
+            # flash segments all written, so write any remaining RAM segments
+            for segment in ram_segments:
+                checksum = self.save_segment(f, segment, checksum)
+                total_segments += 1
+
+            # done writing segments
+            self.append_checksum(f, checksum)
+            image_length = f.tell()
+
+            # kinda hacky: go back to the initial header and write the new segment count
+            # that includes padding segments. This header is not checksummed
+            f.seek(1)
+            try:
+                f.write(chr(total_segments))
+            except TypeError:  # Python 3
+                f.write(bytes([total_segments]))
+
+            if self.append_digest:
+                # calculate the SHA256 of the whole file and append it
+                f.seek(0)
+                digest = hashlib.sha256()
+                digest.update(f.read(image_length))
+                f.write(digest.digest())
+
+            with open(filename, 'wb') as real_file:
+                real_file.write(f.getvalue())
+
+    def load_extended_header(self, load_file):
+        def split_byte(n):
+            return (n & 0x0F, (n >> 4) & 0x0F)
+
+        fields = list(struct.unpack(self.EXTENDED_HEADER_STRUCT_FMT, load_file.read(16)))
+
+        self.wp_pin = fields[0]
+
+        # SPI pin drive stengths are two per byte
+        self.clk_drv, self.q_drv = split_byte(fields[1])
+        self.d_drv, self.cs_drv = split_byte(fields[2])
+        self.hd_drv, self.wp_drv = split_byte(fields[3])
+
+        if fields[15] in [0, 1]:
+            self.append_digest = (fields[15] == 1)
+        else:
+            raise RuntimeError("Invalid value for append_digest field (0x%02x). Should be 0 or 1.", fields[15])
+
+        # remaining fields in the middle should all be zero
+        if any(f for f in fields[4:15] if f != 0):
+            print("Warning: some reserved header fields have non-zero values. This image may be from a newer esptool.py?")
+
+
 ESP32ROM.BOOTLOADER_IMAGE = ESP32FirmwareImage
 
 
@@ -3161,17 +3367,42 @@ class ESP32C6BETAFirmwareImage(ESP32FirmwareImage):
 ESP32C6BETAROM.BOOTLOADER_IMAGE = ESP32C6BETAFirmwareImage
 
 
-class ESP32H2FirmwareImage(ESP32FirmwareImage):
+class ESP32H2BETA1FirmwareImage(ESP32FirmwareImage):
+    """ ESP32H2 Firmware Image almost exactly the same as ESP32FirmwareImage """
+    ROM_LOADER = ESP32H2BETA1ROM
+
+
+ESP32H2BETA1ROM.BOOTLOADER_IMAGE = ESP32H2BETA1FirmwareImage
+
+
+class ESP32H2BETA2FirmwareImage(ESP32FirmwareImage):
     """ ESP32H2 Firmware Image almost exactly the same as ESP32FirmwareImage """
-    ROM_LOADER = ESP32H2ROM
+    ROM_LOADER = ESP32H2BETA2ROM
+
+
+ESP32H2BETA2ROM.BOOTLOADER_IMAGE = ESP32H2BETA2FirmwareImage
+
+
+class ESP32C2FirmwareImage(ESP32FirmwareImage):
+    """ ESP32C2 Firmware Image almost exactly the same as ESP32FirmwareImage """
+    ROM_LOADER = ESP32C2ROM
 
+    def set_mmu_page_size(self, size):
+        if size not in [16384, 32768, 65536]:
+            raise FatalError("{} is not a valid page size.".format(size))
+        self.IROM_ALIGN = size
 
-ESP32H2ROM.BOOTLOADER_IMAGE = ESP32H2FirmwareImage
+
+ESP32C2ROM.BOOTLOADER_IMAGE = ESP32C2FirmwareImage
 
 
 class ELFFile(object):
     SEC_TYPE_PROGBITS = 0x01
     SEC_TYPE_STRTAB = 0x03
+    SEC_TYPE_INITARRAY = 0x0e
+    SEC_TYPE_FINIARRAY = 0x0f
+
+    PROG_SEC_TYPES = (SEC_TYPE_PROGBITS, SEC_TYPE_INITARRAY, SEC_TYPE_FINIARRAY)
 
     LEN_SEC_HEADER = 0x28
 
@@ -3228,7 +3459,7 @@ def read_section_header(offs):
             name_offs, sec_type, _flags, lma, sec_offs, size = struct.unpack_from("<LLLLLL", section_header[offs:])
             return (name_offs, sec_type, lma, size, sec_offs)
         all_sections = [read_section_header(offs) for offs in section_header_offsets]
-        prog_sections = [s for s in all_sections if s[1] == ELFFile.SEC_TYPE_PROGBITS]
+        prog_sections = [s for s in all_sections if s[1] in ELFFile.PROG_SEC_TYPES]
 
         # search for the string table section
         if not (shstrndx * self.LEN_SEC_HEADER) in section_header_offsets:
@@ -3344,6 +3575,15 @@ def arg_auto_int(x):
     return int(x, 0)
 
 
+def format_chip_name(c):
+    """ Normalize chip name from user input """
+    c = c.lower().replace('-', '')
+    if c == 'esp8684':  # TODO: Delete alias, ESPTOOL-389
+        print('WARNING: Chip name ESP8684 is deprecated in favor of ESP32-C2 and will be removed in a future release. Using ESP32-C2 instead.')
+        return 'esp32c2'
+    return c
+
+
 def div_roundup(a, b):
     """ Return a/b rounded up to nearest integer,
     equivalent result to int(math.ceil(float(int(a)) / float(int(b))), only
@@ -3424,7 +3664,7 @@ def pad_to(data, alignment, pad_character=b'\xFF'):
 class FatalError(RuntimeError):
     """
     Wrapper class for runtime errors that aren't caused by internal bugs, but by
-    ESP8266 responses or input content.
+    ESP ROM responses or input content.
     """
     def __init__(self, message):
         RuntimeError.__init__(self, message)
@@ -3433,9 +3673,25 @@ def __init__(self, message):
     def WithResult(message, result):
         """
         Return a fatal error object that appends the hex values of
-        'result' as a string formatted argument.
+        'result' and its meaning as a string formatted argument.
         """
-        message += " (result was %s)" % hexify(result)
+
+        err_defs = {
+            0x101: 'Out of memory',
+            0x102: 'Invalid argument',
+            0x103: 'Invalid state',
+            0x104: 'Invalid size',
+            0x105: 'Requested resource not found',
+            0x106: 'Operation or feature not supported',
+            0x107: 'Operation timed out',
+            0x108: 'Received response was invalid',
+            0x109: 'CRC or checksum was invalid',
+            0x10A: 'Version was invalid',
+            0x10B: 'MAC address was invalid',
+        }
+
+        err_code = struct.unpack(">H", result[:2])
+        message += " (result was {}: {})".format(hexify(result), err_defs.get(err_code[0], 'Unknown result'))
         return FatalError(message)
 
 
@@ -3622,7 +3878,7 @@ def write_flash(esp, args):
             argfile.seek(0, os.SEEK_END)
             if address + argfile.tell() > flash_end:
                 raise FatalError(("File %s (length %d) at offset %d will not fit in %d bytes of flash. "
-                                  "Use --flash-size argument, or change flashing address.")
+                                  "Use --flash_size argument, or change flashing address.")
                                  % (argfile.name, argfile.tell(), address, flash_end))
             argfile.seek(0)
 
@@ -3828,9 +4084,10 @@ def make_image(args):
 def elf2image(args):
     e = ELFFile(args.input)
     if args.chip == 'auto':  # Default to ESP8266 for backwards compatibility
-        print("Creating image for ESP8266...")
         args.chip = 'esp8266'
 
+    print("Creating {} image...".format(args.chip))
+
     if args.chip == 'esp32':
         image = ESP32FirmwareImage()
         if args.secure_pad:
@@ -3857,20 +4114,33 @@ def elf2image(args):
         image = ESP32C6BETAFirmwareImage()
         if args.secure_pad_v2:
             image.secure_pad = '2'
-    elif args.chip == 'esp32h2':
-        image = ESP32H2FirmwareImage()
+    elif args.chip == 'esp32h2beta1':
+        image = ESP32H2BETA1FirmwareImage()
+        if args.secure_pad_v2:
+            image.secure_pad = '2'
+    elif args.chip == 'esp32h2beta2':
+        image = ESP32H2BETA2FirmwareImage()
+        if args.secure_pad_v2:
+            image.secure_pad = '2'
+    elif args.chip == 'esp32c2':
+        image = ESP32C2FirmwareImage()
         if args.secure_pad_v2:
             image.secure_pad = '2'
     elif args.version == '1':  # ESP8266
         image = ESP8266ROMFirmwareImage()
-    else:
+    elif args.version == '2':
         image = ESP8266V2FirmwareImage()
+    else:
+        image = ESP8266V3FirmwareImage()
     image.entrypoint = e.entrypoint
     image.flash_mode = {'qio': 0, 'qout': 1, 'dio': 2, 'dout': 3}[args.flash_mode]
 
     if args.chip != 'esp8266':
         image.min_rev = int(args.min_rev)
 
+    if args.flash_mmu_page_size:
+        image.set_mmu_page_size(flash_size_bytes(args.flash_mmu_page_size))
+
     # ELFSection is a subclass of ImageSegment, so can use interchangeably
     image.segments = e.segments if args.use_segments else e.sections
 
@@ -3893,6 +4163,8 @@ def elf2image(args):
         args.output = image.default_output_name(args.input)
     image.save(args.output)
 
+    print("Successfully created {} image.".format(args.chip))
+
 
 def read_mac(esp, args):
     mac = esp.read_mac()
@@ -4020,7 +4292,12 @@ def get_security_info(esp, args):
 
 
 def merge_bin(args):
-    chip_class = _chip_to_rom_loader(args.chip)
+    try:
+        chip_class = _chip_to_rom_loader(args.chip)
+    except KeyError:
+        msg = "Please specify the chip argument" if args.chip == "auto" else "Invalid chip choice: '{}'".format(args.chip)
+        msg = msg + " (choose from {})".format(', '.join(SUPPORTED_CHIPS))
+        raise FatalError(msg)
 
     # sort the files by offset. The AddrFilenamePairAction has already checked for overlap
     input_files = sorted(args.addr_filename, key=lambda x: x[0])
@@ -4068,12 +4345,12 @@ def main(argv=None, esp=None):
 
     external_esp = esp is not None
 
-    parser = argparse.ArgumentParser(description='esptool.py v%s - ESP8266 ROM Bootloader Utility' % __version__, prog='esptool')
+    parser = argparse.ArgumentParser(description='esptool.py v%s - Espressif chips ROM Bootloader Utility' % __version__, prog='esptool')
 
     parser.add_argument('--chip', '-c',
                         help='Target chip type',
-                        type=lambda c: c.lower().replace('-', ''),  # support ESP32-S2, etc.
-                        choices=['auto', 'esp8266', 'esp32', 'esp32s2', 'esp32s3beta2', 'esp32s3', 'esp32c3', 'esp32c6beta', 'esp32h2'],
+                        type=format_chip_name,  # support ESP32-S2, etc.
+                        choices=['auto'] + SUPPORTED_CHIPS,
                         default=os.environ.get('ESPTOOL_CHIP', 'auto'))
 
     parser.add_argument(
@@ -4174,7 +4451,7 @@ def add_spi_flash_subparsers(parent, allow_keep, auto_detect):
         parent.add_argument('--flash_mode', '-fm', help='SPI Flash mode',
                             choices=extra_keep_args + ['qio', 'qout', 'dio', 'dout'],
                             default=os.environ.get('ESPTOOL_FM', 'keep' if allow_keep else 'qio'))
-        parent.add_argument('--flash_size', '-fs', help='SPI Flash size in MegaBytes (1MB, 2MB, 4MB, 8MB, 16M)'
+        parent.add_argument('--flash_size', '-fs', help='SPI Flash size in MegaBytes (1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 64MB, 128MB)'
                             ' plus ESP8266-only (256KB, 512KB, 2MB-c1, 4MB-c1)' + extra_fs_message,
                             action=FlashSizeAction, auto_detect=auto_detect,
                             default=os.environ.get('ESPTOOL_FS', 'keep' if allow_keep else '1MB'))
@@ -4231,7 +4508,7 @@ def add_spi_flash_subparsers(parent, allow_keep, auto_detect):
         help='Create an application image from ELF file')
     parser_elf2image.add_argument('input', help='Input ELF file')
     parser_elf2image.add_argument('--output', '-o', help='Output filename prefix (for version 1 image), or filename (for version 2 single image)', type=str)
-    parser_elf2image.add_argument('--version', '-e', help='Output image version', choices=['1', '2'], default='1')
+    parser_elf2image.add_argument('--version', '-e', help='Output image version', choices=['1', '2', '3'], default='1')
     parser_elf2image.add_argument('--min-rev', '-r', help='Minimum chip revision', choices=['0', '1', '2', '3'], default='0')
     parser_elf2image.add_argument('--secure-pad', action='store_true',
                                   help='Pad image so once signed it will end on a 64KB boundary. For Secure Boot v1 images only.')
@@ -4242,6 +4519,7 @@ def add_spi_flash_subparsers(parent, allow_keep, auto_detect):
                                   type=arg_auto_int, default=None)
     parser_elf2image.add_argument('--use_segments', help='If set, ELF segments will be used instead of ELF sections to genereate the image.',
                                   action='store_true')
+    parser_elf2image.add_argument('--flash-mmu-page-size', help="Change flash MMU page size.", choices=['64KB', '32KB', '16KB'])
 
     add_spi_flash_subparsers(parser_elf2image, allow_keep=False, auto_detect=False)
 
@@ -4320,11 +4598,10 @@ def add_spi_flash_subparsers(parent, allow_keep, auto_detect):
                                   help='Address followed by binary filename, separated by space',
                                   action=AddrFilenamePairAction)
 
-    subparsers.add_parser(
-        'version', help='Print esptool version')
-
     subparsers.add_parser('get_security_info', help='Get some security-related data')
 
+    subparsers.add_parser('version', help='Print esptool version')
+
     # internal sanity check - every operation matches a module function of the same name
     for operation in subparsers.choices.keys():
         assert operation in globals(), "%s should be a module function" % operation
@@ -4412,11 +4689,84 @@ def add_spi_flash_subparsers(parent, allow_keep, auto_detect):
             # ROM loader doesn't enable flash unless we explicitly do it
             esp.flash_spi_attach(0)
 
+        # XMC chip startup sequence
+        XMC_VENDOR_ID = 0x20
+
+        def is_xmc_chip_strict():
+            id = esp.flash_id()
+            rdid = ((id & 0xff) << 16) | ((id >> 16) & 0xff) | (id & 0xff00)
+
+            vendor_id = ((rdid >> 16) & 0xFF)
+            mfid = ((rdid >> 8) & 0xFF)
+            cpid = (rdid & 0xFF)
+
+            if vendor_id != XMC_VENDOR_ID:
+                return False
+
+            matched = False
+            if mfid == 0x40:
+                if cpid >= 0x13 and cpid <= 0x20:
+                    matched = True
+            elif mfid == 0x41:
+                if cpid >= 0x17 and cpid <= 0x20:
+                    matched = True
+            elif mfid == 0x50:
+                if cpid >= 0x15 and cpid <= 0x16:
+                    matched = True
+            return matched
+
+        def flash_xmc_startup():
+            # If the RDID value is a valid XMC one, may skip the flow
+            fast_check = True
+            if fast_check and is_xmc_chip_strict():
+                return  # Successful XMC flash chip boot-up detected by RDID, skipping.
+
+            sfdp_mfid_addr = 0x10
+            mf_id = esp.read_spiflash_sfdp(sfdp_mfid_addr, 8)
+            if mf_id != XMC_VENDOR_ID:  # Non-XMC chip detected by SFDP Read, skipping.
+                return
+
+            print("WARNING: XMC flash chip boot-up failure detected! Running XMC25QHxxC startup flow")
+            esp.run_spiflash_command(0xB9)  # Enter DPD
+            esp.run_spiflash_command(0x79)  # Enter UDPD
+            esp.run_spiflash_command(0xFF)  # Exit UDPD
+            time.sleep(0.002)               # Delay tXUDPD
+            esp.run_spiflash_command(0xAB)  # Release Power-Down
+            time.sleep(0.00002)
+            # Check for success
+            if not is_xmc_chip_strict():
+                print("WARNING: XMC flash boot-up fix failed.")
+            print("XMC flash chip boot-up fix successful!")
+
+        # Check flash chip connection
+        if not esp.secure_download_mode:
+            try:
+                flash_id = esp.flash_id()
+                if flash_id in (0xffffff, 0x000000):
+                    print('WARNING: Failed to communicate with the flash chip, read/write operations will fail. '
+                          'Try checking the chip connections or removing any other hardware connected to IOs.')
+            except Exception as e:
+                esp.trace('Unable to verify flash chip connection ({}).'.format(e))
+
+        # Check if XMC SPI flash chip booted-up successfully, fix if not
+        if not esp.secure_download_mode:
+            try:
+                flash_xmc_startup()
+            except Exception as e:
+                esp.trace('Unable to perform XMC flash chip startup sequence ({}).'.format(e))
+
         if hasattr(args, "flash_size"):
             print("Configuring flash size...")
             detect_flash_size(esp, args)
             if args.flash_size != 'keep':  # TODO: should set this even with 'keep'
                 esp.flash_set_parameters(flash_size_bytes(args.flash_size))
+                # Check if stub supports chosen flash size
+                if esp.IS_STUB and args.flash_size in ('32MB', '64MB', '128MB'):
+                    print("WARNING: Flasher stub doesn't fully support flash size larger than 16MB, in case of failure use --no-stub.")
+
+        if esp.IS_STUB and hasattr(args, "address") and hasattr(args, "size"):
+            if args.address + args.size > 0x1000000:
+                print("WARNING: Flasher stub doesn't fully support flash size larger than 16MB, in case of failure use --no-stub.")
 
         try:
             operation_func(esp, args)
@@ -4814,107 +5164,174 @@ def __call__(self, parser, namespace, values, option_string=None):
 """)))
 ESP32C3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
 eNqVWmt7EzcW/itpEkjhaXcley4aaINNbZwLsNCHkg1rtsxoZlJomy3BLGG3+e+r91xGYwcb9kNiW9LoHJ3re47mv3uL5nKxd2er2hvPL63dnl/65Gb4N5hfmix8hr8qz8OP5BXmZ/PL2oXhKk9krMon4be7N5+P\
-5peFnV+6ij+b8FQ1GG2H6WIwCbsbTIZ9nQnfXVjthvPLkvYOf2HQDt/PL9s0/Gh5ZREm6xQ0+Glr5Tv+zKsjEA7fsE0RnqBRMF8+Buc/4ixyjAYH8/I0kQust/VpfsTMX3rzEAwswmhCDFyEEwSe2sGomuwEAm6X\
-eagGh4GpweT+4XZ41qRlPJSTQ+3Nz9ce6CqMBgJN4NkW4UsbZnxgvmrz8Bz4+vM4rKtZjni2bfN8zYSSHrNoVGF1ndNJeT8wn4nMBp3woIKwHXQ5xOcPV8KLOyG1gflppGPCpyuWlLhKtLh3JaSZwqjHg1KKv63/\
-AQrg3QO961uTKZJxFUE/xZD3DRoNOir8sVIWYy3Dw759mVsWpx2ynnm5dQeBSB2M19lJsII6Y/MkMSQTzEF7TKVKWEXGPALd9B6YnfQFZ3n/AvRpLGyZh2M0GS8gI8vE0MNfUbAt6ThvorJ4wioASXxW+c1OZPdJ\
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 """)))
 ESP32C6BETAROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
-ESP32H2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
+ESP32H2BETA1ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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+""")))
+ESP32H2BETA2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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+""")))
+ESP32C2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 
 
diff --git a/tools/gen_crt_bundle.py b/tools/gen_crt_bundle.py
new file mode 100644
index 00000000000..87e29e61fa4
--- /dev/null
+++ b/tools/gen_crt_bundle.py
@@ -0,0 +1,227 @@
+#!/usr/bin/env python
+#
+# ESP32 x509 certificate bundle generation utility
+#
+# Converts PEM and DER certificates to a custom bundle format which stores just the
+# subject name and public key to reduce space
+#
+# The bundle will have the format: number of certificates; crt 1 subject name length; crt 1 public key length;
+# crt 1 subject name; crt 1 public key; crt 2...
+#
+# Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http:#www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+from __future__ import with_statement
+
+import argparse
+import csv
+import os
+import re
+import struct
+import sys
+from io import open
+
+try:
+    from cryptography import x509
+    from cryptography.hazmat.backends import default_backend
+    from cryptography.hazmat.primitives import serialization
+except ImportError:
+    print('The cryptography package is not installed.'
+          'Please refer to the Get Started section of the ESP-IDF Programming Guide for '
+          'setting up the required packages.')
+    raise
+
+ca_bundle_bin_file = 'x509_crt_bundle'
+
+quiet = False
+
+
+def status(msg):
+    """ Print status message to stderr """
+    if not quiet:
+        critical(msg)
+
+
+def critical(msg):
+    """ Print critical message to stderr """
+    sys.stderr.write('gen_crt_bundle.py: ')
+    sys.stderr.write(msg)
+    sys.stderr.write('\n')
+
+
+class CertificateBundle:
+    def __init__(self):
+        self.certificates = []
+        self.compressed_crts = []
+
+        if os.path.isfile(ca_bundle_bin_file):
+            os.remove(ca_bundle_bin_file)
+
+    def add_from_path(self, crts_path):
+
+        found = False
+        for file_path in os.listdir(crts_path):
+            found |= self.add_from_file(os.path.join(crts_path, file_path))
+
+        if found is False:
+            raise InputError('No valid x509 certificates found in %s' % crts_path)
+
+    def add_from_file(self, file_path):
+        try:
+            if file_path.endswith('.pem'):
+                status('Parsing certificates from %s' % file_path)
+                with open(file_path, 'r', encoding='utf-8') as f:
+                    crt_str = f.read()
+                    self.add_from_pem(crt_str)
+                    return True
+
+            elif file_path.endswith('.der'):
+                status('Parsing certificates from %s' % file_path)
+                with open(file_path, 'rb') as f:
+                    crt_str = f.read()
+                    self.add_from_der(crt_str)
+                    return True
+
+        except ValueError:
+            critical('Invalid certificate in %s' % file_path)
+            raise InputError('Invalid certificate')
+
+        return False
+
+    def add_from_pem(self, crt_str):
+        """ A single PEM file may have multiple certificates """
+
+        crt = ''
+        count = 0
+        start = False
+
+        for strg in crt_str.splitlines(True):
+            if strg == '-----BEGIN CERTIFICATE-----\n' and start is False:
+                crt = ''
+                start = True
+            elif strg == '-----END CERTIFICATE-----\n' and start is True:
+                crt += strg + '\n'
+                start = False
+                self.certificates.append(x509.load_pem_x509_certificate(crt.encode(), default_backend()))
+                count += 1
+            if start is True:
+                crt += strg
+
+        if(count == 0):
+            raise InputError('No certificate found')
+
+        status('Successfully added %d certificates' % count)
+
+    def add_from_der(self, crt_str):
+        self.certificates.append(x509.load_der_x509_certificate(crt_str, default_backend()))
+        status('Successfully added 1 certificate')
+
+    def create_bundle(self):
+        # Sort certificates in order to do binary search when looking up certificates
+        self.certificates = sorted(self.certificates, key=lambda cert: cert.subject.public_bytes(default_backend()))
+
+        bundle = struct.pack('>H', len(self.certificates))
+
+        for crt in self.certificates:
+            """ Read the public key as DER format """
+            pub_key = crt.public_key()
+            pub_key_der = pub_key.public_bytes(serialization.Encoding.DER, serialization.PublicFormat.SubjectPublicKeyInfo)
+
+            """ Read the subject name as DER format """
+            sub_name_der = crt.subject.public_bytes(default_backend())
+
+            name_len = len(sub_name_der)
+            key_len = len(pub_key_der)
+            len_data = struct.pack('>HH', name_len, key_len)
+
+            bundle += len_data
+            bundle += sub_name_der
+            bundle += pub_key_der
+
+        return bundle
+
+    def add_with_filter(self, crts_path, filter_path):
+
+        filter_set = set()
+        with open(filter_path, 'r', encoding='utf-8') as f:
+            csv_reader = csv.reader(f, delimiter=',')
+
+            # Skip header
+            next(csv_reader)
+            for row in csv_reader:
+                filter_set.add(row[1])
+
+        status('Parsing certificates from %s' % crts_path)
+        crt_str = []
+        with open(crts_path, 'r', encoding='utf-8') as f:
+            crt_str = f.read()
+
+            # Split all certs into a list of (name, certificate string) tuples
+            pem_crts = re.findall(r'(^.+?)\n(=+\n[\s\S]+?END CERTIFICATE-----\n)', crt_str, re.MULTILINE)
+
+            filtered_crts = ''
+            for name, crt in pem_crts:
+                if name in filter_set:
+                    filtered_crts += crt
+
+        self.add_from_pem(filtered_crts)
+
+
+class InputError(RuntimeError):
+    def __init__(self, e):
+        super(InputError, self).__init__(e)
+
+
+def main():
+    global quiet
+
+    parser = argparse.ArgumentParser(description='ESP-IDF x509 certificate bundle utility')
+
+    parser.add_argument('--quiet', '-q', help="Don't print non-critical status messages to stderr", action='store_true')
+    parser.add_argument('--input', '-i', nargs='+', required=True,
+                        help='Paths to the custom certificate folders or files to parse, parses all .pem or .der files')
+    parser.add_argument('--filter', '-f', help='Path to CSV-file where the second columns contains the name of the certificates \
+                        that should be included from cacrt_all.pem')
+
+    args = parser.parse_args()
+
+    quiet = args.quiet
+
+    bundle = CertificateBundle()
+
+    for path in args.input:
+        if os.path.isfile(path):
+            if os.path.basename(path) == 'cacrt_all.pem' and args.filter:
+                bundle.add_with_filter(path, args.filter)
+            else:
+                bundle.add_from_file(path)
+        elif os.path.isdir(path):
+            bundle.add_from_path(path)
+        else:
+            raise InputError('Invalid --input=%s, is neither file nor folder' % args.input)
+
+    status('Successfully added %d certificates in total' % len(bundle.certificates))
+
+    crt_bundle = bundle.create_bundle()
+
+    with open(ca_bundle_bin_file, 'wb') as f:
+        f.write(crt_bundle)
+
+
+if __name__ == '__main__':
+    try:
+        main()
+    except InputError as e:
+        print(e)
+        sys.exit(2)
diff --git a/tools/platformio-build-esp32.py b/tools/platformio-build-esp32.py
index fbbfcf3d8e5..fe6775d543d 100644
--- a/tools/platformio-build-esp32.py
+++ b/tools/platformio-build-esp32.py
@@ -24,7 +24,7 @@
 
 # Extends: https://github.com/platformio/platform-espressif32/blob/develop/builder/main.py
 
-from os.path import abspath, isdir, isfile, join, basename
+from os.path import abspath, basename, isdir, isfile, join
 
 from SCons.Script import DefaultEnvironment
 
@@ -100,6 +100,7 @@
         "-u", "pthread_include_pthread_cond_impl",
         "-u", "pthread_include_pthread_local_storage_impl",
         "-u", "pthread_include_pthread_rwlock_impl",
+        "-u", "include_esp_phy_override",
         "-u", "ld_include_highint_hdl",
         "-u", "start_app",
         "-u", "start_app_other_cores",
@@ -112,7 +113,7 @@
         "-u", "newlib_include_pthread_impl",
         "-u", "newlib_include_assert_impl",
         "-u", "__cxa_guard_dummy",
-        '-Wl,-Map="%s"' % join("$BUILD_DIR", basename(env.subst("${PROJECT_DIR}.map")))
+        '-Wl,-Map="%s"' % join("${BUILD_DIR}", "${PROGNAME}.map")
     ],
 
     CPPPATH=[
@@ -126,6 +127,7 @@
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_hw_support", "include", "soc"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_hw_support", "include", "soc", "esp32"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_hw_support", "port", "esp32"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_hw_support", "port", "esp32", "private_include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "heap", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "log", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "lwip", "include", "apps"),
@@ -239,15 +241,14 @@
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "ulp", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "wifi_provisioning", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "button", "button", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "json_parser"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "json_parser", "jsmn", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "json_generator"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "rmaker_common", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "json_parser", "upstream", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "json_parser", "upstream"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "json_generator", "upstream"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_schedule", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_rainmaker", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "qrcode", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "ws2812_led"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_littlefs", "src"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_littlefs", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dsp", "modules", "dotprod", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dsp", "modules", "support", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dsp", "modules", "windows", "include"),
@@ -273,28 +274,34 @@
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dsp", "modules", "common", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dsp", "modules", "kalman", "ekf", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dsp", "modules", "kalman", "ekf_imu13states", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-face", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-face", "include", "tool"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-face", "include", "typedef"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-face", "include", "image"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-face", "include", "math"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-face", "include", "nn"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-face", "include", "layer"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-face", "include", "detect"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-face", "include", "model_zoo"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_littlefs", "src"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_littlefs", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dl", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dl", "include", "tool"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dl", "include", "typedef"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dl", "include", "image"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dl", "include", "math"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dl", "include", "nn"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dl", "include", "layer"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dl", "include", "detect"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-dl", "include", "model_zoo"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-sr", "esp-tts", "esp_tts_chinese", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp-sr", "include", "esp32"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp32-camera", "driver", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp32-camera", "conversions", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "fb_gfx", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", env.BoardConfig().get("build.arduino.memory_type", "qspi_qspi"), "include"),
         join(FRAMEWORK_DIR, "cores", env.BoardConfig().get("build.core"))
     ],
 
     LIBPATH=[
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "lib"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "ld")
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "ld"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", env.BoardConfig().get("build.arduino.memory_type", "qspi_qspi"))
     ],
 
     LIBS=[
-        "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lperfmon", "-lspiffs", "-lulp", "-lwifi_provisioning", "-lbutton", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lesp_rainmaker", "-lqrcode", "-lws2812_led", "-lesp-dsp", "-lesp32-camera", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lperfmon", "-lesp_adc_cal", "-lesp_hid", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lesp_rainmaker", "-lmqtt", "-lwifi_provisioning", "-lprotocomm", "-lbt", "-lbtdm_app", "-lprotobuf-c", "-lmdns", "-ljson", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lqrcode", "-lcat_face_detect", "-lhuman_face_detect", "-lcolor_detect", "-lmfn", "-ldl", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lesp_phy", "-lphy", "-lrtc", "-lesp_phy", "-lphy", "-lrtc", "-lxt_hal", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
+        "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lperfmon", "-lspiffs", "-lulp", "-lwifi_provisioning", "-lbutton", "-lrmaker_common", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lesp_rainmaker", "-lqrcode", "-lws2812_led", "-lesp-dsp", "-lesp-sr", "-lesp32-camera", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_lcd", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lperfmon", "-lesp_adc_cal", "-lesp_hid", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lesp_rainmaker", "-lesp_local_ctrl", "-lwifi_provisioning", "-lprotocomm", "-lbt", "-lbtdm_app", "-lprotobuf-c", "-lmdns", "-lrmaker_common", "-lmqtt", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lqrcode", "-lcat_face_detect", "-lhuman_face_detect", "-lcolor_detect", "-lmfn", "-ldl", "-lwakenet", "-lmultinet", "-lesp_audio_processor", "-lesp_audio_front_end", "-lesp-sr", "-lwakenet", "-lmultinet", "-lesp_audio_processor", "-lesp_audio_front_end", "-ljson", "-lspiffs", "-ldl_lib", "-lc_speech_features", "-lhilexin_wn5", "-lhilexin_wn5X2", "-lhilexin_wn5X3", "-lnihaoxiaozhi_wn5", "-lnihaoxiaozhi_wn5X2", "-lnihaoxiaozhi_wn5X3", "-lnihaoxiaoxin_wn5X3", "-lcustomized_word_wn5", "-lmultinet2_ch", "-lesp_tts_chinese", "-lvoice_set_xiaole", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lesp_phy", "-lphy", "-lrtc", "-lesp_phy", "-lphy", "-lrtc", "-lxt_hal", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
     ],
 
     CPPDEFINES=[
@@ -303,7 +310,7 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-beta1-189-ga79dc75f0a\\"'),
+        ("IDF_VER", '\\"v4.4.1-1-gb8050b365e\\"'),
         "ESP_PLATFORM",
         "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",
@@ -312,7 +319,8 @@
         ("ARDUINO", 10812),
         ("ARDUINO_VARIANT", '\\"%s\\"' % env.BoardConfig().get("build.variant").replace('"', "")),
         ("ARDUINO_BOARD", '\\"%s\\"' % env.BoardConfig().get("name").replace('"', "")),
-        "ARDUINO_PARTITION_%s" % env.BoardConfig().get("build.partitions", "default.csv").replace(".csv", "")
+        "ARDUINO_PARTITION_%s" % basename(env.BoardConfig().get(
+            "build.partitions", "default.csv")).replace(".csv", "").replace("-", "_")
     ],
 
     LIBSOURCE_DIRS=[
@@ -324,6 +332,12 @@
         ("0x8000", join(env.subst("$BUILD_DIR"), "partitions.bin")),
         ("0xe000", join(FRAMEWORK_DIR, "tools", "partitions", "boot_app0.bin"))
     ]
+    + [
+        (offset, join(FRAMEWORK_DIR, img))
+        for offset, img in env.BoardConfig().get(
+            "upload.arduino.flash_extra_images", []
+        )
+    ],
 )
 
 #
diff --git a/tools/platformio-build-esp32c3.py b/tools/platformio-build-esp32c3.py
index f0f86d5ba9e..1557a0806c7 100644
--- a/tools/platformio-build-esp32c3.py
+++ b/tools/platformio-build-esp32c3.py
@@ -24,7 +24,7 @@
 
 # Extends: https://github.com/platformio/platform-espressif32/blob/develop/builder/main.py
 
-from os.path import abspath, isdir, isfile, join, basename
+from os.path import abspath, basename, isdir, isfile, join
 
 from SCons.Script import DefaultEnvironment
 
@@ -48,7 +48,7 @@
     CXXFLAGS=[
         "-march=rv32imc",
         "-std=gnu++11",
-        "-fno-exceptions",
+        "-fexceptions",
         "-fno-rtti"
     ],
 
@@ -66,6 +66,8 @@
         "-Wno-format",
         "-Os",
         "-freorder-blocks",
+        "-Wwrite-strings",
+        "-fstack-protector",
         "-fstrict-volatile-bitfields",
         "-Wno-error=unused-but-set-variable",
         "-fno-jump-tables",
@@ -82,35 +84,6 @@
         "-fno-rtti",
         "-fno-lto",
         "-Wl,--undefined=uxTopUsedPriority",
-        "-Wl,--wrap=_Unwind_SetEnableExceptionFdeSorting",
-        "-Wl,--wrap=__register_frame_info_bases",
-        "-Wl,--wrap=__register_frame_info",
-        "-Wl,--wrap=__register_frame",
-        "-Wl,--wrap=__register_frame_info_table_bases",
-        "-Wl,--wrap=__register_frame_info_table",
-        "-Wl,--wrap=__register_frame_table",
-        "-Wl,--wrap=__deregister_frame_info_bases",
-        "-Wl,--wrap=__deregister_frame_info",
-        "-Wl,--wrap=_Unwind_Find_FDE",
-        "-Wl,--wrap=_Unwind_GetGR",
-        "-Wl,--wrap=_Unwind_GetCFA",
-        "-Wl,--wrap=_Unwind_GetIP",
-        "-Wl,--wrap=_Unwind_GetIPInfo",
-        "-Wl,--wrap=_Unwind_GetRegionStart",
-        "-Wl,--wrap=_Unwind_GetDataRelBase",
-        "-Wl,--wrap=_Unwind_GetTextRelBase",
-        "-Wl,--wrap=_Unwind_SetIP",
-        "-Wl,--wrap=_Unwind_SetGR",
-        "-Wl,--wrap=_Unwind_GetLanguageSpecificData",
-        "-Wl,--wrap=_Unwind_FindEnclosingFunction",
-        "-Wl,--wrap=_Unwind_Resume",
-        "-Wl,--wrap=_Unwind_RaiseException",
-        "-Wl,--wrap=_Unwind_DeleteException",
-        "-Wl,--wrap=_Unwind_ForcedUnwind",
-        "-Wl,--wrap=_Unwind_Resume_or_Rethrow",
-        "-Wl,--wrap=_Unwind_Backtrace",
-        "-Wl,--wrap=__cxa_call_unexpected",
-        "-Wl,--wrap=__gxx_personality_v0",
         "-T", "memory.ld",
         "-T", "sections.ld",
         "-T", "esp32c3.rom.ld",
@@ -118,6 +91,7 @@
         "-T", "esp32c3.rom.libgcc.ld",
         "-T", "esp32c3.rom.newlib.ld",
         "-T", "esp32c3.rom.version.ld",
+        "-T", "esp32c3.rom.newlib-time.ld",
         "-T", "esp32c3.rom.eco3.ld",
         "-T", "esp32c3.peripherals.ld",
         "-u", "_Z5setupv",
@@ -127,6 +101,7 @@
         "-u", "pthread_include_pthread_cond_impl",
         "-u", "pthread_include_pthread_local_storage_impl",
         "-u", "pthread_include_pthread_rwlock_impl",
+        "-u", "include_esp_phy_override",
         "-u", "start_app",
         "-u", "__ubsan_include",
         "-u", "__assert_func",
@@ -137,8 +112,7 @@
         "-u", "newlib_include_pthread_impl",
         "-u", "newlib_include_assert_impl",
         "-u", "__cxa_guard_dummy",
-        "-u", "__cxx_fatal_exception",
-        '-Wl,-Map="%s"' % join("$BUILD_DIR", basename(env.subst("${PROJECT_DIR}.map")))
+        '-Wl,-Map="%s"' % join("${BUILD_DIR}", "${PROGNAME}.map")
     ],
 
     CPPPATH=[
@@ -263,28 +237,64 @@
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "openssl", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "spiffs", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "wifi_provisioning", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "button", "button", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "rmaker_common", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "json_parser", "upstream", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "json_parser", "upstream"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "json_generator", "upstream"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_schedule", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_rainmaker", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "qrcode", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "ws2812_led"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "dotprod", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "support", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "windows", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "windows", "hann", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "windows", "blackman", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "windows", "blackman_harris", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "windows", "blackman_nuttall", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "windows", "nuttall", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "windows", "flat_top", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "iir", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "fir", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "math", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "math", "add", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "math", "sub", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "math", "mul", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "math", "addc", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "math", "mulc", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "math", "sqrt", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "matrix", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "fft", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "dct", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "conv", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "common", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "kalman", "ekf", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dsp", "modules", "kalman", "ekf_imu13states", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_littlefs", "src"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_littlefs", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-face", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-face", "include", "tool"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-face", "include", "typedef"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-face", "include", "image"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-face", "include", "math"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-face", "include", "nn"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-face", "include", "layer"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-face", "include", "detect"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-face", "include", "model_zoo"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dl", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dl", "include", "tool"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dl", "include", "typedef"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dl", "include", "image"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dl", "include", "math"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dl", "include", "nn"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dl", "include", "layer"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dl", "include", "detect"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp-dl", "include", "model_zoo"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "fb_gfx", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", env.BoardConfig().get("build.arduino.memory_type", "qspi_qspi"), "include"),
         join(FRAMEWORK_DIR, "cores", env.BoardConfig().get("build.core"))
     ],
 
     LIBPATH=[
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "lib"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "ld")
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "ld"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", env.BoardConfig().get("build.arduino.memory_type", "qspi_qspi"))
     ],
 
     LIBS=[
-        "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_https_server", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lmqtt", "-lesp_adc_cal", "-lesp_hid", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lprotocomm", "-lbt", "-lbtdm_app", "-lprotobuf-c", "-lmdns", "-ljson", "-lcat_face_detect", "-lhuman_face_detect", "-lcolor_detect", "-lmfn", "-ldl", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lbtbb", "-lesp_phy", "-lphy", "-lbtbb", "-lesp_phy", "-lphy", "-lbtbb", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
+        "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lbutton", "-lrmaker_common", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lesp_rainmaker", "-lqrcode", "-lws2812_led", "-lesp-dsp", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_lcd", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lesp_adc_cal", "-lesp_hid", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lesp_rainmaker", "-lesp_local_ctrl", "-lesp_https_server", "-lwifi_provisioning", "-lprotocomm", "-lbt", "-lbtdm_app", "-lprotobuf-c", "-lmdns", "-ljson", "-lrmaker_common", "-lmqtt", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lqrcode", "-lcat_face_detect", "-lhuman_face_detect", "-lcolor_detect", "-lmfn", "-ldl", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lbtbb", "-lesp_phy", "-lphy", "-lbtbb", "-lesp_phy", "-lphy", "-lbtbb", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
     ],
 
     CPPDEFINES=[
@@ -293,7 +303,7 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-beta1-189-ga79dc75f0a\\"'),
+        ("IDF_VER", '\\"v4.4.1-1-gb8050b365e\\"'),
         "ESP_PLATFORM",
         "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",
@@ -302,7 +312,8 @@
         ("ARDUINO", 10812),
         ("ARDUINO_VARIANT", '\\"%s\\"' % env.BoardConfig().get("build.variant").replace('"', "")),
         ("ARDUINO_BOARD", '\\"%s\\"' % env.BoardConfig().get("name").replace('"', "")),
-        "ARDUINO_PARTITION_%s" % env.BoardConfig().get("build.partitions", "default.csv").replace(".csv", "")
+        "ARDUINO_PARTITION_%s" % basename(env.BoardConfig().get(
+            "build.partitions", "default.csv")).replace(".csv", "").replace("-", "_")
     ],
 
     LIBSOURCE_DIRS=[
@@ -314,6 +325,12 @@
         ("0x8000", join(env.subst("$BUILD_DIR"), "partitions.bin")),
         ("0xe000", join(FRAMEWORK_DIR, "tools", "partitions", "boot_app0.bin"))
     ]
+    + [
+        (offset, join(FRAMEWORK_DIR, img))
+        for offset, img in env.BoardConfig().get(
+            "upload.arduino.flash_extra_images", []
+        )
+    ],
 )
 
 #
diff --git a/tools/platformio-build-esp32s2.py b/tools/platformio-build-esp32s2.py
index 5e4d496de6e..3aff44ad516 100644
--- a/tools/platformio-build-esp32s2.py
+++ b/tools/platformio-build-esp32s2.py
@@ -24,7 +24,7 @@
 
 # Extends: https://github.com/platformio/platform-espressif32/blob/develop/builder/main.py
 
-from os.path import abspath, isdir, isfile, join, basename
+from os.path import abspath, basename, isdir, isfile, join
 
 from SCons.Script import DefaultEnvironment
 
@@ -88,6 +88,7 @@
         "-T", "esp32s2.rom.newlib-funcs.ld",
         "-T", "esp32s2.rom.newlib-data.ld",
         "-T", "esp32s2.rom.spiflash.ld",
+        "-T", "esp32s2.rom.newlib-time.ld",
         "-T", "esp32s2.peripherals.ld",
         "-u", "_Z5setupv",
         "-u", "_Z4loopv",
@@ -96,6 +97,7 @@
         "-u", "pthread_include_pthread_cond_impl",
         "-u", "pthread_include_pthread_local_storage_impl",
         "-u", "pthread_include_pthread_rwlock_impl",
+        "-u", "include_esp_phy_override",
         "-u", "ld_include_highint_hdl",
         "-u", "start_app",
         "-u", "__ubsan_include",
@@ -107,7 +109,7 @@
         "-u", "newlib_include_pthread_impl",
         "-u", "newlib_include_assert_impl",
         "-u", "__cxa_guard_dummy",
-        '-Wl,-Map="%s"' % join("$BUILD_DIR", basename(env.subst("${PROJECT_DIR}.map")))
+        '-Wl,-Map="%s"' % join("${BUILD_DIR}", "${PROGNAME}.map")
     ],
 
     CPPPATH=[
@@ -230,11 +232,15 @@
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "touch_element", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "ulp", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "wifi_provisioning", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "freertos", "include", "freertos"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "arduino_tinyusb", "tinyusb", "src"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "arduino_tinyusb", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_littlefs", "src"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_littlefs", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "button", "button", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "rmaker_common", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "json_parser", "upstream", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "json_parser", "upstream"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "json_generator", "upstream"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_schedule", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_rainmaker", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "qrcode", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "ws2812_led"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dsp", "modules", "dotprod", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dsp", "modules", "support", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dsp", "modules", "windows", "include"),
@@ -260,28 +266,37 @@
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dsp", "modules", "common", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dsp", "modules", "kalman", "ekf", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dsp", "modules", "kalman", "ekf_imu13states", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "include", "tool"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "include", "typedef"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "include", "image"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "include", "math"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "include", "nn"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "include", "layer"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "include", "detect"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "include", "model_zoo"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "freertos", "include", "freertos"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "arduino_tinyusb", "tinyusb", "src"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "arduino_tinyusb", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_littlefs", "src"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_littlefs", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dl", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dl", "include", "tool"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dl", "include", "typedef"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dl", "include", "image"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dl", "include", "math"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dl", "include", "nn"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dl", "include", "layer"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dl", "include", "detect"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dl", "include", "model_zoo"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-sr", "esp-tts", "esp_tts_chinese", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-sr", "include", "esp32"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp32-camera", "driver", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp32-camera", "conversions", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "fb_gfx", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", env.BoardConfig().get("build.arduino.memory_type", "qspi_qspi"), "include"),
         join(FRAMEWORK_DIR, "cores", env.BoardConfig().get("build.core"))
     ],
 
     LIBPATH=[
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "lib"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "ld")
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "ld"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", env.BoardConfig().get("build.arduino.memory_type", "qspi_qspi"))
     ],
 
     LIBS=[
-        "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lperfmon", "-lspiffs", "-lusb", "-ltouch_element", "-lulp", "-lwifi_provisioning", "-lesp-dsp", "-lesp32-camera", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_https_server", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lmqtt", "-lperfmon", "-lusb", "-ltouch_element", "-lesp_adc_cal", "-lesp_hid", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lprotocomm", "-lprotobuf-c", "-lmdns", "-ljson", "-larduino_tinyusb", "-lcat_face_detect", "-lhuman_face_detect", "-lcolor_detect", "-lmfn", "-ldl", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lesp_phy", "-lphy", "-lesp_phy", "-lphy", "-lxt_hal", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
+        "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lperfmon", "-lspiffs", "-lusb", "-ltouch_element", "-lulp", "-lwifi_provisioning", "-lbutton", "-lrmaker_common", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lesp_rainmaker", "-lqrcode", "-lws2812_led", "-lesp-dsp", "-lesp-sr", "-lesp32-camera", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_lcd", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lperfmon", "-lusb", "-ltouch_element", "-lesp_adc_cal", "-lesp_hid", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lesp_rainmaker", "-lesp_local_ctrl", "-lesp_https_server", "-lwifi_provisioning", "-lprotocomm", "-lprotobuf-c", "-lmdns", "-lrmaker_common", "-lmqtt", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lqrcode", "-larduino_tinyusb", "-lcat_face_detect", "-lhuman_face_detect", "-lcolor_detect", "-lmfn", "-ldl", "-ljson", "-lspiffs", "-lesp_tts_chinese", "-lvoice_set_xiaole", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lesp_phy", "-lphy", "-lesp_phy", "-lphy", "-lxt_hal", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
     ],
 
     CPPDEFINES=[
@@ -290,7 +305,7 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-beta1-189-ga79dc75f0a\\"'),
+        ("IDF_VER", '\\"v4.4.1-1-gb8050b365e\\"'),
         "ESP_PLATFORM",
         "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",
@@ -299,7 +314,8 @@
         ("ARDUINO", 10812),
         ("ARDUINO_VARIANT", '\\"%s\\"' % env.BoardConfig().get("build.variant").replace('"', "")),
         ("ARDUINO_BOARD", '\\"%s\\"' % env.BoardConfig().get("name").replace('"', "")),
-        "ARDUINO_PARTITION_%s" % env.BoardConfig().get("build.partitions", "default.csv").replace(".csv", "")
+        "ARDUINO_PARTITION_%s" % basename(env.BoardConfig().get(
+            "build.partitions", "default.csv")).replace(".csv", "").replace("-", "_")
     ],
 
     LIBSOURCE_DIRS=[
@@ -311,6 +327,12 @@
         ("0x8000", join(env.subst("$BUILD_DIR"), "partitions.bin")),
         ("0xe000", join(FRAMEWORK_DIR, "tools", "partitions", "boot_app0.bin"))
     ]
+    + [
+        (offset, join(FRAMEWORK_DIR, img))
+        for offset, img in env.BoardConfig().get(
+            "upload.arduino.flash_extra_images", []
+        )
+    ],
 )
 
 #
diff --git a/tools/platformio-build-esp32s3.py b/tools/platformio-build-esp32s3.py
new file mode 100644
index 00000000000..1733393ee11
--- /dev/null
+++ b/tools/platformio-build-esp32s3.py
@@ -0,0 +1,403 @@
+# Copyright 2014-present PlatformIO <contact@platformio.org>
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#    http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""
+Arduino
+
+Arduino Wiring-based Framework allows writing cross-platform software to
+control devices attached to a wide range of Arduino boards to create all
+kinds of creative coding, interactive objects, spaces or physical experiences.
+
+http://arduino.cc/en/Reference/HomePage
+"""
+
+# Extends: https://github.com/platformio/platform-espressif32/blob/develop/builder/main.py
+
+from os.path import abspath, basename, isdir, isfile, join
+
+from SCons.Script import DefaultEnvironment
+
+env = DefaultEnvironment()
+platform = env.PioPlatform()
+
+FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoespressif32")
+assert isdir(FRAMEWORK_DIR)
+
+env.Append(
+    ASFLAGS=[
+        "-x", "assembler-with-cpp"
+    ],
+
+    CFLAGS=[
+        "-mlongcalls",
+        "-std=gnu99",
+        "-Wno-old-style-declaration"
+    ],
+
+    CXXFLAGS=[
+        "-mlongcalls",
+        "-std=gnu++11",
+        "-fexceptions",
+        "-fno-rtti"
+    ],
+
+    CCFLAGS=[
+        "-ffunction-sections",
+        "-fdata-sections",
+        "-Wno-error=unused-function",
+        "-Wno-error=unused-variable",
+        "-Wno-error=deprecated-declarations",
+        "-Wno-unused-parameter",
+        "-Wno-sign-compare",
+        "-ggdb",
+        "-Os",
+        "-freorder-blocks",
+        "-Wwrite-strings",
+        "-fstack-protector",
+        "-fstrict-volatile-bitfields",
+        "-Wno-error=unused-but-set-variable",
+        "-fno-jump-tables",
+        "-fno-tree-switch-conversion",
+        "-MMD"
+    ],
+
+    LINKFLAGS=[
+        "-mlongcalls",
+        "-Wl,--cref",
+        "-Wl,--gc-sections",
+        "-fno-rtti",
+        "-fno-lto",
+        "-Wl,--wrap=longjmp",
+        "-Wl,--undefined=uxTopUsedPriority",
+        "-T", "memory.ld",
+        "-T", "sections.ld",
+        "-T", "esp32s3.rom.ld",
+        "-T", "esp32s3.rom.api.ld",
+        "-T", "esp32s3.rom.libgcc.ld",
+        "-T", "esp32s3.rom.newlib.ld",
+        "-T", "esp32s3.rom.version.ld",
+        "-T", "esp32s3.rom.newlib-time.ld",
+        "-T", "esp32s3.peripherals.ld",
+        "-u", "_Z5setupv",
+        "-u", "_Z4loopv",
+        "-u", "esp_app_desc",
+        "-u", "pthread_include_pthread_impl",
+        "-u", "pthread_include_pthread_cond_impl",
+        "-u", "pthread_include_pthread_local_storage_impl",
+        "-u", "pthread_include_pthread_rwlock_impl",
+        "-u", "include_esp_phy_override",
+        "-u", "ld_include_highint_hdl",
+        "-u", "start_app",
+        "-u", "start_app_other_cores",
+        "-u", "__ubsan_include",
+        "-u", "__assert_func",
+        "-u", "vfs_include_syscalls_impl",
+        "-u", "app_main",
+        "-u", "newlib_include_heap_impl",
+        "-u", "newlib_include_syscalls_impl",
+        "-u", "newlib_include_pthread_impl",
+        "-u", "newlib_include_assert_impl",
+        "-u", "__cxa_guard_dummy",
+        '-Wl,-Map="%s"' % join("${BUILD_DIR}", "${PROGNAME}.map")
+    ],
+
+    CPPPATH=[
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "config"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "newlib", "platform_include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "freertos", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "freertos", "include", "esp_additions", "freertos"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "freertos", "port", "xtensa", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "freertos", "include", "esp_additions"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_hw_support", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_hw_support", "include", "soc"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_hw_support", "include", "soc", "esp32s3"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_hw_support", "port", "esp32s3"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_hw_support", "port", "esp32s3", "private_include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "heap", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "log", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "lwip", "include", "apps"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "lwip", "include", "apps", "sntp"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "lwip", "lwip", "src", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "lwip", "port", "esp32", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "lwip", "port", "esp32", "include", "arch"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "soc", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "soc", "esp32s3"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "soc", "esp32s3", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "hal", "esp32s3", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "hal", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "hal", "platform_port", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_rom", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_rom", "include", "esp32s3"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_rom", "esp32s3"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_common", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_system", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_system", "port", "soc"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_system", "port", "public_compat"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "xtensa", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "xtensa", "esp32s3", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "driver", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "driver", "esp32s3", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_pm", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_ringbuf", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "efuse", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "efuse", "esp32s3", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "vfs", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_wifi", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_event", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_netif", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_eth", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "tcpip_adapter", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_phy", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_phy", "esp32s3", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_ipc", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "app_trace", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_timer", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "mbedtls", "port", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "mbedtls", "mbedtls", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "mbedtls", "esp_crt_bundle", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "app_update", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "spi_flash", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bootloader_support", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "nvs_flash", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "pthread", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_gdbstub", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_gdbstub", "xtensa"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_gdbstub", "esp32s3"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "espcoredump", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "espcoredump", "include", "port", "xtensa"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "wpa_supplicant", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "wpa_supplicant", "port", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "wpa_supplicant", "esp_supplicant", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "ieee802154", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "console"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "asio", "asio", "asio", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "asio", "port", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "common", "osi", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "include", "esp32s3", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "common", "api", "include", "api"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "common", "btc", "profile", "esp", "blufi", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "common", "btc", "profile", "esp", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "host", "bluedroid", "api", "include", "api"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "mesh_common", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "mesh_common", "tinycrypt", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "mesh_core"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "mesh_core", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "mesh_core", "storage"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "btc", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "mesh_models", "common", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "mesh_models", "client", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "mesh_models", "server", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "api", "core", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "api", "models", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "bt", "esp_ble_mesh", "api"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "cbor", "port", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "unity", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "unity", "unity", "src"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "cmock", "CMock", "src"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "coap", "port", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "coap", "libcoap", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "nghttp", "port", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "nghttp", "nghttp2", "lib", "includes"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-tls"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-tls", "esp-tls-crypto"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_adc_cal", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_hid", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "tcp_transport", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_http_client", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_http_server", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_https_ota", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_https_server", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_lcd", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_lcd", "interface"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "protobuf-c", "protobuf-c"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "protocomm", "include", "common"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "protocomm", "include", "security"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "protocomm", "include", "transports"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "mdns", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_local_ctrl", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "sdmmc", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_serial_slave_link", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_websocket_client", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "expat", "expat", "expat", "lib"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "expat", "port", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "wear_levelling", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "fatfs", "diskio"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "fatfs", "vfs"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "fatfs", "src"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "freemodbus", "common", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "idf_test", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "idf_test", "include", "esp32s3"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "jsmn", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "json", "cJSON"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "libsodium", "libsodium", "src", "libsodium", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "libsodium", "port_include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "mqtt", "esp-mqtt", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "openssl", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "perfmon", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "spiffs", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "usb", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "ulp", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "wifi_provisioning", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "button", "button", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "rmaker_common", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "json_parser", "upstream", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "json_parser", "upstream"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "json_generator", "upstream"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_schedule", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_rainmaker", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "qrcode", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "ws2812_led"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "dotprod", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "support", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "windows", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "windows", "hann", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "windows", "blackman", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "windows", "blackman_harris", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "windows", "blackman_nuttall", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "windows", "nuttall", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "windows", "flat_top", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "iir", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "fir", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "math", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "math", "add", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "math", "sub", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "math", "mul", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "math", "addc", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "math", "mulc", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "math", "sqrt", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "matrix", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "fft", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "dct", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "conv", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "common", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "kalman", "ekf", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dsp", "modules", "kalman", "ekf_imu13states", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "freertos", "include", "freertos"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "arduino_tinyusb", "tinyusb", "src"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "arduino_tinyusb", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_littlefs", "src"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp_littlefs", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dl", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dl", "include", "tool"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dl", "include", "typedef"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dl", "include", "image"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dl", "include", "math"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dl", "include", "nn"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dl", "include", "layer"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dl", "include", "detect"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-dl", "include", "model_zoo"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-sr", "esp-tts", "esp_tts_chinese", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp-sr", "include", "esp32s3"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp32-camera", "driver", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "esp32-camera", "conversions", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "include", "fb_gfx", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", env.BoardConfig().get("build.arduino.memory_type", "qspi_qspi"), "include"),
+        join(FRAMEWORK_DIR, "cores", env.BoardConfig().get("build.core"))
+    ],
+
+    LIBPATH=[
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "lib"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "ld"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", env.BoardConfig().get("build.arduino.memory_type", "qspi_qspi"))
+    ],
+
+    LIBS=[
+        "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lperfmon", "-lspiffs", "-lusb", "-lulp", "-lwifi_provisioning", "-lbutton", "-lrmaker_common", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lesp_rainmaker", "-lqrcode", "-lws2812_led", "-lesp-dsp", "-lesp-sr", "-lesp32-camera", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_lcd", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lperfmon", "-lusb", "-lesp_adc_cal", "-lesp_hid", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lesp_rainmaker", "-lesp_local_ctrl", "-lesp_https_server", "-lwifi_provisioning", "-lprotocomm", "-lbt", "-lbtdm_app", "-lprotobuf-c", "-lmdns", "-lrmaker_common", "-lmqtt", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lqrcode", "-larduino_tinyusb", "-lcat_face_detect", "-lhuman_face_detect", "-lcolor_detect", "-lmfn", "-ldl", "-lwakenet", "-lhufzip", "-lesp_audio_front_end", "-lesp_audio_processor", "-lmultinet", "-lesp-sr", "-lwakenet", "-lhufzip", "-lesp_audio_front_end", "-lesp_audio_processor", "-lmultinet", "-ljson", "-lspiffs", "-ldl_lib", "-lc_speech_features", "-lesp_tts_chinese", "-lvoice_set_xiaole", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-lconsole", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lbtbb", "-lesp_phy", "-lphy", "-lbtbb", "-lesp_phy", "-lphy", "-lbtbb", "-lxt_hal", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
+    ],
+
+    CPPDEFINES=[
+        "HAVE_CONFIG_H",
+        ("MBEDTLS_CONFIG_FILE", '\\"mbedtls/esp_config.h\\"'),
+        "UNITY_INCLUDE_CONFIG_H",
+        "WITH_POSIX",
+        "_GNU_SOURCE",
+        ("IDF_VER", '\\"v4.4.1-1-gb8050b365e\\"'),
+        "ESP_PLATFORM",
+        "_POSIX_READER_WRITER_LOCKS",
+        "ARDUINO_ARCH_ESP32",
+        "ESP32",
+        ("F_CPU", "$BOARD_F_CPU"),
+        ("ARDUINO", 10812),
+        ("ARDUINO_VARIANT", '\\"%s\\"' % env.BoardConfig().get("build.variant").replace('"', "")),
+        ("ARDUINO_BOARD", '\\"%s\\"' % env.BoardConfig().get("name").replace('"', "")),
+        "ARDUINO_PARTITION_%s" % basename(env.BoardConfig().get(
+            "build.partitions", "default.csv")).replace(".csv", "").replace("-", "_")
+    ],
+
+    LIBSOURCE_DIRS=[
+        join(FRAMEWORK_DIR, "libraries")
+    ],
+
+    FLASH_EXTRA_IMAGES=[
+        ("0x0000", join(FRAMEWORK_DIR, "tools", "sdk", "esp32s3", "bin", "bootloader_${BOARD_FLASH_MODE}_${__get_board_f_flash(__env__)}.bin")),
+        ("0x8000", join(env.subst("$BUILD_DIR"), "partitions.bin")),
+        ("0xe000", join(FRAMEWORK_DIR, "tools", "partitions", "boot_app0.bin"))
+    ]
+    + [
+        (offset, join(FRAMEWORK_DIR, img))
+        for offset, img in env.BoardConfig().get(
+            "upload.arduino.flash_extra_images", []
+        )
+    ],
+)
+
+#
+# Target: Build Core Library
+#
+
+libs = []
+
+variants_dir = join(FRAMEWORK_DIR, "variants")
+
+if "build.variants_dir" in env.BoardConfig():
+    variants_dir = join("$PROJECT_DIR", env.BoardConfig().get("build.variants_dir"))
+
+if "build.variant" in env.BoardConfig():
+    env.Append(
+        CPPPATH=[
+            join(variants_dir, env.BoardConfig().get("build.variant"))
+        ]
+    )
+    libs.append(env.BuildLibrary(
+        join("$BUILD_DIR", "FrameworkArduinoVariant"),
+        join(variants_dir, env.BoardConfig().get("build.variant"))
+    ))
+
+envsafe = env.Clone()
+
+libs.append(envsafe.BuildLibrary(
+    join("$BUILD_DIR", "FrameworkArduino"),
+    join(FRAMEWORK_DIR, "cores", env.BoardConfig().get("build.core"))
+))
+
+env.Prepend(LIBS=libs)
+
+#
+# Generate partition table
+#
+
+fwpartitions_dir = join(FRAMEWORK_DIR, "tools", "partitions")
+partitions_csv = env.BoardConfig().get("build.partitions", "default.csv")
+env.Replace(
+    PARTITIONS_TABLE_CSV=abspath(
+        join(fwpartitions_dir, partitions_csv) if isfile(
+            join(fwpartitions_dir, partitions_csv)) else partitions_csv))
+
+partition_table = env.Command(
+    join("$BUILD_DIR", "partitions.bin"),
+    "$PARTITIONS_TABLE_CSV",
+    env.VerboseAction('"$PYTHONEXE" "%s" -q $SOURCE $TARGET' % join(
+        FRAMEWORK_DIR, "tools", "gen_esp32part.py"),
+                      "Generating partitions $TARGET"))
+env.Depends("$BUILD_DIR/$PROGNAME$PROGSUFFIX", partition_table)
diff --git a/tools/sdk/esp32/bin/bootloader_dio_40m.bin b/tools/sdk/esp32/bin/bootloader_dio_40m.bin
index ee6d1d320b2..b134810d704 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dio_40m.bin and b/tools/sdk/esp32/bin/bootloader_dio_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_dio_80m.bin b/tools/sdk/esp32/bin/bootloader_dio_80m.bin
index 238c5578b7b..2f35e47d98d 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dio_80m.bin and b/tools/sdk/esp32/bin/bootloader_dio_80m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_dout_40m.bin b/tools/sdk/esp32/bin/bootloader_dout_40m.bin
index 488a7bbb3fe..685f655930a 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dout_40m.bin and b/tools/sdk/esp32/bin/bootloader_dout_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_dout_80m.bin b/tools/sdk/esp32/bin/bootloader_dout_80m.bin
index 77ed1d3e630..7a11199ee36 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dout_80m.bin and b/tools/sdk/esp32/bin/bootloader_dout_80m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qio_40m.bin b/tools/sdk/esp32/bin/bootloader_qio_40m.bin
index 59b2b6e4413..d316c3b852f 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qio_40m.bin and b/tools/sdk/esp32/bin/bootloader_qio_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qio_80m.bin b/tools/sdk/esp32/bin/bootloader_qio_80m.bin
index 15bf321d2ca..82fd51d672a 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qio_80m.bin and b/tools/sdk/esp32/bin/bootloader_qio_80m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qout_40m.bin b/tools/sdk/esp32/bin/bootloader_qout_40m.bin
index 27f59601fc6..4bb8709cbee 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qout_40m.bin and b/tools/sdk/esp32/bin/bootloader_qout_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qout_80m.bin b/tools/sdk/esp32/bin/bootloader_qout_80m.bin
index 2af6988c83c..311266e9179 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qout_80m.bin and b/tools/sdk/esp32/bin/bootloader_qout_80m.bin differ
diff --git a/tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h b/tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h
index 73c8605e078..285cbb028cf 100644
--- a/tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h
+++ b/tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h
@@ -236,7 +236,7 @@ typedef enum {
 #define ESP_BT_GAP_MIN_INQ_LEN                (0x01)  /*!< Minimum inquiry duration, unit is 1.28s */
 #define ESP_BT_GAP_MAX_INQ_LEN                (0x30)  /*!< Maximum inquiry duration, unit is 1.28s */
 
-/// A2DP state callback parameters
+/// GAP state callback parameters
 typedef union {
     /**
      * @brief ESP_BT_GAP_DISC_RES_EVT
diff --git a/tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h b/tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h
index 3c5c05b178c..55569bc5c84 100644
--- a/tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h
+++ b/tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h
@@ -60,6 +60,9 @@ typedef enum {
 #define ESP_HF_CLIENT_PEER_FEAT_ECC        0x80        /* Enhanced Call Control */
 #define ESP_HF_CLIENT_PEER_FEAT_EXTERR    0x100        /* Extended error codes */
 #define ESP_HF_CLIENT_PEER_FEAT_CODEC     0x200        /* Codec Negotiation */
+/* HFP 1.7+ */
+#define ESP_HF_CLIENT_PEER_FEAT_HF_IND    0x400        /* HF Indicators */
+#define ESP_HF_CLIENT_PEER_FEAT_ESCO_S4   0x800        /* eSCO S4 Setting Supported */
 
 /* CHLD feature masks of AG */
 #define ESP_HF_CLIENT_CHLD_FEAT_REL           0x01       /* 0  Release waiting call or held calls */
diff --git a/tools/sdk/esp32/include/driver/esp32/include/driver/adc.h b/tools/sdk/esp32/include/driver/esp32/include/driver/adc.h
deleted file mode 100644
index c8f05fc9000..00000000000
--- a/tools/sdk/esp32/include/driver/esp32/include/driver/adc.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-#include "driver/adc_common.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*---------------------------------------------------------------
-                    Digital controller setting
----------------------------------------------------------------*/
-
-/**
- * @brief Set I2S data source
- * @param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC.
- * @return
- *     - ESP_OK success
- */
-esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src);
-
-/**
- * @brief Initialize I2S ADC mode
- * @param adc_unit ADC unit index
- * @param channel ADC channel index
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel);
-
-/*---------------------------------------------------------------
-                    RTC controller setting
----------------------------------------------------------------*/
-
-/**
- * @brief Read Hall Sensor
- *
- * @note When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
- *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
- *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
- *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
- *
- * @note The Hall Sensor uses channels 0 and 3 of ADC1. Do not configure
- * these channels for use as ADC channels.
- *
- * @note The ADC1 module must be enabled by calling
- *       adc1_config_width() before calling hall_sensor_read(). ADC1
- *       should be configured for 12 bit readings, as the hall sensor
- *       readings are low values and do not cover the full range of the
- *       ADC.
- *
- * @return The hall sensor reading.
- */
-int hall_sensor_read(void);
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32/include/driver/include/driver/adc.h b/tools/sdk/esp32/include/driver/include/driver/adc.h
new file mode 100644
index 00000000000..5cd19dacd7d
--- /dev/null
+++ b/tools/sdk/esp32/include/driver/include/driver/adc.h
@@ -0,0 +1,646 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "sdkconfig.h"
+#include "driver/gpio.h"
+#include "hal/adc_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO36 */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO37 */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO38 */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO39 */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO32 */
+    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO33 */
+    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO34 */
+    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO35 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO1  */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO2  */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO3  */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO4  */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO5  */
+    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO6  */
+    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO7  */
+    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO8  */
+    ADC1_CHANNEL_8,     /*!< ADC1 channel 8 is GPIO9  */
+    ADC1_CHANNEL_9,     /*!< ADC1 channel 9 is GPIO10 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO1 */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO2 */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO3 */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO4 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#endif // CONFIG_IDF_TARGET_*
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
+/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO4  (ESP32), GPIO11 (ESP32-S2) */
+    ADC2_CHANNEL_1,     /*!< ADC2 channel 1 is GPIO0  (ESP32), GPIO12 (ESP32-S2) */
+    ADC2_CHANNEL_2,     /*!< ADC2 channel 2 is GPIO2  (ESP32), GPIO13 (ESP32-S2) */
+    ADC2_CHANNEL_3,     /*!< ADC2 channel 3 is GPIO15 (ESP32), GPIO14 (ESP32-S2) */
+    ADC2_CHANNEL_4,     /*!< ADC2 channel 4 is GPIO13 (ESP32), GPIO15 (ESP32-S2) */
+    ADC2_CHANNEL_5,     /*!< ADC2 channel 5 is GPIO12 (ESP32), GPIO16 (ESP32-S2) */
+    ADC2_CHANNEL_6,     /*!< ADC2 channel 6 is GPIO14 (ESP32), GPIO17 (ESP32-S2) */
+    ADC2_CHANNEL_7,     /*!< ADC2 channel 7 is GPIO27 (ESP32), GPIO18 (ESP32-S2) */
+    ADC2_CHANNEL_8,     /*!< ADC2 channel 8 is GPIO25 (ESP32), GPIO19 (ESP32-S2) */
+    ADC2_CHANNEL_9,     /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */
+    ADC2_CHANNEL_MAX,
+} adc2_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */
+    ADC2_CHANNEL_MAX,
+} adc2_channel_t;
+#endif
+
+
+/**
+ * @brief ADC rtc controller attenuation option.
+ *
+ * @note  This definitions are only for being back-compatible
+ */
+#define ADC_ATTEN_0db   ADC_ATTEN_DB_0
+#define ADC_ATTEN_2_5db ADC_ATTEN_DB_2_5
+#define ADC_ATTEN_6db   ADC_ATTEN_DB_6
+#define ADC_ATTEN_11db  ADC_ATTEN_DB_11
+
+/**
+ * The default (max) bit width of the ADC of current version. You can also get the maximum bitwidth
+ * by `SOC_ADC_MAX_BITWIDTH` defined in soc_caps.h.
+ */
+#define ADC_WIDTH_BIT_DEFAULT   (ADC_WIDTH_MAX-1)
+
+//this definitions are only for being back-compatible
+#define ADC_WIDTH_9Bit  ADC_WIDTH_BIT_9
+#define ADC_WIDTH_10Bit ADC_WIDTH_BIT_10
+#define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
+#define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
+
+/**
+ * @brief ADC digital controller encode option.
+ *
+ * @deprecated The ESP32-S2 doesn't use I2S DMA. Call ``adc_digi_output_format_t`` instead.
+ */
+typedef enum {
+    ADC_ENCODE_12BIT,        /*!< ADC to DMA data format,          , [15:12]-channel [11:0]-12 bits ADC data */
+    ADC_ENCODE_11BIT,        /*!< ADC to DMA data format, [15]-unit, [14:11]-channel [10:0]-11 bits ADC data */
+    ADC_ENCODE_MAX,
+} adc_i2s_encode_t;
+
+/*---------------------------------------------------------------
+                    Common setting
+---------------------------------------------------------------*/
+
+/**
+ * @brief Enable ADC power
+ * @deprecated Use adc_power_acquire and adc_power_release instead.
+ */
+void adc_power_on(void) __attribute__((deprecated));
+
+/**
+ * @brief Power off SAR ADC
+ * @deprecated Use adc_power_acquire and adc_power_release instead.
+ * This function will force power down for ADC.
+ * This function is deprecated because forcing power ADC power off may
+ * disrupt operation of other components which may be using the ADC.
+ */
+void adc_power_off(void) __attribute__((deprecated));
+
+/**
+ * @brief Increment the usage counter for ADC module.
+ * ADC will stay powered on while the counter is greater than 0.
+ * Call adc_power_release when done using the ADC.
+ */
+void adc_power_acquire(void);
+
+/**
+ * @brief Decrement the usage counter for ADC module.
+ * ADC will stay powered on while the counter is greater than 0.
+ * Call this function when done using the ADC.
+ */
+void adc_power_release(void);
+
+/*---------------------------------------------------------------
+                    ADC Single Read Setting
+---------------------------------------------------------------*/
+/**
+ * @brief Get the GPIO number of a specific ADC1 channel.
+ *
+ * @param channel Channel to get the GPIO number
+ * @param gpio_num output buffer to hold the GPIO number
+ *
+ * @return
+ *   - ESP_OK if success
+ *   - ESP_ERR_INVALID_ARG if channel not valid
+ */
+esp_err_t adc1_pad_get_io_num(adc1_channel_t channel, gpio_num_t *gpio_num);
+
+/**
+ * @brief Set the attenuation of a particular channel on ADC1, and configure its associated GPIO pin mux.
+ *
+ * The default ADC voltage is for attenuation 0 dB and listed in the table below.
+ * By setting higher attenuation it is possible to read higher voltages.
+ *
+ * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
+ * shown in the following table.
+ *
+ *     +----------+-------------+-----------------+
+ *     |          | attenuation | suggested range |
+ *     |    SoC   |     (dB)    |      (mV)       |
+ *     +==========+=============+=================+
+ *     |          |       0     |    100 ~  950   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |    100 ~ 1250   |
+ *     |   ESP32  +-------------+-----------------+
+ *     |          |       6     |    150 ~ 1750   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |    150 ~ 2450   |
+ *     +----------+-------------+-----------------+
+ *     |          |       0     |      0 ~  750   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |      0 ~ 1050   |
+ *     | ESP32-S2 +-------------+-----------------+
+ *     |          |       6     |      0 ~ 1300   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |      0 ~ 2500   |
+ *     +----------+-------------+-----------------+
+ *
+ * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
+ *
+ * @note For any given channel, this function must be called before the first time ``adc1_get_raw()`` is called for that channel.
+ *
+ * @note This function can be called multiple times to configure multiple
+ *       ADC channels simultaneously. You may call ``adc1_get_raw()`` only after configuring a channel.
+ *
+ * @param channel ADC1 channel to configure
+ * @param atten  Attenuation level
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc1_config_channel_atten(adc1_channel_t channel, adc_atten_t atten);
+
+/**
+ * @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1.
+ *        The configuration is for all channels of ADC1
+ * @param width_bit Bit capture width for ADC1
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc1_config_width(adc_bits_width_t width_bit);
+
+/**
+ * @brief Take an ADC1 reading from a single channel.
+ * @note ESP32:
+ *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
+ *       but will remove the glitches on GPIO36 and GPIO39.
+ *
+ * @note Call ``adc1_config_width()`` before the first time this
+ *       function is called.
+ *
+ * @note For any given channel, adc1_config_channel_atten(channel)
+ *       must be called before the first time this function is called. Configuring
+ *       a new channel does not prevent a previously configured channel from being read.
+ *
+ * @param  channel ADC1 channel to read
+ *
+ * @return
+ *     - -1: Parameter error
+ *     -  Other: ADC1 channel reading.
+ */
+int adc1_get_raw(adc1_channel_t channel);
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+//TODO IDF-3610, replace these with proper caps
+/**
+ * @brief Set ADC data invert
+ * @param adc_unit ADC unit index
+ * @param inv_en whether enable data invert
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_set_data_inv(adc_unit_t adc_unit, bool inv_en);
+
+/**
+ * @brief Set ADC source clock
+ * @param clk_div ADC clock divider, ADC clock is divided from APB clock
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t adc_set_clk_div(uint8_t clk_div);
+
+/**
+ * @brief Configure ADC capture width.
+ *
+ * @param adc_unit ADC unit index
+ * @param width_bit Bit capture width for ADC unit.
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
+
+/**
+ * @brief Configure ADC1 to be usable by the ULP
+ *
+ * This function reconfigures ADC1 to be controlled by the ULP.
+ * Effect of this function can be reverted using ``adc1_get_raw()`` function.
+ *
+ * Note that adc1_config_channel_atten, ``adc1_config_width()`` functions need
+ * to be called to configure ADC1 channels, before ADC1 is used by the ULP.
+ */
+void adc1_ulp_enable(void);
+#endif  //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+
+/**
+ * @brief Get the GPIO number of a specific ADC2 channel.
+ *
+ * @param channel Channel to get the GPIO number
+ *
+ * @param gpio_num output buffer to hold the GPIO number
+ *
+ * @return
+ *   - ESP_OK if success
+ *   - ESP_ERR_INVALID_ARG if channel not valid
+ */
+esp_err_t adc2_pad_get_io_num(adc2_channel_t channel, gpio_num_t *gpio_num);
+
+/**
+ * @brief Configure the ADC2 channel, including setting attenuation.
+ *
+ * The default ADC voltage is for attenuation 0 dB and listed in the table below.
+ * By setting higher attenuation it is possible to read higher voltages.
+ *
+ * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
+ * shown in the following table.
+ *
+ *     +----------+-------------+-----------------+
+ *     |          | attenuation | suggested range |
+ *     |    SoC   |     (dB)    |      (mV)       |
+ *     +==========+=============+=================+
+ *     |          |       0     |    100 ~  950   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |    100 ~ 1250   |
+ *     |   ESP32  +-------------+-----------------+
+ *     |          |       6     |    150 ~ 1750   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |    150 ~ 2450   |
+ *     +----------+-------------+-----------------+
+ *     |          |       0     |      0 ~  750   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |      0 ~ 1050   |
+ *     | ESP32-S2 +-------------+-----------------+
+ *     |          |       6     |      0 ~ 1300   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |      0 ~ 2500   |
+ *     +----------+-------------+-----------------+
+ *
+ * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
+ *
+ * @note This function also configures the input GPIO pin mux to
+ *       connect it to the ADC2 channel. It must be called before calling
+ *       ``adc2_get_raw()`` for this channel.
+ *
+ * @note For any given channel, this function must be called before the first time ``adc2_get_raw()`` is called for that channel.
+ *
+ * @param channel ADC2 channel to configure
+ * @param atten  Attenuation level
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten);
+
+/**
+ * @brief Take an ADC2 reading on a single channel
+ *
+ * @note ESP32:
+ *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
+ *       but will remove the glitches on GPIO36 and GPIO39.
+ *
+ *
+ * @note ESP32:
+ *       For a given channel, ``adc2_config_channel_atten()``
+ *       must be called before the first time this function is called. If Wi-Fi is started via ``esp_wifi_start()``, this
+ *       function will always fail with ``ESP_ERR_TIMEOUT``.
+ *
+ * @note ESP32-S2:
+ *       ADC2 support hardware arbiter. The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
+ *       the low priority controller will read the invalid ADC2 data. Default priority: Wi-Fi > RTC > Digital;
+ *
+ * @param channel ADC2 channel to read
+ * @param width_bit Bit capture width for ADC2
+ * @param raw_out the variable to hold the output data.
+ *
+ * @return
+ *     - ESP_OK if success
+ *     - ESP_ERR_TIMEOUT ADC2 is being used by other controller and the request timed out.
+ *     - ESP_ERR_INVALID_STATE The controller status is invalid. Please try again.
+ */
+esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *raw_out);
+
+/**
+ *  @brief Output ADC1 or ADC2's reference voltage to ``adc2_channe_t``'s IO.
+ *
+ *  This function routes the internal reference voltage of ADCn to one of
+ *  ADC2's channels. This reference voltage can then be manually measured
+ *  for calibration purposes.
+ *
+ *  @note  ESP32 only supports output of ADC2's internal reference voltage.
+ *  @param[in]  adc_unit ADC unit index
+ *  @param[in]  gpio     GPIO number (Only ADC2's channels IO are supported)
+ *
+ *  @return
+ *                  - ESP_OK: v_ref successfully routed to selected GPIO
+ *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
+ */
+esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio);
+
+/**
+ *  @brief Output ADC2 reference voltage to ``adc2_channe_t``'s IO.
+ *
+ *  This function routes the internal reference voltage of ADCn to one of
+ *  ADC2's channels. This reference voltage can then be manually measured
+ *  for calibration purposes.
+ *
+ *  @deprecated Use ``adc_vref_to_gpio`` instead.
+ *
+ *  @param[in]  gpio    GPIO number (ADC2's channels are supported)
+ *
+ *  @return
+ *                  - ESP_OK: v_ref successfully routed to selected GPIO
+ *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
+ */
+esp_err_t adc2_vref_to_gpio(gpio_num_t gpio) __attribute__((deprecated));
+
+/*---------------------------------------------------------------
+                    DMA setting
+---------------------------------------------------------------*/
+/**
+ * @brief Digital ADC DMA read max timeout value, it may make the ``adc_digi_read_bytes`` block forever if the OS supports
+ */
+#define ADC_MAX_DELAY UINT32_MAX
+
+/**
+ * @brief ADC DMA driver configuration
+ */
+typedef struct adc_digi_init_config_s {
+    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed.
+    uint32_t conv_num_each_intr;    ///< Bytes of data that can be converted in 1 interrupt.
+    uint32_t adc1_chan_mask;        ///< Channel list of ADC1 to be initialized.
+    uint32_t adc2_chan_mask;        ///< Channel list of ADC2 to be initialized.
+} adc_digi_init_config_t;
+
+/**
+ * @brief ADC digital controller settings
+ */
+typedef struct {
+    bool conv_limit_en;                      ///< To limit ADC conversion times. Conversion stops after finishing `conv_limit_num` times conversion
+    uint32_t conv_limit_num;                 ///< Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255.
+    uint32_t pattern_num;                    ///< Number of ADC channels that will be used
+    adc_digi_pattern_config_t *adc_pattern;    ///< List of configs for each ADC channel that will be used
+    uint32_t sample_freq_hz;  /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
+                                   Fs = Fd / interval / 2
+                                   Fs: sampling frequency;
+                                   Fd: digital controller frequency, no larger than 5M for better performance
+                                   interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
+    adc_digi_convert_mode_t conv_mode;      ///< ADC DMA conversion mode, see `adc_digi_convert_mode_t`.
+    adc_digi_output_format_t format;        ///< ADC DMA conversion output format, see `adc_digi_output_format_t`.
+} adc_digi_configuration_t;
+
+/**
+ * @brief Initialize the Digital ADC.
+ *
+ * @param init_config Pointer to Digital ADC initilization config. Refer to ``adc_digi_init_config_t``.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *         - ESP_ERR_NOT_FOUND     No free interrupt found with the specified flags
+ *         - ESP_ERR_NO_MEM        If out of memory
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config);
+
+/**
+ * @brief Read bytes from Digital ADC through DMA.
+ *
+ * @param[out] buf                 Buffer to read from ADC.
+ * @param[in]  length_max          Expected length of data read from the ADC.
+ * @param[out] out_length          Real length of data read from the ADC via this API.
+ * @param[in]  timeout_ms          Time to wait for data via this API, in millisecond.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid. Usually it means the ADC sampling rate is faster than the task processing rate.
+ *         - ESP_ERR_TIMEOUT       Operation timed out
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_read_bytes(uint8_t *buf, uint32_t length_max, uint32_t *out_length, uint32_t timeout_ms);
+
+/**
+ * @brief Start the Digital ADC and DMA peripherals. After this, the hardware starts working.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_start(void);
+
+/**
+ * @brief Stop the Digital ADC and DMA peripherals. After this, the hardware stops working.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_stop(void);
+
+/**
+ * @brief Deinitialize the Digital ADC.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_deinitialize(void);
+
+/**
+ * @brief Setting the digital controller.
+ *
+ * @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
+ *
+ * @return
+ *      - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *      - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *      - ESP_OK                On success
+ */
+esp_err_t adc_digi_controller_configure(const adc_digi_configuration_t *config);
+
+
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+//TODO IDF-3610
+/**
+ * @brief Reset adc digital controller filter.
+ *
+ * @param idx Filter index.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_reset(adc_digi_filter_idx_t idx);
+
+/**
+ * @brief Set adc digital controller filter configuration.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param config See ``adc_digi_filter_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_set_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
+
+/**
+ * @brief Get adc digital controller filter configuration.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param config See ``adc_digi_filter_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_get_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
+
+/**
+ * @brief Enable/disable adc digital controller filter.
+ *        Filtering the ADC data to obtain smooth data at higher sampling rates.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param enable Enable/Disable filter.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_enable(adc_digi_filter_idx_t idx, bool enable);
+
+/**
+ * @brief Config monitor of adc digital controller.
+ *
+ * @note For ESP32S2, The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
+ *
+ * @param idx Monitor index.
+ * @param config See ``adc_digi_monitor_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_monitor_set_config(adc_digi_monitor_idx_t idx, adc_digi_monitor_t *config);
+
+/**
+ * @brief Enable/disable monitor of adc digital controller.
+ *
+ * @note For ESP32S2, The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
+ *
+ * @param idx Monitor index.
+ * @param enable True or false enable monitor.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_monitor_enable(adc_digi_monitor_idx_t idx, bool enable);
+#endif  //#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+
+#if CONFIG_IDF_TARGET_ESP32
+//TODO IDF-3610
+/**
+ * @brief Read Hall Sensor
+ *
+ * @note When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *
+ * @note The Hall Sensor uses channels 0 and 3 of ADC1. Do not configure
+ * these channels for use as ADC channels.
+ *
+ * @note The ADC1 module must be enabled by calling
+ *       adc1_config_width() before calling hall_sensor_read(). ADC1
+ *       should be configured for 12 bit readings, as the hall sensor
+ *       readings are low values and do not cover the full range of the
+ *       ADC.
+ *
+ * @return The hall sensor reading.
+ */
+int hall_sensor_read(void);
+
+/*---------------------------------------------------------------
+                    To Be Deprecated TODO: IDF-3610
+---------------------------------------------------------------*/
+/**
+ * @brief Set I2S data source
+ * @param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC.
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src);
+
+/**
+ * @brief Initialize I2S ADC mode
+ * @param adc_unit ADC unit index
+ * @param channel ADC channel index
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/driver/include/driver/adc_common.h b/tools/sdk/esp32/include/driver/include/driver/adc_common.h
index 392eb8a15dc..e081f28d154 100644
--- a/tools/sdk/esp32/include/driver/include/driver/adc_common.h
+++ b/tools/sdk/esp32/include/driver/include/driver/adc_common.h
@@ -1,544 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#pragma once
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "esp_err.h"
-#include "sdkconfig.h"
-#include "driver/gpio.h"
-#include "hal/adc_types.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if CONFIG_IDF_TARGET_ESP32
-/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO36 */
-    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO37 */
-    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO38 */
-    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO39 */
-    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO32 */
-    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO33 */
-    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO34 */
-    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO35 */
-    ADC1_CHANNEL_MAX,
-} adc1_channel_t;
-#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
-/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO1  */
-    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO2  */
-    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO3  */
-    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO4  */
-    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO5  */
-    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO6  */
-    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO7  */
-    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO8  */
-    ADC1_CHANNEL_8,     /*!< ADC1 channel 8 is GPIO9  */
-    ADC1_CHANNEL_9,     /*!< ADC1 channel 9 is GPIO10 */
-    ADC1_CHANNEL_MAX,
-} adc1_channel_t;
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */
-    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO1 */
-    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO2 */
-    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO3 */
-    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO4 */
-    ADC1_CHANNEL_MAX,
-} adc1_channel_t;
-#endif // CONFIG_IDF_TARGET_*
-
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
-/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO4  (ESP32), GPIO11 (ESP32-S2) */
-    ADC2_CHANNEL_1,     /*!< ADC2 channel 1 is GPIO0  (ESP32), GPIO12 (ESP32-S2) */
-    ADC2_CHANNEL_2,     /*!< ADC2 channel 2 is GPIO2  (ESP32), GPIO13 (ESP32-S2) */
-    ADC2_CHANNEL_3,     /*!< ADC2 channel 3 is GPIO15 (ESP32), GPIO14 (ESP32-S2) */
-    ADC2_CHANNEL_4,     /*!< ADC2 channel 4 is GPIO13 (ESP32), GPIO15 (ESP32-S2) */
-    ADC2_CHANNEL_5,     /*!< ADC2 channel 5 is GPIO12 (ESP32), GPIO16 (ESP32-S2) */
-    ADC2_CHANNEL_6,     /*!< ADC2 channel 6 is GPIO14 (ESP32), GPIO17 (ESP32-S2) */
-    ADC2_CHANNEL_7,     /*!< ADC2 channel 7 is GPIO27 (ESP32), GPIO18 (ESP32-S2) */
-    ADC2_CHANNEL_8,     /*!< ADC2 channel 8 is GPIO25 (ESP32), GPIO19 (ESP32-S2) */
-    ADC2_CHANNEL_9,     /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */
-    ADC2_CHANNEL_MAX,
-} adc2_channel_t;
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */
-    ADC2_CHANNEL_MAX,
-} adc2_channel_t;
-#endif
-
-
-/**
- * @brief ADC rtc controller attenuation option.
- *
- * @note  This definitions are only for being back-compatible
- */
-#define ADC_ATTEN_0db   ADC_ATTEN_DB_0
-#define ADC_ATTEN_2_5db ADC_ATTEN_DB_2_5
-#define ADC_ATTEN_6db   ADC_ATTEN_DB_6
-#define ADC_ATTEN_11db  ADC_ATTEN_DB_11
-
 /**
- * The default (max) bit width of the ADC of current version. You can also get the maximum bitwidth
- * by `SOC_ADC_MAX_BITWIDTH` defined in soc_caps.h.
+ * This file is only a wrapper for `driver/adc.h` for back-compatability.
  */
-#define ADC_WIDTH_BIT_DEFAULT   (ADC_WIDTH_MAX-1)
-
-//this definitions are only for being back-compatible
-#define ADC_WIDTH_9Bit  ADC_WIDTH_BIT_9
-#define ADC_WIDTH_10Bit ADC_WIDTH_BIT_10
-#define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
-#define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
-
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-/**
- * @brief Digital ADC DMA read max timeout value, it may make the ``adc_digi_read_bytes`` block forever if the OS supports
- */
-#define ADC_MAX_DELAY UINT32_MAX
-#endif
-
-/**
- * @brief ADC digital controller encode option.
- *
- * @deprecated The ESP32-S2 doesn't use I2S DMA. Call ``adc_digi_output_format_t`` instead.
- */
-typedef enum {
-    ADC_ENCODE_12BIT,        /*!< ADC to DMA data format,          , [15:12]-channel [11:0]-12 bits ADC data */
-    ADC_ENCODE_11BIT,        /*!< ADC to DMA data format, [15]-unit, [14:11]-channel [10:0]-11 bits ADC data */
-    ADC_ENCODE_MAX,
-} adc_i2s_encode_t;
-
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-//This feature is currently supported on ESP32C3, will be supported on other chips soon
-/**
- * @brief Digital ADC DMA configuration
- */
-typedef struct adc_digi_init_config_s {
-    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed.
-    uint32_t conv_num_each_intr;    ///< Bytes of data that can be converted in 1 interrupt.
-    uint32_t adc1_chan_mask;        ///< Channel list of ADC1 to be initialized.
-    uint32_t adc2_chan_mask;        ///< Channel list of ADC2 to be initialized.
-} adc_digi_init_config_t;
-#endif
-
-/*---------------------------------------------------------------
-                    Common setting
----------------------------------------------------------------*/
-
-/**
- * @brief Enable ADC power
- * @deprecated Use adc_power_acquire and adc_power_release instead.
- */
-void adc_power_on(void) __attribute__((deprecated));
-
-/**
- * @brief Power off SAR ADC
- * @deprecated Use adc_power_acquire and adc_power_release instead.
- * This function will force power down for ADC.
- * This function is deprecated because forcing power ADC power off may
- * disrupt operation of other components which may be using the ADC.
- */
-void adc_power_off(void) __attribute__((deprecated));
-
-/**
- * @brief Increment the usage counter for ADC module.
- * ADC will stay powered on while the counter is greater than 0.
- * Call adc_power_release when done using the ADC.
- */
-void adc_power_acquire(void);
-
-/**
- * @brief Decrement the usage counter for ADC module.
- * ADC will stay powered on while the counter is greater than 0.
- * Call this function when done using the ADC.
- */
-void adc_power_release(void);
-
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * @brief Initialize ADC pad
- * @param adc_unit ADC unit index
- * @param channel ADC channel index
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel);
-#endif //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
-/*---------------------------------------------------------------
-                    ADC Single Read Setting
----------------------------------------------------------------*/
-/**
- * @brief Get the GPIO number of a specific ADC1 channel.
- *
- * @param channel Channel to get the GPIO number
- * @param gpio_num output buffer to hold the GPIO number
- *
- * @return
- *   - ESP_OK if success
- *   - ESP_ERR_INVALID_ARG if channel not valid
- */
-esp_err_t adc1_pad_get_io_num(adc1_channel_t channel, gpio_num_t *gpio_num);
-
-/**
- * @brief Set the attenuation of a particular channel on ADC1, and configure its associated GPIO pin mux.
- *
- * The default ADC voltage is for attenuation 0 dB and listed in the table below.
- * By setting higher attenuation it is possible to read higher voltages.
- *
- * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
- * shown in the following table.
- *
- *     +----------+-------------+-----------------+
- *     |          | attenuation | suggested range |
- *     |    SoC   |     (dB)    |      (mV)       |
- *     +==========+=============+=================+
- *     |          |       0     |    100 ~  950   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |    100 ~ 1250   |
- *     |   ESP32  +-------------+-----------------+
- *     |          |       6     |    150 ~ 1750   |
- *     |          +-------------+-----------------+
- *     |          |      11     |    150 ~ 2450   |
- *     +----------+-------------+-----------------+
- *     |          |       0     |      0 ~  750   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |      0 ~ 1050   |
- *     | ESP32-S2 +-------------+-----------------+
- *     |          |       6     |      0 ~ 1300   |
- *     |          +-------------+-----------------+
- *     |          |      11     |      0 ~ 2500   |
- *     +----------+-------------+-----------------+
- *
- * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
- *
- * @note For any given channel, this function must be called before the first time ``adc1_get_raw()`` is called for that channel.
- *
- * @note This function can be called multiple times to configure multiple
- *       ADC channels simultaneously. You may call ``adc1_get_raw()`` only after configuring a channel.
- *
- * @param channel ADC1 channel to configure
- * @param atten  Attenuation level
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc1_config_channel_atten(adc1_channel_t channel, adc_atten_t atten);
-
-/**
- * @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1.
- *        The configuration is for all channels of ADC1
- * @param width_bit Bit capture width for ADC1
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc1_config_width(adc_bits_width_t width_bit);
-
-/**
- * @brief Take an ADC1 reading from a single channel.
- * @note ESP32:
- *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
- *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
- *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
- *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
- *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
- *       but will remove the glitches on GPIO36 and GPIO39.
- *
- * @note Call ``adc1_config_width()`` before the first time this
- *       function is called.
- *
- * @note For any given channel, adc1_config_channel_atten(channel)
- *       must be called before the first time this function is called. Configuring
- *       a new channel does not prevent a previously configured channel from being read.
- *
- * @param  channel ADC1 channel to read
- *
- * @return
- *     - -1: Parameter error
- *     -  Other: ADC1 channel reading.
- */
-int adc1_get_raw(adc1_channel_t channel);
-
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * @brief Set ADC data invert
- * @param adc_unit ADC unit index
- * @param inv_en whether enable data invert
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_set_data_inv(adc_unit_t adc_unit, bool inv_en);
-
-/**
- * @brief Set ADC source clock
- * @param clk_div ADC clock divider, ADC clock is divided from APB clock
- * @return
- *     - ESP_OK success
- */
-esp_err_t adc_set_clk_div(uint8_t clk_div);
-
-/**
- * @brief Configure ADC capture width.
- *
- * @param adc_unit ADC unit index
- * @param width_bit Bit capture width for ADC unit.
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
-
-/**
- * @brief Configure ADC1 to be usable by the ULP
- *
- * This function reconfigures ADC1 to be controlled by the ULP.
- * Effect of this function can be reverted using ``adc1_get_raw()`` function.
- *
- * Note that adc1_config_channel_atten, ``adc1_config_width()`` functions need
- * to be called to configure ADC1 channels, before ADC1 is used by the ULP.
- */
-void adc1_ulp_enable(void);
-#endif  //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
-/**
- * @brief Get the GPIO number of a specific ADC2 channel.
- *
- * @param channel Channel to get the GPIO number
- *
- * @param gpio_num output buffer to hold the GPIO number
- *
- * @return
- *   - ESP_OK if success
- *   - ESP_ERR_INVALID_ARG if channel not valid
- */
-esp_err_t adc2_pad_get_io_num(adc2_channel_t channel, gpio_num_t *gpio_num);
-
-/**
- * @brief Configure the ADC2 channel, including setting attenuation.
- *
- * The default ADC voltage is for attenuation 0 dB and listed in the table below.
- * By setting higher attenuation it is possible to read higher voltages.
- *
- * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
- * shown in the following table.
- *
- *     +----------+-------------+-----------------+
- *     |          | attenuation | suggested range |
- *     |    SoC   |     (dB)    |      (mV)       |
- *     +==========+=============+=================+
- *     |          |       0     |    100 ~  950   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |    100 ~ 1250   |
- *     |   ESP32  +-------------+-----------------+
- *     |          |       6     |    150 ~ 1750   |
- *     |          +-------------+-----------------+
- *     |          |      11     |    150 ~ 2450   |
- *     +----------+-------------+-----------------+
- *     |          |       0     |      0 ~  750   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |      0 ~ 1050   |
- *     | ESP32-S2 +-------------+-----------------+
- *     |          |       6     |      0 ~ 1300   |
- *     |          +-------------+-----------------+
- *     |          |      11     |      0 ~ 2500   |
- *     +----------+-------------+-----------------+
- *
- * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
- *
- * @note This function also configures the input GPIO pin mux to
- *       connect it to the ADC2 channel. It must be called before calling
- *       ``adc2_get_raw()`` for this channel.
- *
- * @note For any given channel, this function must be called before the first time ``adc2_get_raw()`` is called for that channel.
- *
- * @param channel ADC2 channel to configure
- * @param atten  Attenuation level
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten);
-
-/**
- * @brief Take an ADC2 reading on a single channel
- *
- * @note ESP32:
- *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
- *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
- *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
- *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
- *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
- *       but will remove the glitches on GPIO36 and GPIO39.
- *
- *
- * @note ESP32:
- *       For a given channel, ``adc2_config_channel_atten()``
- *       must be called before the first time this function is called. If Wi-Fi is started via ``esp_wifi_start()``, this
- *       function will always fail with ``ESP_ERR_TIMEOUT``.
- *
- * @note ESP32-S2:
- *       ADC2 support hardware arbiter. The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
- *       the low priority controller will read the invalid ADC2 data. Default priority: Wi-Fi > RTC > Digital;
- *
- * @param channel ADC2 channel to read
- * @param width_bit Bit capture width for ADC2
- * @param raw_out the variable to hold the output data.
- *
- * @return
- *     - ESP_OK if success
- *     - ESP_ERR_TIMEOUT ADC2 is being used by other controller and the request timed out.
- *     - ESP_ERR_INVALID_STATE The controller status is invalid. Please try again.
- */
-esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *raw_out);
-
-/**
- *  @brief Output ADC1 or ADC2's reference voltage to ``adc2_channe_t``'s IO.
- *
- *  This function routes the internal reference voltage of ADCn to one of
- *  ADC2's channels. This reference voltage can then be manually measured
- *  for calibration purposes.
- *
- *  @note  ESP32 only supports output of ADC2's internal reference voltage.
- *  @param[in]  adc_unit ADC unit index
- *  @param[in]  gpio     GPIO number (Only ADC2's channels IO are supported)
- *
- *  @return
- *                  - ESP_OK: v_ref successfully routed to selected GPIO
- *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
- */
-esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio);
-
-/**
- *  @brief Output ADC2 reference voltage to ``adc2_channe_t``'s IO.
- *
- *  This function routes the internal reference voltage of ADCn to one of
- *  ADC2's channels. This reference voltage can then be manually measured
- *  for calibration purposes.
- *
- *  @deprecated Use ``adc_vref_to_gpio`` instead.
- *
- *  @param[in]  gpio    GPIO number (ADC2's channels are supported)
- *
- *  @return
- *                  - ESP_OK: v_ref successfully routed to selected GPIO
- *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
- */
-esp_err_t adc2_vref_to_gpio(gpio_num_t gpio) __attribute__((deprecated));
-
-/*---------------------------------------------------------------
-                    Digital controller setting
----------------------------------------------------------------*/
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
-//These APIs are only supported on ESP32 and ESP32-S2. On ESP32-C3 and later chips, please use ``adc_digi_initialize`` and ``adc_digi_deinitialize``
-/**
- * @brief ADC digital controller initialization.
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_init(void);
-
-/**
- * @brief ADC digital controller deinitialization.
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_deinit(void);
-#endif
-
-/**
- * @brief Setting the digital controller.
- *
- * @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
- *
- * @return
- *      - ESP_ERR_INVALID_STATE Driver state is invalid.
- *      - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
- *      - ESP_OK                On success
- */
-esp_err_t adc_digi_controller_config(const adc_digi_config_t *config);
-
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-//This feature is currently supported on ESP32C3, will be supported on other chips soon
-/*---------------------------------------------------------------
-                    DMA setting
----------------------------------------------------------------*/
-/**
- * @brief Initialize the Digital ADC.
- *
- * @param init_config Pointer to Digital ADC initilization config. Refer to ``adc_digi_init_config_t``.
- *
- * @return
- *         - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
- *         - ESP_ERR_NOT_FOUND     No free interrupt found with the specified flags
- *         - ESP_ERR_NO_MEM        If out of memory
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config);
-
-/**
- * @brief Start the Digital ADC and DMA peripherals. After this, the hardware starts working.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid.
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_start(void);
-
-/**
- * @brief Stop the Digital ADC and DMA peripherals. After this, the hardware stops working.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid.
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_stop(void);
-
-/**
- * @brief Read bytes from Digital ADC through DMA.
- *
- * @param[out] buf                 Buffer to read from ADC.
- * @param[in]  length_max          Expected length of data read from the ADC.
- * @param[out] out_length          Real length of data read from the ADC via this API.
- * @param[in]  timeout_ms          Time to wait for data via this API, in millisecond.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid. Usually it means the ADC sampling rate is faster than the task processing rate.
- *         - ESP_ERR_TIMEOUT       Operation timed out
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_read_bytes(uint8_t *buf, uint32_t length_max, uint32_t *out_length, uint32_t timeout_ms);
-
-/**
- * @brief Deinitialize the Digital ADC.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid.
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_deinitialize(void);
-
-#endif //#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
 
-#ifdef __cplusplus
-}
-#endif
+#include "adc.h"
diff --git a/tools/sdk/esp32/include/driver/include/driver/adc_deprecated.h b/tools/sdk/esp32/include/driver/include/driver/adc_deprecated.h
new file mode 100644
index 00000000000..bdd0547c06a
--- /dev/null
+++ b/tools/sdk/esp32/include/driver/include/driver/adc_deprecated.h
@@ -0,0 +1,163 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*----------------------------------------------------------------------------------
+              This file contains Deprecated ADC APIs
+-----------------------------------------------------------------------------------*/
+
+#pragma once
+#include "esp_err.h"
+#include "hal/adc_types.h"
+#include "driver/adc_types_deprecated.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#if CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+                    ESP32S2 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief Config ADC module arbiter.
+ *        The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
+ *        the low priority controller will read the invalid ADC2 data, and the validity of the data can be judged by the flag bit in the data.
+ *
+ * @note Only ADC2 support arbiter.
+ * @note Default priority: Wi-Fi > RTC > Digital;
+ * @note In normal use, there is no need to call this interface to config arbiter.
+ *
+ * @param adc_unit ADC unit.
+ * @param config Refer to `adc_arbiter_t`.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - ESP_ERR_NOT_SUPPORTED ADC unit not support arbiter.
+ */
+esp_err_t adc_arbiter_config(adc_unit_t adc_unit, adc_arbiter_t *config) __attribute__((deprecated));
+
+/**
+ * @brief Enable interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_enable(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Disable interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_disable(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Clear interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_clear(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Get interrupt status mask of adc digital controller.
+ *
+ * @param adc_unit ADC unit.
+ * @return
+ *     - intr Interrupt bitmask, See ``adc_digi_intr_t``.
+ */
+uint32_t adc_digi_intr_get_status(adc_unit_t adc_unit) __attribute__((deprecated));
+
+/**
+ * @brief Register ADC interrupt handler, the handler is an ISR.
+ *        The handler will be attached to the same CPU core that this function is running on.
+ *
+ * @param fn Interrupt handler function.
+ * @param arg Parameter for handler function
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_NOT_FOUND Can not find the interrupt that matches the flags.
+ *     - ESP_ERR_INVALID_ARG Function pointer error.
+ */
+esp_err_t adc_digi_isr_register(void (*fn)(void *), void *arg, int intr_alloc_flags) __attribute__((deprecated));
+
+/**
+ * @brief Deregister ADC interrupt handler, the handler is an ISR.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG hander error.
+ *     - ESP_FAIL ISR not be registered.
+ */
+esp_err_t adc_digi_isr_deregister(void) __attribute__((deprecated));
+#endif  // #if CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+            ESP32, ESP32S2 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller initialization.
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_init(void) __attribute__((deprecated));
+
+/**
+ * @brief ADC digital controller deinitialization.
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_deinit(void) __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+/*---------------------------------------------------------------
+            ESP32, ESP32S2, ESP32C3 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief Setting the digital controller.
+ *
+ * @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
+ *
+ * @return
+ *      - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *      - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *      - ESP_OK                On success
+ */
+esp_err_t adc_digi_controller_config(const adc_digi_config_t *config) __attribute__((deprecated));
+
+/**
+ * @brief Initialize ADC pad
+ * @param adc_unit ADC unit index
+ * @param channel ADC channel index
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel) __attribute__((deprecated));;
+#endif //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/driver/include/driver/adc_types_deprecated.h b/tools/sdk/esp32/include/driver/include/driver/adc_types_deprecated.h
new file mode 100644
index 00000000000..5d0e0dc2327
--- /dev/null
+++ b/tools/sdk/esp32/include/driver/include/driver/adc_types_deprecated.h
@@ -0,0 +1,203 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_err.h"
+#include "hal/adc_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+/*---------------------------------------------------------------
+                    ESP32 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t bit_width: 2;   /*!< ADC resolution.
+-                                         0: 9 bit;
+-                                         1: 10 bit;
+-                                         2: 11 bit;
+-                                         3: 12 bit. */
+            int8_t channel:   4;   /*!< ADC channel index. */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+/**
+  * Explanation of the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA outputs:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     +---------------------+--------+--------+--------+
+  *     | trigger meas times  |    1   |    1   |    1   |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_limit_num      |   +1   |   +1   |   +1   |
+  *     | dma_eof_num         |   +1   |   +2   |   +1   |
+  *     | dma output (byte)   |   +2   |   +4   |   +2   |
+  *     +---------------------+--------+--------+--------+
+  */
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc1_pattern_len;               /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    uint32_t adc2_pattern_len;               /*!<Refer to ``adc1_pattern_len`` */
+    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
+    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to `adc1_pattern` */
+    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
+    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
+} adc_digi_config_t __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32
+
+
+#if CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+                    ESP32S2 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t reserved:  2;   /*!< reserved0 */
+            uint8_t channel:   4;   /*!< ADC channel index. */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+/**
+  * @brief ADC digital controller (DMA mode) configuration parameters.
+  *
+  * Example setting: When using ADC1 channel0 to measure voltage, the sampling rate is required to be 1 kHz:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | sample rate         | 1 kHz  | 1 kHz  | 1 kHz  |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     | adc1_pattern_len    |    1   |    1   |    1   |
+  *     | dig_clk.use_apll    |    0   |    0   |    0   |
+  *     | dig_clk.div_num     |   99   |   99   |   99   |
+  *     | dig_clk.div_b       |    0   |    0   |    0   |
+  *     | dig_clk.div_a       |    0   |    0   |    0   |
+  *     | interval            |  400   |  400   |  200   |
+  *     +---------------------+--------+--------+--------+
+  *     | `trigger_meas_freq` | 1 kHz  | 1 kHz  | 2 kHz  |
+  *     +---------------------+--------+--------+--------+
+  *
+  * Explanation of the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA outputs:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     +---------------------+--------+--------+--------+
+  *     | trigger meas times  |    1   |    1   |    1   |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_limit_num      |   +1   |   +1   |   +1   |
+  *     | dma_eof_num         |   +1   |   +2   |   +1   |
+  *     | dma output (byte)   |   +2   |   +4   |   +2   |
+  *     +---------------------+--------+--------+--------+
+  */
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc1_pattern_len;               /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    uint32_t adc2_pattern_len;               /*!<Refer to ``adc1_pattern_len`` */
+    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
+    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to `adc1_pattern` */
+    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
+    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
+    uint32_t interval;                       /*!<The number of interval clock cycles for the digital controller to trigger the measurement.
+                                                 The unit is the divided clock. Range: 40 ~ 4095.
+                                                 Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval. Refer to ``adc_digi_clk_t``.
+                                                 Note: The sampling rate of each channel is also related to the conversion mode (See ``adc_digi_convert_mode_t``) and pattern table settings. */
+    adc_digi_clk_t dig_clk;                  /*!<ADC digital controller clock divider settings. Refer to ``adc_digi_clk_t``.
+                                                 Note: The clocks of the DAC digital controller use the ADC digital controller clock divider. */
+    uint32_t dma_eof_num;                    /*!<DMA eof num of adc digital controller.
+                                                 If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated in DMA.
+                                                 Note: The converted data in the DMA in link buffer will be multiple of two bytes. */
+} adc_digi_config_t __attribute__((deprecated));
+
+/**
+ * @brief ADC digital controller (DMA mode) interrupt type options.
+ */
+typedef enum {
+    ADC_DIGI_INTR_MASK_MONITOR = 0x1,
+    ADC_DIGI_INTR_MASK_MEAS_DONE = 0x2,
+    ADC_DIGI_INTR_MASK_ALL = 0x3,
+} adc_digi_intr_t __attribute__((deprecated));
+FLAG_ATTR(adc_digi_intr_t)
+#endif  //#if CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32C3
+/*---------------------------------------------------------------
+                    ESP32C3 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t channel:   3;   /*!< ADC channel index. */
+            uint8_t unit:      1;   /*!< ADC unit index. */
+            uint8_t reserved:  2;   /*!< reserved0 */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc_pattern_len;                /*!<Pattern table length for digital controller. Range: 0 ~ 7 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 7 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    adc_digi_pattern_table_t *adc_pattern;   /*!<Pointer to pattern table for digital controller. The table size defined by `adc_pattern_len`. */
+    uint32_t sample_freq_hz;  /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
+                                   Fs = Fd / interval / 2
+                                   Fs: sampling frequency;
+                                   Fd: digital controller frequency, no larger than 5M for better performance
+                                   interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
+} adc_digi_config_t __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32C3
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/driver/include/driver/i2s.h b/tools/sdk/esp32/include/driver/include/driver/i2s.h
index aa649ed479c..389b631ba7e 100644
--- a/tools/sdk/esp32/include/driver/include/driver/i2s.h
+++ b/tools/sdk/esp32/include/driver/include/driver/i2s.h
@@ -78,7 +78,7 @@ typedef struct  {
  *
  */
 typedef struct {
-    int mck_io_num;     /*!< MCK in out pin*/
+    int mck_io_num;     /*!< MCK in out pin. Note that ESP32 supports setting MCK on GPIO0/GPIO1/GPIO3 only*/
     int bck_io_num;     /*!< BCK in out pin*/
     int ws_io_num;      /*!< WS in out pin*/
     int data_out_num;   /*!< DATA out pin*/
@@ -97,8 +97,22 @@ typedef struct {
     i2s_channel_fmt_t       channel_format;             /*!< I2S channel format.*/
     i2s_comm_format_t       communication_format;       /*!< I2S communication format */
     int                     intr_alloc_flags;           /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */
-    int                     dma_buf_count;              /*!< I2S DMA Buffer Count */
-    int                     dma_buf_len;                /*!< I2S DMA Buffer Length */
+    int                     dma_buf_count;              /**< The total number of DMA buffers to receive/transmit data.
+                                                          * A descriptor includes some information such as buffer address,
+                                                          * the address of the next descriptor, and the buffer length.
+                                                          * Since one descriptor points to one buffer, therefore, 'dma_desc_num' can be interpreted as the total number of DMA buffers used to store data from DMA interrupt.
+                                                          * Notice that these buffers are internal to'i2s_read' and descriptors are created automatically inside of the I2S driver.
+                                                          * Users only need to set the buffer number while the length is derived from the parameter described below.
+                                                          */
+    int                     dma_buf_len;                /**< Number of frames in a DMA buffer.
+                                                          *  A frame means the data of all channels in a WS cycle.
+                                                          *  The real_dma_buf_size = dma_buf_len * chan_num * bits_per_chan / 8.
+                                                          *  For example, if two channels in stereo mode (i.e., 'channel_format' is set to 'I2S_CHANNEL_FMT_RIGHT_LEFT') are active,
+                                                          *  and each channel transfers 32 bits (i.e., 'bits_per_sample' is set to 'I2S_BITS_PER_CHAN_32BIT'),
+                                                          *  then the total number of bytes of a frame is 'channel_format' * 'bits_per_sample' = 2 * 32 / 8 = 8 bytes.
+                                                          *  We assume that the current 'dma_buf_len' is 100, then the real length of the DMA buffer is 8 * 100 = 800 bytes.
+                                                          *  Note that the length of an internal real DMA buffer shouldn't be greater than 4092.
+                                                          */
     bool                    use_apll;                   /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */
     bool                    tx_desc_auto_clear;         /*!< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability) */
     int                     fixed_mclk;                 /*!< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value. If fixed_mclk set, mclk_multiple won't take effect */
diff --git a/tools/sdk/esp32/include/driver/include/driver/ledc.h b/tools/sdk/esp32/include/driver/include/driver/ledc.h
index bc8328cdd20..7b22f3d1779 100644
--- a/tools/sdk/esp32/include/driver/include/driver/ledc.h
+++ b/tools/sdk/esp32/include/driver/include/driver/ledc.h
@@ -85,6 +85,7 @@ esp_err_t ledc_timer_config(const ledc_timer_config_t* timer_conf);
  * @brief LEDC update channel parameters
  * @note  Call this function to activate the LEDC updated parameters.
  *        After ledc_set_duty, we need to call this function to update the settings.
+ *        And the new LEDC parameters don't take effect until the next PWM cycle.
  * @note  ledc_set_duty, ledc_set_duty_with_hpoint and ledc_update_duty are not thread-safe, do not call these functions to
  *        control one LEDC channel in different tasks at the same time.
  *        A thread-safe version of API is ledc_set_duty_and_update
@@ -203,6 +204,9 @@ esp_err_t ledc_set_duty(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t
 
 /**
  * @brief LEDC get duty
+ *        This function returns the duty at the present PWM cycle.
+ *        You shouldn't expect the function to return the new duty in the same cycle of calling ledc_update_duty,
+ *        because duty update doesn't take effect until the next cycle.
  *
  * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
  * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
@@ -385,7 +389,8 @@ void ledc_fade_func_uninstall(void);
  *        Other duty operations will have to wait until the fade operation has finished.
  * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
  * @param channel LEDC channel number
- * @param fade_mode Whether to block until fading done.
+ * @param fade_mode Whether to block until fading done. See ledc_types.h ledc_fade_mode_t for more info.
+ *        Note that this function will not return until fading to the target duty if LEDC_FADE_WAIT_DONE mode is selected.
  *
  * @return
  *     - ESP_OK Success
@@ -443,9 +448,6 @@ esp_err_t ledc_set_fade_time_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
  *     - ESP_FAIL Fade function init error
  */
 esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t target_duty, uint32_t scale, uint32_t cycle_num, ledc_fade_mode_t fade_mode);
-#ifdef __cplusplus
-}
-#endif
 
 /**
  * @brief LEDC callback registration function
@@ -461,3 +463,6 @@ esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
  *     - ESP_FAIL Fade function init error
  */
 esp_err_t ledc_cb_register(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_cbs_t *cbs, void *user_arg);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/driver/include/driver/spi_common_internal.h b/tools/sdk/esp32/include/driver/include/driver/spi_common_internal.h
index 90826c0a8e9..0704c7ddd87 100644
--- a/tools/sdk/esp32/include/driver/include/driver/spi_common_internal.h
+++ b/tools/sdk/esp32/include/driver/include/driver/spi_common_internal.h
@@ -110,7 +110,7 @@ bool spicommon_periph_in_use(spi_host_device_t host);
 bool spicommon_periph_free(spi_host_device_t host);
 
 /**
- * @brief Alloc DMA for SPI Slave
+ * @brief Alloc DMA for SPI
  *
  * @param host_id                      SPI host ID
  * @param dma_chan                     DMA channel to be used
@@ -122,17 +122,17 @@ bool spicommon_periph_free(spi_host_device_t host);
  *        - ESP_ERR_NO_MEM:        No enough memory
  *        - ESP_ERR_NOT_FOUND:     There is no available DMA channel
  */
-esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan);
+esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan);
 
 /**
- * @brief Free DMA for SPI Slave
+ * @brief Free DMA for SPI
  *
  * @param host_id  SPI host ID
  *
  * @return
  *        - ESP_OK: On success
  */
-esp_err_t spicommon_slave_free_dma(spi_host_device_t host_id);
+esp_err_t spicommon_dma_chan_free(spi_host_device_t host_id);
 
 /**
  * @brief Connect a SPI peripheral to GPIO pins
diff --git a/tools/sdk/esp32/include/driver/include/driver/spi_master.h b/tools/sdk/esp32/include/driver/include/driver/spi_master.h
index d6a202f848a..eaf391c8213 100644
--- a/tools/sdk/esp32/include/driver/include/driver/spi_master.h
+++ b/tools/sdk/esp32/include/driver/include/driver/spi_master.h
@@ -197,7 +197,7 @@ esp_err_t spi_bus_remove_device(spi_device_handle_t handle);
  * @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
  *                      never time out.
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_TRANS_CS_KEEP_ACTIVE flag is specified while
  *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if there was no room in the queue before ticks_to_wait expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
@@ -261,7 +261,7 @@ esp_err_t spi_device_transmit(spi_device_handle_t handle, spi_transaction_t *tra
  *              currently only portMAX_DELAY is supported.
  *
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_TRANS_CS_KEEP_ACTIVE flag is specified while
  *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if the device cannot get control of the bus before ``ticks_to_wait`` expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
diff --git a/tools/sdk/esp32/include/driver/include/driver/uart.h b/tools/sdk/esp32/include/driver/include/driver/uart.h
index 76aa424fa27..4524516338b 100644
--- a/tools/sdk/esp32/include/driver/include/driver/uart.h
+++ b/tools/sdk/esp32/include/driver/include/driver/uart.h
@@ -328,7 +328,7 @@ esp_err_t uart_enable_rx_intr(uart_port_t uart_num);
 esp_err_t uart_disable_rx_intr(uart_port_t uart_num);
 
 /**
- * @brief Disable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)
+ * @brief Disable UART TX interrupt (TXFIFO_EMPTY INTERRUPT)
  *
  * @param uart_num  UART port number
  *
@@ -339,7 +339,7 @@ esp_err_t uart_disable_rx_intr(uart_port_t uart_num);
 esp_err_t uart_disable_tx_intr(uart_port_t uart_num);
 
 /**
- * @brief Enable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)
+ * @brief Enable UART TX interrupt (TXFIFO_EMPTY INTERRUPT)
  *
  * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
  * @param enable  1: enable; 0: disable
diff --git a/tools/sdk/esp32/include/esp-face/include/detect/dl_detect_define.hpp b/tools/sdk/esp32/include/esp-dl/include/detect/dl_detect_define.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/detect/dl_detect_define.hpp
rename to tools/sdk/esp32/include/esp-dl/include/detect/dl_detect_define.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/dl_define.hpp b/tools/sdk/esp32/include/esp-dl/include/dl_define.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/dl_define.hpp
rename to tools/sdk/esp32/include/esp-dl/include/dl_define.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/image/dl_image.hpp b/tools/sdk/esp32/include/esp-dl/include/image/dl_image.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/image/dl_image.hpp
rename to tools/sdk/esp32/include/esp-dl/include/image/dl_image.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_add2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_add2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_add2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_add2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_avg_pool2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_avg_pool2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_avg_pool2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_base.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_base.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_base.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_base.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_concat.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_concat.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_concat.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_concat.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_concat2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_concat2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_concat2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_concat2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_conv2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_conv2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_conv2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_depthwise_conv2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_depthwise_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_depthwise_conv2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_depthwise_conv2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_expand_dims.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_expand_dims.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_expand_dims.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_expand_dims.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_flatten.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_flatten.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_flatten.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_flatten.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_fullyconnected.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_fullyconnected.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_fullyconnected.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_fullyconnected.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_global_avg_pool2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_global_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_global_avg_pool2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_global_avg_pool2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_global_max_pool2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_global_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_global_max_pool2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_global_max_pool2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_leakyrelu.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_leakyrelu.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_leakyrelu.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_leakyrelu.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_max2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_max2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_max2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_max2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_max_pool2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_max_pool2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_max_pool2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_min2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_min2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_min2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_min2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_model.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_model.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_model.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_model.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_mul2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_mul2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_mul2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_mul2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_pad.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_pad.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_pad.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_pad.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_prelu.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_prelu.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_prelu.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_prelu.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_relu.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_relu.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_relu.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_relu.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_reshape.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_reshape.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_reshape.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_reshape.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_squeeze.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_squeeze.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_squeeze.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_squeeze.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_sub2d.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_sub2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_sub2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_sub2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/layer/dl_layer_transpose.hpp b/tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_transpose.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/layer/dl_layer_transpose.hpp
rename to tools/sdk/esp32/include/esp-dl/include/layer/dl_layer_transpose.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/math/dl_math.hpp b/tools/sdk/esp32/include/esp-dl/include/math/dl_math.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/math/dl_math.hpp
rename to tools/sdk/esp32/include/esp-dl/include/math/dl_math.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/math/dl_math_matrix.hpp b/tools/sdk/esp32/include/esp-dl/include/math/dl_math_matrix.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/math/dl_math_matrix.hpp
rename to tools/sdk/esp32/include/esp-dl/include/math/dl_math_matrix.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/model_zoo/cat_face_detect_mn03.hpp b/tools/sdk/esp32/include/esp-dl/include/model_zoo/cat_face_detect_mn03.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/model_zoo/cat_face_detect_mn03.hpp
rename to tools/sdk/esp32/include/esp-dl/include/model_zoo/cat_face_detect_mn03.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/model_zoo/color_detector.hpp b/tools/sdk/esp32/include/esp-dl/include/model_zoo/color_detector.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/model_zoo/color_detector.hpp
rename to tools/sdk/esp32/include/esp-dl/include/model_zoo/color_detector.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/model_zoo/face_recognition_112_v1_s16.hpp b/tools/sdk/esp32/include/esp-dl/include/model_zoo/face_recognition_112_v1_s16.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/model_zoo/face_recognition_112_v1_s16.hpp
rename to tools/sdk/esp32/include/esp-dl/include/model_zoo/face_recognition_112_v1_s16.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/model_zoo/face_recognition_112_v1_s8.hpp b/tools/sdk/esp32/include/esp-dl/include/model_zoo/face_recognition_112_v1_s8.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/model_zoo/face_recognition_112_v1_s8.hpp
rename to tools/sdk/esp32/include/esp-dl/include/model_zoo/face_recognition_112_v1_s8.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/model_zoo/face_recognition_tool.hpp b/tools/sdk/esp32/include/esp-dl/include/model_zoo/face_recognition_tool.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/model_zoo/face_recognition_tool.hpp
rename to tools/sdk/esp32/include/esp-dl/include/model_zoo/face_recognition_tool.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/model_zoo/face_recognizer.hpp b/tools/sdk/esp32/include/esp-dl/include/model_zoo/face_recognizer.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/model_zoo/face_recognizer.hpp
rename to tools/sdk/esp32/include/esp-dl/include/model_zoo/face_recognizer.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/model_zoo/human_face_detect_mnp01.hpp b/tools/sdk/esp32/include/esp-dl/include/model_zoo/human_face_detect_mnp01.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/model_zoo/human_face_detect_mnp01.hpp
rename to tools/sdk/esp32/include/esp-dl/include/model_zoo/human_face_detect_mnp01.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/model_zoo/human_face_detect_msr01.hpp b/tools/sdk/esp32/include/esp-dl/include/model_zoo/human_face_detect_msr01.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/model_zoo/human_face_detect_msr01.hpp
rename to tools/sdk/esp32/include/esp-dl/include/model_zoo/human_face_detect_msr01.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_add2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_add2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_add2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_add2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_avg_pool2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_avg_pool2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_avg_pool2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_concat.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_concat.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_concat.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_concat.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_concat2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_concat2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_concat2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_concat2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_conv2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_conv2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_conv2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_depthwise_conv2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_depthwise_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_depthwise_conv2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_depthwise_conv2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_fully_connected.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_fully_connected.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_fully_connected.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_fully_connected.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_global_avg_pool2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_global_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_global_avg_pool2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_global_avg_pool2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_global_max_pool2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_global_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_global_max_pool2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_global_max_pool2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_leakyrelu.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_leakyrelu.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_leakyrelu.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_leakyrelu.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_max2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_max2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_max2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_max2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_max_pool2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_max_pool2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_max_pool2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_min2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_min2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_min2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_min2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_mul2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_mul2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_mul2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_mul2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_pad.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_pad.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_pad.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_pad.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_prelu.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_prelu.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_prelu.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_prelu.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_relu.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_relu.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_relu.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_relu.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/nn/dl_nn_sub2d.hpp b/tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_sub2d.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/nn/dl_nn_sub2d.hpp
rename to tools/sdk/esp32/include/esp-dl/include/nn/dl_nn_sub2d.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/tool/dl_tool.hpp b/tools/sdk/esp32/include/esp-dl/include/tool/dl_tool.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/tool/dl_tool.hpp
rename to tools/sdk/esp32/include/esp-dl/include/tool/dl_tool.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/tool/dl_tool_cache.hpp b/tools/sdk/esp32/include/esp-dl/include/tool/dl_tool_cache.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/tool/dl_tool_cache.hpp
rename to tools/sdk/esp32/include/esp-dl/include/tool/dl_tool_cache.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/typedef/dl_constant.hpp b/tools/sdk/esp32/include/esp-dl/include/typedef/dl_constant.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/typedef/dl_constant.hpp
rename to tools/sdk/esp32/include/esp-dl/include/typedef/dl_constant.hpp
diff --git a/tools/sdk/esp32/include/esp-face/include/typedef/dl_variable.hpp b/tools/sdk/esp32/include/esp-dl/include/typedef/dl_variable.hpp
similarity index 100%
rename from tools/sdk/esp32/include/esp-face/include/typedef/dl_variable.hpp
rename to tools/sdk/esp32/include/esp-dl/include/typedef/dl_variable.hpp
diff --git a/tools/sdk/esp32/include/esp-dsp/modules/common/include/dsp_common.h b/tools/sdk/esp32/include/esp-dsp/modules/common/include/dsp_common.h
index 68cfc5c694d..da7b001f3d4 100644
--- a/tools/sdk/esp32/include/esp-dsp/modules/common/include/dsp_common.h
+++ b/tools/sdk/esp32/include/esp-dsp/modules/common/include/dsp_common.h
@@ -18,7 +18,12 @@
 #include <stdbool.h>
 #include "dsp_err.h"
 #include "esp_idf_version.h"
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0)
+#include "esp_cpu.h"
+#else
 #include "soc/cpu.h"
+#endif
 
 #ifdef __cplusplus
 extern "C"
@@ -58,4 +63,4 @@ int dsp_power_of_two(int x);
 #define dsp_get_cpu_cycle_count  xthal_get_ccount
 #endif
 
-#endif // _dsp_common_H_
\ No newline at end of file
+#endif // _dsp_common_H_
diff --git a/tools/sdk/esp32/include/esp-dsp/modules/common/include/dsp_platform.h b/tools/sdk/esp32/include/esp-dsp/modules/common/include/dsp_platform.h
index d04f9dc783b..239b325bd52 100644
--- a/tools/sdk/esp32/include/esp-dsp/modules/common/include/dsp_platform.h
+++ b/tools/sdk/esp32/include/esp-dsp/modules/common/include/dsp_platform.h
@@ -15,11 +15,16 @@
 
 #ifndef dsp_platform_h_
 #define dsp_platform_h_
+#include "esp_idf_version.h"
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0)
+#include "esp_cpu.h"
+#else
 #include "soc/cpu.h"
+#endif
 
 #include "freertos/FreeRTOS.h"
 #include "freertos/portable.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
 
-#endif // dsp_platform_h_
\ No newline at end of file
+#endif // dsp_platform_h_
diff --git a/tools/sdk/esp32/include/esp-dsp/modules/conv/include/dsps_conv.h b/tools/sdk/esp32/include/esp-dsp/modules/conv/include/dsps_conv.h
index 7dc9e517bfa..07dbf7a2b30 100644
--- a/tools/sdk/esp32/include/esp-dsp/modules/conv/include/dsps_conv.h
+++ b/tools/sdk/esp32/include/esp-dsp/modules/conv/include/dsps_conv.h
@@ -43,7 +43,7 @@ extern "C"
  */
 esp_err_t dsps_conv_f32_ae32(const float *Signal, const int siglen, const float *Kernel, const int kernlen, float *convout);
 esp_err_t dsps_conv_f32_ansi(const float *Signal, const int siglen, const float *Kernel, const int kernlen, float *convout);
-/**}@*/
+/**@}*/
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/esp-dsp/modules/conv/include/dsps_corr.h b/tools/sdk/esp32/include/esp-dsp/modules/conv/include/dsps_corr.h
index 7104d30c4b7..06f62ca8d81 100644
--- a/tools/sdk/esp32/include/esp-dsp/modules/conv/include/dsps_corr.h
+++ b/tools/sdk/esp32/include/esp-dsp/modules/conv/include/dsps_corr.h
@@ -43,7 +43,7 @@ extern "C"
  */
 esp_err_t dsps_corr_f32_ansi(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *dest);
 esp_err_t dsps_corr_f32_ae32(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *dest);
-/**}@*/
+/**@}*/
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft2r.h b/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft2r.h
index da306bf13b3..e1302f83e46 100644
--- a/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft2r.h
+++ b/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft2r.h
@@ -69,8 +69,6 @@ esp_err_t dsps_fft2r_init_sc16(int16_t *fft_table_buff, int table_size);
  * Free resources of Complex FFT. This function delete coefficients table if it was allocated by dsps_fft2r_init_fc32.
  * The implementation use ANSI C and could be compiled and run on any platform
  *
- *
- * @return
  */
 void dsps_fft2r_deinit_fc32(void);
 void dsps_fft2r_deinit_sc16(void);
@@ -128,13 +126,13 @@ esp_err_t dsps_fft2r_sc16_aes3_(int16_t *data, int N, int16_t *w);
 esp_err_t dsps_bit_rev_fc32_ansi(float *data, int N);
 esp_err_t dsps_bit_rev_sc16_ansi(int16_t *data, int N);
 esp_err_t dsps_bit_rev2r_fc32(float *data, int N);
-
-/**@{*/
+/**@}*/
 
 esp_err_t dsps_bit_rev_lookup_fc32_ansi(float *data, int reverse_size, uint16_t *reverse_tab);
 esp_err_t dsps_bit_rev_lookup_fc32_ae32(float *data, int reverse_size, uint16_t *reverse_tab);
 esp_err_t dsps_bit_rev_lookup_fc32_aes3(float *data, int reverse_size, uint16_t *reverse_tab);
 
+/**@{*/
 /**
  * @brief      Generate coefficients table for the FFT radix 2
  *
diff --git a/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h b/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h
index 17506e7dc40..04e088d87aa 100644
--- a/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h
+++ b/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h
@@ -30,7 +30,7 @@
 #if CONFIG_IDF_TARGET_ESP32S3
 #define dsps_fft2r_fc32_aes3_enabled 1
 #define dsps_fft2r_sc16_aes3_enabled 1
-#endif 
+#endif
 
 
 #endif // _dsps_fft2r_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft4r.h b/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft4r.h
index 0f87b6f0f5d..6443dc80d18 100644
--- a/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft4r.h
+++ b/tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft4r.h
@@ -65,7 +65,6 @@ esp_err_t dsps_fft4r_init_fc32(float *fft_table_buff, int max_fft_size);
  * The implementation use ANSI C and could be compiled and run on any platform
  *
  *
- * @return
  */
 void dsps_fft4r_deinit_fc32(void);
 /**@}*/
@@ -115,7 +114,7 @@ esp_err_t dsps_bit_rev4r_fc32(float *data, int N);
 esp_err_t dsps_bit_rev4r_fc32_ae32(float *data, int N);
 esp_err_t dsps_bit_rev4r_direct_fc32_ansi(float *data, int N);
 esp_err_t dsps_bit_rev4r_sc16_ansi(int16_t *data, int N);
-
+/**@}*/
 
 /**@{*/
 /**
diff --git a/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts.h b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts.h
new file mode 100644
index 00000000000..ad800303a17
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts.h
@@ -0,0 +1,135 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_TTS_H_
+#define _ESP_TTS_H_
+
+#include "stdlib.h"
+#include "stdio.h"
+#include "esp_tts_voice.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+	NONE_MODE      = 0,    //do not play any word before playing a specific number
+	ALI_PAY_MODE,          //play zhi fu bao shou kuan before playing a specific number
+	WEIXIN_PAY_MODE        //play wei xin shou kuan before playing a specific number
+} pay_mode_t;
+
+typedef void * esp_tts_handle_t;
+
+
+/**
+ * @brief Init an instance of the TTS voice set structure.
+ *
+ * @param template      The const esp_tts_voice_template.
+ * @param data          The customize voice data
+ * @return
+ *         - NULL: Init failed
+ *         - Others: The instance of voice set
+ */
+esp_tts_voice_t *esp_tts_voice_set_init(const esp_tts_voice_t *template, void *data);
+
+/**
+ * @brief Init an instance of the TTS voice set structure.
+ *
+ * @param template      The const esp_tts_voice_template.
+ * @param data          The customize voice data
+ * @return
+ *         - NULL: Init failed
+ *         - Others: The instance of voice set
+ */
+void esp_tts_voice_set_free(esp_tts_voice_t *voice);
+
+/**
+ * @brief Creates an instance of the TTS structure.
+ *
+ * @param voice      Voice set containing all basic phonemes.
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of TTS structure
+ */
+esp_tts_handle_t esp_tts_create(esp_tts_voice_t *voice);
+
+/**
+ * @brief parse money pronuciation.
+ *
+ * @param tts_handle   Instance of TTS
+ * @param yuan         The number of yuan    
+ * @param jiao         The number of jiao
+ * @param fen          The number of fen   
+ * @param mode         The pay mode: please refer to pay_mode_t
+ * @return
+ *        - 0: failed
+ *        - 1: succeeded
+ */
+int esp_tts_parse_money(esp_tts_handle_t tts_handle, int yuan, int jiao, int fen, pay_mode_t mode);
+
+/**
+ * @brief parse Chinese PinYin pronuciation.
+ *
+ * @param tts_handle   Instance of TTS
+ * @param pinyin       PinYin string, like this "da4 jia1 hao3"    
+ * @return
+ *         - 0: failed
+ *         - 1: succeeded
+ */
+int esp_tts_parse_pinyin(esp_tts_handle_t tts_handle, const char *pinyin);
+
+/**
+ * @brief parse Chinese string.
+ *
+ * @param tts_handle   Instance of TTS
+ * @param str          Chinese string, like this "大家好"    
+ * @return
+ *         - 0: failed
+ *         - 1: succeeded
+ */
+int esp_tts_parse_chinese(esp_tts_handle_t tts_handle, const char *str);
+
+/**
+ * @brief output TTS voice data by stream.
+ *
+ * @Warning The output data should not be freed. 
+            Once the output length is 0, the all voice data has been output.  
+ *
+ * @param tts_handle   Instance of TTS
+ * @param len          The length of output data 
+ * @param speed        The speech speed speed of synthesized speech, 
+                       range:0~5, 0: the slowest speed, 5: the fastest speech 
+ * @return
+ *        - voice raw data
+ */
+short* esp_tts_stream_play(esp_tts_handle_t tts_handle, int *len, unsigned int speed);
+
+/**
+ * @brief reset tts stream and clean all cache of TTS instance.
+ *
+ * @param tts_handle   Instance of TTS
+ */
+void esp_tts_stream_reset(esp_tts_handle_t tts_handle);
+
+/**
+ * @brief Free the TTS instance
+ *
+ * @param tts_handle The instance of TTS. 
+ */
+void esp_tts_destroy(esp_tts_handle_t tts_handle);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_parser.h b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_parser.h
new file mode 100644
index 00000000000..ce71b04e319
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_parser.h
@@ -0,0 +1,25 @@
+#ifndef _ESP_TTS_PARSER_H_
+#define _ESP_TTS_PARSER_H_
+
+#include "stdlib.h"
+#include "esp_tts_voice.h"
+
+
+typedef struct {
+	int *syll_idx;
+	int syll_num;
+	int total_num;
+	esp_tts_voice_t *voice;
+}esp_tts_utt_t;
+
+esp_tts_utt_t* esp_tts_parser_chinese   (const char* str, esp_tts_voice_t *voice);
+
+esp_tts_utt_t* esp_tts_parser_money(char *play_tag, int yuan, int jiao, int fen, esp_tts_voice_t *voice);
+
+esp_tts_utt_t* esp_tts_parser_pinyin(char* pinyin, esp_tts_voice_t *voice);
+
+esp_tts_utt_t* esp_tts_utt_alloc(int syll_num, esp_tts_voice_t *voice);
+
+void esp_tts_utt_free(esp_tts_utt_t *utt);
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_player.h b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_player.h
new file mode 100644
index 00000000000..2070011af41
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_player.h
@@ -0,0 +1,67 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_TTS_PLAYER_H_
+#define _ESP_TTS_PLAYER_H_
+
+#include "stdlib.h"
+#include "stdio.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+typedef void * esp_tts_player_handle_t;
+
+/**
+ * @brief Creates an instance of the TTS Player structure.
+ *
+ * @param mode      mode of player, default:0 
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of  TTS Player
+ */
+esp_tts_player_handle_t esp_tts_player_create(int mode);
+
+
+
+/**
+ * @brief Concatenate audio files. 
+ *
+ * @Warning Just support mono audio data.
+ *
+ * @param player       The handle of TTS player
+ * @param file_list    The dir of files
+ * @param file_num     The number of file    
+ * @param len          The length of return audio buffer 
+ * @param sample_rate  The sample rate of input audio file
+ * @param sample_width The sample width of input audio file, sample_width=1:8-bit, sample_width=2:16-bit,...
+ * @return
+ *        - audio data buffer
+ */
+unsigned char* esp_tts_stream_play_by_concat(esp_tts_player_handle_t player, const char **file_list, int file_num, int *len, int *sample_rate, int *sample_width);
+
+
+/**
+ * @brief Free the TTS Player instance
+ *
+ * @param player The instance of TTS Player. 
+ */
+void esp_tts_player_destroy(esp_tts_player_handle_t player);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_stretcher.h b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_stretcher.h
new file mode 100644
index 00000000000..ab47b272c0d
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_stretcher.h
@@ -0,0 +1,48 @@
+////////////////////////////////////////////////////////////////////////////
+//                        **** AUDIO-STRETCH ****                         //
+//                      Time Domain Harmonic Scaler                       //
+//                    Copyright (c) 2019 David Bryant                     //
+//                          All Rights Reserved.                          //
+//      Distributed under the BSD Software License (see license.txt)      //
+////////////////////////////////////////////////////////////////////////////
+
+// stretch.h
+
+// Time Domain Harmonic Compression and Expansion
+//
+// This library performs time domain harmonic scaling with pitch detection
+// to stretch the timing of a 16-bit PCM signal (either mono or stereo) from
+// 1/2 to 2 times its original length. This is done without altering any of
+// its tonal characteristics.
+
+#ifndef STRETCH_H
+#define STRETCH_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void *StretchHandle;
+
+/* extern function */
+StretchHandle stretch_init (int shortest_period, int longest_period, int num_chans, int fast_mode);
+int stretch_samples (StretchHandle handle, short *samples, int num_samples, short *output, float ratio);
+int stretch_flush (StretchHandle handle, short *output);
+void stretch_deinit (StretchHandle handle);
+
+/* internel function */
+StretchHandle stretcher_init_internal(int shortest_period, int longest_period, int buff_len);
+void stretcher_deinit (StretchHandle handle);
+int stretcher_is_empty(StretchHandle handle);
+int stretcher_is_full(StretchHandle handle, int num_samples);
+int stretcher_push_data(StretchHandle handle, short *samples, int num_samples);
+int stretcher_stretch_samples(StretchHandle handle, short *output, float ratio);
+int stretcher_stretch_samples_flash(StretchHandle handle, short *output, float ratio, const short *period_data, 
+                                    int *start_idx, int end_idx);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice.h b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice.h
new file mode 100644
index 00000000000..77f263e3935
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice.h
@@ -0,0 +1,20 @@
+#ifndef _ESP_TTS_VOICE_H_
+#define _ESP_TTS_VOICE_H_
+
+typedef struct {
+	char *voice_name;       // voice set name 
+	char *format;           // the format of voice data, currently support pcm and amrwb
+	int sample_rate;        // the sample rate of voice data, just for pcm format
+	int bit_width;          // the bit width of voice data, just for pcm format
+	int syll_num;           // the syllable mumber 
+	char **sylls;           // the syllable names
+	int *syll_pos;          // the position of syllable in syllable audio data array
+	short *pinyin_idx;      // the index of pinyin
+	short *phrase_dict;     // the pinyin dictionary of common phrase
+	short *extern_idx;      // the idx of extern phrases 
+	short *extern_dict;     // the extern phrase dictionary
+	unsigned char *data;    // the audio data of all syllables
+} esp_tts_voice_t;
+
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_template.h b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_template.h
new file mode 100644
index 00000000000..ce5f5b6f455
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_template.h
@@ -0,0 +1,5 @@
+#pragma once
+
+
+#include "esp_tts.h"
+extern const esp_tts_voice_t  esp_tts_voice_template;
diff --git a/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_xiaole.h b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_xiaole.h
new file mode 100644
index 00000000000..f87866ae6cb
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_xiaole.h
@@ -0,0 +1,5 @@
+#pragma once
+
+
+#include "esp_tts.h"
+extern const esp_tts_voice_t  esp_tts_voice_xiaole;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/customized_word_wn5.h b/tools/sdk/esp32/include/esp-sr/include/esp32/customized_word_wn5.h
new file mode 100644
index 00000000000..57199e5abe0
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/customized_word_wn5.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_customized_word_wn5;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib.h b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib.h
new file mode 100644
index 00000000000..d7b6d8fbe77
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib.h
@@ -0,0 +1,411 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_H
+#define DL_LIB_H
+
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+
+#ifdef ESP_PLATFORM
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "esp_system.h"
+#include "esp_heap_caps.h"
+#include "sdkconfig.h"
+#define DL_SPIRAM_SUPPORT 1
+#endif
+
+#ifdef CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/cache.h"
+#endif
+
+typedef int padding_state;
+
+// /**
+//  * @brief Allocate a chunk of memory which has the given capabilities.
+//  *        Equivalent semantics to libc malloc(), for capability-aware memory.
+//  *        In IDF, malloc(p) is equivalent to heap_caps_malloc(p, MALLOC_CAP_8BIT).
+//  * 
+//  * @param size  In bytes, of the amount of memory to allocate
+//  * @param caps  Bitwise OR of MALLOC_CAP_* flags indicating the type of memory to be returned
+//  *              MALLOC_CAP_SPIRAM:   Memory must be in SPI RAM
+//  *              MALLOC_CAP_INTERNAL: Memory must be internal; specifically it should not disappear when flash/spiram cache is switched off
+//  *              MALLOC_CAP_DMA:      Memory must be able to accessed by DMA
+//  *              MALLOC_CAP_DEFAULT:  Memory can be returned in a non-capability-specific memory allocation
+//  * @return Pointer to currently allocated heap memory
+//  **/
+// void *heap_caps_malloc(size_t size, uint32_t caps);
+
+/**
+ * @brief Allocate aligned memory from internal memory or external memory.
+ *        if cnt*size > CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL, allocate memory from internal RAM
+ *        else, allocate memory from PSRAM
+ *
+ * @param cnt    Number of continuing chunks of memory to allocate
+ * @param size   Size, in bytes, of a chunk of memory to allocate     
+ * @param align  Aligned size, in bits
+ * @return Pointer to currently allocated heap memory
+ */
+void *dl_lib_calloc(int cnt, int size, int align);
+
+/**
+ * @brief Always allocate aligned memory from external memory.
+ *
+ * @param cnt    Number of continuing chunks of memory to allocate
+ * @param size   Size, in bytes, of a chunk of memory to allocate     
+ * @param align  Aligned size, in bits
+ * @return Pointer to currently aligned heap memory
+ */
+void *dl_lib_calloc_psram(int cnt, int size, int align);
+
+/**
+ * @brief Free aligned memory allocated by `dl_lib_calloc` or `dl_lib_calloc_psram` 
+ * 
+ * @param prt    Pointer to free
+ */
+void dl_lib_free(void *ptr);
+
+/**
+ * @brief Does a fast version of the exp() operation on a floating point number.
+ *
+ * As described in https://codingforspeed.com/using-faster-exponential-approximation/
+ * Should be good til an input of 5 or so with a steps factor of 8.
+ *
+ * @param in Floating point input
+ * @param steps Approximation steps. More is more precise. 8 or 10 should be good enough for most purposes.
+ * @return Exp()'ed output
+ */
+fptp_t fast_exp(double x, int steps);
+
+/**
+ * @brief Does a fast version of the exp() operation on a floating point number.
+ *
+ * @param in Floating point input
+ * @return Exp()'ed output
+ */
+double fast_exp_pro(double x);
+
+/**
+ * @brief Does a softmax operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_softmax(const dl_matrix2d_t *in, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Does a softmax operation on a quantized matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_softmax_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a sigmoid operation on a floating point number
+ *
+ * @param in Floating point input
+ * @return Sigmoid output
+ */
+
+fptp_t dl_sigmoid_op(fptp_t in);
+
+
+/**
+ * @brief Does a sigmoid operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_sigmoid(const dl_matrix2d_t *in, dl_matrix2d_t *out);
+
+/**
+ * @brief Does a tanh operation on a floating point number
+ *
+ * @param in        Floating point input number
+ * @return Tanh value
+ */
+fptp_t dl_tanh_op(fptp_t v);
+
+/**
+ * @brief Does a tanh operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_tanh(const dl_matrix2d_t *in, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Does a relu (Rectifier Linear Unit) operation on a floating point number
+ *
+ * @param in        Floating point input
+ * @param clip      If value is higher than this, it will be clipped to this value
+ * @return Relu output
+ */
+fptp_t dl_relu_op(fptp_t in, fptp_t clip);
+
+/**
+ * @brief Does a ReLu operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_relu(const dl_matrix2d_t *in, fptp_t clip, dl_matrix2d_t *out);
+
+/**
+ * @brief Fully connected layer operation
+ *
+ * @param in        Input vector
+ * @param weight    Weights of the neurons
+ * @param bias      Biases for the neurons. Can be NULL if a bias of 0 is required.
+ * @param out       Output array. Outputs are placed here. Needs to be an initialized, weight->w by in->h in size, matrix.
+ */
+void dl_fully_connect_layer(const dl_matrix2d_t *in, const dl_matrix2d_t *weight, const dl_matrix2d_t *bias, dl_matrix2d_t *out);
+
+/**
+ * @brief Pre-calculate the sqrtvari variable for the batch_normalize function.
+ * The sqrtvari matrix depends on the variance and epsilon values, which normally are constant. Hence,
+ * this matrix only needs to be calculated once. This function does that.
+ *
+ * @param 
+ * @return
+ */
+void dl_batch_normalize_get_sqrtvar(const dl_matrix2d_t *variance, fptp_t epsilon, dl_matrix2d_t *out);
+
+/**
+ * @brief Batch-normalize a matrix
+ *
+ * @param m         The matrix to normalize
+ * @param offset    Offset matrix
+ * @param scale     Scale matrix
+ * @param mean      Mean matrix
+ * @param sqrtvari  Matrix precalculated using dl_batch_normalize_get_sqrtvar
+ * @return
+ */
+void dl_batch_normalize(dl_matrix2d_t *m, const dl_matrix2d_t *offset, const dl_matrix2d_t *scale, 
+                        const dl_matrix2d_t *mean, const dl_matrix2d_t *sqrtvari);
+
+/**
+ * @brief Do a basic LSTM layer pass.
+ *
+ * @warning Returns state_h pointer, so do not free result.
+
+ * @param in        Input vector
+ * @param state_c   Internal state of the LSTM network
+ * @param state_h   Internal state (previous output values) of the LSTM network
+ * @param weights   Weights for the neurons
+ * @param bias      Bias for the neurons. Can be NULL if no bias is required
+ * @return          Output values of the neurons
+ */
+dl_matrix2d_t *dl_basic_lstm_layer(const dl_matrix2d_t *in, dl_matrix2d_t *state_c, dl_matrix2d_t *state_h, 
+                const dl_matrix2d_t *weight, const dl_matrix2d_t *bias);
+
+/**
+ * @brief Do a basic LSTM layer pass, partial quantized version.
+ * This LSTM function accepts 16-bit fixed-point weights and 32-bit float-point bias. 
+ *
+ * @warning Returns state_h pointer, so do not free result.
+
+ * @param in		Input vector
+ * @param state_c	Internal state of the LSTM network
+ * @param state_h	Internal state (previous output values) of the LSTM network
+ * @param weights	Weights for the neurons, need to be quantised 
+ * @param bias		Bias for the neurons. Can be NULL if no bias is required
+ * @return			Output values of the neurons
+ */
+dl_matrix2dq_t *dl_basic_lstm_layer_quantised_weights(const dl_matrix2d_t *in, dl_matrix2d_t *state_c, dl_matrix2d_t *state_h,
+				const dl_matrix2dq_t *weight, const dl_matrix2d_t *bias);
+
+/**
+ * @brief Do a fully-connected layer pass, fully-quantized version.
+ *
+ * @param in        Input vector
+ * @param weight    Weights of the neurons
+ * @param bias      Bias values of the neurons. Can be NULL if no bias is needed.
+ * @param shift     Number of bits to shift the result back by. See dl_lib_matrixq.h for more info
+ * @return          Output values of the neurons
+ */
+void dl_fully_connect_layer_q(const dl_matrix2dq_t *in, const dl_matrix2dq_t *weight, const dl_matrix2dq_t *bias, dl_matrix2dq_t *out, int shift);
+
+/**
+ * @brief Do a basic LSTM layer pass, fully-quantized version
+ *
+ * @warning Returns state_h pointer, so do not free result.
+
+ * @param in        Input vector
+ * @param state_c   Internal state of the LSTM network
+ * @param state_h   Internal state (previous output values) of the LSTM network
+ * @param weights   Weights for the neurons
+ * @param bias      Bias for the neurons. Can be NULL if no bias is required
+ * @param shift     Number of bits to shift the result back by. See dl_lib_matrixq.h for more info
+ * @return          Output values of the neurons
+ */
+dl_matrix2dq_t *dl_basic_lstm_layer_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *state_c, dl_matrix2dq_t *state_h,
+                const dl_matrix2dq_t *weight, const dl_matrix2dq_t *bias, int shift);
+
+/**
+ * @brief Batch-normalize a matrix, fully-quantized version
+ *
+ * @param m         The matrix to normalize
+ * @param offset    Offset matrix
+ * @param scale     Scale matrix
+ * @param mean      Mean matrix
+ * @param sqrtvari  Matrix precalculated using dl_batch_normalize_get_sqrtvar
+ * @param shift     Number of bits to shift the result back by. See dl_lib_matrixq.h for more info
+ * @return
+ */
+void dl_batch_normalize_q(dl_matrix2dq_t *m, const dl_matrix2dq_t *offset, const dl_matrix2dq_t *scale, 
+                        const dl_matrix2dq_t *mean, const dl_matrix2dq_t *sqrtvari, int shift);
+
+/**
+ * @brief Does a relu (Rectifier Linear Unit) operation on a fixed-point number
+ * This accepts and returns fixed-point 32-bit number with the last 15 bits being the bits after the decimal
+ * point. (Equivalent to a mantissa in a quantized matrix with exponent -15.)
+ *
+ * @param in        Fixed-point input
+ * @param clip      If value is higher than this, it will be clipped to this value
+ * @return Relu output
+ */
+qtp_t dl_relu_q_op(qtp_t in, qtp_t clip);
+
+/**
+ * @brief Does a ReLu operation on a matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_relu_q(const dl_matrix2dq_t *in, fptp_t clip, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a sigmoid operation on a fixed-point number.
+ * This accepts and returns a fixed-point 32-bit number with the last 15 bits being the bits after the decimal
+ * point. (Equivalent to a mantissa in a quantized matrix with exponent -15.)
+ *
+ * @param in Fixed-point input
+ * @return Sigmoid output
+ */
+int dl_sigmoid_op_q(const int in);
+int16_t dl_sigmoid_op_q8(const int16_t in);
+/**
+ * @brief Does a sigmoid operation on a matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_sigmoid_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a tanh operation on a matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_tanh_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a tanh operation on a fixed-point number.
+ * This accepts and returns a fixed-point 32-bit number with the last 15 bits being the bits after the decimal
+ * point. (Equivalent to a mantissa in a quantized matrix with exponent -15.)
+ *
+ * @param in Fixed-point input
+ * @return tanh output
+ */
+int dl_tanh_op_q(int v);
+int16_t dl_tanh_op_q8(int16_t v);
+
+void load_mat_psram_mn4(void);
+void load_mat_psram_mn3(void);
+void free_mat_psram_mn4(void);
+void free_mat_psram_mn3(void);
+qtp_t dl_hard_sigmoid_op(qtp_t in, int exponent);
+qtp_t dl_hard_tanh_op(qtp_t in, int exponent);
+
+int16_t dl_table_tanh_op(int16_t in, int exponent);
+int16_t dl_table_sigmoid_op(int16_t in, int exponent);
+
+void dl_hard_sigmoid_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+void dl_hard_tanh_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+void dl_table_sigmoid_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+void dl_table_tanh_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+
+/**
+ * @brief Filter out the number greater than clip in the matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_minimum(const dl_matrix2d_t *in, fptp_t clip, dl_matrix2d_t *out);
+
+/**
+ * @brief Filter out the number greater than clip in the matrix, float version
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_minimum_q(const dl_matrix2dq_t *in, fptp_t clip, dl_matrix2dq_t *out);
+/**
+ * @brief Do a basic CNN layer pass.
+ *
+ * @Warning This just supports the single channel input image, and the output is single row matrix.
+            That is to say, the height of output is 1, and the weight of output is out_channels*out_image_width*out_image_height
+ *
+ * @param in             Input single channel image 
+ * @param weight         Weights of the neurons, weight->w = out_channels, weight->h = filter_width*filter_height
+ * @param bias           Bias for the CNN layer.
+ * @param filter_height  The height of convolution kernel
+ * @param filter_width   The width of convolution kernel
+ * @param out_channels   The number of output channels of convolution kernel
+ * @param stride_x       The step length of the convolution window in x(width) direction
+ * @param stride_y       The step length of the convolution window in y(height) direction
+ * @param pad            One of `"VALID"` or `"SAME"`, 0 is "VALID" and the other is "SAME"
+ * @param out            The result of CNN layer, out->h=1.
+ * @return               The result of CNN layer.
+ */
+dl_matrix2d_t *dl_basic_conv_layer(const dl_matrix2d_t *in, const dl_matrix2d_t *weight, const dl_matrix2d_t *bias, int filter_width, int filter_height, 
+                                   const int out_channels, const int stride_x, const int stride_y,  padding_state pad, const dl_matrix2d_t* out);
+
+
+/**
+ * @brief Do a basic CNN layer pass, quantised wersion.
+ *
+ * @Warning This just supports the single channel input image, and the output is single row matrix.
+            That is to say, the height of output is 1, and the weight of output is out_channels*out_image_width*out_image_height
+ *
+ * @param in             Input single channel image 
+ * @param weight         Weights of the neurons, weight->w = out_channels, weight->h = filter_width*filter_height,
+ * @param bias           Bias of the neurons.
+ * @param filter_height  The height of convolution kernel
+ * @param filter_width   The width of convolution kernel
+ * @param out_channels   The number of output channels of convolution kernel
+ * @param stride_x       The step length of the convolution window in x(width) direction
+ * @param stride_y       The step length of the convolution window in y(height) direction
+ * @param pad            One of `"VALID"` or `"SAME"`, 0 is "VALID" and the other is "SAME"
+ * @param out            The result of CNN layer, out->h=1
+ * @return               The result of CNN layer
+ */
+dl_matrix2d_t *dl_basic_conv_layer_quantised_weight(const dl_matrix2d_t *in, const dl_matrix2dq_t *weight, const dl_matrix2d_t *bias, int filter_width, int filter_height, 
+                                                     const int out_channels, const int stride_x, const int stride_y,  padding_state pad, const dl_matrix2d_t* out);
+
+#endif
+
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_coefgetter_if.h b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_coefgetter_if.h
new file mode 100644
index 00000000000..f1a937343bf
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_coefgetter_if.h
@@ -0,0 +1,72 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_COEFGETTER_IF_H
+#define DL_LIB_COEFGETTER_IF_H
+
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+#include "cJSON.h"
+
+//Set this if the coefficient requested is a batch-normalization popvar matrix which needs to be preprocessed by
+//dl_batch_normalize_get_sqrtvar first.
+#define COEF_GETTER_HINT_BNVAR (1<<0)
+
+/*
+This struct describes the basic information of model data: 
+word_num: the number of wake words or speech commands
+word_list: the name list of wake words or speech commands
+thres_list: the threshold list of wake words or speech commands
+info_str: the string used to reflect the version and information of model data
+          which consist of the architecture of network, the version of model data, wake words and their threshold
+*/
+typedef struct {
+    int word_num;
+    char **word_list;
+    int *win_list;
+    float *thresh_list;
+    char *info_str;
+} model_info_t;
+
+/*
+Alphabet struct describes the basic grapheme or phoneme.
+item_num: the number of baisc item(grapheme or phonemr)
+items: the list of basic item
+*/
+typedef struct {
+    int item_num;
+    char **items;
+}alphabet_t;
+
+/*
+This struct describes a generic coefficient getter: a way to get the constant coefficients needed for a neural network.
+For the two getters, the name describes the name of the coefficient matrix, usually the same as the Numpy filename the
+coefficient was originally stored in. The arg argument can be used to optionally pass an additional user-defined argument
+to the getter (e.g. the directory to look for files in the case of the Numpy file loader getter). The hint argument
+is a bitwise OR of the COEF_GETTER_HINT_* flags or 0 when none is needed. Use the free_f/free_q functions to release the
+memory for the returned matrices, when applicable.
+*/
+typedef struct {
+    const dl_matrix2d_t* (*getter_f)(const char *name, void *arg, int hint);
+    const dl_matrix2dq_t* (*getter_q)(const char *name, void *arg, int hint);
+    const dl_matrix2dq8_t* (*getter_q8)(const char *name, void *arg, int hint);
+    void (*free_f)(const dl_matrix2d_t *m);
+    void (*free_q)(const dl_matrix2dq_t *m);
+    void (*free_q8)(const dl_matrix2dq8_t *m);
+    const model_info_t* (*getter_info)(void *arg);
+    const alphabet_t* (*getter_alphabet)(void *arg);
+    const cJSON* (*getter_config)(void *arg);
+} model_coeff_getter_t;
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_conv_queue.h b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_conv_queue.h
new file mode 100644
index 00000000000..e0ca0a1d457
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_conv_queue.h
@@ -0,0 +1,164 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_CONV_QUEUE_H
+#define DL_LIB_CONV_QUEUE_H
+
+
+#include "dl_lib_matrix.h"
+typedef float fptp_t;
+
+
+//Flags for matrices
+#define DL_MF_FOREIGNDATA (1<<0)  /*< Matrix *item data actually points to another matrix and should not be freed */
+
+//Float convolution FIFO queue. 
+typedef struct {
+    int n;          /*< the length of queue */
+    int c;          /*< the channel number of queue element*/
+    int front;      /*< the front(top) position of queue */
+    int flag;       /*< not used*/
+    fptp_t *item;   /*< Pointer to item array */
+} dl_conv_queue_t;
+
+/**
+ * @brief Allocate a convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The channel number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_conv_queue_t *dl_conv_queue_alloc(int n, int c);
+
+/**
+ * @brief Free a convolution queue
+ *
+ * @param cq     The convolution queue to free
+ */
+void dl_conv_queue_free(dl_conv_queue_t *cq);
+
+void dl_conv_to_matrix2d(dl_conv_queue_t *cq, dl_matrix2d_t* out);
+
+/**
+ * @brief Move the front pointer of queue forward, 
+          the First(oldest) element become the last(newest) element, 
+ *
+ * @param cq    Input convolution queue
+ * @return      Pointer of oldest element  
+ */
+fptp_t *dl_conv_queue_pop(dl_conv_queue_t *cq);
+
+/**
+ * @brief  Remove the oldest element, then insert the input element at the end of queue
+ *
+ * @param cq     Input convolution queue
+ * @param item   The new element
+ */
+void dl_conv_queue_push(dl_conv_queue_t *cq, fptp_t* item);
+
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_get_queue_item(dl_conv_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a sigmoid operation on the one of element in the convolution queue.
+ * Gets the pointer of element in the convolution queue by offset, and does a sigmoid operation
+ * by this pointer, then return the pointer      
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_sigmoid_step(dl_conv_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a tanh operation on the one of element in the convolution queue.
+ * Gets the pointer of element in the convolution queue by offset, and does a tanh operation
+ * by this pointer, then return the pointer  
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_tanh_step(dl_conv_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a softmax operation on the one of element in the convolution queue.
+ * Gets the pointer of element in the convolution queue by offset, and does a softmax operation
+ * by this pointer, then return the pointer 
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_softmax_step(dl_conv_queue_t *cq, int offset);
+
+fptp_t *dl_relu_step(dl_conv_queue_t *cq, int offset);
+fptp_t *dl_relu_look(dl_matrix2d_t *cq, int offset);
+dl_matrix2d_t *dl_matrix_concat1(const dl_conv_queue_t *a, const dl_matrix2d_t *b);
+dl_matrix2d_t *dl_basic_lstm_layer1(const dl_conv_queue_t *in, dl_matrix2d_t *state_c, dl_matrix2d_t *state_h,
+                                   const dl_matrix2d_t *weight, const dl_matrix2d_t *bias);
+/**
+ * @brief Fast implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is first element of output queue and should not be freed separately.
+ *
+ * @param in       Input convolution queue
+ * @param out      Output convolution queue
+ * @param rate     A positive int, the stride with which we sample input value 
+ * @param size     A positive int, the size of 1D-filter
+ * @param kernel   The kernel matrix of filter
+ * @param bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @return         The result of atrous convolution
+ */
+fptp_t *dl_atrous_conv1d_step(dl_conv_queue_t *in, dl_conv_queue_t *out, int rate, int size,
+                              dl_matrix2d_t* kernel, dl_matrix2d_t* bias);
+fptp_t *dl_look_conv_step(dl_conv_queue_t *in, dl_matrix2d_t *out, int rate, int size,
+                         dl_matrix2d_t* kernel, dl_matrix2d_t* bias);
+
+/**
+ * @brief Fast implement of dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is first element of output queue and should not be freed separately.
+ *
+ * @param in              Input convolution queue
+ * @param out             Output convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @return                The result of dilation layer
+ */
+fptp_t *dl_dilation_layer(dl_conv_queue_t *in, dl_conv_queue_t *out, int rate, int size,
+                          dl_matrix2d_t* filter_kernel, dl_matrix2d_t* filter_bias,
+                          dl_matrix2d_t* gate_kernel, dl_matrix2d_t* gate_bias);
+
+
+void test_atrous_conv(int size, int rate, int in_channel, int out_channel);
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_convq8_queue.h b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_convq8_queue.h
new file mode 100644
index 00000000000..c5964195f81
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_convq8_queue.h
@@ -0,0 +1,251 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_CONVQ8_QUEUE_H
+#define DL_LIB_CONVQ8_QUEUE_H
+
+
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+#include "dl_lib_conv_queue.h"
+#include "dl_lib_convq_queue.h"
+
+//[nch, n, c]
+typedef struct {
+    int n;           /*< the length of queue */
+    int c;           /*< the number of queue element*/
+    int front;       /*< the front(top) position of queue */
+    int nch;         /*< the channel of queue */
+    int exponent;    /*< The values in items should be multiplied by pow(2,exponent) 
+                         to get the real values */
+    q8tp_t *itemq;    /*< Pointer to item array */
+} dl_convq8_queue_t;
+
+/**
+ * @brief Allocate a fixed-point convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq8_queue_t *dl_convq8_queue_alloc(int n, int c);
+
+/**
+ * @brief Allocate a fixed-point convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param c     The channel of queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq8_queue_t *dl_convq8_queue_alloc_mc(int n, int c, int nch);
+
+/**
+ * @brief Free a fixed-point convolution queue
+ *
+ * @param cq     The fixed-point convolution queue to free
+ */
+void dl_convq8_queue_free(dl_convq8_queue_t *cq);
+
+/**
+ * @brief Set itemq of convolution queue to 0
+ *
+ * @param cq     The fixed-point convolution queue to free
+ */
+void dl_convq8_queue_bzero(dl_convq8_queue_t *cqm);
+
+/**
+ * @brief  Insert the float-point element at the end of queue.
+ *         The precision of fixed-point numbers is described by the Qm.f notation,  
+ *
+ * @param cq     Input fixed-point convolution queue
+ * @param item   The float-point element
+ * @param m_bit  The number of integer bits including the sign bits
+ * @param f_bit  The number of fractional bits
+ */
+void dl_convq8_queue_push_by_qmf(dl_convq8_queue_t *cq, fptp_t* item, int m_bit, int f_bit);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+q8tp_t *dl_get_queue_itemq8(dl_convq8_queue_t *cq, int offset);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @param ch      Channel index of queue
+ * @return        Pointer of the element
+ */
+q8tp_t *dl_get_queue_itemq8_mc(dl_convq8_queue_t *cq, int offset, int ch);
+
+/**
+ * @brief Fast and quantised implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param kernel          Kernel matrix of filter
+ * @param bias            The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param out_exponent    Shift ratio used in dot operation between two 16-bit fixed point vector 
+ * @param offset          Offset used to calculate the beginning of input conv queue  
+ * @param prenum          The num to control the parameter size of preload operation  
+ * @return                The result of atrous convolution
+ */
+void dl_atrous_conv1dq8_steps(dl_convq8_queue_t *in, dl_convq8_queue_t *out, int rate, int size,
+                            dl_matrix2dq8_t* kernel, dl_matrix2dq8_t* bias, 
+                            int out_exponent, int offset, int prenum);
+
+/**
+ * @brief Fast implement of dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param offset          Offset used to calculate the beginning of input conv queue  
+ * @param prenum          The num to control the parameter size of preload operation  
+ * @return                The result of dilation layer
+ */
+void dl_dilation_layerq8_steps(dl_convq8_queue_t *in, dl_convq8_queue_t *out, int rate, int size,
+                                dl_matrix2dq8_t* filter_kernel, dl_matrix2dq8_t* filter_bias,
+                                dl_matrix2dq8_t* gate_kernel, dl_matrix2dq8_t* gate_bias,
+                                int offset, int prenum);
+
+
+
+
+dl_conv_queue_t *dl_convq8_queue_add(dl_convq8_queue_t *cq1, dl_convq8_queue_t *cq2);
+
+int8_t dl_sigmoid_lutq8(int in);
+/**
+ * @brief Allocate a 8-bit fixed-point Multi-Channel convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param nch　　The channel number
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq8_queue_t **dl_convq8_queue_mc_alloc(int n, int c, int nch);
+
+/**
+ * @brief Free a 8-bit fixed-point Multi-Channel convolution queue
+ *
+ * @param cqm     The fixed-point convolution queue to free
+ * @param nch     The channel number
+ */
+void dl_convq8_queue_mc_free(dl_convq8_queue_t **cqm, int nch);
+
+/**
+ * @brief Tanh activation function for 8-bit fixed-point Multi-Channel convolution queue input
+ *
+ * @param cqm     Input 8-bit fixed-point Multi-Channel convolution queue
+ * @param offset  Offset used to calculate the beginning of input conv queue 
+ * @param nch     The channel number
+ */
+void dl_tanh_convq8_mc(dl_convq8_queue_t **cqm, int offset, int nch);
+
+/**
+ * @brief Fast and quantised 16-bit implement for Multi-channel 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        Usually, this layer is used as first layer for 8-bit network.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          Input is a 16-bit queue point, Output is an 8-bit queue point.
+ *
+ * @param in              Input 16bit fixed-point convolution queue array
+ * @param out             Output 8bit fixed-point convolution queue array
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param kernel          The kernel matrix of filter
+ * @param bias            The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param out_exponent    Exponent of output
+ * @param offset          Offset used to calculate the beginning of input conv queue  
+ * @param prenum          The num to control the parameter size of preload operation            
+ */
+void dl_atrous_conv1dq8_16in_mc_steps(dl_convq_queue_t **in, dl_convq8_queue_t **out, int nch, int rate, int size,
+                                        dl_matrix2dq_t* kernel, dl_matrix2dq_t* bias, int out_exponent, int offset, int prenum);
+
+/**
+ * @brief Fast and quantised 8-bit implement for Multi-channel 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input 8bit fixed-point convolution queue array
+ * @param out             Output 8bit fixed-point convolution queue array
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param kernel          The kernel matrix of filter
+ * @param bias            The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param out_exponent    Exponent of output
+ * @param offset          Offset used to calculate the beginning of input conv queue 
+ * @param prenum          The num to control the parameter size of preload operation            
+ */
+void dl_atrous_conv1dq8_mc_steps(dl_convq8_queue_t **in, dl_convq8_queue_t **out,
+                                int nch, int rate, int size,
+                                dl_matrix2dq8_t* kernel, dl_matrix2dq8_t* bias, 
+                                int out_exponent, int offset, int prenum);
+
+/**
+ * @brief Fast implement of 8-bit dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input 8-bit fixed-point convolution queue
+ * @param out             Output 8-bit fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param offset          Offset used to calculate the beginning of input conv queue 
+ * @param prenum          The num to control the parameter size of preload operation
+ */
+void dl_dilation_layerq8_mc_steps(dl_convq8_queue_t **in, dl_convq8_queue_t **out, int nch, int rate, int size,
+                                    dl_matrix2dq8_t* filter_kernel, dl_matrix2dq8_t* filter_bias,
+                                    dl_matrix2dq8_t* gate_kernel, dl_matrix2dq8_t* gate_bias,
+                                    int offset, int prenum);    
+
+void dl_convq8_queue_mc_bzero(dl_convq8_queue_t **cqm, int nch);
+
+void print_convq8(dl_convq8_queue_t *cq, int offset);
+void print_convq(dl_convq_queue_t *cq, int offset);
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_convq_queue.h b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_convq_queue.h
new file mode 100644
index 00000000000..80693718f95
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_convq_queue.h
@@ -0,0 +1,375 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_CONVQ_QUEUE_H
+#define DL_LIB_CONVQ_QUEUE_H
+
+#include "dl_lib_matrixq.h"
+#include "dl_lib_conv_queue.h"
+#include "dl_lib.h"
+
+
+//fixed-point convolution FIFO queue. 
+//[nch, n, c]
+typedef struct {
+    int n;           /*< the length of queue */
+    int c;           /*< the number of queue element*/
+    int front;       /*< the front(top) position of queue */
+    int nch;         /*< the multiple of queue*/
+    int exponent;    /*< The values in items should be multiplied by pow(2,exponent) 
+                         to get the real values */
+    qtp_t *itemq;    /*< Pointer to item array */
+} dl_convq_queue_t;
+
+/**
+ * @brief Allocate a fixed-point convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc(int n, int c);
+
+/**
+ * @brief Allocate a fixed-point convolution queue from PSRAM
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc_from_psram(int n, int c);
+
+/**
+ * @brief Allocate a fixed-point multi-channel convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param nch   The channel of conv queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc_mc(int n, int c, int nch);
+
+/**
+ * @brief Allocate a fixed-point multi-channel convolution queue from PSRAM
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param nch   The channel of conv queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc_mc_from_psram(int n, int c, int nch);
+
+
+void dl_convq_to_matrix2dq(dl_convq_queue_t *cq, dl_matrix2dq_t* out, int row);
+
+/**
+ * @brief Free a fixed-point convolution queue
+ *
+ * @param cq     The fixed-point convolution queue to free
+ */
+void dl_convq_queue_free(dl_convq_queue_t *cq);
+
+/**
+ * @brief Set itemq of convolution queue to 0
+ *
+ * @param cq     The fixed-point convolution queue point
+ */
+void dl_convq_queue_bzero(dl_convq_queue_t *cq);
+
+/**
+ * @brief Move the front pointer of queue forward, 
+          the First(oldest) element become the last(newest) element, 
+ *
+ * @param cq    Input fixed-point convolution queue
+ * @return      Pointer of oldest element  
+ */
+inline qtp_t *dl_convq_queue_pop(dl_convq_queue_t *cq);
+inline qtp_t *dl_convq_queue_popn(dl_convq_queue_t *cq, int n);
+/**
+ * @brief  Remove the oldest element, then insert the input element at the end of queue
+ *
+ * @param cq     Input fixed-point convolution queue
+ * @param item   The new element
+ */
+void dl_convq_queue_push(dl_convq_queue_t *cq, dl_matrix2dq_t *a, int shift);
+
+/**
+ * @brief  Insert the float-point element at the end of queue.
+ *         The precision of fixed-point numbers is described by the Qm.f notation,  
+ *
+ * @param cq     Input fixed-point convolution queue
+ * @param item   The float-point element
+ * @param m_bit  The number of integer bits including the sign bits
+ * @param f_bit  The number of fractional bits
+ */
+void dl_convq_queue_push_by_qmf(dl_convq_queue_t *cq, fptp_t* item, int m_bit, int f_bit);
+
+void dl_convq16_queue_push_by_qmf(dl_convq_queue_t *cq, fptp_t* item, int m_bit, int f_bit);
+
+dl_conv_queue_t *dl_queue_from_convq(dl_convq_queue_t *cq1);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq        Input fixed-point convolution queue
+ * @param last_num  Offset from the front of the queue
+ * @return          Pointer of the element
+ */
+inline qtp_t *dl_get_queue_itemq(dl_convq_queue_t *cq, int last_num);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq        Input fixed-point convolution queue
+ * @param offset    Offset from the front of the queue
+ * @param ch        Channel index of convolution queue 
+ * @return          Pointer of the element
+ */
+qtp_t *dl_get_queue_itemq_mc(dl_convq_queue_t *cq, int offset, int ch);
+
+/**
+ * @brief   Does a tanh operation on the one of element in the convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, and does a 
+ *          tanh operation by this pointer, then return the pointer 
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+void dl_tanh_convq(dl_convq_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a tanh operation on the one of element in multi channel convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, and does a 
+ *          tanh operation by this pointer, then return the pointer 
+ *
+ * @param cq      Input fixed-point multi channnel convolution queue
+ * @param offset  Offset from the front of the queue
+ * @param nch     The channel number of cqm
+ * @return        Pointer of the element
+ */
+void dl_tanh_convq_mc(dl_convq_queue_t **cqm, int offset, int nch);
+
+/**
+ * @brief   Does a relu operation on the one of element in the convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, and does a 
+ *          relu operation by this pointer, then return the pointer 
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+void dl_relu_convq(dl_convq_queue_t *cq, fptp_t clip, int last_num);
+
+/**
+ * @brief   Does a softmax operation on the one of element in the convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, input data
+            stay as it is. Results are saved into the *out* array. 
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @param out     Old array to re-use. Passing NULL will allocate a new matrix.
+ * @return        softmax results
+ */
+fptp_t * dl_softmax_step_q(dl_convq_queue_t *cq, int offset, fptp_t *out);
+
+/**
+ * @brief Fast and quantised implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in       Input fixed-point convolution queue
+ * @param out      Output fixed-point convolution queue
+ * @param rate     A positive int, the stride with which we sample input value 
+ * @param size     A positive int, the size of 1D-filter
+ * @param kernel   The kernel matrix of filter
+ * @param bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param shift    Shift ratio used in dot operation between two 16-bit fixed point vector 
+ * @return         The result of atrous convolution
+ */
+qtp_t * dl_atrous_conv1dq(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                          dl_matrix2dq_t* kernel, dl_matrix2dq_t* bias, int shift, int prenum);
+
+/**
+ * @brief Fast implement of dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param filter_shift          Shift ratio used in filter operation between two 16-bit fixed point vector
+ * @param gate_shift            Shift ratio used in gate operation between two 16-bit fixed point vector
+ * @return                The result of dilation layer
+ */
+qtp_t *dl_dilation_layerq_steps(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+   dl_matrix2dq_t* filter_kernel, dl_matrix2dq_t* filter_bias,
+   dl_matrix2dq_t* gate_kernel, dl_matrix2dq_t* gate_bias,
+   int filter_shift, int gate_shift, int offset, int prenum);
+
+
+qtp_t *dl_dilation_layerq(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                          dl_matrix2dq_t* filter_kernel, dl_matrix2dq_t* filter_bias,
+                          dl_matrix2dq_t* gate_kernel, dl_matrix2dq_t* gate_bias,
+                          int filter_shift, int gate_shift, int prenum);
+
+qtp_t *dl_dilation_layerq16(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                             dl_matrix2dq_t* filter_kernel, dl_matrix2dq_t* filter_bias,
+                             dl_matrix2dq_t* gate_kernel, dl_matrix2dq_t* gate_bias, int prenum);
+
+
+qtp_t *dl_atrous_conv1dq_steps(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                                 dl_matrix2dq_t* kernel, dl_matrix2dq_t* bias, int shift, int offset, int prenum);
+
+/**
+ * @brief Add a pair of fixed-point convolution queue item-by-item, and return float-point convolution queue
+ *
+ * @param cq1      First fixed-point convolution queue
+ * @param cq2      Seconf fixed-point convolution queue
+ * @return         The result of float-point convolution queue
+ */
+dl_conv_queue_t *dl_convq_queue_add(dl_convq_queue_t *cq1, dl_convq_queue_t *cq2);
+
+/**
+ * @brief Fast implement of LSTM layer by dl_atrous_conv1dq function
+ *
+ * @Warning LSTM kernel is split into two part, the first part input is the last layer output, 
+ *           and kernel is parameter *in_weight*. The second part input is the last frame LSTM output,
+ *           the kernel is parameters *h_weight*.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param state_c         Internal state of the LSTM network
+ * @param state_h         Internal state (previous output values) of the LSTM network
+ * @param in_weight       the LSTM kernel needed by first part
+ * @param h_weight        the LSTM kernel needed by second part
+ * @param bias            The bias matrix of LSTM. Can be NULL if a bias of 0 is required.
+ * @in_shift              Shift ratio used in first part
+ * @h_shift               Shift ratio used in second part
+ * @return                The result of LSTM layer
+ */
+dl_matrix2dq_t *dl_convq_lstm_layer(const dl_convq_queue_t *in, dl_convq_queue_t *out, dl_matrix2dq_t *state_c,
+                                    dl_matrix2dq_t *state_h, const dl_matrix2dq_t *in_weight, const dl_matrix2dq_t *h_weight,
+                                    const dl_matrix2dq_t *bias, int in_shift, int h_shift, int prenum);
+dl_matrix2dq_t *dl_basic_lstm_layer1_q(const dl_convq_queue_t *in, dl_matrix2dq_t *state_c, dl_matrix2dq_t *state_h,
+                                       const dl_matrix2dq_t *weight, const dl_matrix2dq_t *bias, int step, int shift);
+
+dl_matrix2dq_t *dl_convq16_lstm_layer(const dl_convq_queue_t *in, dl_convq_queue_t *out, dl_matrix2dq_t *state_c,
+                                       dl_matrix2dq_t *state_h, const dl_matrix2dq_t *in_weight, const dl_matrix2dq_t *h_weight,
+                                       const dl_matrix2dq_t *bias, int prenum);
+
+/**
+ * @brief Allocate a fixed-point multi channel convolution queue 
+ *
+ * @param n     The length of queue
+ * @param c     The channel number of elements in the queue
+ * @param nch   the channel numbet of convolution queue 
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t **dl_convq_queue_mc_alloc(int n, int c, int nch);
+
+/**
+ * @brief Free a fixed-point multi channel convolution queue
+ *
+ * @param cqm     The fixed-point convolution queue to free
+ * @param nch     The channel number of cqm
+ */
+void dl_convq_queue_mc_free(dl_convq_queue_t **cqm, int nch);
+
+/**
+ * @brief Fast and quantised implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in       Input fixed-point convolution queue
+ * @param out      Output fixed-point convolution queue
+ * @param nch      The channel number of input 
+ * @param rate     A positive int, the stride with which we sample input value 
+ * @param size     A positive int, the size of 1D-filter
+ * @param kernel   The kernel matrix of filter
+ * @param bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param shift    Shift ratio used in dot operation between two 16-bit fixed point vector 
+ * @param offset   the offset to calculate input convq
+ * @param prenum   the preload size, 0: do not use preload function
+ * @return         The result of atrous convolution
+ */
+qtp_t *dl_atrous_conv1dq_mc_steps(  dl_convq_queue_t **in,
+                                    dl_convq_queue_t **out,
+									int nch,
+									int rate,
+									int size,
+                                    dl_matrix2dq_t* kernel,
+									dl_matrix2dq_t* bias,
+									int shift,
+									int offset,
+									int prenum);
+
+/**
+ * @brief Fast implement of dilation layer as follows for multi channel input
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param nch             The channel number of input 
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param filter_shift    Shift ratio used in filter operation between two 16-bit fixed point vector
+ * @param gate_shift      Shift ratio used in gate operation between two 16-bit fixed point vector
+ * @param offset          The offset to calculate input convq
+ * @param prenum          The preload size, 0: do not use preload function
+ * @return                The result of dilation layer
+ */
+qtp_t *dl_dilation_layerq_mc_steps( dl_convq_queue_t **in, 
+									dl_convq_queue_t **out,
+									int nch,
+									int rate,
+									int size,
+                                    dl_matrix2dq_t* filter_kernel,
+									dl_matrix2dq_t* filter_bias,
+                                    dl_matrix2dq_t* gate_kernel,
+									dl_matrix2dq_t* gate_bias,
+                                    int filter_shift,
+									int gate_shift,
+									int offset,
+									int prenum);
+
+void test_atrous_convq(int size, int rate, int in_channel, int out_channel);
+void test_lstm_convq(int size, int in_dim, int lstm_cell);
+void dl_nn_tanh_i162(dl_convq_queue_t **cqm, int offset, int nch);
+void dl_copy_queue_item_by_qmf(dl_convq_queue_t *cq, fptp_t* item, int m_bit, int f_bit, int offset, int ch);
+void dl_convq_queue_mc_bzero(dl_convq_queue_t **cqm, int nch);
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_matrix.h b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_matrix.h
new file mode 100644
index 00000000000..d046e2452f7
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_matrix.h
@@ -0,0 +1,252 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_MATRIX_H
+#define DL_LIB_MATRIX_H
+
+#ifdef ESP_PLATFORM
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "esp_system.h"
+#endif
+
+// #ifdef CONFIG_IDF_TARGET_ESP32S3
+// #include "dl_tie728_bzero.h"
+// #endif
+
+typedef float fptp_t;
+
+#if CONFIG_BT_SHARE_MEM_REUSE
+extern multi_heap_handle_t gst_heap;
+#endif
+
+//Flags for matrices
+#define DL_MF_FOREIGNDATA (1<<0)  /*< Matrix *item data actually points to another matrix and should not be freed */
+
+//'Normal' float matrix
+typedef struct {
+    int w;          /*< Width */
+    int h;          /*< Height */
+    int stride;     /*< Row stride, essentially how many items to skip to get to the same position in the next row */
+    int flags;      /*< Flags. OR of DL_MF_* values */
+    fptp_t *item;   /*< Pointer to item array */
+} dl_matrix2d_t;
+
+//Macro to quickly access the raw items in a matrix
+#define DL_ITM(m, x, y) m->item[(x)+(y)*m->stride]
+
+
+/**
+ * @brief Allocate a matrix
+ *
+ * @param w     Width of the matrix
+ * @param h     Height of the matrix
+ * @return The matrix, or NULL if out of memory
+ */
+dl_matrix2d_t *dl_matrix_alloc(int w, int h);
+
+
+/**
+ * @brief Free a matrix
+ * Frees the matrix structure and (if it doesn't have the DL_MF_FOREIGNDATA flag set) the m->items space as well.
+ *
+ * @param m     Matrix to free
+ */
+void dl_matrix_free(dl_matrix2d_t *m);
+
+/**
+ * @brief Zero out the matrix
+ * Sets all entries in the matrix to 0.
+ *
+ * @param m     Matrix to zero
+ */
+void dl_matrix_zero(dl_matrix2d_t *m);
+
+/**
+ * @brief Copy the matrix into psram
+ * Copy the matrix from flash or iram/psram into psram
+ *
+ * @param m     Matrix to zero
+ */
+dl_matrix2d_t *dl_matrix_copy_to_psram(const dl_matrix2d_t *m);
+
+/**
+ * @brief Generate a new matrix using a range of items from an existing matrix.
+ * When using this, the data of the new matrix is not allocated/copied but it re-uses a pointer
+ * to the existing data. Changing the data in the resulting matrix, as a result, will also change
+ * the data in the existing matrix that has been sliced.
+ *
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix (with foreign data) to re-use. Passing NULL will allocate a new matrix.
+ * @return The resulting slice matrix, or NULL if out of memory
+ */
+dl_matrix2d_t *dl_matrix_slice(const dl_matrix2d_t *src, int x, int y, int w, int h, dl_matrix2d_t *in);
+
+/**
+ * @brief select a range of items from an existing matrix and flatten them into one dimension.
+ *
+ * @Warning The results are flattened in row-major order.
+ *   
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix to re-use. Passing NULL will allocate a new matrix.
+ * @return  The resulting flatten matrix, or NULL if out of memory
+ */
+dl_matrix2d_t *dl_matrix_flatten(const dl_matrix2d_t *src, int x, int y, int w, int h, dl_matrix2d_t *in);
+
+/**
+ * @brief Generate a matrix from existing floating-point data
+ *
+ * @param w     Width of resulting matrix
+ * @param h     Height of resulting matrix
+ * @param data  Data to populate matrix with
+ * @return A newaly allocated matrix populated with the given input data, or NULL if out of memory.
+ */
+dl_matrix2d_t *dl_matrix_from_data(int w, int h, int stride, const void *data);
+
+
+/**
+ * @brief Multiply a pair of matrices item-by-item: res=a*b
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Multiplicated data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_mul(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Do a dotproduct of two matrices : res=a.b
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrix_dot(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Add a pair of matrices item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Added data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_add(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Divide a pair of matrices item-by-item: res=a/b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Divided data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_div(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *out);
+
+/**
+ * @brief Subtract a matrix from another, item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Subtracted data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_sub(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *out);
+
+/**
+ * @brief Add a constant to every item of the matrix
+ *
+ * @param subj  Matrix to add the constant to
+ * @param add   The constant
+ */
+void dl_matrix_add_const(dl_matrix2d_t *subj, const fptp_t add);
+
+
+/**
+ * @brief Concatenate the rows of two matrices into a new matrix
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @return A newly allocated array with as avlues a|b
+ */
+dl_matrix2d_t *dl_matrix_concat(const dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+dl_matrix2d_t *dl_matrix_concat_h( dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+/**
+ * @brief Print the contents of a matrix to stdout. Used for debugging.
+ *
+ * @param a     The matrix to print.
+ */
+void dl_printmatrix(const dl_matrix2d_t *a);
+
+/**
+ * @brief Return the average square error given a correct and a test matrix.
+ *
+ * ...Well, more or less. If anything, it gives an indication of the error between
+ * the two. Check the code for the exact implementation.
+ *
+ * @param a     First of the two matrices to compare
+ * @param b     Second of the two matrices to compare
+ * @return value indicating the relative difference between matrices
+ */
+float dl_matrix_get_avg_sq_err(const dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+
+
+/**
+ * @brief Check if two matrices have the same shape, that is, the same amount of rows and columns
+ *
+ * @param a     First of the two matrices to compare
+ * @param b     Second of the two matrices to compare
+ * @return true if the two matrices are shaped the same, false otherwise.
+ */
+int dl_matrix_same_shape(const dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+
+/**
+ * @brief Get a specific item from the matrix
+ *
+ * Please use these for external matrix access instead of DL_ITM
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @return Value in that position
+ */
+inline static fptp_t dl_matrix_get(const dl_matrix2d_t *m, const int x, const int y) { 
+    return DL_ITM(m, x, y);
+}
+
+/**
+ * @brief Set a specific item in the matrix to the given value
+ *
+ * Please use these for external matrix access instead of DL_ITM
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @param val   Value to write to that position
+ */
+inline static void dl_matrix_set(dl_matrix2d_t *m, const int x, const int y, fptp_t val) { 
+    DL_ITM(m, x, y)=val;
+}
+
+void matrix_get_range(const dl_matrix2d_t *m, fptp_t *rmin, fptp_t *rmax);
+
+#endif
+
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_matrixq.h b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_matrixq.h
new file mode 100644
index 00000000000..5f0474a08fd
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_matrixq.h
@@ -0,0 +1,378 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_MATRIXQ_H
+#define DL_LIB_MATRIXQ_H
+
+#include <stdint.h>
+#include "dl_lib_matrix.h"
+
+typedef int16_t qtp_t;
+
+//Quantized matrix. Uses fixed numbers and has the storage for the rows/columns inverted 
+//for easy use as a multiplicand without stressing out the flash cache too much.
+typedef struct {
+    int w;
+    int h;
+    int stride; //Normally equals h, not w!
+    int flags;
+    int exponent; //The values in items should be multiplied by pow(2,exponent) to get the real values.
+    qtp_t *itemq;
+} dl_matrix2dq_t;
+
+#define DL_QTP_SHIFT 15
+#define DL_QTP_RANGE ((1<<DL_QTP_SHIFT)-1)
+#define DL_ITMQ(m, x, y) m->itemq[(y)+(x)*m->stride]
+#define DL_QTP_EXP_NA 255 //non-applicable exponent because matrix is null
+
+#define DL_SHIFT_AUTO 32
+
+/**
+ * @info About quantized matrices and shift values
+ *
+ * Grab a coffee (or tea, or hot water)  and sit down when you read this for the first 
+ * time. Quantized matrices can speed up your operations, but come with some quirks, and
+ * it's good to understand how they work before using them.
+ *
+ * The data in the quantized matrix type is stored similarily to floating-point types:
+ * when storing a real value, the value is stored as a mantissa (base number) and an
+ * exponent. The 'real' value that can be re-derived from those two numbers is something
+ * similar to mantissa*2^exponent. Up to this point, there's not that much difference from 
+ * the standard floating point implementations like e.g. IEEE-754.
+ *
+ * The difference with respect to quantized matrices is that for a quantized matrix, it is 
+ * assumed all values stored have more-or-less the same order of magnitude. This allows the
+ * matrix to only store all the mantissas, while the exponents are shared; there is only one 
+ * exponent for the entire matrix. This makes it quicker to handle matrix operations - the
+ * logic to fix the exponents only needs to happen once, while the rest can be done in simple
+ * integer arithmetic. It also nets us some memory savings - while normally a floating point
+ * number is 32-bit, storing only 16-bit mantissas as the matrix items almost halves the 
+ * memory requirements.
+ *
+ * While most of the details of handling the intricacies of the quantized matrixes are done
+ * transparently by the code in dl_lib_matrixq.c, some implementation details leak out, 
+ * specifically in places where addition/subtraction/division happens.
+ *
+ * The problem is that the routines do not know what the size of the resulting operation is. For
+ * instance, when adding two matrices of numbers, the resulting numbers *could* be large enough
+ * to overflow the mantissa of the result if the exponent is the same. However, if by default we
+ * assume the mantissas needs to be scaled back, we may lose precision.
+ *
+ * In order to counter this, all operations that have this issue have a ``shift`` argument. If 
+ * the argument is zero, the routine will be conservative, that is, increase the exponent of 
+ * the result to such an extent it's mathematically impossible a value in the result will exceed
+ * the maximum value that can be stored. However, when this argument is larger than zero, the
+ * algorithm will hold back on this scaling by the indicated amount of bits, preserving precision
+ * but increasing the chance of some of the calculated values not fitting in the mantissa anymore.
+ * If this happens, the value will be clipped to the largest (or, for negative values, smallest)
+ * value possible. (Neural networks usually are okay with this happening for a limited amount
+ * of matrix indices).
+ *
+ * For deciding on these shift values, it is recommended to start with a shift value of one, then
+ * use dl_matrixq_check_sanity on the result. If this indicates clipping, lower the shift value. 
+ * If it indicates bits are under-used, increase it. Note that for adding and subtraction, only
+ * shift values of 0 or 1 make sense; these routines will error out if you try to do something
+ * else.
+ *
+ * For neural networks and other noise-tolerant applications, note that even when 
+ * dl_matrixq_check_sanity does not indicate any problems, twiddling with the shift value may lead
+ * to slightly improved precision. Feel free to experiment.
+ **/
+
+
+/**
+ * @brief Allocate a matrix
+ *
+ * @param w     Width of the matrix
+ * @param h     Height of the matrix
+ * @return The matrix, or NULL if out of memory
+ */
+dl_matrix2dq_t *dl_matrixq_alloc(int w, int h);
+dl_matrix2dq_t *dl_matrixq_alloc_psram(int w, int h);
+/**
+ * @brief Convert a floating-point matrix to a quantized matrix
+ *
+ * @param m     Floating-point matrix to convert
+ * @param out   Quantized matrix to re-use. If NULL, allocate a new one.
+ * @Return The quantized version of the floating-point matrix
+ */
+dl_matrix2dq_t *dl_matrixq_from_matrix2d(const dl_matrix2d_t *m, dl_matrix2dq_t *out);
+
+/**
+ * TODO: DESCRIBE THIS FUNCTION
+ */
+dl_matrix2dq_t *dl_matrixq_from_matrix2d_by_qmf(const dl_matrix2d_t *m, dl_matrix2dq_t *out, int m_bit, int f_bit);
+
+
+/**
+ * @brief Convert a quantized matrix to a floating-point one.
+ *
+ * @param m     Floating-point matrix to convert
+ * @param out   Quantized matrix to re-use. If NULL, allocate a new one.
+ * @Return The quantized version of the floating-point matrix
+ **/
+dl_matrix2d_t *dl_matrix2d_from_matrixq(const dl_matrix2dq_t *m, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Free a quantized matrix
+ * Frees the matrix structure and (if it doesn't have the DL_MF_FOREIGNDATA flag set) the m->items space as well.
+ *
+ * @param m     Matrix to free
+ */
+void dl_matrixq_free(dl_matrix2dq_t *m);
+
+/**
+ * @brief Zero out the matrix
+ * Sets all entries in the matrix to 0.
+ *
+ * @param m     Matrix to zero
+ */
+void dl_matrixq_zero(dl_matrix2dq_t *m);
+
+/**
+ * @brief Copy the matrix into psram
+ * Copy the matrix from flash or iram/psram into psram
+ *
+ * @param m     Matrix to copy
+ */
+dl_matrix2dq_t *dl_matrixq_copy_to_psram(const dl_matrix2dq_t *m);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices : res=a.b, Result is a fixed-point matrix.
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ * @param shift Shift ratio
+ */
+void dl_matrixq_dot(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices: res=a.b, Result is a floating-point matrix.
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrixq_dot_matrix_out(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices : res=a.b. This always uses the simple & stupid C algo for the dot product.
+ *
+ * Result is a fixed-point matrix. 
+ *
+ * Use this only if you expect something is wrong with the accelerated routines that dl_matrixq_dot calls; this function can be
+ * much slower than dl_matrixq_dot .
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ * @param shift Shift ratio
+ */
+void dl_matrixq_dot_c_impl(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices : res=a.b. This always uses the simple & stupid C algo for the dot product. 
+ *
+ * Result is a floating-point matrix. 
+ *
+ * Use this only if you expect something is wrong with the accelerated routines that dl_matrixq_dot_matrix_out calls; this function can be
+ * much slower than dl_matrixq_dot_matrix_out.
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrixq_dot_matrix_out_c_impl(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Do a dotproduct of a floating point and a quantized matrix. Result is a floating-point matrix.
+ *
+ * @param a     First multiplicand; float matrix
+ * @param b     Second multiplicand; quantized matrix
+ * @param res   Dotproduct data; float matrix. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrix_matrixq_dot(const dl_matrix2d_t *a, const dl_matrix2dq_t *b, dl_matrix2d_t *res);
+
+
+/**
+ * @brief Print the contents of a quantized matrix to stdout. Used for debugging.
+ *
+ * @param a     The matrix to print.
+ */
+void dl_printmatrixq(const dl_matrix2dq_t *a);
+
+
+/**
+ * @brief Add a pair of quantizedmatrices item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Added data. Can be equal to a or b to overwrite that.
+ * @param shift Shift value. Only 0 or 1 makes sense here. <ToDo: check>
+ */
+void dl_matrixq_add(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Generate a new matrix using a range of items from an existing matrix.
+ * When using this, the data of the new matrix is not allocated/copied but it re-uses a pointer
+ * to the existing data. Changing the data in the resulting matrix, as a result, will also change
+ * the data in the existing matrix that has been sliced.
+ *
+ * @Warning In contrast to the floating point equivalent of this function, the fixed-point version
+ * of this has the issue that as soon as the output exponent of one of the slices changes, the data
+ * in the sliced matrix gets corrupted (because the exponent of that matrix is still the same.) If you
+ * use this function, either treat the slices as read-only, or assume the sliced matrix contains
+ * garbage after modifying the data in one of the slices.
+ *
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix (with foreign data) to re-use. Passing NULL will allocate a new matrix.
+ * @return The resulting slice matrix, or NULL if out of memory
+ */
+dl_matrix2dq_t *dl_matrixq_slice(const dl_matrix2dq_t *src, int x, int y, int w, int h, dl_matrix2dq_t *in);
+
+/**
+ * @brief select a range of items from an existing matrix and flatten them into one dimension.
+ *
+ * @Warning The results are flattened in row-major order.
+ *   
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix to re-use. Passing NULL will allocate a new matrix.
+ * @return The resulting flatten matrix, or NULL if out of memory
+ */
+dl_matrix2dq_t *dl_matrixq_flatten(const dl_matrix2dq_t *src, int x, int y, int w, int h, dl_matrix2dq_t *in);
+
+/**
+ * @brief Subtract a quantized matrix from another, item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Subtracted data. Can be equal to a or b to overwrite that.
+ * @param shift Shift value. Only 0 or 1 makes sense here. <ToDo: check>
+ */
+void dl_matrixq_sub(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Multiply a pair of quantized matrices item-by-item: res=a*b
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Multiplicated data. Can be equal to a or b to overwrite that matrix.
+ */
+void dl_matrixq_mul( dl_matrix2dq_t *a,  dl_matrix2dq_t *b, dl_matrix2dq_t *res);
+
+/**
+ * @brief Divide a pair of quantized matrices item-by-item: res=a/b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Divided data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrixq_div(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *out, int shift);
+
+/**
+ * @brief Check if two quantized matrices have the same shape, that is, the same amount of 
+ * rows and columns
+ *
+ * @param a     First of the two matrices to compare
+ * @param b     Second of the two matrices to compare
+ * @return true if the two matrices are shaped the same, false otherwise.
+ */
+int dl_matrixq_same_shape(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b);
+
+/**
+ * @brief Concatenate the rows of two quantized matrices into a new matrix
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @return A newly allocated quantized matrix with as values a|b
+ */
+dl_matrix2dq_t *dl_matrixq_concat(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b);
+
+/**
+ * @brief Add a constant to every item of the quantized matrix
+ *
+ * @param subj  Matrix to add the constant to
+ * @param add   The constant
+ */
+void dl_matrixq_add_const(dl_matrix2dq_t *subj, const fptp_t add, int shift);
+
+/**
+ * @brief Check the sanity of a quantized matrix
+ *
+ * Due to the nature of quantized matrices, depending on the calculations a quantized
+ * matrix is the result of and the shift values chosen in those calculations, a quantized
+ * matrix may have an exponent and mantissas that lead to a loss of precision, either because
+ * most significant mantissa bits are unused, or because a fair amount of mantissas are 
+ * clipped. This function checks if this is the case and will report a message to stdout
+ * if significant loss of precision is detected.
+ *
+ * @param m     The quantized matrix to check
+ * @param name  A string to be displayed in the message if the sanity check fails
+ * @return True if matrix is sane, false otherwise
+ **/
+
+int dl_matrixq_check_sanity(dl_matrix2dq_t *m, const char *name);
+
+/**
+ * @brief re-adjust the exponent of the matrix to fit the mantissa better
+ *
+ * This function will shift up all the data in the mantissas so there are no
+ * most-significant bits that are unused in all mantissas. It will also adjust
+ * the exponent to keep the actua values in the matrix the same.
+ *
+ * Some operations done on a matrix, especially operations that re-use the
+ * result of earlier operations done in the same way, can lead to the loss of
+ * data because the exponent of the quantized matrix is never re-adjusted. You
+ * can do that implicitely by calling this function.
+ *
+ * @param m     The matrix to re-adjust
+**/
+void dl_matrixq_readjust_exp(dl_matrix2dq_t *m);
+
+
+
+/**
+ * @brief Get the floating-point value of a specific item from the quantized matrix
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @return Value in that position
+ */
+fptp_t dl_matrixq_get(const dl_matrix2dq_t *m, const int x, const int y);
+
+/**
+ * @brief Set a specific item in the quantized matrix to the given 
+ * floating-point value
+ *
+ * @warning If the given value is more than the exponent in the quantized matrix
+ * allows for, all mantissas in the matrix will be shifted down to make the value
+ * 'fit'. If, however, the exponent is such that the value would result in a
+ * quantized mantissa of 0, nothing is done.
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @param val   Value to write to that position
+ */
+void dl_matrixq_set(dl_matrix2dq_t *m, const int x, const int y, fptp_t val);
+
+#endif
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_matrixq8.h b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_matrixq8.h
new file mode 100644
index 00000000000..579b1c08aaf
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/dl_lib_matrixq8.h
@@ -0,0 +1,71 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_MATRIXQ8_H
+#define DL_LIB_MATRIXQ8_H
+
+#include <stdint.h>
+#include "dl_lib_matrix.h"
+#include "dl_lib.h"
+#include "dl_lib_matrixq.h"
+
+typedef int8_t q8tp_t;
+
+typedef struct {
+    int w;
+    int h;
+    int stride; //Normally equals h, not w!
+    int flags;
+    int exponent; //The values in items should be multiplied by pow(2,exponent) to get the real values.
+    q8tp_t *itemq;
+} dl_matrix2dq8_t;
+
+#define DL_Q8TP_SHIFT 7
+#define DL_Q8TP_RANGE ((1<<DL_Q8TP_SHIFT)-1)
+#define DL_ITMQ8(m, x, y) m->itemq[(y)+(x)*m->stride]
+
+/**
+ * @brief Allocate a matrix
+ *
+ * @param w     Width of the matrix
+ * @param h     Height of the matrix
+ * @return The matrix, or NULL if out of memory
+ */
+dl_matrix2dq8_t *dl_matrixq8_alloc(int w, int h);
+
+/**
+ * @brief Free a quantized matrix
+ * Frees the matrix structure and (if it doesn't have the DL_MF_FOREIGNDATA flag set) the m->items space as well.
+ *
+ * @param m     Matrix to free
+ */
+void dl_matrixq8_free(dl_matrix2dq8_t *m);
+
+/**
+ * @brief Copy a quantized matrix
+ * Copy a quantized matrix from flash or iram/psram
+ *
+ * @param m     Matrix to copy
+ */
+dl_matrix2dq8_t *dl_matrixq8_copy_to_psram(const dl_matrix2dq8_t *m);
+
+/**
+ * @brief Convert a floating-point matrix to a quantized matrix
+ *
+ * @param m     Floating-point matrix to convert
+ * @param out   Quantized matrix to re-use. If NULL, allocate a new one.
+ * @Return The quantized version of the floating-point matrix
+ */
+dl_matrix2dq8_t *dl_matrixq8_from_matrix2d(const dl_matrix2d_t *m, dl_matrix2dq8_t *out);
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_aec.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_aec.h
new file mode 100644
index 00000000000..03afc90ff04
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_aec.h
@@ -0,0 +1,112 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_AEC_H_
+#define _ESP_AEC_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define USE_AEC_FFT                      // Not kiss_fft
+#define AEC_USE_SPIRAM      0
+#define AEC_SAMPLE_RATE     16000        // Only Support 16000Hz
+#define AEC_FRAME_LENGTH_MS 16
+#define AEC_FILTER_LENGTH   1200         // Number of samples of echo to cancel
+
+typedef void* aec_handle_t;
+
+/**
+ * @brief Creates an instance to the AEC structure.
+ * 
+ * @deprecated This API will be deprecated after version 1.0, please use aec_pro_create
+ *
+ * @param sample_rate       The Sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_length      The length of the audio processing must be 16ms.
+ *
+ * @param filter_length     Number of samples of echo to cancel.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of AEC
+ */
+aec_handle_t aec_create(int sample_rate, int frame_length, int filter_length);
+
+/**
+ * @brief Creates an instance to the AEC structure.
+ * 
+ * @deprecated This API will be deprecated after version 1.0, please use aec_pro_create
+ *
+ * @param sample_rate       The Sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_length      The length of the audio processing must be 16ms.
+ *
+ * @param filter_length     Number of samples of echo to cancel.
+ * 
+ * @param nch               Number of input signal channel.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of AEC
+ */
+aec_handle_t aec_create_multimic(int sample_rate, int frame_length, int filter_length, int nch);
+
+/**
+ * @brief Creates an instance of more powerful AEC.
+ *
+ * @param frame_length      Length of input signal. Must be 16ms if mode is 0; otherwise could be 16ms or 32ms. Length of input signal to aec_process must be modified accordingly.
+ *
+ * @param nch               Number of microphones.
+ *
+ * @param mode              Mode of AEC (0 to 5), indicating aggressiveness and RAM allocation. 0: mild; 1 or 2: medium (1: internal RAM, 2: SPIRAM); 3 and 4: aggressive (3: internal RAM, 4: SPIRAM); 5: agressive, accelerated for ESP32-S3.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: An Instance of AEC
+ */
+aec_handle_t aec_pro_create(int frame_length, int nch, int mode);
+
+/**
+ * @brief Performs echo cancellation a frame, based on the audio sent to the speaker and frame from mic.
+ *
+ * @param inst        The instance of AEC.
+ *
+ * @param indata      An array of 16-bit signed audio samples from mic.
+ *
+ * @param refdata     An array of 16-bit signed audio samples sent to the speaker.
+ *
+ * @param outdata     Returns near-end signal with echo removed.
+ *
+ * @return None
+ *
+ */
+void aec_process(const aec_handle_t inst, int16_t *indata, int16_t *refdata, int16_t *outdata);
+
+/**
+ * @brief Free the AEC instance
+ *
+ * @param inst The instance of AEC.
+ *
+ * @return None
+ *
+ */
+void aec_destroy(aec_handle_t inst);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_AEC_H_
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_afe_sr_iface.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_afe_sr_iface.h
new file mode 100644
index 00000000000..73f60c3c11f
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_afe_sr_iface.h
@@ -0,0 +1,245 @@
+#pragma once
+#include "stdint.h"
+#include "esp_wn_iface.h"
+#include "esp_wn_models.h"
+
+//AFE: Audio Front-End 
+//SR:  Speech Recognition
+//afe_sr/AFE_SR: the audio front-end for speech recognition
+
+//Opaque AFE_SR data container
+typedef struct esp_afe_sr_data_t esp_afe_sr_data_t;
+
+//Set AFE_SR mode
+typedef enum {
+    SR_MODE_LOW_COST = 0,
+    SR_MODE_HIGH_PERF = 1
+} afe_sr_mode_t;
+
+// the output state of fetch function
+typedef enum {
+    AFE_FETCH_CHANNEL_VERIFIED = -2,  // wwe state: output channel is verified
+    AFE_FETCH_NOISE = -1,             // vad state: noise or silence
+    AFE_FETCH_SPEECH = 0,             // vad state: speech
+    AFE_FETCH_WWE_DETECTED = 1        // wwe state: wake word is detected
+} afe_fetch_mode_t;
+
+typedef enum {
+    AFE_PSRAM_LOW_COST = 1,
+    AFE_PSRAM_MEDIA_COST = 2,
+    AFE_PSRAM_HIGH_COST = 3
+} afe_use_psram_mode_t;
+
+typedef struct {
+    bool aec_init;
+    bool se_init;
+    bool vad_init;
+    bool wakenet_init;
+    int vad_mode;
+    const esp_wn_iface_t *wakenet_model;
+    const model_coeff_getter_t *wakenet_coeff;
+    det_mode_t wakenet_mode;
+    afe_sr_mode_t afe_mode;
+    int afe_perferred_core;
+    int afe_perferred_priority;
+    int afe_ringbuf_size;
+    int alloc_from_psram;
+    int agc_mode;
+} afe_config_t;
+
+
+#if CONFIG_IDF_TARGET_ESP32
+#define AFE_CONFIG_DEFAULT() { \
+    .aec_init = true, \
+    .se_init = true, \
+    .vad_init = true, \
+    .wakenet_init = true, \
+    .vad_mode = 3, \
+    .wakenet_model = &WAKENET_MODEL, \
+    .wakenet_coeff = &WAKENET_COEFF, \
+    .wakenet_mode = DET_MODE_90, \
+    .afe_mode = SR_MODE_HIGH_PERF, \
+    .afe_perferred_core = 0, \
+    .afe_perferred_priority = 5, \
+    .afe_ringbuf_size = 50, \
+    .alloc_from_psram = 1, \
+    .agc_mode = 2, \
+}
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define AFE_CONFIG_DEFAULT() { \
+    .aec_init = true, \
+    .se_init = true, \
+    .vad_init = true, \
+    .wakenet_init = true, \
+    .vad_mode = 3, \
+    .wakenet_model = &WAKENET_MODEL, \
+    .wakenet_coeff = &WAKENET_COEFF, \
+    .wakenet_mode = DET_MODE_2CH_90, \
+    .afe_mode = SR_MODE_LOW_COST, \
+    .afe_perferred_core = 0, \
+    .afe_perferred_priority = 5, \
+    .afe_ringbuf_size = 50, \
+    .alloc_from_psram = AFE_PSRAM_MEDIA_COST, \
+    .agc_mode = 2, \
+}
+#endif
+/**
+ * @brief Function to initialze a AFE_SR instance with a specified mode
+ * 
+ * @param mode              The mode of AFE_SR 
+ * @param perferred_core    The perferred core to be pinned. 
+ *                          If all task in AFE_SR can not run in real time by only one core, the another core would be used. 
+ * @returns Handle to the AFE_SR data
+ */
+typedef esp_afe_sr_data_t* (*esp_afe_sr_iface_op_create_t)(afe_sr_mode_t mode, int perferred_cor);
+
+/**
+ * @brief Function to initialze a AFE_SR instance
+ * 
+ * @param afe_config        The config of AFE_SR
+ * @returns Handle to the AFE_SR data
+ */
+typedef esp_afe_sr_data_t* (*esp_afe_sr_iface_op_create_from_config_t)(afe_config_t *afe_config);
+
+/**
+ * @brief Get the amount of each channel samples per frame that need to be passed to the function
+ *
+ * Every speech enhancement AFE_SR processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param afe The AFE_SR object to query
+ * @return The amount of samples to feed the fetch function
+ */
+typedef int (*esp_afe_sr_iface_op_get_samp_chunksize_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Get the channel number of samples that need to be passed to the fetch function
+ * 
+ * @param afe The AFE_SR object to query
+ * @return The amount of samples to feed the fetch function
+ */
+typedef int (*esp_afe_sr_iface_op_get_channel_num_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Get the sample rate of the samples to feed to the function
+ *
+ * @param afe The AFE_SR object to query
+ * @return The sample rate, in hz
+ */
+typedef int (*esp_afe_sr_iface_op_get_samp_rate_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Feed samples of an audio stream to the AFE_SR
+ *
+ * @Warning  The input data should be arranged in the format of [CH0_0, CH1_0, ..., CHN_0, CH0_1, CH1_1, ..., CHN_1, ...].
+ *           The last channel is reference signal or far-end signal.
+ *
+ * @param afe   The AFE_SR object to queryq
+ * 
+ * @param in    The input microphone signal, only support signed 16-bit @ 16 KHZ. The frame size can be queried by the 
+ *              `get_samp_chunksize`. The channel number can be queried `get_channel_num`.
+ * @return      The size of input
+ */
+typedef int (*esp_afe_sr_iface_op_feed_t)(esp_afe_sr_data_t *afe, const int16_t* in);
+
+/**
+ * @brief fetch enhanced samples of an audio stream from the AFE_SR
+ *
+ * @Warning  The output is single channel data, no matter how many channels the input is.
+ *
+ * @param afe   The AFE_SR object to query
+ * @param out   The output enhanced signal. The frame size can be queried by the `get_samp_chunksize`.
+ * @return      The state of output, please refer to the definition of `afe_fetch_mode_t`
+ */
+typedef afe_fetch_mode_t (*esp_afe_sr_iface_op_fetch_t)(esp_afe_sr_data_t *afe, int16_t* out);
+
+/**
+ * @brief Initial wakenet and wake words coefficient, or reset wakenet and wake words coefficient 
+ *        when wakenet has been initialized.  
+ *
+ * @param afe          The AFE_SR object to query
+ * @param wakenet      The pointer of wakenet
+ * @param model_coeff  The coefficient of wake word model
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_set_wakenet_t)(esp_afe_sr_data_t *afe,
+                                                  esp_wn_iface_t *wakenet, 
+                                                  const model_coeff_getter_t *model_coeff);
+
+/**
+ * @brief Disable wakenet model.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_disable_wakenet_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Enable wakenet model.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_enable_wakenet_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Disable AEC algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_disable_aec_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Enable AEC algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_enable_aec_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Disable SE algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_disable_se_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Enable SE algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_enable_se_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Destroy a AFE_SR instance
+ *
+ * @param afe         AFE_SR object to destroy
+ */
+typedef void (*esp_afe_sr_iface_op_destroy_t)(esp_afe_sr_data_t *afe);
+
+
+/**
+ * This structure contains the functions used to do operations on a AFE_SR.
+ */
+typedef struct {
+    esp_afe_sr_iface_op_create_t create;
+    esp_afe_sr_iface_op_create_from_config_t create_from_config;
+    esp_afe_sr_iface_op_feed_t feed;
+    esp_afe_sr_iface_op_fetch_t fetch;
+    esp_afe_sr_iface_op_get_samp_chunksize_t get_feed_chunksize;
+    esp_afe_sr_iface_op_get_samp_chunksize_t get_fetch_chunksize;
+    esp_afe_sr_iface_op_get_channel_num_t get_channel_num;
+    esp_afe_sr_iface_op_get_samp_rate_t get_samp_rate;
+    esp_afe_sr_iface_op_set_wakenet_t  set_wakenet; 
+    esp_afe_sr_iface_op_disable_wakenet_t disable_wakenet;
+    esp_afe_sr_iface_op_enable_wakenet_t enable_wakenet;
+    esp_afe_sr_iface_op_disable_aec_t disable_aec;
+    esp_afe_sr_iface_op_enable_aec_t enable_aec;
+    esp_afe_sr_iface_op_disable_se_t disable_se;
+    esp_afe_sr_iface_op_enable_se_t enable_se;
+    esp_afe_sr_iface_op_destroy_t destroy;
+} esp_afe_sr_iface_t;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_afe_sr_models.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_afe_sr_models.h
new file mode 100644
index 00000000000..5424134ab1e
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_afe_sr_models.h
@@ -0,0 +1,6 @@
+#pragma once
+#include "esp_afe_sr_iface.h"
+
+extern const esp_afe_sr_iface_t esp_afe_sr_2mic;
+extern const esp_afe_sr_iface_t esp_afe_sr_1mic;
+
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_agc.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_agc.h
new file mode 100644
index 00000000000..20b0e3f2259
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_agc.h
@@ -0,0 +1,39 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_AGC_H_
+#define _ESP_AGC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+////all positive value is valid, negective is error
+typedef enum {
+    ESP_AGC_SUCCESS = 0,   ////success
+    ESP_AGC_FAIL = -1, ////agc fail
+    ESP_AGC_SAMPLE_RATE_ERROR = -2,  ///sample rate can be only 8khz, 16khz, 32khz
+    ESP_AGC_FRAME_SIZE_ERROR = -3,   ////the input frame size should be only 10ms, so should together with sample-rate to get the frame size
+} ESP_AGE_ERR;
+
+
+void *esp_agc_open(int agc_mode, int sample_rate);
+void set_agc_config(void *agc_handle, int gain_dB, int limiter_enable, int target_level_dbfs);
+int esp_agc_process(void *agc_handle, short *in_pcm, short *out_pcm, int frame_size, int sample_rate);
+void esp_agc_close(void *agc_handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_AGC_H_
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_map.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_map.h
new file mode 100644
index 00000000000..794afdc54c8
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_map.h
@@ -0,0 +1,90 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_MAP_H_
+#define _ESP_MAP_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MAP_SAMPLE_RATE 16000        // Supports 16kHz only
+#define MAP_FRAME_SIZE 16            // Supports 16ms only
+#define MAP_MIC_DISTANCE 50          // According to physical design of mic-array
+#define MAP_AEC_ON true              
+#define MAP_AEC_OFF false            
+#define MAP_AEC_FILTER_LENGTH   1200 // Number of samples of echo to cancel
+
+/**
+ * @brief Sets mic-array type, currently 2-mic line array and 3-mic circular array 
+ * are supported.
+ */
+typedef enum {
+    TWO_MIC_LINE = 0,
+    THREE_MIC_CIRCLE = 1
+} map_mic_array_type_t;
+
+typedef void* mic_array_processor_t;
+
+/**
+ * @brief Creates an instance to the MAP structure.
+ *
+ * @param sample_rate       The sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_size        The length of the audio processing must be 16ms.
+ *
+ * @param array_type        '0' for 2-mic line array and '1' for 3-mic circular array.
+ *
+ * @param mic_distance      The distance between neiboring microphones in mm.
+ * 
+ * @param aec_on            Decides whether to turn on AEC.
+ *
+ * @param filter_length     Number of samples of echo to cancel, effective when AEC is on.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: An instance of MAP
+ */
+mic_array_processor_t map_create(int fs, int frame_size, int array_type, float mic_distance, bool aec_on, int filter_length);
+
+/**
+ * @brief Performs mic array processing for one frame.
+ *
+ * @param inst        The instance of MAP.
+ *
+ * @param in          An array of 16-bit signed audio samples from mic.
+ *
+ * @param far_end     An array of 16-bit signed audio samples sent to the speaker, can be none when AEC is turned off.
+ *
+ * @param dsp_out     Returns enhanced signal.
+ *
+ * @return None
+ *
+ */
+void map_process(mic_array_processor_t st, int16_t *in, int16_t *far_end, int16_t *dsp_out);
+
+/**
+ * @brief Free the MAP instance
+ *
+ * @param inst The instance of MAP.
+ *
+ * @return None
+ *
+ */
+void map_destory(mic_array_processor_t st);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_mase.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_mase.h
new file mode 100644
index 00000000000..3cf403f5646
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_mase.h
@@ -0,0 +1,94 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+
+#ifndef _ESP_MASE_H_
+#define _ESP_MASE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MASE_SAMPLE_RATE 16000        // Supports 16kHz only
+#define MASE_FRAME_SIZE 16            // Supports 16ms only
+#define MASE_MIC_DISTANCE 65          // According to physical design of mic-array
+
+/**
+ * @brief Sets mic-array type, currently 2-mic line array and 3-mic circular array 
+ * are supported.
+ */
+typedef enum {
+    TWO_MIC_LINE = 0,
+    THREE_MIC_CIRCLE = 1
+} mase_mic_array_type_t;
+
+/**
+ * @brief Sets operating mode, supporting normal mode and wake-up enhancement mode
+ */
+typedef enum {
+    NORMAL_ENHANCEMENT_MODE = 0,
+    WAKE_UP_ENHANCEMENT_MODE = 1
+} mase_op_mode_t;
+
+typedef void* mase_handle_t;
+
+/**
+ * @brief Creates an instance to the MASE structure.
+ *
+ * @param sample_rate       The sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_size        The length of the audio processing must be 16ms.
+ *
+ * @param array_type        '0' for 2-mic line array and '1' for 3-mic circular array.
+ *
+ * @param mic_distance      The distance between neiboring microphones in mm.
+ *
+ * @param operating_mode	'0' for normal mode and '1' for wake-up enhanced mode.
+ *
+ * @param filter_strength	Strengh of the mic-array speech enhancement, must be 0, 1, 2 or 3.
+ * 
+ * @return
+ *         - NULL: Create failed
+ *         - Others: An instance of MASE
+ */
+mase_handle_t mase_create(int fs, int frame_size, int array_type, float mic_distance, int operating_mode, int filter_strength);
+
+/**
+ * @brief Performs mic array processing for one frame.
+ *
+ * @param inst        The instance of MASE.
+ *
+ * @param in          An array of 16-bit signed audio samples from mic.
+ *
+ * @param dsp_out     Returns enhanced signal.
+ *
+ * @return None
+ *
+ */
+void mase_process(mase_handle_t st, int16_t *in, int16_t *dsp_out);
+
+/**
+ * @brief Free the MASE instance
+ *
+ * @param inst The instance of MASE.
+ *
+ * @return None
+ *
+ */
+void mase_destory(mase_handle_t st);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_mn_iface.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_mn_iface.h
new file mode 100644
index 00000000000..d4e5aa3f86c
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_mn_iface.h
@@ -0,0 +1,109 @@
+#pragma once
+#include "stdint.h"
+// #include "esp_err.h"
+#include "dl_lib_coefgetter_if.h"
+#include "esp_wn_iface.h"
+// //Opaque model data container
+// typedef struct model_iface_data_t model_iface_data_t;
+
+/**
+ * @brief Initialze a model instance with specified model coefficient.
+ *
+ * @param coeff       The wakenet model coefficient.
+ * @param coeff        The wakenet model coefficient.
+ * @parm sample_length Audio length for speech recognition, in ms.
+ * @returns Handle to the model data.
+ */
+typedef model_iface_data_t* (*esp_mn_iface_op_create_t)(const model_coeff_getter_t *coeff, int sample_length);
+
+
+/**
+ * @brief Callback function type to fetch the amount of samples that need to be passed to the detect function
+ *
+ * Every speech recognition model processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param model       The model object to query
+ * @return The amount of samples to feed the detect function
+ */
+typedef int (*esp_mn_iface_op_get_samp_chunksize_t)(model_iface_data_t *model);
+
+/**
+ * @brief Callback function type to fetch the number of frames recognized by the command word
+ *
+ * @param model       The model object to query
+ * @return The number of the frames recognized by the command word
+ */
+typedef int (*esp_mn_iface_op_get_samp_chunknum_t)(model_iface_data_t *model);
+
+/**
+ * @brief Set the detection threshold to manually abjust the probability 
+ *
+ * @param model The model object to query
+ * @param det_treshold The threshold to trigger speech commands, the range of det_threshold is 0.0~0.9999
+ */
+typedef int (*esp_mn_iface_op_set_det_threshold_t)(model_iface_data_t *model, float det_threshold);
+/**
+ * @brief Set the detection threshold to manually abjust the probability 
+ *
+ * @param model The model object to query
+ * @param phrase_id The ID of speech command phrase
+ * @param det_treshold The threshold to trigger speech command phrases
+ */
+typedef void (*esp_mn_iface_op_set_command_det_threshold_t)(model_iface_data_t *model, int phrase_id, float det_threshold);
+
+/**
+ * @brief Get the detection threshold by phrase ID 
+ *
+ * @param model The model object to query
+ * @param phrase_id The ID of speech command phrase
+ * 
+ * @return The threshold of speech command phrases
+ */
+typedef float (*esp_mn_iface_op_get_command_det_threshold_t)(model_iface_data_t *model, int phrase_id);
+
+/**
+ * @brief Get the sample rate of the samples to feed to the detect function
+ *
+ * @param model       The model object to query
+ * @return The sample rate, in hz
+ */
+typedef int (*esp_mn_iface_op_get_samp_rate_t)(model_iface_data_t *model);
+
+/**
+ * @brief Feed samples of an audio stream to the speech recognition model and detect if there is a speech command found.
+ *
+ * @param model       The model object to query.
+ * @param samples     An array of 16-bit signed audio samples. The array size used can be queried by the 
+ *                    get_samp_chunksize function.
+ * @return The command id, return 0 if no command word is detected,
+ */
+typedef int (*esp_mn_iface_op_detect_t)(model_iface_data_t *model, int16_t *samples);
+
+
+/**
+ * @brief Destroy a speech commands recognition model
+ *
+ * @param model       The Model object to destroy
+ */
+typedef void (*esp_mn_iface_op_destroy_t)(model_iface_data_t *model);
+
+/**
+ * @brief Reset the speech commands recognition model
+ *
+ */
+typedef void (*esp_mn_iface_op_reset_t)(model_iface_data_t *model_data, char *command_str, char *err_phrase_id);
+
+
+typedef struct {
+    esp_mn_iface_op_create_t create;
+    esp_mn_iface_op_get_samp_rate_t get_samp_rate;
+    esp_mn_iface_op_get_samp_chunksize_t get_samp_chunksize;
+    esp_mn_iface_op_get_samp_chunknum_t get_samp_chunknum;
+    esp_mn_iface_op_set_det_threshold_t set_det_threshold;
+    esp_mn_iface_op_set_command_det_threshold_t set_command_det_threshold;
+    esp_mn_iface_op_get_command_det_threshold_t get_command_det_threshold;
+    esp_mn_iface_op_detect_t detect; 
+    esp_mn_iface_op_destroy_t destroy;
+    esp_mn_iface_op_reset_t reset;
+} esp_mn_iface_t;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_mn_models.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_mn_models.h
new file mode 100644
index 00000000000..5b186541f5b
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_mn_models.h
@@ -0,0 +1,77 @@
+#pragma once
+#include "esp_mn_iface.h"
+
+//Contains declarations of all available speech recognion models. Pair this up with the right coefficients and you have a model that can recognize
+//a specific phrase or word.
+extern const esp_mn_iface_t esp_sr_multinet1_single_quantized_en;
+extern const esp_mn_iface_t esp_sr_multinet3_single_quantized_en;
+extern const esp_mn_iface_t esp_sr_multinet2_single_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet3_single_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet4_single_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet3_continuous_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet5_quantized;
+extern const esp_mn_iface_t esp_sr_multinet5_quantized8;
+
+/*
+ Configure wake word to use based on what's selected in menuconfig.
+*/
+#if defined CONFIG_USE_MULTINET
+#ifdef CONFIG_SR_MN_EN_MULTINET1_SINGLE_RECOGNITION
+#include "multinet1_en.h"
+#define MULTINET_MODEL esp_sr_multinet1_single_quantized_en
+#define MULTINET_COEFF get_coeff_multinet1_en
+#elif CONFIG_SR_MN_EN_MULTINET3_SINGLE_RECOGNITION
+#include "multinet3_en.h"
+#define MULTINET_MODEL esp_sr_multinet3_single_quantized_en
+#define MULTINET_COEFF get_coeff_multinet3_en
+#elif CONFIG_SR_MN_CN_MULTINET2_SINGLE_RECOGNITION
+#include "multinet2_ch.h"
+#define MULTINET_MODEL esp_sr_multinet2_single_quantized_cn
+#define MULTINET_COEFF get_coeff_multinet2_ch
+#elif CONFIG_SR_MN_CN_MULTINET2_CONTINUOUS_RECOGNITION
+
+#elif CONFIG_SR_MN_CN_MULTINET3_SINGLE_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet3_single_quantized_cn
+#define MULTINET_COEFF "mn3cn"
+#elif CONFIG_SR_MN_CN_MULTINET4_SINGLE_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet4_single_quantized_cn
+#define MULTINET_COEFF "mn4cn"
+#elif CONFIG_SR_MN_CN_MULTINET3_CONTINUOUS_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet3_continuous_quantized_cn
+#define MULTINET_COEFF "mn3cn"
+#elif CONFIG_SR_MN_EN_MULTINET5_SINGLE_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet5_quantized
+#define MULTINET_COEFF "mn5en"
+#elif CONFIG_SR_MN_EN_MULTINET5_SINGLE_RECOGNITION_QUANT8
+#define MULTINET_MODEL esp_sr_multinet5_quantized8
+#define MULTINET_COEFF "mn5q8en"
+#else
+#error No valid wake word selected.
+#endif
+#else
+#define MULTINET_MODEL "NULL"
+#define MULTINET_COEFF "NULL"
+#endif
+/* example
+
+static const esp_mn_iface_t *multinet = &MULTINET_MODEL;
+
+//Initialize MultiNet model data
+model_iface_data_t *model_data = multinet->create(&MULTINET_COEFF);
+add_speech_commands(multinet, model_data);
+
+//Set parameters of buffer
+int audio_chunksize=model->get_samp_chunksize(model_data);
+int frequency = model->get_samp_rate(model_data);
+int16_t *buffer=malloc(audio_chunksize*sizeof(int16_t));
+
+//Detect
+int r=model->detect(model_data, buffer);
+if (r>0) {
+    printf("Detection triggered output %d.\n",  r);
+}
+
+//Destroy model
+model->destroy(model_data)
+
+*/
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_ns.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_ns.h
new file mode 100644
index 00000000000..1932600b72f
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_ns.h
@@ -0,0 +1,85 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_NS_H_
+#define _ESP_NS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define NS_USE_SPIARM       0
+#define NS_FRAME_LENGTH_MS     10          //Supports 10ms, 20ms, 30ms
+
+/**
+* The Sampling frequency (Hz) must be 16000Hz
+*/
+
+typedef void* ns_handle_t;
+
+/**
+ * @brief Creates an instance to the NS structure.
+ *
+ * @param frame_length   The length of the audio processing can be 10ms, 20ms, 30ms.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of NS
+ */
+ns_handle_t ns_create(int frame_length);
+
+/**
+ * @brief Creates an instance of the more powerful noise suppression algorithm.
+ * 
+ * @warning frame_length only supports be 10 ms.
+ *
+ * @param frame_length    The length of the audio processing can only be 10ms.
+ * @param mode            0: Mild, 1: Medium, 2: Aggressive  
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of NS
+ */
+ns_handle_t ns_pro_create(int frame_length, int mode);
+
+/**
+ * @brief Feed samples of an audio stream to the NS and get the audio stream after Noise suppression.
+ *
+ * @param inst        The instance of NS.
+ *
+ * @param indata      An array of 16-bit signed audio samples.
+ *
+ * @param outdata     An array of 16-bit signed audio samples after noise suppression.
+ *
+ * @return None
+ *
+ */
+void ns_process(ns_handle_t inst, int16_t *indata, int16_t *outdata);
+
+/**
+ * @brief Free the NS instance
+ *
+ * @param inst The instance of NS.
+ *
+ * @return None
+ *
+ */
+void ns_destroy(ns_handle_t inst);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_NS_H_
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_vad.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_vad.h
new file mode 100644
index 00000000000..e1a76cf4072
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_vad.h
@@ -0,0 +1,104 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_VAD_H_
+#define _ESP_VAD_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SAMPLE_RATE_HZ 16000      //Supports 32000, 16000, 8000
+#define VAD_FRAME_LENGTH_MS 30    //Supports 10ms, 20ms, 30ms
+
+/**
+ * @brief Sets the VAD operating mode. A more aggressive (higher mode) VAD is more
+ * restrictive in reporting speech.
+ */
+typedef enum {
+    VAD_MODE_0 = 0,
+    VAD_MODE_1,
+    VAD_MODE_2,
+    VAD_MODE_3,
+    VAD_MODE_4
+} vad_mode_t;
+
+typedef enum {
+    VAD_SILENCE = 0,
+    VAD_SPEECH
+} vad_state_t;
+
+typedef void* vad_handle_t;
+
+/**
+ * @brief Creates an instance to the VAD structure.
+ *
+ * @param vad_mode          Sets the VAD operating mode.
+ *
+ * @param sample_rate_hz    The Sampling frequency (Hz) can be 32000, 16000, 8000, default: 16000.
+ *
+ * @param one_frame_ms      The length of the audio processing can be 10ms, 20ms, 30ms, default: 30.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of VAD
+ */
+vad_handle_t vad_create(vad_mode_t vad_mode, int sample_rate_hz, int one_frame_ms);
+
+/**
+ * @brief Feed samples of an audio stream to the VAD and check if there is someone speaking.
+ *
+ * @param inst      The instance of VAD.
+ *
+ * @param data      An array of 16-bit signed audio samples.
+ *
+ * @return
+ *         - VAD_SILENCE if no voice
+ *         - VAD_SPEECH  if voice is detected
+ *
+ */
+vad_state_t vad_process(vad_handle_t inst, int16_t *data);
+
+/**
+ * @brief Free the VAD instance
+ *
+ * @param inst The instance of VAD.
+ *
+ * @return None
+ *
+ */
+void vad_destroy(vad_handle_t inst);
+
+/*
+* Programming Guide:
+*
+* @code{c}
+* vad_handle_t vad_inst = vad_create(VAD_MODE_3, SAMPLE_RATE_HZ, VAD_FRAME_LENGTH_MS);     // Creates an instance to the VAD structure.
+*
+* while (1) {
+*    //Use buffer to receive the audio data from MIC.
+*    vad_state_t vad_state = vad_process(vad_inst, buffer);      // Feed samples to the VAD process and get the result.
+* }
+*
+* vad_destroy(vad_inst);   // Free the VAD instance at the end of whole VAD process
+*
+* @endcode
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_VAD_H_
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_wn_iface.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_wn_iface.h
new file mode 100644
index 00000000000..6843af19d5d
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_wn_iface.h
@@ -0,0 +1,164 @@
+#pragma once
+#include "stdint.h"
+#include "dl_lib_coefgetter_if.h"
+
+//Opaque model data container
+typedef struct model_iface_data_t model_iface_data_t;
+
+//Set wake words recognition operating mode
+//The probability of being wake words is increased with increasing mode, 
+//As a consequence also the false alarm rate goes up
+typedef enum {
+	DET_MODE_90 = 0,       // Normal
+	DET_MODE_95 = 1,       // Aggressive
+    DET_MODE_2CH_90 = 2,
+    DET_MODE_2CH_95 = 3,
+    DET_MODE_3CH_90 = 4,
+    DET_MODE_3CH_95 = 5,
+} det_mode_t;
+
+typedef struct {
+    int wake_word_num;     //The number of all wake words
+    char **wake_word_list; //The name list of wake words  
+} wake_word_info_t;
+
+/**
+ * @brief Easy function type to initialze a model instance with a detection mode and specified wake word coefficient
+ *
+ * @param det_mode    The wake words detection mode to trigger wake words, DET_MODE_90 or DET_MODE_95
+ * @param model_coeff The specified wake word model coefficient
+ * @returns Handle to the model data
+ */
+typedef model_iface_data_t* (*esp_wn_iface_op_create_t)(const model_coeff_getter_t *model_coeff, det_mode_t det_mode);
+
+/**
+ * @brief Callback function type to fetch the amount of samples that need to be passed to the detect function
+ *
+ * Every speech recognition model processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param model The model object to query
+ * @return The amount of samples to feed the detect function
+ */
+typedef int (*esp_wn_iface_op_get_samp_chunksize_t)(model_iface_data_t *model);
+
+/**
+ * @brief Callback function type to fetch the channel number of samples that need to be passed to the detect function
+ *
+ * Every speech recognition model processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param model The model object to query
+ * @return The amount of samples to feed the detect function
+ */
+typedef int (*esp_wn_iface_op_get_channel_num_t)(model_iface_data_t *model);
+
+
+/**
+ * @brief Get the sample rate of the samples to feed to the detect function
+ *
+ * @param model The model object to query
+ * @return The sample rate, in hz
+ */
+typedef int (*esp_wn_iface_op_get_samp_rate_t)(model_iface_data_t *model);
+
+/**
+ * @brief Get the number of wake words
+ *
+ * @param model The model object to query
+ * @returns the number of wake words
+ */
+typedef int (*esp_wn_iface_op_get_word_num_t)(model_iface_data_t *model);
+
+/**
+ * @brief Get the name of wake word by index
+ *
+ * @Warning The index of wake word start with 1
+
+ * @param model The model object to query
+ * @param word_index The index of wake word
+ * @returns the detection threshold
+ */
+typedef char* (*esp_wn_iface_op_get_word_name_t)(model_iface_data_t *model, int word_index);
+
+/**
+ * @brief Set the detection threshold to manually abjust the probability 
+ *
+ * @param model The model object to query
+ * @param det_treshold The threshold to trigger wake words, the range of det_threshold is 0.5~0.9999
+ * @param word_index The index of wake word
+ * @return 0: setting failed, 1: setting success
+ */
+typedef int (*esp_wn_iface_op_set_det_threshold_t)(model_iface_data_t *model, float det_threshold, int word_index);
+
+/**
+ * @brief Get the wake word detection threshold of different modes
+ *
+ * @param model The model object to query
+ * @param word_index The index of wake word
+ * @returns the detection threshold
+ */
+typedef float (*esp_wn_iface_op_get_det_threshold_t)(model_iface_data_t *model, int word_index);
+
+/**
+ * @brief Feed samples of an audio stream to the keyword detection model and detect if there is a keyword found.
+ *
+ * @Warning The index of wake word start with 1, 0 means no wake words is detected.
+ *
+ * @param model The model object to query
+ * @param samples An array of 16-bit signed audio samples. The array size used can be queried by the 
+ *        get_samp_chunksize function.
+ * @return The index of wake words, return 0 if no wake word is detected, else the index of the wake words.
+ */
+typedef int (*esp_wn_iface_op_detect_t)(model_iface_data_t *model, int16_t *samples);
+
+/**
+ * @brief Get the volume gain
+ *
+ * @param model The model object to query
+ * @param target_db  The target dB to calculate volume gain
+ * @returns the volume gain
+ */
+typedef float (*esp_wn_iface_op_get_vol_gain_t)(model_iface_data_t *model, float target_db);
+
+/**
+ * @brief Get the triggered channel index. Channel index starts from zero
+ *
+ * @param model The model object to query
+ * @return The channel index
+ */
+typedef int (*esp_wn_iface_op_get_triggered_channel_t)(model_iface_data_t *model);
+
+/**
+ * @brief Clean all states of model
+ *
+ * @param model The model object to query
+ */
+typedef void (*esp_wn_iface_op_clean_t)(model_iface_data_t *model);
+
+/**
+ * @brief Destroy a speech recognition model
+ *
+ * @param model Model object to destroy
+ */
+typedef void (*esp_wn_iface_op_destroy_t)(model_iface_data_t *model);
+
+
+/**
+ * This structure contains the functions used to do operations on a wake word detection model.
+ */
+typedef struct {
+    esp_wn_iface_op_create_t create;
+    esp_wn_iface_op_get_samp_chunksize_t get_samp_chunksize;
+    esp_wn_iface_op_get_channel_num_t get_channel_num;
+    esp_wn_iface_op_get_samp_rate_t get_samp_rate;
+    esp_wn_iface_op_get_word_num_t get_word_num;
+    esp_wn_iface_op_get_word_name_t get_word_name;
+    esp_wn_iface_op_set_det_threshold_t set_det_threshold;
+    esp_wn_iface_op_get_det_threshold_t get_det_threshold;
+    esp_wn_iface_op_get_triggered_channel_t  get_triggered_channel;
+    esp_wn_iface_op_get_vol_gain_t get_vol_gain;
+    esp_wn_iface_op_detect_t detect;
+    esp_wn_iface_op_clean_t clean;
+    esp_wn_iface_op_destroy_t destroy;
+} esp_wn_iface_t;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/esp_wn_models.h b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_wn_models.h
new file mode 100644
index 00000000000..225456fc728
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/esp_wn_models.h
@@ -0,0 +1,127 @@
+#pragma once
+#include "esp_wn_iface.h"
+
+//Contains declarations of all available speech recognion models. Pair this up with the right coefficients and you have a model that can recognize
+//a specific phrase or word.
+
+extern const esp_wn_iface_t esp_sr_wakenet5_quantized;
+extern const esp_wn_iface_t esp_sr_wakenet7_quantized;
+extern const esp_wn_iface_t esp_sr_wakenet7_quantized8;
+extern const esp_wn_iface_t esp_sr_wakenet8_quantized;
+extern const esp_wn_iface_t esp_sr_wakenet8_quantized8;
+/*
+ Configure network to use based on what's selected in menuconfig.
+*/
+#if defined CONFIG_USE_WAKENET
+#if CONFIG_SR_WN_MODEL_WN5_QUANT
+#define WAKENET_MODEL esp_sr_wakenet5_quantized
+#elif CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_MODEL esp_sr_wakenet7_quantized
+#elif CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_MODEL esp_sr_wakenet7_quantized8
+#elif CONFIG_SR_WN_MODEL_WN8_QUANT
+#define WAKENET_MODEL esp_sr_wakenet8_quantized
+#elif CONFIG_SR_WN_MODEL_WN8_QUANT8
+#define WAKENET_MODEL esp_sr_wakenet8_quantized8
+#else
+#error No valid neural network model selected.
+#endif
+
+/*
+ Configure wake word to use based on what's selected in menuconfig.
+*/
+#if CONFIG_SR_WN_WN5_HILEXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hilexin_wn5.h"
+#define WAKENET_COEFF get_coeff_hilexin_wn5
+
+#elif CONFIG_SR_WN_WN5X2_HILEXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hilexin_wn5X2.h"
+#define WAKENET_COEFF get_coeff_hilexin_wn5X2
+
+#elif CONFIG_SR_WN_WN5X3_HILEXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hilexin_wn5X3.h"
+#define WAKENET_COEFF get_coeff_hilexin_wn5X3
+
+#elif CONFIG_SR_WN_WN5_NIHAOXIAOZHI & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaozhi_wn5.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaozhi_wn5
+
+#elif CONFIG_SR_WN_WN5X2_NIHAOXIAOZHI & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaozhi_wn5X2.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaozhi_wn5X2
+
+#elif CONFIG_SR_WN_WN5X3_NIHAOXIAOZHI & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaozhi_wn5X3.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaozhi_wn5X3
+
+#elif CONFIG_SR_WN_WN5X3_NIHAOXIAOXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaoxin_wn5X3.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaoxin_wn5X3
+
+#elif CONFIG_SR_WN_WN5X3_HIJESON & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hijeson_wn5X3.h"
+#define WAKENET_COEFF get_coeff_hijeson_wn5X3
+
+#elif CONFIG_SR_WN_WN5_CUSTOMIZED_WORD
+#include "customized_word_wn5.h"
+#define WAKENET_COEFF get_coeff_customized_word_wn5
+
+#elif CONFIG_SR_WN_WN7_CUSTOMIZED_WORD
+#define WAKENET_COEFF "custom7"
+
+#elif CONFIG_SR_WN_WN7_XIAOAITONGXUE & CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_COEFF "xiaoaitongxue7"
+
+#elif CONFIG_SR_WN_WN7_XIAOAITONGXUE & CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_COEFF "xiaoaitongxue7q8"
+
+#elif CONFIG_SR_WN_WN7_HILEXIN & CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_COEFF "hilexin7"
+
+#elif CONFIG_SR_WN_WN7_HILEXIN & CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_COEFF "hilexin7q8"
+
+#elif CONFIG_SR_WN_WN7_ALEXA & CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_COEFF "alexa7"
+
+#elif CONFIG_SR_WN_WN8_ALEXA & CONFIG_SR_WN_MODEL_WN8_QUANT
+#define WAKENET_COEFF "alexa8"
+
+#elif CONFIG_SR_WN_WN7_ALEXA & CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_COEFF "alexa7q8"
+
+#elif CONFIG_SR_WN_WN8_HIESP & CONFIG_SR_WN_MODEL_WN8_QUANT
+#define WAKENET_COEFF "hiesp8"
+
+#elif CONFIG_SR_WN_WN8_HIESP & CONFIG_SR_WN_MODEL_WN8_QUANT8
+#define WAKENET_COEFF "hiesp8q8"
+
+#else
+#error No valid wake word selected.
+#endif
+#else
+#define WAKENET_MODEL "NULL"
+#define WAKENET_COEFF "NULL"
+#endif
+/* example
+
+static const sr_model_iface_t *model = &WAKENET_MODEL;
+
+//Initialize wakeNet model data
+static model_iface_data_t *model_data=model->create(DET_MODE_90);
+
+//Set parameters of buffer
+int audio_chunksize=model->get_samp_chunksize(model_data);
+int frequency = model->get_samp_rate(model_data);
+int16_t *buffer=malloc(audio_chunksize*sizeof(int16_t));
+
+//Detect
+int r=model->detect(model_data, buffer);
+if (r>0) {
+    printf("Detection triggered output %d.\n",  r);
+}
+
+//Destroy model
+model->destroy(model_data)
+
+*/
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/hijeson_wn5X3.h b/tools/sdk/esp32/include/esp-sr/include/esp32/hijeson_wn5X3.h
new file mode 100644
index 00000000000..c2e343880ed
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/hijeson_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hijeson_wn5X3;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/hilexin_wn5.h b/tools/sdk/esp32/include/esp-sr/include/esp32/hilexin_wn5.h
new file mode 100644
index 00000000000..d922a6aaed4
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/hilexin_wn5.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hilexin_wn5;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/hilexin_wn5X2.h b/tools/sdk/esp32/include/esp-sr/include/esp32/hilexin_wn5X2.h
new file mode 100644
index 00000000000..5ca6bbca5ba
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/hilexin_wn5X2.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hilexin_wn5X2;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/hilexin_wn5X3.h b/tools/sdk/esp32/include/esp-sr/include/esp32/hilexin_wn5X3.h
new file mode 100644
index 00000000000..c78a64d2b77
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/hilexin_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hilexin_wn5X3;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/mn_process_commands.h b/tools/sdk/esp32/include/esp-sr/include/esp32/mn_process_commands.h
new file mode 100644
index 00000000000..692137a3b78
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/mn_process_commands.h
@@ -0,0 +1,408 @@
+#pragma once
+#include "esp_mn_iface.h"
+#define SPEECH_COMMANDS_NUM 99
+#if CONFIG_SR_MN_CHINESE
+#define MN_SPEECH_COMMAND_ID0   CONFIG_CN_SPEECH_COMMAND_ID0
+#define MN_SPEECH_COMMAND_ID1   CONFIG_CN_SPEECH_COMMAND_ID1
+#define MN_SPEECH_COMMAND_ID2   CONFIG_CN_SPEECH_COMMAND_ID2
+#define MN_SPEECH_COMMAND_ID3   CONFIG_CN_SPEECH_COMMAND_ID3
+#define MN_SPEECH_COMMAND_ID4   CONFIG_CN_SPEECH_COMMAND_ID4
+#define MN_SPEECH_COMMAND_ID5   CONFIG_CN_SPEECH_COMMAND_ID5
+#define MN_SPEECH_COMMAND_ID6   CONFIG_CN_SPEECH_COMMAND_ID6
+#define MN_SPEECH_COMMAND_ID7   CONFIG_CN_SPEECH_COMMAND_ID7
+#define MN_SPEECH_COMMAND_ID8   CONFIG_CN_SPEECH_COMMAND_ID8
+#define MN_SPEECH_COMMAND_ID9   CONFIG_CN_SPEECH_COMMAND_ID9
+#define MN_SPEECH_COMMAND_ID10   CONFIG_CN_SPEECH_COMMAND_ID10
+#define MN_SPEECH_COMMAND_ID11   CONFIG_CN_SPEECH_COMMAND_ID11
+#define MN_SPEECH_COMMAND_ID12   CONFIG_CN_SPEECH_COMMAND_ID12
+#define MN_SPEECH_COMMAND_ID13   CONFIG_CN_SPEECH_COMMAND_ID13
+#define MN_SPEECH_COMMAND_ID14   CONFIG_CN_SPEECH_COMMAND_ID14
+#define MN_SPEECH_COMMAND_ID15   CONFIG_CN_SPEECH_COMMAND_ID15
+#define MN_SPEECH_COMMAND_ID16   CONFIG_CN_SPEECH_COMMAND_ID16
+#define MN_SPEECH_COMMAND_ID17   CONFIG_CN_SPEECH_COMMAND_ID17
+#define MN_SPEECH_COMMAND_ID18   CONFIG_CN_SPEECH_COMMAND_ID18
+#define MN_SPEECH_COMMAND_ID19   CONFIG_CN_SPEECH_COMMAND_ID19
+#define MN_SPEECH_COMMAND_ID20   CONFIG_CN_SPEECH_COMMAND_ID20
+#define MN_SPEECH_COMMAND_ID21   CONFIG_CN_SPEECH_COMMAND_ID21
+#define MN_SPEECH_COMMAND_ID22   CONFIG_CN_SPEECH_COMMAND_ID22
+#define MN_SPEECH_COMMAND_ID23   CONFIG_CN_SPEECH_COMMAND_ID23
+#define MN_SPEECH_COMMAND_ID24   CONFIG_CN_SPEECH_COMMAND_ID24
+#define MN_SPEECH_COMMAND_ID25   CONFIG_CN_SPEECH_COMMAND_ID25
+#define MN_SPEECH_COMMAND_ID26   CONFIG_CN_SPEECH_COMMAND_ID26
+#define MN_SPEECH_COMMAND_ID27   CONFIG_CN_SPEECH_COMMAND_ID27
+#define MN_SPEECH_COMMAND_ID28   CONFIG_CN_SPEECH_COMMAND_ID28
+#define MN_SPEECH_COMMAND_ID29   CONFIG_CN_SPEECH_COMMAND_ID29
+#define MN_SPEECH_COMMAND_ID30   CONFIG_CN_SPEECH_COMMAND_ID30
+#define MN_SPEECH_COMMAND_ID31   CONFIG_CN_SPEECH_COMMAND_ID31
+#define MN_SPEECH_COMMAND_ID32   CONFIG_CN_SPEECH_COMMAND_ID32
+#define MN_SPEECH_COMMAND_ID33   CONFIG_CN_SPEECH_COMMAND_ID33
+#define MN_SPEECH_COMMAND_ID34   CONFIG_CN_SPEECH_COMMAND_ID34
+#define MN_SPEECH_COMMAND_ID35   CONFIG_CN_SPEECH_COMMAND_ID35
+#define MN_SPEECH_COMMAND_ID36   CONFIG_CN_SPEECH_COMMAND_ID36
+#define MN_SPEECH_COMMAND_ID37   CONFIG_CN_SPEECH_COMMAND_ID37
+#define MN_SPEECH_COMMAND_ID38   CONFIG_CN_SPEECH_COMMAND_ID38
+#define MN_SPEECH_COMMAND_ID39   CONFIG_CN_SPEECH_COMMAND_ID39
+#define MN_SPEECH_COMMAND_ID40   CONFIG_CN_SPEECH_COMMAND_ID40
+#define MN_SPEECH_COMMAND_ID41   CONFIG_CN_SPEECH_COMMAND_ID41
+#define MN_SPEECH_COMMAND_ID42   CONFIG_CN_SPEECH_COMMAND_ID42
+#define MN_SPEECH_COMMAND_ID43   CONFIG_CN_SPEECH_COMMAND_ID43
+#define MN_SPEECH_COMMAND_ID44   CONFIG_CN_SPEECH_COMMAND_ID44
+#define MN_SPEECH_COMMAND_ID45   CONFIG_CN_SPEECH_COMMAND_ID45
+#define MN_SPEECH_COMMAND_ID46   CONFIG_CN_SPEECH_COMMAND_ID46
+#define MN_SPEECH_COMMAND_ID47   CONFIG_CN_SPEECH_COMMAND_ID47
+#define MN_SPEECH_COMMAND_ID48   CONFIG_CN_SPEECH_COMMAND_ID48
+#define MN_SPEECH_COMMAND_ID49   CONFIG_CN_SPEECH_COMMAND_ID49
+#define MN_SPEECH_COMMAND_ID50   CONFIG_CN_SPEECH_COMMAND_ID50
+#define MN_SPEECH_COMMAND_ID51   CONFIG_CN_SPEECH_COMMAND_ID51
+#define MN_SPEECH_COMMAND_ID52   CONFIG_CN_SPEECH_COMMAND_ID52
+#define MN_SPEECH_COMMAND_ID53   CONFIG_CN_SPEECH_COMMAND_ID53
+#define MN_SPEECH_COMMAND_ID54   CONFIG_CN_SPEECH_COMMAND_ID54
+#define MN_SPEECH_COMMAND_ID55   CONFIG_CN_SPEECH_COMMAND_ID55
+#define MN_SPEECH_COMMAND_ID56   CONFIG_CN_SPEECH_COMMAND_ID56
+#define MN_SPEECH_COMMAND_ID57   CONFIG_CN_SPEECH_COMMAND_ID57
+#define MN_SPEECH_COMMAND_ID58   CONFIG_CN_SPEECH_COMMAND_ID58
+#define MN_SPEECH_COMMAND_ID59   CONFIG_CN_SPEECH_COMMAND_ID59
+#define MN_SPEECH_COMMAND_ID60   CONFIG_CN_SPEECH_COMMAND_ID60
+#define MN_SPEECH_COMMAND_ID61   CONFIG_CN_SPEECH_COMMAND_ID61
+#define MN_SPEECH_COMMAND_ID62   CONFIG_CN_SPEECH_COMMAND_ID62
+#define MN_SPEECH_COMMAND_ID63   CONFIG_CN_SPEECH_COMMAND_ID63
+#define MN_SPEECH_COMMAND_ID64   CONFIG_CN_SPEECH_COMMAND_ID64
+#define MN_SPEECH_COMMAND_ID65   CONFIG_CN_SPEECH_COMMAND_ID65
+#define MN_SPEECH_COMMAND_ID66   CONFIG_CN_SPEECH_COMMAND_ID66
+#define MN_SPEECH_COMMAND_ID67   CONFIG_CN_SPEECH_COMMAND_ID67
+#define MN_SPEECH_COMMAND_ID68   CONFIG_CN_SPEECH_COMMAND_ID68
+#define MN_SPEECH_COMMAND_ID69   CONFIG_CN_SPEECH_COMMAND_ID69
+#define MN_SPEECH_COMMAND_ID70   CONFIG_CN_SPEECH_COMMAND_ID70
+#define MN_SPEECH_COMMAND_ID71   CONFIG_CN_SPEECH_COMMAND_ID71
+#define MN_SPEECH_COMMAND_ID72   CONFIG_CN_SPEECH_COMMAND_ID72
+#define MN_SPEECH_COMMAND_ID73   CONFIG_CN_SPEECH_COMMAND_ID73
+#define MN_SPEECH_COMMAND_ID74   CONFIG_CN_SPEECH_COMMAND_ID74
+#define MN_SPEECH_COMMAND_ID75   CONFIG_CN_SPEECH_COMMAND_ID75
+#define MN_SPEECH_COMMAND_ID76   CONFIG_CN_SPEECH_COMMAND_ID76
+#define MN_SPEECH_COMMAND_ID77   CONFIG_CN_SPEECH_COMMAND_ID77
+#define MN_SPEECH_COMMAND_ID78   CONFIG_CN_SPEECH_COMMAND_ID78
+#define MN_SPEECH_COMMAND_ID79   CONFIG_CN_SPEECH_COMMAND_ID79
+#define MN_SPEECH_COMMAND_ID80   CONFIG_CN_SPEECH_COMMAND_ID80
+#define MN_SPEECH_COMMAND_ID81   CONFIG_CN_SPEECH_COMMAND_ID81
+#define MN_SPEECH_COMMAND_ID82   CONFIG_CN_SPEECH_COMMAND_ID82
+#define MN_SPEECH_COMMAND_ID83   CONFIG_CN_SPEECH_COMMAND_ID83
+#define MN_SPEECH_COMMAND_ID84   CONFIG_CN_SPEECH_COMMAND_ID84
+#define MN_SPEECH_COMMAND_ID85   CONFIG_CN_SPEECH_COMMAND_ID85
+#define MN_SPEECH_COMMAND_ID86   CONFIG_CN_SPEECH_COMMAND_ID86
+#define MN_SPEECH_COMMAND_ID87   CONFIG_CN_SPEECH_COMMAND_ID87
+#define MN_SPEECH_COMMAND_ID88   CONFIG_CN_SPEECH_COMMAND_ID88
+#define MN_SPEECH_COMMAND_ID89   CONFIG_CN_SPEECH_COMMAND_ID89
+#define MN_SPEECH_COMMAND_ID90   CONFIG_CN_SPEECH_COMMAND_ID90
+#define MN_SPEECH_COMMAND_ID91   CONFIG_CN_SPEECH_COMMAND_ID91
+#define MN_SPEECH_COMMAND_ID92   CONFIG_CN_SPEECH_COMMAND_ID92
+#define MN_SPEECH_COMMAND_ID93   CONFIG_CN_SPEECH_COMMAND_ID93
+#define MN_SPEECH_COMMAND_ID94   CONFIG_CN_SPEECH_COMMAND_ID94
+#define MN_SPEECH_COMMAND_ID95   CONFIG_CN_SPEECH_COMMAND_ID95
+#define MN_SPEECH_COMMAND_ID96   CONFIG_CN_SPEECH_COMMAND_ID96
+#define MN_SPEECH_COMMAND_ID97   CONFIG_CN_SPEECH_COMMAND_ID97
+#define MN_SPEECH_COMMAND_ID98   CONFIG_CN_SPEECH_COMMAND_ID98
+#define MN_SPEECH_COMMAND_ID99   CONFIG_CN_SPEECH_COMMAND_ID99
+#define MN_SPEECH_COMMAND_ID100   CONFIG_CN_SPEECH_COMMAND_ID100
+#define MN_SPEECH_COMMAND_ID101   CONFIG_CN_SPEECH_COMMAND_ID101
+#define MN_SPEECH_COMMAND_ID102   CONFIG_CN_SPEECH_COMMAND_ID102
+#define MN_SPEECH_COMMAND_ID103   CONFIG_CN_SPEECH_COMMAND_ID103
+#define MN_SPEECH_COMMAND_ID104   CONFIG_CN_SPEECH_COMMAND_ID104
+#define MN_SPEECH_COMMAND_ID105   CONFIG_CN_SPEECH_COMMAND_ID105
+#define MN_SPEECH_COMMAND_ID106   CONFIG_CN_SPEECH_COMMAND_ID106
+#define MN_SPEECH_COMMAND_ID107   CONFIG_CN_SPEECH_COMMAND_ID107
+#define MN_SPEECH_COMMAND_ID108   CONFIG_CN_SPEECH_COMMAND_ID108
+#define MN_SPEECH_COMMAND_ID109   CONFIG_CN_SPEECH_COMMAND_ID109
+#define MN_SPEECH_COMMAND_ID110   CONFIG_CN_SPEECH_COMMAND_ID110
+#define MN_SPEECH_COMMAND_ID111   CONFIG_CN_SPEECH_COMMAND_ID111
+#define MN_SPEECH_COMMAND_ID112   CONFIG_CN_SPEECH_COMMAND_ID112
+#define MN_SPEECH_COMMAND_ID113   CONFIG_CN_SPEECH_COMMAND_ID113
+#define MN_SPEECH_COMMAND_ID114   CONFIG_CN_SPEECH_COMMAND_ID114
+#define MN_SPEECH_COMMAND_ID115   CONFIG_CN_SPEECH_COMMAND_ID115
+#define MN_SPEECH_COMMAND_ID116   CONFIG_CN_SPEECH_COMMAND_ID116
+#define MN_SPEECH_COMMAND_ID117   CONFIG_CN_SPEECH_COMMAND_ID117
+#define MN_SPEECH_COMMAND_ID118   CONFIG_CN_SPEECH_COMMAND_ID118
+#define MN_SPEECH_COMMAND_ID119   CONFIG_CN_SPEECH_COMMAND_ID119
+#define MN_SPEECH_COMMAND_ID120   CONFIG_CN_SPEECH_COMMAND_ID120
+#define MN_SPEECH_COMMAND_ID121   CONFIG_CN_SPEECH_COMMAND_ID121
+#define MN_SPEECH_COMMAND_ID122   CONFIG_CN_SPEECH_COMMAND_ID122
+#define MN_SPEECH_COMMAND_ID123   CONFIG_CN_SPEECH_COMMAND_ID123
+#define MN_SPEECH_COMMAND_ID124   CONFIG_CN_SPEECH_COMMAND_ID124
+#define MN_SPEECH_COMMAND_ID125   CONFIG_CN_SPEECH_COMMAND_ID125
+#define MN_SPEECH_COMMAND_ID126   CONFIG_CN_SPEECH_COMMAND_ID126
+#define MN_SPEECH_COMMAND_ID127   CONFIG_CN_SPEECH_COMMAND_ID127
+#define MN_SPEECH_COMMAND_ID128   CONFIG_CN_SPEECH_COMMAND_ID128
+#define MN_SPEECH_COMMAND_ID129   CONFIG_CN_SPEECH_COMMAND_ID129
+#define MN_SPEECH_COMMAND_ID130   CONFIG_CN_SPEECH_COMMAND_ID130
+#define MN_SPEECH_COMMAND_ID131   CONFIG_CN_SPEECH_COMMAND_ID131
+#define MN_SPEECH_COMMAND_ID132   CONFIG_CN_SPEECH_COMMAND_ID132
+#define MN_SPEECH_COMMAND_ID133   CONFIG_CN_SPEECH_COMMAND_ID133
+#define MN_SPEECH_COMMAND_ID134   CONFIG_CN_SPEECH_COMMAND_ID134
+#define MN_SPEECH_COMMAND_ID135   CONFIG_CN_SPEECH_COMMAND_ID135
+#define MN_SPEECH_COMMAND_ID136   CONFIG_CN_SPEECH_COMMAND_ID136
+#define MN_SPEECH_COMMAND_ID137   CONFIG_CN_SPEECH_COMMAND_ID137
+#define MN_SPEECH_COMMAND_ID138   CONFIG_CN_SPEECH_COMMAND_ID138
+#define MN_SPEECH_COMMAND_ID139   CONFIG_CN_SPEECH_COMMAND_ID139
+#define MN_SPEECH_COMMAND_ID140   CONFIG_CN_SPEECH_COMMAND_ID140
+#define MN_SPEECH_COMMAND_ID141   CONFIG_CN_SPEECH_COMMAND_ID141
+#define MN_SPEECH_COMMAND_ID142   CONFIG_CN_SPEECH_COMMAND_ID142
+#define MN_SPEECH_COMMAND_ID143   CONFIG_CN_SPEECH_COMMAND_ID143
+#define MN_SPEECH_COMMAND_ID144   CONFIG_CN_SPEECH_COMMAND_ID144
+#define MN_SPEECH_COMMAND_ID145   CONFIG_CN_SPEECH_COMMAND_ID145
+#define MN_SPEECH_COMMAND_ID146   CONFIG_CN_SPEECH_COMMAND_ID146
+#define MN_SPEECH_COMMAND_ID147   CONFIG_CN_SPEECH_COMMAND_ID147
+#define MN_SPEECH_COMMAND_ID148   CONFIG_CN_SPEECH_COMMAND_ID148
+#define MN_SPEECH_COMMAND_ID149   CONFIG_CN_SPEECH_COMMAND_ID149
+#define MN_SPEECH_COMMAND_ID150   CONFIG_CN_SPEECH_COMMAND_ID150
+#define MN_SPEECH_COMMAND_ID151   CONFIG_CN_SPEECH_COMMAND_ID151
+#define MN_SPEECH_COMMAND_ID152   CONFIG_CN_SPEECH_COMMAND_ID152
+#define MN_SPEECH_COMMAND_ID153   CONFIG_CN_SPEECH_COMMAND_ID153
+#define MN_SPEECH_COMMAND_ID154   CONFIG_CN_SPEECH_COMMAND_ID154
+#define MN_SPEECH_COMMAND_ID155   CONFIG_CN_SPEECH_COMMAND_ID155
+#define MN_SPEECH_COMMAND_ID156   CONFIG_CN_SPEECH_COMMAND_ID156
+#define MN_SPEECH_COMMAND_ID157   CONFIG_CN_SPEECH_COMMAND_ID157
+#define MN_SPEECH_COMMAND_ID158   CONFIG_CN_SPEECH_COMMAND_ID158
+#define MN_SPEECH_COMMAND_ID159   CONFIG_CN_SPEECH_COMMAND_ID159
+#define MN_SPEECH_COMMAND_ID160   CONFIG_CN_SPEECH_COMMAND_ID160
+#define MN_SPEECH_COMMAND_ID161   CONFIG_CN_SPEECH_COMMAND_ID161
+#define MN_SPEECH_COMMAND_ID162   CONFIG_CN_SPEECH_COMMAND_ID162
+#define MN_SPEECH_COMMAND_ID163   CONFIG_CN_SPEECH_COMMAND_ID163
+#define MN_SPEECH_COMMAND_ID164   CONFIG_CN_SPEECH_COMMAND_ID164
+#define MN_SPEECH_COMMAND_ID165   CONFIG_CN_SPEECH_COMMAND_ID165
+#define MN_SPEECH_COMMAND_ID166   CONFIG_CN_SPEECH_COMMAND_ID166
+#define MN_SPEECH_COMMAND_ID167   CONFIG_CN_SPEECH_COMMAND_ID167
+#define MN_SPEECH_COMMAND_ID168   CONFIG_CN_SPEECH_COMMAND_ID168
+#define MN_SPEECH_COMMAND_ID169   CONFIG_CN_SPEECH_COMMAND_ID169
+#define MN_SPEECH_COMMAND_ID170   CONFIG_CN_SPEECH_COMMAND_ID170
+#define MN_SPEECH_COMMAND_ID171   CONFIG_CN_SPEECH_COMMAND_ID171
+#define MN_SPEECH_COMMAND_ID172   CONFIG_CN_SPEECH_COMMAND_ID172
+#define MN_SPEECH_COMMAND_ID173   CONFIG_CN_SPEECH_COMMAND_ID173
+#define MN_SPEECH_COMMAND_ID174   CONFIG_CN_SPEECH_COMMAND_ID174
+#define MN_SPEECH_COMMAND_ID175   CONFIG_CN_SPEECH_COMMAND_ID175
+#define MN_SPEECH_COMMAND_ID176   CONFIG_CN_SPEECH_COMMAND_ID176
+#define MN_SPEECH_COMMAND_ID177   CONFIG_CN_SPEECH_COMMAND_ID177
+#define MN_SPEECH_COMMAND_ID178   CONFIG_CN_SPEECH_COMMAND_ID178
+#define MN_SPEECH_COMMAND_ID179   CONFIG_CN_SPEECH_COMMAND_ID179
+#define MN_SPEECH_COMMAND_ID180   CONFIG_CN_SPEECH_COMMAND_ID180
+#define MN_SPEECH_COMMAND_ID181   CONFIG_CN_SPEECH_COMMAND_ID181
+#define MN_SPEECH_COMMAND_ID182   CONFIG_CN_SPEECH_COMMAND_ID182
+#define MN_SPEECH_COMMAND_ID183   CONFIG_CN_SPEECH_COMMAND_ID183
+#define MN_SPEECH_COMMAND_ID184   CONFIG_CN_SPEECH_COMMAND_ID184
+#define MN_SPEECH_COMMAND_ID185   CONFIG_CN_SPEECH_COMMAND_ID185
+#define MN_SPEECH_COMMAND_ID186   CONFIG_CN_SPEECH_COMMAND_ID186
+#define MN_SPEECH_COMMAND_ID187   CONFIG_CN_SPEECH_COMMAND_ID187
+#define MN_SPEECH_COMMAND_ID188   CONFIG_CN_SPEECH_COMMAND_ID188
+#define MN_SPEECH_COMMAND_ID189   CONFIG_CN_SPEECH_COMMAND_ID189
+#define MN_SPEECH_COMMAND_ID190   CONFIG_CN_SPEECH_COMMAND_ID190
+#define MN_SPEECH_COMMAND_ID191   CONFIG_CN_SPEECH_COMMAND_ID191
+#define MN_SPEECH_COMMAND_ID192   CONFIG_CN_SPEECH_COMMAND_ID192
+#define MN_SPEECH_COMMAND_ID193   CONFIG_CN_SPEECH_COMMAND_ID193
+#define MN_SPEECH_COMMAND_ID194   CONFIG_CN_SPEECH_COMMAND_ID194
+#define MN_SPEECH_COMMAND_ID195   CONFIG_CN_SPEECH_COMMAND_ID195
+#define MN_SPEECH_COMMAND_ID196   CONFIG_CN_SPEECH_COMMAND_ID196
+#define MN_SPEECH_COMMAND_ID197   CONFIG_CN_SPEECH_COMMAND_ID197
+#define MN_SPEECH_COMMAND_ID198   CONFIG_CN_SPEECH_COMMAND_ID198
+#define MN_SPEECH_COMMAND_ID199   CONFIG_CN_SPEECH_COMMAND_ID199
+#elif CONFIG_SR_MN_ENGLISH
+#define MN_SPEECH_COMMAND_ID0   CONFIG_EN_SPEECH_COMMAND_ID0
+#define MN_SPEECH_COMMAND_ID1   CONFIG_EN_SPEECH_COMMAND_ID1
+#define MN_SPEECH_COMMAND_ID2   CONFIG_EN_SPEECH_COMMAND_ID2
+#define MN_SPEECH_COMMAND_ID3   CONFIG_EN_SPEECH_COMMAND_ID3
+#define MN_SPEECH_COMMAND_ID4   CONFIG_EN_SPEECH_COMMAND_ID4
+#define MN_SPEECH_COMMAND_ID5   CONFIG_EN_SPEECH_COMMAND_ID5
+#define MN_SPEECH_COMMAND_ID6   CONFIG_EN_SPEECH_COMMAND_ID6
+#define MN_SPEECH_COMMAND_ID7   CONFIG_EN_SPEECH_COMMAND_ID7
+#define MN_SPEECH_COMMAND_ID8   CONFIG_EN_SPEECH_COMMAND_ID8
+#define MN_SPEECH_COMMAND_ID9   CONFIG_EN_SPEECH_COMMAND_ID9
+#define MN_SPEECH_COMMAND_ID10   CONFIG_EN_SPEECH_COMMAND_ID10
+#define MN_SPEECH_COMMAND_ID11   CONFIG_EN_SPEECH_COMMAND_ID11
+#define MN_SPEECH_COMMAND_ID12   CONFIG_EN_SPEECH_COMMAND_ID12
+#define MN_SPEECH_COMMAND_ID13   CONFIG_EN_SPEECH_COMMAND_ID13
+#define MN_SPEECH_COMMAND_ID14   CONFIG_EN_SPEECH_COMMAND_ID14
+#define MN_SPEECH_COMMAND_ID15   CONFIG_EN_SPEECH_COMMAND_ID15
+#define MN_SPEECH_COMMAND_ID16   CONFIG_EN_SPEECH_COMMAND_ID16
+#define MN_SPEECH_COMMAND_ID17   CONFIG_EN_SPEECH_COMMAND_ID17
+#define MN_SPEECH_COMMAND_ID18   CONFIG_EN_SPEECH_COMMAND_ID18
+#define MN_SPEECH_COMMAND_ID19   CONFIG_EN_SPEECH_COMMAND_ID19
+#define MN_SPEECH_COMMAND_ID20   CONFIG_EN_SPEECH_COMMAND_ID20
+#define MN_SPEECH_COMMAND_ID21   CONFIG_EN_SPEECH_COMMAND_ID21
+#define MN_SPEECH_COMMAND_ID22   CONFIG_EN_SPEECH_COMMAND_ID22
+#define MN_SPEECH_COMMAND_ID23   CONFIG_EN_SPEECH_COMMAND_ID23
+#define MN_SPEECH_COMMAND_ID24   CONFIG_EN_SPEECH_COMMAND_ID24
+#define MN_SPEECH_COMMAND_ID25   CONFIG_EN_SPEECH_COMMAND_ID25
+#define MN_SPEECH_COMMAND_ID26   CONFIG_EN_SPEECH_COMMAND_ID26
+#define MN_SPEECH_COMMAND_ID27   CONFIG_EN_SPEECH_COMMAND_ID27
+#define MN_SPEECH_COMMAND_ID28   CONFIG_EN_SPEECH_COMMAND_ID28
+#define MN_SPEECH_COMMAND_ID29   CONFIG_EN_SPEECH_COMMAND_ID29
+#define MN_SPEECH_COMMAND_ID30   CONFIG_EN_SPEECH_COMMAND_ID30
+#define MN_SPEECH_COMMAND_ID31   CONFIG_EN_SPEECH_COMMAND_ID31
+#define MN_SPEECH_COMMAND_ID32   CONFIG_EN_SPEECH_COMMAND_ID32
+#define MN_SPEECH_COMMAND_ID33   CONFIG_EN_SPEECH_COMMAND_ID33
+#define MN_SPEECH_COMMAND_ID34   CONFIG_EN_SPEECH_COMMAND_ID34
+#define MN_SPEECH_COMMAND_ID35   CONFIG_EN_SPEECH_COMMAND_ID35
+#define MN_SPEECH_COMMAND_ID36   CONFIG_EN_SPEECH_COMMAND_ID36
+#define MN_SPEECH_COMMAND_ID37   CONFIG_EN_SPEECH_COMMAND_ID37
+#define MN_SPEECH_COMMAND_ID38   CONFIG_EN_SPEECH_COMMAND_ID38
+#define MN_SPEECH_COMMAND_ID39   CONFIG_EN_SPEECH_COMMAND_ID39
+#define MN_SPEECH_COMMAND_ID40   CONFIG_EN_SPEECH_COMMAND_ID40
+#define MN_SPEECH_COMMAND_ID41   CONFIG_EN_SPEECH_COMMAND_ID41
+#define MN_SPEECH_COMMAND_ID42   CONFIG_EN_SPEECH_COMMAND_ID42
+#define MN_SPEECH_COMMAND_ID43   CONFIG_EN_SPEECH_COMMAND_ID43
+#define MN_SPEECH_COMMAND_ID44   CONFIG_EN_SPEECH_COMMAND_ID44
+#define MN_SPEECH_COMMAND_ID45   CONFIG_EN_SPEECH_COMMAND_ID45
+#define MN_SPEECH_COMMAND_ID46   CONFIG_EN_SPEECH_COMMAND_ID46
+#define MN_SPEECH_COMMAND_ID47   CONFIG_EN_SPEECH_COMMAND_ID47
+#define MN_SPEECH_COMMAND_ID48   CONFIG_EN_SPEECH_COMMAND_ID48
+#define MN_SPEECH_COMMAND_ID49   CONFIG_EN_SPEECH_COMMAND_ID49
+#define MN_SPEECH_COMMAND_ID50   CONFIG_EN_SPEECH_COMMAND_ID50
+#define MN_SPEECH_COMMAND_ID51   CONFIG_EN_SPEECH_COMMAND_ID51
+#define MN_SPEECH_COMMAND_ID52   CONFIG_EN_SPEECH_COMMAND_ID52
+#define MN_SPEECH_COMMAND_ID53   CONFIG_EN_SPEECH_COMMAND_ID53
+#define MN_SPEECH_COMMAND_ID54   CONFIG_EN_SPEECH_COMMAND_ID54
+#define MN_SPEECH_COMMAND_ID55   CONFIG_EN_SPEECH_COMMAND_ID55
+#define MN_SPEECH_COMMAND_ID56   CONFIG_EN_SPEECH_COMMAND_ID56
+#define MN_SPEECH_COMMAND_ID57   CONFIG_EN_SPEECH_COMMAND_ID57
+#define MN_SPEECH_COMMAND_ID58   CONFIG_EN_SPEECH_COMMAND_ID58
+#define MN_SPEECH_COMMAND_ID59   CONFIG_EN_SPEECH_COMMAND_ID59
+#define MN_SPEECH_COMMAND_ID60   CONFIG_EN_SPEECH_COMMAND_ID60
+#define MN_SPEECH_COMMAND_ID61   CONFIG_EN_SPEECH_COMMAND_ID61
+#define MN_SPEECH_COMMAND_ID62   CONFIG_EN_SPEECH_COMMAND_ID62
+#define MN_SPEECH_COMMAND_ID63   CONFIG_EN_SPEECH_COMMAND_ID63
+#define MN_SPEECH_COMMAND_ID64   CONFIG_EN_SPEECH_COMMAND_ID64
+#define MN_SPEECH_COMMAND_ID65   CONFIG_EN_SPEECH_COMMAND_ID65
+#define MN_SPEECH_COMMAND_ID66   CONFIG_EN_SPEECH_COMMAND_ID66
+#define MN_SPEECH_COMMAND_ID67   CONFIG_EN_SPEECH_COMMAND_ID67
+#define MN_SPEECH_COMMAND_ID68   CONFIG_EN_SPEECH_COMMAND_ID68
+#define MN_SPEECH_COMMAND_ID69   CONFIG_EN_SPEECH_COMMAND_ID69
+#define MN_SPEECH_COMMAND_ID70   CONFIG_EN_SPEECH_COMMAND_ID70
+#define MN_SPEECH_COMMAND_ID71   CONFIG_EN_SPEECH_COMMAND_ID71
+#define MN_SPEECH_COMMAND_ID72   CONFIG_EN_SPEECH_COMMAND_ID72
+#define MN_SPEECH_COMMAND_ID73   CONFIG_EN_SPEECH_COMMAND_ID73
+#define MN_SPEECH_COMMAND_ID74   CONFIG_EN_SPEECH_COMMAND_ID74
+#define MN_SPEECH_COMMAND_ID75   CONFIG_EN_SPEECH_COMMAND_ID75
+#define MN_SPEECH_COMMAND_ID76   CONFIG_EN_SPEECH_COMMAND_ID76
+#define MN_SPEECH_COMMAND_ID77   CONFIG_EN_SPEECH_COMMAND_ID77
+#define MN_SPEECH_COMMAND_ID78   CONFIG_EN_SPEECH_COMMAND_ID78
+#define MN_SPEECH_COMMAND_ID79   CONFIG_EN_SPEECH_COMMAND_ID79
+#define MN_SPEECH_COMMAND_ID80   CONFIG_EN_SPEECH_COMMAND_ID80
+#define MN_SPEECH_COMMAND_ID81   CONFIG_EN_SPEECH_COMMAND_ID81
+#define MN_SPEECH_COMMAND_ID82   CONFIG_EN_SPEECH_COMMAND_ID82
+#define MN_SPEECH_COMMAND_ID83   CONFIG_EN_SPEECH_COMMAND_ID83
+#define MN_SPEECH_COMMAND_ID84   CONFIG_EN_SPEECH_COMMAND_ID84
+#define MN_SPEECH_COMMAND_ID85   CONFIG_EN_SPEECH_COMMAND_ID85
+#define MN_SPEECH_COMMAND_ID86   CONFIG_EN_SPEECH_COMMAND_ID86
+#define MN_SPEECH_COMMAND_ID87   CONFIG_EN_SPEECH_COMMAND_ID87
+#define MN_SPEECH_COMMAND_ID88   CONFIG_EN_SPEECH_COMMAND_ID88
+#define MN_SPEECH_COMMAND_ID89   CONFIG_EN_SPEECH_COMMAND_ID89
+#define MN_SPEECH_COMMAND_ID90   CONFIG_EN_SPEECH_COMMAND_ID90
+#define MN_SPEECH_COMMAND_ID91   CONFIG_EN_SPEECH_COMMAND_ID91
+#define MN_SPEECH_COMMAND_ID92   CONFIG_EN_SPEECH_COMMAND_ID92
+#define MN_SPEECH_COMMAND_ID93   CONFIG_EN_SPEECH_COMMAND_ID93
+#define MN_SPEECH_COMMAND_ID94   CONFIG_EN_SPEECH_COMMAND_ID94
+#define MN_SPEECH_COMMAND_ID95   CONFIG_EN_SPEECH_COMMAND_ID95
+#define MN_SPEECH_COMMAND_ID96   CONFIG_EN_SPEECH_COMMAND_ID96
+#define MN_SPEECH_COMMAND_ID97   CONFIG_EN_SPEECH_COMMAND_ID97
+#define MN_SPEECH_COMMAND_ID98   CONFIG_EN_SPEECH_COMMAND_ID98
+#define MN_SPEECH_COMMAND_ID99   CONFIG_EN_SPEECH_COMMAND_ID99
+#define MN_SPEECH_COMMAND_ID100   CONFIG_EN_SPEECH_COMMAND_ID100
+#define MN_SPEECH_COMMAND_ID101   CONFIG_EN_SPEECH_COMMAND_ID101
+#define MN_SPEECH_COMMAND_ID102   CONFIG_EN_SPEECH_COMMAND_ID102
+#define MN_SPEECH_COMMAND_ID103   CONFIG_EN_SPEECH_COMMAND_ID103
+#define MN_SPEECH_COMMAND_ID104   CONFIG_EN_SPEECH_COMMAND_ID104
+#define MN_SPEECH_COMMAND_ID105   CONFIG_EN_SPEECH_COMMAND_ID105
+#define MN_SPEECH_COMMAND_ID106   CONFIG_EN_SPEECH_COMMAND_ID106
+#define MN_SPEECH_COMMAND_ID107   CONFIG_EN_SPEECH_COMMAND_ID107
+#define MN_SPEECH_COMMAND_ID108   CONFIG_EN_SPEECH_COMMAND_ID108
+#define MN_SPEECH_COMMAND_ID109   CONFIG_EN_SPEECH_COMMAND_ID109
+#define MN_SPEECH_COMMAND_ID110   CONFIG_EN_SPEECH_COMMAND_ID110
+#define MN_SPEECH_COMMAND_ID111   CONFIG_EN_SPEECH_COMMAND_ID111
+#define MN_SPEECH_COMMAND_ID112   CONFIG_EN_SPEECH_COMMAND_ID112
+#define MN_SPEECH_COMMAND_ID113   CONFIG_EN_SPEECH_COMMAND_ID113
+#define MN_SPEECH_COMMAND_ID114   CONFIG_EN_SPEECH_COMMAND_ID114
+#define MN_SPEECH_COMMAND_ID115   CONFIG_EN_SPEECH_COMMAND_ID115
+#define MN_SPEECH_COMMAND_ID116   CONFIG_EN_SPEECH_COMMAND_ID116
+#define MN_SPEECH_COMMAND_ID117   CONFIG_EN_SPEECH_COMMAND_ID117
+#define MN_SPEECH_COMMAND_ID118   CONFIG_EN_SPEECH_COMMAND_ID118
+#define MN_SPEECH_COMMAND_ID119   CONFIG_EN_SPEECH_COMMAND_ID119
+#define MN_SPEECH_COMMAND_ID120   CONFIG_EN_SPEECH_COMMAND_ID120
+#define MN_SPEECH_COMMAND_ID121   CONFIG_EN_SPEECH_COMMAND_ID121
+#define MN_SPEECH_COMMAND_ID122   CONFIG_EN_SPEECH_COMMAND_ID122
+#define MN_SPEECH_COMMAND_ID123   CONFIG_EN_SPEECH_COMMAND_ID123
+#define MN_SPEECH_COMMAND_ID124   CONFIG_EN_SPEECH_COMMAND_ID124
+#define MN_SPEECH_COMMAND_ID125   CONFIG_EN_SPEECH_COMMAND_ID125
+#define MN_SPEECH_COMMAND_ID126   CONFIG_EN_SPEECH_COMMAND_ID126
+#define MN_SPEECH_COMMAND_ID127   CONFIG_EN_SPEECH_COMMAND_ID127
+#define MN_SPEECH_COMMAND_ID128   CONFIG_EN_SPEECH_COMMAND_ID128
+#define MN_SPEECH_COMMAND_ID129   CONFIG_EN_SPEECH_COMMAND_ID129
+#define MN_SPEECH_COMMAND_ID130   CONFIG_EN_SPEECH_COMMAND_ID130
+#define MN_SPEECH_COMMAND_ID131   CONFIG_EN_SPEECH_COMMAND_ID131
+#define MN_SPEECH_COMMAND_ID132   CONFIG_EN_SPEECH_COMMAND_ID132
+#define MN_SPEECH_COMMAND_ID133   CONFIG_EN_SPEECH_COMMAND_ID133
+#define MN_SPEECH_COMMAND_ID134   CONFIG_EN_SPEECH_COMMAND_ID134
+#define MN_SPEECH_COMMAND_ID135   CONFIG_EN_SPEECH_COMMAND_ID135
+#define MN_SPEECH_COMMAND_ID136   CONFIG_EN_SPEECH_COMMAND_ID136
+#define MN_SPEECH_COMMAND_ID137   CONFIG_EN_SPEECH_COMMAND_ID137
+#define MN_SPEECH_COMMAND_ID138   CONFIG_EN_SPEECH_COMMAND_ID138
+#define MN_SPEECH_COMMAND_ID139   CONFIG_EN_SPEECH_COMMAND_ID139
+#define MN_SPEECH_COMMAND_ID140   CONFIG_EN_SPEECH_COMMAND_ID140
+#define MN_SPEECH_COMMAND_ID141   CONFIG_EN_SPEECH_COMMAND_ID141
+#define MN_SPEECH_COMMAND_ID142   CONFIG_EN_SPEECH_COMMAND_ID142
+#define MN_SPEECH_COMMAND_ID143   CONFIG_EN_SPEECH_COMMAND_ID143
+#define MN_SPEECH_COMMAND_ID144   CONFIG_EN_SPEECH_COMMAND_ID144
+#define MN_SPEECH_COMMAND_ID145   CONFIG_EN_SPEECH_COMMAND_ID145
+#define MN_SPEECH_COMMAND_ID146   CONFIG_EN_SPEECH_COMMAND_ID146
+#define MN_SPEECH_COMMAND_ID147   CONFIG_EN_SPEECH_COMMAND_ID147
+#define MN_SPEECH_COMMAND_ID148   CONFIG_EN_SPEECH_COMMAND_ID148
+#define MN_SPEECH_COMMAND_ID149   CONFIG_EN_SPEECH_COMMAND_ID149
+#define MN_SPEECH_COMMAND_ID150   CONFIG_EN_SPEECH_COMMAND_ID150
+#define MN_SPEECH_COMMAND_ID151   CONFIG_EN_SPEECH_COMMAND_ID151
+#define MN_SPEECH_COMMAND_ID152   CONFIG_EN_SPEECH_COMMAND_ID152
+#define MN_SPEECH_COMMAND_ID153   CONFIG_EN_SPEECH_COMMAND_ID153
+#define MN_SPEECH_COMMAND_ID154   CONFIG_EN_SPEECH_COMMAND_ID154
+#define MN_SPEECH_COMMAND_ID155   CONFIG_EN_SPEECH_COMMAND_ID155
+#define MN_SPEECH_COMMAND_ID156   CONFIG_EN_SPEECH_COMMAND_ID156
+#define MN_SPEECH_COMMAND_ID157   CONFIG_EN_SPEECH_COMMAND_ID157
+#define MN_SPEECH_COMMAND_ID158   CONFIG_EN_SPEECH_COMMAND_ID158
+#define MN_SPEECH_COMMAND_ID159   CONFIG_EN_SPEECH_COMMAND_ID159
+#define MN_SPEECH_COMMAND_ID160   CONFIG_EN_SPEECH_COMMAND_ID160
+#define MN_SPEECH_COMMAND_ID161   CONFIG_EN_SPEECH_COMMAND_ID161
+#define MN_SPEECH_COMMAND_ID162   CONFIG_EN_SPEECH_COMMAND_ID162
+#define MN_SPEECH_COMMAND_ID163   CONFIG_EN_SPEECH_COMMAND_ID163
+#define MN_SPEECH_COMMAND_ID164   CONFIG_EN_SPEECH_COMMAND_ID164
+#define MN_SPEECH_COMMAND_ID165   CONFIG_EN_SPEECH_COMMAND_ID165
+#define MN_SPEECH_COMMAND_ID166   CONFIG_EN_SPEECH_COMMAND_ID166
+#define MN_SPEECH_COMMAND_ID167   CONFIG_EN_SPEECH_COMMAND_ID167
+#define MN_SPEECH_COMMAND_ID168   CONFIG_EN_SPEECH_COMMAND_ID168
+#define MN_SPEECH_COMMAND_ID169   CONFIG_EN_SPEECH_COMMAND_ID169
+#define MN_SPEECH_COMMAND_ID170   CONFIG_EN_SPEECH_COMMAND_ID170
+#define MN_SPEECH_COMMAND_ID171   CONFIG_EN_SPEECH_COMMAND_ID171
+#define MN_SPEECH_COMMAND_ID172   CONFIG_EN_SPEECH_COMMAND_ID172
+#define MN_SPEECH_COMMAND_ID173   CONFIG_EN_SPEECH_COMMAND_ID173
+#define MN_SPEECH_COMMAND_ID174   CONFIG_EN_SPEECH_COMMAND_ID174
+#define MN_SPEECH_COMMAND_ID175   CONFIG_EN_SPEECH_COMMAND_ID175
+#define MN_SPEECH_COMMAND_ID176   CONFIG_EN_SPEECH_COMMAND_ID176
+#define MN_SPEECH_COMMAND_ID177   CONFIG_EN_SPEECH_COMMAND_ID177
+#define MN_SPEECH_COMMAND_ID178   CONFIG_EN_SPEECH_COMMAND_ID178
+#define MN_SPEECH_COMMAND_ID179   CONFIG_EN_SPEECH_COMMAND_ID179
+#define MN_SPEECH_COMMAND_ID180   CONFIG_EN_SPEECH_COMMAND_ID180
+#define MN_SPEECH_COMMAND_ID181   CONFIG_EN_SPEECH_COMMAND_ID181
+#define MN_SPEECH_COMMAND_ID182   CONFIG_EN_SPEECH_COMMAND_ID182
+#define MN_SPEECH_COMMAND_ID183   CONFIG_EN_SPEECH_COMMAND_ID183
+#define MN_SPEECH_COMMAND_ID184   CONFIG_EN_SPEECH_COMMAND_ID184
+#define MN_SPEECH_COMMAND_ID185   CONFIG_EN_SPEECH_COMMAND_ID185
+#define MN_SPEECH_COMMAND_ID186   CONFIG_EN_SPEECH_COMMAND_ID186
+#define MN_SPEECH_COMMAND_ID187   CONFIG_EN_SPEECH_COMMAND_ID187
+#define MN_SPEECH_COMMAND_ID188   CONFIG_EN_SPEECH_COMMAND_ID188
+#define MN_SPEECH_COMMAND_ID189   CONFIG_EN_SPEECH_COMMAND_ID189
+#define MN_SPEECH_COMMAND_ID190   CONFIG_EN_SPEECH_COMMAND_ID190
+#define MN_SPEECH_COMMAND_ID191   CONFIG_EN_SPEECH_COMMAND_ID191
+#define MN_SPEECH_COMMAND_ID192   CONFIG_EN_SPEECH_COMMAND_ID192
+#define MN_SPEECH_COMMAND_ID193   CONFIG_EN_SPEECH_COMMAND_ID193
+#define MN_SPEECH_COMMAND_ID194   CONFIG_EN_SPEECH_COMMAND_ID194
+#define MN_SPEECH_COMMAND_ID195   CONFIG_EN_SPEECH_COMMAND_ID195
+#define MN_SPEECH_COMMAND_ID196   CONFIG_EN_SPEECH_COMMAND_ID196
+#define MN_SPEECH_COMMAND_ID197   CONFIG_EN_SPEECH_COMMAND_ID197
+#define MN_SPEECH_COMMAND_ID198   CONFIG_EN_SPEECH_COMMAND_ID198
+#define MN_SPEECH_COMMAND_ID199   CONFIG_EN_SPEECH_COMMAND_ID199
+#endif
+char *get_id_name(int i);
+void reset_speech_commands(model_iface_data_t *model_data, char* command_str, char *err_phrase_id);
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/model_path.h b/tools/sdk/esp32/include/esp-sr/include/esp32/model_path.h
new file mode 100644
index 00000000000..b9cdc302ad8
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/model_path.h
@@ -0,0 +1,3 @@
+#pragma once
+char *get_model_base_path(void);
+void srmodel_spiffs_init(void);
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/multinet2_ch.h b/tools/sdk/esp32/include/esp-sr/include/esp32/multinet2_ch.h
new file mode 100644
index 00000000000..2cee215dca7
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/multinet2_ch.h
@@ -0,0 +1,9 @@
+//Generated by mkmodel_py
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+
+extern const model_coeff_getter_t get_coeff_multinet2_ch;
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaoxin_wn5X3.h b/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaoxin_wn5X3.h
new file mode 100644
index 00000000000..b767bfc435d
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaoxin_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaoxin_wn5X3;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaoxin_wn6.h b/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaoxin_wn6.h
new file mode 100644
index 00000000000..c365e6d97df
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaoxin_wn6.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaoxin_wn6;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaozhi_wn5.h b/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaozhi_wn5.h
new file mode 100644
index 00000000000..04fa268d1f9
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaozhi_wn5.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaozhi_wn5;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X2.h b/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X2.h
new file mode 100644
index 00000000000..6c5f2b39e8d
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X2.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaozhi_wn5X2;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X3.h b/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X3.h
new file mode 100644
index 00000000000..190556e1bab
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaozhi_wn5X3;
diff --git a/tools/sdk/esp32/include/esp-sr/include/esp32/sr_flash.h b/tools/sdk/esp32/include/esp-sr/include/esp32/sr_flash.h
new file mode 100644
index 00000000000..6c97e51e574
--- /dev/null
+++ b/tools/sdk/esp32/include/esp-sr/include/esp32/sr_flash.h
@@ -0,0 +1,12 @@
+#pragma once
+
+#define SR_FLASH_TYPE   32
+#define SR_FLASH_SUBTYPE   32
+#define SR_FLASH_PARTITION_NAME "fr"
+#define SR_FLASH_INFO_FLAG 12138
+
+int8_t speech_command_flash_init(void);
+int8_t enroll_speech_command_to_flash_with_id(char *phrase, int mn_command_id);
+int get_use_flag_from_flash();
+int get_enroll_num_from_flash();
+char *read_speech_command_from_flash(int i);
\ No newline at end of file
diff --git a/tools/sdk/esp32/include/esp32-camera/driver/include/sensor.h b/tools/sdk/esp32/include/esp32-camera/driver/include/sensor.h
index 1f99c154185..26afeec3fd5 100755
--- a/tools/sdk/esp32/include/esp32-camera/driver/include/sensor.h
+++ b/tools/sdk/esp32/include/esp32-camera/driver/include/sensor.h
@@ -26,6 +26,8 @@ typedef enum {
     GC2145_PID = 0x2145,
     GC032A_PID = 0x232a,
     GC0308_PID = 0x9b,
+    BF3005_PID = 0x30,
+    BF20A6_PID = 0x20a6,
 } camera_pid_t;
 
 typedef enum {
@@ -38,6 +40,8 @@ typedef enum {
     CAMERA_GC2145,
     CAMERA_GC032A,
     CAMERA_GC0308,
+    CAMERA_BF3005,
+    CAMERA_BF20A6,
     CAMERA_MODEL_MAX,
     CAMERA_NONE,
 } camera_model_t;
@@ -52,6 +56,8 @@ typedef enum {
     GC2145_SCCB_ADDR   = 0x3C,// 0x78 >> 1
     GC032A_SCCB_ADDR   = 0x21,// 0x42 >> 1
     GC0308_SCCB_ADDR   = 0x21,// 0x42 >> 1
+    BF3005_SCCB_ADDR   = 0x6E,
+    BF20A6_SCCB_ADDR   = 0x6E,
 } camera_sccb_addr_t;
 
 typedef enum {
diff --git a/tools/sdk/esp32/include/esp_adc_cal/include/esp_adc_cal.h b/tools/sdk/esp32/include/esp_adc_cal/include/esp_adc_cal.h
index 171b2ed8501..445b7f65d34 100644
--- a/tools/sdk/esp32/include/esp_adc_cal/include/esp_adc_cal.h
+++ b/tools/sdk/esp32/include/esp_adc_cal/include/esp_adc_cal.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef __ESP_ADC_CAL_H__
 #define __ESP_ADC_CAL_H__
diff --git a/tools/sdk/esp32/include/esp_common/include/esp_attr.h b/tools/sdk/esp32/include/esp_common/include/esp_attr.h
index 7b73af76634..106a686b5e4 100644
--- a/tools/sdk/esp32/include/esp_common/include/esp_attr.h
+++ b/tools/sdk/esp32/include/esp_common/include/esp_attr.h
@@ -1,17 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 #ifndef __ESP_ATTR_H__
 #define __ESP_ATTR_H__
 
@@ -33,17 +25,24 @@ extern "C" {
 // Forces data into DRAM instead of flash
 #define DRAM_ATTR _SECTION_ATTR_IMPL(".dram1", __COUNTER__)
 
-#ifdef CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
+// IRAM can only be accessed as an 8-bit memory on ESP32, when CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY is set
+#define IRAM_8BIT_ACCESSIBLE (CONFIG_IDF_TARGET_ESP32 && CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY)
+
+// Make sure that IRAM is accessible as an 8-bit memory on ESP32.
+// If that's not the case, coredump cannot dump data from IRAM.
+#if IRAM_8BIT_ACCESSIBLE
 // Forces data into IRAM instead of DRAM
 #define IRAM_DATA_ATTR __attribute__((section(".iram.data")))
 
 // Forces data into IRAM instead of DRAM and map it to coredump
-#define COREDUMP_IRAM_DATA_ATTR _SECTION_ATTR_IMPL(".iram.data.coredump", __COUNTER__)
+#define COREDUMP_IRAM_DATA_ATTR _SECTION_ATTR_IMPL(".iram2.coredump", __COUNTER__)
 
 // Forces bss into IRAM instead of DRAM
 #define IRAM_BSS_ATTR __attribute__((section(".iram.bss")))
 #else
-#define COREDUMP_IRAM_DATA_ATTR
+
+// IRAM is not accessible as an 8-bit memory, put IRAM coredump variables in DRAM
+#define COREDUMP_IRAM_DATA_ATTR COREDUMP_DRAM_ATTR
 #define IRAM_DATA_ATTR
 
 #define IRAM_BSS_ATTR
@@ -103,7 +102,9 @@ extern "C" {
 #define RTC_NOINIT_ATTR  _SECTION_ATTR_IMPL(".rtc_noinit", __COUNTER__)
 
 // Forces code into DRAM instead of flash and map it to coredump
-#define COREDUMP_DRAM_ATTR _SECTION_ATTR_IMPL(".dram1.coredump", __COUNTER__)
+// Use dram2 instead of dram1 to make sure this section will not be included
+// by dram1 section in the linker script
+#define COREDUMP_DRAM_ATTR _SECTION_ATTR_IMPL(".dram2.coredump", __COUNTER__)
 
 // Forces data into RTC memory and map it to coredump
 #define COREDUMP_RTC_DATA_ATTR _SECTION_ATTR_IMPL(".rtc.coredump", __COUNTER__)
diff --git a/tools/sdk/esp32/include/esp_common/include/esp_check.h b/tools/sdk/esp32/include/esp_common/include/esp_check.h
index 524cb376a38..d0e09cf28f0 100644
--- a/tools/sdk/esp32/include/esp_common/include/esp_check.h
+++ b/tools/sdk/esp32/include/esp_common/include/esp_check.h
@@ -25,6 +25,7 @@ extern "C" {
  */
 #if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
 #define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                       \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             return err_rc_;                                                                     \
@@ -35,6 +36,7 @@ extern "C" {
  * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
  */
 #define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             return err_rc_;                                                                     \
@@ -46,6 +48,7 @@ extern "C" {
  * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
  */
 #define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             ret = err_rc_;                                                                      \
@@ -57,6 +60,7 @@ extern "C" {
  * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
  */
 #define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             ret = err_rc_;                                                                      \
@@ -69,6 +73,7 @@ extern "C" {
  * and returns with the supplied 'err_code'.
  */
 #define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             return err_code;                                                                    \
         }                                                                                       \
@@ -78,6 +83,7 @@ extern "C" {
  * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
  */
 #define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             return err_code;                                                                    \
         }                                                                                       \
@@ -88,6 +94,7 @@ extern "C" {
  * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
  */
 #define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             ret = err_code;                                                                     \
             goto goto_tag;                                                                      \
@@ -98,6 +105,7 @@ extern "C" {
  * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
  */
 #define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             ret = err_code;                                                                     \
             goto goto_tag;                                                                      \
diff --git a/tools/sdk/esp32/include/esp_common/include/esp_err.h b/tools/sdk/esp32/include/esp_common/include/esp_err.h
index d31bb9a0753..f317f8a09f5 100644
--- a/tools/sdk/esp32/include/esp_common/include/esp_err.h
+++ b/tools/sdk/esp32/include/esp_common/include/esp_err.h
@@ -1,16 +1,9 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
 #include <stdint.h>
@@ -46,6 +39,7 @@ typedef int esp_err_t;
 #define ESP_ERR_MESH_BASE           0x4000  /*!< Starting number of MESH error codes */
 #define ESP_ERR_FLASH_BASE          0x6000  /*!< Starting number of flash error codes */
 #define ESP_ERR_HW_CRYPTO_BASE      0xc000  /*!< Starting number of HW cryptography module error codes */
+#define ESP_ERR_MEMPROT_BASE        0xd000  /*!< Starting number of Memory Protection API error codes */
 
 /**
   * @brief Returns string for esp_err_t error codes
diff --git a/tools/sdk/esp32/include/esp_common/include/esp_idf_version.h b/tools/sdk/esp32/include/esp_common/include/esp_idf_version.h
index 7637b814b65..db04f85f90a 100644
--- a/tools/sdk/esp32/include/esp_common/include/esp_idf_version.h
+++ b/tools/sdk/esp32/include/esp_common/include/esp_idf_version.h
@@ -23,7 +23,7 @@ extern "C" {
 /** Minor version number (x.X.x) */
 #define ESP_IDF_VERSION_MINOR   4
 /** Patch version number (x.x.X) */
-#define ESP_IDF_VERSION_PATCH   0
+#define ESP_IDF_VERSION_PATCH   1
 
 /**
  * Macro to convert IDF version number into an integer
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/esp_chip_info.h b/tools/sdk/esp32/include/esp_hw_support/include/esp_chip_info.h
index 69d23c08d36..0b081d37e1b 100644
--- a/tools/sdk/esp32/include/esp_hw_support/include/esp_chip_info.h
+++ b/tools/sdk/esp32/include/esp_hw_support/include/esp_chip_info.h
@@ -33,6 +33,7 @@ typedef enum {
 #define CHIP_FEATURE_BLE            BIT(4)      //!< Chip has Bluetooth LE
 #define CHIP_FEATURE_BT             BIT(5)      //!< Chip has Bluetooth Classic
 #define CHIP_FEATURE_IEEE802154     BIT(6)      //!< Chip has IEEE 802.15.4
+#define CHIP_FEATURE_EMB_PSRAM      BIT(7)      //!< Chip has embedded psram
 
 /**
  * @brief The structure represents information about the chip
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/esp_memprot.h b/tools/sdk/esp32/include/esp_hw_support/include/esp_memprot.h
new file mode 100644
index 00000000000..c9557eae935
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/esp_memprot.h
@@ -0,0 +1,199 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/////////////////////////////////////////////////////////////////////////////////////////
+// ESP Memory Protection API (PMS)
+// - allows configuration and violation-interrupt handling of the PMS module operations
+// - not intended for public use.
+
+#pragma once
+
+#include "sdkconfig.h"
+#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_err.h"
+#include "esp_memprot_err.h"
+#include "soc_memprot_types.h"
+#include "esp_memprot_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_MEMPROT_ERR_CHECK(retval, fnc) if ((retval=fnc) != ESP_OK) { return retval; }
+
+/**
+* @brief Basic PMS interrupt source info
+*/
+typedef struct {
+    esp_mprot_mem_t mem_type;   /*!< Memory type containing the faulting address  */
+    int core;                   /*!< CPU/Core ID running the faulting instruction  */
+} esp_memp_intr_source_t;
+
+/**
+ * @brief Clears current interrupt ON flag for given Memory type and CPU/Core ID
+ *
+ * This operation is non-atomic for some chips by PMS module design
+ * In such a case the interrupt clearing happens in two steps:
+ *      1. Interrupt CLR flag is set (clears interrupt-ON status and inhibits linked interrupt processing)
+ *      2. Interrupt CLR flag is reset (resumes the interrupt monitoring)
+ *
+ * @param mem_type Memory type (see esp_mprot_mem_t enum)
+ * @param core Target CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_monitor_clear_intr(const esp_mprot_mem_t mem_type, int const *const core);
+
+/**
+ * @brief Checks whether any of the PMS settings is locked
+ *
+ * @param[out] locked Any lock on? (true/false)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid locked ptr
+ *         Other failures: error code of any failing esp_mprot_get_*_lock() routine (called internally)
+ */
+esp_err_t esp_mprot_is_conf_locked_any(bool *locked);
+
+/**
+ * @brief Checks whether any PMS violation-interrupt monitoring is enabled
+ *
+ * @param[out] locked Any PMS violation interrupt monitor is enabled (true/false)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid enabled ptr
+ *         Other failures: error code of esp_mprot_get_monitor_en() routine (called internally for all Memory types)
+ */
+esp_err_t esp_mprot_is_intr_ena_any(bool *enabled);
+
+/**
+ * @brief Returns active PMS violation-interrupt Memory type if any (MEMPROT_TYPE_NONE when none detected)
+ * and the CPU/CoreID which was running the faulty code (-1 when no interrupt available)
+ *
+ * If there are more interrupts indicated on (shouldn't happen), the order of precedence is given by 'esp_mprot_mem_t' enum definition (low->high)
+ *
+ * @param[out] mem_type Out-pointer for Memory type given by the faulting address (see esp_mprot_mem_t enum)
+ * @param[out] core Out-pointer for CPU/Core ID (see *_CPU_NUM defs in soc.h)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer(s)
+ */
+esp_err_t esp_mprot_get_active_intr(esp_memp_intr_source_t *active_memp_intr);
+
+/**
+ * @brief Returns the address which caused the violation interrupt for given Memory type and CPU/Core ID.
+ * This function is to be called after a basic resolving of (current) interrupt's parameters (ie corresponding
+ * Memory type and CPU ID see esp_mprot_get_active_intr()). This is to minimize processing time of actual exception
+ * as this API is typicaly used in a panic-handling code.
+ * If there is no active interrupt available for the Memory type/CPU ID required, fault_addr is set to NULL.
+ *
+ * @param mem_type memory type
+ * @param[out] fault_addr Address of the operation which caused the PMS violation interrupt
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid fault_addr pointer
+ */
+esp_err_t esp_mprot_get_violate_addr(const esp_mprot_mem_t mem_type, void **fault_addr, int const *const core);
+
+/**
+ * @brief Returns PMS World identifier of the code causing the violation interrupt
+ *
+ * The value is read from appropriate PMS violation status register and thus might be 0 if the interrupt is not currently active.
+ *
+ * @param mem_type Memory type
+ * @param[out] world PMS World type (see esp_mprot_pms_world_t)
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer(s)
+ *         ESP_ERR_MEMPROT_WORLD_INVALID on invalid World identifier fetched from the register
+ */
+esp_err_t esp_mprot_get_violate_world(const esp_mprot_mem_t mem_type, esp_mprot_pms_world_t *world, int const *const core);
+
+/**
+ * @brief Returns an operation type which caused the violation interrupt
+ *
+ * The operation resolving is processed over various PMS status register flags, according to given Memory type argument.
+ * If the interrupt is not active the result returned is irrelevant (likely evaluated to MEMPROT_OP_READ).
+ *
+ * @param mem_type Memory type
+ * @param[out] oper Operation type (see MEMPROT_OP_* defines)
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid oper pointer
+ */
+esp_err_t esp_mprot_get_violate_operation(const esp_mprot_mem_t mem_type, uint32_t *oper, int const *const core);
+
+/**
+ * @brief Checks whether given memory type supports byte-enables info
+ *
+ * Byte-enables status is available only for DMA/DRAM operations
+  *
+ * @param mem_type memory type
+ *
+ * @return byte-enables info available true/false
+ */
+bool esp_mprot_has_byte_enables(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Returns byte-enables for the address which caused the violation interrupt
+ *
+ * The value is taken from appropriate PMS violation status register, based on given Memory type
+ *
+ * @param mem_type Memory type (MEMPROT_TYPE_DRAM0_SRAM)
+ * @param[out] byte_en Byte-enables bits
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARGUMENT on invalid byte_en pointer
+ */
+esp_err_t esp_mprot_get_violate_byte_enables(const esp_mprot_mem_t mem_type, uint32_t *byte_en, int const *const core);
+
+/**
+ * @brief Convenient routine for setting the PMS defaults
+ *
+ * Called on system startup, depending on ESP_SYSTEM_MEMPROT_FEATURE Kconfig value
+ *
+ * @param memp_config pointer to Memprot configuration structure (esp_memp_config_t). The structure si chip-specific,
+ * for details and defaults see appropriate [target-chip]/soc_memprot_types.h
+ *
+ * @return ESP_OK on success
+ *         Other failures: error code of the failing routine called internally. No specific error processing provided in such a case
+ *         due to large number of embedded calls (ie no global unique error table is provided and thus one error code can have different meanings,
+ *         depending on the routine issuing the error)
+ */
+esp_err_t esp_mprot_set_prot(const esp_memp_config_t *memp_config);
+
+/**
+ * @brief Generates PMS configuration string of actual device (diagnostics)
+ *
+ * The functions generates a string from current configuration, control and status registers of the PMS (or similar) module of actual device.
+ * The values are fetched using HAL LL calls to help finding possible errors in the Memprot API implementation
+ *
+ * @param[out] dump_info_string configuration string buffer pointer. The string is allocated by the callee and must be freed by the caller.
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_NO_MEM on buffer allocation failure
+ *         ESP_ERR_INVALID_ARGUMENT on invalid dump_info_string pointer
+ */
+esp_err_t esp_mprot_dump_configuration(char **dump_info_string);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/esp_memprot_err.h b/tools/sdk/esp32/include/esp_hw_support/include/esp_memprot_err.h
new file mode 100644
index 00000000000..5556d2c8894
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/esp_memprot_err.h
@@ -0,0 +1,28 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+*
+* SPDX-License-Identifier: Apache-2.0
+*/
+
+#pragma once
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief ESP Memprot API error code definition
+*/
+#define ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID     (ESP_ERR_MEMPROT_BASE + 1)   /**< Memory type invalid in given context */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID      (ESP_ERR_MEMPROT_BASE + 2)   /**< Splitting address invalid in given context */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_OUT_OF_RANGE (ESP_ERR_MEMPROT_BASE + 3)   /**< Splitting address out of range */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_UNALIGNED    (ESP_ERR_MEMPROT_BASE + 4)   /**< Splitting address not aligned to required boundaries */
+#define ESP_ERR_MEMPROT_UNIMGMT_BLOCK_INVALID   (ESP_ERR_MEMPROT_BASE + 5)   /**< Required unified-management block is not valid */
+#define ESP_ERR_MEMPROT_WORLD_INVALID           (ESP_ERR_MEMPROT_BASE + 6)   /**< Required World identifier is not valid */
+#define ESP_ERR_MEMPROT_AREA_INVALID            (ESP_ERR_MEMPROT_BASE + 7)   /**< Required Area identifier is not valid */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/esp_memprot_types.h b/tools/sdk/esp32/include/esp_hw_support/include/esp_memprot_types.h
new file mode 100644
index 00000000000..e37fee54578
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/esp_memprot_types.h
@@ -0,0 +1,36 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief PMS World type (attribute per PMS area, similar to x86 Ring scheme)
+ */
+typedef enum {
+    MEMPROT_PMS_WORLD_NONE                      = 0x00000000,
+    MEMPROT_PMS_WORLD_0                         = 0x00000001,
+    MEMPROT_PMS_WORLD_1                         = 0x00000002,
+    MEMPROT_PMS_WORLD_2                         = 0x00000004,
+    MEMPROT_PMS_WORLD_ALL                       = 0x7FFFFFFF,
+    MEMPROT_PMS_WORLD_INVALID                   = 0x80000000
+} esp_mprot_pms_world_t;
+
+/**
+ * @brief Memory operation/permission type recognized by PMS
+ */
+#define MEMPROT_OP_NONE                         0x00000000
+#define MEMPROT_OP_READ                         0x00000001
+#define MEMPROT_OP_WRITE                        0x00000002
+#define MEMPROT_OP_EXEC                         0x00000004
+#define MEMPROT_OP_INVALID                      0x80000000
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/esp_private/esp_memprot_internal.h b/tools/sdk/esp32/include/esp_hw_support/include/esp_private/esp_memprot_internal.h
new file mode 100644
index 00000000000..caeb7584862
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/esp_private/esp_memprot_internal.h
@@ -0,0 +1,199 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_err.h"
+#include "esp_memprot_err.h"
+#include "hal/memprot_types.h"
+#include "soc_memprot_types.h"
+#include "esp_memprot_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief Convert Memprot low level errors to esp_err_t
+*/
+esp_err_t esp_mprot_ll_err_to_esp_err(const memprot_ll_err_t err);
+
+/**
+ * @brief Convert Memprot low level PMS World IDs to esp_mprot_pms_world_t
+ */
+esp_mprot_pms_world_t esp_mprot_ll_world_to_hl_world(const memprot_ll_world_t world);
+
+/**
+ * @brief Converts operation type to string, no combination of operations allowed
+ *
+ * @param oper_type PMS operation type
+ */
+const char *esp_mprot_oper_type_to_str(const uint32_t oper_type);
+
+/**
+ * @brief Converts PMS World type to string
+ *
+ * @param area_type PMS World type
+ */
+const char *esp_mprot_pms_world_to_str(const esp_mprot_pms_world_t world_type);
+
+/**
+ * @brief Sets splitting address for given line type in the target Memory type
+ *
+ * @param mem_type memory type
+ * @param line_type split address type
+ * @param line_addr target address from a memory range relevant to given line_addr
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID on invalid line_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_OUT_OF_RANGE on splitting line out of given memory-type range
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_UNALIGNED on splitting line not aligned to PMS-required boundaries
+ */
+esp_err_t esp_mprot_set_split_addr(const esp_mprot_mem_t mem_type, const esp_mprot_split_addr_t line_type, const void *line_addr);
+
+/**
+ * @brief Gets PMS splitting address for given split_addr type
+ *
+ * The value is read from the PMS configuration registers
+ *
+ * @param mem_type memory type
+ * @param line_type Split line type (see esp_mprot_split_addr_t enum)
+ * @param[out] line_addr Split line address from the configuration register
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on line_addr is pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID on invalid line_type
+ */
+esp_err_t esp_mprot_get_split_addr(const esp_mprot_mem_t mem_type, const esp_mprot_split_addr_t line_type, void **line_addr);
+
+/**
+ * @brief Returns default main I/D splitting address for given Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] def_split_addr Main I/D splitting address of required mem_type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid def_split_addr pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_get_default_main_split_addr(const esp_mprot_mem_t mem_type, void **def_split_addr);
+
+/**
+ * @brief Sets a lock for the main IRAM/DRAM splitting addresses
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_split_addr_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for the splitting address configuration of given Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARGUMENT on invalid locked pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_get_split_addr_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Sets a lock for PMS Area settings of required Memory type
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_pms_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS Area settings of required Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARGUMENT on invalid locked pointer
+ */
+esp_err_t esp_mprot_get_pms_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Sets permissions for given PMS Area
+ *
+ * @param area_type PMS area type
+ * @param flags combination of MEMPROT_OP_* defines
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_pms_area(const esp_mprot_pms_area_t area_type, const uint32_t flags);
+
+/**
+ * @brief Gets current permissions for given PMS Area
+ *
+ * @param area_type PMS area type
+ * @param[out] flags combination of MEMPROT_OP_* defines
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid flags pointer
+ */
+esp_err_t esp_mprot_get_pms_area(const esp_mprot_pms_area_t area_type, uint32_t *flags);
+
+/**
+ * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type (see esp_mprot_mem_t enum)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_monitor_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid locked pointer
+ */
+esp_err_t esp_mprot_get_monitor_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Enable PMS violation interrupt monitoring of required Memory type
+ *
+ * @param mem_type memory type
+ * @param enable enable/disable violation interrupt monitoring
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_monitor_en(const esp_mprot_mem_t mem_type, const bool enable);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/memprot.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/memprot.h
deleted file mode 100644
index 818cd677dc8..00000000000
--- a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/memprot.h
+++ /dev/null
@@ -1,449 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-
-/* INTERNAL API
- * generic interface to PMS memory protection features
- */
-
-#pragma once
-
-#include <stdbool.h>
-#include <stdint.h>
-
-#include "esp_attr.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifndef IRAM_SRAM_START
-#define IRAM_SRAM_START             0x4037C000
-#endif
-
-#ifndef DRAM_SRAM_START
-#define DRAM_SRAM_START             0x3FC7C000
-#endif
-
-#ifndef MAP_DRAM_TO_IRAM
-#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + IRAM_SRAM_START)
-#endif
-
-#ifndef MAP_IRAM_TO_DRAM
-#define MAP_IRAM_TO_DRAM(addr)       (addr - IRAM_SRAM_START + DRAM_SRAM_START)
-#endif
-
-typedef enum {
-    MEMPROT_NONE =              0x00000000,
-    MEMPROT_IRAM0_SRAM =        0x00000001,
-    MEMPROT_DRAM0_SRAM =        0x00000002,
-    MEMPROT_ALL =               0xFFFFFFFF
-} mem_type_prot_t;
-
-typedef enum {
-    MEMPROT_SPLITLINE_NONE = 0,
-    MEMPROT_IRAM0_DRAM0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_1_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
-} split_line_t;
-
-typedef enum {
-    MEMPROT_PMS_AREA_NONE = 0,
-    MEMPROT_IRAM0_PMS_AREA_0,
-    MEMPROT_IRAM0_PMS_AREA_1,
-    MEMPROT_IRAM0_PMS_AREA_2,
-    MEMPROT_IRAM0_PMS_AREA_3,
-    MEMPROT_DRAM0_PMS_AREA_0,
-    MEMPROT_DRAM0_PMS_AREA_1,
-    MEMPROT_DRAM0_PMS_AREA_2,
-    MEMPROT_DRAM0_PMS_AREA_3
-} pms_area_t;
-
-typedef enum
-{
-    MEMPROT_PMS_WORLD_0 = 0,
-    MEMPROT_PMS_WORLD_1,
-    MEMPROT_PMS_WORLD_2,
-    MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
-} pms_world_t;
-
-typedef enum
-{
-    MEMPROT_PMS_OP_READ = 0,
-    MEMPROT_PMS_OP_WRITE,
-    MEMPROT_PMS_OP_FETCH,
-    MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
-} pms_operation_type_t;
-
-/**
- * @brief Converts Memory protection type to string
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
-
-/**
- * @brief Converts Split line type to string
- *
- * @param line_type Split line type (see split_line_t enum)
- */
-const char *esp_memprot_split_line_to_str(split_line_t line_type);
-
-/**
- * @brief Converts PMS Area type to string
- *
- * @param area_type PMS Area type (see pms_area_t enum)
- */
-const char *esp_memprot_pms_to_str(pms_area_t area_type);
-
-/**
- * @brief Returns PMS splitting address for given Split line type
- *
- * The value is taken from PMS configuration registers (IRam0 range)
- * For details on split lines see 'esp_memprot_set_prot_int' function description
- *
- * @param line_type Split line type (see split_line_t enum)
- *
- * @return appropriate split line address
- */
-uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
-
-/**
- * @brief Returns default main IRAM/DRAM splitting address
- *
- * The address value is given by _iram_text_end global (IRam0 range)
-
- * @return Main I/D split line (IRam0_DRam0_Split_Addr)
- */
-void *esp_memprot_get_default_main_split_addr(void);
-
-/**
- * @brief Sets a lock for the main IRAM/DRAM splitting address
- *
- * Locks can be unlocked only by digital system reset
- */
-void esp_memprot_set_split_line_lock(void);
-
-/**
- * @brief Gets a lock status for the main IRAM/DRAM splitting address
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_split_line_lock(void);
-
-/**
- * @brief Sets required split line address
- *
- * @param line_type Split line type (see split_line_t enum)
- * @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
- */
-void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
-
-/**
- * @brief Sets a lock for PMS Area settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS Area settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- * @param x Execute permission flag
- */
-void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
-
-/**
- * @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- * @param x Execute permission flag holder
- */
-void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
-
-/**
- * @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- */
-void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
-
-/**
- * @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- */
-void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
-
-/**
- * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Enable PMS violation interrupt monitoring of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- * @param enable/disable
- */
-void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
-
-/**
- * @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (enabled/disabled)
- */
-bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets CPU ID for currently active PMS violation interrupt
- *
- * @return CPU ID (CPU_PRO for ESP32C3)
- */
-int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
-
-/**
- * @brief Clears current interrupt ON flag for given Memory type
- *
- * Interrupt clearing happens in two steps:
- *      1. Interrupt CLR flag is set (to clear the interrupt ON status)
- *      2. Interrupt CLR flag is reset (to allow further monitoring)
- * This operation is non-atomic by PMS module design
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns active PMS violation interrupt (if any)
- *
- * This function iterates through supported Memory type status registers
- * and returns the first interrupt-on flag. If none is found active,
- * MEMPROT_NONE is returned.
- * Order of checking (in current version):
- *      1. MEMPROT_IRAM0_SRAM
- *      2. MEMPROT_DRAM0_SRAM
- *
- * @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
- */
-mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
-
-/**
- * @brief Checks whether any violation interrupt is active
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_locked_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the address which caused the violation interrupt (if any)
- *
- * The address is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return faulting address
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the World identifier of the code causing the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return World identifier (see pms_world_t enum)
- */
-pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns Read or Write operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
- */
-pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- * Effective only on IRam0 access
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (LoadStore bit on/off)
- */
-bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns byte-enables for the address which caused the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return byte-enables
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns raw contents of DRam0 status register 1
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
-
-/**
- * @brief Returns raw contents of DRam0 status register 2
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
-
-/**
- * @brief Returns raw contents of IRam0 status register
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
-
-/**
- * @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
- *
- * Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
- * The registration makes the panic-handler routine being called when the interrupt appears
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
-
-/**
- * @brief Convenient routine for setting the PMS defaults
- *
- * Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
- * For implementation details see 'esp_memprot_set_prot_int' description
- *
- * @param invoke_panic_handler register all interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
- */
-void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
-
-/**
- * @brief Internal routine for setting the PMS defaults
- *
- * Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
- * (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
- * is used (&_iram_text_end) and all the remaining lines share the same address.
- * The function sets all the split lines and PMS areas to the same space,
- * ie there is a single instruction space and single data space at the end.
- * The PMS split lines and permission areas scheme described below:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                    ...       |                 IRam0_PMS_0                 |
- *               DRam0_PMS_0   -----------------------------------------------    IRam0_line1_Split_addr
- *                    ...       |                 IRam0_PMS_1                 |
- *                    ...       -----------------------------------------------   IRam0_line0_Split_addr
- *                              |                 IRam0_PMS_2                 |
- *                              ===============================================   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 DRam0_PMS_1                 |
- * DRam0_DMA_line0_Split_addr   -----------------------------------------------       ...
- *                              |                 DRam0_PMS_2                 |       ...
- * DRam0_DMA_line1_Split_addr   -----------------------------------------------   IRam0_PMS_3
- *                              |                 DRam0_PMS_3                 |       ...
- *                              -----------------------------------------------
- *
- * Default settings provided by 'esp_memprot_set_prot_int' are as follows:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                              |   IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2   |
- *                              |                 DRam0_PMS_0                 |   IRam0_line1_Split_addr
- * DRam0_DMA_line0_Split_addr   |                                             |             =
- *               =              ===============================================   IRam0_line0_Split_addr
- * DRam0_DMA_line1_Split_addr   |                                             |             =
- *                              |   DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3   |   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 IRam0_PMS_3                 |
- *                              -----------------------------------------------
- *
- * Once the memprot feature is locked, it can be unlocked only by digital system reset
- *
- * @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
- */
-void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
-
-/**
- * @brief Returns raw contents of PMS interrupt monitor register for given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return 32-bit register value
- */
-uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h
new file mode 100644
index 00000000000..318c6109617
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h
@@ -0,0 +1,175 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-C3 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_IRAM0_SRAM                     = 0x00000001,
+    MEMPROT_TYPE_DRAM0_SRAM                     = 0x00000002,
+    MEMPROT_TYPE_IRAM0_RTCFAST                  = 0x00000004,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000,
+    MEMPROT_TYPE_IRAM0_ANY                      = MEMPROT_TYPE_IRAM0_SRAM | MEMPROT_TYPE_IRAM0_RTCFAST
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_IRAM0_DRAM0              = 0x00000001,
+    MEMPROT_SPLIT_ADDR_IRAM0_LINE_0             = 0x00000002,
+    MEMPROT_SPLIT_ADDR_IRAM0_LINE_1             = 0x00000004,
+    MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_0         = 0x00000008,
+    MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_1         = 0x00000010,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000,
+    MEMPROT_SPLIT_ADDR_MAIN                     = MEMPROT_SPLIT_ADDR_IRAM0_DRAM0
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_IRAM0_0                    = 0x00000001,
+    MEMPROT_PMS_AREA_IRAM0_1                    = 0x00000002,
+    MEMPROT_PMS_AREA_IRAM0_2                    = 0x00000004,
+    MEMPROT_PMS_AREA_IRAM0_3                    = 0x00000008,
+    MEMPROT_PMS_AREA_DRAM0_0                    = 0x00000010,
+    MEMPROT_PMS_AREA_DRAM0_1                    = 0x00000020,
+    MEMPROT_PMS_AREA_DRAM0_2                    = 0x00000040,
+    MEMPROT_PMS_AREA_DRAM0_3                    = 0x00000080,
+    MEMPROT_PMS_AREA_IRAM0_RTCFAST_LO           = 0x00000100,
+    MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI           = 0x00000200,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "NONE";
+    case MEMPROT_TYPE_IRAM0_SRAM:
+        return "IRAM0_SRAM";
+    case MEMPROT_TYPE_DRAM0_SRAM:
+        return "DRAM0_SRAM";
+    case MEMPROT_TYPE_IRAM0_RTCFAST:
+        return "IRAM0_RTCFAST";
+    case MEMPROT_TYPE_IRAM0_ANY:
+        return "IRAM0_ANY";
+    case MEMPROT_TYPE_ALL:
+        return "ALL";
+    default:
+        return "INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_IRAM0_DRAM0:
+        return "SPLIT_ADDR_IRAM0_DRAM0";
+    case MEMPROT_SPLIT_ADDR_IRAM0_LINE_0:
+        return "SPLIT_ADDR_IRAM0_LINE_0";
+    case MEMPROT_SPLIT_ADDR_IRAM0_LINE_1:
+        return "SPLIT_ADDR_IRAM0_LINE_1";
+    case MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_0:
+        return "SPLIT_ADDR_DRAM0_DMA_LINE_0";
+    case MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_1:
+        return "SPLIT_ADDR_DRAM0_DMA_LINE_1";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "SPLIT_ADDR_ALL";
+    default:
+        return "SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_IRAM0_0:
+        return "PMS_AREA_IRAM0_0";
+    case MEMPROT_PMS_AREA_IRAM0_1:
+        return "PMS_AREA_IRAM0_1";
+    case MEMPROT_PMS_AREA_IRAM0_2:
+        return "PMS_AREA_IRAM0_2";
+    case MEMPROT_PMS_AREA_IRAM0_3:
+        return "PMS_AREA_IRAM0_3";
+    case MEMPROT_PMS_AREA_DRAM0_0:
+        return "PMS_AREA_DRAM0_0";
+    case MEMPROT_PMS_AREA_DRAM0_1:
+        return "PMS_AREA_DRAM0_1";
+    case MEMPROT_PMS_AREA_DRAM0_2:
+        return "PMS_AREA_DRAM0_2";
+    case MEMPROT_PMS_AREA_DRAM0_3:
+        return "PMS_AREA_DRAM0_3";
+    case MEMPROT_PMS_AREA_IRAM0_RTCFAST_LO:
+        return "PMS_AREA_IRAM0_RTCFAST_LO";
+    case MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI:
+        return "PMS_AREA_IRAM0_RTCFAST_HI";
+    case MEMPROT_PMS_AREA_ALL:
+        return "PMS_AREA_ALL";
+    default:
+        return "PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/memprot.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/memprot.h
deleted file mode 100644
index 75228580ffd..00000000000
--- a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/memprot.h
+++ /dev/null
@@ -1,448 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-
-/* INTERNAL API
- * generic interface to PMS memory protection features
- */
-
-#pragma once
-
-#include <stdbool.h>
-#include <stdint.h>
-#include "esp_attr.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifndef IRAM_SRAM_START
-#define IRAM_SRAM_START             0x4037C000
-#endif
-
-#ifndef DRAM_SRAM_START
-#define DRAM_SRAM_START             0x3FC7C000
-#endif
-
-#ifndef MAP_DRAM_TO_IRAM
-#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + IRAM_SRAM_START)
-#endif
-
-#ifndef MAP_IRAM_TO_DRAM
-#define MAP_IRAM_TO_DRAM(addr)       (addr - IRAM_SRAM_START + DRAM_SRAM_START)
-#endif
-
-typedef enum {
-    MEMPROT_NONE =              0x00000000,
-    MEMPROT_IRAM0_SRAM =        0x00000001,
-    MEMPROT_DRAM0_SRAM =        0x00000002,
-    MEMPROT_ALL =               0xFFFFFFFF
-} mem_type_prot_t;
-
-typedef enum {
-    MEMPROT_SPLITLINE_NONE = 0,
-    MEMPROT_IRAM0_DRAM0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_1_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
-} split_line_t;
-
-typedef enum {
-    MEMPROT_PMS_AREA_NONE = 0,
-    MEMPROT_IRAM0_PMS_AREA_0,
-    MEMPROT_IRAM0_PMS_AREA_1,
-    MEMPROT_IRAM0_PMS_AREA_2,
-    MEMPROT_IRAM0_PMS_AREA_3,
-    MEMPROT_DRAM0_PMS_AREA_0,
-    MEMPROT_DRAM0_PMS_AREA_1,
-    MEMPROT_DRAM0_PMS_AREA_2,
-    MEMPROT_DRAM0_PMS_AREA_3
-} pms_area_t;
-
-typedef enum
-{
-    MEMPROT_PMS_WORLD_0 = 0,
-    MEMPROT_PMS_WORLD_1,
-    MEMPROT_PMS_WORLD_2,
-    MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
-} pms_world_t;
-
-typedef enum
-{
-    MEMPROT_PMS_OP_READ = 0,
-    MEMPROT_PMS_OP_WRITE,
-    MEMPROT_PMS_OP_FETCH,
-    MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
-} pms_operation_type_t;
-
-/**
- * @brief Converts Memory protection type to string
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
-
-/**
- * @brief Converts Split line type to string
- *
- * @param line_type Split line type (see split_line_t enum)
- */
-const char *esp_memprot_split_line_to_str(split_line_t line_type);
-
-/**
- * @brief Converts PMS Area type to string
- *
- * @param area_type PMS Area type (see pms_area_t enum)
- */
-const char *esp_memprot_pms_to_str(pms_area_t area_type);
-
-/**
- * @brief Returns PMS splitting address for given Split line type
- *
- * The value is taken from PMS configuration registers (IRam0 range)
- * For details on split lines see 'esp_memprot_set_prot_int' function description
- *
- * @param line_type Split line type (see split_line_t enum)
- *
- * @return appropriate split line address
- */
-uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
-
-/**
- * @brief Returns default main IRAM/DRAM splitting address
- *
- * The address value is given by _iram_text_end global (IRam0 range)
-
- * @return Main I/D split line (IRam0_DRam0_Split_Addr)
- */
-void *esp_memprot_get_default_main_split_addr(void);
-
-/**
- * @brief Sets a lock for the main IRAM/DRAM splitting address
- *
- * Locks can be unlocked only by digital system reset
- */
-void esp_memprot_set_split_line_lock(void);
-
-/**
- * @brief Gets a lock status for the main IRAM/DRAM splitting address
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_split_line_lock(void);
-
-/**
- * @brief Sets required split line address
- *
- * @param line_type Split line type (see split_line_t enum)
- * @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
- */
-void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
-
-/**
- * @brief Sets a lock for PMS Area settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS Area settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- * @param x Execute permission flag
- */
-void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
-
-/**
- * @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- * @param x Execute permission flag holder
- */
-void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
-
-/**
- * @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- */
-void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
-
-/**
- * @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- */
-void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
-
-/**
- * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Enable PMS violation interrupt monitoring of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- * @param enable/disable
- */
-void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
-
-/**
- * @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (enabled/disabled)
- */
-bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets CPU ID for currently active PMS violation interrupt
- *
- * @return CPU ID (CPU_PRO for ESP32H2)
- */
-int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
-
-/**
- * @brief Clears current interrupt ON flag for given Memory type
- *
- * Interrupt clearing happens in two steps:
- *      1. Interrupt CLR flag is set (to clear the interrupt ON status)
- *      2. Interrupt CLR flag is reset (to allow further monitoring)
- * This operation is non-atomic by PMS module design
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns active PMS violation interrupt (if any)
- *
- * This function iterates through supported Memory type status registers
- * and returns the first interrupt-on flag. If none is found active,
- * MEMPROT_NONE is returned.
- * Order of checking (in current version):
- *      1. MEMPROT_IRAM0_SRAM
- *      2. MEMPROT_DRAM0_SRAM
- *
- * @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
- */
-mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
-
-/**
- * @brief Checks whether any violation interrupt is active
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_locked_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the address which caused the violation interrupt (if any)
- *
- * The address is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return faulting address
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the World identifier of the code causing the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return World identifier (see pms_world_t enum)
- */
-pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns Read or Write operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
- */
-pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- * Effective only on IRam0 access
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (LoadStore bit on/off)
- */
-bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns byte-enables for the address which caused the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return byte-enables
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns raw contents of DRam0 status register 1
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
-
-/**
- * @brief Returns raw contents of DRam0 status register 2
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
-
-/**
- * @brief Returns raw contents of IRam0 status register
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
-
-/**
- * @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
- *
- * Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
- * The registration makes the panic-handler routine being called when the interrupt appears
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
-
-/**
- * @brief Convenient routine for setting the PMS defaults
- *
- * Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
- * For implementation details see 'esp_memprot_set_prot_int' description
- *
- * @param invoke_panic_handler register all interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
- */
-void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
-
-/**
- * @brief Internal routine for setting the PMS defaults
- *
- * Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
- * (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
- * is used (&_iram_text_end) and all the remaining lines share the same address.
- * The function sets all the split lines and PMS areas to the same space,
- * ie there is a single instruction space and single data space at the end.
- * The PMS split lines and permission areas scheme described below:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                    ...       |                 IRam0_PMS_0                 |
- *               DRam0_PMS_0   -----------------------------------------------    IRam0_line1_Split_addr
- *                    ...       |                 IRam0_PMS_1                 |
- *                    ...       -----------------------------------------------   IRam0_line0_Split_addr
- *                              |                 IRam0_PMS_2                 |
- *                              ===============================================   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 DRam0_PMS_1                 |
- * DRam0_DMA_line0_Split_addr   -----------------------------------------------       ...
- *                              |                 DRam0_PMS_2                 |       ...
- * DRam0_DMA_line1_Split_addr   -----------------------------------------------   IRam0_PMS_3
- *                              |                 DRam0_PMS_3                 |       ...
- *                              -----------------------------------------------
- *
- * Default settings provided by 'esp_memprot_set_prot_int' are as follows:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                              |   IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2   |
- *                              |                 DRam0_PMS_0                 |   IRam0_line1_Split_addr
- * DRam0_DMA_line0_Split_addr   |                                             |             =
- *               =              ===============================================   IRam0_line0_Split_addr
- * DRam0_DMA_line1_Split_addr   |                                             |             =
- *                              |   DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3   |   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 IRam0_PMS_3                 |
- *                              -----------------------------------------------
- *
- * Once the memprot feature is locked, it can be unlocked only by digital system reset
- *
- * @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
- */
-void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
-
-/**
- * @brief Returns raw contents of PMS interrupt monitor register for given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return 32-bit register value
- */
-uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h
new file mode 100644
index 00000000000..3048088eba4
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-H2 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() {\
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h
new file mode 100644
index 00000000000..f17e2143133
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-S2 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/memprot.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/memprot.h
deleted file mode 100644
index 948e0676680..00000000000
--- a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/memprot.h
+++ /dev/null
@@ -1,484 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-
-/* INTERNAL API
- * generic interface to MMU memory protection features
- */
-
-#pragma once
-#include <stdbool.h>
-#include <stdint.h>
-#include "esp_attr.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
-    MEMPROT_NONE =              0x00000000,
-    MEMPROT_IRAM0_SRAM =        0x00000001,
-    MEMPROT_DRAM0_SRAM =        0x00000002,
-    MEMPROT_IRAM0_RTCFAST =     0x00000004,
-    MEMPROT_DRAM0_RTCFAST =     0x00000008,
-    MEMPROT_PERI1_RTCSLOW =     0x00000010,
-    MEMPROT_PERI2_RTCSLOW_0 =   0x00000020,
-    MEMPROT_PERI2_RTCSLOW_1 =   0x00000040,
-    MEMPROT_ALL =               0xFFFFFFFF
-} mem_type_prot_t;
-
-
-/**
- * @brief Returns splitting address for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Splitting address for the memory region required.
- * The address is given by region-specific global symbol exported from linker script,
- * it is not read out from related configuration register.
- */
-uint32_t *IRAM_ATTR esp_memprot_get_split_addr(mem_type_prot_t mem_type);
-
-/**
- * @brief Initializes illegal memory access control (MMU) for required memory section.
- *
- * All memory access interrupts share ETS_MEMACCESS_ERR_INUM input channel, it is caller's
- * responsibility to properly detect actual intr. source as well as possible prioritization in case
- * of multiple source reported during one intr.handling routine run
- *
- *  @param mem_type Memory protection area type (see mem_type_prot_t enum)
- */
-void esp_memprot_intr_init(mem_type_prot_t mem_type);
-
-/**
- * @brief Enable/disable the memory protection interrupt
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param enable enable/disable
- */
-void esp_memprot_intr_ena(mem_type_prot_t mem_type, bool enable);
-
-/**
- * @brief Sets a request for clearing interrupt-on flag for specified memory region (register write)
- *
- * @note When called without actual interrupt-on flag set, subsequent occurrence of related interrupt is ignored.
- * Should be used only after the real interrupt appears, typically as the last step in interrupt handler's routine.
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- */
-void esp_memprot_clear_intr(mem_type_prot_t mem_type);
-
-/**
- * @brief Detects which memory protection interrupt is active
- *
- * @note Check order
- *          MEMPROT_IRAM0_SRAM
- *          MEMPROT_IRAM0_RTCFAST
- *          MEMPROT_DRAM0_SRAM
- *          MEMPROT_DRAM0_RTCFAST
- *
- * @return Memory protection area type (see mem_type_prot_t enum)
- */
-mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
-
-/**
- * @brief Gets interrupt status register contents for specified memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Contents of status register
- */
-uint32_t esp_memprot_get_fault_reg(mem_type_prot_t mem_type);
-
-/**
- * @brief Get details of given interrupt status
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param faulting_address Faulting address causing the interrupt [out]
- * @param op_type Operation being processed at the faulting address [out]
- *               IRAM0: 0 - read, 1 - write
- *               DRAM0: 0 - read, 1 - write
- * @param op_subtype Additional info for op_type [out]
- *               IRAM0: 0 - instruction segment access, 1 - data segment access
- *               DRAM0: 0 - non-atomic operation, 1 - atomic operation
- */
-void IRAM_ATTR esp_memprot_get_fault_status(mem_type_prot_t mem_type, uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype);
-
-/**
- * @brief Gets string representation of required memory region identifier
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return mem_type as string
- */
-const char *IRAM_ATTR esp_memprot_type_to_str(mem_type_prot_t mem_type);
-
-/**
- * @brief Detects whether any of the interrupt locks is active (requires digital system reset to unlock)
- *
- * @return true/false
- */
-bool esp_memprot_is_locked_any(void);
-
-/**
- * @brief Sets lock for specified memory region.
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets lock status for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets permission control configuration register contents for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Permission control register contents
- */
-uint32_t esp_memprot_get_conf_reg(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets interrupt permission settings for unified management block
- *
- * Gets interrupt permission settings register contents for required memory region, returns settings for unified management blocks
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Permission settings register contents
- */
-uint32_t esp_memprot_get_perm_uni_reg(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets interrupt permission settings for split management block
- *
- * Gets interrupt permission settings register contents for required memory region, returns settings for split management blocks
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Permission settings register contents
- */
-uint32_t esp_memprot_get_perm_split_reg(mem_type_prot_t mem_type);
-
-/**
- * @brief Detects whether any of the memory protection interrupts is enabled
- *
- * @return true/false
- */
-bool esp_memprot_is_intr_ena_any(void);
-
-/**
- * @brief Gets interrupt-enabled flag for given memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Interrupt-enabled value
- */
-uint32_t esp_memprot_get_intr_ena_bit(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets interrupt-active flag for given memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Interrupt-active value
- */
-uint32_t esp_memprot_get_intr_on_bit(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets interrupt-clear request flag for given memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Interrupt-clear request value
- */
-uint32_t esp_memprot_get_intr_clr_bit(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets read permission value for specified block and memory region
- *
- * Returns read permission bit value for required unified-management block (0-3) in given memory region.
- * Applicable to all memory types.
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param block Memory block identifier (0-3)
- *
- * @return Read permission value for required block
- */
-uint32_t esp_memprot_get_uni_block_read_bit(mem_type_prot_t mem_type, uint32_t block);
-
-/**
- * @brief Gets write permission value for specified block and memory region
- *
- * Returns write permission bit value for required unified-management block (0-3) in given memory region.
- * Applicable to all memory types.
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param block Memory block identifier (0-3)
- *
- * @return Write permission value for required block
- */
-uint32_t esp_memprot_get_uni_block_write_bit(mem_type_prot_t mem_type, uint32_t block);
-
-/**
- * @brief Gets execute permission value for specified block and memory region
- *
- * Returns execute permission bit value for required unified-management block (0-3) in given memory region.
- * Applicable only to IRAM memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param block Memory block identifier (0-3)
- *
- * @return Execute permission value for required block
- */
-uint32_t esp_memprot_get_uni_block_exec_bit(mem_type_prot_t mem_type, uint32_t block);
-
-/**
- * @brief Sets permissions for specified block in DRAM region
- *
- * Sets Read and Write permission for specified unified-management block (0-3) in given memory region.
- * Applicable only to DRAM memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param block Memory block identifier (0-3)
- * @param write_perm Write permission flag
- * @param read_perm Read permission flag
- */
-void esp_memprot_set_uni_block_perm_dram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm);
-
-/**
- * @brief Sets permissions for high and low memory segment in DRAM region
- *
- * Sets Read and Write permission for both low and high memory segments given by splitting address.
- * The splitting address must be equal to or higher then beginning of block 5
- * Applicable only to DRAM memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param split_addr Address to split the memory region to lower and higher segment
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_set_prot_dram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
-
-/**
- * @brief Sets permissions for specified block in IRAM region
- *
- * Sets Read, Write and Execute permission for specified unified-management block (0-3) in given memory region.
- * Applicable only to IRAM memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param block Memory block identifier (0-3)
- * @param write_perm Write permission flag
- * @param exec_perm Execute permission flag
- */
-void esp_memprot_set_uni_block_perm_iram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm, bool exec_perm);
-
-/**
- * @brief Sets permissions for high and low memory segment in IRAM region
- *
- * Sets Read, Write and Execute permission for both low and high memory segments given by splitting address.
- * The splitting address must be equal to or higher then beginning of block 5
- * Applicable only to IRAM memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param split_addr Address to split the memory region to lower and higher segment
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param lx Low segment Execute permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- * @param hx High segment Execute permission flag
- */
-void esp_memprot_set_prot_iram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
-
-/**
- * @brief Activates memory protection for all supported memory region types
- *
- * @note The feature is disabled when JTAG interface is connected
- *
- * @param invoke_panic_handler map mem.prot interrupt to ETS_MEMACCESS_ERR_INUM and thus invokes panic handler when fired ('true' not suitable for testing)
- * @param lock_feature sets LOCK bit, see esp_memprot_set_lock() ('true' not suitable for testing)
- * @param mem_type_mask holds a set of required memory protection types (bitmask built of mem_type_prot_t). NULL means default (MEMPROT_ALL in this version)
- */
-void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
-
-/**
- * @brief Get permission settings bits for IRAM0 split mgmt. Only IRAM0 memory types allowed
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param lx Low segment Execute permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- * @param hx High segment Execute permission flag
- */
-void esp_memprot_get_perm_split_bits_iram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
-
-/**
- * @brief Get permission settings bits for DRAM0 split mgmt. Only DRAM0 memory types allowed
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_get_perm_split_bits_dram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
-
-/**
- * @brief Sets permissions for high and low memory segment in PERIBUS1 region
- *
- * Sets Read and Write permission for both low and high memory segments given by splitting address.
- * Applicable only to PERIBUS1 memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param split_addr Address to split the memory region to lower and higher segment
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_set_prot_peri1(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
-
-/**
- * @brief Get permission settings bits for PERIBUS1 split mgmt. Only PERIBUS1 memory types allowed
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_get_perm_split_bits_peri1(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
-
-/**
- * @brief Get permission settings bits for PERIBUS2 split mgmt. Only PERIBUS2 memory types allowed
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param lx Low segment Execute permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- * @param hx High segment Execute permission flag
- */
-void esp_memprot_get_perm_split_bits_peri2(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
-
-/**
- * @brief Sets permissions for high and low memory segment in PERIBUS2 region
- *
- * Sets Read Write permission for both low and high memory segments given by splitting address.
- * Applicable only to PERIBUS2 memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param split_addr Address to split the memory region to lower and higher segment
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param lx Low segment Execute permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- * @param hx High segment Execute permission flag
- */
-void esp_memprot_set_prot_peri2(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
-
-/**
- * @brief Get permissions for specified memory type. Irrelevant bits are ignored
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param lx Low segment Execute permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- * @param hx High segment Execute permission flag
- */
-void esp_memprot_get_permissions(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
-
-/**
- * @brief Get Read permission settings for low and high regions of given memory type
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Read permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_get_perm_read(mem_type_prot_t mem_type, bool *lr, bool *hr);
-
-/**
- * @brief Get Write permission settings for low and high regions of given memory type
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Write permission flag
- * @param hr High segment Write permission flag
- */
-void esp_memprot_get_perm_write(mem_type_prot_t mem_type, bool *lw, bool *hw);
-
-/**
- * @brief Get Execute permission settings for low and high regions of given memory type
- * Applicable only to IBUS-compatible memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Exec permission flag
- * @param hr High segment Exec permission flag
- */
-void esp_memprot_get_perm_exec(mem_type_prot_t mem_type, bool *lx, bool *hx);
-
-/**
- * @brief Returns the lowest address in required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- */
-uint32_t esp_memprot_get_low_limit(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the highest address in required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- */
-uint32_t esp_memprot_get_high_limit(mem_type_prot_t mem_type);
-
-/**
- * @brief Sets READ permission bit for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Read permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_set_read_perm(mem_type_prot_t mem_type, bool lr, bool hr);
-
-/**
- * @brief Sets WRITE permission bit for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Write permission flag
- * @param hr High segment Write permission flag
- */
-void esp_memprot_set_write_perm(mem_type_prot_t mem_type, bool lw, bool hw);
-
-/**
- * @brief Sets EXECUTE permission bit for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Exec permission flag
- * @param hr High segment Exec permission flag
- */
-void esp_memprot_set_exec_perm(mem_type_prot_t mem_type, bool lx, bool hx);
-
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h
new file mode 100644
index 00000000000..06dde33ffad
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h
@@ -0,0 +1,119 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-S3 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+    int target_cpu[];           /*!< Array of CPU/core IDs required to receive given PMS protection */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL,\
+    .target_cpu[] = {PRO_CPU_NUM, APP_CPU_NUM} \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/port/esp32/regi2c_ctrl.h b/tools/sdk/esp32/include/esp_hw_support/port/esp32/regi2c_ctrl.h
index ea2870e99b1..236e49b69e3 100644
--- a/tools/sdk/esp32/include/esp_hw_support/port/esp32/regi2c_ctrl.h
+++ b/tools/sdk/esp32/include/esp_hw_support/port/esp32/regi2c_ctrl.h
@@ -52,6 +52,10 @@ uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_ad
 void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
 void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
 
+/* enter the critical section that protects internal registers. Don't use it in SDK. Use the functions above. */
+void regi2c_enter_critical(void);
+void regi2c_exit_critical(void);
+
 #endif // BOOTLOADER_BUILD
 
 /* Convenience macros for the above functions, these use register definitions
diff --git a/tools/sdk/esp32/include/esp_ipc/include/esp_ipc.h b/tools/sdk/esp32/include/esp_ipc/include/esp_ipc.h
index 5e02c460bce..5307cbcdab1 100644
--- a/tools/sdk/esp32/include/esp_ipc/include/esp_ipc.h
+++ b/tools/sdk/esp32/include/esp_ipc/include/esp_ipc.h
@@ -12,8 +12,7 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#ifndef __ESP_IPC_H__
-#define __ESP_IPC_H__
+#pragma once
 
 #include <esp_err.h>
 
@@ -23,30 +22,30 @@ extern "C" {
 
 #if !defined(CONFIG_FREERTOS_UNICORE) || defined(CONFIG_APPTRACE_GCOV_ENABLE)
 
-/** @cond */
-typedef void (*esp_ipc_func_t)(void* arg);
-/** @endcond */
 /*
  * Inter-processor call APIs
  *
- * FreeRTOS provides several APIs which can be used to communicate between
- * different tasks, including tasks running on different CPUs.
- * This module provides additional APIs to run some code on the other CPU.
+ * FreeRTOS provides several APIs which can be used to communicate between different tasks, including tasks running on
+ * different CPUs. This module provides additional APIs to run some code on the other CPU. These APIs can only be used
+ * when FreeRTOS scheduler is running.
+ */
+
+/**
+ * @brief IPC Callback
  *
- * These APIs can only be used when FreeRTOS scheduler is running.
+ * A callback of this type should be provided as an argument when calling esp_ipc_call() or esp_ipc_call_blocking().
  */
+typedef void (*esp_ipc_func_t)(void* arg);
 
 /**
- * @brief Execute a function on the given CPU
+ * @brief Execute a callback on a given CPU
+ *
+ * Execute a given callback on a particular CPU. The callback must be of type "esp_ipc_func_t" and will be invoked in
+ * the context of the target CPU's IPC task.
  *
- * Run a given function on a particular CPU. The given function must accept a
- * void* argument and return void. The given function is run in the context of
- * the IPC task of the CPU specified by the cpu_id parameter. The calling task
- * will be blocked until the IPC task begins executing the given function. If
- * another IPC call is ongoing, the calling task will block until the other IPC
- * call completes. The stack size allocated for the IPC task can be configured
- * in the "Inter-Processor Call (IPC) task stack size" setting in menuconfig.
- * Increase this setting if the given function requires more stack than default.
+ * - This function will block the target CPU's IPC task has begun execution of the callback
+ * - If another IPC call is ongoing, this function will block until the ongoing IPC call completes
+ * - The stack size of the IPC task can be configured via the CONFIG_ESP_IPC_TASK_STACK_SIZE option
  *
  * @note In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
  *
@@ -63,17 +62,10 @@ esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
 
 
 /**
- * @brief Execute a function on the given CPU and blocks until it completes
+ * @brief Execute a callback on a given CPU until and block until it completes
  *
- * Run a given function on a particular CPU. The given function must accept a
- * void* argument and return void. The given function is run in the context of
- * the IPC task of the CPU specified by the cpu_id parameter. The calling task
- * will be blocked until the IPC task completes execution of the given function.
- * If another IPC call is ongoing, the calling task will block until the other
- * IPC call completes. The stack size allocated for the IPC task can be
- * configured in the "Inter-Processor Call (IPC) task stack size" setting in
- * menuconfig. Increase this setting if the given function requires more stack
- * than default.
+ * This function is identical to esp_ipc_call() except that this function will block until the execution of the callback
+ * completes.
  *
  * @note    In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
  *
@@ -88,10 +80,8 @@ esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
  */
 esp_err_t esp_ipc_call_blocking(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
 
-#endif // not CONFIG_FREERTOS_UNICORE or CONFIG_APPTRACE_GCOV_ENABLE
+#endif // !defined(CONFIG_FREERTOS_UNICORE) || defined(CONFIG_APPTRACE_GCOV_ENABLE)
 
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* __ESP_IPC_H__ */
diff --git a/tools/sdk/esp32/include/esp_ipc/include/esp_ipc_isr.h b/tools/sdk/esp32/include/esp_ipc/include/esp_ipc_isr.h
index 7b6e060f1d5..22fa5b10b03 100644
--- a/tools/sdk/esp32/include/esp_ipc/include/esp_ipc_isr.h
+++ b/tools/sdk/esp32/include/esp_ipc/include/esp_ipc_isr.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -14,31 +14,24 @@ extern "C" {
 
 #ifdef CONFIG_ESP_IPC_ISR_ENABLE
 
-/** @cond */
-typedef void (*esp_ipc_isr_func_t)(void* arg);
-/** @endcond */
-
 /**
- * @brief Initialize inter-processor call module which based on #4 high-interrupt.
- *
- * This function is called on CPU start and should not be called from the application.
+ * @brief IPC ISR Callback
  *
- * This function starts two tasks, one on each CPU. These tasks register
- * #4 High-interrupt and after that, the tasks are deleted.
- * The next API functions work with this functionality:
- * esp_ipc_isr_asm_call
- * esp_ipc_isr_asm_call_blocking
- * They allow to run an asm function on other CPU.
+ * A callback of this type should be provided as an argument when calling esp_ipc_isr_asm_call() or
+ * esp_ipc_isr_asm_call_blocking().
  */
-void esp_ipc_isr_init(void);
+typedef void (*esp_ipc_isr_func_t)(void* arg);
 
 /**
- * @brief Execute an asm function on the other CPU (uses the #4 high-priority interrupt)
+ * @brief Execute an assembly callback on the other CPU
+ *
+ * Execute a given callback on the other CPU in the context of a High Priority Interrupt.
+ *
+ * - This function will busy-wait in a critical section until the other CPU has started execution of the callback
+ * - The callback must be written in assembly, is invoked using a CALLX0 instruction, and has a2, a3, a4 as scratch
+ *   registers. See docs for more details
  *
- * @note In single-core mode, it is not available.
- * This function calls the #4 high-priority interrupt on the other CPU.
- * The given function is called in the context of the interrupt by CALLX0 command and
- * operates with registers a2, a3, a4.
+ * @note This function is not available in single-core mode.
  *
  * @param[in]   func    Pointer to a function of type void func(void* arg) to be executed
  * @param[in]   arg     Arbitrary argument of type void* to be passed into the function
@@ -46,11 +39,12 @@ void esp_ipc_isr_init(void);
 void esp_ipc_isr_asm_call(esp_ipc_isr_func_t func, void* arg);
 
 /**
- * @brief Execute an asm function on the other CPU and blocks until it completes (uses the #4 high-priority interrupt)
+ * @brief Execute an assembly callback on the other CPU and busy-wait until it completes
  *
- * @note In single-core mode, it is not available.
- * This function calls the #4 high-priority interrupt on the other CPU.
- * The given function is called in the context of the interrupt by CALLX0 command.
+ * This function is identical to esp_ipc_isr_asm_call() except that this function will busy-wait until the execution of
+ * the callback completes.
+ *
+ * @note This function is not available in single-core mode.
  *
  * @param[in]   func    Pointer to a function of type void func(void* arg) to be executed
  * @param[in]   arg     Arbitrary argument of type void* to be passed into the function
@@ -58,51 +52,60 @@ void esp_ipc_isr_asm_call(esp_ipc_isr_func_t func, void* arg);
 void esp_ipc_isr_asm_call_blocking(esp_ipc_isr_func_t func, void* arg);
 
 /**
- * @brief Stall the other CPU and the current CPU disables interrupts with level 3 and lower.
+ * @brief Stall the other CPU
  *
- * @note In single-core mode, it is not available.
- * This function calls the #4 high-priority interrupt on the other CPU.
- * The esp_ipc_isr_finish_cmd() function is called on the other CPU in the context of the #4 high-priority interrupt.
- * The esp_ipc_isr_finish_cmd is called by CALLX0 command.
- * It is waiting for the end command. The command will be sent by esp_ipc_isr_release_other_cpu().
- * This function is used for DPORT workaround.
+ * This function will stall the other CPU. The other CPU is stalled by busy-waiting in the context of a High Priority
+ * Interrupt. The other CPU will not be resumed until esp_ipc_isr_release_other_cpu() is called.
  *
- * This function blocks other CPU until the release call esp_ipc_isr_release_other_cpu().
+ * - This function is internally implemented using IPC ISR
+ * - This function is used for DPORT workaround.
+ * - If the stall feature is paused using esp_ipc_isr_stall_pause(), this function will have no effect
  *
- * This fucntion is used for the DPORT workaround: stall other cpu that this cpu is pending to access dport register start.
+ * @note This function is not available in single-core mode.
  */
 void esp_ipc_isr_stall_other_cpu(void);
 
 /**
  * @brief Release the other CPU
  *
- * @note In single-core mode, it is not available.
- * This function will send the end command to release the stall other CPU.
- * This function is used for DPORT workaround: stall other cpu that this cpu is pending to access dport register end.
+ * This function will release the other CPU that was previously stalled from calling esp_ipc_isr_stall_other_cpu()
+ *
+ * - This function is used for DPORT workaround.
+ * - If the stall feature is paused using esp_ipc_isr_stall_pause(), this function will have no effect
  *
+ * @note This function is not available in single-core mode.
  */
 void esp_ipc_isr_release_other_cpu(void);
 
 /**
- * @brief Pause stall the other CPU
+ * @brief Puase the CPU stall feature
+ *
+ * This function will pause the CPU stall feature. Once paused, calls to esp_ipc_isr_stall_other_cpu() and
+ * esp_ipc_isr_release_other_cpu() will have no effect. If a IPC ISR call is already in progress, this function will
+ * busy-wait until the call completes before pausing the CPU stall feature.
  */
 void esp_ipc_isr_stall_pause(void);
 
 /**
- * @brief Abort stall the other CPU
+ * @brief Abort a CPU stall
  *
- * This routine does not stop the stall routines in any way that is recoverable.
- * Please only call in case of panic().
- * Used in panic code: the enter_critical stuff may be messed up so we just stop everything without checking the mux.
+ * This function will abort any stalling routine of the other CPU due to a pervious call to
+ * esp_ipc_isr_stall_other_cpu(). This function aborts the stall in a non-recoverable manner, thus should only be called
+ * in case of a panic().
+ *
+ * - This function is used in panic handling code
  */
 void esp_ipc_isr_stall_abort(void);
 
 /**
- * @brief Resume stall the other CPU
+ * @brief Resume the CPU stall feature
+ *
+ * This function will resume the CPU stall feature that was previously paused by calling esp_ipc_isr_stall_pause(). Once
+ * resumed, calls to esp_ipc_isr_stall_other_cpu() and esp_ipc_isr_release_other_cpu() will have effect again.
  */
 void esp_ipc_isr_stall_resume(void);
 
-#else // not CONFIG_ESP_IPC_ISR_ENABLE
+#else // CONFIG_ESP_IPC_ISR_ENABLE
 
 #define esp_ipc_isr_stall_other_cpu()
 #define esp_ipc_isr_release_other_cpu()
diff --git a/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_rgb.h b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_rgb.h
index 0c264545ee2..6f06deb8165 100644
--- a/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_rgb.h
+++ b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_rgb.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -64,7 +64,7 @@ typedef struct {
         unsigned int hsync_idle_low: 1;  /*!< The hsync signal is low in IDLE state */
         unsigned int vsync_idle_low: 1;  /*!< The vsync signal is low in IDLE state */
         unsigned int de_idle_high: 1;    /*!< The de signal is high in IDLE state */
-        unsigned int pclk_active_neg: 1; /*!< The display will write data lines when there's a falling edge on PCLK */
+        unsigned int pclk_active_neg: 1; /*!< Whether the display data is clocked out at the falling edge of PCLK */
         unsigned int pclk_idle_high: 1;  /*!< The PCLK stays at high level in IDLE phase */
     } flags;
 } esp_lcd_rgb_timing_t;
@@ -92,6 +92,8 @@ typedef struct {
     lcd_clock_source_t clk_src;   /*!< Clock source for the RGB LCD peripheral */
     esp_lcd_rgb_timing_t timings; /*!< RGB timing parameters */
     size_t data_width;            /*!< Number of data lines */
+    size_t sram_trans_align;      /*!< Alignment for framebuffer that allocated in SRAM */
+    size_t psram_trans_align;     /*!< Alignment for framebuffer that allocated in PSRAM */
     int hsync_gpio_num;           /*!< GPIO used for HSYNC signal */
     int vsync_gpio_num;           /*!< GPIO used for VSYNC signal */
     int de_gpio_num;              /*!< GPIO used for DE signal, set to -1 if it's not used */
diff --git a/tools/sdk/esp32/include/esp_littlefs/include/esp_littlefs.h b/tools/sdk/esp32/include/esp_littlefs/include/esp_littlefs.h
index 7b5abe9248f..07f35231291 100644
--- a/tools/sdk/esp32/include/esp_littlefs/include/esp_littlefs.h
+++ b/tools/sdk/esp32/include/esp_littlefs/include/esp_littlefs.h
@@ -1,24 +1,9 @@
 #ifndef ESP_LITTLEFS_H__
 #define ESP_LITTLEFS_H__
 
-#include <stdint.h>
-#include <stddef.h>
-#include <stdarg.h>
-#include <unistd.h>
-#include <utime.h>
-#include "freertos/FreeRTOS.h"
-#include "freertos/semphr.h"
 #include "esp_err.h"
-#include <sys/types.h>
-#include <sys/reent.h>
-#include <sys/stat.h>
-#include <sys/time.h>
-#include <sys/poll.h>
-#include <sys/dirent.h>
-#include <string.h>
-#include "sdkconfig.h"
-
 #include "littlefs/lfs.h"
+#include "sdkconfig.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/esp_phy/include/phy.h b/tools/sdk/esp32/include/esp_phy/include/phy.h
index e6aa21db50e..c8d1018288d 100644
--- a/tools/sdk/esp32/include/esp_phy/include/phy.h
+++ b/tools/sdk/esp32/include/esp_phy/include/phy.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -99,6 +99,13 @@ void phy_freq_mem_backup(bool backup_en, uint32_t *mem);
 void phy_bbpll_en_usb(bool en);
 #endif
 
+#if CONFIG_IDF_TARGET_ESP32S2
+/**
+ * @brief Phy version select for ESP32S2
+ */
+void phy_eco_version_sel(uint8_t chip_ver);
+#endif
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_core.h b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_core.h
index 86625f0beb3..9dbdbae658b 100644
--- a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_core.h
+++ b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_core.h
@@ -24,10 +24,13 @@ extern "C"
 
 #define ESP_RMAKER_CONFIG_VERSION    "2020-03-20"
 
-#define MAX_VERSION_STRING_LEN  16
+/* Maximum length of the alert message that can be passed to esp_rmaker_raise_alert() */
+#define ESP_RMAKER_MAX_ALERT_LEN    100
 
+/** @cond **/
 /** ESP RainMaker Event Base */
 ESP_EVENT_DECLARE_BASE(RMAKER_EVENT);
+/** @endcond **/
 
 /** ESP RainMaker Events */
 typedef enum {
@@ -39,14 +42,15 @@ typedef enum {
     RMAKER_EVENT_CLAIM_SUCCESSFUL,
     /** Self Claiming Failed */
     RMAKER_EVENT_CLAIM_FAILED,
-    /** Node reboot has been triggered. The associated event data is the time in seconds
-     * (type: uint8_t) after which the node will reboot. Note that this time may not be
-     * accurate as the events are received asynchronously.*/
-    RMAKER_EVENT_REBOOT,
-    /** Wi-Fi credentials reset. Triggered after calling esp_rmaker_wifi_reset() */
-    RMAKER_EVENT_WIFI_RESET,
-    /** Node reset to factory defaults. Triggered after calling esp_rmaker_factory_reset() */
-    RMAKER_EVENT_FACTORY_RESET
+    /** Node side communication for User-Node mapping done.
+     * Actual mapping state will be managed by the ESP RainMaker cloud based on the user side communication.
+     * Associated data is the NULL terminated user id.
+     */
+    RMAKER_EVENT_USER_NODE_MAPPING_DONE,
+    /** Local control started. Associated data is the NULL terminated Service Name */
+    RMAKER_EVENT_LOCAL_CTRL_STARTED,
+    /* User reset request successfully sent to ESP RainMaker Cloud */
+    RMAKER_EVENT_USER_NODE_MAPPING_RESET,
 } esp_rmaker_event_t;
 
 /** ESP RainMaker Node information */
@@ -116,6 +120,18 @@ typedef enum {
     PROP_FLAG_PERSIST = (1 << 3)
 } esp_param_property_flags_t;
 
+/** System Service Reboot Flag */
+#define SYSTEM_SERV_FLAG_REBOOT         (1 << 0)
+
+/** System Service Factory Reset Flag */
+#define SYSTEM_SERV_FLAG_FACTORY_RESET  (1 << 1)
+
+/** System Service Wi-Fi Reset Flag */
+#define SYSTEM_SERV_FLAG_WIFI_RESET     (1 << 2)
+
+/** System Service All Flags */
+#define SYSTEM_SERV_FLAGS_ALL   (SYSTEM_SERV_FLAG_REBOOT | SYSTEM_SERV_FLAG_FACTORY_RESET | SYSTEM_SERV_FLAG_WIFI_RESET)
+
 /** Generic ESP RainMaker handle */
 typedef size_t esp_rmaker_handle_t;
 
@@ -138,6 +154,16 @@ typedef enum {
     ESP_RMAKER_REQ_SRC_CLOUD,
     /** Request received when a schedule has triggered */
     ESP_RMAKER_REQ_SRC_SCHEDULE,
+    /** Request received when a scene has been activated */
+    ESP_RMAKER_REQ_SRC_SCENE_ACTIVATE,
+    /** Request received when a scene has been deactivated */
+    ESP_RMAKER_REQ_SRC_SCENE_DEACTIVATE,
+    /** Request received from a local controller */
+    ESP_RMAKER_REQ_SRC_LOCAL,
+    /** This will always be the last value. Any value equal to or
+     * greater than this should be considered invalid.
+     */
+    ESP_RMAKER_REQ_SRC_MAX,
 } esp_rmaker_req_src_t;
 
 /** Write request Context */
@@ -152,6 +178,32 @@ typedef struct {
     esp_rmaker_req_src_t src;
 } esp_rmaker_read_ctx_t;
 
+/** System service configuration */
+typedef struct {
+    /** Logical OR of system service flags (SYSTEM_SERV_FLAG_REBOOT,
+     * SYSTEM_SERV_FLAG_FACTORY_RESET, SYSTEM_SERV_FLAG_WIFI_RESET) as required
+     * or SYSTEM_SERV_FLAGS_ALL.
+     */
+    uint16_t flags;
+    /** Time in seconds after which the device should reboot.
+     * Value of zero would trigger an immediate reboot if a write is received for
+     * the Reboot parameter.
+     * Recommended value: 2
+     */
+    int8_t reboot_seconds;
+    /** Time in seconds after which the device should reset (Wi-Fi or factory).
+     * Value of zero would trigger an immediate action if a write is received for
+     * the Wi-Fi reset or Factory reset parameter.
+     * Recommended value: 2
+     */
+    int8_t reset_seconds;
+    /** Time in seconds after which the device should reboot after it has been reset.
+     * Value of zero would mean that there won't be any reboot after the reset.
+     * Recommended value: 2
+     */
+    int8_t reset_reboot_seconds;
+} esp_rmaker_system_serv_config_t;
+
 /** Callback for parameter value write requests.
  *
  * The callback should call the esp_rmaker_param_update_and_report() API if the new value is to be set
@@ -188,6 +240,28 @@ typedef esp_err_t (*esp_rmaker_device_write_cb_t)(const esp_rmaker_device_t *dev
 typedef esp_err_t (*esp_rmaker_device_read_cb_t)(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param,
         void *priv_data, esp_rmaker_read_ctx_t *ctx);
 
+/** Convert device callback source to string
+ *
+ * Device read/write callback can be via different sources. This is a helper API
+ * to give the source in string format for printing.
+ *
+ * Example Usage:
+ * @code{c}
+ * static esp_err_t write_cb(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param,
+ * const esp_rmaker_param_val_t val, void *priv_data, esp_rmaker_write_ctx_t *ctx)
+{
+    if (ctx) {
+        ESP_LOGI(TAG, "Received write request via : %s", esp_rmaker_device_cb_src_to_str(ctx->src));
+    }
+ * @endcode
+ *
+ * @param[in] src The src field as received in the callback context.
+ *
+ * @return NULL terminated source string on success
+ * @return NULL on failure
+ */
+const char *esp_rmaker_device_cb_src_to_str(esp_rmaker_req_src_t src);
+
 /**
  * Initialise a Boolean value
  *
@@ -311,7 +385,7 @@ esp_err_t esp_rmaker_node_deinit(const esp_rmaker_node_t *node);
 const esp_rmaker_node_t *esp_rmaker_get_node(void);
 
 /** Get Node Id
- * 
+ *
  * Returns pointer to the NULL terminated Node ID string.
  *
  * @return Pointer to a NULL terminated Node ID string.
@@ -458,12 +532,24 @@ esp_err_t esp_rmaker_node_add_device(const esp_rmaker_node_t *node, const esp_rm
  */
 esp_err_t esp_rmaker_node_remove_device(const esp_rmaker_node_t *node, const esp_rmaker_device_t *device);
 
+/** Get device by name
+ *
+ * Get handle for a device based on the name.
+ *
+ * @param[in] node Node handle.
+ * @param[in] device_name Device name to search.
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_device_t *esp_rmaker_node_get_device_by_name(const esp_rmaker_node_t *node, const char *device_name);
+
 /** Add a Device attribute
  *
  * @note Device attributes are reported only once after a boot-up as part of the node
  * configuration.
  * Eg. Serial Number
- * 
+ *
  * @param[in] device Device handle.
  * @param[in] attr_name Name of the attribute.
  * @param[in] val Value of the attribute.
@@ -473,6 +559,19 @@ esp_err_t esp_rmaker_node_remove_device(const esp_rmaker_node_t *node, const esp
  */
 esp_err_t esp_rmaker_device_add_attribute(const esp_rmaker_device_t *device, const char *attr_name, const char *val);
 
+/** Add a Device subtype
+ *
+ * This can be something like esp.subtype.rgb-light for a device of type esp.device.lightbulb.
+ * This would primarily be used by the phone apps to render different icons for the same device type.
+ *
+ * @param[in] device Device handle.
+ * @param[in] subtype String describing the sub type.
+ *
+ * @return ESP_OK if the subtype was added successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_subtype(const esp_rmaker_device_t *device, const char *subtype);
+
 /** Get device name from handle
  *
  * @param[in] device Device handle.
@@ -489,7 +588,7 @@ char *esp_rmaker_device_get_name(const esp_rmaker_device_t *device);
  * @return NULL terminated device type string on success.
  * @return NULL in case of failure, or if the type wasn't provided while creating the device.
  */
-char *esp_rmaker_device_get_name(const esp_rmaker_device_t *device);
+char *esp_rmaker_device_get_type(const esp_rmaker_device_t *device);
 
 /**
  * Add a parameter to a device/service
@@ -638,6 +737,30 @@ esp_err_t esp_rmaker_param_add_valid_str_list(const esp_rmaker_param_t *param, c
  */
 esp_err_t esp_rmaker_param_add_array_max_count(const esp_rmaker_param_t *param, int count);
 
+
+/* Update a parameter
+ *
+ * This will just update the value of a parameter with esp rainmaker core, without actually reporting
+ * it. This can be used when multiple parameters need to be reported together.
+ * Eg. If x parameters are to be reported, this API can be used for the first x -1 parameters
+ * and the last one can be updated using esp_rmaker_param_update_and_report().
+ * This will report all parameters which were updated prior to this call.
+ *
+ * Sample:
+ *
+ * esp_rmaker_param_update(param1, esp_rmaker_float(10.2));
+ * esp_rmaker_param_update(param2, esp_rmaker_int(55));
+ * esp_rmaker_param_update(param3, esp_rmaker_int(95));
+ * esp_rmaker_param_update_and_report(param1, esp_rmaker_bool(true));
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] val New value of the parameter.
+ *
+ * @return ESP_OK if the parameter was updated successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_update(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
+
 /** Update and report a parameter
  *
  * Calling this API will update the parameter and report it to ESP RainMaker cloud.
@@ -651,6 +774,46 @@ esp_err_t esp_rmaker_param_add_array_max_count(const esp_rmaker_param_t *param,
  */
 esp_err_t esp_rmaker_param_update_and_report(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
 
+/** Update and notify a parameter
+ *
+ * Calling this API will update the parameter and report it to ESP RainMaker cloud similar to
+ * esp_rmaker_param_update_and_report(). However, additionally, it will also trigger a notification
+ * on the phone apps (if enabled).
+ *
+ * @note This should be used only when some local change requires explicit notification even when the
+ * phone app is in background, not otherwise.
+ * Eg. Alarm got triggered, temperature exceeded some threshold, etc.
+ *
+ * Alternatively, the esp_rmaker_raise_alert() API can also be used to trigger notification
+ * on the phone apps with pre-formatted text.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] val New value of the parameter.
+ *
+ * @return ESP_OK if the parameter was updated successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_update_and_notify(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
+
+/** Trigger an alert on the phone app
+ *
+ * This API will trigger a notification alert on the phone apps (if enabled) using the formatted text
+ * provided. Note that this does not send a notification directly to the phone, but reports the alert
+ * to the ESP RainMaker cloud which then uses the Notification framework to send notifications to the
+ * phone apps. The value does not get stored anywhere, nor is it linked to any node parameters.
+ *
+ * @note This should be used only if some event requires explicitly alerting the user even when the
+ * phone app is in background, not otherwise.
+ * Eg. "Motion Detected", "Fire alarm triggered"
+ *
+ * @param[in] alert_str NULL terminated pre-formatted alert string.
+ *     Maximum length can be ESP_RMAKER_MAX_ALERT_LEN, excluding NULL character.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_raise_alert(const char *alert_str);
+
 /** Get parameter name from handle
  *
  * @param[in] param Parameter handle.
@@ -669,11 +832,18 @@ char *esp_rmaker_param_get_name(const esp_rmaker_param_t *param);
  */
 char *esp_rmaker_param_get_type(const esp_rmaker_param_t *param);
 
-/** Prototype for ESP RainMaker Work Queue Function
+/** Get parameter value
  *
- * @param[in] priv_data The private data associated with the work function.
+ * This gives the parameter value that is stored in the RainMaker core.
+ *
+ * @note This does not call any explicit functions to read value from hardware/driver.
+ *
+ * @param[in] param Parameter handle
+ *
+ * @return Pointer to parameter value on success.
+ * @return NULL in case of failure.
  */
-typedef void (*esp_rmaker_work_fn_t)(void *priv_data);
+esp_rmaker_param_val_t *esp_rmaker_param_get_val(esp_rmaker_param_t *param);
 
 /** Report the node details to the cloud
  *
@@ -689,17 +859,38 @@ typedef void (*esp_rmaker_work_fn_t)(void *priv_data);
  */
 esp_err_t esp_rmaker_report_node_details(void);
 
-/** Queue execution of a function in ESP RainMaker's context
+/** Enable Timezone Service
+ *
+ * This enables the ESP RainMaker standard timezone service which can be used to set
+ * timezone, either in POSIX or location string format. Please refer the specifications
+ * for additional details.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_timezone_service_enable(void);
+
+/** Enable System Service
  *
- * This API queues a work function for execution in the ESP RainMaker Task's context.
+ * This enables the ESP RainMaker standard system service which can be
+ * used for operations like reboot, factory reset and Wi-Fi reset.
  *
- * @param[in] work_fn The Work function to be queued.
- * @param[in] priv_data Private data to be passed to the work function.
+ * Please refer the specifications for additional details.
  *
- * @return ESP_OK on success.
- * @return error in case of failure.
+ * @param[in] config Configuration for the system service.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_system_service_enable(esp_rmaker_system_serv_config_t *config);
+
+/**
+ * Check if local_ctrl service has started
+ *
+ * @return true if service has started
+ * @return false if the service has not started
  */
-esp_err_t esp_rmaker_queue_work(esp_rmaker_work_fn_t work_fn, void *priv_data);
+bool esp_rmaker_local_ctrl_service_started(void);
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_mqtt.h b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_mqtt.h
index cb724829dae..1cc6cd5156e 100644
--- a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_mqtt.h
+++ b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_mqtt.h
@@ -14,34 +14,14 @@
 #pragma once
 #include <stdint.h>
 #include <esp_err.h>
+#include <esp_rmaker_mqtt_glue.h>
 
 #ifdef __cplusplus
 extern "C"
 {
 #endif
 
-/** ESP RainMaker MQTT Configuration */
-typedef struct {
-    /** MQTT Host */
-    char *mqtt_host;
-    /** Client ID */
-    char *client_id;
-    /** Client Certificate in NULL terminate PEM format */
-    char *client_cert;
-    /** Client Key in NULL terminate PEM format */
-    char *client_key;
-    /** Server Certificate in NULL terminate PEM format */
-    char *server_cert;
-} esp_rmaker_mqtt_config_t;
-
-/** ESP RainMaker MQTT Subscribe callback prototype
- *
- * @param[in] topic Topic on which the message was received
- * @param[in] payload Data received in the message
- * @param[in] payload_len Length of the data
- * @param[in] priv_data The private data passed during subscription
- */
-typedef void (*esp_rmaker_mqtt_subscribe_cb_t) (const char *topic, void *payload, size_t payload_len, void *priv_data);
+esp_rmaker_mqtt_conn_params_t *esp_rmaker_mqtt_get_conn_params(void);
    
 /** Initialize ESP RainMaker MQTT
  *
@@ -50,7 +30,7 @@ typedef void (*esp_rmaker_mqtt_subscribe_cb_t) (const char *topic, void *payload
  * @return ESP_OK on success.
  * @return error in case of any error.
  */
-esp_err_t esp_rmaker_mqtt_init(esp_rmaker_mqtt_config_t *config);
+esp_err_t esp_rmaker_mqtt_init(esp_rmaker_mqtt_conn_params_t *conn_params);
 
 /** MQTT Connect
  *
@@ -77,22 +57,24 @@ esp_err_t esp_rmaker_mqtt_disconnect(void);
  * @param[in] topic The MQTT topic on which the message should be published.
  * @param[in] data Data to be published
  * @param[in] data_len Length of the data
+ * @param[in] qos Quality of Service for the Publish. Can be 0, 1 or 2. Also depends on what the MQTT broker supports.
  *
  * @return ESP_OK on success.
  * @return error in case of any error.
  */
-esp_err_t esp_rmaker_mqtt_publish(const char *topic, void *data, size_t data_len);
+esp_err_t esp_rmaker_mqtt_publish(const char *topic, void *data, size_t data_len, uint8_t qos, int *msg_id);
 
 /** Subscribe to MQTT topic
  *
  * @param[in] topic The topic to be subscribed to.
  * @param[in] cb The callback to be invoked when a message is received on the given topic.
  * @param[in] priv_data Optional private data to be passed to the callback
+ * @param[in] qos Quality of Service for the Subscription. Can be 0, 1 or 2. Also depends on what the MQTT broker supports.
  *
  * @return ESP_OK on success.
  * @return error in case of any error.
  */
-esp_err_t esp_rmaker_mqtt_subscribe(const char *topic, esp_rmaker_mqtt_subscribe_cb_t cb, void *priv_data);
+esp_err_t esp_rmaker_mqtt_subscribe(const char *topic, esp_rmaker_mqtt_subscribe_cb_t cb, uint8_t qos, void *priv_data);
 
 /** Unsubscribe from MQTT topic
  *
@@ -102,7 +84,7 @@ esp_err_t esp_rmaker_mqtt_subscribe(const char *topic, esp_rmaker_mqtt_subscribe
  * @return error in case of any error.
  */
 esp_err_t esp_rmaker_mqtt_unsubscribe(const char *topic);
-
+esp_err_t esp_rmaker_mqtt_setup(esp_rmaker_mqtt_config_t mqtt_config);
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_ota.h b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_ota.h
index 2def84ebc5d..e66b95705bc 100644
--- a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_ota.h
+++ b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_ota.h
@@ -104,7 +104,7 @@ typedef struct {
      * The certificate to be passed to the OTA callback for server authentication.
      * This is mandatory, unless you have disabled it in ESP HTTPS OTA config option.
      * If you are using the ESP RainMaker OTA Service, you can just set this to
-     * `ESP_RMAKER_DEFAULT_OTA_SERVER_CERT`.
+     * `ESP_RMAKER_OTA_DEFAULT_SERVER_CERT`.
      */
     const char *server_cert;
     /** Private Data.
diff --git a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_scenes.h b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_scenes.h
new file mode 100644
index 00000000000..f2f81f51a02
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_scenes.h
@@ -0,0 +1,38 @@
+// Copyright 2022 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <esp_err.h>
+
+/** Enable Scenes
+ *
+ * This API enables the scenes service for the node. For more information,
+ * check [here](https://rainmaker.espressif.com/docs/scenes.html)
+ *
+ * @note This API should be called after esp_rmaker_node_init() but before esp_rmaker_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_scenes_enable(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_schedule.h b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_schedule.h
index 6d63a5b78da..383c0949188 100644
--- a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_schedule.h
+++ b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_schedule.h
@@ -26,6 +26,8 @@ extern "C"
  *
  * It is recommended to set the timezone while using schedules. Check [here](https://rainmaker.espressif.com/docs/time-service.html#time-zone) for more information on timezones
  *
+ * @note This API should be called after esp_rmaker_node_init() but before esp_rmaker_start().
+ *
  * @return ESP_OK on success.
  * @return error in case of failure.
  */
diff --git a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_params.h b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_params.h
index 5a5ad856b80..944118c0f68 100644
--- a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_params.h
+++ b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_params.h
@@ -45,6 +45,12 @@ extern "C"
 #define ESP_RMAKER_DEF_TIMEZONE_NAME        "TZ"
 #define ESP_RMAKER_DEF_TIMEZONE_POSIX_NAME  "TZ-POSIX"
 #define ESP_RMAKER_DEF_SCHEDULE_NAME        "Schedules"
+#define ESP_RMAKER_DEF_SCENES_NAME          "Scenes"
+#define ESP_RMAKER_DEF_REBOOT_NAME          "Reboot"
+#define ESP_RMAKER_DEF_FACTORY_RESET_NAME   "Factory-Reset"
+#define ESP_RMAKER_DEF_WIFI_RESET_NAME      "Wi-Fi-Reset"
+#define ESP_RMAKER_DEF_LOCAL_CONTROL_POP    "POP"
+#define ESP_RMAKER_DEF_LOCAL_CONTROL_TYPE   "Type"
 
 /**
  * Create standard name param
@@ -247,7 +253,7 @@ esp_rmaker_param_t *esp_rmaker_timezone_param_create(const char *param_name, con
 esp_rmaker_param_t *esp_rmaker_timezone_posix_param_create(const char *param_name, const char *val);
 
 /**
- * Create standard schedules param
+ * Create standard Schedules param
  *
  * This will create the standard schedules parameter. Default value
  * is set internally.
@@ -260,6 +266,85 @@ esp_rmaker_param_t *esp_rmaker_timezone_posix_param_create(const char *param_nam
  */
 esp_rmaker_param_t *esp_rmaker_schedules_param_create(const char *param_name, int max_schedules);
 
+/**
+ * Create standard Scenes param
+ *
+ * This will create the standard scenes parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] max_scenes Maximum number of scenes allowed
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_scenes_param_create(const char *param_name, int max_scenes);
+
+/**
+ * Create standard Reboot param
+ *
+ * This will create the standard reboot parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_reboot_param_create(const char *param_name);
+
+/**
+ * Create standard Factory Reset param
+ *
+ * This will create the standard factory reset parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_factory_reset_param_create(const char *param_name);
+
+/**
+ * Create standard Wi-Fi Reset param
+ *
+ * This will create the standard Wi-Fi Reset parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_wifi_reset_param_create(const char *param_name);
+
+/**
+ * Create standard Local Control POP param
+ *
+ * This will create the standard Local Control POP parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter (Eg. "abcd1234"). Can be kept NULL.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_local_control_pop_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard Local Control Type param
+ *
+ * This will create the standard Local Control security type parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_local_control_type_param_create(const char *param_name, int val);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_services.h b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_services.h
index 348505c1486..687df733f46 100644
--- a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_services.h
+++ b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_services.h
@@ -71,6 +71,54 @@ esp_rmaker_device_t *esp_rmaker_time_service_create(const char *serv_name, const
  */
 esp_rmaker_device_t *esp_rmaker_create_schedule_service(const char *serv_name, esp_rmaker_device_write_cb_t write_cb, esp_rmaker_device_read_cb_t read_cb, int max_schedules, void *priv_data);
 
+/** Create a standard Scenes service
+ *
+ * This creates a Scenes service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] write_cb Write callback.
+ * @param[in] read_cb Read callback.
+ * @param[in] max_scenes Maximum number of scenes supported.
+ * @param[in] deactivation_support Deactivation callback support.
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_create_scenes_service(const char *serv_name, esp_rmaker_device_write_cb_t write_cb, esp_rmaker_device_read_cb_t read_cb, int max_scenes, bool deactivation_support, void *priv_data);
+
+/** Create a standard System service
+ *
+ * This creates an empty System service. Appropriate parameters should be added by the caller.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+
+esp_rmaker_device_t *esp_rmaker_create_system_service(const char *serv_name, void *priv_data);
+
+/** Create a standard Local Control service
+ *
+ * This creates a Local Control service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] pop Proof of possession
+ * @param[in] sec_type Security type
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_create_local_control_service(const char *serv_name, const char *pop, int sec_type, void *priv_data);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_types.h b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_types.h
index 73cbec85b89..4dc99eab401 100644
--- a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_types.h
+++ b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_standard_types.h
@@ -24,7 +24,7 @@ extern "C"
 #define ESP_RMAKER_UI_SLIDER            "esp.ui.slider"
 #define ESP_RMAKER_UI_DROPDOWN          "esp.ui.dropdown"
 #define ESP_RMAKER_UI_TEXT              "esp.ui.text"
-
+#define ESP_RMAKER_UI_HUE_SLIDER        "esp.ui.hue-slider"
 
 /********** STANDARD PARAM TYPES **********/
 
@@ -44,6 +44,12 @@ extern "C"
 #define ESP_RMAKER_PARAM_TIMEZONE       "esp.param.tz"
 #define ESP_RMAKER_PARAM_TIMEZONE_POSIX       "esp.param.tz_posix"
 #define ESP_RMAKER_PARAM_SCHEDULES      "esp.param.schedules"
+#define ESP_RMAKER_PARAM_SCENES         "esp.param.scenes"
+#define ESP_RMAKER_PARAM_REBOOT         "esp.param.reboot"
+#define ESP_RMAKER_PARAM_FACTORY_RESET  "esp.param.factory-reset"
+#define ESP_RMAKER_PARAM_WIFI_RESET     "esp.param.wifi-reset"
+#define ESP_RMAKER_PARAM_LOCAL_CONTROL_POP      "esp.param.local_control_pop"
+#define ESP_RMAKER_PARAM_LOCAL_CONTROL_TYPE     "esp.param.local_control_type"
 
 
 /********** STANDARD DEVICE TYPES **********/
@@ -58,6 +64,9 @@ extern "C"
 #define ESP_RMAKER_SERVICE_OTA          "esp.service.ota"
 #define ESP_RMAKER_SERVICE_TIME         "esp.service.time"
 #define ESP_RMAKER_SERVICE_SCHEDULE     "esp.service.schedule"
+#define ESP_RMAKER_SERVICE_SCENES       "esp.service.scenes"
+#define ESP_RMAKER_SERVICE_SYSTEM       "esp.service.system"
+#define ESP_RMAKER_SERVICE_LOCAL_CONTROL    "esp.service.local_control"
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_user_mapping.h b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_user_mapping.h
index a763561f3c2..77a153b02f2 100644
--- a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_user_mapping.h
+++ b/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_user_mapping.h
@@ -19,6 +19,25 @@ extern "C"
 {
 #endif
 
+/** User-Node Mapping states */
+typedef enum {
+    /** Mapping does not exist or is not initialized */
+    ESP_RMAKER_USER_MAPPING_RESET = 0,
+    /** Mapping has started */
+    ESP_RMAKER_USER_MAPPING_STARTED,
+    /** Mapping is done */
+    ESP_RMAKER_USER_MAPPING_DONE,
+} esp_rmaker_user_mapping_state_t;
+
+/**
+ * Get User-Node mapping state
+ *
+ * This returns the current user-node mapping state.
+ *
+ * @return user mapping state
+ */
+esp_rmaker_user_mapping_state_t esp_rmaker_user_node_mapping_get_state(void);
+
 /**
  * Create User Mapping Endpoint
  *
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32/rom/secure_boot.h b/tools/sdk/esp32/include/esp_rom/include/esp32/rom/secure_boot.h
index 1eb69e25378..50a3fcd4948 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32/rom/secure_boot.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32/rom/secure_boot.h
@@ -1,21 +1,12 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include "sdkconfig.h"
 
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+#pragma once
 
 #include <stdint.h>
 #include "ets_sys.h"
@@ -128,5 +119,3 @@ bool ets_use_secure_boot_v2(void);
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/secure_boot.h b/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/secure_boot.h
index 71cf7250d29..a9d417283b7 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/secure_boot.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/secure_boot.h
@@ -1,19 +1,10 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
 
 #include <stdint.h>
 #include <stdbool.h>
@@ -24,9 +15,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
@@ -127,5 +115,3 @@ struct ets_secure_boot_key_digests {
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/rtc.h b/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/rtc.h
index ad4f45c2ca7..e3a8d9d63e2 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/rtc.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/rtc.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef _ROM_RTC_H_
 #define _ROM_RTC_H_
@@ -124,7 +116,7 @@ _Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "
 _Static_assert((soc_reset_reason_t)USB_UART_CHIP_RESET == RESET_REASON_CORE_USB_UART, "USB_UART_CHIP_RESET != RESET_REASON_CORE_USB_UART");
 _Static_assert((soc_reset_reason_t)USB_JTAG_CHIP_RESET == RESET_REASON_CORE_USB_JTAG, "USB_JTAG_CHIP_RESET != RESET_REASON_CORE_USB_JTAG");
 _Static_assert((soc_reset_reason_t)POWER_GLITCH_RESET == RESET_REASON_CORE_PWR_GLITCH, "POWER_GLITCH_RESET != RESET_REASON_CORE_PWR_GLITCH");
-_Static_assert((soc_reset_reason_t)JTAG_RESET == RESET_REASON_CPU_JTAG, "JTAG_RESET != RESET_REASON_CPU_JTAG");
+_Static_assert((soc_reset_reason_t)JTAG_RESET == RESET_REASON_CPU0_JTAG, "JTAG_RESET != RESET_REASON_CPU0_JTAG");
 
 typedef enum {
     NO_SLEEP        = 0,
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/secure_boot.h b/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/secure_boot.h
index 71cf7250d29..36a490d8584 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/secure_boot.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/secure_boot.h
@@ -1,19 +1,10 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
 
 #include <stdint.h>
 #include <stdbool.h>
@@ -24,9 +15,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
@@ -127,5 +115,3 @@ struct ets_secure_boot_key_digests {
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/secure_boot.h b/tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/secure_boot.h
index 8e880817860..a0fcecfd3c5 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/secure_boot.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/secure_boot.h
@@ -1,19 +1,10 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
 
 #include <stdint.h>
 #include "ets_sys.h"
@@ -23,9 +14,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
@@ -126,5 +114,3 @@ struct ets_secure_boot_key_digests {
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32s3/rom/secure_boot.h b/tools/sdk/esp32/include/esp_rom/include/esp32s3/rom/secure_boot.h
index e720697b3e6..a372517b7a1 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32s3/rom/secure_boot.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32s3/rom/secure_boot.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -23,9 +15,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
diff --git a/tools/sdk/esp32/include/esp_schedule/include/esp_schedule.h b/tools/sdk/esp32/include/esp_schedule/include/esp_schedule.h
index d4bc7478363..4b611830a7d 100644
--- a/tools/sdk/esp32/include/esp_schedule/include/esp_schedule.h
+++ b/tools/sdk/esp32/include/esp_schedule/include/esp_schedule.h
@@ -51,6 +51,7 @@ typedef enum esp_schedule_type {
     ESP_SCHEDULE_TYPE_INVALID = 0,
     ESP_SCHEDULE_TYPE_DAYS_OF_WEEK,
     ESP_SCHEDULE_TYPE_DATE,
+    ESP_SCHEDULE_TYPE_RELATIVE,
 } esp_schedule_type_t;
 
 /** Schedule days. Used for ESP_SCHEDULE_TYPE_DAYS_OF_WEEK. */
@@ -108,6 +109,11 @@ typedef struct esp_schedule_trigger {
         /** If the schedule is to be repeated every year. */
         bool repeat_every_year;
     } date;
+    /** For type ESP_SCHEDULE_TYPE_SECONDS */
+    int relative_seconds;
+    /** Used for passing the next schedule timestamp for
+     * ESP_SCHEDULE_TYPE_RELATIVE */
+    time_t next_scheduled_time_utc;
 } esp_schedule_trigger_t;
 
 /** Schedule config */
diff --git a/tools/sdk/esp32/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h b/tools/sdk/esp32/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h
index 3dfd4a14b75..e69de29bb2d 100644
--- a/tools/sdk/esp32/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h
+++ b/tools/sdk/esp32/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h
@@ -1,38 +0,0 @@
-// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-
-#pragma once
-
-// NOTE: From the view of master
-#define CMD_HD_WRBUF_REG    0x01
-#define CMD_HD_RDBUF_REG    0x02
-#define CMD_HD_WRDMA_REG    0x03
-#define CMD_HD_RDDMA_REG    0x04
-
-#define CMD_HD_ONEBIT_MODE  0x00
-#define CMD_HD_DOUT_MODE    0x10
-#define CMD_HD_QOUT_MODE    0x20
-#define CMD_HD_DIO_MODE     0x50
-#define CMD_HD_QIO_MODE     0xA0
-
-#define CMD_HD_SEG_END_REG  0x05
-#define CMD_HD_EN_QPI_REG   0x06
-#define CMD_HD_WR_END_REG   0x07
-#define CMD_HD_INT0_REG     0x08
-#define CMD_HD_INT1_REG     0x09
-#define CMD_HD_INT2_REG     0x0A
-#define CMD_HD_EX_QPI_REG   0xDD
-
-#define SPI_SLAVE_HD_BUFFER_SIZE 64
diff --git a/tools/sdk/esp32/include/esp_system/include/esp_private/esp_ipc_isr.h b/tools/sdk/esp32/include/esp_system/include/esp_private/esp_ipc_isr.h
new file mode 100644
index 00000000000..ccdfe1deaa2
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_system/include/esp_private/esp_ipc_isr.h
@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_ESP_IPC_ISR_ENABLE
+
+/**
+ * @brief Initialize the IPC ISR feature, must be called for each CPU
+ *
+ * @note This function is called from ipc_task().
+ *
+ * This function initializes the IPC ISR feature and must be called before any other esp_ipc_isr...() functions.
+ * The IPC ISR feature allows for callbacks (written in assembly) to be run on a particular CPU in the context of a
+ * High Priority Interrupt.
+ *
+ * - This function will register a High Priority Interrupt for a CPU where it is called. The priority of the interrupts is dependent on
+ *   the CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL option.
+ * - Callbacks written in assembly can then run in context of the registered High Priority Interrupts
+ * - Callbacks can be executed by calling esp_ipc_isr_asm_call() or esp_ipc_isr_asm_call_blocking()
+ */
+void esp_ipc_isr_init(void);
+
+#endif // CONFIG_ESP_IPC_ISR_ENABLE
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_wifi/include/esp_wifi.h b/tools/sdk/esp32/include/esp_wifi/include/esp_wifi.h
index 2d671591765..bcd10c77a10 100644
--- a/tools/sdk/esp32/include/esp_wifi/include/esp_wifi.h
+++ b/tools/sdk/esp32/include/esp_wifi/include/esp_wifi.h
@@ -228,21 +228,21 @@ extern uint64_t g_wifi_feature_caps;
     .feature_caps = g_wifi_feature_caps, \
     .sta_disconnected_pm = WIFI_STA_DISCONNECTED_PM_ENABLED,  \
     .magic = WIFI_INIT_CONFIG_MAGIC\
-};
+}
 
 /**
-  * @brief  Init WiFi
-  *         Alloc resource for WiFi driver, such as WiFi control structure, RX/TX buffer,
-  *         WiFi NVS structure etc, this WiFi also start WiFi task
+  * @brief  Initialize WiFi
+  *         Allocate resource for WiFi driver, such as WiFi control structure, RX/TX buffer,
+  *         WiFi NVS structure etc. This WiFi also starts WiFi task
   *
   * @attention 1. This API must be called before all other WiFi API can be called
-  * @attention 2. Always use WIFI_INIT_CONFIG_DEFAULT macro to init the config to default values, this can
-  *               guarantee all the fields got correct value when more fields are added into wifi_init_config_t
-  *               in future release. If you want to set your owner initial values, overwrite the default values
-  *               which are set by WIFI_INIT_CONFIG_DEFAULT, please be notified that the field 'magic' of
+  * @attention 2. Always use WIFI_INIT_CONFIG_DEFAULT macro to initialize the configuration to default values, this can
+  *               guarantee all the fields get correct value when more fields are added into wifi_init_config_t
+  *               in future release. If you want to set your own initial values, overwrite the default values
+  *               which are set by WIFI_INIT_CONFIG_DEFAULT. Please be notified that the field 'magic' of
   *               wifi_init_config_t should always be WIFI_INIT_CONFIG_MAGIC!
   *
-  * @param  config pointer to WiFi init configuration structure; can point to a temporary variable.
+  * @param  config pointer to WiFi initialized configuration structure; can point to a temporary variable.
   *
   * @return
   *    - ESP_OK: succeed
diff --git a/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_types.h b/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_types.h
index ae574416b9c..47f5c79281b 100644
--- a/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_types.h
+++ b/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_types.h
@@ -215,7 +215,7 @@ typedef enum {
 
 /** Configuration structure for Protected Management Frame */
 typedef struct {
-    bool capable;            /**< Advertizes support for Protected Management Frame. Device will prefer to connect in PMF mode if other device also advertizes PMF capability. */
+    bool capable;            /**< Deprecated variable. Device will always connect in PMF mode if other device also advertizes PMF capability. */
     bool required;           /**< Advertizes that Protected Management Frame is required. Device will not associate to non-PMF capable devices. */
 } wifi_pmf_config_t;
 
diff --git a/tools/sdk/esp32/include/expat/expat/expat/lib/expat.h b/tools/sdk/esp32/include/expat/expat/expat/lib/expat.h
index b7d6d354801..0f021e25def 100644
--- a/tools/sdk/esp32/include/expat/expat/expat/lib/expat.h
+++ b/tools/sdk/esp32/include/expat/expat/expat/lib/expat.h
@@ -11,7 +11,7 @@
    Copyright (c) 2000-2005 Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
    Copyright (c) 2001-2002 Greg Stein <gstein@users.sourceforge.net>
    Copyright (c) 2002-2016 Karl Waclawek <karl@waclawek.net>
-   Copyright (c) 2016-2021 Sebastian Pipping <sebastian@pipping.org>
+   Copyright (c) 2016-2022 Sebastian Pipping <sebastian@pipping.org>
    Copyright (c) 2016      Cristian Rodríguez <crrodriguez@opensuse.org>
    Copyright (c) 2016      Thomas Beutlich <tc@tbeu.de>
    Copyright (c) 2017      Rhodri James <rhodri@wildebeest.org.uk>
@@ -1041,7 +1041,7 @@ XML_SetBillionLaughsAttackProtectionActivationThreshold(
 */
 #define XML_MAJOR_VERSION 2
 #define XML_MINOR_VERSION 4
-#define XML_MICRO_VERSION 1
+#define XML_MICRO_VERSION 3
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/expat/port/include/expat_config.h b/tools/sdk/esp32/include/expat/port/include/expat_config.h
index b6b927a19bb..468910220f4 100644
--- a/tools/sdk/esp32/include/expat/port/include/expat_config.h
+++ b/tools/sdk/esp32/include/expat/port/include/expat_config.h
@@ -63,7 +63,7 @@
 #define PACKAGE_NAME "expat"
 
 /* Define to the full name and version of this package. */
-#define PACKAGE_STRING "expat 2.2.5"
+#define PACKAGE_STRING "expat 2.4.3"
 
 /* Define to the one symbol short name of this package. */
 #define PACKAGE_TARNAME "expat"
@@ -72,13 +72,13 @@
 #define PACKAGE_URL ""
 
 /* Define to the version of this package. */
-#define PACKAGE_VERSION "2.2.5"
+#define PACKAGE_VERSION "2.4.3"
 
 /* Define to 1 if you have the ANSI C header files. */
 #define STDC_HEADERS 1
 
 /* Version number of package */
-#define VERSION "2.2.5"
+#define VERSION "2.4.3"
 
 /* whether byteorder is bigendian */
 /* #undef WORDS_BIGENDIAN */
diff --git a/tools/sdk/esp32/include/fb_gfx/include/fb_gfx.h b/tools/sdk/esp32/include/fb_gfx/include/fb_gfx.h
index 079ff7bfe4a..158c80f6bf4 100644
--- a/tools/sdk/esp32/include/fb_gfx/include/fb_gfx.h
+++ b/tools/sdk/esp32/include/fb_gfx/include/fb_gfx.h
@@ -19,7 +19,7 @@ extern "C" {
 #endif
 
     typedef enum {
-        FB_RGB888, FB_BGR888, FB_RGB565, FB_BGR565
+        FB_RGB888, FB_BGR888, FB_RGB565, FB_BGR565, FB_GRAY
     } fb_format_t;
 
     typedef struct {
diff --git a/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_common.h b/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_common.h
index 398af0ba9db..9c65f08b90d 100644
--- a/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_common.h
+++ b/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_common.h
@@ -22,6 +22,24 @@
 extern "C" {
 #endif
 
+#if __has_include("esp_check.h")
+#include "esp_check.h"
+
+#define MB_RETURN_ON_FALSE(a, err_code, tag, format, ...) ESP_RETURN_ON_FALSE(a, err_code, tag, format __VA_OPT__(,) __VA_ARGS__)
+
+#else
+
+// if cannot include esp_check then use custom check macro
+
+#define MB_RETURN_ON_FALSE(a, err_code, tag, format, ...) do {                                         \
+        if (!(a)) {                                                                              \
+            ESP_LOGE(tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_code;                                                                               \
+        }                                                                                                  \
+} while(0)
+
+#endif
+
 #define MB_CONTROLLER_STACK_SIZE            (CONFIG_FMB_CONTROLLER_STACK_SIZE)   // Stack size for Modbus controller
 #define MB_CONTROLLER_PRIORITY              (CONFIG_FMB_PORT_TASK_PRIO - 1)    // priority of MB controller task
 
diff --git a/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_master.h b/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_master.h
index 5d7539b08d9..8084e689027 100644
--- a/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_master.h
+++ b/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_master.h
@@ -25,6 +25,12 @@
 extern "C" {
 #endif
 
+#define MB_MASTER_CHECK(a, err_code, format, ...) MB_RETURN_ON_FALSE(a, err_code, TAG, format __VA_OPT__(,) __VA_ARGS__)
+
+#define MB_MASTER_ASSERT(con) do { \
+        if (!(con)) { ESP_LOGE(TAG, "assert errno:%d, errno_str: !(%s)", errno, strerror(errno)); assert(0 && #con); } \
+    } while (0)
+
 /*!
  * \brief Modbus descriptor table parameter type defines.
  */
diff --git a/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_slave.h b/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_slave.h
index fa6a53bc44e..040d18265bf 100644
--- a/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_slave.h
+++ b/tools/sdk/esp32/include/freemodbus/common/include/esp_modbus_slave.h
@@ -28,6 +28,12 @@
 extern "C" {
 #endif
 
+#define MB_SLAVE_CHECK(a, err_code, format, ...) MB_RETURN_ON_FALSE(a, err_code, TAG, format __VA_OPT__(,) __VA_ARGS__)
+
+#define MB_SLAVE_ASSERT(con) do { \
+        if (!(con)) { ESP_LOGE(TAG, "assert errno:%d, errno_str: !(%s)", errno, strerror(errno)); assert(0 && #con); } \
+    } while (0)
+
 /**
  * @brief Parameter access event information type
  */
diff --git a/tools/sdk/esp32/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h b/tools/sdk/esp32/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h
index aa87e1b4db2..6bb81894593 100644
--- a/tools/sdk/esp32/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h
+++ b/tools/sdk/esp32/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h
@@ -250,8 +250,12 @@
 #define INCLUDE_pcTaskGetTaskName                       1
 #define INCLUDE_xTaskGetIdleTaskHandle                  1
 #define INCLUDE_pxTaskGetStackStart                     1
-
+#define INCLUDE_eTaskGetState                           1
+#define INCLUDE_xTaskAbortDelay                         1
+#define INCLUDE_xTaskGetHandle                          1
 #define INCLUDE_xSemaphoreGetMutexHolder                1
+#define INCLUDE_xTimerPendFunctionCall                  1
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle          0   //Currently there is no need for this API
 
 /* The priority at which the tick interrupt runs.  This should probably be
    kept at 1. */
@@ -278,8 +282,6 @@ extern void vPortCleanUpTCB ( void *pxTCB );
 #define configTIMER_QUEUE_LENGTH                        CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
 #define configTIMER_TASK_STACK_DEPTH                    CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
 
-#define INCLUDE_xTimerPendFunctionCall                  1
-#define INCLUDE_eTaskGetState                           1
 #define configUSE_QUEUE_SETS                            1
 
 #define configUSE_TICKLESS_IDLE                         CONFIG_FREERTOS_USE_TICKLESS_IDLE
diff --git a/tools/sdk/esp32/include/freertos/include/freertos/projdefs.h b/tools/sdk/esp32/include/freertos/include/freertos/projdefs.h
index ec8022ca0b0..1949e6e30b3 100644
--- a/tools/sdk/esp32/include/freertos/include/freertos/projdefs.h
+++ b/tools/sdk/esp32/include/freertos/include/freertos/projdefs.h
@@ -41,7 +41,7 @@ typedef void (* TaskFunction_t)( void * );
 #endif
 #ifdef ESP_PLATFORM
 #ifndef pdTICKS_TO_MS
-    #define pdTICKS_TO_MS( xTicks )   ( ( uint32_t ) ( xTicks ) * 1000 / configTICK_RATE_HZ )
+    #define pdTICKS_TO_MS( xTicks )   ( ( TickType_t ) ( ( uint64_t ) ( xTicks ) * 1000 / configTICK_RATE_HZ ) )
 #endif
 #endif // ESP_PLATFORM
 
diff --git a/tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro.h b/tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro.h
index 934f056816c..2ee4c12c2b8 100644
--- a/tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro.h
+++ b/tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro.h
@@ -558,14 +558,14 @@ static inline void __attribute__((always_inline)) uxPortCompareSetExtram(volatil
 
 // --------------------- Interrupts ------------------------
 
-static inline UBaseType_t xPortSetInterruptMaskFromISR(void)
+static inline UBaseType_t __attribute__((always_inline)) xPortSetInterruptMaskFromISR(void)
 {
     UBaseType_t prev_int_level = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
     portbenchmarkINTERRUPT_DISABLE();
     return prev_int_level;
 }
 
-static inline void vPortClearInterruptMaskFromISR(UBaseType_t prev_level)
+static inline void __attribute__((always_inline)) vPortClearInterruptMaskFromISR(UBaseType_t prev_level)
 {
     portbenchmarkINTERRUPT_RESTORE(prev_level);
     XTOS_RESTORE_JUST_INTLEVEL(prev_level);
diff --git a/tools/sdk/esp32/include/hal/esp32/include/hal/adc_hal.h b/tools/sdk/esp32/include/hal/esp32/include/hal/adc_hal.h
index 50e3c9138ce..53da0e034bf 100644
--- a/tools/sdk/esp32/include/hal/esp32/include/hal/adc_hal.h
+++ b/tools/sdk/esp32/include/hal/esp32/include/hal/adc_hal.h
@@ -1,16 +1,8 @@
-// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /*******************************************************************************
  * NOTICE
@@ -31,35 +23,9 @@
 extern "C" {
 #endif
 
-/*---------------------------------------------------------------
-                    Digital controller setting
----------------------------------------------------------------*/
-
-/**
- * Set I2S DMA data source for digital controller.
- *
- * @param src i2s data source.
- */
-#define adc_hal_digi_set_data_source(src) adc_ll_digi_set_data_source(src)
-
-/*---------------------------------------------------------------
-                    Common setting
----------------------------------------------------------------*/
-
 /*---------------------------------------------------------------
                     Hall sensor setting
 ---------------------------------------------------------------*/
-
-/**
- * Enable hall sensor.
- */
-#define adc_hal_hall_enable() adc_ll_hall_enable()
-
-/**
- * Disable hall sensor.
- */
-#define adc_hal_hall_disable() adc_ll_hall_disable()
-
 /**
  *  Start hall convert and return the hall value.
  *
diff --git a/tools/sdk/esp32/include/hal/esp32/include/hal/adc_ll.h b/tools/sdk/esp32/include/hal/esp32/include/hal/adc_ll.h
index 1b5969ac433..6e648733bed 100644
--- a/tools/sdk/esp32/include/hal/esp32/include/hal/adc_ll.h
+++ b/tools/sdk/esp32/include/hal/esp32/include/hal/adc_ll.h
@@ -1,3 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
 #include "soc/adc_periph.h"
@@ -27,20 +33,48 @@ typedef enum {
 } adc_ll_power_t;
 
 typedef enum {
-    ADC_HALL_CTRL_ULP = 0x0,/*!< Hall sensor controlled by ULP */
-    ADC_HALL_CTRL_RTC = 0x1 /*!< Hall sensor controlled by RTC */
-} adc_ll_hall_controller_t ;
+    ADC_RTC_DATA_OK = 0,
+} adc_ll_rtc_raw_data_t;
 
 typedef enum {
-    ADC_CTRL_RTC = 0,
-    ADC_CTRL_ULP = 1,
-    ADC_CTRL_DIG = 2,
-    ADC2_CTRL_PWDET = 3,
-} adc_hal_controller_t ;
+    ADC_LL_CTRL_RTC   = 0,    ///< For ADC1 and ADC2. Select RTC controller.
+    ADC_LL_CTRL_ULP   = 1,    ///< For ADC1 and ADC2. Select ULP controller.
+    ADC_LL_CTRL_DIG   = 2,    ///< For ADC1 and ADC2. Select DIG controller.
+    ADC_LL_CTRL_PWDET = 3,    ///< For ADC2. Select PWDET controller.
+} adc_ll_controller_t;
 
+/**
+ * @brief ADC digital controller (DMA mode) work mode.
+ *
+ * @note  The conversion mode affects the sampling frequency:
+ *        SINGLE_UNIT_1: When the measurement is triggered, only ADC1 is sampled once.
+ *        SINGLE_UNIT_2: When the measurement is triggered, only ADC2 is sampled once.
+ *        BOTH_UNIT    : When the measurement is triggered, ADC1 and ADC2 are sampled at the same time.
+ *        ALTER_UNIT   : When the measurement is triggered, ADC1 or ADC2 samples alternately.
+ */
 typedef enum {
-    ADC_RTC_DATA_OK = 0,
-} adc_ll_rtc_raw_data_t;
+    ADC_LL_DIGI_CONV_ONLY_ADC1  = 0,    // Only use ADC1 for conversion
+    ADC_LL_DIGI_CONV_ONLY_ADC2  = 1,    // Only use ADC2 for conversion
+    ADC_LL_DIGI_CONV_BOTH_UNIT  = 2,    // Use Both ADC1 and ADC2 for conversion simultaneously
+    ADC_LL_DIGI_CONV_ALTER_UNIT = 3     // Use both ADC1 and ADC2 for conversion by turn. e.g. ADC1 -> ADC2 -> ADC1 -> ADC2 .....
+} adc_ll_digi_convert_mode_t;
+
+//Need a unit test for bit_width
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:       2;
+            uint8_t bit_width:   2;  //ADC resolution. 0: 9 bit; 1: 10 bit; 2: 11 bit; 3: 12 bit
+            uint8_t channel:     4;
+        };
+        uint8_t val;
+    };
+} __attribute__((packed)) adc_ll_digi_pattern_table_t;
+
+typedef enum {
+    ADC_HALL_CTRL_ULP = 0x0,/*!< Hall sensor controlled by ULP */
+    ADC_HALL_CTRL_RTC = 0x1 /*!< Hall sensor controlled by RTC */
+} adc_ll_hall_controller_t ;
 
 /*---------------------------------------------------------------
                     Digital controller setting
@@ -85,16 +119,6 @@ static inline void adc_ll_digi_set_clk_div(uint32_t div)
     HAL_FORCE_MODIFY_U32_REG_FIELD(SYSCON.saradc_ctrl, sar_clk_div, div);
 }
 
-/**
- * Set adc output data format for digital controller.
- *
- * @param format Output data format, see ``adc_digi_output_format_t``.
- */
-static inline void adc_ll_digi_set_output_format(adc_digi_output_format_t format)
-{
-    SYSCON.saradc_ctrl.data_sar_sel = format;
-}
-
 /**
  * Set adc max conversion number for digital controller.
  * If the number of ADC conversion is equal to the maximum, the conversion is stopped.
@@ -128,21 +152,28 @@ static inline void adc_ll_digi_convert_limit_disable(void)
  * Set adc conversion mode for digital controller.
  *
  * @note ESP32 only support ADC1 single mode.
+ * @note For `data_sar_sel` register:
+ *       1: [15] unit, [14:11] channel, [10:0] data, 11-bit-width at most. Only work under `ADC_LL_DIGI_CONV_BOTH_UNIT` or `ADC_LL_DIGI_CONV_ALTER_UNIT` mode.
+ *       0: [15:12] channel, [11:0] data, 12-bit-width at most. Only work under `ADC_LL_DIGI_CONV_ONLY_ADC1` or `ADC_LL_DIGI_CONV_ONLY_ADC2` mode
  *
- * @param mode Conversion mode select, see ``adc_digi_convert_mode_t``.
+ * @param mode Conversion mode select.
  */
-static inline void adc_ll_digi_set_convert_mode(adc_digi_convert_mode_t mode)
+static inline void adc_ll_digi_set_convert_mode(adc_ll_digi_convert_mode_t mode)
 {
-    if (mode == ADC_CONV_SINGLE_UNIT_1) {
+    if (mode == ADC_LL_DIGI_CONV_ONLY_ADC1) {
         SYSCON.saradc_ctrl.work_mode = 0;
         SYSCON.saradc_ctrl.sar_sel = 0;
-    } else if (mode == ADC_CONV_SINGLE_UNIT_2) {
+        SYSCON.saradc_ctrl.data_sar_sel = 0;
+    } else if (mode == ADC_LL_DIGI_CONV_ONLY_ADC2) {
         SYSCON.saradc_ctrl.work_mode = 0;
         SYSCON.saradc_ctrl.sar_sel = 1;
-    } else if (mode == ADC_CONV_BOTH_UNIT) {
+        SYSCON.saradc_ctrl.data_sar_sel = 0;
+    } else if (mode == ADC_LL_DIGI_CONV_BOTH_UNIT) {
         SYSCON.saradc_ctrl.work_mode = 1;
-    } else if (mode == ADC_CONV_ALTER_UNIT) {
+        SYSCON.saradc_ctrl.data_sar_sel = 1;
+    } else if (mode == ADC_LL_DIGI_CONV_ALTER_UNIT) {
         SYSCON.saradc_ctrl.work_mode = 2;
+        SYSCON.saradc_ctrl.data_sar_sel = 1;
     }
 }
 
@@ -163,11 +194,10 @@ static inline void adc_ll_digi_output_invert(adc_ll_num_t adc_n, bool inv_en)
 /**
  * Set I2S DMA data source for digital controller.
  *
- * @param src i2s data source, see ``adc_i2s_source_t``.
+ * @param src 1: I2S input data is from SAR ADC (for DMA)  0: I2S input data is from GPIO matrix
  */
-static inline void adc_ll_digi_set_data_source(adc_i2s_source_t src)
+static inline void adc_ll_digi_set_data_source(bool src)
 {
-    /* 1: I2S input data is from SAR ADC (for DMA)  0: I2S input data is from GPIO matrix */
     SYSCON.saradc_ctrl.data_to_i2s = src;
 }
 
@@ -199,12 +229,33 @@ static inline void adc_ll_digi_set_pattern_table_len(adc_ll_num_t adc_n, uint32_
  * @param pattern_index Items index. Range: 0 ~ 15.
  * @param pattern Stored conversion rules, see ``adc_digi_pattern_table_t``.
  */
-static inline void adc_ll_digi_set_pattern_table(adc_ll_num_t adc_n, uint32_t pattern_index, adc_digi_pattern_table_t pattern)
+static inline void adc_ll_digi_set_pattern_table(adc_ll_num_t adc_n, uint32_t pattern_index, adc_digi_pattern_config_t table)
 {
     uint32_t tab;
     uint8_t index = pattern_index / 4;
     uint8_t offset = (pattern_index % 4) * 8;
-    if (adc_n == ADC_NUM_1) {
+    adc_ll_digi_pattern_table_t pattern = {0};
+    uint8_t bit_width;
+
+    switch (table.bit_width) {
+        case 9:
+            bit_width = 0x0;
+            break;
+        case 10:
+            bit_width = 0x1;
+            break;
+        case 11:
+            bit_width = 0x2;
+            break;
+        case 12:
+            bit_width = 0x3;
+            break;
+        default:
+            bit_width = 0x3;
+    }
+    pattern.val = (table.atten & 0x3) | ((bit_width) << 2) | ((table.channel & 0xF) << 4);
+
+    if (table.unit == ADC_NUM_1) {
         tab = SYSCON.saradc_sar1_patt_tab[index];   // Read old register value
         tab &= (~(0xFF000000 >> offset));           // clear old data
         tab |= ((uint32_t)pattern.val << 24) >> offset; // Fill in the new data
@@ -233,6 +284,15 @@ static inline void adc_ll_digi_clear_pattern_table(adc_ll_num_t adc_n)
     }
 }
 
+/**
+ * Disable clock for ADC digital controller.
+ * @note Not used for esp32
+ */
+static inline void adc_ll_digi_controller_clk_disable(void)
+{
+    //Leave here for compatibility
+}
+
 /*---------------------------------------------------------------
                     PWDET(Power detect) controller setting
 ---------------------------------------------------------------*/
@@ -263,6 +323,20 @@ static inline uint32_t adc_ll_pwdet_get_cct(void)
 /*---------------------------------------------------------------
                     RTC controller setting
 ---------------------------------------------------------------*/
+/**
+ * ADC SAR clock division factor setting. ADC SAR clock divided from `RTC_FAST_CLK`.
+ *
+ * @param div Division factor.
+ */
+static inline void adc_ll_set_sar_clk_div(adc_ll_num_t adc_n, uint32_t div)
+{
+    if (adc_n == ADC_NUM_1) {
+        HAL_FORCE_MODIFY_U32_REG_FIELD(SENS.sar_read_ctrl, sar1_clk_div, div);
+    } else { // adc_n == ADC_NUM_2
+        HAL_FORCE_MODIFY_U32_REG_FIELD(SENS.sar_read_ctrl2, sar2_clk_div, div);
+    }
+}
+
 /**
  * Set adc output data format for RTC controller.
  *
@@ -398,62 +472,6 @@ static inline adc_ll_rtc_raw_data_t adc_ll_rtc_analysis_raw_data(adc_ll_num_t ad
     return ADC_RTC_DATA_OK;
 }
 
-/*---------------------------------------------------------------
-                    Common setting
----------------------------------------------------------------*/
-/**
- * Set ADC module power management.
- *
- * @param manage Set ADC power status.
- */
-static inline void adc_ll_set_power_manage(adc_ll_power_t manage)
-{
-    /* Bit1  0:Fsm  1: SW mode
-       Bit0  0:SW mode power down  1: SW mode power on */
-    if (manage == ADC_POWER_SW_ON) {
-        SENS.sar_meas_wait2.force_xpd_sar = SENS_FORCE_XPD_SAR_PU;
-    } else if (manage == ADC_POWER_BY_FSM) {
-        SENS.sar_meas_wait2.force_xpd_sar = SENS_FORCE_XPD_SAR_FSM;
-    } else if (manage == ADC_POWER_SW_OFF) {
-        SENS.sar_meas_wait2.force_xpd_sar = SENS_FORCE_XPD_SAR_PD;
-    }
-}
-
-/**
- * Get ADC module power management.
- *
- * @return
- *      - ADC power status.
- */
-static inline adc_ll_power_t adc_ll_get_power_manage(void)
-{
-    /* Bit1  0:Fsm  1: SW mode
-       Bit0  0:SW mode power down  1: SW mode power on */
-    adc_ll_power_t manage;
-    if (SENS.sar_meas_wait2.force_xpd_sar == SENS_FORCE_XPD_SAR_PU) {
-        manage = ADC_POWER_SW_ON;
-    } else if (SENS.sar_meas_wait2.force_xpd_sar == SENS_FORCE_XPD_SAR_PD) {
-        manage = ADC_POWER_SW_OFF;
-    } else {
-        manage = ADC_POWER_BY_FSM;
-    }
-    return manage;
-}
-
-/**
- * ADC SAR clock division factor setting. ADC SAR clock divided from `RTC_FAST_CLK`.
- *
- * @param div Division factor.
- */
-static inline void adc_ll_set_sar_clk_div(adc_ll_num_t adc_n, uint32_t div)
-{
-    if (adc_n == ADC_NUM_1) {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(SENS.sar_read_ctrl, sar1_clk_div, div);
-    } else { // adc_n == ADC_NUM_2
-        HAL_FORCE_MODIFY_U32_REG_FIELD(SENS.sar_read_ctrl2, sar2_clk_div, div);
-    }
-}
-
 /**
  * Set the attenuation of a particular channel on ADCn.
  */
@@ -482,6 +500,27 @@ static inline adc_atten_t adc_ll_get_atten(adc_ll_num_t adc_n, adc_channel_t cha
     }
 }
 
+/*---------------------------------------------------------------
+                    Common setting
+---------------------------------------------------------------*/
+/**
+ * Set ADC module power management.
+ *
+ * @param manage Set ADC power status.
+ */
+static inline void adc_ll_set_power_manage(adc_ll_power_t manage)
+{
+    /* Bit1  0:Fsm  1: SW mode
+       Bit0  0:SW mode power down  1: SW mode power on */
+    if (manage == ADC_POWER_SW_ON) {
+        SENS.sar_meas_wait2.force_xpd_sar = SENS_FORCE_XPD_SAR_PU;
+    } else if (manage == ADC_POWER_BY_FSM) {
+        SENS.sar_meas_wait2.force_xpd_sar = SENS_FORCE_XPD_SAR_FSM;
+    } else if (manage == ADC_POWER_SW_OFF) {
+        SENS.sar_meas_wait2.force_xpd_sar = SENS_FORCE_XPD_SAR_PD;
+    }
+}
+
 /**
  * Set ADC module controller.
  * There are five SAR ADC controllers:
@@ -492,25 +531,25 @@ static inline adc_atten_t adc_ll_get_atten(adc_ll_num_t adc_n, adc_channel_t cha
  * @param adc_n ADC unit.
  * @param ctrl ADC controller.
  */
-static inline void adc_ll_set_controller(adc_ll_num_t adc_n, adc_hal_controller_t ctrl)
+static inline void adc_ll_set_controller(adc_ll_num_t adc_n, adc_ll_controller_t ctrl)
 {
     if (adc_n == ADC_NUM_1) {
         switch ( ctrl ) {
-        case ADC_CTRL_RTC:
+        case ADC_LL_CTRL_RTC:
             SENS.sar_read_ctrl.sar1_dig_force       = 0;    // 1: Select digital control;       0: Select RTC control.
             SENS.sar_meas_start1.meas1_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas_start1.sar1_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
             SENS.sar_touch_ctrl1.xpd_hall_force     = 1;    // 1: SW control HALL power;        0: ULP FSM control HALL power.
             SENS.sar_touch_ctrl1.hall_phase_force   = 1;    // 1: SW control HALL phase;        0: ULP FSM control HALL phase.
             break;
-        case ADC_CTRL_ULP:
+        case ADC_LL_CTRL_ULP:
             SENS.sar_read_ctrl.sar1_dig_force       = 0;    // 1: Select digital control;       0: Select RTC control.
             SENS.sar_meas_start1.meas1_start_force  = 0;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas_start1.sar1_en_pad_force  = 0;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
             SENS.sar_touch_ctrl1.xpd_hall_force     = 0;    // 1: SW control HALL power;        0: ULP FSM control HALL power.
             SENS.sar_touch_ctrl1.hall_phase_force   = 0;    // 1: SW control HALL phase;        0: ULP FSM control HALL phase.
             break;
-        case ADC_CTRL_DIG:
+        case ADC_LL_CTRL_DIG:
             SENS.sar_read_ctrl.sar1_dig_force       = 1;    // 1: Select digital control;       0: Select RTC control.
             SENS.sar_meas_start1.meas1_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas_start1.sar1_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
@@ -522,28 +561,28 @@ static inline void adc_ll_set_controller(adc_ll_num_t adc_n, adc_hal_controller_
         }
     } else { // adc_n == ADC_NUM_2
         switch ( ctrl ) {
-        case ADC_CTRL_RTC:
+        case ADC_LL_CTRL_RTC:
             SENS.sar_meas_start2.meas2_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas_start2.sar2_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
             SENS.sar_read_ctrl2.sar2_dig_force      = 0;    // 1: Select digital control;       0: Select RTC control.
             SENS.sar_read_ctrl2.sar2_pwdet_force    = 0;    // 1: Select power detect control;  0: Select RTC control.
             SYSCON.saradc_ctrl.sar2_mux             = 1;    // 1: Select digital control;       0: Select power detect control.
             break;
-        case ADC_CTRL_ULP:
+        case ADC_LL_CTRL_ULP:
             SENS.sar_meas_start2.meas2_start_force  = 0;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas_start2.sar2_en_pad_force  = 0;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
             SENS.sar_read_ctrl2.sar2_dig_force      = 0;    // 1: Select digital control;       0: Select RTC control.
             SENS.sar_read_ctrl2.sar2_pwdet_force    = 0;    // 1: Select power detect control;  0: Select RTC control.
             SYSCON.saradc_ctrl.sar2_mux             = 1;    // 1: Select digital control;       0: Select power detect control.
             break;
-        case ADC_CTRL_DIG:
+        case ADC_LL_CTRL_DIG:
             SENS.sar_meas_start2.meas2_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas_start2.sar2_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
             SENS.sar_read_ctrl2.sar2_dig_force      = 1;    // 1: Select digital control;       0: Select RTC control.
             SENS.sar_read_ctrl2.sar2_pwdet_force    = 0;    // 1: Select power detect control;  0: Select RTC control.
             SYSCON.saradc_ctrl.sar2_mux             = 1;    // 1: Select digital control;       0: Select power detect control.
             break;
-        case ADC2_CTRL_PWDET:   // currently only used by Wi-Fi
+        case ADC_LL_CTRL_PWDET:   // currently only used by Wi-Fi
             SENS.sar_meas_start2.meas2_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas_start2.sar2_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
             SENS.sar_read_ctrl2.sar2_dig_force      = 0;    // 1: Select digital control;       0: Select RTC control.
diff --git a/tools/sdk/esp32/include/hal/esp32/include/hal/emac_ll.h b/tools/sdk/esp32/include/hal/esp32/include/hal/emac_ll.h
index 625687b6a09..cd341b1c5f8 100644
--- a/tools/sdk/esp32/include/hal/esp32/include/hal/emac_ll.h
+++ b/tools/sdk/esp32/include/hal/esp32/include/hal/emac_ll.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /*******************************************************************************
  * NOTICE
@@ -344,6 +336,17 @@ static inline void emac_ll_clear(emac_mac_dev_t *mac_regs)
     mac_regs->gmacfc.val = 0;
 }
 
+/* emacdebug */
+static inline uint32_t emac_ll_transmit_frame_ctrl_status(emac_mac_dev_t *mac_regs)
+{
+    return mac_regs->emacdebug.mactfcs;
+}
+
+static inline uint32_t emac_ll_receive_read_ctrl_state(emac_mac_dev_t *mac_regs)
+{
+    return mac_regs->emacdebug.mtlrfrcs;
+}
+
 /* emacmiidata */
 static inline void emac_ll_set_phy_data(emac_mac_dev_t *mac_regs, uint32_t data)
 {
diff --git a/tools/sdk/esp32/include/hal/esp32/include/hal/gpio_ll.h b/tools/sdk/esp32/include/hal/esp32/include/hal/gpio_ll.h
index 59a2858ce91..fcff6a22bd6 100644
--- a/tools/sdk/esp32/include/hal/esp32/include/hal/gpio_ll.h
+++ b/tools/sdk/esp32/include/hal/esp32/include/hal/gpio_ll.h
@@ -567,7 +567,7 @@ static inline void gpio_ll_iomux_in(gpio_dev_t *hw, uint32_t gpio, uint32_t sign
  * @param  pin_name Pin name to configure
  * @param  func Function to assign to the pin
  */
-static inline void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
+static inline __attribute__((always_inline)) void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
 {
     PIN_FUNC_SELECT(pin_name, func);
 }
diff --git a/tools/sdk/esp32/include/hal/include/hal/adc_hal.h b/tools/sdk/esp32/include/hal/include/hal/adc_hal.h
index 807d620c639..b8455e27ecd 100644
--- a/tools/sdk/esp32/include/hal/include/hal/adc_hal.h
+++ b/tools/sdk/esp32/include/hal/include/hal/adc_hal.h
@@ -1,21 +1,51 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
+#include "esp_err.h"
 #include "soc/soc_caps.h"
+#include "hal/dma_types.h"
 #include "hal/adc_types.h"
 #include "hal/adc_ll.h"
 #include "esp_err.h"
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+#if SOC_GDMA_SUPPORTED
 #include "soc/gdma_struct.h"
 #include "hal/gdma_ll.h"
-#include "hal/dma_types.h"
-#include "hal/adc_ll.h"
-#include "hal/dma_types.h"
-#include "esp_err.h"
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32S2
+//ADC utilises SPI3 DMA on ESP32S2
+#include "hal/spi_ll.h"
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+//ADC utilises I2S0 DMA on ESP32
+#include "hal/i2s_ll.h"
+#endif
+
+#if SOC_GDMA_SUPPORTED
+#define ADC_HAL_DMA_INTR_MASK                           GDMA_LL_EVENT_RX_SUC_EOF
+#elif CONFIG_IDF_TARGET_ESP32S2
+#define ADC_HAL_DMA_INTR_MASK                           SPI_LL_INTR_IN_SUC_EOF
+#else //CONFIG_IDF_TARGET_ESP32
+#define ADC_HAL_DMA_INTR_MASK                           BIT(9)
+#endif
 
 //For ADC module, each conversion contains 4 bytes
 #define ADC_HAL_DATA_LEN_PER_CONV 4
 
+typedef enum adc_hal_work_mode_t {
+    ADC_HAL_ULP_MODE,
+    ADC_HAL_SINGLE_READ_MODE,
+    ADC_HAL_CONTINUOUS_READ_MODE,
+    ADC_HAL_PWDET_MODE
+} adc_hal_work_mode_t;
+
 /**
  * @brief Enum for DMA descriptor status
  */
@@ -29,6 +59,7 @@ typedef enum adc_hal_dma_desc_status_t {
  * @brief Configuration of the HAL
  */
 typedef struct adc_hal_config_t {
+    void                *dev;               ///< DMA peripheral address
     uint32_t            desc_max_num;       ///< Number of the descriptors linked once
     uint32_t            dma_chan;           ///< DMA channel to be used
     uint32_t            eof_num;            ///< Bytes between 2 in_suc_eof interrupts
@@ -42,25 +73,30 @@ typedef struct adc_hal_context_t {
     dma_descriptor_t    *rx_desc;           ///< DMA descriptors
 
     /**< these will be assigned by hal layer itself */
-    gdma_dev_t          *dev;               ///< GDMA address
     dma_descriptor_t    desc_dummy_head;    ///< Dummy DMA descriptor for ``cur_desc_ptr`` to start
     dma_descriptor_t    *cur_desc_ptr;      ///< Pointer to the current descriptor
 
     /**< these need to be configured by `adc_hal_config_t` via driver layer*/
+    void                *dev;               ///< DMA address
     uint32_t            desc_max_num;       ///< Number of the descriptors linked once
     uint32_t            dma_chan;           ///< DMA channel to be used
     uint32_t            eof_num;            ///< Words between 2 in_suc_eof interrupts
 } adc_hal_context_t;
-#endif
+
+typedef struct adc_hal_digi_ctrlr_cfg_t {
+    bool                        conv_limit_en;      //1: adc conversion will stop when `conv_limit_num` reaches. 0: won't stop. NOTE: esp32 should always be set to 1.
+    uint32_t                    conv_limit_num;     //see `conv_limit_en`
+    uint32_t                    adc_pattern_len;    //total pattern item number, including ADC1 and ADC2
+    adc_digi_pattern_config_t   *adc_pattern;       //pattern item
+    uint32_t                    sample_freq_hz;     //ADC sample frequency
+    adc_digi_convert_mode_t     conv_mode;          //controller work mode
+    uint32_t                    bit_width;          //output data width
+} adc_hal_digi_ctrlr_cfg_t;
+
 
 /*---------------------------------------------------------------
                     Common setting
 ---------------------------------------------------------------*/
-/**
- * ADC module initialization.
- */
-void adc_hal_init(void);
-
 /**
  * Set ADC module power management.
  *
@@ -68,51 +104,7 @@ void adc_hal_init(void);
  */
 #define adc_hal_set_power_manage(manage) adc_ll_set_power_manage(manage)
 
-/**
- * ADC module clock division factor setting. ADC clock devided from APB clock.
- *
- * @prarm div Division factor.
- */
-#define adc_hal_digi_set_clk_div(div) adc_ll_digi_set_clk_div(div)
-
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * ADC SAR clock division factor setting. ADC SAR clock devided from `RTC_FAST_CLK`.
- *
- * @prarm div Division factor.
- */
-#define adc_hal_set_sar_clk_div(adc_n, div) adc_ll_set_sar_clk_div(adc_n, div)
-
-/**
- * Set ADC module controller.
- * There are five SAR ADC controllers:
- * Two digital controller: Continuous conversion mode (DMA). High performance with multiple channel scan modes;
- * Two RTC controller: Single conversion modes (Polling). For low power purpose working during deep sleep;
- * the other is dedicated for Power detect (PWDET / PKDET), Only support ADC2.
- *
- * @prarm adc_n ADC unit.
- * @prarm ctrl ADC controller.
- */
-#define adc_hal_set_controller(adc_n, ctrl) adc_ll_set_controller(adc_n, ctrl)
-#endif  //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
-/**
- * Get the attenuation of a particular channel on ADCn.
- *
- * @param adc_n ADC unit.
- * @param channel ADCn channel number.
- * @return atten The attenuation option.
- */
-#define adc_hal_get_atten(adc_n, channel) adc_ll_get_atten(adc_n, channel)
-#endif
-
-#if CONFIG_IDF_TARGET_ESP32
-/**
- * Close ADC AMP module if don't use it for power save.
- */
-#define adc_hal_amp_disable() adc_ll_amp_disable()
-#endif
+void adc_hal_set_controller(adc_ll_num_t unit, adc_hal_work_mode_t work_mode);
 
 #if SOC_ADC_ARBITER_SUPPORTED
 //No ADC2 controller arbiter on ESP32
@@ -133,7 +125,6 @@ void adc_hal_arbiter_config(adc_arbiter_t *config);
 /*---------------------------------------------------------------
                     PWDET(Power detect) controller setting
 ---------------------------------------------------------------*/
-
 /**
  * Set adc cct for PWDET controller.
  *
@@ -150,26 +141,6 @@ void adc_hal_arbiter_config(adc_arbiter_t *config);
  */
 #define adc_hal_pwdet_get_cct() adc_ll_pwdet_get_cct()
 
-/*---------------------------------------------------------------
-                    RTC controller setting
----------------------------------------------------------------*/
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * Set adc output data format for RTC controller.
- *
- * @prarm adc_n ADC unit.
- * @prarm bits Output data bits width option.
- */
-#define adc_hal_rtc_set_output_format(adc_n, bits) adc_ll_rtc_set_output_format(adc_n, bits)
-
-/**
- * ADC module output data invert or not.
- *
- * @prarm adc_n ADC unit.
- */
-#define adc_hal_rtc_output_invert(adc_n, inv_en) adc_ll_rtc_output_invert(adc_n, inv_en)
-#endif  //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
 /**
  *  Enable/disable the output of ADCn's internal reference voltage to one of ADC2's channels.
  *
@@ -187,29 +158,109 @@ void adc_hal_arbiter_config(adc_arbiter_t *config);
 /*---------------------------------------------------------------
                     Digital controller setting
 ---------------------------------------------------------------*/
+/**
+ * ADC module initialization.
+ */
+void adc_hal_init(void);
+
 /**
  * Digital controller deinitialization.
+ *
+ * @param hal Context of the HAL
  */
-void adc_hal_digi_deinit(void);
+void adc_hal_digi_deinit(adc_hal_context_t *hal);
+
+/**
+ * @brief Initialize the hal context
+ *
+ * @param hal    Context of the HAL
+ * @param config Configuration of the HAL
+ */
+void adc_hal_context_config(adc_hal_context_t *hal, const adc_hal_config_t *config);
+
+/**
+ * @brief Initialize the HW
+ *
+ * @param hal Context of the HAL
+ */
+void adc_hal_digi_init(adc_hal_context_t *hal);
 
 /**
  * Setting the digital controller.
  *
- * @param cfg Pointer to digital controller paramter.
+ * @param hal    Context of the HAL
+ * @param cfg    Pointer to digital controller paramter.
+ */
+void adc_hal_digi_controller_config(adc_hal_context_t *hal, const adc_hal_digi_ctrlr_cfg_t *cfg);
+
+/**
+ * @brief Start Conversion
+ *
+ * @param hal Context of the HAL
+ * @param data_buf Pointer to the data buffer, the length should be multiple of ``desc_max_num`` and ``eof_num`` in ``adc_hal_context_t``
  */
-void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
+void adc_hal_digi_start(adc_hal_context_t *hal, uint8_t *data_buf);
 
+#if !SOC_GDMA_SUPPORTED
 /**
- * Reset the pattern table pointer, then take the measurement rule from table header in next measurement.
+ * @brief Get the DMA descriptor that Hardware has finished processing.
  *
- * @param adc_n ADC unit.
+ * @param hal Context of the HAL
+ *
+ * @return DMA descriptor address
  */
-#define adc_hal_digi_clear_pattern_table(adc_n) adc_ll_digi_clear_pattern_table(adc_n)
+intptr_t adc_hal_get_desc_addr(adc_hal_context_t *hal);
+
+/**
+ * @brief Check the hardware interrupt event
+ *
+ * @param hal Context of the HAL
+ * @param mask Event mask
+ *
+ * @return True: the event is triggered. False: the event is not triggered yet.
+ */
+bool adc_hal_check_event(adc_hal_context_t *hal, uint32_t mask);
+#endif
+
+/**
+ * @brief Get the ADC reading result
+ *
+ * @param      hal           Context of the HAL
+ * @param      eof_desc_addr The last descriptor that is finished by HW. Should be got from DMA
+ * @param[out] cur_desc      The descriptor with ADC reading result (from the 1st one to the last one (``eof_desc_addr``))
+ *
+ * @return                   See ``adc_hal_dma_desc_status_t``
+ */
+adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_context_t *hal, const intptr_t eof_desc_addr, dma_descriptor_t **cur_desc);
+
+/**
+ * @brief Clear interrupt
+ *
+ * @param hal  Context of the HAL
+ * @param mask mask of the interrupt
+ */
+void adc_hal_digi_clr_intr(adc_hal_context_t *hal, uint32_t mask);
+
+/**
+ * @brief Enable interrupt
+ *
+ * @param hal  Context of the HAL
+ * @param mask mask of the interrupt
+ */
+void adc_hal_digi_dis_intr(adc_hal_context_t *hal, uint32_t mask);
+
+/**
+ * @brief Stop conversion
+ *
+ * @param hal Context of the HAL
+ */
+void adc_hal_digi_stop(adc_hal_context_t *hal);
+
 
 /*---------------------------------------------------------------
                     ADC Single Read
 ---------------------------------------------------------------*/
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
+#if SOC_ADC_RTC_CTRL_SUPPORTED
 /**
  * Set the attenuation of a particular channel on ADCn.
  *
@@ -245,7 +296,7 @@ void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
  */
 #define adc_hal_set_atten(adc_n, channel, atten) adc_ll_set_atten(adc_n, channel, atten)
 
-#else // CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+#else // #if !SOC_ADC_RTC_CTRL_SUPPORTED
 /**
  * Set the attenuation for ADC to single read
  *
@@ -256,7 +307,7 @@ void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
  * @param atten    ADC attenuation. See ``adc_atten_t``
  */
 #define adc_hal_set_atten(adc_n, channel, atten) adc_ll_onetime_set_atten(atten)
-#endif
+#endif  //#if SOC_ADC_RTC_CTRL_SUPPORTED
 
 /**
  * Start an ADC conversion and get the converted value.
@@ -277,7 +328,6 @@ esp_err_t adc_hal_convert(adc_ll_num_t adc_n, int channel, int *out_raw);
                     ADC calibration setting
 ---------------------------------------------------------------*/
 #if SOC_ADC_CALIBRATION_V1_SUPPORTED
-// ESP32-S2, C3 and H2 support HW offset calibration.
 
 /**
  * @brief Initialize default parameter for the calibration block.
@@ -314,86 +364,21 @@ uint32_t adc_hal_self_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc
 
 #endif //SOC_ADC_CALIBRATION_V1_SUPPORTED
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+
 /*---------------------------------------------------------------
-                    DMA setting
+                    RTC controller setting
 ---------------------------------------------------------------*/
 /**
- * @brief Initialize the hal context
- *
- * @param hal    Context of the HAL
- * @param config Configuration of the HAL
- */
-void adc_hal_context_config(adc_hal_context_t *hal, const adc_hal_config_t *config);
-
-/**
- * @brief Initialize the HW
- *
- * @param hal Context of the HAL
- */
-void adc_hal_digi_init(adc_hal_context_t *hal);
-
-/**
- * @brief Reset ADC / DMA fifo
- *
- * @param hal Context of the HAL
- */
-void adc_hal_fifo_reset(adc_hal_context_t *hal);
-
-/**
- * @brief Start DMA
- *
- * @param hal      Context of the HAL
- * @param data_buf Pointer to the data buffer, the length should be multiple of ``desc_max_num`` and ``eof_num`` in ``adc_hal_context_t``
- */
-void adc_hal_digi_rxdma_start(adc_hal_context_t *hal, uint8_t *data_buf);
-
-/**
- * @brief Start ADC
- *
- * @param hal Context of the HAL
- */
-void adc_hal_digi_start(adc_hal_context_t *hal);
-
-/**
- * @brief Get the ADC reading result
- *
- * @param      hal           Context of the HAL
- * @param      eof_desc_addr The last descriptor that is finished by HW. Should be got from DMA
- * @param[out] cur_desc      The descriptor with ADC reading result (from the 1st one to the last one (``eof_desc_addr``))
- *
- * @return                   See ``adc_hal_dma_desc_status_t``
- */
-adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_context_t *hal, const intptr_t eof_desc_addr, dma_descriptor_t **cur_desc);
-
-/**
- * @brief Stop DMA
- *
- * @param hal Context of the HAL
- */
-void adc_hal_digi_rxdma_stop(adc_hal_context_t *hal);
-
-/**
- * @brief Clear interrupt
- *
- * @param hal  Context of the HAL
- * @param mask mask of the interrupt
- */
-void adc_hal_digi_clr_intr(adc_hal_context_t *hal, uint32_t mask);
-
-/**
- * @brief Enable interrupt
+ * Set adc output data format for RTC controller.
  *
- * @param hal  Context of the HAL
- * @param mask mask of the interrupt
+ * @prarm adc_n ADC unit.
+ * @prarm bits Output data bits width option.
  */
-void adc_hal_digi_dis_intr(adc_hal_context_t *hal, uint32_t mask);
+#define adc_hal_rtc_set_output_format(adc_n, bits) adc_ll_rtc_set_output_format(adc_n, bits)
 
 /**
- * @brief Stop ADC
+ * ADC module output data invert or not.
  *
- * @param hal Context of the HAL
+ * @prarm adc_n ADC unit.
  */
-void adc_hal_digi_stop(adc_hal_context_t *hal);
-
-#endif  //#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+#define adc_hal_rtc_output_invert(adc_n, inv_en) adc_ll_rtc_output_invert(adc_n, inv_en)
diff --git a/tools/sdk/esp32/include/hal/include/hal/adc_types.h b/tools/sdk/esp32/include/hal/include/hal/adc_types.h
index c0f6661f145..f5efb1d4273 100644
--- a/tools/sdk/esp32/include/hal/include/hal/adc_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/adc_types.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 
 #include <stdbool.h>
@@ -62,26 +54,9 @@ typedef enum {
     ADC_ATTEN_MAX,
 } adc_atten_t;
 
-#ifdef CONFIG_IDF_TARGET_ESP32
-/**
- * @brief ESP32 ADC DMA source selection.
- */
-#else
-/**
- * @brief ESP32 ADC DMA source selection.
- *
- * @deprecated  Not applicable on ESP32-S2 because ESP32-S2 doesn't use I2S DMA.
- */
-#endif
-typedef enum {
-    ADC_I2S_DATA_SRC_IO_SIG = 0, /*!< I2S data from GPIO matrix signal  */
-    ADC_I2S_DATA_SRC_ADC = 1,    /*!< I2S data from ADC */
-    ADC_I2S_DATA_SRC_MAX,
-} adc_i2s_source_t;
-
 /**
  * @brief ADC resolution setting option.
- *
+ * @note  Only used in single read mode
  */
 typedef enum {
 #if CONFIG_IDF_TARGET_ESP32
@@ -97,82 +72,56 @@ typedef enum {
     ADC_WIDTH_MAX,
 } adc_bits_width_t;
 
-
 /**
  * @brief ADC digital controller (DMA mode) work mode.
- *
- * @note  The conversion mode affects the sampling frequency:
- *        SINGLE_UNIT_1: When the measurement is triggered, only ADC1 is sampled once.
- *        SINGLE_UNIT_2: When the measurement is triggered, only ADC2 is sampled once.
- *        BOTH_UNIT    : When the measurement is triggered, ADC1 and ADC2 are sampled at the same time.
- *        ALTER_UNIT   : When the measurement is triggered, ADC1 or ADC2 samples alternately.
  */
 typedef enum {
-    ADC_CONV_SINGLE_UNIT_1 = 1, /*!< SAR ADC 1. */
-    ADC_CONV_SINGLE_UNIT_2 = 2, /*!< SAR ADC 2. */
-    ADC_CONV_BOTH_UNIT     = 3, /*!< SAR ADC 1 and 2. */
-    ADC_CONV_ALTER_UNIT    = 7, /*!< SAR ADC 1 and 2 alternative mode. */
+    ADC_CONV_SINGLE_UNIT_1 = 1,  ///< Only use ADC1 for conversion
+    ADC_CONV_SINGLE_UNIT_2 = 2,  ///< Only use ADC2 for conversion
+    ADC_CONV_BOTH_UNIT     = 3,  ///< Use Both ADC1 and ADC2 for conversion simultaneously
+    ADC_CONV_ALTER_UNIT    = 7,  ///< Use both ADC1 and ADC2 for conversion by turn. e.g. ADC1 -> ADC2 -> ADC1 -> ADC2 .....
     ADC_CONV_UNIT_MAX,
 } adc_digi_convert_mode_t;
 
-/**
- * @brief ADC digital controller (DMA mode) conversion rules setting.
- */
-typedef struct {
-    union {
-        struct {
-            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
-                                         0: measurement range 0 - 800mV,
-                                         1: measurement range 0 - 1100mV,
-                                         2: measurement range 0 - 1350mV,
-                                         3: measurement range 0 - 2600mV. */
-#if CONFIG_IDF_TARGET_ESP32
-            uint8_t bit_width: 2;   /*!< ADC resolution.
--                                         0: 9 bit;
--                                         1: 10 bit;
--                                         2: 11 bit;
--                                         3: 12 bit. */
-            int8_t channel:   4;   /*!< ADC channel index. */
-#elif CONFIG_IDF_TARGET_ESP32S2
-            uint8_t reserved:  2;   /*!< reserved0 */
-            uint8_t channel:   4;   /*!< ADC channel index. */
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-            uint8_t channel:   3;   /*!< ADC channel index. */
-            uint8_t unit:      1;   /*!< ADC unit index. */
-            uint8_t reserved:  2;   /*!< reserved0 */
-#endif
-        };
-        uint8_t val;                /*!<Raw data value */
-    };
-} adc_digi_pattern_table_t;
-
 /**
  * @brief ADC digital controller (DMA mode) output data format option.
  */
 typedef enum {
-    ADC_DIGI_FORMAT_12BIT,   /*!<ADC to DMA data format,                [15:12]-channel, [11: 0]-12 bits ADC data (`adc_digi_output_data_t`).
-                                 Note: For single convert mode. */
-    ADC_DIGI_FORMAT_11BIT,   /*!<ADC to DMA data format, [15]-adc unit, [14:11]-channel, [10: 0]-11 bits ADC data (`adc_digi_output_data_t`).
-                                 Note: For multi or alter convert mode. */
-    ADC_DIGI_FORMAT_MAX,
+    ADC_DIGI_FORMAT_12BIT __attribute__((deprecated)),  /*!<ADC to DMA data format,                [15:12]-channel, [11: 0]-12 bits ADC data (`adc_digi_output_data_t`). Note: For single convert mode. */
+    ADC_DIGI_FORMAT_11BIT __attribute__((deprecated)),  /*!<ADC to DMA data format, [15]-adc unit, [14:11]-channel, [10: 0]-11 bits ADC data (`adc_digi_output_data_t`). Note: For multi or alter convert mode. */
+    ADC_DIGI_FORMAT_MAX   __attribute__((deprecated)),
+
+    ADC_DIGI_OUTPUT_FORMAT_TYPE1,   ///< See `adc_digi_output_data_t.type1`
+    ADC_DIGI_OUTPUT_FORMAT_TYPE2,   ///< See `adc_digi_output_data_t.type2`
 } adc_digi_output_format_t;
 
+/**
+ * @brief ADC digital controller pattern configuration
+ */
+typedef struct {
+    uint8_t atten;      ///< Attenuation of this ADC channel
+    uint8_t channel;    ///< ADC channel
+    uint8_t unit;       ///< ADC unit
+    uint8_t bit_width;  ///< ADC output bit width
+} adc_digi_pattern_config_t;
+
+/*---------------------------------------------------------------
+                    Output Format
+---------------------------------------------------------------*/
 #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
 /**
  * @brief ADC digital controller (DMA mode) output data format.
  *        Used to analyze the acquired ADC (DMA) data.
- *
- * @note  ESP32-S2:
- *        Member `channel` can be used to judge the validity of the ADC data, because the role of the arbiter may get invalid ADC data.
+ * @note  ESP32: Only `type1` is valid. ADC2 does not support DMA mode.
+ * @note  ESP32-S2: Member `channel` can be used to judge the validity of the ADC data,
+ *                  because the role of the arbiter may get invalid ADC data.
  */
 typedef struct {
     union {
         struct {
             uint16_t data:     12;  /*!<ADC real output data info. Resolution: 12 bit. */
-            uint16_t channel:   4;  /*!<ADC channel index info. For ESP32-S2:
-                                        If (channel < ADC_CHANNEL_MAX), The data is valid.
-                                        If (channel > ADC_CHANNEL_MAX), The data is invalid. */
-        } type1;                    /*!<When the configured output format is 12bit. `ADC_DIGI_FORMAT_12BIT` */
+            uint16_t channel:   4;  /*!<ADC channel index info. */
+        } type1;
         struct {
             uint16_t data:     11;  /*!<ADC real output data info. Resolution: 11 bit. */
             uint16_t channel:   4;  /*!<ADC channel index info. For ESP32-S2:
@@ -183,8 +132,8 @@ typedef struct {
         uint16_t val;               /*!<Raw data value */
     };
 } adc_digi_output_data_t;
-#endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
 /**
  * @brief ADC digital controller (DMA mode) output data format.
  *        Used to analyze the acquired ADC (DMA) data.
@@ -203,112 +152,32 @@ typedef struct {
         uint32_t val;                   /*!<Raw data value */
     };
 } adc_digi_output_data_t;
-#endif
-
-#if !CONFIG_IDF_TARGET_ESP32
 
+#elif CONFIG_IDF_TARGET_ESP32S3
 /**
- * @brief ADC digital controller (DMA mode) clock system setting.
- *        Calculation formula: controller_clk = (`APLL` or `APB`) / (div_num + div_a / div_b + 1).
- *
- * @note: The clocks of the DAC digital controller use the ADC digital controller clock divider.
+ * @brief ADC digital controller (DMA mode) output data format.
+ *        Used to analyze the acquired ADC (DMA) data.
  */
 typedef struct {
-    bool use_apll;      /*!<true: use APLL clock; false: use APB clock. */
-    uint32_t div_num;   /*!<Division factor. Range: 0 ~ 255.
-                            Note: When a higher frequency clock is used (the division factor is less than 9),
-                            the ADC reading value will be slightly offset. */
-    uint32_t div_b;     /*!<Division factor. Range: 1 ~ 63. */
-    uint32_t div_a;     /*!<Division factor. Range: 0 ~ 63. */
-} adc_digi_clk_t;
-
-#endif //!CONFIG_IDF_TARGET_ESP32
-
-/**
-  * @brief ADC digital controller (DMA mode) configuration parameters.
-  *
-  * Example setting: When using ADC1 channel0 to measure voltage, the sampling rate is required to be 1 kHz:
-  *
-  *     +---------------------+--------+--------+--------+
-  *     | sample rate         | 1 kHz  | 1 kHz  | 1 kHz  |
-  *     +---------------------+--------+--------+--------+
-  *     | conv_mode           | single |  both  |  alter |
-  *     | adc1_pattern_len    |    1   |    1   |    1   |
-  *     | dig_clk.use_apll    |    0   |    0   |    0   |
-  *     | dig_clk.div_num     |   99   |   99   |   99   |
-  *     | dig_clk.div_b       |    0   |    0   |    0   |
-  *     | dig_clk.div_a       |    0   |    0   |    0   |
-  *     | interval            |  400   |  400   |  200   |
-  *     +---------------------+--------+--------+--------+
-  *     | `trigger_meas_freq` | 1 kHz  | 1 kHz  | 2 kHz  |
-  *     +---------------------+--------+--------+--------+
-  *
-  * Explanation of the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA outputs:
-  *
-  *     +---------------------+--------+--------+--------+
-  *     | conv_mode           | single |  both  |  alter |
-  *     +---------------------+--------+--------+--------+
-  *     | trigger meas times  |    1   |    1   |    1   |
-  *     +---------------------+--------+--------+--------+
-  *     | conv_limit_num      |   +1   |   +1   |   +1   |
-  *     | dma_eof_num         |   +1   |   +2   |   +1   |
-  *     | dma output (byte)   |   +2   |   +4   |   +2   |
-  *     +---------------------+--------+--------+--------+
-  */
-typedef struct {
-    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
-                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
-    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
-    uint32_t adc1_pattern_len;               /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
-                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
-                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
-                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
-    uint32_t adc2_pattern_len;               /*!<Refer to ``adc1_pattern_len`` */
-    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
-    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to `adc1_pattern` */
-    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
-    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-    uint32_t adc_pattern_len;                /*!<Pattern table length for digital controller. Range: 0 ~ 7 (0: Don't change the pattern table setting).
-                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 7 items, in which channel selection,
-                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
-                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
-    adc_digi_pattern_table_t *adc_pattern;   /*!<Pointer to pattern table for digital controller. The table size defined by `adc_pattern_len`. */
-#endif
-#if CONFIG_IDF_TARGET_ESP32S2
-    uint32_t interval;                       /*!<The number of interval clock cycles for the digital controller to trigger the measurement.
-                                                 The unit is the divided clock. Range: 40 ~ 4095.
-                                                 Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval. Refer to ``adc_digi_clk_t``.
-                                                 Note: The sampling rate of each channel is also related to the conversion mode (See ``adc_digi_convert_mode_t``) and pattern table settings. */
-    adc_digi_clk_t dig_clk;                  /*!<ADC digital controller clock divider settings. Refer to ``adc_digi_clk_t``.
-                                                 Note: The clocks of the DAC digital controller use the ADC digital controller clock divider. */
-    uint32_t dma_eof_num;                    /*!<DMA eof num of adc digital controller.
-                                                 If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated in DMA.
-                                                 Note: The converted data in the DMA in link buffer will be multiple of two bytes. */
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-    uint32_t sample_freq_hz;  /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
-                                   Fs = Fd / interval / 2
-                                   Fs: sampling frequency;
-                                   Fd: digital controller frequency, no larger than 5M for better performance
-                                   interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
-#endif
-} adc_digi_config_t;
-
-#if CONFIG_IDF_TARGET_ESP32S2
-/**
- * @brief ADC digital controller (DMA mode) interrupt type options.
- */
-typedef enum {
-    ADC_DIGI_INTR_MASK_MONITOR = 0x1,
-    ADC_DIGI_INTR_MASK_MEAS_DONE = 0x2,
-    ADC_DIGI_INTR_MASK_ALL = 0x3,
-} adc_digi_intr_t;
-FLAG_ATTR(adc_digi_intr_t)
+    union {
+        struct {
+            uint32_t data:          13; /*!<ADC real output data info. Resolution: 13 bit. */
+            uint32_t channel:       4;  /*!<ADC channel index info.
+                                            If (channel < ADC_CHANNEL_MAX), The data is valid.
+                                            If (channel > ADC_CHANNEL_MAX), The data is invalid. */
+            uint32_t unit:          1;  /*!<ADC unit index info. 0: ADC1; 1: ADC2.  */
+            uint32_t reserved17_31: 14; /*!<Reserved17. */
+        } type2;                         /*!<When the configured output format is 12bit. `ADC_DIGI_FORMAT_11BIT` */
+        uint32_t val;                   /*!<Raw data value */
+    };
+} adc_digi_output_data_t;
 #endif
 
-#if !CONFIG_IDF_TARGET_ESP32
 
+#if SOC_ADC_ARBITER_SUPPORTED
+/*---------------------------------------------------------------
+                    Arbiter
+---------------------------------------------------------------*/
 /**
  * @brief ADC arbiter work mode option.
  *
@@ -344,7 +213,12 @@ typedef struct {
     .dig_pri = 0, \
     .pwdet_pri = 2, \
 }
+#endif  //#if SOC_ADC_ARBITER_SUPPORTED
 
+#if SOC_ADC_FILTER_SUPPORTED
+/*---------------------------------------------------------------
+                    Filter
+---------------------------------------------------------------*/
 /**
  * @brief ADC digital controller (DMA mode) filter index options.
  *
@@ -387,7 +261,12 @@ typedef struct {
                                     For ESP32-S2, it's always `ADC_CHANNEL_MAX` */
     adc_digi_filter_mode_t mode;/*!<Set adc filter mode for filter. See ``adc_digi_filter_mode_t``. */
 } adc_digi_filter_t;
+#endif  // #if SOC_ADC_FILTER_SUPPORTED
 
+#if SOC_ADC_MONITOR_SUPPORTED
+/*---------------------------------------------------------------
+                    Monitor
+---------------------------------------------------------------*/
 /**
  * @brief ADC digital controller (DMA mode) monitor index options.
  *
@@ -437,5 +316,41 @@ typedef struct {
     uint32_t threshold;             /*!<Set monitor threshold of adc digital controller. */
 #endif
 } adc_digi_monitor_t;
+#endif  //#if SOC_ADC_MONITOR_SUPPORTED
+
+/*---------------------------------------------------------------
+            To Be Deprecated TODO: IDF-3610
+---------------------------------------------------------------*/
+#ifdef CONFIG_IDF_TARGET_ESP32
+/**
+ * @brief ESP32 ADC DMA source selection.
+ */
+#else
+/**
+ * @brief ESP32 ADC DMA source selection.
+ *
+ * @deprecated  Not applicable on ESP32-S2 because ESP32-S2 doesn't use I2S DMA.
+ */
+#endif
+typedef enum {
+    ADC_I2S_DATA_SRC_IO_SIG = 0, /*!< I2S data from GPIO matrix signal  */
+    ADC_I2S_DATA_SRC_ADC = 1,    /*!< I2S data from ADC */
+    ADC_I2S_DATA_SRC_MAX,
+} adc_i2s_source_t;
 
-#endif // CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#if CONFIG_IDF_TARGET_ESP32S2
+/**
+ * @brief ADC digital controller (DMA mode) clock system setting.
+ *        Calculation formula: controller_clk = (`APLL` or `APB`) / (div_num + div_a / div_b + 1).
+ *
+ * @note: The clocks of the DAC digital controller use the ADC digital controller clock divider.
+ */
+typedef struct {
+    bool use_apll;      /*!<true: use APLL clock; false: use APB clock. */
+    uint32_t div_num;   /*!<Division factor. Range: 0 ~ 255.
+                            Note: When a higher frequency clock is used (the division factor is less than 9),
+                            the ADC reading value will be slightly offset. */
+    uint32_t div_b;     /*!<Division factor. Range: 1 ~ 63. */
+    uint32_t div_a;     /*!<Division factor. Range: 0 ~ 63. */
+} adc_digi_clk_t;
+#endif
diff --git a/tools/sdk/esp32/include/hal/include/hal/cpu_hal.h b/tools/sdk/esp32/include/hal/include/hal/cpu_hal.h
index e6b7c62d2f3..824095871db 100644
--- a/tools/sdk/esp32/include/hal/include/hal/cpu_hal.h
+++ b/tools/sdk/esp32/include/hal/include/hal/cpu_hal.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -78,6 +70,11 @@ extern "C" {
  */
 #define cpu_hal_waiti()                 cpu_ll_waiti()
 
+/**
+ * Trigger a syscall.
+ */
+#define cpu_hal_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno)                 cpu_ll_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno)
+
 #if SOC_CPU_BREAKPOINTS_NUM > 0
 
 /**
diff --git a/tools/sdk/esp32/include/hal/include/hal/emac_hal.h b/tools/sdk/esp32/include/hal/include/hal/emac_hal.h
index f661e58985a..27cd38456dc 100644
--- a/tools/sdk/esp32/include/hal/include/hal/emac_hal.h
+++ b/tools/sdk/esp32/include/hal/include/hal/emac_hal.h
@@ -1,16 +1,8 @@
-// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -220,9 +212,23 @@ uint32_t emac_hal_get_phy_data(emac_hal_context_t *hal);
 
 void emac_hal_set_address(emac_hal_context_t *hal, uint8_t *mac_addr);
 
+/**
+ * @brief Starts EMAC Transmission & Reception
+ *
+ * @param hal EMAC HAL context infostructure
+ */
 void emac_hal_start(emac_hal_context_t *hal);
 
-void emac_hal_stop(emac_hal_context_t *hal);
+/**
+ * @brief Stops EMAC Transmission & Reception
+ *
+ * @param hal EMAC HAL context infostructure
+ * @return
+ *     - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_STATE: previous frame transmission/reception is not completed. When this error occurs,
+  *      wait and reapeat the EMAC stop again.
+ */
+esp_err_t emac_hal_stop(emac_hal_context_t *hal);
 
 uint32_t emac_hal_get_tx_desc_owner(emac_hal_context_t *hal);
 
diff --git a/tools/sdk/esp32/include/hal/include/hal/gpio_types.h b/tools/sdk/esp32/include/hal/include/hal/gpio_types.h
index a9b56f7c6a3..1678689961f 100644
--- a/tools/sdk/esp32/include/hal/include/hal/gpio_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/gpio_types.h
@@ -302,7 +302,6 @@ typedef enum {
     GPIO_NUM_19 = 19,   /*!< GPIO19, input and output */
     GPIO_NUM_20 = 20,   /*!< GPIO20, input and output */
     GPIO_NUM_21 = 21,   /*!< GPIO21, input and output */
-    GPIO_NUM_22 = 22,   /*!< GPIO22, input and output */
     GPIO_NUM_MAX,
 /** @endcond */
 } gpio_num_t;
diff --git a/tools/sdk/esp32/include/hal/include/hal/i2s_types.h b/tools/sdk/esp32/include/hal/include/hal/i2s_types.h
index 48d745eb2fa..dcf0ab4d0b8 100644
--- a/tools/sdk/esp32/include/hal/include/hal/i2s_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/i2s_types.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -52,31 +44,31 @@ typedef enum {
  *
  */
 typedef enum {
-    I2S_CHANNEL_MONO        = (0x01 << 31) | 0x03,  /*!< I2S channel (mono), two channel enabled. In this mode, you only need to send one channel data but the fifo will copy same data for another channel automatically, then both channels will transmit same data. The highest bit is for differentiating I2S_CHANNEL_STEREO since they both use two channels */
-    I2S_CHANNEL_STEREO      = 0x03,                 /*!< I2S channel (stereo), two channel enabled. In this mode, two channels will transmit different data. */
+    I2S_CHANNEL_MONO        = 1,  /*!< I2S channel (mono), one channel activated. In this mode, you only need to send one channel data but the fifo will copy same data for the other unactivated channels automatically, then both channels will transmit same data. */
+    I2S_CHANNEL_STEREO      = 2,  /*!< I2S channel (stereo), two (or more) channels activated. In this mode, these channels will transmit different data. */
 #if SOC_I2S_SUPPORTS_TDM
-    // Bit map of active chan.
+    // Bit map of activated chan.
     // There are 16 channels in TDM mode.
-    // For TX module, only the active channel send the audio data, the inactive channel send a constant(configurable) or will be skiped if 'skip_msk' is set.
-    // For RX module, only receive the audio data in active channels, the data in inactive channels will be ignored.
-    // the bit map of active channel can not exceed (0x1<<total_chan_num).
+    // For TX module, only the activated channel send the audio data, the unactivated channel send a constant(configurable) or will be skiped if 'skip_msk' is set.
+    // For RX module, only receive the audio data in activated channels, the data in unactivated channels will be ignored.
+    // the bit map of activated channel can not exceed the maximum enabled channel number (i.e. 0x10000 << total_chan_num).
     // e.g: active_chan_mask = (I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH3), here the active_chan_number is 2 and total_chan_num is not supposed to be smaller than 4.
-    I2S_TDM_ACTIVE_CH0  = (0x1 << 0),               /*!< I2S channel 0 enabled */
-    I2S_TDM_ACTIVE_CH1  = (0x1 << 1),               /*!< I2S channel 1 enabled */
-    I2S_TDM_ACTIVE_CH2  = (0x1 << 2),               /*!< I2S channel 2 enabled */
-    I2S_TDM_ACTIVE_CH3  = (0x1 << 3),               /*!< I2S channel 3 enabled */
-    I2S_TDM_ACTIVE_CH4  = (0x1 << 4),               /*!< I2S channel 4 enabled */
-    I2S_TDM_ACTIVE_CH5  = (0x1 << 5),               /*!< I2S channel 5 enabled */
-    I2S_TDM_ACTIVE_CH6  = (0x1 << 6),               /*!< I2S channel 6 enabled */
-    I2S_TDM_ACTIVE_CH7  = (0x1 << 7),               /*!< I2S channel 7 enabled */
-    I2S_TDM_ACTIVE_CH8  = (0x1 << 8),               /*!< I2S channel 8 enabled */
-    I2S_TDM_ACTIVE_CH9  = (0x1 << 9),               /*!< I2S channel 9 enabled */
-    I2S_TDM_ACTIVE_CH10 = (0x1 << 10),              /*!< I2S channel 10 enabled */
-    I2S_TDM_ACTIVE_CH11 = (0x1 << 11),              /*!< I2S channel 11 enabled */
-    I2S_TDM_ACTIVE_CH12 = (0x1 << 12),              /*!< I2S channel 12 enabled */
-    I2S_TDM_ACTIVE_CH13 = (0x1 << 13),              /*!< I2S channel 13 enabled */
-    I2S_TDM_ACTIVE_CH14 = (0x1 << 14),              /*!< I2S channel 14 enabled */
-    I2S_TDM_ACTIVE_CH15 = (0x1 << 15),              /*!< I2S channel 15 enabled */
+    I2S_TDM_ACTIVE_CH0  = (0x1 << 16),               /*!< I2S channel 0 activated */
+    I2S_TDM_ACTIVE_CH1  = (0x1 << 17),               /*!< I2S channel 1 activated */
+    I2S_TDM_ACTIVE_CH2  = (0x1 << 18),               /*!< I2S channel 2 activated */
+    I2S_TDM_ACTIVE_CH3  = (0x1 << 19),               /*!< I2S channel 3 activated */
+    I2S_TDM_ACTIVE_CH4  = (0x1 << 20),               /*!< I2S channel 4 activated */
+    I2S_TDM_ACTIVE_CH5  = (0x1 << 21),               /*!< I2S channel 5 activated */
+    I2S_TDM_ACTIVE_CH6  = (0x1 << 22),               /*!< I2S channel 6 activated */
+    I2S_TDM_ACTIVE_CH7  = (0x1 << 23),               /*!< I2S channel 7 activated */
+    I2S_TDM_ACTIVE_CH8  = (0x1 << 24),               /*!< I2S channel 8 activated */
+    I2S_TDM_ACTIVE_CH9  = (0x1 << 25),               /*!< I2S channel 9 activated */
+    I2S_TDM_ACTIVE_CH10 = (0x1 << 26),              /*!< I2S channel 10 activated */
+    I2S_TDM_ACTIVE_CH11 = (0x1 << 27),              /*!< I2S channel 11 activated */
+    I2S_TDM_ACTIVE_CH12 = (0x1 << 28),              /*!< I2S channel 12 activated */
+    I2S_TDM_ACTIVE_CH13 = (0x1 << 29),              /*!< I2S channel 13 activated */
+    I2S_TDM_ACTIVE_CH14 = (0x1 << 30),              /*!< I2S channel 14 activated */
+    I2S_TDM_ACTIVE_CH15 = (0x1 << 31),              /*!< I2S channel 15 activated */
 #endif
 } i2s_channel_t;
 
diff --git a/tools/sdk/esp32/include/hal/include/hal/memprot_types.h b/tools/sdk/esp32/include/hal/include/hal/memprot_types.h
index 42231f43eaf..15e3c3959ab 100644
--- a/tools/sdk/esp32/include/hal/include/hal/memprot_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/memprot_types.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -25,11 +17,34 @@ extern "C" {
 typedef enum {
     MEMP_LL_OK = 0,
     MEMP_LL_FAIL = 1,
-    MEMP_LL_ERR_SPLIT_ADDR_INVALID = 2,
+    MEMP_LL_ERR_SPLIT_ADDR_OUT_OF_RANGE = 2,
+    MEMP_LL_ERR_SPLIT_ADDR_INVALID = 2,         /* temporary duplicate for S2 builds */
     MEMP_LL_ERR_SPLIT_ADDR_UNALIGNED = 3,
-    MEMP_LL_ERR_UNI_BLOCK_INVALID = 4
+    MEMP_LL_ERR_UNI_BLOCK_INVALID = 4,
+    MEMP_LL_ERR_AREA_INVALID = 5,
+    MEMP_LL_ERR_WORLD_INVALID = 6
 } memprot_ll_err_t;
 
+/**
+ * @brief Memprot LL PMS World IDs
+ *
+ */
+typedef enum {
+    MEMP_LL_WORLD_NONE = 0x00,
+    MEMP_LL_WORLD_0 = 0x01,
+    MEMP_LL_WORLD_1 = 0x10
+} memprot_ll_world_t;
+
+/**
+ * @brief Memprot LL PMS Area IDs
+ *
+ */
+typedef enum {
+    MEMP_LL_AREA_NONE = 0,
+    MEMP_LL_AREA_LOW = 1,
+    MEMP_LL_AREA_HIGH = 2
+} memprot_ll_area_t;
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/hal/include/hal/usbh_hal.h b/tools/sdk/esp32/include/hal/include/hal/usbh_hal.h
index 6360f7b3f36..5326deb2dca 100644
--- a/tools/sdk/esp32/include/hal/include/hal/usbh_hal.h
+++ b/tools/sdk/esp32/include/hal/include/hal/usbh_hal.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -18,7 +18,6 @@ NOTE: Thread safety is the responsibility fo the HAL user. All USB Host HAL
 #include <stdlib.h>
 #include <stddef.h>
 #include "soc/usbh_struct.h"
-#include "soc/usb_wrap_struct.h"
 #include "hal/usbh_ll.h"
 #include "hal/usb_types_private.h"
 #include "hal/assert.h"
@@ -152,7 +151,6 @@ typedef struct {
 typedef struct {
     //Context
     usbh_dev_t *dev;                            /**< Pointer to base address of DWC_OTG registers */
-    usb_wrap_dev_t *wrap_dev;                   /**< Pointer to base address of USB Wrapper registers */
     //Host Port related
     uint32_t *periodic_frame_list;              /**< Pointer to scheduling frame list */
     usb_hal_frame_list_len_t frame_list_len;    /**< Length of the periodic scheduling frame list */
@@ -181,6 +179,7 @@ typedef struct {
  *
  * Entry:
  * - The peripheral must have been reset and clock un-gated
+ * - The USB PHY (internal or external) and associated GPIOs must already be configured
  * - GPIO pins configured
  * - Interrupt allocated but DISABLED (in case of an unknown interupt state)
  * Exit:
@@ -495,7 +494,7 @@ static inline void usbh_hal_disable_debounce_lock(usbh_hal_context_t *hal)
     hal->flags.dbnc_lock_enabled = 0;
     //Clear Conenction and disconenction interrupt in case it triggered again
     usb_ll_intr_clear(hal->dev, USB_LL_INTR_CORE_DISCONNINT);
-    usbh_ll_hprt_intr_clear(hal->dev, USBH_LL_INTR_HPRT_PRTENCHNG);
+    usbh_ll_hprt_intr_clear(hal->dev, USBH_LL_INTR_HPRT_PRTCONNDET);
     //Reenable the hprt (connection) and disconnection interrupts
     usb_ll_en_intrs(hal->dev, USB_LL_INTR_CORE_PRTINT | USB_LL_INTR_CORE_DISCONNINT);
 }
diff --git a/tools/sdk/esp32/include/hal/include/hal/usbh_ll.h b/tools/sdk/esp32/include/hal/include/hal/usbh_ll.h
index 63f7b8219d1..4320ead0a3b 100644
--- a/tools/sdk/esp32/include/hal/include/hal/usbh_ll.h
+++ b/tools/sdk/esp32/include/hal/include/hal/usbh_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -13,7 +13,6 @@ extern "C" {
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/usbh_struct.h"
-#include "soc/usb_wrap_struct.h"
 #include "hal/usb_types_private.h"
 #include "hal/misc.h"
 
@@ -153,25 +152,6 @@ typedef struct {
     uint8_t *buffer;
 } usbh_ll_dma_qtd_t;
 
-/* -----------------------------------------------------------------------------
------------------------------- USB Wrap Registers ------------------------------
------------------------------------------------------------------------------ */
-
-/**
- * @brief Configures the internal PHY to operate as HOST
- *
- * @param hw Start address of the USB Wrap registers
- */
-static inline void usbh_ll_internal_phy_conf(usb_wrap_dev_t *hw)
-{
-    //Enable internal PHY
-    hw->otg_conf.pad_enable = 1;
-    hw->otg_conf.phy_sel = 0;
-    //Set pulldowns on D+ and D-
-    hw->otg_conf.pad_pull_override = 1;
-    hw->otg_conf.dp_pulldown = 1;
-    hw->otg_conf.dm_pulldown = 1;
-}
 
 /* -----------------------------------------------------------------------------
 ------------------------------- Global Registers -------------------------------
@@ -431,7 +411,7 @@ static inline void usbh_ll_hcfg_set_fsls_pclk_sel(usbh_dev_t *hw)
 /**
  * @brief Sets some default values to HCFG to operate in Host mode with scatter/gather DMA
  *
- * @param hw Start address of the USB Wrap registers
+ * @param hw Start address of the DWC_OTG registers
  * @param speed Speed to initialize the host port at
  */
 static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
diff --git a/tools/sdk/esp32/include/idf_test/include/esp32/idf_performance_target.h b/tools/sdk/esp32/include/idf_test/include/esp32/idf_performance_target.h
index 5700d9f39ed..d6b64df99a7 100644
--- a/tools/sdk/esp32/include/idf_test/include/esp32/idf_performance_target.h
+++ b/tools/sdk/esp32/include/idf_test/include/esp32/idf_performance_target.h
@@ -33,88 +33,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            30
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     27
 
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-//Collect data and correct it later
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               35300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (697*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              (6780*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               11200
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      20100
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      35200
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     (754*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     (6650*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      45300
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 16200
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 33600
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                (484*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                (1512*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 49600
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-//Collect data and correct it later
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (261*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 (470*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (261*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  30900
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32/include/idf_test/include/esp32c3/idf_performance_target.h b/tools/sdk/esp32/include/idf_test/include/esp32c3/idf_performance_target.h
index c77e3efb1ec..7fbf8b9eaf5 100644
--- a/tools/sdk/esp32/include/idf_test/include/esp32c3/idf_performance_target.h
+++ b/tools/sdk/esp32/include/idf_test/include/esp32c3/idf_performance_target.h
@@ -29,85 +29,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
 
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-// rom options is much slower. use its 70%
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               42200
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-// legacy & suspend config are much faster. use the 70% of slower configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               (179*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (622*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              (6536*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               23700
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      46400
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-// legacy & suspend config are much faster. use the 70% of slower configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      (183*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     (605*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     (6676*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      22900
-#endif
-
-// No SPI1 tests for C3
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  43300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-// rom options is much slower. use its 70%
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  99500
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 (300*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (754*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  33900
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32/include/idf_test/include/esp32h2/idf_performance_target.h b/tools/sdk/esp32/include/idf_test/include/esp32h2/idf_performance_target.h
index af5738d1fcd..7fbf8b9eaf5 100644
--- a/tools/sdk/esp32/include/idf_test/include/esp32h2/idf_performance_target.h
+++ b/tools/sdk/esp32/include/idf_test/include/esp32h2/idf_performance_target.h
@@ -29,42 +29,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
 
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               53400
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (701*1000)
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      53600
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      44300
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 24400
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  64900
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (309*1000)
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (1697*1000)
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  76600
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32/include/idf_test/include/esp32s2/idf_performance_target.h b/tools/sdk/esp32/include/idf_test/include/esp32s2/idf_performance_target.h
index dc8a060f54b..cd037bb47d7 100644
--- a/tools/sdk/esp32/include/idf_test/include/esp32s2/idf_performance_target.h
+++ b/tools/sdk/esp32/include/idf_test/include/esp32s2/idf_performance_target.h
@@ -25,82 +25,3 @@
 
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
-
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-//Great variation, use the 70% of min value
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               33300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-// legacy config is much faster. use the 70% of slower configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               (239*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-// Weird data. Use 70% average of slower configs.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (546*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              (1191*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               19500
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-//release config is much faster than other configs. Use 70% average of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      46300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      (249*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     (851*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     (11480*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      40100
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 30500
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 (183*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                (474*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                (1283*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 44100
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  47800
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (252*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-// write with large RAM buffer tests has lower performance value than normal performance tests
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 (398*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (1204*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  22100
-#endif
diff --git a/tools/sdk/esp32/include/idf_test/include/esp32s3/idf_performance_target.h b/tools/sdk/esp32/include/idf_test/include/esp32s3/idf_performance_target.h
index b744cda8fa0..d735bb27023 100644
--- a/tools/sdk/esp32/include/idf_test/include/esp32s3/idf_performance_target.h
+++ b/tools/sdk/esp32/include/idf_test/include/esp32s3/idf_performance_target.h
@@ -24,82 +24,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
 
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- *
- * Currently all performance data on S3 are set to 0 for now. Update to a proper value later.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  0
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32/include/json_generator/json_generator.h b/tools/sdk/esp32/include/json_generator/upstream/json_generator.h
old mode 100755
new mode 100644
similarity index 90%
rename from tools/sdk/esp32/include/json_generator/json_generator.h
rename to tools/sdk/esp32/include/json_generator/upstream/json_generator.h
index 2dc527d0e95..e3aa92eeecf
--- a/tools/sdk/esp32/include/json_generator/json_generator.h
+++ b/tools/sdk/esp32/include/json_generator/upstream/json_generator.h
@@ -1,11 +1,26 @@
-/** \file json_gen_generator.h
- * \brief JSON String Generator
+/*
+ *    Copyright 2020 Piyush Shah <shahpiyushv@gmail.com>
+ *
+ *   Licensed under the Apache License, Version 2.0 (the "License");
+ *   you may not use this file except in compliance with the License.
+ *   You may obtain a copy of the License at
+ *
+ *       http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *   Unless required by applicable law or agreed to in writing, software
+ *   distributed under the License is distributed on an "AS IS" BASIS,
+ *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *   See the License for the specific language governing permissions and
+ *   limitations under the License.
+ */
+
+/*
+ * JSON String Generator
  *
  * This module can be used to create JSON strings with a facility
  * to flush out data if the destination buffer is full. All commas
  * and colons as required are automatically added by the APIs
  *
- * Code taken from: https://github.com/shahpiyushv/json_gen_generator
  */
 #ifndef _JSON_GENERATOR_H
 #define _JSON_GENERATOR_H
@@ -18,7 +33,10 @@ extern "C"
 {
 #endif
 
+/** Float precision i.e. number of digits after decimal point */
+#ifndef JSON_FLOAT_PRECISION
 #define JSON_FLOAT_PRECISION 5
+#endif
 
 /** JSON string flush callback prototype
  *
@@ -38,12 +56,20 @@ typedef void (*json_gen_flush_cb_t) (char *buf, void *priv);
  * Just define this structure and pass a pointer to it in the APIs below
  */
 typedef struct {
+    /** Pointer to the JSON buffer provided by the calling function */
 	char *buf;
+    /** Size of the above buffer */
 	int buf_size;
+    /** (Optional) callback function to invoke when the buffer gets full */
 	json_gen_flush_cb_t flush_cb;
+    /** (Optional) Private data to pass to the callback function */
 	void *priv;
+    /** (For Internal use only) */
 	bool comma_req;
+    /** (For Internal use only) */
 	char *free_ptr;
+    /** Total length */
+    int total_len;
 } json_gen_str_t;
 
 /** Start a JSON String
@@ -58,11 +84,11 @@ typedef struct {
  * \param[out] buf Pointer to an allocated buffer into which the JSON
  * string will be written
  * \param[in] buf_size Size of the buffer
- * \param[in] Pointer to the flushing function of type \ref json_gen_flush_cb_t
+ * \param[in] flush_cb Pointer to the flushing function of type \ref json_gen_flush_cb_t
  * which will be invoked either when the buffer is full or when json_gen_str_end()
  * is invoked. Can be left NULL.
  * \param[in] priv Private data to be passed to the flushing function callback.
- * Can be something like a session identifier (Eg. socket). Can be left NULL
+ * Can be something like a session identifier (Eg. socket). Can be left NULL.
  */
 void json_gen_str_start(json_gen_str_t *jstr, char *buf, int buf_size,
 		json_gen_flush_cb_t flush_cb, void *priv);
@@ -72,16 +98,18 @@ void json_gen_str_start(json_gen_str_t *jstr, char *buf, int buf_size,
  * This should be the last function to be called after the entire JSON string
  * has been generated.
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
+ *
+ * \return Total length of the JSON created, including the NULL termination byte.
  */
-void json_gen_str_end(json_gen_str_t *jstr);
+int json_gen_str_end(json_gen_str_t *jstr);
 
 /** Start a JSON object
  *
  * This starts a JSON object by adding a '{'
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  *
  * \return 0 on Success
@@ -95,7 +123,7 @@ int json_gen_start_object(json_gen_str_t *jstr);
  *
  * This ends a JSON object by adding a '}'
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  *
  * \return 0 on Success
@@ -109,7 +137,7 @@ int json_gen_end_object(json_gen_str_t *jstr);
  *
  * This starts a JSON object by adding a '['
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  *
  * \return 0 on Success
@@ -123,7 +151,7 @@ int json_gen_start_array(json_gen_str_t *jstr);
  *
  * This ends a JSON object by adding a ']'
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  *
  * \return 0 on Success
@@ -137,7 +165,7 @@ int json_gen_end_array(json_gen_str_t *jstr);
  *
  * This adds a JSON object like "name":{
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] name Name of the object
  *
@@ -153,7 +181,7 @@ int json_gen_push_object(json_gen_str_t *jstr, char *name);
  * This ends a JSON object by adding a '}'. This is basically same as
  * json_gen_end_object() but included so as to complement json_gen_push_object()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  *
  * \return 0 on Success
@@ -170,7 +198,7 @@ int json_gen_pop_object(json_gen_str_t *jstr);
  * Eg. json_gen_push_object_str(jstr, "pre-formatted", "{\"a\":1,\"b\":2}");
  * This will add "pre-formatted":{"a":1,"b":2}
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] name Name of the JSON object string
  * \param[in] object_str The pre-formatted JSON object string
@@ -186,7 +214,7 @@ int json_gen_push_object_str(json_gen_str_t *jstr, char *name, char *object_str)
  *
  * This adds a JSON array like "name":[
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] name Name of the array
  *
@@ -202,7 +230,7 @@ int json_gen_push_array(json_gen_str_t *jstr, char *name);
  * This ends a JSON array by adding a ']'. This is basically same as
  * json_gen_end_array() but included so as to complement json_gen_push_array()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  *
  * \return 0 on Success
@@ -219,7 +247,7 @@ int json_gen_pop_array(json_gen_str_t *jstr);
  * Eg. json_gen_push_object_str(jstr, "pre-formatted", "[1,2,3]");
  * This will add "pre-formatted":[1,2,3]
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] name Name of the JSON array string
  * \param[in] array_str The pre-formatted JSON array string
@@ -238,7 +266,7 @@ int json_gen_push_array_str(json_gen_str_t *jstr, char *name, char *array_str);
  * \note This must be called between json_gen_start_object()/json_gen_push_object()
  * and json_gen_end_object()/json_gen_pop_object()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] name Name of the element
  * \param[in] val Boolean value of the element
@@ -257,7 +285,7 @@ int json_gen_obj_set_bool(json_gen_str_t *jstr, char *name, bool val);
  * \note This must be called between json_gen_start_object()/json_gen_push_object()
  * and json_gen_end_object()/json_gen_pop_object()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] name Name of the element
  * \param[in] val Integer value of the element
@@ -276,7 +304,7 @@ int json_gen_obj_set_int(json_gen_str_t *jstr, char *name, int val);
  * \note This must be called between json_gen_start_object()/json_gen_push_object()
  * and json_gen_end_object()/json_gen_pop_object()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] name Name of the element
  * \param[in] val Float value of the element
@@ -295,7 +323,7 @@ int json_gen_obj_set_float(json_gen_str_t *jstr, char *name, float val);
  * \note This must be called between json_gen_start_object()/json_gen_push_object()
  * and json_gen_end_object()/json_gen_pop_object()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] name Name of the element
  * \param[in] val Null terminated string value of the element
@@ -314,7 +342,7 @@ int json_gen_obj_set_string(json_gen_str_t *jstr, char *name, char *val);
  * \note This must be called between json_gen_start_object()/json_gen_push_object()
  * and json_gen_end_object()/json_gen_pop_object()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] name Name of the element
  *
@@ -330,7 +358,7 @@ int json_gen_obj_set_null(json_gen_str_t *jstr, char *name);
  * \note This must be called between json_gen_start_array()/json_gen_push_array()
  * and json_gen_end_array()/json_gen_pop_array()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] val Boolean value of the element
  *
@@ -346,7 +374,7 @@ int json_gen_arr_set_bool(json_gen_str_t *jstr, bool val);
  * \note This must be called between json_gen_start_array()/json_gen_push_array()
  * and json_gen_end_array()/json_gen_pop_array()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] val Integer value of the element
  *
@@ -362,7 +390,7 @@ int json_gen_arr_set_int(json_gen_str_t *jstr, int val);
  * \note This must be called between json_gen_start_array()/json_gen_push_array()
  * and json_gen_end_array()/json_gen_pop_array()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] val Float value of the element
  *
@@ -378,7 +406,7 @@ int json_gen_arr_set_float(json_gen_str_t *jstr, float val);
  * \note This must be called between json_gen_start_array()/json_gen_push_array()
  * and json_gen_end_array()/json_gen_pop_array()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] val Null terminated string value of the element
  *
@@ -394,7 +422,7 @@ int json_gen_arr_set_string(json_gen_str_t *jstr, char *val);
  * \note This must be called between json_gen_start_array()/json_gen_push_array()
  * and json_gen_end_array()/json_gen_pop_array()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  *
  * \return 0 on Success
@@ -414,7 +442,7 @@ int json_gen_arr_set_null(json_gen_str_t *jstr);
  * \note This must be called between json_gen_start_object()/json_gen_push_object()
  * and json_gen_end_object()/json_gen_pop_object()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] name Name of the element
  * \param[in] val Null terminated initial part of the string value. It can also be NULL
@@ -436,7 +464,7 @@ int json_gen_obj_start_long_string(json_gen_str_t *jstr, char *name, char *val);
  * \note This must be called between json_gen_start_array()/json_gen_push_array()
  * and json_gen_end_array()/json_gen_pop_array()
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
  * json_gen_str_start()
  * \param[in] val Null terminated initial part of the string value. It can also be NULL
  *
@@ -453,7 +481,7 @@ int json_gen_arr_start_long_string(json_gen_str_t *jstr, char *val);
  * json_gen_arr_start_long_string(). After the entire string is created, it should be terminated
  * with json_gen_end_long_string().
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by json_gen_str_start()
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by json_gen_str_start()
  * \param[in] val Null terminated extending part of the string value.
  *
  * \return 0 on Success
@@ -468,7 +496,7 @@ int json_gen_add_to_long_string(json_gen_str_t *jstr, char *val);
  * This ends the string initialised by json_gen_obj_start_long_string() or
  * json_gen_arr_start_long_string() by adding the ending quotes.
  *
- * \param[in] jstr Pointer to the \ref json_gen_str_t structure initilised by json_gen_str_start()
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by json_gen_str_start()
  *
  *
  * \return 0 on Success
@@ -477,9 +505,7 @@ int json_gen_add_to_long_string(json_gen_str_t *jstr, char *val);
  * added after that
  */
 int json_gen_end_long_string(json_gen_str_t *jstr);
-
 #ifdef __cplusplus
 }
 #endif
-
 #endif
diff --git a/tools/sdk/esp32/include/json_parser/json_parser.h b/tools/sdk/esp32/include/json_parser/upstream/include/json_parser.h
old mode 100755
new mode 100644
similarity index 73%
rename from tools/sdk/esp32/include/json_parser/json_parser.h
rename to tools/sdk/esp32/include/json_parser/upstream/include/json_parser.h
index 7233caa3f3e..3e982fe14eb
--- a/tools/sdk/esp32/include/json_parser/json_parser.h
+++ b/tools/sdk/esp32/include/json_parser/upstream/include/json_parser.h
@@ -1,8 +1,23 @@
-/* Code taken from: https://github.com/shahpiyushv/json_parser */
+/*
+ *    Copyright 2020 Piyush Shah <shahpiyushv@gmail.com>
+ *
+ *   Licensed under the Apache License, Version 2.0 (the "License");
+ *   you may not use this file except in compliance with the License.
+ *   You may obtain a copy of the License at
+ *
+ *       http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *   Unless required by applicable law or agreed to in writing, software
+ *   distributed under the License is distributed on an "AS IS" BASIS,
+ *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *   See the License for the specific language governing permissions and
+ *   limitations under the License.
+ */
 #ifndef _JSON_PARSER_H_
 #define _JSON_PARSER_H_
 
-#include <jsmn-changed.h>
+#define JSMN_HEADER
+#include <jsmn/jsmn.h>
 #include <stdint.h>
 #include <stdbool.h>
 
@@ -14,8 +29,8 @@ extern "C"
 #define OS_SUCCESS  0
 #define OS_FAIL     -1
 
-typedef _jsmn_parser json_parser_t;
-typedef _jsmntok_t json_tok_t;
+typedef jsmn_parser json_parser_t;
+typedef jsmntok_t json_tok_t;
 
 typedef struct {
 	json_parser_t parser;
diff --git a/tools/sdk/esp32/include/json_parser/upstream/jsmn/jsmn.h b/tools/sdk/esp32/include/json_parser/upstream/jsmn/jsmn.h
new file mode 100644
index 00000000000..3178dcc977f
--- /dev/null
+++ b/tools/sdk/esp32/include/json_parser/upstream/jsmn/jsmn.h
@@ -0,0 +1,471 @@
+/*
+ * MIT License
+ *
+ * Copyright (c) 2010 Serge Zaitsev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef JSMN_H
+#define JSMN_H
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef JSMN_STATIC
+#define JSMN_API static
+#else
+#define JSMN_API extern
+#endif
+
+/**
+ * JSON type identifier. Basic types are:
+ * 	o Object
+ * 	o Array
+ * 	o String
+ * 	o Other primitive: number, boolean (true/false) or null
+ */
+typedef enum {
+  JSMN_UNDEFINED = 0,
+  JSMN_OBJECT = 1,
+  JSMN_ARRAY = 2,
+  JSMN_STRING = 3,
+  JSMN_PRIMITIVE = 4
+} jsmntype_t;
+
+enum jsmnerr {
+  /* Not enough tokens were provided */
+  JSMN_ERROR_NOMEM = -1,
+  /* Invalid character inside JSON string */
+  JSMN_ERROR_INVAL = -2,
+  /* The string is not a full JSON packet, more bytes expected */
+  JSMN_ERROR_PART = -3
+};
+
+/**
+ * JSON token description.
+ * type		type (object, array, string etc.)
+ * start	start position in JSON data string
+ * end		end position in JSON data string
+ */
+typedef struct jsmntok {
+  jsmntype_t type;
+  int start;
+  int end;
+  int size;
+#ifdef JSMN_PARENT_LINKS
+  int parent;
+#endif
+} jsmntok_t;
+
+/**
+ * JSON parser. Contains an array of token blocks available. Also stores
+ * the string being parsed now and current position in that string.
+ */
+typedef struct jsmn_parser {
+  unsigned int pos;     /* offset in the JSON string */
+  unsigned int toknext; /* next token to allocate */
+  int toksuper;         /* superior token node, e.g. parent object or array */
+} jsmn_parser;
+
+/**
+ * Create JSON parser over an array of tokens
+ */
+JSMN_API void jsmn_init(jsmn_parser *parser);
+
+/**
+ * Run JSON parser. It parses a JSON data string into and array of tokens, each
+ * describing
+ * a single JSON object.
+ */
+JSMN_API int jsmn_parse(jsmn_parser *parser, const char *js, const size_t len,
+                        jsmntok_t *tokens, const unsigned int num_tokens);
+
+#ifndef JSMN_HEADER
+/**
+ * Allocates a fresh unused token from the token pool.
+ */
+static jsmntok_t *jsmn_alloc_token(jsmn_parser *parser, jsmntok_t *tokens,
+                                   const size_t num_tokens) {
+  jsmntok_t *tok;
+  if (parser->toknext >= num_tokens) {
+    return NULL;
+  }
+  tok = &tokens[parser->toknext++];
+  tok->start = tok->end = -1;
+  tok->size = 0;
+#ifdef JSMN_PARENT_LINKS
+  tok->parent = -1;
+#endif
+  return tok;
+}
+
+/**
+ * Fills token type and boundaries.
+ */
+static void jsmn_fill_token(jsmntok_t *token, const jsmntype_t type,
+                            const int start, const int end) {
+  token->type = type;
+  token->start = start;
+  token->end = end;
+  token->size = 0;
+}
+
+/**
+ * Fills next available token with JSON primitive.
+ */
+static int jsmn_parse_primitive(jsmn_parser *parser, const char *js,
+                                const size_t len, jsmntok_t *tokens,
+                                const size_t num_tokens) {
+  jsmntok_t *token;
+  int start;
+
+  start = parser->pos;
+
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    switch (js[parser->pos]) {
+#ifndef JSMN_STRICT
+    /* In strict mode primitive must be followed by "," or "}" or "]" */
+    case ':':
+#endif
+    case '\t':
+    case '\r':
+    case '\n':
+    case ' ':
+    case ',':
+    case ']':
+    case '}':
+      goto found;
+    default:
+                   /* to quiet a warning from gcc*/
+      break;
+    }
+    if (js[parser->pos] < 32 || js[parser->pos] >= 127) {
+      parser->pos = start;
+      return JSMN_ERROR_INVAL;
+    }
+  }
+#ifdef JSMN_STRICT
+  /* In strict mode primitive must be followed by a comma/object/array */
+  parser->pos = start;
+  return JSMN_ERROR_PART;
+#endif
+
+found:
+  if (tokens == NULL) {
+    parser->pos--;
+    return 0;
+  }
+  token = jsmn_alloc_token(parser, tokens, num_tokens);
+  if (token == NULL) {
+    parser->pos = start;
+    return JSMN_ERROR_NOMEM;
+  }
+  jsmn_fill_token(token, JSMN_PRIMITIVE, start, parser->pos);
+#ifdef JSMN_PARENT_LINKS
+  token->parent = parser->toksuper;
+#endif
+  parser->pos--;
+  return 0;
+}
+
+/**
+ * Fills next token with JSON string.
+ */
+static int jsmn_parse_string(jsmn_parser *parser, const char *js,
+                             const size_t len, jsmntok_t *tokens,
+                             const size_t num_tokens) {
+  jsmntok_t *token;
+
+  int start = parser->pos;
+
+  parser->pos++;
+
+  /* Skip starting quote */
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    char c = js[parser->pos];
+
+    /* Quote: end of string */
+    if (c == '\"') {
+      if (tokens == NULL) {
+        return 0;
+      }
+      token = jsmn_alloc_token(parser, tokens, num_tokens);
+      if (token == NULL) {
+        parser->pos = start;
+        return JSMN_ERROR_NOMEM;
+      }
+      jsmn_fill_token(token, JSMN_STRING, start + 1, parser->pos);
+#ifdef JSMN_PARENT_LINKS
+      token->parent = parser->toksuper;
+#endif
+      return 0;
+    }
+
+    /* Backslash: Quoted symbol expected */
+    if (c == '\\' && parser->pos + 1 < len) {
+      int i;
+      parser->pos++;
+      switch (js[parser->pos]) {
+      /* Allowed escaped symbols */
+      case '\"':
+      case '/':
+      case '\\':
+      case 'b':
+      case 'f':
+      case 'r':
+      case 'n':
+      case 't':
+        break;
+      /* Allows escaped symbol \uXXXX */
+      case 'u':
+        parser->pos++;
+        for (i = 0; i < 4 && parser->pos < len && js[parser->pos] != '\0';
+             i++) {
+          /* If it isn't a hex character we have an error */
+          if (!((js[parser->pos] >= 48 && js[parser->pos] <= 57) ||   /* 0-9 */
+                (js[parser->pos] >= 65 && js[parser->pos] <= 70) ||   /* A-F */
+                (js[parser->pos] >= 97 && js[parser->pos] <= 102))) { /* a-f */
+            parser->pos = start;
+            return JSMN_ERROR_INVAL;
+          }
+          parser->pos++;
+        }
+        parser->pos--;
+        break;
+      /* Unexpected symbol */
+      default:
+        parser->pos = start;
+        return JSMN_ERROR_INVAL;
+      }
+    }
+  }
+  parser->pos = start;
+  return JSMN_ERROR_PART;
+}
+
+/**
+ * Parse JSON string and fill tokens.
+ */
+JSMN_API int jsmn_parse(jsmn_parser *parser, const char *js, const size_t len,
+                        jsmntok_t *tokens, const unsigned int num_tokens) {
+  int r;
+  int i;
+  jsmntok_t *token;
+  int count = parser->toknext;
+
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    char c;
+    jsmntype_t type;
+
+    c = js[parser->pos];
+    switch (c) {
+    case '{':
+    case '[':
+      count++;
+      if (tokens == NULL) {
+        break;
+      }
+      token = jsmn_alloc_token(parser, tokens, num_tokens);
+      if (token == NULL) {
+        return JSMN_ERROR_NOMEM;
+      }
+      if (parser->toksuper != -1) {
+        jsmntok_t *t = &tokens[parser->toksuper];
+#ifdef JSMN_STRICT
+        /* In strict mode an object or array can't become a key */
+        if (t->type == JSMN_OBJECT) {
+          return JSMN_ERROR_INVAL;
+        }
+#endif
+        t->size++;
+#ifdef JSMN_PARENT_LINKS
+        token->parent = parser->toksuper;
+#endif
+      }
+      token->type = (c == '{' ? JSMN_OBJECT : JSMN_ARRAY);
+      token->start = parser->pos;
+      parser->toksuper = parser->toknext - 1;
+      break;
+    case '}':
+    case ']':
+      if (tokens == NULL) {
+        break;
+      }
+      type = (c == '}' ? JSMN_OBJECT : JSMN_ARRAY);
+#ifdef JSMN_PARENT_LINKS
+      if (parser->toknext < 1) {
+        return JSMN_ERROR_INVAL;
+      }
+      token = &tokens[parser->toknext - 1];
+      for (;;) {
+        if (token->start != -1 && token->end == -1) {
+          if (token->type != type) {
+            return JSMN_ERROR_INVAL;
+          }
+          token->end = parser->pos + 1;
+          parser->toksuper = token->parent;
+          break;
+        }
+        if (token->parent == -1) {
+          if (token->type != type || parser->toksuper == -1) {
+            return JSMN_ERROR_INVAL;
+          }
+          break;
+        }
+        token = &tokens[token->parent];
+      }
+#else
+      for (i = parser->toknext - 1; i >= 0; i--) {
+        token = &tokens[i];
+        if (token->start != -1 && token->end == -1) {
+          if (token->type != type) {
+            return JSMN_ERROR_INVAL;
+          }
+          parser->toksuper = -1;
+          token->end = parser->pos + 1;
+          break;
+        }
+      }
+      /* Error if unmatched closing bracket */
+      if (i == -1) {
+        return JSMN_ERROR_INVAL;
+      }
+      for (; i >= 0; i--) {
+        token = &tokens[i];
+        if (token->start != -1 && token->end == -1) {
+          parser->toksuper = i;
+          break;
+        }
+      }
+#endif
+      break;
+    case '\"':
+      r = jsmn_parse_string(parser, js, len, tokens, num_tokens);
+      if (r < 0) {
+        return r;
+      }
+      count++;
+      if (parser->toksuper != -1 && tokens != NULL) {
+        tokens[parser->toksuper].size++;
+      }
+      break;
+    case '\t':
+    case '\r':
+    case '\n':
+    case ' ':
+      break;
+    case ':':
+      parser->toksuper = parser->toknext - 1;
+      break;
+    case ',':
+      if (tokens != NULL && parser->toksuper != -1 &&
+          tokens[parser->toksuper].type != JSMN_ARRAY &&
+          tokens[parser->toksuper].type != JSMN_OBJECT) {
+#ifdef JSMN_PARENT_LINKS
+        parser->toksuper = tokens[parser->toksuper].parent;
+#else
+        for (i = parser->toknext - 1; i >= 0; i--) {
+          if (tokens[i].type == JSMN_ARRAY || tokens[i].type == JSMN_OBJECT) {
+            if (tokens[i].start != -1 && tokens[i].end == -1) {
+              parser->toksuper = i;
+              break;
+            }
+          }
+        }
+#endif
+      }
+      break;
+#ifdef JSMN_STRICT
+    /* In strict mode primitives are: numbers and booleans */
+    case '-':
+    case '0':
+    case '1':
+    case '2':
+    case '3':
+    case '4':
+    case '5':
+    case '6':
+    case '7':
+    case '8':
+    case '9':
+    case 't':
+    case 'f':
+    case 'n':
+      /* And they must not be keys of the object */
+      if (tokens != NULL && parser->toksuper != -1) {
+        const jsmntok_t *t = &tokens[parser->toksuper];
+        if (t->type == JSMN_OBJECT ||
+            (t->type == JSMN_STRING && t->size != 0)) {
+          return JSMN_ERROR_INVAL;
+        }
+      }
+#else
+    /* In non-strict mode every unquoted value is a primitive */
+    default:
+#endif
+      r = jsmn_parse_primitive(parser, js, len, tokens, num_tokens);
+      if (r < 0) {
+        return r;
+      }
+      count++;
+      if (parser->toksuper != -1 && tokens != NULL) {
+        tokens[parser->toksuper].size++;
+      }
+      break;
+
+#ifdef JSMN_STRICT
+    /* Unexpected char in strict mode */
+    default:
+      return JSMN_ERROR_INVAL;
+#endif
+    }
+  }
+
+  if (tokens != NULL) {
+    for (i = parser->toknext - 1; i >= 0; i--) {
+      /* Unmatched opened object or array */
+      if (tokens[i].start != -1 && tokens[i].end == -1) {
+        return JSMN_ERROR_PART;
+      }
+    }
+  }
+
+  return count;
+}
+
+/**
+ * Creates a new parser based over a given buffer with an array of tokens
+ * available.
+ */
+JSMN_API void jsmn_init(jsmn_parser *parser) {
+  parser->pos = 0;
+  parser->toknext = 0;
+  parser->toksuper = -1;
+}
+
+#endif /* JSMN_HEADER */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* JSMN_H */
diff --git a/tools/sdk/esp32/include/json_parser/upstream/jsmn/test/test.h b/tools/sdk/esp32/include/json_parser/upstream/jsmn/test/test.h
new file mode 100644
index 00000000000..a1c0957a74a
--- /dev/null
+++ b/tools/sdk/esp32/include/json_parser/upstream/jsmn/test/test.h
@@ -0,0 +1,31 @@
+#ifndef __TEST_H__
+#define __TEST_H__
+
+static int test_passed = 0;
+static int test_failed = 0;
+
+/* Terminate current test with error */
+#define fail() return __LINE__
+
+/* Successful end of the test case */
+#define done() return 0
+
+/* Check single condition */
+#define check(cond)                                                            \
+  do {                                                                         \
+    if (!(cond))                                                               \
+      fail();                                                                  \
+  } while (0)
+
+/* Test runner */
+static void test(int (*func)(void), const char *name) {
+  int r = func();
+  if (r == 0) {
+    test_passed++;
+  } else {
+    test_failed++;
+    printf("FAILED: %s (at line %d)\n", name, r);
+  }
+}
+
+#endif /* __TEST_H__ */
diff --git a/tools/sdk/esp32/include/json_parser/upstream/jsmn/test/testutil.h b/tools/sdk/esp32/include/json_parser/upstream/jsmn/test/testutil.h
new file mode 100644
index 00000000000..bdee13934b1
--- /dev/null
+++ b/tools/sdk/esp32/include/json_parser/upstream/jsmn/test/testutil.h
@@ -0,0 +1,96 @@
+#ifndef __TEST_UTIL_H__
+#define __TEST_UTIL_H__
+
+#include "../jsmn.h"
+
+static int vtokeq(const char *s, jsmntok_t *t, unsigned long numtok,
+                  va_list ap) {
+  if (numtok > 0) {
+    unsigned long i;
+    int start, end, size;
+    jsmntype_t type;
+    char *value;
+
+    size = -1;
+    value = NULL;
+    for (i = 0; i < numtok; i++) {
+      type = va_arg(ap, jsmntype_t);
+      if (type == JSMN_STRING) {
+        value = va_arg(ap, char *);
+        size = va_arg(ap, int);
+        start = end = -1;
+      } else if (type == JSMN_PRIMITIVE) {
+        value = va_arg(ap, char *);
+        start = end = size = -1;
+      } else {
+        start = va_arg(ap, int);
+        end = va_arg(ap, int);
+        size = va_arg(ap, int);
+        value = NULL;
+      }
+      if (t[i].type != type) {
+        printf("token %lu type is %d, not %d\n", i, t[i].type, type);
+        return 0;
+      }
+      if (start != -1 && end != -1) {
+        if (t[i].start != start) {
+          printf("token %lu start is %d, not %d\n", i, t[i].start, start);
+          return 0;
+        }
+        if (t[i].end != end) {
+          printf("token %lu end is %d, not %d\n", i, t[i].end, end);
+          return 0;
+        }
+      }
+      if (size != -1 && t[i].size != size) {
+        printf("token %lu size is %d, not %d\n", i, t[i].size, size);
+        return 0;
+      }
+
+      if (s != NULL && value != NULL) {
+        const char *p = s + t[i].start;
+        if (strlen(value) != (unsigned long)(t[i].end - t[i].start) ||
+            strncmp(p, value, t[i].end - t[i].start) != 0) {
+          printf("token %lu value is %.*s, not %s\n", i, t[i].end - t[i].start,
+                 s + t[i].start, value);
+          return 0;
+        }
+      }
+    }
+  }
+  return 1;
+}
+
+static int tokeq(const char *s, jsmntok_t *tokens, unsigned long numtok, ...) {
+  int ok;
+  va_list args;
+  va_start(args, numtok);
+  ok = vtokeq(s, tokens, numtok, args);
+  va_end(args);
+  return ok;
+}
+
+static int parse(const char *s, int status, unsigned long numtok, ...) {
+  int r;
+  int ok = 1;
+  va_list args;
+  jsmn_parser p;
+  jsmntok_t *t = malloc(numtok * sizeof(jsmntok_t));
+
+  jsmn_init(&p);
+  r = jsmn_parse(&p, s, strlen(s), t, numtok);
+  if (r != status) {
+    printf("status is %d, not %d\n", r, status);
+    return 0;
+  }
+
+  if (status >= 0) {
+    va_start(args, numtok);
+    ok = vtokeq(s, t, numtok, args);
+    va_end(args);
+  }
+  free(t);
+  return ok;
+}
+
+#endif /* __TEST_UTIL_H__ */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aes.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aes.h
index 4468b6623ac..e280dbb1c66 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aes.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aes.h
@@ -22,13 +22,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -41,37 +35,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_AES_H
 #define MBEDTLS_AES_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
+#include "mbedtls/platform_util.h"
 
 #include <stddef.h>
 #include <stdint.h>
@@ -81,17 +55,22 @@
 #define MBEDTLS_AES_DECRYPT     0 /**< AES decryption. */
 
 /* Error codes in range 0x0020-0x0022 */
-#define MBEDTLS_ERR_AES_INVALID_KEY_LENGTH                -0x0020  /**< Invalid key length. */
-#define MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH              -0x0022  /**< Invalid data input length. */
+/** Invalid key length. */
+#define MBEDTLS_ERR_AES_INVALID_KEY_LENGTH                -0x0020
+/** Invalid data input length. */
+#define MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH              -0x0022
 
 /* Error codes in range 0x0021-0x0025 */
-#define MBEDTLS_ERR_AES_BAD_INPUT_DATA                    -0x0021  /**< Invalid input data. */
+/** Invalid input data. */
+#define MBEDTLS_ERR_AES_BAD_INPUT_DATA                    -0x0021
 
 /* MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE is deprecated and should not be used. */
-#define MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE               -0x0023  /**< Feature not available. For example, an unsupported AES key size. */
+/** Feature not available. For example, an unsupported AES key size. */
+#define MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE               -0x0023
 
 /* MBEDTLS_ERR_AES_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_AES_HW_ACCEL_FAILED                   -0x0025  /**< AES hardware accelerator failed. */
+/** AES hardware accelerator failed. */
+#define MBEDTLS_ERR_AES_HW_ACCEL_FAILED                   -0x0025
 
 #if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
     !defined(inline) && !defined(__cplusplus)
@@ -196,6 +175,7 @@ void mbedtls_aes_xts_free( mbedtls_aes_xts_context *ctx );
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key,
                     unsigned int keybits );
 
@@ -214,6 +194,7 @@ int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key,
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key,
                     unsigned int keybits );
 
@@ -234,6 +215,7 @@ int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key,
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_xts_setkey_enc( mbedtls_aes_xts_context *ctx,
                                 const unsigned char *key,
                                 unsigned int keybits );
@@ -254,6 +236,7 @@ int mbedtls_aes_xts_setkey_enc( mbedtls_aes_xts_context *ctx,
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_xts_setkey_dec( mbedtls_aes_xts_context *ctx,
                                 const unsigned char *key,
                                 unsigned int keybits );
@@ -282,6 +265,7 @@ int mbedtls_aes_xts_setkey_dec( mbedtls_aes_xts_context *ctx,
 
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx,
                     int mode,
                     const unsigned char input[16],
@@ -329,6 +313,7 @@ int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx,
  * \return         #MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH
  *                 on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
                     int mode,
                     size_t length,
@@ -373,6 +358,7 @@ int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
  *                     smaller than an AES block in size (16 Bytes) or if \p
  *                     length is larger than 2^20 blocks (16 MiB).
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx,
                            int mode,
                            size_t length,
@@ -421,6 +407,7 @@ int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx,
  *
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx,
                        int mode,
                        size_t length,
@@ -465,6 +452,7 @@ int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx,
  *
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx,
                     int mode,
                     size_t length,
@@ -519,6 +507,7 @@ int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx,
  *
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx,
                        size_t length,
                        size_t *iv_off,
@@ -533,10 +522,6 @@ int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx,
  * \brief      This function performs an AES-CTR encryption or decryption
  *             operation.
  *
- *             This function performs the operation defined in the \p mode
- *             parameter (encrypt/decrypt), on the input data buffer
- *             defined in the \p input parameter.
- *
  *             Due to the nature of CTR, you must use the same key schedule
  *             for both encryption and decryption operations. Therefore, you
  *             must use the context initialized with mbedtls_aes_setkey_enc()
@@ -605,6 +590,7 @@ int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx,
  *
  * \return                 \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx,
                        size_t length,
                        size_t *nc_off,
@@ -625,6 +611,7 @@ int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx,
  *
  * \return          \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx,
                                   const unsigned char input[16],
                                   unsigned char output[16] );
@@ -640,6 +627,7 @@ int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx,
  *
  * \return          \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_internal_aes_decrypt( mbedtls_aes_context *ctx,
                                   const unsigned char input[16],
                                   unsigned char output[16] );
@@ -689,6 +677,7 @@ MBEDTLS_DEPRECATED void mbedtls_aes_decrypt( mbedtls_aes_context *ctx,
  * \return         \c 0 on success.
  * \return         \c 1 on failure.
  */
+MBEDTLS_CHECK_RETURN_CRITICAL
 int mbedtls_aes_self_test( int verbose );
 
 #endif /* MBEDTLS_SELF_TEST */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aesni.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aesni.h
index 9b63a0010a0..c1d22f59af3 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aesni.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aesni.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,38 +21,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_AESNI_H
 #define MBEDTLS_AESNI_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "aes.h"
+#include "mbedtls/aes.h"
 
 #define MBEDTLS_AESNI_AES      0x02000000u
 #define MBEDTLS_AESNI_CLMUL    0x00000002u
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/arc4.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/arc4.h
index 6334a9cc1e2..f4b0f9f3508 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/arc4.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/arc4.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,33 +22,12 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_ARC4_H
 #define MBEDTLS_ARC4_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -62,7 +35,8 @@
 #include <stddef.h>
 
 /* MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED                  -0x0019  /**< ARC4 hardware accelerator failed. */
+/** ARC4 hardware accelerator failed. */
+#define MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED                  -0x0019
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aria.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aria.h
index 20f43f2256d..226e2dbf3c8 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aria.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aria.h
@@ -11,13 +11,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -30,34 +24,13 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ARIA_H
 #define MBEDTLS_ARIA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -65,7 +38,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #define MBEDTLS_ARIA_ENCRYPT     1 /**< ARIA encryption. */
 #define MBEDTLS_ARIA_DECRYPT     0 /**< ARIA decryption. */
@@ -77,16 +50,20 @@
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
 #define MBEDTLS_ERR_ARIA_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x005C )
 #endif /* !MBEDTLS_DEPRECATED_REMOVED */
-#define MBEDTLS_ERR_ARIA_BAD_INPUT_DATA -0x005C /**< Bad input data. */
+/** Bad input data. */
+#define MBEDTLS_ERR_ARIA_BAD_INPUT_DATA -0x005C
 
-#define MBEDTLS_ERR_ARIA_INVALID_INPUT_LENGTH -0x005E /**< Invalid data input length. */
+/** Invalid data input length. */
+#define MBEDTLS_ERR_ARIA_INVALID_INPUT_LENGTH -0x005E
 
 /* MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE  -0x005A  /**< Feature not available. For example, an unsupported ARIA key size. */
+/** Feature not available. For example, an unsupported ARIA key size. */
+#define MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE  -0x005A
 
 /* MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED      -0x0058  /**< ARIA hardware accelerator failed. */
+/** ARIA hardware accelerator failed. */
+#define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED      -0x0058
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/asn1.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/asn1.h
index 0e596bca2cd..10f7905b7e6 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/asn1.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/asn1.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ASN1_H
 #define MBEDTLS_ASN1_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,7 +31,7 @@
 #include <stddef.h>
 
 #if defined(MBEDTLS_BIGNUM_C)
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 #endif
 
 /**
@@ -73,13 +46,20 @@
  * ASN1 is a standard to specify data structures.
  * \{
  */
-#define MBEDTLS_ERR_ASN1_OUT_OF_DATA                      -0x0060  /**< Out of data when parsing an ASN1 data structure. */
-#define MBEDTLS_ERR_ASN1_UNEXPECTED_TAG                   -0x0062  /**< ASN1 tag was of an unexpected value. */
-#define MBEDTLS_ERR_ASN1_INVALID_LENGTH                   -0x0064  /**< Error when trying to determine the length or invalid length. */
-#define MBEDTLS_ERR_ASN1_LENGTH_MISMATCH                  -0x0066  /**< Actual length differs from expected length. */
-#define MBEDTLS_ERR_ASN1_INVALID_DATA                     -0x0068  /**< Data is invalid. (not used) */
-#define MBEDTLS_ERR_ASN1_ALLOC_FAILED                     -0x006A  /**< Memory allocation failed */
-#define MBEDTLS_ERR_ASN1_BUF_TOO_SMALL                    -0x006C  /**< Buffer too small when writing ASN.1 data structure. */
+/** Out of data when parsing an ASN1 data structure. */
+#define MBEDTLS_ERR_ASN1_OUT_OF_DATA                      -0x0060
+/** ASN1 tag was of an unexpected value. */
+#define MBEDTLS_ERR_ASN1_UNEXPECTED_TAG                   -0x0062
+/** Error when trying to determine the length or invalid length. */
+#define MBEDTLS_ERR_ASN1_INVALID_LENGTH                   -0x0064
+/** Actual length differs from expected length. */
+#define MBEDTLS_ERR_ASN1_LENGTH_MISMATCH                  -0x0066
+/** Data is invalid. */
+#define MBEDTLS_ERR_ASN1_INVALID_DATA                     -0x0068
+/** Memory allocation failed */
+#define MBEDTLS_ERR_ASN1_ALLOC_FAILED                     -0x006A
+/** Buffer too small when writing ASN.1 data structure. */
+#define MBEDTLS_ERR_ASN1_BUF_TOO_SMALL                    -0x006C
 
 /* \} name */
 
@@ -100,6 +80,7 @@
 #define MBEDTLS_ASN1_OCTET_STRING            0x04
 #define MBEDTLS_ASN1_NULL                    0x05
 #define MBEDTLS_ASN1_OID                     0x06
+#define MBEDTLS_ASN1_ENUMERATED              0x0A
 #define MBEDTLS_ASN1_UTF8_STRING             0x0C
 #define MBEDTLS_ASN1_SEQUENCE                0x10
 #define MBEDTLS_ASN1_SET                     0x11
@@ -114,6 +95,18 @@
 #define MBEDTLS_ASN1_CONSTRUCTED             0x20
 #define MBEDTLS_ASN1_CONTEXT_SPECIFIC        0x80
 
+/* Slightly smaller way to check if tag is a string tag
+ * compared to canonical implementation. */
+#define MBEDTLS_ASN1_IS_STRING_TAG( tag )                                     \
+    ( ( tag ) < 32u && (                                                      \
+        ( ( 1u << ( tag ) ) & ( ( 1u << MBEDTLS_ASN1_BMP_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_UTF8_STRING )      |     \
+                                ( 1u << MBEDTLS_ASN1_T61_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_IA5_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_UNIVERSAL_STRING ) |     \
+                                ( 1u << MBEDTLS_ASN1_PRINTABLE_STRING ) |     \
+                                ( 1u << MBEDTLS_ASN1_BIT_STRING ) ) ) != 0 ) )
+
 /*
  * Bit masks for each of the components of an ASN.1 tag as specified in
  * ITU X.690 (08/2015), section 8.1 "General rules for encoding",
@@ -144,6 +137,10 @@
         ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf)->len ) ||                \
           memcmp( (oid_str), (oid_buf)->p, (oid_buf)->len) != 0 )
 
+#define MBEDTLS_OID_CMP_RAW(oid_str, oid_buf, oid_buf_len)              \
+        ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf_len) ) ||             \
+          memcmp( (oid_str), (oid_buf), (oid_buf_len) ) != 0 )
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -201,119 +198,342 @@ mbedtls_asn1_named_data;
  * \brief       Get the length of an ASN.1 element.
  *              Updates the pointer to immediately behind the length.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param len   The variable that will receive the value
- *
- * \return      0 if successful, MBEDTLS_ERR_ASN1_OUT_OF_DATA on reaching
- *              end of data, MBEDTLS_ERR_ASN1_INVALID_LENGTH if length is
- *              unparseable.
+ * \param p     On entry, \c *p points to the first byte of the length,
+ *              i.e. immediately after the tag.
+ *              On successful completion, \c *p points to the first byte
+ *              after the length, i.e. the first byte of the content.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On successful completion, \c *len contains the length
+ *              read from the ASN.1 input.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_OUT_OF_DATA if the ASN.1 element
+ *              would end beyond \p end.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the length is unparseable.
  */
 int mbedtls_asn1_get_len( unsigned char **p,
-                  const unsigned char *end,
-                  size_t *len );
+                          const unsigned char *end,
+                          size_t *len );
 
 /**
- * \brief       Get the tag and length of the tag. Check for the requested tag.
+ * \brief       Get the tag and length of the element.
+ *              Check for the requested tag.
  *              Updates the pointer to immediately behind the tag and length.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param len   The variable that will receive the length
- * \param tag   The expected tag
- *
- * \return      0 if successful, MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if tag did
- *              not match requested tag, or another specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              after the length, i.e. the first byte of the content.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On successful completion, \c *len contains the length
+ *              read from the ASN.1 input.
+ * \param tag   The expected tag.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the data does not start
+ *              with the requested tag.
+ * \return      #MBEDTLS_ERR_ASN1_OUT_OF_DATA if the ASN.1 element
+ *              would end beyond \p end.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the length is unparseable.
  */
 int mbedtls_asn1_get_tag( unsigned char **p,
-                  const unsigned char *end,
-                  size_t *len, int tag );
+                          const unsigned char *end,
+                          size_t *len, int tag );
 
 /**
  * \brief       Retrieve a boolean ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param val   The variable that will receive the value
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value (\c 0 or \c 1).
  *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BOOLEAN.
  */
 int mbedtls_asn1_get_bool( unsigned char **p,
-                   const unsigned char *end,
-                   int *val );
+                           const unsigned char *end,
+                           int *val );
 
 /**
  * \brief       Retrieve an integer ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param val   The variable that will receive the value
- *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 INTEGER.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
  */
 int mbedtls_asn1_get_int( unsigned char **p,
-                  const unsigned char *end,
-                  int *val );
+                          const unsigned char *end,
+                          int *val );
 
 /**
- * \brief       Retrieve a bitstring ASN.1 tag and its value.
+ * \brief       Retrieve an enumerated ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param bs    The variable that will receive the value
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 ENUMERATED.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
+ */
+int mbedtls_asn1_get_enum( unsigned char **p,
+                           const unsigned char *end,
+                           int *val );
+
+/**
+ * \brief       Retrieve a bitstring ASN.1 tag and its value.
+ *              Updates the pointer to immediately behind the full tag.
  *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p is equal to \p end.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param bs    On success, ::mbedtls_asn1_bitstring information about
+ *              the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input contains
+ *              extra data after a valid BIT STRING.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BIT STRING.
  */
 int mbedtls_asn1_get_bitstring( unsigned char **p, const unsigned char *end,
-                        mbedtls_asn1_bitstring *bs);
+                                mbedtls_asn1_bitstring *bs );
 
 /**
  * \brief       Retrieve a bitstring ASN.1 tag without unused bits and its
  *              value.
  *              Updates the pointer to the beginning of the bit/octet string.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param len   Length of the actual bit/octect string in bytes
- *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              of the content of the BIT STRING.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On success, \c *len is the length of the content in bytes.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_DATA if the input starts with
+ *              a valid BIT STRING with a nonzero number of unused bits.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BIT STRING.
  */
-int mbedtls_asn1_get_bitstring_null( unsigned char **p, const unsigned char *end,
-                             size_t *len );
+int mbedtls_asn1_get_bitstring_null( unsigned char **p,
+                                     const unsigned char *end,
+                                     size_t *len );
 
 /**
- * \brief       Parses and splits an ASN.1 "SEQUENCE OF <tag>"
- *              Updated the pointer to immediately behind the full sequence tag.
- *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param cur   First variable in the chain to fill
- * \param tag   Type of sequence
- *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \brief       Parses and splits an ASN.1 "SEQUENCE OF <tag>".
+ *              Updates the pointer to immediately behind the full sequence tag.
+ *
+ * This function allocates memory for the sequence elements. You can free
+ * the allocated memory with mbedtls_asn1_sequence_free().
+ *
+ * \note        On error, this function may return a partial list in \p cur.
+ *              You must set `cur->next = NULL` before calling this function!
+ *              Otherwise it is impossible to distinguish a previously non-null
+ *              pointer from a pointer to an object allocated by this function.
+ *
+ * \note        If the sequence is empty, this function does not modify
+ *              \c *cur. If the sequence is valid and non-empty, this
+ *              function sets `cur->buf.tag` to \p tag. This allows
+ *              callers to distinguish between an empty sequence and
+ *              a one-element sequence.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p is equal to \p end.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param cur   A ::mbedtls_asn1_sequence which this function fills.
+ *              When this function returns, \c *cur is the head of a linked
+ *              list. Each node in this list is allocated with
+ *              mbedtls_calloc() apart from \p cur itself, and should
+ *              therefore be freed with mbedtls_free().
+ *              The list describes the content of the sequence.
+ *              The head of the list (i.e. \c *cur itself) describes the
+ *              first element, `*cur->next` describes the second element, etc.
+ *              For each element, `buf.tag == tag`, `buf.len` is the length
+ *              of the content of the content of the element, and `buf.p`
+ *              points to the first byte of the content (i.e. immediately
+ *              past the length of the element).
+ *              Note that list elements may be allocated even on error.
+ * \param tag   Each element of the sequence must have this tag.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input contains
+ *              extra data after a valid SEQUENCE OF \p tag.
+ * \return      #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the input starts with
+ *              an ASN.1 SEQUENCE in which an element has a tag that
+ *              is different from \p tag.
+ * \return      #MBEDTLS_ERR_ASN1_ALLOC_FAILED if a memory allocation failed.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 SEQUENCE.
  */
 int mbedtls_asn1_get_sequence_of( unsigned char **p,
-                          const unsigned char *end,
-                          mbedtls_asn1_sequence *cur,
-                          int tag);
+                                  const unsigned char *end,
+                                  mbedtls_asn1_sequence *cur,
+                                  int tag );
+/**
+ * \brief          Free a heap-allocated linked list presentation of
+ *                 an ASN.1 sequence, including the first element.
+ *
+ * There are two common ways to manage the memory used for the representation
+ * of a parsed ASN.1 sequence:
+ * - Allocate a head node `mbedtls_asn1_sequence *head` with mbedtls_calloc().
+ *   Pass this node as the `cur` argument to mbedtls_asn1_get_sequence_of().
+ *   When you have finished processing the sequence,
+ *   call mbedtls_asn1_sequence_free() on `head`.
+ * - Allocate a head node `mbedtls_asn1_sequence *head` in any manner,
+ *   for example on the stack. Make sure that `head->next == NULL`.
+ *   Pass `head` as the `cur` argument to mbedtls_asn1_get_sequence_of().
+ *   When you have finished processing the sequence,
+ *   call mbedtls_asn1_sequence_free() on `head->cur`,
+ *   then free `head` itself in the appropriate manner.
+ *
+ * \param seq      The address of the first sequence component. This may
+ *                 be \c NULL, in which case this functions returns
+ *                 immediately.
+ */
+void mbedtls_asn1_sequence_free( mbedtls_asn1_sequence *seq );
+
+/**
+ * \brief                Traverse an ASN.1 SEQUENCE container and
+ *                       call a callback for each entry.
+ *
+ * This function checks that the input is a SEQUENCE of elements that
+ * each have a "must" tag, and calls a callback function on the elements
+ * that have a "may" tag.
+ *
+ * For example, to validate that the input is a SEQUENCE of `tag1` and call
+ * `cb` on each element, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0xff, tag1, 0, 0, cb, ctx);
+ * ```
+ *
+ * To validate that the input is a SEQUENCE of ANY and call `cb` on
+ * each element, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0, 0, 0, 0, cb, ctx);
+ * ```
+ *
+ * To validate that the input is a SEQUENCE of CHOICE {NULL, OCTET STRING}
+ * and call `cb` on each element that is an OCTET STRING, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0xfe, 0x04, 0xff, 0x04, cb, ctx);
+ * ```
+ *
+ * The callback is called on the elements with a "may" tag from left to
+ * right. If the input is not a valid SEQUENCE of elements with a "must" tag,
+ * the callback is called on the elements up to the leftmost point where
+ * the input is invalid.
+ *
+ * \warning              This function is still experimental and may change
+ *                       at any time.
+ *
+ * \param p              The address of the pointer to the beginning of
+ *                       the ASN.1 SEQUENCE header. This is updated to
+ *                       point to the end of the ASN.1 SEQUENCE container
+ *                       on a successful invocation.
+ * \param end            The end of the ASN.1 SEQUENCE container.
+ * \param tag_must_mask  A mask to be applied to the ASN.1 tags found within
+ *                       the SEQUENCE before comparing to \p tag_must_value.
+ * \param tag_must_val   The required value of each ASN.1 tag found in the
+ *                       SEQUENCE, after masking with \p tag_must_mask.
+ *                       Mismatching tags lead to an error.
+ *                       For example, a value of \c 0 for both \p tag_must_mask
+ *                       and \p tag_must_val means that every tag is allowed,
+ *                       while a value of \c 0xFF for \p tag_must_mask means
+ *                       that \p tag_must_val is the only allowed tag.
+ * \param tag_may_mask   A mask to be applied to the ASN.1 tags found within
+ *                       the SEQUENCE before comparing to \p tag_may_value.
+ * \param tag_may_val    The desired value of each ASN.1 tag found in the
+ *                       SEQUENCE, after masking with \p tag_may_mask.
+ *                       Mismatching tags will be silently ignored.
+ *                       For example, a value of \c 0 for \p tag_may_mask and
+ *                       \p tag_may_val means that any tag will be considered,
+ *                       while a value of \c 0xFF for \p tag_may_mask means
+ *                       that all tags with value different from \p tag_may_val
+ *                       will be ignored.
+ * \param cb             The callback to trigger for each component
+ *                       in the ASN.1 SEQUENCE that matches \p tag_may_val.
+ *                       The callback function is called with the following
+ *                       parameters:
+ *                       - \p ctx.
+ *                       - The tag of the current element.
+ *                       - A pointer to the start of the current element's
+ *                         content inside the input.
+ *                       - The length of the content of the current element.
+ *                       If the callback returns a non-zero value,
+ *                       the function stops immediately,
+ *                       forwarding the callback's return value.
+ * \param ctx            The context to be passed to the callback \p cb.
+ *
+ * \return               \c 0 if successful the entire ASN.1 SEQUENCE
+ *                       was traversed without parsing or callback errors.
+ * \return               #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input
+ *                       contains extra data after a valid SEQUENCE
+ *                       of elements with an accepted tag.
+ * \return               #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the input starts
+ *                       with an ASN.1 SEQUENCE in which an element has a tag
+ *                       that is not accepted.
+ * \return               An ASN.1 error code if the input does not start with
+ *                       a valid ASN.1 SEQUENCE.
+ * \return               A non-zero error code forwarded from the callback
+ *                       \p cb in case the latter returns a non-zero value.
+ */
+int mbedtls_asn1_traverse_sequence_of(
+    unsigned char **p,
+    const unsigned char *end,
+    unsigned char tag_must_mask, unsigned char tag_must_val,
+    unsigned char tag_may_mask, unsigned char tag_may_val,
+    int (*cb)( void *ctx, int tag,
+               unsigned char* start, size_t len ),
+    void *ctx );
 
 #if defined(MBEDTLS_BIGNUM_C)
 /**
- * \brief       Retrieve a MPI value from an integer ASN.1 tag.
+ * \brief       Retrieve an integer ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param X     The MPI that will receive the value
- *
- * \return      0 if successful or a specific ASN.1 or MPI error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param X     On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 INTEGER.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
+ * \return      An MPI error code if the parsed value is too large.
  */
 int mbedtls_asn1_get_mpi( unsigned char **p,
-                  const unsigned char *end,
-                  mbedtls_mpi *X );
+                          const unsigned char *end,
+                          mbedtls_mpi *X );
 #endif /* MBEDTLS_BIGNUM_C */
 
 /**
@@ -321,10 +541,14 @@ int mbedtls_asn1_get_mpi( unsigned char **p,
  *              Updates the pointer to immediately behind the full
  *              AlgorithmIdentifier.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param alg   The buffer to receive the OID
- * \param params The buffer to receive the params (if any)
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the AlgorithmIdentifier element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param alg   The buffer to receive the OID.
+ * \param params The buffer to receive the parameters.
+ *              This is zeroized if there are no parameters.
  *
  * \return      0 if successful or a specific ASN.1 or MPI error code.
  */
@@ -338,9 +562,12 @@ int mbedtls_asn1_get_alg( unsigned char **p,
  *              Updates the pointer to immediately behind the full
  *              AlgorithmIdentifier.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param alg   The buffer to receive the OID
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the AlgorithmIdentifier element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param alg   The buffer to receive the OID.
  *
  * \return      0 if successful or a specific ASN.1 or MPI error code.
  */
@@ -364,15 +591,19 @@ mbedtls_asn1_named_data *mbedtls_asn1_find_named_data( mbedtls_asn1_named_data *
 /**
  * \brief       Free a mbedtls_asn1_named_data entry
  *
- * \param entry The named data entry to free
+ * \param entry The named data entry to free.
+ *              This function calls mbedtls_free() on
+ *              `entry->oid.p` and `entry->val.p`.
  */
 void mbedtls_asn1_free_named_data( mbedtls_asn1_named_data *entry );
 
 /**
- * \brief       Free all entries in a mbedtls_asn1_named_data list
- *              Head will be set to NULL
+ * \brief       Free all entries in a mbedtls_asn1_named_data list.
  *
- * \param head  Pointer to the head of the list of named data entries to free
+ * \param head  Pointer to the head of the list of named data entries to free.
+ *              This function calls mbedtls_asn1_free_named_data() and
+ *              mbedtls_free() on each list element and
+ *              sets \c *head to \c NULL.
  */
 void mbedtls_asn1_free_named_data_list( mbedtls_asn1_named_data **head );
 
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/asn1write.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/asn1write.h
index 3c7cdd6b469..44afae0e560 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/asn1write.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/asn1write.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ASN1_WRITE_H
 #define MBEDTLS_ASN1_WRITE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
+#include "mbedtls/asn1.h"
 
 #define MBEDTLS_ASN1_CHK_ADD(g, f)                      \
     do                                                  \
@@ -125,6 +98,7 @@ int mbedtls_asn1_write_raw_buffer( unsigned char **p, unsigned char *start,
  * \param p         The reference to the current position pointer.
  * \param start     The start of the buffer, for bounds-checking.
  * \param X         The MPI to write.
+ *                  It must be non-negative.
  *
  * \return          The number of bytes written to \p p on success.
  * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
@@ -209,12 +183,28 @@ int mbedtls_asn1_write_bool( unsigned char **p, unsigned char *start,
  * \param p         The reference to the current position pointer.
  * \param start     The start of the buffer, for bounds-checking.
  * \param val       The integer value to write.
+ *                  It must be non-negative.
  *
  * \return          The number of bytes written to \p p on success.
  * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
  */
 int mbedtls_asn1_write_int( unsigned char **p, unsigned char *start, int val );
 
+/**
+ * \brief           Write an enum tag (#MBEDTLS_ASN1_ENUMERATED) and value
+ *                  in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param val       The integer value to write.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_enum( unsigned char **p, unsigned char *start, int val );
+
 /**
  * \brief           Write a string in ASN.1 format using a specific
  *                  string encoding tag.
@@ -257,7 +247,7 @@ int mbedtls_asn1_write_printable_string( unsigned char **p,
 
 /**
  * \brief           Write a UTF8 string in ASN.1 format using the UTF8String
- *                  string encoding tag (#MBEDTLS_ASN1_PRINTABLE_STRING).
+ *                  string encoding tag (#MBEDTLS_ASN1_UTF8_STRING).
  *
  * \note            This function works backwards in data buffer.
  *
@@ -308,6 +298,28 @@ int mbedtls_asn1_write_ia5_string( unsigned char **p, unsigned char *start,
 int mbedtls_asn1_write_bitstring( unsigned char **p, unsigned char *start,
                                   const unsigned char *buf, size_t bits );
 
+/**
+ * \brief           This function writes a named bitstring tag
+ *                  (#MBEDTLS_ASN1_BIT_STRING) and value in ASN.1 format.
+ *
+ *                  As stated in RFC 5280 Appendix B, trailing zeroes are
+ *                  omitted when encoding named bitstrings in DER.
+ *
+ * \note            This function works backwards within the data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer which is used for bounds-checking.
+ * \param buf       The bitstring to write.
+ * \param bits      The total number of bits in the bitstring.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_asn1_write_named_bitstring( unsigned char **p,
+                                        unsigned char *start,
+                                        const unsigned char *buf,
+                                        size_t bits );
+
 /**
  * \brief           Write an octet string tag (#MBEDTLS_ASN1_OCTET_STRING)
  *                  and value in ASN.1 format.
@@ -335,9 +347,13 @@ int mbedtls_asn1_write_octet_string( unsigned char **p, unsigned char *start,
  *                  through (will be updated in case of a new entry).
  * \param oid       The OID to look for.
  * \param oid_len   The size of the OID.
- * \param val       The data to store (can be \c NULL if you want to fill
- *                  it by hand).
+ * \param val       The associated data to store. If this is \c NULL,
+ *                  no data is copied to the new or existing buffer.
  * \param val_len   The minimum length of the data buffer needed.
+ *                  If this is 0, do not allocate a buffer for the associated
+ *                  data.
+ *                  If the OID was already present, enlarge, shrink or free
+ *                  the existing buffer to fit \p val_len.
  *
  * \return          A pointer to the new / existing entry on success.
  * \return          \c NULL if if there was a memory allocation error.
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/base64.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/base64.h
index cbed6887ee6..cf4149e731d 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/base64.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/base64.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,22 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_BASE64_H
 #define MBEDTLS_BASE64_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
 
-#define MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL               -0x002A  /**< Output buffer too small. */
-#define MBEDTLS_ERR_BASE64_INVALID_CHARACTER              -0x002C  /**< Invalid character in input. */
+/** Output buffer too small. */
+#define MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL               -0x002A
+/** Invalid character in input. */
+#define MBEDTLS_ERR_BASE64_INVALID_CHARACTER              -0x002C
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bignum.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bignum.h
index 3deedfedd9c..4de452980b8 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bignum.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bignum.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_BIGNUM_H
 #define MBEDTLS_BIGNUM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -62,14 +35,22 @@
 #include <stdio.h>
 #endif
 
-#define MBEDTLS_ERR_MPI_FILE_IO_ERROR                     -0x0002  /**< An error occurred while reading from or writing to a file. */
-#define MBEDTLS_ERR_MPI_BAD_INPUT_DATA                    -0x0004  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_MPI_INVALID_CHARACTER                 -0x0006  /**< There is an invalid character in the digit string. */
-#define MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL                  -0x0008  /**< The buffer is too small to write to. */
-#define MBEDTLS_ERR_MPI_NEGATIVE_VALUE                    -0x000A  /**< The input arguments are negative or result in illegal output. */
-#define MBEDTLS_ERR_MPI_DIVISION_BY_ZERO                  -0x000C  /**< The input argument for division is zero, which is not allowed. */
-#define MBEDTLS_ERR_MPI_NOT_ACCEPTABLE                    -0x000E  /**< The input arguments are not acceptable. */
-#define MBEDTLS_ERR_MPI_ALLOC_FAILED                      -0x0010  /**< Memory allocation failed. */
+/** An error occurred while reading from or writing to a file. */
+#define MBEDTLS_ERR_MPI_FILE_IO_ERROR                     -0x0002
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_MPI_BAD_INPUT_DATA                    -0x0004
+/** There is an invalid character in the digit string. */
+#define MBEDTLS_ERR_MPI_INVALID_CHARACTER                 -0x0006
+/** The buffer is too small to write to. */
+#define MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL                  -0x0008
+/** The input arguments are negative or result in illegal output. */
+#define MBEDTLS_ERR_MPI_NEGATIVE_VALUE                    -0x000A
+/** The input argument for division is zero, which is not allowed. */
+#define MBEDTLS_ERR_MPI_DIVISION_BY_ZERO                  -0x000C
+/** The input arguments are not acceptable. */
+#define MBEDTLS_ERR_MPI_NOT_ACCEPTABLE                    -0x000E
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_MPI_ALLOC_FAILED                      -0x0010
 
 #define MBEDTLS_MPI_CHK(f)       \
     do                           \
@@ -156,7 +137,8 @@
         defined(__ppc64__) || defined(__powerpc64__)  || \
         defined(__ia64__)  || defined(__alpha__)      || \
         ( defined(__sparc__) && defined(__arch64__) ) || \
-        defined(__s390x__) || defined(__mips64) )
+        defined(__s390x__) || defined(__mips64)       || \
+        defined(__aarch64__) )
         #if !defined(MBEDTLS_HAVE_INT64)
             #define MBEDTLS_HAVE_INT64
         #endif /* MBEDTLS_HAVE_INT64 */
@@ -522,8 +504,24 @@ int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf,
                              size_t buflen );
 
 /**
- * \brief          Export an MPI into unsigned big endian binary data
- *                 of fixed size.
+ * \brief          Import X from unsigned binary data, little endian
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param buf      The input buffer. This must be a readable buffer of length
+ *                 \p buflen Bytes.
+ * \param buflen   The length of the input buffer \p p in Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_read_binary_le( mbedtls_mpi *X,
+                                const unsigned char *buf, size_t buflen );
+
+/**
+ * \brief          Export X into unsigned binary data, big endian.
+ *                 Always fills the whole buffer, which will start with zeros
+ *                 if the number is smaller.
  *
  * \param X        The source MPI. This must point to an initialized MPI.
  * \param buf      The output buffer. This must be a writable buffer of length
@@ -538,6 +536,24 @@ int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf,
 int mbedtls_mpi_write_binary( const mbedtls_mpi *X, unsigned char *buf,
                               size_t buflen );
 
+/**
+ * \brief          Export X into unsigned binary data, little endian.
+ *                 Always fills the whole buffer, which will end with zeros
+ *                 if the number is smaller.
+ *
+ * \param X        The source MPI. This must point to an initialized MPI.
+ * \param buf      The output buffer. This must be a writable buffer of length
+ *                 \p buflen Bytes.
+ * \param buflen   The size of the output buffer \p buf in Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if \p buf isn't
+ *                 large enough to hold the value of \p X.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_write_binary_le( const mbedtls_mpi *X,
+                                 unsigned char *buf, size_t buflen );
+
 /**
  * \brief          Perform a left-shift on an MPI: X <<= count
  *
@@ -823,14 +839,14 @@ int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A,
  * \param E        The exponent MPI. This must point to an initialized MPI.
  * \param N        The base for the modular reduction. This must point to an
  *                 initialized MPI.
- * \param _RR      A helper MPI depending solely on \p N which can be used to
+ * \param prec_RR  A helper MPI depending solely on \p N which can be used to
  *                 speed-up multiple modular exponentiations for the same value
  *                 of \p N. This may be \c NULL. If it is not \c NULL, it must
  *                 point to an initialized MPI. If it hasn't been used after
  *                 the call to mbedtls_mpi_init(), this function will compute
- *                 the helper value and store it in \p _RR for reuse on
+ *                 the helper value and store it in \p prec_RR for reuse on
  *                 subsequent calls to this function. Otherwise, the function
- *                 will assume that \p _RR holds the helper value set by a
+ *                 will assume that \p prec_RR holds the helper value set by a
  *                 previous call to mbedtls_mpi_exp_mod(), and reuse it.
  *
  * \return         \c 0 if successful.
@@ -842,7 +858,7 @@ int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A,
  */
 int mbedtls_mpi_exp_mod( mbedtls_mpi *X, const mbedtls_mpi *A,
                          const mbedtls_mpi *E, const mbedtls_mpi *N,
-                         mbedtls_mpi *_RR );
+                         mbedtls_mpi *prec_RR );
 
 /**
  * \brief          Fill an MPI with a number of random bytes.
@@ -865,6 +881,44 @@ int mbedtls_mpi_fill_random( mbedtls_mpi *X, size_t size,
                      int (*f_rng)(void *, unsigned char *, size_t),
                      void *p_rng );
 
+/** Generate a random number uniformly in a range.
+ *
+ * This function generates a random number between \p min inclusive and
+ * \p N exclusive.
+ *
+ * The procedure complies with RFC 6979 §3.3 (deterministic ECDSA)
+ * when the RNG is a suitably parametrized instance of HMAC_DRBG
+ * and \p min is \c 1.
+ *
+ * \note           There are `N - min` possible outputs. The lower bound
+ *                 \p min can be reached, but the upper bound \p N cannot.
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param min      The minimum value to return.
+ *                 It must be nonnegative.
+ * \param N        The upper bound of the range, exclusive.
+ *                 In other words, this is one plus the maximum value to return.
+ *                 \p N must be strictly larger than \p min.
+ * \param f_rng    The RNG function to use. This must not be \c NULL.
+ * \param p_rng    The RNG parameter to be passed to \p f_rng.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \p min or \p N is invalid
+ *                 or if they are incompatible.
+ * \return         #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if the implementation was
+ *                 unable to find a suitable value within a limited number
+ *                 of attempts. This has a negligible probability if \p N
+ *                 is significantly larger than \p min, which is the case
+ *                 for all usual cryptographic applications.
+ * \return         Another negative error code on failure.
+ */
+int mbedtls_mpi_random( mbedtls_mpi *X,
+                        mbedtls_mpi_sint min,
+                        const mbedtls_mpi *N,
+                        int (*f_rng)(void *, unsigned char *, size_t),
+                        void *p_rng );
+
 /**
  * \brief          Compute the greatest common divisor: G = gcd(A, B)
  *
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/blowfish.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/blowfish.h
index 945bd426a9f..77dca70d314 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/blowfish.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/blowfish.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_BLOWFISH_H
 #define MBEDTLS_BLOWFISH_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,7 +31,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #define MBEDTLS_BLOWFISH_ENCRYPT     1
 #define MBEDTLS_BLOWFISH_DECRYPT     0
@@ -70,13 +43,16 @@
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
 #define MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x0016 )
 #endif /* !MBEDTLS_DEPRECATED_REMOVED */
-#define MBEDTLS_ERR_BLOWFISH_BAD_INPUT_DATA -0x0016 /**< Bad input data. */
+/** Bad input data. */
+#define MBEDTLS_ERR_BLOWFISH_BAD_INPUT_DATA -0x0016
 
-#define MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH -0x0018 /**< Invalid data input length. */
+/** Invalid data input length. */
+#define MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH -0x0018
 
 /* MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED                   -0x0017  /**< Blowfish hardware accelerator failed. */
+/** Blowfish hardware accelerator failed. */
+#define MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED                   -0x0017
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
index 6f1201bf50a..31137cd4c23 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 /*
  *      Multiply source vector [s] with b, add result
@@ -64,12 +37,12 @@
 #define MBEDTLS_BN_MUL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 
 /*
@@ -256,13 +229,37 @@
         "addq   $8, %%rdi\n"
 
 #define MULADDC_STOP                        \
-        : "+c" (c), "+D" (d), "+S" (s)      \
-        : "b" (b)                           \
-        : "rax", "rdx", "r8"                \
+        : "+c" (c), "+D" (d), "+S" (s), "+m" (*(uint64_t (*)[16]) d) \
+        : "b" (b), "m" (*(const uint64_t (*)[16]) s)                 \
+        : "rax", "rdx", "r8"                                         \
     );
 
 #endif /* AMD64 */
 
+#if defined(__aarch64__)
+
+#define MULADDC_INIT                \
+    asm(
+
+#define MULADDC_CORE                \
+        "ldr x4, [%2], #8   \n\t"   \
+        "ldr x5, [%1]       \n\t"   \
+        "mul x6, x4, %4     \n\t"   \
+        "umulh x7, x4, %4   \n\t"   \
+        "adds x5, x5, x6    \n\t"   \
+        "adc x7, x7, xzr    \n\t"   \
+        "adds x5, x5, %0    \n\t"   \
+        "adc %0, x7, xzr    \n\t"   \
+        "str x5, [%1], #8   \n\t"
+
+#define MULADDC_STOP                                                    \
+         : "+r" (c),  "+r" (d), "+r" (s), "+m" (*(uint64_t (*)[16]) d)  \
+         : "r" (b), "m" (*(const uint64_t (*)[16]) s)                   \
+         : "x4", "x5", "x6", "x7", "cc"                                 \
+    );
+
+#endif /* Aarch64 */
+
 #if defined(__mc68020__) || defined(__mcpu32__)
 
 #define MULADDC_INIT                    \
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/camellia.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/camellia.h
index 38871288e4b..925a623e47e 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/camellia.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/camellia.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_CAMELLIA_H
 #define MBEDTLS_CAMELLIA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,7 +31,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #define MBEDTLS_CAMELLIA_ENCRYPT     1
 #define MBEDTLS_CAMELLIA_DECRYPT     0
@@ -66,13 +39,16 @@
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
 #define MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x0024 )
 #endif /* !MBEDTLS_DEPRECATED_REMOVED */
-#define MBEDTLS_ERR_CAMELLIA_BAD_INPUT_DATA -0x0024 /**< Bad input data. */
+/** Bad input data. */
+#define MBEDTLS_ERR_CAMELLIA_BAD_INPUT_DATA -0x0024
 
-#define MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH -0x0026 /**< Invalid data input length. */
+/** Invalid data input length. */
+#define MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH -0x0026
 
 /* MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED              -0x0027  /**< Camellia hardware accelerator failed. */
+/** Camellia hardware accelerator failed. */
+#define MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED              -0x0027
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ccm.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ccm.h
index d50c6ec9939..ece5a901cb6 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ccm.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ccm.h
@@ -29,13 +29,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -48,45 +42,27 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CCM_H
 #define MBEDTLS_CCM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
-#define MBEDTLS_ERR_CCM_BAD_INPUT       -0x000D /**< Bad input parameters to the function. */
-#define MBEDTLS_ERR_CCM_AUTH_FAILED     -0x000F /**< Authenticated decryption failed. */
+/** Bad input parameters to the function. */
+#define MBEDTLS_ERR_CCM_BAD_INPUT       -0x000D
+/** Authenticated decryption failed. */
+#define MBEDTLS_ERR_CCM_AUTH_FAILED     -0x000F
 
 /* MBEDTLS_ERR_CCM_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_CCM_HW_ACCEL_FAILED -0x0011 /**< CCM hardware accelerator failed. */
+/** CCM hardware accelerator failed. */
+#define MBEDTLS_ERR_CCM_HW_ACCEL_FAILED -0x0011
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/certs.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/certs.h
index 8472a6f38ce..c93c741c7ff 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/certs.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/certs.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_CERTS_H
 #define MBEDTLS_CERTS_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/chacha20.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/chacha20.h
index 8c9c2af6ffb..03b48714780 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/chacha20.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/chacha20.h
@@ -14,13 +14,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,34 +27,13 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CHACHA20_H
 #define MBEDTLS_CHACHA20_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -68,15 +41,18 @@
 #include <stdint.h>
 #include <stddef.h>
 
-#define MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA         -0x0051 /**< Invalid input parameter(s). */
+/** Invalid input parameter(s). */
+#define MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA         -0x0051
 
 /* MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE is deprecated and should not be
  * used. */
-#define MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE    -0x0053 /**< Feature not available. For example, s part of the API is not implemented. */
+/** Feature not available. For example, s part of the API is not implemented. */
+#define MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE    -0x0053
 
 /* MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED        -0x0055  /**< Chacha20 hardware accelerator failed. */
+/** Chacha20 hardware accelerator failed. */
+#define MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED        -0x0055
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h
index 5f6cb6e0306..c4ec7b5f2a9 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h
@@ -14,13 +14,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,43 +27,24 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CHACHAPOLY_H
 #define MBEDTLS_CHACHAPOLY_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 /* for shared error codes */
-#include "poly1305.h"
+#include "mbedtls/poly1305.h"
 
-#define MBEDTLS_ERR_CHACHAPOLY_BAD_STATE            -0x0054 /**< The requested operation is not permitted in the current state. */
-#define MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED          -0x0056 /**< Authenticated decryption failed: data was not authentic. */
+/** The requested operation is not permitted in the current state. */
+#define MBEDTLS_ERR_CHACHAPOLY_BAD_STATE            -0x0054
+/** Authenticated decryption failed: data was not authentic. */
+#define MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED          -0x0056
 
 #ifdef __cplusplus
 extern "C" {
@@ -84,7 +59,7 @@ mbedtls_chachapoly_mode_t;
 
 #if !defined(MBEDTLS_CHACHAPOLY_ALT)
 
-#include "chacha20.h"
+#include "mbedtls/chacha20.h"
 
 typedef struct mbedtls_chachapoly_context
 {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/check_config.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/check_config.h
index 2bbd7a80ffe..396fe7dfc2b 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/check_config.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/check_config.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 /*
@@ -70,16 +43,20 @@
 #endif
 
 /* Fix the config here. Not convenient to put an #ifdef _WIN32 in config.h as
- * it would confuse config.pl. */
+ * it would confuse config.py. */
 #if !defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) && \
     !defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO)
 #define MBEDTLS_PLATFORM_SNPRINTF_ALT
 #endif
+
+#if !defined(MBEDTLS_PLATFORM_VSNPRINTF_ALT) && \
+    !defined(MBEDTLS_PLATFORM_VSNPRINTF_MACRO)
+#define MBEDTLS_PLATFORM_VSNPRINTF_ALT
+#endif
 #endif /* _WIN32 */
 
-#if defined(TARGET_LIKE_MBED) && \
-    ( defined(MBEDTLS_NET_C) || defined(MBEDTLS_TIMING_C) )
-#error "The NET and TIMING modules are not available for mbed OS - please use the network and timing functions provided by mbed OS"
+#if defined(TARGET_LIKE_MBED) && defined(MBEDTLS_NET_C)
+#error "The NET module is not available for mbed OS - please use the network functions provided by Mbed OS"
 #endif
 
 #if defined(MBEDTLS_DEPRECATED_WARNING) && \
@@ -123,6 +100,17 @@
 
 #if defined(MBEDTLS_ECDSA_C) &&            \
     ( !defined(MBEDTLS_ECP_C) ||           \
+      !( defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) ||   \
+         defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) ||   \
+         defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) ) || \
       !defined(MBEDTLS_ASN1_PARSE_C) ||    \
       !defined(MBEDTLS_ASN1_WRITE_C) )
 #error "MBEDTLS_ECDSA_C defined, but not all prerequisites"
@@ -134,14 +122,25 @@
 #endif
 
 #if defined(MBEDTLS_ECP_RESTARTABLE)           && \
-    ( defined(MBEDTLS_ECDH_COMPUTE_SHARED_ALT) || \
+    ( defined(MBEDTLS_USE_PSA_CRYPTO)          || \
+      defined(MBEDTLS_ECDH_COMPUTE_SHARED_ALT) || \
       defined(MBEDTLS_ECDH_GEN_PUBLIC_ALT)     || \
       defined(MBEDTLS_ECDSA_SIGN_ALT)          || \
       defined(MBEDTLS_ECDSA_VERIFY_ALT)        || \
       defined(MBEDTLS_ECDSA_GENKEY_ALT)        || \
       defined(MBEDTLS_ECP_INTERNAL_ALT)        || \
       defined(MBEDTLS_ECP_ALT) )
-#error "MBEDTLS_ECP_RESTARTABLE defined, but it cannot coexist with an alternative ECP implementation"
+#error "MBEDTLS_ECP_RESTARTABLE defined, but it cannot coexist with an alternative or PSA-based ECP implementation"
+#endif
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)           && \
+    ! defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+#error "MBEDTLS_ECP_RESTARTABLE defined, but not MBEDTLS_ECDH_LEGACY_CONTEXT"
+#endif
+
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)           && \
+    defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+#error "MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED defined, but MBEDTLS_ECDH_LEGACY_CONTEXT not disabled"
 #endif
 
 #if defined(MBEDTLS_ECDSA_DETERMINISTIC) && !defined(MBEDTLS_HMAC_DRBG_C)
@@ -169,10 +168,8 @@
     defined(MBEDTLS_ECP_ALT) ||             \
     defined(MBEDTLS_CTR_DRBG_C) ||          \
     defined(MBEDTLS_HMAC_DRBG_C) ||         \
-    defined(MBEDTLS_SHA512_C) ||            \
-    defined(MBEDTLS_SHA256_C) ||            \
     defined(MBEDTLS_ECP_NO_INTERNAL_RNG))
-#error "MBEDTLS_ECP_C requires a DRBG or SHA-2 module unless MBEDTLS_ECP_NO_INTERNAL_RNG is defined or an alternative implementation is used"
+#error "MBEDTLS_ECP_C requires a DRBG module unless MBEDTLS_ECP_NO_INTERNAL_RNG is defined or an alternative implementation is used"
 #endif
 
 #if defined(MBEDTLS_PK_PARSE_C) && !defined(MBEDTLS_ASN1_PARSE_C)
@@ -218,7 +215,7 @@
 #endif
 
 #if defined(MBEDTLS_GCM_C) && (                                        \
-        !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_CAMELLIA_C) )
+        !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_CAMELLIA_C) && !defined(MBEDTLS_ARIA_C) )
 #error "MBEDTLS_GCM_C defined, but not all prerequisites"
 #endif
 
@@ -254,6 +251,10 @@
 #error "MBEDTLS_ECP_NORMALIZE_MXZ_ALT defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_ECP_NO_FALLBACK) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_NO_FALLBACK defined, but no alternative implementation enabled"
+#endif
+
 #if defined(MBEDTLS_HAVEGE_C) && !defined(MBEDTLS_TIMING_C)
 #error "MBEDTLS_HAVEGE_C defined, but not all prerequisites"
 #endif
@@ -267,12 +268,14 @@
 #endif
 
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) &&                 \
-    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) )
+    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_ECDSA_C) ||          \
+      !defined(MBEDTLS_X509_CRT_PARSE_C) )
 #error "MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED defined, but not all prerequisites"
 #endif
 
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) &&                 \
-    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) )
+    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_RSA_C) ||          \
+      !defined(MBEDTLS_X509_CRT_PARSE_C) )
 #error "MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED defined, but not all prerequisites"
 #endif
 
@@ -321,6 +324,14 @@
 #error "MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE) &&              \
+    ( !defined(MBEDTLS_SHA256_C) &&                             \
+      !defined(MBEDTLS_SHA512_C) &&                             \
+      !defined(MBEDTLS_SHA1_C) )
+#error "!MBEDTLS_SSL_KEEP_PEER_CERTIFICATE requires MBEDTLS_SHA512_C, MBEDTLS_SHA256_C or MBEDTLS_SHA1_C"
+#endif
+
 #if defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C) &&                          \
     ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) )
 #error "MBEDTLS_MEMORY_BUFFER_ALLOC_C defined, but not all prerequisites"
@@ -363,6 +374,14 @@
 #error "MBEDTLS_PKCS11_C defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_PKCS11_C)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_PKCS11_C is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_PKCS11_C is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_PKCS11_C */
+
 #if defined(MBEDTLS_PLATFORM_EXIT_ALT) && !defined(MBEDTLS_PLATFORM_C)
 #error "MBEDTLS_PLATFORM_EXIT_ALT defined, but not all prerequisites"
 #endif
@@ -490,10 +509,6 @@
 #error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites"
 #endif
 
-#if defined(MBEDTLS_PLATFORM_STD_CALLOC) && !defined(MBEDTLS_PLATFORM_MEMORY)
-#error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites"
-#endif
-
 #if defined(MBEDTLS_PLATFORM_STD_FREE) && !defined(MBEDTLS_PLATFORM_MEMORY)
 #error "MBEDTLS_PLATFORM_STD_FREE defined, but not all prerequisites"
 #endif
@@ -556,6 +571,54 @@
 #error "MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO and MBEDTLS_PLATFORM_STD_NV_SEED_WRITE cannot be defined simultaneously"
 #endif
 
+#if defined(MBEDTLS_PSA_CRYPTO_C) &&                                    \
+    !( ( ( defined(MBEDTLS_CTR_DRBG_C) || defined(MBEDTLS_HMAC_DRBG_C) ) && \
+         defined(MBEDTLS_ENTROPY_C) ) ||                                \
+       defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) )
+#error "MBEDTLS_PSA_CRYPTO_C defined, but not all prerequisites (missing RNG)"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_SPM) && !defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_PSA_CRYPTO_SPM defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C) &&    \
+    ! ( defined(MBEDTLS_PSA_CRYPTO_C) && \
+        defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) )
+#error "MBEDTLS_PSA_CRYPTO_SE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) &&            \
+    ! defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_PSA_CRYPTO_STORAGE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&      \
+    !( defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) && \
+       defined(MBEDTLS_ENTROPY_NV_SEED) )
+#error "MBEDTLS_PSA_INJECT_ENTROPY defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&              \
+    !defined(MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES)
+#error "MBEDTLS_PSA_INJECT_ENTROPY is not compatible with actual entropy sources"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&              \
+    defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+#error "MBEDTLS_PSA_INJECT_ENTROPY is not compatible with MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG"
+#endif
+
+#if defined(MBEDTLS_PSA_ITS_FILE_C) && \
+    !defined(MBEDTLS_FS_IO)
+#error "MBEDTLS_PSA_ITS_FILE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER) && \
+    defined(MBEDTLS_USE_PSA_CRYPTO)
+#error "MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER defined, but it cannot coexist with MBEDTLS_USE_PSA_CRYPTO."
+#endif
+
 #if defined(MBEDTLS_RSA_C) && ( !defined(MBEDTLS_BIGNUM_C) ||         \
     !defined(MBEDTLS_OID_C) )
 #error "MBEDTLS_RSA_C defined, but not all prerequisites"
@@ -571,6 +634,10 @@
 #error "MBEDTLS_X509_RSASSA_PSS_SUPPORT defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_SHA512_NO_SHA384) && !defined(MBEDTLS_SHA512_C)
+#error "MBEDTLS_SHA512_NO_SHA384 defined without MBEDTLS_SHA512_C"
+#endif
+
 #if defined(MBEDTLS_SSL_PROTO_SSL3) && ( !defined(MBEDTLS_MD5_C) ||     \
     !defined(MBEDTLS_SHA1_C) )
 #error "MBEDTLS_SSL_PROTO_SSL3 defined, but not all prerequisites"
@@ -591,6 +658,11 @@
 #error "MBEDTLS_SSL_PROTO_TLS1_2 defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL) && ( !defined(MBEDTLS_HKDF_C) && \
+    !defined(MBEDTLS_SHA256_C) && !defined(MBEDTLS_SHA512_C) )
+#error "MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL defined, but not all prerequisites"
+#endif
+
 #if (defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) ||  \
      defined(MBEDTLS_SSL_PROTO_TLS1_1) || defined(MBEDTLS_SSL_PROTO_TLS1_2)) && \
     !(defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) ||                          \
@@ -663,6 +735,23 @@
 #error "MBEDTLS_SSL_DTLS_ANTI_REPLAY  defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID) &&                              \
+    ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_CONNECTION_ID  defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)            &&                 \
+    defined(MBEDTLS_SSL_CID_IN_LEN_MAX) &&                 \
+    MBEDTLS_SSL_CID_IN_LEN_MAX > 255
+#error "MBEDTLS_SSL_CID_IN_LEN_MAX too large (max 255)"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)            &&                  \
+    defined(MBEDTLS_SSL_CID_OUT_LEN_MAX) &&                 \
+    MBEDTLS_SSL_CID_OUT_LEN_MAX > 255
+#error "MBEDTLS_SSL_CID_OUT_LEN_MAX too large (max 255)"
+#endif
+
 #if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) &&                              \
     ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) )
 #error "MBEDTLS_SSL_DTLS_BADMAC_LIMIT  defined, but not all prerequisites"
@@ -715,6 +804,10 @@
 #endif
 #undef MBEDTLS_THREADING_IMPL
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO) && !defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_USE_PSA_CRYPTO defined, but not all prerequisites"
+#endif
+
 #if defined(MBEDTLS_VERSION_FEATURES) && !defined(MBEDTLS_VERSION_C)
 #error "MBEDTLS_VERSION_FEATURES defined, but not all prerequisites"
 #endif
@@ -764,6 +857,38 @@
 #error "MBEDTLS_HAVE_INT32/MBEDTLS_HAVE_INT64 and MBEDTLS_HAVE_ASM cannot be defined simultaneously"
 #endif /* (MBEDTLS_HAVE_INT32 || MBEDTLS_HAVE_INT64) && MBEDTLS_HAVE_ASM */
 
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_PROTO_SSL3 is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_PROTO_SSL3 is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_SSL_PROTO_SSL3 */
+
+#if defined(MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO */
+
+#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_HW_RECORD_ACCEL is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_HW_RECORD_ACCEL is deprecated and will be removed in a future version of Mbed TLS"
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP) && ( !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_SRTP defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH) && ( !defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) )
+#error "MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH defined, but not all prerequisites"
+#endif
+
 /*
  * Avoid warning from -pedantic. This is a convenient place for this
  * workaround since this is included by every single file before the
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cipher.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cipher.h
index 1f41b528c48..6d83da8827e 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cipher.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cipher.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,40 +22,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CIPHER_H
 #define MBEDTLS_CIPHER_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CCM_C) || defined(MBEDTLS_CHACHAPOLY_C)
 #define MBEDTLS_CIPHER_MODE_AEAD
@@ -81,16 +54,24 @@
 #define inline __inline
 #endif
 
-#define MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE  -0x6080  /**< The selected feature is not available. */
-#define MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA       -0x6100  /**< Bad input parameters. */
-#define MBEDTLS_ERR_CIPHER_ALLOC_FAILED         -0x6180  /**< Failed to allocate memory. */
-#define MBEDTLS_ERR_CIPHER_INVALID_PADDING      -0x6200  /**< Input data contains invalid padding and is rejected. */
-#define MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED  -0x6280  /**< Decryption of block requires a full block. */
-#define MBEDTLS_ERR_CIPHER_AUTH_FAILED          -0x6300  /**< Authentication failed (for AEAD modes). */
-#define MBEDTLS_ERR_CIPHER_INVALID_CONTEXT      -0x6380  /**< The context is invalid. For example, because it was freed. */
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE  -0x6080
+/** Bad input parameters. */
+#define MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA       -0x6100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_CIPHER_ALLOC_FAILED         -0x6180
+/** Input data contains invalid padding and is rejected. */
+#define MBEDTLS_ERR_CIPHER_INVALID_PADDING      -0x6200
+/** Decryption of block requires a full block. */
+#define MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED  -0x6280
+/** Authentication failed (for AEAD modes). */
+#define MBEDTLS_ERR_CIPHER_AUTH_FAILED          -0x6300
+/** The context is invalid. For example, because it was freed. */
+#define MBEDTLS_ERR_CIPHER_INVALID_CONTEXT      -0x6380
 
 /* MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED      -0x6400  /**< Cipher hardware accelerator failed. */
+/** Cipher hardware accelerator failed. */
+#define MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED      -0x6400
 
 #define MBEDTLS_CIPHER_VARIABLE_IV_LEN     0x01    /**< Cipher accepts IVs of variable length. */
 #define MBEDTLS_CIPHER_VARIABLE_KEY_LEN    0x02    /**< Cipher accepts keys of variable length. */
@@ -201,21 +182,29 @@ typedef enum {
     MBEDTLS_CIPHER_AES_256_XTS,          /**< AES 256-bit cipher in XTS block mode. */
     MBEDTLS_CIPHER_CHACHA20,             /**< ChaCha20 stream cipher. */
     MBEDTLS_CIPHER_CHACHA20_POLY1305,    /**< ChaCha20-Poly1305 AEAD cipher. */
+    MBEDTLS_CIPHER_AES_128_KW,           /**< AES cipher with 128-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_192_KW,           /**< AES cipher with 192-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_256_KW,           /**< AES cipher with 256-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_128_KWP,          /**< AES cipher with 128-bit NIST KWP mode. */
+    MBEDTLS_CIPHER_AES_192_KWP,          /**< AES cipher with 192-bit NIST KWP mode. */
+    MBEDTLS_CIPHER_AES_256_KWP,          /**< AES cipher with 256-bit NIST KWP mode. */
 } mbedtls_cipher_type_t;
 
 /** Supported cipher modes. */
 typedef enum {
-    MBEDTLS_MODE_NONE = 0,               /**< None. */
-    MBEDTLS_MODE_ECB,                    /**< The ECB cipher mode. */
-    MBEDTLS_MODE_CBC,                    /**< The CBC cipher mode. */
-    MBEDTLS_MODE_CFB,                    /**< The CFB cipher mode. */
-    MBEDTLS_MODE_OFB,                    /**< The OFB cipher mode. */
-    MBEDTLS_MODE_CTR,                    /**< The CTR cipher mode. */
-    MBEDTLS_MODE_GCM,                    /**< The GCM cipher mode. */
-    MBEDTLS_MODE_STREAM,                 /**< The stream cipher mode. */
-    MBEDTLS_MODE_CCM,                    /**< The CCM cipher mode. */
-    MBEDTLS_MODE_XTS,                    /**< The XTS cipher mode. */
+    MBEDTLS_MODE_NONE = 0,               /**< None.                        */
+    MBEDTLS_MODE_ECB,                    /**< The ECB cipher mode.         */
+    MBEDTLS_MODE_CBC,                    /**< The CBC cipher mode.         */
+    MBEDTLS_MODE_CFB,                    /**< The CFB cipher mode.         */
+    MBEDTLS_MODE_OFB,                    /**< The OFB cipher mode.         */
+    MBEDTLS_MODE_CTR,                    /**< The CTR cipher mode.         */
+    MBEDTLS_MODE_GCM,                    /**< The GCM cipher mode.         */
+    MBEDTLS_MODE_STREAM,                 /**< The stream cipher mode.      */
+    MBEDTLS_MODE_CCM,                    /**< The CCM cipher mode.         */
+    MBEDTLS_MODE_XTS,                    /**< The XTS cipher mode.         */
     MBEDTLS_MODE_CHACHAPOLY,             /**< The ChaCha-Poly cipher mode. */
+    MBEDTLS_MODE_KW,                     /**< The SP800-38F KW mode */
+    MBEDTLS_MODE_KWP,                    /**< The SP800-38F KWP mode */
 } mbedtls_cipher_mode_t;
 
 /** Supported cipher padding types. */
@@ -246,10 +235,30 @@ enum {
 };
 
 /** Maximum length of any IV, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_IV_LENGTH defined
+ * in ssl_internal.h. */
 #define MBEDTLS_MAX_IV_LENGTH      16
+
 /** Maximum block size of any cipher, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_BLOCK_LENGTH defined
+ * in ssl_internal.h. */
 #define MBEDTLS_MAX_BLOCK_LENGTH   16
 
+/** Maximum key length, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * For now, only check whether XTS is enabled which uses 64 Byte keys,
+ * and use 32 Bytes as an upper bound for the maximum key length otherwise.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_BLOCK_LENGTH defined
+ * in ssl_internal.h, which however deliberately ignores the case of XTS
+ * since the latter isn't used in SSL/TLS. */
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+#define MBEDTLS_MAX_KEY_LENGTH     64
+#else
+#define MBEDTLS_MAX_KEY_LENGTH     32
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
 /**
  * Base cipher information (opaque struct).
  */
@@ -347,14 +356,32 @@ typedef struct mbedtls_cipher_context_t
     /** CMAC-specific context. */
     mbedtls_cmac_context_t *cmac_ctx;
 #endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    /** Indicates whether the cipher operations should be performed
+     *  by Mbed TLS' own crypto library or an external implementation
+     *  of the PSA Crypto API.
+     *  This is unset if the cipher context was established through
+     *  mbedtls_cipher_setup(), and set if it was established through
+     *  mbedtls_cipher_setup_psa().
+     */
+    unsigned char psa_enabled;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 } mbedtls_cipher_context_t;
 
 /**
- * \brief This function retrieves the list of ciphers supported by the generic
- * cipher module.
+ * \brief This function retrieves the list of ciphers supported
+ *        by the generic cipher module.
+ *
+ *        For any cipher identifier in the returned list, you can
+ *        obtain the corresponding generic cipher information structure
+ *        via mbedtls_cipher_info_from_type(), which can then be used
+ *        to prepare a cipher context via mbedtls_cipher_setup().
  *
- * \return      A statically-allocated array of ciphers. The last entry
- *              is zero.
+ *
+ * \return      A statically-allocated array of cipher identifiers
+ *              of type cipher_type_t. The last entry is zero.
  */
 const int *mbedtls_cipher_list( void );
 
@@ -421,9 +448,8 @@ void mbedtls_cipher_free( mbedtls_cipher_context_t *ctx );
 
 
 /**
- * \brief               This function initializes and fills the cipher-context
- *                      structure with the appropriate values. It also clears
- *                      the structure.
+ * \brief               This function initializes a cipher context for
+ *                      use with the given cipher primitive.
  *
  * \param ctx           The context to initialize. This must be initialized.
  * \param cipher_info   The cipher to use.
@@ -441,6 +467,33 @@ void mbedtls_cipher_free( mbedtls_cipher_context_t *ctx );
 int mbedtls_cipher_setup( mbedtls_cipher_context_t *ctx,
                           const mbedtls_cipher_info_t *cipher_info );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief               This function initializes a cipher context for
+ *                      PSA-based use with the given cipher primitive.
+ *
+ * \note                See #MBEDTLS_USE_PSA_CRYPTO for information on PSA.
+ *
+ * \param ctx           The context to initialize. May not be \c NULL.
+ * \param cipher_info   The cipher to use.
+ * \param taglen        For AEAD ciphers, the length in bytes of the
+ *                      authentication tag to use. Subsequent uses of
+ *                      mbedtls_cipher_auth_encrypt() or
+ *                      mbedtls_cipher_auth_decrypt() must provide
+ *                      the same tag length.
+ *                      For non-AEAD ciphers, the value must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_ALLOC_FAILED if allocation of the
+ *                      cipher-specific context fails.
+ */
+int mbedtls_cipher_setup_psa( mbedtls_cipher_context_t *ctx,
+                              const mbedtls_cipher_info_t *cipher_info,
+                              size_t taglen );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 /**
  * \brief        This function returns the block size of the given cipher.
  *
@@ -663,7 +716,7 @@ int mbedtls_cipher_reset( mbedtls_cipher_context_t *ctx );
  * \param ctx           The generic cipher context. This must be initialized.
  * \param ad            The additional data to use. This must be a readable
  *                      buffer of at least \p ad_len Bytes.
- * \param ad_len        the Length of \p ad Bytes.
+ * \param ad_len        The length of \p ad in Bytes.
  *
  * \return              \c 0 on success.
  * \return              A specific error code on failure.
@@ -706,8 +759,10 @@ int mbedtls_cipher_update_ad( mbedtls_cipher_context_t *ctx,
  *                      unsupported mode for a cipher.
  * \return              A cipher-specific error code on failure.
  */
-int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *input,
-                   size_t ilen, unsigned char *output, size_t *olen );
+int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx,
+                           const unsigned char *input,
+                           size_t ilen, unsigned char *output,
+                           size_t *olen );
 
 /**
  * \brief               The generic cipher finalization function. If data still
@@ -810,30 +865,52 @@ int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx,
                   unsigned char *output, size_t *olen );
 
 #if defined(MBEDTLS_CIPHER_MODE_AEAD)
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_WARNING */
 /**
- * \brief               The generic autenticated encryption (AEAD) function.
+ * \brief               The generic authenticated encryption (AEAD) function.
+ *
+ * \deprecated          Superseded by mbedtls_cipher_auth_encrypt_ext().
+ *
+ * \note                This function only supports AEAD algorithms, not key
+ *                      wrapping algorithms such as NIST_KW; for this, see
+ *                      mbedtls_cipher_auth_encrypt_ext().
  *
  * \param ctx           The generic cipher context. This must be initialized and
- *                      bound to a key.
- * \param iv            The IV to use, or NONCE_COUNTER for CTR-mode ciphers.
- *                      This must be a readable buffer of at least \p iv_len
- *                      Bytes.
- * \param iv_len        The IV length for ciphers with variable-size IV.
- *                      This parameter is discarded by ciphers with fixed-size IV.
+ *                      bound to a key associated with an AEAD algorithm.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and must not be \c NULL.
+ * \param iv_len        The length of the nonce. This must satisfy the
+ *                      constraints imposed by the AEAD cipher used.
  * \param ad            The additional data to authenticate. This must be a
- *                      readable buffer of at least \p ad_len Bytes.
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
  * \param ad_len        The length of \p ad.
  * \param input         The buffer holding the input data. This must be a
- *                      readable buffer of at least \p ilen Bytes.
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
  * \param ilen          The length of the input data.
- * \param output        The buffer for the output data. This must be able to
- *                      hold at least \p ilen Bytes.
- * \param olen          The length of the output data, to be updated with the
- *                      actual number of Bytes written. This must not be
- *                      \c NULL.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p ilen Bytes, and must
+ *                      not be \c NULL.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
  * \param tag           The buffer for the authentication tag. This must be a
- *                      writable buffer of at least \p tag_len Bytes.
- * \param tag_len       The desired length of the authentication tag.
+ *                      writable buffer of at least \p tag_len Bytes. See note
+ *                      below regarding restrictions with PSA-based contexts.
+ * \param tag_len       The desired length of the authentication tag. This
+ *                      must match the constraints imposed by the AEAD cipher
+ *                      used, and in particular must not be \c 0.
+ *
+ * \note                If the context is based on PSA (that is, it was set up
+ *                      with mbedtls_cipher_setup_psa()), then it is required
+ *                      that \c tag == output + ilen. That is, the tag must be
+ *                      appended to the ciphertext as recommended by RFC 5116.
  *
  * \return              \c 0 on success.
  * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
@@ -845,36 +922,53 @@ int mbedtls_cipher_auth_encrypt( mbedtls_cipher_context_t *ctx,
                          const unsigned char *ad, size_t ad_len,
                          const unsigned char *input, size_t ilen,
                          unsigned char *output, size_t *olen,
-                         unsigned char *tag, size_t tag_len );
+                         unsigned char *tag, size_t tag_len )
+                         MBEDTLS_DEPRECATED;
 
 /**
- * \brief               The generic autenticated decryption (AEAD) function.
+ * \brief               The generic authenticated decryption (AEAD) function.
+ *
+ * \deprecated          Superseded by mbedtls_cipher_auth_decrypt_ext().
+ *
+ * \note                This function only supports AEAD algorithms, not key
+ *                      wrapping algorithms such as NIST_KW; for this, see
+ *                      mbedtls_cipher_auth_decrypt_ext().
  *
  * \note                If the data is not authentic, then the output buffer
  *                      is zeroed out to prevent the unauthentic plaintext being
  *                      used, making this interface safer.
  *
  * \param ctx           The generic cipher context. This must be initialized and
- *                      and bound to a key.
- * \param iv            The IV to use, or NONCE_COUNTER for CTR-mode ciphers.
- *                      This must be a readable buffer of at least \p iv_len
- *                      Bytes.
- * \param iv_len        The IV length for ciphers with variable-size IV.
- *                      This parameter is discarded by ciphers with fixed-size IV.
- * \param ad            The additional data to be authenticated. This must be a
- *                      readable buffer of at least \p ad_len Bytes.
+ *                      bound to a key associated with an AEAD algorithm.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and must not be \c NULL.
+ * \param iv_len        The length of the nonce. This must satisfy the
+ *                      constraints imposed by the AEAD cipher used.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
  * \param ad_len        The length of \p ad.
  * \param input         The buffer holding the input data. This must be a
- *                      readable buffer of at least \p ilen Bytes.
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
  * \param ilen          The length of the input data.
- * \param output        The buffer for the output data.
- *                      This must be able to hold at least \p ilen Bytes.
- * \param olen          The length of the output data, to be updated with the
- *                      actual number of Bytes written. This must not be
- *                      \c NULL.
- * \param tag           The buffer holding the authentication tag. This must be
- *                      a readable buffer of at least \p tag_len Bytes.
- * \param tag_len       The length of the authentication tag.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p ilen Bytes, and must
+ *                      not be \c NULL.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag           The buffer for the authentication tag. This must be a
+ *                      readable buffer of at least \p tag_len Bytes. See note
+ *                      below regarding restrictions with PSA-based contexts.
+ * \param tag_len       The length of the authentication tag. This must match
+ *                      the constraints imposed by the AEAD cipher used, and in
+ *                      particular must not be \c 0.
+ *
+ * \note                If the context is based on PSA (that is, it was set up
+ *                      with mbedtls_cipher_setup_psa()), then it is required
+ *                      that \c tag == input + len. That is, the tag must be
+ *                      appended to the ciphertext as recommended by RFC 5116.
  *
  * \return              \c 0 on success.
  * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
@@ -887,9 +981,120 @@ int mbedtls_cipher_auth_decrypt( mbedtls_cipher_context_t *ctx,
                          const unsigned char *ad, size_t ad_len,
                          const unsigned char *input, size_t ilen,
                          unsigned char *output, size_t *olen,
-                         const unsigned char *tag, size_t tag_len );
+                         const unsigned char *tag, size_t tag_len )
+                         MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
 #endif /* MBEDTLS_CIPHER_MODE_AEAD */
 
+#if defined(MBEDTLS_CIPHER_MODE_AEAD) || defined(MBEDTLS_NIST_KW_C)
+/**
+ * \brief               The authenticated encryption (AEAD/NIST_KW) function.
+ *
+ * \note                For AEAD modes, the tag will be appended to the
+ *                      ciphertext, as recommended by RFC 5116.
+ *                      (NIST_KW doesn't have a separate tag.)
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key, with an AEAD algorithm or NIST_KW.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and may be \c NULL if \p
+ *                      iv_len is \c 0.
+ * \param iv_len        The length of the nonce. For AEAD ciphers, this must
+ *                      satisfy the constraints imposed by the cipher used.
+ *                      For NIST_KW, this must be \c 0.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
+ * \param ad_len        The length of \p ad. For NIST_KW, this must be \c 0.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
+ * \param ilen          The length of the input data.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p output_len Bytes, and
+ *                      must not be \c NULL.
+ * \param output_len    The length of the \p output buffer in Bytes. For AEAD
+ *                      ciphers, this must be at least \p ilen + \p tag_len.
+ *                      For NIST_KW, this must be at least \p ilen + 8
+ *                      (rounded up to a multiple of 8 if KWP is used);
+ *                      \p ilen + 15 is always a safe value.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag_len       The desired length of the authentication tag. For AEAD
+ *                      ciphers, this must match the constraints imposed by
+ *                      the cipher used, and in particular must not be \c 0.
+ *                      For NIST_KW, this must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_encrypt_ext( mbedtls_cipher_context_t *ctx,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *ad, size_t ad_len,
+                         const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t output_len,
+                         size_t *olen, size_t tag_len );
+
+/**
+ * \brief               The authenticated encryption (AEAD/NIST_KW) function.
+ *
+ * \note                If the data is not authentic, then the output buffer
+ *                      is zeroed out to prevent the unauthentic plaintext being
+ *                      used, making this interface safer.
+ *
+ * \note                For AEAD modes, the tag must be appended to the
+ *                      ciphertext, as recommended by RFC 5116.
+ *                      (NIST_KW doesn't have a separate tag.)
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key, with an AEAD algorithm or NIST_KW.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and may be \c NULL if \p
+ *                      iv_len is \c 0.
+ * \param iv_len        The length of the nonce. For AEAD ciphers, this must
+ *                      satisfy the constraints imposed by the cipher used.
+ *                      For NIST_KW, this must be \c 0.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
+ * \param ad_len        The length of \p ad. For NIST_KW, this must be \c 0.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
+ * \param ilen          The length of the input data. For AEAD ciphers this
+ *                      must be at least \p tag_len. For NIST_KW this must be
+ *                      at least \c 8.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p output_len Bytes, and
+ *                      may be \c NULL if \p output_len is \c 0.
+ * \param output_len    The length of the \p output buffer in Bytes. For AEAD
+ *                      ciphers, this must be at least \p ilen - \p tag_len.
+ *                      For NIST_KW, this must be at least \p ilen - 8.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag_len       The actual length of the authentication tag. For AEAD
+ *                      ciphers, this must match the constraints imposed by
+ *                      the cipher used, and in particular must not be \c 0.
+ *                      For NIST_KW, this must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_AUTH_FAILED if data is not authentic.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_decrypt_ext( mbedtls_cipher_context_t *ctx,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *ad, size_t ad_len,
+                         const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t output_len,
+                         size_t *olen, size_t tag_len );
+#endif /* MBEDTLS_CIPHER_MODE_AEAD || MBEDTLS_NIST_KW_C */
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h
index 88282ec9d20..2484c01c7a4 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,38 +20,21 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_CIPHER_WRAP_H
 #define MBEDTLS_CIPHER_WRAP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
 
 #ifdef __cplusplus
 extern "C" {
@@ -139,6 +116,29 @@ typedef struct
     const mbedtls_cipher_info_t *info;
 } mbedtls_cipher_definition_t;
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+typedef enum
+{
+    MBEDTLS_CIPHER_PSA_KEY_UNSET = 0,
+    MBEDTLS_CIPHER_PSA_KEY_OWNED, /* Used for PSA-based cipher contexts which */
+                                  /* use raw key material internally imported */
+                                  /* as a volatile key, and which hence need  */
+                                  /* to destroy that key when the context is  */
+                                  /* freed.                                   */
+    MBEDTLS_CIPHER_PSA_KEY_NOT_OWNED, /* Used for PSA-based cipher contexts   */
+                                      /* which use a key provided by the      */
+                                      /* user, and which hence will not be    */
+                                      /* destroyed when the context is freed. */
+} mbedtls_cipher_psa_key_ownership;
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    psa_key_id_t slot;
+    mbedtls_cipher_psa_key_ownership slot_state;
+} mbedtls_cipher_context_psa;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 extern const mbedtls_cipher_definition_t mbedtls_cipher_definitions[];
 
 extern int mbedtls_cipher_supported[];
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cmac.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cmac.h
index 5a7c9b246f0..8934886af74 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cmac.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/cmac.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,46 +21,26 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CMAC_H
 #define MBEDTLS_CMAC_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 /* MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED -0x007A  /**< CMAC hardware accelerator failed. */
+/** CMAC hardware accelerator failed. */
+#define MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED -0x007A
 
 #define MBEDTLS_AES_BLOCK_SIZE          16
 #define MBEDTLS_DES3_BLOCK_SIZE         8
@@ -100,9 +74,23 @@ struct mbedtls_cmac_context_t
 #endif /* !MBEDTLS_CMAC_ALT */
 
 /**
- * \brief               This function sets the CMAC key, and prepares to authenticate
+ * \brief               This function starts a new CMAC computation
+ *                      by setting the CMAC key, and preparing to authenticate
  *                      the input data.
- *                      Must be called with an initialized cipher context.
+ *                      It must be called with an initialized cipher context.
+ *
+ *                      Once this function has completed, data can be supplied
+ *                      to the CMAC computation by calling
+ *                      mbedtls_cipher_cmac_update().
+ *
+ *                      To start a CMAC computation using the same key as a previous
+ *                      CMAC computation, use mbedtls_cipher_cmac_finish().
+ *
+ * \note                When the CMAC implementation is supplied by an alternate
+ *                      implementation (through #MBEDTLS_CMAC_ALT), some ciphers
+ *                      may not be supported by that implementation, and thus
+ *                      return an error. Alternate implementations must support
+ *                      AES-128 and AES-256, and may support AES-192 and 3DES.
  *
  * \param ctx           The cipher context used for the CMAC operation, initialized
  *                      as one of the following types: MBEDTLS_CIPHER_AES_128_ECB,
@@ -122,9 +110,15 @@ int mbedtls_cipher_cmac_starts( mbedtls_cipher_context_t *ctx,
  * \brief               This function feeds an input buffer into an ongoing CMAC
  *                      computation.
  *
- *                      It is called between mbedtls_cipher_cmac_starts() or
- *                      mbedtls_cipher_cmac_reset(), and mbedtls_cipher_cmac_finish().
- *                      Can be called repeatedly.
+ *                      The CMAC computation must have previously been started
+ *                      by calling mbedtls_cipher_cmac_starts() or
+ *                      mbedtls_cipher_cmac_reset().
+ *
+ *                      Call this function as many times as needed to input the
+ *                      data to be authenticated.
+ *                      Once all of the required data has been input,
+ *                      call mbedtls_cipher_cmac_finish() to obtain the result
+ *                      of the CMAC operation.
  *
  * \param ctx           The cipher context used for the CMAC operation.
  * \param input         The buffer holding the input data.
@@ -138,12 +132,13 @@ int mbedtls_cipher_cmac_update( mbedtls_cipher_context_t *ctx,
                                 const unsigned char *input, size_t ilen );
 
 /**
- * \brief               This function finishes the CMAC operation, and writes
- *                      the result to the output buffer.
+ * \brief               This function finishes an ongoing CMAC operation, and
+ *                      writes the result to the output buffer.
  *
- *                      It is called after mbedtls_cipher_cmac_update().
- *                      It can be followed by mbedtls_cipher_cmac_reset() and
- *                      mbedtls_cipher_cmac_update(), or mbedtls_cipher_free().
+ *                      It should be followed either by
+ *                      mbedtls_cipher_cmac_reset(), which starts another CMAC
+ *                      operation with the same key, or mbedtls_cipher_free(),
+ *                      which clears the cipher context.
  *
  * \param ctx           The cipher context used for the CMAC operation.
  * \param output        The output buffer for the CMAC checksum result.
@@ -156,12 +151,14 @@ int mbedtls_cipher_cmac_finish( mbedtls_cipher_context_t *ctx,
                                 unsigned char *output );
 
 /**
- * \brief               This function prepares the authentication of another
- *                      message with the same key as the previous CMAC
- *                      operation.
+ * \brief               This function starts a new CMAC operation with the same
+ *                      key as the previous one.
  *
- *                      It is called after mbedtls_cipher_cmac_finish()
- *                      and before mbedtls_cipher_cmac_update().
+ *                      It should be called after finishing the previous CMAC
+ *                      operation with mbedtls_cipher_cmac_finish().
+ *                      After calling this function,
+ *                      call mbedtls_cipher_cmac_update() to supply the new
+ *                      CMAC operation with data.
  *
  * \param ctx           The cipher context used for the CMAC operation.
  *
@@ -181,6 +178,11 @@ int mbedtls_cipher_cmac_reset( mbedtls_cipher_context_t *ctx );
  *                      The CMAC result is calculated as
  *                      output = generic CMAC(cmac key, input buffer).
  *
+ * \note                When the CMAC implementation is supplied by an alternate
+ *                      implementation (through #MBEDTLS_CMAC_ALT), some ciphers
+ *                      may not be supported by that implementation, and thus
+ *                      return an error. Alternate implementations must support
+ *                      AES-128 and AES-256, and may support AES-192 and 3DES.
  *
  * \param cipher_info   The cipher information.
  * \param key           The CMAC key.
@@ -225,6 +227,13 @@ int mbedtls_aes_cmac_prf_128( const unsigned char *key, size_t key_len,
 /**
  * \brief          The CMAC checkup routine.
  *
+ * \note           In case the CMAC routines are provided by an alternative
+ *                 implementation (i.e. #MBEDTLS_CMAC_ALT is defined), the
+ *                 checkup routine will succeed even if the implementation does
+ *                 not support the less widely used AES-192 or 3DES primitives.
+ *                 The self-test requires at least AES-128 and AES-256 to be
+ *                 supported by the underlying implementation.
+ *
  * \return         \c 0 on success.
  * \return         \c 1 on failure.
  */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h
index 45e5a1cf77c..40177512cab 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,31 +21,10 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -1275,9 +1248,9 @@
 #define POLARSSL_KEY_EXCHANGE_PSK MBEDTLS_KEY_EXCHANGE_PSK
 #define POLARSSL_KEY_EXCHANGE_RSA MBEDTLS_KEY_EXCHANGE_RSA
 #define POLARSSL_KEY_EXCHANGE_RSA_PSK MBEDTLS_KEY_EXCHANGE_RSA_PSK
-#define POLARSSL_KEY_EXCHANGE__SOME__ECDHE_ENABLED MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED
-#define POLARSSL_KEY_EXCHANGE__SOME__PSK_ENABLED MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED
-#define POLARSSL_KEY_EXCHANGE__WITH_CERT__ENABLED MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED
+#define POLARSSL_KEY_EXCHANGE__SOME__ECDHE_ENABLED MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED
+#define POLARSSL_KEY_EXCHANGE__SOME__PSK_ENABLED MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE__WITH_CERT__ENABLED MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED
 #define POLARSSL_KEY_LENGTH_DES MBEDTLS_KEY_LENGTH_DES
 #define POLARSSL_KEY_LENGTH_DES_EDE MBEDTLS_KEY_LENGTH_DES_EDE
 #define POLARSSL_KEY_LENGTH_DES_EDE3 MBEDTLS_KEY_LENGTH_DES_EDE3
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/config.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/config.h
index b1d67f7a931..87b4e9192e7 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/config.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/config.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,27 +22,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CONFIG_H
@@ -251,33 +224,34 @@
 //#define MBEDTLS_PLATFORM_FPRINTF_ALT
 //#define MBEDTLS_PLATFORM_PRINTF_ALT
 //#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+//#define MBEDTLS_PLATFORM_VSNPRINTF_ALT
 //#define MBEDTLS_PLATFORM_NV_SEED_ALT
 //#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT
 
 /**
  * \def MBEDTLS_DEPRECATED_WARNING
  *
- * Mark deprecated functions so that they generate a warning if used.
- * Functions deprecated in one version will usually be removed in the next
- * version. You can enable this to help you prepare the transition to a new
- * major version by making sure your code is not using these functions.
+ * Mark deprecated functions and features so that they generate a warning if
+ * used. Functionality deprecated in one version will usually be removed in the
+ * next version. You can enable this to help you prepare the transition to a
+ * new major version by making sure your code is not using this functionality.
  *
  * This only works with GCC and Clang. With other compilers, you may want to
  * use MBEDTLS_DEPRECATED_REMOVED
  *
- * Uncomment to get warnings on using deprecated functions.
+ * Uncomment to get warnings on using deprecated functions and features.
  */
 //#define MBEDTLS_DEPRECATED_WARNING
 
 /**
  * \def MBEDTLS_DEPRECATED_REMOVED
  *
- * Remove deprecated functions so that they generate an error if used.
- * Functions deprecated in one version will usually be removed in the next
- * version. You can enable this to help you prepare the transition to a new
- * major version by making sure your code is not using these functions.
+ * Remove deprecated functions and features so that they generate an error if
+ * used. Functionality deprecated in one version will usually be removed in the
+ * next version. You can enable this to help you prepare the transition to a
+ * new major version by making sure your code is not using this functionality.
  *
- * Uncomment to get errors on using deprecated functions.
+ * Uncomment to get errors on using deprecated functions and features.
  */
 //#define MBEDTLS_DEPRECATED_REMOVED
 
@@ -319,7 +293,7 @@
  *   the function mbedtls_param_failed() in your application.
  *   See `platform_util.h` for its prototype.
  * - If you enable the macro #MBEDTLS_CHECK_PARAMS_ASSERT, then the
- *   library defines #MBEDTLS_PARAM_FAILED(\c cond) to be `assert(cond)`.
+ *   library defines MBEDTLS_PARAM_FAILED(\c cond) to be `assert(cond)`.
  *   You can still supply an alternative definition of
  *   MBEDTLS_PARAM_FAILED(), which may call `assert`.
  * - If you define a macro MBEDTLS_PARAM_FAILED() before including `config.h`
@@ -510,6 +484,11 @@
  * is still present and it is used for group structures not supported by the
  * alternative.
  *
+ * The original implementation can in addition be removed by setting the
+ * MBEDTLS_ECP_NO_FALLBACK option, in which case any function for which the
+ * corresponding MBEDTLS_ECP__FUNCTION_NAME__ALT macro is defined will not be
+ * able to fallback to curves not supported by the alternative implementation.
+ *
  * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT
  * and implementing the following functions:
  *      unsigned char mbedtls_internal_ecp_grp_capable(
@@ -523,21 +502,28 @@
  * called before and after each point operation and provide an opportunity to
  * implement optimized set up and tear down instructions.
  *
- * Example: In case you uncomment MBEDTLS_ECP_INTERNAL_ALT and
- * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac
- * function, but will use your mbedtls_internal_ecp_double_jac if the group is
- * supported (your mbedtls_internal_ecp_grp_capable function returns 1 when
- * receives it as an argument). If the group is not supported then the original
- * implementation is used. The other functions and the definition of
- * mbedtls_ecp_group and mbedtls_ecp_point will not change, so your
- * implementation of mbedtls_internal_ecp_double_jac and
- * mbedtls_internal_ecp_grp_capable must be compatible with this definition.
+ * Example: In case you set MBEDTLS_ECP_INTERNAL_ALT and
+ * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac()
+ * function, but will use your mbedtls_internal_ecp_double_jac() if the group
+ * for the operation is supported by your implementation (i.e. your
+ * mbedtls_internal_ecp_grp_capable() function returns 1 for this group). If the
+ * group is not supported by your implementation, then the original mbed TLS
+ * implementation of ecp_double_jac() is used instead, unless this fallback
+ * behaviour is disabled by setting MBEDTLS_ECP_NO_FALLBACK (in which case
+ * ecp_double_jac() will return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE).
+ *
+ * The function prototypes and the definition of mbedtls_ecp_group and
+ * mbedtls_ecp_point will not change based on MBEDTLS_ECP_INTERNAL_ALT, so your
+ * implementation of mbedtls_internal_ecp__function_name__ must be compatible
+ * with their definitions.
  *
  * Uncomment a macro to enable alternate implementation of the corresponding
  * function.
  */
 /* Required for all the functions in this section */
 //#define MBEDTLS_ECP_INTERNAL_ALT
+/* Turn off software fallback for curves not supported in hardware */
+//#define MBEDTLS_ECP_NO_FALLBACK
 /* Support for Weierstrass curves with Jacobi representation */
 //#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
 //#define MBEDTLS_ECP_ADD_MIXED_ALT
@@ -549,42 +535,6 @@
 //#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT
 //#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT
 
-/**
- * \def MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
- *
- * Enable testing of the constant-flow nature of some sensitive functions with
- * clang's MemorySanitizer. This causes some existing tests to also test
- * this non-functional property of the code under test.
- *
- * This setting requires compiling with clang -fsanitize=memory. The test
- * suites can then be run normally.
- *
- * \warning This macro is only used for extended testing; it is not considered
- * part of the library's API, so it may change or disappear at any time.
- *
- * Uncomment to enable testing of the constant-flow nature of selected code.
- */
-//#define MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
-
-/**
- * \def MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
- *
- * Enable testing of the constant-flow nature of some sensitive functions with
- * valgrind's memcheck tool. This causes some existing tests to also test
- * this non-functional property of the code under test.
- *
- * This setting requires valgrind headers for building, and is only useful for
- * testing if the tests suites are run with valgrind's memcheck. This can be
- * done for an individual test suite with 'valgrind ./test_suite_xxx', or when
- * using CMake, this can be done for all test suites with 'make memcheck'.
- *
- * \warning This macro is only used for extended testing; it is not considered
- * part of the library's API, so it may change or disappear at any time.
- *
- * Uncomment to enable testing of the constant-flow nature of selected code.
- */
-//#define MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
-
 /**
  * \def MBEDTLS_TEST_NULL_ENTROPY
  *
@@ -666,6 +616,29 @@
  */
 //#define MBEDTLS_CAMELLIA_SMALL_MEMORY
 
+/**
+ * \def MBEDTLS_CHECK_RETURN_WARNING
+ *
+ * If this macro is defined, emit a compile-time warning if application code
+ * calls a function without checking its return value, but the return value
+ * should generally be checked in portable applications.
+ *
+ * This is only supported on platforms where #MBEDTLS_CHECK_RETURN is
+ * implemented. Otherwise this option has no effect.
+ *
+ * Uncomment to get warnings on using fallible functions without checking
+ * their return value.
+ *
+ * \note  This feature is a work in progress.
+ *        Warnings will be added to more functions in the future.
+ *
+ * \note  A few functions are considered critical, and ignoring the return
+ *        value of these functions will trigger a warning even if this
+ *        macro is not defined. To completely disable return value check
+ *        warnings, define #MBEDTLS_CHECK_RETURN with an empty expansion.
+ */
+//#define MBEDTLS_CHECK_RETURN_WARNING
+
 /**
  * \def MBEDTLS_CIPHER_MODE_CBC
  *
@@ -816,6 +789,7 @@
  *
  * Comment macros to disable the curve and functions for it
  */
+/* Short Weierstrass curves (supporting ECP, ECDH, ECDSA) */
 #define MBEDTLS_ECP_DP_SECP192R1_ENABLED
 #define MBEDTLS_ECP_DP_SECP224R1_ENABLED
 #define MBEDTLS_ECP_DP_SECP256R1_ENABLED
@@ -827,6 +801,7 @@
 #define MBEDTLS_ECP_DP_BP256R1_ENABLED
 #define MBEDTLS_ECP_DP_BP384R1_ENABLED
 #define MBEDTLS_ECP_DP_BP512R1_ENABLED
+/* Montgomery curves (supporting ECP) */
 #define MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #define MBEDTLS_ECP_DP_CURVE448_ENABLED
 
@@ -849,11 +824,11 @@
  * against some side-channel attacks.
  *
  * This protection introduces a dependency of the ECP module on one of the
- * DRBG or SHA modules (HMAC-DRBG, CTR-DRBG, SHA-512 or SHA-256.) For very
- * constrained applications that don't require this protection (for example,
- * because you're only doing signature verification, so not manipulating any
- * secret, or because local/physical side-channel attacks are outside your
- * threat model), it might be desirable to get rid of that dependency.
+ * DRBG modules. For very constrained implementations that don't require this
+ * protection (for example, because you're only doing signature verification,
+ * so not manipulating any secret, or because local/physical side-channel
+ * attacks are outside your threat model), it might be desirable to get rid of
+ * that dependency.
  *
  * \warning Enabling this option makes some uses of ECP vulnerable to some
  * side-channel attacks. Only enable it if you know that's not a problem for
@@ -883,10 +858,39 @@
  *
  * \note  This option only works with the default software implementation of
  *        elliptic curve functionality. It is incompatible with
- *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT and MBEDTLS_ECDSA_XXX_ALT.
+ *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT, MBEDTLS_ECDSA_XXX_ALT
+ *        and MBEDTLS_ECDH_LEGACY_CONTEXT.
  */
 //#define MBEDTLS_ECP_RESTARTABLE
 
+/**
+ * \def MBEDTLS_ECDH_LEGACY_CONTEXT
+ *
+ * Use a backward compatible ECDH context.
+ *
+ * Mbed TLS supports two formats for ECDH contexts (#mbedtls_ecdh_context
+ * defined in `ecdh.h`). For most applications, the choice of format makes
+ * no difference, since all library functions can work with either format,
+ * except that the new format is incompatible with MBEDTLS_ECP_RESTARTABLE.
+
+ * The new format used when this option is disabled is smaller
+ * (56 bytes on a 32-bit platform). In future versions of the library, it
+ * will support alternative implementations of ECDH operations.
+ * The new format is incompatible with applications that access
+ * context fields directly and with restartable ECP operations.
+ *
+ * Define this macro if you enable MBEDTLS_ECP_RESTARTABLE or if you
+ * want to access ECDH context fields directly. Otherwise you should
+ * comment out this macro definition.
+ *
+ * This option has no effect if #MBEDTLS_ECDH_C is not enabled.
+ *
+ * \note This configuration option is experimental. Future versions of the
+ *       library may modify the way the ECDH context layout is configured
+ *       and may modify the layout of the new context type.
+ */
+#define MBEDTLS_ECDH_LEGACY_CONTEXT
+
 /**
  * \def MBEDTLS_ECDSA_DETERMINISTIC
  *
@@ -895,7 +899,7 @@
  * may result in a compromise of the long-term signing key. This is avoided by
  * the deterministic variant.
  *
- * Requires: MBEDTLS_HMAC_DRBG_C
+ * Requires: MBEDTLS_HMAC_DRBG_C, MBEDTLS_ECDSA_C
  *
  * Comment this macro to disable deterministic ECDSA.
  */
@@ -1114,7 +1118,7 @@
  *
  * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -1138,7 +1142,7 @@
  *
  * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -1289,6 +1293,18 @@
  */
 //#define MBEDTLS_ENTROPY_NV_SEED
 
+/* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+ *
+ * Enable key identifiers that encode a key owner identifier.
+ *
+ * The owner of a key is identified by a value of type ::mbedtls_key_owner_id_t
+ * which is currently hard-coded to be int32_t.
+ *
+ * Note that this option is meant for internal use only and may be removed
+ * without notice. It is incompatible with MBEDTLS_USE_PSA_CRYPTO.
+ */
+//#define MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+
 /**
  * \def MBEDTLS_MEMORY_DEBUG
  *
@@ -1345,6 +1361,114 @@
  */
 #define MBEDTLS_PKCS1_V21
 
+/** \def MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS
+ *
+ * Enable support for platform built-in keys. If you enable this feature,
+ * you must implement the function mbedtls_psa_platform_get_builtin_key().
+ * See the documentation of that function for more information.
+ *
+ * Built-in keys are typically derived from a hardware unique key or
+ * stored in a secure element.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C.
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS
+
+/** \def MBEDTLS_PSA_CRYPTO_CLIENT
+ *
+ * Enable support for PSA crypto client.
+ *
+ * \note This option allows to include the code necessary for a PSA
+ *       crypto client when the PSA crypto implementation is not included in
+ *       the library (MBEDTLS_PSA_CRYPTO_C disabled). The code included is the
+ *       code to set and get PSA key attributes.
+ *       The development of PSA drivers partially relying on the library to
+ *       fulfill the hardware gaps is another possible usage of this option.
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_CLIENT
+
+/** \def MBEDTLS_PSA_CRYPTO_DRIVERS
+ *
+ * Enable support for the experimental PSA crypto driver interface.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_DRIVERS
+
+/** \def MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG
+ *
+ * Make the PSA Crypto module use an external random generator provided
+ * by a driver, instead of Mbed TLS's entropy and DRBG modules.
+ *
+ * \note This random generator must deliver random numbers with cryptographic
+ *       quality and high performance. It must supply unpredictable numbers
+ *       with a uniform distribution. The implementation of this function
+ *       is responsible for ensuring that the random generator is seeded
+ *       with sufficient entropy. If you have a hardware TRNG which is slow
+ *       or delivers non-uniform output, declare it as an entropy source
+ *       with mbedtls_entropy_add_source() instead of enabling this option.
+ *
+ * If you enable this option, you must configure the type
+ * ::mbedtls_psa_external_random_context_t in psa/crypto_platform.h
+ * and define a function called mbedtls_psa_external_get_random()
+ * with the following prototype:
+ * ```
+ * psa_status_t mbedtls_psa_external_get_random(
+ *     mbedtls_psa_external_random_context_t *context,
+ *     uint8_t *output, size_t output_size, size_t *output_length);
+ * );
+ * ```
+ * The \c context value is initialized to 0 before the first call.
+ * The function must fill the \c output buffer with \p output_size bytes
+ * of random data and set \c *output_length to \p output_size.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ * \warning If you enable this option, code that uses the PSA cryptography
+ *          interface will not use any of the entropy sources set up for
+ *          the entropy module, nor the NV seed that MBEDTLS_ENTROPY_NV_SEED
+ *          enables.
+ *
+ * \note This option is experimental and may be removed without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_SPM
+ *
+ * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is built for SPM (Secure
+ * Partition Manager) integration which separates the code into two parts: a
+ * NSPE (Non-Secure Process Environment) and an SPE (Secure Process
+ * Environment).
+ *
+ * Module:  library/psa_crypto.c
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ */
+//#define MBEDTLS_PSA_CRYPTO_SPM
+
+/**
+ * \def MBEDTLS_PSA_INJECT_ENTROPY
+ *
+ * Enable support for entropy injection at first boot. This feature is
+ * required on systems that do not have a built-in entropy source (TRNG).
+ * This feature is currently not supported on systems that have a built-in
+ * entropy source.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_STORAGE_C, MBEDTLS_ENTROPY_NV_SEED
+ *
+ */
+//#define MBEDTLS_PSA_INJECT_ENTROPY
+
 /**
  * \def MBEDTLS_RSA_NO_CRT
  *
@@ -1379,6 +1503,28 @@
  */
 //#define MBEDTLS_SHA256_SMALLER
 
+/**
+ * \def MBEDTLS_SHA512_SMALLER
+ *
+ * Enable an implementation of SHA-512 that has lower ROM footprint but also
+ * lower performance.
+ *
+ * Uncomment to enable the smaller implementation of SHA512.
+ */
+//#define MBEDTLS_SHA512_SMALLER
+
+/**
+ * \def MBEDTLS_SHA512_NO_SHA384
+ *
+ * Disable the SHA-384 option of the SHA-512 module. Use this to save some
+ * code size on devices that don't use SHA-384.
+ *
+ * Requires: MBEDTLS_SHA512_C
+ *
+ * Uncomment to disable SHA-384
+ */
+//#define MBEDTLS_SHA512_NO_SHA384
+
 /**
  * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
  *
@@ -1393,6 +1539,48 @@
  */
 #define MBEDTLS_SSL_ALL_ALERT_MESSAGES
 
+/**
+ * \def MBEDTLS_SSL_RECORD_CHECKING
+ *
+ * Enable the function mbedtls_ssl_check_record() which can be used to check
+ * the validity and authenticity of an incoming record, to verify that it has
+ * not been seen before. These checks are performed without modifying the
+ * externally visible state of the SSL context.
+ *
+ * See mbedtls_ssl_check_record() for more information.
+ *
+ * Uncomment to enable support for record checking.
+ */
+#define MBEDTLS_SSL_RECORD_CHECKING
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CONNECTION_ID
+ *
+ * Enable support for the DTLS Connection ID extension
+ * (version draft-ietf-tls-dtls-connection-id-05,
+ * https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05)
+ * which allows to identify DTLS connections across changes
+ * in the underlying transport.
+ *
+ * Setting this option enables the SSL APIs `mbedtls_ssl_set_cid()`,
+ * `mbedtls_ssl_get_peer_cid()` and `mbedtls_ssl_conf_cid()`.
+ * See the corresponding documentation for more information.
+ *
+ * \warning The Connection ID extension is still in draft state.
+ *          We make no stability promises for the availability
+ *          or the shape of the API controlled by this option.
+ *
+ * The maximum lengths of outgoing and incoming CIDs can be configured
+ * through the options
+ * - MBEDTLS_SSL_CID_OUT_LEN_MAX
+ * - MBEDTLS_SSL_CID_IN_LEN_MAX.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment to enable the Connection ID extension.
+ */
+//#define MBEDTLS_SSL_DTLS_CONNECTION_ID
+
 /**
  * \def MBEDTLS_SSL_ASYNC_PRIVATE
  *
@@ -1404,6 +1592,33 @@
  */
 //#define MBEDTLS_SSL_ASYNC_PRIVATE
 
+/**
+ * \def MBEDTLS_SSL_CONTEXT_SERIALIZATION
+ *
+ * Enable serialization of the TLS context structures, through use of the
+ * functions mbedtls_ssl_context_save() and mbedtls_ssl_context_load().
+ *
+ * This pair of functions allows one side of a connection to serialize the
+ * context associated with the connection, then free or re-use that context
+ * while the serialized state is persisted elsewhere, and finally deserialize
+ * that state to a live context for resuming read/write operations on the
+ * connection. From a protocol perspective, the state of the connection is
+ * unaffected, in particular this is entirely transparent to the peer.
+ *
+ * Note: this is distinct from TLS session resumption, which is part of the
+ * protocol and fully visible by the peer. TLS session resumption enables
+ * establishing new connections associated to a saved session with shorter,
+ * lighter handshakes, while context serialization is a local optimization in
+ * handling a single, potentially long-lived connection.
+ *
+ * Enabling these APIs makes some SSL structures larger, as 64 extra bytes are
+ * saved after the handshake to allow for more efficient serialization, so if
+ * you don't need this feature you'll save RAM by disabling it.
+ *
+ * Comment to disable the context serialization APIs.
+ */
+#define MBEDTLS_SSL_CONTEXT_SERIALIZATION
+
 /**
  * \def MBEDTLS_SSL_DEBUG_ALL
  *
@@ -1440,8 +1655,8 @@
 
 /** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
  *
- * Enable support for Extended Master Secret, aka Session Hash
- * (draft-ietf-tls-session-hash-02).
+ * Enable support for RFC 7627: Session Hash and Extended Master Secret
+ * Extension.
  *
  * This was introduced as "the proper fix" to the Triple Handshake familiy of
  * attacks, but it is recommended to always use it (even if you disable
@@ -1459,7 +1674,8 @@
 /**
  * \def MBEDTLS_SSL_FALLBACK_SCSV
  *
- * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ * Enable support for RFC 7507: Fallback Signaling Cipher Suite Value (SCSV)
+ * for Preventing Protocol Downgrade Attacks.
  *
  * For servers, it is recommended to always enable this, unless you support
  * only one version of TLS, or know for sure that none of your clients
@@ -1473,12 +1689,37 @@
  */
 #define MBEDTLS_SSL_FALLBACK_SCSV
 
+/**
+ * \def MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+ *
+ * This option controls the availability of the API mbedtls_ssl_get_peer_cert()
+ * giving access to the peer's certificate after completion of the handshake.
+ *
+ * Unless you need mbedtls_ssl_peer_cert() in your application, it is
+ * recommended to disable this option for reduced RAM usage.
+ *
+ * \note If this option is disabled, mbedtls_ssl_get_peer_cert() is still
+ *       defined, but always returns \c NULL.
+ *
+ * \note This option has no influence on the protection against the
+ *       triple handshake attack. Even if it is disabled, Mbed TLS will
+ *       still ensure that certificates do not change during renegotiation,
+ *       for exaple by keeping a hash of the peer's certificate.
+ *
+ * Comment this macro to disable storing the peer's certificate
+ * after the handshake.
+ */
+#define MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+
 /**
  * \def MBEDTLS_SSL_HW_RECORD_ACCEL
  *
  * Enable hooking functions in SSL module for hardware acceleration of
  * individual records.
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Uncomment this macro to enable hooking functions.
  */
 //#define MBEDTLS_SSL_HW_RECORD_ACCEL
@@ -1523,6 +1764,9 @@
  * Enable support for receiving and parsing SSLv2 Client Hello messages for the
  * SSL Server module (MBEDTLS_SSL_SRV_C).
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Uncomment this macro to enable support for SSLv2 Client Hello messages.
  */
 //#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
@@ -1554,6 +1798,9 @@
  * Requires: MBEDTLS_MD5_C
  *           MBEDTLS_SHA1_C
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Comment this macro to disable support for SSL 3.0
  */
 //#define MBEDTLS_SSL_PROTO_SSL3
@@ -1594,6 +1841,25 @@
  */
 #define MBEDTLS_SSL_PROTO_TLS1_2
 
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL
+ *
+ * This macro is used to selectively enable experimental parts
+ * of the code that contribute to the ongoing development of
+ * the prototype TLS 1.3 and DTLS 1.3 implementation, and provide
+ * no other purpose.
+ *
+ * \warning TLS 1.3 and DTLS 1.3 aren't yet supported in Mbed TLS,
+ *          and no feature exposed through this macro is part of the
+ *          public API. In particular, features under the control
+ *          of this macro are experimental and don't come with any
+ *          stability guarantees.
+ *
+ * Uncomment this macro to enable experimental and partial
+ * functionality specific to TLS 1.3.
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL
+
 /**
  * \def MBEDTLS_SSL_PROTO_DTLS
  *
@@ -1651,6 +1917,37 @@
  */
 #define MBEDTLS_SSL_DTLS_HELLO_VERIFY
 
+/**
+ * \def MBEDTLS_SSL_DTLS_SRTP
+ *
+ * Enable support for negotiation of DTLS-SRTP (RFC 5764)
+ * through the use_srtp extension.
+ *
+ * \note This feature provides the minimum functionality required
+ * to negotiate the use of DTLS-SRTP and to allow the derivation of
+ * the associated SRTP packet protection key material.
+ * In particular, the SRTP packet protection itself, as well as the
+ * demultiplexing of RTP and DTLS packets at the datagram layer
+ * (see Section 5 of RFC 5764), are not handled by this feature.
+ * Instead, after successful completion of a handshake negotiating
+ * the use of DTLS-SRTP, the extended key exporter API
+ * mbedtls_ssl_conf_export_keys_ext_cb() should be used to implement
+ * the key exporter described in Section 4.2 of RFC 5764 and RFC 5705
+ * (this is implemented in the SSL example programs).
+ * The resulting key should then be passed to an SRTP stack.
+ *
+ * Setting this option enables the runtime API
+ * mbedtls_ssl_conf_dtls_srtp_protection_profiles()
+ * through which the supported DTLS-SRTP protection
+ * profiles can be configured. You must call this API at
+ * runtime if you wish to negotiate the use of DTLS-SRTP.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment this to enable support for use_srtp extension.
+ */
+//#define MBEDTLS_SSL_DTLS_SRTP
+
 /**
  * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
  *
@@ -1727,8 +2024,8 @@
  *
  * Fallback to old (pre-2.7), non-conforming implementation of the truncated
  * HMAC extension which also truncates the HMAC key. Note that this option is
- * only meant for a transitory upgrade period and is likely to be removed in
- * a future version of the library.
+ * only meant for a transitory upgrade period and will be removed in a future
+ * version of the library.
  *
  * \warning The old implementation is non-compliant and has a security weakness
  *          (2^80 brute force attack on the HMAC key used for a single,
@@ -1737,7 +2034,7 @@
  *          bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use
  *          the fixed implementation yet (pre-2.7).
  *
- * \deprecated This option is deprecated and will likely be removed in a
+ * \deprecated This option is deprecated and will be removed in a
  *             future version of Mbed TLS.
  *
  * Uncomment to fallback to old, non-compliant truncated HMAC implementation.
@@ -1746,6 +2043,52 @@
  */
 //#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
 
+/**
+ * \def MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+ *
+ * When this option is enabled, the SSL buffer will be resized automatically
+ * based on the negotiated maximum fragment length in each direction.
+ *
+ * Requires: MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ */
+//#define MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+
+/**
+ * \def MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
+ *
+ * Enable testing of the constant-flow nature of some sensitive functions with
+ * clang's MemorySanitizer. This causes some existing tests to also test
+ * this non-functional property of the code under test.
+ *
+ * This setting requires compiling with clang -fsanitize=memory. The test
+ * suites can then be run normally.
+ *
+ * \warning This macro is only used for extended testing; it is not considered
+ * part of the library's API, so it may change or disappear at any time.
+ *
+ * Uncomment to enable testing of the constant-flow nature of selected code.
+ */
+//#define MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
+
+/**
+ * \def MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
+ *
+ * Enable testing of the constant-flow nature of some sensitive functions with
+ * valgrind's memcheck tool. This causes some existing tests to also test
+ * this non-functional property of the code under test.
+ *
+ * This setting requires valgrind headers for building, and is only useful for
+ * testing if the tests suites are run with valgrind's memcheck. This can be
+ * done for an individual test suite with 'valgrind ./test_suite_xxx', or when
+ * using CMake, this can be done for all test suites with 'make memcheck'.
+ *
+ * \warning This macro is only used for extended testing; it is not considered
+ * part of the library's API, so it may change or disappear at any time.
+ *
+ * Uncomment to enable testing of the constant-flow nature of selected code.
+ */
+//#define MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
+
 /**
  * \def MBEDTLS_TEST_HOOKS
  *
@@ -1759,6 +2102,9 @@
  * risk of vulnerabilities, and more gadgets that can make exploits easier.
  * Therefore this feature must never be enabled in production.
  *
+ * See `docs/architecture/testing/mbed-crypto-invasive-testing.md` for more
+ * information.
+ *
  * Uncomment to enable invasive tests.
  */
 //#define MBEDTLS_TEST_HOOKS
@@ -1785,6 +2131,49 @@
  */
 //#define MBEDTLS_THREADING_PTHREAD
 
+/**
+ * \def MBEDTLS_USE_PSA_CRYPTO
+ *
+ * Make the X.509 and TLS library use PSA for cryptographic operations, and
+ * enable new APIs for using keys handled by PSA Crypto.
+ *
+ * \note Development of this option is currently in progress, and parts of Mbed
+ * TLS's X.509 and TLS modules are not ported to PSA yet. However, these parts
+ * will still continue to work as usual, so enabling this option should not
+ * break backwards compatibility.
+ *
+ * \note See docs/use-psa-crypto.md for a complete description of what this
+ * option currently does, and of parts that are not affected by it so far.
+ *
+ * \warning This option enables new Mbed TLS APIs which are currently
+ * considered experimental and may change in incompatible ways at any time.
+ * That is, the APIs enabled by this option are not covered by the usual
+ * promises of API stability.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C.
+ *
+ * Uncomment this to enable internal use of PSA Crypto and new associated APIs.
+ */
+//#define MBEDTLS_USE_PSA_CRYPTO
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_CONFIG
+ *
+ * This setting allows support for cryptographic mechanisms through the PSA
+ * API to be configured separately from support through the mbedtls API.
+ *
+ * Uncomment this to enable use of PSA Crypto configuration settings which
+ * can be found in include/psa/crypto_config.h.
+ *
+ * If you enable this option and write your own configuration file, you must
+ * include mbedtls/config_psa.h in your configuration file. The default
+ * provided mbedtls/config.h contains the necessary inclusion.
+ *
+ * This feature is still experimental and is not ready for production since
+ * it is not completed.
+ */
+//#define MBEDTLS_PSA_CRYPTO_CONFIG
+
 /**
  * \def MBEDTLS_VERSION_FEATURES
  *
@@ -1820,6 +2209,25 @@
  */
 //#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
 
+/**
+ * \def MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+ *
+ * If set, this enables the X.509 API `mbedtls_x509_crt_verify_with_ca_cb()`
+ * and the SSL API `mbedtls_ssl_conf_ca_cb()` which allow users to configure
+ * the set of trusted certificates through a callback instead of a linked
+ * list.
+ *
+ * This is useful for example in environments where a large number of trusted
+ * certificates is present and storing them in a linked list isn't efficient
+ * enough, or when the set of trusted certificates changes frequently.
+ *
+ * See the documentation of `mbedtls_x509_crt_verify_with_ca_cb()` and
+ * `mbedtls_ssl_conf_ca_cb()` for more information.
+ *
+ * Uncomment to enable trusted certificate callbacks.
+ */
+//#define MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+
 /**
  * \def MBEDTLS_X509_CHECK_KEY_USAGE
  *
@@ -2244,6 +2652,11 @@
  * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
  * ciphers.
  *
+ * \note When #MBEDTLS_CMAC_ALT is active, meaning that the underlying
+ *       implementation of the CMAC algorithm is provided by an alternate
+ *       implementation, that alternate implementation may opt to not support
+ *       AES-192 or 3DES as underlying block ciphers for the CMAC operation.
+ *
  * Module:  library/cmac.c
  *
  * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
@@ -2362,7 +2775,9 @@
  * This module is used by the following key exchanges:
  *      ECDHE-ECDSA
  *
- * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C,
+ *           and at least one MBEDTLS_ECP_DP_XXX_ENABLED for a
+ *           short Weierstrass curve.
  */
 #define MBEDTLS_ECDSA_C
 
@@ -2428,11 +2843,11 @@
 /**
  * \def MBEDTLS_GCM_C
  *
- * Enable the Galois/Counter Mode (GCM) for AES.
+ * Enable the Galois/Counter Mode (GCM).
  *
  * Module:  library/gcm.c
  *
- * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C or MBEDTLS_ARIA_C
  *
  * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
  * requisites are enabled as well.
@@ -2739,7 +3154,10 @@
 /**
  * \def MBEDTLS_PKCS11_C
  *
- * Enable wrapper for PKCS#11 smartcard support.
+ * Enable wrapper for PKCS#11 smartcard support via the pkcs11-helper library.
+ *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
  *
  * Module:  library/pkcs11.c
  * Caller:  library/pk.c
@@ -2797,6 +3215,61 @@
  */
 #define MBEDTLS_POLY1305_C
 
+/**
+ * \def MBEDTLS_PSA_CRYPTO_C
+ *
+ * Enable the Platform Security Architecture cryptography API.
+ *
+ * Module:  library/psa_crypto.c
+ *
+ * Requires: either MBEDTLS_CTR_DRBG_C and MBEDTLS_ENTROPY_C,
+ *           or MBEDTLS_HMAC_DRBG_C and MBEDTLS_ENTROPY_C,
+ *           or MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG.
+ *
+ */
+#define MBEDTLS_PSA_CRYPTO_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_SE_C
+ *
+ * Enable secure element support in the Platform Security Architecture
+ * cryptography API.
+ *
+ * \warning This feature is not yet suitable for production. It is provided
+ *          for API evaluation and testing purposes only.
+ *
+ * Module:  library/psa_crypto_se.c
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C, MBEDTLS_PSA_CRYPTO_STORAGE_C
+ *
+ */
+//#define MBEDTLS_PSA_CRYPTO_SE_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_STORAGE_C
+ *
+ * Enable the Platform Security Architecture persistent key storage.
+ *
+ * Module:  library/psa_crypto_storage.c
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C,
+ *           either MBEDTLS_PSA_ITS_FILE_C or a native implementation of
+ *           the PSA ITS interface
+ */
+#define MBEDTLS_PSA_CRYPTO_STORAGE_C
+
+/**
+ * \def MBEDTLS_PSA_ITS_FILE_C
+ *
+ * Enable the emulation of the Platform Security Architecture
+ * Internal Trusted Storage (PSA ITS) over files.
+ *
+ * Module:  library/psa_its_file.c
+ *
+ * Requires: MBEDTLS_FS_IO
+ */
+#define MBEDTLS_PSA_ITS_FILE_C
+
 /**
  * \def MBEDTLS_RIPEMD160_C
  *
@@ -3160,8 +3633,8 @@
 //#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT      384 /**< Maximum size of (re)seed buffer */
 
 /* ECP options */
-//#define MBEDTLS_ECP_MAX_BITS             521 /**< Maximum bit size of groups */
-//#define MBEDTLS_ECP_WINDOW_SIZE            6 /**< Maximum window size used */
+//#define MBEDTLS_ECP_MAX_BITS             521 /**< Maximum bit size of groups. Normally determined automatically from the configured curves. */
+//#define MBEDTLS_ECP_WINDOW_SIZE            4 /**< Maximum window size used */
 //#define MBEDTLS_ECP_FIXED_POINT_OPTIM      1 /**< Enable fixed-point speed-up */
 
 /* Entropy options */
@@ -3199,6 +3672,7 @@
 //#define MBEDTLS_PLATFORM_PRINTF_MACRO        printf /**< Default printf macro to use, can be undefined */
 /* Note: your snprintf must correctly zero-terminate the buffer! */
 //#define MBEDTLS_PLATFORM_SNPRINTF_MACRO    snprintf /**< Default snprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_VSNPRINTF_MACRO    vsnprintf /**< Default vsnprintf macro to use, can be undefined */
 //#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO   mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
 //#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO  mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
 
@@ -3238,6 +3712,53 @@
  */
 //#define MBEDTLS_PARAM_FAILED( cond )               assert( cond )
 
+/** \def MBEDTLS_CHECK_RETURN
+ *
+ * This macro is used at the beginning of the declaration of a function
+ * to indicate that its return value should be checked. It should
+ * instruct the compiler to emit a warning or an error if the function
+ * is called without checking its return value.
+ *
+ * There is a default implementation for popular compilers in platform_util.h.
+ * You can override the default implementation by defining your own here.
+ *
+ * If the implementation here is empty, this will effectively disable the
+ * checking of functions' return values.
+ */
+//#define MBEDTLS_CHECK_RETURN __attribute__((__warn_unused_result__))
+
+/** \def MBEDTLS_IGNORE_RETURN
+ *
+ * This macro requires one argument, which should be a C function call.
+ * If that function call would cause a #MBEDTLS_CHECK_RETURN warning, this
+ * warning is suppressed.
+ */
+//#define MBEDTLS_IGNORE_RETURN( result ) ((void) !(result))
+
+/* PSA options */
+/**
+ * Use HMAC_DRBG with the specified hash algorithm for HMAC_DRBG for the
+ * PSA crypto subsystem.
+ *
+ * If this option is unset:
+ * - If CTR_DRBG is available, the PSA subsystem uses it rather than HMAC_DRBG.
+ * - Otherwise, the PSA subsystem uses HMAC_DRBG with either
+ *   #MBEDTLS_MD_SHA512 or #MBEDTLS_MD_SHA256 based on availability and
+ *   on unspecified heuristics.
+ */
+//#define MBEDTLS_PSA_HMAC_DRBG_MD_TYPE MBEDTLS_MD_SHA256
+
+/** \def MBEDTLS_PSA_KEY_SLOT_COUNT
+ * Restrict the PSA library to supporting a maximum amount of simultaneously
+ * loaded keys. A loaded key is a key stored by the PSA Crypto core as a
+ * volatile key, or a persistent key which is loaded temporarily by the
+ * library as part of a crypto operation in flight.
+ *
+ * If this option is unset, the library will fall back to a default value of
+ * 32 keys.
+ */
+//#define MBEDTLS_PSA_KEY_SLOT_COUNT 32
+
 /* SSL Cache options */
 //#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT       86400 /**< 1 day  */
 //#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES      50 /**< Maximum entries in cache */
@@ -3295,6 +3816,53 @@
  */
 //#define MBEDTLS_SSL_IN_CONTENT_LEN              16384
 
+/** \def MBEDTLS_SSL_CID_IN_LEN_MAX
+ *
+ * The maximum length of CIDs used for incoming DTLS messages.
+ *
+ */
+//#define MBEDTLS_SSL_CID_IN_LEN_MAX 32
+
+/** \def MBEDTLS_SSL_CID_OUT_LEN_MAX
+ *
+ * The maximum length of CIDs used for outgoing DTLS messages.
+ *
+ */
+//#define MBEDTLS_SSL_CID_OUT_LEN_MAX 32
+
+/** \def MBEDTLS_SSL_CID_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * when using the Connection ID extension in DTLS 1.2.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ *
+ */
+//#define MBEDTLS_SSL_CID_PADDING_GRANULARITY 16
+
+/** \def MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * in TLS 1.3.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ */
+//#define MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY 1
+
 /** \def MBEDTLS_SSL_OUT_CONTENT_LEN
  *
  * Maximum length (in bytes) of outgoing plaintext fragments.
@@ -3324,7 +3892,7 @@
  * Maximum number of heap-allocated bytes for the purpose of
  * DTLS handshake message reassembly and future message buffering.
  *
- * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN
+ * This should be at least 9/8 * MBEDTLS_SSL_IN_CONTENT_LEN
  * to account for a reassembled handshake message of maximum size,
  * together with its reassembly bitmap.
  *
@@ -3340,6 +3908,17 @@
 //#define MBEDTLS_PSK_MAX_LEN               32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */
 //#define MBEDTLS_SSL_COOKIE_TIMEOUT        60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
 
+/** \def MBEDTLS_TLS_EXT_CID
+ *
+ * At the time of writing, the CID extension has not been assigned its
+ * final value. Set this configuration option to make Mbed TLS use a
+ * different value.
+ *
+ * A future minor revision of Mbed TLS may change the default value of
+ * this option to match evolving standards and usage.
+ */
+//#define MBEDTLS_TLS_EXT_CID                        254
+
 /**
  * Complete list of ciphersuites to use, in order of preference.
  *
@@ -3358,20 +3937,6 @@
 //#define MBEDTLS_X509_MAX_INTERMEDIATE_CA   8   /**< Maximum number of intermediate CAs in a verification chain. */
 //#define MBEDTLS_X509_MAX_FILE_PATH_LEN     512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */
 
-/**
- * Allow SHA-1 in the default TLS configuration for certificate signing.
- * Without this build-time option, SHA-1 support must be activated explicitly
- * through mbedtls_ssl_conf_cert_profile. Turning on this option is not
- * recommended because of it is possible to generate SHA-1 collisions, however
- * this may be safe for legacy infrastructure where additional controls apply.
- *
- * \warning   SHA-1 is considered a weak message digest and its use constitutes
- *            a security risk. If possible, we recommend avoiding dependencies
- *            on it, and considering stronger message digests instead.
- *
- */
-// #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES
-
 /**
  * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
  * signature and ciphersuite selection. Without this build-time option, SHA-1
@@ -3387,7 +3952,7 @@
  *            on it, and considering stronger message digests instead.
  *
  */
-#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
+//#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
 
 /**
  * Uncomment the macro to let mbed TLS use your alternate implementation of
@@ -3428,6 +3993,15 @@
  */
 //#define MBEDTLS_PLATFORM_GMTIME_R_ALT
 
+/**
+ * Enable the verified implementations of ECDH primitives from Project Everest
+ * (currently only Curve25519). This feature changes the layout of ECDH
+ * contexts and therefore is a compatibility break for applications that access
+ * fields of a mbedtls_ecdh_context structure directly. See also
+ * MBEDTLS_ECDH_LEGACY_CONTEXT in include/mbedtls/ecdh.h.
+ */
+//#define MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED
+
 /* \} name SECTION: Customisation configuration options */
 
 /* Target and application specific configurations
@@ -3439,6 +4013,10 @@
 #include MBEDTLS_USER_CONFIG_FILE
 #endif
 
-#include "check_config.h"
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+#include "mbedtls/config_psa.h"
+#endif
+
+#include "mbedtls/check_config.h"
 
 #endif /* MBEDTLS_CONFIG_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/config_psa.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/config_psa.h
new file mode 100644
index 00000000000..189f6c21734
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/config_psa.h
@@ -0,0 +1,836 @@
+/**
+ * \file mbedtls/config_psa.h
+ * \brief PSA crypto configuration options (set of defines)
+ *
+ *  This set of compile-time options takes settings defined in
+ *  include/mbedtls/config.h and include/psa/crypto_config.h and uses
+ *  those definitions to define symbols used in the library code.
+ *
+ *  Users and integrators should not edit this file, please edit
+ *  include/mbedtls/config.h for MBETLS_XXX settings or
+ *  include/psa/crypto_config.h for PSA_WANT_XXX settings.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CONFIG_PSA_H
+#define MBEDTLS_CONFIG_PSA_H
+
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+#include "psa/crypto_config.h"
+#endif /* defined(MBEDTLS_PSA_CRYPTO_CONFIG) */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+/****************************************************************/
+/* De facto synonyms */
+/****************************************************************/
+
+#if defined(PSA_WANT_ALG_ECDSA_ANY) && !defined(PSA_WANT_ALG_ECDSA)
+#define PSA_WANT_ALG_ECDSA PSA_WANT_ALG_ECDSA_ANY
+#elif !defined(PSA_WANT_ALG_ECDSA_ANY) && defined(PSA_WANT_ALG_ECDSA)
+#define PSA_WANT_ALG_ECDSA_ANY PSA_WANT_ALG_ECDSA
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW) && !defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW
+#elif !defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW) && defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW PSA_WANT_ALG_RSA_PKCS1V15_SIGN
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_PSS_ANY_SALT) && !defined(PSA_WANT_ALG_RSA_PSS)
+#define PSA_WANT_ALG_RSA_PSS PSA_WANT_ALG_RSA_PSS_ANY_SALT
+#elif !defined(PSA_WANT_ALG_RSA_PSS_ANY_SALT) && defined(PSA_WANT_ALG_RSA_PSS)
+#define PSA_WANT_ALG_RSA_PSS_ANY_SALT PSA_WANT_ALG_RSA_PSS
+#endif
+
+
+
+/****************************************************************/
+/* Require built-in implementations based on PSA requirements */
+/****************************************************************/
+
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+
+#if defined(PSA_WANT_ALG_DETERMINISTIC_ECDSA)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_DETERMINISTIC_ECDSA)
+#define MBEDTLS_PSA_BUILTIN_ALG_DETERMINISTIC_ECDSA 1
+#define MBEDTLS_ECDSA_DETERMINISTIC
+#define MBEDTLS_ECDSA_C
+#define MBEDTLS_HMAC_DRBG_C
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_DETERMINISTIC_ECDSA */
+#endif /* PSA_WANT_ALG_DETERMINISTIC_ECDSA */
+
+#if defined(PSA_WANT_ALG_ECDH)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_ECDH)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDH 1
+#define MBEDTLS_ECDH_C
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_ECDH */
+#endif /* PSA_WANT_ALG_ECDH */
+
+#if defined(PSA_WANT_ALG_ECDSA)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_ECDSA)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDSA 1
+#define MBEDTLS_ECDSA_C
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_ECDSA */
+#endif /* PSA_WANT_ALG_ECDSA */
+
+#if defined(PSA_WANT_ALG_HKDF)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_HKDF)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define MBEDTLS_PSA_BUILTIN_ALG_HKDF 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_HKDF */
+#endif /* PSA_WANT_ALG_HKDF */
+
+#if defined(PSA_WANT_ALG_HMAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_HMAC)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_HMAC */
+#endif /* PSA_WANT_ALG_HMAC */
+
+#if defined(PSA_WANT_ALG_MD2) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD2)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD2 1
+#define MBEDTLS_MD2_C
+#endif
+
+#if defined(PSA_WANT_ALG_MD4) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD4)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD4 1
+#define MBEDTLS_MD4_C
+#endif
+
+#if defined(PSA_WANT_ALG_MD5) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD5)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD5 1
+#define MBEDTLS_MD5_C
+#endif
+
+#if defined(PSA_WANT_ALG_RIPEMD160) && !defined(MBEDTLS_PSA_ACCEL_ALG_RIPEMD160)
+#define MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160 1
+#define MBEDTLS_RIPEMD160_C
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_OAEP)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_OAEP)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_OAEP 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V21
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_OAEP */
+#endif /* PSA_WANT_ALG_RSA_OAEP */
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_CRYPT)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_CRYPT)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_CRYPT 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V15
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_CRYPT */
+#endif /* PSA_WANT_ALG_RSA_PKCS1V15_CRYPT */
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_SIGN)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_SIGN 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V15
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_SIGN */
+#endif /* PSA_WANT_ALG_RSA_PKCS1V15_SIGN */
+
+#if defined(PSA_WANT_ALG_RSA_PSS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PSS)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PSS 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V21
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PSS */
+#endif /* PSA_WANT_ALG_RSA_PSS */
+
+#if defined(PSA_WANT_ALG_SHA_1) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_1)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_1 1
+#define MBEDTLS_SHA1_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_224) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_224)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_224 1
+#define MBEDTLS_SHA256_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_256) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_256)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_256 1
+#define MBEDTLS_SHA256_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_384) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_384)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_384 1
+#define MBEDTLS_SHA512_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_512) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_512)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_512 1
+#define MBEDTLS_SHA512_C
+#endif
+
+#if defined(PSA_WANT_ALG_TLS12_PRF)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_TLS12_PRF)
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_TLS12_PRF */
+#endif /* PSA_WANT_ALG_TLS12_PRF */
+
+#if defined(PSA_WANT_ALG_TLS12_PSK_TO_MS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_TLS12_PSK_TO_MS)
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_TLS12_PSK_TO_MS */
+#endif /* PSA_WANT_ALG_TLS12_PSK_TO_MS */
+
+#if defined(PSA_WANT_KEY_TYPE_ECC_KEY_PAIR)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_KEY_PAIR)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_KEY_PAIR 1
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_KEY_PAIR */
+#endif /* PSA_WANT_KEY_TYPE_ECC_KEY_PAIR */
+
+#if defined(PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_PUBLIC_KEY)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_PUBLIC_KEY 1
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_PUBLIC_KEY */
+#endif /* PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY */
+
+#if defined(PSA_WANT_KEY_TYPE_RSA_KEY_PAIR)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_KEY_PAIR)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_KEY_PAIR 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_GENPRIME
+#define MBEDTLS_PK_PARSE_C
+#define MBEDTLS_PK_WRITE_C
+#define MBEDTLS_PK_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_KEY_PAIR */
+#endif /* PSA_WANT_KEY_TYPE_RSA_KEY_PAIR */
+
+#if defined(PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_PUBLIC_KEY)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_PUBLIC_KEY 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PK_PARSE_C
+#define MBEDTLS_PK_WRITE_C
+#define MBEDTLS_PK_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_PUBLIC_KEY */
+#endif /* PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY */
+
+/* If any of the block modes are requested that don't have an
+ * associated HW assist, define PSA_HAVE_SOFT_BLOCK_MODE for checking
+ * in the block cipher key types. */
+#if (defined(PSA_WANT_ALG_CTR) && !defined(MBEDTLS_PSA_ACCEL_ALG_CTR)) || \
+    (defined(PSA_WANT_ALG_CFB) && !defined(MBEDTLS_PSA_ACCEL_ALG_CFB)) || \
+    (defined(PSA_WANT_ALG_OFB) && !defined(MBEDTLS_PSA_ACCEL_ALG_OFB)) || \
+    (defined(PSA_WANT_ALG_XTS) && !defined(MBEDTLS_PSA_ACCEL_ALG_XTS)) || \
+    defined(PSA_WANT_ALG_ECB_NO_PADDING) || \
+    (defined(PSA_WANT_ALG_CBC_NO_PADDING) && \
+     !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_NO_PADDING)) || \
+    (defined(PSA_WANT_ALG_CBC_PKCS7) && \
+     !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_PKCS7)) || \
+    (defined(PSA_WANT_ALG_CMAC) && !defined(MBEDTLS_PSA_ACCEL_ALG_CMAC))
+#define PSA_HAVE_SOFT_BLOCK_MODE 1
+#endif
+
+#if (defined(PSA_WANT_ALG_GCM) && !defined(MBEDTLS_PSA_ACCEL_ALG_GCM)) || \
+    (defined(PSA_WANT_ALG_CCM) && !defined(MBEDTLS_PSA_ACCEL_ALG_CCM))
+#define PSA_HAVE_SOFT_BLOCK_AEAD 1
+#endif
+
+#if defined(PSA_WANT_KEY_TYPE_AES)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_AES)
+#define PSA_HAVE_SOFT_KEY_TYPE_AES 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_AES */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_AES 1
+#define MBEDTLS_AES_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_AES || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_AES */
+
+#if defined(PSA_WANT_KEY_TYPE_ARC4)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ARC4)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARC4 1
+#define MBEDTLS_ARC4_C
+#endif /*!MBEDTLS_PSA_ACCEL_KEY_TYPE_ARC4 */
+#endif /* PSA_WANT_KEY_TYPE_ARC4 */
+
+#if defined(PSA_WANT_KEY_TYPE_ARIA)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ARIA)
+#define PSA_HAVE_SOFT_KEY_TYPE_ARIA 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ARIA */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARIA 1
+#define MBEDTLS_ARIA_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_ARIA || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_ARIA */
+
+#if defined(PSA_WANT_KEY_TYPE_CAMELLIA)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_CAMELLIA)
+#define PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_CAMELLIA */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CAMELLIA 1
+#define MBEDTLS_CAMELLIA_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_CAMELLIA */
+
+#if defined(PSA_WANT_KEY_TYPE_DES)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_DES)
+#define PSA_HAVE_SOFT_KEY_TYPE_DES 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_DES */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_DES) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_DES 1
+#define MBEDTLS_DES_C
+#endif /*PSA_HAVE_SOFT_KEY_TYPE_DES || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_DES */
+
+#if defined(PSA_WANT_KEY_TYPE_CHACHA20)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_CHACHA20)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CHACHA20 1
+#define MBEDTLS_CHACHA20_C
+#endif /*!MBEDTLS_PSA_ACCEL_KEY_TYPE_CHACHA20 */
+#endif /* PSA_WANT_KEY_TYPE_CHACHA20 */
+
+/* If any of the software block ciphers are selected, define
+ * PSA_HAVE_SOFT_BLOCK_CIPHER, which can be used in any of these
+ * situations. */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_DES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define PSA_HAVE_SOFT_BLOCK_CIPHER 1
+#endif
+
+#if defined(PSA_WANT_ALG_STREAM_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#endif /* PSA_WANT_ALG_STREAM_CIPHER */
+
+#if defined(PSA_WANT_ALG_CBC_MAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_MAC)
+#error "CBC-MAC is not yet supported via the PSA API in Mbed TLS."
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_MAC 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CBC_MAC */
+#endif /* PSA_WANT_ALG_CBC_MAC */
+
+#if defined(PSA_WANT_ALG_CMAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CMAC) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CMAC 1
+#define MBEDTLS_CMAC_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CMAC */
+#endif /* PSA_WANT_ALG_CMAC */
+
+#if defined(PSA_WANT_ALG_CTR)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CTR) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CTR 1
+#define MBEDTLS_CIPHER_MODE_CTR
+#endif
+#endif /* PSA_WANT_ALG_CTR */
+
+#if defined(PSA_WANT_ALG_CFB)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CFB) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CFB 1
+#define MBEDTLS_CIPHER_MODE_CFB
+#endif
+#endif /* PSA_WANT_ALG_CFB */
+
+#if defined(PSA_WANT_ALG_OFB)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_OFB) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_OFB 1
+#define MBEDTLS_CIPHER_MODE_OFB
+#endif
+#endif /* PSA_WANT_ALG_OFB */
+
+#if defined(PSA_WANT_ALG_XTS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_XTS) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_XTS 1
+#define MBEDTLS_CIPHER_MODE_XTS
+#endif
+#endif /* PSA_WANT_ALG_XTS */
+
+#if defined(PSA_WANT_ALG_ECB_NO_PADDING)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING 1
+#endif
+
+#if defined(PSA_WANT_ALG_CBC_NO_PADDING)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_NO_PADDING) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_CIPHER_MODE_CBC
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING 1
+#endif
+#endif /* PSA_WANT_ALG_CBC_NO_PADDING */
+
+#if defined(PSA_WANT_ALG_CBC_PKCS7)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_PKCS7) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_CIPHER_MODE_CBC
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7 1
+#define MBEDTLS_CIPHER_PADDING_PKCS7
+#endif
+#endif /* PSA_WANT_ALG_CBC_PKCS7 */
+
+#if defined(PSA_WANT_ALG_CCM)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CCM) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define MBEDTLS_PSA_BUILTIN_ALG_CCM 1
+#define MBEDTLS_CCM_C
+#endif
+#endif /* PSA_WANT_ALG_CCM */
+
+#if defined(PSA_WANT_ALG_GCM)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_GCM) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define MBEDTLS_PSA_BUILTIN_ALG_GCM 1
+#define MBEDTLS_GCM_C
+#endif
+#endif /* PSA_WANT_ALG_GCM */
+
+#if defined(PSA_WANT_ALG_CHACHA20_POLY1305)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CHACHA20_POLY1305)
+#if defined(PSA_WANT_KEY_TYPE_CHACHA20)
+#define MBEDTLS_CHACHAPOLY_C
+#define MBEDTLS_PSA_BUILTIN_ALG_CHACHA20_POLY1305 1
+#endif /* PSA_WANT_KEY_TYPE_CHACHA20 */
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CHACHA20_POLY1305 */
+#endif /* PSA_WANT_ALG_CHACHA20_POLY1305 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_256)
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_256 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_256 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_384)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_384)
+#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_384 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_384 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_384 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_512)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_512)
+#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_512 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_512 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_512 */
+
+#if defined(PSA_WANT_ECC_MONTGOMERY_255)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_255)
+#define MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_255 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_255 */
+#endif /* PSA_WANT_ECC_MONTGOMERY_255 */
+
+#if defined(PSA_WANT_ECC_MONTGOMERY_448)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_448)
+/*
+ * Curve448 is not yet supported via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/4249).
+ */
+#error "Curve448 is not yet supported via the PSA API in Mbed TLS."
+#define MBEDTLS_ECP_DP_CURVE448_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_448 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_448 */
+#endif /* PSA_WANT_ECC_MONTGOMERY_448 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_192)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_192)
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_192 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_192 */
+#endif /* PSA_WANT_ECC_SECP_R1_192 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_224)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_224)
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_224 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_224 */
+#endif /* PSA_WANT_ECC_SECP_R1_224 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_256)
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_256 */
+#endif /* PSA_WANT_ECC_SECP_R1_256 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_384)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_384)
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_384 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_384 */
+#endif /* PSA_WANT_ECC_SECP_R1_384 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_521)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_521)
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_521 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_521 */
+#endif /* PSA_WANT_ECC_SECP_R1_521 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_192)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_192)
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_192 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_192 */
+#endif /* PSA_WANT_ECC_SECP_K1_192 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_224)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_224)
+/*
+ * SECP224K1 is buggy via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/3541).
+ */
+#error "SECP224K1 is buggy via the PSA API in Mbed TLS."
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_224 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_224 */
+#endif /* PSA_WANT_ECC_SECP_K1_224 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_256)
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_256 */
+#endif /* PSA_WANT_ECC_SECP_K1_256 */
+
+
+
+/****************************************************************/
+/* Infer PSA requirements from Mbed TLS capabilities */
+/****************************************************************/
+
+#else /* MBEDTLS_PSA_CRYPTO_CONFIG */
+
+/*
+ * Ensure PSA_WANT_* defines are setup properly if MBEDTLS_PSA_CRYPTO_CONFIG
+ * is not defined
+ */
+
+#if defined(MBEDTLS_CCM_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_CCM 1
+#define PSA_WANT_ALG_CCM 1
+#endif /* MBEDTLS_CCM_C */
+
+#if defined(MBEDTLS_CMAC_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_CMAC 1
+#define PSA_WANT_ALG_CMAC 1
+#endif /* MBEDTLS_CMAC_C */
+
+#if defined(MBEDTLS_ECDH_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDH 1
+#define PSA_WANT_ALG_ECDH 1
+#endif /* MBEDTLS_ECDH_C */
+
+#if defined(MBEDTLS_ECDSA_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDSA 1
+#define PSA_WANT_ALG_ECDSA 1
+#define PSA_WANT_ALG_ECDSA_ANY 1
+
+// Only add in DETERMINISTIC support if ECDSA is also enabled
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+#define MBEDTLS_PSA_BUILTIN_ALG_DETERMINISTIC_ECDSA 1
+#define PSA_WANT_ALG_DETERMINISTIC_ECDSA 1
+#endif /* MBEDTLS_ECDSA_DETERMINISTIC */
+
+#endif /* MBEDTLS_ECDSA_C */
+
+#if defined(MBEDTLS_ECP_C)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_KEY_PAIR 1
+#define PSA_WANT_KEY_TYPE_ECC_KEY_PAIR 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_PUBLIC_KEY 1
+#define PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY 1
+#endif /* MBEDTLS_ECP_C */
+
+#if defined(MBEDTLS_GCM_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_GCM 1
+#define PSA_WANT_ALG_GCM 1
+#endif /* MBEDTLS_GCM_C */
+
+#if defined(MBEDTLS_HKDF_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define PSA_WANT_ALG_HMAC 1
+#define MBEDTLS_PSA_BUILTIN_ALG_HKDF 1
+#define PSA_WANT_ALG_HKDF 1
+#endif /* MBEDTLS_HKDF_C */
+
+#if defined(MBEDTLS_MD_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define PSA_WANT_ALG_HMAC 1
+#define PSA_WANT_KEY_TYPE_HMAC
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF 1
+#define PSA_WANT_ALG_TLS12_PRF 1
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS 1
+#define PSA_WANT_ALG_TLS12_PSK_TO_MS 1
+#endif /* MBEDTLS_MD_C */
+
+#if defined(MBEDTLS_MD2_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD2 1
+#define PSA_WANT_ALG_MD2 1
+#endif
+
+#if defined(MBEDTLS_MD4_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD4 1
+#define PSA_WANT_ALG_MD4 1
+#endif
+
+#if defined(MBEDTLS_MD5_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD5 1
+#define PSA_WANT_ALG_MD5 1
+#endif
+
+#if defined(MBEDTLS_RIPEMD160_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160 1
+#define PSA_WANT_ALG_RIPEMD160 1
+#endif
+
+#if defined(MBEDTLS_RSA_C)
+#if defined(MBEDTLS_PKCS1_V15)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_CRYPT 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_CRYPT 1
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_SIGN 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW 1
+#endif /* MBEDTLS_PKCS1_V15 */
+#if defined(MBEDTLS_PKCS1_V21)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_OAEP 1
+#define PSA_WANT_ALG_RSA_OAEP 1
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PSS 1
+#define PSA_WANT_ALG_RSA_PSS 1
+#endif /* MBEDTLS_PKCS1_V21 */
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_KEY_PAIR 1
+#define PSA_WANT_KEY_TYPE_RSA_KEY_PAIR 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_PUBLIC_KEY 1
+#define PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY 1
+#endif /* MBEDTLS_RSA_C */
+
+#if defined(MBEDTLS_SHA1_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_1 1
+#define PSA_WANT_ALG_SHA_1 1
+#endif
+
+#if defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_224 1
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_256 1
+#define PSA_WANT_ALG_SHA_224 1
+#define PSA_WANT_ALG_SHA_256 1
+#endif
+
+#if defined(MBEDTLS_SHA512_C)
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_384 1
+#define PSA_WANT_ALG_SHA_384 1
+#endif
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_512 1
+#define PSA_WANT_ALG_SHA_512 1
+#endif
+
+#if defined(MBEDTLS_AES_C)
+#define PSA_WANT_KEY_TYPE_AES 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_AES 1
+#endif
+
+#if defined(MBEDTLS_ARC4_C)
+#define PSA_WANT_KEY_TYPE_ARC4 1
+#define PSA_WANT_ALG_STREAM_CIPHER 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARC4 1
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#endif
+
+#if defined(MBEDTLS_ARIA_C)
+#define PSA_WANT_KEY_TYPE_ARIA 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARIA 1
+#endif
+
+#if defined(MBEDTLS_CAMELLIA_C)
+#define PSA_WANT_KEY_TYPE_CAMELLIA 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CAMELLIA 1
+#endif
+
+#if defined(MBEDTLS_DES_C)
+#define PSA_WANT_KEY_TYPE_DES 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_DES 1
+#endif
+
+#if defined(MBEDTLS_CHACHA20_C)
+#define PSA_WANT_KEY_TYPE_CHACHA20 1
+#define PSA_WANT_ALG_STREAM_CIPHER 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CHACHA20 1
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#if defined(MBEDTLS_CHACHAPOLY_C)
+#define PSA_WANT_ALG_CHACHA20_POLY1305 1
+#define MBEDTLS_PSA_BUILTIN_ALG_CHACHA20_POLY1305 1
+#endif
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING 1
+#define PSA_WANT_ALG_CBC_NO_PADDING 1
+#if defined(MBEDTLS_CIPHER_PADDING_PKCS7)
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7 1
+#define PSA_WANT_ALG_CBC_PKCS7 1
+#endif
+#endif
+
+#if defined(MBEDTLS_AES_C) || defined(MBEDTLS_DES_C) || \
+    defined(MBEDTLS_ARIA_C) || defined(MBEDTLS_CAMELLIA_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING 1
+#define PSA_WANT_ALG_ECB_NO_PADDING 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+#define MBEDTLS_PSA_BUILTIN_ALG_CFB 1
+#define PSA_WANT_ALG_CFB 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+#define MBEDTLS_PSA_BUILTIN_ALG_CTR 1
+#define PSA_WANT_ALG_CTR 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_OFB)
+#define MBEDTLS_PSA_BUILTIN_ALG_OFB 1
+#define PSA_WANT_ALG_OFB 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+#define MBEDTLS_PSA_BUILTIN_ALG_XTS 1
+#define PSA_WANT_ALG_XTS 1
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_256 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_256
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_384 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_384
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_512 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_512
+#endif
+
+#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_255 1
+#define PSA_WANT_ECC_MONTGOMERY_255
+#endif
+
+/* Curve448 is not yet supported via the PSA API (https://github.com/ARMmbed/mbedtls/issues/4249) */
+#if 0 && defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_448 1
+#define PSA_WANT_ECC_MONTGOMERY_448
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_192 1
+#define PSA_WANT_ECC_SECP_R1_192
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_224 1
+#define PSA_WANT_ECC_SECP_R1_224
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_256 1
+#define PSA_WANT_ECC_SECP_R1_256
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_384 1
+#define PSA_WANT_ECC_SECP_R1_384
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_521 1
+#define PSA_WANT_ECC_SECP_R1_521
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_192 1
+#define PSA_WANT_ECC_SECP_K1_192
+#endif
+
+/* SECP224K1 is buggy via the PSA API (https://github.com/ARMmbed/mbedtls/issues/3541) */
+#if 0 && defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_224 1
+#define PSA_WANT_ECC_SECP_K1_224
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_256 1
+#define PSA_WANT_ECC_SECP_K1_256
+#endif
+
+#endif /* MBEDTLS_PSA_CRYPTO_CONFIG */
+
+/* These features are always enabled. */
+#define PSA_WANT_KEY_TYPE_DERIVE 1
+#define PSA_WANT_KEY_TYPE_RAW_DATA 1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CONFIG_PSA_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/constant_time.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/constant_time.h
new file mode 100644
index 00000000000..c5de57a01f0
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/constant_time.h
@@ -0,0 +1,45 @@
+/**
+ *  Constant-time functions
+ *
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CONSTANT_TIME_H
+#define MBEDTLS_CONSTANT_TIME_H
+
+#include <stddef.h>
+
+
+/** Constant-time buffer comparison without branches.
+ *
+ * This is equivalent to the standard memcmp function, but is likely to be
+ * compiled to code using bitwise operation rather than a branch.
+ *
+ * This function can be used to write constant-time code by replacing branches
+ * with bit operations using masks.
+ *
+ * \param a     Pointer to the first buffer.
+ * \param b     Pointer to the second buffer.
+ * \param n     The number of bytes to compare in the buffer.
+ *
+ * \return      Zero if the content of the two buffer is the same,
+ *              otherwise non-zero.
+ */
+int mbedtls_ct_memcmp( const void *a,
+                       const void *b,
+                       size_t n );
+
+#endif /* MBEDTLS_CONSTANT_TIME_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
index 6c099adf4d3..dc4adc896d4 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
@@ -12,40 +12,18 @@
  * The Mbed TLS implementation of CTR_DRBG uses AES-256 (default) or AES-128
  * (if \c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY is enabled at compile time)
  * as the underlying block cipher, with a derivation function.
- * The initial seeding grabs #MBEDTLS_CTR_DRBG_ENTROPY_LEN bytes of entropy.
- * See the documentation of mbedtls_ctr_drbg_seed() for more details.
- *
- * Based on NIST SP 800-90A §10.2.1 table 3 and NIST SP 800-57 part 1 table 2,
- * here are the security strengths achieved in typical configuration:
- * - 256 bits under the default configuration of the library, with AES-256
- *   and with #MBEDTLS_CTR_DRBG_ENTROPY_LEN set to 48 or more.
- * - 256 bits if AES-256 is used, #MBEDTLS_CTR_DRBG_ENTROPY_LEN is set
- *   to 32 or more, and the DRBG is initialized with an explicit
- *   nonce in the \c custom parameter to mbedtls_ctr_drbg_seed().
- * - 128 bits if AES-256 is used but #MBEDTLS_CTR_DRBG_ENTROPY_LEN is
- *   between 24 and 47 and the DRBG is not initialized with an explicit
- *   nonce (see mbedtls_ctr_drbg_seed()).
- * - 128 bits if AES-128 is used (\c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY enabled)
- *   and #MBEDTLS_CTR_DRBG_ENTROPY_LEN is set to 24 or more (which is
- *   always the case unless it is explicitly set to a different value
- *   in config.h).
- *
- * Note that the value of #MBEDTLS_CTR_DRBG_ENTROPY_LEN defaults to:
- * - \c 48 if the module \c MBEDTLS_SHA512_C is enabled and the symbol
- *   \c MBEDTLS_ENTROPY_FORCE_SHA256 is disabled at compile time.
- *   This is the default configuration of the library.
- * - \c 32 if the module \c MBEDTLS_SHA512_C is disabled at compile time.
- * - \c 32 if \c MBEDTLS_ENTROPY_FORCE_SHA256 is enabled at compile time.
+ *
+ * The security strength as defined in NIST SP 800-90A is
+ * 128 bits when AES-128 is used (\c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY enabled)
+ * and 256 bits otherwise, provided that #MBEDTLS_CTR_DRBG_ENTROPY_LEN is
+ * kept at its default value (and not overridden in config.h) and that the
+ * DRBG instance is set up with default parameters.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more
+ * information.
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -58,48 +36,31 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CTR_DRBG_H
 #define MBEDTLS_CTR_DRBG_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "aes.h"
+#include "mbedtls/aes.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
-#define MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED        -0x0034  /**< The entropy source failed. */
-#define MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG              -0x0036  /**< The requested random buffer length is too big. */
-#define MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG                -0x0038  /**< The input (entropy + additional data) is too large. */
-#define MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR                -0x003A  /**< Read or write error in file. */
+/** The entropy source failed. */
+#define MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED        -0x0034
+/** The requested random buffer length is too big. */
+#define MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG              -0x0036
+/** The input (entropy + additional data) is too large. */
+#define MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG                -0x0038
+/** Read or write error in file. */
+#define MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR                -0x003A
 
 #define MBEDTLS_CTR_DRBG_BLOCKSIZE          16 /**< The block size used by the cipher. */
 
@@ -188,20 +149,49 @@
 extern "C" {
 #endif
 
+#if MBEDTLS_CTR_DRBG_ENTROPY_LEN >= MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2
+/** The default length of the nonce read from the entropy source.
+ *
+ * This is \c 0 because a single read from the entropy source is sufficient
+ * to include a nonce.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more information.
+ */
+#define MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN 0
+#else
+/** The default length of the nonce read from the entropy source.
+ *
+ * This is half of the default entropy length because a single read from
+ * the entropy source does not provide enough material to form a nonce.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more information.
+ */
+#define MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN ( MBEDTLS_CTR_DRBG_ENTROPY_LEN + 1 ) / 2
+#endif
+
 /**
  * \brief          The CTR_DRBG context structure.
  */
 typedef struct mbedtls_ctr_drbg_context
 {
     unsigned char counter[16];  /*!< The counter (V). */
-    int reseed_counter;         /*!< The reseed counter. */
+    int reseed_counter;         /*!< The reseed counter.
+                                 * This is the number of requests that have
+                                 * been made since the last (re)seeding,
+                                 * minus one.
+                                 * Before the initial seeding, this field
+                                 * contains the amount of entropy in bytes
+                                 * to use as a nonce for the initial seeding,
+                                 * or -1 if no nonce length has been explicitly
+                                 * set (see mbedtls_ctr_drbg_set_nonce_len()).
+                                 */
     int prediction_resistance;  /*!< This determines whether prediction
                                      resistance is enabled, that is
                                      whether to systematically reseed before
                                      each random generation. */
     size_t entropy_len;         /*!< The amount of entropy grabbed on each
-                                     seed or reseed operation. */
-    int reseed_interval;        /*!< The reseed interval. */
+                                     seed or reseed operation, in bytes. */
+    int reseed_interval;        /*!< The reseed interval.
+                                 * This is the maximum number of requests
+                                 * that can be made between reseedings. */
 
     mbedtls_aes_context aes_ctx;        /*!< The AES context. */
 
@@ -254,34 +244,35 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  * The entropy length is #MBEDTLS_CTR_DRBG_ENTROPY_LEN by default.
  * You can override it by calling mbedtls_ctr_drbg_set_entropy_len().
  *
- * You can provide a personalization string in addition to the
+ * The entropy nonce length is:
+ * - \c 0 if the entropy length is at least 3/2 times the entropy length,
+ *   which guarantees that the security strength is the maximum permitted
+ *   by the key size and entropy length according to NIST SP 800-90A §10.2.1;
+ * - Half the entropy length otherwise.
+ * You can override it by calling mbedtls_ctr_drbg_set_nonce_len().
+ * With the default entropy length, the entropy nonce length is
+ * #MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN.
+ *
+ * You can provide a nonce and personalization string in addition to the
  * entropy source, to make this instantiation as unique as possible.
+ * See SP 800-90A §8.6.7 for more details about nonces.
  *
- * \note                The _seed_material_ value passed to the derivation
- *                      function in the CTR_DRBG Instantiate Process
- *                      described in NIST SP 800-90A §10.2.1.3.2
- *                      is the concatenation of the string obtained from
- *                      calling \p f_entropy and the \p custom string.
- *                      The origin of the nonce depends on the value of
- *                      the entropy length relative to the security strength.
- *                      - If the entropy length is at least 1.5 times the
- *                        security strength then the nonce is taken from the
- *                        string obtained with \p f_entropy.
- *                      - If the entropy length is less than the security
- *                        strength, then the nonce is taken from \p custom.
- *                        In this case, for compliance with SP 800-90A,
- *                        you must pass a unique value of \p custom at
- *                        each invocation. See SP 800-90A §8.6.7 for more
- *                        details.
- */
-#if MBEDTLS_CTR_DRBG_ENTROPY_LEN < MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2
-/** \warning            When #MBEDTLS_CTR_DRBG_ENTROPY_LEN is less than
- *                      #MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2, to achieve the
- *                      maximum security strength permitted by CTR_DRBG,
- *                      you must pass a value of \p custom that is a nonce:
- *                      this value must never be repeated in subsequent
- *                      runs of the same application or on a different
- *                      device.
+ * The _seed_material_ value passed to the derivation function in
+ * the CTR_DRBG Instantiate Process described in NIST SP 800-90A §10.2.1.3.2
+ * is the concatenation of the following strings:
+ * - A string obtained by calling \p f_entropy function for the entropy
+ *   length.
+ */
+#if MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN == 0
+/**
+ * - If mbedtls_ctr_drbg_set_nonce_len() has been called, a string
+ *   obtained by calling \p f_entropy function for the specified length.
+ */
+#else
+/**
+ * - A string obtained by calling \p f_entropy function for the entropy nonce
+ *   length. If the entropy nonce length is \c 0, this function does not
+ *   make a second call to \p f_entropy.
  */
 #endif
 #if defined(MBEDTLS_THREADING_C)
@@ -294,6 +285,23 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  */
 #endif /* MBEDTLS_THREADING_C */
 /**
+ * - The \p custom string.
+ *
+ * \note                To achieve the nominal security strength permitted
+ *                      by CTR_DRBG, the entropy length must be:
+ *                      - at least 16 bytes for a 128-bit strength
+ *                      (maximum achievable strength when using AES-128);
+ *                      - at least 32 bytes for a 256-bit strength
+ *                      (maximum achievable strength when using AES-256).
+ *
+ *                      In addition, if you do not pass a nonce in \p custom,
+ *                      the sum of the entropy length
+ *                      and the entropy nonce length must be:
+ *                      - at least 24 bytes for a 128-bit strength
+ *                      (maximum achievable strength when using AES-128);
+ *                      - at least 48 bytes for a 256-bit strength
+ *                      (maximum achievable strength when using AES-256).
+ *
  * \param ctx           The CTR_DRBG context to seed.
  *                      It must have been initialized with
  *                      mbedtls_ctr_drbg_init().
@@ -308,7 +316,7 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  *                      \p p_entropy context, the buffer to fill, and the
  *                      length of the buffer.
  *                      \p f_entropy is always called with a buffer size
- *                      equal to the entropy length.
+ *                      less than or equal to the entropy length.
  * \param p_entropy     The entropy context to pass to \p f_entropy.
  * \param custom        The personalization string.
  *                      This can be \c NULL, in which case the personalization
@@ -371,11 +379,35 @@ void mbedtls_ctr_drbg_set_prediction_resistance( mbedtls_ctr_drbg_context *ctx,
  *
  * \param ctx           The CTR_DRBG context.
  * \param len           The amount of entropy to grab, in bytes.
- *                      This must be at most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT.
+ *                      This must be at most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT
+ *                      and at most the maximum length accepted by the
+ *                      entropy function that is set in the context.
  */
 void mbedtls_ctr_drbg_set_entropy_len( mbedtls_ctr_drbg_context *ctx,
                                size_t len );
 
+/**
+ * \brief               This function sets the amount of entropy grabbed
+ *                      as a nonce for the initial seeding.
+ *
+ * Call this function before calling mbedtls_ctr_drbg_seed() to read
+ * a nonce from the entropy source during the initial seeding.
+ *
+ * \param ctx           The CTR_DRBG context.
+ * \param len           The amount of entropy to grab for the nonce, in bytes.
+ *                      This must be at most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT
+ *                      and at most the maximum length accepted by the
+ *                      entropy function that is set in the context.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG if \p len is
+ *                      more than #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED
+ *                      if the initial seeding has already taken place.
+ */
+int mbedtls_ctr_drbg_set_nonce_len( mbedtls_ctr_drbg_context *ctx,
+                                    size_t len );
+
 /**
  * \brief               This function sets the reseed interval.
  *
@@ -417,10 +449,10 @@ int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx,
 /**
  * \brief              This function updates the state of the CTR_DRBG context.
  *
- * \note               This function is not thread-safe. It is not safe
- *                     to call this function if another thread might be
- *                     concurrently obtaining random numbers from the same
- *                     context or updating or reseeding the same context.
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
  *
  * \param ctx          The CTR_DRBG context.
  * \param additional   The data to update the state with. This must not be
@@ -572,11 +604,6 @@ int mbedtls_ctr_drbg_self_test( int verbose );
 
 #endif /* MBEDTLS_SELF_TEST */
 
-/* Internal functions (do not call directly) */
-int mbedtls_ctr_drbg_seed_entropy_len( mbedtls_ctr_drbg_context *,
-                               int (*)(void *, unsigned char *, size_t), void *,
-                               const unsigned char *, size_t, size_t );
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/debug.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/debug.h
index abc2d4f07ca..3c08244f3da 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/debug.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/debug.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_DEBUG_H
 #define MBEDTLS_DEBUG_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #if defined(MBEDTLS_ECP_C)
-#include "ecp.h"
+#include "mbedtls/ecp.h"
 #endif
 
 #if defined(MBEDTLS_DEBUG_C)
@@ -107,6 +80,55 @@
 
 #endif /* MBEDTLS_DEBUG_C */
 
+/**
+ * \def MBEDTLS_PRINTF_ATTRIBUTE
+ *
+ * Mark a function as having printf attributes, and thus enable checking
+ * via -wFormat and other flags. This does nothing on builds with compilers
+ * that do not support the format attribute
+ *
+ * Module:  library/debug.c
+ * Caller:
+ *
+ * This module provides debugging functions.
+ */
+#if defined(__has_attribute)
+#if __has_attribute(format)
+#if defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 1
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)    \
+    __attribute__((__format__ (gnu_printf, string_index, first_to_check)))
+#else /* defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 1 */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)    \
+    __attribute__((format(printf, string_index, first_to_check)))
+#endif
+#else /* __has_attribute(format) */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)
+#endif /* __has_attribute(format) */
+#else /* defined(__has_attribute) */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)
+#endif
+
+/**
+ * \def MBEDTLS_PRINTF_SIZET
+ *
+ * MBEDTLS_PRINTF_xxx: Due to issues with older window compilers
+ * and MinGW we need to define the printf specifier for size_t
+ * and long long per platform.
+ *
+ * Module:  library/debug.c
+ * Caller:
+ *
+ * This module provides debugging functions.
+ */
+#if (defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800)
+   #include <inttypes.h>
+   #define MBEDTLS_PRINTF_SIZET     PRIuPTR
+   #define MBEDTLS_PRINTF_LONGLONG  "I64d"
+#else /* (defined(__MINGW32__)  && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800) */
+   #define MBEDTLS_PRINTF_SIZET     "zu"
+   #define MBEDTLS_PRINTF_LONGLONG  "lld"
+#endif /* (defined(__MINGW32__)  && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800) */
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -145,7 +167,7 @@ void mbedtls_debug_set_threshold( int threshold );
  */
 void mbedtls_debug_print_msg( const mbedtls_ssl_context *ssl, int level,
                               const char *file, int line,
-                              const char *format, ... );
+                              const char *format, ... ) MBEDTLS_PRINTF_ATTRIBUTE(5, 6);
 
 /**
  * \brief   Print the return value of a function to the debug output. This
@@ -287,4 +309,3 @@ void mbedtls_debug_printf_ecdh( const mbedtls_ssl_context *ssl, int level,
 #endif
 
 #endif /* debug.h */
-
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/des.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/des.h
index ee24f659459..325aab53644 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/des.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/des.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -29,36 +23,16 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_DES_H
 #define MBEDTLS_DES_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
+#include "mbedtls/platform_util.h"
 
 #include <stddef.h>
 #include <stdint.h>
@@ -66,10 +40,12 @@
 #define MBEDTLS_DES_ENCRYPT     1
 #define MBEDTLS_DES_DECRYPT     0
 
-#define MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH              -0x0032  /**< The data input has an invalid length. */
+/** The data input has an invalid length. */
+#define MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH              -0x0032
 
 /* MBEDTLS_ERR_DES_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_DES_HW_ACCEL_FAILED                   -0x0033  /**< DES hardware accelerator failed. */
+/** DES hardware accelerator failed. */
+#define MBEDTLS_ERR_DES_HW_ACCEL_FAILED                   -0x0033
 
 #define MBEDTLS_DES_KEY_SIZE    8
 
@@ -171,6 +147,7 @@ void mbedtls_des_key_set_parity( unsigned char key[MBEDTLS_DES_KEY_SIZE] );
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_key_check_key_parity( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -184,6 +161,7 @@ int mbedtls_des_key_check_key_parity( const unsigned char key[MBEDTLS_DES_KEY_SI
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_key_check_weak( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -198,6 +176,7 @@ int mbedtls_des_key_check_weak( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_setkey_enc( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -212,6 +191,7 @@ int mbedtls_des_setkey_enc( mbedtls_des_context *ctx, const unsigned char key[MB
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_setkey_dec( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -222,6 +202,7 @@ int mbedtls_des_setkey_dec( mbedtls_des_context *ctx, const unsigned char key[MB
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set2key_enc( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] );
 
@@ -233,6 +214,7 @@ int mbedtls_des3_set2key_enc( mbedtls_des3_context *ctx,
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set2key_dec( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] );
 
@@ -244,6 +226,7 @@ int mbedtls_des3_set2key_dec( mbedtls_des3_context *ctx,
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set3key_enc( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] );
 
@@ -255,6 +238,7 @@ int mbedtls_des3_set3key_enc( mbedtls_des3_context *ctx,
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set3key_dec( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] );
 
@@ -271,6 +255,7 @@ int mbedtls_des3_set3key_dec( mbedtls_des3_context *ctx,
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_crypt_ecb( mbedtls_des_context *ctx,
                     const unsigned char input[8],
                     unsigned char output[8] );
@@ -298,6 +283,7 @@ int mbedtls_des_crypt_ecb( mbedtls_des_context *ctx,
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_crypt_cbc( mbedtls_des_context *ctx,
                     int mode,
                     size_t length,
@@ -315,6 +301,7 @@ int mbedtls_des_crypt_cbc( mbedtls_des_context *ctx,
  *
  * \return         0 if successful
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_crypt_ecb( mbedtls_des3_context *ctx,
                      const unsigned char input[8],
                      unsigned char output[8] );
@@ -340,6 +327,7 @@ int mbedtls_des3_crypt_ecb( mbedtls_des3_context *ctx,
  *
  * \return         0 if successful, or MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_crypt_cbc( mbedtls_des3_context *ctx,
                      int mode,
                      size_t length,
@@ -370,6 +358,7 @@ void mbedtls_des_setkey( uint32_t SK[32],
  *
  * \return         0 if successful, or 1 if the test failed
  */
+MBEDTLS_CHECK_RETURN_CRITICAL
 int mbedtls_des_self_test( int verbose );
 
 #endif /* MBEDTLS_SELF_TEST */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/dhm.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/dhm.h
index 11042efb556..c4b15a2c452 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/dhm.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/dhm.h
@@ -45,13 +45,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -64,56 +58,46 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_DHM_H
 #define MBEDTLS_DHM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 /*
  * DHM Error codes
  */
-#define MBEDTLS_ERR_DHM_BAD_INPUT_DATA                    -0x3080  /**< Bad input parameters. */
-#define MBEDTLS_ERR_DHM_READ_PARAMS_FAILED                -0x3100  /**< Reading of the DHM parameters failed. */
-#define MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED                -0x3180  /**< Making of the DHM parameters failed. */
-#define MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED                -0x3200  /**< Reading of the public values failed. */
-#define MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED                -0x3280  /**< Making of the public value failed. */
-#define MBEDTLS_ERR_DHM_CALC_SECRET_FAILED                -0x3300  /**< Calculation of the DHM secret failed. */
-#define MBEDTLS_ERR_DHM_INVALID_FORMAT                    -0x3380  /**< The ASN.1 data is not formatted correctly. */
-#define MBEDTLS_ERR_DHM_ALLOC_FAILED                      -0x3400  /**< Allocation of memory failed. */
-#define MBEDTLS_ERR_DHM_FILE_IO_ERROR                     -0x3480  /**< Read or write of file failed. */
+/** Bad input parameters. */
+#define MBEDTLS_ERR_DHM_BAD_INPUT_DATA                    -0x3080
+/** Reading of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_READ_PARAMS_FAILED                -0x3100
+/** Making of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED                -0x3180
+/** Reading of the public values failed. */
+#define MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED                -0x3200
+/** Making of the public value failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED                -0x3280
+/** Calculation of the DHM secret failed. */
+#define MBEDTLS_ERR_DHM_CALC_SECRET_FAILED                -0x3300
+/** The ASN.1 data is not formatted correctly. */
+#define MBEDTLS_ERR_DHM_INVALID_FORMAT                    -0x3380
+/** Allocation of memory failed. */
+#define MBEDTLS_ERR_DHM_ALLOC_FAILED                      -0x3400
+/** Read or write of file failed. */
+#define MBEDTLS_ERR_DHM_FILE_IO_ERROR                     -0x3480
 
 /* MBEDTLS_ERR_DHM_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_DHM_HW_ACCEL_FAILED                   -0x3500  /**< DHM hardware accelerator failed. */
+/** DHM hardware accelerator failed. */
+#define MBEDTLS_ERR_DHM_HW_ACCEL_FAILED                   -0x3500
 
-#define MBEDTLS_ERR_DHM_SET_GROUP_FAILED                  -0x3580  /**< Setting the modulus and generator failed. */
+/** Setting the modulus and generator failed. */
+#define MBEDTLS_ERR_DHM_SET_GROUP_FAILED                  -0x3580
 
 #ifdef __cplusplus
 extern "C" {
@@ -323,7 +307,6 @@ int mbedtls_dhm_calc_secret( mbedtls_dhm_context *ctx,
 void mbedtls_dhm_free( mbedtls_dhm_context *ctx );
 
 #if defined(MBEDTLS_ASN1_PARSE_C)
-/** \ingroup x509_module */
 /**
  * \brief             This function parses DHM parameters in PEM or DER format.
  *
@@ -342,7 +325,6 @@ int mbedtls_dhm_parse_dhm( mbedtls_dhm_context *dhm, const unsigned char *dhmin,
                            size_t dhminlen );
 
 #if defined(MBEDTLS_FS_IO)
-/** \ingroup x509_module */
 /**
  * \brief          This function loads and parses DHM parameters from a file.
  *
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecdh.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecdh.h
index b9324bc4964..05855cdf10b 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecdh.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecdh.h
@@ -14,13 +14,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,51 +27,23 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ECDH_H
 #define MBEDTLS_ECDH_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ecp.h"
+#include "mbedtls/ecp.h"
 
-/*
- * Use a backward compatible ECDH context.
- *
- * This flag is always enabled for now and future versions might add a
- * configuration option that conditionally undefines this flag.
- * The configuration option in question may have a different name.
- *
- * Features undefining this flag, must have a warning in their description in
- * config.h stating that the feature breaks backward compatibility.
- */
-#define MBEDTLS_ECDH_LEGACY_CONTEXT
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+#undef MBEDTLS_ECDH_LEGACY_CONTEXT
+#include "everest/everest.h"
+#endif
 
 #ifdef __cplusplus
 extern "C" {
@@ -103,6 +69,9 @@ typedef enum
 {
     MBEDTLS_ECDH_VARIANT_NONE = 0,   /*!< Implementation not defined. */
     MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0,/*!< The default Mbed TLS implementation */
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+    MBEDTLS_ECDH_VARIANT_EVEREST     /*!< Everest implementation */
+#endif
 } mbedtls_ecdh_variant;
 
 /**
@@ -156,6 +125,9 @@ typedef struct mbedtls_ecdh_context
     union
     {
         mbedtls_ecdh_context_mbed   mbed_ecdh;
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+        mbedtls_ecdh_context_everest everest_ecdh;
+#endif
     } ctx;                      /*!< Implementation-specific context. The
                                   context in use is specified by the \c var
                                   field. */
@@ -170,6 +142,15 @@ typedef struct mbedtls_ecdh_context
 }
 mbedtls_ecdh_context;
 
+/**
+ * \brief          Check whether a given group can be used for ECDH.
+ *
+ * \param gid      The ECP group ID to check.
+ *
+ * \return         \c 1 if the group can be used, \c 0 otherwise
+ */
+int mbedtls_ecdh_can_do( mbedtls_ecp_group_id gid );
+
 /**
  * \brief           This function generates an ECDH keypair on an elliptic
  *                  curve.
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h
index da02b278643..264a638bb52 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h
@@ -12,13 +12,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -31,60 +25,44 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ECDSA_H
 #define MBEDTLS_ECDSA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ecp.h"
-#include "md.h"
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
 
-/*
- * RFC-4492 page 20:
+/**
+ * \brief           Maximum ECDSA signature size for a given curve bit size
  *
+ * \param bits      Curve size in bits
+ * \return          Maximum signature size in bytes
+ *
+ * \note            This macro returns a compile-time constant if its argument
+ *                  is one. It may evaluate its argument multiple times.
+ */
+/*
  *     Ecdsa-Sig-Value ::= SEQUENCE {
  *         r       INTEGER,
  *         s       INTEGER
  *     }
  *
- * Size is at most
- *    1 (tag) + 1 (len) + 1 (initial 0) + ECP_MAX_BYTES for each of r and s,
- *    twice that + 1 (tag) + 2 (len) for the sequence
- * (assuming ECP_MAX_BYTES is less than 126 for r and s,
- * and less than 124 (total len <= 255) for the sequence)
+ * For each of r and s, the value (V) may include an extra initial "0" bit.
  */
-#if MBEDTLS_ECP_MAX_BYTES > 124
-#error "MBEDTLS_ECP_MAX_BYTES bigger than expected, please fix MBEDTLS_ECDSA_MAX_LEN"
-#endif
+#define MBEDTLS_ECDSA_MAX_SIG_LEN( bits )                               \
+    ( /*T,L of SEQUENCE*/ ( ( bits ) >= 61 * 8 ? 3 : 2 ) +              \
+      /*T,L of r,s*/        2 * ( ( ( bits ) >= 127 * 8 ? 3 : 2 ) +     \
+      /*V of r,s*/                ( ( bits ) + 8 ) / 8 ) )
+
 /** The maximal size of an ECDSA signature in Bytes. */
-#define MBEDTLS_ECDSA_MAX_LEN  ( 3 + 2 * ( 3 + MBEDTLS_ECP_MAX_BYTES ) )
+#define MBEDTLS_ECDSA_MAX_LEN  MBEDTLS_ECDSA_MAX_SIG_LEN( MBEDTLS_ECP_MAX_BITS )
 
 #ifdef __cplusplus
 extern "C" {
@@ -145,6 +123,16 @@ typedef void mbedtls_ecdsa_restart_ctx;
 
 #endif /* MBEDTLS_ECP_RESTARTABLE */
 
+/**
+ * \brief          This function checks whether a given group can be used
+ *                 for ECDSA.
+ *
+ * \param gid      The ECP group ID to check.
+ *
+ * \return         \c 1 if the group can be used, \c 0 otherwise
+ */
+int mbedtls_ecdsa_can_do( mbedtls_ecp_group_id gid );
+
 /**
  * \brief           This function computes the ECDSA signature of a
  *                  previously-hashed message.
@@ -186,6 +174,12 @@ int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s,
                 int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
 
 #if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
 /**
  * \brief           This function computes the ECDSA signature of a
  *                  previously-hashed message, deterministic version.
@@ -237,7 +231,10 @@ int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s,
 int mbedtls_ecdsa_sign_det( mbedtls_ecp_group *grp, mbedtls_mpi *r,
                             mbedtls_mpi *s, const mbedtls_mpi *d,
                             const unsigned char *buf, size_t blen,
-                            mbedtls_md_type_t md_alg );
+                            mbedtls_md_type_t md_alg ) MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
 /**
  * \brief           This function computes the ECDSA signature of a
  *                  previously-hashed message, deterministic version.
@@ -278,12 +275,11 @@ int mbedtls_ecdsa_sign_det( mbedtls_ecp_group *grp, mbedtls_mpi *r,
  *                  error code on failure.
  */
 int mbedtls_ecdsa_sign_det_ext( mbedtls_ecp_group *grp, mbedtls_mpi *r,
-                                mbedtls_mpi *s, const mbedtls_mpi *d,
-                                const unsigned char *buf, size_t blen,
-                                mbedtls_md_type_t md_alg,
-                                int (*f_rng_blind)(void *, unsigned char *,
-                                                   size_t),
-                                void *p_rng_blind );
+                            mbedtls_mpi *s, const mbedtls_mpi *d,
+                            const unsigned char *buf, size_t blen,
+                            mbedtls_md_type_t md_alg,
+                            int (*f_rng_blind)(void *, unsigned char *, size_t),
+                            void *p_rng_blind );
 #endif /* MBEDTLS_ECDSA_DETERMINISTIC */
 
 /**
@@ -362,7 +358,8 @@ int mbedtls_ecdsa_verify( mbedtls_ecp_group *grp,
  *                  the signature written. Must not be \c NULL.
  * \param f_rng     The RNG function. This must not be \c NULL if
  *                  #MBEDTLS_ECDSA_DETERMINISTIC is unset. Otherwise,
- *                  it is unused and may be set to \c NULL.
+ *                  it is used only for blinding and may be set to \c NULL, but
+ *                  doing so is DEPRECATED.
  * \param p_rng     The RNG context to be passed to \p f_rng. This may be
  *                  \c NULL if \p f_rng is \c NULL or doesn't use a context.
  *
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h
index a9b68d00c61..891705d8c4f 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ECJPAKE_H
 #define MBEDTLS_ECJPAKE_H
@@ -66,13 +39,13 @@
  * also be use outside TLS.
  */
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ecp.h"
-#include "md.h"
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp.h
index e4a1ed81cf0..0924341e002 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp.h
@@ -16,13 +16,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -35,56 +29,65 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ECP_H
 #define MBEDTLS_ECP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 /*
  * ECP error codes
  */
-#define MBEDTLS_ERR_ECP_BAD_INPUT_DATA                    -0x4F80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL                  -0x4F00  /**< The buffer is too small to write to. */
-#define MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE               -0x4E80  /**< The requested feature is not available, for example, the requested curve is not supported. */
-#define MBEDTLS_ERR_ECP_VERIFY_FAILED                     -0x4E00  /**< The signature is not valid. */
-#define MBEDTLS_ERR_ECP_ALLOC_FAILED                      -0x4D80  /**< Memory allocation failed. */
-#define MBEDTLS_ERR_ECP_RANDOM_FAILED                     -0x4D00  /**< Generation of random value, such as ephemeral key, failed. */
-#define MBEDTLS_ERR_ECP_INVALID_KEY                       -0x4C80  /**< Invalid private or public key. */
-#define MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH                  -0x4C00  /**< The buffer contains a valid signature followed by more data. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_ECP_BAD_INPUT_DATA                    -0x4F80
+/** The buffer is too small to write to. */
+#define MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL                  -0x4F00
+/** The requested feature is not available, for example, the requested curve is not supported. */
+#define MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE               -0x4E80
+/** The signature is not valid. */
+#define MBEDTLS_ERR_ECP_VERIFY_FAILED                     -0x4E00
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_ECP_ALLOC_FAILED                      -0x4D80
+/** Generation of random value, such as ephemeral key, failed. */
+#define MBEDTLS_ERR_ECP_RANDOM_FAILED                     -0x4D00
+/** Invalid private or public key. */
+#define MBEDTLS_ERR_ECP_INVALID_KEY                       -0x4C80
+/** The buffer contains a valid signature followed by more data. */
+#define MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH                  -0x4C00
 
 /* MBEDTLS_ERR_ECP_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_ECP_HW_ACCEL_FAILED                   -0x4B80  /**< The ECP hardware accelerator failed. */
-
-#define MBEDTLS_ERR_ECP_IN_PROGRESS                       -0x4B00  /**< Operation in progress, call again with the same parameters to continue. */
+/** The ECP hardware accelerator failed. */
+#define MBEDTLS_ERR_ECP_HW_ACCEL_FAILED                   -0x4B80
+
+/** Operation in progress, call again with the same parameters to continue. */
+#define MBEDTLS_ERR_ECP_IN_PROGRESS                       -0x4B00
+
+/* Flags indicating whether to include code that is specific to certain
+ * types of curves. These flags are for internal library use only. */
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED
+#endif
+#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_ECP_MONTGOMERY_ENABLED
+#endif
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +102,21 @@ extern "C" {
  * parameters. Therefore, only standardized domain parameters from trusted
  * sources should be used. See mbedtls_ecp_group_load().
  */
+/* Note: when adding a new curve:
+ * - Add it at the end of this enum, otherwise you'll break the ABI by
+ *   changing the numerical value for existing curves.
+ * - Increment MBEDTLS_ECP_DP_MAX below if needed.
+ * - Update the calculation of MBEDTLS_ECP_MAX_BITS_MIN below.
+ * - Add the corresponding MBEDTLS_ECP_DP_xxx_ENABLED macro definition to
+ *   config.h.
+ * - List the curve as a dependency of MBEDTLS_ECP_C and
+ *   MBEDTLS_ECDSA_C if supported in check_config.h.
+ * - Add the curve to the appropriate curve type macro
+ *   MBEDTLS_ECP_yyy_ENABLED above.
+ * - Add the necessary definitions to ecp_curves.c.
+ * - Add the curve to the ecp_supported_curves array in ecp.c.
+ * - Add the curve to applicable profiles in x509_crt.c if applicable.
+ */
 typedef enum
 {
     MBEDTLS_ECP_DP_NONE = 0,       /*!< Curve not defined. */
@@ -124,6 +142,16 @@ typedef enum
  */
 #define MBEDTLS_ECP_DP_MAX     12
 
+/*
+ * Curve types
+ */
+typedef enum
+{
+    MBEDTLS_ECP_TYPE_NONE = 0,
+    MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS,    /* y^2 = x^3 + a x + b      */
+    MBEDTLS_ECP_TYPE_MONTGOMERY,           /* y^2 = x^3 + a x^2 + x    */
+} mbedtls_ecp_curve_type;
+
 /**
  * Curve information, for use by other modules.
  */
@@ -268,11 +296,17 @@ mbedtls_ecp_group;
 #error "MBEDTLS_ECP_MAX_BITS is smaller than the largest supported curve"
 #endif
 
-#else
+#elif defined(MBEDTLS_ECP_C)
 /**
  * The maximum size of the groups, that is, of \c N and \c P.
  */
-#define MBEDTLS_ECP_MAX_BITS     521   /**< The maximum size of groups, in bits. */
+#define MBEDTLS_ECP_MAX_BITS     MBEDTLS_ECP_MAX_BITS_MIN
+
+#else
+/* MBEDTLS_ECP_MAX_BITS is not relevant without MBEDTLS_ECP_C, but set it
+ * to a nonzero value so that code that unconditionally allocates an array
+ * of a size based on it keeps working if built without ECC support. */
+#define MBEDTLS_ECP_MAX_BITS 1
 #endif
 
 #define MBEDTLS_ECP_MAX_BYTES    ( ( MBEDTLS_ECP_MAX_BITS + 7 ) / 8 )
@@ -281,7 +315,8 @@ mbedtls_ecp_group;
 #if !defined(MBEDTLS_ECP_WINDOW_SIZE)
 /*
  * Maximum "window" size used for point multiplication.
- * Default: 6.
+ * Default: a point where higher memory usage yields disminishing performance
+ *          returns.
  * Minimum value: 2. Maximum value: 7.
  *
  * Result is an array of at most ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) )
@@ -298,7 +333,7 @@ mbedtls_ecp_group;
  *      224       475     475     453     398     342
  *      192       640     640     633     587     476
  */
-#define MBEDTLS_ECP_WINDOW_SIZE    6   /**< The maximum window size used. */
+#define MBEDTLS_ECP_WINDOW_SIZE    4   /**< The maximum window size used. */
 #endif /* MBEDTLS_ECP_WINDOW_SIZE */
 
 #if !defined(MBEDTLS_ECP_FIXED_POINT_OPTIM)
@@ -482,10 +517,20 @@ void mbedtls_ecp_set_max_ops( unsigned max_ops );
 int mbedtls_ecp_restart_is_enabled( void );
 #endif /* MBEDTLS_ECP_RESTARTABLE */
 
+/*
+ * Get the type of a curve
+ */
+mbedtls_ecp_curve_type mbedtls_ecp_get_type( const mbedtls_ecp_group *grp );
+
 /**
  * \brief           This function retrieves the information defined in
- *                  mbedtls_ecp_curve_info() for all supported curves in order
- *                  of preference.
+ *                  mbedtls_ecp_curve_info() for all supported curves.
+ *
+ * \note            This function returns information about all curves
+ *                  supported by the library. Some curves may not be
+ *                  supported for all algorithms. Call mbedtls_ecdh_can_do()
+ *                  or mbedtls_ecdsa_can_do() to check if a curve is
+ *                  supported for ECDH or ECDSA.
  *
  * \return          A statically allocated array. The last entry is 0.
  */
@@ -496,6 +541,12 @@ const mbedtls_ecp_curve_info *mbedtls_ecp_curve_list( void );
  *                  identifiers of all supported curves in the order of
  *                  preference.
  *
+ * \note            This function returns information about all curves
+ *                  supported by the library. Some curves may not be
+ *                  supported for all algorithms. Call mbedtls_ecdh_can_do()
+ *                  or mbedtls_ecdsa_can_do() to check if a curve is
+ *                  supported for ECDH or ECDSA.
+ *
  * \return          A statically allocated array,
  *                  terminated with MBEDTLS_ECP_DP_NONE.
  */
@@ -691,6 +742,9 @@ int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix,
  * \param P         The point to export. This must be initialized.
  * \param format    The point format. This must be either
  *                  #MBEDTLS_ECP_PF_COMPRESSED or #MBEDTLS_ECP_PF_UNCOMPRESSED.
+ *                  (For groups without these formats, this parameter is
+ *                  ignored. But it still has to be either of the above
+ *                  values.)
  * \param olen      The address at which to store the length of
  *                  the output in Bytes. This must not be \c NULL.
  * \param buf       The output buffer. This must be a writable buffer
@@ -700,11 +754,14 @@ int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix,
  * \return          \c 0 on success.
  * \return          #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the output buffer
  *                  is too small to hold the point.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the point format
+ *                  or the export for the given group is not implemented.
  * \return          Another negative error code on other kinds of failure.
  */
-int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *P,
-                            int format, size_t *olen,
-                            unsigned char *buf, size_t buflen );
+int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp,
+                                    const mbedtls_ecp_point *P,
+                                    int format, size_t *olen,
+                                    unsigned char *buf, size_t buflen );
 
 /**
  * \brief           This function imports a point from unsigned binary data.
@@ -725,8 +782,8 @@ int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, const mbedtls_
  * \return          \c 0 on success.
  * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the input is invalid.
  * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
- * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the point format
- *                  is not implemented.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the import for the
+ *                  given group is not implemented.
  */
 int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp,
                                    mbedtls_ecp_point *P,
@@ -938,6 +995,7 @@ int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
              int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
              mbedtls_ecp_restart_ctx *rs_ctx );
 
+#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED)
 /**
  * \brief           This function performs multiplication and addition of two
  *                  points by integers: \p R = \p m * \p P + \p n * \p Q
@@ -947,6 +1005,10 @@ int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  * \note            In contrast to mbedtls_ecp_mul(), this function does not
  *                  guarantee a constant execution flow and timing.
  *
+ * \note            This function is only defined for short Weierstrass curves.
+ *                  It may not be included in builds without any short
+ *                  Weierstrass curve.
+ *
  * \param grp       The ECP group to use.
  *                  This must be initialized and have group parameters
  *                  set, for example through mbedtls_ecp_group_load().
@@ -965,6 +1027,8 @@ int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  *                  valid private keys, or \p P or \p Q are not valid public
  *                  keys.
  * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p grp does not
+ *                  designate a short Weierstrass curve.
  * \return          Another negative error code on other kinds of failure.
  */
 int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
@@ -982,6 +1046,10 @@ int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  *                  but it can return early and restart according to the limit
  *                  set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
  *
+ * \note            This function is only defined for short Weierstrass curves.
+ *                  It may not be included in builds without any short
+ *                  Weierstrass curve.
+ *
  * \param grp       The ECP group to use.
  *                  This must be initialized and have group parameters
  *                  set, for example through mbedtls_ecp_group_load().
@@ -1001,6 +1069,8 @@ int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  *                  valid private keys, or \p P or \p Q are not valid public
  *                  keys.
  * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p grp does not
+ *                  designate a short Weierstrass curve.
  * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
  *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
  * \return          Another negative error code on other kinds of failure.
@@ -1010,6 +1080,7 @@ int mbedtls_ecp_muladd_restartable(
              const mbedtls_mpi *m, const mbedtls_ecp_point *P,
              const mbedtls_mpi *n, const mbedtls_ecp_point *Q,
              mbedtls_ecp_restart_ctx *rs_ctx );
+#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */
 
 /**
  * \brief           This function checks that a point is a valid public key
@@ -1161,6 +1232,46 @@ int mbedtls_ecp_gen_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key,
                          int (*f_rng)(void *, unsigned char *, size_t),
                          void *p_rng );
 
+/**
+ * \brief           This function reads an elliptic curve private key.
+ *
+ * \param grp_id    The ECP group identifier.
+ * \param key       The destination key.
+ * \param buf       The buffer containing the binary representation of the
+ *                  key. (Big endian integer for Weierstrass curves, byte
+ *                  string for Montgomery curves.)
+ * \param buflen    The length of the buffer in bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_INVALID_KEY error if the key is
+ *                  invalid.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the operation for
+ *                  the group is not implemented.
+ * \return          Another negative error code on different kinds of failure.
+ */
+int mbedtls_ecp_read_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key,
+                          const unsigned char *buf, size_t buflen );
+
+/**
+ * \brief           This function exports an elliptic curve private key.
+ *
+ * \param key       The private key.
+ * \param buf       The output buffer for containing the binary representation
+ *                  of the key. (Big endian integer for Weierstrass curves, byte
+ *                  string for Montgomery curves.)
+ * \param buflen    The total length of the buffer in bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the \p key
+                    representation is larger than the available space in \p buf.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the operation for
+ *                  the group is not implemented.
+ * \return          Another negative error code on different kinds of failure.
+ */
+int mbedtls_ecp_write_key( mbedtls_ecp_keypair *key,
+                           unsigned char *buf, size_t buflen );
+
 /**
  * \brief           This function checks that the keypair objects
  *                  \p pub and \p prv have the same group and the
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h
index 0047bd4ef91..6a47a8ff27e 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h
@@ -6,13 +6,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -25,27 +19,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 /*
@@ -87,7 +60,7 @@
 #define MBEDTLS_ECP_INTERNAL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -130,7 +103,7 @@ int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp );
  */
 void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp );
 
-#if defined(ECP_SHORTWEIERSTRASS)
+#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED)
 
 #if defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT)
 /**
@@ -270,9 +243,9 @@ int mbedtls_internal_ecp_normalize_jac( const mbedtls_ecp_group *grp,
         mbedtls_ecp_point *pt );
 #endif
 
-#endif /* ECP_SHORTWEIERSTRASS */
+#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */
 
-#if defined(ECP_MONTGOMERY)
+#if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED)
 
 #if defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT)
 int mbedtls_internal_ecp_double_add_mxz( const mbedtls_ecp_group *grp,
@@ -316,7 +289,7 @@ int mbedtls_internal_ecp_normalize_mxz( const mbedtls_ecp_group *grp,
         mbedtls_ecp_point *P );
 #endif
 
-#endif /* ECP_MONTGOMERY */
+#endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */
 
 #endif /* MBEDTLS_ECP_INTERNAL_ALT */
 
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy.h
index 1d6e9b821bf..deb3c50300b 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ENTROPY_H
 #define MBEDTLS_ENTROPY_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,28 +31,33 @@
 #include <stddef.h>
 
 #if defined(MBEDTLS_SHA512_C) && !defined(MBEDTLS_ENTROPY_FORCE_SHA256)
-#include "sha512.h"
+#include "mbedtls/sha512.h"
 #define MBEDTLS_ENTROPY_SHA512_ACCUMULATOR
 #else
 #if defined(MBEDTLS_SHA256_C)
 #define MBEDTLS_ENTROPY_SHA256_ACCUMULATOR
-#include "sha256.h"
+#include "mbedtls/sha256.h"
 #endif
 #endif
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 #if defined(MBEDTLS_HAVEGE_C)
-#include "havege.h"
+#include "mbedtls/havege.h"
 #endif
 
-#define MBEDTLS_ERR_ENTROPY_SOURCE_FAILED                 -0x003C  /**< Critical entropy source failure. */
-#define MBEDTLS_ERR_ENTROPY_MAX_SOURCES                   -0x003E  /**< No more sources can be added. */
-#define MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED            -0x0040  /**< No sources have been added to poll. */
-#define MBEDTLS_ERR_ENTROPY_NO_STRONG_SOURCE              -0x003D  /**< No strong sources have been added to poll. */
-#define MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR                 -0x003F  /**< Read/write error in file. */
+/** Critical entropy source failure. */
+#define MBEDTLS_ERR_ENTROPY_SOURCE_FAILED                 -0x003C
+/** No more sources can be added. */
+#define MBEDTLS_ERR_ENTROPY_MAX_SOURCES                   -0x003E
+/** No sources have been added to poll. */
+#define MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED            -0x0040
+/** No strong sources have been added to poll. */
+#define MBEDTLS_ERR_ENTROPY_NO_STRONG_SOURCE              -0x003D
+/** Read/write error in file. */
+#define MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR                 -0x003F
 
 /**
  * \name SECTION: Module settings
@@ -152,7 +130,7 @@ typedef struct mbedtls_entropy_context
                               * -1 after free. */
 #if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR)
     mbedtls_sha512_context  accumulator;
-#else
+#elif defined(MBEDTLS_ENTROPY_SHA256_ACCUMULATOR)
     mbedtls_sha256_context  accumulator;
 #endif
     int             source_count; /* Number of entries used in source. */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h
index c348fe52d42..e1d7491aa21 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ENTROPY_POLL_H
 #define MBEDTLS_ENTROPY_POLL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/error.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/error.h
index fa8582a3914..50f25385080 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/error.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/error.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,39 +18,23 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ERROR_H
 #define MBEDTLS_ERROR_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
 
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
 /**
  * Error code layout.
  *
@@ -77,9 +55,10 @@
  * For historical reasons, low-level error codes are divided in even and odd,
  * even codes were assigned first, and -1 is reserved for other errors.
  *
- * Low-level module errors (0x0002-0x007E, 0x0003-0x007F)
+ * Low-level module errors (0x0002-0x007E, 0x0001-0x007F)
  *
  * Module   Nr  Codes assigned
+ * ERROR     2  0x006E          0x0001
  * MPI       7  0x0002-0x0010
  * GCM       3  0x0012-0x0014   0x0013-0x0013
  * BLOWFISH  3  0x0016-0x0018   0x0017-0x0017
@@ -111,7 +90,7 @@
  * CHACHA20  3                  0x0051-0x0055
  * POLY1305  3                  0x0057-0x005B
  * CHACHAPOLY 2 0x0054-0x0056
- * PLATFORM  1  0x0070-0x0072
+ * PLATFORM  2  0x0070-0x0072
  *
  * High-level module nr (3 bits - 0x0...-0x7...)
  * Name      ID  Nr of Errors
@@ -125,9 +104,9 @@
  * ECP       4   10 (Started from top)
  * MD        5   5
  * HKDF      5   1 (Started from top)
- * SSL       5   1 (Started from 0x5E80)
- * CIPHER    6   8
- * SSL       6   23 (Started from top)
+ * SSL       5   2 (Started from 0x5F00)
+ * CIPHER    6   8 (Started from 0x6080)
+ * SSL       6   24 (Started from top, plus 0x6000)
  * SSL       7   32
  *
  * Module dependent error code (5 bits 0x.00.-0x.F8.)
@@ -137,6 +116,59 @@
 extern "C" {
 #endif
 
+/** Generic error */
+#define MBEDTLS_ERR_ERROR_GENERIC_ERROR       -0x0001
+/** This is a bug in the library */
+#define MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED -0x006E
+
+/**
+ * \brief Combines a high-level and low-level error code together.
+ *
+ *        Wrapper macro for mbedtls_error_add(). See that function for
+ *        more details.
+ */
+#define MBEDTLS_ERROR_ADD( high, low ) \
+        mbedtls_error_add( high, low, __FILE__, __LINE__ )
+
+#if defined(MBEDTLS_TEST_HOOKS)
+/**
+ * \brief Testing hook called before adding/combining two error codes together.
+ *        Only used when invasive testing is enabled via MBEDTLS_TEST_HOOKS.
+ */
+extern void (*mbedtls_test_hook_error_add)( int, int, const char *, int );
+#endif
+
+/**
+ * \brief Combines a high-level and low-level error code together.
+ *
+ *        This function can be called directly however it is usually
+ *        called via the #MBEDTLS_ERROR_ADD macro.
+ *
+ *        While a value of zero is not a negative error code, it is still an
+ *        error code (that denotes success) and can be combined with both a
+ *        negative error code or another value of zero.
+ *
+ * \note  When invasive testing is enabled via #MBEDTLS_TEST_HOOKS, also try to
+ *        call \link mbedtls_test_hook_error_add \endlink.
+ *
+ * \param high      high-level error code. See error.h for more details.
+ * \param low       low-level error code. See error.h for more details.
+ * \param file      file where this error code addition occurred.
+ * \param line      line where this error code addition occurred.
+ */
+static inline int mbedtls_error_add( int high, int low,
+                                     const char *file, int line )
+{
+#if defined(MBEDTLS_TEST_HOOKS)
+    if( *mbedtls_test_hook_error_add != NULL )
+        ( *mbedtls_test_hook_error_add )( high, low, file, line );
+#endif
+    (void)file;
+    (void)line;
+
+    return( high + low );
+}
+
 /**
  * \brief Translate a mbed TLS error code into a string representation,
  *        Result is truncated if necessary and always includes a terminating
@@ -148,6 +180,36 @@ extern "C" {
  */
 void mbedtls_strerror( int errnum, char *buffer, size_t buflen );
 
+/**
+ * \brief Translate the high-level part of an Mbed TLS error code into a string
+ *        representation.
+ *
+ * This function returns a const pointer to an un-modifiable string. The caller
+ * must not try to modify the string. It is intended to be used mostly for
+ * logging purposes.
+ *
+ * \param error_code    error code
+ *
+ * \return The string representation of the error code, or \c NULL if the error
+ *         code is unknown.
+ */
+const char * mbedtls_high_level_strerr( int error_code );
+
+/**
+ * \brief Translate the low-level part of an Mbed TLS error code into a string
+ *        representation.
+ *
+ * This function returns a const pointer to an un-modifiable string. The caller
+ * must not try to modify the string. It is intended to be used mostly for
+ * logging purposes.
+ *
+ * \param error_code    error code
+ *
+ * \return The string representation of the error code, or \c NULL if the error
+ *         code is unknown.
+ */
+const char * mbedtls_low_level_strerr( int error_code );
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/gcm.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/gcm.h
index 1201fbd4f10..9723a17b65f 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/gcm.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/gcm.h
@@ -13,13 +13,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -32,51 +26,33 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_GCM_H
 #define MBEDTLS_GCM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
 #include <stdint.h>
 
 #define MBEDTLS_GCM_ENCRYPT     1
 #define MBEDTLS_GCM_DECRYPT     0
 
-#define MBEDTLS_ERR_GCM_AUTH_FAILED                       -0x0012  /**< Authenticated decryption failed. */
+/** Authenticated decryption failed. */
+#define MBEDTLS_ERR_GCM_AUTH_FAILED                       -0x0012
 
 /* MBEDTLS_ERR_GCM_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_GCM_HW_ACCEL_FAILED                   -0x0013  /**< GCM hardware accelerator failed. */
+/** GCM hardware accelerator failed. */
+#define MBEDTLS_ERR_GCM_HW_ACCEL_FAILED                   -0x0013
 
-#define MBEDTLS_ERR_GCM_BAD_INPUT                         -0x0014  /**< Bad input parameters to function. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_GCM_BAD_INPUT                         -0x0014
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/havege.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/havege.h
index e90839ddeb4..7d27039e8c7 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/havege.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/havege.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,18 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_HAVEGE_H
 #define MBEDTLS_HAVEGE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
+#include <stdint.h>
 
 #define MBEDTLS_HAVEGE_COLLECT_SIZE 1024
 
@@ -68,9 +42,9 @@ extern "C" {
  */
 typedef struct mbedtls_havege_state
 {
-    int PT1, PT2, offset[2];
-    int pool[MBEDTLS_HAVEGE_COLLECT_SIZE];
-    int WALK[8192];
+    uint32_t PT1, PT2, offset[2];
+    uint32_t pool[MBEDTLS_HAVEGE_COLLECT_SIZE];
+    uint32_t WALK[8192];
 }
 mbedtls_havege_state;
 
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hkdf.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hkdf.h
index 07ffe83b23d..223004b8ede 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hkdf.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hkdf.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,44 +21,24 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_HKDF_H
 #define MBEDTLS_HKDF_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 /**
  *  \name HKDF Error codes
  *  \{
  */
-#define MBEDTLS_ERR_HKDF_BAD_INPUT_DATA  -0x5F80  /**< Bad input parameters to function. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_HKDF_BAD_INPUT_DATA  -0x5F80
 /* \} name */
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
index 5718e187a9f..79132d4d910 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,50 +22,33 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_HMAC_DRBG_H
 #define MBEDTLS_HMAC_DRBG_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /*
  * Error codes
  */
-#define MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG              -0x0003  /**< Too many random requested in single call. */
-#define MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG                -0x0005  /**< Input too large (Entropy + additional). */
-#define MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR                -0x0007  /**< Read/write error in file. */
-#define MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED        -0x0009  /**< The entropy source failed. */
+/** Too many random requested in single call. */
+#define MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG              -0x0003
+/** Input too large (Entropy + additional). */
+#define MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG                -0x0005
+/** Read/write error in file. */
+#define MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR                -0x0007
+/** The entropy source failed. */
+#define MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED        -0x0009
 
 /**
  * \name SECTION: Module settings
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md.h
index 2ba8d9e7a91..84fafd2ac77 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,27 +20,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_MD_H
@@ -55,18 +28,24 @@
 #include <stddef.h>
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
+#include "mbedtls/platform_util.h"
 
-#define MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE                -0x5080  /**< The selected feature is not available. */
-#define MBEDTLS_ERR_MD_BAD_INPUT_DATA                     -0x5100  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_MD_ALLOC_FAILED                       -0x5180  /**< Failed to allocate memory. */
-#define MBEDTLS_ERR_MD_FILE_IO_ERROR                      -0x5200  /**< Opening or reading of file failed. */
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE                -0x5080
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_MD_BAD_INPUT_DATA                     -0x5100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_MD_ALLOC_FAILED                       -0x5180
+/** Opening or reading of file failed. */
+#define MBEDTLS_ERR_MD_FILE_IO_ERROR                      -0x5200
 
 /* MBEDTLS_ERR_MD_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD_HW_ACCEL_FAILED                    -0x5280  /**< MD hardware accelerator failed. */
+/** MD hardware accelerator failed. */
+#define MBEDTLS_ERR_MD_HW_ACCEL_FAILED                    -0x5280
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +78,12 @@ typedef enum {
 #define MBEDTLS_MD_MAX_SIZE         32  /* longest known is SHA256 or less */
 #endif
 
+#if defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_MD_MAX_BLOCK_SIZE         128
+#else
+#define MBEDTLS_MD_MAX_BLOCK_SIZE         64
+#endif
+
 /**
  * Opaque struct defined in md_internal.h.
  */
@@ -226,6 +211,7 @@ int mbedtls_md_init_ctx( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_
  *                  failure.
  * \return          #MBEDTLS_ERR_MD_ALLOC_FAILED on memory-allocation failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_setup( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info, int hmac );
 
 /**
@@ -247,6 +233,7 @@ int mbedtls_md_setup( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_inf
  * \return          \c 0 on success.
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_clone( mbedtls_md_context_t *dst,
                       const mbedtls_md_context_t *src );
 
@@ -296,6 +283,7 @@ const char *mbedtls_md_get_name( const mbedtls_md_info_t *md_info );
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_starts( mbedtls_md_context_t *ctx );
 
 /**
@@ -314,6 +302,7 @@ int mbedtls_md_starts( mbedtls_md_context_t *ctx );
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_update( mbedtls_md_context_t *ctx, const unsigned char *input, size_t ilen );
 
 /**
@@ -334,6 +323,7 @@ int mbedtls_md_update( mbedtls_md_context_t *ctx, const unsigned char *input, si
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_finish( mbedtls_md_context_t *ctx, unsigned char *output );
 
 /**
@@ -354,6 +344,7 @@ int mbedtls_md_finish( mbedtls_md_context_t *ctx, unsigned char *output );
  * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                 failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md( const mbedtls_md_info_t *md_info, const unsigned char *input, size_t ilen,
         unsigned char *output );
 
@@ -375,6 +366,7 @@ int mbedtls_md( const mbedtls_md_info_t *md_info, const unsigned char *input, si
  *                 the file pointed by \p path.
  * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA if \p md_info was NULL.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_file( const mbedtls_md_info_t *md_info, const char *path,
                      unsigned char *output );
 #endif /* MBEDTLS_FS_IO */
@@ -397,6 +389,7 @@ int mbedtls_md_file( const mbedtls_md_info_t *md_info, const char *path,
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_starts( mbedtls_md_context_t *ctx, const unsigned char *key,
                     size_t keylen );
 
@@ -419,6 +412,7 @@ int mbedtls_md_hmac_starts( mbedtls_md_context_t *ctx, const unsigned char *key,
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_update( mbedtls_md_context_t *ctx, const unsigned char *input,
                     size_t ilen );
 
@@ -440,6 +434,7 @@ int mbedtls_md_hmac_update( mbedtls_md_context_t *ctx, const unsigned char *inpu
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_finish( mbedtls_md_context_t *ctx, unsigned char *output);
 
 /**
@@ -457,6 +452,7 @@ int mbedtls_md_hmac_finish( mbedtls_md_context_t *ctx, unsigned char *output);
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_reset( mbedtls_md_context_t *ctx );
 
 /**
@@ -481,11 +477,13 @@ int mbedtls_md_hmac_reset( mbedtls_md_context_t *ctx );
  * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                 failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac( const mbedtls_md_info_t *md_info, const unsigned char *key, size_t keylen,
                 const unsigned char *input, size_t ilen,
                 unsigned char *output );
 
 /* Internal use */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_process( mbedtls_md_context_t *ctx, const unsigned char *data );
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md2.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md2.h
index 9607df66baf..7f3d5cf446c 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md2.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md2.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -29,33 +23,12 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_MD2_H
 #define MBEDTLS_MD2_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,7 +36,8 @@
 #include <stddef.h>
 
 /* MBEDTLS_ERR_MD2_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD2_HW_ACCEL_FAILED                   -0x002B  /**< MD2 hardware accelerator failed */
+/** MD2 hardware accelerator failed */
+#define MBEDTLS_ERR_MD2_HW_ACCEL_FAILED                   -0x002B
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md4.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md4.h
index 6ceaf7a2f69..0238c6723a6 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md4.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md4.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -29,33 +23,12 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_MD4_H
 #define MBEDTLS_MD4_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -64,7 +37,8 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_MD4_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD4_HW_ACCEL_FAILED                   -0x002D  /**< MD4 hardware accelerator failed */
+/** MD4 hardware accelerator failed */
+#define MBEDTLS_ERR_MD4_HW_ACCEL_FAILED                   -0x002D
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md5.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md5.h
index b9d0ca929a0..73e4dd2c2a7 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md5.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md5.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,33 +22,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_MD5_H
 #define MBEDTLS_MD5_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,7 +36,8 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_MD5_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD5_HW_ACCEL_FAILED                   -0x002F  /**< MD5 hardware accelerator failed */
+/** MD5 hardware accelerator failed */
+#define MBEDTLS_ERR_MD5_HW_ACCEL_FAILED                   -0x002F
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md_internal.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md_internal.h
index 847f50aa0a8..f33cdf6086d 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md_internal.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/md_internal.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,38 +22,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_MD_WRAP_H
 #define MBEDTLS_MD_WRAP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -71,42 +44,17 @@ extern "C" {
  */
 struct mbedtls_md_info_t
 {
-    /** Digest identifier */
-    mbedtls_md_type_t type;
-
     /** Name of the message digest */
     const char * name;
 
+    /** Digest identifier */
+    mbedtls_md_type_t type;
+
     /** Output length of the digest function in bytes */
-    int size;
+    unsigned char size;
 
     /** Block length of the digest function in bytes */
-    int block_size;
-
-    /** Digest initialisation function */
-    int (*starts_func)( void *ctx );
-
-    /** Digest update function */
-    int (*update_func)( void *ctx, const unsigned char *input, size_t ilen );
-
-    /** Digest finalisation function */
-    int (*finish_func)( void *ctx, unsigned char *output );
-
-    /** Generic digest function */
-    int (*digest_func)( const unsigned char *input, size_t ilen,
-                        unsigned char *output );
-
-    /** Allocate a new context */
-    void * (*ctx_alloc_func)( void );
-
-    /** Free the given context */
-    void (*ctx_free_func)( void *ctx );
-
-    /** Clone state from a context */
-    void (*clone_func)( void *dst, const void *src );
-
-    /** Internal use only */
-    int (*process_func)( void *ctx, const unsigned char *input );
+    unsigned char block_size;
 };
 
 #if defined(MBEDTLS_MD2_C)
@@ -129,7 +77,9 @@ extern const mbedtls_md_info_t mbedtls_sha224_info;
 extern const mbedtls_md_info_t mbedtls_sha256_info;
 #endif
 #if defined(MBEDTLS_SHA512_C)
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
 extern const mbedtls_md_info_t mbedtls_sha384_info;
+#endif
 extern const mbedtls_md_info_t mbedtls_sha512_info;
 #endif
 
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h
index 89c06174957..233977252a3 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_MEMORY_BUFFER_ALLOC_H
 #define MBEDTLS_MEMORY_BUFFER_ALLOC_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net.h
index 6c7a49d3bdf..66921887da0 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,36 +20,15 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
-#include "net_sockets.h"
+#include "mbedtls/net_sockets.h"
 #if defined(MBEDTLS_DEPRECATED_WARNING)
 #warning "Deprecated header file: Superseded by mbedtls/net_sockets.h"
 #endif /* MBEDTLS_DEPRECATED_WARNING */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
index c6e1a0270e8..ceb7d5f6527 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
@@ -21,13 +21,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -40,55 +34,47 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_NET_SOCKETS_H
 #define MBEDTLS_NET_SOCKETS_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #include <stddef.h>
 #include <stdint.h>
 
-#define MBEDTLS_ERR_NET_SOCKET_FAILED                     -0x0042  /**< Failed to open a socket. */
-#define MBEDTLS_ERR_NET_CONNECT_FAILED                    -0x0044  /**< The connection to the given server / port failed. */
-#define MBEDTLS_ERR_NET_BIND_FAILED                       -0x0046  /**< Binding of the socket failed. */
-#define MBEDTLS_ERR_NET_LISTEN_FAILED                     -0x0048  /**< Could not listen on the socket. */
-#define MBEDTLS_ERR_NET_ACCEPT_FAILED                     -0x004A  /**< Could not accept the incoming connection. */
-#define MBEDTLS_ERR_NET_RECV_FAILED                       -0x004C  /**< Reading information from the socket failed. */
-#define MBEDTLS_ERR_NET_SEND_FAILED                       -0x004E  /**< Sending information through the socket failed. */
-#define MBEDTLS_ERR_NET_CONN_RESET                        -0x0050  /**< Connection was reset by peer. */
-#define MBEDTLS_ERR_NET_UNKNOWN_HOST                      -0x0052  /**< Failed to get an IP address for the given hostname. */
-#define MBEDTLS_ERR_NET_BUFFER_TOO_SMALL                  -0x0043  /**< Buffer is too small to hold the data. */
-#define MBEDTLS_ERR_NET_INVALID_CONTEXT                   -0x0045  /**< The context is invalid, eg because it was free()ed. */
-#define MBEDTLS_ERR_NET_POLL_FAILED                       -0x0047  /**< Polling the net context failed. */
-#define MBEDTLS_ERR_NET_BAD_INPUT_DATA                    -0x0049  /**< Input invalid. */
+/** Failed to open a socket. */
+#define MBEDTLS_ERR_NET_SOCKET_FAILED                     -0x0042
+/** The connection to the given server / port failed. */
+#define MBEDTLS_ERR_NET_CONNECT_FAILED                    -0x0044
+/** Binding of the socket failed. */
+#define MBEDTLS_ERR_NET_BIND_FAILED                       -0x0046
+/** Could not listen on the socket. */
+#define MBEDTLS_ERR_NET_LISTEN_FAILED                     -0x0048
+/** Could not accept the incoming connection. */
+#define MBEDTLS_ERR_NET_ACCEPT_FAILED                     -0x004A
+/** Reading information from the socket failed. */
+#define MBEDTLS_ERR_NET_RECV_FAILED                       -0x004C
+/** Sending information through the socket failed. */
+#define MBEDTLS_ERR_NET_SEND_FAILED                       -0x004E
+/** Connection was reset by peer. */
+#define MBEDTLS_ERR_NET_CONN_RESET                        -0x0050
+/** Failed to get an IP address for the given hostname. */
+#define MBEDTLS_ERR_NET_UNKNOWN_HOST                      -0x0052
+/** Buffer is too small to hold the data. */
+#define MBEDTLS_ERR_NET_BUFFER_TOO_SMALL                  -0x0043
+/** The context is invalid, eg because it was free()ed. */
+#define MBEDTLS_ERR_NET_INVALID_CONTEXT                   -0x0045
+/** Polling the net context failed. */
+#define MBEDTLS_ERR_NET_POLL_FAILED                       -0x0047
+/** Input invalid. */
+#define MBEDTLS_ERR_NET_BAD_INPUT_DATA                    -0x0049
 
 #define MBEDTLS_NET_LISTEN_BACKLOG         10 /**< The backlog that listen() should use. */
 
@@ -294,6 +280,13 @@ int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len );
 int mbedtls_net_recv_timeout( void *ctx, unsigned char *buf, size_t len,
                       uint32_t timeout );
 
+/**
+ * \brief          Closes down the connection and free associated data
+ *
+ * \param ctx      The context to close
+ */
+void mbedtls_net_close( mbedtls_net_context *ctx );
+
 /**
  * \brief          Gracefully shutdown the connection and free associated data
  *
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h
index 94356569942..7f3e64a525d 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h
@@ -17,13 +17,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -36,39 +30,18 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_NIST_KW_H
 #define MBEDTLS_NIST_KW_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/oid.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/oid.h
index 4a7e3b4b3fd..1c39186a491 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/oid.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/oid.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,56 +18,55 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_OID_H
 #define MBEDTLS_OID_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
-#include "pk.h"
+#include "mbedtls/asn1.h"
+#include "mbedtls/pk.h"
 
 #include <stddef.h>
 
 #if defined(MBEDTLS_CIPHER_C)
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 #endif
 
 #if defined(MBEDTLS_MD_C)
-#include "md.h"
+#include "mbedtls/md.h"
 #endif
 
-#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C)
-#include "x509.h"
-#endif
+/** OID is not found. */
+#define MBEDTLS_ERR_OID_NOT_FOUND                         -0x002E
+/** output buffer is too small */
+#define MBEDTLS_ERR_OID_BUF_TOO_SMALL                     -0x000B
 
-#define MBEDTLS_ERR_OID_NOT_FOUND                         -0x002E  /**< OID is not found. */
-#define MBEDTLS_ERR_OID_BUF_TOO_SMALL                     -0x000B  /**< output buffer is too small */
+/* This is for the benefit of X.509, but defined here in order to avoid
+ * having a "backwards" include of x.509.h here */
+/*
+ * X.509 extension types (internal, arbitrary values for bitsets)
+ */
+#define MBEDTLS_OID_X509_EXT_AUTHORITY_KEY_IDENTIFIER    (1 << 0)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_KEY_IDENTIFIER      (1 << 1)
+#define MBEDTLS_OID_X509_EXT_KEY_USAGE                   (1 << 2)
+#define MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES        (1 << 3)
+#define MBEDTLS_OID_X509_EXT_POLICY_MAPPINGS             (1 << 4)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_ALT_NAME            (1 << 5)
+#define MBEDTLS_OID_X509_EXT_ISSUER_ALT_NAME             (1 << 6)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_DIRECTORY_ATTRS     (1 << 7)
+#define MBEDTLS_OID_X509_EXT_BASIC_CONSTRAINTS           (1 << 8)
+#define MBEDTLS_OID_X509_EXT_NAME_CONSTRAINTS            (1 << 9)
+#define MBEDTLS_OID_X509_EXT_POLICY_CONSTRAINTS          (1 << 10)
+#define MBEDTLS_OID_X509_EXT_EXTENDED_KEY_USAGE          (1 << 11)
+#define MBEDTLS_OID_X509_EXT_CRL_DISTRIBUTION_POINTS     (1 << 12)
+#define MBEDTLS_OID_X509_EXT_INIHIBIT_ANYPOLICY          (1 << 13)
+#define MBEDTLS_OID_X509_EXT_FRESHEST_CRL                (1 << 14)
+#define MBEDTLS_OID_X509_EXT_NS_CERT_TYPE                (1 << 16)
 
 /*
  * Top level OID tuples
@@ -129,7 +122,8 @@
  * { iso(1) identified-organization(3) dod(6) internet(1)
  *                      security(5) mechanisms(5) pkix(7) }
  */
-#define MBEDTLS_OID_PKIX                        MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_DOD "\x01\x05\x05\x07"
+#define MBEDTLS_OID_INTERNET                    MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_DOD "\x01"
+#define MBEDTLS_OID_PKIX                        MBEDTLS_OID_INTERNET "\x05\x05\x07"
 
 /*
  * Arc for standard naming attributes
@@ -174,6 +168,11 @@
 #define MBEDTLS_OID_INIHIBIT_ANYPOLICY          MBEDTLS_OID_ID_CE "\x36" /**< id-ce-inhibitAnyPolicy OBJECT IDENTIFIER ::=  { id-ce 54 } */
 #define MBEDTLS_OID_FRESHEST_CRL                MBEDTLS_OID_ID_CE "\x2E" /**< id-ce-freshestCRL OBJECT IDENTIFIER ::=  { id-ce 46 } */
 
+/*
+ * Certificate policies
+ */
+#define MBEDTLS_OID_ANY_POLICY              MBEDTLS_OID_CERTIFICATE_POLICIES "\x00" /**< anyPolicy OBJECT IDENTIFIER ::= { id-ce-certificatePolicies 0 } */
+
 /*
  * Netscape certificate extensions
  */
@@ -208,6 +207,16 @@
 #define MBEDTLS_OID_TIME_STAMPING               MBEDTLS_OID_KP "\x08" /**< id-kp-timeStamping OBJECT IDENTIFIER ::= { id-kp 8 } */
 #define MBEDTLS_OID_OCSP_SIGNING                MBEDTLS_OID_KP "\x09" /**< id-kp-OCSPSigning OBJECT IDENTIFIER ::= { id-kp 9 } */
 
+/**
+ * Wi-SUN Alliance Field Area Network
+ * { iso(1) identified-organization(3) dod(6) internet(1)
+ *                      private(4) enterprise(1) WiSUN(45605) FieldAreaNetwork(1) }
+ */
+#define MBEDTLS_OID_WISUN_FAN                   MBEDTLS_OID_INTERNET "\x04\x01\x82\xe4\x25\x01"
+
+#define MBEDTLS_OID_ON                          MBEDTLS_OID_PKIX "\x08" /**< id-on OBJECT IDENTIFIER ::= { id-pkix 8 } */
+#define MBEDTLS_OID_ON_HW_MODULE_NAME           MBEDTLS_OID_ON "\x04" /**< id-on-hardwareModuleName OBJECT IDENTIFIER ::= { id-on 4 } */
+
 /*
  * PKCS definition OIDs
  */
@@ -253,6 +262,8 @@
 
 #define MBEDTLS_OID_DIGEST_ALG_SHA512           MBEDTLS_OID_NIST_ALG "\x02\x03" /**< id-mbedtls_sha512 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 3 } */
 
+#define MBEDTLS_OID_DIGEST_ALG_RIPEMD160        MBEDTLS_OID_TELETRUST "\x03\x02\x01" /**< id-ripemd160 OBJECT IDENTIFIER :: { iso(1) identified-organization(3) teletrust(36) algorithm(3) hashAlgorithm(2) ripemd160(1) } */
+
 #define MBEDTLS_OID_HMAC_SHA1                   MBEDTLS_OID_RSA_COMPANY "\x02\x07" /**< id-hmacWithSHA1 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 7 } */
 
 #define MBEDTLS_OID_HMAC_SHA224                 MBEDTLS_OID_RSA_COMPANY "\x02\x08" /**< id-hmacWithSHA224 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 8 } */
@@ -449,7 +460,6 @@ typedef struct mbedtls_oid_descriptor_t
  */
 int mbedtls_oid_get_numeric_string( char *buf, size_t size, const mbedtls_asn1_buf *oid );
 
-#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C)
 /**
  * \brief          Translate an X.509 extension OID into local values
  *
@@ -459,7 +469,6 @@ int mbedtls_oid_get_numeric_string( char *buf, size_t size, const mbedtls_asn1_b
  * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
  */
 int mbedtls_oid_get_x509_ext_type( const mbedtls_asn1_buf *oid, int *ext_type );
-#endif
 
 /**
  * \brief          Translate an X.509 attribute type OID into the short name
@@ -585,6 +594,16 @@ int mbedtls_oid_get_md_hmac( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_
  */
 int mbedtls_oid_get_extended_key_usage( const mbedtls_asn1_buf *oid, const char **desc );
 
+/**
+ * \brief          Translate certificate policies OID into description
+ *
+ * \param oid      OID to use
+ * \param desc     place to store string pointer
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_certificate_policies( const mbedtls_asn1_buf *oid, const char **desc );
+
 /**
  * \brief          Translate md_type into hash algorithm OID
  *
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/padlock.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/padlock.h
index 0e4a6bbf69f..624d02dff55 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/padlock.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/padlock.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,40 +22,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PADLOCK_H
 #define MBEDTLS_PADLOCK_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "aes.h"
+#include "mbedtls/aes.h"
 
-#define MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED               -0x0030  /**< Input data should be aligned. */
+/** Input data should be aligned. */
+#define MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED               -0x0030
 
 #if defined(__has_feature)
 #if __has_feature(address_sanitizer)
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pem.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pem.h
index c9df7ca6e86..dfb4ff218e6 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pem.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pem.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PEM_H
 #define MBEDTLS_PEM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,15 +36,24 @@
  * PEM data.
  * \{
  */
-#define MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT          -0x1080  /**< No PEM header or footer found. */
-#define MBEDTLS_ERR_PEM_INVALID_DATA                      -0x1100  /**< PEM string is not as expected. */
-#define MBEDTLS_ERR_PEM_ALLOC_FAILED                      -0x1180  /**< Failed to allocate memory. */
-#define MBEDTLS_ERR_PEM_INVALID_ENC_IV                    -0x1200  /**< RSA IV is not in hex-format. */
-#define MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG                   -0x1280  /**< Unsupported key encryption algorithm. */
-#define MBEDTLS_ERR_PEM_PASSWORD_REQUIRED                 -0x1300  /**< Private key password can't be empty. */
-#define MBEDTLS_ERR_PEM_PASSWORD_MISMATCH                 -0x1380  /**< Given private key password does not allow for correct decryption. */
-#define MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE               -0x1400  /**< Unavailable feature, e.g. hashing/encryption combination. */
-#define MBEDTLS_ERR_PEM_BAD_INPUT_DATA                    -0x1480  /**< Bad input parameters to function. */
+/** No PEM header or footer found. */
+#define MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT          -0x1080
+/** PEM string is not as expected. */
+#define MBEDTLS_ERR_PEM_INVALID_DATA                      -0x1100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_PEM_ALLOC_FAILED                      -0x1180
+/** RSA IV is not in hex-format. */
+#define MBEDTLS_ERR_PEM_INVALID_ENC_IV                    -0x1200
+/** Unsupported key encryption algorithm. */
+#define MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG                   -0x1280
+/** Private key password can't be empty. */
+#define MBEDTLS_ERR_PEM_PASSWORD_REQUIRED                 -0x1300
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PEM_PASSWORD_MISMATCH                 -0x1380
+/** Unavailable feature, e.g. hashing/encryption combination. */
+#define MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE               -0x1400
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PEM_BAD_INPUT_DATA                    -0x1480
 /* \} name */
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pk.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pk.h
index 20d51d4f38c..8f2abf2a608 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pk.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pk.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,50 +18,33 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_PK_H
 #define MBEDTLS_PK_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 #if defined(MBEDTLS_RSA_C)
-#include "rsa.h"
+#include "mbedtls/rsa.h"
 #endif
 
 #if defined(MBEDTLS_ECP_C)
-#include "ecp.h"
+#include "mbedtls/ecp.h"
 #endif
 
 #if defined(MBEDTLS_ECDSA_C)
-#include "ecdsa.h"
+#include "mbedtls/ecdsa.h"
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
 #endif
 
 #if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
@@ -75,23 +52,38 @@
 #define inline __inline
 #endif
 
-#define MBEDTLS_ERR_PK_ALLOC_FAILED        -0x3F80  /**< Memory allocation failed. */
-#define MBEDTLS_ERR_PK_TYPE_MISMATCH       -0x3F00  /**< Type mismatch, eg attempt to encrypt with an ECDSA key */
-#define MBEDTLS_ERR_PK_BAD_INPUT_DATA      -0x3E80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_PK_FILE_IO_ERROR       -0x3E00  /**< Read/write of file failed. */
-#define MBEDTLS_ERR_PK_KEY_INVALID_VERSION -0x3D80  /**< Unsupported key version */
-#define MBEDTLS_ERR_PK_KEY_INVALID_FORMAT  -0x3D00  /**< Invalid key tag or value. */
-#define MBEDTLS_ERR_PK_UNKNOWN_PK_ALG      -0x3C80  /**< Key algorithm is unsupported (only RSA and EC are supported). */
-#define MBEDTLS_ERR_PK_PASSWORD_REQUIRED   -0x3C00  /**< Private key password can't be empty. */
-#define MBEDTLS_ERR_PK_PASSWORD_MISMATCH   -0x3B80  /**< Given private key password does not allow for correct decryption. */
-#define MBEDTLS_ERR_PK_INVALID_PUBKEY      -0x3B00  /**< The pubkey tag or value is invalid (only RSA and EC are supported). */
-#define MBEDTLS_ERR_PK_INVALID_ALG         -0x3A80  /**< The algorithm tag or value is invalid. */
-#define MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE -0x3A00  /**< Elliptic curve is unsupported (only NIST curves are supported). */
-#define MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE -0x3980  /**< Unavailable feature, e.g. RSA disabled for RSA key. */
-#define MBEDTLS_ERR_PK_SIG_LEN_MISMATCH    -0x3900  /**< The buffer contains a valid signature followed by more data. */
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_PK_ALLOC_FAILED        -0x3F80
+/** Type mismatch, eg attempt to encrypt with an ECDSA key */
+#define MBEDTLS_ERR_PK_TYPE_MISMATCH       -0x3F00
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PK_BAD_INPUT_DATA      -0x3E80
+/** Read/write of file failed. */
+#define MBEDTLS_ERR_PK_FILE_IO_ERROR       -0x3E00
+/** Unsupported key version */
+#define MBEDTLS_ERR_PK_KEY_INVALID_VERSION -0x3D80
+/** Invalid key tag or value. */
+#define MBEDTLS_ERR_PK_KEY_INVALID_FORMAT  -0x3D00
+/** Key algorithm is unsupported (only RSA and EC are supported). */
+#define MBEDTLS_ERR_PK_UNKNOWN_PK_ALG      -0x3C80
+/** Private key password can't be empty. */
+#define MBEDTLS_ERR_PK_PASSWORD_REQUIRED   -0x3C00
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PK_PASSWORD_MISMATCH   -0x3B80
+/** The pubkey tag or value is invalid (only RSA and EC are supported). */
+#define MBEDTLS_ERR_PK_INVALID_PUBKEY      -0x3B00
+/** The algorithm tag or value is invalid. */
+#define MBEDTLS_ERR_PK_INVALID_ALG         -0x3A80
+/** Elliptic curve is unsupported (only NIST curves are supported). */
+#define MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE -0x3A00
+/** Unavailable feature, e.g. RSA disabled for RSA key. */
+#define MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE -0x3980
+/** The buffer contains a valid signature followed by more data. */
+#define MBEDTLS_ERR_PK_SIG_LEN_MISMATCH    -0x3900
 
 /* MBEDTLS_ERR_PK_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_PK_HW_ACCEL_FAILED     -0x3880  /**< PK hardware accelerator failed. */
+/** PK hardware accelerator failed. */
+#define MBEDTLS_ERR_PK_HW_ACCEL_FAILED     -0x3880
 
 #ifdef __cplusplus
 extern "C" {
@@ -108,6 +100,7 @@ typedef enum {
     MBEDTLS_PK_ECDSA,
     MBEDTLS_PK_RSA_ALT,
     MBEDTLS_PK_RSASSA_PSS,
+    MBEDTLS_PK_OPAQUE,
 } mbedtls_pk_type_t;
 
 /**
@@ -121,6 +114,58 @@ typedef struct mbedtls_pk_rsassa_pss_options
 
 } mbedtls_pk_rsassa_pss_options;
 
+/**
+ * \brief           Maximum size of a signature made by mbedtls_pk_sign().
+ */
+/* We need to set MBEDTLS_PK_SIGNATURE_MAX_SIZE to the maximum signature
+ * size among the supported signature types. Do it by starting at 0,
+ * then incrementally increasing to be large enough for each supported
+ * signature mechanism.
+ *
+ * The resulting value can be 0, for example if MBEDTLS_ECDH_C is enabled
+ * (which allows the pk module to be included) but neither MBEDTLS_ECDSA_C
+ * nor MBEDTLS_RSA_C nor any opaque signature mechanism (PSA or RSA_ALT).
+ */
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE 0
+
+#if ( defined(MBEDTLS_RSA_C) || defined(MBEDTLS_PK_RSA_ALT_SUPPORT) ) && \
+    MBEDTLS_MPI_MAX_SIZE > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* For RSA, the signature can be as large as the bignum module allows.
+ * For RSA_ALT, the signature size is not necessarily tied to what the
+ * bignum module can do, but in the absence of any specific setting,
+ * we use that (rsa_alt_sign_wrap in pk_wrap will check). */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_MPI_MAX_SIZE
+#endif
+
+#if defined(MBEDTLS_ECDSA_C) &&                                 \
+    MBEDTLS_ECDSA_MAX_LEN > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* For ECDSA, the ecdsa module exports a constant for the maximum
+ * signature size. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_ECDSA_MAX_LEN
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#if PSA_SIGNATURE_MAX_SIZE > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* PSA_SIGNATURE_MAX_SIZE is the maximum size of a signature made
+ * through the PSA API in the PSA representation. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE PSA_SIGNATURE_MAX_SIZE
+#endif
+
+#if PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE + 11 > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* The Mbed TLS representation is different for ECDSA signatures:
+ * PSA uses the raw concatenation of r and s,
+ * whereas Mbed TLS uses the ASN.1 representation (SEQUENCE of two INTEGERs).
+ * Add the overhead of ASN.1: up to (1+2) + 2 * (1+2+1) for the
+ * types, lengths (represented by up to 2 bytes), and potential leading
+ * zeros of the INTEGERs and the SEQUENCE. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE ( PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE + 11 )
+#endif
+#endif /* defined(MBEDTLS_USE_PSA_CRYPTO) */
+
 /**
  * \brief           Types for interfacing with the debug module
  */
@@ -234,6 +279,11 @@ void mbedtls_pk_init( mbedtls_pk_context *ctx );
  *
  * \param ctx       The context to clear. It must have been initialized.
  *                  If this is \c NULL, this function does nothing.
+ *
+ * \note            For contexts that have been set up with
+ *                  mbedtls_pk_setup_opaque(), this does not free the underlying
+ *                  PSA key and you still need to call psa_destroy_key()
+ *                  independently if you want to destroy that key.
  */
 void mbedtls_pk_free( mbedtls_pk_context *ctx );
 
@@ -272,6 +322,39 @@ void mbedtls_pk_restart_free( mbedtls_pk_restart_ctx *ctx );
  */
 int mbedtls_pk_setup( mbedtls_pk_context *ctx, const mbedtls_pk_info_t *info );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief           Initialize a PK context to wrap a PSA key.
+ *
+ * \note            This function replaces mbedtls_pk_setup() for contexts
+ *                  that wrap a (possibly opaque) PSA key instead of
+ *                  storing and manipulating the key material directly.
+ *
+ * \param ctx       The context to initialize. It must be empty (type NONE).
+ * \param key       The PSA key to wrap, which must hold an ECC key pair
+ *                  (see notes below).
+ *
+ * \note            The wrapped key must remain valid as long as the
+ *                  wrapping PK context is in use, that is at least between
+ *                  the point this function is called and the point
+ *                  mbedtls_pk_free() is called on this context. The wrapped
+ *                  key might then be independently used or destroyed.
+ *
+ * \note            This function is currently only available for ECC key
+ *                  pairs (that is, ECC keys containing private key material).
+ *                  Support for other key types may be added later.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_PK_BAD_INPUT_DATA on invalid input
+ *                  (context already used, invalid key identifier).
+ * \return          #MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE if the key is not an
+ *                  ECC key pair.
+ * \return          #MBEDTLS_ERR_PK_ALLOC_FAILED on allocation failure.
+ */
+int mbedtls_pk_setup_opaque( mbedtls_pk_context *ctx,
+                             const psa_key_id_t key );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 #if defined(MBEDTLS_PK_RSA_ALT_SUPPORT)
 /**
  * \brief           Initialize an RSA-alt context
@@ -425,8 +508,13 @@ int mbedtls_pk_verify_ext( mbedtls_pk_type_t type, const void *options,
  * \param md_alg    Hash algorithm used (see notes)
  * \param hash      Hash of the message to sign
  * \param hash_len  Hash length or 0 (see notes)
- * \param sig       Place to write the signature
- * \param sig_len   Number of bytes written
+ * \param sig       Place to write the signature.
+ *                  It must have enough room for the signature.
+ *                  #MBEDTLS_PK_SIGNATURE_MAX_SIZE is always enough.
+ *                  You may use a smaller buffer if it is large enough
+ *                  given the key type.
+ * \param sig_len   On successful return,
+ *                  the number of bytes written to \p sig.
  * \param f_rng     RNG function
  * \param p_rng     RNG parameter
  *
@@ -441,10 +529,6 @@ int mbedtls_pk_verify_ext( mbedtls_pk_type_t type, const void *options,
  *
  * \note            For RSA, md_alg may be MBEDTLS_MD_NONE if hash_len != 0.
  *                  For ECDSA, md_alg may never be MBEDTLS_MD_NONE.
- *
- * \note            In order to ensure enough space for the signature, the
- *                  \p sig buffer size must be of at least
- *                  `max(MBEDTLS_ECDSA_MAX_LEN, MBEDTLS_MPI_MAX_SIZE)` bytes.
  */
 int mbedtls_pk_sign( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
              const unsigned char *hash, size_t hash_len,
@@ -459,22 +543,23 @@ int mbedtls_pk_sign( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
  *                  \c mbedtls_ecp_set_max_ops() to reduce blocking for ECC
  *                  operations. For RSA, same as \c mbedtls_pk_sign().
  *
- * \note            In order to ensure enough space for the signature, the
- *                  \p sig buffer size must be of at least
- *                  `max(MBEDTLS_ECDSA_MAX_LEN, MBEDTLS_MPI_MAX_SIZE)` bytes.
- *
  * \param ctx       The PK context to use. It must have been set up
  *                  with a private key.
- * \param md_alg    Hash algorithm used (see notes)
+ * \param md_alg    Hash algorithm used (see notes for mbedtls_pk_sign())
  * \param hash      Hash of the message to sign
- * \param hash_len  Hash length or 0 (see notes)
- * \param sig       Place to write the signature
- * \param sig_len   Number of bytes written
+ * \param hash_len  Hash length or 0 (see notes for mbedtls_pk_sign())
+ * \param sig       Place to write the signature.
+ *                  It must have enough room for the signature.
+ *                  #MBEDTLS_PK_SIGNATURE_MAX_SIZE is always enough.
+ *                  You may use a smaller buffer if it is large enough
+ *                  given the key type.
+ * \param sig_len   On successful return,
+ *                  the number of bytes written to \p sig.
  * \param f_rng     RNG function
  * \param p_rng     RNG parameter
  * \param rs_ctx    Restart context (NULL to disable restart)
  *
- * \return          See \c mbedtls_pk_sign(), or
+ * \return          See \c mbedtls_pk_sign().
  * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
  *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
  */
@@ -534,7 +619,11 @@ int mbedtls_pk_encrypt( mbedtls_pk_context *ctx,
  * \param pub       Context holding a public key.
  * \param prv       Context holding a private (and public) key.
  *
- * \return          0 on success or MBEDTLS_ERR_PK_BAD_INPUT_DATA
+ * \return          \c 0 on success (keys were checked and match each other).
+ * \return          #MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE if the keys could not
+ *                  be checked - in that case they may or may not match.
+ * \return          #MBEDTLS_ERR_PK_BAD_INPUT_DATA if a context is invalid.
+ * \return          Another non-zero value if the keys do not match.
  */
 int mbedtls_pk_check_pair( const mbedtls_pk_context *pub, const mbedtls_pk_context *prv );
 
@@ -773,6 +862,32 @@ int mbedtls_pk_write_pubkey( unsigned char **p, unsigned char *start,
 int mbedtls_pk_load_file( const char *path, unsigned char **buf, size_t *n );
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief           Turn an EC key into an opaque one.
+ *
+ * \warning         This is a temporary utility function for tests. It might
+ *                  change or be removed at any time without notice.
+ *
+ * \note            Only ECDSA keys are supported so far. Signing with the
+ *                  specified hash is the only allowed use of that key.
+ *
+ * \param pk        Input: the EC key to import to a PSA key.
+ *                  Output: a PK context wrapping that PSA key.
+ * \param key       Output: a PSA key identifier.
+ *                  It's the caller's responsibility to call
+ *                  psa_destroy_key() on that key identifier after calling
+ *                  mbedtls_pk_free() on the PK context.
+ * \param hash_alg  The hash algorithm to allow for use with that key.
+ *
+ * \return          \c 0 if successful.
+ * \return          An Mbed TLS error code otherwise.
+ */
+int mbedtls_pk_wrap_as_opaque( mbedtls_pk_context *pk,
+                               psa_key_id_t *key,
+                               psa_algorithm_t hash_alg );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h
index 3f84cdf7489..47f7767700c 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,39 +18,18 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_PK_WRAP_H
 #define MBEDTLS_PK_WRAP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "pk.h"
+#include "mbedtls/pk.h"
 
 struct mbedtls_pk_info_t
 {
@@ -160,4 +133,8 @@ extern const mbedtls_pk_info_t mbedtls_ecdsa_info;
 extern const mbedtls_pk_info_t mbedtls_rsa_alt_info;
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+extern const mbedtls_pk_info_t mbedtls_pk_opaque_info;
+#endif
+
 #endif /* MBEDTLS_PK_WRAP_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h
index 3874d4a05ee..3530ee16889 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,40 +20,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PKCS11_H
 #define MBEDTLS_PKCS11_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #if defined(MBEDTLS_PKCS11_C)
 
-#include "x509_crt.h"
+#include "mbedtls/x509_crt.h"
 
 #include <pkcs11-helper-1.0/pkcs11h-certificate.h>
 
@@ -72,6 +45,8 @@
 extern "C" {
 #endif
 
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+
 /**
  * Context for PKCS #11 private keys.
  */
@@ -81,47 +56,71 @@ typedef struct mbedtls_pkcs11_context
         int len;
 } mbedtls_pkcs11_context;
 
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
 /**
  * Initialize a mbedtls_pkcs11_context.
  * (Just making memory references valid.)
+ *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
  */
-void mbedtls_pkcs11_init( mbedtls_pkcs11_context *ctx );
+MBEDTLS_DEPRECATED void mbedtls_pkcs11_init( mbedtls_pkcs11_context *ctx );
 
 /**
  * Fill in a mbed TLS certificate, based on the given PKCS11 helper certificate.
  *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
  * \param cert          X.509 certificate to fill
  * \param pkcs11h_cert  PKCS #11 helper certificate
  *
  * \return              0 on success.
  */
-int mbedtls_pkcs11_x509_cert_bind( mbedtls_x509_crt *cert, pkcs11h_certificate_t pkcs11h_cert );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_x509_cert_bind( mbedtls_x509_crt *cert,
+                                        pkcs11h_certificate_t pkcs11h_cert );
 
 /**
  * Set up a mbedtls_pkcs11_context storing the given certificate. Note that the
  * mbedtls_pkcs11_context will take over control of the certificate, freeing it when
  * done.
  *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
  * \param priv_key      Private key structure to fill.
  * \param pkcs11_cert   PKCS #11 helper certificate
  *
  * \return              0 on success
  */
-int mbedtls_pkcs11_priv_key_bind( mbedtls_pkcs11_context *priv_key,
-        pkcs11h_certificate_t pkcs11_cert );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_priv_key_bind(
+                                        mbedtls_pkcs11_context *priv_key,
+                                        pkcs11h_certificate_t pkcs11_cert );
 
 /**
  * Free the contents of the given private key context. Note that the structure
  * itself is not freed.
  *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
  * \param priv_key      Private key structure to cleanup
  */
-void mbedtls_pkcs11_priv_key_free( mbedtls_pkcs11_context *priv_key );
+MBEDTLS_DEPRECATED void mbedtls_pkcs11_priv_key_free(
+                                            mbedtls_pkcs11_context *priv_key );
 
 /**
  * \brief          Do an RSA private key decrypt, then remove the message
  *                 padding
  *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
  * \param ctx      PKCS #11 context
  * \param mode     must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature
  * \param input    buffer holding the encrypted data
@@ -135,15 +134,18 @@ void mbedtls_pkcs11_priv_key_free( mbedtls_pkcs11_context *priv_key );
  *                 of ctx->N (eg. 128 bytes if RSA-1024 is used) otherwise
  *                 an error is thrown.
  */
-int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx,
-                       int mode, size_t *olen,
-                       const unsigned char *input,
-                       unsigned char *output,
-                       size_t output_max_len );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx,
+                                               int mode, size_t *olen,
+                                               const unsigned char *input,
+                                               unsigned char *output,
+                                               size_t output_max_len );
 
 /**
  * \brief          Do a private RSA to sign a message digest
  *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
  * \param ctx      PKCS #11 context
  * \param mode     must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature
  * \param md_alg   a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data)
@@ -157,28 +159,58 @@ int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx,
  * \note           The "sig" buffer must be as large as the size
  *                 of ctx->N (eg. 128 bytes if RSA-1024 is used).
  */
-int mbedtls_pkcs11_sign( mbedtls_pkcs11_context *ctx,
-                    int mode,
-                    mbedtls_md_type_t md_alg,
-                    unsigned int hashlen,
-                    const unsigned char *hash,
-                    unsigned char *sig );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_sign( mbedtls_pkcs11_context *ctx,
+                                            int mode,
+                                            mbedtls_md_type_t md_alg,
+                                            unsigned int hashlen,
+                                            const unsigned char *hash,
+                                            unsigned char *sig );
 
 /**
  * SSL/TLS wrappers for PKCS#11 functions
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
  */
-static inline int mbedtls_ssl_pkcs11_decrypt( void *ctx, int mode, size_t *olen,
-                        const unsigned char *input, unsigned char *output,
-                        size_t output_max_len )
+MBEDTLS_DEPRECATED static inline int mbedtls_ssl_pkcs11_decrypt( void *ctx,
+                            int mode, size_t *olen,
+                            const unsigned char *input, unsigned char *output,
+                            size_t output_max_len )
 {
     return mbedtls_pkcs11_decrypt( (mbedtls_pkcs11_context *) ctx, mode, olen, input, output,
                            output_max_len );
 }
 
-static inline int mbedtls_ssl_pkcs11_sign( void *ctx,
-                     int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
-                     int mode, mbedtls_md_type_t md_alg, unsigned int hashlen,
-                     const unsigned char *hash, unsigned char *sig )
+/**
+ * \brief          This function signs a message digest using RSA.
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
+ * \param ctx      The PKCS #11 context.
+ * \param f_rng    The RNG function. This parameter is unused.
+ * \param p_rng    The RNG context. This parameter is unused.
+ * \param mode     The operation to run. This must be set to
+ *                 MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's
+ *                 signature.
+ * \param md_alg   The message digest algorithm. One of the MBEDTLS_MD_XXX
+ *                 must be passed to this function and MBEDTLS_MD_NONE can be
+ *                 used for signing raw data.
+ * \param hashlen  The message digest length (for MBEDTLS_MD_NONE only).
+ * \param hash     The buffer holding the message digest.
+ * \param sig      The buffer that will hold the ciphertext.
+ *
+ * \return         \c 0 if the signing operation was successful.
+ * \return         A non-zero error code on failure.
+ *
+ * \note           The \p sig buffer must be as large as the size of
+ *                 <code>ctx->N</code>. For example, 128 bytes if RSA-1024 is
+ *                 used.
+ */
+MBEDTLS_DEPRECATED static inline int mbedtls_ssl_pkcs11_sign( void *ctx,
+                    int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+                    int mode, mbedtls_md_type_t md_alg, unsigned int hashlen,
+                    const unsigned char *hash, unsigned char *sig )
 {
     ((void) f_rng);
     ((void) p_rng);
@@ -186,11 +218,25 @@ static inline int mbedtls_ssl_pkcs11_sign( void *ctx,
                         hashlen, hash, sig );
 }
 
-static inline size_t mbedtls_ssl_pkcs11_key_len( void *ctx )
+/**
+ * This function gets the length of the private key.
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
+ * \param ctx      The PKCS #11 context.
+ *
+ * \return         The length of the private key.
+ */
+MBEDTLS_DEPRECATED static inline size_t mbedtls_ssl_pkcs11_key_len( void *ctx )
 {
     return ( (mbedtls_pkcs11_context *) ctx )->len;
 }
 
+#undef MBEDTLS_DEPRECATED
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h
index 9cbcb173055..d9e85b1d126 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,47 +18,30 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PKCS12_H
 #define MBEDTLS_PKCS12_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
-#include "cipher.h"
-#include "asn1.h"
+#include "mbedtls/md.h"
+#include "mbedtls/cipher.h"
+#include "mbedtls/asn1.h"
 
 #include <stddef.h>
 
-#define MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA                 -0x1F80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE            -0x1F00  /**< Feature not available, e.g. unsupported encryption scheme. */
-#define MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT             -0x1E80  /**< PBE ASN.1 data not as expected. */
-#define MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH              -0x1E00  /**< Given private key password does not allow for correct decryption. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA                 -0x1F80
+/** Feature not available, e.g. unsupported encryption scheme. */
+#define MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE            -0x1F00
+/** PBE ASN.1 data not as expected. */
+#define MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT             -0x1E80
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH              -0x1E00
 
 #define MBEDTLS_PKCS12_DERIVE_KEY       1   /**< encryption/decryption key */
 #define MBEDTLS_PKCS12_DERIVE_IV        2   /**< initialization vector     */
@@ -102,11 +79,13 @@ int mbedtls_pkcs12_pbe_sha1_rc4_128( mbedtls_asn1_buf *pbe_params, int mode,
  * \brief            PKCS12 Password Based function (encryption / decryption)
  *                   for cipher-based and mbedtls_md-based PBE's
  *
- * \param pbe_params an ASN1 buffer containing the pkcs-12PbeParams structure
- * \param mode       either MBEDTLS_PKCS12_PBE_ENCRYPT or MBEDTLS_PKCS12_PBE_DECRYPT
+ * \param pbe_params an ASN1 buffer containing the pkcs-12 PbeParams structure
+ * \param mode       either #MBEDTLS_PKCS12_PBE_ENCRYPT or
+ *                   #MBEDTLS_PKCS12_PBE_DECRYPT
  * \param cipher_type the cipher used
- * \param md_type     the mbedtls_md used
- * \param pwd        the password used (may be NULL if no password is used)
+ * \param md_type    the mbedtls_md used
+ * \param pwd        Latin1-encoded password used. This may only be \c NULL when
+ *                   \p pwdlen is 0. No null terminator should be used.
  * \param pwdlen     length of the password (may be 0)
  * \param input      the input data
  * \param len        data length
@@ -127,18 +106,24 @@ int mbedtls_pkcs12_pbe( mbedtls_asn1_buf *pbe_params, int mode,
  *                   to produce pseudo-random bits for a particular "purpose".
  *
  *                   Depending on the given id, this function can produce an
- *                   encryption/decryption key, an nitialization vector or an
+ *                   encryption/decryption key, an initialization vector or an
  *                   integrity key.
  *
  * \param data       buffer to store the derived data in
- * \param datalen    length to fill
- * \param pwd        password to use (may be NULL if no password is used)
- * \param pwdlen     length of the password (may be 0)
- * \param salt       salt buffer to use
- * \param saltlen    length of the salt
- * \param mbedtls_md         mbedtls_md type to use during the derivation
- * \param id         id that describes the purpose (can be MBEDTLS_PKCS12_DERIVE_KEY,
- *                   MBEDTLS_PKCS12_DERIVE_IV or MBEDTLS_PKCS12_DERIVE_MAC_KEY)
+ * \param datalen    length of buffer to fill
+ * \param pwd        The password to use. For compliance with PKCS#12 §B.1, this
+ *                   should be a BMPString, i.e. a Unicode string where each
+ *                   character is encoded as 2 bytes in big-endian order, with
+ *                   no byte order mark and with a null terminator (i.e. the
+ *                   last two bytes should be 0x00 0x00).
+ * \param pwdlen     length of the password (may be 0).
+ * \param salt       Salt buffer to use This may only be \c NULL when
+ *                   \p saltlen is 0.
+ * \param saltlen    length of the salt (may be zero)
+ * \param mbedtls_md mbedtls_md type to use during the derivation
+ * \param id         id that describes the purpose (can be
+ *                   #MBEDTLS_PKCS12_DERIVE_KEY, #MBEDTLS_PKCS12_DERIVE_IV or
+ *                   #MBEDTLS_PKCS12_DERIVE_MAC_KEY)
  * \param iterations number of iterations
  *
  * \return          0 if successful, or a MD, BIGNUM type error.
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h
index 328633c492d..696930f745f 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,47 +20,30 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PKCS5_H
 #define MBEDTLS_PKCS5_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
-#include "md.h"
+#include "mbedtls/asn1.h"
+#include "mbedtls/md.h"
 
 #include <stddef.h>
 #include <stdint.h>
 
-#define MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA                  -0x2f80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_PKCS5_INVALID_FORMAT                  -0x2f00  /**< Unexpected ASN.1 data. */
-#define MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE             -0x2e80  /**< Requested encryption or digest alg not available. */
-#define MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH               -0x2e00  /**< Given private key password does not allow for correct decryption. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA                  -0x2f80
+/** Unexpected ASN.1 data. */
+#define MBEDTLS_ERR_PKCS5_INVALID_FORMAT                  -0x2f00
+/** Requested encryption or digest alg not available. */
+#define MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE             -0x2e80
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH               -0x2e00
 
 #define MBEDTLS_PKCS5_DECRYPT      0
 #define MBEDTLS_PKCS5_ENCRYPT      1
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform.h
index 689cfc6ec79..bdef07498d7 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform.h
@@ -14,13 +14,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,43 +27,24 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PLATFORM_H
 #define MBEDTLS_PLATFORM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #if defined(MBEDTLS_HAVE_TIME)
-#include "platform_time.h"
+#include "mbedtls/platform_time.h"
 #endif
 
-#define MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED     -0x0070 /**< Hardware accelerator failed */
-#define MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED -0x0072 /**< The requested feature is not supported by the platform */
+/** Hardware accelerator failed */
+#define MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED     -0x0070
+/** The requested feature is not supported by the platform */
+#define MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED -0x0072
 
 #ifdef __cplusplus
 extern "C" {
@@ -83,17 +58,33 @@ extern "C" {
  * \{
  */
 
+/* The older Microsoft Windows common runtime provides non-conforming
+ * implementations of some standard library functions, including snprintf
+ * and vsnprintf. This affects MSVC and MinGW builds.
+ */
+#if defined(__MINGW32__) || (defined(_MSC_VER) && _MSC_VER <= 1900)
+#define MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF
+#define MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF
+#endif
+
 #if !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS)
 #include <stdio.h>
 #include <stdlib.h>
 #include <time.h>
 #if !defined(MBEDTLS_PLATFORM_STD_SNPRINTF)
-#if defined(_WIN32)
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF)
 #define MBEDTLS_PLATFORM_STD_SNPRINTF   mbedtls_platform_win32_snprintf /**< The default \c snprintf function to use.  */
 #else
 #define MBEDTLS_PLATFORM_STD_SNPRINTF   snprintf /**< The default \c snprintf function to use.  */
 #endif
 #endif
+#if !defined(MBEDTLS_PLATFORM_STD_VSNPRINTF)
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF)
+#define MBEDTLS_PLATFORM_STD_VSNPRINTF   mbedtls_platform_win32_vsnprintf /**< The default \c vsnprintf function to use.  */
+#else
+#define MBEDTLS_PLATFORM_STD_VSNPRINTF   vsnprintf /**< The default \c vsnprintf function to use.  */
+#endif
+#endif
 #if !defined(MBEDTLS_PLATFORM_STD_PRINTF)
 #define MBEDTLS_PLATFORM_STD_PRINTF   printf /**< The default \c printf function to use. */
 #endif
@@ -229,7 +220,7 @@ int mbedtls_platform_set_printf( int (*printf_func)( const char *, ... ) );
  * - however it is acceptable to return -1 instead of the required length when
  *   the destination buffer is too short.
  */
-#if defined(_WIN32)
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF)
 /* For Windows (inc. MSYS2), we provide our own fixed implementation */
 int mbedtls_platform_win32_snprintf( char *s, size_t n, const char *fmt, ... );
 #endif
@@ -255,6 +246,42 @@ int mbedtls_platform_set_snprintf( int (*snprintf_func)( char * s, size_t n,
 #endif /* MBEDTLS_PLATFORM_SNPRINTF_MACRO */
 #endif /* MBEDTLS_PLATFORM_SNPRINTF_ALT */
 
+/*
+ * The function pointers for vsnprintf
+ *
+ * The vsnprintf implementation should conform to C99:
+ * - it *must* always correctly zero-terminate the buffer
+ *   (except when n == 0, then it must leave the buffer untouched)
+ * - however it is acceptable to return -1 instead of the required length when
+ *   the destination buffer is too short.
+ */
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF)
+#include <stdarg.h>
+/* For Older Windows (inc. MSYS2), we provide our own fixed implementation */
+int mbedtls_platform_win32_vsnprintf( char *s, size_t n, const char *fmt, va_list arg );
+#endif
+
+#if defined(MBEDTLS_PLATFORM_VSNPRINTF_ALT)
+#include <stdarg.h>
+extern int (*mbedtls_vsnprintf)( char * s, size_t n, const char * format, va_list arg );
+
+/**
+ * \brief   Set your own snprintf function pointer
+ *
+ * \param   vsnprintf_func   The \c vsnprintf function implementation
+ *
+ * \return  \c 0
+ */
+int mbedtls_platform_set_vsnprintf( int (*vsnprintf_func)( char * s, size_t n,
+                                                 const char * format, va_list arg ) );
+#else /* MBEDTLS_PLATFORM_VSNPRINTF_ALT */
+#if defined(MBEDTLS_PLATFORM_VSNPRINTF_MACRO)
+#define mbedtls_vsnprintf   MBEDTLS_PLATFORM_VSNPRINTF_MACRO
+#else
+#define mbedtls_vsnprintf   vsnprintf
+#endif /* MBEDTLS_PLATFORM_VSNPRINTF_MACRO */
+#endif /* MBEDTLS_PLATFORM_VSNPRINTF_ALT */
+
 /*
  * The function pointers for exit
  */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform_time.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform_time.h
index e132f6a688c..7e7daab6920 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform_time.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform_time.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PLATFORM_TIME_H
 #define MBEDTLS_PLATFORM_TIME_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform_util.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform_util.h
index 426afaf0401..f982db8c01c 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform_util.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/platform_util.h
@@ -6,13 +6,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -25,40 +19,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PLATFORM_UTIL_H
 #define MBEDTLS_PLATFORM_UTIL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
 #if defined(MBEDTLS_HAVE_TIME_DATE)
-#include "platform_time.h"
+#include "mbedtls/platform_time.h"
 #include <time.h>
 #endif /* MBEDTLS_HAVE_TIME_DATE */
 
@@ -159,6 +132,95 @@ MBEDTLS_DEPRECATED typedef int mbedtls_deprecated_numeric_constant_t;
 #endif /* MBEDTLS_DEPRECATED_WARNING */
 #endif /* MBEDTLS_DEPRECATED_REMOVED */
 
+/* Implementation of the check-return facility.
+ * See the user documentation in config.h.
+ *
+ * Do not use this macro directly to annotate function: instead,
+ * use one of MBEDTLS_CHECK_RETURN_CRITICAL or MBEDTLS_CHECK_RETURN_TYPICAL
+ * depending on how important it is to check the return value.
+ */
+#if !defined(MBEDTLS_CHECK_RETURN)
+#if defined(__GNUC__)
+#define MBEDTLS_CHECK_RETURN __attribute__((__warn_unused_result__))
+#elif defined(_MSC_VER) && _MSC_VER >= 1700
+#include <sal.h>
+#define MBEDTLS_CHECK_RETURN _Check_return_
+#else
+#define MBEDTLS_CHECK_RETURN
+#endif
+#endif
+
+/** Critical-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that its return value should be checked in all applications.
+ * Omitting the check is very likely to indicate a bug in the application
+ * and will result in a compile-time warning if #MBEDTLS_CHECK_RETURN
+ * is implemented for the compiler in use.
+ *
+ * \note  The use of this macro is a work in progress.
+ *        This macro may be added to more functions in the future.
+ *        Such an extension is not considered an API break, provided that
+ *        there are near-unavoidable circumstances under which the function
+ *        can fail. For example, signature/MAC/AEAD verification functions,
+ *        and functions that require a random generator, are considered
+ *        return-check-critical.
+ */
+#define MBEDTLS_CHECK_RETURN_CRITICAL MBEDTLS_CHECK_RETURN
+
+/** Ordinary-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that its return value should be generally be checked in portable
+ * applications. Omitting the check will result in a compile-time warning if
+ * #MBEDTLS_CHECK_RETURN is implemented for the compiler in use and
+ * #MBEDTLS_CHECK_RETURN_WARNING is enabled in the compile-time configuration.
+ *
+ * You can use #MBEDTLS_IGNORE_RETURN to explicitly ignore the return value
+ * of a function that is annotated with #MBEDTLS_CHECK_RETURN.
+ *
+ * \note  The use of this macro is a work in progress.
+ *        This macro will be added to more functions in the future.
+ *        Eventually this should appear before most functions returning
+ *        an error code (as \c int in the \c mbedtls_xxx API or
+ *        as ::psa_status_t in the \c psa_xxx API).
+ */
+#if defined(MBEDTLS_CHECK_RETURN_WARNING)
+#define MBEDTLS_CHECK_RETURN_TYPICAL MBEDTLS_CHECK_RETURN
+#else
+#define MBEDTLS_CHECK_RETURN_TYPICAL
+#endif
+
+/** Benign-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that it is rarely useful to check its return value.
+ *
+ * This macro has an empty expansion. It exists for documentation purposes:
+ * a #MBEDTLS_CHECK_RETURN_OPTIONAL annotation indicates that the function
+ * has been analyzed for return-check usefuless, whereas the lack of
+ * an annotation indicates that the function has not been analyzed and its
+ * return-check usefulness is unknown.
+ */
+#define MBEDTLS_CHECK_RETURN_OPTIONAL
+
+/** \def MBEDTLS_IGNORE_RETURN
+ *
+ * Call this macro with one argument, a function call, to suppress a warning
+ * from #MBEDTLS_CHECK_RETURN due to that function call.
+ */
+#if !defined(MBEDTLS_IGNORE_RETURN)
+/* GCC doesn't silence the warning with just (void)(result).
+ * (void)!(result) is known to work up at least up to GCC 10, as well
+ * as with Clang and MSVC.
+ *
+ * https://gcc.gnu.org/onlinedocs/gcc-3.4.6/gcc/Non_002dbugs.html
+ * https://stackoverflow.com/questions/40576003/ignoring-warning-wunused-result
+ * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66425#c34
+ */
+#define MBEDTLS_IGNORE_RETURN(result) ( (void) !( result ) )
+#endif
+
 /**
  * \brief       Securely zeroize a buffer
  *
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/poly1305.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/poly1305.h
index b337aa841ca..a69ede98b5e 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/poly1305.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/poly1305.h
@@ -14,13 +14,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,34 +27,13 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_POLY1305_H
 #define MBEDTLS_POLY1305_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -68,15 +41,18 @@
 #include <stdint.h>
 #include <stddef.h>
 
-#define MBEDTLS_ERR_POLY1305_BAD_INPUT_DATA         -0x0057 /**< Invalid input parameter(s). */
+/** Invalid input parameter(s). */
+#define MBEDTLS_ERR_POLY1305_BAD_INPUT_DATA         -0x0057
 
 /* MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE is deprecated and should not be
  * used. */
-#define MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE    -0x0059 /**< Feature not available. For example, s part of the API is not implemented. */
+/** Feature not available. For example, s part of the API is not implemented. */
+#define MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE    -0x0059
 
 /* MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED        -0x005B  /**< Poly1305 hardware accelerator failed. */
+/** Poly1305 hardware accelerator failed. */
+#define MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED        -0x005B
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/psa_util.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/psa_util.h
new file mode 100644
index 00000000000..af7a809e40b
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/psa_util.h
@@ -0,0 +1,512 @@
+/**
+ * \file psa_util.h
+ *
+ * \brief Utility functions for the use of the PSA Crypto library.
+ *
+ * \warning This function is not part of the public API and may
+ *          change at any time.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_PSA_UTIL_H
+#define MBEDTLS_PSA_UTIL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+
+#include "psa/crypto.h"
+
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
+#include "mbedtls/pk.h"
+#include "mbedtls/oid.h"
+
+#include <string.h>
+
+/* Translations for symmetric crypto. */
+
+static inline psa_key_type_t mbedtls_psa_translate_cipher_type(
+    mbedtls_cipher_type_t cipher )
+{
+    switch( cipher )
+    {
+        case MBEDTLS_CIPHER_AES_128_CCM:
+        case MBEDTLS_CIPHER_AES_192_CCM:
+        case MBEDTLS_CIPHER_AES_256_CCM:
+        case MBEDTLS_CIPHER_AES_128_GCM:
+        case MBEDTLS_CIPHER_AES_192_GCM:
+        case MBEDTLS_CIPHER_AES_256_GCM:
+        case MBEDTLS_CIPHER_AES_128_CBC:
+        case MBEDTLS_CIPHER_AES_192_CBC:
+        case MBEDTLS_CIPHER_AES_256_CBC:
+        case MBEDTLS_CIPHER_AES_128_ECB:
+        case MBEDTLS_CIPHER_AES_192_ECB:
+        case MBEDTLS_CIPHER_AES_256_ECB:
+            return( PSA_KEY_TYPE_AES );
+
+        /* ARIA not yet supported in PSA. */
+        /* case MBEDTLS_CIPHER_ARIA_128_CCM:
+           case MBEDTLS_CIPHER_ARIA_192_CCM:
+           case MBEDTLS_CIPHER_ARIA_256_CCM:
+           case MBEDTLS_CIPHER_ARIA_128_GCM:
+           case MBEDTLS_CIPHER_ARIA_192_GCM:
+           case MBEDTLS_CIPHER_ARIA_256_GCM:
+           case MBEDTLS_CIPHER_ARIA_128_CBC:
+           case MBEDTLS_CIPHER_ARIA_192_CBC:
+           case MBEDTLS_CIPHER_ARIA_256_CBC:
+               return( PSA_KEY_TYPE_ARIA ); */
+
+        default:
+            return( 0 );
+    }
+}
+
+static inline psa_algorithm_t mbedtls_psa_translate_cipher_mode(
+    mbedtls_cipher_mode_t mode, size_t taglen )
+{
+    switch( mode )
+    {
+        case MBEDTLS_MODE_ECB:
+            return( PSA_ALG_ECB_NO_PADDING );
+        case MBEDTLS_MODE_GCM:
+            return( PSA_ALG_AEAD_WITH_SHORTENED_TAG( PSA_ALG_GCM, taglen ) );
+        case MBEDTLS_MODE_CCM:
+            return( PSA_ALG_AEAD_WITH_SHORTENED_TAG( PSA_ALG_CCM, taglen ) );
+        case MBEDTLS_MODE_CBC:
+            if( taglen == 0 )
+                return( PSA_ALG_CBC_NO_PADDING );
+            else
+                return( 0 );
+        default:
+            return( 0 );
+    }
+}
+
+static inline psa_key_usage_t mbedtls_psa_translate_cipher_operation(
+    mbedtls_operation_t op )
+{
+    switch( op )
+    {
+        case MBEDTLS_ENCRYPT:
+            return( PSA_KEY_USAGE_ENCRYPT );
+        case MBEDTLS_DECRYPT:
+            return( PSA_KEY_USAGE_DECRYPT );
+        default:
+            return( 0 );
+    }
+}
+
+/* Translations for hashing. */
+
+static inline psa_algorithm_t mbedtls_psa_translate_md( mbedtls_md_type_t md_alg )
+{
+    switch( md_alg )
+    {
+#if defined(MBEDTLS_MD2_C)
+    case MBEDTLS_MD_MD2:
+        return( PSA_ALG_MD2 );
+#endif
+#if defined(MBEDTLS_MD4_C)
+    case MBEDTLS_MD_MD4:
+        return( PSA_ALG_MD4 );
+#endif
+#if defined(MBEDTLS_MD5_C)
+    case MBEDTLS_MD_MD5:
+        return( PSA_ALG_MD5 );
+#endif
+#if defined(MBEDTLS_SHA1_C)
+    case MBEDTLS_MD_SHA1:
+        return( PSA_ALG_SHA_1 );
+#endif
+#if defined(MBEDTLS_SHA256_C)
+    case MBEDTLS_MD_SHA224:
+        return( PSA_ALG_SHA_224 );
+    case MBEDTLS_MD_SHA256:
+        return( PSA_ALG_SHA_256 );
+#endif
+#if defined(MBEDTLS_SHA512_C)
+    case MBEDTLS_MD_SHA384:
+        return( PSA_ALG_SHA_384 );
+    case MBEDTLS_MD_SHA512:
+        return( PSA_ALG_SHA_512 );
+#endif
+#if defined(MBEDTLS_RIPEMD160_C)
+    case MBEDTLS_MD_RIPEMD160:
+        return( PSA_ALG_RIPEMD160 );
+#endif
+    case MBEDTLS_MD_NONE:
+        return( 0 );
+    default:
+        return( 0 );
+    }
+}
+
+/* Translations for ECC. */
+
+static inline int mbedtls_psa_get_ecc_oid_from_id(
+    psa_ecc_family_t curve, size_t bits,
+    char const **oid, size_t *oid_len )
+{
+    switch( curve )
+    {
+        case PSA_ECC_FAMILY_SECP_R1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+                case 192:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP192R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP192R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+                case 224:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP224R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP224R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP256R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP256R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+                case 384:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP384R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP384R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+                case 521:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP521R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP521R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */
+            }
+            break;
+        case PSA_ECC_FAMILY_SECP_K1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+                case 192:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP192K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP192K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+                case 224:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP224K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP224K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP256K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP256K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */
+            }
+            break;
+        case PSA_ECC_FAMILY_BRAINPOOL_P_R1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_BP256R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP256R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+                case 384:
+                    *oid = MBEDTLS_OID_EC_GRP_BP384R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP384R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+                case 512:
+                    *oid = MBEDTLS_OID_EC_GRP_BP512R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP512R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */
+            }
+            break;
+    }
+    (void) oid;
+    (void) oid_len;
+    return( -1 );
+}
+
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH 1
+
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 521 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 521 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 512 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 512 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */
+
+
+/* Translations for PK layer */
+
+static inline int mbedtls_psa_err_translate_pk( psa_status_t status )
+{
+    switch( status )
+    {
+        case PSA_SUCCESS:
+            return( 0 );
+        case PSA_ERROR_NOT_SUPPORTED:
+            return( MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE );
+        case PSA_ERROR_INSUFFICIENT_MEMORY:
+            return( MBEDTLS_ERR_PK_ALLOC_FAILED );
+        case PSA_ERROR_INSUFFICIENT_ENTROPY:
+            return( MBEDTLS_ERR_ECP_RANDOM_FAILED );
+        case PSA_ERROR_BAD_STATE:
+            return( MBEDTLS_ERR_PK_BAD_INPUT_DATA );
+        /* All other failures */
+        case PSA_ERROR_COMMUNICATION_FAILURE:
+        case PSA_ERROR_HARDWARE_FAILURE:
+        case PSA_ERROR_CORRUPTION_DETECTED:
+            return( MBEDTLS_ERR_PK_HW_ACCEL_FAILED );
+        default: /* We return the same as for the 'other failures',
+                  * but list them separately nonetheless to indicate
+                  * which failure conditions we have considered. */
+            return( MBEDTLS_ERR_PK_HW_ACCEL_FAILED );
+    }
+}
+
+/* Translations for ECC */
+
+/* This function transforms an ECC group identifier from
+ * https://www.iana.org/assignments/tls-parameters/tls-parameters.xhtml#tls-parameters-8
+ * into a PSA ECC group identifier. */
+#if defined(MBEDTLS_ECP_C)
+static inline psa_key_type_t mbedtls_psa_parse_tls_ecc_group(
+    uint16_t tls_ecc_grp_reg_id, size_t *bits )
+{
+    const mbedtls_ecp_curve_info *curve_info =
+        mbedtls_ecp_curve_info_from_tls_id( tls_ecc_grp_reg_id );
+    if( curve_info == NULL )
+        return( 0 );
+    return( PSA_KEY_TYPE_ECC_KEY_PAIR(
+                mbedtls_ecc_group_to_psa( curve_info->grp_id, bits ) ) );
+}
+#endif /* MBEDTLS_ECP_C */
+
+/* This function takes a buffer holding an EC public key
+ * exported through psa_export_public_key(), and converts
+ * it into an ECPoint structure to be put into a ClientKeyExchange
+ * message in an ECDHE exchange.
+ *
+ * Both the present and the foreseeable future format of EC public keys
+ * used by PSA have the ECPoint structure contained in the exported key
+ * as a subbuffer, and the function merely selects this subbuffer instead
+ * of making a copy.
+ */
+static inline int mbedtls_psa_tls_psa_ec_to_ecpoint( unsigned char *src,
+                                                     size_t srclen,
+                                                     unsigned char **dst,
+                                                     size_t *dstlen )
+{
+    *dst = src;
+    *dstlen = srclen;
+    return( 0 );
+}
+
+/* This function takes a buffer holding an ECPoint structure
+ * (as contained in a TLS ServerKeyExchange message for ECDHE
+ * exchanges) and converts it into a format that the PSA key
+ * agreement API understands.
+ */
+static inline int mbedtls_psa_tls_ecpoint_to_psa_ec( unsigned char const *src,
+                                                     size_t srclen,
+                                                     unsigned char *dst,
+                                                     size_t dstlen,
+                                                     size_t *olen )
+{
+    if( srclen > dstlen )
+        return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL );
+
+    memcpy( dst, src, srclen );
+    *olen = srclen;
+    return( 0 );
+}
+
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+/* Expose whatever RNG the PSA subsystem uses to applications using the
+ * mbedtls_xxx API. The declarations and definitions here need to be
+ * consistent with the implementation in library/psa_crypto_random_impl.h.
+ * See that file for implementation documentation. */
+#if defined(MBEDTLS_PSA_CRYPTO_C)
+
+/* The type of a `f_rng` random generator function that many library functions
+ * take.
+ *
+ * This type name is not part of the Mbed TLS stable API. It may be renamed
+ * or moved without warning.
+ */
+typedef int mbedtls_f_rng_t( void *p_rng, unsigned char *output, size_t output_size );
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+
+/** The random generator function for the PSA subsystem.
+ *
+ * This function is suitable as the `f_rng` random generator function
+ * parameter of many `mbedtls_xxx` functions. Use #MBEDTLS_PSA_RANDOM_STATE
+ * to obtain the \p p_rng parameter.
+ *
+ * The implementation of this function depends on the configuration of the
+ * library.
+ *
+ * \note Depending on the configuration, this may be a function or
+ *       a pointer to a function.
+ *
+ * \note This function may only be used if the PSA crypto subsystem is active.
+ *       This means that you must call psa_crypto_init() before any call to
+ *       this function, and you must not call this function after calling
+ *       mbedtls_psa_crypto_free().
+ *
+ * \param p_rng         The random generator context. This must be
+ *                      #MBEDTLS_PSA_RANDOM_STATE. No other state is
+ *                      supported.
+ * \param output        The buffer to fill. It must have room for
+ *                      \c output_size bytes.
+ * \param output_size   The number of bytes to write to \p output.
+ *                      This function may fail if \p output_size is too
+ *                      large. It is guaranteed to accept any output size
+ *                      requested by Mbed TLS library functions. The
+ *                      maximum request size depends on the library
+ *                      configuration.
+ *
+ * \return              \c 0 on success.
+ * \return              An `MBEDTLS_ERR_ENTROPY_xxx`,
+ *                      `MBEDTLS_ERR_PLATFORM_xxx,
+ *                      `MBEDTLS_ERR_CTR_DRBG_xxx` or
+ *                      `MBEDTLS_ERR_HMAC_DRBG_xxx` on error.
+ */
+int mbedtls_psa_get_random( void *p_rng,
+                            unsigned char *output,
+                            size_t output_size );
+
+/** The random generator state for the PSA subsystem.
+ *
+ * This macro expands to an expression which is suitable as the `p_rng`
+ * random generator state parameter of many `mbedtls_xxx` functions.
+ * It must be used in combination with the random generator function
+ * mbedtls_psa_get_random().
+ *
+ * The implementation of this macro depends on the configuration of the
+ * library. Do not make any assumption on its nature.
+ */
+#define MBEDTLS_PSA_RANDOM_STATE NULL
+
+#else /* !defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) */
+
+#if defined(MBEDTLS_CTR_DRBG_C)
+#include "mbedtls/ctr_drbg.h"
+typedef mbedtls_ctr_drbg_context mbedtls_psa_drbg_context_t;
+static mbedtls_f_rng_t *const mbedtls_psa_get_random = mbedtls_ctr_drbg_random;
+#elif defined(MBEDTLS_HMAC_DRBG_C)
+#include "mbedtls/hmac_drbg.h"
+typedef mbedtls_hmac_drbg_context mbedtls_psa_drbg_context_t;
+static mbedtls_f_rng_t *const mbedtls_psa_get_random = mbedtls_hmac_drbg_random;
+#endif
+extern mbedtls_psa_drbg_context_t *const mbedtls_psa_random_state;
+
+#define MBEDTLS_PSA_RANDOM_STATE mbedtls_psa_random_state
+
+#endif /* !defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) */
+
+#endif /* MBEDTLS_PSA_CRYPTO_C */
+
+#endif /* MBEDTLS_PSA_UTIL_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h
index 31c6637d6dc..63270d12394 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_RIPEMD160_H
 #define MBEDTLS_RIPEMD160_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -60,7 +33,8 @@
 
 /* MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED             -0x0031  /**< RIPEMD160 hardware accelerator failed */
+/** RIPEMD160 hardware accelerator failed */
+#define MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED             -0x0031
 
 #ifdef __cplusplus
 extern "C" {
@@ -82,7 +56,7 @@ typedef struct mbedtls_ripemd160_context
 mbedtls_ripemd160_context;
 
 #else  /* MBEDTLS_RIPEMD160_ALT */
-#include "ripemd160.h"
+#include "ripemd160_alt.h"
 #endif /* MBEDTLS_RIPEMD160_ALT */
 
 /**
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa.h
index b2f65334fe7..3c481e12a17 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa.h
@@ -11,13 +11,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -30,63 +24,53 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_RSA_H
 #define MBEDTLS_RSA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
-#include "md.h"
+#include "mbedtls/bignum.h"
+#include "mbedtls/md.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /*
  * RSA Error codes
  */
-#define MBEDTLS_ERR_RSA_BAD_INPUT_DATA                    -0x4080  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_RSA_INVALID_PADDING                   -0x4100  /**< Input data contains invalid padding and is rejected. */
-#define MBEDTLS_ERR_RSA_KEY_GEN_FAILED                    -0x4180  /**< Something failed during generation of a key. */
-#define MBEDTLS_ERR_RSA_KEY_CHECK_FAILED                  -0x4200  /**< Key failed to pass the validity check of the library. */
-#define MBEDTLS_ERR_RSA_PUBLIC_FAILED                     -0x4280  /**< The public key operation failed. */
-#define MBEDTLS_ERR_RSA_PRIVATE_FAILED                    -0x4300  /**< The private key operation failed. */
-#define MBEDTLS_ERR_RSA_VERIFY_FAILED                     -0x4380  /**< The PKCS#1 verification failed. */
-#define MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE                  -0x4400  /**< The output buffer for decryption is not large enough. */
-#define MBEDTLS_ERR_RSA_RNG_FAILED                        -0x4480  /**< The random generator failed to generate non-zeros. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_RSA_BAD_INPUT_DATA                    -0x4080
+/** Input data contains invalid padding and is rejected. */
+#define MBEDTLS_ERR_RSA_INVALID_PADDING                   -0x4100
+/** Something failed during generation of a key. */
+#define MBEDTLS_ERR_RSA_KEY_GEN_FAILED                    -0x4180
+/** Key failed to pass the validity check of the library. */
+#define MBEDTLS_ERR_RSA_KEY_CHECK_FAILED                  -0x4200
+/** The public key operation failed. */
+#define MBEDTLS_ERR_RSA_PUBLIC_FAILED                     -0x4280
+/** The private key operation failed. */
+#define MBEDTLS_ERR_RSA_PRIVATE_FAILED                    -0x4300
+/** The PKCS#1 verification failed. */
+#define MBEDTLS_ERR_RSA_VERIFY_FAILED                     -0x4380
+/** The output buffer for decryption is not large enough. */
+#define MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE                  -0x4400
+/** The random generator failed to generate non-zeros. */
+#define MBEDTLS_ERR_RSA_RNG_FAILED                        -0x4480
 
 /* MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION             -0x4500  /**< The implementation does not offer the requested operation, for example, because of security violations or lack of functionality. */
+/** The implementation does not offer the requested operation, for example, because of security violations or lack of functionality. */
+#define MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION             -0x4500
 
 /* MBEDTLS_ERR_RSA_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_RSA_HW_ACCEL_FAILED                   -0x4580  /**< RSA hardware accelerator failed. */
+/** RSA hardware accelerator failed. */
+#define MBEDTLS_ERR_RSA_HW_ACCEL_FAILED                   -0x4580
 
 /*
  * RSA constants
@@ -630,7 +614,8 @@ int mbedtls_rsa_private( mbedtls_rsa_context *ctx,
  *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
  * \param ilen     The length of the plaintext in Bytes.
  * \param input    The input data to encrypt. This must be a readable
- *                 buffer of size \p ilen Bytes. This must not be \c NULL.
+ *                 buffer of size \p ilen Bytes. It may be \c NULL if
+ *                 `ilen == 0`.
  * \param output   The output buffer. This must be a writable buffer
  *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
  *                 for an 2048-bit RSA modulus.
@@ -670,7 +655,8 @@ int mbedtls_rsa_pkcs1_encrypt( mbedtls_rsa_context *ctx,
  *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
  * \param ilen     The length of the plaintext in Bytes.
  * \param input    The input data to encrypt. This must be a readable
- *                 buffer of size \p ilen Bytes. This must not be \c NULL.
+ *                 buffer of size \p ilen Bytes. It may be \c NULL if
+ *                 `ilen == 0`.
  * \param output   The output buffer. This must be a writable buffer
  *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
  *                 for an 2048-bit RSA modulus.
@@ -714,7 +700,8 @@ int mbedtls_rsa_rsaes_pkcs1_v15_encrypt( mbedtls_rsa_context *ctx,
  * \param label_len  The length of the label in Bytes.
  * \param ilen       The length of the plaintext buffer \p input in Bytes.
  * \param input      The input data to encrypt. This must be a readable
- *                   buffer of size \p ilen Bytes. This must not be \c NULL.
+ *                   buffer of size \p ilen Bytes. It may be \c NULL if
+ *                   `ilen == 0`.
  * \param output     The output buffer. This must be a writable buffer
  *                   of length \c ctx->len Bytes. For example, \c 256 Bytes
  *                   for an 2048-bit RSA modulus.
@@ -1000,12 +987,69 @@ int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx,
  * \brief          This function performs a PKCS#1 v2.1 PSS signature
  *                 operation (RSASSA-PSS-SIGN).
  *
- * \note           The \p hash_id in the RSA context is the one used for the
- *                 encoding. \p md_alg in the function call is the type of hash
- *                 that is encoded. According to <em>RFC-3447: Public-Key
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
+ *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
+ *                 Specifications</em>.
+ *
+ * \note           This function enforces that the provided salt length complies
+ *                 with FIPS 186-4 §5.5 (e) and RFC 8017 (PKCS#1 v2.2) §9.1.1
+ *                 step 3. The constraint is that the hash length plus the salt
+ *                 length plus 2 bytes must be at most the key length. If this
+ *                 constraint is not met, this function returns
+ *                 #MBEDTLS_ERR_RSA_BAD_INPUT_DATA.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG function. It must not be \c NULL.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be \c NULL
+ *                 if \p f_rng doesn't need a context argument.
+ * \param md_alg   The message-digest algorithm used to hash the original data.
+ *                 Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen  The length of the message digest.
+ *                 Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash     The buffer holding the message digest or raw data.
+ *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ *                 buffer of length \p hashlen Bytes. If \p md_alg is not
+ *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ *                 the size of the hash corresponding to \p md_alg.
+ * \param saltlen  The length of the salt that should be used.
+ *                 If passed #MBEDTLS_RSA_SALT_LEN_ANY, the function will use
+ *                 the largest possible salt length up to the hash length,
+ *                 which is the largest permitted by some standards including
+ *                 FIPS 186-4 §5.5.
+ * \param sig      The buffer to hold the signature. This must be a writable
+ *                 buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus. A buffer length of
+ *                 #MBEDTLS_MPI_MAX_SIZE is always safe.
+ *
+ * \return         \c 0 if the signing operation was successful.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pss_sign_ext( mbedtls_rsa_context *ctx,
+                         int (*f_rng)(void *, unsigned char *, size_t),
+                         void *p_rng,
+                         mbedtls_md_type_t md_alg,
+                         unsigned int hashlen,
+                         const unsigned char *hash,
+                         int saltlen,
+                         unsigned char *sig );
+
+/**
+ * \brief          This function performs a PKCS#1 v2.1 PSS signature
+ *                 operation (RSASSA-PSS-SIGN).
+ *
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
  *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
- *                 Specifications</em> it is advised to keep both hashes the
- *                 same.
+ *                 Specifications</em>.
  *
  * \note           This function always uses the maximum possible salt size,
  *                 up to the length of the payload hash. This choice of salt
@@ -1035,7 +1079,7 @@ int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx,
  * \param md_alg   The message-digest algorithm used to hash the original data.
  *                 Use #MBEDTLS_MD_NONE for signing raw data.
  * \param hashlen  The length of the message digest.
- *                 Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ *                 This is only used if \p md_alg is #MBEDTLS_MD_NONE.
  * \param hash     The buffer holding the message digest or raw data.
  *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
  *                 buffer of length \p hashlen Bytes. If \p md_alg is not
@@ -1161,16 +1205,15 @@ int mbedtls_rsa_rsassa_pkcs1_v15_verify( mbedtls_rsa_context *ctx,
  * \brief          This function performs a PKCS#1 v2.1 PSS verification
  *                 operation (RSASSA-PSS-VERIFY).
  *
- *                 The hash function for the MGF mask generating function
- *                 is that specified in the RSA context.
- *
- * \note           The \p hash_id in the RSA context is the one used for the
- *                 verification. \p md_alg in the function call is the type of
- *                 hash that is verified. According to <em>RFC-3447: Public-Key
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
  *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
- *                 Specifications</em> it is advised to keep both hashes the
- *                 same. If \p hash_id in the RSA context is unset,
- *                 the \p md_alg from the function call is used.
+ *                 Specifications</em>. If the \c hash_id set in \p ctx is
+ *                 #MBEDTLS_MD_NONE, the \p md_alg parameter is used.
  *
  * \deprecated     It is deprecated and discouraged to call this function
  *                 in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
@@ -1218,13 +1261,12 @@ int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx,
  * \brief          This function performs a PKCS#1 v2.1 PSS verification
  *                 operation (RSASSA-PSS-VERIFY).
  *
- *                 The hash function for the MGF mask generating function
- *                 is that specified in \p mgf1_hash_id.
- *
  * \note           The \p sig buffer must be as large as the size
  *                 of \p ctx->N. For example, 128 Bytes if RSA-1024 is used.
  *
- * \note           The \p hash_id in the RSA context is ignored.
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) is ignored.
  *
  * \param ctx      The initialized RSA public key context to use.
  * \param f_rng    The RNG function to use. If \p mode is #MBEDTLS_RSA_PRIVATE,
@@ -1243,7 +1285,13 @@ int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx,
  *                 buffer of length \p hashlen Bytes. If \p md_alg is not
  *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
  *                 the size of the hash corresponding to \p md_alg.
- * \param mgf1_hash_id      The message digest used for mask generation.
+ * \param mgf1_hash_id      The message digest algorithm used for the
+ *                          verification operation and the mask generation
+ *                          function (MGF1). For more details on the encoding
+ *                          operation and the mask generation function, consult
+ *                          <em>RFC-3447: Public-Key Cryptography Standards
+ *                          (PKCS) #1 v2.1: RSA Cryptography
+ *                          Specifications</em>.
  * \param expected_salt_len The length of the salt used in padding. Use
  *                          #MBEDTLS_RSA_SALT_LEN_ANY to accept any salt length.
  * \param sig      The buffer holding the signature. This must be a readable
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h
index 953cb7b81d7..d55492bb16b 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h
@@ -36,13 +36,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -56,39 +50,18 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 
 #ifndef MBEDTLS_RSA_INTERNAL_H
 #define MBEDTLS_RSA_INTERNAL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha1.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha1.h
index 60c514a49ec..4c3251b4a12 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha1.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha1.h
@@ -12,13 +12,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -31,33 +25,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SHA1_H
 #define MBEDTLS_SHA1_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -66,8 +39,10 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED                  -0x0035  /**< SHA-1 hardware accelerator failed */
-#define MBEDTLS_ERR_SHA1_BAD_INPUT_DATA                   -0x0073  /**< SHA-1 input data was malformed. */
+/** SHA-1 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED                  -0x0035
+/** SHA-1 input data was malformed. */
+#define MBEDTLS_ERR_SHA1_BAD_INPUT_DATA                   -0x0073
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha256.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha256.h
index b1881e183c4..5b54be21425 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha256.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha256.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,33 +21,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SHA256_H
 #define MBEDTLS_SHA256_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -62,8 +35,10 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED                -0x0037  /**< SHA-256 hardware accelerator failed */
-#define MBEDTLS_ERR_SHA256_BAD_INPUT_DATA                 -0x0074  /**< SHA-256 input data was malformed. */
+/** SHA-256 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED                -0x0037
+/** SHA-256 input data was malformed. */
+#define MBEDTLS_ERR_SHA256_BAD_INPUT_DATA                 -0x0074
 
 #ifdef __cplusplus
 extern "C" {
@@ -262,6 +237,9 @@ MBEDTLS_DEPRECATED void mbedtls_sha256_process( mbedtls_sha256_context *ctx,
  *                 be a writable buffer of length \c 32 Bytes.
  * \param is224    Determines which function to use. This must be
  *                 either \c 0 for SHA-256, or \c 1 for SHA-224.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
  */
 int mbedtls_sha256_ret( const unsigned char *input,
                         size_t ilen,
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha512.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha512.h
index 5e5a15e0008..cca47c2fe62 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha512.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/sha512.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,33 +20,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SHA512_H
 #define MBEDTLS_SHA512_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -61,8 +34,10 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED                -0x0039  /**< SHA-512 hardware accelerator failed */
-#define MBEDTLS_ERR_SHA512_BAD_INPUT_DATA                 -0x0075  /**< SHA-512 input data was malformed. */
+/** SHA-512 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED                -0x0039
+/** SHA-512 input data was malformed. */
+#define MBEDTLS_ERR_SHA512_BAD_INPUT_DATA                 -0x0075
 
 #ifdef __cplusplus
 extern "C" {
@@ -84,8 +59,10 @@ typedef struct mbedtls_sha512_context
     uint64_t total[2];          /*!< The number of Bytes processed. */
     uint64_t state[8];          /*!< The intermediate digest state. */
     unsigned char buffer[128];  /*!< The data block being processed. */
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
     int is384;                  /*!< Determines which function to use:
                                      0: Use SHA-512, or 1: Use SHA-384. */
+#endif
 }
 mbedtls_sha512_context;
 
@@ -126,7 +103,11 @@ void mbedtls_sha512_clone( mbedtls_sha512_context *dst,
  *
  * \param ctx      The SHA-512 context to use. This must be initialized.
  * \param is384    Determines which function to use. This must be
- *                 either \c for SHA-512, or \c 1 for SHA-384.
+ *                 either \c 0 for SHA-512, or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will return
+ *                 #MBEDTLS_ERR_SHA512_BAD_INPUT_DATA.
  *
  * \return         \c 0 on success.
  * \return         A negative error code on failure.
@@ -194,6 +175,9 @@ int mbedtls_internal_sha512_process( mbedtls_sha512_context *ctx,
  * \param ctx      The SHA-512 context to use. This must be initialized.
  * \param is384    Determines which function to use. This must be either
  *                 \c 0 for SHA-512 or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will fail to work.
  */
 MBEDTLS_DEPRECATED void mbedtls_sha512_starts( mbedtls_sha512_context *ctx,
                                                int is384 );
@@ -264,6 +248,10 @@ MBEDTLS_DEPRECATED void mbedtls_sha512_process(
  * \param is384    Determines which function to use. This must be either
  *                 \c 0 for SHA-512, or \c 1 for SHA-384.
  *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will return
+ *                 #MBEDTLS_ERR_SHA512_BAD_INPUT_DATA.
+ *
  * \return         \c 0 on success.
  * \return         A negative error code on failure.
  */
@@ -298,6 +286,9 @@ int mbedtls_sha512_ret( const unsigned char *input,
  *                 be a writable buffer of length \c 64 Bytes.
  * \param is384    Determines which function to use. This must be either
  *                 \c 0 for SHA-512, or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will fail to work.
  */
 MBEDTLS_DEPRECATED void mbedtls_sha512( const unsigned char *input,
                                         size_t ilen,
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl.h
index 0abeb430e49..209dbf6053c 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,53 +18,37 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_H
 #define MBEDTLS_SSL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
-#include "ecp.h"
+#include "mbedtls/bignum.h"
+#include "mbedtls/ecp.h"
 
-#include "ssl_ciphersuites.h"
+#include "mbedtls/ssl_ciphersuites.h"
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
-#include "x509_crt.h"
-#include "x509_crl.h"
+#include "mbedtls/x509_crt.h"
+#include "mbedtls/x509_crl.h"
 #endif
 
 #if defined(MBEDTLS_DHM_C)
-#include "dhm.h"
+#include "mbedtls/dhm.h"
 #endif
 
-#if defined(MBEDTLS_ECDH_C)
-#include "ecdh.h"
+/* Adding guard for MBEDTLS_ECDSA_C to ensure no compile errors due
+ * to guards also being in ssl_srv.c and ssl_cli.c. There is a gap
+ * in functionality that access to ecdh_ctx structure is needed for
+ * MBEDTLS_ECDSA_C which does not seem correct.
+ */
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C)
+#include "mbedtls/ecdh.h"
 #endif
 
 #if defined(MBEDTLS_ZLIB_SUPPORT)
@@ -87,68 +65,132 @@
 #endif
 
 #if defined(MBEDTLS_HAVE_TIME)
-#include "platform_time.h"
+#include "mbedtls/platform_time.h"
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 /*
  * SSL Error codes
  */
-#define MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE               -0x7080  /**< The requested feature is not available. */
-#define MBEDTLS_ERR_SSL_BAD_INPUT_DATA                    -0x7100  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_SSL_INVALID_MAC                       -0x7180  /**< Verification of the message MAC failed. */
-#define MBEDTLS_ERR_SSL_INVALID_RECORD                    -0x7200  /**< An invalid SSL record was received. */
-#define MBEDTLS_ERR_SSL_CONN_EOF                          -0x7280  /**< The connection indicated an EOF. */
-#define MBEDTLS_ERR_SSL_UNKNOWN_CIPHER                    -0x7300  /**< An unknown cipher was received. */
-#define MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN                  -0x7380  /**< The server has no ciphersuites in common with the client. */
-#define MBEDTLS_ERR_SSL_NO_RNG                            -0x7400  /**< No RNG was provided to the SSL module. */
-#define MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE             -0x7480  /**< No client certification received from the client, but required by the authentication mode. */
-#define MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE             -0x7500  /**< Our own certificate(s) is/are too large to send in an SSL message. */
-#define MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED              -0x7580  /**< The own certificate is not set, but needed by the server. */
-#define MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED              -0x7600  /**< The own private key or pre-shared key is not set, but needed. */
-#define MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED                 -0x7680  /**< No CA Chain is set, but required to operate. */
-#define MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE                -0x7700  /**< An unexpected message was received from our peer. */
-#define MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE               -0x7780  /**< A fatal alert message was received from our peer. */
-#define MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED                -0x7800  /**< Verification of our peer failed. */
-#define MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY                 -0x7880  /**< The peer notified us that the connection is going to be closed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO               -0x7900  /**< Processing of the ClientHello handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO               -0x7980  /**< Processing of the ServerHello handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE                -0x7A00  /**< Processing of the Certificate handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST        -0x7A80  /**< Processing of the CertificateRequest handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE        -0x7B00  /**< Processing of the ServerKeyExchange handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE          -0x7B80  /**< Processing of the ServerHelloDone handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE        -0x7C00  /**< Processing of the ClientKeyExchange handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP     -0x7C80  /**< Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Read Public. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS     -0x7D00  /**< Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Calculate Secret. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY         -0x7D80  /**< Processing of the CertificateVerify handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC         -0x7E00  /**< Processing of the ChangeCipherSpec handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_FINISHED                   -0x7E80  /**< Processing of the Finished handshake message failed. */
-#define MBEDTLS_ERR_SSL_ALLOC_FAILED                      -0x7F00  /**< Memory allocation failed */
-#define MBEDTLS_ERR_SSL_HW_ACCEL_FAILED                   -0x7F80  /**< Hardware acceleration function returned with error */
-#define MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH              -0x6F80  /**< Hardware acceleration function skipped / left alone data */
-#define MBEDTLS_ERR_SSL_COMPRESSION_FAILED                -0x6F00  /**< Processing of the compression / decompression failed */
-#define MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION           -0x6E80  /**< Handshake protocol not within min/max boundaries */
-#define MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET         -0x6E00  /**< Processing of the NewSessionTicket handshake message failed. */
-#define MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED            -0x6D80  /**< Session ticket has expired. */
-#define MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH                  -0x6D00  /**< Public key type mismatch (eg, asked for RSA key exchange and presented EC key) */
-#define MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY                  -0x6C80  /**< Unknown identity received (eg, PSK identity) */
-#define MBEDTLS_ERR_SSL_INTERNAL_ERROR                    -0x6C00  /**< Internal error (eg, unexpected failure in lower-level module) */
-#define MBEDTLS_ERR_SSL_COUNTER_WRAPPING                  -0x6B80  /**< A counter would wrap (eg, too many messages exchanged). */
-#define MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO       -0x6B00  /**< Unexpected message at ServerHello in renegotiation. */
-#define MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED             -0x6A80  /**< DTLS client must retry for hello verification */
-#define MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL                  -0x6A00  /**< A buffer is too small to receive or write a message */
-#define MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE             -0x6980  /**< None of the common ciphersuites is usable (eg, no suitable certificate, see debug messages). */
-#define MBEDTLS_ERR_SSL_WANT_READ                         -0x6900  /**< No data of requested type currently available on underlying transport. */
-#define MBEDTLS_ERR_SSL_WANT_WRITE                        -0x6880  /**< Connection requires a write call. */
-#define MBEDTLS_ERR_SSL_TIMEOUT                           -0x6800  /**< The operation timed out. */
-#define MBEDTLS_ERR_SSL_CLIENT_RECONNECT                  -0x6780  /**< The client initiated a reconnect from the same port. */
-#define MBEDTLS_ERR_SSL_UNEXPECTED_RECORD                 -0x6700  /**< Record header looks valid but is not expected. */
-#define MBEDTLS_ERR_SSL_NON_FATAL                         -0x6680  /**< The alert message received indicates a non-fatal error. */
-#define MBEDTLS_ERR_SSL_INVALID_VERIFY_HASH               -0x6600  /**< Couldn't set the hash for verifying CertificateVerify */
-#define MBEDTLS_ERR_SSL_CONTINUE_PROCESSING               -0x6580  /**< Internal-only message signaling that further message-processing should be done */
-#define MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS                 -0x6500  /**< The asynchronous operation is not completed yet. */
-#define MBEDTLS_ERR_SSL_EARLY_MESSAGE                     -0x6480  /**< Internal-only message signaling that a message arrived early. */
-#define MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS                -0x7000  /**< A cryptographic operation is in progress. Try again later. */
-#define MBEDTLS_ERR_SSL_BAD_CONFIG                        -0x5E80  /**< Invalid value in SSL config */
+/** The requested feature is not available. */
+#define MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE               -0x7080
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_SSL_BAD_INPUT_DATA                    -0x7100
+/** Verification of the message MAC failed. */
+#define MBEDTLS_ERR_SSL_INVALID_MAC                       -0x7180
+/** An invalid SSL record was received. */
+#define MBEDTLS_ERR_SSL_INVALID_RECORD                    -0x7200
+/** The connection indicated an EOF. */
+#define MBEDTLS_ERR_SSL_CONN_EOF                          -0x7280
+/** An unknown cipher was received. */
+#define MBEDTLS_ERR_SSL_UNKNOWN_CIPHER                    -0x7300
+/** The server has no ciphersuites in common with the client. */
+#define MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN                  -0x7380
+/** No RNG was provided to the SSL module. */
+#define MBEDTLS_ERR_SSL_NO_RNG                            -0x7400
+/** No client certification received from the client, but required by the authentication mode. */
+#define MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE             -0x7480
+/** Our own certificate(s) is/are too large to send in an SSL message. */
+#define MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE             -0x7500
+/** The own certificate is not set, but needed by the server. */
+#define MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED              -0x7580
+/** The own private key or pre-shared key is not set, but needed. */
+#define MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED              -0x7600
+/** No CA Chain is set, but required to operate. */
+#define MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED                 -0x7680
+/** An unexpected message was received from our peer. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE                -0x7700
+/** A fatal alert message was received from our peer. */
+#define MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE               -0x7780
+/** Verification of our peer failed. */
+#define MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED                -0x7800
+/** The peer notified us that the connection is going to be closed. */
+#define MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY                 -0x7880
+/** Processing of the ClientHello handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO               -0x7900
+/** Processing of the ServerHello handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO               -0x7980
+/** Processing of the Certificate handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE                -0x7A00
+/** Processing of the CertificateRequest handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST        -0x7A80
+/** Processing of the ServerKeyExchange handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE        -0x7B00
+/** Processing of the ServerHelloDone handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE          -0x7B80
+/** Processing of the ClientKeyExchange handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE        -0x7C00
+/** Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Read Public. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP     -0x7C80
+/** Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Calculate Secret. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS     -0x7D00
+/** Processing of the CertificateVerify handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY         -0x7D80
+/** Processing of the ChangeCipherSpec handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC         -0x7E00
+/** Processing of the Finished handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_FINISHED                   -0x7E80
+/** Memory allocation failed */
+#define MBEDTLS_ERR_SSL_ALLOC_FAILED                      -0x7F00
+/** Hardware acceleration function returned with error */
+#define MBEDTLS_ERR_SSL_HW_ACCEL_FAILED                   -0x7F80
+/** Hardware acceleration function skipped / left alone data */
+#define MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH              -0x6F80
+/** Processing of the compression / decompression failed */
+#define MBEDTLS_ERR_SSL_COMPRESSION_FAILED                -0x6F00
+/** Handshake protocol not within min/max boundaries */
+#define MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION           -0x6E80
+/** Processing of the NewSessionTicket handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET         -0x6E00
+/** Session ticket has expired. */
+#define MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED            -0x6D80
+/** Public key type mismatch (eg, asked for RSA key exchange and presented EC key) */
+#define MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH                  -0x6D00
+/** Unknown identity received (eg, PSK identity) */
+#define MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY                  -0x6C80
+/** Internal error (eg, unexpected failure in lower-level module) */
+#define MBEDTLS_ERR_SSL_INTERNAL_ERROR                    -0x6C00
+/** A counter would wrap (eg, too many messages exchanged). */
+#define MBEDTLS_ERR_SSL_COUNTER_WRAPPING                  -0x6B80
+/** Unexpected message at ServerHello in renegotiation. */
+#define MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO       -0x6B00
+/** DTLS client must retry for hello verification */
+#define MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED             -0x6A80
+/** A buffer is too small to receive or write a message */
+#define MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL                  -0x6A00
+/** None of the common ciphersuites is usable (eg, no suitable certificate, see debug messages). */
+#define MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE             -0x6980
+/** No data of requested type currently available on underlying transport. */
+#define MBEDTLS_ERR_SSL_WANT_READ                         -0x6900
+/** Connection requires a write call. */
+#define MBEDTLS_ERR_SSL_WANT_WRITE                        -0x6880
+/** The operation timed out. */
+#define MBEDTLS_ERR_SSL_TIMEOUT                           -0x6800
+/** The client initiated a reconnect from the same port. */
+#define MBEDTLS_ERR_SSL_CLIENT_RECONNECT                  -0x6780
+/** Record header looks valid but is not expected. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_RECORD                 -0x6700
+/** The alert message received indicates a non-fatal error. */
+#define MBEDTLS_ERR_SSL_NON_FATAL                         -0x6680
+/** Couldn't set the hash for verifying CertificateVerify */
+#define MBEDTLS_ERR_SSL_INVALID_VERIFY_HASH               -0x6600
+/** Internal-only message signaling that further message-processing should be done */
+#define MBEDTLS_ERR_SSL_CONTINUE_PROCESSING               -0x6580
+/** The asynchronous operation is not completed yet. */
+#define MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS                 -0x6500
+/** Internal-only message signaling that a message arrived early. */
+#define MBEDTLS_ERR_SSL_EARLY_MESSAGE                     -0x6480
+/** An encrypted DTLS-frame with an unexpected CID was received. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_CID                    -0x6000
+/** An operation failed due to an unexpected version or configuration. */
+#define MBEDTLS_ERR_SSL_VERSION_MISMATCH                  -0x5F00
+/** A cryptographic operation is in progress. Try again later. */
+#define MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS                -0x7000
+/** Invalid value in SSL config */
+#define MBEDTLS_ERR_SSL_BAD_CONFIG                        -0x5E80
 
 /*
  * Various constants
@@ -158,6 +200,7 @@
 #define MBEDTLS_SSL_MINOR_VERSION_1             1   /*!< TLS v1.0 */
 #define MBEDTLS_SSL_MINOR_VERSION_2             2   /*!< TLS v1.1 */
 #define MBEDTLS_SSL_MINOR_VERSION_3             3   /*!< TLS v1.2 */
+#define MBEDTLS_SSL_MINOR_VERSION_4             4   /*!< TLS v1.3 (experimental) */
 
 #define MBEDTLS_SSL_TRANSPORT_STREAM            0   /*!< TLS      */
 #define MBEDTLS_SSL_TRANSPORT_DATAGRAM          1   /*!< DTLS     */
@@ -185,6 +228,9 @@
 #define MBEDTLS_SSL_EXTENDED_MS_DISABLED        0
 #define MBEDTLS_SSL_EXTENDED_MS_ENABLED         1
 
+#define MBEDTLS_SSL_CID_DISABLED                0
+#define MBEDTLS_SSL_CID_ENABLED                 1
+
 #define MBEDTLS_SSL_ETM_DISABLED                0
 #define MBEDTLS_SSL_ETM_ENABLED                 1
 
@@ -231,6 +277,9 @@
 #define MBEDTLS_SSL_CERT_REQ_CA_LIST_ENABLED       1
 #define MBEDTLS_SSL_CERT_REQ_CA_LIST_DISABLED      0
 
+#define MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED    0
+#define MBEDTLS_SSL_DTLS_SRTP_MKI_SUPPORTED      1
+
 /*
  * Default range for DTLS retransmission timer value, in milliseconds.
  * RFC 6347 4.2.4.1 says from 1 second to 60 seconds.
@@ -281,6 +330,25 @@
 #define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
 #endif
 
+/*
+ * Maximum length of CIDs for incoming and outgoing messages.
+ */
+#if !defined(MBEDTLS_SSL_CID_IN_LEN_MAX)
+#define MBEDTLS_SSL_CID_IN_LEN_MAX          32
+#endif
+
+#if !defined(MBEDTLS_SSL_CID_OUT_LEN_MAX)
+#define MBEDTLS_SSL_CID_OUT_LEN_MAX         32
+#endif
+
+#if !defined(MBEDTLS_SSL_CID_PADDING_GRANULARITY)
+#define MBEDTLS_SSL_CID_PADDING_GRANULARITY 16
+#endif
+
+#if !defined(MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY)
+#define MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY 1
+#endif
+
 /* \} name SECTION: Module settings */
 
 /*
@@ -328,6 +396,7 @@
 #define MBEDTLS_SSL_MSG_ALERT                  21
 #define MBEDTLS_SSL_MSG_HANDSHAKE              22
 #define MBEDTLS_SSL_MSG_APPLICATION_DATA       23
+#define MBEDTLS_SSL_MSG_CID                    25
 
 #define MBEDTLS_SSL_ALERT_LEVEL_WARNING         1
 #define MBEDTLS_SSL_ALERT_LEVEL_FATAL           2
@@ -390,6 +459,8 @@
 
 #define MBEDTLS_TLS_EXT_SIG_ALG                     13
 
+#define MBEDTLS_TLS_EXT_USE_SRTP                    14
+
 #define MBEDTLS_TLS_EXT_ALPN                        16
 
 #define MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC            22 /* 0x16 */
@@ -397,6 +468,17 @@
 
 #define MBEDTLS_TLS_EXT_SESSION_TICKET              35
 
+/* The value of the CID extension is still TBD as of
+ * draft-ietf-tls-dtls-connection-id-05
+ * (https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05).
+ *
+ * A future minor revision of Mbed TLS may change the default value of
+ * this option to match evolving standards and usage.
+ */
+#if !defined(MBEDTLS_TLS_EXT_CID)
+#define MBEDTLS_TLS_EXT_CID                        254 /* TBD */
+#endif
+
 #define MBEDTLS_TLS_EXT_ECJPAKE_KKPP               256 /* experimental */
 
 #define MBEDTLS_TLS_EXT_RENEGOTIATION_INFO      0xFF01
@@ -475,6 +557,18 @@ typedef enum
 }
 mbedtls_ssl_states;
 
+/*
+ * The tls_prf function types.
+ */
+typedef enum
+{
+   MBEDTLS_SSL_TLS_PRF_NONE,
+   MBEDTLS_SSL_TLS_PRF_SSL3,
+   MBEDTLS_SSL_TLS_PRF_TLS1,
+   MBEDTLS_SSL_TLS_PRF_SHA384,
+   MBEDTLS_SSL_TLS_PRF_SHA256
+}
+mbedtls_tls_prf_types;
 /**
  * \brief          Callback type: send data on the network.
  *
@@ -506,10 +600,11 @@ typedef int mbedtls_ssl_send_t( void *ctx,
  * \param buf      Buffer to write the received data to
  * \param len      Length of the receive buffer
  *
- * \return         The callback must return the number of bytes received,
- *                 or a non-zero error code.
- *                 If performing non-blocking I/O, \c MBEDTLS_ERR_SSL_WANT_READ
+ * \returns        If data has been received, the positive number of bytes received.
+ * \returns        \c 0 if the connection has been closed.
+ * \returns        If performing non-blocking I/O, \c MBEDTLS_ERR_SSL_WANT_READ
  *                 must be returned when the operation would block.
+ * \returns        Another negative error code on other kinds of failures.
  *
  * \note           The callback may receive fewer bytes than the length of the
  *                 buffer. It must always return the number of bytes actually
@@ -812,11 +907,77 @@ typedef int mbedtls_ssl_async_resume_t( mbedtls_ssl_context *ssl,
 typedef void mbedtls_ssl_async_cancel_t( mbedtls_ssl_context *ssl );
 #endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
 
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_MAX_LEN  48
+#if defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA256
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  32
+#elif defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA384
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  48
+#elif defined(MBEDTLS_SHA1_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA1
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  20
+#else
+/* This is already checked in check_config.h, but be sure. */
+#error "Bad configuration - need SHA-1, SHA-256 or SHA-512 enabled to compute digest of peer CRT."
+#endif
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED &&
+          !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+
+#define MBEDTLS_TLS_SRTP_MAX_MKI_LENGTH             255
+#define MBEDTLS_TLS_SRTP_MAX_PROFILE_LIST_LENGTH    4
+/*
+ * For code readability use a typedef for DTLS-SRTP profiles
+ *
+ * Use_srtp extension protection profiles values as defined in
+ * http://www.iana.org/assignments/srtp-protection/srtp-protection.xhtml
+ *
+ * Reminder: if this list is expanded mbedtls_ssl_check_srtp_profile_value
+ * must be updated too.
+ */
+#define MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80     ( (uint16_t) 0x0001)
+#define MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32     ( (uint16_t) 0x0002)
+#define MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80          ( (uint16_t) 0x0005)
+#define MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32          ( (uint16_t) 0x0006)
+/* This one is not iana defined, but for code readability. */
+#define MBEDTLS_TLS_SRTP_UNSET                      ( (uint16_t) 0x0000)
+
+typedef uint16_t mbedtls_ssl_srtp_profile;
+
+typedef struct mbedtls_dtls_srtp_info_t
+{
+    /*! The SRTP profile that was negotiated. */
+    mbedtls_ssl_srtp_profile chosen_dtls_srtp_profile;
+    /*! The length of mki_value. */
+    uint16_t mki_len;
+    /*! The mki_value used, with max size of 256 bytes. */
+    unsigned char mki_value[MBEDTLS_TLS_SRTP_MAX_MKI_LENGTH];
+}
+mbedtls_dtls_srtp_info;
+
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
 /*
  * This structure is used for storing current session data.
+ *
+ * Note: when changing this definition, we need to check and update:
+ *  - in tests/suites/test_suite_ssl.function:
+ *      ssl_populate_session() and ssl_serialize_session_save_load()
+ *  - in library/ssl_tls.c:
+ *      mbedtls_ssl_session_init() and mbedtls_ssl_session_free()
+ *      mbedtls_ssl_session_save() and ssl_session_load()
+ *      ssl_session_copy()
  */
 struct mbedtls_ssl_session
 {
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+    unsigned char mfl_code;     /*!< MaxFragmentLength negotiated by peer */
+#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
+
 #if defined(MBEDTLS_HAVE_TIME)
     mbedtls_time_t start;       /*!< starting time      */
 #endif
@@ -827,7 +988,15 @@ struct mbedtls_ssl_session
     unsigned char master[48];   /*!< the master secret  */
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
-    mbedtls_x509_crt *peer_cert;        /*!< peer X.509 cert chain */
+#if defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+    mbedtls_x509_crt *peer_cert;       /*!< peer X.509 cert chain */
+#else /* MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
+    /*! The digest of the peer's end-CRT. This must be kept to detect CRT
+     *  changes during renegotiation, mitigating the triple handshake attack. */
+    unsigned char *peer_cert_digest;
+    size_t peer_cert_digest_len;
+    mbedtls_md_type_t peer_cert_digest_type;
+#endif /* !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
     uint32_t verify_result;          /*!<  verification result     */
 
@@ -837,10 +1006,6 @@ struct mbedtls_ssl_session
     uint32_t ticket_lifetime;   /*!< ticket lifetime hint    */
 #endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_CLI_C */
 
-#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
-    unsigned char mfl_code;     /*!< MaxFragmentLength negotiated by peer */
-#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
-
 #if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
     int trunc_hmac;             /*!< flag for truncated hmac activation   */
 #endif /* MBEDTLS_SSL_TRUNCATED_HMAC */
@@ -855,7 +1020,98 @@ struct mbedtls_ssl_session
  */
 struct mbedtls_ssl_config
 {
-    /* Group items by size (largest first) to minimize padding overhead */
+    /* Group items by size and reorder them to maximize usage of immediate offset access.    */
+
+    /*
+     * Numerical settings (char)
+     */
+
+    unsigned char max_major_ver;    /*!< max. major version used            */
+    unsigned char max_minor_ver;    /*!< max. minor version used            */
+    unsigned char min_major_ver;    /*!< min. major version used            */
+    unsigned char min_minor_ver;    /*!< min. minor version used            */
+
+    /*
+     * Flags (could be bit-fields to save RAM, but separate bytes make
+     * the code smaller on architectures with an instruction for direct
+     * byte access).
+     */
+
+    uint8_t endpoint /*bool*/;      /*!< 0: client, 1: server               */
+    uint8_t transport /*bool*/;     /*!< stream (TLS) or datagram (DTLS)    */
+    uint8_t authmode /*2 bits*/;    /*!< MBEDTLS_SSL_VERIFY_XXX             */
+    /* needed even with renego disabled for LEGACY_BREAK_HANDSHAKE          */
+    uint8_t allow_legacy_renegotiation /*2 bits*/; /*!< MBEDTLS_LEGACY_XXX  */
+#if defined(MBEDTLS_ARC4_C)
+    uint8_t arc4_disabled /*bool*/; /*!< blacklist RC4 ciphersuites?        */
+#endif
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+    uint8_t mfl_code /*3 bits*/;    /*!< desired fragment length            */
+#endif
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+    uint8_t encrypt_then_mac /*bool*/;  /*!< negotiate encrypt-then-mac?    */
+#endif
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+    uint8_t extended_ms /*bool*/;   /*!< negotiate extended master secret?  */
+#endif
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+    uint8_t anti_replay /*bool*/;   /*!< detect and prevent replay?         */
+#endif
+#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
+    uint8_t cbc_record_splitting /*bool*/;  /*!< do cbc record splitting    */
+#endif
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+    uint8_t disable_renegotiation /*bool*/; /*!< disable renegotiation?     */
+#endif
+#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
+    uint8_t trunc_hmac /*bool*/;    /*!< negotiate truncated hmac?          */
+#endif
+#if defined(MBEDTLS_SSL_SESSION_TICKETS)
+    uint8_t session_tickets /*bool*/;   /*!< use session tickets?           */
+#endif
+#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C)
+    uint8_t fallback /*bool*/;      /*!< is this a fallback?                */
+#endif
+#if defined(MBEDTLS_SSL_SRV_C)
+    uint8_t cert_req_ca_list /*bool*/;  /*!< enable sending CA list in
+                                          Certificate Request messages?     */
+#endif
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t ignore_unexpected_cid /*bool*/; /*!< Determines whether DTLS
+                                             *   record with unexpected CID
+                                             *   should lead to failure.    */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    uint8_t dtls_srtp_mki_support /*bool*/; /*!< support having mki_value
+                                                 in the use_srtp extension? */
+#endif
+
+    /*
+     * Numerical settings (int or larger)
+     */
+
+    uint32_t read_timeout;          /*!< timeout for mbedtls_ssl_read (ms)  */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    uint32_t hs_timeout_min;        /*!< initial value of the handshake
+                                         retransmission timeout (ms)        */
+    uint32_t hs_timeout_max;        /*!< maximum value of the handshake
+                                         retransmission timeout (ms)        */
+#endif
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+    int renego_max_records;         /*!< grace period for renegotiation     */
+    unsigned char renego_period[8]; /*!< value of the record counters
+                                         that triggers renegotiation        */
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
+    unsigned int badmac_limit;      /*!< limit of records with a bad MAC    */
+#endif
+
+#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C)
+    unsigned int dhm_min_bitlen;    /*!< min. bit length of the DHM prime   */
+#endif
 
     /*
      * Pointers
@@ -889,7 +1145,7 @@ struct mbedtls_ssl_config
     void *p_vrfy;                   /*!< context for X.509 verify calllback */
 #endif
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
     /** Callback to retrieve PSK key from identity                          */
     int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *, size_t);
     void *p_psk;                    /*!< context for PSK callback           */
@@ -918,14 +1174,28 @@ struct mbedtls_ssl_config
     /** Callback to export key block and master secret                      */
     int (*f_export_keys)( void *, const unsigned char *,
             const unsigned char *, size_t, size_t, size_t );
+    /** Callback to export key block, master secret,
+     *  tls_prf and random bytes. Should replace f_export_keys    */
+    int (*f_export_keys_ext)( void *, const unsigned char *,
+                const unsigned char *, size_t, size_t, size_t,
+                const unsigned char[32], const unsigned char[32],
+                mbedtls_tls_prf_types );
     void *p_export_keys;            /*!< context for key export callback    */
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    size_t cid_len; /*!< The length of CIDs for incoming DTLS records.      */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
     const mbedtls_x509_crt_profile *cert_profile; /*!< verification profile */
     mbedtls_ssl_key_cert *key_cert; /*!< own certificate/key pair(s)        */
     mbedtls_x509_crt *ca_chain;     /*!< trusted CAs                        */
     mbedtls_x509_crl *ca_crl;       /*!< trusted CAs CRLs                   */
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+    mbedtls_x509_crt_ca_cb_t f_ca_cb;
+    void *p_ca_cb;
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
 
 #if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
@@ -938,7 +1208,7 @@ struct mbedtls_ssl_config
     void *p_async_config_data; /*!< Configuration data set by mbedtls_ssl_conf_async_private_cb(). */
 #endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
     const int *sig_hashes;          /*!< allowed signature hashes           */
 #endif
 
@@ -951,103 +1221,52 @@ struct mbedtls_ssl_config
     mbedtls_mpi dhm_G;              /*!< generator for DHM                  */
 #endif
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
-    unsigned char *psk;             /*!< pre-shared key. This field should
-                                         only be set via
-                                         mbedtls_ssl_conf_psk() */
-    size_t         psk_len;         /*!< length of the pre-shared key. This
-                                         field should only be set via
-                                         mbedtls_ssl_conf_psk() */
-    unsigned char *psk_identity;    /*!< identity for PSK negotiation. This
-                                         field should only be set via
-                                         mbedtls_ssl_conf_psk() */
-    size_t         psk_identity_len;/*!< length of identity. This field should
-                                         only be set via
-                                         mbedtls_ssl_conf_psk() */
-#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_id_t psk_opaque; /*!< PSA key slot holding opaque PSK. This field
+                              *   should only be set via
+                              *   mbedtls_ssl_conf_psk_opaque().
+                              *   If either no PSK or a raw PSK have been
+                              *   configured, this has value \c 0.
+                              */
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+    unsigned char *psk;      /*!< The raw pre-shared key. This field should
+                              *   only be set via mbedtls_ssl_conf_psk().
+                              *   If either no PSK or an opaque PSK
+                              *   have been configured, this has value NULL. */
+    size_t         psk_len;  /*!< The length of the raw pre-shared key.
+                              *   This field should only be set via
+                              *   mbedtls_ssl_conf_psk().
+                              *   Its value is non-zero if and only if
+                              *   \c psk is not \c NULL. */
+
+    unsigned char *psk_identity;    /*!< The PSK identity for PSK negotiation.
+                                     *   This field should only be set via
+                                     *   mbedtls_ssl_conf_psk().
+                                     *   This is set if and only if either
+                                     *   \c psk or \c psk_opaque are set. */
+    size_t         psk_identity_len;/*!< The length of PSK identity.
+                                     *   This field should only be set via
+                                     *   mbedtls_ssl_conf_psk().
+                                     *   Its value is non-zero if and only if
+                                     *   \c psk is not \c NULL or \c psk_opaque
+                                     *   is not \c 0. */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
 
 #if defined(MBEDTLS_SSL_ALPN)
     const char **alpn_list;         /*!< ordered list of protocols          */
 #endif
 
-    /*
-     * Numerical settings (int then char)
-     */
-
-    uint32_t read_timeout;          /*!< timeout for mbedtls_ssl_read (ms)  */
-
-#if defined(MBEDTLS_SSL_PROTO_DTLS)
-    uint32_t hs_timeout_min;        /*!< initial value of the handshake
-                                         retransmission timeout (ms)        */
-    uint32_t hs_timeout_max;        /*!< maximum value of the handshake
-                                         retransmission timeout (ms)        */
-#endif
-
-#if defined(MBEDTLS_SSL_RENEGOTIATION)
-    int renego_max_records;         /*!< grace period for renegotiation     */
-    unsigned char renego_period[8]; /*!< value of the record counters
-                                         that triggers renegotiation        */
-#endif
-
-#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
-    unsigned int badmac_limit;      /*!< limit of records with a bad MAC    */
-#endif
-
-#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C)
-    unsigned int dhm_min_bitlen;    /*!< min. bit length of the DHM prime   */
-#endif
-
-    unsigned char max_major_ver;    /*!< max. major version used            */
-    unsigned char max_minor_ver;    /*!< max. minor version used            */
-    unsigned char min_major_ver;    /*!< min. major version used            */
-    unsigned char min_minor_ver;    /*!< min. minor version used            */
-
-    /*
-     * Flags (bitfields)
-     */
-
-    unsigned int endpoint : 1;      /*!< 0: client, 1: server               */
-    unsigned int transport : 1;     /*!< stream (TLS) or datagram (DTLS)    */
-    unsigned int authmode : 2;      /*!< MBEDTLS_SSL_VERIFY_XXX             */
-    /* needed even with renego disabled for LEGACY_BREAK_HANDSHAKE          */
-    unsigned int allow_legacy_renegotiation : 2 ; /*!< MBEDTLS_LEGACY_XXX   */
-#if defined(MBEDTLS_ARC4_C)
-    unsigned int arc4_disabled : 1; /*!< blacklist RC4 ciphersuites?        */
-#endif
-#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
-    unsigned int mfl_code : 3;      /*!< desired fragment length            */
-#endif
-#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
-    unsigned int encrypt_then_mac : 1 ; /*!< negotiate encrypt-then-mac?    */
-#endif
-#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
-    unsigned int extended_ms : 1;   /*!< negotiate extended master secret?  */
-#endif
-#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
-    unsigned int anti_replay : 1;   /*!< detect and prevent replay?         */
-#endif
-#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
-    unsigned int cbc_record_splitting : 1;  /*!< do cbc record splitting    */
-#endif
-#if defined(MBEDTLS_SSL_RENEGOTIATION)
-    unsigned int disable_renegotiation : 1; /*!< disable renegotiation?     */
-#endif
-#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
-    unsigned int trunc_hmac : 1;    /*!< negotiate truncated hmac?          */
-#endif
-#if defined(MBEDTLS_SSL_SESSION_TICKETS)
-    unsigned int session_tickets : 1;   /*!< use session tickets?           */
-#endif
-#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C)
-    unsigned int fallback : 1;      /*!< is this a fallback?                */
-#endif
-#if defined(MBEDTLS_SSL_SRV_C)
-    unsigned int cert_req_ca_list : 1;  /*!< enable sending CA list in
-                                          Certificate Request messages?     */
-#endif
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    /*! ordered list of supported srtp profile */
+    const mbedtls_ssl_srtp_profile *dtls_srtp_profile_list;
+    /*! number of supported profiles */
+    size_t dtls_srtp_profile_list_len;
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
 };
 
-
 struct mbedtls_ssl_context
 {
     const mbedtls_ssl_config *conf; /*!< configuration information          */
@@ -1070,6 +1289,12 @@ struct mbedtls_ssl_context
     unsigned badmac_seen;       /*!< records with a bad MAC received    */
 #endif /* MBEDTLS_SSL_DTLS_BADMAC_LIMIT */
 
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+    /** Callback to customize X.509 certificate chain verification          */
+    int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *);
+    void *p_vrfy;                   /*!< context for X.509 verify callback */
+#endif
+
     mbedtls_ssl_send_t *f_send; /*!< Callback for network send */
     mbedtls_ssl_recv_t *f_recv; /*!< Callback for network receive */
     mbedtls_ssl_recv_timeout_t *f_recv_timeout;
@@ -1112,6 +1337,10 @@ struct mbedtls_ssl_context
                                      TLS: maintained by us
                                      DTLS: read from peer             */
     unsigned char *in_hdr;      /*!< start of record header           */
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    unsigned char *in_cid;      /*!< The start of the CID;
+                                 *   (the end is marked by in_len).   */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
     unsigned char *in_len;      /*!< two-bytes message length field   */
     unsigned char *in_iv;       /*!< ivlen-byte IV                    */
     unsigned char *in_msg;      /*!< message contents (in_iv+ivlen)   */
@@ -1120,6 +1349,9 @@ struct mbedtls_ssl_context
     int in_msgtype;             /*!< record header: message type      */
     size_t in_msglen;           /*!< record header: message length    */
     size_t in_left;             /*!< amount of data read so far       */
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+    size_t in_buf_len;          /*!< length of input buffer           */
+#endif
 #if defined(MBEDTLS_SSL_PROTO_DTLS)
     uint16_t in_epoch;          /*!< DTLS epoch for incoming records  */
     size_t next_record_offset;  /*!< offset of the next record in datagram
@@ -1148,6 +1380,10 @@ struct mbedtls_ssl_context
     unsigned char *out_buf;     /*!< output buffer                    */
     unsigned char *out_ctr;     /*!< 64-bit outgoing message counter  */
     unsigned char *out_hdr;     /*!< start of record header           */
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    unsigned char *out_cid;     /*!< The start of the CID;
+                                 *   (the end is marked by in_len).   */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
     unsigned char *out_len;     /*!< two-bytes message length field   */
     unsigned char *out_iv;      /*!< ivlen-byte IV                    */
     unsigned char *out_msg;     /*!< message contents (out_iv+ivlen)  */
@@ -1155,6 +1391,9 @@ struct mbedtls_ssl_context
     int out_msgtype;            /*!< record header: message type      */
     size_t out_msglen;          /*!< record header: message length    */
     size_t out_left;            /*!< amount of data not yet written   */
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+    size_t out_buf_len;         /*!< length of output buffer          */
+#endif
 
     unsigned char cur_out_ctr[8]; /*!<  Outgoing record sequence  number. */
 
@@ -1186,6 +1425,13 @@ struct mbedtls_ssl_context
     const char *alpn_chosen;    /*!<  negotiated protocol                   */
 #endif /* MBEDTLS_SSL_ALPN */
 
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    /*
+     * use_srtp extension
+     */
+    mbedtls_dtls_srtp_info dtls_srtp_info;
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
     /*
      * Information for DTLS hello verify
      */
@@ -1205,25 +1451,59 @@ struct mbedtls_ssl_context
     char own_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!<  previous handshake verify data */
     char peer_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!<  previous handshake verify data */
 #endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    /* CID configuration to use in subsequent handshakes. */
+
+    /*! The next incoming CID, chosen by the user and applying to
+     *  all subsequent handshakes. This may be different from the
+     *  CID currently used in case the user has re-configured the CID
+     *  after an initial handshake. */
+    unsigned char own_cid[ MBEDTLS_SSL_CID_IN_LEN_MAX ];
+    uint8_t own_cid_len;   /*!< The length of \c own_cid. */
+    uint8_t negotiate_cid; /*!< This indicates whether the CID extension should
+                            *   be negotiated in the next handshake or not.
+                            *   Possible values are #MBEDTLS_SSL_CID_ENABLED
+                            *   and #MBEDTLS_SSL_CID_DISABLED. */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
 };
 
 #if defined(MBEDTLS_SSL_HW_RECORD_ACCEL)
 
-#define MBEDTLS_SSL_CHANNEL_OUTBOUND    0
-#define MBEDTLS_SSL_CHANNEL_INBOUND     1
-
-extern int (*mbedtls_ssl_hw_record_init)(mbedtls_ssl_context *ssl,
-                const unsigned char *key_enc, const unsigned char *key_dec,
-                size_t keylen,
-                const unsigned char *iv_enc,  const unsigned char *iv_dec,
-                size_t ivlen,
-                const unsigned char *mac_enc, const unsigned char *mac_dec,
-                size_t maclen);
-extern int (*mbedtls_ssl_hw_record_activate)(mbedtls_ssl_context *ssl, int direction);
-extern int (*mbedtls_ssl_hw_record_reset)(mbedtls_ssl_context *ssl);
-extern int (*mbedtls_ssl_hw_record_write)(mbedtls_ssl_context *ssl);
-extern int (*mbedtls_ssl_hw_record_read)(mbedtls_ssl_context *ssl);
-extern int (*mbedtls_ssl_hw_record_finish)(mbedtls_ssl_context *ssl);
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#define MBEDTLS_SSL_CHANNEL_OUTBOUND   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( 0 )
+#define MBEDTLS_SSL_CHANNEL_INBOUND    MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( 1 )
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_WARNING */
+
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_init)(
+                    mbedtls_ssl_context *ssl,
+                    const unsigned char *key_enc, const unsigned char *key_dec,
+                    size_t keylen,
+                    const unsigned char *iv_enc,  const unsigned char *iv_dec,
+                    size_t ivlen,
+                    const unsigned char *mac_enc, const unsigned char *mac_dec,
+                    size_t maclen);
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_activate)(
+                                                    mbedtls_ssl_context *ssl,
+                                                    int direction );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_reset)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_write)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_read)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_finish)(
+                                                    mbedtls_ssl_context *ssl );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
 #endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */
 
 /**
@@ -1346,13 +1626,17 @@ void mbedtls_ssl_conf_authmode( mbedtls_ssl_config *conf, int authmode );
 /**
  * \brief          Set the verification callback (Optional).
  *
- *                 If set, the verify callback is called for each
- *                 certificate in the chain. For implementation
- *                 information, please see \c mbedtls_x509_crt_verify()
+ *                 If set, the provided verify callback is called for each
+ *                 certificate in the peer's CRT chain, including the trusted
+ *                 root. For more information, please see the documentation of
+ *                 \c mbedtls_x509_crt_verify().
  *
- * \param conf     SSL configuration
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
+ * \note           For per context callbacks and contexts, please use
+ *                 mbedtls_ssl_set_verify() instead.
+ *
+ * \param conf     The SSL configuration to use.
+ * \param f_vrfy   The verification callback to use during CRT verification.
+ * \param p_vrfy   The opaque context to be passed to the callback.
  */
 void mbedtls_ssl_conf_verify( mbedtls_ssl_config *conf,
                      int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
@@ -1425,6 +1709,142 @@ void mbedtls_ssl_set_bio( mbedtls_ssl_context *ssl,
                           mbedtls_ssl_recv_timeout_t *f_recv_timeout );
 
 #if defined(MBEDTLS_SSL_PROTO_DTLS)
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+
+
+/**
+ * \brief             Configure the use of the Connection ID (CID)
+ *                    extension in the next handshake.
+ *
+ *                    Reference: draft-ietf-tls-dtls-connection-id-05
+ *                    https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05
+ *
+ *                    The DTLS CID extension allows the reliable association of
+ *                    DTLS records to DTLS connections across changes in the
+ *                    underlying transport (changed IP and Port metadata) by
+ *                    adding explicit connection identifiers (CIDs) to the
+ *                    headers of encrypted DTLS records. The desired CIDs are
+ *                    configured by the application layer and are exchanged in
+ *                    new `ClientHello` / `ServerHello` extensions during the
+ *                    handshake, where each side indicates the CID it wants the
+ *                    peer to use when writing encrypted messages. The CIDs are
+ *                    put to use once records get encrypted: the stack discards
+ *                    any incoming records that don't include the configured CID
+ *                    in their header, and adds the peer's requested CID to the
+ *                    headers of outgoing messages.
+ *
+ *                    This API enables or disables the use of the CID extension
+ *                    in the next handshake and sets the value of the CID to
+ *                    be used for incoming messages.
+ *
+ * \param ssl         The SSL context to configure. This must be initialized.
+ * \param enable      This value determines whether the CID extension should
+ *                    be used or not. Possible values are:
+ *                    - MBEDTLS_SSL_CID_ENABLED to enable the use of the CID.
+ *                    - MBEDTLS_SSL_CID_DISABLED (default) to disable the use
+ *                      of the CID.
+ * \param own_cid     The address of the readable buffer holding the CID we want
+ *                    the peer to use when sending encrypted messages to us.
+ *                    This may be \c NULL if \p own_cid_len is \c 0.
+ *                    This parameter is unused if \p enabled is set to
+ *                    MBEDTLS_SSL_CID_DISABLED.
+ * \param own_cid_len The length of \p own_cid.
+ *                    This parameter is unused if \p enabled is set to
+ *                    MBEDTLS_SSL_CID_DISABLED.
+ *
+ * \note              The value of \p own_cid_len must match the value of the
+ *                    \c len parameter passed to mbedtls_ssl_conf_cid()
+ *                    when configuring the ::mbedtls_ssl_config that \p ssl
+ *                    is bound to.
+ *
+ * \note              This CID configuration applies to subsequent handshakes
+ *                    performed on the SSL context \p ssl, but does not trigger
+ *                    one. You still have to call `mbedtls_ssl_handshake()`
+ *                    (for the initial handshake) or `mbedtls_ssl_renegotiate()`
+ *                    (for a renegotiation handshake) explicitly after a
+ *                    successful call to this function to run the handshake.
+ *
+ * \note              This call cannot guarantee that the use of the CID
+ *                    will be successfully negotiated in the next handshake,
+ *                    because the peer might not support it. Specifically:
+ *                    - On the Client, enabling the use of the CID through
+ *                      this call implies that the `ClientHello` in the next
+ *                      handshake will include the CID extension, thereby
+ *                      offering the use of the CID to the server. Only if
+ *                      the `ServerHello` contains the CID extension, too,
+ *                      the CID extension will actually be put to use.
+ *                    - On the Server, enabling the use of the CID through
+ *                      this call implies that that the server will look for
+ *                      the CID extension in a `ClientHello` from the client,
+ *                      and, if present, reply with a CID extension in its
+ *                      `ServerHello`.
+ *
+ * \note              To check whether the use of the CID was negotiated
+ *                    after the subsequent handshake has completed, please
+ *                    use the API mbedtls_ssl_get_peer_cid().
+ *
+ * \warning           If the use of the CID extension is enabled in this call
+ *                    and the subsequent handshake negotiates its use, Mbed TLS
+ *                    will silently drop every packet whose CID does not match
+ *                    the CID configured in \p own_cid. It is the responsibility
+ *                    of the user to adapt the underlying transport to take care
+ *                    of CID-based demultiplexing before handing datagrams to
+ *                    Mbed TLS.
+ *
+ * \return            \c 0 on success. In this case, the CID configuration
+ *                    applies to the next handshake.
+ * \return            A negative error code on failure.
+ */
+int mbedtls_ssl_set_cid( mbedtls_ssl_context *ssl,
+                         int enable,
+                         unsigned char const *own_cid,
+                         size_t own_cid_len );
+
+/**
+ * \brief              Get information about the use of the CID extension
+ *                     in the current connection.
+ *
+ * \param ssl          The SSL context to query.
+ * \param enabled      The address at which to store whether the CID extension
+ *                     is currently in use or not. If the CID is in use,
+ *                     `*enabled` is set to MBEDTLS_SSL_CID_ENABLED;
+ *                     otherwise, it is set to MBEDTLS_SSL_CID_DISABLED.
+ * \param peer_cid     The address of the buffer in which to store the CID
+ *                     chosen by the peer (if the CID extension is used).
+ *                     This may be \c NULL in case the value of peer CID
+ *                     isn't needed. If it is not \c NULL, \p peer_cid_len
+ *                     must not be \c NULL.
+ * \param peer_cid_len The address at which to store the size of the CID
+ *                     chosen by the peer (if the CID extension is used).
+ *                     This is also the number of Bytes in \p peer_cid that
+ *                     have been written.
+ *                     This may be \c NULL in case the length of the peer CID
+ *                     isn't needed. If it is \c NULL, \p peer_cid must be
+ *                     \c NULL, too.
+ *
+ * \note               This applies to the state of the CID negotiated in
+ *                     the last complete handshake. If a handshake is in
+ *                     progress, this function will attempt to complete
+ *                     the handshake first.
+ *
+ * \note               If CID extensions have been exchanged but both client
+ *                     and server chose to use an empty CID, this function
+ *                     sets `*enabled` to #MBEDTLS_SSL_CID_DISABLED
+ *                     (the rationale for this is that the resulting
+ *                     communication is the same as if the CID extensions
+ *                     hadn't been used).
+ *
+ * \return            \c 0 on success.
+ * \return            A negative error code on failure.
+ */
+int mbedtls_ssl_get_peer_cid( mbedtls_ssl_context *ssl,
+                     int *enabled,
+                     unsigned char peer_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ],
+                     size_t *peer_cid_len );
+
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
 /**
  * \brief          Set the Maximum Tranport Unit (MTU).
  *                 Special value: 0 means unset (no limit).
@@ -1470,6 +1890,30 @@ void mbedtls_ssl_set_bio( mbedtls_ssl_context *ssl,
 void mbedtls_ssl_set_mtu( mbedtls_ssl_context *ssl, uint16_t mtu );
 #endif /* MBEDTLS_SSL_PROTO_DTLS */
 
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief          Set a connection-specific verification callback (optional).
+ *
+ *                 If set, the provided verify callback is called for each
+ *                 certificate in the peer's CRT chain, including the trusted
+ *                 root. For more information, please see the documentation of
+ *                 \c mbedtls_x509_crt_verify().
+ *
+ * \note           This call is analogous to mbedtls_ssl_conf_verify() but
+ *                 binds the verification callback and context to an SSL context
+ *                 as opposed to an SSL configuration.
+ *                 If mbedtls_ssl_conf_verify() and mbedtls_ssl_set_verify()
+ *                 are both used, mbedtls_ssl_set_verify() takes precedence.
+ *
+ * \param ssl      The SSL context to use.
+ * \param f_vrfy   The verification callback to use during CRT verification.
+ * \param p_vrfy   The opaque context to be passed to the callback.
+ */
+void mbedtls_ssl_set_verify( mbedtls_ssl_context *ssl,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
 /**
  * \brief          Set the timeout period for mbedtls_ssl_read()
  *                 (Default: no timeout.)
@@ -1488,6 +1932,56 @@ void mbedtls_ssl_set_mtu( mbedtls_ssl_context *ssl, uint16_t mtu );
  */
 void mbedtls_ssl_conf_read_timeout( mbedtls_ssl_config *conf, uint32_t timeout );
 
+#if defined(MBEDTLS_SSL_RECORD_CHECKING)
+/**
+ * \brief          Check whether a buffer contains a valid and authentic record
+ *                 that has not been seen before. (DTLS only).
+ *
+ *                 This function does not change the user-visible state
+ *                 of the SSL context. Its sole purpose is to provide
+ *                 an indication of the legitimacy of an incoming record.
+ *
+ *                 This can be useful e.g. in distributed server environments
+ *                 using the DTLS Connection ID feature, in which connections
+ *                 might need to be passed between service instances on a change
+ *                 of peer address, but where such disruptive operations should
+ *                 only happen after the validity of incoming records has been
+ *                 confirmed.
+ *
+ * \param ssl      The SSL context to use.
+ * \param buf      The address of the buffer holding the record to be checked.
+ *                 This must be a read/write buffer of length \p buflen Bytes.
+ * \param buflen   The length of \p buf in Bytes.
+ *
+ * \note           This routine only checks whether the provided buffer begins
+ *                 with a valid and authentic record that has not been seen
+ *                 before, but does not check potential data following the
+ *                 initial record. In particular, it is possible to pass DTLS
+ *                 datagrams containing multiple records, in which case only
+ *                 the first record is checked.
+ *
+ * \note           This function modifies the input buffer \p buf. If you need
+ *                 to preserve the original record, you have to maintain a copy.
+ *
+ * \return         \c 0 if the record is valid and authentic and has not been
+ *                 seen before.
+ * \return         MBEDTLS_ERR_SSL_INVALID_MAC if the check completed
+ *                 successfully but the record was found to be not authentic.
+ * \return         MBEDTLS_ERR_SSL_INVALID_RECORD if the check completed
+ *                 successfully but the record was found to be invalid for
+ *                 a reason different from authenticity checking.
+ * \return         MBEDTLS_ERR_SSL_UNEXPECTED_RECORD if the check completed
+ *                 successfully but the record was found to be unexpected
+ *                 in the state of the SSL context, including replayed records.
+ * \return         Another negative error code on different kinds of failure.
+ *                 In this case, the SSL context becomes unusable and needs
+ *                 to be freed or reset before reuse.
+ */
+int mbedtls_ssl_check_record( mbedtls_ssl_context const *ssl,
+                              unsigned char *buf,
+                              size_t buflen );
+#endif /* MBEDTLS_SSL_RECORD_CHECKING */
+
 /**
  * \brief          Set the timer callbacks (Mandatory for DTLS.)
  *
@@ -1566,6 +2060,41 @@ typedef int mbedtls_ssl_export_keys_t( void *p_expkey,
                                 size_t maclen,
                                 size_t keylen,
                                 size_t ivlen );
+
+/**
+ * \brief           Callback type: Export key block, master secret,
+ *                                 handshake randbytes and the tls_prf function
+ *                                 used to derive keys.
+ *
+ * \note            This is required for certain uses of TLS, e.g. EAP-TLS
+ *                  (RFC 5216) and Thread. The key pointers are ephemeral and
+ *                  therefore must not be stored. The master secret and keys
+ *                  should not be used directly except as an input to a key
+ *                  derivation function.
+ *
+ * \param p_expkey  Context for the callback.
+ * \param ms        Pointer to master secret (fixed length: 48 bytes).
+ * \param kb            Pointer to key block, see RFC 5246 section 6.3.
+ *                      (variable length: 2 * maclen + 2 * keylen + 2 * ivlen).
+ * \param maclen        MAC length.
+ * \param keylen        Key length.
+ * \param ivlen         IV length.
+ * \param client_random The client random bytes.
+ * \param server_random The server random bytes.
+ * \param tls_prf_type The tls_prf enum type.
+ *
+ * \return          0 if successful, or
+ *                  a specific MBEDTLS_ERR_XXX code.
+ */
+typedef int mbedtls_ssl_export_keys_ext_t( void *p_expkey,
+                                           const unsigned char *ms,
+                                           const unsigned char *kb,
+                                           size_t maclen,
+                                           size_t keylen,
+                                           size_t ivlen,
+                                           const unsigned char client_random[32],
+                                           const unsigned char server_random[32],
+                                           mbedtls_tls_prf_types tls_prf_type );
 #endif /* MBEDTLS_SSL_EXPORT_KEYS */
 
 /**
@@ -1631,6 +2160,22 @@ void mbedtls_ssl_conf_session_tickets_cb( mbedtls_ssl_config *conf,
 void mbedtls_ssl_conf_export_keys_cb( mbedtls_ssl_config *conf,
         mbedtls_ssl_export_keys_t *f_export_keys,
         void *p_export_keys );
+
+/**
+ * \brief           Configure extended key export callback.
+ *                  (Default: none.)
+ *
+ * \note            See \c mbedtls_ssl_export_keys_ext_t.
+ * \warning         Exported key material must not be used for any purpose
+ *                  before the (D)TLS handshake is completed
+ *
+ * \param conf      SSL configuration context
+ * \param f_export_keys_ext Callback for exporting keys
+ * \param p_export_keys     Context for the callback
+ */
+void mbedtls_ssl_conf_export_keys_ext_cb( mbedtls_ssl_config *conf,
+        mbedtls_ssl_export_keys_ext_t *f_export_keys_ext,
+        void *p_export_keys );
 #endif /* MBEDTLS_SSL_EXPORT_KEYS */
 
 #if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
@@ -1981,6 +2526,90 @@ void mbedtls_ssl_conf_session_cache( mbedtls_ssl_config *conf,
 int mbedtls_ssl_set_session( mbedtls_ssl_context *ssl, const mbedtls_ssl_session *session );
 #endif /* MBEDTLS_SSL_CLI_C */
 
+/**
+ * \brief          Load serialized session data into a session structure.
+ *                 On client, this can be used for loading saved sessions
+ *                 before resuming them with mbedstls_ssl_set_session().
+ *                 On server, this can be used for alternative implementations
+ *                 of session cache or session tickets.
+ *
+ * \warning        If a peer certificate chain is associated with the session,
+ *                 the serialized state will only contain the peer's
+ *                 end-entity certificate and the result of the chain
+ *                 verification (unless verification was disabled), but not
+ *                 the rest of the chain.
+ *
+ * \see            mbedtls_ssl_session_save()
+ * \see            mbedtls_ssl_set_session()
+ *
+ * \param session  The session structure to be populated. It must have been
+ *                 initialised with mbedtls_ssl_session_init() but not
+ *                 populated yet.
+ * \param buf      The buffer holding the serialized session data. It must be a
+ *                 readable buffer of at least \p len bytes.
+ * \param len      The size of the serialized data in bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if input data is invalid.
+ * \return         #MBEDTLS_ERR_SSL_VERSION_MISMATCH if the serialized data
+ *                 was generated in a different version or configuration of
+ *                 Mbed TLS.
+ * \return         Another negative value for other kinds of errors (for
+ *                 example, unsupported features in the embedded certificate).
+ */
+int mbedtls_ssl_session_load( mbedtls_ssl_session *session,
+                              const unsigned char *buf,
+                              size_t len );
+
+/**
+ * \brief          Save session structure as serialized data in a buffer.
+ *                 On client, this can be used for saving session data,
+ *                 potentially in non-volatile storage, for resuming later.
+ *                 On server, this can be used for alternative implementations
+ *                 of session cache or session tickets.
+ *
+ * \see            mbedtls_ssl_session_load()
+ * \see            mbedtls_ssl_get_session_pointer()
+ *
+ * \param session  The session structure to be saved.
+ * \param buf      The buffer to write the serialized data to. It must be a
+ *                 writeable buffer of at least \p len bytes, or may be \c
+ *                 NULL if \p len is \c 0.
+ * \param buf_len  The number of bytes available for writing in \p buf.
+ * \param olen     The size in bytes of the data that has been or would have
+ *                 been written. It must point to a valid \c size_t.
+ *
+ * \note           \p olen is updated to the correct value regardless of
+ *                 whether \p buf_len was large enough. This makes it possible
+ *                 to determine the necessary size by calling this function
+ *                 with \p buf set to \c NULL and \p buf_len to \c 0.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL if \p buf is too small.
+ */
+int mbedtls_ssl_session_save( const mbedtls_ssl_session *session,
+                              unsigned char *buf,
+                              size_t buf_len,
+                              size_t *olen );
+
+/**
+ * \brief          Get a pointer to the current session structure, for example
+ *                 to serialize it.
+ *
+ * \warning        Ownership of the session remains with the SSL context, and
+ *                 the returned pointer is only guaranteed to be valid until
+ *                 the next API call operating on the same \p ssl context.
+ *
+ * \see            mbedtls_ssl_session_save()
+ *
+ * \param ssl      The SSL context.
+ *
+ * \return         A pointer to the current session if successful.
+ * \return         \c NULL if no session is active.
+ */
+const mbedtls_ssl_session *mbedtls_ssl_get_session_pointer( const mbedtls_ssl_context *ssl );
+
 /**
  * \brief               Set the list of allowed ciphersuites and the preference
  *                      order. First in the list has the highest preference.
@@ -1999,6 +2628,45 @@ int mbedtls_ssl_set_session( mbedtls_ssl_context *ssl, const mbedtls_ssl_session
 void mbedtls_ssl_conf_ciphersuites( mbedtls_ssl_config *conf,
                                    const int *ciphersuites );
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+#define MBEDTLS_SSL_UNEXPECTED_CID_IGNORE 0
+#define MBEDTLS_SSL_UNEXPECTED_CID_FAIL   1
+/**
+ * \brief               Specify the length of Connection IDs for incoming
+ *                      encrypted DTLS records, as well as the behaviour
+ *                      on unexpected CIDs.
+ *
+ *                      By default, the CID length is set to \c 0,
+ *                      and unexpected CIDs are silently ignored.
+ *
+ * \param conf          The SSL configuration to modify.
+ * \param len           The length in Bytes of the CID fields in encrypted
+ *                      DTLS records using the CID mechanism. This must
+ *                      not be larger than #MBEDTLS_SSL_CID_OUT_LEN_MAX.
+ * \param ignore_other_cids This determines the stack's behaviour when
+ *                          receiving a record with an unexpected CID.
+ *                          Possible values are:
+ *                          - #MBEDTLS_SSL_UNEXPECTED_CID_IGNORE
+ *                            In this case, the record is silently ignored.
+ *                          - #MBEDTLS_SSL_UNEXPECTED_CID_FAIL
+ *                            In this case, the stack fails with the specific
+ *                            error code #MBEDTLS_ERR_SSL_UNEXPECTED_CID.
+ *
+ * \note                The CID specification allows implementations to either
+ *                      use a common length for all incoming connection IDs or
+ *                      allow variable-length incoming IDs. Mbed TLS currently
+ *                      requires a common length for all connections sharing the
+ *                      same SSL configuration; this allows simpler parsing of
+ *                      record headers.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if \p own_cid_len
+ *                      is too large.
+ */
+int mbedtls_ssl_conf_cid( mbedtls_ssl_config *conf, size_t len,
+                          int ignore_other_cids );
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
 /**
  * \brief               Set the list of allowed ciphersuites and the
  *                      preference order for a specific version of the protocol.
@@ -2051,6 +2719,63 @@ void mbedtls_ssl_conf_ca_chain( mbedtls_ssl_config *conf,
                                mbedtls_x509_crt *ca_chain,
                                mbedtls_x509_crl *ca_crl );
 
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+/**
+ * \brief          Set the trusted certificate callback.
+ *
+ *                 This API allows to register the set of trusted certificates
+ *                 through a callback, instead of a linked list as configured
+ *                 by mbedtls_ssl_conf_ca_chain().
+ *
+ *                 This is useful for example in contexts where a large number
+ *                 of CAs are used, and the inefficiency of maintaining them
+ *                 in a linked list cannot be tolerated. It is also useful when
+ *                 the set of trusted CAs needs to be modified frequently.
+ *
+ *                 See the documentation of `mbedtls_x509_crt_ca_cb_t` for
+ *                 more information.
+ *
+ * \param conf     The SSL configuration to register the callback with.
+ * \param f_ca_cb  The trusted certificate callback to use when verifying
+ *                 certificate chains.
+ * \param p_ca_cb  The context to be passed to \p f_ca_cb (for example,
+ *                 a reference to a trusted CA database).
+ *
+ * \note           This API is incompatible with mbedtls_ssl_conf_ca_chain():
+ *                 Any call to this function overwrites the values set through
+ *                 earlier calls to mbedtls_ssl_conf_ca_chain() or
+ *                 mbedtls_ssl_conf_ca_cb().
+ *
+ * \note           This API is incompatible with CA indication in
+ *                 CertificateRequest messages: A server-side SSL context which
+ *                 is bound to an SSL configuration that uses a CA callback
+ *                 configured via mbedtls_ssl_conf_ca_cb(), and which requires
+ *                 client authentication, will send an empty CA list in the
+ *                 corresponding CertificateRequest message.
+ *
+ * \note           This API is incompatible with mbedtls_ssl_set_hs_ca_chain():
+ *                 If an SSL context is bound to an SSL configuration which uses
+ *                 CA callbacks configured via mbedtls_ssl_conf_ca_cb(), then
+ *                 calls to mbedtls_ssl_set_hs_ca_chain() have no effect.
+ *
+ * \note           The use of this API disables the use of restartable ECC
+ *                 during X.509 CRT signature verification (but doesn't affect
+ *                 other uses).
+ *
+ * \warning        This API is incompatible with the use of CRLs. Any call to
+ *                 mbedtls_ssl_conf_ca_cb() unsets CRLs configured through
+ *                 earlier calls to mbedtls_ssl_conf_ca_chain().
+ *
+ * \warning        In multi-threaded environments, the callback \p f_ca_cb
+ *                 must be thread-safe, and it is the user's responsibility
+ *                 to guarantee this (for example through a mutex
+ *                 contained in the callback context pointed to by \p p_ca_cb).
+ */
+void mbedtls_ssl_conf_ca_cb( mbedtls_ssl_config *conf,
+                             mbedtls_x509_crt_ca_cb_t f_ca_cb,
+                             void *p_ca_cb );
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
+
 /**
  * \brief          Set own certificate chain and private key
  *
@@ -2092,76 +2817,172 @@ int mbedtls_ssl_conf_own_cert( mbedtls_ssl_config *conf,
                               mbedtls_pk_context *pk_key );
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
 /**
- * \brief          Set the Pre Shared Key (PSK) and the expected identity name
+ * \brief          Configure a pre-shared key (PSK) and identity
+ *                 to be used in PSK-based ciphersuites.
  *
  * \note           This is mainly useful for clients. Servers will usually
  *                 want to use \c mbedtls_ssl_conf_psk_cb() instead.
  *
- * \note           Currently clients can only register one pre-shared key.
- *                 In other words, the servers' identity hint is ignored.
+ * \note           A PSK set by \c mbedtls_ssl_set_hs_psk() in the PSK callback
+ *                 takes precedence over a PSK configured by this function.
+ *
+ * \warning        Currently, clients can only register a single pre-shared key.
+ *                 Calling this function or mbedtls_ssl_conf_psk_opaque() more
+ *                 than once will overwrite values configured in previous calls.
  *                 Support for setting multiple PSKs on clients and selecting
- *                 one based on the identity hint is not a planned feature but
- *                 feedback is welcomed.
+ *                 one based on the identity hint is not a planned feature,
+ *                 but feedback is welcomed.
  *
- * \param conf     SSL configuration
- * \param psk      pointer to the pre-shared key
- * \param psk_len  pre-shared key length
- * \param psk_identity      pointer to the pre-shared key identity
- * \param psk_identity_len  identity key length
+ * \param conf     The SSL configuration to register the PSK with.
+ * \param psk      The pointer to the pre-shared key to use.
+ * \param psk_len  The length of the pre-shared key in bytes.
+ * \param psk_identity      The pointer to the pre-shared key identity.
+ * \param psk_identity_len  The length of the pre-shared key identity
+ *                          in bytes.
  *
- * \return         0 if successful or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ * \note           The PSK and its identity are copied internally and
+ *                 hence need not be preserved by the caller for the lifetime
+ *                 of the SSL configuration.
+ *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
  */
 int mbedtls_ssl_conf_psk( mbedtls_ssl_config *conf,
                 const unsigned char *psk, size_t psk_len,
                 const unsigned char *psk_identity, size_t psk_identity_len );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief          Configure an opaque pre-shared key (PSK) and identity
+ *                 to be used in PSK-based ciphersuites.
+ *
+ * \note           This is mainly useful for clients. Servers will usually
+ *                 want to use \c mbedtls_ssl_conf_psk_cb() instead.
+ *
+ * \note           An opaque PSK set by \c mbedtls_ssl_set_hs_psk_opaque() in
+ *                 the PSK callback takes precedence over an opaque PSK
+ *                 configured by this function.
+ *
+ * \warning        Currently, clients can only register a single pre-shared key.
+ *                 Calling this function or mbedtls_ssl_conf_psk() more than
+ *                 once will overwrite values configured in previous calls.
+ *                 Support for setting multiple PSKs on clients and selecting
+ *                 one based on the identity hint is not a planned feature,
+ *                 but feedback is welcomed.
+ *
+ * \param conf     The SSL configuration to register the PSK with.
+ * \param psk      The identifier of the key slot holding the PSK.
+ *                 Until \p conf is destroyed or this function is successfully
+ *                 called again, the key slot \p psk must be populated with a
+ *                 key of type PSA_ALG_CATEGORY_KEY_DERIVATION whose policy
+ *                 allows its use for the key derivation algorithm applied
+ *                 in the handshake.
+ * \param psk_identity      The pointer to the pre-shared key identity.
+ * \param psk_identity_len  The length of the pre-shared key identity
+ *                          in bytes.
+ *
+ * \note           The PSK identity hint is copied internally and hence need
+ *                 not be preserved by the caller for the lifetime of the
+ *                 SSL configuration.
+ *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
+ */
+int mbedtls_ssl_conf_psk_opaque( mbedtls_ssl_config *conf,
+                                 psa_key_id_t psk,
+                                 const unsigned char *psk_identity,
+                                 size_t psk_identity_len );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
 
 /**
- * \brief          Set the Pre Shared Key (PSK) for the current handshake
+ * \brief          Set the pre-shared Key (PSK) for the current handshake.
  *
  * \note           This should only be called inside the PSK callback,
- *                 ie the function passed to \c mbedtls_ssl_conf_psk_cb().
+ *                 i.e. the function passed to \c mbedtls_ssl_conf_psk_cb().
  *
- * \param ssl      SSL context
- * \param psk      pointer to the pre-shared key
- * \param psk_len  pre-shared key length
+ * \note           A PSK set by this function takes precedence over a PSK
+ *                 configured by \c mbedtls_ssl_conf_psk().
+ *
+ * \param ssl      The SSL context to configure a PSK for.
+ * \param psk      The pointer to the pre-shared key.
+ * \param psk_len  The length of the pre-shared key in bytes.
  *
- * \return         0 if successful or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
  */
 int mbedtls_ssl_set_hs_psk( mbedtls_ssl_context *ssl,
                             const unsigned char *psk, size_t psk_len );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief          Set an opaque pre-shared Key (PSK) for the current handshake.
+ *
+ * \note           This should only be called inside the PSK callback,
+ *                 i.e. the function passed to \c mbedtls_ssl_conf_psk_cb().
+ *
+ * \note           An opaque PSK set by this function takes precedence over an
+ *                 opaque PSK configured by \c mbedtls_ssl_conf_psk_opaque().
+ *
+ * \param ssl      The SSL context to configure a PSK for.
+ * \param psk      The identifier of the key slot holding the PSK.
+ *                 For the duration of the current handshake, the key slot
+ *                 must be populated with a key of type
+ *                 PSA_ALG_CATEGORY_KEY_DERIVATION whose policy allows its
+ *                 use for the key derivation algorithm
+ *                 applied in the handshake.
+  *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
+ */
+int mbedtls_ssl_set_hs_psk_opaque( mbedtls_ssl_context *ssl,
+                                   psa_key_id_t psk );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 /**
  * \brief          Set the PSK callback (server-side only).
  *
  *                 If set, the PSK callback is called for each
- *                 handshake where a PSK ciphersuite was negotiated.
+ *                 handshake where a PSK-based ciphersuite was negotiated.
  *                 The caller provides the identity received and wants to
  *                 receive the actual PSK data and length.
  *
- *                 The callback has the following parameters: (void *parameter,
- *                 mbedtls_ssl_context *ssl, const unsigned char *psk_identity,
- *                 size_t identity_len)
+ *                 The callback has the following parameters:
+ *                 - \c void*: The opaque pointer \p p_psk.
+ *                 - \c mbedtls_ssl_context*: The SSL context to which
+ *                                            the operation applies.
+ *                 - \c const unsigned char*: The PSK identity
+ *                                            selected by the client.
+ *                 - \c size_t: The length of the PSK identity
+ *                              selected by the client.
+ *
  *                 If a valid PSK identity is found, the callback should use
- *                 \c mbedtls_ssl_set_hs_psk() on the ssl context to set the
- *                 correct PSK and return 0.
+ *                 \c mbedtls_ssl_set_hs_psk() or
+ *                 \c mbedtls_ssl_set_hs_psk_opaque()
+ *                 on the SSL context to set the correct PSK and return \c 0.
  *                 Any other return value will result in a denied PSK identity.
  *
- * \note           If you set a PSK callback using this function, then you
- *                 don't need to set a PSK key and identity using
- *                 \c mbedtls_ssl_conf_psk().
- *
- * \param conf     SSL configuration
- * \param f_psk    PSK identity function
- * \param p_psk    PSK identity parameter
+ * \note           A dynamic PSK (i.e. set by the PSK callback) takes
+ *                 precedence over a static PSK (i.e. set by
+ *                 \c mbedtls_ssl_conf_psk() or
+ *                 \c mbedtls_ssl_conf_psk_opaque()).
+ *                 This means that if you set a PSK callback using this
+ *                 function, you don't need to set a PSK using
+ *                 \c mbedtls_ssl_conf_psk() or
+ *                 \c mbedtls_ssl_conf_psk_opaque()).
+ *
+ * \param conf     The SSL configuration to register the callback with.
+ * \param f_psk    The callback for selecting and setting the PSK based
+ *                 in the PSK identity chosen by the client.
+ * \param p_psk    A pointer to an opaque structure to be passed to
+ *                 the callback, for example a PSK store.
  */
 void mbedtls_ssl_conf_psk_cb( mbedtls_ssl_config *conf,
                      int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *,
                                   size_t),
                      void *p_psk );
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
 
 #if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_SRV_C)
 
@@ -2237,7 +3058,9 @@ void mbedtls_ssl_conf_dhm_min_bitlen( mbedtls_ssl_config *conf,
 #if defined(MBEDTLS_ECP_C)
 /**
  * \brief          Set the allowed curves in order of preference.
- *                 (Default: all defined curves in order of decreasing size.)
+ *                 (Default: all defined curves in order of decreasing size,
+ *                 except that Montgomery curves come last. This order
+ *                 is likely to change in a future version.)
  *
  *                 On server: this only affects selection of the ECDHE curve;
  *                 the curves used for ECDH and ECDSA are determined by the
@@ -2266,7 +3089,7 @@ void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
                               const mbedtls_ecp_group_id *curves );
 #endif /* MBEDTLS_ECP_C */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 /**
  * \brief          Set the allowed hashes for signatures during the handshake.
  *                 (Default: all SHA-2 hashes, largest first. Also SHA-1 if
@@ -2289,7 +3112,7 @@ void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
  */
 void mbedtls_ssl_conf_sig_hashes( mbedtls_ssl_config *conf,
                                   const int *hashes );
-#endif /* MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 /**
@@ -2437,6 +3260,105 @@ int mbedtls_ssl_conf_alpn_protocols( mbedtls_ssl_config *conf, const char **prot
 const char *mbedtls_ssl_get_alpn_protocol( const mbedtls_ssl_context *ssl );
 #endif /* MBEDTLS_SSL_ALPN */
 
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+#if defined(MBEDTLS_DEBUG_C)
+static inline const char *mbedtls_ssl_get_srtp_profile_as_string( mbedtls_ssl_srtp_profile profile )
+{
+    switch( profile )
+    {
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80:
+            return( "MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80" );
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32:
+            return( "MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32" );
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80:
+            return( "MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80" );
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32:
+            return( "MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32" );
+        default: break;
+    }
+    return( "" );
+}
+#endif /* MBEDTLS_DEBUG_C */
+/**
+ * \brief                   Manage support for mki(master key id) value
+ *                          in use_srtp extension.
+ *                          MKI is an optional part of SRTP used for key management
+ *                          and re-keying. See RFC3711 section 3.1 for details.
+ *                          The default value is
+ *                          #MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED.
+ *
+ * \param conf              The SSL configuration to manage mki support.
+ * \param support_mki_value Enable or disable mki usage. Values are
+ *                          #MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED
+ *                          or #MBEDTLS_SSL_DTLS_SRTP_MKI_SUPPORTED.
+ */
+void mbedtls_ssl_conf_srtp_mki_value_supported( mbedtls_ssl_config *conf,
+                                                int support_mki_value );
+
+/**
+ * \brief                   Set the supported DTLS-SRTP protection profiles.
+ *
+ * \param conf              SSL configuration
+ * \param profiles          Pointer to a List of MBEDTLS_TLS_SRTP_UNSET terminated
+ *                          supported protection profiles
+ *                          in decreasing preference order.
+ *                          The pointer to the list is recorded by the library
+ *                          for later reference as required, so the lifetime
+ *                          of the table must be at least as long as the lifetime
+ *                          of the SSL configuration structure.
+ *                          The list must not hold more than
+ *                          MBEDTLS_TLS_SRTP_MAX_PROFILE_LIST_LENGTH elements
+ *                          (excluding the terminating MBEDTLS_TLS_SRTP_UNSET).
+ *
+ * \return                  0 on success
+ * \return                  #MBEDTLS_ERR_SSL_BAD_INPUT_DATA when the list of
+ *                          protection profiles is incorrect.
+ */
+int mbedtls_ssl_conf_dtls_srtp_protection_profiles
+                               ( mbedtls_ssl_config *conf,
+                                 const mbedtls_ssl_srtp_profile *profiles );
+
+/**
+ * \brief                  Set the mki_value for the current DTLS-SRTP session.
+ *
+ * \param ssl              SSL context to use.
+ * \param mki_value        The MKI value to set.
+ * \param mki_len          The length of the MKI value.
+ *
+ * \note                   This function is relevant on client side only.
+ *                         The server discovers the mki value during handshake.
+ *                         A mki value set on server side using this function
+ *                         is ignored.
+ *
+ * \return                 0 on success
+ * \return                 #MBEDTLS_ERR_SSL_BAD_INPUT_DATA
+ * \return                 #MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE
+ */
+int mbedtls_ssl_dtls_srtp_set_mki_value( mbedtls_ssl_context *ssl,
+                                         unsigned char *mki_value,
+                                         uint16_t mki_len );
+/**
+ * \brief                  Get the negotiated DTLS-SRTP informations:
+ *                         Protection profile and MKI value.
+ *
+ * \warning                This function must be called after the handshake is
+ *                         completed. The value returned by this function must
+ *                         not be trusted or acted upon before the handshake completes.
+ *
+ * \param ssl              The SSL context to query.
+ * \param dtls_srtp_info   The negotiated DTLS-SRTP informations:
+ *                         - Protection profile in use.
+ *                         A direct mapping of the iana defined value for protection
+ *                         profile on an uint16_t.
+                   http://www.iana.org/assignments/srtp-protection/srtp-protection.xhtml
+ *                         #MBEDTLS_TLS_SRTP_UNSET if the use of SRTP was not negotiated
+ *                         or peer's Hello packet was not parsed yet.
+ *                         - mki size and value( if size is > 0 ).
+ */
+void mbedtls_ssl_get_dtls_srtp_negotiation_result( const mbedtls_ssl_context *ssl,
+                                                   mbedtls_dtls_srtp_info *dtls_srtp_info );
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
 /**
  * \brief          Set the maximum supported version sent from the client side
  *                 and/or accepted at the server side
@@ -2536,7 +3458,7 @@ void mbedtls_ssl_conf_extended_master_secret( mbedtls_ssl_config *conf, char ems
  * \warning        Use of RC4 in DTLS/TLS has been prohibited by RFC 7465
  *                 for security reasons. Use at your own risk.
  *
- * \note           This function is deprecated and will likely be removed in
+ * \note           This function is deprecated and will be removed in
  *                 a future version of the library.
  *                 RC4 is disabled by default at compile time and needs to be
  *                 actively enabled for use with legacy systems.
@@ -2577,14 +3499,14 @@ void mbedtls_ssl_conf_cert_req_ca_list( mbedtls_ssl_config *conf,
  *                 been set via this function to a value different than
  *                 #MBEDTLS_SSL_MAX_FRAG_LEN_NONE.
  *
- * \note           This sets the maximum length for a record's payload,
- *                 excluding record overhead that will be added to it, see
- *                 \c mbedtls_ssl_get_record_expansion().
- *
  * \note           With TLS, this currently only affects ApplicationData (sent
  *                 with \c mbedtls_ssl_read()), not handshake messages.
  *                 With DTLS, this affects both ApplicationData and handshake.
  *
+ * \note           This sets the maximum length for a record's payload,
+ *                 excluding record overhead that will be added to it, see
+ *                 \c mbedtls_ssl_get_record_expansion().
+ *
  * \note           For DTLS, it is also possible to set a limit for the total
  *                 size of daragrams passed to the transport layer, including
  *                 record overhead, see \c mbedtls_ssl_set_mtu().
@@ -2735,7 +3657,7 @@ void mbedtls_ssl_conf_renegotiation_enforced( mbedtls_ssl_config *conf, int max_
  *                 (Default: 2^48 - 1)
  *
  *                 Renegotiation is automatically triggered when a record
- *                 counter (outgoing or ingoing) crosses the defined
+ *                 counter (outgoing or incoming) crosses the defined
  *                 threshold. The default value is meant to prevent the
  *                 connection from being closed when the counter is about to
  *                 reached its maximal value (it is not allowed to wrap).
@@ -2865,18 +3787,61 @@ int mbedtls_ssl_get_record_expansion( const mbedtls_ssl_context *ssl );
 
 #if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
 /**
- * \brief          Return the maximum fragment length (payload, in bytes).
- *                 This is the value negotiated with peer if any,
- *                 or the locally configured value.
+ * \brief          Return the maximum fragment length (payload, in bytes) for
+ *                 the output buffer. For the client, this is the configured
+ *                 value. For the server, it is the minimum of two - the
+ *                 configured value and the negotiated one.
  *
  * \sa             mbedtls_ssl_conf_max_frag_len()
  * \sa             mbedtls_ssl_get_max_record_payload()
  *
  * \param ssl      SSL context
  *
- * \return         Current maximum fragment length.
+ * \return         Current maximum fragment length for the output buffer.
+ */
+size_t mbedtls_ssl_get_output_max_frag_len( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Return the maximum fragment length (payload, in bytes) for
+ *                 the input buffer. This is the negotiated maximum fragment
+ *                 length, or, if there is none, MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *                 If it is not defined either, the value is 2^14. This function
+ *                 works as its predecessor, \c mbedtls_ssl_get_max_frag_len().
+ *
+ * \sa             mbedtls_ssl_conf_max_frag_len()
+ * \sa             mbedtls_ssl_get_max_record_payload()
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Current maximum fragment length for the output buffer.
+ */
+size_t mbedtls_ssl_get_input_max_frag_len( const mbedtls_ssl_context *ssl );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
+/**
+ * \brief          This function is a deprecated approach to getting the max
+ *                 fragment length. Its an alias for
+ *                 \c mbedtls_ssl_get_output_max_frag_len(), as the behaviour
+ *                 is the same. See \c mbedtls_ssl_get_output_max_frag_len() for
+ *                 more detail.
+ *
+ * \sa             mbedtls_ssl_get_input_max_frag_len()
+ * \sa             mbedtls_ssl_get_output_max_frag_len()
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Current maximum fragment length for the output buffer.
  */
-size_t mbedtls_ssl_get_max_frag_len( const mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED size_t mbedtls_ssl_get_max_frag_len(
+                                        const mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
 #endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
 
 /**
@@ -2897,7 +3862,8 @@ size_t mbedtls_ssl_get_max_frag_len( const mbedtls_ssl_context *ssl );
  *                 when record compression is enabled.
  *
  * \sa             mbedtls_ssl_set_mtu()
- * \sa             mbedtls_ssl_get_max_frag_len()
+ * \sa             mbedtls_ssl_get_output_max_frag_len()
+ * \sa             mbedtls_ssl_get_input_max_frag_len()
  * \sa             mbedtls_ssl_get_record_expansion()
  *
  * \param ssl      SSL context
@@ -2909,18 +3875,34 @@ int mbedtls_ssl_get_max_out_record_payload( const mbedtls_ssl_context *ssl );
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 /**
- * \brief          Return the peer certificate from the current connection
- *
- *                 Note: Can be NULL in case no certificate was sent during
- *                 the handshake. Different calls for the same connection can
- *                 return the same or different pointers for the same
- *                 certificate and even a different certificate altogether.
- *                 The peer cert CAN change in a single connection if
- *                 renegotiation is performed.
- *
- * \param ssl      SSL context
- *
- * \return         the current peer certificate
+ * \brief          Return the peer certificate from the current connection.
+ *
+ * \param  ssl     The SSL context to use. This must be initialized and setup.
+ *
+ * \return         The current peer certificate, if available.
+ *                 The returned certificate is owned by the SSL context and
+ *                 is valid only until the next call to the SSL API.
+ * \return         \c NULL if no peer certificate is available. This might
+ *                 be because the chosen ciphersuite doesn't use CRTs
+ *                 (PSK-based ciphersuites, for example), or because
+ *                 #MBEDTLS_SSL_KEEP_PEER_CERTIFICATE has been disabled,
+ *                 allowing the stack to free the peer's CRT to save memory.
+ *
+ * \note           For one-time inspection of the peer's certificate during
+ *                 the handshake, consider registering an X.509 CRT verification
+ *                 callback through mbedtls_ssl_conf_verify() instead of calling
+ *                 this function. Using mbedtls_ssl_conf_verify() also comes at
+ *                 the benefit of allowing you to influence the verification
+ *                 process, for example by masking expected and tolerated
+ *                 verification failures.
+ *
+ * \warning        You must not use the pointer returned by this function
+ *                 after any further call to the SSL API, including
+ *                 mbedtls_ssl_read() and mbedtls_ssl_write(); this is
+ *                 because the pointer might change during renegotiation,
+ *                 which happens transparently to the user.
+ *                 If you want to use the certificate across API calls,
+ *                 you must make a copy.
  */
 const mbedtls_x509_crt *mbedtls_ssl_get_peer_cert( const mbedtls_ssl_context *ssl );
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
@@ -3065,7 +4047,14 @@ int mbedtls_ssl_renegotiate( mbedtls_ssl_context *ssl );
  *
  * \return         The (positive) number of bytes read if successful.
  * \return         \c 0 if the read end of the underlying transport was closed
- *                 - in this case you must stop using the context (see below).
+ *                 without sending a CloseNotify beforehand, which might happen
+ *                 because of various reasons (internal error of an underlying
+ *                 stack, non-conformant peer not sending a CloseNotify and
+ *                 such) - in this case you must stop using the context
+ *                 (see below).
+ * \return         #MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY if the underlying
+ *                 transport is still functional, but the peer has
+ *                 acknowledged to not send anything anymore.
  * \return         #MBEDTLS_ERR_SSL_WANT_READ or #MBEDTLS_ERR_SSL_WANT_WRITE
  *                 if the handshake is incomplete and waiting for data to
  *                 be available for reading from or writing to the underlying
@@ -3182,8 +4171,8 @@ int mbedtls_ssl_read( mbedtls_ssl_context *ssl, unsigned char *buf, size_t len )
  *                 or negotiated with the peer), then:
  *                 - with TLS, less bytes than requested are written.
  *                 - with DTLS, MBEDTLS_ERR_SSL_BAD_INPUT_DATA is returned.
- *                 \c mbedtls_ssl_get_max_frag_len() may be used to query the
- *                 active maximum fragment length.
+ *                 \c mbedtls_ssl_get_output_max_frag_len() may be used to
+ *                 query the active maximum fragment length.
  *
  * \note           Attempting to write 0 bytes will result in an empty TLS
  *                 application record being sent.
@@ -3231,6 +4220,130 @@ int mbedtls_ssl_close_notify( mbedtls_ssl_context *ssl );
  */
 void mbedtls_ssl_free( mbedtls_ssl_context *ssl );
 
+#if defined(MBEDTLS_SSL_CONTEXT_SERIALIZATION)
+/**
+ * \brief          Save an active connection as serialized data in a buffer.
+ *                 This allows the freeing or re-using of the SSL context
+ *                 while still picking up the connection later in a way that
+ *                 it entirely transparent to the peer.
+ *
+ * \see            mbedtls_ssl_context_load()
+ *
+ * \note           This feature is currently only available under certain
+ *                 conditions, see the documentation of the return value
+ *                 #MBEDTLS_ERR_SSL_BAD_INPUT_DATA for details.
+ *
+ * \note           When this function succeeds, it calls
+ *                 mbedtls_ssl_session_reset() on \p ssl which as a result is
+ *                 no longer associated with the connection that has been
+ *                 serialized. This avoids creating copies of the connection
+ *                 state. You're then free to either re-use the context
+ *                 structure for a different connection, or call
+ *                 mbedtls_ssl_free() on it. See the documentation of
+ *                 mbedtls_ssl_session_reset() for more details.
+ *
+ * \param ssl      The SSL context to save. On success, it is no longer
+ *                 associated with the connection that has been serialized.
+ * \param buf      The buffer to write the serialized data to. It must be a
+ *                 writeable buffer of at least \p buf_len bytes, or may be \c
+ *                 NULL if \p buf_len is \c 0.
+ * \param buf_len  The number of bytes available for writing in \p buf.
+ * \param olen     The size in bytes of the data that has been or would have
+ *                 been written. It must point to a valid \c size_t.
+ *
+ * \note           \p olen is updated to the correct value regardless of
+ *                 whether \p buf_len was large enough. This makes it possible
+ *                 to determine the necessary size by calling this function
+ *                 with \p buf set to \c NULL and \p buf_len to \c 0. However,
+ *                 the value of \p olen is only guaranteed to be correct when
+ *                 the function returns #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL or
+ *                 \c 0. If the return value is different, then the value of
+ *                 \p olen is undefined.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL if \p buf is too small.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed
+ *                 while reseting the context.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if a handshake is in
+ *                 progress, or there is pending data for reading or sending,
+ *                 or the connection does not use DTLS 1.2 with an AEAD
+ *                 ciphersuite, or renegotiation is enabled.
+ */
+int mbedtls_ssl_context_save( mbedtls_ssl_context *ssl,
+                              unsigned char *buf,
+                              size_t buf_len,
+                              size_t *olen );
+
+/**
+ * \brief          Load serialized connection data to an SSL context.
+ *
+ * \see            mbedtls_ssl_context_save()
+ *
+ * \warning        The same serialized data must never be loaded into more
+ *                 that one context. In order to ensure that, after
+ *                 successfully loading serialized data to an SSL context, you
+ *                 should immediately destroy or invalidate all copies of the
+ *                 serialized data that was loaded. Loading the same data in
+ *                 more than one context would cause severe security failures
+ *                 including but not limited to loss of confidentiality.
+ *
+ * \note           Before calling this function, the SSL context must be
+ *                 prepared in one of the two following ways. The first way is
+ *                 to take a context freshly initialised with
+ *                 mbedtls_ssl_init() and call mbedtls_ssl_setup() on it with
+ *                 the same ::mbedtls_ssl_config structure that was used in
+ *                 the original connection. The second way is to
+ *                 call mbedtls_ssl_session_reset() on a context that was
+ *                 previously prepared as above but used in the meantime.
+ *                 Either way, you must not use the context to perform a
+ *                 handshake between calling mbedtls_ssl_setup() or
+ *                 mbedtls_ssl_session_reset() and calling this function. You
+ *                 may however call other setter functions in that time frame
+ *                 as indicated in the note below.
+ *
+ * \note           Before or after calling this function successfully, you
+ *                 also need to configure some connection-specific callbacks
+ *                 and settings before you can use the connection again
+ *                 (unless they were already set before calling
+ *                 mbedtls_ssl_session_reset() and the values are suitable for
+ *                 the present connection). Specifically, you want to call
+ *                 at least mbedtls_ssl_set_bio() and
+ *                 mbedtls_ssl_set_timer_cb(). All other SSL setter functions
+ *                 are not necessary to call, either because they're only used
+ *                 in handshakes, or because the setting is already saved. You
+ *                 might choose to call them anyway, for example in order to
+ *                 share code between the cases of establishing a new
+ *                 connection and the case of loading an already-established
+ *                 connection.
+ *
+ * \note           If you have new information about the path MTU, you want to
+ *                 call mbedtls_ssl_set_mtu() after calling this function, as
+ *                 otherwise this function would overwrite your
+ *                 newly-configured value with the value that was active when
+ *                 the context was saved.
+ *
+ * \note           When this function returns an error code, it calls
+ *                 mbedtls_ssl_free() on \p ssl. In this case, you need to
+ *                 prepare the context with the usual sequence starting with a
+ *                 call to mbedtls_ssl_init() if you want to use it again.
+ *
+ * \param ssl      The SSL context structure to be populated. It must have
+ *                 been prepared as described in the note above.
+ * \param buf      The buffer holding the serialized connection data. It must
+ *                 be a readable buffer of at least \p len bytes.
+ * \param len      The size of the serialized data in bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed.
+ * \return         #MBEDTLS_ERR_SSL_VERSION_MISMATCH if the serialized data
+ *                 comes from a different Mbed TLS version or build.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if input data is invalid.
+ */
+int mbedtls_ssl_context_load( mbedtls_ssl_context *ssl,
+                              const unsigned char *buf,
+                              size_t len );
+#endif /* MBEDTLS_SSL_CONTEXT_SERIALIZATION */
+
 /**
  * \brief          Initialize an SSL configuration context
  *                 Just makes the context ready for
@@ -3286,6 +4399,27 @@ void mbedtls_ssl_session_init( mbedtls_ssl_session *session );
  */
 void mbedtls_ssl_session_free( mbedtls_ssl_session *session );
 
+/**
+ * \brief          TLS-PRF function for key derivation.
+ *
+ * \param prf      The tls_prf type function type to be used.
+ * \param secret   Secret for the key derivation function.
+ * \param slen     Length of the secret.
+ * \param label    String label for the key derivation function,
+ *                 terminated with null character.
+ * \param random   Random bytes.
+ * \param rlen     Length of the random bytes buffer.
+ * \param dstbuf   The buffer holding the derived key.
+ * \param dlen     Length of the output buffer.
+ *
+ * \return         0 on success. An SSL specific error on failure.
+ */
+int  mbedtls_ssl_tls_prf( const mbedtls_tls_prf_types prf,
+                          const unsigned char *secret, size_t slen,
+                          const char *label,
+                          const unsigned char *random, size_t rlen,
+                          unsigned char *dstbuf, size_t dlen );
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h
index 612d81776ef..c6ef2960f4d 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_CACHE_H
 #define MBEDTLS_SSL_CACHE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /**
@@ -95,7 +68,8 @@ struct mbedtls_ssl_cache_entry
     mbedtls_time_t timestamp;           /*!< entry timestamp    */
 #endif
     mbedtls_ssl_session session;        /*!< entry session      */
-#if defined(MBEDTLS_X509_CRT_PARSE_C)
+#if defined(MBEDTLS_X509_CRT_PARSE_C) && \
+    defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
     mbedtls_x509_buf peer_cert;         /*!< entry peer_cert    */
 #endif
     mbedtls_ssl_cache_entry *next;      /*!< chain pointer      */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h
index ab8e601db71..93c32a5edac 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,40 +18,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_CIPHERSUITES_H
 #define MBEDTLS_SSL_CIPHERSUITES_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "pk.h"
-#include "cipher.h"
-#include "md.h"
+#include "mbedtls/pk.h"
+#include "mbedtls/cipher.h"
+#include "mbedtls/md.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -337,7 +310,7 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED)      || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED
 #endif
 
 /* Key exchanges allowing client certificate requests */
@@ -347,28 +320,28 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     ||       \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)    ||       \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__CERT_REQ_ALLOWED__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_CERT_REQ_ALLOWED_ENABLED
 #endif
 
 /* Key exchanges involving server signature in ServerKeyExchange */
 #if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED
 #endif
 
 /* Key exchanges using ECDH */
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED)      || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED
 #endif
 
 /* Key exchanges that don't involve ephemeral keys */
 #if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED)           || \
     defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED)           || \
     defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
-    defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED
+    defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED
 #endif
 
 /* Key exchanges that involve ephemeral keys */
@@ -378,7 +351,7 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)     || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)   || \
     defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED
 #endif
 
 /* Key exchanges using a PSK */
@@ -386,20 +359,20 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED
 #endif
 
 /* Key exchanges using DHE */
 #if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED
 #endif
 
 /* Key exchanges using ECDHE */
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)   || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED
 #endif
 
 typedef struct mbedtls_ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t;
@@ -442,7 +415,7 @@ mbedtls_pk_type_t mbedtls_ssl_get_ciphersuite_sig_alg( const mbedtls_ssl_ciphers
 int mbedtls_ssl_ciphersuite_uses_ec( const mbedtls_ssl_ciphersuite_t *info );
 int mbedtls_ssl_ciphersuite_uses_psk( const mbedtls_ssl_ciphersuite_t *info );
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_has_pfs( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -459,9 +432,9 @@ static inline int mbedtls_ssl_ciphersuite_has_pfs( const mbedtls_ssl_ciphersuite
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_no_pfs( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -477,9 +450,9 @@ static inline int mbedtls_ssl_ciphersuite_no_pfs( const mbedtls_ssl_ciphersuite_
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_ecdh( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -492,7 +465,7 @@ static inline int mbedtls_ssl_ciphersuite_uses_ecdh( const mbedtls_ssl_ciphersui
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED */
 
 static inline int mbedtls_ssl_ciphersuite_cert_req_allowed( const mbedtls_ssl_ciphersuite_t *info )
 {
@@ -511,7 +484,25 @@ static inline int mbedtls_ssl_ciphersuite_cert_req_allowed( const mbedtls_ssl_ci
     }
 }
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_uses_srv_cert( const mbedtls_ssl_ciphersuite_t *info )
+{
+    switch( info->key_exchange )
+    {
+        case MBEDTLS_KEY_EXCHANGE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_RSA_PSK:
+        case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+            return( 1 );
+
+        default:
+            return( 0 );
+    }
+}
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_dhe( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -524,9 +515,9 @@ static inline int mbedtls_ssl_ciphersuite_uses_dhe( const mbedtls_ssl_ciphersuit
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED) */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED) */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_ecdhe( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -540,9 +531,9 @@ static inline int mbedtls_ssl_ciphersuite_uses_ecdhe( const mbedtls_ssl_ciphersu
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED) */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED) */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_server_signature( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -556,7 +547,7 @@ static inline int mbedtls_ssl_ciphersuite_uses_server_signature( const mbedtls_s
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED */
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h
index 9c2d5b62a43..0a238708e59 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_COOKIE_H
 #define MBEDTLS_SSL_COOKIE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /**
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h
index 6ba6c2af09d..6913dc0f668 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,60 +18,48 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_INTERNAL_H
 #define MBEDTLS_SSL_INTERNAL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
-#include "cipher.h"
+#include "mbedtls/ssl.h"
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif
 
 #if defined(MBEDTLS_MD5_C)
-#include "md5.h"
+#include "mbedtls/md5.h"
 #endif
 
 #if defined(MBEDTLS_SHA1_C)
-#include "sha1.h"
+#include "mbedtls/sha1.h"
 #endif
 
 #if defined(MBEDTLS_SHA256_C)
-#include "sha256.h"
+#include "mbedtls/sha256.h"
 #endif
 
 #if defined(MBEDTLS_SHA512_C)
-#include "sha512.h"
+#include "mbedtls/sha512.h"
 #endif
 
 #if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
-#include "ecjpake.h"
+#include "mbedtls/ecjpake.h"
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#include "mbedtls/psa_util.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 #if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
     !defined(inline) && !defined(__cplusplus)
 #define inline __inline
@@ -129,7 +111,7 @@
     defined(MBEDTLS_SSL_CLI_C) && \
     defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
-#define MBEDTLS_SSL__ECP_RESTARTABLE
+#define MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED
 #endif
 
 #define MBEDTLS_SSL_INITIAL_HANDSHAKE           0
@@ -150,6 +132,18 @@
 #define MBEDTLS_SSL_RETRANS_WAITING         2
 #define MBEDTLS_SSL_RETRANS_FINISHED        3
 
+/*
+ * Allow extra bytes for record, authentication and encryption overhead:
+ * counter (8) + header (5) + IV(16) + MAC (16-48) + padding (0-256)
+ * and allow for a maximum of 1024 of compression expansion if
+ * enabled.
+ */
+#if defined(MBEDTLS_ZLIB_SUPPORT)
+#define MBEDTLS_SSL_COMPRESSION_ADD          1024
+#else
+#define MBEDTLS_SSL_COMPRESSION_ADD             0
+#endif
+
 /* This macro determines whether CBC is supported. */
 #if defined(MBEDTLS_CIPHER_MODE_CBC) &&                               \
     ( defined(MBEDTLS_AES_C)      ||                                  \
@@ -168,19 +162,12 @@
 #define MBEDTLS_SSL_SOME_SUITES_USE_TLS_CBC
 #endif
 
-/*
- * Allow extra bytes for record, authentication and encryption overhead:
- * counter (8) + header (5) + IV(16) + MAC (16-48) + padding (0-256)
- * and allow for a maximum of 1024 of compression expansion if
- * enabled.
- */
-#if defined(MBEDTLS_ZLIB_SUPPORT)
-#define MBEDTLS_SSL_COMPRESSION_ADD          1024
-#else
-#define MBEDTLS_SSL_COMPRESSION_ADD             0
+#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_NULL_CIPHER) ||   \
+    defined(MBEDTLS_SSL_SOME_SUITES_USE_CBC)
+#define MBEDTLS_SSL_SOME_MODES_USE_MAC
 #endif
 
-#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_MODE_CBC)
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
 /* Ciphersuites using HMAC */
 #if defined(MBEDTLS_SHA512_C)
 #define MBEDTLS_SSL_MAC_ADD                 48  /* SHA-384 used for HMAC */
@@ -189,7 +176,7 @@
 #else
 #define MBEDTLS_SSL_MAC_ADD                 20  /* SHA-1   used for HMAC */
 #endif
-#else
+#else /* MBEDTLS_SSL_SOME_MODES_USE_MAC */
 /* AEAD ciphersuites: GCM and CCM use a 128 bits tag */
 #define MBEDTLS_SSL_MAC_ADD                 16
 #endif
@@ -200,10 +187,17 @@
 #define MBEDTLS_SSL_PADDING_ADD              0
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+#define MBEDTLS_SSL_MAX_CID_EXPANSION      MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#else
+#define MBEDTLS_SSL_MAX_CID_EXPANSION        0
+#endif
+
 #define MBEDTLS_SSL_PAYLOAD_OVERHEAD ( MBEDTLS_SSL_COMPRESSION_ADD +    \
                                        MBEDTLS_MAX_IV_LENGTH +          \
                                        MBEDTLS_SSL_MAC_ADD +            \
-                                       MBEDTLS_SSL_PADDING_ADD          \
+                                       MBEDTLS_SSL_PADDING_ADD +        \
+                                       MBEDTLS_SSL_MAX_CID_EXPANSION    \
                                        )
 
 #define MBEDTLS_SSL_IN_PAYLOAD_LEN ( MBEDTLS_SSL_PAYLOAD_OVERHEAD + \
@@ -262,11 +256,49 @@
    implicit sequence number. */
 #define MBEDTLS_SSL_HEADER_LEN 13
 
+#if !defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
 #define MBEDTLS_SSL_IN_BUFFER_LEN  \
     ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_IN_PAYLOAD_LEN ) )
+#else
+#define MBEDTLS_SSL_IN_BUFFER_LEN  \
+    ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_IN_PAYLOAD_LEN ) \
+      + ( MBEDTLS_SSL_CID_IN_LEN_MAX ) )
+#endif
 
+#if !defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
 #define MBEDTLS_SSL_OUT_BUFFER_LEN  \
     ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_OUT_PAYLOAD_LEN ) )
+#else
+#define MBEDTLS_SSL_OUT_BUFFER_LEN                               \
+    ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_OUT_PAYLOAD_LEN )    \
+      + ( MBEDTLS_SSL_CID_OUT_LEN_MAX ) )
+#endif
+
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+static inline size_t mbedtls_ssl_get_output_buflen( const mbedtls_ssl_context *ctx )
+{
+#if defined (MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    return mbedtls_ssl_get_output_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD
+               + MBEDTLS_SSL_CID_OUT_LEN_MAX;
+#else
+    return mbedtls_ssl_get_output_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD;
+#endif
+}
+
+static inline size_t mbedtls_ssl_get_input_buflen( const mbedtls_ssl_context *ctx )
+{
+#if defined (MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    return mbedtls_ssl_get_input_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD
+               + MBEDTLS_SSL_CID_IN_LEN_MAX;
+#else
+    return mbedtls_ssl_get_input_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD;
+#endif
+}
+#endif
 
 #ifdef MBEDTLS_ZLIB_SUPPORT
 /* Compression buffer holds both IN and OUT buffers, so should be size of the larger */
@@ -325,7 +357,7 @@ extern "C" {
 #endif
 
 #if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
-    defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 /*
  * Abstraction for a grid of allowed signature-hash-algorithm pairs.
  */
@@ -340,7 +372,54 @@ struct mbedtls_ssl_sig_hash_set_t
     mbedtls_md_type_t ecdsa;
 };
 #endif /* MBEDTLS_SSL_PROTO_TLS1_2 &&
-          MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+          MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
+
+typedef int  mbedtls_ssl_tls_prf_cb( const unsigned char *secret, size_t slen,
+                                     const char *label,
+                                     const unsigned char *random, size_t rlen,
+                                     unsigned char *dstbuf, size_t dlen );
+
+/* cipher.h exports the maximum IV, key and block length from
+ * all ciphers enabled in the config, regardless of whether those
+ * ciphers are actually usable in SSL/TLS. Notably, XTS is enabled
+ * in the default configuration and uses 64 Byte keys, but it is
+ * not used for record protection in SSL/TLS.
+ *
+ * In order to prevent unnecessary inflation of key structures,
+ * we introduce SSL-specific variants of the max-{key,block,IV}
+ * macros here which are meant to only take those ciphers into
+ * account which can be negotiated in SSL/TLS.
+ *
+ * Since the current definitions of MBEDTLS_MAX_{KEY|BLOCK|IV}_LENGTH
+ * in cipher.h are rough overapproximations of the real maxima, here
+ * we content ourselves with replicating those overapproximations
+ * for the maximum block and IV length, and excluding XTS from the
+ * computation of the maximum key length. */
+#define MBEDTLS_SSL_MAX_BLOCK_LENGTH 16
+#define MBEDTLS_SSL_MAX_IV_LENGTH    16
+#define MBEDTLS_SSL_MAX_KEY_LENGTH   32
+
+/**
+ * \brief   The data structure holding the cryptographic material (key and IV)
+ *          used for record protection in TLS 1.3.
+ */
+struct mbedtls_ssl_key_set
+{
+    /*! The key for client->server records. */
+    unsigned char client_write_key[ MBEDTLS_SSL_MAX_KEY_LENGTH ];
+    /*! The key for server->client records. */
+    unsigned char server_write_key[ MBEDTLS_SSL_MAX_KEY_LENGTH ];
+    /*! The IV  for client->server records. */
+    unsigned char client_write_iv[ MBEDTLS_SSL_MAX_IV_LENGTH ];
+    /*! The IV  for server->client records. */
+    unsigned char server_write_iv[ MBEDTLS_SSL_MAX_IV_LENGTH ];
+
+    size_t key_len; /*!< The length of client_write_key and
+                     *   server_write_key, in Bytes. */
+    size_t iv_len;  /*!< The length of client_write_iv and
+                     *   server_write_iv, in Bytes. */
+};
+typedef struct mbedtls_ssl_key_set mbedtls_ssl_key_set;
 
 /*
  * This structure contains the parameters only needed during handshake.
@@ -351,16 +430,80 @@ struct mbedtls_ssl_handshake_params
      * Handshake specific crypto variables
      */
 
-#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
-    defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+    uint8_t max_major_ver;              /*!< max. major version client*/
+    uint8_t max_minor_ver;              /*!< max. minor version client*/
+    uint8_t resume;                     /*!<  session resume indicator*/
+    uint8_t cli_exts;                   /*!< client extension presence*/
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C) &&        \
+    defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
+    uint8_t sni_authmode;               /*!< authmode from SNI callback     */
+#endif
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS)
+    uint8_t new_session_ticket;         /*!< use NewSessionTicket?    */
+#endif /* MBEDTLS_SSL_SESSION_TICKETS */
+
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+    uint8_t extended_ms;                /*!< use Extended Master Secret? */
+#endif
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+    uint8_t async_in_progress;          /*!< an asynchronous operation is in progress */
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    unsigned char retransmit_state;     /*!<  Retransmission state           */
+#endif
+
+#if defined(MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED)
+    uint8_t ecrs_enabled;               /*!< Handshake supports EC restart? */
+    enum { /* this complements ssl->state with info on intra-state operations */
+        ssl_ecrs_none = 0,              /*!< nothing going on (yet)         */
+        ssl_ecrs_crt_verify,            /*!< Certificate: crt_verify()      */
+        ssl_ecrs_ske_start_processing,  /*!< ServerKeyExchange: pk_verify() */
+        ssl_ecrs_cke_ecdh_calc_secret,  /*!< ClientKeyExchange: ECDH step 2 */
+        ssl_ecrs_crt_vrfy_sign,         /*!< CertificateVerify: pk_sign()   */
+    } ecrs_state;                       /*!< current (or last) operation    */
+    mbedtls_x509_crt *ecrs_peer_cert;   /*!< The peer's CRT chain.          */
+    size_t ecrs_n;                      /*!< place for saving a length      */
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2) &&                \
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
     mbedtls_ssl_sig_hash_set_t hash_algs;             /*!<  Set of suitable sig-hash pairs */
 #endif
+
+    size_t pmslen;                      /*!<  premaster length        */
+
+    mbedtls_ssl_ciphersuite_t const *ciphersuite_info;
+
+    void (*update_checksum)(mbedtls_ssl_context *, const unsigned char *, size_t);
+    void (*calc_verify)(const mbedtls_ssl_context *, unsigned char *, size_t *);
+    void (*calc_finished)(mbedtls_ssl_context *, unsigned char *, int);
+    mbedtls_ssl_tls_prf_cb *tls_prf;
+
 #if defined(MBEDTLS_DHM_C)
     mbedtls_dhm_context dhm_ctx;                /*!<  DHM key exchange        */
 #endif
-#if defined(MBEDTLS_ECDH_C)
+
+/* Adding guard for MBEDTLS_ECDSA_C to ensure no compile errors due
+ * to guards also being in ssl_srv.c and ssl_cli.c. There is a gap
+ * in functionality that access to ecdh_ctx structure is needed for
+ * MBEDTLS_ECDSA_C which does not seem correct.
+ */
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C)
     mbedtls_ecdh_context ecdh_ctx;              /*!<  ECDH key exchange       */
-#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_type_t ecdh_psa_type;
+    uint16_t ecdh_bits;
+    psa_key_id_t ecdh_psa_privkey;
+    unsigned char ecdh_psa_peerkey[MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH];
+    size_t ecdh_psa_peerkey_len;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C */
+
 #if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
     mbedtls_ecjpake_context ecjpake_ctx;        /*!< EC J-PAKE key exchange */
 #if defined(MBEDTLS_SSL_CLI_C)
@@ -368,56 +511,39 @@ struct mbedtls_ssl_handshake_params
     size_t ecjpake_cache_len;                   /*!< Length of cached data */
 #endif
 #endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */
-#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \
+
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) ||      \
     defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
     const mbedtls_ecp_curve_info **curves;      /*!<  Supported elliptic curves */
 #endif
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_id_t psk_opaque;            /*!< Opaque PSK from the callback   */
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
     unsigned char *psk;                 /*!<  PSK from the callback         */
     size_t psk_len;                     /*!<  Length of PSK from callback   */
-#endif
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
     mbedtls_ssl_key_cert *key_cert;     /*!< chosen key/cert pair (server)  */
 #if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
-    int sni_authmode;                   /*!< authmode from SNI callback     */
     mbedtls_ssl_key_cert *sni_key_cert; /*!< key/cert list from SNI         */
     mbedtls_x509_crt *sni_ca_chain;     /*!< trusted CAs from SNI callback  */
     mbedtls_x509_crl *sni_ca_crl;       /*!< trusted CAs CRLs from SNI      */
 #endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
-#if defined(MBEDTLS_SSL__ECP_RESTARTABLE)
-    int ecrs_enabled;                   /*!< Handshake supports EC restart? */
+
+#if defined(MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED)
     mbedtls_x509_crt_restart_ctx ecrs_ctx;  /*!< restart context            */
-    enum { /* this complements ssl->state with info on intra-state operations */
-        ssl_ecrs_none = 0,              /*!< nothing going on (yet)         */
-        ssl_ecrs_crt_verify,            /*!< Certificate: crt_verify()      */
-        ssl_ecrs_ske_start_processing,  /*!< ServerKeyExchange: pk_verify() */
-        ssl_ecrs_cke_ecdh_calc_secret,  /*!< ClientKeyExchange: ECDH step 2 */
-        ssl_ecrs_crt_vrfy_sign,         /*!< CertificateVerify: pk_sign()   */
-    } ecrs_state;                       /*!< current (or last) operation    */
-    size_t ecrs_n;                      /*!< place for saving a length      */
 #endif
-#if defined(MBEDTLS_SSL_PROTO_DTLS)
-    unsigned int out_msg_seq;           /*!<  Outgoing handshake sequence number */
-    unsigned int in_msg_seq;            /*!<  Incoming handshake sequence number */
-
-    unsigned char *verify_cookie;       /*!<  Cli: HelloVerifyRequest cookie
-                                              Srv: unused                    */
-    unsigned char verify_cookie_len;    /*!<  Cli: cookie length
-                                              Srv: flag for sending a cookie */
 
-    uint32_t retransmit_timeout;        /*!<  Current value of timeout       */
-    unsigned char retransmit_state;     /*!<  Retransmission state           */
-    mbedtls_ssl_flight_item *flight;    /*!<  Current outgoing flight        */
-    mbedtls_ssl_flight_item *cur_msg;   /*!<  Current message in flight      */
-    unsigned char *cur_msg_p;           /*!<  Position in current message    */
-    unsigned int in_flight_start_seq;   /*!<  Minimum message sequence in the
-                                              flight being received          */
-    mbedtls_ssl_transform *alt_transform_out;   /*!<  Alternative transform for
-                                              resending messages             */
-    unsigned char alt_out_ctr[8];       /*!<  Alternative record epoch/counter
-                                              for resending messages         */
+#if defined(MBEDTLS_X509_CRT_PARSE_C) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+    mbedtls_pk_context peer_pubkey;     /*!< The public key from the peer.  */
+#endif /* MBEDTLS_X509_CRT_PARSE_C && !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
 
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
     struct
     {
         size_t total_bytes_buffered; /*!< Cumulative size of heap allocated
@@ -444,6 +570,37 @@ struct mbedtls_ssl_handshake_params
 
     } buffering;
 
+    unsigned int out_msg_seq;           /*!<  Outgoing handshake sequence number */
+    unsigned int in_msg_seq;            /*!<  Incoming handshake sequence number */
+
+    unsigned char *verify_cookie;       /*!<  Cli: HelloVerifyRequest cookie
+                                              Srv: unused                    */
+    unsigned char verify_cookie_len;    /*!<  Cli: cookie length
+                                              Srv: flag for sending a cookie */
+
+    uint32_t retransmit_timeout;        /*!<  Current value of timeout       */
+    mbedtls_ssl_flight_item *flight;    /*!<  Current outgoing flight        */
+    mbedtls_ssl_flight_item *cur_msg;   /*!<  Current message in flight      */
+    unsigned char *cur_msg_p;           /*!<  Position in current message    */
+    unsigned int in_flight_start_seq;   /*!<  Minimum message sequence in the
+                                              flight being received          */
+    mbedtls_ssl_transform *alt_transform_out;   /*!<  Alternative transform for
+                                              resending messages             */
+    unsigned char alt_out_ctr[8];       /*!<  Alternative record epoch/counter
+                                              for resending messages         */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    /* The state of CID configuration in this handshake. */
+
+    uint8_t cid_in_use; /*!< This indicates whether the use of the CID extension
+                         *   has been negotiated. Possible values are
+                         *   #MBEDTLS_SSL_CID_ENABLED and
+                         *   #MBEDTLS_SSL_CID_DISABLED. */
+    unsigned char peer_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ]; /*! The peer's CID */
+    uint8_t peer_cid_len;                                  /*!< The length of
+                                                            *   \c peer_cid.  */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
     uint16_t mtu;                       /*!<  Handshake mtu, used to fragment outgoing messages */
 #endif /* MBEDTLS_SSL_PROTO_DTLS */
 
@@ -452,47 +609,30 @@ struct mbedtls_ssl_handshake_params
      */
 #if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \
     defined(MBEDTLS_SSL_PROTO_TLS1_1)
-       mbedtls_md5_context fin_md5;
-      mbedtls_sha1_context fin_sha1;
+    mbedtls_md5_context fin_md5;
+    mbedtls_sha1_context fin_sha1;
 #endif
 #if defined(MBEDTLS_SSL_PROTO_TLS1_2)
 #if defined(MBEDTLS_SHA256_C)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_hash_operation_t fin_sha256_psa;
+#else
     mbedtls_sha256_context fin_sha256;
 #endif
+#endif
 #if defined(MBEDTLS_SHA512_C)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_hash_operation_t fin_sha384_psa;
+#else
     mbedtls_sha512_context fin_sha512;
 #endif
+#endif
 #endif /* MBEDTLS_SSL_PROTO_TLS1_2 */
 
-    void (*update_checksum)(mbedtls_ssl_context *, const unsigned char *, size_t);
-    void (*calc_verify)(mbedtls_ssl_context *, unsigned char *);
-    void (*calc_finished)(mbedtls_ssl_context *, unsigned char *, int);
-    int  (*tls_prf)(const unsigned char *, size_t, const char *,
-                    const unsigned char *, size_t,
-                    unsigned char *, size_t);
-
-    size_t pmslen;                      /*!<  premaster length        */
-
     unsigned char randbytes[64];        /*!<  random bytes            */
     unsigned char premaster[MBEDTLS_PREMASTER_SIZE];
                                         /*!<  premaster secret        */
 
-    int resume;                         /*!<  session resume indicator*/
-    int max_major_ver;                  /*!< max. major version client*/
-    int max_minor_ver;                  /*!< max. minor version client*/
-    int cli_exts;                       /*!< client extension presence*/
-
-#if defined(MBEDTLS_SSL_SESSION_TICKETS)
-    int new_session_ticket;             /*!< use NewSessionTicket?    */
-#endif /* MBEDTLS_SSL_SESSION_TICKETS */
-#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
-    int extended_ms;                    /*!< use Extended Master Secret? */
-#endif
-
-#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
-    unsigned int async_in_progress : 1; /*!< an asynchronous operation is in progress */
-#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
-
 #if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
     /** Asynchronous operation context. This field is meant for use by the
      * asynchronous operation callbacks (mbedtls_ssl_config::f_async_sign_start,
@@ -506,25 +646,120 @@ struct mbedtls_ssl_handshake_params
 typedef struct mbedtls_ssl_hs_buffer mbedtls_ssl_hs_buffer;
 
 /*
- * This structure contains a full set of runtime transform parameters
- * either in negotiation or active.
+ * Representation of decryption/encryption transformations on records
+ *
+ * There are the following general types of record transformations:
+ * - Stream transformations (TLS versions <= 1.2 only)
+ *   Transformation adding a MAC and applying a stream-cipher
+ *   to the authenticated message.
+ * - CBC block cipher transformations ([D]TLS versions <= 1.2 only)
+ *   In addition to the distinction of the order of encryption and
+ *   authentication, there's a fundamental difference between the
+ *   handling in SSL3 & TLS 1.0 and TLS 1.1 and TLS 1.2: For SSL3
+ *   and TLS 1.0, the final IV after processing a record is used
+ *   as the IV for the next record. No explicit IV is contained
+ *   in an encrypted record. The IV for the first record is extracted
+ *   at key extraction time. In contrast, for TLS 1.1 and 1.2, no
+ *   IV is generated at key extraction time, but every encrypted
+ *   record is explicitly prefixed by the IV with which it was encrypted.
+ * - AEAD transformations ([D]TLS versions >= 1.2 only)
+ *   These come in two fundamentally different versions, the first one
+ *   used in TLS 1.2, excluding ChaChaPoly ciphersuites, and the second
+ *   one used for ChaChaPoly ciphersuites in TLS 1.2 as well as for TLS 1.3.
+ *   In the first transformation, the IV to be used for a record is obtained
+ *   as the concatenation of an explicit, static 4-byte IV and the 8-byte
+ *   record sequence number, and explicitly prepending this sequence number
+ *   to the encrypted record. In contrast, in the second transformation
+ *   the IV is obtained by XOR'ing a static IV obtained at key extraction
+ *   time with the 8-byte record sequence number, without prepending the
+ *   latter to the encrypted record.
+ *
+ * Additionally, DTLS 1.2 + CID as well as TLS 1.3 use an inner plaintext
+ * which allows to add flexible length padding and to hide a record's true
+ * content type.
+ *
+ * In addition to type and version, the following parameters are relevant:
+ * - The symmetric cipher algorithm to be used.
+ * - The (static) encryption/decryption keys for the cipher.
+ * - For stream/CBC, the type of message digest to be used.
+ * - For stream/CBC, (static) encryption/decryption keys for the digest.
+ * - For AEAD transformations, the size (potentially 0) of an explicit,
+ *   random initialization vector placed in encrypted records.
+ * - For some transformations (currently AEAD and CBC in SSL3 and TLS 1.0)
+ *   an implicit IV. It may be static (e.g. AEAD) or dynamic (e.g. CBC)
+ *   and (if present) is combined with the explicit IV in a transformation-
+ *   dependent way (e.g. appending in TLS 1.2 and XOR'ing in TLS 1.3).
+ * - For stream/CBC, a flag determining the order of encryption and MAC.
+ * - The details of the transformation depend on the SSL/TLS version.
+ * - The length of the authentication tag.
+ *
+ * Note: Except for CBC in SSL3 and TLS 1.0, these parameters are
+ *       constant across multiple encryption/decryption operations.
+ *       For CBC, the implicit IV needs to be updated after each
+ *       operation.
+ *
+ * The struct below refines this abstract view as follows:
+ * - The cipher underlying the transformation is managed in
+ *   cipher contexts cipher_ctx_{enc/dec}, which must have the
+ *   same cipher type. The mode of these cipher contexts determines
+ *   the type of the transformation in the sense above: e.g., if
+ *   the type is MBEDTLS_CIPHER_AES_256_CBC resp. MBEDTLS_CIPHER_AES_192_GCM
+ *   then the transformation has type CBC resp. AEAD.
+ * - The cipher keys are never stored explicitly but
+ *   are maintained within cipher_ctx_{enc/dec}.
+ * - For stream/CBC transformations, the message digest contexts
+ *   used for the MAC's are stored in md_ctx_{enc/dec}. These contexts
+ *   are unused for AEAD transformations.
+ * - For stream/CBC transformations and versions > SSL3, the
+ *   MAC keys are not stored explicitly but maintained within
+ *   md_ctx_{enc/dec}.
+ * - For stream/CBC transformations and version SSL3, the MAC
+ *   keys are stored explicitly in mac_enc, mac_dec and have
+ *   a fixed size of 20 bytes. These fields are unused for
+ *   AEAD transformations or transformations >= TLS 1.0.
+ * - For transformations using an implicit IV maintained within
+ *   the transformation context, its contents are stored within
+ *   iv_{enc/dec}.
+ * - The value of ivlen indicates the length of the IV.
+ *   This is redundant in case of stream/CBC transformations
+ *   which always use 0 resp. the cipher's block length as the
+ *   IV length, but is needed for AEAD ciphers and may be
+ *   different from the underlying cipher's block length
+ *   in this case.
+ * - The field fixed_ivlen is nonzero for AEAD transformations only
+ *   and indicates the length of the static part of the IV which is
+ *   constant throughout the communication, and which is stored in
+ *   the first fixed_ivlen bytes of the iv_{enc/dec} arrays.
+ *   Note: For CBC in SSL3 and TLS 1.0, the fields iv_{enc/dec}
+ *   still store IV's for continued use across multiple transformations,
+ *   so it is not true that fixed_ivlen == 0 means that iv_{enc/dec} are
+ *   not being used!
+ * - minor_ver denotes the SSL/TLS version
+ * - For stream/CBC transformations, maclen denotes the length of the
+ *   authentication tag, while taglen is unused and 0.
+ * - For AEAD transformations, taglen denotes the length of the
+ *   authentication tag, while maclen is unused and 0.
+ * - For CBC transformations, encrypt_then_mac determines the
+ *   order of encryption and authentication. This field is unused
+ *   in other transformations.
+ *
  */
 struct mbedtls_ssl_transform
 {
     /*
      * Session specific crypto layer
      */
-    const mbedtls_ssl_ciphersuite_t *ciphersuite_info;
-                                        /*!<  Chosen cipersuite_info  */
-    unsigned int keylen;                /*!<  symmetric key length (bytes)  */
     size_t minlen;                      /*!<  min. ciphertext length  */
     size_t ivlen;                       /*!<  IV length               */
     size_t fixed_ivlen;                 /*!<  Fixed part of IV (AEAD) */
-    size_t maclen;                      /*!<  MAC length              */
+    size_t maclen;                      /*!<  MAC(CBC) len            */
+    size_t taglen;                      /*!<  TAG(AEAD) len           */
 
     unsigned char iv_enc[16];           /*!<  IV (encryption)         */
     unsigned char iv_dec[16];           /*!<  IV (decryption)         */
 
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
+
 #if defined(MBEDTLS_SSL_PROTO_SSL3)
     /* Needed only for SSL v3.0 secret */
     unsigned char mac_enc[20];          /*!<  SSL v3.0 secret (enc)   */
@@ -534,8 +769,22 @@ struct mbedtls_ssl_transform
     mbedtls_md_context_t md_ctx_enc;            /*!<  MAC (encryption)        */
     mbedtls_md_context_t md_ctx_dec;            /*!<  MAC (decryption)        */
 
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+    int encrypt_then_mac;       /*!< flag for EtM activation                */
+#endif
+
+#endif /* MBEDTLS_SSL_SOME_MODES_USE_MAC */
+
     mbedtls_cipher_context_t cipher_ctx_enc;    /*!<  encryption context      */
     mbedtls_cipher_context_t cipher_ctx_dec;    /*!<  decryption context      */
+    int minor_ver;
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t in_cid_len;
+    uint8_t out_cid_len;
+    unsigned char in_cid [ MBEDTLS_SSL_CID_OUT_LEN_MAX ];
+    unsigned char out_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ];
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
 
     /*
      * Session specific compression layer
@@ -544,8 +793,83 @@ struct mbedtls_ssl_transform
     z_stream ctx_deflate;               /*!<  compression context     */
     z_stream ctx_inflate;               /*!<  decompression context   */
 #endif
+
+#if defined(MBEDTLS_SSL_CONTEXT_SERIALIZATION)
+    /* We need the Hello random bytes in order to re-derive keys from the
+     * Master Secret and other session info, see ssl_populate_transform() */
+    unsigned char randbytes[64]; /*!< ServerHello.random+ClientHello.random */
+#endif /* MBEDTLS_SSL_CONTEXT_SERIALIZATION */
 };
 
+/*
+ * Return 1 if the transform uses an AEAD cipher, 0 otherwise.
+ * Equivalently, return 0 if a separate MAC is used, 1 otherwise.
+ */
+static inline int mbedtls_ssl_transform_uses_aead(
+        const mbedtls_ssl_transform *transform )
+{
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
+    return( transform->maclen == 0 && transform->taglen != 0 );
+#else
+    (void) transform;
+    return( 1 );
+#endif
+}
+
+/*
+ * Internal representation of record frames
+ *
+ * Instances come in two flavors:
+ * (1) Encrypted
+ *     These always have data_offset = 0
+ * (2) Unencrypted
+ *     These have data_offset set to the amount of
+ *     pre-expansion during record protection. Concretely,
+ *     this is the length of the fixed part of the explicit IV
+ *     used for encryption, or 0 if no explicit IV is used
+ *     (e.g. for CBC in TLS 1.0, or stream ciphers).
+ *
+ * The reason for the data_offset in the unencrypted case
+ * is to allow for in-place conversion of an unencrypted to
+ * an encrypted record. If the offset wasn't included, the
+ * encrypted content would need to be shifted afterwards to
+ * make space for the fixed IV.
+ *
+ */
+#if MBEDTLS_SSL_CID_OUT_LEN_MAX > MBEDTLS_SSL_CID_IN_LEN_MAX
+#define MBEDTLS_SSL_CID_LEN_MAX MBEDTLS_SSL_CID_OUT_LEN_MAX
+#else
+#define MBEDTLS_SSL_CID_LEN_MAX MBEDTLS_SSL_CID_IN_LEN_MAX
+#endif
+
+typedef struct
+{
+    uint8_t ctr[8];         /* In TLS:  The implicit record sequence number.
+                             * In DTLS: The 2-byte epoch followed by
+                             *          the 6-byte sequence number.
+                             * This is stored as a raw big endian byte array
+                             * as opposed to a uint64_t because we rarely
+                             * need to perform arithmetic on this, but do
+                             * need it as a Byte array for the purpose of
+                             * MAC computations.                             */
+    uint8_t type;           /* The record content type.                      */
+    uint8_t ver[2];         /* SSL/TLS version as present on the wire.
+                             * Convert to internal presentation of versions
+                             * using mbedtls_ssl_read_version() and
+                             * mbedtls_ssl_write_version().
+                             * Keep wire-format for MAC computations.        */
+
+    unsigned char *buf;     /* Memory buffer enclosing the record content    */
+    size_t buf_len;         /* Buffer length                                 */
+    size_t data_offset;     /* Offset of record content                      */
+    size_t data_len;        /* Length of record content                      */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t cid_len;        /* Length of the CID (0 if not present)          */
+    unsigned char cid[ MBEDTLS_SSL_CID_LEN_MAX ]; /* The CID                 */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+} mbedtls_record;
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 /*
  * List of certificate + private key pairs
@@ -572,7 +896,7 @@ struct mbedtls_ssl_flight_item
 #endif /* MBEDTLS_SSL_PROTO_DTLS */
 
 #if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
-    defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 
 /* Find an entry in a signature-hash set matching a given hash algorithm. */
 mbedtls_md_type_t mbedtls_ssl_sig_hash_set_find( mbedtls_ssl_sig_hash_set_t *set,
@@ -592,7 +916,7 @@ static inline void mbedtls_ssl_sig_hash_set_init( mbedtls_ssl_sig_hash_set_t *se
 }
 
 #endif /* MBEDTLS_SSL_PROTO_TLS1_2) &&
-          MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+          MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
 
 /**
  * \brief           Free referenced items in an SSL transform context and clear
@@ -719,9 +1043,62 @@ int mbedtls_ssl_write_finished( mbedtls_ssl_context *ssl );
 void mbedtls_ssl_optimize_checksum( mbedtls_ssl_context *ssl,
                             const mbedtls_ssl_ciphersuite_t *ciphersuite_info );
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
 int mbedtls_ssl_psk_derive_premaster( mbedtls_ssl_context *ssl, mbedtls_key_exchange_type_t key_ex );
-#endif
+
+/**
+ * Get the first defined PSK by order of precedence:
+ * 1. handshake PSK set by \c mbedtls_ssl_set_hs_psk() in the PSK callback
+ * 2. static PSK configured by \c mbedtls_ssl_conf_psk()
+ * Return a code and update the pair (PSK, PSK length) passed to this function
+ */
+static inline int mbedtls_ssl_get_psk( const mbedtls_ssl_context *ssl,
+    const unsigned char **psk, size_t *psk_len )
+{
+    if( ssl->handshake->psk != NULL && ssl->handshake->psk_len > 0 )
+    {
+        *psk = ssl->handshake->psk;
+        *psk_len = ssl->handshake->psk_len;
+    }
+
+    else if( ssl->conf->psk != NULL && ssl->conf->psk_len > 0 )
+    {
+        *psk = ssl->conf->psk;
+        *psk_len = ssl->conf->psk_len;
+    }
+
+    else
+    {
+        *psk = NULL;
+        *psk_len = 0;
+        return( MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED );
+    }
+
+    return( 0 );
+}
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * Get the first defined opaque PSK by order of precedence:
+ * 1. handshake PSK set by \c mbedtls_ssl_set_hs_psk_opaque() in the PSK
+ *    callback
+ * 2. static PSK configured by \c mbedtls_ssl_conf_psk_opaque()
+ * Return an opaque PSK
+ */
+static inline psa_key_id_t mbedtls_ssl_get_opaque_psk(
+    const mbedtls_ssl_context *ssl )
+{
+    if( ! mbedtls_svc_key_id_is_null( ssl->handshake->psk_opaque ) )
+        return( ssl->handshake->psk_opaque );
+
+    if( ! mbedtls_svc_key_id_is_null( ssl->conf->psk_opaque ) )
+        return( ssl->conf->psk_opaque );
+
+    return( MBEDTLS_SVC_KEY_ID_INIT );
+}
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
 
 #if defined(MBEDTLS_PK_C)
 unsigned char mbedtls_ssl_sig_from_pk( mbedtls_pk_context *pk );
@@ -737,11 +1114,28 @@ int mbedtls_ssl_set_calc_verify_md( mbedtls_ssl_context *ssl, int md );
 int mbedtls_ssl_check_curve( const mbedtls_ssl_context *ssl, mbedtls_ecp_group_id grp_id );
 #endif
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 int mbedtls_ssl_check_sig_hash( const mbedtls_ssl_context *ssl,
                                 mbedtls_md_type_t md );
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+static inline mbedtls_ssl_srtp_profile mbedtls_ssl_check_srtp_profile_value
+                                                    ( const uint16_t srtp_profile_value )
+{
+    switch( srtp_profile_value )
+    {
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80:
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32:
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80:
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32:
+            return srtp_profile_value;
+        default: break;
+    }
+    return( MBEDTLS_TLS_SRTP_UNSET );
+}
+#endif
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 static inline mbedtls_pk_context *mbedtls_ssl_own_key( mbedtls_ssl_context *ssl )
 {
@@ -787,15 +1181,27 @@ void mbedtls_ssl_write_version( int major, int minor, int transport,
 void mbedtls_ssl_read_version( int *major, int *minor, int transport,
                        const unsigned char ver[2] );
 
-static inline size_t mbedtls_ssl_hdr_len( const mbedtls_ssl_context *ssl )
+static inline size_t mbedtls_ssl_in_hdr_len( const mbedtls_ssl_context *ssl )
 {
+#if !defined(MBEDTLS_SSL_PROTO_DTLS)
+    ((void) ssl);
+#endif
+
 #if defined(MBEDTLS_SSL_PROTO_DTLS)
     if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM )
+    {
         return( 13 );
-#else
-    ((void) ssl);
-#endif
-    return( 5 );
+    }
+    else
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+    {
+        return( 5 );
+    }
+}
+
+static inline size_t mbedtls_ssl_out_hdr_len( const mbedtls_ssl_context *ssl )
+{
+    return( (size_t) ( ssl->out_iv - ssl->out_hdr ) );
 }
 
 static inline size_t mbedtls_ssl_hs_hdr_len( const mbedtls_ssl_context *ssl )
@@ -818,29 +1224,12 @@ int mbedtls_ssl_flight_transmit( mbedtls_ssl_context *ssl );
 
 /* Visible for testing purposes only */
 #if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
-int mbedtls_ssl_dtls_replay_check( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_dtls_replay_check( mbedtls_ssl_context const *ssl );
 void mbedtls_ssl_dtls_replay_update( mbedtls_ssl_context *ssl );
 #endif
 
-/* constant-time buffer comparison */
-static inline int mbedtls_ssl_safer_memcmp( const void *a, const void *b, size_t n )
-{
-    size_t i;
-    volatile const unsigned char *A = (volatile const unsigned char *) a;
-    volatile const unsigned char *B = (volatile const unsigned char *) b;
-    volatile unsigned char diff = 0;
-
-    for( i = 0; i < n; i++ )
-    {
-        /* Read volatile data in order before computing diff.
-         * This avoids IAR compiler warning:
-         * 'the order of volatile accesses is undefined ..' */
-        unsigned char x = A[i], y = B[i];
-        diff |= x ^ y;
-    }
-
-    return( diff );
-}
+int mbedtls_ssl_session_copy( mbedtls_ssl_session *dst,
+                              const mbedtls_ssl_session *src );
 
 #if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \
     defined(MBEDTLS_SSL_PROTO_TLS1_1)
@@ -852,6 +1241,7 @@ int mbedtls_ssl_get_key_exchange_md_ssl_tls( mbedtls_ssl_context *ssl,
 
 #if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \
     defined(MBEDTLS_SSL_PROTO_TLS1_2)
+/* The hash buffer must have at least MBEDTLS_MD_MAX_SIZE bytes of length. */
 int mbedtls_ssl_get_key_exchange_md_tls1_2( mbedtls_ssl_context *ssl,
                                             unsigned char *hash, size_t *hashlen,
                                             unsigned char *data, size_t data_len,
@@ -859,75 +1249,60 @@ int mbedtls_ssl_get_key_exchange_md_tls1_2( mbedtls_ssl_context *ssl,
 #endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 || \
           MBEDTLS_SSL_PROTO_TLS1_2 */
 
-#if defined(MBEDTLS_SSL_SOME_SUITES_USE_TLS_CBC)
-/** \brief Compute the HMAC of variable-length data with constant flow.
- *
- * This function computes the HMAC of the concatenation of \p add_data and \p
- * data, and does with a code flow and memory access pattern that does not
- * depend on \p data_len_secret, but only on \p min_data_len and \p
- * max_data_len. In particular, this function always reads exactly \p
- * max_data_len bytes from \p data.
- *
- * \param ctx               The HMAC context. It must have keys configured
- *                          with mbedtls_md_hmac_starts() and use one of the
- *                          following hashes: SHA-384, SHA-256, SHA-1 or MD-5.
- *                          It is reset using mbedtls_md_hmac_reset() after
- *                          the computation is complete to prepare for the
- *                          next computation.
- * \param add_data          The additional data prepended to \p data. This
- *                          must point to a readable buffer of \p add_data_len
- *                          bytes.
- * \param add_data_len      The length of \p add_data in bytes.
- * \param data              The data appended to \p add_data. This must point
- *                          to a readable buffer of \p max_data_len bytes.
- * \param data_len_secret   The length of the data to process in \p data.
- *                          This must be no less than \p min_data_len and no
- *                          greater than \p max_data_len.
- * \param min_data_len      The minimal length of \p data in bytes.
- * \param max_data_len      The maximal length of \p data in bytes.
- * \param output            The HMAC will be written here. This must point to
- *                          a writable buffer of sufficient size to hold the
- *                          HMAC value.
- *
- * \retval 0
- *         Success.
- * \retval MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED
- *         The hardware accelerator failed.
- */
-int mbedtls_ssl_cf_hmac(
-        mbedtls_md_context_t *ctx,
-        const unsigned char *add_data, size_t add_data_len,
-        const unsigned char *data, size_t data_len_secret,
-        size_t min_data_len, size_t max_data_len,
-        unsigned char *output );
-
-/** \brief Copy data from a secret position with constant flow.
- *
- * This function copies \p len bytes from \p src_base + \p offset_secret to \p
- * dst, with a code flow and memory access pattern that does not depend on \p
- * offset_secret, but only on \p offset_min, \p offset_max and \p len.
- *
- * \param dst           The destination buffer. This must point to a writable
- *                      buffer of at least \p len bytes.
- * \param src_base      The base of the source buffer. This must point to a
- *                      readable buffer of at least \p offset_max + \p len
- *                      bytes.
- * \param offset_secret The offset in the source buffer from which to copy.
- *                      This must be no less than \p offset_min and no greater
- *                      than \p offset_max.
- * \param offset_min    The minimal value of \p offset_secret.
- * \param offset_max    The maximal value of \p offset_secret.
- * \param len           The number of bytes to copy.
- */
-void mbedtls_ssl_cf_memcpy_offset( unsigned char *dst,
-                                   const unsigned char *src_base,
-                                   size_t offset_secret,
-                                   size_t offset_min, size_t offset_max,
-                                   size_t len );
-#endif /* MBEDTLS_SSL_SOME_SUITES_USE_TLS_CBC */
-
 #ifdef __cplusplus
 }
 #endif
 
+void mbedtls_ssl_transform_init( mbedtls_ssl_transform *transform );
+int mbedtls_ssl_encrypt_buf( mbedtls_ssl_context *ssl,
+                             mbedtls_ssl_transform *transform,
+                             mbedtls_record *rec,
+                             int (*f_rng)(void *, unsigned char *, size_t),
+                             void *p_rng );
+int mbedtls_ssl_decrypt_buf( mbedtls_ssl_context const *ssl,
+                             mbedtls_ssl_transform *transform,
+                             mbedtls_record *rec );
+
+/* Length of the "epoch" field in the record header */
+static inline size_t mbedtls_ssl_ep_len( const mbedtls_ssl_context *ssl )
+{
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM )
+        return( 2 );
+#else
+    ((void) ssl);
+#endif
+    return( 0 );
+}
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+int mbedtls_ssl_resend_hello_request( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+void mbedtls_ssl_set_timer( mbedtls_ssl_context *ssl, uint32_t millisecs );
+int mbedtls_ssl_check_timer( mbedtls_ssl_context *ssl );
+
+void mbedtls_ssl_reset_in_out_pointers( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_update_out_pointers( mbedtls_ssl_context *ssl,
+                              mbedtls_ssl_transform *transform );
+void mbedtls_ssl_update_in_pointers( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_session_reset_int( mbedtls_ssl_context *ssl, int partial );
+
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+void mbedtls_ssl_dtls_replay_reset( mbedtls_ssl_context *ssl );
+#endif
+
+void mbedtls_ssl_handshake_wrapup_free_hs_transform( mbedtls_ssl_context *ssl );
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+int mbedtls_ssl_start_renegotiation( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+size_t mbedtls_ssl_get_current_mtu( const mbedtls_ssl_context *ssl );
+void mbedtls_ssl_buffering_free( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_flight_free( mbedtls_ssl_flight_item *flight );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
 #endif /* ssl_internal.h */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
index a83f5e66623..a882eed23b9 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_TICKET_H
 #define MBEDTLS_SSL_TICKET_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -61,11 +34,11 @@
  * secrecy, when MBEDTLS_HAVE_TIME is defined.
  */
 
-#include "ssl.h"
-#include "cipher.h"
+#include "mbedtls/ssl.h"
+#include "mbedtls/cipher.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/threading.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/threading.h
index 45161ce467c..d147c73f066 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/threading.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/threading.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_THREADING_H
 #define MBEDTLS_THREADING_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,10 +36,13 @@ extern "C" {
 
 /* MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE is deprecated and should not be
  * used. */
-#define MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE         -0x001A  /**< The selected feature is not available. */
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE         -0x001A
 
-#define MBEDTLS_ERR_THREADING_BAD_INPUT_DATA              -0x001C  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_THREADING_MUTEX_ERROR                 -0x001E  /**< Locking / unlocking / free failed with error code. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_THREADING_BAD_INPUT_DATA              -0x001C
+/** Locking / unlocking / free failed with error code. */
+#define MBEDTLS_ERR_THREADING_MUTEX_ERROR                 -0x001E
 
 #if defined(MBEDTLS_THREADING_PTHREAD)
 #include <pthread.h>
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/timing.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/timing.h
index 8611ba9a4e5..b7290cfcabc 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/timing.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/timing.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_TIMING_H
 #define MBEDTLS_TIMING_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/version.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/version.h
index 49cbeb003a8..b1a92b2bcf3 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/version.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/version.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 /*
  * This set of compile-time defines and run-time variables can be used to
@@ -54,7 +27,7 @@
 #define MBEDTLS_VERSION_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -64,17 +37,17 @@
  * Major, Minor, Patchlevel
  */
 #define MBEDTLS_VERSION_MAJOR  2
-#define MBEDTLS_VERSION_MINOR  16
-#define MBEDTLS_VERSION_PATCH  11
+#define MBEDTLS_VERSION_MINOR  28
+#define MBEDTLS_VERSION_PATCH  0
 
 /**
  * The single version number has the following structure:
  *    MMNNPP00
  *    Major version | Minor version | Patch version
  */
-#define MBEDTLS_VERSION_NUMBER         0x02100B00
-#define MBEDTLS_VERSION_STRING         "2.16.11"
-#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.16.11"
+#define MBEDTLS_VERSION_NUMBER         0x021C0000
+#define MBEDTLS_VERSION_STRING         "2.28.0"
+#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.28.0"
 
 #if defined(MBEDTLS_VERSION_C)
 
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509.h
index 5bb9b00292f..c1775014300 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,42 +18,21 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_H
 #define MBEDTLS_X509_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
-#include "pk.h"
+#include "mbedtls/asn1.h"
+#include "mbedtls/pk.h"
 
 #if defined(MBEDTLS_RSA_C)
-#include "rsa.h"
+#include "mbedtls/rsa.h"
 #endif
 
 /**
@@ -83,26 +56,46 @@
  * \name X509 Error codes
  * \{
  */
-#define MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE              -0x2080  /**< Unavailable feature, e.g. RSA hashing/encryption combination. */
-#define MBEDTLS_ERR_X509_UNKNOWN_OID                      -0x2100  /**< Requested OID is unknown. */
-#define MBEDTLS_ERR_X509_INVALID_FORMAT                   -0x2180  /**< The CRT/CRL/CSR format is invalid, e.g. different type expected. */
-#define MBEDTLS_ERR_X509_INVALID_VERSION                  -0x2200  /**< The CRT/CRL/CSR version element is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_SERIAL                   -0x2280  /**< The serial tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_ALG                      -0x2300  /**< The algorithm tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_NAME                     -0x2380  /**< The name tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_DATE                     -0x2400  /**< The date tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_SIGNATURE                -0x2480  /**< The signature tag or value invalid. */
-#define MBEDTLS_ERR_X509_INVALID_EXTENSIONS               -0x2500  /**< The extension tag or value is invalid. */
-#define MBEDTLS_ERR_X509_UNKNOWN_VERSION                  -0x2580  /**< CRT/CRL/CSR has an unsupported version number. */
-#define MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG                  -0x2600  /**< Signature algorithm (oid) is unsupported. */
-#define MBEDTLS_ERR_X509_SIG_MISMATCH                     -0x2680  /**< Signature algorithms do not match. (see \c ::mbedtls_x509_crt sig_oid) */
-#define MBEDTLS_ERR_X509_CERT_VERIFY_FAILED               -0x2700  /**< Certificate verification failed, e.g. CRL, CA or signature check failed. */
-#define MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT              -0x2780  /**< Format not recognized as DER or PEM. */
-#define MBEDTLS_ERR_X509_BAD_INPUT_DATA                   -0x2800  /**< Input invalid. */
-#define MBEDTLS_ERR_X509_ALLOC_FAILED                     -0x2880  /**< Allocation of memory failed. */
-#define MBEDTLS_ERR_X509_FILE_IO_ERROR                    -0x2900  /**< Read/write of file failed. */
-#define MBEDTLS_ERR_X509_BUFFER_TOO_SMALL                 -0x2980  /**< Destination buffer is too small. */
-#define MBEDTLS_ERR_X509_FATAL_ERROR                      -0x3000  /**< A fatal error occurred, eg the chain is too long or the vrfy callback failed. */
+/** Unavailable feature, e.g. RSA hashing/encryption combination. */
+#define MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE              -0x2080
+/** Requested OID is unknown. */
+#define MBEDTLS_ERR_X509_UNKNOWN_OID                      -0x2100
+/** The CRT/CRL/CSR format is invalid, e.g. different type expected. */
+#define MBEDTLS_ERR_X509_INVALID_FORMAT                   -0x2180
+/** The CRT/CRL/CSR version element is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_VERSION                  -0x2200
+/** The serial tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_SERIAL                   -0x2280
+/** The algorithm tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_ALG                      -0x2300
+/** The name tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_NAME                     -0x2380
+/** The date tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_DATE                     -0x2400
+/** The signature tag or value invalid. */
+#define MBEDTLS_ERR_X509_INVALID_SIGNATURE                -0x2480
+/** The extension tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_EXTENSIONS               -0x2500
+/** CRT/CRL/CSR has an unsupported version number. */
+#define MBEDTLS_ERR_X509_UNKNOWN_VERSION                  -0x2580
+/** Signature algorithm (oid) is unsupported. */
+#define MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG                  -0x2600
+/** Signature algorithms do not match. (see \c ::mbedtls_x509_crt sig_oid) */
+#define MBEDTLS_ERR_X509_SIG_MISMATCH                     -0x2680
+/** Certificate verification failed, e.g. CRL, CA or signature check failed. */
+#define MBEDTLS_ERR_X509_CERT_VERIFY_FAILED               -0x2700
+/** Format not recognized as DER or PEM. */
+#define MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT              -0x2780
+/** Input invalid. */
+#define MBEDTLS_ERR_X509_BAD_INPUT_DATA                   -0x2800
+/** Allocation of memory failed. */
+#define MBEDTLS_ERR_X509_ALLOC_FAILED                     -0x2880
+/** Read/write of file failed. */
+#define MBEDTLS_ERR_X509_FILE_IO_ERROR                    -0x2900
+/** Destination buffer is too small. */
+#define MBEDTLS_ERR_X509_BUFFER_TOO_SMALL                 -0x2980
+/** A fatal error occurred, eg the chain is too long or the vrfy callback failed. */
+#define MBEDTLS_ERR_X509_FATAL_ERROR                      -0x3000
 /* \} name */
 
 /**
@@ -134,6 +127,28 @@
 /* \} name */
 /* \} addtogroup x509_module */
 
+/*
+ * X.509 v3 Subject Alternative Name types.
+ *      otherName                       [0]     OtherName,
+ *      rfc822Name                      [1]     IA5String,
+ *      dNSName                         [2]     IA5String,
+ *      x400Address                     [3]     ORAddress,
+ *      directoryName                   [4]     Name,
+ *      ediPartyName                    [5]     EDIPartyName,
+ *      uniformResourceIdentifier       [6]     IA5String,
+ *      iPAddress                       [7]     OCTET STRING,
+ *      registeredID                    [8]     OBJECT IDENTIFIER
+ */
+#define MBEDTLS_X509_SAN_OTHER_NAME                      0
+#define MBEDTLS_X509_SAN_RFC822_NAME                     1
+#define MBEDTLS_X509_SAN_DNS_NAME                        2
+#define MBEDTLS_X509_SAN_X400_ADDRESS_NAME               3
+#define MBEDTLS_X509_SAN_DIRECTORY_NAME                  4
+#define MBEDTLS_X509_SAN_EDI_PARTY_NAME                  5
+#define MBEDTLS_X509_SAN_UNIFORM_RESOURCE_IDENTIFIER     6
+#define MBEDTLS_X509_SAN_IP_ADDRESS                      7
+#define MBEDTLS_X509_SAN_REGISTERED_ID                   8
+
 /*
  * X.509 v3 Key Usage Extension flags
  * Reminder: update x509_info_key_usage() when adding new flags.
@@ -167,24 +182,26 @@
  *
  * Comments refer to the status for using certificates. Status can be
  * different for writing certificates or reading CRLs or CSRs.
+ *
+ * Those are defined in oid.h as oid.c needs them in a data structure. Since
+ * these were previously defined here, let's have aliases for compatibility.
  */
-#define MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER    (1 << 0)
-#define MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER      (1 << 1)
-#define MBEDTLS_X509_EXT_KEY_USAGE                   (1 << 2)
-#define MBEDTLS_X509_EXT_CERTIFICATE_POLICIES        (1 << 3)
-#define MBEDTLS_X509_EXT_POLICY_MAPPINGS             (1 << 4)
-#define MBEDTLS_X509_EXT_SUBJECT_ALT_NAME            (1 << 5)    /* Supported (DNS) */
-#define MBEDTLS_X509_EXT_ISSUER_ALT_NAME             (1 << 6)
-#define MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS     (1 << 7)
-#define MBEDTLS_X509_EXT_BASIC_CONSTRAINTS           (1 << 8)    /* Supported */
-#define MBEDTLS_X509_EXT_NAME_CONSTRAINTS            (1 << 9)
-#define MBEDTLS_X509_EXT_POLICY_CONSTRAINTS          (1 << 10)
-#define MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE          (1 << 11)
-#define MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS     (1 << 12)
-#define MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY          (1 << 13)
-#define MBEDTLS_X509_EXT_FRESHEST_CRL                (1 << 14)
-
-#define MBEDTLS_X509_EXT_NS_CERT_TYPE                (1 << 16)
+#define MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER MBEDTLS_OID_X509_EXT_AUTHORITY_KEY_IDENTIFIER
+#define MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER   MBEDTLS_OID_X509_EXT_SUBJECT_KEY_IDENTIFIER
+#define MBEDTLS_X509_EXT_KEY_USAGE                MBEDTLS_OID_X509_EXT_KEY_USAGE
+#define MBEDTLS_X509_EXT_CERTIFICATE_POLICIES     MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES
+#define MBEDTLS_X509_EXT_POLICY_MAPPINGS          MBEDTLS_OID_X509_EXT_POLICY_MAPPINGS
+#define MBEDTLS_X509_EXT_SUBJECT_ALT_NAME         MBEDTLS_OID_X509_EXT_SUBJECT_ALT_NAME         /* Supported (DNS) */
+#define MBEDTLS_X509_EXT_ISSUER_ALT_NAME          MBEDTLS_OID_X509_EXT_ISSUER_ALT_NAME
+#define MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS  MBEDTLS_OID_X509_EXT_SUBJECT_DIRECTORY_ATTRS
+#define MBEDTLS_X509_EXT_BASIC_CONSTRAINTS        MBEDTLS_OID_X509_EXT_BASIC_CONSTRAINTS        /* Supported */
+#define MBEDTLS_X509_EXT_NAME_CONSTRAINTS         MBEDTLS_OID_X509_EXT_NAME_CONSTRAINTS
+#define MBEDTLS_X509_EXT_POLICY_CONSTRAINTS       MBEDTLS_OID_X509_EXT_POLICY_CONSTRAINTS
+#define MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE       MBEDTLS_OID_X509_EXT_EXTENDED_KEY_USAGE
+#define MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS  MBEDTLS_OID_X509_EXT_CRL_DISTRIBUTION_POINTS
+#define MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY       MBEDTLS_OID_X509_EXT_INIHIBIT_ANYPOLICY
+#define MBEDTLS_X509_EXT_FRESHEST_CRL             MBEDTLS_OID_X509_EXT_FRESHEST_CRL
+#define MBEDTLS_X509_EXT_NS_CERT_TYPE             MBEDTLS_OID_X509_EXT_NS_CERT_TYPE
 
 /*
  * Storage format identifiers
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h
index 2ade47c89db..7e9e8885f41 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_CRL_H
 #define MBEDTLS_X509_CRL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "x509.h"
+#include "mbedtls/x509.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
index 30da1909b74..64ccb433ba8 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,39 +18,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_CRT_H
 #define MBEDTLS_X509_CRT_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "x509.h"
-#include "x509_crl.h"
+#include "mbedtls/x509.h"
+#include "mbedtls/x509_crl.h"
+#include "mbedtls/bignum.h"
 
 /**
  * \addtogroup x509_module
@@ -77,6 +51,8 @@ extern "C" {
  */
 typedef struct mbedtls_x509_crt
 {
+    int own_buffer;                     /**< Indicates if \c raw is owned
+                                         *   by the structure or not.        */
     mbedtls_x509_buf raw;               /**< The raw certificate data (DER). */
     mbedtls_x509_buf tbs;               /**< The raw certificate body (DER). The part that is To Be Signed. */
 
@@ -93,12 +69,15 @@ typedef struct mbedtls_x509_crt
     mbedtls_x509_time valid_from;       /**< Start time of certificate validity. */
     mbedtls_x509_time valid_to;         /**< End time of certificate validity. */
 
+    mbedtls_x509_buf pk_raw;
     mbedtls_pk_context pk;              /**< Container for the public key context. */
 
     mbedtls_x509_buf issuer_id;         /**< Optional X.509 v2/v3 issuer unique identifier. */
     mbedtls_x509_buf subject_id;        /**< Optional X.509 v2/v3 subject unique identifier. */
     mbedtls_x509_buf v3_ext;            /**< Optional X.509 v3 extensions.  */
-    mbedtls_x509_sequence subject_alt_names;    /**< Optional list of Subject Alternative Names (Only dNSName supported). */
+    mbedtls_x509_sequence subject_alt_names;    /**< Optional list of raw entries of Subject Alternative Names extension (currently only dNSName and OtherName are listed). */
+
+    mbedtls_x509_sequence certificate_policies; /**< Optional list of certificate policies (Only anyPolicy is printed and enforced, however the rest of the policies are still listed). */
 
     int ext_types;              /**< Bit string containing detected and parsed extensions */
     int ca_istrue;              /**< Optional Basic Constraint extension value: 1 if this certificate belongs to a CA, 0 otherwise. */
@@ -119,6 +98,53 @@ typedef struct mbedtls_x509_crt
 }
 mbedtls_x509_crt;
 
+/**
+ * From RFC 5280 section 4.2.1.6:
+ * OtherName ::= SEQUENCE {
+ *      type-id    OBJECT IDENTIFIER,
+ *      value      [0] EXPLICIT ANY DEFINED BY type-id }
+ */
+typedef struct mbedtls_x509_san_other_name
+{
+    /**
+     * The type_id is an OID as deifned in RFC 5280.
+     * To check the value of the type id, you should use
+     * \p MBEDTLS_OID_CMP with a known OID mbedtls_x509_buf.
+     */
+    mbedtls_x509_buf type_id;                   /**< The type id. */
+    union
+    {
+        /**
+         * From RFC 4108 section 5:
+         * HardwareModuleName ::= SEQUENCE {
+         *                         hwType OBJECT IDENTIFIER,
+         *                         hwSerialNum OCTET STRING }
+         */
+        struct
+        {
+            mbedtls_x509_buf oid;               /**< The object identifier. */
+            mbedtls_x509_buf val;               /**< The named value. */
+        }
+        hardware_module_name;
+    }
+    value;
+}
+mbedtls_x509_san_other_name;
+
+/**
+ * A structure for holding the parsed Subject Alternative Name, according to type
+ */
+typedef struct mbedtls_x509_subject_alternative_name
+{
+    int type;                              /**< The SAN type, value of MBEDTLS_X509_SAN_XXX. */
+    union {
+        mbedtls_x509_san_other_name other_name; /**< The otherName supported type. */
+        mbedtls_x509_buf   unstructured_name; /**< The buffer for the un constructed types. Only dnsName currently supported */
+    }
+    san; /**< A union of the supported SAN types */
+}
+mbedtls_x509_subject_alternative_name;
+
 /**
  * Build flag from an algorithm/curve identifier (pk, md, ecp)
  * Since 0 is always XXX_NONE, ignore it.
@@ -188,6 +214,14 @@ typedef struct
 {
     mbedtls_x509_crt_verify_chain_item items[MBEDTLS_X509_MAX_VERIFY_CHAIN_SIZE];
     unsigned len;
+
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+    /* This stores the list of potential trusted signers obtained from
+     * the CA callback used for the CRT verification, if configured.
+     * We must track it somewhere because the callback passes its
+     * ownership to the caller. */
+    mbedtls_x509_crt *trust_ca_cb_result;
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
 } mbedtls_x509_crt_verify_chain;
 
 #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
@@ -254,16 +288,142 @@ extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_suiteb;
 
 /**
  * \brief          Parse a single DER formatted certificate and add it
- *                 to the chained list.
- *
- * \param chain    points to the start of the chain
- * \param buf      buffer holding the certificate DER data
- * \param buflen   size of the buffer
- *
- * \return         0 if successful, or a specific X509 or PEM error code
+ *                 to the end of the provided chained list.
+ *
+ * \param chain    The pointer to the start of the CRT chain to attach to.
+ *                 When parsing the first CRT in a chain, this should point
+ *                 to an instance of ::mbedtls_x509_crt initialized through
+ *                 mbedtls_x509_crt_init().
+ * \param buf      The buffer holding the DER encoded certificate.
+ * \param buflen   The size in Bytes of \p buf.
+ *
+ * \note           This function makes an internal copy of the CRT buffer
+ *                 \p buf. In particular, \p buf may be destroyed or reused
+ *                 after this call returns. To avoid duplicating the CRT
+ *                 buffer (at the cost of stricter lifetime constraints),
+ *                 use mbedtls_x509_crt_parse_der_nocopy() instead.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_x509_crt_parse_der( mbedtls_x509_crt *chain,
+                                const unsigned char *buf,
+                                size_t buflen );
+
+/**
+ * \brief          The type of certificate extension callbacks.
+ *
+ *                 Callbacks of this type are passed to and used by the
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() routine when
+ *                 it encounters either an unsupported extension or a
+ *                 "certificate policies" extension containing any
+ *                 unsupported certificate policies.
+ *                 Future versions of the library may invoke the callback
+ *                 in other cases, if and when the need arises.
+ *
+ * \param p_ctx    An opaque context passed to the callback.
+ * \param crt      The certificate being parsed.
+ * \param oid      The OID of the extension.
+ * \param critical Whether the extension is critical.
+ * \param p        Pointer to the start of the extension value
+ *                 (the content of the OCTET STRING).
+ * \param end      End of extension value.
+ *
+ * \note           The callback must fail and return a negative error code
+ *                 if it can not parse or does not support the extension.
+ *                 When the callback fails to parse a critical extension
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() also fails.
+ *                 When the callback fails to parse a non critical extension
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() simply skips
+ *                 the extension and continues parsing.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+typedef int (*mbedtls_x509_crt_ext_cb_t)( void *p_ctx,
+                                          mbedtls_x509_crt const *crt,
+                                          mbedtls_x509_buf const *oid,
+                                          int critical,
+                                          const unsigned char *p,
+                                          const unsigned char *end );
+
+/**
+ * \brief            Parse a single DER formatted certificate and add it
+ *                   to the end of the provided chained list.
+ *
+ * \param chain      The pointer to the start of the CRT chain to attach to.
+ *                   When parsing the first CRT in a chain, this should point
+ *                   to an instance of ::mbedtls_x509_crt initialized through
+ *                   mbedtls_x509_crt_init().
+ * \param buf        The buffer holding the DER encoded certificate.
+ * \param buflen     The size in Bytes of \p buf.
+ * \param make_copy  When not zero this function makes an internal copy of the
+ *                   CRT buffer \p buf. In particular, \p buf may be destroyed
+ *                   or reused after this call returns.
+ *                   When zero this function avoids duplicating the CRT buffer
+ *                   by taking temporary ownership thereof until the CRT
+ *                   is destroyed (like mbedtls_x509_crt_parse_der_nocopy())
+ * \param cb         A callback invoked for every unsupported certificate
+ *                   extension.
+ * \param p_ctx      An opaque context passed to the callback.
+ *
+ * \note             This call is functionally equivalent to
+ *                   mbedtls_x509_crt_parse_der(), and/or
+ *                   mbedtls_x509_crt_parse_der_nocopy()
+ *                   but it calls the callback with every unsupported
+ *                   certificate extension and additionally the
+ *                   "certificate policies" extension if it contains any
+ *                   unsupported certificate policies.
+ *                   The callback must return a negative error code if it
+ *                   does not know how to handle such an extension.
+ *                   When the callback fails to parse a critical extension
+ *                   mbedtls_x509_crt_parse_der_with_ext_cb() also fails.
+ *                   When the callback fails to parse a non critical extension
+ *                   mbedtls_x509_crt_parse_der_with_ext_cb() simply skips
+ *                   the extension and continues parsing.
+ *                   Future versions of the library may invoke the callback
+ *                   in other cases, if and when the need arises.
+ *
+ * \return           \c 0 if successful.
+ * \return           A negative error code on failure.
+ */
+int mbedtls_x509_crt_parse_der_with_ext_cb( mbedtls_x509_crt *chain,
+                                            const unsigned char *buf,
+                                            size_t buflen,
+                                            int make_copy,
+                                            mbedtls_x509_crt_ext_cb_t cb,
+                                            void *p_ctx );
+
+/**
+ * \brief          Parse a single DER formatted certificate and add it
+ *                 to the end of the provided chained list. This is a
+ *                 variant of mbedtls_x509_crt_parse_der() which takes
+ *                 temporary ownership of the CRT buffer until the CRT
+ *                 is destroyed.
+ *
+ * \param chain    The pointer to the start of the CRT chain to attach to.
+ *                 When parsing the first CRT in a chain, this should point
+ *                 to an instance of ::mbedtls_x509_crt initialized through
+ *                 mbedtls_x509_crt_init().
+ * \param buf      The address of the readable buffer holding the DER encoded
+ *                 certificate to use. On success, this buffer must be
+ *                 retained and not be changed for the liftetime of the
+ *                 CRT chain \p chain, that is, until \p chain is destroyed
+ *                 through a call to mbedtls_x509_crt_free().
+ * \param buflen   The size in Bytes of \p buf.
+ *
+ * \note           This call is functionally equivalent to
+ *                 mbedtls_x509_crt_parse_der(), but it avoids creating a
+ *                 copy of the input buffer at the cost of stronger lifetime
+ *                 constraints. This is useful in constrained environments
+ *                 where duplication of the CRT cannot be tolerated.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
  */
-int mbedtls_x509_crt_parse_der( mbedtls_x509_crt *chain, const unsigned char *buf,
-                        size_t buflen );
+int mbedtls_x509_crt_parse_der_nocopy( mbedtls_x509_crt *chain,
+                                       const unsigned char *buf,
+                                       size_t buflen );
 
 /**
  * \brief          Parse one DER-encoded or one or more concatenated PEM-encoded
@@ -327,8 +487,37 @@ int mbedtls_x509_crt_parse_file( mbedtls_x509_crt *chain, const char *path );
  *                 if partly successful or a specific X509 or PEM error code
  */
 int mbedtls_x509_crt_parse_path( mbedtls_x509_crt *chain, const char *path );
-#endif /* MBEDTLS_FS_IO */
 
+#endif /* MBEDTLS_FS_IO */
+/**
+ * \brief          This function parses an item in the SubjectAlternativeNames
+ *                 extension.
+ *
+ * \param san_buf  The buffer holding the raw data item of the subject
+ *                 alternative name.
+ * \param san      The target structure to populate with the parsed presentation
+ *                 of the subject alternative name encoded in \p san_raw.
+ *
+ * \note           Only "dnsName" and "otherName" of type hardware_module_name
+ *                 as defined in RFC 4180 is supported.
+ *
+ * \note           This function should be called on a single raw data of
+ *                 subject alternative name. For example, after successful
+ *                 certificate parsing, one must iterate on every item in the
+ *                 \p crt->subject_alt_names sequence, and pass it to
+ *                 this function.
+ *
+ * \warning        The target structure contains pointers to the raw data of the
+ *                 parsed certificate, and its lifetime is restricted by the
+ *                 lifetime of the certificate.
+ *
+ * \return         \c 0 on success
+ * \return         #MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE for an unsupported
+ *                 SAN type.
+ * \return         Another negative value for any other failure.
+ */
+int mbedtls_x509_parse_subject_alt_name( const mbedtls_x509_buf *san_buf,
+                                         mbedtls_x509_subject_alternative_name *san );
 /**
  * \brief          Returns an informational string about the
  *                 certificate.
@@ -360,7 +549,7 @@ int mbedtls_x509_crt_verify_info( char *buf, size_t size, const char *prefix,
                           uint32_t flags );
 
 /**
- * \brief          Verify the certificate signature
+ * \brief          Verify a chain of certificates.
  *
  *                 The verify callback is a user-supplied callback that
  *                 can clear / modify / add flags for a certificate. If set,
@@ -400,22 +589,30 @@ int mbedtls_x509_crt_verify_info( char *buf, size_t size, const char *prefix,
  *                 specific peers you know) - in that case, the self-signed
  *                 certificate doesn't need to have the CA bit set.
  *
- * \param crt      a certificate (chain) to be verified
- * \param trust_ca the list of trusted CAs (see note above)
- * \param ca_crl   the list of CRLs for trusted CAs (see note above)
- * \param cn       expected Common Name (can be set to
- *                 NULL if the CN must not be verified)
- * \param flags    result of the verification
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
- *
- * \return         0 (and flags set to 0) if the chain was verified and valid,
- *                 MBEDTLS_ERR_X509_CERT_VERIFY_FAILED if the chain was verified
- *                 but found to be invalid, in which case *flags will have one
- *                 or more MBEDTLS_X509_BADCERT_XXX or MBEDTLS_X509_BADCRL_XXX
- *                 flags set, or another error (and flags set to 0xffffffff)
- *                 in case of a fatal error encountered during the
- *                 verification process.
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param cn       The expected Common Name. This will be checked to be
+ *                 present in the certificate's subjectAltNames extension or,
+ *                 if this extension is absent, as a CN component in its
+ *                 Subject name. Currently only DNS names are supported. This
+ *                 may be \c NULL if the CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         \c 0 if the chain is valid with respect to the
+ *                 passed CN, CAs, CRLs and security profile.
+ * \return         #MBEDTLS_ERR_X509_CERT_VERIFY_FAILED in case the
+ *                 certificate chain verification failed. In this case,
+ *                 \c *flags will have one or more
+ *                 \c MBEDTLS_X509_BADCERT_XXX or \c MBEDTLS_X509_BADCRL_XXX
+ *                 flags set.
+ * \return         Another negative error code in case of a fatal error
+ *                 encountered during the verification process.
  */
 int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt,
                      mbedtls_x509_crt *trust_ca,
@@ -425,7 +622,8 @@ int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt,
                      void *p_vrfy );
 
 /**
- * \brief          Verify the certificate signature according to profile
+ * \brief          Verify a chain of certificates with respect to
+ *                 a configurable security profile.
  *
  * \note           Same as \c mbedtls_x509_crt_verify(), but with explicit
  *                 security profile.
@@ -434,22 +632,28 @@ int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt,
  *                 for ECDSA) apply to all certificates: trusted root,
  *                 intermediate CAs if any, and end entity certificate.
  *
- * \param crt      a certificate (chain) to be verified
- * \param trust_ca the list of trusted CAs
- * \param ca_crl   the list of CRLs for trusted CAs
- * \param profile  security profile for verification
- * \param cn       expected Common Name (can be set to
- *                 NULL if the CN must not be verified)
- * \param flags    result of the verification
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
- *
- * \return         0 if successful or MBEDTLS_ERR_X509_CERT_VERIFY_FAILED
- *                 in which case *flags will have one or more
- *                 MBEDTLS_X509_BADCERT_XXX or MBEDTLS_X509_BADCRL_XXX flags
- *                 set,
- *                 or another error in case of a fatal error encountered
- *                 during the verification process.
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param profile  The security profile to use for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         \c 0 if the chain is valid with respect to the
+ *                 passed CN, CAs, CRLs and security profile.
+ * \return         #MBEDTLS_ERR_X509_CERT_VERIFY_FAILED in case the
+ *                 certificate chain verification failed. In this case,
+ *                 \c *flags will have one or more
+ *                 \c MBEDTLS_X509_BADCERT_XXX or \c MBEDTLS_X509_BADCRL_XXX
+ *                 flags set.
+ * \return         Another negative error code in case of a fatal error
+ *                 encountered during the verification process.
  */
 int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt,
                      mbedtls_x509_crt *trust_ca,
@@ -466,16 +670,20 @@ int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt,
  *                 but can return early and restart according to the limit
  *                 set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
  *
- * \param crt      a certificate (chain) to be verified
- * \param trust_ca the list of trusted CAs
- * \param ca_crl   the list of CRLs for trusted CAs
- * \param profile  security profile for verification
- * \param cn       expected Common Name (can be set to
- *                 NULL if the CN must not be verified)
- * \param flags    result of the verification
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
- * \param rs_ctx   restart context (NULL to disable restart)
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param profile  The security profile to use for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ * \param rs_ctx   The restart context to use. This may be set to \c NULL
+ *                 to disable restartable ECC.
  *
  * \return         See \c mbedtls_crt_verify_with_profile(), or
  * \return         #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
@@ -490,6 +698,73 @@ int mbedtls_x509_crt_verify_restartable( mbedtls_x509_crt *crt,
                      void *p_vrfy,
                      mbedtls_x509_crt_restart_ctx *rs_ctx );
 
+/**
+ * \brief               The type of trusted certificate callbacks.
+ *
+ *                      Callbacks of this type are passed to and used by the CRT
+ *                      verification routine mbedtls_x509_crt_verify_with_ca_cb()
+ *                      when looking for trusted signers of a given certificate.
+ *
+ *                      On success, the callback returns a list of trusted
+ *                      certificates to be considered as potential signers
+ *                      for the input certificate.
+ *
+ * \param p_ctx         An opaque context passed to the callback.
+ * \param child         The certificate for which to search a potential signer.
+ *                      This will point to a readable certificate.
+ * \param candidate_cas The address at which to store the address of the first
+ *                      entry in the generated linked list of candidate signers.
+ *                      This will not be \c NULL.
+ *
+ * \note                The callback must only return a non-zero value on a
+ *                      fatal error. If, in contrast, the search for a potential
+ *                      signer completes without a single candidate, the
+ *                      callback must return \c 0 and set \c *candidate_cas
+ *                      to \c NULL.
+ *
+ * \return              \c 0 on success. In this case, \c *candidate_cas points
+ *                      to a heap-allocated linked list of instances of
+ *                      ::mbedtls_x509_crt, and ownership of this list is passed
+ *                      to the caller.
+ * \return              A negative error code on failure.
+ */
+typedef int (*mbedtls_x509_crt_ca_cb_t)( void *p_ctx,
+                                         mbedtls_x509_crt const *child,
+                                         mbedtls_x509_crt **candidate_cas );
+
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+/**
+ * \brief          Version of \c mbedtls_x509_crt_verify_with_profile() which
+ *                 uses a callback to acquire the list of trusted CA
+ *                 certificates.
+ *
+ * \param crt      The certificate chain to be verified.
+ * \param f_ca_cb  The callback to be used to query for potential signers
+ *                 of a given child certificate. See the documentation of
+ *                 ::mbedtls_x509_crt_ca_cb_t for more information.
+ * \param p_ca_cb  The opaque context to be passed to \p f_ca_cb.
+ * \param profile  The security profile for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         See \c mbedtls_crt_verify_with_profile().
+ */
+int mbedtls_x509_crt_verify_with_ca_cb( mbedtls_x509_crt *crt,
+                     mbedtls_x509_crt_ca_cb_t f_ca_cb,
+                     void *p_ca_cb,
+                     const mbedtls_x509_crt_profile *profile,
+                     const char *cn, uint32_t *flags,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy );
+
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
+
 #if defined(MBEDTLS_X509_CHECK_KEY_USAGE)
 /**
  * \brief          Check usage of certificate against keyUsage extension.
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h
index 5dfb4213e8d..b1dfc21f1fb 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_CSR_H
 #define MBEDTLS_X509_CSR_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "x509.h"
+#include "mbedtls/x509.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/xtea.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/xtea.h
index cd6d3753d13..4bdc711fda0 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/xtea.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/xtea.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_XTEA_H
 #define MBEDTLS_XTEA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -61,10 +34,12 @@
 #define MBEDTLS_XTEA_ENCRYPT     1
 #define MBEDTLS_XTEA_DECRYPT     0
 
-#define MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH             -0x0028  /**< The data input has an invalid length. */
+/** The data input has an invalid length. */
+#define MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH             -0x0028
 
 /* MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED                  -0x0029  /**< XTEA hardware accelerator failed. */
+/** XTEA hardware accelerator failed. */
+#define MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED                  -0x0029
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto.h
new file mode 100644
index 00000000000..b0b57c3a6ba
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto.h
@@ -0,0 +1,3956 @@
+/**
+ * \file psa/crypto.h
+ * \brief Platform Security Architecture cryptography module
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_H
+#define PSA_CRYPTO_H
+
+#include "crypto_platform.h"
+
+#include <stddef.h>
+
+#ifdef __DOXYGEN_ONLY__
+/* This __DOXYGEN_ONLY__ block contains mock definitions for things that
+ * must be defined in the crypto_platform.h header. These mock definitions
+ * are present in this file as a convenience to generate pretty-printed
+ * documentation that includes those definitions. */
+
+/** \defgroup platform Implementation-specific definitions
+ * @{
+ */
+
+/**@}*/
+#endif /* __DOXYGEN_ONLY__ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* The file "crypto_types.h" declares types that encode errors,
+ * algorithms, key types, policies, etc. */
+#include "crypto_types.h"
+
+/** \defgroup version API version
+ * @{
+ */
+
+/**
+ * The major version of this implementation of the PSA Crypto API
+ */
+#define PSA_CRYPTO_API_VERSION_MAJOR 1
+
+/**
+ * The minor version of this implementation of the PSA Crypto API
+ */
+#define PSA_CRYPTO_API_VERSION_MINOR 0
+
+/**@}*/
+
+/* The file "crypto_values.h" declares macros to build and analyze values
+ * of integral types defined in "crypto_types.h". */
+#include "crypto_values.h"
+
+/** \defgroup initialization Library initialization
+ * @{
+ */
+
+/**
+ * \brief Library initialization.
+ *
+ * Applications must call this function before calling any other
+ * function in this module.
+ *
+ * Applications may call this function more than once. Once a call
+ * succeeds, subsequent calls are guaranteed to succeed.
+ *
+ * If the application calls other functions before calling psa_crypto_init(),
+ * the behavior is undefined. Implementations are encouraged to either perform
+ * the operation as if the library had been initialized or to return
+ * #PSA_ERROR_BAD_STATE or some other applicable error. In particular,
+ * implementations should not return a success status if the lack of
+ * initialization may have security implications, for example due to improper
+ * seeding of the random number generator.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ */
+psa_status_t psa_crypto_init(void);
+
+/**@}*/
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** \def PSA_KEY_ATTRIBUTES_INIT
+ *
+ * This macro returns a suitable initializer for a key attribute structure
+ * of type #psa_key_attributes_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_KEY_ATTRIBUTES_INIT {0}
+#endif
+
+/** Return an initial value for a key attributes structure.
+ */
+static psa_key_attributes_t psa_key_attributes_init(void);
+
+/** Declare a key as persistent and set its key identifier.
+ *
+ * If the attribute structure currently declares the key as volatile (which
+ * is the default content of an attribute structure), this function sets
+ * the lifetime attribute to #PSA_KEY_LIFETIME_PERSISTENT.
+ *
+ * This function does not access storage, it merely stores the given
+ * value in the structure.
+ * The persistent key will be written to storage when the attribute
+ * structure is passed to a key creation function such as
+ * psa_import_key(), psa_generate_key(),
+ * psa_key_derivation_output_key() or psa_copy_key().
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes  The attribute structure to write to.
+ * \param key              The persistent identifier for the key.
+ */
+static void psa_set_key_id( psa_key_attributes_t *attributes,
+                            mbedtls_svc_key_id_t key );
+
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+/** Set the owner identifier of a key.
+ *
+ * When key identifiers encode key owner identifiers, psa_set_key_id() does
+ * not allow to define in key attributes the owner of volatile keys as
+ * psa_set_key_id() enforces the key to be persistent.
+ *
+ * This function allows to set in key attributes the owner identifier of a
+ * key. It is intended to be used for volatile keys. For persistent keys,
+ * it is recommended to use the PSA Cryptography API psa_set_key_id() to define
+ * the owner of a key.
+ *
+ * \param[out] attributes  The attribute structure to write to.
+ * \param owner            The key owner identifier.
+ */
+static void mbedtls_set_key_owner_id( psa_key_attributes_t *attributes,
+                                      mbedtls_key_owner_id_t owner );
+#endif
+
+/** Set the location of a persistent key.
+ *
+ * To make a key persistent, you must give it a persistent key identifier
+ * with psa_set_key_id(). By default, a key that has a persistent identifier
+ * is stored in the default storage area identifier by
+ * #PSA_KEY_LIFETIME_PERSISTENT. Call this function to choose a storage
+ * area, or to explicitly declare the key as volatile.
+ *
+ * This function does not access storage, it merely stores the given
+ * value in the structure.
+ * The persistent key will be written to storage when the attribute
+ * structure is passed to a key creation function such as
+ * psa_import_key(), psa_generate_key(),
+ * psa_key_derivation_output_key() or psa_copy_key().
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param lifetime              The lifetime for the key.
+ *                              If this is #PSA_KEY_LIFETIME_VOLATILE, the
+ *                              key will be volatile, and the key identifier
+ *                              attribute is reset to 0.
+ */
+static void psa_set_key_lifetime(psa_key_attributes_t *attributes,
+                                 psa_key_lifetime_t lifetime);
+
+/** Retrieve the key identifier from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The persistent identifier stored in the attribute structure.
+ *         This value is unspecified if the attribute structure declares
+ *         the key as volatile.
+ */
+static mbedtls_svc_key_id_t psa_get_key_id(
+    const psa_key_attributes_t *attributes);
+
+/** Retrieve the lifetime from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The lifetime value stored in the attribute structure.
+ */
+static psa_key_lifetime_t psa_get_key_lifetime(
+    const psa_key_attributes_t *attributes);
+
+/** Declare usage flags for a key.
+ *
+ * Usage flags are part of a key's usage policy. They encode what
+ * kind of operations are permitted on the key. For more details,
+ * refer to the documentation of the type #psa_key_usage_t.
+ *
+ * This function overwrites any usage flags
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param usage_flags           The usage flags to write.
+ */
+static void psa_set_key_usage_flags(psa_key_attributes_t *attributes,
+                                    psa_key_usage_t usage_flags);
+
+/** Retrieve the usage flags from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The usage flags stored in the attribute structure.
+ */
+static psa_key_usage_t psa_get_key_usage_flags(
+    const psa_key_attributes_t *attributes);
+
+/** Declare the permitted algorithm policy for a key.
+ *
+ * The permitted algorithm policy of a key encodes which algorithm or
+ * algorithms are permitted to be used with this key. The following
+ * algorithm policies are supported:
+ * - 0 does not allow any cryptographic operation with the key. The key
+ *   may be used for non-cryptographic actions such as exporting (if
+ *   permitted by the usage flags).
+ * - An algorithm value permits this particular algorithm.
+ * - An algorithm wildcard built from #PSA_ALG_ANY_HASH allows the specified
+ *   signature scheme with any hash algorithm.
+ * - An algorithm built from #PSA_ALG_AT_LEAST_THIS_LENGTH_MAC allows
+ *   any MAC algorithm from the same base class (e.g. CMAC) which
+ *   generates/verifies a MAC length greater than or equal to the length
+ *   encoded in the wildcard algorithm.
+ * - An algorithm built from #PSA_ALG_AEAD_WITH_AT_LEAST_THIS_LENGTH_TAG
+ *   allows any AEAD algorithm from the same base class (e.g. CCM) which
+ *   generates/verifies a tag length greater than or equal to the length
+ *   encoded in the wildcard algorithm.
+ *
+ * This function overwrites any algorithm policy
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param alg                   The permitted algorithm policy to write.
+ */
+static void psa_set_key_algorithm(psa_key_attributes_t *attributes,
+                                  psa_algorithm_t alg);
+
+
+/** Retrieve the algorithm policy from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The algorithm stored in the attribute structure.
+ */
+static psa_algorithm_t psa_get_key_algorithm(
+    const psa_key_attributes_t *attributes);
+
+/** Declare the type of a key.
+ *
+ * This function overwrites any key type
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param type                  The key type to write.
+ *                              If this is 0, the key type in \p attributes
+ *                              becomes unspecified.
+ */
+static void psa_set_key_type(psa_key_attributes_t *attributes,
+                             psa_key_type_t type);
+
+
+/** Declare the size of a key.
+ *
+ * This function overwrites any key size previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param bits                  The key size in bits.
+ *                              If this is 0, the key size in \p attributes
+ *                              becomes unspecified. Keys of size 0 are
+ *                              not supported.
+ */
+static void psa_set_key_bits(psa_key_attributes_t *attributes,
+                             size_t bits);
+
+/** Retrieve the key type from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The key type stored in the attribute structure.
+ */
+static psa_key_type_t psa_get_key_type(const psa_key_attributes_t *attributes);
+
+/** Retrieve the key size from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The key size stored in the attribute structure, in bits.
+ */
+static size_t psa_get_key_bits(const psa_key_attributes_t *attributes);
+
+/** Retrieve the attributes of a key.
+ *
+ * This function first resets the attribute structure as with
+ * psa_reset_key_attributes(). It then copies the attributes of
+ * the given key into the given attribute structure.
+ *
+ * \note This function may allocate memory or other resources.
+ *       Once you have called this function on an attribute structure,
+ *       you must call psa_reset_key_attributes() to free these resources.
+ *
+ * \param[in] key               Identifier of the key to query.
+ * \param[in,out] attributes    On success, the attributes of the key.
+ *                              On failure, equivalent to a
+ *                              freshly-initialized structure.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_get_key_attributes(mbedtls_svc_key_id_t key,
+                                    psa_key_attributes_t *attributes);
+
+/** Reset a key attribute structure to a freshly initialized state.
+ *
+ * You must initialize the attribute structure as described in the
+ * documentation of the type #psa_key_attributes_t before calling this
+ * function. Once the structure has been initialized, you may call this
+ * function at any time.
+ *
+ * This function frees any auxiliary resources that the structure
+ * may contain.
+ *
+ * \param[in,out] attributes    The attribute structure to reset.
+ */
+void psa_reset_key_attributes(psa_key_attributes_t *attributes);
+
+/**@}*/
+
+/** \defgroup key_management Key management
+ * @{
+ */
+
+/** Remove non-essential copies of key material from memory.
+ *
+ * If the key identifier designates a volatile key, this functions does not do
+ * anything and returns successfully.
+ *
+ * If the key identifier designates a persistent key, then this function will
+ * free all resources associated with the key in volatile memory. The key
+ * data in persistent storage is not affected and the key can still be used.
+ *
+ * \param key Identifier of the key to purge.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key material will have been removed from memory if it is not
+ *         currently required.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not a valid key identifier.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_purge_key(mbedtls_svc_key_id_t key);
+
+/** Make a copy of a key.
+ *
+ * Copy key material from one location to another.
+ *
+ * This function is primarily useful to copy a key from one location
+ * to another, since it populates a key using the material from
+ * another key which may have a different lifetime.
+ *
+ * This function may be used to share a key with a different party,
+ * subject to implementation-defined restrictions on key sharing.
+ *
+ * The policy on the source key must have the usage flag
+ * #PSA_KEY_USAGE_COPY set.
+ * This flag is sufficient to permit the copy if the key has the lifetime
+ * #PSA_KEY_LIFETIME_VOLATILE or #PSA_KEY_LIFETIME_PERSISTENT.
+ * Some secure elements do not provide a way to copy a key without
+ * making it extractable from the secure element. If a key is located
+ * in such a secure element, then the key must have both usage flags
+ * #PSA_KEY_USAGE_COPY and #PSA_KEY_USAGE_EXPORT in order to make
+ * a copy of the key outside the secure element.
+ *
+ * The resulting key may only be used in a way that conforms to
+ * both the policy of the original key and the policy specified in
+ * the \p attributes parameter:
+ * - The usage flags on the resulting key are the bitwise-and of the
+ *   usage flags on the source policy and the usage flags in \p attributes.
+ * - If both allow the same algorithm or wildcard-based
+ *   algorithm policy, the resulting key has the same algorithm policy.
+ * - If either of the policies allows an algorithm and the other policy
+ *   allows a wildcard-based algorithm policy that includes this algorithm,
+ *   the resulting key allows the same algorithm.
+ * - If the policies do not allow any algorithm in common, this function
+ *   fails with the status #PSA_ERROR_INVALID_ARGUMENT.
+ *
+ * The effect of this function on implementation-defined attributes is
+ * implementation-defined.
+ *
+ * \param source_key        The key to copy. It must allow the usage
+ *                          #PSA_KEY_USAGE_COPY. If a private or secret key is
+ *                          being copied outside of a secure element it must
+ *                          also allow #PSA_KEY_USAGE_EXPORT.
+ * \param[in] attributes    The attributes for the new key.
+ *                          They are used as follows:
+ *                          - The key type and size may be 0. If either is
+ *                            nonzero, it must match the corresponding
+ *                            attribute of the source key.
+ *                          - The key location (the lifetime and, for
+ *                            persistent keys, the key identifier) is
+ *                            used directly.
+ *                          - The policy constraints (usage flags and
+ *                            algorithm policy) are combined from
+ *                            the source key and \p attributes so that
+ *                            both sets of restrictions apply, as
+ *                            described in the documentation of this function.
+ * \param[out] target_key   On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p source_key is invalid.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The lifetime or identifier in \p attributes are invalid.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The policy constraints on the source and specified in
+ *         \p attributes are incompatible.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p attributes specifies a key type or key size
+ *         which does not match the attributes of the source key.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The source key does not have the #PSA_KEY_USAGE_COPY usage flag.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The source key is not exportable and its lifetime does not
+ *         allow copying it to the target's lifetime.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_copy_key(mbedtls_svc_key_id_t source_key,
+                          const psa_key_attributes_t *attributes,
+                          mbedtls_svc_key_id_t *target_key);
+
+
+/**
+ * \brief Destroy a key.
+ *
+ * This function destroys a key from both volatile
+ * memory and, if applicable, non-volatile storage. Implementations shall
+ * make a best effort to ensure that that the key material cannot be recovered.
+ *
+ * This function also erases any metadata such as policies and frees
+ * resources associated with the key.
+ *
+ * If a key is currently in use in a multipart operation, then destroying the
+ * key will cause the multipart operation to fail.
+ *
+ * \param key  Identifier of the key to erase. If this is \c 0, do nothing and
+ *             return #PSA_SUCCESS.
+ *
+ * \retval #PSA_SUCCESS
+ *         \p key was a valid identifier and the key material that it
+ *         referred to has been erased. Alternatively, \p key is \c 0.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key cannot be erased because it is
+ *         read-only, either due to a policy or due to physical restrictions.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p key is not a valid identifier nor \c 0.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ *         There was an failure in communication with the cryptoprocessor.
+ *         The key material may still be present in the cryptoprocessor.
+ * \retval #PSA_ERROR_DATA_INVALID
+ *         This error is typically a result of either storage corruption on a
+ *         cleartext storage backend, or an attempt to read data that was
+ *         written by an incompatible version of the library.
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The storage is corrupted. Implementations shall make a best effort
+ *         to erase key material even in this stage, however applications
+ *         should be aware that it may be impossible to guarantee that the
+ *         key material is not recoverable in such cases.
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ *         An unexpected condition which is not a storage corruption or
+ *         a communication failure occurred. The cryptoprocessor may have
+ *         been compromised.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_destroy_key(mbedtls_svc_key_id_t key);
+
+/**@}*/
+
+/** \defgroup import_export Key import and export
+ * @{
+ */
+
+/**
+ * \brief Import a key in binary format.
+ *
+ * This function supports any output from psa_export_key(). Refer to the
+ * documentation of psa_export_public_key() for the format of public keys
+ * and to the documentation of psa_export_key() for the format for
+ * other key types.
+ *
+ * The key data determines the key size. The attributes may optionally
+ * specify a key size; in this case it must match the size determined
+ * from the key data. A key size of 0 in \p attributes indicates that
+ * the key size is solely determined by the key data.
+ *
+ * Implementations must reject an attempt to import a key of size 0.
+ *
+ * This specification supports a single format for each key type.
+ * Implementations may support other formats as long as the standard
+ * format is supported. Implementations that support other formats
+ * should ensure that the formats are clearly unambiguous so as to
+ * minimize the risk that an invalid input is accidentally interpreted
+ * according to a different format.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ *                          The key size is always determined from the
+ *                          \p data buffer.
+ *                          If the key size in \p attributes is nonzero,
+ *                          it must be equal to the size from \p data.
+ * \param[out] key          On success, an identifier to the newly created key.
+ *                          For persistent keys, this is the key identifier
+ *                          defined in \p attributes.
+ *                          \c 0 on failure.
+ * \param[in] data    Buffer containing the key data. The content of this
+ *                    buffer is interpreted according to the type declared
+ *                    in \p attributes.
+ *                    All implementations must support at least the format
+ *                    described in the documentation
+ *                    of psa_export_key() or psa_export_public_key() for
+ *                    the chosen type. Implementations may allow other
+ *                    formats, but should be conservative: implementations
+ *                    should err on the side of rejecting content if it
+ *                    may be erroneous (e.g. wrong type or truncated data).
+ * \param data_length Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The key type or key size is not supported, either by the
+ *         implementation in general or in this particular persistent location.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key attributes, as a whole, are invalid.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key data is not correctly formatted.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size in \p attributes is nonzero and does not match the size
+ *         of the key data.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_import_key(const psa_key_attributes_t *attributes,
+                            const uint8_t *data,
+                            size_t data_length,
+                            mbedtls_svc_key_id_t *key);
+
+
+
+/**
+ * \brief Export a key in binary format.
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an equivalent object.
+ *
+ * If the implementation of psa_import_key() supports other formats
+ * beyond the format specified here, the output from psa_export_key()
+ * must use the representation specified here, not the original
+ * representation.
+ *
+ * For standard key types, the output format is as follows:
+ *
+ * - For symmetric keys (including MAC keys), the format is the
+ *   raw bytes of the key.
+ * - For DES, the key data consists of 8 bytes. The parity bits must be
+ *   correct.
+ * - For Triple-DES, the format is the concatenation of the
+ *   two or three DES keys.
+ * - For RSA key pairs (#PSA_KEY_TYPE_RSA_KEY_PAIR), the format
+ *   is the non-encrypted DER encoding of the representation defined by
+ *   PKCS\#1 (RFC 8017) as `RSAPrivateKey`, version 0.
+ *   ```
+ *   RSAPrivateKey ::= SEQUENCE {
+ *       version             INTEGER,  -- must be 0
+ *       modulus             INTEGER,  -- n
+ *       publicExponent      INTEGER,  -- e
+ *       privateExponent     INTEGER,  -- d
+ *       prime1              INTEGER,  -- p
+ *       prime2              INTEGER,  -- q
+ *       exponent1           INTEGER,  -- d mod (p-1)
+ *       exponent2           INTEGER,  -- d mod (q-1)
+ *       coefficient         INTEGER,  -- (inverse of q) mod p
+ *   }
+ *   ```
+ * - For elliptic curve key pairs (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_KEY_PAIR is true), the format is
+ *   a representation of the private value as a `ceiling(m/8)`-byte string
+ *   where `m` is the bit size associated with the curve, i.e. the bit size
+ *   of the order of the curve's coordinate field. This byte string is
+ *   in little-endian order for Montgomery curves (curve types
+ *   `PSA_ECC_FAMILY_CURVEXXX`), and in big-endian order for Weierstrass
+ *   curves (curve types `PSA_ECC_FAMILY_SECTXXX`, `PSA_ECC_FAMILY_SECPXXX`
+ *   and `PSA_ECC_FAMILY_BRAINPOOL_PXXX`).
+ *   For Weierstrass curves, this is the content of the `privateKey` field of
+ *   the `ECPrivateKey` format defined by RFC 5915.  For Montgomery curves,
+ *   the format is defined by RFC 7748, and output is masked according to §5.
+ *   For twisted Edwards curves, the private key is as defined by RFC 8032
+ *   (a 32-byte string for Edwards25519, a 57-byte string for Edwards448).
+ * - For Diffie-Hellman key exchange key pairs (key types for which
+ *   #PSA_KEY_TYPE_IS_DH_KEY_PAIR is true), the
+ *   format is the representation of the private key `x` as a big-endian byte
+ *   string. The length of the byte string is the private key size in bytes
+ *   (leading zeroes are not stripped).
+ * - For public keys (key types for which #PSA_KEY_TYPE_IS_PUBLIC_KEY is
+ *   true), the format is the same as for psa_export_public_key().
+ *
+ * The policy on the key must have the usage flag #PSA_KEY_USAGE_EXPORT set.
+ *
+ * \param key               Identifier of the key to export. It must allow the
+ *                          usage #PSA_KEY_USAGE_EXPORT, unless it is a public
+ *                          key.
+ * \param[out] data         Buffer where the key data is to be written.
+ * \param data_size         Size of the \p data buffer in bytes.
+ * \param[out] data_length  On success, the number of bytes
+ *                          that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_EXPORT flag.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p data buffer is too small. You can determine a
+ *         sufficient buffer size by calling
+ *         #PSA_EXPORT_KEY_OUTPUT_SIZE(\c type, \c bits)
+ *         where \c type is the key type
+ *         and \c bits is the key size in bits.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_export_key(mbedtls_svc_key_id_t key,
+                            uint8_t *data,
+                            size_t data_size,
+                            size_t *data_length);
+
+/**
+ * \brief Export a public key or the public part of a key pair in binary format.
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an object that is equivalent to the public key.
+ *
+ * This specification supports a single format for each key type.
+ * Implementations may support other formats as long as the standard
+ * format is supported. Implementations that support other formats
+ * should ensure that the formats are clearly unambiguous so as to
+ * minimize the risk that an invalid input is accidentally interpreted
+ * according to a different format.
+ *
+ * For standard key types, the output format is as follows:
+ * - For RSA public keys (#PSA_KEY_TYPE_RSA_PUBLIC_KEY), the DER encoding of
+ *   the representation defined by RFC 3279 &sect;2.3.1 as `RSAPublicKey`.
+ *   ```
+ *   RSAPublicKey ::= SEQUENCE {
+ *      modulus            INTEGER,    -- n
+ *      publicExponent     INTEGER  }  -- e
+ *   ```
+ * - For elliptic curve keys on a twisted Edwards curve (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY is true and #PSA_KEY_TYPE_ECC_GET_FAMILY
+ *   returns #PSA_ECC_FAMILY_TWISTED_EDWARDS), the public key is as defined
+ *   by RFC 8032
+ *   (a 32-byte string for Edwards25519, a 57-byte string for Edwards448).
+ * - For other elliptic curve public keys (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY is true), the format is the uncompressed
+ *   representation defined by SEC1 &sect;2.3.3 as the content of an ECPoint.
+ *   Let `m` be the bit size associated with the curve, i.e. the bit size of
+ *   `q` for a curve over `F_q`. The representation consists of:
+ *      - The byte 0x04;
+ *      - `x_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - `y_P` as a `ceiling(m/8)`-byte string, big-endian.
+ * - For Diffie-Hellman key exchange public keys (key types for which
+ *   #PSA_KEY_TYPE_IS_DH_PUBLIC_KEY is true),
+ *   the format is the representation of the public key `y = g^x mod p` as a
+ *   big-endian byte string. The length of the byte string is the length of the
+ *   base prime `p` in bytes.
+ *
+ * Exporting a public key object or the public part of a key pair is
+ * always permitted, regardless of the key's usage flags.
+ *
+ * \param key               Identifier of the key to export.
+ * \param[out] data         Buffer where the key data is to be written.
+ * \param data_size         Size of the \p data buffer in bytes.
+ * \param[out] data_length  On success, the number of bytes
+ *                          that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key is neither a public key nor a key pair.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p data buffer is too small. You can determine a
+ *         sufficient buffer size by calling
+ *         #PSA_EXPORT_KEY_OUTPUT_SIZE(#PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(\c type), \c bits)
+ *         where \c type is the key type
+ *         and \c bits is the key size in bits.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_export_public_key(mbedtls_svc_key_id_t key,
+                                   uint8_t *data,
+                                   size_t data_size,
+                                   size_t *data_length);
+
+
+
+/**@}*/
+
+/** \defgroup hash Message digests
+ * @{
+ */
+
+/** Calculate the hash (digest) of a message.
+ *
+ * \note To verify the hash of a message against an
+ *       expected value, use psa_hash_compare() instead.
+ *
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ * \param[in] input         Buffer containing the message to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] hash         Buffer where the hash is to be written.
+ * \param hash_size         Size of the \p hash buffer in bytes.
+ * \param[out] hash_length  On success, the number of bytes
+ *                          that make up the hash value. This is always
+ *                          #PSA_HASH_LENGTH(\p alg).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p hash_size is too small
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_compute(psa_algorithm_t alg,
+                              const uint8_t *input,
+                              size_t input_length,
+                              uint8_t *hash,
+                              size_t hash_size,
+                              size_t *hash_length);
+
+/** Calculate the hash (digest) of a message and compare it with a
+ * reference value.
+ *
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ * \param[in] input         Buffer containing the message to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] hash         Buffer containing the expected hash value.
+ * \param hash_length       Size of the \p hash buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected hash is identical to the actual hash of the input.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The hash of the message was calculated successfully, but it
+ *         differs from the expected hash.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p input_length or \p hash_length do not match the hash size for \p alg
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_compare(psa_algorithm_t alg,
+                              const uint8_t *input,
+                              size_t input_length,
+                              const uint8_t *hash,
+                              size_t hash_length);
+
+/** The type of the state data structure for multipart hash operations.
+ *
+ * Before calling any function on a hash operation object, the application must
+ * initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_hash_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_hash_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_HASH_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_hash_operation_t operation = PSA_HASH_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_hash_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_hash_operation_t operation;
+ *   operation = psa_hash_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_hash_operation_s psa_hash_operation_t;
+
+/** \def PSA_HASH_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a hash operation object
+ * of type #psa_hash_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_HASH_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a hash operation object.
+ */
+static psa_hash_operation_t psa_hash_operation_init(void);
+
+/** Set up a multipart hash operation.
+ *
+ * The sequence of operations to calculate a hash (message digest)
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_hash_operation_t, e.g. #PSA_HASH_OPERATION_INIT.
+ * -# Call psa_hash_setup() to specify the algorithm.
+ * -# Call psa_hash_update() zero, one or more times, passing a fragment
+ *    of the message each time. The hash that is calculated is the hash
+ *    of the concatenation of these messages in order.
+ * -# To calculate the hash, call psa_hash_finish().
+ *    To compare the hash with an expected value, call psa_hash_verify().
+ *
+ * If an error occurs at any step after a call to psa_hash_setup(), the
+ * operation will need to be reset by a call to psa_hash_abort(). The
+ * application may call psa_hash_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_hash_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_hash_finish() or psa_hash_verify().
+ * - A call to psa_hash_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_hash_operation_t and not yet in use.
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not a supported hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p alg is not a hash algorithm.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_setup(psa_hash_operation_t *operation,
+                            psa_algorithm_t alg);
+
+/** Add a message fragment to a multipart hash operation.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \param[in,out] operation Active hash operation.
+ * \param[in] input         Buffer containing the message fragment to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it muct be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_update(psa_hash_operation_t *operation,
+                             const uint8_t *input,
+                             size_t input_length);
+
+/** Finish the calculation of the hash of a message.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ * This function calculates the hash of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_hash_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \warning Applications should not call this function if they expect
+ *          a specific value for the hash. Call psa_hash_verify() instead.
+ *          Beware that comparing integrity or authenticity data such as
+ *          hash values with a function such as \c memcmp is risky
+ *          because the time taken by the comparison may leak information
+ *          about the hashed data which could allow an attacker to guess
+ *          a valid hash and thereby bypass security controls.
+ *
+ * \param[in,out] operation     Active hash operation.
+ * \param[out] hash             Buffer where the hash is to be written.
+ * \param hash_size             Size of the \p hash buffer in bytes.
+ * \param[out] hash_length      On success, the number of bytes
+ *                              that make up the hash value. This is always
+ *                              #PSA_HASH_LENGTH(\c alg) where \c alg is the
+ *                              hash algorithm that is calculated.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p hash buffer is too small. You can determine a
+ *         sufficient buffer size by calling #PSA_HASH_LENGTH(\c alg)
+ *         where \c alg is the hash algorithm that is calculated.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_finish(psa_hash_operation_t *operation,
+                             uint8_t *hash,
+                             size_t hash_size,
+                             size_t *hash_length);
+
+/** Finish the calculation of the hash of a message and compare it with
+ * an expected value.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ * This function calculates the hash of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_hash_update(). It then
+ * compares the calculated hash with the expected hash passed as a
+ * parameter to this function.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual hash and the expected hash is performed
+ * in constant time.
+ *
+ * \param[in,out] operation     Active hash operation.
+ * \param[in] hash              Buffer containing the expected hash value.
+ * \param hash_length           Size of the \p hash buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected hash is identical to the actual hash of the message.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The hash of the message was calculated successfully, but it
+ *         differs from the expected hash.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_verify(psa_hash_operation_t *operation,
+                             const uint8_t *hash,
+                             size_t hash_length);
+
+/** Abort a hash operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_hash_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized by one of the methods described in #psa_hash_operation_t.
+ *
+ * In particular, calling psa_hash_abort() after the operation has been
+ * terminated by a call to psa_hash_abort(), psa_hash_finish() or
+ * psa_hash_verify() is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized hash operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_abort(psa_hash_operation_t *operation);
+
+/** Clone a hash operation.
+ *
+ * This function copies the state of an ongoing hash operation to
+ * a new operation object. In other words, this function is equivalent
+ * to calling psa_hash_setup() on \p target_operation with the same
+ * algorithm that \p source_operation was set up for, then
+ * psa_hash_update() on \p target_operation with the same input that
+ * that was passed to \p source_operation. After this function returns, the
+ * two objects are independent, i.e. subsequent calls involving one of
+ * the objects do not affect the other object.
+ *
+ * \param[in] source_operation      The active hash operation to clone.
+ * \param[in,out] target_operation  The operation object to set up.
+ *                                  It must be initialized but not active.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The \p source_operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The \p target_operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_clone(const psa_hash_operation_t *source_operation,
+                            psa_hash_operation_t *target_operation);
+
+/**@}*/
+
+/** \defgroup MAC Message authentication codes
+ * @{
+ */
+
+/** Calculate the MAC (message authentication code) of a message.
+ *
+ * \note To verify the MAC of a message against an
+ *       expected value, use psa_mac_verify() instead.
+ *       Beware that comparing integrity or authenticity data such as
+ *       MAC values with a function such as \c memcmp is risky
+ *       because the time taken by the comparison may leak information
+ *       about the MAC value which could allow an attacker to guess
+ *       a valid MAC and thereby bypass security controls.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must allow the usage PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ * \param[in] input         Buffer containing the input message.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] mac          Buffer where the MAC value is to be written.
+ * \param mac_size          Size of the \p mac buffer in bytes.
+ * \param[out] mac_length   On success, the number of bytes
+ *                          that make up the MAC value.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p mac_size is too small
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_compute(mbedtls_svc_key_id_t key,
+                             psa_algorithm_t alg,
+                             const uint8_t *input,
+                             size_t input_length,
+                             uint8_t *mac,
+                             size_t mac_size,
+                             size_t *mac_length);
+
+/** Calculate the MAC of a message and compare it with a reference value.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must allow the usage PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ * \param[in] input         Buffer containing the input message.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] mac          Buffer containing the expected MAC value.
+ * \param mac_length        Size of the \p mac buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected MAC is identical to the actual MAC of the input.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The MAC of the message was calculated successfully, but it
+ *         differs from the expected value.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify(mbedtls_svc_key_id_t key,
+                            psa_algorithm_t alg,
+                            const uint8_t *input,
+                            size_t input_length,
+                            const uint8_t *mac,
+                            size_t mac_length);
+
+/** The type of the state data structure for multipart MAC operations.
+ *
+ * Before calling any function on a MAC operation object, the application must
+ * initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_mac_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_mac_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_MAC_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_mac_operation_t operation = PSA_MAC_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_mac_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_mac_operation_t operation;
+ *   operation = psa_mac_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_mac_operation_s psa_mac_operation_t;
+
+/** \def PSA_MAC_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a MAC operation object of type
+ * #psa_mac_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_MAC_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a MAC operation object.
+ */
+static psa_mac_operation_t psa_mac_operation_init(void);
+
+/** Set up a multipart MAC calculation operation.
+ *
+ * This function sets up the calculation of the MAC
+ * (message authentication code) of a byte string.
+ * To verify the MAC of a message against an
+ * expected value, use psa_mac_verify_setup() instead.
+ *
+ * The sequence of operations to calculate a MAC is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_mac_operation_t, e.g. #PSA_MAC_OPERATION_INIT.
+ * -# Call psa_mac_sign_setup() to specify the algorithm and key.
+ * -# Call psa_mac_update() zero, one or more times, passing a fragment
+ *    of the message each time. The MAC that is calculated is the MAC
+ *    of the concatenation of these messages in order.
+ * -# At the end of the message, call psa_mac_sign_finish() to finish
+ *    calculating the MAC value and retrieve it.
+ *
+ * If an error occurs at any step after a call to psa_mac_sign_setup(), the
+ * operation will need to be reset by a call to psa_mac_abort(). The
+ * application may call psa_mac_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_mac_sign_setup(), the application must
+ * eventually terminate the operation through one of the following methods:
+ * - A successful call to psa_mac_sign_finish().
+ * - A call to psa_mac_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_mac_operation_t and not yet in use.
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must remain valid until the operation terminates.
+ *                          It must allow the usage PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_sign_setup(psa_mac_operation_t *operation,
+                                mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg);
+
+/** Set up a multipart MAC verification operation.
+ *
+ * This function sets up the verification of the MAC
+ * (message authentication code) of a byte string against an expected value.
+ *
+ * The sequence of operations to verify a MAC is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_mac_operation_t, e.g. #PSA_MAC_OPERATION_INIT.
+ * -# Call psa_mac_verify_setup() to specify the algorithm and key.
+ * -# Call psa_mac_update() zero, one or more times, passing a fragment
+ *    of the message each time. The MAC that is calculated is the MAC
+ *    of the concatenation of these messages in order.
+ * -# At the end of the message, call psa_mac_verify_finish() to finish
+ *    calculating the actual MAC of the message and verify it against
+ *    the expected value.
+ *
+ * If an error occurs at any step after a call to psa_mac_verify_setup(), the
+ * operation will need to be reset by a call to psa_mac_abort(). The
+ * application may call psa_mac_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_mac_verify_setup(), the application must
+ * eventually terminate the operation through one of the following methods:
+ * - A successful call to psa_mac_verify_finish().
+ * - A call to psa_mac_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_mac_operation_t and not yet in use.
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must remain valid until the operation terminates.
+ *                          It must allow the usage
+ *                          PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c key is not compatible with \c alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify_setup(psa_mac_operation_t *operation,
+                                  mbedtls_svc_key_id_t key,
+                                  psa_algorithm_t alg);
+
+/** Add a message fragment to a multipart MAC operation.
+ *
+ * The application must call psa_mac_sign_setup() or psa_mac_verify_setup()
+ * before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[in] input         Buffer containing the message fragment to add to
+ *                          the MAC calculation.
+ * \param input_length      Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_update(psa_mac_operation_t *operation,
+                            const uint8_t *input,
+                            size_t input_length);
+
+/** Finish the calculation of the MAC of a message.
+ *
+ * The application must call psa_mac_sign_setup() before calling this function.
+ * This function calculates the MAC of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_mac_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \warning Applications should not call this function if they expect
+ *          a specific value for the MAC. Call psa_mac_verify_finish() instead.
+ *          Beware that comparing integrity or authenticity data such as
+ *          MAC values with a function such as \c memcmp is risky
+ *          because the time taken by the comparison may leak information
+ *          about the MAC value which could allow an attacker to guess
+ *          a valid MAC and thereby bypass security controls.
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[out] mac          Buffer where the MAC value is to be written.
+ * \param mac_size          Size of the \p mac buffer in bytes.
+ * \param[out] mac_length   On success, the number of bytes
+ *                          that make up the MAC value. This is always
+ *                          #PSA_MAC_LENGTH(\c key_type, \c key_bits, \c alg)
+ *                          where \c key_type and \c key_bits are the type and
+ *                          bit-size respectively of the key and \c alg is the
+ *                          MAC algorithm that is calculated.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active mac sign
+ *         operation).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p mac buffer is too small. You can determine a
+ *         sufficient buffer size by calling PSA_MAC_LENGTH().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_sign_finish(psa_mac_operation_t *operation,
+                                 uint8_t *mac,
+                                 size_t mac_size,
+                                 size_t *mac_length);
+
+/** Finish the calculation of the MAC of a message and compare it with
+ * an expected value.
+ *
+ * The application must call psa_mac_verify_setup() before calling this function.
+ * This function calculates the MAC of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_mac_update(). It then
+ * compares the calculated MAC with the expected MAC passed as a
+ * parameter to this function.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual MAC and the expected MAC is performed
+ * in constant time.
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[in] mac           Buffer containing the expected MAC value.
+ * \param mac_length        Size of the \p mac buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected MAC is identical to the actual MAC of the message.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The MAC of the message was calculated successfully, but it
+ *         differs from the expected MAC.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active mac verify
+ *         operation).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify_finish(psa_mac_operation_t *operation,
+                                   const uint8_t *mac,
+                                   size_t mac_length);
+
+/** Abort a MAC operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_mac_sign_setup() or psa_mac_verify_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized by one of the methods described in #psa_mac_operation_t.
+ *
+ * In particular, calling psa_mac_abort() after the operation has been
+ * terminated by a call to psa_mac_abort(), psa_mac_sign_finish() or
+ * psa_mac_verify_finish() is safe and has no effect.
+ *
+ * \param[in,out] operation Initialized MAC operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_abort(psa_mac_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup cipher Symmetric ciphers
+ * @{
+ */
+
+/** Encrypt a message using a symmetric cipher.
+ *
+ * This function encrypts a message with a random IV (initialization
+ * vector). Use the multipart operation interface with a
+ * #psa_cipher_operation_t object to provide other forms of IV.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must allow the usage #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param[in] input             Buffer containing the message to encrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ *                              The output contains the IV followed by
+ *                              the ciphertext proper.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_encrypt(mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg,
+                                const uint8_t *input,
+                                size_t input_length,
+                                uint8_t *output,
+                                size_t output_size,
+                                size_t *output_length);
+
+/** Decrypt a message using a symmetric cipher.
+ *
+ * This function decrypts a message encrypted with a symmetric cipher.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param[in] input             Buffer containing the message to decrypt.
+ *                              This consists of the IV followed by the
+ *                              ciphertext proper.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the plaintext is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_decrypt(mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg,
+                                const uint8_t *input,
+                                size_t input_length,
+                                uint8_t *output,
+                                size_t output_size,
+                                size_t *output_length);
+
+/** The type of the state data structure for multipart cipher operations.
+ *
+ * Before calling any function on a cipher operation object, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_cipher_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_cipher_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_CIPHER_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_cipher_operation_t operation = PSA_CIPHER_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_cipher_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_cipher_operation_t operation;
+ *   operation = psa_cipher_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_cipher_operation_s psa_cipher_operation_t;
+
+/** \def PSA_CIPHER_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a cipher operation object of
+ * type #psa_cipher_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_CIPHER_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a cipher operation object.
+ */
+static psa_cipher_operation_t psa_cipher_operation_init(void);
+
+/** Set the key for a multipart symmetric encryption operation.
+ *
+ * The sequence of operations to encrypt a message with a symmetric cipher
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_cipher_operation_t, e.g.
+ *    #PSA_CIPHER_OPERATION_INIT.
+ * -# Call psa_cipher_encrypt_setup() to specify the algorithm and key.
+ * -# Call either psa_cipher_generate_iv() or psa_cipher_set_iv() to
+ *    generate or set the IV (initialization vector). You should use
+ *    psa_cipher_generate_iv() unless the protocol you are implementing
+ *    requires a specific IV value.
+ * -# Call psa_cipher_update() zero, one or more times, passing a fragment
+ *    of the message each time.
+ * -# Call psa_cipher_finish().
+ *
+ * If an error occurs at any step after a call to psa_cipher_encrypt_setup(),
+ * the operation will need to be reset by a call to psa_cipher_abort(). The
+ * application may call psa_cipher_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_cipher_encrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_cipher_finish().
+ * - A call to psa_cipher_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_cipher_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_encrypt_setup(psa_cipher_operation_t *operation,
+                                      mbedtls_svc_key_id_t key,
+                                      psa_algorithm_t alg);
+
+/** Set the key for a multipart symmetric decryption operation.
+ *
+ * The sequence of operations to decrypt a message with a symmetric cipher
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_cipher_operation_t, e.g.
+ *    #PSA_CIPHER_OPERATION_INIT.
+ * -# Call psa_cipher_decrypt_setup() to specify the algorithm and key.
+ * -# Call psa_cipher_set_iv() with the IV (initialization vector) for the
+ *    decryption. If the IV is prepended to the ciphertext, you can call
+ *    psa_cipher_update() on a buffer containing the IV followed by the
+ *    beginning of the message.
+ * -# Call psa_cipher_update() zero, one or more times, passing a fragment
+ *    of the message each time.
+ * -# Call psa_cipher_finish().
+ *
+ * If an error occurs at any step after a call to psa_cipher_decrypt_setup(),
+ * the operation will need to be reset by a call to psa_cipher_abort(). The
+ * application may call psa_cipher_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_cipher_decrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_cipher_finish().
+ * - A call to psa_cipher_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_cipher_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_decrypt_setup(psa_cipher_operation_t *operation,
+                                      mbedtls_svc_key_id_t key,
+                                      psa_algorithm_t alg);
+
+/** Generate an IV for a symmetric encryption operation.
+ *
+ * This function generates a random IV (initialization vector), nonce
+ * or initial counter value for the encryption operation as appropriate
+ * for the chosen algorithm, key type and key size.
+ *
+ * The application must call psa_cipher_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[out] iv               Buffer where the generated IV is to be written.
+ * \param iv_size               Size of the \p iv buffer in bytes.
+ * \param[out] iv_length        On success, the number of bytes of the
+ *                              generated IV.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with no IV set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p iv buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_generate_iv(psa_cipher_operation_t *operation,
+                                    uint8_t *iv,
+                                    size_t iv_size,
+                                    size_t *iv_length);
+
+/** Set the IV for a symmetric encryption or decryption operation.
+ *
+ * This function sets the IV (initialization vector), nonce
+ * or initial counter value for the encryption or decryption operation.
+ *
+ * The application must call psa_cipher_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \note When encrypting, applications should use psa_cipher_generate_iv()
+ * instead of this function, unless implementing a protocol that requires
+ * a non-random IV.
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[in] iv                Buffer containing the IV to use.
+ * \param iv_length             Size of the IV in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active cipher
+ *         encrypt operation, with no IV set).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size of \p iv is not acceptable for the chosen algorithm,
+ *         or the chosen algorithm does not use an IV.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_set_iv(psa_cipher_operation_t *operation,
+                               const uint8_t *iv,
+                               size_t iv_length);
+
+/** Encrypt or decrypt a message fragment in an active cipher operation.
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_cipher_encrypt_setup() or psa_cipher_decrypt_setup().
+ *    The choice of setup function determines whether this function
+ *    encrypts or decrypts its input.
+ * 2. If the algorithm requires an IV, call psa_cipher_generate_iv()
+ *    (recommended when encrypting) or psa_cipher_set_iv().
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[in] input             Buffer containing the message fragment to
+ *                              encrypt or decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with an IV set
+ *         if required for the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_update(psa_cipher_operation_t *operation,
+                               const uint8_t *input,
+                               size_t input_length,
+                               uint8_t *output,
+                               size_t output_size,
+                               size_t *output_length);
+
+/** Finish encrypting or decrypting a message in a cipher operation.
+ *
+ * The application must call psa_cipher_encrypt_setup() or
+ * psa_cipher_decrypt_setup() before calling this function. The choice
+ * of setup function determines whether this function encrypts or
+ * decrypts its input.
+ *
+ * This function finishes the encryption or decryption of the message
+ * formed by concatenating the inputs passed to preceding calls to
+ * psa_cipher_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input size passed to this operation is not valid for
+ *         this particular algorithm. For example, the algorithm is a based
+ *         on block cipher and requires a whole number of blocks, but the
+ *         total input size is not a multiple of the block size.
+ * \retval #PSA_ERROR_INVALID_PADDING
+ *         This is a decryption operation for an algorithm that includes
+ *         padding, and the ciphertext does not contain valid padding.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with an IV set
+ *         if required for the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_finish(psa_cipher_operation_t *operation,
+                               uint8_t *output,
+                               size_t output_size,
+                               size_t *output_length);
+
+/** Abort a cipher operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_cipher_encrypt_setup() or psa_cipher_decrypt_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized as described in #psa_cipher_operation_t.
+ *
+ * In particular, calling psa_cipher_abort() after the operation has been
+ * terminated by a call to psa_cipher_abort() or psa_cipher_finish()
+ * is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized cipher operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_abort(psa_cipher_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup aead Authenticated encryption with associated data (AEAD)
+ * @{
+ */
+
+/** Process an authenticated encryption operation.
+ *
+ * \param key                     Identifier of the key to use for the
+ *                                operation. It must allow the usage
+ *                                #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                     The AEAD algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param[in] nonce               Nonce or IV to use.
+ * \param nonce_length            Size of the \p nonce buffer in bytes.
+ * \param[in] additional_data     Additional data that will be authenticated
+ *                                but not encrypted.
+ * \param additional_data_length  Size of \p additional_data in bytes.
+ * \param[in] plaintext           Data that will be authenticated and
+ *                                encrypted.
+ * \param plaintext_length        Size of \p plaintext in bytes.
+ * \param[out] ciphertext         Output buffer for the authenticated and
+ *                                encrypted data. The additional data is not
+ *                                part of this output. For algorithms where the
+ *                                encrypted data and the authentication tag
+ *                                are defined as separate outputs, the
+ *                                authentication tag is appended to the
+ *                                encrypted data.
+ * \param ciphertext_size         Size of the \p ciphertext buffer in bytes.
+ *                                This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\c key_type,
+ *                                  \p alg, \p plaintext_length) where
+ *                                  \c key_type is the type of \p key.
+ *                                - #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p
+ *                                  plaintext_length) evaluates to the maximum
+ *                                  ciphertext size of any supported AEAD
+ *                                  encryption.
+ * \param[out] ciphertext_length  On success, the size of the output
+ *                                in the \p ciphertext buffer.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p ciphertext_size is too small.
+ *         #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\c key_type, \p alg,
+ *         \p plaintext_length) or
+ *         #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p plaintext_length) can be used to
+ *         determine the required buffer size.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_encrypt(mbedtls_svc_key_id_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *nonce,
+                              size_t nonce_length,
+                              const uint8_t *additional_data,
+                              size_t additional_data_length,
+                              const uint8_t *plaintext,
+                              size_t plaintext_length,
+                              uint8_t *ciphertext,
+                              size_t ciphertext_size,
+                              size_t *ciphertext_length);
+
+/** Process an authenticated decryption operation.
+ *
+ * \param key                     Identifier of the key to use for the
+ *                                operation. It must allow the usage
+ *                                #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                     The AEAD algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param[in] nonce               Nonce or IV to use.
+ * \param nonce_length            Size of the \p nonce buffer in bytes.
+ * \param[in] additional_data     Additional data that has been authenticated
+ *                                but not encrypted.
+ * \param additional_data_length  Size of \p additional_data in bytes.
+ * \param[in] ciphertext          Data that has been authenticated and
+ *                                encrypted. For algorithms where the
+ *                                encrypted data and the authentication tag
+ *                                are defined as separate inputs, the buffer
+ *                                must contain the encrypted data followed
+ *                                by the authentication tag.
+ * \param ciphertext_length       Size of \p ciphertext in bytes.
+ * \param[out] plaintext          Output buffer for the decrypted data.
+ * \param plaintext_size          Size of the \p plaintext buffer in bytes.
+ *                                This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\c key_type,
+ *                                  \p alg, \p ciphertext_length) where
+ *                                  \c key_type is the type of \p key.
+ *                                - #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p
+ *                                  ciphertext_length) evaluates to the maximum
+ *                                  plaintext size of any supported AEAD
+ *                                  decryption.
+ * \param[out] plaintext_length   On success, the size of the output
+ *                                in the \p plaintext buffer.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The ciphertext is not authentic.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p plaintext_size is too small.
+ *         #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\c key_type, \p alg,
+ *         \p ciphertext_length) or
+ *         #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p ciphertext_length) can be used
+ *         to determine the required buffer size.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_decrypt(mbedtls_svc_key_id_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *nonce,
+                              size_t nonce_length,
+                              const uint8_t *additional_data,
+                              size_t additional_data_length,
+                              const uint8_t *ciphertext,
+                              size_t ciphertext_length,
+                              uint8_t *plaintext,
+                              size_t plaintext_size,
+                              size_t *plaintext_length);
+
+/** The type of the state data structure for multipart AEAD operations.
+ *
+ * Before calling any function on an AEAD operation object, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_aead_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_aead_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_AEAD_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_aead_operation_t operation = PSA_AEAD_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_aead_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_aead_operation_t operation;
+ *   operation = psa_aead_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_aead_operation_s psa_aead_operation_t;
+
+/** \def PSA_AEAD_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for an AEAD operation object of
+ * type #psa_aead_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_AEAD_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for an AEAD operation object.
+ */
+static psa_aead_operation_t psa_aead_operation_init(void);
+
+/** Set the key for a multipart authenticated encryption operation.
+ *
+ * The sequence of operations to encrypt a message with authentication
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_aead_operation_t, e.g.
+ *    #PSA_AEAD_OPERATION_INIT.
+ * -# Call psa_aead_encrypt_setup() to specify the algorithm and key.
+ * -# If needed, call psa_aead_set_lengths() to specify the length of the
+ *    inputs to the subsequent calls to psa_aead_update_ad() and
+ *    psa_aead_update(). See the documentation of psa_aead_set_lengths()
+ *    for details.
+ * -# Call either psa_aead_generate_nonce() or psa_aead_set_nonce() to
+ *    generate or set the nonce. You should use
+ *    psa_aead_generate_nonce() unless the protocol you are implementing
+ *    requires a specific nonce value.
+ * -# Call psa_aead_update_ad() zero, one or more times, passing a fragment
+ *    of the non-encrypted additional authenticated data each time.
+ * -# Call psa_aead_update() zero, one or more times, passing a fragment
+ *    of the message to encrypt each time.
+ * -# Call psa_aead_finish().
+ *
+ * If an error occurs at any step after a call to psa_aead_encrypt_setup(),
+ * the operation will need to be reset by a call to psa_aead_abort(). The
+ * application may call psa_aead_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_aead_encrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_aead_finish().
+ * - A call to psa_aead_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_aead_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The AEAD algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_encrypt_setup(psa_aead_operation_t *operation,
+                                    mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg);
+
+/** Set the key for a multipart authenticated decryption operation.
+ *
+ * The sequence of operations to decrypt a message with authentication
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_aead_operation_t, e.g.
+ *    #PSA_AEAD_OPERATION_INIT.
+ * -# Call psa_aead_decrypt_setup() to specify the algorithm and key.
+ * -# If needed, call psa_aead_set_lengths() to specify the length of the
+ *    inputs to the subsequent calls to psa_aead_update_ad() and
+ *    psa_aead_update(). See the documentation of psa_aead_set_lengths()
+ *    for details.
+ * -# Call psa_aead_set_nonce() with the nonce for the decryption.
+ * -# Call psa_aead_update_ad() zero, one or more times, passing a fragment
+ *    of the non-encrypted additional authenticated data each time.
+ * -# Call psa_aead_update() zero, one or more times, passing a fragment
+ *    of the ciphertext to decrypt each time.
+ * -# Call psa_aead_verify().
+ *
+ * If an error occurs at any step after a call to psa_aead_decrypt_setup(),
+ * the operation will need to be reset by a call to psa_aead_abort(). The
+ * application may call psa_aead_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_aead_decrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_aead_verify().
+ * - A call to psa_aead_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_aead_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The AEAD algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_decrypt_setup(psa_aead_operation_t *operation,
+                                    mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg);
+
+/** Generate a random nonce for an authenticated encryption operation.
+ *
+ * This function generates a random nonce for the authenticated encryption
+ * operation with an appropriate size for the chosen algorithm, key type
+ * and key size.
+ *
+ * The application must call psa_aead_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] nonce            Buffer where the generated nonce is to be
+ *                              written.
+ * \param nonce_size            Size of the \p nonce buffer in bytes.
+ * \param[out] nonce_length     On success, the number of bytes of the
+ *                              generated nonce.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active aead encrypt
+ *         operation, with no nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p nonce buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_generate_nonce(psa_aead_operation_t *operation,
+                                     uint8_t *nonce,
+                                     size_t nonce_size,
+                                     size_t *nonce_length);
+
+/** Set the nonce for an authenticated encryption or decryption operation.
+ *
+ * This function sets the nonce for the authenticated
+ * encryption or decryption operation.
+ *
+ * The application must call psa_aead_encrypt_setup() or
+ * psa_aead_decrypt_setup() before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \note When encrypting, applications should use psa_aead_generate_nonce()
+ * instead of this function, unless implementing a protocol that requires
+ * a non-random IV.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] nonce             Buffer containing the nonce to use.
+ * \param nonce_length          Size of the nonce in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with no nonce
+ *         set).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size of \p nonce is not acceptable for the chosen algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_set_nonce(psa_aead_operation_t *operation,
+                                const uint8_t *nonce,
+                                size_t nonce_length);
+
+/** Declare the lengths of the message and additional data for AEAD.
+ *
+ * The application must call this function before calling
+ * psa_aead_update_ad() or psa_aead_update() if the algorithm for
+ * the operation requires it. If the algorithm does not require it,
+ * calling this function is optional, but if this function is called
+ * then the implementation must enforce the lengths.
+ *
+ * You may call this function before or after setting the nonce with
+ * psa_aead_set_nonce() or psa_aead_generate_nonce().
+ *
+ * - For #PSA_ALG_CCM, calling this function is required.
+ * - For the other AEAD algorithms defined in this specification, calling
+ *   this function is not required.
+ * - For vendor-defined algorithm, refer to the vendor documentation.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param ad_length             Size of the non-encrypted additional
+ *                              authenticated data in bytes.
+ * \param plaintext_length      Size of the plaintext to encrypt in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, and
+ *         psa_aead_update_ad() and psa_aead_update() must not have been
+ *         called yet).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         At least one of the lengths is not acceptable for the chosen
+ *         algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_set_lengths(psa_aead_operation_t *operation,
+                                  size_t ad_length,
+                                  size_t plaintext_length);
+
+/** Pass additional data to an active AEAD operation.
+ *
+ * Additional data is authenticated, but not encrypted.
+ *
+ * You may call this function multiple times to pass successive fragments
+ * of the additional data. You may not call this function after passing
+ * data to encrypt or decrypt with psa_aead_update().
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_aead_encrypt_setup() or psa_aead_decrypt_setup().
+ * 2. Set the nonce with psa_aead_generate_nonce() or psa_aead_set_nonce().
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \warning When decrypting, until psa_aead_verify() has returned #PSA_SUCCESS,
+ *          there is no guarantee that the input is valid. Therefore, until
+ *          you have called psa_aead_verify() and it has returned #PSA_SUCCESS,
+ *          treat the input as untrusted and prepare to undo any action that
+ *          depends on the input if psa_aead_verify() returns an error status.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] input             Buffer containing the fragment of
+ *                              additional data.
+ * \param input_length          Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, have a nonce
+ *         set, have lengths set if required by the algorithm, and
+ *         psa_aead_update() must not have been called yet).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input length overflows the additional data length that
+ *         was previously specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_update_ad(psa_aead_operation_t *operation,
+                                const uint8_t *input,
+                                size_t input_length);
+
+/** Encrypt or decrypt a message fragment in an active AEAD operation.
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_aead_encrypt_setup() or psa_aead_decrypt_setup().
+ *    The choice of setup function determines whether this function
+ *    encrypts or decrypts its input.
+ * 2. Set the nonce with psa_aead_generate_nonce() or psa_aead_set_nonce().
+ * 3. Call psa_aead_update_ad() to pass all the additional data.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \warning When decrypting, until psa_aead_verify() has returned #PSA_SUCCESS,
+ *          there is no guarantee that the input is valid. Therefore, until
+ *          you have called psa_aead_verify() and it has returned #PSA_SUCCESS:
+ *          - Do not use the output in any way other than storing it in a
+ *            confidential location. If you take any action that depends
+ *            on the tentative decrypted data, this action will need to be
+ *            undone if the input turns out not to be valid. Furthermore,
+ *            if an adversary can observe that this action took place
+ *            (for example through timing), they may be able to use this
+ *            fact as an oracle to decrypt any message encrypted with the
+ *            same key.
+ *          - In particular, do not copy the output anywhere but to a
+ *            memory or storage space that you have exclusive access to.
+ *
+ * This function does not require the input to be aligned to any
+ * particular block boundary. If the implementation can only process
+ * a whole block at a time, it must consume all the input provided, but
+ * it may delay the end of the corresponding output until a subsequent
+ * call to psa_aead_update(), psa_aead_finish() or psa_aead_verify()
+ * provides sufficient input. The amount of data that can be delayed
+ * in this way is bounded by #PSA_AEAD_UPDATE_OUTPUT_SIZE.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] input             Buffer containing the message fragment to
+ *                              encrypt or decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_UPDATE_OUTPUT_SIZE(\c key_type,
+ *                                  \c alg, \p input_length) where
+ *                                  \c key_type is the type of key and \c alg is
+ *                                  the algorithm that were used to set up the
+ *                                  operation.
+ *                                - #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p
+ *                                  input_length) evaluates to the maximum
+ *                                  output size of any supported AEAD
+ *                                  algorithm.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, have a nonce
+ *         set, and have lengths set if required by the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ *         #PSA_AEAD_UPDATE_OUTPUT_SIZE(\c key_type, \c alg, \p input_length) or
+ *         #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p input_length) can be used to
+ *         determine the required buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input length overflows the plaintext length that
+ *         was previously specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_update(psa_aead_operation_t *operation,
+                             const uint8_t *input,
+                             size_t input_length,
+                             uint8_t *output,
+                             size_t output_size,
+                             size_t *output_length);
+
+/** Finish encrypting a message in an AEAD operation.
+ *
+ * The operation must have been set up with psa_aead_encrypt_setup().
+ *
+ * This function finishes the authentication of the additional data
+ * formed by concatenating the inputs passed to preceding calls to
+ * psa_aead_update_ad() with the plaintext formed by concatenating the
+ * inputs passed to preceding calls to psa_aead_update().
+ *
+ * This function has two output buffers:
+ * - \p ciphertext contains trailing ciphertext that was buffered from
+ *   preceding calls to psa_aead_update().
+ * - \p tag contains the authentication tag.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] ciphertext       Buffer where the last part of the ciphertext
+ *                              is to be written.
+ * \param ciphertext_size       Size of the \p ciphertext buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - A sufficient output size is
+ *                                #PSA_AEAD_FINISH_OUTPUT_SIZE(\c key_type,
+ *                                \c alg) where \c key_type is the type of key
+ *                                and \c alg is the algorithm that were used to
+ *                                set up the operation.
+ *                              - #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE evaluates to
+ *                                the maximum output size of any supported AEAD
+ *                                algorithm.
+ * \param[out] ciphertext_length On success, the number of bytes of
+ *                              returned ciphertext.
+ * \param[out] tag              Buffer where the authentication tag is
+ *                              to be written.
+ * \param tag_size              Size of the \p tag buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - The exact tag size is #PSA_AEAD_TAG_LENGTH(\c
+ *                                key_type, \c key_bits, \c alg) where
+ *                                \c key_type and \c key_bits are the type and
+ *                                bit-size of the key, and \c alg is the
+ *                                algorithm that were used in the call to
+ *                                psa_aead_encrypt_setup().
+ *                              - #PSA_AEAD_TAG_MAX_SIZE evaluates to the
+ *                                maximum tag size of any supported AEAD
+ *                                algorithm.
+ * \param[out] tag_length       On success, the number of bytes
+ *                              that make up the returned tag.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active encryption
+ *         operation with a nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p ciphertext or \p tag buffer is too small.
+ *         #PSA_AEAD_FINISH_OUTPUT_SIZE(\c key_type, \c alg) or
+ *         #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE can be used to determine the
+ *         required \p ciphertext buffer size. #PSA_AEAD_TAG_LENGTH(\c key_type,
+ *         \c key_bits, \c alg) or #PSA_AEAD_TAG_MAX_SIZE can be used to
+ *         determine the required \p tag buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update() so far is
+ *         less than the plaintext length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_finish(psa_aead_operation_t *operation,
+                             uint8_t *ciphertext,
+                             size_t ciphertext_size,
+                             size_t *ciphertext_length,
+                             uint8_t *tag,
+                             size_t tag_size,
+                             size_t *tag_length);
+
+/** Finish authenticating and decrypting a message in an AEAD operation.
+ *
+ * The operation must have been set up with psa_aead_decrypt_setup().
+ *
+ * This function finishes the authenticated decryption of the message
+ * components:
+ *
+ * -  The additional data consisting of the concatenation of the inputs
+ *    passed to preceding calls to psa_aead_update_ad().
+ * -  The ciphertext consisting of the concatenation of the inputs passed to
+ *    preceding calls to psa_aead_update().
+ * -  The tag passed to this function call.
+ *
+ * If the authentication tag is correct, this function outputs any remaining
+ * plaintext and reports success. If the authentication tag is not correct,
+ * this function returns #PSA_ERROR_INVALID_SIGNATURE.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual tag and the expected tag is performed
+ * in constant time.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] plaintext        Buffer where the last part of the plaintext
+ *                              is to be written. This is the remaining data
+ *                              from previous calls to psa_aead_update()
+ *                              that could not be processed until the end
+ *                              of the input.
+ * \param plaintext_size        Size of the \p plaintext buffer in bytes.
+ *                              This must be appropriate for the selected algorithm and key:
+ *                              - A sufficient output size is
+ *                                #PSA_AEAD_VERIFY_OUTPUT_SIZE(\c key_type,
+ *                                \c alg) where \c key_type is the type of key
+ *                                and \c alg is the algorithm that were used to
+ *                                set up the operation.
+ *                              - #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE evaluates to
+ *                                the maximum output size of any supported AEAD
+ *                                algorithm.
+ * \param[out] plaintext_length On success, the number of bytes of
+ *                              returned plaintext.
+ * \param[in] tag               Buffer containing the authentication tag.
+ * \param tag_length            Size of the \p tag buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculations were successful, but the authentication tag is
+ *         not correct.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active decryption
+ *         operation with a nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p plaintext buffer is too small.
+ *         #PSA_AEAD_VERIFY_OUTPUT_SIZE(\c key_type, \c alg) or
+ *         #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE can be used to determine the
+ *         required buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update() so far is
+ *         less than the plaintext length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_verify(psa_aead_operation_t *operation,
+                             uint8_t *plaintext,
+                             size_t plaintext_size,
+                             size_t *plaintext_length,
+                             const uint8_t *tag,
+                             size_t tag_length);
+
+/** Abort an AEAD operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_aead_encrypt_setup() or psa_aead_decrypt_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized as described in #psa_aead_operation_t.
+ *
+ * In particular, calling psa_aead_abort() after the operation has been
+ * terminated by a call to psa_aead_abort(), psa_aead_finish() or
+ * psa_aead_verify() is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized AEAD operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_abort(psa_aead_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup asymmetric Asymmetric cryptography
+ * @{
+ */
+
+/**
+ * \brief Sign a message with a private key. For hash-and-sign algorithms,
+ *        this includes the hashing step.
+ *
+ * \note To perform a multi-part hash-and-sign signature algorithm, first use
+ *       a multi-part hash operation and then pass the resulting hash to
+ *       psa_sign_hash(). PSA_ALG_GET_HASH(\p alg) can be used to determine the
+ *       hash algorithm to use.
+ *
+ * \param[in]  key              Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. The key must
+ *                              allow the usage #PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param[in]  alg              An asymmetric signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_MESSAGE(\p alg)
+ *                              is true), that is compatible with the type of
+ *                              \p key.
+ * \param[in]  input            The input message to sign.
+ * \param[in]  input_length     Size of the \p input buffer in bytes.
+ * \param[out] signature        Buffer where the signature is to be written.
+ * \param[in]  signature_size   Size of the \p signature buffer in bytes. This
+ *                              must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - The required signature size is
+ *                                #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *                                where \c key_type and \c key_bits are the type and
+ *                                bit-size respectively of key.
+ *                              - #PSA_SIGNATURE_MAX_SIZE evaluates to the
+ *                                maximum signature size of any supported
+ *                                signature algorithm.
+ * \param[out] signature_length On success, the number of bytes that make up
+ *                              the returned signature value.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_SIGN_MESSAGE flag,
+ *         or it does not permit the requested algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p signature buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_sign_message( mbedtls_svc_key_id_t key,
+                               psa_algorithm_t alg,
+                               const uint8_t * input,
+                               size_t input_length,
+                               uint8_t * signature,
+                               size_t signature_size,
+                               size_t * signature_length );
+
+/** \brief Verify the signature of a message with a public key, using
+ *         a hash-and-sign verification algorithm.
+ *
+ * \note To perform a multi-part hash-and-sign signature verification
+ *       algorithm, first use a multi-part hash operation to hash the message
+ *       and then pass the resulting hash to psa_verify_hash().
+ *       PSA_ALG_GET_HASH(\p alg) can be used to determine the hash algorithm
+ *       to use.
+ *
+ * \param[in]  key              Identifier of the key to use for the operation.
+ *                              It must be a public key or an asymmetric key
+ *                              pair. The key must allow the usage
+ *                              #PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param[in]  alg              An asymmetric signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_MESSAGE(\p alg)
+ *                              is true), that is compatible with the type of
+ *                              \p key.
+ * \param[in]  input            The message whose signature is to be verified.
+ * \param[in]  input_length     Size of the \p input buffer in bytes.
+ * \param[out] signature        Buffer containing the signature to verify.
+ * \param[in]  signature_length Size of the \p signature buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_SIGN_MESSAGE flag,
+ *         or it does not permit the requested algorithm.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculation was performed successfully, but the passed signature
+ *         is not a valid signature.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_verify_message( mbedtls_svc_key_id_t key,
+                                 psa_algorithm_t alg,
+                                 const uint8_t * input,
+                                 size_t input_length,
+                                 const uint8_t * signature,
+                                 size_t signature_length );
+
+/**
+ * \brief Sign a hash or short message with a private key.
+ *
+ * Note that to perform a hash-and-sign signature algorithm, you must
+ * first calculate the hash by calling psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(), or alternatively by calling psa_hash_compute().
+ * Then pass the resulting hash as the \p hash
+ * parameter to this function. You can use #PSA_ALG_SIGN_GET_HASH(\p alg)
+ * to determine the hash algorithm to use.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. The key must
+ *                              allow the usage #PSA_KEY_USAGE_SIGN_HASH.
+ * \param alg                   A signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_HASH(\p alg)
+ *                              is true), that is compatible with
+ *                              the type of \p key.
+ * \param[in] hash              The hash or message to sign.
+ * \param hash_length           Size of the \p hash buffer in bytes.
+ * \param[out] signature        Buffer where the signature is to be written.
+ * \param signature_size        Size of the \p signature buffer in bytes.
+ * \param[out] signature_length On success, the number of bytes
+ *                              that make up the returned signature value.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p signature buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_sign_hash(mbedtls_svc_key_id_t key,
+                           psa_algorithm_t alg,
+                           const uint8_t *hash,
+                           size_t hash_length,
+                           uint8_t *signature,
+                           size_t signature_size,
+                           size_t *signature_length);
+
+/**
+ * \brief Verify the signature of a hash or short message using a public key.
+ *
+ * Note that to perform a hash-and-sign signature algorithm, you must
+ * first calculate the hash by calling psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(), or alternatively by calling psa_hash_compute().
+ * Then pass the resulting hash as the \p hash
+ * parameter to this function. You can use #PSA_ALG_SIGN_GET_HASH(\p alg)
+ * to determine the hash algorithm to use.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must be a public key or an asymmetric key pair. The
+ *                          key must allow the usage
+ *                          #PSA_KEY_USAGE_VERIFY_HASH.
+ * \param alg               A signature algorithm (PSA_ALG_XXX
+ *                          value such that #PSA_ALG_IS_SIGN_HASH(\p alg)
+ *                          is true), that is compatible with
+ *                          the type of \p key.
+ * \param[in] hash          The hash or message whose signature is to be
+ *                          verified.
+ * \param hash_length       Size of the \p hash buffer in bytes.
+ * \param[in] signature     Buffer containing the signature to verify.
+ * \param signature_length  Size of the \p signature buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The signature is valid.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculation was perfomed successfully, but the passed
+ *         signature is not a valid signature.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_verify_hash(mbedtls_svc_key_id_t key,
+                             psa_algorithm_t alg,
+                             const uint8_t *hash,
+                             size_t hash_length,
+                             const uint8_t *signature,
+                             size_t signature_length);
+
+/**
+ * \brief Encrypt a short message with a public key.
+ *
+ * \param key                   Identifer of the key to use for the operation.
+ *                              It must be a public key or an asymmetric key
+ *                              pair. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   An asymmetric encryption algorithm that is
+ *                              compatible with the type of \p key.
+ * \param[in] input             The message to encrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[in] salt              A salt or label, if supported by the
+ *                              encryption algorithm.
+ *                              If the algorithm does not support a
+ *                              salt, pass \c NULL.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass \c NULL.
+ *
+ *                              - For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                                supported.
+ * \param salt_length           Size of the \p salt buffer in bytes.
+ *                              If \p salt is \c NULL, pass 0.
+ * \param[out] output           Buffer where the encrypted message is to
+ *                              be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_asymmetric_encrypt(mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg,
+                                    const uint8_t *input,
+                                    size_t input_length,
+                                    const uint8_t *salt,
+                                    size_t salt_length,
+                                    uint8_t *output,
+                                    size_t output_size,
+                                    size_t *output_length);
+
+/**
+ * \brief Decrypt a short message with a private key.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. It must
+ *                              allow the usage #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   An asymmetric encryption algorithm that is
+ *                              compatible with the type of \p key.
+ * \param[in] input             The message to decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[in] salt              A salt or label, if supported by the
+ *                              encryption algorithm.
+ *                              If the algorithm does not support a
+ *                              salt, pass \c NULL.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass \c NULL.
+ *
+ *                              - For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                                supported.
+ * \param salt_length           Size of the \p salt buffer in bytes.
+ *                              If \p salt is \c NULL, pass 0.
+ * \param[out] output           Buffer where the decrypted message is to
+ *                              be written.
+ * \param output_size           Size of the \c output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_INVALID_PADDING
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_asymmetric_decrypt(mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg,
+                                    const uint8_t *input,
+                                    size_t input_length,
+                                    const uint8_t *salt,
+                                    size_t salt_length,
+                                    uint8_t *output,
+                                    size_t output_size,
+                                    size_t *output_length);
+
+/**@}*/
+
+/** \defgroup key_derivation Key derivation and pseudorandom generation
+ * @{
+ */
+
+/** The type of the state data structure for key derivation operations.
+ *
+ * Before calling any function on a key derivation operation object, the
+ * application must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_KEY_DERIVATION_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation = PSA_KEY_DERIVATION_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_key_derivation_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation;
+ *   operation = psa_key_derivation_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation.
+ */
+typedef struct psa_key_derivation_s psa_key_derivation_operation_t;
+
+/** \def PSA_KEY_DERIVATION_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a key derivation operation
+ * object of type #psa_key_derivation_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_KEY_DERIVATION_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a key derivation operation object.
+ */
+static psa_key_derivation_operation_t psa_key_derivation_operation_init(void);
+
+/** Set up a key derivation operation.
+ *
+ * A key derivation algorithm takes some inputs and uses them to generate
+ * a byte stream in a deterministic way.
+ * This byte stream can be used to produce keys and other
+ * cryptographic material.
+ *
+ * To derive a key:
+ * -# Start with an initialized object of type #psa_key_derivation_operation_t.
+ * -# Call psa_key_derivation_setup() to select the algorithm.
+ * -# Provide the inputs for the key derivation by calling
+ *    psa_key_derivation_input_bytes() or psa_key_derivation_input_key()
+ *    as appropriate. Which inputs are needed, in what order, and whether
+ *    they may be keys and if so of what type depends on the algorithm.
+ * -# Optionally set the operation's maximum capacity with
+ *    psa_key_derivation_set_capacity(). You may do this before, in the middle
+ *    of or after providing inputs. For some algorithms, this step is mandatory
+ *    because the output depends on the maximum capacity.
+ * -# To derive a key, call psa_key_derivation_output_key().
+ *    To derive a byte string for a different purpose, call
+ *    psa_key_derivation_output_bytes().
+ *    Successive calls to these functions use successive output bytes
+ *    calculated by the key derivation algorithm.
+ * -# Clean up the key derivation operation object with
+ *    psa_key_derivation_abort().
+ *
+ * If this function returns an error, the key derivation operation object is
+ * not changed.
+ *
+ * If an error occurs at any step after a call to psa_key_derivation_setup(),
+ * the operation will need to be reset by a call to psa_key_derivation_abort().
+ *
+ * Implementations must reject an attempt to derive a key of size 0.
+ *
+ * \param[in,out] operation       The key derivation operation object
+ *                                to set up. It must
+ *                                have been initialized but not set up yet.
+ * \param alg                     The key derivation algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_KEY_DERIVATION(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c alg is not a key derivation algorithm.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a key derivation algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_setup(
+    psa_key_derivation_operation_t *operation,
+    psa_algorithm_t alg);
+
+/** Retrieve the current capacity of a key derivation operation.
+ *
+ * The capacity of a key derivation is the maximum number of bytes that it can
+ * return. When you get *N* bytes of output from a key derivation operation,
+ * this reduces its capacity by *N*.
+ *
+ * \param[in] operation     The operation to query.
+ * \param[out] capacity     On success, the capacity of the operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_get_capacity(
+    const psa_key_derivation_operation_t *operation,
+    size_t *capacity);
+
+/** Set the maximum capacity of a key derivation operation.
+ *
+ * The capacity of a key derivation operation is the maximum number of bytes
+ * that the key derivation operation can return from this point onwards.
+ *
+ * \param[in,out] operation The key derivation operation object to modify.
+ * \param capacity          The new capacity of the operation.
+ *                          It must be less or equal to the operation's
+ *                          current capacity.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p capacity is larger than the operation's current capacity.
+ *         In this case, the operation object remains valid and its capacity
+ *         remains unchanged.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_set_capacity(
+    psa_key_derivation_operation_t *operation,
+    size_t capacity);
+
+/** Use the maximum possible capacity for a key derivation operation.
+ *
+ * Use this value as the capacity argument when setting up a key derivation
+ * to indicate that the operation should have the maximum possible capacity.
+ * The value of the maximum possible capacity depends on the key derivation
+ * algorithm.
+ */
+#define PSA_KEY_DERIVATION_UNLIMITED_CAPACITY ((size_t)(-1))
+
+/** Provide an input for key derivation or key agreement.
+ *
+ * Which inputs are required and in what order depends on the algorithm.
+ * Refer to the documentation of each key derivation or key agreement
+ * algorithm for information.
+ *
+ * This function passes direct inputs, which is usually correct for
+ * non-secret inputs. To pass a secret input, which should be in a key
+ * object, call psa_key_derivation_input_key() instead of this function.
+ * Refer to the documentation of individual step types
+ * (`PSA_KEY_DERIVATION_INPUT_xxx` values of type ::psa_key_derivation_step_t)
+ * for more information.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() and must not
+ *                                have produced any output yet.
+ * \param step                    Which step the input data is for.
+ * \param[in] data                Input data to use.
+ * \param data_length             Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step is not compatible with the operation's algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow direct inputs.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this input \p step.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_input_bytes(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    const uint8_t *data,
+    size_t data_length);
+
+/** Provide an input for key derivation in the form of a key.
+ *
+ * Which inputs are required and in what order depends on the algorithm.
+ * Refer to the documentation of each key derivation or key agreement
+ * algorithm for information.
+ *
+ * This function obtains input from a key object, which is usually correct for
+ * secret inputs or for non-secret personalization strings kept in the key
+ * store. To pass a non-secret parameter which is not in the key store,
+ * call psa_key_derivation_input_bytes() instead of this function.
+ * Refer to the documentation of individual step types
+ * (`PSA_KEY_DERIVATION_INPUT_xxx` values of type ::psa_key_derivation_step_t)
+ * for more information.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() and must not
+ *                                have produced any output yet.
+ * \param step                    Which step the input data is for.
+ * \param key                     Identifier of the key. It must have an
+ *                                appropriate type for step and must allow the
+ *                                usage #PSA_KEY_USAGE_DERIVE.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step is not compatible with the operation's algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow key inputs of the given type
+ *         or does not allow key inputs at all.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this input \p step.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_input_key(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    mbedtls_svc_key_id_t key);
+
+/** Perform a key agreement and use the shared secret as input to a key
+ * derivation.
+ *
+ * A key agreement algorithm takes two inputs: a private key \p private_key
+ * a public key \p peer_key.
+ * The result of this function is passed as input to a key derivation.
+ * The output of this key derivation can be extracted by reading from the
+ * resulting operation to produce keys and other cryptographic material.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() with a
+ *                                key agreement and derivation algorithm
+ *                                \c alg (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_KEY_AGREEMENT(\c alg) is true
+ *                                and #PSA_ALG_IS_RAW_KEY_AGREEMENT(\c alg)
+ *                                is false).
+ *                                The operation must be ready for an
+ *                                input of the type given by \p step.
+ * \param step                    Which step the input data is for.
+ * \param private_key             Identifier of the private key to use. It must
+ *                                allow the usage #PSA_KEY_USAGE_DERIVE.
+ * \param[in] peer_key      Public key of the peer. The peer key must be in the
+ *                          same format that psa_import_key() accepts for the
+ *                          public key type corresponding to the type of
+ *                          private_key. That is, this function performs the
+ *                          equivalent of
+ *                          #psa_import_key(...,
+ *                          `peer_key`, `peer_key_length`) where
+ *                          with key attributes indicating the public key
+ *                          type corresponding to the type of `private_key`.
+ *                          For example, for EC keys, this means that peer_key
+ *                          is interpreted as a point on the curve that the
+ *                          private key is on. The standard formats for public
+ *                          keys are documented in the documentation of
+ *                          psa_export_public_key().
+ * \param peer_key_length         Size of \p peer_key in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this key agreement \p step.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c private_key is not compatible with \c alg,
+ *         or \p peer_key is not valid for \c alg or not compatible with
+ *         \c private_key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a key derivation algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow an input resulting from a key agreement.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_key_agreement(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    mbedtls_svc_key_id_t private_key,
+    const uint8_t *peer_key,
+    size_t peer_key_length);
+
+/** Read some data from a key derivation operation.
+ *
+ * This function calculates output bytes from a key derivation algorithm and
+ * return those bytes.
+ * If you view the key derivation's output as a stream of bytes, this
+ * function destructively reads the requested number of bytes from the
+ * stream.
+ * The operation's capacity decreases by the number of bytes read.
+ *
+ * If this function returns an error status other than
+ * #PSA_ERROR_INSUFFICIENT_DATA, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation The key derivation operation object to read from.
+ * \param[out] output       Buffer where the output will be written.
+ * \param output_length     Number of bytes to output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INSUFFICIENT_DATA
+ *                          The operation's capacity was less than
+ *                          \p output_length bytes. Note that in this case,
+ *                          no output is written to the output buffer.
+ *                          The operation's capacity is set to 0, thus
+ *                          subsequent calls to this function will not
+ *                          succeed, even with a smaller output buffer.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active and completed
+ *         all required input steps).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_output_bytes(
+    psa_key_derivation_operation_t *operation,
+    uint8_t *output,
+    size_t output_length);
+
+/** Derive a key from an ongoing key derivation operation.
+ *
+ * This function calculates output bytes from a key derivation algorithm
+ * and uses those bytes to generate a key deterministically.
+ * The key's location, usage policy, type and size are taken from
+ * \p attributes.
+ *
+ * If you view the key derivation's output as a stream of bytes, this
+ * function destructively reads as many bytes as required from the
+ * stream.
+ * The operation's capacity decreases by the number of bytes read.
+ *
+ * If this function returns an error status other than
+ * #PSA_ERROR_INSUFFICIENT_DATA, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * How much output is produced and consumed from the operation, and how
+ * the key is derived, depends on the key type and on the key size
+ * (denoted \c bits below):
+ *
+ * - For key types for which the key is an arbitrary sequence of bytes
+ *   of a given size, this function is functionally equivalent to
+ *   calling #psa_key_derivation_output_bytes
+ *   and passing the resulting output to #psa_import_key.
+ *   However, this function has a security benefit:
+ *   if the implementation provides an isolation boundary then
+ *   the key material is not exposed outside the isolation boundary.
+ *   As a consequence, for these key types, this function always consumes
+ *   exactly (\c bits / 8) bytes from the operation.
+ *   The following key types defined in this specification follow this scheme:
+ *
+ *     - #PSA_KEY_TYPE_AES;
+ *     - #PSA_KEY_TYPE_ARC4;
+ *     - #PSA_KEY_TYPE_ARIA;
+ *     - #PSA_KEY_TYPE_CAMELLIA;
+ *     - #PSA_KEY_TYPE_DERIVE;
+ *     - #PSA_KEY_TYPE_HMAC.
+ *
+ * - For ECC keys on a Montgomery elliptic curve
+ *   (#PSA_KEY_TYPE_ECC_KEY_PAIR(\c curve) where \c curve designates a
+ *   Montgomery curve), this function always draws a byte string whose
+ *   length is determined by the curve, and sets the mandatory bits
+ *   accordingly. That is:
+ *
+ *     - Curve25519 (#PSA_ECC_FAMILY_MONTGOMERY, 255 bits): draw a 32-byte
+ *       string and process it as specified in RFC 7748 &sect;5.
+ *     - Curve448 (#PSA_ECC_FAMILY_MONTGOMERY, 448 bits): draw a 56-byte
+ *       string and process it as specified in RFC 7748 &sect;5.
+ *
+ * - For key types for which the key is represented by a single sequence of
+ *   \c bits bits with constraints as to which bit sequences are acceptable,
+ *   this function draws a byte string of length (\c bits / 8) bytes rounded
+ *   up to the nearest whole number of bytes. If the resulting byte string
+ *   is acceptable, it becomes the key, otherwise the drawn bytes are discarded.
+ *   This process is repeated until an acceptable byte string is drawn.
+ *   The byte string drawn from the operation is interpreted as specified
+ *   for the output produced by psa_export_key().
+ *   The following key types defined in this specification follow this scheme:
+ *
+ *     - #PSA_KEY_TYPE_DES.
+ *       Force-set the parity bits, but discard forbidden weak keys.
+ *       For 2-key and 3-key triple-DES, the three keys are generated
+ *       successively (for example, for 3-key triple-DES,
+ *       if the first 8 bytes specify a weak key and the next 8 bytes do not,
+ *       discard the first 8 bytes, use the next 8 bytes as the first key,
+ *       and continue reading output from the operation to derive the other
+ *       two keys).
+ *     - Finite-field Diffie-Hellman keys (#PSA_KEY_TYPE_DH_KEY_PAIR(\c group)
+ *       where \c group designates any Diffie-Hellman group) and
+ *       ECC keys on a Weierstrass elliptic curve
+ *       (#PSA_KEY_TYPE_ECC_KEY_PAIR(\c curve) where \c curve designates a
+ *       Weierstrass curve).
+ *       For these key types, interpret the byte string as integer
+ *       in big-endian order. Discard it if it is not in the range
+ *       [0, *N* - 2] where *N* is the boundary of the private key domain
+ *       (the prime *p* for Diffie-Hellman, the subprime *q* for DSA,
+ *       or the order of the curve's base point for ECC).
+ *       Add 1 to the resulting integer and use this as the private key *x*.
+ *       This method allows compliance to NIST standards, specifically
+ *       the methods titled "key-pair generation by testing candidates"
+ *       in NIST SP 800-56A &sect;5.6.1.1.4 for Diffie-Hellman,
+ *       in FIPS 186-4 &sect;B.1.2 for DSA, and
+ *       in NIST SP 800-56A &sect;5.6.1.2.2 or
+ *       FIPS 186-4 &sect;B.4.2 for elliptic curve keys.
+ *
+ * - For other key types, including #PSA_KEY_TYPE_RSA_KEY_PAIR,
+ *   the way in which the operation output is consumed is
+ *   implementation-defined.
+ *
+ * In all cases, the data that is read is discarded from the operation.
+ * The operation's capacity is decreased by the number of bytes read.
+ *
+ * For algorithms that take an input step #PSA_KEY_DERIVATION_INPUT_SECRET,
+ * the input to that step must be provided with psa_key_derivation_input_key().
+ * Future versions of this specification may include additional restrictions
+ * on the derived key based on the attributes and strength of the secret key.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ * \param[in,out] operation The key derivation operation object to read from.
+ * \param[out] key          On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_INSUFFICIENT_DATA
+ *         There was not enough data to create the desired key.
+ *         Note that in this case, no output is written to the output buffer.
+ *         The operation's capacity is set to 0, thus subsequent calls to
+ *         this function will not succeed, even with a smaller output buffer.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The key type or key size is not supported, either by the
+ *         implementation in general or in this particular location.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The provided key attributes are not valid for the operation.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The #PSA_KEY_DERIVATION_INPUT_SECRET input was not provided through
+ *         a key.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active and completed
+ *         all required input steps).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_output_key(
+    const psa_key_attributes_t *attributes,
+    psa_key_derivation_operation_t *operation,
+    mbedtls_svc_key_id_t *key);
+
+/** Abort a key derivation operation.
+ *
+ * Aborting an operation frees all associated resources except for the \c
+ * operation structure itself. Once aborted, the operation object can be reused
+ * for another operation by calling psa_key_derivation_setup() again.
+ *
+ * This function may be called at any time after the operation
+ * object has been initialized as described in #psa_key_derivation_operation_t.
+ *
+ * In particular, it is valid to call psa_key_derivation_abort() twice, or to
+ * call psa_key_derivation_abort() on an operation that has not been set up.
+ *
+ * \param[in,out] operation    The operation to abort.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_abort(
+    psa_key_derivation_operation_t *operation);
+
+/** Perform a key agreement and return the raw shared secret.
+ *
+ * \warning The raw result of a key agreement algorithm such as finite-field
+ * Diffie-Hellman or elliptic curve Diffie-Hellman has biases and should
+ * not be used directly as key material. It should instead be passed as
+ * input to a key derivation algorithm. To chain a key agreement with
+ * a key derivation, use psa_key_derivation_key_agreement() and other
+ * functions from the key derivation interface.
+ *
+ * \param alg                     The key agreement algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_RAW_KEY_AGREEMENT(\p alg)
+ *                                is true).
+ * \param private_key             Identifier of the private key to use. It must
+ *                                allow the usage #PSA_KEY_USAGE_DERIVE.
+ * \param[in] peer_key            Public key of the peer. It must be
+ *                                in the same format that psa_import_key()
+ *                                accepts. The standard formats for public
+ *                                keys are documented in the documentation
+ *                                of psa_export_public_key().
+ * \param peer_key_length         Size of \p peer_key in bytes.
+ * \param[out] output             Buffer where the decrypted message is to
+ *                                be written.
+ * \param output_size             Size of the \c output buffer in bytes.
+ * \param[out] output_length      On success, the number of bytes
+ *                                that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p alg is not a key agreement algorithm
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p private_key is not compatible with \p alg,
+ *         or \p peer_key is not valid for \p alg or not compatible with
+ *         \p private_key.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p output_size is too small
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not a supported key agreement algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_raw_key_agreement(psa_algorithm_t alg,
+                                   mbedtls_svc_key_id_t private_key,
+                                   const uint8_t *peer_key,
+                                   size_t peer_key_length,
+                                   uint8_t *output,
+                                   size_t output_size,
+                                   size_t *output_length);
+
+/**@}*/
+
+/** \defgroup random Random generation
+ * @{
+ */
+
+/**
+ * \brief Generate random bytes.
+ *
+ * \warning This function **can** fail! Callers MUST check the return status
+ *          and MUST NOT use the content of the output buffer if the return
+ *          status is not #PSA_SUCCESS.
+ *
+ * \note    To generate a key, use psa_generate_key() instead.
+ *
+ * \param[out] output       Output buffer for the generated data.
+ * \param output_size       Number of bytes to generate and output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_generate_random(uint8_t *output,
+                                 size_t output_size);
+
+/**
+ * \brief Generate a key or key pair.
+ *
+ * The key is generated randomly.
+ * Its location, usage policy, type and size are taken from \p attributes.
+ *
+ * Implementations must reject an attempt to generate a key of size 0.
+ *
+ * The following type-specific considerations apply:
+ * - For RSA keys (#PSA_KEY_TYPE_RSA_KEY_PAIR),
+ *   the public exponent is 65537.
+ *   The modulus is a product of two probabilistic primes
+ *   between 2^{n-1} and 2^n where n is the bit size specified in the
+ *   attributes.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ * \param[out] key          On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_generate_key(const psa_key_attributes_t *attributes,
+                              mbedtls_svc_key_id_t *key);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/* The file "crypto_sizes.h" contains definitions for size calculation
+ * macros whose definitions are implementation-specific. */
+#include "crypto_sizes.h"
+
+/* The file "crypto_struct.h" contains definitions for
+ * implementation-specific structs that are declared above. */
+#include "crypto_struct.h"
+
+/* The file "crypto_extra.h" contains vendor-specific definitions. This
+ * can include vendor-defined algorithms, extra functions, etc. */
+#include "crypto_extra.h"
+
+#endif /* PSA_CRYPTO_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h
new file mode 100644
index 00000000000..a875b237041
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h
@@ -0,0 +1,79 @@
+/*
+ *  Context structure declaration of the Mbed TLS software-based PSA drivers
+ *  called through the PSA Crypto driver dispatch layer.
+ *  This file contains the context structures of those algorithms which need to
+ *  rely on other algorithms, i.e. are 'composite' algorithms.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the Mbed TLS software-based PSA drivers. The
+ * definition of these objects are then used by crypto_struct.h to define the
+ * implementation-defined types of PSA multi-part state objects.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_BUILTIN_COMPOSITES_H
+#define PSA_CRYPTO_BUILTIN_COMPOSITES_H
+
+#include <psa/crypto_driver_common.h>
+
+/*
+ * MAC multi-part operation definitions.
+ */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_CMAC) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC)
+#define MBEDTLS_PSA_BUILTIN_MAC
+#endif
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+typedef struct
+{
+    /** The HMAC algorithm in use */
+    psa_algorithm_t alg;
+    /** The hash context. */
+    struct psa_hash_operation_s hash_ctx;
+    /** The HMAC part of the context. */
+    uint8_t opad[PSA_HMAC_MAX_HASH_BLOCK_SIZE];
+} mbedtls_psa_hmac_operation_t;
+
+#define MBEDTLS_PSA_HMAC_OPERATION_INIT {0, PSA_HASH_OPERATION_INIT, {0}}
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HMAC */
+
+#include "mbedtls/cmac.h"
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    union
+    {
+        unsigned dummy; /* Make the union non-empty even with no supported algorithms. */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+        mbedtls_psa_hmac_operation_t hmac;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HMAC */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_CMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+        mbedtls_cipher_context_t cmac;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_CMAC */
+    } ctx;
+} mbedtls_psa_mac_operation_t;
+
+#define MBEDTLS_PSA_MAC_OPERATION_INIT {0, {0}}
+
+#endif /* PSA_CRYPTO_BUILTIN_COMPOSITES_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h
new file mode 100644
index 00000000000..62a0e6f3704
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h
@@ -0,0 +1,126 @@
+/*
+ *  Context structure declaration of the Mbed TLS software-based PSA drivers
+ *  called through the PSA Crypto driver dispatch layer.
+ *  This file contains the context structures of those algorithms which do not
+ *  rely on other algorithms, i.e. are 'primitive' algorithms.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the Mbed TLS software-based PSA drivers. The
+ * definition of these objects are then used by crypto_struct.h to define the
+ * implementation-defined types of PSA multi-part state objects.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_BUILTIN_PRIMITIVES_H
+#define PSA_CRYPTO_BUILTIN_PRIMITIVES_H
+
+#include <psa/crypto_driver_common.h>
+
+/*
+ * Hash multi-part operation definitions.
+ */
+
+#include "mbedtls/md2.h"
+#include "mbedtls/md4.h"
+#include "mbedtls/md5.h"
+#include "mbedtls/ripemd160.h"
+#include "mbedtls/sha1.h"
+#include "mbedtls/sha256.h"
+#include "mbedtls/sha512.h"
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD2) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_MD4) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_MD5) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_1) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_224) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_256) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_384) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_512)
+#define MBEDTLS_PSA_BUILTIN_HASH
+#endif
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    union
+    {
+        unsigned dummy; /* Make the union non-empty even with no supported algorithms. */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD2)
+        mbedtls_md2_context md2;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD4)
+        mbedtls_md4_context md4;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD5)
+        mbedtls_md5_context md5;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160)
+        mbedtls_ripemd160_context ripemd160;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_1)
+        mbedtls_sha1_context sha1;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_256) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_224)
+        mbedtls_sha256_context sha256;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_512) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_384)
+        mbedtls_sha512_context sha512;
+#endif
+    } ctx;
+} mbedtls_psa_hash_operation_t;
+
+#define MBEDTLS_PSA_HASH_OPERATION_INIT {0, {0}}
+
+/*
+ * Cipher multi-part operation definitions.
+ */
+
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CTR) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CFB) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_OFB) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_XTS) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7)
+#define MBEDTLS_PSA_BUILTIN_CIPHER  1
+#endif
+
+typedef struct {
+    /* Context structure for the Mbed TLS cipher implementation. */
+    psa_algorithm_t alg;
+    uint8_t iv_length;
+    uint8_t block_length;
+    union {
+        unsigned int dummy;
+        mbedtls_cipher_context_t cipher;
+    } ctx;
+} mbedtls_psa_cipher_operation_t;
+
+#define MBEDTLS_PSA_CIPHER_OPERATION_INIT {0, 0, 0, {0}}
+
+#endif /* PSA_CRYPTO_BUILTIN_PRIMITIVES_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_compat.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_compat.h
new file mode 100644
index 00000000000..09ac488398f
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_compat.h
@@ -0,0 +1,528 @@
+/**
+ * \file psa/crypto_compat.h
+ *
+ * \brief PSA cryptography module: Backward compatibility aliases
+ *
+ * This header declares alternative names for macro and functions.
+ * New application code should not use these names.
+ * These names may be removed in a future version of Mbed Crypto.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_COMPAT_H
+#define PSA_CRYPTO_COMPAT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * To support both openless APIs and psa_open_key() temporarily, define
+ * psa_key_handle_t to be equal to mbedtls_svc_key_id_t. Do not mark the
+ * type and its utility macros and functions deprecated yet. This will be done
+ * in a subsequent phase.
+ */
+typedef mbedtls_svc_key_id_t psa_key_handle_t;
+
+#define PSA_KEY_HANDLE_INIT MBEDTLS_SVC_KEY_ID_INIT
+
+/** Check whether an handle is null.
+ *
+ * \param handle  Handle
+ *
+ * \return Non-zero if the handle is null, zero otherwise.
+ */
+static inline int psa_key_handle_is_null( psa_key_handle_t handle )
+{
+    return( mbedtls_svc_key_id_is_null( handle ) );
+}
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+/*
+ * Mechanism for declaring deprecated values
+ */
+#if defined(MBEDTLS_DEPRECATED_WARNING) && !defined(MBEDTLS_PSA_DEPRECATED)
+#define MBEDTLS_PSA_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_PSA_DEPRECATED
+#endif
+
+typedef MBEDTLS_PSA_DEPRECATED size_t mbedtls_deprecated_size_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_status_t mbedtls_deprecated_psa_status_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_key_usage_t mbedtls_deprecated_psa_key_usage_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_ecc_family_t mbedtls_deprecated_psa_ecc_family_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_dh_family_t mbedtls_deprecated_psa_dh_family_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_ecc_family_t psa_ecc_curve_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_dh_family_t psa_dh_group_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_algorithm_t mbedtls_deprecated_psa_algorithm_t;
+
+#define PSA_KEY_TYPE_GET_CURVE PSA_KEY_TYPE_ECC_GET_FAMILY
+#define PSA_KEY_TYPE_GET_GROUP PSA_KEY_TYPE_DH_GET_FAMILY
+
+#define MBEDTLS_DEPRECATED_CONSTANT( type, value )      \
+    ( (mbedtls_deprecated_##type) ( value ) )
+
+/*
+ * Deprecated PSA Crypto error code definitions (PSA Crypto API  <= 1.0 beta2)
+ */
+#define PSA_ERROR_UNKNOWN_ERROR \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_GENERIC_ERROR )
+#define PSA_ERROR_OCCUPIED_SLOT \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_ALREADY_EXISTS )
+#define PSA_ERROR_EMPTY_SLOT \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_DOES_NOT_EXIST )
+#define PSA_ERROR_INSUFFICIENT_CAPACITY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_INSUFFICIENT_DATA )
+#define PSA_ERROR_TAMPERING_DETECTED \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_CORRUPTION_DETECTED )
+
+/*
+ * Deprecated PSA Crypto numerical encodings (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_KEY_USAGE_SIGN \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_key_usage_t, PSA_KEY_USAGE_SIGN_HASH )
+#define PSA_KEY_USAGE_VERIFY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_key_usage_t, PSA_KEY_USAGE_VERIFY_HASH )
+
+/*
+ * Deprecated PSA Crypto size calculation macros (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ASYMMETRIC_SIGNATURE_MAX_SIZE \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_SIGNATURE_MAX_SIZE )
+#define PSA_ASYMMETRIC_SIGN_OUTPUT_SIZE( key_type, key_bits, alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_SIGN_OUTPUT_SIZE( key_type, key_bits, alg ) )
+#define PSA_KEY_EXPORT_MAX_SIZE( key_type, key_bits ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_EXPORT_KEY_OUTPUT_SIZE( key_type, key_bits ) )
+#define PSA_BLOCK_CIPHER_BLOCK_SIZE( type ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_BLOCK_CIPHER_BLOCK_LENGTH( type ) )
+#define PSA_MAX_BLOCK_CIPHER_BLOCK_SIZE \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE )
+#define PSA_HASH_SIZE( alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_HASH_LENGTH( alg ) )
+#define PSA_MAC_FINAL_SIZE( key_type, key_bits, alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_MAC_LENGTH( key_type, key_bits, alg ) )
+#define PSA_ALG_TLS12_PSK_TO_MS_MAX_PSK_LEN \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE )
+
+/*
+ * Deprecated PSA Crypto function names (PSA Crypto API  <= 1.0 beta3)
+ */
+MBEDTLS_PSA_DEPRECATED static inline psa_status_t psa_asymmetric_sign( psa_key_handle_t key,
+                            psa_algorithm_t alg,
+                            const uint8_t *hash,
+                            size_t hash_length,
+                            uint8_t *signature,
+                            size_t signature_size,
+                            size_t *signature_length )
+{
+    return psa_sign_hash( key, alg, hash, hash_length, signature, signature_size, signature_length );
+}
+
+MBEDTLS_PSA_DEPRECATED static inline psa_status_t psa_asymmetric_verify( psa_key_handle_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *hash,
+                              size_t hash_length,
+                              const uint8_t *signature,
+                              size_t signature_length )
+{
+    return psa_verify_hash( key, alg, hash, hash_length, signature, signature_length );
+}
+
+/*
+ * Size-specific elliptic curve families.
+ */
+#define PSA_ECC_CURVE_SECP160K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP192K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP224K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP256K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP160R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP192R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP224R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP256R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP384R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP521R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP160R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R2 )
+#define PSA_ECC_CURVE_SECT163K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT233K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT239K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT283K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT409K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT571K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT163R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT193R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT233R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT283R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT409R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT571R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT163R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_SECT193R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_BRAINPOOL_P256R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_BRAINPOOL_P384R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_BRAINPOOL_P512R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_CURVE25519 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+#define PSA_ECC_CURVE_CURVE448 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+
+/*
+ * Curves that changed name due to PSA specification.
+ */
+#define PSA_ECC_CURVE_SECP_K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP_R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R2 )
+#define PSA_ECC_CURVE_SECT_K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT_R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_BRAINPOOL_P_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_MONTGOMERY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+
+/*
+ * Finite-field Diffie-Hellman families.
+ */
+#define PSA_DH_GROUP_FFDHE2048 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE3072 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE4096 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE6144 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE8192 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+
+/*
+ * Diffie-Hellman families that changed name due to PSA specification.
+ */
+#define PSA_DH_GROUP_RFC7919 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_CUSTOM \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_CUSTOM )
+
+/*
+ * Deprecated PSA Crypto stream cipher algorithms (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ALG_ARC4 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_STREAM_CIPHER )
+#define PSA_ALG_CHACHA20 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_STREAM_CIPHER )
+
+/*
+ * Renamed AEAD tag length macros (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ALG_AEAD_WITH_DEFAULT_TAG_LENGTH( aead_alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG( aead_alg ) )
+#define PSA_ALG_AEAD_WITH_TAG_LENGTH( aead_alg, tag_length ) \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_AEAD_WITH_SHORTENED_TAG( aead_alg, tag_length ) )
+
+/*
+ * Deprecated PSA AEAD output size macros (PSA Crypto API  <= 1.0 beta3)
+ */
+
+/** The tag size for an AEAD algorithm, in bytes.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    The tag size for the specified algorithm.
+ *                            If the AEAD algorithm does not have an identified
+ *                            tag that can be distinguished from the rest of
+ *                            the ciphertext, return 0.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_TAG_LENGTH_1_ARG( alg )     \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,     \
+        PSA_ALG_IS_AEAD( alg ) ?             \
+        PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) : \
+        0 )
+
+/** The maximum size of the output of psa_aead_encrypt(), in bytes.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_encrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the ciphertext may be smaller.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_SIZE_2_ARG( alg, plaintext_length ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                            \
+        PSA_ALG_IS_AEAD( alg ) ?                                    \
+        (plaintext_length) + PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) :   \
+        0 )
+
+/** The maximum size of the output of psa_aead_decrypt(), in bytes.
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_decrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the plaintext may be smaller.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param ciphertext_length   Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_SIZE_2_ARG( alg, ciphertext_length )   \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                               \
+        PSA_ALG_IS_AEAD( alg ) &&                                      \
+            (ciphertext_length) > PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) ? \
+            (ciphertext_length) - PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) : \
+        0 )
+
+/** A sufficient output buffer size for psa_aead_update().
+ *
+ * If the size of the output buffer is at least this large, it is
+ * guaranteed that psa_aead_update() will not fail due to an
+ * insufficient buffer size. The actual size of the output may be smaller
+ * in any given call.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param input_length        Size of the input in bytes.
+ *
+ * \return                    A sufficient output buffer size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+/* For all the AEAD modes defined in this specification, it is possible
+ * to emit output without delay. However, hardware may not always be
+ * capable of this. So for modes based on a block cipher, allow the
+ * implementation to delay the output until it has a full block. */
+#define PSA_AEAD_UPDATE_OUTPUT_SIZE_2_ARG( alg, input_length )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                              \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                                      \
+        PSA_ROUND_UP_TO_MULTIPLE( PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, (input_length) ) : \
+        (input_length) )
+
+/** A sufficient ciphertext buffer size for psa_aead_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_finish() will not fail due to an
+ * insufficient ciphertext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient ciphertext buffer size for the
+ *                            specified algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_FINISH_OUTPUT_SIZE_1_ARG( alg )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                        \
+        PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE :                               \
+        0 )
+
+/** A sufficient plaintext buffer size for psa_aead_verify().
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_verify() will not fail due to an
+ * insufficient plaintext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient plaintext buffer size for the
+ *                            specified algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_SIZE_1_ARG( alg )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                        \
+        PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE :                               \
+        0 )
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/** Open a handle to an existing persistent key.
+ *
+ * Open a handle to a persistent key. A key is persistent if it was created
+ * with a lifetime other than #PSA_KEY_LIFETIME_VOLATILE. A persistent key
+ * always has a nonzero key identifier, set with psa_set_key_id() when
+ * creating the key. Implementations may provide additional pre-provisioned
+ * keys that can be opened with psa_open_key(). Such keys have an application
+ * key identifier in the vendor range, as documented in the description of
+ * #psa_key_id_t.
+ *
+ * The application must eventually close the handle with psa_close_key() or
+ * psa_destroy_key() to release associated resources. If the application dies
+ * without calling one of these functions, the implementation should perform
+ * the equivalent of a call to psa_close_key().
+ *
+ * Some implementations permit an application to open the same key multiple
+ * times. If this is successful, each call to psa_open_key() will return a
+ * different key handle.
+ *
+ * \note This API is not part of the PSA Cryptography API Release 1.0.0
+ * specification. It was defined in the 1.0 Beta 3 version of the
+ * specification but was removed in the 1.0.0 released version. This API is
+ * kept for the time being to not break applications relying on it. It is not
+ * deprecated yet but will be in the near future.
+ *
+ * \note Applications that rely on opening a key multiple times will not be
+ * portable to implementations that only permit a single key handle to be
+ * opened. See also :ref:\`key-handles\`.
+ *
+ *
+ * \param key           The persistent identifier of the key.
+ * \param[out] handle   On success, a handle to the key.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success. The application can now use the value of `*handle`
+ *         to access the key.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ *         The implementation does not have sufficient resources to open the
+ *         key. This can be due to reaching an implementation limit on the
+ *         number of open keys, the number of open key handles, or available
+ *         memory.
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ *         There is no persistent key with key identifier \p key.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not a valid persistent key identifier.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The specified key exists, but the application does not have the
+ *         permission to access it. Note that this specification does not
+ *         define any way to create such a key, but it may be possible
+ *         through implementation-specific means.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_open_key( mbedtls_svc_key_id_t key,
+                           psa_key_handle_t *handle );
+
+/** Close a key handle.
+ *
+ * If the handle designates a volatile key, this will destroy the key material
+ * and free all associated resources, just like psa_destroy_key().
+ *
+ * If this is the last open handle to a persistent key, then closing the handle
+ * will free all resources associated with the key in volatile memory. The key
+ * data in persistent storage is not affected and can be opened again later
+ * with a call to psa_open_key().
+ *
+ * Closing the key handle makes the handle invalid, and the key handle
+ * must not be used again by the application.
+ *
+ * \note This API is not part of the PSA Cryptography API Release 1.0.0
+ * specification. It was defined in the 1.0 Beta 3 version of the
+ * specification but was removed in the 1.0.0 released version. This API is
+ * kept for the time being to not break applications relying on it. It is not
+ * deprecated yet but will be in the near future.
+ *
+ * \note If the key handle was used to set up an active
+ * :ref:\`multipart operation <multipart-operations>\`, then closing the
+ * key handle can cause the multipart operation to fail. Applications should
+ * maintain the key handle until after the multipart operation has finished.
+ *
+ * \param handle        The key handle to close.
+ *                      If this is \c 0, do nothing and return \c PSA_SUCCESS.
+ *
+ * \retval #PSA_SUCCESS
+ *         \p handle was a valid handle or \c 0. It is now closed.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p handle is not a valid handle nor \c 0.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_close_key(psa_key_handle_t handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_COMPAT_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_config.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_config.h
new file mode 100644
index 00000000000..e2446cb26c4
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_config.h
@@ -0,0 +1,129 @@
+/**
+ * \file psa/crypto_config.h
+ * \brief PSA crypto configuration options (set of defines)
+ *
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+/**
+ * When #MBEDTLS_PSA_CRYPTO_CONFIG is enabled in config.h,
+ * this file determines which cryptographic mechanisms are enabled
+ * through the PSA Cryptography API (\c psa_xxx() functions).
+ *
+ * To enable a cryptographic mechanism, uncomment the definition of
+ * the corresponding \c PSA_WANT_xxx preprocessor symbol.
+ * To disable a cryptographic mechanism, comment out the definition of
+ * the corresponding \c PSA_WANT_xxx preprocessor symbol.
+ * The names of cryptographic mechanisms correspond to values
+ * defined in psa/crypto_values.h, with the prefix \c PSA_WANT_ instead
+ * of \c PSA_.
+ *
+ * Note that many cryptographic mechanisms involve two symbols: one for
+ * the key type (\c PSA_WANT_KEY_TYPE_xxx) and one for the algorithm
+ * (\c PSA_WANT_ALG_xxx). Mechanisms with additional parameters may involve
+ * additional symbols.
+ */
+#else
+/**
+ * When \c MBEDTLS_PSA_CRYPTO_CONFIG is disabled in config.h,
+ * this file is not used, and cryptographic mechanisms are supported
+ * through the PSA API if and only if they are supported through the
+ * mbedtls_xxx API.
+ */
+#endif
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_CONFIG_H
+#define PSA_CRYPTO_CONFIG_H
+
+/*
+ * CBC-MAC is not yet supported via the PSA API in Mbed TLS.
+ */
+//#define PSA_WANT_ALG_CBC_MAC                    1
+#define PSA_WANT_ALG_CBC_NO_PADDING             1
+#define PSA_WANT_ALG_CBC_PKCS7                  1
+#define PSA_WANT_ALG_CCM                        1
+#define PSA_WANT_ALG_CMAC                       1
+#define PSA_WANT_ALG_CFB                        1
+#define PSA_WANT_ALG_CHACHA20_POLY1305          1
+#define PSA_WANT_ALG_CMAC                       1
+#define PSA_WANT_ALG_CTR                        1
+#define PSA_WANT_ALG_DETERMINISTIC_ECDSA        1
+#define PSA_WANT_ALG_ECB_NO_PADDING             1
+#define PSA_WANT_ALG_ECDH                       1
+#define PSA_WANT_ALG_ECDSA                      1
+#define PSA_WANT_ALG_GCM                        1
+#define PSA_WANT_ALG_HKDF                       1
+#define PSA_WANT_ALG_HMAC                       1
+#define PSA_WANT_ALG_MD2                        1
+#define PSA_WANT_ALG_MD4                        1
+#define PSA_WANT_ALG_MD5                        1
+#define PSA_WANT_ALG_OFB                        1
+#define PSA_WANT_ALG_RIPEMD160                  1
+#define PSA_WANT_ALG_RSA_OAEP                   1
+#define PSA_WANT_ALG_RSA_PKCS1V15_CRYPT         1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN          1
+#define PSA_WANT_ALG_RSA_PSS                    1
+#define PSA_WANT_ALG_SHA_1                      1
+#define PSA_WANT_ALG_SHA_224                    1
+#define PSA_WANT_ALG_SHA_256                    1
+#define PSA_WANT_ALG_SHA_384                    1
+#define PSA_WANT_ALG_SHA_512                    1
+#define PSA_WANT_ALG_STREAM_CIPHER              1
+#define PSA_WANT_ALG_TLS12_PRF                  1
+#define PSA_WANT_ALG_TLS12_PSK_TO_MS            1
+#define PSA_WANT_ALG_XTS                        1
+
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_256         1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_384         1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_512         1
+#define PSA_WANT_ECC_MONTGOMERY_255             1
+/*
+ * Curve448 is not yet supported via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/4249). Thus, do not enable it by
+ * default.
+ */
+//#define PSA_WANT_ECC_MONTGOMERY_448             1
+#define PSA_WANT_ECC_SECP_K1_192                1
+/*
+ * SECP224K1 is buggy via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/3541). Thus, do not enable it by
+ * default.
+ */
+//#define PSA_WANT_ECC_SECP_K1_224                1
+#define PSA_WANT_ECC_SECP_K1_256                1
+#define PSA_WANT_ECC_SECP_R1_192                1
+#define PSA_WANT_ECC_SECP_R1_224                1
+#define PSA_WANT_ECC_SECP_R1_256                1
+#define PSA_WANT_ECC_SECP_R1_384                1
+#define PSA_WANT_ECC_SECP_R1_521                1
+
+#define PSA_WANT_KEY_TYPE_DERIVE                1
+#define PSA_WANT_KEY_TYPE_HMAC                  1
+#define PSA_WANT_KEY_TYPE_AES                   1
+#define PSA_WANT_KEY_TYPE_ARC4                  1
+#define PSA_WANT_KEY_TYPE_ARIA                  1
+#define PSA_WANT_KEY_TYPE_CAMELLIA              1
+#define PSA_WANT_KEY_TYPE_CHACHA20              1
+#define PSA_WANT_KEY_TYPE_DES                   1
+#define PSA_WANT_KEY_TYPE_ECC_KEY_PAIR          1
+#define PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY        1
+#define PSA_WANT_KEY_TYPE_RAW_DATA              1
+#define PSA_WANT_KEY_TYPE_RSA_KEY_PAIR          1
+#define PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY        1
+
+#endif /* PSA_CRYPTO_CONFIG_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h
new file mode 100644
index 00000000000..26363c6b2f3
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h
@@ -0,0 +1,56 @@
+/**
+ * \file psa/crypto_driver_common.h
+ * \brief Definitions for all PSA crypto drivers
+ *
+ * This file contains common definitions shared by all PSA crypto drivers.
+ * Do not include it directly: instead, include the header file(s) for
+ * the type(s) of driver that you are implementing. For example, if
+ * you are writing a dynamically registered driver for a secure element,
+ * include `psa/crypto_se_driver.h`.
+ *
+ * This file is part of the PSA Crypto Driver Model, containing functions for
+ * driver developers to implement to enable hardware to be called in a
+ * standardized way by a PSA Cryptographic API implementation. The functions
+ * comprising the driver model, which driver authors implement, are not
+ * intended to be called by application developers.
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef PSA_CRYPTO_DRIVER_COMMON_H
+#define PSA_CRYPTO_DRIVER_COMMON_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* Include type definitions (psa_status_t, psa_algorithm_t,
+ * psa_key_type_t, etc.) and macros to build and analyze values
+ * of these types. */
+#include "crypto_types.h"
+#include "crypto_values.h"
+/* Include size definitions which are used to size some arrays in operation
+ * structures. */
+#include <psa/crypto_sizes.h>
+
+/** For encrypt-decrypt functions, whether the operation is an encryption
+ * or a decryption. */
+typedef enum {
+    PSA_CRYPTO_DRIVER_DECRYPT,
+    PSA_CRYPTO_DRIVER_ENCRYPT
+} psa_encrypt_or_decrypt_t;
+
+#endif /* PSA_CRYPTO_DRIVER_COMMON_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h
new file mode 100644
index 00000000000..a7220091ea3
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h
@@ -0,0 +1,93 @@
+/*
+ *  Declaration of context structures for use with the PSA driver wrapper
+ *  interface. This file contains the context structures for 'composite'
+ *  operations, i.e. those operations which need to make use of other operations
+ *  from the primitives (crypto_driver_contexts_primitives.h)
+ *
+ *  Warning: This file will be auto-generated in the future.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the PSA drivers included in the cryptographic
+ * library. The definition of these objects are then used by crypto_struct.h
+ * to define the implementation-defined types of PSA multi-part state objects.
+ */
+/*  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H
+#define PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H
+
+#include "psa/crypto_driver_common.h"
+
+/* Include the context structure definitions for the Mbed TLS software drivers */
+#include "psa/crypto_builtin_composites.h"
+
+/* Include the context structure definitions for those drivers that were
+ * declared during the autogeneration process. */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1)
+#include <libtestdriver1/include/psa/crypto.h>
+#endif
+
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_MAC)
+typedef libtestdriver1_mbedtls_psa_mac_operation_t
+        mbedtls_transparent_test_driver_mac_operation_t;
+typedef libtestdriver1_mbedtls_psa_mac_operation_t
+        mbedtls_opaque_test_driver_mac_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_MAC_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_MAC_OPERATION_INIT
+#define MBEDTLS_OPAQUE_TEST_DRIVER_MAC_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_MAC_OPERATION_INIT
+
+#else
+typedef mbedtls_psa_mac_operation_t
+        mbedtls_transparent_test_driver_mac_operation_t;
+typedef mbedtls_psa_mac_operation_t
+        mbedtls_opaque_test_driver_mac_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_MAC_OPERATION_INIT \
+        MBEDTLS_PSA_MAC_OPERATION_INIT
+#define MBEDTLS_OPAQUE_TEST_DRIVER_MAC_OPERATION_INIT \
+        MBEDTLS_PSA_MAC_OPERATION_INIT
+
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 */
+#endif /* PSA_CRYPTO_DRIVER_TEST */
+
+/* Define the context to be used for an operation that is executed through the
+ * PSA Driver wrapper layer as the union of all possible driver's contexts.
+ *
+ * The union members are the driver's context structures, and the member names
+ * are formatted as `'drivername'_ctx`. This allows for procedural generation
+ * of both this file and the content of psa_crypto_driver_wrappers.c */
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_mac_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_mac_operation_t transparent_test_driver_ctx;
+    mbedtls_opaque_test_driver_mac_operation_t opaque_test_driver_ctx;
+#endif
+} psa_driver_mac_context_t;
+
+#endif /* PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H */
+/* End of automatically generated file. */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h
new file mode 100644
index 00000000000..2bb01ed432f
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h
@@ -0,0 +1,117 @@
+/*
+ *  Declaration of context structures for use with the PSA driver wrapper
+ *  interface. This file contains the context structures for 'primitive'
+ *  operations, i.e. those operations which do not rely on other contexts.
+ *
+ *  Warning: This file will be auto-generated in the future.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the PSA drivers included in the cryptographic
+ * library. The definition of these objects are then used by crypto_struct.h
+ * to define the implementation-defined types of PSA multi-part state objects.
+ */
+/*  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H
+#define PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H
+
+#include "psa/crypto_driver_common.h"
+
+/* Include the context structure definitions for the Mbed TLS software drivers */
+#include "psa/crypto_builtin_primitives.h"
+
+/* Include the context structure definitions for those drivers that were
+ * declared during the autogeneration process. */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1)
+#include <libtestdriver1/include/psa/crypto.h>
+#endif
+
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_CIPHER)
+typedef libtestdriver1_mbedtls_psa_cipher_operation_t
+        mbedtls_transparent_test_driver_cipher_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_CIPHER_OPERATION_INIT
+#else
+typedef mbedtls_psa_cipher_operation_t
+        mbedtls_transparent_test_driver_cipher_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT \
+        MBEDTLS_PSA_CIPHER_OPERATION_INIT
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 &&
+          LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_CIPHER */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_HASH)
+typedef libtestdriver1_mbedtls_psa_hash_operation_t
+        mbedtls_transparent_test_driver_hash_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_HASH_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_HASH_OPERATION_INIT
+#else
+typedef mbedtls_psa_hash_operation_t
+        mbedtls_transparent_test_driver_hash_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_HASH_OPERATION_INIT \
+        MBEDTLS_PSA_HASH_OPERATION_INIT
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 &&
+          LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_HASH */
+
+typedef struct {
+    unsigned int initialised : 1;
+    mbedtls_transparent_test_driver_cipher_operation_t ctx;
+} mbedtls_opaque_test_driver_cipher_operation_t;
+
+#define MBEDTLS_OPAQUE_TEST_DRIVER_CIPHER_OPERATION_INIT \
+     { 0, MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT }
+
+#endif /* PSA_CRYPTO_DRIVER_TEST */
+
+/* Define the context to be used for an operation that is executed through the
+ * PSA Driver wrapper layer as the union of all possible driver's contexts.
+ *
+ * The union members are the driver's context structures, and the member names
+ * are formatted as `'drivername'_ctx`. This allows for procedural generation
+ * of both this file and the content of psa_crypto_driver_wrappers.c */
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_hash_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_hash_operation_t test_driver_ctx;
+#endif
+} psa_driver_hash_context_t;
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_cipher_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_cipher_operation_t transparent_test_driver_ctx;
+    mbedtls_opaque_test_driver_cipher_operation_t opaque_test_driver_ctx;
+#endif
+} psa_driver_cipher_context_t;
+
+#endif /* PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H */
+/* End of automatically generated file. */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_extra.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_extra.h
new file mode 100644
index 00000000000..3ee0482cbda
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_extra.h
@@ -0,0 +1,819 @@
+/**
+ * \file psa/crypto_extra.h
+ *
+ * \brief PSA cryptography module: Mbed TLS vendor extensions
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file is reserved for vendor-specific definitions.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_EXTRA_H
+#define PSA_CRYPTO_EXTRA_H
+
+#include "mbedtls/platform_util.h"
+
+#include "crypto_types.h"
+#include "crypto_compat.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* UID for secure storage seed */
+#define PSA_CRYPTO_ITS_RANDOM_SEED_UID 0xFFFFFF52
+
+/* See config.h for definition */
+#if !defined(MBEDTLS_PSA_KEY_SLOT_COUNT)
+#define MBEDTLS_PSA_KEY_SLOT_COUNT 32
+#endif
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** \brief Declare the enrollment algorithm for a key.
+ *
+ * An operation on a key may indifferently use the algorithm set with
+ * psa_set_key_algorithm() or with this function.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param alg2                  A second algorithm that the key may be used
+ *                              for, in addition to the algorithm set with
+ *                              psa_set_key_algorithm().
+ *
+ * \warning Setting an enrollment algorithm is not recommended, because
+ *          using the same key with different algorithms can allow some
+ *          attacks based on arithmetic relations between different
+ *          computations made with the same key, or can escalate harmless
+ *          side channels into exploitable ones. Use this function only
+ *          if it is necessary to support a protocol for which it has been
+ *          verified that the usage of the key with multiple algorithms
+ *          is safe.
+ */
+static inline void psa_set_key_enrollment_algorithm(
+    psa_key_attributes_t *attributes,
+    psa_algorithm_t alg2)
+{
+    attributes->core.policy.alg2 = alg2;
+}
+
+/** Retrieve the enrollment algorithm policy from key attributes.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The enrollment algorithm stored in the attribute structure.
+ */
+static inline psa_algorithm_t psa_get_key_enrollment_algorithm(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.alg2 );
+}
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+
+/** Retrieve the slot number where a key is stored.
+ *
+ * A slot number is only defined for keys that are stored in a secure
+ * element.
+ *
+ * This information is only useful if the secure element is not entirely
+ * managed through the PSA Cryptography API. It is up to the secure
+ * element driver to decide how PSA slot numbers map to any other interface
+ * that the secure element may have.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ * \param[out] slot_number      On success, the slot number containing the key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key is located in a secure element, and \p *slot_number
+ *         indicates the slot number that contains it.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The caller is not permitted to query the slot number.
+ *         Mbed Crypto currently does not return this error.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key is not located in a secure element.
+ */
+psa_status_t psa_get_key_slot_number(
+    const psa_key_attributes_t *attributes,
+    psa_key_slot_number_t *slot_number );
+
+/** Choose the slot number where a key is stored.
+ *
+ * This function declares a slot number in the specified attribute
+ * structure.
+ *
+ * A slot number is only meaningful for keys that are stored in a secure
+ * element. It is up to the secure element driver to decide how PSA slot
+ * numbers map to any other interface that the secure element may have.
+ *
+ * \note Setting a slot number in key attributes for a key creation can
+ *       cause the following errors when creating the key:
+ *       - #PSA_ERROR_NOT_SUPPORTED if the selected secure element does
+ *         not support choosing a specific slot number.
+ *       - #PSA_ERROR_NOT_PERMITTED if the caller is not permitted to
+ *         choose slot numbers in general or to choose this specific slot.
+ *       - #PSA_ERROR_INVALID_ARGUMENT if the chosen slot number is not
+ *         valid in general or not valid for this specific key.
+ *       - #PSA_ERROR_ALREADY_EXISTS if there is already a key in the
+ *         selected slot.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param slot_number           The slot number to set.
+ */
+static inline void psa_set_key_slot_number(
+    psa_key_attributes_t *attributes,
+    psa_key_slot_number_t slot_number )
+{
+    attributes->core.flags |= MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER;
+    attributes->slot_number = slot_number;
+}
+
+/** Remove the slot number attribute from a key attribute structure.
+ *
+ * This function undoes the action of psa_set_key_slot_number().
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ */
+static inline void psa_clear_key_slot_number(
+    psa_key_attributes_t *attributes )
+{
+    attributes->core.flags &= ~MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER;
+}
+
+/** Register a key that is already present in a secure element.
+ *
+ * The key must be located in a secure element designated by the
+ * lifetime field in \p attributes, in the slot set with
+ * psa_set_key_slot_number() in the attribute structure.
+ * This function makes the key available through the key identifier
+ * specified in \p attributes.
+ *
+ * \param[in] attributes        The attributes of the existing key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key was successfully registered.
+ *         Note that depending on the design of the driver, this may or may
+ *         not guarantee that a key actually exists in the designated slot
+ *         and is compatible with the specified attributes.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a key with the identifier specified in
+ *         \p attributes.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The secure element driver for the specified lifetime does not
+ *         support registering a key.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The identifier in \p attributes is invalid, namely the identifier is
+ *         not in the user range.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p attributes specifies a lifetime which is not located
+ *         in a secure element.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         No slot number is specified in \p attributes,
+ *         or the specified slot number is not valid.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The caller is not authorized to register the specified key slot.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t mbedtls_psa_register_se_key(
+    const psa_key_attributes_t *attributes);
+
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+
+/**@}*/
+
+/**
+ * \brief Library deinitialization.
+ *
+ * This function clears all data associated with the PSA layer,
+ * including the whole key store.
+ *
+ * This is an Mbed TLS extension.
+ */
+void mbedtls_psa_crypto_free( void );
+
+/** \brief Statistics about
+ * resource consumption related to the PSA keystore.
+ *
+ * \note The content of this structure is not part of the stable API and ABI
+ *       of Mbed Crypto and may change arbitrarily from version to version.
+ */
+typedef struct mbedtls_psa_stats_s
+{
+    /** Number of slots containing key material for a volatile key. */
+    size_t volatile_slots;
+    /** Number of slots containing key material for a key which is in
+     * internal persistent storage. */
+    size_t persistent_slots;
+    /** Number of slots containing a reference to a key in a
+     * secure element. */
+    size_t external_slots;
+    /** Number of slots which are occupied, but do not contain
+     * key material yet. */
+    size_t half_filled_slots;
+    /** Number of slots that contain cache data. */
+    size_t cache_slots;
+    /** Number of slots that are not used for anything. */
+    size_t empty_slots;
+    /** Number of slots that are locked. */
+    size_t locked_slots;
+    /** Largest key id value among open keys in internal persistent storage. */
+    psa_key_id_t max_open_internal_key_id;
+    /** Largest key id value among open keys in secure elements. */
+    psa_key_id_t max_open_external_key_id;
+} mbedtls_psa_stats_t;
+
+/** \brief Get statistics about
+ * resource consumption related to the PSA keystore.
+ *
+ * \note When Mbed Crypto is built as part of a service, with isolation
+ *       between the application and the keystore, the service may or
+ *       may not expose this function.
+ */
+void mbedtls_psa_get_stats( mbedtls_psa_stats_t *stats );
+
+/**
+ * \brief Inject an initial entropy seed for the random generator into
+ *        secure storage.
+ *
+ * This function injects data to be used as a seed for the random generator
+ * used by the PSA Crypto implementation. On devices that lack a trusted
+ * entropy source (preferably a hardware random number generator),
+ * the Mbed PSA Crypto implementation uses this value to seed its
+ * random generator.
+ *
+ * On devices without a trusted entropy source, this function must be
+ * called exactly once in the lifetime of the device. On devices with
+ * a trusted entropy source, calling this function is optional.
+ * In all cases, this function may only be called before calling any
+ * other function in the PSA Crypto API, including psa_crypto_init().
+ *
+ * When this function returns successfully, it populates a file in
+ * persistent storage. Once the file has been created, this function
+ * can no longer succeed.
+ *
+ * If any error occurs, this function does not change the system state.
+ * You can call this function again after correcting the reason for the
+ * error if possible.
+ *
+ * \warning This function **can** fail! Callers MUST check the return status.
+ *
+ * \warning If you use this function, you should use it as part of a
+ *          factory provisioning process. The value of the injected seed
+ *          is critical to the security of the device. It must be
+ *          *secret*, *unpredictable* and (statistically) *unique per device*.
+ *          You should be generate it randomly using a cryptographically
+ *          secure random generator seeded from trusted entropy sources.
+ *          You should transmit it securely to the device and ensure
+ *          that its value is not leaked or stored anywhere beyond the
+ *          needs of transmitting it from the point of generation to
+ *          the call of this function, and erase all copies of the value
+ *          once this function returns.
+ *
+ * This is an Mbed TLS extension.
+ *
+ * \note This function is only available on the following platforms:
+ * * If the compile-time option MBEDTLS_PSA_INJECT_ENTROPY is enabled.
+ *   Note that you must provide compatible implementations of
+ *   mbedtls_nv_seed_read and mbedtls_nv_seed_write.
+ * * In a client-server integration of PSA Cryptography, on the client side,
+ *   if the server supports this feature.
+ * \param[in] seed          Buffer containing the seed value to inject.
+ * \param[in] seed_size     Size of the \p seed buffer.
+ *                          The size of the seed in bytes must be greater
+ *                          or equal to both #MBEDTLS_ENTROPY_MIN_PLATFORM
+ *                          and #MBEDTLS_ENTROPY_BLOCK_SIZE.
+ *                          It must be less or equal to
+ *                          #MBEDTLS_ENTROPY_MAX_SEED_SIZE.
+ *
+ * \retval #PSA_SUCCESS
+ *         The seed value was injected successfully. The random generator
+ *         of the PSA Crypto implementation is now ready for use.
+ *         You may now call psa_crypto_init() and use the PSA Crypto
+ *         implementation.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p seed_size is out of range.
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         There was a failure reading or writing from storage.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The library has already been initialized. It is no longer
+ *         possible to call this function.
+ */
+psa_status_t mbedtls_psa_inject_entropy(const uint8_t *seed,
+                                        size_t seed_size);
+
+/** \addtogroup crypto_types
+ * @{
+ */
+
+/** DSA public key.
+ *
+ * The import and export format is the
+ * representation of the public key `y = g^x mod p` as a big-endian byte
+ * string. The length of the byte string is the length of the base prime `p`
+ * in bytes.
+ */
+#define PSA_KEY_TYPE_DSA_PUBLIC_KEY                 ((psa_key_type_t)0x4002)
+
+/** DSA key pair (private and public key).
+ *
+ * The import and export format is the
+ * representation of the private key `x` as a big-endian byte string. The
+ * length of the byte string is the private key size in bytes (leading zeroes
+ * are not stripped).
+ *
+ * Determinstic DSA key derivation with psa_generate_derived_key follows
+ * FIPS 186-4 &sect;B.1.2: interpret the byte string as integer
+ * in big-endian order. Discard it if it is not in the range
+ * [0, *N* - 2] where *N* is the boundary of the private key domain
+ * (the prime *p* for Diffie-Hellman, the subprime *q* for DSA,
+ * or the order of the curve's base point for ECC).
+ * Add 1 to the resulting integer and use this as the private key *x*.
+ *
+ */
+#define PSA_KEY_TYPE_DSA_KEY_PAIR                    ((psa_key_type_t)0x7002)
+
+/** Whether a key type is an DSA key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_DSA(type)                                       \
+    (PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) == PSA_KEY_TYPE_DSA_PUBLIC_KEY)
+
+#define PSA_ALG_DSA_BASE                        ((psa_algorithm_t)0x06000400)
+/** DSA signature with hashing.
+ *
+ * This is the signature scheme defined by FIPS 186-4,
+ * with a random per-message secret number (*k*).
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding DSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DSA(hash_alg)                             \
+    (PSA_ALG_DSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_DETERMINISTIC_DSA_BASE          ((psa_algorithm_t)0x06000500)
+#define PSA_ALG_DSA_DETERMINISTIC_FLAG PSA_ALG_ECDSA_DETERMINISTIC_FLAG
+/** Deterministic DSA signature with hashing.
+ *
+ * This is the deterministic variant defined by RFC 6979 of
+ * the signature scheme defined by FIPS 186-4.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding DSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DETERMINISTIC_DSA(hash_alg)                             \
+    (PSA_ALG_DETERMINISTIC_DSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_IS_DSA(alg)                                             \
+    (((alg) & ~PSA_ALG_HASH_MASK & ~PSA_ALG_DSA_DETERMINISTIC_FLAG) ==  \
+     PSA_ALG_DSA_BASE)
+#define PSA_ALG_DSA_IS_DETERMINISTIC(alg)               \
+    (((alg) & PSA_ALG_DSA_DETERMINISTIC_FLAG) != 0)
+#define PSA_ALG_IS_DETERMINISTIC_DSA(alg)                       \
+    (PSA_ALG_IS_DSA(alg) && PSA_ALG_DSA_IS_DETERMINISTIC(alg))
+#define PSA_ALG_IS_RANDOMIZED_DSA(alg)                          \
+    (PSA_ALG_IS_DSA(alg) && !PSA_ALG_DSA_IS_DETERMINISTIC(alg))
+
+
+/* We need to expand the sample definition of this macro from
+ * the API definition. */
+#undef PSA_ALG_IS_VENDOR_HASH_AND_SIGN
+#define PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg)    \
+    PSA_ALG_IS_DSA(alg)
+
+/**@}*/
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** Custom Diffie-Hellman group.
+ *
+ * For keys of type #PSA_KEY_TYPE_DH_PUBLIC_KEY(#PSA_DH_FAMILY_CUSTOM) or
+ * #PSA_KEY_TYPE_DH_KEY_PAIR(#PSA_DH_FAMILY_CUSTOM), the group data comes
+ * from domain parameters set by psa_set_key_domain_parameters().
+ */
+#define PSA_DH_FAMILY_CUSTOM             ((psa_dh_family_t) 0x7e)
+
+
+/**
+ * \brief Set domain parameters for a key.
+ *
+ * Some key types require additional domain parameters in addition to
+ * the key type identifier and the key size. Use this function instead
+ * of psa_set_key_type() when you need to specify domain parameters.
+ *
+ * The format for the required domain parameters varies based on the key type.
+ *
+ * - For RSA keys (#PSA_KEY_TYPE_RSA_PUBLIC_KEY or #PSA_KEY_TYPE_RSA_KEY_PAIR),
+ *   the domain parameter data consists of the public exponent,
+ *   represented as a big-endian integer with no leading zeros.
+ *   This information is used when generating an RSA key pair.
+ *   When importing a key, the public exponent is read from the imported
+ *   key data and the exponent recorded in the attribute structure is ignored.
+ *   As an exception, the public exponent 65537 is represented by an empty
+ *   byte string.
+ * - For DSA keys (#PSA_KEY_TYPE_DSA_PUBLIC_KEY or #PSA_KEY_TYPE_DSA_KEY_PAIR),
+ *   the `Dss-Parms` format as defined by RFC 3279 &sect;2.3.2.
+ *   ```
+ *   Dss-Parms ::= SEQUENCE  {
+ *      p       INTEGER,
+ *      q       INTEGER,
+ *      g       INTEGER
+ *   }
+ *   ```
+ * - For Diffie-Hellman key exchange keys
+ *   (#PSA_KEY_TYPE_DH_PUBLIC_KEY(#PSA_DH_FAMILY_CUSTOM) or
+ *   #PSA_KEY_TYPE_DH_KEY_PAIR(#PSA_DH_FAMILY_CUSTOM)), the
+ *   `DomainParameters` format as defined by RFC 3279 &sect;2.3.3.
+ *   ```
+ *   DomainParameters ::= SEQUENCE {
+ *      p               INTEGER,                    -- odd prime, p=jq +1
+ *      g               INTEGER,                    -- generator, g
+ *      q               INTEGER,                    -- factor of p-1
+ *      j               INTEGER OPTIONAL,           -- subgroup factor
+ *      validationParms ValidationParms OPTIONAL
+ *   }
+ *   ValidationParms ::= SEQUENCE {
+ *      seed            BIT STRING,
+ *      pgenCounter     INTEGER
+ *   }
+ *   ```
+ *
+ * \note This function may allocate memory or other resources.
+ *       Once you have called this function on an attribute structure,
+ *       you must call psa_reset_key_attributes() to free these resources.
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param[in,out] attributes    Attribute structure where the specified domain
+ *                              parameters will be stored.
+ *                              If this function fails, the content of
+ *                              \p attributes is not modified.
+ * \param type                  Key type (a \c PSA_KEY_TYPE_XXX value).
+ * \param[in] data              Buffer containing the key domain parameters.
+ *                              The content of this buffer is interpreted
+ *                              according to \p type as described above.
+ * \param data_length           Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ */
+psa_status_t psa_set_key_domain_parameters(psa_key_attributes_t *attributes,
+                                           psa_key_type_t type,
+                                           const uint8_t *data,
+                                           size_t data_length);
+
+/**
+ * \brief Get domain parameters for a key.
+ *
+ * Get the domain parameters for a key with this function, if any. The format
+ * of the domain parameters written to \p data is specified in the
+ * documentation for psa_set_key_domain_parameters().
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ * \param[out] data             On success, the key domain parameters.
+ * \param data_size             Size of the \p data buffer in bytes.
+ *                              The buffer is guaranteed to be large
+ *                              enough if its size in bytes is at least
+ *                              the value given by
+ *                              PSA_KEY_DOMAIN_PARAMETERS_SIZE().
+ * \param[out] data_length      On success, the number of bytes
+ *                              that make up the key domain parameters data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ */
+psa_status_t psa_get_key_domain_parameters(
+    const psa_key_attributes_t *attributes,
+    uint8_t *data,
+    size_t data_size,
+    size_t *data_length);
+
+/** Safe output buffer size for psa_get_key_domain_parameters().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param key_type  A supported key type.
+ * \param key_bits  The size of the key in bits.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_get_key_domain_parameters() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported
+ *         by the implementation, this macro shall return either a
+ *         sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_KEY_DOMAIN_PARAMETERS_SIZE(key_type, key_bits)              \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? sizeof(int) :                      \
+     PSA_KEY_TYPE_IS_DH(key_type) ? PSA_DH_KEY_DOMAIN_PARAMETERS_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_DSA(key_type) ? PSA_DSA_KEY_DOMAIN_PARAMETERS_SIZE(key_bits) : \
+     0)
+#define PSA_DH_KEY_DOMAIN_PARAMETERS_SIZE(key_bits)     \
+    (4 + (PSA_BITS_TO_BYTES(key_bits) + 5) * 3 /*without optional parts*/)
+#define PSA_DSA_KEY_DOMAIN_PARAMETERS_SIZE(key_bits)    \
+    (4 + (PSA_BITS_TO_BYTES(key_bits) + 5) * 2 /*p, g*/ + 34 /*q*/)
+
+/**@}*/
+
+/** \defgroup psa_tls_helpers TLS helper functions
+ * @{
+ */
+
+#if defined(MBEDTLS_ECP_C)
+#include <mbedtls/ecp.h>
+
+/** Convert an ECC curve identifier from the Mbed TLS encoding to PSA.
+ *
+ * \note This function is provided solely for the convenience of
+ *       Mbed TLS and may be removed at any time without notice.
+ *
+ * \param grpid         An Mbed TLS elliptic curve identifier
+ *                      (`MBEDTLS_ECP_DP_xxx`).
+ * \param[out] bits     On success, the bit size of the curve.
+ *
+ * \return              The corresponding PSA elliptic curve identifier
+ *                      (`PSA_ECC_FAMILY_xxx`).
+ * \return              \c 0 on failure (\p grpid is not recognized).
+ */
+static inline psa_ecc_family_t mbedtls_ecc_group_to_psa( mbedtls_ecp_group_id grpid,
+                                                        size_t *bits )
+{
+    switch( grpid )
+    {
+        case MBEDTLS_ECP_DP_SECP192R1:
+            *bits = 192;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP224R1:
+            *bits = 224;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP256R1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP384R1:
+            *bits = 384;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP521R1:
+            *bits = 521;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_BP256R1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_BP384R1:
+            *bits = 384;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_BP512R1:
+            *bits = 512;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_CURVE25519:
+            *bits = 255;
+            return( PSA_ECC_FAMILY_MONTGOMERY );
+        case MBEDTLS_ECP_DP_SECP192K1:
+            *bits = 192;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_SECP224K1:
+            *bits = 224;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_SECP256K1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_CURVE448:
+            *bits = 448;
+            return( PSA_ECC_FAMILY_MONTGOMERY );
+        default:
+            *bits = 0;
+            return( 0 );
+    }
+}
+
+/** Convert an ECC curve identifier from the PSA encoding to Mbed TLS.
+ *
+ * \note This function is provided solely for the convenience of
+ *       Mbed TLS and may be removed at any time without notice.
+ *
+ * \param curve         A PSA elliptic curve identifier
+ *                      (`PSA_ECC_FAMILY_xxx`).
+ * \param bits          The bit-length of a private key on \p curve.
+ * \param bits_is_sloppy If true, \p bits may be the bit-length rounded up
+ *                      to the nearest multiple of 8. This allows the caller
+ *                      to infer the exact curve from the length of a key
+ *                      which is supplied as a byte string.
+ *
+ * \return              The corresponding Mbed TLS elliptic curve identifier
+ *                      (`MBEDTLS_ECP_DP_xxx`).
+ * \return              #MBEDTLS_ECP_DP_NONE if \c curve is not recognized.
+ * \return              #MBEDTLS_ECP_DP_NONE if \p bits is not
+ *                      correct for \p curve.
+ */
+mbedtls_ecp_group_id mbedtls_ecc_group_of_psa( psa_ecc_family_t curve,
+                                               size_t bits,
+                                               int bits_is_sloppy );
+#endif /* MBEDTLS_ECP_C */
+
+/**@}*/
+
+/** \defgroup psa_external_rng External random generator
+ * @{
+ */
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+/** External random generator function, implemented by the platform.
+ *
+ * When the compile-time option #MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG is enabled,
+ * this function replaces Mbed TLS's entropy and DRBG modules for all
+ * random generation triggered via PSA crypto interfaces.
+ *
+ * \note This random generator must deliver random numbers with cryptographic
+ *       quality and high performance. It must supply unpredictable numbers
+ *       with a uniform distribution. The implementation of this function
+ *       is responsible for ensuring that the random generator is seeded
+ *       with sufficient entropy. If you have a hardware TRNG which is slow
+ *       or delivers non-uniform output, declare it as an entropy source
+ *       with mbedtls_entropy_add_source() instead of enabling this option.
+ *
+ * \param[in,out] context       Pointer to the random generator context.
+ *                              This is all-bits-zero on the first call
+ *                              and preserved between successive calls.
+ * \param[out] output           Output buffer. On success, this buffer
+ *                              contains random data with a uniform
+ *                              distribution.
+ * \param output_size           The size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, set this value to \p output_size.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success. The output buffer contains \p output_size bytes of
+ *         cryptographic-quality random data, and \c *output_length is
+ *         set to \p output_size.
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ *         The random generator requires extra entropy and there is no
+ *         way to obtain entropy under current environment conditions.
+ *         This error should not happen under normal circumstances since
+ *         this function is responsible for obtaining as much entropy as
+ *         it needs. However implementations of this function may return
+ *         #PSA_ERROR_INSUFFICIENT_ENTROPY if there is no way to obtain
+ *         entropy without blocking indefinitely.
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ *         A failure of the random generator hardware that isn't covered
+ *         by #PSA_ERROR_INSUFFICIENT_ENTROPY.
+ */
+psa_status_t mbedtls_psa_external_get_random(
+    mbedtls_psa_external_random_context_t *context,
+    uint8_t *output, size_t output_size, size_t *output_length );
+#endif /* MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG */
+
+/**@}*/
+
+/** \defgroup psa_builtin_keys Built-in keys
+ * @{
+ */
+
+/** The minimum value for a key identifier that is built into the
+ * implementation.
+ *
+ * The range of key identifiers from #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN
+ * to #MBEDTLS_PSA_KEY_ID_BUILTIN_MAX within the range from
+ * #PSA_KEY_ID_VENDOR_MIN and #PSA_KEY_ID_VENDOR_MAX and must not intersect
+ * with any other set of implementation-chosen key identifiers.
+ *
+ * This value is part of the library's ABI since changing it would invalidate
+ * the values of built-in key identifiers in applications.
+ */
+#define MBEDTLS_PSA_KEY_ID_BUILTIN_MIN          ((psa_key_id_t)0x7fff0000)
+
+/** The maximum value for a key identifier that is built into the
+ * implementation.
+ *
+ * See #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN for more information.
+ */
+#define MBEDTLS_PSA_KEY_ID_BUILTIN_MAX          ((psa_key_id_t)0x7fffefff)
+
+/** A slot number identifying a key in a driver.
+ *
+ * Values of this type are used to identify built-in keys.
+ */
+typedef uint64_t psa_drv_slot_number_t;
+
+#if defined(MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS)
+/** Test whether a key identifier belongs to the builtin key range.
+ *
+ * \param key_id  Key identifier to test.
+ *
+ * \retval 1
+ *         The key identifier is a builtin key identifier.
+ * \retval 0
+ *         The key identifier is not a builtin key identifier.
+ */
+static inline int psa_key_id_is_builtin( psa_key_id_t key_id )
+{
+    return( ( key_id >= MBEDTLS_PSA_KEY_ID_BUILTIN_MIN ) &&
+            ( key_id <= MBEDTLS_PSA_KEY_ID_BUILTIN_MAX ) );
+}
+
+/** Platform function to obtain the location and slot number of a built-in key.
+ *
+ * An application-specific implementation of this function must be provided if
+ * #MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS is enabled. This would typically be provided
+ * as part of a platform's system image.
+ *
+ * #MBEDTLS_SVC_KEY_ID_GET_KEY_ID(\p key_id) needs to be in the range from
+ * #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN to #MBEDTLS_PSA_KEY_ID_BUILTIN_MAX.
+ *
+ * In a multi-application configuration
+ * (\c MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER is defined),
+ * this function should check that #MBEDTLS_SVC_KEY_ID_GET_OWNER_ID(\p key_id)
+ * is allowed to use the given key.
+ *
+ * \param key_id                The key ID for which to retrieve the
+ *                              location and slot attributes.
+ * \param[out] lifetime         On success, the lifetime associated with the key
+ *                              corresponding to \p key_id. Lifetime is a
+ *                              combination of which driver contains the key,
+ *                              and with what persistence level the key is
+ *                              intended to be used. If the platform
+ *                              implementation does not contain specific
+ *                              information about the intended key persistence
+ *                              level, the persistence level may be reported as
+ *                              #PSA_KEY_PERSISTENCE_DEFAULT.
+ * \param[out] slot_number      On success, the slot number known to the driver
+ *                              registered at the lifetime location reported
+ *                              through \p lifetime which corresponds to the
+ *                              requested built-in key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The requested key identifier designates a built-in key.
+ *         In a multi-application configuration, the requested owner
+ *         is allowed to access it.
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ *         The requested key identifier is not a built-in key which is known
+ *         to this function. If a key exists in the key storage with this
+ *         identifier, the data from the storage will be used.
+ * \return (any other error)
+ *         Any other error is propagated to the function that requested the key.
+ *         Common errors include:
+ *         - #PSA_ERROR_NOT_PERMITTED: the key exists but the requested owner
+ *           is not allowed to access it.
+ */
+psa_status_t mbedtls_psa_platform_get_builtin_key(
+    mbedtls_svc_key_id_t key_id,
+    psa_key_lifetime_t *lifetime,
+    psa_drv_slot_number_t *slot_number );
+#endif /* MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS */
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_EXTRA_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_platform.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_platform.h
new file mode 100644
index 00000000000..66f46879305
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_platform.h
@@ -0,0 +1,111 @@
+/**
+ * \file psa/crypto_platform.h
+ *
+ * \brief PSA cryptography module: Mbed TLS platform definitions
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains platform-dependent type definitions.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, implementers should take care to ensure that
+ * the definitions that are exposed to applications match what the
+ * module implements.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_PLATFORM_H
+#define PSA_CRYPTO_PLATFORM_H
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+/* Translate between classic MBEDTLS_xxx feature symbols and PSA_xxx
+ * feature symbols. */
+#include "mbedtls/config_psa.h"
+
+/* PSA requires several types which C99 provides in stdint.h. */
+#include <stdint.h>
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+
+/* Building for the PSA Crypto service on a PSA platform, a key owner is a PSA
+ * partition identifier.
+ *
+ * The function psa_its_identifier_of_slot() in psa_crypto_storage.c that
+ * translates a key identifier to a key storage file name assumes that
+ * mbedtls_key_owner_id_t is an 32 bits integer. This function thus needs
+ * reworking if mbedtls_key_owner_id_t is not defined as a 32 bits integer
+ * here anymore.
+ */
+typedef int32_t mbedtls_key_owner_id_t;
+
+/** Compare two key owner identifiers.
+ *
+ * \param id1 First key owner identifier.
+ * \param id2 Second key owner identifier.
+ *
+ * \return Non-zero if the two key owner identifiers are equal, zero otherwise.
+ */
+static inline int mbedtls_key_owner_id_equal( mbedtls_key_owner_id_t id1,
+                                              mbedtls_key_owner_id_t id2 )
+{
+    return( id1 == id2 );
+}
+
+#endif /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/*
+ * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is being built for SPM
+ * (Secure Partition Manager) integration which separates the code into two
+ * parts: NSPE (Non-Secure Processing Environment) and SPE (Secure Processing
+ * Environment). When building for the SPE, an additional header file should be
+ * included.
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_SPM)
+#define PSA_CRYPTO_SECURE 1
+#include "crypto_spe.h"
+#endif // MBEDTLS_PSA_CRYPTO_SPM
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+/** The type of the context passed to mbedtls_psa_external_get_random().
+ *
+ * Mbed TLS initializes the context to all-bits-zero before calling
+ * mbedtls_psa_external_get_random() for the first time.
+ *
+ * The definition of this type in the Mbed TLS source code is for
+ * demonstration purposes. Implementers of mbedtls_psa_external_get_random()
+ * are expected to replace it with a custom definition.
+ */
+typedef struct {
+    uintptr_t opaque[2];
+} mbedtls_psa_external_random_context_t;
+#endif /* MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG */
+
+#endif /* PSA_CRYPTO_PLATFORM_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h
new file mode 100644
index 00000000000..1dc8f9b5c40
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h
@@ -0,0 +1,1395 @@
+/**
+ * \file psa/crypto_se_driver.h
+ * \brief PSA external cryptoprocessor driver module
+ *
+ * This header declares types and function signatures for cryptography
+ * drivers that access key material via opaque references.
+ * This is meant for cryptoprocessors that have a separate key storage from the
+ * space in which the PSA Crypto implementation runs, typically secure
+ * elements (SEs).
+ *
+ * This file is part of the PSA Crypto Driver HAL (hardware abstraction layer),
+ * containing functions for driver developers to implement to enable hardware
+ * to be called in a standardized way by a PSA Cryptography API
+ * implementation. The functions comprising the driver HAL, which driver
+ * authors implement, are not intended to be called by application developers.
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef PSA_CRYPTO_SE_DRIVER_H
+#define PSA_CRYPTO_SE_DRIVER_H
+
+#include "crypto_driver_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup se_init Secure element driver initialization
+ */
+/**@{*/
+
+/** \brief Driver context structure
+ *
+ * Driver functions receive a pointer to this structure.
+ * Each registered driver has one instance of this structure.
+ *
+ * Implementations must include the fields specified here and
+ * may include other fields.
+ */
+typedef struct {
+    /** A read-only pointer to the driver's persistent data.
+     *
+     * Drivers typically use this persistent data to keep track of
+     * which slot numbers are available. This is only a guideline:
+     * drivers may use the persistent data for any purpose, keeping
+     * in mind the restrictions on when the persistent data is saved
+     * to storage: the persistent data is only saved after calling
+     * certain functions that receive a writable pointer to the
+     * persistent data.
+     *
+     * The core allocates a memory buffer for the persistent data.
+     * The pointer is guaranteed to be suitably aligned for any data type,
+     * like a pointer returned by `malloc` (but the core can use any
+     * method to allocate the buffer, not necessarily `malloc`).
+     *
+     * The size of this buffer is in the \c persistent_data_size field of
+     * this structure.
+     *
+     * Before the driver is initialized for the first time, the content of
+     * the persistent data is all-bits-zero. After a driver upgrade, if the
+     * size of the persistent data has increased, the original data is padded
+     * on the right with zeros; if the size has decreased, the original data
+     * is truncated to the new size.
+     *
+     * This pointer is to read-only data. Only a few driver functions are
+     * allowed to modify the persistent data. These functions receive a
+     * writable pointer. These functions are:
+     * - psa_drv_se_t::p_init
+     * - psa_drv_se_key_management_t::p_allocate
+     * - psa_drv_se_key_management_t::p_destroy
+     *
+     * The PSA Cryptography core saves the persistent data from one
+     * session to the next. It does this before returning from API functions
+     * that call a driver method that is allowed to modify the persistent
+     * data, specifically:
+     * - psa_crypto_init() causes a call to psa_drv_se_t::p_init, and may call
+     *   psa_drv_se_key_management_t::p_destroy to complete an action
+     *   that was interrupted by a power failure.
+     * - Key creation functions cause a call to
+     *   psa_drv_se_key_management_t::p_allocate, and may cause a call to
+     *   psa_drv_se_key_management_t::p_destroy in case an error occurs.
+     * - psa_destroy_key() causes a call to
+     *   psa_drv_se_key_management_t::p_destroy.
+     */
+    const void *const persistent_data;
+
+    /** The size of \c persistent_data in bytes.
+     *
+     * This is always equal to the value of the `persistent_data_size` field
+     * of the ::psa_drv_se_t structure when the driver is registered.
+     */
+    const size_t persistent_data_size;
+
+    /** Driver transient data.
+     *
+     * The core initializes this value to 0 and does not read or modify it
+     * afterwards. The driver may store whatever it wants in this field.
+     */
+    uintptr_t transient_data;
+} psa_drv_se_context_t;
+
+/** \brief A driver initialization function.
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param location                  The location value for which this driver
+ *                                  is registered. The driver will be invoked
+ *                                  for all keys whose lifetime is in this
+ *                                  location.
+ *
+ * \retval #PSA_SUCCESS
+ *         The driver is operational.
+ *         The core will update the persistent data in storage.
+ * \return
+ *         Any other return value prevents the driver from being used in
+ *         this session.
+ *         The core will NOT update the persistent data in storage.
+ */
+typedef psa_status_t (*psa_drv_se_init_t)(psa_drv_se_context_t *drv_context,
+                                          void *persistent_data,
+                                          psa_key_location_t location);
+
+#if defined(__DOXYGEN_ONLY__) || !defined(MBEDTLS_PSA_CRYPTO_SE_C)
+/* Mbed Crypto with secure element support enabled defines this type in
+ * crypto_types.h because it is also visible to applications through an
+ * implementation-specific extension.
+ * For the PSA Cryptography specification, this type is only visible
+ * via crypto_se_driver.h. */
+/** An internal designation of a key slot between the core part of the
+ * PSA Crypto implementation and the driver. The meaning of this value
+ * is driver-dependent. */
+typedef uint64_t psa_key_slot_number_t;
+#endif /* __DOXYGEN_ONLY__ || !MBEDTLS_PSA_CRYPTO_SE_C */
+
+/**@}*/
+
+/** \defgroup se_mac Secure Element Message Authentication Codes
+ * Generation and authentication of Message Authentication Codes (MACs) using
+ * a secure element can be done either as a single function call (via the
+ * `psa_drv_se_mac_generate_t` or `psa_drv_se_mac_verify_t` functions), or in
+ * parts using the following sequence:
+ * - `psa_drv_se_mac_setup_t`
+ * - `psa_drv_se_mac_update_t`
+ * - `psa_drv_se_mac_update_t`
+ * - ...
+ * - `psa_drv_se_mac_finish_t` or `psa_drv_se_mac_finish_verify_t`
+ *
+ * If a previously started secure element MAC operation needs to be terminated,
+ * it should be done so by the `psa_drv_se_mac_abort_t`. Failure to do so may
+ * result in allocated resources not being freed or in other undefined
+ * behavior.
+ */
+/**@{*/
+/** \brief A function that starts a secure element  MAC operation for a PSA
+ * Crypto Driver implementation
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A structure that will contain the
+ *                              hardware-specific MAC context
+ * \param[in] key_slot          The slot of the key to be used for the
+ *                              operation
+ * \param[in] algorithm         The algorithm to be used to underly the MAC
+ *                              operation
+ *
+ * \retval  #PSA_SUCCESS
+ *          Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_setup_t)(psa_drv_se_context_t *drv_context,
+                                               void *op_context,
+                                               psa_key_slot_number_t key_slot,
+                                               psa_algorithm_t algorithm);
+
+/** \brief A function that continues a previously started secure element MAC
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously-established MAC operation to be
+ *                              updated
+ * \param[in] p_input           A buffer containing the message to be appended
+ *                              to the MAC operation
+ * \param[in] input_length      The size in bytes of the input message buffer
+ */
+typedef psa_status_t (*psa_drv_se_mac_update_t)(void *op_context,
+                                                const uint8_t *p_input,
+                                                size_t input_length);
+
+/** \brief a function that completes a previously started secure element MAC
+ * operation by returning the resulting MAC.
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started MAC operation to be
+ *                              finished
+ * \param[out] p_mac            A buffer where the generated MAC will be
+ *                              placed
+ * \param[in] mac_size          The size in bytes of the buffer that has been
+ *                              allocated for the `output` buffer
+ * \param[out] p_mac_length     After completion, will contain the number of
+ *                              bytes placed in the `p_mac` buffer
+ *
+ * \retval  #PSA_SUCCESS
+ *          Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_finish_t)(void *op_context,
+                                                uint8_t *p_mac,
+                                                size_t mac_size,
+                                                size_t *p_mac_length);
+
+/** \brief A function that completes a previously started secure element MAC
+ * operation by comparing the resulting MAC against a provided value
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the previously
+ *                              started MAC operation to be fiinished
+ * \param[in] p_mac             The MAC value against which the resulting MAC
+ *                              will be compared against
+ * \param[in] mac_length        The size in bytes of the value stored in `p_mac`
+ *
+ * \retval #PSA_SUCCESS
+ *         The operation completed successfully and the MACs matched each
+ *         other
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The operation completed successfully, but the calculated MAC did
+ *         not match the provided MAC
+ */
+typedef psa_status_t (*psa_drv_se_mac_finish_verify_t)(void *op_context,
+                                                       const uint8_t *p_mac,
+                                                       size_t mac_length);
+
+/** \brief A function that aborts a previous started secure element MAC
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the previously
+ *                              started MAC operation to be aborted
+ */
+typedef psa_status_t (*psa_drv_se_mac_abort_t)(void *op_context);
+
+/** \brief A function that performs a secure element MAC operation in one
+ * command and returns the calculated MAC
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] p_input           A buffer containing the message to be MACed
+ * \param[in] input_length      The size in bytes of `p_input`
+ * \param[in] key_slot          The slot of the key to be used
+ * \param[in] alg               The algorithm to be used to underlie the MAC
+ *                              operation
+ * \param[out] p_mac            A buffer where the generated MAC will be
+ *                              placed
+ * \param[in] mac_size          The size in bytes of the `p_mac` buffer
+ * \param[out] p_mac_length     After completion, will contain the number of
+ *                              bytes placed in the `output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_generate_t)(psa_drv_se_context_t *drv_context,
+                                                  const uint8_t *p_input,
+                                                  size_t input_length,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t alg,
+                                                  uint8_t *p_mac,
+                                                  size_t mac_size,
+                                                  size_t *p_mac_length);
+
+/** \brief A function that performs a secure element MAC operation in one
+ * command and compares the resulting MAC against a provided value
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in] p_input       A buffer containing the message to be MACed
+ * \param[in] input_length  The size in bytes of `input`
+ * \param[in] key_slot      The slot of the key to be used
+ * \param[in] alg           The algorithm to be used to underlie the MAC
+ *                          operation
+ * \param[in] p_mac         The MAC value against which the resulting MAC will
+ *                          be compared against
+ * \param[in] mac_length   The size in bytes of `mac`
+ *
+ * \retval #PSA_SUCCESS
+ *         The operation completed successfully and the MACs matched each
+ *         other
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The operation completed successfully, but the calculated MAC did
+ *         not match the provided MAC
+ */
+typedef psa_status_t (*psa_drv_se_mac_verify_t)(psa_drv_se_context_t *drv_context,
+                                                const uint8_t *p_input,
+                                                size_t input_length,
+                                                psa_key_slot_number_t key_slot,
+                                                psa_algorithm_t alg,
+                                                const uint8_t *p_mac,
+                                                size_t mac_length);
+
+/** \brief A struct containing all of the function pointers needed to
+ * perform secure element MAC operations
+ *
+ * PSA Crypto API implementations should populate the table as appropriate
+ * upon startup.
+ *
+ * If one of the functions is not implemented (such as
+ * `psa_drv_se_mac_generate_t`), it should be set to NULL.
+ *
+ * Driver implementers should ensure that they implement all of the functions
+ * that make sense for their hardware, and that they provide a full solution
+ * (for example, if they support `p_setup`, they should also support
+ * `p_update` and at least one of `p_finish` or `p_finish_verify`).
+ *
+ */
+typedef struct {
+    /**The size in bytes of the hardware-specific secure element MAC context
+     * structure
+    */
+    size_t                    context_size;
+    /** Function that performs a MAC setup operation
+     */
+    psa_drv_se_mac_setup_t          p_setup;
+    /** Function that performs a MAC update operation
+     */
+    psa_drv_se_mac_update_t         p_update;
+    /** Function that completes a MAC operation
+     */
+    psa_drv_se_mac_finish_t         p_finish;
+    /** Function that completes a MAC operation with a verify check
+     */
+    psa_drv_se_mac_finish_verify_t  p_finish_verify;
+    /** Function that aborts a previoustly started MAC operation
+     */
+    psa_drv_se_mac_abort_t          p_abort;
+    /** Function that performs a MAC operation in one call
+     */
+    psa_drv_se_mac_generate_t       p_mac;
+    /** Function that performs a MAC and verify operation in one call
+     */
+    psa_drv_se_mac_verify_t         p_mac_verify;
+} psa_drv_se_mac_t;
+/**@}*/
+
+/** \defgroup se_cipher Secure Element Symmetric Ciphers
+ *
+ * Encryption and Decryption using secure element keys in block modes other
+ * than ECB must be done in multiple parts, using the following flow:
+ * - `psa_drv_se_cipher_setup_t`
+ * - `psa_drv_se_cipher_set_iv_t` (optional depending upon block mode)
+ * - `psa_drv_se_cipher_update_t`
+ * - `psa_drv_se_cipher_update_t`
+ * - ...
+ * - `psa_drv_se_cipher_finish_t`
+ *
+ * If a previously started secure element Cipher operation needs to be
+ * terminated, it should be done so by the `psa_drv_se_cipher_abort_t`. Failure
+ * to do so may result in allocated resources not being freed or in other
+ * undefined behavior.
+ *
+ * In situations where a PSA Cryptographic API implementation is using a block
+ * mode not-supported by the underlying hardware or driver, it can construct
+ * the block mode itself, while calling the `psa_drv_se_cipher_ecb_t` function
+ * for the cipher operations.
+ */
+/**@{*/
+
+/** \brief A function that provides the cipher setup function for a
+ * secure element driver
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A structure that will contain the
+ *                              hardware-specific cipher context.
+ * \param[in] key_slot          The slot of the key to be used for the
+ *                              operation
+ * \param[in] algorithm         The algorithm to be used in the cipher
+ *                              operation
+ * \param[in] direction         Indicates whether the operation is an encrypt
+ *                              or decrypt
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ */
+typedef psa_status_t (*psa_drv_se_cipher_setup_t)(psa_drv_se_context_t *drv_context,
+                                                  void *op_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  psa_encrypt_or_decrypt_t direction);
+
+/** \brief A function that sets the initialization vector (if
+ * necessary) for an secure element cipher operation
+ *
+ * Rationale: The `psa_se_cipher_*` operation in the PSA Cryptographic API has
+ * two IV functions: one to set the IV, and one to generate it internally. The
+ * generate function is not necessary for the drivers to implement as the PSA
+ * Crypto implementation can do the generation using its RNG features.
+ *
+ * \param[in,out] op_context    A structure that contains the previously set up
+ *                              hardware-specific cipher context
+ * \param[in] p_iv              A buffer containing the initialization vector
+ * \param[in] iv_length         The size (in bytes) of the `p_iv` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_set_iv_t)(void *op_context,
+                                                   const uint8_t *p_iv,
+                                                   size_t iv_length);
+
+/** \brief A function that continues a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context        A hardware-specific structure for the
+ *                                  previously started cipher operation
+ * \param[in] p_input               A buffer containing the data to be
+ *                                  encrypted/decrypted
+ * \param[in] input_size            The size in bytes of the buffer pointed to
+ *                                  by `p_input`
+ * \param[out] p_output             The caller-allocated buffer where the
+ *                                  output will be placed
+ * \param[in] output_size           The allocated size in bytes of the
+ *                                  `p_output` buffer
+ * \param[out] p_output_length      After completion, will contain the number
+ *                                  of bytes placed in the `p_output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_update_t)(void *op_context,
+                                                   const uint8_t *p_input,
+                                                   size_t input_size,
+                                                   uint8_t *p_output,
+                                                   size_t output_size,
+                                                   size_t *p_output_length);
+
+/** \brief A function that completes a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started cipher operation
+ * \param[out] p_output         The caller-allocated buffer where the output
+ *                              will be placed
+ * \param[in] output_size       The allocated size in bytes of the `p_output`
+ *                              buffer
+ * \param[out] p_output_length  After completion, will contain the number of
+ *                              bytes placed in the `p_output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_finish_t)(void *op_context,
+                                                   uint8_t *p_output,
+                                                   size_t output_size,
+                                                   size_t *p_output_length);
+
+/** \brief A function that aborts a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started cipher operation
+ */
+typedef psa_status_t (*psa_drv_se_cipher_abort_t)(void *op_context);
+
+/** \brief A function that performs the ECB block mode for secure element
+ * cipher operations
+ *
+ * Note: this function should only be used with implementations that do not
+ * provide a needed higher-level operation.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          The slot of the key to be used for the operation
+ * \param[in] algorithm         The algorithm to be used in the cipher operation
+ * \param[in] direction         Indicates whether the operation is an encrypt or
+ *                              decrypt
+ * \param[in] p_input           A buffer containing the data to be
+ *                              encrypted/decrypted
+ * \param[in] input_size        The size in bytes of the buffer pointed to by
+ *                              `p_input`
+ * \param[out] p_output         The caller-allocated buffer where the output
+ *                              will be placed
+ * \param[in] output_size       The allocated size in bytes of the `p_output`
+ *                              buffer
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ */
+typedef psa_status_t (*psa_drv_se_cipher_ecb_t)(psa_drv_se_context_t *drv_context,
+                                                psa_key_slot_number_t key_slot,
+                                                psa_algorithm_t algorithm,
+                                                psa_encrypt_or_decrypt_t direction,
+                                                const uint8_t *p_input,
+                                                size_t input_size,
+                                                uint8_t *p_output,
+                                                size_t output_size);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * cipher operations using secure elements.
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented (such as
+ * `psa_drv_se_cipher_ecb_t`), it should be set to NULL.
+ */
+typedef struct {
+    /** The size in bytes of the hardware-specific secure element cipher
+     * context structure
+     */
+    size_t               context_size;
+    /** Function that performs a cipher setup operation */
+    psa_drv_se_cipher_setup_t  p_setup;
+    /** Function that sets a cipher IV (if necessary) */
+    psa_drv_se_cipher_set_iv_t p_set_iv;
+    /** Function that performs a cipher update operation */
+    psa_drv_se_cipher_update_t p_update;
+    /** Function that completes a cipher operation */
+    psa_drv_se_cipher_finish_t p_finish;
+    /** Function that aborts a cipher operation */
+    psa_drv_se_cipher_abort_t  p_abort;
+    /** Function that performs ECB mode for a cipher operation
+     * (Danger: ECB mode should not be used directly by clients of the PSA
+     * Crypto Client API)
+     */
+    psa_drv_se_cipher_ecb_t    p_ecb;
+} psa_drv_se_cipher_t;
+
+/**@}*/
+
+/** \defgroup se_asymmetric Secure Element Asymmetric Cryptography
+ *
+ * Since the amount of data that can (or should) be encrypted or signed using
+ * asymmetric keys is limited by the key size, asymmetric key operations using
+ * keys in a secure element must be done in single function calls.
+ */
+/**@{*/
+
+/**
+ * \brief A function that signs a hash or short message with a private key in
+ * a secure element
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in] key_slot              Key slot of an asymmetric key pair
+ * \param[in] alg                   A signature algorithm that is compatible
+ *                                  with the type of `key`
+ * \param[in] p_hash                The hash to sign
+ * \param[in] hash_length           Size of the `p_hash` buffer in bytes
+ * \param[out] p_signature          Buffer where the signature is to be written
+ * \param[in] signature_size        Size of the `p_signature` buffer in bytes
+ * \param[out] p_signature_length   On success, the number of bytes
+ *                                  that make up the returned signature value
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_sign_t)(psa_drv_se_context_t *drv_context,
+                                                     psa_key_slot_number_t key_slot,
+                                                     psa_algorithm_t alg,
+                                                     const uint8_t *p_hash,
+                                                     size_t hash_length,
+                                                     uint8_t *p_signature,
+                                                     size_t signature_size,
+                                                     size_t *p_signature_length);
+
+/**
+ * \brief A function that verifies the signature a hash or short message using
+ * an asymmetric public key in a secure element
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of a public key or an asymmetric key
+ *                              pair
+ * \param[in] alg               A signature algorithm that is compatible with
+ *                              the type of `key`
+ * \param[in] p_hash            The hash whose signature is to be verified
+ * \param[in] hash_length       Size of the `p_hash` buffer in bytes
+ * \param[in] p_signature       Buffer containing the signature to verify
+ * \param[in] signature_length  Size of the `p_signature` buffer in bytes
+ *
+ * \retval #PSA_SUCCESS
+ *         The signature is valid.
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_verify_t)(psa_drv_se_context_t *drv_context,
+                                                       psa_key_slot_number_t key_slot,
+                                                       psa_algorithm_t alg,
+                                                       const uint8_t *p_hash,
+                                                       size_t hash_length,
+                                                       const uint8_t *p_signature,
+                                                       size_t signature_length);
+
+/**
+ * \brief A function that encrypts a short message with an asymmetric public
+ * key in a secure element
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of a public key or an asymmetric key
+ *                              pair
+ * \param[in] alg               An asymmetric encryption algorithm that is
+ *                              compatible with the type of `key`
+ * \param[in] p_input           The message to encrypt
+ * \param[in] input_length      Size of the `p_input` buffer in bytes
+ * \param[in] p_salt            A salt or label, if supported by the
+ *                              encryption algorithm
+ *                              If the algorithm does not support a
+ *                              salt, pass `NULL`.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass `NULL`.
+ *                              For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                              supported.
+ * \param[in] salt_length       Size of the `p_salt` buffer in bytes
+ *                              If `p_salt` is `NULL`, pass 0.
+ * \param[out] p_output         Buffer where the encrypted message is to
+ *                              be written
+ * \param[in] output_size       Size of the `p_output` buffer in bytes
+ * \param[out] p_output_length  On success, the number of bytes that make up
+ *                              the returned output
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_encrypt_t)(psa_drv_se_context_t *drv_context,
+                                                        psa_key_slot_number_t key_slot,
+                                                        psa_algorithm_t alg,
+                                                        const uint8_t *p_input,
+                                                        size_t input_length,
+                                                        const uint8_t *p_salt,
+                                                        size_t salt_length,
+                                                        uint8_t *p_output,
+                                                        size_t output_size,
+                                                        size_t *p_output_length);
+
+/**
+ * \brief A function that decrypts a short message with an asymmetric private
+ * key in a secure element.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of an asymmetric key pair
+ * \param[in] alg               An asymmetric encryption algorithm that is
+ *                              compatible with the type of `key`
+ * \param[in] p_input           The message to decrypt
+ * \param[in] input_length      Size of the `p_input` buffer in bytes
+ * \param[in] p_salt            A salt or label, if supported by the
+ *                              encryption algorithm
+ *                              If the algorithm does not support a
+ *                              salt, pass `NULL`.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass `NULL`.
+ *                              For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                              supported.
+ * \param[in] salt_length       Size of the `p_salt` buffer in bytes
+ *                              If `p_salt` is `NULL`, pass 0.
+ * \param[out] p_output         Buffer where the decrypted message is to
+ *                              be written
+ * \param[in] output_size       Size of the `p_output` buffer in bytes
+ * \param[out] p_output_length  On success, the number of bytes
+ *                              that make up the returned output
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_decrypt_t)(psa_drv_se_context_t *drv_context,
+                                                        psa_key_slot_number_t key_slot,
+                                                        psa_algorithm_t alg,
+                                                        const uint8_t *p_input,
+                                                        size_t input_length,
+                                                        const uint8_t *p_salt,
+                                                        size_t salt_length,
+                                                        uint8_t *p_output,
+                                                        size_t output_size,
+                                                        size_t *p_output_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * asymmetric cryptographic operations using secure elements.
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that performs an asymmetric sign operation */
+    psa_drv_se_asymmetric_sign_t    p_sign;
+    /** Function that performs an asymmetric verify operation */
+    psa_drv_se_asymmetric_verify_t  p_verify;
+    /** Function that performs an asymmetric encrypt operation */
+    psa_drv_se_asymmetric_encrypt_t p_encrypt;
+    /** Function that performs an asymmetric decrypt operation */
+    psa_drv_se_asymmetric_decrypt_t p_decrypt;
+} psa_drv_se_asymmetric_t;
+
+/**@}*/
+
+/** \defgroup se_aead Secure Element Authenticated Encryption with Additional Data
+ * Authenticated Encryption with Additional Data (AEAD) operations with secure
+ * elements must be done in one function call. While this creates a burden for
+ * implementers as there must be sufficient space in memory for the entire
+ * message, it prevents decrypted data from being made available before the
+ * authentication operation is complete and the data is known to be authentic.
+ */
+/**@{*/
+
+/** \brief A function that performs a secure element authenticated encryption
+ * operation
+ *
+ * \param[in,out] drv_context           The driver context structure.
+ * \param[in] key_slot                  Slot containing the key to use.
+ * \param[in] algorithm                 The AEAD algorithm to compute
+ *                                      (\c PSA_ALG_XXX value such that
+ *                                      #PSA_ALG_IS_AEAD(`alg`) is true)
+ * \param[in] p_nonce                   Nonce or IV to use
+ * \param[in] nonce_length              Size of the `p_nonce` buffer in bytes
+ * \param[in] p_additional_data         Additional data that will be
+ *                                      authenticated but not encrypted
+ * \param[in] additional_data_length    Size of `p_additional_data` in bytes
+ * \param[in] p_plaintext               Data that will be authenticated and
+ *                                      encrypted
+ * \param[in] plaintext_length          Size of `p_plaintext` in bytes
+ * \param[out] p_ciphertext             Output buffer for the authenticated and
+ *                                      encrypted data. The additional data is
+ *                                      not part of this output. For algorithms
+ *                                      where the encrypted data and the
+ *                                      authentication tag are defined as
+ *                                      separate outputs, the authentication
+ *                                      tag is appended to the encrypted data.
+ * \param[in] ciphertext_size           Size of the `p_ciphertext` buffer in
+ *                                      bytes
+ * \param[out] p_ciphertext_length      On success, the size of the output in
+ *                                      the `p_ciphertext` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_aead_encrypt_t)(psa_drv_se_context_t *drv_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  const uint8_t *p_nonce,
+                                                  size_t nonce_length,
+                                                  const uint8_t *p_additional_data,
+                                                  size_t additional_data_length,
+                                                  const uint8_t *p_plaintext,
+                                                  size_t plaintext_length,
+                                                  uint8_t *p_ciphertext,
+                                                  size_t ciphertext_size,
+                                                  size_t *p_ciphertext_length);
+
+/** A function that peforms a secure element authenticated decryption operation
+ *
+ * \param[in,out] drv_context           The driver context structure.
+ * \param[in] key_slot                  Slot containing the key to use
+ * \param[in] algorithm                 The AEAD algorithm to compute
+ *                                      (\c PSA_ALG_XXX value such that
+ *                                      #PSA_ALG_IS_AEAD(`alg`) is true)
+ * \param[in] p_nonce                   Nonce or IV to use
+ * \param[in] nonce_length              Size of the `p_nonce` buffer in bytes
+ * \param[in] p_additional_data         Additional data that has been
+ *                                      authenticated but not encrypted
+ * \param[in] additional_data_length    Size of `p_additional_data` in bytes
+ * \param[in] p_ciphertext              Data that has been authenticated and
+ *                                      encrypted.
+ *                                      For algorithms where the encrypted data
+ *                                      and the authentication tag are defined
+ *                                      as separate inputs, the buffer must
+ *                                      contain the encrypted data followed by
+ *                                      the authentication tag.
+ * \param[in] ciphertext_length         Size of `p_ciphertext` in bytes
+ * \param[out] p_plaintext              Output buffer for the decrypted data
+ * \param[in] plaintext_size            Size of the `p_plaintext` buffer in
+ *                                      bytes
+ * \param[out] p_plaintext_length       On success, the size of the output in
+ *                                      the `p_plaintext` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_aead_decrypt_t)(psa_drv_se_context_t *drv_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  const uint8_t *p_nonce,
+                                                  size_t nonce_length,
+                                                  const uint8_t *p_additional_data,
+                                                  size_t additional_data_length,
+                                                  const uint8_t *p_ciphertext,
+                                                  size_t ciphertext_length,
+                                                  uint8_t *p_plaintext,
+                                                  size_t plaintext_size,
+                                                  size_t *p_plaintext_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * secure element Authenticated Encryption with Additional Data operations
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that performs the AEAD encrypt operation */
+    psa_drv_se_aead_encrypt_t p_encrypt;
+    /** Function that performs the AEAD decrypt operation */
+    psa_drv_se_aead_decrypt_t p_decrypt;
+} psa_drv_se_aead_t;
+/**@}*/
+
+/** \defgroup se_key_management Secure Element Key Management
+ * Currently, key management is limited to importing keys in the clear,
+ * destroying keys, and exporting keys in the clear.
+ * Whether a key may be exported is determined by the key policies in place
+ * on the key slot.
+ */
+/**@{*/
+
+/** An enumeration indicating how a key is created.
+ */
+typedef enum
+{
+    PSA_KEY_CREATION_IMPORT, /**< During psa_import_key() */
+    PSA_KEY_CREATION_GENERATE, /**< During psa_generate_key() */
+    PSA_KEY_CREATION_DERIVE, /**< During psa_key_derivation_output_key() */
+    PSA_KEY_CREATION_COPY, /**< During psa_copy_key() */
+
+#ifndef __DOXYGEN_ONLY__
+    /** A key is being registered with mbedtls_psa_register_se_key().
+     *
+     * The core only passes this value to
+     * psa_drv_se_key_management_t::p_validate_slot_number, not to
+     * psa_drv_se_key_management_t::p_allocate. The call to
+     * `p_validate_slot_number` is not followed by any other call to the
+     * driver: the key is considered successfully registered if the call to
+     * `p_validate_slot_number` succeeds, or if `p_validate_slot_number` is
+     * null.
+     *
+     * With this creation method, the driver must return #PSA_SUCCESS if
+     * the given attributes are compatible with the existing key in the slot,
+     * and #PSA_ERROR_DOES_NOT_EXIST if the driver can determine that there
+     * is no key with the specified slot number.
+     *
+     * This is an Mbed Crypto extension.
+     */
+    PSA_KEY_CREATION_REGISTER,
+#endif
+} psa_key_creation_method_t;
+
+/** \brief A function that allocates a slot for a key.
+ *
+ * To create a key in a specific slot in a secure element, the core
+ * first calls this function to determine a valid slot number,
+ * then calls a function to create the key material in that slot.
+ * In nominal conditions (that is, if no error occurs),
+ * the effect of a call to a key creation function in the PSA Cryptography
+ * API with a lifetime that places the key in a secure element is the
+ * following:
+ * -# The core calls psa_drv_se_key_management_t::p_allocate
+ *    (or in some implementations
+ *    psa_drv_se_key_management_t::p_validate_slot_number). The driver
+ *    selects (or validates) a suitable slot number given the key attributes
+ *    and the state of the secure element.
+ * -# The core calls a key creation function in the driver.
+ *
+ * The key creation functions in the PSA Cryptography API are:
+ * - psa_import_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_IMPORT
+ *   then a call to psa_drv_se_key_management_t::p_import.
+ * - psa_generate_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_GENERATE
+ *   then a call to psa_drv_se_key_management_t::p_import.
+ * - psa_key_derivation_output_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_DERIVE
+ *   then a call to psa_drv_se_key_derivation_t::p_derive.
+ * - psa_copy_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_COPY
+ *   then a call to psa_drv_se_key_management_t::p_export.
+ *
+ * In case of errors, other behaviors are possible.
+ * - If the PSA Cryptography subsystem dies after the first step,
+ *   for example because the device has lost power abruptly,
+ *   the second step may never happen, or may happen after a reset
+ *   and re-initialization. Alternatively, after a reset and
+ *   re-initialization, the core may call
+ *   psa_drv_se_key_management_t::p_destroy on the slot number that
+ *   was allocated (or validated) instead of calling a key creation function.
+ * - If an error occurs, the core may call
+ *   psa_drv_se_key_management_t::p_destroy on the slot number that
+ *   was allocated (or validated) instead of calling a key creation function.
+ *
+ * Errors and system resets also have an impact on the driver's persistent
+ * data. If a reset happens before the overall key creation process is
+ * completed (before or after the second step above), it is unspecified
+ * whether the persistent data after the reset is identical to what it
+ * was before or after the call to `p_allocate` (or `p_validate_slot_number`).
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param[in] attributes            Attributes of the key.
+ * \param method                    The way in which the key is being created.
+ * \param[out] key_slot             Slot where the key will be stored.
+ *                                  This must be a valid slot for a key of the
+ *                                  chosen type. It must be unoccupied.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         The core will record \c *key_slot as the key slot where the key
+ *         is stored and will update the persistent data in storage.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ */
+typedef psa_status_t (*psa_drv_se_allocate_key_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    const psa_key_attributes_t *attributes,
+    psa_key_creation_method_t method,
+    psa_key_slot_number_t *key_slot);
+
+/** \brief A function that determines whether a slot number is valid
+ * for a key.
+ *
+ * To create a key in a specific slot in a secure element, the core
+ * first calls this function to validate the choice of slot number,
+ * then calls a function to create the key material in that slot.
+ * See the documentation of #psa_drv_se_allocate_key_t for more details.
+ *
+ * As of the PSA Cryptography API specification version 1.0, there is no way
+ * for applications to trigger a call to this function. However some
+ * implementations offer the capability to create or declare a key in
+ * a specific slot via implementation-specific means, generally for the
+ * sake of initial device provisioning or onboarding. Such a mechanism may
+ * be added to a future version of the PSA Cryptography API specification.
+ *
+ * This function may update the driver's persistent data through
+ * \p persistent_data. The core will save the updated persistent data at the
+ * end of the key creation process. See the description of
+ * ::psa_drv_se_allocate_key_t for more information.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param[in] attributes        Attributes of the key.
+ * \param method                The way in which the key is being created.
+ * \param[in] key_slot          Slot where the key is to be stored.
+ *
+ * \retval #PSA_SUCCESS
+ *         The given slot number is valid for a key with the given
+ *         attributes.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The given slot number is not valid for a key with the
+ *         given attributes. This includes the case where the slot
+ *         number is not valid at all.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a key with the specified slot number.
+ *         Drivers may choose to return this error from the key
+ *         creation function instead.
+ */
+typedef psa_status_t (*psa_drv_se_validate_slot_number_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    const psa_key_attributes_t *attributes,
+    psa_key_creation_method_t method,
+    psa_key_slot_number_t key_slot);
+
+/** \brief A function that imports a key into a secure element in binary format
+ *
+ * This function can support any output from psa_export_key(). Refer to the
+ * documentation of psa_export_key() for the format for each key type.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param key_slot              Slot where the key will be stored.
+ *                              This must be a valid slot for a key of the
+ *                              chosen type. It must be unoccupied.
+ * \param[in] attributes        The key attributes, including the lifetime,
+ *                              the key type and the usage policy.
+ *                              Drivers should not access the key size stored
+ *                              in the attributes: it may not match the
+ *                              data passed in \p data.
+ *                              Drivers can call psa_get_key_lifetime(),
+ *                              psa_get_key_type(),
+ *                              psa_get_key_usage_flags() and
+ *                              psa_get_key_algorithm() to access this
+ *                              information.
+ * \param[in] data              Buffer containing the key data.
+ * \param[in] data_length       Size of the \p data buffer in bytes.
+ * \param[out] bits             On success, the key size in bits. The driver
+ *                              must determine this value after parsing the
+ *                              key according to the key type.
+ *                              This value is not used if the function fails.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_import_key_t)(
+    psa_drv_se_context_t *drv_context,
+    psa_key_slot_number_t key_slot,
+    const psa_key_attributes_t *attributes,
+    const uint8_t *data,
+    size_t data_length,
+    size_t *bits);
+
+/**
+ * \brief A function that destroys a secure element key and restore the slot to
+ * its default state
+ *
+ * This function destroys the content of the key from a secure element.
+ * Implementations shall make a best effort to ensure that any previous content
+ * of the slot is unrecoverable.
+ *
+ * This function returns the specified slot to its default state.
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param key_slot                  The key slot to erase.
+ *
+ * \retval #PSA_SUCCESS
+ *         The slot's content, if any, has been erased.
+ */
+typedef psa_status_t (*psa_drv_se_destroy_key_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    psa_key_slot_number_t key_slot);
+
+/**
+ * \brief A function that exports a secure element key in binary format
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an equivalent object.
+ *
+ * If a key is created with `psa_import_key()` and then exported with
+ * this function, it is not guaranteed that the resulting data is
+ * identical: the implementation may choose a different representation
+ * of the same key if the format permits it.
+ *
+ * This function should generate output in the same format that
+ * `psa_export_key()` does. Refer to the
+ * documentation of `psa_export_key()` for the format for each key type.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key               Slot whose content is to be exported. This must
+ *                              be an occupied key slot.
+ * \param[out] p_data           Buffer where the key data is to be written.
+ * \param[in] data_size         Size of the `p_data` buffer in bytes.
+ * \param[out] p_data_length    On success, the number of bytes
+ *                              that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ */
+typedef psa_status_t (*psa_drv_se_export_key_t)(psa_drv_se_context_t *drv_context,
+                                                psa_key_slot_number_t key,
+                                                uint8_t *p_data,
+                                                size_t data_size,
+                                                size_t *p_data_length);
+
+/**
+ * \brief A function that generates a symmetric or asymmetric key on a secure
+ * element
+ *
+ * If the key type \c type recorded in \p attributes
+ * is asymmetric (#PSA_KEY_TYPE_IS_ASYMMETRIC(\c type) = 1),
+ * the driver may export the public key at the time of generation,
+ * in the format documented for psa_export_public_key() by writing it
+ * to the \p pubkey buffer.
+ * This is optional, intended for secure elements that output the
+ * public key at generation time and that cannot export the public key
+ * later. Drivers that do not need this feature should leave
+ * \p *pubkey_length set to 0 and should
+ * implement the psa_drv_key_management_t::p_export_public function.
+ * Some implementations do not support this feature, in which case
+ * \p pubkey is \c NULL and \p pubkey_size is 0.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param key_slot              Slot where the key will be stored.
+ *                              This must be a valid slot for a key of the
+ *                              chosen type. It must be unoccupied.
+ * \param[in] attributes        The key attributes, including the lifetime,
+ *                              the key type and size, and the usage policy.
+ *                              Drivers can call psa_get_key_lifetime(),
+ *                              psa_get_key_type(), psa_get_key_bits(),
+ *                              psa_get_key_usage_flags() and
+ *                              psa_get_key_algorithm() to access this
+ *                              information.
+ * \param[out] pubkey           A buffer where the driver can write the
+ *                              public key, when generating an asymmetric
+ *                              key pair.
+ *                              This is \c NULL when generating a symmetric
+ *                              key or if the core does not support
+ *                              exporting the public key at generation time.
+ * \param pubkey_size           The size of the `pubkey` buffer in bytes.
+ *                              This is 0 when generating a symmetric
+ *                              key or if the core does not support
+ *                              exporting the public key at generation time.
+ * \param[out] pubkey_length    On entry, this is always 0.
+ *                              On success, the number of bytes written to
+ *                              \p pubkey. If this is 0 or unchanged on return,
+ *                              the core will not read the \p pubkey buffer,
+ *                              and will instead call the driver's
+ *                              psa_drv_key_management_t::p_export_public
+ *                              function to export the public key when needed.
+ */
+typedef psa_status_t (*psa_drv_se_generate_key_t)(
+    psa_drv_se_context_t *drv_context,
+    psa_key_slot_number_t key_slot,
+    const psa_key_attributes_t *attributes,
+    uint8_t *pubkey, size_t pubkey_size, size_t *pubkey_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to for secure
+ * element key management
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that allocates a slot for a key. */
+    psa_drv_se_allocate_key_t   p_allocate;
+    /** Function that checks the validity of a slot for a key. */
+    psa_drv_se_validate_slot_number_t p_validate_slot_number;
+    /** Function that performs a key import operation */
+    psa_drv_se_import_key_t     p_import;
+    /** Function that performs a generation */
+    psa_drv_se_generate_key_t   p_generate;
+    /** Function that performs a key destroy operation */
+    psa_drv_se_destroy_key_t    p_destroy;
+    /** Function that performs a key export operation */
+    psa_drv_se_export_key_t     p_export;
+    /** Function that performs a public key export operation */
+    psa_drv_se_export_key_t     p_export_public;
+} psa_drv_se_key_management_t;
+
+/**@}*/
+
+/** \defgroup driver_derivation Secure Element Key Derivation and Agreement
+ * Key derivation is the process of generating new key material using an
+ * existing key and additional parameters, iterating through a basic
+ * cryptographic function, such as a hash.
+ * Key agreement is a part of cryptographic protocols that allows two parties
+ * to agree on the same key value, but starting from different original key
+ * material.
+ * The flows are similar, and the PSA Crypto Driver Model uses the same functions
+ * for both of the flows.
+ *
+ * There are two different final functions for the flows,
+ * `psa_drv_se_key_derivation_derive` and `psa_drv_se_key_derivation_export`.
+ * `psa_drv_se_key_derivation_derive` is used when the key material should be
+ * placed in a slot on the hardware and not exposed to the caller.
+ * `psa_drv_se_key_derivation_export` is used when the key material should be
+ * returned to the PSA Cryptographic API implementation.
+ *
+ * Different key derivation algorithms require a different number of inputs.
+ * Instead of having an API that takes as input variable length arrays, which
+ * can be problemmatic to manage on embedded platforms, the inputs are passed
+ * to the driver via a function, `psa_drv_se_key_derivation_collateral`, that
+ * is called multiple times with different `collateral_id`s. Thus, for a key
+ * derivation algorithm that required 3 parameter inputs, the flow would look
+ * something like:
+ * ~~~~~~~~~~~~~{.c}
+ * psa_drv_se_key_derivation_setup(kdf_algorithm, source_key, dest_key_size_bytes);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_0,
+ *                                      p_collateral_0,
+ *                                      collateral_0_size);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_1,
+ *                                      p_collateral_1,
+ *                                      collateral_1_size);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_2,
+ *                                      p_collateral_2,
+ *                                      collateral_2_size);
+ * psa_drv_se_key_derivation_derive();
+ * ~~~~~~~~~~~~~
+ *
+ * key agreement example:
+ * ~~~~~~~~~~~~~{.c}
+ * psa_drv_se_key_derivation_setup(alg, source_key. dest_key_size_bytes);
+ * psa_drv_se_key_derivation_collateral(DHE_PUBKEY, p_pubkey, pubkey_size);
+ * psa_drv_se_key_derivation_export(p_session_key,
+ *                                  session_key_size,
+ *                                  &session_key_length);
+ * ~~~~~~~~~~~~~
+ */
+/**@{*/
+
+/** \brief A function that Sets up a secure element key derivation operation by
+ * specifying the algorithm and the source key sot
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] kdf_alg           The algorithm to be used for the key derivation
+ * \param[in] source_key        The key to be used as the source material for
+ *                              the key derivation
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_setup_t)(psa_drv_se_context_t *drv_context,
+                                                          void *op_context,
+                                                          psa_algorithm_t kdf_alg,
+                                                          psa_key_slot_number_t source_key);
+
+/** \brief A function that provides collateral (parameters) needed for a secure
+ * element key derivation or key agreement operation
+ *
+ * Since many key derivation algorithms require multiple parameters, it is
+ * expected that this function may be called multiple times for the same
+ * operation, each with a different algorithm-specific `collateral_id`
+ *
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] collateral_id     An ID for the collateral being provided
+ * \param[in] p_collateral      A buffer containing the collateral data
+ * \param[in] collateral_size   The size in bytes of the collateral
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_collateral_t)(void *op_context,
+                                                               uint32_t collateral_id,
+                                                               const uint8_t *p_collateral,
+                                                               size_t collateral_size);
+
+/** \brief A function that performs the final secure element key derivation
+ * step and place the generated key material in a slot
+ *
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] dest_key          The slot where the generated key material
+ *                              should be placed
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_derive_t)(void *op_context,
+                                                          psa_key_slot_number_t dest_key);
+
+/** \brief A function that performs the final step of a secure element key
+ * agreement and place the generated key material in a buffer
+ *
+ * \param[out] p_output         Buffer in which to place the generated key
+ *                              material
+ * \param[in] output_size       The size in bytes of `p_output`
+ * \param[out] p_output_length  Upon success, contains the number of bytes of
+ *                              key material placed in `p_output`
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_export_t)(void *op_context,
+                                                           uint8_t *p_output,
+                                                           size_t output_size,
+                                                           size_t *p_output_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to for secure
+ * element key derivation and agreement
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** The driver-specific size of the key derivation context */
+    size_t                           context_size;
+    /** Function that performs a key derivation setup */
+    psa_drv_se_key_derivation_setup_t      p_setup;
+    /** Function that sets key derivation collateral */
+    psa_drv_se_key_derivation_collateral_t p_collateral;
+    /** Function that performs a final key derivation step */
+    psa_drv_se_key_derivation_derive_t     p_derive;
+    /** Function that perforsm a final key derivation or agreement and
+     * exports the key */
+    psa_drv_se_key_derivation_export_t     p_export;
+} psa_drv_se_key_derivation_t;
+
+/**@}*/
+
+/** \defgroup se_registration Secure element driver registration
+ */
+/**@{*/
+
+/** A structure containing pointers to all the entry points of a
+ * secure element driver.
+ *
+ * Future versions of this specification may add extra substructures at
+ * the end of this structure.
+ */
+typedef struct {
+    /** The version of the driver HAL that this driver implements.
+     * This is a protection against loading driver binaries built against
+     * a different version of this specification.
+     * Use #PSA_DRV_SE_HAL_VERSION.
+     */
+    uint32_t hal_version;
+
+    /** The size of the driver's persistent data in bytes.
+     *
+     * This can be 0 if the driver does not need persistent data.
+     *
+     * See the documentation of psa_drv_se_context_t::persistent_data
+     * for more information about why and how a driver can use
+     * persistent data.
+     */
+    size_t persistent_data_size;
+
+    /** The driver initialization function.
+     *
+     * This function is called once during the initialization of the
+     * PSA Cryptography subsystem, before any other function of the
+     * driver is called. If this function returns a failure status,
+     * the driver will be unusable, at least until the next system reset.
+     *
+     * If this field is \c NULL, it is equivalent to a function that does
+     * nothing and returns #PSA_SUCCESS.
+     */
+    psa_drv_se_init_t p_init;
+
+    const psa_drv_se_key_management_t *key_management;
+    const psa_drv_se_mac_t *mac;
+    const psa_drv_se_cipher_t *cipher;
+    const psa_drv_se_aead_t *aead;
+    const psa_drv_se_asymmetric_t *asymmetric;
+    const psa_drv_se_key_derivation_t *derivation;
+} psa_drv_se_t;
+
+/** The current version of the secure element driver HAL.
+ */
+/* 0.0.0 patchlevel 5 */
+#define PSA_DRV_SE_HAL_VERSION 0x00000005
+
+/** Register an external cryptoprocessor (secure element) driver.
+ *
+ * This function is only intended to be used by driver code, not by
+ * application code. In implementations with separation between the
+ * PSA cryptography module and applications, this function should
+ * only be available to callers that run in the same memory space as
+ * the cryptography module, and should not be exposed to applications
+ * running in a different memory space.
+ *
+ * This function may be called before psa_crypto_init(). It is
+ * implementation-defined whether this function may be called
+ * after psa_crypto_init().
+ *
+ * \note Implementations store metadata about keys including the lifetime
+ *       value, which contains the driver's location indicator. Therefore,
+ *       from one instantiation of the PSA Cryptography
+ *       library to the next one, if there is a key in storage with a certain
+ *       lifetime value, you must always register the same driver (or an
+ *       updated version that communicates with the same secure element)
+ *       with the same location value.
+ *
+ * \param location      The location value through which this driver will
+ *                      be exposed to applications.
+ *                      This driver will be used for all keys such that
+ *                      `location == #PSA_KEY_LIFETIME_GET_LOCATION( lifetime )`.
+ *                      The value #PSA_KEY_LOCATION_LOCAL_STORAGE is reserved
+ *                      and may not be used for drivers. Implementations
+ *                      may reserve other values.
+ * \param[in] methods   The method table of the driver. This structure must
+ *                      remain valid for as long as the cryptography
+ *                      module keeps running. It is typically a global
+ *                      constant.
+ *
+ * \return #PSA_SUCCESS
+ *         The driver was successfully registered. Applications can now
+ *         use \p location to access keys through the methods passed to
+ *         this function.
+ * \return #PSA_ERROR_BAD_STATE
+ *         This function was called after the initialization of the
+ *         cryptography module, and this implementation does not support
+ *         driver registration at this stage.
+ * \return #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a registered driver for this value of \p location.
+ * \return #PSA_ERROR_INVALID_ARGUMENT
+ *         \p location is a reserved value.
+ * \return #PSA_ERROR_NOT_SUPPORTED
+ *         `methods->hal_version` is not supported by this implementation.
+ * \return #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \return #PSA_ERROR_NOT_PERMITTED
+ * \return #PSA_ERROR_STORAGE_FAILURE
+ * \return #PSA_ERROR_DATA_CORRUPT
+ */
+psa_status_t psa_register_se_driver(
+    psa_key_location_t location,
+    const psa_drv_se_t *methods);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_SE_DRIVER_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_sizes.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_sizes.h
new file mode 100644
index 00000000000..e2ae5965d4f
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_sizes.h
@@ -0,0 +1,1171 @@
+/**
+ * \file psa/crypto_sizes.h
+ *
+ * \brief PSA cryptography module: Mbed TLS buffer size macros
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains the definitions of macros that are useful to
+ * compute buffer sizes. The signatures and semantics of these macros
+ * are standardized, but the definitions are not, because they depend on
+ * the available algorithms and, in some cases, on permitted tolerances
+ * on buffer sizes.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, implementers should take care to ensure that
+ * the definitions that are exposed to applications match what the
+ * module implements.
+ *
+ * Macros that compute sizes whose values do not depend on the
+ * implementation are in crypto.h.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_SIZES_H
+#define PSA_CRYPTO_SIZES_H
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#define PSA_BITS_TO_BYTES(bits) (((bits) + 7) / 8)
+#define PSA_BYTES_TO_BITS(bytes) ((bytes) * 8)
+
+#define PSA_ROUND_UP_TO_MULTIPLE(block_size, length) \
+    (((length) + (block_size) - 1) / (block_size) * (block_size))
+
+/** The size of the output of psa_hash_finish(), in bytes.
+ *
+ * This is also the hash size that psa_hash_verify() expects.
+ *
+ * \param alg   A hash algorithm (\c PSA_ALG_XXX value such that
+ *              #PSA_ALG_IS_HASH(\p alg) is true), or an HMAC algorithm
+ *              (#PSA_ALG_HMAC(\c hash_alg) where \c hash_alg is a
+ *              hash algorithm).
+ *
+ * \return The hash size for the specified hash algorithm.
+ *         If the hash algorithm is not recognized, return 0.
+ */
+#define PSA_HASH_LENGTH(alg)                                        \
+    (                                                               \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD2 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD4 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD5 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_RIPEMD160 ? 20 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_1 ? 20 :          \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_224 ? 28 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_256 ? 32 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_384 ? 48 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_224 ? 28 :    \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_256 ? 32 :    \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_224 ? 28 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_256 ? 32 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_384 ? 48 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_512 ? 64 :       \
+        0)
+
+/** The input block size of a hash algorithm, in bytes.
+ *
+ * Hash algorithms process their input data in blocks. Hash operations will
+ * retain any partial blocks until they have enough input to fill the block or
+ * until the operation is finished.
+ * This affects the output from psa_hash_suspend().
+ *
+ * \param alg   A hash algorithm (\c PSA_ALG_XXX value such that
+ *              PSA_ALG_IS_HASH(\p alg) is true).
+ *
+ * \return      The block size in bytes for the specified hash algorithm.
+ *              If the hash algorithm is not recognized, return 0.
+ *              An implementation can return either 0 or the correct size for a
+ *              hash algorithm that it recognizes, but does not support.
+ */
+#define PSA_HASH_BLOCK_LENGTH(alg)                                  \
+    (                                                               \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD2 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD4 ? 64 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD5 ? 64 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_RIPEMD160 ? 64 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_1 ? 64 :          \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_224 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_256 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_384 ? 128 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512 ? 128 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_224 ? 128 :   \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_256 ? 128 :   \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_224 ? 144 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_256 ? 136 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_384 ? 104 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_512 ? 72 :       \
+        0)
+
+/** \def PSA_HASH_MAX_SIZE
+ *
+ * Maximum size of a hash.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a hash in bytes.
+ */
+/* Note: for HMAC-SHA-3, the block size is 144 bytes for HMAC-SHA3-226,
+ * 136 bytes for HMAC-SHA3-256, 104 bytes for SHA3-384, 72 bytes for
+ * HMAC-SHA3-512. */
+#if defined(PSA_WANT_ALG_SHA_512) || defined(PSA_WANT_ALG_SHA_384)
+#define PSA_HASH_MAX_SIZE 64
+#define PSA_HMAC_MAX_HASH_BLOCK_SIZE 128
+#else
+#define PSA_HASH_MAX_SIZE 32
+#define PSA_HMAC_MAX_HASH_BLOCK_SIZE 64
+#endif
+
+/** \def PSA_MAC_MAX_SIZE
+ *
+ * Maximum size of a MAC.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a MAC in bytes.
+ */
+/* All non-HMAC MACs have a maximum size that's smaller than the
+ * minimum possible value of PSA_HASH_MAX_SIZE in this implementation. */
+/* Note that the encoding of truncated MAC algorithms limits this value
+ * to 64 bytes.
+ */
+#define PSA_MAC_MAX_SIZE PSA_HASH_MAX_SIZE
+
+/** The length of a tag for an AEAD algorithm, in bytes.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to store the
+ * tag output from psa_aead_finish().
+ *
+ * See also #PSA_AEAD_TAG_MAX_SIZE.
+ *
+ * \param key_type            The type of the AEAD key.
+ * \param key_bits            The size of the AEAD key in bits.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    The tag length for the specified algorithm and key.
+ *                            If the AEAD algorithm does not have an identified
+ *                            tag that can be distinguished from the rest of
+ *                            the ciphertext, return 0.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_TAG_LENGTH(key_type, key_bits, alg)                        \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                            \
+     PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :                                     \
+     ((void) (key_bits), 0))
+
+/** The maximum tag size for all supported AEAD algorithms, in bytes.
+ *
+ * See also #PSA_AEAD_TAG_LENGTH(\p key_type, \p key_bits, \p alg).
+ */
+#define PSA_AEAD_TAG_MAX_SIZE       16
+
+/* The maximum size of an RSA key on this implementation, in bits.
+ * This is a vendor-specific macro.
+ *
+ * Mbed TLS does not set a hard limit on the size of RSA keys: any key
+ * whose parameters fit in a bignum is accepted. However large keys can
+ * induce a large memory usage and long computation times. Unlike other
+ * auxiliary macros in this file and in crypto.h, which reflect how the
+ * library is configured, this macro defines how the library is
+ * configured. This implementation refuses to import or generate an
+ * RSA key whose size is larger than the value defined here.
+ *
+ * Note that an implementation may set different size limits for different
+ * operations, and does not need to accept all key sizes up to the limit. */
+#define PSA_VENDOR_RSA_MAX_KEY_BITS 4096
+
+/* The maximum size of an ECC key on this implementation, in bits.
+ * This is a vendor-specific macro. */
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 521
+#elif defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 512
+#elif defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 448
+#elif defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 384
+#elif defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 384
+#elif defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 255
+#elif defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 224
+#elif defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 224
+#elif defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 192
+#elif defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 192
+#else
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 0
+#endif
+
+/** This macro returns the maximum supported length of the PSK for the
+ * TLS-1.2 PSK-to-MS key derivation
+ * (#PSA_ALG_TLS12_PSK_TO_MS(\c hash_alg)).
+ *
+ * The maximum supported length does not depend on the chosen hash algorithm.
+ *
+ * Quoting RFC 4279, Sect 5.3:
+ * TLS implementations supporting these ciphersuites MUST support
+ * arbitrary PSK identities up to 128 octets in length, and arbitrary
+ * PSKs up to 64 octets in length.  Supporting longer identities and
+ * keys is RECOMMENDED.
+ *
+ * Therefore, no implementation should define a value smaller than 64
+ * for #PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE.
+ */
+#define PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE 128
+
+/** The maximum size of a block cipher. */
+#define PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE 16
+
+/** The size of the output of psa_mac_sign_finish(), in bytes.
+ *
+ * This is also the MAC size that psa_mac_verify_finish() expects.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type      The type of the MAC key.
+ * \param key_bits      The size of the MAC key in bits.
+ * \param alg           A MAC algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \return              The MAC size for the specified algorithm with
+ *                      the specified key parameters.
+ * \return              0 if the MAC algorithm is not recognized.
+ * \return              Either 0 or the correct size for a MAC algorithm that
+ *                      the implementation recognizes, but does not support.
+ * \return              Unspecified if the key parameters are not consistent
+ *                      with the algorithm.
+ */
+#define PSA_MAC_LENGTH(key_type, key_bits, alg)                                   \
+    ((alg) & PSA_ALG_MAC_TRUNCATION_MASK ? PSA_MAC_TRUNCATED_LENGTH(alg) :        \
+     PSA_ALG_IS_HMAC(alg) ? PSA_HASH_LENGTH(PSA_ALG_HMAC_GET_HASH(alg)) :         \
+     PSA_ALG_IS_BLOCK_CIPHER_MAC(alg) ? PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     ((void)(key_type), (void)(key_bits), 0))
+
+/** The maximum size of the output of psa_aead_encrypt(), in bytes.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_encrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the ciphertext may be smaller.
+ *
+ * See also #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p plaintext_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_SIZE(key_type, alg, plaintext_length) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                      \
+     (plaintext_length) + PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :          \
+     0)
+
+/** A sufficient output buffer size for psa_aead_encrypt(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is guaranteed
+ * that psa_aead_encrypt() will not fail due to an insufficient buffer size.
+ *
+ * \note This macro returns a compile-time constant if its arguments are
+ *       compile-time constants.
+ *
+ * See also #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\p key_type, \p alg,
+ * \p plaintext_length).
+ *
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    A sufficient output buffer size for any of the
+ *                            supported key types and AEAD algorithms.
+ *
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(plaintext_length)          \
+    ((plaintext_length) + PSA_AEAD_TAG_MAX_SIZE)
+
+
+/** The maximum size of the output of psa_aead_decrypt(), in bytes.
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_decrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the plaintext may be smaller.
+ *
+ * See also #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p ciphertext_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param ciphertext_length   Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_SIZE(key_type, alg, ciphertext_length) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&                      \
+         (ciphertext_length) > PSA_ALG_AEAD_GET_TAG_LENGTH(alg) ?      \
+         (ciphertext_length) - PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :      \
+     0)
+
+/** A sufficient output buffer size for psa_aead_decrypt(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the plaintext buffer is at least this large, it is guaranteed
+ * that psa_aead_decrypt() will not fail due to an insufficient buffer size.
+ *
+ * \note This macro returns a compile-time constant if its arguments are
+ *       compile-time constants.
+ *
+ * See also #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\p key_type, \p alg,
+ * \p ciphertext_length).
+ *
+ * \param ciphertext_length   Size of the ciphertext in bytes.
+ *
+ * \return                    A sufficient output buffer size for any of the
+ *                            supported key types and AEAD algorithms.
+ *
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(ciphertext_length)     \
+     (ciphertext_length)
+
+/** The default nonce size for an AEAD algorithm, in bytes.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to
+ * store the nonce output from #psa_aead_generate_nonce().
+ *
+ * See also #PSA_AEAD_NONCE_MAX_SIZE.
+ *
+ * \note This is not the maximum size of nonce supported as input to
+ *       #psa_aead_set_nonce(), #psa_aead_encrypt() or #psa_aead_decrypt(),
+ *       just the default size that is generated by #psa_aead_generate_nonce().
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  A symmetric key type that is compatible with
+ *                  algorithm \p alg.
+ *
+ * \param alg       An AEAD algorithm (\c PSA_ALG_XXX value such that
+ *                  #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return The default nonce size for the specified key type and algorithm.
+ *         If the key type or AEAD algorithm is not recognized,
+ *         or the parameters are incompatible, return 0.
+ */
+#define PSA_AEAD_NONCE_LENGTH(key_type, alg) \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) == 16 ? \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_CCM) ? 13 : \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_GCM) ? 12 : \
+          0 : \
+     (key_type) == PSA_KEY_TYPE_CHACHA20 && \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_CHACHA20_POLY1305) ? 12 : \
+     0)
+
+/** The maximum default nonce size among all supported pairs of key types and
+ *  AEAD algorithms, in bytes.
+ *
+ * This is equal to or greater than any value that #PSA_AEAD_NONCE_LENGTH()
+ * may return.
+ *
+ * \note This is not the maximum size of nonce supported as input to
+ *       #psa_aead_set_nonce(), #psa_aead_encrypt() or #psa_aead_decrypt(),
+ *       just the largest size that may be generated by
+ *       #psa_aead_generate_nonce().
+ */
+#define PSA_AEAD_NONCE_MAX_SIZE 13
+
+/** A sufficient output buffer size for psa_aead_update().
+ *
+ * If the size of the output buffer is at least this large, it is
+ * guaranteed that psa_aead_update() will not fail due to an
+ * insufficient buffer size. The actual size of the output may be smaller
+ * in any given call.
+ *
+ * See also #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param input_length        Size of the input in bytes.
+ *
+ * \return                    A sufficient output buffer size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+/* For all the AEAD modes defined in this specification, it is possible
+ * to emit output without delay. However, hardware may not always be
+ * capable of this. So for modes based on a block cipher, allow the
+ * implementation to delay the output until it has a full block. */
+#define PSA_AEAD_UPDATE_OUTPUT_SIZE(key_type, alg, input_length)                             \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                                             \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?                                              \
+         PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type), (input_length)) : \
+         (input_length) : \
+     0)
+
+/** A sufficient output buffer size for psa_aead_update(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_aead_update() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_AEAD_UPDATE_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length      Size of the input in bytes.
+ */
+#define PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(input_length)                           \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, (input_length)))
+
+/** A sufficient ciphertext buffer size for psa_aead_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_finish() will not fail due to an
+ * insufficient ciphertext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * See also #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type            A symmetric key type that is
+                              compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient ciphertext buffer size for the
+ *                            specified algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_FINISH_OUTPUT_SIZE(key_type, alg) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&  \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?    \
+         PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     0)
+
+/** A sufficient ciphertext buffer size for psa_aead_finish(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * See also #PSA_AEAD_FINISH_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_AEAD_FINISH_OUTPUT_MAX_SIZE     (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+/** A sufficient plaintext buffer size for psa_aead_verify().
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_verify() will not fail due to an
+ * insufficient plaintext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * See also #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient plaintext buffer size for the
+ *                            specified algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_SIZE(key_type, alg) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&  \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?    \
+         PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     0)
+
+/** A sufficient plaintext buffer size for psa_aead_verify(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * See also #PSA_AEAD_VERIFY_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE     (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+#define PSA_RSA_MINIMUM_PADDING_SIZE(alg)                         \
+    (PSA_ALG_IS_RSA_OAEP(alg) ?                                   \
+     2 * PSA_HASH_LENGTH(PSA_ALG_RSA_OAEP_GET_HASH(alg)) + 1 :    \
+     11 /*PKCS#1v1.5*/)
+
+/**
+ * \brief ECDSA signature size for a given curve bit size
+ *
+ * \param curve_bits    Curve size in bits.
+ * \return              Signature size in bytes.
+ *
+ * \note This macro returns a compile-time constant if its argument is one.
+ */
+#define PSA_ECDSA_SIGNATURE_SIZE(curve_bits)    \
+    (PSA_BITS_TO_BYTES(curve_bits) * 2)
+
+/** Sufficient signature buffer size for psa_sign_hash().
+ *
+ * This macro returns a sufficient buffer size for a signature using a key
+ * of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the signature may be smaller
+ * (some algorithms produce a variable-size signature).
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The signature algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_sign_hash() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_SIGN_OUTPUT_SIZE(key_type, key_bits, alg)        \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? ((void)alg, PSA_BITS_TO_BYTES(key_bits)) : \
+     PSA_KEY_TYPE_IS_ECC(key_type) ? PSA_ECDSA_SIGNATURE_SIZE(key_bits) : \
+     ((void)alg, 0))
+
+#define PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE     \
+    PSA_ECDSA_SIGNATURE_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS)
+
+/** \def PSA_SIGNATURE_MAX_SIZE
+ *
+ * Maximum size of an asymmetric signature.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a signature in bytes.
+ */
+#define PSA_SIGNATURE_MAX_SIZE                               \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS) > PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE ? \
+     PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS) :                   \
+     PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE)
+
+/** Sufficient output buffer size for psa_asymmetric_encrypt().
+ *
+ * This macro returns a sufficient buffer size for a ciphertext produced using
+ * a key of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the ciphertext may be smaller, depending
+ * on the algorithm.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The asymmetric encryption algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_asymmetric_encrypt() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(key_type, key_bits, alg)     \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ?                                    \
+     ((void)alg, PSA_BITS_TO_BYTES(key_bits)) :                         \
+     0)
+
+/** A sufficient output buffer size for psa_asymmetric_encrypt(), for any
+ *  supported asymmetric encryption.
+ *
+ * See also #PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(\p key_type, \p key_bits, \p alg).
+ */
+/* This macro assumes that RSA is the only supported asymmetric encryption. */
+#define PSA_ASYMMETRIC_ENCRYPT_OUTPUT_MAX_SIZE          \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS))
+
+/** Sufficient output buffer size for psa_asymmetric_decrypt().
+ *
+ * This macro returns a sufficient buffer size for a plaintext produced using
+ * a key of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the plaintext may be smaller, depending
+ * on the algorithm.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The asymmetric encryption algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_asymmetric_decrypt() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(key_type, key_bits, alg)     \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ?                                    \
+     PSA_BITS_TO_BYTES(key_bits) - PSA_RSA_MINIMUM_PADDING_SIZE(alg) :  \
+     0)
+
+/** A sufficient output buffer size for psa_asymmetric_decrypt(), for any
+ *  supported asymmetric decryption.
+ *
+ * This macro assumes that RSA is the only supported asymmetric encryption.
+ *
+ * See also #PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(\p key_type, \p key_bits, \p alg).
+ */
+#define PSA_ASYMMETRIC_DECRYPT_OUTPUT_MAX_SIZE          \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS))
+
+/* Maximum size of the ASN.1 encoding of an INTEGER with the specified
+ * number of bits.
+ *
+ * This definition assumes that bits <= 2^19 - 9 so that the length field
+ * is at most 3 bytes. The length of the encoding is the length of the
+ * bit string padded to a whole number of bytes plus:
+ * - 1 type byte;
+ * - 1 to 3 length bytes;
+ * - 0 to 1 bytes of leading 0 due to the sign bit.
+ */
+#define PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(bits)      \
+    ((bits) / 8 + 5)
+
+/* Maximum size of the export encoding of an RSA public key.
+ * Assumes that the public exponent is less than 2^32.
+ *
+ * RSAPublicKey  ::=  SEQUENCE  {
+ *    modulus            INTEGER,    -- n
+ *    publicExponent     INTEGER  }  -- e
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - n : INTEGER;
+ * - 7 bytes for the public exponent.
+ */
+#define PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) + 11)
+
+/* Maximum size of the export encoding of an RSA key pair.
+ * Assumes thatthe public exponent is less than 2^32 and that the size
+ * difference between the two primes is at most 1 bit.
+ *
+ * RSAPrivateKey ::= SEQUENCE {
+ *     version           Version,  -- 0
+ *     modulus           INTEGER,  -- N-bit
+ *     publicExponent    INTEGER,  -- 32-bit
+ *     privateExponent   INTEGER,  -- N-bit
+ *     prime1            INTEGER,  -- N/2-bit
+ *     prime2            INTEGER,  -- N/2-bit
+ *     exponent1         INTEGER,  -- N/2-bit
+ *     exponent2         INTEGER,  -- N/2-bit
+ *     coefficient       INTEGER,  -- N/2-bit
+ * }
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - 3 bytes of version;
+ * - 7 half-size INTEGERs plus 2 full-size INTEGERs,
+ *   overapproximated as 9 half-size INTEGERS;
+ * - 7 bytes for the public exponent.
+ */
+#define PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (9 * PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE((key_bits) / 2 + 1) + 14)
+
+/* Maximum size of the export encoding of a DSA public key.
+ *
+ * SubjectPublicKeyInfo  ::=  SEQUENCE  {
+ *      algorithm            AlgorithmIdentifier,
+ *      subjectPublicKey     BIT STRING  } -- contains DSAPublicKey
+ * AlgorithmIdentifier  ::=  SEQUENCE  {
+ *      algorithm               OBJECT IDENTIFIER,
+ *      parameters              Dss-Parms  } -- SEQUENCE of 3 INTEGERs
+ * DSAPublicKey  ::=  INTEGER -- public key, Y
+ *
+ * - 3 * 4 bytes of SEQUENCE overhead;
+ * - 1 + 1 + 7 bytes of algorithm (DSA OID);
+ * - 4 bytes of BIT STRING overhead;
+ * - 3 full-size INTEGERs (p, g, y);
+ * - 1 + 1 + 32 bytes for 1 sub-size INTEGER (q <= 256 bits).
+ */
+#define PSA_KEY_EXPORT_DSA_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) * 3 + 59)
+
+/* Maximum size of the export encoding of a DSA key pair.
+ *
+ * DSAPrivateKey ::= SEQUENCE {
+ *     version             Version,  -- 0
+ *     prime               INTEGER,  -- p
+ *     subprime            INTEGER,  -- q
+ *     generator           INTEGER,  -- g
+ *     public              INTEGER,  -- y
+ *     private             INTEGER,  -- x
+ * }
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - 3 bytes of version;
+ * - 3 full-size INTEGERs (p, g, y);
+ * - 2 * (1 + 1 + 32) bytes for 2 sub-size INTEGERs (q, x <= 256 bits).
+ */
+#define PSA_KEY_EXPORT_DSA_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) * 3 + 75)
+
+/* Maximum size of the export encoding of an ECC public key.
+ *
+ * The representation of an ECC public key is:
+ *      - The byte 0x04;
+ *      - `x_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - `y_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - where m is the bit size associated with the curve.
+ *
+ * - 1 byte + 2 * point size.
+ */
+#define PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (2 * PSA_BITS_TO_BYTES(key_bits) + 1)
+
+/* Maximum size of the export encoding of an ECC key pair.
+ *
+ * An ECC key pair is represented by the secret value.
+ */
+#define PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (PSA_BITS_TO_BYTES(key_bits))
+
+/** Sufficient output buffer size for psa_export_key() or
+ * psa_export_public_key().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * The following code illustrates how to allocate enough memory to export
+ * a key by querying the key type and size at runtime.
+ * \code{c}
+ * psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ * psa_status_t status;
+ * status = psa_get_key_attributes(key, &attributes);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * psa_key_type_t key_type = psa_get_key_type(&attributes);
+ * size_t key_bits = psa_get_key_bits(&attributes);
+ * size_t buffer_size = PSA_EXPORT_KEY_OUTPUT_SIZE(key_type, key_bits);
+ * psa_reset_key_attributes(&attributes);
+ * uint8_t *buffer = malloc(buffer_size);
+ * if (buffer == NULL) handle_error(...);
+ * size_t buffer_length;
+ * status = psa_export_key(key, buffer, buffer_size, &buffer_length);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * \endcode
+ *
+ * \param key_type  A supported key type.
+ * \param key_bits  The size of the key in bits.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_export_key() or psa_export_public_key() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the return value is unspecified.
+ */
+#define PSA_EXPORT_KEY_OUTPUT_SIZE(key_type, key_bits)                                              \
+    (PSA_KEY_TYPE_IS_UNSTRUCTURED(key_type) ? PSA_BITS_TO_BYTES(key_bits) :                         \
+     (key_type) == PSA_KEY_TYPE_RSA_KEY_PAIR ? PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(key_bits) :     \
+     (key_type) == PSA_KEY_TYPE_RSA_PUBLIC_KEY ? PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     (key_type) == PSA_KEY_TYPE_DSA_KEY_PAIR ? PSA_KEY_EXPORT_DSA_KEY_PAIR_MAX_SIZE(key_bits) :     \
+     (key_type) == PSA_KEY_TYPE_DSA_PUBLIC_KEY ? PSA_KEY_EXPORT_DSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_ECC_KEY_PAIR(key_type) ? PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(key_bits) :      \
+     PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY(key_type) ? PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits) :  \
+     0)
+
+/** Sufficient output buffer size for psa_export_public_key().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * The following code illustrates how to allocate enough memory to export
+ * a public key by querying the key type and size at runtime.
+ * \code{c}
+ * psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ * psa_status_t status;
+ * status = psa_get_key_attributes(key, &attributes);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * psa_key_type_t key_type = psa_get_key_type(&attributes);
+ * size_t key_bits = psa_get_key_bits(&attributes);
+ * size_t buffer_size = PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(key_type, key_bits);
+ * psa_reset_key_attributes(&attributes);
+ * uint8_t *buffer = malloc(buffer_size);
+ * if (buffer == NULL) handle_error(...);
+ * size_t buffer_length;
+ * status = psa_export_public_key(key, buffer, buffer_size, &buffer_length);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * \endcode
+ *
+ * \param key_type      A public key or key pair key type.
+ * \param key_bits      The size of the key in bits.
+ *
+ * \return              If the parameters are valid and supported, return
+ *                      a buffer size in bytes that guarantees that
+ *                      psa_export_public_key() will not fail with
+ *                      #PSA_ERROR_BUFFER_TOO_SMALL.
+ *                      If the parameters are a valid combination that is not
+ *                      supported, return either a sensible size or 0.
+ *                      If the parameters are not valid,
+ *                      the return value is unspecified.
+ *
+ *                      If the parameters are valid and supported,
+ *                      return the same result as
+ *                      #PSA_EXPORT_KEY_OUTPUT_SIZE(
+ *                          \p #PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(\p key_type),
+ *                          \p key_bits).
+ */
+#define PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(key_type, key_bits)                           \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_ECC(key_type) ? PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     0)
+
+/** Sufficient buffer size for exporting any asymmetric key pair.
+ *
+ * This macro expands to a compile-time constant integer. This value is
+ * a sufficient buffer size when calling psa_export_key() to export any
+ * asymmetric key pair, regardless of the exact key type and key size.
+ *
+ * See also #PSA_EXPORT_KEY_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_EXPORT_KEY_PAIR_MAX_SIZE                                            \
+    (PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) >        \
+     PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS) ?      \
+     PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) :        \
+     PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** Sufficient buffer size for exporting any asymmetric public key.
+ *
+ * This macro expands to a compile-time constant integer. This value is
+ * a sufficient buffer size when calling psa_export_key() or
+ * psa_export_public_key() to export any asymmetric public key,
+ * regardless of the exact key type and key size.
+ *
+ * See also #PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_EXPORT_PUBLIC_KEY_MAX_SIZE                                          \
+    (PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) >      \
+     PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS) ?    \
+     PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) :      \
+     PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** Sufficient output buffer size for psa_raw_key_agreement().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * See also #PSA_RAW_KEY_AGREEMENT_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type      A supported key type.
+ * \param key_bits      The size of the key in bits.
+ *
+ * \return              If the parameters are valid and supported, return
+ *                      a buffer size in bytes that guarantees that
+ *                      psa_raw_key_agreement() will not fail with
+ *                      #PSA_ERROR_BUFFER_TOO_SMALL.
+ *                      If the parameters are a valid combination that
+ *                      is not supported, return either a sensible size or 0.
+ *                      If the parameters are not valid,
+ *                      the return value is unspecified.
+ */
+/* FFDH is not yet supported in PSA. */
+#define PSA_RAW_KEY_AGREEMENT_OUTPUT_SIZE(key_type, key_bits)   \
+    (PSA_KEY_TYPE_IS_ECC_KEY_PAIR(key_type) ?                   \
+     PSA_BITS_TO_BYTES(key_bits) :                              \
+     0)
+
+/** Maximum size of the output from psa_raw_key_agreement().
+ *
+ * This macro expands to a compile-time constant integer. This value is the
+ * maximum size of the output any raw key agreement algorithm, in bytes.
+ *
+ * See also #PSA_RAW_KEY_AGREEMENT_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_RAW_KEY_AGREEMENT_OUTPUT_MAX_SIZE   \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** The default IV size for a cipher algorithm, in bytes.
+ *
+ * The IV that is generated as part of a call to #psa_cipher_encrypt() is always
+ * the default IV length for the algorithm.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to
+ * store the IV output from #psa_cipher_generate_iv() when using
+ * a multi-part cipher operation.
+ *
+ * See also #PSA_CIPHER_IV_MAX_SIZE.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  A symmetric key type that is compatible with algorithm \p alg.
+ *
+ * \param alg       A cipher algorithm (\c PSA_ALG_XXX value such that #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \return The default IV size for the specified key type and algorithm.
+ *         If the algorithm does not use an IV, return 0.
+ *         If the key type or cipher algorithm is not recognized,
+ *         or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_IV_LENGTH(key_type, alg) \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) > 1 && \
+        ((alg) == PSA_ALG_CTR || \
+         (alg) == PSA_ALG_CFB || \
+         (alg) == PSA_ALG_OFB || \
+         (alg) == PSA_ALG_XTS || \
+         (alg) == PSA_ALG_CBC_NO_PADDING || \
+         (alg) == PSA_ALG_CBC_PKCS7) ? PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     (key_type) == PSA_KEY_TYPE_CHACHA20 && \
+         (alg) == PSA_ALG_STREAM_CIPHER ? 12 : \
+     0)
+
+/** The maximum IV size for all supported cipher algorithms, in bytes.
+ *
+ * See also #PSA_CIPHER_IV_LENGTH().
+ */
+#define PSA_CIPHER_IV_MAX_SIZE 16
+
+/** The maximum size of the output of psa_cipher_encrypt(), in bytes.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_encrypt() will not fail due to an insufficient buffer size.
+ * Depending on the algorithm, the actual size of the output might be smaller.
+ *
+ * See also #PSA_CIPHER_ENCRYPT_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible,
+ *                      return 0.
+ */
+#define PSA_CIPHER_ENCRYPT_OUTPUT_SIZE(key_type, alg, input_length)             \
+    (alg == PSA_ALG_CBC_PKCS7 ?                                                 \
+     (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) != 0 ?                            \
+     PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type),          \
+                              (input_length) + 1) +                             \
+     PSA_CIPHER_IV_LENGTH((key_type), (alg)) : 0) :                             \
+     (PSA_ALG_IS_CIPHER(alg) ?                                                  \
+      (input_length) + PSA_CIPHER_IV_LENGTH((key_type), (alg)) :                \
+     0))
+
+/** A sufficient output buffer size for psa_cipher_encrypt(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_encrypt() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_ENCRYPT_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ *
+ */
+#define PSA_CIPHER_ENCRYPT_OUTPUT_MAX_SIZE(input_length)                        \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE,                  \
+                              (input_length) + 1) +                             \
+     PSA_CIPHER_IV_MAX_SIZE)
+
+/** The maximum size of the output of psa_cipher_decrypt(), in bytes.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_decrypt() will not fail due to an insufficient buffer size.
+ * Depending on the algorithm, the actual size of the output might be smaller.
+ *
+ * See also #PSA_CIPHER_DECRYPT_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible,
+ *                      return 0.
+ */
+#define PSA_CIPHER_DECRYPT_OUTPUT_SIZE(key_type, alg, input_length)                 \
+    (PSA_ALG_IS_CIPHER(alg) &&                                                      \
+     ((key_type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC ? \
+     (input_length) :                                                               \
+     0)
+
+/** A sufficient output buffer size for psa_cipher_decrypt(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_decrypt() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_DECRYPT_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ */
+#define PSA_CIPHER_DECRYPT_OUTPUT_MAX_SIZE(input_length)    \
+    (input_length)
+
+/** A sufficient output buffer size for psa_cipher_update().
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_update() will not fail due to an insufficient buffer size.
+ * The actual size of the output might be smaller in any given call.
+ *
+ * See also #PSA_CIPHER_UPDATE_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_UPDATE_OUTPUT_SIZE(key_type, alg, input_length)              \
+    (PSA_ALG_IS_CIPHER(alg) ?                                                   \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) != 0 ?                             \
+     (((alg) == PSA_ALG_CBC_PKCS7      ||                                       \
+       (alg) == PSA_ALG_CBC_NO_PADDING ||                                       \
+       (alg) == PSA_ALG_ECB_NO_PADDING) ?                                       \
+      PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type),         \
+                                input_length) :                                 \
+      (input_length)) : 0) :                                                    \
+     0)
+
+/** A sufficient output buffer size for psa_cipher_update(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_update() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_UPDATE_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ */
+#define PSA_CIPHER_UPDATE_OUTPUT_MAX_SIZE(input_length)     \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, input_length))
+
+/** A sufficient ciphertext buffer size for psa_cipher_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_cipher_finish() will not fail due to an insufficient
+ * ciphertext buffer size. The actual size of the output might be smaller in
+ * any given call.
+ *
+ * See also #PSA_CIPHER_FINISH_OUTPUT_MAX_SIZE().
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_FINISH_OUTPUT_SIZE(key_type, alg)    \
+    (PSA_ALG_IS_CIPHER(alg) ?                           \
+     (alg == PSA_ALG_CBC_PKCS7 ?                        \
+      PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) :         \
+      0) :                                              \
+     0)
+
+/** A sufficient ciphertext buffer size for psa_cipher_finish(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * See also #PSA_CIPHER_FINISH_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_CIPHER_FINISH_OUTPUT_MAX_SIZE           \
+    (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+#endif /* PSA_CRYPTO_SIZES_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_struct.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_struct.h
new file mode 100644
index 00000000000..23a02a5d8ef
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_struct.h
@@ -0,0 +1,478 @@
+/**
+ * \file psa/crypto_struct.h
+ *
+ * \brief PSA cryptography module: Mbed TLS structured type implementations
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains the definitions of some data structures with
+ * implementation-specific definitions.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, it is expected that the front-end and the back-end
+ * would have different versions of this file.
+ *
+ * <h3>Design notes about multipart operation structures</h3>
+ *
+ * For multipart operations without driver delegation support, each multipart
+ * operation structure contains a `psa_algorithm_t alg` field which indicates
+ * which specific algorithm the structure is for. When the structure is not in
+ * use, `alg` is 0. Most of the structure consists of a union which is
+ * discriminated by `alg`.
+ *
+ * For multipart operations with driver delegation support, each multipart
+ * operation structure contains an `unsigned int id` field indicating which
+ * driver got assigned to do the operation. When the structure is not in use,
+ * 'id' is 0. The structure contains also a driver context which is the union
+ * of the contexts of all drivers able to handle the type of multipart
+ * operation.
+ *
+ * Note that when `alg` or `id` is 0, the content of other fields is undefined.
+ * In particular, it is not guaranteed that a freshly-initialized structure
+ * is all-zero: we initialize structures to something like `{0, 0}`, which
+ * is only guaranteed to initializes the first member of the union;
+ * GCC and Clang initialize the whole structure to 0 (at the time of writing),
+ * but MSVC and CompCert don't.
+ *
+ * In Mbed Crypto, multipart operation structures live independently from
+ * the key. This allows Mbed Crypto to free the key objects when destroying
+ * a key slot. If a multipart operation needs to remember the key after
+ * the setup function returns, the operation structure needs to contain a
+ * copy of the key.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_STRUCT_H
+#define PSA_CRYPTO_STRUCT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/cmac.h"
+#include "mbedtls/gcm.h"
+
+/* Include the context definition for the compiled-in drivers for the primitive
+ * algorithms. */
+#include "psa/crypto_driver_contexts_primitives.h"
+
+struct psa_hash_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_driver_wrappers.h.
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. the driver context is not active, in use). */
+    unsigned int id;
+    psa_driver_hash_context_t ctx;
+};
+
+#define PSA_HASH_OPERATION_INIT {0, {0}}
+static inline struct psa_hash_operation_s psa_hash_operation_init( void )
+{
+    const struct psa_hash_operation_s v = PSA_HASH_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_cipher_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_crypto_driver_wrappers.h
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. none of the driver contexts are active). */
+    unsigned int id;
+
+    unsigned int iv_required : 1;
+    unsigned int iv_set : 1;
+
+    uint8_t default_iv_length;
+
+    psa_driver_cipher_context_t ctx;
+};
+
+#define PSA_CIPHER_OPERATION_INIT {0, 0, 0, 0, {0}}
+static inline struct psa_cipher_operation_s psa_cipher_operation_init( void )
+{
+    const struct psa_cipher_operation_s v = PSA_CIPHER_OPERATION_INIT;
+    return( v );
+}
+
+/* Include the context definition for the compiled-in drivers for the composite
+ * algorithms. */
+#include "psa/crypto_driver_contexts_composites.h"
+
+struct psa_mac_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_driver_wrappers.h
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. none of the driver contexts are active). */
+    unsigned int id;
+    uint8_t mac_size;
+    unsigned int is_sign : 1;
+    psa_driver_mac_context_t ctx;
+};
+
+#define PSA_MAC_OPERATION_INIT {0, 0, 0, {0}}
+static inline struct psa_mac_operation_s psa_mac_operation_init( void )
+{
+    const struct psa_mac_operation_s v = PSA_MAC_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_aead_operation_s
+{
+    psa_algorithm_t alg;
+    unsigned int key_set : 1;
+    unsigned int iv_set : 1;
+    uint8_t iv_size;
+    uint8_t block_size;
+    union
+    {
+        unsigned dummy; /* Enable easier initializing of the union. */
+        mbedtls_cipher_context_t cipher;
+    } ctx;
+};
+
+#define PSA_AEAD_OPERATION_INIT {0, 0, 0, 0, 0, {0}}
+static inline struct psa_aead_operation_s psa_aead_operation_init( void )
+{
+    const struct psa_aead_operation_s v = PSA_AEAD_OPERATION_INIT;
+    return( v );
+}
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HKDF)
+typedef struct
+{
+    uint8_t *info;
+    size_t info_length;
+#if PSA_HASH_MAX_SIZE > 0xff
+#error "PSA_HASH_MAX_SIZE does not fit in uint8_t"
+#endif
+    uint8_t offset_in_block;
+    uint8_t block_number;
+    unsigned int state : 2;
+    unsigned int info_set : 1;
+    uint8_t output_block[PSA_HASH_MAX_SIZE];
+    uint8_t prk[PSA_HASH_MAX_SIZE];
+    struct psa_mac_operation_s hmac;
+} psa_hkdf_key_derivation_t;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HKDF */
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS)
+typedef enum
+{
+    PSA_TLS12_PRF_STATE_INIT,       /* no input provided */
+    PSA_TLS12_PRF_STATE_SEED_SET,   /* seed has been set */
+    PSA_TLS12_PRF_STATE_KEY_SET,    /* key has been set */
+    PSA_TLS12_PRF_STATE_LABEL_SET,  /* label has been set */
+    PSA_TLS12_PRF_STATE_OUTPUT      /* output has been started */
+} psa_tls12_prf_key_derivation_state_t;
+
+typedef struct psa_tls12_prf_key_derivation_s
+{
+#if PSA_HASH_MAX_SIZE > 0xff
+#error "PSA_HASH_MAX_SIZE does not fit in uint8_t"
+#endif
+
+    /* Indicates how many bytes in the current HMAC block have
+     * not yet been read by the user. */
+    uint8_t left_in_block;
+
+    /* The 1-based number of the block. */
+    uint8_t block_number;
+
+    psa_tls12_prf_key_derivation_state_t state;
+
+    uint8_t *secret;
+    size_t secret_length;
+    uint8_t *seed;
+    size_t seed_length;
+    uint8_t *label;
+    size_t label_length;
+
+    uint8_t Ai[PSA_HASH_MAX_SIZE];
+
+    /* `HMAC_hash( prk, A(i) + seed )` in the notation of RFC 5246, Sect. 5. */
+    uint8_t output_block[PSA_HASH_MAX_SIZE];
+} psa_tls12_prf_key_derivation_t;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) ||
+        * MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS */
+
+struct psa_key_derivation_s
+{
+    psa_algorithm_t alg;
+    unsigned int can_output_key : 1;
+    size_t capacity;
+    union
+    {
+        /* Make the union non-empty even with no supported algorithms. */
+        uint8_t dummy;
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HKDF)
+        psa_hkdf_key_derivation_t hkdf;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS)
+        psa_tls12_prf_key_derivation_t tls12_prf;
+#endif
+    } ctx;
+};
+
+/* This only zeroes out the first byte in the union, the rest is unspecified. */
+#define PSA_KEY_DERIVATION_OPERATION_INIT {0, 0, 0, {0}}
+static inline struct psa_key_derivation_s psa_key_derivation_operation_init( void )
+{
+    const struct psa_key_derivation_s v = PSA_KEY_DERIVATION_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_key_policy_s
+{
+    psa_key_usage_t usage;
+    psa_algorithm_t alg;
+    psa_algorithm_t alg2;
+};
+typedef struct psa_key_policy_s psa_key_policy_t;
+
+#define PSA_KEY_POLICY_INIT {0, 0, 0}
+static inline struct psa_key_policy_s psa_key_policy_init( void )
+{
+    const struct psa_key_policy_s v = PSA_KEY_POLICY_INIT;
+    return( v );
+}
+
+/* The type used internally for key sizes.
+ * Public interfaces use size_t, but internally we use a smaller type. */
+typedef uint16_t psa_key_bits_t;
+/* The maximum value of the type used to represent bit-sizes.
+ * This is used to mark an invalid key size. */
+#define PSA_KEY_BITS_TOO_LARGE ( (psa_key_bits_t) ( -1 ) )
+/* The maximum size of a key in bits.
+ * Currently defined as the maximum that can be represented, rounded down
+ * to a whole number of bytes.
+ * This is an uncast value so that it can be used in preprocessor
+ * conditionals. */
+#define PSA_MAX_KEY_BITS 0xfff8
+
+/** A mask of flags that can be stored in key attributes.
+ *
+ * This type is also used internally to store flags in slots. Internal
+ * flags are defined in library/psa_crypto_core.h. Internal flags may have
+ * the same value as external flags if they are properly handled during
+ * key creation and in psa_get_key_attributes.
+ */
+typedef uint16_t psa_key_attributes_flag_t;
+
+#define MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER     \
+    ( (psa_key_attributes_flag_t) 0x0001 )
+
+/* A mask of key attribute flags used externally only.
+ * Only meant for internal checks inside the library. */
+#define MBEDTLS_PSA_KA_MASK_EXTERNAL_ONLY (      \
+        MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER |    \
+        0 )
+
+/* A mask of key attribute flags used both internally and externally.
+ * Currently there aren't any. */
+#define MBEDTLS_PSA_KA_MASK_DUAL_USE (          \
+        0 )
+
+typedef struct
+{
+    psa_key_type_t type;
+    psa_key_bits_t bits;
+    psa_key_lifetime_t lifetime;
+    mbedtls_svc_key_id_t id;
+    psa_key_policy_t policy;
+    psa_key_attributes_flag_t flags;
+} psa_core_key_attributes_t;
+
+#define PSA_CORE_KEY_ATTRIBUTES_INIT {PSA_KEY_TYPE_NONE, 0, PSA_KEY_LIFETIME_VOLATILE, MBEDTLS_SVC_KEY_ID_INIT, PSA_KEY_POLICY_INIT, 0}
+
+struct psa_key_attributes_s
+{
+    psa_core_key_attributes_t core;
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+    psa_key_slot_number_t slot_number;
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+    void *domain_parameters;
+    size_t domain_parameters_size;
+};
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+#define PSA_KEY_ATTRIBUTES_INIT {PSA_CORE_KEY_ATTRIBUTES_INIT, 0, NULL, 0}
+#else
+#define PSA_KEY_ATTRIBUTES_INIT {PSA_CORE_KEY_ATTRIBUTES_INIT, NULL, 0}
+#endif
+
+static inline struct psa_key_attributes_s psa_key_attributes_init( void )
+{
+    const struct psa_key_attributes_s v = PSA_KEY_ATTRIBUTES_INIT;
+    return( v );
+}
+
+static inline void psa_set_key_id( psa_key_attributes_t *attributes,
+                                   mbedtls_svc_key_id_t key )
+{
+    psa_key_lifetime_t lifetime = attributes->core.lifetime;
+
+    attributes->core.id = key;
+
+    if( PSA_KEY_LIFETIME_IS_VOLATILE( lifetime ) )
+    {
+        attributes->core.lifetime =
+            PSA_KEY_LIFETIME_FROM_PERSISTENCE_AND_LOCATION(
+                PSA_KEY_LIFETIME_PERSISTENT,
+                PSA_KEY_LIFETIME_GET_LOCATION( lifetime ) );
+    }
+}
+
+static inline mbedtls_svc_key_id_t psa_get_key_id(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.id );
+}
+
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+static inline void mbedtls_set_key_owner_id( psa_key_attributes_t *attributes,
+                                             mbedtls_key_owner_id_t owner )
+{
+    attributes->core.id.owner = owner;
+}
+#endif
+
+static inline void psa_set_key_lifetime(psa_key_attributes_t *attributes,
+                                        psa_key_lifetime_t lifetime)
+{
+    attributes->core.lifetime = lifetime;
+    if( PSA_KEY_LIFETIME_IS_VOLATILE( lifetime ) )
+    {
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+        attributes->core.id.key_id = 0;
+#else
+        attributes->core.id = 0;
+#endif
+    }
+}
+
+static inline psa_key_lifetime_t psa_get_key_lifetime(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.lifetime );
+}
+
+static inline void psa_extend_key_usage_flags( psa_key_usage_t *usage_flags )
+{
+    if( *usage_flags & PSA_KEY_USAGE_SIGN_HASH )
+        *usage_flags |= PSA_KEY_USAGE_SIGN_MESSAGE;
+
+    if( *usage_flags & PSA_KEY_USAGE_VERIFY_HASH )
+        *usage_flags |= PSA_KEY_USAGE_VERIFY_MESSAGE;
+}
+
+static inline void psa_set_key_usage_flags(psa_key_attributes_t *attributes,
+                                           psa_key_usage_t usage_flags)
+{
+    psa_extend_key_usage_flags( &usage_flags );
+    attributes->core.policy.usage = usage_flags;
+}
+
+static inline psa_key_usage_t psa_get_key_usage_flags(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.usage );
+}
+
+static inline void psa_set_key_algorithm(psa_key_attributes_t *attributes,
+                                         psa_algorithm_t alg)
+{
+    attributes->core.policy.alg = alg;
+}
+
+static inline psa_algorithm_t psa_get_key_algorithm(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.alg );
+}
+
+/* This function is declared in crypto_extra.h, which comes after this
+ * header file, but we need the function here, so repeat the declaration. */
+psa_status_t psa_set_key_domain_parameters(psa_key_attributes_t *attributes,
+                                           psa_key_type_t type,
+                                           const uint8_t *data,
+                                           size_t data_length);
+
+static inline void psa_set_key_type(psa_key_attributes_t *attributes,
+                                    psa_key_type_t type)
+{
+    if( attributes->domain_parameters == NULL )
+    {
+        /* Common case: quick path */
+        attributes->core.type = type;
+    }
+    else
+    {
+        /* Call the bigger function to free the old domain paramteres.
+         * Ignore any errors which may arise due to type requiring
+         * non-default domain parameters, since this function can't
+         * report errors. */
+        (void) psa_set_key_domain_parameters( attributes, type, NULL, 0 );
+    }
+}
+
+static inline psa_key_type_t psa_get_key_type(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.type );
+}
+
+static inline void psa_set_key_bits(psa_key_attributes_t *attributes,
+                                    size_t bits)
+{
+    if( bits > PSA_MAX_KEY_BITS )
+        attributes->core.bits = PSA_KEY_BITS_TOO_LARGE;
+    else
+        attributes->core.bits = (psa_key_bits_t) bits;
+}
+
+static inline size_t psa_get_key_bits(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.bits );
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_STRUCT_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_types.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_types.h
new file mode 100644
index 00000000000..386c7d794b4
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_types.h
@@ -0,0 +1,383 @@
+/**
+ * \file psa/crypto_types.h
+ *
+ * \brief PSA cryptography module: type aliases.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h. Drivers must include the appropriate driver
+ * header file.
+ *
+ * This file contains portable definitions of integral types for properties
+ * of cryptographic keys, designations of cryptographic algorithms, and
+ * error codes returned by the library.
+ *
+ * This header file does not declare any function.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_TYPES_H
+#define PSA_CRYPTO_TYPES_H
+
+#include "crypto_platform.h"
+
+/* If MBEDTLS_PSA_CRYPTO_C is defined, make sure MBEDTLS_PSA_CRYPTO_CLIENT
+ * is defined as well to include all PSA code.
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_C)
+#define MBEDTLS_PSA_CRYPTO_CLIENT
+#endif /* MBEDTLS_PSA_CRYPTO_C */
+
+#include <stdint.h>
+
+/** \defgroup error Error codes
+ * @{
+ */
+
+/**
+ * \brief Function return status.
+ *
+ * This is either #PSA_SUCCESS (which is zero), indicating success,
+ * or a small negative value indicating that an error occurred. Errors are
+ * encoded as one of the \c PSA_ERROR_xxx values defined here. */
+/* If #PSA_SUCCESS is already defined, it means that #psa_status_t
+ * is also defined in an external header, so prevent its multiple
+ * definition.
+ */
+#ifndef PSA_SUCCESS
+typedef int32_t psa_status_t;
+#endif
+
+/**@}*/
+
+/** \defgroup crypto_types Key and algorithm types
+ * @{
+ */
+
+/** \brief Encoding of a key type.
+ */
+typedef uint16_t psa_key_type_t;
+
+/** The type of PSA elliptic curve family identifiers.
+ *
+ * The curve identifier is required to create an ECC key using the
+ * PSA_KEY_TYPE_ECC_KEY_PAIR() or PSA_KEY_TYPE_ECC_PUBLIC_KEY()
+ * macros.
+ *
+ * Values defined by this standard will never be in the range 0x80-0xff.
+ * Vendors who define additional families must use an encoding in this range.
+ */
+typedef uint8_t psa_ecc_family_t;
+
+/** The type of PSA Diffie-Hellman group family identifiers.
+ *
+ * The group identifier is required to create an Diffie-Hellman key using the
+ * PSA_KEY_TYPE_DH_KEY_PAIR() or PSA_KEY_TYPE_DH_PUBLIC_KEY()
+ * macros.
+ *
+ * Values defined by this standard will never be in the range 0x80-0xff.
+ * Vendors who define additional families must use an encoding in this range.
+ */
+typedef uint8_t psa_dh_family_t;
+
+/** \brief Encoding of a cryptographic algorithm.
+ *
+ * For algorithms that can be applied to multiple key types, this type
+ * does not encode the key type. For example, for symmetric ciphers
+ * based on a block cipher, #psa_algorithm_t encodes the block cipher
+ * mode and the padding mode while the block cipher itself is encoded
+ * via #psa_key_type_t.
+ */
+typedef uint32_t psa_algorithm_t;
+
+/**@}*/
+
+/** \defgroup key_lifetimes Key lifetimes
+ * @{
+ */
+
+/** Encoding of key lifetimes.
+ *
+ * The lifetime of a key indicates where it is stored and what system actions
+ * may create and destroy it.
+ *
+ * Lifetime values have the following structure:
+ * - Bits 0-7 (#PSA_KEY_LIFETIME_GET_PERSISTENCE(\c lifetime)):
+ *   persistence level. This value indicates what device management
+ *   actions can cause it to be destroyed. In particular, it indicates
+ *   whether the key is _volatile_ or _persistent_.
+ *   See ::psa_key_persistence_t for more information.
+ * - Bits 8-31 (#PSA_KEY_LIFETIME_GET_LOCATION(\c lifetime)):
+ *   location indicator. This value indicates which part of the system
+ *   has access to the key material and can perform operations using the key.
+ *   See ::psa_key_location_t for more information.
+ *
+ * Volatile keys are automatically destroyed when the application instance
+ * terminates or on a power reset of the device. Persistent keys are
+ * preserved until the application explicitly destroys them or until an
+ * integration-specific device management event occurs (for example,
+ * a factory reset).
+ *
+ * Persistent keys have a key identifier of type #mbedtls_svc_key_id_t.
+ * This identifier remains valid throughout the lifetime of the key,
+ * even if the application instance that created the key terminates.
+ * The application can call psa_open_key() to open a persistent key that
+ * it created previously.
+ *
+ * The default lifetime of a key is #PSA_KEY_LIFETIME_VOLATILE. The lifetime
+ * #PSA_KEY_LIFETIME_PERSISTENT is supported if persistent storage is
+ * available. Other lifetime values may be supported depending on the
+ * library configuration.
+ */
+typedef uint32_t psa_key_lifetime_t;
+
+/** Encoding of key persistence levels.
+ *
+ * What distinguishes different persistence levels is what device management
+ * events may cause keys to be destroyed. _Volatile_ keys are destroyed
+ * by a power reset. Persistent keys may be destroyed by events such as
+ * a transfer of ownership or a factory reset. What management events
+ * actually affect persistent keys at different levels is outside the
+ * scope of the PSA Cryptography specification.
+ *
+ * The PSA Cryptography specification defines the following values of
+ * persistence levels:
+ * - \c 0 = #PSA_KEY_PERSISTENCE_VOLATILE: volatile key.
+ *   A volatile key is automatically destroyed by the implementation when
+ *   the application instance terminates. In particular, a volatile key
+ *   is automatically destroyed on a power reset of the device.
+ * - \c 1 = #PSA_KEY_PERSISTENCE_DEFAULT:
+ *   persistent key with a default lifetime.
+ * - \c 2-254: currently not supported by Mbed TLS.
+ * - \c 255 = #PSA_KEY_PERSISTENCE_READ_ONLY:
+ *   read-only or write-once key.
+ *   A key with this persistence level cannot be destroyed.
+ *   Mbed TLS does not currently offer a way to create such keys, but
+ *   integrations of Mbed TLS can use it for built-in keys that the
+ *   application cannot modify (for example, a hardware unique key (HUK)).
+ *
+ * \note Key persistence levels are 8-bit values. Key management
+ *       interfaces operate on lifetimes (type ::psa_key_lifetime_t) which
+ *       encode the persistence as the lower 8 bits of a 32-bit value.
+ */
+typedef uint8_t psa_key_persistence_t;
+
+/** Encoding of key location indicators.
+ *
+ * If an integration of Mbed TLS can make calls to external
+ * cryptoprocessors such as secure elements, the location of a key
+ * indicates which secure element performs the operations on the key.
+ * Depending on the design of the secure element, the key
+ * material may be stored either in the secure element, or
+ * in wrapped (encrypted) form alongside the key metadata in the
+ * primary local storage.
+ *
+ * The PSA Cryptography API specification defines the following values of
+ * location indicators:
+ * - \c 0: primary local storage.
+ *   This location is always available.
+ *   The primary local storage is typically the same storage area that
+ *   contains the key metadata.
+ * - \c 1: primary secure element.
+ *   Integrations of Mbed TLS should support this value if there is a secure
+ *   element attached to the operating environment.
+ *   As a guideline, secure elements may provide higher resistance against
+ *   side channel and physical attacks than the primary local storage, but may
+ *   have restrictions on supported key types, sizes, policies and operations
+ *   and may have different performance characteristics.
+ * - \c 2-0x7fffff: other locations defined by a PSA specification.
+ *   The PSA Cryptography API does not currently assign any meaning to these
+ *   locations, but future versions of that specification or other PSA
+ *   specifications may do so.
+ * - \c 0x800000-0xffffff: vendor-defined locations.
+ *   No PSA specification will assign a meaning to locations in this range.
+ *
+ * \note Key location indicators are 24-bit values. Key management
+ *       interfaces operate on lifetimes (type ::psa_key_lifetime_t) which
+ *       encode the location as the upper 24 bits of a 32-bit value.
+ */
+typedef uint32_t psa_key_location_t;
+
+/** Encoding of identifiers of persistent keys.
+ *
+ * - Applications may freely choose key identifiers in the range
+ *   #PSA_KEY_ID_USER_MIN to #PSA_KEY_ID_USER_MAX.
+ * - The implementation may define additional key identifiers in the range
+ *   #PSA_KEY_ID_VENDOR_MIN to #PSA_KEY_ID_VENDOR_MAX.
+ * - 0 is reserved as an invalid key identifier.
+ * - Key identifiers outside these ranges are reserved for future use.
+ */
+typedef uint32_t psa_key_id_t;
+
+#if !defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+typedef psa_key_id_t mbedtls_svc_key_id_t;
+
+#else /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+/* Implementation-specific: The Mbed Cryptography library can be built as
+ * part of a multi-client service that exposes the PSA Cryptograpy API in each
+ * client and encodes the client identity in the key identifier argument of
+ * functions such as psa_open_key().
+ */
+typedef struct
+{
+    psa_key_id_t key_id;
+    mbedtls_key_owner_id_t owner;
+} mbedtls_svc_key_id_t;
+
+#endif /* !MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/**@}*/
+
+/** \defgroup policy Key policies
+ * @{
+ */
+
+/** \brief Encoding of permitted usage on a key. */
+typedef uint32_t psa_key_usage_t;
+
+/**@}*/
+
+/** \defgroup attributes Key attributes
+ * @{
+ */
+
+/** The type of a structure containing key attributes.
+ *
+ * This is an opaque structure that can represent the metadata of a key
+ * object. Metadata that can be stored in attributes includes:
+ * - The location of the key in storage, indicated by its key identifier
+ *   and its lifetime.
+ * - The key's policy, comprising usage flags and a specification of
+ *   the permitted algorithm(s).
+ * - Information about the key itself: the key type and its size.
+ * - Additional implementation-defined attributes.
+ *
+ * The actual key material is not considered an attribute of a key.
+ * Key attributes do not contain information that is generally considered
+ * highly confidential.
+ *
+ * An attribute structure works like a simple data structure where each function
+ * `psa_set_key_xxx` sets a field and the corresponding function
+ * `psa_get_key_xxx` retrieves the value of the corresponding field.
+ * However, a future version of the library  may report values that are
+ * equivalent to the original one, but have a different encoding. Invalid
+ * values may be mapped to different, also invalid values.
+ *
+ * An attribute structure may contain references to auxiliary resources,
+ * for example pointers to allocated memory or indirect references to
+ * pre-calculated values. In order to free such resources, the application
+ * must call psa_reset_key_attributes(). As an exception, calling
+ * psa_reset_key_attributes() on an attribute structure is optional if
+ * the structure has only been modified by the following functions
+ * since it was initialized or last reset with psa_reset_key_attributes():
+ * - psa_set_key_id()
+ * - psa_set_key_lifetime()
+ * - psa_set_key_type()
+ * - psa_set_key_bits()
+ * - psa_set_key_usage_flags()
+ * - psa_set_key_algorithm()
+ *
+ * Before calling any function on a key attribute structure, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_key_attributes_t attributes;
+ *   memset(&attributes, 0, sizeof(attributes));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_key_attributes_t attributes = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_KEY_ATTRIBUTES_INIT,
+ *   for example:
+ *   \code
+ *   psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_key_attributes_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_key_attributes_t attributes;
+ *   attributes = psa_key_attributes_init();
+ *   \endcode
+ *
+ * A freshly initialized attribute structure contains the following
+ * values:
+ *
+ * - lifetime: #PSA_KEY_LIFETIME_VOLATILE.
+ * - key identifier: 0 (which is not a valid key identifier).
+ * - type: \c 0 (meaning that the type is unspecified).
+ * - key size: \c 0 (meaning that the size is unspecified).
+ * - usage flags: \c 0 (which allows no usage except exporting a public key).
+ * - algorithm: \c 0 (which allows no cryptographic usage, but allows
+ *   exporting).
+ *
+ * A typical sequence to create a key is as follows:
+ * -# Create and initialize an attribute structure.
+ * -# If the key is persistent, call psa_set_key_id().
+ *    Also call psa_set_key_lifetime() to place the key in a non-default
+ *    location.
+ * -# Set the key policy with psa_set_key_usage_flags() and
+ *    psa_set_key_algorithm().
+ * -# Set the key type with psa_set_key_type().
+ *    Skip this step if copying an existing key with psa_copy_key().
+ * -# When generating a random key with psa_generate_key() or deriving a key
+ *    with psa_key_derivation_output_key(), set the desired key size with
+ *    psa_set_key_bits().
+ * -# Call a key creation function: psa_import_key(), psa_generate_key(),
+ *    psa_key_derivation_output_key() or psa_copy_key(). This function reads
+ *    the attribute structure, creates a key with these attributes, and
+ *    outputs a key identifier to the newly created key.
+ * -# The attribute structure is now no longer necessary.
+ *    You may call psa_reset_key_attributes(), although this is optional
+ *    with the workflow presented here because the attributes currently
+ *    defined in this specification do not require any additional resources
+ *    beyond the structure itself.
+ *
+ * A typical sequence to query a key's attributes is as follows:
+ * -# Call psa_get_key_attributes().
+ * -# Call `psa_get_key_xxx` functions to retrieve the attribute(s) that
+ *    you are interested in.
+ * -# Call psa_reset_key_attributes() to free any resources that may be
+ *    used by the attribute structure.
+ *
+ * Once a key has been created, it is impossible to change its attributes.
+ */
+typedef struct psa_key_attributes_s psa_key_attributes_t;
+
+
+#ifndef __DOXYGEN_ONLY__
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+/* Mbed Crypto defines this type in crypto_types.h because it is also
+ * visible to applications through an implementation-specific extension.
+ * For the PSA Cryptography specification, this type is only visible
+ * via crypto_se_driver.h. */
+typedef uint64_t psa_key_slot_number_t;
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+#endif /* !__DOXYGEN_ONLY__ */
+
+/**@}*/
+
+/** \defgroup derivation Key derivation
+ * @{
+ */
+
+/** \brief Encoding of the step of a key derivation. */
+typedef uint16_t psa_key_derivation_step_t;
+
+/**@}*/
+
+#endif /* PSA_CRYPTO_TYPES_H */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_values.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_values.h
new file mode 100644
index 00000000000..fafe93cf9ba
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/psa/crypto_values.h
@@ -0,0 +1,2325 @@
+/**
+ * \file psa/crypto_values.h
+ *
+ * \brief PSA cryptography module: macros to build and analyze integer values.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h. Drivers must include the appropriate driver
+ * header file.
+ *
+ * This file contains portable definitions of macros to build and analyze
+ * values of integral types that encode properties of cryptographic keys,
+ * designations of cryptographic algorithms, and error codes returned by
+ * the library.
+ *
+ * This header file only defines preprocessor macros.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_VALUES_H
+#define PSA_CRYPTO_VALUES_H
+
+/** \defgroup error Error codes
+ * @{
+ */
+
+/* PSA error codes */
+
+/** The action was completed successfully. */
+#define PSA_SUCCESS ((psa_status_t)0)
+
+/** An error occurred that does not correspond to any defined
+ * failure cause.
+ *
+ * Implementations may use this error code if none of the other standard
+ * error codes are applicable. */
+#define PSA_ERROR_GENERIC_ERROR         ((psa_status_t)-132)
+
+/** The requested operation or a parameter is not supported
+ * by this implementation.
+ *
+ * Implementations should return this error code when an enumeration
+ * parameter such as a key type, algorithm, etc. is not recognized.
+ * If a combination of parameters is recognized and identified as
+ * not valid, return #PSA_ERROR_INVALID_ARGUMENT instead. */
+#define PSA_ERROR_NOT_SUPPORTED         ((psa_status_t)-134)
+
+/** The requested action is denied by a policy.
+ *
+ * Implementations should return this error code when the parameters
+ * are recognized as valid and supported, and a policy explicitly
+ * denies the requested operation.
+ *
+ * If a subset of the parameters of a function call identify a
+ * forbidden operation, and another subset of the parameters are
+ * not valid or not supported, it is unspecified whether the function
+ * returns #PSA_ERROR_NOT_PERMITTED, #PSA_ERROR_NOT_SUPPORTED or
+ * #PSA_ERROR_INVALID_ARGUMENT. */
+#define PSA_ERROR_NOT_PERMITTED         ((psa_status_t)-133)
+
+/** An output buffer is too small.
+ *
+ * Applications can call the \c PSA_xxx_SIZE macro listed in the function
+ * description to determine a sufficient buffer size.
+ *
+ * Implementations should preferably return this error code only
+ * in cases when performing the operation with a larger output
+ * buffer would succeed. However implementations may return this
+ * error if a function has invalid or unsupported parameters in addition
+ * to the parameters that determine the necessary output buffer size. */
+#define PSA_ERROR_BUFFER_TOO_SMALL      ((psa_status_t)-138)
+
+/** Asking for an item that already exists
+ *
+ * Implementations should return this error, when attempting
+ * to write an item (like a key) that already exists. */
+#define PSA_ERROR_ALREADY_EXISTS        ((psa_status_t)-139)
+
+/** Asking for an item that doesn't exist
+ *
+ * Implementations should return this error, if a requested item (like
+ * a key) does not exist. */
+#define PSA_ERROR_DOES_NOT_EXIST        ((psa_status_t)-140)
+
+/** The requested action cannot be performed in the current state.
+ *
+ * Multipart operations return this error when one of the
+ * functions is called out of sequence. Refer to the function
+ * descriptions for permitted sequencing of functions.
+ *
+ * Implementations shall not return this error code to indicate
+ * that a key either exists or not,
+ * but shall instead return #PSA_ERROR_ALREADY_EXISTS or #PSA_ERROR_DOES_NOT_EXIST
+ * as applicable.
+ *
+ * Implementations shall not return this error code to indicate that a
+ * key identifier is invalid, but shall return #PSA_ERROR_INVALID_HANDLE
+ * instead. */
+#define PSA_ERROR_BAD_STATE             ((psa_status_t)-137)
+
+/** The parameters passed to the function are invalid.
+ *
+ * Implementations may return this error any time a parameter or
+ * combination of parameters are recognized as invalid.
+ *
+ * Implementations shall not return this error code to indicate that a
+ * key identifier is invalid, but shall return #PSA_ERROR_INVALID_HANDLE
+ * instead.
+ */
+#define PSA_ERROR_INVALID_ARGUMENT      ((psa_status_t)-135)
+
+/** There is not enough runtime memory.
+ *
+ * If the action is carried out across multiple security realms, this
+ * error can refer to available memory in any of the security realms. */
+#define PSA_ERROR_INSUFFICIENT_MEMORY   ((psa_status_t)-141)
+
+/** There is not enough persistent storage.
+ *
+ * Functions that modify the key storage return this error code if
+ * there is insufficient storage space on the host media. In addition,
+ * many functions that do not otherwise access storage may return this
+ * error code if the implementation requires a mandatory log entry for
+ * the requested action and the log storage space is full. */
+#define PSA_ERROR_INSUFFICIENT_STORAGE  ((psa_status_t)-142)
+
+/** There was a communication failure inside the implementation.
+ *
+ * This can indicate a communication failure between the application
+ * and an external cryptoprocessor or between the cryptoprocessor and
+ * an external volatile or persistent memory. A communication failure
+ * may be transient or permanent depending on the cause.
+ *
+ * \warning If a function returns this error, it is undetermined
+ * whether the requested action has completed or not. Implementations
+ * should return #PSA_SUCCESS on successful completion whenever
+ * possible, however functions may return #PSA_ERROR_COMMUNICATION_FAILURE
+ * if the requested action was completed successfully in an external
+ * cryptoprocessor but there was a breakdown of communication before
+ * the cryptoprocessor could report the status to the application.
+ */
+#define PSA_ERROR_COMMUNICATION_FAILURE ((psa_status_t)-145)
+
+/** There was a storage failure that may have led to data loss.
+ *
+ * This error indicates that some persistent storage is corrupted.
+ * It should not be used for a corruption of volatile memory
+ * (use #PSA_ERROR_CORRUPTION_DETECTED), for a communication error
+ * between the cryptoprocessor and its external storage (use
+ * #PSA_ERROR_COMMUNICATION_FAILURE), or when the storage is
+ * in a valid state but is full (use #PSA_ERROR_INSUFFICIENT_STORAGE).
+ *
+ * Note that a storage failure does not indicate that any data that was
+ * previously read is invalid. However this previously read data may no
+ * longer be readable from storage.
+ *
+ * When a storage failure occurs, it is no longer possible to ensure
+ * the global integrity of the keystore. Depending on the global
+ * integrity guarantees offered by the implementation, access to other
+ * data may or may not fail even if the data is still readable but
+ * its integrity cannot be guaranteed.
+ *
+ * Implementations should only use this error code to report a
+ * permanent storage corruption. However application writers should
+ * keep in mind that transient errors while reading the storage may be
+ * reported using this error code. */
+#define PSA_ERROR_STORAGE_FAILURE       ((psa_status_t)-146)
+
+/** A hardware failure was detected.
+ *
+ * A hardware failure may be transient or permanent depending on the
+ * cause. */
+#define PSA_ERROR_HARDWARE_FAILURE      ((psa_status_t)-147)
+
+/** A tampering attempt was detected.
+ *
+ * If an application receives this error code, there is no guarantee
+ * that previously accessed or computed data was correct and remains
+ * confidential. Applications should not perform any security function
+ * and should enter a safe failure state.
+ *
+ * Implementations may return this error code if they detect an invalid
+ * state that cannot happen during normal operation and that indicates
+ * that the implementation's security guarantees no longer hold. Depending
+ * on the implementation architecture and on its security and safety goals,
+ * the implementation may forcibly terminate the application.
+ *
+ * This error code is intended as a last resort when a security breach
+ * is detected and it is unsure whether the keystore data is still
+ * protected. Implementations shall only return this error code
+ * to report an alarm from a tampering detector, to indicate that
+ * the confidentiality of stored data can no longer be guaranteed,
+ * or to indicate that the integrity of previously returned data is now
+ * considered compromised. Implementations shall not use this error code
+ * to indicate a hardware failure that merely makes it impossible to
+ * perform the requested operation (use #PSA_ERROR_COMMUNICATION_FAILURE,
+ * #PSA_ERROR_STORAGE_FAILURE, #PSA_ERROR_HARDWARE_FAILURE,
+ * #PSA_ERROR_INSUFFICIENT_ENTROPY or other applicable error code
+ * instead).
+ *
+ * This error indicates an attack against the application. Implementations
+ * shall not return this error code as a consequence of the behavior of
+ * the application itself. */
+#define PSA_ERROR_CORRUPTION_DETECTED    ((psa_status_t)-151)
+
+/** There is not enough entropy to generate random data needed
+ * for the requested action.
+ *
+ * This error indicates a failure of a hardware random generator.
+ * Application writers should note that this error can be returned not
+ * only by functions whose purpose is to generate random data, such
+ * as key, IV or nonce generation, but also by functions that execute
+ * an algorithm with a randomized result, as well as functions that
+ * use randomization of intermediate computations as a countermeasure
+ * to certain attacks.
+ *
+ * Implementations should avoid returning this error after psa_crypto_init()
+ * has succeeded. Implementations should generate sufficient
+ * entropy during initialization and subsequently use a cryptographically
+ * secure pseudorandom generator (PRNG). However implementations may return
+ * this error at any time if a policy requires the PRNG to be reseeded
+ * during normal operation. */
+#define PSA_ERROR_INSUFFICIENT_ENTROPY  ((psa_status_t)-148)
+
+/** The signature, MAC or hash is incorrect.
+ *
+ * Verification functions return this error if the verification
+ * calculations completed successfully, and the value to be verified
+ * was determined to be incorrect.
+ *
+ * If the value to verify has an invalid size, implementations may return
+ * either #PSA_ERROR_INVALID_ARGUMENT or #PSA_ERROR_INVALID_SIGNATURE. */
+#define PSA_ERROR_INVALID_SIGNATURE     ((psa_status_t)-149)
+
+/** The decrypted padding is incorrect.
+ *
+ * \warning In some protocols, when decrypting data, it is essential that
+ * the behavior of the application does not depend on whether the padding
+ * is correct, down to precise timing. Applications should prefer
+ * protocols that use authenticated encryption rather than plain
+ * encryption. If the application must perform a decryption of
+ * unauthenticated data, the application writer should take care not
+ * to reveal whether the padding is invalid.
+ *
+ * Implementations should strive to make valid and invalid padding
+ * as close as possible to indistinguishable to an external observer.
+ * In particular, the timing of a decryption operation should not
+ * depend on the validity of the padding. */
+#define PSA_ERROR_INVALID_PADDING       ((psa_status_t)-150)
+
+/** Return this error when there's insufficient data when attempting
+ * to read from a resource. */
+#define PSA_ERROR_INSUFFICIENT_DATA     ((psa_status_t)-143)
+
+/** The key identifier is not valid. See also :ref:\`key-handles\`.
+ */
+#define PSA_ERROR_INVALID_HANDLE        ((psa_status_t)-136)
+
+/** Stored data has been corrupted.
+ *
+ * This error indicates that some persistent storage has suffered corruption.
+ * It does not indicate the following situations, which have specific error
+ * codes:
+ *
+ * - A corruption of volatile memory - use #PSA_ERROR_CORRUPTION_DETECTED.
+ * - A communication error between the cryptoprocessor and its external
+ *   storage - use #PSA_ERROR_COMMUNICATION_FAILURE.
+ * - When the storage is in a valid state but is full - use
+ *   #PSA_ERROR_INSUFFICIENT_STORAGE.
+ * - When the storage fails for other reasons - use
+ *   #PSA_ERROR_STORAGE_FAILURE.
+ * - When the stored data is not valid - use #PSA_ERROR_DATA_INVALID.
+ *
+ * \note A storage corruption does not indicate that any data that was
+ * previously read is invalid. However this previously read data might no
+ * longer be readable from storage.
+ *
+ * When a storage failure occurs, it is no longer possible to ensure the
+ * global integrity of the keystore.
+ */
+#define PSA_ERROR_DATA_CORRUPT          ((psa_status_t)-152)
+
+/** Data read from storage is not valid for the implementation.
+ *
+ * This error indicates that some data read from storage does not have a valid
+ * format. It does not indicate the following situations, which have specific
+ * error codes:
+ *
+ * - When the storage or stored data is corrupted - use #PSA_ERROR_DATA_CORRUPT
+ * - When the storage fails for other reasons - use #PSA_ERROR_STORAGE_FAILURE
+ * - An invalid argument to the API - use #PSA_ERROR_INVALID_ARGUMENT
+ *
+ * This error is typically a result of either storage corruption on a
+ * cleartext storage backend, or an attempt to read data that was
+ * written by an incompatible version of the library.
+ */
+#define PSA_ERROR_DATA_INVALID          ((psa_status_t)-153)
+
+/**@}*/
+
+/** \defgroup crypto_types Key and algorithm types
+ * @{
+ */
+
+/** An invalid key type value.
+ *
+ * Zero is not the encoding of any key type.
+ */
+#define PSA_KEY_TYPE_NONE                           ((psa_key_type_t)0x0000)
+
+/** Vendor-defined key type flag.
+ *
+ * Key types defined by this standard will never have the
+ * #PSA_KEY_TYPE_VENDOR_FLAG bit set. Vendors who define additional key types
+ * must use an encoding with the #PSA_KEY_TYPE_VENDOR_FLAG bit set and should
+ * respect the bitwise structure used by standard encodings whenever practical.
+ */
+#define PSA_KEY_TYPE_VENDOR_FLAG                    ((psa_key_type_t)0x8000)
+
+#define PSA_KEY_TYPE_CATEGORY_MASK                  ((psa_key_type_t)0x7000)
+#define PSA_KEY_TYPE_CATEGORY_RAW                   ((psa_key_type_t)0x1000)
+#define PSA_KEY_TYPE_CATEGORY_SYMMETRIC             ((psa_key_type_t)0x2000)
+#define PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY            ((psa_key_type_t)0x4000)
+#define PSA_KEY_TYPE_CATEGORY_KEY_PAIR              ((psa_key_type_t)0x7000)
+
+#define PSA_KEY_TYPE_CATEGORY_FLAG_PAIR             ((psa_key_type_t)0x3000)
+
+/** Whether a key type is vendor-defined.
+ *
+ * See also #PSA_KEY_TYPE_VENDOR_FLAG.
+ */
+#define PSA_KEY_TYPE_IS_VENDOR_DEFINED(type) \
+    (((type) & PSA_KEY_TYPE_VENDOR_FLAG) != 0)
+
+/** Whether a key type is an unstructured array of bytes.
+ *
+ * This encompasses both symmetric keys and non-key data.
+ */
+#define PSA_KEY_TYPE_IS_UNSTRUCTURED(type) \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_RAW || \
+     ((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC)
+
+/** Whether a key type is asymmetric: either a key pair or a public key. */
+#define PSA_KEY_TYPE_IS_ASYMMETRIC(type)                                \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK                               \
+      & ~PSA_KEY_TYPE_CATEGORY_FLAG_PAIR) ==                            \
+     PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY)
+/** Whether a key type is the public part of a key pair. */
+#define PSA_KEY_TYPE_IS_PUBLIC_KEY(type)                                \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY)
+/** Whether a key type is a key pair containing a private part and a public
+ * part. */
+#define PSA_KEY_TYPE_IS_KEY_PAIR(type)                                   \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_KEY_PAIR)
+/** The key pair type corresponding to a public key type.
+ *
+ * You may also pass a key pair type as \p type, it will be left unchanged.
+ *
+ * \param type      A public key type or key pair type.
+ *
+ * \return          The corresponding key pair type.
+ *                  If \p type is not a public key or a key pair,
+ *                  the return value is undefined.
+ */
+#define PSA_KEY_TYPE_KEY_PAIR_OF_PUBLIC_KEY(type)        \
+    ((type) | PSA_KEY_TYPE_CATEGORY_FLAG_PAIR)
+/** The public key type corresponding to a key pair type.
+ *
+ * You may also pass a key pair type as \p type, it will be left unchanged.
+ *
+ * \param type      A public key type or key pair type.
+ *
+ * \return          The corresponding public key type.
+ *                  If \p type is not a public key or a key pair,
+ *                  the return value is undefined.
+ */
+#define PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type)        \
+    ((type) & ~PSA_KEY_TYPE_CATEGORY_FLAG_PAIR)
+
+/** Raw data.
+ *
+ * A "key" of this type cannot be used for any cryptographic operation.
+ * Applications may use this type to store arbitrary data in the keystore. */
+#define PSA_KEY_TYPE_RAW_DATA                       ((psa_key_type_t)0x1001)
+
+/** HMAC key.
+ *
+ * The key policy determines which underlying hash algorithm the key can be
+ * used for.
+ *
+ * HMAC keys should generally have the same size as the underlying hash.
+ * This size can be calculated with #PSA_HASH_LENGTH(\c alg) where
+ * \c alg is the HMAC algorithm or the underlying hash algorithm. */
+#define PSA_KEY_TYPE_HMAC                           ((psa_key_type_t)0x1100)
+
+/** A secret for key derivation.
+ *
+ * The key policy determines which key derivation algorithm the key
+ * can be used for.
+ */
+#define PSA_KEY_TYPE_DERIVE                         ((psa_key_type_t)0x1200)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the AES block cipher.
+ *
+ * The size of the key can be 16 bytes (AES-128), 24 bytes (AES-192) or
+ * 32 bytes (AES-256).
+ */
+#define PSA_KEY_TYPE_AES                            ((psa_key_type_t)0x2400)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the
+ * ARIA block cipher. */
+#define PSA_KEY_TYPE_ARIA                           ((psa_key_type_t)0x2406)
+
+/** Key for a cipher or MAC algorithm based on DES or 3DES (Triple-DES).
+ *
+ * The size of the key can be 64 bits (single DES), 128 bits (2-key 3DES) or
+ * 192 bits (3-key 3DES).
+ *
+ * Note that single DES and 2-key 3DES are weak and strongly
+ * deprecated and should only be used to decrypt legacy data. 3-key 3DES
+ * is weak and deprecated and should only be used in legacy protocols.
+ */
+#define PSA_KEY_TYPE_DES                            ((psa_key_type_t)0x2301)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the
+ * Camellia block cipher. */
+#define PSA_KEY_TYPE_CAMELLIA                       ((psa_key_type_t)0x2403)
+
+/** Key for the RC4 stream cipher.
+ *
+ * Note that RC4 is weak and deprecated and should only be used in
+ * legacy protocols. */
+#define PSA_KEY_TYPE_ARC4                           ((psa_key_type_t)0x2002)
+
+/** Key for the ChaCha20 stream cipher or the Chacha20-Poly1305 AEAD algorithm.
+ *
+ * ChaCha20 and the ChaCha20_Poly1305 construction are defined in RFC 7539.
+ *
+ * Implementations must support 12-byte nonces, may support 8-byte nonces,
+ * and should reject other sizes.
+ */
+#define PSA_KEY_TYPE_CHACHA20                       ((psa_key_type_t)0x2004)
+
+/** RSA public key.
+ *
+ * The size of an RSA key is the bit size of the modulus.
+ */
+#define PSA_KEY_TYPE_RSA_PUBLIC_KEY                 ((psa_key_type_t)0x4001)
+/** RSA key pair (private and public key).
+ *
+ * The size of an RSA key is the bit size of the modulus.
+ */
+#define PSA_KEY_TYPE_RSA_KEY_PAIR                   ((psa_key_type_t)0x7001)
+/** Whether a key type is an RSA key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_RSA(type)                                       \
+    (PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) == PSA_KEY_TYPE_RSA_PUBLIC_KEY)
+
+#define PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE            ((psa_key_type_t)0x4100)
+#define PSA_KEY_TYPE_ECC_KEY_PAIR_BASE              ((psa_key_type_t)0x7100)
+#define PSA_KEY_TYPE_ECC_CURVE_MASK                 ((psa_key_type_t)0x00ff)
+/** Elliptic curve key pair.
+ *
+ * The size of an elliptic curve key is the bit size associated with the curve,
+ * i.e. the bit size of *q* for a curve over a field *F<sub>q</sub>*.
+ * See the documentation of `PSA_ECC_FAMILY_xxx` curve families for details.
+ *
+ * \param curve     A value of type ::psa_ecc_family_t that
+ *                  identifies the ECC curve to be used.
+ */
+#define PSA_KEY_TYPE_ECC_KEY_PAIR(curve)         \
+    (PSA_KEY_TYPE_ECC_KEY_PAIR_BASE | (curve))
+/** Elliptic curve public key.
+ *
+ * The size of an elliptic curve public key is the same as the corresponding
+ * private key (see #PSA_KEY_TYPE_ECC_KEY_PAIR and the documentation of
+ * `PSA_ECC_FAMILY_xxx` curve families).
+ *
+ * \param curve     A value of type ::psa_ecc_family_t that
+ *                  identifies the ECC curve to be used.
+ */
+#define PSA_KEY_TYPE_ECC_PUBLIC_KEY(curve)              \
+    (PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE | (curve))
+
+/** Whether a key type is an elliptic curve key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_ECC(type)                                       \
+    ((PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) &                        \
+      ~PSA_KEY_TYPE_ECC_CURVE_MASK) == PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE)
+/** Whether a key type is an elliptic curve key pair. */
+#define PSA_KEY_TYPE_IS_ECC_KEY_PAIR(type)                               \
+    (((type) & ~PSA_KEY_TYPE_ECC_CURVE_MASK) ==                         \
+     PSA_KEY_TYPE_ECC_KEY_PAIR_BASE)
+/** Whether a key type is an elliptic curve public key. */
+#define PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY(type)                            \
+    (((type) & ~PSA_KEY_TYPE_ECC_CURVE_MASK) ==                         \
+     PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE)
+
+/** Extract the curve from an elliptic curve key type. */
+#define PSA_KEY_TYPE_ECC_GET_FAMILY(type)                        \
+    ((psa_ecc_family_t) (PSA_KEY_TYPE_IS_ECC(type) ?             \
+                        ((type) & PSA_KEY_TYPE_ECC_CURVE_MASK) : \
+                        0))
+
+/** SEC Koblitz curves over prime fields.
+ *
+ * This family comprises the following curves:
+ * secp192k1, secp224k1, secp256k1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECP_K1           ((psa_ecc_family_t) 0x17)
+
+/** SEC random curves over prime fields.
+ *
+ * This family comprises the following curves:
+ * secp192k1, secp224r1, secp256r1, secp384r1, secp521r1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECP_R1           ((psa_ecc_family_t) 0x12)
+/* SECP160R2 (SEC2 v1, obsolete) */
+#define PSA_ECC_FAMILY_SECP_R2           ((psa_ecc_family_t) 0x1b)
+
+/** SEC Koblitz curves over binary fields.
+ *
+ * This family comprises the following curves:
+ * sect163k1, sect233k1, sect239k1, sect283k1, sect409k1, sect571k1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_K1           ((psa_ecc_family_t) 0x27)
+
+/** SEC random curves over binary fields.
+ *
+ * This family comprises the following curves:
+ * sect163r1, sect233r1, sect283r1, sect409r1, sect571r1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_R1           ((psa_ecc_family_t) 0x22)
+
+/** SEC additional random curves over binary fields.
+ *
+ * This family comprises the following curve:
+ * sect163r2.
+ * It is defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_R2           ((psa_ecc_family_t) 0x2b)
+
+/** Brainpool P random curves.
+ *
+ * This family comprises the following curves:
+ * brainpoolP160r1, brainpoolP192r1, brainpoolP224r1, brainpoolP256r1,
+ * brainpoolP320r1, brainpoolP384r1, brainpoolP512r1.
+ * It is defined in RFC 5639.
+ */
+#define PSA_ECC_FAMILY_BRAINPOOL_P_R1    ((psa_ecc_family_t) 0x30)
+
+/** Curve25519 and Curve448.
+ *
+ * This family comprises the following Montgomery curves:
+ * - 255-bit: Bernstein et al.,
+ *   _Curve25519: new Diffie-Hellman speed records_, LNCS 3958, 2006.
+ *   The algorithm #PSA_ALG_ECDH performs X25519 when used with this curve.
+ * - 448-bit: Hamburg,
+ *   _Ed448-Goldilocks, a new elliptic curve_, NIST ECC Workshop, 2015.
+ *   The algorithm #PSA_ALG_ECDH performs X448 when used with this curve.
+ */
+#define PSA_ECC_FAMILY_MONTGOMERY        ((psa_ecc_family_t) 0x41)
+
+/** The twisted Edwards curves Ed25519 and Ed448.
+ *
+ * These curves are suitable for EdDSA (#PSA_ALG_PURE_EDDSA for both curves,
+ * #PSA_ALG_ED25519PH for the 255-bit curve,
+ * #PSA_ALG_ED448PH for the 448-bit curve).
+ *
+ * This family comprises the following twisted Edwards curves:
+ * - 255-bit: Edwards25519, the twisted Edwards curve birationally equivalent
+ *   to Curve25519.
+ *   Bernstein et al., _Twisted Edwards curves_, Africacrypt 2008.
+ * - 448-bit: Edwards448, the twisted Edwards curve birationally equivalent
+ *   to Curve448.
+ *   Hamburg, _Ed448-Goldilocks, a new elliptic curve_, NIST ECC Workshop, 2015.
+ */
+#define PSA_ECC_FAMILY_TWISTED_EDWARDS   ((psa_ecc_family_t) 0x42)
+
+#define PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE             ((psa_key_type_t)0x4200)
+#define PSA_KEY_TYPE_DH_KEY_PAIR_BASE               ((psa_key_type_t)0x7200)
+#define PSA_KEY_TYPE_DH_GROUP_MASK                  ((psa_key_type_t)0x00ff)
+/** Diffie-Hellman key pair.
+ *
+ * \param group     A value of type ::psa_dh_family_t that identifies the
+ *                  Diffie-Hellman group to be used.
+ */
+#define PSA_KEY_TYPE_DH_KEY_PAIR(group)          \
+    (PSA_KEY_TYPE_DH_KEY_PAIR_BASE | (group))
+/** Diffie-Hellman public key.
+ *
+ * \param group     A value of type ::psa_dh_family_t that identifies the
+ *                  Diffie-Hellman group to be used.
+ */
+#define PSA_KEY_TYPE_DH_PUBLIC_KEY(group)               \
+    (PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE | (group))
+
+/** Whether a key type is a Diffie-Hellman key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_DH(type)                                        \
+    ((PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) &                        \
+      ~PSA_KEY_TYPE_DH_GROUP_MASK) == PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE)
+/** Whether a key type is a Diffie-Hellman key pair. */
+#define PSA_KEY_TYPE_IS_DH_KEY_PAIR(type)                               \
+    (((type) & ~PSA_KEY_TYPE_DH_GROUP_MASK) ==                         \
+     PSA_KEY_TYPE_DH_KEY_PAIR_BASE)
+/** Whether a key type is a Diffie-Hellman public key. */
+#define PSA_KEY_TYPE_IS_DH_PUBLIC_KEY(type)                            \
+    (((type) & ~PSA_KEY_TYPE_DH_GROUP_MASK) ==                         \
+     PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE)
+
+/** Extract the group from a Diffie-Hellman key type. */
+#define PSA_KEY_TYPE_DH_GET_FAMILY(type)                        \
+    ((psa_dh_family_t) (PSA_KEY_TYPE_IS_DH(type) ?              \
+                       ((type) & PSA_KEY_TYPE_DH_GROUP_MASK) :  \
+                       0))
+
+/** Diffie-Hellman groups defined in RFC 7919 Appendix A.
+ *
+ * This family includes groups with the following key sizes (in bits):
+ * 2048, 3072, 4096, 6144, 8192. A given implementation may support
+ * all of these sizes or only a subset.
+ */
+#define PSA_DH_FAMILY_RFC7919            ((psa_dh_family_t) 0x03)
+
+#define PSA_GET_KEY_TYPE_BLOCK_SIZE_EXPONENT(type)      \
+    (((type) >> 8) & 7)
+/** The block size of a block cipher.
+ *
+ * \param type  A cipher key type (value of type #psa_key_type_t).
+ *
+ * \return      The block size for a block cipher, or 1 for a stream cipher.
+ *              The return value is undefined if \p type is not a supported
+ *              cipher key type.
+ *
+ * \note It is possible to build stream cipher algorithms on top of a block
+ *       cipher, for example CTR mode (#PSA_ALG_CTR).
+ *       This macro only takes the key type into account, so it cannot be
+ *       used to determine the size of the data that #psa_cipher_update()
+ *       might buffer for future processing in general.
+ *
+ * \note This macro returns a compile-time constant if its argument is one.
+ *
+ * \warning This macro may evaluate its argument multiple times.
+ */
+#define PSA_BLOCK_CIPHER_BLOCK_LENGTH(type)                                     \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC ? \
+     1u << PSA_GET_KEY_TYPE_BLOCK_SIZE_EXPONENT(type) :                         \
+     0u)
+
+/** Vendor-defined algorithm flag.
+ *
+ * Algorithms defined by this standard will never have the #PSA_ALG_VENDOR_FLAG
+ * bit set. Vendors who define additional algorithms must use an encoding with
+ * the #PSA_ALG_VENDOR_FLAG bit set and should respect the bitwise structure
+ * used by standard encodings whenever practical.
+ */
+#define PSA_ALG_VENDOR_FLAG                     ((psa_algorithm_t)0x80000000)
+
+#define PSA_ALG_CATEGORY_MASK                   ((psa_algorithm_t)0x7f000000)
+#define PSA_ALG_CATEGORY_HASH                   ((psa_algorithm_t)0x02000000)
+#define PSA_ALG_CATEGORY_MAC                    ((psa_algorithm_t)0x03000000)
+#define PSA_ALG_CATEGORY_CIPHER                 ((psa_algorithm_t)0x04000000)
+#define PSA_ALG_CATEGORY_AEAD                   ((psa_algorithm_t)0x05000000)
+#define PSA_ALG_CATEGORY_SIGN                   ((psa_algorithm_t)0x06000000)
+#define PSA_ALG_CATEGORY_ASYMMETRIC_ENCRYPTION  ((psa_algorithm_t)0x07000000)
+#define PSA_ALG_CATEGORY_KEY_DERIVATION         ((psa_algorithm_t)0x08000000)
+#define PSA_ALG_CATEGORY_KEY_AGREEMENT          ((psa_algorithm_t)0x09000000)
+
+/** Whether an algorithm is vendor-defined.
+ *
+ * See also #PSA_ALG_VENDOR_FLAG.
+ */
+#define PSA_ALG_IS_VENDOR_DEFINED(alg)                                  \
+    (((alg) & PSA_ALG_VENDOR_FLAG) != 0)
+
+/** Whether the specified algorithm is a hash algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a hash algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HASH(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_HASH)
+
+/** Whether the specified algorithm is a MAC algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a MAC algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_MAC(alg)                                             \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_MAC)
+
+/** Whether the specified algorithm is a symmetric cipher algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a symmetric cipher algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_CIPHER(alg)                                          \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_CIPHER)
+
+/** Whether the specified algorithm is an authenticated encryption
+ * with associated data (AEAD) algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an AEAD algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_AEAD(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_AEAD)
+
+/** Whether the specified algorithm is an asymmetric signature algorithm,
+ * also known as public-key signature algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an asymmetric signature algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_SIGN)
+
+/** Whether the specified algorithm is an asymmetric encryption algorithm,
+ * also known as public-key encryption algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an asymmetric encryption algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_ASYMMETRIC_ENCRYPTION(alg)                           \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_ASYMMETRIC_ENCRYPTION)
+
+/** Whether the specified algorithm is a key agreement algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a key agreement algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_KEY_AGREEMENT(alg)                                   \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_KEY_AGREEMENT)
+
+/** Whether the specified algorithm is a key derivation algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a key derivation algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_KEY_DERIVATION(alg)                                  \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+/** An invalid algorithm identifier value. */
+#define PSA_ALG_NONE                            ((psa_algorithm_t)0)
+
+#define PSA_ALG_HASH_MASK                       ((psa_algorithm_t)0x000000ff)
+/** MD2 */
+#define PSA_ALG_MD2                             ((psa_algorithm_t)0x02000001)
+/** MD4 */
+#define PSA_ALG_MD4                             ((psa_algorithm_t)0x02000002)
+/** MD5 */
+#define PSA_ALG_MD5                             ((psa_algorithm_t)0x02000003)
+/** PSA_ALG_RIPEMD160 */
+#define PSA_ALG_RIPEMD160                       ((psa_algorithm_t)0x02000004)
+/** SHA1 */
+#define PSA_ALG_SHA_1                           ((psa_algorithm_t)0x02000005)
+/** SHA2-224 */
+#define PSA_ALG_SHA_224                         ((psa_algorithm_t)0x02000008)
+/** SHA2-256 */
+#define PSA_ALG_SHA_256                         ((psa_algorithm_t)0x02000009)
+/** SHA2-384 */
+#define PSA_ALG_SHA_384                         ((psa_algorithm_t)0x0200000a)
+/** SHA2-512 */
+#define PSA_ALG_SHA_512                         ((psa_algorithm_t)0x0200000b)
+/** SHA2-512/224 */
+#define PSA_ALG_SHA_512_224                     ((psa_algorithm_t)0x0200000c)
+/** SHA2-512/256 */
+#define PSA_ALG_SHA_512_256                     ((psa_algorithm_t)0x0200000d)
+/** SHA3-224 */
+#define PSA_ALG_SHA3_224                        ((psa_algorithm_t)0x02000010)
+/** SHA3-256 */
+#define PSA_ALG_SHA3_256                        ((psa_algorithm_t)0x02000011)
+/** SHA3-384 */
+#define PSA_ALG_SHA3_384                        ((psa_algorithm_t)0x02000012)
+/** SHA3-512 */
+#define PSA_ALG_SHA3_512                        ((psa_algorithm_t)0x02000013)
+/** The first 512 bits (64 bytes) of the SHAKE256 output.
+ *
+ * This is the prehashing for Ed448ph (see #PSA_ALG_ED448PH). For other
+ * scenarios where a hash function based on SHA3/SHAKE is desired, SHA3-512
+ * has the same output size and a (theoretically) higher security strength.
+ */
+#define PSA_ALG_SHAKE256_512                    ((psa_algorithm_t)0x02000015)
+
+/** In a hash-and-sign algorithm policy, allow any hash algorithm.
+ *
+ * This value may be used to form the algorithm usage field of a policy
+ * for a signature algorithm that is parametrized by a hash. The key
+ * may then be used to perform operations using the same signature
+ * algorithm parametrized with any supported hash.
+ *
+ * That is, suppose that `PSA_xxx_SIGNATURE` is one of the following macros:
+ * - #PSA_ALG_RSA_PKCS1V15_SIGN, #PSA_ALG_RSA_PSS, #PSA_ALG_RSA_PSS_ANY_SALT,
+ * - #PSA_ALG_ECDSA, #PSA_ALG_DETERMINISTIC_ECDSA.
+ * Then you may create and use a key as follows:
+ * - Set the key usage field using #PSA_ALG_ANY_HASH, for example:
+ *   ```
+ *   psa_set_key_usage_flags(&attributes, PSA_KEY_USAGE_SIGN_HASH); // or VERIFY
+ *   psa_set_key_algorithm(&attributes, PSA_xxx_SIGNATURE(PSA_ALG_ANY_HASH));
+ *   ```
+ * - Import or generate key material.
+ * - Call psa_sign_hash() or psa_verify_hash(), passing
+ *   an algorithm built from `PSA_xxx_SIGNATURE` and a specific hash. Each
+ *   call to sign or verify a message may use a different hash.
+ *   ```
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA_256), ...);
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA_512), ...);
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA3_256), ...);
+ *   ```
+ *
+ * This value may not be used to build other algorithms that are
+ * parametrized over a hash. For any valid use of this macro to build
+ * an algorithm \c alg, #PSA_ALG_IS_HASH_AND_SIGN(\c alg) is true.
+ *
+ * This value may not be used to build an algorithm specification to
+ * perform an operation. It is only valid to build policies.
+ */
+#define PSA_ALG_ANY_HASH                        ((psa_algorithm_t)0x020000ff)
+
+#define PSA_ALG_MAC_SUBCATEGORY_MASK            ((psa_algorithm_t)0x00c00000)
+#define PSA_ALG_HMAC_BASE                       ((psa_algorithm_t)0x03800000)
+/** Macro to build an HMAC algorithm.
+ *
+ * For example, #PSA_ALG_HMAC(#PSA_ALG_SHA_256) is HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding HMAC algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_HMAC(hash_alg)                                  \
+    (PSA_ALG_HMAC_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_HMAC_GET_HASH(hmac_alg)                             \
+    (PSA_ALG_CATEGORY_HASH | ((hmac_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is an HMAC algorithm.
+ *
+ * HMAC is a family of MAC algorithms that are based on a hash function.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an HMAC algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HMAC(alg)                                            \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_MAC_SUBCATEGORY_MASK)) == \
+     PSA_ALG_HMAC_BASE)
+
+/* In the encoding of a MAC algorithm, the bits corresponding to
+ * PSA_ALG_MAC_TRUNCATION_MASK encode the length to which the MAC is
+ * truncated. As an exception, the value 0 means the untruncated algorithm,
+ * whatever its length is. The length is encoded in 6 bits, so it can
+ * reach up to 63; the largest MAC is 64 bytes so its trivial truncation
+ * to full length is correctly encoded as 0 and any non-trivial truncation
+ * is correctly encoded as a value between 1 and 63. */
+#define PSA_ALG_MAC_TRUNCATION_MASK             ((psa_algorithm_t)0x003f0000)
+#define PSA_MAC_TRUNCATION_OFFSET 16
+
+/* In the encoding of a MAC algorithm, the bit corresponding to
+ * #PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG encodes the fact that the algorithm
+ * is a wildcard algorithm. A key with such wildcard algorithm as permitted
+ * algorithm policy can be used with any algorithm corresponding to the
+ * same base class and having a (potentially truncated) MAC length greater or
+ * equal than the one encoded in #PSA_ALG_MAC_TRUNCATION_MASK. */
+#define PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG   ((psa_algorithm_t)0x00008000)
+
+/** Macro to build a truncated MAC algorithm.
+ *
+ * A truncated MAC algorithm is identical to the corresponding MAC
+ * algorithm except that the MAC value for the truncated algorithm
+ * consists of only the first \p mac_length bytes of the MAC value
+ * for the untruncated algorithm.
+ *
+ * \note    This macro may allow constructing algorithm identifiers that
+ *          are not valid, either because the specified length is larger
+ *          than the untruncated MAC or because the specified length is
+ *          smaller than permitted by the implementation.
+ *
+ * \note    It is implementation-defined whether a truncated MAC that
+ *          is truncated to the same length as the MAC of the untruncated
+ *          algorithm is considered identical to the untruncated algorithm
+ *          for policy comparison purposes.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true). This may be a truncated or untruncated
+ *                      MAC algorithm.
+ * \param mac_length    Desired length of the truncated MAC in bytes.
+ *                      This must be at most the full length of the MAC
+ *                      and must be at least an implementation-specified
+ *                      minimum. The implementation-specified minimum
+ *                      shall not be zero.
+ *
+ * \return              The corresponding MAC algorithm with the specified
+ *                      length.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm or if \p mac_length is too small or
+ *                      too large for the specified MAC algorithm.
+ */
+#define PSA_ALG_TRUNCATED_MAC(mac_alg, mac_length)              \
+    (((mac_alg) & ~(PSA_ALG_MAC_TRUNCATION_MASK |               \
+                    PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG)) |   \
+     ((mac_length) << PSA_MAC_TRUNCATION_OFFSET & PSA_ALG_MAC_TRUNCATION_MASK))
+
+/** Macro to build the base MAC algorithm corresponding to a truncated
+ * MAC algorithm.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true). This may be a truncated or untruncated
+ *                      MAC algorithm.
+ *
+ * \return              The corresponding base MAC algorithm.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm.
+ */
+#define PSA_ALG_FULL_LENGTH_MAC(mac_alg)                        \
+    ((mac_alg) & ~(PSA_ALG_MAC_TRUNCATION_MASK |                \
+                   PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG))
+
+/** Length to which a MAC algorithm is truncated.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true).
+ *
+ * \return              Length of the truncated MAC in bytes.
+ * \return              0 if \p mac_alg is a non-truncated MAC algorithm.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm.
+ */
+#define PSA_MAC_TRUNCATED_LENGTH(mac_alg)                               \
+    (((mac_alg) & PSA_ALG_MAC_TRUNCATION_MASK) >> PSA_MAC_TRUNCATION_OFFSET)
+
+/** Macro to build a MAC minimum-MAC-length wildcard algorithm.
+ *
+ * A minimum-MAC-length MAC wildcard algorithm permits all MAC algorithms
+ * sharing the same base algorithm, and where the (potentially truncated) MAC
+ * length of the specific algorithm is equal to or larger then the wildcard
+ * algorithm's minimum MAC length.
+ *
+ * \note    When setting the minimum required MAC length to less than the
+ *          smallest MAC length allowed by the base algorithm, this effectively
+ *          becomes an 'any-MAC-length-allowed' policy for that base algorithm.
+ *
+ * \param mac_alg         A MAC algorithm identifier (value of type
+ *                        #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                        is true).
+ * \param min_mac_length  Desired minimum length of the message authentication
+ *                        code in bytes. This must be at most the untruncated
+ *                        length of the MAC and must be at least 1.
+ *
+ * \return                The corresponding MAC wildcard algorithm with the
+ *                        specified minimum length.
+ * \return                Unspecified if \p mac_alg is not a supported MAC
+ *                        algorithm or if \p min_mac_length is less than 1 or
+ *                        too large for the specified MAC algorithm.
+ */
+#define PSA_ALG_AT_LEAST_THIS_LENGTH_MAC(mac_alg, min_mac_length)   \
+    ( PSA_ALG_TRUNCATED_MAC(mac_alg, min_mac_length) |              \
+      PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG )
+
+#define PSA_ALG_CIPHER_MAC_BASE                 ((psa_algorithm_t)0x03c00000)
+/** The CBC-MAC construction over a block cipher
+ *
+ * \warning CBC-MAC is insecure in many cases.
+ * A more secure mode, such as #PSA_ALG_CMAC, is recommended.
+ */
+#define PSA_ALG_CBC_MAC                         ((psa_algorithm_t)0x03c00100)
+/** The CMAC construction over a block cipher */
+#define PSA_ALG_CMAC                            ((psa_algorithm_t)0x03c00200)
+
+/** Whether the specified algorithm is a MAC algorithm based on a block cipher.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a MAC algorithm based on a block cipher, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_BLOCK_CIPHER_MAC(alg)                                \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_MAC_SUBCATEGORY_MASK)) == \
+     PSA_ALG_CIPHER_MAC_BASE)
+
+#define PSA_ALG_CIPHER_STREAM_FLAG              ((psa_algorithm_t)0x00800000)
+#define PSA_ALG_CIPHER_FROM_BLOCK_FLAG          ((psa_algorithm_t)0x00400000)
+
+/** Whether the specified algorithm is a stream cipher.
+ *
+ * A stream cipher is a symmetric cipher that encrypts or decrypts messages
+ * by applying a bitwise-xor with a stream of bytes that is generated
+ * from a key.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a stream cipher algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier or if it is not a symmetric cipher algorithm.
+ */
+#define PSA_ALG_IS_STREAM_CIPHER(alg)            \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_CIPHER_STREAM_FLAG)) == \
+        (PSA_ALG_CATEGORY_CIPHER | PSA_ALG_CIPHER_STREAM_FLAG))
+
+/** The stream cipher mode of a stream cipher algorithm.
+ *
+ * The underlying stream cipher is determined by the key type.
+ * - To use ChaCha20, use a key type of #PSA_KEY_TYPE_CHACHA20.
+ * - To use ARC4, use a key type of #PSA_KEY_TYPE_ARC4.
+ */
+#define PSA_ALG_STREAM_CIPHER                   ((psa_algorithm_t)0x04800100)
+
+/** The CTR stream cipher mode.
+ *
+ * CTR is a stream cipher which is built from a block cipher.
+ * The underlying block cipher is determined by the key type.
+ * For example, to use AES-128-CTR, use this algorithm with
+ * a key of type #PSA_KEY_TYPE_AES and a length of 128 bits (16 bytes).
+ */
+#define PSA_ALG_CTR                             ((psa_algorithm_t)0x04c01000)
+
+/** The CFB stream cipher mode.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_CFB                             ((psa_algorithm_t)0x04c01100)
+
+/** The OFB stream cipher mode.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_OFB                             ((psa_algorithm_t)0x04c01200)
+
+/** The XTS cipher mode.
+ *
+ * XTS is a cipher mode which is built from a block cipher. It requires at
+ * least one full block of input, but beyond this minimum the input
+ * does not need to be a whole number of blocks.
+ */
+#define PSA_ALG_XTS                             ((psa_algorithm_t)0x0440ff00)
+
+/** The Electronic Code Book (ECB) mode of a block cipher, with no padding.
+ *
+ * \warning ECB mode does not protect the confidentiality of the encrypted data
+ * except in extremely narrow circumstances. It is recommended that applications
+ * only use ECB if they need to construct an operating mode that the
+ * implementation does not provide. Implementations are encouraged to provide
+ * the modes that applications need in preference to supporting direct access
+ * to ECB.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This symmetric cipher mode can only be used with messages whose lengths are a
+ * multiple of the block size of the chosen block cipher.
+ *
+ * ECB mode does not accept an initialization vector (IV). When using a
+ * multi-part cipher operation with this algorithm, psa_cipher_generate_iv()
+ * and psa_cipher_set_iv() must not be called.
+ */
+#define PSA_ALG_ECB_NO_PADDING                  ((psa_algorithm_t)0x04404400)
+
+/** The CBC block cipher chaining mode, with no padding.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This symmetric cipher mode can only be used with messages whose lengths
+ * are whole number of blocks for the chosen block cipher.
+ */
+#define PSA_ALG_CBC_NO_PADDING                  ((psa_algorithm_t)0x04404000)
+
+/** The CBC block cipher chaining mode with PKCS#7 padding.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This is the padding method defined by PKCS#7 (RFC 2315) &sect;10.3.
+ */
+#define PSA_ALG_CBC_PKCS7                       ((psa_algorithm_t)0x04404100)
+
+#define PSA_ALG_AEAD_FROM_BLOCK_FLAG            ((psa_algorithm_t)0x00400000)
+
+/** Whether the specified algorithm is an AEAD mode on a block cipher.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an AEAD algorithm which is an AEAD mode based on
+ *         a block cipher, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg)    \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_AEAD_FROM_BLOCK_FLAG)) == \
+     (PSA_ALG_CATEGORY_AEAD | PSA_ALG_AEAD_FROM_BLOCK_FLAG))
+
+/** The CCM authenticated encryption algorithm.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_CCM                             ((psa_algorithm_t)0x05500100)
+
+/** The GCM authenticated encryption algorithm.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_GCM                             ((psa_algorithm_t)0x05500200)
+
+/** The Chacha20-Poly1305 AEAD algorithm.
+ *
+ * The ChaCha20_Poly1305 construction is defined in RFC 7539.
+ *
+ * Implementations must support 12-byte nonces, may support 8-byte nonces,
+ * and should reject other sizes.
+ *
+ * Implementations must support 16-byte tags and should reject other sizes.
+ */
+#define PSA_ALG_CHACHA20_POLY1305               ((psa_algorithm_t)0x05100500)
+
+/* In the encoding of a AEAD algorithm, the bits corresponding to
+ * PSA_ALG_AEAD_TAG_LENGTH_MASK encode the length of the AEAD tag.
+ * The constants for default lengths follow this encoding.
+ */
+#define PSA_ALG_AEAD_TAG_LENGTH_MASK            ((psa_algorithm_t)0x003f0000)
+#define PSA_AEAD_TAG_LENGTH_OFFSET 16
+
+/* In the encoding of an AEAD algorithm, the bit corresponding to
+ * #PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG encodes the fact that the algorithm
+ * is a wildcard algorithm. A key with such wildcard algorithm as permitted
+ * algorithm policy can be used with any algorithm corresponding to the
+ * same base class and having a tag length greater than or equal to the one
+ * encoded in #PSA_ALG_AEAD_TAG_LENGTH_MASK. */
+#define PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG  ((psa_algorithm_t)0x00008000)
+
+/** Macro to build a shortened AEAD algorithm.
+ *
+ * A shortened AEAD algorithm is similar to the corresponding AEAD
+ * algorithm, but has an authentication tag that consists of fewer bytes.
+ * Depending on the algorithm, the tag length may affect the calculation
+ * of the ciphertext.
+ *
+ * \param aead_alg      An AEAD algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_AEAD(\p aead_alg)
+ *                      is true).
+ * \param tag_length    Desired length of the authentication tag in bytes.
+ *
+ * \return              The corresponding AEAD algorithm with the specified
+ *                      length.
+ * \return              Unspecified if \p aead_alg is not a supported
+ *                      AEAD algorithm or if \p tag_length is not valid
+ *                      for the specified AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, tag_length)           \
+    (((aead_alg) & ~(PSA_ALG_AEAD_TAG_LENGTH_MASK |                     \
+                     PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG)) |         \
+     ((tag_length) << PSA_AEAD_TAG_LENGTH_OFFSET &                      \
+      PSA_ALG_AEAD_TAG_LENGTH_MASK))
+
+/** Retrieve the tag length of a specified AEAD algorithm
+ *
+ * \param aead_alg      An AEAD algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_AEAD(\p aead_alg)
+ *                      is true).
+ *
+ * \return              The tag length specified by the input algorithm.
+ * \return              Unspecified if \p aead_alg is not a supported
+ *                      AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_GET_TAG_LENGTH(aead_alg)                           \
+    (((aead_alg) & PSA_ALG_AEAD_TAG_LENGTH_MASK) >>                     \
+      PSA_AEAD_TAG_LENGTH_OFFSET )
+
+/** Calculate the corresponding AEAD algorithm with the default tag length.
+ *
+ * \param aead_alg      An AEAD algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_AEAD(\p aead_alg) is true).
+ *
+ * \return              The corresponding AEAD algorithm with the default
+ *                      tag length for that algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG(aead_alg)                   \
+    (                                                                    \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_CCM) \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_GCM) \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_CHACHA20_POLY1305) \
+        0)
+#define PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, ref)         \
+    PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, 0) ==                      \
+    PSA_ALG_AEAD_WITH_SHORTENED_TAG(ref, 0) ?                            \
+    ref :
+
+/** Macro to build an AEAD minimum-tag-length wildcard algorithm.
+ *
+ * A minimum-tag-length AEAD wildcard algorithm permits all AEAD algorithms
+ * sharing the same base algorithm, and where the tag length of the specific
+ * algorithm is equal to or larger then the minimum tag length specified by the
+ * wildcard algorithm.
+ *
+ * \note    When setting the minimum required tag length to less than the
+ *          smallest tag length allowed by the base algorithm, this effectively
+ *          becomes an 'any-tag-length-allowed' policy for that base algorithm.
+ *
+ * \param aead_alg        An AEAD algorithm identifier (value of type
+ *                        #psa_algorithm_t such that
+ *                        #PSA_ALG_IS_AEAD(\p aead_alg) is true).
+ * \param min_tag_length  Desired minimum length of the authentication tag in
+ *                        bytes. This must be at least 1 and at most the largest
+ *                        allowed tag length of the algorithm.
+ *
+ * \return                The corresponding AEAD wildcard algorithm with the
+ *                        specified minimum length.
+ * \return                Unspecified if \p aead_alg is not a supported
+ *                        AEAD algorithm or if \p min_tag_length is less than 1
+ *                        or too large for the specified AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_AT_LEAST_THIS_LENGTH_TAG(aead_alg, min_tag_length) \
+    ( PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, min_tag_length) |            \
+      PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG )
+
+#define PSA_ALG_RSA_PKCS1V15_SIGN_BASE          ((psa_algorithm_t)0x06000200)
+/** RSA PKCS#1 v1.5 signature with hashing.
+ *
+ * This is the signature scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSASSA-PKCS1-v1_5.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PKCS#1 v1.5 signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PKCS1V15_SIGN(hash_alg)                             \
+    (PSA_ALG_RSA_PKCS1V15_SIGN_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** Raw PKCS#1 v1.5 signature.
+ *
+ * The input to this algorithm is the DigestInfo structure used by
+ * RFC 8017 (PKCS#1: RSA Cryptography Specifications), &sect;9.2
+ * steps 3&ndash;6.
+ */
+#define PSA_ALG_RSA_PKCS1V15_SIGN_RAW PSA_ALG_RSA_PKCS1V15_SIGN_BASE
+#define PSA_ALG_IS_RSA_PKCS1V15_SIGN(alg)                               \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PKCS1V15_SIGN_BASE)
+
+#define PSA_ALG_RSA_PSS_BASE               ((psa_algorithm_t)0x06000300)
+#define PSA_ALG_RSA_PSS_ANY_SALT_BASE      ((psa_algorithm_t)0x06001300)
+/** RSA PSS signature with hashing.
+ *
+ * This is the signature scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSASSA-PSS, with the message generation function MGF1, and with
+ * a salt length equal to the length of the hash. The specified
+ * hash algorithm is used to hash the input message, to create the
+ * salted hash, and for the mask generation.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PSS signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PSS(hash_alg)                               \
+    (PSA_ALG_RSA_PSS_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** RSA PSS signature with hashing with relaxed verification.
+ *
+ * This algorithm has the same behavior as #PSA_ALG_RSA_PSS when signing,
+ * but allows an arbitrary salt length (including \c 0) when verifying a
+ * signature.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PSS signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PSS_ANY_SALT(hash_alg)                      \
+    (PSA_ALG_RSA_PSS_ANY_SALT_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is RSA PSS with standard salt.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS_STANDARD_SALT(alg)                   \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PSS_BASE)
+
+/** Whether the specified algorithm is RSA PSS with any salt.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS_ANY_SALT_BASE(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS_ANY_SALT(alg)                                \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PSS_ANY_SALT_BASE)
+
+/** Whether the specified algorithm is RSA PSS.
+ *
+ * This includes any of the RSA PSS algorithm variants, regardless of the
+ * constraints on salt length.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS(\c hash_alg) or
+ *                      #PSA_ALG_RSA_PSS_ANY_SALT_BASE(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS(alg)                                 \
+    (PSA_ALG_IS_RSA_PSS_STANDARD_SALT(alg) ||                   \
+     PSA_ALG_IS_RSA_PSS_ANY_SALT(alg))
+
+#define PSA_ALG_ECDSA_BASE                      ((psa_algorithm_t)0x06000600)
+/** ECDSA signature with hashing.
+ *
+ * This is the ECDSA signature scheme defined by ANSI X9.62,
+ * with a random per-message secret number (*k*).
+ *
+ * The representation of the signature as a byte string consists of
+ * the concatentation of the signature values *r* and *s*. Each of
+ * *r* and *s* is encoded as an *N*-octet string, where *N* is the length
+ * of the base point of the curve in octets. Each value is represented
+ * in big-endian order (most significant octet first).
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding ECDSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_ECDSA(hash_alg)                                 \
+    (PSA_ALG_ECDSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** ECDSA signature without hashing.
+ *
+ * This is the same signature scheme as #PSA_ALG_ECDSA(), but
+ * without specifying a hash algorithm. This algorithm may only be
+ * used to sign or verify a sequence of bytes that should be an
+ * already-calculated hash. Note that the input is padded with
+ * zeros on the left or truncated on the left as required to fit
+ * the curve size.
+ */
+#define PSA_ALG_ECDSA_ANY PSA_ALG_ECDSA_BASE
+#define PSA_ALG_DETERMINISTIC_ECDSA_BASE        ((psa_algorithm_t)0x06000700)
+/** Deterministic ECDSA signature with hashing.
+ *
+ * This is the deterministic ECDSA signature scheme defined by RFC 6979.
+ *
+ * The representation of a signature is the same as with #PSA_ALG_ECDSA().
+ *
+ * Note that when this algorithm is used for verification, signatures
+ * made with randomized ECDSA (#PSA_ALG_ECDSA(\p hash_alg)) with the
+ * same private key are accepted. In other words,
+ * #PSA_ALG_DETERMINISTIC_ECDSA(\p hash_alg) differs from
+ * #PSA_ALG_ECDSA(\p hash_alg) only for signature, not for verification.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding deterministic ECDSA signature
+ *                      algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DETERMINISTIC_ECDSA(hash_alg)                           \
+    (PSA_ALG_DETERMINISTIC_ECDSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_ECDSA_DETERMINISTIC_FLAG        ((psa_algorithm_t)0x00000100)
+#define PSA_ALG_IS_ECDSA(alg)                                           \
+    (((alg) & ~PSA_ALG_HASH_MASK & ~PSA_ALG_ECDSA_DETERMINISTIC_FLAG) ==  \
+     PSA_ALG_ECDSA_BASE)
+#define PSA_ALG_ECDSA_IS_DETERMINISTIC(alg)             \
+    (((alg) & PSA_ALG_ECDSA_DETERMINISTIC_FLAG) != 0)
+#define PSA_ALG_IS_DETERMINISTIC_ECDSA(alg)                             \
+    (PSA_ALG_IS_ECDSA(alg) && PSA_ALG_ECDSA_IS_DETERMINISTIC(alg))
+#define PSA_ALG_IS_RANDOMIZED_ECDSA(alg)                                \
+    (PSA_ALG_IS_ECDSA(alg) && !PSA_ALG_ECDSA_IS_DETERMINISTIC(alg))
+
+/** Edwards-curve digital signature algorithm without prehashing (PureEdDSA),
+ * using standard parameters.
+ *
+ * Contexts are not supported in the current version of this specification
+ * because there is no suitable signature interface that can take the
+ * context as a parameter. A future version of this specification may add
+ * suitable functions and extend this algorithm to support contexts.
+ *
+ * PureEdDSA requires an elliptic curve key on a twisted Edwards curve.
+ * In this specification, the following curves are supported:
+ * - #PSA_ECC_FAMILY_TWISTED_EDWARDS, 255-bit: Ed25519 as specified
+ *   in RFC 8032.
+ *   The curve is Edwards25519.
+ *   The hash function used internally is SHA-512.
+ * - #PSA_ECC_FAMILY_TWISTED_EDWARDS, 448-bit: Ed448 as specified
+ *   in RFC 8032.
+ *   The curve is Edwards448.
+ *   The hash function used internally is the first 114 bytes of the
+ *   SHAKE256 output.
+ *
+ * This algorithm can be used with psa_sign_message() and
+ * psa_verify_message(). Since there is no prehashing, it cannot be used
+ * with psa_sign_hash() or psa_verify_hash().
+ *
+ * The signature format is the concatenation of R and S as defined by
+ * RFC 8032 §5.1.6 and §5.2.6 (a 64-byte string for Ed25519, a 114-byte
+ * string for Ed448).
+ */
+#define PSA_ALG_PURE_EDDSA                      ((psa_algorithm_t)0x06000800)
+
+#define PSA_ALG_HASH_EDDSA_BASE                 ((psa_algorithm_t)0x06000900)
+#define PSA_ALG_IS_HASH_EDDSA(alg)              \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_HASH_EDDSA_BASE)
+
+/** Edwards-curve digital signature algorithm with prehashing (HashEdDSA),
+ * using SHA-512 and the Edwards25519 curve.
+ *
+ * See #PSA_ALG_PURE_EDDSA regarding context support and the signature format.
+ *
+ * This algorithm is Ed25519 as specified in RFC 8032.
+ * The curve is Edwards25519.
+ * The prehash is SHA-512.
+ * The hash function used internally is SHA-512.
+ *
+ * This is a hash-and-sign algorithm: to calculate a signature,
+ * you can either:
+ * - call psa_sign_message() on the message;
+ * - or calculate the SHA-512 hash of the message
+ *   with psa_hash_compute()
+ *   or with a multi-part hash operation started with psa_hash_setup(),
+ *   using the hash algorithm #PSA_ALG_SHA_512,
+ *   then sign the calculated hash with psa_sign_hash().
+ * Verifying a signature is similar, using psa_verify_message() or
+ * psa_verify_hash() instead of the signature function.
+ */
+#define PSA_ALG_ED25519PH                               \
+    (PSA_ALG_HASH_EDDSA_BASE | (PSA_ALG_SHA_512 & PSA_ALG_HASH_MASK))
+
+/** Edwards-curve digital signature algorithm with prehashing (HashEdDSA),
+ * using SHAKE256 and the Edwards448 curve.
+ *
+ * See #PSA_ALG_PURE_EDDSA regarding context support and the signature format.
+ *
+ * This algorithm is Ed448 as specified in RFC 8032.
+ * The curve is Edwards448.
+ * The prehash is the first 64 bytes of the SHAKE256 output.
+ * The hash function used internally is the first 114 bytes of the
+ * SHAKE256 output.
+ *
+ * This is a hash-and-sign algorithm: to calculate a signature,
+ * you can either:
+ * - call psa_sign_message() on the message;
+ * - or calculate the first 64 bytes of the SHAKE256 output of the message
+ *   with psa_hash_compute()
+ *   or with a multi-part hash operation started with psa_hash_setup(),
+ *   using the hash algorithm #PSA_ALG_SHAKE256_512,
+ *   then sign the calculated hash with psa_sign_hash().
+ * Verifying a signature is similar, using psa_verify_message() or
+ * psa_verify_hash() instead of the signature function.
+ */
+#define PSA_ALG_ED448PH                                 \
+    (PSA_ALG_HASH_EDDSA_BASE | (PSA_ALG_SHAKE256_512 & PSA_ALG_HASH_MASK))
+
+/* Default definition, to be overridden if the library is extended with
+ * more hash-and-sign algorithms that we want to keep out of this header
+ * file. */
+#define PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg) 0
+
+/** Whether the specified algorithm is a signature algorithm that can be used
+ * with psa_sign_hash() and psa_verify_hash().
+ *
+ * This encompasses all strict hash-and-sign algorithms categorized by
+ * PSA_ALG_IS_HASH_AND_SIGN(), as well as algorithms that follow the
+ * paradigm more loosely:
+ * - #PSA_ALG_RSA_PKCS1V15_SIGN_RAW (expects its input to be an encoded hash)
+ * - #PSA_ALG_ECDSA_ANY (doesn't specify what kind of hash the input is)
+ *
+ * \param alg An algorithm identifier (value of type psa_algorithm_t).
+ *
+ * \return 1 if alg is a signature algorithm that can be used to sign a
+ *         hash. 0 if alg is a signature algorithm that can only be used
+ *         to sign a message. 0 if alg is not a signature algorithm.
+ *         This macro can return either 0 or 1 if alg is not a
+ *         supported algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN_HASH(alg)                                       \
+    (PSA_ALG_IS_RSA_PSS(alg) || PSA_ALG_IS_RSA_PKCS1V15_SIGN(alg) ||    \
+     PSA_ALG_IS_ECDSA(alg) || PSA_ALG_IS_HASH_EDDSA(alg) ||             \
+     PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg))
+
+/** Whether the specified algorithm is a signature algorithm that can be used
+ * with psa_sign_message() and psa_verify_message().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if alg is a signature algorithm that can be used to sign a
+ *         message. 0 if \p alg is a signature algorithm that can only be used
+ *         to sign an already-calculated hash. 0 if \p alg is not a signature
+ *         algorithm. This macro can return either 0 or 1 if \p alg is not a
+ *         supported algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN_MESSAGE(alg)                                    \
+    (PSA_ALG_IS_SIGN_HASH(alg) || (alg) == PSA_ALG_PURE_EDDSA )
+
+/** Whether the specified algorithm is a hash-and-sign algorithm.
+ *
+ * Hash-and-sign algorithms are asymmetric (public-key) signature algorithms
+ * structured in two parts: first the calculation of a hash in a way that
+ * does not depend on the key, then the calculation of a signature from the
+ * hash value and the key. Hash-and-sign algorithms encode the hash
+ * used for the hashing step, and you can call #PSA_ALG_SIGN_GET_HASH
+ * to extract this algorithm.
+ *
+ * Thus, for a hash-and-sign algorithm,
+ * `psa_sign_message(key, alg, input, ...)` is equivalent to
+ * ```
+ * psa_hash_compute(PSA_ALG_SIGN_GET_HASH(alg), input, ..., hash, ...);
+ * psa_sign_hash(key, alg, hash, ..., signature, ...);
+ * ```
+ * Most usefully, separating the hash from the signature allows the hash
+ * to be calculated in multiple steps with psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(). Likewise psa_verify_message() is equivalent to
+ * calculating the hash and then calling psa_verify_hash().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a hash-and-sign algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HASH_AND_SIGN(alg)                                   \
+    (PSA_ALG_IS_SIGN_HASH(alg) &&                                       \
+     ((alg) & PSA_ALG_HASH_MASK) != 0)
+
+/** Get the hash used by a hash-and-sign signature algorithm.
+ *
+ * A hash-and-sign algorithm is a signature algorithm which is
+ * composed of two phases: first a hashing phase which does not use
+ * the key and produces a hash of the input message, then a signing
+ * phase which only uses the hash and the key and not the message
+ * itself.
+ *
+ * \param alg   A signature algorithm (\c PSA_ALG_XXX value such that
+ *              #PSA_ALG_IS_SIGN(\p alg) is true).
+ *
+ * \return      The underlying hash algorithm if \p alg is a hash-and-sign
+ *              algorithm.
+ * \return      0 if \p alg is a signature algorithm that does not
+ *              follow the hash-and-sign structure.
+ * \return      Unspecified if \p alg is not a signature algorithm or
+ *              if it is not supported by the implementation.
+ */
+#define PSA_ALG_SIGN_GET_HASH(alg)                                     \
+    (PSA_ALG_IS_HASH_AND_SIGN(alg) ?                                   \
+     ((alg) & PSA_ALG_HASH_MASK) | PSA_ALG_CATEGORY_HASH :             \
+     0)
+
+/** RSA PKCS#1 v1.5 encryption.
+ */
+#define PSA_ALG_RSA_PKCS1V15_CRYPT              ((psa_algorithm_t)0x07000200)
+
+#define PSA_ALG_RSA_OAEP_BASE                   ((psa_algorithm_t)0x07000300)
+/** RSA OAEP encryption.
+ *
+ * This is the encryption scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSAES-OAEP, with the message generation function MGF1.
+ *
+ * \param hash_alg      The hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true) to use
+ *                      for MGF1.
+ *
+ * \return              The corresponding RSA OAEP encryption algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_OAEP(hash_alg)                              \
+    (PSA_ALG_RSA_OAEP_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_IS_RSA_OAEP(alg)                                \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_OAEP_BASE)
+#define PSA_ALG_RSA_OAEP_GET_HASH(alg)                          \
+    (PSA_ALG_IS_RSA_OAEP(alg) ?                                 \
+     ((alg) & PSA_ALG_HASH_MASK) | PSA_ALG_CATEGORY_HASH :      \
+     0)
+
+#define PSA_ALG_HKDF_BASE                       ((psa_algorithm_t)0x08000100)
+/** Macro to build an HKDF algorithm.
+ *
+ * For example, `PSA_ALG_HKDF(PSA_ALG_SHA256)` is HKDF using HMAC-SHA-256.
+ *
+ * This key derivation algorithm uses the following inputs:
+ * - #PSA_KEY_DERIVATION_INPUT_SALT is the salt used in the "extract" step.
+ *   It is optional; if omitted, the derivation uses an empty salt.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key used in the "extract" step.
+ * - #PSA_KEY_DERIVATION_INPUT_INFO is the info string used in the "expand" step.
+ * You must pass #PSA_KEY_DERIVATION_INPUT_SALT before #PSA_KEY_DERIVATION_INPUT_SECRET.
+ * You may pass #PSA_KEY_DERIVATION_INPUT_INFO at any time after steup and before
+ * starting to generate output.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding HKDF algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_HKDF(hash_alg)                                  \
+    (PSA_ALG_HKDF_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** Whether the specified algorithm is an HKDF algorithm.
+ *
+ * HKDF is a family of key derivation algorithms that are based on a hash
+ * function and the HMAC construction.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is an HKDF algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_HKDF(alg)                            \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_HKDF_BASE)
+#define PSA_ALG_HKDF_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_TLS12_PRF_BASE                  ((psa_algorithm_t)0x08000200)
+/** Macro to build a TLS-1.2 PRF algorithm.
+ *
+ * TLS 1.2 uses a custom pseudorandom function (PRF) for key schedule,
+ * specified in Section 5 of RFC 5246. It is based on HMAC and can be
+ * used with either SHA-256 or SHA-384.
+ *
+ * This key derivation algorithm uses the following inputs, which must be
+ * passed in the order given here:
+ * - #PSA_KEY_DERIVATION_INPUT_SEED is the seed.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key.
+ * - #PSA_KEY_DERIVATION_INPUT_LABEL is the label.
+ *
+ * For the application to TLS-1.2 key expansion, the seed is the
+ * concatenation of ServerHello.Random + ClientHello.Random,
+ * and the label is "key expansion".
+ *
+ * For example, `PSA_ALG_TLS12_PRF(PSA_ALG_SHA256)` represents the
+ * TLS 1.2 PRF using HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding TLS-1.2 PRF algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_TLS12_PRF(hash_alg)                                  \
+    (PSA_ALG_TLS12_PRF_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is a TLS-1.2 PRF algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a TLS-1.2 PRF algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_TLS12_PRF(alg)                                    \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_TLS12_PRF_BASE)
+#define PSA_ALG_TLS12_PRF_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_TLS12_PSK_TO_MS_BASE            ((psa_algorithm_t)0x08000300)
+/** Macro to build a TLS-1.2 PSK-to-MasterSecret algorithm.
+ *
+ * In a pure-PSK handshake in TLS 1.2, the master secret is derived
+ * from the PreSharedKey (PSK) through the application of padding
+ * (RFC 4279, Section 2) and the TLS-1.2 PRF (RFC 5246, Section 5).
+ * The latter is based on HMAC and can be used with either SHA-256
+ * or SHA-384.
+ *
+ * This key derivation algorithm uses the following inputs, which must be
+ * passed in the order given here:
+ * - #PSA_KEY_DERIVATION_INPUT_SEED is the seed.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key.
+ * - #PSA_KEY_DERIVATION_INPUT_LABEL is the label.
+ *
+ * For the application to TLS-1.2, the seed (which is
+ * forwarded to the TLS-1.2 PRF) is the concatenation of the
+ * ClientHello.Random + ServerHello.Random,
+ * and the label is "master secret" or "extended master secret".
+ *
+ * For example, `PSA_ALG_TLS12_PSK_TO_MS(PSA_ALG_SHA256)` represents the
+ * TLS-1.2 PSK to MasterSecret derivation PRF using HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding TLS-1.2 PSK to MS algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_TLS12_PSK_TO_MS(hash_alg)                                  \
+    (PSA_ALG_TLS12_PSK_TO_MS_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is a TLS-1.2 PSK to MS algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a TLS-1.2 PSK to MS algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_TLS12_PSK_TO_MS(alg)                                    \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_TLS12_PSK_TO_MS_BASE)
+#define PSA_ALG_TLS12_PSK_TO_MS_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_KEY_DERIVATION_MASK             ((psa_algorithm_t)0xfe00ffff)
+#define PSA_ALG_KEY_AGREEMENT_MASK              ((psa_algorithm_t)0xffff0000)
+
+/** Macro to build a combined algorithm that chains a key agreement with
+ * a key derivation.
+ *
+ * \param ka_alg        A key agreement algorithm (\c PSA_ALG_XXX value such
+ *                      that #PSA_ALG_IS_KEY_AGREEMENT(\p ka_alg) is true).
+ * \param kdf_alg       A key derivation algorithm (\c PSA_ALG_XXX value such
+ *                      that #PSA_ALG_IS_KEY_DERIVATION(\p kdf_alg) is true).
+ *
+ * \return              The corresponding key agreement and derivation
+ *                      algorithm.
+ * \return              Unspecified if \p ka_alg is not a supported
+ *                      key agreement algorithm or \p kdf_alg is not a
+ *                      supported key derivation algorithm.
+ */
+#define PSA_ALG_KEY_AGREEMENT(ka_alg, kdf_alg)  \
+    ((ka_alg) | (kdf_alg))
+
+#define PSA_ALG_KEY_AGREEMENT_GET_KDF(alg)                              \
+    (((alg) & PSA_ALG_KEY_DERIVATION_MASK) | PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+#define PSA_ALG_KEY_AGREEMENT_GET_BASE(alg)                             \
+    (((alg) & PSA_ALG_KEY_AGREEMENT_MASK) | PSA_ALG_CATEGORY_KEY_AGREEMENT)
+
+/** Whether the specified algorithm is a raw key agreement algorithm.
+ *
+ * A raw key agreement algorithm is one that does not specify
+ * a key derivation function.
+ * Usually, raw key agreement algorithms are constructed directly with
+ * a \c PSA_ALG_xxx macro while non-raw key agreement algorithms are
+ * constructed with #PSA_ALG_KEY_AGREEMENT().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a raw key agreement algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_RAW_KEY_AGREEMENT(alg)                               \
+    (PSA_ALG_IS_KEY_AGREEMENT(alg) &&                                   \
+     PSA_ALG_KEY_AGREEMENT_GET_KDF(alg) == PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+#define PSA_ALG_IS_KEY_DERIVATION_OR_AGREEMENT(alg)     \
+    ((PSA_ALG_IS_KEY_DERIVATION(alg) || PSA_ALG_IS_KEY_AGREEMENT(alg)))
+
+/** The finite-field Diffie-Hellman (DH) key agreement algorithm.
+ *
+ * The shared secret produced by key agreement is
+ * `g^{ab}` in big-endian format.
+ * It is `ceiling(m / 8)` bytes long where `m` is the size of the prime `p`
+ * in bits.
+ */
+#define PSA_ALG_FFDH                            ((psa_algorithm_t)0x09010000)
+
+/** Whether the specified algorithm is a finite field Diffie-Hellman algorithm.
+ *
+ * This includes the raw finite field Diffie-Hellman algorithm as well as
+ * finite-field Diffie-Hellman followed by any supporter key derivation
+ * algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a finite field Diffie-Hellman algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key agreement algorithm identifier.
+ */
+#define PSA_ALG_IS_FFDH(alg) \
+    (PSA_ALG_KEY_AGREEMENT_GET_BASE(alg) == PSA_ALG_FFDH)
+
+/** The elliptic curve Diffie-Hellman (ECDH) key agreement algorithm.
+ *
+ * The shared secret produced by key agreement is the x-coordinate of
+ * the shared secret point. It is always `ceiling(m / 8)` bytes long where
+ * `m` is the bit size associated with the curve, i.e. the bit size of the
+ * order of the curve's coordinate field. When `m` is not a multiple of 8,
+ * the byte containing the most significant bit of the shared secret
+ * is padded with zero bits. The byte order is either little-endian
+ * or big-endian depending on the curve type.
+ *
+ * - For Montgomery curves (curve types `PSA_ECC_FAMILY_CURVEXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in little-endian byte order.
+ *   The bit size is 448 for Curve448 and 255 for Curve25519.
+ * - For Weierstrass curves over prime fields (curve types
+ *   `PSA_ECC_FAMILY_SECPXXX` and `PSA_ECC_FAMILY_BRAINPOOL_PXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in big-endian byte order.
+ *   The bit size is `m = ceiling(log_2(p))` for the field `F_p`.
+ * - For Weierstrass curves over binary fields (curve types
+ *   `PSA_ECC_FAMILY_SECTXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in big-endian byte order.
+ *   The bit size is `m` for the field `F_{2^m}`.
+ */
+#define PSA_ALG_ECDH                            ((psa_algorithm_t)0x09020000)
+
+/** Whether the specified algorithm is an elliptic curve Diffie-Hellman
+ * algorithm.
+ *
+ * This includes the raw elliptic curve Diffie-Hellman algorithm as well as
+ * elliptic curve Diffie-Hellman followed by any supporter key derivation
+ * algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is an elliptic curve Diffie-Hellman algorithm,
+ *         0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key agreement algorithm identifier.
+ */
+#define PSA_ALG_IS_ECDH(alg) \
+    (PSA_ALG_KEY_AGREEMENT_GET_BASE(alg) == PSA_ALG_ECDH)
+
+/** Whether the specified algorithm encoding is a wildcard.
+ *
+ * Wildcard values may only be used to set the usage algorithm field in
+ * a policy, not to perform an operation.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a wildcard algorithm encoding.
+ * \return 0 if \c alg is a non-wildcard algorithm encoding (suitable for
+ *         an operation).
+ * \return This macro may return either 0 or 1 if \c alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_WILDCARD(alg)                            \
+    (PSA_ALG_IS_HASH_AND_SIGN(alg) ?                        \
+     PSA_ALG_SIGN_GET_HASH(alg) == PSA_ALG_ANY_HASH :       \
+     PSA_ALG_IS_MAC(alg) ?                                  \
+     (alg & PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG) != 0 :   \
+     PSA_ALG_IS_AEAD(alg) ?                                 \
+     (alg & PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG) != 0 :  \
+     (alg) == PSA_ALG_ANY_HASH)
+
+/**@}*/
+
+/** \defgroup key_lifetimes Key lifetimes
+ * @{
+ */
+
+/** The default lifetime for volatile keys.
+ *
+ * A volatile key only exists as long as the identifier to it is not destroyed.
+ * The key material is guaranteed to be erased on a power reset.
+ *
+ * A key with this lifetime is typically stored in the RAM area of the
+ * PSA Crypto subsystem. However this is an implementation choice.
+ * If an implementation stores data about the key in a non-volatile memory,
+ * it must release all the resources associated with the key and erase the
+ * key material if the calling application terminates.
+ */
+#define PSA_KEY_LIFETIME_VOLATILE               ((psa_key_lifetime_t)0x00000000)
+
+/** The default lifetime for persistent keys.
+ *
+ * A persistent key remains in storage until it is explicitly destroyed or
+ * until the corresponding storage area is wiped. This specification does
+ * not define any mechanism to wipe a storage area, but integrations may
+ * provide their own mechanism (for example to perform a factory reset,
+ * to prepare for device refurbishment, or to uninstall an application).
+ *
+ * This lifetime value is the default storage area for the calling
+ * application. Integrations of Mbed TLS may support other persistent lifetimes.
+ * See ::psa_key_lifetime_t for more information.
+ */
+#define PSA_KEY_LIFETIME_PERSISTENT             ((psa_key_lifetime_t)0x00000001)
+
+/** The persistence level of volatile keys.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_VOLATILE            ((psa_key_persistence_t)0x00)
+
+/** The default persistence level for persistent keys.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_DEFAULT             ((psa_key_persistence_t)0x01)
+
+/** A persistence level indicating that a key is never destroyed.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_READ_ONLY           ((psa_key_persistence_t)0xff)
+
+#define PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime)      \
+    ((psa_key_persistence_t)((lifetime) & 0x000000ff))
+
+#define PSA_KEY_LIFETIME_GET_LOCATION(lifetime)      \
+    ((psa_key_location_t)((lifetime) >> 8))
+
+/** Whether a key lifetime indicates that the key is volatile.
+ *
+ * A volatile key is automatically destroyed by the implementation when
+ * the application instance terminates. In particular, a volatile key
+ * is automatically destroyed on a power reset of the device.
+ *
+ * A key that is not volatile is persistent. Persistent keys are
+ * preserved until the application explicitly destroys them or until an
+ * implementation-specific device management event occurs (for example,
+ * a factory reset).
+ *
+ * \param lifetime      The lifetime value to query (value of type
+ *                      ::psa_key_lifetime_t).
+ *
+ * \return \c 1 if the key is volatile, otherwise \c 0.
+ */
+#define PSA_KEY_LIFETIME_IS_VOLATILE(lifetime)  \
+    (PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime) == \
+     PSA_KEY_PERSISTENCE_VOLATILE)
+
+/** Whether a key lifetime indicates that the key is read-only.
+ *
+ * Read-only keys cannot be created or destroyed through the PSA Crypto API.
+ * They must be created through platform-specific means that bypass the API.
+ *
+ * Some platforms may offer ways to destroy read-only keys. For example,
+ * consider a platform with multiple levels of privilege, where a
+ * low-privilege application can use a key but is not allowed to destroy
+ * it, and the platform exposes the key to the application with a read-only
+ * lifetime. High-privilege code can destroy the key even though the
+ * application sees the key as read-only.
+ *
+ * \param lifetime      The lifetime value to query (value of type
+ *                      ::psa_key_lifetime_t).
+ *
+ * \return \c 1 if the key is read-only, otherwise \c 0.
+ */
+#define PSA_KEY_LIFETIME_IS_READ_ONLY(lifetime)  \
+    (PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime) == \
+     PSA_KEY_PERSISTENCE_READ_ONLY)
+
+/** Construct a lifetime from a persistence level and a location.
+ *
+ * \param persistence   The persistence level
+ *                      (value of type ::psa_key_persistence_t).
+ * \param location      The location indicator
+ *                      (value of type ::psa_key_location_t).
+ *
+ * \return The constructed lifetime value.
+ */
+#define PSA_KEY_LIFETIME_FROM_PERSISTENCE_AND_LOCATION(persistence, location) \
+    ((location) << 8 | (persistence))
+
+/** The local storage area for persistent keys.
+ *
+ * This storage area is available on all systems that can store persistent
+ * keys without delegating the storage to a third-party cryptoprocessor.
+ *
+ * See ::psa_key_location_t for more information.
+ */
+#define PSA_KEY_LOCATION_LOCAL_STORAGE          ((psa_key_location_t)0x000000)
+
+#define PSA_KEY_LOCATION_VENDOR_FLAG            ((psa_key_location_t)0x800000)
+
+/** The null key identifier.
+ */
+#define PSA_KEY_ID_NULL                         ((psa_key_id_t)0)
+/** The minimum value for a key identifier chosen by the application.
+ */
+#define PSA_KEY_ID_USER_MIN                     ((psa_key_id_t)0x00000001)
+/** The maximum value for a key identifier chosen by the application.
+ */
+#define PSA_KEY_ID_USER_MAX                     ((psa_key_id_t)0x3fffffff)
+/** The minimum value for a key identifier chosen by the implementation.
+ */
+#define PSA_KEY_ID_VENDOR_MIN                   ((psa_key_id_t)0x40000000)
+/** The maximum value for a key identifier chosen by the implementation.
+ */
+#define PSA_KEY_ID_VENDOR_MAX                   ((psa_key_id_t)0x7fffffff)
+
+
+#if !defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+
+#define MBEDTLS_SVC_KEY_ID_INIT ( (psa_key_id_t)0 )
+#define MBEDTLS_SVC_KEY_ID_GET_KEY_ID( id ) ( id )
+#define MBEDTLS_SVC_KEY_ID_GET_OWNER_ID( id ) ( 0 )
+
+/** Utility to initialize a key identifier at runtime.
+ *
+ * \param unused  Unused parameter.
+ * \param key_id  Identifier of the key.
+ */
+static inline mbedtls_svc_key_id_t mbedtls_svc_key_id_make(
+    unsigned int unused, psa_key_id_t key_id )
+{
+    (void)unused;
+
+    return( key_id );
+}
+
+/** Compare two key identifiers.
+ *
+ * \param id1 First key identifier.
+ * \param id2 Second key identifier.
+ *
+ * \return Non-zero if the two key identifier are equal, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_equal( mbedtls_svc_key_id_t id1,
+                                            mbedtls_svc_key_id_t id2 )
+{
+    return( id1 == id2 );
+}
+
+/** Check whether a key identifier is null.
+ *
+ * \param key Key identifier.
+ *
+ * \return Non-zero if the key identifier is null, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_is_null( mbedtls_svc_key_id_t key )
+{
+    return( key == 0 );
+}
+
+#else /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+#define MBEDTLS_SVC_KEY_ID_INIT ( (mbedtls_svc_key_id_t){ 0, 0 } )
+#define MBEDTLS_SVC_KEY_ID_GET_KEY_ID( id ) ( ( id ).key_id )
+#define MBEDTLS_SVC_KEY_ID_GET_OWNER_ID( id ) ( ( id ).owner )
+
+/** Utility to initialize a key identifier at runtime.
+ *
+ * \param owner_id Identifier of the key owner.
+ * \param key_id   Identifier of the key.
+ */
+static inline mbedtls_svc_key_id_t mbedtls_svc_key_id_make(
+    mbedtls_key_owner_id_t owner_id, psa_key_id_t key_id )
+{
+    return( (mbedtls_svc_key_id_t){ .key_id = key_id,
+                                    .owner = owner_id } );
+}
+
+/** Compare two key identifiers.
+ *
+ * \param id1 First key identifier.
+ * \param id2 Second key identifier.
+ *
+ * \return Non-zero if the two key identifier are equal, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_equal( mbedtls_svc_key_id_t id1,
+                                            mbedtls_svc_key_id_t id2 )
+{
+    return( ( id1.key_id == id2.key_id ) &&
+            mbedtls_key_owner_id_equal( id1.owner, id2.owner ) );
+}
+
+/** Check whether a key identifier is null.
+ *
+ * \param key Key identifier.
+ *
+ * \return Non-zero if the key identifier is null, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_is_null( mbedtls_svc_key_id_t key )
+{
+    return( key.key_id == 0 );
+}
+
+#endif /* !MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/**@}*/
+
+/** \defgroup policy Key policies
+ * @{
+ */
+
+/** Whether the key may be exported.
+ *
+ * A public key or the public part of a key pair may always be exported
+ * regardless of the value of this permission flag.
+ *
+ * If a key does not have export permission, implementations shall not
+ * allow the key to be exported in plain form from the cryptoprocessor,
+ * whether through psa_export_key() or through a proprietary interface.
+ * The key may however be exportable in a wrapped form, i.e. in a form
+ * where it is encrypted by another key.
+ */
+#define PSA_KEY_USAGE_EXPORT                    ((psa_key_usage_t)0x00000001)
+
+/** Whether the key may be copied.
+ *
+ * This flag allows the use of psa_copy_key() to make a copy of the key
+ * with the same policy or a more restrictive policy.
+ *
+ * For lifetimes for which the key is located in a secure element which
+ * enforce the non-exportability of keys, copying a key outside the secure
+ * element also requires the usage flag #PSA_KEY_USAGE_EXPORT.
+ * Copying the key inside the secure element is permitted with just
+ * #PSA_KEY_USAGE_COPY if the secure element supports it.
+ * For keys with the lifetime #PSA_KEY_LIFETIME_VOLATILE or
+ * #PSA_KEY_LIFETIME_PERSISTENT, the usage flag #PSA_KEY_USAGE_COPY
+ * is sufficient to permit the copy.
+ */
+#define PSA_KEY_USAGE_COPY                      ((psa_key_usage_t)0x00000002)
+
+/** Whether the key may be used to encrypt a message.
+ *
+ * This flag allows the key to be used for a symmetric encryption operation,
+ * for an AEAD encryption-and-authentication operation,
+ * or for an asymmetric encryption operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_ENCRYPT                   ((psa_key_usage_t)0x00000100)
+
+/** Whether the key may be used to decrypt a message.
+ *
+ * This flag allows the key to be used for a symmetric decryption operation,
+ * for an AEAD decryption-and-verification operation,
+ * or for an asymmetric decryption operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_DECRYPT                   ((psa_key_usage_t)0x00000200)
+
+/** Whether the key may be used to sign a message.
+ *
+ * This flag allows the key to be used for a MAC calculation operation or for
+ * an asymmetric message signature operation, if otherwise permitted by the
+ * key’s type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_SIGN_MESSAGE              ((psa_key_usage_t)0x00000400)
+
+/** Whether the key may be used to verify a message.
+ *
+ * This flag allows the key to be used for a MAC verification operation or for
+ * an asymmetric message signature verification operation, if otherwise
+ * permitted by the key’s type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_VERIFY_MESSAGE            ((psa_key_usage_t)0x00000800)
+
+/** Whether the key may be used to sign a message.
+ *
+ * This flag allows the key to be used for a MAC calculation operation
+ * or for an asymmetric signature operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_SIGN_HASH                 ((psa_key_usage_t)0x00001000)
+
+/** Whether the key may be used to verify a message signature.
+ *
+ * This flag allows the key to be used for a MAC verification operation
+ * or for an asymmetric signature verification operation,
+ * if otherwise permitted by by the key's type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_VERIFY_HASH               ((psa_key_usage_t)0x00002000)
+
+/** Whether the key may be used to derive other keys.
+ */
+#define PSA_KEY_USAGE_DERIVE                    ((psa_key_usage_t)0x00004000)
+
+/**@}*/
+
+/** \defgroup derivation Key derivation
+ * @{
+ */
+
+/** A secret input for key derivation.
+ *
+ * This should be a key of type #PSA_KEY_TYPE_DERIVE
+ * (passed to psa_key_derivation_input_key())
+ * or the shared secret resulting from a key agreement
+ * (obtained via psa_key_derivation_key_agreement()).
+ *
+ * The secret can also be a direct input (passed to
+ * key_derivation_input_bytes()). In this case, the derivation operation
+ * may not be used to derive keys: the operation will only allow
+ * psa_key_derivation_output_bytes(), not psa_key_derivation_output_key().
+ */
+#define PSA_KEY_DERIVATION_INPUT_SECRET     ((psa_key_derivation_step_t)0x0101)
+
+/** A label for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_LABEL      ((psa_key_derivation_step_t)0x0201)
+
+/** A salt for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_SALT       ((psa_key_derivation_step_t)0x0202)
+
+/** An information string for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_INFO       ((psa_key_derivation_step_t)0x0203)
+
+/** A seed for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_SEED       ((psa_key_derivation_step_t)0x0204)
+
+/**@}*/
+
+/** \defgroup helper_macros Helper macros
+ * @{
+ */
+
+/* Helper macros */
+
+/** Check if two AEAD algorithm identifiers refer to the same AEAD algorithm
+ *  regardless of the tag length they encode.
+ *
+ * \param aead_alg_1 An AEAD algorithm identifier.
+ * \param aead_alg_2 An AEAD algorithm identifier.
+ *
+ * \return           1 if both identifiers refer to the same AEAD algorithm,
+ *                   0 otherwise.
+ *                   Unspecified if neither \p aead_alg_1 nor \p aead_alg_2 are
+ *                   a supported AEAD algorithm.
+ */
+#define MBEDTLS_PSA_ALG_AEAD_EQUAL(aead_alg_1, aead_alg_2) \
+    (!(((aead_alg_1) ^ (aead_alg_2)) & \
+       ~(PSA_ALG_AEAD_TAG_LENGTH_MASK | PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG)))
+
+/**@}*/
+
+#endif /* PSA_CRYPTO_VALUES_H */
diff --git a/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h b/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h
index 9c63118eb57..607d35ffc69 100644
--- a/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h
+++ b/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h
@@ -1,12 +1,13 @@
 /**
  *
- * \brief Default mbedTLS configuration options for esp-idf
+ * \brief Default mbedTLS configuration options for ESP-IDF
  *
  *  This set of compile-time options may be used to enable
  *  or disable features selectively, and reduce the global
  *  memory footprint.
- *
- *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
  *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
@@ -20,8 +21,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  This file is part of mbed TLS (https://tls.mbed.org)
  */
 
 #ifndef ESP_CONFIG_H
@@ -310,18 +309,54 @@
  *
  * \note  This option only works with the default software implementation of
  *        elliptic curve functionality. It is incompatible with
- *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT and MBEDTLS_ECDSA_XXX_ALT.
+ *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT, MBEDTLS_ECDSA_XXX_ALT
+ *        and MBEDTLS_ECDH_LEGACY_CONTEXT.
  */
 #ifdef CONFIG_MBEDTLS_ECP_RESTARTABLE
 #define MBEDTLS_ECP_RESTARTABLE
 #endif
 
+/**
+ * \def MBEDTLS_ECDH_LEGACY_CONTEXT
+ *
+ * Use a backward compatible ECDH context.
+ *
+ * Mbed TLS supports two formats for ECDH contexts (#mbedtls_ecdh_context
+ * defined in `ecdh.h`). For most applications, the choice of format makes
+ * no difference, since all library functions can work with either format,
+ * except that the new format is incompatible with MBEDTLS_ECP_RESTARTABLE.
+
+ * The new format used when this option is disabled is smaller
+ * (56 bytes on a 32-bit platform). In future versions of the library, it
+ * will support alternative implementations of ECDH operations.
+ * The new format is incompatible with applications that access
+ * context fields directly and with restartable ECP operations.
+ *
+ * Define this macro if you enable MBEDTLS_ECP_RESTARTABLE or if you
+ * want to access ECDH context fields directly. Otherwise you should
+ * comment out this macro definition.
+ *
+ * This option has no effect if #MBEDTLS_ECDH_C is not enabled.
+ *
+ * \note This configuration option is experimental. Future versions of the
+ *       library may modify the way the ECDH context layout is configured
+ *       and may modify the layout of the new context type.
+ */
+#ifdef CONFIG_MBEDTLS_ECDH_LEGACY_CONTEXT
+#define MBEDTLS_ECDH_LEGACY_CONTEXT
+#endif
+
 /**
  * \def MBEDTLS_CMAC_C
  *
  * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
  * ciphers.
  *
+ * \note When #MBEDTLS_CMAC_ALT is active, meaning that the underlying
+ *       implementation of the CMAC algorithm is provided by an alternate
+ *       implementation, that alternate implementation may opt to not support
+ *       AES-192 or 3DES as underlying block ciphers for the CMAC operation.
+ *
  * Module:  library/cmac.c
  *
  * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
@@ -339,6 +374,7 @@
  *
  * Comment macros to disable the curve and functions for it
  */
+/* Short Weierstrass curves (supporting ECP, ECDH, ECDSA) */
 #ifdef CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED
 #define MBEDTLS_ECP_DP_SECP192R1_ENABLED
 #else
@@ -394,12 +430,12 @@
 #else
 #undef MBEDTLS_ECP_DP_BP512R1_ENABLED
 #endif
+/* Montgomery curves (supporting ECP) */
 #ifdef CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #define MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #else
 #undef MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #endif
-
 #ifdef MBEDTLS_ECP_DP_CURVE448_ENABLED
 #undef MBEDTLS_ECP_DP_CURVE448_ENABLED
 #endif
@@ -427,7 +463,7 @@
  * may result in a compromise of the long-term signing key. This is avoided by
  * the deterministic variant.
  *
- * Requires: MBEDTLS_HMAC_DRBG_C
+ * Requires: MBEDTLS_HMAC_DRBG_C, MBEDTLS_ECDSA_C
  *
  * Comment this macro to disable deterministic ECDSA.
  */
@@ -668,7 +704,7 @@
  *
  * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -696,7 +732,7 @@
  *
  * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -850,6 +886,69 @@
  */
 #define MBEDTLS_SSL_ALL_ALERT_MESSAGES
 
+/**
+ * \def MBEDTLS_SSL_DTLS_CONNECTION_ID
+ *
+ * Enable support for the DTLS Connection ID extension
+ * (version draft-ietf-tls-dtls-connection-id-05,
+ * https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05)
+ * which allows to identify DTLS connections across changes
+ * in the underlying transport.
+ *
+ * Setting this option enables the SSL APIs `mbedtls_ssl_set_cid()`,
+ * `mbedtls_ssl_get_peer_cid()` and `mbedtls_ssl_conf_cid()`.
+ * See the corresponding documentation for more information.
+ *
+ * \warning The Connection ID extension is still in draft state.
+ *          We make no stability promises for the availability
+ *          or the shape of the API controlled by this option.
+ *
+ * The maximum lengths of outgoing and incoming CIDs can be configured
+ * through the options
+ * - MBEDTLS_SSL_CID_OUT_LEN_MAX
+ * - MBEDTLS_SSL_CID_IN_LEN_MAX.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment to enable the Connection ID extension.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_DTLS_CONNECTION_ID
+#else
+#undef MBEDTLS_SSL_DTLS_CONNECTION_ID
+#endif
+
+/**
+ * \def MBEDTLS_SSL_CONTEXT_SERIALIZATION
+ *
+ * Enable serialization of the TLS context structures, through use of the
+ * functions mbedtls_ssl_context_save() and mbedtls_ssl_context_load().
+ *
+ * This pair of functions allows one side of a connection to serialize the
+ * context associated with the connection, then free or re-use that context
+ * while the serialized state is persisted elsewhere, and finally deserialize
+ * that state to a live context for resuming read/write operations on the
+ * connection. From a protocol perspective, the state of the connection is
+ * unaffected, in particular this is entirely transparent to the peer.
+ *
+ * Note: this is distinct from TLS session resumption, which is part of the
+ * protocol and fully visible by the peer. TLS session resumption enables
+ * establishing new connections associated to a saved session with shorter,
+ * lighter handshakes, while context serialization is a local optimization in
+ * handling a single, potentially long-lived connection.
+ *
+ * Enabling these APIs makes some SSL structures larger, as 64 extra bytes are
+ * saved after the handshake to allow for more efficient serialization, so if
+ * you don't need this feature you'll save RAM by disabling it.
+ *
+ * Comment to disable the context serialization APIs.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#define MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#else
+#undef MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#endif
+
 /** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
  *
  * Enable support for Encrypt-then-MAC, RFC 7366.
@@ -874,8 +973,8 @@
 
 /** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
  *
- * Enable support for Extended Master Secret, aka Session Hash
- * (draft-ietf-tls-session-hash-02).
+ * Enable support for RFC 7627: Session Hash and Extended Master Secret
+ * Extension.
  *
  * This was introduced as "the proper fix" to the Triple Handshake familiy of
  * attacks, but it is recommended to always use it (even if you disable
@@ -897,7 +996,8 @@
 /**
  * \def MBEDTLS_SSL_FALLBACK_SCSV
  *
- * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ * Enable support for RFC 7507: Fallback Signaling Cipher Suite Value (SCSV)
+ * for Preventing Protocol Downgrade Attacks.
  *
  * For servers, it is recommended to always enable this, unless you support
  * only one version of TLS, or know for sure that none of your clients
@@ -911,6 +1011,32 @@
  */
 #define MBEDTLS_SSL_FALLBACK_SCSV
 
+/**
+ * \def MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+ *
+ * This option controls the availability of the API mbedtls_ssl_get_peer_cert()
+ * giving access to the peer's certificate after completion of the handshake.
+ *
+ * Unless you need mbedtls_ssl_peer_cert() in your application, it is
+ * recommended to disable this option for reduced RAM usage.
+ *
+ * \note If this option is disabled, mbedtls_ssl_get_peer_cert() is still
+ *       defined, but always returns \c NULL.
+ *
+ * \note This option has no influence on the protection against the
+ *       triple handshake attack. Even if it is disabled, Mbed TLS will
+ *       still ensure that certificates do not change during renegotiation,
+ *       for exaple by keeping a hash of the peer's certificate.
+ *
+ * Comment this macro to disable storing the peer's certificate
+ * after the handshake.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#define MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#else
+#undef MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#endif
+
 /**
  * \def MBEDTLS_SSL_PROTO_TLS1
  *
@@ -935,6 +1061,9 @@
  * Requires: MBEDTLS_MD5_C
  *           MBEDTLS_SHA1_C
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Comment this macro to disable support for SSL 3.0
  */
 #ifdef CONFIG_MBEDTLS_SSL_PROTO_SSL3
@@ -1092,6 +1221,41 @@
 #undef MBEDTLS_SSL_DTLS_HELLO_VERIFY
 #endif
 
+/**
+ * \def MBEDTLS_SSL_DTLS_SRTP
+ *
+ * Enable support for negotiation of DTLS-SRTP (RFC 5764)
+ * through the use_srtp extension.
+ *
+ * \note This feature provides the minimum functionality required
+ * to negotiate the use of DTLS-SRTP and to allow the derivation of
+ * the associated SRTP packet protection key material.
+ * In particular, the SRTP packet protection itself, as well as the
+ * demultiplexing of RTP and DTLS packets at the datagram layer
+ * (see Section 5 of RFC 5764), are not handled by this feature.
+ * Instead, after successful completion of a handshake negotiating
+ * the use of DTLS-SRTP, the extended key exporter API
+ * mbedtls_ssl_conf_export_keys_ext_cb() should be used to implement
+ * the key exporter described in Section 4.2 of RFC 5764 and RFC 5705
+ * (this is implemented in the SSL example programs).
+ * The resulting key should then be passed to an SRTP stack.
+ *
+ * Setting this option enables the runtime API
+ * mbedtls_ssl_conf_dtls_srtp_protection_profiles()
+ * through which the supported DTLS-SRTP protection
+ * profiles can be configured. You must call this API at
+ * runtime if you wish to negotiate the use of DTLS-SRTP.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment this to enable support for use_srtp extension.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_DTLS
+#define MBEDTLS_SSL_DTLS_SRTP
+#else
+#undef MBEDTLS_SSL_DTLS_SRTP
+#endif
+
 /**
  * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
  *
@@ -1176,6 +1340,21 @@
 #define MBEDTLS_SSL_TRUNCATED_HMAC
 
 /**
+ * \def MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+ *
+ * When this option is enabled, the SSL buffer will be resized automatically
+ * based on the negotiated maximum fragment length in each direction.
+ *
+ * Requires: MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ */
+#if defined MBEDTLS_SSL_MAX_FRAGMENT_LENGTH && CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#define MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#else
+#undef MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#endif
+
+/**
+ *
  * \def MBEDTLS_VERSION_FEATURES
  *
  * Allow run-time checking of compile-time enabled features. Thus allowing users
@@ -1641,7 +1820,9 @@
  * This module is used by the following key exchanges:
  *      ECDHE-ECDSA
  *
- * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C,
+ *           and at least one MBEDTLS_ECP_DP_XXX_ENABLED for a
+ *           short Weierstrass curve.
  */
 #ifdef CONFIG_MBEDTLS_ECDSA_C
 #define MBEDTLS_ECDSA_C
@@ -1719,11 +1900,11 @@
 /**
  * \def MBEDTLS_GCM_C
  *
- * Enable the Galois/Counter Mode (GCM) for AES.
+ * Enable the Galois/Counter Mode (GCM).
  *
  * Module:  library/gcm.c
  *
- * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C or MBEDTLS_ARIA_C
  *
  * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
  * requisites are enabled as well.
@@ -2323,6 +2504,29 @@
 #undef MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
 #endif
 
+/**
+ * \def MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+ *
+ * If set, this enables the X.509 API `mbedtls_x509_crt_verify_with_ca_cb()`
+ * and the SSL API `mbedtls_ssl_conf_ca_cb()` which allow users to configure
+ * the set of trusted certificates through a callback instead of a linked
+ * list.
+ *
+ * This is useful for example in environments where a large number of trusted
+ * certificates is present and storing them in a linked list isn't efficient
+ * enough, or when the set of trusted certificates changes frequently.
+ *
+ * See the documentation of `mbedtls_x509_crt_verify_with_ca_cb()` and
+ * `mbedtls_ssl_conf_ca_cb()` for more information.
+ *
+ * Uncomment to enable trusted certificate callbacks.
+ */
+#ifdef CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK
+#define MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+#else
+#undef MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+#endif
+
 /**
  * \def MBEDTLS_X509_CSR_WRITE_C
  *
@@ -2383,6 +2587,51 @@
  */
 #define MBEDTLS_SSL_IN_CONTENT_LEN              CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN
 
+/** \def MBEDTLS_SSL_CID_IN_LEN_MAX
+ *
+ * The maximum length of CIDs used for incoming DTLS messages.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_IN_LEN_MAX              CONFIG_MBEDTLS_SSL_CID_IN_LEN_MAX
+#else
+#undef MBEDTLS_SSL_CID_IN_LEN_MAX
+#endif
+
+
+/** \def MBEDTLS_SSL_CID_OUT_LEN_MAX
+ *
+ * The maximum length of CIDs used for outgoing DTLS messages.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_OUT_LEN_MAX            CONFIG_MBEDTLS_SSL_CID_OUT_LEN_MAX
+#else
+#undef MBEDTLS_SSL_CID_OUT_LEN_MAX
+#endif
+
+/** \def MBEDTLS_SSL_CID_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * when using the Connection ID extension in DTLS 1.2.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_PADDING_GRANULARITY    CONFIG_MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#else
+#undef MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#endif
+
+
 /** \def MBEDTLS_SSL_OUT_CONTENT_LEN
  *
  * Maximum outgoing fragment length in bytes.
@@ -2416,6 +2665,10 @@
  * default. At the time of writing, there is no practical attack on the use
  * of SHA-1 in handshake signatures, hence this option is turned on by default
  * for compatibility with existing peers.
+ *
+ * \warning   SHA-1 is considered a weak message digest and its use constitutes
+ *            a security risk. If possible, we recommend avoiding dependencies
+ *            on it, and considering stronger message digests instead.
  */
 #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
 
diff --git a/tools/sdk/esp32/include/nvs_flash/include/nvs.h b/tools/sdk/esp32/include/nvs_flash/include/nvs.h
index 26183853b7c..6a45327bbae 100644
--- a/tools/sdk/esp32/include/nvs_flash/include/nvs.h
+++ b/tools/sdk/esp32/include/nvs_flash/include/nvs.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_NVS_H
 #define ESP_NVS_H
 
@@ -105,7 +97,7 @@ typedef enum {
  */
 typedef struct {
     char namespace_name[16];    /*!< Namespace to which key-value belong */
-    char key[16];               /*!< Key of stored key-value pair */
+    char key[NVS_KEY_NAME_MAX_SIZE];               /*!< Key of stored key-value pair */
     nvs_type_t type;            /*!< Type of stored key-value pair */
 } nvs_entry_info_t;
 
diff --git a/tools/sdk/esp32/include/qrcode/include/qrcode.h b/tools/sdk/esp32/include/qrcode/include/qrcode.h
index 94076ac51b6..27de85f5baa 100644
--- a/tools/sdk/esp32/include/qrcode/include/qrcode.h
+++ b/tools/sdk/esp32/include/qrcode/include/qrcode.h
@@ -26,6 +26,8 @@ extern "C" {
   * @attention 1. Can successfully encode a UTF-8 string of up to 2953 bytes or an alphanumeric
   *               string of up to 4296 characters or any digit string of up to 7089 characters
   *
+  * @note This API is kept for backward compatibility
+  *
   * @param  text  string to encode into a QR Code.
   *
   * @return
@@ -35,6 +37,86 @@ extern "C" {
   */
 esp_err_t qrcode_display(const char *text);
 
+/**
+  * @brief  QR Code handle used by the display function
+  */
+typedef const uint8_t * esp_qrcode_handle_t;
+
+/**
+  * @brief  QR Code configuration options
+  */
+typedef struct {
+    void (*display_func)(esp_qrcode_handle_t qrcode);   /**< Function called for displaying the QR Code after encoding is complete */
+    int max_qrcode_version;                             /**< Max QR Code Version to be used. Range: 2 - 40 */
+    int qrcode_ecc_level;                               /**< Error Correction Level for QR Code */
+} esp_qrcode_config_t;
+
+/**
+  * @brief  Error Correction Level in a QR Code Symbol
+  */
+enum {
+    ESP_QRCODE_ECC_LOW,     /**< QR Code Error Tolerance of 7% */
+    ESP_QRCODE_ECC_MED,     /**< QR Code Error Tolerance of 15% */
+    ESP_QRCODE_ECC_QUART,   /**< QR Code Error Tolerance of 25% */
+    ESP_QRCODE_ECC_HIGH     /**< QR Code Error Tolerance of 30% */
+};
+
+/**
+  * @brief  Encodes the given string into a QR Code and calls the display function
+  *
+  * @attention 1. Can successfully encode a UTF-8 string of up to 2953 bytes or an alphanumeric
+  *               string of up to 4296 characters or any digit string of up to 7089 characters
+  *
+  * @param  cfg   Configuration used for QR Code encoding.
+  * @param  text  String to encode into a QR Code.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_FAIL: Failed to encode string into a QR Code
+  *    - ESP_ERR_NO_MEM: Failed to allocate buffer for given max_qrcode_version
+  */
+esp_err_t esp_qrcode_generate(esp_qrcode_config_t *cfg, const char *text);
+
+/**
+  * @brief  Displays QR Code on the console
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  */
+void esp_qrcode_print_console(esp_qrcode_handle_t qrcode);
+
+/**
+  * @brief  Returns the side length of the given QR Code
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  *
+  * @return
+  *    - val[21, 177]: Side length of QR Code
+  */
+int esp_qrcode_get_size(esp_qrcode_handle_t qrcode);
+
+/**
+  * @brief  Returns the Pixel value for the given coordinates
+  *         False indicates White and True indicates Black
+  *
+  * @attention 1. Coordinates for top left corner are (x=0, y=0)
+  * @attention 2. For out of bound coordinates false (White) is returned
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  * @param  x  X-Coordinate of QR Code module
+  * @param  y  Y-Coordinate of QR Code module
+  *
+  * @return
+  *    - true: (x, y) Pixel is Black
+  *    - false: (x, y) Pixel is White
+  */
+bool esp_qrcode_get_module(esp_qrcode_handle_t qrcode, int x, int y);
+
+#define ESP_QRCODE_CONFIG_DEFAULT() (esp_qrcode_config_t) { \
+    .display_func = esp_qrcode_print_console, \
+    .max_qrcode_version = 10, \
+    .qrcode_ecc_level = ESP_QRCODE_ECC_LOW, \
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_common_events.h b/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_common_events.h
new file mode 100644
index 00000000000..b77f8a3d142
--- /dev/null
+++ b/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_common_events.h
@@ -0,0 +1,60 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** ESP RainMaker Common Event Base */
+ESP_EVENT_DECLARE_BASE(RMAKER_COMMON_EVENT);
+
+typedef enum {
+    /** Node reboot has been triggered. The associated event data is the time in seconds
+     * (type: uint8_t) after which the node will reboot. Note that this time may not be
+     * accurate as the events are received asynchronously.*/
+    RMAKER_EVENT_REBOOT,
+    /** Wi-Fi credentials reset. Triggered after calling esp_rmaker_wifi_reset() */
+    RMAKER_EVENT_WIFI_RESET,
+    /** Node reset to factory defaults. Triggered after calling esp_rmaker_factory_reset() */
+    RMAKER_EVENT_FACTORY_RESET,
+    /** Connected to MQTT Broker */
+    RMAKER_MQTT_EVENT_CONNECTED,
+    /** Disconnected from MQTT Broker */
+    RMAKER_MQTT_EVENT_DISCONNECTED,
+    /** MQTT message published successfully.
+     * Event data will contain the message ID (integer) of published message.
+     */
+    RMAKER_MQTT_EVENT_PUBLISHED,
+    /** POSIX Timezone Changed. Associated data would be NULL terminated POSIX Timezone
+     * Eg. "PST8PDT,M3.2.0,M11.1.0" */
+    RMAKER_EVENT_TZ_POSIX_CHANGED,
+    /** Timezone Changed. Associated data would be NULL terminated Timezone.
+     * Eg. "America/Los_Angeles"
+     * Note that whenever this event is received, the RMAKER_EVENT_TZ_POSIX_CHANGED event
+     * will also be received, but not necessarily vice versa.
+     */
+    RMAKER_EVENT_TZ_CHANGED,
+    /**
+     * MQTT message deleted from the outbox if the message couldn't have been sent and acknowledged.
+     * Event data will contain the message ID (integer) of deleted message.
+     * Valid only if CONFIG_MQTT_REPORT_DELETED_MESSAGES is enabled.
+     */
+    RMAKER_MQTT_EVENT_MSG_DELETED,
+} esp_rmaker_common_event_t;
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_factory.h b/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_factory.h
new file mode 100644
index 00000000000..9ef781b798b
--- /dev/null
+++ b/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_factory.h
@@ -0,0 +1,61 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Initialize Factory NVS
+ *
+ * This initializes the Factory NVS partition which will store data
+ * that should not be cleared even after a reset to factory.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_factory_init(void);
+
+/** Get value from factory NVS
+ *
+ * This will search for the specified key in the Factory NVS partition,
+ * allocate the required memory to hold it, copy the value and return
+ * the pointer to it. It is responsibility of the caller to free the
+ * memory when the value is no more required.
+ *
+ * @param[in] key The key of the value to be read from factory NVS.
+ *
+ * @return pointer to the value on success.
+ * @return NULL on failure.
+ */
+void *esp_rmaker_factory_get(const char *key);
+
+/** Set a value in factory NVS
+ *
+ * This will write the value for the specified key into factory NVS.
+ *
+ * @param[in] key The key for the value to be set in factory NVS.
+ * @param[in] data Pointer to the value.
+ * @param[in] len Length of the value.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_factory_set(const char *key, void *value, size_t len);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_mqtt_glue.h b/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_mqtt_glue.h
new file mode 100644
index 00000000000..95744bdf58c
--- /dev/null
+++ b/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_mqtt_glue.h
@@ -0,0 +1,160 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define RMAKER_MQTT_QOS0    0
+#define RMAKER_MQTT_QOS1    1
+
+/** MQTT Connection parameters */
+typedef struct {
+    /** MQTT Host */
+    char *mqtt_host;
+    /** Client ID */
+    char *client_id;
+    /** Client Certificate in NULL terminated PEM format */
+    char *client_cert;
+    /** Client Key in NULL terminated PEM format */
+    char *client_key;
+    /** Server Certificate in NULL terminated PEM format */
+    char *server_cert;
+} esp_rmaker_mqtt_conn_params_t;
+
+/** MQTT Get Connection Parameters function prototype
+ *
+ * @return Pointer to \ref esp_rmaker_mqtt_conn_params_t on success.
+ * @return NULL on failure.
+ */
+typedef esp_rmaker_mqtt_conn_params_t *(*esp_rmaker_mqtt_get_conn_params_t)(void);
+
+/** MQTT Subscribe callback prototype
+ *
+ * @param[in] topic Topic on which the message was received
+ * @param[in] payload Data received in the message
+ * @param[in] payload_len Length of the data
+ * @param[in] priv_data The private data passed during subscription
+ */
+typedef void (*esp_rmaker_mqtt_subscribe_cb_t)(const char *topic, void *payload, size_t payload_len, void *priv_data);
+
+/** MQTT Init function prototype
+ *
+ * @param[in] conn_params The MQTT connection parameters. If NULL is passed, it should internally use the
+ * \ref esp_rmaker_mqtt_get_conn_params call if registered.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_init_t)(esp_rmaker_mqtt_conn_params_t *conn_params);
+
+/** MQTT Deinit function prototype
+ *
+ * Call this function after MQTT has disconnected.
+ */
+typedef void (*esp_rmaker_mqtt_deinit_t)(void);
+
+/** MQTT Connect function prototype
+ *
+ * Starts the connection attempts to the MQTT broker.
+ * This should ideally be called after successful network connection.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_connect_t)(void);
+
+/** MQTT Disconnect function prototype
+ *
+ * Disconnects from the MQTT broker.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_disconnect_t)(void);
+
+/** MQTT Publish Message function prototype
+ *
+ * @param[in] topic The MQTT topic on which the message should be published.
+ * @param[in] data Data to be published.
+ * @param[in] data_len Length of the data.
+ * @param[in] qos Quality of service for the message.
+ * @param[out] msg_id If a non NULL pointer is passed, the id of the published message will be returned in this.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_publish_t)(const char *topic, void *data, size_t data_len, uint8_t qos, int *msg_id);
+
+/** MQTT Subscribe function prototype
+ *
+ * @param[in] topic The topic to be subscribed to.
+ * @param[in] cb The callback to be invoked when a message is received on the given topic.
+ * @param[in] qos Quality of service for the subscription.
+ * @param[in] priv_data Optional private data to be passed to the callback.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_subscribe_t)(const char *topic, esp_rmaker_mqtt_subscribe_cb_t cb, uint8_t qos, void *priv_data);
+
+/** MQTT Unsubscribe function prototype
+ *
+ * @param[in] topic Topic from which to unsubscribe.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_unsubscribe_t)(const char *topic);
+
+/**  MQTT configuration */
+typedef struct {
+    /** Flag to indicate if the MQTT config setup is done */
+    bool setup_done;
+    /** Pointer to the Get MQTT params function. */
+    esp_rmaker_mqtt_get_conn_params_t get_conn_params;
+    /** Pointer to MQTT Init function. */
+    esp_rmaker_mqtt_init_t init;
+    /** Pointer to MQTT Deinit function. */
+    esp_rmaker_mqtt_deinit_t deinit;
+    /** Pointer to MQTT Connect function. */
+    esp_rmaker_mqtt_connect_t connect;
+    /** Pointer to MQTQ Disconnect function */
+    esp_rmaker_mqtt_disconnect_t disconnect;
+    /** Pointer to MQTT Publish function */
+    esp_rmaker_mqtt_publish_t publish;
+    /** Pointer to MQTT Subscribe function */
+    esp_rmaker_mqtt_subscribe_t subscribe;
+    /** Pointer to MQTT Unsubscribe function */
+    esp_rmaker_mqtt_unsubscribe_t unsubscribe;
+} esp_rmaker_mqtt_config_t;
+
+/** Setup MQTT Glue
+ *
+ * This function initializes MQTT glue layer with all the default functions.
+ *
+ * @param[out] mqtt_config Pointer to an allocated MQTT configuration structure.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_glue_setup(esp_rmaker_mqtt_config_t *mqtt_config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_utils.h b/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_utils.h
similarity index 60%
rename from tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_utils.h
rename to tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_utils.h
index f506bf7cf6a..86ab691d492 100644
--- a/tools/sdk/esp32/include/esp_rainmaker/include/esp_rmaker_utils.h
+++ b/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_utils.h
@@ -1,4 +1,4 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
 //
 // Licensed under the Apache License, Version 2.0 (the "License");
 // you may not use this file except in compliance with the License.
@@ -15,12 +15,24 @@
 #include <stdint.h>
 #include <sntp.h>
 #include <esp_err.h>
+#include <esp_heap_caps.h>
+#include <sdkconfig.h>
 
 #ifdef __cplusplus
 extern "C"
 {
 #endif
 
+#ifdef CONFIG_SPIRAM
+#define MEM_ALLOC_EXTRAM(size)         heap_caps_malloc(size, MALLOC_CAP_SPIRAM)
+#define MEM_CALLOC_EXTRAM(num, size)   heap_caps_calloc(num, size, MALLOC_CAP_SPIRAM)
+#define MEM_REALLOC_EXTRAM(ptr, size)  heap_caps_realloc(ptr, size, MALLOC_CAP_SPIRAM)
+#else
+#define MEM_ALLOC_EXTRAM(size)         malloc(size)
+#define MEM_CALLOC_EXTRAM(num, size)   calloc(num, size)
+#define MEM_REALLOC_EXTRAM(ptr, size)  realloc(ptr, size)
+#endif
+
 typedef struct esp_rmaker_time_config {
     /** If not specified, then 'CONFIG_ESP_RMAKER_SNTP_SERVER_NAME' is used as the SNTP server. */
     char *sntp_server_name;
@@ -32,7 +44,7 @@ typedef struct esp_rmaker_time_config {
     sntp_sync_time_cb_t sync_time_cb;
 } esp_rmaker_time_config_t;
 
-/** Reboot the chip after a delay
+/** Reboot the device after a delay
  *
  * This API just starts a reboot timer and returns immediately.
  * The actual reboot is trigerred asynchronously in the timer callback.
@@ -40,44 +52,54 @@ typedef struct esp_rmaker_time_config {
  * their operations (Eg. MQTT publish to indicate OTA success). The \ref RMAKER_EVENT_REBOOT
  * event is triggered when the reboot timer is started.
  *
- * @param[in] seconds Time in seconds after which the chip should reboot.
+ * @param[in] seconds Time in seconds after which the device should reboot.
  *
  * @return ESP_OK on success.
  * @return error on failure.
  */
-esp_err_t esp_rmaker_reboot(uint8_t seconds);
+esp_err_t esp_rmaker_reboot(int8_t seconds);
 
-/** Reset Wi-Fi credentials and reboot
+/** Reset Wi-Fi credentials and (optionally) reboot
  *
- * This will reset just the Wi-Fi credentials and trigger a reboot.
+ * This will reset just the Wi-Fi credentials and (optionally) trigger a reboot.
  * This is useful when you want to keep all the entries in NVS memory
  * intact, but just change the Wi-Fi credentials. The \ref RMAKER_EVENT_WIFI_RESET
- * event is triggered after the reset.
+ * event is triggered when this API is called. The actual reset will happen after a
+ * delay if reset_seconds is not zero.
  *
- * @note This function internally calls esp_rmaker_reboot() and returns
- * immediately. The reboot happens asynchronously.
+ * @note This reset and reboot operations will happen asynchronously depending
+ * on the values passed to the API.
  *
- * @param[in] seconds Time in seconds after which the chip should reboot.
+ * @param[in] reset_seconds Time in seconds after which the reset should get triggered.
+ * This will help other modules take some actions before the device actually resets.
+ * If set to zero, the operation would be performed immediately.
+ * @param[in] reboot_seconds Time in seconds after which the device should reboot. If set
+ * to negative value, the device will not reboot at all.
  *
  * @return ESP_OK on success.
  * @return error on failure.
  */
-esp_err_t esp_rmaker_wifi_reset(uint8_t seconds);
+esp_err_t esp_rmaker_wifi_reset(int8_t reset_seconds, int8_t reboot_seconds);
 
 /** Reset to factory defaults and reboot
  *
- * This will clear entire NVS partition and trigger a reboot.
- * The \ref RMAKER_EVENT_FACTORY_RESET event is triggered after the reset.
+ * This will clear entire NVS partition and (optionally) trigger a reboot.
+ * The \ref RMAKER_EVENT_FACTORY_RESET event is triggered when this API is called.
+ * The actual reset will happen after a delay if reset_seconds is not zero.
  *
- * @note This function internally calls esp_rmaker_reboot() and returns.
- * The reboot happens asynchronously.
+ * @note This reset and reboot operations will happen asynchronously depending
+ * on the values passed to the API.
  *
- * @param[in] seconds Time in seconds after which the chip should reboot.
+ * @param[in] reset_seconds Time in seconds after which the reset should get triggered.
+ * This will help other modules take some actions before the device actually resets.
+ * If set to zero, the operation would be performed immediately.
+ * @param[in] reboot_seconds Time in seconds after which the device should reboot. If set
+ * to negative value, the device will not reboot at all.
  *
  * @return ESP_OK on success.
  * @return error on failure.
  */
-esp_err_t esp_rmaker_factory_reset(uint8_t seconds);
+esp_err_t esp_rmaker_factory_reset(int8_t reset_seconds, int8_t reboot_seconds);
 
 /** Initialize time synchronization
  *
@@ -142,16 +164,25 @@ esp_err_t esp_rmaker_time_set_timezone_posix(const char *tz_posix);
  */
 esp_err_t esp_rmaker_time_set_timezone(const char *tz);
 
-/** Enable Timezone Service
+/** Get the current POSIX timezone
  *
- * This enables the ESP RainMaker standard timezone service which can be used to set
- * timezone, either in POSIX or location string format. Please refer the specifications
- * for additional details.
+ * This fetches the current timezone in POSIX format, read from NVS.
  *
- * @return ESP_OK on success
- * @return error on failure
+ * @return Pointer to a NULL terminated POSIX timezone string on success.
+ *      Freeing this is the responsibility of the caller.
+ * @return NULL on failure.
+ */
+char *esp_rmaker_time_get_timezone_posix(void);
+
+/** Get the current timezone
+ *
+ * This fetches the current timezone in POSIX format, read from NVS.
+ *
+ * @return Pointer to a NULL terminated timezone string on success.
+ *      Freeing this is the responsibility of the caller.
+ * @return NULL on failure.
  */
-esp_err_t esp_rmaker_timezone_service_enable(void);
+char *esp_rmaker_time_get_timezone(void);
 
 /** Get printable local time string
  *
diff --git a/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_work_queue.h b/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_work_queue.h
new file mode 100644
index 00000000000..0e696d46848
--- /dev/null
+++ b/tools/sdk/esp32/include/rmaker_common/include/esp_rmaker_work_queue.h
@@ -0,0 +1,82 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+/** Prototype for ESP RainMaker Work Queue Function
+ *
+ * @param[in] priv_data The private data associated with the work function.
+ */
+typedef void (*esp_rmaker_work_fn_t)(void *priv_data);
+
+/** Initializes the Work Queue
+ *
+ * This initializes the work queue, which is basically a mechanism to run
+ * tasks in the context of a dedicated thread. You can start queueing tasks
+ * after this, but they will get executed only after calling
+ * esp_rmaker_work_queue_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_init(void);
+
+/** De-initialize the Work Queue
+ *
+ * This de-initializes the work queue. Note that the work queue needs to
+ * be stopped using esp_rmaker_work_queue_stop() before calling this.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_deinit(void);
+
+/** Start the Work Queue
+ *
+ * This starts the Work Queue thread which then starts executing the tasks queued.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_start(void);
+
+/** Stop the Work Queue
+ *
+ * This stops a running Work Queue.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_stop(void);
+
+/** Queue execution of a function in the Work Queue's context
+ *
+ * This API queues a work function for execution in the Work Queue Task's context.
+ *
+ * @param[in] work_fn The Work function to be queued.
+ * @param[in] priv_data Private data to be passed to the work function.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_add_task(esp_rmaker_work_fn_t work_fn, void *priv_data);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/sdmmc/include/sdmmc_cmd.h b/tools/sdk/esp32/include/sdmmc/include/sdmmc_cmd.h
index e0e7162391b..9b7319641e2 100644
--- a/tools/sdk/esp32/include/sdmmc/include/sdmmc_cmd.h
+++ b/tools/sdk/esp32/include/sdmmc/include/sdmmc_cmd.h
@@ -224,10 +224,10 @@ esp_err_t sdmmc_io_enable_int(sdmmc_card_t* card);
 esp_err_t sdmmc_io_wait_int(sdmmc_card_t* card, TickType_t timeout_ticks);
 
 /**
- * Get the data of CIS region of a SDIO card.
+ * Get the data of CIS region of an SDIO card.
  *
  * You may provide a buffer not sufficient to store all the CIS data. In this
- * case, this functions store as much data into your buffer as possible. Also,
+ * case, this function stores as much data into your buffer as possible. Also,
  * this function will try to get and return the size required for you.
  *
  * @param card  pointer to card information structure previously initialized
@@ -253,7 +253,7 @@ esp_err_t sdmmc_io_wait_int(sdmmc_card_t* card, TickType_t timeout_ticks);
 esp_err_t sdmmc_io_get_cis_data(sdmmc_card_t* card, uint8_t* out_buffer, size_t buffer_size, size_t* inout_cis_size);
 
 /**
- * Parse and print the CIS information of a SDIO card.
+ * Parse and print the CIS information of an SDIO card.
  *
  * @note Not all the CIS codes and all kinds of tuples are supported. If you
  * see some unresolved code, you can add the parsing of these code in
diff --git a/tools/sdk/esp32/include/soc/esp32/include/soc/efuse_reg.h b/tools/sdk/esp32/include/soc/esp32/include/soc/efuse_reg.h
index 937585d9ba2..77e3b8db96d 100644
--- a/tools/sdk/esp32/include/soc/esp32/include/soc/efuse_reg.h
+++ b/tools/sdk/esp32/include/soc/esp32/include/soc/efuse_reg.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef _SOC_EFUSE_REG_H_
 #define _SOC_EFUSE_REG_H_
 
@@ -116,6 +108,7 @@
 #define EFUSE_RD_CHIP_VER_PKG_ESP32U4WDH   4
 #define EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4  5
 #define EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302  6
+#define EFUSE_RD_CHIP_VER_PKG_ESP32D0WDR2V3  7
 /* EFUSE_RD_SPI_PAD_CONFIG_HD : RO ;bitpos:[8:4] ;default: 5'b0 ; */
 /*description: read for SPI_pad_config_hd*/
 #define EFUSE_RD_SPI_PAD_CONFIG_HD  0x0000001F
diff --git a/tools/sdk/esp32/include/soc/esp32/include/soc/periph_defs.h b/tools/sdk/esp32/include/soc/esp32/include/soc/periph_defs.h
index d3ba942bde3..d6e7f8cf00b 100644
--- a/tools/sdk/esp32/include/soc/esp32/include/soc/periph_defs.h
+++ b/tools/sdk/esp32/include/soc/esp32/include/soc/periph_defs.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef _SOC_PERIPH_DEFS_H_
 #define _SOC_PERIPH_DEFS_H_
@@ -54,6 +46,7 @@ typedef enum {
     PERIPH_AES_MODULE,
     PERIPH_SHA_MODULE,
     PERIPH_RSA_MODULE,
+    PERIPH_SARADC_MODULE,
     PERIPH_MODULE_MAX
 } periph_module_t;
 
diff --git a/tools/sdk/esp32/include/soc/esp32/include/soc/soc_caps.h b/tools/sdk/esp32/include/soc/esp32/include/soc/soc_caps.h
index c31a12d0fe7..3449129ad06 100644
--- a/tools/sdk/esp32/include/soc/esp32/include/soc/soc_caps.h
+++ b/tools/sdk/esp32/include/soc/esp32/include/soc/soc_caps.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -52,6 +52,7 @@
 /*-------------------------- COMMON CAPS ---------------------------------------*/
 #define SOC_CAPS_ECO_VER_MAX        3
 
+#define SOC_ADC_SUPPORTED           1
 #define SOC_DAC_SUPPORTED           1
 #define SOC_MCPWM_SUPPORTED         1
 #define SOC_SDMMC_HOST_SUPPORTED    1
@@ -69,7 +70,7 @@
 
 /*-------------------------- ADC CAPS ----------------------------------------*/
 /**
- * TO BE REMOVED in !14278
+ * TO BE REMOVED
  * Check if adc support digital controller (DMA) mode.
  * @value
  *      - 1 : support;
@@ -79,6 +80,7 @@
 
 /*!< SAR ADC Module*/
 #define SOC_ADC_RTC_CTRL_SUPPORTED              1
+#define SOC_ADC_DIG_CTRL_SUPPORTED              1
 #define SOC_ADC_PERIPH_NUM                      (2)
 #define SOC_ADC_CHANNEL_NUM(PERIPH_NUM)         ((PERIPH_NUM==0)? 8: 10)
 #define SOC_ADC_MAX_CHANNEL_NUM                 (10)
@@ -89,8 +91,8 @@
 #define SOC_ADC_DIGI_MIN_BITWIDTH               (9)
 #define SOC_ADC_DIGI_MAX_BITWIDTH               (12)
 /*!< F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interva <= 4095 */
-#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH          83333
-#define SOC_ADC_SAMPLE_FREQ_THRES_LOW           611
+#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH          (2*1000*1000)
+#define SOC_ADC_SAMPLE_FREQ_THRES_LOW           (2000)
 
 /*!< RTC */
 #define SOC_ADC_MAX_BITWIDTH                    (12)
@@ -138,18 +140,23 @@
 
 #define SOC_I2C_SUPPORT_APB     (1)
 
+/*-------------------------- APLL CAPS ----------------------------------------*/
+#define SOC_CLK_APLL_SUPPORTED       (1)
+// apll_multiplier_out = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536)
+#define SOC_APLL_MULTIPLIER_OUT_MIN_HZ (350000000) // 350 MHz
+#define SOC_APLL_MULTIPLIER_OUT_MAX_HZ (500000000) // 500 MHz
+#define SOC_APLL_MIN_HZ    (5303031)   // 5.303031 MHz
+#define SOC_APLL_MAX_HZ    (125000000) // 125MHz
+
 /*-------------------------- I2S CAPS ----------------------------------------*/
 // ESP32 have 2 I2S
-#define SOC_I2S_NUM                 (2)
+#define SOC_I2S_NUM                 (2U)
+#define SOC_I2S_SUPPORTS_APLL       (1) // ESP32 support APLL
 #define SOC_I2S_SUPPORTS_PDM_TX     (1)
 #define SOC_I2S_SUPPORTS_PDM_RX     (1)
 #define SOC_I2S_SUPPORTS_ADC        (1) // ESP32 support ADC and DAC
 #define SOC_I2S_SUPPORTS_DAC        (1)
 
-#define SOC_I2S_SUPPORTS_APLL       (1)// ESP32 support APLL
-#define SOC_I2S_APLL_MIN_FREQ       (250000000)
-#define SOC_I2S_APLL_MAX_FREQ       (500000000)
-#define SOC_I2S_APLL_MIN_RATE       (10675) //in Hz, I2S Clock rate limited by hardware
 #define SOC_I2S_TRANS_SIZE_ALIGN_WORD (1) // I2S DMA transfer size must be aligned to word
 #define SOC_I2S_LCD_I80_VARIANT       (1) // I2S has a special LCD mode that can generate Intel 8080 TX timing
 
diff --git a/tools/sdk/esp32/include/soc/esp32/include/soc/tracemem_config.h b/tools/sdk/esp32/include/soc/esp32/include/soc/tracemem_config.h
new file mode 100644
index 00000000000..4d73ecfe518
--- /dev/null
+++ b/tools/sdk/esp32/include/soc/esp32/include/soc/tracemem_config.h
@@ -0,0 +1,17 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define TRACEMEM_BLK0_ADDR                      0x3FFFC000UL
+#define TRACEMEM_BLK1_ADDR                      0x3FFF8000UL
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/soc/esp32/include/soc/uart_channel.h b/tools/sdk/esp32/include/soc/esp32/include/soc/uart_channel.h
index 5b8dc56d5ae..89c6a8956cc 100644
--- a/tools/sdk/esp32/include/soc/esp32/include/soc/uart_channel.h
+++ b/tools/sdk/esp32/include/soc/esp32/include/soc/uart_channel.h
@@ -1,16 +1,10 @@
-// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32.
 
 #ifndef _SOC_UART_CHANNEL_H
 #define _SOC_UART_CHANNEL_H
diff --git a/tools/sdk/esp32/include/spi_flash/include/spi_flash_chip_th.h b/tools/sdk/esp32/include/spi_flash/include/spi_flash_chip_th.h
new file mode 100644
index 00000000000..7f631faf136
--- /dev/null
+++ b/tools/sdk/esp32/include/spi_flash/include/spi_flash_chip_th.h
@@ -0,0 +1,13 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_flash.h"
+#include "spi_flash_chip_driver.h"
+
+extern const spi_flash_chip_t esp_flash_chip_th;
diff --git a/tools/sdk/esp32/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h b/tools/sdk/esp32/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h
index 2fa64448d49..d477580fa99 100644
--- a/tools/sdk/esp32/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h
+++ b/tools/sdk/esp32/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h
@@ -15,7 +15,7 @@
 #ifndef _WIFI_PROV_CONFIG_H_
 #define _WIFI_PROV_CONFIG_H_
 
-#include <lwip/inet.h>
+#include <lwip/ip4_addr.h>
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h b/tools/sdk/esp32/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h
index 9777a424e15..41a6a7d685c 100644
--- a/tools/sdk/esp32/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h
+++ b/tools/sdk/esp32/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -17,7 +17,13 @@ typedef enum {
     ESP_EAP_TTLS_PHASE2_MSCHAP,
     ESP_EAP_TTLS_PHASE2_PAP,
     ESP_EAP_TTLS_PHASE2_CHAP
-} esp_eap_ttls_phase2_types ;
+} esp_eap_ttls_phase2_types;
+
+typedef struct {
+   int fast_provisioning;
+   int fast_max_pac_list_len;
+   bool fast_pac_format_binary;
+} esp_eap_fast_config;
 
 #ifdef __cplusplus
 extern "C" {
@@ -211,6 +217,35 @@ esp_err_t esp_wifi_sta_wpa2_ent_set_ttls_phase2_method(esp_eap_ttls_phase2_types
   */
 esp_err_t esp_wifi_sta_wpa2_set_suiteb_192bit_certification(bool enable);
 
+/**
+  * @brief  Set client pac file
+  *
+  * @attention  1. For files read from the file system, length has to be decremented by 1 byte.
+  * @attention  2. Disabling the WPA_MBEDTLS_CRYPTO config is required to use EAP-FAST.
+  *
+  * @param  pac_file: pointer to the pac file
+  *         pac_file_len: length of the pac file
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_pac_file(const unsigned char *pac_file, int pac_file_len);
+
+/**
+  * @brief  Set Phase 1 parameters for EAP-FAST
+  *
+  * @attention  1. Disabling the WPA_MBEDTLS_CRYPTO config is required to use EAP-FAST.
+  *
+  * @param  config: eap fast phase 1 configuration
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_ARG: fail(out of bound arguments)
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_fast_phase1_params(esp_eap_fast_config config);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/wpa_supplicant/include/utils/wpabuf.h b/tools/sdk/esp32/include/wpa_supplicant/include/utils/wpabuf.h
index e9f4ce7b34e..092b31e08ba 100644
--- a/tools/sdk/esp32/include/wpa_supplicant/include/utils/wpabuf.h
+++ b/tools/sdk/esp32/include/wpa_supplicant/include/utils/wpabuf.h
@@ -1,6 +1,6 @@
 /*
  * Dynamic data buffer
- * Copyright (c) 2007-2009, Jouni Malinen <j@w1.fi>
+ * Copyright (c) 2007-2012, Jouni Malinen <j@w1.fi>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -15,6 +15,9 @@
 #ifndef WPABUF_H
 #define WPABUF_H
 
+/* wpabuf::buf is a pointer to external data */
+#define WPABUF_FLAG_EXT_DATA BIT(0)
+
 /*
  * Internal data structure for wpabuf. Please do not touch this directly from
  * elsewhere. This is only defined in header file to allow inline functions
@@ -23,8 +26,8 @@
 struct wpabuf {
 	size_t size; /* total size of the allocated buffer */
 	size_t used; /* length of data in the buffer */
-	u8 *ext_data; /* pointer to external data; NULL if data follows
-		       * struct wpabuf */
+	u8 *buf; /* pointer to the head of the buffer */
+	unsigned int flags;
 	/* optionally followed by the allocated buffer */
 };
 
@@ -35,6 +38,7 @@ struct wpabuf * wpabuf_alloc_ext_data(u8 *data, size_t len);
 struct wpabuf * wpabuf_alloc_copy(const void *data, size_t len);
 struct wpabuf * wpabuf_dup(const struct wpabuf *src);
 void wpabuf_free(struct wpabuf *buf);
+void wpabuf_clear_free(struct wpabuf *buf);
 void * wpabuf_put(struct wpabuf *buf, size_t len);
 struct wpabuf * wpabuf_concat(struct wpabuf *a, struct wpabuf *b);
 struct wpabuf * wpabuf_zeropad(struct wpabuf *buf, size_t len);
@@ -78,9 +82,7 @@ static inline size_t wpabuf_tailroom(const struct wpabuf *buf)
  */
 static inline const void * wpabuf_head(const struct wpabuf *buf)
 {
-	if (buf->ext_data)
-		return buf->ext_data;
-	return buf + 1;
+	return buf->buf;
 }
 
 static inline const u8 * wpabuf_head_u8(const struct wpabuf *buf)
@@ -95,9 +97,7 @@ static inline const u8 * wpabuf_head_u8(const struct wpabuf *buf)
  */
 static inline void * wpabuf_mhead(struct wpabuf *buf)
 {
-	if (buf->ext_data)
-		return buf->ext_data;
-	return buf + 1;
+	return buf->buf;
 }
 
 static inline u8 * wpabuf_mhead_u8(struct wpabuf *buf)
@@ -156,7 +156,8 @@ static inline void wpabuf_put_buf(struct wpabuf *dst,
 
 static inline void wpabuf_set(struct wpabuf *buf, const void *data, size_t len)
 {
-	buf->ext_data = (u8 *) data;
+	buf->buf = (u8 *) data;
+	buf->flags = WPABUF_FLAG_EXT_DATA;
 	buf->size = buf->used = len;
 }
 
diff --git a/tools/sdk/esp32/include/wpa_supplicant/port/include/os.h b/tools/sdk/esp32/include/wpa_supplicant/port/include/os.h
index 74e1e349e91..ce9aa559a44 100644
--- a/tools/sdk/esp32/include/wpa_supplicant/port/include/os.h
+++ b/tools/sdk/esp32/include/wpa_supplicant/port/include/os.h
@@ -289,6 +289,9 @@ char * ets_strdup(const char *s);
 #ifndef os_strlcpy
 #define os_strlcpy(d, s, n) strlcpy((d), (s), (n))
 #endif
+#ifndef os_strcat
+#define os_strcat(d, s) strcat((d), (s))
+#endif
 
 #ifndef os_snprintf
 #ifdef _MSC_VER
@@ -297,6 +300,9 @@ char * ets_strdup(const char *s);
 #define os_snprintf snprintf
 #endif
 #endif
+#ifndef os_sprintf
+#define os_sprintf sprintf
+#endif
 
 static inline int os_snprintf_error(size_t size, int res)
 {
diff --git a/tools/sdk/esp32/ld/esp32.rom.newlib-funcs.ld b/tools/sdk/esp32/ld/esp32.rom.newlib-funcs.ld
index d38e4452749..79d5c5be0d8 100644
--- a/tools/sdk/esp32/ld/esp32.rom.newlib-funcs.ld
+++ b/tools/sdk/esp32/ld/esp32.rom.newlib-funcs.ld
@@ -43,7 +43,6 @@ _getenv_r = 0x40001fbc;
 isalnum = 0x40000f04;
 isalpha = 0x40000f18;
 isascii = 0x4000c20c;
-_isatty_r = 0x40000ea0;
 isblank = 0x40000f2c;
 iscntrl = 0x40000f50;
 isdigit = 0x40000f64;
@@ -77,14 +76,11 @@ __sfmoreglue = 0x40001dc8;
 __sfp = 0x40001e90;
 __sfp_lock_acquire = 0x40001e08;
 __sfp_lock_release = 0x40001e14;
-__sfvwrite_r = 0x4005893c;
 __sinit = 0x40001e38;
 __sinit_lock_acquire = 0x40001e20;
 __sinit_lock_release = 0x40001e2c;
-__smakebuf_r = 0x40059108;
 srand = 0x40001004;
 __sread = 0x40001118;
-__srefill_r = 0x400593d4;
 __sseek = 0x40001184;
 strcasecmp = 0x400011cc;
 strcasestr = 0x40001210;
@@ -122,7 +118,6 @@ __submore = 0x40058f3c;
 __swbuf = 0x40058cb4;
 __swbuf_r = 0x40058bec;
 __swrite = 0x40001150;
-__swsetup_r = 0x40058cc8;
 toascii = 0x4000c720;
 tolower = 0x40001868;
 toupper = 0x40001884;
diff --git a/tools/sdk/esp32/ld/esp32.rom.newlib-time.ld b/tools/sdk/esp32/ld/esp32.rom.newlib-time.ld
index f6b222eb10c..50ec64882d7 100644
--- a/tools/sdk/esp32/ld/esp32.rom.newlib-time.ld
+++ b/tools/sdk/esp32/ld/esp32.rom.newlib-time.ld
@@ -27,3 +27,12 @@ _timezone = 0x3ffae0a0;
 _tzname = 0x3ffae030;
 _daylight = 0x3ffae0a4;
 __month_lengths = 0x3ff9609c;
+
+/* These functions don't use time_t, but use other structures which include time_t.
+ * For example, 'struct stat' contains time_t.
+ */
+_isatty_r = 0x40000ea0;
+__sfvwrite_r = 0x4005893c;
+__smakebuf_r = 0x40059108;
+__srefill_r = 0x400593d4;
+__swsetup_r = 0x40058cc8;
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new file mode 100644
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new file mode 100644
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index 364019779c4..151687144fb 100644
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diff --git a/tools/sdk/esp32/lib/libws2812_led.a b/tools/sdk/esp32/lib/libws2812_led.a
index c6b51b381dc..7a0f5ce31ff 100644
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diff --git a/tools/sdk/esp32/lib/libxtensa.a b/tools/sdk/esp32/lib/libxtensa.a
index e632b5d01c1..31561f17b00 100644
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diff --git a/tools/sdk/esp32/include/config/sdkconfig.h b/tools/sdk/esp32/qspi_qspi/include/sdkconfig.h
similarity index 96%
rename from tools/sdk/esp32/include/config/sdkconfig.h
rename to tools/sdk/esp32/qspi_qspi/include/sdkconfig.h
index fa51634dabd..4e41e975c26 100644
--- a/tools/sdk/esp32/include/config/sdkconfig.h
+++ b/tools/sdk/esp32/qspi_qspi/include/sdkconfig.h
@@ -45,22 +45,19 @@
 #define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
 #define CONFIG_PARTITION_TABLE_OFFSET 0x8000
 #define CONFIG_PARTITION_TABLE_MD5 1
+#define CONFIG_LIB_BUILDER_FLASHMODE "dio"
+#define CONFIG_LIB_BUILDER_FLASHFREQ "40m"
 #define CONFIG_ESP_RMAKER_ASSISTED_CLAIM 1
+#define CONFIG_ESP_RMAKER_CLAIM_TYPE 2
 #define CONFIG_ESP_RMAKER_MQTT_HOST "a1p72mufdu6064-ats.iot.us-east-1.amazonaws.com"
-#define CONFIG_ESP_RMAKER_TASK_STACK 4096
-#define CONFIG_ESP_RMAKER_TASK_PRIORITY 5
-#define CONFIG_ESP_RMAKER_MAX_NODE_CONFIG_SIZE 2048
 #define CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE 1024
-#define CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME "fctry"
-#define CONFIG_ESP_RMAKER_MQTT_PORT_443 1
-#define CONFIG_ESP_RMAKER_MQTT_PORT 1
-#define CONFIG_ESP_RMAKER_DEF_TIMEZONE ""
-#define CONFIG_ESP_RMAKER_SNTP_SERVER_NAME "pool.ntp.org"
 #define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0 1
 #define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM 0
 #define CONFIG_ESP_RMAKER_OTA_AUTOFETCH 1
 #define CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD 0
-#define CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES 5
+#define CONFIG_ESP_RMAKER_OTA_HTTP_RX_BUFFER_SIZE 1024
+#define CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES 10
+#define CONFIG_ESP_RMAKER_SCENES_MAX_SCENES 10
 #define CONFIG_ENABLE_ARDUINO_DEPENDS 1
 #define CONFIG_AUTOSTART_ARDUINO 1
 #define CONFIG_ARDUINO_RUN_CORE1 1
@@ -68,9 +65,9 @@
 #define CONFIG_ARDUINO_LOOP_STACK_SIZE 8192
 #define CONFIG_ARDUINO_EVENT_RUN_CORE1 1
 #define CONFIG_ARDUINO_EVENT_RUNNING_CORE 1
-#define CONFIG_ARDUINO_UDP_RUN_CORE1 1
+#define CONFIG_ARDUINO_UDP_RUN_CORE0 1
 #define CONFIG_ARDUINO_UDP_TASK_PRIORITY 3
-#define CONFIG_ARDUINO_UDP_RUNNING_CORE 1
+#define CONFIG_ARDUINO_UDP_RUNNING_CORE 0
 #define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR 1
 #define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL 1
 #define CONFIG_ARDUHAL_ESP_LOG 1
@@ -170,7 +167,6 @@
 #define CONFIG_SPIRAM 1
 #define CONFIG_SPIRAM_USE_MALLOC 1
 #define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 4096
-#define CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP 1
 #define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 0
 #define CONFIG_SPIRAM_CACHE_WORKAROUND 1
 #define CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW 1
@@ -227,7 +223,7 @@
 #define CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR 1
 #define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
 #define CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH 1
-#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 512
+#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 1024
 #define CONFIG_HTTPD_MAX_URI_LEN 512
 #define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
 #define CONFIG_HTTPD_PURGE_BUF_LEN 32
@@ -353,7 +349,6 @@
 #define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
 #define CONFIG_HEAP_POISONING_LIGHT 1
 #define CONFIG_HEAP_TRACING_OFF 1
-#define CONFIG_LIBSODIUM_USE_MBEDTLS_SHA 1
 #define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
 #define CONFIG_LOG_DEFAULT_LEVEL 1
 #define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
@@ -417,10 +412,12 @@
 #define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
 #define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
 #define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
+#define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
 #define CONFIG_MBEDTLS_HARDWARE_AES 1
 #define CONFIG_MBEDTLS_HARDWARE_MPI 1
+#define CONFIG_MBEDTLS_HARDWARE_SHA 1
 #define CONFIG_MBEDTLS_ROM_MD5 1
 #define CONFIG_MBEDTLS_HAVE_TIME 1
 #define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
@@ -537,6 +534,18 @@
 #define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
 #define CONFIG_WPA_MBEDTLS_CRYPTO 1
 #define CONFIG_IO_GLITCH_FILTER_TIME_MS 50
+#define CONFIG_ESP_RMAKER_LIB_ESP_MQTT 1
+#define CONFIG_ESP_RMAKER_MQTT_GLUE_LIB 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT_443 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT 1
+#define CONFIG_ESP_RMAKER_MQTT_SEND_USERNAME 1
+#define CONFIG_ESP_RMAKER_MQTT_USERNAME "?Platform=APN/1 ESPIF,RAINMAKER,v1.0"
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK 4096
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_PRIORITY 5
+#define CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME "fctry"
+#define CONFIG_ESP_RMAKER_FACTORY_NAMESPACE "rmaker_creds"
+#define CONFIG_ESP_RMAKER_DEF_TIMEZONE "Asia/Shanghai"
+#define CONFIG_ESP_RMAKER_SNTP_SERVER_NAME "pool.ntp.org"
 #define CONFIG_DSP_OPTIMIZATIONS_SUPPORTED 1
 #define CONFIG_DSP_OPTIMIZED 1
 #define CONFIG_DSP_OPTIMIZATION 1
@@ -551,7 +560,10 @@
 #define CONFIG_GC2145_SUPPORT 1
 #define CONFIG_GC032A_SUPPORT 1
 #define CONFIG_GC0308_SUPPORT 1
+#define CONFIG_BF3005_SUPPORT 1
+#define CONFIG_BF20A6_SUPPORT 1
 #define CONFIG_SCCB_HARDWARE_I2C_PORT1 1
+#define CONFIG_SCCB_CLK_FREQ 100000
 #define CONFIG_GC_SENSOR_SUBSAMPLE_MODE 1
 #define CONFIG_CAMERA_CORE0 1
 #define CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX 32768
@@ -679,5 +691,5 @@
 #define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
 #define CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP
-#define CONFIG_ARDUINO_IDF_COMMIT "a79dc75f0a"
+#define CONFIG_ARDUINO_IDF_COMMIT "b8050b365e"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32/lib/libbootloader_support.a b/tools/sdk/esp32/qspi_qspi/libbootloader_support.a
similarity index 56%
rename from tools/sdk/esp32/lib/libbootloader_support.a
rename to tools/sdk/esp32/qspi_qspi/libbootloader_support.a
index c94a3429142..94520ff940c 100644
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diff --git a/tools/sdk/esp32/lib/libesp_hw_support.a b/tools/sdk/esp32/qspi_qspi/libesp_hw_support.a
similarity index 61%
rename from tools/sdk/esp32/lib/libesp_hw_support.a
rename to tools/sdk/esp32/qspi_qspi/libesp_hw_support.a
index 199a74d0543..b37d33791a3 100644
Binary files a/tools/sdk/esp32/lib/libesp_hw_support.a and b/tools/sdk/esp32/qspi_qspi/libesp_hw_support.a differ
diff --git a/tools/sdk/esp32/lib/libesp_system.a b/tools/sdk/esp32/qspi_qspi/libesp_system.a
similarity index 55%
rename from tools/sdk/esp32/lib/libesp_system.a
rename to tools/sdk/esp32/qspi_qspi/libesp_system.a
index c002693990d..4e1e5d856c1 100644
Binary files a/tools/sdk/esp32/lib/libesp_system.a and b/tools/sdk/esp32/qspi_qspi/libesp_system.a differ
diff --git a/tools/sdk/esp32/lib/libfreertos.a b/tools/sdk/esp32/qspi_qspi/libfreertos.a
similarity index 54%
rename from tools/sdk/esp32/lib/libfreertos.a
rename to tools/sdk/esp32/qspi_qspi/libfreertos.a
index ab471d6d58d..d596737dc50 100644
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diff --git a/tools/sdk/esp32/lib/libspi_flash.a b/tools/sdk/esp32/qspi_qspi/libspi_flash.a
similarity index 51%
rename from tools/sdk/esp32/lib/libspi_flash.a
rename to tools/sdk/esp32/qspi_qspi/libspi_flash.a
index 26be7244e85..97325ba0684 100644
Binary files a/tools/sdk/esp32/lib/libspi_flash.a and b/tools/sdk/esp32/qspi_qspi/libspi_flash.a differ
diff --git a/tools/sdk/esp32/ld/sections.ld b/tools/sdk/esp32/qspi_qspi/sections.ld
similarity index 71%
rename from tools/sdk/esp32/ld/sections.ld
rename to tools/sdk/esp32/qspi_qspi/sections.ld
index 40feea9f011..189d9a5ab8a 100644
--- a/tools/sdk/esp32/ld/sections.ld
+++ b/tools/sdk/esp32/qspi_qspi/sections.ld
@@ -351,10 +351,12 @@ SECTIONS
     *librtc.a:(.literal .literal.* .text .text.*)
     *libsoc.a:lldesc.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
     *libxt_hal.a:(.literal .literal.* .text .text.*)
@@ -383,7 +385,7 @@ SECTIONS
     *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*)
     *(.dram1 .dram1.*)
     _coredump_dram_start = ABSOLUTE(.);
-    *(.dram1.coredump .dram1.coredump.*)
+    *(.dram2.coredump .dram2.coredump.*)
     _coredump_dram_end = ABSOLUTE(.);
     *libapp_trace.a:app_trace.*(.rodata .rodata.*)
     *libapp_trace.a:app_trace_util.*(.rodata .rodata.*)
@@ -547,10 +549,12 @@ SECTIONS
     *libphy.a:(.rodata .rodata.*)
     *libsoc.a:lldesc.*(.rodata .rodata.*)
     *libspi_flash.a:memspi_host_driver.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_boya.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_chip_gd.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_chip_mxic.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_rom_patch.*(.rodata .rodata.*)
 
@@ -641,7 +645,7 @@ SECTIONS
   {
     _flash_rodata_start = ABSOLUTE(.);
 
-    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
+    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
     *(.rodata_wlog_error .rodata_wlog_error.*)
 
 
@@ -715,7 +719,7 @@ SECTIONS
     _stext = .;
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*libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*)
+    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*)
     *(.wifi0iram .wifi0iram.*)
     *(.wifiorslpiram .wifiorslpiram.*)
     *(.wifirxiram .wifirxiram.*)
@@ -768,7 +772,7 @@ SECTIONS
 
     *(.iram.data .iram.data.*)
     _coredump_iram_start = ABSOLUTE(.);
-    *(.iram.data.coredump .iram.data.coredump.*)
+    *(.iram2.coredump .iram2.coredump.*)
     _coredump_iram_end = ABSOLUTE(.);
 
     _iram_data_end = ABSOLUTE(.);
diff --git a/tools/sdk/esp32/sdkconfig b/tools/sdk/esp32/sdkconfig
index 89a757a8462..990eab05e48 100644
--- a/tools/sdk/esp32/sdkconfig
+++ b/tools/sdk/esp32/sdkconfig
@@ -128,23 +128,20 @@ CONFIG_PARTITION_TABLE_OFFSET=0x8000
 CONFIG_PARTITION_TABLE_MD5=y
 # end of Partition Table
 
+CONFIG_LIB_BUILDER_FLASHMODE="dio"
+CONFIG_LIB_BUILDER_FLASHFREQ="40m"
+
 #
 # ESP RainMaker Config
 #
+# CONFIG_ESP_RMAKER_NO_CLAIM is not set
 CONFIG_ESP_RMAKER_ASSISTED_CLAIM=y
+CONFIG_ESP_RMAKER_CLAIM_TYPE=2
 CONFIG_ESP_RMAKER_MQTT_HOST="a1p72mufdu6064-ats.iot.us-east-1.amazonaws.com"
-CONFIG_ESP_RMAKER_TASK_STACK=4096
-CONFIG_ESP_RMAKER_TASK_PRIORITY=5
-CONFIG_ESP_RMAKER_MAX_NODE_CONFIG_SIZE=2048
 CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE=1024
-CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME="fctry"
-# CONFIG_RMAKER_MQTT_PERSISTENT_SESSION is not set
-CONFIG_ESP_RMAKER_MQTT_PORT_443=y
-# CONFIG_ESP_RMAKER_MQTT_PORT_8883 is not set
-CONFIG_ESP_RMAKER_MQTT_PORT=1
-CONFIG_ESP_RMAKER_DEF_TIMEZONE=""
-CONFIG_ESP_RMAKER_SNTP_SERVER_NAME="pool.ntp.org"
 # CONFIG_ESP_RMAKER_DISABLE_USER_MAPPING_PROV is not set
+# CONFIG_ESP_RMAKER_USER_ID_CHECK is not set
+# CONFIG_ESP_RMAKER_LOCAL_CTRL_ENABLE is not set
 CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0=y
 # CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_1 is not set
 CONFIG_ESP_RMAKER_CONSOLE_UART_NUM=0
@@ -157,13 +154,21 @@ CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD=0
 # CONFIG_ESP_RMAKER_SKIP_COMMON_NAME_CHECK is not set
 # CONFIG_ESP_RMAKER_SKIP_VERSION_CHECK is not set
 # CONFIG_ESP_RMAKER_SKIP_PROJECT_NAME_CHECK is not set
+CONFIG_ESP_RMAKER_OTA_HTTP_RX_BUFFER_SIZE=1024
 # end of ESP RainMaker OTA Config
 
 #
 # ESP RainMaker Scheduling
 #
-CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES=5
+CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES=10
 # end of ESP RainMaker Scheduling
+
+#
+# ESP RainMaker Scenes
+#
+CONFIG_ESP_RMAKER_SCENES_MAX_SCENES=10
+# CONFIG_ESP_RMAKER_SCENES_DEACTIVATE_SUPPORT is not set
+# end of ESP RainMaker Scenes
 # end of ESP RainMaker Config
 
 #
@@ -180,11 +185,11 @@ CONFIG_ARDUINO_LOOP_STACK_SIZE=8192
 CONFIG_ARDUINO_EVENT_RUN_CORE1=y
 # CONFIG_ARDUINO_EVENT_RUN_NO_AFFINITY is not set
 CONFIG_ARDUINO_EVENT_RUNNING_CORE=1
-# CONFIG_ARDUINO_UDP_RUN_CORE0 is not set
-CONFIG_ARDUINO_UDP_RUN_CORE1=y
+CONFIG_ARDUINO_UDP_RUN_CORE0=y
+# CONFIG_ARDUINO_UDP_RUN_CORE1 is not set
 # CONFIG_ARDUINO_UDP_RUN_NO_AFFINITY is not set
 CONFIG_ARDUINO_UDP_TASK_PRIORITY=3
-CONFIG_ARDUINO_UDP_RUNNING_CORE=1
+CONFIG_ARDUINO_UDP_RUNNING_CORE=0
 # CONFIG_ARDUINO_ISR_IRAM is not set
 # CONFIG_DISABLE_HAL_LOCKS is not set
 
@@ -217,6 +222,18 @@ CONFIG_ARDUHAL_PARTITION_SCHEME="default"
 #
 # end of Arduino TinyUSB
 
+#
+# ESP Speech Recognition
+#
+# CONFIG_USE_WAKENET is not set
+# CONFIG_USE_MULTINET is not set
+
+#
+# Add speech commands
+#
+# end of Add speech commands
+# end of ESP Speech Recognition
+
 #
 # Compiler options
 #
@@ -436,6 +453,13 @@ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
 #
 # CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL is not set
 # end of GPIO Configuration
+
+#
+# GDMA Configuration
+#
+# CONFIG_GDMA_CTRL_FUNC_IN_IRAM is not set
+# CONFIG_GDMA_ISR_IRAM_SAFE is not set
+# end of GDMA Configuration
 # end of Driver configurations
 
 #
@@ -644,7 +668,7 @@ CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH=y
 #
 # HTTP Server
 #
-CONFIG_HTTPD_MAX_REQ_HDR_LEN=512
+CONFIG_HTTPD_MAX_REQ_HDR_LEN=1024
 CONFIG_HTTPD_MAX_URI_LEN=512
 CONFIG_HTTPD_ERR_RESP_NO_DELAY=y
 CONFIG_HTTPD_PURGE_BUF_LEN=32
@@ -688,6 +712,11 @@ CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y
 # CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND is not set
 # CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND is not set
 # end of Sleep Config
+
+#
+# RTC Clock Config
+#
+# end of RTC Clock Config
 # end of Hardware Settings
 
 #
@@ -772,6 +801,7 @@ CONFIG_ESP_TASK_WDT_TIMEOUT_S=5
 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
 # CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 is not set
 # CONFIG_ESP_PANIC_HANDLER_IRAM is not set
+# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set
 CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5=y
 # end of ESP System Settings
 
@@ -975,7 +1005,6 @@ CONFIG_HEAP_TRACING_OFF=y
 #
 # libsodium
 #
-CONFIG_LIBSODIUM_USE_MBEDTLS_SHA=y
 # end of libsodium
 
 #
@@ -1152,9 +1181,24 @@ CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
 # CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set
 CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=16384
 # CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN is not set
-# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set
 # CONFIG_MBEDTLS_DEBUG is not set
 
+#
+# mbedTLS v2.28.x related
+#
+# CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set
+# CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set
+# CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set
+CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE=y
+
+#
+# DTLS-based configurations
+#
+# CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID is not set
+# CONFIG_MBEDTLS_SSL_DTLS_SRTP is not set
+# end of DTLS-based configurations
+# end of mbedTLS v2.28.x related
+
 #
 # Certificate Bundle
 #
@@ -1169,7 +1213,7 @@ CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y
 # CONFIG_MBEDTLS_CMAC_C is not set
 CONFIG_MBEDTLS_HARDWARE_AES=y
 CONFIG_MBEDTLS_HARDWARE_MPI=y
-# CONFIG_MBEDTLS_HARDWARE_SHA is not set
+CONFIG_MBEDTLS_HARDWARE_SHA=y
 CONFIG_MBEDTLS_ROM_MD5=y
 # CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set
 # CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set
@@ -1371,6 +1415,8 @@ CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y
 CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y
 CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
 CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y
+# CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP is not set
+# CONFIG_SPI_FLASH_SUPPORT_TH_CHIP is not set
 # end of Auto-detect flash chips
 
 CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y
@@ -1487,6 +1533,32 @@ CONFIG_WPA_MBEDTLS_CRYPTO=y
 CONFIG_IO_GLITCH_FILTER_TIME_MS=50
 # end of Button
 
+#
+# ESP RainMaker Common
+#
+CONFIG_ESP_RMAKER_LIB_ESP_MQTT=y
+# CONFIG_ESP_RMAKER_LIB_AWS_IOT is not set
+CONFIG_ESP_RMAKER_MQTT_GLUE_LIB=1
+CONFIG_ESP_RMAKER_MQTT_PORT_443=y
+# CONFIG_ESP_RMAKER_MQTT_PORT_8883 is not set
+CONFIG_ESP_RMAKER_MQTT_PORT=1
+# CONFIG_ESP_RMAKER_MQTT_PERSISTENT_SESSION is not set
+CONFIG_ESP_RMAKER_MQTT_SEND_USERNAME=y
+CONFIG_ESP_RMAKER_MQTT_USERNAME="?Platform=APN/1 ESPIF,RAINMAKER,v1.0"
+CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK=4096
+CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_PRIORITY=5
+CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME="fctry"
+CONFIG_ESP_RMAKER_FACTORY_NAMESPACE="rmaker_creds"
+CONFIG_ESP_RMAKER_DEF_TIMEZONE="Asia/Shanghai"
+CONFIG_ESP_RMAKER_SNTP_SERVER_NAME="pool.ntp.org"
+# end of ESP RainMaker Common
+
+#
+# WS2812 RGB LED
+#
+# CONFIG_WS2812_LED_ENABLE is not set
+# end of WS2812 RGB LED
+
 #
 # DSP Library
 #
@@ -1516,8 +1588,11 @@ CONFIG_OV5640_SUPPORT=y
 CONFIG_GC2145_SUPPORT=y
 CONFIG_GC032A_SUPPORT=y
 CONFIG_GC0308_SUPPORT=y
+CONFIG_BF3005_SUPPORT=y
+CONFIG_BF20A6_SUPPORT=y
 # CONFIG_SCCB_HARDWARE_I2C_PORT0 is not set
 CONFIG_SCCB_HARDWARE_I2C_PORT1=y
+CONFIG_SCCB_CLK_FREQ=100000
 # CONFIG_GC_SENSOR_WINDOWING_MODE is not set
 CONFIG_GC_SENSOR_SUBSAMPLE_MODE=y
 CONFIG_CAMERA_CORE0=y
@@ -1543,6 +1618,7 @@ CONFIG_LITTLEFS_USE_MTIME=y
 CONFIG_LITTLEFS_MTIME_USE_SECONDS=y
 # CONFIG_LITTLEFS_MTIME_USE_NONCE is not set
 # CONFIG_LITTLEFS_SPIFFS_COMPAT is not set
+# CONFIG_LITTLEFS_FLUSH_FILE_EVERY_WRITE is not set
 # end of LittleFS
 # end of Component config
 
@@ -1701,6 +1777,7 @@ CONFIG_TASK_WDT_PANIC=y
 CONFIG_TASK_WDT_TIMEOUT_S=5
 CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
 # CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 is not set
+# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set
 CONFIG_TIMER_TASK_STACK_SIZE=4096
 CONFIG_SW_COEXIST_ENABLE=y
 # CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
diff --git a/tools/sdk/esp32c3/bin/bootloader_dio_40m.bin b/tools/sdk/esp32c3/bin/bootloader_dio_40m.bin
index 43c0ae0dbe6..f665a4a4922 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_dio_40m.bin and b/tools/sdk/esp32c3/bin/bootloader_dio_40m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_dio_80m.bin b/tools/sdk/esp32c3/bin/bootloader_dio_80m.bin
index b45224a6717..c5a299b713d 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_dio_80m.bin and b/tools/sdk/esp32c3/bin/bootloader_dio_80m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_dout_40m.bin b/tools/sdk/esp32c3/bin/bootloader_dout_40m.bin
index 295483bda5e..5ee9c3c6a15 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_dout_40m.bin and b/tools/sdk/esp32c3/bin/bootloader_dout_40m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_dout_80m.bin b/tools/sdk/esp32c3/bin/bootloader_dout_80m.bin
index 0dc8cd77d92..17fc6893202 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_dout_80m.bin and b/tools/sdk/esp32c3/bin/bootloader_dout_80m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_qio_40m.bin b/tools/sdk/esp32c3/bin/bootloader_qio_40m.bin
index 68436175ca9..aa7d259ab22 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_qio_40m.bin and b/tools/sdk/esp32c3/bin/bootloader_qio_40m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_qio_80m.bin b/tools/sdk/esp32c3/bin/bootloader_qio_80m.bin
index f00c99359c6..68e44ed0ef8 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_qio_80m.bin and b/tools/sdk/esp32c3/bin/bootloader_qio_80m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin b/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin
index 2c937b5ebc9..497d795af1c 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin and b/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin b/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin
index de08fd6a52c..637df8c52c3 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin and b/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin differ
diff --git a/tools/sdk/esp32c3/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h b/tools/sdk/esp32c3/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h
index 73c8605e078..285cbb028cf 100644
--- a/tools/sdk/esp32c3/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h
+++ b/tools/sdk/esp32c3/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h
@@ -236,7 +236,7 @@ typedef enum {
 #define ESP_BT_GAP_MIN_INQ_LEN                (0x01)  /*!< Minimum inquiry duration, unit is 1.28s */
 #define ESP_BT_GAP_MAX_INQ_LEN                (0x30)  /*!< Maximum inquiry duration, unit is 1.28s */
 
-/// A2DP state callback parameters
+/// GAP state callback parameters
 typedef union {
     /**
      * @brief ESP_BT_GAP_DISC_RES_EVT
diff --git a/tools/sdk/esp32c3/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h b/tools/sdk/esp32c3/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h
index 3c5c05b178c..55569bc5c84 100644
--- a/tools/sdk/esp32c3/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h
+++ b/tools/sdk/esp32c3/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h
@@ -60,6 +60,9 @@ typedef enum {
 #define ESP_HF_CLIENT_PEER_FEAT_ECC        0x80        /* Enhanced Call Control */
 #define ESP_HF_CLIENT_PEER_FEAT_EXTERR    0x100        /* Extended error codes */
 #define ESP_HF_CLIENT_PEER_FEAT_CODEC     0x200        /* Codec Negotiation */
+/* HFP 1.7+ */
+#define ESP_HF_CLIENT_PEER_FEAT_HF_IND    0x400        /* HF Indicators */
+#define ESP_HF_CLIENT_PEER_FEAT_ESCO_S4   0x800        /* eSCO S4 Setting Supported */
 
 /* CHLD feature masks of AG */
 #define ESP_HF_CLIENT_CHLD_FEAT_REL           0x01       /* 0  Release waiting call or held calls */
diff --git a/tools/sdk/esp32c3/include/bt/include/esp32c3/include/esp_bt.h b/tools/sdk/esp32c3/include/bt/include/esp32c3/include/esp_bt.h
index 0e13ee90fa2..2c1af6580e4 100644
--- a/tools/sdk/esp32c3/include/bt/include/esp32c3/include/esp_bt.h
+++ b/tools/sdk/esp32c3/include/bt/include/esp32c3/include/esp_bt.h
@@ -18,7 +18,7 @@ extern "C" {
 #endif
 
 #define ESP_BT_CTRL_CONFIG_MAGIC_VAL    0x5A5AA5A5
-#define ESP_BT_CTRL_CONFIG_VERSION      0x02104270
+#define ESP_BT_CTRL_CONFIG_VERSION      0x02112280
 
 #define ESP_BT_HCI_TL_MAGIC_VALUE   0xfadebead
 #define ESP_BT_HCI_TL_VERSION       0x00010000
@@ -178,6 +178,7 @@ typedef void (* esp_bt_hci_tl_callback_t) (void *arg, uint8_t status);
     .hw_target_code = BLE_HW_TARGET_CODE_ESP32C3_CHIP_ECO0,                \
     .slave_ce_len_min = SLAVE_CE_LEN_MIN_DEFAULT,                          \
     .hw_recorrect_en = AGC_RECORRECT_EN,                                   \
+    .cca_thresh = CONFIG_BT_CTRL_HW_CCA_VAL,                               \
 };
 
 #else
@@ -244,6 +245,7 @@ typedef struct {
     uint32_t hw_target_code;                /*!< hardware target */
     uint8_t slave_ce_len_min;
     uint8_t hw_recorrect_en;
+    uint8_t cca_thresh;                     /*!< cca threshold*/
 } esp_bt_controller_config_t;
 
 /**
diff --git a/tools/sdk/esp32c3/include/button/button/include/iot_button.h b/tools/sdk/esp32c3/include/button/button/include/iot_button.h
new file mode 100644
index 00000000000..3e735133464
--- /dev/null
+++ b/tools/sdk/esp32c3/include/button/button/include/iot_button.h
@@ -0,0 +1,272 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _IOT_BUTTON_H_
+#define _IOT_BUTTON_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <driver/gpio.h>
+#include <freertos/FreeRTOS.h>
+#include <freertos/portmacro.h>
+typedef void (* button_cb)(void*);
+typedef void* button_handle_t;
+
+typedef enum {
+    BUTTON_ACTIVE_HIGH = 1,    /*!<button active level: high level*/
+    BUTTON_ACTIVE_LOW = 0,     /*!<button active level: low level*/
+} button_active_t;
+
+typedef enum {
+    BUTTON_CB_PUSH = 0,   /*!<button push callback event */
+    BUTTON_CB_RELEASE,    /*!<button release callback event */
+    BUTTON_CB_TAP,        /*!<button quick tap callback event(will not trigger if there already is a "PRESS" event) */
+    BUTTON_CB_SERIAL,     /*!<button serial trigger callback event */
+} button_cb_type_t;
+
+/**
+ * @brief Init button functions
+ *
+ * @param gpio_num GPIO index of the pin that the button uses
+ * @param active_level button hardware active level.
+ *        For "BUTTON_ACTIVE_LOW" it means when the button pressed, the GPIO will read low level.
+ *
+ * @return A button_handle_t handle to the created button object, or NULL in case of error.
+ */
+button_handle_t iot_button_create(gpio_num_t gpio_num, button_active_t active_level);
+
+/**
+ * @brief Register a callback function for a serial trigger event.
+ *
+ * @param btn_handle handle of the button object
+ * @param start_after_sec define the time after which to start serial trigger action
+ * @param interval_tick serial trigger interval
+ * @param cb callback function for "TAP" action.
+ * @param arg Parameter for callback function
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_set_serial_cb(button_handle_t btn_handle, uint32_t start_after_sec, TickType_t interval_tick, button_cb cb, void* arg);
+
+/**
+ * @brief Register a callback function for a button_cb_type_t action.
+ *
+ * @param btn_handle handle of the button object
+ * @param type callback function type
+ * @param cb callback function for "TAP" action.
+ * @param arg Parameter for callback function
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_set_evt_cb(button_handle_t btn_handle, button_cb_type_t type, button_cb cb, void* arg);
+
+/**
+ * @brief Callbacks invoked as timer events occur while button is pressed.
+ *        Example: If a button is configured for 2 sec, 5 sec and 7 sec callbacks and if the button is pressed for 6 sec then 2 sec callback would be invoked at 2 sec event and 5 sec callback would be invoked at 5 sec event
+ *
+ * @param btn_handle handle of the button object
+ * @param press_sec the callback function would be called if you press the button for a specified period of time
+ * @param cb callback function for "PRESS and HOLD" action.
+ * @param arg Parameter for callback function
+ *
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_add_on_press_cb(button_handle_t btn_handle, uint32_t press_sec, button_cb cb, void* arg);
+
+/**
+ * @brief Single callback invoked according to the latest timer event on button release. 
+ *        Example: If a button is configured for 2 sec, 5 sec and 7 sec callbacks and if the button is released at 6 sec then only 5 sec callback would be invoked
+ *
+ * @param btn_handle handle of the button object
+ * @param press_sec the callback function would be called if you press the button for a specified period of time
+ * @param cb callback function for "PRESS and RELEASE" action.
+ * @param arg Parameter for callback function
+ * 
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_add_on_release_cb(button_handle_t btn_handle, uint32_t press_sec, button_cb cb, void* arg);
+
+/**
+ * @brief Delete button object and free memory
+ * @param btn_handle handle of the button object
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_delete(button_handle_t btn_handle);
+
+/**
+ * @brief Remove callback
+ *
+ * @param btn_handle The handle of the button object
+ * @param type callback function event type
+ *
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t iot_button_rm_cb(button_handle_t btn_handle, button_cb_type_t type);
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifdef __cplusplus
+
+/**
+ * class of button
+ * simple usage:
+ * CButton* btn = new CButton(BUTTON_IO_NUM, BUTTON_ACTIVE_LEVEL, BUTTON_SERIAL_TRIGGER, 3);
+ * btn->add_cb(BUTTON_CB_PUSH, button_tap_cb, (void*) push, 50 / portTICK_PERIOD_MS);
+ * btn->add_custom_cb(5, button_press_5s_cb, NULL);
+ * ......
+ * delete btn;
+ */
+class CButton
+{
+private:
+    button_handle_t m_btn_handle;
+
+    /**
+     * prevent copy constructing
+     */
+    CButton(const CButton&);
+    CButton& operator = (const CButton&);
+public:
+
+    /**
+     * @brief constructor of CButton
+     * 
+     * @param gpio_num GPIO index of the pin that the button uses
+     * @param active_level button hardware active level.
+     *        For "BUTTON_ACTIVE_LOW" it means when the button pressed, the GPIO will read low level.
+     */
+    CButton(gpio_num_t gpio_num, button_active_t active_level = BUTTON_ACTIVE_LOW);
+    
+    ~CButton();
+
+    /**
+     * @brief Register a callback function for a button_cb_type_t action.
+     *
+     * @param type callback function type
+     * @param cb callback function for "TAP" action.
+     * @param arg Parameter for callback function
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t set_evt_cb(button_cb_type_t type, button_cb cb, void* arg);
+
+    /**
+     * @brief Register a callback function for a serial trigger event.
+     *
+     * @param btn_handle handle of the button object
+     * @param start_after_sec define the time after which to start serial trigger action
+     * @param interval_tick serial trigger interval
+     * @param cb callback function for "TAP" action.
+     * @param arg Parameter for callback function
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t set_serial_cb(button_cb cb, void* arg, TickType_t interval_tick, uint32_t start_after_sec);
+
+    /**
+     * @brief Callbacks invoked as timer events occur while button is pressed
+     *
+     * @param press_sec the callback function would be called if you press the button for a specified period of time
+     * @param cb callback function for "PRESS and HOLD" action.
+     * @param arg Parameter for callback function
+     *
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t add_on_press_cb(uint32_t press_sec, button_cb cb, void* arg);
+    
+    /**
+     * @brief Single callback invoked according to the latest timer event on button release.
+     *
+     * @param press_sec the callback function would be called if you press the button for a specified period of time
+     * @param cb callback function for "PRESS and RELEASE" action.
+     * @param arg Parameter for callback function
+     *
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t add_on_release_cb(uint32_t press_sec, button_cb cb, void* arg);
+    
+    /**
+     * @brief Remove callback
+     *
+     * @param type callback function event type
+     *
+     * @return
+     *     - ESP_OK Success
+     */
+    esp_err_t rm_cb(button_cb_type_t type);
+};
+#endif
+
+#endif
diff --git a/tools/sdk/esp32c3/include/driver/esp32c3/include/driver/adc.h b/tools/sdk/esp32c3/include/driver/esp32c3/include/driver/adc.h
deleted file mode 100644
index 7567c7b2a1d..00000000000
--- a/tools/sdk/esp32c3/include/driver/esp32c3/include/driver/adc.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-#include "driver/adc_common.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*---------------------------------------------------------------
-                    Common setting
----------------------------------------------------------------*/
-/*************************************/
-/* Digital controller filter setting */
-/*************************************/
-/**
- * @brief Reset adc digital controller filter.
- *
- * @param idx Filter index.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_filter_reset(adc_digi_filter_idx_t idx);
-
-/**
- * @brief Set adc digital controller filter configuration.
- *
- * @param idx Filter index.
- * @param config See ``adc_digi_filter_t``.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_filter_set_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
-
-/**
- * @brief Get adc digital controller filter configuration.
- *
- * @param idx Filter index.
- * @param config See ``adc_digi_filter_t``.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_filter_get_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
-
-/**
- * @brief Enable/disable adc digital controller filter.
- *        Filtering the ADC data to obtain smooth data at higher sampling rates.
- *
- * @param idx Filter index.
- * @param enable Enable/Disable filter.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_filter_enable(adc_digi_filter_idx_t idx, bool enable);
-
-/**************************************/
-/* Digital controller monitor setting */
-/**************************************/
-
-/**
- * @brief Config monitor of adc digital controller.
- *
- * @param idx Monitor index.
- * @param config See ``adc_digi_monitor_t``.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_monitor_set_config(adc_digi_monitor_idx_t idx, adc_digi_monitor_t *config);
-
-/**
- * @brief Enable/disable monitor of adc digital controller.
- *
- * @param idx Monitor index.
- * @param enable True or false enable monitor.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_monitor_enable(adc_digi_monitor_idx_t idx, bool enable);
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/adc.h b/tools/sdk/esp32c3/include/driver/include/driver/adc.h
new file mode 100644
index 00000000000..5cd19dacd7d
--- /dev/null
+++ b/tools/sdk/esp32c3/include/driver/include/driver/adc.h
@@ -0,0 +1,646 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "sdkconfig.h"
+#include "driver/gpio.h"
+#include "hal/adc_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO36 */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO37 */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO38 */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO39 */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO32 */
+    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO33 */
+    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO34 */
+    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO35 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO1  */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO2  */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO3  */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO4  */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO5  */
+    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO6  */
+    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO7  */
+    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO8  */
+    ADC1_CHANNEL_8,     /*!< ADC1 channel 8 is GPIO9  */
+    ADC1_CHANNEL_9,     /*!< ADC1 channel 9 is GPIO10 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO1 */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO2 */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO3 */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO4 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#endif // CONFIG_IDF_TARGET_*
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
+/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO4  (ESP32), GPIO11 (ESP32-S2) */
+    ADC2_CHANNEL_1,     /*!< ADC2 channel 1 is GPIO0  (ESP32), GPIO12 (ESP32-S2) */
+    ADC2_CHANNEL_2,     /*!< ADC2 channel 2 is GPIO2  (ESP32), GPIO13 (ESP32-S2) */
+    ADC2_CHANNEL_3,     /*!< ADC2 channel 3 is GPIO15 (ESP32), GPIO14 (ESP32-S2) */
+    ADC2_CHANNEL_4,     /*!< ADC2 channel 4 is GPIO13 (ESP32), GPIO15 (ESP32-S2) */
+    ADC2_CHANNEL_5,     /*!< ADC2 channel 5 is GPIO12 (ESP32), GPIO16 (ESP32-S2) */
+    ADC2_CHANNEL_6,     /*!< ADC2 channel 6 is GPIO14 (ESP32), GPIO17 (ESP32-S2) */
+    ADC2_CHANNEL_7,     /*!< ADC2 channel 7 is GPIO27 (ESP32), GPIO18 (ESP32-S2) */
+    ADC2_CHANNEL_8,     /*!< ADC2 channel 8 is GPIO25 (ESP32), GPIO19 (ESP32-S2) */
+    ADC2_CHANNEL_9,     /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */
+    ADC2_CHANNEL_MAX,
+} adc2_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */
+    ADC2_CHANNEL_MAX,
+} adc2_channel_t;
+#endif
+
+
+/**
+ * @brief ADC rtc controller attenuation option.
+ *
+ * @note  This definitions are only for being back-compatible
+ */
+#define ADC_ATTEN_0db   ADC_ATTEN_DB_0
+#define ADC_ATTEN_2_5db ADC_ATTEN_DB_2_5
+#define ADC_ATTEN_6db   ADC_ATTEN_DB_6
+#define ADC_ATTEN_11db  ADC_ATTEN_DB_11
+
+/**
+ * The default (max) bit width of the ADC of current version. You can also get the maximum bitwidth
+ * by `SOC_ADC_MAX_BITWIDTH` defined in soc_caps.h.
+ */
+#define ADC_WIDTH_BIT_DEFAULT   (ADC_WIDTH_MAX-1)
+
+//this definitions are only for being back-compatible
+#define ADC_WIDTH_9Bit  ADC_WIDTH_BIT_9
+#define ADC_WIDTH_10Bit ADC_WIDTH_BIT_10
+#define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
+#define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
+
+/**
+ * @brief ADC digital controller encode option.
+ *
+ * @deprecated The ESP32-S2 doesn't use I2S DMA. Call ``adc_digi_output_format_t`` instead.
+ */
+typedef enum {
+    ADC_ENCODE_12BIT,        /*!< ADC to DMA data format,          , [15:12]-channel [11:0]-12 bits ADC data */
+    ADC_ENCODE_11BIT,        /*!< ADC to DMA data format, [15]-unit, [14:11]-channel [10:0]-11 bits ADC data */
+    ADC_ENCODE_MAX,
+} adc_i2s_encode_t;
+
+/*---------------------------------------------------------------
+                    Common setting
+---------------------------------------------------------------*/
+
+/**
+ * @brief Enable ADC power
+ * @deprecated Use adc_power_acquire and adc_power_release instead.
+ */
+void adc_power_on(void) __attribute__((deprecated));
+
+/**
+ * @brief Power off SAR ADC
+ * @deprecated Use adc_power_acquire and adc_power_release instead.
+ * This function will force power down for ADC.
+ * This function is deprecated because forcing power ADC power off may
+ * disrupt operation of other components which may be using the ADC.
+ */
+void adc_power_off(void) __attribute__((deprecated));
+
+/**
+ * @brief Increment the usage counter for ADC module.
+ * ADC will stay powered on while the counter is greater than 0.
+ * Call adc_power_release when done using the ADC.
+ */
+void adc_power_acquire(void);
+
+/**
+ * @brief Decrement the usage counter for ADC module.
+ * ADC will stay powered on while the counter is greater than 0.
+ * Call this function when done using the ADC.
+ */
+void adc_power_release(void);
+
+/*---------------------------------------------------------------
+                    ADC Single Read Setting
+---------------------------------------------------------------*/
+/**
+ * @brief Get the GPIO number of a specific ADC1 channel.
+ *
+ * @param channel Channel to get the GPIO number
+ * @param gpio_num output buffer to hold the GPIO number
+ *
+ * @return
+ *   - ESP_OK if success
+ *   - ESP_ERR_INVALID_ARG if channel not valid
+ */
+esp_err_t adc1_pad_get_io_num(adc1_channel_t channel, gpio_num_t *gpio_num);
+
+/**
+ * @brief Set the attenuation of a particular channel on ADC1, and configure its associated GPIO pin mux.
+ *
+ * The default ADC voltage is for attenuation 0 dB and listed in the table below.
+ * By setting higher attenuation it is possible to read higher voltages.
+ *
+ * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
+ * shown in the following table.
+ *
+ *     +----------+-------------+-----------------+
+ *     |          | attenuation | suggested range |
+ *     |    SoC   |     (dB)    |      (mV)       |
+ *     +==========+=============+=================+
+ *     |          |       0     |    100 ~  950   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |    100 ~ 1250   |
+ *     |   ESP32  +-------------+-----------------+
+ *     |          |       6     |    150 ~ 1750   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |    150 ~ 2450   |
+ *     +----------+-------------+-----------------+
+ *     |          |       0     |      0 ~  750   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |      0 ~ 1050   |
+ *     | ESP32-S2 +-------------+-----------------+
+ *     |          |       6     |      0 ~ 1300   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |      0 ~ 2500   |
+ *     +----------+-------------+-----------------+
+ *
+ * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
+ *
+ * @note For any given channel, this function must be called before the first time ``adc1_get_raw()`` is called for that channel.
+ *
+ * @note This function can be called multiple times to configure multiple
+ *       ADC channels simultaneously. You may call ``adc1_get_raw()`` only after configuring a channel.
+ *
+ * @param channel ADC1 channel to configure
+ * @param atten  Attenuation level
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc1_config_channel_atten(adc1_channel_t channel, adc_atten_t atten);
+
+/**
+ * @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1.
+ *        The configuration is for all channels of ADC1
+ * @param width_bit Bit capture width for ADC1
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc1_config_width(adc_bits_width_t width_bit);
+
+/**
+ * @brief Take an ADC1 reading from a single channel.
+ * @note ESP32:
+ *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
+ *       but will remove the glitches on GPIO36 and GPIO39.
+ *
+ * @note Call ``adc1_config_width()`` before the first time this
+ *       function is called.
+ *
+ * @note For any given channel, adc1_config_channel_atten(channel)
+ *       must be called before the first time this function is called. Configuring
+ *       a new channel does not prevent a previously configured channel from being read.
+ *
+ * @param  channel ADC1 channel to read
+ *
+ * @return
+ *     - -1: Parameter error
+ *     -  Other: ADC1 channel reading.
+ */
+int adc1_get_raw(adc1_channel_t channel);
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+//TODO IDF-3610, replace these with proper caps
+/**
+ * @brief Set ADC data invert
+ * @param adc_unit ADC unit index
+ * @param inv_en whether enable data invert
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_set_data_inv(adc_unit_t adc_unit, bool inv_en);
+
+/**
+ * @brief Set ADC source clock
+ * @param clk_div ADC clock divider, ADC clock is divided from APB clock
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t adc_set_clk_div(uint8_t clk_div);
+
+/**
+ * @brief Configure ADC capture width.
+ *
+ * @param adc_unit ADC unit index
+ * @param width_bit Bit capture width for ADC unit.
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
+
+/**
+ * @brief Configure ADC1 to be usable by the ULP
+ *
+ * This function reconfigures ADC1 to be controlled by the ULP.
+ * Effect of this function can be reverted using ``adc1_get_raw()`` function.
+ *
+ * Note that adc1_config_channel_atten, ``adc1_config_width()`` functions need
+ * to be called to configure ADC1 channels, before ADC1 is used by the ULP.
+ */
+void adc1_ulp_enable(void);
+#endif  //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+
+/**
+ * @brief Get the GPIO number of a specific ADC2 channel.
+ *
+ * @param channel Channel to get the GPIO number
+ *
+ * @param gpio_num output buffer to hold the GPIO number
+ *
+ * @return
+ *   - ESP_OK if success
+ *   - ESP_ERR_INVALID_ARG if channel not valid
+ */
+esp_err_t adc2_pad_get_io_num(adc2_channel_t channel, gpio_num_t *gpio_num);
+
+/**
+ * @brief Configure the ADC2 channel, including setting attenuation.
+ *
+ * The default ADC voltage is for attenuation 0 dB and listed in the table below.
+ * By setting higher attenuation it is possible to read higher voltages.
+ *
+ * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
+ * shown in the following table.
+ *
+ *     +----------+-------------+-----------------+
+ *     |          | attenuation | suggested range |
+ *     |    SoC   |     (dB)    |      (mV)       |
+ *     +==========+=============+=================+
+ *     |          |       0     |    100 ~  950   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |    100 ~ 1250   |
+ *     |   ESP32  +-------------+-----------------+
+ *     |          |       6     |    150 ~ 1750   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |    150 ~ 2450   |
+ *     +----------+-------------+-----------------+
+ *     |          |       0     |      0 ~  750   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |      0 ~ 1050   |
+ *     | ESP32-S2 +-------------+-----------------+
+ *     |          |       6     |      0 ~ 1300   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |      0 ~ 2500   |
+ *     +----------+-------------+-----------------+
+ *
+ * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
+ *
+ * @note This function also configures the input GPIO pin mux to
+ *       connect it to the ADC2 channel. It must be called before calling
+ *       ``adc2_get_raw()`` for this channel.
+ *
+ * @note For any given channel, this function must be called before the first time ``adc2_get_raw()`` is called for that channel.
+ *
+ * @param channel ADC2 channel to configure
+ * @param atten  Attenuation level
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten);
+
+/**
+ * @brief Take an ADC2 reading on a single channel
+ *
+ * @note ESP32:
+ *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
+ *       but will remove the glitches on GPIO36 and GPIO39.
+ *
+ *
+ * @note ESP32:
+ *       For a given channel, ``adc2_config_channel_atten()``
+ *       must be called before the first time this function is called. If Wi-Fi is started via ``esp_wifi_start()``, this
+ *       function will always fail with ``ESP_ERR_TIMEOUT``.
+ *
+ * @note ESP32-S2:
+ *       ADC2 support hardware arbiter. The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
+ *       the low priority controller will read the invalid ADC2 data. Default priority: Wi-Fi > RTC > Digital;
+ *
+ * @param channel ADC2 channel to read
+ * @param width_bit Bit capture width for ADC2
+ * @param raw_out the variable to hold the output data.
+ *
+ * @return
+ *     - ESP_OK if success
+ *     - ESP_ERR_TIMEOUT ADC2 is being used by other controller and the request timed out.
+ *     - ESP_ERR_INVALID_STATE The controller status is invalid. Please try again.
+ */
+esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *raw_out);
+
+/**
+ *  @brief Output ADC1 or ADC2's reference voltage to ``adc2_channe_t``'s IO.
+ *
+ *  This function routes the internal reference voltage of ADCn to one of
+ *  ADC2's channels. This reference voltage can then be manually measured
+ *  for calibration purposes.
+ *
+ *  @note  ESP32 only supports output of ADC2's internal reference voltage.
+ *  @param[in]  adc_unit ADC unit index
+ *  @param[in]  gpio     GPIO number (Only ADC2's channels IO are supported)
+ *
+ *  @return
+ *                  - ESP_OK: v_ref successfully routed to selected GPIO
+ *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
+ */
+esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio);
+
+/**
+ *  @brief Output ADC2 reference voltage to ``adc2_channe_t``'s IO.
+ *
+ *  This function routes the internal reference voltage of ADCn to one of
+ *  ADC2's channels. This reference voltage can then be manually measured
+ *  for calibration purposes.
+ *
+ *  @deprecated Use ``adc_vref_to_gpio`` instead.
+ *
+ *  @param[in]  gpio    GPIO number (ADC2's channels are supported)
+ *
+ *  @return
+ *                  - ESP_OK: v_ref successfully routed to selected GPIO
+ *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
+ */
+esp_err_t adc2_vref_to_gpio(gpio_num_t gpio) __attribute__((deprecated));
+
+/*---------------------------------------------------------------
+                    DMA setting
+---------------------------------------------------------------*/
+/**
+ * @brief Digital ADC DMA read max timeout value, it may make the ``adc_digi_read_bytes`` block forever if the OS supports
+ */
+#define ADC_MAX_DELAY UINT32_MAX
+
+/**
+ * @brief ADC DMA driver configuration
+ */
+typedef struct adc_digi_init_config_s {
+    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed.
+    uint32_t conv_num_each_intr;    ///< Bytes of data that can be converted in 1 interrupt.
+    uint32_t adc1_chan_mask;        ///< Channel list of ADC1 to be initialized.
+    uint32_t adc2_chan_mask;        ///< Channel list of ADC2 to be initialized.
+} adc_digi_init_config_t;
+
+/**
+ * @brief ADC digital controller settings
+ */
+typedef struct {
+    bool conv_limit_en;                      ///< To limit ADC conversion times. Conversion stops after finishing `conv_limit_num` times conversion
+    uint32_t conv_limit_num;                 ///< Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255.
+    uint32_t pattern_num;                    ///< Number of ADC channels that will be used
+    adc_digi_pattern_config_t *adc_pattern;    ///< List of configs for each ADC channel that will be used
+    uint32_t sample_freq_hz;  /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
+                                   Fs = Fd / interval / 2
+                                   Fs: sampling frequency;
+                                   Fd: digital controller frequency, no larger than 5M for better performance
+                                   interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
+    adc_digi_convert_mode_t conv_mode;      ///< ADC DMA conversion mode, see `adc_digi_convert_mode_t`.
+    adc_digi_output_format_t format;        ///< ADC DMA conversion output format, see `adc_digi_output_format_t`.
+} adc_digi_configuration_t;
+
+/**
+ * @brief Initialize the Digital ADC.
+ *
+ * @param init_config Pointer to Digital ADC initilization config. Refer to ``adc_digi_init_config_t``.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *         - ESP_ERR_NOT_FOUND     No free interrupt found with the specified flags
+ *         - ESP_ERR_NO_MEM        If out of memory
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config);
+
+/**
+ * @brief Read bytes from Digital ADC through DMA.
+ *
+ * @param[out] buf                 Buffer to read from ADC.
+ * @param[in]  length_max          Expected length of data read from the ADC.
+ * @param[out] out_length          Real length of data read from the ADC via this API.
+ * @param[in]  timeout_ms          Time to wait for data via this API, in millisecond.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid. Usually it means the ADC sampling rate is faster than the task processing rate.
+ *         - ESP_ERR_TIMEOUT       Operation timed out
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_read_bytes(uint8_t *buf, uint32_t length_max, uint32_t *out_length, uint32_t timeout_ms);
+
+/**
+ * @brief Start the Digital ADC and DMA peripherals. After this, the hardware starts working.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_start(void);
+
+/**
+ * @brief Stop the Digital ADC and DMA peripherals. After this, the hardware stops working.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_stop(void);
+
+/**
+ * @brief Deinitialize the Digital ADC.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_deinitialize(void);
+
+/**
+ * @brief Setting the digital controller.
+ *
+ * @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
+ *
+ * @return
+ *      - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *      - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *      - ESP_OK                On success
+ */
+esp_err_t adc_digi_controller_configure(const adc_digi_configuration_t *config);
+
+
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+//TODO IDF-3610
+/**
+ * @brief Reset adc digital controller filter.
+ *
+ * @param idx Filter index.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_reset(adc_digi_filter_idx_t idx);
+
+/**
+ * @brief Set adc digital controller filter configuration.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param config See ``adc_digi_filter_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_set_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
+
+/**
+ * @brief Get adc digital controller filter configuration.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param config See ``adc_digi_filter_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_get_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
+
+/**
+ * @brief Enable/disable adc digital controller filter.
+ *        Filtering the ADC data to obtain smooth data at higher sampling rates.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param enable Enable/Disable filter.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_enable(adc_digi_filter_idx_t idx, bool enable);
+
+/**
+ * @brief Config monitor of adc digital controller.
+ *
+ * @note For ESP32S2, The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
+ *
+ * @param idx Monitor index.
+ * @param config See ``adc_digi_monitor_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_monitor_set_config(adc_digi_monitor_idx_t idx, adc_digi_monitor_t *config);
+
+/**
+ * @brief Enable/disable monitor of adc digital controller.
+ *
+ * @note For ESP32S2, The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
+ *
+ * @param idx Monitor index.
+ * @param enable True or false enable monitor.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_monitor_enable(adc_digi_monitor_idx_t idx, bool enable);
+#endif  //#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+
+#if CONFIG_IDF_TARGET_ESP32
+//TODO IDF-3610
+/**
+ * @brief Read Hall Sensor
+ *
+ * @note When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *
+ * @note The Hall Sensor uses channels 0 and 3 of ADC1. Do not configure
+ * these channels for use as ADC channels.
+ *
+ * @note The ADC1 module must be enabled by calling
+ *       adc1_config_width() before calling hall_sensor_read(). ADC1
+ *       should be configured for 12 bit readings, as the hall sensor
+ *       readings are low values and do not cover the full range of the
+ *       ADC.
+ *
+ * @return The hall sensor reading.
+ */
+int hall_sensor_read(void);
+
+/*---------------------------------------------------------------
+                    To Be Deprecated TODO: IDF-3610
+---------------------------------------------------------------*/
+/**
+ * @brief Set I2S data source
+ * @param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC.
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src);
+
+/**
+ * @brief Initialize I2S ADC mode
+ * @param adc_unit ADC unit index
+ * @param channel ADC channel index
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/adc_common.h b/tools/sdk/esp32c3/include/driver/include/driver/adc_common.h
index 392eb8a15dc..e081f28d154 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/adc_common.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/adc_common.h
@@ -1,544 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#pragma once
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "esp_err.h"
-#include "sdkconfig.h"
-#include "driver/gpio.h"
-#include "hal/adc_types.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if CONFIG_IDF_TARGET_ESP32
-/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO36 */
-    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO37 */
-    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO38 */
-    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO39 */
-    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO32 */
-    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO33 */
-    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO34 */
-    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO35 */
-    ADC1_CHANNEL_MAX,
-} adc1_channel_t;
-#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
-/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO1  */
-    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO2  */
-    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO3  */
-    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO4  */
-    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO5  */
-    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO6  */
-    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO7  */
-    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO8  */
-    ADC1_CHANNEL_8,     /*!< ADC1 channel 8 is GPIO9  */
-    ADC1_CHANNEL_9,     /*!< ADC1 channel 9 is GPIO10 */
-    ADC1_CHANNEL_MAX,
-} adc1_channel_t;
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */
-    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO1 */
-    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO2 */
-    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO3 */
-    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO4 */
-    ADC1_CHANNEL_MAX,
-} adc1_channel_t;
-#endif // CONFIG_IDF_TARGET_*
-
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
-/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO4  (ESP32), GPIO11 (ESP32-S2) */
-    ADC2_CHANNEL_1,     /*!< ADC2 channel 1 is GPIO0  (ESP32), GPIO12 (ESP32-S2) */
-    ADC2_CHANNEL_2,     /*!< ADC2 channel 2 is GPIO2  (ESP32), GPIO13 (ESP32-S2) */
-    ADC2_CHANNEL_3,     /*!< ADC2 channel 3 is GPIO15 (ESP32), GPIO14 (ESP32-S2) */
-    ADC2_CHANNEL_4,     /*!< ADC2 channel 4 is GPIO13 (ESP32), GPIO15 (ESP32-S2) */
-    ADC2_CHANNEL_5,     /*!< ADC2 channel 5 is GPIO12 (ESP32), GPIO16 (ESP32-S2) */
-    ADC2_CHANNEL_6,     /*!< ADC2 channel 6 is GPIO14 (ESP32), GPIO17 (ESP32-S2) */
-    ADC2_CHANNEL_7,     /*!< ADC2 channel 7 is GPIO27 (ESP32), GPIO18 (ESP32-S2) */
-    ADC2_CHANNEL_8,     /*!< ADC2 channel 8 is GPIO25 (ESP32), GPIO19 (ESP32-S2) */
-    ADC2_CHANNEL_9,     /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */
-    ADC2_CHANNEL_MAX,
-} adc2_channel_t;
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */
-    ADC2_CHANNEL_MAX,
-} adc2_channel_t;
-#endif
-
-
-/**
- * @brief ADC rtc controller attenuation option.
- *
- * @note  This definitions are only for being back-compatible
- */
-#define ADC_ATTEN_0db   ADC_ATTEN_DB_0
-#define ADC_ATTEN_2_5db ADC_ATTEN_DB_2_5
-#define ADC_ATTEN_6db   ADC_ATTEN_DB_6
-#define ADC_ATTEN_11db  ADC_ATTEN_DB_11
-
 /**
- * The default (max) bit width of the ADC of current version. You can also get the maximum bitwidth
- * by `SOC_ADC_MAX_BITWIDTH` defined in soc_caps.h.
+ * This file is only a wrapper for `driver/adc.h` for back-compatability.
  */
-#define ADC_WIDTH_BIT_DEFAULT   (ADC_WIDTH_MAX-1)
-
-//this definitions are only for being back-compatible
-#define ADC_WIDTH_9Bit  ADC_WIDTH_BIT_9
-#define ADC_WIDTH_10Bit ADC_WIDTH_BIT_10
-#define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
-#define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
-
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-/**
- * @brief Digital ADC DMA read max timeout value, it may make the ``adc_digi_read_bytes`` block forever if the OS supports
- */
-#define ADC_MAX_DELAY UINT32_MAX
-#endif
-
-/**
- * @brief ADC digital controller encode option.
- *
- * @deprecated The ESP32-S2 doesn't use I2S DMA. Call ``adc_digi_output_format_t`` instead.
- */
-typedef enum {
-    ADC_ENCODE_12BIT,        /*!< ADC to DMA data format,          , [15:12]-channel [11:0]-12 bits ADC data */
-    ADC_ENCODE_11BIT,        /*!< ADC to DMA data format, [15]-unit, [14:11]-channel [10:0]-11 bits ADC data */
-    ADC_ENCODE_MAX,
-} adc_i2s_encode_t;
-
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-//This feature is currently supported on ESP32C3, will be supported on other chips soon
-/**
- * @brief Digital ADC DMA configuration
- */
-typedef struct adc_digi_init_config_s {
-    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed.
-    uint32_t conv_num_each_intr;    ///< Bytes of data that can be converted in 1 interrupt.
-    uint32_t adc1_chan_mask;        ///< Channel list of ADC1 to be initialized.
-    uint32_t adc2_chan_mask;        ///< Channel list of ADC2 to be initialized.
-} adc_digi_init_config_t;
-#endif
-
-/*---------------------------------------------------------------
-                    Common setting
----------------------------------------------------------------*/
-
-/**
- * @brief Enable ADC power
- * @deprecated Use adc_power_acquire and adc_power_release instead.
- */
-void adc_power_on(void) __attribute__((deprecated));
-
-/**
- * @brief Power off SAR ADC
- * @deprecated Use adc_power_acquire and adc_power_release instead.
- * This function will force power down for ADC.
- * This function is deprecated because forcing power ADC power off may
- * disrupt operation of other components which may be using the ADC.
- */
-void adc_power_off(void) __attribute__((deprecated));
-
-/**
- * @brief Increment the usage counter for ADC module.
- * ADC will stay powered on while the counter is greater than 0.
- * Call adc_power_release when done using the ADC.
- */
-void adc_power_acquire(void);
-
-/**
- * @brief Decrement the usage counter for ADC module.
- * ADC will stay powered on while the counter is greater than 0.
- * Call this function when done using the ADC.
- */
-void adc_power_release(void);
-
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * @brief Initialize ADC pad
- * @param adc_unit ADC unit index
- * @param channel ADC channel index
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel);
-#endif //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
-/*---------------------------------------------------------------
-                    ADC Single Read Setting
----------------------------------------------------------------*/
-/**
- * @brief Get the GPIO number of a specific ADC1 channel.
- *
- * @param channel Channel to get the GPIO number
- * @param gpio_num output buffer to hold the GPIO number
- *
- * @return
- *   - ESP_OK if success
- *   - ESP_ERR_INVALID_ARG if channel not valid
- */
-esp_err_t adc1_pad_get_io_num(adc1_channel_t channel, gpio_num_t *gpio_num);
-
-/**
- * @brief Set the attenuation of a particular channel on ADC1, and configure its associated GPIO pin mux.
- *
- * The default ADC voltage is for attenuation 0 dB and listed in the table below.
- * By setting higher attenuation it is possible to read higher voltages.
- *
- * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
- * shown in the following table.
- *
- *     +----------+-------------+-----------------+
- *     |          | attenuation | suggested range |
- *     |    SoC   |     (dB)    |      (mV)       |
- *     +==========+=============+=================+
- *     |          |       0     |    100 ~  950   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |    100 ~ 1250   |
- *     |   ESP32  +-------------+-----------------+
- *     |          |       6     |    150 ~ 1750   |
- *     |          +-------------+-----------------+
- *     |          |      11     |    150 ~ 2450   |
- *     +----------+-------------+-----------------+
- *     |          |       0     |      0 ~  750   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |      0 ~ 1050   |
- *     | ESP32-S2 +-------------+-----------------+
- *     |          |       6     |      0 ~ 1300   |
- *     |          +-------------+-----------------+
- *     |          |      11     |      0 ~ 2500   |
- *     +----------+-------------+-----------------+
- *
- * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
- *
- * @note For any given channel, this function must be called before the first time ``adc1_get_raw()`` is called for that channel.
- *
- * @note This function can be called multiple times to configure multiple
- *       ADC channels simultaneously. You may call ``adc1_get_raw()`` only after configuring a channel.
- *
- * @param channel ADC1 channel to configure
- * @param atten  Attenuation level
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc1_config_channel_atten(adc1_channel_t channel, adc_atten_t atten);
-
-/**
- * @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1.
- *        The configuration is for all channels of ADC1
- * @param width_bit Bit capture width for ADC1
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc1_config_width(adc_bits_width_t width_bit);
-
-/**
- * @brief Take an ADC1 reading from a single channel.
- * @note ESP32:
- *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
- *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
- *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
- *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
- *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
- *       but will remove the glitches on GPIO36 and GPIO39.
- *
- * @note Call ``adc1_config_width()`` before the first time this
- *       function is called.
- *
- * @note For any given channel, adc1_config_channel_atten(channel)
- *       must be called before the first time this function is called. Configuring
- *       a new channel does not prevent a previously configured channel from being read.
- *
- * @param  channel ADC1 channel to read
- *
- * @return
- *     - -1: Parameter error
- *     -  Other: ADC1 channel reading.
- */
-int adc1_get_raw(adc1_channel_t channel);
-
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * @brief Set ADC data invert
- * @param adc_unit ADC unit index
- * @param inv_en whether enable data invert
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_set_data_inv(adc_unit_t adc_unit, bool inv_en);
-
-/**
- * @brief Set ADC source clock
- * @param clk_div ADC clock divider, ADC clock is divided from APB clock
- * @return
- *     - ESP_OK success
- */
-esp_err_t adc_set_clk_div(uint8_t clk_div);
-
-/**
- * @brief Configure ADC capture width.
- *
- * @param adc_unit ADC unit index
- * @param width_bit Bit capture width for ADC unit.
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
-
-/**
- * @brief Configure ADC1 to be usable by the ULP
- *
- * This function reconfigures ADC1 to be controlled by the ULP.
- * Effect of this function can be reverted using ``adc1_get_raw()`` function.
- *
- * Note that adc1_config_channel_atten, ``adc1_config_width()`` functions need
- * to be called to configure ADC1 channels, before ADC1 is used by the ULP.
- */
-void adc1_ulp_enable(void);
-#endif  //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
-/**
- * @brief Get the GPIO number of a specific ADC2 channel.
- *
- * @param channel Channel to get the GPIO number
- *
- * @param gpio_num output buffer to hold the GPIO number
- *
- * @return
- *   - ESP_OK if success
- *   - ESP_ERR_INVALID_ARG if channel not valid
- */
-esp_err_t adc2_pad_get_io_num(adc2_channel_t channel, gpio_num_t *gpio_num);
-
-/**
- * @brief Configure the ADC2 channel, including setting attenuation.
- *
- * The default ADC voltage is for attenuation 0 dB and listed in the table below.
- * By setting higher attenuation it is possible to read higher voltages.
- *
- * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
- * shown in the following table.
- *
- *     +----------+-------------+-----------------+
- *     |          | attenuation | suggested range |
- *     |    SoC   |     (dB)    |      (mV)       |
- *     +==========+=============+=================+
- *     |          |       0     |    100 ~  950   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |    100 ~ 1250   |
- *     |   ESP32  +-------------+-----------------+
- *     |          |       6     |    150 ~ 1750   |
- *     |          +-------------+-----------------+
- *     |          |      11     |    150 ~ 2450   |
- *     +----------+-------------+-----------------+
- *     |          |       0     |      0 ~  750   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |      0 ~ 1050   |
- *     | ESP32-S2 +-------------+-----------------+
- *     |          |       6     |      0 ~ 1300   |
- *     |          +-------------+-----------------+
- *     |          |      11     |      0 ~ 2500   |
- *     +----------+-------------+-----------------+
- *
- * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
- *
- * @note This function also configures the input GPIO pin mux to
- *       connect it to the ADC2 channel. It must be called before calling
- *       ``adc2_get_raw()`` for this channel.
- *
- * @note For any given channel, this function must be called before the first time ``adc2_get_raw()`` is called for that channel.
- *
- * @param channel ADC2 channel to configure
- * @param atten  Attenuation level
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten);
-
-/**
- * @brief Take an ADC2 reading on a single channel
- *
- * @note ESP32:
- *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
- *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
- *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
- *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
- *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
- *       but will remove the glitches on GPIO36 and GPIO39.
- *
- *
- * @note ESP32:
- *       For a given channel, ``adc2_config_channel_atten()``
- *       must be called before the first time this function is called. If Wi-Fi is started via ``esp_wifi_start()``, this
- *       function will always fail with ``ESP_ERR_TIMEOUT``.
- *
- * @note ESP32-S2:
- *       ADC2 support hardware arbiter. The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
- *       the low priority controller will read the invalid ADC2 data. Default priority: Wi-Fi > RTC > Digital;
- *
- * @param channel ADC2 channel to read
- * @param width_bit Bit capture width for ADC2
- * @param raw_out the variable to hold the output data.
- *
- * @return
- *     - ESP_OK if success
- *     - ESP_ERR_TIMEOUT ADC2 is being used by other controller and the request timed out.
- *     - ESP_ERR_INVALID_STATE The controller status is invalid. Please try again.
- */
-esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *raw_out);
-
-/**
- *  @brief Output ADC1 or ADC2's reference voltage to ``adc2_channe_t``'s IO.
- *
- *  This function routes the internal reference voltage of ADCn to one of
- *  ADC2's channels. This reference voltage can then be manually measured
- *  for calibration purposes.
- *
- *  @note  ESP32 only supports output of ADC2's internal reference voltage.
- *  @param[in]  adc_unit ADC unit index
- *  @param[in]  gpio     GPIO number (Only ADC2's channels IO are supported)
- *
- *  @return
- *                  - ESP_OK: v_ref successfully routed to selected GPIO
- *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
- */
-esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio);
-
-/**
- *  @brief Output ADC2 reference voltage to ``adc2_channe_t``'s IO.
- *
- *  This function routes the internal reference voltage of ADCn to one of
- *  ADC2's channels. This reference voltage can then be manually measured
- *  for calibration purposes.
- *
- *  @deprecated Use ``adc_vref_to_gpio`` instead.
- *
- *  @param[in]  gpio    GPIO number (ADC2's channels are supported)
- *
- *  @return
- *                  - ESP_OK: v_ref successfully routed to selected GPIO
- *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
- */
-esp_err_t adc2_vref_to_gpio(gpio_num_t gpio) __attribute__((deprecated));
-
-/*---------------------------------------------------------------
-                    Digital controller setting
----------------------------------------------------------------*/
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
-//These APIs are only supported on ESP32 and ESP32-S2. On ESP32-C3 and later chips, please use ``adc_digi_initialize`` and ``adc_digi_deinitialize``
-/**
- * @brief ADC digital controller initialization.
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_init(void);
-
-/**
- * @brief ADC digital controller deinitialization.
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_deinit(void);
-#endif
-
-/**
- * @brief Setting the digital controller.
- *
- * @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
- *
- * @return
- *      - ESP_ERR_INVALID_STATE Driver state is invalid.
- *      - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
- *      - ESP_OK                On success
- */
-esp_err_t adc_digi_controller_config(const adc_digi_config_t *config);
-
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-//This feature is currently supported on ESP32C3, will be supported on other chips soon
-/*---------------------------------------------------------------
-                    DMA setting
----------------------------------------------------------------*/
-/**
- * @brief Initialize the Digital ADC.
- *
- * @param init_config Pointer to Digital ADC initilization config. Refer to ``adc_digi_init_config_t``.
- *
- * @return
- *         - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
- *         - ESP_ERR_NOT_FOUND     No free interrupt found with the specified flags
- *         - ESP_ERR_NO_MEM        If out of memory
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config);
-
-/**
- * @brief Start the Digital ADC and DMA peripherals. After this, the hardware starts working.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid.
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_start(void);
-
-/**
- * @brief Stop the Digital ADC and DMA peripherals. After this, the hardware stops working.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid.
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_stop(void);
-
-/**
- * @brief Read bytes from Digital ADC through DMA.
- *
- * @param[out] buf                 Buffer to read from ADC.
- * @param[in]  length_max          Expected length of data read from the ADC.
- * @param[out] out_length          Real length of data read from the ADC via this API.
- * @param[in]  timeout_ms          Time to wait for data via this API, in millisecond.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid. Usually it means the ADC sampling rate is faster than the task processing rate.
- *         - ESP_ERR_TIMEOUT       Operation timed out
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_read_bytes(uint8_t *buf, uint32_t length_max, uint32_t *out_length, uint32_t timeout_ms);
-
-/**
- * @brief Deinitialize the Digital ADC.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid.
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_deinitialize(void);
-
-#endif //#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
 
-#ifdef __cplusplus
-}
-#endif
+#include "adc.h"
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/adc_deprecated.h b/tools/sdk/esp32c3/include/driver/include/driver/adc_deprecated.h
new file mode 100644
index 00000000000..bdd0547c06a
--- /dev/null
+++ b/tools/sdk/esp32c3/include/driver/include/driver/adc_deprecated.h
@@ -0,0 +1,163 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*----------------------------------------------------------------------------------
+              This file contains Deprecated ADC APIs
+-----------------------------------------------------------------------------------*/
+
+#pragma once
+#include "esp_err.h"
+#include "hal/adc_types.h"
+#include "driver/adc_types_deprecated.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#if CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+                    ESP32S2 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief Config ADC module arbiter.
+ *        The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
+ *        the low priority controller will read the invalid ADC2 data, and the validity of the data can be judged by the flag bit in the data.
+ *
+ * @note Only ADC2 support arbiter.
+ * @note Default priority: Wi-Fi > RTC > Digital;
+ * @note In normal use, there is no need to call this interface to config arbiter.
+ *
+ * @param adc_unit ADC unit.
+ * @param config Refer to `adc_arbiter_t`.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - ESP_ERR_NOT_SUPPORTED ADC unit not support arbiter.
+ */
+esp_err_t adc_arbiter_config(adc_unit_t adc_unit, adc_arbiter_t *config) __attribute__((deprecated));
+
+/**
+ * @brief Enable interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_enable(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Disable interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_disable(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Clear interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_clear(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Get interrupt status mask of adc digital controller.
+ *
+ * @param adc_unit ADC unit.
+ * @return
+ *     - intr Interrupt bitmask, See ``adc_digi_intr_t``.
+ */
+uint32_t adc_digi_intr_get_status(adc_unit_t adc_unit) __attribute__((deprecated));
+
+/**
+ * @brief Register ADC interrupt handler, the handler is an ISR.
+ *        The handler will be attached to the same CPU core that this function is running on.
+ *
+ * @param fn Interrupt handler function.
+ * @param arg Parameter for handler function
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_NOT_FOUND Can not find the interrupt that matches the flags.
+ *     - ESP_ERR_INVALID_ARG Function pointer error.
+ */
+esp_err_t adc_digi_isr_register(void (*fn)(void *), void *arg, int intr_alloc_flags) __attribute__((deprecated));
+
+/**
+ * @brief Deregister ADC interrupt handler, the handler is an ISR.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG hander error.
+ *     - ESP_FAIL ISR not be registered.
+ */
+esp_err_t adc_digi_isr_deregister(void) __attribute__((deprecated));
+#endif  // #if CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+            ESP32, ESP32S2 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller initialization.
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_init(void) __attribute__((deprecated));
+
+/**
+ * @brief ADC digital controller deinitialization.
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_deinit(void) __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+/*---------------------------------------------------------------
+            ESP32, ESP32S2, ESP32C3 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief Setting the digital controller.
+ *
+ * @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
+ *
+ * @return
+ *      - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *      - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *      - ESP_OK                On success
+ */
+esp_err_t adc_digi_controller_config(const adc_digi_config_t *config) __attribute__((deprecated));
+
+/**
+ * @brief Initialize ADC pad
+ * @param adc_unit ADC unit index
+ * @param channel ADC channel index
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel) __attribute__((deprecated));;
+#endif //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/adc_types_deprecated.h b/tools/sdk/esp32c3/include/driver/include/driver/adc_types_deprecated.h
new file mode 100644
index 00000000000..5d0e0dc2327
--- /dev/null
+++ b/tools/sdk/esp32c3/include/driver/include/driver/adc_types_deprecated.h
@@ -0,0 +1,203 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_err.h"
+#include "hal/adc_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+/*---------------------------------------------------------------
+                    ESP32 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t bit_width: 2;   /*!< ADC resolution.
+-                                         0: 9 bit;
+-                                         1: 10 bit;
+-                                         2: 11 bit;
+-                                         3: 12 bit. */
+            int8_t channel:   4;   /*!< ADC channel index. */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+/**
+  * Explanation of the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA outputs:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     +---------------------+--------+--------+--------+
+  *     | trigger meas times  |    1   |    1   |    1   |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_limit_num      |   +1   |   +1   |   +1   |
+  *     | dma_eof_num         |   +1   |   +2   |   +1   |
+  *     | dma output (byte)   |   +2   |   +4   |   +2   |
+  *     +---------------------+--------+--------+--------+
+  */
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc1_pattern_len;               /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    uint32_t adc2_pattern_len;               /*!<Refer to ``adc1_pattern_len`` */
+    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
+    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to `adc1_pattern` */
+    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
+    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
+} adc_digi_config_t __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32
+
+
+#if CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+                    ESP32S2 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t reserved:  2;   /*!< reserved0 */
+            uint8_t channel:   4;   /*!< ADC channel index. */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+/**
+  * @brief ADC digital controller (DMA mode) configuration parameters.
+  *
+  * Example setting: When using ADC1 channel0 to measure voltage, the sampling rate is required to be 1 kHz:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | sample rate         | 1 kHz  | 1 kHz  | 1 kHz  |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     | adc1_pattern_len    |    1   |    1   |    1   |
+  *     | dig_clk.use_apll    |    0   |    0   |    0   |
+  *     | dig_clk.div_num     |   99   |   99   |   99   |
+  *     | dig_clk.div_b       |    0   |    0   |    0   |
+  *     | dig_clk.div_a       |    0   |    0   |    0   |
+  *     | interval            |  400   |  400   |  200   |
+  *     +---------------------+--------+--------+--------+
+  *     | `trigger_meas_freq` | 1 kHz  | 1 kHz  | 2 kHz  |
+  *     +---------------------+--------+--------+--------+
+  *
+  * Explanation of the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA outputs:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     +---------------------+--------+--------+--------+
+  *     | trigger meas times  |    1   |    1   |    1   |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_limit_num      |   +1   |   +1   |   +1   |
+  *     | dma_eof_num         |   +1   |   +2   |   +1   |
+  *     | dma output (byte)   |   +2   |   +4   |   +2   |
+  *     +---------------------+--------+--------+--------+
+  */
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc1_pattern_len;               /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    uint32_t adc2_pattern_len;               /*!<Refer to ``adc1_pattern_len`` */
+    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
+    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to `adc1_pattern` */
+    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
+    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
+    uint32_t interval;                       /*!<The number of interval clock cycles for the digital controller to trigger the measurement.
+                                                 The unit is the divided clock. Range: 40 ~ 4095.
+                                                 Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval. Refer to ``adc_digi_clk_t``.
+                                                 Note: The sampling rate of each channel is also related to the conversion mode (See ``adc_digi_convert_mode_t``) and pattern table settings. */
+    adc_digi_clk_t dig_clk;                  /*!<ADC digital controller clock divider settings. Refer to ``adc_digi_clk_t``.
+                                                 Note: The clocks of the DAC digital controller use the ADC digital controller clock divider. */
+    uint32_t dma_eof_num;                    /*!<DMA eof num of adc digital controller.
+                                                 If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated in DMA.
+                                                 Note: The converted data in the DMA in link buffer will be multiple of two bytes. */
+} adc_digi_config_t __attribute__((deprecated));
+
+/**
+ * @brief ADC digital controller (DMA mode) interrupt type options.
+ */
+typedef enum {
+    ADC_DIGI_INTR_MASK_MONITOR = 0x1,
+    ADC_DIGI_INTR_MASK_MEAS_DONE = 0x2,
+    ADC_DIGI_INTR_MASK_ALL = 0x3,
+} adc_digi_intr_t __attribute__((deprecated));
+FLAG_ATTR(adc_digi_intr_t)
+#endif  //#if CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32C3
+/*---------------------------------------------------------------
+                    ESP32C3 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t channel:   3;   /*!< ADC channel index. */
+            uint8_t unit:      1;   /*!< ADC unit index. */
+            uint8_t reserved:  2;   /*!< reserved0 */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc_pattern_len;                /*!<Pattern table length for digital controller. Range: 0 ~ 7 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 7 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    adc_digi_pattern_table_t *adc_pattern;   /*!<Pointer to pattern table for digital controller. The table size defined by `adc_pattern_len`. */
+    uint32_t sample_freq_hz;  /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
+                                   Fs = Fd / interval / 2
+                                   Fs: sampling frequency;
+                                   Fd: digital controller frequency, no larger than 5M for better performance
+                                   interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
+} adc_digi_config_t __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32C3
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/i2s.h b/tools/sdk/esp32c3/include/driver/include/driver/i2s.h
index aa649ed479c..389b631ba7e 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/i2s.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/i2s.h
@@ -78,7 +78,7 @@ typedef struct  {
  *
  */
 typedef struct {
-    int mck_io_num;     /*!< MCK in out pin*/
+    int mck_io_num;     /*!< MCK in out pin. Note that ESP32 supports setting MCK on GPIO0/GPIO1/GPIO3 only*/
     int bck_io_num;     /*!< BCK in out pin*/
     int ws_io_num;      /*!< WS in out pin*/
     int data_out_num;   /*!< DATA out pin*/
@@ -97,8 +97,22 @@ typedef struct {
     i2s_channel_fmt_t       channel_format;             /*!< I2S channel format.*/
     i2s_comm_format_t       communication_format;       /*!< I2S communication format */
     int                     intr_alloc_flags;           /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */
-    int                     dma_buf_count;              /*!< I2S DMA Buffer Count */
-    int                     dma_buf_len;                /*!< I2S DMA Buffer Length */
+    int                     dma_buf_count;              /**< The total number of DMA buffers to receive/transmit data.
+                                                          * A descriptor includes some information such as buffer address,
+                                                          * the address of the next descriptor, and the buffer length.
+                                                          * Since one descriptor points to one buffer, therefore, 'dma_desc_num' can be interpreted as the total number of DMA buffers used to store data from DMA interrupt.
+                                                          * Notice that these buffers are internal to'i2s_read' and descriptors are created automatically inside of the I2S driver.
+                                                          * Users only need to set the buffer number while the length is derived from the parameter described below.
+                                                          */
+    int                     dma_buf_len;                /**< Number of frames in a DMA buffer.
+                                                          *  A frame means the data of all channels in a WS cycle.
+                                                          *  The real_dma_buf_size = dma_buf_len * chan_num * bits_per_chan / 8.
+                                                          *  For example, if two channels in stereo mode (i.e., 'channel_format' is set to 'I2S_CHANNEL_FMT_RIGHT_LEFT') are active,
+                                                          *  and each channel transfers 32 bits (i.e., 'bits_per_sample' is set to 'I2S_BITS_PER_CHAN_32BIT'),
+                                                          *  then the total number of bytes of a frame is 'channel_format' * 'bits_per_sample' = 2 * 32 / 8 = 8 bytes.
+                                                          *  We assume that the current 'dma_buf_len' is 100, then the real length of the DMA buffer is 8 * 100 = 800 bytes.
+                                                          *  Note that the length of an internal real DMA buffer shouldn't be greater than 4092.
+                                                          */
     bool                    use_apll;                   /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */
     bool                    tx_desc_auto_clear;         /*!< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability) */
     int                     fixed_mclk;                 /*!< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value. If fixed_mclk set, mclk_multiple won't take effect */
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/ledc.h b/tools/sdk/esp32c3/include/driver/include/driver/ledc.h
index bc8328cdd20..7b22f3d1779 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/ledc.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/ledc.h
@@ -85,6 +85,7 @@ esp_err_t ledc_timer_config(const ledc_timer_config_t* timer_conf);
  * @brief LEDC update channel parameters
  * @note  Call this function to activate the LEDC updated parameters.
  *        After ledc_set_duty, we need to call this function to update the settings.
+ *        And the new LEDC parameters don't take effect until the next PWM cycle.
  * @note  ledc_set_duty, ledc_set_duty_with_hpoint and ledc_update_duty are not thread-safe, do not call these functions to
  *        control one LEDC channel in different tasks at the same time.
  *        A thread-safe version of API is ledc_set_duty_and_update
@@ -203,6 +204,9 @@ esp_err_t ledc_set_duty(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t
 
 /**
  * @brief LEDC get duty
+ *        This function returns the duty at the present PWM cycle.
+ *        You shouldn't expect the function to return the new duty in the same cycle of calling ledc_update_duty,
+ *        because duty update doesn't take effect until the next cycle.
  *
  * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
  * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
@@ -385,7 +389,8 @@ void ledc_fade_func_uninstall(void);
  *        Other duty operations will have to wait until the fade operation has finished.
  * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
  * @param channel LEDC channel number
- * @param fade_mode Whether to block until fading done.
+ * @param fade_mode Whether to block until fading done. See ledc_types.h ledc_fade_mode_t for more info.
+ *        Note that this function will not return until fading to the target duty if LEDC_FADE_WAIT_DONE mode is selected.
  *
  * @return
  *     - ESP_OK Success
@@ -443,9 +448,6 @@ esp_err_t ledc_set_fade_time_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
  *     - ESP_FAIL Fade function init error
  */
 esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t target_duty, uint32_t scale, uint32_t cycle_num, ledc_fade_mode_t fade_mode);
-#ifdef __cplusplus
-}
-#endif
 
 /**
  * @brief LEDC callback registration function
@@ -461,3 +463,6 @@ esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
  *     - ESP_FAIL Fade function init error
  */
 esp_err_t ledc_cb_register(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_cbs_t *cbs, void *user_arg);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/spi_common_internal.h b/tools/sdk/esp32c3/include/driver/include/driver/spi_common_internal.h
index 90826c0a8e9..0704c7ddd87 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/spi_common_internal.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/spi_common_internal.h
@@ -110,7 +110,7 @@ bool spicommon_periph_in_use(spi_host_device_t host);
 bool spicommon_periph_free(spi_host_device_t host);
 
 /**
- * @brief Alloc DMA for SPI Slave
+ * @brief Alloc DMA for SPI
  *
  * @param host_id                      SPI host ID
  * @param dma_chan                     DMA channel to be used
@@ -122,17 +122,17 @@ bool spicommon_periph_free(spi_host_device_t host);
  *        - ESP_ERR_NO_MEM:        No enough memory
  *        - ESP_ERR_NOT_FOUND:     There is no available DMA channel
  */
-esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan);
+esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan);
 
 /**
- * @brief Free DMA for SPI Slave
+ * @brief Free DMA for SPI
  *
  * @param host_id  SPI host ID
  *
  * @return
  *        - ESP_OK: On success
  */
-esp_err_t spicommon_slave_free_dma(spi_host_device_t host_id);
+esp_err_t spicommon_dma_chan_free(spi_host_device_t host_id);
 
 /**
  * @brief Connect a SPI peripheral to GPIO pins
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/spi_master.h b/tools/sdk/esp32c3/include/driver/include/driver/spi_master.h
index d6a202f848a..eaf391c8213 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/spi_master.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/spi_master.h
@@ -197,7 +197,7 @@ esp_err_t spi_bus_remove_device(spi_device_handle_t handle);
  * @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
  *                      never time out.
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_TRANS_CS_KEEP_ACTIVE flag is specified while
  *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if there was no room in the queue before ticks_to_wait expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
@@ -261,7 +261,7 @@ esp_err_t spi_device_transmit(spi_device_handle_t handle, spi_transaction_t *tra
  *              currently only portMAX_DELAY is supported.
  *
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_TRANS_CS_KEEP_ACTIVE flag is specified while
  *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if the device cannot get control of the bus before ``ticks_to_wait`` expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/uart.h b/tools/sdk/esp32c3/include/driver/include/driver/uart.h
index 76aa424fa27..4524516338b 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/uart.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/uart.h
@@ -328,7 +328,7 @@ esp_err_t uart_enable_rx_intr(uart_port_t uart_num);
 esp_err_t uart_disable_rx_intr(uart_port_t uart_num);
 
 /**
- * @brief Disable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)
+ * @brief Disable UART TX interrupt (TXFIFO_EMPTY INTERRUPT)
  *
  * @param uart_num  UART port number
  *
@@ -339,7 +339,7 @@ esp_err_t uart_disable_rx_intr(uart_port_t uart_num);
 esp_err_t uart_disable_tx_intr(uart_port_t uart_num);
 
 /**
- * @brief Enable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)
+ * @brief Enable UART TX interrupt (TXFIFO_EMPTY INTERRUPT)
  *
  * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
  * @param enable  1: enable; 0: disable
diff --git a/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_rtc_calib.h b/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_rtc_calib.h
index 0e059c4f3f1..d7bb47f644e 100644
--- a/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_rtc_calib.h
+++ b/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_rtc_calib.h
@@ -11,6 +11,9 @@
 extern "C" {
 #endif
 
+//This is the ADC calibration value version burnt in efuse
+#define ESP_EFUSE_ADC_CALIB_VER     1
+
 /**
  * @brief Get the RTC calibration efuse version
  *
@@ -21,11 +24,12 @@ int esp_efuse_rtc_calib_get_ver(void);
 /**
  * @brief Get the init code in the efuse, for the corresponding attenuation.
  *
- * @param version Version of the stored efuse
- * @param atten  Attenuation of the init code
+ * @param version   Version of the stored efuse
+ * @param adc_unit  ADC unit. Not used, for compatibility. On esp32c3, for calibration v1, both ADC units use the same init code (calibrated by ADC1)
+ * @param atten     Attenuation of the init code
  * @return The init code stored in efuse
  */
-uint16_t esp_efuse_rtc_calib_get_init_code(int version, int atten);
+uint32_t esp_efuse_rtc_calib_get_init_code(int version, uint32_t adc_unit, int atten);
 
 /**
  * @brief Get the calibration digits stored in the efuse, and the corresponding voltage.
diff --git a/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h b/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h
index 839116af264..d095ea1029a 100644
--- a/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h
+++ b/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,7 +9,7 @@ extern "C" {
 #endif
 
 
-// md5_digest_table ef33779021404fbaddc878eefebaddc1
+// md5_digest_table 720eb12a076091cb1a236c15d9fa3308
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -56,7 +56,6 @@ extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DEVICE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[];
-extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[];
@@ -86,14 +85,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[];
 extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[];
 extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[];
-extern const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[];
 extern const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[];
diff --git a/tools/sdk/esp32c3/include/esp-face/include/detect/dl_detect_define.hpp b/tools/sdk/esp32c3/include/esp-dl/include/detect/dl_detect_define.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/detect/dl_detect_define.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/detect/dl_detect_define.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/dl_define.hpp b/tools/sdk/esp32c3/include/esp-dl/include/dl_define.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/dl_define.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/dl_define.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/image/dl_image.hpp b/tools/sdk/esp32c3/include/esp-dl/include/image/dl_image.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/image/dl_image.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/image/dl_image.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_add2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_add2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_add2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_add2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_avg_pool2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_avg_pool2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_avg_pool2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_base.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_base.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_base.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_base.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_concat.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_concat.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_concat.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_concat.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_concat2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_concat2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_concat2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_concat2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_conv2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_conv2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_conv2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_depthwise_conv2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_depthwise_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_depthwise_conv2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_depthwise_conv2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_expand_dims.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_expand_dims.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_expand_dims.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_expand_dims.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_flatten.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_flatten.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_flatten.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_flatten.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_fullyconnected.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_fullyconnected.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_fullyconnected.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_fullyconnected.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_global_avg_pool2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_global_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_global_avg_pool2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_global_avg_pool2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_global_max_pool2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_global_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_global_max_pool2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_global_max_pool2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_leakyrelu.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_leakyrelu.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_leakyrelu.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_leakyrelu.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_max2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_max2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_max2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_max2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_max_pool2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_max_pool2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_max_pool2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_min2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_min2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_min2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_min2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_model.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_model.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_model.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_model.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_mul2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_mul2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_mul2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_mul2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_pad.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_pad.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_pad.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_pad.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_prelu.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_prelu.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_prelu.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_prelu.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_relu.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_relu.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_relu.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_relu.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_reshape.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_reshape.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_reshape.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_reshape.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_squeeze.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_squeeze.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_squeeze.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_squeeze.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_sub2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_sub2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_sub2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_sub2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_transpose.hpp b/tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_transpose.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/layer/dl_layer_transpose.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/layer/dl_layer_transpose.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/math/dl_math.hpp b/tools/sdk/esp32c3/include/esp-dl/include/math/dl_math.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/math/dl_math.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/math/dl_math.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/math/dl_math_matrix.hpp b/tools/sdk/esp32c3/include/esp-dl/include/math/dl_math_matrix.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/math/dl_math_matrix.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/math/dl_math_matrix.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/model_zoo/cat_face_detect_mn03.hpp b/tools/sdk/esp32c3/include/esp-dl/include/model_zoo/cat_face_detect_mn03.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/model_zoo/cat_face_detect_mn03.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/model_zoo/cat_face_detect_mn03.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/model_zoo/color_detector.hpp b/tools/sdk/esp32c3/include/esp-dl/include/model_zoo/color_detector.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/model_zoo/color_detector.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/model_zoo/color_detector.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/model_zoo/face_recognition_112_v1_s16.hpp b/tools/sdk/esp32c3/include/esp-dl/include/model_zoo/face_recognition_112_v1_s16.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/model_zoo/face_recognition_112_v1_s16.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/model_zoo/face_recognition_112_v1_s16.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/model_zoo/face_recognition_112_v1_s8.hpp b/tools/sdk/esp32c3/include/esp-dl/include/model_zoo/face_recognition_112_v1_s8.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/model_zoo/face_recognition_112_v1_s8.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/model_zoo/face_recognition_112_v1_s8.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/model_zoo/face_recognition_tool.hpp b/tools/sdk/esp32c3/include/esp-dl/include/model_zoo/face_recognition_tool.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/model_zoo/face_recognition_tool.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/model_zoo/face_recognition_tool.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/model_zoo/face_recognizer.hpp b/tools/sdk/esp32c3/include/esp-dl/include/model_zoo/face_recognizer.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/model_zoo/face_recognizer.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/model_zoo/face_recognizer.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/model_zoo/human_face_detect_mnp01.hpp b/tools/sdk/esp32c3/include/esp-dl/include/model_zoo/human_face_detect_mnp01.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/model_zoo/human_face_detect_mnp01.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/model_zoo/human_face_detect_mnp01.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/model_zoo/human_face_detect_msr01.hpp b/tools/sdk/esp32c3/include/esp-dl/include/model_zoo/human_face_detect_msr01.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/model_zoo/human_face_detect_msr01.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/model_zoo/human_face_detect_msr01.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_add2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_add2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_add2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_add2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_avg_pool2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_avg_pool2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_avg_pool2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_concat.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_concat.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_concat.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_concat.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_concat2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_concat2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_concat2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_concat2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_conv2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_conv2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_conv2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_depthwise_conv2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_depthwise_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_depthwise_conv2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_depthwise_conv2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_fully_connected.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_fully_connected.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_fully_connected.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_fully_connected.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_global_avg_pool2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_global_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_global_avg_pool2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_global_avg_pool2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_global_max_pool2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_global_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_global_max_pool2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_global_max_pool2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_leakyrelu.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_leakyrelu.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_leakyrelu.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_leakyrelu.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_max2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_max2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_max2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_max2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_max_pool2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_max_pool2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_max_pool2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_min2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_min2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_min2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_min2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_mul2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_mul2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_mul2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_mul2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_pad.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_pad.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_pad.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_pad.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_prelu.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_prelu.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_prelu.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_prelu.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_relu.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_relu.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_relu.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_relu.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_sub2d.hpp b/tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_sub2d.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/nn/dl_nn_sub2d.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/nn/dl_nn_sub2d.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/tool/dl_tool.hpp b/tools/sdk/esp32c3/include/esp-dl/include/tool/dl_tool.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/tool/dl_tool.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/tool/dl_tool.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/tool/dl_tool_cache.hpp b/tools/sdk/esp32c3/include/esp-dl/include/tool/dl_tool_cache.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/tool/dl_tool_cache.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/tool/dl_tool_cache.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/typedef/dl_constant.hpp b/tools/sdk/esp32c3/include/esp-dl/include/typedef/dl_constant.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/typedef/dl_constant.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/typedef/dl_constant.hpp
diff --git a/tools/sdk/esp32c3/include/esp-face/include/typedef/dl_variable.hpp b/tools/sdk/esp32c3/include/esp-dl/include/typedef/dl_variable.hpp
similarity index 100%
rename from tools/sdk/esp32c3/include/esp-face/include/typedef/dl_variable.hpp
rename to tools/sdk/esp32c3/include/esp-dl/include/typedef/dl_variable.hpp
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_common.h b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_common.h
new file mode 100644
index 00000000000..da7b001f3d4
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_common.h
@@ -0,0 +1,66 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsp_common_H_
+#define _dsp_common_H_
+#include <stdint.h>
+#include <stdbool.h>
+#include "dsp_err.h"
+#include "esp_idf_version.h"
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0)
+#include "esp_cpu.h"
+#else
+#include "soc/cpu.h"
+#endif
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief      check power of two
+ * The function check if the argument is power of 2.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @return
+ *      - true if x is power of two
+ *      - false if no
+ */
+bool dsp_is_power_of_two(int x);
+
+
+/**
+ * @brief      Power of two
+ * The function return power of 2 for values 2^N.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @return
+ *      - power of two
+ */
+int dsp_power_of_two(int x);
+
+#ifdef __cplusplus
+}
+#endif
+
+// esp_cpu_get_ccount function is implemented in IDF 4.1 and later
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0)
+#define dsp_get_cpu_cycle_count  esp_cpu_get_ccount
+#else
+#define dsp_get_cpu_cycle_count  xthal_get_ccount
+#endif
+
+#endif // _dsp_common_H_
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_err.h b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_err.h
new file mode 100644
index 00000000000..d769664c986
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_err.h
@@ -0,0 +1,23 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _DSP_ERR_H_
+#define _DSP_ERR_H_
+
+#include "stdint.h"
+#include "esp_err.h"
+#include "dsp_err_codes.h"
+
+#endif // _DSP_ERR_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_err_codes.h b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_err_codes.h
new file mode 100644
index 00000000000..c8827781a80
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_err_codes.h
@@ -0,0 +1,27 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsp_error_codes_H_
+#define _dsp_error_codes_H_
+
+#define DSP_OK                          0 // For internal use only. Please use ESP_OK instead
+#define ESP_ERR_DSP_BASE                0x70000
+#define ESP_ERR_DSP_INVALID_LENGTH      (ESP_ERR_DSP_BASE + 1)
+#define ESP_ERR_DSP_INVALID_PARAM       (ESP_ERR_DSP_BASE + 2)
+#define ESP_ERR_DSP_PARAM_OUTOFRANGE    (ESP_ERR_DSP_BASE + 3)
+#define ESP_ERR_DSP_UNINITIALIZED       (ESP_ERR_DSP_BASE + 4)
+#define ESP_ERR_DSP_REINITIALIZED       (ESP_ERR_DSP_BASE + 5)
+
+
+#endif // _dsp_error_codes_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_platform.h
new file mode 100644
index 00000000000..239b325bd52
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_platform.h
@@ -0,0 +1,30 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef dsp_platform_h_
+#define dsp_platform_h_
+#include "esp_idf_version.h"
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0)
+#include "esp_cpu.h"
+#else
+#include "soc/cpu.h"
+#endif
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/portable.h"
+#include "freertos/task.h"
+#include "freertos/semphr.h"
+
+#endif // dsp_platform_h_
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_tests.h b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_tests.h
new file mode 100644
index 00000000000..ea1fb422258
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_tests.h
@@ -0,0 +1,37 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _DSP_TESTS_H_
+#define _DSP_TESTS_H_
+
+#include <stdlib.h>
+#include "esp_idf_version.h"
+
+#define TEST_ASSERT_EXEC_IN_RANGE(min_exec, max_exec, actual) \
+    if (actual >= max_exec) { \
+        ESP_LOGE("", "Time error. Expected max: %i, reached: %i", (int)max_exec, (int)actual);\
+        TEST_ASSERT_MESSAGE (false, "Exec time takes more than expected! ");\
+    }\
+    if (actual < min_exec) {\
+        ESP_LOGE("", "Time error. Expected min: %i, reached: %i", (int)min_exec, (int)actual);\
+        TEST_ASSERT_MESSAGE (false, "Exec time takes less then expected!");\
+    }
+
+
+// memalign function is implemented in IDF 4.3 and later
+#if ESP_IDF_VERSION <= ESP_IDF_VERSION_VAL(4, 3, 0)
+#define memalign(align_, size_) malloc(size_)
+#endif
+
+#endif // _DSP_TESTS_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_types.h b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_types.h
new file mode 100644
index 00000000000..1f11ea4520b
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_types.h
@@ -0,0 +1,39 @@
+#ifndef _dsp_types_H_
+#define _dsp_types_H_
+#include <stdint.h>
+#include <stdbool.h>
+
+// union to simplify access to the 16 bit data
+typedef union sc16_u
+{
+    struct
+    {
+        int16_t re;
+        int16_t im;
+    };
+    uint32_t data;
+}sc16_t;
+
+typedef union fc32_u
+{
+    struct
+    {
+        float re;
+        float im;
+    };
+    uint64_t data;
+}fc32_t;
+
+typedef struct image2d_s
+{
+    void* data; // could be int8_t, unt8_t, int16_t, unt16_t, float
+    int step_x; // step of elements by X
+    int step_y; // step of elements by Y, usually is 1
+    int stride_x; // stride width: size of the elements in X axis * by step_x + padding
+    int stride_y; // stride height: size of the elements in Y axis * by step_y + padding
+    // Point[x,y] = data[width*y*step_y + x*step_x];
+    // Full data size = width*height
+
+} image2d_t;
+
+#endif // _dsp_types_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/esp_dsp.h b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/esp_dsp.h
new file mode 100644
index 00000000000..419ed299965
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/common/include/esp_dsp.h
@@ -0,0 +1,64 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _esp_dsp_H_
+#define _esp_dsp_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+// Common includes
+#include "dsp_common.h"
+
+// Signal processing
+#include "dsps_dotprod.h"
+#include "dsps_math.h"
+#include "dsps_fir.h"
+#include "dsps_biquad.h"
+#include "dsps_biquad_gen.h"
+#include "dsps_wind.h"
+#include "dsps_conv.h"
+#include "dsps_corr.h"
+
+#include "dsps_d_gen.h"
+#include "dsps_h_gen.h"
+#include "dsps_tone_gen.h"
+#include "dsps_snr.h"
+#include "dsps_sfdr.h"
+
+#include "dsps_fft2r.h"
+#include "dsps_fft4r.h"
+#include "dsps_dct.h"
+
+// Matrix operations
+#include "dspm_mult.h"
+
+// Support functions
+#include "dsps_view.h"
+
+// Image processing functions:
+#include "dspi_dotprod.h"
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifdef __cplusplus
+#include "mat.h"
+#endif
+
+#endif // _esp_dsp_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_ccorr.h b/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_ccorr.h
new file mode 100644
index 00000000000..9d838e55642
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_ccorr.h
@@ -0,0 +1,63 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_ccorr_H_
+#define _dsps_ccorr_H_
+#include "dsp_err.h"
+
+#include "dsps_conv_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   Cross correlation
+ *
+ * The function make cross correlate between two ignals.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] Signal1: input array with input 1 signal values
+ * @param[in] siglen1: length of the input 1 signal array
+ * @param[in] Signal2: input array with input 2 signal values
+ * @param[in] siglen2: length of the input  signal array
+ * @param corrout: output array with result of cross correlation. The size of dest array must be (siglen1 + siglen2 - 1) !!!
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library (one of the input array are NULL, or if (siglen < patlen))
+ */
+esp_err_t dsps_ccorr_f32_ansi(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *corrout);
+esp_err_t dsps_ccorr_f32_ae32(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *corrout);
+/**}@*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+#if (dsps_ccorr_f32_ae32_enabled == 1)
+#define dsps_ccorr_f32 dsps_ccorr_f32_ae32
+#else
+#define dsps_ccorr_f32 dsps_ccorr_f32_ansi
+#endif // dsps_ccorr_f32_ae32_enabled
+#else
+#define dsps_ccorr_f32 dsps_ccorr_f32_ansi
+#endif
+
+#endif // _dsps_conv_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_conv.h b/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_conv.h
new file mode 100644
index 00000000000..07dbf7a2b30
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_conv.h
@@ -0,0 +1,65 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_conv_H_
+#define _dsps_conv_H_
+#include "dsp_err.h"
+
+#include "dsps_conv_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   Convolution
+ *
+ * The function convolve Signal array with Kernel array.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] Signal:  input array with signal
+ * @param[in] siglen:  length of the input signal
+ * @param[in] Kernel:  input array with convolution kernel
+ * @param[in] kernlen: length of the Kernel array
+ * @param convout: output array with convolution result length of (siglen + Kernel -1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_conv_f32_ae32(const float *Signal, const int siglen, const float *Kernel, const int kernlen, float *convout);
+esp_err_t dsps_conv_f32_ansi(const float *Signal, const int siglen, const float *Kernel, const int kernlen, float *convout);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+
+#if (dsps_conv_f32_ae32_enabled == 1)
+#define dsps_conv_f32 dsps_conv_f32_ae32
+#else
+#define dsps_conv_f32 dsps_conv_f32_ansi
+#endif // dsps_conv_f32_ae32_enabled
+
+#else
+#define dsps_conv_f32 dsps_conv_f32_ansi
+#endif
+
+#endif // _dsps_conv_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_conv_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_conv_platform.h
new file mode 100644
index 00000000000..02c9c8535b5
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_conv_platform.h
@@ -0,0 +1,20 @@
+#ifndef _dsps_conv_platform_H_
+#define _dsps_conv_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_conv_f32_ae32_enabled  1
+#define dsps_ccorr_f32_ae32_enabled  1
+#define dsps_corr_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+#endif // _dsps_conv_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_corr.h b/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_corr.h
new file mode 100644
index 00000000000..06f62ca8d81
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_corr.h
@@ -0,0 +1,63 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_corr_H_
+#define _dsps_corr_H_
+#include "dsp_err.h"
+
+#include "dsps_conv_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   Correlation with pattern
+ *
+ * The function correlate input sigla array with pattern array.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] Signal: input array with signal values
+ * @param[in] siglen: length of the signal array
+ * @param[in] Pattern: input array with pattern values
+ * @param[in] patlen: length of the pattern array. The siglen must be bigger then patlen!
+ * @param dest: output array with result of correlation
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library (one of the input array are NULL, or if (siglen < patlen))
+ */
+esp_err_t dsps_corr_f32_ansi(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *dest);
+esp_err_t dsps_corr_f32_ae32(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *dest);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+#if (dsps_corr_f32_ae32_enabled == 1)
+#define dsps_corr_f32 dsps_corr_f32_ae32
+#else
+#define dsps_corr_f32 dsps_corr_f32_ansi
+#endif // dsps_corr_f32_ae32_enabled
+#else
+#define dsps_corr_f32 dsps_corr_f32_ansi
+#endif
+
+#endif // _dsps_corr_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/dct/include/dsps_dct.h b/tools/sdk/esp32c3/include/esp-dsp/modules/dct/include/dsps_dct.h
new file mode 100644
index 00000000000..bc0f415c16d
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/dct/include/dsps_dct.h
@@ -0,0 +1,95 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_dct_H_
+#define _dsps_dct_H_
+#include "dsp_err.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief      DCT of radix 2, unscaled
+ *
+ * DCT type II of radix 2, unscaled
+ * Function is FFT based
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output array with size of N*2. An elements located: Re[0],Re[1], , ... Re[N-1], any data... up to N*2
+ *               result of DCT will be stored to this array from 0...N-1.
+ *               Size of data array must be N*2!!!
+ * @param[in] N: Size of DCT transform. Size of data array must be N*2!!!
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dct_f32(float *data, int N);
+
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Inverce DCT of radix 2
+ *
+ * Inverce DCT type III of radix 2, unscaled
+ * Function is FFT based
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output array with size of N*2. An elements located: Re[0],Re[1], , ... Re[N-1], any data... up to N*2
+ *               result of DCT will be stored to this array from 0...N-1.
+ *               Size of data array must be N*2!!!
+ * @param[in] N: Size of DCT transform. Size of data array must be N*2!!!
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dct_inv_f32(float *data, int N);
+
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      DCTs
+ *
+ * Direct DCT type II and Inverce DCT type III, unscaled
+ * These functions used as a reference for general purpose. These functions are not optimyzed!
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] data: input/output array with size of N. An elements located: Re[0],Re[1], , ... Re[N-1]
+ * @param[in] N: Size of DCT transform. Size of data array must be N*2!!!
+ * @param[out] result: output result array with size of N.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dct_f32_ref(float *data, int N, float *result);
+esp_err_t dsps_dct_inverce_f32_ref(float *data, int N, float *result);
+/**@}*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_dct_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dspi_dotprod.h b/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dspi_dotprod.h
new file mode 100644
index 00000000000..2455cb3c897
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dspi_dotprod.h
@@ -0,0 +1,171 @@
+
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dspi_dotprod_H_
+#define _dspi_dotprod_H_
+
+#include "esp_log.h"
+#include "dsp_err.h"
+#include "dsp_types.h"
+#include "dspi_dotprod_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief      dot product of two images
+ * Dot product calculation for two floating point images: *out_value += image[i*...] * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_f32_ansi(image2d_t* in_image, image2d_t* filter, float *out_value, int count_x, int count_y);
+/**@}*/ 
+
+/**@{*/
+/**
+ * @brief      dot product of two images
+ * Dot product calculation for two floating point images: *out_value += image[i*...] * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @param[in] shift - result shift to right, by default must be 15 for int16_t or 7 for int8_t 
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_s16_ansi(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u16_ansi(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_s8_ansi(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u8_ansi(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift);
+
+esp_err_t dspi_dotprod_s16_aes3(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u16_aes3(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_s8_aes3(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u8_aes3(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift);
+
+
+/**@}*/ 
+
+/**@{*/
+/**
+ * @brief      dot product of two images with input offset
+ * Dot product calculation for two floating point images: *out_value += (image[i*...] + offset) * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @param[in] offset - input offset value.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_off_f32_ansi(image2d_t* in_image, image2d_t* filter, float *out_value, int count_x, int count_y, float offset);
+/**@}*/ 
+
+/**@{*/
+/**
+ * @brief      dot product of two images with input offset
+ * Dot product calculation for two floating point images: *out_value += (image[i*...] + offset) * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @param[in] shift - result shift to right, by default must be 15 for int16_t or 7 for int8_t 
+ * @param[in] offset - input offset value.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_off_s16_ansi(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift, int16_t offset);
+esp_err_t dspi_dotprod_off_u16_ansi(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift, uint16_t offset);
+esp_err_t dspi_dotprod_off_s8_ansi(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift, int8_t offset);
+esp_err_t dspi_dotprod_off_u8_ansi(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift, uint8_t offset);
+
+esp_err_t dspi_dotprod_off_s16_aes3(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift, int16_t offset);
+esp_err_t dspi_dotprod_off_u16_aes3(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift, uint16_t offset);
+esp_err_t dspi_dotprod_off_s8_aes3(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift, int8_t offset);
+esp_err_t dspi_dotprod_off_u8_aes3(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift, uint8_t offset);
+/**@}*/ 
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+#define dspi_dotprod_f32 dspi_dotprod_f32_ansi
+#define dspi_dotprod_off_f32 dspi_dotprod_off_f32_ansi
+    #if (dspi_dotprod_aes3_enabled == 1)
+    #define dspi_dotprod_s16 dspi_dotprod_s16_aes3
+    #define dspi_dotprod_u16 dspi_dotprod_u16_aes3
+    #define dspi_dotprod_s8 dspi_dotprod_s8_aes3
+    #define dspi_dotprod_u8 dspi_dotprod_u8_aes3
+    #define dspi_dotprod_off_s16 dspi_dotprod_off_s16_aes3
+    #define dspi_dotprod_off_s8 dspi_dotprod_off_s8_aes3
+    #define dspi_dotprod_off_u16 dspi_dotprod_off_u16_aes3
+    #define dspi_dotprod_off_u8 dspi_dotprod_off_u8_aes3
+    #else
+    #define dspi_dotprod_s16 dspi_dotprod_s16_ansi
+    #define dspi_dotprod_s8 dspi_dotprod_s8_ansi
+    #define dspi_dotprod_u16 dspi_dotprod_u16_ansi
+    #define dspi_dotprod_u8 dspi_dotprod_u8_ansi
+    #define dspi_dotprod_off_s16 dspi_dotprod_off_s16_ansi
+    #define dspi_dotprod_off_s8 dspi_dotprod_off_s8_ansi
+    #define dspi_dotprod_off_u16 dspi_dotprod_off_u16_ansi
+    #define dspi_dotprod_off_u8 dspi_dotprod_off_u8_ansi
+    #endif
+#endif
+#ifdef CONFIG_DSP_ANSI
+#define dspi_dotprod_f32 dspi_dotprod_f32_ansi
+#define dspi_dotprod_off_f32 dspi_dotprod_off_f32_ansi
+#define dspi_dotprod_s16 dspi_dotprod_s16_ansi
+#define dspi_dotprod_s8 dspi_dotprod_s8_ansi
+#define dspi_dotprod_off_s16 dspi_dotprod_off_s16_ansi
+#define dspi_dotprod_off_s8 dspi_dotprod_off_s8_ansi
+#define dspi_dotprod_u16 dspi_dotprod_u16_ansi
+#define dspi_dotprod_u8 dspi_dotprod_u8_ansi
+#define dspi_dotprod_off_u16 dspi_dotprod_off_u16_ansi
+#define dspi_dotprod_off_u8 dspi_dotprod_off_u8_ansi
+#endif
+
+
+#endif // _dspi_dotprod_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dspi_dotprod_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dspi_dotprod_platform.h
new file mode 100644
index 00000000000..3acd4d54b3d
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dspi_dotprod_platform.h
@@ -0,0 +1,16 @@
+#ifndef _dspi_dotprod_platform_H_
+#define _dspi_dotprod_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#define dspi_dotprod_aes3_enabled 1
+#endif 
+#endif // __XTENSA__
+
+#endif // _dspi_dotprod_platform_H_
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dsps_dotprod.h b/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dsps_dotprod.h
new file mode 100644
index 00000000000..d2bd1857233
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dsps_dotprod.h
@@ -0,0 +1,120 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _DSPI_DOTPROD_H_
+#define _DSPI_DOTPROD_H_
+
+#include "esp_log.h"
+#include "dsp_err.h"
+
+#include "dsps_dotprod_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+// These functions calculates dotproduct of two vectors.
+
+/**@{*/
+/**
+ * @brief      dot product of two 16 bit vectors
+ * Dot product calculation for two signed 16 bit arrays: *dest += (src1[i] * src2[i]) >> (15-shift); i= [0..N)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] src1  source array 1
+ * @param[in] src2  source array 2
+ * @param dest  destination pointer
+ * @param[in] len   length of input arrays
+ * @param[in] shift shift of the result.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dotprod_s16_ansi(const int16_t *src1, const int16_t *src2, int16_t *dest, int len, int8_t shift);
+esp_err_t dsps_dotprod_s16_ae32(const int16_t *src1, const int16_t *src2, int16_t *dest, int len, int8_t shift);
+/**@}*/
+
+
+/**@{*/
+/**
+ * @brief      dot product of two float vectors
+ * Dot product calculation for two floating point arrays: *dest += (src1[i] * src2[i]); i= [0..N)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] src1  source array 1
+ * @param[in] src2  source array 2
+ * @param dest  destination pointer
+ * @param[in] len   length of input arrays
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dotprod_f32_ansi(const float *src1, const float *src2, float *dest, int len);
+esp_err_t dsps_dotprod_f32_ae32(const float *src1, const float *src2, float *dest, int len);
+esp_err_t dsps_dotprod_f32_aes3(const float *src1, const float *src2, float *dest, int len);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      dot product of two float vectors with step
+ * Dot product calculation for two floating point arrays: *dest += (src1[i*step1] * src2[i*step2]); i= [0..N)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] src1  source array 1
+ * @param[in] src2  source array 2
+ * @param dest  destination pointer
+ * @param[in] len   length of input arrays
+ * @param[in] step1 step over elements in first array
+ * @param[in] step2 step over elements in second array
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dotprode_f32_ansi(const float *src1, const float *src2, float *dest, int len, int step1, int step2);
+esp_err_t dsps_dotprode_f32_ae32(const float *src1, const float *src2, float *dest, int len, int step1, int step2);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+
+#if (dsps_dotprod_s16_ae32_enabled == 1)
+#define dsps_dotprod_s16 dsps_dotprod_s16_ae32
+#else
+#define dsps_dotprod_s16 dsps_dotprod_s16_ansi
+#endif // dsps_dotprod_s16_ae32_enabled
+
+#if (dsps_dotprod_f32_aes3_enabled == 1)
+#define dsps_dotprod_f32 dsps_dotprod_f32_aes3
+#define dsps_dotprode_f32 dsps_dotprode_f32_ae32
+#elif (dotprod_f32_ae32_enabled == 1)
+#define dsps_dotprod_f32 dsps_dotprod_f32_ae32
+#define dsps_dotprode_f32 dsps_dotprode_f32_ae32
+#else
+#define dsps_dotprod_f32 dsps_dotprod_f32_ansi
+#define dsps_dotprode_f32 dsps_dotprode_f32_ansi
+#endif // dsps_dotprod_f32_ae32_enabled
+
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_dotprod_s16 dsps_dotprod_s16_ansi
+#define dsps_dotprod_f32 dsps_dotprod_f32_ansi
+#define dsps_dotprode_f32 dsps_dotprode_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _DSPI_DOTPROD_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dsps_dotprod_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dsps_dotprod_platform.h
new file mode 100644
index 00000000000..f308262b345
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dsps_dotprod_platform.h
@@ -0,0 +1,32 @@
+#ifndef _dsps_dotprod_platform_H_
+#define _dsps_dotprod_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dotprod_f32_ae32_enabled  1
+#define dotprode_f32_ae32_enabled 1
+
+#endif // 
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dsps_dotprod_s16_ae32_enabled 1
+
+#endif //
+#endif // __XTENSA__
+
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#define dsps_dotprod_s16_aes3_enabled 1
+#define dsps_dotprod_f32_aes3_enabled 1
+#endif 
+
+
+#endif // _dsps_dotprod_platform_H_
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft2r.h b/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft2r.h
new file mode 100644
index 00000000000..e1302f83e46
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft2r.h
@@ -0,0 +1,245 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fft2r_H_
+#define _dsps_fft2r_H_
+
+#include "dsp_err.h"
+#include "sdkconfig.h"
+#include "dsps_fft_tables.h"
+#include "dsps_fft2r_platform.h"
+
+#ifndef CONFIG_DSP_MAX_FFT_SIZE
+#define CONFIG_DSP_MAX_FFT_SIZE 4096
+#endif // CONFIG_DSP_MAX_FFT_SIZE
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+extern float *dsps_fft_w_table_fc32;
+extern int dsps_fft_w_table_size;
+extern uint8_t dsps_fft2r_initialized;
+
+extern int16_t *dsps_fft_w_table_sc16;
+extern int dsps_fft_w_table_sc16_size;
+extern uint8_t dsps_fft2r_sc16_initialized;
+
+
+/**@{*/
+/**
+ * @brief      init fft tables
+ *
+ * Initialization of Complex FFT. This function initialize coefficients table.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] fft_table_buff: pointer to floating point buffer where sin/cos table will be stored
+ *                          if this parameter set to NULL, and table_size value is more then 0, then
+ *                          dsps_fft2r_init_fc32 will allocate buffer internally
+ * @param[in] table_size: size of the buffer in float words
+ *                      if fft_table_buff is NULL and table_size is not 0, buffer will be allocated internally.
+ *                      If table_size is 0, buffer will not be allocated.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_DSP_PARAM_OUTOFRANGE if table_size > CONFIG_DSP_MAX_FFT_SIZE
+ *      - ESP_ERR_DSP_REINITIALIZED if buffer already allocated internally by other function
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft2r_init_fc32(float *fft_table_buff, int table_size);
+esp_err_t dsps_fft2r_init_sc16(int16_t *fft_table_buff, int table_size);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      deinit fft tables
+ *
+ * Free resources of Complex FFT. This function delete coefficients table if it was allocated by dsps_fft2r_init_fc32.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ */
+void dsps_fft2r_deinit_fc32(void);
+void dsps_fft2r_deinit_sc16(void);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      complex FFT of radix 2
+ *
+ * Complex FFT of radix 2
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ * @param[in] w: pointer to the sin/cos table
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft2r_fc32_ansi_(float *data, int N, float *w);
+esp_err_t dsps_fft2r_fc32_ae32_(float *data, int N, float *w);
+esp_err_t dsps_fft2r_fc32_aes3_(float *data, int N, float *w);
+esp_err_t dsps_fft2r_sc16_ansi_(int16_t *data, int N, int16_t *w);
+esp_err_t dsps_fft2r_sc16_ae32_(int16_t *data, int N, int16_t *w);
+esp_err_t dsps_fft2r_sc16_aes3_(int16_t *data, int N, int16_t *w);
+/**@}*/
+// This is workaround because linker generates permanent error when assembler uses
+// direct access to the table pointer
+#define dsps_fft2r_fc32_ae32(data, N) dsps_fft2r_fc32_ae32_(data, N, dsps_fft_w_table_fc32)
+#define dsps_fft2r_fc32_aes3(data, N) dsps_fft2r_fc32_aes3_(data, N, dsps_fft_w_table_fc32)
+#define dsps_fft2r_sc16_ae32(data, N) dsps_fft2r_sc16_ae32_(data, N, dsps_fft_w_table_sc16)
+#define dsps_fft2r_sc16_aes3(data, N) dsps_fft2r_sc16_aes3_(data, N, dsps_fft_w_table_sc16)
+#define dsps_fft2r_fc32_ansi(data, N) dsps_fft2r_fc32_ansi_(data, N, dsps_fft_w_table_fc32)
+#define dsps_fft2r_sc16_ansi(data, N) dsps_fft2r_sc16_ansi_(data, N, dsps_fft_w_table_sc16)
+
+
+/**@{*/
+/**
+ * @brief      bit reverse operation for the complex input array
+ *
+ * Bit reverse operation for the complex input array
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: input/ complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_bit_rev_fc32_ansi(float *data, int N);
+esp_err_t dsps_bit_rev_sc16_ansi(int16_t *data, int N);
+esp_err_t dsps_bit_rev2r_fc32(float *data, int N);
+/**@}*/
+
+esp_err_t dsps_bit_rev_lookup_fc32_ansi(float *data, int reverse_size, uint16_t *reverse_tab);
+esp_err_t dsps_bit_rev_lookup_fc32_ae32(float *data, int reverse_size, uint16_t *reverse_tab);
+esp_err_t dsps_bit_rev_lookup_fc32_aes3(float *data, int reverse_size, uint16_t *reverse_tab);
+
+/**@{*/
+/**
+ * @brief      Generate coefficients table for the FFT radix 2
+ *
+ * Generate coefficients table for the FFT radix 2. This function called inside init.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] w: memory location to store coefficients.
+ *           By default coefficients will be stored to the dsps_fft_w_table_fc32.
+ *           Maximum size of the FFT must be setup in menuconfig
+ * @param[in] N: maximum size of the FFT that will be used
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_gen_w_r2_fc32(float *w, int N);
+esp_err_t dsps_gen_w_r2_sc16(int16_t *w, int N);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Convert complex array to two real arrays
+ *
+ * Convert complex array to two real arrays in case if input was two real arrays.
+ * This function have to be used if FFT used to process real data.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: Input complex array and result of FFT2R.
+ *               input has size of 2*N, because contains real and imaginary part.
+ *               result will be stored to the same array.
+ *               Input1: input[0..N-1], Input2: input[N..2*N-1]
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_cplx2reC_fc32_ansi(float *data, int N);
+esp_err_t dsps_cplx2reC_sc16(int16_t *data, int N);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Convert complex FFT result to real array
+ *
+ * Convert FFT result of complex FFT for resl input to real array.
+ * This function have to be used if FFT used to process real data.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: Input complex array and result of FFT2R.
+ *               input has size of 2*N, because contains real and imaginary part.
+ *               result will be stored to the same array.
+ *               Input1: input[0..N-1], Input2: input[N..2*N-1]
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_cplx2real_sc16_ansi(int16_t *data, int N);
+/**@}*/
+esp_err_t dsps_cplx2real256_fc32_ansi(float *data);
+
+esp_err_t dsps_gen_bitrev2r_table(int N, int step, char *name_ext);
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#define dsps_bit_rev_fc32 dsps_bit_rev_fc32_ansi
+#define dsps_cplx2reC_fc32 dsps_cplx2reC_fc32_ansi
+
+#if (dsps_fft2r_fc32_aes3_enabled == 1)
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_aes3
+#elif (dsps_fft2r_fc32_ae32_enabled == 1)
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_ae32
+#else
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_ansi
+#endif
+
+#if (dsps_fft2r_sc16_aes3_enabled == 1)
+#define dsps_fft2r_sc16 dsps_fft2r_sc16_aes3
+#elif (dsps_fft2r_sc16_ae32_enabled == 1)
+#define dsps_fft2r_sc16 dsps_fft2r_sc16_ae32
+#else
+#define dsps_fft2r_sc16 dsps_fft2r_sc16_ansi
+#endif
+
+#if (dsps_bit_rev_lookup_fc32_ae32_enabled == 1)
+#if (dsps_fft2r_fc32_aes3_enabled)
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_aes3
+#else
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ae32
+#endif // dsps_fft2r_fc32_aes3_enabled
+#else
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ansi
+#endif
+
+#else // CONFIG_DSP_OPTIMIZED
+
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_ansi
+#define dsps_bit_rev_fc32 dsps_bit_rev_fc32_ansi
+#define dsps_cplx2reC_fc32 dsps_cplx2reC_fc32_ansi
+#define dsps_bit_rev_sc16 dsps_bit_rev_sc16_ansi
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ansi
+
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_fft2r_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h
new file mode 100644
index 00000000000..04e088d87aa
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h
@@ -0,0 +1,36 @@
+#ifndef _dsps_fft2r_platform_H_
+#define _dsps_fft2r_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_fft2r_fc32_ae32_enabled 1
+
+#endif // 
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dsps_fft2r_sc16_ae32_enabled 1
+
+#endif //
+
+#if (XCHAL_HAVE_LOOPS == 1)
+
+#define dsps_bit_rev_lookup_fc32_ae32_enabled 1
+
+#endif //
+#endif // __XTENSA__
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#define dsps_fft2r_fc32_aes3_enabled 1
+#define dsps_fft2r_sc16_aes3_enabled 1
+#endif
+
+
+#endif // _dsps_fft2r_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft4r.h b/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft4r.h
new file mode 100644
index 00000000000..6443dc80d18
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft4r.h
@@ -0,0 +1,177 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fft4r_H_
+#define _dsps_fft4r_H_
+#include "dsp_err.h"
+#include "sdkconfig.h"
+
+#include "dsps_fft_tables.h"
+#include "dsps_fft4r_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+extern float *dsps_fft4r_w_table_fc32;
+extern int dsps_fft4r_w_table_size;
+extern uint8_t dsps_fft4r_initialized;
+
+extern int16_t *dsps_fft4r_w_table_sc16;
+extern int dsps_fft4r_w_table_sc16_size;
+extern uint8_t dsps_fft4r_sc16_initialized;
+
+/**@{*/
+/**
+ * @brief      init fft tables
+ *
+ * Initialization of Complex FFT Radix-4. This function initialize coefficients table.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] fft_table_buff: pointer to floating point buffer where sin/cos table will be stored
+ *                          if this parameter set to NULL, and table_size value is more then 0, then
+ *                          dsps_fft4r_init_fc32 will allocate buffer internally
+ * @param[in] max_fft_size: maximum fft size. The buffer for sin/cos table that will be used for radix-4 it's
+ *                          four times maximum length of FFT.
+ *                          if fft_table_buff is NULL and table_size is not 0, buffer will be allocated internally.
+ *                          If table_size is 0, buffer will not be allocated.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_DSP_PARAM_OUTOFRANGE if table_size > CONFIG_DSP_MAX_FFT_SIZE
+ *      - ESP_ERR_DSP_REINITIALIZED if buffer already allocated internally by other function
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft4r_init_fc32(float *fft_table_buff, int max_fft_size);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      deinit fft tables
+ *
+ * Free resources of Complex FFT Radix-4. This function delete coefficients table if it was allocated by dsps_fft4r_init_fc32.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ *
+ */
+void dsps_fft4r_deinit_fc32(void);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      complex FFT of radix 4
+ *
+ * Complex FFT of radix 4
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ * @param[in] table: pointer to sin/cos table
+ * @param[in] table_size: size of the sin/cos table
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft4r_fc32_ansi_(float *data, int N, float *table, int table_size);
+esp_err_t dsps_fft4r_fc32_ae32_(float *data, int N, float *table, int table_size);
+/**@}*/
+// This is workaround because linker generates permanent error when assembler uses
+// direct access to the table pointer
+#define dsps_fft4r_fc32_ansi(data, N) dsps_fft4r_fc32_ansi_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+#define dsps_fft4r_fc32_ae32(data, N) dsps_fft4r_fc32_ae32_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+
+/**@{*/
+/**
+ * @brief      bit reverse operation for the complex input array radix-4
+ *
+ * Bit reverse operation for the complex input array
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: input/ complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_bit_rev4r_fc32(float *data, int N);
+esp_err_t dsps_bit_rev4r_fc32_ae32(float *data, int N);
+esp_err_t dsps_bit_rev4r_direct_fc32_ansi(float *data, int N);
+esp_err_t dsps_bit_rev4r_sc16_ansi(int16_t *data, int N);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Convert complex FFT result to real array
+ *
+ * Convert FFT result of complex FFT for real input to real array.
+ * This function have to be used if FFT used to process real data.
+ * This function use tabels inside and can be used only it dsps_fft4r_init_fc32(...) was
+ * called and FFT4 was initialized.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: Input complex array and result of FFT2R/FFT4R.
+ *               input has size of 2*N, because contains real and imaginary part.
+ *               result will be stored to the same array.
+ *               Input1: input[0..N-1], Input2: input[N..2*N-1]
+ * @param[in] N: Number of complex elements in input array
+ * @param[in] table: pointer to sin/cos table
+ * @param[in] table_size: size of the sin/cos table
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_cplx2real_fc32_ansi_(float *data, int N, float *table, int table_size);
+esp_err_t dsps_cplx2real_fc32_ae32_(float *data, int N, float *table, int table_size);
+/**@}*/
+#define dsps_cplx2real_fc32_ansi(data, N) dsps_cplx2real_fc32_ansi_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+#define dsps_cplx2real_fc32_ae32(data, N) dsps_cplx2real_fc32_ae32_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+
+
+esp_err_t dsps_gen_bitrev4r_table(int N, int step, char *name_ext);
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_fft4r_fc32_ae32_enabled == 1)
+#define dsps_fft4r_fc32 dsps_fft4r_fc32_ae32
+#else
+#define dsps_fft4r_fc32 dsps_fft4r_fc32_ansi
+#endif // dsps_fft4r_fc32_ae32_enabled
+
+#define dsps_fft4r_sc16 dsps_fft4r_sc16_ae32
+#define dsps_bit_rev4r_fc32 dsps_bit_rev4r_fc32_ae32
+
+#if (dsps_cplx2real_fc32_ae32_enabled == 1)
+#define dsps_cplx2real_fc32 dsps_cplx2real_fc32_ae32
+#else
+#define dsps_cplx2real_fc32 dsps_cplx2real_fc32_ansi
+#endif // dsps_cplx2real_fc32_ae32_enabled
+
+#else
+#define dsps_fft4r_fc32 dsps_fft4r_fc32_ansi
+#define dsps_fft4r_sc16 dsps_fft4r_sc16_ansi
+#define dsps_bit_rev4r_fc32 dsps_bit_rev4r_fc32
+#define dsps_cplx2real_fc32 dsps_cplx2real_fc32_ansi
+#endif
+
+#endif // _dsps_fft4r_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft4r_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft4r_platform.h
new file mode 100644
index 00000000000..a777bdccdc1
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft4r_platform.h
@@ -0,0 +1,34 @@
+#ifndef _dsps_fft4r_platform_H_
+#define _dsps_fft4r_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_fft4r_fc32_ae32_enabled 1
+#define dsps_cplx2real_fc32_ae32_enabled 1
+
+#endif // 
+
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dsps_fft2r_sc16_ae32_enabled 1
+
+#endif //
+
+#if (XCHAL_HAVE_LOOPS == 1)
+
+#define dsps_bit_rev_lookup_fc32_ae32_enabled 1
+
+#endif //
+#endif // __XTENSA__
+
+
+
+#endif // _dsps_fft4r_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft_tables.h b/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft_tables.h
new file mode 100644
index 00000000000..94fbab501d0
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft_tables.h
@@ -0,0 +1,89 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fft_tables_H_
+#define _dsps_fft_tables_H_
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+extern const uint16_t bitrev2r_table_16_fc32[];
+extern const uint16_t bitrev2r_table_16_fc32_size;
+
+extern const uint16_t bitrev2r_table_32_fc32[];
+extern const uint16_t bitrev2r_table_32_fc32_size;
+
+extern const uint16_t bitrev2r_table_64_fc32[];
+extern const uint16_t bitrev2r_table_64_fc32_size;
+
+extern const uint16_t bitrev2r_table_128_fc32[];
+extern const uint16_t bitrev2r_table_128_fc32_size;
+
+extern const uint16_t bitrev2r_table_256_fc32[];
+extern const uint16_t bitrev2r_table_256_fc32_size;
+
+extern const uint16_t bitrev2r_table_512_fc32[];
+extern const uint16_t bitrev2r_table_512_fc32_size;
+
+extern const uint16_t bitrev2r_table_1024_fc32[];
+extern const uint16_t bitrev2r_table_1024_fc32_size;
+
+extern const uint16_t bitrev2r_table_2048_fc32[];
+extern const uint16_t bitrev2r_table_2048_fc32_size;
+
+extern const uint16_t bitrev2r_table_4096_fc32[];
+extern const uint16_t bitrev2r_table_4096_fc32_size;
+
+void dsps_fft2r_rev_tables_init_fc32(void);
+extern uint16_t *dsps_fft2r_rev_tables_fc32[];
+extern const uint16_t dsps_fft2r_rev_tables_fc32_size[];
+
+extern const uint16_t bitrev4r_table_16_fc32[];
+extern const uint16_t bitrev4r_table_16_fc32_size;
+
+extern const uint16_t bitrev4r_table_32_fc32[];
+extern const uint16_t bitrev4r_table_32_fc32_size;
+
+extern const uint16_t bitrev4r_table_64_fc32[];
+extern const uint16_t bitrev4r_table_64_fc32_size;
+
+extern const uint16_t bitrev4r_table_128_fc32[];
+extern const uint16_t bitrev4r_table_128_fc32_size;
+
+extern const uint16_t bitrev4r_table_256_fc32[];
+extern const uint16_t bitrev4r_table_256_fc32_size;
+
+extern const uint16_t bitrev4r_table_512_fc32[];
+extern const uint16_t bitrev4r_table_512_fc32_size;
+
+extern const uint16_t bitrev4r_table_1024_fc32[];
+extern const uint16_t bitrev4r_table_1024_fc32_size;
+
+extern const uint16_t bitrev4r_table_2048_fc32[];
+extern const uint16_t bitrev4r_table_2048_fc32_size;
+
+extern const uint16_t bitrev4r_table_4096_fc32[];
+extern const uint16_t bitrev4r_table_4096_fc32_size;
+
+void dsps_fft4r_rev_tables_init_fc32(void);
+extern uint16_t *dsps_fft4r_rev_tables_fc32[];
+extern const uint16_t dsps_fft4r_rev_tables_fc32_size[];
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_fft_tables_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/fir/include/dsps_fir.h b/tools/sdk/esp32c3/include/esp-dsp/modules/fir/include/dsps_fir.h
new file mode 100644
index 00000000000..b9fb44884ec
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/fir/include/dsps_fir.h
@@ -0,0 +1,147 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fir_H_
+#define _dsps_fir_H_
+
+
+#include "dsp_err.h"
+
+#include "dsps_fir_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief Data struct of f32 fir filter
+ *
+ * This structure used by filter internally. User should access this structure only in case of
+ * extensions for the DSP Library.
+ * All fields of this structure initialized by dsps_fir_init_f32(...) function.
+ */
+typedef struct fir_f32_s {
+    float  *coeffs;     /*!< Pointer to the coefficient buffer.*/
+    float  *delay;      /*!< Pointer to the delay line buffer.*/
+    int     N;          /*!< FIR filter coefficients amount.*/
+    int     pos;        /*!< Position in delay line.*/
+    int     decim;      /*!< Decimation factor.*/
+    int     d_pos;      /*!< Actual decimation counter.*/
+} fir_f32_t;
+
+/**
+ * @brief   initialize structure for 32 bit FIR filter
+ *
+ * Function initialize structure for 32 bit floating point FIR filter
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param fir: pointer to fir filter structure, that must be preallocated
+ * @param coeffs: array with FIR filter coefficients. Must be length N
+ * @param delay: array for FIR filter delay line. Must be length N
+ * @param N: FIR filter length. Length of coeffs and delay arrays.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fir_init_f32(fir_f32_t *fir, float *coeffs, float *delay, int N);
+
+/**
+ * @brief   initialize structure for 32 bit Decimation FIR filter
+ * Function initialize structure for 32 bit floating point FIR filter with decimation
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param fir: pointer to fir filter structure, that must be preallocated
+ * @param coeffs: array with FIR filter coefficients. Must be length N
+ * @param delay: array for FIR filter delay line. Must be length N
+ * @param N: FIR filter length. Length of coeffs and delay arrays.
+ * @param decim: decimation factor.
+ * @param start_pos: initial value of decimation counter. Must be [0..d)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fird_init_f32(fir_f32_t *fir, float *coeffs, float *delay, int N, int decim, int start_pos);
+
+
+/**@{*/
+/**
+ * @brief   FIR filter
+ *
+ * Function implements FIR filter
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param fir: pointer to fir filter structure, that must be initialized before
+ * @param[in] input: input array
+ * @param[out] output: array with result of FIR filter
+ * @param[in] len: length of input and result arrays
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fir_f32_ansi(fir_f32_t *fir, const float *input, float *output, int len);
+esp_err_t dsps_fir_f32_ae32(fir_f32_t *fir, const float *input, float *output, int len);
+esp_err_t dsps_fir_f32_aes3(fir_f32_t *fir, const float *input, float *output, int len);
+/**@}*/
+
+/**@{*/
+/**
+ *  @brief   Decimation FIR filter
+ *
+ * Function implements FIR filter with decimation
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param fir: pointer to fir filter structure, that must be initialized before
+ * @param input: input array
+ * @param output: array with result of FIR filter
+ * @param len: length of input and result arrays
+ *
+ * @return: function returns amount of samples stored to the output array
+ *          depends on the previous state value could be [0..len/decimation]
+ */
+int dsps_fird_f32_ansi(fir_f32_t *fir, const float *input, float *output, int len);
+int dsps_fird_f32_ae32(fir_f32_t *fir, const float *input, float *output, int len);
+/**@}*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#if CONFIG_DSP_OPTIMIZED
+
+#if (dsps_fir_f32_ae32_enabled == 1)
+#define dsps_fir_f32 dsps_fir_f32_ae32
+#else
+#define dsps_fir_f32 dsps_fir_f32_ansi
+#endif
+
+#if (dsps_fird_f32_ae32_enabled == 1)
+#define dsps_fird_f32 dsps_fird_f32_ae32
+#else
+#define dsps_fird_f32 dsps_fird_f32_ansi
+#endif
+
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_fir_f32 dsps_fir_f32_ansi
+#define dsps_fird_f32 dsps_fird_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_fir_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/fir/include/dsps_fir_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/fir/include/dsps_fir_platform.h
new file mode 100644
index 00000000000..fab2656878f
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/fir/include/dsps_fir_platform.h
@@ -0,0 +1,19 @@
+#ifndef _dsps_fir_platform_H_
+#define _dsps_fir_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_fir_f32_ae32_enabled  1
+#define dsps_fird_f32_ae32_enabled  1
+
+#endif // 
+#endif // __XTENSA__
+
+#endif // _dsps_fir_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad.h b/tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad.h
new file mode 100644
index 00000000000..718a2cc5db0
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad.h
@@ -0,0 +1,67 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_biquad_H_
+#define _dsps_biquad_H_
+
+#include "dsp_err.h"
+
+#include "dsps_biquad_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief   IIR filter
+ *
+ * IIR filter 2nd order direct form II (bi quad)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] input: input array
+ * @param output: output array
+ * @param len: length of input and output vectors
+ * @param coef: array of coefficients. b0,b1,b2,a1,a2
+ *              expected that a0 = 1. b0..b2 - numerator, a0..a2 - denominator
+ * @param w: delay line w0,w1. Length of 2.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_f32_ansi(const float *input, float *output, int len, float *coef, float *w);
+esp_err_t dsps_biquad_f32_ae32(const float *input, float *output, int len, float *coef, float *w);
+esp_err_t dsps_biquad_f32_aes3(const float *input, float *output, int len, float *coef, float *w);
+/**@}*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_biquad_f32_ae32_enabled == 1)
+#define dsps_biquad_f32 dsps_biquad_f32_ae32
+#else
+#define dsps_biquad_f32 dsps_biquad_f32_ansi
+#endif
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_biquad_f32 dsps_biquad_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+
+#endif // _dsps_biquad_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad_gen.h b/tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad_gen.h
new file mode 100644
index 00000000000..750dc4dff99
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad_gen.h
@@ -0,0 +1,200 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_biquad_gen_H_
+#define _dsps_biquad_gen_H_
+
+#include "dsp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+// Common rules for all generated coefficients.
+// The coefficients placed to the array as follows:
+// coeffs[0] = b0;
+// coeffs[1] = b1;
+// coeffs[2] = b2;
+// coeffs[3] = a1;
+// coeffs[4] = a2;
+// a0 - are not placed and expected always as == 1
+
+/**
+ * @brief   LPF IIR filter coefficients
+ * Coefficients for low pass 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter cut off frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_lpf_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   HPF IIR filter coefficients
+ *
+ * Coefficients for high pass 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter cut off frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_hpf_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   BPF IIR filter coefficients
+ *
+ * Coefficients for band pass 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter center frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_bpf_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   0 dB BPF IIR filter coefficients
+ *
+ * Coefficients for band pass 2nd order IIR filter (bi-quad) with 0 dB gain in passband
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter center frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_bpf0db_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   Notch IIR filter coefficients
+ *
+ * Coefficients for notch 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param gain: gain in stopband in dB
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_notch_f32(float *coeffs, float f, float gain, float qFactor);
+
+/**
+ * @brief   Allpass 360 degree IIR filter coefficients
+ *
+ * Coefficients for all pass 2nd order IIR filter (bi-quad) with 360 degree phase shift
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_allpass360_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   Allpass 180 degree IIR filter coefficients
+ *
+ * Coefficients for all pass 2nd order IIR filter (bi-quad) with 180 degree phase shift
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_allpass180_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   peak IIR filter coefficients
+ *
+ * Coefficients for peak 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_peakingEQ_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   low shelf IIR filter coefficients
+ *
+ * Coefficients for low pass Shelf 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param gain: gain in stopband in dB
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_lowShelf_f32(float *coeffs, float f, float gain, float qFactor);
+
+/**
+ * @brief   high shelf IIR filter coefficients
+ *
+ * Coefficients for high pass Shelf 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param gain: gain in stopband in dB
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_highShelf_f32(float *coeffs, float f, float gain, float qFactor);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_biquad_gen_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad_platform.h
new file mode 100644
index 00000000000..e39e851a11f
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad_platform.h
@@ -0,0 +1,18 @@
+#ifndef _dsps_biquad_platform_H_
+#define _dsps_biquad_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_biquad_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+
+#endif // _dsps_biquad_platform_H_
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/kalman/ekf/include/ekf.h b/tools/sdk/esp32c3/include/esp-dsp/modules/kalman/ekf/include/ekf.h
new file mode 100644
index 00000000000..4941ae851c3
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/kalman/ekf/include/ekf.h
@@ -0,0 +1,208 @@
+// Copyright 2020-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _ekf_h_
+#define _ekf_h_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <math.h>
+#include <stdint.h>
+#include <mat.h>
+
+class ekf {
+public:
+    // x - amount of states in EKF. x[n] = F*x[n-1] + G*u + W. Size of matrix F
+    // w - amount of control measurements and noise inputs. Size of matrix G
+
+    ekf(int x, int w);
+
+    virtual ~ekf();
+    virtual void Process(float *u, float dt);
+
+    virtual void Init() = 0;
+    // x[n] = F*x[n-1] + G*u + W
+    int NUMX; // number of states, X is the state vector (size of F matrix)
+    int NUMW; // size of G matrix
+
+    // System state vector
+    dspm::Mat &X;
+
+    // linearized system matrices
+    dspm::Mat &F;
+    dspm::Mat &G;
+
+    // covariance matrix and state vector
+    dspm::Mat &P;
+
+    // input noise and measurement noise variances
+    dspm::Mat &Q;
+
+    /**
+     * Runge-Kutta state update method.
+	 * The method calculates derivatives of input vector x and control measurements u
+     * Re
+     * @param[in] x: state vector
+     * @param[in] u: control measurement
+     * @param[in] dt: time interval from last update in seconds
+     */
+    void RungeKutta(dspm::Mat &x, float *u, float dt);
+
+    // System Dependent methods:
+
+    /**
+     * Derivative of state vector X
+     * Re
+     * @param[in] x: state vector
+     * @param[in] u: control measurement
+     * @return
+     *      - derivative of input vector x and u
+     */
+    virtual dspm::Mat StateXdot(dspm::Mat &x, float *u) = 0;
+    /**
+     * Calculation of system state matrices F and G
+     * @param[in] x: state vector
+     * @param[in] u: control measurement
+     */
+    virtual void LinearizeFG(dspm::Mat &x, float *u) = 0;
+    //
+
+    // System independent methods
+
+    /**
+     * Calculates covariance prediction matrux P.
+	 * Update matrix P
+     * @param[in] dt: time interval from last update
+     */
+    virtual void CovariancePrediction(float dt);
+
+    /**
+     * Update of current state by measured values.
+     * Optimized method for non correlated values
+	 * Calculate Kalman gain and update matrix P and vector X. 
+     * @param[in] H: derivative matrix
+     * @param[in] measured: array of measured values
+     * @param[in] expected: array of expected values
+     * @param[in] R: measurement noise covariance values
+     */
+    virtual void Update(dspm::Mat &H, float *measured, float *expected, float *R);
+    /**
+     * Update of current state by measured values.
+     * This method just as a reference for research purpose.
+     * Not used in real calculations.
+     * @param[in] H: derivative matrix
+     * @param[in] measured: array of measured values
+     * @param[in] expected: array of expected values
+     * @param[in] R: measurement noise covariance values
+     */
+    virtual void UpdateRef(dspm::Mat &H, float *measured, float *expected, float *R);
+
+
+    float *HP;
+    float *Km;
+
+public:
+    // Additional universal helper methods
+    /**
+     * Convert quaternion to rotation matrix.
+     * @param[in] q: quaternion
+     *
+     * @return
+     *      - rotation matrix 3x3
+     */
+    static dspm::Mat quat2rotm(float q[4]);
+
+    /**
+     * Convert rotation matrix to quaternion.
+     * @param[in] R: rotation matrix
+     *
+     * @return
+     *      - quaternion 4x1
+     */
+    static dspm::Mat rotm2quat(dspm::Mat &R);
+
+    /**
+     * Convert quaternion to Euler angels.
+     * @param[in] R: quaternion
+     *
+     * @return
+     *      - Euler angels 3x1
+     */
+    static dspm::Mat quat2eul(const float q[4]);
+    /**
+     * Convert Euler angels to rotation matrix.
+     * @param[in] xyz: Euler angels
+     *
+     * @return
+     *      - rotation matrix 3x3
+     */
+    static dspm::Mat eul2rotm(float xyz[3]);
+
+    /**
+     * Convert rotation matrix to Euler angels.
+     * @param[in] rotm: rotation matrix
+     *
+     * @return
+     *      - Euler angels 3x1
+     */
+    static dspm::Mat rotm2eul(dspm::Mat &rotm);
+
+    /**
+     * Df/dq:  Derivative of vector by quaternion.
+     * @param[in] vector: input vector
+     * @param[in] quat: quaternion
+     *
+     * @return
+     *      - Derivative matrix 3x4
+     */
+    static dspm::Mat dFdq(dspm::Mat &vector, dspm::Mat &quat);
+
+    /**
+     * Df/dq: Derivative of vector by inverted quaternion.
+     * @param[in] vector: input vector
+     * @param[in] quat: quaternion
+     *
+     * @return
+     *      - Derivative matrix 3x4
+     */
+    static dspm::Mat dFdq_inv(dspm::Mat &vector, dspm::Mat &quat);
+
+    /**
+     * Make skew-symmetric matrix of vector.
+     * @param[in] w: source vector
+     *
+     * @return
+     *      - skew-symmetric matrix 4x4
+     */
+    static dspm::Mat SkewSym4x4(float *w);
+
+    // q product
+    // Rl = [q(1) - q(2) - q(3) - q(4); ...
+    //      q(2)  q(1) - q(4)  q(3); ...
+    //      q(3)  q(4)  q(1) - q(2); ...
+    //      q(4) - q(3)  q(2)  q(1); ...
+
+    /**
+     * Make right quaternion-product matrices.
+     * @param[in] q: source quaternion
+     *
+     * @return
+     *      - right quaternion-product matrix 4x4
+     */
+    static dspm::Mat qProduct(float *q);
+
+};
+
+#endif // _ekf_h_
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/kalman/ekf_imu13states/include/ekf_imu13states.h b/tools/sdk/esp32c3/include/esp-dsp/modules/kalman/ekf_imu13states/include/ekf_imu13states.h
new file mode 100644
index 00000000000..e9525e898eb
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/kalman/ekf_imu13states/include/ekf_imu13states.h
@@ -0,0 +1,83 @@
+// Copyright 2020-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ekf_imu13states_H_
+#define _ekf_imu13states_H_
+
+#include "ekf.h"
+
+/**
+* @brief This class is used to process and calculate attitude from imu sensors.
+*
+*   The class use state vector with 13 follows values
+*   X[0..3] - attitude quaternion
+*   X[4..6] - gyroscope bias error, rad/sec
+*   X[7..9] - magnetometer vector value - magn_ampl
+*   X[10..12] - magnetometer offset value - magn_offset
+*
+*   where, reference magnetometer value = magn_ampl*rotation_matrix' + magn_offset
+*/
+class ekf_imu13states: public ekf {
+public:
+    ekf_imu13states();
+    virtual ~ekf_imu13states();
+    virtual void Init();
+
+    // Method calculates Xdot values depends on U
+    // U - gyroscope values in radian per seconds (rad/sec)
+    virtual dspm::Mat StateXdot(dspm::Mat &x, float *u);
+    virtual void LinearizeFG(dspm::Mat &x, float *u);
+
+    // Methods for tests only.
+    void Test();
+    void TestFull(bool enable_att);
+
+    // Initial reference valies magnetometer and accelerometer
+    dspm::Mat mag0;
+    dspm::Mat accel0;
+
+    int NUMU; // number of control measurements
+
+    /**
+     * Update part of system state by reference measurements accelerometer and magnetometer.
+     * Only attitude and gyro bias will be updated.
+     * This method should be used as main method after calibration.
+     * 
+     * @param[in] accel_data: accelerometer measurement vector XYZ in g, where 1 g ~ 9.81 m/s^2
+     * @param[in] magn_data: magnetometer measurement vector XYZ
+     * @param[in] R: measurement noise covariance values for diagonal covariance matrix. Then smaller value, then more you trust them.
+     */
+    void UpdateRefMeasurement(float *accel_data, float *magn_data, float R[6]);
+    /**
+     * Update full system state by reference measurements accelerometer and magnetometer.
+     * This method should be used at calibration phase.
+     * 
+     * @param[in] accel_data: accelerometer measurement vector XYZ in g, where 1 g ~ 9.81 m/s^2
+     * @param[in] magn_data: magnetometer measurement vector XYZ
+     * @param[in] R: measurement noise covariance values for diagonal covariance matrix. Then smaller value, then more you trust them.
+     */
+    void UpdateRefMeasurementMagn(float *accel_data, float *magn_data, float R[6]);
+    /**
+     * Update system state by reference measurements accelerometer, magnetometer and attitude quaternion.
+     * This method could be used when system on constant state or in initialization phase.
+     * @param[in] accel_data: accelerometer measurement vector XYZ in g, where 1 g ~ 9.81 m/s^2
+     * @param[in] magn_data: magnetometer measurement vector XYZ
+     * @param[in] attitude: attitude quaternion
+     * @param[in] R: measurement noise covariance values for diagonal covariance matrix. Then smaller value, then more you trust them.
+     */
+    void UpdateRefMeasurement(float *accel_data, float *magn_data, float *attitude, float R[10]);
+
+};
+
+#endif // _ekf_imu13states_H_
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/add/include/dsps_add.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/add/include/dsps_add.h
new file mode 100644
index 00000000000..32a15eb2f09
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/add/include/dsps_add.h
@@ -0,0 +1,78 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_add_H_
+#define _dsps_add_H_
+#include "dsp_err.h"
+
+#include "dsps_add_platform.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   add two arrays
+ *
+ * The function add one input array to another
+ * out[i*step_out] = input1[i*step1] + input2[i*step2]; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input1: input array 1
+ * @param[in] input2: input array 2
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param step1: step over input array 1 (by default should be 1)
+ * @param step2: step over input array 2 (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_add_f32_ansi(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+esp_err_t dsps_add_f32_ae32(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+
+esp_err_t dsps_add_s16_ansi(const int16_t *input1, const int16_t *input2, int16_t *output, int len, int step1, int step2, int step_out, int shift);
+esp_err_t dsps_add_s16_ae32(const int16_t *input1, const int16_t *input2, int16_t *output, int len, int step1, int step2, int step_out, int shift);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+
+#if (dsps_add_f32_ae32_enabled == 1)
+#define dsps_add_f32 dsps_add_f32_ae32
+#else
+#define dsps_add_f32 dsps_add_f32_ansi
+#endif
+
+#if (dsps_add_s16_ae32_enabled == 1)
+#define dsps_add_s16 dsps_add_s16_ae32
+#else
+#define dsps_add_s16 dsps_add_s16_ansi
+#endif
+
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_add_f32 dsps_add_f32_ansi
+#define dsps_add_s16 dsps_add_s16_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_add_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/add/include/dsps_add_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/add/include/dsps_add_platform.h
new file mode 100644
index 00000000000..2b7b835b0c7
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/add/include/dsps_add_platform.h
@@ -0,0 +1,23 @@
+#ifndef _dsps_add_platform_H_
+#define _dsps_add_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_add_f32_ae32_enabled  1
+
+#endif
+
+#if (XCHAL_HAVE_LOOPS == 1)
+#define dsps_add_s16_ae32_enabled  1
+#endif
+#endif // __XTENSA__
+
+
+#endif // _dsps_add_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/addc/include/dsps_addc.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/addc/include/dsps_addc.h
new file mode 100644
index 00000000000..595320d52ab
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/addc/include/dsps_addc.h
@@ -0,0 +1,65 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_addc_H_
+#define _dsps_addc_H_
+#include "dsp_err.h"
+
+#include "dsps_addc_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   add constant
+ *
+ * The function adds constant to the input array
+ * x[i*step_out] = y[i*step_in] + C; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input: input array
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param C: constant value
+ * @param step_in: step over input array (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_addc_f32_ansi(const float *input, float *output, int len, float C, int step_in, int step_out);
+esp_err_t dsps_addc_f32_ae32(const float *input, float *output, int len, float C, int step_in, int step_out);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_addc_f32_ae32_enabled == 1)
+#define dsps_addc_f32 dsps_addc_f32_ae32
+#else
+#define dsps_addc_f32 dsps_addc_f32_ansi
+#endif
+#else
+#define dsps_addc_f32 dsps_addc_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_addc_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/addc/include/dsps_addc_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/addc/include/dsps_addc_platform.h
new file mode 100644
index 00000000000..70cad5f9629
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/addc/include/dsps_addc_platform.h
@@ -0,0 +1,19 @@
+#ifndef _dsps_addc_platform_H_
+#define _dsps_addc_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_addc_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+
+#endif // _dsps_addc_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/include/dsps_math.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/include/dsps_math.h
new file mode 100644
index 00000000000..878f34d661a
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/include/dsps_math.h
@@ -0,0 +1,25 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_math_H_
+#define _dsps_math_H_
+
+#include "dsps_add.h"
+#include "dsps_sub.h"
+#include "dsps_mul.h"
+#include "dsps_addc.h"
+#include "dsps_mulc.h"
+#include "dsps_sqrt.h"
+
+#endif // _dsps_math_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/mul/include/dsps_mul.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/mul/include/dsps_mul.h
new file mode 100644
index 00000000000..303da36bd24
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/mul/include/dsps_mul.h
@@ -0,0 +1,92 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_mul_H_
+#define _dsps_mul_H_
+#include "dsp_err.h"
+
+#include "dsps_mul_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   Multiply two arrays
+ *
+ * The function multiply one input array to another and store result to other array
+ * out[i*step_out] = input1[i*step1] * input2[i*step2]; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input1: input array 1
+ * @param[in] input2: input array 2
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param step1: step over input array 1 (by default should be 1)
+ * @param step2: step over input array 2 (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_mul_f32_ansi(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+esp_err_t dsps_mul_f32_ae32(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+/**@}*/
+
+
+/**@{*/
+/**
+ * @brief   Multiply two arrays
+ *
+ * The function multiply one input array to another and store result to other array
+ * out[i*step_out] = input1[i*step1] * input2[i*step2]; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input1: input array 1
+ * @param[in] input2: input array 2
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param step1: step over input array 1 (by default should be 1)
+ * @param step2: step over input array 2 (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ * @param shift: output shift after multiplication (by default should be 15)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_mul_s16_ansi(const int16_t *input1, const int16_t *input2, int16_t *output, int len, int step1, int step2, int step_out, int shift);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_mul_f32_ae32_enabled == 1)
+#define dsps_mul_f32 dsps_mul_f32_ae32
+#else
+#define dsps_mul_f32 dsps_mul_f32_ansi
+#endif //
+#define dsps_mul_s16 dsps_mul_s16_ansi
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_mul_f32 dsps_mul_f32_ansi
+#define dsps_mul_s16 dsps_mul_s16_ansi
+#endif
+#endif // _dsps_mul_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/mul/include/dsps_mul_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/mul/include/dsps_mul_platform.h
new file mode 100644
index 00000000000..3eb8824076a
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/mul/include/dsps_mul_platform.h
@@ -0,0 +1,18 @@
+#ifndef _dsps_mul_platform_H_
+#define _dsps_mul_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_mul_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+#endif // _dsps_mul_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/mulc/include/dsps_mulc.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/mulc/include/dsps_mulc.h
new file mode 100644
index 00000000000..6b8ff167259
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/mulc/include/dsps_mulc.h
@@ -0,0 +1,75 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_mulc_H_
+#define _dsps_mulc_H_
+#include "dsp_err.h"
+
+#include "dsps_mulc_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief   multiply constant
+ *
+ * The function multiplies input array to the constant value
+ * x[i*step_out] = y[i*step_in]*C; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input: input array
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param C: constant value
+ * @param step_in: step over input array (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_mulc_f32_ansi(const float *input, float *output, int len, float C, int step_in, int step_out);
+esp_err_t dsps_mulc_f32_ae32(const float *input, float *output, int len, float C, int step_in, int step_out);
+
+esp_err_t dsps_mulc_s16_ae32(const int16_t *input, int16_t *output, int len, int16_t C, int step_in, int step_out);
+esp_err_t dsps_mulc_s16_ansi(const int16_t *input, int16_t *output, int len, int16_t C, int step_in, int step_out);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_mulc_f32_ae32_enabled == 1)
+#define dsps_mulc_f32 dsps_mulc_f32_ae32
+#else //
+#define dsps_mulc_f32 dsps_mulc_f32_ansi
+#endif
+#if (dsps_mulc_s16_ae32_enabled == 1)
+#define dsps_mulc_s16 dsps_mulc_s16_ae32
+#else
+#define dsps_mulc_s16 dsps_mulc_s16_ansi
+#endif // dsps_mulc_s16_ae32_enabled
+
+#else
+#define dsps_mulc_f32 dsps_mulc_f32_ansi
+#define dsps_mulc_s16 dsps_mulc_s16_ansi
+#endif
+
+
+#endif // _dsps_mulc_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/mulc/include/dsps_mulc_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/mulc/include/dsps_mulc_platform.h
new file mode 100644
index 00000000000..9a7ca118bcf
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/mulc/include/dsps_mulc_platform.h
@@ -0,0 +1,25 @@
+#ifndef _dsps_mulc_platform_H_
+#define _dsps_mulc_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_mulc_f32_ae32_enabled  1
+
+#endif
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dsps_mulc_s16_ae32_enabled 1
+
+#endif //
+#endif // __XTENSA__
+
+
+#endif // _dsps_mulc_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/sqrt/include/dsps_sqrt.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/sqrt/include/dsps_sqrt.h
new file mode 100644
index 00000000000..31edc643ef4
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/sqrt/include/dsps_sqrt.h
@@ -0,0 +1,91 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_sqrt_H_
+#define _dsps_sqrt_H_
+#include "dsp_err.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief   square root approximation
+ *
+ * The function takes square root approximation
+ * x[i] ~ sqrt(y[i]); i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input: input array
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_sqrt_f32_ansi(const float *input, float *output, int len);
+//esp_err_t dsps_sqrt_s32_ansi(const int32_t *input, int16_t *output, int len);
+
+/**@{*/
+/**
+ * @brief   square root approximation
+ *
+ * The function takes square root approximation
+ * x ~ sqrt(y);
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] data: input value
+ *
+ * @return
+ *      - square root value
+ */
+float dsps_sqrtf_f32_ansi(const float data);
+
+
+/**@{*/
+/**
+ * @brief   inverted square root approximation
+ *
+ * The function takes inverted square root approximation
+ * x ~ 1/sqrt(y);
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] data: input value
+ *
+ * @return
+ *      - inverted square root value
+ */
+float dsps_inverted_sqrtf_f32_ansi(float data );
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+#define dsps_sqrt_f32 dsps_sqrt_f32_ansi
+#define dsps_sqrtf_f32 dsps_sqrtf_f32_ansi
+#define dsps_inverted_sqrtf_f32 dsps_inverted_sqrtf_f32_ansi
+#else
+#define dsps_sqrt_f32 dsps_sqrt_f32_ansi
+#define dsps_sqrtf_f32 dsps_sqrtf_f32_ansi
+#define dsps_inverted_sqrtf_f32 dsps_inverted_sqrtf_f32_ansi
+#endif
+
+#endif // _dsps_sqrt_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/sub/include/dsps_sub.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/sub/include/dsps_sub.h
new file mode 100644
index 00000000000..2dc1adf3395
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/sub/include/dsps_sub.h
@@ -0,0 +1,67 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_sub_H_
+#define _dsps_sub_H_
+#include "dsp_err.h"
+
+#include "dsps_sub_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   sub arrays
+ *
+ * The function subtract one array from another
+ * out[i*step_out] = input1[i*step1] - input2[i*step2]; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input1: input array 1
+ * @param[in] input2: input array 2
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param step1: step over input array 1 (by default should be 1)
+ * @param step2: step over input array 2 (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_sub_f32_ansi(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+esp_err_t dsps_sub_f32_ae32(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+
+#if (dsps_sub_f32_ae32_enabled == 1)
+#define dsps_sub_f32 dsps_sub_f32_ae32
+#else
+#define dsps_sub_f32 dsps_sub_f32_ansi
+#endif
+#else
+#define dsps_sub_f32 dsps_sub_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+
+#endif // _dsps_sub_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/math/sub/include/dsps_sub_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/math/sub/include/dsps_sub_platform.h
new file mode 100644
index 00000000000..6c67f307414
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/math/sub/include/dsps_sub_platform.h
@@ -0,0 +1,18 @@
+#ifndef _dsps_sub_platform_H_
+#define _dsps_sub_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_sub_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+#endif // _dsps_sub_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/matrix/include/dspm_mult.h b/tools/sdk/esp32c3/include/esp-dsp/modules/matrix/include/dspm_mult.h
new file mode 100644
index 00000000000..fd1198da55e
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/matrix/include/dspm_mult.h
@@ -0,0 +1,192 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dspm_mult_H_
+#define _dspm_mult_H_
+
+#include "dsp_err.h"
+#include "dspm_mult_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief   Matrix multiplication
+ *
+ * Matrix multiplication for two floating point matrices: C[m][k] = A[m][n] * B[n][k]
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[m][n]
+ * @param[in] B  input matrix B[n][k]
+ * @param C  result matrix C[m][k]
+ * @param[in] m  matrix dimension
+ * @param[in] n  matrix dimension
+ * @param[in] k  matrix dimension
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspm_mult_f32_ansi(const float *A, const float *B, float *C, int m, int n, int k);
+esp_err_t dspm_mult_f32_ae32(const float *A, const float *B, float *C, int m, int n, int k);
+esp_err_t dspm_mult_f32_aes3(const float *A, const float *B, float *C, int m, int n, int k);
+/**@}*/
+
+
+/**
+ * @brief   Matrix multiplication A[3x3]xB[3x1]
+ *
+ * Matrix multiplication for two floating point matrices 3x3 and 3x1: C[1][3] = A[3][3] * B[3][1]
+ * The implementation is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[3][3]
+ * @param[in] B  input matrix/vector B[3][1]
+ * @param C  result matrix/vector C[3][3]
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspm_mult_3x3x1_f32_ae32(const float *A, const float *B, float *C);
+
+/**
+ * @brief   Matrix multiplication A[3x3]xB[3x3]
+ *
+ * Matrix multiplication for two square 3x3 floating point matrices: C[3][3] = A[3][3] * B[3][3]
+ * The implementation is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[3][3]
+ * @param[in] B  input matrix B[3][3]
+ * @param C  result matrix C[3][3]
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspm_mult_3x3x3_f32_ae32(const float *A, const float *B, float *C);
+
+/**
+ * @brief   Matrix multiplication A[4x4]xB[4x1]
+ *
+ * Matrix multiplication for two floating point matrices 4x4 and 4x1: C[1][4] = A[4][4] * B[4][1]
+ * The implementation is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[4][4]
+ * @param[in] B  input matrix/vector B[4][1]
+ * @param C  result matrix/vector C[4][4]
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+
+esp_err_t dspm_mult_4x4x1_f32_ae32(const float *A, const float *B, float *C);
+
+/**
+ * @brief   Matrix multiplication A[4x4]xB[4x4]
+ *
+ * Matrix multiplication for two square 3x3 floating point matrices: C[4][4] = A[4][4] * B[4][4]
+ * The implementation is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[4][4]
+ * @param[in] B  input matrix B[4][4]
+ * @param C  result matrix C[4][4]
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspm_mult_4x4x4_f32_ae32(const float *A, const float *B, float *C);
+
+/**@{*/
+/**
+ * @brief   Matrix multiplication 16 bit signeg int
+ *
+ * Matrix multiplication for two signed 16 bit fixed point matrices: C[m][k] = (A[m][n] * B[n][k]) >> (15- shift)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[m][n]
+ * @param[in] B  input matrix B[n][k]
+ * @param C  result matrix C[m][k]
+ * @param[in] m  matrix dimension
+ * @param[in] n  matrix dimension
+ * @param[in] k  matrix dimension
+ * @param[in] shift every result will be shifted and stored as 16 bit signed value.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspm_mult_s16_ansi(const int16_t *A, const int16_t *B, int16_t *C, int m, int n, int k, int shift);
+esp_err_t dspm_mult_s16_ae32(const int16_t *A, const int16_t *B, int16_t *C, int m, int n, int k, int shift);
+esp_err_t dspm_mult_s16_aes3(const int16_t *A, const int16_t *B, int16_t *C, int m, int n, int k, int shift);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+
+
+    #if (dspm_mult_s16_aes3_enabled == 1)
+        #define dspm_mult_s16 dspm_mult_s16_aes3
+    #elif (dspm_mult_s16_ae32_enabled == 1)
+        #define dspm_mult_s16 dspm_mult_s16_ae32
+    #else
+        #define dspm_mult_s16 dspm_mult_s16_ansi
+    #endif
+
+    #if (dspm_mult_f32_aes3_enabled == 1)
+        #define dspm_mult_f32 dspm_mult_f32_aes3
+    #elif (dspm_mult_f32_ae32_enabled == 1)
+        #define dspm_mult_f32 dspm_mult_f32_ae32
+    #else
+        #define dspm_mult_f32 dspm_mult_f32_ansi
+    #endif
+
+    #if (dspm_mult_3x3x1_f32_ae32_enabled == 1)
+        #define dspm_mult_3x3x1_f32 dspm_mult_3x3x1_f32_ae32
+    #else
+        #define dspm_mult_3x3x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 3, 3, 1)
+    #endif
+    #if (dspm_mult_3x3x3_f32_ae32_enabled == 1)
+        #define dspm_mult_3x3x3_f32(A,B,C) dspm_mult_3x3x3_f32_ae32(A,B,C)
+    #else
+        #define dspm_mult_3x3x3_f32(A,B,C) dspm_mult_f32_ansi(A,B,B,3,3,3);
+    #endif
+    #if (dspm_mult_4x4x1_f32_ae32_enabled == 1)
+    #define dspm_mult_4x4x1_f32(A,B,C) dspm_mult_4x4x1_f32_ae32(A,B,C)
+    #else
+    #define dspm_mult_4x4x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 1)
+    #endif
+
+    #if (dspm_mult_f32_aes3_enabled == 1)
+    #define dspm_mult_4x4x4_f32(A,B,C) dspm_mult_f32_aes3(A,B,C, 4, 4, 4)
+    #elif (dspm_mult_4x4x4_f32_ae32_enabled == 1)
+    #define dspm_mult_4x4x4_f32 dspm_mult_4x4x4_f32_ae32
+    #else
+    #define dspm_mult_4x4x4_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 4)
+    #endif
+
+#else
+    #define dspm_mult_s16 dspm_mult_s16_ansi
+    #define dspm_mult_f32 dspm_mult_f32_ansi
+    #define dspm_mult_3x3x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 3, 3, 1)
+    #define dsps_sub_f32 dsps_sub_f32_ansi
+    #define dsps_add_f32 dsps_add_f32_ansi
+    #define dspm_mult_4x4x4_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 4)
+#endif // CONFIG_DSP_OPTIMIZED
+
+
+#endif // _dspm_mult_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/matrix/include/dspm_mult_platform.h b/tools/sdk/esp32c3/include/esp-dsp/modules/matrix/include/dspm_mult_platform.h
new file mode 100644
index 00000000000..ccc037c5cef
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/matrix/include/dspm_mult_platform.h
@@ -0,0 +1,33 @@
+#ifndef _dspm_mult_platform_H_
+#define _dspm_mult_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dspm_mult_f32_ae32_enabled 1
+#define dspm_mult_3x3x1_f32_ae32_enabled 1
+#define dspm_mult_3x3x3_f32_ae32_enabled 1
+#define dspm_mult_4x4x1_f32_ae32_enabled 1
+#define dspm_mult_4x4x4_f32_ae32_enabled 1
+
+#endif
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dspm_mult_s16_ae32_enabled 1
+
+#endif
+#endif // __XTENSA__
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#define dspm_mult_f32_aes3_enabled 1
+#define dspm_mult_s16_aes3_enabled 1
+#endif 
+
+#endif // _dspm_mult_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/matrix/include/mat.h b/tools/sdk/esp32c3/include/esp-dsp/modules/matrix/include/mat.h
new file mode 100644
index 00000000000..0d1530b427a
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/matrix/include/mat.h
@@ -0,0 +1,533 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dspm_mat_h_
+#define _dspm_mat_h_
+#include <iostream>
+
+/**
+ * @brief   DSP matrix namespace
+ *
+ * DSP library matrix namespace.
+ */
+namespace dspm {
+/**
+ * @brief   Matrix
+ *
+ * The Mat class provides basic matrix operations on single-precision floating point values.
+ */
+class Mat {
+public:
+    /**
+     * Constructor allocate internal buffer.
+     * @param[in] rows: amount of matrix rows
+     * @param[in] cols: amount of matrix columns
+     */
+    Mat(int rows, int cols);
+    /**
+    * Constructor use external buffer.
+     * @param[in] data: external buffer with row-major matrix data
+     * @param[in] rows: amount of matrix rows
+     * @param[in] cols: amount of matrix columns
+    */
+    Mat(float *data, int rows, int cols);
+    /**
+     * Allocate matrix with undefined size.
+     */
+    Mat();
+    virtual ~Mat();
+    /**
+     * Make copy of matrix.
+     * @param[in] src: source matrix
+     */
+    Mat(const Mat &src);
+
+    /**
+     * Make copy of matrix.
+     * @param[in] src: source matrix
+     * @param[in] row_pos: start row position of destination matrix
+     * @param[in] col_pos: start col position of destination matrix
+     */
+    void Copy(const Mat &src, int row_pos, int col_pos);
+
+    /**
+     * Make copy of matrix.
+     * @param[in] row_start: start row position of source matrix to copy
+     * @param[in] row_size: size of wor elements of source matrix to copy
+     * @param[in] col_start: start col position of source matrix to copy
+     * @param[in] col_size: size of wor elements of source matrix to copy
+     * 
+     * @return
+     *      - result matrix size row_size x col_size 
+     */
+    Mat Get(int row_start, int row_size, int col_start, int col_size);
+
+    /**
+     * Copy operator
+     *
+     * @param[in] src: source matrix
+     *
+     * @return
+     *      - matrix copy
+     */
+    Mat &operator=(const Mat &src);
+
+    bool ext_buff; /*!< Flag indicates that matrix use external buffer*/
+
+    /**
+     * Access to the matrix elements.
+     * @param[in] row: row position
+     * @param[in] col: column position
+     *
+     * @return
+     *      - element of matrix M[row][col]
+     */
+    inline float &operator()(int row, int col)
+    {
+        return data[row * this->cols + col];
+    }
+    /**
+     * Access to the matrix elements.
+     * @param[in] row: row position
+     * @param[in] col: column position
+     *
+     * @return
+     *      - element of matrix M[row][col]
+     */
+    inline const float &operator()(int row, int col) const
+    {
+        return data[row * this->cols + col];
+    }
+
+    /**
+     * += operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] A: source matrix
+     *
+     * @return
+     *      - result matrix: result += A
+     */
+    Mat &operator+=(const Mat &A);
+
+    /**
+     * += operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] C: constant
+     *
+     * @return
+     *      - result matrix: result += C
+     */
+    Mat &operator+=(float C);
+    /**
+     * -= operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] A: source matrix
+     *
+     * @return
+     *      - result matrix: result -= A
+     */
+    Mat &operator-=(const Mat &A);
+
+    /**
+     * -= operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] C: constant
+     *
+     * @return
+     *      - result matrix: result -= C
+     */
+    Mat &operator-=(float C);
+
+    /**
+     * *= operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] A: source matrix
+     *
+     * @return
+     *      - result matrix: result -= A
+     */
+    Mat &operator*=(const Mat &A);
+    /**
+     * += with constant operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] C: constant value
+     *
+     * @return
+     *      - result matrix: result *= C
+     */
+    Mat &operator*=(float C);
+    /**
+     * /= with constant operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] C: constant value
+     *
+     * @return
+     *      - result matrix: result /= C
+     */
+    Mat &operator/=(float C);
+    /**
+     * /= operator
+     *
+     * @param[in] B: source matrix
+     *
+     * @return
+     *      - result matrix: result[i,j] = result[i,j]/B[i,j]
+     */
+    Mat &operator/=(const Mat &B);
+    /**
+     * ^= xor with constant operator
+     * The operator use DSP optimized implementation of multiplication.
+     * @param[in] C: constant value
+     *
+     * @return
+     *      - result matrix: result ^= C
+     */
+    Mat  operator^(int C);
+
+    /**
+     * Swap two rows between each other.
+     * @param[in] row1: position of first row
+     * @param[in] row2: position of second row
+     */
+    void swapRows(int row1, int row2);
+    /**
+     * Matrix transpose.
+     * Change rows and columns between each other.
+     *
+     * @return
+     *      - transposed matrix
+     */
+    Mat t();
+
+    /**
+     * Create identity matrix.
+     * Create a square matrix and fill diagonal with 1.
+     *
+     * @param[in] size: matrix size
+     *
+     * @return
+     *      - matrix [N]x[N] with 1 in diagonal
+     */
+    static Mat eye(int size);
+
+    /**
+     * Create matrix with all elements 1.
+     * Create a square matrix and fill all elements with 1.
+     *
+     * @param[in] size: matrix size
+     *
+     * @return
+     *      - matrix [N]x[N] with 1 in all elements
+     */
+    static Mat ones(int size);
+
+    /**
+     * Return part of matrix from defined position (startRow, startCol) as a matrix[blockRows x blockCols].
+     *
+     * @param[in] startRow: start row position
+     * @param[in] startCol: start column position
+     * @param[in] blockRows: amount of rows in result matrix
+     * @param[in] blockCols: amount of columns in the result matrix
+     *
+     * @return
+     *      - matrix [blockRows]x[blockCols]
+     */
+    Mat block(int startRow, int startCol, int blockRows, int blockCols);
+
+    /**
+     * Normalizes the vector, i.e. divides it by its own norm.
+     * If it's matrix, calculate matrix norm
+     *
+     */
+    void normalize(void);
+
+    /**
+     * Return  norm of the vector.
+     * If it's matrix, calculate matrix norm
+     *
+     * @return
+     *      - matrix norm
+     */
+    float norm(void);
+
+    /**
+     * The method fill 0 to the matrix structure.
+     *
+     */
+    void clear(void);
+
+    /**
+     * @brief   Solve the matrix
+     *
+     * Solve matrix. Find roots for the matrix A*x = b
+     *
+     * @param[in] A: matrix [N]x[N] with input coefficients
+     * @param[in] b: vector [N]x[1] with result values
+     *
+     * @return
+     *      - matrix [N]x[1] with roots
+     */
+    static Mat solve(Mat A, Mat b);
+    /**
+     * @brief   Band solve the matrix
+     *
+     * Solve band matrix. Find roots for the matrix A*x = b with bandwidth k.
+     *
+     * @param[in] A: matrix [N]x[N] with input coefficients
+     * @param[in] b: vector [N]x[1] with result values
+     * @param[in] k: upper bandwidth value
+     *
+     * @return
+     *      - matrix [N]x[1] with roots
+     */
+    static Mat bandSolve(Mat A, Mat b, int k);
+    /**
+     * @brief   Solve the matrix
+     *
+     * Different way to solve the matrix. Find roots for the matrix A*x = y
+     *
+     * @param[in] A: matrix [N]x[N] with input coefficients
+     * @param[in] y: vector [N]x[1] with result values
+     *
+     * @return
+     *      - matrix [N]x[1] with roots
+     */
+    static Mat roots(Mat A, Mat y);
+
+    /**
+     * @brief   Dotproduct of two vectors
+     *
+     * The method returns dotproduct of two vectors
+     *
+     * @param[in] A: Input vector A Nx1
+     * @param[in] B: Input vector B Nx1
+     *
+     * @return
+     *      - dotproduct value
+     */
+    static float dotProduct(Mat A, Mat B);
+
+    /**
+     * @brief   Augmented matrices
+     *
+     * Augmented matrices
+     *
+     * @param[in] A: Input vector A MxN
+     * @param[in] B: Input vector B MxK
+     *
+     * @return
+     *      - Augmented matrix Mx(N+K)
+     */
+    static Mat augment(Mat A, Mat B);
+    /**
+     * @brief   Gaussian Elimination
+     *
+     * Gaussian Elimination of matrix
+     *
+     * @return
+     *      - result matrix
+     */
+    Mat gaussianEliminate();
+
+    /**
+     * Row reduction for Gaussian elimination
+     *
+     * @return
+     *      - result matrix
+     */
+    Mat rowReduceFromGaussian();
+
+    /**
+     * Find the inverse matrix
+     *
+     * @return
+     *      - inverse matrix
+     */
+    Mat inverse();
+
+    /**
+     * Find pseudo inverse matrix
+     *
+     * @return
+     *      - inverse matrix
+     */
+    Mat pinv();
+
+    int rows; /*!< Amount of rows*/
+    int cols; /*!< Amount of columns*/
+    float *data; /*!< Buffer with matrix data*/
+    int length; /*!< Total amount of data in data array*/
+
+    static float abs_tol; /*!< Max acceptable absolute tolerance*/
+
+    /**
+     * Find determinant
+     * @param[in] n: element number in first row
+     *
+     * @return
+     *      - determinant value
+     */
+	float det(int n);
+private:
+	Mat cofactor(int row, int col, int n);
+	Mat adjoint();
+
+    void allocate(); // Allocate buffer
+    Mat expHelper(const Mat &m, int num);
+};
+/**
+ * Print matrix to the standard iostream.
+ * @param[in] os: output stream
+ * @param[in] m: matrix to print
+ *
+ * @return
+ *      - output stream
+ */
+std::ostream &operator<<(std::ostream &os, const Mat &m);
+/**
+ * Fill the matrix from iostream.
+ * @param[in] is: input stream
+ * @param[in] m: matrix to fill
+ *
+ * @return
+ *      - input stream
+ */
+std::istream &operator>>(std::istream &is, Mat &m);
+
+/**
+ * + operator, sum of two matrices
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] B: Input matrix B
+ *
+ * @return
+ *     - result matrix A+B
+*/
+Mat operator+(const Mat &A, const Mat &B);
+/**
+ * + operator, sum of matrix with constant
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] C: Input constant
+ *
+ * @return
+ *     - result matrix A+C
+*/
+Mat operator+(const Mat &A, float C);
+
+/**
+ * - operator, subtraction of two matrices
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] B: Input matrix B
+ *
+ * @return
+ *     - result matrix A-B
+*/
+Mat operator-(const Mat &A, const Mat &B);
+/**
+ * - operator, sum of matrix with constant
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] C: Input constant
+ *
+ * @return
+ *     - result matrix A+C
+*/
+Mat operator-(const Mat &A, float C);
+
+/**
+ * * operator, multiplication of two matrices.
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] B: Input matrix B
+ *
+ * @return
+ *     - result matrix A*B
+*/
+Mat operator*(const Mat &A, const Mat &B);
+
+/**
+ * * operator, multiplication of matrix with constant
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] C: floating point value
+ *
+ * @return
+ *     - result matrix A*B
+*/
+Mat operator*(const Mat &A, float C);
+
+/**
+ * * operator, multiplication of matrix with constant
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] C: floating point value
+ * @param[in] A: Input matrix A
+ *
+ * @return
+ *     - result matrix A*B
+*/
+Mat operator*(float C, const Mat &A);
+
+/**
+ * / operator, divide of matrix by constant
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] C: floating point value
+ *
+ * @return
+ *     - result matrix A*B
+*/
+Mat operator/(const Mat &A, float C);
+
+/**
+ * / operator, divide matrix A by matrix B
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] B: Input matrix B
+ *
+ * @return
+ *     - result matrix C, where C[i,j] = A[i,j]/B[i,j]
+*/
+Mat operator/(const Mat &A, const Mat &B);
+
+/**
+ * == operator, compare two matrices
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] B: Input matrix B
+ *
+ * @return
+ *      - true if matrices are the same
+ *      - false if matrices are different
+*/
+bool operator==(const Mat &A, const Mat &B);
+
+}
+#endif //_dspm_mat_h_
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_d_gen.h b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_d_gen.h
new file mode 100644
index 00000000000..8eacae8650b
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_d_gen.h
@@ -0,0 +1,47 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_d_gen_H_
+#define _dsps_d_gen_H_
+#include "dsp_err.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   delta function 
+ * 
+ * The function generate delta function.
+ * output[i]=0, if i=[0..N)
+ * output[i]=1, if i=pos, pos: [0..N-1)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param output: output array.
+ * @param len: length of the input signal
+ * @param pos: delta function position
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_d_gen_f32(float *output, int len, int pos);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_d_gen_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_h_gen.h b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_h_gen.h
new file mode 100644
index 00000000000..a19bef1b7e1
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_h_gen.h
@@ -0,0 +1,48 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_h_gen_H_
+#define _dsps_h_gen_H_
+#include "dsp_err.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Heviside function 
+ * 
+ * The Heviside function.
+ * output[i]=0, if i=[0..pos)
+ * output[i]=1, if i=[pos..N)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param output: output array.
+ * @param len: length of the input signal
+ * @param pos: heviside function position
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+
+esp_err_t dsps_h_gen_f32(float *output, int len, int pos);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_h_gen_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_sfdr.h b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_sfdr.h
new file mode 100644
index 00000000000..1b7decc0b47
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_sfdr.h
@@ -0,0 +1,51 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_sfdr_H_
+#define _dsps_sfdr_H_
+
+
+#include "dsp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   SFDR
+ * 
+ * The function calculates Spurious-Free Dynamic Range.
+ * The function makes FFT of the input, then search a spectrum maximum, and then compare
+ * maximum value with all others. Result calculated as minimum value.
+ * This function have to be used for debug and unit tests only. It's not optimized for real-time processing.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input: input array.
+ * @param len: length of the input signal
+ * @param use_dc: this parameter define will be DC value used for calculation or not.
+ *                0 - SNR will not include DC power
+ *                1 - SNR will include DC power
+ *
+ * @return
+ *      - SFDR in DB
+ */
+float dsps_sfdr_f32(const float *input, int32_t len, int8_t use_dc);
+float dsps_sfdr_fc32(const float *input, int32_t len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_sfdr_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_snr.h b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_snr.h
new file mode 100644
index 00000000000..163df4decee
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_snr.h
@@ -0,0 +1,51 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _DSP_SNR_H_
+#define _DSP_SNR_H_
+
+#include "dsp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   SNR
+ * 
+ * The function calculates signal to noise ration in case if signal is sine tone.
+ * The function makes FFT of the input, then search a spectrum maximum, and then calculated
+ * SNR as sum of all harmonics to the maximum value.
+ * This function have to be used for debug and unit tests only. It's not optimized for real-time processing.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param input: input array.
+ * @param len: length of the input signal
+ * @param use_dc: this parameter define will be DC value used for calculation or not.
+ *                0 - SNR will not include DC power
+ *                1 - SNR will include DC power
+ *
+ * @return
+ *      - SNR in dB
+ */
+float dsps_snr_f32(const float *input, int32_t len, uint8_t use_dc);
+float dsps_snr_fc32(const float *input, int32_t len);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _DSP_SNR_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_tone_gen.h b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_tone_gen.h
new file mode 100644
index 00000000000..281e3b6b070
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_tone_gen.h
@@ -0,0 +1,48 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_tone_gen_H_
+#define _dsps_tone_gen_H_
+#include "dsp_err.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   tone
+ * 
+ * The function generate a tone signal.
+ * x[i]=A*sin(2*PI*i + ph/180*PI)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param output: output array.
+ * @param len: length of the input signal
+ * @param Ampl: amplitude
+ * @param freq: Naiquist frequency -1..1
+ * @param phase: phase in degree
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_tone_gen_f32(float *output, int len, float Ampl, float freq, float phase);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_tone_gen_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_view.h b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_view.h
new file mode 100644
index 00000000000..49c3022cbe2
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/support/include/dsps_view.h
@@ -0,0 +1,64 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_view_H_
+#define _dsps_view_H_
+
+#include "dsp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief   plot view
+ * 
+ * Generic view function.
+ * This function takes input samples and show then in console view as a plot.
+ * The main purpose to give and draft debug information to the DSP developer.
+ *
+ * @param[in] data: array with input samples.
+ * @param len: length of the input array
+ * @param width: plot width in symbols
+ * @param height: plot height in lines
+ * @param min: minimum value that will be limited by Axis Y.
+ * @param max: maximum value that will be limited by Axis Y.
+ * @param view_char: character to draw the plot calues ('.' or '|' etc)
+ *
+ */
+void dsps_view(const float *data, int32_t len, int width, int height, float min, float max, char view_char);
+void dsps_view_s16(const int16_t *data, int32_t len, int width, int height, float min, float max, char view_char);
+/**@}*/ 
+
+/**
+ * @brief   spectrum view
+ * 
+ * The view function to show spectrum values  in 64x10 screen.
+ * The function based on dsps_view.
+ *
+ * @param[in] data: array with input samples.
+ * @param len: length of the input array
+ * @param min: minimum value that will be limited by Axis Y.
+ * @param max: maximum value that will be limited by Axis Y.
+ *
+ */
+void dsps_view_spectrum(const float *data, int32_t len, float min, float max);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_view_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/windows/blackman/include/dsps_wind_blackman.h b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/blackman/include/dsps_wind_blackman.h
new file mode 100644
index 00000000000..4c7475a519a
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/blackman/include/dsps_wind_blackman.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_blackman_H_
+#define _dsps_wind_blackman_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Blackman window
+ * 
+ * The function generates Blackman window for plpha = 0.16.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_blackman_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_blackman_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/windows/blackman_harris/include/dsps_wind_blackman_harris.h b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/blackman_harris/include/dsps_wind_blackman_harris.h
new file mode 100644
index 00000000000..5f93a7b639c
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/blackman_harris/include/dsps_wind_blackman_harris.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_blackman_harris_H_
+#define _dsps_wind_blackman_harris_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Blackman-Harris window
+ * 
+ * The function generates Blackman-Harris window.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_blackman_harris_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_blackman_harris_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/windows/blackman_nuttall/include/dsps_wind_blackman_nuttall.h b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/blackman_nuttall/include/dsps_wind_blackman_nuttall.h
new file mode 100644
index 00000000000..10b525785ec
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/blackman_nuttall/include/dsps_wind_blackman_nuttall.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_blackman_nuttall_H_
+#define _dsps_wind_blackman_nuttall_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Blackman-Nuttall window
+ * 
+ * The function generates Blackman-Nuttall window.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_blackman_nuttall_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_blackman_nuttall_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/windows/flat_top/include/dsps_wind_flat_top.h b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/flat_top/include/dsps_wind_flat_top.h
new file mode 100644
index 00000000000..85d83e50670
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/flat_top/include/dsps_wind_flat_top.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_flat_top_H_
+#define _dsps_wind_flat_top_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Flat-Top window
+ * 
+ * The function generates Flat-Top window.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_flat_top_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_flat_top_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/windows/hann/include/dsps_wind_hann.h b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/hann/include/dsps_wind_hann.h
new file mode 100644
index 00000000000..2c682570136
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/hann/include/dsps_wind_hann.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_hann_H_
+#define _dsps_wind_hann_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Hann window
+ * 
+ * The function generates Hann window.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_hann_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_hann_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/windows/include/dsps_wind.h b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/include/dsps_wind.h
new file mode 100644
index 00000000000..c8e3404a44f
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/include/dsps_wind.h
@@ -0,0 +1,26 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_H_
+#define _dsps_wind_H_
+
+#include "dsps_wind_hann.h"
+#include "dsps_wind_blackman.h"
+#include "dsps_wind_blackman_harris.h"
+#include "dsps_wind_blackman_nuttall.h"
+#include "dsps_wind_nuttall.h"
+#include "dsps_wind_flat_top.h"
+
+#endif // _dsps_wind_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp-dsp/modules/windows/nuttall/include/dsps_wind_nuttall.h b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/nuttall/include/dsps_wind_nuttall.h
new file mode 100644
index 00000000000..180cb923300
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp-dsp/modules/windows/nuttall/include/dsps_wind_nuttall.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_nuttall_H_
+#define _dsps_wind_nuttall_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Nuttall window
+ * 
+ * The function generates Nuttall window.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_nuttall_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_nuttall_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32c3/include/esp_adc_cal/include/esp_adc_cal.h b/tools/sdk/esp32c3/include/esp_adc_cal/include/esp_adc_cal.h
index 171b2ed8501..445b7f65d34 100644
--- a/tools/sdk/esp32c3/include/esp_adc_cal/include/esp_adc_cal.h
+++ b/tools/sdk/esp32c3/include/esp_adc_cal/include/esp_adc_cal.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef __ESP_ADC_CAL_H__
 #define __ESP_ADC_CAL_H__
diff --git a/tools/sdk/esp32c3/include/esp_common/include/esp_attr.h b/tools/sdk/esp32c3/include/esp_common/include/esp_attr.h
index 7b73af76634..106a686b5e4 100644
--- a/tools/sdk/esp32c3/include/esp_common/include/esp_attr.h
+++ b/tools/sdk/esp32c3/include/esp_common/include/esp_attr.h
@@ -1,17 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 #ifndef __ESP_ATTR_H__
 #define __ESP_ATTR_H__
 
@@ -33,17 +25,24 @@ extern "C" {
 // Forces data into DRAM instead of flash
 #define DRAM_ATTR _SECTION_ATTR_IMPL(".dram1", __COUNTER__)
 
-#ifdef CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
+// IRAM can only be accessed as an 8-bit memory on ESP32, when CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY is set
+#define IRAM_8BIT_ACCESSIBLE (CONFIG_IDF_TARGET_ESP32 && CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY)
+
+// Make sure that IRAM is accessible as an 8-bit memory on ESP32.
+// If that's not the case, coredump cannot dump data from IRAM.
+#if IRAM_8BIT_ACCESSIBLE
 // Forces data into IRAM instead of DRAM
 #define IRAM_DATA_ATTR __attribute__((section(".iram.data")))
 
 // Forces data into IRAM instead of DRAM and map it to coredump
-#define COREDUMP_IRAM_DATA_ATTR _SECTION_ATTR_IMPL(".iram.data.coredump", __COUNTER__)
+#define COREDUMP_IRAM_DATA_ATTR _SECTION_ATTR_IMPL(".iram2.coredump", __COUNTER__)
 
 // Forces bss into IRAM instead of DRAM
 #define IRAM_BSS_ATTR __attribute__((section(".iram.bss")))
 #else
-#define COREDUMP_IRAM_DATA_ATTR
+
+// IRAM is not accessible as an 8-bit memory, put IRAM coredump variables in DRAM
+#define COREDUMP_IRAM_DATA_ATTR COREDUMP_DRAM_ATTR
 #define IRAM_DATA_ATTR
 
 #define IRAM_BSS_ATTR
@@ -103,7 +102,9 @@ extern "C" {
 #define RTC_NOINIT_ATTR  _SECTION_ATTR_IMPL(".rtc_noinit", __COUNTER__)
 
 // Forces code into DRAM instead of flash and map it to coredump
-#define COREDUMP_DRAM_ATTR _SECTION_ATTR_IMPL(".dram1.coredump", __COUNTER__)
+// Use dram2 instead of dram1 to make sure this section will not be included
+// by dram1 section in the linker script
+#define COREDUMP_DRAM_ATTR _SECTION_ATTR_IMPL(".dram2.coredump", __COUNTER__)
 
 // Forces data into RTC memory and map it to coredump
 #define COREDUMP_RTC_DATA_ATTR _SECTION_ATTR_IMPL(".rtc.coredump", __COUNTER__)
diff --git a/tools/sdk/esp32c3/include/esp_common/include/esp_check.h b/tools/sdk/esp32c3/include/esp_common/include/esp_check.h
index 524cb376a38..d0e09cf28f0 100644
--- a/tools/sdk/esp32c3/include/esp_common/include/esp_check.h
+++ b/tools/sdk/esp32c3/include/esp_common/include/esp_check.h
@@ -25,6 +25,7 @@ extern "C" {
  */
 #if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
 #define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                       \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             return err_rc_;                                                                     \
@@ -35,6 +36,7 @@ extern "C" {
  * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
  */
 #define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             return err_rc_;                                                                     \
@@ -46,6 +48,7 @@ extern "C" {
  * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
  */
 #define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             ret = err_rc_;                                                                      \
@@ -57,6 +60,7 @@ extern "C" {
  * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
  */
 #define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             ret = err_rc_;                                                                      \
@@ -69,6 +73,7 @@ extern "C" {
  * and returns with the supplied 'err_code'.
  */
 #define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             return err_code;                                                                    \
         }                                                                                       \
@@ -78,6 +83,7 @@ extern "C" {
  * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
  */
 #define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             return err_code;                                                                    \
         }                                                                                       \
@@ -88,6 +94,7 @@ extern "C" {
  * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
  */
 #define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             ret = err_code;                                                                     \
             goto goto_tag;                                                                      \
@@ -98,6 +105,7 @@ extern "C" {
  * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
  */
 #define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             ret = err_code;                                                                     \
             goto goto_tag;                                                                      \
diff --git a/tools/sdk/esp32c3/include/esp_common/include/esp_err.h b/tools/sdk/esp32c3/include/esp_common/include/esp_err.h
index d31bb9a0753..f317f8a09f5 100644
--- a/tools/sdk/esp32c3/include/esp_common/include/esp_err.h
+++ b/tools/sdk/esp32c3/include/esp_common/include/esp_err.h
@@ -1,16 +1,9 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
 #include <stdint.h>
@@ -46,6 +39,7 @@ typedef int esp_err_t;
 #define ESP_ERR_MESH_BASE           0x4000  /*!< Starting number of MESH error codes */
 #define ESP_ERR_FLASH_BASE          0x6000  /*!< Starting number of flash error codes */
 #define ESP_ERR_HW_CRYPTO_BASE      0xc000  /*!< Starting number of HW cryptography module error codes */
+#define ESP_ERR_MEMPROT_BASE        0xd000  /*!< Starting number of Memory Protection API error codes */
 
 /**
   * @brief Returns string for esp_err_t error codes
diff --git a/tools/sdk/esp32c3/include/esp_common/include/esp_idf_version.h b/tools/sdk/esp32c3/include/esp_common/include/esp_idf_version.h
index 7637b814b65..db04f85f90a 100644
--- a/tools/sdk/esp32c3/include/esp_common/include/esp_idf_version.h
+++ b/tools/sdk/esp32c3/include/esp_common/include/esp_idf_version.h
@@ -23,7 +23,7 @@ extern "C" {
 /** Minor version number (x.X.x) */
 #define ESP_IDF_VERSION_MINOR   4
 /** Patch version number (x.x.X) */
-#define ESP_IDF_VERSION_PATCH   0
+#define ESP_IDF_VERSION_PATCH   1
 
 /**
  * Macro to convert IDF version number into an integer
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_chip_info.h b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_chip_info.h
index 69d23c08d36..0b081d37e1b 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_chip_info.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_chip_info.h
@@ -33,6 +33,7 @@ typedef enum {
 #define CHIP_FEATURE_BLE            BIT(4)      //!< Chip has Bluetooth LE
 #define CHIP_FEATURE_BT             BIT(5)      //!< Chip has Bluetooth Classic
 #define CHIP_FEATURE_IEEE802154     BIT(6)      //!< Chip has IEEE 802.15.4
+#define CHIP_FEATURE_EMB_PSRAM      BIT(7)      //!< Chip has embedded psram
 
 /**
  * @brief The structure represents information about the chip
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_memprot.h b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_memprot.h
new file mode 100644
index 00000000000..c9557eae935
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_memprot.h
@@ -0,0 +1,199 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/////////////////////////////////////////////////////////////////////////////////////////
+// ESP Memory Protection API (PMS)
+// - allows configuration and violation-interrupt handling of the PMS module operations
+// - not intended for public use.
+
+#pragma once
+
+#include "sdkconfig.h"
+#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_err.h"
+#include "esp_memprot_err.h"
+#include "soc_memprot_types.h"
+#include "esp_memprot_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_MEMPROT_ERR_CHECK(retval, fnc) if ((retval=fnc) != ESP_OK) { return retval; }
+
+/**
+* @brief Basic PMS interrupt source info
+*/
+typedef struct {
+    esp_mprot_mem_t mem_type;   /*!< Memory type containing the faulting address  */
+    int core;                   /*!< CPU/Core ID running the faulting instruction  */
+} esp_memp_intr_source_t;
+
+/**
+ * @brief Clears current interrupt ON flag for given Memory type and CPU/Core ID
+ *
+ * This operation is non-atomic for some chips by PMS module design
+ * In such a case the interrupt clearing happens in two steps:
+ *      1. Interrupt CLR flag is set (clears interrupt-ON status and inhibits linked interrupt processing)
+ *      2. Interrupt CLR flag is reset (resumes the interrupt monitoring)
+ *
+ * @param mem_type Memory type (see esp_mprot_mem_t enum)
+ * @param core Target CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_monitor_clear_intr(const esp_mprot_mem_t mem_type, int const *const core);
+
+/**
+ * @brief Checks whether any of the PMS settings is locked
+ *
+ * @param[out] locked Any lock on? (true/false)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid locked ptr
+ *         Other failures: error code of any failing esp_mprot_get_*_lock() routine (called internally)
+ */
+esp_err_t esp_mprot_is_conf_locked_any(bool *locked);
+
+/**
+ * @brief Checks whether any PMS violation-interrupt monitoring is enabled
+ *
+ * @param[out] locked Any PMS violation interrupt monitor is enabled (true/false)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid enabled ptr
+ *         Other failures: error code of esp_mprot_get_monitor_en() routine (called internally for all Memory types)
+ */
+esp_err_t esp_mprot_is_intr_ena_any(bool *enabled);
+
+/**
+ * @brief Returns active PMS violation-interrupt Memory type if any (MEMPROT_TYPE_NONE when none detected)
+ * and the CPU/CoreID which was running the faulty code (-1 when no interrupt available)
+ *
+ * If there are more interrupts indicated on (shouldn't happen), the order of precedence is given by 'esp_mprot_mem_t' enum definition (low->high)
+ *
+ * @param[out] mem_type Out-pointer for Memory type given by the faulting address (see esp_mprot_mem_t enum)
+ * @param[out] core Out-pointer for CPU/Core ID (see *_CPU_NUM defs in soc.h)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer(s)
+ */
+esp_err_t esp_mprot_get_active_intr(esp_memp_intr_source_t *active_memp_intr);
+
+/**
+ * @brief Returns the address which caused the violation interrupt for given Memory type and CPU/Core ID.
+ * This function is to be called after a basic resolving of (current) interrupt's parameters (ie corresponding
+ * Memory type and CPU ID see esp_mprot_get_active_intr()). This is to minimize processing time of actual exception
+ * as this API is typicaly used in a panic-handling code.
+ * If there is no active interrupt available for the Memory type/CPU ID required, fault_addr is set to NULL.
+ *
+ * @param mem_type memory type
+ * @param[out] fault_addr Address of the operation which caused the PMS violation interrupt
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid fault_addr pointer
+ */
+esp_err_t esp_mprot_get_violate_addr(const esp_mprot_mem_t mem_type, void **fault_addr, int const *const core);
+
+/**
+ * @brief Returns PMS World identifier of the code causing the violation interrupt
+ *
+ * The value is read from appropriate PMS violation status register and thus might be 0 if the interrupt is not currently active.
+ *
+ * @param mem_type Memory type
+ * @param[out] world PMS World type (see esp_mprot_pms_world_t)
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer(s)
+ *         ESP_ERR_MEMPROT_WORLD_INVALID on invalid World identifier fetched from the register
+ */
+esp_err_t esp_mprot_get_violate_world(const esp_mprot_mem_t mem_type, esp_mprot_pms_world_t *world, int const *const core);
+
+/**
+ * @brief Returns an operation type which caused the violation interrupt
+ *
+ * The operation resolving is processed over various PMS status register flags, according to given Memory type argument.
+ * If the interrupt is not active the result returned is irrelevant (likely evaluated to MEMPROT_OP_READ).
+ *
+ * @param mem_type Memory type
+ * @param[out] oper Operation type (see MEMPROT_OP_* defines)
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid oper pointer
+ */
+esp_err_t esp_mprot_get_violate_operation(const esp_mprot_mem_t mem_type, uint32_t *oper, int const *const core);
+
+/**
+ * @brief Checks whether given memory type supports byte-enables info
+ *
+ * Byte-enables status is available only for DMA/DRAM operations
+  *
+ * @param mem_type memory type
+ *
+ * @return byte-enables info available true/false
+ */
+bool esp_mprot_has_byte_enables(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Returns byte-enables for the address which caused the violation interrupt
+ *
+ * The value is taken from appropriate PMS violation status register, based on given Memory type
+ *
+ * @param mem_type Memory type (MEMPROT_TYPE_DRAM0_SRAM)
+ * @param[out] byte_en Byte-enables bits
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARGUMENT on invalid byte_en pointer
+ */
+esp_err_t esp_mprot_get_violate_byte_enables(const esp_mprot_mem_t mem_type, uint32_t *byte_en, int const *const core);
+
+/**
+ * @brief Convenient routine for setting the PMS defaults
+ *
+ * Called on system startup, depending on ESP_SYSTEM_MEMPROT_FEATURE Kconfig value
+ *
+ * @param memp_config pointer to Memprot configuration structure (esp_memp_config_t). The structure si chip-specific,
+ * for details and defaults see appropriate [target-chip]/soc_memprot_types.h
+ *
+ * @return ESP_OK on success
+ *         Other failures: error code of the failing routine called internally. No specific error processing provided in such a case
+ *         due to large number of embedded calls (ie no global unique error table is provided and thus one error code can have different meanings,
+ *         depending on the routine issuing the error)
+ */
+esp_err_t esp_mprot_set_prot(const esp_memp_config_t *memp_config);
+
+/**
+ * @brief Generates PMS configuration string of actual device (diagnostics)
+ *
+ * The functions generates a string from current configuration, control and status registers of the PMS (or similar) module of actual device.
+ * The values are fetched using HAL LL calls to help finding possible errors in the Memprot API implementation
+ *
+ * @param[out] dump_info_string configuration string buffer pointer. The string is allocated by the callee and must be freed by the caller.
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_NO_MEM on buffer allocation failure
+ *         ESP_ERR_INVALID_ARGUMENT on invalid dump_info_string pointer
+ */
+esp_err_t esp_mprot_dump_configuration(char **dump_info_string);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_memprot_err.h b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_memprot_err.h
new file mode 100644
index 00000000000..5556d2c8894
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_memprot_err.h
@@ -0,0 +1,28 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+*
+* SPDX-License-Identifier: Apache-2.0
+*/
+
+#pragma once
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief ESP Memprot API error code definition
+*/
+#define ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID     (ESP_ERR_MEMPROT_BASE + 1)   /**< Memory type invalid in given context */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID      (ESP_ERR_MEMPROT_BASE + 2)   /**< Splitting address invalid in given context */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_OUT_OF_RANGE (ESP_ERR_MEMPROT_BASE + 3)   /**< Splitting address out of range */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_UNALIGNED    (ESP_ERR_MEMPROT_BASE + 4)   /**< Splitting address not aligned to required boundaries */
+#define ESP_ERR_MEMPROT_UNIMGMT_BLOCK_INVALID   (ESP_ERR_MEMPROT_BASE + 5)   /**< Required unified-management block is not valid */
+#define ESP_ERR_MEMPROT_WORLD_INVALID           (ESP_ERR_MEMPROT_BASE + 6)   /**< Required World identifier is not valid */
+#define ESP_ERR_MEMPROT_AREA_INVALID            (ESP_ERR_MEMPROT_BASE + 7)   /**< Required Area identifier is not valid */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_memprot_types.h b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_memprot_types.h
new file mode 100644
index 00000000000..e37fee54578
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_memprot_types.h
@@ -0,0 +1,36 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief PMS World type (attribute per PMS area, similar to x86 Ring scheme)
+ */
+typedef enum {
+    MEMPROT_PMS_WORLD_NONE                      = 0x00000000,
+    MEMPROT_PMS_WORLD_0                         = 0x00000001,
+    MEMPROT_PMS_WORLD_1                         = 0x00000002,
+    MEMPROT_PMS_WORLD_2                         = 0x00000004,
+    MEMPROT_PMS_WORLD_ALL                       = 0x7FFFFFFF,
+    MEMPROT_PMS_WORLD_INVALID                   = 0x80000000
+} esp_mprot_pms_world_t;
+
+/**
+ * @brief Memory operation/permission type recognized by PMS
+ */
+#define MEMPROT_OP_NONE                         0x00000000
+#define MEMPROT_OP_READ                         0x00000001
+#define MEMPROT_OP_WRITE                        0x00000002
+#define MEMPROT_OP_EXEC                         0x00000004
+#define MEMPROT_OP_INVALID                      0x80000000
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_private/esp_memprot_internal.h b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_private/esp_memprot_internal.h
new file mode 100644
index 00000000000..caeb7584862
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_private/esp_memprot_internal.h
@@ -0,0 +1,199 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_err.h"
+#include "esp_memprot_err.h"
+#include "hal/memprot_types.h"
+#include "soc_memprot_types.h"
+#include "esp_memprot_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief Convert Memprot low level errors to esp_err_t
+*/
+esp_err_t esp_mprot_ll_err_to_esp_err(const memprot_ll_err_t err);
+
+/**
+ * @brief Convert Memprot low level PMS World IDs to esp_mprot_pms_world_t
+ */
+esp_mprot_pms_world_t esp_mprot_ll_world_to_hl_world(const memprot_ll_world_t world);
+
+/**
+ * @brief Converts operation type to string, no combination of operations allowed
+ *
+ * @param oper_type PMS operation type
+ */
+const char *esp_mprot_oper_type_to_str(const uint32_t oper_type);
+
+/**
+ * @brief Converts PMS World type to string
+ *
+ * @param area_type PMS World type
+ */
+const char *esp_mprot_pms_world_to_str(const esp_mprot_pms_world_t world_type);
+
+/**
+ * @brief Sets splitting address for given line type in the target Memory type
+ *
+ * @param mem_type memory type
+ * @param line_type split address type
+ * @param line_addr target address from a memory range relevant to given line_addr
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID on invalid line_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_OUT_OF_RANGE on splitting line out of given memory-type range
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_UNALIGNED on splitting line not aligned to PMS-required boundaries
+ */
+esp_err_t esp_mprot_set_split_addr(const esp_mprot_mem_t mem_type, const esp_mprot_split_addr_t line_type, const void *line_addr);
+
+/**
+ * @brief Gets PMS splitting address for given split_addr type
+ *
+ * The value is read from the PMS configuration registers
+ *
+ * @param mem_type memory type
+ * @param line_type Split line type (see esp_mprot_split_addr_t enum)
+ * @param[out] line_addr Split line address from the configuration register
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on line_addr is pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID on invalid line_type
+ */
+esp_err_t esp_mprot_get_split_addr(const esp_mprot_mem_t mem_type, const esp_mprot_split_addr_t line_type, void **line_addr);
+
+/**
+ * @brief Returns default main I/D splitting address for given Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] def_split_addr Main I/D splitting address of required mem_type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid def_split_addr pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_get_default_main_split_addr(const esp_mprot_mem_t mem_type, void **def_split_addr);
+
+/**
+ * @brief Sets a lock for the main IRAM/DRAM splitting addresses
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_split_addr_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for the splitting address configuration of given Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARGUMENT on invalid locked pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_get_split_addr_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Sets a lock for PMS Area settings of required Memory type
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_pms_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS Area settings of required Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARGUMENT on invalid locked pointer
+ */
+esp_err_t esp_mprot_get_pms_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Sets permissions for given PMS Area
+ *
+ * @param area_type PMS area type
+ * @param flags combination of MEMPROT_OP_* defines
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_pms_area(const esp_mprot_pms_area_t area_type, const uint32_t flags);
+
+/**
+ * @brief Gets current permissions for given PMS Area
+ *
+ * @param area_type PMS area type
+ * @param[out] flags combination of MEMPROT_OP_* defines
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid flags pointer
+ */
+esp_err_t esp_mprot_get_pms_area(const esp_mprot_pms_area_t area_type, uint32_t *flags);
+
+/**
+ * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type (see esp_mprot_mem_t enum)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_monitor_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid locked pointer
+ */
+esp_err_t esp_mprot_get_monitor_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Enable PMS violation interrupt monitoring of required Memory type
+ *
+ * @param mem_type memory type
+ * @param enable enable/disable violation interrupt monitoring
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_monitor_en(const esp_mprot_mem_t mem_type, const bool enable);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/memprot.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/memprot.h
deleted file mode 100644
index 818cd677dc8..00000000000
--- a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/memprot.h
+++ /dev/null
@@ -1,449 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-
-/* INTERNAL API
- * generic interface to PMS memory protection features
- */
-
-#pragma once
-
-#include <stdbool.h>
-#include <stdint.h>
-
-#include "esp_attr.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifndef IRAM_SRAM_START
-#define IRAM_SRAM_START             0x4037C000
-#endif
-
-#ifndef DRAM_SRAM_START
-#define DRAM_SRAM_START             0x3FC7C000
-#endif
-
-#ifndef MAP_DRAM_TO_IRAM
-#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + IRAM_SRAM_START)
-#endif
-
-#ifndef MAP_IRAM_TO_DRAM
-#define MAP_IRAM_TO_DRAM(addr)       (addr - IRAM_SRAM_START + DRAM_SRAM_START)
-#endif
-
-typedef enum {
-    MEMPROT_NONE =              0x00000000,
-    MEMPROT_IRAM0_SRAM =        0x00000001,
-    MEMPROT_DRAM0_SRAM =        0x00000002,
-    MEMPROT_ALL =               0xFFFFFFFF
-} mem_type_prot_t;
-
-typedef enum {
-    MEMPROT_SPLITLINE_NONE = 0,
-    MEMPROT_IRAM0_DRAM0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_1_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
-} split_line_t;
-
-typedef enum {
-    MEMPROT_PMS_AREA_NONE = 0,
-    MEMPROT_IRAM0_PMS_AREA_0,
-    MEMPROT_IRAM0_PMS_AREA_1,
-    MEMPROT_IRAM0_PMS_AREA_2,
-    MEMPROT_IRAM0_PMS_AREA_3,
-    MEMPROT_DRAM0_PMS_AREA_0,
-    MEMPROT_DRAM0_PMS_AREA_1,
-    MEMPROT_DRAM0_PMS_AREA_2,
-    MEMPROT_DRAM0_PMS_AREA_3
-} pms_area_t;
-
-typedef enum
-{
-    MEMPROT_PMS_WORLD_0 = 0,
-    MEMPROT_PMS_WORLD_1,
-    MEMPROT_PMS_WORLD_2,
-    MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
-} pms_world_t;
-
-typedef enum
-{
-    MEMPROT_PMS_OP_READ = 0,
-    MEMPROT_PMS_OP_WRITE,
-    MEMPROT_PMS_OP_FETCH,
-    MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
-} pms_operation_type_t;
-
-/**
- * @brief Converts Memory protection type to string
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
-
-/**
- * @brief Converts Split line type to string
- *
- * @param line_type Split line type (see split_line_t enum)
- */
-const char *esp_memprot_split_line_to_str(split_line_t line_type);
-
-/**
- * @brief Converts PMS Area type to string
- *
- * @param area_type PMS Area type (see pms_area_t enum)
- */
-const char *esp_memprot_pms_to_str(pms_area_t area_type);
-
-/**
- * @brief Returns PMS splitting address for given Split line type
- *
- * The value is taken from PMS configuration registers (IRam0 range)
- * For details on split lines see 'esp_memprot_set_prot_int' function description
- *
- * @param line_type Split line type (see split_line_t enum)
- *
- * @return appropriate split line address
- */
-uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
-
-/**
- * @brief Returns default main IRAM/DRAM splitting address
- *
- * The address value is given by _iram_text_end global (IRam0 range)
-
- * @return Main I/D split line (IRam0_DRam0_Split_Addr)
- */
-void *esp_memprot_get_default_main_split_addr(void);
-
-/**
- * @brief Sets a lock for the main IRAM/DRAM splitting address
- *
- * Locks can be unlocked only by digital system reset
- */
-void esp_memprot_set_split_line_lock(void);
-
-/**
- * @brief Gets a lock status for the main IRAM/DRAM splitting address
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_split_line_lock(void);
-
-/**
- * @brief Sets required split line address
- *
- * @param line_type Split line type (see split_line_t enum)
- * @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
- */
-void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
-
-/**
- * @brief Sets a lock for PMS Area settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS Area settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- * @param x Execute permission flag
- */
-void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
-
-/**
- * @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- * @param x Execute permission flag holder
- */
-void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
-
-/**
- * @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- */
-void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
-
-/**
- * @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- */
-void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
-
-/**
- * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Enable PMS violation interrupt monitoring of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- * @param enable/disable
- */
-void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
-
-/**
- * @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (enabled/disabled)
- */
-bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets CPU ID for currently active PMS violation interrupt
- *
- * @return CPU ID (CPU_PRO for ESP32C3)
- */
-int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
-
-/**
- * @brief Clears current interrupt ON flag for given Memory type
- *
- * Interrupt clearing happens in two steps:
- *      1. Interrupt CLR flag is set (to clear the interrupt ON status)
- *      2. Interrupt CLR flag is reset (to allow further monitoring)
- * This operation is non-atomic by PMS module design
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns active PMS violation interrupt (if any)
- *
- * This function iterates through supported Memory type status registers
- * and returns the first interrupt-on flag. If none is found active,
- * MEMPROT_NONE is returned.
- * Order of checking (in current version):
- *      1. MEMPROT_IRAM0_SRAM
- *      2. MEMPROT_DRAM0_SRAM
- *
- * @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
- */
-mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
-
-/**
- * @brief Checks whether any violation interrupt is active
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_locked_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the address which caused the violation interrupt (if any)
- *
- * The address is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return faulting address
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the World identifier of the code causing the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return World identifier (see pms_world_t enum)
- */
-pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns Read or Write operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
- */
-pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- * Effective only on IRam0 access
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (LoadStore bit on/off)
- */
-bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns byte-enables for the address which caused the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return byte-enables
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns raw contents of DRam0 status register 1
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
-
-/**
- * @brief Returns raw contents of DRam0 status register 2
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
-
-/**
- * @brief Returns raw contents of IRam0 status register
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
-
-/**
- * @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
- *
- * Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
- * The registration makes the panic-handler routine being called when the interrupt appears
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
-
-/**
- * @brief Convenient routine for setting the PMS defaults
- *
- * Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
- * For implementation details see 'esp_memprot_set_prot_int' description
- *
- * @param invoke_panic_handler register all interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
- */
-void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
-
-/**
- * @brief Internal routine for setting the PMS defaults
- *
- * Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
- * (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
- * is used (&_iram_text_end) and all the remaining lines share the same address.
- * The function sets all the split lines and PMS areas to the same space,
- * ie there is a single instruction space and single data space at the end.
- * The PMS split lines and permission areas scheme described below:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                    ...       |                 IRam0_PMS_0                 |
- *               DRam0_PMS_0   -----------------------------------------------    IRam0_line1_Split_addr
- *                    ...       |                 IRam0_PMS_1                 |
- *                    ...       -----------------------------------------------   IRam0_line0_Split_addr
- *                              |                 IRam0_PMS_2                 |
- *                              ===============================================   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 DRam0_PMS_1                 |
- * DRam0_DMA_line0_Split_addr   -----------------------------------------------       ...
- *                              |                 DRam0_PMS_2                 |       ...
- * DRam0_DMA_line1_Split_addr   -----------------------------------------------   IRam0_PMS_3
- *                              |                 DRam0_PMS_3                 |       ...
- *                              -----------------------------------------------
- *
- * Default settings provided by 'esp_memprot_set_prot_int' are as follows:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                              |   IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2   |
- *                              |                 DRam0_PMS_0                 |   IRam0_line1_Split_addr
- * DRam0_DMA_line0_Split_addr   |                                             |             =
- *               =              ===============================================   IRam0_line0_Split_addr
- * DRam0_DMA_line1_Split_addr   |                                             |             =
- *                              |   DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3   |   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 IRam0_PMS_3                 |
- *                              -----------------------------------------------
- *
- * Once the memprot feature is locked, it can be unlocked only by digital system reset
- *
- * @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
- */
-void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
-
-/**
- * @brief Returns raw contents of PMS interrupt monitor register for given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return 32-bit register value
- */
-uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h
new file mode 100644
index 00000000000..318c6109617
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h
@@ -0,0 +1,175 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-C3 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_IRAM0_SRAM                     = 0x00000001,
+    MEMPROT_TYPE_DRAM0_SRAM                     = 0x00000002,
+    MEMPROT_TYPE_IRAM0_RTCFAST                  = 0x00000004,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000,
+    MEMPROT_TYPE_IRAM0_ANY                      = MEMPROT_TYPE_IRAM0_SRAM | MEMPROT_TYPE_IRAM0_RTCFAST
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_IRAM0_DRAM0              = 0x00000001,
+    MEMPROT_SPLIT_ADDR_IRAM0_LINE_0             = 0x00000002,
+    MEMPROT_SPLIT_ADDR_IRAM0_LINE_1             = 0x00000004,
+    MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_0         = 0x00000008,
+    MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_1         = 0x00000010,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000,
+    MEMPROT_SPLIT_ADDR_MAIN                     = MEMPROT_SPLIT_ADDR_IRAM0_DRAM0
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_IRAM0_0                    = 0x00000001,
+    MEMPROT_PMS_AREA_IRAM0_1                    = 0x00000002,
+    MEMPROT_PMS_AREA_IRAM0_2                    = 0x00000004,
+    MEMPROT_PMS_AREA_IRAM0_3                    = 0x00000008,
+    MEMPROT_PMS_AREA_DRAM0_0                    = 0x00000010,
+    MEMPROT_PMS_AREA_DRAM0_1                    = 0x00000020,
+    MEMPROT_PMS_AREA_DRAM0_2                    = 0x00000040,
+    MEMPROT_PMS_AREA_DRAM0_3                    = 0x00000080,
+    MEMPROT_PMS_AREA_IRAM0_RTCFAST_LO           = 0x00000100,
+    MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI           = 0x00000200,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "NONE";
+    case MEMPROT_TYPE_IRAM0_SRAM:
+        return "IRAM0_SRAM";
+    case MEMPROT_TYPE_DRAM0_SRAM:
+        return "DRAM0_SRAM";
+    case MEMPROT_TYPE_IRAM0_RTCFAST:
+        return "IRAM0_RTCFAST";
+    case MEMPROT_TYPE_IRAM0_ANY:
+        return "IRAM0_ANY";
+    case MEMPROT_TYPE_ALL:
+        return "ALL";
+    default:
+        return "INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_IRAM0_DRAM0:
+        return "SPLIT_ADDR_IRAM0_DRAM0";
+    case MEMPROT_SPLIT_ADDR_IRAM0_LINE_0:
+        return "SPLIT_ADDR_IRAM0_LINE_0";
+    case MEMPROT_SPLIT_ADDR_IRAM0_LINE_1:
+        return "SPLIT_ADDR_IRAM0_LINE_1";
+    case MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_0:
+        return "SPLIT_ADDR_DRAM0_DMA_LINE_0";
+    case MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_1:
+        return "SPLIT_ADDR_DRAM0_DMA_LINE_1";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "SPLIT_ADDR_ALL";
+    default:
+        return "SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_IRAM0_0:
+        return "PMS_AREA_IRAM0_0";
+    case MEMPROT_PMS_AREA_IRAM0_1:
+        return "PMS_AREA_IRAM0_1";
+    case MEMPROT_PMS_AREA_IRAM0_2:
+        return "PMS_AREA_IRAM0_2";
+    case MEMPROT_PMS_AREA_IRAM0_3:
+        return "PMS_AREA_IRAM0_3";
+    case MEMPROT_PMS_AREA_DRAM0_0:
+        return "PMS_AREA_DRAM0_0";
+    case MEMPROT_PMS_AREA_DRAM0_1:
+        return "PMS_AREA_DRAM0_1";
+    case MEMPROT_PMS_AREA_DRAM0_2:
+        return "PMS_AREA_DRAM0_2";
+    case MEMPROT_PMS_AREA_DRAM0_3:
+        return "PMS_AREA_DRAM0_3";
+    case MEMPROT_PMS_AREA_IRAM0_RTCFAST_LO:
+        return "PMS_AREA_IRAM0_RTCFAST_LO";
+    case MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI:
+        return "PMS_AREA_IRAM0_RTCFAST_HI";
+    case MEMPROT_PMS_AREA_ALL:
+        return "PMS_AREA_ALL";
+    default:
+        return "PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/memprot.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/memprot.h
deleted file mode 100644
index 75228580ffd..00000000000
--- a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/memprot.h
+++ /dev/null
@@ -1,448 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-
-/* INTERNAL API
- * generic interface to PMS memory protection features
- */
-
-#pragma once
-
-#include <stdbool.h>
-#include <stdint.h>
-#include "esp_attr.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifndef IRAM_SRAM_START
-#define IRAM_SRAM_START             0x4037C000
-#endif
-
-#ifndef DRAM_SRAM_START
-#define DRAM_SRAM_START             0x3FC7C000
-#endif
-
-#ifndef MAP_DRAM_TO_IRAM
-#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + IRAM_SRAM_START)
-#endif
-
-#ifndef MAP_IRAM_TO_DRAM
-#define MAP_IRAM_TO_DRAM(addr)       (addr - IRAM_SRAM_START + DRAM_SRAM_START)
-#endif
-
-typedef enum {
-    MEMPROT_NONE =              0x00000000,
-    MEMPROT_IRAM0_SRAM =        0x00000001,
-    MEMPROT_DRAM0_SRAM =        0x00000002,
-    MEMPROT_ALL =               0xFFFFFFFF
-} mem_type_prot_t;
-
-typedef enum {
-    MEMPROT_SPLITLINE_NONE = 0,
-    MEMPROT_IRAM0_DRAM0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_1_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
-} split_line_t;
-
-typedef enum {
-    MEMPROT_PMS_AREA_NONE = 0,
-    MEMPROT_IRAM0_PMS_AREA_0,
-    MEMPROT_IRAM0_PMS_AREA_1,
-    MEMPROT_IRAM0_PMS_AREA_2,
-    MEMPROT_IRAM0_PMS_AREA_3,
-    MEMPROT_DRAM0_PMS_AREA_0,
-    MEMPROT_DRAM0_PMS_AREA_1,
-    MEMPROT_DRAM0_PMS_AREA_2,
-    MEMPROT_DRAM0_PMS_AREA_3
-} pms_area_t;
-
-typedef enum
-{
-    MEMPROT_PMS_WORLD_0 = 0,
-    MEMPROT_PMS_WORLD_1,
-    MEMPROT_PMS_WORLD_2,
-    MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
-} pms_world_t;
-
-typedef enum
-{
-    MEMPROT_PMS_OP_READ = 0,
-    MEMPROT_PMS_OP_WRITE,
-    MEMPROT_PMS_OP_FETCH,
-    MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
-} pms_operation_type_t;
-
-/**
- * @brief Converts Memory protection type to string
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
-
-/**
- * @brief Converts Split line type to string
- *
- * @param line_type Split line type (see split_line_t enum)
- */
-const char *esp_memprot_split_line_to_str(split_line_t line_type);
-
-/**
- * @brief Converts PMS Area type to string
- *
- * @param area_type PMS Area type (see pms_area_t enum)
- */
-const char *esp_memprot_pms_to_str(pms_area_t area_type);
-
-/**
- * @brief Returns PMS splitting address for given Split line type
- *
- * The value is taken from PMS configuration registers (IRam0 range)
- * For details on split lines see 'esp_memprot_set_prot_int' function description
- *
- * @param line_type Split line type (see split_line_t enum)
- *
- * @return appropriate split line address
- */
-uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
-
-/**
- * @brief Returns default main IRAM/DRAM splitting address
- *
- * The address value is given by _iram_text_end global (IRam0 range)
-
- * @return Main I/D split line (IRam0_DRam0_Split_Addr)
- */
-void *esp_memprot_get_default_main_split_addr(void);
-
-/**
- * @brief Sets a lock for the main IRAM/DRAM splitting address
- *
- * Locks can be unlocked only by digital system reset
- */
-void esp_memprot_set_split_line_lock(void);
-
-/**
- * @brief Gets a lock status for the main IRAM/DRAM splitting address
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_split_line_lock(void);
-
-/**
- * @brief Sets required split line address
- *
- * @param line_type Split line type (see split_line_t enum)
- * @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
- */
-void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
-
-/**
- * @brief Sets a lock for PMS Area settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS Area settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- * @param x Execute permission flag
- */
-void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
-
-/**
- * @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- * @param x Execute permission flag holder
- */
-void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
-
-/**
- * @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- */
-void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
-
-/**
- * @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- */
-void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
-
-/**
- * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Enable PMS violation interrupt monitoring of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- * @param enable/disable
- */
-void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
-
-/**
- * @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (enabled/disabled)
- */
-bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets CPU ID for currently active PMS violation interrupt
- *
- * @return CPU ID (CPU_PRO for ESP32H2)
- */
-int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
-
-/**
- * @brief Clears current interrupt ON flag for given Memory type
- *
- * Interrupt clearing happens in two steps:
- *      1. Interrupt CLR flag is set (to clear the interrupt ON status)
- *      2. Interrupt CLR flag is reset (to allow further monitoring)
- * This operation is non-atomic by PMS module design
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns active PMS violation interrupt (if any)
- *
- * This function iterates through supported Memory type status registers
- * and returns the first interrupt-on flag. If none is found active,
- * MEMPROT_NONE is returned.
- * Order of checking (in current version):
- *      1. MEMPROT_IRAM0_SRAM
- *      2. MEMPROT_DRAM0_SRAM
- *
- * @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
- */
-mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
-
-/**
- * @brief Checks whether any violation interrupt is active
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_locked_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the address which caused the violation interrupt (if any)
- *
- * The address is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return faulting address
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the World identifier of the code causing the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return World identifier (see pms_world_t enum)
- */
-pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns Read or Write operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
- */
-pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- * Effective only on IRam0 access
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (LoadStore bit on/off)
- */
-bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns byte-enables for the address which caused the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return byte-enables
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns raw contents of DRam0 status register 1
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
-
-/**
- * @brief Returns raw contents of DRam0 status register 2
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
-
-/**
- * @brief Returns raw contents of IRam0 status register
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
-
-/**
- * @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
- *
- * Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
- * The registration makes the panic-handler routine being called when the interrupt appears
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
-
-/**
- * @brief Convenient routine for setting the PMS defaults
- *
- * Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
- * For implementation details see 'esp_memprot_set_prot_int' description
- *
- * @param invoke_panic_handler register all interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
- */
-void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
-
-/**
- * @brief Internal routine for setting the PMS defaults
- *
- * Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
- * (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
- * is used (&_iram_text_end) and all the remaining lines share the same address.
- * The function sets all the split lines and PMS areas to the same space,
- * ie there is a single instruction space and single data space at the end.
- * The PMS split lines and permission areas scheme described below:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                    ...       |                 IRam0_PMS_0                 |
- *               DRam0_PMS_0   -----------------------------------------------    IRam0_line1_Split_addr
- *                    ...       |                 IRam0_PMS_1                 |
- *                    ...       -----------------------------------------------   IRam0_line0_Split_addr
- *                              |                 IRam0_PMS_2                 |
- *                              ===============================================   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 DRam0_PMS_1                 |
- * DRam0_DMA_line0_Split_addr   -----------------------------------------------       ...
- *                              |                 DRam0_PMS_2                 |       ...
- * DRam0_DMA_line1_Split_addr   -----------------------------------------------   IRam0_PMS_3
- *                              |                 DRam0_PMS_3                 |       ...
- *                              -----------------------------------------------
- *
- * Default settings provided by 'esp_memprot_set_prot_int' are as follows:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                              |   IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2   |
- *                              |                 DRam0_PMS_0                 |   IRam0_line1_Split_addr
- * DRam0_DMA_line0_Split_addr   |                                             |             =
- *               =              ===============================================   IRam0_line0_Split_addr
- * DRam0_DMA_line1_Split_addr   |                                             |             =
- *                              |   DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3   |   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 IRam0_PMS_3                 |
- *                              -----------------------------------------------
- *
- * Once the memprot feature is locked, it can be unlocked only by digital system reset
- *
- * @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
- */
-void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
-
-/**
- * @brief Returns raw contents of PMS interrupt monitor register for given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return 32-bit register value
- */
-uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h
new file mode 100644
index 00000000000..3048088eba4
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-H2 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() {\
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h
new file mode 100644
index 00000000000..f17e2143133
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-S2 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h
new file mode 100644
index 00000000000..06dde33ffad
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h
@@ -0,0 +1,119 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-S3 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+    int target_cpu[];           /*!< Array of CPU/core IDs required to receive given PMS protection */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL,\
+    .target_cpu[] = {PRO_CPU_NUM, APP_CPU_NUM} \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h b/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h
index 1c35fd61ef7..255ed52e331 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -77,3 +77,10 @@
 #define I2C_SARADC_TSENS_DAC 0x6
 #define I2C_SARADC_TSENS_DAC_MSB 3
 #define I2C_SARADC_TSENS_DAC_LSB 0
+
+/**
+ * Restore regi2c analog calibration related configuration registers.
+ * This is a workaround, and is fixed on later chips
+ */
+#define REGI2C_ANA_CALI_PD_WORKAROUND    1
+#define REGI2C_ANA_CALI_BYTE_NUM         8
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/regi2c_ctrl.h b/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/regi2c_ctrl.h
index 27e969eda84..ebef50d125e 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/regi2c_ctrl.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/regi2c_ctrl.h
@@ -65,6 +65,10 @@ uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_ad
 void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
 void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
 
+/* enter the critical section that protects internal registers. Don't use it in SDK. Use the functions above. */
+void regi2c_enter_critical(void);
+void regi2c_exit_critical(void);
+
 #endif // BOOTLOADER_BUILD
 
 /* Convenience macros for the above functions, these use register definitions
@@ -82,6 +86,16 @@ void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add,
 #define REGI2C_READ(block, reg_add) \
       regi2c_ctrl_read_reg(block, block##_HOSTID,  reg_add)
 
+
+/**
+ * Restore regi2c analog calibration related configuration registers.
+ * This is a workaround, and is fixed on later chips
+ */
+#if REGI2C_ANA_CALI_PD_WORKAROUND
+void regi2c_analog_cali_reg_read(void);
+void regi2c_analog_cali_reg_write(void);
+#endif   //#if ADC_CALI_PD_WORKAROUND
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/esp_ipc/include/esp_ipc.h b/tools/sdk/esp32c3/include/esp_ipc/include/esp_ipc.h
index 5e02c460bce..5307cbcdab1 100644
--- a/tools/sdk/esp32c3/include/esp_ipc/include/esp_ipc.h
+++ b/tools/sdk/esp32c3/include/esp_ipc/include/esp_ipc.h
@@ -12,8 +12,7 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#ifndef __ESP_IPC_H__
-#define __ESP_IPC_H__
+#pragma once
 
 #include <esp_err.h>
 
@@ -23,30 +22,30 @@ extern "C" {
 
 #if !defined(CONFIG_FREERTOS_UNICORE) || defined(CONFIG_APPTRACE_GCOV_ENABLE)
 
-/** @cond */
-typedef void (*esp_ipc_func_t)(void* arg);
-/** @endcond */
 /*
  * Inter-processor call APIs
  *
- * FreeRTOS provides several APIs which can be used to communicate between
- * different tasks, including tasks running on different CPUs.
- * This module provides additional APIs to run some code on the other CPU.
+ * FreeRTOS provides several APIs which can be used to communicate between different tasks, including tasks running on
+ * different CPUs. This module provides additional APIs to run some code on the other CPU. These APIs can only be used
+ * when FreeRTOS scheduler is running.
+ */
+
+/**
+ * @brief IPC Callback
  *
- * These APIs can only be used when FreeRTOS scheduler is running.
+ * A callback of this type should be provided as an argument when calling esp_ipc_call() or esp_ipc_call_blocking().
  */
+typedef void (*esp_ipc_func_t)(void* arg);
 
 /**
- * @brief Execute a function on the given CPU
+ * @brief Execute a callback on a given CPU
+ *
+ * Execute a given callback on a particular CPU. The callback must be of type "esp_ipc_func_t" and will be invoked in
+ * the context of the target CPU's IPC task.
  *
- * Run a given function on a particular CPU. The given function must accept a
- * void* argument and return void. The given function is run in the context of
- * the IPC task of the CPU specified by the cpu_id parameter. The calling task
- * will be blocked until the IPC task begins executing the given function. If
- * another IPC call is ongoing, the calling task will block until the other IPC
- * call completes. The stack size allocated for the IPC task can be configured
- * in the "Inter-Processor Call (IPC) task stack size" setting in menuconfig.
- * Increase this setting if the given function requires more stack than default.
+ * - This function will block the target CPU's IPC task has begun execution of the callback
+ * - If another IPC call is ongoing, this function will block until the ongoing IPC call completes
+ * - The stack size of the IPC task can be configured via the CONFIG_ESP_IPC_TASK_STACK_SIZE option
  *
  * @note In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
  *
@@ -63,17 +62,10 @@ esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
 
 
 /**
- * @brief Execute a function on the given CPU and blocks until it completes
+ * @brief Execute a callback on a given CPU until and block until it completes
  *
- * Run a given function on a particular CPU. The given function must accept a
- * void* argument and return void. The given function is run in the context of
- * the IPC task of the CPU specified by the cpu_id parameter. The calling task
- * will be blocked until the IPC task completes execution of the given function.
- * If another IPC call is ongoing, the calling task will block until the other
- * IPC call completes. The stack size allocated for the IPC task can be
- * configured in the "Inter-Processor Call (IPC) task stack size" setting in
- * menuconfig. Increase this setting if the given function requires more stack
- * than default.
+ * This function is identical to esp_ipc_call() except that this function will block until the execution of the callback
+ * completes.
  *
  * @note    In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
  *
@@ -88,10 +80,8 @@ esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
  */
 esp_err_t esp_ipc_call_blocking(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
 
-#endif // not CONFIG_FREERTOS_UNICORE or CONFIG_APPTRACE_GCOV_ENABLE
+#endif // !defined(CONFIG_FREERTOS_UNICORE) || defined(CONFIG_APPTRACE_GCOV_ENABLE)
 
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* __ESP_IPC_H__ */
diff --git a/tools/sdk/esp32c3/include/esp_ipc/include/esp_ipc_isr.h b/tools/sdk/esp32c3/include/esp_ipc/include/esp_ipc_isr.h
index 7b6e060f1d5..22fa5b10b03 100644
--- a/tools/sdk/esp32c3/include/esp_ipc/include/esp_ipc_isr.h
+++ b/tools/sdk/esp32c3/include/esp_ipc/include/esp_ipc_isr.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -14,31 +14,24 @@ extern "C" {
 
 #ifdef CONFIG_ESP_IPC_ISR_ENABLE
 
-/** @cond */
-typedef void (*esp_ipc_isr_func_t)(void* arg);
-/** @endcond */
-
 /**
- * @brief Initialize inter-processor call module which based on #4 high-interrupt.
- *
- * This function is called on CPU start and should not be called from the application.
+ * @brief IPC ISR Callback
  *
- * This function starts two tasks, one on each CPU. These tasks register
- * #4 High-interrupt and after that, the tasks are deleted.
- * The next API functions work with this functionality:
- * esp_ipc_isr_asm_call
- * esp_ipc_isr_asm_call_blocking
- * They allow to run an asm function on other CPU.
+ * A callback of this type should be provided as an argument when calling esp_ipc_isr_asm_call() or
+ * esp_ipc_isr_asm_call_blocking().
  */
-void esp_ipc_isr_init(void);
+typedef void (*esp_ipc_isr_func_t)(void* arg);
 
 /**
- * @brief Execute an asm function on the other CPU (uses the #4 high-priority interrupt)
+ * @brief Execute an assembly callback on the other CPU
+ *
+ * Execute a given callback on the other CPU in the context of a High Priority Interrupt.
+ *
+ * - This function will busy-wait in a critical section until the other CPU has started execution of the callback
+ * - The callback must be written in assembly, is invoked using a CALLX0 instruction, and has a2, a3, a4 as scratch
+ *   registers. See docs for more details
  *
- * @note In single-core mode, it is not available.
- * This function calls the #4 high-priority interrupt on the other CPU.
- * The given function is called in the context of the interrupt by CALLX0 command and
- * operates with registers a2, a3, a4.
+ * @note This function is not available in single-core mode.
  *
  * @param[in]   func    Pointer to a function of type void func(void* arg) to be executed
  * @param[in]   arg     Arbitrary argument of type void* to be passed into the function
@@ -46,11 +39,12 @@ void esp_ipc_isr_init(void);
 void esp_ipc_isr_asm_call(esp_ipc_isr_func_t func, void* arg);
 
 /**
- * @brief Execute an asm function on the other CPU and blocks until it completes (uses the #4 high-priority interrupt)
+ * @brief Execute an assembly callback on the other CPU and busy-wait until it completes
  *
- * @note In single-core mode, it is not available.
- * This function calls the #4 high-priority interrupt on the other CPU.
- * The given function is called in the context of the interrupt by CALLX0 command.
+ * This function is identical to esp_ipc_isr_asm_call() except that this function will busy-wait until the execution of
+ * the callback completes.
+ *
+ * @note This function is not available in single-core mode.
  *
  * @param[in]   func    Pointer to a function of type void func(void* arg) to be executed
  * @param[in]   arg     Arbitrary argument of type void* to be passed into the function
@@ -58,51 +52,60 @@ void esp_ipc_isr_asm_call(esp_ipc_isr_func_t func, void* arg);
 void esp_ipc_isr_asm_call_blocking(esp_ipc_isr_func_t func, void* arg);
 
 /**
- * @brief Stall the other CPU and the current CPU disables interrupts with level 3 and lower.
+ * @brief Stall the other CPU
  *
- * @note In single-core mode, it is not available.
- * This function calls the #4 high-priority interrupt on the other CPU.
- * The esp_ipc_isr_finish_cmd() function is called on the other CPU in the context of the #4 high-priority interrupt.
- * The esp_ipc_isr_finish_cmd is called by CALLX0 command.
- * It is waiting for the end command. The command will be sent by esp_ipc_isr_release_other_cpu().
- * This function is used for DPORT workaround.
+ * This function will stall the other CPU. The other CPU is stalled by busy-waiting in the context of a High Priority
+ * Interrupt. The other CPU will not be resumed until esp_ipc_isr_release_other_cpu() is called.
  *
- * This function blocks other CPU until the release call esp_ipc_isr_release_other_cpu().
+ * - This function is internally implemented using IPC ISR
+ * - This function is used for DPORT workaround.
+ * - If the stall feature is paused using esp_ipc_isr_stall_pause(), this function will have no effect
  *
- * This fucntion is used for the DPORT workaround: stall other cpu that this cpu is pending to access dport register start.
+ * @note This function is not available in single-core mode.
  */
 void esp_ipc_isr_stall_other_cpu(void);
 
 /**
  * @brief Release the other CPU
  *
- * @note In single-core mode, it is not available.
- * This function will send the end command to release the stall other CPU.
- * This function is used for DPORT workaround: stall other cpu that this cpu is pending to access dport register end.
+ * This function will release the other CPU that was previously stalled from calling esp_ipc_isr_stall_other_cpu()
+ *
+ * - This function is used for DPORT workaround.
+ * - If the stall feature is paused using esp_ipc_isr_stall_pause(), this function will have no effect
  *
+ * @note This function is not available in single-core mode.
  */
 void esp_ipc_isr_release_other_cpu(void);
 
 /**
- * @brief Pause stall the other CPU
+ * @brief Puase the CPU stall feature
+ *
+ * This function will pause the CPU stall feature. Once paused, calls to esp_ipc_isr_stall_other_cpu() and
+ * esp_ipc_isr_release_other_cpu() will have no effect. If a IPC ISR call is already in progress, this function will
+ * busy-wait until the call completes before pausing the CPU stall feature.
  */
 void esp_ipc_isr_stall_pause(void);
 
 /**
- * @brief Abort stall the other CPU
+ * @brief Abort a CPU stall
  *
- * This routine does not stop the stall routines in any way that is recoverable.
- * Please only call in case of panic().
- * Used in panic code: the enter_critical stuff may be messed up so we just stop everything without checking the mux.
+ * This function will abort any stalling routine of the other CPU due to a pervious call to
+ * esp_ipc_isr_stall_other_cpu(). This function aborts the stall in a non-recoverable manner, thus should only be called
+ * in case of a panic().
+ *
+ * - This function is used in panic handling code
  */
 void esp_ipc_isr_stall_abort(void);
 
 /**
- * @brief Resume stall the other CPU
+ * @brief Resume the CPU stall feature
+ *
+ * This function will resume the CPU stall feature that was previously paused by calling esp_ipc_isr_stall_pause(). Once
+ * resumed, calls to esp_ipc_isr_stall_other_cpu() and esp_ipc_isr_release_other_cpu() will have effect again.
  */
 void esp_ipc_isr_stall_resume(void);
 
-#else // not CONFIG_ESP_IPC_ISR_ENABLE
+#else // CONFIG_ESP_IPC_ISR_ENABLE
 
 #define esp_ipc_isr_stall_other_cpu()
 #define esp_ipc_isr_release_other_cpu()
diff --git a/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_rgb.h b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_rgb.h
index 0c264545ee2..6f06deb8165 100644
--- a/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_rgb.h
+++ b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_rgb.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -64,7 +64,7 @@ typedef struct {
         unsigned int hsync_idle_low: 1;  /*!< The hsync signal is low in IDLE state */
         unsigned int vsync_idle_low: 1;  /*!< The vsync signal is low in IDLE state */
         unsigned int de_idle_high: 1;    /*!< The de signal is high in IDLE state */
-        unsigned int pclk_active_neg: 1; /*!< The display will write data lines when there's a falling edge on PCLK */
+        unsigned int pclk_active_neg: 1; /*!< Whether the display data is clocked out at the falling edge of PCLK */
         unsigned int pclk_idle_high: 1;  /*!< The PCLK stays at high level in IDLE phase */
     } flags;
 } esp_lcd_rgb_timing_t;
@@ -92,6 +92,8 @@ typedef struct {
     lcd_clock_source_t clk_src;   /*!< Clock source for the RGB LCD peripheral */
     esp_lcd_rgb_timing_t timings; /*!< RGB timing parameters */
     size_t data_width;            /*!< Number of data lines */
+    size_t sram_trans_align;      /*!< Alignment for framebuffer that allocated in SRAM */
+    size_t psram_trans_align;     /*!< Alignment for framebuffer that allocated in PSRAM */
     int hsync_gpio_num;           /*!< GPIO used for HSYNC signal */
     int vsync_gpio_num;           /*!< GPIO used for VSYNC signal */
     int de_gpio_num;              /*!< GPIO used for DE signal, set to -1 if it's not used */
diff --git a/tools/sdk/esp32c3/include/esp_littlefs/include/esp_littlefs.h b/tools/sdk/esp32c3/include/esp_littlefs/include/esp_littlefs.h
index 7b5abe9248f..07f35231291 100644
--- a/tools/sdk/esp32c3/include/esp_littlefs/include/esp_littlefs.h
+++ b/tools/sdk/esp32c3/include/esp_littlefs/include/esp_littlefs.h
@@ -1,24 +1,9 @@
 #ifndef ESP_LITTLEFS_H__
 #define ESP_LITTLEFS_H__
 
-#include <stdint.h>
-#include <stddef.h>
-#include <stdarg.h>
-#include <unistd.h>
-#include <utime.h>
-#include "freertos/FreeRTOS.h"
-#include "freertos/semphr.h"
 #include "esp_err.h"
-#include <sys/types.h>
-#include <sys/reent.h>
-#include <sys/stat.h>
-#include <sys/time.h>
-#include <sys/poll.h>
-#include <sys/dirent.h>
-#include <string.h>
-#include "sdkconfig.h"
-
 #include "littlefs/lfs.h"
+#include "sdkconfig.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/esp_phy/include/phy.h b/tools/sdk/esp32c3/include/esp_phy/include/phy.h
index e6aa21db50e..c8d1018288d 100644
--- a/tools/sdk/esp32c3/include/esp_phy/include/phy.h
+++ b/tools/sdk/esp32c3/include/esp_phy/include/phy.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -99,6 +99,13 @@ void phy_freq_mem_backup(bool backup_en, uint32_t *mem);
 void phy_bbpll_en_usb(bool en);
 #endif
 
+#if CONFIG_IDF_TARGET_ESP32S2
+/**
+ * @brief Phy version select for ESP32S2
+ */
+void phy_eco_version_sel(uint8_t chip_ver);
+#endif
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_console.h b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_console.h
new file mode 100644
index 00000000000..70c02ffeae0
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_console.h
@@ -0,0 +1,52 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Initialize console
+ *
+ * Initializes serial console and adds basic commands.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failures.
+ */
+esp_err_t esp_rmaker_console_init(void);
+
+/* Reference for adding custom console commands:
+#include <esp_console.h>
+
+static int command_console_handler(int argc, char *argv[])
+{
+    // Command code here
+}
+
+static void register_console_command()
+{
+    const esp_console_cmd_t cmd = {
+        .command = "<command_name>",
+        .help = "<help_details>",
+        .func = &command_console_handler,
+    };
+    ESP_ERROR_CHECK(esp_console_cmd_register(&cmd));
+}
+*/
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_core.h b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_core.h
new file mode 100644
index 00000000000..9dbdbae658b
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_core.h
@@ -0,0 +1,897 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_event.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define ESP_RMAKER_CONFIG_VERSION    "2020-03-20"
+
+/* Maximum length of the alert message that can be passed to esp_rmaker_raise_alert() */
+#define ESP_RMAKER_MAX_ALERT_LEN    100
+
+/** @cond **/
+/** ESP RainMaker Event Base */
+ESP_EVENT_DECLARE_BASE(RMAKER_EVENT);
+/** @endcond **/
+
+/** ESP RainMaker Events */
+typedef enum {
+    /** RainMaker Core Initialisation Done */
+    RMAKER_EVENT_INIT_DONE = 1,
+    /** Self Claiming Started */
+    RMAKER_EVENT_CLAIM_STARTED,
+    /** Self Claiming was Successful */
+    RMAKER_EVENT_CLAIM_SUCCESSFUL,
+    /** Self Claiming Failed */
+    RMAKER_EVENT_CLAIM_FAILED,
+    /** Node side communication for User-Node mapping done.
+     * Actual mapping state will be managed by the ESP RainMaker cloud based on the user side communication.
+     * Associated data is the NULL terminated user id.
+     */
+    RMAKER_EVENT_USER_NODE_MAPPING_DONE,
+    /** Local control started. Associated data is the NULL terminated Service Name */
+    RMAKER_EVENT_LOCAL_CTRL_STARTED,
+    /* User reset request successfully sent to ESP RainMaker Cloud */
+    RMAKER_EVENT_USER_NODE_MAPPING_RESET,
+} esp_rmaker_event_t;
+
+/** ESP RainMaker Node information */
+typedef struct {
+    /** Name of the Node */
+    char *name;
+    /** Type of the Node */
+    char *type;
+    /** Firmware Version (Optional). If not set, PROJECT_VER is used as default (recommended)*/
+    char *fw_version;
+    /** Model (Optional). If not set, PROJECT_NAME is used as default (recommended)*/
+    char *model;
+} esp_rmaker_node_info_t;
+
+/** ESP RainMaker Configuration */
+typedef struct {
+    /** Enable Time Sync
+     * Setting this true will enable SNTP and fetch the current time before
+     * attempting to connect to the ESP RainMaker service
+     */
+    bool enable_time_sync;
+} esp_rmaker_config_t;
+
+/** ESP RainMaker Parameter Value type */
+typedef enum {
+    /** Invalid */
+    RMAKER_VAL_TYPE_INVALID = 0,
+    /** Boolean */
+    RMAKER_VAL_TYPE_BOOLEAN,
+    /** Integer. Mapped to a 32 bit signed integer */
+    RMAKER_VAL_TYPE_INTEGER,
+    /** Floating point number */
+    RMAKER_VAL_TYPE_FLOAT,
+    /** NULL terminated string */
+    RMAKER_VAL_TYPE_STRING,
+    /** NULL terminated JSON Object string Eg. {"name":"value"} */
+    RMAKER_VAL_TYPE_OBJECT,
+    /** NULL terminated JSON Array string Eg. [1,2,3] */
+    RMAKER_VAL_TYPE_ARRAY,
+} esp_rmaker_val_type_t;
+
+/** ESP RainMaker Value */
+typedef union {
+    /** Boolean */
+    bool b;
+    /** Integer */
+    int i;
+    /** Float */
+    float f;
+    /** NULL terminated string */
+    char *s;
+} esp_rmaker_val_t;
+
+/** ESP RainMaker Parameter Value */
+typedef struct {
+    /** Type of Value */
+    esp_rmaker_val_type_t type;
+    /** Actual value. Depends on the type */
+    esp_rmaker_val_t val;
+} esp_rmaker_param_val_t;
+
+/** Param property flags */
+typedef enum {
+    PROP_FLAG_WRITE = (1 << 0),
+    PROP_FLAG_READ = (1 << 1),
+    PROP_FLAG_TIME_SERIES = (1 << 2),
+    PROP_FLAG_PERSIST = (1 << 3)
+} esp_param_property_flags_t;
+
+/** System Service Reboot Flag */
+#define SYSTEM_SERV_FLAG_REBOOT         (1 << 0)
+
+/** System Service Factory Reset Flag */
+#define SYSTEM_SERV_FLAG_FACTORY_RESET  (1 << 1)
+
+/** System Service Wi-Fi Reset Flag */
+#define SYSTEM_SERV_FLAG_WIFI_RESET     (1 << 2)
+
+/** System Service All Flags */
+#define SYSTEM_SERV_FLAGS_ALL   (SYSTEM_SERV_FLAG_REBOOT | SYSTEM_SERV_FLAG_FACTORY_RESET | SYSTEM_SERV_FLAG_WIFI_RESET)
+
+/** Generic ESP RainMaker handle */
+typedef size_t esp_rmaker_handle_t;
+
+/**  ESP RainMaker Node Handle */
+typedef esp_rmaker_handle_t esp_rmaker_node_t;
+
+/**  ESP RainMaker Device Handle */
+typedef esp_rmaker_handle_t esp_rmaker_device_t;
+
+/** ESP RainMaker Parameter Handle */
+typedef esp_rmaker_handle_t esp_rmaker_param_t;
+
+/** Parameter read/write request source */
+typedef enum {
+    /** Request triggered in the init sequence i.e. when a value is found
+     * in persistent memory for parameters with PROP_FLAG_PERSIST.
+     */
+    ESP_RMAKER_REQ_SRC_INIT,
+    /** Request received from cloud */
+    ESP_RMAKER_REQ_SRC_CLOUD,
+    /** Request received when a schedule has triggered */
+    ESP_RMAKER_REQ_SRC_SCHEDULE,
+    /** Request received when a scene has been activated */
+    ESP_RMAKER_REQ_SRC_SCENE_ACTIVATE,
+    /** Request received when a scene has been deactivated */
+    ESP_RMAKER_REQ_SRC_SCENE_DEACTIVATE,
+    /** Request received from a local controller */
+    ESP_RMAKER_REQ_SRC_LOCAL,
+    /** This will always be the last value. Any value equal to or
+     * greater than this should be considered invalid.
+     */
+    ESP_RMAKER_REQ_SRC_MAX,
+} esp_rmaker_req_src_t;
+
+/** Write request Context */
+typedef struct {
+    /** Source of request */
+    esp_rmaker_req_src_t src;
+} esp_rmaker_write_ctx_t;
+
+/** Read request context */
+typedef struct {
+    /** Source of request */
+    esp_rmaker_req_src_t src;
+} esp_rmaker_read_ctx_t;
+
+/** System service configuration */
+typedef struct {
+    /** Logical OR of system service flags (SYSTEM_SERV_FLAG_REBOOT,
+     * SYSTEM_SERV_FLAG_FACTORY_RESET, SYSTEM_SERV_FLAG_WIFI_RESET) as required
+     * or SYSTEM_SERV_FLAGS_ALL.
+     */
+    uint16_t flags;
+    /** Time in seconds after which the device should reboot.
+     * Value of zero would trigger an immediate reboot if a write is received for
+     * the Reboot parameter.
+     * Recommended value: 2
+     */
+    int8_t reboot_seconds;
+    /** Time in seconds after which the device should reset (Wi-Fi or factory).
+     * Value of zero would trigger an immediate action if a write is received for
+     * the Wi-Fi reset or Factory reset parameter.
+     * Recommended value: 2
+     */
+    int8_t reset_seconds;
+    /** Time in seconds after which the device should reboot after it has been reset.
+     * Value of zero would mean that there won't be any reboot after the reset.
+     * Recommended value: 2
+     */
+    int8_t reset_reboot_seconds;
+} esp_rmaker_system_serv_config_t;
+
+/** Callback for parameter value write requests.
+ *
+ * The callback should call the esp_rmaker_param_update_and_report() API if the new value is to be set
+ * and reported back.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ * @param[in] param Pointer to \ref esp_rmaker_param_val_t. Use appropriate elements as per the value type.
+ * @param[in] priv_data Pointer to the private data paassed while creating the device.
+ * @param[in] ctx Context associated with the request.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+typedef esp_err_t (*esp_rmaker_device_write_cb_t)(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param,
+        const esp_rmaker_param_val_t val, void *priv_data, esp_rmaker_write_ctx_t *ctx);
+
+/** Callback for parameter value changes
+ *
+ * The callback should call the esp_rmaker_param_update_and_report() API if the new value is to be set
+ * and reported back.
+ *
+ * @note Currently, the read callback never gets invoked as the communication between clients (mobile phones, CLI, etc.)
+ * and node is asynchronous. So, the read request does not reach the node. This callback will however be used in future.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ * @param[in] priv_data Pointer to the private data passed while creating the device.
+ * @param[in] ctx Context associated with the request.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+typedef esp_err_t (*esp_rmaker_device_read_cb_t)(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param,
+        void *priv_data, esp_rmaker_read_ctx_t *ctx);
+
+/** Convert device callback source to string
+ *
+ * Device read/write callback can be via different sources. This is a helper API
+ * to give the source in string format for printing.
+ *
+ * Example Usage:
+ * @code{c}
+ * static esp_err_t write_cb(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param,
+ * const esp_rmaker_param_val_t val, void *priv_data, esp_rmaker_write_ctx_t *ctx)
+{
+    if (ctx) {
+        ESP_LOGI(TAG, "Received write request via : %s", esp_rmaker_device_cb_src_to_str(ctx->src));
+    }
+ * @endcode
+ *
+ * @param[in] src The src field as received in the callback context.
+ *
+ * @return NULL terminated source string on success
+ * @return NULL on failure
+ */
+const char *esp_rmaker_device_cb_src_to_str(esp_rmaker_req_src_t src);
+
+/**
+ * Initialise a Boolean value
+ *
+ * @param[in] bval Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_bool(bool bval);
+
+/**
+ * Initialise an Integer value
+ *
+ * @param[in] ival Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_int(int ival);
+
+/**
+ * Initialise a Float value
+ *
+ * @param[in] fval Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_float(float fval);
+
+/**
+ * Initialise a String value
+ *
+ * @param[in] sval Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_str(const char *sval);
+
+/**
+ * Initialise a json object value
+ *
+ * @note the object will not be validated internally. it is the application's
+ * responsibility to ensure that the object is a valid json object.
+ * eg. esp_rmaker_obj("{\"name\":\"value\"}");
+ *
+ * param[in] val initialising value
+ *
+ * return value structure
+ */
+esp_rmaker_param_val_t esp_rmaker_obj(const char *val);
+
+/**
+ * Initialise a json array value
+ *
+ * @note the array will not be validated internally. it is the application's
+ * responsibility to ensure that the array is a valid json array.
+ * eg. esp_rmaker_array("[1,2,3]");
+ *
+ * param[in] val initialising value
+ *
+ * return value structure
+ */
+esp_rmaker_param_val_t esp_rmaker_array(const char *val);
+
+
+/** Initialize ESP RainMaker Node
+ *
+ * This initializes the ESP RainMaker agent and creates the node.
+ * The model and firmware version for the node are set internally as per
+ * the project name and version. These can be overridden (but not recommended) using the
+ * esp_rmaker_node_add_fw_version() and esp_rmaker_node_add_model() APIs.
+ *
+ * @note This should be the first call before using any other ESP RainMaker API.
+ *
+ * @param[in] config Configuration to be used by the ESP RainMaker.
+ * @param[in] name Name of the node.
+ * @param[in] type Type of the node.
+ *
+ * @return Node handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_node_t *esp_rmaker_node_init(const esp_rmaker_config_t *config, const char *name, const char *type);
+
+/** Start ESP RainMaker Agent
+ *
+ * This call starts the actual ESP RainMaker thread. This should preferably be called after a
+ * successful Wi-Fi connection in order to avoid unnecessary failures.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_start(void);
+
+/** Stop ESP RainMaker Agent
+ *
+ * This call stops the ESP RainMaker Agent instance started earlier by esp_rmaker_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_stop(void);
+
+/** Deinitialize ESP RainMaker Node
+ *
+ * This API deinitializes the ESP RainMaker agent and the node created using esp_rmaker_node_init().
+ *
+ * @note This should be called after rainmaker has stopped.
+ *
+ * @param[in] node Node Handle returned by esp_rmaker_node_init().
+ *
+ * @retur ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_deinit(const esp_rmaker_node_t *node);
+
+/** Get a handle to the Node
+ *
+ * This API returns handle to a node created using esp_rmaker_node_init().
+ *
+ * @return Node handle on success.
+ * @return NULL in case of failure.
+ */
+const esp_rmaker_node_t *esp_rmaker_get_node(void);
+
+/** Get Node Id
+ *
+ * Returns pointer to the NULL terminated Node ID string.
+ *
+ * @return Pointer to a NULL terminated Node ID string.
+ */
+char *esp_rmaker_get_node_id(void);
+
+/** Get Node Info
+ *
+ * Returns pointer to the node info as configured during initialisation.
+ *
+ * @param node Node handle.
+ *
+ * @return Pointer to the node info on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_node_info_t *esp_rmaker_node_get_info(const esp_rmaker_node_t *node);
+
+/** Add Node attribute
+ *
+ * Adds a new attribute as the metadata for the node. For the sake of simplicity,
+ * only string values are allowed.
+ *
+ * @param node Node handle.
+ * @param[in] attr_name Name of the attribute.
+ * @param[in] val Value for the attribute.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_attribute(const esp_rmaker_node_t *node, const char *attr_name, const char *val);
+
+/** Add FW version for a node (Not recommended)
+ *
+ * FW version is set internally to the project version. This API can be used to
+ * override that version.
+ *
+ * @param node Node handle.
+ * @param[in] fw_version New firmware version.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_fw_version(const esp_rmaker_node_t *node, const char *fw_version);
+
+/** Add model for a node (Not recommended)
+ *
+ * Model is set internally to the project name. This API can be used to
+ * override that name.
+ *
+ * @param node Node handle.
+ * @param[in] model New model string.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_model(const esp_rmaker_node_t *node, const char *model);
+
+/**
+ * Create a Device
+ *
+ * This API will create a virtual "Device".
+ * This could be something like a Switch, Lightbulb, etc.
+ *
+ * @note The device created needs to be added to a node using esp_rmaker_node_add_device().
+ *
+ * @param[in] dev_name The unique device name.
+ * @param[in] type Optional device type. Can be kept NULL.
+ * @param[in] priv_data (Optional) Private data associated with the device. This will be passed to callbacks.
+ * It should stay allocated throughout the lifetime of the device.
+ *
+ * @return Device handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_device_create(const char *dev_name, const char *type, void *priv_data);
+
+/**
+ * Create a Service
+ *
+ * This API will create a "Service". It is exactly same like a device in terms of structure and so, all
+ * APIs for device are also valid for a service.
+ * A service could be something like OTA, diagnostics, etc.
+ *
+ * @note Name of a service should not clash with name of a device.
+ * @note The service created needs to be added to a node using esp_rmaker_node_add_device().
+ *
+ * @param[in] serv_name The unique service name.
+ * @param[in] type Optional service type. Can be kept NULL.
+ * @param[in] priv_data (Optional) Private data associated with the service. This will be passed to callbacks.
+ * It should stay allocated throughout the lifetime of the device.
+ *
+ * @return Device handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_service_create(const char *serv_name, const char *type, void *priv_data);
+
+/**
+ * Delete a Device/Service
+ *
+ * This API will delete a device created using esp_rmaker_device_create().
+ *
+ * @note The device should first be removed from the node using esp_rmaker_node_remove_device() before deleting.
+ *
+ * @param[in] device Device handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_delete(const esp_rmaker_device_t *device);
+
+/**
+ * Add callbacks for a device/service
+ *
+ * Add read/write callbacks for a device that will be invoked as per requests received from the cloud (or other paths
+ * as may be added in future).
+ *
+ * @param[in] device Device handle.
+ * @param[in] write_cb Write callback.
+ * @param[in] read_cb Read callback.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_cb(const esp_rmaker_device_t *device, esp_rmaker_device_write_cb_t write_cb, esp_rmaker_device_read_cb_t read_cb);
+
+/**
+ * Add a device to a node
+ *
+ * @param[in] node Node handle.
+ * @param[in] device Device handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_device(const esp_rmaker_node_t *node, const esp_rmaker_device_t *device);
+
+/**
+ * Remove a device from a node
+ *
+ * @param[in] node Node handle.
+ * @param[in] device Device handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_remove_device(const esp_rmaker_node_t *node, const esp_rmaker_device_t *device);
+
+/** Get device by name
+ *
+ * Get handle for a device based on the name.
+ *
+ * @param[in] node Node handle.
+ * @param[in] device_name Device name to search.
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_device_t *esp_rmaker_node_get_device_by_name(const esp_rmaker_node_t *node, const char *device_name);
+
+/** Add a Device attribute
+ *
+ * @note Device attributes are reported only once after a boot-up as part of the node
+ * configuration.
+ * Eg. Serial Number
+ *
+ * @param[in] device Device handle.
+ * @param[in] attr_name Name of the attribute.
+ * @param[in] val Value of the attribute.
+ *
+ * @return ESP_OK if the attribute was added successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_attribute(const esp_rmaker_device_t *device, const char *attr_name, const char *val);
+
+/** Add a Device subtype
+ *
+ * This can be something like esp.subtype.rgb-light for a device of type esp.device.lightbulb.
+ * This would primarily be used by the phone apps to render different icons for the same device type.
+ *
+ * @param[in] device Device handle.
+ * @param[in] subtype String describing the sub type.
+ *
+ * @return ESP_OK if the subtype was added successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_subtype(const esp_rmaker_device_t *device, const char *subtype);
+
+/** Get device name from handle
+ *
+ * @param[in] device Device handle.
+ *
+ * @return NULL terminated device name string on success.
+ * @return NULL in case of failure.
+ */
+char *esp_rmaker_device_get_name(const esp_rmaker_device_t *device);
+
+/** Get device type from handle
+ *
+ * @param[in] device Device handle.
+ *
+ * @return NULL terminated device type string on success.
+ * @return NULL in case of failure, or if the type wasn't provided while creating the device.
+ */
+char *esp_rmaker_device_get_type(const esp_rmaker_device_t *device);
+
+/**
+ * Add a parameter to a device/service
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_param(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param);
+
+
+/** Get parameter by type
+ *
+ * Get handle for a parameter based on the type.
+ *
+ * @note If there are multiple parameters with the same type, this will return the first one. The API
+ * esp_rmaker_device_get_param_by_name() can be used to get a specific parameter, because the parameter
+ * names in a device are unique.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param_type Parameter type to search.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_t *esp_rmaker_device_get_param_by_type(const esp_rmaker_device_t *device, const char *param_type);
+
+/** Get parameter by name
+ *
+ * Get handle for a parameter based on the name.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param_name Parameter name to search.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_t *esp_rmaker_device_get_param_by_name(const esp_rmaker_device_t *device, const char *param_name);
+
+/** Assign a primary parameter
+ *
+ * Assign a parameter (already added using esp_rmaker_device_add_param()) as a primary parameter,
+ * which can be used by clients (phone apps specifically) to give prominence to it.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ *
+ * @return ESP_OK if the parameter was assigned as the primary successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_assign_primary_param(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param);
+
+/**
+ * Create a Parameter
+ *
+ * Parameter can be something like Temperature, Outlet state, Lightbulb brightness, etc.
+ *
+ * Any changes should be reported using the esp_rmaker_param_update_and_report() API.
+ * Any remote changes will be reported to the application via the device callback, if registered.
+ *
+ * @note The parameter created needs to be added to a device using esp_rmaker_device_add_param().
+ * Parameter name should be unique in a given device.
+ *
+ * @param[in] param_name Name of the parameter.
+ a* @param[in] type Optional parameter type. Can be kept NULL.
+ * @param[in] val Value of the parameter. This also specifies the type that will be assigned
+ * to this parameter. You can use esp_rmaker_bool(), esp_rmaker_int(), esp_rmaker_float()
+ * or esp_rmaker_str() functions as the argument here. Eg, esp_rmaker_bool(true).
+ * @param[in] properties Properties of the parameter, which will be a logical OR of flags in
+ *  \ref esp_param_property_flags_t.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_t *esp_rmaker_param_create(const char *param_name, const char *type,
+        esp_rmaker_param_val_t val, uint8_t properties);
+
+/**
+ * Add a UI Type to a parameter
+ *
+ * This will be used by the Phone apps (or other clients) to render appropriate UI for the given
+ * parameter. Please refer the RainMaker documetation for supported UI Types.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] ui_type String describing the UI Type.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_ui_type(const esp_rmaker_param_t *param, const char *ui_type);
+
+/**
+ * Add bounds for an integer/float parameter
+ *
+ * This can be used to add bounds (min/max values) for a given integer parameter. Eg. brightness
+ * will have bounds as 0 and 100 if it is a percentage.
+ * Eg. esp_rmaker_param_add_bounds(brightness_param, esp_rmaker_int(0), esp_rmaker_int(100), esp_rmaker_int(5));
+ *
+ * @note The RainMaker core does not check the bounds. It is upto the application to handle it.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] min Minimum allowed value.
+ * @param[in] max Maximum allowed value.
+ * @param[in] step Minimum stepping (set to 0 if no specific value is desired).
+ *
+ * @return ESP_OK on success.
+ * return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_bounds(const esp_rmaker_param_t *param,
+    esp_rmaker_param_val_t min, esp_rmaker_param_val_t max, esp_rmaker_param_val_t step);
+
+/**
+ * Add a list of valid strings for a string parameter
+ *
+ * This can be used to add a list of valid strings for a given string parameter.
+ *
+ * Eg.
+ * static const char *valid_strs[] = {"None","Yes","No","Can't Say"};
+ * esp_rmaker_param_add_valid_str_list(param, valid_strs, 4);
+ *
+ * @note The RainMaker core does not check the values. It is upto the application to handle it.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] strs Pointer to an array of strings. Note that this memory should stay allocated
+ * throughout the lifetime of this parameter.
+ * @param[in] count Number of strings in the above array.
+ *
+ * @return ESP_OK on success.
+ * return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_valid_str_list(const esp_rmaker_param_t *param, const char *strs[], uint8_t count);
+
+/** Add max count for an array parameter
+ *
+ * This can be used to put a limit on the maximum number of elements in an array.
+ *
+ * @note The RainMaker core does not check the values. It is upto the application to handle it.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] count Max number of elements allowed in the array.
+ *
+ * @return ESP_OK on success.
+ * return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_array_max_count(const esp_rmaker_param_t *param, int count);
+
+
+/* Update a parameter
+ *
+ * This will just update the value of a parameter with esp rainmaker core, without actually reporting
+ * it. This can be used when multiple parameters need to be reported together.
+ * Eg. If x parameters are to be reported, this API can be used for the first x -1 parameters
+ * and the last one can be updated using esp_rmaker_param_update_and_report().
+ * This will report all parameters which were updated prior to this call.
+ *
+ * Sample:
+ *
+ * esp_rmaker_param_update(param1, esp_rmaker_float(10.2));
+ * esp_rmaker_param_update(param2, esp_rmaker_int(55));
+ * esp_rmaker_param_update(param3, esp_rmaker_int(95));
+ * esp_rmaker_param_update_and_report(param1, esp_rmaker_bool(true));
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] val New value of the parameter.
+ *
+ * @return ESP_OK if the parameter was updated successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_update(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
+
+/** Update and report a parameter
+ *
+ * Calling this API will update the parameter and report it to ESP RainMaker cloud.
+ * This should be used whenever there is any local change.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] val New value of the parameter.
+ *
+ * @return ESP_OK if the parameter was updated successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_update_and_report(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
+
+/** Update and notify a parameter
+ *
+ * Calling this API will update the parameter and report it to ESP RainMaker cloud similar to
+ * esp_rmaker_param_update_and_report(). However, additionally, it will also trigger a notification
+ * on the phone apps (if enabled).
+ *
+ * @note This should be used only when some local change requires explicit notification even when the
+ * phone app is in background, not otherwise.
+ * Eg. Alarm got triggered, temperature exceeded some threshold, etc.
+ *
+ * Alternatively, the esp_rmaker_raise_alert() API can also be used to trigger notification
+ * on the phone apps with pre-formatted text.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] val New value of the parameter.
+ *
+ * @return ESP_OK if the parameter was updated successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_update_and_notify(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
+
+/** Trigger an alert on the phone app
+ *
+ * This API will trigger a notification alert on the phone apps (if enabled) using the formatted text
+ * provided. Note that this does not send a notification directly to the phone, but reports the alert
+ * to the ESP RainMaker cloud which then uses the Notification framework to send notifications to the
+ * phone apps. The value does not get stored anywhere, nor is it linked to any node parameters.
+ *
+ * @note This should be used only if some event requires explicitly alerting the user even when the
+ * phone app is in background, not otherwise.
+ * Eg. "Motion Detected", "Fire alarm triggered"
+ *
+ * @param[in] alert_str NULL terminated pre-formatted alert string.
+ *     Maximum length can be ESP_RMAKER_MAX_ALERT_LEN, excluding NULL character.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_raise_alert(const char *alert_str);
+
+/** Get parameter name from handle
+ *
+ * @param[in] param Parameter handle.
+ *
+ * @return NULL terminated parameter name string on success.
+ * @return NULL in case of failure.
+ */
+char *esp_rmaker_param_get_name(const esp_rmaker_param_t *param);
+
+/** Get parameter type from handle
+ *
+ * @param[in] param Parameter handle.
+ *
+ * @return NULL terminated parameter type string on success.
+ * @return NULL in case of failure, or if the type wasn't provided while creating the parameter.
+ */
+char *esp_rmaker_param_get_type(const esp_rmaker_param_t *param);
+
+/** Get parameter value
+ *
+ * This gives the parameter value that is stored in the RainMaker core.
+ *
+ * @note This does not call any explicit functions to read value from hardware/driver.
+ *
+ * @param[in] param Parameter handle
+ *
+ * @return Pointer to parameter value on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_val_t *esp_rmaker_param_get_val(esp_rmaker_param_t *param);
+
+/** Report the node details to the cloud
+ *
+ * This API reports node details i.e. the node configuration and values of all the parameters to the ESP RainMaker cloud.
+ * Eg. If a new device is created (with some parameters and attributes), then this API should be called after that
+ * to send the node details to the cloud again and the changes to be reflected in the clients (like phone apps).
+ *
+ * @note Please use this API only if you need to create or delete devices after esp_rmaker_start() has already
+ * been called, for use cases like bridges or hubs.
+ *
+ * @return ESP_OK if the node details are successfully queued to be published.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_report_node_details(void);
+
+/** Enable Timezone Service
+ *
+ * This enables the ESP RainMaker standard timezone service which can be used to set
+ * timezone, either in POSIX or location string format. Please refer the specifications
+ * for additional details.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_timezone_service_enable(void);
+
+/** Enable System Service
+ *
+ * This enables the ESP RainMaker standard system service which can be
+ * used for operations like reboot, factory reset and Wi-Fi reset.
+ *
+ * Please refer the specifications for additional details.
+ *
+ * @param[in] config Configuration for the system service.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_system_service_enable(esp_rmaker_system_serv_config_t *config);
+
+/**
+ * Check if local_ctrl service has started
+ *
+ * @return true if service has started
+ * @return false if the service has not started
+ */
+bool esp_rmaker_local_ctrl_service_started(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_mqtt.h b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_mqtt.h
new file mode 100644
index 00000000000..1cc6cd5156e
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_mqtt.h
@@ -0,0 +1,90 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_rmaker_mqtt_glue.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+esp_rmaker_mqtt_conn_params_t *esp_rmaker_mqtt_get_conn_params(void);
+   
+/** Initialize ESP RainMaker MQTT
+ *
+ * @param[in] config The MQTT configuration data
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_init(esp_rmaker_mqtt_conn_params_t *conn_params);
+
+/** MQTT Connect
+ *
+ * Starts the connection attempts to the MQTT broker as per the configuration
+ * provided during initializing.
+ * This should ideally be called after successful network connection.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_connect(void);
+
+/** MQTT Disconnect
+ *
+ * Disconnects from the MQTT broker.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_disconnect(void);
+
+/** Publish MQTT Message
+ *
+ * @param[in] topic The MQTT topic on which the message should be published.
+ * @param[in] data Data to be published
+ * @param[in] data_len Length of the data
+ * @param[in] qos Quality of Service for the Publish. Can be 0, 1 or 2. Also depends on what the MQTT broker supports.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_publish(const char *topic, void *data, size_t data_len, uint8_t qos, int *msg_id);
+
+/** Subscribe to MQTT topic
+ *
+ * @param[in] topic The topic to be subscribed to.
+ * @param[in] cb The callback to be invoked when a message is received on the given topic.
+ * @param[in] priv_data Optional private data to be passed to the callback
+ * @param[in] qos Quality of Service for the Subscription. Can be 0, 1 or 2. Also depends on what the MQTT broker supports.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_subscribe(const char *topic, esp_rmaker_mqtt_subscribe_cb_t cb, uint8_t qos, void *priv_data);
+
+/** Unsubscribe from MQTT topic
+ *
+ * @param[in] topic Topic from which to unsubscribe.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_unsubscribe(const char *topic);
+esp_err_t esp_rmaker_mqtt_setup(esp_rmaker_mqtt_config_t mqtt_config);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_ota.h b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_ota.h
new file mode 100644
index 00000000000..e66b95705bc
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_ota.h
@@ -0,0 +1,150 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Default ESP RainMaker OTA Server Certificate */
+extern const char *ESP_RMAKER_OTA_DEFAULT_SERVER_CERT;
+
+/** OTA Status to be reported to ESP RainMaker Cloud */
+typedef enum {
+    /** OTA is in Progress. This can be reported multiple times as the OTA progresses. */
+    OTA_STATUS_IN_PROGRESS = 1,
+    /** OTA Succeeded. This should be reported only once, at the end of OTA. */
+    OTA_STATUS_SUCCESS,
+    /** OTA Failed. This should be reported only once, at the end of OTA. */
+    OTA_STATUS_FAILED,
+    /** OTA was delayed by the application */
+    OTA_STATUS_DELAYED,
+} ota_status_t;
+
+/** OTA Workflow type */
+typedef enum {
+    /** OTA will be performed using services and parameters. */
+    OTA_USING_PARAMS = 1,
+    /** OTA will be performed using pre-defined MQTT topics. */
+    OTA_USING_TOPICS
+} esp_rmaker_ota_type_t;
+
+/** The OTA Handle to be used by the OTA callback */
+typedef void *esp_rmaker_ota_handle_t;
+
+/** OTA Data */
+typedef struct {
+    /** The OTA URL received from ESP RainMaker Cloud */
+    char *url;
+    /** Size of the OTA File. Can be 0 if the file size isn't received from
+     * the ESP RainMaker Cloud */
+    int filesize;
+    /** The server certificate passed in esp_rmaker_enable_ota() */
+    const char *server_cert;
+    /** The private data passed in esp_rmaker_enable_ota() */
+    char *priv;
+} esp_rmaker_ota_data_t;
+
+/** Function prototype for OTA Callback
+ *
+ * This function will be invoked by the ESP RainMaker core whenever an OTA is available.
+ * The esp_rmaker_report_ota_status() API should be used to indicate the progress and
+ * success/fail status.
+ *
+ * @param[in] handle An OTA handle assigned by the ESP RainMaker Core
+ * @param[in] ota_data The data to be used for the OTA
+ *
+ * @return ESP_OK if the OTA was successful
+ * @return ESP_FAIL if the OTA failed.
+ */
+typedef esp_err_t (*esp_rmaker_ota_cb_t) (esp_rmaker_ota_handle_t handle,
+            esp_rmaker_ota_data_t *ota_data);
+
+/** Function Prototype for Post OTA Diagnostics
+ *
+ * If the Application rollback feature is enabled, this callback will be invoked
+ * as soon as you call esp_rmaker_ota_enable(), if it is the first
+ * boot after an OTA. You may perform some application specific diagnostics and
+ * report the status which will decide whether to roll back or not.
+ *
+ * @return true if diagnostics are successful, meaning that the new firmware is fine.
+ * @return false if diagnostics fail and a roolback to previous firmware is required.
+ */
+typedef bool (*esp_rmaker_post_ota_diag_t)(void);
+
+/** ESP RainMaker OTA Configuration */
+typedef struct {
+    /** OTA Callback.
+     * The callback to be invoked when an OTA Job is available.
+     * If kept NULL, the internal default callback will be used (Recommended).
+     */
+    esp_rmaker_ota_cb_t ota_cb;
+    /** OTA Diagnostics Callback.
+     * A post OTA diagnostic handler to be invoked if app rollback feature is enabled.
+     * If kept NULL, the new firmware will be assumed to be fine,
+     * and no rollback will be performed.
+     */
+    esp_rmaker_post_ota_diag_t ota_diag;
+    /** Server Certificate.
+     * The certificate to be passed to the OTA callback for server authentication.
+     * This is mandatory, unless you have disabled it in ESP HTTPS OTA config option.
+     * If you are using the ESP RainMaker OTA Service, you can just set this to
+     * `ESP_RMAKER_OTA_DEFAULT_SERVER_CERT`.
+     */
+    const char *server_cert;
+    /** Private Data.
+     * Optional private data to be passed to the OTA callback.
+     */
+    void *priv;
+} esp_rmaker_ota_config_t;
+
+/** Enable OTA
+ *
+ * Calling this API enables OTA as per the ESP RainMaker specification.
+ * Please check the various ESP RainMaker configuration options to
+ * use the different variants of OTA. Refer the documentation for
+ * additional details.
+ *
+ * @param[in] ota_config Pointer to an OTA configuration structure
+ * @param[in] type The OTA workflow type
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_ota_enable(esp_rmaker_ota_config_t *ota_config, esp_rmaker_ota_type_t type);
+
+/** Report OTA Status
+ *
+ * This API must be called from the OTA Callback to indicate the status of the OTA. The OTA_STATUS_IN_PROGRESS
+ * can be reported multiple times with appropriate additional information. The final success/failure should
+ * be reported only once, at the end.
+ *
+ * This can be ignored if you are using the default internal OTA callback.
+ *
+ * @param[in] ota_handle The OTA handle received by the callback
+ * @param[in] status Status to be reported
+ * @param[in] additional_info NULL terminated string indicating additional information for the status
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_ota_report_status(esp_rmaker_ota_handle_t ota_handle, ota_status_t status, char *additional_info);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_scenes.h b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_scenes.h
new file mode 100644
index 00000000000..f2f81f51a02
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_scenes.h
@@ -0,0 +1,38 @@
+// Copyright 2022 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <esp_err.h>
+
+/** Enable Scenes
+ *
+ * This API enables the scenes service for the node. For more information,
+ * check [here](https://rainmaker.espressif.com/docs/scenes.html)
+ *
+ * @note This API should be called after esp_rmaker_node_init() but before esp_rmaker_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_scenes_enable(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_schedule.h b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_schedule.h
new file mode 100644
index 00000000000..383c0949188
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_schedule.h
@@ -0,0 +1,38 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Enable Schedules
+ *
+ * This API enables the scheduling service for the node. For more information,
+ * check [here](https://rainmaker.espressif.com/docs/scheduling.html)
+ *
+ * It is recommended to set the timezone while using schedules. Check [here](https://rainmaker.espressif.com/docs/time-service.html#time-zone) for more information on timezones
+ *
+ * @note This API should be called after esp_rmaker_node_init() but before esp_rmaker_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_schedule_enable(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_devices.h b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_devices.h
new file mode 100644
index 00000000000..db9480672ba
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_devices.h
@@ -0,0 +1,96 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_rmaker_core.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Create a standard Switch device
+ *
+ * This creates a Switch device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * #@param[in] power Default value of the mandatory parameter "power"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_switch_device_create(const char *dev_name,
+            void *priv_data, bool power);
+
+/** Create a standard Lightbulb device
+ *
+ * This creates a Lightbulb device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * @param[in] power Default value of the mandatory parameter "power"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_lightbulb_device_create(const char *dev_name,
+            void *priv_data, bool power);
+
+/** Create a standard Fan device
+ *
+ * This creates a Fan device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * @param[in] power Default value of the mandatory parameter "power"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_fan_device_create(const char *dev_name,
+            void *priv_data, bool power);
+
+/** Create a standard Temperature Sensor device
+ *
+ * This creates a Temperature Sensor device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * @param[in] temperature Default value of the mandatory parameter "temperature"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_temp_sensor_device_create(const char *dev_name,
+            void *priv_data, float temperature);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_params.h b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_params.h
new file mode 100644
index 00000000000..944118c0f68
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_params.h
@@ -0,0 +1,350 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_rmaker_core.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/* Suggested default names for the parameters.
+ * These will also be used by default if you use any standard device helper APIs.
+ *
+ * @note These names are not mandatory. You can use the ESP RainMaker Core APIs
+ * to create your own parameters with custom names, if required.
+ */
+
+#define ESP_RMAKER_DEF_NAME_PARAM           "Name"
+#define ESP_RMAKER_DEF_POWER_NAME           "Power"
+#define ESP_RMAKER_DEF_BRIGHTNESS_NAME      "Brightness"
+#define ESP_RMAKER_DEF_HUE_NAME             "Hue"
+#define ESP_RMAKER_DEF_SATURATION_NAME      "Saturation"
+#define ESP_RMAKER_DEF_INTENSITY_NAME       "Intensity"
+#define ESP_RMAKER_DEF_CCT_NAME             "CCT"
+#define ESP_RMAKER_DEF_DIRECTION_NAME       "Direction"
+#define ESP_RMAKER_DEF_SPEED_NAME           "Speed"
+#define ESP_RMAKER_DEF_TEMPERATURE_NAME     "Temperature"
+#define ESP_RMAKER_DEF_OTA_STATUS_NAME      "Status"
+#define ESP_RMAKER_DEF_OTA_INFO_NAME        "Info"
+#define ESP_RMAKER_DEF_OTA_URL_NAME         "URL"
+#define ESP_RMAKER_DEF_TIMEZONE_NAME        "TZ"
+#define ESP_RMAKER_DEF_TIMEZONE_POSIX_NAME  "TZ-POSIX"
+#define ESP_RMAKER_DEF_SCHEDULE_NAME        "Schedules"
+#define ESP_RMAKER_DEF_SCENES_NAME          "Scenes"
+#define ESP_RMAKER_DEF_REBOOT_NAME          "Reboot"
+#define ESP_RMAKER_DEF_FACTORY_RESET_NAME   "Factory-Reset"
+#define ESP_RMAKER_DEF_WIFI_RESET_NAME      "Wi-Fi-Reset"
+#define ESP_RMAKER_DEF_LOCAL_CONTROL_POP    "POP"
+#define ESP_RMAKER_DEF_LOCAL_CONTROL_TYPE   "Type"
+
+/**
+ * Create standard name param
+ *
+ * This will create the standard name parameter.
+ * This should be added to all devices for which you want a user customisable name.
+ * The value should be same as the device name.
+ *
+ * All standard device creation APIs will add this internally.
+ * No application registered callback will be called for this parameter,
+ * and changes will be managed internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_name_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard Power param
+ *
+ * This will create the standard power parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_power_param_create(const char *param_name, bool val);
+
+/**
+ * Create standard Brightness param
+ *
+ * This will create the standard brightness parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_brightness_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Hue param
+ *
+ * This will create the standard hue parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_hue_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Saturation param
+ *
+ * This will create the standard saturation parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_saturation_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Intensity param
+ *
+ * This will create the standard intensity parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_intensity_param_create(const char *param_name, int val);
+
+/**
+ * Create standard CCT param
+ *
+ * This will create the standard cct parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_cct_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Direction param
+ *
+ * This will create the standard direction parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_direction_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Speed param
+ *
+ * This will create the standard speed parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_speed_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Temperature param
+ *
+ * This will create the standard temperature parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_temperature_param_create(const char *param_name, float val);
+
+/**
+ * Create standard OTA Status param
+ *
+ * This will create the standard ota status parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_ota_status_param_create(const char *param_name);
+
+/**
+ * Create standard OTA Info param
+ *
+ * This will create the standard ota info parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_ota_info_param_create(const char *param_name);
+
+/**
+ * Create standard OTA URL param
+ *
+ * This will create the standard ota url parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_ota_url_param_create(const char *param_name);
+
+/**
+ * Create standard Timezone param
+ *
+ * This will create the standard timezone parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter (Eg. "Asia/Shanghai"). Can be kept NULL.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_timezone_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard POSIX Timezone param
+ *
+ * This will create the standard posix timezone parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter (Eg. "CST-8"). Can be kept NULL.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_timezone_posix_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard Schedules param
+ *
+ * This will create the standard schedules parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] max_schedules Maximum number of schedules allowed
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_schedules_param_create(const char *param_name, int max_schedules);
+
+/**
+ * Create standard Scenes param
+ *
+ * This will create the standard scenes parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] max_scenes Maximum number of scenes allowed
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_scenes_param_create(const char *param_name, int max_scenes);
+
+/**
+ * Create standard Reboot param
+ *
+ * This will create the standard reboot parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_reboot_param_create(const char *param_name);
+
+/**
+ * Create standard Factory Reset param
+ *
+ * This will create the standard factory reset parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_factory_reset_param_create(const char *param_name);
+
+/**
+ * Create standard Wi-Fi Reset param
+ *
+ * This will create the standard Wi-Fi Reset parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_wifi_reset_param_create(const char *param_name);
+
+/**
+ * Create standard Local Control POP param
+ *
+ * This will create the standard Local Control POP parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter (Eg. "abcd1234"). Can be kept NULL.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_local_control_pop_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard Local Control Type param
+ *
+ * This will create the standard Local Control security type parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_local_control_type_param_create(const char *param_name, int val);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_services.h b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_services.h
new file mode 100644
index 00000000000..687df733f46
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_services.h
@@ -0,0 +1,124 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_rmaker_core.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Create a standard OTA service
+ *
+ * This creates an OTA service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_ota_service_create(const char *serv_name, void *priv_data);
+
+/** Create a standard OTA service
+ *
+ * This creates an OTA service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] timezone Default value of timezone string (Eg. "Asia/Shanghai"). Can be kept NULL.
+ * @param[in] timezone_posix Default value of posix timezone string (Eg. "CST-8"). Can be kept NULL.
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_time_service_create(const char *serv_name, const char *timezone,
+        const char *timezone_posix, void *priv_data);
+
+/** Create a standard Schedule service
+ *
+ * This creates a Schedule service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] write_cb Write callback.
+ * @param[in] read_cb Read callback.
+ * @param[in] max_schedules Maximum number of schedules supported.
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_create_schedule_service(const char *serv_name, esp_rmaker_device_write_cb_t write_cb, esp_rmaker_device_read_cb_t read_cb, int max_schedules, void *priv_data);
+
+/** Create a standard Scenes service
+ *
+ * This creates a Scenes service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] write_cb Write callback.
+ * @param[in] read_cb Read callback.
+ * @param[in] max_scenes Maximum number of scenes supported.
+ * @param[in] deactivation_support Deactivation callback support.
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_create_scenes_service(const char *serv_name, esp_rmaker_device_write_cb_t write_cb, esp_rmaker_device_read_cb_t read_cb, int max_scenes, bool deactivation_support, void *priv_data);
+
+/** Create a standard System service
+ *
+ * This creates an empty System service. Appropriate parameters should be added by the caller.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+
+esp_rmaker_device_t *esp_rmaker_create_system_service(const char *serv_name, void *priv_data);
+
+/** Create a standard Local Control service
+ *
+ * This creates a Local Control service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] pop Proof of possession
+ * @param[in] sec_type Security type
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_create_local_control_service(const char *serv_name, const char *pop, int sec_type, void *priv_data);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_types.h b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_types.h
new file mode 100644
index 00000000000..4dc99eab401
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_standard_types.h
@@ -0,0 +1,73 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/********** STANDARD UI TYPES **********/
+
+#define ESP_RMAKER_UI_TOGGLE            "esp.ui.toggle"
+#define ESP_RMAKER_UI_SLIDER            "esp.ui.slider"
+#define ESP_RMAKER_UI_DROPDOWN          "esp.ui.dropdown"
+#define ESP_RMAKER_UI_TEXT              "esp.ui.text"
+#define ESP_RMAKER_UI_HUE_SLIDER        "esp.ui.hue-slider"
+
+/********** STANDARD PARAM TYPES **********/
+
+#define ESP_RMAKER_PARAM_NAME           "esp.param.name"
+#define ESP_RMAKER_PARAM_POWER          "esp.param.power"
+#define ESP_RMAKER_PARAM_BRIGHTNESS     "esp.param.brightness"
+#define ESP_RMAKER_PARAM_HUE            "esp.param.hue"
+#define ESP_RMAKER_PARAM_SATURATION     "esp.param.saturation"
+#define ESP_RMAKER_PARAM_INTENSITY      "esp.param.intensity"
+#define ESP_RMAKER_PARAM_CCT            "esp.param.cct"
+#define ESP_RMAKER_PARAM_SPEED          "esp.param.speed"
+#define ESP_RMAKER_PARAM_DIRECTION      "esp.param.direction"
+#define ESP_RMAKER_PARAM_TEMPERATURE    "esp.param.temperature"
+#define ESP_RMAKER_PARAM_OTA_STATUS     "esp.param.ota_status"
+#define ESP_RMAKER_PARAM_OTA_INFO       "esp.param.ota_info"
+#define ESP_RMAKER_PARAM_OTA_URL        "esp.param.ota_url"
+#define ESP_RMAKER_PARAM_TIMEZONE       "esp.param.tz"
+#define ESP_RMAKER_PARAM_TIMEZONE_POSIX       "esp.param.tz_posix"
+#define ESP_RMAKER_PARAM_SCHEDULES      "esp.param.schedules"
+#define ESP_RMAKER_PARAM_SCENES         "esp.param.scenes"
+#define ESP_RMAKER_PARAM_REBOOT         "esp.param.reboot"
+#define ESP_RMAKER_PARAM_FACTORY_RESET  "esp.param.factory-reset"
+#define ESP_RMAKER_PARAM_WIFI_RESET     "esp.param.wifi-reset"
+#define ESP_RMAKER_PARAM_LOCAL_CONTROL_POP      "esp.param.local_control_pop"
+#define ESP_RMAKER_PARAM_LOCAL_CONTROL_TYPE     "esp.param.local_control_type"
+
+
+/********** STANDARD DEVICE TYPES **********/
+
+#define ESP_RMAKER_DEVICE_SWITCH        "esp.device.switch"
+#define ESP_RMAKER_DEVICE_LIGHTBULB     "esp.device.lightbulb"
+#define ESP_RMAKER_DEVICE_FAN           "esp.device.fan"
+#define ESP_RMAKER_DEVICE_TEMP_SENSOR   "esp.device.temperature-sensor"
+
+
+/********** STANDARD SERVICE TYPES **********/
+#define ESP_RMAKER_SERVICE_OTA          "esp.service.ota"
+#define ESP_RMAKER_SERVICE_TIME         "esp.service.time"
+#define ESP_RMAKER_SERVICE_SCHEDULE     "esp.service.schedule"
+#define ESP_RMAKER_SERVICE_SCENES       "esp.service.scenes"
+#define ESP_RMAKER_SERVICE_SYSTEM       "esp.service.system"
+#define ESP_RMAKER_SERVICE_LOCAL_CONTROL    "esp.service.local_control"
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_user_mapping.h b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_user_mapping.h
new file mode 100644
index 00000000000..77a153b02f2
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_rainmaker/include/esp_rmaker_user_mapping.h
@@ -0,0 +1,83 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** User-Node Mapping states */
+typedef enum {
+    /** Mapping does not exist or is not initialized */
+    ESP_RMAKER_USER_MAPPING_RESET = 0,
+    /** Mapping has started */
+    ESP_RMAKER_USER_MAPPING_STARTED,
+    /** Mapping is done */
+    ESP_RMAKER_USER_MAPPING_DONE,
+} esp_rmaker_user_mapping_state_t;
+
+/**
+ * Get User-Node mapping state
+ *
+ * This returns the current user-node mapping state.
+ *
+ * @return user mapping state
+ */
+esp_rmaker_user_mapping_state_t esp_rmaker_user_node_mapping_get_state(void);
+
+/**
+ * Create User Mapping Endpoint
+ *
+ * This will create a custom provisioning endpoint for user-node mapping.
+ * This should be called after wifi_prov_mgr_init() but before
+ * wifi_prov_mgr_start_provisioning()
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_user_mapping_endpoint_create(void);
+
+/**
+ * Register User Mapping Endpoint
+ *
+ * This will register the callback for the custom provisioning endpoint
+ * for user-node mapping which was created with esp_rmaker_user_mapping_endpoint_create().
+ * This should be called immediately after wifi_prov_mgr_start_provisioning().
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_user_mapping_endpoint_register(void);
+
+/** Add User-Node mapping
+ *
+ * This call will start the user-node mapping workflow on the node.
+ * This is automatically called if you have used esp_rmaker_user_mapping_endpoint_register().
+ * Use this API only if you want to trigger the user-node mapping after the Wi-Fi provisioning
+ * has already been done.
+ *
+ * @param[in] user_id The User identifier received from the client (Phone app/CLI)
+ * @param[in] secret_key The Secret key received from the client (Phone app/CLI)
+ *
+ * @return ESP_OK if the workflow was successfully triggered. This does not guarantee success
+ * of the actual mapping. The mapping status needs to be checked separately by the clients.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_start_user_node_mapping(char *user_id, char *secret_key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32/rom/secure_boot.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32/rom/secure_boot.h
index 1eb69e25378..50a3fcd4948 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32/rom/secure_boot.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32/rom/secure_boot.h
@@ -1,21 +1,12 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include "sdkconfig.h"
 
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+#pragma once
 
 #include <stdint.h>
 #include "ets_sys.h"
@@ -128,5 +119,3 @@ bool ets_use_secure_boot_v2(void);
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/secure_boot.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/secure_boot.h
index 71cf7250d29..a9d417283b7 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/secure_boot.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/secure_boot.h
@@ -1,19 +1,10 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
 
 #include <stdint.h>
 #include <stdbool.h>
@@ -24,9 +15,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
@@ -127,5 +115,3 @@ struct ets_secure_boot_key_digests {
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/rtc.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/rtc.h
index ad4f45c2ca7..e3a8d9d63e2 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/rtc.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/rtc.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef _ROM_RTC_H_
 #define _ROM_RTC_H_
@@ -124,7 +116,7 @@ _Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "
 _Static_assert((soc_reset_reason_t)USB_UART_CHIP_RESET == RESET_REASON_CORE_USB_UART, "USB_UART_CHIP_RESET != RESET_REASON_CORE_USB_UART");
 _Static_assert((soc_reset_reason_t)USB_JTAG_CHIP_RESET == RESET_REASON_CORE_USB_JTAG, "USB_JTAG_CHIP_RESET != RESET_REASON_CORE_USB_JTAG");
 _Static_assert((soc_reset_reason_t)POWER_GLITCH_RESET == RESET_REASON_CORE_PWR_GLITCH, "POWER_GLITCH_RESET != RESET_REASON_CORE_PWR_GLITCH");
-_Static_assert((soc_reset_reason_t)JTAG_RESET == RESET_REASON_CPU_JTAG, "JTAG_RESET != RESET_REASON_CPU_JTAG");
+_Static_assert((soc_reset_reason_t)JTAG_RESET == RESET_REASON_CPU0_JTAG, "JTAG_RESET != RESET_REASON_CPU0_JTAG");
 
 typedef enum {
     NO_SLEEP        = 0,
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/secure_boot.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/secure_boot.h
index 71cf7250d29..36a490d8584 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/secure_boot.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/secure_boot.h
@@ -1,19 +1,10 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
 
 #include <stdint.h>
 #include <stdbool.h>
@@ -24,9 +15,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
@@ -127,5 +115,3 @@ struct ets_secure_boot_key_digests {
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32s2/rom/secure_boot.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32s2/rom/secure_boot.h
index 8e880817860..a0fcecfd3c5 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32s2/rom/secure_boot.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32s2/rom/secure_boot.h
@@ -1,19 +1,10 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
 
 #include <stdint.h>
 #include "ets_sys.h"
@@ -23,9 +14,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
@@ -126,5 +114,3 @@ struct ets_secure_boot_key_digests {
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32s3/rom/secure_boot.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32s3/rom/secure_boot.h
index e720697b3e6..a372517b7a1 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32s3/rom/secure_boot.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32s3/rom/secure_boot.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -23,9 +15,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
diff --git a/tools/sdk/esp32c3/include/esp_schedule/include/esp_schedule.h b/tools/sdk/esp32c3/include/esp_schedule/include/esp_schedule.h
new file mode 100644
index 00000000000..4b611830a7d
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_schedule/include/esp_schedule.h
@@ -0,0 +1,231 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/** Schedule Handle */
+typedef void *esp_schedule_handle_t;
+
+/** Maximum length of the schedule name allowed. This value cannot be more than 16 as it is used for NVS key. */
+#define MAX_SCHEDULE_NAME_LEN 16
+
+/** Callback for schedule trigger
+ *
+ * This callback is called when the schedule is triggered.
+ *
+ * @param[in] handle Schedule handle.
+ * @param[in] priv_data Pointer to the private data passed while creating/editing the schedule.
+ */
+typedef void (*esp_schedule_trigger_cb_t)(esp_schedule_handle_t handle, void *priv_data);
+
+/** Callback for schedule timestamp
+ *
+ * This callback is called when the next trigger timestamp of the schedule is changed. This might be useful to check if
+ * one time schedules have already passed while the device was powered off.
+ *
+ * @param[in] handle Schedule handle.
+ * @param[in] next_timestamp timestamp at which the schedule will trigger next.
+ * @param[in] priv_data Pointer to the user data passed while creating/editing the schedule.
+ */
+typedef void (*esp_schedule_timestamp_cb_t)(esp_schedule_handle_t handle, uint32_t next_timestamp, void *priv_data);
+
+/** Schedule type */
+typedef enum esp_schedule_type {
+    ESP_SCHEDULE_TYPE_INVALID = 0,
+    ESP_SCHEDULE_TYPE_DAYS_OF_WEEK,
+    ESP_SCHEDULE_TYPE_DATE,
+    ESP_SCHEDULE_TYPE_RELATIVE,
+} esp_schedule_type_t;
+
+/** Schedule days. Used for ESP_SCHEDULE_TYPE_DAYS_OF_WEEK. */
+typedef enum esp_schedule_days {
+    ESP_SCHEDULE_DAY_ONCE      = 0,
+    ESP_SCHEDULE_DAY_EVERYDAY  = 0b1111111,
+    ESP_SCHEDULE_DAY_MONDAY    = 1 << 0,
+    ESP_SCHEDULE_DAY_TUESDAY   = 1 << 1,
+    ESP_SCHEDULE_DAY_WEDNESDAY = 1 << 2,
+    ESP_SCHEDULE_DAY_THURSDAY  = 1 << 3,
+    ESP_SCHEDULE_DAY_FRIDAY    = 1 << 4,
+    ESP_SCHEDULE_DAY_SATURDAY  = 1 << 5,
+    ESP_SCHEDULE_DAY_SUNDAY    = 1 << 6,
+} esp_schedule_days_t;
+
+/** Schedule months. Used for ESP_SCHEDULE_TYPE_DATE. */
+typedef enum esp_schedule_months {
+    ESP_SCHEDULE_MONTH_ONCE         = 0,
+    ESP_SCHEDULE_MONTH_ALL          = 0b1111111,
+    ESP_SCHEDULE_MONTH_JANUARY      = 1 << 0,
+    ESP_SCHEDULE_MONTH_FEBRUARY     = 1 << 1,
+    ESP_SCHEDULE_MONTH_MARCH        = 1 << 2,
+    ESP_SCHEDULE_MONTH_APRIL        = 1 << 3,
+    ESP_SCHEDULE_MONTH_MAY          = 1 << 4,
+    ESP_SCHEDULE_MONTH_JUNE         = 1 << 5,
+    ESP_SCHEDULE_MONTH_JULY         = 1 << 6,
+    ESP_SCHEDULE_MONTH_AUGUST       = 1 << 7,
+    ESP_SCHEDULE_MONTH_SEPTEMBER    = 1 << 8,
+    ESP_SCHEDULE_MONTH_OCTOBER      = 1 << 9,
+    ESP_SCHEDULE_MONTH_NOVEMBER     = 1 << 10,
+    ESP_SCHEDULE_MONTH_DECEMBER     = 1 << 11,
+} esp_schedule_months_t;
+
+/** Trigger details of the schedule */
+typedef struct esp_schedule_trigger {
+    /** Type of schedule */
+    esp_schedule_type_t type;
+    /** Hours in 24 hour format. Accepted values: 0-23 */
+    uint8_t hours;
+    /** Minutes in the given hour. Accepted values: 0-59. */
+    uint8_t minutes;
+    /** For type ESP_SCHEDULE_TYPE_DAYS_OF_WEEK */
+    struct {
+        /** 'OR' list of esp_schedule_days_t */
+        uint8_t repeat_days;
+    } day;
+    /** For type ESP_SCHEDULE_TYPE_DATE */
+    struct {
+        /** Day of the month. Accepted values: 1-31. */
+        uint8_t day;
+        /* 'OR' list of esp_schedule_months_t */
+        uint16_t repeat_months;
+        /** Year */
+        uint16_t year;
+        /** If the schedule is to be repeated every year. */
+        bool repeat_every_year;
+    } date;
+    /** For type ESP_SCHEDULE_TYPE_SECONDS */
+    int relative_seconds;
+    /** Used for passing the next schedule timestamp for
+     * ESP_SCHEDULE_TYPE_RELATIVE */
+    time_t next_scheduled_time_utc;
+} esp_schedule_trigger_t;
+
+/** Schedule config */
+typedef struct esp_schedule_config {
+    /** Name of the schedule. This is like a primary key for the schedule. This is required. +1 for NULL termination. */
+    char name[MAX_SCHEDULE_NAME_LEN + 1];
+    /** Trigger details */
+    esp_schedule_trigger_t trigger;
+    /** Trigger callback */
+    esp_schedule_trigger_cb_t trigger_cb;
+    /** Timestamp callback */
+    esp_schedule_timestamp_cb_t timestamp_cb;
+    /** Private data associated with the schedule. This will be passed to callbacks. */
+    void *priv_data;
+} esp_schedule_config_t;
+
+/** Initialize ESP Schedule
+ *
+ * This initializes ESP Schedule. This must be called first before calling any of the other APIs.
+ * This API also gets all the schedules from NVS (if it has been enabled).
+ *
+ * Note: After calling this API, the pointers to the callbacks should be updated for all the schedules by calling
+ * esp_schedule_get() followed by esp_schedule_edit() with the correct callbacks.
+ *
+ * @param[in] enable_nvs If NVS is to be enabled or not.
+ * @param[in] nvs_partition (Optional) The NVS partition to be used. If NULL is passed, the default partition is used.
+ * @param[out] schedule_count Number of active schedules found in NVS.
+ *
+ * @return Array of schedule handles if any schedules have been found.
+ * @return NULL if no schedule is found in NVS (or if NVS is not enabled).
+ */
+esp_schedule_handle_t *esp_schedule_init(bool enable_nvs, char *nvs_partition, uint8_t *schedule_count);
+
+/** Create Schedule
+ *
+ * This API can be used to create a new schedule. The schedule still needs to be enabled using
+ * esp_schedule_enable().
+ *
+ * @param[in] schedule_config Configuration of the schedule to be created.
+ *
+ * @return Schedule handle if successfully created.
+ * @return NULL in case of error.
+ */
+esp_schedule_handle_t esp_schedule_create(esp_schedule_config_t *schedule_config);
+
+/** Remove Schedule
+ *
+ * This API can be used to remove an existing schedule.
+ *
+ * @param[in] handle Schedule handle for the schedule to be removed.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_delete(esp_schedule_handle_t handle);
+
+/** Edit Schedule
+ *
+ * This API can be used to edit an existing schedule.
+ * The schedule name should be same as when the schedule was created. The complete config must be provided
+ * or the previously stored config might be over-written.
+ *
+ * Note: If a schedule is edited when it is on-going, the new changes will not be reflected.
+ * You will need to disable the schedule, edit it, and then enable it again.
+ *
+ * @param[in] handle Schedule handle for the schedule to be edited.
+ * @param[in] schedule_config Configuration of the schedule to be edited.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_edit(esp_schedule_handle_t handle, esp_schedule_config_t *schedule_config);
+
+/** Enable Schedule
+ *
+ * This API can be used to enable an existing schedule.
+ * It can be used to enable a schedule after it has been created using esp_schedule_create()
+ * or if the schedule has been disabled using esp_schedule_disable().
+ *
+ * @param[in] handle Schedule handle for the schedule to be enabled.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_enable(esp_schedule_handle_t handle);
+
+/** Disable Schedule
+ *
+ * This API can be used to disable an on-going schedule.
+ * It does not remove the schedule, just stops it. The schedule can be enabled again using
+ * esp_schedule_enable().
+ *
+ * @param[in] handle Schedule handle for the schedule to be disabled.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_disable(esp_schedule_handle_t handle);
+
+/** Get Schedule
+ *
+ * This API can be used to get details of an existing schedule.
+ * The schedule_config is populated with the schedule details.
+ *
+ * @param[in] handle Schedule handle.
+ * @param[out] schedule_config Details of the schedule whose handle is passed.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_get(esp_schedule_handle_t handle, esp_schedule_config_t *schedule_config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h b/tools/sdk/esp32c3/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h
index 3dfd4a14b75..e69de29bb2d 100644
--- a/tools/sdk/esp32c3/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h
+++ b/tools/sdk/esp32c3/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h
@@ -1,38 +0,0 @@
-// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-
-#pragma once
-
-// NOTE: From the view of master
-#define CMD_HD_WRBUF_REG    0x01
-#define CMD_HD_RDBUF_REG    0x02
-#define CMD_HD_WRDMA_REG    0x03
-#define CMD_HD_RDDMA_REG    0x04
-
-#define CMD_HD_ONEBIT_MODE  0x00
-#define CMD_HD_DOUT_MODE    0x10
-#define CMD_HD_QOUT_MODE    0x20
-#define CMD_HD_DIO_MODE     0x50
-#define CMD_HD_QIO_MODE     0xA0
-
-#define CMD_HD_SEG_END_REG  0x05
-#define CMD_HD_EN_QPI_REG   0x06
-#define CMD_HD_WR_END_REG   0x07
-#define CMD_HD_INT0_REG     0x08
-#define CMD_HD_INT1_REG     0x09
-#define CMD_HD_INT2_REG     0x0A
-#define CMD_HD_EX_QPI_REG   0xDD
-
-#define SPI_SLAVE_HD_BUFFER_SIZE 64
diff --git a/tools/sdk/esp32c3/include/esp_system/include/esp_private/esp_ipc_isr.h b/tools/sdk/esp32c3/include/esp_system/include/esp_private/esp_ipc_isr.h
new file mode 100644
index 00000000000..ccdfe1deaa2
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_system/include/esp_private/esp_ipc_isr.h
@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_ESP_IPC_ISR_ENABLE
+
+/**
+ * @brief Initialize the IPC ISR feature, must be called for each CPU
+ *
+ * @note This function is called from ipc_task().
+ *
+ * This function initializes the IPC ISR feature and must be called before any other esp_ipc_isr...() functions.
+ * The IPC ISR feature allows for callbacks (written in assembly) to be run on a particular CPU in the context of a
+ * High Priority Interrupt.
+ *
+ * - This function will register a High Priority Interrupt for a CPU where it is called. The priority of the interrupts is dependent on
+ *   the CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL option.
+ * - Callbacks written in assembly can then run in context of the registered High Priority Interrupts
+ * - Callbacks can be executed by calling esp_ipc_isr_asm_call() or esp_ipc_isr_asm_call_blocking()
+ */
+void esp_ipc_isr_init(void);
+
+#endif // CONFIG_ESP_IPC_ISR_ENABLE
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi.h b/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi.h
index 2d671591765..bcd10c77a10 100644
--- a/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi.h
+++ b/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi.h
@@ -228,21 +228,21 @@ extern uint64_t g_wifi_feature_caps;
     .feature_caps = g_wifi_feature_caps, \
     .sta_disconnected_pm = WIFI_STA_DISCONNECTED_PM_ENABLED,  \
     .magic = WIFI_INIT_CONFIG_MAGIC\
-};
+}
 
 /**
-  * @brief  Init WiFi
-  *         Alloc resource for WiFi driver, such as WiFi control structure, RX/TX buffer,
-  *         WiFi NVS structure etc, this WiFi also start WiFi task
+  * @brief  Initialize WiFi
+  *         Allocate resource for WiFi driver, such as WiFi control structure, RX/TX buffer,
+  *         WiFi NVS structure etc. This WiFi also starts WiFi task
   *
   * @attention 1. This API must be called before all other WiFi API can be called
-  * @attention 2. Always use WIFI_INIT_CONFIG_DEFAULT macro to init the config to default values, this can
-  *               guarantee all the fields got correct value when more fields are added into wifi_init_config_t
-  *               in future release. If you want to set your owner initial values, overwrite the default values
-  *               which are set by WIFI_INIT_CONFIG_DEFAULT, please be notified that the field 'magic' of
+  * @attention 2. Always use WIFI_INIT_CONFIG_DEFAULT macro to initialize the configuration to default values, this can
+  *               guarantee all the fields get correct value when more fields are added into wifi_init_config_t
+  *               in future release. If you want to set your own initial values, overwrite the default values
+  *               which are set by WIFI_INIT_CONFIG_DEFAULT. Please be notified that the field 'magic' of
   *               wifi_init_config_t should always be WIFI_INIT_CONFIG_MAGIC!
   *
-  * @param  config pointer to WiFi init configuration structure; can point to a temporary variable.
+  * @param  config pointer to WiFi initialized configuration structure; can point to a temporary variable.
   *
   * @return
   *    - ESP_OK: succeed
diff --git a/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_types.h b/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_types.h
index ae574416b9c..47f5c79281b 100644
--- a/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_types.h
+++ b/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_types.h
@@ -215,7 +215,7 @@ typedef enum {
 
 /** Configuration structure for Protected Management Frame */
 typedef struct {
-    bool capable;            /**< Advertizes support for Protected Management Frame. Device will prefer to connect in PMF mode if other device also advertizes PMF capability. */
+    bool capable;            /**< Deprecated variable. Device will always connect in PMF mode if other device also advertizes PMF capability. */
     bool required;           /**< Advertizes that Protected Management Frame is required. Device will not associate to non-PMF capable devices. */
 } wifi_pmf_config_t;
 
diff --git a/tools/sdk/esp32c3/include/expat/expat/expat/lib/expat.h b/tools/sdk/esp32c3/include/expat/expat/expat/lib/expat.h
index b7d6d354801..0f021e25def 100644
--- a/tools/sdk/esp32c3/include/expat/expat/expat/lib/expat.h
+++ b/tools/sdk/esp32c3/include/expat/expat/expat/lib/expat.h
@@ -11,7 +11,7 @@
    Copyright (c) 2000-2005 Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
    Copyright (c) 2001-2002 Greg Stein <gstein@users.sourceforge.net>
    Copyright (c) 2002-2016 Karl Waclawek <karl@waclawek.net>
-   Copyright (c) 2016-2021 Sebastian Pipping <sebastian@pipping.org>
+   Copyright (c) 2016-2022 Sebastian Pipping <sebastian@pipping.org>
    Copyright (c) 2016      Cristian Rodríguez <crrodriguez@opensuse.org>
    Copyright (c) 2016      Thomas Beutlich <tc@tbeu.de>
    Copyright (c) 2017      Rhodri James <rhodri@wildebeest.org.uk>
@@ -1041,7 +1041,7 @@ XML_SetBillionLaughsAttackProtectionActivationThreshold(
 */
 #define XML_MAJOR_VERSION 2
 #define XML_MINOR_VERSION 4
-#define XML_MICRO_VERSION 1
+#define XML_MICRO_VERSION 3
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32c3/include/expat/port/include/expat_config.h b/tools/sdk/esp32c3/include/expat/port/include/expat_config.h
index b6b927a19bb..468910220f4 100644
--- a/tools/sdk/esp32c3/include/expat/port/include/expat_config.h
+++ b/tools/sdk/esp32c3/include/expat/port/include/expat_config.h
@@ -63,7 +63,7 @@
 #define PACKAGE_NAME "expat"
 
 /* Define to the full name and version of this package. */
-#define PACKAGE_STRING "expat 2.2.5"
+#define PACKAGE_STRING "expat 2.4.3"
 
 /* Define to the one symbol short name of this package. */
 #define PACKAGE_TARNAME "expat"
@@ -72,13 +72,13 @@
 #define PACKAGE_URL ""
 
 /* Define to the version of this package. */
-#define PACKAGE_VERSION "2.2.5"
+#define PACKAGE_VERSION "2.4.3"
 
 /* Define to 1 if you have the ANSI C header files. */
 #define STDC_HEADERS 1
 
 /* Version number of package */
-#define VERSION "2.2.5"
+#define VERSION "2.4.3"
 
 /* whether byteorder is bigendian */
 /* #undef WORDS_BIGENDIAN */
diff --git a/tools/sdk/esp32c3/include/fb_gfx/include/fb_gfx.h b/tools/sdk/esp32c3/include/fb_gfx/include/fb_gfx.h
index 079ff7bfe4a..158c80f6bf4 100644
--- a/tools/sdk/esp32c3/include/fb_gfx/include/fb_gfx.h
+++ b/tools/sdk/esp32c3/include/fb_gfx/include/fb_gfx.h
@@ -19,7 +19,7 @@ extern "C" {
 #endif
 
     typedef enum {
-        FB_RGB888, FB_BGR888, FB_RGB565, FB_BGR565
+        FB_RGB888, FB_BGR888, FB_RGB565, FB_BGR565, FB_GRAY
     } fb_format_t;
 
     typedef struct {
diff --git a/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_common.h b/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_common.h
index 398af0ba9db..9c65f08b90d 100644
--- a/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_common.h
+++ b/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_common.h
@@ -22,6 +22,24 @@
 extern "C" {
 #endif
 
+#if __has_include("esp_check.h")
+#include "esp_check.h"
+
+#define MB_RETURN_ON_FALSE(a, err_code, tag, format, ...) ESP_RETURN_ON_FALSE(a, err_code, tag, format __VA_OPT__(,) __VA_ARGS__)
+
+#else
+
+// if cannot include esp_check then use custom check macro
+
+#define MB_RETURN_ON_FALSE(a, err_code, tag, format, ...) do {                                         \
+        if (!(a)) {                                                                              \
+            ESP_LOGE(tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_code;                                                                               \
+        }                                                                                                  \
+} while(0)
+
+#endif
+
 #define MB_CONTROLLER_STACK_SIZE            (CONFIG_FMB_CONTROLLER_STACK_SIZE)   // Stack size for Modbus controller
 #define MB_CONTROLLER_PRIORITY              (CONFIG_FMB_PORT_TASK_PRIO - 1)    // priority of MB controller task
 
diff --git a/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_master.h b/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_master.h
index 5d7539b08d9..8084e689027 100644
--- a/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_master.h
+++ b/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_master.h
@@ -25,6 +25,12 @@
 extern "C" {
 #endif
 
+#define MB_MASTER_CHECK(a, err_code, format, ...) MB_RETURN_ON_FALSE(a, err_code, TAG, format __VA_OPT__(,) __VA_ARGS__)
+
+#define MB_MASTER_ASSERT(con) do { \
+        if (!(con)) { ESP_LOGE(TAG, "assert errno:%d, errno_str: !(%s)", errno, strerror(errno)); assert(0 && #con); } \
+    } while (0)
+
 /*!
  * \brief Modbus descriptor table parameter type defines.
  */
diff --git a/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_slave.h b/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_slave.h
index fa6a53bc44e..040d18265bf 100644
--- a/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_slave.h
+++ b/tools/sdk/esp32c3/include/freemodbus/common/include/esp_modbus_slave.h
@@ -28,6 +28,12 @@
 extern "C" {
 #endif
 
+#define MB_SLAVE_CHECK(a, err_code, format, ...) MB_RETURN_ON_FALSE(a, err_code, TAG, format __VA_OPT__(,) __VA_ARGS__)
+
+#define MB_SLAVE_ASSERT(con) do { \
+        if (!(con)) { ESP_LOGE(TAG, "assert errno:%d, errno_str: !(%s)", errno, strerror(errno)); assert(0 && #con); } \
+    } while (0)
+
 /**
  * @brief Parameter access event information type
  */
diff --git a/tools/sdk/esp32c3/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h b/tools/sdk/esp32c3/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h
index aa87e1b4db2..6bb81894593 100644
--- a/tools/sdk/esp32c3/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h
+++ b/tools/sdk/esp32c3/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h
@@ -250,8 +250,12 @@
 #define INCLUDE_pcTaskGetTaskName                       1
 #define INCLUDE_xTaskGetIdleTaskHandle                  1
 #define INCLUDE_pxTaskGetStackStart                     1
-
+#define INCLUDE_eTaskGetState                           1
+#define INCLUDE_xTaskAbortDelay                         1
+#define INCLUDE_xTaskGetHandle                          1
 #define INCLUDE_xSemaphoreGetMutexHolder                1
+#define INCLUDE_xTimerPendFunctionCall                  1
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle          0   //Currently there is no need for this API
 
 /* The priority at which the tick interrupt runs.  This should probably be
    kept at 1. */
@@ -278,8 +282,6 @@ extern void vPortCleanUpTCB ( void *pxTCB );
 #define configTIMER_QUEUE_LENGTH                        CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
 #define configTIMER_TASK_STACK_DEPTH                    CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
 
-#define INCLUDE_xTimerPendFunctionCall                  1
-#define INCLUDE_eTaskGetState                           1
 #define configUSE_QUEUE_SETS                            1
 
 #define configUSE_TICKLESS_IDLE                         CONFIG_FREERTOS_USE_TICKLESS_IDLE
diff --git a/tools/sdk/esp32c3/include/freertos/include/freertos/projdefs.h b/tools/sdk/esp32c3/include/freertos/include/freertos/projdefs.h
index ec8022ca0b0..1949e6e30b3 100644
--- a/tools/sdk/esp32c3/include/freertos/include/freertos/projdefs.h
+++ b/tools/sdk/esp32c3/include/freertos/include/freertos/projdefs.h
@@ -41,7 +41,7 @@ typedef void (* TaskFunction_t)( void * );
 #endif
 #ifdef ESP_PLATFORM
 #ifndef pdTICKS_TO_MS
-    #define pdTICKS_TO_MS( xTicks )   ( ( uint32_t ) ( xTicks ) * 1000 / configTICK_RATE_HZ )
+    #define pdTICKS_TO_MS( xTicks )   ( ( TickType_t ) ( ( uint64_t ) ( xTicks ) * 1000 / configTICK_RATE_HZ ) )
 #endif
 #endif // ESP_PLATFORM
 
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/adc_hal.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/adc_hal.h
index 1425acf0e17..bf4794377ad 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/adc_hal.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/adc_hal.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /*******************************************************************************
  * NOTICE
@@ -34,18 +26,6 @@ extern "C" {
 /*---------------------------------------------------------------
                     Digital controller setting
 ---------------------------------------------------------------*/
-/**
- * Digital controller deinitialization.
- */
-void adc_hal_digi_deinit(void);
-
-/**
- * Setting the digital controller.
- *
- * @param cfg Pointer to digital controller paramter.
- */
-void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
-
 /**
  * Reset adc digital controller filter.
  *
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/adc_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/adc_ll.h
index 49ff4a23f43..38bdae9fe9b 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/adc_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/adc_ll.h
@@ -1,30 +1,22 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 
 #include <stdbool.h>
 #include <stdlib.h>
-#include "hal/misc.h"
 #include "regi2c_ctrl.h"
 #include "esp_attr.h"
 
 #include "soc/adc_periph.h"
-#include "hal/adc_types.h"
 #include "soc/apb_saradc_struct.h"
 #include "soc/apb_saradc_reg.h"
 #include "soc/rtc_cntl_struct.h"
 #include "soc/rtc_cntl_reg.h"
+#include "hal/misc.h"
+#include "hal/adc_types.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -54,6 +46,22 @@ typedef enum {
     ADC_RTC_DATA_FAIL = -1,
 } adc_ll_rtc_raw_data_t;
 
+typedef enum {
+    ADC_LL_CTRL_DIG = 0,    ///< For ADC1. Select DIG controller.
+    ADC_LL_CTRL_ARB = 1,    ///< For ADC2. The controller is selected by the arbiter.
+} adc_ll_controller_t;
+
+/**
+ * @brief ADC digital controller (DMA mode) work mode.
+ *
+ * @note  The conversion mode affects the sampling frequency:
+ *        ESP32C3 only support ALTER_UNIT mode
+ *        ALTER_UNIT   : When the measurement is triggered, ADC1 or ADC2 samples alternately.
+ */
+typedef enum {
+    ADC_LL_DIGI_CONV_ALTER_UNIT = 0,     // Use both ADC1 and ADC2 for conversion by turn. e.g. ADC1 -> ADC2 -> ADC1 -> ADC2 .....
+} adc_ll_digi_convert_mode_t;
+
 //These values should be set according to the HW
 typedef enum {
     ADC_LL_INTR_THRES1_LOW  = BIT(26),
@@ -65,21 +73,17 @@ typedef enum {
 } adc_ll_intr_t;
 FLAG_ATTR(adc_ll_intr_t)
 
-/**
- * @brief ADC controller type selection.
- *
- * @note For ADC2, use the force option with care. The system power consumption detection will use ADC2.
- *       If it is forced to switch to another controller, it may cause the system to obtain incorrect values.
- * @note Normally, there is no need to switch the controller manually.
- */
-typedef enum {
-    ADC_CTRL_RTC = 0,   /*!<For ADC1. Select RTC controller. For ADC2. The controller is selected by the arbiter. Arbiter in default mode. */
-    ADC_CTRL_DIG = 2,   /*!<For ADC1. Select DIG controller. For ADC2. The controller is selected by the arbiter. Arbiter in default mode. */
-    ADC2_CTRL_PWDET = 3,/*!<For ADC2. The controller is selected by the arbiter. Arbiter in default mode. */
-    ADC2_CTRL_FORCE_PWDET = 3,  /*!<For ADC2. Arbiter in shield mode. Force select Wi-Fi controller work. */
-    ADC2_CTRL_FORCE_RTC = 4,    /*!<For ADC2. Arbiter in shield mode. Force select RTC controller work. */
-    ADC2_CTRL_FORCE_DIG = 6,    /*!<For ADC2. Arbiter in shield mode. Force select digital controller work. */
-} adc_ll_controller_t;
+typedef struct  {
+    union {
+        struct {
+            uint8_t atten:      2;
+            uint8_t channel:    3;
+            uint8_t unit:       1;
+            uint8_t reserved:   2;
+        };
+        uint8_t val;
+    };
+} __attribute__((packed)) adc_ll_digi_pattern_table_t;
 
 /*---------------------------------------------------------------
                     Digital controller setting
@@ -157,6 +161,18 @@ static inline void adc_ll_digi_convert_limit_disable(void)
     APB_SARADC.ctrl2.meas_num_limit = 0;
 }
 
+/**
+ * Set adc conversion mode for digital controller.
+ *
+ * @note ESP32C3 only support ADC1 single mode.
+ *
+ * @param mode Conversion mode select.
+ */
+static inline void adc_ll_digi_set_convert_mode(adc_ll_digi_convert_mode_t mode)
+{
+    //ESP32C3 only supports ADC_CONV_ALTER_UNIT mode
+}
+
 /**
  * Set pattern table length for digital controller.
  * The pattern table that defines the conversion rules for each SAR ADC. Each table has 8 items, in which channel selection,
@@ -181,16 +197,18 @@ static inline void adc_ll_digi_set_pattern_table_len(adc_ll_num_t adc_n, uint32_
  * @param pattern_index Items index. Range: 0 ~ 7.
  * @param pattern Stored conversion rules.
  */
-static inline void adc_ll_digi_set_pattern_table(adc_ll_num_t adc_n, uint32_t pattern_index, adc_digi_pattern_table_t pattern)
+static inline void adc_ll_digi_set_pattern_table(adc_ll_num_t adc_n, uint32_t pattern_index, adc_digi_pattern_config_t table)
 {
     uint32_t tab;
     uint8_t index = pattern_index / 4;
     uint8_t offset = (pattern_index % 4) * 6;
+    adc_ll_digi_pattern_table_t pattern = {0};
 
-    tab = APB_SARADC.sar_patt_tab[index].sar_patt_tab1;  // Read old register value
-    tab &= (~(0xFC0000 >> offset));                      // Clear old data
-    tab |= ((uint32_t)(pattern.val & 0x3F) << 18) >> offset;       // Fill in the new data
-    APB_SARADC.sar_patt_tab[index].sar_patt_tab1 = tab;  // Write back
+    pattern.val = (table.atten & 0x3) | ((table.channel & 0x7) << 2) | ((table.unit & 0x1) << 5);
+    tab = APB_SARADC.sar_patt_tab[index].sar_patt_tab1;         // Read old register value
+    tab &= (~(0xFC0000 >> offset));                             // Clear old data
+    tab |= ((uint32_t)(pattern.val & 0x3F) << 18) >> offset;    // Fill in the new data
+    APB_SARADC.sar_patt_tab[index].sar_patt_tab1 = tab;         // Write back
 }
 
 /**
@@ -260,9 +278,9 @@ static inline void adc_ll_digi_trigger_disable(void)
 
 /**
  * Set ADC digital controller clock division factor. The clock divided from `APLL` or `APB` clock.
- * Expression: controller_clk = APLL/APB * (div_num  + div_b / div_a).
+ * Expression: controller_clk = (APLL or APB) / (div_num + div_a / div_b + 1).
  *
- * @param div_num Division factor. Range: 1 ~ 255.
+ * @param div_num Division factor. Range: 0 ~ 255.
  * @param div_b Division factor. Range: 1 ~ 63.
  * @param div_a Division factor. Range: 0 ~ 63.
  */
@@ -278,7 +296,7 @@ static inline void adc_ll_digi_controller_clk_div(uint32_t div_num, uint32_t div
  *
  * @param use_apll true: use APLL clock; false: use APB clock.
  */
-static inline void adc_ll_digi_controller_clk_enable(bool use_apll)
+static inline void adc_ll_digi_clk_sel(bool use_apll)
 {
     if (use_apll) {
         APB_SARADC.apb_adc_clkm_conf.clk_sel = 1;   // APLL clock
@@ -494,8 +512,8 @@ static inline adc_ll_rtc_raw_data_t adc_ll_analysis_raw_data(adc_ll_num_t adc_n,
  */
 static inline void adc_ll_set_power_manage(adc_ll_power_t manage)
 {
-    // /* Bit1  0:Fsm  1: SW mode
-    //    Bit0  0:SW mode power down  1: SW mode power on */
+    /* Bit1  0:Fsm  1: SW mode
+       Bit0  0:SW mode power down  1: SW mode power on */
     if (manage == ADC_POWER_SW_ON) {
         APB_SARADC.ctrl.sar_clk_gated = 1;
         APB_SARADC.ctrl.xpd_sar_force = 3;
@@ -503,30 +521,14 @@ static inline void adc_ll_set_power_manage(adc_ll_power_t manage)
         APB_SARADC.ctrl.sar_clk_gated = 1;
         APB_SARADC.ctrl.xpd_sar_force = 0;
     } else if (manage == ADC_POWER_SW_OFF) {
-        APB_SARADC.ctrl.xpd_sar_force = 2;
         APB_SARADC.ctrl.sar_clk_gated = 0;
+        APB_SARADC.ctrl.xpd_sar_force = 2;
     }
 }
 
-/**
- * Get ADC module power management.
- *
- * @return
- *      - ADC power status.
- */
-static inline adc_ll_power_t adc_ll_get_power_manage(void)
+static inline void adc_ll_set_controller(adc_ll_num_t adc_n, adc_ll_controller_t ctrl)
 {
-    /* Bit1  0:Fsm  1: SW mode
-       Bit0  0:SW mode power down  1: SW mode power on */
-    adc_ll_power_t manage;
-    if (APB_SARADC.ctrl.xpd_sar_force == 3) {
-        manage = ADC_POWER_SW_ON;
-    } else if (APB_SARADC.ctrl.xpd_sar_force == 2) {
-        manage = ADC_POWER_SW_OFF;
-    } else {
-        manage = ADC_POWER_BY_FSM;
-    }
-    return manage;
+    //Not used on ESP32C3
 }
 
 /**
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/cpu_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/cpu_ll.h
index fe0f11d4346..bce67579112 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/cpu_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/cpu_ll.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 
 #include <stdint.h>
@@ -151,6 +143,34 @@ static inline void cpu_ll_break(void)
     return;
 }
 
+static inline int cpu_ll_syscall(int sys_nr, int arg1, int arg2, int arg3, int arg4, int* ret_errno)
+{
+    int host_ret, host_errno;
+
+    asm volatile ( \
+        ".option push\n" \
+        ".option norvc\n" \
+        "mv a0, %[sys_nr]\n" \
+        "mv a1, %[arg1]\n" \
+        "mv a2, %[arg2]\n" \
+        "mv a3, %[arg3]\n" \
+        "mv a4, %[arg4]\n" \
+        "slli    zero,zero,0x1f\n" \
+        "ebreak\n" \
+        "srai    zero,zero,0x7\n" \
+        "mv %[host_ret], a0\n" \
+        "mv %[host_errno], a1\n" \
+        ".option pop\n" \
+        :[host_ret]"=r"(host_ret),[host_errno]"=r"(host_errno)
+        :[sys_nr]"r"(sys_nr),[arg1]"r"(arg1),[arg2]"r"(arg2),[arg3]"r"(arg3),[arg4]"r"(arg4)
+        :"a0","a1","a2","a3","a4");
+
+    if (ret_errno) {
+        *ret_errno = host_errno;
+    }
+    return host_ret;
+}
+
 static inline void cpu_ll_set_vecbase(const void* vecbase)
 {
     uintptr_t vecbase_int = (uintptr_t)vecbase;
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gdma_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gdma_ll.h
index 6ce2f89f66c..fb7a8713be2 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gdma_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gdma_ll.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 
 #include <stdint.h>
@@ -67,6 +59,7 @@ static inline void gdma_ll_enable_clock(gdma_dev_t *dev, bool enable)
 /**
  * @brief Get DMA RX channel interrupt status word
  */
+__attribute__((always_inline))
 static inline uint32_t gdma_ll_rx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
 {
     return dev->intr[channel].st.val & GDMA_LL_RX_EVENT_MASK;
@@ -87,6 +80,7 @@ static inline void gdma_ll_rx_enable_interrupt(gdma_dev_t *dev, uint32_t channel
 /**
  * @brief Clear DMA RX channel interrupt
  */
+__attribute__((always_inline))
 static inline void gdma_ll_rx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
 {
     dev->intr[channel].clr.val = (mask & GDMA_LL_RX_EVENT_MASK);
@@ -127,6 +121,7 @@ static inline void gdma_ll_rx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t
 /**
  * @brief Reset DMA RX channel FSM and FIFO pointer
  */
+__attribute__((always_inline))
 static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel)
 {
     dev->channel[channel].in.in_conf0.in_rst = 1;
@@ -172,6 +167,7 @@ static inline uint32_t gdma_ll_rx_pop_data(gdma_dev_t *dev, uint32_t channel)
 /**
  * @brief Set the descriptor link base address for RX channel
  */
+__attribute__((always_inline))
 static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
 {
     dev->channel[channel].in.in_link.addr = addr;
@@ -180,6 +176,7 @@ static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u
 /**
  * @brief Start dealing with RX descriptors
  */
+__attribute__((always_inline))
 static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
 {
     dev->channel[channel].in.in_link.start = 1;
@@ -188,6 +185,7 @@ static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
 /**
  * @brief Stop dealing with RX descriptors
  */
+__attribute__((always_inline))
 static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
 {
     dev->channel[channel].in.in_link.stop = 1;
@@ -196,6 +194,7 @@ static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
 /**
  * @brief Restart a new inlink right after the last descriptor
  */
+__attribute__((always_inline))
 static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel)
 {
     dev->channel[channel].in.in_link.restart = 1;
@@ -220,6 +219,7 @@ static inline bool gdma_ll_rx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
 /**
  * @brief Get RX success EOF descriptor's address
  */
+__attribute__((always_inline))
 static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
 {
     return dev->channel[channel].in.in_suc_eof_des_addr;
@@ -228,6 +228,7 @@ static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uin
 /**
  * @brief Get RX error EOF descriptor's address
  */
+__attribute__((always_inline))
 static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
 {
     return dev->channel[channel].in.in_err_eof_des_addr;
@@ -236,6 +237,7 @@ static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint3
 /**
  * @brief Get current RX descriptor's address
  */
+__attribute__((always_inline))
 static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
 {
     return dev->channel[channel].in.in_dscr;
@@ -261,6 +263,7 @@ static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channe
 /**
  * @brief Get DMA TX channel interrupt status word
  */
+__attribute__((always_inline))
 static inline uint32_t gdma_ll_tx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
 {
     return dev->intr[channel].st.val & GDMA_LL_TX_EVENT_MASK;
@@ -281,6 +284,7 @@ static inline void gdma_ll_tx_enable_interrupt(gdma_dev_t *dev, uint32_t channel
 /**
  * @brief Clear DMA TX channel interrupt
  */
+__attribute__((always_inline))
 static inline void gdma_ll_tx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
 {
     dev->intr[channel].clr.val = (mask & GDMA_LL_TX_EVENT_MASK);
@@ -337,6 +341,7 @@ static inline void gdma_ll_tx_enable_auto_write_back(gdma_dev_t *dev, uint32_t c
 /**
  * @brief Reset DMA TX channel FSM and FIFO pointer
  */
+__attribute__((always_inline))
 static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel)
 {
     dev->channel[channel].out.out_conf0.out_rst = 1;
@@ -382,6 +387,7 @@ static inline void gdma_ll_tx_push_data(gdma_dev_t *dev, uint32_t channel, uint3
 /**
  * @brief Set the descriptor link base address for TX channel
  */
+__attribute__((always_inline))
 static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
 {
     dev->channel[channel].out.out_link.addr = addr;
@@ -390,6 +396,7 @@ static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u
 /**
  * @brief Start dealing with TX descriptors
  */
+__attribute__((always_inline))
 static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
 {
     dev->channel[channel].out.out_link.start = 1;
@@ -398,6 +405,7 @@ static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
 /**
  * @brief Stop dealing with TX descriptors
  */
+__attribute__((always_inline))
 static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
 {
     dev->channel[channel].out.out_link.stop = 1;
@@ -406,6 +414,7 @@ static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
 /**
  * @brief Restart a new outlink right after the last descriptor
  */
+__attribute__((always_inline))
 static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel)
 {
     dev->channel[channel].out.out_link.restart = 1;
@@ -422,6 +431,7 @@ static inline bool gdma_ll_tx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
 /**
  * @brief Get TX EOF descriptor's address
  */
+__attribute__((always_inline))
 static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
 {
     return dev->channel[channel].out.out_eof_des_addr;
@@ -430,6 +440,7 @@ static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t ch
 /**
  * @brief Get current TX descriptor's address
  */
+__attribute__((always_inline))
 static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
 {
     return dev->channel[channel].out.out_dscr;
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gpio_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gpio_ll.h
index 59639ef150b..91343f84776 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gpio_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gpio_ll.h
@@ -18,6 +18,7 @@
 #include "soc/gpio_periph.h"
 #include "soc/gpio_struct.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/usb_serial_jtag_reg.h"
 #include "hal/gpio_types.h"
 #include "stdlib.h"
 
@@ -25,17 +26,6 @@
 extern "C" {
 #endif
 
-/*
- * The following defines are used to disable USB JTAG when pins 18 and pins 19
- * are set to be used as GPIO.
- * See gpio_pad_select_gpio() below.
- *
- * TODO: Delete these definitions once the USB device registers definition is
- * merged.
- */
-#define USB_DEVICE_CONF0_REG        (0x60043018)
-#define USB_DEVICE_USB_PAD_ENABLE   (BIT(14))
-
 // Get GPIO hardware instance with giving gpio num
 #define GPIO_LL_GET_HW(num) (((num) == 0) ? (&GPIO) : NULL)
 
@@ -390,10 +380,11 @@ static inline void gpio_ll_iomux_in(gpio_dev_t *hw, uint32_t gpio, uint32_t sign
  * @param  pin_name Pin name to configure
  * @param  func Function to assign to the pin
  */
-static inline void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
+static inline __attribute__((always_inline)) void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
 {
+    // Disable USB Serial JTAG if pins 18 or pins 19 needs to select an IOMUX function
     if (pin_name == IO_MUX_GPIO18_REG || pin_name == IO_MUX_GPIO19_REG) {
-        CLEAR_PERI_REG_MASK(USB_DEVICE_CONF0_REG, USB_DEVICE_USB_PAD_ENABLE);
+        CLEAR_PERI_REG_MASK(USB_SERIAL_JTAG_CONF0_REG, USB_SERIAL_JTAG_USB_PAD_ENABLE);
     }
     PIN_FUNC_SELECT(pin_name, func);
 }
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/memprot_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/memprot_ll.h
index ef3f15f952a..4bfd38bae28 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/memprot_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/memprot_ll.h
@@ -1,59 +1,22 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
-#include "soc/sensitive_reg.h"
 #include "soc/cache_memory.h"
-#include "hal/assert.h"
+#include "soc/memprot_defs.h"
+#include "hal/memprot_types.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 /* ******************************************************************************************************
- * *** GLOBALS ***
- * NOTE: in this version, all the configurations apply only to WORLD_0
- */
-
-#define IRAM_SRAM_START             0x4037C000
-#define DRAM_SRAM_START             0x3FC7C000
-
-/* ICache size is fixed to 16KB on ESP32-C3 */
-#ifndef ICACHE_SIZE
-#define ICACHE_SIZE                 0x4000
-#endif
-
-#ifndef I_D_SRAM_SEGMENT_SIZE
-#define I_D_SRAM_SEGMENT_SIZE       0x20000
-#endif
-
-#define I_D_SPLIT_LINE_SHIFT        0x9
-#define I_D_FAULT_ADDR_SHIFT        0x2
-
-typedef union {
-    struct {
-        uint32_t cat0       : 2;
-        uint32_t cat1       : 2;
-        uint32_t cat2       : 2;
-        uint32_t res0       : 8;
-        uint32_t splitaddr  : 8;
-        uint32_t res1       : 10;
-    };
-    uint32_t val;
-} constrain_reg_fields_t;
-
+ * *** COMMON ***
+ * ******************************************************************************************************/
 static inline void memprot_ll_set_iram0_dram0_split_line_lock(void)
 {
     REG_WRITE(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0_REG, 1);
@@ -64,7 +27,7 @@ static inline bool memprot_ll_get_iram0_dram0_split_line_lock(void)
     return REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0_REG) == 1;
 }
 
-static inline void* memprot_ll_get_split_addr_from_reg(uint32_t regval, uint32_t base)
+static inline void *memprot_ll_get_split_addr_from_reg(uint32_t regval, uint32_t base)
 {
     constrain_reg_fields_t reg_val;
     reg_val.val = regval;
@@ -85,43 +48,30 @@ static inline void* memprot_ll_get_split_addr_from_reg(uint32_t regval, uint32_t
 
 /* ******************************************************************************************************
  * *** IRAM0 ***
- */
-
-//16kB (CACHE)
-#define IRAM0_SRAM_LEVEL_0_LOW      IRAM_SRAM_START //0x40370000
-#define IRAM0_SRAM_LEVEL_0_HIGH     (IRAM0_SRAM_LEVEL_0_LOW + ICACHE_SIZE - 0x1) //0x4037FFFF
-
-//128kB (LEVEL 1)
-#define IRAM0_SRAM_LEVEL_1_LOW      (IRAM0_SRAM_LEVEL_0_HIGH + 0x1) //0x40380000
-#define IRAM0_SRAM_LEVEL_1_HIGH     (IRAM0_SRAM_LEVEL_1_LOW + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x4039FFFF
-
-//128kB (LEVEL 2)
-#define IRAM0_SRAM_LEVEL_2_LOW      (IRAM0_SRAM_LEVEL_1_HIGH + 0x1) //0x403A0000
-#define IRAM0_SRAM_LEVEL_2_HIGH     (IRAM0_SRAM_LEVEL_2_LOW + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x403BFFFF
-
-//128kB (LEVEL 3)
-#define IRAM0_SRAM_LEVEL_3_LOW      (IRAM0_SRAM_LEVEL_2_HIGH + 0x1) //0x403C0000
-#define IRAM0_SRAM_LEVEL_3_HIGH     (IRAM0_SRAM_LEVEL_3_LOW + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x403DFFFF
-
-//permission bits
-#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_R  0x1
-#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_W  0x2
-#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_F  0x4
-
+ * ******************************************************************************************************/
 static inline uint32_t memprot_ll_iram0_get_intr_source_num(void)
 {
     return ETS_CORE0_IRAM0_PMS_INTR_SOURCE;
 }
 
-
-///////////////////////////////////
-// IRAM0 - SPLIT LINES
-///////////////////////////////////
-
-static inline void memprot_ll_set_iram0_split_line(const void *line_addr, uint32_t sensitive_reg)
+/* ********************************
+ * IRAM0 - SPLIT LINES
+ *
+ * NOTES:
+ * 1. IRAM0/DRAM0 split-lines must be aligned to 512B boundaries (PMS module restriction)
+ * 2. split address must fall into appropriate IRAM0/DRAM0 region
+ */
+static inline memprot_ll_err_t memprot_ll_set_iram0_split_line(const void *line_addr, uint32_t sensitive_reg)
 {
     uint32_t addr = (uint32_t)line_addr;
-    HAL_ASSERT(addr >= IRAM0_SRAM_LEVEL_1_LOW && addr <= IRAM0_SRAM_LEVEL_3_HIGH);
+
+    if (addr < IRAM0_SRAM_LEVEL_1_LOW || addr > IRAM0_SRAM_LEVEL_3_HIGH) {
+        return MEMP_LL_ERR_SPLIT_ADDR_OUT_OF_RANGE;
+    }
+
+    if (addr % 0x200 != 0) {
+        return MEMP_LL_ERR_SPLIT_ADDR_UNALIGNED;
+    }
 
     uint32_t category[3] = {0};
     if (addr <= IRAM0_SRAM_LEVEL_1_HIGH) {
@@ -141,47 +91,61 @@ static inline void memprot_ll_set_iram0_split_line(const void *line_addr, uint32
         (category[2] << SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_2_S);
 
     uint32_t conf_addr = ((addr >> I_D_SPLIT_LINE_SHIFT) & SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR_V) << SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR_S;
-
     uint32_t reg_cfg = conf_addr | category_bits;
 
     REG_WRITE(sensitive_reg, reg_cfg);
+
+    return MEMP_LL_OK;
 }
 
 /* can be both IRAM0/DRAM0 address */
-static inline void memprot_ll_set_iram0_split_line_main_I_D(const void *line_addr)
+static inline memprot_ll_err_t memprot_ll_set_iram0_split_line_main_I_D(const void *line_addr)
 {
-    memprot_ll_set_iram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_1_REG);
+    return memprot_ll_set_iram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_1_REG);
 }
 
-static inline void memprot_ll_set_iram0_split_line_I_0(const void *line_addr)
+static inline memprot_ll_err_t memprot_ll_set_iram0_split_line_I_0(const void *line_addr)
 {
-    memprot_ll_set_iram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_2_REG);
+    return memprot_ll_set_iram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_2_REG);
 }
 
-static inline void memprot_ll_set_iram0_split_line_I_1(const void *line_addr)
+static inline memprot_ll_err_t memprot_ll_set_iram0_split_line_I_1(const void *line_addr)
 {
-    memprot_ll_set_iram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_3_REG);
+    return memprot_ll_set_iram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_3_REG);
 }
 
-static inline void* memprot_ll_get_iram0_split_line_main_I_D(void)
+static inline uint32_t memprot_ll_get_iram0_split_line_main_I_D_cat(void)
+{
+    return REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_1_REG) & 0x3F;
+}
+
+static inline uint32_t memprot_ll_get_iram0_split_line_I_0_cat(void)
+{
+    return REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_2_REG) & 0x3F;
+}
+
+static inline uint32_t memprot_ll_get_iram0_split_line_I_1_cat(void)
+{
+    return REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_3_REG) & 0x3F;
+}
+
+static inline void *memprot_ll_get_iram0_split_line_main_I_D(void)
 {
     return memprot_ll_get_split_addr_from_reg(REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_1_REG), SOC_DIRAM_IRAM_LOW);
 }
 
-static inline void* memprot_ll_get_iram0_split_line_I_0(void)
+static inline void *memprot_ll_get_iram0_split_line_I_0(void)
 {
     return memprot_ll_get_split_addr_from_reg(REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_2_REG), SOC_DIRAM_IRAM_LOW);
 }
 
-static inline void* memprot_ll_get_iram0_split_line_I_1(void)
+static inline void *memprot_ll_get_iram0_split_line_I_1(void)
 {
     return memprot_ll_get_split_addr_from_reg(REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_3_REG), SOC_DIRAM_IRAM_LOW);
 }
 
-
 ///////////////////////////////////
 // IRAM0 - PMS CONFIGURATION
-///////////////////////////////////
 
 // lock
 static inline void memprot_ll_iram0_set_pms_lock(void)
@@ -198,14 +162,14 @@ static inline bool memprot_ll_iram0_get_pms_lock(void)
 static inline uint32_t memprot_ll_iram0_set_permissions(bool r, bool w, bool x)
 {
     uint32_t permissions = 0;
-    if ( r ) {
-        permissions |= SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_R;
+    if (r) {
+        permissions |= SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_R;
     }
-    if ( w ) {
-        permissions |= SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_W;
+    if (w) {
+        permissions |= SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_W;
     }
-    if ( x ) {
-        permissions |= SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_F;
+    if (x) {
+        permissions |= SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_F;
     }
 
     return permissions;
@@ -233,39 +197,38 @@ static inline void memprot_ll_iram0_set_pms_area_3(bool r, bool w, bool x)
 
 static inline void memprot_ll_iram0_get_permissions(uint32_t perms, bool *r, bool *w, bool *x)
 {
-    *r = perms & SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_R;
-    *w = perms & SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_W;
-    *x = perms & SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_F;
+    *r = perms & SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_R;
+    *w = perms & SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_W;
+    *x = perms & SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_F;
 }
 
 static inline void memprot_ll_iram0_get_pms_area_0(bool *r, bool *w, bool *x)
 {
     uint32_t permissions = REG_GET_FIELD(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_2_REG, SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0);
-    memprot_ll_iram0_get_permissions( permissions, r, w, x);
+    memprot_ll_iram0_get_permissions(permissions, r, w, x);
 }
 
 static inline void memprot_ll_iram0_get_pms_area_1(bool *r, bool *w, bool *x)
 {
     uint32_t permissions = REG_GET_FIELD(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_2_REG, SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1);
-    memprot_ll_iram0_get_permissions( permissions, r, w, x);
+    memprot_ll_iram0_get_permissions(permissions, r, w, x);
 }
 
 static inline void memprot_ll_iram0_get_pms_area_2(bool *r, bool *w, bool *x)
 {
     uint32_t permissions = REG_GET_FIELD(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_2_REG, SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2);
-    memprot_ll_iram0_get_permissions( permissions, r, w, x);
+    memprot_ll_iram0_get_permissions(permissions, r, w, x);
 }
 
 static inline void memprot_ll_iram0_get_pms_area_3(bool *r, bool *w, bool *x)
 {
     uint32_t permissions = REG_GET_FIELD(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_2_REG, SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3);
-    memprot_ll_iram0_get_permissions( permissions, r, w, x);
+    memprot_ll_iram0_get_permissions(permissions, r, w, x);
 }
 
 
 ///////////////////////////////////
 // IRAM0 - MONITOR
-///////////////////////////////////
 
 // lock
 static inline void memprot_ll_iram0_set_monitor_lock(void)
@@ -281,26 +244,31 @@ static inline bool memprot_ll_iram0_get_monitor_lock(void)
 // interrupt enable/clear
 static inline void memprot_ll_iram0_set_monitor_en(bool enable)
 {
-    if ( enable ) {
-        REG_SET_BIT( SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_EN );
+    if (enable) {
+        REG_SET_BIT(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_EN);
     } else {
-        REG_CLR_BIT( SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_EN );
+        REG_CLR_BIT(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_EN);
     }
 }
 
+static inline bool memprot_ll_iram0_get_monitor_intrclr(void)
+{
+    return REG_GET_BIT(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_CLR) > 0;
+}
+
 static inline bool memprot_ll_iram0_get_monitor_en(void)
 {
-    return REG_GET_FIELD( SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_EN ) == 1;
+    return REG_GET_FIELD(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_EN) == 1;
 }
 
-static inline void memprot_ll_iram0_clear_monitor_intr(void)
+static inline void memprot_ll_iram0_set_monitor_intrclr(void)
 {
-    REG_SET_BIT( SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_CLR );
+    REG_SET_BIT(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_CLR);
 }
 
-static inline void memprot_ll_iram0_reset_clear_monitor_intr(void)
+static inline void memprot_ll_iram0_reset_monitor_intrclr(void)
 {
-    REG_CLR_BIT( SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_CLR );
+    REG_CLR_BIT(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_CLR);
 }
 
 static inline uint32_t memprot_ll_iram0_get_monitor_enable_register(void)
@@ -308,31 +276,31 @@ static inline uint32_t memprot_ll_iram0_get_monitor_enable_register(void)
     return REG_READ(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG);
 }
 
-// // permission violation status
+// permission violation status
 static inline uint32_t memprot_ll_iram0_get_monitor_status_intr(void)
 {
-    return REG_GET_FIELD( SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR );
+    return REG_GET_FIELD(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR);
 }
 
 static inline uint32_t memprot_ll_iram0_get_monitor_status_fault_wr(void)
 {
-    return REG_GET_FIELD( SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR );
+    return REG_GET_FIELD(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR);
 }
 
 static inline uint32_t memprot_ll_iram0_get_monitor_status_fault_loadstore(void)
 {
-    return REG_GET_FIELD( SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE );
+    return REG_GET_FIELD(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE);
 }
 
 static inline uint32_t memprot_ll_iram0_get_monitor_status_fault_world(void)
 {
-    return REG_GET_FIELD( SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD );
+    return REG_GET_FIELD(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD);
 }
 
-static inline uint32_t memprot_ll_iram0_get_monitor_status_fault_addr(void)
+static inline intptr_t memprot_ll_iram0_get_monitor_status_fault_addr(void)
 {
-    uint32_t addr = REG_GET_FIELD( SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR );
-    return addr > 0 ? (addr << I_D_FAULT_ADDR_SHIFT) + IRAM0_ADDRESS_LOW : 0;
+    uint32_t addr = REG_GET_FIELD(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR);
+    return (intptr_t)(addr > 0 ? (addr << I_D_FAULT_ADDR_SHIFT) + IRAM0_ADDRESS_LOW : 0);
 }
 
 static inline uint32_t memprot_ll_iram0_get_monitor_status_register(void)
@@ -342,43 +310,309 @@ static inline uint32_t memprot_ll_iram0_get_monitor_status_register(void)
 
 
 /* ******************************************************************************************************
- * *** DRAM0 ***
+ * *** RTC_FAST ***
  */
 
-//cache not available from DRAM (!)
-#define DRAM0_SRAM_LEVEL_0_LOW      DRAM_SRAM_START //0x3FC7C000
-#define DRAM0_SRAM_LEVEL_0_HIGH     (DRAM0_SRAM_LEVEL_0_LOW + ICACHE_SIZE - 0x1) //0x3FC7FFFF
+static inline uint32_t memprot_ll_rtcfast_get_intr_source_num(void)
+{
+    return ETS_CORE0_PIF_PMS_INTR_SOURCE;
+}
+
+//shared PIF PMS lock
+//!!!: use after ALL the constraints have been set
+static inline void memprot_ll_set_pif_constraint_lock(void)
+{
+    REG_WRITE(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_0_REG, 1);
+}
+
+static inline bool memprot_ll_get_pif_constraint_lock(void)
+{
+    return REG_READ(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_0_REG) == 1;
+}
+
+static inline uint32_t memprot_ll_rtcfast_get_splitaddr_register(void)
+{
+    return REG_READ(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_9_REG);
+}
+
+/* ********************************
+ * IRAM0 RTCFAST - SPLIT LINES
+ *
+ * NOTES:
+ * 1. there is only 1 split line for RTCFAST/WORLD
+ * 2. RTCFAST split-line must be aligned to 4B boundaries (PMS stores 11 bits of 13-bit offset in 8kB RTCFAST region)
+ * 3. RTCFAST has weird section structure (text -> dummy (!) -> force -> data) - .dummy section seems to have wrong mapping (it doesn't fall inline with .rtctext)
+ */
+static inline memprot_ll_err_t memprot_ll_set_rtcfast_split_line(const void *line_addr, memprot_ll_world_t world)
+{
+    uint32_t addr = (uint32_t)line_addr;
+    uint32_t mask;
+
+    if (addr < SOC_RTC_IRAM_LOW || addr >= SOC_RTC_IRAM_HIGH) {
+        return MEMP_LL_ERR_SPLIT_ADDR_OUT_OF_RANGE;
+    }
+
+    if (addr % 0x4 != 0) {
+        return MEMP_LL_ERR_SPLIT_ADDR_UNALIGNED;
+    }
+
+    switch (world) {
+    case MEMP_LL_WORLD_0:
+        mask = SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_M;
+        break;
+    case MEMP_LL_WORLD_1:
+        mask = SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_M;
+        break;
+    default:
+        return MEMP_LL_ERR_WORLD_INVALID;
+    }
+
+    //offset bits to store are the same width for both worlds -> using SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_V
+    CLEAR_PERI_REG_MASK(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_9_REG, mask);
+    REG_SET_BITS(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_9_REG, mask, (addr >> 2) & SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_V);
+
+    return MEMP_LL_OK;
+}
+
+static inline memprot_ll_err_t memprot_ll_get_rtcfast_split_line(memprot_ll_world_t world, void **line_addr)
+{
+    uint32_t reg_addr = REG_READ(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_9_REG);
+    uint32_t mask = 0;
+    uint32_t shift = 0;
+
+    switch (world) {
+    case MEMP_LL_WORLD_0:
+        mask = SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_M;
+        shift = SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_S;
+        break;
+    case MEMP_LL_WORLD_1:
+        mask = SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_M;
+        shift = SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_S;
+        break;
+    default:
+        return MEMP_LL_ERR_WORLD_INVALID;
+    }
+
+    *line_addr = (void *)((((reg_addr & mask) >> shift) << 2) + SOC_RTC_IRAM_LOW);
+
+    return MEMP_LL_OK;
+}
+
+///////////////////////////////////
+// RTC_FAST - PMS CONFIGURATION
+
+// permission settings
+static inline uint32_t memprot_ll_rtcfast_set_permissions(bool r, bool w, bool x)
+{
+    uint32_t permissions = 0;
+    if (r) {
+        permissions |= SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_X_R;
+    }
+    if (w) {
+        permissions |= SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_X_W;
+    }
+    if (x) {
+        permissions |= SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_X_F;
+    }
+
+    return permissions;
+}
+
+static inline memprot_ll_err_t memprot_ll_rtcfast_set_pms_area(bool r, bool w, bool x, memprot_ll_world_t world, memprot_ll_area_t area)
+{
+    uint32_t bits = 0;
+    uint32_t mask = 0;
+
+    switch (world) {
+    case MEMP_LL_WORLD_0: {
+        switch (area) {
+        case MEMP_LL_AREA_LOW:
+            bits = memprot_ll_rtcfast_set_permissions(r, w, x) << SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_S;
+            mask = SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_M;
+            break;
+        case MEMP_LL_AREA_HIGH:
+            bits = memprot_ll_rtcfast_set_permissions(r, w, x) << SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_S;
+            mask = SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_M;
+            break;
+        default:
+            return MEMP_LL_ERR_AREA_INVALID;
+        }
+    } break;
+    case MEMP_LL_WORLD_1: {
+        switch (area) {
+        case MEMP_LL_AREA_LOW:
+            bits = memprot_ll_rtcfast_set_permissions(r, w, x) << SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_S;
+            mask = SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_M;
+            break;
+        case MEMP_LL_AREA_HIGH:
+            bits = memprot_ll_rtcfast_set_permissions(r, w, x) << SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_S;
+            mask = SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_M;
+            break;
+        default:
+            return MEMP_LL_ERR_AREA_INVALID;
+        }
+    } break;
+    default:
+        return MEMP_LL_ERR_WORLD_INVALID;
+    }
+
+    CLEAR_PERI_REG_MASK(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_10_REG, mask);
+    REG_SET_BITS(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_10_REG, bits, mask);
+
+    return MEMP_LL_OK;
+}
+
+static inline void memprot_ll_rtcfast_get_permissions(uint32_t perms, bool *r, bool *w, bool *x)
+{
+    *r = perms & SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_X_R;
+    *w = perms & SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_X_W;
+    *x = perms & SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_X_F;
+}
+
+static inline memprot_ll_err_t memprot_ll_rtcfast_get_pms_area(bool *r, bool *w, bool *x, memprot_ll_world_t world, memprot_ll_area_t area)
+{
+    uint32_t permissions = 0;
+
+    switch (world) {
+    case MEMP_LL_WORLD_0: {
+        switch (area) {
+        case MEMP_LL_AREA_LOW:
+            permissions = REG_GET_FIELD(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_10_REG, SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L);
+            break;
+        case MEMP_LL_AREA_HIGH:
+            permissions = REG_GET_FIELD(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_10_REG, SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H);
+            break;
+        default:
+            return MEMP_LL_ERR_AREA_INVALID;
+        }
+    } break;
+    case MEMP_LL_WORLD_1: {
+        switch (area) {
+        case MEMP_LL_AREA_LOW:
+            permissions = REG_GET_FIELD(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_10_REG, SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L);
+            break;
+        case MEMP_LL_AREA_HIGH:
+            permissions = REG_GET_FIELD(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_10_REG, SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H);
+            break;
+        default:
+            return MEMP_LL_ERR_AREA_INVALID;
+        }
+    } break;
+    default:
+        return MEMP_LL_ERR_WORLD_INVALID;
+    }
+
+    memprot_ll_rtcfast_get_permissions(permissions, r, w, x);
+
+    return MEMP_LL_OK;
+}
+
+static inline uint32_t memprot_ll_rtcfast_get_permission_register(void)
+{
+    return REG_READ(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_10_REG);
+}
+
+///////////////////////////////////
+// RTC_FAST - MONITOR
+
+// lock
+static inline void memprot_ll_rtcfast_set_monitor_lock(void)
+{
+    REG_WRITE(SENSITIVE_CORE_0_PIF_PMS_MONITOR_0_REG, 1);
+}
+
+static inline bool memprot_ll_rtcfast_get_monitor_lock(void)
+{
+    return REG_READ(SENSITIVE_CORE_0_PIF_PMS_MONITOR_0_REG) == 1;
+}
+
+// interrupt enable/clear
+static inline void memprot_ll_rtcfast_set_monitor_en(bool enable)
+{
+    if (enable) {
+        REG_SET_BIT(SENSITIVE_CORE_0_PIF_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_EN);
+    } else {
+        REG_CLR_BIT(SENSITIVE_CORE_0_PIF_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_EN);
+    }
+}
+
+static inline bool memprot_ll_rtcfast_get_monitor_en(void)
+{
+    return REG_GET_FIELD(SENSITIVE_CORE_0_PIF_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_EN) > 0;
+}
+
+static inline bool memprot_ll_rtcfast_get_monitor_intrclr(void)
+{
+    return REG_GET_BIT(SENSITIVE_CORE_0_PIF_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_CLR) > 0;
+}
+
+static inline void memprot_ll_rtcfast_set_monitor_intrclr(void)
+{
+    REG_SET_BIT(SENSITIVE_CORE_0_PIF_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_CLR);
+}
 
-//128kB
-#define DRAM0_SRAM_LEVEL_1_LOW      (DRAM0_SRAM_LEVEL_0_HIGH + 0x1) //0x3FC80000
-#define DRAM0_SRAM_LEVEL_1_HIGH     (DRAM0_SRAM_LEVEL_1_LOW + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x3FC9FFFF
+static inline void memprot_ll_rtcfast_reset_monitor_intrclr(void)
+{
+    REG_CLR_BIT(SENSITIVE_CORE_0_PIF_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_CLR);
+}
 
-//128kB
-#define DRAM0_SRAM_LEVEL_2_LOW      (DRAM0_SRAM_LEVEL_1_HIGH + 0x1) //0x3FCA0000
-#define DRAM0_SRAM_LEVEL_2_HIGH     (DRAM0_SRAM_LEVEL_2_LOW + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x3FCBFFFF
+static inline uint32_t memprot_ll_rtcfast_get_monitor_register(void)
+{
+    return REG_READ(SENSITIVE_CORE_0_PIF_PMS_MONITOR_1_REG);
+}
+
+// permission violation status
+static inline uint32_t memprot_ll_rtcfast_get_monitor_status_intr(void)
+{
+    return REG_GET_FIELD(SENSITIVE_CORE_0_PIF_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR);
+}
+
+static inline intptr_t memprot_ll_rtcfast_get_monitor_status_fault_addr(void)
+{
+    //full address SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR
+    return (intptr_t)REG_READ(SENSITIVE_CORE_0_PIF_PMS_MONITOR_3_REG);
+}
+
+static inline uint32_t memprot_ll_rtcfast_get_monitor_status_fault_world(void)
+{
+    return REG_GET_FIELD(SENSITIVE_CORE_0_PIF_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD);
+}
+
+static inline uint32_t memprot_ll_rtcfast_get_monitor_status_fault_loadstore(void)
+{
+    return REG_GET_FIELD(SENSITIVE_CORE_0_PIF_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0);
+}
 
-//128kB
-#define DRAM0_SRAM_LEVEL_3_LOW      (DRAM0_SRAM_LEVEL_2_HIGH + 0x1) //0x3FCC0000
-#define DRAM0_SRAM_LEVEL_3_HIGH     (DRAM0_SRAM_LEVEL_3_LOW  + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x3FCDFFFF
+static inline uint32_t memprot_ll_rtcfast_get_monitor_status_fault_wr(void)
+{
+    return REG_GET_FIELD(SENSITIVE_CORE_0_PIF_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE);
+}
 
-#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_W  0x2
-#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_R  0x1
 
+/* ******************************************************************************************************
+ * *** DRAM0 ***
+ * ******************************************************************************************************/
 
 static inline uint32_t memprot_ll_dram0_get_intr_source_num(void)
 {
     return ETS_CORE0_DRAM0_PMS_INTR_SOURCE;
 }
 
-
 ///////////////////////////////////
 // DRAM0 - SPLIT LINES
-///////////////////////////////////
 
-static inline void memprot_ll_set_dram0_split_line(const void *line_addr, uint32_t sensitive_reg)
+static inline memprot_ll_err_t memprot_ll_set_dram0_split_line(const void *line_addr, uint32_t sensitive_reg)
 {
     uint32_t addr = (uint32_t)line_addr;
-    HAL_ASSERT(addr >= DRAM0_SRAM_LEVEL_1_LOW && addr <= DRAM0_SRAM_LEVEL_3_HIGH);
+
+    //sanity check: split address required above unified mgmt region & 32bit aligned
+    if (addr < DRAM0_SRAM_LEVEL_1_LOW || addr > DRAM0_SRAM_LEVEL_3_HIGH) {
+        return MEMP_LL_ERR_SPLIT_ADDR_OUT_OF_RANGE;
+    }
+    //split-line must be divisible by 512 (PMS module restriction)
+    if (addr % 0x200 != 0) {
+        return MEMP_LL_ERR_SPLIT_ADDR_UNALIGNED;
+    }
 
     uint32_t category[3] = {0};
     if (addr <= DRAM0_SRAM_LEVEL_1_HIGH) {
@@ -398,36 +632,45 @@ static inline void memprot_ll_set_dram0_split_line(const void *line_addr, uint32
         (category[2] << SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_2_S);
 
     uint32_t conf_addr = ((addr >> I_D_SPLIT_LINE_SHIFT) & SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR_V) << SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR_S;
-
     uint32_t reg_cfg = conf_addr | category_bits;
 
     REG_WRITE(sensitive_reg, reg_cfg);
+
+    return MEMP_LL_OK;
 }
 
-static inline void memprot_ll_set_dram0_split_line_D_0(const void *line_addr)
+static inline memprot_ll_err_t memprot_ll_set_dram0_split_line_D_0(const void *line_addr)
 {
-    memprot_ll_set_dram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_4_REG);
+    return memprot_ll_set_dram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_4_REG);
 }
 
-static inline void memprot_ll_set_dram0_split_line_D_1(const void *line_addr)
+static inline memprot_ll_err_t memprot_ll_set_dram0_split_line_D_1(const void *line_addr)
 {
-    memprot_ll_set_dram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_5_REG);
+    return memprot_ll_set_dram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_5_REG);
 }
 
-static inline void* memprot_ll_get_dram0_split_line_D_0(void)
+static inline void *memprot_ll_get_dram0_split_line_D_0(void)
 {
     return memprot_ll_get_split_addr_from_reg(REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_4_REG), SOC_DIRAM_DRAM_LOW);
 }
 
-static inline void* memprot_ll_get_dram0_split_line_D_1(void)
+static inline void *memprot_ll_get_dram0_split_line_D_1(void)
 {
     return memprot_ll_get_split_addr_from_reg(REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_5_REG), SOC_DIRAM_DRAM_LOW);
 }
 
+static inline uint32_t memprot_ll_get_dram0_split_line_D_0_cat(void)
+{
+    return REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_4_REG) & 0x3F;
+}
+
+static inline uint32_t memprot_ll_get_dram0_split_line_D_1_cat(void)
+{
+    return REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_5_REG) & 0x3F;
+}
 
 ///////////////////////////////////
 // DRAM0 - PMS CONFIGURATION
-///////////////////////////////////
 
 // lock
 static inline void memprot_ll_dram0_set_pms_lock(void)
@@ -444,11 +687,11 @@ static inline bool memprot_ll_dram0_get_pms_lock(void)
 static inline uint32_t memprot_ll_dram0_set_permissions(bool r, bool w)
 {
     uint32_t permissions = 0;
-    if ( r ) {
-        permissions |= SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_R;
+    if (r) {
+        permissions |= SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_R;
     }
-    if ( w ) {
-        permissions |= SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_W;
+    if (w) {
+        permissions |= SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_W;
     }
 
     return permissions;
@@ -476,37 +719,36 @@ static inline void memprot_ll_dram0_set_pms_area_3(bool r, bool w)
 
 static inline void memprot_ll_dram0_get_permissions(uint32_t perms, bool *r, bool *w )
 {
-    *r = perms & SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_R;
-    *w = perms & SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_W;
+    *r = perms & SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_R;
+    *w = perms & SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_W;
 }
 
 static inline void memprot_ll_dram0_get_pms_area_0(bool *r, bool *w)
 {
     uint32_t permissions = REG_GET_FIELD(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_1_REG, SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0);
-    memprot_ll_dram0_get_permissions( permissions, r, w);
+    memprot_ll_dram0_get_permissions(permissions, r, w);
 }
 
 static inline void memprot_ll_dram0_get_pms_area_1(bool *r, bool *w)
 {
     uint32_t permissions = REG_GET_FIELD(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_1_REG, SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1);
-    memprot_ll_dram0_get_permissions( permissions, r, w);
+    memprot_ll_dram0_get_permissions(permissions, r, w);
 }
 
 static inline void memprot_ll_dram0_get_pms_area_2(bool *r, bool *w)
 {
     uint32_t permissions = REG_GET_FIELD(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_1_REG, SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2);
-    memprot_ll_dram0_get_permissions( permissions, r, w);
+    memprot_ll_dram0_get_permissions(permissions, r, w);
 }
 
 static inline void memprot_ll_dram0_get_pms_area_3(bool *r, bool *w)
 {
     uint32_t permissions = REG_GET_FIELD(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_1_REG, SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3);
-    memprot_ll_dram0_get_permissions( permissions, r, w);
+    memprot_ll_dram0_get_permissions(permissions, r, w);
 }
 
 ///////////////////////////////////
 // DRAM0 - MONITOR
-///////////////////////////////////
 
 // lock
 static inline void memprot_ll_dram0_set_monitor_lock(void)
@@ -522,26 +764,31 @@ static inline bool memprot_ll_dram0_get_monitor_lock(void)
 // interrupt enable/clear
 static inline void memprot_ll_dram0_set_monitor_en(bool enable)
 {
-    if ( enable ) {
-        REG_SET_BIT( SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_EN );
+    if (enable) {
+        REG_SET_BIT(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_EN);
     } else {
-        REG_CLR_BIT( SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_EN );
+        REG_CLR_BIT(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_EN);
     }
 }
 
 static inline bool memprot_ll_dram0_get_monitor_en(void)
 {
-    return REG_GET_BIT( SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_EN ) == 1;
+    return REG_GET_BIT(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_EN) > 0;
+}
+
+static inline void memprot_ll_dram0_set_monitor_intrclr(void)
+{
+    REG_SET_BIT(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_CLR);
 }
 
-static inline void memprot_ll_dram0_clear_monitor_intr(void)
+static inline void memprot_ll_dram0_reset_monitor_intrclr(void)
 {
-    REG_SET_BIT( SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_CLR );
+    REG_CLR_BIT(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_CLR);
 }
 
-static inline void memprot_ll_dram0_reset_clear_monitor_intr(void)
+static inline bool memprot_ll_dram0_get_monitor_intrclr(void)
 {
-    REG_CLR_BIT( SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_CLR );
+    return REG_GET_BIT(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_CLR) > 0;
 }
 
 static inline uint32_t memprot_ll_dram0_get_monitor_enable_register(void)
@@ -552,33 +799,33 @@ static inline uint32_t memprot_ll_dram0_get_monitor_enable_register(void)
 // permission violation status
 static inline uint32_t memprot_ll_dram0_get_monitor_status_intr(void)
 {
-    return REG_GET_FIELD( SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR );
+    return REG_GET_FIELD(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR);
 }
 
 static inline uint32_t memprot_ll_dram0_get_monitor_status_fault_lock(void)
 {
-    return REG_GET_FIELD( SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK );
+    return REG_GET_FIELD(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK);
 }
 
 static inline uint32_t memprot_ll_dram0_get_monitor_status_fault_world(void)
 {
-    return REG_GET_FIELD( SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD );
+    return REG_GET_FIELD(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD);
 }
 
 static inline uint32_t memprot_ll_dram0_get_monitor_status_fault_addr(void)
 {
-    uint32_t addr = REG_GET_FIELD( SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR );
+    uint32_t addr = REG_GET_FIELD(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR);
     return addr > 0 ? (addr << I_D_FAULT_ADDR_SHIFT) + DRAM0_ADDRESS_LOW : 0;
 }
 
 static inline uint32_t memprot_ll_dram0_get_monitor_status_fault_wr(void)
 {
-    return REG_GET_FIELD( SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_3_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR );
+    return REG_GET_FIELD(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_3_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR);
 }
 
 static inline uint32_t memprot_ll_dram0_get_monitor_status_fault_byte_en(void)
 {
-    return REG_GET_FIELD( SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN );
+    return REG_GET_FIELD(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG, SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN);
 }
 
 static inline uint32_t memprot_ll_dram0_get_monitor_status_register_1(void)
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h
index 38e1676d041..5aace3ffff4 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /*******************************************************************************
  * NOTICE
@@ -758,7 +750,7 @@ static inline void spi_ll_set_miso_delay(spi_dev_t *hw, int delay_mode, int dela
  */
 static inline void spi_ll_master_set_cs_hold(spi_dev_t *hw, int hold)
 {
-    hw->user1.cs_hold_time = hold - 1;
+    hw->user1.cs_hold_time = hold;
     hw->user.cs_hold = hold ? 1 : 0;
 }
 
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/adc_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/adc_hal.h
index 807d620c639..b8455e27ecd 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/adc_hal.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/adc_hal.h
@@ -1,21 +1,51 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
+#include "esp_err.h"
 #include "soc/soc_caps.h"
+#include "hal/dma_types.h"
 #include "hal/adc_types.h"
 #include "hal/adc_ll.h"
 #include "esp_err.h"
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+#if SOC_GDMA_SUPPORTED
 #include "soc/gdma_struct.h"
 #include "hal/gdma_ll.h"
-#include "hal/dma_types.h"
-#include "hal/adc_ll.h"
-#include "hal/dma_types.h"
-#include "esp_err.h"
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32S2
+//ADC utilises SPI3 DMA on ESP32S2
+#include "hal/spi_ll.h"
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+//ADC utilises I2S0 DMA on ESP32
+#include "hal/i2s_ll.h"
+#endif
+
+#if SOC_GDMA_SUPPORTED
+#define ADC_HAL_DMA_INTR_MASK                           GDMA_LL_EVENT_RX_SUC_EOF
+#elif CONFIG_IDF_TARGET_ESP32S2
+#define ADC_HAL_DMA_INTR_MASK                           SPI_LL_INTR_IN_SUC_EOF
+#else //CONFIG_IDF_TARGET_ESP32
+#define ADC_HAL_DMA_INTR_MASK                           BIT(9)
+#endif
 
 //For ADC module, each conversion contains 4 bytes
 #define ADC_HAL_DATA_LEN_PER_CONV 4
 
+typedef enum adc_hal_work_mode_t {
+    ADC_HAL_ULP_MODE,
+    ADC_HAL_SINGLE_READ_MODE,
+    ADC_HAL_CONTINUOUS_READ_MODE,
+    ADC_HAL_PWDET_MODE
+} adc_hal_work_mode_t;
+
 /**
  * @brief Enum for DMA descriptor status
  */
@@ -29,6 +59,7 @@ typedef enum adc_hal_dma_desc_status_t {
  * @brief Configuration of the HAL
  */
 typedef struct adc_hal_config_t {
+    void                *dev;               ///< DMA peripheral address
     uint32_t            desc_max_num;       ///< Number of the descriptors linked once
     uint32_t            dma_chan;           ///< DMA channel to be used
     uint32_t            eof_num;            ///< Bytes between 2 in_suc_eof interrupts
@@ -42,25 +73,30 @@ typedef struct adc_hal_context_t {
     dma_descriptor_t    *rx_desc;           ///< DMA descriptors
 
     /**< these will be assigned by hal layer itself */
-    gdma_dev_t          *dev;               ///< GDMA address
     dma_descriptor_t    desc_dummy_head;    ///< Dummy DMA descriptor for ``cur_desc_ptr`` to start
     dma_descriptor_t    *cur_desc_ptr;      ///< Pointer to the current descriptor
 
     /**< these need to be configured by `adc_hal_config_t` via driver layer*/
+    void                *dev;               ///< DMA address
     uint32_t            desc_max_num;       ///< Number of the descriptors linked once
     uint32_t            dma_chan;           ///< DMA channel to be used
     uint32_t            eof_num;            ///< Words between 2 in_suc_eof interrupts
 } adc_hal_context_t;
-#endif
+
+typedef struct adc_hal_digi_ctrlr_cfg_t {
+    bool                        conv_limit_en;      //1: adc conversion will stop when `conv_limit_num` reaches. 0: won't stop. NOTE: esp32 should always be set to 1.
+    uint32_t                    conv_limit_num;     //see `conv_limit_en`
+    uint32_t                    adc_pattern_len;    //total pattern item number, including ADC1 and ADC2
+    adc_digi_pattern_config_t   *adc_pattern;       //pattern item
+    uint32_t                    sample_freq_hz;     //ADC sample frequency
+    adc_digi_convert_mode_t     conv_mode;          //controller work mode
+    uint32_t                    bit_width;          //output data width
+} adc_hal_digi_ctrlr_cfg_t;
+
 
 /*---------------------------------------------------------------
                     Common setting
 ---------------------------------------------------------------*/
-/**
- * ADC module initialization.
- */
-void adc_hal_init(void);
-
 /**
  * Set ADC module power management.
  *
@@ -68,51 +104,7 @@ void adc_hal_init(void);
  */
 #define adc_hal_set_power_manage(manage) adc_ll_set_power_manage(manage)
 
-/**
- * ADC module clock division factor setting. ADC clock devided from APB clock.
- *
- * @prarm div Division factor.
- */
-#define adc_hal_digi_set_clk_div(div) adc_ll_digi_set_clk_div(div)
-
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * ADC SAR clock division factor setting. ADC SAR clock devided from `RTC_FAST_CLK`.
- *
- * @prarm div Division factor.
- */
-#define adc_hal_set_sar_clk_div(adc_n, div) adc_ll_set_sar_clk_div(adc_n, div)
-
-/**
- * Set ADC module controller.
- * There are five SAR ADC controllers:
- * Two digital controller: Continuous conversion mode (DMA). High performance with multiple channel scan modes;
- * Two RTC controller: Single conversion modes (Polling). For low power purpose working during deep sleep;
- * the other is dedicated for Power detect (PWDET / PKDET), Only support ADC2.
- *
- * @prarm adc_n ADC unit.
- * @prarm ctrl ADC controller.
- */
-#define adc_hal_set_controller(adc_n, ctrl) adc_ll_set_controller(adc_n, ctrl)
-#endif  //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
-/**
- * Get the attenuation of a particular channel on ADCn.
- *
- * @param adc_n ADC unit.
- * @param channel ADCn channel number.
- * @return atten The attenuation option.
- */
-#define adc_hal_get_atten(adc_n, channel) adc_ll_get_atten(adc_n, channel)
-#endif
-
-#if CONFIG_IDF_TARGET_ESP32
-/**
- * Close ADC AMP module if don't use it for power save.
- */
-#define adc_hal_amp_disable() adc_ll_amp_disable()
-#endif
+void adc_hal_set_controller(adc_ll_num_t unit, adc_hal_work_mode_t work_mode);
 
 #if SOC_ADC_ARBITER_SUPPORTED
 //No ADC2 controller arbiter on ESP32
@@ -133,7 +125,6 @@ void adc_hal_arbiter_config(adc_arbiter_t *config);
 /*---------------------------------------------------------------
                     PWDET(Power detect) controller setting
 ---------------------------------------------------------------*/
-
 /**
  * Set adc cct for PWDET controller.
  *
@@ -150,26 +141,6 @@ void adc_hal_arbiter_config(adc_arbiter_t *config);
  */
 #define adc_hal_pwdet_get_cct() adc_ll_pwdet_get_cct()
 
-/*---------------------------------------------------------------
-                    RTC controller setting
----------------------------------------------------------------*/
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * Set adc output data format for RTC controller.
- *
- * @prarm adc_n ADC unit.
- * @prarm bits Output data bits width option.
- */
-#define adc_hal_rtc_set_output_format(adc_n, bits) adc_ll_rtc_set_output_format(adc_n, bits)
-
-/**
- * ADC module output data invert or not.
- *
- * @prarm adc_n ADC unit.
- */
-#define adc_hal_rtc_output_invert(adc_n, inv_en) adc_ll_rtc_output_invert(adc_n, inv_en)
-#endif  //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
 /**
  *  Enable/disable the output of ADCn's internal reference voltage to one of ADC2's channels.
  *
@@ -187,29 +158,109 @@ void adc_hal_arbiter_config(adc_arbiter_t *config);
 /*---------------------------------------------------------------
                     Digital controller setting
 ---------------------------------------------------------------*/
+/**
+ * ADC module initialization.
+ */
+void adc_hal_init(void);
+
 /**
  * Digital controller deinitialization.
+ *
+ * @param hal Context of the HAL
  */
-void adc_hal_digi_deinit(void);
+void adc_hal_digi_deinit(adc_hal_context_t *hal);
+
+/**
+ * @brief Initialize the hal context
+ *
+ * @param hal    Context of the HAL
+ * @param config Configuration of the HAL
+ */
+void adc_hal_context_config(adc_hal_context_t *hal, const adc_hal_config_t *config);
+
+/**
+ * @brief Initialize the HW
+ *
+ * @param hal Context of the HAL
+ */
+void adc_hal_digi_init(adc_hal_context_t *hal);
 
 /**
  * Setting the digital controller.
  *
- * @param cfg Pointer to digital controller paramter.
+ * @param hal    Context of the HAL
+ * @param cfg    Pointer to digital controller paramter.
+ */
+void adc_hal_digi_controller_config(adc_hal_context_t *hal, const adc_hal_digi_ctrlr_cfg_t *cfg);
+
+/**
+ * @brief Start Conversion
+ *
+ * @param hal Context of the HAL
+ * @param data_buf Pointer to the data buffer, the length should be multiple of ``desc_max_num`` and ``eof_num`` in ``adc_hal_context_t``
  */
-void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
+void adc_hal_digi_start(adc_hal_context_t *hal, uint8_t *data_buf);
 
+#if !SOC_GDMA_SUPPORTED
 /**
- * Reset the pattern table pointer, then take the measurement rule from table header in next measurement.
+ * @brief Get the DMA descriptor that Hardware has finished processing.
  *
- * @param adc_n ADC unit.
+ * @param hal Context of the HAL
+ *
+ * @return DMA descriptor address
  */
-#define adc_hal_digi_clear_pattern_table(adc_n) adc_ll_digi_clear_pattern_table(adc_n)
+intptr_t adc_hal_get_desc_addr(adc_hal_context_t *hal);
+
+/**
+ * @brief Check the hardware interrupt event
+ *
+ * @param hal Context of the HAL
+ * @param mask Event mask
+ *
+ * @return True: the event is triggered. False: the event is not triggered yet.
+ */
+bool adc_hal_check_event(adc_hal_context_t *hal, uint32_t mask);
+#endif
+
+/**
+ * @brief Get the ADC reading result
+ *
+ * @param      hal           Context of the HAL
+ * @param      eof_desc_addr The last descriptor that is finished by HW. Should be got from DMA
+ * @param[out] cur_desc      The descriptor with ADC reading result (from the 1st one to the last one (``eof_desc_addr``))
+ *
+ * @return                   See ``adc_hal_dma_desc_status_t``
+ */
+adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_context_t *hal, const intptr_t eof_desc_addr, dma_descriptor_t **cur_desc);
+
+/**
+ * @brief Clear interrupt
+ *
+ * @param hal  Context of the HAL
+ * @param mask mask of the interrupt
+ */
+void adc_hal_digi_clr_intr(adc_hal_context_t *hal, uint32_t mask);
+
+/**
+ * @brief Enable interrupt
+ *
+ * @param hal  Context of the HAL
+ * @param mask mask of the interrupt
+ */
+void adc_hal_digi_dis_intr(adc_hal_context_t *hal, uint32_t mask);
+
+/**
+ * @brief Stop conversion
+ *
+ * @param hal Context of the HAL
+ */
+void adc_hal_digi_stop(adc_hal_context_t *hal);
+
 
 /*---------------------------------------------------------------
                     ADC Single Read
 ---------------------------------------------------------------*/
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
+#if SOC_ADC_RTC_CTRL_SUPPORTED
 /**
  * Set the attenuation of a particular channel on ADCn.
  *
@@ -245,7 +296,7 @@ void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
  */
 #define adc_hal_set_atten(adc_n, channel, atten) adc_ll_set_atten(adc_n, channel, atten)
 
-#else // CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+#else // #if !SOC_ADC_RTC_CTRL_SUPPORTED
 /**
  * Set the attenuation for ADC to single read
  *
@@ -256,7 +307,7 @@ void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
  * @param atten    ADC attenuation. See ``adc_atten_t``
  */
 #define adc_hal_set_atten(adc_n, channel, atten) adc_ll_onetime_set_atten(atten)
-#endif
+#endif  //#if SOC_ADC_RTC_CTRL_SUPPORTED
 
 /**
  * Start an ADC conversion and get the converted value.
@@ -277,7 +328,6 @@ esp_err_t adc_hal_convert(adc_ll_num_t adc_n, int channel, int *out_raw);
                     ADC calibration setting
 ---------------------------------------------------------------*/
 #if SOC_ADC_CALIBRATION_V1_SUPPORTED
-// ESP32-S2, C3 and H2 support HW offset calibration.
 
 /**
  * @brief Initialize default parameter for the calibration block.
@@ -314,86 +364,21 @@ uint32_t adc_hal_self_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc
 
 #endif //SOC_ADC_CALIBRATION_V1_SUPPORTED
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+
 /*---------------------------------------------------------------
-                    DMA setting
+                    RTC controller setting
 ---------------------------------------------------------------*/
 /**
- * @brief Initialize the hal context
- *
- * @param hal    Context of the HAL
- * @param config Configuration of the HAL
- */
-void adc_hal_context_config(adc_hal_context_t *hal, const adc_hal_config_t *config);
-
-/**
- * @brief Initialize the HW
- *
- * @param hal Context of the HAL
- */
-void adc_hal_digi_init(adc_hal_context_t *hal);
-
-/**
- * @brief Reset ADC / DMA fifo
- *
- * @param hal Context of the HAL
- */
-void adc_hal_fifo_reset(adc_hal_context_t *hal);
-
-/**
- * @brief Start DMA
- *
- * @param hal      Context of the HAL
- * @param data_buf Pointer to the data buffer, the length should be multiple of ``desc_max_num`` and ``eof_num`` in ``adc_hal_context_t``
- */
-void adc_hal_digi_rxdma_start(adc_hal_context_t *hal, uint8_t *data_buf);
-
-/**
- * @brief Start ADC
- *
- * @param hal Context of the HAL
- */
-void adc_hal_digi_start(adc_hal_context_t *hal);
-
-/**
- * @brief Get the ADC reading result
- *
- * @param      hal           Context of the HAL
- * @param      eof_desc_addr The last descriptor that is finished by HW. Should be got from DMA
- * @param[out] cur_desc      The descriptor with ADC reading result (from the 1st one to the last one (``eof_desc_addr``))
- *
- * @return                   See ``adc_hal_dma_desc_status_t``
- */
-adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_context_t *hal, const intptr_t eof_desc_addr, dma_descriptor_t **cur_desc);
-
-/**
- * @brief Stop DMA
- *
- * @param hal Context of the HAL
- */
-void adc_hal_digi_rxdma_stop(adc_hal_context_t *hal);
-
-/**
- * @brief Clear interrupt
- *
- * @param hal  Context of the HAL
- * @param mask mask of the interrupt
- */
-void adc_hal_digi_clr_intr(adc_hal_context_t *hal, uint32_t mask);
-
-/**
- * @brief Enable interrupt
+ * Set adc output data format for RTC controller.
  *
- * @param hal  Context of the HAL
- * @param mask mask of the interrupt
+ * @prarm adc_n ADC unit.
+ * @prarm bits Output data bits width option.
  */
-void adc_hal_digi_dis_intr(adc_hal_context_t *hal, uint32_t mask);
+#define adc_hal_rtc_set_output_format(adc_n, bits) adc_ll_rtc_set_output_format(adc_n, bits)
 
 /**
- * @brief Stop ADC
+ * ADC module output data invert or not.
  *
- * @param hal Context of the HAL
+ * @prarm adc_n ADC unit.
  */
-void adc_hal_digi_stop(adc_hal_context_t *hal);
-
-#endif  //#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+#define adc_hal_rtc_output_invert(adc_n, inv_en) adc_ll_rtc_output_invert(adc_n, inv_en)
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/adc_types.h b/tools/sdk/esp32c3/include/hal/include/hal/adc_types.h
index c0f6661f145..f5efb1d4273 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/adc_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/adc_types.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 
 #include <stdbool.h>
@@ -62,26 +54,9 @@ typedef enum {
     ADC_ATTEN_MAX,
 } adc_atten_t;
 
-#ifdef CONFIG_IDF_TARGET_ESP32
-/**
- * @brief ESP32 ADC DMA source selection.
- */
-#else
-/**
- * @brief ESP32 ADC DMA source selection.
- *
- * @deprecated  Not applicable on ESP32-S2 because ESP32-S2 doesn't use I2S DMA.
- */
-#endif
-typedef enum {
-    ADC_I2S_DATA_SRC_IO_SIG = 0, /*!< I2S data from GPIO matrix signal  */
-    ADC_I2S_DATA_SRC_ADC = 1,    /*!< I2S data from ADC */
-    ADC_I2S_DATA_SRC_MAX,
-} adc_i2s_source_t;
-
 /**
  * @brief ADC resolution setting option.
- *
+ * @note  Only used in single read mode
  */
 typedef enum {
 #if CONFIG_IDF_TARGET_ESP32
@@ -97,82 +72,56 @@ typedef enum {
     ADC_WIDTH_MAX,
 } adc_bits_width_t;
 
-
 /**
  * @brief ADC digital controller (DMA mode) work mode.
- *
- * @note  The conversion mode affects the sampling frequency:
- *        SINGLE_UNIT_1: When the measurement is triggered, only ADC1 is sampled once.
- *        SINGLE_UNIT_2: When the measurement is triggered, only ADC2 is sampled once.
- *        BOTH_UNIT    : When the measurement is triggered, ADC1 and ADC2 are sampled at the same time.
- *        ALTER_UNIT   : When the measurement is triggered, ADC1 or ADC2 samples alternately.
  */
 typedef enum {
-    ADC_CONV_SINGLE_UNIT_1 = 1, /*!< SAR ADC 1. */
-    ADC_CONV_SINGLE_UNIT_2 = 2, /*!< SAR ADC 2. */
-    ADC_CONV_BOTH_UNIT     = 3, /*!< SAR ADC 1 and 2. */
-    ADC_CONV_ALTER_UNIT    = 7, /*!< SAR ADC 1 and 2 alternative mode. */
+    ADC_CONV_SINGLE_UNIT_1 = 1,  ///< Only use ADC1 for conversion
+    ADC_CONV_SINGLE_UNIT_2 = 2,  ///< Only use ADC2 for conversion
+    ADC_CONV_BOTH_UNIT     = 3,  ///< Use Both ADC1 and ADC2 for conversion simultaneously
+    ADC_CONV_ALTER_UNIT    = 7,  ///< Use both ADC1 and ADC2 for conversion by turn. e.g. ADC1 -> ADC2 -> ADC1 -> ADC2 .....
     ADC_CONV_UNIT_MAX,
 } adc_digi_convert_mode_t;
 
-/**
- * @brief ADC digital controller (DMA mode) conversion rules setting.
- */
-typedef struct {
-    union {
-        struct {
-            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
-                                         0: measurement range 0 - 800mV,
-                                         1: measurement range 0 - 1100mV,
-                                         2: measurement range 0 - 1350mV,
-                                         3: measurement range 0 - 2600mV. */
-#if CONFIG_IDF_TARGET_ESP32
-            uint8_t bit_width: 2;   /*!< ADC resolution.
--                                         0: 9 bit;
--                                         1: 10 bit;
--                                         2: 11 bit;
--                                         3: 12 bit. */
-            int8_t channel:   4;   /*!< ADC channel index. */
-#elif CONFIG_IDF_TARGET_ESP32S2
-            uint8_t reserved:  2;   /*!< reserved0 */
-            uint8_t channel:   4;   /*!< ADC channel index. */
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-            uint8_t channel:   3;   /*!< ADC channel index. */
-            uint8_t unit:      1;   /*!< ADC unit index. */
-            uint8_t reserved:  2;   /*!< reserved0 */
-#endif
-        };
-        uint8_t val;                /*!<Raw data value */
-    };
-} adc_digi_pattern_table_t;
-
 /**
  * @brief ADC digital controller (DMA mode) output data format option.
  */
 typedef enum {
-    ADC_DIGI_FORMAT_12BIT,   /*!<ADC to DMA data format,                [15:12]-channel, [11: 0]-12 bits ADC data (`adc_digi_output_data_t`).
-                                 Note: For single convert mode. */
-    ADC_DIGI_FORMAT_11BIT,   /*!<ADC to DMA data format, [15]-adc unit, [14:11]-channel, [10: 0]-11 bits ADC data (`adc_digi_output_data_t`).
-                                 Note: For multi or alter convert mode. */
-    ADC_DIGI_FORMAT_MAX,
+    ADC_DIGI_FORMAT_12BIT __attribute__((deprecated)),  /*!<ADC to DMA data format,                [15:12]-channel, [11: 0]-12 bits ADC data (`adc_digi_output_data_t`). Note: For single convert mode. */
+    ADC_DIGI_FORMAT_11BIT __attribute__((deprecated)),  /*!<ADC to DMA data format, [15]-adc unit, [14:11]-channel, [10: 0]-11 bits ADC data (`adc_digi_output_data_t`). Note: For multi or alter convert mode. */
+    ADC_DIGI_FORMAT_MAX   __attribute__((deprecated)),
+
+    ADC_DIGI_OUTPUT_FORMAT_TYPE1,   ///< See `adc_digi_output_data_t.type1`
+    ADC_DIGI_OUTPUT_FORMAT_TYPE2,   ///< See `adc_digi_output_data_t.type2`
 } adc_digi_output_format_t;
 
+/**
+ * @brief ADC digital controller pattern configuration
+ */
+typedef struct {
+    uint8_t atten;      ///< Attenuation of this ADC channel
+    uint8_t channel;    ///< ADC channel
+    uint8_t unit;       ///< ADC unit
+    uint8_t bit_width;  ///< ADC output bit width
+} adc_digi_pattern_config_t;
+
+/*---------------------------------------------------------------
+                    Output Format
+---------------------------------------------------------------*/
 #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
 /**
  * @brief ADC digital controller (DMA mode) output data format.
  *        Used to analyze the acquired ADC (DMA) data.
- *
- * @note  ESP32-S2:
- *        Member `channel` can be used to judge the validity of the ADC data, because the role of the arbiter may get invalid ADC data.
+ * @note  ESP32: Only `type1` is valid. ADC2 does not support DMA mode.
+ * @note  ESP32-S2: Member `channel` can be used to judge the validity of the ADC data,
+ *                  because the role of the arbiter may get invalid ADC data.
  */
 typedef struct {
     union {
         struct {
             uint16_t data:     12;  /*!<ADC real output data info. Resolution: 12 bit. */
-            uint16_t channel:   4;  /*!<ADC channel index info. For ESP32-S2:
-                                        If (channel < ADC_CHANNEL_MAX), The data is valid.
-                                        If (channel > ADC_CHANNEL_MAX), The data is invalid. */
-        } type1;                    /*!<When the configured output format is 12bit. `ADC_DIGI_FORMAT_12BIT` */
+            uint16_t channel:   4;  /*!<ADC channel index info. */
+        } type1;
         struct {
             uint16_t data:     11;  /*!<ADC real output data info. Resolution: 11 bit. */
             uint16_t channel:   4;  /*!<ADC channel index info. For ESP32-S2:
@@ -183,8 +132,8 @@ typedef struct {
         uint16_t val;               /*!<Raw data value */
     };
 } adc_digi_output_data_t;
-#endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
 /**
  * @brief ADC digital controller (DMA mode) output data format.
  *        Used to analyze the acquired ADC (DMA) data.
@@ -203,112 +152,32 @@ typedef struct {
         uint32_t val;                   /*!<Raw data value */
     };
 } adc_digi_output_data_t;
-#endif
-
-#if !CONFIG_IDF_TARGET_ESP32
 
+#elif CONFIG_IDF_TARGET_ESP32S3
 /**
- * @brief ADC digital controller (DMA mode) clock system setting.
- *        Calculation formula: controller_clk = (`APLL` or `APB`) / (div_num + div_a / div_b + 1).
- *
- * @note: The clocks of the DAC digital controller use the ADC digital controller clock divider.
+ * @brief ADC digital controller (DMA mode) output data format.
+ *        Used to analyze the acquired ADC (DMA) data.
  */
 typedef struct {
-    bool use_apll;      /*!<true: use APLL clock; false: use APB clock. */
-    uint32_t div_num;   /*!<Division factor. Range: 0 ~ 255.
-                            Note: When a higher frequency clock is used (the division factor is less than 9),
-                            the ADC reading value will be slightly offset. */
-    uint32_t div_b;     /*!<Division factor. Range: 1 ~ 63. */
-    uint32_t div_a;     /*!<Division factor. Range: 0 ~ 63. */
-} adc_digi_clk_t;
-
-#endif //!CONFIG_IDF_TARGET_ESP32
-
-/**
-  * @brief ADC digital controller (DMA mode) configuration parameters.
-  *
-  * Example setting: When using ADC1 channel0 to measure voltage, the sampling rate is required to be 1 kHz:
-  *
-  *     +---------------------+--------+--------+--------+
-  *     | sample rate         | 1 kHz  | 1 kHz  | 1 kHz  |
-  *     +---------------------+--------+--------+--------+
-  *     | conv_mode           | single |  both  |  alter |
-  *     | adc1_pattern_len    |    1   |    1   |    1   |
-  *     | dig_clk.use_apll    |    0   |    0   |    0   |
-  *     | dig_clk.div_num     |   99   |   99   |   99   |
-  *     | dig_clk.div_b       |    0   |    0   |    0   |
-  *     | dig_clk.div_a       |    0   |    0   |    0   |
-  *     | interval            |  400   |  400   |  200   |
-  *     +---------------------+--------+--------+--------+
-  *     | `trigger_meas_freq` | 1 kHz  | 1 kHz  | 2 kHz  |
-  *     +---------------------+--------+--------+--------+
-  *
-  * Explanation of the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA outputs:
-  *
-  *     +---------------------+--------+--------+--------+
-  *     | conv_mode           | single |  both  |  alter |
-  *     +---------------------+--------+--------+--------+
-  *     | trigger meas times  |    1   |    1   |    1   |
-  *     +---------------------+--------+--------+--------+
-  *     | conv_limit_num      |   +1   |   +1   |   +1   |
-  *     | dma_eof_num         |   +1   |   +2   |   +1   |
-  *     | dma output (byte)   |   +2   |   +4   |   +2   |
-  *     +---------------------+--------+--------+--------+
-  */
-typedef struct {
-    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
-                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
-    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
-    uint32_t adc1_pattern_len;               /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
-                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
-                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
-                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
-    uint32_t adc2_pattern_len;               /*!<Refer to ``adc1_pattern_len`` */
-    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
-    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to `adc1_pattern` */
-    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
-    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-    uint32_t adc_pattern_len;                /*!<Pattern table length for digital controller. Range: 0 ~ 7 (0: Don't change the pattern table setting).
-                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 7 items, in which channel selection,
-                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
-                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
-    adc_digi_pattern_table_t *adc_pattern;   /*!<Pointer to pattern table for digital controller. The table size defined by `adc_pattern_len`. */
-#endif
-#if CONFIG_IDF_TARGET_ESP32S2
-    uint32_t interval;                       /*!<The number of interval clock cycles for the digital controller to trigger the measurement.
-                                                 The unit is the divided clock. Range: 40 ~ 4095.
-                                                 Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval. Refer to ``adc_digi_clk_t``.
-                                                 Note: The sampling rate of each channel is also related to the conversion mode (See ``adc_digi_convert_mode_t``) and pattern table settings. */
-    adc_digi_clk_t dig_clk;                  /*!<ADC digital controller clock divider settings. Refer to ``adc_digi_clk_t``.
-                                                 Note: The clocks of the DAC digital controller use the ADC digital controller clock divider. */
-    uint32_t dma_eof_num;                    /*!<DMA eof num of adc digital controller.
-                                                 If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated in DMA.
-                                                 Note: The converted data in the DMA in link buffer will be multiple of two bytes. */
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-    uint32_t sample_freq_hz;  /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
-                                   Fs = Fd / interval / 2
-                                   Fs: sampling frequency;
-                                   Fd: digital controller frequency, no larger than 5M for better performance
-                                   interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
-#endif
-} adc_digi_config_t;
-
-#if CONFIG_IDF_TARGET_ESP32S2
-/**
- * @brief ADC digital controller (DMA mode) interrupt type options.
- */
-typedef enum {
-    ADC_DIGI_INTR_MASK_MONITOR = 0x1,
-    ADC_DIGI_INTR_MASK_MEAS_DONE = 0x2,
-    ADC_DIGI_INTR_MASK_ALL = 0x3,
-} adc_digi_intr_t;
-FLAG_ATTR(adc_digi_intr_t)
+    union {
+        struct {
+            uint32_t data:          13; /*!<ADC real output data info. Resolution: 13 bit. */
+            uint32_t channel:       4;  /*!<ADC channel index info.
+                                            If (channel < ADC_CHANNEL_MAX), The data is valid.
+                                            If (channel > ADC_CHANNEL_MAX), The data is invalid. */
+            uint32_t unit:          1;  /*!<ADC unit index info. 0: ADC1; 1: ADC2.  */
+            uint32_t reserved17_31: 14; /*!<Reserved17. */
+        } type2;                         /*!<When the configured output format is 12bit. `ADC_DIGI_FORMAT_11BIT` */
+        uint32_t val;                   /*!<Raw data value */
+    };
+} adc_digi_output_data_t;
 #endif
 
-#if !CONFIG_IDF_TARGET_ESP32
 
+#if SOC_ADC_ARBITER_SUPPORTED
+/*---------------------------------------------------------------
+                    Arbiter
+---------------------------------------------------------------*/
 /**
  * @brief ADC arbiter work mode option.
  *
@@ -344,7 +213,12 @@ typedef struct {
     .dig_pri = 0, \
     .pwdet_pri = 2, \
 }
+#endif  //#if SOC_ADC_ARBITER_SUPPORTED
 
+#if SOC_ADC_FILTER_SUPPORTED
+/*---------------------------------------------------------------
+                    Filter
+---------------------------------------------------------------*/
 /**
  * @brief ADC digital controller (DMA mode) filter index options.
  *
@@ -387,7 +261,12 @@ typedef struct {
                                     For ESP32-S2, it's always `ADC_CHANNEL_MAX` */
     adc_digi_filter_mode_t mode;/*!<Set adc filter mode for filter. See ``adc_digi_filter_mode_t``. */
 } adc_digi_filter_t;
+#endif  // #if SOC_ADC_FILTER_SUPPORTED
 
+#if SOC_ADC_MONITOR_SUPPORTED
+/*---------------------------------------------------------------
+                    Monitor
+---------------------------------------------------------------*/
 /**
  * @brief ADC digital controller (DMA mode) monitor index options.
  *
@@ -437,5 +316,41 @@ typedef struct {
     uint32_t threshold;             /*!<Set monitor threshold of adc digital controller. */
 #endif
 } adc_digi_monitor_t;
+#endif  //#if SOC_ADC_MONITOR_SUPPORTED
+
+/*---------------------------------------------------------------
+            To Be Deprecated TODO: IDF-3610
+---------------------------------------------------------------*/
+#ifdef CONFIG_IDF_TARGET_ESP32
+/**
+ * @brief ESP32 ADC DMA source selection.
+ */
+#else
+/**
+ * @brief ESP32 ADC DMA source selection.
+ *
+ * @deprecated  Not applicable on ESP32-S2 because ESP32-S2 doesn't use I2S DMA.
+ */
+#endif
+typedef enum {
+    ADC_I2S_DATA_SRC_IO_SIG = 0, /*!< I2S data from GPIO matrix signal  */
+    ADC_I2S_DATA_SRC_ADC = 1,    /*!< I2S data from ADC */
+    ADC_I2S_DATA_SRC_MAX,
+} adc_i2s_source_t;
 
-#endif // CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#if CONFIG_IDF_TARGET_ESP32S2
+/**
+ * @brief ADC digital controller (DMA mode) clock system setting.
+ *        Calculation formula: controller_clk = (`APLL` or `APB`) / (div_num + div_a / div_b + 1).
+ *
+ * @note: The clocks of the DAC digital controller use the ADC digital controller clock divider.
+ */
+typedef struct {
+    bool use_apll;      /*!<true: use APLL clock; false: use APB clock. */
+    uint32_t div_num;   /*!<Division factor. Range: 0 ~ 255.
+                            Note: When a higher frequency clock is used (the division factor is less than 9),
+                            the ADC reading value will be slightly offset. */
+    uint32_t div_b;     /*!<Division factor. Range: 1 ~ 63. */
+    uint32_t div_a;     /*!<Division factor. Range: 0 ~ 63. */
+} adc_digi_clk_t;
+#endif
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/cpu_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/cpu_hal.h
index e6b7c62d2f3..824095871db 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/cpu_hal.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/cpu_hal.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -78,6 +70,11 @@ extern "C" {
  */
 #define cpu_hal_waiti()                 cpu_ll_waiti()
 
+/**
+ * Trigger a syscall.
+ */
+#define cpu_hal_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno)                 cpu_ll_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno)
+
 #if SOC_CPU_BREAKPOINTS_NUM > 0
 
 /**
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/emac_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/emac_hal.h
index f661e58985a..27cd38456dc 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/emac_hal.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/emac_hal.h
@@ -1,16 +1,8 @@
-// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -220,9 +212,23 @@ uint32_t emac_hal_get_phy_data(emac_hal_context_t *hal);
 
 void emac_hal_set_address(emac_hal_context_t *hal, uint8_t *mac_addr);
 
+/**
+ * @brief Starts EMAC Transmission & Reception
+ *
+ * @param hal EMAC HAL context infostructure
+ */
 void emac_hal_start(emac_hal_context_t *hal);
 
-void emac_hal_stop(emac_hal_context_t *hal);
+/**
+ * @brief Stops EMAC Transmission & Reception
+ *
+ * @param hal EMAC HAL context infostructure
+ * @return
+ *     - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_STATE: previous frame transmission/reception is not completed. When this error occurs,
+  *      wait and reapeat the EMAC stop again.
+ */
+esp_err_t emac_hal_stop(emac_hal_context_t *hal);
 
 uint32_t emac_hal_get_tx_desc_owner(emac_hal_context_t *hal);
 
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/gpio_types.h b/tools/sdk/esp32c3/include/hal/include/hal/gpio_types.h
index a9b56f7c6a3..1678689961f 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/gpio_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/gpio_types.h
@@ -302,7 +302,6 @@ typedef enum {
     GPIO_NUM_19 = 19,   /*!< GPIO19, input and output */
     GPIO_NUM_20 = 20,   /*!< GPIO20, input and output */
     GPIO_NUM_21 = 21,   /*!< GPIO21, input and output */
-    GPIO_NUM_22 = 22,   /*!< GPIO22, input and output */
     GPIO_NUM_MAX,
 /** @endcond */
 } gpio_num_t;
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/i2s_types.h b/tools/sdk/esp32c3/include/hal/include/hal/i2s_types.h
index 48d745eb2fa..dcf0ab4d0b8 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/i2s_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/i2s_types.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -52,31 +44,31 @@ typedef enum {
  *
  */
 typedef enum {
-    I2S_CHANNEL_MONO        = (0x01 << 31) | 0x03,  /*!< I2S channel (mono), two channel enabled. In this mode, you only need to send one channel data but the fifo will copy same data for another channel automatically, then both channels will transmit same data. The highest bit is for differentiating I2S_CHANNEL_STEREO since they both use two channels */
-    I2S_CHANNEL_STEREO      = 0x03,                 /*!< I2S channel (stereo), two channel enabled. In this mode, two channels will transmit different data. */
+    I2S_CHANNEL_MONO        = 1,  /*!< I2S channel (mono), one channel activated. In this mode, you only need to send one channel data but the fifo will copy same data for the other unactivated channels automatically, then both channels will transmit same data. */
+    I2S_CHANNEL_STEREO      = 2,  /*!< I2S channel (stereo), two (or more) channels activated. In this mode, these channels will transmit different data. */
 #if SOC_I2S_SUPPORTS_TDM
-    // Bit map of active chan.
+    // Bit map of activated chan.
     // There are 16 channels in TDM mode.
-    // For TX module, only the active channel send the audio data, the inactive channel send a constant(configurable) or will be skiped if 'skip_msk' is set.
-    // For RX module, only receive the audio data in active channels, the data in inactive channels will be ignored.
-    // the bit map of active channel can not exceed (0x1<<total_chan_num).
+    // For TX module, only the activated channel send the audio data, the unactivated channel send a constant(configurable) or will be skiped if 'skip_msk' is set.
+    // For RX module, only receive the audio data in activated channels, the data in unactivated channels will be ignored.
+    // the bit map of activated channel can not exceed the maximum enabled channel number (i.e. 0x10000 << total_chan_num).
     // e.g: active_chan_mask = (I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH3), here the active_chan_number is 2 and total_chan_num is not supposed to be smaller than 4.
-    I2S_TDM_ACTIVE_CH0  = (0x1 << 0),               /*!< I2S channel 0 enabled */
-    I2S_TDM_ACTIVE_CH1  = (0x1 << 1),               /*!< I2S channel 1 enabled */
-    I2S_TDM_ACTIVE_CH2  = (0x1 << 2),               /*!< I2S channel 2 enabled */
-    I2S_TDM_ACTIVE_CH3  = (0x1 << 3),               /*!< I2S channel 3 enabled */
-    I2S_TDM_ACTIVE_CH4  = (0x1 << 4),               /*!< I2S channel 4 enabled */
-    I2S_TDM_ACTIVE_CH5  = (0x1 << 5),               /*!< I2S channel 5 enabled */
-    I2S_TDM_ACTIVE_CH6  = (0x1 << 6),               /*!< I2S channel 6 enabled */
-    I2S_TDM_ACTIVE_CH7  = (0x1 << 7),               /*!< I2S channel 7 enabled */
-    I2S_TDM_ACTIVE_CH8  = (0x1 << 8),               /*!< I2S channel 8 enabled */
-    I2S_TDM_ACTIVE_CH9  = (0x1 << 9),               /*!< I2S channel 9 enabled */
-    I2S_TDM_ACTIVE_CH10 = (0x1 << 10),              /*!< I2S channel 10 enabled */
-    I2S_TDM_ACTIVE_CH11 = (0x1 << 11),              /*!< I2S channel 11 enabled */
-    I2S_TDM_ACTIVE_CH12 = (0x1 << 12),              /*!< I2S channel 12 enabled */
-    I2S_TDM_ACTIVE_CH13 = (0x1 << 13),              /*!< I2S channel 13 enabled */
-    I2S_TDM_ACTIVE_CH14 = (0x1 << 14),              /*!< I2S channel 14 enabled */
-    I2S_TDM_ACTIVE_CH15 = (0x1 << 15),              /*!< I2S channel 15 enabled */
+    I2S_TDM_ACTIVE_CH0  = (0x1 << 16),               /*!< I2S channel 0 activated */
+    I2S_TDM_ACTIVE_CH1  = (0x1 << 17),               /*!< I2S channel 1 activated */
+    I2S_TDM_ACTIVE_CH2  = (0x1 << 18),               /*!< I2S channel 2 activated */
+    I2S_TDM_ACTIVE_CH3  = (0x1 << 19),               /*!< I2S channel 3 activated */
+    I2S_TDM_ACTIVE_CH4  = (0x1 << 20),               /*!< I2S channel 4 activated */
+    I2S_TDM_ACTIVE_CH5  = (0x1 << 21),               /*!< I2S channel 5 activated */
+    I2S_TDM_ACTIVE_CH6  = (0x1 << 22),               /*!< I2S channel 6 activated */
+    I2S_TDM_ACTIVE_CH7  = (0x1 << 23),               /*!< I2S channel 7 activated */
+    I2S_TDM_ACTIVE_CH8  = (0x1 << 24),               /*!< I2S channel 8 activated */
+    I2S_TDM_ACTIVE_CH9  = (0x1 << 25),               /*!< I2S channel 9 activated */
+    I2S_TDM_ACTIVE_CH10 = (0x1 << 26),              /*!< I2S channel 10 activated */
+    I2S_TDM_ACTIVE_CH11 = (0x1 << 27),              /*!< I2S channel 11 activated */
+    I2S_TDM_ACTIVE_CH12 = (0x1 << 28),              /*!< I2S channel 12 activated */
+    I2S_TDM_ACTIVE_CH13 = (0x1 << 29),              /*!< I2S channel 13 activated */
+    I2S_TDM_ACTIVE_CH14 = (0x1 << 30),              /*!< I2S channel 14 activated */
+    I2S_TDM_ACTIVE_CH15 = (0x1 << 31),              /*!< I2S channel 15 activated */
 #endif
 } i2s_channel_t;
 
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/memprot_types.h b/tools/sdk/esp32c3/include/hal/include/hal/memprot_types.h
index 42231f43eaf..15e3c3959ab 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/memprot_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/memprot_types.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -25,11 +17,34 @@ extern "C" {
 typedef enum {
     MEMP_LL_OK = 0,
     MEMP_LL_FAIL = 1,
-    MEMP_LL_ERR_SPLIT_ADDR_INVALID = 2,
+    MEMP_LL_ERR_SPLIT_ADDR_OUT_OF_RANGE = 2,
+    MEMP_LL_ERR_SPLIT_ADDR_INVALID = 2,         /* temporary duplicate for S2 builds */
     MEMP_LL_ERR_SPLIT_ADDR_UNALIGNED = 3,
-    MEMP_LL_ERR_UNI_BLOCK_INVALID = 4
+    MEMP_LL_ERR_UNI_BLOCK_INVALID = 4,
+    MEMP_LL_ERR_AREA_INVALID = 5,
+    MEMP_LL_ERR_WORLD_INVALID = 6
 } memprot_ll_err_t;
 
+/**
+ * @brief Memprot LL PMS World IDs
+ *
+ */
+typedef enum {
+    MEMP_LL_WORLD_NONE = 0x00,
+    MEMP_LL_WORLD_0 = 0x01,
+    MEMP_LL_WORLD_1 = 0x10
+} memprot_ll_world_t;
+
+/**
+ * @brief Memprot LL PMS Area IDs
+ *
+ */
+typedef enum {
+    MEMP_LL_AREA_NONE = 0,
+    MEMP_LL_AREA_LOW = 1,
+    MEMP_LL_AREA_HIGH = 2
+} memprot_ll_area_t;
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/usbh_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/usbh_hal.h
index 6360f7b3f36..5326deb2dca 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/usbh_hal.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/usbh_hal.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -18,7 +18,6 @@ NOTE: Thread safety is the responsibility fo the HAL user. All USB Host HAL
 #include <stdlib.h>
 #include <stddef.h>
 #include "soc/usbh_struct.h"
-#include "soc/usb_wrap_struct.h"
 #include "hal/usbh_ll.h"
 #include "hal/usb_types_private.h"
 #include "hal/assert.h"
@@ -152,7 +151,6 @@ typedef struct {
 typedef struct {
     //Context
     usbh_dev_t *dev;                            /**< Pointer to base address of DWC_OTG registers */
-    usb_wrap_dev_t *wrap_dev;                   /**< Pointer to base address of USB Wrapper registers */
     //Host Port related
     uint32_t *periodic_frame_list;              /**< Pointer to scheduling frame list */
     usb_hal_frame_list_len_t frame_list_len;    /**< Length of the periodic scheduling frame list */
@@ -181,6 +179,7 @@ typedef struct {
  *
  * Entry:
  * - The peripheral must have been reset and clock un-gated
+ * - The USB PHY (internal or external) and associated GPIOs must already be configured
  * - GPIO pins configured
  * - Interrupt allocated but DISABLED (in case of an unknown interupt state)
  * Exit:
@@ -495,7 +494,7 @@ static inline void usbh_hal_disable_debounce_lock(usbh_hal_context_t *hal)
     hal->flags.dbnc_lock_enabled = 0;
     //Clear Conenction and disconenction interrupt in case it triggered again
     usb_ll_intr_clear(hal->dev, USB_LL_INTR_CORE_DISCONNINT);
-    usbh_ll_hprt_intr_clear(hal->dev, USBH_LL_INTR_HPRT_PRTENCHNG);
+    usbh_ll_hprt_intr_clear(hal->dev, USBH_LL_INTR_HPRT_PRTCONNDET);
     //Reenable the hprt (connection) and disconnection interrupts
     usb_ll_en_intrs(hal->dev, USB_LL_INTR_CORE_PRTINT | USB_LL_INTR_CORE_DISCONNINT);
 }
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/usbh_ll.h b/tools/sdk/esp32c3/include/hal/include/hal/usbh_ll.h
index 63f7b8219d1..4320ead0a3b 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/usbh_ll.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/usbh_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -13,7 +13,6 @@ extern "C" {
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/usbh_struct.h"
-#include "soc/usb_wrap_struct.h"
 #include "hal/usb_types_private.h"
 #include "hal/misc.h"
 
@@ -153,25 +152,6 @@ typedef struct {
     uint8_t *buffer;
 } usbh_ll_dma_qtd_t;
 
-/* -----------------------------------------------------------------------------
------------------------------- USB Wrap Registers ------------------------------
------------------------------------------------------------------------------ */
-
-/**
- * @brief Configures the internal PHY to operate as HOST
- *
- * @param hw Start address of the USB Wrap registers
- */
-static inline void usbh_ll_internal_phy_conf(usb_wrap_dev_t *hw)
-{
-    //Enable internal PHY
-    hw->otg_conf.pad_enable = 1;
-    hw->otg_conf.phy_sel = 0;
-    //Set pulldowns on D+ and D-
-    hw->otg_conf.pad_pull_override = 1;
-    hw->otg_conf.dp_pulldown = 1;
-    hw->otg_conf.dm_pulldown = 1;
-}
 
 /* -----------------------------------------------------------------------------
 ------------------------------- Global Registers -------------------------------
@@ -431,7 +411,7 @@ static inline void usbh_ll_hcfg_set_fsls_pclk_sel(usbh_dev_t *hw)
 /**
  * @brief Sets some default values to HCFG to operate in Host mode with scatter/gather DMA
  *
- * @param hw Start address of the USB Wrap registers
+ * @param hw Start address of the DWC_OTG registers
  * @param speed Speed to initialize the host port at
  */
 static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
diff --git a/tools/sdk/esp32c3/include/idf_test/include/esp32/idf_performance_target.h b/tools/sdk/esp32c3/include/idf_test/include/esp32/idf_performance_target.h
index 5700d9f39ed..d6b64df99a7 100644
--- a/tools/sdk/esp32c3/include/idf_test/include/esp32/idf_performance_target.h
+++ b/tools/sdk/esp32c3/include/idf_test/include/esp32/idf_performance_target.h
@@ -33,88 +33,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            30
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     27
 
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-//Collect data and correct it later
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               35300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (697*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              (6780*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               11200
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      20100
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      35200
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     (754*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     (6650*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      45300
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 16200
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 33600
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                (484*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                (1512*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 49600
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-//Collect data and correct it later
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (261*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 (470*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (261*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  30900
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32c3/include/idf_test/include/esp32c3/idf_performance_target.h b/tools/sdk/esp32c3/include/idf_test/include/esp32c3/idf_performance_target.h
index c77e3efb1ec..7fbf8b9eaf5 100644
--- a/tools/sdk/esp32c3/include/idf_test/include/esp32c3/idf_performance_target.h
+++ b/tools/sdk/esp32c3/include/idf_test/include/esp32c3/idf_performance_target.h
@@ -29,85 +29,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
 
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-// rom options is much slower. use its 70%
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               42200
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-// legacy & suspend config are much faster. use the 70% of slower configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               (179*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (622*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              (6536*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               23700
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      46400
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-// legacy & suspend config are much faster. use the 70% of slower configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      (183*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     (605*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     (6676*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      22900
-#endif
-
-// No SPI1 tests for C3
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  43300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-// rom options is much slower. use its 70%
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  99500
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 (300*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (754*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  33900
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32c3/include/idf_test/include/esp32h2/idf_performance_target.h b/tools/sdk/esp32c3/include/idf_test/include/esp32h2/idf_performance_target.h
index af5738d1fcd..7fbf8b9eaf5 100644
--- a/tools/sdk/esp32c3/include/idf_test/include/esp32h2/idf_performance_target.h
+++ b/tools/sdk/esp32c3/include/idf_test/include/esp32h2/idf_performance_target.h
@@ -29,42 +29,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
 
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               53400
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (701*1000)
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      53600
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      44300
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 24400
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  64900
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (309*1000)
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (1697*1000)
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  76600
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32c3/include/idf_test/include/esp32s2/idf_performance_target.h b/tools/sdk/esp32c3/include/idf_test/include/esp32s2/idf_performance_target.h
index dc8a060f54b..cd037bb47d7 100644
--- a/tools/sdk/esp32c3/include/idf_test/include/esp32s2/idf_performance_target.h
+++ b/tools/sdk/esp32c3/include/idf_test/include/esp32s2/idf_performance_target.h
@@ -25,82 +25,3 @@
 
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
-
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-//Great variation, use the 70% of min value
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               33300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-// legacy config is much faster. use the 70% of slower configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               (239*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-// Weird data. Use 70% average of slower configs.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (546*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              (1191*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               19500
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-//release config is much faster than other configs. Use 70% average of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      46300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      (249*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     (851*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     (11480*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      40100
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 30500
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 (183*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                (474*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                (1283*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 44100
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  47800
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (252*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-// write with large RAM buffer tests has lower performance value than normal performance tests
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 (398*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (1204*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  22100
-#endif
diff --git a/tools/sdk/esp32c3/include/idf_test/include/esp32s3/idf_performance_target.h b/tools/sdk/esp32c3/include/idf_test/include/esp32s3/idf_performance_target.h
index b744cda8fa0..d735bb27023 100644
--- a/tools/sdk/esp32c3/include/idf_test/include/esp32s3/idf_performance_target.h
+++ b/tools/sdk/esp32c3/include/idf_test/include/esp32s3/idf_performance_target.h
@@ -24,82 +24,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
 
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- *
- * Currently all performance data on S3 are set to 0 for now. Update to a proper value later.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  0
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32c3/include/json_generator/upstream/json_generator.h b/tools/sdk/esp32c3/include/json_generator/upstream/json_generator.h
new file mode 100644
index 00000000000..e3aa92eeecf
--- /dev/null
+++ b/tools/sdk/esp32c3/include/json_generator/upstream/json_generator.h
@@ -0,0 +1,511 @@
+/*
+ *    Copyright 2020 Piyush Shah <shahpiyushv@gmail.com>
+ *
+ *   Licensed under the Apache License, Version 2.0 (the "License");
+ *   you may not use this file except in compliance with the License.
+ *   You may obtain a copy of the License at
+ *
+ *       http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *   Unless required by applicable law or agreed to in writing, software
+ *   distributed under the License is distributed on an "AS IS" BASIS,
+ *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *   See the License for the specific language governing permissions and
+ *   limitations under the License.
+ */
+
+/*
+ * JSON String Generator
+ *
+ * This module can be used to create JSON strings with a facility
+ * to flush out data if the destination buffer is full. All commas
+ * and colons as required are automatically added by the APIs
+ *
+ */
+#ifndef _JSON_GENERATOR_H
+#define _JSON_GENERATOR_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Float precision i.e. number of digits after decimal point */
+#ifndef JSON_FLOAT_PRECISION
+#define JSON_FLOAT_PRECISION 5
+#endif
+
+/** JSON string flush callback prototype
+ *
+ * This is a prototype of the function that needs to be passed to
+ * json_gen_str_start() and which will be invoked by the JSON generator
+ * module either when the buffer is full or json_gen_str_end() ins invoked.
+ *
+ * \param[in] buf Pointer to a NULL terminated JSON string
+ * \param[in] priv Private data to be passed to the flush callback. Will
+ * be the same as the one passed to json_gen_str_start()
+ */
+typedef void (*json_gen_flush_cb_t) (char *buf, void *priv);
+
+/** JSON String structure
+ *
+ * Please do not set/modify any elements.
+ * Just define this structure and pass a pointer to it in the APIs below
+ */
+typedef struct {
+    /** Pointer to the JSON buffer provided by the calling function */
+	char *buf;
+    /** Size of the above buffer */
+	int buf_size;
+    /** (Optional) callback function to invoke when the buffer gets full */
+	json_gen_flush_cb_t flush_cb;
+    /** (Optional) Private data to pass to the callback function */
+	void *priv;
+    /** (For Internal use only) */
+	bool comma_req;
+    /** (For Internal use only) */
+	char *free_ptr;
+    /** Total length */
+    int total_len;
+} json_gen_str_t;
+
+/** Start a JSON String
+ *
+ * This is the first function to be called for creating a JSON string.
+ * It initializes the internal data structures. After the JSON string
+ * generation is over, the json_gen_str_end() function should be called.
+ *
+ * \param[out] jstr Pointer to an allocated \ref json_gen_str_t structure.
+ * This will be initialised internally and needs to be passed to all
+ * subsequent function calls
+ * \param[out] buf Pointer to an allocated buffer into which the JSON
+ * string will be written
+ * \param[in] buf_size Size of the buffer
+ * \param[in] flush_cb Pointer to the flushing function of type \ref json_gen_flush_cb_t
+ * which will be invoked either when the buffer is full or when json_gen_str_end()
+ * is invoked. Can be left NULL.
+ * \param[in] priv Private data to be passed to the flushing function callback.
+ * Can be something like a session identifier (Eg. socket). Can be left NULL.
+ */
+void json_gen_str_start(json_gen_str_t *jstr, char *buf, int buf_size,
+		json_gen_flush_cb_t flush_cb, void *priv);
+
+/** End JSON string
+ *
+ * This should be the last function to be called after the entire JSON string
+ * has been generated.
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return Total length of the JSON created, including the NULL termination byte.
+ */
+int json_gen_str_end(json_gen_str_t *jstr);
+
+/** Start a JSON object
+ *
+ * This starts a JSON object by adding a '{'
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_start_object(json_gen_str_t *jstr);
+
+/** End a JSON object
+ *
+ * This ends a JSON object by adding a '}'
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_end_object(json_gen_str_t *jstr);
+
+/** Start a JSON array
+ *
+ * This starts a JSON object by adding a '['
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_start_array(json_gen_str_t *jstr);
+
+/** End a JSON object
+ *
+ * This ends a JSON object by adding a ']'
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_end_array(json_gen_str_t *jstr);
+
+/** Push a named JSON object
+ *
+ * This adds a JSON object like "name":{
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the object
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_push_object(json_gen_str_t *jstr, char *name);
+
+/** Pop a named JSON object
+ *
+ * This ends a JSON object by adding a '}'. This is basically same as
+ * json_gen_end_object() but included so as to complement json_gen_push_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_pop_object(json_gen_str_t *jstr);
+
+/** Push a JSON object string
+ *
+ * This adds a complete pre-formatted JSON object string to the JSON object.
+ *
+ * Eg. json_gen_push_object_str(jstr, "pre-formatted", "{\"a\":1,\"b\":2}");
+ * This will add "pre-formatted":{"a":1,"b":2}
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the JSON object string
+ * \param[in] object_str The pre-formatted JSON object string
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that.
+ */
+int json_gen_push_object_str(json_gen_str_t *jstr, char *name, char *object_str);
+
+/** Push a named JSON array
+ *
+ * This adds a JSON array like "name":[
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the array
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_push_array(json_gen_str_t *jstr, char *name);
+
+/** Pop a named JSON array
+ *
+ * This ends a JSON array by adding a ']'. This is basically same as
+ * json_gen_end_array() but included so as to complement json_gen_push_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_pop_array(json_gen_str_t *jstr);
+
+/** Push a JSON array string
+ *
+ * This adds a complete pre-formatted JSON array string to the JSON object.
+ *
+ * Eg. json_gen_push_object_str(jstr, "pre-formatted", "[1,2,3]");
+ * This will add "pre-formatted":[1,2,3]
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the JSON array string
+ * \param[in] array_str The pre-formatted JSON array string
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that.
+ */
+int json_gen_push_array_str(json_gen_str_t *jstr, char *name, char *array_str);
+
+/** Add a boolean element to an object
+ *
+ * This adds a boolean element to an object. Eg. "bool_val":true
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Boolean value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_bool(json_gen_str_t *jstr, char *name, bool val);
+
+/** Add an integer element to an object
+ *
+ * This adds an integer element to an object. Eg. "int_val":28
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Integer value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_int(json_gen_str_t *jstr, char *name, int val);
+
+/** Add a float element to an object
+ *
+ * This adds a float element to an object. Eg. "float_val":23.8
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Float value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_float(json_gen_str_t *jstr, char *name, float val);
+
+/** Add a string element to an object
+ *
+ * This adds a string element to an object. Eg. "string_val":"my_string"
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Null terminated string value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_string(json_gen_str_t *jstr, char *name, char *val);
+
+/** Add a NULL element to an object
+ *
+ * This adds a NULL element to an object. Eg. "null_val":null
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_null(json_gen_str_t *jstr, char *name);
+
+/** Add a boolean element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Boolean value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_bool(json_gen_str_t *jstr, bool val);
+
+/** Add an integer element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Integer value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_int(json_gen_str_t *jstr, int val);
+
+/** Add a float element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Float value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_float(json_gen_str_t *jstr, float val);
+
+/** Add a string element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Null terminated string value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_string(json_gen_str_t *jstr, char *val);
+
+/** Add a NULL element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_null(json_gen_str_t *jstr);
+
+/** Start a Long string in an object
+ *
+ * This starts a string in an object, but does not end it (i.e., does not add the
+ * terminating quotes. This is useful for long strings. Eg. "string_val":"my_string.
+ * The API json_gen_add_to_long_string() must be used to add to this string and the API
+ * json_gen_end_long_string() must be used to terminate it (i.e. add the ending quotes).
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Null terminated initial part of the string value. It can also be NULL
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_start_long_string(json_gen_str_t *jstr, char *name, char *val);
+
+/** Start a Long string in an array
+ *
+ * This starts a string in an arrayt, but does not end it (i.e., does not add the
+ * terminating quotes. This is useful for long strings.
+ * The API json_gen_add_to_long_string() must be used to add to this string and the API
+ * json_gen_end_long_string() must be used to terminate it (i.e. add the ending quotes).
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Null terminated initial part of the string value. It can also be NULL
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_start_long_string(json_gen_str_t *jstr, char *val);
+
+/** Add to a JSON Long string
+ *
+ * This extends the string initialised by json_gen_obj_start_long_string() or
+ * json_gen_arr_start_long_string(). After the entire string is created, it should be terminated
+ * with json_gen_end_long_string().
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by json_gen_str_start()
+ * \param[in] val Null terminated extending part of the string value.
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_add_to_long_string(json_gen_str_t *jstr, char *val);
+
+/** End a JSON Long string
+ *
+ * This ends the string initialised by json_gen_obj_start_long_string() or
+ * json_gen_arr_start_long_string() by adding the ending quotes.
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by json_gen_str_start()
+ *
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_end_long_string(json_gen_str_t *jstr);
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32c3/include/json_parser/upstream/include/json_parser.h b/tools/sdk/esp32c3/include/json_parser/upstream/include/json_parser.h
new file mode 100644
index 00000000000..3e982fe14eb
--- /dev/null
+++ b/tools/sdk/esp32c3/include/json_parser/upstream/include/json_parser.h
@@ -0,0 +1,76 @@
+/*
+ *    Copyright 2020 Piyush Shah <shahpiyushv@gmail.com>
+ *
+ *   Licensed under the Apache License, Version 2.0 (the "License");
+ *   you may not use this file except in compliance with the License.
+ *   You may obtain a copy of the License at
+ *
+ *       http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *   Unless required by applicable law or agreed to in writing, software
+ *   distributed under the License is distributed on an "AS IS" BASIS,
+ *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *   See the License for the specific language governing permissions and
+ *   limitations under the License.
+ */
+#ifndef _JSON_PARSER_H_
+#define _JSON_PARSER_H_
+
+#define JSMN_HEADER
+#include <jsmn/jsmn.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define OS_SUCCESS  0
+#define OS_FAIL     -1
+
+typedef jsmn_parser json_parser_t;
+typedef jsmntok_t json_tok_t;
+
+typedef struct {
+	json_parser_t parser;
+	char *js;
+	json_tok_t *tokens;
+	json_tok_t *cur;
+	int num_tokens;
+} jparse_ctx_t;
+
+int json_parse_start(jparse_ctx_t *jctx, char *js, int len);
+int json_parse_end(jparse_ctx_t *jctx);
+
+int json_obj_get_array(jparse_ctx_t *jctx, char *name, int *num_elem);
+int json_obj_leave_array(jparse_ctx_t *jctx);
+int json_obj_get_object(jparse_ctx_t *jctx, char *name);
+int json_obj_leave_object(jparse_ctx_t *jctx);
+int json_obj_get_bool(jparse_ctx_t *jctx, char *name, bool *val);
+int json_obj_get_int(jparse_ctx_t *jctx, char *name, int *val);
+int json_obj_get_int64(jparse_ctx_t *jctx, char *name, int64_t *val);
+int json_obj_get_float(jparse_ctx_t *jctx, char *name, float *val);
+int json_obj_get_string(jparse_ctx_t *jctx, char *name, char *val, int size);
+int json_obj_get_strlen(jparse_ctx_t *jctx, char *name, int *strlen);
+int json_obj_get_object_str(jparse_ctx_t *jctx, char *name, char *val, int size);
+int json_obj_get_object_strlen(jparse_ctx_t *jctx, char *name, int *strlen);
+int json_obj_get_array_str(jparse_ctx_t *jctx, char *name, char *val, int size);
+int json_obj_get_array_strlen(jparse_ctx_t *jctx, char *name, int *strlen);
+
+int json_arr_get_array(jparse_ctx_t *jctx, uint32_t index);
+int json_arr_leave_array(jparse_ctx_t *jctx);
+int json_arr_get_object(jparse_ctx_t *jctx, uint32_t index);
+int json_arr_leave_object(jparse_ctx_t *jctx);
+int json_arr_get_bool(jparse_ctx_t *jctx, uint32_t index, bool *val);
+int json_arr_get_int(jparse_ctx_t *jctx, uint32_t index, int *val);
+int json_arr_get_int64(jparse_ctx_t *jctx, uint32_t index, int64_t *val);
+int json_arr_get_float(jparse_ctx_t *jctx, uint32_t index, float *val);
+int json_arr_get_string(jparse_ctx_t *jctx, uint32_t index, char *val, int size);
+int json_arr_get_strlen(jparse_ctx_t *jctx, uint32_t index, int *strlen);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _JSON_PARSER_H_ */
diff --git a/tools/sdk/esp32c3/include/json_parser/upstream/jsmn/jsmn.h b/tools/sdk/esp32c3/include/json_parser/upstream/jsmn/jsmn.h
new file mode 100644
index 00000000000..3178dcc977f
--- /dev/null
+++ b/tools/sdk/esp32c3/include/json_parser/upstream/jsmn/jsmn.h
@@ -0,0 +1,471 @@
+/*
+ * MIT License
+ *
+ * Copyright (c) 2010 Serge Zaitsev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef JSMN_H
+#define JSMN_H
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef JSMN_STATIC
+#define JSMN_API static
+#else
+#define JSMN_API extern
+#endif
+
+/**
+ * JSON type identifier. Basic types are:
+ * 	o Object
+ * 	o Array
+ * 	o String
+ * 	o Other primitive: number, boolean (true/false) or null
+ */
+typedef enum {
+  JSMN_UNDEFINED = 0,
+  JSMN_OBJECT = 1,
+  JSMN_ARRAY = 2,
+  JSMN_STRING = 3,
+  JSMN_PRIMITIVE = 4
+} jsmntype_t;
+
+enum jsmnerr {
+  /* Not enough tokens were provided */
+  JSMN_ERROR_NOMEM = -1,
+  /* Invalid character inside JSON string */
+  JSMN_ERROR_INVAL = -2,
+  /* The string is not a full JSON packet, more bytes expected */
+  JSMN_ERROR_PART = -3
+};
+
+/**
+ * JSON token description.
+ * type		type (object, array, string etc.)
+ * start	start position in JSON data string
+ * end		end position in JSON data string
+ */
+typedef struct jsmntok {
+  jsmntype_t type;
+  int start;
+  int end;
+  int size;
+#ifdef JSMN_PARENT_LINKS
+  int parent;
+#endif
+} jsmntok_t;
+
+/**
+ * JSON parser. Contains an array of token blocks available. Also stores
+ * the string being parsed now and current position in that string.
+ */
+typedef struct jsmn_parser {
+  unsigned int pos;     /* offset in the JSON string */
+  unsigned int toknext; /* next token to allocate */
+  int toksuper;         /* superior token node, e.g. parent object or array */
+} jsmn_parser;
+
+/**
+ * Create JSON parser over an array of tokens
+ */
+JSMN_API void jsmn_init(jsmn_parser *parser);
+
+/**
+ * Run JSON parser. It parses a JSON data string into and array of tokens, each
+ * describing
+ * a single JSON object.
+ */
+JSMN_API int jsmn_parse(jsmn_parser *parser, const char *js, const size_t len,
+                        jsmntok_t *tokens, const unsigned int num_tokens);
+
+#ifndef JSMN_HEADER
+/**
+ * Allocates a fresh unused token from the token pool.
+ */
+static jsmntok_t *jsmn_alloc_token(jsmn_parser *parser, jsmntok_t *tokens,
+                                   const size_t num_tokens) {
+  jsmntok_t *tok;
+  if (parser->toknext >= num_tokens) {
+    return NULL;
+  }
+  tok = &tokens[parser->toknext++];
+  tok->start = tok->end = -1;
+  tok->size = 0;
+#ifdef JSMN_PARENT_LINKS
+  tok->parent = -1;
+#endif
+  return tok;
+}
+
+/**
+ * Fills token type and boundaries.
+ */
+static void jsmn_fill_token(jsmntok_t *token, const jsmntype_t type,
+                            const int start, const int end) {
+  token->type = type;
+  token->start = start;
+  token->end = end;
+  token->size = 0;
+}
+
+/**
+ * Fills next available token with JSON primitive.
+ */
+static int jsmn_parse_primitive(jsmn_parser *parser, const char *js,
+                                const size_t len, jsmntok_t *tokens,
+                                const size_t num_tokens) {
+  jsmntok_t *token;
+  int start;
+
+  start = parser->pos;
+
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    switch (js[parser->pos]) {
+#ifndef JSMN_STRICT
+    /* In strict mode primitive must be followed by "," or "}" or "]" */
+    case ':':
+#endif
+    case '\t':
+    case '\r':
+    case '\n':
+    case ' ':
+    case ',':
+    case ']':
+    case '}':
+      goto found;
+    default:
+                   /* to quiet a warning from gcc*/
+      break;
+    }
+    if (js[parser->pos] < 32 || js[parser->pos] >= 127) {
+      parser->pos = start;
+      return JSMN_ERROR_INVAL;
+    }
+  }
+#ifdef JSMN_STRICT
+  /* In strict mode primitive must be followed by a comma/object/array */
+  parser->pos = start;
+  return JSMN_ERROR_PART;
+#endif
+
+found:
+  if (tokens == NULL) {
+    parser->pos--;
+    return 0;
+  }
+  token = jsmn_alloc_token(parser, tokens, num_tokens);
+  if (token == NULL) {
+    parser->pos = start;
+    return JSMN_ERROR_NOMEM;
+  }
+  jsmn_fill_token(token, JSMN_PRIMITIVE, start, parser->pos);
+#ifdef JSMN_PARENT_LINKS
+  token->parent = parser->toksuper;
+#endif
+  parser->pos--;
+  return 0;
+}
+
+/**
+ * Fills next token with JSON string.
+ */
+static int jsmn_parse_string(jsmn_parser *parser, const char *js,
+                             const size_t len, jsmntok_t *tokens,
+                             const size_t num_tokens) {
+  jsmntok_t *token;
+
+  int start = parser->pos;
+
+  parser->pos++;
+
+  /* Skip starting quote */
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    char c = js[parser->pos];
+
+    /* Quote: end of string */
+    if (c == '\"') {
+      if (tokens == NULL) {
+        return 0;
+      }
+      token = jsmn_alloc_token(parser, tokens, num_tokens);
+      if (token == NULL) {
+        parser->pos = start;
+        return JSMN_ERROR_NOMEM;
+      }
+      jsmn_fill_token(token, JSMN_STRING, start + 1, parser->pos);
+#ifdef JSMN_PARENT_LINKS
+      token->parent = parser->toksuper;
+#endif
+      return 0;
+    }
+
+    /* Backslash: Quoted symbol expected */
+    if (c == '\\' && parser->pos + 1 < len) {
+      int i;
+      parser->pos++;
+      switch (js[parser->pos]) {
+      /* Allowed escaped symbols */
+      case '\"':
+      case '/':
+      case '\\':
+      case 'b':
+      case 'f':
+      case 'r':
+      case 'n':
+      case 't':
+        break;
+      /* Allows escaped symbol \uXXXX */
+      case 'u':
+        parser->pos++;
+        for (i = 0; i < 4 && parser->pos < len && js[parser->pos] != '\0';
+             i++) {
+          /* If it isn't a hex character we have an error */
+          if (!((js[parser->pos] >= 48 && js[parser->pos] <= 57) ||   /* 0-9 */
+                (js[parser->pos] >= 65 && js[parser->pos] <= 70) ||   /* A-F */
+                (js[parser->pos] >= 97 && js[parser->pos] <= 102))) { /* a-f */
+            parser->pos = start;
+            return JSMN_ERROR_INVAL;
+          }
+          parser->pos++;
+        }
+        parser->pos--;
+        break;
+      /* Unexpected symbol */
+      default:
+        parser->pos = start;
+        return JSMN_ERROR_INVAL;
+      }
+    }
+  }
+  parser->pos = start;
+  return JSMN_ERROR_PART;
+}
+
+/**
+ * Parse JSON string and fill tokens.
+ */
+JSMN_API int jsmn_parse(jsmn_parser *parser, const char *js, const size_t len,
+                        jsmntok_t *tokens, const unsigned int num_tokens) {
+  int r;
+  int i;
+  jsmntok_t *token;
+  int count = parser->toknext;
+
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    char c;
+    jsmntype_t type;
+
+    c = js[parser->pos];
+    switch (c) {
+    case '{':
+    case '[':
+      count++;
+      if (tokens == NULL) {
+        break;
+      }
+      token = jsmn_alloc_token(parser, tokens, num_tokens);
+      if (token == NULL) {
+        return JSMN_ERROR_NOMEM;
+      }
+      if (parser->toksuper != -1) {
+        jsmntok_t *t = &tokens[parser->toksuper];
+#ifdef JSMN_STRICT
+        /* In strict mode an object or array can't become a key */
+        if (t->type == JSMN_OBJECT) {
+          return JSMN_ERROR_INVAL;
+        }
+#endif
+        t->size++;
+#ifdef JSMN_PARENT_LINKS
+        token->parent = parser->toksuper;
+#endif
+      }
+      token->type = (c == '{' ? JSMN_OBJECT : JSMN_ARRAY);
+      token->start = parser->pos;
+      parser->toksuper = parser->toknext - 1;
+      break;
+    case '}':
+    case ']':
+      if (tokens == NULL) {
+        break;
+      }
+      type = (c == '}' ? JSMN_OBJECT : JSMN_ARRAY);
+#ifdef JSMN_PARENT_LINKS
+      if (parser->toknext < 1) {
+        return JSMN_ERROR_INVAL;
+      }
+      token = &tokens[parser->toknext - 1];
+      for (;;) {
+        if (token->start != -1 && token->end == -1) {
+          if (token->type != type) {
+            return JSMN_ERROR_INVAL;
+          }
+          token->end = parser->pos + 1;
+          parser->toksuper = token->parent;
+          break;
+        }
+        if (token->parent == -1) {
+          if (token->type != type || parser->toksuper == -1) {
+            return JSMN_ERROR_INVAL;
+          }
+          break;
+        }
+        token = &tokens[token->parent];
+      }
+#else
+      for (i = parser->toknext - 1; i >= 0; i--) {
+        token = &tokens[i];
+        if (token->start != -1 && token->end == -1) {
+          if (token->type != type) {
+            return JSMN_ERROR_INVAL;
+          }
+          parser->toksuper = -1;
+          token->end = parser->pos + 1;
+          break;
+        }
+      }
+      /* Error if unmatched closing bracket */
+      if (i == -1) {
+        return JSMN_ERROR_INVAL;
+      }
+      for (; i >= 0; i--) {
+        token = &tokens[i];
+        if (token->start != -1 && token->end == -1) {
+          parser->toksuper = i;
+          break;
+        }
+      }
+#endif
+      break;
+    case '\"':
+      r = jsmn_parse_string(parser, js, len, tokens, num_tokens);
+      if (r < 0) {
+        return r;
+      }
+      count++;
+      if (parser->toksuper != -1 && tokens != NULL) {
+        tokens[parser->toksuper].size++;
+      }
+      break;
+    case '\t':
+    case '\r':
+    case '\n':
+    case ' ':
+      break;
+    case ':':
+      parser->toksuper = parser->toknext - 1;
+      break;
+    case ',':
+      if (tokens != NULL && parser->toksuper != -1 &&
+          tokens[parser->toksuper].type != JSMN_ARRAY &&
+          tokens[parser->toksuper].type != JSMN_OBJECT) {
+#ifdef JSMN_PARENT_LINKS
+        parser->toksuper = tokens[parser->toksuper].parent;
+#else
+        for (i = parser->toknext - 1; i >= 0; i--) {
+          if (tokens[i].type == JSMN_ARRAY || tokens[i].type == JSMN_OBJECT) {
+            if (tokens[i].start != -1 && tokens[i].end == -1) {
+              parser->toksuper = i;
+              break;
+            }
+          }
+        }
+#endif
+      }
+      break;
+#ifdef JSMN_STRICT
+    /* In strict mode primitives are: numbers and booleans */
+    case '-':
+    case '0':
+    case '1':
+    case '2':
+    case '3':
+    case '4':
+    case '5':
+    case '6':
+    case '7':
+    case '8':
+    case '9':
+    case 't':
+    case 'f':
+    case 'n':
+      /* And they must not be keys of the object */
+      if (tokens != NULL && parser->toksuper != -1) {
+        const jsmntok_t *t = &tokens[parser->toksuper];
+        if (t->type == JSMN_OBJECT ||
+            (t->type == JSMN_STRING && t->size != 0)) {
+          return JSMN_ERROR_INVAL;
+        }
+      }
+#else
+    /* In non-strict mode every unquoted value is a primitive */
+    default:
+#endif
+      r = jsmn_parse_primitive(parser, js, len, tokens, num_tokens);
+      if (r < 0) {
+        return r;
+      }
+      count++;
+      if (parser->toksuper != -1 && tokens != NULL) {
+        tokens[parser->toksuper].size++;
+      }
+      break;
+
+#ifdef JSMN_STRICT
+    /* Unexpected char in strict mode */
+    default:
+      return JSMN_ERROR_INVAL;
+#endif
+    }
+  }
+
+  if (tokens != NULL) {
+    for (i = parser->toknext - 1; i >= 0; i--) {
+      /* Unmatched opened object or array */
+      if (tokens[i].start != -1 && tokens[i].end == -1) {
+        return JSMN_ERROR_PART;
+      }
+    }
+  }
+
+  return count;
+}
+
+/**
+ * Creates a new parser based over a given buffer with an array of tokens
+ * available.
+ */
+JSMN_API void jsmn_init(jsmn_parser *parser) {
+  parser->pos = 0;
+  parser->toknext = 0;
+  parser->toksuper = -1;
+}
+
+#endif /* JSMN_HEADER */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* JSMN_H */
diff --git a/tools/sdk/esp32c3/include/json_parser/upstream/jsmn/test/test.h b/tools/sdk/esp32c3/include/json_parser/upstream/jsmn/test/test.h
new file mode 100644
index 00000000000..a1c0957a74a
--- /dev/null
+++ b/tools/sdk/esp32c3/include/json_parser/upstream/jsmn/test/test.h
@@ -0,0 +1,31 @@
+#ifndef __TEST_H__
+#define __TEST_H__
+
+static int test_passed = 0;
+static int test_failed = 0;
+
+/* Terminate current test with error */
+#define fail() return __LINE__
+
+/* Successful end of the test case */
+#define done() return 0
+
+/* Check single condition */
+#define check(cond)                                                            \
+  do {                                                                         \
+    if (!(cond))                                                               \
+      fail();                                                                  \
+  } while (0)
+
+/* Test runner */
+static void test(int (*func)(void), const char *name) {
+  int r = func();
+  if (r == 0) {
+    test_passed++;
+  } else {
+    test_failed++;
+    printf("FAILED: %s (at line %d)\n", name, r);
+  }
+}
+
+#endif /* __TEST_H__ */
diff --git a/tools/sdk/esp32c3/include/json_parser/upstream/jsmn/test/testutil.h b/tools/sdk/esp32c3/include/json_parser/upstream/jsmn/test/testutil.h
new file mode 100644
index 00000000000..bdee13934b1
--- /dev/null
+++ b/tools/sdk/esp32c3/include/json_parser/upstream/jsmn/test/testutil.h
@@ -0,0 +1,96 @@
+#ifndef __TEST_UTIL_H__
+#define __TEST_UTIL_H__
+
+#include "../jsmn.h"
+
+static int vtokeq(const char *s, jsmntok_t *t, unsigned long numtok,
+                  va_list ap) {
+  if (numtok > 0) {
+    unsigned long i;
+    int start, end, size;
+    jsmntype_t type;
+    char *value;
+
+    size = -1;
+    value = NULL;
+    for (i = 0; i < numtok; i++) {
+      type = va_arg(ap, jsmntype_t);
+      if (type == JSMN_STRING) {
+        value = va_arg(ap, char *);
+        size = va_arg(ap, int);
+        start = end = -1;
+      } else if (type == JSMN_PRIMITIVE) {
+        value = va_arg(ap, char *);
+        start = end = size = -1;
+      } else {
+        start = va_arg(ap, int);
+        end = va_arg(ap, int);
+        size = va_arg(ap, int);
+        value = NULL;
+      }
+      if (t[i].type != type) {
+        printf("token %lu type is %d, not %d\n", i, t[i].type, type);
+        return 0;
+      }
+      if (start != -1 && end != -1) {
+        if (t[i].start != start) {
+          printf("token %lu start is %d, not %d\n", i, t[i].start, start);
+          return 0;
+        }
+        if (t[i].end != end) {
+          printf("token %lu end is %d, not %d\n", i, t[i].end, end);
+          return 0;
+        }
+      }
+      if (size != -1 && t[i].size != size) {
+        printf("token %lu size is %d, not %d\n", i, t[i].size, size);
+        return 0;
+      }
+
+      if (s != NULL && value != NULL) {
+        const char *p = s + t[i].start;
+        if (strlen(value) != (unsigned long)(t[i].end - t[i].start) ||
+            strncmp(p, value, t[i].end - t[i].start) != 0) {
+          printf("token %lu value is %.*s, not %s\n", i, t[i].end - t[i].start,
+                 s + t[i].start, value);
+          return 0;
+        }
+      }
+    }
+  }
+  return 1;
+}
+
+static int tokeq(const char *s, jsmntok_t *tokens, unsigned long numtok, ...) {
+  int ok;
+  va_list args;
+  va_start(args, numtok);
+  ok = vtokeq(s, tokens, numtok, args);
+  va_end(args);
+  return ok;
+}
+
+static int parse(const char *s, int status, unsigned long numtok, ...) {
+  int r;
+  int ok = 1;
+  va_list args;
+  jsmn_parser p;
+  jsmntok_t *t = malloc(numtok * sizeof(jsmntok_t));
+
+  jsmn_init(&p);
+  r = jsmn_parse(&p, s, strlen(s), t, numtok);
+  if (r != status) {
+    printf("status is %d, not %d\n", r, status);
+    return 0;
+  }
+
+  if (status >= 0) {
+    va_start(args, numtok);
+    ok = vtokeq(s, t, numtok, args);
+    va_end(args);
+  }
+  free(t);
+  return ok;
+}
+
+#endif /* __TEST_UTIL_H__ */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aes.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aes.h
index 4468b6623ac..e280dbb1c66 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aes.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aes.h
@@ -22,13 +22,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -41,37 +35,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_AES_H
 #define MBEDTLS_AES_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
+#include "mbedtls/platform_util.h"
 
 #include <stddef.h>
 #include <stdint.h>
@@ -81,17 +55,22 @@
 #define MBEDTLS_AES_DECRYPT     0 /**< AES decryption. */
 
 /* Error codes in range 0x0020-0x0022 */
-#define MBEDTLS_ERR_AES_INVALID_KEY_LENGTH                -0x0020  /**< Invalid key length. */
-#define MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH              -0x0022  /**< Invalid data input length. */
+/** Invalid key length. */
+#define MBEDTLS_ERR_AES_INVALID_KEY_LENGTH                -0x0020
+/** Invalid data input length. */
+#define MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH              -0x0022
 
 /* Error codes in range 0x0021-0x0025 */
-#define MBEDTLS_ERR_AES_BAD_INPUT_DATA                    -0x0021  /**< Invalid input data. */
+/** Invalid input data. */
+#define MBEDTLS_ERR_AES_BAD_INPUT_DATA                    -0x0021
 
 /* MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE is deprecated and should not be used. */
-#define MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE               -0x0023  /**< Feature not available. For example, an unsupported AES key size. */
+/** Feature not available. For example, an unsupported AES key size. */
+#define MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE               -0x0023
 
 /* MBEDTLS_ERR_AES_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_AES_HW_ACCEL_FAILED                   -0x0025  /**< AES hardware accelerator failed. */
+/** AES hardware accelerator failed. */
+#define MBEDTLS_ERR_AES_HW_ACCEL_FAILED                   -0x0025
 
 #if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
     !defined(inline) && !defined(__cplusplus)
@@ -196,6 +175,7 @@ void mbedtls_aes_xts_free( mbedtls_aes_xts_context *ctx );
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key,
                     unsigned int keybits );
 
@@ -214,6 +194,7 @@ int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key,
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key,
                     unsigned int keybits );
 
@@ -234,6 +215,7 @@ int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key,
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_xts_setkey_enc( mbedtls_aes_xts_context *ctx,
                                 const unsigned char *key,
                                 unsigned int keybits );
@@ -254,6 +236,7 @@ int mbedtls_aes_xts_setkey_enc( mbedtls_aes_xts_context *ctx,
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_xts_setkey_dec( mbedtls_aes_xts_context *ctx,
                                 const unsigned char *key,
                                 unsigned int keybits );
@@ -282,6 +265,7 @@ int mbedtls_aes_xts_setkey_dec( mbedtls_aes_xts_context *ctx,
 
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx,
                     int mode,
                     const unsigned char input[16],
@@ -329,6 +313,7 @@ int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx,
  * \return         #MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH
  *                 on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
                     int mode,
                     size_t length,
@@ -373,6 +358,7 @@ int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
  *                     smaller than an AES block in size (16 Bytes) or if \p
  *                     length is larger than 2^20 blocks (16 MiB).
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx,
                            int mode,
                            size_t length,
@@ -421,6 +407,7 @@ int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx,
  *
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx,
                        int mode,
                        size_t length,
@@ -465,6 +452,7 @@ int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx,
  *
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx,
                     int mode,
                     size_t length,
@@ -519,6 +507,7 @@ int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx,
  *
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx,
                        size_t length,
                        size_t *iv_off,
@@ -533,10 +522,6 @@ int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx,
  * \brief      This function performs an AES-CTR encryption or decryption
  *             operation.
  *
- *             This function performs the operation defined in the \p mode
- *             parameter (encrypt/decrypt), on the input data buffer
- *             defined in the \p input parameter.
- *
  *             Due to the nature of CTR, you must use the same key schedule
  *             for both encryption and decryption operations. Therefore, you
  *             must use the context initialized with mbedtls_aes_setkey_enc()
@@ -605,6 +590,7 @@ int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx,
  *
  * \return                 \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx,
                        size_t length,
                        size_t *nc_off,
@@ -625,6 +611,7 @@ int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx,
  *
  * \return          \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx,
                                   const unsigned char input[16],
                                   unsigned char output[16] );
@@ -640,6 +627,7 @@ int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx,
  *
  * \return          \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_internal_aes_decrypt( mbedtls_aes_context *ctx,
                                   const unsigned char input[16],
                                   unsigned char output[16] );
@@ -689,6 +677,7 @@ MBEDTLS_DEPRECATED void mbedtls_aes_decrypt( mbedtls_aes_context *ctx,
  * \return         \c 0 on success.
  * \return         \c 1 on failure.
  */
+MBEDTLS_CHECK_RETURN_CRITICAL
 int mbedtls_aes_self_test( int verbose );
 
 #endif /* MBEDTLS_SELF_TEST */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aesni.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aesni.h
index 9b63a0010a0..c1d22f59af3 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aesni.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aesni.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,38 +21,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_AESNI_H
 #define MBEDTLS_AESNI_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "aes.h"
+#include "mbedtls/aes.h"
 
 #define MBEDTLS_AESNI_AES      0x02000000u
 #define MBEDTLS_AESNI_CLMUL    0x00000002u
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/arc4.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/arc4.h
index 6334a9cc1e2..f4b0f9f3508 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/arc4.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/arc4.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,33 +22,12 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_ARC4_H
 #define MBEDTLS_ARC4_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -62,7 +35,8 @@
 #include <stddef.h>
 
 /* MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED                  -0x0019  /**< ARC4 hardware accelerator failed. */
+/** ARC4 hardware accelerator failed. */
+#define MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED                  -0x0019
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aria.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aria.h
index 20f43f2256d..226e2dbf3c8 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aria.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aria.h
@@ -11,13 +11,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -30,34 +24,13 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ARIA_H
 #define MBEDTLS_ARIA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -65,7 +38,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #define MBEDTLS_ARIA_ENCRYPT     1 /**< ARIA encryption. */
 #define MBEDTLS_ARIA_DECRYPT     0 /**< ARIA decryption. */
@@ -77,16 +50,20 @@
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
 #define MBEDTLS_ERR_ARIA_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x005C )
 #endif /* !MBEDTLS_DEPRECATED_REMOVED */
-#define MBEDTLS_ERR_ARIA_BAD_INPUT_DATA -0x005C /**< Bad input data. */
+/** Bad input data. */
+#define MBEDTLS_ERR_ARIA_BAD_INPUT_DATA -0x005C
 
-#define MBEDTLS_ERR_ARIA_INVALID_INPUT_LENGTH -0x005E /**< Invalid data input length. */
+/** Invalid data input length. */
+#define MBEDTLS_ERR_ARIA_INVALID_INPUT_LENGTH -0x005E
 
 /* MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE  -0x005A  /**< Feature not available. For example, an unsupported ARIA key size. */
+/** Feature not available. For example, an unsupported ARIA key size. */
+#define MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE  -0x005A
 
 /* MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED      -0x0058  /**< ARIA hardware accelerator failed. */
+/** ARIA hardware accelerator failed. */
+#define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED      -0x0058
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/asn1.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/asn1.h
index 0e596bca2cd..10f7905b7e6 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/asn1.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/asn1.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ASN1_H
 #define MBEDTLS_ASN1_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,7 +31,7 @@
 #include <stddef.h>
 
 #if defined(MBEDTLS_BIGNUM_C)
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 #endif
 
 /**
@@ -73,13 +46,20 @@
  * ASN1 is a standard to specify data structures.
  * \{
  */
-#define MBEDTLS_ERR_ASN1_OUT_OF_DATA                      -0x0060  /**< Out of data when parsing an ASN1 data structure. */
-#define MBEDTLS_ERR_ASN1_UNEXPECTED_TAG                   -0x0062  /**< ASN1 tag was of an unexpected value. */
-#define MBEDTLS_ERR_ASN1_INVALID_LENGTH                   -0x0064  /**< Error when trying to determine the length or invalid length. */
-#define MBEDTLS_ERR_ASN1_LENGTH_MISMATCH                  -0x0066  /**< Actual length differs from expected length. */
-#define MBEDTLS_ERR_ASN1_INVALID_DATA                     -0x0068  /**< Data is invalid. (not used) */
-#define MBEDTLS_ERR_ASN1_ALLOC_FAILED                     -0x006A  /**< Memory allocation failed */
-#define MBEDTLS_ERR_ASN1_BUF_TOO_SMALL                    -0x006C  /**< Buffer too small when writing ASN.1 data structure. */
+/** Out of data when parsing an ASN1 data structure. */
+#define MBEDTLS_ERR_ASN1_OUT_OF_DATA                      -0x0060
+/** ASN1 tag was of an unexpected value. */
+#define MBEDTLS_ERR_ASN1_UNEXPECTED_TAG                   -0x0062
+/** Error when trying to determine the length or invalid length. */
+#define MBEDTLS_ERR_ASN1_INVALID_LENGTH                   -0x0064
+/** Actual length differs from expected length. */
+#define MBEDTLS_ERR_ASN1_LENGTH_MISMATCH                  -0x0066
+/** Data is invalid. */
+#define MBEDTLS_ERR_ASN1_INVALID_DATA                     -0x0068
+/** Memory allocation failed */
+#define MBEDTLS_ERR_ASN1_ALLOC_FAILED                     -0x006A
+/** Buffer too small when writing ASN.1 data structure. */
+#define MBEDTLS_ERR_ASN1_BUF_TOO_SMALL                    -0x006C
 
 /* \} name */
 
@@ -100,6 +80,7 @@
 #define MBEDTLS_ASN1_OCTET_STRING            0x04
 #define MBEDTLS_ASN1_NULL                    0x05
 #define MBEDTLS_ASN1_OID                     0x06
+#define MBEDTLS_ASN1_ENUMERATED              0x0A
 #define MBEDTLS_ASN1_UTF8_STRING             0x0C
 #define MBEDTLS_ASN1_SEQUENCE                0x10
 #define MBEDTLS_ASN1_SET                     0x11
@@ -114,6 +95,18 @@
 #define MBEDTLS_ASN1_CONSTRUCTED             0x20
 #define MBEDTLS_ASN1_CONTEXT_SPECIFIC        0x80
 
+/* Slightly smaller way to check if tag is a string tag
+ * compared to canonical implementation. */
+#define MBEDTLS_ASN1_IS_STRING_TAG( tag )                                     \
+    ( ( tag ) < 32u && (                                                      \
+        ( ( 1u << ( tag ) ) & ( ( 1u << MBEDTLS_ASN1_BMP_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_UTF8_STRING )      |     \
+                                ( 1u << MBEDTLS_ASN1_T61_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_IA5_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_UNIVERSAL_STRING ) |     \
+                                ( 1u << MBEDTLS_ASN1_PRINTABLE_STRING ) |     \
+                                ( 1u << MBEDTLS_ASN1_BIT_STRING ) ) ) != 0 ) )
+
 /*
  * Bit masks for each of the components of an ASN.1 tag as specified in
  * ITU X.690 (08/2015), section 8.1 "General rules for encoding",
@@ -144,6 +137,10 @@
         ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf)->len ) ||                \
           memcmp( (oid_str), (oid_buf)->p, (oid_buf)->len) != 0 )
 
+#define MBEDTLS_OID_CMP_RAW(oid_str, oid_buf, oid_buf_len)              \
+        ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf_len) ) ||             \
+          memcmp( (oid_str), (oid_buf), (oid_buf_len) ) != 0 )
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -201,119 +198,342 @@ mbedtls_asn1_named_data;
  * \brief       Get the length of an ASN.1 element.
  *              Updates the pointer to immediately behind the length.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param len   The variable that will receive the value
- *
- * \return      0 if successful, MBEDTLS_ERR_ASN1_OUT_OF_DATA on reaching
- *              end of data, MBEDTLS_ERR_ASN1_INVALID_LENGTH if length is
- *              unparseable.
+ * \param p     On entry, \c *p points to the first byte of the length,
+ *              i.e. immediately after the tag.
+ *              On successful completion, \c *p points to the first byte
+ *              after the length, i.e. the first byte of the content.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On successful completion, \c *len contains the length
+ *              read from the ASN.1 input.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_OUT_OF_DATA if the ASN.1 element
+ *              would end beyond \p end.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the length is unparseable.
  */
 int mbedtls_asn1_get_len( unsigned char **p,
-                  const unsigned char *end,
-                  size_t *len );
+                          const unsigned char *end,
+                          size_t *len );
 
 /**
- * \brief       Get the tag and length of the tag. Check for the requested tag.
+ * \brief       Get the tag and length of the element.
+ *              Check for the requested tag.
  *              Updates the pointer to immediately behind the tag and length.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param len   The variable that will receive the length
- * \param tag   The expected tag
- *
- * \return      0 if successful, MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if tag did
- *              not match requested tag, or another specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              after the length, i.e. the first byte of the content.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On successful completion, \c *len contains the length
+ *              read from the ASN.1 input.
+ * \param tag   The expected tag.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the data does not start
+ *              with the requested tag.
+ * \return      #MBEDTLS_ERR_ASN1_OUT_OF_DATA if the ASN.1 element
+ *              would end beyond \p end.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the length is unparseable.
  */
 int mbedtls_asn1_get_tag( unsigned char **p,
-                  const unsigned char *end,
-                  size_t *len, int tag );
+                          const unsigned char *end,
+                          size_t *len, int tag );
 
 /**
  * \brief       Retrieve a boolean ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param val   The variable that will receive the value
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value (\c 0 or \c 1).
  *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BOOLEAN.
  */
 int mbedtls_asn1_get_bool( unsigned char **p,
-                   const unsigned char *end,
-                   int *val );
+                           const unsigned char *end,
+                           int *val );
 
 /**
  * \brief       Retrieve an integer ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param val   The variable that will receive the value
- *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 INTEGER.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
  */
 int mbedtls_asn1_get_int( unsigned char **p,
-                  const unsigned char *end,
-                  int *val );
+                          const unsigned char *end,
+                          int *val );
 
 /**
- * \brief       Retrieve a bitstring ASN.1 tag and its value.
+ * \brief       Retrieve an enumerated ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param bs    The variable that will receive the value
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 ENUMERATED.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
+ */
+int mbedtls_asn1_get_enum( unsigned char **p,
+                           const unsigned char *end,
+                           int *val );
+
+/**
+ * \brief       Retrieve a bitstring ASN.1 tag and its value.
+ *              Updates the pointer to immediately behind the full tag.
  *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p is equal to \p end.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param bs    On success, ::mbedtls_asn1_bitstring information about
+ *              the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input contains
+ *              extra data after a valid BIT STRING.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BIT STRING.
  */
 int mbedtls_asn1_get_bitstring( unsigned char **p, const unsigned char *end,
-                        mbedtls_asn1_bitstring *bs);
+                                mbedtls_asn1_bitstring *bs );
 
 /**
  * \brief       Retrieve a bitstring ASN.1 tag without unused bits and its
  *              value.
  *              Updates the pointer to the beginning of the bit/octet string.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param len   Length of the actual bit/octect string in bytes
- *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              of the content of the BIT STRING.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On success, \c *len is the length of the content in bytes.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_DATA if the input starts with
+ *              a valid BIT STRING with a nonzero number of unused bits.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BIT STRING.
  */
-int mbedtls_asn1_get_bitstring_null( unsigned char **p, const unsigned char *end,
-                             size_t *len );
+int mbedtls_asn1_get_bitstring_null( unsigned char **p,
+                                     const unsigned char *end,
+                                     size_t *len );
 
 /**
- * \brief       Parses and splits an ASN.1 "SEQUENCE OF <tag>"
- *              Updated the pointer to immediately behind the full sequence tag.
- *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param cur   First variable in the chain to fill
- * \param tag   Type of sequence
- *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \brief       Parses and splits an ASN.1 "SEQUENCE OF <tag>".
+ *              Updates the pointer to immediately behind the full sequence tag.
+ *
+ * This function allocates memory for the sequence elements. You can free
+ * the allocated memory with mbedtls_asn1_sequence_free().
+ *
+ * \note        On error, this function may return a partial list in \p cur.
+ *              You must set `cur->next = NULL` before calling this function!
+ *              Otherwise it is impossible to distinguish a previously non-null
+ *              pointer from a pointer to an object allocated by this function.
+ *
+ * \note        If the sequence is empty, this function does not modify
+ *              \c *cur. If the sequence is valid and non-empty, this
+ *              function sets `cur->buf.tag` to \p tag. This allows
+ *              callers to distinguish between an empty sequence and
+ *              a one-element sequence.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p is equal to \p end.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param cur   A ::mbedtls_asn1_sequence which this function fills.
+ *              When this function returns, \c *cur is the head of a linked
+ *              list. Each node in this list is allocated with
+ *              mbedtls_calloc() apart from \p cur itself, and should
+ *              therefore be freed with mbedtls_free().
+ *              The list describes the content of the sequence.
+ *              The head of the list (i.e. \c *cur itself) describes the
+ *              first element, `*cur->next` describes the second element, etc.
+ *              For each element, `buf.tag == tag`, `buf.len` is the length
+ *              of the content of the content of the element, and `buf.p`
+ *              points to the first byte of the content (i.e. immediately
+ *              past the length of the element).
+ *              Note that list elements may be allocated even on error.
+ * \param tag   Each element of the sequence must have this tag.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input contains
+ *              extra data after a valid SEQUENCE OF \p tag.
+ * \return      #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the input starts with
+ *              an ASN.1 SEQUENCE in which an element has a tag that
+ *              is different from \p tag.
+ * \return      #MBEDTLS_ERR_ASN1_ALLOC_FAILED if a memory allocation failed.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 SEQUENCE.
  */
 int mbedtls_asn1_get_sequence_of( unsigned char **p,
-                          const unsigned char *end,
-                          mbedtls_asn1_sequence *cur,
-                          int tag);
+                                  const unsigned char *end,
+                                  mbedtls_asn1_sequence *cur,
+                                  int tag );
+/**
+ * \brief          Free a heap-allocated linked list presentation of
+ *                 an ASN.1 sequence, including the first element.
+ *
+ * There are two common ways to manage the memory used for the representation
+ * of a parsed ASN.1 sequence:
+ * - Allocate a head node `mbedtls_asn1_sequence *head` with mbedtls_calloc().
+ *   Pass this node as the `cur` argument to mbedtls_asn1_get_sequence_of().
+ *   When you have finished processing the sequence,
+ *   call mbedtls_asn1_sequence_free() on `head`.
+ * - Allocate a head node `mbedtls_asn1_sequence *head` in any manner,
+ *   for example on the stack. Make sure that `head->next == NULL`.
+ *   Pass `head` as the `cur` argument to mbedtls_asn1_get_sequence_of().
+ *   When you have finished processing the sequence,
+ *   call mbedtls_asn1_sequence_free() on `head->cur`,
+ *   then free `head` itself in the appropriate manner.
+ *
+ * \param seq      The address of the first sequence component. This may
+ *                 be \c NULL, in which case this functions returns
+ *                 immediately.
+ */
+void mbedtls_asn1_sequence_free( mbedtls_asn1_sequence *seq );
+
+/**
+ * \brief                Traverse an ASN.1 SEQUENCE container and
+ *                       call a callback for each entry.
+ *
+ * This function checks that the input is a SEQUENCE of elements that
+ * each have a "must" tag, and calls a callback function on the elements
+ * that have a "may" tag.
+ *
+ * For example, to validate that the input is a SEQUENCE of `tag1` and call
+ * `cb` on each element, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0xff, tag1, 0, 0, cb, ctx);
+ * ```
+ *
+ * To validate that the input is a SEQUENCE of ANY and call `cb` on
+ * each element, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0, 0, 0, 0, cb, ctx);
+ * ```
+ *
+ * To validate that the input is a SEQUENCE of CHOICE {NULL, OCTET STRING}
+ * and call `cb` on each element that is an OCTET STRING, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0xfe, 0x04, 0xff, 0x04, cb, ctx);
+ * ```
+ *
+ * The callback is called on the elements with a "may" tag from left to
+ * right. If the input is not a valid SEQUENCE of elements with a "must" tag,
+ * the callback is called on the elements up to the leftmost point where
+ * the input is invalid.
+ *
+ * \warning              This function is still experimental and may change
+ *                       at any time.
+ *
+ * \param p              The address of the pointer to the beginning of
+ *                       the ASN.1 SEQUENCE header. This is updated to
+ *                       point to the end of the ASN.1 SEQUENCE container
+ *                       on a successful invocation.
+ * \param end            The end of the ASN.1 SEQUENCE container.
+ * \param tag_must_mask  A mask to be applied to the ASN.1 tags found within
+ *                       the SEQUENCE before comparing to \p tag_must_value.
+ * \param tag_must_val   The required value of each ASN.1 tag found in the
+ *                       SEQUENCE, after masking with \p tag_must_mask.
+ *                       Mismatching tags lead to an error.
+ *                       For example, a value of \c 0 for both \p tag_must_mask
+ *                       and \p tag_must_val means that every tag is allowed,
+ *                       while a value of \c 0xFF for \p tag_must_mask means
+ *                       that \p tag_must_val is the only allowed tag.
+ * \param tag_may_mask   A mask to be applied to the ASN.1 tags found within
+ *                       the SEQUENCE before comparing to \p tag_may_value.
+ * \param tag_may_val    The desired value of each ASN.1 tag found in the
+ *                       SEQUENCE, after masking with \p tag_may_mask.
+ *                       Mismatching tags will be silently ignored.
+ *                       For example, a value of \c 0 for \p tag_may_mask and
+ *                       \p tag_may_val means that any tag will be considered,
+ *                       while a value of \c 0xFF for \p tag_may_mask means
+ *                       that all tags with value different from \p tag_may_val
+ *                       will be ignored.
+ * \param cb             The callback to trigger for each component
+ *                       in the ASN.1 SEQUENCE that matches \p tag_may_val.
+ *                       The callback function is called with the following
+ *                       parameters:
+ *                       - \p ctx.
+ *                       - The tag of the current element.
+ *                       - A pointer to the start of the current element's
+ *                         content inside the input.
+ *                       - The length of the content of the current element.
+ *                       If the callback returns a non-zero value,
+ *                       the function stops immediately,
+ *                       forwarding the callback's return value.
+ * \param ctx            The context to be passed to the callback \p cb.
+ *
+ * \return               \c 0 if successful the entire ASN.1 SEQUENCE
+ *                       was traversed without parsing or callback errors.
+ * \return               #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input
+ *                       contains extra data after a valid SEQUENCE
+ *                       of elements with an accepted tag.
+ * \return               #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the input starts
+ *                       with an ASN.1 SEQUENCE in which an element has a tag
+ *                       that is not accepted.
+ * \return               An ASN.1 error code if the input does not start with
+ *                       a valid ASN.1 SEQUENCE.
+ * \return               A non-zero error code forwarded from the callback
+ *                       \p cb in case the latter returns a non-zero value.
+ */
+int mbedtls_asn1_traverse_sequence_of(
+    unsigned char **p,
+    const unsigned char *end,
+    unsigned char tag_must_mask, unsigned char tag_must_val,
+    unsigned char tag_may_mask, unsigned char tag_may_val,
+    int (*cb)( void *ctx, int tag,
+               unsigned char* start, size_t len ),
+    void *ctx );
 
 #if defined(MBEDTLS_BIGNUM_C)
 /**
- * \brief       Retrieve a MPI value from an integer ASN.1 tag.
+ * \brief       Retrieve an integer ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param X     The MPI that will receive the value
- *
- * \return      0 if successful or a specific ASN.1 or MPI error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param X     On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 INTEGER.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
+ * \return      An MPI error code if the parsed value is too large.
  */
 int mbedtls_asn1_get_mpi( unsigned char **p,
-                  const unsigned char *end,
-                  mbedtls_mpi *X );
+                          const unsigned char *end,
+                          mbedtls_mpi *X );
 #endif /* MBEDTLS_BIGNUM_C */
 
 /**
@@ -321,10 +541,14 @@ int mbedtls_asn1_get_mpi( unsigned char **p,
  *              Updates the pointer to immediately behind the full
  *              AlgorithmIdentifier.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param alg   The buffer to receive the OID
- * \param params The buffer to receive the params (if any)
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the AlgorithmIdentifier element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param alg   The buffer to receive the OID.
+ * \param params The buffer to receive the parameters.
+ *              This is zeroized if there are no parameters.
  *
  * \return      0 if successful or a specific ASN.1 or MPI error code.
  */
@@ -338,9 +562,12 @@ int mbedtls_asn1_get_alg( unsigned char **p,
  *              Updates the pointer to immediately behind the full
  *              AlgorithmIdentifier.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param alg   The buffer to receive the OID
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the AlgorithmIdentifier element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param alg   The buffer to receive the OID.
  *
  * \return      0 if successful or a specific ASN.1 or MPI error code.
  */
@@ -364,15 +591,19 @@ mbedtls_asn1_named_data *mbedtls_asn1_find_named_data( mbedtls_asn1_named_data *
 /**
  * \brief       Free a mbedtls_asn1_named_data entry
  *
- * \param entry The named data entry to free
+ * \param entry The named data entry to free.
+ *              This function calls mbedtls_free() on
+ *              `entry->oid.p` and `entry->val.p`.
  */
 void mbedtls_asn1_free_named_data( mbedtls_asn1_named_data *entry );
 
 /**
- * \brief       Free all entries in a mbedtls_asn1_named_data list
- *              Head will be set to NULL
+ * \brief       Free all entries in a mbedtls_asn1_named_data list.
  *
- * \param head  Pointer to the head of the list of named data entries to free
+ * \param head  Pointer to the head of the list of named data entries to free.
+ *              This function calls mbedtls_asn1_free_named_data() and
+ *              mbedtls_free() on each list element and
+ *              sets \c *head to \c NULL.
  */
 void mbedtls_asn1_free_named_data_list( mbedtls_asn1_named_data **head );
 
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/asn1write.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/asn1write.h
index 3c7cdd6b469..44afae0e560 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/asn1write.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/asn1write.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ASN1_WRITE_H
 #define MBEDTLS_ASN1_WRITE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
+#include "mbedtls/asn1.h"
 
 #define MBEDTLS_ASN1_CHK_ADD(g, f)                      \
     do                                                  \
@@ -125,6 +98,7 @@ int mbedtls_asn1_write_raw_buffer( unsigned char **p, unsigned char *start,
  * \param p         The reference to the current position pointer.
  * \param start     The start of the buffer, for bounds-checking.
  * \param X         The MPI to write.
+ *                  It must be non-negative.
  *
  * \return          The number of bytes written to \p p on success.
  * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
@@ -209,12 +183,28 @@ int mbedtls_asn1_write_bool( unsigned char **p, unsigned char *start,
  * \param p         The reference to the current position pointer.
  * \param start     The start of the buffer, for bounds-checking.
  * \param val       The integer value to write.
+ *                  It must be non-negative.
  *
  * \return          The number of bytes written to \p p on success.
  * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
  */
 int mbedtls_asn1_write_int( unsigned char **p, unsigned char *start, int val );
 
+/**
+ * \brief           Write an enum tag (#MBEDTLS_ASN1_ENUMERATED) and value
+ *                  in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param val       The integer value to write.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_enum( unsigned char **p, unsigned char *start, int val );
+
 /**
  * \brief           Write a string in ASN.1 format using a specific
  *                  string encoding tag.
@@ -257,7 +247,7 @@ int mbedtls_asn1_write_printable_string( unsigned char **p,
 
 /**
  * \brief           Write a UTF8 string in ASN.1 format using the UTF8String
- *                  string encoding tag (#MBEDTLS_ASN1_PRINTABLE_STRING).
+ *                  string encoding tag (#MBEDTLS_ASN1_UTF8_STRING).
  *
  * \note            This function works backwards in data buffer.
  *
@@ -308,6 +298,28 @@ int mbedtls_asn1_write_ia5_string( unsigned char **p, unsigned char *start,
 int mbedtls_asn1_write_bitstring( unsigned char **p, unsigned char *start,
                                   const unsigned char *buf, size_t bits );
 
+/**
+ * \brief           This function writes a named bitstring tag
+ *                  (#MBEDTLS_ASN1_BIT_STRING) and value in ASN.1 format.
+ *
+ *                  As stated in RFC 5280 Appendix B, trailing zeroes are
+ *                  omitted when encoding named bitstrings in DER.
+ *
+ * \note            This function works backwards within the data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer which is used for bounds-checking.
+ * \param buf       The bitstring to write.
+ * \param bits      The total number of bits in the bitstring.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_asn1_write_named_bitstring( unsigned char **p,
+                                        unsigned char *start,
+                                        const unsigned char *buf,
+                                        size_t bits );
+
 /**
  * \brief           Write an octet string tag (#MBEDTLS_ASN1_OCTET_STRING)
  *                  and value in ASN.1 format.
@@ -335,9 +347,13 @@ int mbedtls_asn1_write_octet_string( unsigned char **p, unsigned char *start,
  *                  through (will be updated in case of a new entry).
  * \param oid       The OID to look for.
  * \param oid_len   The size of the OID.
- * \param val       The data to store (can be \c NULL if you want to fill
- *                  it by hand).
+ * \param val       The associated data to store. If this is \c NULL,
+ *                  no data is copied to the new or existing buffer.
  * \param val_len   The minimum length of the data buffer needed.
+ *                  If this is 0, do not allocate a buffer for the associated
+ *                  data.
+ *                  If the OID was already present, enlarge, shrink or free
+ *                  the existing buffer to fit \p val_len.
  *
  * \return          A pointer to the new / existing entry on success.
  * \return          \c NULL if if there was a memory allocation error.
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/base64.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/base64.h
index cbed6887ee6..cf4149e731d 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/base64.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/base64.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,22 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_BASE64_H
 #define MBEDTLS_BASE64_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
 
-#define MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL               -0x002A  /**< Output buffer too small. */
-#define MBEDTLS_ERR_BASE64_INVALID_CHARACTER              -0x002C  /**< Invalid character in input. */
+/** Output buffer too small. */
+#define MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL               -0x002A
+/** Invalid character in input. */
+#define MBEDTLS_ERR_BASE64_INVALID_CHARACTER              -0x002C
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bignum.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bignum.h
index 3deedfedd9c..4de452980b8 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bignum.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bignum.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_BIGNUM_H
 #define MBEDTLS_BIGNUM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -62,14 +35,22 @@
 #include <stdio.h>
 #endif
 
-#define MBEDTLS_ERR_MPI_FILE_IO_ERROR                     -0x0002  /**< An error occurred while reading from or writing to a file. */
-#define MBEDTLS_ERR_MPI_BAD_INPUT_DATA                    -0x0004  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_MPI_INVALID_CHARACTER                 -0x0006  /**< There is an invalid character in the digit string. */
-#define MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL                  -0x0008  /**< The buffer is too small to write to. */
-#define MBEDTLS_ERR_MPI_NEGATIVE_VALUE                    -0x000A  /**< The input arguments are negative or result in illegal output. */
-#define MBEDTLS_ERR_MPI_DIVISION_BY_ZERO                  -0x000C  /**< The input argument for division is zero, which is not allowed. */
-#define MBEDTLS_ERR_MPI_NOT_ACCEPTABLE                    -0x000E  /**< The input arguments are not acceptable. */
-#define MBEDTLS_ERR_MPI_ALLOC_FAILED                      -0x0010  /**< Memory allocation failed. */
+/** An error occurred while reading from or writing to a file. */
+#define MBEDTLS_ERR_MPI_FILE_IO_ERROR                     -0x0002
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_MPI_BAD_INPUT_DATA                    -0x0004
+/** There is an invalid character in the digit string. */
+#define MBEDTLS_ERR_MPI_INVALID_CHARACTER                 -0x0006
+/** The buffer is too small to write to. */
+#define MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL                  -0x0008
+/** The input arguments are negative or result in illegal output. */
+#define MBEDTLS_ERR_MPI_NEGATIVE_VALUE                    -0x000A
+/** The input argument for division is zero, which is not allowed. */
+#define MBEDTLS_ERR_MPI_DIVISION_BY_ZERO                  -0x000C
+/** The input arguments are not acceptable. */
+#define MBEDTLS_ERR_MPI_NOT_ACCEPTABLE                    -0x000E
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_MPI_ALLOC_FAILED                      -0x0010
 
 #define MBEDTLS_MPI_CHK(f)       \
     do                           \
@@ -156,7 +137,8 @@
         defined(__ppc64__) || defined(__powerpc64__)  || \
         defined(__ia64__)  || defined(__alpha__)      || \
         ( defined(__sparc__) && defined(__arch64__) ) || \
-        defined(__s390x__) || defined(__mips64) )
+        defined(__s390x__) || defined(__mips64)       || \
+        defined(__aarch64__) )
         #if !defined(MBEDTLS_HAVE_INT64)
             #define MBEDTLS_HAVE_INT64
         #endif /* MBEDTLS_HAVE_INT64 */
@@ -522,8 +504,24 @@ int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf,
                              size_t buflen );
 
 /**
- * \brief          Export an MPI into unsigned big endian binary data
- *                 of fixed size.
+ * \brief          Import X from unsigned binary data, little endian
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param buf      The input buffer. This must be a readable buffer of length
+ *                 \p buflen Bytes.
+ * \param buflen   The length of the input buffer \p p in Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_read_binary_le( mbedtls_mpi *X,
+                                const unsigned char *buf, size_t buflen );
+
+/**
+ * \brief          Export X into unsigned binary data, big endian.
+ *                 Always fills the whole buffer, which will start with zeros
+ *                 if the number is smaller.
  *
  * \param X        The source MPI. This must point to an initialized MPI.
  * \param buf      The output buffer. This must be a writable buffer of length
@@ -538,6 +536,24 @@ int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf,
 int mbedtls_mpi_write_binary( const mbedtls_mpi *X, unsigned char *buf,
                               size_t buflen );
 
+/**
+ * \brief          Export X into unsigned binary data, little endian.
+ *                 Always fills the whole buffer, which will end with zeros
+ *                 if the number is smaller.
+ *
+ * \param X        The source MPI. This must point to an initialized MPI.
+ * \param buf      The output buffer. This must be a writable buffer of length
+ *                 \p buflen Bytes.
+ * \param buflen   The size of the output buffer \p buf in Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if \p buf isn't
+ *                 large enough to hold the value of \p X.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_write_binary_le( const mbedtls_mpi *X,
+                                 unsigned char *buf, size_t buflen );
+
 /**
  * \brief          Perform a left-shift on an MPI: X <<= count
  *
@@ -823,14 +839,14 @@ int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A,
  * \param E        The exponent MPI. This must point to an initialized MPI.
  * \param N        The base for the modular reduction. This must point to an
  *                 initialized MPI.
- * \param _RR      A helper MPI depending solely on \p N which can be used to
+ * \param prec_RR  A helper MPI depending solely on \p N which can be used to
  *                 speed-up multiple modular exponentiations for the same value
  *                 of \p N. This may be \c NULL. If it is not \c NULL, it must
  *                 point to an initialized MPI. If it hasn't been used after
  *                 the call to mbedtls_mpi_init(), this function will compute
- *                 the helper value and store it in \p _RR for reuse on
+ *                 the helper value and store it in \p prec_RR for reuse on
  *                 subsequent calls to this function. Otherwise, the function
- *                 will assume that \p _RR holds the helper value set by a
+ *                 will assume that \p prec_RR holds the helper value set by a
  *                 previous call to mbedtls_mpi_exp_mod(), and reuse it.
  *
  * \return         \c 0 if successful.
@@ -842,7 +858,7 @@ int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A,
  */
 int mbedtls_mpi_exp_mod( mbedtls_mpi *X, const mbedtls_mpi *A,
                          const mbedtls_mpi *E, const mbedtls_mpi *N,
-                         mbedtls_mpi *_RR );
+                         mbedtls_mpi *prec_RR );
 
 /**
  * \brief          Fill an MPI with a number of random bytes.
@@ -865,6 +881,44 @@ int mbedtls_mpi_fill_random( mbedtls_mpi *X, size_t size,
                      int (*f_rng)(void *, unsigned char *, size_t),
                      void *p_rng );
 
+/** Generate a random number uniformly in a range.
+ *
+ * This function generates a random number between \p min inclusive and
+ * \p N exclusive.
+ *
+ * The procedure complies with RFC 6979 §3.3 (deterministic ECDSA)
+ * when the RNG is a suitably parametrized instance of HMAC_DRBG
+ * and \p min is \c 1.
+ *
+ * \note           There are `N - min` possible outputs. The lower bound
+ *                 \p min can be reached, but the upper bound \p N cannot.
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param min      The minimum value to return.
+ *                 It must be nonnegative.
+ * \param N        The upper bound of the range, exclusive.
+ *                 In other words, this is one plus the maximum value to return.
+ *                 \p N must be strictly larger than \p min.
+ * \param f_rng    The RNG function to use. This must not be \c NULL.
+ * \param p_rng    The RNG parameter to be passed to \p f_rng.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \p min or \p N is invalid
+ *                 or if they are incompatible.
+ * \return         #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if the implementation was
+ *                 unable to find a suitable value within a limited number
+ *                 of attempts. This has a negligible probability if \p N
+ *                 is significantly larger than \p min, which is the case
+ *                 for all usual cryptographic applications.
+ * \return         Another negative error code on failure.
+ */
+int mbedtls_mpi_random( mbedtls_mpi *X,
+                        mbedtls_mpi_sint min,
+                        const mbedtls_mpi *N,
+                        int (*f_rng)(void *, unsigned char *, size_t),
+                        void *p_rng );
+
 /**
  * \brief          Compute the greatest common divisor: G = gcd(A, B)
  *
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/blowfish.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/blowfish.h
index 945bd426a9f..77dca70d314 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/blowfish.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/blowfish.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_BLOWFISH_H
 #define MBEDTLS_BLOWFISH_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,7 +31,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #define MBEDTLS_BLOWFISH_ENCRYPT     1
 #define MBEDTLS_BLOWFISH_DECRYPT     0
@@ -70,13 +43,16 @@
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
 #define MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x0016 )
 #endif /* !MBEDTLS_DEPRECATED_REMOVED */
-#define MBEDTLS_ERR_BLOWFISH_BAD_INPUT_DATA -0x0016 /**< Bad input data. */
+/** Bad input data. */
+#define MBEDTLS_ERR_BLOWFISH_BAD_INPUT_DATA -0x0016
 
-#define MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH -0x0018 /**< Invalid data input length. */
+/** Invalid data input length. */
+#define MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH -0x0018
 
 /* MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED                   -0x0017  /**< Blowfish hardware accelerator failed. */
+/** Blowfish hardware accelerator failed. */
+#define MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED                   -0x0017
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
index 6f1201bf50a..31137cd4c23 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 /*
  *      Multiply source vector [s] with b, add result
@@ -64,12 +37,12 @@
 #define MBEDTLS_BN_MUL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 
 /*
@@ -256,13 +229,37 @@
         "addq   $8, %%rdi\n"
 
 #define MULADDC_STOP                        \
-        : "+c" (c), "+D" (d), "+S" (s)      \
-        : "b" (b)                           \
-        : "rax", "rdx", "r8"                \
+        : "+c" (c), "+D" (d), "+S" (s), "+m" (*(uint64_t (*)[16]) d) \
+        : "b" (b), "m" (*(const uint64_t (*)[16]) s)                 \
+        : "rax", "rdx", "r8"                                         \
     );
 
 #endif /* AMD64 */
 
+#if defined(__aarch64__)
+
+#define MULADDC_INIT                \
+    asm(
+
+#define MULADDC_CORE                \
+        "ldr x4, [%2], #8   \n\t"   \
+        "ldr x5, [%1]       \n\t"   \
+        "mul x6, x4, %4     \n\t"   \
+        "umulh x7, x4, %4   \n\t"   \
+        "adds x5, x5, x6    \n\t"   \
+        "adc x7, x7, xzr    \n\t"   \
+        "adds x5, x5, %0    \n\t"   \
+        "adc %0, x7, xzr    \n\t"   \
+        "str x5, [%1], #8   \n\t"
+
+#define MULADDC_STOP                                                    \
+         : "+r" (c),  "+r" (d), "+r" (s), "+m" (*(uint64_t (*)[16]) d)  \
+         : "r" (b), "m" (*(const uint64_t (*)[16]) s)                   \
+         : "x4", "x5", "x6", "x7", "cc"                                 \
+    );
+
+#endif /* Aarch64 */
+
 #if defined(__mc68020__) || defined(__mcpu32__)
 
 #define MULADDC_INIT                    \
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/camellia.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/camellia.h
index 38871288e4b..925a623e47e 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/camellia.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/camellia.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_CAMELLIA_H
 #define MBEDTLS_CAMELLIA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,7 +31,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #define MBEDTLS_CAMELLIA_ENCRYPT     1
 #define MBEDTLS_CAMELLIA_DECRYPT     0
@@ -66,13 +39,16 @@
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
 #define MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x0024 )
 #endif /* !MBEDTLS_DEPRECATED_REMOVED */
-#define MBEDTLS_ERR_CAMELLIA_BAD_INPUT_DATA -0x0024 /**< Bad input data. */
+/** Bad input data. */
+#define MBEDTLS_ERR_CAMELLIA_BAD_INPUT_DATA -0x0024
 
-#define MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH -0x0026 /**< Invalid data input length. */
+/** Invalid data input length. */
+#define MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH -0x0026
 
 /* MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED              -0x0027  /**< Camellia hardware accelerator failed. */
+/** Camellia hardware accelerator failed. */
+#define MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED              -0x0027
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ccm.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ccm.h
index d50c6ec9939..ece5a901cb6 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ccm.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ccm.h
@@ -29,13 +29,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -48,45 +42,27 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CCM_H
 #define MBEDTLS_CCM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
-#define MBEDTLS_ERR_CCM_BAD_INPUT       -0x000D /**< Bad input parameters to the function. */
-#define MBEDTLS_ERR_CCM_AUTH_FAILED     -0x000F /**< Authenticated decryption failed. */
+/** Bad input parameters to the function. */
+#define MBEDTLS_ERR_CCM_BAD_INPUT       -0x000D
+/** Authenticated decryption failed. */
+#define MBEDTLS_ERR_CCM_AUTH_FAILED     -0x000F
 
 /* MBEDTLS_ERR_CCM_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_CCM_HW_ACCEL_FAILED -0x0011 /**< CCM hardware accelerator failed. */
+/** CCM hardware accelerator failed. */
+#define MBEDTLS_ERR_CCM_HW_ACCEL_FAILED -0x0011
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/certs.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/certs.h
index 8472a6f38ce..c93c741c7ff 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/certs.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/certs.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_CERTS_H
 #define MBEDTLS_CERTS_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/chacha20.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/chacha20.h
index 8c9c2af6ffb..03b48714780 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/chacha20.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/chacha20.h
@@ -14,13 +14,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,34 +27,13 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CHACHA20_H
 #define MBEDTLS_CHACHA20_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -68,15 +41,18 @@
 #include <stdint.h>
 #include <stddef.h>
 
-#define MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA         -0x0051 /**< Invalid input parameter(s). */
+/** Invalid input parameter(s). */
+#define MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA         -0x0051
 
 /* MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE is deprecated and should not be
  * used. */
-#define MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE    -0x0053 /**< Feature not available. For example, s part of the API is not implemented. */
+/** Feature not available. For example, s part of the API is not implemented. */
+#define MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE    -0x0053
 
 /* MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED        -0x0055  /**< Chacha20 hardware accelerator failed. */
+/** Chacha20 hardware accelerator failed. */
+#define MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED        -0x0055
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h
index 5f6cb6e0306..c4ec7b5f2a9 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h
@@ -14,13 +14,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,43 +27,24 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CHACHAPOLY_H
 #define MBEDTLS_CHACHAPOLY_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 /* for shared error codes */
-#include "poly1305.h"
+#include "mbedtls/poly1305.h"
 
-#define MBEDTLS_ERR_CHACHAPOLY_BAD_STATE            -0x0054 /**< The requested operation is not permitted in the current state. */
-#define MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED          -0x0056 /**< Authenticated decryption failed: data was not authentic. */
+/** The requested operation is not permitted in the current state. */
+#define MBEDTLS_ERR_CHACHAPOLY_BAD_STATE            -0x0054
+/** Authenticated decryption failed: data was not authentic. */
+#define MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED          -0x0056
 
 #ifdef __cplusplus
 extern "C" {
@@ -84,7 +59,7 @@ mbedtls_chachapoly_mode_t;
 
 #if !defined(MBEDTLS_CHACHAPOLY_ALT)
 
-#include "chacha20.h"
+#include "mbedtls/chacha20.h"
 
 typedef struct mbedtls_chachapoly_context
 {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/check_config.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/check_config.h
index 2bbd7a80ffe..396fe7dfc2b 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/check_config.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/check_config.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 /*
@@ -70,16 +43,20 @@
 #endif
 
 /* Fix the config here. Not convenient to put an #ifdef _WIN32 in config.h as
- * it would confuse config.pl. */
+ * it would confuse config.py. */
 #if !defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) && \
     !defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO)
 #define MBEDTLS_PLATFORM_SNPRINTF_ALT
 #endif
+
+#if !defined(MBEDTLS_PLATFORM_VSNPRINTF_ALT) && \
+    !defined(MBEDTLS_PLATFORM_VSNPRINTF_MACRO)
+#define MBEDTLS_PLATFORM_VSNPRINTF_ALT
+#endif
 #endif /* _WIN32 */
 
-#if defined(TARGET_LIKE_MBED) && \
-    ( defined(MBEDTLS_NET_C) || defined(MBEDTLS_TIMING_C) )
-#error "The NET and TIMING modules are not available for mbed OS - please use the network and timing functions provided by mbed OS"
+#if defined(TARGET_LIKE_MBED) && defined(MBEDTLS_NET_C)
+#error "The NET module is not available for mbed OS - please use the network functions provided by Mbed OS"
 #endif
 
 #if defined(MBEDTLS_DEPRECATED_WARNING) && \
@@ -123,6 +100,17 @@
 
 #if defined(MBEDTLS_ECDSA_C) &&            \
     ( !defined(MBEDTLS_ECP_C) ||           \
+      !( defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) ||   \
+         defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) ||   \
+         defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) ) || \
       !defined(MBEDTLS_ASN1_PARSE_C) ||    \
       !defined(MBEDTLS_ASN1_WRITE_C) )
 #error "MBEDTLS_ECDSA_C defined, but not all prerequisites"
@@ -134,14 +122,25 @@
 #endif
 
 #if defined(MBEDTLS_ECP_RESTARTABLE)           && \
-    ( defined(MBEDTLS_ECDH_COMPUTE_SHARED_ALT) || \
+    ( defined(MBEDTLS_USE_PSA_CRYPTO)          || \
+      defined(MBEDTLS_ECDH_COMPUTE_SHARED_ALT) || \
       defined(MBEDTLS_ECDH_GEN_PUBLIC_ALT)     || \
       defined(MBEDTLS_ECDSA_SIGN_ALT)          || \
       defined(MBEDTLS_ECDSA_VERIFY_ALT)        || \
       defined(MBEDTLS_ECDSA_GENKEY_ALT)        || \
       defined(MBEDTLS_ECP_INTERNAL_ALT)        || \
       defined(MBEDTLS_ECP_ALT) )
-#error "MBEDTLS_ECP_RESTARTABLE defined, but it cannot coexist with an alternative ECP implementation"
+#error "MBEDTLS_ECP_RESTARTABLE defined, but it cannot coexist with an alternative or PSA-based ECP implementation"
+#endif
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)           && \
+    ! defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+#error "MBEDTLS_ECP_RESTARTABLE defined, but not MBEDTLS_ECDH_LEGACY_CONTEXT"
+#endif
+
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)           && \
+    defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+#error "MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED defined, but MBEDTLS_ECDH_LEGACY_CONTEXT not disabled"
 #endif
 
 #if defined(MBEDTLS_ECDSA_DETERMINISTIC) && !defined(MBEDTLS_HMAC_DRBG_C)
@@ -169,10 +168,8 @@
     defined(MBEDTLS_ECP_ALT) ||             \
     defined(MBEDTLS_CTR_DRBG_C) ||          \
     defined(MBEDTLS_HMAC_DRBG_C) ||         \
-    defined(MBEDTLS_SHA512_C) ||            \
-    defined(MBEDTLS_SHA256_C) ||            \
     defined(MBEDTLS_ECP_NO_INTERNAL_RNG))
-#error "MBEDTLS_ECP_C requires a DRBG or SHA-2 module unless MBEDTLS_ECP_NO_INTERNAL_RNG is defined or an alternative implementation is used"
+#error "MBEDTLS_ECP_C requires a DRBG module unless MBEDTLS_ECP_NO_INTERNAL_RNG is defined or an alternative implementation is used"
 #endif
 
 #if defined(MBEDTLS_PK_PARSE_C) && !defined(MBEDTLS_ASN1_PARSE_C)
@@ -218,7 +215,7 @@
 #endif
 
 #if defined(MBEDTLS_GCM_C) && (                                        \
-        !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_CAMELLIA_C) )
+        !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_CAMELLIA_C) && !defined(MBEDTLS_ARIA_C) )
 #error "MBEDTLS_GCM_C defined, but not all prerequisites"
 #endif
 
@@ -254,6 +251,10 @@
 #error "MBEDTLS_ECP_NORMALIZE_MXZ_ALT defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_ECP_NO_FALLBACK) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_NO_FALLBACK defined, but no alternative implementation enabled"
+#endif
+
 #if defined(MBEDTLS_HAVEGE_C) && !defined(MBEDTLS_TIMING_C)
 #error "MBEDTLS_HAVEGE_C defined, but not all prerequisites"
 #endif
@@ -267,12 +268,14 @@
 #endif
 
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) &&                 \
-    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) )
+    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_ECDSA_C) ||          \
+      !defined(MBEDTLS_X509_CRT_PARSE_C) )
 #error "MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED defined, but not all prerequisites"
 #endif
 
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) &&                 \
-    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) )
+    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_RSA_C) ||          \
+      !defined(MBEDTLS_X509_CRT_PARSE_C) )
 #error "MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED defined, but not all prerequisites"
 #endif
 
@@ -321,6 +324,14 @@
 #error "MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE) &&              \
+    ( !defined(MBEDTLS_SHA256_C) &&                             \
+      !defined(MBEDTLS_SHA512_C) &&                             \
+      !defined(MBEDTLS_SHA1_C) )
+#error "!MBEDTLS_SSL_KEEP_PEER_CERTIFICATE requires MBEDTLS_SHA512_C, MBEDTLS_SHA256_C or MBEDTLS_SHA1_C"
+#endif
+
 #if defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C) &&                          \
     ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) )
 #error "MBEDTLS_MEMORY_BUFFER_ALLOC_C defined, but not all prerequisites"
@@ -363,6 +374,14 @@
 #error "MBEDTLS_PKCS11_C defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_PKCS11_C)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_PKCS11_C is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_PKCS11_C is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_PKCS11_C */
+
 #if defined(MBEDTLS_PLATFORM_EXIT_ALT) && !defined(MBEDTLS_PLATFORM_C)
 #error "MBEDTLS_PLATFORM_EXIT_ALT defined, but not all prerequisites"
 #endif
@@ -490,10 +509,6 @@
 #error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites"
 #endif
 
-#if defined(MBEDTLS_PLATFORM_STD_CALLOC) && !defined(MBEDTLS_PLATFORM_MEMORY)
-#error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites"
-#endif
-
 #if defined(MBEDTLS_PLATFORM_STD_FREE) && !defined(MBEDTLS_PLATFORM_MEMORY)
 #error "MBEDTLS_PLATFORM_STD_FREE defined, but not all prerequisites"
 #endif
@@ -556,6 +571,54 @@
 #error "MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO and MBEDTLS_PLATFORM_STD_NV_SEED_WRITE cannot be defined simultaneously"
 #endif
 
+#if defined(MBEDTLS_PSA_CRYPTO_C) &&                                    \
+    !( ( ( defined(MBEDTLS_CTR_DRBG_C) || defined(MBEDTLS_HMAC_DRBG_C) ) && \
+         defined(MBEDTLS_ENTROPY_C) ) ||                                \
+       defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) )
+#error "MBEDTLS_PSA_CRYPTO_C defined, but not all prerequisites (missing RNG)"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_SPM) && !defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_PSA_CRYPTO_SPM defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C) &&    \
+    ! ( defined(MBEDTLS_PSA_CRYPTO_C) && \
+        defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) )
+#error "MBEDTLS_PSA_CRYPTO_SE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) &&            \
+    ! defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_PSA_CRYPTO_STORAGE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&      \
+    !( defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) && \
+       defined(MBEDTLS_ENTROPY_NV_SEED) )
+#error "MBEDTLS_PSA_INJECT_ENTROPY defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&              \
+    !defined(MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES)
+#error "MBEDTLS_PSA_INJECT_ENTROPY is not compatible with actual entropy sources"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&              \
+    defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+#error "MBEDTLS_PSA_INJECT_ENTROPY is not compatible with MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG"
+#endif
+
+#if defined(MBEDTLS_PSA_ITS_FILE_C) && \
+    !defined(MBEDTLS_FS_IO)
+#error "MBEDTLS_PSA_ITS_FILE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER) && \
+    defined(MBEDTLS_USE_PSA_CRYPTO)
+#error "MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER defined, but it cannot coexist with MBEDTLS_USE_PSA_CRYPTO."
+#endif
+
 #if defined(MBEDTLS_RSA_C) && ( !defined(MBEDTLS_BIGNUM_C) ||         \
     !defined(MBEDTLS_OID_C) )
 #error "MBEDTLS_RSA_C defined, but not all prerequisites"
@@ -571,6 +634,10 @@
 #error "MBEDTLS_X509_RSASSA_PSS_SUPPORT defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_SHA512_NO_SHA384) && !defined(MBEDTLS_SHA512_C)
+#error "MBEDTLS_SHA512_NO_SHA384 defined without MBEDTLS_SHA512_C"
+#endif
+
 #if defined(MBEDTLS_SSL_PROTO_SSL3) && ( !defined(MBEDTLS_MD5_C) ||     \
     !defined(MBEDTLS_SHA1_C) )
 #error "MBEDTLS_SSL_PROTO_SSL3 defined, but not all prerequisites"
@@ -591,6 +658,11 @@
 #error "MBEDTLS_SSL_PROTO_TLS1_2 defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL) && ( !defined(MBEDTLS_HKDF_C) && \
+    !defined(MBEDTLS_SHA256_C) && !defined(MBEDTLS_SHA512_C) )
+#error "MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL defined, but not all prerequisites"
+#endif
+
 #if (defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) ||  \
      defined(MBEDTLS_SSL_PROTO_TLS1_1) || defined(MBEDTLS_SSL_PROTO_TLS1_2)) && \
     !(defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) ||                          \
@@ -663,6 +735,23 @@
 #error "MBEDTLS_SSL_DTLS_ANTI_REPLAY  defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID) &&                              \
+    ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_CONNECTION_ID  defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)            &&                 \
+    defined(MBEDTLS_SSL_CID_IN_LEN_MAX) &&                 \
+    MBEDTLS_SSL_CID_IN_LEN_MAX > 255
+#error "MBEDTLS_SSL_CID_IN_LEN_MAX too large (max 255)"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)            &&                  \
+    defined(MBEDTLS_SSL_CID_OUT_LEN_MAX) &&                 \
+    MBEDTLS_SSL_CID_OUT_LEN_MAX > 255
+#error "MBEDTLS_SSL_CID_OUT_LEN_MAX too large (max 255)"
+#endif
+
 #if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) &&                              \
     ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) )
 #error "MBEDTLS_SSL_DTLS_BADMAC_LIMIT  defined, but not all prerequisites"
@@ -715,6 +804,10 @@
 #endif
 #undef MBEDTLS_THREADING_IMPL
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO) && !defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_USE_PSA_CRYPTO defined, but not all prerequisites"
+#endif
+
 #if defined(MBEDTLS_VERSION_FEATURES) && !defined(MBEDTLS_VERSION_C)
 #error "MBEDTLS_VERSION_FEATURES defined, but not all prerequisites"
 #endif
@@ -764,6 +857,38 @@
 #error "MBEDTLS_HAVE_INT32/MBEDTLS_HAVE_INT64 and MBEDTLS_HAVE_ASM cannot be defined simultaneously"
 #endif /* (MBEDTLS_HAVE_INT32 || MBEDTLS_HAVE_INT64) && MBEDTLS_HAVE_ASM */
 
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_PROTO_SSL3 is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_PROTO_SSL3 is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_SSL_PROTO_SSL3 */
+
+#if defined(MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO */
+
+#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_HW_RECORD_ACCEL is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_HW_RECORD_ACCEL is deprecated and will be removed in a future version of Mbed TLS"
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP) && ( !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_SRTP defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH) && ( !defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) )
+#error "MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH defined, but not all prerequisites"
+#endif
+
 /*
  * Avoid warning from -pedantic. This is a convenient place for this
  * workaround since this is included by every single file before the
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cipher.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cipher.h
index 1f41b528c48..6d83da8827e 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cipher.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cipher.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,40 +22,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CIPHER_H
 #define MBEDTLS_CIPHER_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CCM_C) || defined(MBEDTLS_CHACHAPOLY_C)
 #define MBEDTLS_CIPHER_MODE_AEAD
@@ -81,16 +54,24 @@
 #define inline __inline
 #endif
 
-#define MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE  -0x6080  /**< The selected feature is not available. */
-#define MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA       -0x6100  /**< Bad input parameters. */
-#define MBEDTLS_ERR_CIPHER_ALLOC_FAILED         -0x6180  /**< Failed to allocate memory. */
-#define MBEDTLS_ERR_CIPHER_INVALID_PADDING      -0x6200  /**< Input data contains invalid padding and is rejected. */
-#define MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED  -0x6280  /**< Decryption of block requires a full block. */
-#define MBEDTLS_ERR_CIPHER_AUTH_FAILED          -0x6300  /**< Authentication failed (for AEAD modes). */
-#define MBEDTLS_ERR_CIPHER_INVALID_CONTEXT      -0x6380  /**< The context is invalid. For example, because it was freed. */
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE  -0x6080
+/** Bad input parameters. */
+#define MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA       -0x6100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_CIPHER_ALLOC_FAILED         -0x6180
+/** Input data contains invalid padding and is rejected. */
+#define MBEDTLS_ERR_CIPHER_INVALID_PADDING      -0x6200
+/** Decryption of block requires a full block. */
+#define MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED  -0x6280
+/** Authentication failed (for AEAD modes). */
+#define MBEDTLS_ERR_CIPHER_AUTH_FAILED          -0x6300
+/** The context is invalid. For example, because it was freed. */
+#define MBEDTLS_ERR_CIPHER_INVALID_CONTEXT      -0x6380
 
 /* MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED      -0x6400  /**< Cipher hardware accelerator failed. */
+/** Cipher hardware accelerator failed. */
+#define MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED      -0x6400
 
 #define MBEDTLS_CIPHER_VARIABLE_IV_LEN     0x01    /**< Cipher accepts IVs of variable length. */
 #define MBEDTLS_CIPHER_VARIABLE_KEY_LEN    0x02    /**< Cipher accepts keys of variable length. */
@@ -201,21 +182,29 @@ typedef enum {
     MBEDTLS_CIPHER_AES_256_XTS,          /**< AES 256-bit cipher in XTS block mode. */
     MBEDTLS_CIPHER_CHACHA20,             /**< ChaCha20 stream cipher. */
     MBEDTLS_CIPHER_CHACHA20_POLY1305,    /**< ChaCha20-Poly1305 AEAD cipher. */
+    MBEDTLS_CIPHER_AES_128_KW,           /**< AES cipher with 128-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_192_KW,           /**< AES cipher with 192-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_256_KW,           /**< AES cipher with 256-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_128_KWP,          /**< AES cipher with 128-bit NIST KWP mode. */
+    MBEDTLS_CIPHER_AES_192_KWP,          /**< AES cipher with 192-bit NIST KWP mode. */
+    MBEDTLS_CIPHER_AES_256_KWP,          /**< AES cipher with 256-bit NIST KWP mode. */
 } mbedtls_cipher_type_t;
 
 /** Supported cipher modes. */
 typedef enum {
-    MBEDTLS_MODE_NONE = 0,               /**< None. */
-    MBEDTLS_MODE_ECB,                    /**< The ECB cipher mode. */
-    MBEDTLS_MODE_CBC,                    /**< The CBC cipher mode. */
-    MBEDTLS_MODE_CFB,                    /**< The CFB cipher mode. */
-    MBEDTLS_MODE_OFB,                    /**< The OFB cipher mode. */
-    MBEDTLS_MODE_CTR,                    /**< The CTR cipher mode. */
-    MBEDTLS_MODE_GCM,                    /**< The GCM cipher mode. */
-    MBEDTLS_MODE_STREAM,                 /**< The stream cipher mode. */
-    MBEDTLS_MODE_CCM,                    /**< The CCM cipher mode. */
-    MBEDTLS_MODE_XTS,                    /**< The XTS cipher mode. */
+    MBEDTLS_MODE_NONE = 0,               /**< None.                        */
+    MBEDTLS_MODE_ECB,                    /**< The ECB cipher mode.         */
+    MBEDTLS_MODE_CBC,                    /**< The CBC cipher mode.         */
+    MBEDTLS_MODE_CFB,                    /**< The CFB cipher mode.         */
+    MBEDTLS_MODE_OFB,                    /**< The OFB cipher mode.         */
+    MBEDTLS_MODE_CTR,                    /**< The CTR cipher mode.         */
+    MBEDTLS_MODE_GCM,                    /**< The GCM cipher mode.         */
+    MBEDTLS_MODE_STREAM,                 /**< The stream cipher mode.      */
+    MBEDTLS_MODE_CCM,                    /**< The CCM cipher mode.         */
+    MBEDTLS_MODE_XTS,                    /**< The XTS cipher mode.         */
     MBEDTLS_MODE_CHACHAPOLY,             /**< The ChaCha-Poly cipher mode. */
+    MBEDTLS_MODE_KW,                     /**< The SP800-38F KW mode */
+    MBEDTLS_MODE_KWP,                    /**< The SP800-38F KWP mode */
 } mbedtls_cipher_mode_t;
 
 /** Supported cipher padding types. */
@@ -246,10 +235,30 @@ enum {
 };
 
 /** Maximum length of any IV, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_IV_LENGTH defined
+ * in ssl_internal.h. */
 #define MBEDTLS_MAX_IV_LENGTH      16
+
 /** Maximum block size of any cipher, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_BLOCK_LENGTH defined
+ * in ssl_internal.h. */
 #define MBEDTLS_MAX_BLOCK_LENGTH   16
 
+/** Maximum key length, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * For now, only check whether XTS is enabled which uses 64 Byte keys,
+ * and use 32 Bytes as an upper bound for the maximum key length otherwise.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_BLOCK_LENGTH defined
+ * in ssl_internal.h, which however deliberately ignores the case of XTS
+ * since the latter isn't used in SSL/TLS. */
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+#define MBEDTLS_MAX_KEY_LENGTH     64
+#else
+#define MBEDTLS_MAX_KEY_LENGTH     32
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
 /**
  * Base cipher information (opaque struct).
  */
@@ -347,14 +356,32 @@ typedef struct mbedtls_cipher_context_t
     /** CMAC-specific context. */
     mbedtls_cmac_context_t *cmac_ctx;
 #endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    /** Indicates whether the cipher operations should be performed
+     *  by Mbed TLS' own crypto library or an external implementation
+     *  of the PSA Crypto API.
+     *  This is unset if the cipher context was established through
+     *  mbedtls_cipher_setup(), and set if it was established through
+     *  mbedtls_cipher_setup_psa().
+     */
+    unsigned char psa_enabled;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 } mbedtls_cipher_context_t;
 
 /**
- * \brief This function retrieves the list of ciphers supported by the generic
- * cipher module.
+ * \brief This function retrieves the list of ciphers supported
+ *        by the generic cipher module.
+ *
+ *        For any cipher identifier in the returned list, you can
+ *        obtain the corresponding generic cipher information structure
+ *        via mbedtls_cipher_info_from_type(), which can then be used
+ *        to prepare a cipher context via mbedtls_cipher_setup().
  *
- * \return      A statically-allocated array of ciphers. The last entry
- *              is zero.
+ *
+ * \return      A statically-allocated array of cipher identifiers
+ *              of type cipher_type_t. The last entry is zero.
  */
 const int *mbedtls_cipher_list( void );
 
@@ -421,9 +448,8 @@ void mbedtls_cipher_free( mbedtls_cipher_context_t *ctx );
 
 
 /**
- * \brief               This function initializes and fills the cipher-context
- *                      structure with the appropriate values. It also clears
- *                      the structure.
+ * \brief               This function initializes a cipher context for
+ *                      use with the given cipher primitive.
  *
  * \param ctx           The context to initialize. This must be initialized.
  * \param cipher_info   The cipher to use.
@@ -441,6 +467,33 @@ void mbedtls_cipher_free( mbedtls_cipher_context_t *ctx );
 int mbedtls_cipher_setup( mbedtls_cipher_context_t *ctx,
                           const mbedtls_cipher_info_t *cipher_info );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief               This function initializes a cipher context for
+ *                      PSA-based use with the given cipher primitive.
+ *
+ * \note                See #MBEDTLS_USE_PSA_CRYPTO for information on PSA.
+ *
+ * \param ctx           The context to initialize. May not be \c NULL.
+ * \param cipher_info   The cipher to use.
+ * \param taglen        For AEAD ciphers, the length in bytes of the
+ *                      authentication tag to use. Subsequent uses of
+ *                      mbedtls_cipher_auth_encrypt() or
+ *                      mbedtls_cipher_auth_decrypt() must provide
+ *                      the same tag length.
+ *                      For non-AEAD ciphers, the value must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_ALLOC_FAILED if allocation of the
+ *                      cipher-specific context fails.
+ */
+int mbedtls_cipher_setup_psa( mbedtls_cipher_context_t *ctx,
+                              const mbedtls_cipher_info_t *cipher_info,
+                              size_t taglen );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 /**
  * \brief        This function returns the block size of the given cipher.
  *
@@ -663,7 +716,7 @@ int mbedtls_cipher_reset( mbedtls_cipher_context_t *ctx );
  * \param ctx           The generic cipher context. This must be initialized.
  * \param ad            The additional data to use. This must be a readable
  *                      buffer of at least \p ad_len Bytes.
- * \param ad_len        the Length of \p ad Bytes.
+ * \param ad_len        The length of \p ad in Bytes.
  *
  * \return              \c 0 on success.
  * \return              A specific error code on failure.
@@ -706,8 +759,10 @@ int mbedtls_cipher_update_ad( mbedtls_cipher_context_t *ctx,
  *                      unsupported mode for a cipher.
  * \return              A cipher-specific error code on failure.
  */
-int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *input,
-                   size_t ilen, unsigned char *output, size_t *olen );
+int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx,
+                           const unsigned char *input,
+                           size_t ilen, unsigned char *output,
+                           size_t *olen );
 
 /**
  * \brief               The generic cipher finalization function. If data still
@@ -810,30 +865,52 @@ int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx,
                   unsigned char *output, size_t *olen );
 
 #if defined(MBEDTLS_CIPHER_MODE_AEAD)
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_WARNING */
 /**
- * \brief               The generic autenticated encryption (AEAD) function.
+ * \brief               The generic authenticated encryption (AEAD) function.
+ *
+ * \deprecated          Superseded by mbedtls_cipher_auth_encrypt_ext().
+ *
+ * \note                This function only supports AEAD algorithms, not key
+ *                      wrapping algorithms such as NIST_KW; for this, see
+ *                      mbedtls_cipher_auth_encrypt_ext().
  *
  * \param ctx           The generic cipher context. This must be initialized and
- *                      bound to a key.
- * \param iv            The IV to use, or NONCE_COUNTER for CTR-mode ciphers.
- *                      This must be a readable buffer of at least \p iv_len
- *                      Bytes.
- * \param iv_len        The IV length for ciphers with variable-size IV.
- *                      This parameter is discarded by ciphers with fixed-size IV.
+ *                      bound to a key associated with an AEAD algorithm.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and must not be \c NULL.
+ * \param iv_len        The length of the nonce. This must satisfy the
+ *                      constraints imposed by the AEAD cipher used.
  * \param ad            The additional data to authenticate. This must be a
- *                      readable buffer of at least \p ad_len Bytes.
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
  * \param ad_len        The length of \p ad.
  * \param input         The buffer holding the input data. This must be a
- *                      readable buffer of at least \p ilen Bytes.
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
  * \param ilen          The length of the input data.
- * \param output        The buffer for the output data. This must be able to
- *                      hold at least \p ilen Bytes.
- * \param olen          The length of the output data, to be updated with the
- *                      actual number of Bytes written. This must not be
- *                      \c NULL.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p ilen Bytes, and must
+ *                      not be \c NULL.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
  * \param tag           The buffer for the authentication tag. This must be a
- *                      writable buffer of at least \p tag_len Bytes.
- * \param tag_len       The desired length of the authentication tag.
+ *                      writable buffer of at least \p tag_len Bytes. See note
+ *                      below regarding restrictions with PSA-based contexts.
+ * \param tag_len       The desired length of the authentication tag. This
+ *                      must match the constraints imposed by the AEAD cipher
+ *                      used, and in particular must not be \c 0.
+ *
+ * \note                If the context is based on PSA (that is, it was set up
+ *                      with mbedtls_cipher_setup_psa()), then it is required
+ *                      that \c tag == output + ilen. That is, the tag must be
+ *                      appended to the ciphertext as recommended by RFC 5116.
  *
  * \return              \c 0 on success.
  * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
@@ -845,36 +922,53 @@ int mbedtls_cipher_auth_encrypt( mbedtls_cipher_context_t *ctx,
                          const unsigned char *ad, size_t ad_len,
                          const unsigned char *input, size_t ilen,
                          unsigned char *output, size_t *olen,
-                         unsigned char *tag, size_t tag_len );
+                         unsigned char *tag, size_t tag_len )
+                         MBEDTLS_DEPRECATED;
 
 /**
- * \brief               The generic autenticated decryption (AEAD) function.
+ * \brief               The generic authenticated decryption (AEAD) function.
+ *
+ * \deprecated          Superseded by mbedtls_cipher_auth_decrypt_ext().
+ *
+ * \note                This function only supports AEAD algorithms, not key
+ *                      wrapping algorithms such as NIST_KW; for this, see
+ *                      mbedtls_cipher_auth_decrypt_ext().
  *
  * \note                If the data is not authentic, then the output buffer
  *                      is zeroed out to prevent the unauthentic plaintext being
  *                      used, making this interface safer.
  *
  * \param ctx           The generic cipher context. This must be initialized and
- *                      and bound to a key.
- * \param iv            The IV to use, or NONCE_COUNTER for CTR-mode ciphers.
- *                      This must be a readable buffer of at least \p iv_len
- *                      Bytes.
- * \param iv_len        The IV length for ciphers with variable-size IV.
- *                      This parameter is discarded by ciphers with fixed-size IV.
- * \param ad            The additional data to be authenticated. This must be a
- *                      readable buffer of at least \p ad_len Bytes.
+ *                      bound to a key associated with an AEAD algorithm.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and must not be \c NULL.
+ * \param iv_len        The length of the nonce. This must satisfy the
+ *                      constraints imposed by the AEAD cipher used.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
  * \param ad_len        The length of \p ad.
  * \param input         The buffer holding the input data. This must be a
- *                      readable buffer of at least \p ilen Bytes.
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
  * \param ilen          The length of the input data.
- * \param output        The buffer for the output data.
- *                      This must be able to hold at least \p ilen Bytes.
- * \param olen          The length of the output data, to be updated with the
- *                      actual number of Bytes written. This must not be
- *                      \c NULL.
- * \param tag           The buffer holding the authentication tag. This must be
- *                      a readable buffer of at least \p tag_len Bytes.
- * \param tag_len       The length of the authentication tag.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p ilen Bytes, and must
+ *                      not be \c NULL.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag           The buffer for the authentication tag. This must be a
+ *                      readable buffer of at least \p tag_len Bytes. See note
+ *                      below regarding restrictions with PSA-based contexts.
+ * \param tag_len       The length of the authentication tag. This must match
+ *                      the constraints imposed by the AEAD cipher used, and in
+ *                      particular must not be \c 0.
+ *
+ * \note                If the context is based on PSA (that is, it was set up
+ *                      with mbedtls_cipher_setup_psa()), then it is required
+ *                      that \c tag == input + len. That is, the tag must be
+ *                      appended to the ciphertext as recommended by RFC 5116.
  *
  * \return              \c 0 on success.
  * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
@@ -887,9 +981,120 @@ int mbedtls_cipher_auth_decrypt( mbedtls_cipher_context_t *ctx,
                          const unsigned char *ad, size_t ad_len,
                          const unsigned char *input, size_t ilen,
                          unsigned char *output, size_t *olen,
-                         const unsigned char *tag, size_t tag_len );
+                         const unsigned char *tag, size_t tag_len )
+                         MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
 #endif /* MBEDTLS_CIPHER_MODE_AEAD */
 
+#if defined(MBEDTLS_CIPHER_MODE_AEAD) || defined(MBEDTLS_NIST_KW_C)
+/**
+ * \brief               The authenticated encryption (AEAD/NIST_KW) function.
+ *
+ * \note                For AEAD modes, the tag will be appended to the
+ *                      ciphertext, as recommended by RFC 5116.
+ *                      (NIST_KW doesn't have a separate tag.)
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key, with an AEAD algorithm or NIST_KW.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and may be \c NULL if \p
+ *                      iv_len is \c 0.
+ * \param iv_len        The length of the nonce. For AEAD ciphers, this must
+ *                      satisfy the constraints imposed by the cipher used.
+ *                      For NIST_KW, this must be \c 0.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
+ * \param ad_len        The length of \p ad. For NIST_KW, this must be \c 0.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
+ * \param ilen          The length of the input data.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p output_len Bytes, and
+ *                      must not be \c NULL.
+ * \param output_len    The length of the \p output buffer in Bytes. For AEAD
+ *                      ciphers, this must be at least \p ilen + \p tag_len.
+ *                      For NIST_KW, this must be at least \p ilen + 8
+ *                      (rounded up to a multiple of 8 if KWP is used);
+ *                      \p ilen + 15 is always a safe value.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag_len       The desired length of the authentication tag. For AEAD
+ *                      ciphers, this must match the constraints imposed by
+ *                      the cipher used, and in particular must not be \c 0.
+ *                      For NIST_KW, this must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_encrypt_ext( mbedtls_cipher_context_t *ctx,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *ad, size_t ad_len,
+                         const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t output_len,
+                         size_t *olen, size_t tag_len );
+
+/**
+ * \brief               The authenticated encryption (AEAD/NIST_KW) function.
+ *
+ * \note                If the data is not authentic, then the output buffer
+ *                      is zeroed out to prevent the unauthentic plaintext being
+ *                      used, making this interface safer.
+ *
+ * \note                For AEAD modes, the tag must be appended to the
+ *                      ciphertext, as recommended by RFC 5116.
+ *                      (NIST_KW doesn't have a separate tag.)
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key, with an AEAD algorithm or NIST_KW.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and may be \c NULL if \p
+ *                      iv_len is \c 0.
+ * \param iv_len        The length of the nonce. For AEAD ciphers, this must
+ *                      satisfy the constraints imposed by the cipher used.
+ *                      For NIST_KW, this must be \c 0.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
+ * \param ad_len        The length of \p ad. For NIST_KW, this must be \c 0.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
+ * \param ilen          The length of the input data. For AEAD ciphers this
+ *                      must be at least \p tag_len. For NIST_KW this must be
+ *                      at least \c 8.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p output_len Bytes, and
+ *                      may be \c NULL if \p output_len is \c 0.
+ * \param output_len    The length of the \p output buffer in Bytes. For AEAD
+ *                      ciphers, this must be at least \p ilen - \p tag_len.
+ *                      For NIST_KW, this must be at least \p ilen - 8.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag_len       The actual length of the authentication tag. For AEAD
+ *                      ciphers, this must match the constraints imposed by
+ *                      the cipher used, and in particular must not be \c 0.
+ *                      For NIST_KW, this must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_AUTH_FAILED if data is not authentic.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_decrypt_ext( mbedtls_cipher_context_t *ctx,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *ad, size_t ad_len,
+                         const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t output_len,
+                         size_t *olen, size_t tag_len );
+#endif /* MBEDTLS_CIPHER_MODE_AEAD || MBEDTLS_NIST_KW_C */
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h
index 88282ec9d20..2484c01c7a4 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,38 +20,21 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_CIPHER_WRAP_H
 #define MBEDTLS_CIPHER_WRAP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
 
 #ifdef __cplusplus
 extern "C" {
@@ -139,6 +116,29 @@ typedef struct
     const mbedtls_cipher_info_t *info;
 } mbedtls_cipher_definition_t;
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+typedef enum
+{
+    MBEDTLS_CIPHER_PSA_KEY_UNSET = 0,
+    MBEDTLS_CIPHER_PSA_KEY_OWNED, /* Used for PSA-based cipher contexts which */
+                                  /* use raw key material internally imported */
+                                  /* as a volatile key, and which hence need  */
+                                  /* to destroy that key when the context is  */
+                                  /* freed.                                   */
+    MBEDTLS_CIPHER_PSA_KEY_NOT_OWNED, /* Used for PSA-based cipher contexts   */
+                                      /* which use a key provided by the      */
+                                      /* user, and which hence will not be    */
+                                      /* destroyed when the context is freed. */
+} mbedtls_cipher_psa_key_ownership;
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    psa_key_id_t slot;
+    mbedtls_cipher_psa_key_ownership slot_state;
+} mbedtls_cipher_context_psa;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 extern const mbedtls_cipher_definition_t mbedtls_cipher_definitions[];
 
 extern int mbedtls_cipher_supported[];
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cmac.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cmac.h
index 5a7c9b246f0..8934886af74 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cmac.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/cmac.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,46 +21,26 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CMAC_H
 #define MBEDTLS_CMAC_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 /* MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED -0x007A  /**< CMAC hardware accelerator failed. */
+/** CMAC hardware accelerator failed. */
+#define MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED -0x007A
 
 #define MBEDTLS_AES_BLOCK_SIZE          16
 #define MBEDTLS_DES3_BLOCK_SIZE         8
@@ -100,9 +74,23 @@ struct mbedtls_cmac_context_t
 #endif /* !MBEDTLS_CMAC_ALT */
 
 /**
- * \brief               This function sets the CMAC key, and prepares to authenticate
+ * \brief               This function starts a new CMAC computation
+ *                      by setting the CMAC key, and preparing to authenticate
  *                      the input data.
- *                      Must be called with an initialized cipher context.
+ *                      It must be called with an initialized cipher context.
+ *
+ *                      Once this function has completed, data can be supplied
+ *                      to the CMAC computation by calling
+ *                      mbedtls_cipher_cmac_update().
+ *
+ *                      To start a CMAC computation using the same key as a previous
+ *                      CMAC computation, use mbedtls_cipher_cmac_finish().
+ *
+ * \note                When the CMAC implementation is supplied by an alternate
+ *                      implementation (through #MBEDTLS_CMAC_ALT), some ciphers
+ *                      may not be supported by that implementation, and thus
+ *                      return an error. Alternate implementations must support
+ *                      AES-128 and AES-256, and may support AES-192 and 3DES.
  *
  * \param ctx           The cipher context used for the CMAC operation, initialized
  *                      as one of the following types: MBEDTLS_CIPHER_AES_128_ECB,
@@ -122,9 +110,15 @@ int mbedtls_cipher_cmac_starts( mbedtls_cipher_context_t *ctx,
  * \brief               This function feeds an input buffer into an ongoing CMAC
  *                      computation.
  *
- *                      It is called between mbedtls_cipher_cmac_starts() or
- *                      mbedtls_cipher_cmac_reset(), and mbedtls_cipher_cmac_finish().
- *                      Can be called repeatedly.
+ *                      The CMAC computation must have previously been started
+ *                      by calling mbedtls_cipher_cmac_starts() or
+ *                      mbedtls_cipher_cmac_reset().
+ *
+ *                      Call this function as many times as needed to input the
+ *                      data to be authenticated.
+ *                      Once all of the required data has been input,
+ *                      call mbedtls_cipher_cmac_finish() to obtain the result
+ *                      of the CMAC operation.
  *
  * \param ctx           The cipher context used for the CMAC operation.
  * \param input         The buffer holding the input data.
@@ -138,12 +132,13 @@ int mbedtls_cipher_cmac_update( mbedtls_cipher_context_t *ctx,
                                 const unsigned char *input, size_t ilen );
 
 /**
- * \brief               This function finishes the CMAC operation, and writes
- *                      the result to the output buffer.
+ * \brief               This function finishes an ongoing CMAC operation, and
+ *                      writes the result to the output buffer.
  *
- *                      It is called after mbedtls_cipher_cmac_update().
- *                      It can be followed by mbedtls_cipher_cmac_reset() and
- *                      mbedtls_cipher_cmac_update(), or mbedtls_cipher_free().
+ *                      It should be followed either by
+ *                      mbedtls_cipher_cmac_reset(), which starts another CMAC
+ *                      operation with the same key, or mbedtls_cipher_free(),
+ *                      which clears the cipher context.
  *
  * \param ctx           The cipher context used for the CMAC operation.
  * \param output        The output buffer for the CMAC checksum result.
@@ -156,12 +151,14 @@ int mbedtls_cipher_cmac_finish( mbedtls_cipher_context_t *ctx,
                                 unsigned char *output );
 
 /**
- * \brief               This function prepares the authentication of another
- *                      message with the same key as the previous CMAC
- *                      operation.
+ * \brief               This function starts a new CMAC operation with the same
+ *                      key as the previous one.
  *
- *                      It is called after mbedtls_cipher_cmac_finish()
- *                      and before mbedtls_cipher_cmac_update().
+ *                      It should be called after finishing the previous CMAC
+ *                      operation with mbedtls_cipher_cmac_finish().
+ *                      After calling this function,
+ *                      call mbedtls_cipher_cmac_update() to supply the new
+ *                      CMAC operation with data.
  *
  * \param ctx           The cipher context used for the CMAC operation.
  *
@@ -181,6 +178,11 @@ int mbedtls_cipher_cmac_reset( mbedtls_cipher_context_t *ctx );
  *                      The CMAC result is calculated as
  *                      output = generic CMAC(cmac key, input buffer).
  *
+ * \note                When the CMAC implementation is supplied by an alternate
+ *                      implementation (through #MBEDTLS_CMAC_ALT), some ciphers
+ *                      may not be supported by that implementation, and thus
+ *                      return an error. Alternate implementations must support
+ *                      AES-128 and AES-256, and may support AES-192 and 3DES.
  *
  * \param cipher_info   The cipher information.
  * \param key           The CMAC key.
@@ -225,6 +227,13 @@ int mbedtls_aes_cmac_prf_128( const unsigned char *key, size_t key_len,
 /**
  * \brief          The CMAC checkup routine.
  *
+ * \note           In case the CMAC routines are provided by an alternative
+ *                 implementation (i.e. #MBEDTLS_CMAC_ALT is defined), the
+ *                 checkup routine will succeed even if the implementation does
+ *                 not support the less widely used AES-192 or 3DES primitives.
+ *                 The self-test requires at least AES-128 and AES-256 to be
+ *                 supported by the underlying implementation.
+ *
  * \return         \c 0 on success.
  * \return         \c 1 on failure.
  */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h
index 45e5a1cf77c..40177512cab 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,31 +21,10 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -1275,9 +1248,9 @@
 #define POLARSSL_KEY_EXCHANGE_PSK MBEDTLS_KEY_EXCHANGE_PSK
 #define POLARSSL_KEY_EXCHANGE_RSA MBEDTLS_KEY_EXCHANGE_RSA
 #define POLARSSL_KEY_EXCHANGE_RSA_PSK MBEDTLS_KEY_EXCHANGE_RSA_PSK
-#define POLARSSL_KEY_EXCHANGE__SOME__ECDHE_ENABLED MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED
-#define POLARSSL_KEY_EXCHANGE__SOME__PSK_ENABLED MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED
-#define POLARSSL_KEY_EXCHANGE__WITH_CERT__ENABLED MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED
+#define POLARSSL_KEY_EXCHANGE__SOME__ECDHE_ENABLED MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED
+#define POLARSSL_KEY_EXCHANGE__SOME__PSK_ENABLED MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE__WITH_CERT__ENABLED MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED
 #define POLARSSL_KEY_LENGTH_DES MBEDTLS_KEY_LENGTH_DES
 #define POLARSSL_KEY_LENGTH_DES_EDE MBEDTLS_KEY_LENGTH_DES_EDE
 #define POLARSSL_KEY_LENGTH_DES_EDE3 MBEDTLS_KEY_LENGTH_DES_EDE3
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/config.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/config.h
index b1d67f7a931..87b4e9192e7 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/config.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/config.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,27 +22,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CONFIG_H
@@ -251,33 +224,34 @@
 //#define MBEDTLS_PLATFORM_FPRINTF_ALT
 //#define MBEDTLS_PLATFORM_PRINTF_ALT
 //#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+//#define MBEDTLS_PLATFORM_VSNPRINTF_ALT
 //#define MBEDTLS_PLATFORM_NV_SEED_ALT
 //#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT
 
 /**
  * \def MBEDTLS_DEPRECATED_WARNING
  *
- * Mark deprecated functions so that they generate a warning if used.
- * Functions deprecated in one version will usually be removed in the next
- * version. You can enable this to help you prepare the transition to a new
- * major version by making sure your code is not using these functions.
+ * Mark deprecated functions and features so that they generate a warning if
+ * used. Functionality deprecated in one version will usually be removed in the
+ * next version. You can enable this to help you prepare the transition to a
+ * new major version by making sure your code is not using this functionality.
  *
  * This only works with GCC and Clang. With other compilers, you may want to
  * use MBEDTLS_DEPRECATED_REMOVED
  *
- * Uncomment to get warnings on using deprecated functions.
+ * Uncomment to get warnings on using deprecated functions and features.
  */
 //#define MBEDTLS_DEPRECATED_WARNING
 
 /**
  * \def MBEDTLS_DEPRECATED_REMOVED
  *
- * Remove deprecated functions so that they generate an error if used.
- * Functions deprecated in one version will usually be removed in the next
- * version. You can enable this to help you prepare the transition to a new
- * major version by making sure your code is not using these functions.
+ * Remove deprecated functions and features so that they generate an error if
+ * used. Functionality deprecated in one version will usually be removed in the
+ * next version. You can enable this to help you prepare the transition to a
+ * new major version by making sure your code is not using this functionality.
  *
- * Uncomment to get errors on using deprecated functions.
+ * Uncomment to get errors on using deprecated functions and features.
  */
 //#define MBEDTLS_DEPRECATED_REMOVED
 
@@ -319,7 +293,7 @@
  *   the function mbedtls_param_failed() in your application.
  *   See `platform_util.h` for its prototype.
  * - If you enable the macro #MBEDTLS_CHECK_PARAMS_ASSERT, then the
- *   library defines #MBEDTLS_PARAM_FAILED(\c cond) to be `assert(cond)`.
+ *   library defines MBEDTLS_PARAM_FAILED(\c cond) to be `assert(cond)`.
  *   You can still supply an alternative definition of
  *   MBEDTLS_PARAM_FAILED(), which may call `assert`.
  * - If you define a macro MBEDTLS_PARAM_FAILED() before including `config.h`
@@ -510,6 +484,11 @@
  * is still present and it is used for group structures not supported by the
  * alternative.
  *
+ * The original implementation can in addition be removed by setting the
+ * MBEDTLS_ECP_NO_FALLBACK option, in which case any function for which the
+ * corresponding MBEDTLS_ECP__FUNCTION_NAME__ALT macro is defined will not be
+ * able to fallback to curves not supported by the alternative implementation.
+ *
  * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT
  * and implementing the following functions:
  *      unsigned char mbedtls_internal_ecp_grp_capable(
@@ -523,21 +502,28 @@
  * called before and after each point operation and provide an opportunity to
  * implement optimized set up and tear down instructions.
  *
- * Example: In case you uncomment MBEDTLS_ECP_INTERNAL_ALT and
- * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac
- * function, but will use your mbedtls_internal_ecp_double_jac if the group is
- * supported (your mbedtls_internal_ecp_grp_capable function returns 1 when
- * receives it as an argument). If the group is not supported then the original
- * implementation is used. The other functions and the definition of
- * mbedtls_ecp_group and mbedtls_ecp_point will not change, so your
- * implementation of mbedtls_internal_ecp_double_jac and
- * mbedtls_internal_ecp_grp_capable must be compatible with this definition.
+ * Example: In case you set MBEDTLS_ECP_INTERNAL_ALT and
+ * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac()
+ * function, but will use your mbedtls_internal_ecp_double_jac() if the group
+ * for the operation is supported by your implementation (i.e. your
+ * mbedtls_internal_ecp_grp_capable() function returns 1 for this group). If the
+ * group is not supported by your implementation, then the original mbed TLS
+ * implementation of ecp_double_jac() is used instead, unless this fallback
+ * behaviour is disabled by setting MBEDTLS_ECP_NO_FALLBACK (in which case
+ * ecp_double_jac() will return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE).
+ *
+ * The function prototypes and the definition of mbedtls_ecp_group and
+ * mbedtls_ecp_point will not change based on MBEDTLS_ECP_INTERNAL_ALT, so your
+ * implementation of mbedtls_internal_ecp__function_name__ must be compatible
+ * with their definitions.
  *
  * Uncomment a macro to enable alternate implementation of the corresponding
  * function.
  */
 /* Required for all the functions in this section */
 //#define MBEDTLS_ECP_INTERNAL_ALT
+/* Turn off software fallback for curves not supported in hardware */
+//#define MBEDTLS_ECP_NO_FALLBACK
 /* Support for Weierstrass curves with Jacobi representation */
 //#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
 //#define MBEDTLS_ECP_ADD_MIXED_ALT
@@ -549,42 +535,6 @@
 //#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT
 //#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT
 
-/**
- * \def MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
- *
- * Enable testing of the constant-flow nature of some sensitive functions with
- * clang's MemorySanitizer. This causes some existing tests to also test
- * this non-functional property of the code under test.
- *
- * This setting requires compiling with clang -fsanitize=memory. The test
- * suites can then be run normally.
- *
- * \warning This macro is only used for extended testing; it is not considered
- * part of the library's API, so it may change or disappear at any time.
- *
- * Uncomment to enable testing of the constant-flow nature of selected code.
- */
-//#define MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
-
-/**
- * \def MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
- *
- * Enable testing of the constant-flow nature of some sensitive functions with
- * valgrind's memcheck tool. This causes some existing tests to also test
- * this non-functional property of the code under test.
- *
- * This setting requires valgrind headers for building, and is only useful for
- * testing if the tests suites are run with valgrind's memcheck. This can be
- * done for an individual test suite with 'valgrind ./test_suite_xxx', or when
- * using CMake, this can be done for all test suites with 'make memcheck'.
- *
- * \warning This macro is only used for extended testing; it is not considered
- * part of the library's API, so it may change or disappear at any time.
- *
- * Uncomment to enable testing of the constant-flow nature of selected code.
- */
-//#define MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
-
 /**
  * \def MBEDTLS_TEST_NULL_ENTROPY
  *
@@ -666,6 +616,29 @@
  */
 //#define MBEDTLS_CAMELLIA_SMALL_MEMORY
 
+/**
+ * \def MBEDTLS_CHECK_RETURN_WARNING
+ *
+ * If this macro is defined, emit a compile-time warning if application code
+ * calls a function without checking its return value, but the return value
+ * should generally be checked in portable applications.
+ *
+ * This is only supported on platforms where #MBEDTLS_CHECK_RETURN is
+ * implemented. Otherwise this option has no effect.
+ *
+ * Uncomment to get warnings on using fallible functions without checking
+ * their return value.
+ *
+ * \note  This feature is a work in progress.
+ *        Warnings will be added to more functions in the future.
+ *
+ * \note  A few functions are considered critical, and ignoring the return
+ *        value of these functions will trigger a warning even if this
+ *        macro is not defined. To completely disable return value check
+ *        warnings, define #MBEDTLS_CHECK_RETURN with an empty expansion.
+ */
+//#define MBEDTLS_CHECK_RETURN_WARNING
+
 /**
  * \def MBEDTLS_CIPHER_MODE_CBC
  *
@@ -816,6 +789,7 @@
  *
  * Comment macros to disable the curve and functions for it
  */
+/* Short Weierstrass curves (supporting ECP, ECDH, ECDSA) */
 #define MBEDTLS_ECP_DP_SECP192R1_ENABLED
 #define MBEDTLS_ECP_DP_SECP224R1_ENABLED
 #define MBEDTLS_ECP_DP_SECP256R1_ENABLED
@@ -827,6 +801,7 @@
 #define MBEDTLS_ECP_DP_BP256R1_ENABLED
 #define MBEDTLS_ECP_DP_BP384R1_ENABLED
 #define MBEDTLS_ECP_DP_BP512R1_ENABLED
+/* Montgomery curves (supporting ECP) */
 #define MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #define MBEDTLS_ECP_DP_CURVE448_ENABLED
 
@@ -849,11 +824,11 @@
  * against some side-channel attacks.
  *
  * This protection introduces a dependency of the ECP module on one of the
- * DRBG or SHA modules (HMAC-DRBG, CTR-DRBG, SHA-512 or SHA-256.) For very
- * constrained applications that don't require this protection (for example,
- * because you're only doing signature verification, so not manipulating any
- * secret, or because local/physical side-channel attacks are outside your
- * threat model), it might be desirable to get rid of that dependency.
+ * DRBG modules. For very constrained implementations that don't require this
+ * protection (for example, because you're only doing signature verification,
+ * so not manipulating any secret, or because local/physical side-channel
+ * attacks are outside your threat model), it might be desirable to get rid of
+ * that dependency.
  *
  * \warning Enabling this option makes some uses of ECP vulnerable to some
  * side-channel attacks. Only enable it if you know that's not a problem for
@@ -883,10 +858,39 @@
  *
  * \note  This option only works with the default software implementation of
  *        elliptic curve functionality. It is incompatible with
- *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT and MBEDTLS_ECDSA_XXX_ALT.
+ *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT, MBEDTLS_ECDSA_XXX_ALT
+ *        and MBEDTLS_ECDH_LEGACY_CONTEXT.
  */
 //#define MBEDTLS_ECP_RESTARTABLE
 
+/**
+ * \def MBEDTLS_ECDH_LEGACY_CONTEXT
+ *
+ * Use a backward compatible ECDH context.
+ *
+ * Mbed TLS supports two formats for ECDH contexts (#mbedtls_ecdh_context
+ * defined in `ecdh.h`). For most applications, the choice of format makes
+ * no difference, since all library functions can work with either format,
+ * except that the new format is incompatible with MBEDTLS_ECP_RESTARTABLE.
+
+ * The new format used when this option is disabled is smaller
+ * (56 bytes on a 32-bit platform). In future versions of the library, it
+ * will support alternative implementations of ECDH operations.
+ * The new format is incompatible with applications that access
+ * context fields directly and with restartable ECP operations.
+ *
+ * Define this macro if you enable MBEDTLS_ECP_RESTARTABLE or if you
+ * want to access ECDH context fields directly. Otherwise you should
+ * comment out this macro definition.
+ *
+ * This option has no effect if #MBEDTLS_ECDH_C is not enabled.
+ *
+ * \note This configuration option is experimental. Future versions of the
+ *       library may modify the way the ECDH context layout is configured
+ *       and may modify the layout of the new context type.
+ */
+#define MBEDTLS_ECDH_LEGACY_CONTEXT
+
 /**
  * \def MBEDTLS_ECDSA_DETERMINISTIC
  *
@@ -895,7 +899,7 @@
  * may result in a compromise of the long-term signing key. This is avoided by
  * the deterministic variant.
  *
- * Requires: MBEDTLS_HMAC_DRBG_C
+ * Requires: MBEDTLS_HMAC_DRBG_C, MBEDTLS_ECDSA_C
  *
  * Comment this macro to disable deterministic ECDSA.
  */
@@ -1114,7 +1118,7 @@
  *
  * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -1138,7 +1142,7 @@
  *
  * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -1289,6 +1293,18 @@
  */
 //#define MBEDTLS_ENTROPY_NV_SEED
 
+/* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+ *
+ * Enable key identifiers that encode a key owner identifier.
+ *
+ * The owner of a key is identified by a value of type ::mbedtls_key_owner_id_t
+ * which is currently hard-coded to be int32_t.
+ *
+ * Note that this option is meant for internal use only and may be removed
+ * without notice. It is incompatible with MBEDTLS_USE_PSA_CRYPTO.
+ */
+//#define MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+
 /**
  * \def MBEDTLS_MEMORY_DEBUG
  *
@@ -1345,6 +1361,114 @@
  */
 #define MBEDTLS_PKCS1_V21
 
+/** \def MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS
+ *
+ * Enable support for platform built-in keys. If you enable this feature,
+ * you must implement the function mbedtls_psa_platform_get_builtin_key().
+ * See the documentation of that function for more information.
+ *
+ * Built-in keys are typically derived from a hardware unique key or
+ * stored in a secure element.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C.
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS
+
+/** \def MBEDTLS_PSA_CRYPTO_CLIENT
+ *
+ * Enable support for PSA crypto client.
+ *
+ * \note This option allows to include the code necessary for a PSA
+ *       crypto client when the PSA crypto implementation is not included in
+ *       the library (MBEDTLS_PSA_CRYPTO_C disabled). The code included is the
+ *       code to set and get PSA key attributes.
+ *       The development of PSA drivers partially relying on the library to
+ *       fulfill the hardware gaps is another possible usage of this option.
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_CLIENT
+
+/** \def MBEDTLS_PSA_CRYPTO_DRIVERS
+ *
+ * Enable support for the experimental PSA crypto driver interface.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_DRIVERS
+
+/** \def MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG
+ *
+ * Make the PSA Crypto module use an external random generator provided
+ * by a driver, instead of Mbed TLS's entropy and DRBG modules.
+ *
+ * \note This random generator must deliver random numbers with cryptographic
+ *       quality and high performance. It must supply unpredictable numbers
+ *       with a uniform distribution. The implementation of this function
+ *       is responsible for ensuring that the random generator is seeded
+ *       with sufficient entropy. If you have a hardware TRNG which is slow
+ *       or delivers non-uniform output, declare it as an entropy source
+ *       with mbedtls_entropy_add_source() instead of enabling this option.
+ *
+ * If you enable this option, you must configure the type
+ * ::mbedtls_psa_external_random_context_t in psa/crypto_platform.h
+ * and define a function called mbedtls_psa_external_get_random()
+ * with the following prototype:
+ * ```
+ * psa_status_t mbedtls_psa_external_get_random(
+ *     mbedtls_psa_external_random_context_t *context,
+ *     uint8_t *output, size_t output_size, size_t *output_length);
+ * );
+ * ```
+ * The \c context value is initialized to 0 before the first call.
+ * The function must fill the \c output buffer with \p output_size bytes
+ * of random data and set \c *output_length to \p output_size.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ * \warning If you enable this option, code that uses the PSA cryptography
+ *          interface will not use any of the entropy sources set up for
+ *          the entropy module, nor the NV seed that MBEDTLS_ENTROPY_NV_SEED
+ *          enables.
+ *
+ * \note This option is experimental and may be removed without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_SPM
+ *
+ * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is built for SPM (Secure
+ * Partition Manager) integration which separates the code into two parts: a
+ * NSPE (Non-Secure Process Environment) and an SPE (Secure Process
+ * Environment).
+ *
+ * Module:  library/psa_crypto.c
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ */
+//#define MBEDTLS_PSA_CRYPTO_SPM
+
+/**
+ * \def MBEDTLS_PSA_INJECT_ENTROPY
+ *
+ * Enable support for entropy injection at first boot. This feature is
+ * required on systems that do not have a built-in entropy source (TRNG).
+ * This feature is currently not supported on systems that have a built-in
+ * entropy source.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_STORAGE_C, MBEDTLS_ENTROPY_NV_SEED
+ *
+ */
+//#define MBEDTLS_PSA_INJECT_ENTROPY
+
 /**
  * \def MBEDTLS_RSA_NO_CRT
  *
@@ -1379,6 +1503,28 @@
  */
 //#define MBEDTLS_SHA256_SMALLER
 
+/**
+ * \def MBEDTLS_SHA512_SMALLER
+ *
+ * Enable an implementation of SHA-512 that has lower ROM footprint but also
+ * lower performance.
+ *
+ * Uncomment to enable the smaller implementation of SHA512.
+ */
+//#define MBEDTLS_SHA512_SMALLER
+
+/**
+ * \def MBEDTLS_SHA512_NO_SHA384
+ *
+ * Disable the SHA-384 option of the SHA-512 module. Use this to save some
+ * code size on devices that don't use SHA-384.
+ *
+ * Requires: MBEDTLS_SHA512_C
+ *
+ * Uncomment to disable SHA-384
+ */
+//#define MBEDTLS_SHA512_NO_SHA384
+
 /**
  * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
  *
@@ -1393,6 +1539,48 @@
  */
 #define MBEDTLS_SSL_ALL_ALERT_MESSAGES
 
+/**
+ * \def MBEDTLS_SSL_RECORD_CHECKING
+ *
+ * Enable the function mbedtls_ssl_check_record() which can be used to check
+ * the validity and authenticity of an incoming record, to verify that it has
+ * not been seen before. These checks are performed without modifying the
+ * externally visible state of the SSL context.
+ *
+ * See mbedtls_ssl_check_record() for more information.
+ *
+ * Uncomment to enable support for record checking.
+ */
+#define MBEDTLS_SSL_RECORD_CHECKING
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CONNECTION_ID
+ *
+ * Enable support for the DTLS Connection ID extension
+ * (version draft-ietf-tls-dtls-connection-id-05,
+ * https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05)
+ * which allows to identify DTLS connections across changes
+ * in the underlying transport.
+ *
+ * Setting this option enables the SSL APIs `mbedtls_ssl_set_cid()`,
+ * `mbedtls_ssl_get_peer_cid()` and `mbedtls_ssl_conf_cid()`.
+ * See the corresponding documentation for more information.
+ *
+ * \warning The Connection ID extension is still in draft state.
+ *          We make no stability promises for the availability
+ *          or the shape of the API controlled by this option.
+ *
+ * The maximum lengths of outgoing and incoming CIDs can be configured
+ * through the options
+ * - MBEDTLS_SSL_CID_OUT_LEN_MAX
+ * - MBEDTLS_SSL_CID_IN_LEN_MAX.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment to enable the Connection ID extension.
+ */
+//#define MBEDTLS_SSL_DTLS_CONNECTION_ID
+
 /**
  * \def MBEDTLS_SSL_ASYNC_PRIVATE
  *
@@ -1404,6 +1592,33 @@
  */
 //#define MBEDTLS_SSL_ASYNC_PRIVATE
 
+/**
+ * \def MBEDTLS_SSL_CONTEXT_SERIALIZATION
+ *
+ * Enable serialization of the TLS context structures, through use of the
+ * functions mbedtls_ssl_context_save() and mbedtls_ssl_context_load().
+ *
+ * This pair of functions allows one side of a connection to serialize the
+ * context associated with the connection, then free or re-use that context
+ * while the serialized state is persisted elsewhere, and finally deserialize
+ * that state to a live context for resuming read/write operations on the
+ * connection. From a protocol perspective, the state of the connection is
+ * unaffected, in particular this is entirely transparent to the peer.
+ *
+ * Note: this is distinct from TLS session resumption, which is part of the
+ * protocol and fully visible by the peer. TLS session resumption enables
+ * establishing new connections associated to a saved session with shorter,
+ * lighter handshakes, while context serialization is a local optimization in
+ * handling a single, potentially long-lived connection.
+ *
+ * Enabling these APIs makes some SSL structures larger, as 64 extra bytes are
+ * saved after the handshake to allow for more efficient serialization, so if
+ * you don't need this feature you'll save RAM by disabling it.
+ *
+ * Comment to disable the context serialization APIs.
+ */
+#define MBEDTLS_SSL_CONTEXT_SERIALIZATION
+
 /**
  * \def MBEDTLS_SSL_DEBUG_ALL
  *
@@ -1440,8 +1655,8 @@
 
 /** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
  *
- * Enable support for Extended Master Secret, aka Session Hash
- * (draft-ietf-tls-session-hash-02).
+ * Enable support for RFC 7627: Session Hash and Extended Master Secret
+ * Extension.
  *
  * This was introduced as "the proper fix" to the Triple Handshake familiy of
  * attacks, but it is recommended to always use it (even if you disable
@@ -1459,7 +1674,8 @@
 /**
  * \def MBEDTLS_SSL_FALLBACK_SCSV
  *
- * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ * Enable support for RFC 7507: Fallback Signaling Cipher Suite Value (SCSV)
+ * for Preventing Protocol Downgrade Attacks.
  *
  * For servers, it is recommended to always enable this, unless you support
  * only one version of TLS, or know for sure that none of your clients
@@ -1473,12 +1689,37 @@
  */
 #define MBEDTLS_SSL_FALLBACK_SCSV
 
+/**
+ * \def MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+ *
+ * This option controls the availability of the API mbedtls_ssl_get_peer_cert()
+ * giving access to the peer's certificate after completion of the handshake.
+ *
+ * Unless you need mbedtls_ssl_peer_cert() in your application, it is
+ * recommended to disable this option for reduced RAM usage.
+ *
+ * \note If this option is disabled, mbedtls_ssl_get_peer_cert() is still
+ *       defined, but always returns \c NULL.
+ *
+ * \note This option has no influence on the protection against the
+ *       triple handshake attack. Even if it is disabled, Mbed TLS will
+ *       still ensure that certificates do not change during renegotiation,
+ *       for exaple by keeping a hash of the peer's certificate.
+ *
+ * Comment this macro to disable storing the peer's certificate
+ * after the handshake.
+ */
+#define MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+
 /**
  * \def MBEDTLS_SSL_HW_RECORD_ACCEL
  *
  * Enable hooking functions in SSL module for hardware acceleration of
  * individual records.
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Uncomment this macro to enable hooking functions.
  */
 //#define MBEDTLS_SSL_HW_RECORD_ACCEL
@@ -1523,6 +1764,9 @@
  * Enable support for receiving and parsing SSLv2 Client Hello messages for the
  * SSL Server module (MBEDTLS_SSL_SRV_C).
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Uncomment this macro to enable support for SSLv2 Client Hello messages.
  */
 //#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
@@ -1554,6 +1798,9 @@
  * Requires: MBEDTLS_MD5_C
  *           MBEDTLS_SHA1_C
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Comment this macro to disable support for SSL 3.0
  */
 //#define MBEDTLS_SSL_PROTO_SSL3
@@ -1594,6 +1841,25 @@
  */
 #define MBEDTLS_SSL_PROTO_TLS1_2
 
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL
+ *
+ * This macro is used to selectively enable experimental parts
+ * of the code that contribute to the ongoing development of
+ * the prototype TLS 1.3 and DTLS 1.3 implementation, and provide
+ * no other purpose.
+ *
+ * \warning TLS 1.3 and DTLS 1.3 aren't yet supported in Mbed TLS,
+ *          and no feature exposed through this macro is part of the
+ *          public API. In particular, features under the control
+ *          of this macro are experimental and don't come with any
+ *          stability guarantees.
+ *
+ * Uncomment this macro to enable experimental and partial
+ * functionality specific to TLS 1.3.
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL
+
 /**
  * \def MBEDTLS_SSL_PROTO_DTLS
  *
@@ -1651,6 +1917,37 @@
  */
 #define MBEDTLS_SSL_DTLS_HELLO_VERIFY
 
+/**
+ * \def MBEDTLS_SSL_DTLS_SRTP
+ *
+ * Enable support for negotiation of DTLS-SRTP (RFC 5764)
+ * through the use_srtp extension.
+ *
+ * \note This feature provides the minimum functionality required
+ * to negotiate the use of DTLS-SRTP and to allow the derivation of
+ * the associated SRTP packet protection key material.
+ * In particular, the SRTP packet protection itself, as well as the
+ * demultiplexing of RTP and DTLS packets at the datagram layer
+ * (see Section 5 of RFC 5764), are not handled by this feature.
+ * Instead, after successful completion of a handshake negotiating
+ * the use of DTLS-SRTP, the extended key exporter API
+ * mbedtls_ssl_conf_export_keys_ext_cb() should be used to implement
+ * the key exporter described in Section 4.2 of RFC 5764 and RFC 5705
+ * (this is implemented in the SSL example programs).
+ * The resulting key should then be passed to an SRTP stack.
+ *
+ * Setting this option enables the runtime API
+ * mbedtls_ssl_conf_dtls_srtp_protection_profiles()
+ * through which the supported DTLS-SRTP protection
+ * profiles can be configured. You must call this API at
+ * runtime if you wish to negotiate the use of DTLS-SRTP.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment this to enable support for use_srtp extension.
+ */
+//#define MBEDTLS_SSL_DTLS_SRTP
+
 /**
  * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
  *
@@ -1727,8 +2024,8 @@
  *
  * Fallback to old (pre-2.7), non-conforming implementation of the truncated
  * HMAC extension which also truncates the HMAC key. Note that this option is
- * only meant for a transitory upgrade period and is likely to be removed in
- * a future version of the library.
+ * only meant for a transitory upgrade period and will be removed in a future
+ * version of the library.
  *
  * \warning The old implementation is non-compliant and has a security weakness
  *          (2^80 brute force attack on the HMAC key used for a single,
@@ -1737,7 +2034,7 @@
  *          bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use
  *          the fixed implementation yet (pre-2.7).
  *
- * \deprecated This option is deprecated and will likely be removed in a
+ * \deprecated This option is deprecated and will be removed in a
  *             future version of Mbed TLS.
  *
  * Uncomment to fallback to old, non-compliant truncated HMAC implementation.
@@ -1746,6 +2043,52 @@
  */
 //#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
 
+/**
+ * \def MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+ *
+ * When this option is enabled, the SSL buffer will be resized automatically
+ * based on the negotiated maximum fragment length in each direction.
+ *
+ * Requires: MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ */
+//#define MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+
+/**
+ * \def MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
+ *
+ * Enable testing of the constant-flow nature of some sensitive functions with
+ * clang's MemorySanitizer. This causes some existing tests to also test
+ * this non-functional property of the code under test.
+ *
+ * This setting requires compiling with clang -fsanitize=memory. The test
+ * suites can then be run normally.
+ *
+ * \warning This macro is only used for extended testing; it is not considered
+ * part of the library's API, so it may change or disappear at any time.
+ *
+ * Uncomment to enable testing of the constant-flow nature of selected code.
+ */
+//#define MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
+
+/**
+ * \def MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
+ *
+ * Enable testing of the constant-flow nature of some sensitive functions with
+ * valgrind's memcheck tool. This causes some existing tests to also test
+ * this non-functional property of the code under test.
+ *
+ * This setting requires valgrind headers for building, and is only useful for
+ * testing if the tests suites are run with valgrind's memcheck. This can be
+ * done for an individual test suite with 'valgrind ./test_suite_xxx', or when
+ * using CMake, this can be done for all test suites with 'make memcheck'.
+ *
+ * \warning This macro is only used for extended testing; it is not considered
+ * part of the library's API, so it may change or disappear at any time.
+ *
+ * Uncomment to enable testing of the constant-flow nature of selected code.
+ */
+//#define MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
+
 /**
  * \def MBEDTLS_TEST_HOOKS
  *
@@ -1759,6 +2102,9 @@
  * risk of vulnerabilities, and more gadgets that can make exploits easier.
  * Therefore this feature must never be enabled in production.
  *
+ * See `docs/architecture/testing/mbed-crypto-invasive-testing.md` for more
+ * information.
+ *
  * Uncomment to enable invasive tests.
  */
 //#define MBEDTLS_TEST_HOOKS
@@ -1785,6 +2131,49 @@
  */
 //#define MBEDTLS_THREADING_PTHREAD
 
+/**
+ * \def MBEDTLS_USE_PSA_CRYPTO
+ *
+ * Make the X.509 and TLS library use PSA for cryptographic operations, and
+ * enable new APIs for using keys handled by PSA Crypto.
+ *
+ * \note Development of this option is currently in progress, and parts of Mbed
+ * TLS's X.509 and TLS modules are not ported to PSA yet. However, these parts
+ * will still continue to work as usual, so enabling this option should not
+ * break backwards compatibility.
+ *
+ * \note See docs/use-psa-crypto.md for a complete description of what this
+ * option currently does, and of parts that are not affected by it so far.
+ *
+ * \warning This option enables new Mbed TLS APIs which are currently
+ * considered experimental and may change in incompatible ways at any time.
+ * That is, the APIs enabled by this option are not covered by the usual
+ * promises of API stability.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C.
+ *
+ * Uncomment this to enable internal use of PSA Crypto and new associated APIs.
+ */
+//#define MBEDTLS_USE_PSA_CRYPTO
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_CONFIG
+ *
+ * This setting allows support for cryptographic mechanisms through the PSA
+ * API to be configured separately from support through the mbedtls API.
+ *
+ * Uncomment this to enable use of PSA Crypto configuration settings which
+ * can be found in include/psa/crypto_config.h.
+ *
+ * If you enable this option and write your own configuration file, you must
+ * include mbedtls/config_psa.h in your configuration file. The default
+ * provided mbedtls/config.h contains the necessary inclusion.
+ *
+ * This feature is still experimental and is not ready for production since
+ * it is not completed.
+ */
+//#define MBEDTLS_PSA_CRYPTO_CONFIG
+
 /**
  * \def MBEDTLS_VERSION_FEATURES
  *
@@ -1820,6 +2209,25 @@
  */
 //#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
 
+/**
+ * \def MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+ *
+ * If set, this enables the X.509 API `mbedtls_x509_crt_verify_with_ca_cb()`
+ * and the SSL API `mbedtls_ssl_conf_ca_cb()` which allow users to configure
+ * the set of trusted certificates through a callback instead of a linked
+ * list.
+ *
+ * This is useful for example in environments where a large number of trusted
+ * certificates is present and storing them in a linked list isn't efficient
+ * enough, or when the set of trusted certificates changes frequently.
+ *
+ * See the documentation of `mbedtls_x509_crt_verify_with_ca_cb()` and
+ * `mbedtls_ssl_conf_ca_cb()` for more information.
+ *
+ * Uncomment to enable trusted certificate callbacks.
+ */
+//#define MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+
 /**
  * \def MBEDTLS_X509_CHECK_KEY_USAGE
  *
@@ -2244,6 +2652,11 @@
  * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
  * ciphers.
  *
+ * \note When #MBEDTLS_CMAC_ALT is active, meaning that the underlying
+ *       implementation of the CMAC algorithm is provided by an alternate
+ *       implementation, that alternate implementation may opt to not support
+ *       AES-192 or 3DES as underlying block ciphers for the CMAC operation.
+ *
  * Module:  library/cmac.c
  *
  * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
@@ -2362,7 +2775,9 @@
  * This module is used by the following key exchanges:
  *      ECDHE-ECDSA
  *
- * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C,
+ *           and at least one MBEDTLS_ECP_DP_XXX_ENABLED for a
+ *           short Weierstrass curve.
  */
 #define MBEDTLS_ECDSA_C
 
@@ -2428,11 +2843,11 @@
 /**
  * \def MBEDTLS_GCM_C
  *
- * Enable the Galois/Counter Mode (GCM) for AES.
+ * Enable the Galois/Counter Mode (GCM).
  *
  * Module:  library/gcm.c
  *
- * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C or MBEDTLS_ARIA_C
  *
  * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
  * requisites are enabled as well.
@@ -2739,7 +3154,10 @@
 /**
  * \def MBEDTLS_PKCS11_C
  *
- * Enable wrapper for PKCS#11 smartcard support.
+ * Enable wrapper for PKCS#11 smartcard support via the pkcs11-helper library.
+ *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
  *
  * Module:  library/pkcs11.c
  * Caller:  library/pk.c
@@ -2797,6 +3215,61 @@
  */
 #define MBEDTLS_POLY1305_C
 
+/**
+ * \def MBEDTLS_PSA_CRYPTO_C
+ *
+ * Enable the Platform Security Architecture cryptography API.
+ *
+ * Module:  library/psa_crypto.c
+ *
+ * Requires: either MBEDTLS_CTR_DRBG_C and MBEDTLS_ENTROPY_C,
+ *           or MBEDTLS_HMAC_DRBG_C and MBEDTLS_ENTROPY_C,
+ *           or MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG.
+ *
+ */
+#define MBEDTLS_PSA_CRYPTO_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_SE_C
+ *
+ * Enable secure element support in the Platform Security Architecture
+ * cryptography API.
+ *
+ * \warning This feature is not yet suitable for production. It is provided
+ *          for API evaluation and testing purposes only.
+ *
+ * Module:  library/psa_crypto_se.c
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C, MBEDTLS_PSA_CRYPTO_STORAGE_C
+ *
+ */
+//#define MBEDTLS_PSA_CRYPTO_SE_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_STORAGE_C
+ *
+ * Enable the Platform Security Architecture persistent key storage.
+ *
+ * Module:  library/psa_crypto_storage.c
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C,
+ *           either MBEDTLS_PSA_ITS_FILE_C or a native implementation of
+ *           the PSA ITS interface
+ */
+#define MBEDTLS_PSA_CRYPTO_STORAGE_C
+
+/**
+ * \def MBEDTLS_PSA_ITS_FILE_C
+ *
+ * Enable the emulation of the Platform Security Architecture
+ * Internal Trusted Storage (PSA ITS) over files.
+ *
+ * Module:  library/psa_its_file.c
+ *
+ * Requires: MBEDTLS_FS_IO
+ */
+#define MBEDTLS_PSA_ITS_FILE_C
+
 /**
  * \def MBEDTLS_RIPEMD160_C
  *
@@ -3160,8 +3633,8 @@
 //#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT      384 /**< Maximum size of (re)seed buffer */
 
 /* ECP options */
-//#define MBEDTLS_ECP_MAX_BITS             521 /**< Maximum bit size of groups */
-//#define MBEDTLS_ECP_WINDOW_SIZE            6 /**< Maximum window size used */
+//#define MBEDTLS_ECP_MAX_BITS             521 /**< Maximum bit size of groups. Normally determined automatically from the configured curves. */
+//#define MBEDTLS_ECP_WINDOW_SIZE            4 /**< Maximum window size used */
 //#define MBEDTLS_ECP_FIXED_POINT_OPTIM      1 /**< Enable fixed-point speed-up */
 
 /* Entropy options */
@@ -3199,6 +3672,7 @@
 //#define MBEDTLS_PLATFORM_PRINTF_MACRO        printf /**< Default printf macro to use, can be undefined */
 /* Note: your snprintf must correctly zero-terminate the buffer! */
 //#define MBEDTLS_PLATFORM_SNPRINTF_MACRO    snprintf /**< Default snprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_VSNPRINTF_MACRO    vsnprintf /**< Default vsnprintf macro to use, can be undefined */
 //#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO   mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
 //#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO  mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
 
@@ -3238,6 +3712,53 @@
  */
 //#define MBEDTLS_PARAM_FAILED( cond )               assert( cond )
 
+/** \def MBEDTLS_CHECK_RETURN
+ *
+ * This macro is used at the beginning of the declaration of a function
+ * to indicate that its return value should be checked. It should
+ * instruct the compiler to emit a warning or an error if the function
+ * is called without checking its return value.
+ *
+ * There is a default implementation for popular compilers in platform_util.h.
+ * You can override the default implementation by defining your own here.
+ *
+ * If the implementation here is empty, this will effectively disable the
+ * checking of functions' return values.
+ */
+//#define MBEDTLS_CHECK_RETURN __attribute__((__warn_unused_result__))
+
+/** \def MBEDTLS_IGNORE_RETURN
+ *
+ * This macro requires one argument, which should be a C function call.
+ * If that function call would cause a #MBEDTLS_CHECK_RETURN warning, this
+ * warning is suppressed.
+ */
+//#define MBEDTLS_IGNORE_RETURN( result ) ((void) !(result))
+
+/* PSA options */
+/**
+ * Use HMAC_DRBG with the specified hash algorithm for HMAC_DRBG for the
+ * PSA crypto subsystem.
+ *
+ * If this option is unset:
+ * - If CTR_DRBG is available, the PSA subsystem uses it rather than HMAC_DRBG.
+ * - Otherwise, the PSA subsystem uses HMAC_DRBG with either
+ *   #MBEDTLS_MD_SHA512 or #MBEDTLS_MD_SHA256 based on availability and
+ *   on unspecified heuristics.
+ */
+//#define MBEDTLS_PSA_HMAC_DRBG_MD_TYPE MBEDTLS_MD_SHA256
+
+/** \def MBEDTLS_PSA_KEY_SLOT_COUNT
+ * Restrict the PSA library to supporting a maximum amount of simultaneously
+ * loaded keys. A loaded key is a key stored by the PSA Crypto core as a
+ * volatile key, or a persistent key which is loaded temporarily by the
+ * library as part of a crypto operation in flight.
+ *
+ * If this option is unset, the library will fall back to a default value of
+ * 32 keys.
+ */
+//#define MBEDTLS_PSA_KEY_SLOT_COUNT 32
+
 /* SSL Cache options */
 //#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT       86400 /**< 1 day  */
 //#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES      50 /**< Maximum entries in cache */
@@ -3295,6 +3816,53 @@
  */
 //#define MBEDTLS_SSL_IN_CONTENT_LEN              16384
 
+/** \def MBEDTLS_SSL_CID_IN_LEN_MAX
+ *
+ * The maximum length of CIDs used for incoming DTLS messages.
+ *
+ */
+//#define MBEDTLS_SSL_CID_IN_LEN_MAX 32
+
+/** \def MBEDTLS_SSL_CID_OUT_LEN_MAX
+ *
+ * The maximum length of CIDs used for outgoing DTLS messages.
+ *
+ */
+//#define MBEDTLS_SSL_CID_OUT_LEN_MAX 32
+
+/** \def MBEDTLS_SSL_CID_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * when using the Connection ID extension in DTLS 1.2.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ *
+ */
+//#define MBEDTLS_SSL_CID_PADDING_GRANULARITY 16
+
+/** \def MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * in TLS 1.3.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ */
+//#define MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY 1
+
 /** \def MBEDTLS_SSL_OUT_CONTENT_LEN
  *
  * Maximum length (in bytes) of outgoing plaintext fragments.
@@ -3324,7 +3892,7 @@
  * Maximum number of heap-allocated bytes for the purpose of
  * DTLS handshake message reassembly and future message buffering.
  *
- * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN
+ * This should be at least 9/8 * MBEDTLS_SSL_IN_CONTENT_LEN
  * to account for a reassembled handshake message of maximum size,
  * together with its reassembly bitmap.
  *
@@ -3340,6 +3908,17 @@
 //#define MBEDTLS_PSK_MAX_LEN               32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */
 //#define MBEDTLS_SSL_COOKIE_TIMEOUT        60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
 
+/** \def MBEDTLS_TLS_EXT_CID
+ *
+ * At the time of writing, the CID extension has not been assigned its
+ * final value. Set this configuration option to make Mbed TLS use a
+ * different value.
+ *
+ * A future minor revision of Mbed TLS may change the default value of
+ * this option to match evolving standards and usage.
+ */
+//#define MBEDTLS_TLS_EXT_CID                        254
+
 /**
  * Complete list of ciphersuites to use, in order of preference.
  *
@@ -3358,20 +3937,6 @@
 //#define MBEDTLS_X509_MAX_INTERMEDIATE_CA   8   /**< Maximum number of intermediate CAs in a verification chain. */
 //#define MBEDTLS_X509_MAX_FILE_PATH_LEN     512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */
 
-/**
- * Allow SHA-1 in the default TLS configuration for certificate signing.
- * Without this build-time option, SHA-1 support must be activated explicitly
- * through mbedtls_ssl_conf_cert_profile. Turning on this option is not
- * recommended because of it is possible to generate SHA-1 collisions, however
- * this may be safe for legacy infrastructure where additional controls apply.
- *
- * \warning   SHA-1 is considered a weak message digest and its use constitutes
- *            a security risk. If possible, we recommend avoiding dependencies
- *            on it, and considering stronger message digests instead.
- *
- */
-// #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES
-
 /**
  * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
  * signature and ciphersuite selection. Without this build-time option, SHA-1
@@ -3387,7 +3952,7 @@
  *            on it, and considering stronger message digests instead.
  *
  */
-#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
+//#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
 
 /**
  * Uncomment the macro to let mbed TLS use your alternate implementation of
@@ -3428,6 +3993,15 @@
  */
 //#define MBEDTLS_PLATFORM_GMTIME_R_ALT
 
+/**
+ * Enable the verified implementations of ECDH primitives from Project Everest
+ * (currently only Curve25519). This feature changes the layout of ECDH
+ * contexts and therefore is a compatibility break for applications that access
+ * fields of a mbedtls_ecdh_context structure directly. See also
+ * MBEDTLS_ECDH_LEGACY_CONTEXT in include/mbedtls/ecdh.h.
+ */
+//#define MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED
+
 /* \} name SECTION: Customisation configuration options */
 
 /* Target and application specific configurations
@@ -3439,6 +4013,10 @@
 #include MBEDTLS_USER_CONFIG_FILE
 #endif
 
-#include "check_config.h"
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+#include "mbedtls/config_psa.h"
+#endif
+
+#include "mbedtls/check_config.h"
 
 #endif /* MBEDTLS_CONFIG_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/config_psa.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/config_psa.h
new file mode 100644
index 00000000000..189f6c21734
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/config_psa.h
@@ -0,0 +1,836 @@
+/**
+ * \file mbedtls/config_psa.h
+ * \brief PSA crypto configuration options (set of defines)
+ *
+ *  This set of compile-time options takes settings defined in
+ *  include/mbedtls/config.h and include/psa/crypto_config.h and uses
+ *  those definitions to define symbols used in the library code.
+ *
+ *  Users and integrators should not edit this file, please edit
+ *  include/mbedtls/config.h for MBETLS_XXX settings or
+ *  include/psa/crypto_config.h for PSA_WANT_XXX settings.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CONFIG_PSA_H
+#define MBEDTLS_CONFIG_PSA_H
+
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+#include "psa/crypto_config.h"
+#endif /* defined(MBEDTLS_PSA_CRYPTO_CONFIG) */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+/****************************************************************/
+/* De facto synonyms */
+/****************************************************************/
+
+#if defined(PSA_WANT_ALG_ECDSA_ANY) && !defined(PSA_WANT_ALG_ECDSA)
+#define PSA_WANT_ALG_ECDSA PSA_WANT_ALG_ECDSA_ANY
+#elif !defined(PSA_WANT_ALG_ECDSA_ANY) && defined(PSA_WANT_ALG_ECDSA)
+#define PSA_WANT_ALG_ECDSA_ANY PSA_WANT_ALG_ECDSA
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW) && !defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW
+#elif !defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW) && defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW PSA_WANT_ALG_RSA_PKCS1V15_SIGN
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_PSS_ANY_SALT) && !defined(PSA_WANT_ALG_RSA_PSS)
+#define PSA_WANT_ALG_RSA_PSS PSA_WANT_ALG_RSA_PSS_ANY_SALT
+#elif !defined(PSA_WANT_ALG_RSA_PSS_ANY_SALT) && defined(PSA_WANT_ALG_RSA_PSS)
+#define PSA_WANT_ALG_RSA_PSS_ANY_SALT PSA_WANT_ALG_RSA_PSS
+#endif
+
+
+
+/****************************************************************/
+/* Require built-in implementations based on PSA requirements */
+/****************************************************************/
+
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+
+#if defined(PSA_WANT_ALG_DETERMINISTIC_ECDSA)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_DETERMINISTIC_ECDSA)
+#define MBEDTLS_PSA_BUILTIN_ALG_DETERMINISTIC_ECDSA 1
+#define MBEDTLS_ECDSA_DETERMINISTIC
+#define MBEDTLS_ECDSA_C
+#define MBEDTLS_HMAC_DRBG_C
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_DETERMINISTIC_ECDSA */
+#endif /* PSA_WANT_ALG_DETERMINISTIC_ECDSA */
+
+#if defined(PSA_WANT_ALG_ECDH)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_ECDH)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDH 1
+#define MBEDTLS_ECDH_C
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_ECDH */
+#endif /* PSA_WANT_ALG_ECDH */
+
+#if defined(PSA_WANT_ALG_ECDSA)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_ECDSA)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDSA 1
+#define MBEDTLS_ECDSA_C
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_ECDSA */
+#endif /* PSA_WANT_ALG_ECDSA */
+
+#if defined(PSA_WANT_ALG_HKDF)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_HKDF)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define MBEDTLS_PSA_BUILTIN_ALG_HKDF 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_HKDF */
+#endif /* PSA_WANT_ALG_HKDF */
+
+#if defined(PSA_WANT_ALG_HMAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_HMAC)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_HMAC */
+#endif /* PSA_WANT_ALG_HMAC */
+
+#if defined(PSA_WANT_ALG_MD2) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD2)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD2 1
+#define MBEDTLS_MD2_C
+#endif
+
+#if defined(PSA_WANT_ALG_MD4) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD4)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD4 1
+#define MBEDTLS_MD4_C
+#endif
+
+#if defined(PSA_WANT_ALG_MD5) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD5)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD5 1
+#define MBEDTLS_MD5_C
+#endif
+
+#if defined(PSA_WANT_ALG_RIPEMD160) && !defined(MBEDTLS_PSA_ACCEL_ALG_RIPEMD160)
+#define MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160 1
+#define MBEDTLS_RIPEMD160_C
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_OAEP)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_OAEP)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_OAEP 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V21
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_OAEP */
+#endif /* PSA_WANT_ALG_RSA_OAEP */
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_CRYPT)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_CRYPT)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_CRYPT 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V15
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_CRYPT */
+#endif /* PSA_WANT_ALG_RSA_PKCS1V15_CRYPT */
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_SIGN)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_SIGN 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V15
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_SIGN */
+#endif /* PSA_WANT_ALG_RSA_PKCS1V15_SIGN */
+
+#if defined(PSA_WANT_ALG_RSA_PSS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PSS)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PSS 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V21
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PSS */
+#endif /* PSA_WANT_ALG_RSA_PSS */
+
+#if defined(PSA_WANT_ALG_SHA_1) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_1)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_1 1
+#define MBEDTLS_SHA1_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_224) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_224)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_224 1
+#define MBEDTLS_SHA256_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_256) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_256)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_256 1
+#define MBEDTLS_SHA256_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_384) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_384)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_384 1
+#define MBEDTLS_SHA512_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_512) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_512)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_512 1
+#define MBEDTLS_SHA512_C
+#endif
+
+#if defined(PSA_WANT_ALG_TLS12_PRF)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_TLS12_PRF)
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_TLS12_PRF */
+#endif /* PSA_WANT_ALG_TLS12_PRF */
+
+#if defined(PSA_WANT_ALG_TLS12_PSK_TO_MS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_TLS12_PSK_TO_MS)
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_TLS12_PSK_TO_MS */
+#endif /* PSA_WANT_ALG_TLS12_PSK_TO_MS */
+
+#if defined(PSA_WANT_KEY_TYPE_ECC_KEY_PAIR)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_KEY_PAIR)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_KEY_PAIR 1
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_KEY_PAIR */
+#endif /* PSA_WANT_KEY_TYPE_ECC_KEY_PAIR */
+
+#if defined(PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_PUBLIC_KEY)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_PUBLIC_KEY 1
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_PUBLIC_KEY */
+#endif /* PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY */
+
+#if defined(PSA_WANT_KEY_TYPE_RSA_KEY_PAIR)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_KEY_PAIR)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_KEY_PAIR 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_GENPRIME
+#define MBEDTLS_PK_PARSE_C
+#define MBEDTLS_PK_WRITE_C
+#define MBEDTLS_PK_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_KEY_PAIR */
+#endif /* PSA_WANT_KEY_TYPE_RSA_KEY_PAIR */
+
+#if defined(PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_PUBLIC_KEY)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_PUBLIC_KEY 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PK_PARSE_C
+#define MBEDTLS_PK_WRITE_C
+#define MBEDTLS_PK_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_PUBLIC_KEY */
+#endif /* PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY */
+
+/* If any of the block modes are requested that don't have an
+ * associated HW assist, define PSA_HAVE_SOFT_BLOCK_MODE for checking
+ * in the block cipher key types. */
+#if (defined(PSA_WANT_ALG_CTR) && !defined(MBEDTLS_PSA_ACCEL_ALG_CTR)) || \
+    (defined(PSA_WANT_ALG_CFB) && !defined(MBEDTLS_PSA_ACCEL_ALG_CFB)) || \
+    (defined(PSA_WANT_ALG_OFB) && !defined(MBEDTLS_PSA_ACCEL_ALG_OFB)) || \
+    (defined(PSA_WANT_ALG_XTS) && !defined(MBEDTLS_PSA_ACCEL_ALG_XTS)) || \
+    defined(PSA_WANT_ALG_ECB_NO_PADDING) || \
+    (defined(PSA_WANT_ALG_CBC_NO_PADDING) && \
+     !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_NO_PADDING)) || \
+    (defined(PSA_WANT_ALG_CBC_PKCS7) && \
+     !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_PKCS7)) || \
+    (defined(PSA_WANT_ALG_CMAC) && !defined(MBEDTLS_PSA_ACCEL_ALG_CMAC))
+#define PSA_HAVE_SOFT_BLOCK_MODE 1
+#endif
+
+#if (defined(PSA_WANT_ALG_GCM) && !defined(MBEDTLS_PSA_ACCEL_ALG_GCM)) || \
+    (defined(PSA_WANT_ALG_CCM) && !defined(MBEDTLS_PSA_ACCEL_ALG_CCM))
+#define PSA_HAVE_SOFT_BLOCK_AEAD 1
+#endif
+
+#if defined(PSA_WANT_KEY_TYPE_AES)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_AES)
+#define PSA_HAVE_SOFT_KEY_TYPE_AES 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_AES */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_AES 1
+#define MBEDTLS_AES_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_AES || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_AES */
+
+#if defined(PSA_WANT_KEY_TYPE_ARC4)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ARC4)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARC4 1
+#define MBEDTLS_ARC4_C
+#endif /*!MBEDTLS_PSA_ACCEL_KEY_TYPE_ARC4 */
+#endif /* PSA_WANT_KEY_TYPE_ARC4 */
+
+#if defined(PSA_WANT_KEY_TYPE_ARIA)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ARIA)
+#define PSA_HAVE_SOFT_KEY_TYPE_ARIA 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ARIA */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARIA 1
+#define MBEDTLS_ARIA_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_ARIA || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_ARIA */
+
+#if defined(PSA_WANT_KEY_TYPE_CAMELLIA)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_CAMELLIA)
+#define PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_CAMELLIA */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CAMELLIA 1
+#define MBEDTLS_CAMELLIA_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_CAMELLIA */
+
+#if defined(PSA_WANT_KEY_TYPE_DES)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_DES)
+#define PSA_HAVE_SOFT_KEY_TYPE_DES 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_DES */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_DES) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_DES 1
+#define MBEDTLS_DES_C
+#endif /*PSA_HAVE_SOFT_KEY_TYPE_DES || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_DES */
+
+#if defined(PSA_WANT_KEY_TYPE_CHACHA20)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_CHACHA20)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CHACHA20 1
+#define MBEDTLS_CHACHA20_C
+#endif /*!MBEDTLS_PSA_ACCEL_KEY_TYPE_CHACHA20 */
+#endif /* PSA_WANT_KEY_TYPE_CHACHA20 */
+
+/* If any of the software block ciphers are selected, define
+ * PSA_HAVE_SOFT_BLOCK_CIPHER, which can be used in any of these
+ * situations. */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_DES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define PSA_HAVE_SOFT_BLOCK_CIPHER 1
+#endif
+
+#if defined(PSA_WANT_ALG_STREAM_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#endif /* PSA_WANT_ALG_STREAM_CIPHER */
+
+#if defined(PSA_WANT_ALG_CBC_MAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_MAC)
+#error "CBC-MAC is not yet supported via the PSA API in Mbed TLS."
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_MAC 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CBC_MAC */
+#endif /* PSA_WANT_ALG_CBC_MAC */
+
+#if defined(PSA_WANT_ALG_CMAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CMAC) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CMAC 1
+#define MBEDTLS_CMAC_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CMAC */
+#endif /* PSA_WANT_ALG_CMAC */
+
+#if defined(PSA_WANT_ALG_CTR)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CTR) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CTR 1
+#define MBEDTLS_CIPHER_MODE_CTR
+#endif
+#endif /* PSA_WANT_ALG_CTR */
+
+#if defined(PSA_WANT_ALG_CFB)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CFB) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CFB 1
+#define MBEDTLS_CIPHER_MODE_CFB
+#endif
+#endif /* PSA_WANT_ALG_CFB */
+
+#if defined(PSA_WANT_ALG_OFB)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_OFB) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_OFB 1
+#define MBEDTLS_CIPHER_MODE_OFB
+#endif
+#endif /* PSA_WANT_ALG_OFB */
+
+#if defined(PSA_WANT_ALG_XTS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_XTS) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_XTS 1
+#define MBEDTLS_CIPHER_MODE_XTS
+#endif
+#endif /* PSA_WANT_ALG_XTS */
+
+#if defined(PSA_WANT_ALG_ECB_NO_PADDING)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING 1
+#endif
+
+#if defined(PSA_WANT_ALG_CBC_NO_PADDING)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_NO_PADDING) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_CIPHER_MODE_CBC
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING 1
+#endif
+#endif /* PSA_WANT_ALG_CBC_NO_PADDING */
+
+#if defined(PSA_WANT_ALG_CBC_PKCS7)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_PKCS7) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_CIPHER_MODE_CBC
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7 1
+#define MBEDTLS_CIPHER_PADDING_PKCS7
+#endif
+#endif /* PSA_WANT_ALG_CBC_PKCS7 */
+
+#if defined(PSA_WANT_ALG_CCM)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CCM) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define MBEDTLS_PSA_BUILTIN_ALG_CCM 1
+#define MBEDTLS_CCM_C
+#endif
+#endif /* PSA_WANT_ALG_CCM */
+
+#if defined(PSA_WANT_ALG_GCM)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_GCM) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define MBEDTLS_PSA_BUILTIN_ALG_GCM 1
+#define MBEDTLS_GCM_C
+#endif
+#endif /* PSA_WANT_ALG_GCM */
+
+#if defined(PSA_WANT_ALG_CHACHA20_POLY1305)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CHACHA20_POLY1305)
+#if defined(PSA_WANT_KEY_TYPE_CHACHA20)
+#define MBEDTLS_CHACHAPOLY_C
+#define MBEDTLS_PSA_BUILTIN_ALG_CHACHA20_POLY1305 1
+#endif /* PSA_WANT_KEY_TYPE_CHACHA20 */
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CHACHA20_POLY1305 */
+#endif /* PSA_WANT_ALG_CHACHA20_POLY1305 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_256)
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_256 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_256 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_384)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_384)
+#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_384 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_384 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_384 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_512)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_512)
+#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_512 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_512 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_512 */
+
+#if defined(PSA_WANT_ECC_MONTGOMERY_255)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_255)
+#define MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_255 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_255 */
+#endif /* PSA_WANT_ECC_MONTGOMERY_255 */
+
+#if defined(PSA_WANT_ECC_MONTGOMERY_448)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_448)
+/*
+ * Curve448 is not yet supported via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/4249).
+ */
+#error "Curve448 is not yet supported via the PSA API in Mbed TLS."
+#define MBEDTLS_ECP_DP_CURVE448_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_448 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_448 */
+#endif /* PSA_WANT_ECC_MONTGOMERY_448 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_192)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_192)
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_192 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_192 */
+#endif /* PSA_WANT_ECC_SECP_R1_192 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_224)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_224)
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_224 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_224 */
+#endif /* PSA_WANT_ECC_SECP_R1_224 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_256)
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_256 */
+#endif /* PSA_WANT_ECC_SECP_R1_256 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_384)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_384)
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_384 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_384 */
+#endif /* PSA_WANT_ECC_SECP_R1_384 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_521)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_521)
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_521 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_521 */
+#endif /* PSA_WANT_ECC_SECP_R1_521 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_192)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_192)
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_192 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_192 */
+#endif /* PSA_WANT_ECC_SECP_K1_192 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_224)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_224)
+/*
+ * SECP224K1 is buggy via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/3541).
+ */
+#error "SECP224K1 is buggy via the PSA API in Mbed TLS."
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_224 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_224 */
+#endif /* PSA_WANT_ECC_SECP_K1_224 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_256)
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_256 */
+#endif /* PSA_WANT_ECC_SECP_K1_256 */
+
+
+
+/****************************************************************/
+/* Infer PSA requirements from Mbed TLS capabilities */
+/****************************************************************/
+
+#else /* MBEDTLS_PSA_CRYPTO_CONFIG */
+
+/*
+ * Ensure PSA_WANT_* defines are setup properly if MBEDTLS_PSA_CRYPTO_CONFIG
+ * is not defined
+ */
+
+#if defined(MBEDTLS_CCM_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_CCM 1
+#define PSA_WANT_ALG_CCM 1
+#endif /* MBEDTLS_CCM_C */
+
+#if defined(MBEDTLS_CMAC_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_CMAC 1
+#define PSA_WANT_ALG_CMAC 1
+#endif /* MBEDTLS_CMAC_C */
+
+#if defined(MBEDTLS_ECDH_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDH 1
+#define PSA_WANT_ALG_ECDH 1
+#endif /* MBEDTLS_ECDH_C */
+
+#if defined(MBEDTLS_ECDSA_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDSA 1
+#define PSA_WANT_ALG_ECDSA 1
+#define PSA_WANT_ALG_ECDSA_ANY 1
+
+// Only add in DETERMINISTIC support if ECDSA is also enabled
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+#define MBEDTLS_PSA_BUILTIN_ALG_DETERMINISTIC_ECDSA 1
+#define PSA_WANT_ALG_DETERMINISTIC_ECDSA 1
+#endif /* MBEDTLS_ECDSA_DETERMINISTIC */
+
+#endif /* MBEDTLS_ECDSA_C */
+
+#if defined(MBEDTLS_ECP_C)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_KEY_PAIR 1
+#define PSA_WANT_KEY_TYPE_ECC_KEY_PAIR 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_PUBLIC_KEY 1
+#define PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY 1
+#endif /* MBEDTLS_ECP_C */
+
+#if defined(MBEDTLS_GCM_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_GCM 1
+#define PSA_WANT_ALG_GCM 1
+#endif /* MBEDTLS_GCM_C */
+
+#if defined(MBEDTLS_HKDF_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define PSA_WANT_ALG_HMAC 1
+#define MBEDTLS_PSA_BUILTIN_ALG_HKDF 1
+#define PSA_WANT_ALG_HKDF 1
+#endif /* MBEDTLS_HKDF_C */
+
+#if defined(MBEDTLS_MD_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define PSA_WANT_ALG_HMAC 1
+#define PSA_WANT_KEY_TYPE_HMAC
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF 1
+#define PSA_WANT_ALG_TLS12_PRF 1
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS 1
+#define PSA_WANT_ALG_TLS12_PSK_TO_MS 1
+#endif /* MBEDTLS_MD_C */
+
+#if defined(MBEDTLS_MD2_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD2 1
+#define PSA_WANT_ALG_MD2 1
+#endif
+
+#if defined(MBEDTLS_MD4_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD4 1
+#define PSA_WANT_ALG_MD4 1
+#endif
+
+#if defined(MBEDTLS_MD5_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD5 1
+#define PSA_WANT_ALG_MD5 1
+#endif
+
+#if defined(MBEDTLS_RIPEMD160_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160 1
+#define PSA_WANT_ALG_RIPEMD160 1
+#endif
+
+#if defined(MBEDTLS_RSA_C)
+#if defined(MBEDTLS_PKCS1_V15)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_CRYPT 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_CRYPT 1
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_SIGN 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW 1
+#endif /* MBEDTLS_PKCS1_V15 */
+#if defined(MBEDTLS_PKCS1_V21)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_OAEP 1
+#define PSA_WANT_ALG_RSA_OAEP 1
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PSS 1
+#define PSA_WANT_ALG_RSA_PSS 1
+#endif /* MBEDTLS_PKCS1_V21 */
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_KEY_PAIR 1
+#define PSA_WANT_KEY_TYPE_RSA_KEY_PAIR 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_PUBLIC_KEY 1
+#define PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY 1
+#endif /* MBEDTLS_RSA_C */
+
+#if defined(MBEDTLS_SHA1_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_1 1
+#define PSA_WANT_ALG_SHA_1 1
+#endif
+
+#if defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_224 1
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_256 1
+#define PSA_WANT_ALG_SHA_224 1
+#define PSA_WANT_ALG_SHA_256 1
+#endif
+
+#if defined(MBEDTLS_SHA512_C)
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_384 1
+#define PSA_WANT_ALG_SHA_384 1
+#endif
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_512 1
+#define PSA_WANT_ALG_SHA_512 1
+#endif
+
+#if defined(MBEDTLS_AES_C)
+#define PSA_WANT_KEY_TYPE_AES 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_AES 1
+#endif
+
+#if defined(MBEDTLS_ARC4_C)
+#define PSA_WANT_KEY_TYPE_ARC4 1
+#define PSA_WANT_ALG_STREAM_CIPHER 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARC4 1
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#endif
+
+#if defined(MBEDTLS_ARIA_C)
+#define PSA_WANT_KEY_TYPE_ARIA 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARIA 1
+#endif
+
+#if defined(MBEDTLS_CAMELLIA_C)
+#define PSA_WANT_KEY_TYPE_CAMELLIA 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CAMELLIA 1
+#endif
+
+#if defined(MBEDTLS_DES_C)
+#define PSA_WANT_KEY_TYPE_DES 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_DES 1
+#endif
+
+#if defined(MBEDTLS_CHACHA20_C)
+#define PSA_WANT_KEY_TYPE_CHACHA20 1
+#define PSA_WANT_ALG_STREAM_CIPHER 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CHACHA20 1
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#if defined(MBEDTLS_CHACHAPOLY_C)
+#define PSA_WANT_ALG_CHACHA20_POLY1305 1
+#define MBEDTLS_PSA_BUILTIN_ALG_CHACHA20_POLY1305 1
+#endif
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING 1
+#define PSA_WANT_ALG_CBC_NO_PADDING 1
+#if defined(MBEDTLS_CIPHER_PADDING_PKCS7)
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7 1
+#define PSA_WANT_ALG_CBC_PKCS7 1
+#endif
+#endif
+
+#if defined(MBEDTLS_AES_C) || defined(MBEDTLS_DES_C) || \
+    defined(MBEDTLS_ARIA_C) || defined(MBEDTLS_CAMELLIA_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING 1
+#define PSA_WANT_ALG_ECB_NO_PADDING 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+#define MBEDTLS_PSA_BUILTIN_ALG_CFB 1
+#define PSA_WANT_ALG_CFB 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+#define MBEDTLS_PSA_BUILTIN_ALG_CTR 1
+#define PSA_WANT_ALG_CTR 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_OFB)
+#define MBEDTLS_PSA_BUILTIN_ALG_OFB 1
+#define PSA_WANT_ALG_OFB 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+#define MBEDTLS_PSA_BUILTIN_ALG_XTS 1
+#define PSA_WANT_ALG_XTS 1
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_256 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_256
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_384 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_384
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_512 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_512
+#endif
+
+#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_255 1
+#define PSA_WANT_ECC_MONTGOMERY_255
+#endif
+
+/* Curve448 is not yet supported via the PSA API (https://github.com/ARMmbed/mbedtls/issues/4249) */
+#if 0 && defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_448 1
+#define PSA_WANT_ECC_MONTGOMERY_448
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_192 1
+#define PSA_WANT_ECC_SECP_R1_192
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_224 1
+#define PSA_WANT_ECC_SECP_R1_224
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_256 1
+#define PSA_WANT_ECC_SECP_R1_256
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_384 1
+#define PSA_WANT_ECC_SECP_R1_384
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_521 1
+#define PSA_WANT_ECC_SECP_R1_521
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_192 1
+#define PSA_WANT_ECC_SECP_K1_192
+#endif
+
+/* SECP224K1 is buggy via the PSA API (https://github.com/ARMmbed/mbedtls/issues/3541) */
+#if 0 && defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_224 1
+#define PSA_WANT_ECC_SECP_K1_224
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_256 1
+#define PSA_WANT_ECC_SECP_K1_256
+#endif
+
+#endif /* MBEDTLS_PSA_CRYPTO_CONFIG */
+
+/* These features are always enabled. */
+#define PSA_WANT_KEY_TYPE_DERIVE 1
+#define PSA_WANT_KEY_TYPE_RAW_DATA 1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CONFIG_PSA_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/constant_time.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/constant_time.h
new file mode 100644
index 00000000000..c5de57a01f0
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/constant_time.h
@@ -0,0 +1,45 @@
+/**
+ *  Constant-time functions
+ *
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CONSTANT_TIME_H
+#define MBEDTLS_CONSTANT_TIME_H
+
+#include <stddef.h>
+
+
+/** Constant-time buffer comparison without branches.
+ *
+ * This is equivalent to the standard memcmp function, but is likely to be
+ * compiled to code using bitwise operation rather than a branch.
+ *
+ * This function can be used to write constant-time code by replacing branches
+ * with bit operations using masks.
+ *
+ * \param a     Pointer to the first buffer.
+ * \param b     Pointer to the second buffer.
+ * \param n     The number of bytes to compare in the buffer.
+ *
+ * \return      Zero if the content of the two buffer is the same,
+ *              otherwise non-zero.
+ */
+int mbedtls_ct_memcmp( const void *a,
+                       const void *b,
+                       size_t n );
+
+#endif /* MBEDTLS_CONSTANT_TIME_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
index 6c099adf4d3..dc4adc896d4 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
@@ -12,40 +12,18 @@
  * The Mbed TLS implementation of CTR_DRBG uses AES-256 (default) or AES-128
  * (if \c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY is enabled at compile time)
  * as the underlying block cipher, with a derivation function.
- * The initial seeding grabs #MBEDTLS_CTR_DRBG_ENTROPY_LEN bytes of entropy.
- * See the documentation of mbedtls_ctr_drbg_seed() for more details.
- *
- * Based on NIST SP 800-90A §10.2.1 table 3 and NIST SP 800-57 part 1 table 2,
- * here are the security strengths achieved in typical configuration:
- * - 256 bits under the default configuration of the library, with AES-256
- *   and with #MBEDTLS_CTR_DRBG_ENTROPY_LEN set to 48 or more.
- * - 256 bits if AES-256 is used, #MBEDTLS_CTR_DRBG_ENTROPY_LEN is set
- *   to 32 or more, and the DRBG is initialized with an explicit
- *   nonce in the \c custom parameter to mbedtls_ctr_drbg_seed().
- * - 128 bits if AES-256 is used but #MBEDTLS_CTR_DRBG_ENTROPY_LEN is
- *   between 24 and 47 and the DRBG is not initialized with an explicit
- *   nonce (see mbedtls_ctr_drbg_seed()).
- * - 128 bits if AES-128 is used (\c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY enabled)
- *   and #MBEDTLS_CTR_DRBG_ENTROPY_LEN is set to 24 or more (which is
- *   always the case unless it is explicitly set to a different value
- *   in config.h).
- *
- * Note that the value of #MBEDTLS_CTR_DRBG_ENTROPY_LEN defaults to:
- * - \c 48 if the module \c MBEDTLS_SHA512_C is enabled and the symbol
- *   \c MBEDTLS_ENTROPY_FORCE_SHA256 is disabled at compile time.
- *   This is the default configuration of the library.
- * - \c 32 if the module \c MBEDTLS_SHA512_C is disabled at compile time.
- * - \c 32 if \c MBEDTLS_ENTROPY_FORCE_SHA256 is enabled at compile time.
+ *
+ * The security strength as defined in NIST SP 800-90A is
+ * 128 bits when AES-128 is used (\c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY enabled)
+ * and 256 bits otherwise, provided that #MBEDTLS_CTR_DRBG_ENTROPY_LEN is
+ * kept at its default value (and not overridden in config.h) and that the
+ * DRBG instance is set up with default parameters.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more
+ * information.
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -58,48 +36,31 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CTR_DRBG_H
 #define MBEDTLS_CTR_DRBG_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "aes.h"
+#include "mbedtls/aes.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
-#define MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED        -0x0034  /**< The entropy source failed. */
-#define MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG              -0x0036  /**< The requested random buffer length is too big. */
-#define MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG                -0x0038  /**< The input (entropy + additional data) is too large. */
-#define MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR                -0x003A  /**< Read or write error in file. */
+/** The entropy source failed. */
+#define MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED        -0x0034
+/** The requested random buffer length is too big. */
+#define MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG              -0x0036
+/** The input (entropy + additional data) is too large. */
+#define MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG                -0x0038
+/** Read or write error in file. */
+#define MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR                -0x003A
 
 #define MBEDTLS_CTR_DRBG_BLOCKSIZE          16 /**< The block size used by the cipher. */
 
@@ -188,20 +149,49 @@
 extern "C" {
 #endif
 
+#if MBEDTLS_CTR_DRBG_ENTROPY_LEN >= MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2
+/** The default length of the nonce read from the entropy source.
+ *
+ * This is \c 0 because a single read from the entropy source is sufficient
+ * to include a nonce.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more information.
+ */
+#define MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN 0
+#else
+/** The default length of the nonce read from the entropy source.
+ *
+ * This is half of the default entropy length because a single read from
+ * the entropy source does not provide enough material to form a nonce.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more information.
+ */
+#define MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN ( MBEDTLS_CTR_DRBG_ENTROPY_LEN + 1 ) / 2
+#endif
+
 /**
  * \brief          The CTR_DRBG context structure.
  */
 typedef struct mbedtls_ctr_drbg_context
 {
     unsigned char counter[16];  /*!< The counter (V). */
-    int reseed_counter;         /*!< The reseed counter. */
+    int reseed_counter;         /*!< The reseed counter.
+                                 * This is the number of requests that have
+                                 * been made since the last (re)seeding,
+                                 * minus one.
+                                 * Before the initial seeding, this field
+                                 * contains the amount of entropy in bytes
+                                 * to use as a nonce for the initial seeding,
+                                 * or -1 if no nonce length has been explicitly
+                                 * set (see mbedtls_ctr_drbg_set_nonce_len()).
+                                 */
     int prediction_resistance;  /*!< This determines whether prediction
                                      resistance is enabled, that is
                                      whether to systematically reseed before
                                      each random generation. */
     size_t entropy_len;         /*!< The amount of entropy grabbed on each
-                                     seed or reseed operation. */
-    int reseed_interval;        /*!< The reseed interval. */
+                                     seed or reseed operation, in bytes. */
+    int reseed_interval;        /*!< The reseed interval.
+                                 * This is the maximum number of requests
+                                 * that can be made between reseedings. */
 
     mbedtls_aes_context aes_ctx;        /*!< The AES context. */
 
@@ -254,34 +244,35 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  * The entropy length is #MBEDTLS_CTR_DRBG_ENTROPY_LEN by default.
  * You can override it by calling mbedtls_ctr_drbg_set_entropy_len().
  *
- * You can provide a personalization string in addition to the
+ * The entropy nonce length is:
+ * - \c 0 if the entropy length is at least 3/2 times the entropy length,
+ *   which guarantees that the security strength is the maximum permitted
+ *   by the key size and entropy length according to NIST SP 800-90A §10.2.1;
+ * - Half the entropy length otherwise.
+ * You can override it by calling mbedtls_ctr_drbg_set_nonce_len().
+ * With the default entropy length, the entropy nonce length is
+ * #MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN.
+ *
+ * You can provide a nonce and personalization string in addition to the
  * entropy source, to make this instantiation as unique as possible.
+ * See SP 800-90A §8.6.7 for more details about nonces.
  *
- * \note                The _seed_material_ value passed to the derivation
- *                      function in the CTR_DRBG Instantiate Process
- *                      described in NIST SP 800-90A §10.2.1.3.2
- *                      is the concatenation of the string obtained from
- *                      calling \p f_entropy and the \p custom string.
- *                      The origin of the nonce depends on the value of
- *                      the entropy length relative to the security strength.
- *                      - If the entropy length is at least 1.5 times the
- *                        security strength then the nonce is taken from the
- *                        string obtained with \p f_entropy.
- *                      - If the entropy length is less than the security
- *                        strength, then the nonce is taken from \p custom.
- *                        In this case, for compliance with SP 800-90A,
- *                        you must pass a unique value of \p custom at
- *                        each invocation. See SP 800-90A §8.6.7 for more
- *                        details.
- */
-#if MBEDTLS_CTR_DRBG_ENTROPY_LEN < MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2
-/** \warning            When #MBEDTLS_CTR_DRBG_ENTROPY_LEN is less than
- *                      #MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2, to achieve the
- *                      maximum security strength permitted by CTR_DRBG,
- *                      you must pass a value of \p custom that is a nonce:
- *                      this value must never be repeated in subsequent
- *                      runs of the same application or on a different
- *                      device.
+ * The _seed_material_ value passed to the derivation function in
+ * the CTR_DRBG Instantiate Process described in NIST SP 800-90A §10.2.1.3.2
+ * is the concatenation of the following strings:
+ * - A string obtained by calling \p f_entropy function for the entropy
+ *   length.
+ */
+#if MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN == 0
+/**
+ * - If mbedtls_ctr_drbg_set_nonce_len() has been called, a string
+ *   obtained by calling \p f_entropy function for the specified length.
+ */
+#else
+/**
+ * - A string obtained by calling \p f_entropy function for the entropy nonce
+ *   length. If the entropy nonce length is \c 0, this function does not
+ *   make a second call to \p f_entropy.
  */
 #endif
 #if defined(MBEDTLS_THREADING_C)
@@ -294,6 +285,23 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  */
 #endif /* MBEDTLS_THREADING_C */
 /**
+ * - The \p custom string.
+ *
+ * \note                To achieve the nominal security strength permitted
+ *                      by CTR_DRBG, the entropy length must be:
+ *                      - at least 16 bytes for a 128-bit strength
+ *                      (maximum achievable strength when using AES-128);
+ *                      - at least 32 bytes for a 256-bit strength
+ *                      (maximum achievable strength when using AES-256).
+ *
+ *                      In addition, if you do not pass a nonce in \p custom,
+ *                      the sum of the entropy length
+ *                      and the entropy nonce length must be:
+ *                      - at least 24 bytes for a 128-bit strength
+ *                      (maximum achievable strength when using AES-128);
+ *                      - at least 48 bytes for a 256-bit strength
+ *                      (maximum achievable strength when using AES-256).
+ *
  * \param ctx           The CTR_DRBG context to seed.
  *                      It must have been initialized with
  *                      mbedtls_ctr_drbg_init().
@@ -308,7 +316,7 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  *                      \p p_entropy context, the buffer to fill, and the
  *                      length of the buffer.
  *                      \p f_entropy is always called with a buffer size
- *                      equal to the entropy length.
+ *                      less than or equal to the entropy length.
  * \param p_entropy     The entropy context to pass to \p f_entropy.
  * \param custom        The personalization string.
  *                      This can be \c NULL, in which case the personalization
@@ -371,11 +379,35 @@ void mbedtls_ctr_drbg_set_prediction_resistance( mbedtls_ctr_drbg_context *ctx,
  *
  * \param ctx           The CTR_DRBG context.
  * \param len           The amount of entropy to grab, in bytes.
- *                      This must be at most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT.
+ *                      This must be at most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT
+ *                      and at most the maximum length accepted by the
+ *                      entropy function that is set in the context.
  */
 void mbedtls_ctr_drbg_set_entropy_len( mbedtls_ctr_drbg_context *ctx,
                                size_t len );
 
+/**
+ * \brief               This function sets the amount of entropy grabbed
+ *                      as a nonce for the initial seeding.
+ *
+ * Call this function before calling mbedtls_ctr_drbg_seed() to read
+ * a nonce from the entropy source during the initial seeding.
+ *
+ * \param ctx           The CTR_DRBG context.
+ * \param len           The amount of entropy to grab for the nonce, in bytes.
+ *                      This must be at most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT
+ *                      and at most the maximum length accepted by the
+ *                      entropy function that is set in the context.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG if \p len is
+ *                      more than #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED
+ *                      if the initial seeding has already taken place.
+ */
+int mbedtls_ctr_drbg_set_nonce_len( mbedtls_ctr_drbg_context *ctx,
+                                    size_t len );
+
 /**
  * \brief               This function sets the reseed interval.
  *
@@ -417,10 +449,10 @@ int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx,
 /**
  * \brief              This function updates the state of the CTR_DRBG context.
  *
- * \note               This function is not thread-safe. It is not safe
- *                     to call this function if another thread might be
- *                     concurrently obtaining random numbers from the same
- *                     context or updating or reseeding the same context.
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
  *
  * \param ctx          The CTR_DRBG context.
  * \param additional   The data to update the state with. This must not be
@@ -572,11 +604,6 @@ int mbedtls_ctr_drbg_self_test( int verbose );
 
 #endif /* MBEDTLS_SELF_TEST */
 
-/* Internal functions (do not call directly) */
-int mbedtls_ctr_drbg_seed_entropy_len( mbedtls_ctr_drbg_context *,
-                               int (*)(void *, unsigned char *, size_t), void *,
-                               const unsigned char *, size_t, size_t );
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/debug.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/debug.h
index abc2d4f07ca..3c08244f3da 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/debug.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/debug.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_DEBUG_H
 #define MBEDTLS_DEBUG_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #if defined(MBEDTLS_ECP_C)
-#include "ecp.h"
+#include "mbedtls/ecp.h"
 #endif
 
 #if defined(MBEDTLS_DEBUG_C)
@@ -107,6 +80,55 @@
 
 #endif /* MBEDTLS_DEBUG_C */
 
+/**
+ * \def MBEDTLS_PRINTF_ATTRIBUTE
+ *
+ * Mark a function as having printf attributes, and thus enable checking
+ * via -wFormat and other flags. This does nothing on builds with compilers
+ * that do not support the format attribute
+ *
+ * Module:  library/debug.c
+ * Caller:
+ *
+ * This module provides debugging functions.
+ */
+#if defined(__has_attribute)
+#if __has_attribute(format)
+#if defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 1
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)    \
+    __attribute__((__format__ (gnu_printf, string_index, first_to_check)))
+#else /* defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 1 */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)    \
+    __attribute__((format(printf, string_index, first_to_check)))
+#endif
+#else /* __has_attribute(format) */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)
+#endif /* __has_attribute(format) */
+#else /* defined(__has_attribute) */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)
+#endif
+
+/**
+ * \def MBEDTLS_PRINTF_SIZET
+ *
+ * MBEDTLS_PRINTF_xxx: Due to issues with older window compilers
+ * and MinGW we need to define the printf specifier for size_t
+ * and long long per platform.
+ *
+ * Module:  library/debug.c
+ * Caller:
+ *
+ * This module provides debugging functions.
+ */
+#if (defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800)
+   #include <inttypes.h>
+   #define MBEDTLS_PRINTF_SIZET     PRIuPTR
+   #define MBEDTLS_PRINTF_LONGLONG  "I64d"
+#else /* (defined(__MINGW32__)  && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800) */
+   #define MBEDTLS_PRINTF_SIZET     "zu"
+   #define MBEDTLS_PRINTF_LONGLONG  "lld"
+#endif /* (defined(__MINGW32__)  && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800) */
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -145,7 +167,7 @@ void mbedtls_debug_set_threshold( int threshold );
  */
 void mbedtls_debug_print_msg( const mbedtls_ssl_context *ssl, int level,
                               const char *file, int line,
-                              const char *format, ... );
+                              const char *format, ... ) MBEDTLS_PRINTF_ATTRIBUTE(5, 6);
 
 /**
  * \brief   Print the return value of a function to the debug output. This
@@ -287,4 +309,3 @@ void mbedtls_debug_printf_ecdh( const mbedtls_ssl_context *ssl, int level,
 #endif
 
 #endif /* debug.h */
-
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/des.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/des.h
index ee24f659459..325aab53644 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/des.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/des.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -29,36 +23,16 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_DES_H
 #define MBEDTLS_DES_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
+#include "mbedtls/platform_util.h"
 
 #include <stddef.h>
 #include <stdint.h>
@@ -66,10 +40,12 @@
 #define MBEDTLS_DES_ENCRYPT     1
 #define MBEDTLS_DES_DECRYPT     0
 
-#define MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH              -0x0032  /**< The data input has an invalid length. */
+/** The data input has an invalid length. */
+#define MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH              -0x0032
 
 /* MBEDTLS_ERR_DES_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_DES_HW_ACCEL_FAILED                   -0x0033  /**< DES hardware accelerator failed. */
+/** DES hardware accelerator failed. */
+#define MBEDTLS_ERR_DES_HW_ACCEL_FAILED                   -0x0033
 
 #define MBEDTLS_DES_KEY_SIZE    8
 
@@ -171,6 +147,7 @@ void mbedtls_des_key_set_parity( unsigned char key[MBEDTLS_DES_KEY_SIZE] );
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_key_check_key_parity( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -184,6 +161,7 @@ int mbedtls_des_key_check_key_parity( const unsigned char key[MBEDTLS_DES_KEY_SI
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_key_check_weak( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -198,6 +176,7 @@ int mbedtls_des_key_check_weak( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_setkey_enc( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -212,6 +191,7 @@ int mbedtls_des_setkey_enc( mbedtls_des_context *ctx, const unsigned char key[MB
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_setkey_dec( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -222,6 +202,7 @@ int mbedtls_des_setkey_dec( mbedtls_des_context *ctx, const unsigned char key[MB
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set2key_enc( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] );
 
@@ -233,6 +214,7 @@ int mbedtls_des3_set2key_enc( mbedtls_des3_context *ctx,
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set2key_dec( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] );
 
@@ -244,6 +226,7 @@ int mbedtls_des3_set2key_dec( mbedtls_des3_context *ctx,
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set3key_enc( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] );
 
@@ -255,6 +238,7 @@ int mbedtls_des3_set3key_enc( mbedtls_des3_context *ctx,
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set3key_dec( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] );
 
@@ -271,6 +255,7 @@ int mbedtls_des3_set3key_dec( mbedtls_des3_context *ctx,
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_crypt_ecb( mbedtls_des_context *ctx,
                     const unsigned char input[8],
                     unsigned char output[8] );
@@ -298,6 +283,7 @@ int mbedtls_des_crypt_ecb( mbedtls_des_context *ctx,
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_crypt_cbc( mbedtls_des_context *ctx,
                     int mode,
                     size_t length,
@@ -315,6 +301,7 @@ int mbedtls_des_crypt_cbc( mbedtls_des_context *ctx,
  *
  * \return         0 if successful
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_crypt_ecb( mbedtls_des3_context *ctx,
                      const unsigned char input[8],
                      unsigned char output[8] );
@@ -340,6 +327,7 @@ int mbedtls_des3_crypt_ecb( mbedtls_des3_context *ctx,
  *
  * \return         0 if successful, or MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_crypt_cbc( mbedtls_des3_context *ctx,
                      int mode,
                      size_t length,
@@ -370,6 +358,7 @@ void mbedtls_des_setkey( uint32_t SK[32],
  *
  * \return         0 if successful, or 1 if the test failed
  */
+MBEDTLS_CHECK_RETURN_CRITICAL
 int mbedtls_des_self_test( int verbose );
 
 #endif /* MBEDTLS_SELF_TEST */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/dhm.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/dhm.h
index 11042efb556..c4b15a2c452 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/dhm.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/dhm.h
@@ -45,13 +45,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -64,56 +58,46 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_DHM_H
 #define MBEDTLS_DHM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 /*
  * DHM Error codes
  */
-#define MBEDTLS_ERR_DHM_BAD_INPUT_DATA                    -0x3080  /**< Bad input parameters. */
-#define MBEDTLS_ERR_DHM_READ_PARAMS_FAILED                -0x3100  /**< Reading of the DHM parameters failed. */
-#define MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED                -0x3180  /**< Making of the DHM parameters failed. */
-#define MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED                -0x3200  /**< Reading of the public values failed. */
-#define MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED                -0x3280  /**< Making of the public value failed. */
-#define MBEDTLS_ERR_DHM_CALC_SECRET_FAILED                -0x3300  /**< Calculation of the DHM secret failed. */
-#define MBEDTLS_ERR_DHM_INVALID_FORMAT                    -0x3380  /**< The ASN.1 data is not formatted correctly. */
-#define MBEDTLS_ERR_DHM_ALLOC_FAILED                      -0x3400  /**< Allocation of memory failed. */
-#define MBEDTLS_ERR_DHM_FILE_IO_ERROR                     -0x3480  /**< Read or write of file failed. */
+/** Bad input parameters. */
+#define MBEDTLS_ERR_DHM_BAD_INPUT_DATA                    -0x3080
+/** Reading of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_READ_PARAMS_FAILED                -0x3100
+/** Making of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED                -0x3180
+/** Reading of the public values failed. */
+#define MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED                -0x3200
+/** Making of the public value failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED                -0x3280
+/** Calculation of the DHM secret failed. */
+#define MBEDTLS_ERR_DHM_CALC_SECRET_FAILED                -0x3300
+/** The ASN.1 data is not formatted correctly. */
+#define MBEDTLS_ERR_DHM_INVALID_FORMAT                    -0x3380
+/** Allocation of memory failed. */
+#define MBEDTLS_ERR_DHM_ALLOC_FAILED                      -0x3400
+/** Read or write of file failed. */
+#define MBEDTLS_ERR_DHM_FILE_IO_ERROR                     -0x3480
 
 /* MBEDTLS_ERR_DHM_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_DHM_HW_ACCEL_FAILED                   -0x3500  /**< DHM hardware accelerator failed. */
+/** DHM hardware accelerator failed. */
+#define MBEDTLS_ERR_DHM_HW_ACCEL_FAILED                   -0x3500
 
-#define MBEDTLS_ERR_DHM_SET_GROUP_FAILED                  -0x3580  /**< Setting the modulus and generator failed. */
+/** Setting the modulus and generator failed. */
+#define MBEDTLS_ERR_DHM_SET_GROUP_FAILED                  -0x3580
 
 #ifdef __cplusplus
 extern "C" {
@@ -323,7 +307,6 @@ int mbedtls_dhm_calc_secret( mbedtls_dhm_context *ctx,
 void mbedtls_dhm_free( mbedtls_dhm_context *ctx );
 
 #if defined(MBEDTLS_ASN1_PARSE_C)
-/** \ingroup x509_module */
 /**
  * \brief             This function parses DHM parameters in PEM or DER format.
  *
@@ -342,7 +325,6 @@ int mbedtls_dhm_parse_dhm( mbedtls_dhm_context *dhm, const unsigned char *dhmin,
                            size_t dhminlen );
 
 #if defined(MBEDTLS_FS_IO)
-/** \ingroup x509_module */
 /**
  * \brief          This function loads and parses DHM parameters from a file.
  *
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecdh.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecdh.h
index b9324bc4964..05855cdf10b 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecdh.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecdh.h
@@ -14,13 +14,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,51 +27,23 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ECDH_H
 #define MBEDTLS_ECDH_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ecp.h"
+#include "mbedtls/ecp.h"
 
-/*
- * Use a backward compatible ECDH context.
- *
- * This flag is always enabled for now and future versions might add a
- * configuration option that conditionally undefines this flag.
- * The configuration option in question may have a different name.
- *
- * Features undefining this flag, must have a warning in their description in
- * config.h stating that the feature breaks backward compatibility.
- */
-#define MBEDTLS_ECDH_LEGACY_CONTEXT
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+#undef MBEDTLS_ECDH_LEGACY_CONTEXT
+#include "everest/everest.h"
+#endif
 
 #ifdef __cplusplus
 extern "C" {
@@ -103,6 +69,9 @@ typedef enum
 {
     MBEDTLS_ECDH_VARIANT_NONE = 0,   /*!< Implementation not defined. */
     MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0,/*!< The default Mbed TLS implementation */
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+    MBEDTLS_ECDH_VARIANT_EVEREST     /*!< Everest implementation */
+#endif
 } mbedtls_ecdh_variant;
 
 /**
@@ -156,6 +125,9 @@ typedef struct mbedtls_ecdh_context
     union
     {
         mbedtls_ecdh_context_mbed   mbed_ecdh;
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+        mbedtls_ecdh_context_everest everest_ecdh;
+#endif
     } ctx;                      /*!< Implementation-specific context. The
                                   context in use is specified by the \c var
                                   field. */
@@ -170,6 +142,15 @@ typedef struct mbedtls_ecdh_context
 }
 mbedtls_ecdh_context;
 
+/**
+ * \brief          Check whether a given group can be used for ECDH.
+ *
+ * \param gid      The ECP group ID to check.
+ *
+ * \return         \c 1 if the group can be used, \c 0 otherwise
+ */
+int mbedtls_ecdh_can_do( mbedtls_ecp_group_id gid );
+
 /**
  * \brief           This function generates an ECDH keypair on an elliptic
  *                  curve.
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h
index da02b278643..264a638bb52 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h
@@ -12,13 +12,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -31,60 +25,44 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ECDSA_H
 #define MBEDTLS_ECDSA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ecp.h"
-#include "md.h"
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
 
-/*
- * RFC-4492 page 20:
+/**
+ * \brief           Maximum ECDSA signature size for a given curve bit size
  *
+ * \param bits      Curve size in bits
+ * \return          Maximum signature size in bytes
+ *
+ * \note            This macro returns a compile-time constant if its argument
+ *                  is one. It may evaluate its argument multiple times.
+ */
+/*
  *     Ecdsa-Sig-Value ::= SEQUENCE {
  *         r       INTEGER,
  *         s       INTEGER
  *     }
  *
- * Size is at most
- *    1 (tag) + 1 (len) + 1 (initial 0) + ECP_MAX_BYTES for each of r and s,
- *    twice that + 1 (tag) + 2 (len) for the sequence
- * (assuming ECP_MAX_BYTES is less than 126 for r and s,
- * and less than 124 (total len <= 255) for the sequence)
+ * For each of r and s, the value (V) may include an extra initial "0" bit.
  */
-#if MBEDTLS_ECP_MAX_BYTES > 124
-#error "MBEDTLS_ECP_MAX_BYTES bigger than expected, please fix MBEDTLS_ECDSA_MAX_LEN"
-#endif
+#define MBEDTLS_ECDSA_MAX_SIG_LEN( bits )                               \
+    ( /*T,L of SEQUENCE*/ ( ( bits ) >= 61 * 8 ? 3 : 2 ) +              \
+      /*T,L of r,s*/        2 * ( ( ( bits ) >= 127 * 8 ? 3 : 2 ) +     \
+      /*V of r,s*/                ( ( bits ) + 8 ) / 8 ) )
+
 /** The maximal size of an ECDSA signature in Bytes. */
-#define MBEDTLS_ECDSA_MAX_LEN  ( 3 + 2 * ( 3 + MBEDTLS_ECP_MAX_BYTES ) )
+#define MBEDTLS_ECDSA_MAX_LEN  MBEDTLS_ECDSA_MAX_SIG_LEN( MBEDTLS_ECP_MAX_BITS )
 
 #ifdef __cplusplus
 extern "C" {
@@ -145,6 +123,16 @@ typedef void mbedtls_ecdsa_restart_ctx;
 
 #endif /* MBEDTLS_ECP_RESTARTABLE */
 
+/**
+ * \brief          This function checks whether a given group can be used
+ *                 for ECDSA.
+ *
+ * \param gid      The ECP group ID to check.
+ *
+ * \return         \c 1 if the group can be used, \c 0 otherwise
+ */
+int mbedtls_ecdsa_can_do( mbedtls_ecp_group_id gid );
+
 /**
  * \brief           This function computes the ECDSA signature of a
  *                  previously-hashed message.
@@ -186,6 +174,12 @@ int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s,
                 int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
 
 #if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
 /**
  * \brief           This function computes the ECDSA signature of a
  *                  previously-hashed message, deterministic version.
@@ -237,7 +231,10 @@ int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s,
 int mbedtls_ecdsa_sign_det( mbedtls_ecp_group *grp, mbedtls_mpi *r,
                             mbedtls_mpi *s, const mbedtls_mpi *d,
                             const unsigned char *buf, size_t blen,
-                            mbedtls_md_type_t md_alg );
+                            mbedtls_md_type_t md_alg ) MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
 /**
  * \brief           This function computes the ECDSA signature of a
  *                  previously-hashed message, deterministic version.
@@ -278,12 +275,11 @@ int mbedtls_ecdsa_sign_det( mbedtls_ecp_group *grp, mbedtls_mpi *r,
  *                  error code on failure.
  */
 int mbedtls_ecdsa_sign_det_ext( mbedtls_ecp_group *grp, mbedtls_mpi *r,
-                                mbedtls_mpi *s, const mbedtls_mpi *d,
-                                const unsigned char *buf, size_t blen,
-                                mbedtls_md_type_t md_alg,
-                                int (*f_rng_blind)(void *, unsigned char *,
-                                                   size_t),
-                                void *p_rng_blind );
+                            mbedtls_mpi *s, const mbedtls_mpi *d,
+                            const unsigned char *buf, size_t blen,
+                            mbedtls_md_type_t md_alg,
+                            int (*f_rng_blind)(void *, unsigned char *, size_t),
+                            void *p_rng_blind );
 #endif /* MBEDTLS_ECDSA_DETERMINISTIC */
 
 /**
@@ -362,7 +358,8 @@ int mbedtls_ecdsa_verify( mbedtls_ecp_group *grp,
  *                  the signature written. Must not be \c NULL.
  * \param f_rng     The RNG function. This must not be \c NULL if
  *                  #MBEDTLS_ECDSA_DETERMINISTIC is unset. Otherwise,
- *                  it is unused and may be set to \c NULL.
+ *                  it is used only for blinding and may be set to \c NULL, but
+ *                  doing so is DEPRECATED.
  * \param p_rng     The RNG context to be passed to \p f_rng. This may be
  *                  \c NULL if \p f_rng is \c NULL or doesn't use a context.
  *
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h
index a9b68d00c61..891705d8c4f 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ECJPAKE_H
 #define MBEDTLS_ECJPAKE_H
@@ -66,13 +39,13 @@
  * also be use outside TLS.
  */
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ecp.h"
-#include "md.h"
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp.h
index e4a1ed81cf0..0924341e002 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp.h
@@ -16,13 +16,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -35,56 +29,65 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ECP_H
 #define MBEDTLS_ECP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 /*
  * ECP error codes
  */
-#define MBEDTLS_ERR_ECP_BAD_INPUT_DATA                    -0x4F80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL                  -0x4F00  /**< The buffer is too small to write to. */
-#define MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE               -0x4E80  /**< The requested feature is not available, for example, the requested curve is not supported. */
-#define MBEDTLS_ERR_ECP_VERIFY_FAILED                     -0x4E00  /**< The signature is not valid. */
-#define MBEDTLS_ERR_ECP_ALLOC_FAILED                      -0x4D80  /**< Memory allocation failed. */
-#define MBEDTLS_ERR_ECP_RANDOM_FAILED                     -0x4D00  /**< Generation of random value, such as ephemeral key, failed. */
-#define MBEDTLS_ERR_ECP_INVALID_KEY                       -0x4C80  /**< Invalid private or public key. */
-#define MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH                  -0x4C00  /**< The buffer contains a valid signature followed by more data. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_ECP_BAD_INPUT_DATA                    -0x4F80
+/** The buffer is too small to write to. */
+#define MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL                  -0x4F00
+/** The requested feature is not available, for example, the requested curve is not supported. */
+#define MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE               -0x4E80
+/** The signature is not valid. */
+#define MBEDTLS_ERR_ECP_VERIFY_FAILED                     -0x4E00
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_ECP_ALLOC_FAILED                      -0x4D80
+/** Generation of random value, such as ephemeral key, failed. */
+#define MBEDTLS_ERR_ECP_RANDOM_FAILED                     -0x4D00
+/** Invalid private or public key. */
+#define MBEDTLS_ERR_ECP_INVALID_KEY                       -0x4C80
+/** The buffer contains a valid signature followed by more data. */
+#define MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH                  -0x4C00
 
 /* MBEDTLS_ERR_ECP_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_ECP_HW_ACCEL_FAILED                   -0x4B80  /**< The ECP hardware accelerator failed. */
-
-#define MBEDTLS_ERR_ECP_IN_PROGRESS                       -0x4B00  /**< Operation in progress, call again with the same parameters to continue. */
+/** The ECP hardware accelerator failed. */
+#define MBEDTLS_ERR_ECP_HW_ACCEL_FAILED                   -0x4B80
+
+/** Operation in progress, call again with the same parameters to continue. */
+#define MBEDTLS_ERR_ECP_IN_PROGRESS                       -0x4B00
+
+/* Flags indicating whether to include code that is specific to certain
+ * types of curves. These flags are for internal library use only. */
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED
+#endif
+#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_ECP_MONTGOMERY_ENABLED
+#endif
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +102,21 @@ extern "C" {
  * parameters. Therefore, only standardized domain parameters from trusted
  * sources should be used. See mbedtls_ecp_group_load().
  */
+/* Note: when adding a new curve:
+ * - Add it at the end of this enum, otherwise you'll break the ABI by
+ *   changing the numerical value for existing curves.
+ * - Increment MBEDTLS_ECP_DP_MAX below if needed.
+ * - Update the calculation of MBEDTLS_ECP_MAX_BITS_MIN below.
+ * - Add the corresponding MBEDTLS_ECP_DP_xxx_ENABLED macro definition to
+ *   config.h.
+ * - List the curve as a dependency of MBEDTLS_ECP_C and
+ *   MBEDTLS_ECDSA_C if supported in check_config.h.
+ * - Add the curve to the appropriate curve type macro
+ *   MBEDTLS_ECP_yyy_ENABLED above.
+ * - Add the necessary definitions to ecp_curves.c.
+ * - Add the curve to the ecp_supported_curves array in ecp.c.
+ * - Add the curve to applicable profiles in x509_crt.c if applicable.
+ */
 typedef enum
 {
     MBEDTLS_ECP_DP_NONE = 0,       /*!< Curve not defined. */
@@ -124,6 +142,16 @@ typedef enum
  */
 #define MBEDTLS_ECP_DP_MAX     12
 
+/*
+ * Curve types
+ */
+typedef enum
+{
+    MBEDTLS_ECP_TYPE_NONE = 0,
+    MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS,    /* y^2 = x^3 + a x + b      */
+    MBEDTLS_ECP_TYPE_MONTGOMERY,           /* y^2 = x^3 + a x^2 + x    */
+} mbedtls_ecp_curve_type;
+
 /**
  * Curve information, for use by other modules.
  */
@@ -268,11 +296,17 @@ mbedtls_ecp_group;
 #error "MBEDTLS_ECP_MAX_BITS is smaller than the largest supported curve"
 #endif
 
-#else
+#elif defined(MBEDTLS_ECP_C)
 /**
  * The maximum size of the groups, that is, of \c N and \c P.
  */
-#define MBEDTLS_ECP_MAX_BITS     521   /**< The maximum size of groups, in bits. */
+#define MBEDTLS_ECP_MAX_BITS     MBEDTLS_ECP_MAX_BITS_MIN
+
+#else
+/* MBEDTLS_ECP_MAX_BITS is not relevant without MBEDTLS_ECP_C, but set it
+ * to a nonzero value so that code that unconditionally allocates an array
+ * of a size based on it keeps working if built without ECC support. */
+#define MBEDTLS_ECP_MAX_BITS 1
 #endif
 
 #define MBEDTLS_ECP_MAX_BYTES    ( ( MBEDTLS_ECP_MAX_BITS + 7 ) / 8 )
@@ -281,7 +315,8 @@ mbedtls_ecp_group;
 #if !defined(MBEDTLS_ECP_WINDOW_SIZE)
 /*
  * Maximum "window" size used for point multiplication.
- * Default: 6.
+ * Default: a point where higher memory usage yields disminishing performance
+ *          returns.
  * Minimum value: 2. Maximum value: 7.
  *
  * Result is an array of at most ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) )
@@ -298,7 +333,7 @@ mbedtls_ecp_group;
  *      224       475     475     453     398     342
  *      192       640     640     633     587     476
  */
-#define MBEDTLS_ECP_WINDOW_SIZE    6   /**< The maximum window size used. */
+#define MBEDTLS_ECP_WINDOW_SIZE    4   /**< The maximum window size used. */
 #endif /* MBEDTLS_ECP_WINDOW_SIZE */
 
 #if !defined(MBEDTLS_ECP_FIXED_POINT_OPTIM)
@@ -482,10 +517,20 @@ void mbedtls_ecp_set_max_ops( unsigned max_ops );
 int mbedtls_ecp_restart_is_enabled( void );
 #endif /* MBEDTLS_ECP_RESTARTABLE */
 
+/*
+ * Get the type of a curve
+ */
+mbedtls_ecp_curve_type mbedtls_ecp_get_type( const mbedtls_ecp_group *grp );
+
 /**
  * \brief           This function retrieves the information defined in
- *                  mbedtls_ecp_curve_info() for all supported curves in order
- *                  of preference.
+ *                  mbedtls_ecp_curve_info() for all supported curves.
+ *
+ * \note            This function returns information about all curves
+ *                  supported by the library. Some curves may not be
+ *                  supported for all algorithms. Call mbedtls_ecdh_can_do()
+ *                  or mbedtls_ecdsa_can_do() to check if a curve is
+ *                  supported for ECDH or ECDSA.
  *
  * \return          A statically allocated array. The last entry is 0.
  */
@@ -496,6 +541,12 @@ const mbedtls_ecp_curve_info *mbedtls_ecp_curve_list( void );
  *                  identifiers of all supported curves in the order of
  *                  preference.
  *
+ * \note            This function returns information about all curves
+ *                  supported by the library. Some curves may not be
+ *                  supported for all algorithms. Call mbedtls_ecdh_can_do()
+ *                  or mbedtls_ecdsa_can_do() to check if a curve is
+ *                  supported for ECDH or ECDSA.
+ *
  * \return          A statically allocated array,
  *                  terminated with MBEDTLS_ECP_DP_NONE.
  */
@@ -691,6 +742,9 @@ int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix,
  * \param P         The point to export. This must be initialized.
  * \param format    The point format. This must be either
  *                  #MBEDTLS_ECP_PF_COMPRESSED or #MBEDTLS_ECP_PF_UNCOMPRESSED.
+ *                  (For groups without these formats, this parameter is
+ *                  ignored. But it still has to be either of the above
+ *                  values.)
  * \param olen      The address at which to store the length of
  *                  the output in Bytes. This must not be \c NULL.
  * \param buf       The output buffer. This must be a writable buffer
@@ -700,11 +754,14 @@ int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix,
  * \return          \c 0 on success.
  * \return          #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the output buffer
  *                  is too small to hold the point.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the point format
+ *                  or the export for the given group is not implemented.
  * \return          Another negative error code on other kinds of failure.
  */
-int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *P,
-                            int format, size_t *olen,
-                            unsigned char *buf, size_t buflen );
+int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp,
+                                    const mbedtls_ecp_point *P,
+                                    int format, size_t *olen,
+                                    unsigned char *buf, size_t buflen );
 
 /**
  * \brief           This function imports a point from unsigned binary data.
@@ -725,8 +782,8 @@ int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, const mbedtls_
  * \return          \c 0 on success.
  * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the input is invalid.
  * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
- * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the point format
- *                  is not implemented.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the import for the
+ *                  given group is not implemented.
  */
 int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp,
                                    mbedtls_ecp_point *P,
@@ -938,6 +995,7 @@ int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
              int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
              mbedtls_ecp_restart_ctx *rs_ctx );
 
+#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED)
 /**
  * \brief           This function performs multiplication and addition of two
  *                  points by integers: \p R = \p m * \p P + \p n * \p Q
@@ -947,6 +1005,10 @@ int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  * \note            In contrast to mbedtls_ecp_mul(), this function does not
  *                  guarantee a constant execution flow and timing.
  *
+ * \note            This function is only defined for short Weierstrass curves.
+ *                  It may not be included in builds without any short
+ *                  Weierstrass curve.
+ *
  * \param grp       The ECP group to use.
  *                  This must be initialized and have group parameters
  *                  set, for example through mbedtls_ecp_group_load().
@@ -965,6 +1027,8 @@ int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  *                  valid private keys, or \p P or \p Q are not valid public
  *                  keys.
  * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p grp does not
+ *                  designate a short Weierstrass curve.
  * \return          Another negative error code on other kinds of failure.
  */
 int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
@@ -982,6 +1046,10 @@ int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  *                  but it can return early and restart according to the limit
  *                  set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
  *
+ * \note            This function is only defined for short Weierstrass curves.
+ *                  It may not be included in builds without any short
+ *                  Weierstrass curve.
+ *
  * \param grp       The ECP group to use.
  *                  This must be initialized and have group parameters
  *                  set, for example through mbedtls_ecp_group_load().
@@ -1001,6 +1069,8 @@ int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  *                  valid private keys, or \p P or \p Q are not valid public
  *                  keys.
  * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p grp does not
+ *                  designate a short Weierstrass curve.
  * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
  *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
  * \return          Another negative error code on other kinds of failure.
@@ -1010,6 +1080,7 @@ int mbedtls_ecp_muladd_restartable(
              const mbedtls_mpi *m, const mbedtls_ecp_point *P,
              const mbedtls_mpi *n, const mbedtls_ecp_point *Q,
              mbedtls_ecp_restart_ctx *rs_ctx );
+#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */
 
 /**
  * \brief           This function checks that a point is a valid public key
@@ -1161,6 +1232,46 @@ int mbedtls_ecp_gen_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key,
                          int (*f_rng)(void *, unsigned char *, size_t),
                          void *p_rng );
 
+/**
+ * \brief           This function reads an elliptic curve private key.
+ *
+ * \param grp_id    The ECP group identifier.
+ * \param key       The destination key.
+ * \param buf       The buffer containing the binary representation of the
+ *                  key. (Big endian integer for Weierstrass curves, byte
+ *                  string for Montgomery curves.)
+ * \param buflen    The length of the buffer in bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_INVALID_KEY error if the key is
+ *                  invalid.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the operation for
+ *                  the group is not implemented.
+ * \return          Another negative error code on different kinds of failure.
+ */
+int mbedtls_ecp_read_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key,
+                          const unsigned char *buf, size_t buflen );
+
+/**
+ * \brief           This function exports an elliptic curve private key.
+ *
+ * \param key       The private key.
+ * \param buf       The output buffer for containing the binary representation
+ *                  of the key. (Big endian integer for Weierstrass curves, byte
+ *                  string for Montgomery curves.)
+ * \param buflen    The total length of the buffer in bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the \p key
+                    representation is larger than the available space in \p buf.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the operation for
+ *                  the group is not implemented.
+ * \return          Another negative error code on different kinds of failure.
+ */
+int mbedtls_ecp_write_key( mbedtls_ecp_keypair *key,
+                           unsigned char *buf, size_t buflen );
+
 /**
  * \brief           This function checks that the keypair objects
  *                  \p pub and \p prv have the same group and the
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h
index 0047bd4ef91..6a47a8ff27e 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h
@@ -6,13 +6,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -25,27 +19,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 /*
@@ -87,7 +60,7 @@
 #define MBEDTLS_ECP_INTERNAL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -130,7 +103,7 @@ int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp );
  */
 void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp );
 
-#if defined(ECP_SHORTWEIERSTRASS)
+#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED)
 
 #if defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT)
 /**
@@ -270,9 +243,9 @@ int mbedtls_internal_ecp_normalize_jac( const mbedtls_ecp_group *grp,
         mbedtls_ecp_point *pt );
 #endif
 
-#endif /* ECP_SHORTWEIERSTRASS */
+#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */
 
-#if defined(ECP_MONTGOMERY)
+#if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED)
 
 #if defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT)
 int mbedtls_internal_ecp_double_add_mxz( const mbedtls_ecp_group *grp,
@@ -316,7 +289,7 @@ int mbedtls_internal_ecp_normalize_mxz( const mbedtls_ecp_group *grp,
         mbedtls_ecp_point *P );
 #endif
 
-#endif /* ECP_MONTGOMERY */
+#endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */
 
 #endif /* MBEDTLS_ECP_INTERNAL_ALT */
 
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy.h
index 1d6e9b821bf..deb3c50300b 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ENTROPY_H
 #define MBEDTLS_ENTROPY_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,28 +31,33 @@
 #include <stddef.h>
 
 #if defined(MBEDTLS_SHA512_C) && !defined(MBEDTLS_ENTROPY_FORCE_SHA256)
-#include "sha512.h"
+#include "mbedtls/sha512.h"
 #define MBEDTLS_ENTROPY_SHA512_ACCUMULATOR
 #else
 #if defined(MBEDTLS_SHA256_C)
 #define MBEDTLS_ENTROPY_SHA256_ACCUMULATOR
-#include "sha256.h"
+#include "mbedtls/sha256.h"
 #endif
 #endif
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 #if defined(MBEDTLS_HAVEGE_C)
-#include "havege.h"
+#include "mbedtls/havege.h"
 #endif
 
-#define MBEDTLS_ERR_ENTROPY_SOURCE_FAILED                 -0x003C  /**< Critical entropy source failure. */
-#define MBEDTLS_ERR_ENTROPY_MAX_SOURCES                   -0x003E  /**< No more sources can be added. */
-#define MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED            -0x0040  /**< No sources have been added to poll. */
-#define MBEDTLS_ERR_ENTROPY_NO_STRONG_SOURCE              -0x003D  /**< No strong sources have been added to poll. */
-#define MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR                 -0x003F  /**< Read/write error in file. */
+/** Critical entropy source failure. */
+#define MBEDTLS_ERR_ENTROPY_SOURCE_FAILED                 -0x003C
+/** No more sources can be added. */
+#define MBEDTLS_ERR_ENTROPY_MAX_SOURCES                   -0x003E
+/** No sources have been added to poll. */
+#define MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED            -0x0040
+/** No strong sources have been added to poll. */
+#define MBEDTLS_ERR_ENTROPY_NO_STRONG_SOURCE              -0x003D
+/** Read/write error in file. */
+#define MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR                 -0x003F
 
 /**
  * \name SECTION: Module settings
@@ -152,7 +130,7 @@ typedef struct mbedtls_entropy_context
                               * -1 after free. */
 #if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR)
     mbedtls_sha512_context  accumulator;
-#else
+#elif defined(MBEDTLS_ENTROPY_SHA256_ACCUMULATOR)
     mbedtls_sha256_context  accumulator;
 #endif
     int             source_count; /* Number of entries used in source. */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h
index c348fe52d42..e1d7491aa21 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ENTROPY_POLL_H
 #define MBEDTLS_ENTROPY_POLL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/error.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/error.h
index fa8582a3914..50f25385080 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/error.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/error.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,39 +18,23 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ERROR_H
 #define MBEDTLS_ERROR_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
 
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
 /**
  * Error code layout.
  *
@@ -77,9 +55,10 @@
  * For historical reasons, low-level error codes are divided in even and odd,
  * even codes were assigned first, and -1 is reserved for other errors.
  *
- * Low-level module errors (0x0002-0x007E, 0x0003-0x007F)
+ * Low-level module errors (0x0002-0x007E, 0x0001-0x007F)
  *
  * Module   Nr  Codes assigned
+ * ERROR     2  0x006E          0x0001
  * MPI       7  0x0002-0x0010
  * GCM       3  0x0012-0x0014   0x0013-0x0013
  * BLOWFISH  3  0x0016-0x0018   0x0017-0x0017
@@ -111,7 +90,7 @@
  * CHACHA20  3                  0x0051-0x0055
  * POLY1305  3                  0x0057-0x005B
  * CHACHAPOLY 2 0x0054-0x0056
- * PLATFORM  1  0x0070-0x0072
+ * PLATFORM  2  0x0070-0x0072
  *
  * High-level module nr (3 bits - 0x0...-0x7...)
  * Name      ID  Nr of Errors
@@ -125,9 +104,9 @@
  * ECP       4   10 (Started from top)
  * MD        5   5
  * HKDF      5   1 (Started from top)
- * SSL       5   1 (Started from 0x5E80)
- * CIPHER    6   8
- * SSL       6   23 (Started from top)
+ * SSL       5   2 (Started from 0x5F00)
+ * CIPHER    6   8 (Started from 0x6080)
+ * SSL       6   24 (Started from top, plus 0x6000)
  * SSL       7   32
  *
  * Module dependent error code (5 bits 0x.00.-0x.F8.)
@@ -137,6 +116,59 @@
 extern "C" {
 #endif
 
+/** Generic error */
+#define MBEDTLS_ERR_ERROR_GENERIC_ERROR       -0x0001
+/** This is a bug in the library */
+#define MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED -0x006E
+
+/**
+ * \brief Combines a high-level and low-level error code together.
+ *
+ *        Wrapper macro for mbedtls_error_add(). See that function for
+ *        more details.
+ */
+#define MBEDTLS_ERROR_ADD( high, low ) \
+        mbedtls_error_add( high, low, __FILE__, __LINE__ )
+
+#if defined(MBEDTLS_TEST_HOOKS)
+/**
+ * \brief Testing hook called before adding/combining two error codes together.
+ *        Only used when invasive testing is enabled via MBEDTLS_TEST_HOOKS.
+ */
+extern void (*mbedtls_test_hook_error_add)( int, int, const char *, int );
+#endif
+
+/**
+ * \brief Combines a high-level and low-level error code together.
+ *
+ *        This function can be called directly however it is usually
+ *        called via the #MBEDTLS_ERROR_ADD macro.
+ *
+ *        While a value of zero is not a negative error code, it is still an
+ *        error code (that denotes success) and can be combined with both a
+ *        negative error code or another value of zero.
+ *
+ * \note  When invasive testing is enabled via #MBEDTLS_TEST_HOOKS, also try to
+ *        call \link mbedtls_test_hook_error_add \endlink.
+ *
+ * \param high      high-level error code. See error.h for more details.
+ * \param low       low-level error code. See error.h for more details.
+ * \param file      file where this error code addition occurred.
+ * \param line      line where this error code addition occurred.
+ */
+static inline int mbedtls_error_add( int high, int low,
+                                     const char *file, int line )
+{
+#if defined(MBEDTLS_TEST_HOOKS)
+    if( *mbedtls_test_hook_error_add != NULL )
+        ( *mbedtls_test_hook_error_add )( high, low, file, line );
+#endif
+    (void)file;
+    (void)line;
+
+    return( high + low );
+}
+
 /**
  * \brief Translate a mbed TLS error code into a string representation,
  *        Result is truncated if necessary and always includes a terminating
@@ -148,6 +180,36 @@ extern "C" {
  */
 void mbedtls_strerror( int errnum, char *buffer, size_t buflen );
 
+/**
+ * \brief Translate the high-level part of an Mbed TLS error code into a string
+ *        representation.
+ *
+ * This function returns a const pointer to an un-modifiable string. The caller
+ * must not try to modify the string. It is intended to be used mostly for
+ * logging purposes.
+ *
+ * \param error_code    error code
+ *
+ * \return The string representation of the error code, or \c NULL if the error
+ *         code is unknown.
+ */
+const char * mbedtls_high_level_strerr( int error_code );
+
+/**
+ * \brief Translate the low-level part of an Mbed TLS error code into a string
+ *        representation.
+ *
+ * This function returns a const pointer to an un-modifiable string. The caller
+ * must not try to modify the string. It is intended to be used mostly for
+ * logging purposes.
+ *
+ * \param error_code    error code
+ *
+ * \return The string representation of the error code, or \c NULL if the error
+ *         code is unknown.
+ */
+const char * mbedtls_low_level_strerr( int error_code );
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/gcm.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/gcm.h
index 1201fbd4f10..9723a17b65f 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/gcm.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/gcm.h
@@ -13,13 +13,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -32,51 +26,33 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_GCM_H
 #define MBEDTLS_GCM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
 #include <stdint.h>
 
 #define MBEDTLS_GCM_ENCRYPT     1
 #define MBEDTLS_GCM_DECRYPT     0
 
-#define MBEDTLS_ERR_GCM_AUTH_FAILED                       -0x0012  /**< Authenticated decryption failed. */
+/** Authenticated decryption failed. */
+#define MBEDTLS_ERR_GCM_AUTH_FAILED                       -0x0012
 
 /* MBEDTLS_ERR_GCM_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_GCM_HW_ACCEL_FAILED                   -0x0013  /**< GCM hardware accelerator failed. */
+/** GCM hardware accelerator failed. */
+#define MBEDTLS_ERR_GCM_HW_ACCEL_FAILED                   -0x0013
 
-#define MBEDTLS_ERR_GCM_BAD_INPUT                         -0x0014  /**< Bad input parameters to function. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_GCM_BAD_INPUT                         -0x0014
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/havege.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/havege.h
index e90839ddeb4..7d27039e8c7 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/havege.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/havege.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,18 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_HAVEGE_H
 #define MBEDTLS_HAVEGE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
+#include <stdint.h>
 
 #define MBEDTLS_HAVEGE_COLLECT_SIZE 1024
 
@@ -68,9 +42,9 @@ extern "C" {
  */
 typedef struct mbedtls_havege_state
 {
-    int PT1, PT2, offset[2];
-    int pool[MBEDTLS_HAVEGE_COLLECT_SIZE];
-    int WALK[8192];
+    uint32_t PT1, PT2, offset[2];
+    uint32_t pool[MBEDTLS_HAVEGE_COLLECT_SIZE];
+    uint32_t WALK[8192];
 }
 mbedtls_havege_state;
 
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hkdf.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hkdf.h
index 07ffe83b23d..223004b8ede 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hkdf.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hkdf.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,44 +21,24 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_HKDF_H
 #define MBEDTLS_HKDF_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 /**
  *  \name HKDF Error codes
  *  \{
  */
-#define MBEDTLS_ERR_HKDF_BAD_INPUT_DATA  -0x5F80  /**< Bad input parameters to function. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_HKDF_BAD_INPUT_DATA  -0x5F80
 /* \} name */
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
index 5718e187a9f..79132d4d910 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,50 +22,33 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_HMAC_DRBG_H
 #define MBEDTLS_HMAC_DRBG_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /*
  * Error codes
  */
-#define MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG              -0x0003  /**< Too many random requested in single call. */
-#define MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG                -0x0005  /**< Input too large (Entropy + additional). */
-#define MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR                -0x0007  /**< Read/write error in file. */
-#define MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED        -0x0009  /**< The entropy source failed. */
+/** Too many random requested in single call. */
+#define MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG              -0x0003
+/** Input too large (Entropy + additional). */
+#define MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG                -0x0005
+/** Read/write error in file. */
+#define MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR                -0x0007
+/** The entropy source failed. */
+#define MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED        -0x0009
 
 /**
  * \name SECTION: Module settings
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md.h
index 2ba8d9e7a91..84fafd2ac77 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,27 +20,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_MD_H
@@ -55,18 +28,24 @@
 #include <stddef.h>
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
+#include "mbedtls/platform_util.h"
 
-#define MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE                -0x5080  /**< The selected feature is not available. */
-#define MBEDTLS_ERR_MD_BAD_INPUT_DATA                     -0x5100  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_MD_ALLOC_FAILED                       -0x5180  /**< Failed to allocate memory. */
-#define MBEDTLS_ERR_MD_FILE_IO_ERROR                      -0x5200  /**< Opening or reading of file failed. */
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE                -0x5080
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_MD_BAD_INPUT_DATA                     -0x5100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_MD_ALLOC_FAILED                       -0x5180
+/** Opening or reading of file failed. */
+#define MBEDTLS_ERR_MD_FILE_IO_ERROR                      -0x5200
 
 /* MBEDTLS_ERR_MD_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD_HW_ACCEL_FAILED                    -0x5280  /**< MD hardware accelerator failed. */
+/** MD hardware accelerator failed. */
+#define MBEDTLS_ERR_MD_HW_ACCEL_FAILED                    -0x5280
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +78,12 @@ typedef enum {
 #define MBEDTLS_MD_MAX_SIZE         32  /* longest known is SHA256 or less */
 #endif
 
+#if defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_MD_MAX_BLOCK_SIZE         128
+#else
+#define MBEDTLS_MD_MAX_BLOCK_SIZE         64
+#endif
+
 /**
  * Opaque struct defined in md_internal.h.
  */
@@ -226,6 +211,7 @@ int mbedtls_md_init_ctx( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_
  *                  failure.
  * \return          #MBEDTLS_ERR_MD_ALLOC_FAILED on memory-allocation failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_setup( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info, int hmac );
 
 /**
@@ -247,6 +233,7 @@ int mbedtls_md_setup( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_inf
  * \return          \c 0 on success.
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_clone( mbedtls_md_context_t *dst,
                       const mbedtls_md_context_t *src );
 
@@ -296,6 +283,7 @@ const char *mbedtls_md_get_name( const mbedtls_md_info_t *md_info );
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_starts( mbedtls_md_context_t *ctx );
 
 /**
@@ -314,6 +302,7 @@ int mbedtls_md_starts( mbedtls_md_context_t *ctx );
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_update( mbedtls_md_context_t *ctx, const unsigned char *input, size_t ilen );
 
 /**
@@ -334,6 +323,7 @@ int mbedtls_md_update( mbedtls_md_context_t *ctx, const unsigned char *input, si
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_finish( mbedtls_md_context_t *ctx, unsigned char *output );
 
 /**
@@ -354,6 +344,7 @@ int mbedtls_md_finish( mbedtls_md_context_t *ctx, unsigned char *output );
  * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                 failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md( const mbedtls_md_info_t *md_info, const unsigned char *input, size_t ilen,
         unsigned char *output );
 
@@ -375,6 +366,7 @@ int mbedtls_md( const mbedtls_md_info_t *md_info, const unsigned char *input, si
  *                 the file pointed by \p path.
  * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA if \p md_info was NULL.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_file( const mbedtls_md_info_t *md_info, const char *path,
                      unsigned char *output );
 #endif /* MBEDTLS_FS_IO */
@@ -397,6 +389,7 @@ int mbedtls_md_file( const mbedtls_md_info_t *md_info, const char *path,
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_starts( mbedtls_md_context_t *ctx, const unsigned char *key,
                     size_t keylen );
 
@@ -419,6 +412,7 @@ int mbedtls_md_hmac_starts( mbedtls_md_context_t *ctx, const unsigned char *key,
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_update( mbedtls_md_context_t *ctx, const unsigned char *input,
                     size_t ilen );
 
@@ -440,6 +434,7 @@ int mbedtls_md_hmac_update( mbedtls_md_context_t *ctx, const unsigned char *inpu
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_finish( mbedtls_md_context_t *ctx, unsigned char *output);
 
 /**
@@ -457,6 +452,7 @@ int mbedtls_md_hmac_finish( mbedtls_md_context_t *ctx, unsigned char *output);
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_reset( mbedtls_md_context_t *ctx );
 
 /**
@@ -481,11 +477,13 @@ int mbedtls_md_hmac_reset( mbedtls_md_context_t *ctx );
  * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                 failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac( const mbedtls_md_info_t *md_info, const unsigned char *key, size_t keylen,
                 const unsigned char *input, size_t ilen,
                 unsigned char *output );
 
 /* Internal use */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_process( mbedtls_md_context_t *ctx, const unsigned char *data );
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md2.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md2.h
index 9607df66baf..7f3d5cf446c 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md2.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md2.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -29,33 +23,12 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_MD2_H
 #define MBEDTLS_MD2_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,7 +36,8 @@
 #include <stddef.h>
 
 /* MBEDTLS_ERR_MD2_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD2_HW_ACCEL_FAILED                   -0x002B  /**< MD2 hardware accelerator failed */
+/** MD2 hardware accelerator failed */
+#define MBEDTLS_ERR_MD2_HW_ACCEL_FAILED                   -0x002B
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md4.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md4.h
index 6ceaf7a2f69..0238c6723a6 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md4.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md4.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -29,33 +23,12 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_MD4_H
 #define MBEDTLS_MD4_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -64,7 +37,8 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_MD4_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD4_HW_ACCEL_FAILED                   -0x002D  /**< MD4 hardware accelerator failed */
+/** MD4 hardware accelerator failed */
+#define MBEDTLS_ERR_MD4_HW_ACCEL_FAILED                   -0x002D
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md5.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md5.h
index b9d0ca929a0..73e4dd2c2a7 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md5.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md5.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,33 +22,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_MD5_H
 #define MBEDTLS_MD5_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,7 +36,8 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_MD5_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD5_HW_ACCEL_FAILED                   -0x002F  /**< MD5 hardware accelerator failed */
+/** MD5 hardware accelerator failed */
+#define MBEDTLS_ERR_MD5_HW_ACCEL_FAILED                   -0x002F
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md_internal.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md_internal.h
index 847f50aa0a8..f33cdf6086d 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md_internal.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/md_internal.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,38 +22,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_MD_WRAP_H
 #define MBEDTLS_MD_WRAP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -71,42 +44,17 @@ extern "C" {
  */
 struct mbedtls_md_info_t
 {
-    /** Digest identifier */
-    mbedtls_md_type_t type;
-
     /** Name of the message digest */
     const char * name;
 
+    /** Digest identifier */
+    mbedtls_md_type_t type;
+
     /** Output length of the digest function in bytes */
-    int size;
+    unsigned char size;
 
     /** Block length of the digest function in bytes */
-    int block_size;
-
-    /** Digest initialisation function */
-    int (*starts_func)( void *ctx );
-
-    /** Digest update function */
-    int (*update_func)( void *ctx, const unsigned char *input, size_t ilen );
-
-    /** Digest finalisation function */
-    int (*finish_func)( void *ctx, unsigned char *output );
-
-    /** Generic digest function */
-    int (*digest_func)( const unsigned char *input, size_t ilen,
-                        unsigned char *output );
-
-    /** Allocate a new context */
-    void * (*ctx_alloc_func)( void );
-
-    /** Free the given context */
-    void (*ctx_free_func)( void *ctx );
-
-    /** Clone state from a context */
-    void (*clone_func)( void *dst, const void *src );
-
-    /** Internal use only */
-    int (*process_func)( void *ctx, const unsigned char *input );
+    unsigned char block_size;
 };
 
 #if defined(MBEDTLS_MD2_C)
@@ -129,7 +77,9 @@ extern const mbedtls_md_info_t mbedtls_sha224_info;
 extern const mbedtls_md_info_t mbedtls_sha256_info;
 #endif
 #if defined(MBEDTLS_SHA512_C)
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
 extern const mbedtls_md_info_t mbedtls_sha384_info;
+#endif
 extern const mbedtls_md_info_t mbedtls_sha512_info;
 #endif
 
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h
index 89c06174957..233977252a3 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_MEMORY_BUFFER_ALLOC_H
 #define MBEDTLS_MEMORY_BUFFER_ALLOC_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net.h
index 6c7a49d3bdf..66921887da0 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,36 +20,15 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
-#include "net_sockets.h"
+#include "mbedtls/net_sockets.h"
 #if defined(MBEDTLS_DEPRECATED_WARNING)
 #warning "Deprecated header file: Superseded by mbedtls/net_sockets.h"
 #endif /* MBEDTLS_DEPRECATED_WARNING */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
index c6e1a0270e8..ceb7d5f6527 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
@@ -21,13 +21,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -40,55 +34,47 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_NET_SOCKETS_H
 #define MBEDTLS_NET_SOCKETS_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #include <stddef.h>
 #include <stdint.h>
 
-#define MBEDTLS_ERR_NET_SOCKET_FAILED                     -0x0042  /**< Failed to open a socket. */
-#define MBEDTLS_ERR_NET_CONNECT_FAILED                    -0x0044  /**< The connection to the given server / port failed. */
-#define MBEDTLS_ERR_NET_BIND_FAILED                       -0x0046  /**< Binding of the socket failed. */
-#define MBEDTLS_ERR_NET_LISTEN_FAILED                     -0x0048  /**< Could not listen on the socket. */
-#define MBEDTLS_ERR_NET_ACCEPT_FAILED                     -0x004A  /**< Could not accept the incoming connection. */
-#define MBEDTLS_ERR_NET_RECV_FAILED                       -0x004C  /**< Reading information from the socket failed. */
-#define MBEDTLS_ERR_NET_SEND_FAILED                       -0x004E  /**< Sending information through the socket failed. */
-#define MBEDTLS_ERR_NET_CONN_RESET                        -0x0050  /**< Connection was reset by peer. */
-#define MBEDTLS_ERR_NET_UNKNOWN_HOST                      -0x0052  /**< Failed to get an IP address for the given hostname. */
-#define MBEDTLS_ERR_NET_BUFFER_TOO_SMALL                  -0x0043  /**< Buffer is too small to hold the data. */
-#define MBEDTLS_ERR_NET_INVALID_CONTEXT                   -0x0045  /**< The context is invalid, eg because it was free()ed. */
-#define MBEDTLS_ERR_NET_POLL_FAILED                       -0x0047  /**< Polling the net context failed. */
-#define MBEDTLS_ERR_NET_BAD_INPUT_DATA                    -0x0049  /**< Input invalid. */
+/** Failed to open a socket. */
+#define MBEDTLS_ERR_NET_SOCKET_FAILED                     -0x0042
+/** The connection to the given server / port failed. */
+#define MBEDTLS_ERR_NET_CONNECT_FAILED                    -0x0044
+/** Binding of the socket failed. */
+#define MBEDTLS_ERR_NET_BIND_FAILED                       -0x0046
+/** Could not listen on the socket. */
+#define MBEDTLS_ERR_NET_LISTEN_FAILED                     -0x0048
+/** Could not accept the incoming connection. */
+#define MBEDTLS_ERR_NET_ACCEPT_FAILED                     -0x004A
+/** Reading information from the socket failed. */
+#define MBEDTLS_ERR_NET_RECV_FAILED                       -0x004C
+/** Sending information through the socket failed. */
+#define MBEDTLS_ERR_NET_SEND_FAILED                       -0x004E
+/** Connection was reset by peer. */
+#define MBEDTLS_ERR_NET_CONN_RESET                        -0x0050
+/** Failed to get an IP address for the given hostname. */
+#define MBEDTLS_ERR_NET_UNKNOWN_HOST                      -0x0052
+/** Buffer is too small to hold the data. */
+#define MBEDTLS_ERR_NET_BUFFER_TOO_SMALL                  -0x0043
+/** The context is invalid, eg because it was free()ed. */
+#define MBEDTLS_ERR_NET_INVALID_CONTEXT                   -0x0045
+/** Polling the net context failed. */
+#define MBEDTLS_ERR_NET_POLL_FAILED                       -0x0047
+/** Input invalid. */
+#define MBEDTLS_ERR_NET_BAD_INPUT_DATA                    -0x0049
 
 #define MBEDTLS_NET_LISTEN_BACKLOG         10 /**< The backlog that listen() should use. */
 
@@ -294,6 +280,13 @@ int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len );
 int mbedtls_net_recv_timeout( void *ctx, unsigned char *buf, size_t len,
                       uint32_t timeout );
 
+/**
+ * \brief          Closes down the connection and free associated data
+ *
+ * \param ctx      The context to close
+ */
+void mbedtls_net_close( mbedtls_net_context *ctx );
+
 /**
  * \brief          Gracefully shutdown the connection and free associated data
  *
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h
index 94356569942..7f3e64a525d 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h
@@ -17,13 +17,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -36,39 +30,18 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_NIST_KW_H
 #define MBEDTLS_NIST_KW_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/oid.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/oid.h
index 4a7e3b4b3fd..1c39186a491 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/oid.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/oid.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,56 +18,55 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_OID_H
 #define MBEDTLS_OID_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
-#include "pk.h"
+#include "mbedtls/asn1.h"
+#include "mbedtls/pk.h"
 
 #include <stddef.h>
 
 #if defined(MBEDTLS_CIPHER_C)
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 #endif
 
 #if defined(MBEDTLS_MD_C)
-#include "md.h"
+#include "mbedtls/md.h"
 #endif
 
-#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C)
-#include "x509.h"
-#endif
+/** OID is not found. */
+#define MBEDTLS_ERR_OID_NOT_FOUND                         -0x002E
+/** output buffer is too small */
+#define MBEDTLS_ERR_OID_BUF_TOO_SMALL                     -0x000B
 
-#define MBEDTLS_ERR_OID_NOT_FOUND                         -0x002E  /**< OID is not found. */
-#define MBEDTLS_ERR_OID_BUF_TOO_SMALL                     -0x000B  /**< output buffer is too small */
+/* This is for the benefit of X.509, but defined here in order to avoid
+ * having a "backwards" include of x.509.h here */
+/*
+ * X.509 extension types (internal, arbitrary values for bitsets)
+ */
+#define MBEDTLS_OID_X509_EXT_AUTHORITY_KEY_IDENTIFIER    (1 << 0)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_KEY_IDENTIFIER      (1 << 1)
+#define MBEDTLS_OID_X509_EXT_KEY_USAGE                   (1 << 2)
+#define MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES        (1 << 3)
+#define MBEDTLS_OID_X509_EXT_POLICY_MAPPINGS             (1 << 4)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_ALT_NAME            (1 << 5)
+#define MBEDTLS_OID_X509_EXT_ISSUER_ALT_NAME             (1 << 6)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_DIRECTORY_ATTRS     (1 << 7)
+#define MBEDTLS_OID_X509_EXT_BASIC_CONSTRAINTS           (1 << 8)
+#define MBEDTLS_OID_X509_EXT_NAME_CONSTRAINTS            (1 << 9)
+#define MBEDTLS_OID_X509_EXT_POLICY_CONSTRAINTS          (1 << 10)
+#define MBEDTLS_OID_X509_EXT_EXTENDED_KEY_USAGE          (1 << 11)
+#define MBEDTLS_OID_X509_EXT_CRL_DISTRIBUTION_POINTS     (1 << 12)
+#define MBEDTLS_OID_X509_EXT_INIHIBIT_ANYPOLICY          (1 << 13)
+#define MBEDTLS_OID_X509_EXT_FRESHEST_CRL                (1 << 14)
+#define MBEDTLS_OID_X509_EXT_NS_CERT_TYPE                (1 << 16)
 
 /*
  * Top level OID tuples
@@ -129,7 +122,8 @@
  * { iso(1) identified-organization(3) dod(6) internet(1)
  *                      security(5) mechanisms(5) pkix(7) }
  */
-#define MBEDTLS_OID_PKIX                        MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_DOD "\x01\x05\x05\x07"
+#define MBEDTLS_OID_INTERNET                    MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_DOD "\x01"
+#define MBEDTLS_OID_PKIX                        MBEDTLS_OID_INTERNET "\x05\x05\x07"
 
 /*
  * Arc for standard naming attributes
@@ -174,6 +168,11 @@
 #define MBEDTLS_OID_INIHIBIT_ANYPOLICY          MBEDTLS_OID_ID_CE "\x36" /**< id-ce-inhibitAnyPolicy OBJECT IDENTIFIER ::=  { id-ce 54 } */
 #define MBEDTLS_OID_FRESHEST_CRL                MBEDTLS_OID_ID_CE "\x2E" /**< id-ce-freshestCRL OBJECT IDENTIFIER ::=  { id-ce 46 } */
 
+/*
+ * Certificate policies
+ */
+#define MBEDTLS_OID_ANY_POLICY              MBEDTLS_OID_CERTIFICATE_POLICIES "\x00" /**< anyPolicy OBJECT IDENTIFIER ::= { id-ce-certificatePolicies 0 } */
+
 /*
  * Netscape certificate extensions
  */
@@ -208,6 +207,16 @@
 #define MBEDTLS_OID_TIME_STAMPING               MBEDTLS_OID_KP "\x08" /**< id-kp-timeStamping OBJECT IDENTIFIER ::= { id-kp 8 } */
 #define MBEDTLS_OID_OCSP_SIGNING                MBEDTLS_OID_KP "\x09" /**< id-kp-OCSPSigning OBJECT IDENTIFIER ::= { id-kp 9 } */
 
+/**
+ * Wi-SUN Alliance Field Area Network
+ * { iso(1) identified-organization(3) dod(6) internet(1)
+ *                      private(4) enterprise(1) WiSUN(45605) FieldAreaNetwork(1) }
+ */
+#define MBEDTLS_OID_WISUN_FAN                   MBEDTLS_OID_INTERNET "\x04\x01\x82\xe4\x25\x01"
+
+#define MBEDTLS_OID_ON                          MBEDTLS_OID_PKIX "\x08" /**< id-on OBJECT IDENTIFIER ::= { id-pkix 8 } */
+#define MBEDTLS_OID_ON_HW_MODULE_NAME           MBEDTLS_OID_ON "\x04" /**< id-on-hardwareModuleName OBJECT IDENTIFIER ::= { id-on 4 } */
+
 /*
  * PKCS definition OIDs
  */
@@ -253,6 +262,8 @@
 
 #define MBEDTLS_OID_DIGEST_ALG_SHA512           MBEDTLS_OID_NIST_ALG "\x02\x03" /**< id-mbedtls_sha512 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 3 } */
 
+#define MBEDTLS_OID_DIGEST_ALG_RIPEMD160        MBEDTLS_OID_TELETRUST "\x03\x02\x01" /**< id-ripemd160 OBJECT IDENTIFIER :: { iso(1) identified-organization(3) teletrust(36) algorithm(3) hashAlgorithm(2) ripemd160(1) } */
+
 #define MBEDTLS_OID_HMAC_SHA1                   MBEDTLS_OID_RSA_COMPANY "\x02\x07" /**< id-hmacWithSHA1 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 7 } */
 
 #define MBEDTLS_OID_HMAC_SHA224                 MBEDTLS_OID_RSA_COMPANY "\x02\x08" /**< id-hmacWithSHA224 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 8 } */
@@ -449,7 +460,6 @@ typedef struct mbedtls_oid_descriptor_t
  */
 int mbedtls_oid_get_numeric_string( char *buf, size_t size, const mbedtls_asn1_buf *oid );
 
-#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C)
 /**
  * \brief          Translate an X.509 extension OID into local values
  *
@@ -459,7 +469,6 @@ int mbedtls_oid_get_numeric_string( char *buf, size_t size, const mbedtls_asn1_b
  * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
  */
 int mbedtls_oid_get_x509_ext_type( const mbedtls_asn1_buf *oid, int *ext_type );
-#endif
 
 /**
  * \brief          Translate an X.509 attribute type OID into the short name
@@ -585,6 +594,16 @@ int mbedtls_oid_get_md_hmac( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_
  */
 int mbedtls_oid_get_extended_key_usage( const mbedtls_asn1_buf *oid, const char **desc );
 
+/**
+ * \brief          Translate certificate policies OID into description
+ *
+ * \param oid      OID to use
+ * \param desc     place to store string pointer
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_certificate_policies( const mbedtls_asn1_buf *oid, const char **desc );
+
 /**
  * \brief          Translate md_type into hash algorithm OID
  *
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/padlock.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/padlock.h
index 0e4a6bbf69f..624d02dff55 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/padlock.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/padlock.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,40 +22,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PADLOCK_H
 #define MBEDTLS_PADLOCK_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "aes.h"
+#include "mbedtls/aes.h"
 
-#define MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED               -0x0030  /**< Input data should be aligned. */
+/** Input data should be aligned. */
+#define MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED               -0x0030
 
 #if defined(__has_feature)
 #if __has_feature(address_sanitizer)
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pem.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pem.h
index c9df7ca6e86..dfb4ff218e6 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pem.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pem.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PEM_H
 #define MBEDTLS_PEM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,15 +36,24 @@
  * PEM data.
  * \{
  */
-#define MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT          -0x1080  /**< No PEM header or footer found. */
-#define MBEDTLS_ERR_PEM_INVALID_DATA                      -0x1100  /**< PEM string is not as expected. */
-#define MBEDTLS_ERR_PEM_ALLOC_FAILED                      -0x1180  /**< Failed to allocate memory. */
-#define MBEDTLS_ERR_PEM_INVALID_ENC_IV                    -0x1200  /**< RSA IV is not in hex-format. */
-#define MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG                   -0x1280  /**< Unsupported key encryption algorithm. */
-#define MBEDTLS_ERR_PEM_PASSWORD_REQUIRED                 -0x1300  /**< Private key password can't be empty. */
-#define MBEDTLS_ERR_PEM_PASSWORD_MISMATCH                 -0x1380  /**< Given private key password does not allow for correct decryption. */
-#define MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE               -0x1400  /**< Unavailable feature, e.g. hashing/encryption combination. */
-#define MBEDTLS_ERR_PEM_BAD_INPUT_DATA                    -0x1480  /**< Bad input parameters to function. */
+/** No PEM header or footer found. */
+#define MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT          -0x1080
+/** PEM string is not as expected. */
+#define MBEDTLS_ERR_PEM_INVALID_DATA                      -0x1100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_PEM_ALLOC_FAILED                      -0x1180
+/** RSA IV is not in hex-format. */
+#define MBEDTLS_ERR_PEM_INVALID_ENC_IV                    -0x1200
+/** Unsupported key encryption algorithm. */
+#define MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG                   -0x1280
+/** Private key password can't be empty. */
+#define MBEDTLS_ERR_PEM_PASSWORD_REQUIRED                 -0x1300
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PEM_PASSWORD_MISMATCH                 -0x1380
+/** Unavailable feature, e.g. hashing/encryption combination. */
+#define MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE               -0x1400
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PEM_BAD_INPUT_DATA                    -0x1480
 /* \} name */
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pk.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pk.h
index 20d51d4f38c..8f2abf2a608 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pk.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pk.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,50 +18,33 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_PK_H
 #define MBEDTLS_PK_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 #if defined(MBEDTLS_RSA_C)
-#include "rsa.h"
+#include "mbedtls/rsa.h"
 #endif
 
 #if defined(MBEDTLS_ECP_C)
-#include "ecp.h"
+#include "mbedtls/ecp.h"
 #endif
 
 #if defined(MBEDTLS_ECDSA_C)
-#include "ecdsa.h"
+#include "mbedtls/ecdsa.h"
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
 #endif
 
 #if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
@@ -75,23 +52,38 @@
 #define inline __inline
 #endif
 
-#define MBEDTLS_ERR_PK_ALLOC_FAILED        -0x3F80  /**< Memory allocation failed. */
-#define MBEDTLS_ERR_PK_TYPE_MISMATCH       -0x3F00  /**< Type mismatch, eg attempt to encrypt with an ECDSA key */
-#define MBEDTLS_ERR_PK_BAD_INPUT_DATA      -0x3E80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_PK_FILE_IO_ERROR       -0x3E00  /**< Read/write of file failed. */
-#define MBEDTLS_ERR_PK_KEY_INVALID_VERSION -0x3D80  /**< Unsupported key version */
-#define MBEDTLS_ERR_PK_KEY_INVALID_FORMAT  -0x3D00  /**< Invalid key tag or value. */
-#define MBEDTLS_ERR_PK_UNKNOWN_PK_ALG      -0x3C80  /**< Key algorithm is unsupported (only RSA and EC are supported). */
-#define MBEDTLS_ERR_PK_PASSWORD_REQUIRED   -0x3C00  /**< Private key password can't be empty. */
-#define MBEDTLS_ERR_PK_PASSWORD_MISMATCH   -0x3B80  /**< Given private key password does not allow for correct decryption. */
-#define MBEDTLS_ERR_PK_INVALID_PUBKEY      -0x3B00  /**< The pubkey tag or value is invalid (only RSA and EC are supported). */
-#define MBEDTLS_ERR_PK_INVALID_ALG         -0x3A80  /**< The algorithm tag or value is invalid. */
-#define MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE -0x3A00  /**< Elliptic curve is unsupported (only NIST curves are supported). */
-#define MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE -0x3980  /**< Unavailable feature, e.g. RSA disabled for RSA key. */
-#define MBEDTLS_ERR_PK_SIG_LEN_MISMATCH    -0x3900  /**< The buffer contains a valid signature followed by more data. */
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_PK_ALLOC_FAILED        -0x3F80
+/** Type mismatch, eg attempt to encrypt with an ECDSA key */
+#define MBEDTLS_ERR_PK_TYPE_MISMATCH       -0x3F00
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PK_BAD_INPUT_DATA      -0x3E80
+/** Read/write of file failed. */
+#define MBEDTLS_ERR_PK_FILE_IO_ERROR       -0x3E00
+/** Unsupported key version */
+#define MBEDTLS_ERR_PK_KEY_INVALID_VERSION -0x3D80
+/** Invalid key tag or value. */
+#define MBEDTLS_ERR_PK_KEY_INVALID_FORMAT  -0x3D00
+/** Key algorithm is unsupported (only RSA and EC are supported). */
+#define MBEDTLS_ERR_PK_UNKNOWN_PK_ALG      -0x3C80
+/** Private key password can't be empty. */
+#define MBEDTLS_ERR_PK_PASSWORD_REQUIRED   -0x3C00
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PK_PASSWORD_MISMATCH   -0x3B80
+/** The pubkey tag or value is invalid (only RSA and EC are supported). */
+#define MBEDTLS_ERR_PK_INVALID_PUBKEY      -0x3B00
+/** The algorithm tag or value is invalid. */
+#define MBEDTLS_ERR_PK_INVALID_ALG         -0x3A80
+/** Elliptic curve is unsupported (only NIST curves are supported). */
+#define MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE -0x3A00
+/** Unavailable feature, e.g. RSA disabled for RSA key. */
+#define MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE -0x3980
+/** The buffer contains a valid signature followed by more data. */
+#define MBEDTLS_ERR_PK_SIG_LEN_MISMATCH    -0x3900
 
 /* MBEDTLS_ERR_PK_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_PK_HW_ACCEL_FAILED     -0x3880  /**< PK hardware accelerator failed. */
+/** PK hardware accelerator failed. */
+#define MBEDTLS_ERR_PK_HW_ACCEL_FAILED     -0x3880
 
 #ifdef __cplusplus
 extern "C" {
@@ -108,6 +100,7 @@ typedef enum {
     MBEDTLS_PK_ECDSA,
     MBEDTLS_PK_RSA_ALT,
     MBEDTLS_PK_RSASSA_PSS,
+    MBEDTLS_PK_OPAQUE,
 } mbedtls_pk_type_t;
 
 /**
@@ -121,6 +114,58 @@ typedef struct mbedtls_pk_rsassa_pss_options
 
 } mbedtls_pk_rsassa_pss_options;
 
+/**
+ * \brief           Maximum size of a signature made by mbedtls_pk_sign().
+ */
+/* We need to set MBEDTLS_PK_SIGNATURE_MAX_SIZE to the maximum signature
+ * size among the supported signature types. Do it by starting at 0,
+ * then incrementally increasing to be large enough for each supported
+ * signature mechanism.
+ *
+ * The resulting value can be 0, for example if MBEDTLS_ECDH_C is enabled
+ * (which allows the pk module to be included) but neither MBEDTLS_ECDSA_C
+ * nor MBEDTLS_RSA_C nor any opaque signature mechanism (PSA or RSA_ALT).
+ */
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE 0
+
+#if ( defined(MBEDTLS_RSA_C) || defined(MBEDTLS_PK_RSA_ALT_SUPPORT) ) && \
+    MBEDTLS_MPI_MAX_SIZE > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* For RSA, the signature can be as large as the bignum module allows.
+ * For RSA_ALT, the signature size is not necessarily tied to what the
+ * bignum module can do, but in the absence of any specific setting,
+ * we use that (rsa_alt_sign_wrap in pk_wrap will check). */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_MPI_MAX_SIZE
+#endif
+
+#if defined(MBEDTLS_ECDSA_C) &&                                 \
+    MBEDTLS_ECDSA_MAX_LEN > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* For ECDSA, the ecdsa module exports a constant for the maximum
+ * signature size. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_ECDSA_MAX_LEN
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#if PSA_SIGNATURE_MAX_SIZE > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* PSA_SIGNATURE_MAX_SIZE is the maximum size of a signature made
+ * through the PSA API in the PSA representation. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE PSA_SIGNATURE_MAX_SIZE
+#endif
+
+#if PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE + 11 > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* The Mbed TLS representation is different for ECDSA signatures:
+ * PSA uses the raw concatenation of r and s,
+ * whereas Mbed TLS uses the ASN.1 representation (SEQUENCE of two INTEGERs).
+ * Add the overhead of ASN.1: up to (1+2) + 2 * (1+2+1) for the
+ * types, lengths (represented by up to 2 bytes), and potential leading
+ * zeros of the INTEGERs and the SEQUENCE. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE ( PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE + 11 )
+#endif
+#endif /* defined(MBEDTLS_USE_PSA_CRYPTO) */
+
 /**
  * \brief           Types for interfacing with the debug module
  */
@@ -234,6 +279,11 @@ void mbedtls_pk_init( mbedtls_pk_context *ctx );
  *
  * \param ctx       The context to clear. It must have been initialized.
  *                  If this is \c NULL, this function does nothing.
+ *
+ * \note            For contexts that have been set up with
+ *                  mbedtls_pk_setup_opaque(), this does not free the underlying
+ *                  PSA key and you still need to call psa_destroy_key()
+ *                  independently if you want to destroy that key.
  */
 void mbedtls_pk_free( mbedtls_pk_context *ctx );
 
@@ -272,6 +322,39 @@ void mbedtls_pk_restart_free( mbedtls_pk_restart_ctx *ctx );
  */
 int mbedtls_pk_setup( mbedtls_pk_context *ctx, const mbedtls_pk_info_t *info );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief           Initialize a PK context to wrap a PSA key.
+ *
+ * \note            This function replaces mbedtls_pk_setup() for contexts
+ *                  that wrap a (possibly opaque) PSA key instead of
+ *                  storing and manipulating the key material directly.
+ *
+ * \param ctx       The context to initialize. It must be empty (type NONE).
+ * \param key       The PSA key to wrap, which must hold an ECC key pair
+ *                  (see notes below).
+ *
+ * \note            The wrapped key must remain valid as long as the
+ *                  wrapping PK context is in use, that is at least between
+ *                  the point this function is called and the point
+ *                  mbedtls_pk_free() is called on this context. The wrapped
+ *                  key might then be independently used or destroyed.
+ *
+ * \note            This function is currently only available for ECC key
+ *                  pairs (that is, ECC keys containing private key material).
+ *                  Support for other key types may be added later.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_PK_BAD_INPUT_DATA on invalid input
+ *                  (context already used, invalid key identifier).
+ * \return          #MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE if the key is not an
+ *                  ECC key pair.
+ * \return          #MBEDTLS_ERR_PK_ALLOC_FAILED on allocation failure.
+ */
+int mbedtls_pk_setup_opaque( mbedtls_pk_context *ctx,
+                             const psa_key_id_t key );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 #if defined(MBEDTLS_PK_RSA_ALT_SUPPORT)
 /**
  * \brief           Initialize an RSA-alt context
@@ -425,8 +508,13 @@ int mbedtls_pk_verify_ext( mbedtls_pk_type_t type, const void *options,
  * \param md_alg    Hash algorithm used (see notes)
  * \param hash      Hash of the message to sign
  * \param hash_len  Hash length or 0 (see notes)
- * \param sig       Place to write the signature
- * \param sig_len   Number of bytes written
+ * \param sig       Place to write the signature.
+ *                  It must have enough room for the signature.
+ *                  #MBEDTLS_PK_SIGNATURE_MAX_SIZE is always enough.
+ *                  You may use a smaller buffer if it is large enough
+ *                  given the key type.
+ * \param sig_len   On successful return,
+ *                  the number of bytes written to \p sig.
  * \param f_rng     RNG function
  * \param p_rng     RNG parameter
  *
@@ -441,10 +529,6 @@ int mbedtls_pk_verify_ext( mbedtls_pk_type_t type, const void *options,
  *
  * \note            For RSA, md_alg may be MBEDTLS_MD_NONE if hash_len != 0.
  *                  For ECDSA, md_alg may never be MBEDTLS_MD_NONE.
- *
- * \note            In order to ensure enough space for the signature, the
- *                  \p sig buffer size must be of at least
- *                  `max(MBEDTLS_ECDSA_MAX_LEN, MBEDTLS_MPI_MAX_SIZE)` bytes.
  */
 int mbedtls_pk_sign( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
              const unsigned char *hash, size_t hash_len,
@@ -459,22 +543,23 @@ int mbedtls_pk_sign( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
  *                  \c mbedtls_ecp_set_max_ops() to reduce blocking for ECC
  *                  operations. For RSA, same as \c mbedtls_pk_sign().
  *
- * \note            In order to ensure enough space for the signature, the
- *                  \p sig buffer size must be of at least
- *                  `max(MBEDTLS_ECDSA_MAX_LEN, MBEDTLS_MPI_MAX_SIZE)` bytes.
- *
  * \param ctx       The PK context to use. It must have been set up
  *                  with a private key.
- * \param md_alg    Hash algorithm used (see notes)
+ * \param md_alg    Hash algorithm used (see notes for mbedtls_pk_sign())
  * \param hash      Hash of the message to sign
- * \param hash_len  Hash length or 0 (see notes)
- * \param sig       Place to write the signature
- * \param sig_len   Number of bytes written
+ * \param hash_len  Hash length or 0 (see notes for mbedtls_pk_sign())
+ * \param sig       Place to write the signature.
+ *                  It must have enough room for the signature.
+ *                  #MBEDTLS_PK_SIGNATURE_MAX_SIZE is always enough.
+ *                  You may use a smaller buffer if it is large enough
+ *                  given the key type.
+ * \param sig_len   On successful return,
+ *                  the number of bytes written to \p sig.
  * \param f_rng     RNG function
  * \param p_rng     RNG parameter
  * \param rs_ctx    Restart context (NULL to disable restart)
  *
- * \return          See \c mbedtls_pk_sign(), or
+ * \return          See \c mbedtls_pk_sign().
  * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
  *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
  */
@@ -534,7 +619,11 @@ int mbedtls_pk_encrypt( mbedtls_pk_context *ctx,
  * \param pub       Context holding a public key.
  * \param prv       Context holding a private (and public) key.
  *
- * \return          0 on success or MBEDTLS_ERR_PK_BAD_INPUT_DATA
+ * \return          \c 0 on success (keys were checked and match each other).
+ * \return          #MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE if the keys could not
+ *                  be checked - in that case they may or may not match.
+ * \return          #MBEDTLS_ERR_PK_BAD_INPUT_DATA if a context is invalid.
+ * \return          Another non-zero value if the keys do not match.
  */
 int mbedtls_pk_check_pair( const mbedtls_pk_context *pub, const mbedtls_pk_context *prv );
 
@@ -773,6 +862,32 @@ int mbedtls_pk_write_pubkey( unsigned char **p, unsigned char *start,
 int mbedtls_pk_load_file( const char *path, unsigned char **buf, size_t *n );
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief           Turn an EC key into an opaque one.
+ *
+ * \warning         This is a temporary utility function for tests. It might
+ *                  change or be removed at any time without notice.
+ *
+ * \note            Only ECDSA keys are supported so far. Signing with the
+ *                  specified hash is the only allowed use of that key.
+ *
+ * \param pk        Input: the EC key to import to a PSA key.
+ *                  Output: a PK context wrapping that PSA key.
+ * \param key       Output: a PSA key identifier.
+ *                  It's the caller's responsibility to call
+ *                  psa_destroy_key() on that key identifier after calling
+ *                  mbedtls_pk_free() on the PK context.
+ * \param hash_alg  The hash algorithm to allow for use with that key.
+ *
+ * \return          \c 0 if successful.
+ * \return          An Mbed TLS error code otherwise.
+ */
+int mbedtls_pk_wrap_as_opaque( mbedtls_pk_context *pk,
+                               psa_key_id_t *key,
+                               psa_algorithm_t hash_alg );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h
index 3f84cdf7489..47f7767700c 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,39 +18,18 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_PK_WRAP_H
 #define MBEDTLS_PK_WRAP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "pk.h"
+#include "mbedtls/pk.h"
 
 struct mbedtls_pk_info_t
 {
@@ -160,4 +133,8 @@ extern const mbedtls_pk_info_t mbedtls_ecdsa_info;
 extern const mbedtls_pk_info_t mbedtls_rsa_alt_info;
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+extern const mbedtls_pk_info_t mbedtls_pk_opaque_info;
+#endif
+
 #endif /* MBEDTLS_PK_WRAP_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h
index 3874d4a05ee..3530ee16889 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,40 +20,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PKCS11_H
 #define MBEDTLS_PKCS11_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #if defined(MBEDTLS_PKCS11_C)
 
-#include "x509_crt.h"
+#include "mbedtls/x509_crt.h"
 
 #include <pkcs11-helper-1.0/pkcs11h-certificate.h>
 
@@ -72,6 +45,8 @@
 extern "C" {
 #endif
 
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+
 /**
  * Context for PKCS #11 private keys.
  */
@@ -81,47 +56,71 @@ typedef struct mbedtls_pkcs11_context
         int len;
 } mbedtls_pkcs11_context;
 
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
 /**
  * Initialize a mbedtls_pkcs11_context.
  * (Just making memory references valid.)
+ *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
  */
-void mbedtls_pkcs11_init( mbedtls_pkcs11_context *ctx );
+MBEDTLS_DEPRECATED void mbedtls_pkcs11_init( mbedtls_pkcs11_context *ctx );
 
 /**
  * Fill in a mbed TLS certificate, based on the given PKCS11 helper certificate.
  *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
  * \param cert          X.509 certificate to fill
  * \param pkcs11h_cert  PKCS #11 helper certificate
  *
  * \return              0 on success.
  */
-int mbedtls_pkcs11_x509_cert_bind( mbedtls_x509_crt *cert, pkcs11h_certificate_t pkcs11h_cert );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_x509_cert_bind( mbedtls_x509_crt *cert,
+                                        pkcs11h_certificate_t pkcs11h_cert );
 
 /**
  * Set up a mbedtls_pkcs11_context storing the given certificate. Note that the
  * mbedtls_pkcs11_context will take over control of the certificate, freeing it when
  * done.
  *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
  * \param priv_key      Private key structure to fill.
  * \param pkcs11_cert   PKCS #11 helper certificate
  *
  * \return              0 on success
  */
-int mbedtls_pkcs11_priv_key_bind( mbedtls_pkcs11_context *priv_key,
-        pkcs11h_certificate_t pkcs11_cert );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_priv_key_bind(
+                                        mbedtls_pkcs11_context *priv_key,
+                                        pkcs11h_certificate_t pkcs11_cert );
 
 /**
  * Free the contents of the given private key context. Note that the structure
  * itself is not freed.
  *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
  * \param priv_key      Private key structure to cleanup
  */
-void mbedtls_pkcs11_priv_key_free( mbedtls_pkcs11_context *priv_key );
+MBEDTLS_DEPRECATED void mbedtls_pkcs11_priv_key_free(
+                                            mbedtls_pkcs11_context *priv_key );
 
 /**
  * \brief          Do an RSA private key decrypt, then remove the message
  *                 padding
  *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
  * \param ctx      PKCS #11 context
  * \param mode     must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature
  * \param input    buffer holding the encrypted data
@@ -135,15 +134,18 @@ void mbedtls_pkcs11_priv_key_free( mbedtls_pkcs11_context *priv_key );
  *                 of ctx->N (eg. 128 bytes if RSA-1024 is used) otherwise
  *                 an error is thrown.
  */
-int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx,
-                       int mode, size_t *olen,
-                       const unsigned char *input,
-                       unsigned char *output,
-                       size_t output_max_len );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx,
+                                               int mode, size_t *olen,
+                                               const unsigned char *input,
+                                               unsigned char *output,
+                                               size_t output_max_len );
 
 /**
  * \brief          Do a private RSA to sign a message digest
  *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
  * \param ctx      PKCS #11 context
  * \param mode     must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature
  * \param md_alg   a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data)
@@ -157,28 +159,58 @@ int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx,
  * \note           The "sig" buffer must be as large as the size
  *                 of ctx->N (eg. 128 bytes if RSA-1024 is used).
  */
-int mbedtls_pkcs11_sign( mbedtls_pkcs11_context *ctx,
-                    int mode,
-                    mbedtls_md_type_t md_alg,
-                    unsigned int hashlen,
-                    const unsigned char *hash,
-                    unsigned char *sig );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_sign( mbedtls_pkcs11_context *ctx,
+                                            int mode,
+                                            mbedtls_md_type_t md_alg,
+                                            unsigned int hashlen,
+                                            const unsigned char *hash,
+                                            unsigned char *sig );
 
 /**
  * SSL/TLS wrappers for PKCS#11 functions
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
  */
-static inline int mbedtls_ssl_pkcs11_decrypt( void *ctx, int mode, size_t *olen,
-                        const unsigned char *input, unsigned char *output,
-                        size_t output_max_len )
+MBEDTLS_DEPRECATED static inline int mbedtls_ssl_pkcs11_decrypt( void *ctx,
+                            int mode, size_t *olen,
+                            const unsigned char *input, unsigned char *output,
+                            size_t output_max_len )
 {
     return mbedtls_pkcs11_decrypt( (mbedtls_pkcs11_context *) ctx, mode, olen, input, output,
                            output_max_len );
 }
 
-static inline int mbedtls_ssl_pkcs11_sign( void *ctx,
-                     int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
-                     int mode, mbedtls_md_type_t md_alg, unsigned int hashlen,
-                     const unsigned char *hash, unsigned char *sig )
+/**
+ * \brief          This function signs a message digest using RSA.
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
+ * \param ctx      The PKCS #11 context.
+ * \param f_rng    The RNG function. This parameter is unused.
+ * \param p_rng    The RNG context. This parameter is unused.
+ * \param mode     The operation to run. This must be set to
+ *                 MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's
+ *                 signature.
+ * \param md_alg   The message digest algorithm. One of the MBEDTLS_MD_XXX
+ *                 must be passed to this function and MBEDTLS_MD_NONE can be
+ *                 used for signing raw data.
+ * \param hashlen  The message digest length (for MBEDTLS_MD_NONE only).
+ * \param hash     The buffer holding the message digest.
+ * \param sig      The buffer that will hold the ciphertext.
+ *
+ * \return         \c 0 if the signing operation was successful.
+ * \return         A non-zero error code on failure.
+ *
+ * \note           The \p sig buffer must be as large as the size of
+ *                 <code>ctx->N</code>. For example, 128 bytes if RSA-1024 is
+ *                 used.
+ */
+MBEDTLS_DEPRECATED static inline int mbedtls_ssl_pkcs11_sign( void *ctx,
+                    int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+                    int mode, mbedtls_md_type_t md_alg, unsigned int hashlen,
+                    const unsigned char *hash, unsigned char *sig )
 {
     ((void) f_rng);
     ((void) p_rng);
@@ -186,11 +218,25 @@ static inline int mbedtls_ssl_pkcs11_sign( void *ctx,
                         hashlen, hash, sig );
 }
 
-static inline size_t mbedtls_ssl_pkcs11_key_len( void *ctx )
+/**
+ * This function gets the length of the private key.
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
+ * \param ctx      The PKCS #11 context.
+ *
+ * \return         The length of the private key.
+ */
+MBEDTLS_DEPRECATED static inline size_t mbedtls_ssl_pkcs11_key_len( void *ctx )
 {
     return ( (mbedtls_pkcs11_context *) ctx )->len;
 }
 
+#undef MBEDTLS_DEPRECATED
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h
index 9cbcb173055..d9e85b1d126 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,47 +18,30 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PKCS12_H
 #define MBEDTLS_PKCS12_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
-#include "cipher.h"
-#include "asn1.h"
+#include "mbedtls/md.h"
+#include "mbedtls/cipher.h"
+#include "mbedtls/asn1.h"
 
 #include <stddef.h>
 
-#define MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA                 -0x1F80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE            -0x1F00  /**< Feature not available, e.g. unsupported encryption scheme. */
-#define MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT             -0x1E80  /**< PBE ASN.1 data not as expected. */
-#define MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH              -0x1E00  /**< Given private key password does not allow for correct decryption. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA                 -0x1F80
+/** Feature not available, e.g. unsupported encryption scheme. */
+#define MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE            -0x1F00
+/** PBE ASN.1 data not as expected. */
+#define MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT             -0x1E80
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH              -0x1E00
 
 #define MBEDTLS_PKCS12_DERIVE_KEY       1   /**< encryption/decryption key */
 #define MBEDTLS_PKCS12_DERIVE_IV        2   /**< initialization vector     */
@@ -102,11 +79,13 @@ int mbedtls_pkcs12_pbe_sha1_rc4_128( mbedtls_asn1_buf *pbe_params, int mode,
  * \brief            PKCS12 Password Based function (encryption / decryption)
  *                   for cipher-based and mbedtls_md-based PBE's
  *
- * \param pbe_params an ASN1 buffer containing the pkcs-12PbeParams structure
- * \param mode       either MBEDTLS_PKCS12_PBE_ENCRYPT or MBEDTLS_PKCS12_PBE_DECRYPT
+ * \param pbe_params an ASN1 buffer containing the pkcs-12 PbeParams structure
+ * \param mode       either #MBEDTLS_PKCS12_PBE_ENCRYPT or
+ *                   #MBEDTLS_PKCS12_PBE_DECRYPT
  * \param cipher_type the cipher used
- * \param md_type     the mbedtls_md used
- * \param pwd        the password used (may be NULL if no password is used)
+ * \param md_type    the mbedtls_md used
+ * \param pwd        Latin1-encoded password used. This may only be \c NULL when
+ *                   \p pwdlen is 0. No null terminator should be used.
  * \param pwdlen     length of the password (may be 0)
  * \param input      the input data
  * \param len        data length
@@ -127,18 +106,24 @@ int mbedtls_pkcs12_pbe( mbedtls_asn1_buf *pbe_params, int mode,
  *                   to produce pseudo-random bits for a particular "purpose".
  *
  *                   Depending on the given id, this function can produce an
- *                   encryption/decryption key, an nitialization vector or an
+ *                   encryption/decryption key, an initialization vector or an
  *                   integrity key.
  *
  * \param data       buffer to store the derived data in
- * \param datalen    length to fill
- * \param pwd        password to use (may be NULL if no password is used)
- * \param pwdlen     length of the password (may be 0)
- * \param salt       salt buffer to use
- * \param saltlen    length of the salt
- * \param mbedtls_md         mbedtls_md type to use during the derivation
- * \param id         id that describes the purpose (can be MBEDTLS_PKCS12_DERIVE_KEY,
- *                   MBEDTLS_PKCS12_DERIVE_IV or MBEDTLS_PKCS12_DERIVE_MAC_KEY)
+ * \param datalen    length of buffer to fill
+ * \param pwd        The password to use. For compliance with PKCS#12 §B.1, this
+ *                   should be a BMPString, i.e. a Unicode string where each
+ *                   character is encoded as 2 bytes in big-endian order, with
+ *                   no byte order mark and with a null terminator (i.e. the
+ *                   last two bytes should be 0x00 0x00).
+ * \param pwdlen     length of the password (may be 0).
+ * \param salt       Salt buffer to use This may only be \c NULL when
+ *                   \p saltlen is 0.
+ * \param saltlen    length of the salt (may be zero)
+ * \param mbedtls_md mbedtls_md type to use during the derivation
+ * \param id         id that describes the purpose (can be
+ *                   #MBEDTLS_PKCS12_DERIVE_KEY, #MBEDTLS_PKCS12_DERIVE_IV or
+ *                   #MBEDTLS_PKCS12_DERIVE_MAC_KEY)
  * \param iterations number of iterations
  *
  * \return          0 if successful, or a MD, BIGNUM type error.
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h
index 328633c492d..696930f745f 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,47 +20,30 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PKCS5_H
 #define MBEDTLS_PKCS5_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
-#include "md.h"
+#include "mbedtls/asn1.h"
+#include "mbedtls/md.h"
 
 #include <stddef.h>
 #include <stdint.h>
 
-#define MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA                  -0x2f80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_PKCS5_INVALID_FORMAT                  -0x2f00  /**< Unexpected ASN.1 data. */
-#define MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE             -0x2e80  /**< Requested encryption or digest alg not available. */
-#define MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH               -0x2e00  /**< Given private key password does not allow for correct decryption. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA                  -0x2f80
+/** Unexpected ASN.1 data. */
+#define MBEDTLS_ERR_PKCS5_INVALID_FORMAT                  -0x2f00
+/** Requested encryption or digest alg not available. */
+#define MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE             -0x2e80
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH               -0x2e00
 
 #define MBEDTLS_PKCS5_DECRYPT      0
 #define MBEDTLS_PKCS5_ENCRYPT      1
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform.h
index 689cfc6ec79..bdef07498d7 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform.h
@@ -14,13 +14,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,43 +27,24 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PLATFORM_H
 #define MBEDTLS_PLATFORM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #if defined(MBEDTLS_HAVE_TIME)
-#include "platform_time.h"
+#include "mbedtls/platform_time.h"
 #endif
 
-#define MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED     -0x0070 /**< Hardware accelerator failed */
-#define MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED -0x0072 /**< The requested feature is not supported by the platform */
+/** Hardware accelerator failed */
+#define MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED     -0x0070
+/** The requested feature is not supported by the platform */
+#define MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED -0x0072
 
 #ifdef __cplusplus
 extern "C" {
@@ -83,17 +58,33 @@ extern "C" {
  * \{
  */
 
+/* The older Microsoft Windows common runtime provides non-conforming
+ * implementations of some standard library functions, including snprintf
+ * and vsnprintf. This affects MSVC and MinGW builds.
+ */
+#if defined(__MINGW32__) || (defined(_MSC_VER) && _MSC_VER <= 1900)
+#define MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF
+#define MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF
+#endif
+
 #if !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS)
 #include <stdio.h>
 #include <stdlib.h>
 #include <time.h>
 #if !defined(MBEDTLS_PLATFORM_STD_SNPRINTF)
-#if defined(_WIN32)
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF)
 #define MBEDTLS_PLATFORM_STD_SNPRINTF   mbedtls_platform_win32_snprintf /**< The default \c snprintf function to use.  */
 #else
 #define MBEDTLS_PLATFORM_STD_SNPRINTF   snprintf /**< The default \c snprintf function to use.  */
 #endif
 #endif
+#if !defined(MBEDTLS_PLATFORM_STD_VSNPRINTF)
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF)
+#define MBEDTLS_PLATFORM_STD_VSNPRINTF   mbedtls_platform_win32_vsnprintf /**< The default \c vsnprintf function to use.  */
+#else
+#define MBEDTLS_PLATFORM_STD_VSNPRINTF   vsnprintf /**< The default \c vsnprintf function to use.  */
+#endif
+#endif
 #if !defined(MBEDTLS_PLATFORM_STD_PRINTF)
 #define MBEDTLS_PLATFORM_STD_PRINTF   printf /**< The default \c printf function to use. */
 #endif
@@ -229,7 +220,7 @@ int mbedtls_platform_set_printf( int (*printf_func)( const char *, ... ) );
  * - however it is acceptable to return -1 instead of the required length when
  *   the destination buffer is too short.
  */
-#if defined(_WIN32)
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF)
 /* For Windows (inc. MSYS2), we provide our own fixed implementation */
 int mbedtls_platform_win32_snprintf( char *s, size_t n, const char *fmt, ... );
 #endif
@@ -255,6 +246,42 @@ int mbedtls_platform_set_snprintf( int (*snprintf_func)( char * s, size_t n,
 #endif /* MBEDTLS_PLATFORM_SNPRINTF_MACRO */
 #endif /* MBEDTLS_PLATFORM_SNPRINTF_ALT */
 
+/*
+ * The function pointers for vsnprintf
+ *
+ * The vsnprintf implementation should conform to C99:
+ * - it *must* always correctly zero-terminate the buffer
+ *   (except when n == 0, then it must leave the buffer untouched)
+ * - however it is acceptable to return -1 instead of the required length when
+ *   the destination buffer is too short.
+ */
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF)
+#include <stdarg.h>
+/* For Older Windows (inc. MSYS2), we provide our own fixed implementation */
+int mbedtls_platform_win32_vsnprintf( char *s, size_t n, const char *fmt, va_list arg );
+#endif
+
+#if defined(MBEDTLS_PLATFORM_VSNPRINTF_ALT)
+#include <stdarg.h>
+extern int (*mbedtls_vsnprintf)( char * s, size_t n, const char * format, va_list arg );
+
+/**
+ * \brief   Set your own snprintf function pointer
+ *
+ * \param   vsnprintf_func   The \c vsnprintf function implementation
+ *
+ * \return  \c 0
+ */
+int mbedtls_platform_set_vsnprintf( int (*vsnprintf_func)( char * s, size_t n,
+                                                 const char * format, va_list arg ) );
+#else /* MBEDTLS_PLATFORM_VSNPRINTF_ALT */
+#if defined(MBEDTLS_PLATFORM_VSNPRINTF_MACRO)
+#define mbedtls_vsnprintf   MBEDTLS_PLATFORM_VSNPRINTF_MACRO
+#else
+#define mbedtls_vsnprintf   vsnprintf
+#endif /* MBEDTLS_PLATFORM_VSNPRINTF_MACRO */
+#endif /* MBEDTLS_PLATFORM_VSNPRINTF_ALT */
+
 /*
  * The function pointers for exit
  */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform_time.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform_time.h
index e132f6a688c..7e7daab6920 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform_time.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform_time.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PLATFORM_TIME_H
 #define MBEDTLS_PLATFORM_TIME_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform_util.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform_util.h
index 426afaf0401..f982db8c01c 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform_util.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/platform_util.h
@@ -6,13 +6,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -25,40 +19,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PLATFORM_UTIL_H
 #define MBEDTLS_PLATFORM_UTIL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
 #if defined(MBEDTLS_HAVE_TIME_DATE)
-#include "platform_time.h"
+#include "mbedtls/platform_time.h"
 #include <time.h>
 #endif /* MBEDTLS_HAVE_TIME_DATE */
 
@@ -159,6 +132,95 @@ MBEDTLS_DEPRECATED typedef int mbedtls_deprecated_numeric_constant_t;
 #endif /* MBEDTLS_DEPRECATED_WARNING */
 #endif /* MBEDTLS_DEPRECATED_REMOVED */
 
+/* Implementation of the check-return facility.
+ * See the user documentation in config.h.
+ *
+ * Do not use this macro directly to annotate function: instead,
+ * use one of MBEDTLS_CHECK_RETURN_CRITICAL or MBEDTLS_CHECK_RETURN_TYPICAL
+ * depending on how important it is to check the return value.
+ */
+#if !defined(MBEDTLS_CHECK_RETURN)
+#if defined(__GNUC__)
+#define MBEDTLS_CHECK_RETURN __attribute__((__warn_unused_result__))
+#elif defined(_MSC_VER) && _MSC_VER >= 1700
+#include <sal.h>
+#define MBEDTLS_CHECK_RETURN _Check_return_
+#else
+#define MBEDTLS_CHECK_RETURN
+#endif
+#endif
+
+/** Critical-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that its return value should be checked in all applications.
+ * Omitting the check is very likely to indicate a bug in the application
+ * and will result in a compile-time warning if #MBEDTLS_CHECK_RETURN
+ * is implemented for the compiler in use.
+ *
+ * \note  The use of this macro is a work in progress.
+ *        This macro may be added to more functions in the future.
+ *        Such an extension is not considered an API break, provided that
+ *        there are near-unavoidable circumstances under which the function
+ *        can fail. For example, signature/MAC/AEAD verification functions,
+ *        and functions that require a random generator, are considered
+ *        return-check-critical.
+ */
+#define MBEDTLS_CHECK_RETURN_CRITICAL MBEDTLS_CHECK_RETURN
+
+/** Ordinary-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that its return value should be generally be checked in portable
+ * applications. Omitting the check will result in a compile-time warning if
+ * #MBEDTLS_CHECK_RETURN is implemented for the compiler in use and
+ * #MBEDTLS_CHECK_RETURN_WARNING is enabled in the compile-time configuration.
+ *
+ * You can use #MBEDTLS_IGNORE_RETURN to explicitly ignore the return value
+ * of a function that is annotated with #MBEDTLS_CHECK_RETURN.
+ *
+ * \note  The use of this macro is a work in progress.
+ *        This macro will be added to more functions in the future.
+ *        Eventually this should appear before most functions returning
+ *        an error code (as \c int in the \c mbedtls_xxx API or
+ *        as ::psa_status_t in the \c psa_xxx API).
+ */
+#if defined(MBEDTLS_CHECK_RETURN_WARNING)
+#define MBEDTLS_CHECK_RETURN_TYPICAL MBEDTLS_CHECK_RETURN
+#else
+#define MBEDTLS_CHECK_RETURN_TYPICAL
+#endif
+
+/** Benign-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that it is rarely useful to check its return value.
+ *
+ * This macro has an empty expansion. It exists for documentation purposes:
+ * a #MBEDTLS_CHECK_RETURN_OPTIONAL annotation indicates that the function
+ * has been analyzed for return-check usefuless, whereas the lack of
+ * an annotation indicates that the function has not been analyzed and its
+ * return-check usefulness is unknown.
+ */
+#define MBEDTLS_CHECK_RETURN_OPTIONAL
+
+/** \def MBEDTLS_IGNORE_RETURN
+ *
+ * Call this macro with one argument, a function call, to suppress a warning
+ * from #MBEDTLS_CHECK_RETURN due to that function call.
+ */
+#if !defined(MBEDTLS_IGNORE_RETURN)
+/* GCC doesn't silence the warning with just (void)(result).
+ * (void)!(result) is known to work up at least up to GCC 10, as well
+ * as with Clang and MSVC.
+ *
+ * https://gcc.gnu.org/onlinedocs/gcc-3.4.6/gcc/Non_002dbugs.html
+ * https://stackoverflow.com/questions/40576003/ignoring-warning-wunused-result
+ * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66425#c34
+ */
+#define MBEDTLS_IGNORE_RETURN(result) ( (void) !( result ) )
+#endif
+
 /**
  * \brief       Securely zeroize a buffer
  *
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/poly1305.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/poly1305.h
index b337aa841ca..a69ede98b5e 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/poly1305.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/poly1305.h
@@ -14,13 +14,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,34 +27,13 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_POLY1305_H
 #define MBEDTLS_POLY1305_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -68,15 +41,18 @@
 #include <stdint.h>
 #include <stddef.h>
 
-#define MBEDTLS_ERR_POLY1305_BAD_INPUT_DATA         -0x0057 /**< Invalid input parameter(s). */
+/** Invalid input parameter(s). */
+#define MBEDTLS_ERR_POLY1305_BAD_INPUT_DATA         -0x0057
 
 /* MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE is deprecated and should not be
  * used. */
-#define MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE    -0x0059 /**< Feature not available. For example, s part of the API is not implemented. */
+/** Feature not available. For example, s part of the API is not implemented. */
+#define MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE    -0x0059
 
 /* MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED        -0x005B  /**< Poly1305 hardware accelerator failed. */
+/** Poly1305 hardware accelerator failed. */
+#define MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED        -0x005B
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/psa_util.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/psa_util.h
new file mode 100644
index 00000000000..af7a809e40b
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/psa_util.h
@@ -0,0 +1,512 @@
+/**
+ * \file psa_util.h
+ *
+ * \brief Utility functions for the use of the PSA Crypto library.
+ *
+ * \warning This function is not part of the public API and may
+ *          change at any time.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_PSA_UTIL_H
+#define MBEDTLS_PSA_UTIL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+
+#include "psa/crypto.h"
+
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
+#include "mbedtls/pk.h"
+#include "mbedtls/oid.h"
+
+#include <string.h>
+
+/* Translations for symmetric crypto. */
+
+static inline psa_key_type_t mbedtls_psa_translate_cipher_type(
+    mbedtls_cipher_type_t cipher )
+{
+    switch( cipher )
+    {
+        case MBEDTLS_CIPHER_AES_128_CCM:
+        case MBEDTLS_CIPHER_AES_192_CCM:
+        case MBEDTLS_CIPHER_AES_256_CCM:
+        case MBEDTLS_CIPHER_AES_128_GCM:
+        case MBEDTLS_CIPHER_AES_192_GCM:
+        case MBEDTLS_CIPHER_AES_256_GCM:
+        case MBEDTLS_CIPHER_AES_128_CBC:
+        case MBEDTLS_CIPHER_AES_192_CBC:
+        case MBEDTLS_CIPHER_AES_256_CBC:
+        case MBEDTLS_CIPHER_AES_128_ECB:
+        case MBEDTLS_CIPHER_AES_192_ECB:
+        case MBEDTLS_CIPHER_AES_256_ECB:
+            return( PSA_KEY_TYPE_AES );
+
+        /* ARIA not yet supported in PSA. */
+        /* case MBEDTLS_CIPHER_ARIA_128_CCM:
+           case MBEDTLS_CIPHER_ARIA_192_CCM:
+           case MBEDTLS_CIPHER_ARIA_256_CCM:
+           case MBEDTLS_CIPHER_ARIA_128_GCM:
+           case MBEDTLS_CIPHER_ARIA_192_GCM:
+           case MBEDTLS_CIPHER_ARIA_256_GCM:
+           case MBEDTLS_CIPHER_ARIA_128_CBC:
+           case MBEDTLS_CIPHER_ARIA_192_CBC:
+           case MBEDTLS_CIPHER_ARIA_256_CBC:
+               return( PSA_KEY_TYPE_ARIA ); */
+
+        default:
+            return( 0 );
+    }
+}
+
+static inline psa_algorithm_t mbedtls_psa_translate_cipher_mode(
+    mbedtls_cipher_mode_t mode, size_t taglen )
+{
+    switch( mode )
+    {
+        case MBEDTLS_MODE_ECB:
+            return( PSA_ALG_ECB_NO_PADDING );
+        case MBEDTLS_MODE_GCM:
+            return( PSA_ALG_AEAD_WITH_SHORTENED_TAG( PSA_ALG_GCM, taglen ) );
+        case MBEDTLS_MODE_CCM:
+            return( PSA_ALG_AEAD_WITH_SHORTENED_TAG( PSA_ALG_CCM, taglen ) );
+        case MBEDTLS_MODE_CBC:
+            if( taglen == 0 )
+                return( PSA_ALG_CBC_NO_PADDING );
+            else
+                return( 0 );
+        default:
+            return( 0 );
+    }
+}
+
+static inline psa_key_usage_t mbedtls_psa_translate_cipher_operation(
+    mbedtls_operation_t op )
+{
+    switch( op )
+    {
+        case MBEDTLS_ENCRYPT:
+            return( PSA_KEY_USAGE_ENCRYPT );
+        case MBEDTLS_DECRYPT:
+            return( PSA_KEY_USAGE_DECRYPT );
+        default:
+            return( 0 );
+    }
+}
+
+/* Translations for hashing. */
+
+static inline psa_algorithm_t mbedtls_psa_translate_md( mbedtls_md_type_t md_alg )
+{
+    switch( md_alg )
+    {
+#if defined(MBEDTLS_MD2_C)
+    case MBEDTLS_MD_MD2:
+        return( PSA_ALG_MD2 );
+#endif
+#if defined(MBEDTLS_MD4_C)
+    case MBEDTLS_MD_MD4:
+        return( PSA_ALG_MD4 );
+#endif
+#if defined(MBEDTLS_MD5_C)
+    case MBEDTLS_MD_MD5:
+        return( PSA_ALG_MD5 );
+#endif
+#if defined(MBEDTLS_SHA1_C)
+    case MBEDTLS_MD_SHA1:
+        return( PSA_ALG_SHA_1 );
+#endif
+#if defined(MBEDTLS_SHA256_C)
+    case MBEDTLS_MD_SHA224:
+        return( PSA_ALG_SHA_224 );
+    case MBEDTLS_MD_SHA256:
+        return( PSA_ALG_SHA_256 );
+#endif
+#if defined(MBEDTLS_SHA512_C)
+    case MBEDTLS_MD_SHA384:
+        return( PSA_ALG_SHA_384 );
+    case MBEDTLS_MD_SHA512:
+        return( PSA_ALG_SHA_512 );
+#endif
+#if defined(MBEDTLS_RIPEMD160_C)
+    case MBEDTLS_MD_RIPEMD160:
+        return( PSA_ALG_RIPEMD160 );
+#endif
+    case MBEDTLS_MD_NONE:
+        return( 0 );
+    default:
+        return( 0 );
+    }
+}
+
+/* Translations for ECC. */
+
+static inline int mbedtls_psa_get_ecc_oid_from_id(
+    psa_ecc_family_t curve, size_t bits,
+    char const **oid, size_t *oid_len )
+{
+    switch( curve )
+    {
+        case PSA_ECC_FAMILY_SECP_R1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+                case 192:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP192R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP192R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+                case 224:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP224R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP224R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP256R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP256R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+                case 384:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP384R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP384R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+                case 521:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP521R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP521R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */
+            }
+            break;
+        case PSA_ECC_FAMILY_SECP_K1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+                case 192:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP192K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP192K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+                case 224:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP224K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP224K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP256K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP256K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */
+            }
+            break;
+        case PSA_ECC_FAMILY_BRAINPOOL_P_R1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_BP256R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP256R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+                case 384:
+                    *oid = MBEDTLS_OID_EC_GRP_BP384R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP384R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+                case 512:
+                    *oid = MBEDTLS_OID_EC_GRP_BP512R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP512R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */
+            }
+            break;
+    }
+    (void) oid;
+    (void) oid_len;
+    return( -1 );
+}
+
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH 1
+
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 521 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 521 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 512 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 512 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */
+
+
+/* Translations for PK layer */
+
+static inline int mbedtls_psa_err_translate_pk( psa_status_t status )
+{
+    switch( status )
+    {
+        case PSA_SUCCESS:
+            return( 0 );
+        case PSA_ERROR_NOT_SUPPORTED:
+            return( MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE );
+        case PSA_ERROR_INSUFFICIENT_MEMORY:
+            return( MBEDTLS_ERR_PK_ALLOC_FAILED );
+        case PSA_ERROR_INSUFFICIENT_ENTROPY:
+            return( MBEDTLS_ERR_ECP_RANDOM_FAILED );
+        case PSA_ERROR_BAD_STATE:
+            return( MBEDTLS_ERR_PK_BAD_INPUT_DATA );
+        /* All other failures */
+        case PSA_ERROR_COMMUNICATION_FAILURE:
+        case PSA_ERROR_HARDWARE_FAILURE:
+        case PSA_ERROR_CORRUPTION_DETECTED:
+            return( MBEDTLS_ERR_PK_HW_ACCEL_FAILED );
+        default: /* We return the same as for the 'other failures',
+                  * but list them separately nonetheless to indicate
+                  * which failure conditions we have considered. */
+            return( MBEDTLS_ERR_PK_HW_ACCEL_FAILED );
+    }
+}
+
+/* Translations for ECC */
+
+/* This function transforms an ECC group identifier from
+ * https://www.iana.org/assignments/tls-parameters/tls-parameters.xhtml#tls-parameters-8
+ * into a PSA ECC group identifier. */
+#if defined(MBEDTLS_ECP_C)
+static inline psa_key_type_t mbedtls_psa_parse_tls_ecc_group(
+    uint16_t tls_ecc_grp_reg_id, size_t *bits )
+{
+    const mbedtls_ecp_curve_info *curve_info =
+        mbedtls_ecp_curve_info_from_tls_id( tls_ecc_grp_reg_id );
+    if( curve_info == NULL )
+        return( 0 );
+    return( PSA_KEY_TYPE_ECC_KEY_PAIR(
+                mbedtls_ecc_group_to_psa( curve_info->grp_id, bits ) ) );
+}
+#endif /* MBEDTLS_ECP_C */
+
+/* This function takes a buffer holding an EC public key
+ * exported through psa_export_public_key(), and converts
+ * it into an ECPoint structure to be put into a ClientKeyExchange
+ * message in an ECDHE exchange.
+ *
+ * Both the present and the foreseeable future format of EC public keys
+ * used by PSA have the ECPoint structure contained in the exported key
+ * as a subbuffer, and the function merely selects this subbuffer instead
+ * of making a copy.
+ */
+static inline int mbedtls_psa_tls_psa_ec_to_ecpoint( unsigned char *src,
+                                                     size_t srclen,
+                                                     unsigned char **dst,
+                                                     size_t *dstlen )
+{
+    *dst = src;
+    *dstlen = srclen;
+    return( 0 );
+}
+
+/* This function takes a buffer holding an ECPoint structure
+ * (as contained in a TLS ServerKeyExchange message for ECDHE
+ * exchanges) and converts it into a format that the PSA key
+ * agreement API understands.
+ */
+static inline int mbedtls_psa_tls_ecpoint_to_psa_ec( unsigned char const *src,
+                                                     size_t srclen,
+                                                     unsigned char *dst,
+                                                     size_t dstlen,
+                                                     size_t *olen )
+{
+    if( srclen > dstlen )
+        return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL );
+
+    memcpy( dst, src, srclen );
+    *olen = srclen;
+    return( 0 );
+}
+
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+/* Expose whatever RNG the PSA subsystem uses to applications using the
+ * mbedtls_xxx API. The declarations and definitions here need to be
+ * consistent with the implementation in library/psa_crypto_random_impl.h.
+ * See that file for implementation documentation. */
+#if defined(MBEDTLS_PSA_CRYPTO_C)
+
+/* The type of a `f_rng` random generator function that many library functions
+ * take.
+ *
+ * This type name is not part of the Mbed TLS stable API. It may be renamed
+ * or moved without warning.
+ */
+typedef int mbedtls_f_rng_t( void *p_rng, unsigned char *output, size_t output_size );
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+
+/** The random generator function for the PSA subsystem.
+ *
+ * This function is suitable as the `f_rng` random generator function
+ * parameter of many `mbedtls_xxx` functions. Use #MBEDTLS_PSA_RANDOM_STATE
+ * to obtain the \p p_rng parameter.
+ *
+ * The implementation of this function depends on the configuration of the
+ * library.
+ *
+ * \note Depending on the configuration, this may be a function or
+ *       a pointer to a function.
+ *
+ * \note This function may only be used if the PSA crypto subsystem is active.
+ *       This means that you must call psa_crypto_init() before any call to
+ *       this function, and you must not call this function after calling
+ *       mbedtls_psa_crypto_free().
+ *
+ * \param p_rng         The random generator context. This must be
+ *                      #MBEDTLS_PSA_RANDOM_STATE. No other state is
+ *                      supported.
+ * \param output        The buffer to fill. It must have room for
+ *                      \c output_size bytes.
+ * \param output_size   The number of bytes to write to \p output.
+ *                      This function may fail if \p output_size is too
+ *                      large. It is guaranteed to accept any output size
+ *                      requested by Mbed TLS library functions. The
+ *                      maximum request size depends on the library
+ *                      configuration.
+ *
+ * \return              \c 0 on success.
+ * \return              An `MBEDTLS_ERR_ENTROPY_xxx`,
+ *                      `MBEDTLS_ERR_PLATFORM_xxx,
+ *                      `MBEDTLS_ERR_CTR_DRBG_xxx` or
+ *                      `MBEDTLS_ERR_HMAC_DRBG_xxx` on error.
+ */
+int mbedtls_psa_get_random( void *p_rng,
+                            unsigned char *output,
+                            size_t output_size );
+
+/** The random generator state for the PSA subsystem.
+ *
+ * This macro expands to an expression which is suitable as the `p_rng`
+ * random generator state parameter of many `mbedtls_xxx` functions.
+ * It must be used in combination with the random generator function
+ * mbedtls_psa_get_random().
+ *
+ * The implementation of this macro depends on the configuration of the
+ * library. Do not make any assumption on its nature.
+ */
+#define MBEDTLS_PSA_RANDOM_STATE NULL
+
+#else /* !defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) */
+
+#if defined(MBEDTLS_CTR_DRBG_C)
+#include "mbedtls/ctr_drbg.h"
+typedef mbedtls_ctr_drbg_context mbedtls_psa_drbg_context_t;
+static mbedtls_f_rng_t *const mbedtls_psa_get_random = mbedtls_ctr_drbg_random;
+#elif defined(MBEDTLS_HMAC_DRBG_C)
+#include "mbedtls/hmac_drbg.h"
+typedef mbedtls_hmac_drbg_context mbedtls_psa_drbg_context_t;
+static mbedtls_f_rng_t *const mbedtls_psa_get_random = mbedtls_hmac_drbg_random;
+#endif
+extern mbedtls_psa_drbg_context_t *const mbedtls_psa_random_state;
+
+#define MBEDTLS_PSA_RANDOM_STATE mbedtls_psa_random_state
+
+#endif /* !defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) */
+
+#endif /* MBEDTLS_PSA_CRYPTO_C */
+
+#endif /* MBEDTLS_PSA_UTIL_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h
index 31c6637d6dc..63270d12394 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_RIPEMD160_H
 #define MBEDTLS_RIPEMD160_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -60,7 +33,8 @@
 
 /* MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED             -0x0031  /**< RIPEMD160 hardware accelerator failed */
+/** RIPEMD160 hardware accelerator failed */
+#define MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED             -0x0031
 
 #ifdef __cplusplus
 extern "C" {
@@ -82,7 +56,7 @@ typedef struct mbedtls_ripemd160_context
 mbedtls_ripemd160_context;
 
 #else  /* MBEDTLS_RIPEMD160_ALT */
-#include "ripemd160.h"
+#include "ripemd160_alt.h"
 #endif /* MBEDTLS_RIPEMD160_ALT */
 
 /**
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa.h
index b2f65334fe7..3c481e12a17 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa.h
@@ -11,13 +11,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -30,63 +24,53 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_RSA_H
 #define MBEDTLS_RSA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
-#include "md.h"
+#include "mbedtls/bignum.h"
+#include "mbedtls/md.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /*
  * RSA Error codes
  */
-#define MBEDTLS_ERR_RSA_BAD_INPUT_DATA                    -0x4080  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_RSA_INVALID_PADDING                   -0x4100  /**< Input data contains invalid padding and is rejected. */
-#define MBEDTLS_ERR_RSA_KEY_GEN_FAILED                    -0x4180  /**< Something failed during generation of a key. */
-#define MBEDTLS_ERR_RSA_KEY_CHECK_FAILED                  -0x4200  /**< Key failed to pass the validity check of the library. */
-#define MBEDTLS_ERR_RSA_PUBLIC_FAILED                     -0x4280  /**< The public key operation failed. */
-#define MBEDTLS_ERR_RSA_PRIVATE_FAILED                    -0x4300  /**< The private key operation failed. */
-#define MBEDTLS_ERR_RSA_VERIFY_FAILED                     -0x4380  /**< The PKCS#1 verification failed. */
-#define MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE                  -0x4400  /**< The output buffer for decryption is not large enough. */
-#define MBEDTLS_ERR_RSA_RNG_FAILED                        -0x4480  /**< The random generator failed to generate non-zeros. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_RSA_BAD_INPUT_DATA                    -0x4080
+/** Input data contains invalid padding and is rejected. */
+#define MBEDTLS_ERR_RSA_INVALID_PADDING                   -0x4100
+/** Something failed during generation of a key. */
+#define MBEDTLS_ERR_RSA_KEY_GEN_FAILED                    -0x4180
+/** Key failed to pass the validity check of the library. */
+#define MBEDTLS_ERR_RSA_KEY_CHECK_FAILED                  -0x4200
+/** The public key operation failed. */
+#define MBEDTLS_ERR_RSA_PUBLIC_FAILED                     -0x4280
+/** The private key operation failed. */
+#define MBEDTLS_ERR_RSA_PRIVATE_FAILED                    -0x4300
+/** The PKCS#1 verification failed. */
+#define MBEDTLS_ERR_RSA_VERIFY_FAILED                     -0x4380
+/** The output buffer for decryption is not large enough. */
+#define MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE                  -0x4400
+/** The random generator failed to generate non-zeros. */
+#define MBEDTLS_ERR_RSA_RNG_FAILED                        -0x4480
 
 /* MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION             -0x4500  /**< The implementation does not offer the requested operation, for example, because of security violations or lack of functionality. */
+/** The implementation does not offer the requested operation, for example, because of security violations or lack of functionality. */
+#define MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION             -0x4500
 
 /* MBEDTLS_ERR_RSA_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_RSA_HW_ACCEL_FAILED                   -0x4580  /**< RSA hardware accelerator failed. */
+/** RSA hardware accelerator failed. */
+#define MBEDTLS_ERR_RSA_HW_ACCEL_FAILED                   -0x4580
 
 /*
  * RSA constants
@@ -630,7 +614,8 @@ int mbedtls_rsa_private( mbedtls_rsa_context *ctx,
  *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
  * \param ilen     The length of the plaintext in Bytes.
  * \param input    The input data to encrypt. This must be a readable
- *                 buffer of size \p ilen Bytes. This must not be \c NULL.
+ *                 buffer of size \p ilen Bytes. It may be \c NULL if
+ *                 `ilen == 0`.
  * \param output   The output buffer. This must be a writable buffer
  *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
  *                 for an 2048-bit RSA modulus.
@@ -670,7 +655,8 @@ int mbedtls_rsa_pkcs1_encrypt( mbedtls_rsa_context *ctx,
  *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
  * \param ilen     The length of the plaintext in Bytes.
  * \param input    The input data to encrypt. This must be a readable
- *                 buffer of size \p ilen Bytes. This must not be \c NULL.
+ *                 buffer of size \p ilen Bytes. It may be \c NULL if
+ *                 `ilen == 0`.
  * \param output   The output buffer. This must be a writable buffer
  *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
  *                 for an 2048-bit RSA modulus.
@@ -714,7 +700,8 @@ int mbedtls_rsa_rsaes_pkcs1_v15_encrypt( mbedtls_rsa_context *ctx,
  * \param label_len  The length of the label in Bytes.
  * \param ilen       The length of the plaintext buffer \p input in Bytes.
  * \param input      The input data to encrypt. This must be a readable
- *                   buffer of size \p ilen Bytes. This must not be \c NULL.
+ *                   buffer of size \p ilen Bytes. It may be \c NULL if
+ *                   `ilen == 0`.
  * \param output     The output buffer. This must be a writable buffer
  *                   of length \c ctx->len Bytes. For example, \c 256 Bytes
  *                   for an 2048-bit RSA modulus.
@@ -1000,12 +987,69 @@ int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx,
  * \brief          This function performs a PKCS#1 v2.1 PSS signature
  *                 operation (RSASSA-PSS-SIGN).
  *
- * \note           The \p hash_id in the RSA context is the one used for the
- *                 encoding. \p md_alg in the function call is the type of hash
- *                 that is encoded. According to <em>RFC-3447: Public-Key
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
+ *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
+ *                 Specifications</em>.
+ *
+ * \note           This function enforces that the provided salt length complies
+ *                 with FIPS 186-4 §5.5 (e) and RFC 8017 (PKCS#1 v2.2) §9.1.1
+ *                 step 3. The constraint is that the hash length plus the salt
+ *                 length plus 2 bytes must be at most the key length. If this
+ *                 constraint is not met, this function returns
+ *                 #MBEDTLS_ERR_RSA_BAD_INPUT_DATA.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG function. It must not be \c NULL.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be \c NULL
+ *                 if \p f_rng doesn't need a context argument.
+ * \param md_alg   The message-digest algorithm used to hash the original data.
+ *                 Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen  The length of the message digest.
+ *                 Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash     The buffer holding the message digest or raw data.
+ *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ *                 buffer of length \p hashlen Bytes. If \p md_alg is not
+ *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ *                 the size of the hash corresponding to \p md_alg.
+ * \param saltlen  The length of the salt that should be used.
+ *                 If passed #MBEDTLS_RSA_SALT_LEN_ANY, the function will use
+ *                 the largest possible salt length up to the hash length,
+ *                 which is the largest permitted by some standards including
+ *                 FIPS 186-4 §5.5.
+ * \param sig      The buffer to hold the signature. This must be a writable
+ *                 buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus. A buffer length of
+ *                 #MBEDTLS_MPI_MAX_SIZE is always safe.
+ *
+ * \return         \c 0 if the signing operation was successful.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pss_sign_ext( mbedtls_rsa_context *ctx,
+                         int (*f_rng)(void *, unsigned char *, size_t),
+                         void *p_rng,
+                         mbedtls_md_type_t md_alg,
+                         unsigned int hashlen,
+                         const unsigned char *hash,
+                         int saltlen,
+                         unsigned char *sig );
+
+/**
+ * \brief          This function performs a PKCS#1 v2.1 PSS signature
+ *                 operation (RSASSA-PSS-SIGN).
+ *
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
  *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
- *                 Specifications</em> it is advised to keep both hashes the
- *                 same.
+ *                 Specifications</em>.
  *
  * \note           This function always uses the maximum possible salt size,
  *                 up to the length of the payload hash. This choice of salt
@@ -1035,7 +1079,7 @@ int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx,
  * \param md_alg   The message-digest algorithm used to hash the original data.
  *                 Use #MBEDTLS_MD_NONE for signing raw data.
  * \param hashlen  The length of the message digest.
- *                 Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ *                 This is only used if \p md_alg is #MBEDTLS_MD_NONE.
  * \param hash     The buffer holding the message digest or raw data.
  *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
  *                 buffer of length \p hashlen Bytes. If \p md_alg is not
@@ -1161,16 +1205,15 @@ int mbedtls_rsa_rsassa_pkcs1_v15_verify( mbedtls_rsa_context *ctx,
  * \brief          This function performs a PKCS#1 v2.1 PSS verification
  *                 operation (RSASSA-PSS-VERIFY).
  *
- *                 The hash function for the MGF mask generating function
- *                 is that specified in the RSA context.
- *
- * \note           The \p hash_id in the RSA context is the one used for the
- *                 verification. \p md_alg in the function call is the type of
- *                 hash that is verified. According to <em>RFC-3447: Public-Key
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
  *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
- *                 Specifications</em> it is advised to keep both hashes the
- *                 same. If \p hash_id in the RSA context is unset,
- *                 the \p md_alg from the function call is used.
+ *                 Specifications</em>. If the \c hash_id set in \p ctx is
+ *                 #MBEDTLS_MD_NONE, the \p md_alg parameter is used.
  *
  * \deprecated     It is deprecated and discouraged to call this function
  *                 in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
@@ -1218,13 +1261,12 @@ int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx,
  * \brief          This function performs a PKCS#1 v2.1 PSS verification
  *                 operation (RSASSA-PSS-VERIFY).
  *
- *                 The hash function for the MGF mask generating function
- *                 is that specified in \p mgf1_hash_id.
- *
  * \note           The \p sig buffer must be as large as the size
  *                 of \p ctx->N. For example, 128 Bytes if RSA-1024 is used.
  *
- * \note           The \p hash_id in the RSA context is ignored.
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) is ignored.
  *
  * \param ctx      The initialized RSA public key context to use.
  * \param f_rng    The RNG function to use. If \p mode is #MBEDTLS_RSA_PRIVATE,
@@ -1243,7 +1285,13 @@ int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx,
  *                 buffer of length \p hashlen Bytes. If \p md_alg is not
  *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
  *                 the size of the hash corresponding to \p md_alg.
- * \param mgf1_hash_id      The message digest used for mask generation.
+ * \param mgf1_hash_id      The message digest algorithm used for the
+ *                          verification operation and the mask generation
+ *                          function (MGF1). For more details on the encoding
+ *                          operation and the mask generation function, consult
+ *                          <em>RFC-3447: Public-Key Cryptography Standards
+ *                          (PKCS) #1 v2.1: RSA Cryptography
+ *                          Specifications</em>.
  * \param expected_salt_len The length of the salt used in padding. Use
  *                          #MBEDTLS_RSA_SALT_LEN_ANY to accept any salt length.
  * \param sig      The buffer holding the signature. This must be a readable
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h
index 953cb7b81d7..d55492bb16b 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h
@@ -36,13 +36,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -56,39 +50,18 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 
 #ifndef MBEDTLS_RSA_INTERNAL_H
 #define MBEDTLS_RSA_INTERNAL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha1.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha1.h
index 60c514a49ec..4c3251b4a12 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha1.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha1.h
@@ -12,13 +12,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -31,33 +25,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SHA1_H
 #define MBEDTLS_SHA1_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -66,8 +39,10 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED                  -0x0035  /**< SHA-1 hardware accelerator failed */
-#define MBEDTLS_ERR_SHA1_BAD_INPUT_DATA                   -0x0073  /**< SHA-1 input data was malformed. */
+/** SHA-1 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED                  -0x0035
+/** SHA-1 input data was malformed. */
+#define MBEDTLS_ERR_SHA1_BAD_INPUT_DATA                   -0x0073
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha256.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha256.h
index b1881e183c4..5b54be21425 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha256.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha256.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,33 +21,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SHA256_H
 #define MBEDTLS_SHA256_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -62,8 +35,10 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED                -0x0037  /**< SHA-256 hardware accelerator failed */
-#define MBEDTLS_ERR_SHA256_BAD_INPUT_DATA                 -0x0074  /**< SHA-256 input data was malformed. */
+/** SHA-256 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED                -0x0037
+/** SHA-256 input data was malformed. */
+#define MBEDTLS_ERR_SHA256_BAD_INPUT_DATA                 -0x0074
 
 #ifdef __cplusplus
 extern "C" {
@@ -262,6 +237,9 @@ MBEDTLS_DEPRECATED void mbedtls_sha256_process( mbedtls_sha256_context *ctx,
  *                 be a writable buffer of length \c 32 Bytes.
  * \param is224    Determines which function to use. This must be
  *                 either \c 0 for SHA-256, or \c 1 for SHA-224.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
  */
 int mbedtls_sha256_ret( const unsigned char *input,
                         size_t ilen,
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha512.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha512.h
index 5e5a15e0008..cca47c2fe62 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha512.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/sha512.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,33 +20,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SHA512_H
 #define MBEDTLS_SHA512_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -61,8 +34,10 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED                -0x0039  /**< SHA-512 hardware accelerator failed */
-#define MBEDTLS_ERR_SHA512_BAD_INPUT_DATA                 -0x0075  /**< SHA-512 input data was malformed. */
+/** SHA-512 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED                -0x0039
+/** SHA-512 input data was malformed. */
+#define MBEDTLS_ERR_SHA512_BAD_INPUT_DATA                 -0x0075
 
 #ifdef __cplusplus
 extern "C" {
@@ -84,8 +59,10 @@ typedef struct mbedtls_sha512_context
     uint64_t total[2];          /*!< The number of Bytes processed. */
     uint64_t state[8];          /*!< The intermediate digest state. */
     unsigned char buffer[128];  /*!< The data block being processed. */
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
     int is384;                  /*!< Determines which function to use:
                                      0: Use SHA-512, or 1: Use SHA-384. */
+#endif
 }
 mbedtls_sha512_context;
 
@@ -126,7 +103,11 @@ void mbedtls_sha512_clone( mbedtls_sha512_context *dst,
  *
  * \param ctx      The SHA-512 context to use. This must be initialized.
  * \param is384    Determines which function to use. This must be
- *                 either \c for SHA-512, or \c 1 for SHA-384.
+ *                 either \c 0 for SHA-512, or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will return
+ *                 #MBEDTLS_ERR_SHA512_BAD_INPUT_DATA.
  *
  * \return         \c 0 on success.
  * \return         A negative error code on failure.
@@ -194,6 +175,9 @@ int mbedtls_internal_sha512_process( mbedtls_sha512_context *ctx,
  * \param ctx      The SHA-512 context to use. This must be initialized.
  * \param is384    Determines which function to use. This must be either
  *                 \c 0 for SHA-512 or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will fail to work.
  */
 MBEDTLS_DEPRECATED void mbedtls_sha512_starts( mbedtls_sha512_context *ctx,
                                                int is384 );
@@ -264,6 +248,10 @@ MBEDTLS_DEPRECATED void mbedtls_sha512_process(
  * \param is384    Determines which function to use. This must be either
  *                 \c 0 for SHA-512, or \c 1 for SHA-384.
  *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will return
+ *                 #MBEDTLS_ERR_SHA512_BAD_INPUT_DATA.
+ *
  * \return         \c 0 on success.
  * \return         A negative error code on failure.
  */
@@ -298,6 +286,9 @@ int mbedtls_sha512_ret( const unsigned char *input,
  *                 be a writable buffer of length \c 64 Bytes.
  * \param is384    Determines which function to use. This must be either
  *                 \c 0 for SHA-512, or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will fail to work.
  */
 MBEDTLS_DEPRECATED void mbedtls_sha512( const unsigned char *input,
                                         size_t ilen,
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl.h
index 0abeb430e49..209dbf6053c 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,53 +18,37 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_H
 #define MBEDTLS_SSL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
-#include "ecp.h"
+#include "mbedtls/bignum.h"
+#include "mbedtls/ecp.h"
 
-#include "ssl_ciphersuites.h"
+#include "mbedtls/ssl_ciphersuites.h"
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
-#include "x509_crt.h"
-#include "x509_crl.h"
+#include "mbedtls/x509_crt.h"
+#include "mbedtls/x509_crl.h"
 #endif
 
 #if defined(MBEDTLS_DHM_C)
-#include "dhm.h"
+#include "mbedtls/dhm.h"
 #endif
 
-#if defined(MBEDTLS_ECDH_C)
-#include "ecdh.h"
+/* Adding guard for MBEDTLS_ECDSA_C to ensure no compile errors due
+ * to guards also being in ssl_srv.c and ssl_cli.c. There is a gap
+ * in functionality that access to ecdh_ctx structure is needed for
+ * MBEDTLS_ECDSA_C which does not seem correct.
+ */
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C)
+#include "mbedtls/ecdh.h"
 #endif
 
 #if defined(MBEDTLS_ZLIB_SUPPORT)
@@ -87,68 +65,132 @@
 #endif
 
 #if defined(MBEDTLS_HAVE_TIME)
-#include "platform_time.h"
+#include "mbedtls/platform_time.h"
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 /*
  * SSL Error codes
  */
-#define MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE               -0x7080  /**< The requested feature is not available. */
-#define MBEDTLS_ERR_SSL_BAD_INPUT_DATA                    -0x7100  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_SSL_INVALID_MAC                       -0x7180  /**< Verification of the message MAC failed. */
-#define MBEDTLS_ERR_SSL_INVALID_RECORD                    -0x7200  /**< An invalid SSL record was received. */
-#define MBEDTLS_ERR_SSL_CONN_EOF                          -0x7280  /**< The connection indicated an EOF. */
-#define MBEDTLS_ERR_SSL_UNKNOWN_CIPHER                    -0x7300  /**< An unknown cipher was received. */
-#define MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN                  -0x7380  /**< The server has no ciphersuites in common with the client. */
-#define MBEDTLS_ERR_SSL_NO_RNG                            -0x7400  /**< No RNG was provided to the SSL module. */
-#define MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE             -0x7480  /**< No client certification received from the client, but required by the authentication mode. */
-#define MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE             -0x7500  /**< Our own certificate(s) is/are too large to send in an SSL message. */
-#define MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED              -0x7580  /**< The own certificate is not set, but needed by the server. */
-#define MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED              -0x7600  /**< The own private key or pre-shared key is not set, but needed. */
-#define MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED                 -0x7680  /**< No CA Chain is set, but required to operate. */
-#define MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE                -0x7700  /**< An unexpected message was received from our peer. */
-#define MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE               -0x7780  /**< A fatal alert message was received from our peer. */
-#define MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED                -0x7800  /**< Verification of our peer failed. */
-#define MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY                 -0x7880  /**< The peer notified us that the connection is going to be closed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO               -0x7900  /**< Processing of the ClientHello handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO               -0x7980  /**< Processing of the ServerHello handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE                -0x7A00  /**< Processing of the Certificate handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST        -0x7A80  /**< Processing of the CertificateRequest handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE        -0x7B00  /**< Processing of the ServerKeyExchange handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE          -0x7B80  /**< Processing of the ServerHelloDone handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE        -0x7C00  /**< Processing of the ClientKeyExchange handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP     -0x7C80  /**< Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Read Public. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS     -0x7D00  /**< Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Calculate Secret. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY         -0x7D80  /**< Processing of the CertificateVerify handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC         -0x7E00  /**< Processing of the ChangeCipherSpec handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_FINISHED                   -0x7E80  /**< Processing of the Finished handshake message failed. */
-#define MBEDTLS_ERR_SSL_ALLOC_FAILED                      -0x7F00  /**< Memory allocation failed */
-#define MBEDTLS_ERR_SSL_HW_ACCEL_FAILED                   -0x7F80  /**< Hardware acceleration function returned with error */
-#define MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH              -0x6F80  /**< Hardware acceleration function skipped / left alone data */
-#define MBEDTLS_ERR_SSL_COMPRESSION_FAILED                -0x6F00  /**< Processing of the compression / decompression failed */
-#define MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION           -0x6E80  /**< Handshake protocol not within min/max boundaries */
-#define MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET         -0x6E00  /**< Processing of the NewSessionTicket handshake message failed. */
-#define MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED            -0x6D80  /**< Session ticket has expired. */
-#define MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH                  -0x6D00  /**< Public key type mismatch (eg, asked for RSA key exchange and presented EC key) */
-#define MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY                  -0x6C80  /**< Unknown identity received (eg, PSK identity) */
-#define MBEDTLS_ERR_SSL_INTERNAL_ERROR                    -0x6C00  /**< Internal error (eg, unexpected failure in lower-level module) */
-#define MBEDTLS_ERR_SSL_COUNTER_WRAPPING                  -0x6B80  /**< A counter would wrap (eg, too many messages exchanged). */
-#define MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO       -0x6B00  /**< Unexpected message at ServerHello in renegotiation. */
-#define MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED             -0x6A80  /**< DTLS client must retry for hello verification */
-#define MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL                  -0x6A00  /**< A buffer is too small to receive or write a message */
-#define MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE             -0x6980  /**< None of the common ciphersuites is usable (eg, no suitable certificate, see debug messages). */
-#define MBEDTLS_ERR_SSL_WANT_READ                         -0x6900  /**< No data of requested type currently available on underlying transport. */
-#define MBEDTLS_ERR_SSL_WANT_WRITE                        -0x6880  /**< Connection requires a write call. */
-#define MBEDTLS_ERR_SSL_TIMEOUT                           -0x6800  /**< The operation timed out. */
-#define MBEDTLS_ERR_SSL_CLIENT_RECONNECT                  -0x6780  /**< The client initiated a reconnect from the same port. */
-#define MBEDTLS_ERR_SSL_UNEXPECTED_RECORD                 -0x6700  /**< Record header looks valid but is not expected. */
-#define MBEDTLS_ERR_SSL_NON_FATAL                         -0x6680  /**< The alert message received indicates a non-fatal error. */
-#define MBEDTLS_ERR_SSL_INVALID_VERIFY_HASH               -0x6600  /**< Couldn't set the hash for verifying CertificateVerify */
-#define MBEDTLS_ERR_SSL_CONTINUE_PROCESSING               -0x6580  /**< Internal-only message signaling that further message-processing should be done */
-#define MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS                 -0x6500  /**< The asynchronous operation is not completed yet. */
-#define MBEDTLS_ERR_SSL_EARLY_MESSAGE                     -0x6480  /**< Internal-only message signaling that a message arrived early. */
-#define MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS                -0x7000  /**< A cryptographic operation is in progress. Try again later. */
-#define MBEDTLS_ERR_SSL_BAD_CONFIG                        -0x5E80  /**< Invalid value in SSL config */
+/** The requested feature is not available. */
+#define MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE               -0x7080
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_SSL_BAD_INPUT_DATA                    -0x7100
+/** Verification of the message MAC failed. */
+#define MBEDTLS_ERR_SSL_INVALID_MAC                       -0x7180
+/** An invalid SSL record was received. */
+#define MBEDTLS_ERR_SSL_INVALID_RECORD                    -0x7200
+/** The connection indicated an EOF. */
+#define MBEDTLS_ERR_SSL_CONN_EOF                          -0x7280
+/** An unknown cipher was received. */
+#define MBEDTLS_ERR_SSL_UNKNOWN_CIPHER                    -0x7300
+/** The server has no ciphersuites in common with the client. */
+#define MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN                  -0x7380
+/** No RNG was provided to the SSL module. */
+#define MBEDTLS_ERR_SSL_NO_RNG                            -0x7400
+/** No client certification received from the client, but required by the authentication mode. */
+#define MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE             -0x7480
+/** Our own certificate(s) is/are too large to send in an SSL message. */
+#define MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE             -0x7500
+/** The own certificate is not set, but needed by the server. */
+#define MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED              -0x7580
+/** The own private key or pre-shared key is not set, but needed. */
+#define MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED              -0x7600
+/** No CA Chain is set, but required to operate. */
+#define MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED                 -0x7680
+/** An unexpected message was received from our peer. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE                -0x7700
+/** A fatal alert message was received from our peer. */
+#define MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE               -0x7780
+/** Verification of our peer failed. */
+#define MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED                -0x7800
+/** The peer notified us that the connection is going to be closed. */
+#define MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY                 -0x7880
+/** Processing of the ClientHello handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO               -0x7900
+/** Processing of the ServerHello handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO               -0x7980
+/** Processing of the Certificate handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE                -0x7A00
+/** Processing of the CertificateRequest handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST        -0x7A80
+/** Processing of the ServerKeyExchange handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE        -0x7B00
+/** Processing of the ServerHelloDone handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE          -0x7B80
+/** Processing of the ClientKeyExchange handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE        -0x7C00
+/** Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Read Public. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP     -0x7C80
+/** Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Calculate Secret. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS     -0x7D00
+/** Processing of the CertificateVerify handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY         -0x7D80
+/** Processing of the ChangeCipherSpec handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC         -0x7E00
+/** Processing of the Finished handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_FINISHED                   -0x7E80
+/** Memory allocation failed */
+#define MBEDTLS_ERR_SSL_ALLOC_FAILED                      -0x7F00
+/** Hardware acceleration function returned with error */
+#define MBEDTLS_ERR_SSL_HW_ACCEL_FAILED                   -0x7F80
+/** Hardware acceleration function skipped / left alone data */
+#define MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH              -0x6F80
+/** Processing of the compression / decompression failed */
+#define MBEDTLS_ERR_SSL_COMPRESSION_FAILED                -0x6F00
+/** Handshake protocol not within min/max boundaries */
+#define MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION           -0x6E80
+/** Processing of the NewSessionTicket handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET         -0x6E00
+/** Session ticket has expired. */
+#define MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED            -0x6D80
+/** Public key type mismatch (eg, asked for RSA key exchange and presented EC key) */
+#define MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH                  -0x6D00
+/** Unknown identity received (eg, PSK identity) */
+#define MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY                  -0x6C80
+/** Internal error (eg, unexpected failure in lower-level module) */
+#define MBEDTLS_ERR_SSL_INTERNAL_ERROR                    -0x6C00
+/** A counter would wrap (eg, too many messages exchanged). */
+#define MBEDTLS_ERR_SSL_COUNTER_WRAPPING                  -0x6B80
+/** Unexpected message at ServerHello in renegotiation. */
+#define MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO       -0x6B00
+/** DTLS client must retry for hello verification */
+#define MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED             -0x6A80
+/** A buffer is too small to receive or write a message */
+#define MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL                  -0x6A00
+/** None of the common ciphersuites is usable (eg, no suitable certificate, see debug messages). */
+#define MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE             -0x6980
+/** No data of requested type currently available on underlying transport. */
+#define MBEDTLS_ERR_SSL_WANT_READ                         -0x6900
+/** Connection requires a write call. */
+#define MBEDTLS_ERR_SSL_WANT_WRITE                        -0x6880
+/** The operation timed out. */
+#define MBEDTLS_ERR_SSL_TIMEOUT                           -0x6800
+/** The client initiated a reconnect from the same port. */
+#define MBEDTLS_ERR_SSL_CLIENT_RECONNECT                  -0x6780
+/** Record header looks valid but is not expected. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_RECORD                 -0x6700
+/** The alert message received indicates a non-fatal error. */
+#define MBEDTLS_ERR_SSL_NON_FATAL                         -0x6680
+/** Couldn't set the hash for verifying CertificateVerify */
+#define MBEDTLS_ERR_SSL_INVALID_VERIFY_HASH               -0x6600
+/** Internal-only message signaling that further message-processing should be done */
+#define MBEDTLS_ERR_SSL_CONTINUE_PROCESSING               -0x6580
+/** The asynchronous operation is not completed yet. */
+#define MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS                 -0x6500
+/** Internal-only message signaling that a message arrived early. */
+#define MBEDTLS_ERR_SSL_EARLY_MESSAGE                     -0x6480
+/** An encrypted DTLS-frame with an unexpected CID was received. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_CID                    -0x6000
+/** An operation failed due to an unexpected version or configuration. */
+#define MBEDTLS_ERR_SSL_VERSION_MISMATCH                  -0x5F00
+/** A cryptographic operation is in progress. Try again later. */
+#define MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS                -0x7000
+/** Invalid value in SSL config */
+#define MBEDTLS_ERR_SSL_BAD_CONFIG                        -0x5E80
 
 /*
  * Various constants
@@ -158,6 +200,7 @@
 #define MBEDTLS_SSL_MINOR_VERSION_1             1   /*!< TLS v1.0 */
 #define MBEDTLS_SSL_MINOR_VERSION_2             2   /*!< TLS v1.1 */
 #define MBEDTLS_SSL_MINOR_VERSION_3             3   /*!< TLS v1.2 */
+#define MBEDTLS_SSL_MINOR_VERSION_4             4   /*!< TLS v1.3 (experimental) */
 
 #define MBEDTLS_SSL_TRANSPORT_STREAM            0   /*!< TLS      */
 #define MBEDTLS_SSL_TRANSPORT_DATAGRAM          1   /*!< DTLS     */
@@ -185,6 +228,9 @@
 #define MBEDTLS_SSL_EXTENDED_MS_DISABLED        0
 #define MBEDTLS_SSL_EXTENDED_MS_ENABLED         1
 
+#define MBEDTLS_SSL_CID_DISABLED                0
+#define MBEDTLS_SSL_CID_ENABLED                 1
+
 #define MBEDTLS_SSL_ETM_DISABLED                0
 #define MBEDTLS_SSL_ETM_ENABLED                 1
 
@@ -231,6 +277,9 @@
 #define MBEDTLS_SSL_CERT_REQ_CA_LIST_ENABLED       1
 #define MBEDTLS_SSL_CERT_REQ_CA_LIST_DISABLED      0
 
+#define MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED    0
+#define MBEDTLS_SSL_DTLS_SRTP_MKI_SUPPORTED      1
+
 /*
  * Default range for DTLS retransmission timer value, in milliseconds.
  * RFC 6347 4.2.4.1 says from 1 second to 60 seconds.
@@ -281,6 +330,25 @@
 #define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
 #endif
 
+/*
+ * Maximum length of CIDs for incoming and outgoing messages.
+ */
+#if !defined(MBEDTLS_SSL_CID_IN_LEN_MAX)
+#define MBEDTLS_SSL_CID_IN_LEN_MAX          32
+#endif
+
+#if !defined(MBEDTLS_SSL_CID_OUT_LEN_MAX)
+#define MBEDTLS_SSL_CID_OUT_LEN_MAX         32
+#endif
+
+#if !defined(MBEDTLS_SSL_CID_PADDING_GRANULARITY)
+#define MBEDTLS_SSL_CID_PADDING_GRANULARITY 16
+#endif
+
+#if !defined(MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY)
+#define MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY 1
+#endif
+
 /* \} name SECTION: Module settings */
 
 /*
@@ -328,6 +396,7 @@
 #define MBEDTLS_SSL_MSG_ALERT                  21
 #define MBEDTLS_SSL_MSG_HANDSHAKE              22
 #define MBEDTLS_SSL_MSG_APPLICATION_DATA       23
+#define MBEDTLS_SSL_MSG_CID                    25
 
 #define MBEDTLS_SSL_ALERT_LEVEL_WARNING         1
 #define MBEDTLS_SSL_ALERT_LEVEL_FATAL           2
@@ -390,6 +459,8 @@
 
 #define MBEDTLS_TLS_EXT_SIG_ALG                     13
 
+#define MBEDTLS_TLS_EXT_USE_SRTP                    14
+
 #define MBEDTLS_TLS_EXT_ALPN                        16
 
 #define MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC            22 /* 0x16 */
@@ -397,6 +468,17 @@
 
 #define MBEDTLS_TLS_EXT_SESSION_TICKET              35
 
+/* The value of the CID extension is still TBD as of
+ * draft-ietf-tls-dtls-connection-id-05
+ * (https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05).
+ *
+ * A future minor revision of Mbed TLS may change the default value of
+ * this option to match evolving standards and usage.
+ */
+#if !defined(MBEDTLS_TLS_EXT_CID)
+#define MBEDTLS_TLS_EXT_CID                        254 /* TBD */
+#endif
+
 #define MBEDTLS_TLS_EXT_ECJPAKE_KKPP               256 /* experimental */
 
 #define MBEDTLS_TLS_EXT_RENEGOTIATION_INFO      0xFF01
@@ -475,6 +557,18 @@ typedef enum
 }
 mbedtls_ssl_states;
 
+/*
+ * The tls_prf function types.
+ */
+typedef enum
+{
+   MBEDTLS_SSL_TLS_PRF_NONE,
+   MBEDTLS_SSL_TLS_PRF_SSL3,
+   MBEDTLS_SSL_TLS_PRF_TLS1,
+   MBEDTLS_SSL_TLS_PRF_SHA384,
+   MBEDTLS_SSL_TLS_PRF_SHA256
+}
+mbedtls_tls_prf_types;
 /**
  * \brief          Callback type: send data on the network.
  *
@@ -506,10 +600,11 @@ typedef int mbedtls_ssl_send_t( void *ctx,
  * \param buf      Buffer to write the received data to
  * \param len      Length of the receive buffer
  *
- * \return         The callback must return the number of bytes received,
- *                 or a non-zero error code.
- *                 If performing non-blocking I/O, \c MBEDTLS_ERR_SSL_WANT_READ
+ * \returns        If data has been received, the positive number of bytes received.
+ * \returns        \c 0 if the connection has been closed.
+ * \returns        If performing non-blocking I/O, \c MBEDTLS_ERR_SSL_WANT_READ
  *                 must be returned when the operation would block.
+ * \returns        Another negative error code on other kinds of failures.
  *
  * \note           The callback may receive fewer bytes than the length of the
  *                 buffer. It must always return the number of bytes actually
@@ -812,11 +907,77 @@ typedef int mbedtls_ssl_async_resume_t( mbedtls_ssl_context *ssl,
 typedef void mbedtls_ssl_async_cancel_t( mbedtls_ssl_context *ssl );
 #endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
 
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_MAX_LEN  48
+#if defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA256
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  32
+#elif defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA384
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  48
+#elif defined(MBEDTLS_SHA1_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA1
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  20
+#else
+/* This is already checked in check_config.h, but be sure. */
+#error "Bad configuration - need SHA-1, SHA-256 or SHA-512 enabled to compute digest of peer CRT."
+#endif
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED &&
+          !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+
+#define MBEDTLS_TLS_SRTP_MAX_MKI_LENGTH             255
+#define MBEDTLS_TLS_SRTP_MAX_PROFILE_LIST_LENGTH    4
+/*
+ * For code readability use a typedef for DTLS-SRTP profiles
+ *
+ * Use_srtp extension protection profiles values as defined in
+ * http://www.iana.org/assignments/srtp-protection/srtp-protection.xhtml
+ *
+ * Reminder: if this list is expanded mbedtls_ssl_check_srtp_profile_value
+ * must be updated too.
+ */
+#define MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80     ( (uint16_t) 0x0001)
+#define MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32     ( (uint16_t) 0x0002)
+#define MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80          ( (uint16_t) 0x0005)
+#define MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32          ( (uint16_t) 0x0006)
+/* This one is not iana defined, but for code readability. */
+#define MBEDTLS_TLS_SRTP_UNSET                      ( (uint16_t) 0x0000)
+
+typedef uint16_t mbedtls_ssl_srtp_profile;
+
+typedef struct mbedtls_dtls_srtp_info_t
+{
+    /*! The SRTP profile that was negotiated. */
+    mbedtls_ssl_srtp_profile chosen_dtls_srtp_profile;
+    /*! The length of mki_value. */
+    uint16_t mki_len;
+    /*! The mki_value used, with max size of 256 bytes. */
+    unsigned char mki_value[MBEDTLS_TLS_SRTP_MAX_MKI_LENGTH];
+}
+mbedtls_dtls_srtp_info;
+
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
 /*
  * This structure is used for storing current session data.
+ *
+ * Note: when changing this definition, we need to check and update:
+ *  - in tests/suites/test_suite_ssl.function:
+ *      ssl_populate_session() and ssl_serialize_session_save_load()
+ *  - in library/ssl_tls.c:
+ *      mbedtls_ssl_session_init() and mbedtls_ssl_session_free()
+ *      mbedtls_ssl_session_save() and ssl_session_load()
+ *      ssl_session_copy()
  */
 struct mbedtls_ssl_session
 {
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+    unsigned char mfl_code;     /*!< MaxFragmentLength negotiated by peer */
+#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
+
 #if defined(MBEDTLS_HAVE_TIME)
     mbedtls_time_t start;       /*!< starting time      */
 #endif
@@ -827,7 +988,15 @@ struct mbedtls_ssl_session
     unsigned char master[48];   /*!< the master secret  */
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
-    mbedtls_x509_crt *peer_cert;        /*!< peer X.509 cert chain */
+#if defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+    mbedtls_x509_crt *peer_cert;       /*!< peer X.509 cert chain */
+#else /* MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
+    /*! The digest of the peer's end-CRT. This must be kept to detect CRT
+     *  changes during renegotiation, mitigating the triple handshake attack. */
+    unsigned char *peer_cert_digest;
+    size_t peer_cert_digest_len;
+    mbedtls_md_type_t peer_cert_digest_type;
+#endif /* !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
     uint32_t verify_result;          /*!<  verification result     */
 
@@ -837,10 +1006,6 @@ struct mbedtls_ssl_session
     uint32_t ticket_lifetime;   /*!< ticket lifetime hint    */
 #endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_CLI_C */
 
-#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
-    unsigned char mfl_code;     /*!< MaxFragmentLength negotiated by peer */
-#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
-
 #if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
     int trunc_hmac;             /*!< flag for truncated hmac activation   */
 #endif /* MBEDTLS_SSL_TRUNCATED_HMAC */
@@ -855,7 +1020,98 @@ struct mbedtls_ssl_session
  */
 struct mbedtls_ssl_config
 {
-    /* Group items by size (largest first) to minimize padding overhead */
+    /* Group items by size and reorder them to maximize usage of immediate offset access.    */
+
+    /*
+     * Numerical settings (char)
+     */
+
+    unsigned char max_major_ver;    /*!< max. major version used            */
+    unsigned char max_minor_ver;    /*!< max. minor version used            */
+    unsigned char min_major_ver;    /*!< min. major version used            */
+    unsigned char min_minor_ver;    /*!< min. minor version used            */
+
+    /*
+     * Flags (could be bit-fields to save RAM, but separate bytes make
+     * the code smaller on architectures with an instruction for direct
+     * byte access).
+     */
+
+    uint8_t endpoint /*bool*/;      /*!< 0: client, 1: server               */
+    uint8_t transport /*bool*/;     /*!< stream (TLS) or datagram (DTLS)    */
+    uint8_t authmode /*2 bits*/;    /*!< MBEDTLS_SSL_VERIFY_XXX             */
+    /* needed even with renego disabled for LEGACY_BREAK_HANDSHAKE          */
+    uint8_t allow_legacy_renegotiation /*2 bits*/; /*!< MBEDTLS_LEGACY_XXX  */
+#if defined(MBEDTLS_ARC4_C)
+    uint8_t arc4_disabled /*bool*/; /*!< blacklist RC4 ciphersuites?        */
+#endif
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+    uint8_t mfl_code /*3 bits*/;    /*!< desired fragment length            */
+#endif
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+    uint8_t encrypt_then_mac /*bool*/;  /*!< negotiate encrypt-then-mac?    */
+#endif
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+    uint8_t extended_ms /*bool*/;   /*!< negotiate extended master secret?  */
+#endif
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+    uint8_t anti_replay /*bool*/;   /*!< detect and prevent replay?         */
+#endif
+#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
+    uint8_t cbc_record_splitting /*bool*/;  /*!< do cbc record splitting    */
+#endif
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+    uint8_t disable_renegotiation /*bool*/; /*!< disable renegotiation?     */
+#endif
+#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
+    uint8_t trunc_hmac /*bool*/;    /*!< negotiate truncated hmac?          */
+#endif
+#if defined(MBEDTLS_SSL_SESSION_TICKETS)
+    uint8_t session_tickets /*bool*/;   /*!< use session tickets?           */
+#endif
+#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C)
+    uint8_t fallback /*bool*/;      /*!< is this a fallback?                */
+#endif
+#if defined(MBEDTLS_SSL_SRV_C)
+    uint8_t cert_req_ca_list /*bool*/;  /*!< enable sending CA list in
+                                          Certificate Request messages?     */
+#endif
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t ignore_unexpected_cid /*bool*/; /*!< Determines whether DTLS
+                                             *   record with unexpected CID
+                                             *   should lead to failure.    */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    uint8_t dtls_srtp_mki_support /*bool*/; /*!< support having mki_value
+                                                 in the use_srtp extension? */
+#endif
+
+    /*
+     * Numerical settings (int or larger)
+     */
+
+    uint32_t read_timeout;          /*!< timeout for mbedtls_ssl_read (ms)  */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    uint32_t hs_timeout_min;        /*!< initial value of the handshake
+                                         retransmission timeout (ms)        */
+    uint32_t hs_timeout_max;        /*!< maximum value of the handshake
+                                         retransmission timeout (ms)        */
+#endif
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+    int renego_max_records;         /*!< grace period for renegotiation     */
+    unsigned char renego_period[8]; /*!< value of the record counters
+                                         that triggers renegotiation        */
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
+    unsigned int badmac_limit;      /*!< limit of records with a bad MAC    */
+#endif
+
+#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C)
+    unsigned int dhm_min_bitlen;    /*!< min. bit length of the DHM prime   */
+#endif
 
     /*
      * Pointers
@@ -889,7 +1145,7 @@ struct mbedtls_ssl_config
     void *p_vrfy;                   /*!< context for X.509 verify calllback */
 #endif
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
     /** Callback to retrieve PSK key from identity                          */
     int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *, size_t);
     void *p_psk;                    /*!< context for PSK callback           */
@@ -918,14 +1174,28 @@ struct mbedtls_ssl_config
     /** Callback to export key block and master secret                      */
     int (*f_export_keys)( void *, const unsigned char *,
             const unsigned char *, size_t, size_t, size_t );
+    /** Callback to export key block, master secret,
+     *  tls_prf and random bytes. Should replace f_export_keys    */
+    int (*f_export_keys_ext)( void *, const unsigned char *,
+                const unsigned char *, size_t, size_t, size_t,
+                const unsigned char[32], const unsigned char[32],
+                mbedtls_tls_prf_types );
     void *p_export_keys;            /*!< context for key export callback    */
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    size_t cid_len; /*!< The length of CIDs for incoming DTLS records.      */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
     const mbedtls_x509_crt_profile *cert_profile; /*!< verification profile */
     mbedtls_ssl_key_cert *key_cert; /*!< own certificate/key pair(s)        */
     mbedtls_x509_crt *ca_chain;     /*!< trusted CAs                        */
     mbedtls_x509_crl *ca_crl;       /*!< trusted CAs CRLs                   */
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+    mbedtls_x509_crt_ca_cb_t f_ca_cb;
+    void *p_ca_cb;
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
 
 #if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
@@ -938,7 +1208,7 @@ struct mbedtls_ssl_config
     void *p_async_config_data; /*!< Configuration data set by mbedtls_ssl_conf_async_private_cb(). */
 #endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
     const int *sig_hashes;          /*!< allowed signature hashes           */
 #endif
 
@@ -951,103 +1221,52 @@ struct mbedtls_ssl_config
     mbedtls_mpi dhm_G;              /*!< generator for DHM                  */
 #endif
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
-    unsigned char *psk;             /*!< pre-shared key. This field should
-                                         only be set via
-                                         mbedtls_ssl_conf_psk() */
-    size_t         psk_len;         /*!< length of the pre-shared key. This
-                                         field should only be set via
-                                         mbedtls_ssl_conf_psk() */
-    unsigned char *psk_identity;    /*!< identity for PSK negotiation. This
-                                         field should only be set via
-                                         mbedtls_ssl_conf_psk() */
-    size_t         psk_identity_len;/*!< length of identity. This field should
-                                         only be set via
-                                         mbedtls_ssl_conf_psk() */
-#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_id_t psk_opaque; /*!< PSA key slot holding opaque PSK. This field
+                              *   should only be set via
+                              *   mbedtls_ssl_conf_psk_opaque().
+                              *   If either no PSK or a raw PSK have been
+                              *   configured, this has value \c 0.
+                              */
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+    unsigned char *psk;      /*!< The raw pre-shared key. This field should
+                              *   only be set via mbedtls_ssl_conf_psk().
+                              *   If either no PSK or an opaque PSK
+                              *   have been configured, this has value NULL. */
+    size_t         psk_len;  /*!< The length of the raw pre-shared key.
+                              *   This field should only be set via
+                              *   mbedtls_ssl_conf_psk().
+                              *   Its value is non-zero if and only if
+                              *   \c psk is not \c NULL. */
+
+    unsigned char *psk_identity;    /*!< The PSK identity for PSK negotiation.
+                                     *   This field should only be set via
+                                     *   mbedtls_ssl_conf_psk().
+                                     *   This is set if and only if either
+                                     *   \c psk or \c psk_opaque are set. */
+    size_t         psk_identity_len;/*!< The length of PSK identity.
+                                     *   This field should only be set via
+                                     *   mbedtls_ssl_conf_psk().
+                                     *   Its value is non-zero if and only if
+                                     *   \c psk is not \c NULL or \c psk_opaque
+                                     *   is not \c 0. */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
 
 #if defined(MBEDTLS_SSL_ALPN)
     const char **alpn_list;         /*!< ordered list of protocols          */
 #endif
 
-    /*
-     * Numerical settings (int then char)
-     */
-
-    uint32_t read_timeout;          /*!< timeout for mbedtls_ssl_read (ms)  */
-
-#if defined(MBEDTLS_SSL_PROTO_DTLS)
-    uint32_t hs_timeout_min;        /*!< initial value of the handshake
-                                         retransmission timeout (ms)        */
-    uint32_t hs_timeout_max;        /*!< maximum value of the handshake
-                                         retransmission timeout (ms)        */
-#endif
-
-#if defined(MBEDTLS_SSL_RENEGOTIATION)
-    int renego_max_records;         /*!< grace period for renegotiation     */
-    unsigned char renego_period[8]; /*!< value of the record counters
-                                         that triggers renegotiation        */
-#endif
-
-#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
-    unsigned int badmac_limit;      /*!< limit of records with a bad MAC    */
-#endif
-
-#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C)
-    unsigned int dhm_min_bitlen;    /*!< min. bit length of the DHM prime   */
-#endif
-
-    unsigned char max_major_ver;    /*!< max. major version used            */
-    unsigned char max_minor_ver;    /*!< max. minor version used            */
-    unsigned char min_major_ver;    /*!< min. major version used            */
-    unsigned char min_minor_ver;    /*!< min. minor version used            */
-
-    /*
-     * Flags (bitfields)
-     */
-
-    unsigned int endpoint : 1;      /*!< 0: client, 1: server               */
-    unsigned int transport : 1;     /*!< stream (TLS) or datagram (DTLS)    */
-    unsigned int authmode : 2;      /*!< MBEDTLS_SSL_VERIFY_XXX             */
-    /* needed even with renego disabled for LEGACY_BREAK_HANDSHAKE          */
-    unsigned int allow_legacy_renegotiation : 2 ; /*!< MBEDTLS_LEGACY_XXX   */
-#if defined(MBEDTLS_ARC4_C)
-    unsigned int arc4_disabled : 1; /*!< blacklist RC4 ciphersuites?        */
-#endif
-#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
-    unsigned int mfl_code : 3;      /*!< desired fragment length            */
-#endif
-#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
-    unsigned int encrypt_then_mac : 1 ; /*!< negotiate encrypt-then-mac?    */
-#endif
-#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
-    unsigned int extended_ms : 1;   /*!< negotiate extended master secret?  */
-#endif
-#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
-    unsigned int anti_replay : 1;   /*!< detect and prevent replay?         */
-#endif
-#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
-    unsigned int cbc_record_splitting : 1;  /*!< do cbc record splitting    */
-#endif
-#if defined(MBEDTLS_SSL_RENEGOTIATION)
-    unsigned int disable_renegotiation : 1; /*!< disable renegotiation?     */
-#endif
-#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
-    unsigned int trunc_hmac : 1;    /*!< negotiate truncated hmac?          */
-#endif
-#if defined(MBEDTLS_SSL_SESSION_TICKETS)
-    unsigned int session_tickets : 1;   /*!< use session tickets?           */
-#endif
-#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C)
-    unsigned int fallback : 1;      /*!< is this a fallback?                */
-#endif
-#if defined(MBEDTLS_SSL_SRV_C)
-    unsigned int cert_req_ca_list : 1;  /*!< enable sending CA list in
-                                          Certificate Request messages?     */
-#endif
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    /*! ordered list of supported srtp profile */
+    const mbedtls_ssl_srtp_profile *dtls_srtp_profile_list;
+    /*! number of supported profiles */
+    size_t dtls_srtp_profile_list_len;
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
 };
 
-
 struct mbedtls_ssl_context
 {
     const mbedtls_ssl_config *conf; /*!< configuration information          */
@@ -1070,6 +1289,12 @@ struct mbedtls_ssl_context
     unsigned badmac_seen;       /*!< records with a bad MAC received    */
 #endif /* MBEDTLS_SSL_DTLS_BADMAC_LIMIT */
 
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+    /** Callback to customize X.509 certificate chain verification          */
+    int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *);
+    void *p_vrfy;                   /*!< context for X.509 verify callback */
+#endif
+
     mbedtls_ssl_send_t *f_send; /*!< Callback for network send */
     mbedtls_ssl_recv_t *f_recv; /*!< Callback for network receive */
     mbedtls_ssl_recv_timeout_t *f_recv_timeout;
@@ -1112,6 +1337,10 @@ struct mbedtls_ssl_context
                                      TLS: maintained by us
                                      DTLS: read from peer             */
     unsigned char *in_hdr;      /*!< start of record header           */
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    unsigned char *in_cid;      /*!< The start of the CID;
+                                 *   (the end is marked by in_len).   */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
     unsigned char *in_len;      /*!< two-bytes message length field   */
     unsigned char *in_iv;       /*!< ivlen-byte IV                    */
     unsigned char *in_msg;      /*!< message contents (in_iv+ivlen)   */
@@ -1120,6 +1349,9 @@ struct mbedtls_ssl_context
     int in_msgtype;             /*!< record header: message type      */
     size_t in_msglen;           /*!< record header: message length    */
     size_t in_left;             /*!< amount of data read so far       */
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+    size_t in_buf_len;          /*!< length of input buffer           */
+#endif
 #if defined(MBEDTLS_SSL_PROTO_DTLS)
     uint16_t in_epoch;          /*!< DTLS epoch for incoming records  */
     size_t next_record_offset;  /*!< offset of the next record in datagram
@@ -1148,6 +1380,10 @@ struct mbedtls_ssl_context
     unsigned char *out_buf;     /*!< output buffer                    */
     unsigned char *out_ctr;     /*!< 64-bit outgoing message counter  */
     unsigned char *out_hdr;     /*!< start of record header           */
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    unsigned char *out_cid;     /*!< The start of the CID;
+                                 *   (the end is marked by in_len).   */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
     unsigned char *out_len;     /*!< two-bytes message length field   */
     unsigned char *out_iv;      /*!< ivlen-byte IV                    */
     unsigned char *out_msg;     /*!< message contents (out_iv+ivlen)  */
@@ -1155,6 +1391,9 @@ struct mbedtls_ssl_context
     int out_msgtype;            /*!< record header: message type      */
     size_t out_msglen;          /*!< record header: message length    */
     size_t out_left;            /*!< amount of data not yet written   */
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+    size_t out_buf_len;         /*!< length of output buffer          */
+#endif
 
     unsigned char cur_out_ctr[8]; /*!<  Outgoing record sequence  number. */
 
@@ -1186,6 +1425,13 @@ struct mbedtls_ssl_context
     const char *alpn_chosen;    /*!<  negotiated protocol                   */
 #endif /* MBEDTLS_SSL_ALPN */
 
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    /*
+     * use_srtp extension
+     */
+    mbedtls_dtls_srtp_info dtls_srtp_info;
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
     /*
      * Information for DTLS hello verify
      */
@@ -1205,25 +1451,59 @@ struct mbedtls_ssl_context
     char own_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!<  previous handshake verify data */
     char peer_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!<  previous handshake verify data */
 #endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    /* CID configuration to use in subsequent handshakes. */
+
+    /*! The next incoming CID, chosen by the user and applying to
+     *  all subsequent handshakes. This may be different from the
+     *  CID currently used in case the user has re-configured the CID
+     *  after an initial handshake. */
+    unsigned char own_cid[ MBEDTLS_SSL_CID_IN_LEN_MAX ];
+    uint8_t own_cid_len;   /*!< The length of \c own_cid. */
+    uint8_t negotiate_cid; /*!< This indicates whether the CID extension should
+                            *   be negotiated in the next handshake or not.
+                            *   Possible values are #MBEDTLS_SSL_CID_ENABLED
+                            *   and #MBEDTLS_SSL_CID_DISABLED. */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
 };
 
 #if defined(MBEDTLS_SSL_HW_RECORD_ACCEL)
 
-#define MBEDTLS_SSL_CHANNEL_OUTBOUND    0
-#define MBEDTLS_SSL_CHANNEL_INBOUND     1
-
-extern int (*mbedtls_ssl_hw_record_init)(mbedtls_ssl_context *ssl,
-                const unsigned char *key_enc, const unsigned char *key_dec,
-                size_t keylen,
-                const unsigned char *iv_enc,  const unsigned char *iv_dec,
-                size_t ivlen,
-                const unsigned char *mac_enc, const unsigned char *mac_dec,
-                size_t maclen);
-extern int (*mbedtls_ssl_hw_record_activate)(mbedtls_ssl_context *ssl, int direction);
-extern int (*mbedtls_ssl_hw_record_reset)(mbedtls_ssl_context *ssl);
-extern int (*mbedtls_ssl_hw_record_write)(mbedtls_ssl_context *ssl);
-extern int (*mbedtls_ssl_hw_record_read)(mbedtls_ssl_context *ssl);
-extern int (*mbedtls_ssl_hw_record_finish)(mbedtls_ssl_context *ssl);
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#define MBEDTLS_SSL_CHANNEL_OUTBOUND   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( 0 )
+#define MBEDTLS_SSL_CHANNEL_INBOUND    MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( 1 )
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_WARNING */
+
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_init)(
+                    mbedtls_ssl_context *ssl,
+                    const unsigned char *key_enc, const unsigned char *key_dec,
+                    size_t keylen,
+                    const unsigned char *iv_enc,  const unsigned char *iv_dec,
+                    size_t ivlen,
+                    const unsigned char *mac_enc, const unsigned char *mac_dec,
+                    size_t maclen);
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_activate)(
+                                                    mbedtls_ssl_context *ssl,
+                                                    int direction );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_reset)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_write)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_read)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_finish)(
+                                                    mbedtls_ssl_context *ssl );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
 #endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */
 
 /**
@@ -1346,13 +1626,17 @@ void mbedtls_ssl_conf_authmode( mbedtls_ssl_config *conf, int authmode );
 /**
  * \brief          Set the verification callback (Optional).
  *
- *                 If set, the verify callback is called for each
- *                 certificate in the chain. For implementation
- *                 information, please see \c mbedtls_x509_crt_verify()
+ *                 If set, the provided verify callback is called for each
+ *                 certificate in the peer's CRT chain, including the trusted
+ *                 root. For more information, please see the documentation of
+ *                 \c mbedtls_x509_crt_verify().
  *
- * \param conf     SSL configuration
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
+ * \note           For per context callbacks and contexts, please use
+ *                 mbedtls_ssl_set_verify() instead.
+ *
+ * \param conf     The SSL configuration to use.
+ * \param f_vrfy   The verification callback to use during CRT verification.
+ * \param p_vrfy   The opaque context to be passed to the callback.
  */
 void mbedtls_ssl_conf_verify( mbedtls_ssl_config *conf,
                      int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
@@ -1425,6 +1709,142 @@ void mbedtls_ssl_set_bio( mbedtls_ssl_context *ssl,
                           mbedtls_ssl_recv_timeout_t *f_recv_timeout );
 
 #if defined(MBEDTLS_SSL_PROTO_DTLS)
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+
+
+/**
+ * \brief             Configure the use of the Connection ID (CID)
+ *                    extension in the next handshake.
+ *
+ *                    Reference: draft-ietf-tls-dtls-connection-id-05
+ *                    https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05
+ *
+ *                    The DTLS CID extension allows the reliable association of
+ *                    DTLS records to DTLS connections across changes in the
+ *                    underlying transport (changed IP and Port metadata) by
+ *                    adding explicit connection identifiers (CIDs) to the
+ *                    headers of encrypted DTLS records. The desired CIDs are
+ *                    configured by the application layer and are exchanged in
+ *                    new `ClientHello` / `ServerHello` extensions during the
+ *                    handshake, where each side indicates the CID it wants the
+ *                    peer to use when writing encrypted messages. The CIDs are
+ *                    put to use once records get encrypted: the stack discards
+ *                    any incoming records that don't include the configured CID
+ *                    in their header, and adds the peer's requested CID to the
+ *                    headers of outgoing messages.
+ *
+ *                    This API enables or disables the use of the CID extension
+ *                    in the next handshake and sets the value of the CID to
+ *                    be used for incoming messages.
+ *
+ * \param ssl         The SSL context to configure. This must be initialized.
+ * \param enable      This value determines whether the CID extension should
+ *                    be used or not. Possible values are:
+ *                    - MBEDTLS_SSL_CID_ENABLED to enable the use of the CID.
+ *                    - MBEDTLS_SSL_CID_DISABLED (default) to disable the use
+ *                      of the CID.
+ * \param own_cid     The address of the readable buffer holding the CID we want
+ *                    the peer to use when sending encrypted messages to us.
+ *                    This may be \c NULL if \p own_cid_len is \c 0.
+ *                    This parameter is unused if \p enabled is set to
+ *                    MBEDTLS_SSL_CID_DISABLED.
+ * \param own_cid_len The length of \p own_cid.
+ *                    This parameter is unused if \p enabled is set to
+ *                    MBEDTLS_SSL_CID_DISABLED.
+ *
+ * \note              The value of \p own_cid_len must match the value of the
+ *                    \c len parameter passed to mbedtls_ssl_conf_cid()
+ *                    when configuring the ::mbedtls_ssl_config that \p ssl
+ *                    is bound to.
+ *
+ * \note              This CID configuration applies to subsequent handshakes
+ *                    performed on the SSL context \p ssl, but does not trigger
+ *                    one. You still have to call `mbedtls_ssl_handshake()`
+ *                    (for the initial handshake) or `mbedtls_ssl_renegotiate()`
+ *                    (for a renegotiation handshake) explicitly after a
+ *                    successful call to this function to run the handshake.
+ *
+ * \note              This call cannot guarantee that the use of the CID
+ *                    will be successfully negotiated in the next handshake,
+ *                    because the peer might not support it. Specifically:
+ *                    - On the Client, enabling the use of the CID through
+ *                      this call implies that the `ClientHello` in the next
+ *                      handshake will include the CID extension, thereby
+ *                      offering the use of the CID to the server. Only if
+ *                      the `ServerHello` contains the CID extension, too,
+ *                      the CID extension will actually be put to use.
+ *                    - On the Server, enabling the use of the CID through
+ *                      this call implies that that the server will look for
+ *                      the CID extension in a `ClientHello` from the client,
+ *                      and, if present, reply with a CID extension in its
+ *                      `ServerHello`.
+ *
+ * \note              To check whether the use of the CID was negotiated
+ *                    after the subsequent handshake has completed, please
+ *                    use the API mbedtls_ssl_get_peer_cid().
+ *
+ * \warning           If the use of the CID extension is enabled in this call
+ *                    and the subsequent handshake negotiates its use, Mbed TLS
+ *                    will silently drop every packet whose CID does not match
+ *                    the CID configured in \p own_cid. It is the responsibility
+ *                    of the user to adapt the underlying transport to take care
+ *                    of CID-based demultiplexing before handing datagrams to
+ *                    Mbed TLS.
+ *
+ * \return            \c 0 on success. In this case, the CID configuration
+ *                    applies to the next handshake.
+ * \return            A negative error code on failure.
+ */
+int mbedtls_ssl_set_cid( mbedtls_ssl_context *ssl,
+                         int enable,
+                         unsigned char const *own_cid,
+                         size_t own_cid_len );
+
+/**
+ * \brief              Get information about the use of the CID extension
+ *                     in the current connection.
+ *
+ * \param ssl          The SSL context to query.
+ * \param enabled      The address at which to store whether the CID extension
+ *                     is currently in use or not. If the CID is in use,
+ *                     `*enabled` is set to MBEDTLS_SSL_CID_ENABLED;
+ *                     otherwise, it is set to MBEDTLS_SSL_CID_DISABLED.
+ * \param peer_cid     The address of the buffer in which to store the CID
+ *                     chosen by the peer (if the CID extension is used).
+ *                     This may be \c NULL in case the value of peer CID
+ *                     isn't needed. If it is not \c NULL, \p peer_cid_len
+ *                     must not be \c NULL.
+ * \param peer_cid_len The address at which to store the size of the CID
+ *                     chosen by the peer (if the CID extension is used).
+ *                     This is also the number of Bytes in \p peer_cid that
+ *                     have been written.
+ *                     This may be \c NULL in case the length of the peer CID
+ *                     isn't needed. If it is \c NULL, \p peer_cid must be
+ *                     \c NULL, too.
+ *
+ * \note               This applies to the state of the CID negotiated in
+ *                     the last complete handshake. If a handshake is in
+ *                     progress, this function will attempt to complete
+ *                     the handshake first.
+ *
+ * \note               If CID extensions have been exchanged but both client
+ *                     and server chose to use an empty CID, this function
+ *                     sets `*enabled` to #MBEDTLS_SSL_CID_DISABLED
+ *                     (the rationale for this is that the resulting
+ *                     communication is the same as if the CID extensions
+ *                     hadn't been used).
+ *
+ * \return            \c 0 on success.
+ * \return            A negative error code on failure.
+ */
+int mbedtls_ssl_get_peer_cid( mbedtls_ssl_context *ssl,
+                     int *enabled,
+                     unsigned char peer_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ],
+                     size_t *peer_cid_len );
+
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
 /**
  * \brief          Set the Maximum Tranport Unit (MTU).
  *                 Special value: 0 means unset (no limit).
@@ -1470,6 +1890,30 @@ void mbedtls_ssl_set_bio( mbedtls_ssl_context *ssl,
 void mbedtls_ssl_set_mtu( mbedtls_ssl_context *ssl, uint16_t mtu );
 #endif /* MBEDTLS_SSL_PROTO_DTLS */
 
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief          Set a connection-specific verification callback (optional).
+ *
+ *                 If set, the provided verify callback is called for each
+ *                 certificate in the peer's CRT chain, including the trusted
+ *                 root. For more information, please see the documentation of
+ *                 \c mbedtls_x509_crt_verify().
+ *
+ * \note           This call is analogous to mbedtls_ssl_conf_verify() but
+ *                 binds the verification callback and context to an SSL context
+ *                 as opposed to an SSL configuration.
+ *                 If mbedtls_ssl_conf_verify() and mbedtls_ssl_set_verify()
+ *                 are both used, mbedtls_ssl_set_verify() takes precedence.
+ *
+ * \param ssl      The SSL context to use.
+ * \param f_vrfy   The verification callback to use during CRT verification.
+ * \param p_vrfy   The opaque context to be passed to the callback.
+ */
+void mbedtls_ssl_set_verify( mbedtls_ssl_context *ssl,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
 /**
  * \brief          Set the timeout period for mbedtls_ssl_read()
  *                 (Default: no timeout.)
@@ -1488,6 +1932,56 @@ void mbedtls_ssl_set_mtu( mbedtls_ssl_context *ssl, uint16_t mtu );
  */
 void mbedtls_ssl_conf_read_timeout( mbedtls_ssl_config *conf, uint32_t timeout );
 
+#if defined(MBEDTLS_SSL_RECORD_CHECKING)
+/**
+ * \brief          Check whether a buffer contains a valid and authentic record
+ *                 that has not been seen before. (DTLS only).
+ *
+ *                 This function does not change the user-visible state
+ *                 of the SSL context. Its sole purpose is to provide
+ *                 an indication of the legitimacy of an incoming record.
+ *
+ *                 This can be useful e.g. in distributed server environments
+ *                 using the DTLS Connection ID feature, in which connections
+ *                 might need to be passed between service instances on a change
+ *                 of peer address, but where such disruptive operations should
+ *                 only happen after the validity of incoming records has been
+ *                 confirmed.
+ *
+ * \param ssl      The SSL context to use.
+ * \param buf      The address of the buffer holding the record to be checked.
+ *                 This must be a read/write buffer of length \p buflen Bytes.
+ * \param buflen   The length of \p buf in Bytes.
+ *
+ * \note           This routine only checks whether the provided buffer begins
+ *                 with a valid and authentic record that has not been seen
+ *                 before, but does not check potential data following the
+ *                 initial record. In particular, it is possible to pass DTLS
+ *                 datagrams containing multiple records, in which case only
+ *                 the first record is checked.
+ *
+ * \note           This function modifies the input buffer \p buf. If you need
+ *                 to preserve the original record, you have to maintain a copy.
+ *
+ * \return         \c 0 if the record is valid and authentic and has not been
+ *                 seen before.
+ * \return         MBEDTLS_ERR_SSL_INVALID_MAC if the check completed
+ *                 successfully but the record was found to be not authentic.
+ * \return         MBEDTLS_ERR_SSL_INVALID_RECORD if the check completed
+ *                 successfully but the record was found to be invalid for
+ *                 a reason different from authenticity checking.
+ * \return         MBEDTLS_ERR_SSL_UNEXPECTED_RECORD if the check completed
+ *                 successfully but the record was found to be unexpected
+ *                 in the state of the SSL context, including replayed records.
+ * \return         Another negative error code on different kinds of failure.
+ *                 In this case, the SSL context becomes unusable and needs
+ *                 to be freed or reset before reuse.
+ */
+int mbedtls_ssl_check_record( mbedtls_ssl_context const *ssl,
+                              unsigned char *buf,
+                              size_t buflen );
+#endif /* MBEDTLS_SSL_RECORD_CHECKING */
+
 /**
  * \brief          Set the timer callbacks (Mandatory for DTLS.)
  *
@@ -1566,6 +2060,41 @@ typedef int mbedtls_ssl_export_keys_t( void *p_expkey,
                                 size_t maclen,
                                 size_t keylen,
                                 size_t ivlen );
+
+/**
+ * \brief           Callback type: Export key block, master secret,
+ *                                 handshake randbytes and the tls_prf function
+ *                                 used to derive keys.
+ *
+ * \note            This is required for certain uses of TLS, e.g. EAP-TLS
+ *                  (RFC 5216) and Thread. The key pointers are ephemeral and
+ *                  therefore must not be stored. The master secret and keys
+ *                  should not be used directly except as an input to a key
+ *                  derivation function.
+ *
+ * \param p_expkey  Context for the callback.
+ * \param ms        Pointer to master secret (fixed length: 48 bytes).
+ * \param kb            Pointer to key block, see RFC 5246 section 6.3.
+ *                      (variable length: 2 * maclen + 2 * keylen + 2 * ivlen).
+ * \param maclen        MAC length.
+ * \param keylen        Key length.
+ * \param ivlen         IV length.
+ * \param client_random The client random bytes.
+ * \param server_random The server random bytes.
+ * \param tls_prf_type The tls_prf enum type.
+ *
+ * \return          0 if successful, or
+ *                  a specific MBEDTLS_ERR_XXX code.
+ */
+typedef int mbedtls_ssl_export_keys_ext_t( void *p_expkey,
+                                           const unsigned char *ms,
+                                           const unsigned char *kb,
+                                           size_t maclen,
+                                           size_t keylen,
+                                           size_t ivlen,
+                                           const unsigned char client_random[32],
+                                           const unsigned char server_random[32],
+                                           mbedtls_tls_prf_types tls_prf_type );
 #endif /* MBEDTLS_SSL_EXPORT_KEYS */
 
 /**
@@ -1631,6 +2160,22 @@ void mbedtls_ssl_conf_session_tickets_cb( mbedtls_ssl_config *conf,
 void mbedtls_ssl_conf_export_keys_cb( mbedtls_ssl_config *conf,
         mbedtls_ssl_export_keys_t *f_export_keys,
         void *p_export_keys );
+
+/**
+ * \brief           Configure extended key export callback.
+ *                  (Default: none.)
+ *
+ * \note            See \c mbedtls_ssl_export_keys_ext_t.
+ * \warning         Exported key material must not be used for any purpose
+ *                  before the (D)TLS handshake is completed
+ *
+ * \param conf      SSL configuration context
+ * \param f_export_keys_ext Callback for exporting keys
+ * \param p_export_keys     Context for the callback
+ */
+void mbedtls_ssl_conf_export_keys_ext_cb( mbedtls_ssl_config *conf,
+        mbedtls_ssl_export_keys_ext_t *f_export_keys_ext,
+        void *p_export_keys );
 #endif /* MBEDTLS_SSL_EXPORT_KEYS */
 
 #if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
@@ -1981,6 +2526,90 @@ void mbedtls_ssl_conf_session_cache( mbedtls_ssl_config *conf,
 int mbedtls_ssl_set_session( mbedtls_ssl_context *ssl, const mbedtls_ssl_session *session );
 #endif /* MBEDTLS_SSL_CLI_C */
 
+/**
+ * \brief          Load serialized session data into a session structure.
+ *                 On client, this can be used for loading saved sessions
+ *                 before resuming them with mbedstls_ssl_set_session().
+ *                 On server, this can be used for alternative implementations
+ *                 of session cache or session tickets.
+ *
+ * \warning        If a peer certificate chain is associated with the session,
+ *                 the serialized state will only contain the peer's
+ *                 end-entity certificate and the result of the chain
+ *                 verification (unless verification was disabled), but not
+ *                 the rest of the chain.
+ *
+ * \see            mbedtls_ssl_session_save()
+ * \see            mbedtls_ssl_set_session()
+ *
+ * \param session  The session structure to be populated. It must have been
+ *                 initialised with mbedtls_ssl_session_init() but not
+ *                 populated yet.
+ * \param buf      The buffer holding the serialized session data. It must be a
+ *                 readable buffer of at least \p len bytes.
+ * \param len      The size of the serialized data in bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if input data is invalid.
+ * \return         #MBEDTLS_ERR_SSL_VERSION_MISMATCH if the serialized data
+ *                 was generated in a different version or configuration of
+ *                 Mbed TLS.
+ * \return         Another negative value for other kinds of errors (for
+ *                 example, unsupported features in the embedded certificate).
+ */
+int mbedtls_ssl_session_load( mbedtls_ssl_session *session,
+                              const unsigned char *buf,
+                              size_t len );
+
+/**
+ * \brief          Save session structure as serialized data in a buffer.
+ *                 On client, this can be used for saving session data,
+ *                 potentially in non-volatile storage, for resuming later.
+ *                 On server, this can be used for alternative implementations
+ *                 of session cache or session tickets.
+ *
+ * \see            mbedtls_ssl_session_load()
+ * \see            mbedtls_ssl_get_session_pointer()
+ *
+ * \param session  The session structure to be saved.
+ * \param buf      The buffer to write the serialized data to. It must be a
+ *                 writeable buffer of at least \p len bytes, or may be \c
+ *                 NULL if \p len is \c 0.
+ * \param buf_len  The number of bytes available for writing in \p buf.
+ * \param olen     The size in bytes of the data that has been or would have
+ *                 been written. It must point to a valid \c size_t.
+ *
+ * \note           \p olen is updated to the correct value regardless of
+ *                 whether \p buf_len was large enough. This makes it possible
+ *                 to determine the necessary size by calling this function
+ *                 with \p buf set to \c NULL and \p buf_len to \c 0.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL if \p buf is too small.
+ */
+int mbedtls_ssl_session_save( const mbedtls_ssl_session *session,
+                              unsigned char *buf,
+                              size_t buf_len,
+                              size_t *olen );
+
+/**
+ * \brief          Get a pointer to the current session structure, for example
+ *                 to serialize it.
+ *
+ * \warning        Ownership of the session remains with the SSL context, and
+ *                 the returned pointer is only guaranteed to be valid until
+ *                 the next API call operating on the same \p ssl context.
+ *
+ * \see            mbedtls_ssl_session_save()
+ *
+ * \param ssl      The SSL context.
+ *
+ * \return         A pointer to the current session if successful.
+ * \return         \c NULL if no session is active.
+ */
+const mbedtls_ssl_session *mbedtls_ssl_get_session_pointer( const mbedtls_ssl_context *ssl );
+
 /**
  * \brief               Set the list of allowed ciphersuites and the preference
  *                      order. First in the list has the highest preference.
@@ -1999,6 +2628,45 @@ int mbedtls_ssl_set_session( mbedtls_ssl_context *ssl, const mbedtls_ssl_session
 void mbedtls_ssl_conf_ciphersuites( mbedtls_ssl_config *conf,
                                    const int *ciphersuites );
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+#define MBEDTLS_SSL_UNEXPECTED_CID_IGNORE 0
+#define MBEDTLS_SSL_UNEXPECTED_CID_FAIL   1
+/**
+ * \brief               Specify the length of Connection IDs for incoming
+ *                      encrypted DTLS records, as well as the behaviour
+ *                      on unexpected CIDs.
+ *
+ *                      By default, the CID length is set to \c 0,
+ *                      and unexpected CIDs are silently ignored.
+ *
+ * \param conf          The SSL configuration to modify.
+ * \param len           The length in Bytes of the CID fields in encrypted
+ *                      DTLS records using the CID mechanism. This must
+ *                      not be larger than #MBEDTLS_SSL_CID_OUT_LEN_MAX.
+ * \param ignore_other_cids This determines the stack's behaviour when
+ *                          receiving a record with an unexpected CID.
+ *                          Possible values are:
+ *                          - #MBEDTLS_SSL_UNEXPECTED_CID_IGNORE
+ *                            In this case, the record is silently ignored.
+ *                          - #MBEDTLS_SSL_UNEXPECTED_CID_FAIL
+ *                            In this case, the stack fails with the specific
+ *                            error code #MBEDTLS_ERR_SSL_UNEXPECTED_CID.
+ *
+ * \note                The CID specification allows implementations to either
+ *                      use a common length for all incoming connection IDs or
+ *                      allow variable-length incoming IDs. Mbed TLS currently
+ *                      requires a common length for all connections sharing the
+ *                      same SSL configuration; this allows simpler parsing of
+ *                      record headers.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if \p own_cid_len
+ *                      is too large.
+ */
+int mbedtls_ssl_conf_cid( mbedtls_ssl_config *conf, size_t len,
+                          int ignore_other_cids );
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
 /**
  * \brief               Set the list of allowed ciphersuites and the
  *                      preference order for a specific version of the protocol.
@@ -2051,6 +2719,63 @@ void mbedtls_ssl_conf_ca_chain( mbedtls_ssl_config *conf,
                                mbedtls_x509_crt *ca_chain,
                                mbedtls_x509_crl *ca_crl );
 
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+/**
+ * \brief          Set the trusted certificate callback.
+ *
+ *                 This API allows to register the set of trusted certificates
+ *                 through a callback, instead of a linked list as configured
+ *                 by mbedtls_ssl_conf_ca_chain().
+ *
+ *                 This is useful for example in contexts where a large number
+ *                 of CAs are used, and the inefficiency of maintaining them
+ *                 in a linked list cannot be tolerated. It is also useful when
+ *                 the set of trusted CAs needs to be modified frequently.
+ *
+ *                 See the documentation of `mbedtls_x509_crt_ca_cb_t` for
+ *                 more information.
+ *
+ * \param conf     The SSL configuration to register the callback with.
+ * \param f_ca_cb  The trusted certificate callback to use when verifying
+ *                 certificate chains.
+ * \param p_ca_cb  The context to be passed to \p f_ca_cb (for example,
+ *                 a reference to a trusted CA database).
+ *
+ * \note           This API is incompatible with mbedtls_ssl_conf_ca_chain():
+ *                 Any call to this function overwrites the values set through
+ *                 earlier calls to mbedtls_ssl_conf_ca_chain() or
+ *                 mbedtls_ssl_conf_ca_cb().
+ *
+ * \note           This API is incompatible with CA indication in
+ *                 CertificateRequest messages: A server-side SSL context which
+ *                 is bound to an SSL configuration that uses a CA callback
+ *                 configured via mbedtls_ssl_conf_ca_cb(), and which requires
+ *                 client authentication, will send an empty CA list in the
+ *                 corresponding CertificateRequest message.
+ *
+ * \note           This API is incompatible with mbedtls_ssl_set_hs_ca_chain():
+ *                 If an SSL context is bound to an SSL configuration which uses
+ *                 CA callbacks configured via mbedtls_ssl_conf_ca_cb(), then
+ *                 calls to mbedtls_ssl_set_hs_ca_chain() have no effect.
+ *
+ * \note           The use of this API disables the use of restartable ECC
+ *                 during X.509 CRT signature verification (but doesn't affect
+ *                 other uses).
+ *
+ * \warning        This API is incompatible with the use of CRLs. Any call to
+ *                 mbedtls_ssl_conf_ca_cb() unsets CRLs configured through
+ *                 earlier calls to mbedtls_ssl_conf_ca_chain().
+ *
+ * \warning        In multi-threaded environments, the callback \p f_ca_cb
+ *                 must be thread-safe, and it is the user's responsibility
+ *                 to guarantee this (for example through a mutex
+ *                 contained in the callback context pointed to by \p p_ca_cb).
+ */
+void mbedtls_ssl_conf_ca_cb( mbedtls_ssl_config *conf,
+                             mbedtls_x509_crt_ca_cb_t f_ca_cb,
+                             void *p_ca_cb );
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
+
 /**
  * \brief          Set own certificate chain and private key
  *
@@ -2092,76 +2817,172 @@ int mbedtls_ssl_conf_own_cert( mbedtls_ssl_config *conf,
                               mbedtls_pk_context *pk_key );
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
 /**
- * \brief          Set the Pre Shared Key (PSK) and the expected identity name
+ * \brief          Configure a pre-shared key (PSK) and identity
+ *                 to be used in PSK-based ciphersuites.
  *
  * \note           This is mainly useful for clients. Servers will usually
  *                 want to use \c mbedtls_ssl_conf_psk_cb() instead.
  *
- * \note           Currently clients can only register one pre-shared key.
- *                 In other words, the servers' identity hint is ignored.
+ * \note           A PSK set by \c mbedtls_ssl_set_hs_psk() in the PSK callback
+ *                 takes precedence over a PSK configured by this function.
+ *
+ * \warning        Currently, clients can only register a single pre-shared key.
+ *                 Calling this function or mbedtls_ssl_conf_psk_opaque() more
+ *                 than once will overwrite values configured in previous calls.
  *                 Support for setting multiple PSKs on clients and selecting
- *                 one based on the identity hint is not a planned feature but
- *                 feedback is welcomed.
+ *                 one based on the identity hint is not a planned feature,
+ *                 but feedback is welcomed.
  *
- * \param conf     SSL configuration
- * \param psk      pointer to the pre-shared key
- * \param psk_len  pre-shared key length
- * \param psk_identity      pointer to the pre-shared key identity
- * \param psk_identity_len  identity key length
+ * \param conf     The SSL configuration to register the PSK with.
+ * \param psk      The pointer to the pre-shared key to use.
+ * \param psk_len  The length of the pre-shared key in bytes.
+ * \param psk_identity      The pointer to the pre-shared key identity.
+ * \param psk_identity_len  The length of the pre-shared key identity
+ *                          in bytes.
  *
- * \return         0 if successful or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ * \note           The PSK and its identity are copied internally and
+ *                 hence need not be preserved by the caller for the lifetime
+ *                 of the SSL configuration.
+ *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
  */
 int mbedtls_ssl_conf_psk( mbedtls_ssl_config *conf,
                 const unsigned char *psk, size_t psk_len,
                 const unsigned char *psk_identity, size_t psk_identity_len );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief          Configure an opaque pre-shared key (PSK) and identity
+ *                 to be used in PSK-based ciphersuites.
+ *
+ * \note           This is mainly useful for clients. Servers will usually
+ *                 want to use \c mbedtls_ssl_conf_psk_cb() instead.
+ *
+ * \note           An opaque PSK set by \c mbedtls_ssl_set_hs_psk_opaque() in
+ *                 the PSK callback takes precedence over an opaque PSK
+ *                 configured by this function.
+ *
+ * \warning        Currently, clients can only register a single pre-shared key.
+ *                 Calling this function or mbedtls_ssl_conf_psk() more than
+ *                 once will overwrite values configured in previous calls.
+ *                 Support for setting multiple PSKs on clients and selecting
+ *                 one based on the identity hint is not a planned feature,
+ *                 but feedback is welcomed.
+ *
+ * \param conf     The SSL configuration to register the PSK with.
+ * \param psk      The identifier of the key slot holding the PSK.
+ *                 Until \p conf is destroyed or this function is successfully
+ *                 called again, the key slot \p psk must be populated with a
+ *                 key of type PSA_ALG_CATEGORY_KEY_DERIVATION whose policy
+ *                 allows its use for the key derivation algorithm applied
+ *                 in the handshake.
+ * \param psk_identity      The pointer to the pre-shared key identity.
+ * \param psk_identity_len  The length of the pre-shared key identity
+ *                          in bytes.
+ *
+ * \note           The PSK identity hint is copied internally and hence need
+ *                 not be preserved by the caller for the lifetime of the
+ *                 SSL configuration.
+ *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
+ */
+int mbedtls_ssl_conf_psk_opaque( mbedtls_ssl_config *conf,
+                                 psa_key_id_t psk,
+                                 const unsigned char *psk_identity,
+                                 size_t psk_identity_len );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
 
 /**
- * \brief          Set the Pre Shared Key (PSK) for the current handshake
+ * \brief          Set the pre-shared Key (PSK) for the current handshake.
  *
  * \note           This should only be called inside the PSK callback,
- *                 ie the function passed to \c mbedtls_ssl_conf_psk_cb().
+ *                 i.e. the function passed to \c mbedtls_ssl_conf_psk_cb().
  *
- * \param ssl      SSL context
- * \param psk      pointer to the pre-shared key
- * \param psk_len  pre-shared key length
+ * \note           A PSK set by this function takes precedence over a PSK
+ *                 configured by \c mbedtls_ssl_conf_psk().
+ *
+ * \param ssl      The SSL context to configure a PSK for.
+ * \param psk      The pointer to the pre-shared key.
+ * \param psk_len  The length of the pre-shared key in bytes.
  *
- * \return         0 if successful or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
  */
 int mbedtls_ssl_set_hs_psk( mbedtls_ssl_context *ssl,
                             const unsigned char *psk, size_t psk_len );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief          Set an opaque pre-shared Key (PSK) for the current handshake.
+ *
+ * \note           This should only be called inside the PSK callback,
+ *                 i.e. the function passed to \c mbedtls_ssl_conf_psk_cb().
+ *
+ * \note           An opaque PSK set by this function takes precedence over an
+ *                 opaque PSK configured by \c mbedtls_ssl_conf_psk_opaque().
+ *
+ * \param ssl      The SSL context to configure a PSK for.
+ * \param psk      The identifier of the key slot holding the PSK.
+ *                 For the duration of the current handshake, the key slot
+ *                 must be populated with a key of type
+ *                 PSA_ALG_CATEGORY_KEY_DERIVATION whose policy allows its
+ *                 use for the key derivation algorithm
+ *                 applied in the handshake.
+  *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
+ */
+int mbedtls_ssl_set_hs_psk_opaque( mbedtls_ssl_context *ssl,
+                                   psa_key_id_t psk );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 /**
  * \brief          Set the PSK callback (server-side only).
  *
  *                 If set, the PSK callback is called for each
- *                 handshake where a PSK ciphersuite was negotiated.
+ *                 handshake where a PSK-based ciphersuite was negotiated.
  *                 The caller provides the identity received and wants to
  *                 receive the actual PSK data and length.
  *
- *                 The callback has the following parameters: (void *parameter,
- *                 mbedtls_ssl_context *ssl, const unsigned char *psk_identity,
- *                 size_t identity_len)
+ *                 The callback has the following parameters:
+ *                 - \c void*: The opaque pointer \p p_psk.
+ *                 - \c mbedtls_ssl_context*: The SSL context to which
+ *                                            the operation applies.
+ *                 - \c const unsigned char*: The PSK identity
+ *                                            selected by the client.
+ *                 - \c size_t: The length of the PSK identity
+ *                              selected by the client.
+ *
  *                 If a valid PSK identity is found, the callback should use
- *                 \c mbedtls_ssl_set_hs_psk() on the ssl context to set the
- *                 correct PSK and return 0.
+ *                 \c mbedtls_ssl_set_hs_psk() or
+ *                 \c mbedtls_ssl_set_hs_psk_opaque()
+ *                 on the SSL context to set the correct PSK and return \c 0.
  *                 Any other return value will result in a denied PSK identity.
  *
- * \note           If you set a PSK callback using this function, then you
- *                 don't need to set a PSK key and identity using
- *                 \c mbedtls_ssl_conf_psk().
- *
- * \param conf     SSL configuration
- * \param f_psk    PSK identity function
- * \param p_psk    PSK identity parameter
+ * \note           A dynamic PSK (i.e. set by the PSK callback) takes
+ *                 precedence over a static PSK (i.e. set by
+ *                 \c mbedtls_ssl_conf_psk() or
+ *                 \c mbedtls_ssl_conf_psk_opaque()).
+ *                 This means that if you set a PSK callback using this
+ *                 function, you don't need to set a PSK using
+ *                 \c mbedtls_ssl_conf_psk() or
+ *                 \c mbedtls_ssl_conf_psk_opaque()).
+ *
+ * \param conf     The SSL configuration to register the callback with.
+ * \param f_psk    The callback for selecting and setting the PSK based
+ *                 in the PSK identity chosen by the client.
+ * \param p_psk    A pointer to an opaque structure to be passed to
+ *                 the callback, for example a PSK store.
  */
 void mbedtls_ssl_conf_psk_cb( mbedtls_ssl_config *conf,
                      int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *,
                                   size_t),
                      void *p_psk );
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
 
 #if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_SRV_C)
 
@@ -2237,7 +3058,9 @@ void mbedtls_ssl_conf_dhm_min_bitlen( mbedtls_ssl_config *conf,
 #if defined(MBEDTLS_ECP_C)
 /**
  * \brief          Set the allowed curves in order of preference.
- *                 (Default: all defined curves in order of decreasing size.)
+ *                 (Default: all defined curves in order of decreasing size,
+ *                 except that Montgomery curves come last. This order
+ *                 is likely to change in a future version.)
  *
  *                 On server: this only affects selection of the ECDHE curve;
  *                 the curves used for ECDH and ECDSA are determined by the
@@ -2266,7 +3089,7 @@ void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
                               const mbedtls_ecp_group_id *curves );
 #endif /* MBEDTLS_ECP_C */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 /**
  * \brief          Set the allowed hashes for signatures during the handshake.
  *                 (Default: all SHA-2 hashes, largest first. Also SHA-1 if
@@ -2289,7 +3112,7 @@ void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
  */
 void mbedtls_ssl_conf_sig_hashes( mbedtls_ssl_config *conf,
                                   const int *hashes );
-#endif /* MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 /**
@@ -2437,6 +3260,105 @@ int mbedtls_ssl_conf_alpn_protocols( mbedtls_ssl_config *conf, const char **prot
 const char *mbedtls_ssl_get_alpn_protocol( const mbedtls_ssl_context *ssl );
 #endif /* MBEDTLS_SSL_ALPN */
 
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+#if defined(MBEDTLS_DEBUG_C)
+static inline const char *mbedtls_ssl_get_srtp_profile_as_string( mbedtls_ssl_srtp_profile profile )
+{
+    switch( profile )
+    {
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80:
+            return( "MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80" );
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32:
+            return( "MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32" );
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80:
+            return( "MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80" );
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32:
+            return( "MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32" );
+        default: break;
+    }
+    return( "" );
+}
+#endif /* MBEDTLS_DEBUG_C */
+/**
+ * \brief                   Manage support for mki(master key id) value
+ *                          in use_srtp extension.
+ *                          MKI is an optional part of SRTP used for key management
+ *                          and re-keying. See RFC3711 section 3.1 for details.
+ *                          The default value is
+ *                          #MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED.
+ *
+ * \param conf              The SSL configuration to manage mki support.
+ * \param support_mki_value Enable or disable mki usage. Values are
+ *                          #MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED
+ *                          or #MBEDTLS_SSL_DTLS_SRTP_MKI_SUPPORTED.
+ */
+void mbedtls_ssl_conf_srtp_mki_value_supported( mbedtls_ssl_config *conf,
+                                                int support_mki_value );
+
+/**
+ * \brief                   Set the supported DTLS-SRTP protection profiles.
+ *
+ * \param conf              SSL configuration
+ * \param profiles          Pointer to a List of MBEDTLS_TLS_SRTP_UNSET terminated
+ *                          supported protection profiles
+ *                          in decreasing preference order.
+ *                          The pointer to the list is recorded by the library
+ *                          for later reference as required, so the lifetime
+ *                          of the table must be at least as long as the lifetime
+ *                          of the SSL configuration structure.
+ *                          The list must not hold more than
+ *                          MBEDTLS_TLS_SRTP_MAX_PROFILE_LIST_LENGTH elements
+ *                          (excluding the terminating MBEDTLS_TLS_SRTP_UNSET).
+ *
+ * \return                  0 on success
+ * \return                  #MBEDTLS_ERR_SSL_BAD_INPUT_DATA when the list of
+ *                          protection profiles is incorrect.
+ */
+int mbedtls_ssl_conf_dtls_srtp_protection_profiles
+                               ( mbedtls_ssl_config *conf,
+                                 const mbedtls_ssl_srtp_profile *profiles );
+
+/**
+ * \brief                  Set the mki_value for the current DTLS-SRTP session.
+ *
+ * \param ssl              SSL context to use.
+ * \param mki_value        The MKI value to set.
+ * \param mki_len          The length of the MKI value.
+ *
+ * \note                   This function is relevant on client side only.
+ *                         The server discovers the mki value during handshake.
+ *                         A mki value set on server side using this function
+ *                         is ignored.
+ *
+ * \return                 0 on success
+ * \return                 #MBEDTLS_ERR_SSL_BAD_INPUT_DATA
+ * \return                 #MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE
+ */
+int mbedtls_ssl_dtls_srtp_set_mki_value( mbedtls_ssl_context *ssl,
+                                         unsigned char *mki_value,
+                                         uint16_t mki_len );
+/**
+ * \brief                  Get the negotiated DTLS-SRTP informations:
+ *                         Protection profile and MKI value.
+ *
+ * \warning                This function must be called after the handshake is
+ *                         completed. The value returned by this function must
+ *                         not be trusted or acted upon before the handshake completes.
+ *
+ * \param ssl              The SSL context to query.
+ * \param dtls_srtp_info   The negotiated DTLS-SRTP informations:
+ *                         - Protection profile in use.
+ *                         A direct mapping of the iana defined value for protection
+ *                         profile on an uint16_t.
+                   http://www.iana.org/assignments/srtp-protection/srtp-protection.xhtml
+ *                         #MBEDTLS_TLS_SRTP_UNSET if the use of SRTP was not negotiated
+ *                         or peer's Hello packet was not parsed yet.
+ *                         - mki size and value( if size is > 0 ).
+ */
+void mbedtls_ssl_get_dtls_srtp_negotiation_result( const mbedtls_ssl_context *ssl,
+                                                   mbedtls_dtls_srtp_info *dtls_srtp_info );
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
 /**
  * \brief          Set the maximum supported version sent from the client side
  *                 and/or accepted at the server side
@@ -2536,7 +3458,7 @@ void mbedtls_ssl_conf_extended_master_secret( mbedtls_ssl_config *conf, char ems
  * \warning        Use of RC4 in DTLS/TLS has been prohibited by RFC 7465
  *                 for security reasons. Use at your own risk.
  *
- * \note           This function is deprecated and will likely be removed in
+ * \note           This function is deprecated and will be removed in
  *                 a future version of the library.
  *                 RC4 is disabled by default at compile time and needs to be
  *                 actively enabled for use with legacy systems.
@@ -2577,14 +3499,14 @@ void mbedtls_ssl_conf_cert_req_ca_list( mbedtls_ssl_config *conf,
  *                 been set via this function to a value different than
  *                 #MBEDTLS_SSL_MAX_FRAG_LEN_NONE.
  *
- * \note           This sets the maximum length for a record's payload,
- *                 excluding record overhead that will be added to it, see
- *                 \c mbedtls_ssl_get_record_expansion().
- *
  * \note           With TLS, this currently only affects ApplicationData (sent
  *                 with \c mbedtls_ssl_read()), not handshake messages.
  *                 With DTLS, this affects both ApplicationData and handshake.
  *
+ * \note           This sets the maximum length for a record's payload,
+ *                 excluding record overhead that will be added to it, see
+ *                 \c mbedtls_ssl_get_record_expansion().
+ *
  * \note           For DTLS, it is also possible to set a limit for the total
  *                 size of daragrams passed to the transport layer, including
  *                 record overhead, see \c mbedtls_ssl_set_mtu().
@@ -2735,7 +3657,7 @@ void mbedtls_ssl_conf_renegotiation_enforced( mbedtls_ssl_config *conf, int max_
  *                 (Default: 2^48 - 1)
  *
  *                 Renegotiation is automatically triggered when a record
- *                 counter (outgoing or ingoing) crosses the defined
+ *                 counter (outgoing or incoming) crosses the defined
  *                 threshold. The default value is meant to prevent the
  *                 connection from being closed when the counter is about to
  *                 reached its maximal value (it is not allowed to wrap).
@@ -2865,18 +3787,61 @@ int mbedtls_ssl_get_record_expansion( const mbedtls_ssl_context *ssl );
 
 #if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
 /**
- * \brief          Return the maximum fragment length (payload, in bytes).
- *                 This is the value negotiated with peer if any,
- *                 or the locally configured value.
+ * \brief          Return the maximum fragment length (payload, in bytes) for
+ *                 the output buffer. For the client, this is the configured
+ *                 value. For the server, it is the minimum of two - the
+ *                 configured value and the negotiated one.
  *
  * \sa             mbedtls_ssl_conf_max_frag_len()
  * \sa             mbedtls_ssl_get_max_record_payload()
  *
  * \param ssl      SSL context
  *
- * \return         Current maximum fragment length.
+ * \return         Current maximum fragment length for the output buffer.
+ */
+size_t mbedtls_ssl_get_output_max_frag_len( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Return the maximum fragment length (payload, in bytes) for
+ *                 the input buffer. This is the negotiated maximum fragment
+ *                 length, or, if there is none, MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *                 If it is not defined either, the value is 2^14. This function
+ *                 works as its predecessor, \c mbedtls_ssl_get_max_frag_len().
+ *
+ * \sa             mbedtls_ssl_conf_max_frag_len()
+ * \sa             mbedtls_ssl_get_max_record_payload()
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Current maximum fragment length for the output buffer.
+ */
+size_t mbedtls_ssl_get_input_max_frag_len( const mbedtls_ssl_context *ssl );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
+/**
+ * \brief          This function is a deprecated approach to getting the max
+ *                 fragment length. Its an alias for
+ *                 \c mbedtls_ssl_get_output_max_frag_len(), as the behaviour
+ *                 is the same. See \c mbedtls_ssl_get_output_max_frag_len() for
+ *                 more detail.
+ *
+ * \sa             mbedtls_ssl_get_input_max_frag_len()
+ * \sa             mbedtls_ssl_get_output_max_frag_len()
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Current maximum fragment length for the output buffer.
  */
-size_t mbedtls_ssl_get_max_frag_len( const mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED size_t mbedtls_ssl_get_max_frag_len(
+                                        const mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
 #endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
 
 /**
@@ -2897,7 +3862,8 @@ size_t mbedtls_ssl_get_max_frag_len( const mbedtls_ssl_context *ssl );
  *                 when record compression is enabled.
  *
  * \sa             mbedtls_ssl_set_mtu()
- * \sa             mbedtls_ssl_get_max_frag_len()
+ * \sa             mbedtls_ssl_get_output_max_frag_len()
+ * \sa             mbedtls_ssl_get_input_max_frag_len()
  * \sa             mbedtls_ssl_get_record_expansion()
  *
  * \param ssl      SSL context
@@ -2909,18 +3875,34 @@ int mbedtls_ssl_get_max_out_record_payload( const mbedtls_ssl_context *ssl );
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 /**
- * \brief          Return the peer certificate from the current connection
- *
- *                 Note: Can be NULL in case no certificate was sent during
- *                 the handshake. Different calls for the same connection can
- *                 return the same or different pointers for the same
- *                 certificate and even a different certificate altogether.
- *                 The peer cert CAN change in a single connection if
- *                 renegotiation is performed.
- *
- * \param ssl      SSL context
- *
- * \return         the current peer certificate
+ * \brief          Return the peer certificate from the current connection.
+ *
+ * \param  ssl     The SSL context to use. This must be initialized and setup.
+ *
+ * \return         The current peer certificate, if available.
+ *                 The returned certificate is owned by the SSL context and
+ *                 is valid only until the next call to the SSL API.
+ * \return         \c NULL if no peer certificate is available. This might
+ *                 be because the chosen ciphersuite doesn't use CRTs
+ *                 (PSK-based ciphersuites, for example), or because
+ *                 #MBEDTLS_SSL_KEEP_PEER_CERTIFICATE has been disabled,
+ *                 allowing the stack to free the peer's CRT to save memory.
+ *
+ * \note           For one-time inspection of the peer's certificate during
+ *                 the handshake, consider registering an X.509 CRT verification
+ *                 callback through mbedtls_ssl_conf_verify() instead of calling
+ *                 this function. Using mbedtls_ssl_conf_verify() also comes at
+ *                 the benefit of allowing you to influence the verification
+ *                 process, for example by masking expected and tolerated
+ *                 verification failures.
+ *
+ * \warning        You must not use the pointer returned by this function
+ *                 after any further call to the SSL API, including
+ *                 mbedtls_ssl_read() and mbedtls_ssl_write(); this is
+ *                 because the pointer might change during renegotiation,
+ *                 which happens transparently to the user.
+ *                 If you want to use the certificate across API calls,
+ *                 you must make a copy.
  */
 const mbedtls_x509_crt *mbedtls_ssl_get_peer_cert( const mbedtls_ssl_context *ssl );
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
@@ -3065,7 +4047,14 @@ int mbedtls_ssl_renegotiate( mbedtls_ssl_context *ssl );
  *
  * \return         The (positive) number of bytes read if successful.
  * \return         \c 0 if the read end of the underlying transport was closed
- *                 - in this case you must stop using the context (see below).
+ *                 without sending a CloseNotify beforehand, which might happen
+ *                 because of various reasons (internal error of an underlying
+ *                 stack, non-conformant peer not sending a CloseNotify and
+ *                 such) - in this case you must stop using the context
+ *                 (see below).
+ * \return         #MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY if the underlying
+ *                 transport is still functional, but the peer has
+ *                 acknowledged to not send anything anymore.
  * \return         #MBEDTLS_ERR_SSL_WANT_READ or #MBEDTLS_ERR_SSL_WANT_WRITE
  *                 if the handshake is incomplete and waiting for data to
  *                 be available for reading from or writing to the underlying
@@ -3182,8 +4171,8 @@ int mbedtls_ssl_read( mbedtls_ssl_context *ssl, unsigned char *buf, size_t len )
  *                 or negotiated with the peer), then:
  *                 - with TLS, less bytes than requested are written.
  *                 - with DTLS, MBEDTLS_ERR_SSL_BAD_INPUT_DATA is returned.
- *                 \c mbedtls_ssl_get_max_frag_len() may be used to query the
- *                 active maximum fragment length.
+ *                 \c mbedtls_ssl_get_output_max_frag_len() may be used to
+ *                 query the active maximum fragment length.
  *
  * \note           Attempting to write 0 bytes will result in an empty TLS
  *                 application record being sent.
@@ -3231,6 +4220,130 @@ int mbedtls_ssl_close_notify( mbedtls_ssl_context *ssl );
  */
 void mbedtls_ssl_free( mbedtls_ssl_context *ssl );
 
+#if defined(MBEDTLS_SSL_CONTEXT_SERIALIZATION)
+/**
+ * \brief          Save an active connection as serialized data in a buffer.
+ *                 This allows the freeing or re-using of the SSL context
+ *                 while still picking up the connection later in a way that
+ *                 it entirely transparent to the peer.
+ *
+ * \see            mbedtls_ssl_context_load()
+ *
+ * \note           This feature is currently only available under certain
+ *                 conditions, see the documentation of the return value
+ *                 #MBEDTLS_ERR_SSL_BAD_INPUT_DATA for details.
+ *
+ * \note           When this function succeeds, it calls
+ *                 mbedtls_ssl_session_reset() on \p ssl which as a result is
+ *                 no longer associated with the connection that has been
+ *                 serialized. This avoids creating copies of the connection
+ *                 state. You're then free to either re-use the context
+ *                 structure for a different connection, or call
+ *                 mbedtls_ssl_free() on it. See the documentation of
+ *                 mbedtls_ssl_session_reset() for more details.
+ *
+ * \param ssl      The SSL context to save. On success, it is no longer
+ *                 associated with the connection that has been serialized.
+ * \param buf      The buffer to write the serialized data to. It must be a
+ *                 writeable buffer of at least \p buf_len bytes, or may be \c
+ *                 NULL if \p buf_len is \c 0.
+ * \param buf_len  The number of bytes available for writing in \p buf.
+ * \param olen     The size in bytes of the data that has been or would have
+ *                 been written. It must point to a valid \c size_t.
+ *
+ * \note           \p olen is updated to the correct value regardless of
+ *                 whether \p buf_len was large enough. This makes it possible
+ *                 to determine the necessary size by calling this function
+ *                 with \p buf set to \c NULL and \p buf_len to \c 0. However,
+ *                 the value of \p olen is only guaranteed to be correct when
+ *                 the function returns #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL or
+ *                 \c 0. If the return value is different, then the value of
+ *                 \p olen is undefined.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL if \p buf is too small.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed
+ *                 while reseting the context.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if a handshake is in
+ *                 progress, or there is pending data for reading or sending,
+ *                 or the connection does not use DTLS 1.2 with an AEAD
+ *                 ciphersuite, or renegotiation is enabled.
+ */
+int mbedtls_ssl_context_save( mbedtls_ssl_context *ssl,
+                              unsigned char *buf,
+                              size_t buf_len,
+                              size_t *olen );
+
+/**
+ * \brief          Load serialized connection data to an SSL context.
+ *
+ * \see            mbedtls_ssl_context_save()
+ *
+ * \warning        The same serialized data must never be loaded into more
+ *                 that one context. In order to ensure that, after
+ *                 successfully loading serialized data to an SSL context, you
+ *                 should immediately destroy or invalidate all copies of the
+ *                 serialized data that was loaded. Loading the same data in
+ *                 more than one context would cause severe security failures
+ *                 including but not limited to loss of confidentiality.
+ *
+ * \note           Before calling this function, the SSL context must be
+ *                 prepared in one of the two following ways. The first way is
+ *                 to take a context freshly initialised with
+ *                 mbedtls_ssl_init() and call mbedtls_ssl_setup() on it with
+ *                 the same ::mbedtls_ssl_config structure that was used in
+ *                 the original connection. The second way is to
+ *                 call mbedtls_ssl_session_reset() on a context that was
+ *                 previously prepared as above but used in the meantime.
+ *                 Either way, you must not use the context to perform a
+ *                 handshake between calling mbedtls_ssl_setup() or
+ *                 mbedtls_ssl_session_reset() and calling this function. You
+ *                 may however call other setter functions in that time frame
+ *                 as indicated in the note below.
+ *
+ * \note           Before or after calling this function successfully, you
+ *                 also need to configure some connection-specific callbacks
+ *                 and settings before you can use the connection again
+ *                 (unless they were already set before calling
+ *                 mbedtls_ssl_session_reset() and the values are suitable for
+ *                 the present connection). Specifically, you want to call
+ *                 at least mbedtls_ssl_set_bio() and
+ *                 mbedtls_ssl_set_timer_cb(). All other SSL setter functions
+ *                 are not necessary to call, either because they're only used
+ *                 in handshakes, or because the setting is already saved. You
+ *                 might choose to call them anyway, for example in order to
+ *                 share code between the cases of establishing a new
+ *                 connection and the case of loading an already-established
+ *                 connection.
+ *
+ * \note           If you have new information about the path MTU, you want to
+ *                 call mbedtls_ssl_set_mtu() after calling this function, as
+ *                 otherwise this function would overwrite your
+ *                 newly-configured value with the value that was active when
+ *                 the context was saved.
+ *
+ * \note           When this function returns an error code, it calls
+ *                 mbedtls_ssl_free() on \p ssl. In this case, you need to
+ *                 prepare the context with the usual sequence starting with a
+ *                 call to mbedtls_ssl_init() if you want to use it again.
+ *
+ * \param ssl      The SSL context structure to be populated. It must have
+ *                 been prepared as described in the note above.
+ * \param buf      The buffer holding the serialized connection data. It must
+ *                 be a readable buffer of at least \p len bytes.
+ * \param len      The size of the serialized data in bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed.
+ * \return         #MBEDTLS_ERR_SSL_VERSION_MISMATCH if the serialized data
+ *                 comes from a different Mbed TLS version or build.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if input data is invalid.
+ */
+int mbedtls_ssl_context_load( mbedtls_ssl_context *ssl,
+                              const unsigned char *buf,
+                              size_t len );
+#endif /* MBEDTLS_SSL_CONTEXT_SERIALIZATION */
+
 /**
  * \brief          Initialize an SSL configuration context
  *                 Just makes the context ready for
@@ -3286,6 +4399,27 @@ void mbedtls_ssl_session_init( mbedtls_ssl_session *session );
  */
 void mbedtls_ssl_session_free( mbedtls_ssl_session *session );
 
+/**
+ * \brief          TLS-PRF function for key derivation.
+ *
+ * \param prf      The tls_prf type function type to be used.
+ * \param secret   Secret for the key derivation function.
+ * \param slen     Length of the secret.
+ * \param label    String label for the key derivation function,
+ *                 terminated with null character.
+ * \param random   Random bytes.
+ * \param rlen     Length of the random bytes buffer.
+ * \param dstbuf   The buffer holding the derived key.
+ * \param dlen     Length of the output buffer.
+ *
+ * \return         0 on success. An SSL specific error on failure.
+ */
+int  mbedtls_ssl_tls_prf( const mbedtls_tls_prf_types prf,
+                          const unsigned char *secret, size_t slen,
+                          const char *label,
+                          const unsigned char *random, size_t rlen,
+                          unsigned char *dstbuf, size_t dlen );
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h
index 612d81776ef..c6ef2960f4d 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_CACHE_H
 #define MBEDTLS_SSL_CACHE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /**
@@ -95,7 +68,8 @@ struct mbedtls_ssl_cache_entry
     mbedtls_time_t timestamp;           /*!< entry timestamp    */
 #endif
     mbedtls_ssl_session session;        /*!< entry session      */
-#if defined(MBEDTLS_X509_CRT_PARSE_C)
+#if defined(MBEDTLS_X509_CRT_PARSE_C) && \
+    defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
     mbedtls_x509_buf peer_cert;         /*!< entry peer_cert    */
 #endif
     mbedtls_ssl_cache_entry *next;      /*!< chain pointer      */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h
index ab8e601db71..93c32a5edac 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,40 +18,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_CIPHERSUITES_H
 #define MBEDTLS_SSL_CIPHERSUITES_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "pk.h"
-#include "cipher.h"
-#include "md.h"
+#include "mbedtls/pk.h"
+#include "mbedtls/cipher.h"
+#include "mbedtls/md.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -337,7 +310,7 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED)      || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED
 #endif
 
 /* Key exchanges allowing client certificate requests */
@@ -347,28 +320,28 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     ||       \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)    ||       \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__CERT_REQ_ALLOWED__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_CERT_REQ_ALLOWED_ENABLED
 #endif
 
 /* Key exchanges involving server signature in ServerKeyExchange */
 #if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED
 #endif
 
 /* Key exchanges using ECDH */
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED)      || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED
 #endif
 
 /* Key exchanges that don't involve ephemeral keys */
 #if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED)           || \
     defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED)           || \
     defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
-    defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED
+    defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED
 #endif
 
 /* Key exchanges that involve ephemeral keys */
@@ -378,7 +351,7 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)     || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)   || \
     defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED
 #endif
 
 /* Key exchanges using a PSK */
@@ -386,20 +359,20 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED
 #endif
 
 /* Key exchanges using DHE */
 #if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED
 #endif
 
 /* Key exchanges using ECDHE */
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)   || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED
 #endif
 
 typedef struct mbedtls_ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t;
@@ -442,7 +415,7 @@ mbedtls_pk_type_t mbedtls_ssl_get_ciphersuite_sig_alg( const mbedtls_ssl_ciphers
 int mbedtls_ssl_ciphersuite_uses_ec( const mbedtls_ssl_ciphersuite_t *info );
 int mbedtls_ssl_ciphersuite_uses_psk( const mbedtls_ssl_ciphersuite_t *info );
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_has_pfs( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -459,9 +432,9 @@ static inline int mbedtls_ssl_ciphersuite_has_pfs( const mbedtls_ssl_ciphersuite
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_no_pfs( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -477,9 +450,9 @@ static inline int mbedtls_ssl_ciphersuite_no_pfs( const mbedtls_ssl_ciphersuite_
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_ecdh( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -492,7 +465,7 @@ static inline int mbedtls_ssl_ciphersuite_uses_ecdh( const mbedtls_ssl_ciphersui
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED */
 
 static inline int mbedtls_ssl_ciphersuite_cert_req_allowed( const mbedtls_ssl_ciphersuite_t *info )
 {
@@ -511,7 +484,25 @@ static inline int mbedtls_ssl_ciphersuite_cert_req_allowed( const mbedtls_ssl_ci
     }
 }
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_uses_srv_cert( const mbedtls_ssl_ciphersuite_t *info )
+{
+    switch( info->key_exchange )
+    {
+        case MBEDTLS_KEY_EXCHANGE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_RSA_PSK:
+        case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+            return( 1 );
+
+        default:
+            return( 0 );
+    }
+}
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_dhe( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -524,9 +515,9 @@ static inline int mbedtls_ssl_ciphersuite_uses_dhe( const mbedtls_ssl_ciphersuit
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED) */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED) */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_ecdhe( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -540,9 +531,9 @@ static inline int mbedtls_ssl_ciphersuite_uses_ecdhe( const mbedtls_ssl_ciphersu
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED) */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED) */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_server_signature( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -556,7 +547,7 @@ static inline int mbedtls_ssl_ciphersuite_uses_server_signature( const mbedtls_s
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED */
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h
index 9c2d5b62a43..0a238708e59 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_COOKIE_H
 #define MBEDTLS_SSL_COOKIE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /**
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h
index 6ba6c2af09d..6913dc0f668 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,60 +18,48 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_INTERNAL_H
 #define MBEDTLS_SSL_INTERNAL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
-#include "cipher.h"
+#include "mbedtls/ssl.h"
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif
 
 #if defined(MBEDTLS_MD5_C)
-#include "md5.h"
+#include "mbedtls/md5.h"
 #endif
 
 #if defined(MBEDTLS_SHA1_C)
-#include "sha1.h"
+#include "mbedtls/sha1.h"
 #endif
 
 #if defined(MBEDTLS_SHA256_C)
-#include "sha256.h"
+#include "mbedtls/sha256.h"
 #endif
 
 #if defined(MBEDTLS_SHA512_C)
-#include "sha512.h"
+#include "mbedtls/sha512.h"
 #endif
 
 #if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
-#include "ecjpake.h"
+#include "mbedtls/ecjpake.h"
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#include "mbedtls/psa_util.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 #if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
     !defined(inline) && !defined(__cplusplus)
 #define inline __inline
@@ -129,7 +111,7 @@
     defined(MBEDTLS_SSL_CLI_C) && \
     defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
-#define MBEDTLS_SSL__ECP_RESTARTABLE
+#define MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED
 #endif
 
 #define MBEDTLS_SSL_INITIAL_HANDSHAKE           0
@@ -150,6 +132,18 @@
 #define MBEDTLS_SSL_RETRANS_WAITING         2
 #define MBEDTLS_SSL_RETRANS_FINISHED        3
 
+/*
+ * Allow extra bytes for record, authentication and encryption overhead:
+ * counter (8) + header (5) + IV(16) + MAC (16-48) + padding (0-256)
+ * and allow for a maximum of 1024 of compression expansion if
+ * enabled.
+ */
+#if defined(MBEDTLS_ZLIB_SUPPORT)
+#define MBEDTLS_SSL_COMPRESSION_ADD          1024
+#else
+#define MBEDTLS_SSL_COMPRESSION_ADD             0
+#endif
+
 /* This macro determines whether CBC is supported. */
 #if defined(MBEDTLS_CIPHER_MODE_CBC) &&                               \
     ( defined(MBEDTLS_AES_C)      ||                                  \
@@ -168,19 +162,12 @@
 #define MBEDTLS_SSL_SOME_SUITES_USE_TLS_CBC
 #endif
 
-/*
- * Allow extra bytes for record, authentication and encryption overhead:
- * counter (8) + header (5) + IV(16) + MAC (16-48) + padding (0-256)
- * and allow for a maximum of 1024 of compression expansion if
- * enabled.
- */
-#if defined(MBEDTLS_ZLIB_SUPPORT)
-#define MBEDTLS_SSL_COMPRESSION_ADD          1024
-#else
-#define MBEDTLS_SSL_COMPRESSION_ADD             0
+#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_NULL_CIPHER) ||   \
+    defined(MBEDTLS_SSL_SOME_SUITES_USE_CBC)
+#define MBEDTLS_SSL_SOME_MODES_USE_MAC
 #endif
 
-#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_MODE_CBC)
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
 /* Ciphersuites using HMAC */
 #if defined(MBEDTLS_SHA512_C)
 #define MBEDTLS_SSL_MAC_ADD                 48  /* SHA-384 used for HMAC */
@@ -189,7 +176,7 @@
 #else
 #define MBEDTLS_SSL_MAC_ADD                 20  /* SHA-1   used for HMAC */
 #endif
-#else
+#else /* MBEDTLS_SSL_SOME_MODES_USE_MAC */
 /* AEAD ciphersuites: GCM and CCM use a 128 bits tag */
 #define MBEDTLS_SSL_MAC_ADD                 16
 #endif
@@ -200,10 +187,17 @@
 #define MBEDTLS_SSL_PADDING_ADD              0
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+#define MBEDTLS_SSL_MAX_CID_EXPANSION      MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#else
+#define MBEDTLS_SSL_MAX_CID_EXPANSION        0
+#endif
+
 #define MBEDTLS_SSL_PAYLOAD_OVERHEAD ( MBEDTLS_SSL_COMPRESSION_ADD +    \
                                        MBEDTLS_MAX_IV_LENGTH +          \
                                        MBEDTLS_SSL_MAC_ADD +            \
-                                       MBEDTLS_SSL_PADDING_ADD          \
+                                       MBEDTLS_SSL_PADDING_ADD +        \
+                                       MBEDTLS_SSL_MAX_CID_EXPANSION    \
                                        )
 
 #define MBEDTLS_SSL_IN_PAYLOAD_LEN ( MBEDTLS_SSL_PAYLOAD_OVERHEAD + \
@@ -262,11 +256,49 @@
    implicit sequence number. */
 #define MBEDTLS_SSL_HEADER_LEN 13
 
+#if !defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
 #define MBEDTLS_SSL_IN_BUFFER_LEN  \
     ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_IN_PAYLOAD_LEN ) )
+#else
+#define MBEDTLS_SSL_IN_BUFFER_LEN  \
+    ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_IN_PAYLOAD_LEN ) \
+      + ( MBEDTLS_SSL_CID_IN_LEN_MAX ) )
+#endif
 
+#if !defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
 #define MBEDTLS_SSL_OUT_BUFFER_LEN  \
     ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_OUT_PAYLOAD_LEN ) )
+#else
+#define MBEDTLS_SSL_OUT_BUFFER_LEN                               \
+    ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_OUT_PAYLOAD_LEN )    \
+      + ( MBEDTLS_SSL_CID_OUT_LEN_MAX ) )
+#endif
+
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+static inline size_t mbedtls_ssl_get_output_buflen( const mbedtls_ssl_context *ctx )
+{
+#if defined (MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    return mbedtls_ssl_get_output_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD
+               + MBEDTLS_SSL_CID_OUT_LEN_MAX;
+#else
+    return mbedtls_ssl_get_output_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD;
+#endif
+}
+
+static inline size_t mbedtls_ssl_get_input_buflen( const mbedtls_ssl_context *ctx )
+{
+#if defined (MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    return mbedtls_ssl_get_input_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD
+               + MBEDTLS_SSL_CID_IN_LEN_MAX;
+#else
+    return mbedtls_ssl_get_input_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD;
+#endif
+}
+#endif
 
 #ifdef MBEDTLS_ZLIB_SUPPORT
 /* Compression buffer holds both IN and OUT buffers, so should be size of the larger */
@@ -325,7 +357,7 @@ extern "C" {
 #endif
 
 #if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
-    defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 /*
  * Abstraction for a grid of allowed signature-hash-algorithm pairs.
  */
@@ -340,7 +372,54 @@ struct mbedtls_ssl_sig_hash_set_t
     mbedtls_md_type_t ecdsa;
 };
 #endif /* MBEDTLS_SSL_PROTO_TLS1_2 &&
-          MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+          MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
+
+typedef int  mbedtls_ssl_tls_prf_cb( const unsigned char *secret, size_t slen,
+                                     const char *label,
+                                     const unsigned char *random, size_t rlen,
+                                     unsigned char *dstbuf, size_t dlen );
+
+/* cipher.h exports the maximum IV, key and block length from
+ * all ciphers enabled in the config, regardless of whether those
+ * ciphers are actually usable in SSL/TLS. Notably, XTS is enabled
+ * in the default configuration and uses 64 Byte keys, but it is
+ * not used for record protection in SSL/TLS.
+ *
+ * In order to prevent unnecessary inflation of key structures,
+ * we introduce SSL-specific variants of the max-{key,block,IV}
+ * macros here which are meant to only take those ciphers into
+ * account which can be negotiated in SSL/TLS.
+ *
+ * Since the current definitions of MBEDTLS_MAX_{KEY|BLOCK|IV}_LENGTH
+ * in cipher.h are rough overapproximations of the real maxima, here
+ * we content ourselves with replicating those overapproximations
+ * for the maximum block and IV length, and excluding XTS from the
+ * computation of the maximum key length. */
+#define MBEDTLS_SSL_MAX_BLOCK_LENGTH 16
+#define MBEDTLS_SSL_MAX_IV_LENGTH    16
+#define MBEDTLS_SSL_MAX_KEY_LENGTH   32
+
+/**
+ * \brief   The data structure holding the cryptographic material (key and IV)
+ *          used for record protection in TLS 1.3.
+ */
+struct mbedtls_ssl_key_set
+{
+    /*! The key for client->server records. */
+    unsigned char client_write_key[ MBEDTLS_SSL_MAX_KEY_LENGTH ];
+    /*! The key for server->client records. */
+    unsigned char server_write_key[ MBEDTLS_SSL_MAX_KEY_LENGTH ];
+    /*! The IV  for client->server records. */
+    unsigned char client_write_iv[ MBEDTLS_SSL_MAX_IV_LENGTH ];
+    /*! The IV  for server->client records. */
+    unsigned char server_write_iv[ MBEDTLS_SSL_MAX_IV_LENGTH ];
+
+    size_t key_len; /*!< The length of client_write_key and
+                     *   server_write_key, in Bytes. */
+    size_t iv_len;  /*!< The length of client_write_iv and
+                     *   server_write_iv, in Bytes. */
+};
+typedef struct mbedtls_ssl_key_set mbedtls_ssl_key_set;
 
 /*
  * This structure contains the parameters only needed during handshake.
@@ -351,16 +430,80 @@ struct mbedtls_ssl_handshake_params
      * Handshake specific crypto variables
      */
 
-#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
-    defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+    uint8_t max_major_ver;              /*!< max. major version client*/
+    uint8_t max_minor_ver;              /*!< max. minor version client*/
+    uint8_t resume;                     /*!<  session resume indicator*/
+    uint8_t cli_exts;                   /*!< client extension presence*/
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C) &&        \
+    defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
+    uint8_t sni_authmode;               /*!< authmode from SNI callback     */
+#endif
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS)
+    uint8_t new_session_ticket;         /*!< use NewSessionTicket?    */
+#endif /* MBEDTLS_SSL_SESSION_TICKETS */
+
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+    uint8_t extended_ms;                /*!< use Extended Master Secret? */
+#endif
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+    uint8_t async_in_progress;          /*!< an asynchronous operation is in progress */
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    unsigned char retransmit_state;     /*!<  Retransmission state           */
+#endif
+
+#if defined(MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED)
+    uint8_t ecrs_enabled;               /*!< Handshake supports EC restart? */
+    enum { /* this complements ssl->state with info on intra-state operations */
+        ssl_ecrs_none = 0,              /*!< nothing going on (yet)         */
+        ssl_ecrs_crt_verify,            /*!< Certificate: crt_verify()      */
+        ssl_ecrs_ske_start_processing,  /*!< ServerKeyExchange: pk_verify() */
+        ssl_ecrs_cke_ecdh_calc_secret,  /*!< ClientKeyExchange: ECDH step 2 */
+        ssl_ecrs_crt_vrfy_sign,         /*!< CertificateVerify: pk_sign()   */
+    } ecrs_state;                       /*!< current (or last) operation    */
+    mbedtls_x509_crt *ecrs_peer_cert;   /*!< The peer's CRT chain.          */
+    size_t ecrs_n;                      /*!< place for saving a length      */
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2) &&                \
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
     mbedtls_ssl_sig_hash_set_t hash_algs;             /*!<  Set of suitable sig-hash pairs */
 #endif
+
+    size_t pmslen;                      /*!<  premaster length        */
+
+    mbedtls_ssl_ciphersuite_t const *ciphersuite_info;
+
+    void (*update_checksum)(mbedtls_ssl_context *, const unsigned char *, size_t);
+    void (*calc_verify)(const mbedtls_ssl_context *, unsigned char *, size_t *);
+    void (*calc_finished)(mbedtls_ssl_context *, unsigned char *, int);
+    mbedtls_ssl_tls_prf_cb *tls_prf;
+
 #if defined(MBEDTLS_DHM_C)
     mbedtls_dhm_context dhm_ctx;                /*!<  DHM key exchange        */
 #endif
-#if defined(MBEDTLS_ECDH_C)
+
+/* Adding guard for MBEDTLS_ECDSA_C to ensure no compile errors due
+ * to guards also being in ssl_srv.c and ssl_cli.c. There is a gap
+ * in functionality that access to ecdh_ctx structure is needed for
+ * MBEDTLS_ECDSA_C which does not seem correct.
+ */
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C)
     mbedtls_ecdh_context ecdh_ctx;              /*!<  ECDH key exchange       */
-#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_type_t ecdh_psa_type;
+    uint16_t ecdh_bits;
+    psa_key_id_t ecdh_psa_privkey;
+    unsigned char ecdh_psa_peerkey[MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH];
+    size_t ecdh_psa_peerkey_len;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C */
+
 #if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
     mbedtls_ecjpake_context ecjpake_ctx;        /*!< EC J-PAKE key exchange */
 #if defined(MBEDTLS_SSL_CLI_C)
@@ -368,56 +511,39 @@ struct mbedtls_ssl_handshake_params
     size_t ecjpake_cache_len;                   /*!< Length of cached data */
 #endif
 #endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */
-#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \
+
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) ||      \
     defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
     const mbedtls_ecp_curve_info **curves;      /*!<  Supported elliptic curves */
 #endif
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_id_t psk_opaque;            /*!< Opaque PSK from the callback   */
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
     unsigned char *psk;                 /*!<  PSK from the callback         */
     size_t psk_len;                     /*!<  Length of PSK from callback   */
-#endif
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
     mbedtls_ssl_key_cert *key_cert;     /*!< chosen key/cert pair (server)  */
 #if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
-    int sni_authmode;                   /*!< authmode from SNI callback     */
     mbedtls_ssl_key_cert *sni_key_cert; /*!< key/cert list from SNI         */
     mbedtls_x509_crt *sni_ca_chain;     /*!< trusted CAs from SNI callback  */
     mbedtls_x509_crl *sni_ca_crl;       /*!< trusted CAs CRLs from SNI      */
 #endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
-#if defined(MBEDTLS_SSL__ECP_RESTARTABLE)
-    int ecrs_enabled;                   /*!< Handshake supports EC restart? */
+
+#if defined(MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED)
     mbedtls_x509_crt_restart_ctx ecrs_ctx;  /*!< restart context            */
-    enum { /* this complements ssl->state with info on intra-state operations */
-        ssl_ecrs_none = 0,              /*!< nothing going on (yet)         */
-        ssl_ecrs_crt_verify,            /*!< Certificate: crt_verify()      */
-        ssl_ecrs_ske_start_processing,  /*!< ServerKeyExchange: pk_verify() */
-        ssl_ecrs_cke_ecdh_calc_secret,  /*!< ClientKeyExchange: ECDH step 2 */
-        ssl_ecrs_crt_vrfy_sign,         /*!< CertificateVerify: pk_sign()   */
-    } ecrs_state;                       /*!< current (or last) operation    */
-    size_t ecrs_n;                      /*!< place for saving a length      */
 #endif
-#if defined(MBEDTLS_SSL_PROTO_DTLS)
-    unsigned int out_msg_seq;           /*!<  Outgoing handshake sequence number */
-    unsigned int in_msg_seq;            /*!<  Incoming handshake sequence number */
-
-    unsigned char *verify_cookie;       /*!<  Cli: HelloVerifyRequest cookie
-                                              Srv: unused                    */
-    unsigned char verify_cookie_len;    /*!<  Cli: cookie length
-                                              Srv: flag for sending a cookie */
 
-    uint32_t retransmit_timeout;        /*!<  Current value of timeout       */
-    unsigned char retransmit_state;     /*!<  Retransmission state           */
-    mbedtls_ssl_flight_item *flight;    /*!<  Current outgoing flight        */
-    mbedtls_ssl_flight_item *cur_msg;   /*!<  Current message in flight      */
-    unsigned char *cur_msg_p;           /*!<  Position in current message    */
-    unsigned int in_flight_start_seq;   /*!<  Minimum message sequence in the
-                                              flight being received          */
-    mbedtls_ssl_transform *alt_transform_out;   /*!<  Alternative transform for
-                                              resending messages             */
-    unsigned char alt_out_ctr[8];       /*!<  Alternative record epoch/counter
-                                              for resending messages         */
+#if defined(MBEDTLS_X509_CRT_PARSE_C) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+    mbedtls_pk_context peer_pubkey;     /*!< The public key from the peer.  */
+#endif /* MBEDTLS_X509_CRT_PARSE_C && !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
 
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
     struct
     {
         size_t total_bytes_buffered; /*!< Cumulative size of heap allocated
@@ -444,6 +570,37 @@ struct mbedtls_ssl_handshake_params
 
     } buffering;
 
+    unsigned int out_msg_seq;           /*!<  Outgoing handshake sequence number */
+    unsigned int in_msg_seq;            /*!<  Incoming handshake sequence number */
+
+    unsigned char *verify_cookie;       /*!<  Cli: HelloVerifyRequest cookie
+                                              Srv: unused                    */
+    unsigned char verify_cookie_len;    /*!<  Cli: cookie length
+                                              Srv: flag for sending a cookie */
+
+    uint32_t retransmit_timeout;        /*!<  Current value of timeout       */
+    mbedtls_ssl_flight_item *flight;    /*!<  Current outgoing flight        */
+    mbedtls_ssl_flight_item *cur_msg;   /*!<  Current message in flight      */
+    unsigned char *cur_msg_p;           /*!<  Position in current message    */
+    unsigned int in_flight_start_seq;   /*!<  Minimum message sequence in the
+                                              flight being received          */
+    mbedtls_ssl_transform *alt_transform_out;   /*!<  Alternative transform for
+                                              resending messages             */
+    unsigned char alt_out_ctr[8];       /*!<  Alternative record epoch/counter
+                                              for resending messages         */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    /* The state of CID configuration in this handshake. */
+
+    uint8_t cid_in_use; /*!< This indicates whether the use of the CID extension
+                         *   has been negotiated. Possible values are
+                         *   #MBEDTLS_SSL_CID_ENABLED and
+                         *   #MBEDTLS_SSL_CID_DISABLED. */
+    unsigned char peer_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ]; /*! The peer's CID */
+    uint8_t peer_cid_len;                                  /*!< The length of
+                                                            *   \c peer_cid.  */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
     uint16_t mtu;                       /*!<  Handshake mtu, used to fragment outgoing messages */
 #endif /* MBEDTLS_SSL_PROTO_DTLS */
 
@@ -452,47 +609,30 @@ struct mbedtls_ssl_handshake_params
      */
 #if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \
     defined(MBEDTLS_SSL_PROTO_TLS1_1)
-       mbedtls_md5_context fin_md5;
-      mbedtls_sha1_context fin_sha1;
+    mbedtls_md5_context fin_md5;
+    mbedtls_sha1_context fin_sha1;
 #endif
 #if defined(MBEDTLS_SSL_PROTO_TLS1_2)
 #if defined(MBEDTLS_SHA256_C)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_hash_operation_t fin_sha256_psa;
+#else
     mbedtls_sha256_context fin_sha256;
 #endif
+#endif
 #if defined(MBEDTLS_SHA512_C)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_hash_operation_t fin_sha384_psa;
+#else
     mbedtls_sha512_context fin_sha512;
 #endif
+#endif
 #endif /* MBEDTLS_SSL_PROTO_TLS1_2 */
 
-    void (*update_checksum)(mbedtls_ssl_context *, const unsigned char *, size_t);
-    void (*calc_verify)(mbedtls_ssl_context *, unsigned char *);
-    void (*calc_finished)(mbedtls_ssl_context *, unsigned char *, int);
-    int  (*tls_prf)(const unsigned char *, size_t, const char *,
-                    const unsigned char *, size_t,
-                    unsigned char *, size_t);
-
-    size_t pmslen;                      /*!<  premaster length        */
-
     unsigned char randbytes[64];        /*!<  random bytes            */
     unsigned char premaster[MBEDTLS_PREMASTER_SIZE];
                                         /*!<  premaster secret        */
 
-    int resume;                         /*!<  session resume indicator*/
-    int max_major_ver;                  /*!< max. major version client*/
-    int max_minor_ver;                  /*!< max. minor version client*/
-    int cli_exts;                       /*!< client extension presence*/
-
-#if defined(MBEDTLS_SSL_SESSION_TICKETS)
-    int new_session_ticket;             /*!< use NewSessionTicket?    */
-#endif /* MBEDTLS_SSL_SESSION_TICKETS */
-#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
-    int extended_ms;                    /*!< use Extended Master Secret? */
-#endif
-
-#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
-    unsigned int async_in_progress : 1; /*!< an asynchronous operation is in progress */
-#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
-
 #if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
     /** Asynchronous operation context. This field is meant for use by the
      * asynchronous operation callbacks (mbedtls_ssl_config::f_async_sign_start,
@@ -506,25 +646,120 @@ struct mbedtls_ssl_handshake_params
 typedef struct mbedtls_ssl_hs_buffer mbedtls_ssl_hs_buffer;
 
 /*
- * This structure contains a full set of runtime transform parameters
- * either in negotiation or active.
+ * Representation of decryption/encryption transformations on records
+ *
+ * There are the following general types of record transformations:
+ * - Stream transformations (TLS versions <= 1.2 only)
+ *   Transformation adding a MAC and applying a stream-cipher
+ *   to the authenticated message.
+ * - CBC block cipher transformations ([D]TLS versions <= 1.2 only)
+ *   In addition to the distinction of the order of encryption and
+ *   authentication, there's a fundamental difference between the
+ *   handling in SSL3 & TLS 1.0 and TLS 1.1 and TLS 1.2: For SSL3
+ *   and TLS 1.0, the final IV after processing a record is used
+ *   as the IV for the next record. No explicit IV is contained
+ *   in an encrypted record. The IV for the first record is extracted
+ *   at key extraction time. In contrast, for TLS 1.1 and 1.2, no
+ *   IV is generated at key extraction time, but every encrypted
+ *   record is explicitly prefixed by the IV with which it was encrypted.
+ * - AEAD transformations ([D]TLS versions >= 1.2 only)
+ *   These come in two fundamentally different versions, the first one
+ *   used in TLS 1.2, excluding ChaChaPoly ciphersuites, and the second
+ *   one used for ChaChaPoly ciphersuites in TLS 1.2 as well as for TLS 1.3.
+ *   In the first transformation, the IV to be used for a record is obtained
+ *   as the concatenation of an explicit, static 4-byte IV and the 8-byte
+ *   record sequence number, and explicitly prepending this sequence number
+ *   to the encrypted record. In contrast, in the second transformation
+ *   the IV is obtained by XOR'ing a static IV obtained at key extraction
+ *   time with the 8-byte record sequence number, without prepending the
+ *   latter to the encrypted record.
+ *
+ * Additionally, DTLS 1.2 + CID as well as TLS 1.3 use an inner plaintext
+ * which allows to add flexible length padding and to hide a record's true
+ * content type.
+ *
+ * In addition to type and version, the following parameters are relevant:
+ * - The symmetric cipher algorithm to be used.
+ * - The (static) encryption/decryption keys for the cipher.
+ * - For stream/CBC, the type of message digest to be used.
+ * - For stream/CBC, (static) encryption/decryption keys for the digest.
+ * - For AEAD transformations, the size (potentially 0) of an explicit,
+ *   random initialization vector placed in encrypted records.
+ * - For some transformations (currently AEAD and CBC in SSL3 and TLS 1.0)
+ *   an implicit IV. It may be static (e.g. AEAD) or dynamic (e.g. CBC)
+ *   and (if present) is combined with the explicit IV in a transformation-
+ *   dependent way (e.g. appending in TLS 1.2 and XOR'ing in TLS 1.3).
+ * - For stream/CBC, a flag determining the order of encryption and MAC.
+ * - The details of the transformation depend on the SSL/TLS version.
+ * - The length of the authentication tag.
+ *
+ * Note: Except for CBC in SSL3 and TLS 1.0, these parameters are
+ *       constant across multiple encryption/decryption operations.
+ *       For CBC, the implicit IV needs to be updated after each
+ *       operation.
+ *
+ * The struct below refines this abstract view as follows:
+ * - The cipher underlying the transformation is managed in
+ *   cipher contexts cipher_ctx_{enc/dec}, which must have the
+ *   same cipher type. The mode of these cipher contexts determines
+ *   the type of the transformation in the sense above: e.g., if
+ *   the type is MBEDTLS_CIPHER_AES_256_CBC resp. MBEDTLS_CIPHER_AES_192_GCM
+ *   then the transformation has type CBC resp. AEAD.
+ * - The cipher keys are never stored explicitly but
+ *   are maintained within cipher_ctx_{enc/dec}.
+ * - For stream/CBC transformations, the message digest contexts
+ *   used for the MAC's are stored in md_ctx_{enc/dec}. These contexts
+ *   are unused for AEAD transformations.
+ * - For stream/CBC transformations and versions > SSL3, the
+ *   MAC keys are not stored explicitly but maintained within
+ *   md_ctx_{enc/dec}.
+ * - For stream/CBC transformations and version SSL3, the MAC
+ *   keys are stored explicitly in mac_enc, mac_dec and have
+ *   a fixed size of 20 bytes. These fields are unused for
+ *   AEAD transformations or transformations >= TLS 1.0.
+ * - For transformations using an implicit IV maintained within
+ *   the transformation context, its contents are stored within
+ *   iv_{enc/dec}.
+ * - The value of ivlen indicates the length of the IV.
+ *   This is redundant in case of stream/CBC transformations
+ *   which always use 0 resp. the cipher's block length as the
+ *   IV length, but is needed for AEAD ciphers and may be
+ *   different from the underlying cipher's block length
+ *   in this case.
+ * - The field fixed_ivlen is nonzero for AEAD transformations only
+ *   and indicates the length of the static part of the IV which is
+ *   constant throughout the communication, and which is stored in
+ *   the first fixed_ivlen bytes of the iv_{enc/dec} arrays.
+ *   Note: For CBC in SSL3 and TLS 1.0, the fields iv_{enc/dec}
+ *   still store IV's for continued use across multiple transformations,
+ *   so it is not true that fixed_ivlen == 0 means that iv_{enc/dec} are
+ *   not being used!
+ * - minor_ver denotes the SSL/TLS version
+ * - For stream/CBC transformations, maclen denotes the length of the
+ *   authentication tag, while taglen is unused and 0.
+ * - For AEAD transformations, taglen denotes the length of the
+ *   authentication tag, while maclen is unused and 0.
+ * - For CBC transformations, encrypt_then_mac determines the
+ *   order of encryption and authentication. This field is unused
+ *   in other transformations.
+ *
  */
 struct mbedtls_ssl_transform
 {
     /*
      * Session specific crypto layer
      */
-    const mbedtls_ssl_ciphersuite_t *ciphersuite_info;
-                                        /*!<  Chosen cipersuite_info  */
-    unsigned int keylen;                /*!<  symmetric key length (bytes)  */
     size_t minlen;                      /*!<  min. ciphertext length  */
     size_t ivlen;                       /*!<  IV length               */
     size_t fixed_ivlen;                 /*!<  Fixed part of IV (AEAD) */
-    size_t maclen;                      /*!<  MAC length              */
+    size_t maclen;                      /*!<  MAC(CBC) len            */
+    size_t taglen;                      /*!<  TAG(AEAD) len           */
 
     unsigned char iv_enc[16];           /*!<  IV (encryption)         */
     unsigned char iv_dec[16];           /*!<  IV (decryption)         */
 
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
+
 #if defined(MBEDTLS_SSL_PROTO_SSL3)
     /* Needed only for SSL v3.0 secret */
     unsigned char mac_enc[20];          /*!<  SSL v3.0 secret (enc)   */
@@ -534,8 +769,22 @@ struct mbedtls_ssl_transform
     mbedtls_md_context_t md_ctx_enc;            /*!<  MAC (encryption)        */
     mbedtls_md_context_t md_ctx_dec;            /*!<  MAC (decryption)        */
 
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+    int encrypt_then_mac;       /*!< flag for EtM activation                */
+#endif
+
+#endif /* MBEDTLS_SSL_SOME_MODES_USE_MAC */
+
     mbedtls_cipher_context_t cipher_ctx_enc;    /*!<  encryption context      */
     mbedtls_cipher_context_t cipher_ctx_dec;    /*!<  decryption context      */
+    int minor_ver;
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t in_cid_len;
+    uint8_t out_cid_len;
+    unsigned char in_cid [ MBEDTLS_SSL_CID_OUT_LEN_MAX ];
+    unsigned char out_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ];
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
 
     /*
      * Session specific compression layer
@@ -544,8 +793,83 @@ struct mbedtls_ssl_transform
     z_stream ctx_deflate;               /*!<  compression context     */
     z_stream ctx_inflate;               /*!<  decompression context   */
 #endif
+
+#if defined(MBEDTLS_SSL_CONTEXT_SERIALIZATION)
+    /* We need the Hello random bytes in order to re-derive keys from the
+     * Master Secret and other session info, see ssl_populate_transform() */
+    unsigned char randbytes[64]; /*!< ServerHello.random+ClientHello.random */
+#endif /* MBEDTLS_SSL_CONTEXT_SERIALIZATION */
 };
 
+/*
+ * Return 1 if the transform uses an AEAD cipher, 0 otherwise.
+ * Equivalently, return 0 if a separate MAC is used, 1 otherwise.
+ */
+static inline int mbedtls_ssl_transform_uses_aead(
+        const mbedtls_ssl_transform *transform )
+{
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
+    return( transform->maclen == 0 && transform->taglen != 0 );
+#else
+    (void) transform;
+    return( 1 );
+#endif
+}
+
+/*
+ * Internal representation of record frames
+ *
+ * Instances come in two flavors:
+ * (1) Encrypted
+ *     These always have data_offset = 0
+ * (2) Unencrypted
+ *     These have data_offset set to the amount of
+ *     pre-expansion during record protection. Concretely,
+ *     this is the length of the fixed part of the explicit IV
+ *     used for encryption, or 0 if no explicit IV is used
+ *     (e.g. for CBC in TLS 1.0, or stream ciphers).
+ *
+ * The reason for the data_offset in the unencrypted case
+ * is to allow for in-place conversion of an unencrypted to
+ * an encrypted record. If the offset wasn't included, the
+ * encrypted content would need to be shifted afterwards to
+ * make space for the fixed IV.
+ *
+ */
+#if MBEDTLS_SSL_CID_OUT_LEN_MAX > MBEDTLS_SSL_CID_IN_LEN_MAX
+#define MBEDTLS_SSL_CID_LEN_MAX MBEDTLS_SSL_CID_OUT_LEN_MAX
+#else
+#define MBEDTLS_SSL_CID_LEN_MAX MBEDTLS_SSL_CID_IN_LEN_MAX
+#endif
+
+typedef struct
+{
+    uint8_t ctr[8];         /* In TLS:  The implicit record sequence number.
+                             * In DTLS: The 2-byte epoch followed by
+                             *          the 6-byte sequence number.
+                             * This is stored as a raw big endian byte array
+                             * as opposed to a uint64_t because we rarely
+                             * need to perform arithmetic on this, but do
+                             * need it as a Byte array for the purpose of
+                             * MAC computations.                             */
+    uint8_t type;           /* The record content type.                      */
+    uint8_t ver[2];         /* SSL/TLS version as present on the wire.
+                             * Convert to internal presentation of versions
+                             * using mbedtls_ssl_read_version() and
+                             * mbedtls_ssl_write_version().
+                             * Keep wire-format for MAC computations.        */
+
+    unsigned char *buf;     /* Memory buffer enclosing the record content    */
+    size_t buf_len;         /* Buffer length                                 */
+    size_t data_offset;     /* Offset of record content                      */
+    size_t data_len;        /* Length of record content                      */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t cid_len;        /* Length of the CID (0 if not present)          */
+    unsigned char cid[ MBEDTLS_SSL_CID_LEN_MAX ]; /* The CID                 */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+} mbedtls_record;
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 /*
  * List of certificate + private key pairs
@@ -572,7 +896,7 @@ struct mbedtls_ssl_flight_item
 #endif /* MBEDTLS_SSL_PROTO_DTLS */
 
 #if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
-    defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 
 /* Find an entry in a signature-hash set matching a given hash algorithm. */
 mbedtls_md_type_t mbedtls_ssl_sig_hash_set_find( mbedtls_ssl_sig_hash_set_t *set,
@@ -592,7 +916,7 @@ static inline void mbedtls_ssl_sig_hash_set_init( mbedtls_ssl_sig_hash_set_t *se
 }
 
 #endif /* MBEDTLS_SSL_PROTO_TLS1_2) &&
-          MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+          MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
 
 /**
  * \brief           Free referenced items in an SSL transform context and clear
@@ -719,9 +1043,62 @@ int mbedtls_ssl_write_finished( mbedtls_ssl_context *ssl );
 void mbedtls_ssl_optimize_checksum( mbedtls_ssl_context *ssl,
                             const mbedtls_ssl_ciphersuite_t *ciphersuite_info );
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
 int mbedtls_ssl_psk_derive_premaster( mbedtls_ssl_context *ssl, mbedtls_key_exchange_type_t key_ex );
-#endif
+
+/**
+ * Get the first defined PSK by order of precedence:
+ * 1. handshake PSK set by \c mbedtls_ssl_set_hs_psk() in the PSK callback
+ * 2. static PSK configured by \c mbedtls_ssl_conf_psk()
+ * Return a code and update the pair (PSK, PSK length) passed to this function
+ */
+static inline int mbedtls_ssl_get_psk( const mbedtls_ssl_context *ssl,
+    const unsigned char **psk, size_t *psk_len )
+{
+    if( ssl->handshake->psk != NULL && ssl->handshake->psk_len > 0 )
+    {
+        *psk = ssl->handshake->psk;
+        *psk_len = ssl->handshake->psk_len;
+    }
+
+    else if( ssl->conf->psk != NULL && ssl->conf->psk_len > 0 )
+    {
+        *psk = ssl->conf->psk;
+        *psk_len = ssl->conf->psk_len;
+    }
+
+    else
+    {
+        *psk = NULL;
+        *psk_len = 0;
+        return( MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED );
+    }
+
+    return( 0 );
+}
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * Get the first defined opaque PSK by order of precedence:
+ * 1. handshake PSK set by \c mbedtls_ssl_set_hs_psk_opaque() in the PSK
+ *    callback
+ * 2. static PSK configured by \c mbedtls_ssl_conf_psk_opaque()
+ * Return an opaque PSK
+ */
+static inline psa_key_id_t mbedtls_ssl_get_opaque_psk(
+    const mbedtls_ssl_context *ssl )
+{
+    if( ! mbedtls_svc_key_id_is_null( ssl->handshake->psk_opaque ) )
+        return( ssl->handshake->psk_opaque );
+
+    if( ! mbedtls_svc_key_id_is_null( ssl->conf->psk_opaque ) )
+        return( ssl->conf->psk_opaque );
+
+    return( MBEDTLS_SVC_KEY_ID_INIT );
+}
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
 
 #if defined(MBEDTLS_PK_C)
 unsigned char mbedtls_ssl_sig_from_pk( mbedtls_pk_context *pk );
@@ -737,11 +1114,28 @@ int mbedtls_ssl_set_calc_verify_md( mbedtls_ssl_context *ssl, int md );
 int mbedtls_ssl_check_curve( const mbedtls_ssl_context *ssl, mbedtls_ecp_group_id grp_id );
 #endif
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 int mbedtls_ssl_check_sig_hash( const mbedtls_ssl_context *ssl,
                                 mbedtls_md_type_t md );
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+static inline mbedtls_ssl_srtp_profile mbedtls_ssl_check_srtp_profile_value
+                                                    ( const uint16_t srtp_profile_value )
+{
+    switch( srtp_profile_value )
+    {
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80:
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32:
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80:
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32:
+            return srtp_profile_value;
+        default: break;
+    }
+    return( MBEDTLS_TLS_SRTP_UNSET );
+}
+#endif
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 static inline mbedtls_pk_context *mbedtls_ssl_own_key( mbedtls_ssl_context *ssl )
 {
@@ -787,15 +1181,27 @@ void mbedtls_ssl_write_version( int major, int minor, int transport,
 void mbedtls_ssl_read_version( int *major, int *minor, int transport,
                        const unsigned char ver[2] );
 
-static inline size_t mbedtls_ssl_hdr_len( const mbedtls_ssl_context *ssl )
+static inline size_t mbedtls_ssl_in_hdr_len( const mbedtls_ssl_context *ssl )
 {
+#if !defined(MBEDTLS_SSL_PROTO_DTLS)
+    ((void) ssl);
+#endif
+
 #if defined(MBEDTLS_SSL_PROTO_DTLS)
     if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM )
+    {
         return( 13 );
-#else
-    ((void) ssl);
-#endif
-    return( 5 );
+    }
+    else
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+    {
+        return( 5 );
+    }
+}
+
+static inline size_t mbedtls_ssl_out_hdr_len( const mbedtls_ssl_context *ssl )
+{
+    return( (size_t) ( ssl->out_iv - ssl->out_hdr ) );
 }
 
 static inline size_t mbedtls_ssl_hs_hdr_len( const mbedtls_ssl_context *ssl )
@@ -818,29 +1224,12 @@ int mbedtls_ssl_flight_transmit( mbedtls_ssl_context *ssl );
 
 /* Visible for testing purposes only */
 #if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
-int mbedtls_ssl_dtls_replay_check( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_dtls_replay_check( mbedtls_ssl_context const *ssl );
 void mbedtls_ssl_dtls_replay_update( mbedtls_ssl_context *ssl );
 #endif
 
-/* constant-time buffer comparison */
-static inline int mbedtls_ssl_safer_memcmp( const void *a, const void *b, size_t n )
-{
-    size_t i;
-    volatile const unsigned char *A = (volatile const unsigned char *) a;
-    volatile const unsigned char *B = (volatile const unsigned char *) b;
-    volatile unsigned char diff = 0;
-
-    for( i = 0; i < n; i++ )
-    {
-        /* Read volatile data in order before computing diff.
-         * This avoids IAR compiler warning:
-         * 'the order of volatile accesses is undefined ..' */
-        unsigned char x = A[i], y = B[i];
-        diff |= x ^ y;
-    }
-
-    return( diff );
-}
+int mbedtls_ssl_session_copy( mbedtls_ssl_session *dst,
+                              const mbedtls_ssl_session *src );
 
 #if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \
     defined(MBEDTLS_SSL_PROTO_TLS1_1)
@@ -852,6 +1241,7 @@ int mbedtls_ssl_get_key_exchange_md_ssl_tls( mbedtls_ssl_context *ssl,
 
 #if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \
     defined(MBEDTLS_SSL_PROTO_TLS1_2)
+/* The hash buffer must have at least MBEDTLS_MD_MAX_SIZE bytes of length. */
 int mbedtls_ssl_get_key_exchange_md_tls1_2( mbedtls_ssl_context *ssl,
                                             unsigned char *hash, size_t *hashlen,
                                             unsigned char *data, size_t data_len,
@@ -859,75 +1249,60 @@ int mbedtls_ssl_get_key_exchange_md_tls1_2( mbedtls_ssl_context *ssl,
 #endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 || \
           MBEDTLS_SSL_PROTO_TLS1_2 */
 
-#if defined(MBEDTLS_SSL_SOME_SUITES_USE_TLS_CBC)
-/** \brief Compute the HMAC of variable-length data with constant flow.
- *
- * This function computes the HMAC of the concatenation of \p add_data and \p
- * data, and does with a code flow and memory access pattern that does not
- * depend on \p data_len_secret, but only on \p min_data_len and \p
- * max_data_len. In particular, this function always reads exactly \p
- * max_data_len bytes from \p data.
- *
- * \param ctx               The HMAC context. It must have keys configured
- *                          with mbedtls_md_hmac_starts() and use one of the
- *                          following hashes: SHA-384, SHA-256, SHA-1 or MD-5.
- *                          It is reset using mbedtls_md_hmac_reset() after
- *                          the computation is complete to prepare for the
- *                          next computation.
- * \param add_data          The additional data prepended to \p data. This
- *                          must point to a readable buffer of \p add_data_len
- *                          bytes.
- * \param add_data_len      The length of \p add_data in bytes.
- * \param data              The data appended to \p add_data. This must point
- *                          to a readable buffer of \p max_data_len bytes.
- * \param data_len_secret   The length of the data to process in \p data.
- *                          This must be no less than \p min_data_len and no
- *                          greater than \p max_data_len.
- * \param min_data_len      The minimal length of \p data in bytes.
- * \param max_data_len      The maximal length of \p data in bytes.
- * \param output            The HMAC will be written here. This must point to
- *                          a writable buffer of sufficient size to hold the
- *                          HMAC value.
- *
- * \retval 0
- *         Success.
- * \retval MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED
- *         The hardware accelerator failed.
- */
-int mbedtls_ssl_cf_hmac(
-        mbedtls_md_context_t *ctx,
-        const unsigned char *add_data, size_t add_data_len,
-        const unsigned char *data, size_t data_len_secret,
-        size_t min_data_len, size_t max_data_len,
-        unsigned char *output );
-
-/** \brief Copy data from a secret position with constant flow.
- *
- * This function copies \p len bytes from \p src_base + \p offset_secret to \p
- * dst, with a code flow and memory access pattern that does not depend on \p
- * offset_secret, but only on \p offset_min, \p offset_max and \p len.
- *
- * \param dst           The destination buffer. This must point to a writable
- *                      buffer of at least \p len bytes.
- * \param src_base      The base of the source buffer. This must point to a
- *                      readable buffer of at least \p offset_max + \p len
- *                      bytes.
- * \param offset_secret The offset in the source buffer from which to copy.
- *                      This must be no less than \p offset_min and no greater
- *                      than \p offset_max.
- * \param offset_min    The minimal value of \p offset_secret.
- * \param offset_max    The maximal value of \p offset_secret.
- * \param len           The number of bytes to copy.
- */
-void mbedtls_ssl_cf_memcpy_offset( unsigned char *dst,
-                                   const unsigned char *src_base,
-                                   size_t offset_secret,
-                                   size_t offset_min, size_t offset_max,
-                                   size_t len );
-#endif /* MBEDTLS_SSL_SOME_SUITES_USE_TLS_CBC */
-
 #ifdef __cplusplus
 }
 #endif
 
+void mbedtls_ssl_transform_init( mbedtls_ssl_transform *transform );
+int mbedtls_ssl_encrypt_buf( mbedtls_ssl_context *ssl,
+                             mbedtls_ssl_transform *transform,
+                             mbedtls_record *rec,
+                             int (*f_rng)(void *, unsigned char *, size_t),
+                             void *p_rng );
+int mbedtls_ssl_decrypt_buf( mbedtls_ssl_context const *ssl,
+                             mbedtls_ssl_transform *transform,
+                             mbedtls_record *rec );
+
+/* Length of the "epoch" field in the record header */
+static inline size_t mbedtls_ssl_ep_len( const mbedtls_ssl_context *ssl )
+{
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM )
+        return( 2 );
+#else
+    ((void) ssl);
+#endif
+    return( 0 );
+}
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+int mbedtls_ssl_resend_hello_request( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+void mbedtls_ssl_set_timer( mbedtls_ssl_context *ssl, uint32_t millisecs );
+int mbedtls_ssl_check_timer( mbedtls_ssl_context *ssl );
+
+void mbedtls_ssl_reset_in_out_pointers( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_update_out_pointers( mbedtls_ssl_context *ssl,
+                              mbedtls_ssl_transform *transform );
+void mbedtls_ssl_update_in_pointers( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_session_reset_int( mbedtls_ssl_context *ssl, int partial );
+
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+void mbedtls_ssl_dtls_replay_reset( mbedtls_ssl_context *ssl );
+#endif
+
+void mbedtls_ssl_handshake_wrapup_free_hs_transform( mbedtls_ssl_context *ssl );
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+int mbedtls_ssl_start_renegotiation( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+size_t mbedtls_ssl_get_current_mtu( const mbedtls_ssl_context *ssl );
+void mbedtls_ssl_buffering_free( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_flight_free( mbedtls_ssl_flight_item *flight );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
 #endif /* ssl_internal.h */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
index a83f5e66623..a882eed23b9 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_TICKET_H
 #define MBEDTLS_SSL_TICKET_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -61,11 +34,11 @@
  * secrecy, when MBEDTLS_HAVE_TIME is defined.
  */
 
-#include "ssl.h"
-#include "cipher.h"
+#include "mbedtls/ssl.h"
+#include "mbedtls/cipher.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/threading.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/threading.h
index 45161ce467c..d147c73f066 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/threading.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/threading.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_THREADING_H
 #define MBEDTLS_THREADING_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,10 +36,13 @@ extern "C" {
 
 /* MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE is deprecated and should not be
  * used. */
-#define MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE         -0x001A  /**< The selected feature is not available. */
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE         -0x001A
 
-#define MBEDTLS_ERR_THREADING_BAD_INPUT_DATA              -0x001C  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_THREADING_MUTEX_ERROR                 -0x001E  /**< Locking / unlocking / free failed with error code. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_THREADING_BAD_INPUT_DATA              -0x001C
+/** Locking / unlocking / free failed with error code. */
+#define MBEDTLS_ERR_THREADING_MUTEX_ERROR                 -0x001E
 
 #if defined(MBEDTLS_THREADING_PTHREAD)
 #include <pthread.h>
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/timing.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/timing.h
index 8611ba9a4e5..b7290cfcabc 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/timing.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/timing.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_TIMING_H
 #define MBEDTLS_TIMING_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/version.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/version.h
index 49cbeb003a8..b1a92b2bcf3 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/version.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/version.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 /*
  * This set of compile-time defines and run-time variables can be used to
@@ -54,7 +27,7 @@
 #define MBEDTLS_VERSION_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -64,17 +37,17 @@
  * Major, Minor, Patchlevel
  */
 #define MBEDTLS_VERSION_MAJOR  2
-#define MBEDTLS_VERSION_MINOR  16
-#define MBEDTLS_VERSION_PATCH  11
+#define MBEDTLS_VERSION_MINOR  28
+#define MBEDTLS_VERSION_PATCH  0
 
 /**
  * The single version number has the following structure:
  *    MMNNPP00
  *    Major version | Minor version | Patch version
  */
-#define MBEDTLS_VERSION_NUMBER         0x02100B00
-#define MBEDTLS_VERSION_STRING         "2.16.11"
-#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.16.11"
+#define MBEDTLS_VERSION_NUMBER         0x021C0000
+#define MBEDTLS_VERSION_STRING         "2.28.0"
+#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.28.0"
 
 #if defined(MBEDTLS_VERSION_C)
 
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509.h
index 5bb9b00292f..c1775014300 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,42 +18,21 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_H
 #define MBEDTLS_X509_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
-#include "pk.h"
+#include "mbedtls/asn1.h"
+#include "mbedtls/pk.h"
 
 #if defined(MBEDTLS_RSA_C)
-#include "rsa.h"
+#include "mbedtls/rsa.h"
 #endif
 
 /**
@@ -83,26 +56,46 @@
  * \name X509 Error codes
  * \{
  */
-#define MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE              -0x2080  /**< Unavailable feature, e.g. RSA hashing/encryption combination. */
-#define MBEDTLS_ERR_X509_UNKNOWN_OID                      -0x2100  /**< Requested OID is unknown. */
-#define MBEDTLS_ERR_X509_INVALID_FORMAT                   -0x2180  /**< The CRT/CRL/CSR format is invalid, e.g. different type expected. */
-#define MBEDTLS_ERR_X509_INVALID_VERSION                  -0x2200  /**< The CRT/CRL/CSR version element is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_SERIAL                   -0x2280  /**< The serial tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_ALG                      -0x2300  /**< The algorithm tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_NAME                     -0x2380  /**< The name tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_DATE                     -0x2400  /**< The date tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_SIGNATURE                -0x2480  /**< The signature tag or value invalid. */
-#define MBEDTLS_ERR_X509_INVALID_EXTENSIONS               -0x2500  /**< The extension tag or value is invalid. */
-#define MBEDTLS_ERR_X509_UNKNOWN_VERSION                  -0x2580  /**< CRT/CRL/CSR has an unsupported version number. */
-#define MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG                  -0x2600  /**< Signature algorithm (oid) is unsupported. */
-#define MBEDTLS_ERR_X509_SIG_MISMATCH                     -0x2680  /**< Signature algorithms do not match. (see \c ::mbedtls_x509_crt sig_oid) */
-#define MBEDTLS_ERR_X509_CERT_VERIFY_FAILED               -0x2700  /**< Certificate verification failed, e.g. CRL, CA or signature check failed. */
-#define MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT              -0x2780  /**< Format not recognized as DER or PEM. */
-#define MBEDTLS_ERR_X509_BAD_INPUT_DATA                   -0x2800  /**< Input invalid. */
-#define MBEDTLS_ERR_X509_ALLOC_FAILED                     -0x2880  /**< Allocation of memory failed. */
-#define MBEDTLS_ERR_X509_FILE_IO_ERROR                    -0x2900  /**< Read/write of file failed. */
-#define MBEDTLS_ERR_X509_BUFFER_TOO_SMALL                 -0x2980  /**< Destination buffer is too small. */
-#define MBEDTLS_ERR_X509_FATAL_ERROR                      -0x3000  /**< A fatal error occurred, eg the chain is too long or the vrfy callback failed. */
+/** Unavailable feature, e.g. RSA hashing/encryption combination. */
+#define MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE              -0x2080
+/** Requested OID is unknown. */
+#define MBEDTLS_ERR_X509_UNKNOWN_OID                      -0x2100
+/** The CRT/CRL/CSR format is invalid, e.g. different type expected. */
+#define MBEDTLS_ERR_X509_INVALID_FORMAT                   -0x2180
+/** The CRT/CRL/CSR version element is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_VERSION                  -0x2200
+/** The serial tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_SERIAL                   -0x2280
+/** The algorithm tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_ALG                      -0x2300
+/** The name tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_NAME                     -0x2380
+/** The date tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_DATE                     -0x2400
+/** The signature tag or value invalid. */
+#define MBEDTLS_ERR_X509_INVALID_SIGNATURE                -0x2480
+/** The extension tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_EXTENSIONS               -0x2500
+/** CRT/CRL/CSR has an unsupported version number. */
+#define MBEDTLS_ERR_X509_UNKNOWN_VERSION                  -0x2580
+/** Signature algorithm (oid) is unsupported. */
+#define MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG                  -0x2600
+/** Signature algorithms do not match. (see \c ::mbedtls_x509_crt sig_oid) */
+#define MBEDTLS_ERR_X509_SIG_MISMATCH                     -0x2680
+/** Certificate verification failed, e.g. CRL, CA or signature check failed. */
+#define MBEDTLS_ERR_X509_CERT_VERIFY_FAILED               -0x2700
+/** Format not recognized as DER or PEM. */
+#define MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT              -0x2780
+/** Input invalid. */
+#define MBEDTLS_ERR_X509_BAD_INPUT_DATA                   -0x2800
+/** Allocation of memory failed. */
+#define MBEDTLS_ERR_X509_ALLOC_FAILED                     -0x2880
+/** Read/write of file failed. */
+#define MBEDTLS_ERR_X509_FILE_IO_ERROR                    -0x2900
+/** Destination buffer is too small. */
+#define MBEDTLS_ERR_X509_BUFFER_TOO_SMALL                 -0x2980
+/** A fatal error occurred, eg the chain is too long or the vrfy callback failed. */
+#define MBEDTLS_ERR_X509_FATAL_ERROR                      -0x3000
 /* \} name */
 
 /**
@@ -134,6 +127,28 @@
 /* \} name */
 /* \} addtogroup x509_module */
 
+/*
+ * X.509 v3 Subject Alternative Name types.
+ *      otherName                       [0]     OtherName,
+ *      rfc822Name                      [1]     IA5String,
+ *      dNSName                         [2]     IA5String,
+ *      x400Address                     [3]     ORAddress,
+ *      directoryName                   [4]     Name,
+ *      ediPartyName                    [5]     EDIPartyName,
+ *      uniformResourceIdentifier       [6]     IA5String,
+ *      iPAddress                       [7]     OCTET STRING,
+ *      registeredID                    [8]     OBJECT IDENTIFIER
+ */
+#define MBEDTLS_X509_SAN_OTHER_NAME                      0
+#define MBEDTLS_X509_SAN_RFC822_NAME                     1
+#define MBEDTLS_X509_SAN_DNS_NAME                        2
+#define MBEDTLS_X509_SAN_X400_ADDRESS_NAME               3
+#define MBEDTLS_X509_SAN_DIRECTORY_NAME                  4
+#define MBEDTLS_X509_SAN_EDI_PARTY_NAME                  5
+#define MBEDTLS_X509_SAN_UNIFORM_RESOURCE_IDENTIFIER     6
+#define MBEDTLS_X509_SAN_IP_ADDRESS                      7
+#define MBEDTLS_X509_SAN_REGISTERED_ID                   8
+
 /*
  * X.509 v3 Key Usage Extension flags
  * Reminder: update x509_info_key_usage() when adding new flags.
@@ -167,24 +182,26 @@
  *
  * Comments refer to the status for using certificates. Status can be
  * different for writing certificates or reading CRLs or CSRs.
+ *
+ * Those are defined in oid.h as oid.c needs them in a data structure. Since
+ * these were previously defined here, let's have aliases for compatibility.
  */
-#define MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER    (1 << 0)
-#define MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER      (1 << 1)
-#define MBEDTLS_X509_EXT_KEY_USAGE                   (1 << 2)
-#define MBEDTLS_X509_EXT_CERTIFICATE_POLICIES        (1 << 3)
-#define MBEDTLS_X509_EXT_POLICY_MAPPINGS             (1 << 4)
-#define MBEDTLS_X509_EXT_SUBJECT_ALT_NAME            (1 << 5)    /* Supported (DNS) */
-#define MBEDTLS_X509_EXT_ISSUER_ALT_NAME             (1 << 6)
-#define MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS     (1 << 7)
-#define MBEDTLS_X509_EXT_BASIC_CONSTRAINTS           (1 << 8)    /* Supported */
-#define MBEDTLS_X509_EXT_NAME_CONSTRAINTS            (1 << 9)
-#define MBEDTLS_X509_EXT_POLICY_CONSTRAINTS          (1 << 10)
-#define MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE          (1 << 11)
-#define MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS     (1 << 12)
-#define MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY          (1 << 13)
-#define MBEDTLS_X509_EXT_FRESHEST_CRL                (1 << 14)
-
-#define MBEDTLS_X509_EXT_NS_CERT_TYPE                (1 << 16)
+#define MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER MBEDTLS_OID_X509_EXT_AUTHORITY_KEY_IDENTIFIER
+#define MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER   MBEDTLS_OID_X509_EXT_SUBJECT_KEY_IDENTIFIER
+#define MBEDTLS_X509_EXT_KEY_USAGE                MBEDTLS_OID_X509_EXT_KEY_USAGE
+#define MBEDTLS_X509_EXT_CERTIFICATE_POLICIES     MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES
+#define MBEDTLS_X509_EXT_POLICY_MAPPINGS          MBEDTLS_OID_X509_EXT_POLICY_MAPPINGS
+#define MBEDTLS_X509_EXT_SUBJECT_ALT_NAME         MBEDTLS_OID_X509_EXT_SUBJECT_ALT_NAME         /* Supported (DNS) */
+#define MBEDTLS_X509_EXT_ISSUER_ALT_NAME          MBEDTLS_OID_X509_EXT_ISSUER_ALT_NAME
+#define MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS  MBEDTLS_OID_X509_EXT_SUBJECT_DIRECTORY_ATTRS
+#define MBEDTLS_X509_EXT_BASIC_CONSTRAINTS        MBEDTLS_OID_X509_EXT_BASIC_CONSTRAINTS        /* Supported */
+#define MBEDTLS_X509_EXT_NAME_CONSTRAINTS         MBEDTLS_OID_X509_EXT_NAME_CONSTRAINTS
+#define MBEDTLS_X509_EXT_POLICY_CONSTRAINTS       MBEDTLS_OID_X509_EXT_POLICY_CONSTRAINTS
+#define MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE       MBEDTLS_OID_X509_EXT_EXTENDED_KEY_USAGE
+#define MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS  MBEDTLS_OID_X509_EXT_CRL_DISTRIBUTION_POINTS
+#define MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY       MBEDTLS_OID_X509_EXT_INIHIBIT_ANYPOLICY
+#define MBEDTLS_X509_EXT_FRESHEST_CRL             MBEDTLS_OID_X509_EXT_FRESHEST_CRL
+#define MBEDTLS_X509_EXT_NS_CERT_TYPE             MBEDTLS_OID_X509_EXT_NS_CERT_TYPE
 
 /*
  * Storage format identifiers
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h
index 2ade47c89db..7e9e8885f41 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_CRL_H
 #define MBEDTLS_X509_CRL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "x509.h"
+#include "mbedtls/x509.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
index 30da1909b74..64ccb433ba8 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,39 +18,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_CRT_H
 #define MBEDTLS_X509_CRT_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "x509.h"
-#include "x509_crl.h"
+#include "mbedtls/x509.h"
+#include "mbedtls/x509_crl.h"
+#include "mbedtls/bignum.h"
 
 /**
  * \addtogroup x509_module
@@ -77,6 +51,8 @@ extern "C" {
  */
 typedef struct mbedtls_x509_crt
 {
+    int own_buffer;                     /**< Indicates if \c raw is owned
+                                         *   by the structure or not.        */
     mbedtls_x509_buf raw;               /**< The raw certificate data (DER). */
     mbedtls_x509_buf tbs;               /**< The raw certificate body (DER). The part that is To Be Signed. */
 
@@ -93,12 +69,15 @@ typedef struct mbedtls_x509_crt
     mbedtls_x509_time valid_from;       /**< Start time of certificate validity. */
     mbedtls_x509_time valid_to;         /**< End time of certificate validity. */
 
+    mbedtls_x509_buf pk_raw;
     mbedtls_pk_context pk;              /**< Container for the public key context. */
 
     mbedtls_x509_buf issuer_id;         /**< Optional X.509 v2/v3 issuer unique identifier. */
     mbedtls_x509_buf subject_id;        /**< Optional X.509 v2/v3 subject unique identifier. */
     mbedtls_x509_buf v3_ext;            /**< Optional X.509 v3 extensions.  */
-    mbedtls_x509_sequence subject_alt_names;    /**< Optional list of Subject Alternative Names (Only dNSName supported). */
+    mbedtls_x509_sequence subject_alt_names;    /**< Optional list of raw entries of Subject Alternative Names extension (currently only dNSName and OtherName are listed). */
+
+    mbedtls_x509_sequence certificate_policies; /**< Optional list of certificate policies (Only anyPolicy is printed and enforced, however the rest of the policies are still listed). */
 
     int ext_types;              /**< Bit string containing detected and parsed extensions */
     int ca_istrue;              /**< Optional Basic Constraint extension value: 1 if this certificate belongs to a CA, 0 otherwise. */
@@ -119,6 +98,53 @@ typedef struct mbedtls_x509_crt
 }
 mbedtls_x509_crt;
 
+/**
+ * From RFC 5280 section 4.2.1.6:
+ * OtherName ::= SEQUENCE {
+ *      type-id    OBJECT IDENTIFIER,
+ *      value      [0] EXPLICIT ANY DEFINED BY type-id }
+ */
+typedef struct mbedtls_x509_san_other_name
+{
+    /**
+     * The type_id is an OID as deifned in RFC 5280.
+     * To check the value of the type id, you should use
+     * \p MBEDTLS_OID_CMP with a known OID mbedtls_x509_buf.
+     */
+    mbedtls_x509_buf type_id;                   /**< The type id. */
+    union
+    {
+        /**
+         * From RFC 4108 section 5:
+         * HardwareModuleName ::= SEQUENCE {
+         *                         hwType OBJECT IDENTIFIER,
+         *                         hwSerialNum OCTET STRING }
+         */
+        struct
+        {
+            mbedtls_x509_buf oid;               /**< The object identifier. */
+            mbedtls_x509_buf val;               /**< The named value. */
+        }
+        hardware_module_name;
+    }
+    value;
+}
+mbedtls_x509_san_other_name;
+
+/**
+ * A structure for holding the parsed Subject Alternative Name, according to type
+ */
+typedef struct mbedtls_x509_subject_alternative_name
+{
+    int type;                              /**< The SAN type, value of MBEDTLS_X509_SAN_XXX. */
+    union {
+        mbedtls_x509_san_other_name other_name; /**< The otherName supported type. */
+        mbedtls_x509_buf   unstructured_name; /**< The buffer for the un constructed types. Only dnsName currently supported */
+    }
+    san; /**< A union of the supported SAN types */
+}
+mbedtls_x509_subject_alternative_name;
+
 /**
  * Build flag from an algorithm/curve identifier (pk, md, ecp)
  * Since 0 is always XXX_NONE, ignore it.
@@ -188,6 +214,14 @@ typedef struct
 {
     mbedtls_x509_crt_verify_chain_item items[MBEDTLS_X509_MAX_VERIFY_CHAIN_SIZE];
     unsigned len;
+
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+    /* This stores the list of potential trusted signers obtained from
+     * the CA callback used for the CRT verification, if configured.
+     * We must track it somewhere because the callback passes its
+     * ownership to the caller. */
+    mbedtls_x509_crt *trust_ca_cb_result;
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
 } mbedtls_x509_crt_verify_chain;
 
 #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
@@ -254,16 +288,142 @@ extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_suiteb;
 
 /**
  * \brief          Parse a single DER formatted certificate and add it
- *                 to the chained list.
- *
- * \param chain    points to the start of the chain
- * \param buf      buffer holding the certificate DER data
- * \param buflen   size of the buffer
- *
- * \return         0 if successful, or a specific X509 or PEM error code
+ *                 to the end of the provided chained list.
+ *
+ * \param chain    The pointer to the start of the CRT chain to attach to.
+ *                 When parsing the first CRT in a chain, this should point
+ *                 to an instance of ::mbedtls_x509_crt initialized through
+ *                 mbedtls_x509_crt_init().
+ * \param buf      The buffer holding the DER encoded certificate.
+ * \param buflen   The size in Bytes of \p buf.
+ *
+ * \note           This function makes an internal copy of the CRT buffer
+ *                 \p buf. In particular, \p buf may be destroyed or reused
+ *                 after this call returns. To avoid duplicating the CRT
+ *                 buffer (at the cost of stricter lifetime constraints),
+ *                 use mbedtls_x509_crt_parse_der_nocopy() instead.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_x509_crt_parse_der( mbedtls_x509_crt *chain,
+                                const unsigned char *buf,
+                                size_t buflen );
+
+/**
+ * \brief          The type of certificate extension callbacks.
+ *
+ *                 Callbacks of this type are passed to and used by the
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() routine when
+ *                 it encounters either an unsupported extension or a
+ *                 "certificate policies" extension containing any
+ *                 unsupported certificate policies.
+ *                 Future versions of the library may invoke the callback
+ *                 in other cases, if and when the need arises.
+ *
+ * \param p_ctx    An opaque context passed to the callback.
+ * \param crt      The certificate being parsed.
+ * \param oid      The OID of the extension.
+ * \param critical Whether the extension is critical.
+ * \param p        Pointer to the start of the extension value
+ *                 (the content of the OCTET STRING).
+ * \param end      End of extension value.
+ *
+ * \note           The callback must fail and return a negative error code
+ *                 if it can not parse or does not support the extension.
+ *                 When the callback fails to parse a critical extension
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() also fails.
+ *                 When the callback fails to parse a non critical extension
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() simply skips
+ *                 the extension and continues parsing.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+typedef int (*mbedtls_x509_crt_ext_cb_t)( void *p_ctx,
+                                          mbedtls_x509_crt const *crt,
+                                          mbedtls_x509_buf const *oid,
+                                          int critical,
+                                          const unsigned char *p,
+                                          const unsigned char *end );
+
+/**
+ * \brief            Parse a single DER formatted certificate and add it
+ *                   to the end of the provided chained list.
+ *
+ * \param chain      The pointer to the start of the CRT chain to attach to.
+ *                   When parsing the first CRT in a chain, this should point
+ *                   to an instance of ::mbedtls_x509_crt initialized through
+ *                   mbedtls_x509_crt_init().
+ * \param buf        The buffer holding the DER encoded certificate.
+ * \param buflen     The size in Bytes of \p buf.
+ * \param make_copy  When not zero this function makes an internal copy of the
+ *                   CRT buffer \p buf. In particular, \p buf may be destroyed
+ *                   or reused after this call returns.
+ *                   When zero this function avoids duplicating the CRT buffer
+ *                   by taking temporary ownership thereof until the CRT
+ *                   is destroyed (like mbedtls_x509_crt_parse_der_nocopy())
+ * \param cb         A callback invoked for every unsupported certificate
+ *                   extension.
+ * \param p_ctx      An opaque context passed to the callback.
+ *
+ * \note             This call is functionally equivalent to
+ *                   mbedtls_x509_crt_parse_der(), and/or
+ *                   mbedtls_x509_crt_parse_der_nocopy()
+ *                   but it calls the callback with every unsupported
+ *                   certificate extension and additionally the
+ *                   "certificate policies" extension if it contains any
+ *                   unsupported certificate policies.
+ *                   The callback must return a negative error code if it
+ *                   does not know how to handle such an extension.
+ *                   When the callback fails to parse a critical extension
+ *                   mbedtls_x509_crt_parse_der_with_ext_cb() also fails.
+ *                   When the callback fails to parse a non critical extension
+ *                   mbedtls_x509_crt_parse_der_with_ext_cb() simply skips
+ *                   the extension and continues parsing.
+ *                   Future versions of the library may invoke the callback
+ *                   in other cases, if and when the need arises.
+ *
+ * \return           \c 0 if successful.
+ * \return           A negative error code on failure.
+ */
+int mbedtls_x509_crt_parse_der_with_ext_cb( mbedtls_x509_crt *chain,
+                                            const unsigned char *buf,
+                                            size_t buflen,
+                                            int make_copy,
+                                            mbedtls_x509_crt_ext_cb_t cb,
+                                            void *p_ctx );
+
+/**
+ * \brief          Parse a single DER formatted certificate and add it
+ *                 to the end of the provided chained list. This is a
+ *                 variant of mbedtls_x509_crt_parse_der() which takes
+ *                 temporary ownership of the CRT buffer until the CRT
+ *                 is destroyed.
+ *
+ * \param chain    The pointer to the start of the CRT chain to attach to.
+ *                 When parsing the first CRT in a chain, this should point
+ *                 to an instance of ::mbedtls_x509_crt initialized through
+ *                 mbedtls_x509_crt_init().
+ * \param buf      The address of the readable buffer holding the DER encoded
+ *                 certificate to use. On success, this buffer must be
+ *                 retained and not be changed for the liftetime of the
+ *                 CRT chain \p chain, that is, until \p chain is destroyed
+ *                 through a call to mbedtls_x509_crt_free().
+ * \param buflen   The size in Bytes of \p buf.
+ *
+ * \note           This call is functionally equivalent to
+ *                 mbedtls_x509_crt_parse_der(), but it avoids creating a
+ *                 copy of the input buffer at the cost of stronger lifetime
+ *                 constraints. This is useful in constrained environments
+ *                 where duplication of the CRT cannot be tolerated.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
  */
-int mbedtls_x509_crt_parse_der( mbedtls_x509_crt *chain, const unsigned char *buf,
-                        size_t buflen );
+int mbedtls_x509_crt_parse_der_nocopy( mbedtls_x509_crt *chain,
+                                       const unsigned char *buf,
+                                       size_t buflen );
 
 /**
  * \brief          Parse one DER-encoded or one or more concatenated PEM-encoded
@@ -327,8 +487,37 @@ int mbedtls_x509_crt_parse_file( mbedtls_x509_crt *chain, const char *path );
  *                 if partly successful or a specific X509 or PEM error code
  */
 int mbedtls_x509_crt_parse_path( mbedtls_x509_crt *chain, const char *path );
-#endif /* MBEDTLS_FS_IO */
 
+#endif /* MBEDTLS_FS_IO */
+/**
+ * \brief          This function parses an item in the SubjectAlternativeNames
+ *                 extension.
+ *
+ * \param san_buf  The buffer holding the raw data item of the subject
+ *                 alternative name.
+ * \param san      The target structure to populate with the parsed presentation
+ *                 of the subject alternative name encoded in \p san_raw.
+ *
+ * \note           Only "dnsName" and "otherName" of type hardware_module_name
+ *                 as defined in RFC 4180 is supported.
+ *
+ * \note           This function should be called on a single raw data of
+ *                 subject alternative name. For example, after successful
+ *                 certificate parsing, one must iterate on every item in the
+ *                 \p crt->subject_alt_names sequence, and pass it to
+ *                 this function.
+ *
+ * \warning        The target structure contains pointers to the raw data of the
+ *                 parsed certificate, and its lifetime is restricted by the
+ *                 lifetime of the certificate.
+ *
+ * \return         \c 0 on success
+ * \return         #MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE for an unsupported
+ *                 SAN type.
+ * \return         Another negative value for any other failure.
+ */
+int mbedtls_x509_parse_subject_alt_name( const mbedtls_x509_buf *san_buf,
+                                         mbedtls_x509_subject_alternative_name *san );
 /**
  * \brief          Returns an informational string about the
  *                 certificate.
@@ -360,7 +549,7 @@ int mbedtls_x509_crt_verify_info( char *buf, size_t size, const char *prefix,
                           uint32_t flags );
 
 /**
- * \brief          Verify the certificate signature
+ * \brief          Verify a chain of certificates.
  *
  *                 The verify callback is a user-supplied callback that
  *                 can clear / modify / add flags for a certificate. If set,
@@ -400,22 +589,30 @@ int mbedtls_x509_crt_verify_info( char *buf, size_t size, const char *prefix,
  *                 specific peers you know) - in that case, the self-signed
  *                 certificate doesn't need to have the CA bit set.
  *
- * \param crt      a certificate (chain) to be verified
- * \param trust_ca the list of trusted CAs (see note above)
- * \param ca_crl   the list of CRLs for trusted CAs (see note above)
- * \param cn       expected Common Name (can be set to
- *                 NULL if the CN must not be verified)
- * \param flags    result of the verification
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
- *
- * \return         0 (and flags set to 0) if the chain was verified and valid,
- *                 MBEDTLS_ERR_X509_CERT_VERIFY_FAILED if the chain was verified
- *                 but found to be invalid, in which case *flags will have one
- *                 or more MBEDTLS_X509_BADCERT_XXX or MBEDTLS_X509_BADCRL_XXX
- *                 flags set, or another error (and flags set to 0xffffffff)
- *                 in case of a fatal error encountered during the
- *                 verification process.
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param cn       The expected Common Name. This will be checked to be
+ *                 present in the certificate's subjectAltNames extension or,
+ *                 if this extension is absent, as a CN component in its
+ *                 Subject name. Currently only DNS names are supported. This
+ *                 may be \c NULL if the CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         \c 0 if the chain is valid with respect to the
+ *                 passed CN, CAs, CRLs and security profile.
+ * \return         #MBEDTLS_ERR_X509_CERT_VERIFY_FAILED in case the
+ *                 certificate chain verification failed. In this case,
+ *                 \c *flags will have one or more
+ *                 \c MBEDTLS_X509_BADCERT_XXX or \c MBEDTLS_X509_BADCRL_XXX
+ *                 flags set.
+ * \return         Another negative error code in case of a fatal error
+ *                 encountered during the verification process.
  */
 int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt,
                      mbedtls_x509_crt *trust_ca,
@@ -425,7 +622,8 @@ int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt,
                      void *p_vrfy );
 
 /**
- * \brief          Verify the certificate signature according to profile
+ * \brief          Verify a chain of certificates with respect to
+ *                 a configurable security profile.
  *
  * \note           Same as \c mbedtls_x509_crt_verify(), but with explicit
  *                 security profile.
@@ -434,22 +632,28 @@ int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt,
  *                 for ECDSA) apply to all certificates: trusted root,
  *                 intermediate CAs if any, and end entity certificate.
  *
- * \param crt      a certificate (chain) to be verified
- * \param trust_ca the list of trusted CAs
- * \param ca_crl   the list of CRLs for trusted CAs
- * \param profile  security profile for verification
- * \param cn       expected Common Name (can be set to
- *                 NULL if the CN must not be verified)
- * \param flags    result of the verification
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
- *
- * \return         0 if successful or MBEDTLS_ERR_X509_CERT_VERIFY_FAILED
- *                 in which case *flags will have one or more
- *                 MBEDTLS_X509_BADCERT_XXX or MBEDTLS_X509_BADCRL_XXX flags
- *                 set,
- *                 or another error in case of a fatal error encountered
- *                 during the verification process.
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param profile  The security profile to use for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         \c 0 if the chain is valid with respect to the
+ *                 passed CN, CAs, CRLs and security profile.
+ * \return         #MBEDTLS_ERR_X509_CERT_VERIFY_FAILED in case the
+ *                 certificate chain verification failed. In this case,
+ *                 \c *flags will have one or more
+ *                 \c MBEDTLS_X509_BADCERT_XXX or \c MBEDTLS_X509_BADCRL_XXX
+ *                 flags set.
+ * \return         Another negative error code in case of a fatal error
+ *                 encountered during the verification process.
  */
 int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt,
                      mbedtls_x509_crt *trust_ca,
@@ -466,16 +670,20 @@ int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt,
  *                 but can return early and restart according to the limit
  *                 set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
  *
- * \param crt      a certificate (chain) to be verified
- * \param trust_ca the list of trusted CAs
- * \param ca_crl   the list of CRLs for trusted CAs
- * \param profile  security profile for verification
- * \param cn       expected Common Name (can be set to
- *                 NULL if the CN must not be verified)
- * \param flags    result of the verification
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
- * \param rs_ctx   restart context (NULL to disable restart)
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param profile  The security profile to use for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ * \param rs_ctx   The restart context to use. This may be set to \c NULL
+ *                 to disable restartable ECC.
  *
  * \return         See \c mbedtls_crt_verify_with_profile(), or
  * \return         #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
@@ -490,6 +698,73 @@ int mbedtls_x509_crt_verify_restartable( mbedtls_x509_crt *crt,
                      void *p_vrfy,
                      mbedtls_x509_crt_restart_ctx *rs_ctx );
 
+/**
+ * \brief               The type of trusted certificate callbacks.
+ *
+ *                      Callbacks of this type are passed to and used by the CRT
+ *                      verification routine mbedtls_x509_crt_verify_with_ca_cb()
+ *                      when looking for trusted signers of a given certificate.
+ *
+ *                      On success, the callback returns a list of trusted
+ *                      certificates to be considered as potential signers
+ *                      for the input certificate.
+ *
+ * \param p_ctx         An opaque context passed to the callback.
+ * \param child         The certificate for which to search a potential signer.
+ *                      This will point to a readable certificate.
+ * \param candidate_cas The address at which to store the address of the first
+ *                      entry in the generated linked list of candidate signers.
+ *                      This will not be \c NULL.
+ *
+ * \note                The callback must only return a non-zero value on a
+ *                      fatal error. If, in contrast, the search for a potential
+ *                      signer completes without a single candidate, the
+ *                      callback must return \c 0 and set \c *candidate_cas
+ *                      to \c NULL.
+ *
+ * \return              \c 0 on success. In this case, \c *candidate_cas points
+ *                      to a heap-allocated linked list of instances of
+ *                      ::mbedtls_x509_crt, and ownership of this list is passed
+ *                      to the caller.
+ * \return              A negative error code on failure.
+ */
+typedef int (*mbedtls_x509_crt_ca_cb_t)( void *p_ctx,
+                                         mbedtls_x509_crt const *child,
+                                         mbedtls_x509_crt **candidate_cas );
+
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+/**
+ * \brief          Version of \c mbedtls_x509_crt_verify_with_profile() which
+ *                 uses a callback to acquire the list of trusted CA
+ *                 certificates.
+ *
+ * \param crt      The certificate chain to be verified.
+ * \param f_ca_cb  The callback to be used to query for potential signers
+ *                 of a given child certificate. See the documentation of
+ *                 ::mbedtls_x509_crt_ca_cb_t for more information.
+ * \param p_ca_cb  The opaque context to be passed to \p f_ca_cb.
+ * \param profile  The security profile for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         See \c mbedtls_crt_verify_with_profile().
+ */
+int mbedtls_x509_crt_verify_with_ca_cb( mbedtls_x509_crt *crt,
+                     mbedtls_x509_crt_ca_cb_t f_ca_cb,
+                     void *p_ca_cb,
+                     const mbedtls_x509_crt_profile *profile,
+                     const char *cn, uint32_t *flags,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy );
+
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
+
 #if defined(MBEDTLS_X509_CHECK_KEY_USAGE)
 /**
  * \brief          Check usage of certificate against keyUsage extension.
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h
index 5dfb4213e8d..b1dfc21f1fb 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_CSR_H
 #define MBEDTLS_X509_CSR_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "x509.h"
+#include "mbedtls/x509.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/xtea.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/xtea.h
index cd6d3753d13..4bdc711fda0 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/xtea.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/xtea.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_XTEA_H
 #define MBEDTLS_XTEA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -61,10 +34,12 @@
 #define MBEDTLS_XTEA_ENCRYPT     1
 #define MBEDTLS_XTEA_DECRYPT     0
 
-#define MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH             -0x0028  /**< The data input has an invalid length. */
+/** The data input has an invalid length. */
+#define MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH             -0x0028
 
 /* MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED                  -0x0029  /**< XTEA hardware accelerator failed. */
+/** XTEA hardware accelerator failed. */
+#define MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED                  -0x0029
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto.h
new file mode 100644
index 00000000000..b0b57c3a6ba
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto.h
@@ -0,0 +1,3956 @@
+/**
+ * \file psa/crypto.h
+ * \brief Platform Security Architecture cryptography module
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_H
+#define PSA_CRYPTO_H
+
+#include "crypto_platform.h"
+
+#include <stddef.h>
+
+#ifdef __DOXYGEN_ONLY__
+/* This __DOXYGEN_ONLY__ block contains mock definitions for things that
+ * must be defined in the crypto_platform.h header. These mock definitions
+ * are present in this file as a convenience to generate pretty-printed
+ * documentation that includes those definitions. */
+
+/** \defgroup platform Implementation-specific definitions
+ * @{
+ */
+
+/**@}*/
+#endif /* __DOXYGEN_ONLY__ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* The file "crypto_types.h" declares types that encode errors,
+ * algorithms, key types, policies, etc. */
+#include "crypto_types.h"
+
+/** \defgroup version API version
+ * @{
+ */
+
+/**
+ * The major version of this implementation of the PSA Crypto API
+ */
+#define PSA_CRYPTO_API_VERSION_MAJOR 1
+
+/**
+ * The minor version of this implementation of the PSA Crypto API
+ */
+#define PSA_CRYPTO_API_VERSION_MINOR 0
+
+/**@}*/
+
+/* The file "crypto_values.h" declares macros to build and analyze values
+ * of integral types defined in "crypto_types.h". */
+#include "crypto_values.h"
+
+/** \defgroup initialization Library initialization
+ * @{
+ */
+
+/**
+ * \brief Library initialization.
+ *
+ * Applications must call this function before calling any other
+ * function in this module.
+ *
+ * Applications may call this function more than once. Once a call
+ * succeeds, subsequent calls are guaranteed to succeed.
+ *
+ * If the application calls other functions before calling psa_crypto_init(),
+ * the behavior is undefined. Implementations are encouraged to either perform
+ * the operation as if the library had been initialized or to return
+ * #PSA_ERROR_BAD_STATE or some other applicable error. In particular,
+ * implementations should not return a success status if the lack of
+ * initialization may have security implications, for example due to improper
+ * seeding of the random number generator.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ */
+psa_status_t psa_crypto_init(void);
+
+/**@}*/
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** \def PSA_KEY_ATTRIBUTES_INIT
+ *
+ * This macro returns a suitable initializer for a key attribute structure
+ * of type #psa_key_attributes_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_KEY_ATTRIBUTES_INIT {0}
+#endif
+
+/** Return an initial value for a key attributes structure.
+ */
+static psa_key_attributes_t psa_key_attributes_init(void);
+
+/** Declare a key as persistent and set its key identifier.
+ *
+ * If the attribute structure currently declares the key as volatile (which
+ * is the default content of an attribute structure), this function sets
+ * the lifetime attribute to #PSA_KEY_LIFETIME_PERSISTENT.
+ *
+ * This function does not access storage, it merely stores the given
+ * value in the structure.
+ * The persistent key will be written to storage when the attribute
+ * structure is passed to a key creation function such as
+ * psa_import_key(), psa_generate_key(),
+ * psa_key_derivation_output_key() or psa_copy_key().
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes  The attribute structure to write to.
+ * \param key              The persistent identifier for the key.
+ */
+static void psa_set_key_id( psa_key_attributes_t *attributes,
+                            mbedtls_svc_key_id_t key );
+
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+/** Set the owner identifier of a key.
+ *
+ * When key identifiers encode key owner identifiers, psa_set_key_id() does
+ * not allow to define in key attributes the owner of volatile keys as
+ * psa_set_key_id() enforces the key to be persistent.
+ *
+ * This function allows to set in key attributes the owner identifier of a
+ * key. It is intended to be used for volatile keys. For persistent keys,
+ * it is recommended to use the PSA Cryptography API psa_set_key_id() to define
+ * the owner of a key.
+ *
+ * \param[out] attributes  The attribute structure to write to.
+ * \param owner            The key owner identifier.
+ */
+static void mbedtls_set_key_owner_id( psa_key_attributes_t *attributes,
+                                      mbedtls_key_owner_id_t owner );
+#endif
+
+/** Set the location of a persistent key.
+ *
+ * To make a key persistent, you must give it a persistent key identifier
+ * with psa_set_key_id(). By default, a key that has a persistent identifier
+ * is stored in the default storage area identifier by
+ * #PSA_KEY_LIFETIME_PERSISTENT. Call this function to choose a storage
+ * area, or to explicitly declare the key as volatile.
+ *
+ * This function does not access storage, it merely stores the given
+ * value in the structure.
+ * The persistent key will be written to storage when the attribute
+ * structure is passed to a key creation function such as
+ * psa_import_key(), psa_generate_key(),
+ * psa_key_derivation_output_key() or psa_copy_key().
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param lifetime              The lifetime for the key.
+ *                              If this is #PSA_KEY_LIFETIME_VOLATILE, the
+ *                              key will be volatile, and the key identifier
+ *                              attribute is reset to 0.
+ */
+static void psa_set_key_lifetime(psa_key_attributes_t *attributes,
+                                 psa_key_lifetime_t lifetime);
+
+/** Retrieve the key identifier from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The persistent identifier stored in the attribute structure.
+ *         This value is unspecified if the attribute structure declares
+ *         the key as volatile.
+ */
+static mbedtls_svc_key_id_t psa_get_key_id(
+    const psa_key_attributes_t *attributes);
+
+/** Retrieve the lifetime from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The lifetime value stored in the attribute structure.
+ */
+static psa_key_lifetime_t psa_get_key_lifetime(
+    const psa_key_attributes_t *attributes);
+
+/** Declare usage flags for a key.
+ *
+ * Usage flags are part of a key's usage policy. They encode what
+ * kind of operations are permitted on the key. For more details,
+ * refer to the documentation of the type #psa_key_usage_t.
+ *
+ * This function overwrites any usage flags
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param usage_flags           The usage flags to write.
+ */
+static void psa_set_key_usage_flags(psa_key_attributes_t *attributes,
+                                    psa_key_usage_t usage_flags);
+
+/** Retrieve the usage flags from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The usage flags stored in the attribute structure.
+ */
+static psa_key_usage_t psa_get_key_usage_flags(
+    const psa_key_attributes_t *attributes);
+
+/** Declare the permitted algorithm policy for a key.
+ *
+ * The permitted algorithm policy of a key encodes which algorithm or
+ * algorithms are permitted to be used with this key. The following
+ * algorithm policies are supported:
+ * - 0 does not allow any cryptographic operation with the key. The key
+ *   may be used for non-cryptographic actions such as exporting (if
+ *   permitted by the usage flags).
+ * - An algorithm value permits this particular algorithm.
+ * - An algorithm wildcard built from #PSA_ALG_ANY_HASH allows the specified
+ *   signature scheme with any hash algorithm.
+ * - An algorithm built from #PSA_ALG_AT_LEAST_THIS_LENGTH_MAC allows
+ *   any MAC algorithm from the same base class (e.g. CMAC) which
+ *   generates/verifies a MAC length greater than or equal to the length
+ *   encoded in the wildcard algorithm.
+ * - An algorithm built from #PSA_ALG_AEAD_WITH_AT_LEAST_THIS_LENGTH_TAG
+ *   allows any AEAD algorithm from the same base class (e.g. CCM) which
+ *   generates/verifies a tag length greater than or equal to the length
+ *   encoded in the wildcard algorithm.
+ *
+ * This function overwrites any algorithm policy
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param alg                   The permitted algorithm policy to write.
+ */
+static void psa_set_key_algorithm(psa_key_attributes_t *attributes,
+                                  psa_algorithm_t alg);
+
+
+/** Retrieve the algorithm policy from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The algorithm stored in the attribute structure.
+ */
+static psa_algorithm_t psa_get_key_algorithm(
+    const psa_key_attributes_t *attributes);
+
+/** Declare the type of a key.
+ *
+ * This function overwrites any key type
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param type                  The key type to write.
+ *                              If this is 0, the key type in \p attributes
+ *                              becomes unspecified.
+ */
+static void psa_set_key_type(psa_key_attributes_t *attributes,
+                             psa_key_type_t type);
+
+
+/** Declare the size of a key.
+ *
+ * This function overwrites any key size previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param bits                  The key size in bits.
+ *                              If this is 0, the key size in \p attributes
+ *                              becomes unspecified. Keys of size 0 are
+ *                              not supported.
+ */
+static void psa_set_key_bits(psa_key_attributes_t *attributes,
+                             size_t bits);
+
+/** Retrieve the key type from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The key type stored in the attribute structure.
+ */
+static psa_key_type_t psa_get_key_type(const psa_key_attributes_t *attributes);
+
+/** Retrieve the key size from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The key size stored in the attribute structure, in bits.
+ */
+static size_t psa_get_key_bits(const psa_key_attributes_t *attributes);
+
+/** Retrieve the attributes of a key.
+ *
+ * This function first resets the attribute structure as with
+ * psa_reset_key_attributes(). It then copies the attributes of
+ * the given key into the given attribute structure.
+ *
+ * \note This function may allocate memory or other resources.
+ *       Once you have called this function on an attribute structure,
+ *       you must call psa_reset_key_attributes() to free these resources.
+ *
+ * \param[in] key               Identifier of the key to query.
+ * \param[in,out] attributes    On success, the attributes of the key.
+ *                              On failure, equivalent to a
+ *                              freshly-initialized structure.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_get_key_attributes(mbedtls_svc_key_id_t key,
+                                    psa_key_attributes_t *attributes);
+
+/** Reset a key attribute structure to a freshly initialized state.
+ *
+ * You must initialize the attribute structure as described in the
+ * documentation of the type #psa_key_attributes_t before calling this
+ * function. Once the structure has been initialized, you may call this
+ * function at any time.
+ *
+ * This function frees any auxiliary resources that the structure
+ * may contain.
+ *
+ * \param[in,out] attributes    The attribute structure to reset.
+ */
+void psa_reset_key_attributes(psa_key_attributes_t *attributes);
+
+/**@}*/
+
+/** \defgroup key_management Key management
+ * @{
+ */
+
+/** Remove non-essential copies of key material from memory.
+ *
+ * If the key identifier designates a volatile key, this functions does not do
+ * anything and returns successfully.
+ *
+ * If the key identifier designates a persistent key, then this function will
+ * free all resources associated with the key in volatile memory. The key
+ * data in persistent storage is not affected and the key can still be used.
+ *
+ * \param key Identifier of the key to purge.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key material will have been removed from memory if it is not
+ *         currently required.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not a valid key identifier.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_purge_key(mbedtls_svc_key_id_t key);
+
+/** Make a copy of a key.
+ *
+ * Copy key material from one location to another.
+ *
+ * This function is primarily useful to copy a key from one location
+ * to another, since it populates a key using the material from
+ * another key which may have a different lifetime.
+ *
+ * This function may be used to share a key with a different party,
+ * subject to implementation-defined restrictions on key sharing.
+ *
+ * The policy on the source key must have the usage flag
+ * #PSA_KEY_USAGE_COPY set.
+ * This flag is sufficient to permit the copy if the key has the lifetime
+ * #PSA_KEY_LIFETIME_VOLATILE or #PSA_KEY_LIFETIME_PERSISTENT.
+ * Some secure elements do not provide a way to copy a key without
+ * making it extractable from the secure element. If a key is located
+ * in such a secure element, then the key must have both usage flags
+ * #PSA_KEY_USAGE_COPY and #PSA_KEY_USAGE_EXPORT in order to make
+ * a copy of the key outside the secure element.
+ *
+ * The resulting key may only be used in a way that conforms to
+ * both the policy of the original key and the policy specified in
+ * the \p attributes parameter:
+ * - The usage flags on the resulting key are the bitwise-and of the
+ *   usage flags on the source policy and the usage flags in \p attributes.
+ * - If both allow the same algorithm or wildcard-based
+ *   algorithm policy, the resulting key has the same algorithm policy.
+ * - If either of the policies allows an algorithm and the other policy
+ *   allows a wildcard-based algorithm policy that includes this algorithm,
+ *   the resulting key allows the same algorithm.
+ * - If the policies do not allow any algorithm in common, this function
+ *   fails with the status #PSA_ERROR_INVALID_ARGUMENT.
+ *
+ * The effect of this function on implementation-defined attributes is
+ * implementation-defined.
+ *
+ * \param source_key        The key to copy. It must allow the usage
+ *                          #PSA_KEY_USAGE_COPY. If a private or secret key is
+ *                          being copied outside of a secure element it must
+ *                          also allow #PSA_KEY_USAGE_EXPORT.
+ * \param[in] attributes    The attributes for the new key.
+ *                          They are used as follows:
+ *                          - The key type and size may be 0. If either is
+ *                            nonzero, it must match the corresponding
+ *                            attribute of the source key.
+ *                          - The key location (the lifetime and, for
+ *                            persistent keys, the key identifier) is
+ *                            used directly.
+ *                          - The policy constraints (usage flags and
+ *                            algorithm policy) are combined from
+ *                            the source key and \p attributes so that
+ *                            both sets of restrictions apply, as
+ *                            described in the documentation of this function.
+ * \param[out] target_key   On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p source_key is invalid.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The lifetime or identifier in \p attributes are invalid.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The policy constraints on the source and specified in
+ *         \p attributes are incompatible.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p attributes specifies a key type or key size
+ *         which does not match the attributes of the source key.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The source key does not have the #PSA_KEY_USAGE_COPY usage flag.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The source key is not exportable and its lifetime does not
+ *         allow copying it to the target's lifetime.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_copy_key(mbedtls_svc_key_id_t source_key,
+                          const psa_key_attributes_t *attributes,
+                          mbedtls_svc_key_id_t *target_key);
+
+
+/**
+ * \brief Destroy a key.
+ *
+ * This function destroys a key from both volatile
+ * memory and, if applicable, non-volatile storage. Implementations shall
+ * make a best effort to ensure that that the key material cannot be recovered.
+ *
+ * This function also erases any metadata such as policies and frees
+ * resources associated with the key.
+ *
+ * If a key is currently in use in a multipart operation, then destroying the
+ * key will cause the multipart operation to fail.
+ *
+ * \param key  Identifier of the key to erase. If this is \c 0, do nothing and
+ *             return #PSA_SUCCESS.
+ *
+ * \retval #PSA_SUCCESS
+ *         \p key was a valid identifier and the key material that it
+ *         referred to has been erased. Alternatively, \p key is \c 0.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key cannot be erased because it is
+ *         read-only, either due to a policy or due to physical restrictions.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p key is not a valid identifier nor \c 0.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ *         There was an failure in communication with the cryptoprocessor.
+ *         The key material may still be present in the cryptoprocessor.
+ * \retval #PSA_ERROR_DATA_INVALID
+ *         This error is typically a result of either storage corruption on a
+ *         cleartext storage backend, or an attempt to read data that was
+ *         written by an incompatible version of the library.
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The storage is corrupted. Implementations shall make a best effort
+ *         to erase key material even in this stage, however applications
+ *         should be aware that it may be impossible to guarantee that the
+ *         key material is not recoverable in such cases.
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ *         An unexpected condition which is not a storage corruption or
+ *         a communication failure occurred. The cryptoprocessor may have
+ *         been compromised.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_destroy_key(mbedtls_svc_key_id_t key);
+
+/**@}*/
+
+/** \defgroup import_export Key import and export
+ * @{
+ */
+
+/**
+ * \brief Import a key in binary format.
+ *
+ * This function supports any output from psa_export_key(). Refer to the
+ * documentation of psa_export_public_key() for the format of public keys
+ * and to the documentation of psa_export_key() for the format for
+ * other key types.
+ *
+ * The key data determines the key size. The attributes may optionally
+ * specify a key size; in this case it must match the size determined
+ * from the key data. A key size of 0 in \p attributes indicates that
+ * the key size is solely determined by the key data.
+ *
+ * Implementations must reject an attempt to import a key of size 0.
+ *
+ * This specification supports a single format for each key type.
+ * Implementations may support other formats as long as the standard
+ * format is supported. Implementations that support other formats
+ * should ensure that the formats are clearly unambiguous so as to
+ * minimize the risk that an invalid input is accidentally interpreted
+ * according to a different format.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ *                          The key size is always determined from the
+ *                          \p data buffer.
+ *                          If the key size in \p attributes is nonzero,
+ *                          it must be equal to the size from \p data.
+ * \param[out] key          On success, an identifier to the newly created key.
+ *                          For persistent keys, this is the key identifier
+ *                          defined in \p attributes.
+ *                          \c 0 on failure.
+ * \param[in] data    Buffer containing the key data. The content of this
+ *                    buffer is interpreted according to the type declared
+ *                    in \p attributes.
+ *                    All implementations must support at least the format
+ *                    described in the documentation
+ *                    of psa_export_key() or psa_export_public_key() for
+ *                    the chosen type. Implementations may allow other
+ *                    formats, but should be conservative: implementations
+ *                    should err on the side of rejecting content if it
+ *                    may be erroneous (e.g. wrong type or truncated data).
+ * \param data_length Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The key type or key size is not supported, either by the
+ *         implementation in general or in this particular persistent location.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key attributes, as a whole, are invalid.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key data is not correctly formatted.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size in \p attributes is nonzero and does not match the size
+ *         of the key data.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_import_key(const psa_key_attributes_t *attributes,
+                            const uint8_t *data,
+                            size_t data_length,
+                            mbedtls_svc_key_id_t *key);
+
+
+
+/**
+ * \brief Export a key in binary format.
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an equivalent object.
+ *
+ * If the implementation of psa_import_key() supports other formats
+ * beyond the format specified here, the output from psa_export_key()
+ * must use the representation specified here, not the original
+ * representation.
+ *
+ * For standard key types, the output format is as follows:
+ *
+ * - For symmetric keys (including MAC keys), the format is the
+ *   raw bytes of the key.
+ * - For DES, the key data consists of 8 bytes. The parity bits must be
+ *   correct.
+ * - For Triple-DES, the format is the concatenation of the
+ *   two or three DES keys.
+ * - For RSA key pairs (#PSA_KEY_TYPE_RSA_KEY_PAIR), the format
+ *   is the non-encrypted DER encoding of the representation defined by
+ *   PKCS\#1 (RFC 8017) as `RSAPrivateKey`, version 0.
+ *   ```
+ *   RSAPrivateKey ::= SEQUENCE {
+ *       version             INTEGER,  -- must be 0
+ *       modulus             INTEGER,  -- n
+ *       publicExponent      INTEGER,  -- e
+ *       privateExponent     INTEGER,  -- d
+ *       prime1              INTEGER,  -- p
+ *       prime2              INTEGER,  -- q
+ *       exponent1           INTEGER,  -- d mod (p-1)
+ *       exponent2           INTEGER,  -- d mod (q-1)
+ *       coefficient         INTEGER,  -- (inverse of q) mod p
+ *   }
+ *   ```
+ * - For elliptic curve key pairs (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_KEY_PAIR is true), the format is
+ *   a representation of the private value as a `ceiling(m/8)`-byte string
+ *   where `m` is the bit size associated with the curve, i.e. the bit size
+ *   of the order of the curve's coordinate field. This byte string is
+ *   in little-endian order for Montgomery curves (curve types
+ *   `PSA_ECC_FAMILY_CURVEXXX`), and in big-endian order for Weierstrass
+ *   curves (curve types `PSA_ECC_FAMILY_SECTXXX`, `PSA_ECC_FAMILY_SECPXXX`
+ *   and `PSA_ECC_FAMILY_BRAINPOOL_PXXX`).
+ *   For Weierstrass curves, this is the content of the `privateKey` field of
+ *   the `ECPrivateKey` format defined by RFC 5915.  For Montgomery curves,
+ *   the format is defined by RFC 7748, and output is masked according to §5.
+ *   For twisted Edwards curves, the private key is as defined by RFC 8032
+ *   (a 32-byte string for Edwards25519, a 57-byte string for Edwards448).
+ * - For Diffie-Hellman key exchange key pairs (key types for which
+ *   #PSA_KEY_TYPE_IS_DH_KEY_PAIR is true), the
+ *   format is the representation of the private key `x` as a big-endian byte
+ *   string. The length of the byte string is the private key size in bytes
+ *   (leading zeroes are not stripped).
+ * - For public keys (key types for which #PSA_KEY_TYPE_IS_PUBLIC_KEY is
+ *   true), the format is the same as for psa_export_public_key().
+ *
+ * The policy on the key must have the usage flag #PSA_KEY_USAGE_EXPORT set.
+ *
+ * \param key               Identifier of the key to export. It must allow the
+ *                          usage #PSA_KEY_USAGE_EXPORT, unless it is a public
+ *                          key.
+ * \param[out] data         Buffer where the key data is to be written.
+ * \param data_size         Size of the \p data buffer in bytes.
+ * \param[out] data_length  On success, the number of bytes
+ *                          that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_EXPORT flag.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p data buffer is too small. You can determine a
+ *         sufficient buffer size by calling
+ *         #PSA_EXPORT_KEY_OUTPUT_SIZE(\c type, \c bits)
+ *         where \c type is the key type
+ *         and \c bits is the key size in bits.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_export_key(mbedtls_svc_key_id_t key,
+                            uint8_t *data,
+                            size_t data_size,
+                            size_t *data_length);
+
+/**
+ * \brief Export a public key or the public part of a key pair in binary format.
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an object that is equivalent to the public key.
+ *
+ * This specification supports a single format for each key type.
+ * Implementations may support other formats as long as the standard
+ * format is supported. Implementations that support other formats
+ * should ensure that the formats are clearly unambiguous so as to
+ * minimize the risk that an invalid input is accidentally interpreted
+ * according to a different format.
+ *
+ * For standard key types, the output format is as follows:
+ * - For RSA public keys (#PSA_KEY_TYPE_RSA_PUBLIC_KEY), the DER encoding of
+ *   the representation defined by RFC 3279 &sect;2.3.1 as `RSAPublicKey`.
+ *   ```
+ *   RSAPublicKey ::= SEQUENCE {
+ *      modulus            INTEGER,    -- n
+ *      publicExponent     INTEGER  }  -- e
+ *   ```
+ * - For elliptic curve keys on a twisted Edwards curve (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY is true and #PSA_KEY_TYPE_ECC_GET_FAMILY
+ *   returns #PSA_ECC_FAMILY_TWISTED_EDWARDS), the public key is as defined
+ *   by RFC 8032
+ *   (a 32-byte string for Edwards25519, a 57-byte string for Edwards448).
+ * - For other elliptic curve public keys (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY is true), the format is the uncompressed
+ *   representation defined by SEC1 &sect;2.3.3 as the content of an ECPoint.
+ *   Let `m` be the bit size associated with the curve, i.e. the bit size of
+ *   `q` for a curve over `F_q`. The representation consists of:
+ *      - The byte 0x04;
+ *      - `x_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - `y_P` as a `ceiling(m/8)`-byte string, big-endian.
+ * - For Diffie-Hellman key exchange public keys (key types for which
+ *   #PSA_KEY_TYPE_IS_DH_PUBLIC_KEY is true),
+ *   the format is the representation of the public key `y = g^x mod p` as a
+ *   big-endian byte string. The length of the byte string is the length of the
+ *   base prime `p` in bytes.
+ *
+ * Exporting a public key object or the public part of a key pair is
+ * always permitted, regardless of the key's usage flags.
+ *
+ * \param key               Identifier of the key to export.
+ * \param[out] data         Buffer where the key data is to be written.
+ * \param data_size         Size of the \p data buffer in bytes.
+ * \param[out] data_length  On success, the number of bytes
+ *                          that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key is neither a public key nor a key pair.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p data buffer is too small. You can determine a
+ *         sufficient buffer size by calling
+ *         #PSA_EXPORT_KEY_OUTPUT_SIZE(#PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(\c type), \c bits)
+ *         where \c type is the key type
+ *         and \c bits is the key size in bits.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_export_public_key(mbedtls_svc_key_id_t key,
+                                   uint8_t *data,
+                                   size_t data_size,
+                                   size_t *data_length);
+
+
+
+/**@}*/
+
+/** \defgroup hash Message digests
+ * @{
+ */
+
+/** Calculate the hash (digest) of a message.
+ *
+ * \note To verify the hash of a message against an
+ *       expected value, use psa_hash_compare() instead.
+ *
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ * \param[in] input         Buffer containing the message to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] hash         Buffer where the hash is to be written.
+ * \param hash_size         Size of the \p hash buffer in bytes.
+ * \param[out] hash_length  On success, the number of bytes
+ *                          that make up the hash value. This is always
+ *                          #PSA_HASH_LENGTH(\p alg).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p hash_size is too small
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_compute(psa_algorithm_t alg,
+                              const uint8_t *input,
+                              size_t input_length,
+                              uint8_t *hash,
+                              size_t hash_size,
+                              size_t *hash_length);
+
+/** Calculate the hash (digest) of a message and compare it with a
+ * reference value.
+ *
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ * \param[in] input         Buffer containing the message to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] hash         Buffer containing the expected hash value.
+ * \param hash_length       Size of the \p hash buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected hash is identical to the actual hash of the input.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The hash of the message was calculated successfully, but it
+ *         differs from the expected hash.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p input_length or \p hash_length do not match the hash size for \p alg
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_compare(psa_algorithm_t alg,
+                              const uint8_t *input,
+                              size_t input_length,
+                              const uint8_t *hash,
+                              size_t hash_length);
+
+/** The type of the state data structure for multipart hash operations.
+ *
+ * Before calling any function on a hash operation object, the application must
+ * initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_hash_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_hash_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_HASH_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_hash_operation_t operation = PSA_HASH_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_hash_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_hash_operation_t operation;
+ *   operation = psa_hash_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_hash_operation_s psa_hash_operation_t;
+
+/** \def PSA_HASH_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a hash operation object
+ * of type #psa_hash_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_HASH_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a hash operation object.
+ */
+static psa_hash_operation_t psa_hash_operation_init(void);
+
+/** Set up a multipart hash operation.
+ *
+ * The sequence of operations to calculate a hash (message digest)
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_hash_operation_t, e.g. #PSA_HASH_OPERATION_INIT.
+ * -# Call psa_hash_setup() to specify the algorithm.
+ * -# Call psa_hash_update() zero, one or more times, passing a fragment
+ *    of the message each time. The hash that is calculated is the hash
+ *    of the concatenation of these messages in order.
+ * -# To calculate the hash, call psa_hash_finish().
+ *    To compare the hash with an expected value, call psa_hash_verify().
+ *
+ * If an error occurs at any step after a call to psa_hash_setup(), the
+ * operation will need to be reset by a call to psa_hash_abort(). The
+ * application may call psa_hash_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_hash_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_hash_finish() or psa_hash_verify().
+ * - A call to psa_hash_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_hash_operation_t and not yet in use.
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not a supported hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p alg is not a hash algorithm.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_setup(psa_hash_operation_t *operation,
+                            psa_algorithm_t alg);
+
+/** Add a message fragment to a multipart hash operation.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \param[in,out] operation Active hash operation.
+ * \param[in] input         Buffer containing the message fragment to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it muct be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_update(psa_hash_operation_t *operation,
+                             const uint8_t *input,
+                             size_t input_length);
+
+/** Finish the calculation of the hash of a message.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ * This function calculates the hash of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_hash_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \warning Applications should not call this function if they expect
+ *          a specific value for the hash. Call psa_hash_verify() instead.
+ *          Beware that comparing integrity or authenticity data such as
+ *          hash values with a function such as \c memcmp is risky
+ *          because the time taken by the comparison may leak information
+ *          about the hashed data which could allow an attacker to guess
+ *          a valid hash and thereby bypass security controls.
+ *
+ * \param[in,out] operation     Active hash operation.
+ * \param[out] hash             Buffer where the hash is to be written.
+ * \param hash_size             Size of the \p hash buffer in bytes.
+ * \param[out] hash_length      On success, the number of bytes
+ *                              that make up the hash value. This is always
+ *                              #PSA_HASH_LENGTH(\c alg) where \c alg is the
+ *                              hash algorithm that is calculated.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p hash buffer is too small. You can determine a
+ *         sufficient buffer size by calling #PSA_HASH_LENGTH(\c alg)
+ *         where \c alg is the hash algorithm that is calculated.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_finish(psa_hash_operation_t *operation,
+                             uint8_t *hash,
+                             size_t hash_size,
+                             size_t *hash_length);
+
+/** Finish the calculation of the hash of a message and compare it with
+ * an expected value.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ * This function calculates the hash of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_hash_update(). It then
+ * compares the calculated hash with the expected hash passed as a
+ * parameter to this function.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual hash and the expected hash is performed
+ * in constant time.
+ *
+ * \param[in,out] operation     Active hash operation.
+ * \param[in] hash              Buffer containing the expected hash value.
+ * \param hash_length           Size of the \p hash buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected hash is identical to the actual hash of the message.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The hash of the message was calculated successfully, but it
+ *         differs from the expected hash.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_verify(psa_hash_operation_t *operation,
+                             const uint8_t *hash,
+                             size_t hash_length);
+
+/** Abort a hash operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_hash_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized by one of the methods described in #psa_hash_operation_t.
+ *
+ * In particular, calling psa_hash_abort() after the operation has been
+ * terminated by a call to psa_hash_abort(), psa_hash_finish() or
+ * psa_hash_verify() is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized hash operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_abort(psa_hash_operation_t *operation);
+
+/** Clone a hash operation.
+ *
+ * This function copies the state of an ongoing hash operation to
+ * a new operation object. In other words, this function is equivalent
+ * to calling psa_hash_setup() on \p target_operation with the same
+ * algorithm that \p source_operation was set up for, then
+ * psa_hash_update() on \p target_operation with the same input that
+ * that was passed to \p source_operation. After this function returns, the
+ * two objects are independent, i.e. subsequent calls involving one of
+ * the objects do not affect the other object.
+ *
+ * \param[in] source_operation      The active hash operation to clone.
+ * \param[in,out] target_operation  The operation object to set up.
+ *                                  It must be initialized but not active.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The \p source_operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The \p target_operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_clone(const psa_hash_operation_t *source_operation,
+                            psa_hash_operation_t *target_operation);
+
+/**@}*/
+
+/** \defgroup MAC Message authentication codes
+ * @{
+ */
+
+/** Calculate the MAC (message authentication code) of a message.
+ *
+ * \note To verify the MAC of a message against an
+ *       expected value, use psa_mac_verify() instead.
+ *       Beware that comparing integrity or authenticity data such as
+ *       MAC values with a function such as \c memcmp is risky
+ *       because the time taken by the comparison may leak information
+ *       about the MAC value which could allow an attacker to guess
+ *       a valid MAC and thereby bypass security controls.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must allow the usage PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ * \param[in] input         Buffer containing the input message.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] mac          Buffer where the MAC value is to be written.
+ * \param mac_size          Size of the \p mac buffer in bytes.
+ * \param[out] mac_length   On success, the number of bytes
+ *                          that make up the MAC value.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p mac_size is too small
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_compute(mbedtls_svc_key_id_t key,
+                             psa_algorithm_t alg,
+                             const uint8_t *input,
+                             size_t input_length,
+                             uint8_t *mac,
+                             size_t mac_size,
+                             size_t *mac_length);
+
+/** Calculate the MAC of a message and compare it with a reference value.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must allow the usage PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ * \param[in] input         Buffer containing the input message.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] mac          Buffer containing the expected MAC value.
+ * \param mac_length        Size of the \p mac buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected MAC is identical to the actual MAC of the input.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The MAC of the message was calculated successfully, but it
+ *         differs from the expected value.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify(mbedtls_svc_key_id_t key,
+                            psa_algorithm_t alg,
+                            const uint8_t *input,
+                            size_t input_length,
+                            const uint8_t *mac,
+                            size_t mac_length);
+
+/** The type of the state data structure for multipart MAC operations.
+ *
+ * Before calling any function on a MAC operation object, the application must
+ * initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_mac_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_mac_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_MAC_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_mac_operation_t operation = PSA_MAC_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_mac_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_mac_operation_t operation;
+ *   operation = psa_mac_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_mac_operation_s psa_mac_operation_t;
+
+/** \def PSA_MAC_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a MAC operation object of type
+ * #psa_mac_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_MAC_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a MAC operation object.
+ */
+static psa_mac_operation_t psa_mac_operation_init(void);
+
+/** Set up a multipart MAC calculation operation.
+ *
+ * This function sets up the calculation of the MAC
+ * (message authentication code) of a byte string.
+ * To verify the MAC of a message against an
+ * expected value, use psa_mac_verify_setup() instead.
+ *
+ * The sequence of operations to calculate a MAC is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_mac_operation_t, e.g. #PSA_MAC_OPERATION_INIT.
+ * -# Call psa_mac_sign_setup() to specify the algorithm and key.
+ * -# Call psa_mac_update() zero, one or more times, passing a fragment
+ *    of the message each time. The MAC that is calculated is the MAC
+ *    of the concatenation of these messages in order.
+ * -# At the end of the message, call psa_mac_sign_finish() to finish
+ *    calculating the MAC value and retrieve it.
+ *
+ * If an error occurs at any step after a call to psa_mac_sign_setup(), the
+ * operation will need to be reset by a call to psa_mac_abort(). The
+ * application may call psa_mac_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_mac_sign_setup(), the application must
+ * eventually terminate the operation through one of the following methods:
+ * - A successful call to psa_mac_sign_finish().
+ * - A call to psa_mac_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_mac_operation_t and not yet in use.
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must remain valid until the operation terminates.
+ *                          It must allow the usage PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_sign_setup(psa_mac_operation_t *operation,
+                                mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg);
+
+/** Set up a multipart MAC verification operation.
+ *
+ * This function sets up the verification of the MAC
+ * (message authentication code) of a byte string against an expected value.
+ *
+ * The sequence of operations to verify a MAC is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_mac_operation_t, e.g. #PSA_MAC_OPERATION_INIT.
+ * -# Call psa_mac_verify_setup() to specify the algorithm and key.
+ * -# Call psa_mac_update() zero, one or more times, passing a fragment
+ *    of the message each time. The MAC that is calculated is the MAC
+ *    of the concatenation of these messages in order.
+ * -# At the end of the message, call psa_mac_verify_finish() to finish
+ *    calculating the actual MAC of the message and verify it against
+ *    the expected value.
+ *
+ * If an error occurs at any step after a call to psa_mac_verify_setup(), the
+ * operation will need to be reset by a call to psa_mac_abort(). The
+ * application may call psa_mac_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_mac_verify_setup(), the application must
+ * eventually terminate the operation through one of the following methods:
+ * - A successful call to psa_mac_verify_finish().
+ * - A call to psa_mac_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_mac_operation_t and not yet in use.
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must remain valid until the operation terminates.
+ *                          It must allow the usage
+ *                          PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c key is not compatible with \c alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify_setup(psa_mac_operation_t *operation,
+                                  mbedtls_svc_key_id_t key,
+                                  psa_algorithm_t alg);
+
+/** Add a message fragment to a multipart MAC operation.
+ *
+ * The application must call psa_mac_sign_setup() or psa_mac_verify_setup()
+ * before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[in] input         Buffer containing the message fragment to add to
+ *                          the MAC calculation.
+ * \param input_length      Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_update(psa_mac_operation_t *operation,
+                            const uint8_t *input,
+                            size_t input_length);
+
+/** Finish the calculation of the MAC of a message.
+ *
+ * The application must call psa_mac_sign_setup() before calling this function.
+ * This function calculates the MAC of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_mac_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \warning Applications should not call this function if they expect
+ *          a specific value for the MAC. Call psa_mac_verify_finish() instead.
+ *          Beware that comparing integrity or authenticity data such as
+ *          MAC values with a function such as \c memcmp is risky
+ *          because the time taken by the comparison may leak information
+ *          about the MAC value which could allow an attacker to guess
+ *          a valid MAC and thereby bypass security controls.
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[out] mac          Buffer where the MAC value is to be written.
+ * \param mac_size          Size of the \p mac buffer in bytes.
+ * \param[out] mac_length   On success, the number of bytes
+ *                          that make up the MAC value. This is always
+ *                          #PSA_MAC_LENGTH(\c key_type, \c key_bits, \c alg)
+ *                          where \c key_type and \c key_bits are the type and
+ *                          bit-size respectively of the key and \c alg is the
+ *                          MAC algorithm that is calculated.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active mac sign
+ *         operation).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p mac buffer is too small. You can determine a
+ *         sufficient buffer size by calling PSA_MAC_LENGTH().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_sign_finish(psa_mac_operation_t *operation,
+                                 uint8_t *mac,
+                                 size_t mac_size,
+                                 size_t *mac_length);
+
+/** Finish the calculation of the MAC of a message and compare it with
+ * an expected value.
+ *
+ * The application must call psa_mac_verify_setup() before calling this function.
+ * This function calculates the MAC of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_mac_update(). It then
+ * compares the calculated MAC with the expected MAC passed as a
+ * parameter to this function.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual MAC and the expected MAC is performed
+ * in constant time.
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[in] mac           Buffer containing the expected MAC value.
+ * \param mac_length        Size of the \p mac buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected MAC is identical to the actual MAC of the message.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The MAC of the message was calculated successfully, but it
+ *         differs from the expected MAC.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active mac verify
+ *         operation).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify_finish(psa_mac_operation_t *operation,
+                                   const uint8_t *mac,
+                                   size_t mac_length);
+
+/** Abort a MAC operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_mac_sign_setup() or psa_mac_verify_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized by one of the methods described in #psa_mac_operation_t.
+ *
+ * In particular, calling psa_mac_abort() after the operation has been
+ * terminated by a call to psa_mac_abort(), psa_mac_sign_finish() or
+ * psa_mac_verify_finish() is safe and has no effect.
+ *
+ * \param[in,out] operation Initialized MAC operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_abort(psa_mac_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup cipher Symmetric ciphers
+ * @{
+ */
+
+/** Encrypt a message using a symmetric cipher.
+ *
+ * This function encrypts a message with a random IV (initialization
+ * vector). Use the multipart operation interface with a
+ * #psa_cipher_operation_t object to provide other forms of IV.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must allow the usage #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param[in] input             Buffer containing the message to encrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ *                              The output contains the IV followed by
+ *                              the ciphertext proper.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_encrypt(mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg,
+                                const uint8_t *input,
+                                size_t input_length,
+                                uint8_t *output,
+                                size_t output_size,
+                                size_t *output_length);
+
+/** Decrypt a message using a symmetric cipher.
+ *
+ * This function decrypts a message encrypted with a symmetric cipher.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param[in] input             Buffer containing the message to decrypt.
+ *                              This consists of the IV followed by the
+ *                              ciphertext proper.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the plaintext is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_decrypt(mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg,
+                                const uint8_t *input,
+                                size_t input_length,
+                                uint8_t *output,
+                                size_t output_size,
+                                size_t *output_length);
+
+/** The type of the state data structure for multipart cipher operations.
+ *
+ * Before calling any function on a cipher operation object, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_cipher_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_cipher_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_CIPHER_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_cipher_operation_t operation = PSA_CIPHER_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_cipher_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_cipher_operation_t operation;
+ *   operation = psa_cipher_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_cipher_operation_s psa_cipher_operation_t;
+
+/** \def PSA_CIPHER_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a cipher operation object of
+ * type #psa_cipher_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_CIPHER_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a cipher operation object.
+ */
+static psa_cipher_operation_t psa_cipher_operation_init(void);
+
+/** Set the key for a multipart symmetric encryption operation.
+ *
+ * The sequence of operations to encrypt a message with a symmetric cipher
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_cipher_operation_t, e.g.
+ *    #PSA_CIPHER_OPERATION_INIT.
+ * -# Call psa_cipher_encrypt_setup() to specify the algorithm and key.
+ * -# Call either psa_cipher_generate_iv() or psa_cipher_set_iv() to
+ *    generate or set the IV (initialization vector). You should use
+ *    psa_cipher_generate_iv() unless the protocol you are implementing
+ *    requires a specific IV value.
+ * -# Call psa_cipher_update() zero, one or more times, passing a fragment
+ *    of the message each time.
+ * -# Call psa_cipher_finish().
+ *
+ * If an error occurs at any step after a call to psa_cipher_encrypt_setup(),
+ * the operation will need to be reset by a call to psa_cipher_abort(). The
+ * application may call psa_cipher_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_cipher_encrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_cipher_finish().
+ * - A call to psa_cipher_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_cipher_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_encrypt_setup(psa_cipher_operation_t *operation,
+                                      mbedtls_svc_key_id_t key,
+                                      psa_algorithm_t alg);
+
+/** Set the key for a multipart symmetric decryption operation.
+ *
+ * The sequence of operations to decrypt a message with a symmetric cipher
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_cipher_operation_t, e.g.
+ *    #PSA_CIPHER_OPERATION_INIT.
+ * -# Call psa_cipher_decrypt_setup() to specify the algorithm and key.
+ * -# Call psa_cipher_set_iv() with the IV (initialization vector) for the
+ *    decryption. If the IV is prepended to the ciphertext, you can call
+ *    psa_cipher_update() on a buffer containing the IV followed by the
+ *    beginning of the message.
+ * -# Call psa_cipher_update() zero, one or more times, passing a fragment
+ *    of the message each time.
+ * -# Call psa_cipher_finish().
+ *
+ * If an error occurs at any step after a call to psa_cipher_decrypt_setup(),
+ * the operation will need to be reset by a call to psa_cipher_abort(). The
+ * application may call psa_cipher_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_cipher_decrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_cipher_finish().
+ * - A call to psa_cipher_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_cipher_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_decrypt_setup(psa_cipher_operation_t *operation,
+                                      mbedtls_svc_key_id_t key,
+                                      psa_algorithm_t alg);
+
+/** Generate an IV for a symmetric encryption operation.
+ *
+ * This function generates a random IV (initialization vector), nonce
+ * or initial counter value for the encryption operation as appropriate
+ * for the chosen algorithm, key type and key size.
+ *
+ * The application must call psa_cipher_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[out] iv               Buffer where the generated IV is to be written.
+ * \param iv_size               Size of the \p iv buffer in bytes.
+ * \param[out] iv_length        On success, the number of bytes of the
+ *                              generated IV.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with no IV set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p iv buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_generate_iv(psa_cipher_operation_t *operation,
+                                    uint8_t *iv,
+                                    size_t iv_size,
+                                    size_t *iv_length);
+
+/** Set the IV for a symmetric encryption or decryption operation.
+ *
+ * This function sets the IV (initialization vector), nonce
+ * or initial counter value for the encryption or decryption operation.
+ *
+ * The application must call psa_cipher_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \note When encrypting, applications should use psa_cipher_generate_iv()
+ * instead of this function, unless implementing a protocol that requires
+ * a non-random IV.
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[in] iv                Buffer containing the IV to use.
+ * \param iv_length             Size of the IV in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active cipher
+ *         encrypt operation, with no IV set).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size of \p iv is not acceptable for the chosen algorithm,
+ *         or the chosen algorithm does not use an IV.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_set_iv(psa_cipher_operation_t *operation,
+                               const uint8_t *iv,
+                               size_t iv_length);
+
+/** Encrypt or decrypt a message fragment in an active cipher operation.
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_cipher_encrypt_setup() or psa_cipher_decrypt_setup().
+ *    The choice of setup function determines whether this function
+ *    encrypts or decrypts its input.
+ * 2. If the algorithm requires an IV, call psa_cipher_generate_iv()
+ *    (recommended when encrypting) or psa_cipher_set_iv().
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[in] input             Buffer containing the message fragment to
+ *                              encrypt or decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with an IV set
+ *         if required for the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_update(psa_cipher_operation_t *operation,
+                               const uint8_t *input,
+                               size_t input_length,
+                               uint8_t *output,
+                               size_t output_size,
+                               size_t *output_length);
+
+/** Finish encrypting or decrypting a message in a cipher operation.
+ *
+ * The application must call psa_cipher_encrypt_setup() or
+ * psa_cipher_decrypt_setup() before calling this function. The choice
+ * of setup function determines whether this function encrypts or
+ * decrypts its input.
+ *
+ * This function finishes the encryption or decryption of the message
+ * formed by concatenating the inputs passed to preceding calls to
+ * psa_cipher_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input size passed to this operation is not valid for
+ *         this particular algorithm. For example, the algorithm is a based
+ *         on block cipher and requires a whole number of blocks, but the
+ *         total input size is not a multiple of the block size.
+ * \retval #PSA_ERROR_INVALID_PADDING
+ *         This is a decryption operation for an algorithm that includes
+ *         padding, and the ciphertext does not contain valid padding.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with an IV set
+ *         if required for the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_finish(psa_cipher_operation_t *operation,
+                               uint8_t *output,
+                               size_t output_size,
+                               size_t *output_length);
+
+/** Abort a cipher operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_cipher_encrypt_setup() or psa_cipher_decrypt_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized as described in #psa_cipher_operation_t.
+ *
+ * In particular, calling psa_cipher_abort() after the operation has been
+ * terminated by a call to psa_cipher_abort() or psa_cipher_finish()
+ * is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized cipher operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_abort(psa_cipher_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup aead Authenticated encryption with associated data (AEAD)
+ * @{
+ */
+
+/** Process an authenticated encryption operation.
+ *
+ * \param key                     Identifier of the key to use for the
+ *                                operation. It must allow the usage
+ *                                #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                     The AEAD algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param[in] nonce               Nonce or IV to use.
+ * \param nonce_length            Size of the \p nonce buffer in bytes.
+ * \param[in] additional_data     Additional data that will be authenticated
+ *                                but not encrypted.
+ * \param additional_data_length  Size of \p additional_data in bytes.
+ * \param[in] plaintext           Data that will be authenticated and
+ *                                encrypted.
+ * \param plaintext_length        Size of \p plaintext in bytes.
+ * \param[out] ciphertext         Output buffer for the authenticated and
+ *                                encrypted data. The additional data is not
+ *                                part of this output. For algorithms where the
+ *                                encrypted data and the authentication tag
+ *                                are defined as separate outputs, the
+ *                                authentication tag is appended to the
+ *                                encrypted data.
+ * \param ciphertext_size         Size of the \p ciphertext buffer in bytes.
+ *                                This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\c key_type,
+ *                                  \p alg, \p plaintext_length) where
+ *                                  \c key_type is the type of \p key.
+ *                                - #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p
+ *                                  plaintext_length) evaluates to the maximum
+ *                                  ciphertext size of any supported AEAD
+ *                                  encryption.
+ * \param[out] ciphertext_length  On success, the size of the output
+ *                                in the \p ciphertext buffer.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p ciphertext_size is too small.
+ *         #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\c key_type, \p alg,
+ *         \p plaintext_length) or
+ *         #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p plaintext_length) can be used to
+ *         determine the required buffer size.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_encrypt(mbedtls_svc_key_id_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *nonce,
+                              size_t nonce_length,
+                              const uint8_t *additional_data,
+                              size_t additional_data_length,
+                              const uint8_t *plaintext,
+                              size_t plaintext_length,
+                              uint8_t *ciphertext,
+                              size_t ciphertext_size,
+                              size_t *ciphertext_length);
+
+/** Process an authenticated decryption operation.
+ *
+ * \param key                     Identifier of the key to use for the
+ *                                operation. It must allow the usage
+ *                                #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                     The AEAD algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param[in] nonce               Nonce or IV to use.
+ * \param nonce_length            Size of the \p nonce buffer in bytes.
+ * \param[in] additional_data     Additional data that has been authenticated
+ *                                but not encrypted.
+ * \param additional_data_length  Size of \p additional_data in bytes.
+ * \param[in] ciphertext          Data that has been authenticated and
+ *                                encrypted. For algorithms where the
+ *                                encrypted data and the authentication tag
+ *                                are defined as separate inputs, the buffer
+ *                                must contain the encrypted data followed
+ *                                by the authentication tag.
+ * \param ciphertext_length       Size of \p ciphertext in bytes.
+ * \param[out] plaintext          Output buffer for the decrypted data.
+ * \param plaintext_size          Size of the \p plaintext buffer in bytes.
+ *                                This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\c key_type,
+ *                                  \p alg, \p ciphertext_length) where
+ *                                  \c key_type is the type of \p key.
+ *                                - #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p
+ *                                  ciphertext_length) evaluates to the maximum
+ *                                  plaintext size of any supported AEAD
+ *                                  decryption.
+ * \param[out] plaintext_length   On success, the size of the output
+ *                                in the \p plaintext buffer.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The ciphertext is not authentic.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p plaintext_size is too small.
+ *         #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\c key_type, \p alg,
+ *         \p ciphertext_length) or
+ *         #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p ciphertext_length) can be used
+ *         to determine the required buffer size.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_decrypt(mbedtls_svc_key_id_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *nonce,
+                              size_t nonce_length,
+                              const uint8_t *additional_data,
+                              size_t additional_data_length,
+                              const uint8_t *ciphertext,
+                              size_t ciphertext_length,
+                              uint8_t *plaintext,
+                              size_t plaintext_size,
+                              size_t *plaintext_length);
+
+/** The type of the state data structure for multipart AEAD operations.
+ *
+ * Before calling any function on an AEAD operation object, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_aead_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_aead_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_AEAD_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_aead_operation_t operation = PSA_AEAD_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_aead_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_aead_operation_t operation;
+ *   operation = psa_aead_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_aead_operation_s psa_aead_operation_t;
+
+/** \def PSA_AEAD_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for an AEAD operation object of
+ * type #psa_aead_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_AEAD_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for an AEAD operation object.
+ */
+static psa_aead_operation_t psa_aead_operation_init(void);
+
+/** Set the key for a multipart authenticated encryption operation.
+ *
+ * The sequence of operations to encrypt a message with authentication
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_aead_operation_t, e.g.
+ *    #PSA_AEAD_OPERATION_INIT.
+ * -# Call psa_aead_encrypt_setup() to specify the algorithm and key.
+ * -# If needed, call psa_aead_set_lengths() to specify the length of the
+ *    inputs to the subsequent calls to psa_aead_update_ad() and
+ *    psa_aead_update(). See the documentation of psa_aead_set_lengths()
+ *    for details.
+ * -# Call either psa_aead_generate_nonce() or psa_aead_set_nonce() to
+ *    generate or set the nonce. You should use
+ *    psa_aead_generate_nonce() unless the protocol you are implementing
+ *    requires a specific nonce value.
+ * -# Call psa_aead_update_ad() zero, one or more times, passing a fragment
+ *    of the non-encrypted additional authenticated data each time.
+ * -# Call psa_aead_update() zero, one or more times, passing a fragment
+ *    of the message to encrypt each time.
+ * -# Call psa_aead_finish().
+ *
+ * If an error occurs at any step after a call to psa_aead_encrypt_setup(),
+ * the operation will need to be reset by a call to psa_aead_abort(). The
+ * application may call psa_aead_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_aead_encrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_aead_finish().
+ * - A call to psa_aead_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_aead_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The AEAD algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_encrypt_setup(psa_aead_operation_t *operation,
+                                    mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg);
+
+/** Set the key for a multipart authenticated decryption operation.
+ *
+ * The sequence of operations to decrypt a message with authentication
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_aead_operation_t, e.g.
+ *    #PSA_AEAD_OPERATION_INIT.
+ * -# Call psa_aead_decrypt_setup() to specify the algorithm and key.
+ * -# If needed, call psa_aead_set_lengths() to specify the length of the
+ *    inputs to the subsequent calls to psa_aead_update_ad() and
+ *    psa_aead_update(). See the documentation of psa_aead_set_lengths()
+ *    for details.
+ * -# Call psa_aead_set_nonce() with the nonce for the decryption.
+ * -# Call psa_aead_update_ad() zero, one or more times, passing a fragment
+ *    of the non-encrypted additional authenticated data each time.
+ * -# Call psa_aead_update() zero, one or more times, passing a fragment
+ *    of the ciphertext to decrypt each time.
+ * -# Call psa_aead_verify().
+ *
+ * If an error occurs at any step after a call to psa_aead_decrypt_setup(),
+ * the operation will need to be reset by a call to psa_aead_abort(). The
+ * application may call psa_aead_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_aead_decrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_aead_verify().
+ * - A call to psa_aead_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_aead_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The AEAD algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_decrypt_setup(psa_aead_operation_t *operation,
+                                    mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg);
+
+/** Generate a random nonce for an authenticated encryption operation.
+ *
+ * This function generates a random nonce for the authenticated encryption
+ * operation with an appropriate size for the chosen algorithm, key type
+ * and key size.
+ *
+ * The application must call psa_aead_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] nonce            Buffer where the generated nonce is to be
+ *                              written.
+ * \param nonce_size            Size of the \p nonce buffer in bytes.
+ * \param[out] nonce_length     On success, the number of bytes of the
+ *                              generated nonce.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active aead encrypt
+ *         operation, with no nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p nonce buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_generate_nonce(psa_aead_operation_t *operation,
+                                     uint8_t *nonce,
+                                     size_t nonce_size,
+                                     size_t *nonce_length);
+
+/** Set the nonce for an authenticated encryption or decryption operation.
+ *
+ * This function sets the nonce for the authenticated
+ * encryption or decryption operation.
+ *
+ * The application must call psa_aead_encrypt_setup() or
+ * psa_aead_decrypt_setup() before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \note When encrypting, applications should use psa_aead_generate_nonce()
+ * instead of this function, unless implementing a protocol that requires
+ * a non-random IV.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] nonce             Buffer containing the nonce to use.
+ * \param nonce_length          Size of the nonce in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with no nonce
+ *         set).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size of \p nonce is not acceptable for the chosen algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_set_nonce(psa_aead_operation_t *operation,
+                                const uint8_t *nonce,
+                                size_t nonce_length);
+
+/** Declare the lengths of the message and additional data for AEAD.
+ *
+ * The application must call this function before calling
+ * psa_aead_update_ad() or psa_aead_update() if the algorithm for
+ * the operation requires it. If the algorithm does not require it,
+ * calling this function is optional, but if this function is called
+ * then the implementation must enforce the lengths.
+ *
+ * You may call this function before or after setting the nonce with
+ * psa_aead_set_nonce() or psa_aead_generate_nonce().
+ *
+ * - For #PSA_ALG_CCM, calling this function is required.
+ * - For the other AEAD algorithms defined in this specification, calling
+ *   this function is not required.
+ * - For vendor-defined algorithm, refer to the vendor documentation.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param ad_length             Size of the non-encrypted additional
+ *                              authenticated data in bytes.
+ * \param plaintext_length      Size of the plaintext to encrypt in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, and
+ *         psa_aead_update_ad() and psa_aead_update() must not have been
+ *         called yet).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         At least one of the lengths is not acceptable for the chosen
+ *         algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_set_lengths(psa_aead_operation_t *operation,
+                                  size_t ad_length,
+                                  size_t plaintext_length);
+
+/** Pass additional data to an active AEAD operation.
+ *
+ * Additional data is authenticated, but not encrypted.
+ *
+ * You may call this function multiple times to pass successive fragments
+ * of the additional data. You may not call this function after passing
+ * data to encrypt or decrypt with psa_aead_update().
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_aead_encrypt_setup() or psa_aead_decrypt_setup().
+ * 2. Set the nonce with psa_aead_generate_nonce() or psa_aead_set_nonce().
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \warning When decrypting, until psa_aead_verify() has returned #PSA_SUCCESS,
+ *          there is no guarantee that the input is valid. Therefore, until
+ *          you have called psa_aead_verify() and it has returned #PSA_SUCCESS,
+ *          treat the input as untrusted and prepare to undo any action that
+ *          depends on the input if psa_aead_verify() returns an error status.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] input             Buffer containing the fragment of
+ *                              additional data.
+ * \param input_length          Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, have a nonce
+ *         set, have lengths set if required by the algorithm, and
+ *         psa_aead_update() must not have been called yet).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input length overflows the additional data length that
+ *         was previously specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_update_ad(psa_aead_operation_t *operation,
+                                const uint8_t *input,
+                                size_t input_length);
+
+/** Encrypt or decrypt a message fragment in an active AEAD operation.
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_aead_encrypt_setup() or psa_aead_decrypt_setup().
+ *    The choice of setup function determines whether this function
+ *    encrypts or decrypts its input.
+ * 2. Set the nonce with psa_aead_generate_nonce() or psa_aead_set_nonce().
+ * 3. Call psa_aead_update_ad() to pass all the additional data.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \warning When decrypting, until psa_aead_verify() has returned #PSA_SUCCESS,
+ *          there is no guarantee that the input is valid. Therefore, until
+ *          you have called psa_aead_verify() and it has returned #PSA_SUCCESS:
+ *          - Do not use the output in any way other than storing it in a
+ *            confidential location. If you take any action that depends
+ *            on the tentative decrypted data, this action will need to be
+ *            undone if the input turns out not to be valid. Furthermore,
+ *            if an adversary can observe that this action took place
+ *            (for example through timing), they may be able to use this
+ *            fact as an oracle to decrypt any message encrypted with the
+ *            same key.
+ *          - In particular, do not copy the output anywhere but to a
+ *            memory or storage space that you have exclusive access to.
+ *
+ * This function does not require the input to be aligned to any
+ * particular block boundary. If the implementation can only process
+ * a whole block at a time, it must consume all the input provided, but
+ * it may delay the end of the corresponding output until a subsequent
+ * call to psa_aead_update(), psa_aead_finish() or psa_aead_verify()
+ * provides sufficient input. The amount of data that can be delayed
+ * in this way is bounded by #PSA_AEAD_UPDATE_OUTPUT_SIZE.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] input             Buffer containing the message fragment to
+ *                              encrypt or decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_UPDATE_OUTPUT_SIZE(\c key_type,
+ *                                  \c alg, \p input_length) where
+ *                                  \c key_type is the type of key and \c alg is
+ *                                  the algorithm that were used to set up the
+ *                                  operation.
+ *                                - #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p
+ *                                  input_length) evaluates to the maximum
+ *                                  output size of any supported AEAD
+ *                                  algorithm.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, have a nonce
+ *         set, and have lengths set if required by the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ *         #PSA_AEAD_UPDATE_OUTPUT_SIZE(\c key_type, \c alg, \p input_length) or
+ *         #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p input_length) can be used to
+ *         determine the required buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input length overflows the plaintext length that
+ *         was previously specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_update(psa_aead_operation_t *operation,
+                             const uint8_t *input,
+                             size_t input_length,
+                             uint8_t *output,
+                             size_t output_size,
+                             size_t *output_length);
+
+/** Finish encrypting a message in an AEAD operation.
+ *
+ * The operation must have been set up with psa_aead_encrypt_setup().
+ *
+ * This function finishes the authentication of the additional data
+ * formed by concatenating the inputs passed to preceding calls to
+ * psa_aead_update_ad() with the plaintext formed by concatenating the
+ * inputs passed to preceding calls to psa_aead_update().
+ *
+ * This function has two output buffers:
+ * - \p ciphertext contains trailing ciphertext that was buffered from
+ *   preceding calls to psa_aead_update().
+ * - \p tag contains the authentication tag.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] ciphertext       Buffer where the last part of the ciphertext
+ *                              is to be written.
+ * \param ciphertext_size       Size of the \p ciphertext buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - A sufficient output size is
+ *                                #PSA_AEAD_FINISH_OUTPUT_SIZE(\c key_type,
+ *                                \c alg) where \c key_type is the type of key
+ *                                and \c alg is the algorithm that were used to
+ *                                set up the operation.
+ *                              - #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE evaluates to
+ *                                the maximum output size of any supported AEAD
+ *                                algorithm.
+ * \param[out] ciphertext_length On success, the number of bytes of
+ *                              returned ciphertext.
+ * \param[out] tag              Buffer where the authentication tag is
+ *                              to be written.
+ * \param tag_size              Size of the \p tag buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - The exact tag size is #PSA_AEAD_TAG_LENGTH(\c
+ *                                key_type, \c key_bits, \c alg) where
+ *                                \c key_type and \c key_bits are the type and
+ *                                bit-size of the key, and \c alg is the
+ *                                algorithm that were used in the call to
+ *                                psa_aead_encrypt_setup().
+ *                              - #PSA_AEAD_TAG_MAX_SIZE evaluates to the
+ *                                maximum tag size of any supported AEAD
+ *                                algorithm.
+ * \param[out] tag_length       On success, the number of bytes
+ *                              that make up the returned tag.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active encryption
+ *         operation with a nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p ciphertext or \p tag buffer is too small.
+ *         #PSA_AEAD_FINISH_OUTPUT_SIZE(\c key_type, \c alg) or
+ *         #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE can be used to determine the
+ *         required \p ciphertext buffer size. #PSA_AEAD_TAG_LENGTH(\c key_type,
+ *         \c key_bits, \c alg) or #PSA_AEAD_TAG_MAX_SIZE can be used to
+ *         determine the required \p tag buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update() so far is
+ *         less than the plaintext length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_finish(psa_aead_operation_t *operation,
+                             uint8_t *ciphertext,
+                             size_t ciphertext_size,
+                             size_t *ciphertext_length,
+                             uint8_t *tag,
+                             size_t tag_size,
+                             size_t *tag_length);
+
+/** Finish authenticating and decrypting a message in an AEAD operation.
+ *
+ * The operation must have been set up with psa_aead_decrypt_setup().
+ *
+ * This function finishes the authenticated decryption of the message
+ * components:
+ *
+ * -  The additional data consisting of the concatenation of the inputs
+ *    passed to preceding calls to psa_aead_update_ad().
+ * -  The ciphertext consisting of the concatenation of the inputs passed to
+ *    preceding calls to psa_aead_update().
+ * -  The tag passed to this function call.
+ *
+ * If the authentication tag is correct, this function outputs any remaining
+ * plaintext and reports success. If the authentication tag is not correct,
+ * this function returns #PSA_ERROR_INVALID_SIGNATURE.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual tag and the expected tag is performed
+ * in constant time.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] plaintext        Buffer where the last part of the plaintext
+ *                              is to be written. This is the remaining data
+ *                              from previous calls to psa_aead_update()
+ *                              that could not be processed until the end
+ *                              of the input.
+ * \param plaintext_size        Size of the \p plaintext buffer in bytes.
+ *                              This must be appropriate for the selected algorithm and key:
+ *                              - A sufficient output size is
+ *                                #PSA_AEAD_VERIFY_OUTPUT_SIZE(\c key_type,
+ *                                \c alg) where \c key_type is the type of key
+ *                                and \c alg is the algorithm that were used to
+ *                                set up the operation.
+ *                              - #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE evaluates to
+ *                                the maximum output size of any supported AEAD
+ *                                algorithm.
+ * \param[out] plaintext_length On success, the number of bytes of
+ *                              returned plaintext.
+ * \param[in] tag               Buffer containing the authentication tag.
+ * \param tag_length            Size of the \p tag buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculations were successful, but the authentication tag is
+ *         not correct.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active decryption
+ *         operation with a nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p plaintext buffer is too small.
+ *         #PSA_AEAD_VERIFY_OUTPUT_SIZE(\c key_type, \c alg) or
+ *         #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE can be used to determine the
+ *         required buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update() so far is
+ *         less than the plaintext length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_verify(psa_aead_operation_t *operation,
+                             uint8_t *plaintext,
+                             size_t plaintext_size,
+                             size_t *plaintext_length,
+                             const uint8_t *tag,
+                             size_t tag_length);
+
+/** Abort an AEAD operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_aead_encrypt_setup() or psa_aead_decrypt_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized as described in #psa_aead_operation_t.
+ *
+ * In particular, calling psa_aead_abort() after the operation has been
+ * terminated by a call to psa_aead_abort(), psa_aead_finish() or
+ * psa_aead_verify() is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized AEAD operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_abort(psa_aead_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup asymmetric Asymmetric cryptography
+ * @{
+ */
+
+/**
+ * \brief Sign a message with a private key. For hash-and-sign algorithms,
+ *        this includes the hashing step.
+ *
+ * \note To perform a multi-part hash-and-sign signature algorithm, first use
+ *       a multi-part hash operation and then pass the resulting hash to
+ *       psa_sign_hash(). PSA_ALG_GET_HASH(\p alg) can be used to determine the
+ *       hash algorithm to use.
+ *
+ * \param[in]  key              Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. The key must
+ *                              allow the usage #PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param[in]  alg              An asymmetric signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_MESSAGE(\p alg)
+ *                              is true), that is compatible with the type of
+ *                              \p key.
+ * \param[in]  input            The input message to sign.
+ * \param[in]  input_length     Size of the \p input buffer in bytes.
+ * \param[out] signature        Buffer where the signature is to be written.
+ * \param[in]  signature_size   Size of the \p signature buffer in bytes. This
+ *                              must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - The required signature size is
+ *                                #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *                                where \c key_type and \c key_bits are the type and
+ *                                bit-size respectively of key.
+ *                              - #PSA_SIGNATURE_MAX_SIZE evaluates to the
+ *                                maximum signature size of any supported
+ *                                signature algorithm.
+ * \param[out] signature_length On success, the number of bytes that make up
+ *                              the returned signature value.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_SIGN_MESSAGE flag,
+ *         or it does not permit the requested algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p signature buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_sign_message( mbedtls_svc_key_id_t key,
+                               psa_algorithm_t alg,
+                               const uint8_t * input,
+                               size_t input_length,
+                               uint8_t * signature,
+                               size_t signature_size,
+                               size_t * signature_length );
+
+/** \brief Verify the signature of a message with a public key, using
+ *         a hash-and-sign verification algorithm.
+ *
+ * \note To perform a multi-part hash-and-sign signature verification
+ *       algorithm, first use a multi-part hash operation to hash the message
+ *       and then pass the resulting hash to psa_verify_hash().
+ *       PSA_ALG_GET_HASH(\p alg) can be used to determine the hash algorithm
+ *       to use.
+ *
+ * \param[in]  key              Identifier of the key to use for the operation.
+ *                              It must be a public key or an asymmetric key
+ *                              pair. The key must allow the usage
+ *                              #PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param[in]  alg              An asymmetric signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_MESSAGE(\p alg)
+ *                              is true), that is compatible with the type of
+ *                              \p key.
+ * \param[in]  input            The message whose signature is to be verified.
+ * \param[in]  input_length     Size of the \p input buffer in bytes.
+ * \param[out] signature        Buffer containing the signature to verify.
+ * \param[in]  signature_length Size of the \p signature buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_SIGN_MESSAGE flag,
+ *         or it does not permit the requested algorithm.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculation was performed successfully, but the passed signature
+ *         is not a valid signature.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_verify_message( mbedtls_svc_key_id_t key,
+                                 psa_algorithm_t alg,
+                                 const uint8_t * input,
+                                 size_t input_length,
+                                 const uint8_t * signature,
+                                 size_t signature_length );
+
+/**
+ * \brief Sign a hash or short message with a private key.
+ *
+ * Note that to perform a hash-and-sign signature algorithm, you must
+ * first calculate the hash by calling psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(), or alternatively by calling psa_hash_compute().
+ * Then pass the resulting hash as the \p hash
+ * parameter to this function. You can use #PSA_ALG_SIGN_GET_HASH(\p alg)
+ * to determine the hash algorithm to use.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. The key must
+ *                              allow the usage #PSA_KEY_USAGE_SIGN_HASH.
+ * \param alg                   A signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_HASH(\p alg)
+ *                              is true), that is compatible with
+ *                              the type of \p key.
+ * \param[in] hash              The hash or message to sign.
+ * \param hash_length           Size of the \p hash buffer in bytes.
+ * \param[out] signature        Buffer where the signature is to be written.
+ * \param signature_size        Size of the \p signature buffer in bytes.
+ * \param[out] signature_length On success, the number of bytes
+ *                              that make up the returned signature value.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p signature buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_sign_hash(mbedtls_svc_key_id_t key,
+                           psa_algorithm_t alg,
+                           const uint8_t *hash,
+                           size_t hash_length,
+                           uint8_t *signature,
+                           size_t signature_size,
+                           size_t *signature_length);
+
+/**
+ * \brief Verify the signature of a hash or short message using a public key.
+ *
+ * Note that to perform a hash-and-sign signature algorithm, you must
+ * first calculate the hash by calling psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(), or alternatively by calling psa_hash_compute().
+ * Then pass the resulting hash as the \p hash
+ * parameter to this function. You can use #PSA_ALG_SIGN_GET_HASH(\p alg)
+ * to determine the hash algorithm to use.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must be a public key or an asymmetric key pair. The
+ *                          key must allow the usage
+ *                          #PSA_KEY_USAGE_VERIFY_HASH.
+ * \param alg               A signature algorithm (PSA_ALG_XXX
+ *                          value such that #PSA_ALG_IS_SIGN_HASH(\p alg)
+ *                          is true), that is compatible with
+ *                          the type of \p key.
+ * \param[in] hash          The hash or message whose signature is to be
+ *                          verified.
+ * \param hash_length       Size of the \p hash buffer in bytes.
+ * \param[in] signature     Buffer containing the signature to verify.
+ * \param signature_length  Size of the \p signature buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The signature is valid.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculation was perfomed successfully, but the passed
+ *         signature is not a valid signature.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_verify_hash(mbedtls_svc_key_id_t key,
+                             psa_algorithm_t alg,
+                             const uint8_t *hash,
+                             size_t hash_length,
+                             const uint8_t *signature,
+                             size_t signature_length);
+
+/**
+ * \brief Encrypt a short message with a public key.
+ *
+ * \param key                   Identifer of the key to use for the operation.
+ *                              It must be a public key or an asymmetric key
+ *                              pair. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   An asymmetric encryption algorithm that is
+ *                              compatible with the type of \p key.
+ * \param[in] input             The message to encrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[in] salt              A salt or label, if supported by the
+ *                              encryption algorithm.
+ *                              If the algorithm does not support a
+ *                              salt, pass \c NULL.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass \c NULL.
+ *
+ *                              - For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                                supported.
+ * \param salt_length           Size of the \p salt buffer in bytes.
+ *                              If \p salt is \c NULL, pass 0.
+ * \param[out] output           Buffer where the encrypted message is to
+ *                              be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_asymmetric_encrypt(mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg,
+                                    const uint8_t *input,
+                                    size_t input_length,
+                                    const uint8_t *salt,
+                                    size_t salt_length,
+                                    uint8_t *output,
+                                    size_t output_size,
+                                    size_t *output_length);
+
+/**
+ * \brief Decrypt a short message with a private key.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. It must
+ *                              allow the usage #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   An asymmetric encryption algorithm that is
+ *                              compatible with the type of \p key.
+ * \param[in] input             The message to decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[in] salt              A salt or label, if supported by the
+ *                              encryption algorithm.
+ *                              If the algorithm does not support a
+ *                              salt, pass \c NULL.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass \c NULL.
+ *
+ *                              - For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                                supported.
+ * \param salt_length           Size of the \p salt buffer in bytes.
+ *                              If \p salt is \c NULL, pass 0.
+ * \param[out] output           Buffer where the decrypted message is to
+ *                              be written.
+ * \param output_size           Size of the \c output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_INVALID_PADDING
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_asymmetric_decrypt(mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg,
+                                    const uint8_t *input,
+                                    size_t input_length,
+                                    const uint8_t *salt,
+                                    size_t salt_length,
+                                    uint8_t *output,
+                                    size_t output_size,
+                                    size_t *output_length);
+
+/**@}*/
+
+/** \defgroup key_derivation Key derivation and pseudorandom generation
+ * @{
+ */
+
+/** The type of the state data structure for key derivation operations.
+ *
+ * Before calling any function on a key derivation operation object, the
+ * application must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_KEY_DERIVATION_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation = PSA_KEY_DERIVATION_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_key_derivation_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation;
+ *   operation = psa_key_derivation_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation.
+ */
+typedef struct psa_key_derivation_s psa_key_derivation_operation_t;
+
+/** \def PSA_KEY_DERIVATION_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a key derivation operation
+ * object of type #psa_key_derivation_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_KEY_DERIVATION_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a key derivation operation object.
+ */
+static psa_key_derivation_operation_t psa_key_derivation_operation_init(void);
+
+/** Set up a key derivation operation.
+ *
+ * A key derivation algorithm takes some inputs and uses them to generate
+ * a byte stream in a deterministic way.
+ * This byte stream can be used to produce keys and other
+ * cryptographic material.
+ *
+ * To derive a key:
+ * -# Start with an initialized object of type #psa_key_derivation_operation_t.
+ * -# Call psa_key_derivation_setup() to select the algorithm.
+ * -# Provide the inputs for the key derivation by calling
+ *    psa_key_derivation_input_bytes() or psa_key_derivation_input_key()
+ *    as appropriate. Which inputs are needed, in what order, and whether
+ *    they may be keys and if so of what type depends on the algorithm.
+ * -# Optionally set the operation's maximum capacity with
+ *    psa_key_derivation_set_capacity(). You may do this before, in the middle
+ *    of or after providing inputs. For some algorithms, this step is mandatory
+ *    because the output depends on the maximum capacity.
+ * -# To derive a key, call psa_key_derivation_output_key().
+ *    To derive a byte string for a different purpose, call
+ *    psa_key_derivation_output_bytes().
+ *    Successive calls to these functions use successive output bytes
+ *    calculated by the key derivation algorithm.
+ * -# Clean up the key derivation operation object with
+ *    psa_key_derivation_abort().
+ *
+ * If this function returns an error, the key derivation operation object is
+ * not changed.
+ *
+ * If an error occurs at any step after a call to psa_key_derivation_setup(),
+ * the operation will need to be reset by a call to psa_key_derivation_abort().
+ *
+ * Implementations must reject an attempt to derive a key of size 0.
+ *
+ * \param[in,out] operation       The key derivation operation object
+ *                                to set up. It must
+ *                                have been initialized but not set up yet.
+ * \param alg                     The key derivation algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_KEY_DERIVATION(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c alg is not a key derivation algorithm.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a key derivation algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_setup(
+    psa_key_derivation_operation_t *operation,
+    psa_algorithm_t alg);
+
+/** Retrieve the current capacity of a key derivation operation.
+ *
+ * The capacity of a key derivation is the maximum number of bytes that it can
+ * return. When you get *N* bytes of output from a key derivation operation,
+ * this reduces its capacity by *N*.
+ *
+ * \param[in] operation     The operation to query.
+ * \param[out] capacity     On success, the capacity of the operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_get_capacity(
+    const psa_key_derivation_operation_t *operation,
+    size_t *capacity);
+
+/** Set the maximum capacity of a key derivation operation.
+ *
+ * The capacity of a key derivation operation is the maximum number of bytes
+ * that the key derivation operation can return from this point onwards.
+ *
+ * \param[in,out] operation The key derivation operation object to modify.
+ * \param capacity          The new capacity of the operation.
+ *                          It must be less or equal to the operation's
+ *                          current capacity.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p capacity is larger than the operation's current capacity.
+ *         In this case, the operation object remains valid and its capacity
+ *         remains unchanged.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_set_capacity(
+    psa_key_derivation_operation_t *operation,
+    size_t capacity);
+
+/** Use the maximum possible capacity for a key derivation operation.
+ *
+ * Use this value as the capacity argument when setting up a key derivation
+ * to indicate that the operation should have the maximum possible capacity.
+ * The value of the maximum possible capacity depends on the key derivation
+ * algorithm.
+ */
+#define PSA_KEY_DERIVATION_UNLIMITED_CAPACITY ((size_t)(-1))
+
+/** Provide an input for key derivation or key agreement.
+ *
+ * Which inputs are required and in what order depends on the algorithm.
+ * Refer to the documentation of each key derivation or key agreement
+ * algorithm for information.
+ *
+ * This function passes direct inputs, which is usually correct for
+ * non-secret inputs. To pass a secret input, which should be in a key
+ * object, call psa_key_derivation_input_key() instead of this function.
+ * Refer to the documentation of individual step types
+ * (`PSA_KEY_DERIVATION_INPUT_xxx` values of type ::psa_key_derivation_step_t)
+ * for more information.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() and must not
+ *                                have produced any output yet.
+ * \param step                    Which step the input data is for.
+ * \param[in] data                Input data to use.
+ * \param data_length             Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step is not compatible with the operation's algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow direct inputs.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this input \p step.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_input_bytes(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    const uint8_t *data,
+    size_t data_length);
+
+/** Provide an input for key derivation in the form of a key.
+ *
+ * Which inputs are required and in what order depends on the algorithm.
+ * Refer to the documentation of each key derivation or key agreement
+ * algorithm for information.
+ *
+ * This function obtains input from a key object, which is usually correct for
+ * secret inputs or for non-secret personalization strings kept in the key
+ * store. To pass a non-secret parameter which is not in the key store,
+ * call psa_key_derivation_input_bytes() instead of this function.
+ * Refer to the documentation of individual step types
+ * (`PSA_KEY_DERIVATION_INPUT_xxx` values of type ::psa_key_derivation_step_t)
+ * for more information.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() and must not
+ *                                have produced any output yet.
+ * \param step                    Which step the input data is for.
+ * \param key                     Identifier of the key. It must have an
+ *                                appropriate type for step and must allow the
+ *                                usage #PSA_KEY_USAGE_DERIVE.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step is not compatible with the operation's algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow key inputs of the given type
+ *         or does not allow key inputs at all.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this input \p step.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_input_key(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    mbedtls_svc_key_id_t key);
+
+/** Perform a key agreement and use the shared secret as input to a key
+ * derivation.
+ *
+ * A key agreement algorithm takes two inputs: a private key \p private_key
+ * a public key \p peer_key.
+ * The result of this function is passed as input to a key derivation.
+ * The output of this key derivation can be extracted by reading from the
+ * resulting operation to produce keys and other cryptographic material.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() with a
+ *                                key agreement and derivation algorithm
+ *                                \c alg (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_KEY_AGREEMENT(\c alg) is true
+ *                                and #PSA_ALG_IS_RAW_KEY_AGREEMENT(\c alg)
+ *                                is false).
+ *                                The operation must be ready for an
+ *                                input of the type given by \p step.
+ * \param step                    Which step the input data is for.
+ * \param private_key             Identifier of the private key to use. It must
+ *                                allow the usage #PSA_KEY_USAGE_DERIVE.
+ * \param[in] peer_key      Public key of the peer. The peer key must be in the
+ *                          same format that psa_import_key() accepts for the
+ *                          public key type corresponding to the type of
+ *                          private_key. That is, this function performs the
+ *                          equivalent of
+ *                          #psa_import_key(...,
+ *                          `peer_key`, `peer_key_length`) where
+ *                          with key attributes indicating the public key
+ *                          type corresponding to the type of `private_key`.
+ *                          For example, for EC keys, this means that peer_key
+ *                          is interpreted as a point on the curve that the
+ *                          private key is on. The standard formats for public
+ *                          keys are documented in the documentation of
+ *                          psa_export_public_key().
+ * \param peer_key_length         Size of \p peer_key in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this key agreement \p step.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c private_key is not compatible with \c alg,
+ *         or \p peer_key is not valid for \c alg or not compatible with
+ *         \c private_key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a key derivation algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow an input resulting from a key agreement.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_key_agreement(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    mbedtls_svc_key_id_t private_key,
+    const uint8_t *peer_key,
+    size_t peer_key_length);
+
+/** Read some data from a key derivation operation.
+ *
+ * This function calculates output bytes from a key derivation algorithm and
+ * return those bytes.
+ * If you view the key derivation's output as a stream of bytes, this
+ * function destructively reads the requested number of bytes from the
+ * stream.
+ * The operation's capacity decreases by the number of bytes read.
+ *
+ * If this function returns an error status other than
+ * #PSA_ERROR_INSUFFICIENT_DATA, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation The key derivation operation object to read from.
+ * \param[out] output       Buffer where the output will be written.
+ * \param output_length     Number of bytes to output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INSUFFICIENT_DATA
+ *                          The operation's capacity was less than
+ *                          \p output_length bytes. Note that in this case,
+ *                          no output is written to the output buffer.
+ *                          The operation's capacity is set to 0, thus
+ *                          subsequent calls to this function will not
+ *                          succeed, even with a smaller output buffer.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active and completed
+ *         all required input steps).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_output_bytes(
+    psa_key_derivation_operation_t *operation,
+    uint8_t *output,
+    size_t output_length);
+
+/** Derive a key from an ongoing key derivation operation.
+ *
+ * This function calculates output bytes from a key derivation algorithm
+ * and uses those bytes to generate a key deterministically.
+ * The key's location, usage policy, type and size are taken from
+ * \p attributes.
+ *
+ * If you view the key derivation's output as a stream of bytes, this
+ * function destructively reads as many bytes as required from the
+ * stream.
+ * The operation's capacity decreases by the number of bytes read.
+ *
+ * If this function returns an error status other than
+ * #PSA_ERROR_INSUFFICIENT_DATA, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * How much output is produced and consumed from the operation, and how
+ * the key is derived, depends on the key type and on the key size
+ * (denoted \c bits below):
+ *
+ * - For key types for which the key is an arbitrary sequence of bytes
+ *   of a given size, this function is functionally equivalent to
+ *   calling #psa_key_derivation_output_bytes
+ *   and passing the resulting output to #psa_import_key.
+ *   However, this function has a security benefit:
+ *   if the implementation provides an isolation boundary then
+ *   the key material is not exposed outside the isolation boundary.
+ *   As a consequence, for these key types, this function always consumes
+ *   exactly (\c bits / 8) bytes from the operation.
+ *   The following key types defined in this specification follow this scheme:
+ *
+ *     - #PSA_KEY_TYPE_AES;
+ *     - #PSA_KEY_TYPE_ARC4;
+ *     - #PSA_KEY_TYPE_ARIA;
+ *     - #PSA_KEY_TYPE_CAMELLIA;
+ *     - #PSA_KEY_TYPE_DERIVE;
+ *     - #PSA_KEY_TYPE_HMAC.
+ *
+ * - For ECC keys on a Montgomery elliptic curve
+ *   (#PSA_KEY_TYPE_ECC_KEY_PAIR(\c curve) where \c curve designates a
+ *   Montgomery curve), this function always draws a byte string whose
+ *   length is determined by the curve, and sets the mandatory bits
+ *   accordingly. That is:
+ *
+ *     - Curve25519 (#PSA_ECC_FAMILY_MONTGOMERY, 255 bits): draw a 32-byte
+ *       string and process it as specified in RFC 7748 &sect;5.
+ *     - Curve448 (#PSA_ECC_FAMILY_MONTGOMERY, 448 bits): draw a 56-byte
+ *       string and process it as specified in RFC 7748 &sect;5.
+ *
+ * - For key types for which the key is represented by a single sequence of
+ *   \c bits bits with constraints as to which bit sequences are acceptable,
+ *   this function draws a byte string of length (\c bits / 8) bytes rounded
+ *   up to the nearest whole number of bytes. If the resulting byte string
+ *   is acceptable, it becomes the key, otherwise the drawn bytes are discarded.
+ *   This process is repeated until an acceptable byte string is drawn.
+ *   The byte string drawn from the operation is interpreted as specified
+ *   for the output produced by psa_export_key().
+ *   The following key types defined in this specification follow this scheme:
+ *
+ *     - #PSA_KEY_TYPE_DES.
+ *       Force-set the parity bits, but discard forbidden weak keys.
+ *       For 2-key and 3-key triple-DES, the three keys are generated
+ *       successively (for example, for 3-key triple-DES,
+ *       if the first 8 bytes specify a weak key and the next 8 bytes do not,
+ *       discard the first 8 bytes, use the next 8 bytes as the first key,
+ *       and continue reading output from the operation to derive the other
+ *       two keys).
+ *     - Finite-field Diffie-Hellman keys (#PSA_KEY_TYPE_DH_KEY_PAIR(\c group)
+ *       where \c group designates any Diffie-Hellman group) and
+ *       ECC keys on a Weierstrass elliptic curve
+ *       (#PSA_KEY_TYPE_ECC_KEY_PAIR(\c curve) where \c curve designates a
+ *       Weierstrass curve).
+ *       For these key types, interpret the byte string as integer
+ *       in big-endian order. Discard it if it is not in the range
+ *       [0, *N* - 2] where *N* is the boundary of the private key domain
+ *       (the prime *p* for Diffie-Hellman, the subprime *q* for DSA,
+ *       or the order of the curve's base point for ECC).
+ *       Add 1 to the resulting integer and use this as the private key *x*.
+ *       This method allows compliance to NIST standards, specifically
+ *       the methods titled "key-pair generation by testing candidates"
+ *       in NIST SP 800-56A &sect;5.6.1.1.4 for Diffie-Hellman,
+ *       in FIPS 186-4 &sect;B.1.2 for DSA, and
+ *       in NIST SP 800-56A &sect;5.6.1.2.2 or
+ *       FIPS 186-4 &sect;B.4.2 for elliptic curve keys.
+ *
+ * - For other key types, including #PSA_KEY_TYPE_RSA_KEY_PAIR,
+ *   the way in which the operation output is consumed is
+ *   implementation-defined.
+ *
+ * In all cases, the data that is read is discarded from the operation.
+ * The operation's capacity is decreased by the number of bytes read.
+ *
+ * For algorithms that take an input step #PSA_KEY_DERIVATION_INPUT_SECRET,
+ * the input to that step must be provided with psa_key_derivation_input_key().
+ * Future versions of this specification may include additional restrictions
+ * on the derived key based on the attributes and strength of the secret key.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ * \param[in,out] operation The key derivation operation object to read from.
+ * \param[out] key          On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_INSUFFICIENT_DATA
+ *         There was not enough data to create the desired key.
+ *         Note that in this case, no output is written to the output buffer.
+ *         The operation's capacity is set to 0, thus subsequent calls to
+ *         this function will not succeed, even with a smaller output buffer.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The key type or key size is not supported, either by the
+ *         implementation in general or in this particular location.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The provided key attributes are not valid for the operation.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The #PSA_KEY_DERIVATION_INPUT_SECRET input was not provided through
+ *         a key.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active and completed
+ *         all required input steps).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_output_key(
+    const psa_key_attributes_t *attributes,
+    psa_key_derivation_operation_t *operation,
+    mbedtls_svc_key_id_t *key);
+
+/** Abort a key derivation operation.
+ *
+ * Aborting an operation frees all associated resources except for the \c
+ * operation structure itself. Once aborted, the operation object can be reused
+ * for another operation by calling psa_key_derivation_setup() again.
+ *
+ * This function may be called at any time after the operation
+ * object has been initialized as described in #psa_key_derivation_operation_t.
+ *
+ * In particular, it is valid to call psa_key_derivation_abort() twice, or to
+ * call psa_key_derivation_abort() on an operation that has not been set up.
+ *
+ * \param[in,out] operation    The operation to abort.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_abort(
+    psa_key_derivation_operation_t *operation);
+
+/** Perform a key agreement and return the raw shared secret.
+ *
+ * \warning The raw result of a key agreement algorithm such as finite-field
+ * Diffie-Hellman or elliptic curve Diffie-Hellman has biases and should
+ * not be used directly as key material. It should instead be passed as
+ * input to a key derivation algorithm. To chain a key agreement with
+ * a key derivation, use psa_key_derivation_key_agreement() and other
+ * functions from the key derivation interface.
+ *
+ * \param alg                     The key agreement algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_RAW_KEY_AGREEMENT(\p alg)
+ *                                is true).
+ * \param private_key             Identifier of the private key to use. It must
+ *                                allow the usage #PSA_KEY_USAGE_DERIVE.
+ * \param[in] peer_key            Public key of the peer. It must be
+ *                                in the same format that psa_import_key()
+ *                                accepts. The standard formats for public
+ *                                keys are documented in the documentation
+ *                                of psa_export_public_key().
+ * \param peer_key_length         Size of \p peer_key in bytes.
+ * \param[out] output             Buffer where the decrypted message is to
+ *                                be written.
+ * \param output_size             Size of the \c output buffer in bytes.
+ * \param[out] output_length      On success, the number of bytes
+ *                                that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p alg is not a key agreement algorithm
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p private_key is not compatible with \p alg,
+ *         or \p peer_key is not valid for \p alg or not compatible with
+ *         \p private_key.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p output_size is too small
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not a supported key agreement algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_raw_key_agreement(psa_algorithm_t alg,
+                                   mbedtls_svc_key_id_t private_key,
+                                   const uint8_t *peer_key,
+                                   size_t peer_key_length,
+                                   uint8_t *output,
+                                   size_t output_size,
+                                   size_t *output_length);
+
+/**@}*/
+
+/** \defgroup random Random generation
+ * @{
+ */
+
+/**
+ * \brief Generate random bytes.
+ *
+ * \warning This function **can** fail! Callers MUST check the return status
+ *          and MUST NOT use the content of the output buffer if the return
+ *          status is not #PSA_SUCCESS.
+ *
+ * \note    To generate a key, use psa_generate_key() instead.
+ *
+ * \param[out] output       Output buffer for the generated data.
+ * \param output_size       Number of bytes to generate and output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_generate_random(uint8_t *output,
+                                 size_t output_size);
+
+/**
+ * \brief Generate a key or key pair.
+ *
+ * The key is generated randomly.
+ * Its location, usage policy, type and size are taken from \p attributes.
+ *
+ * Implementations must reject an attempt to generate a key of size 0.
+ *
+ * The following type-specific considerations apply:
+ * - For RSA keys (#PSA_KEY_TYPE_RSA_KEY_PAIR),
+ *   the public exponent is 65537.
+ *   The modulus is a product of two probabilistic primes
+ *   between 2^{n-1} and 2^n where n is the bit size specified in the
+ *   attributes.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ * \param[out] key          On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_generate_key(const psa_key_attributes_t *attributes,
+                              mbedtls_svc_key_id_t *key);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/* The file "crypto_sizes.h" contains definitions for size calculation
+ * macros whose definitions are implementation-specific. */
+#include "crypto_sizes.h"
+
+/* The file "crypto_struct.h" contains definitions for
+ * implementation-specific structs that are declared above. */
+#include "crypto_struct.h"
+
+/* The file "crypto_extra.h" contains vendor-specific definitions. This
+ * can include vendor-defined algorithms, extra functions, etc. */
+#include "crypto_extra.h"
+
+#endif /* PSA_CRYPTO_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h
new file mode 100644
index 00000000000..a875b237041
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h
@@ -0,0 +1,79 @@
+/*
+ *  Context structure declaration of the Mbed TLS software-based PSA drivers
+ *  called through the PSA Crypto driver dispatch layer.
+ *  This file contains the context structures of those algorithms which need to
+ *  rely on other algorithms, i.e. are 'composite' algorithms.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the Mbed TLS software-based PSA drivers. The
+ * definition of these objects are then used by crypto_struct.h to define the
+ * implementation-defined types of PSA multi-part state objects.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_BUILTIN_COMPOSITES_H
+#define PSA_CRYPTO_BUILTIN_COMPOSITES_H
+
+#include <psa/crypto_driver_common.h>
+
+/*
+ * MAC multi-part operation definitions.
+ */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_CMAC) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC)
+#define MBEDTLS_PSA_BUILTIN_MAC
+#endif
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+typedef struct
+{
+    /** The HMAC algorithm in use */
+    psa_algorithm_t alg;
+    /** The hash context. */
+    struct psa_hash_operation_s hash_ctx;
+    /** The HMAC part of the context. */
+    uint8_t opad[PSA_HMAC_MAX_HASH_BLOCK_SIZE];
+} mbedtls_psa_hmac_operation_t;
+
+#define MBEDTLS_PSA_HMAC_OPERATION_INIT {0, PSA_HASH_OPERATION_INIT, {0}}
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HMAC */
+
+#include "mbedtls/cmac.h"
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    union
+    {
+        unsigned dummy; /* Make the union non-empty even with no supported algorithms. */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+        mbedtls_psa_hmac_operation_t hmac;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HMAC */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_CMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+        mbedtls_cipher_context_t cmac;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_CMAC */
+    } ctx;
+} mbedtls_psa_mac_operation_t;
+
+#define MBEDTLS_PSA_MAC_OPERATION_INIT {0, {0}}
+
+#endif /* PSA_CRYPTO_BUILTIN_COMPOSITES_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h
new file mode 100644
index 00000000000..62a0e6f3704
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h
@@ -0,0 +1,126 @@
+/*
+ *  Context structure declaration of the Mbed TLS software-based PSA drivers
+ *  called through the PSA Crypto driver dispatch layer.
+ *  This file contains the context structures of those algorithms which do not
+ *  rely on other algorithms, i.e. are 'primitive' algorithms.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the Mbed TLS software-based PSA drivers. The
+ * definition of these objects are then used by crypto_struct.h to define the
+ * implementation-defined types of PSA multi-part state objects.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_BUILTIN_PRIMITIVES_H
+#define PSA_CRYPTO_BUILTIN_PRIMITIVES_H
+
+#include <psa/crypto_driver_common.h>
+
+/*
+ * Hash multi-part operation definitions.
+ */
+
+#include "mbedtls/md2.h"
+#include "mbedtls/md4.h"
+#include "mbedtls/md5.h"
+#include "mbedtls/ripemd160.h"
+#include "mbedtls/sha1.h"
+#include "mbedtls/sha256.h"
+#include "mbedtls/sha512.h"
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD2) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_MD4) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_MD5) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_1) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_224) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_256) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_384) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_512)
+#define MBEDTLS_PSA_BUILTIN_HASH
+#endif
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    union
+    {
+        unsigned dummy; /* Make the union non-empty even with no supported algorithms. */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD2)
+        mbedtls_md2_context md2;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD4)
+        mbedtls_md4_context md4;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD5)
+        mbedtls_md5_context md5;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160)
+        mbedtls_ripemd160_context ripemd160;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_1)
+        mbedtls_sha1_context sha1;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_256) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_224)
+        mbedtls_sha256_context sha256;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_512) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_384)
+        mbedtls_sha512_context sha512;
+#endif
+    } ctx;
+} mbedtls_psa_hash_operation_t;
+
+#define MBEDTLS_PSA_HASH_OPERATION_INIT {0, {0}}
+
+/*
+ * Cipher multi-part operation definitions.
+ */
+
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CTR) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CFB) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_OFB) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_XTS) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7)
+#define MBEDTLS_PSA_BUILTIN_CIPHER  1
+#endif
+
+typedef struct {
+    /* Context structure for the Mbed TLS cipher implementation. */
+    psa_algorithm_t alg;
+    uint8_t iv_length;
+    uint8_t block_length;
+    union {
+        unsigned int dummy;
+        mbedtls_cipher_context_t cipher;
+    } ctx;
+} mbedtls_psa_cipher_operation_t;
+
+#define MBEDTLS_PSA_CIPHER_OPERATION_INIT {0, 0, 0, {0}}
+
+#endif /* PSA_CRYPTO_BUILTIN_PRIMITIVES_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_compat.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_compat.h
new file mode 100644
index 00000000000..09ac488398f
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_compat.h
@@ -0,0 +1,528 @@
+/**
+ * \file psa/crypto_compat.h
+ *
+ * \brief PSA cryptography module: Backward compatibility aliases
+ *
+ * This header declares alternative names for macro and functions.
+ * New application code should not use these names.
+ * These names may be removed in a future version of Mbed Crypto.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_COMPAT_H
+#define PSA_CRYPTO_COMPAT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * To support both openless APIs and psa_open_key() temporarily, define
+ * psa_key_handle_t to be equal to mbedtls_svc_key_id_t. Do not mark the
+ * type and its utility macros and functions deprecated yet. This will be done
+ * in a subsequent phase.
+ */
+typedef mbedtls_svc_key_id_t psa_key_handle_t;
+
+#define PSA_KEY_HANDLE_INIT MBEDTLS_SVC_KEY_ID_INIT
+
+/** Check whether an handle is null.
+ *
+ * \param handle  Handle
+ *
+ * \return Non-zero if the handle is null, zero otherwise.
+ */
+static inline int psa_key_handle_is_null( psa_key_handle_t handle )
+{
+    return( mbedtls_svc_key_id_is_null( handle ) );
+}
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+/*
+ * Mechanism for declaring deprecated values
+ */
+#if defined(MBEDTLS_DEPRECATED_WARNING) && !defined(MBEDTLS_PSA_DEPRECATED)
+#define MBEDTLS_PSA_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_PSA_DEPRECATED
+#endif
+
+typedef MBEDTLS_PSA_DEPRECATED size_t mbedtls_deprecated_size_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_status_t mbedtls_deprecated_psa_status_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_key_usage_t mbedtls_deprecated_psa_key_usage_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_ecc_family_t mbedtls_deprecated_psa_ecc_family_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_dh_family_t mbedtls_deprecated_psa_dh_family_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_ecc_family_t psa_ecc_curve_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_dh_family_t psa_dh_group_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_algorithm_t mbedtls_deprecated_psa_algorithm_t;
+
+#define PSA_KEY_TYPE_GET_CURVE PSA_KEY_TYPE_ECC_GET_FAMILY
+#define PSA_KEY_TYPE_GET_GROUP PSA_KEY_TYPE_DH_GET_FAMILY
+
+#define MBEDTLS_DEPRECATED_CONSTANT( type, value )      \
+    ( (mbedtls_deprecated_##type) ( value ) )
+
+/*
+ * Deprecated PSA Crypto error code definitions (PSA Crypto API  <= 1.0 beta2)
+ */
+#define PSA_ERROR_UNKNOWN_ERROR \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_GENERIC_ERROR )
+#define PSA_ERROR_OCCUPIED_SLOT \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_ALREADY_EXISTS )
+#define PSA_ERROR_EMPTY_SLOT \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_DOES_NOT_EXIST )
+#define PSA_ERROR_INSUFFICIENT_CAPACITY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_INSUFFICIENT_DATA )
+#define PSA_ERROR_TAMPERING_DETECTED \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_CORRUPTION_DETECTED )
+
+/*
+ * Deprecated PSA Crypto numerical encodings (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_KEY_USAGE_SIGN \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_key_usage_t, PSA_KEY_USAGE_SIGN_HASH )
+#define PSA_KEY_USAGE_VERIFY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_key_usage_t, PSA_KEY_USAGE_VERIFY_HASH )
+
+/*
+ * Deprecated PSA Crypto size calculation macros (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ASYMMETRIC_SIGNATURE_MAX_SIZE \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_SIGNATURE_MAX_SIZE )
+#define PSA_ASYMMETRIC_SIGN_OUTPUT_SIZE( key_type, key_bits, alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_SIGN_OUTPUT_SIZE( key_type, key_bits, alg ) )
+#define PSA_KEY_EXPORT_MAX_SIZE( key_type, key_bits ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_EXPORT_KEY_OUTPUT_SIZE( key_type, key_bits ) )
+#define PSA_BLOCK_CIPHER_BLOCK_SIZE( type ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_BLOCK_CIPHER_BLOCK_LENGTH( type ) )
+#define PSA_MAX_BLOCK_CIPHER_BLOCK_SIZE \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE )
+#define PSA_HASH_SIZE( alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_HASH_LENGTH( alg ) )
+#define PSA_MAC_FINAL_SIZE( key_type, key_bits, alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_MAC_LENGTH( key_type, key_bits, alg ) )
+#define PSA_ALG_TLS12_PSK_TO_MS_MAX_PSK_LEN \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE )
+
+/*
+ * Deprecated PSA Crypto function names (PSA Crypto API  <= 1.0 beta3)
+ */
+MBEDTLS_PSA_DEPRECATED static inline psa_status_t psa_asymmetric_sign( psa_key_handle_t key,
+                            psa_algorithm_t alg,
+                            const uint8_t *hash,
+                            size_t hash_length,
+                            uint8_t *signature,
+                            size_t signature_size,
+                            size_t *signature_length )
+{
+    return psa_sign_hash( key, alg, hash, hash_length, signature, signature_size, signature_length );
+}
+
+MBEDTLS_PSA_DEPRECATED static inline psa_status_t psa_asymmetric_verify( psa_key_handle_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *hash,
+                              size_t hash_length,
+                              const uint8_t *signature,
+                              size_t signature_length )
+{
+    return psa_verify_hash( key, alg, hash, hash_length, signature, signature_length );
+}
+
+/*
+ * Size-specific elliptic curve families.
+ */
+#define PSA_ECC_CURVE_SECP160K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP192K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP224K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP256K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP160R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP192R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP224R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP256R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP384R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP521R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP160R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R2 )
+#define PSA_ECC_CURVE_SECT163K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT233K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT239K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT283K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT409K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT571K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT163R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT193R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT233R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT283R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT409R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT571R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT163R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_SECT193R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_BRAINPOOL_P256R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_BRAINPOOL_P384R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_BRAINPOOL_P512R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_CURVE25519 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+#define PSA_ECC_CURVE_CURVE448 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+
+/*
+ * Curves that changed name due to PSA specification.
+ */
+#define PSA_ECC_CURVE_SECP_K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP_R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R2 )
+#define PSA_ECC_CURVE_SECT_K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT_R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_BRAINPOOL_P_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_MONTGOMERY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+
+/*
+ * Finite-field Diffie-Hellman families.
+ */
+#define PSA_DH_GROUP_FFDHE2048 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE3072 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE4096 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE6144 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE8192 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+
+/*
+ * Diffie-Hellman families that changed name due to PSA specification.
+ */
+#define PSA_DH_GROUP_RFC7919 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_CUSTOM \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_CUSTOM )
+
+/*
+ * Deprecated PSA Crypto stream cipher algorithms (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ALG_ARC4 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_STREAM_CIPHER )
+#define PSA_ALG_CHACHA20 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_STREAM_CIPHER )
+
+/*
+ * Renamed AEAD tag length macros (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ALG_AEAD_WITH_DEFAULT_TAG_LENGTH( aead_alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG( aead_alg ) )
+#define PSA_ALG_AEAD_WITH_TAG_LENGTH( aead_alg, tag_length ) \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_AEAD_WITH_SHORTENED_TAG( aead_alg, tag_length ) )
+
+/*
+ * Deprecated PSA AEAD output size macros (PSA Crypto API  <= 1.0 beta3)
+ */
+
+/** The tag size for an AEAD algorithm, in bytes.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    The tag size for the specified algorithm.
+ *                            If the AEAD algorithm does not have an identified
+ *                            tag that can be distinguished from the rest of
+ *                            the ciphertext, return 0.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_TAG_LENGTH_1_ARG( alg )     \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,     \
+        PSA_ALG_IS_AEAD( alg ) ?             \
+        PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) : \
+        0 )
+
+/** The maximum size of the output of psa_aead_encrypt(), in bytes.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_encrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the ciphertext may be smaller.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_SIZE_2_ARG( alg, plaintext_length ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                            \
+        PSA_ALG_IS_AEAD( alg ) ?                                    \
+        (plaintext_length) + PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) :   \
+        0 )
+
+/** The maximum size of the output of psa_aead_decrypt(), in bytes.
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_decrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the plaintext may be smaller.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param ciphertext_length   Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_SIZE_2_ARG( alg, ciphertext_length )   \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                               \
+        PSA_ALG_IS_AEAD( alg ) &&                                      \
+            (ciphertext_length) > PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) ? \
+            (ciphertext_length) - PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) : \
+        0 )
+
+/** A sufficient output buffer size for psa_aead_update().
+ *
+ * If the size of the output buffer is at least this large, it is
+ * guaranteed that psa_aead_update() will not fail due to an
+ * insufficient buffer size. The actual size of the output may be smaller
+ * in any given call.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param input_length        Size of the input in bytes.
+ *
+ * \return                    A sufficient output buffer size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+/* For all the AEAD modes defined in this specification, it is possible
+ * to emit output without delay. However, hardware may not always be
+ * capable of this. So for modes based on a block cipher, allow the
+ * implementation to delay the output until it has a full block. */
+#define PSA_AEAD_UPDATE_OUTPUT_SIZE_2_ARG( alg, input_length )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                              \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                                      \
+        PSA_ROUND_UP_TO_MULTIPLE( PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, (input_length) ) : \
+        (input_length) )
+
+/** A sufficient ciphertext buffer size for psa_aead_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_finish() will not fail due to an
+ * insufficient ciphertext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient ciphertext buffer size for the
+ *                            specified algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_FINISH_OUTPUT_SIZE_1_ARG( alg )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                        \
+        PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE :                               \
+        0 )
+
+/** A sufficient plaintext buffer size for psa_aead_verify().
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_verify() will not fail due to an
+ * insufficient plaintext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient plaintext buffer size for the
+ *                            specified algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_SIZE_1_ARG( alg )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                        \
+        PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE :                               \
+        0 )
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/** Open a handle to an existing persistent key.
+ *
+ * Open a handle to a persistent key. A key is persistent if it was created
+ * with a lifetime other than #PSA_KEY_LIFETIME_VOLATILE. A persistent key
+ * always has a nonzero key identifier, set with psa_set_key_id() when
+ * creating the key. Implementations may provide additional pre-provisioned
+ * keys that can be opened with psa_open_key(). Such keys have an application
+ * key identifier in the vendor range, as documented in the description of
+ * #psa_key_id_t.
+ *
+ * The application must eventually close the handle with psa_close_key() or
+ * psa_destroy_key() to release associated resources. If the application dies
+ * without calling one of these functions, the implementation should perform
+ * the equivalent of a call to psa_close_key().
+ *
+ * Some implementations permit an application to open the same key multiple
+ * times. If this is successful, each call to psa_open_key() will return a
+ * different key handle.
+ *
+ * \note This API is not part of the PSA Cryptography API Release 1.0.0
+ * specification. It was defined in the 1.0 Beta 3 version of the
+ * specification but was removed in the 1.0.0 released version. This API is
+ * kept for the time being to not break applications relying on it. It is not
+ * deprecated yet but will be in the near future.
+ *
+ * \note Applications that rely on opening a key multiple times will not be
+ * portable to implementations that only permit a single key handle to be
+ * opened. See also :ref:\`key-handles\`.
+ *
+ *
+ * \param key           The persistent identifier of the key.
+ * \param[out] handle   On success, a handle to the key.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success. The application can now use the value of `*handle`
+ *         to access the key.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ *         The implementation does not have sufficient resources to open the
+ *         key. This can be due to reaching an implementation limit on the
+ *         number of open keys, the number of open key handles, or available
+ *         memory.
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ *         There is no persistent key with key identifier \p key.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not a valid persistent key identifier.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The specified key exists, but the application does not have the
+ *         permission to access it. Note that this specification does not
+ *         define any way to create such a key, but it may be possible
+ *         through implementation-specific means.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_open_key( mbedtls_svc_key_id_t key,
+                           psa_key_handle_t *handle );
+
+/** Close a key handle.
+ *
+ * If the handle designates a volatile key, this will destroy the key material
+ * and free all associated resources, just like psa_destroy_key().
+ *
+ * If this is the last open handle to a persistent key, then closing the handle
+ * will free all resources associated with the key in volatile memory. The key
+ * data in persistent storage is not affected and can be opened again later
+ * with a call to psa_open_key().
+ *
+ * Closing the key handle makes the handle invalid, and the key handle
+ * must not be used again by the application.
+ *
+ * \note This API is not part of the PSA Cryptography API Release 1.0.0
+ * specification. It was defined in the 1.0 Beta 3 version of the
+ * specification but was removed in the 1.0.0 released version. This API is
+ * kept for the time being to not break applications relying on it. It is not
+ * deprecated yet but will be in the near future.
+ *
+ * \note If the key handle was used to set up an active
+ * :ref:\`multipart operation <multipart-operations>\`, then closing the
+ * key handle can cause the multipart operation to fail. Applications should
+ * maintain the key handle until after the multipart operation has finished.
+ *
+ * \param handle        The key handle to close.
+ *                      If this is \c 0, do nothing and return \c PSA_SUCCESS.
+ *
+ * \retval #PSA_SUCCESS
+ *         \p handle was a valid handle or \c 0. It is now closed.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p handle is not a valid handle nor \c 0.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_close_key(psa_key_handle_t handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_COMPAT_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_config.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_config.h
new file mode 100644
index 00000000000..e2446cb26c4
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_config.h
@@ -0,0 +1,129 @@
+/**
+ * \file psa/crypto_config.h
+ * \brief PSA crypto configuration options (set of defines)
+ *
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+/**
+ * When #MBEDTLS_PSA_CRYPTO_CONFIG is enabled in config.h,
+ * this file determines which cryptographic mechanisms are enabled
+ * through the PSA Cryptography API (\c psa_xxx() functions).
+ *
+ * To enable a cryptographic mechanism, uncomment the definition of
+ * the corresponding \c PSA_WANT_xxx preprocessor symbol.
+ * To disable a cryptographic mechanism, comment out the definition of
+ * the corresponding \c PSA_WANT_xxx preprocessor symbol.
+ * The names of cryptographic mechanisms correspond to values
+ * defined in psa/crypto_values.h, with the prefix \c PSA_WANT_ instead
+ * of \c PSA_.
+ *
+ * Note that many cryptographic mechanisms involve two symbols: one for
+ * the key type (\c PSA_WANT_KEY_TYPE_xxx) and one for the algorithm
+ * (\c PSA_WANT_ALG_xxx). Mechanisms with additional parameters may involve
+ * additional symbols.
+ */
+#else
+/**
+ * When \c MBEDTLS_PSA_CRYPTO_CONFIG is disabled in config.h,
+ * this file is not used, and cryptographic mechanisms are supported
+ * through the PSA API if and only if they are supported through the
+ * mbedtls_xxx API.
+ */
+#endif
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_CONFIG_H
+#define PSA_CRYPTO_CONFIG_H
+
+/*
+ * CBC-MAC is not yet supported via the PSA API in Mbed TLS.
+ */
+//#define PSA_WANT_ALG_CBC_MAC                    1
+#define PSA_WANT_ALG_CBC_NO_PADDING             1
+#define PSA_WANT_ALG_CBC_PKCS7                  1
+#define PSA_WANT_ALG_CCM                        1
+#define PSA_WANT_ALG_CMAC                       1
+#define PSA_WANT_ALG_CFB                        1
+#define PSA_WANT_ALG_CHACHA20_POLY1305          1
+#define PSA_WANT_ALG_CMAC                       1
+#define PSA_WANT_ALG_CTR                        1
+#define PSA_WANT_ALG_DETERMINISTIC_ECDSA        1
+#define PSA_WANT_ALG_ECB_NO_PADDING             1
+#define PSA_WANT_ALG_ECDH                       1
+#define PSA_WANT_ALG_ECDSA                      1
+#define PSA_WANT_ALG_GCM                        1
+#define PSA_WANT_ALG_HKDF                       1
+#define PSA_WANT_ALG_HMAC                       1
+#define PSA_WANT_ALG_MD2                        1
+#define PSA_WANT_ALG_MD4                        1
+#define PSA_WANT_ALG_MD5                        1
+#define PSA_WANT_ALG_OFB                        1
+#define PSA_WANT_ALG_RIPEMD160                  1
+#define PSA_WANT_ALG_RSA_OAEP                   1
+#define PSA_WANT_ALG_RSA_PKCS1V15_CRYPT         1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN          1
+#define PSA_WANT_ALG_RSA_PSS                    1
+#define PSA_WANT_ALG_SHA_1                      1
+#define PSA_WANT_ALG_SHA_224                    1
+#define PSA_WANT_ALG_SHA_256                    1
+#define PSA_WANT_ALG_SHA_384                    1
+#define PSA_WANT_ALG_SHA_512                    1
+#define PSA_WANT_ALG_STREAM_CIPHER              1
+#define PSA_WANT_ALG_TLS12_PRF                  1
+#define PSA_WANT_ALG_TLS12_PSK_TO_MS            1
+#define PSA_WANT_ALG_XTS                        1
+
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_256         1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_384         1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_512         1
+#define PSA_WANT_ECC_MONTGOMERY_255             1
+/*
+ * Curve448 is not yet supported via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/4249). Thus, do not enable it by
+ * default.
+ */
+//#define PSA_WANT_ECC_MONTGOMERY_448             1
+#define PSA_WANT_ECC_SECP_K1_192                1
+/*
+ * SECP224K1 is buggy via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/3541). Thus, do not enable it by
+ * default.
+ */
+//#define PSA_WANT_ECC_SECP_K1_224                1
+#define PSA_WANT_ECC_SECP_K1_256                1
+#define PSA_WANT_ECC_SECP_R1_192                1
+#define PSA_WANT_ECC_SECP_R1_224                1
+#define PSA_WANT_ECC_SECP_R1_256                1
+#define PSA_WANT_ECC_SECP_R1_384                1
+#define PSA_WANT_ECC_SECP_R1_521                1
+
+#define PSA_WANT_KEY_TYPE_DERIVE                1
+#define PSA_WANT_KEY_TYPE_HMAC                  1
+#define PSA_WANT_KEY_TYPE_AES                   1
+#define PSA_WANT_KEY_TYPE_ARC4                  1
+#define PSA_WANT_KEY_TYPE_ARIA                  1
+#define PSA_WANT_KEY_TYPE_CAMELLIA              1
+#define PSA_WANT_KEY_TYPE_CHACHA20              1
+#define PSA_WANT_KEY_TYPE_DES                   1
+#define PSA_WANT_KEY_TYPE_ECC_KEY_PAIR          1
+#define PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY        1
+#define PSA_WANT_KEY_TYPE_RAW_DATA              1
+#define PSA_WANT_KEY_TYPE_RSA_KEY_PAIR          1
+#define PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY        1
+
+#endif /* PSA_CRYPTO_CONFIG_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h
new file mode 100644
index 00000000000..26363c6b2f3
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h
@@ -0,0 +1,56 @@
+/**
+ * \file psa/crypto_driver_common.h
+ * \brief Definitions for all PSA crypto drivers
+ *
+ * This file contains common definitions shared by all PSA crypto drivers.
+ * Do not include it directly: instead, include the header file(s) for
+ * the type(s) of driver that you are implementing. For example, if
+ * you are writing a dynamically registered driver for a secure element,
+ * include `psa/crypto_se_driver.h`.
+ *
+ * This file is part of the PSA Crypto Driver Model, containing functions for
+ * driver developers to implement to enable hardware to be called in a
+ * standardized way by a PSA Cryptographic API implementation. The functions
+ * comprising the driver model, which driver authors implement, are not
+ * intended to be called by application developers.
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef PSA_CRYPTO_DRIVER_COMMON_H
+#define PSA_CRYPTO_DRIVER_COMMON_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* Include type definitions (psa_status_t, psa_algorithm_t,
+ * psa_key_type_t, etc.) and macros to build and analyze values
+ * of these types. */
+#include "crypto_types.h"
+#include "crypto_values.h"
+/* Include size definitions which are used to size some arrays in operation
+ * structures. */
+#include <psa/crypto_sizes.h>
+
+/** For encrypt-decrypt functions, whether the operation is an encryption
+ * or a decryption. */
+typedef enum {
+    PSA_CRYPTO_DRIVER_DECRYPT,
+    PSA_CRYPTO_DRIVER_ENCRYPT
+} psa_encrypt_or_decrypt_t;
+
+#endif /* PSA_CRYPTO_DRIVER_COMMON_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h
new file mode 100644
index 00000000000..a7220091ea3
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h
@@ -0,0 +1,93 @@
+/*
+ *  Declaration of context structures for use with the PSA driver wrapper
+ *  interface. This file contains the context structures for 'composite'
+ *  operations, i.e. those operations which need to make use of other operations
+ *  from the primitives (crypto_driver_contexts_primitives.h)
+ *
+ *  Warning: This file will be auto-generated in the future.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the PSA drivers included in the cryptographic
+ * library. The definition of these objects are then used by crypto_struct.h
+ * to define the implementation-defined types of PSA multi-part state objects.
+ */
+/*  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H
+#define PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H
+
+#include "psa/crypto_driver_common.h"
+
+/* Include the context structure definitions for the Mbed TLS software drivers */
+#include "psa/crypto_builtin_composites.h"
+
+/* Include the context structure definitions for those drivers that were
+ * declared during the autogeneration process. */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1)
+#include <libtestdriver1/include/psa/crypto.h>
+#endif
+
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_MAC)
+typedef libtestdriver1_mbedtls_psa_mac_operation_t
+        mbedtls_transparent_test_driver_mac_operation_t;
+typedef libtestdriver1_mbedtls_psa_mac_operation_t
+        mbedtls_opaque_test_driver_mac_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_MAC_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_MAC_OPERATION_INIT
+#define MBEDTLS_OPAQUE_TEST_DRIVER_MAC_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_MAC_OPERATION_INIT
+
+#else
+typedef mbedtls_psa_mac_operation_t
+        mbedtls_transparent_test_driver_mac_operation_t;
+typedef mbedtls_psa_mac_operation_t
+        mbedtls_opaque_test_driver_mac_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_MAC_OPERATION_INIT \
+        MBEDTLS_PSA_MAC_OPERATION_INIT
+#define MBEDTLS_OPAQUE_TEST_DRIVER_MAC_OPERATION_INIT \
+        MBEDTLS_PSA_MAC_OPERATION_INIT
+
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 */
+#endif /* PSA_CRYPTO_DRIVER_TEST */
+
+/* Define the context to be used for an operation that is executed through the
+ * PSA Driver wrapper layer as the union of all possible driver's contexts.
+ *
+ * The union members are the driver's context structures, and the member names
+ * are formatted as `'drivername'_ctx`. This allows for procedural generation
+ * of both this file and the content of psa_crypto_driver_wrappers.c */
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_mac_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_mac_operation_t transparent_test_driver_ctx;
+    mbedtls_opaque_test_driver_mac_operation_t opaque_test_driver_ctx;
+#endif
+} psa_driver_mac_context_t;
+
+#endif /* PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H */
+/* End of automatically generated file. */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h
new file mode 100644
index 00000000000..2bb01ed432f
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h
@@ -0,0 +1,117 @@
+/*
+ *  Declaration of context structures for use with the PSA driver wrapper
+ *  interface. This file contains the context structures for 'primitive'
+ *  operations, i.e. those operations which do not rely on other contexts.
+ *
+ *  Warning: This file will be auto-generated in the future.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the PSA drivers included in the cryptographic
+ * library. The definition of these objects are then used by crypto_struct.h
+ * to define the implementation-defined types of PSA multi-part state objects.
+ */
+/*  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H
+#define PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H
+
+#include "psa/crypto_driver_common.h"
+
+/* Include the context structure definitions for the Mbed TLS software drivers */
+#include "psa/crypto_builtin_primitives.h"
+
+/* Include the context structure definitions for those drivers that were
+ * declared during the autogeneration process. */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1)
+#include <libtestdriver1/include/psa/crypto.h>
+#endif
+
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_CIPHER)
+typedef libtestdriver1_mbedtls_psa_cipher_operation_t
+        mbedtls_transparent_test_driver_cipher_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_CIPHER_OPERATION_INIT
+#else
+typedef mbedtls_psa_cipher_operation_t
+        mbedtls_transparent_test_driver_cipher_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT \
+        MBEDTLS_PSA_CIPHER_OPERATION_INIT
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 &&
+          LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_CIPHER */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_HASH)
+typedef libtestdriver1_mbedtls_psa_hash_operation_t
+        mbedtls_transparent_test_driver_hash_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_HASH_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_HASH_OPERATION_INIT
+#else
+typedef mbedtls_psa_hash_operation_t
+        mbedtls_transparent_test_driver_hash_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_HASH_OPERATION_INIT \
+        MBEDTLS_PSA_HASH_OPERATION_INIT
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 &&
+          LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_HASH */
+
+typedef struct {
+    unsigned int initialised : 1;
+    mbedtls_transparent_test_driver_cipher_operation_t ctx;
+} mbedtls_opaque_test_driver_cipher_operation_t;
+
+#define MBEDTLS_OPAQUE_TEST_DRIVER_CIPHER_OPERATION_INIT \
+     { 0, MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT }
+
+#endif /* PSA_CRYPTO_DRIVER_TEST */
+
+/* Define the context to be used for an operation that is executed through the
+ * PSA Driver wrapper layer as the union of all possible driver's contexts.
+ *
+ * The union members are the driver's context structures, and the member names
+ * are formatted as `'drivername'_ctx`. This allows for procedural generation
+ * of both this file and the content of psa_crypto_driver_wrappers.c */
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_hash_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_hash_operation_t test_driver_ctx;
+#endif
+} psa_driver_hash_context_t;
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_cipher_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_cipher_operation_t transparent_test_driver_ctx;
+    mbedtls_opaque_test_driver_cipher_operation_t opaque_test_driver_ctx;
+#endif
+} psa_driver_cipher_context_t;
+
+#endif /* PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H */
+/* End of automatically generated file. */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_extra.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_extra.h
new file mode 100644
index 00000000000..3ee0482cbda
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_extra.h
@@ -0,0 +1,819 @@
+/**
+ * \file psa/crypto_extra.h
+ *
+ * \brief PSA cryptography module: Mbed TLS vendor extensions
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file is reserved for vendor-specific definitions.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_EXTRA_H
+#define PSA_CRYPTO_EXTRA_H
+
+#include "mbedtls/platform_util.h"
+
+#include "crypto_types.h"
+#include "crypto_compat.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* UID for secure storage seed */
+#define PSA_CRYPTO_ITS_RANDOM_SEED_UID 0xFFFFFF52
+
+/* See config.h for definition */
+#if !defined(MBEDTLS_PSA_KEY_SLOT_COUNT)
+#define MBEDTLS_PSA_KEY_SLOT_COUNT 32
+#endif
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** \brief Declare the enrollment algorithm for a key.
+ *
+ * An operation on a key may indifferently use the algorithm set with
+ * psa_set_key_algorithm() or with this function.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param alg2                  A second algorithm that the key may be used
+ *                              for, in addition to the algorithm set with
+ *                              psa_set_key_algorithm().
+ *
+ * \warning Setting an enrollment algorithm is not recommended, because
+ *          using the same key with different algorithms can allow some
+ *          attacks based on arithmetic relations between different
+ *          computations made with the same key, or can escalate harmless
+ *          side channels into exploitable ones. Use this function only
+ *          if it is necessary to support a protocol for which it has been
+ *          verified that the usage of the key with multiple algorithms
+ *          is safe.
+ */
+static inline void psa_set_key_enrollment_algorithm(
+    psa_key_attributes_t *attributes,
+    psa_algorithm_t alg2)
+{
+    attributes->core.policy.alg2 = alg2;
+}
+
+/** Retrieve the enrollment algorithm policy from key attributes.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The enrollment algorithm stored in the attribute structure.
+ */
+static inline psa_algorithm_t psa_get_key_enrollment_algorithm(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.alg2 );
+}
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+
+/** Retrieve the slot number where a key is stored.
+ *
+ * A slot number is only defined for keys that are stored in a secure
+ * element.
+ *
+ * This information is only useful if the secure element is not entirely
+ * managed through the PSA Cryptography API. It is up to the secure
+ * element driver to decide how PSA slot numbers map to any other interface
+ * that the secure element may have.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ * \param[out] slot_number      On success, the slot number containing the key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key is located in a secure element, and \p *slot_number
+ *         indicates the slot number that contains it.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The caller is not permitted to query the slot number.
+ *         Mbed Crypto currently does not return this error.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key is not located in a secure element.
+ */
+psa_status_t psa_get_key_slot_number(
+    const psa_key_attributes_t *attributes,
+    psa_key_slot_number_t *slot_number );
+
+/** Choose the slot number where a key is stored.
+ *
+ * This function declares a slot number in the specified attribute
+ * structure.
+ *
+ * A slot number is only meaningful for keys that are stored in a secure
+ * element. It is up to the secure element driver to decide how PSA slot
+ * numbers map to any other interface that the secure element may have.
+ *
+ * \note Setting a slot number in key attributes for a key creation can
+ *       cause the following errors when creating the key:
+ *       - #PSA_ERROR_NOT_SUPPORTED if the selected secure element does
+ *         not support choosing a specific slot number.
+ *       - #PSA_ERROR_NOT_PERMITTED if the caller is not permitted to
+ *         choose slot numbers in general or to choose this specific slot.
+ *       - #PSA_ERROR_INVALID_ARGUMENT if the chosen slot number is not
+ *         valid in general or not valid for this specific key.
+ *       - #PSA_ERROR_ALREADY_EXISTS if there is already a key in the
+ *         selected slot.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param slot_number           The slot number to set.
+ */
+static inline void psa_set_key_slot_number(
+    psa_key_attributes_t *attributes,
+    psa_key_slot_number_t slot_number )
+{
+    attributes->core.flags |= MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER;
+    attributes->slot_number = slot_number;
+}
+
+/** Remove the slot number attribute from a key attribute structure.
+ *
+ * This function undoes the action of psa_set_key_slot_number().
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ */
+static inline void psa_clear_key_slot_number(
+    psa_key_attributes_t *attributes )
+{
+    attributes->core.flags &= ~MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER;
+}
+
+/** Register a key that is already present in a secure element.
+ *
+ * The key must be located in a secure element designated by the
+ * lifetime field in \p attributes, in the slot set with
+ * psa_set_key_slot_number() in the attribute structure.
+ * This function makes the key available through the key identifier
+ * specified in \p attributes.
+ *
+ * \param[in] attributes        The attributes of the existing key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key was successfully registered.
+ *         Note that depending on the design of the driver, this may or may
+ *         not guarantee that a key actually exists in the designated slot
+ *         and is compatible with the specified attributes.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a key with the identifier specified in
+ *         \p attributes.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The secure element driver for the specified lifetime does not
+ *         support registering a key.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The identifier in \p attributes is invalid, namely the identifier is
+ *         not in the user range.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p attributes specifies a lifetime which is not located
+ *         in a secure element.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         No slot number is specified in \p attributes,
+ *         or the specified slot number is not valid.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The caller is not authorized to register the specified key slot.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t mbedtls_psa_register_se_key(
+    const psa_key_attributes_t *attributes);
+
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+
+/**@}*/
+
+/**
+ * \brief Library deinitialization.
+ *
+ * This function clears all data associated with the PSA layer,
+ * including the whole key store.
+ *
+ * This is an Mbed TLS extension.
+ */
+void mbedtls_psa_crypto_free( void );
+
+/** \brief Statistics about
+ * resource consumption related to the PSA keystore.
+ *
+ * \note The content of this structure is not part of the stable API and ABI
+ *       of Mbed Crypto and may change arbitrarily from version to version.
+ */
+typedef struct mbedtls_psa_stats_s
+{
+    /** Number of slots containing key material for a volatile key. */
+    size_t volatile_slots;
+    /** Number of slots containing key material for a key which is in
+     * internal persistent storage. */
+    size_t persistent_slots;
+    /** Number of slots containing a reference to a key in a
+     * secure element. */
+    size_t external_slots;
+    /** Number of slots which are occupied, but do not contain
+     * key material yet. */
+    size_t half_filled_slots;
+    /** Number of slots that contain cache data. */
+    size_t cache_slots;
+    /** Number of slots that are not used for anything. */
+    size_t empty_slots;
+    /** Number of slots that are locked. */
+    size_t locked_slots;
+    /** Largest key id value among open keys in internal persistent storage. */
+    psa_key_id_t max_open_internal_key_id;
+    /** Largest key id value among open keys in secure elements. */
+    psa_key_id_t max_open_external_key_id;
+} mbedtls_psa_stats_t;
+
+/** \brief Get statistics about
+ * resource consumption related to the PSA keystore.
+ *
+ * \note When Mbed Crypto is built as part of a service, with isolation
+ *       between the application and the keystore, the service may or
+ *       may not expose this function.
+ */
+void mbedtls_psa_get_stats( mbedtls_psa_stats_t *stats );
+
+/**
+ * \brief Inject an initial entropy seed for the random generator into
+ *        secure storage.
+ *
+ * This function injects data to be used as a seed for the random generator
+ * used by the PSA Crypto implementation. On devices that lack a trusted
+ * entropy source (preferably a hardware random number generator),
+ * the Mbed PSA Crypto implementation uses this value to seed its
+ * random generator.
+ *
+ * On devices without a trusted entropy source, this function must be
+ * called exactly once in the lifetime of the device. On devices with
+ * a trusted entropy source, calling this function is optional.
+ * In all cases, this function may only be called before calling any
+ * other function in the PSA Crypto API, including psa_crypto_init().
+ *
+ * When this function returns successfully, it populates a file in
+ * persistent storage. Once the file has been created, this function
+ * can no longer succeed.
+ *
+ * If any error occurs, this function does not change the system state.
+ * You can call this function again after correcting the reason for the
+ * error if possible.
+ *
+ * \warning This function **can** fail! Callers MUST check the return status.
+ *
+ * \warning If you use this function, you should use it as part of a
+ *          factory provisioning process. The value of the injected seed
+ *          is critical to the security of the device. It must be
+ *          *secret*, *unpredictable* and (statistically) *unique per device*.
+ *          You should be generate it randomly using a cryptographically
+ *          secure random generator seeded from trusted entropy sources.
+ *          You should transmit it securely to the device and ensure
+ *          that its value is not leaked or stored anywhere beyond the
+ *          needs of transmitting it from the point of generation to
+ *          the call of this function, and erase all copies of the value
+ *          once this function returns.
+ *
+ * This is an Mbed TLS extension.
+ *
+ * \note This function is only available on the following platforms:
+ * * If the compile-time option MBEDTLS_PSA_INJECT_ENTROPY is enabled.
+ *   Note that you must provide compatible implementations of
+ *   mbedtls_nv_seed_read and mbedtls_nv_seed_write.
+ * * In a client-server integration of PSA Cryptography, on the client side,
+ *   if the server supports this feature.
+ * \param[in] seed          Buffer containing the seed value to inject.
+ * \param[in] seed_size     Size of the \p seed buffer.
+ *                          The size of the seed in bytes must be greater
+ *                          or equal to both #MBEDTLS_ENTROPY_MIN_PLATFORM
+ *                          and #MBEDTLS_ENTROPY_BLOCK_SIZE.
+ *                          It must be less or equal to
+ *                          #MBEDTLS_ENTROPY_MAX_SEED_SIZE.
+ *
+ * \retval #PSA_SUCCESS
+ *         The seed value was injected successfully. The random generator
+ *         of the PSA Crypto implementation is now ready for use.
+ *         You may now call psa_crypto_init() and use the PSA Crypto
+ *         implementation.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p seed_size is out of range.
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         There was a failure reading or writing from storage.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The library has already been initialized. It is no longer
+ *         possible to call this function.
+ */
+psa_status_t mbedtls_psa_inject_entropy(const uint8_t *seed,
+                                        size_t seed_size);
+
+/** \addtogroup crypto_types
+ * @{
+ */
+
+/** DSA public key.
+ *
+ * The import and export format is the
+ * representation of the public key `y = g^x mod p` as a big-endian byte
+ * string. The length of the byte string is the length of the base prime `p`
+ * in bytes.
+ */
+#define PSA_KEY_TYPE_DSA_PUBLIC_KEY                 ((psa_key_type_t)0x4002)
+
+/** DSA key pair (private and public key).
+ *
+ * The import and export format is the
+ * representation of the private key `x` as a big-endian byte string. The
+ * length of the byte string is the private key size in bytes (leading zeroes
+ * are not stripped).
+ *
+ * Determinstic DSA key derivation with psa_generate_derived_key follows
+ * FIPS 186-4 &sect;B.1.2: interpret the byte string as integer
+ * in big-endian order. Discard it if it is not in the range
+ * [0, *N* - 2] where *N* is the boundary of the private key domain
+ * (the prime *p* for Diffie-Hellman, the subprime *q* for DSA,
+ * or the order of the curve's base point for ECC).
+ * Add 1 to the resulting integer and use this as the private key *x*.
+ *
+ */
+#define PSA_KEY_TYPE_DSA_KEY_PAIR                    ((psa_key_type_t)0x7002)
+
+/** Whether a key type is an DSA key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_DSA(type)                                       \
+    (PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) == PSA_KEY_TYPE_DSA_PUBLIC_KEY)
+
+#define PSA_ALG_DSA_BASE                        ((psa_algorithm_t)0x06000400)
+/** DSA signature with hashing.
+ *
+ * This is the signature scheme defined by FIPS 186-4,
+ * with a random per-message secret number (*k*).
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding DSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DSA(hash_alg)                             \
+    (PSA_ALG_DSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_DETERMINISTIC_DSA_BASE          ((psa_algorithm_t)0x06000500)
+#define PSA_ALG_DSA_DETERMINISTIC_FLAG PSA_ALG_ECDSA_DETERMINISTIC_FLAG
+/** Deterministic DSA signature with hashing.
+ *
+ * This is the deterministic variant defined by RFC 6979 of
+ * the signature scheme defined by FIPS 186-4.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding DSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DETERMINISTIC_DSA(hash_alg)                             \
+    (PSA_ALG_DETERMINISTIC_DSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_IS_DSA(alg)                                             \
+    (((alg) & ~PSA_ALG_HASH_MASK & ~PSA_ALG_DSA_DETERMINISTIC_FLAG) ==  \
+     PSA_ALG_DSA_BASE)
+#define PSA_ALG_DSA_IS_DETERMINISTIC(alg)               \
+    (((alg) & PSA_ALG_DSA_DETERMINISTIC_FLAG) != 0)
+#define PSA_ALG_IS_DETERMINISTIC_DSA(alg)                       \
+    (PSA_ALG_IS_DSA(alg) && PSA_ALG_DSA_IS_DETERMINISTIC(alg))
+#define PSA_ALG_IS_RANDOMIZED_DSA(alg)                          \
+    (PSA_ALG_IS_DSA(alg) && !PSA_ALG_DSA_IS_DETERMINISTIC(alg))
+
+
+/* We need to expand the sample definition of this macro from
+ * the API definition. */
+#undef PSA_ALG_IS_VENDOR_HASH_AND_SIGN
+#define PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg)    \
+    PSA_ALG_IS_DSA(alg)
+
+/**@}*/
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** Custom Diffie-Hellman group.
+ *
+ * For keys of type #PSA_KEY_TYPE_DH_PUBLIC_KEY(#PSA_DH_FAMILY_CUSTOM) or
+ * #PSA_KEY_TYPE_DH_KEY_PAIR(#PSA_DH_FAMILY_CUSTOM), the group data comes
+ * from domain parameters set by psa_set_key_domain_parameters().
+ */
+#define PSA_DH_FAMILY_CUSTOM             ((psa_dh_family_t) 0x7e)
+
+
+/**
+ * \brief Set domain parameters for a key.
+ *
+ * Some key types require additional domain parameters in addition to
+ * the key type identifier and the key size. Use this function instead
+ * of psa_set_key_type() when you need to specify domain parameters.
+ *
+ * The format for the required domain parameters varies based on the key type.
+ *
+ * - For RSA keys (#PSA_KEY_TYPE_RSA_PUBLIC_KEY or #PSA_KEY_TYPE_RSA_KEY_PAIR),
+ *   the domain parameter data consists of the public exponent,
+ *   represented as a big-endian integer with no leading zeros.
+ *   This information is used when generating an RSA key pair.
+ *   When importing a key, the public exponent is read from the imported
+ *   key data and the exponent recorded in the attribute structure is ignored.
+ *   As an exception, the public exponent 65537 is represented by an empty
+ *   byte string.
+ * - For DSA keys (#PSA_KEY_TYPE_DSA_PUBLIC_KEY or #PSA_KEY_TYPE_DSA_KEY_PAIR),
+ *   the `Dss-Parms` format as defined by RFC 3279 &sect;2.3.2.
+ *   ```
+ *   Dss-Parms ::= SEQUENCE  {
+ *      p       INTEGER,
+ *      q       INTEGER,
+ *      g       INTEGER
+ *   }
+ *   ```
+ * - For Diffie-Hellman key exchange keys
+ *   (#PSA_KEY_TYPE_DH_PUBLIC_KEY(#PSA_DH_FAMILY_CUSTOM) or
+ *   #PSA_KEY_TYPE_DH_KEY_PAIR(#PSA_DH_FAMILY_CUSTOM)), the
+ *   `DomainParameters` format as defined by RFC 3279 &sect;2.3.3.
+ *   ```
+ *   DomainParameters ::= SEQUENCE {
+ *      p               INTEGER,                    -- odd prime, p=jq +1
+ *      g               INTEGER,                    -- generator, g
+ *      q               INTEGER,                    -- factor of p-1
+ *      j               INTEGER OPTIONAL,           -- subgroup factor
+ *      validationParms ValidationParms OPTIONAL
+ *   }
+ *   ValidationParms ::= SEQUENCE {
+ *      seed            BIT STRING,
+ *      pgenCounter     INTEGER
+ *   }
+ *   ```
+ *
+ * \note This function may allocate memory or other resources.
+ *       Once you have called this function on an attribute structure,
+ *       you must call psa_reset_key_attributes() to free these resources.
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param[in,out] attributes    Attribute structure where the specified domain
+ *                              parameters will be stored.
+ *                              If this function fails, the content of
+ *                              \p attributes is not modified.
+ * \param type                  Key type (a \c PSA_KEY_TYPE_XXX value).
+ * \param[in] data              Buffer containing the key domain parameters.
+ *                              The content of this buffer is interpreted
+ *                              according to \p type as described above.
+ * \param data_length           Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ */
+psa_status_t psa_set_key_domain_parameters(psa_key_attributes_t *attributes,
+                                           psa_key_type_t type,
+                                           const uint8_t *data,
+                                           size_t data_length);
+
+/**
+ * \brief Get domain parameters for a key.
+ *
+ * Get the domain parameters for a key with this function, if any. The format
+ * of the domain parameters written to \p data is specified in the
+ * documentation for psa_set_key_domain_parameters().
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ * \param[out] data             On success, the key domain parameters.
+ * \param data_size             Size of the \p data buffer in bytes.
+ *                              The buffer is guaranteed to be large
+ *                              enough if its size in bytes is at least
+ *                              the value given by
+ *                              PSA_KEY_DOMAIN_PARAMETERS_SIZE().
+ * \param[out] data_length      On success, the number of bytes
+ *                              that make up the key domain parameters data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ */
+psa_status_t psa_get_key_domain_parameters(
+    const psa_key_attributes_t *attributes,
+    uint8_t *data,
+    size_t data_size,
+    size_t *data_length);
+
+/** Safe output buffer size for psa_get_key_domain_parameters().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param key_type  A supported key type.
+ * \param key_bits  The size of the key in bits.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_get_key_domain_parameters() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported
+ *         by the implementation, this macro shall return either a
+ *         sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_KEY_DOMAIN_PARAMETERS_SIZE(key_type, key_bits)              \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? sizeof(int) :                      \
+     PSA_KEY_TYPE_IS_DH(key_type) ? PSA_DH_KEY_DOMAIN_PARAMETERS_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_DSA(key_type) ? PSA_DSA_KEY_DOMAIN_PARAMETERS_SIZE(key_bits) : \
+     0)
+#define PSA_DH_KEY_DOMAIN_PARAMETERS_SIZE(key_bits)     \
+    (4 + (PSA_BITS_TO_BYTES(key_bits) + 5) * 3 /*without optional parts*/)
+#define PSA_DSA_KEY_DOMAIN_PARAMETERS_SIZE(key_bits)    \
+    (4 + (PSA_BITS_TO_BYTES(key_bits) + 5) * 2 /*p, g*/ + 34 /*q*/)
+
+/**@}*/
+
+/** \defgroup psa_tls_helpers TLS helper functions
+ * @{
+ */
+
+#if defined(MBEDTLS_ECP_C)
+#include <mbedtls/ecp.h>
+
+/** Convert an ECC curve identifier from the Mbed TLS encoding to PSA.
+ *
+ * \note This function is provided solely for the convenience of
+ *       Mbed TLS and may be removed at any time without notice.
+ *
+ * \param grpid         An Mbed TLS elliptic curve identifier
+ *                      (`MBEDTLS_ECP_DP_xxx`).
+ * \param[out] bits     On success, the bit size of the curve.
+ *
+ * \return              The corresponding PSA elliptic curve identifier
+ *                      (`PSA_ECC_FAMILY_xxx`).
+ * \return              \c 0 on failure (\p grpid is not recognized).
+ */
+static inline psa_ecc_family_t mbedtls_ecc_group_to_psa( mbedtls_ecp_group_id grpid,
+                                                        size_t *bits )
+{
+    switch( grpid )
+    {
+        case MBEDTLS_ECP_DP_SECP192R1:
+            *bits = 192;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP224R1:
+            *bits = 224;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP256R1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP384R1:
+            *bits = 384;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP521R1:
+            *bits = 521;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_BP256R1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_BP384R1:
+            *bits = 384;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_BP512R1:
+            *bits = 512;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_CURVE25519:
+            *bits = 255;
+            return( PSA_ECC_FAMILY_MONTGOMERY );
+        case MBEDTLS_ECP_DP_SECP192K1:
+            *bits = 192;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_SECP224K1:
+            *bits = 224;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_SECP256K1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_CURVE448:
+            *bits = 448;
+            return( PSA_ECC_FAMILY_MONTGOMERY );
+        default:
+            *bits = 0;
+            return( 0 );
+    }
+}
+
+/** Convert an ECC curve identifier from the PSA encoding to Mbed TLS.
+ *
+ * \note This function is provided solely for the convenience of
+ *       Mbed TLS and may be removed at any time without notice.
+ *
+ * \param curve         A PSA elliptic curve identifier
+ *                      (`PSA_ECC_FAMILY_xxx`).
+ * \param bits          The bit-length of a private key on \p curve.
+ * \param bits_is_sloppy If true, \p bits may be the bit-length rounded up
+ *                      to the nearest multiple of 8. This allows the caller
+ *                      to infer the exact curve from the length of a key
+ *                      which is supplied as a byte string.
+ *
+ * \return              The corresponding Mbed TLS elliptic curve identifier
+ *                      (`MBEDTLS_ECP_DP_xxx`).
+ * \return              #MBEDTLS_ECP_DP_NONE if \c curve is not recognized.
+ * \return              #MBEDTLS_ECP_DP_NONE if \p bits is not
+ *                      correct for \p curve.
+ */
+mbedtls_ecp_group_id mbedtls_ecc_group_of_psa( psa_ecc_family_t curve,
+                                               size_t bits,
+                                               int bits_is_sloppy );
+#endif /* MBEDTLS_ECP_C */
+
+/**@}*/
+
+/** \defgroup psa_external_rng External random generator
+ * @{
+ */
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+/** External random generator function, implemented by the platform.
+ *
+ * When the compile-time option #MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG is enabled,
+ * this function replaces Mbed TLS's entropy and DRBG modules for all
+ * random generation triggered via PSA crypto interfaces.
+ *
+ * \note This random generator must deliver random numbers with cryptographic
+ *       quality and high performance. It must supply unpredictable numbers
+ *       with a uniform distribution. The implementation of this function
+ *       is responsible for ensuring that the random generator is seeded
+ *       with sufficient entropy. If you have a hardware TRNG which is slow
+ *       or delivers non-uniform output, declare it as an entropy source
+ *       with mbedtls_entropy_add_source() instead of enabling this option.
+ *
+ * \param[in,out] context       Pointer to the random generator context.
+ *                              This is all-bits-zero on the first call
+ *                              and preserved between successive calls.
+ * \param[out] output           Output buffer. On success, this buffer
+ *                              contains random data with a uniform
+ *                              distribution.
+ * \param output_size           The size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, set this value to \p output_size.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success. The output buffer contains \p output_size bytes of
+ *         cryptographic-quality random data, and \c *output_length is
+ *         set to \p output_size.
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ *         The random generator requires extra entropy and there is no
+ *         way to obtain entropy under current environment conditions.
+ *         This error should not happen under normal circumstances since
+ *         this function is responsible for obtaining as much entropy as
+ *         it needs. However implementations of this function may return
+ *         #PSA_ERROR_INSUFFICIENT_ENTROPY if there is no way to obtain
+ *         entropy without blocking indefinitely.
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ *         A failure of the random generator hardware that isn't covered
+ *         by #PSA_ERROR_INSUFFICIENT_ENTROPY.
+ */
+psa_status_t mbedtls_psa_external_get_random(
+    mbedtls_psa_external_random_context_t *context,
+    uint8_t *output, size_t output_size, size_t *output_length );
+#endif /* MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG */
+
+/**@}*/
+
+/** \defgroup psa_builtin_keys Built-in keys
+ * @{
+ */
+
+/** The minimum value for a key identifier that is built into the
+ * implementation.
+ *
+ * The range of key identifiers from #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN
+ * to #MBEDTLS_PSA_KEY_ID_BUILTIN_MAX within the range from
+ * #PSA_KEY_ID_VENDOR_MIN and #PSA_KEY_ID_VENDOR_MAX and must not intersect
+ * with any other set of implementation-chosen key identifiers.
+ *
+ * This value is part of the library's ABI since changing it would invalidate
+ * the values of built-in key identifiers in applications.
+ */
+#define MBEDTLS_PSA_KEY_ID_BUILTIN_MIN          ((psa_key_id_t)0x7fff0000)
+
+/** The maximum value for a key identifier that is built into the
+ * implementation.
+ *
+ * See #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN for more information.
+ */
+#define MBEDTLS_PSA_KEY_ID_BUILTIN_MAX          ((psa_key_id_t)0x7fffefff)
+
+/** A slot number identifying a key in a driver.
+ *
+ * Values of this type are used to identify built-in keys.
+ */
+typedef uint64_t psa_drv_slot_number_t;
+
+#if defined(MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS)
+/** Test whether a key identifier belongs to the builtin key range.
+ *
+ * \param key_id  Key identifier to test.
+ *
+ * \retval 1
+ *         The key identifier is a builtin key identifier.
+ * \retval 0
+ *         The key identifier is not a builtin key identifier.
+ */
+static inline int psa_key_id_is_builtin( psa_key_id_t key_id )
+{
+    return( ( key_id >= MBEDTLS_PSA_KEY_ID_BUILTIN_MIN ) &&
+            ( key_id <= MBEDTLS_PSA_KEY_ID_BUILTIN_MAX ) );
+}
+
+/** Platform function to obtain the location and slot number of a built-in key.
+ *
+ * An application-specific implementation of this function must be provided if
+ * #MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS is enabled. This would typically be provided
+ * as part of a platform's system image.
+ *
+ * #MBEDTLS_SVC_KEY_ID_GET_KEY_ID(\p key_id) needs to be in the range from
+ * #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN to #MBEDTLS_PSA_KEY_ID_BUILTIN_MAX.
+ *
+ * In a multi-application configuration
+ * (\c MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER is defined),
+ * this function should check that #MBEDTLS_SVC_KEY_ID_GET_OWNER_ID(\p key_id)
+ * is allowed to use the given key.
+ *
+ * \param key_id                The key ID for which to retrieve the
+ *                              location and slot attributes.
+ * \param[out] lifetime         On success, the lifetime associated with the key
+ *                              corresponding to \p key_id. Lifetime is a
+ *                              combination of which driver contains the key,
+ *                              and with what persistence level the key is
+ *                              intended to be used. If the platform
+ *                              implementation does not contain specific
+ *                              information about the intended key persistence
+ *                              level, the persistence level may be reported as
+ *                              #PSA_KEY_PERSISTENCE_DEFAULT.
+ * \param[out] slot_number      On success, the slot number known to the driver
+ *                              registered at the lifetime location reported
+ *                              through \p lifetime which corresponds to the
+ *                              requested built-in key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The requested key identifier designates a built-in key.
+ *         In a multi-application configuration, the requested owner
+ *         is allowed to access it.
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ *         The requested key identifier is not a built-in key which is known
+ *         to this function. If a key exists in the key storage with this
+ *         identifier, the data from the storage will be used.
+ * \return (any other error)
+ *         Any other error is propagated to the function that requested the key.
+ *         Common errors include:
+ *         - #PSA_ERROR_NOT_PERMITTED: the key exists but the requested owner
+ *           is not allowed to access it.
+ */
+psa_status_t mbedtls_psa_platform_get_builtin_key(
+    mbedtls_svc_key_id_t key_id,
+    psa_key_lifetime_t *lifetime,
+    psa_drv_slot_number_t *slot_number );
+#endif /* MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS */
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_EXTRA_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_platform.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_platform.h
new file mode 100644
index 00000000000..66f46879305
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_platform.h
@@ -0,0 +1,111 @@
+/**
+ * \file psa/crypto_platform.h
+ *
+ * \brief PSA cryptography module: Mbed TLS platform definitions
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains platform-dependent type definitions.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, implementers should take care to ensure that
+ * the definitions that are exposed to applications match what the
+ * module implements.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_PLATFORM_H
+#define PSA_CRYPTO_PLATFORM_H
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+/* Translate between classic MBEDTLS_xxx feature symbols and PSA_xxx
+ * feature symbols. */
+#include "mbedtls/config_psa.h"
+
+/* PSA requires several types which C99 provides in stdint.h. */
+#include <stdint.h>
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+
+/* Building for the PSA Crypto service on a PSA platform, a key owner is a PSA
+ * partition identifier.
+ *
+ * The function psa_its_identifier_of_slot() in psa_crypto_storage.c that
+ * translates a key identifier to a key storage file name assumes that
+ * mbedtls_key_owner_id_t is an 32 bits integer. This function thus needs
+ * reworking if mbedtls_key_owner_id_t is not defined as a 32 bits integer
+ * here anymore.
+ */
+typedef int32_t mbedtls_key_owner_id_t;
+
+/** Compare two key owner identifiers.
+ *
+ * \param id1 First key owner identifier.
+ * \param id2 Second key owner identifier.
+ *
+ * \return Non-zero if the two key owner identifiers are equal, zero otherwise.
+ */
+static inline int mbedtls_key_owner_id_equal( mbedtls_key_owner_id_t id1,
+                                              mbedtls_key_owner_id_t id2 )
+{
+    return( id1 == id2 );
+}
+
+#endif /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/*
+ * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is being built for SPM
+ * (Secure Partition Manager) integration which separates the code into two
+ * parts: NSPE (Non-Secure Processing Environment) and SPE (Secure Processing
+ * Environment). When building for the SPE, an additional header file should be
+ * included.
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_SPM)
+#define PSA_CRYPTO_SECURE 1
+#include "crypto_spe.h"
+#endif // MBEDTLS_PSA_CRYPTO_SPM
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+/** The type of the context passed to mbedtls_psa_external_get_random().
+ *
+ * Mbed TLS initializes the context to all-bits-zero before calling
+ * mbedtls_psa_external_get_random() for the first time.
+ *
+ * The definition of this type in the Mbed TLS source code is for
+ * demonstration purposes. Implementers of mbedtls_psa_external_get_random()
+ * are expected to replace it with a custom definition.
+ */
+typedef struct {
+    uintptr_t opaque[2];
+} mbedtls_psa_external_random_context_t;
+#endif /* MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG */
+
+#endif /* PSA_CRYPTO_PLATFORM_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h
new file mode 100644
index 00000000000..1dc8f9b5c40
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h
@@ -0,0 +1,1395 @@
+/**
+ * \file psa/crypto_se_driver.h
+ * \brief PSA external cryptoprocessor driver module
+ *
+ * This header declares types and function signatures for cryptography
+ * drivers that access key material via opaque references.
+ * This is meant for cryptoprocessors that have a separate key storage from the
+ * space in which the PSA Crypto implementation runs, typically secure
+ * elements (SEs).
+ *
+ * This file is part of the PSA Crypto Driver HAL (hardware abstraction layer),
+ * containing functions for driver developers to implement to enable hardware
+ * to be called in a standardized way by a PSA Cryptography API
+ * implementation. The functions comprising the driver HAL, which driver
+ * authors implement, are not intended to be called by application developers.
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef PSA_CRYPTO_SE_DRIVER_H
+#define PSA_CRYPTO_SE_DRIVER_H
+
+#include "crypto_driver_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup se_init Secure element driver initialization
+ */
+/**@{*/
+
+/** \brief Driver context structure
+ *
+ * Driver functions receive a pointer to this structure.
+ * Each registered driver has one instance of this structure.
+ *
+ * Implementations must include the fields specified here and
+ * may include other fields.
+ */
+typedef struct {
+    /** A read-only pointer to the driver's persistent data.
+     *
+     * Drivers typically use this persistent data to keep track of
+     * which slot numbers are available. This is only a guideline:
+     * drivers may use the persistent data for any purpose, keeping
+     * in mind the restrictions on when the persistent data is saved
+     * to storage: the persistent data is only saved after calling
+     * certain functions that receive a writable pointer to the
+     * persistent data.
+     *
+     * The core allocates a memory buffer for the persistent data.
+     * The pointer is guaranteed to be suitably aligned for any data type,
+     * like a pointer returned by `malloc` (but the core can use any
+     * method to allocate the buffer, not necessarily `malloc`).
+     *
+     * The size of this buffer is in the \c persistent_data_size field of
+     * this structure.
+     *
+     * Before the driver is initialized for the first time, the content of
+     * the persistent data is all-bits-zero. After a driver upgrade, if the
+     * size of the persistent data has increased, the original data is padded
+     * on the right with zeros; if the size has decreased, the original data
+     * is truncated to the new size.
+     *
+     * This pointer is to read-only data. Only a few driver functions are
+     * allowed to modify the persistent data. These functions receive a
+     * writable pointer. These functions are:
+     * - psa_drv_se_t::p_init
+     * - psa_drv_se_key_management_t::p_allocate
+     * - psa_drv_se_key_management_t::p_destroy
+     *
+     * The PSA Cryptography core saves the persistent data from one
+     * session to the next. It does this before returning from API functions
+     * that call a driver method that is allowed to modify the persistent
+     * data, specifically:
+     * - psa_crypto_init() causes a call to psa_drv_se_t::p_init, and may call
+     *   psa_drv_se_key_management_t::p_destroy to complete an action
+     *   that was interrupted by a power failure.
+     * - Key creation functions cause a call to
+     *   psa_drv_se_key_management_t::p_allocate, and may cause a call to
+     *   psa_drv_se_key_management_t::p_destroy in case an error occurs.
+     * - psa_destroy_key() causes a call to
+     *   psa_drv_se_key_management_t::p_destroy.
+     */
+    const void *const persistent_data;
+
+    /** The size of \c persistent_data in bytes.
+     *
+     * This is always equal to the value of the `persistent_data_size` field
+     * of the ::psa_drv_se_t structure when the driver is registered.
+     */
+    const size_t persistent_data_size;
+
+    /** Driver transient data.
+     *
+     * The core initializes this value to 0 and does not read or modify it
+     * afterwards. The driver may store whatever it wants in this field.
+     */
+    uintptr_t transient_data;
+} psa_drv_se_context_t;
+
+/** \brief A driver initialization function.
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param location                  The location value for which this driver
+ *                                  is registered. The driver will be invoked
+ *                                  for all keys whose lifetime is in this
+ *                                  location.
+ *
+ * \retval #PSA_SUCCESS
+ *         The driver is operational.
+ *         The core will update the persistent data in storage.
+ * \return
+ *         Any other return value prevents the driver from being used in
+ *         this session.
+ *         The core will NOT update the persistent data in storage.
+ */
+typedef psa_status_t (*psa_drv_se_init_t)(psa_drv_se_context_t *drv_context,
+                                          void *persistent_data,
+                                          psa_key_location_t location);
+
+#if defined(__DOXYGEN_ONLY__) || !defined(MBEDTLS_PSA_CRYPTO_SE_C)
+/* Mbed Crypto with secure element support enabled defines this type in
+ * crypto_types.h because it is also visible to applications through an
+ * implementation-specific extension.
+ * For the PSA Cryptography specification, this type is only visible
+ * via crypto_se_driver.h. */
+/** An internal designation of a key slot between the core part of the
+ * PSA Crypto implementation and the driver. The meaning of this value
+ * is driver-dependent. */
+typedef uint64_t psa_key_slot_number_t;
+#endif /* __DOXYGEN_ONLY__ || !MBEDTLS_PSA_CRYPTO_SE_C */
+
+/**@}*/
+
+/** \defgroup se_mac Secure Element Message Authentication Codes
+ * Generation and authentication of Message Authentication Codes (MACs) using
+ * a secure element can be done either as a single function call (via the
+ * `psa_drv_se_mac_generate_t` or `psa_drv_se_mac_verify_t` functions), or in
+ * parts using the following sequence:
+ * - `psa_drv_se_mac_setup_t`
+ * - `psa_drv_se_mac_update_t`
+ * - `psa_drv_se_mac_update_t`
+ * - ...
+ * - `psa_drv_se_mac_finish_t` or `psa_drv_se_mac_finish_verify_t`
+ *
+ * If a previously started secure element MAC operation needs to be terminated,
+ * it should be done so by the `psa_drv_se_mac_abort_t`. Failure to do so may
+ * result in allocated resources not being freed or in other undefined
+ * behavior.
+ */
+/**@{*/
+/** \brief A function that starts a secure element  MAC operation for a PSA
+ * Crypto Driver implementation
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A structure that will contain the
+ *                              hardware-specific MAC context
+ * \param[in] key_slot          The slot of the key to be used for the
+ *                              operation
+ * \param[in] algorithm         The algorithm to be used to underly the MAC
+ *                              operation
+ *
+ * \retval  #PSA_SUCCESS
+ *          Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_setup_t)(psa_drv_se_context_t *drv_context,
+                                               void *op_context,
+                                               psa_key_slot_number_t key_slot,
+                                               psa_algorithm_t algorithm);
+
+/** \brief A function that continues a previously started secure element MAC
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously-established MAC operation to be
+ *                              updated
+ * \param[in] p_input           A buffer containing the message to be appended
+ *                              to the MAC operation
+ * \param[in] input_length      The size in bytes of the input message buffer
+ */
+typedef psa_status_t (*psa_drv_se_mac_update_t)(void *op_context,
+                                                const uint8_t *p_input,
+                                                size_t input_length);
+
+/** \brief a function that completes a previously started secure element MAC
+ * operation by returning the resulting MAC.
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started MAC operation to be
+ *                              finished
+ * \param[out] p_mac            A buffer where the generated MAC will be
+ *                              placed
+ * \param[in] mac_size          The size in bytes of the buffer that has been
+ *                              allocated for the `output` buffer
+ * \param[out] p_mac_length     After completion, will contain the number of
+ *                              bytes placed in the `p_mac` buffer
+ *
+ * \retval  #PSA_SUCCESS
+ *          Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_finish_t)(void *op_context,
+                                                uint8_t *p_mac,
+                                                size_t mac_size,
+                                                size_t *p_mac_length);
+
+/** \brief A function that completes a previously started secure element MAC
+ * operation by comparing the resulting MAC against a provided value
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the previously
+ *                              started MAC operation to be fiinished
+ * \param[in] p_mac             The MAC value against which the resulting MAC
+ *                              will be compared against
+ * \param[in] mac_length        The size in bytes of the value stored in `p_mac`
+ *
+ * \retval #PSA_SUCCESS
+ *         The operation completed successfully and the MACs matched each
+ *         other
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The operation completed successfully, but the calculated MAC did
+ *         not match the provided MAC
+ */
+typedef psa_status_t (*psa_drv_se_mac_finish_verify_t)(void *op_context,
+                                                       const uint8_t *p_mac,
+                                                       size_t mac_length);
+
+/** \brief A function that aborts a previous started secure element MAC
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the previously
+ *                              started MAC operation to be aborted
+ */
+typedef psa_status_t (*psa_drv_se_mac_abort_t)(void *op_context);
+
+/** \brief A function that performs a secure element MAC operation in one
+ * command and returns the calculated MAC
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] p_input           A buffer containing the message to be MACed
+ * \param[in] input_length      The size in bytes of `p_input`
+ * \param[in] key_slot          The slot of the key to be used
+ * \param[in] alg               The algorithm to be used to underlie the MAC
+ *                              operation
+ * \param[out] p_mac            A buffer where the generated MAC will be
+ *                              placed
+ * \param[in] mac_size          The size in bytes of the `p_mac` buffer
+ * \param[out] p_mac_length     After completion, will contain the number of
+ *                              bytes placed in the `output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_generate_t)(psa_drv_se_context_t *drv_context,
+                                                  const uint8_t *p_input,
+                                                  size_t input_length,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t alg,
+                                                  uint8_t *p_mac,
+                                                  size_t mac_size,
+                                                  size_t *p_mac_length);
+
+/** \brief A function that performs a secure element MAC operation in one
+ * command and compares the resulting MAC against a provided value
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in] p_input       A buffer containing the message to be MACed
+ * \param[in] input_length  The size in bytes of `input`
+ * \param[in] key_slot      The slot of the key to be used
+ * \param[in] alg           The algorithm to be used to underlie the MAC
+ *                          operation
+ * \param[in] p_mac         The MAC value against which the resulting MAC will
+ *                          be compared against
+ * \param[in] mac_length   The size in bytes of `mac`
+ *
+ * \retval #PSA_SUCCESS
+ *         The operation completed successfully and the MACs matched each
+ *         other
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The operation completed successfully, but the calculated MAC did
+ *         not match the provided MAC
+ */
+typedef psa_status_t (*psa_drv_se_mac_verify_t)(psa_drv_se_context_t *drv_context,
+                                                const uint8_t *p_input,
+                                                size_t input_length,
+                                                psa_key_slot_number_t key_slot,
+                                                psa_algorithm_t alg,
+                                                const uint8_t *p_mac,
+                                                size_t mac_length);
+
+/** \brief A struct containing all of the function pointers needed to
+ * perform secure element MAC operations
+ *
+ * PSA Crypto API implementations should populate the table as appropriate
+ * upon startup.
+ *
+ * If one of the functions is not implemented (such as
+ * `psa_drv_se_mac_generate_t`), it should be set to NULL.
+ *
+ * Driver implementers should ensure that they implement all of the functions
+ * that make sense for their hardware, and that they provide a full solution
+ * (for example, if they support `p_setup`, they should also support
+ * `p_update` and at least one of `p_finish` or `p_finish_verify`).
+ *
+ */
+typedef struct {
+    /**The size in bytes of the hardware-specific secure element MAC context
+     * structure
+    */
+    size_t                    context_size;
+    /** Function that performs a MAC setup operation
+     */
+    psa_drv_se_mac_setup_t          p_setup;
+    /** Function that performs a MAC update operation
+     */
+    psa_drv_se_mac_update_t         p_update;
+    /** Function that completes a MAC operation
+     */
+    psa_drv_se_mac_finish_t         p_finish;
+    /** Function that completes a MAC operation with a verify check
+     */
+    psa_drv_se_mac_finish_verify_t  p_finish_verify;
+    /** Function that aborts a previoustly started MAC operation
+     */
+    psa_drv_se_mac_abort_t          p_abort;
+    /** Function that performs a MAC operation in one call
+     */
+    psa_drv_se_mac_generate_t       p_mac;
+    /** Function that performs a MAC and verify operation in one call
+     */
+    psa_drv_se_mac_verify_t         p_mac_verify;
+} psa_drv_se_mac_t;
+/**@}*/
+
+/** \defgroup se_cipher Secure Element Symmetric Ciphers
+ *
+ * Encryption and Decryption using secure element keys in block modes other
+ * than ECB must be done in multiple parts, using the following flow:
+ * - `psa_drv_se_cipher_setup_t`
+ * - `psa_drv_se_cipher_set_iv_t` (optional depending upon block mode)
+ * - `psa_drv_se_cipher_update_t`
+ * - `psa_drv_se_cipher_update_t`
+ * - ...
+ * - `psa_drv_se_cipher_finish_t`
+ *
+ * If a previously started secure element Cipher operation needs to be
+ * terminated, it should be done so by the `psa_drv_se_cipher_abort_t`. Failure
+ * to do so may result in allocated resources not being freed or in other
+ * undefined behavior.
+ *
+ * In situations where a PSA Cryptographic API implementation is using a block
+ * mode not-supported by the underlying hardware or driver, it can construct
+ * the block mode itself, while calling the `psa_drv_se_cipher_ecb_t` function
+ * for the cipher operations.
+ */
+/**@{*/
+
+/** \brief A function that provides the cipher setup function for a
+ * secure element driver
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A structure that will contain the
+ *                              hardware-specific cipher context.
+ * \param[in] key_slot          The slot of the key to be used for the
+ *                              operation
+ * \param[in] algorithm         The algorithm to be used in the cipher
+ *                              operation
+ * \param[in] direction         Indicates whether the operation is an encrypt
+ *                              or decrypt
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ */
+typedef psa_status_t (*psa_drv_se_cipher_setup_t)(psa_drv_se_context_t *drv_context,
+                                                  void *op_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  psa_encrypt_or_decrypt_t direction);
+
+/** \brief A function that sets the initialization vector (if
+ * necessary) for an secure element cipher operation
+ *
+ * Rationale: The `psa_se_cipher_*` operation in the PSA Cryptographic API has
+ * two IV functions: one to set the IV, and one to generate it internally. The
+ * generate function is not necessary for the drivers to implement as the PSA
+ * Crypto implementation can do the generation using its RNG features.
+ *
+ * \param[in,out] op_context    A structure that contains the previously set up
+ *                              hardware-specific cipher context
+ * \param[in] p_iv              A buffer containing the initialization vector
+ * \param[in] iv_length         The size (in bytes) of the `p_iv` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_set_iv_t)(void *op_context,
+                                                   const uint8_t *p_iv,
+                                                   size_t iv_length);
+
+/** \brief A function that continues a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context        A hardware-specific structure for the
+ *                                  previously started cipher operation
+ * \param[in] p_input               A buffer containing the data to be
+ *                                  encrypted/decrypted
+ * \param[in] input_size            The size in bytes of the buffer pointed to
+ *                                  by `p_input`
+ * \param[out] p_output             The caller-allocated buffer where the
+ *                                  output will be placed
+ * \param[in] output_size           The allocated size in bytes of the
+ *                                  `p_output` buffer
+ * \param[out] p_output_length      After completion, will contain the number
+ *                                  of bytes placed in the `p_output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_update_t)(void *op_context,
+                                                   const uint8_t *p_input,
+                                                   size_t input_size,
+                                                   uint8_t *p_output,
+                                                   size_t output_size,
+                                                   size_t *p_output_length);
+
+/** \brief A function that completes a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started cipher operation
+ * \param[out] p_output         The caller-allocated buffer where the output
+ *                              will be placed
+ * \param[in] output_size       The allocated size in bytes of the `p_output`
+ *                              buffer
+ * \param[out] p_output_length  After completion, will contain the number of
+ *                              bytes placed in the `p_output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_finish_t)(void *op_context,
+                                                   uint8_t *p_output,
+                                                   size_t output_size,
+                                                   size_t *p_output_length);
+
+/** \brief A function that aborts a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started cipher operation
+ */
+typedef psa_status_t (*psa_drv_se_cipher_abort_t)(void *op_context);
+
+/** \brief A function that performs the ECB block mode for secure element
+ * cipher operations
+ *
+ * Note: this function should only be used with implementations that do not
+ * provide a needed higher-level operation.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          The slot of the key to be used for the operation
+ * \param[in] algorithm         The algorithm to be used in the cipher operation
+ * \param[in] direction         Indicates whether the operation is an encrypt or
+ *                              decrypt
+ * \param[in] p_input           A buffer containing the data to be
+ *                              encrypted/decrypted
+ * \param[in] input_size        The size in bytes of the buffer pointed to by
+ *                              `p_input`
+ * \param[out] p_output         The caller-allocated buffer where the output
+ *                              will be placed
+ * \param[in] output_size       The allocated size in bytes of the `p_output`
+ *                              buffer
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ */
+typedef psa_status_t (*psa_drv_se_cipher_ecb_t)(psa_drv_se_context_t *drv_context,
+                                                psa_key_slot_number_t key_slot,
+                                                psa_algorithm_t algorithm,
+                                                psa_encrypt_or_decrypt_t direction,
+                                                const uint8_t *p_input,
+                                                size_t input_size,
+                                                uint8_t *p_output,
+                                                size_t output_size);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * cipher operations using secure elements.
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented (such as
+ * `psa_drv_se_cipher_ecb_t`), it should be set to NULL.
+ */
+typedef struct {
+    /** The size in bytes of the hardware-specific secure element cipher
+     * context structure
+     */
+    size_t               context_size;
+    /** Function that performs a cipher setup operation */
+    psa_drv_se_cipher_setup_t  p_setup;
+    /** Function that sets a cipher IV (if necessary) */
+    psa_drv_se_cipher_set_iv_t p_set_iv;
+    /** Function that performs a cipher update operation */
+    psa_drv_se_cipher_update_t p_update;
+    /** Function that completes a cipher operation */
+    psa_drv_se_cipher_finish_t p_finish;
+    /** Function that aborts a cipher operation */
+    psa_drv_se_cipher_abort_t  p_abort;
+    /** Function that performs ECB mode for a cipher operation
+     * (Danger: ECB mode should not be used directly by clients of the PSA
+     * Crypto Client API)
+     */
+    psa_drv_se_cipher_ecb_t    p_ecb;
+} psa_drv_se_cipher_t;
+
+/**@}*/
+
+/** \defgroup se_asymmetric Secure Element Asymmetric Cryptography
+ *
+ * Since the amount of data that can (or should) be encrypted or signed using
+ * asymmetric keys is limited by the key size, asymmetric key operations using
+ * keys in a secure element must be done in single function calls.
+ */
+/**@{*/
+
+/**
+ * \brief A function that signs a hash or short message with a private key in
+ * a secure element
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in] key_slot              Key slot of an asymmetric key pair
+ * \param[in] alg                   A signature algorithm that is compatible
+ *                                  with the type of `key`
+ * \param[in] p_hash                The hash to sign
+ * \param[in] hash_length           Size of the `p_hash` buffer in bytes
+ * \param[out] p_signature          Buffer where the signature is to be written
+ * \param[in] signature_size        Size of the `p_signature` buffer in bytes
+ * \param[out] p_signature_length   On success, the number of bytes
+ *                                  that make up the returned signature value
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_sign_t)(psa_drv_se_context_t *drv_context,
+                                                     psa_key_slot_number_t key_slot,
+                                                     psa_algorithm_t alg,
+                                                     const uint8_t *p_hash,
+                                                     size_t hash_length,
+                                                     uint8_t *p_signature,
+                                                     size_t signature_size,
+                                                     size_t *p_signature_length);
+
+/**
+ * \brief A function that verifies the signature a hash or short message using
+ * an asymmetric public key in a secure element
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of a public key or an asymmetric key
+ *                              pair
+ * \param[in] alg               A signature algorithm that is compatible with
+ *                              the type of `key`
+ * \param[in] p_hash            The hash whose signature is to be verified
+ * \param[in] hash_length       Size of the `p_hash` buffer in bytes
+ * \param[in] p_signature       Buffer containing the signature to verify
+ * \param[in] signature_length  Size of the `p_signature` buffer in bytes
+ *
+ * \retval #PSA_SUCCESS
+ *         The signature is valid.
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_verify_t)(psa_drv_se_context_t *drv_context,
+                                                       psa_key_slot_number_t key_slot,
+                                                       psa_algorithm_t alg,
+                                                       const uint8_t *p_hash,
+                                                       size_t hash_length,
+                                                       const uint8_t *p_signature,
+                                                       size_t signature_length);
+
+/**
+ * \brief A function that encrypts a short message with an asymmetric public
+ * key in a secure element
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of a public key or an asymmetric key
+ *                              pair
+ * \param[in] alg               An asymmetric encryption algorithm that is
+ *                              compatible with the type of `key`
+ * \param[in] p_input           The message to encrypt
+ * \param[in] input_length      Size of the `p_input` buffer in bytes
+ * \param[in] p_salt            A salt or label, if supported by the
+ *                              encryption algorithm
+ *                              If the algorithm does not support a
+ *                              salt, pass `NULL`.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass `NULL`.
+ *                              For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                              supported.
+ * \param[in] salt_length       Size of the `p_salt` buffer in bytes
+ *                              If `p_salt` is `NULL`, pass 0.
+ * \param[out] p_output         Buffer where the encrypted message is to
+ *                              be written
+ * \param[in] output_size       Size of the `p_output` buffer in bytes
+ * \param[out] p_output_length  On success, the number of bytes that make up
+ *                              the returned output
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_encrypt_t)(psa_drv_se_context_t *drv_context,
+                                                        psa_key_slot_number_t key_slot,
+                                                        psa_algorithm_t alg,
+                                                        const uint8_t *p_input,
+                                                        size_t input_length,
+                                                        const uint8_t *p_salt,
+                                                        size_t salt_length,
+                                                        uint8_t *p_output,
+                                                        size_t output_size,
+                                                        size_t *p_output_length);
+
+/**
+ * \brief A function that decrypts a short message with an asymmetric private
+ * key in a secure element.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of an asymmetric key pair
+ * \param[in] alg               An asymmetric encryption algorithm that is
+ *                              compatible with the type of `key`
+ * \param[in] p_input           The message to decrypt
+ * \param[in] input_length      Size of the `p_input` buffer in bytes
+ * \param[in] p_salt            A salt or label, if supported by the
+ *                              encryption algorithm
+ *                              If the algorithm does not support a
+ *                              salt, pass `NULL`.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass `NULL`.
+ *                              For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                              supported.
+ * \param[in] salt_length       Size of the `p_salt` buffer in bytes
+ *                              If `p_salt` is `NULL`, pass 0.
+ * \param[out] p_output         Buffer where the decrypted message is to
+ *                              be written
+ * \param[in] output_size       Size of the `p_output` buffer in bytes
+ * \param[out] p_output_length  On success, the number of bytes
+ *                              that make up the returned output
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_decrypt_t)(psa_drv_se_context_t *drv_context,
+                                                        psa_key_slot_number_t key_slot,
+                                                        psa_algorithm_t alg,
+                                                        const uint8_t *p_input,
+                                                        size_t input_length,
+                                                        const uint8_t *p_salt,
+                                                        size_t salt_length,
+                                                        uint8_t *p_output,
+                                                        size_t output_size,
+                                                        size_t *p_output_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * asymmetric cryptographic operations using secure elements.
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that performs an asymmetric sign operation */
+    psa_drv_se_asymmetric_sign_t    p_sign;
+    /** Function that performs an asymmetric verify operation */
+    psa_drv_se_asymmetric_verify_t  p_verify;
+    /** Function that performs an asymmetric encrypt operation */
+    psa_drv_se_asymmetric_encrypt_t p_encrypt;
+    /** Function that performs an asymmetric decrypt operation */
+    psa_drv_se_asymmetric_decrypt_t p_decrypt;
+} psa_drv_se_asymmetric_t;
+
+/**@}*/
+
+/** \defgroup se_aead Secure Element Authenticated Encryption with Additional Data
+ * Authenticated Encryption with Additional Data (AEAD) operations with secure
+ * elements must be done in one function call. While this creates a burden for
+ * implementers as there must be sufficient space in memory for the entire
+ * message, it prevents decrypted data from being made available before the
+ * authentication operation is complete and the data is known to be authentic.
+ */
+/**@{*/
+
+/** \brief A function that performs a secure element authenticated encryption
+ * operation
+ *
+ * \param[in,out] drv_context           The driver context structure.
+ * \param[in] key_slot                  Slot containing the key to use.
+ * \param[in] algorithm                 The AEAD algorithm to compute
+ *                                      (\c PSA_ALG_XXX value such that
+ *                                      #PSA_ALG_IS_AEAD(`alg`) is true)
+ * \param[in] p_nonce                   Nonce or IV to use
+ * \param[in] nonce_length              Size of the `p_nonce` buffer in bytes
+ * \param[in] p_additional_data         Additional data that will be
+ *                                      authenticated but not encrypted
+ * \param[in] additional_data_length    Size of `p_additional_data` in bytes
+ * \param[in] p_plaintext               Data that will be authenticated and
+ *                                      encrypted
+ * \param[in] plaintext_length          Size of `p_plaintext` in bytes
+ * \param[out] p_ciphertext             Output buffer for the authenticated and
+ *                                      encrypted data. The additional data is
+ *                                      not part of this output. For algorithms
+ *                                      where the encrypted data and the
+ *                                      authentication tag are defined as
+ *                                      separate outputs, the authentication
+ *                                      tag is appended to the encrypted data.
+ * \param[in] ciphertext_size           Size of the `p_ciphertext` buffer in
+ *                                      bytes
+ * \param[out] p_ciphertext_length      On success, the size of the output in
+ *                                      the `p_ciphertext` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_aead_encrypt_t)(psa_drv_se_context_t *drv_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  const uint8_t *p_nonce,
+                                                  size_t nonce_length,
+                                                  const uint8_t *p_additional_data,
+                                                  size_t additional_data_length,
+                                                  const uint8_t *p_plaintext,
+                                                  size_t plaintext_length,
+                                                  uint8_t *p_ciphertext,
+                                                  size_t ciphertext_size,
+                                                  size_t *p_ciphertext_length);
+
+/** A function that peforms a secure element authenticated decryption operation
+ *
+ * \param[in,out] drv_context           The driver context structure.
+ * \param[in] key_slot                  Slot containing the key to use
+ * \param[in] algorithm                 The AEAD algorithm to compute
+ *                                      (\c PSA_ALG_XXX value such that
+ *                                      #PSA_ALG_IS_AEAD(`alg`) is true)
+ * \param[in] p_nonce                   Nonce or IV to use
+ * \param[in] nonce_length              Size of the `p_nonce` buffer in bytes
+ * \param[in] p_additional_data         Additional data that has been
+ *                                      authenticated but not encrypted
+ * \param[in] additional_data_length    Size of `p_additional_data` in bytes
+ * \param[in] p_ciphertext              Data that has been authenticated and
+ *                                      encrypted.
+ *                                      For algorithms where the encrypted data
+ *                                      and the authentication tag are defined
+ *                                      as separate inputs, the buffer must
+ *                                      contain the encrypted data followed by
+ *                                      the authentication tag.
+ * \param[in] ciphertext_length         Size of `p_ciphertext` in bytes
+ * \param[out] p_plaintext              Output buffer for the decrypted data
+ * \param[in] plaintext_size            Size of the `p_plaintext` buffer in
+ *                                      bytes
+ * \param[out] p_plaintext_length       On success, the size of the output in
+ *                                      the `p_plaintext` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_aead_decrypt_t)(psa_drv_se_context_t *drv_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  const uint8_t *p_nonce,
+                                                  size_t nonce_length,
+                                                  const uint8_t *p_additional_data,
+                                                  size_t additional_data_length,
+                                                  const uint8_t *p_ciphertext,
+                                                  size_t ciphertext_length,
+                                                  uint8_t *p_plaintext,
+                                                  size_t plaintext_size,
+                                                  size_t *p_plaintext_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * secure element Authenticated Encryption with Additional Data operations
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that performs the AEAD encrypt operation */
+    psa_drv_se_aead_encrypt_t p_encrypt;
+    /** Function that performs the AEAD decrypt operation */
+    psa_drv_se_aead_decrypt_t p_decrypt;
+} psa_drv_se_aead_t;
+/**@}*/
+
+/** \defgroup se_key_management Secure Element Key Management
+ * Currently, key management is limited to importing keys in the clear,
+ * destroying keys, and exporting keys in the clear.
+ * Whether a key may be exported is determined by the key policies in place
+ * on the key slot.
+ */
+/**@{*/
+
+/** An enumeration indicating how a key is created.
+ */
+typedef enum
+{
+    PSA_KEY_CREATION_IMPORT, /**< During psa_import_key() */
+    PSA_KEY_CREATION_GENERATE, /**< During psa_generate_key() */
+    PSA_KEY_CREATION_DERIVE, /**< During psa_key_derivation_output_key() */
+    PSA_KEY_CREATION_COPY, /**< During psa_copy_key() */
+
+#ifndef __DOXYGEN_ONLY__
+    /** A key is being registered with mbedtls_psa_register_se_key().
+     *
+     * The core only passes this value to
+     * psa_drv_se_key_management_t::p_validate_slot_number, not to
+     * psa_drv_se_key_management_t::p_allocate. The call to
+     * `p_validate_slot_number` is not followed by any other call to the
+     * driver: the key is considered successfully registered if the call to
+     * `p_validate_slot_number` succeeds, or if `p_validate_slot_number` is
+     * null.
+     *
+     * With this creation method, the driver must return #PSA_SUCCESS if
+     * the given attributes are compatible with the existing key in the slot,
+     * and #PSA_ERROR_DOES_NOT_EXIST if the driver can determine that there
+     * is no key with the specified slot number.
+     *
+     * This is an Mbed Crypto extension.
+     */
+    PSA_KEY_CREATION_REGISTER,
+#endif
+} psa_key_creation_method_t;
+
+/** \brief A function that allocates a slot for a key.
+ *
+ * To create a key in a specific slot in a secure element, the core
+ * first calls this function to determine a valid slot number,
+ * then calls a function to create the key material in that slot.
+ * In nominal conditions (that is, if no error occurs),
+ * the effect of a call to a key creation function in the PSA Cryptography
+ * API with a lifetime that places the key in a secure element is the
+ * following:
+ * -# The core calls psa_drv_se_key_management_t::p_allocate
+ *    (or in some implementations
+ *    psa_drv_se_key_management_t::p_validate_slot_number). The driver
+ *    selects (or validates) a suitable slot number given the key attributes
+ *    and the state of the secure element.
+ * -# The core calls a key creation function in the driver.
+ *
+ * The key creation functions in the PSA Cryptography API are:
+ * - psa_import_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_IMPORT
+ *   then a call to psa_drv_se_key_management_t::p_import.
+ * - psa_generate_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_GENERATE
+ *   then a call to psa_drv_se_key_management_t::p_import.
+ * - psa_key_derivation_output_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_DERIVE
+ *   then a call to psa_drv_se_key_derivation_t::p_derive.
+ * - psa_copy_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_COPY
+ *   then a call to psa_drv_se_key_management_t::p_export.
+ *
+ * In case of errors, other behaviors are possible.
+ * - If the PSA Cryptography subsystem dies after the first step,
+ *   for example because the device has lost power abruptly,
+ *   the second step may never happen, or may happen after a reset
+ *   and re-initialization. Alternatively, after a reset and
+ *   re-initialization, the core may call
+ *   psa_drv_se_key_management_t::p_destroy on the slot number that
+ *   was allocated (or validated) instead of calling a key creation function.
+ * - If an error occurs, the core may call
+ *   psa_drv_se_key_management_t::p_destroy on the slot number that
+ *   was allocated (or validated) instead of calling a key creation function.
+ *
+ * Errors and system resets also have an impact on the driver's persistent
+ * data. If a reset happens before the overall key creation process is
+ * completed (before or after the second step above), it is unspecified
+ * whether the persistent data after the reset is identical to what it
+ * was before or after the call to `p_allocate` (or `p_validate_slot_number`).
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param[in] attributes            Attributes of the key.
+ * \param method                    The way in which the key is being created.
+ * \param[out] key_slot             Slot where the key will be stored.
+ *                                  This must be a valid slot for a key of the
+ *                                  chosen type. It must be unoccupied.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         The core will record \c *key_slot as the key slot where the key
+ *         is stored and will update the persistent data in storage.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ */
+typedef psa_status_t (*psa_drv_se_allocate_key_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    const psa_key_attributes_t *attributes,
+    psa_key_creation_method_t method,
+    psa_key_slot_number_t *key_slot);
+
+/** \brief A function that determines whether a slot number is valid
+ * for a key.
+ *
+ * To create a key in a specific slot in a secure element, the core
+ * first calls this function to validate the choice of slot number,
+ * then calls a function to create the key material in that slot.
+ * See the documentation of #psa_drv_se_allocate_key_t for more details.
+ *
+ * As of the PSA Cryptography API specification version 1.0, there is no way
+ * for applications to trigger a call to this function. However some
+ * implementations offer the capability to create or declare a key in
+ * a specific slot via implementation-specific means, generally for the
+ * sake of initial device provisioning or onboarding. Such a mechanism may
+ * be added to a future version of the PSA Cryptography API specification.
+ *
+ * This function may update the driver's persistent data through
+ * \p persistent_data. The core will save the updated persistent data at the
+ * end of the key creation process. See the description of
+ * ::psa_drv_se_allocate_key_t for more information.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param[in] attributes        Attributes of the key.
+ * \param method                The way in which the key is being created.
+ * \param[in] key_slot          Slot where the key is to be stored.
+ *
+ * \retval #PSA_SUCCESS
+ *         The given slot number is valid for a key with the given
+ *         attributes.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The given slot number is not valid for a key with the
+ *         given attributes. This includes the case where the slot
+ *         number is not valid at all.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a key with the specified slot number.
+ *         Drivers may choose to return this error from the key
+ *         creation function instead.
+ */
+typedef psa_status_t (*psa_drv_se_validate_slot_number_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    const psa_key_attributes_t *attributes,
+    psa_key_creation_method_t method,
+    psa_key_slot_number_t key_slot);
+
+/** \brief A function that imports a key into a secure element in binary format
+ *
+ * This function can support any output from psa_export_key(). Refer to the
+ * documentation of psa_export_key() for the format for each key type.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param key_slot              Slot where the key will be stored.
+ *                              This must be a valid slot for a key of the
+ *                              chosen type. It must be unoccupied.
+ * \param[in] attributes        The key attributes, including the lifetime,
+ *                              the key type and the usage policy.
+ *                              Drivers should not access the key size stored
+ *                              in the attributes: it may not match the
+ *                              data passed in \p data.
+ *                              Drivers can call psa_get_key_lifetime(),
+ *                              psa_get_key_type(),
+ *                              psa_get_key_usage_flags() and
+ *                              psa_get_key_algorithm() to access this
+ *                              information.
+ * \param[in] data              Buffer containing the key data.
+ * \param[in] data_length       Size of the \p data buffer in bytes.
+ * \param[out] bits             On success, the key size in bits. The driver
+ *                              must determine this value after parsing the
+ *                              key according to the key type.
+ *                              This value is not used if the function fails.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_import_key_t)(
+    psa_drv_se_context_t *drv_context,
+    psa_key_slot_number_t key_slot,
+    const psa_key_attributes_t *attributes,
+    const uint8_t *data,
+    size_t data_length,
+    size_t *bits);
+
+/**
+ * \brief A function that destroys a secure element key and restore the slot to
+ * its default state
+ *
+ * This function destroys the content of the key from a secure element.
+ * Implementations shall make a best effort to ensure that any previous content
+ * of the slot is unrecoverable.
+ *
+ * This function returns the specified slot to its default state.
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param key_slot                  The key slot to erase.
+ *
+ * \retval #PSA_SUCCESS
+ *         The slot's content, if any, has been erased.
+ */
+typedef psa_status_t (*psa_drv_se_destroy_key_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    psa_key_slot_number_t key_slot);
+
+/**
+ * \brief A function that exports a secure element key in binary format
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an equivalent object.
+ *
+ * If a key is created with `psa_import_key()` and then exported with
+ * this function, it is not guaranteed that the resulting data is
+ * identical: the implementation may choose a different representation
+ * of the same key if the format permits it.
+ *
+ * This function should generate output in the same format that
+ * `psa_export_key()` does. Refer to the
+ * documentation of `psa_export_key()` for the format for each key type.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key               Slot whose content is to be exported. This must
+ *                              be an occupied key slot.
+ * \param[out] p_data           Buffer where the key data is to be written.
+ * \param[in] data_size         Size of the `p_data` buffer in bytes.
+ * \param[out] p_data_length    On success, the number of bytes
+ *                              that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ */
+typedef psa_status_t (*psa_drv_se_export_key_t)(psa_drv_se_context_t *drv_context,
+                                                psa_key_slot_number_t key,
+                                                uint8_t *p_data,
+                                                size_t data_size,
+                                                size_t *p_data_length);
+
+/**
+ * \brief A function that generates a symmetric or asymmetric key on a secure
+ * element
+ *
+ * If the key type \c type recorded in \p attributes
+ * is asymmetric (#PSA_KEY_TYPE_IS_ASYMMETRIC(\c type) = 1),
+ * the driver may export the public key at the time of generation,
+ * in the format documented for psa_export_public_key() by writing it
+ * to the \p pubkey buffer.
+ * This is optional, intended for secure elements that output the
+ * public key at generation time and that cannot export the public key
+ * later. Drivers that do not need this feature should leave
+ * \p *pubkey_length set to 0 and should
+ * implement the psa_drv_key_management_t::p_export_public function.
+ * Some implementations do not support this feature, in which case
+ * \p pubkey is \c NULL and \p pubkey_size is 0.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param key_slot              Slot where the key will be stored.
+ *                              This must be a valid slot for a key of the
+ *                              chosen type. It must be unoccupied.
+ * \param[in] attributes        The key attributes, including the lifetime,
+ *                              the key type and size, and the usage policy.
+ *                              Drivers can call psa_get_key_lifetime(),
+ *                              psa_get_key_type(), psa_get_key_bits(),
+ *                              psa_get_key_usage_flags() and
+ *                              psa_get_key_algorithm() to access this
+ *                              information.
+ * \param[out] pubkey           A buffer where the driver can write the
+ *                              public key, when generating an asymmetric
+ *                              key pair.
+ *                              This is \c NULL when generating a symmetric
+ *                              key or if the core does not support
+ *                              exporting the public key at generation time.
+ * \param pubkey_size           The size of the `pubkey` buffer in bytes.
+ *                              This is 0 when generating a symmetric
+ *                              key or if the core does not support
+ *                              exporting the public key at generation time.
+ * \param[out] pubkey_length    On entry, this is always 0.
+ *                              On success, the number of bytes written to
+ *                              \p pubkey. If this is 0 or unchanged on return,
+ *                              the core will not read the \p pubkey buffer,
+ *                              and will instead call the driver's
+ *                              psa_drv_key_management_t::p_export_public
+ *                              function to export the public key when needed.
+ */
+typedef psa_status_t (*psa_drv_se_generate_key_t)(
+    psa_drv_se_context_t *drv_context,
+    psa_key_slot_number_t key_slot,
+    const psa_key_attributes_t *attributes,
+    uint8_t *pubkey, size_t pubkey_size, size_t *pubkey_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to for secure
+ * element key management
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that allocates a slot for a key. */
+    psa_drv_se_allocate_key_t   p_allocate;
+    /** Function that checks the validity of a slot for a key. */
+    psa_drv_se_validate_slot_number_t p_validate_slot_number;
+    /** Function that performs a key import operation */
+    psa_drv_se_import_key_t     p_import;
+    /** Function that performs a generation */
+    psa_drv_se_generate_key_t   p_generate;
+    /** Function that performs a key destroy operation */
+    psa_drv_se_destroy_key_t    p_destroy;
+    /** Function that performs a key export operation */
+    psa_drv_se_export_key_t     p_export;
+    /** Function that performs a public key export operation */
+    psa_drv_se_export_key_t     p_export_public;
+} psa_drv_se_key_management_t;
+
+/**@}*/
+
+/** \defgroup driver_derivation Secure Element Key Derivation and Agreement
+ * Key derivation is the process of generating new key material using an
+ * existing key and additional parameters, iterating through a basic
+ * cryptographic function, such as a hash.
+ * Key agreement is a part of cryptographic protocols that allows two parties
+ * to agree on the same key value, but starting from different original key
+ * material.
+ * The flows are similar, and the PSA Crypto Driver Model uses the same functions
+ * for both of the flows.
+ *
+ * There are two different final functions for the flows,
+ * `psa_drv_se_key_derivation_derive` and `psa_drv_se_key_derivation_export`.
+ * `psa_drv_se_key_derivation_derive` is used when the key material should be
+ * placed in a slot on the hardware and not exposed to the caller.
+ * `psa_drv_se_key_derivation_export` is used when the key material should be
+ * returned to the PSA Cryptographic API implementation.
+ *
+ * Different key derivation algorithms require a different number of inputs.
+ * Instead of having an API that takes as input variable length arrays, which
+ * can be problemmatic to manage on embedded platforms, the inputs are passed
+ * to the driver via a function, `psa_drv_se_key_derivation_collateral`, that
+ * is called multiple times with different `collateral_id`s. Thus, for a key
+ * derivation algorithm that required 3 parameter inputs, the flow would look
+ * something like:
+ * ~~~~~~~~~~~~~{.c}
+ * psa_drv_se_key_derivation_setup(kdf_algorithm, source_key, dest_key_size_bytes);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_0,
+ *                                      p_collateral_0,
+ *                                      collateral_0_size);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_1,
+ *                                      p_collateral_1,
+ *                                      collateral_1_size);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_2,
+ *                                      p_collateral_2,
+ *                                      collateral_2_size);
+ * psa_drv_se_key_derivation_derive();
+ * ~~~~~~~~~~~~~
+ *
+ * key agreement example:
+ * ~~~~~~~~~~~~~{.c}
+ * psa_drv_se_key_derivation_setup(alg, source_key. dest_key_size_bytes);
+ * psa_drv_se_key_derivation_collateral(DHE_PUBKEY, p_pubkey, pubkey_size);
+ * psa_drv_se_key_derivation_export(p_session_key,
+ *                                  session_key_size,
+ *                                  &session_key_length);
+ * ~~~~~~~~~~~~~
+ */
+/**@{*/
+
+/** \brief A function that Sets up a secure element key derivation operation by
+ * specifying the algorithm and the source key sot
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] kdf_alg           The algorithm to be used for the key derivation
+ * \param[in] source_key        The key to be used as the source material for
+ *                              the key derivation
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_setup_t)(psa_drv_se_context_t *drv_context,
+                                                          void *op_context,
+                                                          psa_algorithm_t kdf_alg,
+                                                          psa_key_slot_number_t source_key);
+
+/** \brief A function that provides collateral (parameters) needed for a secure
+ * element key derivation or key agreement operation
+ *
+ * Since many key derivation algorithms require multiple parameters, it is
+ * expected that this function may be called multiple times for the same
+ * operation, each with a different algorithm-specific `collateral_id`
+ *
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] collateral_id     An ID for the collateral being provided
+ * \param[in] p_collateral      A buffer containing the collateral data
+ * \param[in] collateral_size   The size in bytes of the collateral
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_collateral_t)(void *op_context,
+                                                               uint32_t collateral_id,
+                                                               const uint8_t *p_collateral,
+                                                               size_t collateral_size);
+
+/** \brief A function that performs the final secure element key derivation
+ * step and place the generated key material in a slot
+ *
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] dest_key          The slot where the generated key material
+ *                              should be placed
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_derive_t)(void *op_context,
+                                                          psa_key_slot_number_t dest_key);
+
+/** \brief A function that performs the final step of a secure element key
+ * agreement and place the generated key material in a buffer
+ *
+ * \param[out] p_output         Buffer in which to place the generated key
+ *                              material
+ * \param[in] output_size       The size in bytes of `p_output`
+ * \param[out] p_output_length  Upon success, contains the number of bytes of
+ *                              key material placed in `p_output`
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_export_t)(void *op_context,
+                                                           uint8_t *p_output,
+                                                           size_t output_size,
+                                                           size_t *p_output_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to for secure
+ * element key derivation and agreement
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** The driver-specific size of the key derivation context */
+    size_t                           context_size;
+    /** Function that performs a key derivation setup */
+    psa_drv_se_key_derivation_setup_t      p_setup;
+    /** Function that sets key derivation collateral */
+    psa_drv_se_key_derivation_collateral_t p_collateral;
+    /** Function that performs a final key derivation step */
+    psa_drv_se_key_derivation_derive_t     p_derive;
+    /** Function that perforsm a final key derivation or agreement and
+     * exports the key */
+    psa_drv_se_key_derivation_export_t     p_export;
+} psa_drv_se_key_derivation_t;
+
+/**@}*/
+
+/** \defgroup se_registration Secure element driver registration
+ */
+/**@{*/
+
+/** A structure containing pointers to all the entry points of a
+ * secure element driver.
+ *
+ * Future versions of this specification may add extra substructures at
+ * the end of this structure.
+ */
+typedef struct {
+    /** The version of the driver HAL that this driver implements.
+     * This is a protection against loading driver binaries built against
+     * a different version of this specification.
+     * Use #PSA_DRV_SE_HAL_VERSION.
+     */
+    uint32_t hal_version;
+
+    /** The size of the driver's persistent data in bytes.
+     *
+     * This can be 0 if the driver does not need persistent data.
+     *
+     * See the documentation of psa_drv_se_context_t::persistent_data
+     * for more information about why and how a driver can use
+     * persistent data.
+     */
+    size_t persistent_data_size;
+
+    /** The driver initialization function.
+     *
+     * This function is called once during the initialization of the
+     * PSA Cryptography subsystem, before any other function of the
+     * driver is called. If this function returns a failure status,
+     * the driver will be unusable, at least until the next system reset.
+     *
+     * If this field is \c NULL, it is equivalent to a function that does
+     * nothing and returns #PSA_SUCCESS.
+     */
+    psa_drv_se_init_t p_init;
+
+    const psa_drv_se_key_management_t *key_management;
+    const psa_drv_se_mac_t *mac;
+    const psa_drv_se_cipher_t *cipher;
+    const psa_drv_se_aead_t *aead;
+    const psa_drv_se_asymmetric_t *asymmetric;
+    const psa_drv_se_key_derivation_t *derivation;
+} psa_drv_se_t;
+
+/** The current version of the secure element driver HAL.
+ */
+/* 0.0.0 patchlevel 5 */
+#define PSA_DRV_SE_HAL_VERSION 0x00000005
+
+/** Register an external cryptoprocessor (secure element) driver.
+ *
+ * This function is only intended to be used by driver code, not by
+ * application code. In implementations with separation between the
+ * PSA cryptography module and applications, this function should
+ * only be available to callers that run in the same memory space as
+ * the cryptography module, and should not be exposed to applications
+ * running in a different memory space.
+ *
+ * This function may be called before psa_crypto_init(). It is
+ * implementation-defined whether this function may be called
+ * after psa_crypto_init().
+ *
+ * \note Implementations store metadata about keys including the lifetime
+ *       value, which contains the driver's location indicator. Therefore,
+ *       from one instantiation of the PSA Cryptography
+ *       library to the next one, if there is a key in storage with a certain
+ *       lifetime value, you must always register the same driver (or an
+ *       updated version that communicates with the same secure element)
+ *       with the same location value.
+ *
+ * \param location      The location value through which this driver will
+ *                      be exposed to applications.
+ *                      This driver will be used for all keys such that
+ *                      `location == #PSA_KEY_LIFETIME_GET_LOCATION( lifetime )`.
+ *                      The value #PSA_KEY_LOCATION_LOCAL_STORAGE is reserved
+ *                      and may not be used for drivers. Implementations
+ *                      may reserve other values.
+ * \param[in] methods   The method table of the driver. This structure must
+ *                      remain valid for as long as the cryptography
+ *                      module keeps running. It is typically a global
+ *                      constant.
+ *
+ * \return #PSA_SUCCESS
+ *         The driver was successfully registered. Applications can now
+ *         use \p location to access keys through the methods passed to
+ *         this function.
+ * \return #PSA_ERROR_BAD_STATE
+ *         This function was called after the initialization of the
+ *         cryptography module, and this implementation does not support
+ *         driver registration at this stage.
+ * \return #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a registered driver for this value of \p location.
+ * \return #PSA_ERROR_INVALID_ARGUMENT
+ *         \p location is a reserved value.
+ * \return #PSA_ERROR_NOT_SUPPORTED
+ *         `methods->hal_version` is not supported by this implementation.
+ * \return #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \return #PSA_ERROR_NOT_PERMITTED
+ * \return #PSA_ERROR_STORAGE_FAILURE
+ * \return #PSA_ERROR_DATA_CORRUPT
+ */
+psa_status_t psa_register_se_driver(
+    psa_key_location_t location,
+    const psa_drv_se_t *methods);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_SE_DRIVER_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_sizes.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_sizes.h
new file mode 100644
index 00000000000..e2ae5965d4f
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_sizes.h
@@ -0,0 +1,1171 @@
+/**
+ * \file psa/crypto_sizes.h
+ *
+ * \brief PSA cryptography module: Mbed TLS buffer size macros
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains the definitions of macros that are useful to
+ * compute buffer sizes. The signatures and semantics of these macros
+ * are standardized, but the definitions are not, because they depend on
+ * the available algorithms and, in some cases, on permitted tolerances
+ * on buffer sizes.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, implementers should take care to ensure that
+ * the definitions that are exposed to applications match what the
+ * module implements.
+ *
+ * Macros that compute sizes whose values do not depend on the
+ * implementation are in crypto.h.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_SIZES_H
+#define PSA_CRYPTO_SIZES_H
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#define PSA_BITS_TO_BYTES(bits) (((bits) + 7) / 8)
+#define PSA_BYTES_TO_BITS(bytes) ((bytes) * 8)
+
+#define PSA_ROUND_UP_TO_MULTIPLE(block_size, length) \
+    (((length) + (block_size) - 1) / (block_size) * (block_size))
+
+/** The size of the output of psa_hash_finish(), in bytes.
+ *
+ * This is also the hash size that psa_hash_verify() expects.
+ *
+ * \param alg   A hash algorithm (\c PSA_ALG_XXX value such that
+ *              #PSA_ALG_IS_HASH(\p alg) is true), or an HMAC algorithm
+ *              (#PSA_ALG_HMAC(\c hash_alg) where \c hash_alg is a
+ *              hash algorithm).
+ *
+ * \return The hash size for the specified hash algorithm.
+ *         If the hash algorithm is not recognized, return 0.
+ */
+#define PSA_HASH_LENGTH(alg)                                        \
+    (                                                               \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD2 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD4 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD5 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_RIPEMD160 ? 20 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_1 ? 20 :          \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_224 ? 28 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_256 ? 32 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_384 ? 48 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_224 ? 28 :    \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_256 ? 32 :    \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_224 ? 28 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_256 ? 32 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_384 ? 48 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_512 ? 64 :       \
+        0)
+
+/** The input block size of a hash algorithm, in bytes.
+ *
+ * Hash algorithms process their input data in blocks. Hash operations will
+ * retain any partial blocks until they have enough input to fill the block or
+ * until the operation is finished.
+ * This affects the output from psa_hash_suspend().
+ *
+ * \param alg   A hash algorithm (\c PSA_ALG_XXX value such that
+ *              PSA_ALG_IS_HASH(\p alg) is true).
+ *
+ * \return      The block size in bytes for the specified hash algorithm.
+ *              If the hash algorithm is not recognized, return 0.
+ *              An implementation can return either 0 or the correct size for a
+ *              hash algorithm that it recognizes, but does not support.
+ */
+#define PSA_HASH_BLOCK_LENGTH(alg)                                  \
+    (                                                               \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD2 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD4 ? 64 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD5 ? 64 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_RIPEMD160 ? 64 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_1 ? 64 :          \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_224 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_256 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_384 ? 128 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512 ? 128 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_224 ? 128 :   \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_256 ? 128 :   \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_224 ? 144 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_256 ? 136 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_384 ? 104 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_512 ? 72 :       \
+        0)
+
+/** \def PSA_HASH_MAX_SIZE
+ *
+ * Maximum size of a hash.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a hash in bytes.
+ */
+/* Note: for HMAC-SHA-3, the block size is 144 bytes for HMAC-SHA3-226,
+ * 136 bytes for HMAC-SHA3-256, 104 bytes for SHA3-384, 72 bytes for
+ * HMAC-SHA3-512. */
+#if defined(PSA_WANT_ALG_SHA_512) || defined(PSA_WANT_ALG_SHA_384)
+#define PSA_HASH_MAX_SIZE 64
+#define PSA_HMAC_MAX_HASH_BLOCK_SIZE 128
+#else
+#define PSA_HASH_MAX_SIZE 32
+#define PSA_HMAC_MAX_HASH_BLOCK_SIZE 64
+#endif
+
+/** \def PSA_MAC_MAX_SIZE
+ *
+ * Maximum size of a MAC.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a MAC in bytes.
+ */
+/* All non-HMAC MACs have a maximum size that's smaller than the
+ * minimum possible value of PSA_HASH_MAX_SIZE in this implementation. */
+/* Note that the encoding of truncated MAC algorithms limits this value
+ * to 64 bytes.
+ */
+#define PSA_MAC_MAX_SIZE PSA_HASH_MAX_SIZE
+
+/** The length of a tag for an AEAD algorithm, in bytes.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to store the
+ * tag output from psa_aead_finish().
+ *
+ * See also #PSA_AEAD_TAG_MAX_SIZE.
+ *
+ * \param key_type            The type of the AEAD key.
+ * \param key_bits            The size of the AEAD key in bits.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    The tag length for the specified algorithm and key.
+ *                            If the AEAD algorithm does not have an identified
+ *                            tag that can be distinguished from the rest of
+ *                            the ciphertext, return 0.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_TAG_LENGTH(key_type, key_bits, alg)                        \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                            \
+     PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :                                     \
+     ((void) (key_bits), 0))
+
+/** The maximum tag size for all supported AEAD algorithms, in bytes.
+ *
+ * See also #PSA_AEAD_TAG_LENGTH(\p key_type, \p key_bits, \p alg).
+ */
+#define PSA_AEAD_TAG_MAX_SIZE       16
+
+/* The maximum size of an RSA key on this implementation, in bits.
+ * This is a vendor-specific macro.
+ *
+ * Mbed TLS does not set a hard limit on the size of RSA keys: any key
+ * whose parameters fit in a bignum is accepted. However large keys can
+ * induce a large memory usage and long computation times. Unlike other
+ * auxiliary macros in this file and in crypto.h, which reflect how the
+ * library is configured, this macro defines how the library is
+ * configured. This implementation refuses to import or generate an
+ * RSA key whose size is larger than the value defined here.
+ *
+ * Note that an implementation may set different size limits for different
+ * operations, and does not need to accept all key sizes up to the limit. */
+#define PSA_VENDOR_RSA_MAX_KEY_BITS 4096
+
+/* The maximum size of an ECC key on this implementation, in bits.
+ * This is a vendor-specific macro. */
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 521
+#elif defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 512
+#elif defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 448
+#elif defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 384
+#elif defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 384
+#elif defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 255
+#elif defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 224
+#elif defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 224
+#elif defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 192
+#elif defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 192
+#else
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 0
+#endif
+
+/** This macro returns the maximum supported length of the PSK for the
+ * TLS-1.2 PSK-to-MS key derivation
+ * (#PSA_ALG_TLS12_PSK_TO_MS(\c hash_alg)).
+ *
+ * The maximum supported length does not depend on the chosen hash algorithm.
+ *
+ * Quoting RFC 4279, Sect 5.3:
+ * TLS implementations supporting these ciphersuites MUST support
+ * arbitrary PSK identities up to 128 octets in length, and arbitrary
+ * PSKs up to 64 octets in length.  Supporting longer identities and
+ * keys is RECOMMENDED.
+ *
+ * Therefore, no implementation should define a value smaller than 64
+ * for #PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE.
+ */
+#define PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE 128
+
+/** The maximum size of a block cipher. */
+#define PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE 16
+
+/** The size of the output of psa_mac_sign_finish(), in bytes.
+ *
+ * This is also the MAC size that psa_mac_verify_finish() expects.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type      The type of the MAC key.
+ * \param key_bits      The size of the MAC key in bits.
+ * \param alg           A MAC algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \return              The MAC size for the specified algorithm with
+ *                      the specified key parameters.
+ * \return              0 if the MAC algorithm is not recognized.
+ * \return              Either 0 or the correct size for a MAC algorithm that
+ *                      the implementation recognizes, but does not support.
+ * \return              Unspecified if the key parameters are not consistent
+ *                      with the algorithm.
+ */
+#define PSA_MAC_LENGTH(key_type, key_bits, alg)                                   \
+    ((alg) & PSA_ALG_MAC_TRUNCATION_MASK ? PSA_MAC_TRUNCATED_LENGTH(alg) :        \
+     PSA_ALG_IS_HMAC(alg) ? PSA_HASH_LENGTH(PSA_ALG_HMAC_GET_HASH(alg)) :         \
+     PSA_ALG_IS_BLOCK_CIPHER_MAC(alg) ? PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     ((void)(key_type), (void)(key_bits), 0))
+
+/** The maximum size of the output of psa_aead_encrypt(), in bytes.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_encrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the ciphertext may be smaller.
+ *
+ * See also #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p plaintext_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_SIZE(key_type, alg, plaintext_length) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                      \
+     (plaintext_length) + PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :          \
+     0)
+
+/** A sufficient output buffer size for psa_aead_encrypt(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is guaranteed
+ * that psa_aead_encrypt() will not fail due to an insufficient buffer size.
+ *
+ * \note This macro returns a compile-time constant if its arguments are
+ *       compile-time constants.
+ *
+ * See also #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\p key_type, \p alg,
+ * \p plaintext_length).
+ *
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    A sufficient output buffer size for any of the
+ *                            supported key types and AEAD algorithms.
+ *
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(plaintext_length)          \
+    ((plaintext_length) + PSA_AEAD_TAG_MAX_SIZE)
+
+
+/** The maximum size of the output of psa_aead_decrypt(), in bytes.
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_decrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the plaintext may be smaller.
+ *
+ * See also #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p ciphertext_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param ciphertext_length   Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_SIZE(key_type, alg, ciphertext_length) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&                      \
+         (ciphertext_length) > PSA_ALG_AEAD_GET_TAG_LENGTH(alg) ?      \
+         (ciphertext_length) - PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :      \
+     0)
+
+/** A sufficient output buffer size for psa_aead_decrypt(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the plaintext buffer is at least this large, it is guaranteed
+ * that psa_aead_decrypt() will not fail due to an insufficient buffer size.
+ *
+ * \note This macro returns a compile-time constant if its arguments are
+ *       compile-time constants.
+ *
+ * See also #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\p key_type, \p alg,
+ * \p ciphertext_length).
+ *
+ * \param ciphertext_length   Size of the ciphertext in bytes.
+ *
+ * \return                    A sufficient output buffer size for any of the
+ *                            supported key types and AEAD algorithms.
+ *
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(ciphertext_length)     \
+     (ciphertext_length)
+
+/** The default nonce size for an AEAD algorithm, in bytes.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to
+ * store the nonce output from #psa_aead_generate_nonce().
+ *
+ * See also #PSA_AEAD_NONCE_MAX_SIZE.
+ *
+ * \note This is not the maximum size of nonce supported as input to
+ *       #psa_aead_set_nonce(), #psa_aead_encrypt() or #psa_aead_decrypt(),
+ *       just the default size that is generated by #psa_aead_generate_nonce().
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  A symmetric key type that is compatible with
+ *                  algorithm \p alg.
+ *
+ * \param alg       An AEAD algorithm (\c PSA_ALG_XXX value such that
+ *                  #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return The default nonce size for the specified key type and algorithm.
+ *         If the key type or AEAD algorithm is not recognized,
+ *         or the parameters are incompatible, return 0.
+ */
+#define PSA_AEAD_NONCE_LENGTH(key_type, alg) \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) == 16 ? \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_CCM) ? 13 : \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_GCM) ? 12 : \
+          0 : \
+     (key_type) == PSA_KEY_TYPE_CHACHA20 && \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_CHACHA20_POLY1305) ? 12 : \
+     0)
+
+/** The maximum default nonce size among all supported pairs of key types and
+ *  AEAD algorithms, in bytes.
+ *
+ * This is equal to or greater than any value that #PSA_AEAD_NONCE_LENGTH()
+ * may return.
+ *
+ * \note This is not the maximum size of nonce supported as input to
+ *       #psa_aead_set_nonce(), #psa_aead_encrypt() or #psa_aead_decrypt(),
+ *       just the largest size that may be generated by
+ *       #psa_aead_generate_nonce().
+ */
+#define PSA_AEAD_NONCE_MAX_SIZE 13
+
+/** A sufficient output buffer size for psa_aead_update().
+ *
+ * If the size of the output buffer is at least this large, it is
+ * guaranteed that psa_aead_update() will not fail due to an
+ * insufficient buffer size. The actual size of the output may be smaller
+ * in any given call.
+ *
+ * See also #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param input_length        Size of the input in bytes.
+ *
+ * \return                    A sufficient output buffer size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+/* For all the AEAD modes defined in this specification, it is possible
+ * to emit output without delay. However, hardware may not always be
+ * capable of this. So for modes based on a block cipher, allow the
+ * implementation to delay the output until it has a full block. */
+#define PSA_AEAD_UPDATE_OUTPUT_SIZE(key_type, alg, input_length)                             \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                                             \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?                                              \
+         PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type), (input_length)) : \
+         (input_length) : \
+     0)
+
+/** A sufficient output buffer size for psa_aead_update(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_aead_update() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_AEAD_UPDATE_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length      Size of the input in bytes.
+ */
+#define PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(input_length)                           \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, (input_length)))
+
+/** A sufficient ciphertext buffer size for psa_aead_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_finish() will not fail due to an
+ * insufficient ciphertext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * See also #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type            A symmetric key type that is
+                              compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient ciphertext buffer size for the
+ *                            specified algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_FINISH_OUTPUT_SIZE(key_type, alg) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&  \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?    \
+         PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     0)
+
+/** A sufficient ciphertext buffer size for psa_aead_finish(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * See also #PSA_AEAD_FINISH_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_AEAD_FINISH_OUTPUT_MAX_SIZE     (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+/** A sufficient plaintext buffer size for psa_aead_verify().
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_verify() will not fail due to an
+ * insufficient plaintext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * See also #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient plaintext buffer size for the
+ *                            specified algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_SIZE(key_type, alg) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&  \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?    \
+         PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     0)
+
+/** A sufficient plaintext buffer size for psa_aead_verify(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * See also #PSA_AEAD_VERIFY_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE     (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+#define PSA_RSA_MINIMUM_PADDING_SIZE(alg)                         \
+    (PSA_ALG_IS_RSA_OAEP(alg) ?                                   \
+     2 * PSA_HASH_LENGTH(PSA_ALG_RSA_OAEP_GET_HASH(alg)) + 1 :    \
+     11 /*PKCS#1v1.5*/)
+
+/**
+ * \brief ECDSA signature size for a given curve bit size
+ *
+ * \param curve_bits    Curve size in bits.
+ * \return              Signature size in bytes.
+ *
+ * \note This macro returns a compile-time constant if its argument is one.
+ */
+#define PSA_ECDSA_SIGNATURE_SIZE(curve_bits)    \
+    (PSA_BITS_TO_BYTES(curve_bits) * 2)
+
+/** Sufficient signature buffer size for psa_sign_hash().
+ *
+ * This macro returns a sufficient buffer size for a signature using a key
+ * of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the signature may be smaller
+ * (some algorithms produce a variable-size signature).
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The signature algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_sign_hash() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_SIGN_OUTPUT_SIZE(key_type, key_bits, alg)        \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? ((void)alg, PSA_BITS_TO_BYTES(key_bits)) : \
+     PSA_KEY_TYPE_IS_ECC(key_type) ? PSA_ECDSA_SIGNATURE_SIZE(key_bits) : \
+     ((void)alg, 0))
+
+#define PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE     \
+    PSA_ECDSA_SIGNATURE_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS)
+
+/** \def PSA_SIGNATURE_MAX_SIZE
+ *
+ * Maximum size of an asymmetric signature.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a signature in bytes.
+ */
+#define PSA_SIGNATURE_MAX_SIZE                               \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS) > PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE ? \
+     PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS) :                   \
+     PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE)
+
+/** Sufficient output buffer size for psa_asymmetric_encrypt().
+ *
+ * This macro returns a sufficient buffer size for a ciphertext produced using
+ * a key of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the ciphertext may be smaller, depending
+ * on the algorithm.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The asymmetric encryption algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_asymmetric_encrypt() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(key_type, key_bits, alg)     \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ?                                    \
+     ((void)alg, PSA_BITS_TO_BYTES(key_bits)) :                         \
+     0)
+
+/** A sufficient output buffer size for psa_asymmetric_encrypt(), for any
+ *  supported asymmetric encryption.
+ *
+ * See also #PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(\p key_type, \p key_bits, \p alg).
+ */
+/* This macro assumes that RSA is the only supported asymmetric encryption. */
+#define PSA_ASYMMETRIC_ENCRYPT_OUTPUT_MAX_SIZE          \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS))
+
+/** Sufficient output buffer size for psa_asymmetric_decrypt().
+ *
+ * This macro returns a sufficient buffer size for a plaintext produced using
+ * a key of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the plaintext may be smaller, depending
+ * on the algorithm.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The asymmetric encryption algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_asymmetric_decrypt() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(key_type, key_bits, alg)     \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ?                                    \
+     PSA_BITS_TO_BYTES(key_bits) - PSA_RSA_MINIMUM_PADDING_SIZE(alg) :  \
+     0)
+
+/** A sufficient output buffer size for psa_asymmetric_decrypt(), for any
+ *  supported asymmetric decryption.
+ *
+ * This macro assumes that RSA is the only supported asymmetric encryption.
+ *
+ * See also #PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(\p key_type, \p key_bits, \p alg).
+ */
+#define PSA_ASYMMETRIC_DECRYPT_OUTPUT_MAX_SIZE          \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS))
+
+/* Maximum size of the ASN.1 encoding of an INTEGER with the specified
+ * number of bits.
+ *
+ * This definition assumes that bits <= 2^19 - 9 so that the length field
+ * is at most 3 bytes. The length of the encoding is the length of the
+ * bit string padded to a whole number of bytes plus:
+ * - 1 type byte;
+ * - 1 to 3 length bytes;
+ * - 0 to 1 bytes of leading 0 due to the sign bit.
+ */
+#define PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(bits)      \
+    ((bits) / 8 + 5)
+
+/* Maximum size of the export encoding of an RSA public key.
+ * Assumes that the public exponent is less than 2^32.
+ *
+ * RSAPublicKey  ::=  SEQUENCE  {
+ *    modulus            INTEGER,    -- n
+ *    publicExponent     INTEGER  }  -- e
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - n : INTEGER;
+ * - 7 bytes for the public exponent.
+ */
+#define PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) + 11)
+
+/* Maximum size of the export encoding of an RSA key pair.
+ * Assumes thatthe public exponent is less than 2^32 and that the size
+ * difference between the two primes is at most 1 bit.
+ *
+ * RSAPrivateKey ::= SEQUENCE {
+ *     version           Version,  -- 0
+ *     modulus           INTEGER,  -- N-bit
+ *     publicExponent    INTEGER,  -- 32-bit
+ *     privateExponent   INTEGER,  -- N-bit
+ *     prime1            INTEGER,  -- N/2-bit
+ *     prime2            INTEGER,  -- N/2-bit
+ *     exponent1         INTEGER,  -- N/2-bit
+ *     exponent2         INTEGER,  -- N/2-bit
+ *     coefficient       INTEGER,  -- N/2-bit
+ * }
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - 3 bytes of version;
+ * - 7 half-size INTEGERs plus 2 full-size INTEGERs,
+ *   overapproximated as 9 half-size INTEGERS;
+ * - 7 bytes for the public exponent.
+ */
+#define PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (9 * PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE((key_bits) / 2 + 1) + 14)
+
+/* Maximum size of the export encoding of a DSA public key.
+ *
+ * SubjectPublicKeyInfo  ::=  SEQUENCE  {
+ *      algorithm            AlgorithmIdentifier,
+ *      subjectPublicKey     BIT STRING  } -- contains DSAPublicKey
+ * AlgorithmIdentifier  ::=  SEQUENCE  {
+ *      algorithm               OBJECT IDENTIFIER,
+ *      parameters              Dss-Parms  } -- SEQUENCE of 3 INTEGERs
+ * DSAPublicKey  ::=  INTEGER -- public key, Y
+ *
+ * - 3 * 4 bytes of SEQUENCE overhead;
+ * - 1 + 1 + 7 bytes of algorithm (DSA OID);
+ * - 4 bytes of BIT STRING overhead;
+ * - 3 full-size INTEGERs (p, g, y);
+ * - 1 + 1 + 32 bytes for 1 sub-size INTEGER (q <= 256 bits).
+ */
+#define PSA_KEY_EXPORT_DSA_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) * 3 + 59)
+
+/* Maximum size of the export encoding of a DSA key pair.
+ *
+ * DSAPrivateKey ::= SEQUENCE {
+ *     version             Version,  -- 0
+ *     prime               INTEGER,  -- p
+ *     subprime            INTEGER,  -- q
+ *     generator           INTEGER,  -- g
+ *     public              INTEGER,  -- y
+ *     private             INTEGER,  -- x
+ * }
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - 3 bytes of version;
+ * - 3 full-size INTEGERs (p, g, y);
+ * - 2 * (1 + 1 + 32) bytes for 2 sub-size INTEGERs (q, x <= 256 bits).
+ */
+#define PSA_KEY_EXPORT_DSA_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) * 3 + 75)
+
+/* Maximum size of the export encoding of an ECC public key.
+ *
+ * The representation of an ECC public key is:
+ *      - The byte 0x04;
+ *      - `x_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - `y_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - where m is the bit size associated with the curve.
+ *
+ * - 1 byte + 2 * point size.
+ */
+#define PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (2 * PSA_BITS_TO_BYTES(key_bits) + 1)
+
+/* Maximum size of the export encoding of an ECC key pair.
+ *
+ * An ECC key pair is represented by the secret value.
+ */
+#define PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (PSA_BITS_TO_BYTES(key_bits))
+
+/** Sufficient output buffer size for psa_export_key() or
+ * psa_export_public_key().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * The following code illustrates how to allocate enough memory to export
+ * a key by querying the key type and size at runtime.
+ * \code{c}
+ * psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ * psa_status_t status;
+ * status = psa_get_key_attributes(key, &attributes);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * psa_key_type_t key_type = psa_get_key_type(&attributes);
+ * size_t key_bits = psa_get_key_bits(&attributes);
+ * size_t buffer_size = PSA_EXPORT_KEY_OUTPUT_SIZE(key_type, key_bits);
+ * psa_reset_key_attributes(&attributes);
+ * uint8_t *buffer = malloc(buffer_size);
+ * if (buffer == NULL) handle_error(...);
+ * size_t buffer_length;
+ * status = psa_export_key(key, buffer, buffer_size, &buffer_length);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * \endcode
+ *
+ * \param key_type  A supported key type.
+ * \param key_bits  The size of the key in bits.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_export_key() or psa_export_public_key() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the return value is unspecified.
+ */
+#define PSA_EXPORT_KEY_OUTPUT_SIZE(key_type, key_bits)                                              \
+    (PSA_KEY_TYPE_IS_UNSTRUCTURED(key_type) ? PSA_BITS_TO_BYTES(key_bits) :                         \
+     (key_type) == PSA_KEY_TYPE_RSA_KEY_PAIR ? PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(key_bits) :     \
+     (key_type) == PSA_KEY_TYPE_RSA_PUBLIC_KEY ? PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     (key_type) == PSA_KEY_TYPE_DSA_KEY_PAIR ? PSA_KEY_EXPORT_DSA_KEY_PAIR_MAX_SIZE(key_bits) :     \
+     (key_type) == PSA_KEY_TYPE_DSA_PUBLIC_KEY ? PSA_KEY_EXPORT_DSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_ECC_KEY_PAIR(key_type) ? PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(key_bits) :      \
+     PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY(key_type) ? PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits) :  \
+     0)
+
+/** Sufficient output buffer size for psa_export_public_key().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * The following code illustrates how to allocate enough memory to export
+ * a public key by querying the key type and size at runtime.
+ * \code{c}
+ * psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ * psa_status_t status;
+ * status = psa_get_key_attributes(key, &attributes);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * psa_key_type_t key_type = psa_get_key_type(&attributes);
+ * size_t key_bits = psa_get_key_bits(&attributes);
+ * size_t buffer_size = PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(key_type, key_bits);
+ * psa_reset_key_attributes(&attributes);
+ * uint8_t *buffer = malloc(buffer_size);
+ * if (buffer == NULL) handle_error(...);
+ * size_t buffer_length;
+ * status = psa_export_public_key(key, buffer, buffer_size, &buffer_length);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * \endcode
+ *
+ * \param key_type      A public key or key pair key type.
+ * \param key_bits      The size of the key in bits.
+ *
+ * \return              If the parameters are valid and supported, return
+ *                      a buffer size in bytes that guarantees that
+ *                      psa_export_public_key() will not fail with
+ *                      #PSA_ERROR_BUFFER_TOO_SMALL.
+ *                      If the parameters are a valid combination that is not
+ *                      supported, return either a sensible size or 0.
+ *                      If the parameters are not valid,
+ *                      the return value is unspecified.
+ *
+ *                      If the parameters are valid and supported,
+ *                      return the same result as
+ *                      #PSA_EXPORT_KEY_OUTPUT_SIZE(
+ *                          \p #PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(\p key_type),
+ *                          \p key_bits).
+ */
+#define PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(key_type, key_bits)                           \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_ECC(key_type) ? PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     0)
+
+/** Sufficient buffer size for exporting any asymmetric key pair.
+ *
+ * This macro expands to a compile-time constant integer. This value is
+ * a sufficient buffer size when calling psa_export_key() to export any
+ * asymmetric key pair, regardless of the exact key type and key size.
+ *
+ * See also #PSA_EXPORT_KEY_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_EXPORT_KEY_PAIR_MAX_SIZE                                            \
+    (PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) >        \
+     PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS) ?      \
+     PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) :        \
+     PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** Sufficient buffer size for exporting any asymmetric public key.
+ *
+ * This macro expands to a compile-time constant integer. This value is
+ * a sufficient buffer size when calling psa_export_key() or
+ * psa_export_public_key() to export any asymmetric public key,
+ * regardless of the exact key type and key size.
+ *
+ * See also #PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_EXPORT_PUBLIC_KEY_MAX_SIZE                                          \
+    (PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) >      \
+     PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS) ?    \
+     PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) :      \
+     PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** Sufficient output buffer size for psa_raw_key_agreement().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * See also #PSA_RAW_KEY_AGREEMENT_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type      A supported key type.
+ * \param key_bits      The size of the key in bits.
+ *
+ * \return              If the parameters are valid and supported, return
+ *                      a buffer size in bytes that guarantees that
+ *                      psa_raw_key_agreement() will not fail with
+ *                      #PSA_ERROR_BUFFER_TOO_SMALL.
+ *                      If the parameters are a valid combination that
+ *                      is not supported, return either a sensible size or 0.
+ *                      If the parameters are not valid,
+ *                      the return value is unspecified.
+ */
+/* FFDH is not yet supported in PSA. */
+#define PSA_RAW_KEY_AGREEMENT_OUTPUT_SIZE(key_type, key_bits)   \
+    (PSA_KEY_TYPE_IS_ECC_KEY_PAIR(key_type) ?                   \
+     PSA_BITS_TO_BYTES(key_bits) :                              \
+     0)
+
+/** Maximum size of the output from psa_raw_key_agreement().
+ *
+ * This macro expands to a compile-time constant integer. This value is the
+ * maximum size of the output any raw key agreement algorithm, in bytes.
+ *
+ * See also #PSA_RAW_KEY_AGREEMENT_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_RAW_KEY_AGREEMENT_OUTPUT_MAX_SIZE   \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** The default IV size for a cipher algorithm, in bytes.
+ *
+ * The IV that is generated as part of a call to #psa_cipher_encrypt() is always
+ * the default IV length for the algorithm.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to
+ * store the IV output from #psa_cipher_generate_iv() when using
+ * a multi-part cipher operation.
+ *
+ * See also #PSA_CIPHER_IV_MAX_SIZE.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  A symmetric key type that is compatible with algorithm \p alg.
+ *
+ * \param alg       A cipher algorithm (\c PSA_ALG_XXX value such that #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \return The default IV size for the specified key type and algorithm.
+ *         If the algorithm does not use an IV, return 0.
+ *         If the key type or cipher algorithm is not recognized,
+ *         or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_IV_LENGTH(key_type, alg) \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) > 1 && \
+        ((alg) == PSA_ALG_CTR || \
+         (alg) == PSA_ALG_CFB || \
+         (alg) == PSA_ALG_OFB || \
+         (alg) == PSA_ALG_XTS || \
+         (alg) == PSA_ALG_CBC_NO_PADDING || \
+         (alg) == PSA_ALG_CBC_PKCS7) ? PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     (key_type) == PSA_KEY_TYPE_CHACHA20 && \
+         (alg) == PSA_ALG_STREAM_CIPHER ? 12 : \
+     0)
+
+/** The maximum IV size for all supported cipher algorithms, in bytes.
+ *
+ * See also #PSA_CIPHER_IV_LENGTH().
+ */
+#define PSA_CIPHER_IV_MAX_SIZE 16
+
+/** The maximum size of the output of psa_cipher_encrypt(), in bytes.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_encrypt() will not fail due to an insufficient buffer size.
+ * Depending on the algorithm, the actual size of the output might be smaller.
+ *
+ * See also #PSA_CIPHER_ENCRYPT_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible,
+ *                      return 0.
+ */
+#define PSA_CIPHER_ENCRYPT_OUTPUT_SIZE(key_type, alg, input_length)             \
+    (alg == PSA_ALG_CBC_PKCS7 ?                                                 \
+     (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) != 0 ?                            \
+     PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type),          \
+                              (input_length) + 1) +                             \
+     PSA_CIPHER_IV_LENGTH((key_type), (alg)) : 0) :                             \
+     (PSA_ALG_IS_CIPHER(alg) ?                                                  \
+      (input_length) + PSA_CIPHER_IV_LENGTH((key_type), (alg)) :                \
+     0))
+
+/** A sufficient output buffer size for psa_cipher_encrypt(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_encrypt() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_ENCRYPT_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ *
+ */
+#define PSA_CIPHER_ENCRYPT_OUTPUT_MAX_SIZE(input_length)                        \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE,                  \
+                              (input_length) + 1) +                             \
+     PSA_CIPHER_IV_MAX_SIZE)
+
+/** The maximum size of the output of psa_cipher_decrypt(), in bytes.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_decrypt() will not fail due to an insufficient buffer size.
+ * Depending on the algorithm, the actual size of the output might be smaller.
+ *
+ * See also #PSA_CIPHER_DECRYPT_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible,
+ *                      return 0.
+ */
+#define PSA_CIPHER_DECRYPT_OUTPUT_SIZE(key_type, alg, input_length)                 \
+    (PSA_ALG_IS_CIPHER(alg) &&                                                      \
+     ((key_type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC ? \
+     (input_length) :                                                               \
+     0)
+
+/** A sufficient output buffer size for psa_cipher_decrypt(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_decrypt() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_DECRYPT_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ */
+#define PSA_CIPHER_DECRYPT_OUTPUT_MAX_SIZE(input_length)    \
+    (input_length)
+
+/** A sufficient output buffer size for psa_cipher_update().
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_update() will not fail due to an insufficient buffer size.
+ * The actual size of the output might be smaller in any given call.
+ *
+ * See also #PSA_CIPHER_UPDATE_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_UPDATE_OUTPUT_SIZE(key_type, alg, input_length)              \
+    (PSA_ALG_IS_CIPHER(alg) ?                                                   \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) != 0 ?                             \
+     (((alg) == PSA_ALG_CBC_PKCS7      ||                                       \
+       (alg) == PSA_ALG_CBC_NO_PADDING ||                                       \
+       (alg) == PSA_ALG_ECB_NO_PADDING) ?                                       \
+      PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type),         \
+                                input_length) :                                 \
+      (input_length)) : 0) :                                                    \
+     0)
+
+/** A sufficient output buffer size for psa_cipher_update(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_update() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_UPDATE_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ */
+#define PSA_CIPHER_UPDATE_OUTPUT_MAX_SIZE(input_length)     \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, input_length))
+
+/** A sufficient ciphertext buffer size for psa_cipher_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_cipher_finish() will not fail due to an insufficient
+ * ciphertext buffer size. The actual size of the output might be smaller in
+ * any given call.
+ *
+ * See also #PSA_CIPHER_FINISH_OUTPUT_MAX_SIZE().
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_FINISH_OUTPUT_SIZE(key_type, alg)    \
+    (PSA_ALG_IS_CIPHER(alg) ?                           \
+     (alg == PSA_ALG_CBC_PKCS7 ?                        \
+      PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) :         \
+      0) :                                              \
+     0)
+
+/** A sufficient ciphertext buffer size for psa_cipher_finish(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * See also #PSA_CIPHER_FINISH_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_CIPHER_FINISH_OUTPUT_MAX_SIZE           \
+    (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+#endif /* PSA_CRYPTO_SIZES_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_struct.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_struct.h
new file mode 100644
index 00000000000..23a02a5d8ef
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_struct.h
@@ -0,0 +1,478 @@
+/**
+ * \file psa/crypto_struct.h
+ *
+ * \brief PSA cryptography module: Mbed TLS structured type implementations
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains the definitions of some data structures with
+ * implementation-specific definitions.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, it is expected that the front-end and the back-end
+ * would have different versions of this file.
+ *
+ * <h3>Design notes about multipart operation structures</h3>
+ *
+ * For multipart operations without driver delegation support, each multipart
+ * operation structure contains a `psa_algorithm_t alg` field which indicates
+ * which specific algorithm the structure is for. When the structure is not in
+ * use, `alg` is 0. Most of the structure consists of a union which is
+ * discriminated by `alg`.
+ *
+ * For multipart operations with driver delegation support, each multipart
+ * operation structure contains an `unsigned int id` field indicating which
+ * driver got assigned to do the operation. When the structure is not in use,
+ * 'id' is 0. The structure contains also a driver context which is the union
+ * of the contexts of all drivers able to handle the type of multipart
+ * operation.
+ *
+ * Note that when `alg` or `id` is 0, the content of other fields is undefined.
+ * In particular, it is not guaranteed that a freshly-initialized structure
+ * is all-zero: we initialize structures to something like `{0, 0}`, which
+ * is only guaranteed to initializes the first member of the union;
+ * GCC and Clang initialize the whole structure to 0 (at the time of writing),
+ * but MSVC and CompCert don't.
+ *
+ * In Mbed Crypto, multipart operation structures live independently from
+ * the key. This allows Mbed Crypto to free the key objects when destroying
+ * a key slot. If a multipart operation needs to remember the key after
+ * the setup function returns, the operation structure needs to contain a
+ * copy of the key.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_STRUCT_H
+#define PSA_CRYPTO_STRUCT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/cmac.h"
+#include "mbedtls/gcm.h"
+
+/* Include the context definition for the compiled-in drivers for the primitive
+ * algorithms. */
+#include "psa/crypto_driver_contexts_primitives.h"
+
+struct psa_hash_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_driver_wrappers.h.
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. the driver context is not active, in use). */
+    unsigned int id;
+    psa_driver_hash_context_t ctx;
+};
+
+#define PSA_HASH_OPERATION_INIT {0, {0}}
+static inline struct psa_hash_operation_s psa_hash_operation_init( void )
+{
+    const struct psa_hash_operation_s v = PSA_HASH_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_cipher_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_crypto_driver_wrappers.h
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. none of the driver contexts are active). */
+    unsigned int id;
+
+    unsigned int iv_required : 1;
+    unsigned int iv_set : 1;
+
+    uint8_t default_iv_length;
+
+    psa_driver_cipher_context_t ctx;
+};
+
+#define PSA_CIPHER_OPERATION_INIT {0, 0, 0, 0, {0}}
+static inline struct psa_cipher_operation_s psa_cipher_operation_init( void )
+{
+    const struct psa_cipher_operation_s v = PSA_CIPHER_OPERATION_INIT;
+    return( v );
+}
+
+/* Include the context definition for the compiled-in drivers for the composite
+ * algorithms. */
+#include "psa/crypto_driver_contexts_composites.h"
+
+struct psa_mac_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_driver_wrappers.h
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. none of the driver contexts are active). */
+    unsigned int id;
+    uint8_t mac_size;
+    unsigned int is_sign : 1;
+    psa_driver_mac_context_t ctx;
+};
+
+#define PSA_MAC_OPERATION_INIT {0, 0, 0, {0}}
+static inline struct psa_mac_operation_s psa_mac_operation_init( void )
+{
+    const struct psa_mac_operation_s v = PSA_MAC_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_aead_operation_s
+{
+    psa_algorithm_t alg;
+    unsigned int key_set : 1;
+    unsigned int iv_set : 1;
+    uint8_t iv_size;
+    uint8_t block_size;
+    union
+    {
+        unsigned dummy; /* Enable easier initializing of the union. */
+        mbedtls_cipher_context_t cipher;
+    } ctx;
+};
+
+#define PSA_AEAD_OPERATION_INIT {0, 0, 0, 0, 0, {0}}
+static inline struct psa_aead_operation_s psa_aead_operation_init( void )
+{
+    const struct psa_aead_operation_s v = PSA_AEAD_OPERATION_INIT;
+    return( v );
+}
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HKDF)
+typedef struct
+{
+    uint8_t *info;
+    size_t info_length;
+#if PSA_HASH_MAX_SIZE > 0xff
+#error "PSA_HASH_MAX_SIZE does not fit in uint8_t"
+#endif
+    uint8_t offset_in_block;
+    uint8_t block_number;
+    unsigned int state : 2;
+    unsigned int info_set : 1;
+    uint8_t output_block[PSA_HASH_MAX_SIZE];
+    uint8_t prk[PSA_HASH_MAX_SIZE];
+    struct psa_mac_operation_s hmac;
+} psa_hkdf_key_derivation_t;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HKDF */
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS)
+typedef enum
+{
+    PSA_TLS12_PRF_STATE_INIT,       /* no input provided */
+    PSA_TLS12_PRF_STATE_SEED_SET,   /* seed has been set */
+    PSA_TLS12_PRF_STATE_KEY_SET,    /* key has been set */
+    PSA_TLS12_PRF_STATE_LABEL_SET,  /* label has been set */
+    PSA_TLS12_PRF_STATE_OUTPUT      /* output has been started */
+} psa_tls12_prf_key_derivation_state_t;
+
+typedef struct psa_tls12_prf_key_derivation_s
+{
+#if PSA_HASH_MAX_SIZE > 0xff
+#error "PSA_HASH_MAX_SIZE does not fit in uint8_t"
+#endif
+
+    /* Indicates how many bytes in the current HMAC block have
+     * not yet been read by the user. */
+    uint8_t left_in_block;
+
+    /* The 1-based number of the block. */
+    uint8_t block_number;
+
+    psa_tls12_prf_key_derivation_state_t state;
+
+    uint8_t *secret;
+    size_t secret_length;
+    uint8_t *seed;
+    size_t seed_length;
+    uint8_t *label;
+    size_t label_length;
+
+    uint8_t Ai[PSA_HASH_MAX_SIZE];
+
+    /* `HMAC_hash( prk, A(i) + seed )` in the notation of RFC 5246, Sect. 5. */
+    uint8_t output_block[PSA_HASH_MAX_SIZE];
+} psa_tls12_prf_key_derivation_t;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) ||
+        * MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS */
+
+struct psa_key_derivation_s
+{
+    psa_algorithm_t alg;
+    unsigned int can_output_key : 1;
+    size_t capacity;
+    union
+    {
+        /* Make the union non-empty even with no supported algorithms. */
+        uint8_t dummy;
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HKDF)
+        psa_hkdf_key_derivation_t hkdf;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS)
+        psa_tls12_prf_key_derivation_t tls12_prf;
+#endif
+    } ctx;
+};
+
+/* This only zeroes out the first byte in the union, the rest is unspecified. */
+#define PSA_KEY_DERIVATION_OPERATION_INIT {0, 0, 0, {0}}
+static inline struct psa_key_derivation_s psa_key_derivation_operation_init( void )
+{
+    const struct psa_key_derivation_s v = PSA_KEY_DERIVATION_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_key_policy_s
+{
+    psa_key_usage_t usage;
+    psa_algorithm_t alg;
+    psa_algorithm_t alg2;
+};
+typedef struct psa_key_policy_s psa_key_policy_t;
+
+#define PSA_KEY_POLICY_INIT {0, 0, 0}
+static inline struct psa_key_policy_s psa_key_policy_init( void )
+{
+    const struct psa_key_policy_s v = PSA_KEY_POLICY_INIT;
+    return( v );
+}
+
+/* The type used internally for key sizes.
+ * Public interfaces use size_t, but internally we use a smaller type. */
+typedef uint16_t psa_key_bits_t;
+/* The maximum value of the type used to represent bit-sizes.
+ * This is used to mark an invalid key size. */
+#define PSA_KEY_BITS_TOO_LARGE ( (psa_key_bits_t) ( -1 ) )
+/* The maximum size of a key in bits.
+ * Currently defined as the maximum that can be represented, rounded down
+ * to a whole number of bytes.
+ * This is an uncast value so that it can be used in preprocessor
+ * conditionals. */
+#define PSA_MAX_KEY_BITS 0xfff8
+
+/** A mask of flags that can be stored in key attributes.
+ *
+ * This type is also used internally to store flags in slots. Internal
+ * flags are defined in library/psa_crypto_core.h. Internal flags may have
+ * the same value as external flags if they are properly handled during
+ * key creation and in psa_get_key_attributes.
+ */
+typedef uint16_t psa_key_attributes_flag_t;
+
+#define MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER     \
+    ( (psa_key_attributes_flag_t) 0x0001 )
+
+/* A mask of key attribute flags used externally only.
+ * Only meant for internal checks inside the library. */
+#define MBEDTLS_PSA_KA_MASK_EXTERNAL_ONLY (      \
+        MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER |    \
+        0 )
+
+/* A mask of key attribute flags used both internally and externally.
+ * Currently there aren't any. */
+#define MBEDTLS_PSA_KA_MASK_DUAL_USE (          \
+        0 )
+
+typedef struct
+{
+    psa_key_type_t type;
+    psa_key_bits_t bits;
+    psa_key_lifetime_t lifetime;
+    mbedtls_svc_key_id_t id;
+    psa_key_policy_t policy;
+    psa_key_attributes_flag_t flags;
+} psa_core_key_attributes_t;
+
+#define PSA_CORE_KEY_ATTRIBUTES_INIT {PSA_KEY_TYPE_NONE, 0, PSA_KEY_LIFETIME_VOLATILE, MBEDTLS_SVC_KEY_ID_INIT, PSA_KEY_POLICY_INIT, 0}
+
+struct psa_key_attributes_s
+{
+    psa_core_key_attributes_t core;
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+    psa_key_slot_number_t slot_number;
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+    void *domain_parameters;
+    size_t domain_parameters_size;
+};
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+#define PSA_KEY_ATTRIBUTES_INIT {PSA_CORE_KEY_ATTRIBUTES_INIT, 0, NULL, 0}
+#else
+#define PSA_KEY_ATTRIBUTES_INIT {PSA_CORE_KEY_ATTRIBUTES_INIT, NULL, 0}
+#endif
+
+static inline struct psa_key_attributes_s psa_key_attributes_init( void )
+{
+    const struct psa_key_attributes_s v = PSA_KEY_ATTRIBUTES_INIT;
+    return( v );
+}
+
+static inline void psa_set_key_id( psa_key_attributes_t *attributes,
+                                   mbedtls_svc_key_id_t key )
+{
+    psa_key_lifetime_t lifetime = attributes->core.lifetime;
+
+    attributes->core.id = key;
+
+    if( PSA_KEY_LIFETIME_IS_VOLATILE( lifetime ) )
+    {
+        attributes->core.lifetime =
+            PSA_KEY_LIFETIME_FROM_PERSISTENCE_AND_LOCATION(
+                PSA_KEY_LIFETIME_PERSISTENT,
+                PSA_KEY_LIFETIME_GET_LOCATION( lifetime ) );
+    }
+}
+
+static inline mbedtls_svc_key_id_t psa_get_key_id(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.id );
+}
+
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+static inline void mbedtls_set_key_owner_id( psa_key_attributes_t *attributes,
+                                             mbedtls_key_owner_id_t owner )
+{
+    attributes->core.id.owner = owner;
+}
+#endif
+
+static inline void psa_set_key_lifetime(psa_key_attributes_t *attributes,
+                                        psa_key_lifetime_t lifetime)
+{
+    attributes->core.lifetime = lifetime;
+    if( PSA_KEY_LIFETIME_IS_VOLATILE( lifetime ) )
+    {
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+        attributes->core.id.key_id = 0;
+#else
+        attributes->core.id = 0;
+#endif
+    }
+}
+
+static inline psa_key_lifetime_t psa_get_key_lifetime(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.lifetime );
+}
+
+static inline void psa_extend_key_usage_flags( psa_key_usage_t *usage_flags )
+{
+    if( *usage_flags & PSA_KEY_USAGE_SIGN_HASH )
+        *usage_flags |= PSA_KEY_USAGE_SIGN_MESSAGE;
+
+    if( *usage_flags & PSA_KEY_USAGE_VERIFY_HASH )
+        *usage_flags |= PSA_KEY_USAGE_VERIFY_MESSAGE;
+}
+
+static inline void psa_set_key_usage_flags(psa_key_attributes_t *attributes,
+                                           psa_key_usage_t usage_flags)
+{
+    psa_extend_key_usage_flags( &usage_flags );
+    attributes->core.policy.usage = usage_flags;
+}
+
+static inline psa_key_usage_t psa_get_key_usage_flags(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.usage );
+}
+
+static inline void psa_set_key_algorithm(psa_key_attributes_t *attributes,
+                                         psa_algorithm_t alg)
+{
+    attributes->core.policy.alg = alg;
+}
+
+static inline psa_algorithm_t psa_get_key_algorithm(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.alg );
+}
+
+/* This function is declared in crypto_extra.h, which comes after this
+ * header file, but we need the function here, so repeat the declaration. */
+psa_status_t psa_set_key_domain_parameters(psa_key_attributes_t *attributes,
+                                           psa_key_type_t type,
+                                           const uint8_t *data,
+                                           size_t data_length);
+
+static inline void psa_set_key_type(psa_key_attributes_t *attributes,
+                                    psa_key_type_t type)
+{
+    if( attributes->domain_parameters == NULL )
+    {
+        /* Common case: quick path */
+        attributes->core.type = type;
+    }
+    else
+    {
+        /* Call the bigger function to free the old domain paramteres.
+         * Ignore any errors which may arise due to type requiring
+         * non-default domain parameters, since this function can't
+         * report errors. */
+        (void) psa_set_key_domain_parameters( attributes, type, NULL, 0 );
+    }
+}
+
+static inline psa_key_type_t psa_get_key_type(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.type );
+}
+
+static inline void psa_set_key_bits(psa_key_attributes_t *attributes,
+                                    size_t bits)
+{
+    if( bits > PSA_MAX_KEY_BITS )
+        attributes->core.bits = PSA_KEY_BITS_TOO_LARGE;
+    else
+        attributes->core.bits = (psa_key_bits_t) bits;
+}
+
+static inline size_t psa_get_key_bits(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.bits );
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_STRUCT_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_types.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_types.h
new file mode 100644
index 00000000000..386c7d794b4
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_types.h
@@ -0,0 +1,383 @@
+/**
+ * \file psa/crypto_types.h
+ *
+ * \brief PSA cryptography module: type aliases.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h. Drivers must include the appropriate driver
+ * header file.
+ *
+ * This file contains portable definitions of integral types for properties
+ * of cryptographic keys, designations of cryptographic algorithms, and
+ * error codes returned by the library.
+ *
+ * This header file does not declare any function.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_TYPES_H
+#define PSA_CRYPTO_TYPES_H
+
+#include "crypto_platform.h"
+
+/* If MBEDTLS_PSA_CRYPTO_C is defined, make sure MBEDTLS_PSA_CRYPTO_CLIENT
+ * is defined as well to include all PSA code.
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_C)
+#define MBEDTLS_PSA_CRYPTO_CLIENT
+#endif /* MBEDTLS_PSA_CRYPTO_C */
+
+#include <stdint.h>
+
+/** \defgroup error Error codes
+ * @{
+ */
+
+/**
+ * \brief Function return status.
+ *
+ * This is either #PSA_SUCCESS (which is zero), indicating success,
+ * or a small negative value indicating that an error occurred. Errors are
+ * encoded as one of the \c PSA_ERROR_xxx values defined here. */
+/* If #PSA_SUCCESS is already defined, it means that #psa_status_t
+ * is also defined in an external header, so prevent its multiple
+ * definition.
+ */
+#ifndef PSA_SUCCESS
+typedef int32_t psa_status_t;
+#endif
+
+/**@}*/
+
+/** \defgroup crypto_types Key and algorithm types
+ * @{
+ */
+
+/** \brief Encoding of a key type.
+ */
+typedef uint16_t psa_key_type_t;
+
+/** The type of PSA elliptic curve family identifiers.
+ *
+ * The curve identifier is required to create an ECC key using the
+ * PSA_KEY_TYPE_ECC_KEY_PAIR() or PSA_KEY_TYPE_ECC_PUBLIC_KEY()
+ * macros.
+ *
+ * Values defined by this standard will never be in the range 0x80-0xff.
+ * Vendors who define additional families must use an encoding in this range.
+ */
+typedef uint8_t psa_ecc_family_t;
+
+/** The type of PSA Diffie-Hellman group family identifiers.
+ *
+ * The group identifier is required to create an Diffie-Hellman key using the
+ * PSA_KEY_TYPE_DH_KEY_PAIR() or PSA_KEY_TYPE_DH_PUBLIC_KEY()
+ * macros.
+ *
+ * Values defined by this standard will never be in the range 0x80-0xff.
+ * Vendors who define additional families must use an encoding in this range.
+ */
+typedef uint8_t psa_dh_family_t;
+
+/** \brief Encoding of a cryptographic algorithm.
+ *
+ * For algorithms that can be applied to multiple key types, this type
+ * does not encode the key type. For example, for symmetric ciphers
+ * based on a block cipher, #psa_algorithm_t encodes the block cipher
+ * mode and the padding mode while the block cipher itself is encoded
+ * via #psa_key_type_t.
+ */
+typedef uint32_t psa_algorithm_t;
+
+/**@}*/
+
+/** \defgroup key_lifetimes Key lifetimes
+ * @{
+ */
+
+/** Encoding of key lifetimes.
+ *
+ * The lifetime of a key indicates where it is stored and what system actions
+ * may create and destroy it.
+ *
+ * Lifetime values have the following structure:
+ * - Bits 0-7 (#PSA_KEY_LIFETIME_GET_PERSISTENCE(\c lifetime)):
+ *   persistence level. This value indicates what device management
+ *   actions can cause it to be destroyed. In particular, it indicates
+ *   whether the key is _volatile_ or _persistent_.
+ *   See ::psa_key_persistence_t for more information.
+ * - Bits 8-31 (#PSA_KEY_LIFETIME_GET_LOCATION(\c lifetime)):
+ *   location indicator. This value indicates which part of the system
+ *   has access to the key material and can perform operations using the key.
+ *   See ::psa_key_location_t for more information.
+ *
+ * Volatile keys are automatically destroyed when the application instance
+ * terminates or on a power reset of the device. Persistent keys are
+ * preserved until the application explicitly destroys them or until an
+ * integration-specific device management event occurs (for example,
+ * a factory reset).
+ *
+ * Persistent keys have a key identifier of type #mbedtls_svc_key_id_t.
+ * This identifier remains valid throughout the lifetime of the key,
+ * even if the application instance that created the key terminates.
+ * The application can call psa_open_key() to open a persistent key that
+ * it created previously.
+ *
+ * The default lifetime of a key is #PSA_KEY_LIFETIME_VOLATILE. The lifetime
+ * #PSA_KEY_LIFETIME_PERSISTENT is supported if persistent storage is
+ * available. Other lifetime values may be supported depending on the
+ * library configuration.
+ */
+typedef uint32_t psa_key_lifetime_t;
+
+/** Encoding of key persistence levels.
+ *
+ * What distinguishes different persistence levels is what device management
+ * events may cause keys to be destroyed. _Volatile_ keys are destroyed
+ * by a power reset. Persistent keys may be destroyed by events such as
+ * a transfer of ownership or a factory reset. What management events
+ * actually affect persistent keys at different levels is outside the
+ * scope of the PSA Cryptography specification.
+ *
+ * The PSA Cryptography specification defines the following values of
+ * persistence levels:
+ * - \c 0 = #PSA_KEY_PERSISTENCE_VOLATILE: volatile key.
+ *   A volatile key is automatically destroyed by the implementation when
+ *   the application instance terminates. In particular, a volatile key
+ *   is automatically destroyed on a power reset of the device.
+ * - \c 1 = #PSA_KEY_PERSISTENCE_DEFAULT:
+ *   persistent key with a default lifetime.
+ * - \c 2-254: currently not supported by Mbed TLS.
+ * - \c 255 = #PSA_KEY_PERSISTENCE_READ_ONLY:
+ *   read-only or write-once key.
+ *   A key with this persistence level cannot be destroyed.
+ *   Mbed TLS does not currently offer a way to create such keys, but
+ *   integrations of Mbed TLS can use it for built-in keys that the
+ *   application cannot modify (for example, a hardware unique key (HUK)).
+ *
+ * \note Key persistence levels are 8-bit values. Key management
+ *       interfaces operate on lifetimes (type ::psa_key_lifetime_t) which
+ *       encode the persistence as the lower 8 bits of a 32-bit value.
+ */
+typedef uint8_t psa_key_persistence_t;
+
+/** Encoding of key location indicators.
+ *
+ * If an integration of Mbed TLS can make calls to external
+ * cryptoprocessors such as secure elements, the location of a key
+ * indicates which secure element performs the operations on the key.
+ * Depending on the design of the secure element, the key
+ * material may be stored either in the secure element, or
+ * in wrapped (encrypted) form alongside the key metadata in the
+ * primary local storage.
+ *
+ * The PSA Cryptography API specification defines the following values of
+ * location indicators:
+ * - \c 0: primary local storage.
+ *   This location is always available.
+ *   The primary local storage is typically the same storage area that
+ *   contains the key metadata.
+ * - \c 1: primary secure element.
+ *   Integrations of Mbed TLS should support this value if there is a secure
+ *   element attached to the operating environment.
+ *   As a guideline, secure elements may provide higher resistance against
+ *   side channel and physical attacks than the primary local storage, but may
+ *   have restrictions on supported key types, sizes, policies and operations
+ *   and may have different performance characteristics.
+ * - \c 2-0x7fffff: other locations defined by a PSA specification.
+ *   The PSA Cryptography API does not currently assign any meaning to these
+ *   locations, but future versions of that specification or other PSA
+ *   specifications may do so.
+ * - \c 0x800000-0xffffff: vendor-defined locations.
+ *   No PSA specification will assign a meaning to locations in this range.
+ *
+ * \note Key location indicators are 24-bit values. Key management
+ *       interfaces operate on lifetimes (type ::psa_key_lifetime_t) which
+ *       encode the location as the upper 24 bits of a 32-bit value.
+ */
+typedef uint32_t psa_key_location_t;
+
+/** Encoding of identifiers of persistent keys.
+ *
+ * - Applications may freely choose key identifiers in the range
+ *   #PSA_KEY_ID_USER_MIN to #PSA_KEY_ID_USER_MAX.
+ * - The implementation may define additional key identifiers in the range
+ *   #PSA_KEY_ID_VENDOR_MIN to #PSA_KEY_ID_VENDOR_MAX.
+ * - 0 is reserved as an invalid key identifier.
+ * - Key identifiers outside these ranges are reserved for future use.
+ */
+typedef uint32_t psa_key_id_t;
+
+#if !defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+typedef psa_key_id_t mbedtls_svc_key_id_t;
+
+#else /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+/* Implementation-specific: The Mbed Cryptography library can be built as
+ * part of a multi-client service that exposes the PSA Cryptograpy API in each
+ * client and encodes the client identity in the key identifier argument of
+ * functions such as psa_open_key().
+ */
+typedef struct
+{
+    psa_key_id_t key_id;
+    mbedtls_key_owner_id_t owner;
+} mbedtls_svc_key_id_t;
+
+#endif /* !MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/**@}*/
+
+/** \defgroup policy Key policies
+ * @{
+ */
+
+/** \brief Encoding of permitted usage on a key. */
+typedef uint32_t psa_key_usage_t;
+
+/**@}*/
+
+/** \defgroup attributes Key attributes
+ * @{
+ */
+
+/** The type of a structure containing key attributes.
+ *
+ * This is an opaque structure that can represent the metadata of a key
+ * object. Metadata that can be stored in attributes includes:
+ * - The location of the key in storage, indicated by its key identifier
+ *   and its lifetime.
+ * - The key's policy, comprising usage flags and a specification of
+ *   the permitted algorithm(s).
+ * - Information about the key itself: the key type and its size.
+ * - Additional implementation-defined attributes.
+ *
+ * The actual key material is not considered an attribute of a key.
+ * Key attributes do not contain information that is generally considered
+ * highly confidential.
+ *
+ * An attribute structure works like a simple data structure where each function
+ * `psa_set_key_xxx` sets a field and the corresponding function
+ * `psa_get_key_xxx` retrieves the value of the corresponding field.
+ * However, a future version of the library  may report values that are
+ * equivalent to the original one, but have a different encoding. Invalid
+ * values may be mapped to different, also invalid values.
+ *
+ * An attribute structure may contain references to auxiliary resources,
+ * for example pointers to allocated memory or indirect references to
+ * pre-calculated values. In order to free such resources, the application
+ * must call psa_reset_key_attributes(). As an exception, calling
+ * psa_reset_key_attributes() on an attribute structure is optional if
+ * the structure has only been modified by the following functions
+ * since it was initialized or last reset with psa_reset_key_attributes():
+ * - psa_set_key_id()
+ * - psa_set_key_lifetime()
+ * - psa_set_key_type()
+ * - psa_set_key_bits()
+ * - psa_set_key_usage_flags()
+ * - psa_set_key_algorithm()
+ *
+ * Before calling any function on a key attribute structure, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_key_attributes_t attributes;
+ *   memset(&attributes, 0, sizeof(attributes));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_key_attributes_t attributes = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_KEY_ATTRIBUTES_INIT,
+ *   for example:
+ *   \code
+ *   psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_key_attributes_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_key_attributes_t attributes;
+ *   attributes = psa_key_attributes_init();
+ *   \endcode
+ *
+ * A freshly initialized attribute structure contains the following
+ * values:
+ *
+ * - lifetime: #PSA_KEY_LIFETIME_VOLATILE.
+ * - key identifier: 0 (which is not a valid key identifier).
+ * - type: \c 0 (meaning that the type is unspecified).
+ * - key size: \c 0 (meaning that the size is unspecified).
+ * - usage flags: \c 0 (which allows no usage except exporting a public key).
+ * - algorithm: \c 0 (which allows no cryptographic usage, but allows
+ *   exporting).
+ *
+ * A typical sequence to create a key is as follows:
+ * -# Create and initialize an attribute structure.
+ * -# If the key is persistent, call psa_set_key_id().
+ *    Also call psa_set_key_lifetime() to place the key in a non-default
+ *    location.
+ * -# Set the key policy with psa_set_key_usage_flags() and
+ *    psa_set_key_algorithm().
+ * -# Set the key type with psa_set_key_type().
+ *    Skip this step if copying an existing key with psa_copy_key().
+ * -# When generating a random key with psa_generate_key() or deriving a key
+ *    with psa_key_derivation_output_key(), set the desired key size with
+ *    psa_set_key_bits().
+ * -# Call a key creation function: psa_import_key(), psa_generate_key(),
+ *    psa_key_derivation_output_key() or psa_copy_key(). This function reads
+ *    the attribute structure, creates a key with these attributes, and
+ *    outputs a key identifier to the newly created key.
+ * -# The attribute structure is now no longer necessary.
+ *    You may call psa_reset_key_attributes(), although this is optional
+ *    with the workflow presented here because the attributes currently
+ *    defined in this specification do not require any additional resources
+ *    beyond the structure itself.
+ *
+ * A typical sequence to query a key's attributes is as follows:
+ * -# Call psa_get_key_attributes().
+ * -# Call `psa_get_key_xxx` functions to retrieve the attribute(s) that
+ *    you are interested in.
+ * -# Call psa_reset_key_attributes() to free any resources that may be
+ *    used by the attribute structure.
+ *
+ * Once a key has been created, it is impossible to change its attributes.
+ */
+typedef struct psa_key_attributes_s psa_key_attributes_t;
+
+
+#ifndef __DOXYGEN_ONLY__
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+/* Mbed Crypto defines this type in crypto_types.h because it is also
+ * visible to applications through an implementation-specific extension.
+ * For the PSA Cryptography specification, this type is only visible
+ * via crypto_se_driver.h. */
+typedef uint64_t psa_key_slot_number_t;
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+#endif /* !__DOXYGEN_ONLY__ */
+
+/**@}*/
+
+/** \defgroup derivation Key derivation
+ * @{
+ */
+
+/** \brief Encoding of the step of a key derivation. */
+typedef uint16_t psa_key_derivation_step_t;
+
+/**@}*/
+
+#endif /* PSA_CRYPTO_TYPES_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_values.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_values.h
new file mode 100644
index 00000000000..fafe93cf9ba
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/psa/crypto_values.h
@@ -0,0 +1,2325 @@
+/**
+ * \file psa/crypto_values.h
+ *
+ * \brief PSA cryptography module: macros to build and analyze integer values.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h. Drivers must include the appropriate driver
+ * header file.
+ *
+ * This file contains portable definitions of macros to build and analyze
+ * values of integral types that encode properties of cryptographic keys,
+ * designations of cryptographic algorithms, and error codes returned by
+ * the library.
+ *
+ * This header file only defines preprocessor macros.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_VALUES_H
+#define PSA_CRYPTO_VALUES_H
+
+/** \defgroup error Error codes
+ * @{
+ */
+
+/* PSA error codes */
+
+/** The action was completed successfully. */
+#define PSA_SUCCESS ((psa_status_t)0)
+
+/** An error occurred that does not correspond to any defined
+ * failure cause.
+ *
+ * Implementations may use this error code if none of the other standard
+ * error codes are applicable. */
+#define PSA_ERROR_GENERIC_ERROR         ((psa_status_t)-132)
+
+/** The requested operation or a parameter is not supported
+ * by this implementation.
+ *
+ * Implementations should return this error code when an enumeration
+ * parameter such as a key type, algorithm, etc. is not recognized.
+ * If a combination of parameters is recognized and identified as
+ * not valid, return #PSA_ERROR_INVALID_ARGUMENT instead. */
+#define PSA_ERROR_NOT_SUPPORTED         ((psa_status_t)-134)
+
+/** The requested action is denied by a policy.
+ *
+ * Implementations should return this error code when the parameters
+ * are recognized as valid and supported, and a policy explicitly
+ * denies the requested operation.
+ *
+ * If a subset of the parameters of a function call identify a
+ * forbidden operation, and another subset of the parameters are
+ * not valid or not supported, it is unspecified whether the function
+ * returns #PSA_ERROR_NOT_PERMITTED, #PSA_ERROR_NOT_SUPPORTED or
+ * #PSA_ERROR_INVALID_ARGUMENT. */
+#define PSA_ERROR_NOT_PERMITTED         ((psa_status_t)-133)
+
+/** An output buffer is too small.
+ *
+ * Applications can call the \c PSA_xxx_SIZE macro listed in the function
+ * description to determine a sufficient buffer size.
+ *
+ * Implementations should preferably return this error code only
+ * in cases when performing the operation with a larger output
+ * buffer would succeed. However implementations may return this
+ * error if a function has invalid or unsupported parameters in addition
+ * to the parameters that determine the necessary output buffer size. */
+#define PSA_ERROR_BUFFER_TOO_SMALL      ((psa_status_t)-138)
+
+/** Asking for an item that already exists
+ *
+ * Implementations should return this error, when attempting
+ * to write an item (like a key) that already exists. */
+#define PSA_ERROR_ALREADY_EXISTS        ((psa_status_t)-139)
+
+/** Asking for an item that doesn't exist
+ *
+ * Implementations should return this error, if a requested item (like
+ * a key) does not exist. */
+#define PSA_ERROR_DOES_NOT_EXIST        ((psa_status_t)-140)
+
+/** The requested action cannot be performed in the current state.
+ *
+ * Multipart operations return this error when one of the
+ * functions is called out of sequence. Refer to the function
+ * descriptions for permitted sequencing of functions.
+ *
+ * Implementations shall not return this error code to indicate
+ * that a key either exists or not,
+ * but shall instead return #PSA_ERROR_ALREADY_EXISTS or #PSA_ERROR_DOES_NOT_EXIST
+ * as applicable.
+ *
+ * Implementations shall not return this error code to indicate that a
+ * key identifier is invalid, but shall return #PSA_ERROR_INVALID_HANDLE
+ * instead. */
+#define PSA_ERROR_BAD_STATE             ((psa_status_t)-137)
+
+/** The parameters passed to the function are invalid.
+ *
+ * Implementations may return this error any time a parameter or
+ * combination of parameters are recognized as invalid.
+ *
+ * Implementations shall not return this error code to indicate that a
+ * key identifier is invalid, but shall return #PSA_ERROR_INVALID_HANDLE
+ * instead.
+ */
+#define PSA_ERROR_INVALID_ARGUMENT      ((psa_status_t)-135)
+
+/** There is not enough runtime memory.
+ *
+ * If the action is carried out across multiple security realms, this
+ * error can refer to available memory in any of the security realms. */
+#define PSA_ERROR_INSUFFICIENT_MEMORY   ((psa_status_t)-141)
+
+/** There is not enough persistent storage.
+ *
+ * Functions that modify the key storage return this error code if
+ * there is insufficient storage space on the host media. In addition,
+ * many functions that do not otherwise access storage may return this
+ * error code if the implementation requires a mandatory log entry for
+ * the requested action and the log storage space is full. */
+#define PSA_ERROR_INSUFFICIENT_STORAGE  ((psa_status_t)-142)
+
+/** There was a communication failure inside the implementation.
+ *
+ * This can indicate a communication failure between the application
+ * and an external cryptoprocessor or between the cryptoprocessor and
+ * an external volatile or persistent memory. A communication failure
+ * may be transient or permanent depending on the cause.
+ *
+ * \warning If a function returns this error, it is undetermined
+ * whether the requested action has completed or not. Implementations
+ * should return #PSA_SUCCESS on successful completion whenever
+ * possible, however functions may return #PSA_ERROR_COMMUNICATION_FAILURE
+ * if the requested action was completed successfully in an external
+ * cryptoprocessor but there was a breakdown of communication before
+ * the cryptoprocessor could report the status to the application.
+ */
+#define PSA_ERROR_COMMUNICATION_FAILURE ((psa_status_t)-145)
+
+/** There was a storage failure that may have led to data loss.
+ *
+ * This error indicates that some persistent storage is corrupted.
+ * It should not be used for a corruption of volatile memory
+ * (use #PSA_ERROR_CORRUPTION_DETECTED), for a communication error
+ * between the cryptoprocessor and its external storage (use
+ * #PSA_ERROR_COMMUNICATION_FAILURE), or when the storage is
+ * in a valid state but is full (use #PSA_ERROR_INSUFFICIENT_STORAGE).
+ *
+ * Note that a storage failure does not indicate that any data that was
+ * previously read is invalid. However this previously read data may no
+ * longer be readable from storage.
+ *
+ * When a storage failure occurs, it is no longer possible to ensure
+ * the global integrity of the keystore. Depending on the global
+ * integrity guarantees offered by the implementation, access to other
+ * data may or may not fail even if the data is still readable but
+ * its integrity cannot be guaranteed.
+ *
+ * Implementations should only use this error code to report a
+ * permanent storage corruption. However application writers should
+ * keep in mind that transient errors while reading the storage may be
+ * reported using this error code. */
+#define PSA_ERROR_STORAGE_FAILURE       ((psa_status_t)-146)
+
+/** A hardware failure was detected.
+ *
+ * A hardware failure may be transient or permanent depending on the
+ * cause. */
+#define PSA_ERROR_HARDWARE_FAILURE      ((psa_status_t)-147)
+
+/** A tampering attempt was detected.
+ *
+ * If an application receives this error code, there is no guarantee
+ * that previously accessed or computed data was correct and remains
+ * confidential. Applications should not perform any security function
+ * and should enter a safe failure state.
+ *
+ * Implementations may return this error code if they detect an invalid
+ * state that cannot happen during normal operation and that indicates
+ * that the implementation's security guarantees no longer hold. Depending
+ * on the implementation architecture and on its security and safety goals,
+ * the implementation may forcibly terminate the application.
+ *
+ * This error code is intended as a last resort when a security breach
+ * is detected and it is unsure whether the keystore data is still
+ * protected. Implementations shall only return this error code
+ * to report an alarm from a tampering detector, to indicate that
+ * the confidentiality of stored data can no longer be guaranteed,
+ * or to indicate that the integrity of previously returned data is now
+ * considered compromised. Implementations shall not use this error code
+ * to indicate a hardware failure that merely makes it impossible to
+ * perform the requested operation (use #PSA_ERROR_COMMUNICATION_FAILURE,
+ * #PSA_ERROR_STORAGE_FAILURE, #PSA_ERROR_HARDWARE_FAILURE,
+ * #PSA_ERROR_INSUFFICIENT_ENTROPY or other applicable error code
+ * instead).
+ *
+ * This error indicates an attack against the application. Implementations
+ * shall not return this error code as a consequence of the behavior of
+ * the application itself. */
+#define PSA_ERROR_CORRUPTION_DETECTED    ((psa_status_t)-151)
+
+/** There is not enough entropy to generate random data needed
+ * for the requested action.
+ *
+ * This error indicates a failure of a hardware random generator.
+ * Application writers should note that this error can be returned not
+ * only by functions whose purpose is to generate random data, such
+ * as key, IV or nonce generation, but also by functions that execute
+ * an algorithm with a randomized result, as well as functions that
+ * use randomization of intermediate computations as a countermeasure
+ * to certain attacks.
+ *
+ * Implementations should avoid returning this error after psa_crypto_init()
+ * has succeeded. Implementations should generate sufficient
+ * entropy during initialization and subsequently use a cryptographically
+ * secure pseudorandom generator (PRNG). However implementations may return
+ * this error at any time if a policy requires the PRNG to be reseeded
+ * during normal operation. */
+#define PSA_ERROR_INSUFFICIENT_ENTROPY  ((psa_status_t)-148)
+
+/** The signature, MAC or hash is incorrect.
+ *
+ * Verification functions return this error if the verification
+ * calculations completed successfully, and the value to be verified
+ * was determined to be incorrect.
+ *
+ * If the value to verify has an invalid size, implementations may return
+ * either #PSA_ERROR_INVALID_ARGUMENT or #PSA_ERROR_INVALID_SIGNATURE. */
+#define PSA_ERROR_INVALID_SIGNATURE     ((psa_status_t)-149)
+
+/** The decrypted padding is incorrect.
+ *
+ * \warning In some protocols, when decrypting data, it is essential that
+ * the behavior of the application does not depend on whether the padding
+ * is correct, down to precise timing. Applications should prefer
+ * protocols that use authenticated encryption rather than plain
+ * encryption. If the application must perform a decryption of
+ * unauthenticated data, the application writer should take care not
+ * to reveal whether the padding is invalid.
+ *
+ * Implementations should strive to make valid and invalid padding
+ * as close as possible to indistinguishable to an external observer.
+ * In particular, the timing of a decryption operation should not
+ * depend on the validity of the padding. */
+#define PSA_ERROR_INVALID_PADDING       ((psa_status_t)-150)
+
+/** Return this error when there's insufficient data when attempting
+ * to read from a resource. */
+#define PSA_ERROR_INSUFFICIENT_DATA     ((psa_status_t)-143)
+
+/** The key identifier is not valid. See also :ref:\`key-handles\`.
+ */
+#define PSA_ERROR_INVALID_HANDLE        ((psa_status_t)-136)
+
+/** Stored data has been corrupted.
+ *
+ * This error indicates that some persistent storage has suffered corruption.
+ * It does not indicate the following situations, which have specific error
+ * codes:
+ *
+ * - A corruption of volatile memory - use #PSA_ERROR_CORRUPTION_DETECTED.
+ * - A communication error between the cryptoprocessor and its external
+ *   storage - use #PSA_ERROR_COMMUNICATION_FAILURE.
+ * - When the storage is in a valid state but is full - use
+ *   #PSA_ERROR_INSUFFICIENT_STORAGE.
+ * - When the storage fails for other reasons - use
+ *   #PSA_ERROR_STORAGE_FAILURE.
+ * - When the stored data is not valid - use #PSA_ERROR_DATA_INVALID.
+ *
+ * \note A storage corruption does not indicate that any data that was
+ * previously read is invalid. However this previously read data might no
+ * longer be readable from storage.
+ *
+ * When a storage failure occurs, it is no longer possible to ensure the
+ * global integrity of the keystore.
+ */
+#define PSA_ERROR_DATA_CORRUPT          ((psa_status_t)-152)
+
+/** Data read from storage is not valid for the implementation.
+ *
+ * This error indicates that some data read from storage does not have a valid
+ * format. It does not indicate the following situations, which have specific
+ * error codes:
+ *
+ * - When the storage or stored data is corrupted - use #PSA_ERROR_DATA_CORRUPT
+ * - When the storage fails for other reasons - use #PSA_ERROR_STORAGE_FAILURE
+ * - An invalid argument to the API - use #PSA_ERROR_INVALID_ARGUMENT
+ *
+ * This error is typically a result of either storage corruption on a
+ * cleartext storage backend, or an attempt to read data that was
+ * written by an incompatible version of the library.
+ */
+#define PSA_ERROR_DATA_INVALID          ((psa_status_t)-153)
+
+/**@}*/
+
+/** \defgroup crypto_types Key and algorithm types
+ * @{
+ */
+
+/** An invalid key type value.
+ *
+ * Zero is not the encoding of any key type.
+ */
+#define PSA_KEY_TYPE_NONE                           ((psa_key_type_t)0x0000)
+
+/** Vendor-defined key type flag.
+ *
+ * Key types defined by this standard will never have the
+ * #PSA_KEY_TYPE_VENDOR_FLAG bit set. Vendors who define additional key types
+ * must use an encoding with the #PSA_KEY_TYPE_VENDOR_FLAG bit set and should
+ * respect the bitwise structure used by standard encodings whenever practical.
+ */
+#define PSA_KEY_TYPE_VENDOR_FLAG                    ((psa_key_type_t)0x8000)
+
+#define PSA_KEY_TYPE_CATEGORY_MASK                  ((psa_key_type_t)0x7000)
+#define PSA_KEY_TYPE_CATEGORY_RAW                   ((psa_key_type_t)0x1000)
+#define PSA_KEY_TYPE_CATEGORY_SYMMETRIC             ((psa_key_type_t)0x2000)
+#define PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY            ((psa_key_type_t)0x4000)
+#define PSA_KEY_TYPE_CATEGORY_KEY_PAIR              ((psa_key_type_t)0x7000)
+
+#define PSA_KEY_TYPE_CATEGORY_FLAG_PAIR             ((psa_key_type_t)0x3000)
+
+/** Whether a key type is vendor-defined.
+ *
+ * See also #PSA_KEY_TYPE_VENDOR_FLAG.
+ */
+#define PSA_KEY_TYPE_IS_VENDOR_DEFINED(type) \
+    (((type) & PSA_KEY_TYPE_VENDOR_FLAG) != 0)
+
+/** Whether a key type is an unstructured array of bytes.
+ *
+ * This encompasses both symmetric keys and non-key data.
+ */
+#define PSA_KEY_TYPE_IS_UNSTRUCTURED(type) \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_RAW || \
+     ((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC)
+
+/** Whether a key type is asymmetric: either a key pair or a public key. */
+#define PSA_KEY_TYPE_IS_ASYMMETRIC(type)                                \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK                               \
+      & ~PSA_KEY_TYPE_CATEGORY_FLAG_PAIR) ==                            \
+     PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY)
+/** Whether a key type is the public part of a key pair. */
+#define PSA_KEY_TYPE_IS_PUBLIC_KEY(type)                                \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY)
+/** Whether a key type is a key pair containing a private part and a public
+ * part. */
+#define PSA_KEY_TYPE_IS_KEY_PAIR(type)                                   \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_KEY_PAIR)
+/** The key pair type corresponding to a public key type.
+ *
+ * You may also pass a key pair type as \p type, it will be left unchanged.
+ *
+ * \param type      A public key type or key pair type.
+ *
+ * \return          The corresponding key pair type.
+ *                  If \p type is not a public key or a key pair,
+ *                  the return value is undefined.
+ */
+#define PSA_KEY_TYPE_KEY_PAIR_OF_PUBLIC_KEY(type)        \
+    ((type) | PSA_KEY_TYPE_CATEGORY_FLAG_PAIR)
+/** The public key type corresponding to a key pair type.
+ *
+ * You may also pass a key pair type as \p type, it will be left unchanged.
+ *
+ * \param type      A public key type or key pair type.
+ *
+ * \return          The corresponding public key type.
+ *                  If \p type is not a public key or a key pair,
+ *                  the return value is undefined.
+ */
+#define PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type)        \
+    ((type) & ~PSA_KEY_TYPE_CATEGORY_FLAG_PAIR)
+
+/** Raw data.
+ *
+ * A "key" of this type cannot be used for any cryptographic operation.
+ * Applications may use this type to store arbitrary data in the keystore. */
+#define PSA_KEY_TYPE_RAW_DATA                       ((psa_key_type_t)0x1001)
+
+/** HMAC key.
+ *
+ * The key policy determines which underlying hash algorithm the key can be
+ * used for.
+ *
+ * HMAC keys should generally have the same size as the underlying hash.
+ * This size can be calculated with #PSA_HASH_LENGTH(\c alg) where
+ * \c alg is the HMAC algorithm or the underlying hash algorithm. */
+#define PSA_KEY_TYPE_HMAC                           ((psa_key_type_t)0x1100)
+
+/** A secret for key derivation.
+ *
+ * The key policy determines which key derivation algorithm the key
+ * can be used for.
+ */
+#define PSA_KEY_TYPE_DERIVE                         ((psa_key_type_t)0x1200)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the AES block cipher.
+ *
+ * The size of the key can be 16 bytes (AES-128), 24 bytes (AES-192) or
+ * 32 bytes (AES-256).
+ */
+#define PSA_KEY_TYPE_AES                            ((psa_key_type_t)0x2400)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the
+ * ARIA block cipher. */
+#define PSA_KEY_TYPE_ARIA                           ((psa_key_type_t)0x2406)
+
+/** Key for a cipher or MAC algorithm based on DES or 3DES (Triple-DES).
+ *
+ * The size of the key can be 64 bits (single DES), 128 bits (2-key 3DES) or
+ * 192 bits (3-key 3DES).
+ *
+ * Note that single DES and 2-key 3DES are weak and strongly
+ * deprecated and should only be used to decrypt legacy data. 3-key 3DES
+ * is weak and deprecated and should only be used in legacy protocols.
+ */
+#define PSA_KEY_TYPE_DES                            ((psa_key_type_t)0x2301)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the
+ * Camellia block cipher. */
+#define PSA_KEY_TYPE_CAMELLIA                       ((psa_key_type_t)0x2403)
+
+/** Key for the RC4 stream cipher.
+ *
+ * Note that RC4 is weak and deprecated and should only be used in
+ * legacy protocols. */
+#define PSA_KEY_TYPE_ARC4                           ((psa_key_type_t)0x2002)
+
+/** Key for the ChaCha20 stream cipher or the Chacha20-Poly1305 AEAD algorithm.
+ *
+ * ChaCha20 and the ChaCha20_Poly1305 construction are defined in RFC 7539.
+ *
+ * Implementations must support 12-byte nonces, may support 8-byte nonces,
+ * and should reject other sizes.
+ */
+#define PSA_KEY_TYPE_CHACHA20                       ((psa_key_type_t)0x2004)
+
+/** RSA public key.
+ *
+ * The size of an RSA key is the bit size of the modulus.
+ */
+#define PSA_KEY_TYPE_RSA_PUBLIC_KEY                 ((psa_key_type_t)0x4001)
+/** RSA key pair (private and public key).
+ *
+ * The size of an RSA key is the bit size of the modulus.
+ */
+#define PSA_KEY_TYPE_RSA_KEY_PAIR                   ((psa_key_type_t)0x7001)
+/** Whether a key type is an RSA key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_RSA(type)                                       \
+    (PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) == PSA_KEY_TYPE_RSA_PUBLIC_KEY)
+
+#define PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE            ((psa_key_type_t)0x4100)
+#define PSA_KEY_TYPE_ECC_KEY_PAIR_BASE              ((psa_key_type_t)0x7100)
+#define PSA_KEY_TYPE_ECC_CURVE_MASK                 ((psa_key_type_t)0x00ff)
+/** Elliptic curve key pair.
+ *
+ * The size of an elliptic curve key is the bit size associated with the curve,
+ * i.e. the bit size of *q* for a curve over a field *F<sub>q</sub>*.
+ * See the documentation of `PSA_ECC_FAMILY_xxx` curve families for details.
+ *
+ * \param curve     A value of type ::psa_ecc_family_t that
+ *                  identifies the ECC curve to be used.
+ */
+#define PSA_KEY_TYPE_ECC_KEY_PAIR(curve)         \
+    (PSA_KEY_TYPE_ECC_KEY_PAIR_BASE | (curve))
+/** Elliptic curve public key.
+ *
+ * The size of an elliptic curve public key is the same as the corresponding
+ * private key (see #PSA_KEY_TYPE_ECC_KEY_PAIR and the documentation of
+ * `PSA_ECC_FAMILY_xxx` curve families).
+ *
+ * \param curve     A value of type ::psa_ecc_family_t that
+ *                  identifies the ECC curve to be used.
+ */
+#define PSA_KEY_TYPE_ECC_PUBLIC_KEY(curve)              \
+    (PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE | (curve))
+
+/** Whether a key type is an elliptic curve key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_ECC(type)                                       \
+    ((PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) &                        \
+      ~PSA_KEY_TYPE_ECC_CURVE_MASK) == PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE)
+/** Whether a key type is an elliptic curve key pair. */
+#define PSA_KEY_TYPE_IS_ECC_KEY_PAIR(type)                               \
+    (((type) & ~PSA_KEY_TYPE_ECC_CURVE_MASK) ==                         \
+     PSA_KEY_TYPE_ECC_KEY_PAIR_BASE)
+/** Whether a key type is an elliptic curve public key. */
+#define PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY(type)                            \
+    (((type) & ~PSA_KEY_TYPE_ECC_CURVE_MASK) ==                         \
+     PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE)
+
+/** Extract the curve from an elliptic curve key type. */
+#define PSA_KEY_TYPE_ECC_GET_FAMILY(type)                        \
+    ((psa_ecc_family_t) (PSA_KEY_TYPE_IS_ECC(type) ?             \
+                        ((type) & PSA_KEY_TYPE_ECC_CURVE_MASK) : \
+                        0))
+
+/** SEC Koblitz curves over prime fields.
+ *
+ * This family comprises the following curves:
+ * secp192k1, secp224k1, secp256k1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECP_K1           ((psa_ecc_family_t) 0x17)
+
+/** SEC random curves over prime fields.
+ *
+ * This family comprises the following curves:
+ * secp192k1, secp224r1, secp256r1, secp384r1, secp521r1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECP_R1           ((psa_ecc_family_t) 0x12)
+/* SECP160R2 (SEC2 v1, obsolete) */
+#define PSA_ECC_FAMILY_SECP_R2           ((psa_ecc_family_t) 0x1b)
+
+/** SEC Koblitz curves over binary fields.
+ *
+ * This family comprises the following curves:
+ * sect163k1, sect233k1, sect239k1, sect283k1, sect409k1, sect571k1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_K1           ((psa_ecc_family_t) 0x27)
+
+/** SEC random curves over binary fields.
+ *
+ * This family comprises the following curves:
+ * sect163r1, sect233r1, sect283r1, sect409r1, sect571r1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_R1           ((psa_ecc_family_t) 0x22)
+
+/** SEC additional random curves over binary fields.
+ *
+ * This family comprises the following curve:
+ * sect163r2.
+ * It is defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_R2           ((psa_ecc_family_t) 0x2b)
+
+/** Brainpool P random curves.
+ *
+ * This family comprises the following curves:
+ * brainpoolP160r1, brainpoolP192r1, brainpoolP224r1, brainpoolP256r1,
+ * brainpoolP320r1, brainpoolP384r1, brainpoolP512r1.
+ * It is defined in RFC 5639.
+ */
+#define PSA_ECC_FAMILY_BRAINPOOL_P_R1    ((psa_ecc_family_t) 0x30)
+
+/** Curve25519 and Curve448.
+ *
+ * This family comprises the following Montgomery curves:
+ * - 255-bit: Bernstein et al.,
+ *   _Curve25519: new Diffie-Hellman speed records_, LNCS 3958, 2006.
+ *   The algorithm #PSA_ALG_ECDH performs X25519 when used with this curve.
+ * - 448-bit: Hamburg,
+ *   _Ed448-Goldilocks, a new elliptic curve_, NIST ECC Workshop, 2015.
+ *   The algorithm #PSA_ALG_ECDH performs X448 when used with this curve.
+ */
+#define PSA_ECC_FAMILY_MONTGOMERY        ((psa_ecc_family_t) 0x41)
+
+/** The twisted Edwards curves Ed25519 and Ed448.
+ *
+ * These curves are suitable for EdDSA (#PSA_ALG_PURE_EDDSA for both curves,
+ * #PSA_ALG_ED25519PH for the 255-bit curve,
+ * #PSA_ALG_ED448PH for the 448-bit curve).
+ *
+ * This family comprises the following twisted Edwards curves:
+ * - 255-bit: Edwards25519, the twisted Edwards curve birationally equivalent
+ *   to Curve25519.
+ *   Bernstein et al., _Twisted Edwards curves_, Africacrypt 2008.
+ * - 448-bit: Edwards448, the twisted Edwards curve birationally equivalent
+ *   to Curve448.
+ *   Hamburg, _Ed448-Goldilocks, a new elliptic curve_, NIST ECC Workshop, 2015.
+ */
+#define PSA_ECC_FAMILY_TWISTED_EDWARDS   ((psa_ecc_family_t) 0x42)
+
+#define PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE             ((psa_key_type_t)0x4200)
+#define PSA_KEY_TYPE_DH_KEY_PAIR_BASE               ((psa_key_type_t)0x7200)
+#define PSA_KEY_TYPE_DH_GROUP_MASK                  ((psa_key_type_t)0x00ff)
+/** Diffie-Hellman key pair.
+ *
+ * \param group     A value of type ::psa_dh_family_t that identifies the
+ *                  Diffie-Hellman group to be used.
+ */
+#define PSA_KEY_TYPE_DH_KEY_PAIR(group)          \
+    (PSA_KEY_TYPE_DH_KEY_PAIR_BASE | (group))
+/** Diffie-Hellman public key.
+ *
+ * \param group     A value of type ::psa_dh_family_t that identifies the
+ *                  Diffie-Hellman group to be used.
+ */
+#define PSA_KEY_TYPE_DH_PUBLIC_KEY(group)               \
+    (PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE | (group))
+
+/** Whether a key type is a Diffie-Hellman key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_DH(type)                                        \
+    ((PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) &                        \
+      ~PSA_KEY_TYPE_DH_GROUP_MASK) == PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE)
+/** Whether a key type is a Diffie-Hellman key pair. */
+#define PSA_KEY_TYPE_IS_DH_KEY_PAIR(type)                               \
+    (((type) & ~PSA_KEY_TYPE_DH_GROUP_MASK) ==                         \
+     PSA_KEY_TYPE_DH_KEY_PAIR_BASE)
+/** Whether a key type is a Diffie-Hellman public key. */
+#define PSA_KEY_TYPE_IS_DH_PUBLIC_KEY(type)                            \
+    (((type) & ~PSA_KEY_TYPE_DH_GROUP_MASK) ==                         \
+     PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE)
+
+/** Extract the group from a Diffie-Hellman key type. */
+#define PSA_KEY_TYPE_DH_GET_FAMILY(type)                        \
+    ((psa_dh_family_t) (PSA_KEY_TYPE_IS_DH(type) ?              \
+                       ((type) & PSA_KEY_TYPE_DH_GROUP_MASK) :  \
+                       0))
+
+/** Diffie-Hellman groups defined in RFC 7919 Appendix A.
+ *
+ * This family includes groups with the following key sizes (in bits):
+ * 2048, 3072, 4096, 6144, 8192. A given implementation may support
+ * all of these sizes or only a subset.
+ */
+#define PSA_DH_FAMILY_RFC7919            ((psa_dh_family_t) 0x03)
+
+#define PSA_GET_KEY_TYPE_BLOCK_SIZE_EXPONENT(type)      \
+    (((type) >> 8) & 7)
+/** The block size of a block cipher.
+ *
+ * \param type  A cipher key type (value of type #psa_key_type_t).
+ *
+ * \return      The block size for a block cipher, or 1 for a stream cipher.
+ *              The return value is undefined if \p type is not a supported
+ *              cipher key type.
+ *
+ * \note It is possible to build stream cipher algorithms on top of a block
+ *       cipher, for example CTR mode (#PSA_ALG_CTR).
+ *       This macro only takes the key type into account, so it cannot be
+ *       used to determine the size of the data that #psa_cipher_update()
+ *       might buffer for future processing in general.
+ *
+ * \note This macro returns a compile-time constant if its argument is one.
+ *
+ * \warning This macro may evaluate its argument multiple times.
+ */
+#define PSA_BLOCK_CIPHER_BLOCK_LENGTH(type)                                     \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC ? \
+     1u << PSA_GET_KEY_TYPE_BLOCK_SIZE_EXPONENT(type) :                         \
+     0u)
+
+/** Vendor-defined algorithm flag.
+ *
+ * Algorithms defined by this standard will never have the #PSA_ALG_VENDOR_FLAG
+ * bit set. Vendors who define additional algorithms must use an encoding with
+ * the #PSA_ALG_VENDOR_FLAG bit set and should respect the bitwise structure
+ * used by standard encodings whenever practical.
+ */
+#define PSA_ALG_VENDOR_FLAG                     ((psa_algorithm_t)0x80000000)
+
+#define PSA_ALG_CATEGORY_MASK                   ((psa_algorithm_t)0x7f000000)
+#define PSA_ALG_CATEGORY_HASH                   ((psa_algorithm_t)0x02000000)
+#define PSA_ALG_CATEGORY_MAC                    ((psa_algorithm_t)0x03000000)
+#define PSA_ALG_CATEGORY_CIPHER                 ((psa_algorithm_t)0x04000000)
+#define PSA_ALG_CATEGORY_AEAD                   ((psa_algorithm_t)0x05000000)
+#define PSA_ALG_CATEGORY_SIGN                   ((psa_algorithm_t)0x06000000)
+#define PSA_ALG_CATEGORY_ASYMMETRIC_ENCRYPTION  ((psa_algorithm_t)0x07000000)
+#define PSA_ALG_CATEGORY_KEY_DERIVATION         ((psa_algorithm_t)0x08000000)
+#define PSA_ALG_CATEGORY_KEY_AGREEMENT          ((psa_algorithm_t)0x09000000)
+
+/** Whether an algorithm is vendor-defined.
+ *
+ * See also #PSA_ALG_VENDOR_FLAG.
+ */
+#define PSA_ALG_IS_VENDOR_DEFINED(alg)                                  \
+    (((alg) & PSA_ALG_VENDOR_FLAG) != 0)
+
+/** Whether the specified algorithm is a hash algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a hash algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HASH(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_HASH)
+
+/** Whether the specified algorithm is a MAC algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a MAC algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_MAC(alg)                                             \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_MAC)
+
+/** Whether the specified algorithm is a symmetric cipher algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a symmetric cipher algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_CIPHER(alg)                                          \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_CIPHER)
+
+/** Whether the specified algorithm is an authenticated encryption
+ * with associated data (AEAD) algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an AEAD algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_AEAD(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_AEAD)
+
+/** Whether the specified algorithm is an asymmetric signature algorithm,
+ * also known as public-key signature algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an asymmetric signature algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_SIGN)
+
+/** Whether the specified algorithm is an asymmetric encryption algorithm,
+ * also known as public-key encryption algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an asymmetric encryption algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_ASYMMETRIC_ENCRYPTION(alg)                           \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_ASYMMETRIC_ENCRYPTION)
+
+/** Whether the specified algorithm is a key agreement algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a key agreement algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_KEY_AGREEMENT(alg)                                   \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_KEY_AGREEMENT)
+
+/** Whether the specified algorithm is a key derivation algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a key derivation algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_KEY_DERIVATION(alg)                                  \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+/** An invalid algorithm identifier value. */
+#define PSA_ALG_NONE                            ((psa_algorithm_t)0)
+
+#define PSA_ALG_HASH_MASK                       ((psa_algorithm_t)0x000000ff)
+/** MD2 */
+#define PSA_ALG_MD2                             ((psa_algorithm_t)0x02000001)
+/** MD4 */
+#define PSA_ALG_MD4                             ((psa_algorithm_t)0x02000002)
+/** MD5 */
+#define PSA_ALG_MD5                             ((psa_algorithm_t)0x02000003)
+/** PSA_ALG_RIPEMD160 */
+#define PSA_ALG_RIPEMD160                       ((psa_algorithm_t)0x02000004)
+/** SHA1 */
+#define PSA_ALG_SHA_1                           ((psa_algorithm_t)0x02000005)
+/** SHA2-224 */
+#define PSA_ALG_SHA_224                         ((psa_algorithm_t)0x02000008)
+/** SHA2-256 */
+#define PSA_ALG_SHA_256                         ((psa_algorithm_t)0x02000009)
+/** SHA2-384 */
+#define PSA_ALG_SHA_384                         ((psa_algorithm_t)0x0200000a)
+/** SHA2-512 */
+#define PSA_ALG_SHA_512                         ((psa_algorithm_t)0x0200000b)
+/** SHA2-512/224 */
+#define PSA_ALG_SHA_512_224                     ((psa_algorithm_t)0x0200000c)
+/** SHA2-512/256 */
+#define PSA_ALG_SHA_512_256                     ((psa_algorithm_t)0x0200000d)
+/** SHA3-224 */
+#define PSA_ALG_SHA3_224                        ((psa_algorithm_t)0x02000010)
+/** SHA3-256 */
+#define PSA_ALG_SHA3_256                        ((psa_algorithm_t)0x02000011)
+/** SHA3-384 */
+#define PSA_ALG_SHA3_384                        ((psa_algorithm_t)0x02000012)
+/** SHA3-512 */
+#define PSA_ALG_SHA3_512                        ((psa_algorithm_t)0x02000013)
+/** The first 512 bits (64 bytes) of the SHAKE256 output.
+ *
+ * This is the prehashing for Ed448ph (see #PSA_ALG_ED448PH). For other
+ * scenarios where a hash function based on SHA3/SHAKE is desired, SHA3-512
+ * has the same output size and a (theoretically) higher security strength.
+ */
+#define PSA_ALG_SHAKE256_512                    ((psa_algorithm_t)0x02000015)
+
+/** In a hash-and-sign algorithm policy, allow any hash algorithm.
+ *
+ * This value may be used to form the algorithm usage field of a policy
+ * for a signature algorithm that is parametrized by a hash. The key
+ * may then be used to perform operations using the same signature
+ * algorithm parametrized with any supported hash.
+ *
+ * That is, suppose that `PSA_xxx_SIGNATURE` is one of the following macros:
+ * - #PSA_ALG_RSA_PKCS1V15_SIGN, #PSA_ALG_RSA_PSS, #PSA_ALG_RSA_PSS_ANY_SALT,
+ * - #PSA_ALG_ECDSA, #PSA_ALG_DETERMINISTIC_ECDSA.
+ * Then you may create and use a key as follows:
+ * - Set the key usage field using #PSA_ALG_ANY_HASH, for example:
+ *   ```
+ *   psa_set_key_usage_flags(&attributes, PSA_KEY_USAGE_SIGN_HASH); // or VERIFY
+ *   psa_set_key_algorithm(&attributes, PSA_xxx_SIGNATURE(PSA_ALG_ANY_HASH));
+ *   ```
+ * - Import or generate key material.
+ * - Call psa_sign_hash() or psa_verify_hash(), passing
+ *   an algorithm built from `PSA_xxx_SIGNATURE` and a specific hash. Each
+ *   call to sign or verify a message may use a different hash.
+ *   ```
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA_256), ...);
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA_512), ...);
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA3_256), ...);
+ *   ```
+ *
+ * This value may not be used to build other algorithms that are
+ * parametrized over a hash. For any valid use of this macro to build
+ * an algorithm \c alg, #PSA_ALG_IS_HASH_AND_SIGN(\c alg) is true.
+ *
+ * This value may not be used to build an algorithm specification to
+ * perform an operation. It is only valid to build policies.
+ */
+#define PSA_ALG_ANY_HASH                        ((psa_algorithm_t)0x020000ff)
+
+#define PSA_ALG_MAC_SUBCATEGORY_MASK            ((psa_algorithm_t)0x00c00000)
+#define PSA_ALG_HMAC_BASE                       ((psa_algorithm_t)0x03800000)
+/** Macro to build an HMAC algorithm.
+ *
+ * For example, #PSA_ALG_HMAC(#PSA_ALG_SHA_256) is HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding HMAC algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_HMAC(hash_alg)                                  \
+    (PSA_ALG_HMAC_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_HMAC_GET_HASH(hmac_alg)                             \
+    (PSA_ALG_CATEGORY_HASH | ((hmac_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is an HMAC algorithm.
+ *
+ * HMAC is a family of MAC algorithms that are based on a hash function.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an HMAC algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HMAC(alg)                                            \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_MAC_SUBCATEGORY_MASK)) == \
+     PSA_ALG_HMAC_BASE)
+
+/* In the encoding of a MAC algorithm, the bits corresponding to
+ * PSA_ALG_MAC_TRUNCATION_MASK encode the length to which the MAC is
+ * truncated. As an exception, the value 0 means the untruncated algorithm,
+ * whatever its length is. The length is encoded in 6 bits, so it can
+ * reach up to 63; the largest MAC is 64 bytes so its trivial truncation
+ * to full length is correctly encoded as 0 and any non-trivial truncation
+ * is correctly encoded as a value between 1 and 63. */
+#define PSA_ALG_MAC_TRUNCATION_MASK             ((psa_algorithm_t)0x003f0000)
+#define PSA_MAC_TRUNCATION_OFFSET 16
+
+/* In the encoding of a MAC algorithm, the bit corresponding to
+ * #PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG encodes the fact that the algorithm
+ * is a wildcard algorithm. A key with such wildcard algorithm as permitted
+ * algorithm policy can be used with any algorithm corresponding to the
+ * same base class and having a (potentially truncated) MAC length greater or
+ * equal than the one encoded in #PSA_ALG_MAC_TRUNCATION_MASK. */
+#define PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG   ((psa_algorithm_t)0x00008000)
+
+/** Macro to build a truncated MAC algorithm.
+ *
+ * A truncated MAC algorithm is identical to the corresponding MAC
+ * algorithm except that the MAC value for the truncated algorithm
+ * consists of only the first \p mac_length bytes of the MAC value
+ * for the untruncated algorithm.
+ *
+ * \note    This macro may allow constructing algorithm identifiers that
+ *          are not valid, either because the specified length is larger
+ *          than the untruncated MAC or because the specified length is
+ *          smaller than permitted by the implementation.
+ *
+ * \note    It is implementation-defined whether a truncated MAC that
+ *          is truncated to the same length as the MAC of the untruncated
+ *          algorithm is considered identical to the untruncated algorithm
+ *          for policy comparison purposes.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true). This may be a truncated or untruncated
+ *                      MAC algorithm.
+ * \param mac_length    Desired length of the truncated MAC in bytes.
+ *                      This must be at most the full length of the MAC
+ *                      and must be at least an implementation-specified
+ *                      minimum. The implementation-specified minimum
+ *                      shall not be zero.
+ *
+ * \return              The corresponding MAC algorithm with the specified
+ *                      length.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm or if \p mac_length is too small or
+ *                      too large for the specified MAC algorithm.
+ */
+#define PSA_ALG_TRUNCATED_MAC(mac_alg, mac_length)              \
+    (((mac_alg) & ~(PSA_ALG_MAC_TRUNCATION_MASK |               \
+                    PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG)) |   \
+     ((mac_length) << PSA_MAC_TRUNCATION_OFFSET & PSA_ALG_MAC_TRUNCATION_MASK))
+
+/** Macro to build the base MAC algorithm corresponding to a truncated
+ * MAC algorithm.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true). This may be a truncated or untruncated
+ *                      MAC algorithm.
+ *
+ * \return              The corresponding base MAC algorithm.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm.
+ */
+#define PSA_ALG_FULL_LENGTH_MAC(mac_alg)                        \
+    ((mac_alg) & ~(PSA_ALG_MAC_TRUNCATION_MASK |                \
+                   PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG))
+
+/** Length to which a MAC algorithm is truncated.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true).
+ *
+ * \return              Length of the truncated MAC in bytes.
+ * \return              0 if \p mac_alg is a non-truncated MAC algorithm.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm.
+ */
+#define PSA_MAC_TRUNCATED_LENGTH(mac_alg)                               \
+    (((mac_alg) & PSA_ALG_MAC_TRUNCATION_MASK) >> PSA_MAC_TRUNCATION_OFFSET)
+
+/** Macro to build a MAC minimum-MAC-length wildcard algorithm.
+ *
+ * A minimum-MAC-length MAC wildcard algorithm permits all MAC algorithms
+ * sharing the same base algorithm, and where the (potentially truncated) MAC
+ * length of the specific algorithm is equal to or larger then the wildcard
+ * algorithm's minimum MAC length.
+ *
+ * \note    When setting the minimum required MAC length to less than the
+ *          smallest MAC length allowed by the base algorithm, this effectively
+ *          becomes an 'any-MAC-length-allowed' policy for that base algorithm.
+ *
+ * \param mac_alg         A MAC algorithm identifier (value of type
+ *                        #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                        is true).
+ * \param min_mac_length  Desired minimum length of the message authentication
+ *                        code in bytes. This must be at most the untruncated
+ *                        length of the MAC and must be at least 1.
+ *
+ * \return                The corresponding MAC wildcard algorithm with the
+ *                        specified minimum length.
+ * \return                Unspecified if \p mac_alg is not a supported MAC
+ *                        algorithm or if \p min_mac_length is less than 1 or
+ *                        too large for the specified MAC algorithm.
+ */
+#define PSA_ALG_AT_LEAST_THIS_LENGTH_MAC(mac_alg, min_mac_length)   \
+    ( PSA_ALG_TRUNCATED_MAC(mac_alg, min_mac_length) |              \
+      PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG )
+
+#define PSA_ALG_CIPHER_MAC_BASE                 ((psa_algorithm_t)0x03c00000)
+/** The CBC-MAC construction over a block cipher
+ *
+ * \warning CBC-MAC is insecure in many cases.
+ * A more secure mode, such as #PSA_ALG_CMAC, is recommended.
+ */
+#define PSA_ALG_CBC_MAC                         ((psa_algorithm_t)0x03c00100)
+/** The CMAC construction over a block cipher */
+#define PSA_ALG_CMAC                            ((psa_algorithm_t)0x03c00200)
+
+/** Whether the specified algorithm is a MAC algorithm based on a block cipher.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a MAC algorithm based on a block cipher, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_BLOCK_CIPHER_MAC(alg)                                \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_MAC_SUBCATEGORY_MASK)) == \
+     PSA_ALG_CIPHER_MAC_BASE)
+
+#define PSA_ALG_CIPHER_STREAM_FLAG              ((psa_algorithm_t)0x00800000)
+#define PSA_ALG_CIPHER_FROM_BLOCK_FLAG          ((psa_algorithm_t)0x00400000)
+
+/** Whether the specified algorithm is a stream cipher.
+ *
+ * A stream cipher is a symmetric cipher that encrypts or decrypts messages
+ * by applying a bitwise-xor with a stream of bytes that is generated
+ * from a key.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a stream cipher algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier or if it is not a symmetric cipher algorithm.
+ */
+#define PSA_ALG_IS_STREAM_CIPHER(alg)            \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_CIPHER_STREAM_FLAG)) == \
+        (PSA_ALG_CATEGORY_CIPHER | PSA_ALG_CIPHER_STREAM_FLAG))
+
+/** The stream cipher mode of a stream cipher algorithm.
+ *
+ * The underlying stream cipher is determined by the key type.
+ * - To use ChaCha20, use a key type of #PSA_KEY_TYPE_CHACHA20.
+ * - To use ARC4, use a key type of #PSA_KEY_TYPE_ARC4.
+ */
+#define PSA_ALG_STREAM_CIPHER                   ((psa_algorithm_t)0x04800100)
+
+/** The CTR stream cipher mode.
+ *
+ * CTR is a stream cipher which is built from a block cipher.
+ * The underlying block cipher is determined by the key type.
+ * For example, to use AES-128-CTR, use this algorithm with
+ * a key of type #PSA_KEY_TYPE_AES and a length of 128 bits (16 bytes).
+ */
+#define PSA_ALG_CTR                             ((psa_algorithm_t)0x04c01000)
+
+/** The CFB stream cipher mode.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_CFB                             ((psa_algorithm_t)0x04c01100)
+
+/** The OFB stream cipher mode.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_OFB                             ((psa_algorithm_t)0x04c01200)
+
+/** The XTS cipher mode.
+ *
+ * XTS is a cipher mode which is built from a block cipher. It requires at
+ * least one full block of input, but beyond this minimum the input
+ * does not need to be a whole number of blocks.
+ */
+#define PSA_ALG_XTS                             ((psa_algorithm_t)0x0440ff00)
+
+/** The Electronic Code Book (ECB) mode of a block cipher, with no padding.
+ *
+ * \warning ECB mode does not protect the confidentiality of the encrypted data
+ * except in extremely narrow circumstances. It is recommended that applications
+ * only use ECB if they need to construct an operating mode that the
+ * implementation does not provide. Implementations are encouraged to provide
+ * the modes that applications need in preference to supporting direct access
+ * to ECB.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This symmetric cipher mode can only be used with messages whose lengths are a
+ * multiple of the block size of the chosen block cipher.
+ *
+ * ECB mode does not accept an initialization vector (IV). When using a
+ * multi-part cipher operation with this algorithm, psa_cipher_generate_iv()
+ * and psa_cipher_set_iv() must not be called.
+ */
+#define PSA_ALG_ECB_NO_PADDING                  ((psa_algorithm_t)0x04404400)
+
+/** The CBC block cipher chaining mode, with no padding.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This symmetric cipher mode can only be used with messages whose lengths
+ * are whole number of blocks for the chosen block cipher.
+ */
+#define PSA_ALG_CBC_NO_PADDING                  ((psa_algorithm_t)0x04404000)
+
+/** The CBC block cipher chaining mode with PKCS#7 padding.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This is the padding method defined by PKCS#7 (RFC 2315) &sect;10.3.
+ */
+#define PSA_ALG_CBC_PKCS7                       ((psa_algorithm_t)0x04404100)
+
+#define PSA_ALG_AEAD_FROM_BLOCK_FLAG            ((psa_algorithm_t)0x00400000)
+
+/** Whether the specified algorithm is an AEAD mode on a block cipher.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an AEAD algorithm which is an AEAD mode based on
+ *         a block cipher, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg)    \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_AEAD_FROM_BLOCK_FLAG)) == \
+     (PSA_ALG_CATEGORY_AEAD | PSA_ALG_AEAD_FROM_BLOCK_FLAG))
+
+/** The CCM authenticated encryption algorithm.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_CCM                             ((psa_algorithm_t)0x05500100)
+
+/** The GCM authenticated encryption algorithm.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_GCM                             ((psa_algorithm_t)0x05500200)
+
+/** The Chacha20-Poly1305 AEAD algorithm.
+ *
+ * The ChaCha20_Poly1305 construction is defined in RFC 7539.
+ *
+ * Implementations must support 12-byte nonces, may support 8-byte nonces,
+ * and should reject other sizes.
+ *
+ * Implementations must support 16-byte tags and should reject other sizes.
+ */
+#define PSA_ALG_CHACHA20_POLY1305               ((psa_algorithm_t)0x05100500)
+
+/* In the encoding of a AEAD algorithm, the bits corresponding to
+ * PSA_ALG_AEAD_TAG_LENGTH_MASK encode the length of the AEAD tag.
+ * The constants for default lengths follow this encoding.
+ */
+#define PSA_ALG_AEAD_TAG_LENGTH_MASK            ((psa_algorithm_t)0x003f0000)
+#define PSA_AEAD_TAG_LENGTH_OFFSET 16
+
+/* In the encoding of an AEAD algorithm, the bit corresponding to
+ * #PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG encodes the fact that the algorithm
+ * is a wildcard algorithm. A key with such wildcard algorithm as permitted
+ * algorithm policy can be used with any algorithm corresponding to the
+ * same base class and having a tag length greater than or equal to the one
+ * encoded in #PSA_ALG_AEAD_TAG_LENGTH_MASK. */
+#define PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG  ((psa_algorithm_t)0x00008000)
+
+/** Macro to build a shortened AEAD algorithm.
+ *
+ * A shortened AEAD algorithm is similar to the corresponding AEAD
+ * algorithm, but has an authentication tag that consists of fewer bytes.
+ * Depending on the algorithm, the tag length may affect the calculation
+ * of the ciphertext.
+ *
+ * \param aead_alg      An AEAD algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_AEAD(\p aead_alg)
+ *                      is true).
+ * \param tag_length    Desired length of the authentication tag in bytes.
+ *
+ * \return              The corresponding AEAD algorithm with the specified
+ *                      length.
+ * \return              Unspecified if \p aead_alg is not a supported
+ *                      AEAD algorithm or if \p tag_length is not valid
+ *                      for the specified AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, tag_length)           \
+    (((aead_alg) & ~(PSA_ALG_AEAD_TAG_LENGTH_MASK |                     \
+                     PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG)) |         \
+     ((tag_length) << PSA_AEAD_TAG_LENGTH_OFFSET &                      \
+      PSA_ALG_AEAD_TAG_LENGTH_MASK))
+
+/** Retrieve the tag length of a specified AEAD algorithm
+ *
+ * \param aead_alg      An AEAD algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_AEAD(\p aead_alg)
+ *                      is true).
+ *
+ * \return              The tag length specified by the input algorithm.
+ * \return              Unspecified if \p aead_alg is not a supported
+ *                      AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_GET_TAG_LENGTH(aead_alg)                           \
+    (((aead_alg) & PSA_ALG_AEAD_TAG_LENGTH_MASK) >>                     \
+      PSA_AEAD_TAG_LENGTH_OFFSET )
+
+/** Calculate the corresponding AEAD algorithm with the default tag length.
+ *
+ * \param aead_alg      An AEAD algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_AEAD(\p aead_alg) is true).
+ *
+ * \return              The corresponding AEAD algorithm with the default
+ *                      tag length for that algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG(aead_alg)                   \
+    (                                                                    \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_CCM) \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_GCM) \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_CHACHA20_POLY1305) \
+        0)
+#define PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, ref)         \
+    PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, 0) ==                      \
+    PSA_ALG_AEAD_WITH_SHORTENED_TAG(ref, 0) ?                            \
+    ref :
+
+/** Macro to build an AEAD minimum-tag-length wildcard algorithm.
+ *
+ * A minimum-tag-length AEAD wildcard algorithm permits all AEAD algorithms
+ * sharing the same base algorithm, and where the tag length of the specific
+ * algorithm is equal to or larger then the minimum tag length specified by the
+ * wildcard algorithm.
+ *
+ * \note    When setting the minimum required tag length to less than the
+ *          smallest tag length allowed by the base algorithm, this effectively
+ *          becomes an 'any-tag-length-allowed' policy for that base algorithm.
+ *
+ * \param aead_alg        An AEAD algorithm identifier (value of type
+ *                        #psa_algorithm_t such that
+ *                        #PSA_ALG_IS_AEAD(\p aead_alg) is true).
+ * \param min_tag_length  Desired minimum length of the authentication tag in
+ *                        bytes. This must be at least 1 and at most the largest
+ *                        allowed tag length of the algorithm.
+ *
+ * \return                The corresponding AEAD wildcard algorithm with the
+ *                        specified minimum length.
+ * \return                Unspecified if \p aead_alg is not a supported
+ *                        AEAD algorithm or if \p min_tag_length is less than 1
+ *                        or too large for the specified AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_AT_LEAST_THIS_LENGTH_TAG(aead_alg, min_tag_length) \
+    ( PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, min_tag_length) |            \
+      PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG )
+
+#define PSA_ALG_RSA_PKCS1V15_SIGN_BASE          ((psa_algorithm_t)0x06000200)
+/** RSA PKCS#1 v1.5 signature with hashing.
+ *
+ * This is the signature scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSASSA-PKCS1-v1_5.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PKCS#1 v1.5 signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PKCS1V15_SIGN(hash_alg)                             \
+    (PSA_ALG_RSA_PKCS1V15_SIGN_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** Raw PKCS#1 v1.5 signature.
+ *
+ * The input to this algorithm is the DigestInfo structure used by
+ * RFC 8017 (PKCS#1: RSA Cryptography Specifications), &sect;9.2
+ * steps 3&ndash;6.
+ */
+#define PSA_ALG_RSA_PKCS1V15_SIGN_RAW PSA_ALG_RSA_PKCS1V15_SIGN_BASE
+#define PSA_ALG_IS_RSA_PKCS1V15_SIGN(alg)                               \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PKCS1V15_SIGN_BASE)
+
+#define PSA_ALG_RSA_PSS_BASE               ((psa_algorithm_t)0x06000300)
+#define PSA_ALG_RSA_PSS_ANY_SALT_BASE      ((psa_algorithm_t)0x06001300)
+/** RSA PSS signature with hashing.
+ *
+ * This is the signature scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSASSA-PSS, with the message generation function MGF1, and with
+ * a salt length equal to the length of the hash. The specified
+ * hash algorithm is used to hash the input message, to create the
+ * salted hash, and for the mask generation.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PSS signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PSS(hash_alg)                               \
+    (PSA_ALG_RSA_PSS_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** RSA PSS signature with hashing with relaxed verification.
+ *
+ * This algorithm has the same behavior as #PSA_ALG_RSA_PSS when signing,
+ * but allows an arbitrary salt length (including \c 0) when verifying a
+ * signature.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PSS signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PSS_ANY_SALT(hash_alg)                      \
+    (PSA_ALG_RSA_PSS_ANY_SALT_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is RSA PSS with standard salt.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS_STANDARD_SALT(alg)                   \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PSS_BASE)
+
+/** Whether the specified algorithm is RSA PSS with any salt.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS_ANY_SALT_BASE(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS_ANY_SALT(alg)                                \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PSS_ANY_SALT_BASE)
+
+/** Whether the specified algorithm is RSA PSS.
+ *
+ * This includes any of the RSA PSS algorithm variants, regardless of the
+ * constraints on salt length.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS(\c hash_alg) or
+ *                      #PSA_ALG_RSA_PSS_ANY_SALT_BASE(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS(alg)                                 \
+    (PSA_ALG_IS_RSA_PSS_STANDARD_SALT(alg) ||                   \
+     PSA_ALG_IS_RSA_PSS_ANY_SALT(alg))
+
+#define PSA_ALG_ECDSA_BASE                      ((psa_algorithm_t)0x06000600)
+/** ECDSA signature with hashing.
+ *
+ * This is the ECDSA signature scheme defined by ANSI X9.62,
+ * with a random per-message secret number (*k*).
+ *
+ * The representation of the signature as a byte string consists of
+ * the concatentation of the signature values *r* and *s*. Each of
+ * *r* and *s* is encoded as an *N*-octet string, where *N* is the length
+ * of the base point of the curve in octets. Each value is represented
+ * in big-endian order (most significant octet first).
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding ECDSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_ECDSA(hash_alg)                                 \
+    (PSA_ALG_ECDSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** ECDSA signature without hashing.
+ *
+ * This is the same signature scheme as #PSA_ALG_ECDSA(), but
+ * without specifying a hash algorithm. This algorithm may only be
+ * used to sign or verify a sequence of bytes that should be an
+ * already-calculated hash. Note that the input is padded with
+ * zeros on the left or truncated on the left as required to fit
+ * the curve size.
+ */
+#define PSA_ALG_ECDSA_ANY PSA_ALG_ECDSA_BASE
+#define PSA_ALG_DETERMINISTIC_ECDSA_BASE        ((psa_algorithm_t)0x06000700)
+/** Deterministic ECDSA signature with hashing.
+ *
+ * This is the deterministic ECDSA signature scheme defined by RFC 6979.
+ *
+ * The representation of a signature is the same as with #PSA_ALG_ECDSA().
+ *
+ * Note that when this algorithm is used for verification, signatures
+ * made with randomized ECDSA (#PSA_ALG_ECDSA(\p hash_alg)) with the
+ * same private key are accepted. In other words,
+ * #PSA_ALG_DETERMINISTIC_ECDSA(\p hash_alg) differs from
+ * #PSA_ALG_ECDSA(\p hash_alg) only for signature, not for verification.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding deterministic ECDSA signature
+ *                      algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DETERMINISTIC_ECDSA(hash_alg)                           \
+    (PSA_ALG_DETERMINISTIC_ECDSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_ECDSA_DETERMINISTIC_FLAG        ((psa_algorithm_t)0x00000100)
+#define PSA_ALG_IS_ECDSA(alg)                                           \
+    (((alg) & ~PSA_ALG_HASH_MASK & ~PSA_ALG_ECDSA_DETERMINISTIC_FLAG) ==  \
+     PSA_ALG_ECDSA_BASE)
+#define PSA_ALG_ECDSA_IS_DETERMINISTIC(alg)             \
+    (((alg) & PSA_ALG_ECDSA_DETERMINISTIC_FLAG) != 0)
+#define PSA_ALG_IS_DETERMINISTIC_ECDSA(alg)                             \
+    (PSA_ALG_IS_ECDSA(alg) && PSA_ALG_ECDSA_IS_DETERMINISTIC(alg))
+#define PSA_ALG_IS_RANDOMIZED_ECDSA(alg)                                \
+    (PSA_ALG_IS_ECDSA(alg) && !PSA_ALG_ECDSA_IS_DETERMINISTIC(alg))
+
+/** Edwards-curve digital signature algorithm without prehashing (PureEdDSA),
+ * using standard parameters.
+ *
+ * Contexts are not supported in the current version of this specification
+ * because there is no suitable signature interface that can take the
+ * context as a parameter. A future version of this specification may add
+ * suitable functions and extend this algorithm to support contexts.
+ *
+ * PureEdDSA requires an elliptic curve key on a twisted Edwards curve.
+ * In this specification, the following curves are supported:
+ * - #PSA_ECC_FAMILY_TWISTED_EDWARDS, 255-bit: Ed25519 as specified
+ *   in RFC 8032.
+ *   The curve is Edwards25519.
+ *   The hash function used internally is SHA-512.
+ * - #PSA_ECC_FAMILY_TWISTED_EDWARDS, 448-bit: Ed448 as specified
+ *   in RFC 8032.
+ *   The curve is Edwards448.
+ *   The hash function used internally is the first 114 bytes of the
+ *   SHAKE256 output.
+ *
+ * This algorithm can be used with psa_sign_message() and
+ * psa_verify_message(). Since there is no prehashing, it cannot be used
+ * with psa_sign_hash() or psa_verify_hash().
+ *
+ * The signature format is the concatenation of R and S as defined by
+ * RFC 8032 §5.1.6 and §5.2.6 (a 64-byte string for Ed25519, a 114-byte
+ * string for Ed448).
+ */
+#define PSA_ALG_PURE_EDDSA                      ((psa_algorithm_t)0x06000800)
+
+#define PSA_ALG_HASH_EDDSA_BASE                 ((psa_algorithm_t)0x06000900)
+#define PSA_ALG_IS_HASH_EDDSA(alg)              \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_HASH_EDDSA_BASE)
+
+/** Edwards-curve digital signature algorithm with prehashing (HashEdDSA),
+ * using SHA-512 and the Edwards25519 curve.
+ *
+ * See #PSA_ALG_PURE_EDDSA regarding context support and the signature format.
+ *
+ * This algorithm is Ed25519 as specified in RFC 8032.
+ * The curve is Edwards25519.
+ * The prehash is SHA-512.
+ * The hash function used internally is SHA-512.
+ *
+ * This is a hash-and-sign algorithm: to calculate a signature,
+ * you can either:
+ * - call psa_sign_message() on the message;
+ * - or calculate the SHA-512 hash of the message
+ *   with psa_hash_compute()
+ *   or with a multi-part hash operation started with psa_hash_setup(),
+ *   using the hash algorithm #PSA_ALG_SHA_512,
+ *   then sign the calculated hash with psa_sign_hash().
+ * Verifying a signature is similar, using psa_verify_message() or
+ * psa_verify_hash() instead of the signature function.
+ */
+#define PSA_ALG_ED25519PH                               \
+    (PSA_ALG_HASH_EDDSA_BASE | (PSA_ALG_SHA_512 & PSA_ALG_HASH_MASK))
+
+/** Edwards-curve digital signature algorithm with prehashing (HashEdDSA),
+ * using SHAKE256 and the Edwards448 curve.
+ *
+ * See #PSA_ALG_PURE_EDDSA regarding context support and the signature format.
+ *
+ * This algorithm is Ed448 as specified in RFC 8032.
+ * The curve is Edwards448.
+ * The prehash is the first 64 bytes of the SHAKE256 output.
+ * The hash function used internally is the first 114 bytes of the
+ * SHAKE256 output.
+ *
+ * This is a hash-and-sign algorithm: to calculate a signature,
+ * you can either:
+ * - call psa_sign_message() on the message;
+ * - or calculate the first 64 bytes of the SHAKE256 output of the message
+ *   with psa_hash_compute()
+ *   or with a multi-part hash operation started with psa_hash_setup(),
+ *   using the hash algorithm #PSA_ALG_SHAKE256_512,
+ *   then sign the calculated hash with psa_sign_hash().
+ * Verifying a signature is similar, using psa_verify_message() or
+ * psa_verify_hash() instead of the signature function.
+ */
+#define PSA_ALG_ED448PH                                 \
+    (PSA_ALG_HASH_EDDSA_BASE | (PSA_ALG_SHAKE256_512 & PSA_ALG_HASH_MASK))
+
+/* Default definition, to be overridden if the library is extended with
+ * more hash-and-sign algorithms that we want to keep out of this header
+ * file. */
+#define PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg) 0
+
+/** Whether the specified algorithm is a signature algorithm that can be used
+ * with psa_sign_hash() and psa_verify_hash().
+ *
+ * This encompasses all strict hash-and-sign algorithms categorized by
+ * PSA_ALG_IS_HASH_AND_SIGN(), as well as algorithms that follow the
+ * paradigm more loosely:
+ * - #PSA_ALG_RSA_PKCS1V15_SIGN_RAW (expects its input to be an encoded hash)
+ * - #PSA_ALG_ECDSA_ANY (doesn't specify what kind of hash the input is)
+ *
+ * \param alg An algorithm identifier (value of type psa_algorithm_t).
+ *
+ * \return 1 if alg is a signature algorithm that can be used to sign a
+ *         hash. 0 if alg is a signature algorithm that can only be used
+ *         to sign a message. 0 if alg is not a signature algorithm.
+ *         This macro can return either 0 or 1 if alg is not a
+ *         supported algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN_HASH(alg)                                       \
+    (PSA_ALG_IS_RSA_PSS(alg) || PSA_ALG_IS_RSA_PKCS1V15_SIGN(alg) ||    \
+     PSA_ALG_IS_ECDSA(alg) || PSA_ALG_IS_HASH_EDDSA(alg) ||             \
+     PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg))
+
+/** Whether the specified algorithm is a signature algorithm that can be used
+ * with psa_sign_message() and psa_verify_message().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if alg is a signature algorithm that can be used to sign a
+ *         message. 0 if \p alg is a signature algorithm that can only be used
+ *         to sign an already-calculated hash. 0 if \p alg is not a signature
+ *         algorithm. This macro can return either 0 or 1 if \p alg is not a
+ *         supported algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN_MESSAGE(alg)                                    \
+    (PSA_ALG_IS_SIGN_HASH(alg) || (alg) == PSA_ALG_PURE_EDDSA )
+
+/** Whether the specified algorithm is a hash-and-sign algorithm.
+ *
+ * Hash-and-sign algorithms are asymmetric (public-key) signature algorithms
+ * structured in two parts: first the calculation of a hash in a way that
+ * does not depend on the key, then the calculation of a signature from the
+ * hash value and the key. Hash-and-sign algorithms encode the hash
+ * used for the hashing step, and you can call #PSA_ALG_SIGN_GET_HASH
+ * to extract this algorithm.
+ *
+ * Thus, for a hash-and-sign algorithm,
+ * `psa_sign_message(key, alg, input, ...)` is equivalent to
+ * ```
+ * psa_hash_compute(PSA_ALG_SIGN_GET_HASH(alg), input, ..., hash, ...);
+ * psa_sign_hash(key, alg, hash, ..., signature, ...);
+ * ```
+ * Most usefully, separating the hash from the signature allows the hash
+ * to be calculated in multiple steps with psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(). Likewise psa_verify_message() is equivalent to
+ * calculating the hash and then calling psa_verify_hash().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a hash-and-sign algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HASH_AND_SIGN(alg)                                   \
+    (PSA_ALG_IS_SIGN_HASH(alg) &&                                       \
+     ((alg) & PSA_ALG_HASH_MASK) != 0)
+
+/** Get the hash used by a hash-and-sign signature algorithm.
+ *
+ * A hash-and-sign algorithm is a signature algorithm which is
+ * composed of two phases: first a hashing phase which does not use
+ * the key and produces a hash of the input message, then a signing
+ * phase which only uses the hash and the key and not the message
+ * itself.
+ *
+ * \param alg   A signature algorithm (\c PSA_ALG_XXX value such that
+ *              #PSA_ALG_IS_SIGN(\p alg) is true).
+ *
+ * \return      The underlying hash algorithm if \p alg is a hash-and-sign
+ *              algorithm.
+ * \return      0 if \p alg is a signature algorithm that does not
+ *              follow the hash-and-sign structure.
+ * \return      Unspecified if \p alg is not a signature algorithm or
+ *              if it is not supported by the implementation.
+ */
+#define PSA_ALG_SIGN_GET_HASH(alg)                                     \
+    (PSA_ALG_IS_HASH_AND_SIGN(alg) ?                                   \
+     ((alg) & PSA_ALG_HASH_MASK) | PSA_ALG_CATEGORY_HASH :             \
+     0)
+
+/** RSA PKCS#1 v1.5 encryption.
+ */
+#define PSA_ALG_RSA_PKCS1V15_CRYPT              ((psa_algorithm_t)0x07000200)
+
+#define PSA_ALG_RSA_OAEP_BASE                   ((psa_algorithm_t)0x07000300)
+/** RSA OAEP encryption.
+ *
+ * This is the encryption scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSAES-OAEP, with the message generation function MGF1.
+ *
+ * \param hash_alg      The hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true) to use
+ *                      for MGF1.
+ *
+ * \return              The corresponding RSA OAEP encryption algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_OAEP(hash_alg)                              \
+    (PSA_ALG_RSA_OAEP_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_IS_RSA_OAEP(alg)                                \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_OAEP_BASE)
+#define PSA_ALG_RSA_OAEP_GET_HASH(alg)                          \
+    (PSA_ALG_IS_RSA_OAEP(alg) ?                                 \
+     ((alg) & PSA_ALG_HASH_MASK) | PSA_ALG_CATEGORY_HASH :      \
+     0)
+
+#define PSA_ALG_HKDF_BASE                       ((psa_algorithm_t)0x08000100)
+/** Macro to build an HKDF algorithm.
+ *
+ * For example, `PSA_ALG_HKDF(PSA_ALG_SHA256)` is HKDF using HMAC-SHA-256.
+ *
+ * This key derivation algorithm uses the following inputs:
+ * - #PSA_KEY_DERIVATION_INPUT_SALT is the salt used in the "extract" step.
+ *   It is optional; if omitted, the derivation uses an empty salt.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key used in the "extract" step.
+ * - #PSA_KEY_DERIVATION_INPUT_INFO is the info string used in the "expand" step.
+ * You must pass #PSA_KEY_DERIVATION_INPUT_SALT before #PSA_KEY_DERIVATION_INPUT_SECRET.
+ * You may pass #PSA_KEY_DERIVATION_INPUT_INFO at any time after steup and before
+ * starting to generate output.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding HKDF algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_HKDF(hash_alg)                                  \
+    (PSA_ALG_HKDF_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** Whether the specified algorithm is an HKDF algorithm.
+ *
+ * HKDF is a family of key derivation algorithms that are based on a hash
+ * function and the HMAC construction.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is an HKDF algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_HKDF(alg)                            \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_HKDF_BASE)
+#define PSA_ALG_HKDF_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_TLS12_PRF_BASE                  ((psa_algorithm_t)0x08000200)
+/** Macro to build a TLS-1.2 PRF algorithm.
+ *
+ * TLS 1.2 uses a custom pseudorandom function (PRF) for key schedule,
+ * specified in Section 5 of RFC 5246. It is based on HMAC and can be
+ * used with either SHA-256 or SHA-384.
+ *
+ * This key derivation algorithm uses the following inputs, which must be
+ * passed in the order given here:
+ * - #PSA_KEY_DERIVATION_INPUT_SEED is the seed.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key.
+ * - #PSA_KEY_DERIVATION_INPUT_LABEL is the label.
+ *
+ * For the application to TLS-1.2 key expansion, the seed is the
+ * concatenation of ServerHello.Random + ClientHello.Random,
+ * and the label is "key expansion".
+ *
+ * For example, `PSA_ALG_TLS12_PRF(PSA_ALG_SHA256)` represents the
+ * TLS 1.2 PRF using HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding TLS-1.2 PRF algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_TLS12_PRF(hash_alg)                                  \
+    (PSA_ALG_TLS12_PRF_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is a TLS-1.2 PRF algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a TLS-1.2 PRF algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_TLS12_PRF(alg)                                    \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_TLS12_PRF_BASE)
+#define PSA_ALG_TLS12_PRF_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_TLS12_PSK_TO_MS_BASE            ((psa_algorithm_t)0x08000300)
+/** Macro to build a TLS-1.2 PSK-to-MasterSecret algorithm.
+ *
+ * In a pure-PSK handshake in TLS 1.2, the master secret is derived
+ * from the PreSharedKey (PSK) through the application of padding
+ * (RFC 4279, Section 2) and the TLS-1.2 PRF (RFC 5246, Section 5).
+ * The latter is based on HMAC and can be used with either SHA-256
+ * or SHA-384.
+ *
+ * This key derivation algorithm uses the following inputs, which must be
+ * passed in the order given here:
+ * - #PSA_KEY_DERIVATION_INPUT_SEED is the seed.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key.
+ * - #PSA_KEY_DERIVATION_INPUT_LABEL is the label.
+ *
+ * For the application to TLS-1.2, the seed (which is
+ * forwarded to the TLS-1.2 PRF) is the concatenation of the
+ * ClientHello.Random + ServerHello.Random,
+ * and the label is "master secret" or "extended master secret".
+ *
+ * For example, `PSA_ALG_TLS12_PSK_TO_MS(PSA_ALG_SHA256)` represents the
+ * TLS-1.2 PSK to MasterSecret derivation PRF using HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding TLS-1.2 PSK to MS algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_TLS12_PSK_TO_MS(hash_alg)                                  \
+    (PSA_ALG_TLS12_PSK_TO_MS_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is a TLS-1.2 PSK to MS algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a TLS-1.2 PSK to MS algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_TLS12_PSK_TO_MS(alg)                                    \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_TLS12_PSK_TO_MS_BASE)
+#define PSA_ALG_TLS12_PSK_TO_MS_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_KEY_DERIVATION_MASK             ((psa_algorithm_t)0xfe00ffff)
+#define PSA_ALG_KEY_AGREEMENT_MASK              ((psa_algorithm_t)0xffff0000)
+
+/** Macro to build a combined algorithm that chains a key agreement with
+ * a key derivation.
+ *
+ * \param ka_alg        A key agreement algorithm (\c PSA_ALG_XXX value such
+ *                      that #PSA_ALG_IS_KEY_AGREEMENT(\p ka_alg) is true).
+ * \param kdf_alg       A key derivation algorithm (\c PSA_ALG_XXX value such
+ *                      that #PSA_ALG_IS_KEY_DERIVATION(\p kdf_alg) is true).
+ *
+ * \return              The corresponding key agreement and derivation
+ *                      algorithm.
+ * \return              Unspecified if \p ka_alg is not a supported
+ *                      key agreement algorithm or \p kdf_alg is not a
+ *                      supported key derivation algorithm.
+ */
+#define PSA_ALG_KEY_AGREEMENT(ka_alg, kdf_alg)  \
+    ((ka_alg) | (kdf_alg))
+
+#define PSA_ALG_KEY_AGREEMENT_GET_KDF(alg)                              \
+    (((alg) & PSA_ALG_KEY_DERIVATION_MASK) | PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+#define PSA_ALG_KEY_AGREEMENT_GET_BASE(alg)                             \
+    (((alg) & PSA_ALG_KEY_AGREEMENT_MASK) | PSA_ALG_CATEGORY_KEY_AGREEMENT)
+
+/** Whether the specified algorithm is a raw key agreement algorithm.
+ *
+ * A raw key agreement algorithm is one that does not specify
+ * a key derivation function.
+ * Usually, raw key agreement algorithms are constructed directly with
+ * a \c PSA_ALG_xxx macro while non-raw key agreement algorithms are
+ * constructed with #PSA_ALG_KEY_AGREEMENT().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a raw key agreement algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_RAW_KEY_AGREEMENT(alg)                               \
+    (PSA_ALG_IS_KEY_AGREEMENT(alg) &&                                   \
+     PSA_ALG_KEY_AGREEMENT_GET_KDF(alg) == PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+#define PSA_ALG_IS_KEY_DERIVATION_OR_AGREEMENT(alg)     \
+    ((PSA_ALG_IS_KEY_DERIVATION(alg) || PSA_ALG_IS_KEY_AGREEMENT(alg)))
+
+/** The finite-field Diffie-Hellman (DH) key agreement algorithm.
+ *
+ * The shared secret produced by key agreement is
+ * `g^{ab}` in big-endian format.
+ * It is `ceiling(m / 8)` bytes long where `m` is the size of the prime `p`
+ * in bits.
+ */
+#define PSA_ALG_FFDH                            ((psa_algorithm_t)0x09010000)
+
+/** Whether the specified algorithm is a finite field Diffie-Hellman algorithm.
+ *
+ * This includes the raw finite field Diffie-Hellman algorithm as well as
+ * finite-field Diffie-Hellman followed by any supporter key derivation
+ * algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a finite field Diffie-Hellman algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key agreement algorithm identifier.
+ */
+#define PSA_ALG_IS_FFDH(alg) \
+    (PSA_ALG_KEY_AGREEMENT_GET_BASE(alg) == PSA_ALG_FFDH)
+
+/** The elliptic curve Diffie-Hellman (ECDH) key agreement algorithm.
+ *
+ * The shared secret produced by key agreement is the x-coordinate of
+ * the shared secret point. It is always `ceiling(m / 8)` bytes long where
+ * `m` is the bit size associated with the curve, i.e. the bit size of the
+ * order of the curve's coordinate field. When `m` is not a multiple of 8,
+ * the byte containing the most significant bit of the shared secret
+ * is padded with zero bits. The byte order is either little-endian
+ * or big-endian depending on the curve type.
+ *
+ * - For Montgomery curves (curve types `PSA_ECC_FAMILY_CURVEXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in little-endian byte order.
+ *   The bit size is 448 for Curve448 and 255 for Curve25519.
+ * - For Weierstrass curves over prime fields (curve types
+ *   `PSA_ECC_FAMILY_SECPXXX` and `PSA_ECC_FAMILY_BRAINPOOL_PXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in big-endian byte order.
+ *   The bit size is `m = ceiling(log_2(p))` for the field `F_p`.
+ * - For Weierstrass curves over binary fields (curve types
+ *   `PSA_ECC_FAMILY_SECTXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in big-endian byte order.
+ *   The bit size is `m` for the field `F_{2^m}`.
+ */
+#define PSA_ALG_ECDH                            ((psa_algorithm_t)0x09020000)
+
+/** Whether the specified algorithm is an elliptic curve Diffie-Hellman
+ * algorithm.
+ *
+ * This includes the raw elliptic curve Diffie-Hellman algorithm as well as
+ * elliptic curve Diffie-Hellman followed by any supporter key derivation
+ * algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is an elliptic curve Diffie-Hellman algorithm,
+ *         0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key agreement algorithm identifier.
+ */
+#define PSA_ALG_IS_ECDH(alg) \
+    (PSA_ALG_KEY_AGREEMENT_GET_BASE(alg) == PSA_ALG_ECDH)
+
+/** Whether the specified algorithm encoding is a wildcard.
+ *
+ * Wildcard values may only be used to set the usage algorithm field in
+ * a policy, not to perform an operation.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a wildcard algorithm encoding.
+ * \return 0 if \c alg is a non-wildcard algorithm encoding (suitable for
+ *         an operation).
+ * \return This macro may return either 0 or 1 if \c alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_WILDCARD(alg)                            \
+    (PSA_ALG_IS_HASH_AND_SIGN(alg) ?                        \
+     PSA_ALG_SIGN_GET_HASH(alg) == PSA_ALG_ANY_HASH :       \
+     PSA_ALG_IS_MAC(alg) ?                                  \
+     (alg & PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG) != 0 :   \
+     PSA_ALG_IS_AEAD(alg) ?                                 \
+     (alg & PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG) != 0 :  \
+     (alg) == PSA_ALG_ANY_HASH)
+
+/**@}*/
+
+/** \defgroup key_lifetimes Key lifetimes
+ * @{
+ */
+
+/** The default lifetime for volatile keys.
+ *
+ * A volatile key only exists as long as the identifier to it is not destroyed.
+ * The key material is guaranteed to be erased on a power reset.
+ *
+ * A key with this lifetime is typically stored in the RAM area of the
+ * PSA Crypto subsystem. However this is an implementation choice.
+ * If an implementation stores data about the key in a non-volatile memory,
+ * it must release all the resources associated with the key and erase the
+ * key material if the calling application terminates.
+ */
+#define PSA_KEY_LIFETIME_VOLATILE               ((psa_key_lifetime_t)0x00000000)
+
+/** The default lifetime for persistent keys.
+ *
+ * A persistent key remains in storage until it is explicitly destroyed or
+ * until the corresponding storage area is wiped. This specification does
+ * not define any mechanism to wipe a storage area, but integrations may
+ * provide their own mechanism (for example to perform a factory reset,
+ * to prepare for device refurbishment, or to uninstall an application).
+ *
+ * This lifetime value is the default storage area for the calling
+ * application. Integrations of Mbed TLS may support other persistent lifetimes.
+ * See ::psa_key_lifetime_t for more information.
+ */
+#define PSA_KEY_LIFETIME_PERSISTENT             ((psa_key_lifetime_t)0x00000001)
+
+/** The persistence level of volatile keys.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_VOLATILE            ((psa_key_persistence_t)0x00)
+
+/** The default persistence level for persistent keys.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_DEFAULT             ((psa_key_persistence_t)0x01)
+
+/** A persistence level indicating that a key is never destroyed.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_READ_ONLY           ((psa_key_persistence_t)0xff)
+
+#define PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime)      \
+    ((psa_key_persistence_t)((lifetime) & 0x000000ff))
+
+#define PSA_KEY_LIFETIME_GET_LOCATION(lifetime)      \
+    ((psa_key_location_t)((lifetime) >> 8))
+
+/** Whether a key lifetime indicates that the key is volatile.
+ *
+ * A volatile key is automatically destroyed by the implementation when
+ * the application instance terminates. In particular, a volatile key
+ * is automatically destroyed on a power reset of the device.
+ *
+ * A key that is not volatile is persistent. Persistent keys are
+ * preserved until the application explicitly destroys them or until an
+ * implementation-specific device management event occurs (for example,
+ * a factory reset).
+ *
+ * \param lifetime      The lifetime value to query (value of type
+ *                      ::psa_key_lifetime_t).
+ *
+ * \return \c 1 if the key is volatile, otherwise \c 0.
+ */
+#define PSA_KEY_LIFETIME_IS_VOLATILE(lifetime)  \
+    (PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime) == \
+     PSA_KEY_PERSISTENCE_VOLATILE)
+
+/** Whether a key lifetime indicates that the key is read-only.
+ *
+ * Read-only keys cannot be created or destroyed through the PSA Crypto API.
+ * They must be created through platform-specific means that bypass the API.
+ *
+ * Some platforms may offer ways to destroy read-only keys. For example,
+ * consider a platform with multiple levels of privilege, where a
+ * low-privilege application can use a key but is not allowed to destroy
+ * it, and the platform exposes the key to the application with a read-only
+ * lifetime. High-privilege code can destroy the key even though the
+ * application sees the key as read-only.
+ *
+ * \param lifetime      The lifetime value to query (value of type
+ *                      ::psa_key_lifetime_t).
+ *
+ * \return \c 1 if the key is read-only, otherwise \c 0.
+ */
+#define PSA_KEY_LIFETIME_IS_READ_ONLY(lifetime)  \
+    (PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime) == \
+     PSA_KEY_PERSISTENCE_READ_ONLY)
+
+/** Construct a lifetime from a persistence level and a location.
+ *
+ * \param persistence   The persistence level
+ *                      (value of type ::psa_key_persistence_t).
+ * \param location      The location indicator
+ *                      (value of type ::psa_key_location_t).
+ *
+ * \return The constructed lifetime value.
+ */
+#define PSA_KEY_LIFETIME_FROM_PERSISTENCE_AND_LOCATION(persistence, location) \
+    ((location) << 8 | (persistence))
+
+/** The local storage area for persistent keys.
+ *
+ * This storage area is available on all systems that can store persistent
+ * keys without delegating the storage to a third-party cryptoprocessor.
+ *
+ * See ::psa_key_location_t for more information.
+ */
+#define PSA_KEY_LOCATION_LOCAL_STORAGE          ((psa_key_location_t)0x000000)
+
+#define PSA_KEY_LOCATION_VENDOR_FLAG            ((psa_key_location_t)0x800000)
+
+/** The null key identifier.
+ */
+#define PSA_KEY_ID_NULL                         ((psa_key_id_t)0)
+/** The minimum value for a key identifier chosen by the application.
+ */
+#define PSA_KEY_ID_USER_MIN                     ((psa_key_id_t)0x00000001)
+/** The maximum value for a key identifier chosen by the application.
+ */
+#define PSA_KEY_ID_USER_MAX                     ((psa_key_id_t)0x3fffffff)
+/** The minimum value for a key identifier chosen by the implementation.
+ */
+#define PSA_KEY_ID_VENDOR_MIN                   ((psa_key_id_t)0x40000000)
+/** The maximum value for a key identifier chosen by the implementation.
+ */
+#define PSA_KEY_ID_VENDOR_MAX                   ((psa_key_id_t)0x7fffffff)
+
+
+#if !defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+
+#define MBEDTLS_SVC_KEY_ID_INIT ( (psa_key_id_t)0 )
+#define MBEDTLS_SVC_KEY_ID_GET_KEY_ID( id ) ( id )
+#define MBEDTLS_SVC_KEY_ID_GET_OWNER_ID( id ) ( 0 )
+
+/** Utility to initialize a key identifier at runtime.
+ *
+ * \param unused  Unused parameter.
+ * \param key_id  Identifier of the key.
+ */
+static inline mbedtls_svc_key_id_t mbedtls_svc_key_id_make(
+    unsigned int unused, psa_key_id_t key_id )
+{
+    (void)unused;
+
+    return( key_id );
+}
+
+/** Compare two key identifiers.
+ *
+ * \param id1 First key identifier.
+ * \param id2 Second key identifier.
+ *
+ * \return Non-zero if the two key identifier are equal, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_equal( mbedtls_svc_key_id_t id1,
+                                            mbedtls_svc_key_id_t id2 )
+{
+    return( id1 == id2 );
+}
+
+/** Check whether a key identifier is null.
+ *
+ * \param key Key identifier.
+ *
+ * \return Non-zero if the key identifier is null, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_is_null( mbedtls_svc_key_id_t key )
+{
+    return( key == 0 );
+}
+
+#else /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+#define MBEDTLS_SVC_KEY_ID_INIT ( (mbedtls_svc_key_id_t){ 0, 0 } )
+#define MBEDTLS_SVC_KEY_ID_GET_KEY_ID( id ) ( ( id ).key_id )
+#define MBEDTLS_SVC_KEY_ID_GET_OWNER_ID( id ) ( ( id ).owner )
+
+/** Utility to initialize a key identifier at runtime.
+ *
+ * \param owner_id Identifier of the key owner.
+ * \param key_id   Identifier of the key.
+ */
+static inline mbedtls_svc_key_id_t mbedtls_svc_key_id_make(
+    mbedtls_key_owner_id_t owner_id, psa_key_id_t key_id )
+{
+    return( (mbedtls_svc_key_id_t){ .key_id = key_id,
+                                    .owner = owner_id } );
+}
+
+/** Compare two key identifiers.
+ *
+ * \param id1 First key identifier.
+ * \param id2 Second key identifier.
+ *
+ * \return Non-zero if the two key identifier are equal, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_equal( mbedtls_svc_key_id_t id1,
+                                            mbedtls_svc_key_id_t id2 )
+{
+    return( ( id1.key_id == id2.key_id ) &&
+            mbedtls_key_owner_id_equal( id1.owner, id2.owner ) );
+}
+
+/** Check whether a key identifier is null.
+ *
+ * \param key Key identifier.
+ *
+ * \return Non-zero if the key identifier is null, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_is_null( mbedtls_svc_key_id_t key )
+{
+    return( key.key_id == 0 );
+}
+
+#endif /* !MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/**@}*/
+
+/** \defgroup policy Key policies
+ * @{
+ */
+
+/** Whether the key may be exported.
+ *
+ * A public key or the public part of a key pair may always be exported
+ * regardless of the value of this permission flag.
+ *
+ * If a key does not have export permission, implementations shall not
+ * allow the key to be exported in plain form from the cryptoprocessor,
+ * whether through psa_export_key() or through a proprietary interface.
+ * The key may however be exportable in a wrapped form, i.e. in a form
+ * where it is encrypted by another key.
+ */
+#define PSA_KEY_USAGE_EXPORT                    ((psa_key_usage_t)0x00000001)
+
+/** Whether the key may be copied.
+ *
+ * This flag allows the use of psa_copy_key() to make a copy of the key
+ * with the same policy or a more restrictive policy.
+ *
+ * For lifetimes for which the key is located in a secure element which
+ * enforce the non-exportability of keys, copying a key outside the secure
+ * element also requires the usage flag #PSA_KEY_USAGE_EXPORT.
+ * Copying the key inside the secure element is permitted with just
+ * #PSA_KEY_USAGE_COPY if the secure element supports it.
+ * For keys with the lifetime #PSA_KEY_LIFETIME_VOLATILE or
+ * #PSA_KEY_LIFETIME_PERSISTENT, the usage flag #PSA_KEY_USAGE_COPY
+ * is sufficient to permit the copy.
+ */
+#define PSA_KEY_USAGE_COPY                      ((psa_key_usage_t)0x00000002)
+
+/** Whether the key may be used to encrypt a message.
+ *
+ * This flag allows the key to be used for a symmetric encryption operation,
+ * for an AEAD encryption-and-authentication operation,
+ * or for an asymmetric encryption operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_ENCRYPT                   ((psa_key_usage_t)0x00000100)
+
+/** Whether the key may be used to decrypt a message.
+ *
+ * This flag allows the key to be used for a symmetric decryption operation,
+ * for an AEAD decryption-and-verification operation,
+ * or for an asymmetric decryption operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_DECRYPT                   ((psa_key_usage_t)0x00000200)
+
+/** Whether the key may be used to sign a message.
+ *
+ * This flag allows the key to be used for a MAC calculation operation or for
+ * an asymmetric message signature operation, if otherwise permitted by the
+ * key’s type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_SIGN_MESSAGE              ((psa_key_usage_t)0x00000400)
+
+/** Whether the key may be used to verify a message.
+ *
+ * This flag allows the key to be used for a MAC verification operation or for
+ * an asymmetric message signature verification operation, if otherwise
+ * permitted by the key’s type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_VERIFY_MESSAGE            ((psa_key_usage_t)0x00000800)
+
+/** Whether the key may be used to sign a message.
+ *
+ * This flag allows the key to be used for a MAC calculation operation
+ * or for an asymmetric signature operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_SIGN_HASH                 ((psa_key_usage_t)0x00001000)
+
+/** Whether the key may be used to verify a message signature.
+ *
+ * This flag allows the key to be used for a MAC verification operation
+ * or for an asymmetric signature verification operation,
+ * if otherwise permitted by by the key's type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_VERIFY_HASH               ((psa_key_usage_t)0x00002000)
+
+/** Whether the key may be used to derive other keys.
+ */
+#define PSA_KEY_USAGE_DERIVE                    ((psa_key_usage_t)0x00004000)
+
+/**@}*/
+
+/** \defgroup derivation Key derivation
+ * @{
+ */
+
+/** A secret input for key derivation.
+ *
+ * This should be a key of type #PSA_KEY_TYPE_DERIVE
+ * (passed to psa_key_derivation_input_key())
+ * or the shared secret resulting from a key agreement
+ * (obtained via psa_key_derivation_key_agreement()).
+ *
+ * The secret can also be a direct input (passed to
+ * key_derivation_input_bytes()). In this case, the derivation operation
+ * may not be used to derive keys: the operation will only allow
+ * psa_key_derivation_output_bytes(), not psa_key_derivation_output_key().
+ */
+#define PSA_KEY_DERIVATION_INPUT_SECRET     ((psa_key_derivation_step_t)0x0101)
+
+/** A label for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_LABEL      ((psa_key_derivation_step_t)0x0201)
+
+/** A salt for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_SALT       ((psa_key_derivation_step_t)0x0202)
+
+/** An information string for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_INFO       ((psa_key_derivation_step_t)0x0203)
+
+/** A seed for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_SEED       ((psa_key_derivation_step_t)0x0204)
+
+/**@}*/
+
+/** \defgroup helper_macros Helper macros
+ * @{
+ */
+
+/* Helper macros */
+
+/** Check if two AEAD algorithm identifiers refer to the same AEAD algorithm
+ *  regardless of the tag length they encode.
+ *
+ * \param aead_alg_1 An AEAD algorithm identifier.
+ * \param aead_alg_2 An AEAD algorithm identifier.
+ *
+ * \return           1 if both identifiers refer to the same AEAD algorithm,
+ *                   0 otherwise.
+ *                   Unspecified if neither \p aead_alg_1 nor \p aead_alg_2 are
+ *                   a supported AEAD algorithm.
+ */
+#define MBEDTLS_PSA_ALG_AEAD_EQUAL(aead_alg_1, aead_alg_2) \
+    (!(((aead_alg_1) ^ (aead_alg_2)) & \
+       ~(PSA_ALG_AEAD_TAG_LENGTH_MASK | PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG)))
+
+/**@}*/
+
+#endif /* PSA_CRYPTO_VALUES_H */
diff --git a/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h b/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h
index 9c63118eb57..607d35ffc69 100644
--- a/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h
+++ b/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h
@@ -1,12 +1,13 @@
 /**
  *
- * \brief Default mbedTLS configuration options for esp-idf
+ * \brief Default mbedTLS configuration options for ESP-IDF
  *
  *  This set of compile-time options may be used to enable
  *  or disable features selectively, and reduce the global
  *  memory footprint.
- *
- *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
  *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
@@ -20,8 +21,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  This file is part of mbed TLS (https://tls.mbed.org)
  */
 
 #ifndef ESP_CONFIG_H
@@ -310,18 +309,54 @@
  *
  * \note  This option only works with the default software implementation of
  *        elliptic curve functionality. It is incompatible with
- *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT and MBEDTLS_ECDSA_XXX_ALT.
+ *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT, MBEDTLS_ECDSA_XXX_ALT
+ *        and MBEDTLS_ECDH_LEGACY_CONTEXT.
  */
 #ifdef CONFIG_MBEDTLS_ECP_RESTARTABLE
 #define MBEDTLS_ECP_RESTARTABLE
 #endif
 
+/**
+ * \def MBEDTLS_ECDH_LEGACY_CONTEXT
+ *
+ * Use a backward compatible ECDH context.
+ *
+ * Mbed TLS supports two formats for ECDH contexts (#mbedtls_ecdh_context
+ * defined in `ecdh.h`). For most applications, the choice of format makes
+ * no difference, since all library functions can work with either format,
+ * except that the new format is incompatible with MBEDTLS_ECP_RESTARTABLE.
+
+ * The new format used when this option is disabled is smaller
+ * (56 bytes on a 32-bit platform). In future versions of the library, it
+ * will support alternative implementations of ECDH operations.
+ * The new format is incompatible with applications that access
+ * context fields directly and with restartable ECP operations.
+ *
+ * Define this macro if you enable MBEDTLS_ECP_RESTARTABLE or if you
+ * want to access ECDH context fields directly. Otherwise you should
+ * comment out this macro definition.
+ *
+ * This option has no effect if #MBEDTLS_ECDH_C is not enabled.
+ *
+ * \note This configuration option is experimental. Future versions of the
+ *       library may modify the way the ECDH context layout is configured
+ *       and may modify the layout of the new context type.
+ */
+#ifdef CONFIG_MBEDTLS_ECDH_LEGACY_CONTEXT
+#define MBEDTLS_ECDH_LEGACY_CONTEXT
+#endif
+
 /**
  * \def MBEDTLS_CMAC_C
  *
  * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
  * ciphers.
  *
+ * \note When #MBEDTLS_CMAC_ALT is active, meaning that the underlying
+ *       implementation of the CMAC algorithm is provided by an alternate
+ *       implementation, that alternate implementation may opt to not support
+ *       AES-192 or 3DES as underlying block ciphers for the CMAC operation.
+ *
  * Module:  library/cmac.c
  *
  * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
@@ -339,6 +374,7 @@
  *
  * Comment macros to disable the curve and functions for it
  */
+/* Short Weierstrass curves (supporting ECP, ECDH, ECDSA) */
 #ifdef CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED
 #define MBEDTLS_ECP_DP_SECP192R1_ENABLED
 #else
@@ -394,12 +430,12 @@
 #else
 #undef MBEDTLS_ECP_DP_BP512R1_ENABLED
 #endif
+/* Montgomery curves (supporting ECP) */
 #ifdef CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #define MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #else
 #undef MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #endif
-
 #ifdef MBEDTLS_ECP_DP_CURVE448_ENABLED
 #undef MBEDTLS_ECP_DP_CURVE448_ENABLED
 #endif
@@ -427,7 +463,7 @@
  * may result in a compromise of the long-term signing key. This is avoided by
  * the deterministic variant.
  *
- * Requires: MBEDTLS_HMAC_DRBG_C
+ * Requires: MBEDTLS_HMAC_DRBG_C, MBEDTLS_ECDSA_C
  *
  * Comment this macro to disable deterministic ECDSA.
  */
@@ -668,7 +704,7 @@
  *
  * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -696,7 +732,7 @@
  *
  * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -850,6 +886,69 @@
  */
 #define MBEDTLS_SSL_ALL_ALERT_MESSAGES
 
+/**
+ * \def MBEDTLS_SSL_DTLS_CONNECTION_ID
+ *
+ * Enable support for the DTLS Connection ID extension
+ * (version draft-ietf-tls-dtls-connection-id-05,
+ * https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05)
+ * which allows to identify DTLS connections across changes
+ * in the underlying transport.
+ *
+ * Setting this option enables the SSL APIs `mbedtls_ssl_set_cid()`,
+ * `mbedtls_ssl_get_peer_cid()` and `mbedtls_ssl_conf_cid()`.
+ * See the corresponding documentation for more information.
+ *
+ * \warning The Connection ID extension is still in draft state.
+ *          We make no stability promises for the availability
+ *          or the shape of the API controlled by this option.
+ *
+ * The maximum lengths of outgoing and incoming CIDs can be configured
+ * through the options
+ * - MBEDTLS_SSL_CID_OUT_LEN_MAX
+ * - MBEDTLS_SSL_CID_IN_LEN_MAX.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment to enable the Connection ID extension.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_DTLS_CONNECTION_ID
+#else
+#undef MBEDTLS_SSL_DTLS_CONNECTION_ID
+#endif
+
+/**
+ * \def MBEDTLS_SSL_CONTEXT_SERIALIZATION
+ *
+ * Enable serialization of the TLS context structures, through use of the
+ * functions mbedtls_ssl_context_save() and mbedtls_ssl_context_load().
+ *
+ * This pair of functions allows one side of a connection to serialize the
+ * context associated with the connection, then free or re-use that context
+ * while the serialized state is persisted elsewhere, and finally deserialize
+ * that state to a live context for resuming read/write operations on the
+ * connection. From a protocol perspective, the state of the connection is
+ * unaffected, in particular this is entirely transparent to the peer.
+ *
+ * Note: this is distinct from TLS session resumption, which is part of the
+ * protocol and fully visible by the peer. TLS session resumption enables
+ * establishing new connections associated to a saved session with shorter,
+ * lighter handshakes, while context serialization is a local optimization in
+ * handling a single, potentially long-lived connection.
+ *
+ * Enabling these APIs makes some SSL structures larger, as 64 extra bytes are
+ * saved after the handshake to allow for more efficient serialization, so if
+ * you don't need this feature you'll save RAM by disabling it.
+ *
+ * Comment to disable the context serialization APIs.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#define MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#else
+#undef MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#endif
+
 /** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
  *
  * Enable support for Encrypt-then-MAC, RFC 7366.
@@ -874,8 +973,8 @@
 
 /** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
  *
- * Enable support for Extended Master Secret, aka Session Hash
- * (draft-ietf-tls-session-hash-02).
+ * Enable support for RFC 7627: Session Hash and Extended Master Secret
+ * Extension.
  *
  * This was introduced as "the proper fix" to the Triple Handshake familiy of
  * attacks, but it is recommended to always use it (even if you disable
@@ -897,7 +996,8 @@
 /**
  * \def MBEDTLS_SSL_FALLBACK_SCSV
  *
- * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ * Enable support for RFC 7507: Fallback Signaling Cipher Suite Value (SCSV)
+ * for Preventing Protocol Downgrade Attacks.
  *
  * For servers, it is recommended to always enable this, unless you support
  * only one version of TLS, or know for sure that none of your clients
@@ -911,6 +1011,32 @@
  */
 #define MBEDTLS_SSL_FALLBACK_SCSV
 
+/**
+ * \def MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+ *
+ * This option controls the availability of the API mbedtls_ssl_get_peer_cert()
+ * giving access to the peer's certificate after completion of the handshake.
+ *
+ * Unless you need mbedtls_ssl_peer_cert() in your application, it is
+ * recommended to disable this option for reduced RAM usage.
+ *
+ * \note If this option is disabled, mbedtls_ssl_get_peer_cert() is still
+ *       defined, but always returns \c NULL.
+ *
+ * \note This option has no influence on the protection against the
+ *       triple handshake attack. Even if it is disabled, Mbed TLS will
+ *       still ensure that certificates do not change during renegotiation,
+ *       for exaple by keeping a hash of the peer's certificate.
+ *
+ * Comment this macro to disable storing the peer's certificate
+ * after the handshake.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#define MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#else
+#undef MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#endif
+
 /**
  * \def MBEDTLS_SSL_PROTO_TLS1
  *
@@ -935,6 +1061,9 @@
  * Requires: MBEDTLS_MD5_C
  *           MBEDTLS_SHA1_C
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Comment this macro to disable support for SSL 3.0
  */
 #ifdef CONFIG_MBEDTLS_SSL_PROTO_SSL3
@@ -1092,6 +1221,41 @@
 #undef MBEDTLS_SSL_DTLS_HELLO_VERIFY
 #endif
 
+/**
+ * \def MBEDTLS_SSL_DTLS_SRTP
+ *
+ * Enable support for negotiation of DTLS-SRTP (RFC 5764)
+ * through the use_srtp extension.
+ *
+ * \note This feature provides the minimum functionality required
+ * to negotiate the use of DTLS-SRTP and to allow the derivation of
+ * the associated SRTP packet protection key material.
+ * In particular, the SRTP packet protection itself, as well as the
+ * demultiplexing of RTP and DTLS packets at the datagram layer
+ * (see Section 5 of RFC 5764), are not handled by this feature.
+ * Instead, after successful completion of a handshake negotiating
+ * the use of DTLS-SRTP, the extended key exporter API
+ * mbedtls_ssl_conf_export_keys_ext_cb() should be used to implement
+ * the key exporter described in Section 4.2 of RFC 5764 and RFC 5705
+ * (this is implemented in the SSL example programs).
+ * The resulting key should then be passed to an SRTP stack.
+ *
+ * Setting this option enables the runtime API
+ * mbedtls_ssl_conf_dtls_srtp_protection_profiles()
+ * through which the supported DTLS-SRTP protection
+ * profiles can be configured. You must call this API at
+ * runtime if you wish to negotiate the use of DTLS-SRTP.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment this to enable support for use_srtp extension.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_DTLS
+#define MBEDTLS_SSL_DTLS_SRTP
+#else
+#undef MBEDTLS_SSL_DTLS_SRTP
+#endif
+
 /**
  * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
  *
@@ -1176,6 +1340,21 @@
 #define MBEDTLS_SSL_TRUNCATED_HMAC
 
 /**
+ * \def MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+ *
+ * When this option is enabled, the SSL buffer will be resized automatically
+ * based on the negotiated maximum fragment length in each direction.
+ *
+ * Requires: MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ */
+#if defined MBEDTLS_SSL_MAX_FRAGMENT_LENGTH && CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#define MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#else
+#undef MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#endif
+
+/**
+ *
  * \def MBEDTLS_VERSION_FEATURES
  *
  * Allow run-time checking of compile-time enabled features. Thus allowing users
@@ -1641,7 +1820,9 @@
  * This module is used by the following key exchanges:
  *      ECDHE-ECDSA
  *
- * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C,
+ *           and at least one MBEDTLS_ECP_DP_XXX_ENABLED for a
+ *           short Weierstrass curve.
  */
 #ifdef CONFIG_MBEDTLS_ECDSA_C
 #define MBEDTLS_ECDSA_C
@@ -1719,11 +1900,11 @@
 /**
  * \def MBEDTLS_GCM_C
  *
- * Enable the Galois/Counter Mode (GCM) for AES.
+ * Enable the Galois/Counter Mode (GCM).
  *
  * Module:  library/gcm.c
  *
- * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C or MBEDTLS_ARIA_C
  *
  * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
  * requisites are enabled as well.
@@ -2323,6 +2504,29 @@
 #undef MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
 #endif
 
+/**
+ * \def MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+ *
+ * If set, this enables the X.509 API `mbedtls_x509_crt_verify_with_ca_cb()`
+ * and the SSL API `mbedtls_ssl_conf_ca_cb()` which allow users to configure
+ * the set of trusted certificates through a callback instead of a linked
+ * list.
+ *
+ * This is useful for example in environments where a large number of trusted
+ * certificates is present and storing them in a linked list isn't efficient
+ * enough, or when the set of trusted certificates changes frequently.
+ *
+ * See the documentation of `mbedtls_x509_crt_verify_with_ca_cb()` and
+ * `mbedtls_ssl_conf_ca_cb()` for more information.
+ *
+ * Uncomment to enable trusted certificate callbacks.
+ */
+#ifdef CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK
+#define MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+#else
+#undef MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+#endif
+
 /**
  * \def MBEDTLS_X509_CSR_WRITE_C
  *
@@ -2383,6 +2587,51 @@
  */
 #define MBEDTLS_SSL_IN_CONTENT_LEN              CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN
 
+/** \def MBEDTLS_SSL_CID_IN_LEN_MAX
+ *
+ * The maximum length of CIDs used for incoming DTLS messages.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_IN_LEN_MAX              CONFIG_MBEDTLS_SSL_CID_IN_LEN_MAX
+#else
+#undef MBEDTLS_SSL_CID_IN_LEN_MAX
+#endif
+
+
+/** \def MBEDTLS_SSL_CID_OUT_LEN_MAX
+ *
+ * The maximum length of CIDs used for outgoing DTLS messages.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_OUT_LEN_MAX            CONFIG_MBEDTLS_SSL_CID_OUT_LEN_MAX
+#else
+#undef MBEDTLS_SSL_CID_OUT_LEN_MAX
+#endif
+
+/** \def MBEDTLS_SSL_CID_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * when using the Connection ID extension in DTLS 1.2.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_PADDING_GRANULARITY    CONFIG_MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#else
+#undef MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#endif
+
+
 /** \def MBEDTLS_SSL_OUT_CONTENT_LEN
  *
  * Maximum outgoing fragment length in bytes.
@@ -2416,6 +2665,10 @@
  * default. At the time of writing, there is no practical attack on the use
  * of SHA-1 in handshake signatures, hence this option is turned on by default
  * for compatibility with existing peers.
+ *
+ * \warning   SHA-1 is considered a weak message digest and its use constitutes
+ *            a security risk. If possible, we recommend avoiding dependencies
+ *            on it, and considering stronger message digests instead.
  */
 #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
 
diff --git a/tools/sdk/esp32c3/include/nvs_flash/include/nvs.h b/tools/sdk/esp32c3/include/nvs_flash/include/nvs.h
index 26183853b7c..6a45327bbae 100644
--- a/tools/sdk/esp32c3/include/nvs_flash/include/nvs.h
+++ b/tools/sdk/esp32c3/include/nvs_flash/include/nvs.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_NVS_H
 #define ESP_NVS_H
 
@@ -105,7 +97,7 @@ typedef enum {
  */
 typedef struct {
     char namespace_name[16];    /*!< Namespace to which key-value belong */
-    char key[16];               /*!< Key of stored key-value pair */
+    char key[NVS_KEY_NAME_MAX_SIZE];               /*!< Key of stored key-value pair */
     nvs_type_t type;            /*!< Type of stored key-value pair */
 } nvs_entry_info_t;
 
diff --git a/tools/sdk/esp32c3/include/qrcode/include/qrcode.h b/tools/sdk/esp32c3/include/qrcode/include/qrcode.h
new file mode 100644
index 00000000000..27de85f5baa
--- /dev/null
+++ b/tools/sdk/esp32c3/include/qrcode/include/qrcode.h
@@ -0,0 +1,122 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief  Generate and display QR Code on the console
+  *         Encodes the given string into a QR Code & displays it on the console
+  *
+  * @attention 1. Can successfully encode a UTF-8 string of up to 2953 bytes or an alphanumeric
+  *               string of up to 4296 characters or any digit string of up to 7089 characters
+  *
+  * @note This API is kept for backward compatibility
+  *
+  * @param  text  string to encode into a QR Code.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_FAIL: Failed to encode string into a QR Code
+  *    - ESP_ERR_NO_MEM: Failed to allocate buffer for given MAX_QRCODE_VERSION
+  */
+esp_err_t qrcode_display(const char *text);
+
+/**
+  * @brief  QR Code handle used by the display function
+  */
+typedef const uint8_t * esp_qrcode_handle_t;
+
+/**
+  * @brief  QR Code configuration options
+  */
+typedef struct {
+    void (*display_func)(esp_qrcode_handle_t qrcode);   /**< Function called for displaying the QR Code after encoding is complete */
+    int max_qrcode_version;                             /**< Max QR Code Version to be used. Range: 2 - 40 */
+    int qrcode_ecc_level;                               /**< Error Correction Level for QR Code */
+} esp_qrcode_config_t;
+
+/**
+  * @brief  Error Correction Level in a QR Code Symbol
+  */
+enum {
+    ESP_QRCODE_ECC_LOW,     /**< QR Code Error Tolerance of 7% */
+    ESP_QRCODE_ECC_MED,     /**< QR Code Error Tolerance of 15% */
+    ESP_QRCODE_ECC_QUART,   /**< QR Code Error Tolerance of 25% */
+    ESP_QRCODE_ECC_HIGH     /**< QR Code Error Tolerance of 30% */
+};
+
+/**
+  * @brief  Encodes the given string into a QR Code and calls the display function
+  *
+  * @attention 1. Can successfully encode a UTF-8 string of up to 2953 bytes or an alphanumeric
+  *               string of up to 4296 characters or any digit string of up to 7089 characters
+  *
+  * @param  cfg   Configuration used for QR Code encoding.
+  * @param  text  String to encode into a QR Code.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_FAIL: Failed to encode string into a QR Code
+  *    - ESP_ERR_NO_MEM: Failed to allocate buffer for given max_qrcode_version
+  */
+esp_err_t esp_qrcode_generate(esp_qrcode_config_t *cfg, const char *text);
+
+/**
+  * @brief  Displays QR Code on the console
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  */
+void esp_qrcode_print_console(esp_qrcode_handle_t qrcode);
+
+/**
+  * @brief  Returns the side length of the given QR Code
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  *
+  * @return
+  *    - val[21, 177]: Side length of QR Code
+  */
+int esp_qrcode_get_size(esp_qrcode_handle_t qrcode);
+
+/**
+  * @brief  Returns the Pixel value for the given coordinates
+  *         False indicates White and True indicates Black
+  *
+  * @attention 1. Coordinates for top left corner are (x=0, y=0)
+  * @attention 2. For out of bound coordinates false (White) is returned
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  * @param  x  X-Coordinate of QR Code module
+  * @param  y  Y-Coordinate of QR Code module
+  *
+  * @return
+  *    - true: (x, y) Pixel is Black
+  *    - false: (x, y) Pixel is White
+  */
+bool esp_qrcode_get_module(esp_qrcode_handle_t qrcode, int x, int y);
+
+#define ESP_QRCODE_CONFIG_DEFAULT() (esp_qrcode_config_t) { \
+    .display_func = esp_qrcode_print_console, \
+    .max_qrcode_version = 10, \
+    .qrcode_ecc_level = ESP_QRCODE_ECC_LOW, \
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_common_events.h b/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_common_events.h
new file mode 100644
index 00000000000..b77f8a3d142
--- /dev/null
+++ b/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_common_events.h
@@ -0,0 +1,60 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** ESP RainMaker Common Event Base */
+ESP_EVENT_DECLARE_BASE(RMAKER_COMMON_EVENT);
+
+typedef enum {
+    /** Node reboot has been triggered. The associated event data is the time in seconds
+     * (type: uint8_t) after which the node will reboot. Note that this time may not be
+     * accurate as the events are received asynchronously.*/
+    RMAKER_EVENT_REBOOT,
+    /** Wi-Fi credentials reset. Triggered after calling esp_rmaker_wifi_reset() */
+    RMAKER_EVENT_WIFI_RESET,
+    /** Node reset to factory defaults. Triggered after calling esp_rmaker_factory_reset() */
+    RMAKER_EVENT_FACTORY_RESET,
+    /** Connected to MQTT Broker */
+    RMAKER_MQTT_EVENT_CONNECTED,
+    /** Disconnected from MQTT Broker */
+    RMAKER_MQTT_EVENT_DISCONNECTED,
+    /** MQTT message published successfully.
+     * Event data will contain the message ID (integer) of published message.
+     */
+    RMAKER_MQTT_EVENT_PUBLISHED,
+    /** POSIX Timezone Changed. Associated data would be NULL terminated POSIX Timezone
+     * Eg. "PST8PDT,M3.2.0,M11.1.0" */
+    RMAKER_EVENT_TZ_POSIX_CHANGED,
+    /** Timezone Changed. Associated data would be NULL terminated Timezone.
+     * Eg. "America/Los_Angeles"
+     * Note that whenever this event is received, the RMAKER_EVENT_TZ_POSIX_CHANGED event
+     * will also be received, but not necessarily vice versa.
+     */
+    RMAKER_EVENT_TZ_CHANGED,
+    /**
+     * MQTT message deleted from the outbox if the message couldn't have been sent and acknowledged.
+     * Event data will contain the message ID (integer) of deleted message.
+     * Valid only if CONFIG_MQTT_REPORT_DELETED_MESSAGES is enabled.
+     */
+    RMAKER_MQTT_EVENT_MSG_DELETED,
+} esp_rmaker_common_event_t;
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_factory.h b/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_factory.h
new file mode 100644
index 00000000000..9ef781b798b
--- /dev/null
+++ b/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_factory.h
@@ -0,0 +1,61 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Initialize Factory NVS
+ *
+ * This initializes the Factory NVS partition which will store data
+ * that should not be cleared even after a reset to factory.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_factory_init(void);
+
+/** Get value from factory NVS
+ *
+ * This will search for the specified key in the Factory NVS partition,
+ * allocate the required memory to hold it, copy the value and return
+ * the pointer to it. It is responsibility of the caller to free the
+ * memory when the value is no more required.
+ *
+ * @param[in] key The key of the value to be read from factory NVS.
+ *
+ * @return pointer to the value on success.
+ * @return NULL on failure.
+ */
+void *esp_rmaker_factory_get(const char *key);
+
+/** Set a value in factory NVS
+ *
+ * This will write the value for the specified key into factory NVS.
+ *
+ * @param[in] key The key for the value to be set in factory NVS.
+ * @param[in] data Pointer to the value.
+ * @param[in] len Length of the value.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_factory_set(const char *key, void *value, size_t len);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_mqtt_glue.h b/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_mqtt_glue.h
new file mode 100644
index 00000000000..95744bdf58c
--- /dev/null
+++ b/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_mqtt_glue.h
@@ -0,0 +1,160 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define RMAKER_MQTT_QOS0    0
+#define RMAKER_MQTT_QOS1    1
+
+/** MQTT Connection parameters */
+typedef struct {
+    /** MQTT Host */
+    char *mqtt_host;
+    /** Client ID */
+    char *client_id;
+    /** Client Certificate in NULL terminated PEM format */
+    char *client_cert;
+    /** Client Key in NULL terminated PEM format */
+    char *client_key;
+    /** Server Certificate in NULL terminated PEM format */
+    char *server_cert;
+} esp_rmaker_mqtt_conn_params_t;
+
+/** MQTT Get Connection Parameters function prototype
+ *
+ * @return Pointer to \ref esp_rmaker_mqtt_conn_params_t on success.
+ * @return NULL on failure.
+ */
+typedef esp_rmaker_mqtt_conn_params_t *(*esp_rmaker_mqtt_get_conn_params_t)(void);
+
+/** MQTT Subscribe callback prototype
+ *
+ * @param[in] topic Topic on which the message was received
+ * @param[in] payload Data received in the message
+ * @param[in] payload_len Length of the data
+ * @param[in] priv_data The private data passed during subscription
+ */
+typedef void (*esp_rmaker_mqtt_subscribe_cb_t)(const char *topic, void *payload, size_t payload_len, void *priv_data);
+
+/** MQTT Init function prototype
+ *
+ * @param[in] conn_params The MQTT connection parameters. If NULL is passed, it should internally use the
+ * \ref esp_rmaker_mqtt_get_conn_params call if registered.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_init_t)(esp_rmaker_mqtt_conn_params_t *conn_params);
+
+/** MQTT Deinit function prototype
+ *
+ * Call this function after MQTT has disconnected.
+ */
+typedef void (*esp_rmaker_mqtt_deinit_t)(void);
+
+/** MQTT Connect function prototype
+ *
+ * Starts the connection attempts to the MQTT broker.
+ * This should ideally be called after successful network connection.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_connect_t)(void);
+
+/** MQTT Disconnect function prototype
+ *
+ * Disconnects from the MQTT broker.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_disconnect_t)(void);
+
+/** MQTT Publish Message function prototype
+ *
+ * @param[in] topic The MQTT topic on which the message should be published.
+ * @param[in] data Data to be published.
+ * @param[in] data_len Length of the data.
+ * @param[in] qos Quality of service for the message.
+ * @param[out] msg_id If a non NULL pointer is passed, the id of the published message will be returned in this.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_publish_t)(const char *topic, void *data, size_t data_len, uint8_t qos, int *msg_id);
+
+/** MQTT Subscribe function prototype
+ *
+ * @param[in] topic The topic to be subscribed to.
+ * @param[in] cb The callback to be invoked when a message is received on the given topic.
+ * @param[in] qos Quality of service for the subscription.
+ * @param[in] priv_data Optional private data to be passed to the callback.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_subscribe_t)(const char *topic, esp_rmaker_mqtt_subscribe_cb_t cb, uint8_t qos, void *priv_data);
+
+/** MQTT Unsubscribe function prototype
+ *
+ * @param[in] topic Topic from which to unsubscribe.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_unsubscribe_t)(const char *topic);
+
+/**  MQTT configuration */
+typedef struct {
+    /** Flag to indicate if the MQTT config setup is done */
+    bool setup_done;
+    /** Pointer to the Get MQTT params function. */
+    esp_rmaker_mqtt_get_conn_params_t get_conn_params;
+    /** Pointer to MQTT Init function. */
+    esp_rmaker_mqtt_init_t init;
+    /** Pointer to MQTT Deinit function. */
+    esp_rmaker_mqtt_deinit_t deinit;
+    /** Pointer to MQTT Connect function. */
+    esp_rmaker_mqtt_connect_t connect;
+    /** Pointer to MQTQ Disconnect function */
+    esp_rmaker_mqtt_disconnect_t disconnect;
+    /** Pointer to MQTT Publish function */
+    esp_rmaker_mqtt_publish_t publish;
+    /** Pointer to MQTT Subscribe function */
+    esp_rmaker_mqtt_subscribe_t subscribe;
+    /** Pointer to MQTT Unsubscribe function */
+    esp_rmaker_mqtt_unsubscribe_t unsubscribe;
+} esp_rmaker_mqtt_config_t;
+
+/** Setup MQTT Glue
+ *
+ * This function initializes MQTT glue layer with all the default functions.
+ *
+ * @param[out] mqtt_config Pointer to an allocated MQTT configuration structure.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_glue_setup(esp_rmaker_mqtt_config_t *mqtt_config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_utils.h b/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_utils.h
new file mode 100644
index 00000000000..86ab691d492
--- /dev/null
+++ b/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_utils.h
@@ -0,0 +1,205 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <sntp.h>
+#include <esp_err.h>
+#include <esp_heap_caps.h>
+#include <sdkconfig.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#ifdef CONFIG_SPIRAM
+#define MEM_ALLOC_EXTRAM(size)         heap_caps_malloc(size, MALLOC_CAP_SPIRAM)
+#define MEM_CALLOC_EXTRAM(num, size)   heap_caps_calloc(num, size, MALLOC_CAP_SPIRAM)
+#define MEM_REALLOC_EXTRAM(ptr, size)  heap_caps_realloc(ptr, size, MALLOC_CAP_SPIRAM)
+#else
+#define MEM_ALLOC_EXTRAM(size)         malloc(size)
+#define MEM_CALLOC_EXTRAM(num, size)   calloc(num, size)
+#define MEM_REALLOC_EXTRAM(ptr, size)  realloc(ptr, size)
+#endif
+
+typedef struct esp_rmaker_time_config {
+    /** If not specified, then 'CONFIG_ESP_RMAKER_SNTP_SERVER_NAME' is used as the SNTP server. */
+    char *sntp_server_name;
+    /** Optional callback to invoke, whenever time is synchronised. This will be called
+     * periodically as per the SNTP polling interval (which is 60min by default).
+     * If kept NULL, the default callback will be invoked, which will just print the
+     * current local time.
+     */
+    sntp_sync_time_cb_t sync_time_cb;
+} esp_rmaker_time_config_t;
+
+/** Reboot the device after a delay
+ *
+ * This API just starts a reboot timer and returns immediately.
+ * The actual reboot is trigerred asynchronously in the timer callback.
+ * This is useful if you want to reboot after a delay, to allow other tasks to finish
+ * their operations (Eg. MQTT publish to indicate OTA success). The \ref RMAKER_EVENT_REBOOT
+ * event is triggered when the reboot timer is started.
+ *
+ * @param[in] seconds Time in seconds after which the device should reboot.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_reboot(int8_t seconds);
+
+/** Reset Wi-Fi credentials and (optionally) reboot
+ *
+ * This will reset just the Wi-Fi credentials and (optionally) trigger a reboot.
+ * This is useful when you want to keep all the entries in NVS memory
+ * intact, but just change the Wi-Fi credentials. The \ref RMAKER_EVENT_WIFI_RESET
+ * event is triggered when this API is called. The actual reset will happen after a
+ * delay if reset_seconds is not zero.
+ *
+ * @note This reset and reboot operations will happen asynchronously depending
+ * on the values passed to the API.
+ *
+ * @param[in] reset_seconds Time in seconds after which the reset should get triggered.
+ * This will help other modules take some actions before the device actually resets.
+ * If set to zero, the operation would be performed immediately.
+ * @param[in] reboot_seconds Time in seconds after which the device should reboot. If set
+ * to negative value, the device will not reboot at all.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_wifi_reset(int8_t reset_seconds, int8_t reboot_seconds);
+
+/** Reset to factory defaults and reboot
+ *
+ * This will clear entire NVS partition and (optionally) trigger a reboot.
+ * The \ref RMAKER_EVENT_FACTORY_RESET event is triggered when this API is called.
+ * The actual reset will happen after a delay if reset_seconds is not zero.
+ *
+ * @note This reset and reboot operations will happen asynchronously depending
+ * on the values passed to the API.
+ *
+ * @param[in] reset_seconds Time in seconds after which the reset should get triggered.
+ * This will help other modules take some actions before the device actually resets.
+ * If set to zero, the operation would be performed immediately.
+ * @param[in] reboot_seconds Time in seconds after which the device should reboot. If set
+ * to negative value, the device will not reboot at all.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_factory_reset(int8_t reset_seconds, int8_t reboot_seconds);
+
+/** Initialize time synchronization
+ *
+ * This API initializes SNTP for time synchronization.
+ *
+ * @param[in] config Configuration to be used for SNTP time synchronization. The default configuration is used if NULL is passed.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_sync_init(esp_rmaker_time_config_t *config);
+
+/** Check if current time is updated
+ *
+ * This API checks if the current system time is updated against the reference time of 1-Jan-2019.
+ *
+ * @return true if time is updated
+ * @return false if time is not updated
+ */
+bool esp_rmaker_time_check(void);
+
+/** Wait for time synchronization
+ *
+ * This API waits for the system time to be updated against the reference time of 1-Jan-2019.
+ * This is a blocking call.
+ *
+ * @param[in] ticks_to_wait Number of ticks to wait for time synchronization. Accepted values: 0 to portMAX_DELAY.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_wait_for_sync(uint32_t ticks_to_wait);
+
+/** Set POSIX timezone
+ *
+ * Set the timezone (TZ environment variable) as per the POSIX format
+ * specified in the [GNU libc documentation](https://www.gnu.org/software/libc/manual/html_node/TZ-Variable.html).
+ * Eg. For China: "CST-8"
+ *     For US Pacific Time (including daylight saving information): "PST8PDT,M3.2.0,M11.1.0"
+ *
+ * @param[in] tz_posix NULL terminated TZ POSIX string
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_set_timezone_posix(const char *tz_posix);
+
+/** Set timezone location string
+ *
+ * Set the timezone as a user friendly location string.
+ * Check [here](https://rainmaker.espressif.com/docs/time-service.html) for a list of valid values.
+ *
+ * Eg. For China: "Asia/Shanghai"
+ *     For US Pacific Time: "America/Los_Angeles"
+ *
+ * @note Setting timezone using this API internally also sets the POSIX timezone string.
+ *
+ * @param[in] tz NULL terminated Timezone location string
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_set_timezone(const char *tz);
+
+/** Get the current POSIX timezone
+ *
+ * This fetches the current timezone in POSIX format, read from NVS.
+ *
+ * @return Pointer to a NULL terminated POSIX timezone string on success.
+ *      Freeing this is the responsibility of the caller.
+ * @return NULL on failure.
+ */
+char *esp_rmaker_time_get_timezone_posix(void);
+
+/** Get the current timezone
+ *
+ * This fetches the current timezone in POSIX format, read from NVS.
+ *
+ * @return Pointer to a NULL terminated timezone string on success.
+ *      Freeing this is the responsibility of the caller.
+ * @return NULL on failure.
+ */
+char *esp_rmaker_time_get_timezone(void);
+
+/** Get printable local time string
+ *
+ * Get a printable local time string, with information of timezone and Daylight Saving.
+ * Eg. "Tue Sep  1 09:04:38 2020 -0400[EDT], DST: Yes"
+ * "Tue Sep  1 21:04:04 2020 +0800[CST], DST: No"
+ *
+ *
+ * @param[out] buf Pointer to a pre-allocated buffer into which the time string will
+ *                  be populated.
+ * @param[in] buf_len Length of the above buffer.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_get_local_time_str(char *buf, size_t buf_len);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_work_queue.h b/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_work_queue.h
new file mode 100644
index 00000000000..0e696d46848
--- /dev/null
+++ b/tools/sdk/esp32c3/include/rmaker_common/include/esp_rmaker_work_queue.h
@@ -0,0 +1,82 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+/** Prototype for ESP RainMaker Work Queue Function
+ *
+ * @param[in] priv_data The private data associated with the work function.
+ */
+typedef void (*esp_rmaker_work_fn_t)(void *priv_data);
+
+/** Initializes the Work Queue
+ *
+ * This initializes the work queue, which is basically a mechanism to run
+ * tasks in the context of a dedicated thread. You can start queueing tasks
+ * after this, but they will get executed only after calling
+ * esp_rmaker_work_queue_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_init(void);
+
+/** De-initialize the Work Queue
+ *
+ * This de-initializes the work queue. Note that the work queue needs to
+ * be stopped using esp_rmaker_work_queue_stop() before calling this.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_deinit(void);
+
+/** Start the Work Queue
+ *
+ * This starts the Work Queue thread which then starts executing the tasks queued.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_start(void);
+
+/** Stop the Work Queue
+ *
+ * This stops a running Work Queue.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_stop(void);
+
+/** Queue execution of a function in the Work Queue's context
+ *
+ * This API queues a work function for execution in the Work Queue Task's context.
+ *
+ * @param[in] work_fn The Work function to be queued.
+ * @param[in] priv_data Private data to be passed to the work function.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_add_task(esp_rmaker_work_fn_t work_fn, void *priv_data);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/sdmmc/include/sdmmc_cmd.h b/tools/sdk/esp32c3/include/sdmmc/include/sdmmc_cmd.h
index e0e7162391b..9b7319641e2 100644
--- a/tools/sdk/esp32c3/include/sdmmc/include/sdmmc_cmd.h
+++ b/tools/sdk/esp32c3/include/sdmmc/include/sdmmc_cmd.h
@@ -224,10 +224,10 @@ esp_err_t sdmmc_io_enable_int(sdmmc_card_t* card);
 esp_err_t sdmmc_io_wait_int(sdmmc_card_t* card, TickType_t timeout_ticks);
 
 /**
- * Get the data of CIS region of a SDIO card.
+ * Get the data of CIS region of an SDIO card.
  *
  * You may provide a buffer not sufficient to store all the CIS data. In this
- * case, this functions store as much data into your buffer as possible. Also,
+ * case, this function stores as much data into your buffer as possible. Also,
  * this function will try to get and return the size required for you.
  *
  * @param card  pointer to card information structure previously initialized
@@ -253,7 +253,7 @@ esp_err_t sdmmc_io_wait_int(sdmmc_card_t* card, TickType_t timeout_ticks);
 esp_err_t sdmmc_io_get_cis_data(sdmmc_card_t* card, uint8_t* out_buffer, size_t buffer_size, size_t* inout_cis_size);
 
 /**
- * Parse and print the CIS information of a SDIO card.
+ * Parse and print the CIS information of an SDIO card.
  *
  * @note Not all the CIS codes and all kinds of tuples are supported. If you
  * see some unresolved code, you can add the parsing of these code in
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/efuse_reg.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/efuse_reg.h
index aca7304f530..0ec191f4381 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/efuse_reg.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/efuse_reg.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef _SOC_EFUSE_REG_H_
 #define _SOC_EFUSE_REG_H_
 
@@ -282,30 +274,12 @@ extern "C" {
 #define EFUSE_FORCE_SEND_RESUME_M  (BIT(13))
 #define EFUSE_FORCE_SEND_RESUME_V  0x1
 #define EFUSE_FORCE_SEND_RESUME_S  13
-/* EFUSE_FLASH_ECC_EN : R/W ;bitpos:[12] ;default: 1'b0 ; */
-/*description: Set 1 to enable ECC for flash boot.*/
-#define EFUSE_FLASH_ECC_EN  (BIT(12))
-#define EFUSE_FLASH_ECC_EN_M  (BIT(12))
-#define EFUSE_FLASH_ECC_EN_V  0x1
-#define EFUSE_FLASH_ECC_EN_S  12
-/* EFUSE_FLASH_PAGE_SIZE : R/W ;bitpos:[11:10] ;default: 2'h0 ; */
-/*description: Set Flash page size.*/
-#define EFUSE_FLASH_PAGE_SIZE  0x00000003
-#define EFUSE_FLASH_PAGE_SIZE_M  ((EFUSE_FLASH_PAGE_SIZE_V)<<(EFUSE_FLASH_PAGE_SIZE_S))
-#define EFUSE_FLASH_PAGE_SIZE_V  0x3
-#define EFUSE_FLASH_PAGE_SIZE_S  10
-/* EFUSE_FLASH_TYPE : R/W ;bitpos:[9] ;default: 1'b0 ; */
-/*description: Set the maximum lines of SPI flash. 0: four lines. 1: eight lines.*/
-#define EFUSE_FLASH_TYPE  (BIT(9))
-#define EFUSE_FLASH_TYPE_M  (BIT(9))
-#define EFUSE_FLASH_TYPE_V  0x1
-#define EFUSE_FLASH_TYPE_S  9
-/* EFUSE_PIN_POWER_SELECTION : R/W ;bitpos:[8] ;default: 1'b0 ; */
-/*description: GPIO33-GPIO37 power supply selection in ROM code. 0: VDD3P3_CPU. 1: VDD_SPI.*/
-#define EFUSE_PIN_POWER_SELECTION  (BIT(8))
-#define EFUSE_PIN_POWER_SELECTION_M  (BIT(8))
-#define EFUSE_PIN_POWER_SELECTION_V  0x1
-#define EFUSE_PIN_POWER_SELECTION_S  8
+/* EFUSE_RPT4_RESERVED7 : R/W ;bitpos:[12:8] ;default: 5'h0 ; */
+/*description: Reserved (used for four backups method).*/
+#define EFUSE_RPT4_RESERVED7  0x0000001F
+#define EFUSE_RPT4_RESERVED7_M  ((EFUSE_RPT4_RESERVED7_V)<<(EFUSE_RPT4_RESERVED7_S))
+#define EFUSE_RPT4_RESERVED7_V  0x1F
+#define EFUSE_RPT4_RESERVED7_S  8
 /* EFUSE_UART_PRINT_CONTROL : R/W ;bitpos:[7:6] ;default: 2'h0 ; */
 /*description: Set the default UARTboot message output mode. 00: Enabled. 01:
  Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled.*/
@@ -325,13 +299,12 @@ extern "C" {
 #define EFUSE_DIS_USB_DOWNLOAD_MODE_M  (BIT(4))
 #define EFUSE_DIS_USB_DOWNLOAD_MODE_V  0x1
 #define EFUSE_DIS_USB_DOWNLOAD_MODE_S  4
-/* EFUSE_FLASH_ECC_MODE : R/W ;bitpos:[3] ;default: 1'b0 ; */
-/*description: Set ECC mode in ROM  0: ROM would Enable Flash ECC 16to18 byte
- mode. 1:ROM would use 16to17 byte mode.*/
-#define EFUSE_FLASH_ECC_MODE  (BIT(3))
-#define EFUSE_FLASH_ECC_MODE_M  (BIT(3))
-#define EFUSE_FLASH_ECC_MODE_V  0x1
-#define EFUSE_FLASH_ECC_MODE_S  3
+/* EFUSE_RPT4_RESERVED8 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Reserved (used for four backups method).*/
+#define EFUSE_RPT4_RESERVED8  (BIT(3))
+#define EFUSE_RPT4_RESERVED8_M  (BIT(3))
+#define EFUSE_RPT4_RESERVED8_V  0x1
+#define EFUSE_RPT4_RESERVED8_S  3
 /* EFUSE_UART_PRINT_CHANNEL : R/W ;bitpos:[2] ;default: 1'b0 ; */
 /*description: Selectes the default UART print channel. 0: UART0. 1: UART1.*/
 #define EFUSE_UART_PRINT_CHANNEL  (BIT(2))
@@ -654,30 +627,12 @@ extern "C" {
 #define EFUSE_FORCE_SEND_RESUME_M  (BIT(13))
 #define EFUSE_FORCE_SEND_RESUME_V  0x1
 #define EFUSE_FORCE_SEND_RESUME_S  13
-/* EFUSE_FLASH_ECC_EN : RO ;bitpos:[12] ;default: 1'b0 ; */
-/*description: The value of FLASH_ECC_EN.*/
-#define EFUSE_FLASH_ECC_EN  (BIT(12))
-#define EFUSE_FLASH_ECC_EN_M  (BIT(12))
-#define EFUSE_FLASH_ECC_EN_V  0x1
-#define EFUSE_FLASH_ECC_EN_S  12
-/* EFUSE_FLASH_PAGE_SIZE : RO ;bitpos:[11:10] ;default: 2'h0 ; */
-/*description: The value of FLASH_PAGE_SIZE.*/
-#define EFUSE_FLASH_PAGE_SIZE  0x00000003
-#define EFUSE_FLASH_PAGE_SIZE_M  ((EFUSE_FLASH_PAGE_SIZE_V)<<(EFUSE_FLASH_PAGE_SIZE_S))
-#define EFUSE_FLASH_PAGE_SIZE_V  0x3
-#define EFUSE_FLASH_PAGE_SIZE_S  10
-/* EFUSE_FLASH_TYPE : RO ;bitpos:[9] ;default: 1'b0 ; */
-/*description: The value of FLASH_TYPE.*/
-#define EFUSE_FLASH_TYPE  (BIT(9))
-#define EFUSE_FLASH_TYPE_M  (BIT(9))
-#define EFUSE_FLASH_TYPE_V  0x1
-#define EFUSE_FLASH_TYPE_S  9
-/* EFUSE_PIN_POWER_SELECTION : RO ;bitpos:[8] ;default: 1'b0 ; */
-/*description: The value of PIN_POWER_SELECTION.*/
-#define EFUSE_PIN_POWER_SELECTION  (BIT(8))
-#define EFUSE_PIN_POWER_SELECTION_M  (BIT(8))
-#define EFUSE_PIN_POWER_SELECTION_V  0x1
-#define EFUSE_PIN_POWER_SELECTION_S  8
+/* EFUSE_RPT4_RESERVED7 : RO ;bitpos:[12:8] ;default: 5'h0 ; */
+/*description: Reserved.*/
+#define EFUSE_RPT4_RESERVED7  0x0000001F
+#define EFUSE_RPT4_RESERVED7_M  ((EFUSE_RPT4_RESERVED7_V)<<(EFUSE_RPT4_RESERVED7_S))
+#define EFUSE_RPT4_RESERVED7_V  0x1F
+#define EFUSE_RPT4_RESERVED7_S  8
 /* EFUSE_UART_PRINT_CONTROL : RO ;bitpos:[7:6] ;default: 2'h0 ; */
 /*description: The value of UART_PRINT_CONTROL.*/
 #define EFUSE_UART_PRINT_CONTROL  0x00000003
@@ -696,12 +651,12 @@ extern "C" {
 #define EFUSE_DIS_USB_DOWNLOAD_MODE_M  (BIT(4))
 #define EFUSE_DIS_USB_DOWNLOAD_MODE_V  0x1
 #define EFUSE_DIS_USB_DOWNLOAD_MODE_S  4
-/* EFUSE_FLASH_ECC_MODE : RO ;bitpos:[3] ;default: 1'b0 ; */
-/*description: The value of FLASH_ECC_MODE.*/
-#define EFUSE_FLASH_ECC_MODE  (BIT(3))
-#define EFUSE_FLASH_ECC_MODE_M  (BIT(3))
-#define EFUSE_FLASH_ECC_MODE_V  0x1
-#define EFUSE_FLASH_ECC_MODE_S  3
+/* EFUSE_RPT4_RESERVED8 : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Reserved.*/
+#define EFUSE_RPT4_RESERVED8  (BIT(3))
+#define EFUSE_RPT4_RESERVED8_M  (BIT(3))
+#define EFUSE_RPT4_RESERVED8_V  0x1
+#define EFUSE_RPT4_RESERVED8_S  3
 /* EFUSE_UART_PRINT_CHANNEL : RO ;bitpos:[2] ;default: 1'b0 ; */
 /*description: The value of UART_PRINT_CHANNEL.*/
 #define EFUSE_UART_PRINT_CHANNEL  (BIT(2))
@@ -1624,30 +1579,12 @@ extern "C" {
 #define EFUSE_FORCE_SEND_RESUME_ERR_M  (BIT(13))
 #define EFUSE_FORCE_SEND_RESUME_ERR_V  0x1
 #define EFUSE_FORCE_SEND_RESUME_ERR_S  13
-/* EFUSE_FLASH_ECC_EN : RO ;bitpos:[12] ;default: 1'b0 ; */
-/*description: If FLASH_ECC_EN_ERR is 1  then it indicates a programming error.*/
-#define EFUSE_FLASH_ECC_EN  (BIT(12))
-#define EFUSE_FLASH_ECC_EN_M  (BIT(12))
-#define EFUSE_FLASH_ECC_EN_V  0x1
-#define EFUSE_FLASH_ECC_EN_S  12
-/* EFUSE_FLASH_PAGE_SIZE : RO ;bitpos:[11:10] ;default: 2'h0 ; */
-/*description: If any bits in FLASH_PAGE_SIZE is 1  then it indicates a programming error.*/
-#define EFUSE_FLASH_PAGE_SIZE  0x00000003
-#define EFUSE_FLASH_PAGE_SIZE_M  ((EFUSE_FLASH_PAGE_SIZE_V)<<(EFUSE_FLASH_PAGE_SIZE_S))
-#define EFUSE_FLASH_PAGE_SIZE_V  0x3
-#define EFUSE_FLASH_PAGE_SIZE_S  10
-/* EFUSE_FLASH_TYPE_ERR : RO ;bitpos:[9] ;default: 1'b0 ; */
-/*description: If FLASH_TYPE is 1  then it indicates a programming error.*/
-#define EFUSE_FLASH_TYPE_ERR  (BIT(9))
-#define EFUSE_FLASH_TYPE_ERR_M  (BIT(9))
-#define EFUSE_FLASH_TYPE_ERR_V  0x1
-#define EFUSE_FLASH_TYPE_ERR_S  9
-/* EFUSE_PIN_POWER_SELECTION_ERR : RO ;bitpos:[8] ;default: 1'b0 ; */
-/*description: If PIN_POWER_SELECTION is 1  then it indicates a programming error.*/
-#define EFUSE_PIN_POWER_SELECTION_ERR  (BIT(8))
-#define EFUSE_PIN_POWER_SELECTION_ERR_M  (BIT(8))
-#define EFUSE_PIN_POWER_SELECTION_ERR_V  0x1
-#define EFUSE_PIN_POWER_SELECTION_ERR_S  8
+/* EFUSE_RPT4_RESERVED7_ERR : RO ;bitpos:[12:8] ;default: 5'h0 ; */
+/*description: Reserved.*/
+#define EFUSE_RPT4_RESERVED7_ERR  0x0000001F
+#define EFUSE_RPT4_RESERVED7_ERR_M  ((EFUSE_RPT4_RESERVED7_ERR_V)<<(EFUSE_RPT4_RESERVED7_ERR_S))
+#define EFUSE_RPT4_RESERVED7_ERR_V  0x1F
+#define EFUSE_RPT4_RESERVED7_ERR_S  8
 /* EFUSE_UART_PRINT_CONTROL_ERR : RO ;bitpos:[7:6] ;default: 2'h0 ; */
 /*description: If any bit in UART_PRINT_CONTROL is 1  then it indicates a programming error.*/
 #define EFUSE_UART_PRINT_CONTROL_ERR  0x00000003
@@ -1666,12 +1603,12 @@ extern "C" {
 #define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_M  (BIT(4))
 #define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_V  0x1
 #define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_S  4
-/* EFUSE_FLASH_ECC_MODE_ERR : RO ;bitpos:[3] ;default: 1'b0 ; */
-/*description: If FLASH_ECC_MODE is 1  then it indicates a programming error.*/
-#define EFUSE_FLASH_ECC_MODE_ERR  (BIT(3))
-#define EFUSE_FLASH_ECC_MODE_ERR_M  (BIT(3))
-#define EFUSE_FLASH_ECC_MODE_ERR_V  0x1
-#define EFUSE_FLASH_ECC_MODE_ERR_S  3
+/* EFUSE_RPT4_RESERVED8_ERR : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Reserved.*/
+#define EFUSE_RPT4_RESERVED8_ERR  (BIT(3))
+#define EFUSE_RPT4_RESERVED8_ERR_M  (BIT(3))
+#define EFUSE_RPT4_RESERVED8_ERR_V  0x1
+#define EFUSE_RPT4_RESERVED8_ERR_S  3
 /* EFUSE_UART_PRINT_CHANNEL_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */
 /*description: If UART_PRINT_CHANNEL is 1  then it indicates a programming error.*/
 #define EFUSE_UART_PRINT_CHANNEL_ERR  (BIT(2))
@@ -1867,6 +1804,9 @@ extern "C" {
 #define EFUSE_OP_CODE_V  0xFFFF
 #define EFUSE_OP_CODE_S  0
 
+#define EFUSE_WRITE_OP_CODE 0x5a5a
+#define EFUSE_READ_OP_CODE  0x5aa5
+
 #define EFUSE_STATUS_REG          (DR_REG_EFUSE_BASE + 0x1D0)
 /* EFUSE_REPEAT_ERR_CNT : RO ;bitpos:[17:10] ;default: 8'h0 ; */
 /*description: Indicates the number of error bits during programming BLOCK0.*/
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/efuse_struct.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/efuse_struct.h
index 24915ba8104..358d78c9a3a 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/efuse_struct.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/efuse_struct.h
@@ -76,14 +76,11 @@ typedef volatile struct efuse_dev_s {
             uint32_t dis_download_mode:        1;                /*Set this bit to disable download mode (boot_mode[3:0] = 0  1  2  3  6  7).*/
             uint32_t dis_legacy_spi_boot:      1;                /*Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4).*/
             uint32_t uart_print_channel:       1;                /*Selectes the default UART print channel. 0: UART0. 1: UART1.*/
-            uint32_t flash_ecc_mode:           1;                /*Set ECC mode in ROM  0: ROM would Enable Flash ECC 16to18 byte mode. 1:ROM would use 16to17 byte mode.*/
+            uint32_t rpt4_reserved8:           1;                /*Reserved (used for four backups method).*/
             uint32_t dis_usb_download_mode:    1;                /*Set this bit to disable UART download mode through USB.*/
             uint32_t enable_security_download: 1;                /*Set this bit to enable secure UART download mode.*/
             uint32_t uart_print_control:       2;                /*Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled.*/
-            uint32_t pin_power_selection:      1;                /*GPIO33-GPIO37 power supply selection in ROM code. 0: VDD3P3_CPU. 1: VDD_SPI.*/
-            uint32_t flash_type:               1;                /*Set the maximum lines of SPI flash. 0: four lines. 1: eight lines.*/
-            uint32_t flash_page_size:          2;                /*Set Flash page size.*/
-            uint32_t flash_ecc_en:             1;                /*Set 1 to enable ECC for flash boot.*/
+            uint32_t rpt4_reserved7:           5;                /*Reserved (used for four backups method).*/
             uint32_t force_send_resume:        1;                /*Set this bit to force ROM code to send a resume command during SPI boot.*/
             uint32_t secure_version:          16;                /*Secure version (used by ESP-IDF anti-rollback feature).*/
             uint32_t rpt4_reserved1:           2;                /*Reserved (used for four backups method).*/
@@ -160,14 +157,11 @@ typedef volatile struct efuse_dev_s {
             uint32_t dis_download_mode:        1;                /*The value of DIS_DOWNLOAD_MODE.*/
             uint32_t dis_legacy_spi_boot:      1;                /*The value of DIS_LEGACY_SPI_BOOT.*/
             uint32_t uart_print_channel:       1;                /*The value of UART_PRINT_CHANNEL.*/
-            uint32_t flash_ecc_mode:           1;                /*The value of FLASH_ECC_MODE.*/
+            uint32_t rpt4_reserved8:           1;                /*Reserved.*/
             uint32_t dis_usb_download_mode:    1;                /*The value of DIS_USB_DOWNLOAD_MODE.*/
             uint32_t enable_security_download: 1;                /*The value of ENABLE_SECURITY_DOWNLOAD.*/
             uint32_t uart_print_control:       2;                /*The value of UART_PRINT_CONTROL.*/
-            uint32_t pin_power_selection:      1;                /*The value of PIN_POWER_SELECTION.*/
-            uint32_t flash_type:               1;                /*The value of FLASH_TYPE.*/
-            uint32_t flash_page_size:          2;                /*The value of FLASH_PAGE_SIZE.*/
-            uint32_t flash_ecc_en:             1;                /*The value of FLASH_ECC_EN.*/
+            uint32_t rpt4_reserved7:           5;                /*Reserved.*/
             uint32_t force_send_resume:        1;                /*The value of FORCE_SEND_RESUME.*/
             uint32_t secure_version:          16;                /*The value of SECURE_VERSION.*/
             uint32_t rpt4_reserved1:           2;                /*Reserved.*/
@@ -328,14 +322,11 @@ typedef volatile struct efuse_dev_s {
             uint32_t dis_download_mode_err:        1;            /*If DIS_DOWNLOAD_MODE is 1  then it indicates a programming error.*/
             uint32_t dis_legacy_spi_boot_err:      1;            /*If DIS_LEGACY_SPI_BOOT is 1  then it indicates a programming error.*/
             uint32_t uart_print_channel_err:       1;            /*If UART_PRINT_CHANNEL is 1  then it indicates a programming error.*/
-            uint32_t flash_ecc_mode_err:           1;            /*If FLASH_ECC_MODE is 1  then it indicates a programming error.*/
+            uint32_t rpt4_reserved8_err:           1;            /*Reserved.*/
             uint32_t dis_usb_download_mode_err:    1;            /*If DIS_USB_DOWNLOAD_MODE is 1  then it indicates a programming error.*/
             uint32_t enable_security_download_err: 1;            /*If ENABLE_SECURITY_DOWNLOAD is 1  then it indicates a programming error.*/
             uint32_t uart_print_control_err:       2;            /*If any bit in UART_PRINT_CONTROL is 1  then it indicates a programming error.*/
-            uint32_t pin_power_selection_err:      1;            /*If PIN_POWER_SELECTION is 1  then it indicates a programming error.*/
-            uint32_t flash_type_err:               1;            /*If FLASH_TYPE is 1  then it indicates a programming error.*/
-            uint32_t flash_page_size:              2;            /*If any bits in FLASH_PAGE_SIZE is 1  then it indicates a programming error.*/
-            uint32_t flash_ecc_en:                 1;            /*If FLASH_ECC_EN_ERR is 1  then it indicates a programming error.*/
+            uint32_t rpt4_reserved7_err:           5;            /*Reserved*/
             uint32_t force_send_resume_err:        1;            /*If FORCE_SEND_RESUME is 1  then it indicates a programming error.*/
             uint32_t secure_version_err:          16;            /*If any bit in SECURE_VERSION is 1  then it indicates a programming error.*/
             uint32_t rpt4_reserved1_err:           2;            /*Reserved.*/
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/io_mux_reg.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/io_mux_reg.h
index e9a0795167b..618f8fa5d30 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/io_mux_reg.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/io_mux_reg.h
@@ -138,9 +138,9 @@
 #define SD_DATA2_GPIO_NUM 9
 #define SD_DATA3_GPIO_NUM 10
 
-#define MAX_RTC_GPIO_NUM 0
-#define MAX_PAD_GPIO_NUM 22
-#define MAX_GPIO_NUM    22
+#define MAX_RTC_GPIO_NUM 5
+#define MAX_PAD_GPIO_NUM 21
+#define MAX_GPIO_NUM    25
 
 #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE
 #define PIN_CTRL                          (REG_IO_MUX_BASE +0x00)
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/memprot_defs.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/memprot_defs.h
new file mode 100644
index 00000000000..b08e1f83b4b
--- /dev/null
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/memprot_defs.h
@@ -0,0 +1,100 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "soc/soc.h"
+#include "soc/sensitive_reg.h"
+#include "esp32c3/rom/cache.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef union {
+    struct {
+        uint32_t cat0       : 2;
+        uint32_t cat1       : 2;
+        uint32_t cat2       : 2;
+        uint32_t res0       : 8;
+        uint32_t splitaddr  : 8;
+        uint32_t res1       : 10;
+    };
+    uint32_t val;
+} constrain_reg_fields_t;
+
+#ifndef I_D_SRAM_SEGMENT_SIZE
+#define I_D_SRAM_SEGMENT_SIZE       0x20000
+#endif
+
+#define I_D_SPLIT_LINE_SHIFT        0x9
+#define I_D_FAULT_ADDR_SHIFT        0x2
+
+#define DRAM_SRAM_START             0x3FC7C000
+
+#ifndef MAP_DRAM_TO_IRAM
+#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + SOC_IRAM_LOW)
+#endif
+
+#ifndef MAP_IRAM_TO_DRAM
+#define MAP_IRAM_TO_DRAM(addr)       (addr - SOC_IRAM_LOW + DRAM_SRAM_START)
+#endif
+
+//IRAM0
+
+//16kB (ICACHE)
+#define IRAM0_SRAM_LEVEL_0_LOW      SOC_IRAM_LOW //0x40370000
+#define IRAM0_SRAM_LEVEL_0_HIGH     (IRAM0_SRAM_LEVEL_0_LOW + CACHE_MEMORY_IBANK_SIZE - 0x1) //0x4037FFFF
+
+//128kB (LEVEL 1)
+#define IRAM0_SRAM_LEVEL_1_LOW      (IRAM0_SRAM_LEVEL_0_HIGH + 0x1) //0x40380000
+#define IRAM0_SRAM_LEVEL_1_HIGH     (IRAM0_SRAM_LEVEL_1_LOW + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x4039FFFF
+
+//128kB (LEVEL 2)
+#define IRAM0_SRAM_LEVEL_2_LOW      (IRAM0_SRAM_LEVEL_1_HIGH + 0x1) //0x403A0000
+#define IRAM0_SRAM_LEVEL_2_HIGH     (IRAM0_SRAM_LEVEL_2_LOW + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x403BFFFF
+
+//128kB (LEVEL 3)
+#define IRAM0_SRAM_LEVEL_3_LOW      (IRAM0_SRAM_LEVEL_2_HIGH + 0x1) //0x403C0000
+#define IRAM0_SRAM_LEVEL_3_HIGH     (IRAM0_SRAM_LEVEL_3_LOW + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x403DFFFF
+
+//permission bits
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_R  0x1
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_W  0x2
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_F  0x4
+
+//DRAM0
+
+//16kB ICACHE not available from DRAM0
+
+//128kB (LEVEL 1)
+#define DRAM0_SRAM_LEVEL_1_LOW      SOC_DRAM_LOW //0x3FC80000
+#define DRAM0_SRAM_LEVEL_1_HIGH     (DRAM0_SRAM_LEVEL_1_LOW + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x3FC9FFFF
+
+//128kB (LEVEL 2)
+#define DRAM0_SRAM_LEVEL_2_LOW      (DRAM0_SRAM_LEVEL_1_HIGH + 0x1) //0x3FCA0000
+#define DRAM0_SRAM_LEVEL_2_HIGH     (DRAM0_SRAM_LEVEL_2_LOW + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x3FCBFFFF
+
+//128kB (LEVEL 3)
+#define DRAM0_SRAM_LEVEL_3_LOW      (DRAM0_SRAM_LEVEL_2_HIGH + 0x1) //0x3FCC0000
+#define DRAM0_SRAM_LEVEL_3_HIGH     (DRAM0_SRAM_LEVEL_3_LOW  + I_D_SRAM_SEGMENT_SIZE - 0x1) //0x3FCDFFFF
+
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_R  0x1
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_X_W  0x2
+
+//RTC FAST
+
+//permission bits
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_X_W  0x1
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_X_R  0x2
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_X_F  0x4
+
+#define AREA_LOW                                                0
+#define AREA_HIGH                                               1
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc.h
index db67d3ac517..dccd7a07780 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 
 #include <stdbool.h>
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h
index 0406c5665af..33503c02843 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h
@@ -1,3 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 // The long term plan is to have a single soc_caps.h for each peripheral.
 // During the refactoring and multichip support development process, we
 // seperate these information into periph_caps.h for each peripheral and
@@ -6,6 +12,7 @@
 #pragma once
 
 #define SOC_CPU_CORES_NUM               1
+#define SOC_ADC_SUPPORTED               1
 #define SOC_DEDICATED_GPIO_SUPPORTED    1
 #define SOC_GDMA_SUPPORTED              1
 #define SOC_TWAI_SUPPORTED              1
@@ -36,6 +43,7 @@
 
 /*-------------------------- ADC CAPS -------------------------------*/
 /*!< SAR ADC Module*/
+#define SOC_ADC_DIG_CTRL_SUPPORTED              1
 #define SOC_ADC_ARBITER_SUPPORTED               1
 #define SOC_ADC_FILTER_SUPPORTED                1
 #define SOC_ADC_MONITOR_SUPPORTED               1
@@ -44,7 +52,7 @@
 #define SOC_ADC_MAX_CHANNEL_NUM                 (5)
 
 /*!< Digital */
-#define SOC_ADC_DIGI_CONTROLLER_NUM             (1)
+#define SOC_ADC_DIGI_CONTROLLER_NUM             (1U)
 #define SOC_ADC_PATT_LEN_MAX                    (8) /*!< One pattern table, each contains 8 items. Each item takes 1 byte */
 #define SOC_ADC_DIGI_MAX_BITWIDTH               (12)
 #define SOC_ADC_DIGI_FILTER_NUM                 (2)
@@ -59,7 +67,6 @@
 /*!< Calibration */
 #define SOC_ADC_CALIBRATION_V1_SUPPORTED        (1) /*!< support HW offset calibration version 1*/
 
-
 /*-------------------------- APB BACKUP DMA CAPS -------------------------------*/
 #define SOC_APB_BACKUP_DMA              (1)
 
@@ -168,7 +175,7 @@
 /*-------------------------- RTCIO CAPS --------------------------------------*/
 /* No dedicated RTCIO subsystem on ESP32-C3. RTC functions are still supported
  * for hold, wake & 32kHz crystal functions - via rtc_cntl_reg */
-#define SOC_RTCIO_PIN_COUNT    0
+#define SOC_RTCIO_PIN_COUNT    (0U)
 
 /*--------------------------- RSA CAPS ---------------------------------------*/
 #define SOC_RSA_MAX_BIT_LEN    (3072)
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/uart_channel.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/uart_channel.h
index 855728262ef..2711d7f9dff 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/uart_channel.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/uart_channel.h
@@ -1,61 +1,21 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32C3.
 
 #ifndef _SOC_UART_CHANNEL_H
 #define _SOC_UART_CHANNEL_H
 
 //UART channels
-#define UART_GPIO1_DIRECT_CHANNEL       UART_NUM_0
-#define UART_NUM_0_TXD_DIRECT_GPIO_NUM  1
-#define UART_GPIO3_DIRECT_CHANNEL       UART_NUM_0
-#define UART_NUM_0_RXD_DIRECT_GPIO_NUM  3
-#define UART_GPIO19_DIRECT_CHANNEL      UART_NUM_0
-#define UART_NUM_0_CTS_DIRECT_GPIO_NUM  19
-#define UART_GPIO22_DIRECT_CHANNEL      UART_NUM_0
-#define UART_NUM_0_RTS_DIRECT_GPIO_NUM  22
+#define UART_GPIO21_DIRECT_CHANNEL      UART_NUM_0
+#define UART_NUM_0_TXD_DIRECT_GPIO_NUM  21
+#define UART_GPIO20_DIRECT_CHANNEL      UART_NUM_0
+#define UART_NUM_0_RXD_DIRECT_GPIO_NUM  20
 
-#define UART_TXD_GPIO1_DIRECT_CHANNEL   UART_GPIO1_DIRECT_CHANNEL
-#define UART_RXD_GPIO3_DIRECT_CHANNEL   UART_GPIO3_DIRECT_CHANNEL
-#define UART_CTS_GPIO19_DIRECT_CHANNEL  UART_GPIO19_DIRECT_CHANNEL
-#define UART_RTS_GPIO22_DIRECT_CHANNEL  UART_GPIO22_DIRECT_CHANNEL
-
-#define UART_GPIO10_DIRECT_CHANNEL      UART_NUM_1
-#define UART_NUM_1_TXD_DIRECT_GPIO_NUM  10
-#define UART_GPIO9_DIRECT_CHANNEL       UART_NUM_1
-#define UART_NUM_1_RXD_DIRECT_GPIO_NUM  9
-#define UART_GPIO6_DIRECT_CHANNEL       UART_NUM_1
-#define UART_NUM_1_CTS_DIRECT_GPIO_NUM  6
-#define UART_GPIO11_DIRECT_CHANNEL      UART_NUM_1
-#define UART_NUM_1_RTS_DIRECT_GPIO_NUM  11
-
-#define UART_TXD_GPIO10_DIRECT_CHANNEL  UART_GPIO10_DIRECT_CHANNEL
-#define UART_RXD_GPIO9_DIRECT_CHANNEL   UART_GPIO9_DIRECT_CHANNEL
-#define UART_CTS_GPIO6_DIRECT_CHANNEL   UART_GPIO6_DIRECT_CHANNEL
-#define UART_RTS_GPIO11_DIRECT_CHANNEL  UART_GPIO11_DIRECT_CHANNEL
-
-#define UART_GPIO17_DIRECT_CHANNEL      UART_NUM_2
-#define UART_NUM_2_TXD_DIRECT_GPIO_NUM  17
-#define UART_GPIO16_DIRECT_CHANNEL      UART_NUM_2
-#define UART_NUM_2_RXD_DIRECT_GPIO_NUM  16
-#define UART_GPIO8_DIRECT_CHANNEL       UART_NUM_2
-#define UART_NUM_2_CTS_DIRECT_GPIO_NUM  8
-#define UART_GPIO7_DIRECT_CHANNEL       UART_NUM_2
-#define UART_NUM_2_RTS_DIRECT_GPIO_NUM  7
-
-#define UART_TXD_GPIO17_DIRECT_CHANNEL  UART_GPIO17_DIRECT_CHANNEL
-#define UART_RXD_GPIO16_DIRECT_CHANNEL  UART_GPIO16_DIRECT_CHANNEL
-#define UART_CTS_GPIO8_DIRECT_CHANNEL   UART_GPIO8_DIRECT_CHANNEL
-#define UART_RTS_GPIO7_DIRECT_CHANNEL   UART_GPIO7_DIRECT_CHANNEL
+#define UART_TXD_GPIO21_DIRECT_CHANNEL  UART_GPIO21_DIRECT_CHANNEL
+#define UART_RXD_GPIO20_DIRECT_CHANNEL  UART_GPIO20_DIRECT_CHANNEL
 
 #endif
diff --git a/tools/sdk/esp32c3/include/spi_flash/include/spi_flash_chip_th.h b/tools/sdk/esp32c3/include/spi_flash/include/spi_flash_chip_th.h
new file mode 100644
index 00000000000..7f631faf136
--- /dev/null
+++ b/tools/sdk/esp32c3/include/spi_flash/include/spi_flash_chip_th.h
@@ -0,0 +1,13 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_flash.h"
+#include "spi_flash_chip_driver.h"
+
+extern const spi_flash_chip_t esp_flash_chip_th;
diff --git a/tools/sdk/esp32c3/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h b/tools/sdk/esp32c3/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h
index 2fa64448d49..d477580fa99 100644
--- a/tools/sdk/esp32c3/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h
+++ b/tools/sdk/esp32c3/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h
@@ -15,7 +15,7 @@
 #ifndef _WIFI_PROV_CONFIG_H_
 #define _WIFI_PROV_CONFIG_H_
 
-#include <lwip/inet.h>
+#include <lwip/ip4_addr.h>
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32c3/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h b/tools/sdk/esp32c3/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h
index 9777a424e15..41a6a7d685c 100644
--- a/tools/sdk/esp32c3/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h
+++ b/tools/sdk/esp32c3/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -17,7 +17,13 @@ typedef enum {
     ESP_EAP_TTLS_PHASE2_MSCHAP,
     ESP_EAP_TTLS_PHASE2_PAP,
     ESP_EAP_TTLS_PHASE2_CHAP
-} esp_eap_ttls_phase2_types ;
+} esp_eap_ttls_phase2_types;
+
+typedef struct {
+   int fast_provisioning;
+   int fast_max_pac_list_len;
+   bool fast_pac_format_binary;
+} esp_eap_fast_config;
 
 #ifdef __cplusplus
 extern "C" {
@@ -211,6 +217,35 @@ esp_err_t esp_wifi_sta_wpa2_ent_set_ttls_phase2_method(esp_eap_ttls_phase2_types
   */
 esp_err_t esp_wifi_sta_wpa2_set_suiteb_192bit_certification(bool enable);
 
+/**
+  * @brief  Set client pac file
+  *
+  * @attention  1. For files read from the file system, length has to be decremented by 1 byte.
+  * @attention  2. Disabling the WPA_MBEDTLS_CRYPTO config is required to use EAP-FAST.
+  *
+  * @param  pac_file: pointer to the pac file
+  *         pac_file_len: length of the pac file
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_pac_file(const unsigned char *pac_file, int pac_file_len);
+
+/**
+  * @brief  Set Phase 1 parameters for EAP-FAST
+  *
+  * @attention  1. Disabling the WPA_MBEDTLS_CRYPTO config is required to use EAP-FAST.
+  *
+  * @param  config: eap fast phase 1 configuration
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_ARG: fail(out of bound arguments)
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_fast_phase1_params(esp_eap_fast_config config);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/wpa_supplicant/include/utils/wpabuf.h b/tools/sdk/esp32c3/include/wpa_supplicant/include/utils/wpabuf.h
index e9f4ce7b34e..092b31e08ba 100644
--- a/tools/sdk/esp32c3/include/wpa_supplicant/include/utils/wpabuf.h
+++ b/tools/sdk/esp32c3/include/wpa_supplicant/include/utils/wpabuf.h
@@ -1,6 +1,6 @@
 /*
  * Dynamic data buffer
- * Copyright (c) 2007-2009, Jouni Malinen <j@w1.fi>
+ * Copyright (c) 2007-2012, Jouni Malinen <j@w1.fi>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -15,6 +15,9 @@
 #ifndef WPABUF_H
 #define WPABUF_H
 
+/* wpabuf::buf is a pointer to external data */
+#define WPABUF_FLAG_EXT_DATA BIT(0)
+
 /*
  * Internal data structure for wpabuf. Please do not touch this directly from
  * elsewhere. This is only defined in header file to allow inline functions
@@ -23,8 +26,8 @@
 struct wpabuf {
 	size_t size; /* total size of the allocated buffer */
 	size_t used; /* length of data in the buffer */
-	u8 *ext_data; /* pointer to external data; NULL if data follows
-		       * struct wpabuf */
+	u8 *buf; /* pointer to the head of the buffer */
+	unsigned int flags;
 	/* optionally followed by the allocated buffer */
 };
 
@@ -35,6 +38,7 @@ struct wpabuf * wpabuf_alloc_ext_data(u8 *data, size_t len);
 struct wpabuf * wpabuf_alloc_copy(const void *data, size_t len);
 struct wpabuf * wpabuf_dup(const struct wpabuf *src);
 void wpabuf_free(struct wpabuf *buf);
+void wpabuf_clear_free(struct wpabuf *buf);
 void * wpabuf_put(struct wpabuf *buf, size_t len);
 struct wpabuf * wpabuf_concat(struct wpabuf *a, struct wpabuf *b);
 struct wpabuf * wpabuf_zeropad(struct wpabuf *buf, size_t len);
@@ -78,9 +82,7 @@ static inline size_t wpabuf_tailroom(const struct wpabuf *buf)
  */
 static inline const void * wpabuf_head(const struct wpabuf *buf)
 {
-	if (buf->ext_data)
-		return buf->ext_data;
-	return buf + 1;
+	return buf->buf;
 }
 
 static inline const u8 * wpabuf_head_u8(const struct wpabuf *buf)
@@ -95,9 +97,7 @@ static inline const u8 * wpabuf_head_u8(const struct wpabuf *buf)
  */
 static inline void * wpabuf_mhead(struct wpabuf *buf)
 {
-	if (buf->ext_data)
-		return buf->ext_data;
-	return buf + 1;
+	return buf->buf;
 }
 
 static inline u8 * wpabuf_mhead_u8(struct wpabuf *buf)
@@ -156,7 +156,8 @@ static inline void wpabuf_put_buf(struct wpabuf *dst,
 
 static inline void wpabuf_set(struct wpabuf *buf, const void *data, size_t len)
 {
-	buf->ext_data = (u8 *) data;
+	buf->buf = (u8 *) data;
+	buf->flags = WPABUF_FLAG_EXT_DATA;
 	buf->size = buf->used = len;
 }
 
diff --git a/tools/sdk/esp32c3/include/wpa_supplicant/port/include/os.h b/tools/sdk/esp32c3/include/wpa_supplicant/port/include/os.h
index 74e1e349e91..ce9aa559a44 100644
--- a/tools/sdk/esp32c3/include/wpa_supplicant/port/include/os.h
+++ b/tools/sdk/esp32c3/include/wpa_supplicant/port/include/os.h
@@ -289,6 +289,9 @@ char * ets_strdup(const char *s);
 #ifndef os_strlcpy
 #define os_strlcpy(d, s, n) strlcpy((d), (s), (n))
 #endif
+#ifndef os_strcat
+#define os_strcat(d, s) strcat((d), (s))
+#endif
 
 #ifndef os_snprintf
 #ifdef _MSC_VER
@@ -297,6 +300,9 @@ char * ets_strdup(const char *s);
 #define os_snprintf snprintf
 #endif
 #endif
+#ifndef os_sprintf
+#define os_sprintf sprintf
+#endif
 
 static inline int os_snprintf_error(size_t size, int res)
 {
diff --git a/tools/sdk/esp32c3/include/ws2812_led/led_strip.h b/tools/sdk/esp32c3/include/ws2812_led/led_strip.h
new file mode 100644
index 00000000000..8b0e826c705
--- /dev/null
+++ b/tools/sdk/esp32c3/include/ws2812_led/led_strip.h
@@ -0,0 +1,126 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "esp_err.h"
+
+/**
+* @brief LED Strip Type
+*
+*/
+typedef struct led_strip_s led_strip_t;
+
+/**
+* @brief LED Strip Device Type
+*
+*/
+typedef void *led_strip_dev_t;
+
+/**
+* @brief Declare of LED Strip Type
+*
+*/
+struct led_strip_s {
+    /**
+    * @brief Set RGB for a specific pixel
+    *
+    * @param strip: LED strip
+    * @param index: index of pixel to set
+    * @param red: red part of color
+    * @param green: green part of color
+    * @param blue: blue part of color
+    *
+    * @return
+    *      - ESP_OK: Set RGB for a specific pixel successfully
+    *      - ESP_ERR_INVALID_ARG: Set RGB for a specific pixel failed because of invalid parameters
+    *      - ESP_FAIL: Set RGB for a specific pixel failed because other error occurred
+    */
+    esp_err_t (*set_pixel)(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue);
+
+    /**
+    * @brief Refresh memory colors to LEDs
+    *
+    * @param strip: LED strip
+    * @param timeout_ms: timeout value for refreshing task
+    *
+    * @return
+    *      - ESP_OK: Refresh successfully
+    *      - ESP_ERR_TIMEOUT: Refresh failed because of timeout
+    *      - ESP_FAIL: Refresh failed because some other error occurred
+    *
+    * @note:
+    *      After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip.
+    */
+    esp_err_t (*refresh)(led_strip_t *strip, uint32_t timeout_ms);
+
+    /**
+    * @brief Clear LED strip (turn off all LEDs)
+    *
+    * @param strip: LED strip
+    * @param timeout_ms: timeout value for clearing task
+    *
+    * @return
+    *      - ESP_OK: Clear LEDs successfully
+    *      - ESP_ERR_TIMEOUT: Clear LEDs failed because of timeout
+    *      - ESP_FAIL: Clear LEDs failed because some other error occurred
+    */
+    esp_err_t (*clear)(led_strip_t *strip, uint32_t timeout_ms);
+
+    /**
+    * @brief Free LED strip resources
+    *
+    * @param strip: LED strip
+    *
+    * @return
+    *      - ESP_OK: Free resources successfully
+    *      - ESP_FAIL: Free resources failed because error occurred
+    */
+    esp_err_t (*del)(led_strip_t *strip);
+};
+
+/**
+* @brief LED Strip Configuration Type
+*
+*/
+typedef struct {
+    uint32_t max_leds;   /*!< Maximum LEDs in a single strip */
+    led_strip_dev_t dev; /*!< LED strip device (e.g. RMT channel, PWM channel, etc) */
+} led_strip_config_t;
+
+/**
+ * @brief Default configuration for LED strip
+ *
+ */
+#define LED_STRIP_DEFAULT_CONFIG(number, dev_hdl) \
+    {                                             \
+        .max_leds = number,                       \
+        .dev = dev_hdl,                           \
+    }
+
+/**
+* @brief Install a new ws2812 driver (based on RMT peripheral)
+*
+* @param config: LED strip configuration
+* @return
+*      LED strip instance or NULL
+*/
+led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/ws2812_led/ws2812_led.h b/tools/sdk/esp32c3/include/ws2812_led/ws2812_led.h
new file mode 100644
index 00000000000..8a3e4076663
--- /dev/null
+++ b/tools/sdk/esp32c3/include/ws2812_led/ws2812_led.h
@@ -0,0 +1,44 @@
+/*
+   This example code is in the Public Domain (or CC0 licensed, at your option.)
+
+   Unless required by applicable law or agreed to in writing, this
+   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+*/
+#pragma once
+#include <esp_err.h>
+
+/** Initialize the WS2812 RGB LED
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_init(void);
+
+/** Set RGB value for the WS2812 LED
+ *
+ * @param[in] red Intensity of Red color (0-100)
+ * @param[in] green Intensity of Green color (0-100)
+ * @param[in] blue Intensity of Green color (0-100)
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_set_rgb(uint32_t red, uint32_t green, uint32_t blue);
+
+/** Set HSV value for the WS2812 LED
+ *
+ * @param[in] hue Value of hue in arc degrees (0-360)
+ * @param[in] saturation Saturation in percentage (0-100)
+ * @param[in] value Value (also called Intensity) in percentage (0-100)
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_set_hsv(uint32_t hue, uint32_t saturation, uint32_t value);
+
+/** Clear (turn off) the WS2812 LED
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_clear(void);
diff --git a/tools/sdk/esp32c3/ld/esp32c3.rom.newlib-time.ld b/tools/sdk/esp32c3/ld/esp32c3.rom.newlib-time.ld
new file mode 100644
index 00000000000..27734ced890
--- /dev/null
+++ b/tools/sdk/esp32c3/ld/esp32c3.rom.newlib-time.ld
@@ -0,0 +1,15 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* These are the newlib functions and the .bss/.data symbols which are related to 'time_t'
+   or other structures which include 'time_t' (like 'struct stat').
+   These ROM functions were compiled with sizeof(time_t) == 4.
+   When compiling with sizeof(time_t) == 8, these functions should be excluded from the build.
+ */
+
+_isatty_r = 0x40000380;
+PROVIDE( __smakebuf_r = 0x4000046c );
+PROVIDE( __swhatbuf_r = 0x40000470 );
+PROVIDE( __swsetup_r = 0x4000047c );
diff --git a/tools/sdk/esp32c3/ld/esp32c3.rom.newlib.ld b/tools/sdk/esp32c3/ld/esp32c3.rom.newlib.ld
index c086e8151ca..257a919f3e3 100644
--- a/tools/sdk/esp32c3/ld/esp32c3.rom.newlib.ld
+++ b/tools/sdk/esp32c3/ld/esp32c3.rom.newlib.ld
@@ -25,7 +25,6 @@ strncmp = 0x40000370;
 strlen = 0x40000374;
 strstr = 0x40000378;
 bzero = 0x4000037c;
-_isatty_r = 0x40000380;
 sbrk = 0x40000384;
 isalnum = 0x40000388;
 isalpha = 0x4000038c;
@@ -84,11 +83,8 @@ PROVIDE( fflush = 0x4000045c );
 PROVIDE( _fflush_r = 0x40000460 );
 PROVIDE( _fwalk = 0x40000464 );
 PROVIDE( _fwalk_reent = 0x40000468 );
-PROVIDE( __smakebuf_r = 0x4000046c );
-PROVIDE( __swhatbuf_r = 0x40000470 );
 PROVIDE( __swbuf_r = 0x40000474 );
 __swbuf = 0x40000478;
-PROVIDE( __swsetup_r = 0x4000047c );
 /* Data (.data, .bss, .rodata) */
 syscall_table_ptr = 0x3fcdffe0;
 _global_impure_ptr = 0x3fcdffdc;
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Binary files a/tools/sdk/esp32c3/lib/libprotobuf-c.a and b/tools/sdk/esp32c3/lib/libprotobuf-c.a differ
diff --git a/tools/sdk/esp32c3/lib/libprotocomm.a b/tools/sdk/esp32c3/lib/libprotocomm.a
index 3848a9b02e6..17ae2661139 100644
Binary files a/tools/sdk/esp32c3/lib/libprotocomm.a and b/tools/sdk/esp32c3/lib/libprotocomm.a differ
diff --git a/tools/sdk/esp32c3/lib/libpthread.a b/tools/sdk/esp32c3/lib/libpthread.a
index 94d0af708e2..d1e8fe62266 100644
Binary files a/tools/sdk/esp32c3/lib/libpthread.a and b/tools/sdk/esp32c3/lib/libpthread.a differ
diff --git a/tools/sdk/esp32c3/lib/libqrcode.a b/tools/sdk/esp32c3/lib/libqrcode.a
new file mode 100644
index 00000000000..f9fc6dadd6f
Binary files /dev/null and b/tools/sdk/esp32c3/lib/libqrcode.a differ
diff --git a/tools/sdk/esp32c3/lib/libriscv.a b/tools/sdk/esp32c3/lib/libriscv.a
index c8ee9762f32..5047dea84cf 100644
Binary files a/tools/sdk/esp32c3/lib/libriscv.a and b/tools/sdk/esp32c3/lib/libriscv.a differ
diff --git a/tools/sdk/esp32c3/lib/librmaker_common.a b/tools/sdk/esp32c3/lib/librmaker_common.a
new file mode 100644
index 00000000000..89b4a89740e
Binary files /dev/null and b/tools/sdk/esp32c3/lib/librmaker_common.a differ
diff --git a/tools/sdk/esp32c3/lib/libsdmmc.a b/tools/sdk/esp32c3/lib/libsdmmc.a
index 2f33b9a9d5e..963c18c2c46 100644
Binary files a/tools/sdk/esp32c3/lib/libsdmmc.a and b/tools/sdk/esp32c3/lib/libsdmmc.a differ
diff --git a/tools/sdk/esp32c3/lib/libsmartconfig.a b/tools/sdk/esp32c3/lib/libsmartconfig.a
index 52eb50f3847..0131901e9e2 100644
Binary files a/tools/sdk/esp32c3/lib/libsmartconfig.a and b/tools/sdk/esp32c3/lib/libsmartconfig.a differ
diff --git a/tools/sdk/esp32c3/lib/libsoc.a b/tools/sdk/esp32c3/lib/libsoc.a
index c7fd9ffdfed..c701802b1eb 100644
Binary files a/tools/sdk/esp32c3/lib/libsoc.a and b/tools/sdk/esp32c3/lib/libsoc.a differ
diff --git a/tools/sdk/esp32c3/lib/libspi_flash.a b/tools/sdk/esp32c3/lib/libspi_flash.a
deleted file mode 100644
index 2a0f65981fb..00000000000
Binary files a/tools/sdk/esp32c3/lib/libspi_flash.a and /dev/null differ
diff --git a/tools/sdk/esp32c3/lib/libspiffs.a b/tools/sdk/esp32c3/lib/libspiffs.a
index e754b36ad05..a57ec9a1277 100644
Binary files a/tools/sdk/esp32c3/lib/libspiffs.a and b/tools/sdk/esp32c3/lib/libspiffs.a differ
diff --git a/tools/sdk/esp32c3/lib/libtcp_transport.a b/tools/sdk/esp32c3/lib/libtcp_transport.a
index f48c7b45063..2765273157a 100644
Binary files a/tools/sdk/esp32c3/lib/libtcp_transport.a and b/tools/sdk/esp32c3/lib/libtcp_transport.a differ
diff --git a/tools/sdk/esp32c3/lib/libtcpip_adapter.a b/tools/sdk/esp32c3/lib/libtcpip_adapter.a
index c15bde623c2..7dd68335fae 100644
Binary files a/tools/sdk/esp32c3/lib/libtcpip_adapter.a and b/tools/sdk/esp32c3/lib/libtcpip_adapter.a differ
diff --git a/tools/sdk/esp32c3/lib/libunity.a b/tools/sdk/esp32c3/lib/libunity.a
index 736e24b10a6..81dc03d430c 100644
Binary files a/tools/sdk/esp32c3/lib/libunity.a and b/tools/sdk/esp32c3/lib/libunity.a differ
diff --git a/tools/sdk/esp32c3/lib/libvfs.a b/tools/sdk/esp32c3/lib/libvfs.a
index fe76f424f49..92b59631503 100644
Binary files a/tools/sdk/esp32c3/lib/libvfs.a and b/tools/sdk/esp32c3/lib/libvfs.a differ
diff --git a/tools/sdk/esp32c3/lib/libwapi.a b/tools/sdk/esp32c3/lib/libwapi.a
index 08a268fc906..5904a44751b 100644
Binary files a/tools/sdk/esp32c3/lib/libwapi.a and b/tools/sdk/esp32c3/lib/libwapi.a differ
diff --git a/tools/sdk/esp32c3/lib/libwear_levelling.a b/tools/sdk/esp32c3/lib/libwear_levelling.a
index 6faf5f9ceee..f373ec82015 100644
Binary files a/tools/sdk/esp32c3/lib/libwear_levelling.a and b/tools/sdk/esp32c3/lib/libwear_levelling.a differ
diff --git a/tools/sdk/esp32c3/lib/libwifi_provisioning.a b/tools/sdk/esp32c3/lib/libwifi_provisioning.a
index 0273edbc296..3966dda1d28 100644
Binary files a/tools/sdk/esp32c3/lib/libwifi_provisioning.a and b/tools/sdk/esp32c3/lib/libwifi_provisioning.a differ
diff --git a/tools/sdk/esp32c3/lib/libwpa_supplicant.a b/tools/sdk/esp32c3/lib/libwpa_supplicant.a
index 1cd84fcda9d..57f8268de39 100644
Binary files a/tools/sdk/esp32c3/lib/libwpa_supplicant.a and b/tools/sdk/esp32c3/lib/libwpa_supplicant.a differ
diff --git a/tools/sdk/esp32c3/lib/libws2812_led.a b/tools/sdk/esp32c3/lib/libws2812_led.a
new file mode 100644
index 00000000000..a40df230896
Binary files /dev/null and b/tools/sdk/esp32c3/lib/libws2812_led.a differ
diff --git a/tools/sdk/esp32c3/include/config/sdkconfig.h b/tools/sdk/esp32c3/qspi_qspi/include/sdkconfig.h
similarity index 92%
rename from tools/sdk/esp32c3/include/config/sdkconfig.h
rename to tools/sdk/esp32c3/qspi_qspi/include/sdkconfig.h
index e2a47666e88..750b6236242 100644
--- a/tools/sdk/esp32c3/include/config/sdkconfig.h
+++ b/tools/sdk/esp32c3/qspi_qspi/include/sdkconfig.h
@@ -28,7 +28,7 @@
 #define CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE 1
 #define CONFIG_BOOT_ROM_LOG_ALWAYS_ON 1
 #define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
-#define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1
+#define CONFIG_ESPTOOLPY_FLASHMODE_QIO 1
 #define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
 #define CONFIG_ESPTOOLPY_FLASHMODE "dio"
 #define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1
@@ -48,6 +48,19 @@
 #define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
 #define CONFIG_PARTITION_TABLE_OFFSET 0x8000
 #define CONFIG_PARTITION_TABLE_MD5 1
+#define CONFIG_LIB_BUILDER_FLASHMODE "qio"
+#define CONFIG_LIB_BUILDER_FLASHFREQ "80m"
+#define CONFIG_ESP_RMAKER_ASSISTED_CLAIM 1
+#define CONFIG_ESP_RMAKER_CLAIM_TYPE 2
+#define CONFIG_ESP_RMAKER_MQTT_HOST "a1p72mufdu6064-ats.iot.us-east-1.amazonaws.com"
+#define CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE 1024
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0 1
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM 0
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH 1
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD 0
+#define CONFIG_ESP_RMAKER_OTA_HTTP_RX_BUFFER_SIZE 1024
+#define CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES 10
+#define CONFIG_ESP_RMAKER_SCENES_MAX_SCENES 10
 #define CONFIG_ENABLE_ARDUINO_DEPENDS 1
 #define CONFIG_AUTOSTART_ARDUINO 1
 #define CONFIG_ARDUINO_RUN_CORE0 1
@@ -66,7 +79,11 @@
 #define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
 #define CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL 2
 #define CONFIG_COMPILER_HIDE_PATHS_MACROS 1
-#define CONFIG_COMPILER_STACK_CHECK_MODE_NONE 1
+#define CONFIG_COMPILER_CXX_EXCEPTIONS 1
+#define CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE 0
+#define CONFIG_COMPILER_STACK_CHECK_MODE_NORM 1
+#define CONFIG_COMPILER_STACK_CHECK 1
+#define CONFIG_COMPILER_WARN_WRITE_STRINGS 1
 #define CONFIG_APPTRACE_DEST_NONE 1
 #define CONFIG_APPTRACE_LOCK_ENABLE 1
 #define CONFIG_BT_ENABLED 1
@@ -79,6 +96,7 @@
 #define CONFIG_BT_CTRL_HCI_MODE_VHCI 1
 #define CONFIG_BT_CTRL_HCI_TL 1
 #define CONFIG_BT_CTRL_ADV_DUP_FILT_MAX 30
+#define CONFIG_BT_CTRL_HW_CCA_VAL 20
 #define CONFIG_BT_CTRL_HW_CCA_EFF 0
 #define CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG 1
 #define CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF 0
@@ -189,7 +207,7 @@
 #define CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR 1
 #define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
 #define CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH 1
-#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 512
+#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 1024
 #define CONFIG_HTTPD_MAX_URI_LEN 512
 #define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
 #define CONFIG_HTTPD_PURGE_BUF_LEN 32
@@ -203,6 +221,7 @@
 #define CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES 4
 #define CONFIG_ESP_SLEEP_POWER_DOWN_FLASH 1
 #define CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND 1
+#define CONFIG_RTC_CLOCK_BBPLL_POWER_ON_WITH_USB 1
 #define CONFIG_ESP_IPC_TASK_STACK_SIZE 1024
 #define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE 32
 #define CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL 120
@@ -211,6 +230,7 @@
 #define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
 #define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
 #define CONFIG_ESP_PHY_MAX_TX_POWER 20
+#define CONFIG_ESP_PHY_ENABLE_USB 1
 #define CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP 1
 #define CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT 1
 #define CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE 1
@@ -343,6 +363,7 @@
 #define CONFIG_LWIP_TCPIP_RECVMBOX_SIZE 32
 #define CONFIG_LWIP_DHCP_DOES_ARP_CHECK 1
 #define CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID 1
+#define CONFIG_LWIP_DHCP_RESTORE_LAST_IP 1
 #define CONFIG_LWIP_DHCP_OPTIONS_LEN 128
 #define CONFIG_LWIP_DHCPS 1
 #define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
@@ -388,6 +409,7 @@
 #define CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN 1
 #define CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN 16384
 #define CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN 4096
+#define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
 #define CONFIG_MBEDTLS_HARDWARE_AES 1
@@ -481,6 +503,7 @@
 #define CONFIG_SPI_FLASH_SUPPORT_GD_CHIP 1
 #define CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP 1
 #define CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_TH_CHIP 1
 #define CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE 1
 #define CONFIG_SPIFFS_MAX_PARTITIONS 3
 #define CONFIG_SPIFFS_CACHE 1
@@ -510,6 +533,23 @@
 #define CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES 16
 #define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
 #define CONFIG_WPA_MBEDTLS_CRYPTO 1
+#define CONFIG_IO_GLITCH_FILTER_TIME_MS 50
+#define CONFIG_ESP_RMAKER_LIB_ESP_MQTT 1
+#define CONFIG_ESP_RMAKER_MQTT_GLUE_LIB 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT_443 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT 1
+#define CONFIG_ESP_RMAKER_MQTT_SEND_USERNAME 1
+#define CONFIG_ESP_RMAKER_MQTT_USERNAME "?Platform=APN/1 ESPIF,RAINMAKER,v1.0"
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK 4096
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_PRIORITY 5
+#define CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME "fctry"
+#define CONFIG_ESP_RMAKER_FACTORY_NAMESPACE "rmaker_creds"
+#define CONFIG_ESP_RMAKER_DEF_TIMEZONE "Asia/Shanghai"
+#define CONFIG_ESP_RMAKER_SNTP_SERVER_NAME "pool.ntp.org"
+#define CONFIG_DSP_ANSI 1
+#define CONFIG_DSP_OPTIMIZATION 0
+#define CONFIG_DSP_MAX_FFT_SIZE_4096 1
+#define CONFIG_DSP_MAX_FFT_SIZE 4096
 #define CONFIG_LITTLEFS_MAX_PARTITIONS 3
 #define CONFIG_LITTLEFS_PAGE_SIZE 256
 #define CONFIG_LITTLEFS_OBJ_NAME_LEN 64
@@ -539,6 +579,8 @@
 #define CONFIG_BTU_TASK_STACK_SIZE CONFIG_BT_BTU_TASK_STACK_SIZE
 #define CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
 #define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
+#define CONFIG_CXX_EXCEPTIONS CONFIG_COMPILER_CXX_EXCEPTIONS
+#define CONFIG_CXX_EXCEPTIONS_EMG_POOL_SIZE CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE
 #define CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
 #define CONFIG_ESP32C3_MEMPROT_FEATURE CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
 #define CONFIG_ESP32C3_MEMPROT_FEATURE_LOCK CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK
@@ -561,7 +603,7 @@
 #define CONFIG_ESP_GRATUITOUS_ARP CONFIG_LWIP_ESP_GRATUITOUS_ARP
 #define CONFIG_ESP_SYSTEM_PD_FLASH CONFIG_ESP_SLEEP_POWER_DOWN_FLASH
 #define CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
-#define CONFIG_FLASHMODE_DIO CONFIG_ESPTOOLPY_FLASHMODE_DIO
+#define CONFIG_FLASHMODE_QIO CONFIG_ESPTOOLPY_FLASHMODE_QIO
 #define CONFIG_GAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING
 #define CONFIG_GARP_TMR_INTERVAL CONFIG_LWIP_GARP_TMR_INTERVAL
 #define CONFIG_GATTC_ENABLE CONFIG_BT_GATTC_ENABLE
@@ -605,7 +647,7 @@
 #define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
 #define CONFIG_SMP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING
 #define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS
-#define CONFIG_STACK_CHECK_NONE CONFIG_COMPILER_STACK_CHECK_MODE_NONE
+#define CONFIG_STACK_CHECK_NORM CONFIG_COMPILER_STACK_CHECK_MODE_NORM
 #define CONFIG_SUPPORT_TERMIOS CONFIG_VFS_SUPPORT_TERMIOS
 #define CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT
 #define CONFIG_SW_COEXIST_ENABLE CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE
@@ -632,5 +674,6 @@
 #define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
 #define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
 #define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
-#define CONFIG_ARDUINO_IDF_COMMIT "a79dc75f0a"
+#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
+#define CONFIG_ARDUINO_IDF_COMMIT "b8050b365e"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32c3/qspi_qspi/libbootloader_support.a b/tools/sdk/esp32c3/qspi_qspi/libbootloader_support.a
new file mode 100644
index 00000000000..eb785ebe60b
Binary files /dev/null and b/tools/sdk/esp32c3/qspi_qspi/libbootloader_support.a differ
diff --git a/tools/sdk/esp32c3/qspi_qspi/libesp_hw_support.a b/tools/sdk/esp32c3/qspi_qspi/libesp_hw_support.a
new file mode 100644
index 00000000000..60089e301ee
Binary files /dev/null and b/tools/sdk/esp32c3/qspi_qspi/libesp_hw_support.a differ
diff --git a/tools/sdk/esp32c3/qspi_qspi/libesp_system.a b/tools/sdk/esp32c3/qspi_qspi/libesp_system.a
new file mode 100644
index 00000000000..2cdce053943
Binary files /dev/null and b/tools/sdk/esp32c3/qspi_qspi/libesp_system.a differ
diff --git a/tools/sdk/esp32c3/qspi_qspi/libfreertos.a b/tools/sdk/esp32c3/qspi_qspi/libfreertos.a
new file mode 100644
index 00000000000..90e35db9e41
Binary files /dev/null and b/tools/sdk/esp32c3/qspi_qspi/libfreertos.a differ
diff --git a/tools/sdk/esp32c3/qspi_qspi/libspi_flash.a b/tools/sdk/esp32c3/qspi_qspi/libspi_flash.a
new file mode 100644
index 00000000000..5810a92bce8
Binary files /dev/null and b/tools/sdk/esp32c3/qspi_qspi/libspi_flash.a differ
diff --git a/tools/sdk/esp32c3/ld/sections.ld b/tools/sdk/esp32c3/qspi_qspi/sections.ld
similarity index 80%
rename from tools/sdk/esp32c3/ld/sections.ld
rename to tools/sdk/esp32c3/qspi_qspi/sections.ld
index 2925ee3ad56..ab4e3c04bf4 100644
--- a/tools/sdk/esp32c3/ld/sections.ld
+++ b/tools/sdk/esp32c3/qspi_qspi/sections.ld
@@ -20,25 +20,20 @@ SECTIONS
   .rtc.text :
   {
     . = ALIGN(4);
+    _rtc_fast_start = ABSOLUTE(.);
 
     *(.rtc.literal .rtc.text .rtc.text.*)
 
     *rtc_wake_stub*.*(.literal .text .literal.* .text.*)
+    *(.rtc_text_end_test)
+
+    /* 16B padding for possible CPU prefetch and 4B alignment for PMS split lines */
+    . += _esp_memprot_prefetch_pad_size;
+    . = ALIGN(4);
+
     _rtc_text_end = ABSOLUTE(.);
   } > rtc_iram_seg
 
-  /**
-   * This section is required to skip rtc.text area because rtc_iram_seg and
-   * rtc_data_seg are reflect the same address space on different buses.
-   */
-  .rtc.dummy :
-  {
-    _rtc_dummy_start = ABSOLUTE(.);
-    _rtc_fast_start = ABSOLUTE(.);
-    . = SIZEOF(.rtc.text);
-    _rtc_dummy_end = ABSOLUTE(.);
-  } > rtc_data_seg
-
   /**
    * This section located in RTC FAST Memory area.
    * It holds data marked with RTC_FAST_ATTR attribute.
@@ -202,6 +197,7 @@ SECTIONS
     *libspi_flash.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
 
@@ -237,7 +233,7 @@ SECTIONS
     *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*)
     *(.dram1 .dram1.*)
     _coredump_dram_start = ABSOLUTE(.);
-    *(.dram1.coredump .dram1.coredump.*)
+    *(.dram2.coredump .dram2.coredump.*)
     _coredump_dram_end = ABSOLUTE(.);
     *libapp_trace.a:app_trace.*(.rodata .rodata.*)
     *libapp_trace.a:app_trace_util.*(.rodata .rodata.*)
@@ -284,6 +280,7 @@ SECTIONS
     *libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_chip_mxic.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_rom_patch.*(.rodata .rodata.*)
 
@@ -353,7 +350,7 @@ SECTIONS
     _instruction_reserved_start = ABSOLUTE(.);
     _text_start = ABSOLUTE(.);
 
-    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .text.*)
+    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .text.*)
     *(.wifi0iram .wifi0iram.*)
     *(.wifiorslpiram .wifiorslpiram.*)
     *(.wifirxiram .wifirxiram.*)
@@ -427,7 +424,7 @@ SECTIONS
   {
     _flash_rodata_start = ABSOLUTE(.);
 
-    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
+    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:save-restore.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
     *(.rodata_wlog_error .rodata_wlog_error.*)
 
     *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
@@ -523,11 +520,11 @@ SECTIONS
   /* Marks the end of IRAM code segment */
   .iram0.text_end (NOLOAD) :
   {
+    /* iram_end_test section exists for use by Memprot unit tests only */
+    *(.iram_end_test)
     /* ESP32-C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */
     . += _esp_memprot_prefetch_pad_size;
     . = ALIGN(_esp_memprot_align_size);
-    /* iram_end_test section exists for use by memprot unit tests only */
-    *(.iram_end_test)
     _iram_text_end = ABSOLUTE(.);
   } > iram0_0_seg
 
@@ -538,7 +535,7 @@ SECTIONS
 
     *(.iram.data .iram.data.*)
     _coredump_iram_start = ABSOLUTE(.);
-    *(.iram.data.coredump .iram.data.coredump.*)
+    *(.iram2.coredump .iram2.coredump.*)
     _coredump_iram_end = ABSOLUTE(.);
 
     _iram_data_end = ABSOLUTE(.);
diff --git a/tools/sdk/esp32c3/sdkconfig b/tools/sdk/esp32c3/sdkconfig
index 2cceb4ecc9b..940e91f67dc 100644
--- a/tools/sdk/esp32c3/sdkconfig
+++ b/tools/sdk/esp32c3/sdkconfig
@@ -89,9 +89,9 @@ CONFIG_BOOT_ROM_LOG_ALWAYS_ON=y
 #
 CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200
 # CONFIG_ESPTOOLPY_NO_STUB is not set
-# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set
+CONFIG_ESPTOOLPY_FLASHMODE_QIO=y
 # CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set
-CONFIG_ESPTOOLPY_FLASHMODE_DIO=y
+# CONFIG_ESPTOOLPY_FLASHMODE_DIO is not set
 # CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set
 CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y
 CONFIG_ESPTOOLPY_FLASHMODE="dio"
@@ -138,6 +138,50 @@ CONFIG_PARTITION_TABLE_OFFSET=0x8000
 CONFIG_PARTITION_TABLE_MD5=y
 # end of Partition Table
 
+CONFIG_LIB_BUILDER_FLASHMODE="qio"
+CONFIG_LIB_BUILDER_FLASHFREQ="80m"
+
+#
+# ESP RainMaker Config
+#
+# CONFIG_ESP_RMAKER_NO_CLAIM is not set
+# CONFIG_ESP_RMAKER_SELF_CLAIM is not set
+CONFIG_ESP_RMAKER_ASSISTED_CLAIM=y
+CONFIG_ESP_RMAKER_CLAIM_TYPE=2
+CONFIG_ESP_RMAKER_MQTT_HOST="a1p72mufdu6064-ats.iot.us-east-1.amazonaws.com"
+CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE=1024
+# CONFIG_ESP_RMAKER_DISABLE_USER_MAPPING_PROV is not set
+# CONFIG_ESP_RMAKER_USER_ID_CHECK is not set
+# CONFIG_ESP_RMAKER_LOCAL_CTRL_ENABLE is not set
+CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0=y
+# CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_1 is not set
+CONFIG_ESP_RMAKER_CONSOLE_UART_NUM=0
+
+#
+# ESP RainMaker OTA Config
+#
+CONFIG_ESP_RMAKER_OTA_AUTOFETCH=y
+CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD=0
+# CONFIG_ESP_RMAKER_SKIP_COMMON_NAME_CHECK is not set
+# CONFIG_ESP_RMAKER_SKIP_VERSION_CHECK is not set
+# CONFIG_ESP_RMAKER_SKIP_PROJECT_NAME_CHECK is not set
+CONFIG_ESP_RMAKER_OTA_HTTP_RX_BUFFER_SIZE=1024
+# end of ESP RainMaker OTA Config
+
+#
+# ESP RainMaker Scheduling
+#
+CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES=10
+# end of ESP RainMaker Scheduling
+
+#
+# ESP RainMaker Scenes
+#
+CONFIG_ESP_RMAKER_SCENES_MAX_SCENES=10
+# CONFIG_ESP_RMAKER_SCENES_DEACTIVATE_SUPPORT is not set
+# end of ESP RainMaker Scenes
+# end of ESP RainMaker Config
+
 #
 # Arduino Configuration
 #
@@ -202,13 +246,15 @@ CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=2
 # CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set
 CONFIG_COMPILER_HIDE_PATHS_MACROS=y
-# CONFIG_COMPILER_CXX_EXCEPTIONS is not set
+CONFIG_COMPILER_CXX_EXCEPTIONS=y
+CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE=0
 # CONFIG_COMPILER_CXX_RTTI is not set
-CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y
-# CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set
+# CONFIG_COMPILER_STACK_CHECK_MODE_NONE is not set
+CONFIG_COMPILER_STACK_CHECK_MODE_NORM=y
 # CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set
 # CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set
-# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set
+CONFIG_COMPILER_STACK_CHECK=y
+CONFIG_COMPILER_WARN_WRITE_STRINGS=y
 # CONFIG_COMPILER_SAVE_RESTORE_LIBCALLS is not set
 # CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set
 # CONFIG_COMPILER_DUMP_RTL_FILES is not set
@@ -251,6 +297,7 @@ CONFIG_BT_CTRL_HCI_MODE_VHCI=y
 CONFIG_BT_CTRL_HCI_TL=1
 CONFIG_BT_CTRL_ADV_DUP_FILT_MAX=30
 # CONFIG_BT_CTRL_HW_CCA is not set
+CONFIG_BT_CTRL_HW_CCA_VAL=20
 CONFIG_BT_CTRL_HW_CCA_EFF=0
 CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG=y
 # CONFIG_BT_CTRL_CE_LENGTH_TYPE_CE is not set
@@ -565,6 +612,13 @@ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
 #
 # CONFIG_UART_ISR_IN_IRAM is not set
 # end of UART configuration
+
+#
+# GDMA Configuration
+#
+# CONFIG_GDMA_CTRL_FUNC_IN_IRAM is not set
+# CONFIG_GDMA_ISR_IRAM_SAFE is not set
+# end of GDMA Configuration
 # end of Driver configurations
 
 #
@@ -599,7 +653,6 @@ CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ=160
 CONFIG_ESP32C3_REV_MIN_3=y
 CONFIG_ESP32C3_REV_MIN=3
 CONFIG_ESP32C3_DEBUG_OCDAWARE=y
-# CONFIG_ESP32C3_DEBUG_STUBS_ENABLE is not set
 CONFIG_ESP32C3_BROWNOUT_DET=y
 CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_7=y
 # CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_6 is not set
@@ -665,7 +718,7 @@ CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH=y
 #
 # HTTP Server
 #
-CONFIG_HTTPD_MAX_REQ_HDR_LEN=512
+CONFIG_HTTPD_MAX_REQ_HDR_LEN=1024
 CONFIG_HTTPD_MAX_URI_LEN=512
 CONFIG_HTTPD_ERR_RESP_NO_DELAY=y
 CONFIG_HTTPD_PURGE_BUF_LEN=32
@@ -708,6 +761,12 @@ CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y
 CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND=y
 # CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND is not set
 # end of Sleep Config
+
+#
+# RTC Clock Config
+#
+CONFIG_RTC_CLOCK_BBPLL_POWER_ON_WITH_USB=y
+# end of RTC Clock Config
 # end of Hardware Settings
 
 #
@@ -743,6 +802,7 @@ CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y
 # CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION is not set
 CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20
 CONFIG_ESP_PHY_MAX_TX_POWER=20
+CONFIG_ESP_PHY_ENABLE_USB=y
 # end of PHY
 
 #
@@ -798,6 +858,7 @@ CONFIG_ESP_TASK_WDT=y
 CONFIG_ESP_TASK_WDT_TIMEOUT_S=5
 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
 # CONFIG_ESP_PANIC_HANDLER_IRAM is not set
+# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set
 CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y
 # end of ESP System Settings
 
@@ -1050,7 +1111,7 @@ CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32
 CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y
 # CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set
 CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID=y
-# CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set
+CONFIG_LWIP_DHCP_RESTORE_LAST_IP=y
 CONFIG_LWIP_DHCP_OPTIONS_LEN=128
 
 #
@@ -1174,6 +1235,15 @@ CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096
 # CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set
 # CONFIG_MBEDTLS_DEBUG is not set
 
+#
+# mbedTLS v2.28.x related
+#
+# CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set
+# CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set
+# CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set
+CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE=y
+# end of mbedTLS v2.28.x related
+
 #
 # Certificate Bundle
 #
@@ -1390,6 +1460,7 @@ CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y
 CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
 CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y
 CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_TH_CHIP=y
 # end of Auto-detect flash chips
 
 CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y
@@ -1500,6 +1571,53 @@ CONFIG_WPA_MBEDTLS_CRYPTO=y
 # CONFIG_WPA_11KV_SUPPORT is not set
 # end of Supplicant
 
+#
+# Button
+#
+CONFIG_IO_GLITCH_FILTER_TIME_MS=50
+# end of Button
+
+#
+# ESP RainMaker Common
+#
+CONFIG_ESP_RMAKER_LIB_ESP_MQTT=y
+# CONFIG_ESP_RMAKER_LIB_AWS_IOT is not set
+CONFIG_ESP_RMAKER_MQTT_GLUE_LIB=1
+CONFIG_ESP_RMAKER_MQTT_PORT_443=y
+# CONFIG_ESP_RMAKER_MQTT_PORT_8883 is not set
+CONFIG_ESP_RMAKER_MQTT_PORT=1
+# CONFIG_ESP_RMAKER_MQTT_PERSISTENT_SESSION is not set
+CONFIG_ESP_RMAKER_MQTT_SEND_USERNAME=y
+CONFIG_ESP_RMAKER_MQTT_USERNAME="?Platform=APN/1 ESPIF,RAINMAKER,v1.0"
+CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK=4096
+CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_PRIORITY=5
+CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME="fctry"
+CONFIG_ESP_RMAKER_FACTORY_NAMESPACE="rmaker_creds"
+CONFIG_ESP_RMAKER_DEF_TIMEZONE="Asia/Shanghai"
+CONFIG_ESP_RMAKER_SNTP_SERVER_NAME="pool.ntp.org"
+# end of ESP RainMaker Common
+
+#
+# WS2812 RGB LED
+#
+# CONFIG_WS2812_LED_ENABLE is not set
+# end of WS2812 RGB LED
+
+#
+# DSP Library
+#
+CONFIG_DSP_ANSI=y
+CONFIG_DSP_OPTIMIZATION=0
+# CONFIG_DSP_MAX_FFT_SIZE_512 is not set
+# CONFIG_DSP_MAX_FFT_SIZE_1024 is not set
+# CONFIG_DSP_MAX_FFT_SIZE_2048 is not set
+CONFIG_DSP_MAX_FFT_SIZE_4096=y
+# CONFIG_DSP_MAX_FFT_SIZE_8192 is not set
+# CONFIG_DSP_MAX_FFT_SIZE_16384 is not set
+# CONFIG_DSP_MAX_FFT_SIZE_32768 is not set
+CONFIG_DSP_MAX_FFT_SIZE=4096
+# end of DSP Library
+
 #
 # LittleFS
 #
@@ -1517,6 +1635,7 @@ CONFIG_LITTLEFS_USE_MTIME=y
 CONFIG_LITTLEFS_MTIME_USE_SECONDS=y
 # CONFIG_LITTLEFS_MTIME_USE_NONCE is not set
 # CONFIG_LITTLEFS_SPIFFS_COMPAT is not set
+# CONFIG_LITTLEFS_FLUSH_FILE_EVERY_WRITE is not set
 # end of LittleFS
 # end of Component config
 
@@ -1537,9 +1656,9 @@ CONFIG_LOG_BOOTLOADER_LEVEL_NONE=y
 CONFIG_LOG_BOOTLOADER_LEVEL=0
 # CONFIG_APP_ROLLBACK_ENABLE is not set
 # CONFIG_FLASH_ENCRYPTION_ENABLED is not set
-# CONFIG_FLASHMODE_QIO is not set
+CONFIG_FLASHMODE_QIO=y
 # CONFIG_FLASHMODE_QOUT is not set
-CONFIG_FLASHMODE_DIO=y
+# CONFIG_FLASHMODE_DIO is not set
 # CONFIG_FLASHMODE_DOUT is not set
 # CONFIG_MONITOR_BAUD_9600B is not set
 # CONFIG_MONITOR_BAUD_57600B is not set
@@ -1556,12 +1675,14 @@ CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y
 # CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set
 # CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set
 CONFIG_OPTIMIZATION_ASSERTION_LEVEL=2
-# CONFIG_CXX_EXCEPTIONS is not set
-CONFIG_STACK_CHECK_NONE=y
-# CONFIG_STACK_CHECK_NORM is not set
+CONFIG_CXX_EXCEPTIONS=y
+CONFIG_CXX_EXCEPTIONS_EMG_POOL_SIZE=0
+# CONFIG_STACK_CHECK_NONE is not set
+CONFIG_STACK_CHECK_NORM=y
 # CONFIG_STACK_CHECK_STRONG is not set
 # CONFIG_STACK_CHECK_ALL is not set
-# CONFIG_WARN_WRITE_STRINGS is not set
+CONFIG_STACK_CHECK=y
+CONFIG_WARN_WRITE_STRINGS=y
 # CONFIG_DISABLE_GCC8_WARNINGS is not set
 # CONFIG_ESP32_APPTRACE_DEST_TRAX is not set
 CONFIG_ESP32_APPTRACE_DEST_NONE=y
@@ -1778,6 +1899,7 @@ CONFIG_TASK_WDT=y
 # CONFIG_TASK_WDT_PANIC is not set
 CONFIG_TASK_WDT_TIMEOUT_S=5
 CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
+# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set
 CONFIG_TIMER_TASK_STACK_SIZE=3584
 CONFIG_SW_COEXIST_ENABLE=y
 # CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
diff --git a/tools/sdk/esp32s2/bin/bootloader_dio_40m.bin b/tools/sdk/esp32s2/bin/bootloader_dio_40m.bin
index d15a1d22c9b..0dd5bdca474 100644
Binary files a/tools/sdk/esp32s2/bin/bootloader_dio_40m.bin and b/tools/sdk/esp32s2/bin/bootloader_dio_40m.bin differ
diff --git a/tools/sdk/esp32s2/bin/bootloader_dio_80m.bin b/tools/sdk/esp32s2/bin/bootloader_dio_80m.bin
index f5a22f88a6e..0e87040269a 100644
Binary files a/tools/sdk/esp32s2/bin/bootloader_dio_80m.bin and b/tools/sdk/esp32s2/bin/bootloader_dio_80m.bin differ
diff --git a/tools/sdk/esp32s2/bin/bootloader_dout_40m.bin b/tools/sdk/esp32s2/bin/bootloader_dout_40m.bin
index 18b8ac82cfb..ad08fa18bd0 100644
Binary files a/tools/sdk/esp32s2/bin/bootloader_dout_40m.bin and b/tools/sdk/esp32s2/bin/bootloader_dout_40m.bin differ
diff --git a/tools/sdk/esp32s2/bin/bootloader_dout_80m.bin b/tools/sdk/esp32s2/bin/bootloader_dout_80m.bin
index 73716ffffee..3cbd6e80cba 100644
Binary files a/tools/sdk/esp32s2/bin/bootloader_dout_80m.bin and b/tools/sdk/esp32s2/bin/bootloader_dout_80m.bin differ
diff --git a/tools/sdk/esp32s2/bin/bootloader_qio_40m.bin b/tools/sdk/esp32s2/bin/bootloader_qio_40m.bin
index 8a89af1b14a..5a5d59be118 100644
Binary files a/tools/sdk/esp32s2/bin/bootloader_qio_40m.bin and b/tools/sdk/esp32s2/bin/bootloader_qio_40m.bin differ
diff --git a/tools/sdk/esp32s2/bin/bootloader_qio_80m.bin b/tools/sdk/esp32s2/bin/bootloader_qio_80m.bin
index d5cb266d8aa..5c3dc05d9c7 100644
Binary files a/tools/sdk/esp32s2/bin/bootloader_qio_80m.bin and b/tools/sdk/esp32s2/bin/bootloader_qio_80m.bin differ
diff --git a/tools/sdk/esp32s2/bin/bootloader_qout_40m.bin b/tools/sdk/esp32s2/bin/bootloader_qout_40m.bin
index 3e08d59b321..c01180fd9c3 100644
Binary files a/tools/sdk/esp32s2/bin/bootloader_qout_40m.bin and b/tools/sdk/esp32s2/bin/bootloader_qout_40m.bin differ
diff --git a/tools/sdk/esp32s2/bin/bootloader_qout_80m.bin b/tools/sdk/esp32s2/bin/bootloader_qout_80m.bin
index 4ac736f2c48..3fc43dd14c0 100644
Binary files a/tools/sdk/esp32s2/bin/bootloader_qout_80m.bin and b/tools/sdk/esp32s2/bin/bootloader_qout_80m.bin differ
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/audio/audio_device.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/audio/audio_device.h
index 5a469523c9f..f406cf28110 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/audio/audio_device.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/audio/audio_device.h
@@ -186,6 +186,11 @@
 #define CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP                    0                             // Feedback - 0 or 1
 #endif
 
+// Enable/disable conversion from 16.16 to 10.14 format on full-speed devices. See tud_audio_n_fb_set().
+#ifndef CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION
+#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION     0                             // 0 or 1
+#endif
+
 // Audio interrupt control EP size - disabled if 0
 #ifndef CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN
 #define CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN                     0                             // Audio interrupt control - if required - 6 Bytes according to UAC 2 specification (p. 74)
@@ -454,10 +459,15 @@ TU_ATTR_WEAK bool tud_audio_rx_done_post_read_cb(uint8_t rhport, uint16_t n_byte
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 TU_ATTR_WEAK bool tud_audio_fb_done_cb(uint8_t rhport);
-// User code should call this function with feedback value in 16.16 format for FS and HS.
-// Value will be corrected for FS to 10.14 format automatically.
-// (see Universal Serial Bus Specification Revision 2.0 5.12.4.2).
-// Feedback value will be sent at FB endpoint interval till it's changed.
+
+// This function is used to provide data rate feedback from an asynchronous sink. Feedback value will be sent at FB endpoint interval till it's changed.
+//
+// The feedback format is specified to be 16.16 for HS and 10.14 for FS devices (see Universal Serial Bus Specification Revision 2.0 5.12.4.2). By default,
+// the choice of format is left to the caller and feedback argument is sent as-is. If CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION is set, then tinyusb
+// expects 16.16 format and handles the conversion to 10.14 on FS.
+//
+// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the 
+// driver can work with either format. So a good compromise is to keep format correction disabled and stick to 16.16 format.
 bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback);
 static inline bool tud_audio_fb_set(uint32_t feedback);
 #endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_host.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_host.h
index 0d435138b8a..33dbd2efb4d 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_host.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_host.h
@@ -42,14 +42,14 @@
  * \defgroup   CDC_Serial_Host Host
  * @{ */
 
-bool tuh_cdc_set_control_line_state(uint8_t dev_addr, bool dtr, bool rts, tuh_control_complete_cb_t complete_cb);
+bool tuh_cdc_set_control_line_state(uint8_t dev_addr, bool dtr, bool rts, tuh_xfer_cb_t complete_cb);
 
-static inline bool tuh_cdc_connect(uint8_t dev_addr, tuh_control_complete_cb_t complete_cb)
+static inline bool tuh_cdc_connect(uint8_t dev_addr, tuh_xfer_cb_t complete_cb)
 {
   return tuh_cdc_set_control_line_state(dev_addr, true, true, complete_cb);
 }
 
-static inline bool tuh_cdc_disconnect(uint8_t dev_addr, tuh_control_complete_cb_t complete_cb)
+static inline bool tuh_cdc_disconnect(uint8_t dev_addr, tuh_xfer_cb_t complete_cb)
 {
   return tuh_cdc_set_control_line_state(dev_addr, false, false, complete_cb);
 }
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_rndis_host.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_rndis_host.h
index 170cb3b0ece..447cc4e97f2 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_rndis_host.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_rndis_host.h
@@ -50,7 +50,7 @@ typedef struct {
 }rndish_data_t;
 
 void rndish_init(void);
-tusb_error_t rndish_open_subtask(uint8_t dev_addr, cdch_data_t *p_cdc);
+bool rndish_open_subtask(uint8_t dev_addr, cdch_data_t *p_cdc);
 void rndish_xfer_isr(cdch_data_t *p_cdc, pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes);
 void rndish_close(uint8_t dev_addr);
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid.h
index 9265a2ede76..44a464be119 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid.h
@@ -43,7 +43,7 @@
 /** \defgroup ClassDriver_HID_Common Common Definitions
  *  @{ */
 
- /// USB HID Descriptor
+/// USB HID Descriptor
 typedef struct TU_ATTR_PACKED
 {
   uint8_t  bLength;         /**< Numeric expression that is the total size of the HID descriptor */
@@ -645,7 +645,7 @@ enum {
 #define HID_REPORT_SIZE_N(x, n)   HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_SIZE, RI_TYPE_GLOBAL, n)
 
 #define HID_REPORT_ID(x)          HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_ID, RI_TYPE_GLOBAL, 1),
-#define HID_REPORT_ID_N(x)        HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_ID, RI_TYPE_GLOBAL, n),
+#define HID_REPORT_ID_N(x, n)     HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_ID, RI_TYPE_GLOBAL, n),
 
 #define HID_REPORT_COUNT(x)       HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_COUNT, RI_TYPE_GLOBAL, 1)
 #define HID_REPORT_COUNT_N(x, n)  HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_COUNT, RI_TYPE_GLOBAL, n)
@@ -1106,7 +1106,10 @@ enum
     {'8'   , 0      }, /* 0x60 */ \
     {'9'   , 0      }, /* 0x61 */ \
     {'0'   , 0      }, /* 0x62 */ \
-    {'0'   , 0      }, /* 0x63 */ \
+    {'.'   , 0      }, /* 0x63 */ \
+    {0     , 0      }, /* 0x64 */ \
+    {0     , 0      }, /* 0x65 */ \
+    {0     , 0      }, /* 0x66 */ \
     {'='   , '='    }, /* 0x67 */ \
 
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/msc/msc_device.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/msc/msc_device.h
index d3269434081..5839b168d56 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/msc/msc_device.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/msc/msc_device.h
@@ -131,6 +131,9 @@ TU_ATTR_WEAK uint8_t tud_msc_get_maxlun_cb(void);
 // - Start = 1 : active mode, if load_eject = 1 : load disk storage
 TU_ATTR_WEAK bool tud_msc_start_stop_cb(uint8_t lun, uint8_t power_condition, bool start, bool load_eject);
 
+// Invoked when received REQUEST_SENSE
+TU_ATTR_WEAK int32_t tud_msc_request_sense_cb(uint8_t lun, void* buffer, uint16_t bufsize);
+
 // Invoked when Read10 command is complete
 TU_ATTR_WEAK void tud_msc_read10_complete_cb(uint8_t lun);
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_device.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_device.h
index d71c2a3e911..4a873e5fcbc 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_device.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_device.h
@@ -52,6 +52,7 @@ uint32_t tud_vendor_n_write_available (uint8_t itf);
 
 static inline
 uint32_t tud_vendor_n_write_str       (uint8_t itf, char const* str);
+uint32_t tud_vendor_n_flush           (uint8_t itf);
 
 //--------------------------------------------------------------------+
 // Application API (Single Port)
@@ -64,6 +65,7 @@ static inline void     tud_vendor_read_flush      (void);
 static inline uint32_t tud_vendor_write           (void const* buffer, uint32_t bufsize);
 static inline uint32_t tud_vendor_write_str       (char const* str);
 static inline uint32_t tud_vendor_write_available (void);
+static inline uint32_t tud_vendor_flush           (void);
 
 //--------------------------------------------------------------------+
 // Application Callback API (weak is optional)
@@ -71,6 +73,8 @@ static inline uint32_t tud_vendor_write_available (void);
 
 // Invoked when received new data
 TU_ATTR_WEAK void tud_vendor_rx_cb(uint8_t itf);
+// Invoked when last rx transfer finished
+TU_ATTR_WEAK void tud_vendor_tx_cb(uint8_t itf, uint32_t sent_bytes);
 
 //--------------------------------------------------------------------+
 // Inline Functions
@@ -121,6 +125,11 @@ static inline uint32_t tud_vendor_write_available (void)
   return tud_vendor_n_write_available(0);
 }
 
+static inline uint32_t tud_vendor_flush (void)
+{
+  return tud_vendor_n_flush(0);
+}
+
 //--------------------------------------------------------------------+
 // Internal Class Driver API
 //--------------------------------------------------------------------+
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_host.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_host.h
index 07fa56c61b0..65223fbca07 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_host.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_host.h
@@ -49,16 +49,16 @@ static inline bool tusbh_custom_is_mounted(uint8_t dev_addr, uint16_t vendor_id,
   return false;
 }
 
-tusb_error_t tusbh_custom_read(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void * p_buffer, uint16_t length);
-tusb_error_t tusbh_custom_write(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void const * p_data, uint16_t length);
+bool tusbh_custom_read(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void * p_buffer, uint16_t length);
+bool tusbh_custom_write(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void const * p_data, uint16_t length);
 
 //--------------------------------------------------------------------+
 // Internal Class Driver API
 //--------------------------------------------------------------------+
-void         cush_init(void);
-tusb_error_t cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length);
-void         cush_isr(pipe_handle_t pipe_hdl, xfer_result_t event);
-void         cush_close(uint8_t dev_addr);
+void cush_init(void);
+bool cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length);
+void cush_isr(pipe_handle_t pipe_hdl, xfer_result_t event);
+void cush_close(uint8_t dev_addr);
 
 #ifdef __cplusplus
  }
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h
index 9b9e2b00771..58591f0bea0 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h
@@ -38,6 +38,7 @@
 #define TU_MIN(_x, _y)        ( ( (_x) < (_y) ) ? (_x) : (_y) )
 #define TU_MAX(_x, _y)        ( ( (_x) > (_y) ) ? (_x) : (_y) )
 
+#define TU_U16(_high, _low)   ((uint16_t) (((_high) << 8) | (_low)))
 #define TU_U16_HIGH(_u16)     ((uint8_t) (((_u16) >> 8) & 0x00ff))
 #define TU_U16_LOW(_u16)      ((uint8_t) ((_u16)       & 0x00ff))
 #define U16_TO_U8S_BE(_u16)   TU_U16_HIGH(_u16), TU_U16_LOW(_u16)
@@ -70,23 +71,10 @@
 #include "tusb_compiler.h"
 #include "tusb_verify.h"
 #include "tusb_types.h"
+#include "tusb_debug.h"
 
-#include "tusb_error.h"   // TODO remove
 #include "tusb_timeout.h" // TODO remove
 
-//--------------------------------------------------------------------+
-// Internal Helper used by Host and Device Stack
-//--------------------------------------------------------------------+
-
-// Check if endpoint descriptor is valid per USB specs
-bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed);
-
-// Bind all endpoint of a interface descriptor to class driver
-void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* p_desc, uint16_t desc_len, uint8_t driver_id);
-
-// Calculate total length of n interfaces (depending on IAD)
-uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len);
-
 //--------------------------------------------------------------------+
 // Internal Inline Functions
 //--------------------------------------------------------------------+
@@ -267,138 +255,6 @@ TU_ATTR_ALWAYS_INLINE static inline void     tu_unaligned_write16 (void* mem, ui
             + TU_BIN8(dlsb))
 #endif
 
-//--------------------------------------------------------------------+
-// Debug Function
-//--------------------------------------------------------------------+
-
-// CFG_TUSB_DEBUG for debugging
-// 0 : no debug
-// 1 : print error
-// 2 : print warning
-// 3 : print info
-#if CFG_TUSB_DEBUG
-
-void tu_print_mem(void const *buf, uint32_t count, uint8_t indent);
-
-#ifdef CFG_TUSB_DEBUG_PRINTF
-  extern int CFG_TUSB_DEBUG_PRINTF(const char *format, ...);
-  #define tu_printf    CFG_TUSB_DEBUG_PRINTF
-#else
-  #define tu_printf    printf
-#endif
-
-static inline
-void tu_print_var(uint8_t const* buf, uint32_t bufsize)
-{
-  for(uint32_t i=0; i<bufsize; i++) tu_printf("%02X ", buf[i]);
-}
-
-// Log with Level
-#define TU_LOG(n, ...)        TU_XSTRCAT(TU_LOG, n)(__VA_ARGS__)
-#define TU_LOG_MEM(n, ...)    TU_XSTRCAT3(TU_LOG, n, _MEM)(__VA_ARGS__)
-#define TU_LOG_VAR(n, ...)    TU_XSTRCAT3(TU_LOG, n, _VAR)(__VA_ARGS__)
-#define TU_LOG_INT(n, ...)    TU_XSTRCAT3(TU_LOG, n, _INT)(__VA_ARGS__)
-#define TU_LOG_HEX(n, ...)    TU_XSTRCAT3(TU_LOG, n, _HEX)(__VA_ARGS__)
-#define TU_LOG_LOCATION()     tu_printf("%s: %d:\r\n", __PRETTY_FUNCTION__, __LINE__)
-#define TU_LOG_FAILED()       tu_printf("%s: %d: Failed\r\n", __PRETTY_FUNCTION__, __LINE__)
-
-// Log Level 1: Error
-#define TU_LOG1               tu_printf
-#define TU_LOG1_MEM           tu_print_mem
-#define TU_LOG1_VAR(_x)       tu_print_var((uint8_t const*)(_x), sizeof(*(_x)))
-#define TU_LOG1_INT(_x)       tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) )
-#define TU_LOG1_HEX(_x)       tu_printf(#_x " = %lX\r\n", (unsigned long) (_x) )
-
-// Log Level 2: Warn
-#if CFG_TUSB_DEBUG >= 2
-  #define TU_LOG2             TU_LOG1
-  #define TU_LOG2_MEM         TU_LOG1_MEM
-  #define TU_LOG2_VAR         TU_LOG1_VAR
-  #define TU_LOG2_INT         TU_LOG1_INT
-  #define TU_LOG2_HEX         TU_LOG1_HEX
-#endif
-
-// Log Level 3: Info
-#if CFG_TUSB_DEBUG >= 3
-  #define TU_LOG3             TU_LOG1
-  #define TU_LOG3_MEM         TU_LOG1_MEM
-  #define TU_LOG3_VAR         TU_LOG1_VAR
-  #define TU_LOG3_INT         TU_LOG1_INT
-  #define TU_LOG3_HEX         TU_LOG1_HEX
-#endif
-
-typedef struct
-{
-  uint32_t key;
-  const char* data;
-} tu_lookup_entry_t;
-
-typedef struct
-{
-  uint16_t count;
-  tu_lookup_entry_t const* items;
-} tu_lookup_table_t;
-
-static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key)
-{
-  static char not_found[11];
-
-  for(uint16_t i=0; i<p_table->count; i++)
-  {
-    if (p_table->items[i].key == key) return p_table->items[i].data;
-  }
-
-  // not found return the key value in hex
-  sprintf(not_found, "0x%08lX", (unsigned long) key);
-
-  return not_found;
-}
-
-#endif // CFG_TUSB_DEBUG
-
-#ifndef TU_LOG
-#define TU_LOG(n, ...)
-#define TU_LOG_MEM(n, ...)
-#define TU_LOG_VAR(n, ...)
-#define TU_LOG_INT(n, ...)
-#define TU_LOG_HEX(n, ...)
-#define TU_LOG_LOCATION()
-#define TU_LOG_FAILED()
-#endif
-
-// TODO replace all TU_LOGn with TU_LOG(n)
-
-#define TU_LOG0(...)
-#define TU_LOG0_MEM(...)
-#define TU_LOG0_VAR(...)
-#define TU_LOG0_INT(...)
-#define TU_LOG0_HEX(...)
-
-
-#ifndef TU_LOG1
-  #define TU_LOG1(...)
-  #define TU_LOG1_MEM(...)
-  #define TU_LOG1_VAR(...)
-  #define TU_LOG1_INT(...)
-  #define TU_LOG1_HEX(...)
-#endif
-
-#ifndef TU_LOG2
-  #define TU_LOG2(...)
-  #define TU_LOG2_MEM(...)
-  #define TU_LOG2_VAR(...)
-  #define TU_LOG2_INT(...)
-  #define TU_LOG2_HEX(...)
-#endif
-
-#ifndef TU_LOG3
-  #define TU_LOG3(...)
-  #define TU_LOG3_MEM(...)
-  #define TU_LOG3_VAR(...)
-  #define TU_LOG3_INT(...)
-  #define TU_LOG3_HEX(...)
-#endif
-
 #ifdef __cplusplus
  }
 #endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_compiler.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_compiler.h
index d3284c62ae1..ae00f4e7516 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_compiler.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_compiler.h
@@ -51,10 +51,10 @@
 #endif
 
 // Compile-time Assert
-#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 201112L
-  #define TU_VERIFY_STATIC   _Static_assert
-#elif defined (__cplusplus) && __cplusplus >= 201103L
+#if defined (__cplusplus) && __cplusplus >= 201103L
   #define TU_VERIFY_STATIC   static_assert
+#elif defined (__STDC_VERSION__) && __STDC_VERSION__ >= 201112L
+  #define TU_VERIFY_STATIC   _Static_assert
 #elif defined(__CCRX__)
   #define TU_VERIFY_STATIC(const_expr, _mess) typedef char TU_XSTRCAT(Line, __LINE__)[(const_expr) ? 1 : 0];
 #else
@@ -75,7 +75,11 @@
  * Nth position is the same as the number of arguments
  * - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma)
  *------------------------------------------------------------------*/
-#define TU_ARGS_NUM(...) 	 _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N())
+#if !defined(__CCRX__)
+#define TU_ARGS_NUM(...)   _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N())
+#else
+#define TU_ARGS_NUM(...)   _TU_NARG(_0, __VA_ARGS__,_RSEQ_N())
+#endif
 
 #define _TU_NARG(...)      _GET_NTH_ARG(__VA_ARGS__)
 #define _GET_NTH_ARG( \
@@ -137,9 +141,11 @@
   #define TU_BSWAP16(u16) (__builtin_bswap16(u16))
   #define TU_BSWAP32(u32) (__builtin_bswap32(u32))
 
+	#ifndef __ARMCC_VERSION
   // List of obsolete callback function that is renamed and should not be defined.
   // Put it here since only gcc support this pragma
-  #pragma GCC poison tud_vendor_control_request_cb
+		#pragma GCC poison tud_vendor_control_request_cb
+	#endif
 
 #elif defined(__TI_COMPILER_VERSION__)
   #define TU_ATTR_ALIGNED(Bytes)        __attribute__ ((aligned(Bytes)))
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_debug.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_debug.h
new file mode 100644
index 00000000000..647e8a8db5d
--- /dev/null
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_debug.h
@@ -0,0 +1,174 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_DEBUG_H_
+#define _TUSB_DEBUG_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Debug
+//--------------------------------------------------------------------+
+
+// CFG_TUSB_DEBUG for debugging
+// 0 : no debug
+// 1 : print error
+// 2 : print warning
+// 3 : print info
+#if CFG_TUSB_DEBUG
+
+// Enum to String for debugging purposes
+#if CFG_TUSB_DEBUG >= 2
+extern char const* const tu_str_speed[];
+extern char const* const tu_str_std_request[];
+#endif
+
+void tu_print_mem(void const *buf, uint32_t count, uint8_t indent);
+
+#ifdef CFG_TUSB_DEBUG_PRINTF
+  extern int CFG_TUSB_DEBUG_PRINTF(const char *format, ...);
+  #define tu_printf    CFG_TUSB_DEBUG_PRINTF
+#else
+  #define tu_printf    printf
+#endif
+
+static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize)
+{
+  for(uint32_t i=0; i<bufsize; i++) tu_printf("%02X ", buf[i]);
+}
+
+// Log with Level
+#define TU_LOG(n, ...)        TU_XSTRCAT(TU_LOG, n)(__VA_ARGS__)
+#define TU_LOG_MEM(n, ...)    TU_XSTRCAT3(TU_LOG, n, _MEM)(__VA_ARGS__)
+#define TU_LOG_VAR(n, ...)    TU_XSTRCAT3(TU_LOG, n, _VAR)(__VA_ARGS__)
+#define TU_LOG_INT(n, ...)    TU_XSTRCAT3(TU_LOG, n, _INT)(__VA_ARGS__)
+#define TU_LOG_HEX(n, ...)    TU_XSTRCAT3(TU_LOG, n, _HEX)(__VA_ARGS__)
+#define TU_LOG_LOCATION()     tu_printf("%s: %d:\r\n", __PRETTY_FUNCTION__, __LINE__)
+#define TU_LOG_FAILED()       tu_printf("%s: %d: Failed\r\n", __PRETTY_FUNCTION__, __LINE__)
+
+// Log Level 1: Error
+#define TU_LOG1               tu_printf
+#define TU_LOG1_MEM           tu_print_mem
+#define TU_LOG1_VAR(_x)       tu_print_var((uint8_t const*)(_x), sizeof(*(_x)))
+#define TU_LOG1_INT(_x)       tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) )
+#define TU_LOG1_HEX(_x)       tu_printf(#_x " = %lX\r\n", (unsigned long) (_x) )
+
+// Log Level 2: Warn
+#if CFG_TUSB_DEBUG >= 2
+  #define TU_LOG2             TU_LOG1
+  #define TU_LOG2_MEM         TU_LOG1_MEM
+  #define TU_LOG2_VAR         TU_LOG1_VAR
+  #define TU_LOG2_INT         TU_LOG1_INT
+  #define TU_LOG2_HEX         TU_LOG1_HEX
+#endif
+
+// Log Level 3: Info
+#if CFG_TUSB_DEBUG >= 3
+  #define TU_LOG3             TU_LOG1
+  #define TU_LOG3_MEM         TU_LOG1_MEM
+  #define TU_LOG3_VAR         TU_LOG1_VAR
+  #define TU_LOG3_INT         TU_LOG1_INT
+  #define TU_LOG3_HEX         TU_LOG1_HEX
+#endif
+
+typedef struct
+{
+  uint32_t key;
+  const char* data;
+} tu_lookup_entry_t;
+
+typedef struct
+{
+  uint16_t count;
+  tu_lookup_entry_t const* items;
+} tu_lookup_table_t;
+
+static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key)
+{
+  static char not_found[11];
+
+  for(uint16_t i=0; i<p_table->count; i++)
+  {
+    if (p_table->items[i].key == key) return p_table->items[i].data;
+  }
+
+  // not found return the key value in hex
+  snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long) key);
+
+  return not_found;
+}
+
+#endif // CFG_TUSB_DEBUG
+
+#ifndef TU_LOG
+  #define TU_LOG(n, ...)
+  #define TU_LOG_MEM(n, ...)
+  #define TU_LOG_VAR(n, ...)
+  #define TU_LOG_INT(n, ...)
+  #define TU_LOG_HEX(n, ...)
+  #define TU_LOG_LOCATION()
+  #define TU_LOG_FAILED()
+#endif
+
+// TODO replace all TU_LOGn with TU_LOG(n)
+
+#define TU_LOG0(...)
+#define TU_LOG0_MEM(...)
+#define TU_LOG0_VAR(...)
+#define TU_LOG0_INT(...)
+#define TU_LOG0_HEX(...)
+
+#ifndef TU_LOG1
+  #define TU_LOG1(...)
+  #define TU_LOG1_MEM(...)
+  #define TU_LOG1_VAR(...)
+  #define TU_LOG1_INT(...)
+  #define TU_LOG1_HEX(...)
+#endif
+
+#ifndef TU_LOG2
+  #define TU_LOG2(...)
+  #define TU_LOG2_MEM(...)
+  #define TU_LOG2_VAR(...)
+  #define TU_LOG2_INT(...)
+  #define TU_LOG2_HEX(...)
+#endif
+
+#ifndef TU_LOG3
+  #define TU_LOG3(...)
+  #define TU_LOG3_MEM(...)
+  #define TU_LOG3_VAR(...)
+  #define TU_LOG3_INT(...)
+  #define TU_LOG3_HEX(...)
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_DEBUG_H_ */
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_mcu.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_mcu.h
new file mode 100644
index 00000000000..8eb4ad47581
--- /dev/null
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_mcu.h
@@ -0,0 +1,285 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MCU_H_
+#define TUSB_MCU_H_
+
+//--------------------------------------------------------------------+
+// Port Specific
+// TUP stand for TinyUSB Port (can be renamed)
+//--------------------------------------------------------------------+
+
+//------------- Unaligned Memory Access -------------//
+
+// ARMv7+ (M3-M7, M23-M33) can access unaligned memory
+#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7))
+  #define TUP_ARCH_STRICT_ALIGN   0
+#else
+  #define TUP_ARCH_STRICT_ALIGN   1
+#endif
+
+/* USB Controller Attributes for Device, Host or MCU (both)
+ * - ENDPOINT_MAX: max (logical) number of endpoint
+ * - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed,
+ *                              e.g EP1 OUT & EP1 IN cannot exist together
+ * - RHPORT_HIGHSPEED: mask to indicate which port support highspeed mode (without external PHY)
+ *                     bit0 for port0 and so on.
+ */
+
+//------------- NXP -------------//
+#if   TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
+  #define TUP_DCD_ENDPOINT_MAX    5
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
+  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_USBIP_OHCI
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
+  // TODO USB0 has 6, USB1 has 4
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX    6
+  #define TUP_RHPORT_HIGHSPEED    0x01 // Port0 HS, Port1 FS
+
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
+   #define TUP_DCD_ENDPOINT_MAX   5
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX)
+  // TODO USB0 has 5, USB1 has 6
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC55XX)
+  // TODO USB0 has 5, USB1 has 6
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX)
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_RHPORT_HIGHSPEED    0x03 // Port0 HS, Port1 HS
+
+
+#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX)
+  #define TUP_DCD_ENDPOINT_MAX    16
+
+#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
+  #define TUP_DCD_ENDPOINT_MAX    16
+
+//------------- Nordic -------------//
+#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
+  // 8 CBI + 1 ISO
+  #define TUP_DCD_ENDPOINT_MAX    9
+
+//------------- Microchip -------------//
+#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
+      TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_SAMG)
+  #define TUP_DCD_ENDPOINT_MAX    6
+  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+
+#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
+  #define TUP_DCD_ENDPOINT_MAX    10
+  #define TUP_RHPORT_HIGHSPEED    0x01
+  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+
+#elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
+  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+
+//------------- ST -------------//
+#elif TU_CHECK_MCU(OPT_MCU_STM32F0)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F1)
+  #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
+      defined (STM32F107xB) || defined (STM32F107xC)
+    #define TUP_USBIP_DWC2
+    #define TUP_USBIP_DWC2_STM32
+
+    #define TUP_DCD_ENDPOINT_MAX  4
+  #else
+    #define TUP_DCD_ENDPOINT_MAX  8
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F2)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  // FS has 4 ep, HS has 5 ep
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F3)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F4)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  // FS has 6, HS has 9
+  #define TUP_DCD_ENDPOINT_MAX    9
+
+  // MCU with on-chip HS Phy
+  #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx)
+    #define TUP_RHPORT_HIGHSPEED  0x02 // Port 0: FS, Port 1: HS
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  #define TUP_DCD_ENDPOINT_MAX    9
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32L4)
+  #if defined (STM32L475xx) || defined (STM32L476xx) ||                          \
+      defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \
+      defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
+      defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \
+      defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
+    #define TUP_USBIP_DWC2
+    #define TUP_USBIP_DWC2_STM32
+
+    #define TUP_DCD_ENDPOINT_MAX  6
+  #else
+    #define TUP_DCD_ENDPOINT_MAX  8
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32WB)
+#define TUP_DCD_ENDPOINT_MAX    8
+
+//------------- Sony -------------//
+#elif TU_CHECK_MCU(OPT_MCU_CXD56)
+  #define TUP_DCD_ENDPOINT_MAX    7
+  #define TUP_RHPORT_HIGHSPEED    0x01
+  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+
+//------------- TI -------------//
+#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+//------------- ValentyUSB -------------//
+#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
+  #define TUP_DCD_ENDPOINT_MAX    16
+
+//------------- Nuvoton -------------//
+#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_NUC120)
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+#elif TU_CHECK_MCU(OPT_MCU_NUC505)
+  #define TUP_DCD_ENDPOINT_MAX    12
+  #define TUP_RHPORT_HIGHSPEED    0x01
+
+//------------- Espressif -------------//
+#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+//------------- Dialog -------------//
+#elif TU_CHECK_MCU(OPT_MCU_DA1469X)
+  #define TUP_DCD_ENDPOINT_MAX    4
+
+//------------- Raspberry Pi -------------//
+#elif TU_CHECK_MCU(OPT_MCU_RP2040)
+  #define TUP_DCD_ENDPOINT_MAX    16
+
+//------------- Silabs -------------//
+#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX    7
+
+//------------- Renesas -------------//
+#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
+  #define TUP_DCD_ENDPOINT_MAX    10
+
+//------------- GigaDevice -------------//
+#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX    4
+
+//------------- Broadcom -------------//
+#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_RHPORT_HIGHSPEED    0x01
+
+//------------- Broadcom -------------//
+#elif TU_CHECK_MCU(OPT_MCU_XMC4000)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+//------------- BridgeTek -------------//
+#elif TU_CHECK_MCU(OPT_MCU_FT90X)
+  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_RHPORT_HIGHSPEED    0x01
+
+#elif TU_CHECK_MCU(OPT_MCU_FT93X)
+  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_RHPORT_HIGHSPEED    0x01
+
+//------------ Allwinner -------------//
+#elif TU_CHECK_MCU(OPT_MCU_F1C100S)
+  #define TUP_DCD_ENDPOINT_MAX    4
+
+#endif
+
+//--------------------------------------------------------------------+
+// Default Values
+//--------------------------------------------------------------------+
+
+#ifndef TUP_DCD_ENDPOINT_MAX
+  #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8"
+  #define TUP_DCD_ENDPOINT_MAX    8
+#endif
+
+// Default to fullspeed if not defined
+#ifndef TUP_RHPORT_HIGHSPEED
+  #define TUP_RHPORT_HIGHSPEED    0x00
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_private.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_private.h
new file mode 100644
index 00000000000..b34506f6500
--- /dev/null
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_private.h
@@ -0,0 +1,65 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+
+#ifndef _TUSB_PRIVATE_H_
+#define _TUSB_PRIVATE_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+typedef struct TU_ATTR_PACKED
+{
+  volatile uint8_t busy    : 1;
+  volatile uint8_t stalled : 1;
+  volatile uint8_t claimed : 1;
+}tu_edpt_state_t;
+
+//--------------------------------------------------------------------+
+// Internal Helper used by Host and Device Stack
+//--------------------------------------------------------------------+
+
+// Check if endpoint descriptor is valid per USB specs
+bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed);
+
+// Bind all endpoint of a interface descriptor to class driver
+void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* p_desc, uint16_t desc_len, uint8_t driver_id);
+
+// Calculate total length of n interfaces (depending on IAD)
+uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len);
+
+// Claim an endpoint with provided mutex
+bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex);
+
+// Release an endpoint with provided mutex
+bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_PRIVATE_H_ */
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h
index 5b26f5aece2..e2fa175327f 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h
@@ -223,19 +223,13 @@ enum {
 
 #define TUSB_DESC_CONFIG_POWER_MA(x)  ((x)/2)
 
-/// Device State TODO remove
-typedef enum
-{
-  TUSB_DEVICE_STATE_UNPLUG = 0  ,
-  TUSB_DEVICE_STATE_CONFIGURED  ,
-  TUSB_DEVICE_STATE_SUSPENDED   ,
-}tusb_device_state_t;
-
 typedef enum
 {
   XFER_RESULT_SUCCESS,
   XFER_RESULT_FAILED,
   XFER_RESULT_STALLED,
+  XFER_RESULT_TIMEOUT,
+  XFER_RESULT_INVALID
 }xfer_result_t;
 
 enum // TODO remove
@@ -265,6 +259,7 @@ typedef enum
 
 enum
 {
+  CONTROL_STAGE_IDLE,
   CONTROL_STAGE_SETUP,
   CONTROL_STAGE_DATA,
   CONTROL_STAGE_ACK
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_verify.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_verify.h
index 56ba8bcd107..f4a08ce2f91 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_verify.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_verify.h
@@ -37,31 +37,31 @@
  * manipulation that you are told to stay away.
  *
  * This contains macros for both VERIFY and ASSERT:
- * 
+ *
  *   VERIFY: Used when there is an error condition which is not the
  *           fault of the MCU. For example, bounds checking on data
  *           sent to the micro over USB should use this function.
  *           Another example is checking for buffer overflows, where
  *           returning from the active function causes a NAK.
- * 
+ *
  *   ASSERT: Used for error conditions that are caused by MCU firmware
  *           bugs. This is used to discover bugs in the code more
  *           quickly. One example would be adding assertions in library
  *           function calls to confirm a function's (untainted)
  *           parameters are valid.
- * 
+ *
  * The difference in behavior is that ASSERT triggers a breakpoint while
  * verify does not.
  *
  *   #define TU_VERIFY(cond)                  if(cond) return false;
  *   #define TU_VERIFY(cond,ret)              if(cond) return ret;
- *   
+ *
  *   #define TU_VERIFY_HDLR(cond,handler)     if(cond) {handler; return false;}
  *   #define TU_VERIFY_HDLR(cond,ret,handler) if(cond) {handler; return ret;}
  *
  *   #define TU_ASSERT(cond)                  if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return false;}
  *   #define TU_ASSERT(cond,ret)              if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return ret;}
- *  
+ *
  *------------------------------------------------------------------*/
 
 #ifdef __cplusplus
@@ -74,15 +74,13 @@
 
 #if CFG_TUSB_DEBUG
   #include <stdio.h>
-  #define _MESS_ERR(_err)   tu_printf("%s %d: failed, error = %s\r\n", __func__, __LINE__, tusb_strerr[_err])
   #define _MESS_FAILED()    tu_printf("%s %d: ASSERT FAILED\r\n", __func__, __LINE__)
 #else
-  #define _MESS_ERR(_err) do {} while (0)
   #define _MESS_FAILED() do {} while (0)
 #endif
 
-// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
-#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__)
   #define TU_BREAKPOINT() do                                                                                \
   {                                                                                                         \
     volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
@@ -144,32 +142,6 @@
 #define TU_ASSERT(...)             GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS,UNUSED)(__VA_ARGS__)
 #endif
 
-// TODO remove TU_ASSERT_ERR() later
-
-/*------------- Generator for TU_VERIFY_ERR and TU_VERIFY_ERR_HDLR -------------*/
-#define TU_VERIFY_ERR_DEF2(_error, _handler)  do               \
-{                                                              \
-  uint32_t _err = (uint32_t)(_error);                          \
-  if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _err; } \
-} while(0)
-
-#define TU_VERIFY_ERR_DEF3(_error, _handler, _ret) do          \
-{                                                              \
-  uint32_t _err = (uint32_t)(_error);                          \
-  if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _ret; } \
-} while(0)
-
-/*------------------------------------------------------------------*/
-/* ASSERT Error
- * basically TU_VERIFY Error with TU_BREAKPOINT() as handler
- *------------------------------------------------------------------*/
-#define ASSERT_ERR_1ARGS(_error)         TU_VERIFY_ERR_DEF2(_error, TU_BREAKPOINT())
-#define ASSERT_ERR_2ARGS(_error, _ret)   TU_VERIFY_ERR_DEF3(_error, TU_BREAKPOINT(), _ret)
-
-#ifndef TU_ASSERT_ERR
-#define TU_ASSERT_ERR(...)         GET_3RD_ARG(__VA_ARGS__, ASSERT_ERR_2ARGS, ASSERT_ERR_1ARGS,UNUSED)(__VA_ARGS__)
-#endif
-
 /*------------------------------------------------------------------*/
 /* ASSERT HDLR
  *------------------------------------------------------------------*/
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h
index c042cc70802..8efbc90ef6b 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h
@@ -30,7 +30,6 @@
 #include "common/tusb_common.h"
 #include "osal/osal.h"
 #include "common/tusb_fifo.h"
-#include "dcd_attr.h"
 
 #ifdef __cplusplus
  extern "C" {
@@ -41,7 +40,7 @@
 //--------------------------------------------------------------------+
 
 #ifndef CFG_TUD_ENDPPOINT_MAX
-  #define CFG_TUD_ENDPPOINT_MAX   DCD_ATTR_ENDPOINT_MAX
+  #define CFG_TUD_ENDPPOINT_MAX   TUP_DCD_ENDPOINT_MAX
 #endif
 
 //--------------------------------------------------------------------+
@@ -106,12 +105,12 @@ typedef struct TU_ATTR_ALIGNED(4)
 void dcd_init       (uint8_t rhport);
 
 // Interrupt Handler
-#if __GNUC__
+#if __GNUC__ && !defined(__ARMCC_VERSION)
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wredundant-decls"
 #endif
 void dcd_int_handler(uint8_t rhport);
-#if __GNUC__
+#if __GNUC__ && !defined(__ARMCC_VERSION)
 #pragma GCC diagnostic pop
 #endif
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd_attr.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd_attr.h
deleted file mode 100644
index 3c5dadaf4dc..00000000000
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd_attr.h
+++ /dev/null
@@ -1,210 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2021, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef TUSB_DCD_ATTR_H_
-#define TUSB_DCD_ATTR_H_
-
-#include "tusb_option.h"
-
-// Attribute includes
-// - ENDPOINT_MAX: max (logical) number of endpoint
-// - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed,
-//                              e.g EP1 OUT & EP1 IN cannot exist together
-// - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on.
-
-//------------- NXP -------------//
-#if   TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
-  #define DCD_ATTR_ENDPOINT_MAX   5
-
-#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
-  #define DCD_ATTR_ENDPOINT_MAX   16
-
-#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
-  // TODO USB0 has 6, USB1 has 4
-  #define DCD_ATTR_CONTROLLER_CHIPIDEA_HS
-  #define DCD_ATTR_ENDPOINT_MAX   6
-
-#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
-   #define DCD_ATTR_ENDPOINT_MAX   5
-
-#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX)
-  // TODO USB0 has 5, USB1 has 6
-  #define DCD_ATTR_ENDPOINT_MAX   6
-
-#elif TU_CHECK_MCU(OPT_MCU_LPC55XX)
-  // TODO USB0 has 5, USB1 has 6
-  #define DCD_ATTR_ENDPOINT_MAX   6
-
-#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX)
-  #define DCD_ATTR_CONTROLLER_CHIPIDEA_HS
-  #define DCD_ATTR_ENDPOINT_MAX   8
-
-#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX)
-  #define DCD_ATTR_ENDPOINT_MAX   16
-
-#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
-  #define DCD_ATTR_ENDPOINT_MAX   16
-
-//------------- Nordic -------------//
-#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
-  // 8 CBI + 1 ISO
-  #define DCD_ATTR_ENDPOINT_MAX   9
-
-//------------- Microchip -------------//
-#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
-      TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
-  #define DCD_ATTR_ENDPOINT_MAX   8
-
-#elif TU_CHECK_MCU(OPT_MCU_SAMG)
-  #define DCD_ATTR_ENDPOINT_MAX   6
-  #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
-
-#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
-  #define DCD_ATTR_ENDPOINT_MAX   10
-  #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
-
-//------------- ST -------------//
-#elif TU_CHECK_MCU(OPT_MCU_STM32F0)
-  #define DCD_ATTR_ENDPOINT_MAX   8
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32F1)
-  #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
-      defined (STM32F107xB) || defined (STM32F107xC)
-    #define DCD_ATTR_ENDPOINT_MAX   4
-    #define DCD_ATTR_DWC2_STM32
-  #else
-    #define DCD_ATTR_ENDPOINT_MAX   8
-  #endif
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32F2)
-  // FS has 4 ep, HS has 5 ep
-  #define DCD_ATTR_ENDPOINT_MAX   6
-  #define DCD_ATTR_DWC2_STM32
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32F3)
-  #define DCD_ATTR_ENDPOINT_MAX   8
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32F4)
-  // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
-  #define DCD_ATTR_ENDPOINT_MAX   6
-  #define DCD_ATTR_DWC2_STM32
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
-  // FS has 6, HS has 9
-  #define DCD_ATTR_ENDPOINT_MAX   9
-  #define DCD_ATTR_DWC2_STM32
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
-  #define DCD_ATTR_ENDPOINT_MAX   9
-  #define DCD_ATTR_DWC2_STM32
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
-  #define DCD_ATTR_ENDPOINT_MAX   8
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
-  #define DCD_ATTR_ENDPOINT_MAX   8
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32L4)
-  #if defined (STM32L475xx) || defined (STM32L476xx) ||                          \
-      defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \
-      defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
-      defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \
-      defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
-    #define DCD_ATTR_ENDPOINT_MAX   6
-    #define DCD_ATTR_DWC2_STM32
-  #else
-    #define DCD_ATTR_ENDPOINT_MAX   8
-  #endif
-
-//------------- Sony -------------//
-#elif TU_CHECK_MCU(OPT_MCU_CXD56)
-  #define DCD_ATTR_ENDPOINT_MAX   7
-  #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
-
-//------------- TI -------------//
-#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
-  #define DCD_ATTR_ENDPOINT_MAX   8
-
-#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
-  #define DCD_ATTR_ENDPOINT_MAX   8
-
-//------------- ValentyUSB -------------//
-#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
-  #define DCD_ATTR_ENDPOINT_MAX   16
-
-//------------- Nuvoton -------------//
-#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
-  #define DCD_ATTR_ENDPOINT_MAX   8
-
-#elif TU_CHECK_MCU(OPT_MCU_NUC120)
-  #define DCD_ATTR_ENDPOINT_MAX   6
-
-#elif TU_CHECK_MCU(OPT_MCU_NUC505)
-  #define DCD_ATTR_ENDPOINT_MAX   12
-
-//------------- Espressif -------------//
-#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
-  #define DCD_ATTR_ENDPOINT_MAX   6
-
-//------------- Dialog -------------//
-#elif TU_CHECK_MCU(OPT_MCU_DA1469X)
-  #define DCD_ATTR_ENDPOINT_MAX   4
-
-//------------- Raspberry Pi -------------//
-#elif TU_CHECK_MCU(OPT_MCU_RP2040)
-  #define DCD_ATTR_ENDPOINT_MAX   16
-
-//------------- Silabs -------------//
-#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
-  #define DCD_ATTR_ENDPOINT_MAX   7
-
-//------------- Renesas -------------//
-#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
-  #define DCD_ATTR_ENDPOINT_MAX   10
-
-//------------- GigaDevice -------------//
-#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
-  #define DCD_ATTR_ENDPOINT_MAX   4
-
-//------------- Broadcom -------------//
-#elif TU_CHECK_MCU(OPT_MCU_BCM2711)
-  #define DCD_ATTR_ENDPOINT_MAX   8
-
-//------------- Broadcom -------------//
-#elif TU_CHECK_MCU(OPT_MCU_XMC4000)
-  #define DCD_ATTR_ENDPOINT_MAX   8
-
-#else
-  #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8"
-  #define DCD_ATTR_ENDPOINT_MAX   8
-#endif
-
-// Default to fullspeed if not defined
-//#ifndef PORT_HIGHSPEED
-//  #define DCD_ATTR_PORT_HIGHSPEED 0x00
-//#endif
-
-#endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h
index ec34817fa40..b2bf8ba9d78 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h
@@ -453,7 +453,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
   TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
   /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 0x04 : 0x01),\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
 
@@ -502,7 +502,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
   TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
   /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 0x04 : 0x01),\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
 
@@ -550,7 +550,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
   TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
   /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 0x04 : 0x01),\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\
   /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */\
@@ -558,7 +558,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
 
 //   Calculate wMaxPacketSize of Endpoints
 #define TUD_AUDIO_EP_SIZE(_maxFrequency, _nBytesPerSample, _nChannels) \
-    ((((_maxFrequency + ((CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 7999 : 999)) / ((CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 8000 : 1000)) + 1) * _nBytesPerSample * _nChannels)
+    ((((_maxFrequency + (TUD_OPT_HIGH_SPEED ? 7999 : 999)) / (TUD_OPT_HIGH_SPEED ? 8000 : 1000)) + 1) * _nBytesPerSample * _nChannels)
 
 
 //--------------------------------------------------------------------+
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h
index 7607b98957b..29753451ebc 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h
@@ -58,6 +58,8 @@ usbd_class_driver_t const* usbd_app_driver_get_cb(uint8_t* driver_count) TU_ATTR
 
 typedef bool (*usbd_control_xfer_cb_t)(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
 
+void usbd_int_set(bool enabled);
+
 //--------------------------------------------------------------------+
 // USBD Endpoint API
 //--------------------------------------------------------------------+
@@ -78,7 +80,7 @@ bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
 // If caller does not make any transfer, it must release endpoint for others.
 bool usbd_edpt_claim(uint8_t rhport, uint8_t ep_addr);
 
-// Release an endpoint without submitting a transfer
+// Release claimed endpoint without submitting a transfer
 bool usbd_edpt_release(uint8_t rhport, uint8_t ep_addr);
 
 // Check if endpoint is busy transferring
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd.h
index eb53d2e80e4..c40bea64cec 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd.h
@@ -30,12 +30,24 @@
 #include "common/tusb_common.h"
 #include "osal/osal.h"
 #include "common/tusb_fifo.h"
-#include "hcd_attr.h"
 
 #ifdef __cplusplus
  extern "C" {
 #endif
 
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+
+#ifndef CFG_TUH_ENDPOINT_MAX
+  #define CFG_TUH_ENDPOINT_MAX   (CFG_TUH_HUB + CFG_TUH_HID*2 + CFG_TUH_MSC*2 + CFG_TUH_CDC*3)
+//  #ifdef TUP_HCD_ENDPOINT_MAX
+//    #define CFG_TUH_ENDPPOINT_MAX   TUP_HCD_ENDPOINT_MAX
+//  #else
+//    #define
+//  #endif
+#endif
+
  //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
@@ -82,26 +94,14 @@ typedef struct
 
 } hcd_event_t;
 
-#if TUSB_OPT_HOST_ENABLED
-// Max number of endpoints per device
-enum {
-  // TODO better computation
-  HCD_MAX_ENDPOINT = CFG_TUH_DEVICE_MAX*(CFG_TUH_HUB + CFG_TUH_HID*2 + CFG_TUH_MSC*2 + CFG_TUH_CDC*3),
-  HCD_MAX_XFER     = HCD_MAX_ENDPOINT*2,
-};
-
-//#define HCD_MAX_ENDPOINT 16
-//#define HCD_MAX_XFER 16
-
-typedef struct {
+typedef struct
+{
   uint8_t rhport;
   uint8_t hub_addr;
   uint8_t hub_port;
   uint8_t speed;
 } hcd_devtree_info_t;
 
-#endif
-
 //--------------------------------------------------------------------+
 // Controller API
 //--------------------------------------------------------------------+
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd_attr.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd_attr.h
deleted file mode 100644
index 06011c63c55..00000000000
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd_attr.h
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2021, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef TUSB_HCD_ATTR_H_
-#define TUSB_HCD_ATTR_H_
-
-#include "tusb_option.h"
-
-// Attribute includes
-// - ENDPOINT_MAX: max (logical) number of endpoint
-// - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on.
-
-//------------- NXP -------------//
-#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
-  #define HCD_ATTR_OHCI
-
-#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
-  #define HCD_ATTR_EHCI_TRANSDIMENSION
-
-#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX)
-  // #define HCD_ATTR_EHCI_NXP_PTD
-
-#elif TU_CHECK_MCU(OPT_MCU_LPC55XX)
-  // #define HCD_ATTR_EHCI_NXP_PTD
-
-#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX)
-  #define HCD_ATTR_EHCI_TRANSDIMENSION
-
-#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX)
-
-//------------- Microchip -------------//
-#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
-      TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
-
-#elif TU_CHECK_MCU(OPT_MCU_SAMG)
-
-#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
-
-//------------- ST -------------//
-#elif TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F1, OPT_MCU_STM32F3) || \
-      TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1, OPT_MCU_STM32L4)
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32F2, OPT_MCU_STM32F3, OPT_MCU_STM32F4)
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
-
-//------------- Sony -------------//
-#elif TU_CHECK_MCU(OPT_MCU_CXD56)
-
-//------------- Nuvoton -------------//
-#elif TU_CHECK_MCU(OPT_MCU_NUC505)
-
-//------------- Espressif -------------//
-#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
-
-//------------- Raspberry Pi -------------//
-#elif TU_CHECK_MCU(OPT_MCU_RP2040)
-
-//------------- Silabs -------------//
-#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
-
-//------------- Renesas -------------//
-#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
-
-//#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
-//  #define DCD_ATTR_ENDPOINT_MAX not known yet
-
-//------------- GigaDevice -------------//
-#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
-
-#else
-//  #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8"
-#endif
-
-// Default to fullspeed if not defined
-//#ifndef PORT_HIGHSPEED
-//  #define DCD_ATTR_PORT_HIGHSPEED 0x00
-//#endif
-
-#endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hub.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hub.h
index c4d5441933e..390740e1fcb 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hub.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hub.h
@@ -171,12 +171,35 @@ typedef struct {
 
 TU_VERIFY_STATIC( sizeof(hub_port_status_response_t) == 4, "size is not correct");
 
-bool hub_port_clear_feature(uint8_t hub_addr, uint8_t hub_port, uint8_t feature, tuh_control_complete_cb_t complete_cb);
-bool hub_port_set_feature(uint8_t hub_addr, uint8_t hub_port, uint8_t feature, tuh_control_complete_cb_t complete_cb);
+// Clear feature
+bool hub_port_clear_feature (uint8_t hub_addr, uint8_t hub_port, uint8_t feature,
+                             tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Set feature
+bool hub_port_set_feature   (uint8_t hub_addr, uint8_t hub_port, uint8_t feature,
+                             tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get port status
+bool hub_port_get_status    (uint8_t hub_addr, uint8_t hub_port, void* resp,
+                             tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get status from Interrupt endpoint
+bool hub_edpt_status_xfer(uint8_t dev_addr);
+
+// Reset a port
+static inline bool hub_port_reset(uint8_t hub_addr, uint8_t hub_port,
+                                  tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  return hub_port_set_feature(hub_addr, hub_port, HUB_FEATURE_PORT_RESET, complete_cb, user_data);
+}
+
+// Clear Reset Change
+static inline bool hub_port_clear_reset_change(uint8_t hub_addr, uint8_t hub_port,
+                                               tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  return hub_port_clear_feature(hub_addr, hub_port, HUB_FEATURE_PORT_RESET_CHANGE, complete_cb, user_data);
+}
 
-bool hub_port_reset(uint8_t hub_addr, uint8_t hub_port, tuh_control_complete_cb_t complete_cb);
-bool hub_port_get_status(uint8_t hub_addr, uint8_t hub_port, void* resp, tuh_control_complete_cb_t complete_cb);
-bool hub_status_pipe_queue(uint8_t dev_addr);
 
 //--------------------------------------------------------------------+
 // Internal Class Driver API
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh.h
index 8411cad283d..e883ac90bc7 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh.h
@@ -38,7 +38,48 @@
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 
-typedef bool (*tuh_control_complete_cb_t)(uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result);
+// forward declaration
+struct tuh_xfer_s;
+typedef struct tuh_xfer_s tuh_xfer_t;
+
+typedef void (*tuh_xfer_cb_t)(tuh_xfer_t* xfer);
+
+// Note1: layout and order of this will be changed in near future
+// it is advised to initialize it using member name
+// Note2: not all field is available/meaningful in callback, some info is not saved by
+// usbh to save SRAM
+struct tuh_xfer_s
+{
+  uint8_t daddr;
+  uint8_t ep_addr;
+
+  xfer_result_t result;
+  uint32_t actual_len;      // excluding setup packet
+
+  union
+  {
+    tusb_control_request_t const* setup; // setup packet pointer if control transfer
+    uint32_t buflen;        // expected length if not control transfer (not available in callback)
+  };
+
+  uint8_t* buffer;           // not available in callback if not control transfer
+  tuh_xfer_cb_t complete_cb;
+  uintptr_t user_data;
+
+  // uint32_t timeout_ms;    // place holder, not supported yet
+};
+
+//--------------------------------------------------------------------+
+// APPLICATION CALLBACK
+//--------------------------------------------------------------------+
+
+//TU_ATTR_WEAK uint8_t tuh_attach_cb (tusb_desc_device_t const *desc_device);
+
+// Invoked when device is mounted (configured)
+TU_ATTR_WEAK void tuh_mount_cb (uint8_t daddr);
+
+/// Invoked when device is unmounted (bus reset/unplugged)
+TU_ATTR_WEAK void tuh_umount_cb(uint8_t daddr);
 
 //--------------------------------------------------------------------+
 // APPLICATION API
@@ -57,40 +98,132 @@ void tuh_task(void);
 extern void hcd_int_handler(uint8_t rhport);
 #define tuh_int_handler   hcd_int_handler
 
-bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t* vid, uint16_t* pid);
-tusb_speed_t tuh_speed_get(uint8_t dev_addr);
+bool tuh_vid_pid_get(uint8_t daddr, uint16_t* vid, uint16_t* pid);
+
+tusb_speed_t tuh_speed_get(uint8_t daddr);
 
 // Check if device is connected and configured
-bool tuh_mounted(uint8_t dev_addr);
+bool tuh_mounted(uint8_t daddr);
 
 // Check if device is suspended
-static inline bool tuh_suspended(uint8_t dev_addr)
+TU_ATTR_ALWAYS_INLINE
+static inline bool tuh_suspended(uint8_t daddr)
 {
   // TODO implement suspend & resume on host
-  (void) dev_addr;
+  (void) daddr;
   return false;
 }
 
 // Check if device is ready to communicate with
 TU_ATTR_ALWAYS_INLINE
-static inline bool tuh_ready(uint8_t dev_addr)
+static inline bool tuh_ready(uint8_t daddr)
 {
-  return tuh_mounted(dev_addr) && !tuh_suspended(dev_addr);
+  return tuh_mounted(daddr) && !tuh_suspended(daddr);
 }
 
-// Carry out control transfer
-bool tuh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, void* buffer, tuh_control_complete_cb_t complete_cb);
+//--------------------------------------------------------------------+
+// Transfer API
+//--------------------------------------------------------------------+
+
+// Submit a control transfer
+//  - async: complete callback invoked when finished.
+//  - sync : blocking if complete callback is NULL.
+bool tuh_control_xfer(tuh_xfer_t* xfer);
+
+// Submit a bulk/interrupt transfer
+//  - async: complete callback invoked when finished.
+//  - sync : blocking if complete callback is NULL.
+bool tuh_edpt_xfer(tuh_xfer_t* xfer);
+
+// Open an non-control endpoint
+bool tuh_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep);
+
+// Set Configuration (control transfer)
+// config_num = 0 will un-configure device. Note: config_num = config_descriptor_index + 1
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_configuration_set(uint8_t daddr, uint8_t config_num,
+                           tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
 //--------------------------------------------------------------------+
-// APPLICATION CALLBACK
+// Descriptors Asynchronous (non-blocking)
 //--------------------------------------------------------------------+
-//TU_ATTR_WEAK uint8_t tuh_attach_cb (tusb_desc_device_t const *desc_device);
 
-// Invoked when device is mounted (configured)
-TU_ATTR_WEAK void tuh_mount_cb (uint8_t dev_addr);
+// Get an descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len,
+                        tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get device descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_device(uint8_t daddr, void* buffer, uint16_t len,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get configuration descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_configuration(uint8_t daddr, uint8_t index, void* buffer, uint16_t len,
+                                      tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get HID report descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len,
+                                   tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+// Blocking if complete callback is NULL, in this case 'user_data' must contain xfer_result_t variable
+bool tuh_descriptor_get_string(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get manufacturer string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_manufacturer_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len,
+                                            tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get product string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_product_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len,
+                                       tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get serial string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_serial_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len,
+                                      tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
-/// Invoked when device is unmounted (bus reset/unplugged)
-TU_ATTR_WEAK void tuh_umount_cb(uint8_t dev_addr);
+//--------------------------------------------------------------------+
+// Descriptors Synchronous (blocking)
+//--------------------------------------------------------------------+
+
+// Sync (blocking) version of tuh_descriptor_get()
+// return transfer result
+uint8_t tuh_descriptor_get_sync(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_device()
+// return transfer result
+uint8_t tuh_descriptor_get_device_sync(uint8_t daddr, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_configuration()
+// return transfer result
+uint8_t tuh_descriptor_get_configuration_sync(uint8_t daddr, uint8_t index, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_hid_report()
+// return transfer result
+uint8_t tuh_descriptor_get_hid_report_sync(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_string()
+// return transfer result
+uint8_t tuh_descriptor_get_string_sync(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_manufacturer_string()
+// return transfer result
+uint8_t tuh_descriptor_get_manufacturer_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_product_string()
+// return transfer result
+uint8_t tuh_descriptor_get_product_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_serial_string()
+// return transfer result
+uint8_t tuh_descriptor_get_serial_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len);
 
 #ifdef __cplusplus
  }
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh_classdriver.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh_classdriver.h
index 8bc2622aade..c156afea048 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh_classdriver.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh_classdriver.h
@@ -57,20 +57,28 @@ uint8_t usbh_get_rhport(uint8_t dev_addr);
 
 uint8_t* usbh_get_enum_buf(void);
 
+void usbh_int_set(bool enabled);
+
 //--------------------------------------------------------------------+
 // USBH Endpoint API
 //--------------------------------------------------------------------+
 
-// Open an endpoint
-bool usbh_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep);
+// Submit a usb transfer with callback support, require CFG_TUH_API_EDPT_XFER
+bool usbh_edpt_xfer_with_callback(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes,
+                                  tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+TU_ATTR_ALWAYS_INLINE
+static inline bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
+{
+  return usbh_edpt_xfer_with_callback(dev_addr, ep_addr, buffer, total_bytes, NULL, 0);
+}
 
-// Submit a usb transfer
-bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes);
 
 // Claim an endpoint before submitting a transfer.
 // If caller does not make any transfer, it must release endpoint for others.
 bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr);
 
+// Release claimed endpoint without submitting a transfer
 bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr);
 
 // Check if endpoint transferring is complete
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal.h
index c8131d19d60..7111bbdb2a1 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal.h
@@ -31,9 +31,6 @@
  extern "C" {
 #endif
 
-/** \addtogroup group_osal
- *  @{ */
-
 #include "common/tusb_common.h"
 
 // Return immediately
@@ -57,6 +54,8 @@ typedef void (*osal_task_func_t)( void * );
   #include "osal_pico.h"
 #elif CFG_TUSB_OS == OPT_OS_RTTHREAD
   #include "osal_rtthread.h"
+#elif CFG_TUSB_OS == OPT_OS_RTX4
+  #include "osal_rtx4.h"
 #elif CFG_TUSB_OS == OPT_OS_CUSTOM
   #include "tusb_os_custom.h" // implemented by application
 #else
@@ -65,47 +64,26 @@ typedef void (*osal_task_func_t)( void * );
 
 //--------------------------------------------------------------------+
 // OSAL Porting API
+// Should be implemented as static inline function in osal_port.h header
+/*
+    static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef);
+    static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr);
+    static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec);
+    static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl); // TODO removed
+
+    static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef);
+    static inline bool osal_mutex_lock (osal_mutex_t sem_hdl, uint32_t msec);
+    static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl);
+
+    static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef);
+    static inline bool osal_queue_receive(osal_queue_t qhdl, void* data);
+    static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr);
+    static inline bool osal_queue_empty(osal_queue_t qhdl);
+*/
 //--------------------------------------------------------------------+
 
-#if __GNUC__
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wredundant-decls"
-#endif
-//------------- Semaphore -------------//
-static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef);
-static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr);
-static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec);
-
-static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl); // TODO removed
-
-//------------- Mutex -------------//
-static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef);
-static inline bool osal_mutex_lock (osal_mutex_t sem_hdl, uint32_t msec);
-static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl);
-
-//------------- Queue -------------//
-static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef);
-static inline bool osal_queue_receive(osal_queue_t qhdl, void* data);
-static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr);
-static inline bool osal_queue_empty(osal_queue_t qhdl);
-#if __GNUC__
-#pragma GCC diagnostic pop
-#endif
-
-#if 0  // TODO remove subtask related macros later
-// Sub Task
-#define OSAL_SUBTASK_BEGIN
-#define OSAL_SUBTASK_END                    return TUSB_ERROR_NONE;
-
-#define STASK_RETURN(_error)                return _error;
-#define STASK_INVOKE(_subtask, _status)     (_status) = _subtask
-#define STASK_ASSERT(_cond)                 TU_VERIFY(_cond, TUSB_ERROR_OSAL_TASK_FAILED)
-#endif
-
 #ifdef __cplusplus
  }
 #endif
 
-/** @} */
-
 #endif /* _TUSB_OSAL_H_ */
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_freertos.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_freertos.h
index 4573e01f5ef..69a026df5b5 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_freertos.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_freertos.h
@@ -68,6 +68,7 @@ static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr)
     BaseType_t res = xSemaphoreGiveFromISR(sem_hdl, &xHigherPriorityTaskWoken);
 
 #if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
+    // not needed after https://github.com/espressif/esp-idf/commit/c5fd79547ac9b7bae06fa660e9f814d18d3390b7
     if ( xHigherPriorityTaskWoken ) portYIELD_FROM_ISR();
 #else
     portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
@@ -114,7 +115,7 @@ static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
 //--------------------------------------------------------------------+
 
 // role device/host is used by OS NONE for mutex (disable usb isr) only
-#define OSAL_QUEUE_DEF(_role, _name, _depth, _type) \
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
   static _type _name##_##buf[_depth];\
   osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf };
 
@@ -151,6 +152,7 @@ static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in
     BaseType_t res = xQueueSendToBackFromISR(qhdl, data, &xHigherPriorityTaskWoken);
 
 #if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
+    // not needed after https://github.com/espressif/esp-idf/commit/c5fd79547ac9b7bae06fa660e9f814d18d3390b7
     if ( xHigherPriorityTaskWoken ) portYIELD_FROM_ISR();
 #else
     portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
@@ -169,4 +171,4 @@ static inline bool osal_queue_empty(osal_queue_t qhdl)
  }
 #endif
 
-#endif /* _TUSB_OSAL_FREERTOS_H_ */
+#endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_mynewt.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_mynewt.h
index 6882329c1eb..78a257cd69f 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_mynewt.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_mynewt.h
@@ -96,7 +96,7 @@ static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
 //--------------------------------------------------------------------+
 
 // role device/host is used by OS NONE for mutex (disable usb isr) only
-#define OSAL_QUEUE_DEF(_role, _name, _depth, _type) \
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
   static _type _name##_##buf[_depth];\
   static struct os_event _name##_##evbuf[_depth];\
   osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, .evbuf =  _name##_##evbuf};\
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_none.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_none.h
index a1f997cf206..4217f042225 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_none.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_none.h
@@ -103,59 +103,34 @@ static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
 //--------------------------------------------------------------------+
 #include "common/tusb_fifo.h"
 
-// extern to avoid including dcd.h and hcd.h
-#if TUSB_OPT_DEVICE_ENABLED
-extern void dcd_int_disable(uint8_t rhport);
-extern void dcd_int_enable(uint8_t rhport);
-#endif
-
-#if TUSB_OPT_HOST_ENABLED
-extern void hcd_int_disable(uint8_t rhport);
-extern void hcd_int_enable(uint8_t rhport);
-#endif
-
 typedef struct
 {
-    uint8_t role; // device or host
-    tu_fifo_t ff;
+  void (*interrupt_set)(bool);
+  tu_fifo_t ff;
 }osal_queue_def_t;
 
 typedef osal_queue_def_t* osal_queue_t;
 
-// role device/host is used by OS NONE for mutex (disable usb isr) only
-#define OSAL_QUEUE_DEF(_role, _name, _depth, _type)       \
+// _int_set is used as mutex in OS NONE (disable/enable USB ISR)
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type)    \
   uint8_t _name##_buf[_depth*sizeof(_type)];              \
   osal_queue_def_t _name = {                              \
-    .role = _role,                                        \
+    .interrupt_set = _int_set,                            \
     .ff = TU_FIFO_INIT(_name##_buf, _depth, _type, false) \
   }
 
 // lock queue by disable USB interrupt
 static inline void _osal_q_lock(osal_queue_t qhdl)
 {
-  (void) qhdl;
-
-#if TUSB_OPT_DEVICE_ENABLED
-  if (qhdl->role == OPT_MODE_DEVICE) dcd_int_disable(TUD_OPT_RHPORT);
-#endif
-
-#if TUSB_OPT_HOST_ENABLED
-  if (qhdl->role == OPT_MODE_HOST) hcd_int_disable(TUH_OPT_RHPORT);
-#endif
+  // disable dcd/hcd interrupt
+  qhdl->interrupt_set(false);
 }
 
 // unlock queue
 static inline void _osal_q_unlock(osal_queue_t qhdl)
 {
-  (void) qhdl;
-
-#if TUSB_OPT_DEVICE_ENABLED
-  if (qhdl->role == OPT_MODE_DEVICE) dcd_int_enable(TUD_OPT_RHPORT);
-#endif
-
-#if TUSB_OPT_HOST_ENABLED
-  if (qhdl->role == OPT_MODE_HOST) hcd_int_enable(TUH_OPT_RHPORT);
-#endif
+  // enable dcd/hcd interrupt
+  qhdl->interrupt_set(true);
 }
 
 static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_pico.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_pico.h
index 1c3366e0194..70432d22b5f 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_pico.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_pico.h
@@ -100,7 +100,7 @@ static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
 //--------------------------------------------------------------------+
 #include "common/tusb_fifo.h"
 
-#if TUSB_OPT_HOST_ENABLED
+#if CFG_TUH_ENABLED
 extern void hcd_int_disable(uint8_t rhport);
 extern void hcd_int_enable(uint8_t rhport);
 #endif
@@ -114,7 +114,7 @@ typedef struct
 typedef osal_queue_def_t* osal_queue_t;
 
 // role device/host is used by OS NONE for mutex (disable usb isr) only
-#define OSAL_QUEUE_DEF(_role, _name, _depth, _type)       \
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type)       \
   uint8_t _name##_buf[_depth*sizeof(_type)];              \
   osal_queue_def_t _name = {                              \
     .ff = TU_FIFO_INIT(_name##_buf, _depth, _type, false) \
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_rtthread.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_rtthread.h
index d5c062ac15e..0845175b852 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_rtthread.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_rtthread.h
@@ -90,7 +90,7 @@ static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) {
 //--------------------------------------------------------------------+
 
 // role device/host is used by OS NONE for mutex (disable usb isr) only
-#define OSAL_QUEUE_DEF(_role, _name, _depth, _type) \
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
     static _type _name##_##buf[_depth]; \
     osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf };
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_rtx4.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_rtx4.h
new file mode 100644
index 00000000000..1856a5d9a68
--- /dev/null
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_rtx4.h
@@ -0,0 +1,170 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Tian Yunhao (t123yh)
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_OSAL_RTX4_H_
+#define _TUSB_OSAL_RTX4_H_
+
+#include <rtl.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+static inline void osal_task_delay(uint32_t msec)
+{
+  uint16_t hi = msec >> 16;
+  uint16_t lo = msec;
+  while (hi--) {
+    os_dly_wait(0xFFFE);
+  }
+  os_dly_wait(lo);
+}
+
+static inline uint16_t msec2wait(uint32_t msec) {
+  if (msec == OSAL_TIMEOUT_WAIT_FOREVER)
+    return 0xFFFF;
+  else if (msec >= 0xFFFE)
+    return 0xFFFE;
+  else
+    return msec;
+}
+
+//--------------------------------------------------------------------+
+// Semaphore API
+//--------------------------------------------------------------------+
+typedef OS_SEM osal_semaphore_def_t;
+typedef OS_ID osal_semaphore_t;
+
+static inline OS_ID osal_semaphore_create(osal_semaphore_def_t* semdef) {
+  os_sem_init(semdef, 0);
+  return semdef;
+}
+
+static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
+  if ( !in_isr ) {
+    os_sem_send(sem_hdl);
+  } else {
+    isr_sem_send(sem_hdl);
+  }
+	return true;
+}
+
+static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) {
+  return os_sem_wait(sem_hdl, msec2wait(msec)) != OS_R_TMO;
+}
+
+static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) {
+  // TODO: implement
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API (priority inheritance)
+//--------------------------------------------------------------------+
+typedef OS_MUT osal_mutex_def_t;
+typedef OS_ID osal_mutex_t;
+
+static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef)
+{
+  os_mut_init(mdef);
+  return mdef;
+}
+
+static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec)
+{
+  return os_mut_wait(mutex_hdl, msec2wait(msec)) != OS_R_TMO;
+}
+
+static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
+{
+  return os_mut_release(mutex_hdl) == OS_R_OK;
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+
+// role device/host is used by OS NONE for mutex (disable usb isr) only
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type)   \
+  os_mbx_declare(_name##__mbox, _depth);              \
+  _declare_box(_name##__pool, sizeof(_type), _depth); \
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .pool = _name##__pool, .mbox = _name##__mbox };
+  
+
+typedef struct
+{
+  uint16_t depth;
+  uint16_t item_sz;
+  U32* pool;
+  U32* mbox;
+}osal_queue_def_t;
+
+typedef osal_queue_def_t* osal_queue_t;
+
+static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
+{
+  os_mbx_init(qdef->mbox, (qdef->depth + 4) * 4);
+  _init_box(qdef->pool, ((qdef->item_sz+3)/4)*(qdef->depth) + 3, qdef->item_sz);
+  return qdef;
+}
+
+static inline bool osal_queue_receive(osal_queue_t qhdl, void* data)
+{
+  void* buf;
+  os_mbx_wait(qhdl->mbox, &buf, 0xFFFF);
+  memcpy(data, buf, qhdl->item_sz);
+  _free_box(qhdl->pool, buf);
+  return true;
+}
+
+static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
+{
+  void* buf = _alloc_box(qhdl->pool);
+  memcpy(buf, data, qhdl->item_sz);
+  if ( !in_isr )
+  {
+    os_mbx_send(qhdl->mbox, buf, 0xFFFF);
+  }
+  else
+  {
+    isr_mbx_send(qhdl->mbox, buf);
+  }
+  return true;
+}
+
+static inline bool osal_queue_empty(osal_queue_t qhdl)
+{
+  return os_mbx_check(qhdl->mbox) == qhdl->depth;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ehci/ehci.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ehci/ehci.h
index c2bee67a5bd..ff9ae12e755 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ehci/ehci.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ehci/ehci.h
@@ -101,8 +101,8 @@ typedef struct
 
 	// Word 2: qTQ Token
 	volatile uint32_t ping_err             : 1  ; ///< For Highspeed: 0 Out, 1 Ping. Full/Slow used as error indicator
-	volatile uint32_t non_hs_split_state   : 1  ; ///< Used by HC to track the state of slipt transaction
-	volatile uint32_t non_hs_missed_uframe : 1  ; ///< HC misses a complete slip transaction
+	volatile uint32_t non_hs_split_state   : 1  ; ///< Used by HC to track the state of split transaction
+	volatile uint32_t non_hs_missed_uframe : 1  ; ///< HC misses a complete split transaction
 	volatile uint32_t xact_err             : 1  ; ///< Error (Timeout, CRC, Bad PID ... )
 	volatile uint32_t babble_err           : 1  ; ///< Babble detected, also set Halted bit to 1
 	volatile uint32_t buffer_err           : 1  ; ///< Data overrun/underrun error
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/microchip/pic32mz/usbhs_registers.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/microchip/pic32mz/usbhs_registers.h
new file mode 100644
index 00000000000..757e3f08308
--- /dev/null
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/microchip/pic32mz/usbhs_registers.h
@@ -0,0 +1,931 @@
+/*******************************************************************************
+* Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries.
+*
+* Subject to your compliance with these terms, you may use Microchip software
+* and any derivatives exclusively with Microchip products. It is your
+* responsibility to comply with third party license terms applicable to your
+* use of third party software (including open source software) that may
+* accompany Microchip software.
+*
+* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER
+* EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED
+* WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A
+* PARTICULAR PURPOSE.
+*
+* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
+* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
+* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE
+* FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN
+* ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+*******************************************************************************/
+/*******************************************************************************
+  USBHS Peripheral Library Register Defintions 
+
+  File Name:
+    usbhs_registers.h
+
+  Summary:
+    USBHS PLIB Register Defintions
+
+  Description:
+    This file contains the constants and defintions which are required by the
+    the USBHS library.
+*******************************************************************************/
+
+#ifndef __USBHS_REGISTERS_H__
+#define __USBHS_REGISTERS_H__
+
+#include <p32xxxx.h>
+#include <stdint.h>
+
+/*****************************************
+ * Module Register Offsets.
+ *****************************************/
+
+#define USBHS_REG_FADDR         0x000
+#define USBHS_REG_POWER         0x001
+#define USBHS_REG_INTRTX        0x002
+#define USBHS_REG_INTRRX        0x004
+#define USBHS_REG_INTRTXE       0x006
+#define USBHS_REG_INTRRXE       0x008
+#define USBHS_REG_INTRUSB       0x00A 
+#define USBHS_REG_INTRUSBE      0x00B 
+#define USBHS_REG_FRAME         0x00C
+#define USBHS_REG_INDEX         0x00E
+#define USBHS_REG_TESTMODE      0x00F
+
+/*******************************************************
+ * Endpoint Control Status Registers (CSR). These values 
+ * should be added to either the 0x10 to access the
+ * register through Indexed CSR. To access the actual 
+ * CSR, see ahead in this header file.
+ ******************************************************/
+
+#define USBHS_REG_EP_TXMAXP     0x000
+#define USBHS_REG_EP_CSR0L      0x002
+#define USBHS_REG_EP_CSR0H      0x003
+#define USBHS_REG_EP_TXCSRL     0x002
+#define USBHS_REG_EP_TXCSRH     0x003
+#define USBHS_REG_EP_RXMAXP     0x004
+#define USBHS_REG_EP_RXCSRL     0x006
+#define USBHS_REG_EP_RXCSRH     0x007
+#define USBHS_REG_EP_COUNT0     0x008
+#define USBHS_REG_EP_RXCOUNT    0x008
+#define USBHS_REG_EP_TYPE0      0x01A
+#define USBHS_REG_EP_TXTYPE     0x01A
+#define USBHS_REG_EP_NAKLIMIT0  0x01B
+#define USBHS_REG_EP_TXINTERVAL 0x01B
+#define USBHS_REG_EP_RXTYPE     0x01C
+#define USBHS_REG_EP_RXINTERVAL 0x01D
+#define USBHS_REG_EP_CONFIGDATA 0x01F
+#define USBHS_REG_EP_FIFOSIZE   0x01F
+
+#define USBHS_HOST_EP0_SETUPKT_SET 0x8
+#define USBHS_HOST_EP0_TXPKTRDY_SET 0x2
+#define USBHS_SOFT_RST_NRST_SET 0x1
+#define USBHS_SOFT_RST_NRSTX_SET 0x2
+#define USBHS_EP0_DEVICE_SERVICED_RXPKTRDY 0x40
+#define USBHS_EP0_DEVICE_DATAEND 0x08
+#define USBHS_EP0_DEVICE_TXPKTRDY 0x02
+#define USBHS_EP0_HOST_STATUS_STAGE_START 0x40
+#define USBHS_EP0_HOST_REQPKT 0x20
+#define USBHS_EP0_HOST_TXPKTRDY 0x02
+#define USBHS_EP0_HOST_RXPKTRDY 0x01
+#define USBHS_EP_DEVICE_TX_SENT_STALL 0x20
+#define USBHS_EP_DEVICE_TX_SEND_STALL 0x10
+#define USBHS_EP_DEVICE_RX_SENT_STALL 0x40
+#define USBHS_EP_DEVICE_RX_SEND_STALL 0x20
+
+/* FADDR - Device Function Address */
+typedef union 
+{
+    struct __attribute__((packed)) 
+    {
+        unsigned FUNC:7;
+        unsigned :1;
+    };
+
+    uint8_t w;  
+
+} __USBHS_FADDR_t;
+
+/* POWER - Control Resume and Suspend signalling */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned SUSPEN:1;
+        unsigned SUSPMODE:1;
+        unsigned RESUME:1;
+        unsigned RESET:1;
+        unsigned HSMODE:1;
+        unsigned HSEN:1;
+        unsigned SOFTCONN:1;
+        unsigned ISOUPD:1;
+    };
+    struct
+    {   
+        uint8_t w;
+    };
+
+} __USBHS_POWER_t;
+
+/* INTRTXE - Transmit endpoint interrupt enable */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned EP0IE:1;
+        unsigned EP1TXIE:1;
+        unsigned EP2TXIE:1;
+        unsigned EP3TXIE:1;
+        unsigned EP4TXIE:1;
+        unsigned EP5TXIE:1;
+        unsigned EP6TXIE:1;
+        unsigned EP7TXIE:1;
+        unsigned :8;
+    };
+    struct
+    {
+        uint16_t    w;
+    };
+
+} __USBHS_INTRTXE_t;
+
+/* INTRRXE - Receive endpoint interrupt enable */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned :1;
+        unsigned EP1RXIE:1;
+        unsigned EP2RXIE:1;
+        unsigned EP3RXIE:1;
+        unsigned EP4RXIE:1;
+        unsigned EP5RXIE:1;
+        unsigned EP6RXIE:1;
+        unsigned EP7RXIE:1;
+        unsigned :8;
+    };
+    struct
+    {
+        uint16_t    w;
+    };
+
+} __USBHS_INTRRXE_t;
+
+/* INTRUSBE - General USB Interrupt enable */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned SUSPIE:1;
+        unsigned RESUMEIE:1;
+        unsigned RESETIE:1;
+        unsigned SOFIE:1;
+        unsigned CONNIE:1;
+        unsigned DISCONIE:1;
+        unsigned SESSRQIE:1;
+        unsigned VBUSERRIE:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_INTRUSBE_t;
+
+/* FRAME - Frame number */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned RFRMNUM:11;
+        unsigned :5;
+    };
+    struct
+    {
+        uint16_t w;
+    };
+
+} __USBHS_FRAME_t;
+
+/* INDEX - Endpoint index */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned ENDPOINT:4;
+        unsigned :4;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_INDEX_t;
+
+/* TESTMODE - Test mode register */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned NAK:1;
+        unsigned TESTJ:1;
+        unsigned TESTK:1;
+        unsigned PACKET:1;
+        unsigned FORCEHS:1;
+        unsigned FORCEFS:1;
+        unsigned FIFOACC:1;
+        unsigned FORCEHST:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TESTMODE_t;
+
+/* COUNT0 - Indicates the amount of data received in endpoint 0 */ 
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXCNT:7;
+        unsigned :1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_COUNT0_t;
+
+/* TYPE0 - Operating speed of target device */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned :6;
+        unsigned SPEED:2;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TYPE0_t;
+
+/* DEVCTL - Module control register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned SESSION:1;
+        unsigned HOSTREQ:1;
+        unsigned HOSTMODE:1;
+        unsigned VBUS:2;
+        unsigned LSDEV:1;
+        unsigned FSDEV:1;
+        unsigned BDEV:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_DEVCTL_t;
+
+/* CSR0L Device - Endpoint Device Mode Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned TXPKTRDY:1;
+        unsigned SENTSTALL:1;
+        unsigned DATAEND:1;
+        unsigned SETUPEND:1;
+        unsigned SENDSTALL:1;
+        unsigned SVCRPR:1;
+        unsigned SVSSETEND:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0L_DEVICE_t;
+
+/* CSR0L Host - Endpoint Host Mode Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned TXPKTRDY:1;
+        unsigned RXSTALL:1;
+        unsigned SETUPPKT:1;
+        unsigned ERROR:1;
+        unsigned REQPKT:1;
+        unsigned STATPKT:1;
+        unsigned NAKTMOUT:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0L_HOST_t;
+
+/* TXCSRL Device - Endpoint Transmit Control Status Register Low */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXPKTRDY:1;
+        unsigned FIFOONE:1;
+        unsigned UNDERRUN:1;
+        unsigned FLUSH:1;
+        unsigned SENDSTALL:1;
+        unsigned SENTSTALL:1;
+        unsigned CLRDT:1;
+        unsigned INCOMPTX:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRL_DEVICE_t;
+
+/* TXCSRL Host - Endpoint Transmit Control Status Register Low */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXPKTRDY:1;
+        unsigned FIFONE:1;
+        unsigned ERROR:1;
+        unsigned FLUSH:1;
+        unsigned SETUPPKT:1;
+        unsigned RXSTALL:1;
+        unsigned CLRDT:1;
+        unsigned INCOMPTX:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRL_HOST_t;
+
+/* TXCSRH Device - Endpoint Transmit Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned :2;
+        unsigned DMAREQMD:1;
+        unsigned FRCDATTG:1;
+        unsigned DMAREQENL:1;
+        unsigned MODE:1;
+        unsigned ISO:1;
+        unsigned AUTOSET:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRH_DEVICE_t;
+
+/* TXCSRH Host - Endpoint Transmit Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned DATATGGL:1;
+        unsigned DTWREN:1;
+        unsigned DMAREQMD:1;
+        unsigned FRCDATTG:1;
+        unsigned DMAREQEN:1;
+        unsigned MODE:1;
+        unsigned :1;
+        unsigned AUOTSET:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRH_HOST_t;
+
+/* CSR0H Device - Endpoint 0 Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned FLSHFIFO:1;
+        unsigned :7;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0H_DEVICE_t;
+
+/* CSR0H Host - Endpoint 0 Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned FLSHFIFO:1;
+        unsigned DATATGGL:1;
+        unsigned DTWREN:1;
+        unsigned DISPING:1;
+        unsigned :4;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0H_HOST_t;
+
+/* RXMAXP - Receive Endpoint Max packet size. */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXMAXP:11;
+        unsigned MULT:5;
+    };
+    struct
+    {
+        uint16_t w;
+    };
+
+} __USBHS_RXMAXP_t;
+
+/* RXCSRL Device - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned FIFOFULL:1;
+        unsigned OVERRUN:1;
+        unsigned DATAERR:1;
+        unsigned FLUSH:1;
+        unsigned SENDSTALL:1;
+        unsigned SENTSTALL:1;
+        unsigned CLRDT:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRL_DEVICE_t;
+
+/* RXCSRL Host - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned FIFOFULL:1;
+        unsigned ERROR:1;
+        unsigned DERRNAKT:1;
+        unsigned FLUSH:1;
+        unsigned REQPKT:1;
+        unsigned RXSTALL:1;
+        unsigned CLRDT:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRL_HOST_t;
+
+/* RXCSRH Device - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned INCOMPRX:1;
+        unsigned :2;
+        unsigned DMAREQMODE:1;
+        unsigned DISNYET:1;
+        unsigned DMAREQEN:1;
+        unsigned ISO:1;
+        unsigned AUTOCLR:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRH_DEVICE_t;
+
+/* RXCSRH Host - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned INCOMPRX:1;
+        unsigned DATATGGL:1;
+        unsigned DATATWEN:1;
+        unsigned DMAREQMD:1;
+        unsigned PIDERR:1;
+        unsigned DMAREQEN:1;
+        unsigned AUTORQ:1;
+        unsigned AUOTCLR:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRH_HOST_t;
+
+/* RXCOUNT - Amount of data pending in RX FIFO */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXCNT:14;
+        unsigned :2;
+    };
+    struct
+    {
+        uint16_t w;
+    };
+
+} __USBHS_RXCOUNT_t;
+
+/* TXTYPE - Specifies the target transmit endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TEP:4;
+        unsigned PROTOCOL:2;
+        unsigned SPEED:2;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXTYPE_t;
+
+/* RXTYPE - Specifies the target receive endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TEP:4;
+        unsigned PROTOCOL:2;
+        unsigned SPEED:2;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXTYPE_t;
+
+/* TXINTERVAL - Defines the polling interval */
+typedef struct
+{
+    uint8_t TXINTERV;
+
+} __USBHS_TXINTERVAL_t;
+
+/* RXINTERVAL - Defines the polling interval */
+typedef struct
+{
+    uint8_t RXINTERV;
+
+} __USBHS_RXINTERVAL_t;
+
+/* TXMAXP - Maximum amount of data that can be transferred through a TX endpoint
+ * */
+
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXMAXP:11;
+        unsigned MULT:5;
+    };
+    uint16_t w;
+
+} __USBHS_TXMAXP_t;  
+
+/* TXFIFOSZ - Size of the transmit endpoint FIFO */
+typedef struct __attribute__((packed))
+{
+    unsigned TXFIFOSZ:4;
+    unsigned TXDPB:1;
+    unsigned :3;
+
+} __USBHS_TXFIFOSZ_t;
+
+/* RXFIFOSZ - Size of the receive endpoint FIFO */
+typedef struct __attribute__((packed))
+{
+    unsigned RXFIFOSZ:4;
+    unsigned RXDPB:1;
+    unsigned :3;
+
+} __USBHS_RXFIFOSZ_t;
+
+/* TXFIFOADD - Start address of the transmit endpoint FIFO */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXFIFOAD:13;
+        unsigned :3;
+    };
+    uint16_t w;
+
+} __USBHS_TXFIFOADD_t;
+
+/* RXFIFOADD - Start address of the receive endpoint FIFO */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXFIFOAD:13;
+        unsigned :3;
+    };
+    uint16_t w;
+
+} __USBHS_RXFIFOADD_t;
+
+/* SOFTRST - Asserts NRSTO and NRSTOX */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned NRST:1;
+        unsigned NRSTX:1;
+        unsigned :6;
+    };
+    uint8_t w;
+
+} __USBHS_SOFTRST_t;
+
+/* TXFUNCADDR - Target address of transmit endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXFADDR:7;
+        unsigned :1;
+    };
+    uint8_t w;
+
+} __USBHS_TXFUNCADDR_t;
+
+/* RXFUNCADDR - Target address of receive endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXFADDR:7;
+        unsigned :1;
+    };
+    uint8_t w;
+
+} __USBHS_RXFUNCADDR_t;
+
+/* TXHUBADDR - Address of the hub to which the target transmit device endpoint
+ * is connected */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXHUBADDR:7;
+        unsigned MULTTRAN:1;
+    };
+    uint8_t w;
+
+} __USBHS_TXHUBADDR_t;
+
+/* RXHUBADDR - Address of the hub to which the target receive device endpoint is
+ * connected */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXHUBADDR:7;
+        unsigned MULTTRAN:1;
+    };
+    uint8_t w;
+
+} __USBHS_RXHUBADDR_t;
+
+/* TXHUBPORT - Address of the hub to which the target transmit device endpoint
+ * is connected. */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXHUBPRT:7;
+        unsigned :1;
+    };
+
+    uint8_t w;
+
+} __USBHS_TXHUBPORT_t;
+
+/* RXHUBPORT - Address of the hub to which the target receive device endpoint
+ * is connected. */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXHUBPRT:7;
+        unsigned :1;
+    };
+
+    uint8_t w;
+
+} __USBHS_RXHUBPORT_t;
+
+/* DMACONTROL - Configures a DMA channel */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned DMAEN:1;
+        unsigned DMADIR:1;
+        unsigned DMAMODE:1;
+        unsigned DMAIE:1;
+        unsigned DMAEP:4;
+        unsigned DMAERR:1;
+        unsigned DMABRSTM:2;
+        unsigned:21;
+    };
+
+    uint32_t w;
+
+} __USBHS_DMACNTL_t;
+
+/* Endpoint Control and Status Register Set */    
+typedef struct __attribute__((packed))
+{
+    volatile __USBHS_TXMAXP_t TXMAXPbits;
+    union
+    {
+        struct
+        {
+            union
+            {
+                volatile __USBHS_CSR0L_DEVICE_t CSR0L_DEVICEbits;
+                volatile __USBHS_CSR0L_HOST_t CSR0L_HOSTbits;
+            };
+            union
+            {
+                volatile __USBHS_CSR0H_DEVICE_t CSR0H_DEVICEbits;
+                volatile __USBHS_CSR0H_HOST_t CSR0H_HOSTbits;
+            };
+        };
+
+        struct
+        {
+            union
+            {
+                volatile __USBHS_TXCSRL_DEVICE_t TXCSRL_DEVICEbits;
+                volatile __USBHS_TXCSRL_HOST_t TXCSRL_HOSTbits;
+            };
+
+            union
+            {
+                volatile __USBHS_TXCSRH_DEVICE_t TXCSRH_DEVICEbits;
+                volatile __USBHS_TXCSRH_HOST_t TXCSRH_HOSTbits;
+            };
+        };
+    };
+
+    volatile __USBHS_RXMAXP_t RXMAXPbits;
+
+    union
+    {
+        volatile __USBHS_RXCSRL_DEVICE_t RXCSRL_DEVICEbits;
+        volatile __USBHS_RXCSRL_HOST_t RXCSRL_HOSTbits;
+    };
+
+    union
+    {
+        volatile __USBHS_RXCSRH_DEVICE_t RXCSRH_DEVICEbits;
+        volatile __USBHS_RXCSRH_HOST_t RXCSRH_HOSTbits;
+    };
+
+    union
+    {
+        volatile __USBHS_COUNT0_t COUNT0bits;
+        volatile __USBHS_RXCOUNT_t RXCOUNTbits;
+    };
+
+    union
+    {
+        volatile __USBHS_TYPE0_t TYPE0bits;
+        volatile __USBHS_TXTYPE_t TXTYPEbits;
+    };
+
+    union
+    {
+        volatile uint8_t NAKLIMIT0;
+        volatile __USBHS_TXINTERVAL_t TXINTERVALbits;
+    };
+
+    volatile __USBHS_RXTYPE_t RXTYPEbits;
+    volatile __USBHS_RXINTERVAL_t RXINTERVALbits;
+    unsigned :8;
+    union
+    {
+        volatile uint8_t CONFIGDATA;
+        volatile uint8_t FIFOSIZE;
+    };
+
+} __USBHS_EPCSR_t;
+
+/* Set of registers that configure the multi-point option */
+typedef struct __attribute__((packed))
+{
+    volatile __USBHS_TXFUNCADDR_t TXFUNCADDRbits;
+    unsigned :8;
+    volatile __USBHS_TXHUBADDR_t TXHUBADDRbits;
+    volatile __USBHS_TXHUBPORT_t TXHUBPORTbits;
+    volatile __USBHS_RXFUNCADDR_t RXFUNCADDRbits;
+    unsigned :8;
+    volatile __USBHS_RXHUBADDR_t RXHUBADDRbits;
+    volatile __USBHS_RXHUBPORT_t RXHUBPORTbits;
+
+} __USBHS_TARGET_ADDR_t;
+
+/* Set of registers that configure the DMA channel */
+typedef struct __attribute__((packed))
+{
+    volatile __USBHS_DMACNTL_t DMACNTLbits;
+    volatile uint32_t DMAADDR;
+    volatile uint32_t DMACOUNT;
+    volatile uint32_t pad;
+} __USBHS_DMA_CHANNEL_t;
+
+/* USBHS module register set */
+typedef struct __attribute__((aligned(4),packed))
+{
+    volatile __USBHS_FADDR_t    FADDRbits;
+    volatile __USBHS_POWER_t    POWERbits;
+    volatile uint16_t           INTRTX;
+    volatile uint16_t           INTRRX;
+    volatile __USBHS_INTRTXE_t  INTRTXEbits;
+    volatile __USBHS_INTRRXE_t  INTRRXEbits;
+    volatile uint8_t            INTRUSB;
+    volatile __USBHS_INTRUSBE_t INTRUSBEbits;
+    volatile __USBHS_FRAME_t    FRAMEbits;
+    volatile __USBHS_INDEX_t    INDEXbits;
+    volatile __USBHS_TESTMODE_t TESTMODEbits;
+    volatile __USBHS_EPCSR_t    INDEXED_EPCSR;
+    volatile uint32_t           FIFO[16];
+    volatile __USBHS_DEVCTL_t   DEVCTLbits;
+    volatile uint8_t            MISC;
+    volatile __USBHS_TXFIFOSZ_t TXFIFOSZbits;
+    volatile __USBHS_RXFIFOSZ_t RXFIFOSZbits;
+
+    volatile __USBHS_TXFIFOADD_t   TXFIFOADDbits;
+    volatile __USBHS_RXFIFOADD_t   RXFIFOADDbits;
+    
+    volatile uint32_t   VCONTROL;
+    volatile uint16_t   HWVERS;
+    volatile uint8_t    padding1[10];
+    volatile uint8_t    EPINFO;
+    volatile uint8_t    RAMINFO;
+    volatile uint8_t    LINKINFO;
+    volatile uint8_t    VPLEN;
+    volatile uint8_t    HS_EOF1;
+    volatile uint8_t    FS_EOF1;
+    volatile uint8_t    LS_EOF1;
+
+    volatile __USBHS_SOFTRST_t    SOFTRSTbits;
+
+    volatile __USBHS_TARGET_ADDR_t  TADDR[16];
+    volatile __USBHS_EPCSR_t        EPCSR[16];
+    volatile uint32_t               DMA_INTR;
+    volatile __USBHS_DMA_CHANNEL_t  DMA_CHANNEL[8]; 
+    volatile uint32_t               RQPKTXOUNT[16];
+
+} usbhs_registers_t;
+
+#endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ohci/ohci.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ohci/ohci.h
index cd90aa45a9f..9fc954c8f07 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ohci/ohci.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ohci/ohci.h
@@ -42,6 +42,9 @@ enum {
   OHCI_MAX_ITD = 4
 };
 
+#define ED_MAX       (CFG_TUH_DEVICE_MAX*CFG_TUH_ENDPOINT_MAX)
+#define GTD_MAX      ED_MAX
+
 //--------------------------------------------------------------------+
 // OHCI Data Structure
 //--------------------------------------------------------------------+
@@ -159,11 +162,11 @@ typedef struct TU_ATTR_ALIGNED(256)
   struct {
     ohci_ed_t ed;
     ohci_gtd_t gtd;
-  }control[CFG_TUH_DEVICE_MAX+1];
+  }control[CFG_TUH_DEVICE_MAX+CFG_TUH_HUB+1];
 
   //  ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32
-  ohci_ed_t ed_pool[HCD_MAX_ENDPOINT];
-  ohci_gtd_t gtd_pool[HCD_MAX_XFER];
+  ohci_ed_t ed_pool[ED_MAX];
+  ohci_gtd_t gtd_pool[GTD_MAX];
 
   volatile uint16_t frame_number_hi;
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/raspberrypi/rp2040/rp2040_usb.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/raspberrypi/rp2040/rp2040_usb.h
index a9cf1dd07f4..da1933ddd4b 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/raspberrypi/rp2040/rp2040_usb.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/raspberrypi/rp2040/rp2040_usb.h
@@ -56,7 +56,7 @@ typedef struct hw_endpoint
     // Interrupt, bulk, etc
     uint8_t transfer_type;
     
-#if TUSB_OPT_HOST_ENABLED
+#if CFG_TUH_ENABLED
     // Only needed for host
     uint8_t dev_addr;
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 596f7be6c44..bffae450001 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -91,6 +91,13 @@
   #include "stm32g4xx.h"
   #define PMA_LENGTH (1024u)
 
+#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
+  #include "stm32wbxx.h"
+  #define PMA_LENGTH (1024u)
+  /* ST provided header has incorrect value */
+  #undef USB_PMAADDR
+  #define USB_PMAADDR USB1_PMAADDR
+
 #else
   #error You are using an untested or unimplemented STM32 variant. Please update the driver.
   // This includes L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/sunxi/musb_def.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/sunxi/musb_def.h
new file mode 100644
index 00000000000..602b4f1136f
--- /dev/null
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/sunxi/musb_def.h
@@ -0,0 +1,643 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Koji KITAYAMA
+ * Copyright (c) 2021 Tian Yunhao (t123yh)
+ * Copyright (c) 2021 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_MUSB_DEF
+#define _TUSB_MUSB_DEF
+
+
+#define  USBC_Readb(reg)	                    (*(volatile unsigned char *)(reg))
+#define  USBC_Readw(reg)	                    (*(volatile unsigned short *)(reg))
+#define  USBC_Readl(reg)	                    (*(volatile unsigned long *)(reg))
+
+#define  USBC_Writeb(value, reg)                (*(volatile unsigned char *)(reg) = (value))
+#define  USBC_Writew(value, reg)	            (*(volatile unsigned short *)(reg) = (value))
+#define  USBC_Writel(value, reg)	            (*(volatile unsigned long *)(reg) = (value))
+
+
+#define USBC_SetBit_Mask_b(reg,mask)	do {																		\
+																				unsigned char _r = USBC_Readb(reg);	\
+																			   _r  |=  (unsigned char)(mask);				\
+																				USBC_Writeb(_r,reg); 								\
+																		}while(0)
+#define USBC_SetBit_Mask_w(reg,mask)	do {																		\
+																				unsigned short _r = USBC_Readw(reg);	\
+																			   _r  |=  (unsigned short)(mask);				\
+																				USBC_Writew(_r,reg); 								\
+																		}while(0)
+#define USBC_SetBit_Mask_l(reg,mask)	do {																		\
+																				unsigned int _r = USBC_Readl(reg);	\
+																			   _r  |=  (unsigned int)(mask);				\
+																				USBC_Writel(_r,reg); 								\
+																		}while(0)
+
+
+#define USBC_ClrBit_Mask_b(reg,mask)	do {																		\
+																				unsigned char _r = USBC_Readb(reg);	\
+																			   _r  &=  (~(unsigned char)(mask));			\
+																				USBC_Writeb(_r,reg); 								\
+																		}while(0);
+#define USBC_ClrBit_Mask_w(reg,mask)	do {																		\
+																				unsigned short _r = USBC_Readw(reg);	\
+																			   _r  &=  (~(unsigned short)(mask));				\
+																				USBC_Writew(_r,reg); 								\
+																		}while(0)
+#define USBC_ClrBit_Mask_l(reg,mask)	do {																		\
+																				unsigned int _r = USBC_Readl(reg);	\
+																			   _r  &=  (~(unsigned int)(mask));				\
+																				USBC_Writel(_r,reg); 								\
+																		}while(0)
+#define  USBC_REG_test_bit_b(bp, reg)         	(USBC_Readb(reg) & (1 << (bp)))
+#define  USBC_REG_test_bit_w(bp, reg)   	    (USBC_Readw(reg) & (1 << (bp)))
+#define  USBC_REG_test_bit_l(bp, reg)   	    (USBC_Readl(reg) & (1 << (bp)))
+
+#define  USBC_REG_set_bit_b(bp, reg) 			(USBC_Writeb((USBC_Readb(reg) | (1 << (bp))) , (reg)))
+#define  USBC_REG_set_bit_w(bp, reg) 	 		(USBC_Writew((USBC_Readw(reg) | (1 << (bp))) , (reg)))
+#define  USBC_REG_set_bit_l(bp, reg) 	 		(USBC_Writel((USBC_Readl(reg) | (1 << (bp))) , (reg)))
+
+#define  USBC_REG_clear_bit_b(bp, reg)	 	 	(USBC_Writeb((USBC_Readb(reg) & (~ (1 << (bp)))) , (reg)))
+#define  USBC_REG_clear_bit_w(bp, reg)	 	 	(USBC_Writew((USBC_Readw(reg) & (~ (1 << (bp)))) , (reg)))
+#define  USBC_REG_clear_bit_l(bp, reg)	 	 	(USBC_Writel((USBC_Readl(reg) & (~ (1 << (bp)))) , (reg)))
+
+#define SW_UDC_EPNUMS 3
+
+#define SUNXI_SRAMC_BASE 0x01c00000
+//---------------------------------------------------------------
+//   reg base
+//---------------------------------------------------------------
+#define  USBC0_BASE                 0x01c13000
+#define  USBC1_BASE                 0x01c14000
+#define  USBC2_BASE                 0x01c1E000
+
+//Some reg whithin musb
+#define USBPHY_CLK_REG 		0x01c200CC
+#define USBPHY_CLK_RST_BIT 0
+#define USBPHY_CLK_GAT_BIT 1
+
+#define BUS_CLK_RST_REG	0x01c202c0 //Bus Clock Reset Register Bit24 : USB CLK RST
+#define BUS_RST_USB_BIT	24
+
+#define BUS_CLK_GATE0_REG	0x01c20060 //Bus Clock Gating Register Bit24 : USB CLK GATE 0: Mask 1 : Pass
+#define BUS_CLK_USB_BIT	24
+
+//#define USB_INTR
+
+#define NDMA_CFG_REG
+//-----------------------------------------------------------------------
+//   musb reg offset
+//-----------------------------------------------------------------------
+
+#define  USBC_REG_o_FADDR		    0x0098
+#define  USBC_REG_o_PCTL		    0x0040
+#define  USBC_REG_o_INTTx		    0x0044
+#define  USBC_REG_o_INTRx		    0x0046
+#define  USBC_REG_o_INTTxE		    0x0048
+#define  USBC_REG_o_INTRxE		    0x004A
+#define  USBC_REG_o_INTUSB		    0x004C
+#define  USBC_REG_o_INTUSBE         0x0050
+#define  USBC_REG_o_FRNUM		    0x0054
+#define  USBC_REG_o_EPIND		    0x0042
+#define  USBC_REG_o_TMCTL		    0x007C
+
+#define  USBC_REG_o_TXMAXP		    0x0080
+#define  USBC_REG_o_CSR0		    0x0082
+#define  USBC_REG_o_TXCSR		    0x0082
+#define  USBC_REG_o_RXMAXP		    0x0084
+#define  USBC_REG_o_RXCSR		    0x0086
+#define  USBC_REG_o_COUNT0		    0x0088
+#define  USBC_REG_o_RXCOUNT		    0x0088
+#define  USBC_REG_o_EP0TYPE		    0x008C
+#define  USBC_REG_o_TXTYPE		    0x008C
+#define  USBC_REG_o_NAKLIMIT0	    0x008D
+#define  USBC_REG_o_TXINTERVAL      0x008D
+#define  USBC_REG_o_RXTYPE		    0x008E
+#define  USBC_REG_o_RXINTERVAL	    0x008F
+
+//#define  USBC_REG_o_CONFIGDATA	0x001F   //
+
+#define  USBC_REG_o_EPFIFO0		    0x0000
+#define  USBC_REG_o_EPFIFO1		    0x0004
+#define  USBC_REG_o_EPFIFO2		    0x0008
+#define  USBC_REG_o_EPFIFO3		    0x000C
+#define  USBC_REG_o_EPFIFO4		    0x0010
+#define  USBC_REG_o_EPFIFO5		    0x0014
+#define  USBC_REG_o_EPFIFOx(n)	    (0x0000 + (n<<2))
+
+#define  USBC_REG_o_DEVCTL		    0x0041
+
+#define  USBC_REG_o_TXFIFOSZ	    0x0090
+#define  USBC_REG_o_RXFIFOSZ	    0x0094
+#define  USBC_REG_o_TXFIFOAD	    0x0092
+#define  USBC_REG_o_RXFIFOAD	    0x0096
+
+#define  USBC_REG_o_VEND0		    0x0043
+#define  USBC_REG_o_VEND1		    0x007D
+#define  USBC_REG_o_VEND3		    0x007E
+
+//#define  USBC_REG_o_PHYCTL		0x006C
+#define  USBC_REG_o_EPINFO		    0x0078
+#define  USBC_REG_o_RAMINFO		    0x0079
+#define  USBC_REG_o_LINKINFO	    0x007A
+#define  USBC_REG_o_VPLEN		    0x007B
+#define  USBC_REG_o_HSEOF		    0x007C
+#define  USBC_REG_o_FSEOF		    0x007D
+#define  USBC_REG_o_LSEOF		    0x007E
+
+//new
+#define  USBC_REG_o_FADDR0          0x0098
+#define  USBC_REG_o_HADDR0          0x009A
+#define  USBC_REG_o_HPORT0          0x009B
+#define  USBC_REG_o_TXFADDRx 		0x0098
+#define  USBC_REG_o_TXHADDRx		0x009A
+#define  USBC_REG_o_TXHPORTx		0x009B
+#define  USBC_REG_o_RXFADDRx		0x009C
+#define  USBC_REG_o_RXHADDRx		0x009E
+#define  USBC_REG_o_RXHPORTx		0x009F
+
+
+#define  USBC_REG_o_RPCOUNT			0x008A
+
+//new
+#define  USBC_REG_o_ISCR            0x0400
+#define  USBC_REG_o_PHYCTL          0x0404
+#define  USBC_REG_o_PHYBIST         0x0408
+#define  USBC_REG_o_PHYTUNE         0x040c
+
+#define  USBC_REG_o_CSR			0x0410
+
+#define USBC_REG_o_PMU_IRQ	 0x0800
+
+//-----------------------------------------------------------------------
+//   registers
+//-----------------------------------------------------------------------
+
+#define  USBC_REG_FADDR(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_FADDR		)
+#define  USBC_REG_PCTL(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_PCTL			)
+#define  USBC_REG_INTTx(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_INTTx		)
+#define  USBC_REG_INTRx(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_INTRx		)
+#define  USBC_REG_INTTxE(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_INTTxE     	)
+#define  USBC_REG_INTRxE(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_INTRxE     	)
+#define  USBC_REG_INTUSB(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_INTUSB     	)
+#define  USBC_REG_INTUSBE(usbc_base_addr)           ((usbc_base_addr) + USBC_REG_o_INTUSBE    	)
+#define  USBC_REG_FRNUM(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_FRNUM      	)
+#define  USBC_REG_EPIND(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_EPIND      	)
+#define  USBC_REG_TMCTL(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_TMCTL      	)
+#define  USBC_REG_TXMAXP(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_TXMAXP     	)
+
+#define  USBC_REG_CSR0(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_CSR0       	)
+#define  USBC_REG_TXCSR(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_TXCSR      	)
+
+#define  USBC_REG_RXMAXP(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_RXMAXP     	)
+#define  USBC_REG_RXCSR(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_RXCSR      	)
+
+#define  USBC_REG_COUNT0(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_COUNT0     	)
+#define  USBC_REG_RXCOUNT(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_RXCOUNT    	)
+
+#define  USBC_REG_EP0TYPE(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EP0TYPE		)
+#define  USBC_REG_TXTYPE(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_TXTYPE     	)
+
+#define  USBC_REG_NAKLIMIT0(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_NAKLIMIT0  	)
+#define  USBC_REG_TXINTERVAL(usbc_base_addr)        ((usbc_base_addr) + USBC_REG_o_TXINTERVAL	)
+
+#define  USBC_REG_RXTYPE(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_RXTYPE		)
+#define  USBC_REG_RXINTERVAL(usbc_base_addr)	    ((usbc_base_addr) + USBC_REG_o_RXINTERVAL	)
+//#define  USBC_REG_CONFIGDATA(usbc_base_addr)	    ((usbc_base_addr) + USBC_REG_o_CONFIGDATA	)
+#define  USBC_REG_EPFIFO0(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO0		)
+#define  USBC_REG_EPFIFO1(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO1		)
+#define  USBC_REG_EPFIFO2(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO2		)
+#define  USBC_REG_EPFIFO3(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO3		)
+#define  USBC_REG_EPFIFO4(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO4		)
+#define  USBC_REG_EPFIFO5(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO5		)
+#define  USBC_REG_EPFIFOx(usbc_base_addr, n)	    ((usbc_base_addr) + USBC_REG_o_EPFIFOx(n)	)
+#define  USBC_REG_DEVCTL(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_DEVCTL		)
+#define  USBC_REG_TXFIFOSZ(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_TXFIFOSZ		)
+#define  USBC_REG_RXFIFOSZ(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_RXFIFOSZ		)
+#define  USBC_REG_TXFIFOAD(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_TXFIFOAD		)
+#define  USBC_REG_RXFIFOAD(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_RXFIFOAD		)
+#define  USBC_REG_VEND0(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_VEND0		)
+#define  USBC_REG_VEND1(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_VEND1		)
+#define  USBC_REG_EPINFO(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPINFO		)
+#define  USBC_REG_RAMINFO(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_RAMINFO		)
+#define  USBC_REG_LINKINFO(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_LINKINFO		)
+#define  USBC_REG_VPLEN(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_VPLEN		)
+#define  USBC_REG_HSEOF(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_HSEOF		)
+#define  USBC_REG_FSEOF(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_FSEOF		)
+#define  USBC_REG_LSEOF(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_LSEOF		)
+
+#define  USBC_REG_FADDR0(usbc_base_addr)            ((usbc_base_addr) + USBC_REG_o_FADDR0		)
+#define  USBC_REG_HADDR0(usbc_base_addr)            ((usbc_base_addr) + USBC_REG_o_HADDR0		)
+#define  USBC_REG_HPORT0(usbc_base_addr)            ((usbc_base_addr) + USBC_REG_o_HPORT0		)
+
+#define  USBC_REG_TXFADDRx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_TXFADDRx		)
+#define  USBC_REG_TXHADDRx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_TXHADDRx		)
+#define  USBC_REG_TXHPORTx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_TXHPORTx		)
+#define  USBC_REG_RXFADDRx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_RXFADDRx		)
+#define  USBC_REG_RXHADDRx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_RXHADDRx		)
+#define  USBC_REG_RXHPORTx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_RXHPORTx		)
+
+#define  USBC_REG_RPCOUNTx(usbc_base_addr, n)	    ((usbc_base_addr) + USBC_REG_o_RPCOUNT		)
+
+#define  USBC_REG_ISCR(usbc_base_addr)	    	    ((usbc_base_addr) + USBC_REG_o_ISCR			)
+#define  USBC_REG_PHYCTL(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_PHYCTL		)
+#define  USBC_REG_PHYBIST(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_PHYBIST		)
+#define  USBC_REG_PHYTUNE(usbc_base_addr)           ((usbc_base_addr) + USBC_REG_o_PHYTUNE		)
+#define  USBC_REG_PMU_IRQ(usbc_base_addr)           ((usbc_base_addr) + USBC_REG_o_PMU_IRQ		)
+#define  USBC_REG_CSR(usbc_base_addr)           ((usbc_base_addr) + USBC_REG_o_CSR)
+//-----------------------------------------------------------------------
+//   bit position
+//-----------------------------------------------------------------------
+
+/* USB Power Control for Host only  */
+#define  USBC_BP_POWER_H_HIGH_SPEED_EN			5
+#define  USBC_BP_POWER_H_HIGH_SPEED_FLAG		4
+#define  USBC_BP_POWER_H_RESET					3
+#define  USBC_BP_POWER_H_RESUME					2
+#define  USBC_BP_POWER_H_SUSPEND				1
+#define  USBC_BP_POWER_H_SUEPEND_EN				0
+
+/* USB Power Control for device only  */
+#define  USBC_BP_POWER_D_ISO_UPDATE_EN			7
+#define  USBC_BP_POWER_D_SOFT_CONNECT			6
+#define  USBC_BP_POWER_D_HIGH_SPEED_EN			5
+#define  USBC_BP_POWER_D_HIGH_SPEED_FLAG		4
+#define  USBC_BP_POWER_D_RESET_FLAG				3
+#define  USBC_BP_POWER_D_RESUME					2
+#define  USBC_BP_POWER_D_SUSPEND				1
+#define  USBC_BP_POWER_D_ENABLE_SUSPENDM		0
+
+/* interrupt flags for ep0 and the Tx ep1~4 */
+#define  USBC_BP_INTTx_FLAG_EP5				    5
+#define  USBC_BP_INTTx_FLAG_EP4				    4
+#define  USBC_BP_INTTx_FLAG_EP3				    3
+#define  USBC_BP_INTTx_FLAG_EP2		    		2
+#define  USBC_BP_INTTx_FLAG_EP1  				1
+#define  USBC_BP_INTTx_FLAG_EP0					0
+
+/* interrupt flags for Rx ep1~4 */
+#define  USBC_BP_INTRx_FLAG_EP5				    5
+#define  USBC_BP_INTRx_FLAG_EP4				    4
+#define  USBC_BP_INTRx_FLAG_EP3				    3
+#define  USBC_BP_INTRx_FLAG_EP2				    2
+#define  USBC_BP_INTRx_FLAG_EP1				    1
+
+/* interrupt enable for Tx ep0~4 */
+#define  USBC_BP_INTTxE_EN_EP5				    5
+#define  USBC_BP_INTTxE_EN_EP4				    4
+#define  USBC_BP_INTTxE_EN_EP3				    3
+#define  USBC_BP_INTTxE_EN_EP2				    2
+#define  USBC_BP_INTTxE_EN_EP1				    1
+#define  USBC_BP_INTTxE_EN_EP0					0
+
+/* interrupt enable for Rx ep1~4 */
+#define  USBC_BP_INTRxE_EN_EP5				    5
+#define  USBC_BP_INTRxE_EN_EP4				    4
+#define  USBC_BP_INTRxE_EN_EP3				    3
+#define  USBC_BP_INTRxE_EN_EP2			    	2
+#define  USBC_BP_INTRxE_EN_EP1  		    	1
+
+/* USB interrupt */
+#define  USBC_BP_INTUSB_VBUS_ERROR				7
+#define  USBC_BP_INTUSB_SESSION_REQ				6
+#define  USBC_BP_INTUSB_DISCONNECT				5
+#define  USBC_BP_INTUSB_CONNECT					4
+#define  USBC_BP_INTUSB_SOF						3
+#define  USBC_BP_INTUSB_RESET					2
+#define  USBC_BP_INTUSB_RESUME					1
+#define  USBC_BP_INTUSB_SUSPEND					0
+
+/* USB interrupt enable */
+#define  USBC_BP_INTUSBE_EN_VBUS_ERROR			7
+#define  USBC_BP_INTUSBE_EN_SESSION_REQ			6
+#define  USBC_BP_INTUSBE_EN_DISCONNECT			5
+#define  USBC_BP_INTUSBE_EN_CONNECT				4
+#define  USBC_BP_INTUSBE_EN_SOF					3
+#define  USBC_BP_INTUSBE_EN_RESET				2
+#define  USBC_BP_INTUSBE_EN_RESUME				1
+#define  USBC_BP_INTUSBE_EN_SUSPEND				0
+
+/* Test Mode Control */
+#define  USBC_BP_TMCTL_FORCE_HOST               7
+#define  USBC_BP_TMCTL_FIFO_ACCESS              6
+#define  USBC_BP_TMCTL_FORCE_FS                 5
+#define  USBC_BP_TMCTL_FORCE_HS                 4
+#define  USBC_BP_TMCTL_TEST_PACKET              3
+#define  USBC_BP_TMCTL_TEST_K                   2
+#define  USBC_BP_TMCTL_TEST_J                   1
+#define  USBC_BP_TMCTL_TEST_SE0_NAK             0
+
+/* Tx Max packet */
+#define  USBC_BP_TXMAXP_PACKET_COUNT            11
+#define  USBC_BP_TXMAXP_MAXIMUM_PAYLOAD         0
+
+/* Control and Status Register for ep0 for Host only */
+#define  USBC_BP_CSR0_H_DisPing 				11
+#define  USBC_BP_CSR0_H_FlushFIFO				8
+#define  USBC_BP_CSR0_H_NAK_Timeout				7
+#define  USBC_BP_CSR0_H_StatusPkt				6
+#define  USBC_BP_CSR0_H_ReqPkt					5
+#define  USBC_BP_CSR0_H_Error					4
+#define  USBC_BP_CSR0_H_SetupPkt				3
+#define  USBC_BP_CSR0_H_RxStall					2
+#define  USBC_BP_CSR0_H_TxPkRdy					1
+#define  USBC_BP_CSR0_H_RxPkRdy					0
+
+/* Control and Status Register for ep0 for device only */
+#define  USBC_BP_CSR0_D_FLUSH_FIFO				8
+#define  USBC_BP_CSR0_D_SERVICED_SETUP_END		7
+#define  USBC_BP_CSR0_D_SERVICED_RX_PKT_READY   6
+#define  USBC_BP_CSR0_D_SEND_STALL				5
+#define  USBC_BP_CSR0_D_SETUP_END				4
+#define  USBC_BP_CSR0_D_DATA_END				3
+#define  USBC_BP_CSR0_D_SENT_STALL				2
+#define  USBC_BP_CSR0_D_TX_PKT_READY			1
+#define  USBC_BP_CSR0_D_RX_PKT_READY			0
+
+/* Tx ep Control and Status Register for Host only */
+#define  USBC_BP_TXCSR_H_AUTOSET				15
+#define  USBC_BP_TXCSR_H_RESERVED				14
+#define  USBC_BP_TXCSR_H_MODE				    13
+#define  USBC_BP_TXCSR_H_DMA_REQ_EN			 	12
+#define  USBC_BP_TXCSR_H_FORCE_DATA_TOGGLE		11
+#define  USBC_BP_TXCSR_H_DMA_REQ_MODE			10
+#define  USBC_BP_TXCSR_H_NAK_TIMEOUT			7
+#define  USBC_BP_TXCSR_H_CLEAR_DATA_TOGGLE		6
+#define  USBC_BP_TXCSR_H_TX_STALL				5
+#define  USBC_BP_TXCSR_H_FLUSH_FIFO				3
+#define  USBC_BP_TXCSR_H_ERROR					2
+#define  USBC_BP_TXCSR_H_FIFO_NOT_EMPTY 		1
+#define  USBC_BP_TXCSR_H_TX_READY				0
+
+/* Tx ep Control and Status Register for Device only */
+#define  USBC_BP_TXCSR_D_AUTOSET				15
+#define  USBC_BP_TXCSR_D_ISO					14
+#define  USBC_BP_TXCSR_D_MODE					13
+#define  USBC_BP_TXCSR_D_DMA_REQ_EN				12
+#define  USBC_BP_TXCSR_D_FORCE_DATA_TOGGLE		11
+#define  USBC_BP_TXCSR_D_DMA_REQ_MODE			10
+#define  USBC_BP_TXCSR_D_INCOMPLETE				7
+#define  USBC_BP_TXCSR_D_CLEAR_DATA_TOGGLE		6
+#define  USBC_BP_TXCSR_D_SENT_STALL				5
+#define  USBC_BP_TXCSR_D_SEND_STALL				4
+#define  USBC_BP_TXCSR_D_FLUSH_FIFO				3
+#define  USBC_BP_TXCSR_D_UNDER_RUN				2
+#define  USBC_BP_TXCSR_D_FIFO_NOT_EMPTY 		1
+#define  USBC_BP_TXCSR_D_TX_READY				0
+
+/* Rx Max Packet */
+#define  USBC_BP_RXMAXP_PACKET_COUNT            11
+#define  USBC_BP_RXMAXP_MAXIMUM_PAYLOAD         0
+
+/* Rx ep Control and Status Register for Host only */
+#define  USBC_BP_RXCSR_H_AUTO_CLEAR			    15
+#define  USBC_BP_RXCSR_H_AUTO_REQ			    14
+#define  USBC_BP_RXCSR_H_DMA_REQ_EN			    13
+#define  USBC_BP_RXCSR_H_PID_ERROR			    12
+#define  USBC_BP_RXCSR_H_DMA_REQ_MODE		    11
+
+#define  USBC_BP_RXCSR_H_INCOMPLETE			    8
+#define  USBC_BP_RXCSR_H_CLEAR_DATA_TOGGLE	    7
+#define  USBC_BP_RXCSR_H_RX_STALL			    6
+#define  USBC_BP_RXCSR_H_REQ_PACKET			    5
+#define  USBC_BP_RXCSR_H_FLUSH_FIFO			    4
+#define  USBC_BP_RXCSR_H_NAK_TIMEOUT		    3
+#define  USBC_BP_RXCSR_H_ERROR				    2
+#define  USBC_BP_RXCSR_H_FIFO_FULL			    1
+#define  USBC_BP_RXCSR_H_RX_PKT_READY		    0
+
+/* Rx ep Control and Status Register for Device only */
+#define  USBC_BP_RXCSR_D_AUTO_CLEAR			    15
+#define  USBC_BP_RXCSR_D_ISO				    14
+#define  USBC_BP_RXCSR_D_DMA_REQ_EN			    13
+#define  USBC_BP_RXCSR_D_DISABLE_NYET		    12
+#define  USBC_BP_RXCSR_D_DMA_REQ_MODE		    11
+
+#define  USBC_BP_RXCSR_D_INCOMPLETE			    8
+#define  USBC_BP_RXCSR_D_CLEAR_DATA_TOGGLE	    7
+#define  USBC_BP_RXCSR_D_SENT_STALL			    6
+#define  USBC_BP_RXCSR_D_SEND_STALL			    5
+#define  USBC_BP_RXCSR_D_FLUSH_FIFO			    4
+#define  USBC_BP_RXCSR_D_DATA_ERROR			    3
+#define  USBC_BP_RXCSR_D_OVERRUN			    2
+#define  USBC_BP_RXCSR_D_FIFO_FULL			    1
+#define  USBC_BP_RXCSR_D_RX_PKT_READY		    0
+
+/* Tx Type Register for host only */
+#define  USBC_BP_TXTYPE_SPEED	                6              //new
+#define  USBC_BP_TXTYPE_PROROCOL	            4
+#define  USBC_BP_TXTYPE_TARGET_EP_NUM           0
+
+/* Rx Type Register for host only */
+#define  USBC_BP_RXTYPE_SPEED		            6              //new
+#define  USBC_BP_RXTYPE_PROROCOL	            4
+#define  USBC_BP_RXTYPE_TARGET_EP_NUM           0
+
+/* Core Configueation */
+#define  USBC_BP_CONFIGDATA_MPRXE               7
+#define  USBC_BP_CONFIGDATA_MPTXE               6
+#define  USBC_BP_CONFIGDATA_BIGENDIAN		    5
+#define  USBC_BP_CONFIGDATA_HBRXE			    4
+#define  USBC_BP_CONFIGDATA_HBTXE			    3
+#define  USBC_BP_CONFIGDATA_DYNFIFO_SIZING	    2
+#define  USBC_BP_CONFIGDATA_SOFTCONE		    1
+#define  USBC_BP_CONFIGDATA_UTMI_DATAWIDTH	    0
+
+/* OTG Device Control */
+#define  USBC_BP_DEVCTL_B_DEVICE			    7
+#define  USBC_BP_DEVCTL_FS_DEV				    6
+#define  USBC_BP_DEVCTL_LS_DEV				    5
+
+#define  USBC_BP_DEVCTL_VBUS				    3
+#define  USBC_BP_DEVCTL_HOST_MODE			    2
+#define  USBC_BP_DEVCTL_HOST_REQ			    1
+#define  USBC_BP_DEVCTL_SESSION				    0
+
+/* Tx EP FIFO size control */
+#define  USBC_BP_TXFIFOSZ_DPB				    4
+#define  USBC_BP_TXFIFOSZ_SZ				    0
+
+/* Rx EP FIFO size control */
+#define  USBC_BP_RXFIFOSZ_DPB				    4
+#define  USBC_BP_RXFIFOSZ_SZ				    0
+
+/* vendor0 */
+#define  USBC_BP_VEND0_DRQ_SEL				    1
+#define  USBC_BP_VEND0_BUS_SEL				    0
+
+/* hub address */
+#define  USBC_BP_HADDR_MULTI_TT					7
+
+/* Interface Status and Control */
+#define  USBC_BP_ISCR_VBUS_VALID_FROM_DATA		30
+#define  USBC_BP_ISCR_VBUS_VALID_FROM_VBUS		29
+#define  USBC_BP_ISCR_EXT_ID_STATUS				28
+#define  USBC_BP_ISCR_EXT_DM_STATUS				27
+#define  USBC_BP_ISCR_EXT_DP_STATUS				26
+#define  USBC_BP_ISCR_MERGED_VBUS_STATUS		25
+#define  USBC_BP_ISCR_MERGED_ID_STATUS			24
+
+#define  USBC_BP_ISCR_ID_PULLUP_EN				17
+#define  USBC_BP_ISCR_DPDM_PULLUP_EN			16
+#define  USBC_BP_ISCR_FORCE_ID					14
+#define  USBC_BP_ISCR_FORCE_VBUS_VALID			12
+#define  USBC_BP_ISCR_VBUS_VALID_SRC			10
+
+#define  USBC_BP_ISCR_HOSC_EN                 	7
+#define  USBC_BP_ISCR_VBUS_CHANGE_DETECT      	6
+#define  USBC_BP_ISCR_ID_CHANGE_DETECT        	5
+#define  USBC_BP_ISCR_DPDM_CHANGE_DETECT      	4
+#define  USBC_BP_ISCR_IRQ_ENABLE              	3
+#define  USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN   	2
+#define  USBC_BP_ISCR_ID_CHANGE_DETECT_EN     	1
+#define  USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN   	0
+
+
+#define SUNXI_EHCI_AHB_ICHR8_EN		(1 << 10)
+#define SUNXI_EHCI_AHB_INCR4_BURST_EN	(1 << 9)
+#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN	(1 << 8)
+#define SUNXI_EHCI_ULPI_BYPASS_EN	(1 << 0)
+//-----------------------------------------------------------------------
+//   �Զ���
+//-----------------------------------------------------------------------
+
+/* usb��Դ���� */
+#define  USBC_MAX_CTL_NUM                   1
+#define  USBC_MAX_EP_NUM                    3   //ep0~2, ep�ĸ���
+#define  USBC_MAX_FIFO_SIZE                 (2 * 1024)
+
+/* usb OTG mode */
+#define  USBC_OTG_HOST                      0
+#define  USBC_OTG_DEVICE                    1
+
+/* usb device type */
+#define  USBC_DEVICE_HSDEV                  0
+#define  USBC_DEVICE_FSDEV                  1
+#define  USBC_DEVICE_LSDEV                  2
+
+/*  usb transfer type  */
+#define  USBC_TS_TYPE_IDLE                  0
+#define  USBC_TS_TYPE_CTRL                  1
+#define  USBC_TS_TYPE_ISO                   2
+#define  USBC_TS_TYPE_INT                   3
+#define  USBC_TS_TYPE_BULK                  4
+
+/*  usb transfer mode  */
+#define  USBC_TS_MODE_UNKOWN                0
+#define  USBC_TS_MODE_LS                    1
+#define  USBC_TS_MODE_FS                    2
+#define  USBC_TS_MODE_HS                    3
+
+/* usb Vbus status */
+#define  USBC_VBUS_STATUS_BELOW_SESSIONEND                 0
+#define  USBC_VBUS_STATUS_ABOVE_SESSIONEND_BELOW_AVALID    1
+#define  USBC_VBUS_STATUS_ABOVE_AVALID_BELOW_VBUSVALID     2
+#define  USBC_VBUS_STATUS_ABOVE_VBUSVALID                  3
+
+/* usb io type */
+#define  USBC_IO_TYPE_PIO    		        0
+#define  USBC_IO_TYPE_DMA    		        1
+
+/* usb ep type */
+#define  USBC_EP_TYPE_IDLE    		        0
+#define  USBC_EP_TYPE_EP0    		        1
+#define  USBC_EP_TYPE_TX     		        2
+#define  USBC_EP_TYPE_RX     		        3
+
+/* usb id type */
+#define  USBC_ID_TYPE_DISABLE      	        0
+#define  USBC_ID_TYPE_HOST         	        1
+#define  USBC_ID_TYPE_DEVICE       	        2
+
+/* usb vbus valid type */
+#define  USBC_VBUS_TYPE_DISABLE    	        0
+#define  USBC_VBUS_TYPE_LOW       	        1
+#define  USBC_VBUS_TYPE_HIGH       	        2
+
+/* usb a valid source */
+#define  USBC_A_VALID_SOURCE_UTMI_AVALID	0
+#define  USBC_A_VALID_SOURCE_UTMI_VBUS    	1
+
+/* usb device switch */
+#define  USBC_DEVICE_SWITCH_OFF             0
+#define  USBC_DEVICE_SWITCH_ON              1
+
+/* usb fifo config mode */
+#define  USBC_FIFO_MODE_4K                  0
+#define  USBC_FIFO_MODE_8K                  1
+
+/*
+ **************************************************
+ *  usb interrupt mask
+ *
+ **************************************************
+ */
+
+/* interrupt flags for ep0 and the Tx ep1~4 */
+#define  USBC_INTTx_FLAG_EP5				    (1 << USBC_BP_INTTx_FLAG_EP5)
+#define  USBC_INTTx_FLAG_EP4				    (1 << USBC_BP_INTTx_FLAG_EP4)
+#define  USBC_INTTx_FLAG_EP3				    (1 << USBC_BP_INTTx_FLAG_EP3)
+#define  USBC_INTTx_FLAG_EP2		    		(1 << USBC_BP_INTTx_FLAG_EP2)
+#define  USBC_INTTx_FLAG_EP1  				    (1 << USBC_BP_INTTx_FLAG_EP1)
+#define  USBC_INTTx_FLAG_EP0					(1 << USBC_BP_INTTx_FLAG_EP0)
+
+/* interrupt flags for Rx ep1~4 */
+#define  USBC_INTRx_FLAG_EP5				    (1 << USBC_BP_INTRx_FLAG_EP5)
+#define  USBC_INTRx_FLAG_EP4				    (1 << USBC_BP_INTRx_FLAG_EP4)
+#define  USBC_INTRx_FLAG_EP3				    (1 << USBC_BP_INTRx_FLAG_EP3)
+#define  USBC_INTRx_FLAG_EP2				    (1 << USBC_BP_INTRx_FLAG_EP2)
+#define  USBC_INTRx_FLAG_EP1				    (1 << USBC_BP_INTRx_FLAG_EP1)
+
+/* USB interrupt */
+#define  USBC_INTUSB_VBUS_ERROR				    (1 << USBC_BP_INTUSB_VBUS_ERROR)
+#define  USBC_INTUSB_SESSION_REQ				(1 << USBC_BP_INTUSB_SESSION_REQ)
+#define  USBC_INTUSB_DISCONNECT				    (1 << USBC_BP_INTUSB_DISCONNECT)
+#define  USBC_INTUSB_CONNECT					(1 << USBC_BP_INTUSB_CONNECT)
+#define  USBC_INTUSB_SOF						(1 << USBC_BP_INTUSB_SOF)
+#define  USBC_INTUSB_RESET					    (1 << USBC_BP_INTUSB_RESET)
+#define  USBC_INTUSB_RESUME					    (1 << USBC_BP_INTUSB_RESUME)
+#define  USBC_INTUSB_SUSPEND					(1 << USBC_BP_INTUSB_SUSPEND)
+
+#define USB_CSRL0_NAKTO         0x00000080  // NAK Timeout
+#define USB_CSRL0_SETENDC       0x00000080  // Setup End Clear
+#define USB_CSRL0_STATUS        0x00000040  // STATUS Packet
+#define USB_CSRL0_RXRDYC        0x00000040  // RXRDY Clear
+#define USB_CSRL0_REQPKT        0x00000020  // Request Packet
+#define USB_CSRL0_STALL         0x00000020  // Send Stall
+#define USB_CSRL0_SETEND        0x00000010  // Setup End
+#define USB_CSRL0_ERROR         0x00000010  // Error
+#define USB_CSRL0_DATAEND       0x00000008  // Data End
+#define USB_CSRL0_SETUP         0x00000008  // Setup Packet
+#define USB_CSRL0_STALLED       0x00000004  // Endpoint Stalled
+#define USB_CSRL0_TXRDY         0x00000002  // Transmit Packet Ready
+#define USB_CSRL0_RXRDY         0x00000001  // Receive Packet Ready
+
+#define USB_RXFIFOSZ_DPB        0x00000010  // Double Packet Buffer Support
+#define USB_RXFIFOSZ_SIZE_M     0x0000000F  // Max Packet Size
+
+#define USB_TXFIFOSZ_DPB        0x00000010  // Double Packet Buffer Support
+#define USB_TXFIFOSZ_SIZE_M     0x0000000F  // Max Packet Size
+
+#endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_bcm.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_bcm.h
index 353bc21ee7a..14194e7548f 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_bcm.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_bcm.h
@@ -31,6 +31,7 @@
  extern "C" {
 #endif
 
+#include "broadcom/defines.h"
 #include "broadcom/interrupts.h"
 #include "broadcom/caches.h"
 
@@ -47,7 +48,6 @@ static inline void dwc2_dcd_int_enable(uint8_t rhport)
 {
   (void) rhport;
   BP_EnableIRQ(USB_IRQn);
-  __asm__ volatile("isb"); // needed if TIMER1 IRQ is not enabled !?
 }
 
 TU_ATTR_ALWAYS_INLINE
@@ -55,7 +55,6 @@ static inline void dwc2_dcd_int_disable (uint8_t rhport)
 {
   (void) rhport;
   BP_DisableIRQ(USB_IRQn);
-  __asm__ volatile("isb"); // needed if TIMER1 IRQ is not enabled !?
 }
 
 static inline void dwc2_remote_wakeup_delay(void)
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_type.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_type.h
index dbef20314c3..7fa2028eb93 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_type.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_type.h
@@ -986,16 +986,16 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo   ) == 0x1000, "incorrect size");
 
 /********************  Bit definition for OTG register  ********************/
 #define GNPTXFSIZ_NPTXFSA_Pos            (0U)
-#define GNPTXFSIZ_NPTXFSA_Msk            (0xFFFFUL << NPTXFSA_Pos)                // 0x0000FFFF */
+#define GNPTXFSIZ_NPTXFSA_Msk            (0xFFFFUL << GNPTXFSIZ_NPTXFSA_Pos)                // 0x0000FFFF */
 #define GNPTXFSIZ_NPTXFSA                GNPTXFSIZ_NPTXFSA_Msk                    // Nonperiodic transmit RAM start address */
 #define GNPTXFSIZ_NPTXFD_Pos             (16U)
-#define GNPTXFSIZ_NPTXFD_Msk             (0xFFFFUL << NPTXFD_Pos)                 // 0xFFFF0000 */
+#define GNPTXFSIZ_NPTXFD_Msk             (0xFFFFUL << GNPTXFSIZ_NPTXFD_Pos)                 // 0xFFFF0000 */
 #define GNPTXFSIZ_NPTXFD                 GNPTXFSIZ_NPTXFD_Msk                     // Nonperiodic TxFIFO depth               */
 #define DIEPTXF0_TX0FSA_Pos              (0U)
-#define DIEPTXF0_TX0FSA_Msk              (0xFFFFUL << TX0FSA_Pos)                 // 0x0000FFFF */
+#define DIEPTXF0_TX0FSA_Msk              (0xFFFFUL << DIEPTXF0_TX0FSA_Pos)                 // 0x0000FFFF */
 #define DIEPTXF0_TX0FSA                  DIEPTXF0_TX0FSA_Msk                      // Endpoint 0 transmit RAM start address  */
 #define DIEPTXF0_TX0FD_Pos               (16U)
-#define DIEPTXF0_TX0FD_Msk               (0xFFFFUL << TX0FD_Pos)                  // 0xFFFF0000 */
+#define DIEPTXF0_TX0FD_Msk               (0xFFFFUL << DIEPTXF0_TX0FD_Pos)                  // 0xFFFF0000 */
 #define DIEPTXF0_TX0FD                   DIEPTXF0_TX0FD_Msk                       // Endpoint 0 TxFIFO depth                */
 
 /********************  Bit definition for DVBUSPULSE register  ********************/
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h
index 0d29e106c9b..b776d7d010f 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h
@@ -38,8 +38,10 @@
 #include "osal/osal.h"
 #include "common/tusb_fifo.h"
 
+#include "class/hid/hid.h"
+
 //------------- HOST -------------//
-#if TUSB_OPT_HOST_ENABLED
+#if CFG_TUH_ENABLED
   #include "host/usbh.h"
 
   #if CFG_TUH_HID
@@ -61,7 +63,7 @@
 #endif
 
 //------------- DEVICE -------------//
-#if TUSB_OPT_DEVICE_ENABLED
+#if CFG_TUD_ENABLED
   #include "device/usbd.h"
 
   #if CFG_TUD_HID
@@ -117,8 +119,6 @@
 //--------------------------------------------------------------------+
 // APPLICATION API
 //--------------------------------------------------------------------+
-/** \ingroup group_application_api
- *  @{ */
 
 // Initialize device/host stack
 // Note: when using with RTOS, this should be called after scheduler/kernel is started.
@@ -131,8 +131,6 @@ bool tusb_inited(void);
 // TODO
 // bool tusb_teardown(void);
 
-/** @} */
-
 #ifdef __cplusplus
  }
 #endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h
index 2edd310fa52..bd87a953c47 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h
@@ -30,7 +30,7 @@
 #include "common/tusb_compiler.h"
 
 #define TUSB_VERSION_MAJOR     0
-#define TUSB_VERSION_MINOR     12
+#define TUSB_VERSION_MINOR     13
 #define TUSB_VERSION_REVISION  0
 #define TUSB_VERSION_STRING    TU_STRING(TUSB_VERSION_MAJOR) "." TU_STRING(TUSB_VERSION_MINOR) "." TU_STRING(TUSB_VERSION_REVISION)
 
@@ -80,6 +80,7 @@
 #define OPT_MCU_STM32L4           309 ///< ST L4
 #define OPT_MCU_STM32G0           310 ///< ST G0
 #define OPT_MCU_STM32G4           311 ///< ST G4
+#define OPT_MCU_STM32WB           312 ///< ST WB
 
 // Sony
 #define OPT_MCU_CXD56             400 ///< SONY CXD56
@@ -132,10 +133,22 @@
 
 // Broadcom
 #define OPT_MCU_BCM2711          1700 ///< Broadcom BCM2711
+#define OPT_MCU_BCM2835          1701 ///< Broadcom BCM2835
+#define OPT_MCU_BCM2837          1702 ///< Broadcom BCM2837
 
 // Infineon
 #define OPT_MCU_XMC4000          1800 ///< Infineon XMC4000
 
+// PIC
+#define OPT_MCU_PIC32MZ          1900 ///< MicroChip PIC32MZ family
+
+// BridgeTek
+#define OPT_MCU_FT90X            2000 ///< BridgeTek FT90x
+#define OPT_MCU_FT93X            2001 ///< BridgeTek FT93x
+
+// Allwinner
+#define OPT_MCU_F1C100S          2100 ///< Allwinner F1C100s family
+
 // Helper to check if configured MCU is one of listed
 // Apply _TU_CHECK_MCU with || as separator to list of input
 #define _TU_CHECK_MCU(_m)   (CFG_TUSB_MCU == _m)
@@ -151,6 +164,7 @@
 #define OPT_OS_CUSTOM     4  ///< Custom OS is implemented by application
 #define OPT_OS_PICO       5  ///< Raspberry Pi Pico SDK
 #define OPT_OS_RTTHREAD   6  ///< RT-Thread
+#define OPT_OS_RTX4       7  ///< Keil RTX 4
 
 // Allow to use command line to change the config name/location
 #ifdef CFG_TUSB_CONFIG_FILE
@@ -159,27 +173,29 @@
   #include "tusb_config.h"
 #endif
 
+#include "common/tusb_mcu.h"
+
 //--------------------------------------------------------------------
 // RootHub Mode Configuration
 // CFG_TUSB_RHPORTx_MODE contains operation mode and speed for that port
 //--------------------------------------------------------------------
 
-// Lower 4-bit is operational mode
-#define OPT_MODE_NONE         0x00 ///< Disabled
-#define OPT_MODE_DEVICE       0x01 ///< Device Mode
-#define OPT_MODE_HOST         0x02 ///< Host Mode
-
-// Higher 4-bit is max operational speed (corresponding to tusb_speed_t)
-#define OPT_MODE_FULL_SPEED   0x00 ///< Max Full Speed
-#define OPT_MODE_LOW_SPEED    0x10 ///< Max Low Speed
-#define OPT_MODE_HIGH_SPEED   0x20 ///< Max High Speed
+// Low byte is operational mode
+#define OPT_MODE_NONE           0x0000 ///< Disabled
+#define OPT_MODE_DEVICE         0x0001 ///< Device Mode
+#define OPT_MODE_HOST           0x0002 ///< Host Mode
 
+// High byte is max operational speed (corresponding to tusb_speed_t)
+#define OPT_MODE_DEFAULT_SPEED  0x0000 ///< Default (max) speed supported by MCU
+#define OPT_MODE_LOW_SPEED      0x0100 ///< Low Speed
+#define OPT_MODE_FULL_SPEED     0x0200 ///< Full Speed
+#define OPT_MODE_HIGH_SPEED     0x0400 ///< High Speed
+#define OPT_MODE_SPEED_MASK     0xff00
 
 #ifndef CFG_TUSB_RHPORT0_MODE
   #define CFG_TUSB_RHPORT0_MODE OPT_MODE_NONE
 #endif
 
-
 #ifndef CFG_TUSB_RHPORT1_MODE
   #define CFG_TUSB_RHPORT1_MODE OPT_MODE_NONE
 #endif
@@ -189,20 +205,57 @@
   #error "TinyUSB currently does not support same modes on more than 1 roothub port"
 #endif
 
-// Which roothub port is configured as host
-#define TUH_OPT_RHPORT          ( ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST) ? 0 : (((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST) ? 1 : -1) )
-#define TUSB_OPT_HOST_ENABLED   ( TUH_OPT_RHPORT >= 0 )
+//------------- Roothub as Device -------------//
 
-// Which roothub port is configured as device
-#define TUD_OPT_RHPORT          ( ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE) ? 0 : (((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE) ? 1 : -1) )
+#if (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE
+  #define TUD_RHPORT_MODE     (CFG_TUSB_RHPORT0_MODE)
+  #define TUD_OPT_RHPORT      0
+#elif (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE
+  #define TUD_RHPORT_MODE     (CFG_TUSB_RHPORT1_MODE)
+  #define TUD_OPT_RHPORT      1
+#else
+  #define TUD_RHPORT_MODE     OPT_MODE_NONE
+  #define TUD_OPT_RHPORT      -1
+#endif
+
+#define CFG_TUD_ENABLED       (TUD_RHPORT_MODE & OPT_MODE_DEVICE)
 
-#if TUD_OPT_RHPORT == 0
-#define TUD_OPT_HIGH_SPEED      ( (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HIGH_SPEED )
+#if CFG_TUD_ENABLED
+  #define TUD_OPT_HIGH_SPEED  ((TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) ? (TUD_RHPORT_MODE & OPT_MODE_HIGH_SPEED) : (TUP_RHPORT_HIGHSPEED & (1 << TUD_OPT_RHPORT)))
+#else
+  #define TUD_OPT_HIGH_SPEED  0
+#endif
+
+//------------- Roothub as Host -------------//
+
+#if (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST
+  #define TUH_RHPORT_MODE  (CFG_TUSB_RHPORT0_MODE)
+  #define TUH_OPT_RHPORT   0
+#elif (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST
+  #define TUH_RHPORT_MODE  (CFG_TUSB_RHPORT1_MODE)
+  #define TUH_OPT_RHPORT   1
+#else
+  #define TUH_RHPORT_MODE   OPT_MODE_NONE
+  #define TUH_OPT_RHPORT   -1
+#endif
+
+#define CFG_TUH_ENABLED     ( TUH_RHPORT_MODE & OPT_MODE_HOST )
+
+// For backward compatible
+#define TUSB_OPT_DEVICE_ENABLED CFG_TUD_ENABLED
+#define TUSB_OPT_HOST_ENABLED   CFG_TUH_ENABLED
+
+// TODO move later
+// TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN.
+// In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler
+// to generate unaligned access code.
+// LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM
+#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX)
+  #define TUP_MCU_STRICT_ALIGN   1
 #else
-#define TUD_OPT_HIGH_SPEED      ( (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HIGH_SPEED )
+  #define TUP_MCU_STRICT_ALIGN   0
 #endif
 
-#define TUSB_OPT_DEVICE_ENABLED ( TUD_OPT_RHPORT >= 0 )
 
 //--------------------------------------------------------------------+
 // COMMON OPTIONS
@@ -232,6 +285,9 @@
   #define CFG_TUSB_OS_INC_PATH
 #endif
 
+// mutex is only needed for RTOS TODO also required with multiple core MCUs
+#define TUSB_OPT_MUTEX    (CFG_TUSB_OS != OPT_OS_NONE)
+
 //--------------------------------------------------------------------
 // DEVICE OPTIONS
 //--------------------------------------------------------------------
@@ -300,7 +356,7 @@
 //--------------------------------------------------------------------
 // HOST OPTIONS
 //--------------------------------------------------------------------
-#if TUSB_OPT_HOST_ENABLED
+#if CFG_TUH_ENABLED
   #ifndef CFG_TUH_DEVICE_MAX
     #define CFG_TUH_DEVICE_MAX 1
   #endif
@@ -308,7 +364,7 @@
   #ifndef CFG_TUH_ENUMERATION_BUFSIZE
     #define CFG_TUH_ENUMERATION_BUFSIZE 256
   #endif
-#endif // TUSB_OPT_HOST_ENABLED
+#endif // CFG_TUH_ENABLED
 
 //------------- CLASS -------------//
 
@@ -336,31 +392,10 @@
 #define CFG_TUH_VENDOR 0
 #endif
 
-//--------------------------------------------------------------------+
-// Port Specific
-// TUP stand for TinyUSB Port (can be renamed)
-//--------------------------------------------------------------------+
-
-//------------- Unaligned Memory -------------//
-
-// ARMv7+ (M3-M7, M23-M33) can access unaligned memory
-#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7))
-  #define TUP_ARCH_STRICT_ALIGN   0
-#else
-  #define TUP_ARCH_STRICT_ALIGN   1
+#ifndef CFG_TUH_API_EDPT_XFER
+#define CFG_TUH_API_EDPT_XFER 0
 #endif
 
-// TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN.
-// In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler
-// to generate unaligned access code.
-// LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM
-#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX)
-  #define TUP_MCU_STRICT_ALIGN   1
-#else
-  #define TUP_MCU_STRICT_ALIGN   0
-#endif
-
-
 //------------------------------------------------------------------
 // Configuration Validation
 //------------------------------------------------------------------
diff --git a/tools/sdk/esp32s2/include/button/button/include/iot_button.h b/tools/sdk/esp32s2/include/button/button/include/iot_button.h
new file mode 100644
index 00000000000..3e735133464
--- /dev/null
+++ b/tools/sdk/esp32s2/include/button/button/include/iot_button.h
@@ -0,0 +1,272 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _IOT_BUTTON_H_
+#define _IOT_BUTTON_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <driver/gpio.h>
+#include <freertos/FreeRTOS.h>
+#include <freertos/portmacro.h>
+typedef void (* button_cb)(void*);
+typedef void* button_handle_t;
+
+typedef enum {
+    BUTTON_ACTIVE_HIGH = 1,    /*!<button active level: high level*/
+    BUTTON_ACTIVE_LOW = 0,     /*!<button active level: low level*/
+} button_active_t;
+
+typedef enum {
+    BUTTON_CB_PUSH = 0,   /*!<button push callback event */
+    BUTTON_CB_RELEASE,    /*!<button release callback event */
+    BUTTON_CB_TAP,        /*!<button quick tap callback event(will not trigger if there already is a "PRESS" event) */
+    BUTTON_CB_SERIAL,     /*!<button serial trigger callback event */
+} button_cb_type_t;
+
+/**
+ * @brief Init button functions
+ *
+ * @param gpio_num GPIO index of the pin that the button uses
+ * @param active_level button hardware active level.
+ *        For "BUTTON_ACTIVE_LOW" it means when the button pressed, the GPIO will read low level.
+ *
+ * @return A button_handle_t handle to the created button object, or NULL in case of error.
+ */
+button_handle_t iot_button_create(gpio_num_t gpio_num, button_active_t active_level);
+
+/**
+ * @brief Register a callback function for a serial trigger event.
+ *
+ * @param btn_handle handle of the button object
+ * @param start_after_sec define the time after which to start serial trigger action
+ * @param interval_tick serial trigger interval
+ * @param cb callback function for "TAP" action.
+ * @param arg Parameter for callback function
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_set_serial_cb(button_handle_t btn_handle, uint32_t start_after_sec, TickType_t interval_tick, button_cb cb, void* arg);
+
+/**
+ * @brief Register a callback function for a button_cb_type_t action.
+ *
+ * @param btn_handle handle of the button object
+ * @param type callback function type
+ * @param cb callback function for "TAP" action.
+ * @param arg Parameter for callback function
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_set_evt_cb(button_handle_t btn_handle, button_cb_type_t type, button_cb cb, void* arg);
+
+/**
+ * @brief Callbacks invoked as timer events occur while button is pressed.
+ *        Example: If a button is configured for 2 sec, 5 sec and 7 sec callbacks and if the button is pressed for 6 sec then 2 sec callback would be invoked at 2 sec event and 5 sec callback would be invoked at 5 sec event
+ *
+ * @param btn_handle handle of the button object
+ * @param press_sec the callback function would be called if you press the button for a specified period of time
+ * @param cb callback function for "PRESS and HOLD" action.
+ * @param arg Parameter for callback function
+ *
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_add_on_press_cb(button_handle_t btn_handle, uint32_t press_sec, button_cb cb, void* arg);
+
+/**
+ * @brief Single callback invoked according to the latest timer event on button release. 
+ *        Example: If a button is configured for 2 sec, 5 sec and 7 sec callbacks and if the button is released at 6 sec then only 5 sec callback would be invoked
+ *
+ * @param btn_handle handle of the button object
+ * @param press_sec the callback function would be called if you press the button for a specified period of time
+ * @param cb callback function for "PRESS and RELEASE" action.
+ * @param arg Parameter for callback function
+ * 
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_add_on_release_cb(button_handle_t btn_handle, uint32_t press_sec, button_cb cb, void* arg);
+
+/**
+ * @brief Delete button object and free memory
+ * @param btn_handle handle of the button object
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_delete(button_handle_t btn_handle);
+
+/**
+ * @brief Remove callback
+ *
+ * @param btn_handle The handle of the button object
+ * @param type callback function event type
+ *
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t iot_button_rm_cb(button_handle_t btn_handle, button_cb_type_t type);
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifdef __cplusplus
+
+/**
+ * class of button
+ * simple usage:
+ * CButton* btn = new CButton(BUTTON_IO_NUM, BUTTON_ACTIVE_LEVEL, BUTTON_SERIAL_TRIGGER, 3);
+ * btn->add_cb(BUTTON_CB_PUSH, button_tap_cb, (void*) push, 50 / portTICK_PERIOD_MS);
+ * btn->add_custom_cb(5, button_press_5s_cb, NULL);
+ * ......
+ * delete btn;
+ */
+class CButton
+{
+private:
+    button_handle_t m_btn_handle;
+
+    /**
+     * prevent copy constructing
+     */
+    CButton(const CButton&);
+    CButton& operator = (const CButton&);
+public:
+
+    /**
+     * @brief constructor of CButton
+     * 
+     * @param gpio_num GPIO index of the pin that the button uses
+     * @param active_level button hardware active level.
+     *        For "BUTTON_ACTIVE_LOW" it means when the button pressed, the GPIO will read low level.
+     */
+    CButton(gpio_num_t gpio_num, button_active_t active_level = BUTTON_ACTIVE_LOW);
+    
+    ~CButton();
+
+    /**
+     * @brief Register a callback function for a button_cb_type_t action.
+     *
+     * @param type callback function type
+     * @param cb callback function for "TAP" action.
+     * @param arg Parameter for callback function
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t set_evt_cb(button_cb_type_t type, button_cb cb, void* arg);
+
+    /**
+     * @brief Register a callback function for a serial trigger event.
+     *
+     * @param btn_handle handle of the button object
+     * @param start_after_sec define the time after which to start serial trigger action
+     * @param interval_tick serial trigger interval
+     * @param cb callback function for "TAP" action.
+     * @param arg Parameter for callback function
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t set_serial_cb(button_cb cb, void* arg, TickType_t interval_tick, uint32_t start_after_sec);
+
+    /**
+     * @brief Callbacks invoked as timer events occur while button is pressed
+     *
+     * @param press_sec the callback function would be called if you press the button for a specified period of time
+     * @param cb callback function for "PRESS and HOLD" action.
+     * @param arg Parameter for callback function
+     *
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t add_on_press_cb(uint32_t press_sec, button_cb cb, void* arg);
+    
+    /**
+     * @brief Single callback invoked according to the latest timer event on button release.
+     *
+     * @param press_sec the callback function would be called if you press the button for a specified period of time
+     * @param cb callback function for "PRESS and RELEASE" action.
+     * @param arg Parameter for callback function
+     *
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t add_on_release_cb(uint32_t press_sec, button_cb cb, void* arg);
+    
+    /**
+     * @brief Remove callback
+     *
+     * @param type callback function event type
+     *
+     * @return
+     *     - ESP_OK Success
+     */
+    esp_err_t rm_cb(button_cb_type_t type);
+};
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s2/include/driver/esp32s2/include/driver/adc.h b/tools/sdk/esp32s2/include/driver/esp32s2/include/driver/adc.h
deleted file mode 100644
index 000fa73bb24..00000000000
--- a/tools/sdk/esp32s2/include/driver/esp32s2/include/driver/adc.h
+++ /dev/null
@@ -1,247 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-#include "driver/adc_common.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*---------------------------------------------------------------
-                    Common setting
----------------------------------------------------------------*/
-
-/**
- * @brief Config ADC module arbiter.
- *        The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
- *        the low priority controller will read the invalid ADC2 data, and the validity of the data can be judged by the flag bit in the data.
- *
- * @note Only ADC2 support arbiter.
- * @note Default priority: Wi-Fi > RTC > Digital;
- * @note In normal use, there is no need to call this interface to config arbiter.
- *
- * @param adc_unit ADC unit.
- * @param config Refer to `adc_arbiter_t`.
- *
- * @return
- *      - ESP_OK Success
- *      - ESP_ERR_NOT_SUPPORTED ADC unit not support arbiter.
- */
-esp_err_t adc_arbiter_config(adc_unit_t adc_unit, adc_arbiter_t *config);
-
-/*---------------------------------------------------------------
-                    Digital controller setting
----------------------------------------------------------------*/
-
-/**
- * @brief Enable digital controller to trigger the measurement.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_start(void);
-
-/**
- * @brief Disable digital controller to trigger the measurement.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_stop(void);
-
-/*************************************/
-/* Digital controller filter setting */
-/*************************************/
-/**
- * @brief Reset adc digital controller filter.
- *
- * @param idx Filter index.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_filter_reset(adc_digi_filter_idx_t idx);
-
-/**
- * @brief Set adc digital controller filter configuration.
- *
- * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
- *
- * @param idx Filter index.
- * @param config See ``adc_digi_filter_t``.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_filter_set_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
-
-/**
- * @brief Get adc digital controller filter configuration.
- *
- * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
- *
- * @param idx Filter index.
- * @param config See ``adc_digi_filter_t``.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_filter_get_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
-
-/**
- * @brief Enable/disable adc digital controller filter.
- *        Filtering the ADC data to obtain smooth data at higher sampling rates.
- *
- * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
- *
- * @param idx Filter index.
- * @param enable Enable/Disable filter.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_filter_enable(adc_digi_filter_idx_t idx, bool enable);
-
-/**************************************/
-/* Digital controller monitor setting */
-/**************************************/
-
-/**
- * @brief Config monitor of adc digital controller.
- *
- * @note For ESP32S2, The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
- *
- * @param idx Monitor index.
- * @param config See ``adc_digi_monitor_t``.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_monitor_set_config(adc_digi_monitor_idx_t idx, adc_digi_monitor_t *config);
-
-/**
- * @brief Enable/disable monitor of adc digital controller.
- *
- * @note For ESP32S2, The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
- *
- * @param idx Monitor index.
- * @param enable True or false enable monitor.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_monitor_enable(adc_digi_monitor_idx_t idx, bool enable);
-
-/**************************************/
-/*   Digital controller intr setting  */
-/**************************************/
-
-/**
- * @brief Enable interrupt of adc digital controller by bitmask.
- *
- * @param adc_unit ADC unit.
- * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_intr_enable(adc_unit_t adc_unit, adc_digi_intr_t intr_mask);
-
-/**
- * @brief Disable interrupt of adc digital controller by bitmask.
- *
- * @param adc_unit ADC unit.
- * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_intr_disable(adc_unit_t adc_unit, adc_digi_intr_t intr_mask);
-
-/**
- * @brief Clear interrupt of adc digital controller by bitmask.
- *
- * @param adc_unit ADC unit.
- * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_intr_clear(adc_unit_t adc_unit, adc_digi_intr_t intr_mask);
-
-/**
- * @brief Get interrupt status mask of adc digital controller.
- *
- * @param adc_unit ADC unit.
- * @return
- *     - intr Interrupt bitmask, See ``adc_digi_intr_t``.
- */
-uint32_t adc_digi_intr_get_status(adc_unit_t adc_unit);
-
-/**
- * @brief Register ADC interrupt handler, the handler is an ISR.
- *        The handler will be attached to the same CPU core that this function is running on.
- *
- * @param fn Interrupt handler function.
- * @param arg Parameter for handler function
- * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
- *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
- *
- * @return
- *     - ESP_OK Success
- *     - ESP_ERR_NOT_FOUND Can not find the interrupt that matches the flags.
- *     - ESP_ERR_INVALID_ARG Function pointer error.
- */
-esp_err_t adc_digi_isr_register(void (*fn)(void *), void *arg, int intr_alloc_flags);
-
-/**
- * @brief Deregister ADC interrupt handler, the handler is an ISR.
- *
- * @return
- *     - ESP_OK Success
- *     - ESP_ERR_INVALID_ARG hander error.
- *     - ESP_FAIL ISR not be registered.
- */
-esp_err_t adc_digi_isr_deregister(void);
-
-/*---------------------------------------------------------------
-                    RTC controller setting
----------------------------------------------------------------*/
-
-/*---------------------------------------------------------------
-                    Deprecated API
----------------------------------------------------------------*/
-/**
- * @brief Set I2S data source
- *
- * @param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC.
- *
- * @deprecated The ESP32S2 don't use I2S DMA. Call ``adc_digi_controller_config`` instead.
- *
- * @return
- *     - ESP_OK success
- */
-esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src) __attribute__((deprecated));
-
-/**
- * @brief Initialize I2S ADC mode
- *
- * @param adc_unit ADC unit index
- * @param channel ADC channel index
- *
- * @deprecated The ESP32S2 don't use I2S DMA. Call ``adc_digi_controller_config`` instead.
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel) __attribute__((deprecated));
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/adc.h b/tools/sdk/esp32s2/include/driver/include/driver/adc.h
new file mode 100644
index 00000000000..5cd19dacd7d
--- /dev/null
+++ b/tools/sdk/esp32s2/include/driver/include/driver/adc.h
@@ -0,0 +1,646 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "sdkconfig.h"
+#include "driver/gpio.h"
+#include "hal/adc_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO36 */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO37 */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO38 */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO39 */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO32 */
+    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO33 */
+    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO34 */
+    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO35 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO1  */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO2  */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO3  */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO4  */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO5  */
+    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO6  */
+    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO7  */
+    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO8  */
+    ADC1_CHANNEL_8,     /*!< ADC1 channel 8 is GPIO9  */
+    ADC1_CHANNEL_9,     /*!< ADC1 channel 9 is GPIO10 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO1 */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO2 */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO3 */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO4 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#endif // CONFIG_IDF_TARGET_*
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
+/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO4  (ESP32), GPIO11 (ESP32-S2) */
+    ADC2_CHANNEL_1,     /*!< ADC2 channel 1 is GPIO0  (ESP32), GPIO12 (ESP32-S2) */
+    ADC2_CHANNEL_2,     /*!< ADC2 channel 2 is GPIO2  (ESP32), GPIO13 (ESP32-S2) */
+    ADC2_CHANNEL_3,     /*!< ADC2 channel 3 is GPIO15 (ESP32), GPIO14 (ESP32-S2) */
+    ADC2_CHANNEL_4,     /*!< ADC2 channel 4 is GPIO13 (ESP32), GPIO15 (ESP32-S2) */
+    ADC2_CHANNEL_5,     /*!< ADC2 channel 5 is GPIO12 (ESP32), GPIO16 (ESP32-S2) */
+    ADC2_CHANNEL_6,     /*!< ADC2 channel 6 is GPIO14 (ESP32), GPIO17 (ESP32-S2) */
+    ADC2_CHANNEL_7,     /*!< ADC2 channel 7 is GPIO27 (ESP32), GPIO18 (ESP32-S2) */
+    ADC2_CHANNEL_8,     /*!< ADC2 channel 8 is GPIO25 (ESP32), GPIO19 (ESP32-S2) */
+    ADC2_CHANNEL_9,     /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */
+    ADC2_CHANNEL_MAX,
+} adc2_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */
+    ADC2_CHANNEL_MAX,
+} adc2_channel_t;
+#endif
+
+
+/**
+ * @brief ADC rtc controller attenuation option.
+ *
+ * @note  This definitions are only for being back-compatible
+ */
+#define ADC_ATTEN_0db   ADC_ATTEN_DB_0
+#define ADC_ATTEN_2_5db ADC_ATTEN_DB_2_5
+#define ADC_ATTEN_6db   ADC_ATTEN_DB_6
+#define ADC_ATTEN_11db  ADC_ATTEN_DB_11
+
+/**
+ * The default (max) bit width of the ADC of current version. You can also get the maximum bitwidth
+ * by `SOC_ADC_MAX_BITWIDTH` defined in soc_caps.h.
+ */
+#define ADC_WIDTH_BIT_DEFAULT   (ADC_WIDTH_MAX-1)
+
+//this definitions are only for being back-compatible
+#define ADC_WIDTH_9Bit  ADC_WIDTH_BIT_9
+#define ADC_WIDTH_10Bit ADC_WIDTH_BIT_10
+#define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
+#define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
+
+/**
+ * @brief ADC digital controller encode option.
+ *
+ * @deprecated The ESP32-S2 doesn't use I2S DMA. Call ``adc_digi_output_format_t`` instead.
+ */
+typedef enum {
+    ADC_ENCODE_12BIT,        /*!< ADC to DMA data format,          , [15:12]-channel [11:0]-12 bits ADC data */
+    ADC_ENCODE_11BIT,        /*!< ADC to DMA data format, [15]-unit, [14:11]-channel [10:0]-11 bits ADC data */
+    ADC_ENCODE_MAX,
+} adc_i2s_encode_t;
+
+/*---------------------------------------------------------------
+                    Common setting
+---------------------------------------------------------------*/
+
+/**
+ * @brief Enable ADC power
+ * @deprecated Use adc_power_acquire and adc_power_release instead.
+ */
+void adc_power_on(void) __attribute__((deprecated));
+
+/**
+ * @brief Power off SAR ADC
+ * @deprecated Use adc_power_acquire and adc_power_release instead.
+ * This function will force power down for ADC.
+ * This function is deprecated because forcing power ADC power off may
+ * disrupt operation of other components which may be using the ADC.
+ */
+void adc_power_off(void) __attribute__((deprecated));
+
+/**
+ * @brief Increment the usage counter for ADC module.
+ * ADC will stay powered on while the counter is greater than 0.
+ * Call adc_power_release when done using the ADC.
+ */
+void adc_power_acquire(void);
+
+/**
+ * @brief Decrement the usage counter for ADC module.
+ * ADC will stay powered on while the counter is greater than 0.
+ * Call this function when done using the ADC.
+ */
+void adc_power_release(void);
+
+/*---------------------------------------------------------------
+                    ADC Single Read Setting
+---------------------------------------------------------------*/
+/**
+ * @brief Get the GPIO number of a specific ADC1 channel.
+ *
+ * @param channel Channel to get the GPIO number
+ * @param gpio_num output buffer to hold the GPIO number
+ *
+ * @return
+ *   - ESP_OK if success
+ *   - ESP_ERR_INVALID_ARG if channel not valid
+ */
+esp_err_t adc1_pad_get_io_num(adc1_channel_t channel, gpio_num_t *gpio_num);
+
+/**
+ * @brief Set the attenuation of a particular channel on ADC1, and configure its associated GPIO pin mux.
+ *
+ * The default ADC voltage is for attenuation 0 dB and listed in the table below.
+ * By setting higher attenuation it is possible to read higher voltages.
+ *
+ * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
+ * shown in the following table.
+ *
+ *     +----------+-------------+-----------------+
+ *     |          | attenuation | suggested range |
+ *     |    SoC   |     (dB)    |      (mV)       |
+ *     +==========+=============+=================+
+ *     |          |       0     |    100 ~  950   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |    100 ~ 1250   |
+ *     |   ESP32  +-------------+-----------------+
+ *     |          |       6     |    150 ~ 1750   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |    150 ~ 2450   |
+ *     +----------+-------------+-----------------+
+ *     |          |       0     |      0 ~  750   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |      0 ~ 1050   |
+ *     | ESP32-S2 +-------------+-----------------+
+ *     |          |       6     |      0 ~ 1300   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |      0 ~ 2500   |
+ *     +----------+-------------+-----------------+
+ *
+ * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
+ *
+ * @note For any given channel, this function must be called before the first time ``adc1_get_raw()`` is called for that channel.
+ *
+ * @note This function can be called multiple times to configure multiple
+ *       ADC channels simultaneously. You may call ``adc1_get_raw()`` only after configuring a channel.
+ *
+ * @param channel ADC1 channel to configure
+ * @param atten  Attenuation level
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc1_config_channel_atten(adc1_channel_t channel, adc_atten_t atten);
+
+/**
+ * @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1.
+ *        The configuration is for all channels of ADC1
+ * @param width_bit Bit capture width for ADC1
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc1_config_width(adc_bits_width_t width_bit);
+
+/**
+ * @brief Take an ADC1 reading from a single channel.
+ * @note ESP32:
+ *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
+ *       but will remove the glitches on GPIO36 and GPIO39.
+ *
+ * @note Call ``adc1_config_width()`` before the first time this
+ *       function is called.
+ *
+ * @note For any given channel, adc1_config_channel_atten(channel)
+ *       must be called before the first time this function is called. Configuring
+ *       a new channel does not prevent a previously configured channel from being read.
+ *
+ * @param  channel ADC1 channel to read
+ *
+ * @return
+ *     - -1: Parameter error
+ *     -  Other: ADC1 channel reading.
+ */
+int adc1_get_raw(adc1_channel_t channel);
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+//TODO IDF-3610, replace these with proper caps
+/**
+ * @brief Set ADC data invert
+ * @param adc_unit ADC unit index
+ * @param inv_en whether enable data invert
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_set_data_inv(adc_unit_t adc_unit, bool inv_en);
+
+/**
+ * @brief Set ADC source clock
+ * @param clk_div ADC clock divider, ADC clock is divided from APB clock
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t adc_set_clk_div(uint8_t clk_div);
+
+/**
+ * @brief Configure ADC capture width.
+ *
+ * @param adc_unit ADC unit index
+ * @param width_bit Bit capture width for ADC unit.
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
+
+/**
+ * @brief Configure ADC1 to be usable by the ULP
+ *
+ * This function reconfigures ADC1 to be controlled by the ULP.
+ * Effect of this function can be reverted using ``adc1_get_raw()`` function.
+ *
+ * Note that adc1_config_channel_atten, ``adc1_config_width()`` functions need
+ * to be called to configure ADC1 channels, before ADC1 is used by the ULP.
+ */
+void adc1_ulp_enable(void);
+#endif  //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+
+/**
+ * @brief Get the GPIO number of a specific ADC2 channel.
+ *
+ * @param channel Channel to get the GPIO number
+ *
+ * @param gpio_num output buffer to hold the GPIO number
+ *
+ * @return
+ *   - ESP_OK if success
+ *   - ESP_ERR_INVALID_ARG if channel not valid
+ */
+esp_err_t adc2_pad_get_io_num(adc2_channel_t channel, gpio_num_t *gpio_num);
+
+/**
+ * @brief Configure the ADC2 channel, including setting attenuation.
+ *
+ * The default ADC voltage is for attenuation 0 dB and listed in the table below.
+ * By setting higher attenuation it is possible to read higher voltages.
+ *
+ * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
+ * shown in the following table.
+ *
+ *     +----------+-------------+-----------------+
+ *     |          | attenuation | suggested range |
+ *     |    SoC   |     (dB)    |      (mV)       |
+ *     +==========+=============+=================+
+ *     |          |       0     |    100 ~  950   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |    100 ~ 1250   |
+ *     |   ESP32  +-------------+-----------------+
+ *     |          |       6     |    150 ~ 1750   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |    150 ~ 2450   |
+ *     +----------+-------------+-----------------+
+ *     |          |       0     |      0 ~  750   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |      0 ~ 1050   |
+ *     | ESP32-S2 +-------------+-----------------+
+ *     |          |       6     |      0 ~ 1300   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |      0 ~ 2500   |
+ *     +----------+-------------+-----------------+
+ *
+ * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
+ *
+ * @note This function also configures the input GPIO pin mux to
+ *       connect it to the ADC2 channel. It must be called before calling
+ *       ``adc2_get_raw()`` for this channel.
+ *
+ * @note For any given channel, this function must be called before the first time ``adc2_get_raw()`` is called for that channel.
+ *
+ * @param channel ADC2 channel to configure
+ * @param atten  Attenuation level
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten);
+
+/**
+ * @brief Take an ADC2 reading on a single channel
+ *
+ * @note ESP32:
+ *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
+ *       but will remove the glitches on GPIO36 and GPIO39.
+ *
+ *
+ * @note ESP32:
+ *       For a given channel, ``adc2_config_channel_atten()``
+ *       must be called before the first time this function is called. If Wi-Fi is started via ``esp_wifi_start()``, this
+ *       function will always fail with ``ESP_ERR_TIMEOUT``.
+ *
+ * @note ESP32-S2:
+ *       ADC2 support hardware arbiter. The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
+ *       the low priority controller will read the invalid ADC2 data. Default priority: Wi-Fi > RTC > Digital;
+ *
+ * @param channel ADC2 channel to read
+ * @param width_bit Bit capture width for ADC2
+ * @param raw_out the variable to hold the output data.
+ *
+ * @return
+ *     - ESP_OK if success
+ *     - ESP_ERR_TIMEOUT ADC2 is being used by other controller and the request timed out.
+ *     - ESP_ERR_INVALID_STATE The controller status is invalid. Please try again.
+ */
+esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *raw_out);
+
+/**
+ *  @brief Output ADC1 or ADC2's reference voltage to ``adc2_channe_t``'s IO.
+ *
+ *  This function routes the internal reference voltage of ADCn to one of
+ *  ADC2's channels. This reference voltage can then be manually measured
+ *  for calibration purposes.
+ *
+ *  @note  ESP32 only supports output of ADC2's internal reference voltage.
+ *  @param[in]  adc_unit ADC unit index
+ *  @param[in]  gpio     GPIO number (Only ADC2's channels IO are supported)
+ *
+ *  @return
+ *                  - ESP_OK: v_ref successfully routed to selected GPIO
+ *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
+ */
+esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio);
+
+/**
+ *  @brief Output ADC2 reference voltage to ``adc2_channe_t``'s IO.
+ *
+ *  This function routes the internal reference voltage of ADCn to one of
+ *  ADC2's channels. This reference voltage can then be manually measured
+ *  for calibration purposes.
+ *
+ *  @deprecated Use ``adc_vref_to_gpio`` instead.
+ *
+ *  @param[in]  gpio    GPIO number (ADC2's channels are supported)
+ *
+ *  @return
+ *                  - ESP_OK: v_ref successfully routed to selected GPIO
+ *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
+ */
+esp_err_t adc2_vref_to_gpio(gpio_num_t gpio) __attribute__((deprecated));
+
+/*---------------------------------------------------------------
+                    DMA setting
+---------------------------------------------------------------*/
+/**
+ * @brief Digital ADC DMA read max timeout value, it may make the ``adc_digi_read_bytes`` block forever if the OS supports
+ */
+#define ADC_MAX_DELAY UINT32_MAX
+
+/**
+ * @brief ADC DMA driver configuration
+ */
+typedef struct adc_digi_init_config_s {
+    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed.
+    uint32_t conv_num_each_intr;    ///< Bytes of data that can be converted in 1 interrupt.
+    uint32_t adc1_chan_mask;        ///< Channel list of ADC1 to be initialized.
+    uint32_t adc2_chan_mask;        ///< Channel list of ADC2 to be initialized.
+} adc_digi_init_config_t;
+
+/**
+ * @brief ADC digital controller settings
+ */
+typedef struct {
+    bool conv_limit_en;                      ///< To limit ADC conversion times. Conversion stops after finishing `conv_limit_num` times conversion
+    uint32_t conv_limit_num;                 ///< Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255.
+    uint32_t pattern_num;                    ///< Number of ADC channels that will be used
+    adc_digi_pattern_config_t *adc_pattern;    ///< List of configs for each ADC channel that will be used
+    uint32_t sample_freq_hz;  /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
+                                   Fs = Fd / interval / 2
+                                   Fs: sampling frequency;
+                                   Fd: digital controller frequency, no larger than 5M for better performance
+                                   interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
+    adc_digi_convert_mode_t conv_mode;      ///< ADC DMA conversion mode, see `adc_digi_convert_mode_t`.
+    adc_digi_output_format_t format;        ///< ADC DMA conversion output format, see `adc_digi_output_format_t`.
+} adc_digi_configuration_t;
+
+/**
+ * @brief Initialize the Digital ADC.
+ *
+ * @param init_config Pointer to Digital ADC initilization config. Refer to ``adc_digi_init_config_t``.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *         - ESP_ERR_NOT_FOUND     No free interrupt found with the specified flags
+ *         - ESP_ERR_NO_MEM        If out of memory
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config);
+
+/**
+ * @brief Read bytes from Digital ADC through DMA.
+ *
+ * @param[out] buf                 Buffer to read from ADC.
+ * @param[in]  length_max          Expected length of data read from the ADC.
+ * @param[out] out_length          Real length of data read from the ADC via this API.
+ * @param[in]  timeout_ms          Time to wait for data via this API, in millisecond.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid. Usually it means the ADC sampling rate is faster than the task processing rate.
+ *         - ESP_ERR_TIMEOUT       Operation timed out
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_read_bytes(uint8_t *buf, uint32_t length_max, uint32_t *out_length, uint32_t timeout_ms);
+
+/**
+ * @brief Start the Digital ADC and DMA peripherals. After this, the hardware starts working.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_start(void);
+
+/**
+ * @brief Stop the Digital ADC and DMA peripherals. After this, the hardware stops working.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_stop(void);
+
+/**
+ * @brief Deinitialize the Digital ADC.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_deinitialize(void);
+
+/**
+ * @brief Setting the digital controller.
+ *
+ * @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
+ *
+ * @return
+ *      - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *      - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *      - ESP_OK                On success
+ */
+esp_err_t adc_digi_controller_configure(const adc_digi_configuration_t *config);
+
+
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+//TODO IDF-3610
+/**
+ * @brief Reset adc digital controller filter.
+ *
+ * @param idx Filter index.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_reset(adc_digi_filter_idx_t idx);
+
+/**
+ * @brief Set adc digital controller filter configuration.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param config See ``adc_digi_filter_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_set_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
+
+/**
+ * @brief Get adc digital controller filter configuration.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param config See ``adc_digi_filter_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_get_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
+
+/**
+ * @brief Enable/disable adc digital controller filter.
+ *        Filtering the ADC data to obtain smooth data at higher sampling rates.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param enable Enable/Disable filter.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_enable(adc_digi_filter_idx_t idx, bool enable);
+
+/**
+ * @brief Config monitor of adc digital controller.
+ *
+ * @note For ESP32S2, The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
+ *
+ * @param idx Monitor index.
+ * @param config See ``adc_digi_monitor_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_monitor_set_config(adc_digi_monitor_idx_t idx, adc_digi_monitor_t *config);
+
+/**
+ * @brief Enable/disable monitor of adc digital controller.
+ *
+ * @note For ESP32S2, The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
+ *
+ * @param idx Monitor index.
+ * @param enable True or false enable monitor.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_monitor_enable(adc_digi_monitor_idx_t idx, bool enable);
+#endif  //#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+
+#if CONFIG_IDF_TARGET_ESP32
+//TODO IDF-3610
+/**
+ * @brief Read Hall Sensor
+ *
+ * @note When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *
+ * @note The Hall Sensor uses channels 0 and 3 of ADC1. Do not configure
+ * these channels for use as ADC channels.
+ *
+ * @note The ADC1 module must be enabled by calling
+ *       adc1_config_width() before calling hall_sensor_read(). ADC1
+ *       should be configured for 12 bit readings, as the hall sensor
+ *       readings are low values and do not cover the full range of the
+ *       ADC.
+ *
+ * @return The hall sensor reading.
+ */
+int hall_sensor_read(void);
+
+/*---------------------------------------------------------------
+                    To Be Deprecated TODO: IDF-3610
+---------------------------------------------------------------*/
+/**
+ * @brief Set I2S data source
+ * @param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC.
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src);
+
+/**
+ * @brief Initialize I2S ADC mode
+ * @param adc_unit ADC unit index
+ * @param channel ADC channel index
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/adc_common.h b/tools/sdk/esp32s2/include/driver/include/driver/adc_common.h
index 392eb8a15dc..e081f28d154 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/adc_common.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/adc_common.h
@@ -1,544 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#pragma once
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "esp_err.h"
-#include "sdkconfig.h"
-#include "driver/gpio.h"
-#include "hal/adc_types.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if CONFIG_IDF_TARGET_ESP32
-/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO36 */
-    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO37 */
-    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO38 */
-    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO39 */
-    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO32 */
-    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO33 */
-    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO34 */
-    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO35 */
-    ADC1_CHANNEL_MAX,
-} adc1_channel_t;
-#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
-/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO1  */
-    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO2  */
-    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO3  */
-    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO4  */
-    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO5  */
-    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO6  */
-    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO7  */
-    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO8  */
-    ADC1_CHANNEL_8,     /*!< ADC1 channel 8 is GPIO9  */
-    ADC1_CHANNEL_9,     /*!< ADC1 channel 9 is GPIO10 */
-    ADC1_CHANNEL_MAX,
-} adc1_channel_t;
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */
-    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO1 */
-    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO2 */
-    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO3 */
-    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO4 */
-    ADC1_CHANNEL_MAX,
-} adc1_channel_t;
-#endif // CONFIG_IDF_TARGET_*
-
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
-/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO4  (ESP32), GPIO11 (ESP32-S2) */
-    ADC2_CHANNEL_1,     /*!< ADC2 channel 1 is GPIO0  (ESP32), GPIO12 (ESP32-S2) */
-    ADC2_CHANNEL_2,     /*!< ADC2 channel 2 is GPIO2  (ESP32), GPIO13 (ESP32-S2) */
-    ADC2_CHANNEL_3,     /*!< ADC2 channel 3 is GPIO15 (ESP32), GPIO14 (ESP32-S2) */
-    ADC2_CHANNEL_4,     /*!< ADC2 channel 4 is GPIO13 (ESP32), GPIO15 (ESP32-S2) */
-    ADC2_CHANNEL_5,     /*!< ADC2 channel 5 is GPIO12 (ESP32), GPIO16 (ESP32-S2) */
-    ADC2_CHANNEL_6,     /*!< ADC2 channel 6 is GPIO14 (ESP32), GPIO17 (ESP32-S2) */
-    ADC2_CHANNEL_7,     /*!< ADC2 channel 7 is GPIO27 (ESP32), GPIO18 (ESP32-S2) */
-    ADC2_CHANNEL_8,     /*!< ADC2 channel 8 is GPIO25 (ESP32), GPIO19 (ESP32-S2) */
-    ADC2_CHANNEL_9,     /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */
-    ADC2_CHANNEL_MAX,
-} adc2_channel_t;
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
-typedef enum {
-    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */
-    ADC2_CHANNEL_MAX,
-} adc2_channel_t;
-#endif
-
-
-/**
- * @brief ADC rtc controller attenuation option.
- *
- * @note  This definitions are only for being back-compatible
- */
-#define ADC_ATTEN_0db   ADC_ATTEN_DB_0
-#define ADC_ATTEN_2_5db ADC_ATTEN_DB_2_5
-#define ADC_ATTEN_6db   ADC_ATTEN_DB_6
-#define ADC_ATTEN_11db  ADC_ATTEN_DB_11
-
 /**
- * The default (max) bit width of the ADC of current version. You can also get the maximum bitwidth
- * by `SOC_ADC_MAX_BITWIDTH` defined in soc_caps.h.
+ * This file is only a wrapper for `driver/adc.h` for back-compatability.
  */
-#define ADC_WIDTH_BIT_DEFAULT   (ADC_WIDTH_MAX-1)
-
-//this definitions are only for being back-compatible
-#define ADC_WIDTH_9Bit  ADC_WIDTH_BIT_9
-#define ADC_WIDTH_10Bit ADC_WIDTH_BIT_10
-#define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
-#define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
-
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-/**
- * @brief Digital ADC DMA read max timeout value, it may make the ``adc_digi_read_bytes`` block forever if the OS supports
- */
-#define ADC_MAX_DELAY UINT32_MAX
-#endif
-
-/**
- * @brief ADC digital controller encode option.
- *
- * @deprecated The ESP32-S2 doesn't use I2S DMA. Call ``adc_digi_output_format_t`` instead.
- */
-typedef enum {
-    ADC_ENCODE_12BIT,        /*!< ADC to DMA data format,          , [15:12]-channel [11:0]-12 bits ADC data */
-    ADC_ENCODE_11BIT,        /*!< ADC to DMA data format, [15]-unit, [14:11]-channel [10:0]-11 bits ADC data */
-    ADC_ENCODE_MAX,
-} adc_i2s_encode_t;
-
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-//This feature is currently supported on ESP32C3, will be supported on other chips soon
-/**
- * @brief Digital ADC DMA configuration
- */
-typedef struct adc_digi_init_config_s {
-    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed.
-    uint32_t conv_num_each_intr;    ///< Bytes of data that can be converted in 1 interrupt.
-    uint32_t adc1_chan_mask;        ///< Channel list of ADC1 to be initialized.
-    uint32_t adc2_chan_mask;        ///< Channel list of ADC2 to be initialized.
-} adc_digi_init_config_t;
-#endif
-
-/*---------------------------------------------------------------
-                    Common setting
----------------------------------------------------------------*/
-
-/**
- * @brief Enable ADC power
- * @deprecated Use adc_power_acquire and adc_power_release instead.
- */
-void adc_power_on(void) __attribute__((deprecated));
-
-/**
- * @brief Power off SAR ADC
- * @deprecated Use adc_power_acquire and adc_power_release instead.
- * This function will force power down for ADC.
- * This function is deprecated because forcing power ADC power off may
- * disrupt operation of other components which may be using the ADC.
- */
-void adc_power_off(void) __attribute__((deprecated));
-
-/**
- * @brief Increment the usage counter for ADC module.
- * ADC will stay powered on while the counter is greater than 0.
- * Call adc_power_release when done using the ADC.
- */
-void adc_power_acquire(void);
-
-/**
- * @brief Decrement the usage counter for ADC module.
- * ADC will stay powered on while the counter is greater than 0.
- * Call this function when done using the ADC.
- */
-void adc_power_release(void);
-
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * @brief Initialize ADC pad
- * @param adc_unit ADC unit index
- * @param channel ADC channel index
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel);
-#endif //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
-/*---------------------------------------------------------------
-                    ADC Single Read Setting
----------------------------------------------------------------*/
-/**
- * @brief Get the GPIO number of a specific ADC1 channel.
- *
- * @param channel Channel to get the GPIO number
- * @param gpio_num output buffer to hold the GPIO number
- *
- * @return
- *   - ESP_OK if success
- *   - ESP_ERR_INVALID_ARG if channel not valid
- */
-esp_err_t adc1_pad_get_io_num(adc1_channel_t channel, gpio_num_t *gpio_num);
-
-/**
- * @brief Set the attenuation of a particular channel on ADC1, and configure its associated GPIO pin mux.
- *
- * The default ADC voltage is for attenuation 0 dB and listed in the table below.
- * By setting higher attenuation it is possible to read higher voltages.
- *
- * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
- * shown in the following table.
- *
- *     +----------+-------------+-----------------+
- *     |          | attenuation | suggested range |
- *     |    SoC   |     (dB)    |      (mV)       |
- *     +==========+=============+=================+
- *     |          |       0     |    100 ~  950   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |    100 ~ 1250   |
- *     |   ESP32  +-------------+-----------------+
- *     |          |       6     |    150 ~ 1750   |
- *     |          +-------------+-----------------+
- *     |          |      11     |    150 ~ 2450   |
- *     +----------+-------------+-----------------+
- *     |          |       0     |      0 ~  750   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |      0 ~ 1050   |
- *     | ESP32-S2 +-------------+-----------------+
- *     |          |       6     |      0 ~ 1300   |
- *     |          +-------------+-----------------+
- *     |          |      11     |      0 ~ 2500   |
- *     +----------+-------------+-----------------+
- *
- * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
- *
- * @note For any given channel, this function must be called before the first time ``adc1_get_raw()`` is called for that channel.
- *
- * @note This function can be called multiple times to configure multiple
- *       ADC channels simultaneously. You may call ``adc1_get_raw()`` only after configuring a channel.
- *
- * @param channel ADC1 channel to configure
- * @param atten  Attenuation level
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc1_config_channel_atten(adc1_channel_t channel, adc_atten_t atten);
-
-/**
- * @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1.
- *        The configuration is for all channels of ADC1
- * @param width_bit Bit capture width for ADC1
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc1_config_width(adc_bits_width_t width_bit);
-
-/**
- * @brief Take an ADC1 reading from a single channel.
- * @note ESP32:
- *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
- *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
- *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
- *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
- *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
- *       but will remove the glitches on GPIO36 and GPIO39.
- *
- * @note Call ``adc1_config_width()`` before the first time this
- *       function is called.
- *
- * @note For any given channel, adc1_config_channel_atten(channel)
- *       must be called before the first time this function is called. Configuring
- *       a new channel does not prevent a previously configured channel from being read.
- *
- * @param  channel ADC1 channel to read
- *
- * @return
- *     - -1: Parameter error
- *     -  Other: ADC1 channel reading.
- */
-int adc1_get_raw(adc1_channel_t channel);
-
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * @brief Set ADC data invert
- * @param adc_unit ADC unit index
- * @param inv_en whether enable data invert
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_set_data_inv(adc_unit_t adc_unit, bool inv_en);
-
-/**
- * @brief Set ADC source clock
- * @param clk_div ADC clock divider, ADC clock is divided from APB clock
- * @return
- *     - ESP_OK success
- */
-esp_err_t adc_set_clk_div(uint8_t clk_div);
-
-/**
- * @brief Configure ADC capture width.
- *
- * @param adc_unit ADC unit index
- * @param width_bit Bit capture width for ADC unit.
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
-
-/**
- * @brief Configure ADC1 to be usable by the ULP
- *
- * This function reconfigures ADC1 to be controlled by the ULP.
- * Effect of this function can be reverted using ``adc1_get_raw()`` function.
- *
- * Note that adc1_config_channel_atten, ``adc1_config_width()`` functions need
- * to be called to configure ADC1 channels, before ADC1 is used by the ULP.
- */
-void adc1_ulp_enable(void);
-#endif  //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
-/**
- * @brief Get the GPIO number of a specific ADC2 channel.
- *
- * @param channel Channel to get the GPIO number
- *
- * @param gpio_num output buffer to hold the GPIO number
- *
- * @return
- *   - ESP_OK if success
- *   - ESP_ERR_INVALID_ARG if channel not valid
- */
-esp_err_t adc2_pad_get_io_num(adc2_channel_t channel, gpio_num_t *gpio_num);
-
-/**
- * @brief Configure the ADC2 channel, including setting attenuation.
- *
- * The default ADC voltage is for attenuation 0 dB and listed in the table below.
- * By setting higher attenuation it is possible to read higher voltages.
- *
- * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
- * shown in the following table.
- *
- *     +----------+-------------+-----------------+
- *     |          | attenuation | suggested range |
- *     |    SoC   |     (dB)    |      (mV)       |
- *     +==========+=============+=================+
- *     |          |       0     |    100 ~  950   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |    100 ~ 1250   |
- *     |   ESP32  +-------------+-----------------+
- *     |          |       6     |    150 ~ 1750   |
- *     |          +-------------+-----------------+
- *     |          |      11     |    150 ~ 2450   |
- *     +----------+-------------+-----------------+
- *     |          |       0     |      0 ~  750   |
- *     |          +-------------+-----------------+
- *     |          |       2.5   |      0 ~ 1050   |
- *     | ESP32-S2 +-------------+-----------------+
- *     |          |       6     |      0 ~ 1300   |
- *     |          +-------------+-----------------+
- *     |          |      11     |      0 ~ 2500   |
- *     +----------+-------------+-----------------+
- *
- * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
- *
- * @note This function also configures the input GPIO pin mux to
- *       connect it to the ADC2 channel. It must be called before calling
- *       ``adc2_get_raw()`` for this channel.
- *
- * @note For any given channel, this function must be called before the first time ``adc2_get_raw()`` is called for that channel.
- *
- * @param channel ADC2 channel to configure
- * @param atten  Attenuation level
- *
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten);
-
-/**
- * @brief Take an ADC2 reading on a single channel
- *
- * @note ESP32:
- *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
- *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
- *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
- *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
- *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
- *       but will remove the glitches on GPIO36 and GPIO39.
- *
- *
- * @note ESP32:
- *       For a given channel, ``adc2_config_channel_atten()``
- *       must be called before the first time this function is called. If Wi-Fi is started via ``esp_wifi_start()``, this
- *       function will always fail with ``ESP_ERR_TIMEOUT``.
- *
- * @note ESP32-S2:
- *       ADC2 support hardware arbiter. The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
- *       the low priority controller will read the invalid ADC2 data. Default priority: Wi-Fi > RTC > Digital;
- *
- * @param channel ADC2 channel to read
- * @param width_bit Bit capture width for ADC2
- * @param raw_out the variable to hold the output data.
- *
- * @return
- *     - ESP_OK if success
- *     - ESP_ERR_TIMEOUT ADC2 is being used by other controller and the request timed out.
- *     - ESP_ERR_INVALID_STATE The controller status is invalid. Please try again.
- */
-esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *raw_out);
-
-/**
- *  @brief Output ADC1 or ADC2's reference voltage to ``adc2_channe_t``'s IO.
- *
- *  This function routes the internal reference voltage of ADCn to one of
- *  ADC2's channels. This reference voltage can then be manually measured
- *  for calibration purposes.
- *
- *  @note  ESP32 only supports output of ADC2's internal reference voltage.
- *  @param[in]  adc_unit ADC unit index
- *  @param[in]  gpio     GPIO number (Only ADC2's channels IO are supported)
- *
- *  @return
- *                  - ESP_OK: v_ref successfully routed to selected GPIO
- *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
- */
-esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio);
-
-/**
- *  @brief Output ADC2 reference voltage to ``adc2_channe_t``'s IO.
- *
- *  This function routes the internal reference voltage of ADCn to one of
- *  ADC2's channels. This reference voltage can then be manually measured
- *  for calibration purposes.
- *
- *  @deprecated Use ``adc_vref_to_gpio`` instead.
- *
- *  @param[in]  gpio    GPIO number (ADC2's channels are supported)
- *
- *  @return
- *                  - ESP_OK: v_ref successfully routed to selected GPIO
- *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
- */
-esp_err_t adc2_vref_to_gpio(gpio_num_t gpio) __attribute__((deprecated));
-
-/*---------------------------------------------------------------
-                    Digital controller setting
----------------------------------------------------------------*/
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
-//These APIs are only supported on ESP32 and ESP32-S2. On ESP32-C3 and later chips, please use ``adc_digi_initialize`` and ``adc_digi_deinitialize``
-/**
- * @brief ADC digital controller initialization.
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_init(void);
-
-/**
- * @brief ADC digital controller deinitialization.
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_deinit(void);
-#endif
-
-/**
- * @brief Setting the digital controller.
- *
- * @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
- *
- * @return
- *      - ESP_ERR_INVALID_STATE Driver state is invalid.
- *      - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
- *      - ESP_OK                On success
- */
-esp_err_t adc_digi_controller_config(const adc_digi_config_t *config);
-
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-//This feature is currently supported on ESP32C3, will be supported on other chips soon
-/*---------------------------------------------------------------
-                    DMA setting
----------------------------------------------------------------*/
-/**
- * @brief Initialize the Digital ADC.
- *
- * @param init_config Pointer to Digital ADC initilization config. Refer to ``adc_digi_init_config_t``.
- *
- * @return
- *         - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
- *         - ESP_ERR_NOT_FOUND     No free interrupt found with the specified flags
- *         - ESP_ERR_NO_MEM        If out of memory
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config);
-
-/**
- * @brief Start the Digital ADC and DMA peripherals. After this, the hardware starts working.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid.
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_start(void);
-
-/**
- * @brief Stop the Digital ADC and DMA peripherals. After this, the hardware stops working.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid.
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_stop(void);
-
-/**
- * @brief Read bytes from Digital ADC through DMA.
- *
- * @param[out] buf                 Buffer to read from ADC.
- * @param[in]  length_max          Expected length of data read from the ADC.
- * @param[out] out_length          Real length of data read from the ADC via this API.
- * @param[in]  timeout_ms          Time to wait for data via this API, in millisecond.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid. Usually it means the ADC sampling rate is faster than the task processing rate.
- *         - ESP_ERR_TIMEOUT       Operation timed out
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_read_bytes(uint8_t *buf, uint32_t length_max, uint32_t *out_length, uint32_t timeout_ms);
-
-/**
- * @brief Deinitialize the Digital ADC.
- *
- * @return
- *         - ESP_ERR_INVALID_STATE Driver state is invalid.
- *         - ESP_OK                On success
- */
-esp_err_t adc_digi_deinitialize(void);
-
-#endif //#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
 
-#ifdef __cplusplus
-}
-#endif
+#include "adc.h"
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/adc_deprecated.h b/tools/sdk/esp32s2/include/driver/include/driver/adc_deprecated.h
new file mode 100644
index 00000000000..bdd0547c06a
--- /dev/null
+++ b/tools/sdk/esp32s2/include/driver/include/driver/adc_deprecated.h
@@ -0,0 +1,163 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*----------------------------------------------------------------------------------
+              This file contains Deprecated ADC APIs
+-----------------------------------------------------------------------------------*/
+
+#pragma once
+#include "esp_err.h"
+#include "hal/adc_types.h"
+#include "driver/adc_types_deprecated.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#if CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+                    ESP32S2 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief Config ADC module arbiter.
+ *        The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
+ *        the low priority controller will read the invalid ADC2 data, and the validity of the data can be judged by the flag bit in the data.
+ *
+ * @note Only ADC2 support arbiter.
+ * @note Default priority: Wi-Fi > RTC > Digital;
+ * @note In normal use, there is no need to call this interface to config arbiter.
+ *
+ * @param adc_unit ADC unit.
+ * @param config Refer to `adc_arbiter_t`.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - ESP_ERR_NOT_SUPPORTED ADC unit not support arbiter.
+ */
+esp_err_t adc_arbiter_config(adc_unit_t adc_unit, adc_arbiter_t *config) __attribute__((deprecated));
+
+/**
+ * @brief Enable interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_enable(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Disable interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_disable(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Clear interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_clear(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Get interrupt status mask of adc digital controller.
+ *
+ * @param adc_unit ADC unit.
+ * @return
+ *     - intr Interrupt bitmask, See ``adc_digi_intr_t``.
+ */
+uint32_t adc_digi_intr_get_status(adc_unit_t adc_unit) __attribute__((deprecated));
+
+/**
+ * @brief Register ADC interrupt handler, the handler is an ISR.
+ *        The handler will be attached to the same CPU core that this function is running on.
+ *
+ * @param fn Interrupt handler function.
+ * @param arg Parameter for handler function
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_NOT_FOUND Can not find the interrupt that matches the flags.
+ *     - ESP_ERR_INVALID_ARG Function pointer error.
+ */
+esp_err_t adc_digi_isr_register(void (*fn)(void *), void *arg, int intr_alloc_flags) __attribute__((deprecated));
+
+/**
+ * @brief Deregister ADC interrupt handler, the handler is an ISR.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG hander error.
+ *     - ESP_FAIL ISR not be registered.
+ */
+esp_err_t adc_digi_isr_deregister(void) __attribute__((deprecated));
+#endif  // #if CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+            ESP32, ESP32S2 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller initialization.
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_init(void) __attribute__((deprecated));
+
+/**
+ * @brief ADC digital controller deinitialization.
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_deinit(void) __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+/*---------------------------------------------------------------
+            ESP32, ESP32S2, ESP32C3 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief Setting the digital controller.
+ *
+ * @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
+ *
+ * @return
+ *      - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *      - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *      - ESP_OK                On success
+ */
+esp_err_t adc_digi_controller_config(const adc_digi_config_t *config) __attribute__((deprecated));
+
+/**
+ * @brief Initialize ADC pad
+ * @param adc_unit ADC unit index
+ * @param channel ADC channel index
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel) __attribute__((deprecated));;
+#endif //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/adc_types_deprecated.h b/tools/sdk/esp32s2/include/driver/include/driver/adc_types_deprecated.h
new file mode 100644
index 00000000000..5d0e0dc2327
--- /dev/null
+++ b/tools/sdk/esp32s2/include/driver/include/driver/adc_types_deprecated.h
@@ -0,0 +1,203 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_err.h"
+#include "hal/adc_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+/*---------------------------------------------------------------
+                    ESP32 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t bit_width: 2;   /*!< ADC resolution.
+-                                         0: 9 bit;
+-                                         1: 10 bit;
+-                                         2: 11 bit;
+-                                         3: 12 bit. */
+            int8_t channel:   4;   /*!< ADC channel index. */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+/**
+  * Explanation of the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA outputs:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     +---------------------+--------+--------+--------+
+  *     | trigger meas times  |    1   |    1   |    1   |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_limit_num      |   +1   |   +1   |   +1   |
+  *     | dma_eof_num         |   +1   |   +2   |   +1   |
+  *     | dma output (byte)   |   +2   |   +4   |   +2   |
+  *     +---------------------+--------+--------+--------+
+  */
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc1_pattern_len;               /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    uint32_t adc2_pattern_len;               /*!<Refer to ``adc1_pattern_len`` */
+    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
+    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to `adc1_pattern` */
+    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
+    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
+} adc_digi_config_t __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32
+
+
+#if CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+                    ESP32S2 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t reserved:  2;   /*!< reserved0 */
+            uint8_t channel:   4;   /*!< ADC channel index. */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+/**
+  * @brief ADC digital controller (DMA mode) configuration parameters.
+  *
+  * Example setting: When using ADC1 channel0 to measure voltage, the sampling rate is required to be 1 kHz:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | sample rate         | 1 kHz  | 1 kHz  | 1 kHz  |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     | adc1_pattern_len    |    1   |    1   |    1   |
+  *     | dig_clk.use_apll    |    0   |    0   |    0   |
+  *     | dig_clk.div_num     |   99   |   99   |   99   |
+  *     | dig_clk.div_b       |    0   |    0   |    0   |
+  *     | dig_clk.div_a       |    0   |    0   |    0   |
+  *     | interval            |  400   |  400   |  200   |
+  *     +---------------------+--------+--------+--------+
+  *     | `trigger_meas_freq` | 1 kHz  | 1 kHz  | 2 kHz  |
+  *     +---------------------+--------+--------+--------+
+  *
+  * Explanation of the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA outputs:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     +---------------------+--------+--------+--------+
+  *     | trigger meas times  |    1   |    1   |    1   |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_limit_num      |   +1   |   +1   |   +1   |
+  *     | dma_eof_num         |   +1   |   +2   |   +1   |
+  *     | dma output (byte)   |   +2   |   +4   |   +2   |
+  *     +---------------------+--------+--------+--------+
+  */
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc1_pattern_len;               /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    uint32_t adc2_pattern_len;               /*!<Refer to ``adc1_pattern_len`` */
+    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
+    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to `adc1_pattern` */
+    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
+    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
+    uint32_t interval;                       /*!<The number of interval clock cycles for the digital controller to trigger the measurement.
+                                                 The unit is the divided clock. Range: 40 ~ 4095.
+                                                 Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval. Refer to ``adc_digi_clk_t``.
+                                                 Note: The sampling rate of each channel is also related to the conversion mode (See ``adc_digi_convert_mode_t``) and pattern table settings. */
+    adc_digi_clk_t dig_clk;                  /*!<ADC digital controller clock divider settings. Refer to ``adc_digi_clk_t``.
+                                                 Note: The clocks of the DAC digital controller use the ADC digital controller clock divider. */
+    uint32_t dma_eof_num;                    /*!<DMA eof num of adc digital controller.
+                                                 If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated in DMA.
+                                                 Note: The converted data in the DMA in link buffer will be multiple of two bytes. */
+} adc_digi_config_t __attribute__((deprecated));
+
+/**
+ * @brief ADC digital controller (DMA mode) interrupt type options.
+ */
+typedef enum {
+    ADC_DIGI_INTR_MASK_MONITOR = 0x1,
+    ADC_DIGI_INTR_MASK_MEAS_DONE = 0x2,
+    ADC_DIGI_INTR_MASK_ALL = 0x3,
+} adc_digi_intr_t __attribute__((deprecated));
+FLAG_ATTR(adc_digi_intr_t)
+#endif  //#if CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32C3
+/*---------------------------------------------------------------
+                    ESP32C3 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t channel:   3;   /*!< ADC channel index. */
+            uint8_t unit:      1;   /*!< ADC unit index. */
+            uint8_t reserved:  2;   /*!< reserved0 */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc_pattern_len;                /*!<Pattern table length for digital controller. Range: 0 ~ 7 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 7 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    adc_digi_pattern_table_t *adc_pattern;   /*!<Pointer to pattern table for digital controller. The table size defined by `adc_pattern_len`. */
+    uint32_t sample_freq_hz;  /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
+                                   Fs = Fd / interval / 2
+                                   Fs: sampling frequency;
+                                   Fd: digital controller frequency, no larger than 5M for better performance
+                                   interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
+} adc_digi_config_t __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32C3
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/i2s.h b/tools/sdk/esp32s2/include/driver/include/driver/i2s.h
index aa649ed479c..389b631ba7e 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/i2s.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/i2s.h
@@ -78,7 +78,7 @@ typedef struct  {
  *
  */
 typedef struct {
-    int mck_io_num;     /*!< MCK in out pin*/
+    int mck_io_num;     /*!< MCK in out pin. Note that ESP32 supports setting MCK on GPIO0/GPIO1/GPIO3 only*/
     int bck_io_num;     /*!< BCK in out pin*/
     int ws_io_num;      /*!< WS in out pin*/
     int data_out_num;   /*!< DATA out pin*/
@@ -97,8 +97,22 @@ typedef struct {
     i2s_channel_fmt_t       channel_format;             /*!< I2S channel format.*/
     i2s_comm_format_t       communication_format;       /*!< I2S communication format */
     int                     intr_alloc_flags;           /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */
-    int                     dma_buf_count;              /*!< I2S DMA Buffer Count */
-    int                     dma_buf_len;                /*!< I2S DMA Buffer Length */
+    int                     dma_buf_count;              /**< The total number of DMA buffers to receive/transmit data.
+                                                          * A descriptor includes some information such as buffer address,
+                                                          * the address of the next descriptor, and the buffer length.
+                                                          * Since one descriptor points to one buffer, therefore, 'dma_desc_num' can be interpreted as the total number of DMA buffers used to store data from DMA interrupt.
+                                                          * Notice that these buffers are internal to'i2s_read' and descriptors are created automatically inside of the I2S driver.
+                                                          * Users only need to set the buffer number while the length is derived from the parameter described below.
+                                                          */
+    int                     dma_buf_len;                /**< Number of frames in a DMA buffer.
+                                                          *  A frame means the data of all channels in a WS cycle.
+                                                          *  The real_dma_buf_size = dma_buf_len * chan_num * bits_per_chan / 8.
+                                                          *  For example, if two channels in stereo mode (i.e., 'channel_format' is set to 'I2S_CHANNEL_FMT_RIGHT_LEFT') are active,
+                                                          *  and each channel transfers 32 bits (i.e., 'bits_per_sample' is set to 'I2S_BITS_PER_CHAN_32BIT'),
+                                                          *  then the total number of bytes of a frame is 'channel_format' * 'bits_per_sample' = 2 * 32 / 8 = 8 bytes.
+                                                          *  We assume that the current 'dma_buf_len' is 100, then the real length of the DMA buffer is 8 * 100 = 800 bytes.
+                                                          *  Note that the length of an internal real DMA buffer shouldn't be greater than 4092.
+                                                          */
     bool                    use_apll;                   /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */
     bool                    tx_desc_auto_clear;         /*!< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability) */
     int                     fixed_mclk;                 /*!< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value. If fixed_mclk set, mclk_multiple won't take effect */
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/ledc.h b/tools/sdk/esp32s2/include/driver/include/driver/ledc.h
index bc8328cdd20..7b22f3d1779 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/ledc.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/ledc.h
@@ -85,6 +85,7 @@ esp_err_t ledc_timer_config(const ledc_timer_config_t* timer_conf);
  * @brief LEDC update channel parameters
  * @note  Call this function to activate the LEDC updated parameters.
  *        After ledc_set_duty, we need to call this function to update the settings.
+ *        And the new LEDC parameters don't take effect until the next PWM cycle.
  * @note  ledc_set_duty, ledc_set_duty_with_hpoint and ledc_update_duty are not thread-safe, do not call these functions to
  *        control one LEDC channel in different tasks at the same time.
  *        A thread-safe version of API is ledc_set_duty_and_update
@@ -203,6 +204,9 @@ esp_err_t ledc_set_duty(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t
 
 /**
  * @brief LEDC get duty
+ *        This function returns the duty at the present PWM cycle.
+ *        You shouldn't expect the function to return the new duty in the same cycle of calling ledc_update_duty,
+ *        because duty update doesn't take effect until the next cycle.
  *
  * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
  * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
@@ -385,7 +389,8 @@ void ledc_fade_func_uninstall(void);
  *        Other duty operations will have to wait until the fade operation has finished.
  * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
  * @param channel LEDC channel number
- * @param fade_mode Whether to block until fading done.
+ * @param fade_mode Whether to block until fading done. See ledc_types.h ledc_fade_mode_t for more info.
+ *        Note that this function will not return until fading to the target duty if LEDC_FADE_WAIT_DONE mode is selected.
  *
  * @return
  *     - ESP_OK Success
@@ -443,9 +448,6 @@ esp_err_t ledc_set_fade_time_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
  *     - ESP_FAIL Fade function init error
  */
 esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t target_duty, uint32_t scale, uint32_t cycle_num, ledc_fade_mode_t fade_mode);
-#ifdef __cplusplus
-}
-#endif
 
 /**
  * @brief LEDC callback registration function
@@ -461,3 +463,6 @@ esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
  *     - ESP_FAIL Fade function init error
  */
 esp_err_t ledc_cb_register(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_cbs_t *cbs, void *user_arg);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/spi_common_internal.h b/tools/sdk/esp32s2/include/driver/include/driver/spi_common_internal.h
index 90826c0a8e9..0704c7ddd87 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/spi_common_internal.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/spi_common_internal.h
@@ -110,7 +110,7 @@ bool spicommon_periph_in_use(spi_host_device_t host);
 bool spicommon_periph_free(spi_host_device_t host);
 
 /**
- * @brief Alloc DMA for SPI Slave
+ * @brief Alloc DMA for SPI
  *
  * @param host_id                      SPI host ID
  * @param dma_chan                     DMA channel to be used
@@ -122,17 +122,17 @@ bool spicommon_periph_free(spi_host_device_t host);
  *        - ESP_ERR_NO_MEM:        No enough memory
  *        - ESP_ERR_NOT_FOUND:     There is no available DMA channel
  */
-esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan);
+esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan);
 
 /**
- * @brief Free DMA for SPI Slave
+ * @brief Free DMA for SPI
  *
  * @param host_id  SPI host ID
  *
  * @return
  *        - ESP_OK: On success
  */
-esp_err_t spicommon_slave_free_dma(spi_host_device_t host_id);
+esp_err_t spicommon_dma_chan_free(spi_host_device_t host_id);
 
 /**
  * @brief Connect a SPI peripheral to GPIO pins
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/spi_master.h b/tools/sdk/esp32s2/include/driver/include/driver/spi_master.h
index d6a202f848a..eaf391c8213 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/spi_master.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/spi_master.h
@@ -197,7 +197,7 @@ esp_err_t spi_bus_remove_device(spi_device_handle_t handle);
  * @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
  *                      never time out.
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_TRANS_CS_KEEP_ACTIVE flag is specified while
  *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if there was no room in the queue before ticks_to_wait expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
@@ -261,7 +261,7 @@ esp_err_t spi_device_transmit(spi_device_handle_t handle, spi_transaction_t *tra
  *              currently only portMAX_DELAY is supported.
  *
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_TRANS_CS_KEEP_ACTIVE flag is specified while
  *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if the device cannot get control of the bus before ``ticks_to_wait`` expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/uart.h b/tools/sdk/esp32s2/include/driver/include/driver/uart.h
index 76aa424fa27..4524516338b 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/uart.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/uart.h
@@ -328,7 +328,7 @@ esp_err_t uart_enable_rx_intr(uart_port_t uart_num);
 esp_err_t uart_disable_rx_intr(uart_port_t uart_num);
 
 /**
- * @brief Disable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)
+ * @brief Disable UART TX interrupt (TXFIFO_EMPTY INTERRUPT)
  *
  * @param uart_num  UART port number
  *
@@ -339,7 +339,7 @@ esp_err_t uart_disable_rx_intr(uart_port_t uart_num);
 esp_err_t uart_disable_tx_intr(uart_port_t uart_num);
 
 /**
- * @brief Enable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)
+ * @brief Enable UART TX interrupt (TXFIFO_EMPTY INTERRUPT)
  *
  * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
  * @param enable  1: enable; 0: disable
diff --git a/tools/sdk/esp32s2/include/efuse/esp32s2/include/esp_efuse_rtc_table.h b/tools/sdk/esp32s2/include/efuse/esp32s2/include/esp_efuse_rtc_table.h
index 3cc54e20353..f6f5d168459 100644
--- a/tools/sdk/esp32s2/include/efuse/esp32s2/include/esp_efuse_rtc_table.h
+++ b/tools/sdk/esp32s2/include/efuse/esp32s2/include/esp_efuse_rtc_table.h
@@ -15,6 +15,9 @@ extern "C" {
 #include "esp_err.h"
 #include "sdkconfig.h"
 
+//This is the ADC calibration value version burnt in efuse
+#define ESP_EFUSE_ADC_CALIB_VER     2
+
 #define RTCCALIB_ESP32S2_ADCCOUNT 2
 #define RTCCALIB_ESP32S2_ATTENCOUNT 4
 
diff --git a/tools/sdk/esp32s2/include/esp-face/include/detect/dl_detect_define.hpp b/tools/sdk/esp32s2/include/esp-dl/include/detect/dl_detect_define.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/detect/dl_detect_define.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/detect/dl_detect_define.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/dl_define.hpp b/tools/sdk/esp32s2/include/esp-dl/include/dl_define.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/dl_define.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/dl_define.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/image/dl_image.hpp b/tools/sdk/esp32s2/include/esp-dl/include/image/dl_image.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/image/dl_image.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/image/dl_image.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_add2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_add2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_add2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_add2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_avg_pool2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_avg_pool2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_avg_pool2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_base.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_base.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_base.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_base.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_concat.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_concat.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_concat.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_concat.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_concat2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_concat2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_concat2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_concat2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_conv2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_conv2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_conv2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_depthwise_conv2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_depthwise_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_depthwise_conv2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_depthwise_conv2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_expand_dims.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_expand_dims.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_expand_dims.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_expand_dims.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_flatten.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_flatten.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_flatten.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_flatten.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_fullyconnected.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_fullyconnected.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_fullyconnected.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_fullyconnected.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_global_avg_pool2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_global_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_global_avg_pool2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_global_avg_pool2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_global_max_pool2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_global_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_global_max_pool2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_global_max_pool2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_leakyrelu.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_leakyrelu.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_leakyrelu.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_leakyrelu.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_max2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_max2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_max2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_max2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_max_pool2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_max_pool2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_max_pool2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_min2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_min2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_min2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_min2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_model.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_model.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_model.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_model.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_mul2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_mul2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_mul2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_mul2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_pad.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_pad.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_pad.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_pad.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_prelu.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_prelu.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_prelu.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_prelu.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_relu.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_relu.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_relu.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_relu.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_reshape.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_reshape.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_reshape.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_reshape.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_squeeze.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_squeeze.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_squeeze.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_squeeze.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_sub2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_sub2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_sub2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_sub2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_transpose.hpp b/tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_transpose.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/layer/dl_layer_transpose.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/layer/dl_layer_transpose.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/math/dl_math.hpp b/tools/sdk/esp32s2/include/esp-dl/include/math/dl_math.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/math/dl_math.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/math/dl_math.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/math/dl_math_matrix.hpp b/tools/sdk/esp32s2/include/esp-dl/include/math/dl_math_matrix.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/math/dl_math_matrix.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/math/dl_math_matrix.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/model_zoo/cat_face_detect_mn03.hpp b/tools/sdk/esp32s2/include/esp-dl/include/model_zoo/cat_face_detect_mn03.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/model_zoo/cat_face_detect_mn03.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/model_zoo/cat_face_detect_mn03.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/model_zoo/color_detector.hpp b/tools/sdk/esp32s2/include/esp-dl/include/model_zoo/color_detector.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/model_zoo/color_detector.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/model_zoo/color_detector.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/model_zoo/face_recognition_112_v1_s16.hpp b/tools/sdk/esp32s2/include/esp-dl/include/model_zoo/face_recognition_112_v1_s16.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/model_zoo/face_recognition_112_v1_s16.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/model_zoo/face_recognition_112_v1_s16.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/model_zoo/face_recognition_112_v1_s8.hpp b/tools/sdk/esp32s2/include/esp-dl/include/model_zoo/face_recognition_112_v1_s8.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/model_zoo/face_recognition_112_v1_s8.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/model_zoo/face_recognition_112_v1_s8.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/model_zoo/face_recognition_tool.hpp b/tools/sdk/esp32s2/include/esp-dl/include/model_zoo/face_recognition_tool.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/model_zoo/face_recognition_tool.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/model_zoo/face_recognition_tool.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/model_zoo/face_recognizer.hpp b/tools/sdk/esp32s2/include/esp-dl/include/model_zoo/face_recognizer.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/model_zoo/face_recognizer.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/model_zoo/face_recognizer.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/model_zoo/human_face_detect_mnp01.hpp b/tools/sdk/esp32s2/include/esp-dl/include/model_zoo/human_face_detect_mnp01.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/model_zoo/human_face_detect_mnp01.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/model_zoo/human_face_detect_mnp01.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/model_zoo/human_face_detect_msr01.hpp b/tools/sdk/esp32s2/include/esp-dl/include/model_zoo/human_face_detect_msr01.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/model_zoo/human_face_detect_msr01.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/model_zoo/human_face_detect_msr01.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_add2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_add2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_add2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_add2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_avg_pool2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_avg_pool2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_avg_pool2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_concat.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_concat.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_concat.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_concat.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_concat2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_concat2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_concat2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_concat2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_conv2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_conv2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_conv2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_depthwise_conv2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_depthwise_conv2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_depthwise_conv2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_depthwise_conv2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_fully_connected.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_fully_connected.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_fully_connected.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_fully_connected.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_global_avg_pool2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_global_avg_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_global_avg_pool2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_global_avg_pool2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_global_max_pool2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_global_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_global_max_pool2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_global_max_pool2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_leakyrelu.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_leakyrelu.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_leakyrelu.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_leakyrelu.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_max2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_max2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_max2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_max2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_max_pool2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_max_pool2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_max_pool2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_max_pool2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_min2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_min2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_min2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_min2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_mul2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_mul2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_mul2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_mul2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_pad.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_pad.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_pad.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_pad.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_prelu.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_prelu.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_prelu.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_prelu.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_relu.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_relu.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_relu.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_relu.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_sub2d.hpp b/tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_sub2d.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/nn/dl_nn_sub2d.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/nn/dl_nn_sub2d.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/tool/dl_tool.hpp b/tools/sdk/esp32s2/include/esp-dl/include/tool/dl_tool.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/tool/dl_tool.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/tool/dl_tool.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/tool/dl_tool_cache.hpp b/tools/sdk/esp32s2/include/esp-dl/include/tool/dl_tool_cache.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/tool/dl_tool_cache.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/tool/dl_tool_cache.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/typedef/dl_constant.hpp b/tools/sdk/esp32s2/include/esp-dl/include/typedef/dl_constant.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/typedef/dl_constant.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/typedef/dl_constant.hpp
diff --git a/tools/sdk/esp32s2/include/esp-face/include/typedef/dl_variable.hpp b/tools/sdk/esp32s2/include/esp-dl/include/typedef/dl_variable.hpp
similarity index 100%
rename from tools/sdk/esp32s2/include/esp-face/include/typedef/dl_variable.hpp
rename to tools/sdk/esp32s2/include/esp-dl/include/typedef/dl_variable.hpp
diff --git a/tools/sdk/esp32s2/include/esp-dsp/modules/common/include/dsp_common.h b/tools/sdk/esp32s2/include/esp-dsp/modules/common/include/dsp_common.h
index 68cfc5c694d..da7b001f3d4 100644
--- a/tools/sdk/esp32s2/include/esp-dsp/modules/common/include/dsp_common.h
+++ b/tools/sdk/esp32s2/include/esp-dsp/modules/common/include/dsp_common.h
@@ -18,7 +18,12 @@
 #include <stdbool.h>
 #include "dsp_err.h"
 #include "esp_idf_version.h"
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0)
+#include "esp_cpu.h"
+#else
 #include "soc/cpu.h"
+#endif
 
 #ifdef __cplusplus
 extern "C"
@@ -58,4 +63,4 @@ int dsp_power_of_two(int x);
 #define dsp_get_cpu_cycle_count  xthal_get_ccount
 #endif
 
-#endif // _dsp_common_H_
\ No newline at end of file
+#endif // _dsp_common_H_
diff --git a/tools/sdk/esp32s2/include/esp-dsp/modules/common/include/dsp_platform.h b/tools/sdk/esp32s2/include/esp-dsp/modules/common/include/dsp_platform.h
index d04f9dc783b..239b325bd52 100644
--- a/tools/sdk/esp32s2/include/esp-dsp/modules/common/include/dsp_platform.h
+++ b/tools/sdk/esp32s2/include/esp-dsp/modules/common/include/dsp_platform.h
@@ -15,11 +15,16 @@
 
 #ifndef dsp_platform_h_
 #define dsp_platform_h_
+#include "esp_idf_version.h"
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0)
+#include "esp_cpu.h"
+#else
 #include "soc/cpu.h"
+#endif
 
 #include "freertos/FreeRTOS.h"
 #include "freertos/portable.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
 
-#endif // dsp_platform_h_
\ No newline at end of file
+#endif // dsp_platform_h_
diff --git a/tools/sdk/esp32s2/include/esp-dsp/modules/conv/include/dsps_conv.h b/tools/sdk/esp32s2/include/esp-dsp/modules/conv/include/dsps_conv.h
index 7dc9e517bfa..07dbf7a2b30 100644
--- a/tools/sdk/esp32s2/include/esp-dsp/modules/conv/include/dsps_conv.h
+++ b/tools/sdk/esp32s2/include/esp-dsp/modules/conv/include/dsps_conv.h
@@ -43,7 +43,7 @@ extern "C"
  */
 esp_err_t dsps_conv_f32_ae32(const float *Signal, const int siglen, const float *Kernel, const int kernlen, float *convout);
 esp_err_t dsps_conv_f32_ansi(const float *Signal, const int siglen, const float *Kernel, const int kernlen, float *convout);
-/**}@*/
+/**@}*/
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/esp-dsp/modules/conv/include/dsps_corr.h b/tools/sdk/esp32s2/include/esp-dsp/modules/conv/include/dsps_corr.h
index 7104d30c4b7..06f62ca8d81 100644
--- a/tools/sdk/esp32s2/include/esp-dsp/modules/conv/include/dsps_corr.h
+++ b/tools/sdk/esp32s2/include/esp-dsp/modules/conv/include/dsps_corr.h
@@ -43,7 +43,7 @@ extern "C"
  */
 esp_err_t dsps_corr_f32_ansi(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *dest);
 esp_err_t dsps_corr_f32_ae32(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *dest);
-/**}@*/
+/**@}*/
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft2r.h b/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft2r.h
index da306bf13b3..e1302f83e46 100644
--- a/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft2r.h
+++ b/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft2r.h
@@ -69,8 +69,6 @@ esp_err_t dsps_fft2r_init_sc16(int16_t *fft_table_buff, int table_size);
  * Free resources of Complex FFT. This function delete coefficients table if it was allocated by dsps_fft2r_init_fc32.
  * The implementation use ANSI C and could be compiled and run on any platform
  *
- *
- * @return
  */
 void dsps_fft2r_deinit_fc32(void);
 void dsps_fft2r_deinit_sc16(void);
@@ -128,13 +126,13 @@ esp_err_t dsps_fft2r_sc16_aes3_(int16_t *data, int N, int16_t *w);
 esp_err_t dsps_bit_rev_fc32_ansi(float *data, int N);
 esp_err_t dsps_bit_rev_sc16_ansi(int16_t *data, int N);
 esp_err_t dsps_bit_rev2r_fc32(float *data, int N);
-
-/**@{*/
+/**@}*/
 
 esp_err_t dsps_bit_rev_lookup_fc32_ansi(float *data, int reverse_size, uint16_t *reverse_tab);
 esp_err_t dsps_bit_rev_lookup_fc32_ae32(float *data, int reverse_size, uint16_t *reverse_tab);
 esp_err_t dsps_bit_rev_lookup_fc32_aes3(float *data, int reverse_size, uint16_t *reverse_tab);
 
+/**@{*/
 /**
  * @brief      Generate coefficients table for the FFT radix 2
  *
diff --git a/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h b/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h
index 17506e7dc40..04e088d87aa 100644
--- a/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h
+++ b/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h
@@ -30,7 +30,7 @@
 #if CONFIG_IDF_TARGET_ESP32S3
 #define dsps_fft2r_fc32_aes3_enabled 1
 #define dsps_fft2r_sc16_aes3_enabled 1
-#endif 
+#endif
 
 
 #endif // _dsps_fft2r_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft4r.h b/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft4r.h
index 0f87b6f0f5d..6443dc80d18 100644
--- a/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft4r.h
+++ b/tools/sdk/esp32s2/include/esp-dsp/modules/fft/include/dsps_fft4r.h
@@ -65,7 +65,6 @@ esp_err_t dsps_fft4r_init_fc32(float *fft_table_buff, int max_fft_size);
  * The implementation use ANSI C and could be compiled and run on any platform
  *
  *
- * @return
  */
 void dsps_fft4r_deinit_fc32(void);
 /**@}*/
@@ -115,7 +114,7 @@ esp_err_t dsps_bit_rev4r_fc32(float *data, int N);
 esp_err_t dsps_bit_rev4r_fc32_ae32(float *data, int N);
 esp_err_t dsps_bit_rev4r_direct_fc32_ansi(float *data, int N);
 esp_err_t dsps_bit_rev4r_sc16_ansi(int16_t *data, int N);
-
+/**@}*/
 
 /**@{*/
 /**
diff --git a/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts.h b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts.h
new file mode 100644
index 00000000000..ad800303a17
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts.h
@@ -0,0 +1,135 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_TTS_H_
+#define _ESP_TTS_H_
+
+#include "stdlib.h"
+#include "stdio.h"
+#include "esp_tts_voice.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+	NONE_MODE      = 0,    //do not play any word before playing a specific number
+	ALI_PAY_MODE,          //play zhi fu bao shou kuan before playing a specific number
+	WEIXIN_PAY_MODE        //play wei xin shou kuan before playing a specific number
+} pay_mode_t;
+
+typedef void * esp_tts_handle_t;
+
+
+/**
+ * @brief Init an instance of the TTS voice set structure.
+ *
+ * @param template      The const esp_tts_voice_template.
+ * @param data          The customize voice data
+ * @return
+ *         - NULL: Init failed
+ *         - Others: The instance of voice set
+ */
+esp_tts_voice_t *esp_tts_voice_set_init(const esp_tts_voice_t *template, void *data);
+
+/**
+ * @brief Init an instance of the TTS voice set structure.
+ *
+ * @param template      The const esp_tts_voice_template.
+ * @param data          The customize voice data
+ * @return
+ *         - NULL: Init failed
+ *         - Others: The instance of voice set
+ */
+void esp_tts_voice_set_free(esp_tts_voice_t *voice);
+
+/**
+ * @brief Creates an instance of the TTS structure.
+ *
+ * @param voice      Voice set containing all basic phonemes.
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of TTS structure
+ */
+esp_tts_handle_t esp_tts_create(esp_tts_voice_t *voice);
+
+/**
+ * @brief parse money pronuciation.
+ *
+ * @param tts_handle   Instance of TTS
+ * @param yuan         The number of yuan    
+ * @param jiao         The number of jiao
+ * @param fen          The number of fen   
+ * @param mode         The pay mode: please refer to pay_mode_t
+ * @return
+ *        - 0: failed
+ *        - 1: succeeded
+ */
+int esp_tts_parse_money(esp_tts_handle_t tts_handle, int yuan, int jiao, int fen, pay_mode_t mode);
+
+/**
+ * @brief parse Chinese PinYin pronuciation.
+ *
+ * @param tts_handle   Instance of TTS
+ * @param pinyin       PinYin string, like this "da4 jia1 hao3"    
+ * @return
+ *         - 0: failed
+ *         - 1: succeeded
+ */
+int esp_tts_parse_pinyin(esp_tts_handle_t tts_handle, const char *pinyin);
+
+/**
+ * @brief parse Chinese string.
+ *
+ * @param tts_handle   Instance of TTS
+ * @param str          Chinese string, like this "大家好"    
+ * @return
+ *         - 0: failed
+ *         - 1: succeeded
+ */
+int esp_tts_parse_chinese(esp_tts_handle_t tts_handle, const char *str);
+
+/**
+ * @brief output TTS voice data by stream.
+ *
+ * @Warning The output data should not be freed. 
+            Once the output length is 0, the all voice data has been output.  
+ *
+ * @param tts_handle   Instance of TTS
+ * @param len          The length of output data 
+ * @param speed        The speech speed speed of synthesized speech, 
+                       range:0~5, 0: the slowest speed, 5: the fastest speech 
+ * @return
+ *        - voice raw data
+ */
+short* esp_tts_stream_play(esp_tts_handle_t tts_handle, int *len, unsigned int speed);
+
+/**
+ * @brief reset tts stream and clean all cache of TTS instance.
+ *
+ * @param tts_handle   Instance of TTS
+ */
+void esp_tts_stream_reset(esp_tts_handle_t tts_handle);
+
+/**
+ * @brief Free the TTS instance
+ *
+ * @param tts_handle The instance of TTS. 
+ */
+void esp_tts_destroy(esp_tts_handle_t tts_handle);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_parser.h b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_parser.h
new file mode 100644
index 00000000000..ce71b04e319
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_parser.h
@@ -0,0 +1,25 @@
+#ifndef _ESP_TTS_PARSER_H_
+#define _ESP_TTS_PARSER_H_
+
+#include "stdlib.h"
+#include "esp_tts_voice.h"
+
+
+typedef struct {
+	int *syll_idx;
+	int syll_num;
+	int total_num;
+	esp_tts_voice_t *voice;
+}esp_tts_utt_t;
+
+esp_tts_utt_t* esp_tts_parser_chinese   (const char* str, esp_tts_voice_t *voice);
+
+esp_tts_utt_t* esp_tts_parser_money(char *play_tag, int yuan, int jiao, int fen, esp_tts_voice_t *voice);
+
+esp_tts_utt_t* esp_tts_parser_pinyin(char* pinyin, esp_tts_voice_t *voice);
+
+esp_tts_utt_t* esp_tts_utt_alloc(int syll_num, esp_tts_voice_t *voice);
+
+void esp_tts_utt_free(esp_tts_utt_t *utt);
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_player.h b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_player.h
new file mode 100644
index 00000000000..2070011af41
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_player.h
@@ -0,0 +1,67 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_TTS_PLAYER_H_
+#define _ESP_TTS_PLAYER_H_
+
+#include "stdlib.h"
+#include "stdio.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+typedef void * esp_tts_player_handle_t;
+
+/**
+ * @brief Creates an instance of the TTS Player structure.
+ *
+ * @param mode      mode of player, default:0 
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of  TTS Player
+ */
+esp_tts_player_handle_t esp_tts_player_create(int mode);
+
+
+
+/**
+ * @brief Concatenate audio files. 
+ *
+ * @Warning Just support mono audio data.
+ *
+ * @param player       The handle of TTS player
+ * @param file_list    The dir of files
+ * @param file_num     The number of file    
+ * @param len          The length of return audio buffer 
+ * @param sample_rate  The sample rate of input audio file
+ * @param sample_width The sample width of input audio file, sample_width=1:8-bit, sample_width=2:16-bit,...
+ * @return
+ *        - audio data buffer
+ */
+unsigned char* esp_tts_stream_play_by_concat(esp_tts_player_handle_t player, const char **file_list, int file_num, int *len, int *sample_rate, int *sample_width);
+
+
+/**
+ * @brief Free the TTS Player instance
+ *
+ * @param player The instance of TTS Player. 
+ */
+void esp_tts_player_destroy(esp_tts_player_handle_t player);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_stretcher.h b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_stretcher.h
new file mode 100644
index 00000000000..ab47b272c0d
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_stretcher.h
@@ -0,0 +1,48 @@
+////////////////////////////////////////////////////////////////////////////
+//                        **** AUDIO-STRETCH ****                         //
+//                      Time Domain Harmonic Scaler                       //
+//                    Copyright (c) 2019 David Bryant                     //
+//                          All Rights Reserved.                          //
+//      Distributed under the BSD Software License (see license.txt)      //
+////////////////////////////////////////////////////////////////////////////
+
+// stretch.h
+
+// Time Domain Harmonic Compression and Expansion
+//
+// This library performs time domain harmonic scaling with pitch detection
+// to stretch the timing of a 16-bit PCM signal (either mono or stereo) from
+// 1/2 to 2 times its original length. This is done without altering any of
+// its tonal characteristics.
+
+#ifndef STRETCH_H
+#define STRETCH_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void *StretchHandle;
+
+/* extern function */
+StretchHandle stretch_init (int shortest_period, int longest_period, int num_chans, int fast_mode);
+int stretch_samples (StretchHandle handle, short *samples, int num_samples, short *output, float ratio);
+int stretch_flush (StretchHandle handle, short *output);
+void stretch_deinit (StretchHandle handle);
+
+/* internel function */
+StretchHandle stretcher_init_internal(int shortest_period, int longest_period, int buff_len);
+void stretcher_deinit (StretchHandle handle);
+int stretcher_is_empty(StretchHandle handle);
+int stretcher_is_full(StretchHandle handle, int num_samples);
+int stretcher_push_data(StretchHandle handle, short *samples, int num_samples);
+int stretcher_stretch_samples(StretchHandle handle, short *output, float ratio);
+int stretcher_stretch_samples_flash(StretchHandle handle, short *output, float ratio, const short *period_data, 
+                                    int *start_idx, int end_idx);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice.h b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice.h
new file mode 100644
index 00000000000..77f263e3935
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice.h
@@ -0,0 +1,20 @@
+#ifndef _ESP_TTS_VOICE_H_
+#define _ESP_TTS_VOICE_H_
+
+typedef struct {
+	char *voice_name;       // voice set name 
+	char *format;           // the format of voice data, currently support pcm and amrwb
+	int sample_rate;        // the sample rate of voice data, just for pcm format
+	int bit_width;          // the bit width of voice data, just for pcm format
+	int syll_num;           // the syllable mumber 
+	char **sylls;           // the syllable names
+	int *syll_pos;          // the position of syllable in syllable audio data array
+	short *pinyin_idx;      // the index of pinyin
+	short *phrase_dict;     // the pinyin dictionary of common phrase
+	short *extern_idx;      // the idx of extern phrases 
+	short *extern_dict;     // the extern phrase dictionary
+	unsigned char *data;    // the audio data of all syllables
+} esp_tts_voice_t;
+
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_template.h b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_template.h
new file mode 100644
index 00000000000..ce5f5b6f455
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_template.h
@@ -0,0 +1,5 @@
+#pragma once
+
+
+#include "esp_tts.h"
+extern const esp_tts_voice_t  esp_tts_voice_template;
diff --git a/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_xiaole.h b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_xiaole.h
new file mode 100644
index 00000000000..f87866ae6cb
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_xiaole.h
@@ -0,0 +1,5 @@
+#pragma once
+
+
+#include "esp_tts.h"
+extern const esp_tts_voice_t  esp_tts_voice_xiaole;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/customized_word_wn5.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/customized_word_wn5.h
new file mode 100644
index 00000000000..57199e5abe0
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/customized_word_wn5.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_customized_word_wn5;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib.h
new file mode 100644
index 00000000000..d7b6d8fbe77
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib.h
@@ -0,0 +1,411 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_H
+#define DL_LIB_H
+
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+
+#ifdef ESP_PLATFORM
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "esp_system.h"
+#include "esp_heap_caps.h"
+#include "sdkconfig.h"
+#define DL_SPIRAM_SUPPORT 1
+#endif
+
+#ifdef CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/cache.h"
+#endif
+
+typedef int padding_state;
+
+// /**
+//  * @brief Allocate a chunk of memory which has the given capabilities.
+//  *        Equivalent semantics to libc malloc(), for capability-aware memory.
+//  *        In IDF, malloc(p) is equivalent to heap_caps_malloc(p, MALLOC_CAP_8BIT).
+//  * 
+//  * @param size  In bytes, of the amount of memory to allocate
+//  * @param caps  Bitwise OR of MALLOC_CAP_* flags indicating the type of memory to be returned
+//  *              MALLOC_CAP_SPIRAM:   Memory must be in SPI RAM
+//  *              MALLOC_CAP_INTERNAL: Memory must be internal; specifically it should not disappear when flash/spiram cache is switched off
+//  *              MALLOC_CAP_DMA:      Memory must be able to accessed by DMA
+//  *              MALLOC_CAP_DEFAULT:  Memory can be returned in a non-capability-specific memory allocation
+//  * @return Pointer to currently allocated heap memory
+//  **/
+// void *heap_caps_malloc(size_t size, uint32_t caps);
+
+/**
+ * @brief Allocate aligned memory from internal memory or external memory.
+ *        if cnt*size > CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL, allocate memory from internal RAM
+ *        else, allocate memory from PSRAM
+ *
+ * @param cnt    Number of continuing chunks of memory to allocate
+ * @param size   Size, in bytes, of a chunk of memory to allocate     
+ * @param align  Aligned size, in bits
+ * @return Pointer to currently allocated heap memory
+ */
+void *dl_lib_calloc(int cnt, int size, int align);
+
+/**
+ * @brief Always allocate aligned memory from external memory.
+ *
+ * @param cnt    Number of continuing chunks of memory to allocate
+ * @param size   Size, in bytes, of a chunk of memory to allocate     
+ * @param align  Aligned size, in bits
+ * @return Pointer to currently aligned heap memory
+ */
+void *dl_lib_calloc_psram(int cnt, int size, int align);
+
+/**
+ * @brief Free aligned memory allocated by `dl_lib_calloc` or `dl_lib_calloc_psram` 
+ * 
+ * @param prt    Pointer to free
+ */
+void dl_lib_free(void *ptr);
+
+/**
+ * @brief Does a fast version of the exp() operation on a floating point number.
+ *
+ * As described in https://codingforspeed.com/using-faster-exponential-approximation/
+ * Should be good til an input of 5 or so with a steps factor of 8.
+ *
+ * @param in Floating point input
+ * @param steps Approximation steps. More is more precise. 8 or 10 should be good enough for most purposes.
+ * @return Exp()'ed output
+ */
+fptp_t fast_exp(double x, int steps);
+
+/**
+ * @brief Does a fast version of the exp() operation on a floating point number.
+ *
+ * @param in Floating point input
+ * @return Exp()'ed output
+ */
+double fast_exp_pro(double x);
+
+/**
+ * @brief Does a softmax operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_softmax(const dl_matrix2d_t *in, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Does a softmax operation on a quantized matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_softmax_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a sigmoid operation on a floating point number
+ *
+ * @param in Floating point input
+ * @return Sigmoid output
+ */
+
+fptp_t dl_sigmoid_op(fptp_t in);
+
+
+/**
+ * @brief Does a sigmoid operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_sigmoid(const dl_matrix2d_t *in, dl_matrix2d_t *out);
+
+/**
+ * @brief Does a tanh operation on a floating point number
+ *
+ * @param in        Floating point input number
+ * @return Tanh value
+ */
+fptp_t dl_tanh_op(fptp_t v);
+
+/**
+ * @brief Does a tanh operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_tanh(const dl_matrix2d_t *in, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Does a relu (Rectifier Linear Unit) operation on a floating point number
+ *
+ * @param in        Floating point input
+ * @param clip      If value is higher than this, it will be clipped to this value
+ * @return Relu output
+ */
+fptp_t dl_relu_op(fptp_t in, fptp_t clip);
+
+/**
+ * @brief Does a ReLu operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_relu(const dl_matrix2d_t *in, fptp_t clip, dl_matrix2d_t *out);
+
+/**
+ * @brief Fully connected layer operation
+ *
+ * @param in        Input vector
+ * @param weight    Weights of the neurons
+ * @param bias      Biases for the neurons. Can be NULL if a bias of 0 is required.
+ * @param out       Output array. Outputs are placed here. Needs to be an initialized, weight->w by in->h in size, matrix.
+ */
+void dl_fully_connect_layer(const dl_matrix2d_t *in, const dl_matrix2d_t *weight, const dl_matrix2d_t *bias, dl_matrix2d_t *out);
+
+/**
+ * @brief Pre-calculate the sqrtvari variable for the batch_normalize function.
+ * The sqrtvari matrix depends on the variance and epsilon values, which normally are constant. Hence,
+ * this matrix only needs to be calculated once. This function does that.
+ *
+ * @param 
+ * @return
+ */
+void dl_batch_normalize_get_sqrtvar(const dl_matrix2d_t *variance, fptp_t epsilon, dl_matrix2d_t *out);
+
+/**
+ * @brief Batch-normalize a matrix
+ *
+ * @param m         The matrix to normalize
+ * @param offset    Offset matrix
+ * @param scale     Scale matrix
+ * @param mean      Mean matrix
+ * @param sqrtvari  Matrix precalculated using dl_batch_normalize_get_sqrtvar
+ * @return
+ */
+void dl_batch_normalize(dl_matrix2d_t *m, const dl_matrix2d_t *offset, const dl_matrix2d_t *scale, 
+                        const dl_matrix2d_t *mean, const dl_matrix2d_t *sqrtvari);
+
+/**
+ * @brief Do a basic LSTM layer pass.
+ *
+ * @warning Returns state_h pointer, so do not free result.
+
+ * @param in        Input vector
+ * @param state_c   Internal state of the LSTM network
+ * @param state_h   Internal state (previous output values) of the LSTM network
+ * @param weights   Weights for the neurons
+ * @param bias      Bias for the neurons. Can be NULL if no bias is required
+ * @return          Output values of the neurons
+ */
+dl_matrix2d_t *dl_basic_lstm_layer(const dl_matrix2d_t *in, dl_matrix2d_t *state_c, dl_matrix2d_t *state_h, 
+                const dl_matrix2d_t *weight, const dl_matrix2d_t *bias);
+
+/**
+ * @brief Do a basic LSTM layer pass, partial quantized version.
+ * This LSTM function accepts 16-bit fixed-point weights and 32-bit float-point bias. 
+ *
+ * @warning Returns state_h pointer, so do not free result.
+
+ * @param in		Input vector
+ * @param state_c	Internal state of the LSTM network
+ * @param state_h	Internal state (previous output values) of the LSTM network
+ * @param weights	Weights for the neurons, need to be quantised 
+ * @param bias		Bias for the neurons. Can be NULL if no bias is required
+ * @return			Output values of the neurons
+ */
+dl_matrix2dq_t *dl_basic_lstm_layer_quantised_weights(const dl_matrix2d_t *in, dl_matrix2d_t *state_c, dl_matrix2d_t *state_h,
+				const dl_matrix2dq_t *weight, const dl_matrix2d_t *bias);
+
+/**
+ * @brief Do a fully-connected layer pass, fully-quantized version.
+ *
+ * @param in        Input vector
+ * @param weight    Weights of the neurons
+ * @param bias      Bias values of the neurons. Can be NULL if no bias is needed.
+ * @param shift     Number of bits to shift the result back by. See dl_lib_matrixq.h for more info
+ * @return          Output values of the neurons
+ */
+void dl_fully_connect_layer_q(const dl_matrix2dq_t *in, const dl_matrix2dq_t *weight, const dl_matrix2dq_t *bias, dl_matrix2dq_t *out, int shift);
+
+/**
+ * @brief Do a basic LSTM layer pass, fully-quantized version
+ *
+ * @warning Returns state_h pointer, so do not free result.
+
+ * @param in        Input vector
+ * @param state_c   Internal state of the LSTM network
+ * @param state_h   Internal state (previous output values) of the LSTM network
+ * @param weights   Weights for the neurons
+ * @param bias      Bias for the neurons. Can be NULL if no bias is required
+ * @param shift     Number of bits to shift the result back by. See dl_lib_matrixq.h for more info
+ * @return          Output values of the neurons
+ */
+dl_matrix2dq_t *dl_basic_lstm_layer_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *state_c, dl_matrix2dq_t *state_h,
+                const dl_matrix2dq_t *weight, const dl_matrix2dq_t *bias, int shift);
+
+/**
+ * @brief Batch-normalize a matrix, fully-quantized version
+ *
+ * @param m         The matrix to normalize
+ * @param offset    Offset matrix
+ * @param scale     Scale matrix
+ * @param mean      Mean matrix
+ * @param sqrtvari  Matrix precalculated using dl_batch_normalize_get_sqrtvar
+ * @param shift     Number of bits to shift the result back by. See dl_lib_matrixq.h for more info
+ * @return
+ */
+void dl_batch_normalize_q(dl_matrix2dq_t *m, const dl_matrix2dq_t *offset, const dl_matrix2dq_t *scale, 
+                        const dl_matrix2dq_t *mean, const dl_matrix2dq_t *sqrtvari, int shift);
+
+/**
+ * @brief Does a relu (Rectifier Linear Unit) operation on a fixed-point number
+ * This accepts and returns fixed-point 32-bit number with the last 15 bits being the bits after the decimal
+ * point. (Equivalent to a mantissa in a quantized matrix with exponent -15.)
+ *
+ * @param in        Fixed-point input
+ * @param clip      If value is higher than this, it will be clipped to this value
+ * @return Relu output
+ */
+qtp_t dl_relu_q_op(qtp_t in, qtp_t clip);
+
+/**
+ * @brief Does a ReLu operation on a matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_relu_q(const dl_matrix2dq_t *in, fptp_t clip, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a sigmoid operation on a fixed-point number.
+ * This accepts and returns a fixed-point 32-bit number with the last 15 bits being the bits after the decimal
+ * point. (Equivalent to a mantissa in a quantized matrix with exponent -15.)
+ *
+ * @param in Fixed-point input
+ * @return Sigmoid output
+ */
+int dl_sigmoid_op_q(const int in);
+int16_t dl_sigmoid_op_q8(const int16_t in);
+/**
+ * @brief Does a sigmoid operation on a matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_sigmoid_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a tanh operation on a matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_tanh_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a tanh operation on a fixed-point number.
+ * This accepts and returns a fixed-point 32-bit number with the last 15 bits being the bits after the decimal
+ * point. (Equivalent to a mantissa in a quantized matrix with exponent -15.)
+ *
+ * @param in Fixed-point input
+ * @return tanh output
+ */
+int dl_tanh_op_q(int v);
+int16_t dl_tanh_op_q8(int16_t v);
+
+void load_mat_psram_mn4(void);
+void load_mat_psram_mn3(void);
+void free_mat_psram_mn4(void);
+void free_mat_psram_mn3(void);
+qtp_t dl_hard_sigmoid_op(qtp_t in, int exponent);
+qtp_t dl_hard_tanh_op(qtp_t in, int exponent);
+
+int16_t dl_table_tanh_op(int16_t in, int exponent);
+int16_t dl_table_sigmoid_op(int16_t in, int exponent);
+
+void dl_hard_sigmoid_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+void dl_hard_tanh_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+void dl_table_sigmoid_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+void dl_table_tanh_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+
+/**
+ * @brief Filter out the number greater than clip in the matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_minimum(const dl_matrix2d_t *in, fptp_t clip, dl_matrix2d_t *out);
+
+/**
+ * @brief Filter out the number greater than clip in the matrix, float version
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_minimum_q(const dl_matrix2dq_t *in, fptp_t clip, dl_matrix2dq_t *out);
+/**
+ * @brief Do a basic CNN layer pass.
+ *
+ * @Warning This just supports the single channel input image, and the output is single row matrix.
+            That is to say, the height of output is 1, and the weight of output is out_channels*out_image_width*out_image_height
+ *
+ * @param in             Input single channel image 
+ * @param weight         Weights of the neurons, weight->w = out_channels, weight->h = filter_width*filter_height
+ * @param bias           Bias for the CNN layer.
+ * @param filter_height  The height of convolution kernel
+ * @param filter_width   The width of convolution kernel
+ * @param out_channels   The number of output channels of convolution kernel
+ * @param stride_x       The step length of the convolution window in x(width) direction
+ * @param stride_y       The step length of the convolution window in y(height) direction
+ * @param pad            One of `"VALID"` or `"SAME"`, 0 is "VALID" and the other is "SAME"
+ * @param out            The result of CNN layer, out->h=1.
+ * @return               The result of CNN layer.
+ */
+dl_matrix2d_t *dl_basic_conv_layer(const dl_matrix2d_t *in, const dl_matrix2d_t *weight, const dl_matrix2d_t *bias, int filter_width, int filter_height, 
+                                   const int out_channels, const int stride_x, const int stride_y,  padding_state pad, const dl_matrix2d_t* out);
+
+
+/**
+ * @brief Do a basic CNN layer pass, quantised wersion.
+ *
+ * @Warning This just supports the single channel input image, and the output is single row matrix.
+            That is to say, the height of output is 1, and the weight of output is out_channels*out_image_width*out_image_height
+ *
+ * @param in             Input single channel image 
+ * @param weight         Weights of the neurons, weight->w = out_channels, weight->h = filter_width*filter_height,
+ * @param bias           Bias of the neurons.
+ * @param filter_height  The height of convolution kernel
+ * @param filter_width   The width of convolution kernel
+ * @param out_channels   The number of output channels of convolution kernel
+ * @param stride_x       The step length of the convolution window in x(width) direction
+ * @param stride_y       The step length of the convolution window in y(height) direction
+ * @param pad            One of `"VALID"` or `"SAME"`, 0 is "VALID" and the other is "SAME"
+ * @param out            The result of CNN layer, out->h=1
+ * @return               The result of CNN layer
+ */
+dl_matrix2d_t *dl_basic_conv_layer_quantised_weight(const dl_matrix2d_t *in, const dl_matrix2dq_t *weight, const dl_matrix2d_t *bias, int filter_width, int filter_height, 
+                                                     const int out_channels, const int stride_x, const int stride_y,  padding_state pad, const dl_matrix2d_t* out);
+
+#endif
+
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_coefgetter_if.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_coefgetter_if.h
new file mode 100644
index 00000000000..f1a937343bf
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_coefgetter_if.h
@@ -0,0 +1,72 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_COEFGETTER_IF_H
+#define DL_LIB_COEFGETTER_IF_H
+
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+#include "cJSON.h"
+
+//Set this if the coefficient requested is a batch-normalization popvar matrix which needs to be preprocessed by
+//dl_batch_normalize_get_sqrtvar first.
+#define COEF_GETTER_HINT_BNVAR (1<<0)
+
+/*
+This struct describes the basic information of model data: 
+word_num: the number of wake words or speech commands
+word_list: the name list of wake words or speech commands
+thres_list: the threshold list of wake words or speech commands
+info_str: the string used to reflect the version and information of model data
+          which consist of the architecture of network, the version of model data, wake words and their threshold
+*/
+typedef struct {
+    int word_num;
+    char **word_list;
+    int *win_list;
+    float *thresh_list;
+    char *info_str;
+} model_info_t;
+
+/*
+Alphabet struct describes the basic grapheme or phoneme.
+item_num: the number of baisc item(grapheme or phonemr)
+items: the list of basic item
+*/
+typedef struct {
+    int item_num;
+    char **items;
+}alphabet_t;
+
+/*
+This struct describes a generic coefficient getter: a way to get the constant coefficients needed for a neural network.
+For the two getters, the name describes the name of the coefficient matrix, usually the same as the Numpy filename the
+coefficient was originally stored in. The arg argument can be used to optionally pass an additional user-defined argument
+to the getter (e.g. the directory to look for files in the case of the Numpy file loader getter). The hint argument
+is a bitwise OR of the COEF_GETTER_HINT_* flags or 0 when none is needed. Use the free_f/free_q functions to release the
+memory for the returned matrices, when applicable.
+*/
+typedef struct {
+    const dl_matrix2d_t* (*getter_f)(const char *name, void *arg, int hint);
+    const dl_matrix2dq_t* (*getter_q)(const char *name, void *arg, int hint);
+    const dl_matrix2dq8_t* (*getter_q8)(const char *name, void *arg, int hint);
+    void (*free_f)(const dl_matrix2d_t *m);
+    void (*free_q)(const dl_matrix2dq_t *m);
+    void (*free_q8)(const dl_matrix2dq8_t *m);
+    const model_info_t* (*getter_info)(void *arg);
+    const alphabet_t* (*getter_alphabet)(void *arg);
+    const cJSON* (*getter_config)(void *arg);
+} model_coeff_getter_t;
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_conv_queue.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_conv_queue.h
new file mode 100644
index 00000000000..e0ca0a1d457
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_conv_queue.h
@@ -0,0 +1,164 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_CONV_QUEUE_H
+#define DL_LIB_CONV_QUEUE_H
+
+
+#include "dl_lib_matrix.h"
+typedef float fptp_t;
+
+
+//Flags for matrices
+#define DL_MF_FOREIGNDATA (1<<0)  /*< Matrix *item data actually points to another matrix and should not be freed */
+
+//Float convolution FIFO queue. 
+typedef struct {
+    int n;          /*< the length of queue */
+    int c;          /*< the channel number of queue element*/
+    int front;      /*< the front(top) position of queue */
+    int flag;       /*< not used*/
+    fptp_t *item;   /*< Pointer to item array */
+} dl_conv_queue_t;
+
+/**
+ * @brief Allocate a convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The channel number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_conv_queue_t *dl_conv_queue_alloc(int n, int c);
+
+/**
+ * @brief Free a convolution queue
+ *
+ * @param cq     The convolution queue to free
+ */
+void dl_conv_queue_free(dl_conv_queue_t *cq);
+
+void dl_conv_to_matrix2d(dl_conv_queue_t *cq, dl_matrix2d_t* out);
+
+/**
+ * @brief Move the front pointer of queue forward, 
+          the First(oldest) element become the last(newest) element, 
+ *
+ * @param cq    Input convolution queue
+ * @return      Pointer of oldest element  
+ */
+fptp_t *dl_conv_queue_pop(dl_conv_queue_t *cq);
+
+/**
+ * @brief  Remove the oldest element, then insert the input element at the end of queue
+ *
+ * @param cq     Input convolution queue
+ * @param item   The new element
+ */
+void dl_conv_queue_push(dl_conv_queue_t *cq, fptp_t* item);
+
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_get_queue_item(dl_conv_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a sigmoid operation on the one of element in the convolution queue.
+ * Gets the pointer of element in the convolution queue by offset, and does a sigmoid operation
+ * by this pointer, then return the pointer      
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_sigmoid_step(dl_conv_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a tanh operation on the one of element in the convolution queue.
+ * Gets the pointer of element in the convolution queue by offset, and does a tanh operation
+ * by this pointer, then return the pointer  
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_tanh_step(dl_conv_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a softmax operation on the one of element in the convolution queue.
+ * Gets the pointer of element in the convolution queue by offset, and does a softmax operation
+ * by this pointer, then return the pointer 
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_softmax_step(dl_conv_queue_t *cq, int offset);
+
+fptp_t *dl_relu_step(dl_conv_queue_t *cq, int offset);
+fptp_t *dl_relu_look(dl_matrix2d_t *cq, int offset);
+dl_matrix2d_t *dl_matrix_concat1(const dl_conv_queue_t *a, const dl_matrix2d_t *b);
+dl_matrix2d_t *dl_basic_lstm_layer1(const dl_conv_queue_t *in, dl_matrix2d_t *state_c, dl_matrix2d_t *state_h,
+                                   const dl_matrix2d_t *weight, const dl_matrix2d_t *bias);
+/**
+ * @brief Fast implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is first element of output queue and should not be freed separately.
+ *
+ * @param in       Input convolution queue
+ * @param out      Output convolution queue
+ * @param rate     A positive int, the stride with which we sample input value 
+ * @param size     A positive int, the size of 1D-filter
+ * @param kernel   The kernel matrix of filter
+ * @param bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @return         The result of atrous convolution
+ */
+fptp_t *dl_atrous_conv1d_step(dl_conv_queue_t *in, dl_conv_queue_t *out, int rate, int size,
+                              dl_matrix2d_t* kernel, dl_matrix2d_t* bias);
+fptp_t *dl_look_conv_step(dl_conv_queue_t *in, dl_matrix2d_t *out, int rate, int size,
+                         dl_matrix2d_t* kernel, dl_matrix2d_t* bias);
+
+/**
+ * @brief Fast implement of dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is first element of output queue and should not be freed separately.
+ *
+ * @param in              Input convolution queue
+ * @param out             Output convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @return                The result of dilation layer
+ */
+fptp_t *dl_dilation_layer(dl_conv_queue_t *in, dl_conv_queue_t *out, int rate, int size,
+                          dl_matrix2d_t* filter_kernel, dl_matrix2d_t* filter_bias,
+                          dl_matrix2d_t* gate_kernel, dl_matrix2d_t* gate_bias);
+
+
+void test_atrous_conv(int size, int rate, int in_channel, int out_channel);
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_convq8_queue.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_convq8_queue.h
new file mode 100644
index 00000000000..c5964195f81
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_convq8_queue.h
@@ -0,0 +1,251 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_CONVQ8_QUEUE_H
+#define DL_LIB_CONVQ8_QUEUE_H
+
+
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+#include "dl_lib_conv_queue.h"
+#include "dl_lib_convq_queue.h"
+
+//[nch, n, c]
+typedef struct {
+    int n;           /*< the length of queue */
+    int c;           /*< the number of queue element*/
+    int front;       /*< the front(top) position of queue */
+    int nch;         /*< the channel of queue */
+    int exponent;    /*< The values in items should be multiplied by pow(2,exponent) 
+                         to get the real values */
+    q8tp_t *itemq;    /*< Pointer to item array */
+} dl_convq8_queue_t;
+
+/**
+ * @brief Allocate a fixed-point convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq8_queue_t *dl_convq8_queue_alloc(int n, int c);
+
+/**
+ * @brief Allocate a fixed-point convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param c     The channel of queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq8_queue_t *dl_convq8_queue_alloc_mc(int n, int c, int nch);
+
+/**
+ * @brief Free a fixed-point convolution queue
+ *
+ * @param cq     The fixed-point convolution queue to free
+ */
+void dl_convq8_queue_free(dl_convq8_queue_t *cq);
+
+/**
+ * @brief Set itemq of convolution queue to 0
+ *
+ * @param cq     The fixed-point convolution queue to free
+ */
+void dl_convq8_queue_bzero(dl_convq8_queue_t *cqm);
+
+/**
+ * @brief  Insert the float-point element at the end of queue.
+ *         The precision of fixed-point numbers is described by the Qm.f notation,  
+ *
+ * @param cq     Input fixed-point convolution queue
+ * @param item   The float-point element
+ * @param m_bit  The number of integer bits including the sign bits
+ * @param f_bit  The number of fractional bits
+ */
+void dl_convq8_queue_push_by_qmf(dl_convq8_queue_t *cq, fptp_t* item, int m_bit, int f_bit);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+q8tp_t *dl_get_queue_itemq8(dl_convq8_queue_t *cq, int offset);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @param ch      Channel index of queue
+ * @return        Pointer of the element
+ */
+q8tp_t *dl_get_queue_itemq8_mc(dl_convq8_queue_t *cq, int offset, int ch);
+
+/**
+ * @brief Fast and quantised implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param kernel          Kernel matrix of filter
+ * @param bias            The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param out_exponent    Shift ratio used in dot operation between two 16-bit fixed point vector 
+ * @param offset          Offset used to calculate the beginning of input conv queue  
+ * @param prenum          The num to control the parameter size of preload operation  
+ * @return                The result of atrous convolution
+ */
+void dl_atrous_conv1dq8_steps(dl_convq8_queue_t *in, dl_convq8_queue_t *out, int rate, int size,
+                            dl_matrix2dq8_t* kernel, dl_matrix2dq8_t* bias, 
+                            int out_exponent, int offset, int prenum);
+
+/**
+ * @brief Fast implement of dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param offset          Offset used to calculate the beginning of input conv queue  
+ * @param prenum          The num to control the parameter size of preload operation  
+ * @return                The result of dilation layer
+ */
+void dl_dilation_layerq8_steps(dl_convq8_queue_t *in, dl_convq8_queue_t *out, int rate, int size,
+                                dl_matrix2dq8_t* filter_kernel, dl_matrix2dq8_t* filter_bias,
+                                dl_matrix2dq8_t* gate_kernel, dl_matrix2dq8_t* gate_bias,
+                                int offset, int prenum);
+
+
+
+
+dl_conv_queue_t *dl_convq8_queue_add(dl_convq8_queue_t *cq1, dl_convq8_queue_t *cq2);
+
+int8_t dl_sigmoid_lutq8(int in);
+/**
+ * @brief Allocate a 8-bit fixed-point Multi-Channel convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param nch　　The channel number
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq8_queue_t **dl_convq8_queue_mc_alloc(int n, int c, int nch);
+
+/**
+ * @brief Free a 8-bit fixed-point Multi-Channel convolution queue
+ *
+ * @param cqm     The fixed-point convolution queue to free
+ * @param nch     The channel number
+ */
+void dl_convq8_queue_mc_free(dl_convq8_queue_t **cqm, int nch);
+
+/**
+ * @brief Tanh activation function for 8-bit fixed-point Multi-Channel convolution queue input
+ *
+ * @param cqm     Input 8-bit fixed-point Multi-Channel convolution queue
+ * @param offset  Offset used to calculate the beginning of input conv queue 
+ * @param nch     The channel number
+ */
+void dl_tanh_convq8_mc(dl_convq8_queue_t **cqm, int offset, int nch);
+
+/**
+ * @brief Fast and quantised 16-bit implement for Multi-channel 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        Usually, this layer is used as first layer for 8-bit network.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          Input is a 16-bit queue point, Output is an 8-bit queue point.
+ *
+ * @param in              Input 16bit fixed-point convolution queue array
+ * @param out             Output 8bit fixed-point convolution queue array
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param kernel          The kernel matrix of filter
+ * @param bias            The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param out_exponent    Exponent of output
+ * @param offset          Offset used to calculate the beginning of input conv queue  
+ * @param prenum          The num to control the parameter size of preload operation            
+ */
+void dl_atrous_conv1dq8_16in_mc_steps(dl_convq_queue_t **in, dl_convq8_queue_t **out, int nch, int rate, int size,
+                                        dl_matrix2dq_t* kernel, dl_matrix2dq_t* bias, int out_exponent, int offset, int prenum);
+
+/**
+ * @brief Fast and quantised 8-bit implement for Multi-channel 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input 8bit fixed-point convolution queue array
+ * @param out             Output 8bit fixed-point convolution queue array
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param kernel          The kernel matrix of filter
+ * @param bias            The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param out_exponent    Exponent of output
+ * @param offset          Offset used to calculate the beginning of input conv queue 
+ * @param prenum          The num to control the parameter size of preload operation            
+ */
+void dl_atrous_conv1dq8_mc_steps(dl_convq8_queue_t **in, dl_convq8_queue_t **out,
+                                int nch, int rate, int size,
+                                dl_matrix2dq8_t* kernel, dl_matrix2dq8_t* bias, 
+                                int out_exponent, int offset, int prenum);
+
+/**
+ * @brief Fast implement of 8-bit dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input 8-bit fixed-point convolution queue
+ * @param out             Output 8-bit fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param offset          Offset used to calculate the beginning of input conv queue 
+ * @param prenum          The num to control the parameter size of preload operation
+ */
+void dl_dilation_layerq8_mc_steps(dl_convq8_queue_t **in, dl_convq8_queue_t **out, int nch, int rate, int size,
+                                    dl_matrix2dq8_t* filter_kernel, dl_matrix2dq8_t* filter_bias,
+                                    dl_matrix2dq8_t* gate_kernel, dl_matrix2dq8_t* gate_bias,
+                                    int offset, int prenum);    
+
+void dl_convq8_queue_mc_bzero(dl_convq8_queue_t **cqm, int nch);
+
+void print_convq8(dl_convq8_queue_t *cq, int offset);
+void print_convq(dl_convq_queue_t *cq, int offset);
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_convq_queue.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_convq_queue.h
new file mode 100644
index 00000000000..80693718f95
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_convq_queue.h
@@ -0,0 +1,375 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_CONVQ_QUEUE_H
+#define DL_LIB_CONVQ_QUEUE_H
+
+#include "dl_lib_matrixq.h"
+#include "dl_lib_conv_queue.h"
+#include "dl_lib.h"
+
+
+//fixed-point convolution FIFO queue. 
+//[nch, n, c]
+typedef struct {
+    int n;           /*< the length of queue */
+    int c;           /*< the number of queue element*/
+    int front;       /*< the front(top) position of queue */
+    int nch;         /*< the multiple of queue*/
+    int exponent;    /*< The values in items should be multiplied by pow(2,exponent) 
+                         to get the real values */
+    qtp_t *itemq;    /*< Pointer to item array */
+} dl_convq_queue_t;
+
+/**
+ * @brief Allocate a fixed-point convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc(int n, int c);
+
+/**
+ * @brief Allocate a fixed-point convolution queue from PSRAM
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc_from_psram(int n, int c);
+
+/**
+ * @brief Allocate a fixed-point multi-channel convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param nch   The channel of conv queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc_mc(int n, int c, int nch);
+
+/**
+ * @brief Allocate a fixed-point multi-channel convolution queue from PSRAM
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param nch   The channel of conv queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc_mc_from_psram(int n, int c, int nch);
+
+
+void dl_convq_to_matrix2dq(dl_convq_queue_t *cq, dl_matrix2dq_t* out, int row);
+
+/**
+ * @brief Free a fixed-point convolution queue
+ *
+ * @param cq     The fixed-point convolution queue to free
+ */
+void dl_convq_queue_free(dl_convq_queue_t *cq);
+
+/**
+ * @brief Set itemq of convolution queue to 0
+ *
+ * @param cq     The fixed-point convolution queue point
+ */
+void dl_convq_queue_bzero(dl_convq_queue_t *cq);
+
+/**
+ * @brief Move the front pointer of queue forward, 
+          the First(oldest) element become the last(newest) element, 
+ *
+ * @param cq    Input fixed-point convolution queue
+ * @return      Pointer of oldest element  
+ */
+inline qtp_t *dl_convq_queue_pop(dl_convq_queue_t *cq);
+inline qtp_t *dl_convq_queue_popn(dl_convq_queue_t *cq, int n);
+/**
+ * @brief  Remove the oldest element, then insert the input element at the end of queue
+ *
+ * @param cq     Input fixed-point convolution queue
+ * @param item   The new element
+ */
+void dl_convq_queue_push(dl_convq_queue_t *cq, dl_matrix2dq_t *a, int shift);
+
+/**
+ * @brief  Insert the float-point element at the end of queue.
+ *         The precision of fixed-point numbers is described by the Qm.f notation,  
+ *
+ * @param cq     Input fixed-point convolution queue
+ * @param item   The float-point element
+ * @param m_bit  The number of integer bits including the sign bits
+ * @param f_bit  The number of fractional bits
+ */
+void dl_convq_queue_push_by_qmf(dl_convq_queue_t *cq, fptp_t* item, int m_bit, int f_bit);
+
+void dl_convq16_queue_push_by_qmf(dl_convq_queue_t *cq, fptp_t* item, int m_bit, int f_bit);
+
+dl_conv_queue_t *dl_queue_from_convq(dl_convq_queue_t *cq1);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq        Input fixed-point convolution queue
+ * @param last_num  Offset from the front of the queue
+ * @return          Pointer of the element
+ */
+inline qtp_t *dl_get_queue_itemq(dl_convq_queue_t *cq, int last_num);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq        Input fixed-point convolution queue
+ * @param offset    Offset from the front of the queue
+ * @param ch        Channel index of convolution queue 
+ * @return          Pointer of the element
+ */
+qtp_t *dl_get_queue_itemq_mc(dl_convq_queue_t *cq, int offset, int ch);
+
+/**
+ * @brief   Does a tanh operation on the one of element in the convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, and does a 
+ *          tanh operation by this pointer, then return the pointer 
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+void dl_tanh_convq(dl_convq_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a tanh operation on the one of element in multi channel convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, and does a 
+ *          tanh operation by this pointer, then return the pointer 
+ *
+ * @param cq      Input fixed-point multi channnel convolution queue
+ * @param offset  Offset from the front of the queue
+ * @param nch     The channel number of cqm
+ * @return        Pointer of the element
+ */
+void dl_tanh_convq_mc(dl_convq_queue_t **cqm, int offset, int nch);
+
+/**
+ * @brief   Does a relu operation on the one of element in the convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, and does a 
+ *          relu operation by this pointer, then return the pointer 
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+void dl_relu_convq(dl_convq_queue_t *cq, fptp_t clip, int last_num);
+
+/**
+ * @brief   Does a softmax operation on the one of element in the convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, input data
+            stay as it is. Results are saved into the *out* array. 
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @param out     Old array to re-use. Passing NULL will allocate a new matrix.
+ * @return        softmax results
+ */
+fptp_t * dl_softmax_step_q(dl_convq_queue_t *cq, int offset, fptp_t *out);
+
+/**
+ * @brief Fast and quantised implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in       Input fixed-point convolution queue
+ * @param out      Output fixed-point convolution queue
+ * @param rate     A positive int, the stride with which we sample input value 
+ * @param size     A positive int, the size of 1D-filter
+ * @param kernel   The kernel matrix of filter
+ * @param bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param shift    Shift ratio used in dot operation between two 16-bit fixed point vector 
+ * @return         The result of atrous convolution
+ */
+qtp_t * dl_atrous_conv1dq(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                          dl_matrix2dq_t* kernel, dl_matrix2dq_t* bias, int shift, int prenum);
+
+/**
+ * @brief Fast implement of dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param filter_shift          Shift ratio used in filter operation between two 16-bit fixed point vector
+ * @param gate_shift            Shift ratio used in gate operation between two 16-bit fixed point vector
+ * @return                The result of dilation layer
+ */
+qtp_t *dl_dilation_layerq_steps(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+   dl_matrix2dq_t* filter_kernel, dl_matrix2dq_t* filter_bias,
+   dl_matrix2dq_t* gate_kernel, dl_matrix2dq_t* gate_bias,
+   int filter_shift, int gate_shift, int offset, int prenum);
+
+
+qtp_t *dl_dilation_layerq(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                          dl_matrix2dq_t* filter_kernel, dl_matrix2dq_t* filter_bias,
+                          dl_matrix2dq_t* gate_kernel, dl_matrix2dq_t* gate_bias,
+                          int filter_shift, int gate_shift, int prenum);
+
+qtp_t *dl_dilation_layerq16(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                             dl_matrix2dq_t* filter_kernel, dl_matrix2dq_t* filter_bias,
+                             dl_matrix2dq_t* gate_kernel, dl_matrix2dq_t* gate_bias, int prenum);
+
+
+qtp_t *dl_atrous_conv1dq_steps(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                                 dl_matrix2dq_t* kernel, dl_matrix2dq_t* bias, int shift, int offset, int prenum);
+
+/**
+ * @brief Add a pair of fixed-point convolution queue item-by-item, and return float-point convolution queue
+ *
+ * @param cq1      First fixed-point convolution queue
+ * @param cq2      Seconf fixed-point convolution queue
+ * @return         The result of float-point convolution queue
+ */
+dl_conv_queue_t *dl_convq_queue_add(dl_convq_queue_t *cq1, dl_convq_queue_t *cq2);
+
+/**
+ * @brief Fast implement of LSTM layer by dl_atrous_conv1dq function
+ *
+ * @Warning LSTM kernel is split into two part, the first part input is the last layer output, 
+ *           and kernel is parameter *in_weight*. The second part input is the last frame LSTM output,
+ *           the kernel is parameters *h_weight*.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param state_c         Internal state of the LSTM network
+ * @param state_h         Internal state (previous output values) of the LSTM network
+ * @param in_weight       the LSTM kernel needed by first part
+ * @param h_weight        the LSTM kernel needed by second part
+ * @param bias            The bias matrix of LSTM. Can be NULL if a bias of 0 is required.
+ * @in_shift              Shift ratio used in first part
+ * @h_shift               Shift ratio used in second part
+ * @return                The result of LSTM layer
+ */
+dl_matrix2dq_t *dl_convq_lstm_layer(const dl_convq_queue_t *in, dl_convq_queue_t *out, dl_matrix2dq_t *state_c,
+                                    dl_matrix2dq_t *state_h, const dl_matrix2dq_t *in_weight, const dl_matrix2dq_t *h_weight,
+                                    const dl_matrix2dq_t *bias, int in_shift, int h_shift, int prenum);
+dl_matrix2dq_t *dl_basic_lstm_layer1_q(const dl_convq_queue_t *in, dl_matrix2dq_t *state_c, dl_matrix2dq_t *state_h,
+                                       const dl_matrix2dq_t *weight, const dl_matrix2dq_t *bias, int step, int shift);
+
+dl_matrix2dq_t *dl_convq16_lstm_layer(const dl_convq_queue_t *in, dl_convq_queue_t *out, dl_matrix2dq_t *state_c,
+                                       dl_matrix2dq_t *state_h, const dl_matrix2dq_t *in_weight, const dl_matrix2dq_t *h_weight,
+                                       const dl_matrix2dq_t *bias, int prenum);
+
+/**
+ * @brief Allocate a fixed-point multi channel convolution queue 
+ *
+ * @param n     The length of queue
+ * @param c     The channel number of elements in the queue
+ * @param nch   the channel numbet of convolution queue 
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t **dl_convq_queue_mc_alloc(int n, int c, int nch);
+
+/**
+ * @brief Free a fixed-point multi channel convolution queue
+ *
+ * @param cqm     The fixed-point convolution queue to free
+ * @param nch     The channel number of cqm
+ */
+void dl_convq_queue_mc_free(dl_convq_queue_t **cqm, int nch);
+
+/**
+ * @brief Fast and quantised implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in       Input fixed-point convolution queue
+ * @param out      Output fixed-point convolution queue
+ * @param nch      The channel number of input 
+ * @param rate     A positive int, the stride with which we sample input value 
+ * @param size     A positive int, the size of 1D-filter
+ * @param kernel   The kernel matrix of filter
+ * @param bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param shift    Shift ratio used in dot operation between two 16-bit fixed point vector 
+ * @param offset   the offset to calculate input convq
+ * @param prenum   the preload size, 0: do not use preload function
+ * @return         The result of atrous convolution
+ */
+qtp_t *dl_atrous_conv1dq_mc_steps(  dl_convq_queue_t **in,
+                                    dl_convq_queue_t **out,
+									int nch,
+									int rate,
+									int size,
+                                    dl_matrix2dq_t* kernel,
+									dl_matrix2dq_t* bias,
+									int shift,
+									int offset,
+									int prenum);
+
+/**
+ * @brief Fast implement of dilation layer as follows for multi channel input
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param nch             The channel number of input 
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param filter_shift    Shift ratio used in filter operation between two 16-bit fixed point vector
+ * @param gate_shift      Shift ratio used in gate operation between two 16-bit fixed point vector
+ * @param offset          The offset to calculate input convq
+ * @param prenum          The preload size, 0: do not use preload function
+ * @return                The result of dilation layer
+ */
+qtp_t *dl_dilation_layerq_mc_steps( dl_convq_queue_t **in, 
+									dl_convq_queue_t **out,
+									int nch,
+									int rate,
+									int size,
+                                    dl_matrix2dq_t* filter_kernel,
+									dl_matrix2dq_t* filter_bias,
+                                    dl_matrix2dq_t* gate_kernel,
+									dl_matrix2dq_t* gate_bias,
+                                    int filter_shift,
+									int gate_shift,
+									int offset,
+									int prenum);
+
+void test_atrous_convq(int size, int rate, int in_channel, int out_channel);
+void test_lstm_convq(int size, int in_dim, int lstm_cell);
+void dl_nn_tanh_i162(dl_convq_queue_t **cqm, int offset, int nch);
+void dl_copy_queue_item_by_qmf(dl_convq_queue_t *cq, fptp_t* item, int m_bit, int f_bit, int offset, int ch);
+void dl_convq_queue_mc_bzero(dl_convq_queue_t **cqm, int nch);
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_matrix.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_matrix.h
new file mode 100644
index 00000000000..d046e2452f7
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_matrix.h
@@ -0,0 +1,252 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_MATRIX_H
+#define DL_LIB_MATRIX_H
+
+#ifdef ESP_PLATFORM
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "esp_system.h"
+#endif
+
+// #ifdef CONFIG_IDF_TARGET_ESP32S3
+// #include "dl_tie728_bzero.h"
+// #endif
+
+typedef float fptp_t;
+
+#if CONFIG_BT_SHARE_MEM_REUSE
+extern multi_heap_handle_t gst_heap;
+#endif
+
+//Flags for matrices
+#define DL_MF_FOREIGNDATA (1<<0)  /*< Matrix *item data actually points to another matrix and should not be freed */
+
+//'Normal' float matrix
+typedef struct {
+    int w;          /*< Width */
+    int h;          /*< Height */
+    int stride;     /*< Row stride, essentially how many items to skip to get to the same position in the next row */
+    int flags;      /*< Flags. OR of DL_MF_* values */
+    fptp_t *item;   /*< Pointer to item array */
+} dl_matrix2d_t;
+
+//Macro to quickly access the raw items in a matrix
+#define DL_ITM(m, x, y) m->item[(x)+(y)*m->stride]
+
+
+/**
+ * @brief Allocate a matrix
+ *
+ * @param w     Width of the matrix
+ * @param h     Height of the matrix
+ * @return The matrix, or NULL if out of memory
+ */
+dl_matrix2d_t *dl_matrix_alloc(int w, int h);
+
+
+/**
+ * @brief Free a matrix
+ * Frees the matrix structure and (if it doesn't have the DL_MF_FOREIGNDATA flag set) the m->items space as well.
+ *
+ * @param m     Matrix to free
+ */
+void dl_matrix_free(dl_matrix2d_t *m);
+
+/**
+ * @brief Zero out the matrix
+ * Sets all entries in the matrix to 0.
+ *
+ * @param m     Matrix to zero
+ */
+void dl_matrix_zero(dl_matrix2d_t *m);
+
+/**
+ * @brief Copy the matrix into psram
+ * Copy the matrix from flash or iram/psram into psram
+ *
+ * @param m     Matrix to zero
+ */
+dl_matrix2d_t *dl_matrix_copy_to_psram(const dl_matrix2d_t *m);
+
+/**
+ * @brief Generate a new matrix using a range of items from an existing matrix.
+ * When using this, the data of the new matrix is not allocated/copied but it re-uses a pointer
+ * to the existing data. Changing the data in the resulting matrix, as a result, will also change
+ * the data in the existing matrix that has been sliced.
+ *
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix (with foreign data) to re-use. Passing NULL will allocate a new matrix.
+ * @return The resulting slice matrix, or NULL if out of memory
+ */
+dl_matrix2d_t *dl_matrix_slice(const dl_matrix2d_t *src, int x, int y, int w, int h, dl_matrix2d_t *in);
+
+/**
+ * @brief select a range of items from an existing matrix and flatten them into one dimension.
+ *
+ * @Warning The results are flattened in row-major order.
+ *   
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix to re-use. Passing NULL will allocate a new matrix.
+ * @return  The resulting flatten matrix, or NULL if out of memory
+ */
+dl_matrix2d_t *dl_matrix_flatten(const dl_matrix2d_t *src, int x, int y, int w, int h, dl_matrix2d_t *in);
+
+/**
+ * @brief Generate a matrix from existing floating-point data
+ *
+ * @param w     Width of resulting matrix
+ * @param h     Height of resulting matrix
+ * @param data  Data to populate matrix with
+ * @return A newaly allocated matrix populated with the given input data, or NULL if out of memory.
+ */
+dl_matrix2d_t *dl_matrix_from_data(int w, int h, int stride, const void *data);
+
+
+/**
+ * @brief Multiply a pair of matrices item-by-item: res=a*b
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Multiplicated data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_mul(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Do a dotproduct of two matrices : res=a.b
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrix_dot(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Add a pair of matrices item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Added data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_add(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Divide a pair of matrices item-by-item: res=a/b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Divided data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_div(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *out);
+
+/**
+ * @brief Subtract a matrix from another, item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Subtracted data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_sub(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *out);
+
+/**
+ * @brief Add a constant to every item of the matrix
+ *
+ * @param subj  Matrix to add the constant to
+ * @param add   The constant
+ */
+void dl_matrix_add_const(dl_matrix2d_t *subj, const fptp_t add);
+
+
+/**
+ * @brief Concatenate the rows of two matrices into a new matrix
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @return A newly allocated array with as avlues a|b
+ */
+dl_matrix2d_t *dl_matrix_concat(const dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+dl_matrix2d_t *dl_matrix_concat_h( dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+/**
+ * @brief Print the contents of a matrix to stdout. Used for debugging.
+ *
+ * @param a     The matrix to print.
+ */
+void dl_printmatrix(const dl_matrix2d_t *a);
+
+/**
+ * @brief Return the average square error given a correct and a test matrix.
+ *
+ * ...Well, more or less. If anything, it gives an indication of the error between
+ * the two. Check the code for the exact implementation.
+ *
+ * @param a     First of the two matrices to compare
+ * @param b     Second of the two matrices to compare
+ * @return value indicating the relative difference between matrices
+ */
+float dl_matrix_get_avg_sq_err(const dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+
+
+/**
+ * @brief Check if two matrices have the same shape, that is, the same amount of rows and columns
+ *
+ * @param a     First of the two matrices to compare
+ * @param b     Second of the two matrices to compare
+ * @return true if the two matrices are shaped the same, false otherwise.
+ */
+int dl_matrix_same_shape(const dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+
+/**
+ * @brief Get a specific item from the matrix
+ *
+ * Please use these for external matrix access instead of DL_ITM
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @return Value in that position
+ */
+inline static fptp_t dl_matrix_get(const dl_matrix2d_t *m, const int x, const int y) { 
+    return DL_ITM(m, x, y);
+}
+
+/**
+ * @brief Set a specific item in the matrix to the given value
+ *
+ * Please use these for external matrix access instead of DL_ITM
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @param val   Value to write to that position
+ */
+inline static void dl_matrix_set(dl_matrix2d_t *m, const int x, const int y, fptp_t val) { 
+    DL_ITM(m, x, y)=val;
+}
+
+void matrix_get_range(const dl_matrix2d_t *m, fptp_t *rmin, fptp_t *rmax);
+
+#endif
+
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_matrixq.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_matrixq.h
new file mode 100644
index 00000000000..5f0474a08fd
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_matrixq.h
@@ -0,0 +1,378 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_MATRIXQ_H
+#define DL_LIB_MATRIXQ_H
+
+#include <stdint.h>
+#include "dl_lib_matrix.h"
+
+typedef int16_t qtp_t;
+
+//Quantized matrix. Uses fixed numbers and has the storage for the rows/columns inverted 
+//for easy use as a multiplicand without stressing out the flash cache too much.
+typedef struct {
+    int w;
+    int h;
+    int stride; //Normally equals h, not w!
+    int flags;
+    int exponent; //The values in items should be multiplied by pow(2,exponent) to get the real values.
+    qtp_t *itemq;
+} dl_matrix2dq_t;
+
+#define DL_QTP_SHIFT 15
+#define DL_QTP_RANGE ((1<<DL_QTP_SHIFT)-1)
+#define DL_ITMQ(m, x, y) m->itemq[(y)+(x)*m->stride]
+#define DL_QTP_EXP_NA 255 //non-applicable exponent because matrix is null
+
+#define DL_SHIFT_AUTO 32
+
+/**
+ * @info About quantized matrices and shift values
+ *
+ * Grab a coffee (or tea, or hot water)  and sit down when you read this for the first 
+ * time. Quantized matrices can speed up your operations, but come with some quirks, and
+ * it's good to understand how they work before using them.
+ *
+ * The data in the quantized matrix type is stored similarily to floating-point types:
+ * when storing a real value, the value is stored as a mantissa (base number) and an
+ * exponent. The 'real' value that can be re-derived from those two numbers is something
+ * similar to mantissa*2^exponent. Up to this point, there's not that much difference from 
+ * the standard floating point implementations like e.g. IEEE-754.
+ *
+ * The difference with respect to quantized matrices is that for a quantized matrix, it is 
+ * assumed all values stored have more-or-less the same order of magnitude. This allows the
+ * matrix to only store all the mantissas, while the exponents are shared; there is only one 
+ * exponent for the entire matrix. This makes it quicker to handle matrix operations - the
+ * logic to fix the exponents only needs to happen once, while the rest can be done in simple
+ * integer arithmetic. It also nets us some memory savings - while normally a floating point
+ * number is 32-bit, storing only 16-bit mantissas as the matrix items almost halves the 
+ * memory requirements.
+ *
+ * While most of the details of handling the intricacies of the quantized matrixes are done
+ * transparently by the code in dl_lib_matrixq.c, some implementation details leak out, 
+ * specifically in places where addition/subtraction/division happens.
+ *
+ * The problem is that the routines do not know what the size of the resulting operation is. For
+ * instance, when adding two matrices of numbers, the resulting numbers *could* be large enough
+ * to overflow the mantissa of the result if the exponent is the same. However, if by default we
+ * assume the mantissas needs to be scaled back, we may lose precision.
+ *
+ * In order to counter this, all operations that have this issue have a ``shift`` argument. If 
+ * the argument is zero, the routine will be conservative, that is, increase the exponent of 
+ * the result to such an extent it's mathematically impossible a value in the result will exceed
+ * the maximum value that can be stored. However, when this argument is larger than zero, the
+ * algorithm will hold back on this scaling by the indicated amount of bits, preserving precision
+ * but increasing the chance of some of the calculated values not fitting in the mantissa anymore.
+ * If this happens, the value will be clipped to the largest (or, for negative values, smallest)
+ * value possible. (Neural networks usually are okay with this happening for a limited amount
+ * of matrix indices).
+ *
+ * For deciding on these shift values, it is recommended to start with a shift value of one, then
+ * use dl_matrixq_check_sanity on the result. If this indicates clipping, lower the shift value. 
+ * If it indicates bits are under-used, increase it. Note that for adding and subtraction, only
+ * shift values of 0 or 1 make sense; these routines will error out if you try to do something
+ * else.
+ *
+ * For neural networks and other noise-tolerant applications, note that even when 
+ * dl_matrixq_check_sanity does not indicate any problems, twiddling with the shift value may lead
+ * to slightly improved precision. Feel free to experiment.
+ **/
+
+
+/**
+ * @brief Allocate a matrix
+ *
+ * @param w     Width of the matrix
+ * @param h     Height of the matrix
+ * @return The matrix, or NULL if out of memory
+ */
+dl_matrix2dq_t *dl_matrixq_alloc(int w, int h);
+dl_matrix2dq_t *dl_matrixq_alloc_psram(int w, int h);
+/**
+ * @brief Convert a floating-point matrix to a quantized matrix
+ *
+ * @param m     Floating-point matrix to convert
+ * @param out   Quantized matrix to re-use. If NULL, allocate a new one.
+ * @Return The quantized version of the floating-point matrix
+ */
+dl_matrix2dq_t *dl_matrixq_from_matrix2d(const dl_matrix2d_t *m, dl_matrix2dq_t *out);
+
+/**
+ * TODO: DESCRIBE THIS FUNCTION
+ */
+dl_matrix2dq_t *dl_matrixq_from_matrix2d_by_qmf(const dl_matrix2d_t *m, dl_matrix2dq_t *out, int m_bit, int f_bit);
+
+
+/**
+ * @brief Convert a quantized matrix to a floating-point one.
+ *
+ * @param m     Floating-point matrix to convert
+ * @param out   Quantized matrix to re-use. If NULL, allocate a new one.
+ * @Return The quantized version of the floating-point matrix
+ **/
+dl_matrix2d_t *dl_matrix2d_from_matrixq(const dl_matrix2dq_t *m, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Free a quantized matrix
+ * Frees the matrix structure and (if it doesn't have the DL_MF_FOREIGNDATA flag set) the m->items space as well.
+ *
+ * @param m     Matrix to free
+ */
+void dl_matrixq_free(dl_matrix2dq_t *m);
+
+/**
+ * @brief Zero out the matrix
+ * Sets all entries in the matrix to 0.
+ *
+ * @param m     Matrix to zero
+ */
+void dl_matrixq_zero(dl_matrix2dq_t *m);
+
+/**
+ * @brief Copy the matrix into psram
+ * Copy the matrix from flash or iram/psram into psram
+ *
+ * @param m     Matrix to copy
+ */
+dl_matrix2dq_t *dl_matrixq_copy_to_psram(const dl_matrix2dq_t *m);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices : res=a.b, Result is a fixed-point matrix.
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ * @param shift Shift ratio
+ */
+void dl_matrixq_dot(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices: res=a.b, Result is a floating-point matrix.
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrixq_dot_matrix_out(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices : res=a.b. This always uses the simple & stupid C algo for the dot product.
+ *
+ * Result is a fixed-point matrix. 
+ *
+ * Use this only if you expect something is wrong with the accelerated routines that dl_matrixq_dot calls; this function can be
+ * much slower than dl_matrixq_dot .
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ * @param shift Shift ratio
+ */
+void dl_matrixq_dot_c_impl(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices : res=a.b. This always uses the simple & stupid C algo for the dot product. 
+ *
+ * Result is a floating-point matrix. 
+ *
+ * Use this only if you expect something is wrong with the accelerated routines that dl_matrixq_dot_matrix_out calls; this function can be
+ * much slower than dl_matrixq_dot_matrix_out.
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrixq_dot_matrix_out_c_impl(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Do a dotproduct of a floating point and a quantized matrix. Result is a floating-point matrix.
+ *
+ * @param a     First multiplicand; float matrix
+ * @param b     Second multiplicand; quantized matrix
+ * @param res   Dotproduct data; float matrix. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrix_matrixq_dot(const dl_matrix2d_t *a, const dl_matrix2dq_t *b, dl_matrix2d_t *res);
+
+
+/**
+ * @brief Print the contents of a quantized matrix to stdout. Used for debugging.
+ *
+ * @param a     The matrix to print.
+ */
+void dl_printmatrixq(const dl_matrix2dq_t *a);
+
+
+/**
+ * @brief Add a pair of quantizedmatrices item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Added data. Can be equal to a or b to overwrite that.
+ * @param shift Shift value. Only 0 or 1 makes sense here. <ToDo: check>
+ */
+void dl_matrixq_add(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Generate a new matrix using a range of items from an existing matrix.
+ * When using this, the data of the new matrix is not allocated/copied but it re-uses a pointer
+ * to the existing data. Changing the data in the resulting matrix, as a result, will also change
+ * the data in the existing matrix that has been sliced.
+ *
+ * @Warning In contrast to the floating point equivalent of this function, the fixed-point version
+ * of this has the issue that as soon as the output exponent of one of the slices changes, the data
+ * in the sliced matrix gets corrupted (because the exponent of that matrix is still the same.) If you
+ * use this function, either treat the slices as read-only, or assume the sliced matrix contains
+ * garbage after modifying the data in one of the slices.
+ *
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix (with foreign data) to re-use. Passing NULL will allocate a new matrix.
+ * @return The resulting slice matrix, or NULL if out of memory
+ */
+dl_matrix2dq_t *dl_matrixq_slice(const dl_matrix2dq_t *src, int x, int y, int w, int h, dl_matrix2dq_t *in);
+
+/**
+ * @brief select a range of items from an existing matrix and flatten them into one dimension.
+ *
+ * @Warning The results are flattened in row-major order.
+ *   
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix to re-use. Passing NULL will allocate a new matrix.
+ * @return The resulting flatten matrix, or NULL if out of memory
+ */
+dl_matrix2dq_t *dl_matrixq_flatten(const dl_matrix2dq_t *src, int x, int y, int w, int h, dl_matrix2dq_t *in);
+
+/**
+ * @brief Subtract a quantized matrix from another, item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Subtracted data. Can be equal to a or b to overwrite that.
+ * @param shift Shift value. Only 0 or 1 makes sense here. <ToDo: check>
+ */
+void dl_matrixq_sub(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Multiply a pair of quantized matrices item-by-item: res=a*b
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Multiplicated data. Can be equal to a or b to overwrite that matrix.
+ */
+void dl_matrixq_mul( dl_matrix2dq_t *a,  dl_matrix2dq_t *b, dl_matrix2dq_t *res);
+
+/**
+ * @brief Divide a pair of quantized matrices item-by-item: res=a/b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Divided data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrixq_div(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *out, int shift);
+
+/**
+ * @brief Check if two quantized matrices have the same shape, that is, the same amount of 
+ * rows and columns
+ *
+ * @param a     First of the two matrices to compare
+ * @param b     Second of the two matrices to compare
+ * @return true if the two matrices are shaped the same, false otherwise.
+ */
+int dl_matrixq_same_shape(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b);
+
+/**
+ * @brief Concatenate the rows of two quantized matrices into a new matrix
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @return A newly allocated quantized matrix with as values a|b
+ */
+dl_matrix2dq_t *dl_matrixq_concat(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b);
+
+/**
+ * @brief Add a constant to every item of the quantized matrix
+ *
+ * @param subj  Matrix to add the constant to
+ * @param add   The constant
+ */
+void dl_matrixq_add_const(dl_matrix2dq_t *subj, const fptp_t add, int shift);
+
+/**
+ * @brief Check the sanity of a quantized matrix
+ *
+ * Due to the nature of quantized matrices, depending on the calculations a quantized
+ * matrix is the result of and the shift values chosen in those calculations, a quantized
+ * matrix may have an exponent and mantissas that lead to a loss of precision, either because
+ * most significant mantissa bits are unused, or because a fair amount of mantissas are 
+ * clipped. This function checks if this is the case and will report a message to stdout
+ * if significant loss of precision is detected.
+ *
+ * @param m     The quantized matrix to check
+ * @param name  A string to be displayed in the message if the sanity check fails
+ * @return True if matrix is sane, false otherwise
+ **/
+
+int dl_matrixq_check_sanity(dl_matrix2dq_t *m, const char *name);
+
+/**
+ * @brief re-adjust the exponent of the matrix to fit the mantissa better
+ *
+ * This function will shift up all the data in the mantissas so there are no
+ * most-significant bits that are unused in all mantissas. It will also adjust
+ * the exponent to keep the actua values in the matrix the same.
+ *
+ * Some operations done on a matrix, especially operations that re-use the
+ * result of earlier operations done in the same way, can lead to the loss of
+ * data because the exponent of the quantized matrix is never re-adjusted. You
+ * can do that implicitely by calling this function.
+ *
+ * @param m     The matrix to re-adjust
+**/
+void dl_matrixq_readjust_exp(dl_matrix2dq_t *m);
+
+
+
+/**
+ * @brief Get the floating-point value of a specific item from the quantized matrix
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @return Value in that position
+ */
+fptp_t dl_matrixq_get(const dl_matrix2dq_t *m, const int x, const int y);
+
+/**
+ * @brief Set a specific item in the quantized matrix to the given 
+ * floating-point value
+ *
+ * @warning If the given value is more than the exponent in the quantized matrix
+ * allows for, all mantissas in the matrix will be shifted down to make the value
+ * 'fit'. If, however, the exponent is such that the value would result in a
+ * quantized mantissa of 0, nothing is done.
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @param val   Value to write to that position
+ */
+void dl_matrixq_set(dl_matrix2dq_t *m, const int x, const int y, fptp_t val);
+
+#endif
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_matrixq8.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_matrixq8.h
new file mode 100644
index 00000000000..579b1c08aaf
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/dl_lib_matrixq8.h
@@ -0,0 +1,71 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_MATRIXQ8_H
+#define DL_LIB_MATRIXQ8_H
+
+#include <stdint.h>
+#include "dl_lib_matrix.h"
+#include "dl_lib.h"
+#include "dl_lib_matrixq.h"
+
+typedef int8_t q8tp_t;
+
+typedef struct {
+    int w;
+    int h;
+    int stride; //Normally equals h, not w!
+    int flags;
+    int exponent; //The values in items should be multiplied by pow(2,exponent) to get the real values.
+    q8tp_t *itemq;
+} dl_matrix2dq8_t;
+
+#define DL_Q8TP_SHIFT 7
+#define DL_Q8TP_RANGE ((1<<DL_Q8TP_SHIFT)-1)
+#define DL_ITMQ8(m, x, y) m->itemq[(y)+(x)*m->stride]
+
+/**
+ * @brief Allocate a matrix
+ *
+ * @param w     Width of the matrix
+ * @param h     Height of the matrix
+ * @return The matrix, or NULL if out of memory
+ */
+dl_matrix2dq8_t *dl_matrixq8_alloc(int w, int h);
+
+/**
+ * @brief Free a quantized matrix
+ * Frees the matrix structure and (if it doesn't have the DL_MF_FOREIGNDATA flag set) the m->items space as well.
+ *
+ * @param m     Matrix to free
+ */
+void dl_matrixq8_free(dl_matrix2dq8_t *m);
+
+/**
+ * @brief Copy a quantized matrix
+ * Copy a quantized matrix from flash or iram/psram
+ *
+ * @param m     Matrix to copy
+ */
+dl_matrix2dq8_t *dl_matrixq8_copy_to_psram(const dl_matrix2dq8_t *m);
+
+/**
+ * @brief Convert a floating-point matrix to a quantized matrix
+ *
+ * @param m     Floating-point matrix to convert
+ * @param out   Quantized matrix to re-use. If NULL, allocate a new one.
+ * @Return The quantized version of the floating-point matrix
+ */
+dl_matrix2dq8_t *dl_matrixq8_from_matrix2d(const dl_matrix2d_t *m, dl_matrix2dq8_t *out);
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_aec.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_aec.h
new file mode 100644
index 00000000000..03afc90ff04
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_aec.h
@@ -0,0 +1,112 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_AEC_H_
+#define _ESP_AEC_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define USE_AEC_FFT                      // Not kiss_fft
+#define AEC_USE_SPIRAM      0
+#define AEC_SAMPLE_RATE     16000        // Only Support 16000Hz
+#define AEC_FRAME_LENGTH_MS 16
+#define AEC_FILTER_LENGTH   1200         // Number of samples of echo to cancel
+
+typedef void* aec_handle_t;
+
+/**
+ * @brief Creates an instance to the AEC structure.
+ * 
+ * @deprecated This API will be deprecated after version 1.0, please use aec_pro_create
+ *
+ * @param sample_rate       The Sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_length      The length of the audio processing must be 16ms.
+ *
+ * @param filter_length     Number of samples of echo to cancel.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of AEC
+ */
+aec_handle_t aec_create(int sample_rate, int frame_length, int filter_length);
+
+/**
+ * @brief Creates an instance to the AEC structure.
+ * 
+ * @deprecated This API will be deprecated after version 1.0, please use aec_pro_create
+ *
+ * @param sample_rate       The Sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_length      The length of the audio processing must be 16ms.
+ *
+ * @param filter_length     Number of samples of echo to cancel.
+ * 
+ * @param nch               Number of input signal channel.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of AEC
+ */
+aec_handle_t aec_create_multimic(int sample_rate, int frame_length, int filter_length, int nch);
+
+/**
+ * @brief Creates an instance of more powerful AEC.
+ *
+ * @param frame_length      Length of input signal. Must be 16ms if mode is 0; otherwise could be 16ms or 32ms. Length of input signal to aec_process must be modified accordingly.
+ *
+ * @param nch               Number of microphones.
+ *
+ * @param mode              Mode of AEC (0 to 5), indicating aggressiveness and RAM allocation. 0: mild; 1 or 2: medium (1: internal RAM, 2: SPIRAM); 3 and 4: aggressive (3: internal RAM, 4: SPIRAM); 5: agressive, accelerated for ESP32-S3.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: An Instance of AEC
+ */
+aec_handle_t aec_pro_create(int frame_length, int nch, int mode);
+
+/**
+ * @brief Performs echo cancellation a frame, based on the audio sent to the speaker and frame from mic.
+ *
+ * @param inst        The instance of AEC.
+ *
+ * @param indata      An array of 16-bit signed audio samples from mic.
+ *
+ * @param refdata     An array of 16-bit signed audio samples sent to the speaker.
+ *
+ * @param outdata     Returns near-end signal with echo removed.
+ *
+ * @return None
+ *
+ */
+void aec_process(const aec_handle_t inst, int16_t *indata, int16_t *refdata, int16_t *outdata);
+
+/**
+ * @brief Free the AEC instance
+ *
+ * @param inst The instance of AEC.
+ *
+ * @return None
+ *
+ */
+void aec_destroy(aec_handle_t inst);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_AEC_H_
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_afe_sr_iface.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_afe_sr_iface.h
new file mode 100644
index 00000000000..73f60c3c11f
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_afe_sr_iface.h
@@ -0,0 +1,245 @@
+#pragma once
+#include "stdint.h"
+#include "esp_wn_iface.h"
+#include "esp_wn_models.h"
+
+//AFE: Audio Front-End 
+//SR:  Speech Recognition
+//afe_sr/AFE_SR: the audio front-end for speech recognition
+
+//Opaque AFE_SR data container
+typedef struct esp_afe_sr_data_t esp_afe_sr_data_t;
+
+//Set AFE_SR mode
+typedef enum {
+    SR_MODE_LOW_COST = 0,
+    SR_MODE_HIGH_PERF = 1
+} afe_sr_mode_t;
+
+// the output state of fetch function
+typedef enum {
+    AFE_FETCH_CHANNEL_VERIFIED = -2,  // wwe state: output channel is verified
+    AFE_FETCH_NOISE = -1,             // vad state: noise or silence
+    AFE_FETCH_SPEECH = 0,             // vad state: speech
+    AFE_FETCH_WWE_DETECTED = 1        // wwe state: wake word is detected
+} afe_fetch_mode_t;
+
+typedef enum {
+    AFE_PSRAM_LOW_COST = 1,
+    AFE_PSRAM_MEDIA_COST = 2,
+    AFE_PSRAM_HIGH_COST = 3
+} afe_use_psram_mode_t;
+
+typedef struct {
+    bool aec_init;
+    bool se_init;
+    bool vad_init;
+    bool wakenet_init;
+    int vad_mode;
+    const esp_wn_iface_t *wakenet_model;
+    const model_coeff_getter_t *wakenet_coeff;
+    det_mode_t wakenet_mode;
+    afe_sr_mode_t afe_mode;
+    int afe_perferred_core;
+    int afe_perferred_priority;
+    int afe_ringbuf_size;
+    int alloc_from_psram;
+    int agc_mode;
+} afe_config_t;
+
+
+#if CONFIG_IDF_TARGET_ESP32
+#define AFE_CONFIG_DEFAULT() { \
+    .aec_init = true, \
+    .se_init = true, \
+    .vad_init = true, \
+    .wakenet_init = true, \
+    .vad_mode = 3, \
+    .wakenet_model = &WAKENET_MODEL, \
+    .wakenet_coeff = &WAKENET_COEFF, \
+    .wakenet_mode = DET_MODE_90, \
+    .afe_mode = SR_MODE_HIGH_PERF, \
+    .afe_perferred_core = 0, \
+    .afe_perferred_priority = 5, \
+    .afe_ringbuf_size = 50, \
+    .alloc_from_psram = 1, \
+    .agc_mode = 2, \
+}
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define AFE_CONFIG_DEFAULT() { \
+    .aec_init = true, \
+    .se_init = true, \
+    .vad_init = true, \
+    .wakenet_init = true, \
+    .vad_mode = 3, \
+    .wakenet_model = &WAKENET_MODEL, \
+    .wakenet_coeff = &WAKENET_COEFF, \
+    .wakenet_mode = DET_MODE_2CH_90, \
+    .afe_mode = SR_MODE_LOW_COST, \
+    .afe_perferred_core = 0, \
+    .afe_perferred_priority = 5, \
+    .afe_ringbuf_size = 50, \
+    .alloc_from_psram = AFE_PSRAM_MEDIA_COST, \
+    .agc_mode = 2, \
+}
+#endif
+/**
+ * @brief Function to initialze a AFE_SR instance with a specified mode
+ * 
+ * @param mode              The mode of AFE_SR 
+ * @param perferred_core    The perferred core to be pinned. 
+ *                          If all task in AFE_SR can not run in real time by only one core, the another core would be used. 
+ * @returns Handle to the AFE_SR data
+ */
+typedef esp_afe_sr_data_t* (*esp_afe_sr_iface_op_create_t)(afe_sr_mode_t mode, int perferred_cor);
+
+/**
+ * @brief Function to initialze a AFE_SR instance
+ * 
+ * @param afe_config        The config of AFE_SR
+ * @returns Handle to the AFE_SR data
+ */
+typedef esp_afe_sr_data_t* (*esp_afe_sr_iface_op_create_from_config_t)(afe_config_t *afe_config);
+
+/**
+ * @brief Get the amount of each channel samples per frame that need to be passed to the function
+ *
+ * Every speech enhancement AFE_SR processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param afe The AFE_SR object to query
+ * @return The amount of samples to feed the fetch function
+ */
+typedef int (*esp_afe_sr_iface_op_get_samp_chunksize_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Get the channel number of samples that need to be passed to the fetch function
+ * 
+ * @param afe The AFE_SR object to query
+ * @return The amount of samples to feed the fetch function
+ */
+typedef int (*esp_afe_sr_iface_op_get_channel_num_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Get the sample rate of the samples to feed to the function
+ *
+ * @param afe The AFE_SR object to query
+ * @return The sample rate, in hz
+ */
+typedef int (*esp_afe_sr_iface_op_get_samp_rate_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Feed samples of an audio stream to the AFE_SR
+ *
+ * @Warning  The input data should be arranged in the format of [CH0_0, CH1_0, ..., CHN_0, CH0_1, CH1_1, ..., CHN_1, ...].
+ *           The last channel is reference signal or far-end signal.
+ *
+ * @param afe   The AFE_SR object to queryq
+ * 
+ * @param in    The input microphone signal, only support signed 16-bit @ 16 KHZ. The frame size can be queried by the 
+ *              `get_samp_chunksize`. The channel number can be queried `get_channel_num`.
+ * @return      The size of input
+ */
+typedef int (*esp_afe_sr_iface_op_feed_t)(esp_afe_sr_data_t *afe, const int16_t* in);
+
+/**
+ * @brief fetch enhanced samples of an audio stream from the AFE_SR
+ *
+ * @Warning  The output is single channel data, no matter how many channels the input is.
+ *
+ * @param afe   The AFE_SR object to query
+ * @param out   The output enhanced signal. The frame size can be queried by the `get_samp_chunksize`.
+ * @return      The state of output, please refer to the definition of `afe_fetch_mode_t`
+ */
+typedef afe_fetch_mode_t (*esp_afe_sr_iface_op_fetch_t)(esp_afe_sr_data_t *afe, int16_t* out);
+
+/**
+ * @brief Initial wakenet and wake words coefficient, or reset wakenet and wake words coefficient 
+ *        when wakenet has been initialized.  
+ *
+ * @param afe          The AFE_SR object to query
+ * @param wakenet      The pointer of wakenet
+ * @param model_coeff  The coefficient of wake word model
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_set_wakenet_t)(esp_afe_sr_data_t *afe,
+                                                  esp_wn_iface_t *wakenet, 
+                                                  const model_coeff_getter_t *model_coeff);
+
+/**
+ * @brief Disable wakenet model.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_disable_wakenet_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Enable wakenet model.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_enable_wakenet_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Disable AEC algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_disable_aec_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Enable AEC algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_enable_aec_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Disable SE algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_disable_se_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Enable SE algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_enable_se_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Destroy a AFE_SR instance
+ *
+ * @param afe         AFE_SR object to destroy
+ */
+typedef void (*esp_afe_sr_iface_op_destroy_t)(esp_afe_sr_data_t *afe);
+
+
+/**
+ * This structure contains the functions used to do operations on a AFE_SR.
+ */
+typedef struct {
+    esp_afe_sr_iface_op_create_t create;
+    esp_afe_sr_iface_op_create_from_config_t create_from_config;
+    esp_afe_sr_iface_op_feed_t feed;
+    esp_afe_sr_iface_op_fetch_t fetch;
+    esp_afe_sr_iface_op_get_samp_chunksize_t get_feed_chunksize;
+    esp_afe_sr_iface_op_get_samp_chunksize_t get_fetch_chunksize;
+    esp_afe_sr_iface_op_get_channel_num_t get_channel_num;
+    esp_afe_sr_iface_op_get_samp_rate_t get_samp_rate;
+    esp_afe_sr_iface_op_set_wakenet_t  set_wakenet; 
+    esp_afe_sr_iface_op_disable_wakenet_t disable_wakenet;
+    esp_afe_sr_iface_op_enable_wakenet_t enable_wakenet;
+    esp_afe_sr_iface_op_disable_aec_t disable_aec;
+    esp_afe_sr_iface_op_enable_aec_t enable_aec;
+    esp_afe_sr_iface_op_disable_se_t disable_se;
+    esp_afe_sr_iface_op_enable_se_t enable_se;
+    esp_afe_sr_iface_op_destroy_t destroy;
+} esp_afe_sr_iface_t;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_afe_sr_models.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_afe_sr_models.h
new file mode 100644
index 00000000000..5424134ab1e
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_afe_sr_models.h
@@ -0,0 +1,6 @@
+#pragma once
+#include "esp_afe_sr_iface.h"
+
+extern const esp_afe_sr_iface_t esp_afe_sr_2mic;
+extern const esp_afe_sr_iface_t esp_afe_sr_1mic;
+
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_agc.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_agc.h
new file mode 100644
index 00000000000..20b0e3f2259
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_agc.h
@@ -0,0 +1,39 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_AGC_H_
+#define _ESP_AGC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+////all positive value is valid, negective is error
+typedef enum {
+    ESP_AGC_SUCCESS = 0,   ////success
+    ESP_AGC_FAIL = -1, ////agc fail
+    ESP_AGC_SAMPLE_RATE_ERROR = -2,  ///sample rate can be only 8khz, 16khz, 32khz
+    ESP_AGC_FRAME_SIZE_ERROR = -3,   ////the input frame size should be only 10ms, so should together with sample-rate to get the frame size
+} ESP_AGE_ERR;
+
+
+void *esp_agc_open(int agc_mode, int sample_rate);
+void set_agc_config(void *agc_handle, int gain_dB, int limiter_enable, int target_level_dbfs);
+int esp_agc_process(void *agc_handle, short *in_pcm, short *out_pcm, int frame_size, int sample_rate);
+void esp_agc_close(void *agc_handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_AGC_H_
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_map.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_map.h
new file mode 100644
index 00000000000..794afdc54c8
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_map.h
@@ -0,0 +1,90 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_MAP_H_
+#define _ESP_MAP_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MAP_SAMPLE_RATE 16000        // Supports 16kHz only
+#define MAP_FRAME_SIZE 16            // Supports 16ms only
+#define MAP_MIC_DISTANCE 50          // According to physical design of mic-array
+#define MAP_AEC_ON true              
+#define MAP_AEC_OFF false            
+#define MAP_AEC_FILTER_LENGTH   1200 // Number of samples of echo to cancel
+
+/**
+ * @brief Sets mic-array type, currently 2-mic line array and 3-mic circular array 
+ * are supported.
+ */
+typedef enum {
+    TWO_MIC_LINE = 0,
+    THREE_MIC_CIRCLE = 1
+} map_mic_array_type_t;
+
+typedef void* mic_array_processor_t;
+
+/**
+ * @brief Creates an instance to the MAP structure.
+ *
+ * @param sample_rate       The sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_size        The length of the audio processing must be 16ms.
+ *
+ * @param array_type        '0' for 2-mic line array and '1' for 3-mic circular array.
+ *
+ * @param mic_distance      The distance between neiboring microphones in mm.
+ * 
+ * @param aec_on            Decides whether to turn on AEC.
+ *
+ * @param filter_length     Number of samples of echo to cancel, effective when AEC is on.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: An instance of MAP
+ */
+mic_array_processor_t map_create(int fs, int frame_size, int array_type, float mic_distance, bool aec_on, int filter_length);
+
+/**
+ * @brief Performs mic array processing for one frame.
+ *
+ * @param inst        The instance of MAP.
+ *
+ * @param in          An array of 16-bit signed audio samples from mic.
+ *
+ * @param far_end     An array of 16-bit signed audio samples sent to the speaker, can be none when AEC is turned off.
+ *
+ * @param dsp_out     Returns enhanced signal.
+ *
+ * @return None
+ *
+ */
+void map_process(mic_array_processor_t st, int16_t *in, int16_t *far_end, int16_t *dsp_out);
+
+/**
+ * @brief Free the MAP instance
+ *
+ * @param inst The instance of MAP.
+ *
+ * @return None
+ *
+ */
+void map_destory(mic_array_processor_t st);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_mase.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_mase.h
new file mode 100644
index 00000000000..3cf403f5646
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_mase.h
@@ -0,0 +1,94 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+
+#ifndef _ESP_MASE_H_
+#define _ESP_MASE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MASE_SAMPLE_RATE 16000        // Supports 16kHz only
+#define MASE_FRAME_SIZE 16            // Supports 16ms only
+#define MASE_MIC_DISTANCE 65          // According to physical design of mic-array
+
+/**
+ * @brief Sets mic-array type, currently 2-mic line array and 3-mic circular array 
+ * are supported.
+ */
+typedef enum {
+    TWO_MIC_LINE = 0,
+    THREE_MIC_CIRCLE = 1
+} mase_mic_array_type_t;
+
+/**
+ * @brief Sets operating mode, supporting normal mode and wake-up enhancement mode
+ */
+typedef enum {
+    NORMAL_ENHANCEMENT_MODE = 0,
+    WAKE_UP_ENHANCEMENT_MODE = 1
+} mase_op_mode_t;
+
+typedef void* mase_handle_t;
+
+/**
+ * @brief Creates an instance to the MASE structure.
+ *
+ * @param sample_rate       The sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_size        The length of the audio processing must be 16ms.
+ *
+ * @param array_type        '0' for 2-mic line array and '1' for 3-mic circular array.
+ *
+ * @param mic_distance      The distance between neiboring microphones in mm.
+ *
+ * @param operating_mode	'0' for normal mode and '1' for wake-up enhanced mode.
+ *
+ * @param filter_strength	Strengh of the mic-array speech enhancement, must be 0, 1, 2 or 3.
+ * 
+ * @return
+ *         - NULL: Create failed
+ *         - Others: An instance of MASE
+ */
+mase_handle_t mase_create(int fs, int frame_size, int array_type, float mic_distance, int operating_mode, int filter_strength);
+
+/**
+ * @brief Performs mic array processing for one frame.
+ *
+ * @param inst        The instance of MASE.
+ *
+ * @param in          An array of 16-bit signed audio samples from mic.
+ *
+ * @param dsp_out     Returns enhanced signal.
+ *
+ * @return None
+ *
+ */
+void mase_process(mase_handle_t st, int16_t *in, int16_t *dsp_out);
+
+/**
+ * @brief Free the MASE instance
+ *
+ * @param inst The instance of MASE.
+ *
+ * @return None
+ *
+ */
+void mase_destory(mase_handle_t st);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_mn_iface.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_mn_iface.h
new file mode 100644
index 00000000000..d4e5aa3f86c
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_mn_iface.h
@@ -0,0 +1,109 @@
+#pragma once
+#include "stdint.h"
+// #include "esp_err.h"
+#include "dl_lib_coefgetter_if.h"
+#include "esp_wn_iface.h"
+// //Opaque model data container
+// typedef struct model_iface_data_t model_iface_data_t;
+
+/**
+ * @brief Initialze a model instance with specified model coefficient.
+ *
+ * @param coeff       The wakenet model coefficient.
+ * @param coeff        The wakenet model coefficient.
+ * @parm sample_length Audio length for speech recognition, in ms.
+ * @returns Handle to the model data.
+ */
+typedef model_iface_data_t* (*esp_mn_iface_op_create_t)(const model_coeff_getter_t *coeff, int sample_length);
+
+
+/**
+ * @brief Callback function type to fetch the amount of samples that need to be passed to the detect function
+ *
+ * Every speech recognition model processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param model       The model object to query
+ * @return The amount of samples to feed the detect function
+ */
+typedef int (*esp_mn_iface_op_get_samp_chunksize_t)(model_iface_data_t *model);
+
+/**
+ * @brief Callback function type to fetch the number of frames recognized by the command word
+ *
+ * @param model       The model object to query
+ * @return The number of the frames recognized by the command word
+ */
+typedef int (*esp_mn_iface_op_get_samp_chunknum_t)(model_iface_data_t *model);
+
+/**
+ * @brief Set the detection threshold to manually abjust the probability 
+ *
+ * @param model The model object to query
+ * @param det_treshold The threshold to trigger speech commands, the range of det_threshold is 0.0~0.9999
+ */
+typedef int (*esp_mn_iface_op_set_det_threshold_t)(model_iface_data_t *model, float det_threshold);
+/**
+ * @brief Set the detection threshold to manually abjust the probability 
+ *
+ * @param model The model object to query
+ * @param phrase_id The ID of speech command phrase
+ * @param det_treshold The threshold to trigger speech command phrases
+ */
+typedef void (*esp_mn_iface_op_set_command_det_threshold_t)(model_iface_data_t *model, int phrase_id, float det_threshold);
+
+/**
+ * @brief Get the detection threshold by phrase ID 
+ *
+ * @param model The model object to query
+ * @param phrase_id The ID of speech command phrase
+ * 
+ * @return The threshold of speech command phrases
+ */
+typedef float (*esp_mn_iface_op_get_command_det_threshold_t)(model_iface_data_t *model, int phrase_id);
+
+/**
+ * @brief Get the sample rate of the samples to feed to the detect function
+ *
+ * @param model       The model object to query
+ * @return The sample rate, in hz
+ */
+typedef int (*esp_mn_iface_op_get_samp_rate_t)(model_iface_data_t *model);
+
+/**
+ * @brief Feed samples of an audio stream to the speech recognition model and detect if there is a speech command found.
+ *
+ * @param model       The model object to query.
+ * @param samples     An array of 16-bit signed audio samples. The array size used can be queried by the 
+ *                    get_samp_chunksize function.
+ * @return The command id, return 0 if no command word is detected,
+ */
+typedef int (*esp_mn_iface_op_detect_t)(model_iface_data_t *model, int16_t *samples);
+
+
+/**
+ * @brief Destroy a speech commands recognition model
+ *
+ * @param model       The Model object to destroy
+ */
+typedef void (*esp_mn_iface_op_destroy_t)(model_iface_data_t *model);
+
+/**
+ * @brief Reset the speech commands recognition model
+ *
+ */
+typedef void (*esp_mn_iface_op_reset_t)(model_iface_data_t *model_data, char *command_str, char *err_phrase_id);
+
+
+typedef struct {
+    esp_mn_iface_op_create_t create;
+    esp_mn_iface_op_get_samp_rate_t get_samp_rate;
+    esp_mn_iface_op_get_samp_chunksize_t get_samp_chunksize;
+    esp_mn_iface_op_get_samp_chunknum_t get_samp_chunknum;
+    esp_mn_iface_op_set_det_threshold_t set_det_threshold;
+    esp_mn_iface_op_set_command_det_threshold_t set_command_det_threshold;
+    esp_mn_iface_op_get_command_det_threshold_t get_command_det_threshold;
+    esp_mn_iface_op_detect_t detect; 
+    esp_mn_iface_op_destroy_t destroy;
+    esp_mn_iface_op_reset_t reset;
+} esp_mn_iface_t;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_mn_models.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_mn_models.h
new file mode 100644
index 00000000000..5b186541f5b
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_mn_models.h
@@ -0,0 +1,77 @@
+#pragma once
+#include "esp_mn_iface.h"
+
+//Contains declarations of all available speech recognion models. Pair this up with the right coefficients and you have a model that can recognize
+//a specific phrase or word.
+extern const esp_mn_iface_t esp_sr_multinet1_single_quantized_en;
+extern const esp_mn_iface_t esp_sr_multinet3_single_quantized_en;
+extern const esp_mn_iface_t esp_sr_multinet2_single_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet3_single_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet4_single_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet3_continuous_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet5_quantized;
+extern const esp_mn_iface_t esp_sr_multinet5_quantized8;
+
+/*
+ Configure wake word to use based on what's selected in menuconfig.
+*/
+#if defined CONFIG_USE_MULTINET
+#ifdef CONFIG_SR_MN_EN_MULTINET1_SINGLE_RECOGNITION
+#include "multinet1_en.h"
+#define MULTINET_MODEL esp_sr_multinet1_single_quantized_en
+#define MULTINET_COEFF get_coeff_multinet1_en
+#elif CONFIG_SR_MN_EN_MULTINET3_SINGLE_RECOGNITION
+#include "multinet3_en.h"
+#define MULTINET_MODEL esp_sr_multinet3_single_quantized_en
+#define MULTINET_COEFF get_coeff_multinet3_en
+#elif CONFIG_SR_MN_CN_MULTINET2_SINGLE_RECOGNITION
+#include "multinet2_ch.h"
+#define MULTINET_MODEL esp_sr_multinet2_single_quantized_cn
+#define MULTINET_COEFF get_coeff_multinet2_ch
+#elif CONFIG_SR_MN_CN_MULTINET2_CONTINUOUS_RECOGNITION
+
+#elif CONFIG_SR_MN_CN_MULTINET3_SINGLE_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet3_single_quantized_cn
+#define MULTINET_COEFF "mn3cn"
+#elif CONFIG_SR_MN_CN_MULTINET4_SINGLE_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet4_single_quantized_cn
+#define MULTINET_COEFF "mn4cn"
+#elif CONFIG_SR_MN_CN_MULTINET3_CONTINUOUS_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet3_continuous_quantized_cn
+#define MULTINET_COEFF "mn3cn"
+#elif CONFIG_SR_MN_EN_MULTINET5_SINGLE_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet5_quantized
+#define MULTINET_COEFF "mn5en"
+#elif CONFIG_SR_MN_EN_MULTINET5_SINGLE_RECOGNITION_QUANT8
+#define MULTINET_MODEL esp_sr_multinet5_quantized8
+#define MULTINET_COEFF "mn5q8en"
+#else
+#error No valid wake word selected.
+#endif
+#else
+#define MULTINET_MODEL "NULL"
+#define MULTINET_COEFF "NULL"
+#endif
+/* example
+
+static const esp_mn_iface_t *multinet = &MULTINET_MODEL;
+
+//Initialize MultiNet model data
+model_iface_data_t *model_data = multinet->create(&MULTINET_COEFF);
+add_speech_commands(multinet, model_data);
+
+//Set parameters of buffer
+int audio_chunksize=model->get_samp_chunksize(model_data);
+int frequency = model->get_samp_rate(model_data);
+int16_t *buffer=malloc(audio_chunksize*sizeof(int16_t));
+
+//Detect
+int r=model->detect(model_data, buffer);
+if (r>0) {
+    printf("Detection triggered output %d.\n",  r);
+}
+
+//Destroy model
+model->destroy(model_data)
+
+*/
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_ns.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_ns.h
new file mode 100644
index 00000000000..1932600b72f
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_ns.h
@@ -0,0 +1,85 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_NS_H_
+#define _ESP_NS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define NS_USE_SPIARM       0
+#define NS_FRAME_LENGTH_MS     10          //Supports 10ms, 20ms, 30ms
+
+/**
+* The Sampling frequency (Hz) must be 16000Hz
+*/
+
+typedef void* ns_handle_t;
+
+/**
+ * @brief Creates an instance to the NS structure.
+ *
+ * @param frame_length   The length of the audio processing can be 10ms, 20ms, 30ms.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of NS
+ */
+ns_handle_t ns_create(int frame_length);
+
+/**
+ * @brief Creates an instance of the more powerful noise suppression algorithm.
+ * 
+ * @warning frame_length only supports be 10 ms.
+ *
+ * @param frame_length    The length of the audio processing can only be 10ms.
+ * @param mode            0: Mild, 1: Medium, 2: Aggressive  
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of NS
+ */
+ns_handle_t ns_pro_create(int frame_length, int mode);
+
+/**
+ * @brief Feed samples of an audio stream to the NS and get the audio stream after Noise suppression.
+ *
+ * @param inst        The instance of NS.
+ *
+ * @param indata      An array of 16-bit signed audio samples.
+ *
+ * @param outdata     An array of 16-bit signed audio samples after noise suppression.
+ *
+ * @return None
+ *
+ */
+void ns_process(ns_handle_t inst, int16_t *indata, int16_t *outdata);
+
+/**
+ * @brief Free the NS instance
+ *
+ * @param inst The instance of NS.
+ *
+ * @return None
+ *
+ */
+void ns_destroy(ns_handle_t inst);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_NS_H_
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_vad.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_vad.h
new file mode 100644
index 00000000000..e1a76cf4072
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_vad.h
@@ -0,0 +1,104 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_VAD_H_
+#define _ESP_VAD_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SAMPLE_RATE_HZ 16000      //Supports 32000, 16000, 8000
+#define VAD_FRAME_LENGTH_MS 30    //Supports 10ms, 20ms, 30ms
+
+/**
+ * @brief Sets the VAD operating mode. A more aggressive (higher mode) VAD is more
+ * restrictive in reporting speech.
+ */
+typedef enum {
+    VAD_MODE_0 = 0,
+    VAD_MODE_1,
+    VAD_MODE_2,
+    VAD_MODE_3,
+    VAD_MODE_4
+} vad_mode_t;
+
+typedef enum {
+    VAD_SILENCE = 0,
+    VAD_SPEECH
+} vad_state_t;
+
+typedef void* vad_handle_t;
+
+/**
+ * @brief Creates an instance to the VAD structure.
+ *
+ * @param vad_mode          Sets the VAD operating mode.
+ *
+ * @param sample_rate_hz    The Sampling frequency (Hz) can be 32000, 16000, 8000, default: 16000.
+ *
+ * @param one_frame_ms      The length of the audio processing can be 10ms, 20ms, 30ms, default: 30.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of VAD
+ */
+vad_handle_t vad_create(vad_mode_t vad_mode, int sample_rate_hz, int one_frame_ms);
+
+/**
+ * @brief Feed samples of an audio stream to the VAD and check if there is someone speaking.
+ *
+ * @param inst      The instance of VAD.
+ *
+ * @param data      An array of 16-bit signed audio samples.
+ *
+ * @return
+ *         - VAD_SILENCE if no voice
+ *         - VAD_SPEECH  if voice is detected
+ *
+ */
+vad_state_t vad_process(vad_handle_t inst, int16_t *data);
+
+/**
+ * @brief Free the VAD instance
+ *
+ * @param inst The instance of VAD.
+ *
+ * @return None
+ *
+ */
+void vad_destroy(vad_handle_t inst);
+
+/*
+* Programming Guide:
+*
+* @code{c}
+* vad_handle_t vad_inst = vad_create(VAD_MODE_3, SAMPLE_RATE_HZ, VAD_FRAME_LENGTH_MS);     // Creates an instance to the VAD structure.
+*
+* while (1) {
+*    //Use buffer to receive the audio data from MIC.
+*    vad_state_t vad_state = vad_process(vad_inst, buffer);      // Feed samples to the VAD process and get the result.
+* }
+*
+* vad_destroy(vad_inst);   // Free the VAD instance at the end of whole VAD process
+*
+* @endcode
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_VAD_H_
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_wn_iface.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_wn_iface.h
new file mode 100644
index 00000000000..6843af19d5d
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_wn_iface.h
@@ -0,0 +1,164 @@
+#pragma once
+#include "stdint.h"
+#include "dl_lib_coefgetter_if.h"
+
+//Opaque model data container
+typedef struct model_iface_data_t model_iface_data_t;
+
+//Set wake words recognition operating mode
+//The probability of being wake words is increased with increasing mode, 
+//As a consequence also the false alarm rate goes up
+typedef enum {
+	DET_MODE_90 = 0,       // Normal
+	DET_MODE_95 = 1,       // Aggressive
+    DET_MODE_2CH_90 = 2,
+    DET_MODE_2CH_95 = 3,
+    DET_MODE_3CH_90 = 4,
+    DET_MODE_3CH_95 = 5,
+} det_mode_t;
+
+typedef struct {
+    int wake_word_num;     //The number of all wake words
+    char **wake_word_list; //The name list of wake words  
+} wake_word_info_t;
+
+/**
+ * @brief Easy function type to initialze a model instance with a detection mode and specified wake word coefficient
+ *
+ * @param det_mode    The wake words detection mode to trigger wake words, DET_MODE_90 or DET_MODE_95
+ * @param model_coeff The specified wake word model coefficient
+ * @returns Handle to the model data
+ */
+typedef model_iface_data_t* (*esp_wn_iface_op_create_t)(const model_coeff_getter_t *model_coeff, det_mode_t det_mode);
+
+/**
+ * @brief Callback function type to fetch the amount of samples that need to be passed to the detect function
+ *
+ * Every speech recognition model processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param model The model object to query
+ * @return The amount of samples to feed the detect function
+ */
+typedef int (*esp_wn_iface_op_get_samp_chunksize_t)(model_iface_data_t *model);
+
+/**
+ * @brief Callback function type to fetch the channel number of samples that need to be passed to the detect function
+ *
+ * Every speech recognition model processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param model The model object to query
+ * @return The amount of samples to feed the detect function
+ */
+typedef int (*esp_wn_iface_op_get_channel_num_t)(model_iface_data_t *model);
+
+
+/**
+ * @brief Get the sample rate of the samples to feed to the detect function
+ *
+ * @param model The model object to query
+ * @return The sample rate, in hz
+ */
+typedef int (*esp_wn_iface_op_get_samp_rate_t)(model_iface_data_t *model);
+
+/**
+ * @brief Get the number of wake words
+ *
+ * @param model The model object to query
+ * @returns the number of wake words
+ */
+typedef int (*esp_wn_iface_op_get_word_num_t)(model_iface_data_t *model);
+
+/**
+ * @brief Get the name of wake word by index
+ *
+ * @Warning The index of wake word start with 1
+
+ * @param model The model object to query
+ * @param word_index The index of wake word
+ * @returns the detection threshold
+ */
+typedef char* (*esp_wn_iface_op_get_word_name_t)(model_iface_data_t *model, int word_index);
+
+/**
+ * @brief Set the detection threshold to manually abjust the probability 
+ *
+ * @param model The model object to query
+ * @param det_treshold The threshold to trigger wake words, the range of det_threshold is 0.5~0.9999
+ * @param word_index The index of wake word
+ * @return 0: setting failed, 1: setting success
+ */
+typedef int (*esp_wn_iface_op_set_det_threshold_t)(model_iface_data_t *model, float det_threshold, int word_index);
+
+/**
+ * @brief Get the wake word detection threshold of different modes
+ *
+ * @param model The model object to query
+ * @param word_index The index of wake word
+ * @returns the detection threshold
+ */
+typedef float (*esp_wn_iface_op_get_det_threshold_t)(model_iface_data_t *model, int word_index);
+
+/**
+ * @brief Feed samples of an audio stream to the keyword detection model and detect if there is a keyword found.
+ *
+ * @Warning The index of wake word start with 1, 0 means no wake words is detected.
+ *
+ * @param model The model object to query
+ * @param samples An array of 16-bit signed audio samples. The array size used can be queried by the 
+ *        get_samp_chunksize function.
+ * @return The index of wake words, return 0 if no wake word is detected, else the index of the wake words.
+ */
+typedef int (*esp_wn_iface_op_detect_t)(model_iface_data_t *model, int16_t *samples);
+
+/**
+ * @brief Get the volume gain
+ *
+ * @param model The model object to query
+ * @param target_db  The target dB to calculate volume gain
+ * @returns the volume gain
+ */
+typedef float (*esp_wn_iface_op_get_vol_gain_t)(model_iface_data_t *model, float target_db);
+
+/**
+ * @brief Get the triggered channel index. Channel index starts from zero
+ *
+ * @param model The model object to query
+ * @return The channel index
+ */
+typedef int (*esp_wn_iface_op_get_triggered_channel_t)(model_iface_data_t *model);
+
+/**
+ * @brief Clean all states of model
+ *
+ * @param model The model object to query
+ */
+typedef void (*esp_wn_iface_op_clean_t)(model_iface_data_t *model);
+
+/**
+ * @brief Destroy a speech recognition model
+ *
+ * @param model Model object to destroy
+ */
+typedef void (*esp_wn_iface_op_destroy_t)(model_iface_data_t *model);
+
+
+/**
+ * This structure contains the functions used to do operations on a wake word detection model.
+ */
+typedef struct {
+    esp_wn_iface_op_create_t create;
+    esp_wn_iface_op_get_samp_chunksize_t get_samp_chunksize;
+    esp_wn_iface_op_get_channel_num_t get_channel_num;
+    esp_wn_iface_op_get_samp_rate_t get_samp_rate;
+    esp_wn_iface_op_get_word_num_t get_word_num;
+    esp_wn_iface_op_get_word_name_t get_word_name;
+    esp_wn_iface_op_set_det_threshold_t set_det_threshold;
+    esp_wn_iface_op_get_det_threshold_t get_det_threshold;
+    esp_wn_iface_op_get_triggered_channel_t  get_triggered_channel;
+    esp_wn_iface_op_get_vol_gain_t get_vol_gain;
+    esp_wn_iface_op_detect_t detect;
+    esp_wn_iface_op_clean_t clean;
+    esp_wn_iface_op_destroy_t destroy;
+} esp_wn_iface_t;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_wn_models.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_wn_models.h
new file mode 100644
index 00000000000..225456fc728
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/esp_wn_models.h
@@ -0,0 +1,127 @@
+#pragma once
+#include "esp_wn_iface.h"
+
+//Contains declarations of all available speech recognion models. Pair this up with the right coefficients and you have a model that can recognize
+//a specific phrase or word.
+
+extern const esp_wn_iface_t esp_sr_wakenet5_quantized;
+extern const esp_wn_iface_t esp_sr_wakenet7_quantized;
+extern const esp_wn_iface_t esp_sr_wakenet7_quantized8;
+extern const esp_wn_iface_t esp_sr_wakenet8_quantized;
+extern const esp_wn_iface_t esp_sr_wakenet8_quantized8;
+/*
+ Configure network to use based on what's selected in menuconfig.
+*/
+#if defined CONFIG_USE_WAKENET
+#if CONFIG_SR_WN_MODEL_WN5_QUANT
+#define WAKENET_MODEL esp_sr_wakenet5_quantized
+#elif CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_MODEL esp_sr_wakenet7_quantized
+#elif CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_MODEL esp_sr_wakenet7_quantized8
+#elif CONFIG_SR_WN_MODEL_WN8_QUANT
+#define WAKENET_MODEL esp_sr_wakenet8_quantized
+#elif CONFIG_SR_WN_MODEL_WN8_QUANT8
+#define WAKENET_MODEL esp_sr_wakenet8_quantized8
+#else
+#error No valid neural network model selected.
+#endif
+
+/*
+ Configure wake word to use based on what's selected in menuconfig.
+*/
+#if CONFIG_SR_WN_WN5_HILEXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hilexin_wn5.h"
+#define WAKENET_COEFF get_coeff_hilexin_wn5
+
+#elif CONFIG_SR_WN_WN5X2_HILEXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hilexin_wn5X2.h"
+#define WAKENET_COEFF get_coeff_hilexin_wn5X2
+
+#elif CONFIG_SR_WN_WN5X3_HILEXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hilexin_wn5X3.h"
+#define WAKENET_COEFF get_coeff_hilexin_wn5X3
+
+#elif CONFIG_SR_WN_WN5_NIHAOXIAOZHI & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaozhi_wn5.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaozhi_wn5
+
+#elif CONFIG_SR_WN_WN5X2_NIHAOXIAOZHI & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaozhi_wn5X2.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaozhi_wn5X2
+
+#elif CONFIG_SR_WN_WN5X3_NIHAOXIAOZHI & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaozhi_wn5X3.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaozhi_wn5X3
+
+#elif CONFIG_SR_WN_WN5X3_NIHAOXIAOXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaoxin_wn5X3.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaoxin_wn5X3
+
+#elif CONFIG_SR_WN_WN5X3_HIJESON & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hijeson_wn5X3.h"
+#define WAKENET_COEFF get_coeff_hijeson_wn5X3
+
+#elif CONFIG_SR_WN_WN5_CUSTOMIZED_WORD
+#include "customized_word_wn5.h"
+#define WAKENET_COEFF get_coeff_customized_word_wn5
+
+#elif CONFIG_SR_WN_WN7_CUSTOMIZED_WORD
+#define WAKENET_COEFF "custom7"
+
+#elif CONFIG_SR_WN_WN7_XIAOAITONGXUE & CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_COEFF "xiaoaitongxue7"
+
+#elif CONFIG_SR_WN_WN7_XIAOAITONGXUE & CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_COEFF "xiaoaitongxue7q8"
+
+#elif CONFIG_SR_WN_WN7_HILEXIN & CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_COEFF "hilexin7"
+
+#elif CONFIG_SR_WN_WN7_HILEXIN & CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_COEFF "hilexin7q8"
+
+#elif CONFIG_SR_WN_WN7_ALEXA & CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_COEFF "alexa7"
+
+#elif CONFIG_SR_WN_WN8_ALEXA & CONFIG_SR_WN_MODEL_WN8_QUANT
+#define WAKENET_COEFF "alexa8"
+
+#elif CONFIG_SR_WN_WN7_ALEXA & CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_COEFF "alexa7q8"
+
+#elif CONFIG_SR_WN_WN8_HIESP & CONFIG_SR_WN_MODEL_WN8_QUANT
+#define WAKENET_COEFF "hiesp8"
+
+#elif CONFIG_SR_WN_WN8_HIESP & CONFIG_SR_WN_MODEL_WN8_QUANT8
+#define WAKENET_COEFF "hiesp8q8"
+
+#else
+#error No valid wake word selected.
+#endif
+#else
+#define WAKENET_MODEL "NULL"
+#define WAKENET_COEFF "NULL"
+#endif
+/* example
+
+static const sr_model_iface_t *model = &WAKENET_MODEL;
+
+//Initialize wakeNet model data
+static model_iface_data_t *model_data=model->create(DET_MODE_90);
+
+//Set parameters of buffer
+int audio_chunksize=model->get_samp_chunksize(model_data);
+int frequency = model->get_samp_rate(model_data);
+int16_t *buffer=malloc(audio_chunksize*sizeof(int16_t));
+
+//Detect
+int r=model->detect(model_data, buffer);
+if (r>0) {
+    printf("Detection triggered output %d.\n",  r);
+}
+
+//Destroy model
+model->destroy(model_data)
+
+*/
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/hijeson_wn5X3.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/hijeson_wn5X3.h
new file mode 100644
index 00000000000..c2e343880ed
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/hijeson_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hijeson_wn5X3;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/hilexin_wn5.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/hilexin_wn5.h
new file mode 100644
index 00000000000..d922a6aaed4
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/hilexin_wn5.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hilexin_wn5;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/hilexin_wn5X2.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/hilexin_wn5X2.h
new file mode 100644
index 00000000000..5ca6bbca5ba
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/hilexin_wn5X2.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hilexin_wn5X2;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/hilexin_wn5X3.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/hilexin_wn5X3.h
new file mode 100644
index 00000000000..c78a64d2b77
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/hilexin_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hilexin_wn5X3;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/mn_process_commands.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/mn_process_commands.h
new file mode 100644
index 00000000000..692137a3b78
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/mn_process_commands.h
@@ -0,0 +1,408 @@
+#pragma once
+#include "esp_mn_iface.h"
+#define SPEECH_COMMANDS_NUM 99
+#if CONFIG_SR_MN_CHINESE
+#define MN_SPEECH_COMMAND_ID0   CONFIG_CN_SPEECH_COMMAND_ID0
+#define MN_SPEECH_COMMAND_ID1   CONFIG_CN_SPEECH_COMMAND_ID1
+#define MN_SPEECH_COMMAND_ID2   CONFIG_CN_SPEECH_COMMAND_ID2
+#define MN_SPEECH_COMMAND_ID3   CONFIG_CN_SPEECH_COMMAND_ID3
+#define MN_SPEECH_COMMAND_ID4   CONFIG_CN_SPEECH_COMMAND_ID4
+#define MN_SPEECH_COMMAND_ID5   CONFIG_CN_SPEECH_COMMAND_ID5
+#define MN_SPEECH_COMMAND_ID6   CONFIG_CN_SPEECH_COMMAND_ID6
+#define MN_SPEECH_COMMAND_ID7   CONFIG_CN_SPEECH_COMMAND_ID7
+#define MN_SPEECH_COMMAND_ID8   CONFIG_CN_SPEECH_COMMAND_ID8
+#define MN_SPEECH_COMMAND_ID9   CONFIG_CN_SPEECH_COMMAND_ID9
+#define MN_SPEECH_COMMAND_ID10   CONFIG_CN_SPEECH_COMMAND_ID10
+#define MN_SPEECH_COMMAND_ID11   CONFIG_CN_SPEECH_COMMAND_ID11
+#define MN_SPEECH_COMMAND_ID12   CONFIG_CN_SPEECH_COMMAND_ID12
+#define MN_SPEECH_COMMAND_ID13   CONFIG_CN_SPEECH_COMMAND_ID13
+#define MN_SPEECH_COMMAND_ID14   CONFIG_CN_SPEECH_COMMAND_ID14
+#define MN_SPEECH_COMMAND_ID15   CONFIG_CN_SPEECH_COMMAND_ID15
+#define MN_SPEECH_COMMAND_ID16   CONFIG_CN_SPEECH_COMMAND_ID16
+#define MN_SPEECH_COMMAND_ID17   CONFIG_CN_SPEECH_COMMAND_ID17
+#define MN_SPEECH_COMMAND_ID18   CONFIG_CN_SPEECH_COMMAND_ID18
+#define MN_SPEECH_COMMAND_ID19   CONFIG_CN_SPEECH_COMMAND_ID19
+#define MN_SPEECH_COMMAND_ID20   CONFIG_CN_SPEECH_COMMAND_ID20
+#define MN_SPEECH_COMMAND_ID21   CONFIG_CN_SPEECH_COMMAND_ID21
+#define MN_SPEECH_COMMAND_ID22   CONFIG_CN_SPEECH_COMMAND_ID22
+#define MN_SPEECH_COMMAND_ID23   CONFIG_CN_SPEECH_COMMAND_ID23
+#define MN_SPEECH_COMMAND_ID24   CONFIG_CN_SPEECH_COMMAND_ID24
+#define MN_SPEECH_COMMAND_ID25   CONFIG_CN_SPEECH_COMMAND_ID25
+#define MN_SPEECH_COMMAND_ID26   CONFIG_CN_SPEECH_COMMAND_ID26
+#define MN_SPEECH_COMMAND_ID27   CONFIG_CN_SPEECH_COMMAND_ID27
+#define MN_SPEECH_COMMAND_ID28   CONFIG_CN_SPEECH_COMMAND_ID28
+#define MN_SPEECH_COMMAND_ID29   CONFIG_CN_SPEECH_COMMAND_ID29
+#define MN_SPEECH_COMMAND_ID30   CONFIG_CN_SPEECH_COMMAND_ID30
+#define MN_SPEECH_COMMAND_ID31   CONFIG_CN_SPEECH_COMMAND_ID31
+#define MN_SPEECH_COMMAND_ID32   CONFIG_CN_SPEECH_COMMAND_ID32
+#define MN_SPEECH_COMMAND_ID33   CONFIG_CN_SPEECH_COMMAND_ID33
+#define MN_SPEECH_COMMAND_ID34   CONFIG_CN_SPEECH_COMMAND_ID34
+#define MN_SPEECH_COMMAND_ID35   CONFIG_CN_SPEECH_COMMAND_ID35
+#define MN_SPEECH_COMMAND_ID36   CONFIG_CN_SPEECH_COMMAND_ID36
+#define MN_SPEECH_COMMAND_ID37   CONFIG_CN_SPEECH_COMMAND_ID37
+#define MN_SPEECH_COMMAND_ID38   CONFIG_CN_SPEECH_COMMAND_ID38
+#define MN_SPEECH_COMMAND_ID39   CONFIG_CN_SPEECH_COMMAND_ID39
+#define MN_SPEECH_COMMAND_ID40   CONFIG_CN_SPEECH_COMMAND_ID40
+#define MN_SPEECH_COMMAND_ID41   CONFIG_CN_SPEECH_COMMAND_ID41
+#define MN_SPEECH_COMMAND_ID42   CONFIG_CN_SPEECH_COMMAND_ID42
+#define MN_SPEECH_COMMAND_ID43   CONFIG_CN_SPEECH_COMMAND_ID43
+#define MN_SPEECH_COMMAND_ID44   CONFIG_CN_SPEECH_COMMAND_ID44
+#define MN_SPEECH_COMMAND_ID45   CONFIG_CN_SPEECH_COMMAND_ID45
+#define MN_SPEECH_COMMAND_ID46   CONFIG_CN_SPEECH_COMMAND_ID46
+#define MN_SPEECH_COMMAND_ID47   CONFIG_CN_SPEECH_COMMAND_ID47
+#define MN_SPEECH_COMMAND_ID48   CONFIG_CN_SPEECH_COMMAND_ID48
+#define MN_SPEECH_COMMAND_ID49   CONFIG_CN_SPEECH_COMMAND_ID49
+#define MN_SPEECH_COMMAND_ID50   CONFIG_CN_SPEECH_COMMAND_ID50
+#define MN_SPEECH_COMMAND_ID51   CONFIG_CN_SPEECH_COMMAND_ID51
+#define MN_SPEECH_COMMAND_ID52   CONFIG_CN_SPEECH_COMMAND_ID52
+#define MN_SPEECH_COMMAND_ID53   CONFIG_CN_SPEECH_COMMAND_ID53
+#define MN_SPEECH_COMMAND_ID54   CONFIG_CN_SPEECH_COMMAND_ID54
+#define MN_SPEECH_COMMAND_ID55   CONFIG_CN_SPEECH_COMMAND_ID55
+#define MN_SPEECH_COMMAND_ID56   CONFIG_CN_SPEECH_COMMAND_ID56
+#define MN_SPEECH_COMMAND_ID57   CONFIG_CN_SPEECH_COMMAND_ID57
+#define MN_SPEECH_COMMAND_ID58   CONFIG_CN_SPEECH_COMMAND_ID58
+#define MN_SPEECH_COMMAND_ID59   CONFIG_CN_SPEECH_COMMAND_ID59
+#define MN_SPEECH_COMMAND_ID60   CONFIG_CN_SPEECH_COMMAND_ID60
+#define MN_SPEECH_COMMAND_ID61   CONFIG_CN_SPEECH_COMMAND_ID61
+#define MN_SPEECH_COMMAND_ID62   CONFIG_CN_SPEECH_COMMAND_ID62
+#define MN_SPEECH_COMMAND_ID63   CONFIG_CN_SPEECH_COMMAND_ID63
+#define MN_SPEECH_COMMAND_ID64   CONFIG_CN_SPEECH_COMMAND_ID64
+#define MN_SPEECH_COMMAND_ID65   CONFIG_CN_SPEECH_COMMAND_ID65
+#define MN_SPEECH_COMMAND_ID66   CONFIG_CN_SPEECH_COMMAND_ID66
+#define MN_SPEECH_COMMAND_ID67   CONFIG_CN_SPEECH_COMMAND_ID67
+#define MN_SPEECH_COMMAND_ID68   CONFIG_CN_SPEECH_COMMAND_ID68
+#define MN_SPEECH_COMMAND_ID69   CONFIG_CN_SPEECH_COMMAND_ID69
+#define MN_SPEECH_COMMAND_ID70   CONFIG_CN_SPEECH_COMMAND_ID70
+#define MN_SPEECH_COMMAND_ID71   CONFIG_CN_SPEECH_COMMAND_ID71
+#define MN_SPEECH_COMMAND_ID72   CONFIG_CN_SPEECH_COMMAND_ID72
+#define MN_SPEECH_COMMAND_ID73   CONFIG_CN_SPEECH_COMMAND_ID73
+#define MN_SPEECH_COMMAND_ID74   CONFIG_CN_SPEECH_COMMAND_ID74
+#define MN_SPEECH_COMMAND_ID75   CONFIG_CN_SPEECH_COMMAND_ID75
+#define MN_SPEECH_COMMAND_ID76   CONFIG_CN_SPEECH_COMMAND_ID76
+#define MN_SPEECH_COMMAND_ID77   CONFIG_CN_SPEECH_COMMAND_ID77
+#define MN_SPEECH_COMMAND_ID78   CONFIG_CN_SPEECH_COMMAND_ID78
+#define MN_SPEECH_COMMAND_ID79   CONFIG_CN_SPEECH_COMMAND_ID79
+#define MN_SPEECH_COMMAND_ID80   CONFIG_CN_SPEECH_COMMAND_ID80
+#define MN_SPEECH_COMMAND_ID81   CONFIG_CN_SPEECH_COMMAND_ID81
+#define MN_SPEECH_COMMAND_ID82   CONFIG_CN_SPEECH_COMMAND_ID82
+#define MN_SPEECH_COMMAND_ID83   CONFIG_CN_SPEECH_COMMAND_ID83
+#define MN_SPEECH_COMMAND_ID84   CONFIG_CN_SPEECH_COMMAND_ID84
+#define MN_SPEECH_COMMAND_ID85   CONFIG_CN_SPEECH_COMMAND_ID85
+#define MN_SPEECH_COMMAND_ID86   CONFIG_CN_SPEECH_COMMAND_ID86
+#define MN_SPEECH_COMMAND_ID87   CONFIG_CN_SPEECH_COMMAND_ID87
+#define MN_SPEECH_COMMAND_ID88   CONFIG_CN_SPEECH_COMMAND_ID88
+#define MN_SPEECH_COMMAND_ID89   CONFIG_CN_SPEECH_COMMAND_ID89
+#define MN_SPEECH_COMMAND_ID90   CONFIG_CN_SPEECH_COMMAND_ID90
+#define MN_SPEECH_COMMAND_ID91   CONFIG_CN_SPEECH_COMMAND_ID91
+#define MN_SPEECH_COMMAND_ID92   CONFIG_CN_SPEECH_COMMAND_ID92
+#define MN_SPEECH_COMMAND_ID93   CONFIG_CN_SPEECH_COMMAND_ID93
+#define MN_SPEECH_COMMAND_ID94   CONFIG_CN_SPEECH_COMMAND_ID94
+#define MN_SPEECH_COMMAND_ID95   CONFIG_CN_SPEECH_COMMAND_ID95
+#define MN_SPEECH_COMMAND_ID96   CONFIG_CN_SPEECH_COMMAND_ID96
+#define MN_SPEECH_COMMAND_ID97   CONFIG_CN_SPEECH_COMMAND_ID97
+#define MN_SPEECH_COMMAND_ID98   CONFIG_CN_SPEECH_COMMAND_ID98
+#define MN_SPEECH_COMMAND_ID99   CONFIG_CN_SPEECH_COMMAND_ID99
+#define MN_SPEECH_COMMAND_ID100   CONFIG_CN_SPEECH_COMMAND_ID100
+#define MN_SPEECH_COMMAND_ID101   CONFIG_CN_SPEECH_COMMAND_ID101
+#define MN_SPEECH_COMMAND_ID102   CONFIG_CN_SPEECH_COMMAND_ID102
+#define MN_SPEECH_COMMAND_ID103   CONFIG_CN_SPEECH_COMMAND_ID103
+#define MN_SPEECH_COMMAND_ID104   CONFIG_CN_SPEECH_COMMAND_ID104
+#define MN_SPEECH_COMMAND_ID105   CONFIG_CN_SPEECH_COMMAND_ID105
+#define MN_SPEECH_COMMAND_ID106   CONFIG_CN_SPEECH_COMMAND_ID106
+#define MN_SPEECH_COMMAND_ID107   CONFIG_CN_SPEECH_COMMAND_ID107
+#define MN_SPEECH_COMMAND_ID108   CONFIG_CN_SPEECH_COMMAND_ID108
+#define MN_SPEECH_COMMAND_ID109   CONFIG_CN_SPEECH_COMMAND_ID109
+#define MN_SPEECH_COMMAND_ID110   CONFIG_CN_SPEECH_COMMAND_ID110
+#define MN_SPEECH_COMMAND_ID111   CONFIG_CN_SPEECH_COMMAND_ID111
+#define MN_SPEECH_COMMAND_ID112   CONFIG_CN_SPEECH_COMMAND_ID112
+#define MN_SPEECH_COMMAND_ID113   CONFIG_CN_SPEECH_COMMAND_ID113
+#define MN_SPEECH_COMMAND_ID114   CONFIG_CN_SPEECH_COMMAND_ID114
+#define MN_SPEECH_COMMAND_ID115   CONFIG_CN_SPEECH_COMMAND_ID115
+#define MN_SPEECH_COMMAND_ID116   CONFIG_CN_SPEECH_COMMAND_ID116
+#define MN_SPEECH_COMMAND_ID117   CONFIG_CN_SPEECH_COMMAND_ID117
+#define MN_SPEECH_COMMAND_ID118   CONFIG_CN_SPEECH_COMMAND_ID118
+#define MN_SPEECH_COMMAND_ID119   CONFIG_CN_SPEECH_COMMAND_ID119
+#define MN_SPEECH_COMMAND_ID120   CONFIG_CN_SPEECH_COMMAND_ID120
+#define MN_SPEECH_COMMAND_ID121   CONFIG_CN_SPEECH_COMMAND_ID121
+#define MN_SPEECH_COMMAND_ID122   CONFIG_CN_SPEECH_COMMAND_ID122
+#define MN_SPEECH_COMMAND_ID123   CONFIG_CN_SPEECH_COMMAND_ID123
+#define MN_SPEECH_COMMAND_ID124   CONFIG_CN_SPEECH_COMMAND_ID124
+#define MN_SPEECH_COMMAND_ID125   CONFIG_CN_SPEECH_COMMAND_ID125
+#define MN_SPEECH_COMMAND_ID126   CONFIG_CN_SPEECH_COMMAND_ID126
+#define MN_SPEECH_COMMAND_ID127   CONFIG_CN_SPEECH_COMMAND_ID127
+#define MN_SPEECH_COMMAND_ID128   CONFIG_CN_SPEECH_COMMAND_ID128
+#define MN_SPEECH_COMMAND_ID129   CONFIG_CN_SPEECH_COMMAND_ID129
+#define MN_SPEECH_COMMAND_ID130   CONFIG_CN_SPEECH_COMMAND_ID130
+#define MN_SPEECH_COMMAND_ID131   CONFIG_CN_SPEECH_COMMAND_ID131
+#define MN_SPEECH_COMMAND_ID132   CONFIG_CN_SPEECH_COMMAND_ID132
+#define MN_SPEECH_COMMAND_ID133   CONFIG_CN_SPEECH_COMMAND_ID133
+#define MN_SPEECH_COMMAND_ID134   CONFIG_CN_SPEECH_COMMAND_ID134
+#define MN_SPEECH_COMMAND_ID135   CONFIG_CN_SPEECH_COMMAND_ID135
+#define MN_SPEECH_COMMAND_ID136   CONFIG_CN_SPEECH_COMMAND_ID136
+#define MN_SPEECH_COMMAND_ID137   CONFIG_CN_SPEECH_COMMAND_ID137
+#define MN_SPEECH_COMMAND_ID138   CONFIG_CN_SPEECH_COMMAND_ID138
+#define MN_SPEECH_COMMAND_ID139   CONFIG_CN_SPEECH_COMMAND_ID139
+#define MN_SPEECH_COMMAND_ID140   CONFIG_CN_SPEECH_COMMAND_ID140
+#define MN_SPEECH_COMMAND_ID141   CONFIG_CN_SPEECH_COMMAND_ID141
+#define MN_SPEECH_COMMAND_ID142   CONFIG_CN_SPEECH_COMMAND_ID142
+#define MN_SPEECH_COMMAND_ID143   CONFIG_CN_SPEECH_COMMAND_ID143
+#define MN_SPEECH_COMMAND_ID144   CONFIG_CN_SPEECH_COMMAND_ID144
+#define MN_SPEECH_COMMAND_ID145   CONFIG_CN_SPEECH_COMMAND_ID145
+#define MN_SPEECH_COMMAND_ID146   CONFIG_CN_SPEECH_COMMAND_ID146
+#define MN_SPEECH_COMMAND_ID147   CONFIG_CN_SPEECH_COMMAND_ID147
+#define MN_SPEECH_COMMAND_ID148   CONFIG_CN_SPEECH_COMMAND_ID148
+#define MN_SPEECH_COMMAND_ID149   CONFIG_CN_SPEECH_COMMAND_ID149
+#define MN_SPEECH_COMMAND_ID150   CONFIG_CN_SPEECH_COMMAND_ID150
+#define MN_SPEECH_COMMAND_ID151   CONFIG_CN_SPEECH_COMMAND_ID151
+#define MN_SPEECH_COMMAND_ID152   CONFIG_CN_SPEECH_COMMAND_ID152
+#define MN_SPEECH_COMMAND_ID153   CONFIG_CN_SPEECH_COMMAND_ID153
+#define MN_SPEECH_COMMAND_ID154   CONFIG_CN_SPEECH_COMMAND_ID154
+#define MN_SPEECH_COMMAND_ID155   CONFIG_CN_SPEECH_COMMAND_ID155
+#define MN_SPEECH_COMMAND_ID156   CONFIG_CN_SPEECH_COMMAND_ID156
+#define MN_SPEECH_COMMAND_ID157   CONFIG_CN_SPEECH_COMMAND_ID157
+#define MN_SPEECH_COMMAND_ID158   CONFIG_CN_SPEECH_COMMAND_ID158
+#define MN_SPEECH_COMMAND_ID159   CONFIG_CN_SPEECH_COMMAND_ID159
+#define MN_SPEECH_COMMAND_ID160   CONFIG_CN_SPEECH_COMMAND_ID160
+#define MN_SPEECH_COMMAND_ID161   CONFIG_CN_SPEECH_COMMAND_ID161
+#define MN_SPEECH_COMMAND_ID162   CONFIG_CN_SPEECH_COMMAND_ID162
+#define MN_SPEECH_COMMAND_ID163   CONFIG_CN_SPEECH_COMMAND_ID163
+#define MN_SPEECH_COMMAND_ID164   CONFIG_CN_SPEECH_COMMAND_ID164
+#define MN_SPEECH_COMMAND_ID165   CONFIG_CN_SPEECH_COMMAND_ID165
+#define MN_SPEECH_COMMAND_ID166   CONFIG_CN_SPEECH_COMMAND_ID166
+#define MN_SPEECH_COMMAND_ID167   CONFIG_CN_SPEECH_COMMAND_ID167
+#define MN_SPEECH_COMMAND_ID168   CONFIG_CN_SPEECH_COMMAND_ID168
+#define MN_SPEECH_COMMAND_ID169   CONFIG_CN_SPEECH_COMMAND_ID169
+#define MN_SPEECH_COMMAND_ID170   CONFIG_CN_SPEECH_COMMAND_ID170
+#define MN_SPEECH_COMMAND_ID171   CONFIG_CN_SPEECH_COMMAND_ID171
+#define MN_SPEECH_COMMAND_ID172   CONFIG_CN_SPEECH_COMMAND_ID172
+#define MN_SPEECH_COMMAND_ID173   CONFIG_CN_SPEECH_COMMAND_ID173
+#define MN_SPEECH_COMMAND_ID174   CONFIG_CN_SPEECH_COMMAND_ID174
+#define MN_SPEECH_COMMAND_ID175   CONFIG_CN_SPEECH_COMMAND_ID175
+#define MN_SPEECH_COMMAND_ID176   CONFIG_CN_SPEECH_COMMAND_ID176
+#define MN_SPEECH_COMMAND_ID177   CONFIG_CN_SPEECH_COMMAND_ID177
+#define MN_SPEECH_COMMAND_ID178   CONFIG_CN_SPEECH_COMMAND_ID178
+#define MN_SPEECH_COMMAND_ID179   CONFIG_CN_SPEECH_COMMAND_ID179
+#define MN_SPEECH_COMMAND_ID180   CONFIG_CN_SPEECH_COMMAND_ID180
+#define MN_SPEECH_COMMAND_ID181   CONFIG_CN_SPEECH_COMMAND_ID181
+#define MN_SPEECH_COMMAND_ID182   CONFIG_CN_SPEECH_COMMAND_ID182
+#define MN_SPEECH_COMMAND_ID183   CONFIG_CN_SPEECH_COMMAND_ID183
+#define MN_SPEECH_COMMAND_ID184   CONFIG_CN_SPEECH_COMMAND_ID184
+#define MN_SPEECH_COMMAND_ID185   CONFIG_CN_SPEECH_COMMAND_ID185
+#define MN_SPEECH_COMMAND_ID186   CONFIG_CN_SPEECH_COMMAND_ID186
+#define MN_SPEECH_COMMAND_ID187   CONFIG_CN_SPEECH_COMMAND_ID187
+#define MN_SPEECH_COMMAND_ID188   CONFIG_CN_SPEECH_COMMAND_ID188
+#define MN_SPEECH_COMMAND_ID189   CONFIG_CN_SPEECH_COMMAND_ID189
+#define MN_SPEECH_COMMAND_ID190   CONFIG_CN_SPEECH_COMMAND_ID190
+#define MN_SPEECH_COMMAND_ID191   CONFIG_CN_SPEECH_COMMAND_ID191
+#define MN_SPEECH_COMMAND_ID192   CONFIG_CN_SPEECH_COMMAND_ID192
+#define MN_SPEECH_COMMAND_ID193   CONFIG_CN_SPEECH_COMMAND_ID193
+#define MN_SPEECH_COMMAND_ID194   CONFIG_CN_SPEECH_COMMAND_ID194
+#define MN_SPEECH_COMMAND_ID195   CONFIG_CN_SPEECH_COMMAND_ID195
+#define MN_SPEECH_COMMAND_ID196   CONFIG_CN_SPEECH_COMMAND_ID196
+#define MN_SPEECH_COMMAND_ID197   CONFIG_CN_SPEECH_COMMAND_ID197
+#define MN_SPEECH_COMMAND_ID198   CONFIG_CN_SPEECH_COMMAND_ID198
+#define MN_SPEECH_COMMAND_ID199   CONFIG_CN_SPEECH_COMMAND_ID199
+#elif CONFIG_SR_MN_ENGLISH
+#define MN_SPEECH_COMMAND_ID0   CONFIG_EN_SPEECH_COMMAND_ID0
+#define MN_SPEECH_COMMAND_ID1   CONFIG_EN_SPEECH_COMMAND_ID1
+#define MN_SPEECH_COMMAND_ID2   CONFIG_EN_SPEECH_COMMAND_ID2
+#define MN_SPEECH_COMMAND_ID3   CONFIG_EN_SPEECH_COMMAND_ID3
+#define MN_SPEECH_COMMAND_ID4   CONFIG_EN_SPEECH_COMMAND_ID4
+#define MN_SPEECH_COMMAND_ID5   CONFIG_EN_SPEECH_COMMAND_ID5
+#define MN_SPEECH_COMMAND_ID6   CONFIG_EN_SPEECH_COMMAND_ID6
+#define MN_SPEECH_COMMAND_ID7   CONFIG_EN_SPEECH_COMMAND_ID7
+#define MN_SPEECH_COMMAND_ID8   CONFIG_EN_SPEECH_COMMAND_ID8
+#define MN_SPEECH_COMMAND_ID9   CONFIG_EN_SPEECH_COMMAND_ID9
+#define MN_SPEECH_COMMAND_ID10   CONFIG_EN_SPEECH_COMMAND_ID10
+#define MN_SPEECH_COMMAND_ID11   CONFIG_EN_SPEECH_COMMAND_ID11
+#define MN_SPEECH_COMMAND_ID12   CONFIG_EN_SPEECH_COMMAND_ID12
+#define MN_SPEECH_COMMAND_ID13   CONFIG_EN_SPEECH_COMMAND_ID13
+#define MN_SPEECH_COMMAND_ID14   CONFIG_EN_SPEECH_COMMAND_ID14
+#define MN_SPEECH_COMMAND_ID15   CONFIG_EN_SPEECH_COMMAND_ID15
+#define MN_SPEECH_COMMAND_ID16   CONFIG_EN_SPEECH_COMMAND_ID16
+#define MN_SPEECH_COMMAND_ID17   CONFIG_EN_SPEECH_COMMAND_ID17
+#define MN_SPEECH_COMMAND_ID18   CONFIG_EN_SPEECH_COMMAND_ID18
+#define MN_SPEECH_COMMAND_ID19   CONFIG_EN_SPEECH_COMMAND_ID19
+#define MN_SPEECH_COMMAND_ID20   CONFIG_EN_SPEECH_COMMAND_ID20
+#define MN_SPEECH_COMMAND_ID21   CONFIG_EN_SPEECH_COMMAND_ID21
+#define MN_SPEECH_COMMAND_ID22   CONFIG_EN_SPEECH_COMMAND_ID22
+#define MN_SPEECH_COMMAND_ID23   CONFIG_EN_SPEECH_COMMAND_ID23
+#define MN_SPEECH_COMMAND_ID24   CONFIG_EN_SPEECH_COMMAND_ID24
+#define MN_SPEECH_COMMAND_ID25   CONFIG_EN_SPEECH_COMMAND_ID25
+#define MN_SPEECH_COMMAND_ID26   CONFIG_EN_SPEECH_COMMAND_ID26
+#define MN_SPEECH_COMMAND_ID27   CONFIG_EN_SPEECH_COMMAND_ID27
+#define MN_SPEECH_COMMAND_ID28   CONFIG_EN_SPEECH_COMMAND_ID28
+#define MN_SPEECH_COMMAND_ID29   CONFIG_EN_SPEECH_COMMAND_ID29
+#define MN_SPEECH_COMMAND_ID30   CONFIG_EN_SPEECH_COMMAND_ID30
+#define MN_SPEECH_COMMAND_ID31   CONFIG_EN_SPEECH_COMMAND_ID31
+#define MN_SPEECH_COMMAND_ID32   CONFIG_EN_SPEECH_COMMAND_ID32
+#define MN_SPEECH_COMMAND_ID33   CONFIG_EN_SPEECH_COMMAND_ID33
+#define MN_SPEECH_COMMAND_ID34   CONFIG_EN_SPEECH_COMMAND_ID34
+#define MN_SPEECH_COMMAND_ID35   CONFIG_EN_SPEECH_COMMAND_ID35
+#define MN_SPEECH_COMMAND_ID36   CONFIG_EN_SPEECH_COMMAND_ID36
+#define MN_SPEECH_COMMAND_ID37   CONFIG_EN_SPEECH_COMMAND_ID37
+#define MN_SPEECH_COMMAND_ID38   CONFIG_EN_SPEECH_COMMAND_ID38
+#define MN_SPEECH_COMMAND_ID39   CONFIG_EN_SPEECH_COMMAND_ID39
+#define MN_SPEECH_COMMAND_ID40   CONFIG_EN_SPEECH_COMMAND_ID40
+#define MN_SPEECH_COMMAND_ID41   CONFIG_EN_SPEECH_COMMAND_ID41
+#define MN_SPEECH_COMMAND_ID42   CONFIG_EN_SPEECH_COMMAND_ID42
+#define MN_SPEECH_COMMAND_ID43   CONFIG_EN_SPEECH_COMMAND_ID43
+#define MN_SPEECH_COMMAND_ID44   CONFIG_EN_SPEECH_COMMAND_ID44
+#define MN_SPEECH_COMMAND_ID45   CONFIG_EN_SPEECH_COMMAND_ID45
+#define MN_SPEECH_COMMAND_ID46   CONFIG_EN_SPEECH_COMMAND_ID46
+#define MN_SPEECH_COMMAND_ID47   CONFIG_EN_SPEECH_COMMAND_ID47
+#define MN_SPEECH_COMMAND_ID48   CONFIG_EN_SPEECH_COMMAND_ID48
+#define MN_SPEECH_COMMAND_ID49   CONFIG_EN_SPEECH_COMMAND_ID49
+#define MN_SPEECH_COMMAND_ID50   CONFIG_EN_SPEECH_COMMAND_ID50
+#define MN_SPEECH_COMMAND_ID51   CONFIG_EN_SPEECH_COMMAND_ID51
+#define MN_SPEECH_COMMAND_ID52   CONFIG_EN_SPEECH_COMMAND_ID52
+#define MN_SPEECH_COMMAND_ID53   CONFIG_EN_SPEECH_COMMAND_ID53
+#define MN_SPEECH_COMMAND_ID54   CONFIG_EN_SPEECH_COMMAND_ID54
+#define MN_SPEECH_COMMAND_ID55   CONFIG_EN_SPEECH_COMMAND_ID55
+#define MN_SPEECH_COMMAND_ID56   CONFIG_EN_SPEECH_COMMAND_ID56
+#define MN_SPEECH_COMMAND_ID57   CONFIG_EN_SPEECH_COMMAND_ID57
+#define MN_SPEECH_COMMAND_ID58   CONFIG_EN_SPEECH_COMMAND_ID58
+#define MN_SPEECH_COMMAND_ID59   CONFIG_EN_SPEECH_COMMAND_ID59
+#define MN_SPEECH_COMMAND_ID60   CONFIG_EN_SPEECH_COMMAND_ID60
+#define MN_SPEECH_COMMAND_ID61   CONFIG_EN_SPEECH_COMMAND_ID61
+#define MN_SPEECH_COMMAND_ID62   CONFIG_EN_SPEECH_COMMAND_ID62
+#define MN_SPEECH_COMMAND_ID63   CONFIG_EN_SPEECH_COMMAND_ID63
+#define MN_SPEECH_COMMAND_ID64   CONFIG_EN_SPEECH_COMMAND_ID64
+#define MN_SPEECH_COMMAND_ID65   CONFIG_EN_SPEECH_COMMAND_ID65
+#define MN_SPEECH_COMMAND_ID66   CONFIG_EN_SPEECH_COMMAND_ID66
+#define MN_SPEECH_COMMAND_ID67   CONFIG_EN_SPEECH_COMMAND_ID67
+#define MN_SPEECH_COMMAND_ID68   CONFIG_EN_SPEECH_COMMAND_ID68
+#define MN_SPEECH_COMMAND_ID69   CONFIG_EN_SPEECH_COMMAND_ID69
+#define MN_SPEECH_COMMAND_ID70   CONFIG_EN_SPEECH_COMMAND_ID70
+#define MN_SPEECH_COMMAND_ID71   CONFIG_EN_SPEECH_COMMAND_ID71
+#define MN_SPEECH_COMMAND_ID72   CONFIG_EN_SPEECH_COMMAND_ID72
+#define MN_SPEECH_COMMAND_ID73   CONFIG_EN_SPEECH_COMMAND_ID73
+#define MN_SPEECH_COMMAND_ID74   CONFIG_EN_SPEECH_COMMAND_ID74
+#define MN_SPEECH_COMMAND_ID75   CONFIG_EN_SPEECH_COMMAND_ID75
+#define MN_SPEECH_COMMAND_ID76   CONFIG_EN_SPEECH_COMMAND_ID76
+#define MN_SPEECH_COMMAND_ID77   CONFIG_EN_SPEECH_COMMAND_ID77
+#define MN_SPEECH_COMMAND_ID78   CONFIG_EN_SPEECH_COMMAND_ID78
+#define MN_SPEECH_COMMAND_ID79   CONFIG_EN_SPEECH_COMMAND_ID79
+#define MN_SPEECH_COMMAND_ID80   CONFIG_EN_SPEECH_COMMAND_ID80
+#define MN_SPEECH_COMMAND_ID81   CONFIG_EN_SPEECH_COMMAND_ID81
+#define MN_SPEECH_COMMAND_ID82   CONFIG_EN_SPEECH_COMMAND_ID82
+#define MN_SPEECH_COMMAND_ID83   CONFIG_EN_SPEECH_COMMAND_ID83
+#define MN_SPEECH_COMMAND_ID84   CONFIG_EN_SPEECH_COMMAND_ID84
+#define MN_SPEECH_COMMAND_ID85   CONFIG_EN_SPEECH_COMMAND_ID85
+#define MN_SPEECH_COMMAND_ID86   CONFIG_EN_SPEECH_COMMAND_ID86
+#define MN_SPEECH_COMMAND_ID87   CONFIG_EN_SPEECH_COMMAND_ID87
+#define MN_SPEECH_COMMAND_ID88   CONFIG_EN_SPEECH_COMMAND_ID88
+#define MN_SPEECH_COMMAND_ID89   CONFIG_EN_SPEECH_COMMAND_ID89
+#define MN_SPEECH_COMMAND_ID90   CONFIG_EN_SPEECH_COMMAND_ID90
+#define MN_SPEECH_COMMAND_ID91   CONFIG_EN_SPEECH_COMMAND_ID91
+#define MN_SPEECH_COMMAND_ID92   CONFIG_EN_SPEECH_COMMAND_ID92
+#define MN_SPEECH_COMMAND_ID93   CONFIG_EN_SPEECH_COMMAND_ID93
+#define MN_SPEECH_COMMAND_ID94   CONFIG_EN_SPEECH_COMMAND_ID94
+#define MN_SPEECH_COMMAND_ID95   CONFIG_EN_SPEECH_COMMAND_ID95
+#define MN_SPEECH_COMMAND_ID96   CONFIG_EN_SPEECH_COMMAND_ID96
+#define MN_SPEECH_COMMAND_ID97   CONFIG_EN_SPEECH_COMMAND_ID97
+#define MN_SPEECH_COMMAND_ID98   CONFIG_EN_SPEECH_COMMAND_ID98
+#define MN_SPEECH_COMMAND_ID99   CONFIG_EN_SPEECH_COMMAND_ID99
+#define MN_SPEECH_COMMAND_ID100   CONFIG_EN_SPEECH_COMMAND_ID100
+#define MN_SPEECH_COMMAND_ID101   CONFIG_EN_SPEECH_COMMAND_ID101
+#define MN_SPEECH_COMMAND_ID102   CONFIG_EN_SPEECH_COMMAND_ID102
+#define MN_SPEECH_COMMAND_ID103   CONFIG_EN_SPEECH_COMMAND_ID103
+#define MN_SPEECH_COMMAND_ID104   CONFIG_EN_SPEECH_COMMAND_ID104
+#define MN_SPEECH_COMMAND_ID105   CONFIG_EN_SPEECH_COMMAND_ID105
+#define MN_SPEECH_COMMAND_ID106   CONFIG_EN_SPEECH_COMMAND_ID106
+#define MN_SPEECH_COMMAND_ID107   CONFIG_EN_SPEECH_COMMAND_ID107
+#define MN_SPEECH_COMMAND_ID108   CONFIG_EN_SPEECH_COMMAND_ID108
+#define MN_SPEECH_COMMAND_ID109   CONFIG_EN_SPEECH_COMMAND_ID109
+#define MN_SPEECH_COMMAND_ID110   CONFIG_EN_SPEECH_COMMAND_ID110
+#define MN_SPEECH_COMMAND_ID111   CONFIG_EN_SPEECH_COMMAND_ID111
+#define MN_SPEECH_COMMAND_ID112   CONFIG_EN_SPEECH_COMMAND_ID112
+#define MN_SPEECH_COMMAND_ID113   CONFIG_EN_SPEECH_COMMAND_ID113
+#define MN_SPEECH_COMMAND_ID114   CONFIG_EN_SPEECH_COMMAND_ID114
+#define MN_SPEECH_COMMAND_ID115   CONFIG_EN_SPEECH_COMMAND_ID115
+#define MN_SPEECH_COMMAND_ID116   CONFIG_EN_SPEECH_COMMAND_ID116
+#define MN_SPEECH_COMMAND_ID117   CONFIG_EN_SPEECH_COMMAND_ID117
+#define MN_SPEECH_COMMAND_ID118   CONFIG_EN_SPEECH_COMMAND_ID118
+#define MN_SPEECH_COMMAND_ID119   CONFIG_EN_SPEECH_COMMAND_ID119
+#define MN_SPEECH_COMMAND_ID120   CONFIG_EN_SPEECH_COMMAND_ID120
+#define MN_SPEECH_COMMAND_ID121   CONFIG_EN_SPEECH_COMMAND_ID121
+#define MN_SPEECH_COMMAND_ID122   CONFIG_EN_SPEECH_COMMAND_ID122
+#define MN_SPEECH_COMMAND_ID123   CONFIG_EN_SPEECH_COMMAND_ID123
+#define MN_SPEECH_COMMAND_ID124   CONFIG_EN_SPEECH_COMMAND_ID124
+#define MN_SPEECH_COMMAND_ID125   CONFIG_EN_SPEECH_COMMAND_ID125
+#define MN_SPEECH_COMMAND_ID126   CONFIG_EN_SPEECH_COMMAND_ID126
+#define MN_SPEECH_COMMAND_ID127   CONFIG_EN_SPEECH_COMMAND_ID127
+#define MN_SPEECH_COMMAND_ID128   CONFIG_EN_SPEECH_COMMAND_ID128
+#define MN_SPEECH_COMMAND_ID129   CONFIG_EN_SPEECH_COMMAND_ID129
+#define MN_SPEECH_COMMAND_ID130   CONFIG_EN_SPEECH_COMMAND_ID130
+#define MN_SPEECH_COMMAND_ID131   CONFIG_EN_SPEECH_COMMAND_ID131
+#define MN_SPEECH_COMMAND_ID132   CONFIG_EN_SPEECH_COMMAND_ID132
+#define MN_SPEECH_COMMAND_ID133   CONFIG_EN_SPEECH_COMMAND_ID133
+#define MN_SPEECH_COMMAND_ID134   CONFIG_EN_SPEECH_COMMAND_ID134
+#define MN_SPEECH_COMMAND_ID135   CONFIG_EN_SPEECH_COMMAND_ID135
+#define MN_SPEECH_COMMAND_ID136   CONFIG_EN_SPEECH_COMMAND_ID136
+#define MN_SPEECH_COMMAND_ID137   CONFIG_EN_SPEECH_COMMAND_ID137
+#define MN_SPEECH_COMMAND_ID138   CONFIG_EN_SPEECH_COMMAND_ID138
+#define MN_SPEECH_COMMAND_ID139   CONFIG_EN_SPEECH_COMMAND_ID139
+#define MN_SPEECH_COMMAND_ID140   CONFIG_EN_SPEECH_COMMAND_ID140
+#define MN_SPEECH_COMMAND_ID141   CONFIG_EN_SPEECH_COMMAND_ID141
+#define MN_SPEECH_COMMAND_ID142   CONFIG_EN_SPEECH_COMMAND_ID142
+#define MN_SPEECH_COMMAND_ID143   CONFIG_EN_SPEECH_COMMAND_ID143
+#define MN_SPEECH_COMMAND_ID144   CONFIG_EN_SPEECH_COMMAND_ID144
+#define MN_SPEECH_COMMAND_ID145   CONFIG_EN_SPEECH_COMMAND_ID145
+#define MN_SPEECH_COMMAND_ID146   CONFIG_EN_SPEECH_COMMAND_ID146
+#define MN_SPEECH_COMMAND_ID147   CONFIG_EN_SPEECH_COMMAND_ID147
+#define MN_SPEECH_COMMAND_ID148   CONFIG_EN_SPEECH_COMMAND_ID148
+#define MN_SPEECH_COMMAND_ID149   CONFIG_EN_SPEECH_COMMAND_ID149
+#define MN_SPEECH_COMMAND_ID150   CONFIG_EN_SPEECH_COMMAND_ID150
+#define MN_SPEECH_COMMAND_ID151   CONFIG_EN_SPEECH_COMMAND_ID151
+#define MN_SPEECH_COMMAND_ID152   CONFIG_EN_SPEECH_COMMAND_ID152
+#define MN_SPEECH_COMMAND_ID153   CONFIG_EN_SPEECH_COMMAND_ID153
+#define MN_SPEECH_COMMAND_ID154   CONFIG_EN_SPEECH_COMMAND_ID154
+#define MN_SPEECH_COMMAND_ID155   CONFIG_EN_SPEECH_COMMAND_ID155
+#define MN_SPEECH_COMMAND_ID156   CONFIG_EN_SPEECH_COMMAND_ID156
+#define MN_SPEECH_COMMAND_ID157   CONFIG_EN_SPEECH_COMMAND_ID157
+#define MN_SPEECH_COMMAND_ID158   CONFIG_EN_SPEECH_COMMAND_ID158
+#define MN_SPEECH_COMMAND_ID159   CONFIG_EN_SPEECH_COMMAND_ID159
+#define MN_SPEECH_COMMAND_ID160   CONFIG_EN_SPEECH_COMMAND_ID160
+#define MN_SPEECH_COMMAND_ID161   CONFIG_EN_SPEECH_COMMAND_ID161
+#define MN_SPEECH_COMMAND_ID162   CONFIG_EN_SPEECH_COMMAND_ID162
+#define MN_SPEECH_COMMAND_ID163   CONFIG_EN_SPEECH_COMMAND_ID163
+#define MN_SPEECH_COMMAND_ID164   CONFIG_EN_SPEECH_COMMAND_ID164
+#define MN_SPEECH_COMMAND_ID165   CONFIG_EN_SPEECH_COMMAND_ID165
+#define MN_SPEECH_COMMAND_ID166   CONFIG_EN_SPEECH_COMMAND_ID166
+#define MN_SPEECH_COMMAND_ID167   CONFIG_EN_SPEECH_COMMAND_ID167
+#define MN_SPEECH_COMMAND_ID168   CONFIG_EN_SPEECH_COMMAND_ID168
+#define MN_SPEECH_COMMAND_ID169   CONFIG_EN_SPEECH_COMMAND_ID169
+#define MN_SPEECH_COMMAND_ID170   CONFIG_EN_SPEECH_COMMAND_ID170
+#define MN_SPEECH_COMMAND_ID171   CONFIG_EN_SPEECH_COMMAND_ID171
+#define MN_SPEECH_COMMAND_ID172   CONFIG_EN_SPEECH_COMMAND_ID172
+#define MN_SPEECH_COMMAND_ID173   CONFIG_EN_SPEECH_COMMAND_ID173
+#define MN_SPEECH_COMMAND_ID174   CONFIG_EN_SPEECH_COMMAND_ID174
+#define MN_SPEECH_COMMAND_ID175   CONFIG_EN_SPEECH_COMMAND_ID175
+#define MN_SPEECH_COMMAND_ID176   CONFIG_EN_SPEECH_COMMAND_ID176
+#define MN_SPEECH_COMMAND_ID177   CONFIG_EN_SPEECH_COMMAND_ID177
+#define MN_SPEECH_COMMAND_ID178   CONFIG_EN_SPEECH_COMMAND_ID178
+#define MN_SPEECH_COMMAND_ID179   CONFIG_EN_SPEECH_COMMAND_ID179
+#define MN_SPEECH_COMMAND_ID180   CONFIG_EN_SPEECH_COMMAND_ID180
+#define MN_SPEECH_COMMAND_ID181   CONFIG_EN_SPEECH_COMMAND_ID181
+#define MN_SPEECH_COMMAND_ID182   CONFIG_EN_SPEECH_COMMAND_ID182
+#define MN_SPEECH_COMMAND_ID183   CONFIG_EN_SPEECH_COMMAND_ID183
+#define MN_SPEECH_COMMAND_ID184   CONFIG_EN_SPEECH_COMMAND_ID184
+#define MN_SPEECH_COMMAND_ID185   CONFIG_EN_SPEECH_COMMAND_ID185
+#define MN_SPEECH_COMMAND_ID186   CONFIG_EN_SPEECH_COMMAND_ID186
+#define MN_SPEECH_COMMAND_ID187   CONFIG_EN_SPEECH_COMMAND_ID187
+#define MN_SPEECH_COMMAND_ID188   CONFIG_EN_SPEECH_COMMAND_ID188
+#define MN_SPEECH_COMMAND_ID189   CONFIG_EN_SPEECH_COMMAND_ID189
+#define MN_SPEECH_COMMAND_ID190   CONFIG_EN_SPEECH_COMMAND_ID190
+#define MN_SPEECH_COMMAND_ID191   CONFIG_EN_SPEECH_COMMAND_ID191
+#define MN_SPEECH_COMMAND_ID192   CONFIG_EN_SPEECH_COMMAND_ID192
+#define MN_SPEECH_COMMAND_ID193   CONFIG_EN_SPEECH_COMMAND_ID193
+#define MN_SPEECH_COMMAND_ID194   CONFIG_EN_SPEECH_COMMAND_ID194
+#define MN_SPEECH_COMMAND_ID195   CONFIG_EN_SPEECH_COMMAND_ID195
+#define MN_SPEECH_COMMAND_ID196   CONFIG_EN_SPEECH_COMMAND_ID196
+#define MN_SPEECH_COMMAND_ID197   CONFIG_EN_SPEECH_COMMAND_ID197
+#define MN_SPEECH_COMMAND_ID198   CONFIG_EN_SPEECH_COMMAND_ID198
+#define MN_SPEECH_COMMAND_ID199   CONFIG_EN_SPEECH_COMMAND_ID199
+#endif
+char *get_id_name(int i);
+void reset_speech_commands(model_iface_data_t *model_data, char* command_str, char *err_phrase_id);
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/model_path.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/model_path.h
new file mode 100644
index 00000000000..b9cdc302ad8
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/model_path.h
@@ -0,0 +1,3 @@
+#pragma once
+char *get_model_base_path(void);
+void srmodel_spiffs_init(void);
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/multinet2_ch.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/multinet2_ch.h
new file mode 100644
index 00000000000..2cee215dca7
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/multinet2_ch.h
@@ -0,0 +1,9 @@
+//Generated by mkmodel_py
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+
+extern const model_coeff_getter_t get_coeff_multinet2_ch;
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaoxin_wn5X3.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaoxin_wn5X3.h
new file mode 100644
index 00000000000..b767bfc435d
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaoxin_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaoxin_wn5X3;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaoxin_wn6.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaoxin_wn6.h
new file mode 100644
index 00000000000..c365e6d97df
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaoxin_wn6.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaoxin_wn6;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaozhi_wn5.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaozhi_wn5.h
new file mode 100644
index 00000000000..04fa268d1f9
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaozhi_wn5.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaozhi_wn5;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X2.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X2.h
new file mode 100644
index 00000000000..6c5f2b39e8d
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X2.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaozhi_wn5X2;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X3.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X3.h
new file mode 100644
index 00000000000..190556e1bab
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/nihaoxiaozhi_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaozhi_wn5X3;
diff --git a/tools/sdk/esp32s2/include/esp-sr/include/esp32/sr_flash.h b/tools/sdk/esp32s2/include/esp-sr/include/esp32/sr_flash.h
new file mode 100644
index 00000000000..6c97e51e574
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp-sr/include/esp32/sr_flash.h
@@ -0,0 +1,12 @@
+#pragma once
+
+#define SR_FLASH_TYPE   32
+#define SR_FLASH_SUBTYPE   32
+#define SR_FLASH_PARTITION_NAME "fr"
+#define SR_FLASH_INFO_FLAG 12138
+
+int8_t speech_command_flash_init(void);
+int8_t enroll_speech_command_to_flash_with_id(char *phrase, int mn_command_id);
+int get_use_flag_from_flash();
+int get_enroll_num_from_flash();
+char *read_speech_command_from_flash(int i);
\ No newline at end of file
diff --git a/tools/sdk/esp32s2/include/esp32-camera/driver/include/sensor.h b/tools/sdk/esp32s2/include/esp32-camera/driver/include/sensor.h
index 1f99c154185..26afeec3fd5 100755
--- a/tools/sdk/esp32s2/include/esp32-camera/driver/include/sensor.h
+++ b/tools/sdk/esp32s2/include/esp32-camera/driver/include/sensor.h
@@ -26,6 +26,8 @@ typedef enum {
     GC2145_PID = 0x2145,
     GC032A_PID = 0x232a,
     GC0308_PID = 0x9b,
+    BF3005_PID = 0x30,
+    BF20A6_PID = 0x20a6,
 } camera_pid_t;
 
 typedef enum {
@@ -38,6 +40,8 @@ typedef enum {
     CAMERA_GC2145,
     CAMERA_GC032A,
     CAMERA_GC0308,
+    CAMERA_BF3005,
+    CAMERA_BF20A6,
     CAMERA_MODEL_MAX,
     CAMERA_NONE,
 } camera_model_t;
@@ -52,6 +56,8 @@ typedef enum {
     GC2145_SCCB_ADDR   = 0x3C,// 0x78 >> 1
     GC032A_SCCB_ADDR   = 0x21,// 0x42 >> 1
     GC0308_SCCB_ADDR   = 0x21,// 0x42 >> 1
+    BF3005_SCCB_ADDR   = 0x6E,
+    BF20A6_SCCB_ADDR   = 0x6E,
 } camera_sccb_addr_t;
 
 typedef enum {
diff --git a/tools/sdk/esp32s2/include/esp_adc_cal/include/esp_adc_cal.h b/tools/sdk/esp32s2/include/esp_adc_cal/include/esp_adc_cal.h
index 171b2ed8501..445b7f65d34 100644
--- a/tools/sdk/esp32s2/include/esp_adc_cal/include/esp_adc_cal.h
+++ b/tools/sdk/esp32s2/include/esp_adc_cal/include/esp_adc_cal.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef __ESP_ADC_CAL_H__
 #define __ESP_ADC_CAL_H__
diff --git a/tools/sdk/esp32s2/include/esp_common/include/esp_attr.h b/tools/sdk/esp32s2/include/esp_common/include/esp_attr.h
index 7b73af76634..106a686b5e4 100644
--- a/tools/sdk/esp32s2/include/esp_common/include/esp_attr.h
+++ b/tools/sdk/esp32s2/include/esp_common/include/esp_attr.h
@@ -1,17 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 #ifndef __ESP_ATTR_H__
 #define __ESP_ATTR_H__
 
@@ -33,17 +25,24 @@ extern "C" {
 // Forces data into DRAM instead of flash
 #define DRAM_ATTR _SECTION_ATTR_IMPL(".dram1", __COUNTER__)
 
-#ifdef CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
+// IRAM can only be accessed as an 8-bit memory on ESP32, when CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY is set
+#define IRAM_8BIT_ACCESSIBLE (CONFIG_IDF_TARGET_ESP32 && CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY)
+
+// Make sure that IRAM is accessible as an 8-bit memory on ESP32.
+// If that's not the case, coredump cannot dump data from IRAM.
+#if IRAM_8BIT_ACCESSIBLE
 // Forces data into IRAM instead of DRAM
 #define IRAM_DATA_ATTR __attribute__((section(".iram.data")))
 
 // Forces data into IRAM instead of DRAM and map it to coredump
-#define COREDUMP_IRAM_DATA_ATTR _SECTION_ATTR_IMPL(".iram.data.coredump", __COUNTER__)
+#define COREDUMP_IRAM_DATA_ATTR _SECTION_ATTR_IMPL(".iram2.coredump", __COUNTER__)
 
 // Forces bss into IRAM instead of DRAM
 #define IRAM_BSS_ATTR __attribute__((section(".iram.bss")))
 #else
-#define COREDUMP_IRAM_DATA_ATTR
+
+// IRAM is not accessible as an 8-bit memory, put IRAM coredump variables in DRAM
+#define COREDUMP_IRAM_DATA_ATTR COREDUMP_DRAM_ATTR
 #define IRAM_DATA_ATTR
 
 #define IRAM_BSS_ATTR
@@ -103,7 +102,9 @@ extern "C" {
 #define RTC_NOINIT_ATTR  _SECTION_ATTR_IMPL(".rtc_noinit", __COUNTER__)
 
 // Forces code into DRAM instead of flash and map it to coredump
-#define COREDUMP_DRAM_ATTR _SECTION_ATTR_IMPL(".dram1.coredump", __COUNTER__)
+// Use dram2 instead of dram1 to make sure this section will not be included
+// by dram1 section in the linker script
+#define COREDUMP_DRAM_ATTR _SECTION_ATTR_IMPL(".dram2.coredump", __COUNTER__)
 
 // Forces data into RTC memory and map it to coredump
 #define COREDUMP_RTC_DATA_ATTR _SECTION_ATTR_IMPL(".rtc.coredump", __COUNTER__)
diff --git a/tools/sdk/esp32s2/include/esp_common/include/esp_check.h b/tools/sdk/esp32s2/include/esp_common/include/esp_check.h
index 524cb376a38..d0e09cf28f0 100644
--- a/tools/sdk/esp32s2/include/esp_common/include/esp_check.h
+++ b/tools/sdk/esp32s2/include/esp_common/include/esp_check.h
@@ -25,6 +25,7 @@ extern "C" {
  */
 #if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
 #define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                       \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             return err_rc_;                                                                     \
@@ -35,6 +36,7 @@ extern "C" {
  * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
  */
 #define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             return err_rc_;                                                                     \
@@ -46,6 +48,7 @@ extern "C" {
  * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
  */
 #define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             ret = err_rc_;                                                                      \
@@ -57,6 +60,7 @@ extern "C" {
  * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
  */
 #define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
+        (void)log_tag;                                                                          \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
             ret = err_rc_;                                                                      \
@@ -69,6 +73,7 @@ extern "C" {
  * and returns with the supplied 'err_code'.
  */
 #define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             return err_code;                                                                    \
         }                                                                                       \
@@ -78,6 +83,7 @@ extern "C" {
  * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
  */
 #define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             return err_code;                                                                    \
         }                                                                                       \
@@ -88,6 +94,7 @@ extern "C" {
  * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
  */
 #define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             ret = err_code;                                                                     \
             goto goto_tag;                                                                      \
@@ -98,6 +105,7 @@ extern "C" {
  * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
  */
 #define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
+        (void)log_tag;                                                                          \
         if (unlikely(!(a))) {                                                                   \
             ret = err_code;                                                                     \
             goto goto_tag;                                                                      \
diff --git a/tools/sdk/esp32s2/include/esp_common/include/esp_err.h b/tools/sdk/esp32s2/include/esp_common/include/esp_err.h
index d31bb9a0753..f317f8a09f5 100644
--- a/tools/sdk/esp32s2/include/esp_common/include/esp_err.h
+++ b/tools/sdk/esp32s2/include/esp_common/include/esp_err.h
@@ -1,16 +1,9 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
 #include <stdint.h>
@@ -46,6 +39,7 @@ typedef int esp_err_t;
 #define ESP_ERR_MESH_BASE           0x4000  /*!< Starting number of MESH error codes */
 #define ESP_ERR_FLASH_BASE          0x6000  /*!< Starting number of flash error codes */
 #define ESP_ERR_HW_CRYPTO_BASE      0xc000  /*!< Starting number of HW cryptography module error codes */
+#define ESP_ERR_MEMPROT_BASE        0xd000  /*!< Starting number of Memory Protection API error codes */
 
 /**
   * @brief Returns string for esp_err_t error codes
diff --git a/tools/sdk/esp32s2/include/esp_common/include/esp_idf_version.h b/tools/sdk/esp32s2/include/esp_common/include/esp_idf_version.h
index 7637b814b65..db04f85f90a 100644
--- a/tools/sdk/esp32s2/include/esp_common/include/esp_idf_version.h
+++ b/tools/sdk/esp32s2/include/esp_common/include/esp_idf_version.h
@@ -23,7 +23,7 @@ extern "C" {
 /** Minor version number (x.X.x) */
 #define ESP_IDF_VERSION_MINOR   4
 /** Patch version number (x.x.X) */
-#define ESP_IDF_VERSION_PATCH   0
+#define ESP_IDF_VERSION_PATCH   1
 
 /**
  * Macro to convert IDF version number into an integer
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_chip_info.h b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_chip_info.h
index 69d23c08d36..0b081d37e1b 100644
--- a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_chip_info.h
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_chip_info.h
@@ -33,6 +33,7 @@ typedef enum {
 #define CHIP_FEATURE_BLE            BIT(4)      //!< Chip has Bluetooth LE
 #define CHIP_FEATURE_BT             BIT(5)      //!< Chip has Bluetooth Classic
 #define CHIP_FEATURE_IEEE802154     BIT(6)      //!< Chip has IEEE 802.15.4
+#define CHIP_FEATURE_EMB_PSRAM      BIT(7)      //!< Chip has embedded psram
 
 /**
  * @brief The structure represents information about the chip
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_memprot.h b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_memprot.h
new file mode 100644
index 00000000000..c9557eae935
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_memprot.h
@@ -0,0 +1,199 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/////////////////////////////////////////////////////////////////////////////////////////
+// ESP Memory Protection API (PMS)
+// - allows configuration and violation-interrupt handling of the PMS module operations
+// - not intended for public use.
+
+#pragma once
+
+#include "sdkconfig.h"
+#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_err.h"
+#include "esp_memprot_err.h"
+#include "soc_memprot_types.h"
+#include "esp_memprot_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_MEMPROT_ERR_CHECK(retval, fnc) if ((retval=fnc) != ESP_OK) { return retval; }
+
+/**
+* @brief Basic PMS interrupt source info
+*/
+typedef struct {
+    esp_mprot_mem_t mem_type;   /*!< Memory type containing the faulting address  */
+    int core;                   /*!< CPU/Core ID running the faulting instruction  */
+} esp_memp_intr_source_t;
+
+/**
+ * @brief Clears current interrupt ON flag for given Memory type and CPU/Core ID
+ *
+ * This operation is non-atomic for some chips by PMS module design
+ * In such a case the interrupt clearing happens in two steps:
+ *      1. Interrupt CLR flag is set (clears interrupt-ON status and inhibits linked interrupt processing)
+ *      2. Interrupt CLR flag is reset (resumes the interrupt monitoring)
+ *
+ * @param mem_type Memory type (see esp_mprot_mem_t enum)
+ * @param core Target CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_monitor_clear_intr(const esp_mprot_mem_t mem_type, int const *const core);
+
+/**
+ * @brief Checks whether any of the PMS settings is locked
+ *
+ * @param[out] locked Any lock on? (true/false)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid locked ptr
+ *         Other failures: error code of any failing esp_mprot_get_*_lock() routine (called internally)
+ */
+esp_err_t esp_mprot_is_conf_locked_any(bool *locked);
+
+/**
+ * @brief Checks whether any PMS violation-interrupt monitoring is enabled
+ *
+ * @param[out] locked Any PMS violation interrupt monitor is enabled (true/false)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid enabled ptr
+ *         Other failures: error code of esp_mprot_get_monitor_en() routine (called internally for all Memory types)
+ */
+esp_err_t esp_mprot_is_intr_ena_any(bool *enabled);
+
+/**
+ * @brief Returns active PMS violation-interrupt Memory type if any (MEMPROT_TYPE_NONE when none detected)
+ * and the CPU/CoreID which was running the faulty code (-1 when no interrupt available)
+ *
+ * If there are more interrupts indicated on (shouldn't happen), the order of precedence is given by 'esp_mprot_mem_t' enum definition (low->high)
+ *
+ * @param[out] mem_type Out-pointer for Memory type given by the faulting address (see esp_mprot_mem_t enum)
+ * @param[out] core Out-pointer for CPU/Core ID (see *_CPU_NUM defs in soc.h)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer(s)
+ */
+esp_err_t esp_mprot_get_active_intr(esp_memp_intr_source_t *active_memp_intr);
+
+/**
+ * @brief Returns the address which caused the violation interrupt for given Memory type and CPU/Core ID.
+ * This function is to be called after a basic resolving of (current) interrupt's parameters (ie corresponding
+ * Memory type and CPU ID see esp_mprot_get_active_intr()). This is to minimize processing time of actual exception
+ * as this API is typicaly used in a panic-handling code.
+ * If there is no active interrupt available for the Memory type/CPU ID required, fault_addr is set to NULL.
+ *
+ * @param mem_type memory type
+ * @param[out] fault_addr Address of the operation which caused the PMS violation interrupt
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid fault_addr pointer
+ */
+esp_err_t esp_mprot_get_violate_addr(const esp_mprot_mem_t mem_type, void **fault_addr, int const *const core);
+
+/**
+ * @brief Returns PMS World identifier of the code causing the violation interrupt
+ *
+ * The value is read from appropriate PMS violation status register and thus might be 0 if the interrupt is not currently active.
+ *
+ * @param mem_type Memory type
+ * @param[out] world PMS World type (see esp_mprot_pms_world_t)
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer(s)
+ *         ESP_ERR_MEMPROT_WORLD_INVALID on invalid World identifier fetched from the register
+ */
+esp_err_t esp_mprot_get_violate_world(const esp_mprot_mem_t mem_type, esp_mprot_pms_world_t *world, int const *const core);
+
+/**
+ * @brief Returns an operation type which caused the violation interrupt
+ *
+ * The operation resolving is processed over various PMS status register flags, according to given Memory type argument.
+ * If the interrupt is not active the result returned is irrelevant (likely evaluated to MEMPROT_OP_READ).
+ *
+ * @param mem_type Memory type
+ * @param[out] oper Operation type (see MEMPROT_OP_* defines)
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid oper pointer
+ */
+esp_err_t esp_mprot_get_violate_operation(const esp_mprot_mem_t mem_type, uint32_t *oper, int const *const core);
+
+/**
+ * @brief Checks whether given memory type supports byte-enables info
+ *
+ * Byte-enables status is available only for DMA/DRAM operations
+  *
+ * @param mem_type memory type
+ *
+ * @return byte-enables info available true/false
+ */
+bool esp_mprot_has_byte_enables(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Returns byte-enables for the address which caused the violation interrupt
+ *
+ * The value is taken from appropriate PMS violation status register, based on given Memory type
+ *
+ * @param mem_type Memory type (MEMPROT_TYPE_DRAM0_SRAM)
+ * @param[out] byte_en Byte-enables bits
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARGUMENT on invalid byte_en pointer
+ */
+esp_err_t esp_mprot_get_violate_byte_enables(const esp_mprot_mem_t mem_type, uint32_t *byte_en, int const *const core);
+
+/**
+ * @brief Convenient routine for setting the PMS defaults
+ *
+ * Called on system startup, depending on ESP_SYSTEM_MEMPROT_FEATURE Kconfig value
+ *
+ * @param memp_config pointer to Memprot configuration structure (esp_memp_config_t). The structure si chip-specific,
+ * for details and defaults see appropriate [target-chip]/soc_memprot_types.h
+ *
+ * @return ESP_OK on success
+ *         Other failures: error code of the failing routine called internally. No specific error processing provided in such a case
+ *         due to large number of embedded calls (ie no global unique error table is provided and thus one error code can have different meanings,
+ *         depending on the routine issuing the error)
+ */
+esp_err_t esp_mprot_set_prot(const esp_memp_config_t *memp_config);
+
+/**
+ * @brief Generates PMS configuration string of actual device (diagnostics)
+ *
+ * The functions generates a string from current configuration, control and status registers of the PMS (or similar) module of actual device.
+ * The values are fetched using HAL LL calls to help finding possible errors in the Memprot API implementation
+ *
+ * @param[out] dump_info_string configuration string buffer pointer. The string is allocated by the callee and must be freed by the caller.
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_NO_MEM on buffer allocation failure
+ *         ESP_ERR_INVALID_ARGUMENT on invalid dump_info_string pointer
+ */
+esp_err_t esp_mprot_dump_configuration(char **dump_info_string);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_memprot_err.h b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_memprot_err.h
new file mode 100644
index 00000000000..5556d2c8894
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_memprot_err.h
@@ -0,0 +1,28 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+*
+* SPDX-License-Identifier: Apache-2.0
+*/
+
+#pragma once
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief ESP Memprot API error code definition
+*/
+#define ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID     (ESP_ERR_MEMPROT_BASE + 1)   /**< Memory type invalid in given context */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID      (ESP_ERR_MEMPROT_BASE + 2)   /**< Splitting address invalid in given context */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_OUT_OF_RANGE (ESP_ERR_MEMPROT_BASE + 3)   /**< Splitting address out of range */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_UNALIGNED    (ESP_ERR_MEMPROT_BASE + 4)   /**< Splitting address not aligned to required boundaries */
+#define ESP_ERR_MEMPROT_UNIMGMT_BLOCK_INVALID   (ESP_ERR_MEMPROT_BASE + 5)   /**< Required unified-management block is not valid */
+#define ESP_ERR_MEMPROT_WORLD_INVALID           (ESP_ERR_MEMPROT_BASE + 6)   /**< Required World identifier is not valid */
+#define ESP_ERR_MEMPROT_AREA_INVALID            (ESP_ERR_MEMPROT_BASE + 7)   /**< Required Area identifier is not valid */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_memprot_types.h b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_memprot_types.h
new file mode 100644
index 00000000000..e37fee54578
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_memprot_types.h
@@ -0,0 +1,36 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief PMS World type (attribute per PMS area, similar to x86 Ring scheme)
+ */
+typedef enum {
+    MEMPROT_PMS_WORLD_NONE                      = 0x00000000,
+    MEMPROT_PMS_WORLD_0                         = 0x00000001,
+    MEMPROT_PMS_WORLD_1                         = 0x00000002,
+    MEMPROT_PMS_WORLD_2                         = 0x00000004,
+    MEMPROT_PMS_WORLD_ALL                       = 0x7FFFFFFF,
+    MEMPROT_PMS_WORLD_INVALID                   = 0x80000000
+} esp_mprot_pms_world_t;
+
+/**
+ * @brief Memory operation/permission type recognized by PMS
+ */
+#define MEMPROT_OP_NONE                         0x00000000
+#define MEMPROT_OP_READ                         0x00000001
+#define MEMPROT_OP_WRITE                        0x00000002
+#define MEMPROT_OP_EXEC                         0x00000004
+#define MEMPROT_OP_INVALID                      0x80000000
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_private/esp_memprot_internal.h b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_private/esp_memprot_internal.h
new file mode 100644
index 00000000000..caeb7584862
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_private/esp_memprot_internal.h
@@ -0,0 +1,199 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_err.h"
+#include "esp_memprot_err.h"
+#include "hal/memprot_types.h"
+#include "soc_memprot_types.h"
+#include "esp_memprot_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief Convert Memprot low level errors to esp_err_t
+*/
+esp_err_t esp_mprot_ll_err_to_esp_err(const memprot_ll_err_t err);
+
+/**
+ * @brief Convert Memprot low level PMS World IDs to esp_mprot_pms_world_t
+ */
+esp_mprot_pms_world_t esp_mprot_ll_world_to_hl_world(const memprot_ll_world_t world);
+
+/**
+ * @brief Converts operation type to string, no combination of operations allowed
+ *
+ * @param oper_type PMS operation type
+ */
+const char *esp_mprot_oper_type_to_str(const uint32_t oper_type);
+
+/**
+ * @brief Converts PMS World type to string
+ *
+ * @param area_type PMS World type
+ */
+const char *esp_mprot_pms_world_to_str(const esp_mprot_pms_world_t world_type);
+
+/**
+ * @brief Sets splitting address for given line type in the target Memory type
+ *
+ * @param mem_type memory type
+ * @param line_type split address type
+ * @param line_addr target address from a memory range relevant to given line_addr
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID on invalid line_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_OUT_OF_RANGE on splitting line out of given memory-type range
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_UNALIGNED on splitting line not aligned to PMS-required boundaries
+ */
+esp_err_t esp_mprot_set_split_addr(const esp_mprot_mem_t mem_type, const esp_mprot_split_addr_t line_type, const void *line_addr);
+
+/**
+ * @brief Gets PMS splitting address for given split_addr type
+ *
+ * The value is read from the PMS configuration registers
+ *
+ * @param mem_type memory type
+ * @param line_type Split line type (see esp_mprot_split_addr_t enum)
+ * @param[out] line_addr Split line address from the configuration register
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on line_addr is pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID on invalid line_type
+ */
+esp_err_t esp_mprot_get_split_addr(const esp_mprot_mem_t mem_type, const esp_mprot_split_addr_t line_type, void **line_addr);
+
+/**
+ * @brief Returns default main I/D splitting address for given Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] def_split_addr Main I/D splitting address of required mem_type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid def_split_addr pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_get_default_main_split_addr(const esp_mprot_mem_t mem_type, void **def_split_addr);
+
+/**
+ * @brief Sets a lock for the main IRAM/DRAM splitting addresses
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_split_addr_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for the splitting address configuration of given Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARGUMENT on invalid locked pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_get_split_addr_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Sets a lock for PMS Area settings of required Memory type
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_pms_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS Area settings of required Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARGUMENT on invalid locked pointer
+ */
+esp_err_t esp_mprot_get_pms_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Sets permissions for given PMS Area
+ *
+ * @param area_type PMS area type
+ * @param flags combination of MEMPROT_OP_* defines
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_pms_area(const esp_mprot_pms_area_t area_type, const uint32_t flags);
+
+/**
+ * @brief Gets current permissions for given PMS Area
+ *
+ * @param area_type PMS area type
+ * @param[out] flags combination of MEMPROT_OP_* defines
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid flags pointer
+ */
+esp_err_t esp_mprot_get_pms_area(const esp_mprot_pms_area_t area_type, uint32_t *flags);
+
+/**
+ * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type (see esp_mprot_mem_t enum)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_monitor_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid locked pointer
+ */
+esp_err_t esp_mprot_get_monitor_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Enable PMS violation interrupt monitoring of required Memory type
+ *
+ * @param mem_type memory type
+ * @param enable enable/disable violation interrupt monitoring
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_monitor_en(const esp_mprot_mem_t mem_type, const bool enable);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/memprot.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/memprot.h
deleted file mode 100644
index 818cd677dc8..00000000000
--- a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/memprot.h
+++ /dev/null
@@ -1,449 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-
-/* INTERNAL API
- * generic interface to PMS memory protection features
- */
-
-#pragma once
-
-#include <stdbool.h>
-#include <stdint.h>
-
-#include "esp_attr.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifndef IRAM_SRAM_START
-#define IRAM_SRAM_START             0x4037C000
-#endif
-
-#ifndef DRAM_SRAM_START
-#define DRAM_SRAM_START             0x3FC7C000
-#endif
-
-#ifndef MAP_DRAM_TO_IRAM
-#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + IRAM_SRAM_START)
-#endif
-
-#ifndef MAP_IRAM_TO_DRAM
-#define MAP_IRAM_TO_DRAM(addr)       (addr - IRAM_SRAM_START + DRAM_SRAM_START)
-#endif
-
-typedef enum {
-    MEMPROT_NONE =              0x00000000,
-    MEMPROT_IRAM0_SRAM =        0x00000001,
-    MEMPROT_DRAM0_SRAM =        0x00000002,
-    MEMPROT_ALL =               0xFFFFFFFF
-} mem_type_prot_t;
-
-typedef enum {
-    MEMPROT_SPLITLINE_NONE = 0,
-    MEMPROT_IRAM0_DRAM0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_1_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
-} split_line_t;
-
-typedef enum {
-    MEMPROT_PMS_AREA_NONE = 0,
-    MEMPROT_IRAM0_PMS_AREA_0,
-    MEMPROT_IRAM0_PMS_AREA_1,
-    MEMPROT_IRAM0_PMS_AREA_2,
-    MEMPROT_IRAM0_PMS_AREA_3,
-    MEMPROT_DRAM0_PMS_AREA_0,
-    MEMPROT_DRAM0_PMS_AREA_1,
-    MEMPROT_DRAM0_PMS_AREA_2,
-    MEMPROT_DRAM0_PMS_AREA_3
-} pms_area_t;
-
-typedef enum
-{
-    MEMPROT_PMS_WORLD_0 = 0,
-    MEMPROT_PMS_WORLD_1,
-    MEMPROT_PMS_WORLD_2,
-    MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
-} pms_world_t;
-
-typedef enum
-{
-    MEMPROT_PMS_OP_READ = 0,
-    MEMPROT_PMS_OP_WRITE,
-    MEMPROT_PMS_OP_FETCH,
-    MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
-} pms_operation_type_t;
-
-/**
- * @brief Converts Memory protection type to string
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
-
-/**
- * @brief Converts Split line type to string
- *
- * @param line_type Split line type (see split_line_t enum)
- */
-const char *esp_memprot_split_line_to_str(split_line_t line_type);
-
-/**
- * @brief Converts PMS Area type to string
- *
- * @param area_type PMS Area type (see pms_area_t enum)
- */
-const char *esp_memprot_pms_to_str(pms_area_t area_type);
-
-/**
- * @brief Returns PMS splitting address for given Split line type
- *
- * The value is taken from PMS configuration registers (IRam0 range)
- * For details on split lines see 'esp_memprot_set_prot_int' function description
- *
- * @param line_type Split line type (see split_line_t enum)
- *
- * @return appropriate split line address
- */
-uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
-
-/**
- * @brief Returns default main IRAM/DRAM splitting address
- *
- * The address value is given by _iram_text_end global (IRam0 range)
-
- * @return Main I/D split line (IRam0_DRam0_Split_Addr)
- */
-void *esp_memprot_get_default_main_split_addr(void);
-
-/**
- * @brief Sets a lock for the main IRAM/DRAM splitting address
- *
- * Locks can be unlocked only by digital system reset
- */
-void esp_memprot_set_split_line_lock(void);
-
-/**
- * @brief Gets a lock status for the main IRAM/DRAM splitting address
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_split_line_lock(void);
-
-/**
- * @brief Sets required split line address
- *
- * @param line_type Split line type (see split_line_t enum)
- * @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
- */
-void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
-
-/**
- * @brief Sets a lock for PMS Area settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS Area settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- * @param x Execute permission flag
- */
-void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
-
-/**
- * @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- * @param x Execute permission flag holder
- */
-void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
-
-/**
- * @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- */
-void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
-
-/**
- * @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- */
-void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
-
-/**
- * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Enable PMS violation interrupt monitoring of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- * @param enable/disable
- */
-void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
-
-/**
- * @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (enabled/disabled)
- */
-bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets CPU ID for currently active PMS violation interrupt
- *
- * @return CPU ID (CPU_PRO for ESP32C3)
- */
-int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
-
-/**
- * @brief Clears current interrupt ON flag for given Memory type
- *
- * Interrupt clearing happens in two steps:
- *      1. Interrupt CLR flag is set (to clear the interrupt ON status)
- *      2. Interrupt CLR flag is reset (to allow further monitoring)
- * This operation is non-atomic by PMS module design
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns active PMS violation interrupt (if any)
- *
- * This function iterates through supported Memory type status registers
- * and returns the first interrupt-on flag. If none is found active,
- * MEMPROT_NONE is returned.
- * Order of checking (in current version):
- *      1. MEMPROT_IRAM0_SRAM
- *      2. MEMPROT_DRAM0_SRAM
- *
- * @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
- */
-mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
-
-/**
- * @brief Checks whether any violation interrupt is active
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_locked_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the address which caused the violation interrupt (if any)
- *
- * The address is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return faulting address
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the World identifier of the code causing the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return World identifier (see pms_world_t enum)
- */
-pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns Read or Write operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
- */
-pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- * Effective only on IRam0 access
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (LoadStore bit on/off)
- */
-bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns byte-enables for the address which caused the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return byte-enables
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns raw contents of DRam0 status register 1
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
-
-/**
- * @brief Returns raw contents of DRam0 status register 2
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
-
-/**
- * @brief Returns raw contents of IRam0 status register
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
-
-/**
- * @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
- *
- * Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
- * The registration makes the panic-handler routine being called when the interrupt appears
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
-
-/**
- * @brief Convenient routine for setting the PMS defaults
- *
- * Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
- * For implementation details see 'esp_memprot_set_prot_int' description
- *
- * @param invoke_panic_handler register all interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
- */
-void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
-
-/**
- * @brief Internal routine for setting the PMS defaults
- *
- * Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
- * (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
- * is used (&_iram_text_end) and all the remaining lines share the same address.
- * The function sets all the split lines and PMS areas to the same space,
- * ie there is a single instruction space and single data space at the end.
- * The PMS split lines and permission areas scheme described below:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                    ...       |                 IRam0_PMS_0                 |
- *               DRam0_PMS_0   -----------------------------------------------    IRam0_line1_Split_addr
- *                    ...       |                 IRam0_PMS_1                 |
- *                    ...       -----------------------------------------------   IRam0_line0_Split_addr
- *                              |                 IRam0_PMS_2                 |
- *                              ===============================================   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 DRam0_PMS_1                 |
- * DRam0_DMA_line0_Split_addr   -----------------------------------------------       ...
- *                              |                 DRam0_PMS_2                 |       ...
- * DRam0_DMA_line1_Split_addr   -----------------------------------------------   IRam0_PMS_3
- *                              |                 DRam0_PMS_3                 |       ...
- *                              -----------------------------------------------
- *
- * Default settings provided by 'esp_memprot_set_prot_int' are as follows:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                              |   IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2   |
- *                              |                 DRam0_PMS_0                 |   IRam0_line1_Split_addr
- * DRam0_DMA_line0_Split_addr   |                                             |             =
- *               =              ===============================================   IRam0_line0_Split_addr
- * DRam0_DMA_line1_Split_addr   |                                             |             =
- *                              |   DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3   |   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 IRam0_PMS_3                 |
- *                              -----------------------------------------------
- *
- * Once the memprot feature is locked, it can be unlocked only by digital system reset
- *
- * @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
- */
-void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
-
-/**
- * @brief Returns raw contents of PMS interrupt monitor register for given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return 32-bit register value
- */
-uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h
new file mode 100644
index 00000000000..318c6109617
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h
@@ -0,0 +1,175 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-C3 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_IRAM0_SRAM                     = 0x00000001,
+    MEMPROT_TYPE_DRAM0_SRAM                     = 0x00000002,
+    MEMPROT_TYPE_IRAM0_RTCFAST                  = 0x00000004,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000,
+    MEMPROT_TYPE_IRAM0_ANY                      = MEMPROT_TYPE_IRAM0_SRAM | MEMPROT_TYPE_IRAM0_RTCFAST
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_IRAM0_DRAM0              = 0x00000001,
+    MEMPROT_SPLIT_ADDR_IRAM0_LINE_0             = 0x00000002,
+    MEMPROT_SPLIT_ADDR_IRAM0_LINE_1             = 0x00000004,
+    MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_0         = 0x00000008,
+    MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_1         = 0x00000010,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000,
+    MEMPROT_SPLIT_ADDR_MAIN                     = MEMPROT_SPLIT_ADDR_IRAM0_DRAM0
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_IRAM0_0                    = 0x00000001,
+    MEMPROT_PMS_AREA_IRAM0_1                    = 0x00000002,
+    MEMPROT_PMS_AREA_IRAM0_2                    = 0x00000004,
+    MEMPROT_PMS_AREA_IRAM0_3                    = 0x00000008,
+    MEMPROT_PMS_AREA_DRAM0_0                    = 0x00000010,
+    MEMPROT_PMS_AREA_DRAM0_1                    = 0x00000020,
+    MEMPROT_PMS_AREA_DRAM0_2                    = 0x00000040,
+    MEMPROT_PMS_AREA_DRAM0_3                    = 0x00000080,
+    MEMPROT_PMS_AREA_IRAM0_RTCFAST_LO           = 0x00000100,
+    MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI           = 0x00000200,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "NONE";
+    case MEMPROT_TYPE_IRAM0_SRAM:
+        return "IRAM0_SRAM";
+    case MEMPROT_TYPE_DRAM0_SRAM:
+        return "DRAM0_SRAM";
+    case MEMPROT_TYPE_IRAM0_RTCFAST:
+        return "IRAM0_RTCFAST";
+    case MEMPROT_TYPE_IRAM0_ANY:
+        return "IRAM0_ANY";
+    case MEMPROT_TYPE_ALL:
+        return "ALL";
+    default:
+        return "INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_IRAM0_DRAM0:
+        return "SPLIT_ADDR_IRAM0_DRAM0";
+    case MEMPROT_SPLIT_ADDR_IRAM0_LINE_0:
+        return "SPLIT_ADDR_IRAM0_LINE_0";
+    case MEMPROT_SPLIT_ADDR_IRAM0_LINE_1:
+        return "SPLIT_ADDR_IRAM0_LINE_1";
+    case MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_0:
+        return "SPLIT_ADDR_DRAM0_DMA_LINE_0";
+    case MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_1:
+        return "SPLIT_ADDR_DRAM0_DMA_LINE_1";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "SPLIT_ADDR_ALL";
+    default:
+        return "SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_IRAM0_0:
+        return "PMS_AREA_IRAM0_0";
+    case MEMPROT_PMS_AREA_IRAM0_1:
+        return "PMS_AREA_IRAM0_1";
+    case MEMPROT_PMS_AREA_IRAM0_2:
+        return "PMS_AREA_IRAM0_2";
+    case MEMPROT_PMS_AREA_IRAM0_3:
+        return "PMS_AREA_IRAM0_3";
+    case MEMPROT_PMS_AREA_DRAM0_0:
+        return "PMS_AREA_DRAM0_0";
+    case MEMPROT_PMS_AREA_DRAM0_1:
+        return "PMS_AREA_DRAM0_1";
+    case MEMPROT_PMS_AREA_DRAM0_2:
+        return "PMS_AREA_DRAM0_2";
+    case MEMPROT_PMS_AREA_DRAM0_3:
+        return "PMS_AREA_DRAM0_3";
+    case MEMPROT_PMS_AREA_IRAM0_RTCFAST_LO:
+        return "PMS_AREA_IRAM0_RTCFAST_LO";
+    case MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI:
+        return "PMS_AREA_IRAM0_RTCFAST_HI";
+    case MEMPROT_PMS_AREA_ALL:
+        return "PMS_AREA_ALL";
+    default:
+        return "PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/memprot.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/memprot.h
deleted file mode 100644
index 75228580ffd..00000000000
--- a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/memprot.h
+++ /dev/null
@@ -1,448 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-
-/* INTERNAL API
- * generic interface to PMS memory protection features
- */
-
-#pragma once
-
-#include <stdbool.h>
-#include <stdint.h>
-#include "esp_attr.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifndef IRAM_SRAM_START
-#define IRAM_SRAM_START             0x4037C000
-#endif
-
-#ifndef DRAM_SRAM_START
-#define DRAM_SRAM_START             0x3FC7C000
-#endif
-
-#ifndef MAP_DRAM_TO_IRAM
-#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + IRAM_SRAM_START)
-#endif
-
-#ifndef MAP_IRAM_TO_DRAM
-#define MAP_IRAM_TO_DRAM(addr)       (addr - IRAM_SRAM_START + DRAM_SRAM_START)
-#endif
-
-typedef enum {
-    MEMPROT_NONE =              0x00000000,
-    MEMPROT_IRAM0_SRAM =        0x00000001,
-    MEMPROT_DRAM0_SRAM =        0x00000002,
-    MEMPROT_ALL =               0xFFFFFFFF
-} mem_type_prot_t;
-
-typedef enum {
-    MEMPROT_SPLITLINE_NONE = 0,
-    MEMPROT_IRAM0_DRAM0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_0_SPLITLINE,
-    MEMPROT_IRAM0_LINE_1_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
-    MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
-} split_line_t;
-
-typedef enum {
-    MEMPROT_PMS_AREA_NONE = 0,
-    MEMPROT_IRAM0_PMS_AREA_0,
-    MEMPROT_IRAM0_PMS_AREA_1,
-    MEMPROT_IRAM0_PMS_AREA_2,
-    MEMPROT_IRAM0_PMS_AREA_3,
-    MEMPROT_DRAM0_PMS_AREA_0,
-    MEMPROT_DRAM0_PMS_AREA_1,
-    MEMPROT_DRAM0_PMS_AREA_2,
-    MEMPROT_DRAM0_PMS_AREA_3
-} pms_area_t;
-
-typedef enum
-{
-    MEMPROT_PMS_WORLD_0 = 0,
-    MEMPROT_PMS_WORLD_1,
-    MEMPROT_PMS_WORLD_2,
-    MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
-} pms_world_t;
-
-typedef enum
-{
-    MEMPROT_PMS_OP_READ = 0,
-    MEMPROT_PMS_OP_WRITE,
-    MEMPROT_PMS_OP_FETCH,
-    MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
-} pms_operation_type_t;
-
-/**
- * @brief Converts Memory protection type to string
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
-
-/**
- * @brief Converts Split line type to string
- *
- * @param line_type Split line type (see split_line_t enum)
- */
-const char *esp_memprot_split_line_to_str(split_line_t line_type);
-
-/**
- * @brief Converts PMS Area type to string
- *
- * @param area_type PMS Area type (see pms_area_t enum)
- */
-const char *esp_memprot_pms_to_str(pms_area_t area_type);
-
-/**
- * @brief Returns PMS splitting address for given Split line type
- *
- * The value is taken from PMS configuration registers (IRam0 range)
- * For details on split lines see 'esp_memprot_set_prot_int' function description
- *
- * @param line_type Split line type (see split_line_t enum)
- *
- * @return appropriate split line address
- */
-uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
-
-/**
- * @brief Returns default main IRAM/DRAM splitting address
- *
- * The address value is given by _iram_text_end global (IRam0 range)
-
- * @return Main I/D split line (IRam0_DRam0_Split_Addr)
- */
-void *esp_memprot_get_default_main_split_addr(void);
-
-/**
- * @brief Sets a lock for the main IRAM/DRAM splitting address
- *
- * Locks can be unlocked only by digital system reset
- */
-void esp_memprot_set_split_line_lock(void);
-
-/**
- * @brief Gets a lock status for the main IRAM/DRAM splitting address
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_split_line_lock(void);
-
-/**
- * @brief Sets required split line address
- *
- * @param line_type Split line type (see split_line_t enum)
- * @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
- */
-void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
-
-/**
- * @brief Sets a lock for PMS Area settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS Area settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- * @param x Execute permission flag
- */
-void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
-
-/**
- * @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
- *
- * @param area_type IRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- * @param x Execute permission flag holder
- */
-void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
-
-/**
- * @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag
- * @param w Write permission flag
- */
-void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
-
-/**
- * @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
- *
- * @param area_type DRam0 PMS Area type (see pms_area_t enum)
- * @param r Read permission flag holder
- * @param w Write permission flag holder
- */
-void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
-
-/**
- * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Enable PMS violation interrupt monitoring of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- * @param enable/disable
- */
-void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
-
-/**
- * @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (enabled/disabled)
- */
-bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets CPU ID for currently active PMS violation interrupt
- *
- * @return CPU ID (CPU_PRO for ESP32H2)
- */
-int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
-
-/**
- * @brief Clears current interrupt ON flag for given Memory type
- *
- * Interrupt clearing happens in two steps:
- *      1. Interrupt CLR flag is set (to clear the interrupt ON status)
- *      2. Interrupt CLR flag is reset (to allow further monitoring)
- * This operation is non-atomic by PMS module design
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns active PMS violation interrupt (if any)
- *
- * This function iterates through supported Memory type status registers
- * and returns the first interrupt-on flag. If none is found active,
- * MEMPROT_NONE is returned.
- * Order of checking (in current version):
- *      1. MEMPROT_IRAM0_SRAM
- *      2. MEMPROT_DRAM0_SRAM
- *
- * @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
- */
-mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
-
-/**
- * @brief Checks whether any violation interrupt is active
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_locked_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
-
-/**
- * @brief Checks whether any violation interrupt is enabled
- *
- * @return true/false (yes/no)
- */
-bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the address which caused the violation interrupt (if any)
- *
- * The address is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return faulting address
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the World identifier of the code causing the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return World identifier (see pms_world_t enum)
- */
-pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns Read or Write operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
- */
-pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
- *
- * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
- * Effective only on IRam0 access
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return true/false (LoadStore bit on/off)
- */
-bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns byte-enables for the address which caused the violation interrupt (if any)
- *
- * The value is taken from appropriate PMS violation status register, based given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return byte-enables
- */
-uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns raw contents of DRam0 status register 1
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
-
-/**
- * @brief Returns raw contents of DRam0 status register 2
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
-
-/**
- * @brief Returns raw contents of IRam0 status register
- *
- * @return 32-bit register value
- */
-uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
-
-/**
- * @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
- *
- * Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
- * The registration makes the panic-handler routine being called when the interrupt appears
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
-
-/**
- * @brief Convenient routine for setting the PMS defaults
- *
- * Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
- * For implementation details see 'esp_memprot_set_prot_int' description
- *
- * @param invoke_panic_handler register all interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
- */
-void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
-
-/**
- * @brief Internal routine for setting the PMS defaults
- *
- * Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
- * (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
- * is used (&_iram_text_end) and all the remaining lines share the same address.
- * The function sets all the split lines and PMS areas to the same space,
- * ie there is a single instruction space and single data space at the end.
- * The PMS split lines and permission areas scheme described below:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                    ...       |                 IRam0_PMS_0                 |
- *               DRam0_PMS_0   -----------------------------------------------    IRam0_line1_Split_addr
- *                    ...       |                 IRam0_PMS_1                 |
- *                    ...       -----------------------------------------------   IRam0_line0_Split_addr
- *                              |                 IRam0_PMS_2                 |
- *                              ===============================================   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 DRam0_PMS_1                 |
- * DRam0_DMA_line0_Split_addr   -----------------------------------------------       ...
- *                              |                 DRam0_PMS_2                 |       ...
- * DRam0_DMA_line1_Split_addr   -----------------------------------------------   IRam0_PMS_3
- *                              |                 DRam0_PMS_3                 |       ...
- *                              -----------------------------------------------
- *
- * Default settings provided by 'esp_memprot_set_prot_int' are as follows:
- *
- *                            DRam0/DMA                                     IRam0
- *                              -----------------------------------------------
- *                              |   IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2   |
- *                              |                 DRam0_PMS_0                 |   IRam0_line1_Split_addr
- * DRam0_DMA_line0_Split_addr   |                                             |             =
- *               =              ===============================================   IRam0_line0_Split_addr
- * DRam0_DMA_line1_Split_addr   |                                             |             =
- *                              |   DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3   |   IRam0_DRam0_Split_addr (main I/D)
- *                              |                 IRam0_PMS_3                 |
- *                              -----------------------------------------------
- *
- * Once the memprot feature is locked, it can be unlocked only by digital system reset
- *
- * @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
- * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
- * @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
- * @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
- */
-void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
-
-/**
- * @brief Returns raw contents of PMS interrupt monitor register for given Memory type
- *
- * @param mem_type Memory protection type (see mem_type_prot_t enum)
- *
- * @return 32-bit register value
- */
-uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h
new file mode 100644
index 00000000000..3048088eba4
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-H2 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() {\
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h
new file mode 100644
index 00000000000..f17e2143133
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-S2 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/memprot.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/memprot.h
deleted file mode 100644
index 948e0676680..00000000000
--- a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/memprot.h
+++ /dev/null
@@ -1,484 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-
-/* INTERNAL API
- * generic interface to MMU memory protection features
- */
-
-#pragma once
-#include <stdbool.h>
-#include <stdint.h>
-#include "esp_attr.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
-    MEMPROT_NONE =              0x00000000,
-    MEMPROT_IRAM0_SRAM =        0x00000001,
-    MEMPROT_DRAM0_SRAM =        0x00000002,
-    MEMPROT_IRAM0_RTCFAST =     0x00000004,
-    MEMPROT_DRAM0_RTCFAST =     0x00000008,
-    MEMPROT_PERI1_RTCSLOW =     0x00000010,
-    MEMPROT_PERI2_RTCSLOW_0 =   0x00000020,
-    MEMPROT_PERI2_RTCSLOW_1 =   0x00000040,
-    MEMPROT_ALL =               0xFFFFFFFF
-} mem_type_prot_t;
-
-
-/**
- * @brief Returns splitting address for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Splitting address for the memory region required.
- * The address is given by region-specific global symbol exported from linker script,
- * it is not read out from related configuration register.
- */
-uint32_t *IRAM_ATTR esp_memprot_get_split_addr(mem_type_prot_t mem_type);
-
-/**
- * @brief Initializes illegal memory access control (MMU) for required memory section.
- *
- * All memory access interrupts share ETS_MEMACCESS_ERR_INUM input channel, it is caller's
- * responsibility to properly detect actual intr. source as well as possible prioritization in case
- * of multiple source reported during one intr.handling routine run
- *
- *  @param mem_type Memory protection area type (see mem_type_prot_t enum)
- */
-void esp_memprot_intr_init(mem_type_prot_t mem_type);
-
-/**
- * @brief Enable/disable the memory protection interrupt
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param enable enable/disable
- */
-void esp_memprot_intr_ena(mem_type_prot_t mem_type, bool enable);
-
-/**
- * @brief Sets a request for clearing interrupt-on flag for specified memory region (register write)
- *
- * @note When called without actual interrupt-on flag set, subsequent occurrence of related interrupt is ignored.
- * Should be used only after the real interrupt appears, typically as the last step in interrupt handler's routine.
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- */
-void esp_memprot_clear_intr(mem_type_prot_t mem_type);
-
-/**
- * @brief Detects which memory protection interrupt is active
- *
- * @note Check order
- *          MEMPROT_IRAM0_SRAM
- *          MEMPROT_IRAM0_RTCFAST
- *          MEMPROT_DRAM0_SRAM
- *          MEMPROT_DRAM0_RTCFAST
- *
- * @return Memory protection area type (see mem_type_prot_t enum)
- */
-mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
-
-/**
- * @brief Gets interrupt status register contents for specified memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Contents of status register
- */
-uint32_t esp_memprot_get_fault_reg(mem_type_prot_t mem_type);
-
-/**
- * @brief Get details of given interrupt status
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param faulting_address Faulting address causing the interrupt [out]
- * @param op_type Operation being processed at the faulting address [out]
- *               IRAM0: 0 - read, 1 - write
- *               DRAM0: 0 - read, 1 - write
- * @param op_subtype Additional info for op_type [out]
- *               IRAM0: 0 - instruction segment access, 1 - data segment access
- *               DRAM0: 0 - non-atomic operation, 1 - atomic operation
- */
-void IRAM_ATTR esp_memprot_get_fault_status(mem_type_prot_t mem_type, uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype);
-
-/**
- * @brief Gets string representation of required memory region identifier
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return mem_type as string
- */
-const char *IRAM_ATTR esp_memprot_type_to_str(mem_type_prot_t mem_type);
-
-/**
- * @brief Detects whether any of the interrupt locks is active (requires digital system reset to unlock)
- *
- * @return true/false
- */
-bool esp_memprot_is_locked_any(void);
-
-/**
- * @brief Sets lock for specified memory region.
- *
- * Locks can be unlocked only by digital system reset
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- */
-void esp_memprot_set_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets lock status for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return true/false (locked/unlocked)
- */
-bool esp_memprot_get_lock(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets permission control configuration register contents for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Permission control register contents
- */
-uint32_t esp_memprot_get_conf_reg(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets interrupt permission settings for unified management block
- *
- * Gets interrupt permission settings register contents for required memory region, returns settings for unified management blocks
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Permission settings register contents
- */
-uint32_t esp_memprot_get_perm_uni_reg(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets interrupt permission settings for split management block
- *
- * Gets interrupt permission settings register contents for required memory region, returns settings for split management blocks
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Permission settings register contents
- */
-uint32_t esp_memprot_get_perm_split_reg(mem_type_prot_t mem_type);
-
-/**
- * @brief Detects whether any of the memory protection interrupts is enabled
- *
- * @return true/false
- */
-bool esp_memprot_is_intr_ena_any(void);
-
-/**
- * @brief Gets interrupt-enabled flag for given memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Interrupt-enabled value
- */
-uint32_t esp_memprot_get_intr_ena_bit(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets interrupt-active flag for given memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Interrupt-active value
- */
-uint32_t esp_memprot_get_intr_on_bit(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets interrupt-clear request flag for given memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- *
- * @return Interrupt-clear request value
- */
-uint32_t esp_memprot_get_intr_clr_bit(mem_type_prot_t mem_type);
-
-/**
- * @brief Gets read permission value for specified block and memory region
- *
- * Returns read permission bit value for required unified-management block (0-3) in given memory region.
- * Applicable to all memory types.
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param block Memory block identifier (0-3)
- *
- * @return Read permission value for required block
- */
-uint32_t esp_memprot_get_uni_block_read_bit(mem_type_prot_t mem_type, uint32_t block);
-
-/**
- * @brief Gets write permission value for specified block and memory region
- *
- * Returns write permission bit value for required unified-management block (0-3) in given memory region.
- * Applicable to all memory types.
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param block Memory block identifier (0-3)
- *
- * @return Write permission value for required block
- */
-uint32_t esp_memprot_get_uni_block_write_bit(mem_type_prot_t mem_type, uint32_t block);
-
-/**
- * @brief Gets execute permission value for specified block and memory region
- *
- * Returns execute permission bit value for required unified-management block (0-3) in given memory region.
- * Applicable only to IRAM memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param block Memory block identifier (0-3)
- *
- * @return Execute permission value for required block
- */
-uint32_t esp_memprot_get_uni_block_exec_bit(mem_type_prot_t mem_type, uint32_t block);
-
-/**
- * @brief Sets permissions for specified block in DRAM region
- *
- * Sets Read and Write permission for specified unified-management block (0-3) in given memory region.
- * Applicable only to DRAM memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param block Memory block identifier (0-3)
- * @param write_perm Write permission flag
- * @param read_perm Read permission flag
- */
-void esp_memprot_set_uni_block_perm_dram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm);
-
-/**
- * @brief Sets permissions for high and low memory segment in DRAM region
- *
- * Sets Read and Write permission for both low and high memory segments given by splitting address.
- * The splitting address must be equal to or higher then beginning of block 5
- * Applicable only to DRAM memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param split_addr Address to split the memory region to lower and higher segment
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_set_prot_dram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
-
-/**
- * @brief Sets permissions for specified block in IRAM region
- *
- * Sets Read, Write and Execute permission for specified unified-management block (0-3) in given memory region.
- * Applicable only to IRAM memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param block Memory block identifier (0-3)
- * @param write_perm Write permission flag
- * @param exec_perm Execute permission flag
- */
-void esp_memprot_set_uni_block_perm_iram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm, bool exec_perm);
-
-/**
- * @brief Sets permissions for high and low memory segment in IRAM region
- *
- * Sets Read, Write and Execute permission for both low and high memory segments given by splitting address.
- * The splitting address must be equal to or higher then beginning of block 5
- * Applicable only to IRAM memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param split_addr Address to split the memory region to lower and higher segment
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param lx Low segment Execute permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- * @param hx High segment Execute permission flag
- */
-void esp_memprot_set_prot_iram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
-
-/**
- * @brief Activates memory protection for all supported memory region types
- *
- * @note The feature is disabled when JTAG interface is connected
- *
- * @param invoke_panic_handler map mem.prot interrupt to ETS_MEMACCESS_ERR_INUM and thus invokes panic handler when fired ('true' not suitable for testing)
- * @param lock_feature sets LOCK bit, see esp_memprot_set_lock() ('true' not suitable for testing)
- * @param mem_type_mask holds a set of required memory protection types (bitmask built of mem_type_prot_t). NULL means default (MEMPROT_ALL in this version)
- */
-void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
-
-/**
- * @brief Get permission settings bits for IRAM0 split mgmt. Only IRAM0 memory types allowed
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param lx Low segment Execute permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- * @param hx High segment Execute permission flag
- */
-void esp_memprot_get_perm_split_bits_iram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
-
-/**
- * @brief Get permission settings bits for DRAM0 split mgmt. Only DRAM0 memory types allowed
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_get_perm_split_bits_dram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
-
-/**
- * @brief Sets permissions for high and low memory segment in PERIBUS1 region
- *
- * Sets Read and Write permission for both low and high memory segments given by splitting address.
- * Applicable only to PERIBUS1 memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param split_addr Address to split the memory region to lower and higher segment
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_set_prot_peri1(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
-
-/**
- * @brief Get permission settings bits for PERIBUS1 split mgmt. Only PERIBUS1 memory types allowed
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_get_perm_split_bits_peri1(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
-
-/**
- * @brief Get permission settings bits for PERIBUS2 split mgmt. Only PERIBUS2 memory types allowed
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param lx Low segment Execute permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- * @param hx High segment Execute permission flag
- */
-void esp_memprot_get_perm_split_bits_peri2(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
-
-/**
- * @brief Sets permissions for high and low memory segment in PERIBUS2 region
- *
- * Sets Read Write permission for both low and high memory segments given by splitting address.
- * Applicable only to PERIBUS2 memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param split_addr Address to split the memory region to lower and higher segment
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param lx Low segment Execute permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- * @param hx High segment Execute permission flag
- */
-void esp_memprot_set_prot_peri2(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
-
-/**
- * @brief Get permissions for specified memory type. Irrelevant bits are ignored
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lw Low segment Write permission flag
- * @param lr Low segment Read permission flag
- * @param lx Low segment Execute permission flag
- * @param hw High segment Write permission flag
- * @param hr High segment Read permission flag
- * @param hx High segment Execute permission flag
- */
-void esp_memprot_get_permissions(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
-
-/**
- * @brief Get Read permission settings for low and high regions of given memory type
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Read permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_get_perm_read(mem_type_prot_t mem_type, bool *lr, bool *hr);
-
-/**
- * @brief Get Write permission settings for low and high regions of given memory type
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Write permission flag
- * @param hr High segment Write permission flag
- */
-void esp_memprot_get_perm_write(mem_type_prot_t mem_type, bool *lw, bool *hw);
-
-/**
- * @brief Get Execute permission settings for low and high regions of given memory type
- * Applicable only to IBUS-compatible memory types
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Exec permission flag
- * @param hr High segment Exec permission flag
- */
-void esp_memprot_get_perm_exec(mem_type_prot_t mem_type, bool *lx, bool *hx);
-
-/**
- * @brief Returns the lowest address in required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- */
-uint32_t esp_memprot_get_low_limit(mem_type_prot_t mem_type);
-
-/**
- * @brief Returns the highest address in required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- */
-uint32_t esp_memprot_get_high_limit(mem_type_prot_t mem_type);
-
-/**
- * @brief Sets READ permission bit for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Read permission flag
- * @param hr High segment Read permission flag
- */
-void esp_memprot_set_read_perm(mem_type_prot_t mem_type, bool lr, bool hr);
-
-/**
- * @brief Sets WRITE permission bit for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Write permission flag
- * @param hr High segment Write permission flag
- */
-void esp_memprot_set_write_perm(mem_type_prot_t mem_type, bool lw, bool hw);
-
-/**
- * @brief Sets EXECUTE permission bit for required memory region
- *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Exec permission flag
- * @param hr High segment Exec permission flag
- */
-void esp_memprot_set_exec_perm(mem_type_prot_t mem_type, bool lx, bool hx);
-
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h
new file mode 100644
index 00000000000..06dde33ffad
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h
@@ -0,0 +1,119 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-S3 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+    int target_cpu[];           /*!< Array of CPU/core IDs required to receive given PMS protection */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL,\
+    .target_cpu[] = {PRO_CPU_NUM, APP_CPU_NUM} \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/private_include/regi2c_saradc.h b/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/private_include/regi2c_saradc.h
index 388f9c6221a..2c3738a2210 100644
--- a/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/private_include/regi2c_saradc.h
+++ b/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/private_include/regi2c_saradc.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -73,3 +73,10 @@
 #define I2C_SARADC_TSENS_DAC 0x6
 #define I2C_SARADC_TSENS_DAC_MSB 3
 #define I2C_SARADC_TSENS_DAC_LSB 0
+
+/**
+ * Restore regi2c analog calibration related configuration registers.
+ * This is a workaround, and is fixed on later chips
+ */
+#define REGI2C_ANA_CALI_PD_WORKAROUND    1
+#define REGI2C_ANA_CALI_BYTE_NUM         8
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/regi2c_ctrl.h b/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/regi2c_ctrl.h
index 741c0b1020b..49c247499a2 100644
--- a/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/regi2c_ctrl.h
+++ b/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/regi2c_ctrl.h
@@ -60,6 +60,10 @@ uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_ad
 void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
 void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
 
+/* enter the critical section that protects internal registers. Don't use it in SDK. Use the functions above. */
+void regi2c_enter_critical(void);
+void regi2c_exit_critical(void);
+
 #endif // BOOTLOADER_BUILD
 
 /* Convenience macros for the above functions, these use register definitions
@@ -77,6 +81,16 @@ void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add,
 #define REGI2C_READ(block, reg_add) \
       regi2c_ctrl_read_reg(block, block##_HOSTID,  reg_add)
 
+
+/**
+ * Restore regi2c analog calibration related configuration registers.
+ * This is a workaround, and is fixed on later chips
+ */
+#if REGI2C_ANA_CALI_PD_WORKAROUND
+void regi2c_analog_cali_reg_read(void);
+void regi2c_analog_cali_reg_write(void);
+#endif   //#if ADC_CALI_PD_WORKAROUND
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/esp_ipc/include/esp_ipc.h b/tools/sdk/esp32s2/include/esp_ipc/include/esp_ipc.h
index 5e02c460bce..5307cbcdab1 100644
--- a/tools/sdk/esp32s2/include/esp_ipc/include/esp_ipc.h
+++ b/tools/sdk/esp32s2/include/esp_ipc/include/esp_ipc.h
@@ -12,8 +12,7 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#ifndef __ESP_IPC_H__
-#define __ESP_IPC_H__
+#pragma once
 
 #include <esp_err.h>
 
@@ -23,30 +22,30 @@ extern "C" {
 
 #if !defined(CONFIG_FREERTOS_UNICORE) || defined(CONFIG_APPTRACE_GCOV_ENABLE)
 
-/** @cond */
-typedef void (*esp_ipc_func_t)(void* arg);
-/** @endcond */
 /*
  * Inter-processor call APIs
  *
- * FreeRTOS provides several APIs which can be used to communicate between
- * different tasks, including tasks running on different CPUs.
- * This module provides additional APIs to run some code on the other CPU.
+ * FreeRTOS provides several APIs which can be used to communicate between different tasks, including tasks running on
+ * different CPUs. This module provides additional APIs to run some code on the other CPU. These APIs can only be used
+ * when FreeRTOS scheduler is running.
+ */
+
+/**
+ * @brief IPC Callback
  *
- * These APIs can only be used when FreeRTOS scheduler is running.
+ * A callback of this type should be provided as an argument when calling esp_ipc_call() or esp_ipc_call_blocking().
  */
+typedef void (*esp_ipc_func_t)(void* arg);
 
 /**
- * @brief Execute a function on the given CPU
+ * @brief Execute a callback on a given CPU
+ *
+ * Execute a given callback on a particular CPU. The callback must be of type "esp_ipc_func_t" and will be invoked in
+ * the context of the target CPU's IPC task.
  *
- * Run a given function on a particular CPU. The given function must accept a
- * void* argument and return void. The given function is run in the context of
- * the IPC task of the CPU specified by the cpu_id parameter. The calling task
- * will be blocked until the IPC task begins executing the given function. If
- * another IPC call is ongoing, the calling task will block until the other IPC
- * call completes. The stack size allocated for the IPC task can be configured
- * in the "Inter-Processor Call (IPC) task stack size" setting in menuconfig.
- * Increase this setting if the given function requires more stack than default.
+ * - This function will block the target CPU's IPC task has begun execution of the callback
+ * - If another IPC call is ongoing, this function will block until the ongoing IPC call completes
+ * - The stack size of the IPC task can be configured via the CONFIG_ESP_IPC_TASK_STACK_SIZE option
  *
  * @note In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
  *
@@ -63,17 +62,10 @@ esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
 
 
 /**
- * @brief Execute a function on the given CPU and blocks until it completes
+ * @brief Execute a callback on a given CPU until and block until it completes
  *
- * Run a given function on a particular CPU. The given function must accept a
- * void* argument and return void. The given function is run in the context of
- * the IPC task of the CPU specified by the cpu_id parameter. The calling task
- * will be blocked until the IPC task completes execution of the given function.
- * If another IPC call is ongoing, the calling task will block until the other
- * IPC call completes. The stack size allocated for the IPC task can be
- * configured in the "Inter-Processor Call (IPC) task stack size" setting in
- * menuconfig. Increase this setting if the given function requires more stack
- * than default.
+ * This function is identical to esp_ipc_call() except that this function will block until the execution of the callback
+ * completes.
  *
  * @note    In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
  *
@@ -88,10 +80,8 @@ esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
  */
 esp_err_t esp_ipc_call_blocking(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
 
-#endif // not CONFIG_FREERTOS_UNICORE or CONFIG_APPTRACE_GCOV_ENABLE
+#endif // !defined(CONFIG_FREERTOS_UNICORE) || defined(CONFIG_APPTRACE_GCOV_ENABLE)
 
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* __ESP_IPC_H__ */
diff --git a/tools/sdk/esp32s2/include/esp_ipc/include/esp_ipc_isr.h b/tools/sdk/esp32s2/include/esp_ipc/include/esp_ipc_isr.h
index 7b6e060f1d5..22fa5b10b03 100644
--- a/tools/sdk/esp32s2/include/esp_ipc/include/esp_ipc_isr.h
+++ b/tools/sdk/esp32s2/include/esp_ipc/include/esp_ipc_isr.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -14,31 +14,24 @@ extern "C" {
 
 #ifdef CONFIG_ESP_IPC_ISR_ENABLE
 
-/** @cond */
-typedef void (*esp_ipc_isr_func_t)(void* arg);
-/** @endcond */
-
 /**
- * @brief Initialize inter-processor call module which based on #4 high-interrupt.
- *
- * This function is called on CPU start and should not be called from the application.
+ * @brief IPC ISR Callback
  *
- * This function starts two tasks, one on each CPU. These tasks register
- * #4 High-interrupt and after that, the tasks are deleted.
- * The next API functions work with this functionality:
- * esp_ipc_isr_asm_call
- * esp_ipc_isr_asm_call_blocking
- * They allow to run an asm function on other CPU.
+ * A callback of this type should be provided as an argument when calling esp_ipc_isr_asm_call() or
+ * esp_ipc_isr_asm_call_blocking().
  */
-void esp_ipc_isr_init(void);
+typedef void (*esp_ipc_isr_func_t)(void* arg);
 
 /**
- * @brief Execute an asm function on the other CPU (uses the #4 high-priority interrupt)
+ * @brief Execute an assembly callback on the other CPU
+ *
+ * Execute a given callback on the other CPU in the context of a High Priority Interrupt.
+ *
+ * - This function will busy-wait in a critical section until the other CPU has started execution of the callback
+ * - The callback must be written in assembly, is invoked using a CALLX0 instruction, and has a2, a3, a4 as scratch
+ *   registers. See docs for more details
  *
- * @note In single-core mode, it is not available.
- * This function calls the #4 high-priority interrupt on the other CPU.
- * The given function is called in the context of the interrupt by CALLX0 command and
- * operates with registers a2, a3, a4.
+ * @note This function is not available in single-core mode.
  *
  * @param[in]   func    Pointer to a function of type void func(void* arg) to be executed
  * @param[in]   arg     Arbitrary argument of type void* to be passed into the function
@@ -46,11 +39,12 @@ void esp_ipc_isr_init(void);
 void esp_ipc_isr_asm_call(esp_ipc_isr_func_t func, void* arg);
 
 /**
- * @brief Execute an asm function on the other CPU and blocks until it completes (uses the #4 high-priority interrupt)
+ * @brief Execute an assembly callback on the other CPU and busy-wait until it completes
  *
- * @note In single-core mode, it is not available.
- * This function calls the #4 high-priority interrupt on the other CPU.
- * The given function is called in the context of the interrupt by CALLX0 command.
+ * This function is identical to esp_ipc_isr_asm_call() except that this function will busy-wait until the execution of
+ * the callback completes.
+ *
+ * @note This function is not available in single-core mode.
  *
  * @param[in]   func    Pointer to a function of type void func(void* arg) to be executed
  * @param[in]   arg     Arbitrary argument of type void* to be passed into the function
@@ -58,51 +52,60 @@ void esp_ipc_isr_asm_call(esp_ipc_isr_func_t func, void* arg);
 void esp_ipc_isr_asm_call_blocking(esp_ipc_isr_func_t func, void* arg);
 
 /**
- * @brief Stall the other CPU and the current CPU disables interrupts with level 3 and lower.
+ * @brief Stall the other CPU
  *
- * @note In single-core mode, it is not available.
- * This function calls the #4 high-priority interrupt on the other CPU.
- * The esp_ipc_isr_finish_cmd() function is called on the other CPU in the context of the #4 high-priority interrupt.
- * The esp_ipc_isr_finish_cmd is called by CALLX0 command.
- * It is waiting for the end command. The command will be sent by esp_ipc_isr_release_other_cpu().
- * This function is used for DPORT workaround.
+ * This function will stall the other CPU. The other CPU is stalled by busy-waiting in the context of a High Priority
+ * Interrupt. The other CPU will not be resumed until esp_ipc_isr_release_other_cpu() is called.
  *
- * This function blocks other CPU until the release call esp_ipc_isr_release_other_cpu().
+ * - This function is internally implemented using IPC ISR
+ * - This function is used for DPORT workaround.
+ * - If the stall feature is paused using esp_ipc_isr_stall_pause(), this function will have no effect
  *
- * This fucntion is used for the DPORT workaround: stall other cpu that this cpu is pending to access dport register start.
+ * @note This function is not available in single-core mode.
  */
 void esp_ipc_isr_stall_other_cpu(void);
 
 /**
  * @brief Release the other CPU
  *
- * @note In single-core mode, it is not available.
- * This function will send the end command to release the stall other CPU.
- * This function is used for DPORT workaround: stall other cpu that this cpu is pending to access dport register end.
+ * This function will release the other CPU that was previously stalled from calling esp_ipc_isr_stall_other_cpu()
+ *
+ * - This function is used for DPORT workaround.
+ * - If the stall feature is paused using esp_ipc_isr_stall_pause(), this function will have no effect
  *
+ * @note This function is not available in single-core mode.
  */
 void esp_ipc_isr_release_other_cpu(void);
 
 /**
- * @brief Pause stall the other CPU
+ * @brief Puase the CPU stall feature
+ *
+ * This function will pause the CPU stall feature. Once paused, calls to esp_ipc_isr_stall_other_cpu() and
+ * esp_ipc_isr_release_other_cpu() will have no effect. If a IPC ISR call is already in progress, this function will
+ * busy-wait until the call completes before pausing the CPU stall feature.
  */
 void esp_ipc_isr_stall_pause(void);
 
 /**
- * @brief Abort stall the other CPU
+ * @brief Abort a CPU stall
  *
- * This routine does not stop the stall routines in any way that is recoverable.
- * Please only call in case of panic().
- * Used in panic code: the enter_critical stuff may be messed up so we just stop everything without checking the mux.
+ * This function will abort any stalling routine of the other CPU due to a pervious call to
+ * esp_ipc_isr_stall_other_cpu(). This function aborts the stall in a non-recoverable manner, thus should only be called
+ * in case of a panic().
+ *
+ * - This function is used in panic handling code
  */
 void esp_ipc_isr_stall_abort(void);
 
 /**
- * @brief Resume stall the other CPU
+ * @brief Resume the CPU stall feature
+ *
+ * This function will resume the CPU stall feature that was previously paused by calling esp_ipc_isr_stall_pause(). Once
+ * resumed, calls to esp_ipc_isr_stall_other_cpu() and esp_ipc_isr_release_other_cpu() will have effect again.
  */
 void esp_ipc_isr_stall_resume(void);
 
-#else // not CONFIG_ESP_IPC_ISR_ENABLE
+#else // CONFIG_ESP_IPC_ISR_ENABLE
 
 #define esp_ipc_isr_stall_other_cpu()
 #define esp_ipc_isr_release_other_cpu()
diff --git a/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_rgb.h b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_rgb.h
index 0c264545ee2..6f06deb8165 100644
--- a/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_rgb.h
+++ b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_rgb.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -64,7 +64,7 @@ typedef struct {
         unsigned int hsync_idle_low: 1;  /*!< The hsync signal is low in IDLE state */
         unsigned int vsync_idle_low: 1;  /*!< The vsync signal is low in IDLE state */
         unsigned int de_idle_high: 1;    /*!< The de signal is high in IDLE state */
-        unsigned int pclk_active_neg: 1; /*!< The display will write data lines when there's a falling edge on PCLK */
+        unsigned int pclk_active_neg: 1; /*!< Whether the display data is clocked out at the falling edge of PCLK */
         unsigned int pclk_idle_high: 1;  /*!< The PCLK stays at high level in IDLE phase */
     } flags;
 } esp_lcd_rgb_timing_t;
@@ -92,6 +92,8 @@ typedef struct {
     lcd_clock_source_t clk_src;   /*!< Clock source for the RGB LCD peripheral */
     esp_lcd_rgb_timing_t timings; /*!< RGB timing parameters */
     size_t data_width;            /*!< Number of data lines */
+    size_t sram_trans_align;      /*!< Alignment for framebuffer that allocated in SRAM */
+    size_t psram_trans_align;     /*!< Alignment for framebuffer that allocated in PSRAM */
     int hsync_gpio_num;           /*!< GPIO used for HSYNC signal */
     int vsync_gpio_num;           /*!< GPIO used for VSYNC signal */
     int de_gpio_num;              /*!< GPIO used for DE signal, set to -1 if it's not used */
diff --git a/tools/sdk/esp32s2/include/esp_littlefs/include/esp_littlefs.h b/tools/sdk/esp32s2/include/esp_littlefs/include/esp_littlefs.h
index 7b5abe9248f..07f35231291 100644
--- a/tools/sdk/esp32s2/include/esp_littlefs/include/esp_littlefs.h
+++ b/tools/sdk/esp32s2/include/esp_littlefs/include/esp_littlefs.h
@@ -1,24 +1,9 @@
 #ifndef ESP_LITTLEFS_H__
 #define ESP_LITTLEFS_H__
 
-#include <stdint.h>
-#include <stddef.h>
-#include <stdarg.h>
-#include <unistd.h>
-#include <utime.h>
-#include "freertos/FreeRTOS.h"
-#include "freertos/semphr.h"
 #include "esp_err.h"
-#include <sys/types.h>
-#include <sys/reent.h>
-#include <sys/stat.h>
-#include <sys/time.h>
-#include <sys/poll.h>
-#include <sys/dirent.h>
-#include <string.h>
-#include "sdkconfig.h"
-
 #include "littlefs/lfs.h"
+#include "sdkconfig.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/esp_phy/esp32s2/include/phy_init_data.h b/tools/sdk/esp32s2/include/esp_phy/esp32s2/include/phy_init_data.h
index 55f0cdc4919..e1aa8d46138 100644
--- a/tools/sdk/esp32s2/include/esp_phy/esp32s2/include/phy_init_data.h
+++ b/tools/sdk/esp32s2/include/esp_phy/esp32s2/include/phy_init_data.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -36,64 +36,84 @@ static const char phy_init_magic_pre[] = PHY_INIT_MAGIC;
  * @brief Structure containing default recommended PHY initialization parameters.
  */
 static const esp_phy_init_data_t phy_init_data= { {
-        3,
-        0,
-        0x04,
-        0x05,
-        0x04,
-        0x05,
-        0x05,
-        0x04,
-        0x06,
-        0x06,
-        0x06,
-        0x05,
-        0x06,
+        0x80,
         0x00,
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4E),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4E),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x44),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x44),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x44),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x42),
         0x00,
         0x00,
         0x00,
-        0x05,
-        0x09,
-        0x06,
-        0x05,
-        0x03,
-        0x06,
-        0x05,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0xf4,
-        0xf8,
-        0xf8,
-        0xf0,
-        0xf0,
-        0xf0,
-        0xe0,
-        0xe0,
-        0xe0,
-        0x18,
-        0x18,
-        0x18,
-        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 84),
-        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 72),
-        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 66),
-        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 60),
-        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 56),
-        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 52),
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
         0,
-        1,
-        1,
-        2,
-        2,
-        3,
-        4,
-        5,
         0,
         0,
         0,
@@ -143,6 +163,7 @@ static const esp_phy_init_data_t phy_init_data= { {
         0,
         0,
         0,
+        0xf1
 } };
 
 static const char phy_init_magic_post[] = PHY_INIT_MAGIC;
diff --git a/tools/sdk/esp32s2/include/esp_phy/include/phy.h b/tools/sdk/esp32s2/include/esp_phy/include/phy.h
index e6aa21db50e..c8d1018288d 100644
--- a/tools/sdk/esp32s2/include/esp_phy/include/phy.h
+++ b/tools/sdk/esp32s2/include/esp_phy/include/phy.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -99,6 +99,13 @@ void phy_freq_mem_backup(bool backup_en, uint32_t *mem);
 void phy_bbpll_en_usb(bool en);
 #endif
 
+#if CONFIG_IDF_TARGET_ESP32S2
+/**
+ * @brief Phy version select for ESP32S2
+ */
+void phy_eco_version_sel(uint8_t chip_ver);
+#endif
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_console.h b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_console.h
new file mode 100644
index 00000000000..70c02ffeae0
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_console.h
@@ -0,0 +1,52 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Initialize console
+ *
+ * Initializes serial console and adds basic commands.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failures.
+ */
+esp_err_t esp_rmaker_console_init(void);
+
+/* Reference for adding custom console commands:
+#include <esp_console.h>
+
+static int command_console_handler(int argc, char *argv[])
+{
+    // Command code here
+}
+
+static void register_console_command()
+{
+    const esp_console_cmd_t cmd = {
+        .command = "<command_name>",
+        .help = "<help_details>",
+        .func = &command_console_handler,
+    };
+    ESP_ERROR_CHECK(esp_console_cmd_register(&cmd));
+}
+*/
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_core.h b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_core.h
new file mode 100644
index 00000000000..9dbdbae658b
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_core.h
@@ -0,0 +1,897 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_event.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define ESP_RMAKER_CONFIG_VERSION    "2020-03-20"
+
+/* Maximum length of the alert message that can be passed to esp_rmaker_raise_alert() */
+#define ESP_RMAKER_MAX_ALERT_LEN    100
+
+/** @cond **/
+/** ESP RainMaker Event Base */
+ESP_EVENT_DECLARE_BASE(RMAKER_EVENT);
+/** @endcond **/
+
+/** ESP RainMaker Events */
+typedef enum {
+    /** RainMaker Core Initialisation Done */
+    RMAKER_EVENT_INIT_DONE = 1,
+    /** Self Claiming Started */
+    RMAKER_EVENT_CLAIM_STARTED,
+    /** Self Claiming was Successful */
+    RMAKER_EVENT_CLAIM_SUCCESSFUL,
+    /** Self Claiming Failed */
+    RMAKER_EVENT_CLAIM_FAILED,
+    /** Node side communication for User-Node mapping done.
+     * Actual mapping state will be managed by the ESP RainMaker cloud based on the user side communication.
+     * Associated data is the NULL terminated user id.
+     */
+    RMAKER_EVENT_USER_NODE_MAPPING_DONE,
+    /** Local control started. Associated data is the NULL terminated Service Name */
+    RMAKER_EVENT_LOCAL_CTRL_STARTED,
+    /* User reset request successfully sent to ESP RainMaker Cloud */
+    RMAKER_EVENT_USER_NODE_MAPPING_RESET,
+} esp_rmaker_event_t;
+
+/** ESP RainMaker Node information */
+typedef struct {
+    /** Name of the Node */
+    char *name;
+    /** Type of the Node */
+    char *type;
+    /** Firmware Version (Optional). If not set, PROJECT_VER is used as default (recommended)*/
+    char *fw_version;
+    /** Model (Optional). If not set, PROJECT_NAME is used as default (recommended)*/
+    char *model;
+} esp_rmaker_node_info_t;
+
+/** ESP RainMaker Configuration */
+typedef struct {
+    /** Enable Time Sync
+     * Setting this true will enable SNTP and fetch the current time before
+     * attempting to connect to the ESP RainMaker service
+     */
+    bool enable_time_sync;
+} esp_rmaker_config_t;
+
+/** ESP RainMaker Parameter Value type */
+typedef enum {
+    /** Invalid */
+    RMAKER_VAL_TYPE_INVALID = 0,
+    /** Boolean */
+    RMAKER_VAL_TYPE_BOOLEAN,
+    /** Integer. Mapped to a 32 bit signed integer */
+    RMAKER_VAL_TYPE_INTEGER,
+    /** Floating point number */
+    RMAKER_VAL_TYPE_FLOAT,
+    /** NULL terminated string */
+    RMAKER_VAL_TYPE_STRING,
+    /** NULL terminated JSON Object string Eg. {"name":"value"} */
+    RMAKER_VAL_TYPE_OBJECT,
+    /** NULL terminated JSON Array string Eg. [1,2,3] */
+    RMAKER_VAL_TYPE_ARRAY,
+} esp_rmaker_val_type_t;
+
+/** ESP RainMaker Value */
+typedef union {
+    /** Boolean */
+    bool b;
+    /** Integer */
+    int i;
+    /** Float */
+    float f;
+    /** NULL terminated string */
+    char *s;
+} esp_rmaker_val_t;
+
+/** ESP RainMaker Parameter Value */
+typedef struct {
+    /** Type of Value */
+    esp_rmaker_val_type_t type;
+    /** Actual value. Depends on the type */
+    esp_rmaker_val_t val;
+} esp_rmaker_param_val_t;
+
+/** Param property flags */
+typedef enum {
+    PROP_FLAG_WRITE = (1 << 0),
+    PROP_FLAG_READ = (1 << 1),
+    PROP_FLAG_TIME_SERIES = (1 << 2),
+    PROP_FLAG_PERSIST = (1 << 3)
+} esp_param_property_flags_t;
+
+/** System Service Reboot Flag */
+#define SYSTEM_SERV_FLAG_REBOOT         (1 << 0)
+
+/** System Service Factory Reset Flag */
+#define SYSTEM_SERV_FLAG_FACTORY_RESET  (1 << 1)
+
+/** System Service Wi-Fi Reset Flag */
+#define SYSTEM_SERV_FLAG_WIFI_RESET     (1 << 2)
+
+/** System Service All Flags */
+#define SYSTEM_SERV_FLAGS_ALL   (SYSTEM_SERV_FLAG_REBOOT | SYSTEM_SERV_FLAG_FACTORY_RESET | SYSTEM_SERV_FLAG_WIFI_RESET)
+
+/** Generic ESP RainMaker handle */
+typedef size_t esp_rmaker_handle_t;
+
+/**  ESP RainMaker Node Handle */
+typedef esp_rmaker_handle_t esp_rmaker_node_t;
+
+/**  ESP RainMaker Device Handle */
+typedef esp_rmaker_handle_t esp_rmaker_device_t;
+
+/** ESP RainMaker Parameter Handle */
+typedef esp_rmaker_handle_t esp_rmaker_param_t;
+
+/** Parameter read/write request source */
+typedef enum {
+    /** Request triggered in the init sequence i.e. when a value is found
+     * in persistent memory for parameters with PROP_FLAG_PERSIST.
+     */
+    ESP_RMAKER_REQ_SRC_INIT,
+    /** Request received from cloud */
+    ESP_RMAKER_REQ_SRC_CLOUD,
+    /** Request received when a schedule has triggered */
+    ESP_RMAKER_REQ_SRC_SCHEDULE,
+    /** Request received when a scene has been activated */
+    ESP_RMAKER_REQ_SRC_SCENE_ACTIVATE,
+    /** Request received when a scene has been deactivated */
+    ESP_RMAKER_REQ_SRC_SCENE_DEACTIVATE,
+    /** Request received from a local controller */
+    ESP_RMAKER_REQ_SRC_LOCAL,
+    /** This will always be the last value. Any value equal to or
+     * greater than this should be considered invalid.
+     */
+    ESP_RMAKER_REQ_SRC_MAX,
+} esp_rmaker_req_src_t;
+
+/** Write request Context */
+typedef struct {
+    /** Source of request */
+    esp_rmaker_req_src_t src;
+} esp_rmaker_write_ctx_t;
+
+/** Read request context */
+typedef struct {
+    /** Source of request */
+    esp_rmaker_req_src_t src;
+} esp_rmaker_read_ctx_t;
+
+/** System service configuration */
+typedef struct {
+    /** Logical OR of system service flags (SYSTEM_SERV_FLAG_REBOOT,
+     * SYSTEM_SERV_FLAG_FACTORY_RESET, SYSTEM_SERV_FLAG_WIFI_RESET) as required
+     * or SYSTEM_SERV_FLAGS_ALL.
+     */
+    uint16_t flags;
+    /** Time in seconds after which the device should reboot.
+     * Value of zero would trigger an immediate reboot if a write is received for
+     * the Reboot parameter.
+     * Recommended value: 2
+     */
+    int8_t reboot_seconds;
+    /** Time in seconds after which the device should reset (Wi-Fi or factory).
+     * Value of zero would trigger an immediate action if a write is received for
+     * the Wi-Fi reset or Factory reset parameter.
+     * Recommended value: 2
+     */
+    int8_t reset_seconds;
+    /** Time in seconds after which the device should reboot after it has been reset.
+     * Value of zero would mean that there won't be any reboot after the reset.
+     * Recommended value: 2
+     */
+    int8_t reset_reboot_seconds;
+} esp_rmaker_system_serv_config_t;
+
+/** Callback for parameter value write requests.
+ *
+ * The callback should call the esp_rmaker_param_update_and_report() API if the new value is to be set
+ * and reported back.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ * @param[in] param Pointer to \ref esp_rmaker_param_val_t. Use appropriate elements as per the value type.
+ * @param[in] priv_data Pointer to the private data paassed while creating the device.
+ * @param[in] ctx Context associated with the request.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+typedef esp_err_t (*esp_rmaker_device_write_cb_t)(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param,
+        const esp_rmaker_param_val_t val, void *priv_data, esp_rmaker_write_ctx_t *ctx);
+
+/** Callback for parameter value changes
+ *
+ * The callback should call the esp_rmaker_param_update_and_report() API if the new value is to be set
+ * and reported back.
+ *
+ * @note Currently, the read callback never gets invoked as the communication between clients (mobile phones, CLI, etc.)
+ * and node is asynchronous. So, the read request does not reach the node. This callback will however be used in future.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ * @param[in] priv_data Pointer to the private data passed while creating the device.
+ * @param[in] ctx Context associated with the request.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+typedef esp_err_t (*esp_rmaker_device_read_cb_t)(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param,
+        void *priv_data, esp_rmaker_read_ctx_t *ctx);
+
+/** Convert device callback source to string
+ *
+ * Device read/write callback can be via different sources. This is a helper API
+ * to give the source in string format for printing.
+ *
+ * Example Usage:
+ * @code{c}
+ * static esp_err_t write_cb(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param,
+ * const esp_rmaker_param_val_t val, void *priv_data, esp_rmaker_write_ctx_t *ctx)
+{
+    if (ctx) {
+        ESP_LOGI(TAG, "Received write request via : %s", esp_rmaker_device_cb_src_to_str(ctx->src));
+    }
+ * @endcode
+ *
+ * @param[in] src The src field as received in the callback context.
+ *
+ * @return NULL terminated source string on success
+ * @return NULL on failure
+ */
+const char *esp_rmaker_device_cb_src_to_str(esp_rmaker_req_src_t src);
+
+/**
+ * Initialise a Boolean value
+ *
+ * @param[in] bval Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_bool(bool bval);
+
+/**
+ * Initialise an Integer value
+ *
+ * @param[in] ival Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_int(int ival);
+
+/**
+ * Initialise a Float value
+ *
+ * @param[in] fval Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_float(float fval);
+
+/**
+ * Initialise a String value
+ *
+ * @param[in] sval Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_str(const char *sval);
+
+/**
+ * Initialise a json object value
+ *
+ * @note the object will not be validated internally. it is the application's
+ * responsibility to ensure that the object is a valid json object.
+ * eg. esp_rmaker_obj("{\"name\":\"value\"}");
+ *
+ * param[in] val initialising value
+ *
+ * return value structure
+ */
+esp_rmaker_param_val_t esp_rmaker_obj(const char *val);
+
+/**
+ * Initialise a json array value
+ *
+ * @note the array will not be validated internally. it is the application's
+ * responsibility to ensure that the array is a valid json array.
+ * eg. esp_rmaker_array("[1,2,3]");
+ *
+ * param[in] val initialising value
+ *
+ * return value structure
+ */
+esp_rmaker_param_val_t esp_rmaker_array(const char *val);
+
+
+/** Initialize ESP RainMaker Node
+ *
+ * This initializes the ESP RainMaker agent and creates the node.
+ * The model and firmware version for the node are set internally as per
+ * the project name and version. These can be overridden (but not recommended) using the
+ * esp_rmaker_node_add_fw_version() and esp_rmaker_node_add_model() APIs.
+ *
+ * @note This should be the first call before using any other ESP RainMaker API.
+ *
+ * @param[in] config Configuration to be used by the ESP RainMaker.
+ * @param[in] name Name of the node.
+ * @param[in] type Type of the node.
+ *
+ * @return Node handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_node_t *esp_rmaker_node_init(const esp_rmaker_config_t *config, const char *name, const char *type);
+
+/** Start ESP RainMaker Agent
+ *
+ * This call starts the actual ESP RainMaker thread. This should preferably be called after a
+ * successful Wi-Fi connection in order to avoid unnecessary failures.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_start(void);
+
+/** Stop ESP RainMaker Agent
+ *
+ * This call stops the ESP RainMaker Agent instance started earlier by esp_rmaker_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_stop(void);
+
+/** Deinitialize ESP RainMaker Node
+ *
+ * This API deinitializes the ESP RainMaker agent and the node created using esp_rmaker_node_init().
+ *
+ * @note This should be called after rainmaker has stopped.
+ *
+ * @param[in] node Node Handle returned by esp_rmaker_node_init().
+ *
+ * @retur ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_deinit(const esp_rmaker_node_t *node);
+
+/** Get a handle to the Node
+ *
+ * This API returns handle to a node created using esp_rmaker_node_init().
+ *
+ * @return Node handle on success.
+ * @return NULL in case of failure.
+ */
+const esp_rmaker_node_t *esp_rmaker_get_node(void);
+
+/** Get Node Id
+ *
+ * Returns pointer to the NULL terminated Node ID string.
+ *
+ * @return Pointer to a NULL terminated Node ID string.
+ */
+char *esp_rmaker_get_node_id(void);
+
+/** Get Node Info
+ *
+ * Returns pointer to the node info as configured during initialisation.
+ *
+ * @param node Node handle.
+ *
+ * @return Pointer to the node info on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_node_info_t *esp_rmaker_node_get_info(const esp_rmaker_node_t *node);
+
+/** Add Node attribute
+ *
+ * Adds a new attribute as the metadata for the node. For the sake of simplicity,
+ * only string values are allowed.
+ *
+ * @param node Node handle.
+ * @param[in] attr_name Name of the attribute.
+ * @param[in] val Value for the attribute.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_attribute(const esp_rmaker_node_t *node, const char *attr_name, const char *val);
+
+/** Add FW version for a node (Not recommended)
+ *
+ * FW version is set internally to the project version. This API can be used to
+ * override that version.
+ *
+ * @param node Node handle.
+ * @param[in] fw_version New firmware version.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_fw_version(const esp_rmaker_node_t *node, const char *fw_version);
+
+/** Add model for a node (Not recommended)
+ *
+ * Model is set internally to the project name. This API can be used to
+ * override that name.
+ *
+ * @param node Node handle.
+ * @param[in] model New model string.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_model(const esp_rmaker_node_t *node, const char *model);
+
+/**
+ * Create a Device
+ *
+ * This API will create a virtual "Device".
+ * This could be something like a Switch, Lightbulb, etc.
+ *
+ * @note The device created needs to be added to a node using esp_rmaker_node_add_device().
+ *
+ * @param[in] dev_name The unique device name.
+ * @param[in] type Optional device type. Can be kept NULL.
+ * @param[in] priv_data (Optional) Private data associated with the device. This will be passed to callbacks.
+ * It should stay allocated throughout the lifetime of the device.
+ *
+ * @return Device handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_device_create(const char *dev_name, const char *type, void *priv_data);
+
+/**
+ * Create a Service
+ *
+ * This API will create a "Service". It is exactly same like a device in terms of structure and so, all
+ * APIs for device are also valid for a service.
+ * A service could be something like OTA, diagnostics, etc.
+ *
+ * @note Name of a service should not clash with name of a device.
+ * @note The service created needs to be added to a node using esp_rmaker_node_add_device().
+ *
+ * @param[in] serv_name The unique service name.
+ * @param[in] type Optional service type. Can be kept NULL.
+ * @param[in] priv_data (Optional) Private data associated with the service. This will be passed to callbacks.
+ * It should stay allocated throughout the lifetime of the device.
+ *
+ * @return Device handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_service_create(const char *serv_name, const char *type, void *priv_data);
+
+/**
+ * Delete a Device/Service
+ *
+ * This API will delete a device created using esp_rmaker_device_create().
+ *
+ * @note The device should first be removed from the node using esp_rmaker_node_remove_device() before deleting.
+ *
+ * @param[in] device Device handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_delete(const esp_rmaker_device_t *device);
+
+/**
+ * Add callbacks for a device/service
+ *
+ * Add read/write callbacks for a device that will be invoked as per requests received from the cloud (or other paths
+ * as may be added in future).
+ *
+ * @param[in] device Device handle.
+ * @param[in] write_cb Write callback.
+ * @param[in] read_cb Read callback.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_cb(const esp_rmaker_device_t *device, esp_rmaker_device_write_cb_t write_cb, esp_rmaker_device_read_cb_t read_cb);
+
+/**
+ * Add a device to a node
+ *
+ * @param[in] node Node handle.
+ * @param[in] device Device handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_device(const esp_rmaker_node_t *node, const esp_rmaker_device_t *device);
+
+/**
+ * Remove a device from a node
+ *
+ * @param[in] node Node handle.
+ * @param[in] device Device handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_remove_device(const esp_rmaker_node_t *node, const esp_rmaker_device_t *device);
+
+/** Get device by name
+ *
+ * Get handle for a device based on the name.
+ *
+ * @param[in] node Node handle.
+ * @param[in] device_name Device name to search.
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_device_t *esp_rmaker_node_get_device_by_name(const esp_rmaker_node_t *node, const char *device_name);
+
+/** Add a Device attribute
+ *
+ * @note Device attributes are reported only once after a boot-up as part of the node
+ * configuration.
+ * Eg. Serial Number
+ *
+ * @param[in] device Device handle.
+ * @param[in] attr_name Name of the attribute.
+ * @param[in] val Value of the attribute.
+ *
+ * @return ESP_OK if the attribute was added successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_attribute(const esp_rmaker_device_t *device, const char *attr_name, const char *val);
+
+/** Add a Device subtype
+ *
+ * This can be something like esp.subtype.rgb-light for a device of type esp.device.lightbulb.
+ * This would primarily be used by the phone apps to render different icons for the same device type.
+ *
+ * @param[in] device Device handle.
+ * @param[in] subtype String describing the sub type.
+ *
+ * @return ESP_OK if the subtype was added successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_subtype(const esp_rmaker_device_t *device, const char *subtype);
+
+/** Get device name from handle
+ *
+ * @param[in] device Device handle.
+ *
+ * @return NULL terminated device name string on success.
+ * @return NULL in case of failure.
+ */
+char *esp_rmaker_device_get_name(const esp_rmaker_device_t *device);
+
+/** Get device type from handle
+ *
+ * @param[in] device Device handle.
+ *
+ * @return NULL terminated device type string on success.
+ * @return NULL in case of failure, or if the type wasn't provided while creating the device.
+ */
+char *esp_rmaker_device_get_type(const esp_rmaker_device_t *device);
+
+/**
+ * Add a parameter to a device/service
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_param(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param);
+
+
+/** Get parameter by type
+ *
+ * Get handle for a parameter based on the type.
+ *
+ * @note If there are multiple parameters with the same type, this will return the first one. The API
+ * esp_rmaker_device_get_param_by_name() can be used to get a specific parameter, because the parameter
+ * names in a device are unique.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param_type Parameter type to search.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_t *esp_rmaker_device_get_param_by_type(const esp_rmaker_device_t *device, const char *param_type);
+
+/** Get parameter by name
+ *
+ * Get handle for a parameter based on the name.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param_name Parameter name to search.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_t *esp_rmaker_device_get_param_by_name(const esp_rmaker_device_t *device, const char *param_name);
+
+/** Assign a primary parameter
+ *
+ * Assign a parameter (already added using esp_rmaker_device_add_param()) as a primary parameter,
+ * which can be used by clients (phone apps specifically) to give prominence to it.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ *
+ * @return ESP_OK if the parameter was assigned as the primary successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_assign_primary_param(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param);
+
+/**
+ * Create a Parameter
+ *
+ * Parameter can be something like Temperature, Outlet state, Lightbulb brightness, etc.
+ *
+ * Any changes should be reported using the esp_rmaker_param_update_and_report() API.
+ * Any remote changes will be reported to the application via the device callback, if registered.
+ *
+ * @note The parameter created needs to be added to a device using esp_rmaker_device_add_param().
+ * Parameter name should be unique in a given device.
+ *
+ * @param[in] param_name Name of the parameter.
+ a* @param[in] type Optional parameter type. Can be kept NULL.
+ * @param[in] val Value of the parameter. This also specifies the type that will be assigned
+ * to this parameter. You can use esp_rmaker_bool(), esp_rmaker_int(), esp_rmaker_float()
+ * or esp_rmaker_str() functions as the argument here. Eg, esp_rmaker_bool(true).
+ * @param[in] properties Properties of the parameter, which will be a logical OR of flags in
+ *  \ref esp_param_property_flags_t.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_t *esp_rmaker_param_create(const char *param_name, const char *type,
+        esp_rmaker_param_val_t val, uint8_t properties);
+
+/**
+ * Add a UI Type to a parameter
+ *
+ * This will be used by the Phone apps (or other clients) to render appropriate UI for the given
+ * parameter. Please refer the RainMaker documetation for supported UI Types.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] ui_type String describing the UI Type.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_ui_type(const esp_rmaker_param_t *param, const char *ui_type);
+
+/**
+ * Add bounds for an integer/float parameter
+ *
+ * This can be used to add bounds (min/max values) for a given integer parameter. Eg. brightness
+ * will have bounds as 0 and 100 if it is a percentage.
+ * Eg. esp_rmaker_param_add_bounds(brightness_param, esp_rmaker_int(0), esp_rmaker_int(100), esp_rmaker_int(5));
+ *
+ * @note The RainMaker core does not check the bounds. It is upto the application to handle it.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] min Minimum allowed value.
+ * @param[in] max Maximum allowed value.
+ * @param[in] step Minimum stepping (set to 0 if no specific value is desired).
+ *
+ * @return ESP_OK on success.
+ * return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_bounds(const esp_rmaker_param_t *param,
+    esp_rmaker_param_val_t min, esp_rmaker_param_val_t max, esp_rmaker_param_val_t step);
+
+/**
+ * Add a list of valid strings for a string parameter
+ *
+ * This can be used to add a list of valid strings for a given string parameter.
+ *
+ * Eg.
+ * static const char *valid_strs[] = {"None","Yes","No","Can't Say"};
+ * esp_rmaker_param_add_valid_str_list(param, valid_strs, 4);
+ *
+ * @note The RainMaker core does not check the values. It is upto the application to handle it.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] strs Pointer to an array of strings. Note that this memory should stay allocated
+ * throughout the lifetime of this parameter.
+ * @param[in] count Number of strings in the above array.
+ *
+ * @return ESP_OK on success.
+ * return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_valid_str_list(const esp_rmaker_param_t *param, const char *strs[], uint8_t count);
+
+/** Add max count for an array parameter
+ *
+ * This can be used to put a limit on the maximum number of elements in an array.
+ *
+ * @note The RainMaker core does not check the values. It is upto the application to handle it.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] count Max number of elements allowed in the array.
+ *
+ * @return ESP_OK on success.
+ * return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_array_max_count(const esp_rmaker_param_t *param, int count);
+
+
+/* Update a parameter
+ *
+ * This will just update the value of a parameter with esp rainmaker core, without actually reporting
+ * it. This can be used when multiple parameters need to be reported together.
+ * Eg. If x parameters are to be reported, this API can be used for the first x -1 parameters
+ * and the last one can be updated using esp_rmaker_param_update_and_report().
+ * This will report all parameters which were updated prior to this call.
+ *
+ * Sample:
+ *
+ * esp_rmaker_param_update(param1, esp_rmaker_float(10.2));
+ * esp_rmaker_param_update(param2, esp_rmaker_int(55));
+ * esp_rmaker_param_update(param3, esp_rmaker_int(95));
+ * esp_rmaker_param_update_and_report(param1, esp_rmaker_bool(true));
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] val New value of the parameter.
+ *
+ * @return ESP_OK if the parameter was updated successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_update(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
+
+/** Update and report a parameter
+ *
+ * Calling this API will update the parameter and report it to ESP RainMaker cloud.
+ * This should be used whenever there is any local change.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] val New value of the parameter.
+ *
+ * @return ESP_OK if the parameter was updated successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_update_and_report(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
+
+/** Update and notify a parameter
+ *
+ * Calling this API will update the parameter and report it to ESP RainMaker cloud similar to
+ * esp_rmaker_param_update_and_report(). However, additionally, it will also trigger a notification
+ * on the phone apps (if enabled).
+ *
+ * @note This should be used only when some local change requires explicit notification even when the
+ * phone app is in background, not otherwise.
+ * Eg. Alarm got triggered, temperature exceeded some threshold, etc.
+ *
+ * Alternatively, the esp_rmaker_raise_alert() API can also be used to trigger notification
+ * on the phone apps with pre-formatted text.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] val New value of the parameter.
+ *
+ * @return ESP_OK if the parameter was updated successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_update_and_notify(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
+
+/** Trigger an alert on the phone app
+ *
+ * This API will trigger a notification alert on the phone apps (if enabled) using the formatted text
+ * provided. Note that this does not send a notification directly to the phone, but reports the alert
+ * to the ESP RainMaker cloud which then uses the Notification framework to send notifications to the
+ * phone apps. The value does not get stored anywhere, nor is it linked to any node parameters.
+ *
+ * @note This should be used only if some event requires explicitly alerting the user even when the
+ * phone app is in background, not otherwise.
+ * Eg. "Motion Detected", "Fire alarm triggered"
+ *
+ * @param[in] alert_str NULL terminated pre-formatted alert string.
+ *     Maximum length can be ESP_RMAKER_MAX_ALERT_LEN, excluding NULL character.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_raise_alert(const char *alert_str);
+
+/** Get parameter name from handle
+ *
+ * @param[in] param Parameter handle.
+ *
+ * @return NULL terminated parameter name string on success.
+ * @return NULL in case of failure.
+ */
+char *esp_rmaker_param_get_name(const esp_rmaker_param_t *param);
+
+/** Get parameter type from handle
+ *
+ * @param[in] param Parameter handle.
+ *
+ * @return NULL terminated parameter type string on success.
+ * @return NULL in case of failure, or if the type wasn't provided while creating the parameter.
+ */
+char *esp_rmaker_param_get_type(const esp_rmaker_param_t *param);
+
+/** Get parameter value
+ *
+ * This gives the parameter value that is stored in the RainMaker core.
+ *
+ * @note This does not call any explicit functions to read value from hardware/driver.
+ *
+ * @param[in] param Parameter handle
+ *
+ * @return Pointer to parameter value on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_val_t *esp_rmaker_param_get_val(esp_rmaker_param_t *param);
+
+/** Report the node details to the cloud
+ *
+ * This API reports node details i.e. the node configuration and values of all the parameters to the ESP RainMaker cloud.
+ * Eg. If a new device is created (with some parameters and attributes), then this API should be called after that
+ * to send the node details to the cloud again and the changes to be reflected in the clients (like phone apps).
+ *
+ * @note Please use this API only if you need to create or delete devices after esp_rmaker_start() has already
+ * been called, for use cases like bridges or hubs.
+ *
+ * @return ESP_OK if the node details are successfully queued to be published.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_report_node_details(void);
+
+/** Enable Timezone Service
+ *
+ * This enables the ESP RainMaker standard timezone service which can be used to set
+ * timezone, either in POSIX or location string format. Please refer the specifications
+ * for additional details.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_timezone_service_enable(void);
+
+/** Enable System Service
+ *
+ * This enables the ESP RainMaker standard system service which can be
+ * used for operations like reboot, factory reset and Wi-Fi reset.
+ *
+ * Please refer the specifications for additional details.
+ *
+ * @param[in] config Configuration for the system service.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_system_service_enable(esp_rmaker_system_serv_config_t *config);
+
+/**
+ * Check if local_ctrl service has started
+ *
+ * @return true if service has started
+ * @return false if the service has not started
+ */
+bool esp_rmaker_local_ctrl_service_started(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_mqtt.h b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_mqtt.h
new file mode 100644
index 00000000000..1cc6cd5156e
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_mqtt.h
@@ -0,0 +1,90 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_rmaker_mqtt_glue.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+esp_rmaker_mqtt_conn_params_t *esp_rmaker_mqtt_get_conn_params(void);
+   
+/** Initialize ESP RainMaker MQTT
+ *
+ * @param[in] config The MQTT configuration data
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_init(esp_rmaker_mqtt_conn_params_t *conn_params);
+
+/** MQTT Connect
+ *
+ * Starts the connection attempts to the MQTT broker as per the configuration
+ * provided during initializing.
+ * This should ideally be called after successful network connection.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_connect(void);
+
+/** MQTT Disconnect
+ *
+ * Disconnects from the MQTT broker.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_disconnect(void);
+
+/** Publish MQTT Message
+ *
+ * @param[in] topic The MQTT topic on which the message should be published.
+ * @param[in] data Data to be published
+ * @param[in] data_len Length of the data
+ * @param[in] qos Quality of Service for the Publish. Can be 0, 1 or 2. Also depends on what the MQTT broker supports.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_publish(const char *topic, void *data, size_t data_len, uint8_t qos, int *msg_id);
+
+/** Subscribe to MQTT topic
+ *
+ * @param[in] topic The topic to be subscribed to.
+ * @param[in] cb The callback to be invoked when a message is received on the given topic.
+ * @param[in] priv_data Optional private data to be passed to the callback
+ * @param[in] qos Quality of Service for the Subscription. Can be 0, 1 or 2. Also depends on what the MQTT broker supports.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_subscribe(const char *topic, esp_rmaker_mqtt_subscribe_cb_t cb, uint8_t qos, void *priv_data);
+
+/** Unsubscribe from MQTT topic
+ *
+ * @param[in] topic Topic from which to unsubscribe.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_unsubscribe(const char *topic);
+esp_err_t esp_rmaker_mqtt_setup(esp_rmaker_mqtt_config_t mqtt_config);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_ota.h b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_ota.h
new file mode 100644
index 00000000000..e66b95705bc
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_ota.h
@@ -0,0 +1,150 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Default ESP RainMaker OTA Server Certificate */
+extern const char *ESP_RMAKER_OTA_DEFAULT_SERVER_CERT;
+
+/** OTA Status to be reported to ESP RainMaker Cloud */
+typedef enum {
+    /** OTA is in Progress. This can be reported multiple times as the OTA progresses. */
+    OTA_STATUS_IN_PROGRESS = 1,
+    /** OTA Succeeded. This should be reported only once, at the end of OTA. */
+    OTA_STATUS_SUCCESS,
+    /** OTA Failed. This should be reported only once, at the end of OTA. */
+    OTA_STATUS_FAILED,
+    /** OTA was delayed by the application */
+    OTA_STATUS_DELAYED,
+} ota_status_t;
+
+/** OTA Workflow type */
+typedef enum {
+    /** OTA will be performed using services and parameters. */
+    OTA_USING_PARAMS = 1,
+    /** OTA will be performed using pre-defined MQTT topics. */
+    OTA_USING_TOPICS
+} esp_rmaker_ota_type_t;
+
+/** The OTA Handle to be used by the OTA callback */
+typedef void *esp_rmaker_ota_handle_t;
+
+/** OTA Data */
+typedef struct {
+    /** The OTA URL received from ESP RainMaker Cloud */
+    char *url;
+    /** Size of the OTA File. Can be 0 if the file size isn't received from
+     * the ESP RainMaker Cloud */
+    int filesize;
+    /** The server certificate passed in esp_rmaker_enable_ota() */
+    const char *server_cert;
+    /** The private data passed in esp_rmaker_enable_ota() */
+    char *priv;
+} esp_rmaker_ota_data_t;
+
+/** Function prototype for OTA Callback
+ *
+ * This function will be invoked by the ESP RainMaker core whenever an OTA is available.
+ * The esp_rmaker_report_ota_status() API should be used to indicate the progress and
+ * success/fail status.
+ *
+ * @param[in] handle An OTA handle assigned by the ESP RainMaker Core
+ * @param[in] ota_data The data to be used for the OTA
+ *
+ * @return ESP_OK if the OTA was successful
+ * @return ESP_FAIL if the OTA failed.
+ */
+typedef esp_err_t (*esp_rmaker_ota_cb_t) (esp_rmaker_ota_handle_t handle,
+            esp_rmaker_ota_data_t *ota_data);
+
+/** Function Prototype for Post OTA Diagnostics
+ *
+ * If the Application rollback feature is enabled, this callback will be invoked
+ * as soon as you call esp_rmaker_ota_enable(), if it is the first
+ * boot after an OTA. You may perform some application specific diagnostics and
+ * report the status which will decide whether to roll back or not.
+ *
+ * @return true if diagnostics are successful, meaning that the new firmware is fine.
+ * @return false if diagnostics fail and a roolback to previous firmware is required.
+ */
+typedef bool (*esp_rmaker_post_ota_diag_t)(void);
+
+/** ESP RainMaker OTA Configuration */
+typedef struct {
+    /** OTA Callback.
+     * The callback to be invoked when an OTA Job is available.
+     * If kept NULL, the internal default callback will be used (Recommended).
+     */
+    esp_rmaker_ota_cb_t ota_cb;
+    /** OTA Diagnostics Callback.
+     * A post OTA diagnostic handler to be invoked if app rollback feature is enabled.
+     * If kept NULL, the new firmware will be assumed to be fine,
+     * and no rollback will be performed.
+     */
+    esp_rmaker_post_ota_diag_t ota_diag;
+    /** Server Certificate.
+     * The certificate to be passed to the OTA callback for server authentication.
+     * This is mandatory, unless you have disabled it in ESP HTTPS OTA config option.
+     * If you are using the ESP RainMaker OTA Service, you can just set this to
+     * `ESP_RMAKER_OTA_DEFAULT_SERVER_CERT`.
+     */
+    const char *server_cert;
+    /** Private Data.
+     * Optional private data to be passed to the OTA callback.
+     */
+    void *priv;
+} esp_rmaker_ota_config_t;
+
+/** Enable OTA
+ *
+ * Calling this API enables OTA as per the ESP RainMaker specification.
+ * Please check the various ESP RainMaker configuration options to
+ * use the different variants of OTA. Refer the documentation for
+ * additional details.
+ *
+ * @param[in] ota_config Pointer to an OTA configuration structure
+ * @param[in] type The OTA workflow type
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_ota_enable(esp_rmaker_ota_config_t *ota_config, esp_rmaker_ota_type_t type);
+
+/** Report OTA Status
+ *
+ * This API must be called from the OTA Callback to indicate the status of the OTA. The OTA_STATUS_IN_PROGRESS
+ * can be reported multiple times with appropriate additional information. The final success/failure should
+ * be reported only once, at the end.
+ *
+ * This can be ignored if you are using the default internal OTA callback.
+ *
+ * @param[in] ota_handle The OTA handle received by the callback
+ * @param[in] status Status to be reported
+ * @param[in] additional_info NULL terminated string indicating additional information for the status
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_ota_report_status(esp_rmaker_ota_handle_t ota_handle, ota_status_t status, char *additional_info);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_scenes.h b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_scenes.h
new file mode 100644
index 00000000000..f2f81f51a02
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_scenes.h
@@ -0,0 +1,38 @@
+// Copyright 2022 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <esp_err.h>
+
+/** Enable Scenes
+ *
+ * This API enables the scenes service for the node. For more information,
+ * check [here](https://rainmaker.espressif.com/docs/scenes.html)
+ *
+ * @note This API should be called after esp_rmaker_node_init() but before esp_rmaker_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_scenes_enable(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_schedule.h b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_schedule.h
new file mode 100644
index 00000000000..383c0949188
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_schedule.h
@@ -0,0 +1,38 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Enable Schedules
+ *
+ * This API enables the scheduling service for the node. For more information,
+ * check [here](https://rainmaker.espressif.com/docs/scheduling.html)
+ *
+ * It is recommended to set the timezone while using schedules. Check [here](https://rainmaker.espressif.com/docs/time-service.html#time-zone) for more information on timezones
+ *
+ * @note This API should be called after esp_rmaker_node_init() but before esp_rmaker_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_schedule_enable(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_devices.h b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_devices.h
new file mode 100644
index 00000000000..db9480672ba
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_devices.h
@@ -0,0 +1,96 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_rmaker_core.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Create a standard Switch device
+ *
+ * This creates a Switch device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * #@param[in] power Default value of the mandatory parameter "power"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_switch_device_create(const char *dev_name,
+            void *priv_data, bool power);
+
+/** Create a standard Lightbulb device
+ *
+ * This creates a Lightbulb device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * @param[in] power Default value of the mandatory parameter "power"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_lightbulb_device_create(const char *dev_name,
+            void *priv_data, bool power);
+
+/** Create a standard Fan device
+ *
+ * This creates a Fan device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * @param[in] power Default value of the mandatory parameter "power"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_fan_device_create(const char *dev_name,
+            void *priv_data, bool power);
+
+/** Create a standard Temperature Sensor device
+ *
+ * This creates a Temperature Sensor device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * @param[in] temperature Default value of the mandatory parameter "temperature"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_temp_sensor_device_create(const char *dev_name,
+            void *priv_data, float temperature);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_params.h b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_params.h
new file mode 100644
index 00000000000..944118c0f68
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_params.h
@@ -0,0 +1,350 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_rmaker_core.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/* Suggested default names for the parameters.
+ * These will also be used by default if you use any standard device helper APIs.
+ *
+ * @note These names are not mandatory. You can use the ESP RainMaker Core APIs
+ * to create your own parameters with custom names, if required.
+ */
+
+#define ESP_RMAKER_DEF_NAME_PARAM           "Name"
+#define ESP_RMAKER_DEF_POWER_NAME           "Power"
+#define ESP_RMAKER_DEF_BRIGHTNESS_NAME      "Brightness"
+#define ESP_RMAKER_DEF_HUE_NAME             "Hue"
+#define ESP_RMAKER_DEF_SATURATION_NAME      "Saturation"
+#define ESP_RMAKER_DEF_INTENSITY_NAME       "Intensity"
+#define ESP_RMAKER_DEF_CCT_NAME             "CCT"
+#define ESP_RMAKER_DEF_DIRECTION_NAME       "Direction"
+#define ESP_RMAKER_DEF_SPEED_NAME           "Speed"
+#define ESP_RMAKER_DEF_TEMPERATURE_NAME     "Temperature"
+#define ESP_RMAKER_DEF_OTA_STATUS_NAME      "Status"
+#define ESP_RMAKER_DEF_OTA_INFO_NAME        "Info"
+#define ESP_RMAKER_DEF_OTA_URL_NAME         "URL"
+#define ESP_RMAKER_DEF_TIMEZONE_NAME        "TZ"
+#define ESP_RMAKER_DEF_TIMEZONE_POSIX_NAME  "TZ-POSIX"
+#define ESP_RMAKER_DEF_SCHEDULE_NAME        "Schedules"
+#define ESP_RMAKER_DEF_SCENES_NAME          "Scenes"
+#define ESP_RMAKER_DEF_REBOOT_NAME          "Reboot"
+#define ESP_RMAKER_DEF_FACTORY_RESET_NAME   "Factory-Reset"
+#define ESP_RMAKER_DEF_WIFI_RESET_NAME      "Wi-Fi-Reset"
+#define ESP_RMAKER_DEF_LOCAL_CONTROL_POP    "POP"
+#define ESP_RMAKER_DEF_LOCAL_CONTROL_TYPE   "Type"
+
+/**
+ * Create standard name param
+ *
+ * This will create the standard name parameter.
+ * This should be added to all devices for which you want a user customisable name.
+ * The value should be same as the device name.
+ *
+ * All standard device creation APIs will add this internally.
+ * No application registered callback will be called for this parameter,
+ * and changes will be managed internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_name_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard Power param
+ *
+ * This will create the standard power parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_power_param_create(const char *param_name, bool val);
+
+/**
+ * Create standard Brightness param
+ *
+ * This will create the standard brightness parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_brightness_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Hue param
+ *
+ * This will create the standard hue parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_hue_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Saturation param
+ *
+ * This will create the standard saturation parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_saturation_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Intensity param
+ *
+ * This will create the standard intensity parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_intensity_param_create(const char *param_name, int val);
+
+/**
+ * Create standard CCT param
+ *
+ * This will create the standard cct parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_cct_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Direction param
+ *
+ * This will create the standard direction parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_direction_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Speed param
+ *
+ * This will create the standard speed parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_speed_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Temperature param
+ *
+ * This will create the standard temperature parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_temperature_param_create(const char *param_name, float val);
+
+/**
+ * Create standard OTA Status param
+ *
+ * This will create the standard ota status parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_ota_status_param_create(const char *param_name);
+
+/**
+ * Create standard OTA Info param
+ *
+ * This will create the standard ota info parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_ota_info_param_create(const char *param_name);
+
+/**
+ * Create standard OTA URL param
+ *
+ * This will create the standard ota url parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_ota_url_param_create(const char *param_name);
+
+/**
+ * Create standard Timezone param
+ *
+ * This will create the standard timezone parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter (Eg. "Asia/Shanghai"). Can be kept NULL.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_timezone_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard POSIX Timezone param
+ *
+ * This will create the standard posix timezone parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter (Eg. "CST-8"). Can be kept NULL.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_timezone_posix_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard Schedules param
+ *
+ * This will create the standard schedules parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] max_schedules Maximum number of schedules allowed
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_schedules_param_create(const char *param_name, int max_schedules);
+
+/**
+ * Create standard Scenes param
+ *
+ * This will create the standard scenes parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] max_scenes Maximum number of scenes allowed
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_scenes_param_create(const char *param_name, int max_scenes);
+
+/**
+ * Create standard Reboot param
+ *
+ * This will create the standard reboot parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_reboot_param_create(const char *param_name);
+
+/**
+ * Create standard Factory Reset param
+ *
+ * This will create the standard factory reset parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_factory_reset_param_create(const char *param_name);
+
+/**
+ * Create standard Wi-Fi Reset param
+ *
+ * This will create the standard Wi-Fi Reset parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_wifi_reset_param_create(const char *param_name);
+
+/**
+ * Create standard Local Control POP param
+ *
+ * This will create the standard Local Control POP parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter (Eg. "abcd1234"). Can be kept NULL.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_local_control_pop_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard Local Control Type param
+ *
+ * This will create the standard Local Control security type parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_local_control_type_param_create(const char *param_name, int val);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_services.h b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_services.h
new file mode 100644
index 00000000000..687df733f46
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_services.h
@@ -0,0 +1,124 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_rmaker_core.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Create a standard OTA service
+ *
+ * This creates an OTA service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_ota_service_create(const char *serv_name, void *priv_data);
+
+/** Create a standard OTA service
+ *
+ * This creates an OTA service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] timezone Default value of timezone string (Eg. "Asia/Shanghai"). Can be kept NULL.
+ * @param[in] timezone_posix Default value of posix timezone string (Eg. "CST-8"). Can be kept NULL.
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_time_service_create(const char *serv_name, const char *timezone,
+        const char *timezone_posix, void *priv_data);
+
+/** Create a standard Schedule service
+ *
+ * This creates a Schedule service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] write_cb Write callback.
+ * @param[in] read_cb Read callback.
+ * @param[in] max_schedules Maximum number of schedules supported.
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_create_schedule_service(const char *serv_name, esp_rmaker_device_write_cb_t write_cb, esp_rmaker_device_read_cb_t read_cb, int max_schedules, void *priv_data);
+
+/** Create a standard Scenes service
+ *
+ * This creates a Scenes service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] write_cb Write callback.
+ * @param[in] read_cb Read callback.
+ * @param[in] max_scenes Maximum number of scenes supported.
+ * @param[in] deactivation_support Deactivation callback support.
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_create_scenes_service(const char *serv_name, esp_rmaker_device_write_cb_t write_cb, esp_rmaker_device_read_cb_t read_cb, int max_scenes, bool deactivation_support, void *priv_data);
+
+/** Create a standard System service
+ *
+ * This creates an empty System service. Appropriate parameters should be added by the caller.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+
+esp_rmaker_device_t *esp_rmaker_create_system_service(const char *serv_name, void *priv_data);
+
+/** Create a standard Local Control service
+ *
+ * This creates a Local Control service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] pop Proof of possession
+ * @param[in] sec_type Security type
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_create_local_control_service(const char *serv_name, const char *pop, int sec_type, void *priv_data);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_types.h b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_types.h
new file mode 100644
index 00000000000..4dc99eab401
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_standard_types.h
@@ -0,0 +1,73 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/********** STANDARD UI TYPES **********/
+
+#define ESP_RMAKER_UI_TOGGLE            "esp.ui.toggle"
+#define ESP_RMAKER_UI_SLIDER            "esp.ui.slider"
+#define ESP_RMAKER_UI_DROPDOWN          "esp.ui.dropdown"
+#define ESP_RMAKER_UI_TEXT              "esp.ui.text"
+#define ESP_RMAKER_UI_HUE_SLIDER        "esp.ui.hue-slider"
+
+/********** STANDARD PARAM TYPES **********/
+
+#define ESP_RMAKER_PARAM_NAME           "esp.param.name"
+#define ESP_RMAKER_PARAM_POWER          "esp.param.power"
+#define ESP_RMAKER_PARAM_BRIGHTNESS     "esp.param.brightness"
+#define ESP_RMAKER_PARAM_HUE            "esp.param.hue"
+#define ESP_RMAKER_PARAM_SATURATION     "esp.param.saturation"
+#define ESP_RMAKER_PARAM_INTENSITY      "esp.param.intensity"
+#define ESP_RMAKER_PARAM_CCT            "esp.param.cct"
+#define ESP_RMAKER_PARAM_SPEED          "esp.param.speed"
+#define ESP_RMAKER_PARAM_DIRECTION      "esp.param.direction"
+#define ESP_RMAKER_PARAM_TEMPERATURE    "esp.param.temperature"
+#define ESP_RMAKER_PARAM_OTA_STATUS     "esp.param.ota_status"
+#define ESP_RMAKER_PARAM_OTA_INFO       "esp.param.ota_info"
+#define ESP_RMAKER_PARAM_OTA_URL        "esp.param.ota_url"
+#define ESP_RMAKER_PARAM_TIMEZONE       "esp.param.tz"
+#define ESP_RMAKER_PARAM_TIMEZONE_POSIX       "esp.param.tz_posix"
+#define ESP_RMAKER_PARAM_SCHEDULES      "esp.param.schedules"
+#define ESP_RMAKER_PARAM_SCENES         "esp.param.scenes"
+#define ESP_RMAKER_PARAM_REBOOT         "esp.param.reboot"
+#define ESP_RMAKER_PARAM_FACTORY_RESET  "esp.param.factory-reset"
+#define ESP_RMAKER_PARAM_WIFI_RESET     "esp.param.wifi-reset"
+#define ESP_RMAKER_PARAM_LOCAL_CONTROL_POP      "esp.param.local_control_pop"
+#define ESP_RMAKER_PARAM_LOCAL_CONTROL_TYPE     "esp.param.local_control_type"
+
+
+/********** STANDARD DEVICE TYPES **********/
+
+#define ESP_RMAKER_DEVICE_SWITCH        "esp.device.switch"
+#define ESP_RMAKER_DEVICE_LIGHTBULB     "esp.device.lightbulb"
+#define ESP_RMAKER_DEVICE_FAN           "esp.device.fan"
+#define ESP_RMAKER_DEVICE_TEMP_SENSOR   "esp.device.temperature-sensor"
+
+
+/********** STANDARD SERVICE TYPES **********/
+#define ESP_RMAKER_SERVICE_OTA          "esp.service.ota"
+#define ESP_RMAKER_SERVICE_TIME         "esp.service.time"
+#define ESP_RMAKER_SERVICE_SCHEDULE     "esp.service.schedule"
+#define ESP_RMAKER_SERVICE_SCENES       "esp.service.scenes"
+#define ESP_RMAKER_SERVICE_SYSTEM       "esp.service.system"
+#define ESP_RMAKER_SERVICE_LOCAL_CONTROL    "esp.service.local_control"
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_user_mapping.h b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_user_mapping.h
new file mode 100644
index 00000000000..77a153b02f2
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_rainmaker/include/esp_rmaker_user_mapping.h
@@ -0,0 +1,83 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** User-Node Mapping states */
+typedef enum {
+    /** Mapping does not exist or is not initialized */
+    ESP_RMAKER_USER_MAPPING_RESET = 0,
+    /** Mapping has started */
+    ESP_RMAKER_USER_MAPPING_STARTED,
+    /** Mapping is done */
+    ESP_RMAKER_USER_MAPPING_DONE,
+} esp_rmaker_user_mapping_state_t;
+
+/**
+ * Get User-Node mapping state
+ *
+ * This returns the current user-node mapping state.
+ *
+ * @return user mapping state
+ */
+esp_rmaker_user_mapping_state_t esp_rmaker_user_node_mapping_get_state(void);
+
+/**
+ * Create User Mapping Endpoint
+ *
+ * This will create a custom provisioning endpoint for user-node mapping.
+ * This should be called after wifi_prov_mgr_init() but before
+ * wifi_prov_mgr_start_provisioning()
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_user_mapping_endpoint_create(void);
+
+/**
+ * Register User Mapping Endpoint
+ *
+ * This will register the callback for the custom provisioning endpoint
+ * for user-node mapping which was created with esp_rmaker_user_mapping_endpoint_create().
+ * This should be called immediately after wifi_prov_mgr_start_provisioning().
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_user_mapping_endpoint_register(void);
+
+/** Add User-Node mapping
+ *
+ * This call will start the user-node mapping workflow on the node.
+ * This is automatically called if you have used esp_rmaker_user_mapping_endpoint_register().
+ * Use this API only if you want to trigger the user-node mapping after the Wi-Fi provisioning
+ * has already been done.
+ *
+ * @param[in] user_id The User identifier received from the client (Phone app/CLI)
+ * @param[in] secret_key The Secret key received from the client (Phone app/CLI)
+ *
+ * @return ESP_OK if the workflow was successfully triggered. This does not guarantee success
+ * of the actual mapping. The mapping status needs to be checked separately by the clients.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_start_user_node_mapping(char *user_id, char *secret_key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32/rom/secure_boot.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32/rom/secure_boot.h
index 1eb69e25378..50a3fcd4948 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32/rom/secure_boot.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32/rom/secure_boot.h
@@ -1,21 +1,12 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include "sdkconfig.h"
 
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+#pragma once
 
 #include <stdint.h>
 #include "ets_sys.h"
@@ -128,5 +119,3 @@ bool ets_use_secure_boot_v2(void);
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/secure_boot.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/secure_boot.h
index 71cf7250d29..a9d417283b7 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/secure_boot.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/secure_boot.h
@@ -1,19 +1,10 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
 
 #include <stdint.h>
 #include <stdbool.h>
@@ -24,9 +15,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
@@ -127,5 +115,3 @@ struct ets_secure_boot_key_digests {
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/rtc.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/rtc.h
index ad4f45c2ca7..e3a8d9d63e2 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/rtc.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/rtc.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef _ROM_RTC_H_
 #define _ROM_RTC_H_
@@ -124,7 +116,7 @@ _Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "
 _Static_assert((soc_reset_reason_t)USB_UART_CHIP_RESET == RESET_REASON_CORE_USB_UART, "USB_UART_CHIP_RESET != RESET_REASON_CORE_USB_UART");
 _Static_assert((soc_reset_reason_t)USB_JTAG_CHIP_RESET == RESET_REASON_CORE_USB_JTAG, "USB_JTAG_CHIP_RESET != RESET_REASON_CORE_USB_JTAG");
 _Static_assert((soc_reset_reason_t)POWER_GLITCH_RESET == RESET_REASON_CORE_PWR_GLITCH, "POWER_GLITCH_RESET != RESET_REASON_CORE_PWR_GLITCH");
-_Static_assert((soc_reset_reason_t)JTAG_RESET == RESET_REASON_CPU_JTAG, "JTAG_RESET != RESET_REASON_CPU_JTAG");
+_Static_assert((soc_reset_reason_t)JTAG_RESET == RESET_REASON_CPU0_JTAG, "JTAG_RESET != RESET_REASON_CPU0_JTAG");
 
 typedef enum {
     NO_SLEEP        = 0,
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/secure_boot.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/secure_boot.h
index 71cf7250d29..36a490d8584 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/secure_boot.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/secure_boot.h
@@ -1,19 +1,10 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
 
 #include <stdint.h>
 #include <stdbool.h>
@@ -24,9 +15,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
@@ -127,5 +115,3 @@ struct ets_secure_boot_key_digests {
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32s2/rom/secure_boot.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32s2/rom/secure_boot.h
index 8e880817860..a0fcecfd3c5 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32s2/rom/secure_boot.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32s2/rom/secure_boot.h
@@ -1,19 +1,10 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef _ROM_SECURE_BOOT_H_
-#define _ROM_SECURE_BOOT_H_
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
 
 #include <stdint.h>
 #include "ets_sys.h"
@@ -23,9 +14,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
@@ -126,5 +114,3 @@ struct ets_secure_boot_key_digests {
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _ROM_SECURE_BOOT_H_ */
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32s3/rom/secure_boot.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32s3/rom/secure_boot.h
index e720697b3e6..a372517b7a1 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32s3/rom/secure_boot.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32s3/rom/secure_boot.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -23,9 +15,6 @@
 extern "C" {
 #endif
 
-struct ets_secure_boot_sig_block;
-struct ets_secure_boot_signature_t;
-
 typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
 typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
 typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
diff --git a/tools/sdk/esp32s2/include/esp_schedule/include/esp_schedule.h b/tools/sdk/esp32s2/include/esp_schedule/include/esp_schedule.h
new file mode 100644
index 00000000000..4b611830a7d
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_schedule/include/esp_schedule.h
@@ -0,0 +1,231 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/** Schedule Handle */
+typedef void *esp_schedule_handle_t;
+
+/** Maximum length of the schedule name allowed. This value cannot be more than 16 as it is used for NVS key. */
+#define MAX_SCHEDULE_NAME_LEN 16
+
+/** Callback for schedule trigger
+ *
+ * This callback is called when the schedule is triggered.
+ *
+ * @param[in] handle Schedule handle.
+ * @param[in] priv_data Pointer to the private data passed while creating/editing the schedule.
+ */
+typedef void (*esp_schedule_trigger_cb_t)(esp_schedule_handle_t handle, void *priv_data);
+
+/** Callback for schedule timestamp
+ *
+ * This callback is called when the next trigger timestamp of the schedule is changed. This might be useful to check if
+ * one time schedules have already passed while the device was powered off.
+ *
+ * @param[in] handle Schedule handle.
+ * @param[in] next_timestamp timestamp at which the schedule will trigger next.
+ * @param[in] priv_data Pointer to the user data passed while creating/editing the schedule.
+ */
+typedef void (*esp_schedule_timestamp_cb_t)(esp_schedule_handle_t handle, uint32_t next_timestamp, void *priv_data);
+
+/** Schedule type */
+typedef enum esp_schedule_type {
+    ESP_SCHEDULE_TYPE_INVALID = 0,
+    ESP_SCHEDULE_TYPE_DAYS_OF_WEEK,
+    ESP_SCHEDULE_TYPE_DATE,
+    ESP_SCHEDULE_TYPE_RELATIVE,
+} esp_schedule_type_t;
+
+/** Schedule days. Used for ESP_SCHEDULE_TYPE_DAYS_OF_WEEK. */
+typedef enum esp_schedule_days {
+    ESP_SCHEDULE_DAY_ONCE      = 0,
+    ESP_SCHEDULE_DAY_EVERYDAY  = 0b1111111,
+    ESP_SCHEDULE_DAY_MONDAY    = 1 << 0,
+    ESP_SCHEDULE_DAY_TUESDAY   = 1 << 1,
+    ESP_SCHEDULE_DAY_WEDNESDAY = 1 << 2,
+    ESP_SCHEDULE_DAY_THURSDAY  = 1 << 3,
+    ESP_SCHEDULE_DAY_FRIDAY    = 1 << 4,
+    ESP_SCHEDULE_DAY_SATURDAY  = 1 << 5,
+    ESP_SCHEDULE_DAY_SUNDAY    = 1 << 6,
+} esp_schedule_days_t;
+
+/** Schedule months. Used for ESP_SCHEDULE_TYPE_DATE. */
+typedef enum esp_schedule_months {
+    ESP_SCHEDULE_MONTH_ONCE         = 0,
+    ESP_SCHEDULE_MONTH_ALL          = 0b1111111,
+    ESP_SCHEDULE_MONTH_JANUARY      = 1 << 0,
+    ESP_SCHEDULE_MONTH_FEBRUARY     = 1 << 1,
+    ESP_SCHEDULE_MONTH_MARCH        = 1 << 2,
+    ESP_SCHEDULE_MONTH_APRIL        = 1 << 3,
+    ESP_SCHEDULE_MONTH_MAY          = 1 << 4,
+    ESP_SCHEDULE_MONTH_JUNE         = 1 << 5,
+    ESP_SCHEDULE_MONTH_JULY         = 1 << 6,
+    ESP_SCHEDULE_MONTH_AUGUST       = 1 << 7,
+    ESP_SCHEDULE_MONTH_SEPTEMBER    = 1 << 8,
+    ESP_SCHEDULE_MONTH_OCTOBER      = 1 << 9,
+    ESP_SCHEDULE_MONTH_NOVEMBER     = 1 << 10,
+    ESP_SCHEDULE_MONTH_DECEMBER     = 1 << 11,
+} esp_schedule_months_t;
+
+/** Trigger details of the schedule */
+typedef struct esp_schedule_trigger {
+    /** Type of schedule */
+    esp_schedule_type_t type;
+    /** Hours in 24 hour format. Accepted values: 0-23 */
+    uint8_t hours;
+    /** Minutes in the given hour. Accepted values: 0-59. */
+    uint8_t minutes;
+    /** For type ESP_SCHEDULE_TYPE_DAYS_OF_WEEK */
+    struct {
+        /** 'OR' list of esp_schedule_days_t */
+        uint8_t repeat_days;
+    } day;
+    /** For type ESP_SCHEDULE_TYPE_DATE */
+    struct {
+        /** Day of the month. Accepted values: 1-31. */
+        uint8_t day;
+        /* 'OR' list of esp_schedule_months_t */
+        uint16_t repeat_months;
+        /** Year */
+        uint16_t year;
+        /** If the schedule is to be repeated every year. */
+        bool repeat_every_year;
+    } date;
+    /** For type ESP_SCHEDULE_TYPE_SECONDS */
+    int relative_seconds;
+    /** Used for passing the next schedule timestamp for
+     * ESP_SCHEDULE_TYPE_RELATIVE */
+    time_t next_scheduled_time_utc;
+} esp_schedule_trigger_t;
+
+/** Schedule config */
+typedef struct esp_schedule_config {
+    /** Name of the schedule. This is like a primary key for the schedule. This is required. +1 for NULL termination. */
+    char name[MAX_SCHEDULE_NAME_LEN + 1];
+    /** Trigger details */
+    esp_schedule_trigger_t trigger;
+    /** Trigger callback */
+    esp_schedule_trigger_cb_t trigger_cb;
+    /** Timestamp callback */
+    esp_schedule_timestamp_cb_t timestamp_cb;
+    /** Private data associated with the schedule. This will be passed to callbacks. */
+    void *priv_data;
+} esp_schedule_config_t;
+
+/** Initialize ESP Schedule
+ *
+ * This initializes ESP Schedule. This must be called first before calling any of the other APIs.
+ * This API also gets all the schedules from NVS (if it has been enabled).
+ *
+ * Note: After calling this API, the pointers to the callbacks should be updated for all the schedules by calling
+ * esp_schedule_get() followed by esp_schedule_edit() with the correct callbacks.
+ *
+ * @param[in] enable_nvs If NVS is to be enabled or not.
+ * @param[in] nvs_partition (Optional) The NVS partition to be used. If NULL is passed, the default partition is used.
+ * @param[out] schedule_count Number of active schedules found in NVS.
+ *
+ * @return Array of schedule handles if any schedules have been found.
+ * @return NULL if no schedule is found in NVS (or if NVS is not enabled).
+ */
+esp_schedule_handle_t *esp_schedule_init(bool enable_nvs, char *nvs_partition, uint8_t *schedule_count);
+
+/** Create Schedule
+ *
+ * This API can be used to create a new schedule. The schedule still needs to be enabled using
+ * esp_schedule_enable().
+ *
+ * @param[in] schedule_config Configuration of the schedule to be created.
+ *
+ * @return Schedule handle if successfully created.
+ * @return NULL in case of error.
+ */
+esp_schedule_handle_t esp_schedule_create(esp_schedule_config_t *schedule_config);
+
+/** Remove Schedule
+ *
+ * This API can be used to remove an existing schedule.
+ *
+ * @param[in] handle Schedule handle for the schedule to be removed.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_delete(esp_schedule_handle_t handle);
+
+/** Edit Schedule
+ *
+ * This API can be used to edit an existing schedule.
+ * The schedule name should be same as when the schedule was created. The complete config must be provided
+ * or the previously stored config might be over-written.
+ *
+ * Note: If a schedule is edited when it is on-going, the new changes will not be reflected.
+ * You will need to disable the schedule, edit it, and then enable it again.
+ *
+ * @param[in] handle Schedule handle for the schedule to be edited.
+ * @param[in] schedule_config Configuration of the schedule to be edited.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_edit(esp_schedule_handle_t handle, esp_schedule_config_t *schedule_config);
+
+/** Enable Schedule
+ *
+ * This API can be used to enable an existing schedule.
+ * It can be used to enable a schedule after it has been created using esp_schedule_create()
+ * or if the schedule has been disabled using esp_schedule_disable().
+ *
+ * @param[in] handle Schedule handle for the schedule to be enabled.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_enable(esp_schedule_handle_t handle);
+
+/** Disable Schedule
+ *
+ * This API can be used to disable an on-going schedule.
+ * It does not remove the schedule, just stops it. The schedule can be enabled again using
+ * esp_schedule_enable().
+ *
+ * @param[in] handle Schedule handle for the schedule to be disabled.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_disable(esp_schedule_handle_t handle);
+
+/** Get Schedule
+ *
+ * This API can be used to get details of an existing schedule.
+ * The schedule_config is populated with the schedule details.
+ *
+ * @param[in] handle Schedule handle.
+ * @param[out] schedule_config Details of the schedule whose handle is passed.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_get(esp_schedule_handle_t handle, esp_schedule_config_t *schedule_config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h b/tools/sdk/esp32s2/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h
index 3dfd4a14b75..e69de29bb2d 100644
--- a/tools/sdk/esp32s2/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h
+++ b/tools/sdk/esp32s2/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h
@@ -1,38 +0,0 @@
-// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-
-#pragma once
-
-// NOTE: From the view of master
-#define CMD_HD_WRBUF_REG    0x01
-#define CMD_HD_RDBUF_REG    0x02
-#define CMD_HD_WRDMA_REG    0x03
-#define CMD_HD_RDDMA_REG    0x04
-
-#define CMD_HD_ONEBIT_MODE  0x00
-#define CMD_HD_DOUT_MODE    0x10
-#define CMD_HD_QOUT_MODE    0x20
-#define CMD_HD_DIO_MODE     0x50
-#define CMD_HD_QIO_MODE     0xA0
-
-#define CMD_HD_SEG_END_REG  0x05
-#define CMD_HD_EN_QPI_REG   0x06
-#define CMD_HD_WR_END_REG   0x07
-#define CMD_HD_INT0_REG     0x08
-#define CMD_HD_INT1_REG     0x09
-#define CMD_HD_INT2_REG     0x0A
-#define CMD_HD_EX_QPI_REG   0xDD
-
-#define SPI_SLAVE_HD_BUFFER_SIZE 64
diff --git a/tools/sdk/esp32s2/include/esp_system/include/esp_private/esp_ipc_isr.h b/tools/sdk/esp32s2/include/esp_system/include/esp_private/esp_ipc_isr.h
new file mode 100644
index 00000000000..ccdfe1deaa2
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_system/include/esp_private/esp_ipc_isr.h
@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_ESP_IPC_ISR_ENABLE
+
+/**
+ * @brief Initialize the IPC ISR feature, must be called for each CPU
+ *
+ * @note This function is called from ipc_task().
+ *
+ * This function initializes the IPC ISR feature and must be called before any other esp_ipc_isr...() functions.
+ * The IPC ISR feature allows for callbacks (written in assembly) to be run on a particular CPU in the context of a
+ * High Priority Interrupt.
+ *
+ * - This function will register a High Priority Interrupt for a CPU where it is called. The priority of the interrupts is dependent on
+ *   the CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL option.
+ * - Callbacks written in assembly can then run in context of the registered High Priority Interrupts
+ * - Callbacks can be executed by calling esp_ipc_isr_asm_call() or esp_ipc_isr_asm_call_blocking()
+ */
+void esp_ipc_isr_init(void);
+
+#endif // CONFIG_ESP_IPC_ISR_ENABLE
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi.h b/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi.h
index 2d671591765..bcd10c77a10 100644
--- a/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi.h
+++ b/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi.h
@@ -228,21 +228,21 @@ extern uint64_t g_wifi_feature_caps;
     .feature_caps = g_wifi_feature_caps, \
     .sta_disconnected_pm = WIFI_STA_DISCONNECTED_PM_ENABLED,  \
     .magic = WIFI_INIT_CONFIG_MAGIC\
-};
+}
 
 /**
-  * @brief  Init WiFi
-  *         Alloc resource for WiFi driver, such as WiFi control structure, RX/TX buffer,
-  *         WiFi NVS structure etc, this WiFi also start WiFi task
+  * @brief  Initialize WiFi
+  *         Allocate resource for WiFi driver, such as WiFi control structure, RX/TX buffer,
+  *         WiFi NVS structure etc. This WiFi also starts WiFi task
   *
   * @attention 1. This API must be called before all other WiFi API can be called
-  * @attention 2. Always use WIFI_INIT_CONFIG_DEFAULT macro to init the config to default values, this can
-  *               guarantee all the fields got correct value when more fields are added into wifi_init_config_t
-  *               in future release. If you want to set your owner initial values, overwrite the default values
-  *               which are set by WIFI_INIT_CONFIG_DEFAULT, please be notified that the field 'magic' of
+  * @attention 2. Always use WIFI_INIT_CONFIG_DEFAULT macro to initialize the configuration to default values, this can
+  *               guarantee all the fields get correct value when more fields are added into wifi_init_config_t
+  *               in future release. If you want to set your own initial values, overwrite the default values
+  *               which are set by WIFI_INIT_CONFIG_DEFAULT. Please be notified that the field 'magic' of
   *               wifi_init_config_t should always be WIFI_INIT_CONFIG_MAGIC!
   *
-  * @param  config pointer to WiFi init configuration structure; can point to a temporary variable.
+  * @param  config pointer to WiFi initialized configuration structure; can point to a temporary variable.
   *
   * @return
   *    - ESP_OK: succeed
diff --git a/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_types.h b/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_types.h
index ae574416b9c..47f5c79281b 100644
--- a/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_types.h
+++ b/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_types.h
@@ -215,7 +215,7 @@ typedef enum {
 
 /** Configuration structure for Protected Management Frame */
 typedef struct {
-    bool capable;            /**< Advertizes support for Protected Management Frame. Device will prefer to connect in PMF mode if other device also advertizes PMF capability. */
+    bool capable;            /**< Deprecated variable. Device will always connect in PMF mode if other device also advertizes PMF capability. */
     bool required;           /**< Advertizes that Protected Management Frame is required. Device will not associate to non-PMF capable devices. */
 } wifi_pmf_config_t;
 
diff --git a/tools/sdk/esp32s2/include/expat/expat/expat/lib/expat.h b/tools/sdk/esp32s2/include/expat/expat/expat/lib/expat.h
index b7d6d354801..0f021e25def 100644
--- a/tools/sdk/esp32s2/include/expat/expat/expat/lib/expat.h
+++ b/tools/sdk/esp32s2/include/expat/expat/expat/lib/expat.h
@@ -11,7 +11,7 @@
    Copyright (c) 2000-2005 Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
    Copyright (c) 2001-2002 Greg Stein <gstein@users.sourceforge.net>
    Copyright (c) 2002-2016 Karl Waclawek <karl@waclawek.net>
-   Copyright (c) 2016-2021 Sebastian Pipping <sebastian@pipping.org>
+   Copyright (c) 2016-2022 Sebastian Pipping <sebastian@pipping.org>
    Copyright (c) 2016      Cristian Rodríguez <crrodriguez@opensuse.org>
    Copyright (c) 2016      Thomas Beutlich <tc@tbeu.de>
    Copyright (c) 2017      Rhodri James <rhodri@wildebeest.org.uk>
@@ -1041,7 +1041,7 @@ XML_SetBillionLaughsAttackProtectionActivationThreshold(
 */
 #define XML_MAJOR_VERSION 2
 #define XML_MINOR_VERSION 4
-#define XML_MICRO_VERSION 1
+#define XML_MICRO_VERSION 3
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/expat/port/include/expat_config.h b/tools/sdk/esp32s2/include/expat/port/include/expat_config.h
index b6b927a19bb..468910220f4 100644
--- a/tools/sdk/esp32s2/include/expat/port/include/expat_config.h
+++ b/tools/sdk/esp32s2/include/expat/port/include/expat_config.h
@@ -63,7 +63,7 @@
 #define PACKAGE_NAME "expat"
 
 /* Define to the full name and version of this package. */
-#define PACKAGE_STRING "expat 2.2.5"
+#define PACKAGE_STRING "expat 2.4.3"
 
 /* Define to the one symbol short name of this package. */
 #define PACKAGE_TARNAME "expat"
@@ -72,13 +72,13 @@
 #define PACKAGE_URL ""
 
 /* Define to the version of this package. */
-#define PACKAGE_VERSION "2.2.5"
+#define PACKAGE_VERSION "2.4.3"
 
 /* Define to 1 if you have the ANSI C header files. */
 #define STDC_HEADERS 1
 
 /* Version number of package */
-#define VERSION "2.2.5"
+#define VERSION "2.4.3"
 
 /* whether byteorder is bigendian */
 /* #undef WORDS_BIGENDIAN */
diff --git a/tools/sdk/esp32s2/include/fb_gfx/include/fb_gfx.h b/tools/sdk/esp32s2/include/fb_gfx/include/fb_gfx.h
index 079ff7bfe4a..158c80f6bf4 100644
--- a/tools/sdk/esp32s2/include/fb_gfx/include/fb_gfx.h
+++ b/tools/sdk/esp32s2/include/fb_gfx/include/fb_gfx.h
@@ -19,7 +19,7 @@ extern "C" {
 #endif
 
     typedef enum {
-        FB_RGB888, FB_BGR888, FB_RGB565, FB_BGR565
+        FB_RGB888, FB_BGR888, FB_RGB565, FB_BGR565, FB_GRAY
     } fb_format_t;
 
     typedef struct {
diff --git a/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_common.h b/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_common.h
index 398af0ba9db..9c65f08b90d 100644
--- a/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_common.h
+++ b/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_common.h
@@ -22,6 +22,24 @@
 extern "C" {
 #endif
 
+#if __has_include("esp_check.h")
+#include "esp_check.h"
+
+#define MB_RETURN_ON_FALSE(a, err_code, tag, format, ...) ESP_RETURN_ON_FALSE(a, err_code, tag, format __VA_OPT__(,) __VA_ARGS__)
+
+#else
+
+// if cannot include esp_check then use custom check macro
+
+#define MB_RETURN_ON_FALSE(a, err_code, tag, format, ...) do {                                         \
+        if (!(a)) {                                                                              \
+            ESP_LOGE(tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_code;                                                                               \
+        }                                                                                                  \
+} while(0)
+
+#endif
+
 #define MB_CONTROLLER_STACK_SIZE            (CONFIG_FMB_CONTROLLER_STACK_SIZE)   // Stack size for Modbus controller
 #define MB_CONTROLLER_PRIORITY              (CONFIG_FMB_PORT_TASK_PRIO - 1)    // priority of MB controller task
 
diff --git a/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_master.h b/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_master.h
index 5d7539b08d9..8084e689027 100644
--- a/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_master.h
+++ b/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_master.h
@@ -25,6 +25,12 @@
 extern "C" {
 #endif
 
+#define MB_MASTER_CHECK(a, err_code, format, ...) MB_RETURN_ON_FALSE(a, err_code, TAG, format __VA_OPT__(,) __VA_ARGS__)
+
+#define MB_MASTER_ASSERT(con) do { \
+        if (!(con)) { ESP_LOGE(TAG, "assert errno:%d, errno_str: !(%s)", errno, strerror(errno)); assert(0 && #con); } \
+    } while (0)
+
 /*!
  * \brief Modbus descriptor table parameter type defines.
  */
diff --git a/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_slave.h b/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_slave.h
index fa6a53bc44e..040d18265bf 100644
--- a/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_slave.h
+++ b/tools/sdk/esp32s2/include/freemodbus/common/include/esp_modbus_slave.h
@@ -28,6 +28,12 @@
 extern "C" {
 #endif
 
+#define MB_SLAVE_CHECK(a, err_code, format, ...) MB_RETURN_ON_FALSE(a, err_code, TAG, format __VA_OPT__(,) __VA_ARGS__)
+
+#define MB_SLAVE_ASSERT(con) do { \
+        if (!(con)) { ESP_LOGE(TAG, "assert errno:%d, errno_str: !(%s)", errno, strerror(errno)); assert(0 && #con); } \
+    } while (0)
+
 /**
  * @brief Parameter access event information type
  */
diff --git a/tools/sdk/esp32s2/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h b/tools/sdk/esp32s2/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h
index aa87e1b4db2..6bb81894593 100644
--- a/tools/sdk/esp32s2/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h
+++ b/tools/sdk/esp32s2/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h
@@ -250,8 +250,12 @@
 #define INCLUDE_pcTaskGetTaskName                       1
 #define INCLUDE_xTaskGetIdleTaskHandle                  1
 #define INCLUDE_pxTaskGetStackStart                     1
-
+#define INCLUDE_eTaskGetState                           1
+#define INCLUDE_xTaskAbortDelay                         1
+#define INCLUDE_xTaskGetHandle                          1
 #define INCLUDE_xSemaphoreGetMutexHolder                1
+#define INCLUDE_xTimerPendFunctionCall                  1
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle          0   //Currently there is no need for this API
 
 /* The priority at which the tick interrupt runs.  This should probably be
    kept at 1. */
@@ -278,8 +282,6 @@ extern void vPortCleanUpTCB ( void *pxTCB );
 #define configTIMER_QUEUE_LENGTH                        CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
 #define configTIMER_TASK_STACK_DEPTH                    CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
 
-#define INCLUDE_xTimerPendFunctionCall                  1
-#define INCLUDE_eTaskGetState                           1
 #define configUSE_QUEUE_SETS                            1
 
 #define configUSE_TICKLESS_IDLE                         CONFIG_FREERTOS_USE_TICKLESS_IDLE
diff --git a/tools/sdk/esp32s2/include/freertos/include/freertos/projdefs.h b/tools/sdk/esp32s2/include/freertos/include/freertos/projdefs.h
index ec8022ca0b0..1949e6e30b3 100644
--- a/tools/sdk/esp32s2/include/freertos/include/freertos/projdefs.h
+++ b/tools/sdk/esp32s2/include/freertos/include/freertos/projdefs.h
@@ -41,7 +41,7 @@ typedef void (* TaskFunction_t)( void * );
 #endif
 #ifdef ESP_PLATFORM
 #ifndef pdTICKS_TO_MS
-    #define pdTICKS_TO_MS( xTicks )   ( ( uint32_t ) ( xTicks ) * 1000 / configTICK_RATE_HZ )
+    #define pdTICKS_TO_MS( xTicks )   ( ( TickType_t ) ( ( uint64_t ) ( xTicks ) * 1000 / configTICK_RATE_HZ ) )
 #endif
 #endif // ESP_PLATFORM
 
diff --git a/tools/sdk/esp32s2/include/freertos/port/xtensa/include/freertos/portmacro.h b/tools/sdk/esp32s2/include/freertos/port/xtensa/include/freertos/portmacro.h
index 934f056816c..2ee4c12c2b8 100644
--- a/tools/sdk/esp32s2/include/freertos/port/xtensa/include/freertos/portmacro.h
+++ b/tools/sdk/esp32s2/include/freertos/port/xtensa/include/freertos/portmacro.h
@@ -558,14 +558,14 @@ static inline void __attribute__((always_inline)) uxPortCompareSetExtram(volatil
 
 // --------------------- Interrupts ------------------------
 
-static inline UBaseType_t xPortSetInterruptMaskFromISR(void)
+static inline UBaseType_t __attribute__((always_inline)) xPortSetInterruptMaskFromISR(void)
 {
     UBaseType_t prev_int_level = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
     portbenchmarkINTERRUPT_DISABLE();
     return prev_int_level;
 }
 
-static inline void vPortClearInterruptMaskFromISR(UBaseType_t prev_level)
+static inline void __attribute__((always_inline)) vPortClearInterruptMaskFromISR(UBaseType_t prev_level)
 {
     portbenchmarkINTERRUPT_RESTORE(prev_level);
     XTOS_RESTORE_JUST_INTLEVEL(prev_level);
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/adc_hal.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/adc_hal.h
deleted file mode 100644
index a49618f07c7..00000000000
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/adc_hal.h
+++ /dev/null
@@ -1,202 +0,0 @@
-// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-/*******************************************************************************
- * NOTICE
- * The hal is not public api, don't use in application code.
- * See readme.md in hal/include/hal/readme.md
- ******************************************************************************/
-
-// The HAL layer for ADC (esp32s2 specific part)
-
-#pragma once
-
-#include "hal/adc_ll.h"
-#include "hal/adc_types.h"
-
-#include_next "hal/adc_hal.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*---------------------------------------------------------------
-                    Digital controller setting
----------------------------------------------------------------*/
-/**
- * ADC Digital controller output data invert or not.
- *
- * @param adc_n ADC unit.
- * @param inv_en data invert or not.
- */
-#define adc_hal_digi_output_invert(adc_n, inv_en) adc_ll_digi_output_invert(adc_n, inv_en)
-
-/**
- * Sets the number of interval clock cycles for the digital controller to trigger the measurement.
- * Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval. Refer to ``adc_digi_clk_t``.
- *
- * @note The trigger interval should not be less than the sampling time of the SAR ADC.
- * @param cycle The number of clock cycles for the trigger interval. The unit is the divided clock. Range: 40 ~ 4095.
- */
-#define adc_hal_digi_set_trigger_interval(cycle) adc_ll_digi_set_trigger_interval(cycle)
-
-/**
- * Enable digital controller to trigger the measurement.
- */
-void adc_hal_digi_enable(void);
-
-/**
- * Disable digital controller to trigger the measurement.
- */
-void adc_hal_digi_disable(void);
-
-/**
- * Set ADC digital controller clock division factor. The clock divided from `APLL` or `APB` clock.
- * Enable clock and select clock source for ADC digital controller.
- * Expression: controller_clk = (`APLL` or `APB`) / (div_num + div_a / div_b + 1).
- *
- * @note ADC and DAC digital controller share the same frequency divider.
- *       Please set a reasonable frequency division factor to meet the sampling frequency of the ADC and the output frequency of the DAC.
- *
- * @param clk Refer to ``adc_digi_clk_t``.
- */
-void adc_hal_digi_clk_config(const adc_digi_clk_t *clk);
-
-/**
- * Reset adc digital controller filter.
- *
- * @param adc_n ADC unit.
- */
-#define adc_hal_digi_filter_reset(adc_n) adc_ll_digi_filter_reset(adc_n)
-
-/**
- * Set adc digital controller filter factor.
- *
- * @param adc_n ADC unit.
- * @param factor Expression: filter_data = (k-1)/k * last_data + new_data / k. Set values: (2, 4, 8, 16, 64).
- */
-#define adc_hal_digi_filter_set_factor(adc_n, factor) adc_ll_digi_filter_set_factor(adc_n, factor)
-
-/**
- * Get adc digital controller filter factor.
- *
- * @param adc_n ADC unit.
- * @param factor Expression: filter_data = (k-1)/k * last_data + new_data / k. Set values: (2, 4, 8, 16, 64).
- */
-#define adc_hal_digi_filter_get_factor(adc_n, factor) adc_ll_digi_filter_get_factor(adc_n, factor)
-
-/**
- * Enable/disable adc digital controller filter.
- * Filtering the ADC data to obtain smooth data at higher sampling rates.
- *
- * @note The filter will filter all the enabled channel data of the each ADC unit at the same time.
- * @param adc_n ADC unit.
- */
-#define adc_hal_digi_filter_enable(adc_n, enable) adc_ll_digi_filter_enable(adc_n, enable)
-
-/**
- * Get the filtered data of adc digital controller filter.
- * The data after each measurement and filtering is updated to the DMA by the digital controller. But it can also be obtained manually through this API.
- *
- * @note The filter will filter all the enabled channel data of the each ADC unit at the same time.
- * @param adc_n ADC unit.
- * @return Filtered data.
- */
-#define adc_hal_digi_filter_read_data(adc_n) adc_ll_digi_filter_read_data(adc_n)
-
-/**
- * Config monitor of adc digital controller.
- *
- * @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
- * @param adc_n ADC unit.
- * @param config Refer to ``adc_digi_monitor_t``.
- */
-void adc_hal_digi_monitor_config(adc_ll_num_t adc_n, adc_digi_monitor_t *config);
-
-/**
- * Enable/disable monitor of adc digital controller.
- *
- * @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
- * @param adc_n ADC unit.
- */
-#define adc_hal_digi_monitor_enable(adc_n, enable) adc_ll_digi_monitor_enable(adc_n, enable)
-
-/**
- * Enable interrupt of adc digital controller by bitmask.
- *
- * @param adc_n ADC unit.
- * @param intr Interrupt bitmask.
- */
-#define adc_hal_digi_intr_enable(adc_n, intr) adc_ll_digi_intr_enable(adc_n, intr)
-
-/**
- * Disable interrupt of adc digital controller by bitmask.
- *
- * @param adc_n ADC unit.
- * @param intr Interrupt bitmask.
- */
-#define adc_hal_digi_intr_disable(adc_n, intr) adc_ll_digi_intr_disable(adc_n, intr)
-
-/**
- * Clear interrupt of adc digital controller by bitmask.
- *
- * @param adc_n ADC unit.
- * @param intr Interrupt bitmask.
- */
-#define adc_hal_digi_intr_clear(adc_n, intr) adc_ll_digi_intr_clear(adc_n, intr)
-
-/**
- * Get interrupt status mask of adc digital controller.
- *
- * @param adc_n ADC unit.
- * @return
- *     - intr Interrupt bitmask.
- */
-#define adc_hal_digi_get_intr_status(adc_n) adc_ll_digi_get_intr_status(adc_n)
-
-
-/**
- * Set DMA eof num of adc digital controller.
- * If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated.
- *
- * @param num eof num of DMA.
- */
-#define adc_hal_digi_dma_set_eof_num(num) adc_ll_digi_dma_set_eof_num(num)
-
-/**
- * Enable output data to DMA from adc digital controller.
- */
-#define adc_hal_digi_dma_enable() adc_ll_digi_dma_enable()
-
-/**
- * Disable output data to DMA from adc digital controller.
- */
-#define adc_hal_digi_dma_disable() adc_ll_digi_dma_disable()
-
-/**
- * Reset adc digital controller.
- */
-#define adc_hal_digi_reset() adc_ll_digi_reset()
-
-/*---------------------------------------------------------------
-                    RTC controller setting
----------------------------------------------------------------*/
-/**
- * Reset RTC controller FSM.
- */
-#define adc_hal_rtc_reset() adc_ll_rtc_reset()
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/adc_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/adc_ll.h
index a44f50915f1..5e53ab2191f 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/adc_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/adc_ll.h
@@ -1,3 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
 #include <stdbool.h>
@@ -15,6 +21,11 @@
 extern "C" {
 #endif
 
+//To be checked if ESP32S2 has the 5M freq limit
+#define ADC_LL_CLKM_DIV_NUM_DEFAULT 15
+#define ADC_LL_CLKM_DIV_B_DEFAULT   1
+#define ADC_LL_CLKM_DIV_A_DEFAULT   0
+
 typedef enum {
     ADC_NUM_1 = 0,          /*!< SAR ADC 1 */
     ADC_NUM_2 = 1,          /*!< SAR ADC 2 */
@@ -35,6 +46,40 @@ typedef enum {
     ADC_RTC_DATA_FAIL = -1,
 } adc_ll_rtc_raw_data_t;
 
+typedef enum {
+    ADC_LL_CTRL_RTC = 0,    ///< For ADC1. Select RTC controller.
+    ADC_LL_CTRL_ULP = 1,    ///< For ADC1 and ADC2. Select ULP controller.
+    ADC_LL_CTRL_DIG = 2,    ///< For ADC1. Select DIG controller.
+    ADC_LL_CTRL_ARB = 3,    ///< For ADC2. The controller is selected by the arbiter.
+} adc_ll_controller_t;
+
+/**
+ * @brief ADC digital controller (DMA mode) work mode.
+ *
+ * @note  The conversion mode affects the sampling frequency:
+ *        SINGLE_UNIT_1: When the measurement is triggered, only ADC1 is sampled once.
+ *        SINGLE_UNIT_2: When the measurement is triggered, only ADC2 is sampled once.
+ *        BOTH_UNIT    : When the measurement is triggered, ADC1 and ADC2 are sampled at the same time.
+ *        ALTER_UNIT   : When the measurement is triggered, ADC1 or ADC2 samples alternately.
+ */
+typedef enum {
+    ADC_LL_DIGI_CONV_ONLY_ADC1  = 0,    // Only use ADC1 for conversion
+    ADC_LL_DIGI_CONV_ONLY_ADC2  = 1,    // Only use ADC2 for conversion
+    ADC_LL_DIGI_CONV_BOTH_UNIT  = 2,    // Use Both ADC1 and ADC2 for conversion simultaneously
+    ADC_LL_DIGI_CONV_ALTER_UNIT = 3     // Use both ADC1 and ADC2 for conversion by turn. e.g. ADC1 -> ADC2 -> ADC1 -> ADC2 .....
+} adc_ll_digi_convert_mode_t;
+
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:       2;
+            uint8_t reserved:    2;
+            uint8_t channel:     4;
+        };
+        uint8_t val;
+    };
+} __attribute__((packed)) adc_ll_digi_pattern_table_t;
+
 /**
  * @brief Analyze whether the obtained raw data is correct.
  *        ADC2 use arbiter by default. The arbitration result can be judged by the flag bit in the original data.
@@ -53,24 +98,6 @@ typedef struct {
     };
 } adc_ll_rtc_output_data_t;
 
-/**
- * @brief ADC controller type selection.
- *
- * @note For ADC2, use the force option with care. The system power consumption detection will use ADC2.
- *       If it is forced to switch to another controller, it may cause the system to obtain incorrect values.
- * @note Normally, there is no need to switch the controller manually.
- */
-typedef enum {
-    ADC_CTRL_RTC = 0,   /*!<For ADC1. Select RTC controller. For ADC2. The controller is selected by the arbiter. Arbiter in default mode. */
-    ADC_CTRL_ULP = 1,   /*!<For ADC1. Select ULP controller. For ADC2. The controller is selected by the arbiter. Arbiter in default mode. */
-    ADC_CTRL_DIG = 2,   /*!<For ADC1. Select DIG controller. For ADC2. The controller is selected by the arbiter. Arbiter in default mode. */
-    ADC2_CTRL_PWDET = 3,/*!<For ADC2. The controller is selected by the arbiter. Arbiter in default mode. */
-    ADC2_CTRL_FORCE_PWDET = 3,  /*!<For ADC2. Arbiter in shield mode. Force select Wi-Fi controller work. */
-    ADC2_CTRL_FORCE_RTC = 4,    /*!<For ADC2. Arbiter in shield mode. Force select RTC controller work. */
-    ADC2_CTRL_FORCE_ULP = 5,    /*!<For ADC2. Arbiter in shield mode. Force select RTC controller work. */
-    ADC2_CTRL_FORCE_DIG = 6,    /*!<For ADC2. Arbiter in shield mode. Force select digital controller work. */
-} adc_ll_controller_t;
-
 /*---------------------------------------------------------------
                     Digital controller setting
 ---------------------------------------------------------------*/
@@ -120,16 +147,6 @@ static inline void adc_ll_digi_set_clk_div(uint32_t div)
     HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.ctrl, sar_clk_div, div);
 }
 
-/**
- * Set adc output data format for digital controller.
- *
- * @param format Output data format.
- */
-static inline void adc_ll_digi_set_output_format(adc_digi_output_format_t format)
-{
-    APB_SARADC.ctrl.data_sar_sel = format;
-}
-
 /**
  * Set adc max conversion number for digital controller.
  * If the number of ADC conversion is equal to the maximum, the conversion is stopped.
@@ -162,22 +179,25 @@ static inline void adc_ll_digi_convert_limit_disable(void)
 /**
  * Set adc conversion mode for digital controller.
  *
- * @note ESP32 only support ADC1 single mode.
- *
  * @param mode Conversion mode select.
+ * TODO IDF-3610
  */
-static inline void adc_ll_digi_set_convert_mode(adc_digi_convert_mode_t mode)
+static inline void adc_ll_digi_set_convert_mode(adc_ll_digi_convert_mode_t mode)
 {
-    if (mode == ADC_CONV_SINGLE_UNIT_1) {
+    if (mode == ADC_LL_DIGI_CONV_ONLY_ADC1) {
         APB_SARADC.ctrl.work_mode = 0;
         APB_SARADC.ctrl.sar_sel = 0;
-    } else if (mode == ADC_CONV_SINGLE_UNIT_2) {
+        APB_SARADC.ctrl.data_sar_sel = 0;
+    } else if (mode == ADC_LL_DIGI_CONV_ONLY_ADC2) {
         APB_SARADC.ctrl.work_mode = 0;
         APB_SARADC.ctrl.sar_sel = 1;
-    } else if (mode == ADC_CONV_BOTH_UNIT) {
+        APB_SARADC.ctrl.data_sar_sel = 0;
+    } else if (mode == ADC_LL_DIGI_CONV_BOTH_UNIT) {
         APB_SARADC.ctrl.work_mode = 1;
-    } else if (mode == ADC_CONV_ALTER_UNIT) {
+        APB_SARADC.ctrl.data_sar_sel = 1;
+    } else if (mode == ADC_LL_DIGI_CONV_ALTER_UNIT) {
         APB_SARADC.ctrl.work_mode = 2;
+        APB_SARADC.ctrl.data_sar_sel = 1;
     }
 }
 
@@ -209,12 +229,15 @@ static inline void adc_ll_digi_set_pattern_table_len(adc_ll_num_t adc_n, uint32_
  * @param pattern_index Items index. Range: 0 ~ 15.
  * @param pattern Stored conversion rules.
  */
-static inline void adc_ll_digi_set_pattern_table(adc_ll_num_t adc_n, uint32_t pattern_index, adc_digi_pattern_table_t pattern)
+static inline void adc_ll_digi_set_pattern_table(adc_ll_num_t adc_n, uint32_t pattern_index, adc_digi_pattern_config_t table)
 {
     uint32_t tab;
     uint8_t index = pattern_index / 4;
     uint8_t offset = (pattern_index % 4) * 8;
-    if (adc_n == ADC_NUM_1) {
+    adc_ll_digi_pattern_table_t pattern = {0};
+
+    pattern.val = (table.atten & 0x3) | ((table.channel & 0xF) << 4);
+    if (table.unit == ADC_NUM_1) {
         tab = APB_SARADC.sar1_patt_tab[index];  // Read old register value
         tab &= (~(0xFF000000 >> offset));       // clear old data
         tab |= ((uint32_t)pattern.val << 24) >> offset; // Fill in the new data
@@ -319,7 +342,7 @@ static inline void adc_ll_digi_controller_clk_div(uint32_t div_num, uint32_t div
  *
  * @param use_apll true: use APLL clock; false: use APB clock.
  */
-static inline void adc_ll_digi_controller_clk_enable(bool use_apll)
+static inline void adc_ll_digi_clk_sel(bool use_apll)
 {
     if (use_apll) {
         APB_SARADC.apb_adc_clkm_conf.clk_sel = 1;   // APLL clock
@@ -483,112 +506,6 @@ static inline void adc_ll_digi_monitor_enable(adc_ll_num_t adc_n, bool enable)
     }
 }
 
-/**
- * Enable interrupt of adc digital controller by bitmask.
- *
- * @param adc_n ADC unit.
- * @param intr Interrupt bitmask.
- */
-static inline void adc_ll_digi_intr_enable(adc_ll_num_t adc_n, adc_digi_intr_t intr)
-{
-    if (adc_n == ADC_NUM_1) {
-        if (intr & ADC_DIGI_INTR_MASK_MONITOR) {
-            APB_SARADC.int_ena.adc1_thres = 1;
-        }
-        if (intr & ADC_DIGI_INTR_MASK_MEAS_DONE) {
-            APB_SARADC.int_ena.adc1_done = 1;
-        }
-    } else { // adc_n == ADC_NUM_2
-        if (intr & ADC_DIGI_INTR_MASK_MONITOR) {
-            APB_SARADC.int_ena.adc2_thres = 1;
-        }
-        if (intr & ADC_DIGI_INTR_MASK_MEAS_DONE) {
-            APB_SARADC.int_ena.adc2_done = 1;
-        }
-    }
-}
-
-/**
- * Disable interrupt of adc digital controller by bitmask.
- *
- * @param adc_n ADC unit.
- * @param intr Interrupt bitmask.
- */
-static inline void adc_ll_digi_intr_disable(adc_ll_num_t adc_n, adc_digi_intr_t intr)
-{
-    if (adc_n == ADC_NUM_1) {
-        if (intr & ADC_DIGI_INTR_MASK_MONITOR) {
-            APB_SARADC.int_ena.adc1_thres = 0;
-        }
-        if (intr & ADC_DIGI_INTR_MASK_MEAS_DONE) {
-            APB_SARADC.int_ena.adc1_done = 0;
-        }
-    } else { // adc_n == ADC_NUM_2
-        if (intr & ADC_DIGI_INTR_MASK_MONITOR) {
-            APB_SARADC.int_ena.adc2_thres = 0;
-        }
-        if (intr & ADC_DIGI_INTR_MASK_MEAS_DONE) {
-            APB_SARADC.int_ena.adc2_done = 0;
-        }
-    }
-}
-
-/**
- * Clear interrupt of adc digital controller by bitmask.
- *
- * @param adc_n ADC unit.
- * @param intr Interrupt bitmask.
- */
-static inline void adc_ll_digi_intr_clear(adc_ll_num_t adc_n, adc_digi_intr_t intr)
-{
-    if (adc_n == ADC_NUM_1) {
-        if (intr & ADC_DIGI_INTR_MASK_MONITOR) {
-            APB_SARADC.int_clr.adc1_thres = 1;
-        }
-        if (intr & ADC_DIGI_INTR_MASK_MEAS_DONE) {
-            APB_SARADC.int_clr.adc1_done = 1;
-        }
-    } else { // adc_n == ADC_NUM_2
-        if (intr & ADC_DIGI_INTR_MASK_MONITOR) {
-            APB_SARADC.int_clr.adc2_thres = 1;
-        }
-        if (intr & ADC_DIGI_INTR_MASK_MEAS_DONE) {
-            APB_SARADC.int_clr.adc2_done = 1;
-        }
-    }
-}
-
-/**
- * Get interrupt status mask of adc digital controller.
- *
- * @param adc_n ADC unit.
- * @return
- *     - intr Interrupt bitmask.
- */
-static inline uint32_t adc_ll_digi_get_intr_status(adc_ll_num_t adc_n)
-{
-    uint32_t int_st = APB_SARADC.int_st.val;
-    uint32_t ret_msk = 0;
-
-    if (adc_n == ADC_NUM_1) {
-        if (int_st & APB_SARADC_ADC1_DONE_INT_ST_M) {
-            ret_msk |= ADC_DIGI_INTR_MASK_MEAS_DONE;
-        }
-        if (int_st & APB_SARADC_ADC1_THRES_INT_ST) {
-            ret_msk |= ADC_DIGI_INTR_MASK_MONITOR;
-        }
-    } else { // adc_n == ADC_NUM_2
-        if (int_st & APB_SARADC_ADC2_DONE_INT_ST_M) {
-            ret_msk |= ADC_DIGI_INTR_MASK_MEAS_DONE;
-        }
-        if (int_st & APB_SARADC_ADC2_THRES_INT_ST_M) {
-            ret_msk |= ADC_DIGI_INTR_MASK_MONITOR;
-        }
-    }
-
-    return ret_msk;
-}
-
 /**
  * Set DMA eof num of adc digital controller.
  * If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated.
@@ -655,6 +572,20 @@ static inline uint32_t adc_ll_pwdet_get_cct(void)
 /*---------------------------------------------------------------
                     RTC controller setting
 ---------------------------------------------------------------*/
+/**
+ * ADC SAR clock division factor setting. ADC SAR clock devided from `RTC_FAST_CLK`.
+ *
+ * @param div Division factor.
+ */
+static inline void adc_ll_set_sar_clk_div(adc_ll_num_t adc_n, uint32_t div)
+{
+    if (adc_n == ADC_NUM_1) {
+        HAL_FORCE_MODIFY_U32_REG_FIELD(SENS.sar_reader1_ctrl, sar1_clk_div, div);
+    } else { // adc_n == ADC_NUM_2
+        HAL_FORCE_MODIFY_U32_REG_FIELD(SENS.sar_reader2_ctrl, sar2_clk_div, div);
+    }
+}
+
 /**
  * Set adc output data format for RTC controller.
  *
@@ -855,65 +786,6 @@ static inline adc_ll_rtc_raw_data_t adc_ll_rtc_analysis_raw_data(adc_ll_num_t ad
     }
 }
 
-/*---------------------------------------------------------------
-                    Common setting
----------------------------------------------------------------*/
-/**
- * Set ADC module power management.
- *
- * @param manage Set ADC power status.
- */
-static inline void adc_ll_set_power_manage(adc_ll_power_t manage)
-{
-    /* Bit1  0:Fsm  1: SW mode
-       Bit0  0:SW mode power down  1: SW mode power on */
-    if (manage == ADC_POWER_SW_ON) {
-        SENS.sar_meas1_ctrl1.rtc_saradc_clkgate_en = 1;
-        SENS.sar_power_xpd_sar.force_xpd_sar = SENS_FORCE_XPD_SAR_PU;
-    } else if (manage == ADC_POWER_BY_FSM) {
-        SENS.sar_meas1_ctrl1.rtc_saradc_clkgate_en = 1;
-        SENS.sar_power_xpd_sar.force_xpd_sar = SENS_FORCE_XPD_SAR_FSM;
-    } else if (manage == ADC_POWER_SW_OFF) {
-        SENS.sar_power_xpd_sar.force_xpd_sar = SENS_FORCE_XPD_SAR_PD;
-        SENS.sar_meas1_ctrl1.rtc_saradc_clkgate_en = 0;
-    }
-}
-
-/**
- * Get ADC module power management.
- *
- * @return
- *      - ADC power status.
- */
-static inline adc_ll_power_t adc_ll_get_power_manage(void)
-{
-    /* Bit1  0:Fsm  1: SW mode
-       Bit0  0:SW mode power down  1: SW mode power on */
-    adc_ll_power_t manage;
-    if (SENS.sar_power_xpd_sar.force_xpd_sar == SENS_FORCE_XPD_SAR_PU) {
-        manage = ADC_POWER_SW_ON;
-    } else if (SENS.sar_power_xpd_sar.force_xpd_sar == SENS_FORCE_XPD_SAR_PD) {
-        manage = ADC_POWER_SW_OFF;
-    } else {
-        manage = ADC_POWER_BY_FSM;
-    }
-    return manage;
-}
-
-/**
- * ADC SAR clock division factor setting. ADC SAR clock devided from `RTC_FAST_CLK`.
- *
- * @param div Division factor.
- */
-static inline void adc_ll_set_sar_clk_div(adc_ll_num_t adc_n, uint32_t div)
-{
-    if (adc_n == ADC_NUM_1) {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(SENS.sar_reader1_ctrl, sar1_clk_div, div);
-    } else { // adc_n == ADC_NUM_2
-        HAL_FORCE_MODIFY_U32_REG_FIELD(SENS.sar_reader2_ctrl, sar2_clk_div, div);
-    }
-}
-
 /**
  * Set the attenuation of a particular channel on ADCn.
  *
@@ -972,6 +844,30 @@ static inline adc_atten_t adc_ll_get_atten(adc_ll_num_t adc_n, adc_channel_t cha
     }
 }
 
+/*---------------------------------------------------------------
+                    Common setting
+---------------------------------------------------------------*/
+/**
+ * Set ADC module power management.
+ *
+ * @param manage Set ADC power status.
+ */
+static inline void adc_ll_set_power_manage(adc_ll_power_t manage)
+{
+    /* Bit1  0:Fsm  1: SW mode
+       Bit0  0:SW mode power down  1: SW mode power on */
+    if (manage == ADC_POWER_SW_ON) {
+        SENS.sar_meas1_ctrl1.rtc_saradc_clkgate_en = 1;
+        SENS.sar_power_xpd_sar.force_xpd_sar = SENS_FORCE_XPD_SAR_PU;
+    } else if (manage == ADC_POWER_BY_FSM) {
+        SENS.sar_meas1_ctrl1.rtc_saradc_clkgate_en = 1;
+        SENS.sar_power_xpd_sar.force_xpd_sar = SENS_FORCE_XPD_SAR_FSM;
+    } else if (manage == ADC_POWER_SW_OFF) {
+        SENS.sar_power_xpd_sar.force_xpd_sar = SENS_FORCE_XPD_SAR_PD;
+        SENS.sar_meas1_ctrl1.rtc_saradc_clkgate_en = 0;
+    }
+}
+
 /**
  * Set ADC module controller.
  * There are five SAR ADC controllers:
@@ -985,18 +881,18 @@ static inline adc_atten_t adc_ll_get_atten(adc_ll_num_t adc_n, adc_channel_t cha
 static inline void adc_ll_set_controller(adc_ll_num_t adc_n, adc_ll_controller_t ctrl)
 {
     if (adc_n == ADC_NUM_1) {
-        switch ( ctrl ) {
-        case ADC_CTRL_RTC:
+        switch (ctrl) {
+        case ADC_LL_CTRL_RTC:
             SENS.sar_meas1_mux.sar1_dig_force       = 0;    // 1: Select digital control;       0: Select RTC control.
             SENS.sar_meas1_ctrl2.meas1_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas1_ctrl2.sar1_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
             break;
-        case ADC_CTRL_ULP:
+        case ADC_LL_CTRL_ULP:
             SENS.sar_meas1_mux.sar1_dig_force       = 0;    // 1: Select digital control;       0: Select RTC control.
             SENS.sar_meas1_ctrl2.meas1_start_force  = 0;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas1_ctrl2.sar1_en_pad_force  = 0;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
             break;
-        case ADC_CTRL_DIG:
+        case ADC_LL_CTRL_DIG:
             SENS.sar_meas1_mux.sar1_dig_force       = 1;    // 1: Select digital control;       0: Select RTC control.
             SENS.sar_meas1_ctrl2.meas1_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas1_ctrl2.sar1_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
@@ -1005,23 +901,16 @@ static inline void adc_ll_set_controller(adc_ll_num_t adc_n, adc_ll_controller_t
             break;
         }
     } else { // adc_n == ADC_NUM_2
-        switch ( ctrl ) {
-        case ADC_CTRL_RTC:
+        switch (ctrl) {
+        //If ADC2 is not controlled by ULP, the arbiter will decide which controller to use ADC2.
+        case ADC_LL_CTRL_ARB:
             SENS.sar_meas2_ctrl2.meas2_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas2_ctrl2.sar2_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
             break;
-        case ADC_CTRL_ULP:
+        case ADC_LL_CTRL_ULP:
             SENS.sar_meas2_ctrl2.meas2_start_force  = 0;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
             SENS.sar_meas2_ctrl2.sar2_en_pad_force  = 0;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
             break;
-        case ADC_CTRL_DIG:
-            SENS.sar_meas2_ctrl2.meas2_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
-            SENS.sar_meas2_ctrl2.sar2_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
-            break;
-        case ADC2_CTRL_PWDET:   // currently only used by Wi-Fi
-            SENS.sar_meas2_ctrl2.meas2_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
-            SENS.sar_meas2_ctrl2.sar2_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
-            break;
         default:
             break;
         }
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/clk_gate_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/clk_gate_ll.h
index 7a2bbe6cf21..cde957997fd 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/clk_gate_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/clk_gate_ll.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -29,6 +21,8 @@ extern "C" {
 static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
 {
     switch (periph) {
+    case PERIPH_SARADC_MODULE:
+        return DPORT_APB_SARADC_CLK_EN;
     case PERIPH_LEDC_MODULE:
         return DPORT_LEDC_CLK_EN;
     case PERIPH_UART0_MODULE:
@@ -99,6 +93,8 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
     (void)enable; // unused
 
     switch (periph) {
+    case PERIPH_SARADC_MODULE:
+        return DPORT_APB_SARADC_RST;
     case PERIPH_LEDC_MODULE:
         return DPORT_LEDC_RST;
     case PERIPH_UART0_MODULE:
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/gpio_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/gpio_ll.h
index 572e4bc3262..1056230604a 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/gpio_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/gpio_ll.h
@@ -390,7 +390,7 @@ static inline void gpio_ll_iomux_in(gpio_dev_t *hw, uint32_t gpio, uint32_t sign
  * @param  pin_name Pin name to configure
  * @param  func Function to assign to the pin
  */
-static inline void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
+static inline __attribute__((always_inline)) void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
 {
     PIN_FUNC_SELECT(pin_name, func);
 }
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/rmt_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/rmt_ll.h
index ba73eaa2b75..f7452a364e3 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/rmt_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/rmt_ll.h
@@ -45,7 +45,7 @@ static inline bool rmt_ll_is_mem_power_down(rmt_dev_t *dev)
 
 static inline void rmt_ll_enable_mem_access(rmt_dev_t *dev, bool enable)
 {
-    dev->apb_conf.fifo_mask = enable;
+    dev->apb_conf.apb_fifo_mask = enable;
 }
 
 static inline void rmt_ll_set_group_clock_src(rmt_dev_t *dev, uint32_t channel, uint8_t src, uint8_t div_num, uint8_t div_a, uint8_t div_b)
@@ -250,17 +250,7 @@ static inline uint32_t rmt_ll_tx_get_channel_status(rmt_dev_t *dev, uint32_t cha
 
 static inline void rmt_ll_tx_set_limit(rmt_dev_t *dev, uint32_t channel, uint32_t limit)
 {
-    dev->tx_lim_ch[channel].limit = limit;
-}
-
-static inline void rmt_ll_rx_set_limit(rmt_dev_t *dev, uint32_t channel, uint32_t limit)
-{
-    dev->tx_lim_ch[channel].rx_lim = limit;
-}
-
-static inline uint32_t rmt_ll_rx_get_limit(rmt_dev_t *dev, uint32_t channel)
-{
-    return dev->tx_lim_ch[channel].rx_lim;
+    dev->tx_lim_ch[channel].tx_lim = limit;
 }
 
 static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool enable)
@@ -308,12 +298,6 @@ static inline void rmt_ll_enable_tx_loop_interrupt(rmt_dev_t *dev, uint32_t chan
     dev->int_ena.val |= (enable << (channel + 16));
 }
 
-static inline void rmt_ll_enable_rx_thres_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
-{
-    dev->int_ena.val &= ~(1 << (channel + 20));
-    dev->int_ena.val |= (enable << (channel + 20));
-}
-
 static inline void rmt_ll_clear_tx_end_interrupt(rmt_dev_t *dev, uint32_t channel)
 {
     dev->int_clr.val = (1 << (channel * 3));
@@ -344,11 +328,6 @@ static inline void rmt_ll_clear_tx_loop_interrupt(rmt_dev_t *dev, uint32_t chann
     dev->int_clr.val = (1 << (channel + 16));
 }
 
-static inline void rmt_ll_clear_rx_thres_interrupt(rmt_dev_t *dev, uint32_t channel)
-{
-    dev->int_clr.val = (1 << (channel + 20));
-}
-
 static inline uint32_t rmt_ll_get_tx_end_interrupt_status(rmt_dev_t *dev)
 {
     uint32_t status = dev->int_st.val;
@@ -385,12 +364,6 @@ static inline uint32_t rmt_ll_get_tx_loop_interrupt_status(rmt_dev_t *dev)
     return (status & 0xF0000) >> 16;
 }
 
-static inline uint32_t rmt_ll_get_rx_thres_interrupt_status(rmt_dev_t *dev)
-{
-    uint32_t status =  dev->int_st.val;
-    return (status & 0xF00000) >> 20;
-}
-
 static inline void rmt_ll_tx_set_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t high_ticks, uint32_t low_ticks)
 {
     // In case the compiler optimise a 32bit instruction (e.g. s32i) into two 16bit instruction (e.g. s16i, which is not allowed to access a register)
@@ -459,11 +432,6 @@ static inline void rmt_ll_write_memory(rmt_mem_t *mem, uint32_t channel, const v
     }
 }
 
-static inline void rmt_ll_rx_enable_pingpong(rmt_dev_t *dev, uint32_t channel, bool enable)
-{
-    dev->conf_ch[channel].conf1.chk_rx_carrier_en = enable;
-}
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h
index b81b36c53be..c6dac13154c 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /*******************************************************************************
  * NOTICE
@@ -746,7 +738,7 @@ static inline void spi_ll_set_dummy(spi_dev_t *hw, int dummy_n)
  */
 static inline void spi_ll_master_set_cs_hold(spi_dev_t *hw, int hold)
 {
-    hw->ctrl2.cs_hold_time = hold - 1;
+    hw->ctrl2.cs_hold_time = hold;
     hw->user.cs_hold = hold ? 1 : 0;
 }
 
@@ -1089,10 +1081,6 @@ static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t *hw)
  */
 static inline void spi_dma_ll_rx_reset(spi_dma_dev_t *dma_in, uint32_t channel)
 {
-    //Reset RX DMA peripheral
-    dma_in->dma_in_link.dma_rx_ena = 0;
-    HAL_ASSERT(dma_in->dma_in_link.dma_rx_ena == 0);
-
     dma_in->dma_conf.in_rst = 1;
     dma_in->dma_conf.in_rst = 0;
 }
@@ -1110,6 +1098,17 @@ static inline void spi_dma_ll_rx_start(spi_dma_dev_t *dma_in, uint32_t channel,
     dma_in->dma_in_link.start = 1;
 }
 
+/**
+ * Stop RX DMA.
+ *
+ * @param dma_in  Beginning address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
+ * @param channel DMA channel, for chip version compatibility, not used.
+ */
+static inline void spi_dma_ll_rx_stop(spi_dma_dev_t *dma_in, uint32_t channel)
+{
+    dma_in->dma_in_link.stop = 1;
+}
+
 /**
  * Enable DMA RX channel burst for data
  *
@@ -1173,6 +1172,17 @@ static inline void spi_dma_ll_tx_start(spi_dma_dev_t *dma_out, uint32_t channel,
     dma_out->dma_out_link.start = 1;
 }
 
+/**
+ * Stop TX DMA.
+ *
+ * @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
+ * @param channel DMA channel, for chip version compatibility, not used.
+ */
+static inline void spi_dma_ll_tx_stop(spi_dma_dev_t *dma_out, uint32_t channel)
+{
+    dma_out->dma_out_link.stop = 1;
+}
+
 /**
  * Enable DMA TX channel burst for data
  *
@@ -1251,7 +1261,6 @@ static inline void spi_dma_ll_rx_disable(spi_dma_dev_t *dma_in)
 static inline void spi_dma_ll_tx_disable(spi_dma_dev_t *dma_out)
 {
     dma_out->dma_out_link.dma_tx_ena = 0;
-    dma_out->dma_out_link.stop = 1;
 }
 
 static inline bool spi_ll_tx_get_empty_err(spi_dev_t *hw)
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/adc_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/adc_hal.h
index 807d620c639..b8455e27ecd 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/adc_hal.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/adc_hal.h
@@ -1,21 +1,51 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
+#include "esp_err.h"
 #include "soc/soc_caps.h"
+#include "hal/dma_types.h"
 #include "hal/adc_types.h"
 #include "hal/adc_ll.h"
 #include "esp_err.h"
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+#if SOC_GDMA_SUPPORTED
 #include "soc/gdma_struct.h"
 #include "hal/gdma_ll.h"
-#include "hal/dma_types.h"
-#include "hal/adc_ll.h"
-#include "hal/dma_types.h"
-#include "esp_err.h"
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32S2
+//ADC utilises SPI3 DMA on ESP32S2
+#include "hal/spi_ll.h"
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+//ADC utilises I2S0 DMA on ESP32
+#include "hal/i2s_ll.h"
+#endif
+
+#if SOC_GDMA_SUPPORTED
+#define ADC_HAL_DMA_INTR_MASK                           GDMA_LL_EVENT_RX_SUC_EOF
+#elif CONFIG_IDF_TARGET_ESP32S2
+#define ADC_HAL_DMA_INTR_MASK                           SPI_LL_INTR_IN_SUC_EOF
+#else //CONFIG_IDF_TARGET_ESP32
+#define ADC_HAL_DMA_INTR_MASK                           BIT(9)
+#endif
 
 //For ADC module, each conversion contains 4 bytes
 #define ADC_HAL_DATA_LEN_PER_CONV 4
 
+typedef enum adc_hal_work_mode_t {
+    ADC_HAL_ULP_MODE,
+    ADC_HAL_SINGLE_READ_MODE,
+    ADC_HAL_CONTINUOUS_READ_MODE,
+    ADC_HAL_PWDET_MODE
+} adc_hal_work_mode_t;
+
 /**
  * @brief Enum for DMA descriptor status
  */
@@ -29,6 +59,7 @@ typedef enum adc_hal_dma_desc_status_t {
  * @brief Configuration of the HAL
  */
 typedef struct adc_hal_config_t {
+    void                *dev;               ///< DMA peripheral address
     uint32_t            desc_max_num;       ///< Number of the descriptors linked once
     uint32_t            dma_chan;           ///< DMA channel to be used
     uint32_t            eof_num;            ///< Bytes between 2 in_suc_eof interrupts
@@ -42,25 +73,30 @@ typedef struct adc_hal_context_t {
     dma_descriptor_t    *rx_desc;           ///< DMA descriptors
 
     /**< these will be assigned by hal layer itself */
-    gdma_dev_t          *dev;               ///< GDMA address
     dma_descriptor_t    desc_dummy_head;    ///< Dummy DMA descriptor for ``cur_desc_ptr`` to start
     dma_descriptor_t    *cur_desc_ptr;      ///< Pointer to the current descriptor
 
     /**< these need to be configured by `adc_hal_config_t` via driver layer*/
+    void                *dev;               ///< DMA address
     uint32_t            desc_max_num;       ///< Number of the descriptors linked once
     uint32_t            dma_chan;           ///< DMA channel to be used
     uint32_t            eof_num;            ///< Words between 2 in_suc_eof interrupts
 } adc_hal_context_t;
-#endif
+
+typedef struct adc_hal_digi_ctrlr_cfg_t {
+    bool                        conv_limit_en;      //1: adc conversion will stop when `conv_limit_num` reaches. 0: won't stop. NOTE: esp32 should always be set to 1.
+    uint32_t                    conv_limit_num;     //see `conv_limit_en`
+    uint32_t                    adc_pattern_len;    //total pattern item number, including ADC1 and ADC2
+    adc_digi_pattern_config_t   *adc_pattern;       //pattern item
+    uint32_t                    sample_freq_hz;     //ADC sample frequency
+    adc_digi_convert_mode_t     conv_mode;          //controller work mode
+    uint32_t                    bit_width;          //output data width
+} adc_hal_digi_ctrlr_cfg_t;
+
 
 /*---------------------------------------------------------------
                     Common setting
 ---------------------------------------------------------------*/
-/**
- * ADC module initialization.
- */
-void adc_hal_init(void);
-
 /**
  * Set ADC module power management.
  *
@@ -68,51 +104,7 @@ void adc_hal_init(void);
  */
 #define adc_hal_set_power_manage(manage) adc_ll_set_power_manage(manage)
 
-/**
- * ADC module clock division factor setting. ADC clock devided from APB clock.
- *
- * @prarm div Division factor.
- */
-#define adc_hal_digi_set_clk_div(div) adc_ll_digi_set_clk_div(div)
-
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * ADC SAR clock division factor setting. ADC SAR clock devided from `RTC_FAST_CLK`.
- *
- * @prarm div Division factor.
- */
-#define adc_hal_set_sar_clk_div(adc_n, div) adc_ll_set_sar_clk_div(adc_n, div)
-
-/**
- * Set ADC module controller.
- * There are five SAR ADC controllers:
- * Two digital controller: Continuous conversion mode (DMA). High performance with multiple channel scan modes;
- * Two RTC controller: Single conversion modes (Polling). For low power purpose working during deep sleep;
- * the other is dedicated for Power detect (PWDET / PKDET), Only support ADC2.
- *
- * @prarm adc_n ADC unit.
- * @prarm ctrl ADC controller.
- */
-#define adc_hal_set_controller(adc_n, ctrl) adc_ll_set_controller(adc_n, ctrl)
-#endif  //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
-/**
- * Get the attenuation of a particular channel on ADCn.
- *
- * @param adc_n ADC unit.
- * @param channel ADCn channel number.
- * @return atten The attenuation option.
- */
-#define adc_hal_get_atten(adc_n, channel) adc_ll_get_atten(adc_n, channel)
-#endif
-
-#if CONFIG_IDF_TARGET_ESP32
-/**
- * Close ADC AMP module if don't use it for power save.
- */
-#define adc_hal_amp_disable() adc_ll_amp_disable()
-#endif
+void adc_hal_set_controller(adc_ll_num_t unit, adc_hal_work_mode_t work_mode);
 
 #if SOC_ADC_ARBITER_SUPPORTED
 //No ADC2 controller arbiter on ESP32
@@ -133,7 +125,6 @@ void adc_hal_arbiter_config(adc_arbiter_t *config);
 /*---------------------------------------------------------------
                     PWDET(Power detect) controller setting
 ---------------------------------------------------------------*/
-
 /**
  * Set adc cct for PWDET controller.
  *
@@ -150,26 +141,6 @@ void adc_hal_arbiter_config(adc_arbiter_t *config);
  */
 #define adc_hal_pwdet_get_cct() adc_ll_pwdet_get_cct()
 
-/*---------------------------------------------------------------
-                    RTC controller setting
----------------------------------------------------------------*/
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-/**
- * Set adc output data format for RTC controller.
- *
- * @prarm adc_n ADC unit.
- * @prarm bits Output data bits width option.
- */
-#define adc_hal_rtc_set_output_format(adc_n, bits) adc_ll_rtc_set_output_format(adc_n, bits)
-
-/**
- * ADC module output data invert or not.
- *
- * @prarm adc_n ADC unit.
- */
-#define adc_hal_rtc_output_invert(adc_n, inv_en) adc_ll_rtc_output_invert(adc_n, inv_en)
-#endif  //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
-
 /**
  *  Enable/disable the output of ADCn's internal reference voltage to one of ADC2's channels.
  *
@@ -187,29 +158,109 @@ void adc_hal_arbiter_config(adc_arbiter_t *config);
 /*---------------------------------------------------------------
                     Digital controller setting
 ---------------------------------------------------------------*/
+/**
+ * ADC module initialization.
+ */
+void adc_hal_init(void);
+
 /**
  * Digital controller deinitialization.
+ *
+ * @param hal Context of the HAL
  */
-void adc_hal_digi_deinit(void);
+void adc_hal_digi_deinit(adc_hal_context_t *hal);
+
+/**
+ * @brief Initialize the hal context
+ *
+ * @param hal    Context of the HAL
+ * @param config Configuration of the HAL
+ */
+void adc_hal_context_config(adc_hal_context_t *hal, const adc_hal_config_t *config);
+
+/**
+ * @brief Initialize the HW
+ *
+ * @param hal Context of the HAL
+ */
+void adc_hal_digi_init(adc_hal_context_t *hal);
 
 /**
  * Setting the digital controller.
  *
- * @param cfg Pointer to digital controller paramter.
+ * @param hal    Context of the HAL
+ * @param cfg    Pointer to digital controller paramter.
+ */
+void adc_hal_digi_controller_config(adc_hal_context_t *hal, const adc_hal_digi_ctrlr_cfg_t *cfg);
+
+/**
+ * @brief Start Conversion
+ *
+ * @param hal Context of the HAL
+ * @param data_buf Pointer to the data buffer, the length should be multiple of ``desc_max_num`` and ``eof_num`` in ``adc_hal_context_t``
  */
-void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
+void adc_hal_digi_start(adc_hal_context_t *hal, uint8_t *data_buf);
 
+#if !SOC_GDMA_SUPPORTED
 /**
- * Reset the pattern table pointer, then take the measurement rule from table header in next measurement.
+ * @brief Get the DMA descriptor that Hardware has finished processing.
  *
- * @param adc_n ADC unit.
+ * @param hal Context of the HAL
+ *
+ * @return DMA descriptor address
  */
-#define adc_hal_digi_clear_pattern_table(adc_n) adc_ll_digi_clear_pattern_table(adc_n)
+intptr_t adc_hal_get_desc_addr(adc_hal_context_t *hal);
+
+/**
+ * @brief Check the hardware interrupt event
+ *
+ * @param hal Context of the HAL
+ * @param mask Event mask
+ *
+ * @return True: the event is triggered. False: the event is not triggered yet.
+ */
+bool adc_hal_check_event(adc_hal_context_t *hal, uint32_t mask);
+#endif
+
+/**
+ * @brief Get the ADC reading result
+ *
+ * @param      hal           Context of the HAL
+ * @param      eof_desc_addr The last descriptor that is finished by HW. Should be got from DMA
+ * @param[out] cur_desc      The descriptor with ADC reading result (from the 1st one to the last one (``eof_desc_addr``))
+ *
+ * @return                   See ``adc_hal_dma_desc_status_t``
+ */
+adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_context_t *hal, const intptr_t eof_desc_addr, dma_descriptor_t **cur_desc);
+
+/**
+ * @brief Clear interrupt
+ *
+ * @param hal  Context of the HAL
+ * @param mask mask of the interrupt
+ */
+void adc_hal_digi_clr_intr(adc_hal_context_t *hal, uint32_t mask);
+
+/**
+ * @brief Enable interrupt
+ *
+ * @param hal  Context of the HAL
+ * @param mask mask of the interrupt
+ */
+void adc_hal_digi_dis_intr(adc_hal_context_t *hal, uint32_t mask);
+
+/**
+ * @brief Stop conversion
+ *
+ * @param hal Context of the HAL
+ */
+void adc_hal_digi_stop(adc_hal_context_t *hal);
+
 
 /*---------------------------------------------------------------
                     ADC Single Read
 ---------------------------------------------------------------*/
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
+#if SOC_ADC_RTC_CTRL_SUPPORTED
 /**
  * Set the attenuation of a particular channel on ADCn.
  *
@@ -245,7 +296,7 @@ void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
  */
 #define adc_hal_set_atten(adc_n, channel, atten) adc_ll_set_atten(adc_n, channel, atten)
 
-#else // CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+#else // #if !SOC_ADC_RTC_CTRL_SUPPORTED
 /**
  * Set the attenuation for ADC to single read
  *
@@ -256,7 +307,7 @@ void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
  * @param atten    ADC attenuation. See ``adc_atten_t``
  */
 #define adc_hal_set_atten(adc_n, channel, atten) adc_ll_onetime_set_atten(atten)
-#endif
+#endif  //#if SOC_ADC_RTC_CTRL_SUPPORTED
 
 /**
  * Start an ADC conversion and get the converted value.
@@ -277,7 +328,6 @@ esp_err_t adc_hal_convert(adc_ll_num_t adc_n, int channel, int *out_raw);
                     ADC calibration setting
 ---------------------------------------------------------------*/
 #if SOC_ADC_CALIBRATION_V1_SUPPORTED
-// ESP32-S2, C3 and H2 support HW offset calibration.
 
 /**
  * @brief Initialize default parameter for the calibration block.
@@ -314,86 +364,21 @@ uint32_t adc_hal_self_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc
 
 #endif //SOC_ADC_CALIBRATION_V1_SUPPORTED
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+
 /*---------------------------------------------------------------
-                    DMA setting
+                    RTC controller setting
 ---------------------------------------------------------------*/
 /**
- * @brief Initialize the hal context
- *
- * @param hal    Context of the HAL
- * @param config Configuration of the HAL
- */
-void adc_hal_context_config(adc_hal_context_t *hal, const adc_hal_config_t *config);
-
-/**
- * @brief Initialize the HW
- *
- * @param hal Context of the HAL
- */
-void adc_hal_digi_init(adc_hal_context_t *hal);
-
-/**
- * @brief Reset ADC / DMA fifo
- *
- * @param hal Context of the HAL
- */
-void adc_hal_fifo_reset(adc_hal_context_t *hal);
-
-/**
- * @brief Start DMA
- *
- * @param hal      Context of the HAL
- * @param data_buf Pointer to the data buffer, the length should be multiple of ``desc_max_num`` and ``eof_num`` in ``adc_hal_context_t``
- */
-void adc_hal_digi_rxdma_start(adc_hal_context_t *hal, uint8_t *data_buf);
-
-/**
- * @brief Start ADC
- *
- * @param hal Context of the HAL
- */
-void adc_hal_digi_start(adc_hal_context_t *hal);
-
-/**
- * @brief Get the ADC reading result
- *
- * @param      hal           Context of the HAL
- * @param      eof_desc_addr The last descriptor that is finished by HW. Should be got from DMA
- * @param[out] cur_desc      The descriptor with ADC reading result (from the 1st one to the last one (``eof_desc_addr``))
- *
- * @return                   See ``adc_hal_dma_desc_status_t``
- */
-adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_context_t *hal, const intptr_t eof_desc_addr, dma_descriptor_t **cur_desc);
-
-/**
- * @brief Stop DMA
- *
- * @param hal Context of the HAL
- */
-void adc_hal_digi_rxdma_stop(adc_hal_context_t *hal);
-
-/**
- * @brief Clear interrupt
- *
- * @param hal  Context of the HAL
- * @param mask mask of the interrupt
- */
-void adc_hal_digi_clr_intr(adc_hal_context_t *hal, uint32_t mask);
-
-/**
- * @brief Enable interrupt
+ * Set adc output data format for RTC controller.
  *
- * @param hal  Context of the HAL
- * @param mask mask of the interrupt
+ * @prarm adc_n ADC unit.
+ * @prarm bits Output data bits width option.
  */
-void adc_hal_digi_dis_intr(adc_hal_context_t *hal, uint32_t mask);
+#define adc_hal_rtc_set_output_format(adc_n, bits) adc_ll_rtc_set_output_format(adc_n, bits)
 
 /**
- * @brief Stop ADC
+ * ADC module output data invert or not.
  *
- * @param hal Context of the HAL
+ * @prarm adc_n ADC unit.
  */
-void adc_hal_digi_stop(adc_hal_context_t *hal);
-
-#endif  //#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+#define adc_hal_rtc_output_invert(adc_n, inv_en) adc_ll_rtc_output_invert(adc_n, inv_en)
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/adc_types.h b/tools/sdk/esp32s2/include/hal/include/hal/adc_types.h
index c0f6661f145..f5efb1d4273 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/adc_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/adc_types.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 
 #include <stdbool.h>
@@ -62,26 +54,9 @@ typedef enum {
     ADC_ATTEN_MAX,
 } adc_atten_t;
 
-#ifdef CONFIG_IDF_TARGET_ESP32
-/**
- * @brief ESP32 ADC DMA source selection.
- */
-#else
-/**
- * @brief ESP32 ADC DMA source selection.
- *
- * @deprecated  Not applicable on ESP32-S2 because ESP32-S2 doesn't use I2S DMA.
- */
-#endif
-typedef enum {
-    ADC_I2S_DATA_SRC_IO_SIG = 0, /*!< I2S data from GPIO matrix signal  */
-    ADC_I2S_DATA_SRC_ADC = 1,    /*!< I2S data from ADC */
-    ADC_I2S_DATA_SRC_MAX,
-} adc_i2s_source_t;
-
 /**
  * @brief ADC resolution setting option.
- *
+ * @note  Only used in single read mode
  */
 typedef enum {
 #if CONFIG_IDF_TARGET_ESP32
@@ -97,82 +72,56 @@ typedef enum {
     ADC_WIDTH_MAX,
 } adc_bits_width_t;
 
-
 /**
  * @brief ADC digital controller (DMA mode) work mode.
- *
- * @note  The conversion mode affects the sampling frequency:
- *        SINGLE_UNIT_1: When the measurement is triggered, only ADC1 is sampled once.
- *        SINGLE_UNIT_2: When the measurement is triggered, only ADC2 is sampled once.
- *        BOTH_UNIT    : When the measurement is triggered, ADC1 and ADC2 are sampled at the same time.
- *        ALTER_UNIT   : When the measurement is triggered, ADC1 or ADC2 samples alternately.
  */
 typedef enum {
-    ADC_CONV_SINGLE_UNIT_1 = 1, /*!< SAR ADC 1. */
-    ADC_CONV_SINGLE_UNIT_2 = 2, /*!< SAR ADC 2. */
-    ADC_CONV_BOTH_UNIT     = 3, /*!< SAR ADC 1 and 2. */
-    ADC_CONV_ALTER_UNIT    = 7, /*!< SAR ADC 1 and 2 alternative mode. */
+    ADC_CONV_SINGLE_UNIT_1 = 1,  ///< Only use ADC1 for conversion
+    ADC_CONV_SINGLE_UNIT_2 = 2,  ///< Only use ADC2 for conversion
+    ADC_CONV_BOTH_UNIT     = 3,  ///< Use Both ADC1 and ADC2 for conversion simultaneously
+    ADC_CONV_ALTER_UNIT    = 7,  ///< Use both ADC1 and ADC2 for conversion by turn. e.g. ADC1 -> ADC2 -> ADC1 -> ADC2 .....
     ADC_CONV_UNIT_MAX,
 } adc_digi_convert_mode_t;
 
-/**
- * @brief ADC digital controller (DMA mode) conversion rules setting.
- */
-typedef struct {
-    union {
-        struct {
-            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
-                                         0: measurement range 0 - 800mV,
-                                         1: measurement range 0 - 1100mV,
-                                         2: measurement range 0 - 1350mV,
-                                         3: measurement range 0 - 2600mV. */
-#if CONFIG_IDF_TARGET_ESP32
-            uint8_t bit_width: 2;   /*!< ADC resolution.
--                                         0: 9 bit;
--                                         1: 10 bit;
--                                         2: 11 bit;
--                                         3: 12 bit. */
-            int8_t channel:   4;   /*!< ADC channel index. */
-#elif CONFIG_IDF_TARGET_ESP32S2
-            uint8_t reserved:  2;   /*!< reserved0 */
-            uint8_t channel:   4;   /*!< ADC channel index. */
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-            uint8_t channel:   3;   /*!< ADC channel index. */
-            uint8_t unit:      1;   /*!< ADC unit index. */
-            uint8_t reserved:  2;   /*!< reserved0 */
-#endif
-        };
-        uint8_t val;                /*!<Raw data value */
-    };
-} adc_digi_pattern_table_t;
-
 /**
  * @brief ADC digital controller (DMA mode) output data format option.
  */
 typedef enum {
-    ADC_DIGI_FORMAT_12BIT,   /*!<ADC to DMA data format,                [15:12]-channel, [11: 0]-12 bits ADC data (`adc_digi_output_data_t`).
-                                 Note: For single convert mode. */
-    ADC_DIGI_FORMAT_11BIT,   /*!<ADC to DMA data format, [15]-adc unit, [14:11]-channel, [10: 0]-11 bits ADC data (`adc_digi_output_data_t`).
-                                 Note: For multi or alter convert mode. */
-    ADC_DIGI_FORMAT_MAX,
+    ADC_DIGI_FORMAT_12BIT __attribute__((deprecated)),  /*!<ADC to DMA data format,                [15:12]-channel, [11: 0]-12 bits ADC data (`adc_digi_output_data_t`). Note: For single convert mode. */
+    ADC_DIGI_FORMAT_11BIT __attribute__((deprecated)),  /*!<ADC to DMA data format, [15]-adc unit, [14:11]-channel, [10: 0]-11 bits ADC data (`adc_digi_output_data_t`). Note: For multi or alter convert mode. */
+    ADC_DIGI_FORMAT_MAX   __attribute__((deprecated)),
+
+    ADC_DIGI_OUTPUT_FORMAT_TYPE1,   ///< See `adc_digi_output_data_t.type1`
+    ADC_DIGI_OUTPUT_FORMAT_TYPE2,   ///< See `adc_digi_output_data_t.type2`
 } adc_digi_output_format_t;
 
+/**
+ * @brief ADC digital controller pattern configuration
+ */
+typedef struct {
+    uint8_t atten;      ///< Attenuation of this ADC channel
+    uint8_t channel;    ///< ADC channel
+    uint8_t unit;       ///< ADC unit
+    uint8_t bit_width;  ///< ADC output bit width
+} adc_digi_pattern_config_t;
+
+/*---------------------------------------------------------------
+                    Output Format
+---------------------------------------------------------------*/
 #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
 /**
  * @brief ADC digital controller (DMA mode) output data format.
  *        Used to analyze the acquired ADC (DMA) data.
- *
- * @note  ESP32-S2:
- *        Member `channel` can be used to judge the validity of the ADC data, because the role of the arbiter may get invalid ADC data.
+ * @note  ESP32: Only `type1` is valid. ADC2 does not support DMA mode.
+ * @note  ESP32-S2: Member `channel` can be used to judge the validity of the ADC data,
+ *                  because the role of the arbiter may get invalid ADC data.
  */
 typedef struct {
     union {
         struct {
             uint16_t data:     12;  /*!<ADC real output data info. Resolution: 12 bit. */
-            uint16_t channel:   4;  /*!<ADC channel index info. For ESP32-S2:
-                                        If (channel < ADC_CHANNEL_MAX), The data is valid.
-                                        If (channel > ADC_CHANNEL_MAX), The data is invalid. */
-        } type1;                    /*!<When the configured output format is 12bit. `ADC_DIGI_FORMAT_12BIT` */
+            uint16_t channel:   4;  /*!<ADC channel index info. */
+        } type1;
         struct {
             uint16_t data:     11;  /*!<ADC real output data info. Resolution: 11 bit. */
             uint16_t channel:   4;  /*!<ADC channel index info. For ESP32-S2:
@@ -183,8 +132,8 @@ typedef struct {
         uint16_t val;               /*!<Raw data value */
     };
 } adc_digi_output_data_t;
-#endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
 /**
  * @brief ADC digital controller (DMA mode) output data format.
  *        Used to analyze the acquired ADC (DMA) data.
@@ -203,112 +152,32 @@ typedef struct {
         uint32_t val;                   /*!<Raw data value */
     };
 } adc_digi_output_data_t;
-#endif
-
-#if !CONFIG_IDF_TARGET_ESP32
 
+#elif CONFIG_IDF_TARGET_ESP32S3
 /**
- * @brief ADC digital controller (DMA mode) clock system setting.
- *        Calculation formula: controller_clk = (`APLL` or `APB`) / (div_num + div_a / div_b + 1).
- *
- * @note: The clocks of the DAC digital controller use the ADC digital controller clock divider.
+ * @brief ADC digital controller (DMA mode) output data format.
+ *        Used to analyze the acquired ADC (DMA) data.
  */
 typedef struct {
-    bool use_apll;      /*!<true: use APLL clock; false: use APB clock. */
-    uint32_t div_num;   /*!<Division factor. Range: 0 ~ 255.
-                            Note: When a higher frequency clock is used (the division factor is less than 9),
-                            the ADC reading value will be slightly offset. */
-    uint32_t div_b;     /*!<Division factor. Range: 1 ~ 63. */
-    uint32_t div_a;     /*!<Division factor. Range: 0 ~ 63. */
-} adc_digi_clk_t;
-
-#endif //!CONFIG_IDF_TARGET_ESP32
-
-/**
-  * @brief ADC digital controller (DMA mode) configuration parameters.
-  *
-  * Example setting: When using ADC1 channel0 to measure voltage, the sampling rate is required to be 1 kHz:
-  *
-  *     +---------------------+--------+--------+--------+
-  *     | sample rate         | 1 kHz  | 1 kHz  | 1 kHz  |
-  *     +---------------------+--------+--------+--------+
-  *     | conv_mode           | single |  both  |  alter |
-  *     | adc1_pattern_len    |    1   |    1   |    1   |
-  *     | dig_clk.use_apll    |    0   |    0   |    0   |
-  *     | dig_clk.div_num     |   99   |   99   |   99   |
-  *     | dig_clk.div_b       |    0   |    0   |    0   |
-  *     | dig_clk.div_a       |    0   |    0   |    0   |
-  *     | interval            |  400   |  400   |  200   |
-  *     +---------------------+--------+--------+--------+
-  *     | `trigger_meas_freq` | 1 kHz  | 1 kHz  | 2 kHz  |
-  *     +---------------------+--------+--------+--------+
-  *
-  * Explanation of the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA outputs:
-  *
-  *     +---------------------+--------+--------+--------+
-  *     | conv_mode           | single |  both  |  alter |
-  *     +---------------------+--------+--------+--------+
-  *     | trigger meas times  |    1   |    1   |    1   |
-  *     +---------------------+--------+--------+--------+
-  *     | conv_limit_num      |   +1   |   +1   |   +1   |
-  *     | dma_eof_num         |   +1   |   +2   |   +1   |
-  *     | dma output (byte)   |   +2   |   +4   |   +2   |
-  *     +---------------------+--------+--------+--------+
-  */
-typedef struct {
-    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
-                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
-    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
-    uint32_t adc1_pattern_len;               /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
-                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
-                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
-                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
-    uint32_t adc2_pattern_len;               /*!<Refer to ``adc1_pattern_len`` */
-    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
-    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to `adc1_pattern` */
-    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
-    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-    uint32_t adc_pattern_len;                /*!<Pattern table length for digital controller. Range: 0 ~ 7 (0: Don't change the pattern table setting).
-                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 7 items, in which channel selection,
-                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
-                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
-    adc_digi_pattern_table_t *adc_pattern;   /*!<Pointer to pattern table for digital controller. The table size defined by `adc_pattern_len`. */
-#endif
-#if CONFIG_IDF_TARGET_ESP32S2
-    uint32_t interval;                       /*!<The number of interval clock cycles for the digital controller to trigger the measurement.
-                                                 The unit is the divided clock. Range: 40 ~ 4095.
-                                                 Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval. Refer to ``adc_digi_clk_t``.
-                                                 Note: The sampling rate of each channel is also related to the conversion mode (See ``adc_digi_convert_mode_t``) and pattern table settings. */
-    adc_digi_clk_t dig_clk;                  /*!<ADC digital controller clock divider settings. Refer to ``adc_digi_clk_t``.
-                                                 Note: The clocks of the DAC digital controller use the ADC digital controller clock divider. */
-    uint32_t dma_eof_num;                    /*!<DMA eof num of adc digital controller.
-                                                 If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated in DMA.
-                                                 Note: The converted data in the DMA in link buffer will be multiple of two bytes. */
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
-    uint32_t sample_freq_hz;  /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
-                                   Fs = Fd / interval / 2
-                                   Fs: sampling frequency;
-                                   Fd: digital controller frequency, no larger than 5M for better performance
-                                   interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
-#endif
-} adc_digi_config_t;
-
-#if CONFIG_IDF_TARGET_ESP32S2
-/**
- * @brief ADC digital controller (DMA mode) interrupt type options.
- */
-typedef enum {
-    ADC_DIGI_INTR_MASK_MONITOR = 0x1,
-    ADC_DIGI_INTR_MASK_MEAS_DONE = 0x2,
-    ADC_DIGI_INTR_MASK_ALL = 0x3,
-} adc_digi_intr_t;
-FLAG_ATTR(adc_digi_intr_t)
+    union {
+        struct {
+            uint32_t data:          13; /*!<ADC real output data info. Resolution: 13 bit. */
+            uint32_t channel:       4;  /*!<ADC channel index info.
+                                            If (channel < ADC_CHANNEL_MAX), The data is valid.
+                                            If (channel > ADC_CHANNEL_MAX), The data is invalid. */
+            uint32_t unit:          1;  /*!<ADC unit index info. 0: ADC1; 1: ADC2.  */
+            uint32_t reserved17_31: 14; /*!<Reserved17. */
+        } type2;                         /*!<When the configured output format is 12bit. `ADC_DIGI_FORMAT_11BIT` */
+        uint32_t val;                   /*!<Raw data value */
+    };
+} adc_digi_output_data_t;
 #endif
 
-#if !CONFIG_IDF_TARGET_ESP32
 
+#if SOC_ADC_ARBITER_SUPPORTED
+/*---------------------------------------------------------------
+                    Arbiter
+---------------------------------------------------------------*/
 /**
  * @brief ADC arbiter work mode option.
  *
@@ -344,7 +213,12 @@ typedef struct {
     .dig_pri = 0, \
     .pwdet_pri = 2, \
 }
+#endif  //#if SOC_ADC_ARBITER_SUPPORTED
 
+#if SOC_ADC_FILTER_SUPPORTED
+/*---------------------------------------------------------------
+                    Filter
+---------------------------------------------------------------*/
 /**
  * @brief ADC digital controller (DMA mode) filter index options.
  *
@@ -387,7 +261,12 @@ typedef struct {
                                     For ESP32-S2, it's always `ADC_CHANNEL_MAX` */
     adc_digi_filter_mode_t mode;/*!<Set adc filter mode for filter. See ``adc_digi_filter_mode_t``. */
 } adc_digi_filter_t;
+#endif  // #if SOC_ADC_FILTER_SUPPORTED
 
+#if SOC_ADC_MONITOR_SUPPORTED
+/*---------------------------------------------------------------
+                    Monitor
+---------------------------------------------------------------*/
 /**
  * @brief ADC digital controller (DMA mode) monitor index options.
  *
@@ -437,5 +316,41 @@ typedef struct {
     uint32_t threshold;             /*!<Set monitor threshold of adc digital controller. */
 #endif
 } adc_digi_monitor_t;
+#endif  //#if SOC_ADC_MONITOR_SUPPORTED
+
+/*---------------------------------------------------------------
+            To Be Deprecated TODO: IDF-3610
+---------------------------------------------------------------*/
+#ifdef CONFIG_IDF_TARGET_ESP32
+/**
+ * @brief ESP32 ADC DMA source selection.
+ */
+#else
+/**
+ * @brief ESP32 ADC DMA source selection.
+ *
+ * @deprecated  Not applicable on ESP32-S2 because ESP32-S2 doesn't use I2S DMA.
+ */
+#endif
+typedef enum {
+    ADC_I2S_DATA_SRC_IO_SIG = 0, /*!< I2S data from GPIO matrix signal  */
+    ADC_I2S_DATA_SRC_ADC = 1,    /*!< I2S data from ADC */
+    ADC_I2S_DATA_SRC_MAX,
+} adc_i2s_source_t;
 
-#endif // CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#if CONFIG_IDF_TARGET_ESP32S2
+/**
+ * @brief ADC digital controller (DMA mode) clock system setting.
+ *        Calculation formula: controller_clk = (`APLL` or `APB`) / (div_num + div_a / div_b + 1).
+ *
+ * @note: The clocks of the DAC digital controller use the ADC digital controller clock divider.
+ */
+typedef struct {
+    bool use_apll;      /*!<true: use APLL clock; false: use APB clock. */
+    uint32_t div_num;   /*!<Division factor. Range: 0 ~ 255.
+                            Note: When a higher frequency clock is used (the division factor is less than 9),
+                            the ADC reading value will be slightly offset. */
+    uint32_t div_b;     /*!<Division factor. Range: 1 ~ 63. */
+    uint32_t div_a;     /*!<Division factor. Range: 0 ~ 63. */
+} adc_digi_clk_t;
+#endif
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/cpu_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/cpu_hal.h
index e6b7c62d2f3..824095871db 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/cpu_hal.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/cpu_hal.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -78,6 +70,11 @@ extern "C" {
  */
 #define cpu_hal_waiti()                 cpu_ll_waiti()
 
+/**
+ * Trigger a syscall.
+ */
+#define cpu_hal_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno)                 cpu_ll_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno)
+
 #if SOC_CPU_BREAKPOINTS_NUM > 0
 
 /**
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/emac_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/emac_hal.h
index f661e58985a..27cd38456dc 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/emac_hal.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/emac_hal.h
@@ -1,16 +1,8 @@
-// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -220,9 +212,23 @@ uint32_t emac_hal_get_phy_data(emac_hal_context_t *hal);
 
 void emac_hal_set_address(emac_hal_context_t *hal, uint8_t *mac_addr);
 
+/**
+ * @brief Starts EMAC Transmission & Reception
+ *
+ * @param hal EMAC HAL context infostructure
+ */
 void emac_hal_start(emac_hal_context_t *hal);
 
-void emac_hal_stop(emac_hal_context_t *hal);
+/**
+ * @brief Stops EMAC Transmission & Reception
+ *
+ * @param hal EMAC HAL context infostructure
+ * @return
+ *     - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_STATE: previous frame transmission/reception is not completed. When this error occurs,
+  *      wait and reapeat the EMAC stop again.
+ */
+esp_err_t emac_hal_stop(emac_hal_context_t *hal);
 
 uint32_t emac_hal_get_tx_desc_owner(emac_hal_context_t *hal);
 
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/gpio_types.h b/tools/sdk/esp32s2/include/hal/include/hal/gpio_types.h
index a9b56f7c6a3..1678689961f 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/gpio_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/gpio_types.h
@@ -302,7 +302,6 @@ typedef enum {
     GPIO_NUM_19 = 19,   /*!< GPIO19, input and output */
     GPIO_NUM_20 = 20,   /*!< GPIO20, input and output */
     GPIO_NUM_21 = 21,   /*!< GPIO21, input and output */
-    GPIO_NUM_22 = 22,   /*!< GPIO22, input and output */
     GPIO_NUM_MAX,
 /** @endcond */
 } gpio_num_t;
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/i2s_types.h b/tools/sdk/esp32s2/include/hal/include/hal/i2s_types.h
index 48d745eb2fa..dcf0ab4d0b8 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/i2s_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/i2s_types.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -52,31 +44,31 @@ typedef enum {
  *
  */
 typedef enum {
-    I2S_CHANNEL_MONO        = (0x01 << 31) | 0x03,  /*!< I2S channel (mono), two channel enabled. In this mode, you only need to send one channel data but the fifo will copy same data for another channel automatically, then both channels will transmit same data. The highest bit is for differentiating I2S_CHANNEL_STEREO since they both use two channels */
-    I2S_CHANNEL_STEREO      = 0x03,                 /*!< I2S channel (stereo), two channel enabled. In this mode, two channels will transmit different data. */
+    I2S_CHANNEL_MONO        = 1,  /*!< I2S channel (mono), one channel activated. In this mode, you only need to send one channel data but the fifo will copy same data for the other unactivated channels automatically, then both channels will transmit same data. */
+    I2S_CHANNEL_STEREO      = 2,  /*!< I2S channel (stereo), two (or more) channels activated. In this mode, these channels will transmit different data. */
 #if SOC_I2S_SUPPORTS_TDM
-    // Bit map of active chan.
+    // Bit map of activated chan.
     // There are 16 channels in TDM mode.
-    // For TX module, only the active channel send the audio data, the inactive channel send a constant(configurable) or will be skiped if 'skip_msk' is set.
-    // For RX module, only receive the audio data in active channels, the data in inactive channels will be ignored.
-    // the bit map of active channel can not exceed (0x1<<total_chan_num).
+    // For TX module, only the activated channel send the audio data, the unactivated channel send a constant(configurable) or will be skiped if 'skip_msk' is set.
+    // For RX module, only receive the audio data in activated channels, the data in unactivated channels will be ignored.
+    // the bit map of activated channel can not exceed the maximum enabled channel number (i.e. 0x10000 << total_chan_num).
     // e.g: active_chan_mask = (I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH3), here the active_chan_number is 2 and total_chan_num is not supposed to be smaller than 4.
-    I2S_TDM_ACTIVE_CH0  = (0x1 << 0),               /*!< I2S channel 0 enabled */
-    I2S_TDM_ACTIVE_CH1  = (0x1 << 1),               /*!< I2S channel 1 enabled */
-    I2S_TDM_ACTIVE_CH2  = (0x1 << 2),               /*!< I2S channel 2 enabled */
-    I2S_TDM_ACTIVE_CH3  = (0x1 << 3),               /*!< I2S channel 3 enabled */
-    I2S_TDM_ACTIVE_CH4  = (0x1 << 4),               /*!< I2S channel 4 enabled */
-    I2S_TDM_ACTIVE_CH5  = (0x1 << 5),               /*!< I2S channel 5 enabled */
-    I2S_TDM_ACTIVE_CH6  = (0x1 << 6),               /*!< I2S channel 6 enabled */
-    I2S_TDM_ACTIVE_CH7  = (0x1 << 7),               /*!< I2S channel 7 enabled */
-    I2S_TDM_ACTIVE_CH8  = (0x1 << 8),               /*!< I2S channel 8 enabled */
-    I2S_TDM_ACTIVE_CH9  = (0x1 << 9),               /*!< I2S channel 9 enabled */
-    I2S_TDM_ACTIVE_CH10 = (0x1 << 10),              /*!< I2S channel 10 enabled */
-    I2S_TDM_ACTIVE_CH11 = (0x1 << 11),              /*!< I2S channel 11 enabled */
-    I2S_TDM_ACTIVE_CH12 = (0x1 << 12),              /*!< I2S channel 12 enabled */
-    I2S_TDM_ACTIVE_CH13 = (0x1 << 13),              /*!< I2S channel 13 enabled */
-    I2S_TDM_ACTIVE_CH14 = (0x1 << 14),              /*!< I2S channel 14 enabled */
-    I2S_TDM_ACTIVE_CH15 = (0x1 << 15),              /*!< I2S channel 15 enabled */
+    I2S_TDM_ACTIVE_CH0  = (0x1 << 16),               /*!< I2S channel 0 activated */
+    I2S_TDM_ACTIVE_CH1  = (0x1 << 17),               /*!< I2S channel 1 activated */
+    I2S_TDM_ACTIVE_CH2  = (0x1 << 18),               /*!< I2S channel 2 activated */
+    I2S_TDM_ACTIVE_CH3  = (0x1 << 19),               /*!< I2S channel 3 activated */
+    I2S_TDM_ACTIVE_CH4  = (0x1 << 20),               /*!< I2S channel 4 activated */
+    I2S_TDM_ACTIVE_CH5  = (0x1 << 21),               /*!< I2S channel 5 activated */
+    I2S_TDM_ACTIVE_CH6  = (0x1 << 22),               /*!< I2S channel 6 activated */
+    I2S_TDM_ACTIVE_CH7  = (0x1 << 23),               /*!< I2S channel 7 activated */
+    I2S_TDM_ACTIVE_CH8  = (0x1 << 24),               /*!< I2S channel 8 activated */
+    I2S_TDM_ACTIVE_CH9  = (0x1 << 25),               /*!< I2S channel 9 activated */
+    I2S_TDM_ACTIVE_CH10 = (0x1 << 26),              /*!< I2S channel 10 activated */
+    I2S_TDM_ACTIVE_CH11 = (0x1 << 27),              /*!< I2S channel 11 activated */
+    I2S_TDM_ACTIVE_CH12 = (0x1 << 28),              /*!< I2S channel 12 activated */
+    I2S_TDM_ACTIVE_CH13 = (0x1 << 29),              /*!< I2S channel 13 activated */
+    I2S_TDM_ACTIVE_CH14 = (0x1 << 30),              /*!< I2S channel 14 activated */
+    I2S_TDM_ACTIVE_CH15 = (0x1 << 31),              /*!< I2S channel 15 activated */
 #endif
 } i2s_channel_t;
 
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/memprot_types.h b/tools/sdk/esp32s2/include/hal/include/hal/memprot_types.h
index 42231f43eaf..15e3c3959ab 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/memprot_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/memprot_types.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -25,11 +17,34 @@ extern "C" {
 typedef enum {
     MEMP_LL_OK = 0,
     MEMP_LL_FAIL = 1,
-    MEMP_LL_ERR_SPLIT_ADDR_INVALID = 2,
+    MEMP_LL_ERR_SPLIT_ADDR_OUT_OF_RANGE = 2,
+    MEMP_LL_ERR_SPLIT_ADDR_INVALID = 2,         /* temporary duplicate for S2 builds */
     MEMP_LL_ERR_SPLIT_ADDR_UNALIGNED = 3,
-    MEMP_LL_ERR_UNI_BLOCK_INVALID = 4
+    MEMP_LL_ERR_UNI_BLOCK_INVALID = 4,
+    MEMP_LL_ERR_AREA_INVALID = 5,
+    MEMP_LL_ERR_WORLD_INVALID = 6
 } memprot_ll_err_t;
 
+/**
+ * @brief Memprot LL PMS World IDs
+ *
+ */
+typedef enum {
+    MEMP_LL_WORLD_NONE = 0x00,
+    MEMP_LL_WORLD_0 = 0x01,
+    MEMP_LL_WORLD_1 = 0x10
+} memprot_ll_world_t;
+
+/**
+ * @brief Memprot LL PMS Area IDs
+ *
+ */
+typedef enum {
+    MEMP_LL_AREA_NONE = 0,
+    MEMP_LL_AREA_LOW = 1,
+    MEMP_LL_AREA_HIGH = 2
+} memprot_ll_area_t;
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/usbh_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/usbh_hal.h
index 6360f7b3f36..5326deb2dca 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/usbh_hal.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/usbh_hal.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -18,7 +18,6 @@ NOTE: Thread safety is the responsibility fo the HAL user. All USB Host HAL
 #include <stdlib.h>
 #include <stddef.h>
 #include "soc/usbh_struct.h"
-#include "soc/usb_wrap_struct.h"
 #include "hal/usbh_ll.h"
 #include "hal/usb_types_private.h"
 #include "hal/assert.h"
@@ -152,7 +151,6 @@ typedef struct {
 typedef struct {
     //Context
     usbh_dev_t *dev;                            /**< Pointer to base address of DWC_OTG registers */
-    usb_wrap_dev_t *wrap_dev;                   /**< Pointer to base address of USB Wrapper registers */
     //Host Port related
     uint32_t *periodic_frame_list;              /**< Pointer to scheduling frame list */
     usb_hal_frame_list_len_t frame_list_len;    /**< Length of the periodic scheduling frame list */
@@ -181,6 +179,7 @@ typedef struct {
  *
  * Entry:
  * - The peripheral must have been reset and clock un-gated
+ * - The USB PHY (internal or external) and associated GPIOs must already be configured
  * - GPIO pins configured
  * - Interrupt allocated but DISABLED (in case of an unknown interupt state)
  * Exit:
@@ -495,7 +494,7 @@ static inline void usbh_hal_disable_debounce_lock(usbh_hal_context_t *hal)
     hal->flags.dbnc_lock_enabled = 0;
     //Clear Conenction and disconenction interrupt in case it triggered again
     usb_ll_intr_clear(hal->dev, USB_LL_INTR_CORE_DISCONNINT);
-    usbh_ll_hprt_intr_clear(hal->dev, USBH_LL_INTR_HPRT_PRTENCHNG);
+    usbh_ll_hprt_intr_clear(hal->dev, USBH_LL_INTR_HPRT_PRTCONNDET);
     //Reenable the hprt (connection) and disconnection interrupts
     usb_ll_en_intrs(hal->dev, USB_LL_INTR_CORE_PRTINT | USB_LL_INTR_CORE_DISCONNINT);
 }
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/usbh_ll.h b/tools/sdk/esp32s2/include/hal/include/hal/usbh_ll.h
index 63f7b8219d1..4320ead0a3b 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/usbh_ll.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/usbh_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -13,7 +13,6 @@ extern "C" {
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/usbh_struct.h"
-#include "soc/usb_wrap_struct.h"
 #include "hal/usb_types_private.h"
 #include "hal/misc.h"
 
@@ -153,25 +152,6 @@ typedef struct {
     uint8_t *buffer;
 } usbh_ll_dma_qtd_t;
 
-/* -----------------------------------------------------------------------------
------------------------------- USB Wrap Registers ------------------------------
------------------------------------------------------------------------------ */
-
-/**
- * @brief Configures the internal PHY to operate as HOST
- *
- * @param hw Start address of the USB Wrap registers
- */
-static inline void usbh_ll_internal_phy_conf(usb_wrap_dev_t *hw)
-{
-    //Enable internal PHY
-    hw->otg_conf.pad_enable = 1;
-    hw->otg_conf.phy_sel = 0;
-    //Set pulldowns on D+ and D-
-    hw->otg_conf.pad_pull_override = 1;
-    hw->otg_conf.dp_pulldown = 1;
-    hw->otg_conf.dm_pulldown = 1;
-}
 
 /* -----------------------------------------------------------------------------
 ------------------------------- Global Registers -------------------------------
@@ -431,7 +411,7 @@ static inline void usbh_ll_hcfg_set_fsls_pclk_sel(usbh_dev_t *hw)
 /**
  * @brief Sets some default values to HCFG to operate in Host mode with scatter/gather DMA
  *
- * @param hw Start address of the USB Wrap registers
+ * @param hw Start address of the DWC_OTG registers
  * @param speed Speed to initialize the host port at
  */
 static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
diff --git a/tools/sdk/esp32s2/include/idf_test/include/esp32/idf_performance_target.h b/tools/sdk/esp32s2/include/idf_test/include/esp32/idf_performance_target.h
index 5700d9f39ed..d6b64df99a7 100644
--- a/tools/sdk/esp32s2/include/idf_test/include/esp32/idf_performance_target.h
+++ b/tools/sdk/esp32s2/include/idf_test/include/esp32/idf_performance_target.h
@@ -33,88 +33,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            30
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     27
 
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-//Collect data and correct it later
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               35300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (697*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              (6780*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               11200
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      20100
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      35200
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     (754*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     (6650*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      45300
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 16200
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 33600
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                (484*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                (1512*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 49600
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-//Collect data and correct it later
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (261*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 (470*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (261*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  30900
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32s2/include/idf_test/include/esp32c3/idf_performance_target.h b/tools/sdk/esp32s2/include/idf_test/include/esp32c3/idf_performance_target.h
index c77e3efb1ec..7fbf8b9eaf5 100644
--- a/tools/sdk/esp32s2/include/idf_test/include/esp32c3/idf_performance_target.h
+++ b/tools/sdk/esp32s2/include/idf_test/include/esp32c3/idf_performance_target.h
@@ -29,85 +29,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
 
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-// rom options is much slower. use its 70%
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               42200
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-// legacy & suspend config are much faster. use the 70% of slower configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               (179*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (622*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              (6536*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               23700
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      46400
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-// legacy & suspend config are much faster. use the 70% of slower configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      (183*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     (605*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     (6676*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      22900
-#endif
-
-// No SPI1 tests for C3
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  43300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-// rom options is much slower. use its 70%
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  99500
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 (300*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (754*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  33900
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32s2/include/idf_test/include/esp32h2/idf_performance_target.h b/tools/sdk/esp32s2/include/idf_test/include/esp32h2/idf_performance_target.h
index af5738d1fcd..7fbf8b9eaf5 100644
--- a/tools/sdk/esp32s2/include/idf_test/include/esp32h2/idf_performance_target.h
+++ b/tools/sdk/esp32s2/include/idf_test/include/esp32h2/idf_performance_target.h
@@ -29,42 +29,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
 
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               53400
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (701*1000)
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      53600
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      44300
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 24400
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  64900
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (309*1000)
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (1697*1000)
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  76600
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32s2/include/idf_test/include/esp32s2/idf_performance_target.h b/tools/sdk/esp32s2/include/idf_test/include/esp32s2/idf_performance_target.h
index dc8a060f54b..cd037bb47d7 100644
--- a/tools/sdk/esp32s2/include/idf_test/include/esp32s2/idf_performance_target.h
+++ b/tools/sdk/esp32s2/include/idf_test/include/esp32s2/idf_performance_target.h
@@ -25,82 +25,3 @@
 
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
-
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-//Great variation, use the 70% of min value
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               33300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-// legacy config is much faster. use the 70% of slower configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               (239*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-// Weird data. Use 70% average of slower configs.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (546*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              (1191*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               19500
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-//release config is much faster than other configs. Use 70% average of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      46300
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      (249*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     (851*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     (11480*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      40100
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 30500
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 (183*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                (474*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                (1283*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 44100
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  47800
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (252*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-// write with large RAM buffer tests has lower performance value than normal performance tests
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 (398*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (1204*1000)
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  22100
-#endif
diff --git a/tools/sdk/esp32s2/include/idf_test/include/esp32s3/idf_performance_target.h b/tools/sdk/esp32s2/include/idf_test/include/esp32s3/idf_performance_target.h
index b744cda8fa0..d735bb27023 100644
--- a/tools/sdk/esp32s2/include/idf_test/include/esp32s3/idf_performance_target.h
+++ b/tools/sdk/esp32s2/include/idf_test/include/esp32s3/idf_performance_target.h
@@ -24,82 +24,6 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
 
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- *
- * Currently all performance data on S3 are set to 0 for now. Update to a proper value later.
- */
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 0
-#endif
-
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 0
-#endif
-#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  0
-#endif
-
 // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
 #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32s2/include/json_generator/upstream/json_generator.h b/tools/sdk/esp32s2/include/json_generator/upstream/json_generator.h
new file mode 100644
index 00000000000..e3aa92eeecf
--- /dev/null
+++ b/tools/sdk/esp32s2/include/json_generator/upstream/json_generator.h
@@ -0,0 +1,511 @@
+/*
+ *    Copyright 2020 Piyush Shah <shahpiyushv@gmail.com>
+ *
+ *   Licensed under the Apache License, Version 2.0 (the "License");
+ *   you may not use this file except in compliance with the License.
+ *   You may obtain a copy of the License at
+ *
+ *       http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *   Unless required by applicable law or agreed to in writing, software
+ *   distributed under the License is distributed on an "AS IS" BASIS,
+ *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *   See the License for the specific language governing permissions and
+ *   limitations under the License.
+ */
+
+/*
+ * JSON String Generator
+ *
+ * This module can be used to create JSON strings with a facility
+ * to flush out data if the destination buffer is full. All commas
+ * and colons as required are automatically added by the APIs
+ *
+ */
+#ifndef _JSON_GENERATOR_H
+#define _JSON_GENERATOR_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Float precision i.e. number of digits after decimal point */
+#ifndef JSON_FLOAT_PRECISION
+#define JSON_FLOAT_PRECISION 5
+#endif
+
+/** JSON string flush callback prototype
+ *
+ * This is a prototype of the function that needs to be passed to
+ * json_gen_str_start() and which will be invoked by the JSON generator
+ * module either when the buffer is full or json_gen_str_end() ins invoked.
+ *
+ * \param[in] buf Pointer to a NULL terminated JSON string
+ * \param[in] priv Private data to be passed to the flush callback. Will
+ * be the same as the one passed to json_gen_str_start()
+ */
+typedef void (*json_gen_flush_cb_t) (char *buf, void *priv);
+
+/** JSON String structure
+ *
+ * Please do not set/modify any elements.
+ * Just define this structure and pass a pointer to it in the APIs below
+ */
+typedef struct {
+    /** Pointer to the JSON buffer provided by the calling function */
+	char *buf;
+    /** Size of the above buffer */
+	int buf_size;
+    /** (Optional) callback function to invoke when the buffer gets full */
+	json_gen_flush_cb_t flush_cb;
+    /** (Optional) Private data to pass to the callback function */
+	void *priv;
+    /** (For Internal use only) */
+	bool comma_req;
+    /** (For Internal use only) */
+	char *free_ptr;
+    /** Total length */
+    int total_len;
+} json_gen_str_t;
+
+/** Start a JSON String
+ *
+ * This is the first function to be called for creating a JSON string.
+ * It initializes the internal data structures. After the JSON string
+ * generation is over, the json_gen_str_end() function should be called.
+ *
+ * \param[out] jstr Pointer to an allocated \ref json_gen_str_t structure.
+ * This will be initialised internally and needs to be passed to all
+ * subsequent function calls
+ * \param[out] buf Pointer to an allocated buffer into which the JSON
+ * string will be written
+ * \param[in] buf_size Size of the buffer
+ * \param[in] flush_cb Pointer to the flushing function of type \ref json_gen_flush_cb_t
+ * which will be invoked either when the buffer is full or when json_gen_str_end()
+ * is invoked. Can be left NULL.
+ * \param[in] priv Private data to be passed to the flushing function callback.
+ * Can be something like a session identifier (Eg. socket). Can be left NULL.
+ */
+void json_gen_str_start(json_gen_str_t *jstr, char *buf, int buf_size,
+		json_gen_flush_cb_t flush_cb, void *priv);
+
+/** End JSON string
+ *
+ * This should be the last function to be called after the entire JSON string
+ * has been generated.
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return Total length of the JSON created, including the NULL termination byte.
+ */
+int json_gen_str_end(json_gen_str_t *jstr);
+
+/** Start a JSON object
+ *
+ * This starts a JSON object by adding a '{'
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_start_object(json_gen_str_t *jstr);
+
+/** End a JSON object
+ *
+ * This ends a JSON object by adding a '}'
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_end_object(json_gen_str_t *jstr);
+
+/** Start a JSON array
+ *
+ * This starts a JSON object by adding a '['
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_start_array(json_gen_str_t *jstr);
+
+/** End a JSON object
+ *
+ * This ends a JSON object by adding a ']'
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_end_array(json_gen_str_t *jstr);
+
+/** Push a named JSON object
+ *
+ * This adds a JSON object like "name":{
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the object
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_push_object(json_gen_str_t *jstr, char *name);
+
+/** Pop a named JSON object
+ *
+ * This ends a JSON object by adding a '}'. This is basically same as
+ * json_gen_end_object() but included so as to complement json_gen_push_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_pop_object(json_gen_str_t *jstr);
+
+/** Push a JSON object string
+ *
+ * This adds a complete pre-formatted JSON object string to the JSON object.
+ *
+ * Eg. json_gen_push_object_str(jstr, "pre-formatted", "{\"a\":1,\"b\":2}");
+ * This will add "pre-formatted":{"a":1,"b":2}
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the JSON object string
+ * \param[in] object_str The pre-formatted JSON object string
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that.
+ */
+int json_gen_push_object_str(json_gen_str_t *jstr, char *name, char *object_str);
+
+/** Push a named JSON array
+ *
+ * This adds a JSON array like "name":[
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the array
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_push_array(json_gen_str_t *jstr, char *name);
+
+/** Pop a named JSON array
+ *
+ * This ends a JSON array by adding a ']'. This is basically same as
+ * json_gen_end_array() but included so as to complement json_gen_push_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_pop_array(json_gen_str_t *jstr);
+
+/** Push a JSON array string
+ *
+ * This adds a complete pre-formatted JSON array string to the JSON object.
+ *
+ * Eg. json_gen_push_object_str(jstr, "pre-formatted", "[1,2,3]");
+ * This will add "pre-formatted":[1,2,3]
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the JSON array string
+ * \param[in] array_str The pre-formatted JSON array string
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that.
+ */
+int json_gen_push_array_str(json_gen_str_t *jstr, char *name, char *array_str);
+
+/** Add a boolean element to an object
+ *
+ * This adds a boolean element to an object. Eg. "bool_val":true
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Boolean value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_bool(json_gen_str_t *jstr, char *name, bool val);
+
+/** Add an integer element to an object
+ *
+ * This adds an integer element to an object. Eg. "int_val":28
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Integer value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_int(json_gen_str_t *jstr, char *name, int val);
+
+/** Add a float element to an object
+ *
+ * This adds a float element to an object. Eg. "float_val":23.8
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Float value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_float(json_gen_str_t *jstr, char *name, float val);
+
+/** Add a string element to an object
+ *
+ * This adds a string element to an object. Eg. "string_val":"my_string"
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Null terminated string value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_string(json_gen_str_t *jstr, char *name, char *val);
+
+/** Add a NULL element to an object
+ *
+ * This adds a NULL element to an object. Eg. "null_val":null
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_null(json_gen_str_t *jstr, char *name);
+
+/** Add a boolean element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Boolean value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_bool(json_gen_str_t *jstr, bool val);
+
+/** Add an integer element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Integer value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_int(json_gen_str_t *jstr, int val);
+
+/** Add a float element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Float value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_float(json_gen_str_t *jstr, float val);
+
+/** Add a string element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Null terminated string value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_string(json_gen_str_t *jstr, char *val);
+
+/** Add a NULL element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_null(json_gen_str_t *jstr);
+
+/** Start a Long string in an object
+ *
+ * This starts a string in an object, but does not end it (i.e., does not add the
+ * terminating quotes. This is useful for long strings. Eg. "string_val":"my_string.
+ * The API json_gen_add_to_long_string() must be used to add to this string and the API
+ * json_gen_end_long_string() must be used to terminate it (i.e. add the ending quotes).
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Null terminated initial part of the string value. It can also be NULL
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_start_long_string(json_gen_str_t *jstr, char *name, char *val);
+
+/** Start a Long string in an array
+ *
+ * This starts a string in an arrayt, but does not end it (i.e., does not add the
+ * terminating quotes. This is useful for long strings.
+ * The API json_gen_add_to_long_string() must be used to add to this string and the API
+ * json_gen_end_long_string() must be used to terminate it (i.e. add the ending quotes).
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Null terminated initial part of the string value. It can also be NULL
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_start_long_string(json_gen_str_t *jstr, char *val);
+
+/** Add to a JSON Long string
+ *
+ * This extends the string initialised by json_gen_obj_start_long_string() or
+ * json_gen_arr_start_long_string(). After the entire string is created, it should be terminated
+ * with json_gen_end_long_string().
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by json_gen_str_start()
+ * \param[in] val Null terminated extending part of the string value.
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_add_to_long_string(json_gen_str_t *jstr, char *val);
+
+/** End a JSON Long string
+ *
+ * This ends the string initialised by json_gen_obj_start_long_string() or
+ * json_gen_arr_start_long_string() by adding the ending quotes.
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by json_gen_str_start()
+ *
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_end_long_string(json_gen_str_t *jstr);
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s2/include/json_parser/upstream/include/json_parser.h b/tools/sdk/esp32s2/include/json_parser/upstream/include/json_parser.h
new file mode 100644
index 00000000000..3e982fe14eb
--- /dev/null
+++ b/tools/sdk/esp32s2/include/json_parser/upstream/include/json_parser.h
@@ -0,0 +1,76 @@
+/*
+ *    Copyright 2020 Piyush Shah <shahpiyushv@gmail.com>
+ *
+ *   Licensed under the Apache License, Version 2.0 (the "License");
+ *   you may not use this file except in compliance with the License.
+ *   You may obtain a copy of the License at
+ *
+ *       http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *   Unless required by applicable law or agreed to in writing, software
+ *   distributed under the License is distributed on an "AS IS" BASIS,
+ *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *   See the License for the specific language governing permissions and
+ *   limitations under the License.
+ */
+#ifndef _JSON_PARSER_H_
+#define _JSON_PARSER_H_
+
+#define JSMN_HEADER
+#include <jsmn/jsmn.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define OS_SUCCESS  0
+#define OS_FAIL     -1
+
+typedef jsmn_parser json_parser_t;
+typedef jsmntok_t json_tok_t;
+
+typedef struct {
+	json_parser_t parser;
+	char *js;
+	json_tok_t *tokens;
+	json_tok_t *cur;
+	int num_tokens;
+} jparse_ctx_t;
+
+int json_parse_start(jparse_ctx_t *jctx, char *js, int len);
+int json_parse_end(jparse_ctx_t *jctx);
+
+int json_obj_get_array(jparse_ctx_t *jctx, char *name, int *num_elem);
+int json_obj_leave_array(jparse_ctx_t *jctx);
+int json_obj_get_object(jparse_ctx_t *jctx, char *name);
+int json_obj_leave_object(jparse_ctx_t *jctx);
+int json_obj_get_bool(jparse_ctx_t *jctx, char *name, bool *val);
+int json_obj_get_int(jparse_ctx_t *jctx, char *name, int *val);
+int json_obj_get_int64(jparse_ctx_t *jctx, char *name, int64_t *val);
+int json_obj_get_float(jparse_ctx_t *jctx, char *name, float *val);
+int json_obj_get_string(jparse_ctx_t *jctx, char *name, char *val, int size);
+int json_obj_get_strlen(jparse_ctx_t *jctx, char *name, int *strlen);
+int json_obj_get_object_str(jparse_ctx_t *jctx, char *name, char *val, int size);
+int json_obj_get_object_strlen(jparse_ctx_t *jctx, char *name, int *strlen);
+int json_obj_get_array_str(jparse_ctx_t *jctx, char *name, char *val, int size);
+int json_obj_get_array_strlen(jparse_ctx_t *jctx, char *name, int *strlen);
+
+int json_arr_get_array(jparse_ctx_t *jctx, uint32_t index);
+int json_arr_leave_array(jparse_ctx_t *jctx);
+int json_arr_get_object(jparse_ctx_t *jctx, uint32_t index);
+int json_arr_leave_object(jparse_ctx_t *jctx);
+int json_arr_get_bool(jparse_ctx_t *jctx, uint32_t index, bool *val);
+int json_arr_get_int(jparse_ctx_t *jctx, uint32_t index, int *val);
+int json_arr_get_int64(jparse_ctx_t *jctx, uint32_t index, int64_t *val);
+int json_arr_get_float(jparse_ctx_t *jctx, uint32_t index, float *val);
+int json_arr_get_string(jparse_ctx_t *jctx, uint32_t index, char *val, int size);
+int json_arr_get_strlen(jparse_ctx_t *jctx, uint32_t index, int *strlen);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _JSON_PARSER_H_ */
diff --git a/tools/sdk/esp32s2/include/json_parser/upstream/jsmn/jsmn.h b/tools/sdk/esp32s2/include/json_parser/upstream/jsmn/jsmn.h
new file mode 100644
index 00000000000..3178dcc977f
--- /dev/null
+++ b/tools/sdk/esp32s2/include/json_parser/upstream/jsmn/jsmn.h
@@ -0,0 +1,471 @@
+/*
+ * MIT License
+ *
+ * Copyright (c) 2010 Serge Zaitsev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef JSMN_H
+#define JSMN_H
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef JSMN_STATIC
+#define JSMN_API static
+#else
+#define JSMN_API extern
+#endif
+
+/**
+ * JSON type identifier. Basic types are:
+ * 	o Object
+ * 	o Array
+ * 	o String
+ * 	o Other primitive: number, boolean (true/false) or null
+ */
+typedef enum {
+  JSMN_UNDEFINED = 0,
+  JSMN_OBJECT = 1,
+  JSMN_ARRAY = 2,
+  JSMN_STRING = 3,
+  JSMN_PRIMITIVE = 4
+} jsmntype_t;
+
+enum jsmnerr {
+  /* Not enough tokens were provided */
+  JSMN_ERROR_NOMEM = -1,
+  /* Invalid character inside JSON string */
+  JSMN_ERROR_INVAL = -2,
+  /* The string is not a full JSON packet, more bytes expected */
+  JSMN_ERROR_PART = -3
+};
+
+/**
+ * JSON token description.
+ * type		type (object, array, string etc.)
+ * start	start position in JSON data string
+ * end		end position in JSON data string
+ */
+typedef struct jsmntok {
+  jsmntype_t type;
+  int start;
+  int end;
+  int size;
+#ifdef JSMN_PARENT_LINKS
+  int parent;
+#endif
+} jsmntok_t;
+
+/**
+ * JSON parser. Contains an array of token blocks available. Also stores
+ * the string being parsed now and current position in that string.
+ */
+typedef struct jsmn_parser {
+  unsigned int pos;     /* offset in the JSON string */
+  unsigned int toknext; /* next token to allocate */
+  int toksuper;         /* superior token node, e.g. parent object or array */
+} jsmn_parser;
+
+/**
+ * Create JSON parser over an array of tokens
+ */
+JSMN_API void jsmn_init(jsmn_parser *parser);
+
+/**
+ * Run JSON parser. It parses a JSON data string into and array of tokens, each
+ * describing
+ * a single JSON object.
+ */
+JSMN_API int jsmn_parse(jsmn_parser *parser, const char *js, const size_t len,
+                        jsmntok_t *tokens, const unsigned int num_tokens);
+
+#ifndef JSMN_HEADER
+/**
+ * Allocates a fresh unused token from the token pool.
+ */
+static jsmntok_t *jsmn_alloc_token(jsmn_parser *parser, jsmntok_t *tokens,
+                                   const size_t num_tokens) {
+  jsmntok_t *tok;
+  if (parser->toknext >= num_tokens) {
+    return NULL;
+  }
+  tok = &tokens[parser->toknext++];
+  tok->start = tok->end = -1;
+  tok->size = 0;
+#ifdef JSMN_PARENT_LINKS
+  tok->parent = -1;
+#endif
+  return tok;
+}
+
+/**
+ * Fills token type and boundaries.
+ */
+static void jsmn_fill_token(jsmntok_t *token, const jsmntype_t type,
+                            const int start, const int end) {
+  token->type = type;
+  token->start = start;
+  token->end = end;
+  token->size = 0;
+}
+
+/**
+ * Fills next available token with JSON primitive.
+ */
+static int jsmn_parse_primitive(jsmn_parser *parser, const char *js,
+                                const size_t len, jsmntok_t *tokens,
+                                const size_t num_tokens) {
+  jsmntok_t *token;
+  int start;
+
+  start = parser->pos;
+
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    switch (js[parser->pos]) {
+#ifndef JSMN_STRICT
+    /* In strict mode primitive must be followed by "," or "}" or "]" */
+    case ':':
+#endif
+    case '\t':
+    case '\r':
+    case '\n':
+    case ' ':
+    case ',':
+    case ']':
+    case '}':
+      goto found;
+    default:
+                   /* to quiet a warning from gcc*/
+      break;
+    }
+    if (js[parser->pos] < 32 || js[parser->pos] >= 127) {
+      parser->pos = start;
+      return JSMN_ERROR_INVAL;
+    }
+  }
+#ifdef JSMN_STRICT
+  /* In strict mode primitive must be followed by a comma/object/array */
+  parser->pos = start;
+  return JSMN_ERROR_PART;
+#endif
+
+found:
+  if (tokens == NULL) {
+    parser->pos--;
+    return 0;
+  }
+  token = jsmn_alloc_token(parser, tokens, num_tokens);
+  if (token == NULL) {
+    parser->pos = start;
+    return JSMN_ERROR_NOMEM;
+  }
+  jsmn_fill_token(token, JSMN_PRIMITIVE, start, parser->pos);
+#ifdef JSMN_PARENT_LINKS
+  token->parent = parser->toksuper;
+#endif
+  parser->pos--;
+  return 0;
+}
+
+/**
+ * Fills next token with JSON string.
+ */
+static int jsmn_parse_string(jsmn_parser *parser, const char *js,
+                             const size_t len, jsmntok_t *tokens,
+                             const size_t num_tokens) {
+  jsmntok_t *token;
+
+  int start = parser->pos;
+
+  parser->pos++;
+
+  /* Skip starting quote */
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    char c = js[parser->pos];
+
+    /* Quote: end of string */
+    if (c == '\"') {
+      if (tokens == NULL) {
+        return 0;
+      }
+      token = jsmn_alloc_token(parser, tokens, num_tokens);
+      if (token == NULL) {
+        parser->pos = start;
+        return JSMN_ERROR_NOMEM;
+      }
+      jsmn_fill_token(token, JSMN_STRING, start + 1, parser->pos);
+#ifdef JSMN_PARENT_LINKS
+      token->parent = parser->toksuper;
+#endif
+      return 0;
+    }
+
+    /* Backslash: Quoted symbol expected */
+    if (c == '\\' && parser->pos + 1 < len) {
+      int i;
+      parser->pos++;
+      switch (js[parser->pos]) {
+      /* Allowed escaped symbols */
+      case '\"':
+      case '/':
+      case '\\':
+      case 'b':
+      case 'f':
+      case 'r':
+      case 'n':
+      case 't':
+        break;
+      /* Allows escaped symbol \uXXXX */
+      case 'u':
+        parser->pos++;
+        for (i = 0; i < 4 && parser->pos < len && js[parser->pos] != '\0';
+             i++) {
+          /* If it isn't a hex character we have an error */
+          if (!((js[parser->pos] >= 48 && js[parser->pos] <= 57) ||   /* 0-9 */
+                (js[parser->pos] >= 65 && js[parser->pos] <= 70) ||   /* A-F */
+                (js[parser->pos] >= 97 && js[parser->pos] <= 102))) { /* a-f */
+            parser->pos = start;
+            return JSMN_ERROR_INVAL;
+          }
+          parser->pos++;
+        }
+        parser->pos--;
+        break;
+      /* Unexpected symbol */
+      default:
+        parser->pos = start;
+        return JSMN_ERROR_INVAL;
+      }
+    }
+  }
+  parser->pos = start;
+  return JSMN_ERROR_PART;
+}
+
+/**
+ * Parse JSON string and fill tokens.
+ */
+JSMN_API int jsmn_parse(jsmn_parser *parser, const char *js, const size_t len,
+                        jsmntok_t *tokens, const unsigned int num_tokens) {
+  int r;
+  int i;
+  jsmntok_t *token;
+  int count = parser->toknext;
+
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    char c;
+    jsmntype_t type;
+
+    c = js[parser->pos];
+    switch (c) {
+    case '{':
+    case '[':
+      count++;
+      if (tokens == NULL) {
+        break;
+      }
+      token = jsmn_alloc_token(parser, tokens, num_tokens);
+      if (token == NULL) {
+        return JSMN_ERROR_NOMEM;
+      }
+      if (parser->toksuper != -1) {
+        jsmntok_t *t = &tokens[parser->toksuper];
+#ifdef JSMN_STRICT
+        /* In strict mode an object or array can't become a key */
+        if (t->type == JSMN_OBJECT) {
+          return JSMN_ERROR_INVAL;
+        }
+#endif
+        t->size++;
+#ifdef JSMN_PARENT_LINKS
+        token->parent = parser->toksuper;
+#endif
+      }
+      token->type = (c == '{' ? JSMN_OBJECT : JSMN_ARRAY);
+      token->start = parser->pos;
+      parser->toksuper = parser->toknext - 1;
+      break;
+    case '}':
+    case ']':
+      if (tokens == NULL) {
+        break;
+      }
+      type = (c == '}' ? JSMN_OBJECT : JSMN_ARRAY);
+#ifdef JSMN_PARENT_LINKS
+      if (parser->toknext < 1) {
+        return JSMN_ERROR_INVAL;
+      }
+      token = &tokens[parser->toknext - 1];
+      for (;;) {
+        if (token->start != -1 && token->end == -1) {
+          if (token->type != type) {
+            return JSMN_ERROR_INVAL;
+          }
+          token->end = parser->pos + 1;
+          parser->toksuper = token->parent;
+          break;
+        }
+        if (token->parent == -1) {
+          if (token->type != type || parser->toksuper == -1) {
+            return JSMN_ERROR_INVAL;
+          }
+          break;
+        }
+        token = &tokens[token->parent];
+      }
+#else
+      for (i = parser->toknext - 1; i >= 0; i--) {
+        token = &tokens[i];
+        if (token->start != -1 && token->end == -1) {
+          if (token->type != type) {
+            return JSMN_ERROR_INVAL;
+          }
+          parser->toksuper = -1;
+          token->end = parser->pos + 1;
+          break;
+        }
+      }
+      /* Error if unmatched closing bracket */
+      if (i == -1) {
+        return JSMN_ERROR_INVAL;
+      }
+      for (; i >= 0; i--) {
+        token = &tokens[i];
+        if (token->start != -1 && token->end == -1) {
+          parser->toksuper = i;
+          break;
+        }
+      }
+#endif
+      break;
+    case '\"':
+      r = jsmn_parse_string(parser, js, len, tokens, num_tokens);
+      if (r < 0) {
+        return r;
+      }
+      count++;
+      if (parser->toksuper != -1 && tokens != NULL) {
+        tokens[parser->toksuper].size++;
+      }
+      break;
+    case '\t':
+    case '\r':
+    case '\n':
+    case ' ':
+      break;
+    case ':':
+      parser->toksuper = parser->toknext - 1;
+      break;
+    case ',':
+      if (tokens != NULL && parser->toksuper != -1 &&
+          tokens[parser->toksuper].type != JSMN_ARRAY &&
+          tokens[parser->toksuper].type != JSMN_OBJECT) {
+#ifdef JSMN_PARENT_LINKS
+        parser->toksuper = tokens[parser->toksuper].parent;
+#else
+        for (i = parser->toknext - 1; i >= 0; i--) {
+          if (tokens[i].type == JSMN_ARRAY || tokens[i].type == JSMN_OBJECT) {
+            if (tokens[i].start != -1 && tokens[i].end == -1) {
+              parser->toksuper = i;
+              break;
+            }
+          }
+        }
+#endif
+      }
+      break;
+#ifdef JSMN_STRICT
+    /* In strict mode primitives are: numbers and booleans */
+    case '-':
+    case '0':
+    case '1':
+    case '2':
+    case '3':
+    case '4':
+    case '5':
+    case '6':
+    case '7':
+    case '8':
+    case '9':
+    case 't':
+    case 'f':
+    case 'n':
+      /* And they must not be keys of the object */
+      if (tokens != NULL && parser->toksuper != -1) {
+        const jsmntok_t *t = &tokens[parser->toksuper];
+        if (t->type == JSMN_OBJECT ||
+            (t->type == JSMN_STRING && t->size != 0)) {
+          return JSMN_ERROR_INVAL;
+        }
+      }
+#else
+    /* In non-strict mode every unquoted value is a primitive */
+    default:
+#endif
+      r = jsmn_parse_primitive(parser, js, len, tokens, num_tokens);
+      if (r < 0) {
+        return r;
+      }
+      count++;
+      if (parser->toksuper != -1 && tokens != NULL) {
+        tokens[parser->toksuper].size++;
+      }
+      break;
+
+#ifdef JSMN_STRICT
+    /* Unexpected char in strict mode */
+    default:
+      return JSMN_ERROR_INVAL;
+#endif
+    }
+  }
+
+  if (tokens != NULL) {
+    for (i = parser->toknext - 1; i >= 0; i--) {
+      /* Unmatched opened object or array */
+      if (tokens[i].start != -1 && tokens[i].end == -1) {
+        return JSMN_ERROR_PART;
+      }
+    }
+  }
+
+  return count;
+}
+
+/**
+ * Creates a new parser based over a given buffer with an array of tokens
+ * available.
+ */
+JSMN_API void jsmn_init(jsmn_parser *parser) {
+  parser->pos = 0;
+  parser->toknext = 0;
+  parser->toksuper = -1;
+}
+
+#endif /* JSMN_HEADER */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* JSMN_H */
diff --git a/tools/sdk/esp32s2/include/json_parser/upstream/jsmn/test/test.h b/tools/sdk/esp32s2/include/json_parser/upstream/jsmn/test/test.h
new file mode 100644
index 00000000000..a1c0957a74a
--- /dev/null
+++ b/tools/sdk/esp32s2/include/json_parser/upstream/jsmn/test/test.h
@@ -0,0 +1,31 @@
+#ifndef __TEST_H__
+#define __TEST_H__
+
+static int test_passed = 0;
+static int test_failed = 0;
+
+/* Terminate current test with error */
+#define fail() return __LINE__
+
+/* Successful end of the test case */
+#define done() return 0
+
+/* Check single condition */
+#define check(cond)                                                            \
+  do {                                                                         \
+    if (!(cond))                                                               \
+      fail();                                                                  \
+  } while (0)
+
+/* Test runner */
+static void test(int (*func)(void), const char *name) {
+  int r = func();
+  if (r == 0) {
+    test_passed++;
+  } else {
+    test_failed++;
+    printf("FAILED: %s (at line %d)\n", name, r);
+  }
+}
+
+#endif /* __TEST_H__ */
diff --git a/tools/sdk/esp32s2/include/json_parser/upstream/jsmn/test/testutil.h b/tools/sdk/esp32s2/include/json_parser/upstream/jsmn/test/testutil.h
new file mode 100644
index 00000000000..bdee13934b1
--- /dev/null
+++ b/tools/sdk/esp32s2/include/json_parser/upstream/jsmn/test/testutil.h
@@ -0,0 +1,96 @@
+#ifndef __TEST_UTIL_H__
+#define __TEST_UTIL_H__
+
+#include "../jsmn.h"
+
+static int vtokeq(const char *s, jsmntok_t *t, unsigned long numtok,
+                  va_list ap) {
+  if (numtok > 0) {
+    unsigned long i;
+    int start, end, size;
+    jsmntype_t type;
+    char *value;
+
+    size = -1;
+    value = NULL;
+    for (i = 0; i < numtok; i++) {
+      type = va_arg(ap, jsmntype_t);
+      if (type == JSMN_STRING) {
+        value = va_arg(ap, char *);
+        size = va_arg(ap, int);
+        start = end = -1;
+      } else if (type == JSMN_PRIMITIVE) {
+        value = va_arg(ap, char *);
+        start = end = size = -1;
+      } else {
+        start = va_arg(ap, int);
+        end = va_arg(ap, int);
+        size = va_arg(ap, int);
+        value = NULL;
+      }
+      if (t[i].type != type) {
+        printf("token %lu type is %d, not %d\n", i, t[i].type, type);
+        return 0;
+      }
+      if (start != -1 && end != -1) {
+        if (t[i].start != start) {
+          printf("token %lu start is %d, not %d\n", i, t[i].start, start);
+          return 0;
+        }
+        if (t[i].end != end) {
+          printf("token %lu end is %d, not %d\n", i, t[i].end, end);
+          return 0;
+        }
+      }
+      if (size != -1 && t[i].size != size) {
+        printf("token %lu size is %d, not %d\n", i, t[i].size, size);
+        return 0;
+      }
+
+      if (s != NULL && value != NULL) {
+        const char *p = s + t[i].start;
+        if (strlen(value) != (unsigned long)(t[i].end - t[i].start) ||
+            strncmp(p, value, t[i].end - t[i].start) != 0) {
+          printf("token %lu value is %.*s, not %s\n", i, t[i].end - t[i].start,
+                 s + t[i].start, value);
+          return 0;
+        }
+      }
+    }
+  }
+  return 1;
+}
+
+static int tokeq(const char *s, jsmntok_t *tokens, unsigned long numtok, ...) {
+  int ok;
+  va_list args;
+  va_start(args, numtok);
+  ok = vtokeq(s, tokens, numtok, args);
+  va_end(args);
+  return ok;
+}
+
+static int parse(const char *s, int status, unsigned long numtok, ...) {
+  int r;
+  int ok = 1;
+  va_list args;
+  jsmn_parser p;
+  jsmntok_t *t = malloc(numtok * sizeof(jsmntok_t));
+
+  jsmn_init(&p);
+  r = jsmn_parse(&p, s, strlen(s), t, numtok);
+  if (r != status) {
+    printf("status is %d, not %d\n", r, status);
+    return 0;
+  }
+
+  if (status >= 0) {
+    va_start(args, numtok);
+    ok = vtokeq(s, t, numtok, args);
+    va_end(args);
+  }
+  free(t);
+  return ok;
+}
+
+#endif /* __TEST_UTIL_H__ */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aes.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aes.h
index 4468b6623ac..e280dbb1c66 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aes.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aes.h
@@ -22,13 +22,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -41,37 +35,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_AES_H
 #define MBEDTLS_AES_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
+#include "mbedtls/platform_util.h"
 
 #include <stddef.h>
 #include <stdint.h>
@@ -81,17 +55,22 @@
 #define MBEDTLS_AES_DECRYPT     0 /**< AES decryption. */
 
 /* Error codes in range 0x0020-0x0022 */
-#define MBEDTLS_ERR_AES_INVALID_KEY_LENGTH                -0x0020  /**< Invalid key length. */
-#define MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH              -0x0022  /**< Invalid data input length. */
+/** Invalid key length. */
+#define MBEDTLS_ERR_AES_INVALID_KEY_LENGTH                -0x0020
+/** Invalid data input length. */
+#define MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH              -0x0022
 
 /* Error codes in range 0x0021-0x0025 */
-#define MBEDTLS_ERR_AES_BAD_INPUT_DATA                    -0x0021  /**< Invalid input data. */
+/** Invalid input data. */
+#define MBEDTLS_ERR_AES_BAD_INPUT_DATA                    -0x0021
 
 /* MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE is deprecated and should not be used. */
-#define MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE               -0x0023  /**< Feature not available. For example, an unsupported AES key size. */
+/** Feature not available. For example, an unsupported AES key size. */
+#define MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE               -0x0023
 
 /* MBEDTLS_ERR_AES_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_AES_HW_ACCEL_FAILED                   -0x0025  /**< AES hardware accelerator failed. */
+/** AES hardware accelerator failed. */
+#define MBEDTLS_ERR_AES_HW_ACCEL_FAILED                   -0x0025
 
 #if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
     !defined(inline) && !defined(__cplusplus)
@@ -196,6 +175,7 @@ void mbedtls_aes_xts_free( mbedtls_aes_xts_context *ctx );
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key,
                     unsigned int keybits );
 
@@ -214,6 +194,7 @@ int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key,
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key,
                     unsigned int keybits );
 
@@ -234,6 +215,7 @@ int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key,
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_xts_setkey_enc( mbedtls_aes_xts_context *ctx,
                                 const unsigned char *key,
                                 unsigned int keybits );
@@ -254,6 +236,7 @@ int mbedtls_aes_xts_setkey_enc( mbedtls_aes_xts_context *ctx,
  * \return         \c 0 on success.
  * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_xts_setkey_dec( mbedtls_aes_xts_context *ctx,
                                 const unsigned char *key,
                                 unsigned int keybits );
@@ -282,6 +265,7 @@ int mbedtls_aes_xts_setkey_dec( mbedtls_aes_xts_context *ctx,
 
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx,
                     int mode,
                     const unsigned char input[16],
@@ -329,6 +313,7 @@ int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx,
  * \return         #MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH
  *                 on failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
                     int mode,
                     size_t length,
@@ -373,6 +358,7 @@ int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
  *                     smaller than an AES block in size (16 Bytes) or if \p
  *                     length is larger than 2^20 blocks (16 MiB).
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx,
                            int mode,
                            size_t length,
@@ -421,6 +407,7 @@ int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx,
  *
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx,
                        int mode,
                        size_t length,
@@ -465,6 +452,7 @@ int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx,
  *
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx,
                     int mode,
                     size_t length,
@@ -519,6 +507,7 @@ int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx,
  *
  * \return         \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx,
                        size_t length,
                        size_t *iv_off,
@@ -533,10 +522,6 @@ int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx,
  * \brief      This function performs an AES-CTR encryption or decryption
  *             operation.
  *
- *             This function performs the operation defined in the \p mode
- *             parameter (encrypt/decrypt), on the input data buffer
- *             defined in the \p input parameter.
- *
  *             Due to the nature of CTR, you must use the same key schedule
  *             for both encryption and decryption operations. Therefore, you
  *             must use the context initialized with mbedtls_aes_setkey_enc()
@@ -605,6 +590,7 @@ int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx,
  *
  * \return                 \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx,
                        size_t length,
                        size_t *nc_off,
@@ -625,6 +611,7 @@ int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx,
  *
  * \return          \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx,
                                   const unsigned char input[16],
                                   unsigned char output[16] );
@@ -640,6 +627,7 @@ int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx,
  *
  * \return          \c 0 on success.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_internal_aes_decrypt( mbedtls_aes_context *ctx,
                                   const unsigned char input[16],
                                   unsigned char output[16] );
@@ -689,6 +677,7 @@ MBEDTLS_DEPRECATED void mbedtls_aes_decrypt( mbedtls_aes_context *ctx,
  * \return         \c 0 on success.
  * \return         \c 1 on failure.
  */
+MBEDTLS_CHECK_RETURN_CRITICAL
 int mbedtls_aes_self_test( int verbose );
 
 #endif /* MBEDTLS_SELF_TEST */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aesni.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aesni.h
index 9b63a0010a0..c1d22f59af3 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aesni.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aesni.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,38 +21,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_AESNI_H
 #define MBEDTLS_AESNI_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "aes.h"
+#include "mbedtls/aes.h"
 
 #define MBEDTLS_AESNI_AES      0x02000000u
 #define MBEDTLS_AESNI_CLMUL    0x00000002u
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/arc4.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/arc4.h
index 6334a9cc1e2..f4b0f9f3508 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/arc4.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/arc4.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,33 +22,12 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_ARC4_H
 #define MBEDTLS_ARC4_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -62,7 +35,8 @@
 #include <stddef.h>
 
 /* MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED                  -0x0019  /**< ARC4 hardware accelerator failed. */
+/** ARC4 hardware accelerator failed. */
+#define MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED                  -0x0019
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aria.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aria.h
index 20f43f2256d..226e2dbf3c8 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aria.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aria.h
@@ -11,13 +11,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -30,34 +24,13 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ARIA_H
 #define MBEDTLS_ARIA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -65,7 +38,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #define MBEDTLS_ARIA_ENCRYPT     1 /**< ARIA encryption. */
 #define MBEDTLS_ARIA_DECRYPT     0 /**< ARIA decryption. */
@@ -77,16 +50,20 @@
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
 #define MBEDTLS_ERR_ARIA_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x005C )
 #endif /* !MBEDTLS_DEPRECATED_REMOVED */
-#define MBEDTLS_ERR_ARIA_BAD_INPUT_DATA -0x005C /**< Bad input data. */
+/** Bad input data. */
+#define MBEDTLS_ERR_ARIA_BAD_INPUT_DATA -0x005C
 
-#define MBEDTLS_ERR_ARIA_INVALID_INPUT_LENGTH -0x005E /**< Invalid data input length. */
+/** Invalid data input length. */
+#define MBEDTLS_ERR_ARIA_INVALID_INPUT_LENGTH -0x005E
 
 /* MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE  -0x005A  /**< Feature not available. For example, an unsupported ARIA key size. */
+/** Feature not available. For example, an unsupported ARIA key size. */
+#define MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE  -0x005A
 
 /* MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED      -0x0058  /**< ARIA hardware accelerator failed. */
+/** ARIA hardware accelerator failed. */
+#define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED      -0x0058
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/asn1.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/asn1.h
index 0e596bca2cd..10f7905b7e6 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/asn1.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/asn1.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ASN1_H
 #define MBEDTLS_ASN1_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,7 +31,7 @@
 #include <stddef.h>
 
 #if defined(MBEDTLS_BIGNUM_C)
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 #endif
 
 /**
@@ -73,13 +46,20 @@
  * ASN1 is a standard to specify data structures.
  * \{
  */
-#define MBEDTLS_ERR_ASN1_OUT_OF_DATA                      -0x0060  /**< Out of data when parsing an ASN1 data structure. */
-#define MBEDTLS_ERR_ASN1_UNEXPECTED_TAG                   -0x0062  /**< ASN1 tag was of an unexpected value. */
-#define MBEDTLS_ERR_ASN1_INVALID_LENGTH                   -0x0064  /**< Error when trying to determine the length or invalid length. */
-#define MBEDTLS_ERR_ASN1_LENGTH_MISMATCH                  -0x0066  /**< Actual length differs from expected length. */
-#define MBEDTLS_ERR_ASN1_INVALID_DATA                     -0x0068  /**< Data is invalid. (not used) */
-#define MBEDTLS_ERR_ASN1_ALLOC_FAILED                     -0x006A  /**< Memory allocation failed */
-#define MBEDTLS_ERR_ASN1_BUF_TOO_SMALL                    -0x006C  /**< Buffer too small when writing ASN.1 data structure. */
+/** Out of data when parsing an ASN1 data structure. */
+#define MBEDTLS_ERR_ASN1_OUT_OF_DATA                      -0x0060
+/** ASN1 tag was of an unexpected value. */
+#define MBEDTLS_ERR_ASN1_UNEXPECTED_TAG                   -0x0062
+/** Error when trying to determine the length or invalid length. */
+#define MBEDTLS_ERR_ASN1_INVALID_LENGTH                   -0x0064
+/** Actual length differs from expected length. */
+#define MBEDTLS_ERR_ASN1_LENGTH_MISMATCH                  -0x0066
+/** Data is invalid. */
+#define MBEDTLS_ERR_ASN1_INVALID_DATA                     -0x0068
+/** Memory allocation failed */
+#define MBEDTLS_ERR_ASN1_ALLOC_FAILED                     -0x006A
+/** Buffer too small when writing ASN.1 data structure. */
+#define MBEDTLS_ERR_ASN1_BUF_TOO_SMALL                    -0x006C
 
 /* \} name */
 
@@ -100,6 +80,7 @@
 #define MBEDTLS_ASN1_OCTET_STRING            0x04
 #define MBEDTLS_ASN1_NULL                    0x05
 #define MBEDTLS_ASN1_OID                     0x06
+#define MBEDTLS_ASN1_ENUMERATED              0x0A
 #define MBEDTLS_ASN1_UTF8_STRING             0x0C
 #define MBEDTLS_ASN1_SEQUENCE                0x10
 #define MBEDTLS_ASN1_SET                     0x11
@@ -114,6 +95,18 @@
 #define MBEDTLS_ASN1_CONSTRUCTED             0x20
 #define MBEDTLS_ASN1_CONTEXT_SPECIFIC        0x80
 
+/* Slightly smaller way to check if tag is a string tag
+ * compared to canonical implementation. */
+#define MBEDTLS_ASN1_IS_STRING_TAG( tag )                                     \
+    ( ( tag ) < 32u && (                                                      \
+        ( ( 1u << ( tag ) ) & ( ( 1u << MBEDTLS_ASN1_BMP_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_UTF8_STRING )      |     \
+                                ( 1u << MBEDTLS_ASN1_T61_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_IA5_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_UNIVERSAL_STRING ) |     \
+                                ( 1u << MBEDTLS_ASN1_PRINTABLE_STRING ) |     \
+                                ( 1u << MBEDTLS_ASN1_BIT_STRING ) ) ) != 0 ) )
+
 /*
  * Bit masks for each of the components of an ASN.1 tag as specified in
  * ITU X.690 (08/2015), section 8.1 "General rules for encoding",
@@ -144,6 +137,10 @@
         ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf)->len ) ||                \
           memcmp( (oid_str), (oid_buf)->p, (oid_buf)->len) != 0 )
 
+#define MBEDTLS_OID_CMP_RAW(oid_str, oid_buf, oid_buf_len)              \
+        ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf_len) ) ||             \
+          memcmp( (oid_str), (oid_buf), (oid_buf_len) ) != 0 )
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -201,119 +198,342 @@ mbedtls_asn1_named_data;
  * \brief       Get the length of an ASN.1 element.
  *              Updates the pointer to immediately behind the length.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param len   The variable that will receive the value
- *
- * \return      0 if successful, MBEDTLS_ERR_ASN1_OUT_OF_DATA on reaching
- *              end of data, MBEDTLS_ERR_ASN1_INVALID_LENGTH if length is
- *              unparseable.
+ * \param p     On entry, \c *p points to the first byte of the length,
+ *              i.e. immediately after the tag.
+ *              On successful completion, \c *p points to the first byte
+ *              after the length, i.e. the first byte of the content.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On successful completion, \c *len contains the length
+ *              read from the ASN.1 input.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_OUT_OF_DATA if the ASN.1 element
+ *              would end beyond \p end.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the length is unparseable.
  */
 int mbedtls_asn1_get_len( unsigned char **p,
-                  const unsigned char *end,
-                  size_t *len );
+                          const unsigned char *end,
+                          size_t *len );
 
 /**
- * \brief       Get the tag and length of the tag. Check for the requested tag.
+ * \brief       Get the tag and length of the element.
+ *              Check for the requested tag.
  *              Updates the pointer to immediately behind the tag and length.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param len   The variable that will receive the length
- * \param tag   The expected tag
- *
- * \return      0 if successful, MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if tag did
- *              not match requested tag, or another specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              after the length, i.e. the first byte of the content.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On successful completion, \c *len contains the length
+ *              read from the ASN.1 input.
+ * \param tag   The expected tag.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the data does not start
+ *              with the requested tag.
+ * \return      #MBEDTLS_ERR_ASN1_OUT_OF_DATA if the ASN.1 element
+ *              would end beyond \p end.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the length is unparseable.
  */
 int mbedtls_asn1_get_tag( unsigned char **p,
-                  const unsigned char *end,
-                  size_t *len, int tag );
+                          const unsigned char *end,
+                          size_t *len, int tag );
 
 /**
  * \brief       Retrieve a boolean ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param val   The variable that will receive the value
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value (\c 0 or \c 1).
  *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BOOLEAN.
  */
 int mbedtls_asn1_get_bool( unsigned char **p,
-                   const unsigned char *end,
-                   int *val );
+                           const unsigned char *end,
+                           int *val );
 
 /**
  * \brief       Retrieve an integer ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param val   The variable that will receive the value
- *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 INTEGER.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
  */
 int mbedtls_asn1_get_int( unsigned char **p,
-                  const unsigned char *end,
-                  int *val );
+                          const unsigned char *end,
+                          int *val );
 
 /**
- * \brief       Retrieve a bitstring ASN.1 tag and its value.
+ * \brief       Retrieve an enumerated ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param bs    The variable that will receive the value
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 ENUMERATED.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
+ */
+int mbedtls_asn1_get_enum( unsigned char **p,
+                           const unsigned char *end,
+                           int *val );
+
+/**
+ * \brief       Retrieve a bitstring ASN.1 tag and its value.
+ *              Updates the pointer to immediately behind the full tag.
  *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p is equal to \p end.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param bs    On success, ::mbedtls_asn1_bitstring information about
+ *              the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input contains
+ *              extra data after a valid BIT STRING.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BIT STRING.
  */
 int mbedtls_asn1_get_bitstring( unsigned char **p, const unsigned char *end,
-                        mbedtls_asn1_bitstring *bs);
+                                mbedtls_asn1_bitstring *bs );
 
 /**
  * \brief       Retrieve a bitstring ASN.1 tag without unused bits and its
  *              value.
  *              Updates the pointer to the beginning of the bit/octet string.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param len   Length of the actual bit/octect string in bytes
- *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              of the content of the BIT STRING.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On success, \c *len is the length of the content in bytes.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_DATA if the input starts with
+ *              a valid BIT STRING with a nonzero number of unused bits.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BIT STRING.
  */
-int mbedtls_asn1_get_bitstring_null( unsigned char **p, const unsigned char *end,
-                             size_t *len );
+int mbedtls_asn1_get_bitstring_null( unsigned char **p,
+                                     const unsigned char *end,
+                                     size_t *len );
 
 /**
- * \brief       Parses and splits an ASN.1 "SEQUENCE OF <tag>"
- *              Updated the pointer to immediately behind the full sequence tag.
- *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param cur   First variable in the chain to fill
- * \param tag   Type of sequence
- *
- * \return      0 if successful or a specific ASN.1 error code.
+ * \brief       Parses and splits an ASN.1 "SEQUENCE OF <tag>".
+ *              Updates the pointer to immediately behind the full sequence tag.
+ *
+ * This function allocates memory for the sequence elements. You can free
+ * the allocated memory with mbedtls_asn1_sequence_free().
+ *
+ * \note        On error, this function may return a partial list in \p cur.
+ *              You must set `cur->next = NULL` before calling this function!
+ *              Otherwise it is impossible to distinguish a previously non-null
+ *              pointer from a pointer to an object allocated by this function.
+ *
+ * \note        If the sequence is empty, this function does not modify
+ *              \c *cur. If the sequence is valid and non-empty, this
+ *              function sets `cur->buf.tag` to \p tag. This allows
+ *              callers to distinguish between an empty sequence and
+ *              a one-element sequence.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p is equal to \p end.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param cur   A ::mbedtls_asn1_sequence which this function fills.
+ *              When this function returns, \c *cur is the head of a linked
+ *              list. Each node in this list is allocated with
+ *              mbedtls_calloc() apart from \p cur itself, and should
+ *              therefore be freed with mbedtls_free().
+ *              The list describes the content of the sequence.
+ *              The head of the list (i.e. \c *cur itself) describes the
+ *              first element, `*cur->next` describes the second element, etc.
+ *              For each element, `buf.tag == tag`, `buf.len` is the length
+ *              of the content of the content of the element, and `buf.p`
+ *              points to the first byte of the content (i.e. immediately
+ *              past the length of the element).
+ *              Note that list elements may be allocated even on error.
+ * \param tag   Each element of the sequence must have this tag.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input contains
+ *              extra data after a valid SEQUENCE OF \p tag.
+ * \return      #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the input starts with
+ *              an ASN.1 SEQUENCE in which an element has a tag that
+ *              is different from \p tag.
+ * \return      #MBEDTLS_ERR_ASN1_ALLOC_FAILED if a memory allocation failed.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 SEQUENCE.
  */
 int mbedtls_asn1_get_sequence_of( unsigned char **p,
-                          const unsigned char *end,
-                          mbedtls_asn1_sequence *cur,
-                          int tag);
+                                  const unsigned char *end,
+                                  mbedtls_asn1_sequence *cur,
+                                  int tag );
+/**
+ * \brief          Free a heap-allocated linked list presentation of
+ *                 an ASN.1 sequence, including the first element.
+ *
+ * There are two common ways to manage the memory used for the representation
+ * of a parsed ASN.1 sequence:
+ * - Allocate a head node `mbedtls_asn1_sequence *head` with mbedtls_calloc().
+ *   Pass this node as the `cur` argument to mbedtls_asn1_get_sequence_of().
+ *   When you have finished processing the sequence,
+ *   call mbedtls_asn1_sequence_free() on `head`.
+ * - Allocate a head node `mbedtls_asn1_sequence *head` in any manner,
+ *   for example on the stack. Make sure that `head->next == NULL`.
+ *   Pass `head` as the `cur` argument to mbedtls_asn1_get_sequence_of().
+ *   When you have finished processing the sequence,
+ *   call mbedtls_asn1_sequence_free() on `head->cur`,
+ *   then free `head` itself in the appropriate manner.
+ *
+ * \param seq      The address of the first sequence component. This may
+ *                 be \c NULL, in which case this functions returns
+ *                 immediately.
+ */
+void mbedtls_asn1_sequence_free( mbedtls_asn1_sequence *seq );
+
+/**
+ * \brief                Traverse an ASN.1 SEQUENCE container and
+ *                       call a callback for each entry.
+ *
+ * This function checks that the input is a SEQUENCE of elements that
+ * each have a "must" tag, and calls a callback function on the elements
+ * that have a "may" tag.
+ *
+ * For example, to validate that the input is a SEQUENCE of `tag1` and call
+ * `cb` on each element, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0xff, tag1, 0, 0, cb, ctx);
+ * ```
+ *
+ * To validate that the input is a SEQUENCE of ANY and call `cb` on
+ * each element, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0, 0, 0, 0, cb, ctx);
+ * ```
+ *
+ * To validate that the input is a SEQUENCE of CHOICE {NULL, OCTET STRING}
+ * and call `cb` on each element that is an OCTET STRING, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0xfe, 0x04, 0xff, 0x04, cb, ctx);
+ * ```
+ *
+ * The callback is called on the elements with a "may" tag from left to
+ * right. If the input is not a valid SEQUENCE of elements with a "must" tag,
+ * the callback is called on the elements up to the leftmost point where
+ * the input is invalid.
+ *
+ * \warning              This function is still experimental and may change
+ *                       at any time.
+ *
+ * \param p              The address of the pointer to the beginning of
+ *                       the ASN.1 SEQUENCE header. This is updated to
+ *                       point to the end of the ASN.1 SEQUENCE container
+ *                       on a successful invocation.
+ * \param end            The end of the ASN.1 SEQUENCE container.
+ * \param tag_must_mask  A mask to be applied to the ASN.1 tags found within
+ *                       the SEQUENCE before comparing to \p tag_must_value.
+ * \param tag_must_val   The required value of each ASN.1 tag found in the
+ *                       SEQUENCE, after masking with \p tag_must_mask.
+ *                       Mismatching tags lead to an error.
+ *                       For example, a value of \c 0 for both \p tag_must_mask
+ *                       and \p tag_must_val means that every tag is allowed,
+ *                       while a value of \c 0xFF for \p tag_must_mask means
+ *                       that \p tag_must_val is the only allowed tag.
+ * \param tag_may_mask   A mask to be applied to the ASN.1 tags found within
+ *                       the SEQUENCE before comparing to \p tag_may_value.
+ * \param tag_may_val    The desired value of each ASN.1 tag found in the
+ *                       SEQUENCE, after masking with \p tag_may_mask.
+ *                       Mismatching tags will be silently ignored.
+ *                       For example, a value of \c 0 for \p tag_may_mask and
+ *                       \p tag_may_val means that any tag will be considered,
+ *                       while a value of \c 0xFF for \p tag_may_mask means
+ *                       that all tags with value different from \p tag_may_val
+ *                       will be ignored.
+ * \param cb             The callback to trigger for each component
+ *                       in the ASN.1 SEQUENCE that matches \p tag_may_val.
+ *                       The callback function is called with the following
+ *                       parameters:
+ *                       - \p ctx.
+ *                       - The tag of the current element.
+ *                       - A pointer to the start of the current element's
+ *                         content inside the input.
+ *                       - The length of the content of the current element.
+ *                       If the callback returns a non-zero value,
+ *                       the function stops immediately,
+ *                       forwarding the callback's return value.
+ * \param ctx            The context to be passed to the callback \p cb.
+ *
+ * \return               \c 0 if successful the entire ASN.1 SEQUENCE
+ *                       was traversed without parsing or callback errors.
+ * \return               #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input
+ *                       contains extra data after a valid SEQUENCE
+ *                       of elements with an accepted tag.
+ * \return               #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the input starts
+ *                       with an ASN.1 SEQUENCE in which an element has a tag
+ *                       that is not accepted.
+ * \return               An ASN.1 error code if the input does not start with
+ *                       a valid ASN.1 SEQUENCE.
+ * \return               A non-zero error code forwarded from the callback
+ *                       \p cb in case the latter returns a non-zero value.
+ */
+int mbedtls_asn1_traverse_sequence_of(
+    unsigned char **p,
+    const unsigned char *end,
+    unsigned char tag_must_mask, unsigned char tag_must_val,
+    unsigned char tag_may_mask, unsigned char tag_may_val,
+    int (*cb)( void *ctx, int tag,
+               unsigned char* start, size_t len ),
+    void *ctx );
 
 #if defined(MBEDTLS_BIGNUM_C)
 /**
- * \brief       Retrieve a MPI value from an integer ASN.1 tag.
+ * \brief       Retrieve an integer ASN.1 tag and its value.
  *              Updates the pointer to immediately behind the full tag.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param X     The MPI that will receive the value
- *
- * \return      0 if successful or a specific ASN.1 or MPI error code.
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param X     On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 INTEGER.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
+ * \return      An MPI error code if the parsed value is too large.
  */
 int mbedtls_asn1_get_mpi( unsigned char **p,
-                  const unsigned char *end,
-                  mbedtls_mpi *X );
+                          const unsigned char *end,
+                          mbedtls_mpi *X );
 #endif /* MBEDTLS_BIGNUM_C */
 
 /**
@@ -321,10 +541,14 @@ int mbedtls_asn1_get_mpi( unsigned char **p,
  *              Updates the pointer to immediately behind the full
  *              AlgorithmIdentifier.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param alg   The buffer to receive the OID
- * \param params The buffer to receive the params (if any)
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the AlgorithmIdentifier element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param alg   The buffer to receive the OID.
+ * \param params The buffer to receive the parameters.
+ *              This is zeroized if there are no parameters.
  *
  * \return      0 if successful or a specific ASN.1 or MPI error code.
  */
@@ -338,9 +562,12 @@ int mbedtls_asn1_get_alg( unsigned char **p,
  *              Updates the pointer to immediately behind the full
  *              AlgorithmIdentifier.
  *
- * \param p     The position in the ASN.1 data
- * \param end   End of data
- * \param alg   The buffer to receive the OID
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the AlgorithmIdentifier element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param alg   The buffer to receive the OID.
  *
  * \return      0 if successful or a specific ASN.1 or MPI error code.
  */
@@ -364,15 +591,19 @@ mbedtls_asn1_named_data *mbedtls_asn1_find_named_data( mbedtls_asn1_named_data *
 /**
  * \brief       Free a mbedtls_asn1_named_data entry
  *
- * \param entry The named data entry to free
+ * \param entry The named data entry to free.
+ *              This function calls mbedtls_free() on
+ *              `entry->oid.p` and `entry->val.p`.
  */
 void mbedtls_asn1_free_named_data( mbedtls_asn1_named_data *entry );
 
 /**
- * \brief       Free all entries in a mbedtls_asn1_named_data list
- *              Head will be set to NULL
+ * \brief       Free all entries in a mbedtls_asn1_named_data list.
  *
- * \param head  Pointer to the head of the list of named data entries to free
+ * \param head  Pointer to the head of the list of named data entries to free.
+ *              This function calls mbedtls_asn1_free_named_data() and
+ *              mbedtls_free() on each list element and
+ *              sets \c *head to \c NULL.
  */
 void mbedtls_asn1_free_named_data_list( mbedtls_asn1_named_data **head );
 
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/asn1write.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/asn1write.h
index 3c7cdd6b469..44afae0e560 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/asn1write.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/asn1write.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ASN1_WRITE_H
 #define MBEDTLS_ASN1_WRITE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
+#include "mbedtls/asn1.h"
 
 #define MBEDTLS_ASN1_CHK_ADD(g, f)                      \
     do                                                  \
@@ -125,6 +98,7 @@ int mbedtls_asn1_write_raw_buffer( unsigned char **p, unsigned char *start,
  * \param p         The reference to the current position pointer.
  * \param start     The start of the buffer, for bounds-checking.
  * \param X         The MPI to write.
+ *                  It must be non-negative.
  *
  * \return          The number of bytes written to \p p on success.
  * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
@@ -209,12 +183,28 @@ int mbedtls_asn1_write_bool( unsigned char **p, unsigned char *start,
  * \param p         The reference to the current position pointer.
  * \param start     The start of the buffer, for bounds-checking.
  * \param val       The integer value to write.
+ *                  It must be non-negative.
  *
  * \return          The number of bytes written to \p p on success.
  * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
  */
 int mbedtls_asn1_write_int( unsigned char **p, unsigned char *start, int val );
 
+/**
+ * \brief           Write an enum tag (#MBEDTLS_ASN1_ENUMERATED) and value
+ *                  in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param val       The integer value to write.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_enum( unsigned char **p, unsigned char *start, int val );
+
 /**
  * \brief           Write a string in ASN.1 format using a specific
  *                  string encoding tag.
@@ -257,7 +247,7 @@ int mbedtls_asn1_write_printable_string( unsigned char **p,
 
 /**
  * \brief           Write a UTF8 string in ASN.1 format using the UTF8String
- *                  string encoding tag (#MBEDTLS_ASN1_PRINTABLE_STRING).
+ *                  string encoding tag (#MBEDTLS_ASN1_UTF8_STRING).
  *
  * \note            This function works backwards in data buffer.
  *
@@ -308,6 +298,28 @@ int mbedtls_asn1_write_ia5_string( unsigned char **p, unsigned char *start,
 int mbedtls_asn1_write_bitstring( unsigned char **p, unsigned char *start,
                                   const unsigned char *buf, size_t bits );
 
+/**
+ * \brief           This function writes a named bitstring tag
+ *                  (#MBEDTLS_ASN1_BIT_STRING) and value in ASN.1 format.
+ *
+ *                  As stated in RFC 5280 Appendix B, trailing zeroes are
+ *                  omitted when encoding named bitstrings in DER.
+ *
+ * \note            This function works backwards within the data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer which is used for bounds-checking.
+ * \param buf       The bitstring to write.
+ * \param bits      The total number of bits in the bitstring.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_asn1_write_named_bitstring( unsigned char **p,
+                                        unsigned char *start,
+                                        const unsigned char *buf,
+                                        size_t bits );
+
 /**
  * \brief           Write an octet string tag (#MBEDTLS_ASN1_OCTET_STRING)
  *                  and value in ASN.1 format.
@@ -335,9 +347,13 @@ int mbedtls_asn1_write_octet_string( unsigned char **p, unsigned char *start,
  *                  through (will be updated in case of a new entry).
  * \param oid       The OID to look for.
  * \param oid_len   The size of the OID.
- * \param val       The data to store (can be \c NULL if you want to fill
- *                  it by hand).
+ * \param val       The associated data to store. If this is \c NULL,
+ *                  no data is copied to the new or existing buffer.
  * \param val_len   The minimum length of the data buffer needed.
+ *                  If this is 0, do not allocate a buffer for the associated
+ *                  data.
+ *                  If the OID was already present, enlarge, shrink or free
+ *                  the existing buffer to fit \p val_len.
  *
  * \return          A pointer to the new / existing entry on success.
  * \return          \c NULL if if there was a memory allocation error.
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/base64.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/base64.h
index cbed6887ee6..cf4149e731d 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/base64.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/base64.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,22 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_BASE64_H
 #define MBEDTLS_BASE64_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
 
-#define MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL               -0x002A  /**< Output buffer too small. */
-#define MBEDTLS_ERR_BASE64_INVALID_CHARACTER              -0x002C  /**< Invalid character in input. */
+/** Output buffer too small. */
+#define MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL               -0x002A
+/** Invalid character in input. */
+#define MBEDTLS_ERR_BASE64_INVALID_CHARACTER              -0x002C
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bignum.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bignum.h
index 3deedfedd9c..4de452980b8 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bignum.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bignum.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_BIGNUM_H
 #define MBEDTLS_BIGNUM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -62,14 +35,22 @@
 #include <stdio.h>
 #endif
 
-#define MBEDTLS_ERR_MPI_FILE_IO_ERROR                     -0x0002  /**< An error occurred while reading from or writing to a file. */
-#define MBEDTLS_ERR_MPI_BAD_INPUT_DATA                    -0x0004  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_MPI_INVALID_CHARACTER                 -0x0006  /**< There is an invalid character in the digit string. */
-#define MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL                  -0x0008  /**< The buffer is too small to write to. */
-#define MBEDTLS_ERR_MPI_NEGATIVE_VALUE                    -0x000A  /**< The input arguments are negative or result in illegal output. */
-#define MBEDTLS_ERR_MPI_DIVISION_BY_ZERO                  -0x000C  /**< The input argument for division is zero, which is not allowed. */
-#define MBEDTLS_ERR_MPI_NOT_ACCEPTABLE                    -0x000E  /**< The input arguments are not acceptable. */
-#define MBEDTLS_ERR_MPI_ALLOC_FAILED                      -0x0010  /**< Memory allocation failed. */
+/** An error occurred while reading from or writing to a file. */
+#define MBEDTLS_ERR_MPI_FILE_IO_ERROR                     -0x0002
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_MPI_BAD_INPUT_DATA                    -0x0004
+/** There is an invalid character in the digit string. */
+#define MBEDTLS_ERR_MPI_INVALID_CHARACTER                 -0x0006
+/** The buffer is too small to write to. */
+#define MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL                  -0x0008
+/** The input arguments are negative or result in illegal output. */
+#define MBEDTLS_ERR_MPI_NEGATIVE_VALUE                    -0x000A
+/** The input argument for division is zero, which is not allowed. */
+#define MBEDTLS_ERR_MPI_DIVISION_BY_ZERO                  -0x000C
+/** The input arguments are not acceptable. */
+#define MBEDTLS_ERR_MPI_NOT_ACCEPTABLE                    -0x000E
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_MPI_ALLOC_FAILED                      -0x0010
 
 #define MBEDTLS_MPI_CHK(f)       \
     do                           \
@@ -156,7 +137,8 @@
         defined(__ppc64__) || defined(__powerpc64__)  || \
         defined(__ia64__)  || defined(__alpha__)      || \
         ( defined(__sparc__) && defined(__arch64__) ) || \
-        defined(__s390x__) || defined(__mips64) )
+        defined(__s390x__) || defined(__mips64)       || \
+        defined(__aarch64__) )
         #if !defined(MBEDTLS_HAVE_INT64)
             #define MBEDTLS_HAVE_INT64
         #endif /* MBEDTLS_HAVE_INT64 */
@@ -522,8 +504,24 @@ int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf,
                              size_t buflen );
 
 /**
- * \brief          Export an MPI into unsigned big endian binary data
- *                 of fixed size.
+ * \brief          Import X from unsigned binary data, little endian
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param buf      The input buffer. This must be a readable buffer of length
+ *                 \p buflen Bytes.
+ * \param buflen   The length of the input buffer \p p in Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_read_binary_le( mbedtls_mpi *X,
+                                const unsigned char *buf, size_t buflen );
+
+/**
+ * \brief          Export X into unsigned binary data, big endian.
+ *                 Always fills the whole buffer, which will start with zeros
+ *                 if the number is smaller.
  *
  * \param X        The source MPI. This must point to an initialized MPI.
  * \param buf      The output buffer. This must be a writable buffer of length
@@ -538,6 +536,24 @@ int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf,
 int mbedtls_mpi_write_binary( const mbedtls_mpi *X, unsigned char *buf,
                               size_t buflen );
 
+/**
+ * \brief          Export X into unsigned binary data, little endian.
+ *                 Always fills the whole buffer, which will end with zeros
+ *                 if the number is smaller.
+ *
+ * \param X        The source MPI. This must point to an initialized MPI.
+ * \param buf      The output buffer. This must be a writable buffer of length
+ *                 \p buflen Bytes.
+ * \param buflen   The size of the output buffer \p buf in Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if \p buf isn't
+ *                 large enough to hold the value of \p X.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_write_binary_le( const mbedtls_mpi *X,
+                                 unsigned char *buf, size_t buflen );
+
 /**
  * \brief          Perform a left-shift on an MPI: X <<= count
  *
@@ -823,14 +839,14 @@ int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A,
  * \param E        The exponent MPI. This must point to an initialized MPI.
  * \param N        The base for the modular reduction. This must point to an
  *                 initialized MPI.
- * \param _RR      A helper MPI depending solely on \p N which can be used to
+ * \param prec_RR  A helper MPI depending solely on \p N which can be used to
  *                 speed-up multiple modular exponentiations for the same value
  *                 of \p N. This may be \c NULL. If it is not \c NULL, it must
  *                 point to an initialized MPI. If it hasn't been used after
  *                 the call to mbedtls_mpi_init(), this function will compute
- *                 the helper value and store it in \p _RR for reuse on
+ *                 the helper value and store it in \p prec_RR for reuse on
  *                 subsequent calls to this function. Otherwise, the function
- *                 will assume that \p _RR holds the helper value set by a
+ *                 will assume that \p prec_RR holds the helper value set by a
  *                 previous call to mbedtls_mpi_exp_mod(), and reuse it.
  *
  * \return         \c 0 if successful.
@@ -842,7 +858,7 @@ int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A,
  */
 int mbedtls_mpi_exp_mod( mbedtls_mpi *X, const mbedtls_mpi *A,
                          const mbedtls_mpi *E, const mbedtls_mpi *N,
-                         mbedtls_mpi *_RR );
+                         mbedtls_mpi *prec_RR );
 
 /**
  * \brief          Fill an MPI with a number of random bytes.
@@ -865,6 +881,44 @@ int mbedtls_mpi_fill_random( mbedtls_mpi *X, size_t size,
                      int (*f_rng)(void *, unsigned char *, size_t),
                      void *p_rng );
 
+/** Generate a random number uniformly in a range.
+ *
+ * This function generates a random number between \p min inclusive and
+ * \p N exclusive.
+ *
+ * The procedure complies with RFC 6979 §3.3 (deterministic ECDSA)
+ * when the RNG is a suitably parametrized instance of HMAC_DRBG
+ * and \p min is \c 1.
+ *
+ * \note           There are `N - min` possible outputs. The lower bound
+ *                 \p min can be reached, but the upper bound \p N cannot.
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param min      The minimum value to return.
+ *                 It must be nonnegative.
+ * \param N        The upper bound of the range, exclusive.
+ *                 In other words, this is one plus the maximum value to return.
+ *                 \p N must be strictly larger than \p min.
+ * \param f_rng    The RNG function to use. This must not be \c NULL.
+ * \param p_rng    The RNG parameter to be passed to \p f_rng.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \p min or \p N is invalid
+ *                 or if they are incompatible.
+ * \return         #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if the implementation was
+ *                 unable to find a suitable value within a limited number
+ *                 of attempts. This has a negligible probability if \p N
+ *                 is significantly larger than \p min, which is the case
+ *                 for all usual cryptographic applications.
+ * \return         Another negative error code on failure.
+ */
+int mbedtls_mpi_random( mbedtls_mpi *X,
+                        mbedtls_mpi_sint min,
+                        const mbedtls_mpi *N,
+                        int (*f_rng)(void *, unsigned char *, size_t),
+                        void *p_rng );
+
 /**
  * \brief          Compute the greatest common divisor: G = gcd(A, B)
  *
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/blowfish.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/blowfish.h
index 945bd426a9f..77dca70d314 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/blowfish.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/blowfish.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_BLOWFISH_H
 #define MBEDTLS_BLOWFISH_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,7 +31,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #define MBEDTLS_BLOWFISH_ENCRYPT     1
 #define MBEDTLS_BLOWFISH_DECRYPT     0
@@ -70,13 +43,16 @@
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
 #define MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x0016 )
 #endif /* !MBEDTLS_DEPRECATED_REMOVED */
-#define MBEDTLS_ERR_BLOWFISH_BAD_INPUT_DATA -0x0016 /**< Bad input data. */
+/** Bad input data. */
+#define MBEDTLS_ERR_BLOWFISH_BAD_INPUT_DATA -0x0016
 
-#define MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH -0x0018 /**< Invalid data input length. */
+/** Invalid data input length. */
+#define MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH -0x0018
 
 /* MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED                   -0x0017  /**< Blowfish hardware accelerator failed. */
+/** Blowfish hardware accelerator failed. */
+#define MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED                   -0x0017
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
index 6f1201bf50a..31137cd4c23 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 /*
  *      Multiply source vector [s] with b, add result
@@ -64,12 +37,12 @@
 #define MBEDTLS_BN_MUL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 
 /*
@@ -256,13 +229,37 @@
         "addq   $8, %%rdi\n"
 
 #define MULADDC_STOP                        \
-        : "+c" (c), "+D" (d), "+S" (s)      \
-        : "b" (b)                           \
-        : "rax", "rdx", "r8"                \
+        : "+c" (c), "+D" (d), "+S" (s), "+m" (*(uint64_t (*)[16]) d) \
+        : "b" (b), "m" (*(const uint64_t (*)[16]) s)                 \
+        : "rax", "rdx", "r8"                                         \
     );
 
 #endif /* AMD64 */
 
+#if defined(__aarch64__)
+
+#define MULADDC_INIT                \
+    asm(
+
+#define MULADDC_CORE                \
+        "ldr x4, [%2], #8   \n\t"   \
+        "ldr x5, [%1]       \n\t"   \
+        "mul x6, x4, %4     \n\t"   \
+        "umulh x7, x4, %4   \n\t"   \
+        "adds x5, x5, x6    \n\t"   \
+        "adc x7, x7, xzr    \n\t"   \
+        "adds x5, x5, %0    \n\t"   \
+        "adc %0, x7, xzr    \n\t"   \
+        "str x5, [%1], #8   \n\t"
+
+#define MULADDC_STOP                                                    \
+         : "+r" (c),  "+r" (d), "+r" (s), "+m" (*(uint64_t (*)[16]) d)  \
+         : "r" (b), "m" (*(const uint64_t (*)[16]) s)                   \
+         : "x4", "x5", "x6", "x7", "cc"                                 \
+    );
+
+#endif /* Aarch64 */
+
 #if defined(__mc68020__) || defined(__mcpu32__)
 
 #define MULADDC_INIT                    \
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/camellia.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/camellia.h
index 38871288e4b..925a623e47e 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/camellia.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/camellia.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_CAMELLIA_H
 #define MBEDTLS_CAMELLIA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,7 +31,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #define MBEDTLS_CAMELLIA_ENCRYPT     1
 #define MBEDTLS_CAMELLIA_DECRYPT     0
@@ -66,13 +39,16 @@
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
 #define MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x0024 )
 #endif /* !MBEDTLS_DEPRECATED_REMOVED */
-#define MBEDTLS_ERR_CAMELLIA_BAD_INPUT_DATA -0x0024 /**< Bad input data. */
+/** Bad input data. */
+#define MBEDTLS_ERR_CAMELLIA_BAD_INPUT_DATA -0x0024
 
-#define MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH -0x0026 /**< Invalid data input length. */
+/** Invalid data input length. */
+#define MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH -0x0026
 
 /* MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED              -0x0027  /**< Camellia hardware accelerator failed. */
+/** Camellia hardware accelerator failed. */
+#define MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED              -0x0027
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ccm.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ccm.h
index d50c6ec9939..ece5a901cb6 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ccm.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ccm.h
@@ -29,13 +29,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -48,45 +42,27 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CCM_H
 #define MBEDTLS_CCM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
-#define MBEDTLS_ERR_CCM_BAD_INPUT       -0x000D /**< Bad input parameters to the function. */
-#define MBEDTLS_ERR_CCM_AUTH_FAILED     -0x000F /**< Authenticated decryption failed. */
+/** Bad input parameters to the function. */
+#define MBEDTLS_ERR_CCM_BAD_INPUT       -0x000D
+/** Authenticated decryption failed. */
+#define MBEDTLS_ERR_CCM_AUTH_FAILED     -0x000F
 
 /* MBEDTLS_ERR_CCM_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_CCM_HW_ACCEL_FAILED -0x0011 /**< CCM hardware accelerator failed. */
+/** CCM hardware accelerator failed. */
+#define MBEDTLS_ERR_CCM_HW_ACCEL_FAILED -0x0011
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/certs.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/certs.h
index 8472a6f38ce..c93c741c7ff 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/certs.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/certs.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_CERTS_H
 #define MBEDTLS_CERTS_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/chacha20.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/chacha20.h
index 8c9c2af6ffb..03b48714780 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/chacha20.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/chacha20.h
@@ -14,13 +14,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,34 +27,13 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CHACHA20_H
 #define MBEDTLS_CHACHA20_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -68,15 +41,18 @@
 #include <stdint.h>
 #include <stddef.h>
 
-#define MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA         -0x0051 /**< Invalid input parameter(s). */
+/** Invalid input parameter(s). */
+#define MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA         -0x0051
 
 /* MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE is deprecated and should not be
  * used. */
-#define MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE    -0x0053 /**< Feature not available. For example, s part of the API is not implemented. */
+/** Feature not available. For example, s part of the API is not implemented. */
+#define MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE    -0x0053
 
 /* MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED        -0x0055  /**< Chacha20 hardware accelerator failed. */
+/** Chacha20 hardware accelerator failed. */
+#define MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED        -0x0055
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h
index 5f6cb6e0306..c4ec7b5f2a9 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h
@@ -14,13 +14,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,43 +27,24 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CHACHAPOLY_H
 #define MBEDTLS_CHACHAPOLY_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 /* for shared error codes */
-#include "poly1305.h"
+#include "mbedtls/poly1305.h"
 
-#define MBEDTLS_ERR_CHACHAPOLY_BAD_STATE            -0x0054 /**< The requested operation is not permitted in the current state. */
-#define MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED          -0x0056 /**< Authenticated decryption failed: data was not authentic. */
+/** The requested operation is not permitted in the current state. */
+#define MBEDTLS_ERR_CHACHAPOLY_BAD_STATE            -0x0054
+/** Authenticated decryption failed: data was not authentic. */
+#define MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED          -0x0056
 
 #ifdef __cplusplus
 extern "C" {
@@ -84,7 +59,7 @@ mbedtls_chachapoly_mode_t;
 
 #if !defined(MBEDTLS_CHACHAPOLY_ALT)
 
-#include "chacha20.h"
+#include "mbedtls/chacha20.h"
 
 typedef struct mbedtls_chachapoly_context
 {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/check_config.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/check_config.h
index 2bbd7a80ffe..396fe7dfc2b 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/check_config.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/check_config.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 /*
@@ -70,16 +43,20 @@
 #endif
 
 /* Fix the config here. Not convenient to put an #ifdef _WIN32 in config.h as
- * it would confuse config.pl. */
+ * it would confuse config.py. */
 #if !defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) && \
     !defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO)
 #define MBEDTLS_PLATFORM_SNPRINTF_ALT
 #endif
+
+#if !defined(MBEDTLS_PLATFORM_VSNPRINTF_ALT) && \
+    !defined(MBEDTLS_PLATFORM_VSNPRINTF_MACRO)
+#define MBEDTLS_PLATFORM_VSNPRINTF_ALT
+#endif
 #endif /* _WIN32 */
 
-#if defined(TARGET_LIKE_MBED) && \
-    ( defined(MBEDTLS_NET_C) || defined(MBEDTLS_TIMING_C) )
-#error "The NET and TIMING modules are not available for mbed OS - please use the network and timing functions provided by mbed OS"
+#if defined(TARGET_LIKE_MBED) && defined(MBEDTLS_NET_C)
+#error "The NET module is not available for mbed OS - please use the network functions provided by Mbed OS"
 #endif
 
 #if defined(MBEDTLS_DEPRECATED_WARNING) && \
@@ -123,6 +100,17 @@
 
 #if defined(MBEDTLS_ECDSA_C) &&            \
     ( !defined(MBEDTLS_ECP_C) ||           \
+      !( defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) ||   \
+         defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) ||   \
+         defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) ) || \
       !defined(MBEDTLS_ASN1_PARSE_C) ||    \
       !defined(MBEDTLS_ASN1_WRITE_C) )
 #error "MBEDTLS_ECDSA_C defined, but not all prerequisites"
@@ -134,14 +122,25 @@
 #endif
 
 #if defined(MBEDTLS_ECP_RESTARTABLE)           && \
-    ( defined(MBEDTLS_ECDH_COMPUTE_SHARED_ALT) || \
+    ( defined(MBEDTLS_USE_PSA_CRYPTO)          || \
+      defined(MBEDTLS_ECDH_COMPUTE_SHARED_ALT) || \
       defined(MBEDTLS_ECDH_GEN_PUBLIC_ALT)     || \
       defined(MBEDTLS_ECDSA_SIGN_ALT)          || \
       defined(MBEDTLS_ECDSA_VERIFY_ALT)        || \
       defined(MBEDTLS_ECDSA_GENKEY_ALT)        || \
       defined(MBEDTLS_ECP_INTERNAL_ALT)        || \
       defined(MBEDTLS_ECP_ALT) )
-#error "MBEDTLS_ECP_RESTARTABLE defined, but it cannot coexist with an alternative ECP implementation"
+#error "MBEDTLS_ECP_RESTARTABLE defined, but it cannot coexist with an alternative or PSA-based ECP implementation"
+#endif
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)           && \
+    ! defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+#error "MBEDTLS_ECP_RESTARTABLE defined, but not MBEDTLS_ECDH_LEGACY_CONTEXT"
+#endif
+
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)           && \
+    defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+#error "MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED defined, but MBEDTLS_ECDH_LEGACY_CONTEXT not disabled"
 #endif
 
 #if defined(MBEDTLS_ECDSA_DETERMINISTIC) && !defined(MBEDTLS_HMAC_DRBG_C)
@@ -169,10 +168,8 @@
     defined(MBEDTLS_ECP_ALT) ||             \
     defined(MBEDTLS_CTR_DRBG_C) ||          \
     defined(MBEDTLS_HMAC_DRBG_C) ||         \
-    defined(MBEDTLS_SHA512_C) ||            \
-    defined(MBEDTLS_SHA256_C) ||            \
     defined(MBEDTLS_ECP_NO_INTERNAL_RNG))
-#error "MBEDTLS_ECP_C requires a DRBG or SHA-2 module unless MBEDTLS_ECP_NO_INTERNAL_RNG is defined or an alternative implementation is used"
+#error "MBEDTLS_ECP_C requires a DRBG module unless MBEDTLS_ECP_NO_INTERNAL_RNG is defined or an alternative implementation is used"
 #endif
 
 #if defined(MBEDTLS_PK_PARSE_C) && !defined(MBEDTLS_ASN1_PARSE_C)
@@ -218,7 +215,7 @@
 #endif
 
 #if defined(MBEDTLS_GCM_C) && (                                        \
-        !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_CAMELLIA_C) )
+        !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_CAMELLIA_C) && !defined(MBEDTLS_ARIA_C) )
 #error "MBEDTLS_GCM_C defined, but not all prerequisites"
 #endif
 
@@ -254,6 +251,10 @@
 #error "MBEDTLS_ECP_NORMALIZE_MXZ_ALT defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_ECP_NO_FALLBACK) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_NO_FALLBACK defined, but no alternative implementation enabled"
+#endif
+
 #if defined(MBEDTLS_HAVEGE_C) && !defined(MBEDTLS_TIMING_C)
 #error "MBEDTLS_HAVEGE_C defined, but not all prerequisites"
 #endif
@@ -267,12 +268,14 @@
 #endif
 
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) &&                 \
-    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) )
+    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_ECDSA_C) ||          \
+      !defined(MBEDTLS_X509_CRT_PARSE_C) )
 #error "MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED defined, but not all prerequisites"
 #endif
 
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) &&                 \
-    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) )
+    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_RSA_C) ||          \
+      !defined(MBEDTLS_X509_CRT_PARSE_C) )
 #error "MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED defined, but not all prerequisites"
 #endif
 
@@ -321,6 +324,14 @@
 #error "MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE) &&              \
+    ( !defined(MBEDTLS_SHA256_C) &&                             \
+      !defined(MBEDTLS_SHA512_C) &&                             \
+      !defined(MBEDTLS_SHA1_C) )
+#error "!MBEDTLS_SSL_KEEP_PEER_CERTIFICATE requires MBEDTLS_SHA512_C, MBEDTLS_SHA256_C or MBEDTLS_SHA1_C"
+#endif
+
 #if defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C) &&                          \
     ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) )
 #error "MBEDTLS_MEMORY_BUFFER_ALLOC_C defined, but not all prerequisites"
@@ -363,6 +374,14 @@
 #error "MBEDTLS_PKCS11_C defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_PKCS11_C)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_PKCS11_C is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_PKCS11_C is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_PKCS11_C */
+
 #if defined(MBEDTLS_PLATFORM_EXIT_ALT) && !defined(MBEDTLS_PLATFORM_C)
 #error "MBEDTLS_PLATFORM_EXIT_ALT defined, but not all prerequisites"
 #endif
@@ -490,10 +509,6 @@
 #error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites"
 #endif
 
-#if defined(MBEDTLS_PLATFORM_STD_CALLOC) && !defined(MBEDTLS_PLATFORM_MEMORY)
-#error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites"
-#endif
-
 #if defined(MBEDTLS_PLATFORM_STD_FREE) && !defined(MBEDTLS_PLATFORM_MEMORY)
 #error "MBEDTLS_PLATFORM_STD_FREE defined, but not all prerequisites"
 #endif
@@ -556,6 +571,54 @@
 #error "MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO and MBEDTLS_PLATFORM_STD_NV_SEED_WRITE cannot be defined simultaneously"
 #endif
 
+#if defined(MBEDTLS_PSA_CRYPTO_C) &&                                    \
+    !( ( ( defined(MBEDTLS_CTR_DRBG_C) || defined(MBEDTLS_HMAC_DRBG_C) ) && \
+         defined(MBEDTLS_ENTROPY_C) ) ||                                \
+       defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) )
+#error "MBEDTLS_PSA_CRYPTO_C defined, but not all prerequisites (missing RNG)"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_SPM) && !defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_PSA_CRYPTO_SPM defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C) &&    \
+    ! ( defined(MBEDTLS_PSA_CRYPTO_C) && \
+        defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) )
+#error "MBEDTLS_PSA_CRYPTO_SE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) &&            \
+    ! defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_PSA_CRYPTO_STORAGE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&      \
+    !( defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) && \
+       defined(MBEDTLS_ENTROPY_NV_SEED) )
+#error "MBEDTLS_PSA_INJECT_ENTROPY defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&              \
+    !defined(MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES)
+#error "MBEDTLS_PSA_INJECT_ENTROPY is not compatible with actual entropy sources"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&              \
+    defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+#error "MBEDTLS_PSA_INJECT_ENTROPY is not compatible with MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG"
+#endif
+
+#if defined(MBEDTLS_PSA_ITS_FILE_C) && \
+    !defined(MBEDTLS_FS_IO)
+#error "MBEDTLS_PSA_ITS_FILE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER) && \
+    defined(MBEDTLS_USE_PSA_CRYPTO)
+#error "MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER defined, but it cannot coexist with MBEDTLS_USE_PSA_CRYPTO."
+#endif
+
 #if defined(MBEDTLS_RSA_C) && ( !defined(MBEDTLS_BIGNUM_C) ||         \
     !defined(MBEDTLS_OID_C) )
 #error "MBEDTLS_RSA_C defined, but not all prerequisites"
@@ -571,6 +634,10 @@
 #error "MBEDTLS_X509_RSASSA_PSS_SUPPORT defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_SHA512_NO_SHA384) && !defined(MBEDTLS_SHA512_C)
+#error "MBEDTLS_SHA512_NO_SHA384 defined without MBEDTLS_SHA512_C"
+#endif
+
 #if defined(MBEDTLS_SSL_PROTO_SSL3) && ( !defined(MBEDTLS_MD5_C) ||     \
     !defined(MBEDTLS_SHA1_C) )
 #error "MBEDTLS_SSL_PROTO_SSL3 defined, but not all prerequisites"
@@ -591,6 +658,11 @@
 #error "MBEDTLS_SSL_PROTO_TLS1_2 defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL) && ( !defined(MBEDTLS_HKDF_C) && \
+    !defined(MBEDTLS_SHA256_C) && !defined(MBEDTLS_SHA512_C) )
+#error "MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL defined, but not all prerequisites"
+#endif
+
 #if (defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) ||  \
      defined(MBEDTLS_SSL_PROTO_TLS1_1) || defined(MBEDTLS_SSL_PROTO_TLS1_2)) && \
     !(defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) ||                          \
@@ -663,6 +735,23 @@
 #error "MBEDTLS_SSL_DTLS_ANTI_REPLAY  defined, but not all prerequisites"
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID) &&                              \
+    ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_CONNECTION_ID  defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)            &&                 \
+    defined(MBEDTLS_SSL_CID_IN_LEN_MAX) &&                 \
+    MBEDTLS_SSL_CID_IN_LEN_MAX > 255
+#error "MBEDTLS_SSL_CID_IN_LEN_MAX too large (max 255)"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)            &&                  \
+    defined(MBEDTLS_SSL_CID_OUT_LEN_MAX) &&                 \
+    MBEDTLS_SSL_CID_OUT_LEN_MAX > 255
+#error "MBEDTLS_SSL_CID_OUT_LEN_MAX too large (max 255)"
+#endif
+
 #if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) &&                              \
     ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) )
 #error "MBEDTLS_SSL_DTLS_BADMAC_LIMIT  defined, but not all prerequisites"
@@ -715,6 +804,10 @@
 #endif
 #undef MBEDTLS_THREADING_IMPL
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO) && !defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_USE_PSA_CRYPTO defined, but not all prerequisites"
+#endif
+
 #if defined(MBEDTLS_VERSION_FEATURES) && !defined(MBEDTLS_VERSION_C)
 #error "MBEDTLS_VERSION_FEATURES defined, but not all prerequisites"
 #endif
@@ -764,6 +857,38 @@
 #error "MBEDTLS_HAVE_INT32/MBEDTLS_HAVE_INT64 and MBEDTLS_HAVE_ASM cannot be defined simultaneously"
 #endif /* (MBEDTLS_HAVE_INT32 || MBEDTLS_HAVE_INT64) && MBEDTLS_HAVE_ASM */
 
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_PROTO_SSL3 is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_PROTO_SSL3 is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_SSL_PROTO_SSL3 */
+
+#if defined(MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO */
+
+#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_HW_RECORD_ACCEL is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_HW_RECORD_ACCEL is deprecated and will be removed in a future version of Mbed TLS"
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP) && ( !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_SRTP defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH) && ( !defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) )
+#error "MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH defined, but not all prerequisites"
+#endif
+
 /*
  * Avoid warning from -pedantic. This is a convenient place for this
  * workaround since this is included by every single file before the
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cipher.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cipher.h
index 1f41b528c48..6d83da8827e 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cipher.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cipher.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,40 +22,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CIPHER_H
 #define MBEDTLS_CIPHER_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
-#include "platform_util.h"
+#include "mbedtls/platform_util.h"
 
 #if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CCM_C) || defined(MBEDTLS_CHACHAPOLY_C)
 #define MBEDTLS_CIPHER_MODE_AEAD
@@ -81,16 +54,24 @@
 #define inline __inline
 #endif
 
-#define MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE  -0x6080  /**< The selected feature is not available. */
-#define MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA       -0x6100  /**< Bad input parameters. */
-#define MBEDTLS_ERR_CIPHER_ALLOC_FAILED         -0x6180  /**< Failed to allocate memory. */
-#define MBEDTLS_ERR_CIPHER_INVALID_PADDING      -0x6200  /**< Input data contains invalid padding and is rejected. */
-#define MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED  -0x6280  /**< Decryption of block requires a full block. */
-#define MBEDTLS_ERR_CIPHER_AUTH_FAILED          -0x6300  /**< Authentication failed (for AEAD modes). */
-#define MBEDTLS_ERR_CIPHER_INVALID_CONTEXT      -0x6380  /**< The context is invalid. For example, because it was freed. */
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE  -0x6080
+/** Bad input parameters. */
+#define MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA       -0x6100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_CIPHER_ALLOC_FAILED         -0x6180
+/** Input data contains invalid padding and is rejected. */
+#define MBEDTLS_ERR_CIPHER_INVALID_PADDING      -0x6200
+/** Decryption of block requires a full block. */
+#define MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED  -0x6280
+/** Authentication failed (for AEAD modes). */
+#define MBEDTLS_ERR_CIPHER_AUTH_FAILED          -0x6300
+/** The context is invalid. For example, because it was freed. */
+#define MBEDTLS_ERR_CIPHER_INVALID_CONTEXT      -0x6380
 
 /* MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED      -0x6400  /**< Cipher hardware accelerator failed. */
+/** Cipher hardware accelerator failed. */
+#define MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED      -0x6400
 
 #define MBEDTLS_CIPHER_VARIABLE_IV_LEN     0x01    /**< Cipher accepts IVs of variable length. */
 #define MBEDTLS_CIPHER_VARIABLE_KEY_LEN    0x02    /**< Cipher accepts keys of variable length. */
@@ -201,21 +182,29 @@ typedef enum {
     MBEDTLS_CIPHER_AES_256_XTS,          /**< AES 256-bit cipher in XTS block mode. */
     MBEDTLS_CIPHER_CHACHA20,             /**< ChaCha20 stream cipher. */
     MBEDTLS_CIPHER_CHACHA20_POLY1305,    /**< ChaCha20-Poly1305 AEAD cipher. */
+    MBEDTLS_CIPHER_AES_128_KW,           /**< AES cipher with 128-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_192_KW,           /**< AES cipher with 192-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_256_KW,           /**< AES cipher with 256-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_128_KWP,          /**< AES cipher with 128-bit NIST KWP mode. */
+    MBEDTLS_CIPHER_AES_192_KWP,          /**< AES cipher with 192-bit NIST KWP mode. */
+    MBEDTLS_CIPHER_AES_256_KWP,          /**< AES cipher with 256-bit NIST KWP mode. */
 } mbedtls_cipher_type_t;
 
 /** Supported cipher modes. */
 typedef enum {
-    MBEDTLS_MODE_NONE = 0,               /**< None. */
-    MBEDTLS_MODE_ECB,                    /**< The ECB cipher mode. */
-    MBEDTLS_MODE_CBC,                    /**< The CBC cipher mode. */
-    MBEDTLS_MODE_CFB,                    /**< The CFB cipher mode. */
-    MBEDTLS_MODE_OFB,                    /**< The OFB cipher mode. */
-    MBEDTLS_MODE_CTR,                    /**< The CTR cipher mode. */
-    MBEDTLS_MODE_GCM,                    /**< The GCM cipher mode. */
-    MBEDTLS_MODE_STREAM,                 /**< The stream cipher mode. */
-    MBEDTLS_MODE_CCM,                    /**< The CCM cipher mode. */
-    MBEDTLS_MODE_XTS,                    /**< The XTS cipher mode. */
+    MBEDTLS_MODE_NONE = 0,               /**< None.                        */
+    MBEDTLS_MODE_ECB,                    /**< The ECB cipher mode.         */
+    MBEDTLS_MODE_CBC,                    /**< The CBC cipher mode.         */
+    MBEDTLS_MODE_CFB,                    /**< The CFB cipher mode.         */
+    MBEDTLS_MODE_OFB,                    /**< The OFB cipher mode.         */
+    MBEDTLS_MODE_CTR,                    /**< The CTR cipher mode.         */
+    MBEDTLS_MODE_GCM,                    /**< The GCM cipher mode.         */
+    MBEDTLS_MODE_STREAM,                 /**< The stream cipher mode.      */
+    MBEDTLS_MODE_CCM,                    /**< The CCM cipher mode.         */
+    MBEDTLS_MODE_XTS,                    /**< The XTS cipher mode.         */
     MBEDTLS_MODE_CHACHAPOLY,             /**< The ChaCha-Poly cipher mode. */
+    MBEDTLS_MODE_KW,                     /**< The SP800-38F KW mode */
+    MBEDTLS_MODE_KWP,                    /**< The SP800-38F KWP mode */
 } mbedtls_cipher_mode_t;
 
 /** Supported cipher padding types. */
@@ -246,10 +235,30 @@ enum {
 };
 
 /** Maximum length of any IV, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_IV_LENGTH defined
+ * in ssl_internal.h. */
 #define MBEDTLS_MAX_IV_LENGTH      16
+
 /** Maximum block size of any cipher, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_BLOCK_LENGTH defined
+ * in ssl_internal.h. */
 #define MBEDTLS_MAX_BLOCK_LENGTH   16
 
+/** Maximum key length, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * For now, only check whether XTS is enabled which uses 64 Byte keys,
+ * and use 32 Bytes as an upper bound for the maximum key length otherwise.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_BLOCK_LENGTH defined
+ * in ssl_internal.h, which however deliberately ignores the case of XTS
+ * since the latter isn't used in SSL/TLS. */
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+#define MBEDTLS_MAX_KEY_LENGTH     64
+#else
+#define MBEDTLS_MAX_KEY_LENGTH     32
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
 /**
  * Base cipher information (opaque struct).
  */
@@ -347,14 +356,32 @@ typedef struct mbedtls_cipher_context_t
     /** CMAC-specific context. */
     mbedtls_cmac_context_t *cmac_ctx;
 #endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    /** Indicates whether the cipher operations should be performed
+     *  by Mbed TLS' own crypto library or an external implementation
+     *  of the PSA Crypto API.
+     *  This is unset if the cipher context was established through
+     *  mbedtls_cipher_setup(), and set if it was established through
+     *  mbedtls_cipher_setup_psa().
+     */
+    unsigned char psa_enabled;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 } mbedtls_cipher_context_t;
 
 /**
- * \brief This function retrieves the list of ciphers supported by the generic
- * cipher module.
+ * \brief This function retrieves the list of ciphers supported
+ *        by the generic cipher module.
+ *
+ *        For any cipher identifier in the returned list, you can
+ *        obtain the corresponding generic cipher information structure
+ *        via mbedtls_cipher_info_from_type(), which can then be used
+ *        to prepare a cipher context via mbedtls_cipher_setup().
  *
- * \return      A statically-allocated array of ciphers. The last entry
- *              is zero.
+ *
+ * \return      A statically-allocated array of cipher identifiers
+ *              of type cipher_type_t. The last entry is zero.
  */
 const int *mbedtls_cipher_list( void );
 
@@ -421,9 +448,8 @@ void mbedtls_cipher_free( mbedtls_cipher_context_t *ctx );
 
 
 /**
- * \brief               This function initializes and fills the cipher-context
- *                      structure with the appropriate values. It also clears
- *                      the structure.
+ * \brief               This function initializes a cipher context for
+ *                      use with the given cipher primitive.
  *
  * \param ctx           The context to initialize. This must be initialized.
  * \param cipher_info   The cipher to use.
@@ -441,6 +467,33 @@ void mbedtls_cipher_free( mbedtls_cipher_context_t *ctx );
 int mbedtls_cipher_setup( mbedtls_cipher_context_t *ctx,
                           const mbedtls_cipher_info_t *cipher_info );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief               This function initializes a cipher context for
+ *                      PSA-based use with the given cipher primitive.
+ *
+ * \note                See #MBEDTLS_USE_PSA_CRYPTO for information on PSA.
+ *
+ * \param ctx           The context to initialize. May not be \c NULL.
+ * \param cipher_info   The cipher to use.
+ * \param taglen        For AEAD ciphers, the length in bytes of the
+ *                      authentication tag to use. Subsequent uses of
+ *                      mbedtls_cipher_auth_encrypt() or
+ *                      mbedtls_cipher_auth_decrypt() must provide
+ *                      the same tag length.
+ *                      For non-AEAD ciphers, the value must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_ALLOC_FAILED if allocation of the
+ *                      cipher-specific context fails.
+ */
+int mbedtls_cipher_setup_psa( mbedtls_cipher_context_t *ctx,
+                              const mbedtls_cipher_info_t *cipher_info,
+                              size_t taglen );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 /**
  * \brief        This function returns the block size of the given cipher.
  *
@@ -663,7 +716,7 @@ int mbedtls_cipher_reset( mbedtls_cipher_context_t *ctx );
  * \param ctx           The generic cipher context. This must be initialized.
  * \param ad            The additional data to use. This must be a readable
  *                      buffer of at least \p ad_len Bytes.
- * \param ad_len        the Length of \p ad Bytes.
+ * \param ad_len        The length of \p ad in Bytes.
  *
  * \return              \c 0 on success.
  * \return              A specific error code on failure.
@@ -706,8 +759,10 @@ int mbedtls_cipher_update_ad( mbedtls_cipher_context_t *ctx,
  *                      unsupported mode for a cipher.
  * \return              A cipher-specific error code on failure.
  */
-int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *input,
-                   size_t ilen, unsigned char *output, size_t *olen );
+int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx,
+                           const unsigned char *input,
+                           size_t ilen, unsigned char *output,
+                           size_t *olen );
 
 /**
  * \brief               The generic cipher finalization function. If data still
@@ -810,30 +865,52 @@ int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx,
                   unsigned char *output, size_t *olen );
 
 #if defined(MBEDTLS_CIPHER_MODE_AEAD)
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_WARNING */
 /**
- * \brief               The generic autenticated encryption (AEAD) function.
+ * \brief               The generic authenticated encryption (AEAD) function.
+ *
+ * \deprecated          Superseded by mbedtls_cipher_auth_encrypt_ext().
+ *
+ * \note                This function only supports AEAD algorithms, not key
+ *                      wrapping algorithms such as NIST_KW; for this, see
+ *                      mbedtls_cipher_auth_encrypt_ext().
  *
  * \param ctx           The generic cipher context. This must be initialized and
- *                      bound to a key.
- * \param iv            The IV to use, or NONCE_COUNTER for CTR-mode ciphers.
- *                      This must be a readable buffer of at least \p iv_len
- *                      Bytes.
- * \param iv_len        The IV length for ciphers with variable-size IV.
- *                      This parameter is discarded by ciphers with fixed-size IV.
+ *                      bound to a key associated with an AEAD algorithm.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and must not be \c NULL.
+ * \param iv_len        The length of the nonce. This must satisfy the
+ *                      constraints imposed by the AEAD cipher used.
  * \param ad            The additional data to authenticate. This must be a
- *                      readable buffer of at least \p ad_len Bytes.
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
  * \param ad_len        The length of \p ad.
  * \param input         The buffer holding the input data. This must be a
- *                      readable buffer of at least \p ilen Bytes.
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
  * \param ilen          The length of the input data.
- * \param output        The buffer for the output data. This must be able to
- *                      hold at least \p ilen Bytes.
- * \param olen          The length of the output data, to be updated with the
- *                      actual number of Bytes written. This must not be
- *                      \c NULL.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p ilen Bytes, and must
+ *                      not be \c NULL.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
  * \param tag           The buffer for the authentication tag. This must be a
- *                      writable buffer of at least \p tag_len Bytes.
- * \param tag_len       The desired length of the authentication tag.
+ *                      writable buffer of at least \p tag_len Bytes. See note
+ *                      below regarding restrictions with PSA-based contexts.
+ * \param tag_len       The desired length of the authentication tag. This
+ *                      must match the constraints imposed by the AEAD cipher
+ *                      used, and in particular must not be \c 0.
+ *
+ * \note                If the context is based on PSA (that is, it was set up
+ *                      with mbedtls_cipher_setup_psa()), then it is required
+ *                      that \c tag == output + ilen. That is, the tag must be
+ *                      appended to the ciphertext as recommended by RFC 5116.
  *
  * \return              \c 0 on success.
  * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
@@ -845,36 +922,53 @@ int mbedtls_cipher_auth_encrypt( mbedtls_cipher_context_t *ctx,
                          const unsigned char *ad, size_t ad_len,
                          const unsigned char *input, size_t ilen,
                          unsigned char *output, size_t *olen,
-                         unsigned char *tag, size_t tag_len );
+                         unsigned char *tag, size_t tag_len )
+                         MBEDTLS_DEPRECATED;
 
 /**
- * \brief               The generic autenticated decryption (AEAD) function.
+ * \brief               The generic authenticated decryption (AEAD) function.
+ *
+ * \deprecated          Superseded by mbedtls_cipher_auth_decrypt_ext().
+ *
+ * \note                This function only supports AEAD algorithms, not key
+ *                      wrapping algorithms such as NIST_KW; for this, see
+ *                      mbedtls_cipher_auth_decrypt_ext().
  *
  * \note                If the data is not authentic, then the output buffer
  *                      is zeroed out to prevent the unauthentic plaintext being
  *                      used, making this interface safer.
  *
  * \param ctx           The generic cipher context. This must be initialized and
- *                      and bound to a key.
- * \param iv            The IV to use, or NONCE_COUNTER for CTR-mode ciphers.
- *                      This must be a readable buffer of at least \p iv_len
- *                      Bytes.
- * \param iv_len        The IV length for ciphers with variable-size IV.
- *                      This parameter is discarded by ciphers with fixed-size IV.
- * \param ad            The additional data to be authenticated. This must be a
- *                      readable buffer of at least \p ad_len Bytes.
+ *                      bound to a key associated with an AEAD algorithm.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and must not be \c NULL.
+ * \param iv_len        The length of the nonce. This must satisfy the
+ *                      constraints imposed by the AEAD cipher used.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
  * \param ad_len        The length of \p ad.
  * \param input         The buffer holding the input data. This must be a
- *                      readable buffer of at least \p ilen Bytes.
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
  * \param ilen          The length of the input data.
- * \param output        The buffer for the output data.
- *                      This must be able to hold at least \p ilen Bytes.
- * \param olen          The length of the output data, to be updated with the
- *                      actual number of Bytes written. This must not be
- *                      \c NULL.
- * \param tag           The buffer holding the authentication tag. This must be
- *                      a readable buffer of at least \p tag_len Bytes.
- * \param tag_len       The length of the authentication tag.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p ilen Bytes, and must
+ *                      not be \c NULL.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag           The buffer for the authentication tag. This must be a
+ *                      readable buffer of at least \p tag_len Bytes. See note
+ *                      below regarding restrictions with PSA-based contexts.
+ * \param tag_len       The length of the authentication tag. This must match
+ *                      the constraints imposed by the AEAD cipher used, and in
+ *                      particular must not be \c 0.
+ *
+ * \note                If the context is based on PSA (that is, it was set up
+ *                      with mbedtls_cipher_setup_psa()), then it is required
+ *                      that \c tag == input + len. That is, the tag must be
+ *                      appended to the ciphertext as recommended by RFC 5116.
  *
  * \return              \c 0 on success.
  * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
@@ -887,9 +981,120 @@ int mbedtls_cipher_auth_decrypt( mbedtls_cipher_context_t *ctx,
                          const unsigned char *ad, size_t ad_len,
                          const unsigned char *input, size_t ilen,
                          unsigned char *output, size_t *olen,
-                         const unsigned char *tag, size_t tag_len );
+                         const unsigned char *tag, size_t tag_len )
+                         MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
 #endif /* MBEDTLS_CIPHER_MODE_AEAD */
 
+#if defined(MBEDTLS_CIPHER_MODE_AEAD) || defined(MBEDTLS_NIST_KW_C)
+/**
+ * \brief               The authenticated encryption (AEAD/NIST_KW) function.
+ *
+ * \note                For AEAD modes, the tag will be appended to the
+ *                      ciphertext, as recommended by RFC 5116.
+ *                      (NIST_KW doesn't have a separate tag.)
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key, with an AEAD algorithm or NIST_KW.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and may be \c NULL if \p
+ *                      iv_len is \c 0.
+ * \param iv_len        The length of the nonce. For AEAD ciphers, this must
+ *                      satisfy the constraints imposed by the cipher used.
+ *                      For NIST_KW, this must be \c 0.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
+ * \param ad_len        The length of \p ad. For NIST_KW, this must be \c 0.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
+ * \param ilen          The length of the input data.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p output_len Bytes, and
+ *                      must not be \c NULL.
+ * \param output_len    The length of the \p output buffer in Bytes. For AEAD
+ *                      ciphers, this must be at least \p ilen + \p tag_len.
+ *                      For NIST_KW, this must be at least \p ilen + 8
+ *                      (rounded up to a multiple of 8 if KWP is used);
+ *                      \p ilen + 15 is always a safe value.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag_len       The desired length of the authentication tag. For AEAD
+ *                      ciphers, this must match the constraints imposed by
+ *                      the cipher used, and in particular must not be \c 0.
+ *                      For NIST_KW, this must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_encrypt_ext( mbedtls_cipher_context_t *ctx,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *ad, size_t ad_len,
+                         const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t output_len,
+                         size_t *olen, size_t tag_len );
+
+/**
+ * \brief               The authenticated encryption (AEAD/NIST_KW) function.
+ *
+ * \note                If the data is not authentic, then the output buffer
+ *                      is zeroed out to prevent the unauthentic plaintext being
+ *                      used, making this interface safer.
+ *
+ * \note                For AEAD modes, the tag must be appended to the
+ *                      ciphertext, as recommended by RFC 5116.
+ *                      (NIST_KW doesn't have a separate tag.)
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key, with an AEAD algorithm or NIST_KW.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and may be \c NULL if \p
+ *                      iv_len is \c 0.
+ * \param iv_len        The length of the nonce. For AEAD ciphers, this must
+ *                      satisfy the constraints imposed by the cipher used.
+ *                      For NIST_KW, this must be \c 0.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
+ * \param ad_len        The length of \p ad. For NIST_KW, this must be \c 0.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
+ * \param ilen          The length of the input data. For AEAD ciphers this
+ *                      must be at least \p tag_len. For NIST_KW this must be
+ *                      at least \c 8.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p output_len Bytes, and
+ *                      may be \c NULL if \p output_len is \c 0.
+ * \param output_len    The length of the \p output buffer in Bytes. For AEAD
+ *                      ciphers, this must be at least \p ilen - \p tag_len.
+ *                      For NIST_KW, this must be at least \p ilen - 8.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag_len       The actual length of the authentication tag. For AEAD
+ *                      ciphers, this must match the constraints imposed by
+ *                      the cipher used, and in particular must not be \c 0.
+ *                      For NIST_KW, this must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_AUTH_FAILED if data is not authentic.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_decrypt_ext( mbedtls_cipher_context_t *ctx,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *ad, size_t ad_len,
+                         const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t output_len,
+                         size_t *olen, size_t tag_len );
+#endif /* MBEDTLS_CIPHER_MODE_AEAD || MBEDTLS_NIST_KW_C */
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h
index 88282ec9d20..2484c01c7a4 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,38 +20,21 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_CIPHER_WRAP_H
 #define MBEDTLS_CIPHER_WRAP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
 
 #ifdef __cplusplus
 extern "C" {
@@ -139,6 +116,29 @@ typedef struct
     const mbedtls_cipher_info_t *info;
 } mbedtls_cipher_definition_t;
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+typedef enum
+{
+    MBEDTLS_CIPHER_PSA_KEY_UNSET = 0,
+    MBEDTLS_CIPHER_PSA_KEY_OWNED, /* Used for PSA-based cipher contexts which */
+                                  /* use raw key material internally imported */
+                                  /* as a volatile key, and which hence need  */
+                                  /* to destroy that key when the context is  */
+                                  /* freed.                                   */
+    MBEDTLS_CIPHER_PSA_KEY_NOT_OWNED, /* Used for PSA-based cipher contexts   */
+                                      /* which use a key provided by the      */
+                                      /* user, and which hence will not be    */
+                                      /* destroyed when the context is freed. */
+} mbedtls_cipher_psa_key_ownership;
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    psa_key_id_t slot;
+    mbedtls_cipher_psa_key_ownership slot_state;
+} mbedtls_cipher_context_psa;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 extern const mbedtls_cipher_definition_t mbedtls_cipher_definitions[];
 
 extern int mbedtls_cipher_supported[];
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cmac.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cmac.h
index 5a7c9b246f0..8934886af74 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cmac.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/cmac.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,46 +21,26 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CMAC_H
 #define MBEDTLS_CMAC_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 /* MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED -0x007A  /**< CMAC hardware accelerator failed. */
+/** CMAC hardware accelerator failed. */
+#define MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED -0x007A
 
 #define MBEDTLS_AES_BLOCK_SIZE          16
 #define MBEDTLS_DES3_BLOCK_SIZE         8
@@ -100,9 +74,23 @@ struct mbedtls_cmac_context_t
 #endif /* !MBEDTLS_CMAC_ALT */
 
 /**
- * \brief               This function sets the CMAC key, and prepares to authenticate
+ * \brief               This function starts a new CMAC computation
+ *                      by setting the CMAC key, and preparing to authenticate
  *                      the input data.
- *                      Must be called with an initialized cipher context.
+ *                      It must be called with an initialized cipher context.
+ *
+ *                      Once this function has completed, data can be supplied
+ *                      to the CMAC computation by calling
+ *                      mbedtls_cipher_cmac_update().
+ *
+ *                      To start a CMAC computation using the same key as a previous
+ *                      CMAC computation, use mbedtls_cipher_cmac_finish().
+ *
+ * \note                When the CMAC implementation is supplied by an alternate
+ *                      implementation (through #MBEDTLS_CMAC_ALT), some ciphers
+ *                      may not be supported by that implementation, and thus
+ *                      return an error. Alternate implementations must support
+ *                      AES-128 and AES-256, and may support AES-192 and 3DES.
  *
  * \param ctx           The cipher context used for the CMAC operation, initialized
  *                      as one of the following types: MBEDTLS_CIPHER_AES_128_ECB,
@@ -122,9 +110,15 @@ int mbedtls_cipher_cmac_starts( mbedtls_cipher_context_t *ctx,
  * \brief               This function feeds an input buffer into an ongoing CMAC
  *                      computation.
  *
- *                      It is called between mbedtls_cipher_cmac_starts() or
- *                      mbedtls_cipher_cmac_reset(), and mbedtls_cipher_cmac_finish().
- *                      Can be called repeatedly.
+ *                      The CMAC computation must have previously been started
+ *                      by calling mbedtls_cipher_cmac_starts() or
+ *                      mbedtls_cipher_cmac_reset().
+ *
+ *                      Call this function as many times as needed to input the
+ *                      data to be authenticated.
+ *                      Once all of the required data has been input,
+ *                      call mbedtls_cipher_cmac_finish() to obtain the result
+ *                      of the CMAC operation.
  *
  * \param ctx           The cipher context used for the CMAC operation.
  * \param input         The buffer holding the input data.
@@ -138,12 +132,13 @@ int mbedtls_cipher_cmac_update( mbedtls_cipher_context_t *ctx,
                                 const unsigned char *input, size_t ilen );
 
 /**
- * \brief               This function finishes the CMAC operation, and writes
- *                      the result to the output buffer.
+ * \brief               This function finishes an ongoing CMAC operation, and
+ *                      writes the result to the output buffer.
  *
- *                      It is called after mbedtls_cipher_cmac_update().
- *                      It can be followed by mbedtls_cipher_cmac_reset() and
- *                      mbedtls_cipher_cmac_update(), or mbedtls_cipher_free().
+ *                      It should be followed either by
+ *                      mbedtls_cipher_cmac_reset(), which starts another CMAC
+ *                      operation with the same key, or mbedtls_cipher_free(),
+ *                      which clears the cipher context.
  *
  * \param ctx           The cipher context used for the CMAC operation.
  * \param output        The output buffer for the CMAC checksum result.
@@ -156,12 +151,14 @@ int mbedtls_cipher_cmac_finish( mbedtls_cipher_context_t *ctx,
                                 unsigned char *output );
 
 /**
- * \brief               This function prepares the authentication of another
- *                      message with the same key as the previous CMAC
- *                      operation.
+ * \brief               This function starts a new CMAC operation with the same
+ *                      key as the previous one.
  *
- *                      It is called after mbedtls_cipher_cmac_finish()
- *                      and before mbedtls_cipher_cmac_update().
+ *                      It should be called after finishing the previous CMAC
+ *                      operation with mbedtls_cipher_cmac_finish().
+ *                      After calling this function,
+ *                      call mbedtls_cipher_cmac_update() to supply the new
+ *                      CMAC operation with data.
  *
  * \param ctx           The cipher context used for the CMAC operation.
  *
@@ -181,6 +178,11 @@ int mbedtls_cipher_cmac_reset( mbedtls_cipher_context_t *ctx );
  *                      The CMAC result is calculated as
  *                      output = generic CMAC(cmac key, input buffer).
  *
+ * \note                When the CMAC implementation is supplied by an alternate
+ *                      implementation (through #MBEDTLS_CMAC_ALT), some ciphers
+ *                      may not be supported by that implementation, and thus
+ *                      return an error. Alternate implementations must support
+ *                      AES-128 and AES-256, and may support AES-192 and 3DES.
  *
  * \param cipher_info   The cipher information.
  * \param key           The CMAC key.
@@ -225,6 +227,13 @@ int mbedtls_aes_cmac_prf_128( const unsigned char *key, size_t key_len,
 /**
  * \brief          The CMAC checkup routine.
  *
+ * \note           In case the CMAC routines are provided by an alternative
+ *                 implementation (i.e. #MBEDTLS_CMAC_ALT is defined), the
+ *                 checkup routine will succeed even if the implementation does
+ *                 not support the less widely used AES-192 or 3DES primitives.
+ *                 The self-test requires at least AES-128 and AES-256 to be
+ *                 supported by the underlying implementation.
+ *
  * \return         \c 0 on success.
  * \return         \c 1 on failure.
  */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h
index 45e5a1cf77c..40177512cab 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,31 +21,10 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -1275,9 +1248,9 @@
 #define POLARSSL_KEY_EXCHANGE_PSK MBEDTLS_KEY_EXCHANGE_PSK
 #define POLARSSL_KEY_EXCHANGE_RSA MBEDTLS_KEY_EXCHANGE_RSA
 #define POLARSSL_KEY_EXCHANGE_RSA_PSK MBEDTLS_KEY_EXCHANGE_RSA_PSK
-#define POLARSSL_KEY_EXCHANGE__SOME__ECDHE_ENABLED MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED
-#define POLARSSL_KEY_EXCHANGE__SOME__PSK_ENABLED MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED
-#define POLARSSL_KEY_EXCHANGE__WITH_CERT__ENABLED MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED
+#define POLARSSL_KEY_EXCHANGE__SOME__ECDHE_ENABLED MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED
+#define POLARSSL_KEY_EXCHANGE__SOME__PSK_ENABLED MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE__WITH_CERT__ENABLED MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED
 #define POLARSSL_KEY_LENGTH_DES MBEDTLS_KEY_LENGTH_DES
 #define POLARSSL_KEY_LENGTH_DES_EDE MBEDTLS_KEY_LENGTH_DES_EDE
 #define POLARSSL_KEY_LENGTH_DES_EDE3 MBEDTLS_KEY_LENGTH_DES_EDE3
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/config.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/config.h
index b1d67f7a931..87b4e9192e7 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/config.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/config.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,27 +22,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CONFIG_H
@@ -251,33 +224,34 @@
 //#define MBEDTLS_PLATFORM_FPRINTF_ALT
 //#define MBEDTLS_PLATFORM_PRINTF_ALT
 //#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+//#define MBEDTLS_PLATFORM_VSNPRINTF_ALT
 //#define MBEDTLS_PLATFORM_NV_SEED_ALT
 //#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT
 
 /**
  * \def MBEDTLS_DEPRECATED_WARNING
  *
- * Mark deprecated functions so that they generate a warning if used.
- * Functions deprecated in one version will usually be removed in the next
- * version. You can enable this to help you prepare the transition to a new
- * major version by making sure your code is not using these functions.
+ * Mark deprecated functions and features so that they generate a warning if
+ * used. Functionality deprecated in one version will usually be removed in the
+ * next version. You can enable this to help you prepare the transition to a
+ * new major version by making sure your code is not using this functionality.
  *
  * This only works with GCC and Clang. With other compilers, you may want to
  * use MBEDTLS_DEPRECATED_REMOVED
  *
- * Uncomment to get warnings on using deprecated functions.
+ * Uncomment to get warnings on using deprecated functions and features.
  */
 //#define MBEDTLS_DEPRECATED_WARNING
 
 /**
  * \def MBEDTLS_DEPRECATED_REMOVED
  *
- * Remove deprecated functions so that they generate an error if used.
- * Functions deprecated in one version will usually be removed in the next
- * version. You can enable this to help you prepare the transition to a new
- * major version by making sure your code is not using these functions.
+ * Remove deprecated functions and features so that they generate an error if
+ * used. Functionality deprecated in one version will usually be removed in the
+ * next version. You can enable this to help you prepare the transition to a
+ * new major version by making sure your code is not using this functionality.
  *
- * Uncomment to get errors on using deprecated functions.
+ * Uncomment to get errors on using deprecated functions and features.
  */
 //#define MBEDTLS_DEPRECATED_REMOVED
 
@@ -319,7 +293,7 @@
  *   the function mbedtls_param_failed() in your application.
  *   See `platform_util.h` for its prototype.
  * - If you enable the macro #MBEDTLS_CHECK_PARAMS_ASSERT, then the
- *   library defines #MBEDTLS_PARAM_FAILED(\c cond) to be `assert(cond)`.
+ *   library defines MBEDTLS_PARAM_FAILED(\c cond) to be `assert(cond)`.
  *   You can still supply an alternative definition of
  *   MBEDTLS_PARAM_FAILED(), which may call `assert`.
  * - If you define a macro MBEDTLS_PARAM_FAILED() before including `config.h`
@@ -510,6 +484,11 @@
  * is still present and it is used for group structures not supported by the
  * alternative.
  *
+ * The original implementation can in addition be removed by setting the
+ * MBEDTLS_ECP_NO_FALLBACK option, in which case any function for which the
+ * corresponding MBEDTLS_ECP__FUNCTION_NAME__ALT macro is defined will not be
+ * able to fallback to curves not supported by the alternative implementation.
+ *
  * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT
  * and implementing the following functions:
  *      unsigned char mbedtls_internal_ecp_grp_capable(
@@ -523,21 +502,28 @@
  * called before and after each point operation and provide an opportunity to
  * implement optimized set up and tear down instructions.
  *
- * Example: In case you uncomment MBEDTLS_ECP_INTERNAL_ALT and
- * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac
- * function, but will use your mbedtls_internal_ecp_double_jac if the group is
- * supported (your mbedtls_internal_ecp_grp_capable function returns 1 when
- * receives it as an argument). If the group is not supported then the original
- * implementation is used. The other functions and the definition of
- * mbedtls_ecp_group and mbedtls_ecp_point will not change, so your
- * implementation of mbedtls_internal_ecp_double_jac and
- * mbedtls_internal_ecp_grp_capable must be compatible with this definition.
+ * Example: In case you set MBEDTLS_ECP_INTERNAL_ALT and
+ * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac()
+ * function, but will use your mbedtls_internal_ecp_double_jac() if the group
+ * for the operation is supported by your implementation (i.e. your
+ * mbedtls_internal_ecp_grp_capable() function returns 1 for this group). If the
+ * group is not supported by your implementation, then the original mbed TLS
+ * implementation of ecp_double_jac() is used instead, unless this fallback
+ * behaviour is disabled by setting MBEDTLS_ECP_NO_FALLBACK (in which case
+ * ecp_double_jac() will return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE).
+ *
+ * The function prototypes and the definition of mbedtls_ecp_group and
+ * mbedtls_ecp_point will not change based on MBEDTLS_ECP_INTERNAL_ALT, so your
+ * implementation of mbedtls_internal_ecp__function_name__ must be compatible
+ * with their definitions.
  *
  * Uncomment a macro to enable alternate implementation of the corresponding
  * function.
  */
 /* Required for all the functions in this section */
 //#define MBEDTLS_ECP_INTERNAL_ALT
+/* Turn off software fallback for curves not supported in hardware */
+//#define MBEDTLS_ECP_NO_FALLBACK
 /* Support for Weierstrass curves with Jacobi representation */
 //#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
 //#define MBEDTLS_ECP_ADD_MIXED_ALT
@@ -549,42 +535,6 @@
 //#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT
 //#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT
 
-/**
- * \def MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
- *
- * Enable testing of the constant-flow nature of some sensitive functions with
- * clang's MemorySanitizer. This causes some existing tests to also test
- * this non-functional property of the code under test.
- *
- * This setting requires compiling with clang -fsanitize=memory. The test
- * suites can then be run normally.
- *
- * \warning This macro is only used for extended testing; it is not considered
- * part of the library's API, so it may change or disappear at any time.
- *
- * Uncomment to enable testing of the constant-flow nature of selected code.
- */
-//#define MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
-
-/**
- * \def MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
- *
- * Enable testing of the constant-flow nature of some sensitive functions with
- * valgrind's memcheck tool. This causes some existing tests to also test
- * this non-functional property of the code under test.
- *
- * This setting requires valgrind headers for building, and is only useful for
- * testing if the tests suites are run with valgrind's memcheck. This can be
- * done for an individual test suite with 'valgrind ./test_suite_xxx', or when
- * using CMake, this can be done for all test suites with 'make memcheck'.
- *
- * \warning This macro is only used for extended testing; it is not considered
- * part of the library's API, so it may change or disappear at any time.
- *
- * Uncomment to enable testing of the constant-flow nature of selected code.
- */
-//#define MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
-
 /**
  * \def MBEDTLS_TEST_NULL_ENTROPY
  *
@@ -666,6 +616,29 @@
  */
 //#define MBEDTLS_CAMELLIA_SMALL_MEMORY
 
+/**
+ * \def MBEDTLS_CHECK_RETURN_WARNING
+ *
+ * If this macro is defined, emit a compile-time warning if application code
+ * calls a function without checking its return value, but the return value
+ * should generally be checked in portable applications.
+ *
+ * This is only supported on platforms where #MBEDTLS_CHECK_RETURN is
+ * implemented. Otherwise this option has no effect.
+ *
+ * Uncomment to get warnings on using fallible functions without checking
+ * their return value.
+ *
+ * \note  This feature is a work in progress.
+ *        Warnings will be added to more functions in the future.
+ *
+ * \note  A few functions are considered critical, and ignoring the return
+ *        value of these functions will trigger a warning even if this
+ *        macro is not defined. To completely disable return value check
+ *        warnings, define #MBEDTLS_CHECK_RETURN with an empty expansion.
+ */
+//#define MBEDTLS_CHECK_RETURN_WARNING
+
 /**
  * \def MBEDTLS_CIPHER_MODE_CBC
  *
@@ -816,6 +789,7 @@
  *
  * Comment macros to disable the curve and functions for it
  */
+/* Short Weierstrass curves (supporting ECP, ECDH, ECDSA) */
 #define MBEDTLS_ECP_DP_SECP192R1_ENABLED
 #define MBEDTLS_ECP_DP_SECP224R1_ENABLED
 #define MBEDTLS_ECP_DP_SECP256R1_ENABLED
@@ -827,6 +801,7 @@
 #define MBEDTLS_ECP_DP_BP256R1_ENABLED
 #define MBEDTLS_ECP_DP_BP384R1_ENABLED
 #define MBEDTLS_ECP_DP_BP512R1_ENABLED
+/* Montgomery curves (supporting ECP) */
 #define MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #define MBEDTLS_ECP_DP_CURVE448_ENABLED
 
@@ -849,11 +824,11 @@
  * against some side-channel attacks.
  *
  * This protection introduces a dependency of the ECP module on one of the
- * DRBG or SHA modules (HMAC-DRBG, CTR-DRBG, SHA-512 or SHA-256.) For very
- * constrained applications that don't require this protection (for example,
- * because you're only doing signature verification, so not manipulating any
- * secret, or because local/physical side-channel attacks are outside your
- * threat model), it might be desirable to get rid of that dependency.
+ * DRBG modules. For very constrained implementations that don't require this
+ * protection (for example, because you're only doing signature verification,
+ * so not manipulating any secret, or because local/physical side-channel
+ * attacks are outside your threat model), it might be desirable to get rid of
+ * that dependency.
  *
  * \warning Enabling this option makes some uses of ECP vulnerable to some
  * side-channel attacks. Only enable it if you know that's not a problem for
@@ -883,10 +858,39 @@
  *
  * \note  This option only works with the default software implementation of
  *        elliptic curve functionality. It is incompatible with
- *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT and MBEDTLS_ECDSA_XXX_ALT.
+ *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT, MBEDTLS_ECDSA_XXX_ALT
+ *        and MBEDTLS_ECDH_LEGACY_CONTEXT.
  */
 //#define MBEDTLS_ECP_RESTARTABLE
 
+/**
+ * \def MBEDTLS_ECDH_LEGACY_CONTEXT
+ *
+ * Use a backward compatible ECDH context.
+ *
+ * Mbed TLS supports two formats for ECDH contexts (#mbedtls_ecdh_context
+ * defined in `ecdh.h`). For most applications, the choice of format makes
+ * no difference, since all library functions can work with either format,
+ * except that the new format is incompatible with MBEDTLS_ECP_RESTARTABLE.
+
+ * The new format used when this option is disabled is smaller
+ * (56 bytes on a 32-bit platform). In future versions of the library, it
+ * will support alternative implementations of ECDH operations.
+ * The new format is incompatible with applications that access
+ * context fields directly and with restartable ECP operations.
+ *
+ * Define this macro if you enable MBEDTLS_ECP_RESTARTABLE or if you
+ * want to access ECDH context fields directly. Otherwise you should
+ * comment out this macro definition.
+ *
+ * This option has no effect if #MBEDTLS_ECDH_C is not enabled.
+ *
+ * \note This configuration option is experimental. Future versions of the
+ *       library may modify the way the ECDH context layout is configured
+ *       and may modify the layout of the new context type.
+ */
+#define MBEDTLS_ECDH_LEGACY_CONTEXT
+
 /**
  * \def MBEDTLS_ECDSA_DETERMINISTIC
  *
@@ -895,7 +899,7 @@
  * may result in a compromise of the long-term signing key. This is avoided by
  * the deterministic variant.
  *
- * Requires: MBEDTLS_HMAC_DRBG_C
+ * Requires: MBEDTLS_HMAC_DRBG_C, MBEDTLS_ECDSA_C
  *
  * Comment this macro to disable deterministic ECDSA.
  */
@@ -1114,7 +1118,7 @@
  *
  * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -1138,7 +1142,7 @@
  *
  * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -1289,6 +1293,18 @@
  */
 //#define MBEDTLS_ENTROPY_NV_SEED
 
+/* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+ *
+ * Enable key identifiers that encode a key owner identifier.
+ *
+ * The owner of a key is identified by a value of type ::mbedtls_key_owner_id_t
+ * which is currently hard-coded to be int32_t.
+ *
+ * Note that this option is meant for internal use only and may be removed
+ * without notice. It is incompatible with MBEDTLS_USE_PSA_CRYPTO.
+ */
+//#define MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+
 /**
  * \def MBEDTLS_MEMORY_DEBUG
  *
@@ -1345,6 +1361,114 @@
  */
 #define MBEDTLS_PKCS1_V21
 
+/** \def MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS
+ *
+ * Enable support for platform built-in keys. If you enable this feature,
+ * you must implement the function mbedtls_psa_platform_get_builtin_key().
+ * See the documentation of that function for more information.
+ *
+ * Built-in keys are typically derived from a hardware unique key or
+ * stored in a secure element.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C.
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS
+
+/** \def MBEDTLS_PSA_CRYPTO_CLIENT
+ *
+ * Enable support for PSA crypto client.
+ *
+ * \note This option allows to include the code necessary for a PSA
+ *       crypto client when the PSA crypto implementation is not included in
+ *       the library (MBEDTLS_PSA_CRYPTO_C disabled). The code included is the
+ *       code to set and get PSA key attributes.
+ *       The development of PSA drivers partially relying on the library to
+ *       fulfill the hardware gaps is another possible usage of this option.
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_CLIENT
+
+/** \def MBEDTLS_PSA_CRYPTO_DRIVERS
+ *
+ * Enable support for the experimental PSA crypto driver interface.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_DRIVERS
+
+/** \def MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG
+ *
+ * Make the PSA Crypto module use an external random generator provided
+ * by a driver, instead of Mbed TLS's entropy and DRBG modules.
+ *
+ * \note This random generator must deliver random numbers with cryptographic
+ *       quality and high performance. It must supply unpredictable numbers
+ *       with a uniform distribution. The implementation of this function
+ *       is responsible for ensuring that the random generator is seeded
+ *       with sufficient entropy. If you have a hardware TRNG which is slow
+ *       or delivers non-uniform output, declare it as an entropy source
+ *       with mbedtls_entropy_add_source() instead of enabling this option.
+ *
+ * If you enable this option, you must configure the type
+ * ::mbedtls_psa_external_random_context_t in psa/crypto_platform.h
+ * and define a function called mbedtls_psa_external_get_random()
+ * with the following prototype:
+ * ```
+ * psa_status_t mbedtls_psa_external_get_random(
+ *     mbedtls_psa_external_random_context_t *context,
+ *     uint8_t *output, size_t output_size, size_t *output_length);
+ * );
+ * ```
+ * The \c context value is initialized to 0 before the first call.
+ * The function must fill the \c output buffer with \p output_size bytes
+ * of random data and set \c *output_length to \p output_size.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ * \warning If you enable this option, code that uses the PSA cryptography
+ *          interface will not use any of the entropy sources set up for
+ *          the entropy module, nor the NV seed that MBEDTLS_ENTROPY_NV_SEED
+ *          enables.
+ *
+ * \note This option is experimental and may be removed without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_SPM
+ *
+ * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is built for SPM (Secure
+ * Partition Manager) integration which separates the code into two parts: a
+ * NSPE (Non-Secure Process Environment) and an SPE (Secure Process
+ * Environment).
+ *
+ * Module:  library/psa_crypto.c
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ */
+//#define MBEDTLS_PSA_CRYPTO_SPM
+
+/**
+ * \def MBEDTLS_PSA_INJECT_ENTROPY
+ *
+ * Enable support for entropy injection at first boot. This feature is
+ * required on systems that do not have a built-in entropy source (TRNG).
+ * This feature is currently not supported on systems that have a built-in
+ * entropy source.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_STORAGE_C, MBEDTLS_ENTROPY_NV_SEED
+ *
+ */
+//#define MBEDTLS_PSA_INJECT_ENTROPY
+
 /**
  * \def MBEDTLS_RSA_NO_CRT
  *
@@ -1379,6 +1503,28 @@
  */
 //#define MBEDTLS_SHA256_SMALLER
 
+/**
+ * \def MBEDTLS_SHA512_SMALLER
+ *
+ * Enable an implementation of SHA-512 that has lower ROM footprint but also
+ * lower performance.
+ *
+ * Uncomment to enable the smaller implementation of SHA512.
+ */
+//#define MBEDTLS_SHA512_SMALLER
+
+/**
+ * \def MBEDTLS_SHA512_NO_SHA384
+ *
+ * Disable the SHA-384 option of the SHA-512 module. Use this to save some
+ * code size on devices that don't use SHA-384.
+ *
+ * Requires: MBEDTLS_SHA512_C
+ *
+ * Uncomment to disable SHA-384
+ */
+//#define MBEDTLS_SHA512_NO_SHA384
+
 /**
  * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
  *
@@ -1393,6 +1539,48 @@
  */
 #define MBEDTLS_SSL_ALL_ALERT_MESSAGES
 
+/**
+ * \def MBEDTLS_SSL_RECORD_CHECKING
+ *
+ * Enable the function mbedtls_ssl_check_record() which can be used to check
+ * the validity and authenticity of an incoming record, to verify that it has
+ * not been seen before. These checks are performed without modifying the
+ * externally visible state of the SSL context.
+ *
+ * See mbedtls_ssl_check_record() for more information.
+ *
+ * Uncomment to enable support for record checking.
+ */
+#define MBEDTLS_SSL_RECORD_CHECKING
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CONNECTION_ID
+ *
+ * Enable support for the DTLS Connection ID extension
+ * (version draft-ietf-tls-dtls-connection-id-05,
+ * https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05)
+ * which allows to identify DTLS connections across changes
+ * in the underlying transport.
+ *
+ * Setting this option enables the SSL APIs `mbedtls_ssl_set_cid()`,
+ * `mbedtls_ssl_get_peer_cid()` and `mbedtls_ssl_conf_cid()`.
+ * See the corresponding documentation for more information.
+ *
+ * \warning The Connection ID extension is still in draft state.
+ *          We make no stability promises for the availability
+ *          or the shape of the API controlled by this option.
+ *
+ * The maximum lengths of outgoing and incoming CIDs can be configured
+ * through the options
+ * - MBEDTLS_SSL_CID_OUT_LEN_MAX
+ * - MBEDTLS_SSL_CID_IN_LEN_MAX.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment to enable the Connection ID extension.
+ */
+//#define MBEDTLS_SSL_DTLS_CONNECTION_ID
+
 /**
  * \def MBEDTLS_SSL_ASYNC_PRIVATE
  *
@@ -1404,6 +1592,33 @@
  */
 //#define MBEDTLS_SSL_ASYNC_PRIVATE
 
+/**
+ * \def MBEDTLS_SSL_CONTEXT_SERIALIZATION
+ *
+ * Enable serialization of the TLS context structures, through use of the
+ * functions mbedtls_ssl_context_save() and mbedtls_ssl_context_load().
+ *
+ * This pair of functions allows one side of a connection to serialize the
+ * context associated with the connection, then free or re-use that context
+ * while the serialized state is persisted elsewhere, and finally deserialize
+ * that state to a live context for resuming read/write operations on the
+ * connection. From a protocol perspective, the state of the connection is
+ * unaffected, in particular this is entirely transparent to the peer.
+ *
+ * Note: this is distinct from TLS session resumption, which is part of the
+ * protocol and fully visible by the peer. TLS session resumption enables
+ * establishing new connections associated to a saved session with shorter,
+ * lighter handshakes, while context serialization is a local optimization in
+ * handling a single, potentially long-lived connection.
+ *
+ * Enabling these APIs makes some SSL structures larger, as 64 extra bytes are
+ * saved after the handshake to allow for more efficient serialization, so if
+ * you don't need this feature you'll save RAM by disabling it.
+ *
+ * Comment to disable the context serialization APIs.
+ */
+#define MBEDTLS_SSL_CONTEXT_SERIALIZATION
+
 /**
  * \def MBEDTLS_SSL_DEBUG_ALL
  *
@@ -1440,8 +1655,8 @@
 
 /** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
  *
- * Enable support for Extended Master Secret, aka Session Hash
- * (draft-ietf-tls-session-hash-02).
+ * Enable support for RFC 7627: Session Hash and Extended Master Secret
+ * Extension.
  *
  * This was introduced as "the proper fix" to the Triple Handshake familiy of
  * attacks, but it is recommended to always use it (even if you disable
@@ -1459,7 +1674,8 @@
 /**
  * \def MBEDTLS_SSL_FALLBACK_SCSV
  *
- * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ * Enable support for RFC 7507: Fallback Signaling Cipher Suite Value (SCSV)
+ * for Preventing Protocol Downgrade Attacks.
  *
  * For servers, it is recommended to always enable this, unless you support
  * only one version of TLS, or know for sure that none of your clients
@@ -1473,12 +1689,37 @@
  */
 #define MBEDTLS_SSL_FALLBACK_SCSV
 
+/**
+ * \def MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+ *
+ * This option controls the availability of the API mbedtls_ssl_get_peer_cert()
+ * giving access to the peer's certificate after completion of the handshake.
+ *
+ * Unless you need mbedtls_ssl_peer_cert() in your application, it is
+ * recommended to disable this option for reduced RAM usage.
+ *
+ * \note If this option is disabled, mbedtls_ssl_get_peer_cert() is still
+ *       defined, but always returns \c NULL.
+ *
+ * \note This option has no influence on the protection against the
+ *       triple handshake attack. Even if it is disabled, Mbed TLS will
+ *       still ensure that certificates do not change during renegotiation,
+ *       for exaple by keeping a hash of the peer's certificate.
+ *
+ * Comment this macro to disable storing the peer's certificate
+ * after the handshake.
+ */
+#define MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+
 /**
  * \def MBEDTLS_SSL_HW_RECORD_ACCEL
  *
  * Enable hooking functions in SSL module for hardware acceleration of
  * individual records.
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Uncomment this macro to enable hooking functions.
  */
 //#define MBEDTLS_SSL_HW_RECORD_ACCEL
@@ -1523,6 +1764,9 @@
  * Enable support for receiving and parsing SSLv2 Client Hello messages for the
  * SSL Server module (MBEDTLS_SSL_SRV_C).
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Uncomment this macro to enable support for SSLv2 Client Hello messages.
  */
 //#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
@@ -1554,6 +1798,9 @@
  * Requires: MBEDTLS_MD5_C
  *           MBEDTLS_SHA1_C
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Comment this macro to disable support for SSL 3.0
  */
 //#define MBEDTLS_SSL_PROTO_SSL3
@@ -1594,6 +1841,25 @@
  */
 #define MBEDTLS_SSL_PROTO_TLS1_2
 
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL
+ *
+ * This macro is used to selectively enable experimental parts
+ * of the code that contribute to the ongoing development of
+ * the prototype TLS 1.3 and DTLS 1.3 implementation, and provide
+ * no other purpose.
+ *
+ * \warning TLS 1.3 and DTLS 1.3 aren't yet supported in Mbed TLS,
+ *          and no feature exposed through this macro is part of the
+ *          public API. In particular, features under the control
+ *          of this macro are experimental and don't come with any
+ *          stability guarantees.
+ *
+ * Uncomment this macro to enable experimental and partial
+ * functionality specific to TLS 1.3.
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL
+
 /**
  * \def MBEDTLS_SSL_PROTO_DTLS
  *
@@ -1651,6 +1917,37 @@
  */
 #define MBEDTLS_SSL_DTLS_HELLO_VERIFY
 
+/**
+ * \def MBEDTLS_SSL_DTLS_SRTP
+ *
+ * Enable support for negotiation of DTLS-SRTP (RFC 5764)
+ * through the use_srtp extension.
+ *
+ * \note This feature provides the minimum functionality required
+ * to negotiate the use of DTLS-SRTP and to allow the derivation of
+ * the associated SRTP packet protection key material.
+ * In particular, the SRTP packet protection itself, as well as the
+ * demultiplexing of RTP and DTLS packets at the datagram layer
+ * (see Section 5 of RFC 5764), are not handled by this feature.
+ * Instead, after successful completion of a handshake negotiating
+ * the use of DTLS-SRTP, the extended key exporter API
+ * mbedtls_ssl_conf_export_keys_ext_cb() should be used to implement
+ * the key exporter described in Section 4.2 of RFC 5764 and RFC 5705
+ * (this is implemented in the SSL example programs).
+ * The resulting key should then be passed to an SRTP stack.
+ *
+ * Setting this option enables the runtime API
+ * mbedtls_ssl_conf_dtls_srtp_protection_profiles()
+ * through which the supported DTLS-SRTP protection
+ * profiles can be configured. You must call this API at
+ * runtime if you wish to negotiate the use of DTLS-SRTP.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment this to enable support for use_srtp extension.
+ */
+//#define MBEDTLS_SSL_DTLS_SRTP
+
 /**
  * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
  *
@@ -1727,8 +2024,8 @@
  *
  * Fallback to old (pre-2.7), non-conforming implementation of the truncated
  * HMAC extension which also truncates the HMAC key. Note that this option is
- * only meant for a transitory upgrade period and is likely to be removed in
- * a future version of the library.
+ * only meant for a transitory upgrade period and will be removed in a future
+ * version of the library.
  *
  * \warning The old implementation is non-compliant and has a security weakness
  *          (2^80 brute force attack on the HMAC key used for a single,
@@ -1737,7 +2034,7 @@
  *          bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use
  *          the fixed implementation yet (pre-2.7).
  *
- * \deprecated This option is deprecated and will likely be removed in a
+ * \deprecated This option is deprecated and will be removed in a
  *             future version of Mbed TLS.
  *
  * Uncomment to fallback to old, non-compliant truncated HMAC implementation.
@@ -1746,6 +2043,52 @@
  */
 //#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
 
+/**
+ * \def MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+ *
+ * When this option is enabled, the SSL buffer will be resized automatically
+ * based on the negotiated maximum fragment length in each direction.
+ *
+ * Requires: MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ */
+//#define MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+
+/**
+ * \def MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
+ *
+ * Enable testing of the constant-flow nature of some sensitive functions with
+ * clang's MemorySanitizer. This causes some existing tests to also test
+ * this non-functional property of the code under test.
+ *
+ * This setting requires compiling with clang -fsanitize=memory. The test
+ * suites can then be run normally.
+ *
+ * \warning This macro is only used for extended testing; it is not considered
+ * part of the library's API, so it may change or disappear at any time.
+ *
+ * Uncomment to enable testing of the constant-flow nature of selected code.
+ */
+//#define MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
+
+/**
+ * \def MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
+ *
+ * Enable testing of the constant-flow nature of some sensitive functions with
+ * valgrind's memcheck tool. This causes some existing tests to also test
+ * this non-functional property of the code under test.
+ *
+ * This setting requires valgrind headers for building, and is only useful for
+ * testing if the tests suites are run with valgrind's memcheck. This can be
+ * done for an individual test suite with 'valgrind ./test_suite_xxx', or when
+ * using CMake, this can be done for all test suites with 'make memcheck'.
+ *
+ * \warning This macro is only used for extended testing; it is not considered
+ * part of the library's API, so it may change or disappear at any time.
+ *
+ * Uncomment to enable testing of the constant-flow nature of selected code.
+ */
+//#define MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
+
 /**
  * \def MBEDTLS_TEST_HOOKS
  *
@@ -1759,6 +2102,9 @@
  * risk of vulnerabilities, and more gadgets that can make exploits easier.
  * Therefore this feature must never be enabled in production.
  *
+ * See `docs/architecture/testing/mbed-crypto-invasive-testing.md` for more
+ * information.
+ *
  * Uncomment to enable invasive tests.
  */
 //#define MBEDTLS_TEST_HOOKS
@@ -1785,6 +2131,49 @@
  */
 //#define MBEDTLS_THREADING_PTHREAD
 
+/**
+ * \def MBEDTLS_USE_PSA_CRYPTO
+ *
+ * Make the X.509 and TLS library use PSA for cryptographic operations, and
+ * enable new APIs for using keys handled by PSA Crypto.
+ *
+ * \note Development of this option is currently in progress, and parts of Mbed
+ * TLS's X.509 and TLS modules are not ported to PSA yet. However, these parts
+ * will still continue to work as usual, so enabling this option should not
+ * break backwards compatibility.
+ *
+ * \note See docs/use-psa-crypto.md for a complete description of what this
+ * option currently does, and of parts that are not affected by it so far.
+ *
+ * \warning This option enables new Mbed TLS APIs which are currently
+ * considered experimental and may change in incompatible ways at any time.
+ * That is, the APIs enabled by this option are not covered by the usual
+ * promises of API stability.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C.
+ *
+ * Uncomment this to enable internal use of PSA Crypto and new associated APIs.
+ */
+//#define MBEDTLS_USE_PSA_CRYPTO
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_CONFIG
+ *
+ * This setting allows support for cryptographic mechanisms through the PSA
+ * API to be configured separately from support through the mbedtls API.
+ *
+ * Uncomment this to enable use of PSA Crypto configuration settings which
+ * can be found in include/psa/crypto_config.h.
+ *
+ * If you enable this option and write your own configuration file, you must
+ * include mbedtls/config_psa.h in your configuration file. The default
+ * provided mbedtls/config.h contains the necessary inclusion.
+ *
+ * This feature is still experimental and is not ready for production since
+ * it is not completed.
+ */
+//#define MBEDTLS_PSA_CRYPTO_CONFIG
+
 /**
  * \def MBEDTLS_VERSION_FEATURES
  *
@@ -1820,6 +2209,25 @@
  */
 //#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
 
+/**
+ * \def MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+ *
+ * If set, this enables the X.509 API `mbedtls_x509_crt_verify_with_ca_cb()`
+ * and the SSL API `mbedtls_ssl_conf_ca_cb()` which allow users to configure
+ * the set of trusted certificates through a callback instead of a linked
+ * list.
+ *
+ * This is useful for example in environments where a large number of trusted
+ * certificates is present and storing them in a linked list isn't efficient
+ * enough, or when the set of trusted certificates changes frequently.
+ *
+ * See the documentation of `mbedtls_x509_crt_verify_with_ca_cb()` and
+ * `mbedtls_ssl_conf_ca_cb()` for more information.
+ *
+ * Uncomment to enable trusted certificate callbacks.
+ */
+//#define MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+
 /**
  * \def MBEDTLS_X509_CHECK_KEY_USAGE
  *
@@ -2244,6 +2652,11 @@
  * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
  * ciphers.
  *
+ * \note When #MBEDTLS_CMAC_ALT is active, meaning that the underlying
+ *       implementation of the CMAC algorithm is provided by an alternate
+ *       implementation, that alternate implementation may opt to not support
+ *       AES-192 or 3DES as underlying block ciphers for the CMAC operation.
+ *
  * Module:  library/cmac.c
  *
  * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
@@ -2362,7 +2775,9 @@
  * This module is used by the following key exchanges:
  *      ECDHE-ECDSA
  *
- * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C,
+ *           and at least one MBEDTLS_ECP_DP_XXX_ENABLED for a
+ *           short Weierstrass curve.
  */
 #define MBEDTLS_ECDSA_C
 
@@ -2428,11 +2843,11 @@
 /**
  * \def MBEDTLS_GCM_C
  *
- * Enable the Galois/Counter Mode (GCM) for AES.
+ * Enable the Galois/Counter Mode (GCM).
  *
  * Module:  library/gcm.c
  *
- * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C or MBEDTLS_ARIA_C
  *
  * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
  * requisites are enabled as well.
@@ -2739,7 +3154,10 @@
 /**
  * \def MBEDTLS_PKCS11_C
  *
- * Enable wrapper for PKCS#11 smartcard support.
+ * Enable wrapper for PKCS#11 smartcard support via the pkcs11-helper library.
+ *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
  *
  * Module:  library/pkcs11.c
  * Caller:  library/pk.c
@@ -2797,6 +3215,61 @@
  */
 #define MBEDTLS_POLY1305_C
 
+/**
+ * \def MBEDTLS_PSA_CRYPTO_C
+ *
+ * Enable the Platform Security Architecture cryptography API.
+ *
+ * Module:  library/psa_crypto.c
+ *
+ * Requires: either MBEDTLS_CTR_DRBG_C and MBEDTLS_ENTROPY_C,
+ *           or MBEDTLS_HMAC_DRBG_C and MBEDTLS_ENTROPY_C,
+ *           or MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG.
+ *
+ */
+#define MBEDTLS_PSA_CRYPTO_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_SE_C
+ *
+ * Enable secure element support in the Platform Security Architecture
+ * cryptography API.
+ *
+ * \warning This feature is not yet suitable for production. It is provided
+ *          for API evaluation and testing purposes only.
+ *
+ * Module:  library/psa_crypto_se.c
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C, MBEDTLS_PSA_CRYPTO_STORAGE_C
+ *
+ */
+//#define MBEDTLS_PSA_CRYPTO_SE_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_STORAGE_C
+ *
+ * Enable the Platform Security Architecture persistent key storage.
+ *
+ * Module:  library/psa_crypto_storage.c
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C,
+ *           either MBEDTLS_PSA_ITS_FILE_C or a native implementation of
+ *           the PSA ITS interface
+ */
+#define MBEDTLS_PSA_CRYPTO_STORAGE_C
+
+/**
+ * \def MBEDTLS_PSA_ITS_FILE_C
+ *
+ * Enable the emulation of the Platform Security Architecture
+ * Internal Trusted Storage (PSA ITS) over files.
+ *
+ * Module:  library/psa_its_file.c
+ *
+ * Requires: MBEDTLS_FS_IO
+ */
+#define MBEDTLS_PSA_ITS_FILE_C
+
 /**
  * \def MBEDTLS_RIPEMD160_C
  *
@@ -3160,8 +3633,8 @@
 //#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT      384 /**< Maximum size of (re)seed buffer */
 
 /* ECP options */
-//#define MBEDTLS_ECP_MAX_BITS             521 /**< Maximum bit size of groups */
-//#define MBEDTLS_ECP_WINDOW_SIZE            6 /**< Maximum window size used */
+//#define MBEDTLS_ECP_MAX_BITS             521 /**< Maximum bit size of groups. Normally determined automatically from the configured curves. */
+//#define MBEDTLS_ECP_WINDOW_SIZE            4 /**< Maximum window size used */
 //#define MBEDTLS_ECP_FIXED_POINT_OPTIM      1 /**< Enable fixed-point speed-up */
 
 /* Entropy options */
@@ -3199,6 +3672,7 @@
 //#define MBEDTLS_PLATFORM_PRINTF_MACRO        printf /**< Default printf macro to use, can be undefined */
 /* Note: your snprintf must correctly zero-terminate the buffer! */
 //#define MBEDTLS_PLATFORM_SNPRINTF_MACRO    snprintf /**< Default snprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_VSNPRINTF_MACRO    vsnprintf /**< Default vsnprintf macro to use, can be undefined */
 //#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO   mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
 //#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO  mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
 
@@ -3238,6 +3712,53 @@
  */
 //#define MBEDTLS_PARAM_FAILED( cond )               assert( cond )
 
+/** \def MBEDTLS_CHECK_RETURN
+ *
+ * This macro is used at the beginning of the declaration of a function
+ * to indicate that its return value should be checked. It should
+ * instruct the compiler to emit a warning or an error if the function
+ * is called without checking its return value.
+ *
+ * There is a default implementation for popular compilers in platform_util.h.
+ * You can override the default implementation by defining your own here.
+ *
+ * If the implementation here is empty, this will effectively disable the
+ * checking of functions' return values.
+ */
+//#define MBEDTLS_CHECK_RETURN __attribute__((__warn_unused_result__))
+
+/** \def MBEDTLS_IGNORE_RETURN
+ *
+ * This macro requires one argument, which should be a C function call.
+ * If that function call would cause a #MBEDTLS_CHECK_RETURN warning, this
+ * warning is suppressed.
+ */
+//#define MBEDTLS_IGNORE_RETURN( result ) ((void) !(result))
+
+/* PSA options */
+/**
+ * Use HMAC_DRBG with the specified hash algorithm for HMAC_DRBG for the
+ * PSA crypto subsystem.
+ *
+ * If this option is unset:
+ * - If CTR_DRBG is available, the PSA subsystem uses it rather than HMAC_DRBG.
+ * - Otherwise, the PSA subsystem uses HMAC_DRBG with either
+ *   #MBEDTLS_MD_SHA512 or #MBEDTLS_MD_SHA256 based on availability and
+ *   on unspecified heuristics.
+ */
+//#define MBEDTLS_PSA_HMAC_DRBG_MD_TYPE MBEDTLS_MD_SHA256
+
+/** \def MBEDTLS_PSA_KEY_SLOT_COUNT
+ * Restrict the PSA library to supporting a maximum amount of simultaneously
+ * loaded keys. A loaded key is a key stored by the PSA Crypto core as a
+ * volatile key, or a persistent key which is loaded temporarily by the
+ * library as part of a crypto operation in flight.
+ *
+ * If this option is unset, the library will fall back to a default value of
+ * 32 keys.
+ */
+//#define MBEDTLS_PSA_KEY_SLOT_COUNT 32
+
 /* SSL Cache options */
 //#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT       86400 /**< 1 day  */
 //#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES      50 /**< Maximum entries in cache */
@@ -3295,6 +3816,53 @@
  */
 //#define MBEDTLS_SSL_IN_CONTENT_LEN              16384
 
+/** \def MBEDTLS_SSL_CID_IN_LEN_MAX
+ *
+ * The maximum length of CIDs used for incoming DTLS messages.
+ *
+ */
+//#define MBEDTLS_SSL_CID_IN_LEN_MAX 32
+
+/** \def MBEDTLS_SSL_CID_OUT_LEN_MAX
+ *
+ * The maximum length of CIDs used for outgoing DTLS messages.
+ *
+ */
+//#define MBEDTLS_SSL_CID_OUT_LEN_MAX 32
+
+/** \def MBEDTLS_SSL_CID_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * when using the Connection ID extension in DTLS 1.2.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ *
+ */
+//#define MBEDTLS_SSL_CID_PADDING_GRANULARITY 16
+
+/** \def MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * in TLS 1.3.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ */
+//#define MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY 1
+
 /** \def MBEDTLS_SSL_OUT_CONTENT_LEN
  *
  * Maximum length (in bytes) of outgoing plaintext fragments.
@@ -3324,7 +3892,7 @@
  * Maximum number of heap-allocated bytes for the purpose of
  * DTLS handshake message reassembly and future message buffering.
  *
- * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN
+ * This should be at least 9/8 * MBEDTLS_SSL_IN_CONTENT_LEN
  * to account for a reassembled handshake message of maximum size,
  * together with its reassembly bitmap.
  *
@@ -3340,6 +3908,17 @@
 //#define MBEDTLS_PSK_MAX_LEN               32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */
 //#define MBEDTLS_SSL_COOKIE_TIMEOUT        60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
 
+/** \def MBEDTLS_TLS_EXT_CID
+ *
+ * At the time of writing, the CID extension has not been assigned its
+ * final value. Set this configuration option to make Mbed TLS use a
+ * different value.
+ *
+ * A future minor revision of Mbed TLS may change the default value of
+ * this option to match evolving standards and usage.
+ */
+//#define MBEDTLS_TLS_EXT_CID                        254
+
 /**
  * Complete list of ciphersuites to use, in order of preference.
  *
@@ -3358,20 +3937,6 @@
 //#define MBEDTLS_X509_MAX_INTERMEDIATE_CA   8   /**< Maximum number of intermediate CAs in a verification chain. */
 //#define MBEDTLS_X509_MAX_FILE_PATH_LEN     512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */
 
-/**
- * Allow SHA-1 in the default TLS configuration for certificate signing.
- * Without this build-time option, SHA-1 support must be activated explicitly
- * through mbedtls_ssl_conf_cert_profile. Turning on this option is not
- * recommended because of it is possible to generate SHA-1 collisions, however
- * this may be safe for legacy infrastructure where additional controls apply.
- *
- * \warning   SHA-1 is considered a weak message digest and its use constitutes
- *            a security risk. If possible, we recommend avoiding dependencies
- *            on it, and considering stronger message digests instead.
- *
- */
-// #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES
-
 /**
  * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
  * signature and ciphersuite selection. Without this build-time option, SHA-1
@@ -3387,7 +3952,7 @@
  *            on it, and considering stronger message digests instead.
  *
  */
-#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
+//#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
 
 /**
  * Uncomment the macro to let mbed TLS use your alternate implementation of
@@ -3428,6 +3993,15 @@
  */
 //#define MBEDTLS_PLATFORM_GMTIME_R_ALT
 
+/**
+ * Enable the verified implementations of ECDH primitives from Project Everest
+ * (currently only Curve25519). This feature changes the layout of ECDH
+ * contexts and therefore is a compatibility break for applications that access
+ * fields of a mbedtls_ecdh_context structure directly. See also
+ * MBEDTLS_ECDH_LEGACY_CONTEXT in include/mbedtls/ecdh.h.
+ */
+//#define MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED
+
 /* \} name SECTION: Customisation configuration options */
 
 /* Target and application specific configurations
@@ -3439,6 +4013,10 @@
 #include MBEDTLS_USER_CONFIG_FILE
 #endif
 
-#include "check_config.h"
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+#include "mbedtls/config_psa.h"
+#endif
+
+#include "mbedtls/check_config.h"
 
 #endif /* MBEDTLS_CONFIG_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/config_psa.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/config_psa.h
new file mode 100644
index 00000000000..189f6c21734
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/config_psa.h
@@ -0,0 +1,836 @@
+/**
+ * \file mbedtls/config_psa.h
+ * \brief PSA crypto configuration options (set of defines)
+ *
+ *  This set of compile-time options takes settings defined in
+ *  include/mbedtls/config.h and include/psa/crypto_config.h and uses
+ *  those definitions to define symbols used in the library code.
+ *
+ *  Users and integrators should not edit this file, please edit
+ *  include/mbedtls/config.h for MBETLS_XXX settings or
+ *  include/psa/crypto_config.h for PSA_WANT_XXX settings.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CONFIG_PSA_H
+#define MBEDTLS_CONFIG_PSA_H
+
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+#include "psa/crypto_config.h"
+#endif /* defined(MBEDTLS_PSA_CRYPTO_CONFIG) */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+/****************************************************************/
+/* De facto synonyms */
+/****************************************************************/
+
+#if defined(PSA_WANT_ALG_ECDSA_ANY) && !defined(PSA_WANT_ALG_ECDSA)
+#define PSA_WANT_ALG_ECDSA PSA_WANT_ALG_ECDSA_ANY
+#elif !defined(PSA_WANT_ALG_ECDSA_ANY) && defined(PSA_WANT_ALG_ECDSA)
+#define PSA_WANT_ALG_ECDSA_ANY PSA_WANT_ALG_ECDSA
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW) && !defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW
+#elif !defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW) && defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW PSA_WANT_ALG_RSA_PKCS1V15_SIGN
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_PSS_ANY_SALT) && !defined(PSA_WANT_ALG_RSA_PSS)
+#define PSA_WANT_ALG_RSA_PSS PSA_WANT_ALG_RSA_PSS_ANY_SALT
+#elif !defined(PSA_WANT_ALG_RSA_PSS_ANY_SALT) && defined(PSA_WANT_ALG_RSA_PSS)
+#define PSA_WANT_ALG_RSA_PSS_ANY_SALT PSA_WANT_ALG_RSA_PSS
+#endif
+
+
+
+/****************************************************************/
+/* Require built-in implementations based on PSA requirements */
+/****************************************************************/
+
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+
+#if defined(PSA_WANT_ALG_DETERMINISTIC_ECDSA)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_DETERMINISTIC_ECDSA)
+#define MBEDTLS_PSA_BUILTIN_ALG_DETERMINISTIC_ECDSA 1
+#define MBEDTLS_ECDSA_DETERMINISTIC
+#define MBEDTLS_ECDSA_C
+#define MBEDTLS_HMAC_DRBG_C
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_DETERMINISTIC_ECDSA */
+#endif /* PSA_WANT_ALG_DETERMINISTIC_ECDSA */
+
+#if defined(PSA_WANT_ALG_ECDH)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_ECDH)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDH 1
+#define MBEDTLS_ECDH_C
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_ECDH */
+#endif /* PSA_WANT_ALG_ECDH */
+
+#if defined(PSA_WANT_ALG_ECDSA)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_ECDSA)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDSA 1
+#define MBEDTLS_ECDSA_C
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_ECDSA */
+#endif /* PSA_WANT_ALG_ECDSA */
+
+#if defined(PSA_WANT_ALG_HKDF)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_HKDF)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define MBEDTLS_PSA_BUILTIN_ALG_HKDF 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_HKDF */
+#endif /* PSA_WANT_ALG_HKDF */
+
+#if defined(PSA_WANT_ALG_HMAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_HMAC)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_HMAC */
+#endif /* PSA_WANT_ALG_HMAC */
+
+#if defined(PSA_WANT_ALG_MD2) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD2)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD2 1
+#define MBEDTLS_MD2_C
+#endif
+
+#if defined(PSA_WANT_ALG_MD4) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD4)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD4 1
+#define MBEDTLS_MD4_C
+#endif
+
+#if defined(PSA_WANT_ALG_MD5) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD5)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD5 1
+#define MBEDTLS_MD5_C
+#endif
+
+#if defined(PSA_WANT_ALG_RIPEMD160) && !defined(MBEDTLS_PSA_ACCEL_ALG_RIPEMD160)
+#define MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160 1
+#define MBEDTLS_RIPEMD160_C
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_OAEP)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_OAEP)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_OAEP 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V21
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_OAEP */
+#endif /* PSA_WANT_ALG_RSA_OAEP */
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_CRYPT)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_CRYPT)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_CRYPT 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V15
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_CRYPT */
+#endif /* PSA_WANT_ALG_RSA_PKCS1V15_CRYPT */
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_SIGN)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_SIGN 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V15
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_SIGN */
+#endif /* PSA_WANT_ALG_RSA_PKCS1V15_SIGN */
+
+#if defined(PSA_WANT_ALG_RSA_PSS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PSS)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PSS 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V21
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PSS */
+#endif /* PSA_WANT_ALG_RSA_PSS */
+
+#if defined(PSA_WANT_ALG_SHA_1) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_1)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_1 1
+#define MBEDTLS_SHA1_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_224) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_224)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_224 1
+#define MBEDTLS_SHA256_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_256) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_256)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_256 1
+#define MBEDTLS_SHA256_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_384) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_384)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_384 1
+#define MBEDTLS_SHA512_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_512) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_512)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_512 1
+#define MBEDTLS_SHA512_C
+#endif
+
+#if defined(PSA_WANT_ALG_TLS12_PRF)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_TLS12_PRF)
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_TLS12_PRF */
+#endif /* PSA_WANT_ALG_TLS12_PRF */
+
+#if defined(PSA_WANT_ALG_TLS12_PSK_TO_MS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_TLS12_PSK_TO_MS)
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_TLS12_PSK_TO_MS */
+#endif /* PSA_WANT_ALG_TLS12_PSK_TO_MS */
+
+#if defined(PSA_WANT_KEY_TYPE_ECC_KEY_PAIR)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_KEY_PAIR)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_KEY_PAIR 1
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_KEY_PAIR */
+#endif /* PSA_WANT_KEY_TYPE_ECC_KEY_PAIR */
+
+#if defined(PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_PUBLIC_KEY)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_PUBLIC_KEY 1
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_PUBLIC_KEY */
+#endif /* PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY */
+
+#if defined(PSA_WANT_KEY_TYPE_RSA_KEY_PAIR)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_KEY_PAIR)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_KEY_PAIR 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_GENPRIME
+#define MBEDTLS_PK_PARSE_C
+#define MBEDTLS_PK_WRITE_C
+#define MBEDTLS_PK_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_KEY_PAIR */
+#endif /* PSA_WANT_KEY_TYPE_RSA_KEY_PAIR */
+
+#if defined(PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_PUBLIC_KEY)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_PUBLIC_KEY 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PK_PARSE_C
+#define MBEDTLS_PK_WRITE_C
+#define MBEDTLS_PK_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_PUBLIC_KEY */
+#endif /* PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY */
+
+/* If any of the block modes are requested that don't have an
+ * associated HW assist, define PSA_HAVE_SOFT_BLOCK_MODE for checking
+ * in the block cipher key types. */
+#if (defined(PSA_WANT_ALG_CTR) && !defined(MBEDTLS_PSA_ACCEL_ALG_CTR)) || \
+    (defined(PSA_WANT_ALG_CFB) && !defined(MBEDTLS_PSA_ACCEL_ALG_CFB)) || \
+    (defined(PSA_WANT_ALG_OFB) && !defined(MBEDTLS_PSA_ACCEL_ALG_OFB)) || \
+    (defined(PSA_WANT_ALG_XTS) && !defined(MBEDTLS_PSA_ACCEL_ALG_XTS)) || \
+    defined(PSA_WANT_ALG_ECB_NO_PADDING) || \
+    (defined(PSA_WANT_ALG_CBC_NO_PADDING) && \
+     !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_NO_PADDING)) || \
+    (defined(PSA_WANT_ALG_CBC_PKCS7) && \
+     !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_PKCS7)) || \
+    (defined(PSA_WANT_ALG_CMAC) && !defined(MBEDTLS_PSA_ACCEL_ALG_CMAC))
+#define PSA_HAVE_SOFT_BLOCK_MODE 1
+#endif
+
+#if (defined(PSA_WANT_ALG_GCM) && !defined(MBEDTLS_PSA_ACCEL_ALG_GCM)) || \
+    (defined(PSA_WANT_ALG_CCM) && !defined(MBEDTLS_PSA_ACCEL_ALG_CCM))
+#define PSA_HAVE_SOFT_BLOCK_AEAD 1
+#endif
+
+#if defined(PSA_WANT_KEY_TYPE_AES)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_AES)
+#define PSA_HAVE_SOFT_KEY_TYPE_AES 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_AES */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_AES 1
+#define MBEDTLS_AES_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_AES || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_AES */
+
+#if defined(PSA_WANT_KEY_TYPE_ARC4)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ARC4)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARC4 1
+#define MBEDTLS_ARC4_C
+#endif /*!MBEDTLS_PSA_ACCEL_KEY_TYPE_ARC4 */
+#endif /* PSA_WANT_KEY_TYPE_ARC4 */
+
+#if defined(PSA_WANT_KEY_TYPE_ARIA)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ARIA)
+#define PSA_HAVE_SOFT_KEY_TYPE_ARIA 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ARIA */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARIA 1
+#define MBEDTLS_ARIA_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_ARIA || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_ARIA */
+
+#if defined(PSA_WANT_KEY_TYPE_CAMELLIA)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_CAMELLIA)
+#define PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_CAMELLIA */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CAMELLIA 1
+#define MBEDTLS_CAMELLIA_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_CAMELLIA */
+
+#if defined(PSA_WANT_KEY_TYPE_DES)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_DES)
+#define PSA_HAVE_SOFT_KEY_TYPE_DES 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_DES */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_DES) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_DES 1
+#define MBEDTLS_DES_C
+#endif /*PSA_HAVE_SOFT_KEY_TYPE_DES || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_DES */
+
+#if defined(PSA_WANT_KEY_TYPE_CHACHA20)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_CHACHA20)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CHACHA20 1
+#define MBEDTLS_CHACHA20_C
+#endif /*!MBEDTLS_PSA_ACCEL_KEY_TYPE_CHACHA20 */
+#endif /* PSA_WANT_KEY_TYPE_CHACHA20 */
+
+/* If any of the software block ciphers are selected, define
+ * PSA_HAVE_SOFT_BLOCK_CIPHER, which can be used in any of these
+ * situations. */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_DES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define PSA_HAVE_SOFT_BLOCK_CIPHER 1
+#endif
+
+#if defined(PSA_WANT_ALG_STREAM_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#endif /* PSA_WANT_ALG_STREAM_CIPHER */
+
+#if defined(PSA_WANT_ALG_CBC_MAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_MAC)
+#error "CBC-MAC is not yet supported via the PSA API in Mbed TLS."
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_MAC 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CBC_MAC */
+#endif /* PSA_WANT_ALG_CBC_MAC */
+
+#if defined(PSA_WANT_ALG_CMAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CMAC) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CMAC 1
+#define MBEDTLS_CMAC_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CMAC */
+#endif /* PSA_WANT_ALG_CMAC */
+
+#if defined(PSA_WANT_ALG_CTR)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CTR) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CTR 1
+#define MBEDTLS_CIPHER_MODE_CTR
+#endif
+#endif /* PSA_WANT_ALG_CTR */
+
+#if defined(PSA_WANT_ALG_CFB)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CFB) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CFB 1
+#define MBEDTLS_CIPHER_MODE_CFB
+#endif
+#endif /* PSA_WANT_ALG_CFB */
+
+#if defined(PSA_WANT_ALG_OFB)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_OFB) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_OFB 1
+#define MBEDTLS_CIPHER_MODE_OFB
+#endif
+#endif /* PSA_WANT_ALG_OFB */
+
+#if defined(PSA_WANT_ALG_XTS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_XTS) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_XTS 1
+#define MBEDTLS_CIPHER_MODE_XTS
+#endif
+#endif /* PSA_WANT_ALG_XTS */
+
+#if defined(PSA_WANT_ALG_ECB_NO_PADDING)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING 1
+#endif
+
+#if defined(PSA_WANT_ALG_CBC_NO_PADDING)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_NO_PADDING) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_CIPHER_MODE_CBC
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING 1
+#endif
+#endif /* PSA_WANT_ALG_CBC_NO_PADDING */
+
+#if defined(PSA_WANT_ALG_CBC_PKCS7)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_PKCS7) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_CIPHER_MODE_CBC
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7 1
+#define MBEDTLS_CIPHER_PADDING_PKCS7
+#endif
+#endif /* PSA_WANT_ALG_CBC_PKCS7 */
+
+#if defined(PSA_WANT_ALG_CCM)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CCM) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define MBEDTLS_PSA_BUILTIN_ALG_CCM 1
+#define MBEDTLS_CCM_C
+#endif
+#endif /* PSA_WANT_ALG_CCM */
+
+#if defined(PSA_WANT_ALG_GCM)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_GCM) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define MBEDTLS_PSA_BUILTIN_ALG_GCM 1
+#define MBEDTLS_GCM_C
+#endif
+#endif /* PSA_WANT_ALG_GCM */
+
+#if defined(PSA_WANT_ALG_CHACHA20_POLY1305)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CHACHA20_POLY1305)
+#if defined(PSA_WANT_KEY_TYPE_CHACHA20)
+#define MBEDTLS_CHACHAPOLY_C
+#define MBEDTLS_PSA_BUILTIN_ALG_CHACHA20_POLY1305 1
+#endif /* PSA_WANT_KEY_TYPE_CHACHA20 */
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CHACHA20_POLY1305 */
+#endif /* PSA_WANT_ALG_CHACHA20_POLY1305 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_256)
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_256 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_256 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_384)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_384)
+#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_384 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_384 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_384 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_512)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_512)
+#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_512 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_512 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_512 */
+
+#if defined(PSA_WANT_ECC_MONTGOMERY_255)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_255)
+#define MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_255 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_255 */
+#endif /* PSA_WANT_ECC_MONTGOMERY_255 */
+
+#if defined(PSA_WANT_ECC_MONTGOMERY_448)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_448)
+/*
+ * Curve448 is not yet supported via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/4249).
+ */
+#error "Curve448 is not yet supported via the PSA API in Mbed TLS."
+#define MBEDTLS_ECP_DP_CURVE448_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_448 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_448 */
+#endif /* PSA_WANT_ECC_MONTGOMERY_448 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_192)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_192)
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_192 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_192 */
+#endif /* PSA_WANT_ECC_SECP_R1_192 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_224)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_224)
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_224 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_224 */
+#endif /* PSA_WANT_ECC_SECP_R1_224 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_256)
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_256 */
+#endif /* PSA_WANT_ECC_SECP_R1_256 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_384)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_384)
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_384 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_384 */
+#endif /* PSA_WANT_ECC_SECP_R1_384 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_521)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_521)
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_521 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_521 */
+#endif /* PSA_WANT_ECC_SECP_R1_521 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_192)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_192)
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_192 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_192 */
+#endif /* PSA_WANT_ECC_SECP_K1_192 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_224)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_224)
+/*
+ * SECP224K1 is buggy via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/3541).
+ */
+#error "SECP224K1 is buggy via the PSA API in Mbed TLS."
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_224 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_224 */
+#endif /* PSA_WANT_ECC_SECP_K1_224 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_256)
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_256 */
+#endif /* PSA_WANT_ECC_SECP_K1_256 */
+
+
+
+/****************************************************************/
+/* Infer PSA requirements from Mbed TLS capabilities */
+/****************************************************************/
+
+#else /* MBEDTLS_PSA_CRYPTO_CONFIG */
+
+/*
+ * Ensure PSA_WANT_* defines are setup properly if MBEDTLS_PSA_CRYPTO_CONFIG
+ * is not defined
+ */
+
+#if defined(MBEDTLS_CCM_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_CCM 1
+#define PSA_WANT_ALG_CCM 1
+#endif /* MBEDTLS_CCM_C */
+
+#if defined(MBEDTLS_CMAC_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_CMAC 1
+#define PSA_WANT_ALG_CMAC 1
+#endif /* MBEDTLS_CMAC_C */
+
+#if defined(MBEDTLS_ECDH_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDH 1
+#define PSA_WANT_ALG_ECDH 1
+#endif /* MBEDTLS_ECDH_C */
+
+#if defined(MBEDTLS_ECDSA_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDSA 1
+#define PSA_WANT_ALG_ECDSA 1
+#define PSA_WANT_ALG_ECDSA_ANY 1
+
+// Only add in DETERMINISTIC support if ECDSA is also enabled
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+#define MBEDTLS_PSA_BUILTIN_ALG_DETERMINISTIC_ECDSA 1
+#define PSA_WANT_ALG_DETERMINISTIC_ECDSA 1
+#endif /* MBEDTLS_ECDSA_DETERMINISTIC */
+
+#endif /* MBEDTLS_ECDSA_C */
+
+#if defined(MBEDTLS_ECP_C)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_KEY_PAIR 1
+#define PSA_WANT_KEY_TYPE_ECC_KEY_PAIR 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_PUBLIC_KEY 1
+#define PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY 1
+#endif /* MBEDTLS_ECP_C */
+
+#if defined(MBEDTLS_GCM_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_GCM 1
+#define PSA_WANT_ALG_GCM 1
+#endif /* MBEDTLS_GCM_C */
+
+#if defined(MBEDTLS_HKDF_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define PSA_WANT_ALG_HMAC 1
+#define MBEDTLS_PSA_BUILTIN_ALG_HKDF 1
+#define PSA_WANT_ALG_HKDF 1
+#endif /* MBEDTLS_HKDF_C */
+
+#if defined(MBEDTLS_MD_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define PSA_WANT_ALG_HMAC 1
+#define PSA_WANT_KEY_TYPE_HMAC
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF 1
+#define PSA_WANT_ALG_TLS12_PRF 1
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS 1
+#define PSA_WANT_ALG_TLS12_PSK_TO_MS 1
+#endif /* MBEDTLS_MD_C */
+
+#if defined(MBEDTLS_MD2_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD2 1
+#define PSA_WANT_ALG_MD2 1
+#endif
+
+#if defined(MBEDTLS_MD4_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD4 1
+#define PSA_WANT_ALG_MD4 1
+#endif
+
+#if defined(MBEDTLS_MD5_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD5 1
+#define PSA_WANT_ALG_MD5 1
+#endif
+
+#if defined(MBEDTLS_RIPEMD160_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160 1
+#define PSA_WANT_ALG_RIPEMD160 1
+#endif
+
+#if defined(MBEDTLS_RSA_C)
+#if defined(MBEDTLS_PKCS1_V15)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_CRYPT 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_CRYPT 1
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_SIGN 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW 1
+#endif /* MBEDTLS_PKCS1_V15 */
+#if defined(MBEDTLS_PKCS1_V21)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_OAEP 1
+#define PSA_WANT_ALG_RSA_OAEP 1
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PSS 1
+#define PSA_WANT_ALG_RSA_PSS 1
+#endif /* MBEDTLS_PKCS1_V21 */
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_KEY_PAIR 1
+#define PSA_WANT_KEY_TYPE_RSA_KEY_PAIR 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_PUBLIC_KEY 1
+#define PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY 1
+#endif /* MBEDTLS_RSA_C */
+
+#if defined(MBEDTLS_SHA1_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_1 1
+#define PSA_WANT_ALG_SHA_1 1
+#endif
+
+#if defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_224 1
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_256 1
+#define PSA_WANT_ALG_SHA_224 1
+#define PSA_WANT_ALG_SHA_256 1
+#endif
+
+#if defined(MBEDTLS_SHA512_C)
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_384 1
+#define PSA_WANT_ALG_SHA_384 1
+#endif
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_512 1
+#define PSA_WANT_ALG_SHA_512 1
+#endif
+
+#if defined(MBEDTLS_AES_C)
+#define PSA_WANT_KEY_TYPE_AES 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_AES 1
+#endif
+
+#if defined(MBEDTLS_ARC4_C)
+#define PSA_WANT_KEY_TYPE_ARC4 1
+#define PSA_WANT_ALG_STREAM_CIPHER 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARC4 1
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#endif
+
+#if defined(MBEDTLS_ARIA_C)
+#define PSA_WANT_KEY_TYPE_ARIA 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARIA 1
+#endif
+
+#if defined(MBEDTLS_CAMELLIA_C)
+#define PSA_WANT_KEY_TYPE_CAMELLIA 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CAMELLIA 1
+#endif
+
+#if defined(MBEDTLS_DES_C)
+#define PSA_WANT_KEY_TYPE_DES 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_DES 1
+#endif
+
+#if defined(MBEDTLS_CHACHA20_C)
+#define PSA_WANT_KEY_TYPE_CHACHA20 1
+#define PSA_WANT_ALG_STREAM_CIPHER 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CHACHA20 1
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#if defined(MBEDTLS_CHACHAPOLY_C)
+#define PSA_WANT_ALG_CHACHA20_POLY1305 1
+#define MBEDTLS_PSA_BUILTIN_ALG_CHACHA20_POLY1305 1
+#endif
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING 1
+#define PSA_WANT_ALG_CBC_NO_PADDING 1
+#if defined(MBEDTLS_CIPHER_PADDING_PKCS7)
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7 1
+#define PSA_WANT_ALG_CBC_PKCS7 1
+#endif
+#endif
+
+#if defined(MBEDTLS_AES_C) || defined(MBEDTLS_DES_C) || \
+    defined(MBEDTLS_ARIA_C) || defined(MBEDTLS_CAMELLIA_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING 1
+#define PSA_WANT_ALG_ECB_NO_PADDING 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+#define MBEDTLS_PSA_BUILTIN_ALG_CFB 1
+#define PSA_WANT_ALG_CFB 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+#define MBEDTLS_PSA_BUILTIN_ALG_CTR 1
+#define PSA_WANT_ALG_CTR 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_OFB)
+#define MBEDTLS_PSA_BUILTIN_ALG_OFB 1
+#define PSA_WANT_ALG_OFB 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+#define MBEDTLS_PSA_BUILTIN_ALG_XTS 1
+#define PSA_WANT_ALG_XTS 1
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_256 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_256
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_384 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_384
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_512 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_512
+#endif
+
+#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_255 1
+#define PSA_WANT_ECC_MONTGOMERY_255
+#endif
+
+/* Curve448 is not yet supported via the PSA API (https://github.com/ARMmbed/mbedtls/issues/4249) */
+#if 0 && defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_448 1
+#define PSA_WANT_ECC_MONTGOMERY_448
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_192 1
+#define PSA_WANT_ECC_SECP_R1_192
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_224 1
+#define PSA_WANT_ECC_SECP_R1_224
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_256 1
+#define PSA_WANT_ECC_SECP_R1_256
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_384 1
+#define PSA_WANT_ECC_SECP_R1_384
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_521 1
+#define PSA_WANT_ECC_SECP_R1_521
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_192 1
+#define PSA_WANT_ECC_SECP_K1_192
+#endif
+
+/* SECP224K1 is buggy via the PSA API (https://github.com/ARMmbed/mbedtls/issues/3541) */
+#if 0 && defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_224 1
+#define PSA_WANT_ECC_SECP_K1_224
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_256 1
+#define PSA_WANT_ECC_SECP_K1_256
+#endif
+
+#endif /* MBEDTLS_PSA_CRYPTO_CONFIG */
+
+/* These features are always enabled. */
+#define PSA_WANT_KEY_TYPE_DERIVE 1
+#define PSA_WANT_KEY_TYPE_RAW_DATA 1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CONFIG_PSA_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/constant_time.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/constant_time.h
new file mode 100644
index 00000000000..c5de57a01f0
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/constant_time.h
@@ -0,0 +1,45 @@
+/**
+ *  Constant-time functions
+ *
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CONSTANT_TIME_H
+#define MBEDTLS_CONSTANT_TIME_H
+
+#include <stddef.h>
+
+
+/** Constant-time buffer comparison without branches.
+ *
+ * This is equivalent to the standard memcmp function, but is likely to be
+ * compiled to code using bitwise operation rather than a branch.
+ *
+ * This function can be used to write constant-time code by replacing branches
+ * with bit operations using masks.
+ *
+ * \param a     Pointer to the first buffer.
+ * \param b     Pointer to the second buffer.
+ * \param n     The number of bytes to compare in the buffer.
+ *
+ * \return      Zero if the content of the two buffer is the same,
+ *              otherwise non-zero.
+ */
+int mbedtls_ct_memcmp( const void *a,
+                       const void *b,
+                       size_t n );
+
+#endif /* MBEDTLS_CONSTANT_TIME_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
index 6c099adf4d3..dc4adc896d4 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
@@ -12,40 +12,18 @@
  * The Mbed TLS implementation of CTR_DRBG uses AES-256 (default) or AES-128
  * (if \c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY is enabled at compile time)
  * as the underlying block cipher, with a derivation function.
- * The initial seeding grabs #MBEDTLS_CTR_DRBG_ENTROPY_LEN bytes of entropy.
- * See the documentation of mbedtls_ctr_drbg_seed() for more details.
- *
- * Based on NIST SP 800-90A §10.2.1 table 3 and NIST SP 800-57 part 1 table 2,
- * here are the security strengths achieved in typical configuration:
- * - 256 bits under the default configuration of the library, with AES-256
- *   and with #MBEDTLS_CTR_DRBG_ENTROPY_LEN set to 48 or more.
- * - 256 bits if AES-256 is used, #MBEDTLS_CTR_DRBG_ENTROPY_LEN is set
- *   to 32 or more, and the DRBG is initialized with an explicit
- *   nonce in the \c custom parameter to mbedtls_ctr_drbg_seed().
- * - 128 bits if AES-256 is used but #MBEDTLS_CTR_DRBG_ENTROPY_LEN is
- *   between 24 and 47 and the DRBG is not initialized with an explicit
- *   nonce (see mbedtls_ctr_drbg_seed()).
- * - 128 bits if AES-128 is used (\c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY enabled)
- *   and #MBEDTLS_CTR_DRBG_ENTROPY_LEN is set to 24 or more (which is
- *   always the case unless it is explicitly set to a different value
- *   in config.h).
- *
- * Note that the value of #MBEDTLS_CTR_DRBG_ENTROPY_LEN defaults to:
- * - \c 48 if the module \c MBEDTLS_SHA512_C is enabled and the symbol
- *   \c MBEDTLS_ENTROPY_FORCE_SHA256 is disabled at compile time.
- *   This is the default configuration of the library.
- * - \c 32 if the module \c MBEDTLS_SHA512_C is disabled at compile time.
- * - \c 32 if \c MBEDTLS_ENTROPY_FORCE_SHA256 is enabled at compile time.
+ *
+ * The security strength as defined in NIST SP 800-90A is
+ * 128 bits when AES-128 is used (\c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY enabled)
+ * and 256 bits otherwise, provided that #MBEDTLS_CTR_DRBG_ENTROPY_LEN is
+ * kept at its default value (and not overridden in config.h) and that the
+ * DRBG instance is set up with default parameters.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more
+ * information.
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -58,48 +36,31 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_CTR_DRBG_H
 #define MBEDTLS_CTR_DRBG_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "aes.h"
+#include "mbedtls/aes.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
-#define MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED        -0x0034  /**< The entropy source failed. */
-#define MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG              -0x0036  /**< The requested random buffer length is too big. */
-#define MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG                -0x0038  /**< The input (entropy + additional data) is too large. */
-#define MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR                -0x003A  /**< Read or write error in file. */
+/** The entropy source failed. */
+#define MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED        -0x0034
+/** The requested random buffer length is too big. */
+#define MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG              -0x0036
+/** The input (entropy + additional data) is too large. */
+#define MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG                -0x0038
+/** Read or write error in file. */
+#define MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR                -0x003A
 
 #define MBEDTLS_CTR_DRBG_BLOCKSIZE          16 /**< The block size used by the cipher. */
 
@@ -188,20 +149,49 @@
 extern "C" {
 #endif
 
+#if MBEDTLS_CTR_DRBG_ENTROPY_LEN >= MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2
+/** The default length of the nonce read from the entropy source.
+ *
+ * This is \c 0 because a single read from the entropy source is sufficient
+ * to include a nonce.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more information.
+ */
+#define MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN 0
+#else
+/** The default length of the nonce read from the entropy source.
+ *
+ * This is half of the default entropy length because a single read from
+ * the entropy source does not provide enough material to form a nonce.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more information.
+ */
+#define MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN ( MBEDTLS_CTR_DRBG_ENTROPY_LEN + 1 ) / 2
+#endif
+
 /**
  * \brief          The CTR_DRBG context structure.
  */
 typedef struct mbedtls_ctr_drbg_context
 {
     unsigned char counter[16];  /*!< The counter (V). */
-    int reseed_counter;         /*!< The reseed counter. */
+    int reseed_counter;         /*!< The reseed counter.
+                                 * This is the number of requests that have
+                                 * been made since the last (re)seeding,
+                                 * minus one.
+                                 * Before the initial seeding, this field
+                                 * contains the amount of entropy in bytes
+                                 * to use as a nonce for the initial seeding,
+                                 * or -1 if no nonce length has been explicitly
+                                 * set (see mbedtls_ctr_drbg_set_nonce_len()).
+                                 */
     int prediction_resistance;  /*!< This determines whether prediction
                                      resistance is enabled, that is
                                      whether to systematically reseed before
                                      each random generation. */
     size_t entropy_len;         /*!< The amount of entropy grabbed on each
-                                     seed or reseed operation. */
-    int reseed_interval;        /*!< The reseed interval. */
+                                     seed or reseed operation, in bytes. */
+    int reseed_interval;        /*!< The reseed interval.
+                                 * This is the maximum number of requests
+                                 * that can be made between reseedings. */
 
     mbedtls_aes_context aes_ctx;        /*!< The AES context. */
 
@@ -254,34 +244,35 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  * The entropy length is #MBEDTLS_CTR_DRBG_ENTROPY_LEN by default.
  * You can override it by calling mbedtls_ctr_drbg_set_entropy_len().
  *
- * You can provide a personalization string in addition to the
+ * The entropy nonce length is:
+ * - \c 0 if the entropy length is at least 3/2 times the entropy length,
+ *   which guarantees that the security strength is the maximum permitted
+ *   by the key size and entropy length according to NIST SP 800-90A §10.2.1;
+ * - Half the entropy length otherwise.
+ * You can override it by calling mbedtls_ctr_drbg_set_nonce_len().
+ * With the default entropy length, the entropy nonce length is
+ * #MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN.
+ *
+ * You can provide a nonce and personalization string in addition to the
  * entropy source, to make this instantiation as unique as possible.
+ * See SP 800-90A §8.6.7 for more details about nonces.
  *
- * \note                The _seed_material_ value passed to the derivation
- *                      function in the CTR_DRBG Instantiate Process
- *                      described in NIST SP 800-90A §10.2.1.3.2
- *                      is the concatenation of the string obtained from
- *                      calling \p f_entropy and the \p custom string.
- *                      The origin of the nonce depends on the value of
- *                      the entropy length relative to the security strength.
- *                      - If the entropy length is at least 1.5 times the
- *                        security strength then the nonce is taken from the
- *                        string obtained with \p f_entropy.
- *                      - If the entropy length is less than the security
- *                        strength, then the nonce is taken from \p custom.
- *                        In this case, for compliance with SP 800-90A,
- *                        you must pass a unique value of \p custom at
- *                        each invocation. See SP 800-90A §8.6.7 for more
- *                        details.
- */
-#if MBEDTLS_CTR_DRBG_ENTROPY_LEN < MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2
-/** \warning            When #MBEDTLS_CTR_DRBG_ENTROPY_LEN is less than
- *                      #MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2, to achieve the
- *                      maximum security strength permitted by CTR_DRBG,
- *                      you must pass a value of \p custom that is a nonce:
- *                      this value must never be repeated in subsequent
- *                      runs of the same application or on a different
- *                      device.
+ * The _seed_material_ value passed to the derivation function in
+ * the CTR_DRBG Instantiate Process described in NIST SP 800-90A §10.2.1.3.2
+ * is the concatenation of the following strings:
+ * - A string obtained by calling \p f_entropy function for the entropy
+ *   length.
+ */
+#if MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN == 0
+/**
+ * - If mbedtls_ctr_drbg_set_nonce_len() has been called, a string
+ *   obtained by calling \p f_entropy function for the specified length.
+ */
+#else
+/**
+ * - A string obtained by calling \p f_entropy function for the entropy nonce
+ *   length. If the entropy nonce length is \c 0, this function does not
+ *   make a second call to \p f_entropy.
  */
 #endif
 #if defined(MBEDTLS_THREADING_C)
@@ -294,6 +285,23 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  */
 #endif /* MBEDTLS_THREADING_C */
 /**
+ * - The \p custom string.
+ *
+ * \note                To achieve the nominal security strength permitted
+ *                      by CTR_DRBG, the entropy length must be:
+ *                      - at least 16 bytes for a 128-bit strength
+ *                      (maximum achievable strength when using AES-128);
+ *                      - at least 32 bytes for a 256-bit strength
+ *                      (maximum achievable strength when using AES-256).
+ *
+ *                      In addition, if you do not pass a nonce in \p custom,
+ *                      the sum of the entropy length
+ *                      and the entropy nonce length must be:
+ *                      - at least 24 bytes for a 128-bit strength
+ *                      (maximum achievable strength when using AES-128);
+ *                      - at least 48 bytes for a 256-bit strength
+ *                      (maximum achievable strength when using AES-256).
+ *
  * \param ctx           The CTR_DRBG context to seed.
  *                      It must have been initialized with
  *                      mbedtls_ctr_drbg_init().
@@ -308,7 +316,7 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  *                      \p p_entropy context, the buffer to fill, and the
  *                      length of the buffer.
  *                      \p f_entropy is always called with a buffer size
- *                      equal to the entropy length.
+ *                      less than or equal to the entropy length.
  * \param p_entropy     The entropy context to pass to \p f_entropy.
  * \param custom        The personalization string.
  *                      This can be \c NULL, in which case the personalization
@@ -371,11 +379,35 @@ void mbedtls_ctr_drbg_set_prediction_resistance( mbedtls_ctr_drbg_context *ctx,
  *
  * \param ctx           The CTR_DRBG context.
  * \param len           The amount of entropy to grab, in bytes.
- *                      This must be at most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT.
+ *                      This must be at most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT
+ *                      and at most the maximum length accepted by the
+ *                      entropy function that is set in the context.
  */
 void mbedtls_ctr_drbg_set_entropy_len( mbedtls_ctr_drbg_context *ctx,
                                size_t len );
 
+/**
+ * \brief               This function sets the amount of entropy grabbed
+ *                      as a nonce for the initial seeding.
+ *
+ * Call this function before calling mbedtls_ctr_drbg_seed() to read
+ * a nonce from the entropy source during the initial seeding.
+ *
+ * \param ctx           The CTR_DRBG context.
+ * \param len           The amount of entropy to grab for the nonce, in bytes.
+ *                      This must be at most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT
+ *                      and at most the maximum length accepted by the
+ *                      entropy function that is set in the context.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG if \p len is
+ *                      more than #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED
+ *                      if the initial seeding has already taken place.
+ */
+int mbedtls_ctr_drbg_set_nonce_len( mbedtls_ctr_drbg_context *ctx,
+                                    size_t len );
+
 /**
  * \brief               This function sets the reseed interval.
  *
@@ -417,10 +449,10 @@ int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx,
 /**
  * \brief              This function updates the state of the CTR_DRBG context.
  *
- * \note               This function is not thread-safe. It is not safe
- *                     to call this function if another thread might be
- *                     concurrently obtaining random numbers from the same
- *                     context or updating or reseeding the same context.
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
  *
  * \param ctx          The CTR_DRBG context.
  * \param additional   The data to update the state with. This must not be
@@ -572,11 +604,6 @@ int mbedtls_ctr_drbg_self_test( int verbose );
 
 #endif /* MBEDTLS_SELF_TEST */
 
-/* Internal functions (do not call directly) */
-int mbedtls_ctr_drbg_seed_entropy_len( mbedtls_ctr_drbg_context *,
-                               int (*)(void *, unsigned char *, size_t), void *,
-                               const unsigned char *, size_t, size_t );
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/debug.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/debug.h
index abc2d4f07ca..3c08244f3da 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/debug.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/debug.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_DEBUG_H
 #define MBEDTLS_DEBUG_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #if defined(MBEDTLS_ECP_C)
-#include "ecp.h"
+#include "mbedtls/ecp.h"
 #endif
 
 #if defined(MBEDTLS_DEBUG_C)
@@ -107,6 +80,55 @@
 
 #endif /* MBEDTLS_DEBUG_C */
 
+/**
+ * \def MBEDTLS_PRINTF_ATTRIBUTE
+ *
+ * Mark a function as having printf attributes, and thus enable checking
+ * via -wFormat and other flags. This does nothing on builds with compilers
+ * that do not support the format attribute
+ *
+ * Module:  library/debug.c
+ * Caller:
+ *
+ * This module provides debugging functions.
+ */
+#if defined(__has_attribute)
+#if __has_attribute(format)
+#if defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 1
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)    \
+    __attribute__((__format__ (gnu_printf, string_index, first_to_check)))
+#else /* defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 1 */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)    \
+    __attribute__((format(printf, string_index, first_to_check)))
+#endif
+#else /* __has_attribute(format) */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)
+#endif /* __has_attribute(format) */
+#else /* defined(__has_attribute) */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)
+#endif
+
+/**
+ * \def MBEDTLS_PRINTF_SIZET
+ *
+ * MBEDTLS_PRINTF_xxx: Due to issues with older window compilers
+ * and MinGW we need to define the printf specifier for size_t
+ * and long long per platform.
+ *
+ * Module:  library/debug.c
+ * Caller:
+ *
+ * This module provides debugging functions.
+ */
+#if (defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800)
+   #include <inttypes.h>
+   #define MBEDTLS_PRINTF_SIZET     PRIuPTR
+   #define MBEDTLS_PRINTF_LONGLONG  "I64d"
+#else /* (defined(__MINGW32__)  && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800) */
+   #define MBEDTLS_PRINTF_SIZET     "zu"
+   #define MBEDTLS_PRINTF_LONGLONG  "lld"
+#endif /* (defined(__MINGW32__)  && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800) */
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -145,7 +167,7 @@ void mbedtls_debug_set_threshold( int threshold );
  */
 void mbedtls_debug_print_msg( const mbedtls_ssl_context *ssl, int level,
                               const char *file, int line,
-                              const char *format, ... );
+                              const char *format, ... ) MBEDTLS_PRINTF_ATTRIBUTE(5, 6);
 
 /**
  * \brief   Print the return value of a function to the debug output. This
@@ -287,4 +309,3 @@ void mbedtls_debug_printf_ecdh( const mbedtls_ssl_context *ssl, int level,
 #endif
 
 #endif /* debug.h */
-
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/des.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/des.h
index ee24f659459..325aab53644 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/des.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/des.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -29,36 +23,16 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_DES_H
 #define MBEDTLS_DES_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
+#include "mbedtls/platform_util.h"
 
 #include <stddef.h>
 #include <stdint.h>
@@ -66,10 +40,12 @@
 #define MBEDTLS_DES_ENCRYPT     1
 #define MBEDTLS_DES_DECRYPT     0
 
-#define MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH              -0x0032  /**< The data input has an invalid length. */
+/** The data input has an invalid length. */
+#define MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH              -0x0032
 
 /* MBEDTLS_ERR_DES_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_DES_HW_ACCEL_FAILED                   -0x0033  /**< DES hardware accelerator failed. */
+/** DES hardware accelerator failed. */
+#define MBEDTLS_ERR_DES_HW_ACCEL_FAILED                   -0x0033
 
 #define MBEDTLS_DES_KEY_SIZE    8
 
@@ -171,6 +147,7 @@ void mbedtls_des_key_set_parity( unsigned char key[MBEDTLS_DES_KEY_SIZE] );
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_key_check_key_parity( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -184,6 +161,7 @@ int mbedtls_des_key_check_key_parity( const unsigned char key[MBEDTLS_DES_KEY_SI
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_key_check_weak( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -198,6 +176,7 @@ int mbedtls_des_key_check_weak( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_setkey_enc( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -212,6 +191,7 @@ int mbedtls_des_setkey_enc( mbedtls_des_context *ctx, const unsigned char key[MB
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_setkey_dec( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
 
 /**
@@ -222,6 +202,7 @@ int mbedtls_des_setkey_dec( mbedtls_des_context *ctx, const unsigned char key[MB
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set2key_enc( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] );
 
@@ -233,6 +214,7 @@ int mbedtls_des3_set2key_enc( mbedtls_des3_context *ctx,
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set2key_dec( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] );
 
@@ -244,6 +226,7 @@ int mbedtls_des3_set2key_dec( mbedtls_des3_context *ctx,
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set3key_enc( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] );
 
@@ -255,6 +238,7 @@ int mbedtls_des3_set3key_enc( mbedtls_des3_context *ctx,
  *
  * \return         0
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_set3key_dec( mbedtls_des3_context *ctx,
                       const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] );
 
@@ -271,6 +255,7 @@ int mbedtls_des3_set3key_dec( mbedtls_des3_context *ctx,
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_crypt_ecb( mbedtls_des_context *ctx,
                     const unsigned char input[8],
                     unsigned char output[8] );
@@ -298,6 +283,7 @@ int mbedtls_des_crypt_ecb( mbedtls_des_context *ctx,
  *                 security risk. We recommend considering stronger ciphers
  *                 instead.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des_crypt_cbc( mbedtls_des_context *ctx,
                     int mode,
                     size_t length,
@@ -315,6 +301,7 @@ int mbedtls_des_crypt_cbc( mbedtls_des_context *ctx,
  *
  * \return         0 if successful
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_crypt_ecb( mbedtls_des3_context *ctx,
                      const unsigned char input[8],
                      unsigned char output[8] );
@@ -340,6 +327,7 @@ int mbedtls_des3_crypt_ecb( mbedtls_des3_context *ctx,
  *
  * \return         0 if successful, or MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_des3_crypt_cbc( mbedtls_des3_context *ctx,
                      int mode,
                      size_t length,
@@ -370,6 +358,7 @@ void mbedtls_des_setkey( uint32_t SK[32],
  *
  * \return         0 if successful, or 1 if the test failed
  */
+MBEDTLS_CHECK_RETURN_CRITICAL
 int mbedtls_des_self_test( int verbose );
 
 #endif /* MBEDTLS_SELF_TEST */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/dhm.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/dhm.h
index 11042efb556..c4b15a2c452 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/dhm.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/dhm.h
@@ -45,13 +45,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -64,56 +58,46 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_DHM_H
 #define MBEDTLS_DHM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 /*
  * DHM Error codes
  */
-#define MBEDTLS_ERR_DHM_BAD_INPUT_DATA                    -0x3080  /**< Bad input parameters. */
-#define MBEDTLS_ERR_DHM_READ_PARAMS_FAILED                -0x3100  /**< Reading of the DHM parameters failed. */
-#define MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED                -0x3180  /**< Making of the DHM parameters failed. */
-#define MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED                -0x3200  /**< Reading of the public values failed. */
-#define MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED                -0x3280  /**< Making of the public value failed. */
-#define MBEDTLS_ERR_DHM_CALC_SECRET_FAILED                -0x3300  /**< Calculation of the DHM secret failed. */
-#define MBEDTLS_ERR_DHM_INVALID_FORMAT                    -0x3380  /**< The ASN.1 data is not formatted correctly. */
-#define MBEDTLS_ERR_DHM_ALLOC_FAILED                      -0x3400  /**< Allocation of memory failed. */
-#define MBEDTLS_ERR_DHM_FILE_IO_ERROR                     -0x3480  /**< Read or write of file failed. */
+/** Bad input parameters. */
+#define MBEDTLS_ERR_DHM_BAD_INPUT_DATA                    -0x3080
+/** Reading of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_READ_PARAMS_FAILED                -0x3100
+/** Making of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED                -0x3180
+/** Reading of the public values failed. */
+#define MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED                -0x3200
+/** Making of the public value failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED                -0x3280
+/** Calculation of the DHM secret failed. */
+#define MBEDTLS_ERR_DHM_CALC_SECRET_FAILED                -0x3300
+/** The ASN.1 data is not formatted correctly. */
+#define MBEDTLS_ERR_DHM_INVALID_FORMAT                    -0x3380
+/** Allocation of memory failed. */
+#define MBEDTLS_ERR_DHM_ALLOC_FAILED                      -0x3400
+/** Read or write of file failed. */
+#define MBEDTLS_ERR_DHM_FILE_IO_ERROR                     -0x3480
 
 /* MBEDTLS_ERR_DHM_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_DHM_HW_ACCEL_FAILED                   -0x3500  /**< DHM hardware accelerator failed. */
+/** DHM hardware accelerator failed. */
+#define MBEDTLS_ERR_DHM_HW_ACCEL_FAILED                   -0x3500
 
-#define MBEDTLS_ERR_DHM_SET_GROUP_FAILED                  -0x3580  /**< Setting the modulus and generator failed. */
+/** Setting the modulus and generator failed. */
+#define MBEDTLS_ERR_DHM_SET_GROUP_FAILED                  -0x3580
 
 #ifdef __cplusplus
 extern "C" {
@@ -323,7 +307,6 @@ int mbedtls_dhm_calc_secret( mbedtls_dhm_context *ctx,
 void mbedtls_dhm_free( mbedtls_dhm_context *ctx );
 
 #if defined(MBEDTLS_ASN1_PARSE_C)
-/** \ingroup x509_module */
 /**
  * \brief             This function parses DHM parameters in PEM or DER format.
  *
@@ -342,7 +325,6 @@ int mbedtls_dhm_parse_dhm( mbedtls_dhm_context *dhm, const unsigned char *dhmin,
                            size_t dhminlen );
 
 #if defined(MBEDTLS_FS_IO)
-/** \ingroup x509_module */
 /**
  * \brief          This function loads and parses DHM parameters from a file.
  *
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecdh.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecdh.h
index b9324bc4964..05855cdf10b 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecdh.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecdh.h
@@ -14,13 +14,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,51 +27,23 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ECDH_H
 #define MBEDTLS_ECDH_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ecp.h"
+#include "mbedtls/ecp.h"
 
-/*
- * Use a backward compatible ECDH context.
- *
- * This flag is always enabled for now and future versions might add a
- * configuration option that conditionally undefines this flag.
- * The configuration option in question may have a different name.
- *
- * Features undefining this flag, must have a warning in their description in
- * config.h stating that the feature breaks backward compatibility.
- */
-#define MBEDTLS_ECDH_LEGACY_CONTEXT
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+#undef MBEDTLS_ECDH_LEGACY_CONTEXT
+#include "everest/everest.h"
+#endif
 
 #ifdef __cplusplus
 extern "C" {
@@ -103,6 +69,9 @@ typedef enum
 {
     MBEDTLS_ECDH_VARIANT_NONE = 0,   /*!< Implementation not defined. */
     MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0,/*!< The default Mbed TLS implementation */
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+    MBEDTLS_ECDH_VARIANT_EVEREST     /*!< Everest implementation */
+#endif
 } mbedtls_ecdh_variant;
 
 /**
@@ -156,6 +125,9 @@ typedef struct mbedtls_ecdh_context
     union
     {
         mbedtls_ecdh_context_mbed   mbed_ecdh;
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+        mbedtls_ecdh_context_everest everest_ecdh;
+#endif
     } ctx;                      /*!< Implementation-specific context. The
                                   context in use is specified by the \c var
                                   field. */
@@ -170,6 +142,15 @@ typedef struct mbedtls_ecdh_context
 }
 mbedtls_ecdh_context;
 
+/**
+ * \brief          Check whether a given group can be used for ECDH.
+ *
+ * \param gid      The ECP group ID to check.
+ *
+ * \return         \c 1 if the group can be used, \c 0 otherwise
+ */
+int mbedtls_ecdh_can_do( mbedtls_ecp_group_id gid );
+
 /**
  * \brief           This function generates an ECDH keypair on an elliptic
  *                  curve.
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h
index da02b278643..264a638bb52 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h
@@ -12,13 +12,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -31,60 +25,44 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ECDSA_H
 #define MBEDTLS_ECDSA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ecp.h"
-#include "md.h"
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
 
-/*
- * RFC-4492 page 20:
+/**
+ * \brief           Maximum ECDSA signature size for a given curve bit size
  *
+ * \param bits      Curve size in bits
+ * \return          Maximum signature size in bytes
+ *
+ * \note            This macro returns a compile-time constant if its argument
+ *                  is one. It may evaluate its argument multiple times.
+ */
+/*
  *     Ecdsa-Sig-Value ::= SEQUENCE {
  *         r       INTEGER,
  *         s       INTEGER
  *     }
  *
- * Size is at most
- *    1 (tag) + 1 (len) + 1 (initial 0) + ECP_MAX_BYTES for each of r and s,
- *    twice that + 1 (tag) + 2 (len) for the sequence
- * (assuming ECP_MAX_BYTES is less than 126 for r and s,
- * and less than 124 (total len <= 255) for the sequence)
+ * For each of r and s, the value (V) may include an extra initial "0" bit.
  */
-#if MBEDTLS_ECP_MAX_BYTES > 124
-#error "MBEDTLS_ECP_MAX_BYTES bigger than expected, please fix MBEDTLS_ECDSA_MAX_LEN"
-#endif
+#define MBEDTLS_ECDSA_MAX_SIG_LEN( bits )                               \
+    ( /*T,L of SEQUENCE*/ ( ( bits ) >= 61 * 8 ? 3 : 2 ) +              \
+      /*T,L of r,s*/        2 * ( ( ( bits ) >= 127 * 8 ? 3 : 2 ) +     \
+      /*V of r,s*/                ( ( bits ) + 8 ) / 8 ) )
+
 /** The maximal size of an ECDSA signature in Bytes. */
-#define MBEDTLS_ECDSA_MAX_LEN  ( 3 + 2 * ( 3 + MBEDTLS_ECP_MAX_BYTES ) )
+#define MBEDTLS_ECDSA_MAX_LEN  MBEDTLS_ECDSA_MAX_SIG_LEN( MBEDTLS_ECP_MAX_BITS )
 
 #ifdef __cplusplus
 extern "C" {
@@ -145,6 +123,16 @@ typedef void mbedtls_ecdsa_restart_ctx;
 
 #endif /* MBEDTLS_ECP_RESTARTABLE */
 
+/**
+ * \brief          This function checks whether a given group can be used
+ *                 for ECDSA.
+ *
+ * \param gid      The ECP group ID to check.
+ *
+ * \return         \c 1 if the group can be used, \c 0 otherwise
+ */
+int mbedtls_ecdsa_can_do( mbedtls_ecp_group_id gid );
+
 /**
  * \brief           This function computes the ECDSA signature of a
  *                  previously-hashed message.
@@ -186,6 +174,12 @@ int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s,
                 int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
 
 #if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
 /**
  * \brief           This function computes the ECDSA signature of a
  *                  previously-hashed message, deterministic version.
@@ -237,7 +231,10 @@ int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s,
 int mbedtls_ecdsa_sign_det( mbedtls_ecp_group *grp, mbedtls_mpi *r,
                             mbedtls_mpi *s, const mbedtls_mpi *d,
                             const unsigned char *buf, size_t blen,
-                            mbedtls_md_type_t md_alg );
+                            mbedtls_md_type_t md_alg ) MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
 /**
  * \brief           This function computes the ECDSA signature of a
  *                  previously-hashed message, deterministic version.
@@ -278,12 +275,11 @@ int mbedtls_ecdsa_sign_det( mbedtls_ecp_group *grp, mbedtls_mpi *r,
  *                  error code on failure.
  */
 int mbedtls_ecdsa_sign_det_ext( mbedtls_ecp_group *grp, mbedtls_mpi *r,
-                                mbedtls_mpi *s, const mbedtls_mpi *d,
-                                const unsigned char *buf, size_t blen,
-                                mbedtls_md_type_t md_alg,
-                                int (*f_rng_blind)(void *, unsigned char *,
-                                                   size_t),
-                                void *p_rng_blind );
+                            mbedtls_mpi *s, const mbedtls_mpi *d,
+                            const unsigned char *buf, size_t blen,
+                            mbedtls_md_type_t md_alg,
+                            int (*f_rng_blind)(void *, unsigned char *, size_t),
+                            void *p_rng_blind );
 #endif /* MBEDTLS_ECDSA_DETERMINISTIC */
 
 /**
@@ -362,7 +358,8 @@ int mbedtls_ecdsa_verify( mbedtls_ecp_group *grp,
  *                  the signature written. Must not be \c NULL.
  * \param f_rng     The RNG function. This must not be \c NULL if
  *                  #MBEDTLS_ECDSA_DETERMINISTIC is unset. Otherwise,
- *                  it is unused and may be set to \c NULL.
+ *                  it is used only for blinding and may be set to \c NULL, but
+ *                  doing so is DEPRECATED.
  * \param p_rng     The RNG context to be passed to \p f_rng. This may be
  *                  \c NULL if \p f_rng is \c NULL or doesn't use a context.
  *
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h
index a9b68d00c61..891705d8c4f 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ECJPAKE_H
 #define MBEDTLS_ECJPAKE_H
@@ -66,13 +39,13 @@
  * also be use outside TLS.
  */
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ecp.h"
-#include "md.h"
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp.h
index e4a1ed81cf0..0924341e002 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp.h
@@ -16,13 +16,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -35,56 +29,65 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_ECP_H
 #define MBEDTLS_ECP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 /*
  * ECP error codes
  */
-#define MBEDTLS_ERR_ECP_BAD_INPUT_DATA                    -0x4F80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL                  -0x4F00  /**< The buffer is too small to write to. */
-#define MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE               -0x4E80  /**< The requested feature is not available, for example, the requested curve is not supported. */
-#define MBEDTLS_ERR_ECP_VERIFY_FAILED                     -0x4E00  /**< The signature is not valid. */
-#define MBEDTLS_ERR_ECP_ALLOC_FAILED                      -0x4D80  /**< Memory allocation failed. */
-#define MBEDTLS_ERR_ECP_RANDOM_FAILED                     -0x4D00  /**< Generation of random value, such as ephemeral key, failed. */
-#define MBEDTLS_ERR_ECP_INVALID_KEY                       -0x4C80  /**< Invalid private or public key. */
-#define MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH                  -0x4C00  /**< The buffer contains a valid signature followed by more data. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_ECP_BAD_INPUT_DATA                    -0x4F80
+/** The buffer is too small to write to. */
+#define MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL                  -0x4F00
+/** The requested feature is not available, for example, the requested curve is not supported. */
+#define MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE               -0x4E80
+/** The signature is not valid. */
+#define MBEDTLS_ERR_ECP_VERIFY_FAILED                     -0x4E00
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_ECP_ALLOC_FAILED                      -0x4D80
+/** Generation of random value, such as ephemeral key, failed. */
+#define MBEDTLS_ERR_ECP_RANDOM_FAILED                     -0x4D00
+/** Invalid private or public key. */
+#define MBEDTLS_ERR_ECP_INVALID_KEY                       -0x4C80
+/** The buffer contains a valid signature followed by more data. */
+#define MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH                  -0x4C00
 
 /* MBEDTLS_ERR_ECP_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_ECP_HW_ACCEL_FAILED                   -0x4B80  /**< The ECP hardware accelerator failed. */
-
-#define MBEDTLS_ERR_ECP_IN_PROGRESS                       -0x4B00  /**< Operation in progress, call again with the same parameters to continue. */
+/** The ECP hardware accelerator failed. */
+#define MBEDTLS_ERR_ECP_HW_ACCEL_FAILED                   -0x4B80
+
+/** Operation in progress, call again with the same parameters to continue. */
+#define MBEDTLS_ERR_ECP_IN_PROGRESS                       -0x4B00
+
+/* Flags indicating whether to include code that is specific to certain
+ * types of curves. These flags are for internal library use only. */
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED
+#endif
+#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_ECP_MONTGOMERY_ENABLED
+#endif
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +102,21 @@ extern "C" {
  * parameters. Therefore, only standardized domain parameters from trusted
  * sources should be used. See mbedtls_ecp_group_load().
  */
+/* Note: when adding a new curve:
+ * - Add it at the end of this enum, otherwise you'll break the ABI by
+ *   changing the numerical value for existing curves.
+ * - Increment MBEDTLS_ECP_DP_MAX below if needed.
+ * - Update the calculation of MBEDTLS_ECP_MAX_BITS_MIN below.
+ * - Add the corresponding MBEDTLS_ECP_DP_xxx_ENABLED macro definition to
+ *   config.h.
+ * - List the curve as a dependency of MBEDTLS_ECP_C and
+ *   MBEDTLS_ECDSA_C if supported in check_config.h.
+ * - Add the curve to the appropriate curve type macro
+ *   MBEDTLS_ECP_yyy_ENABLED above.
+ * - Add the necessary definitions to ecp_curves.c.
+ * - Add the curve to the ecp_supported_curves array in ecp.c.
+ * - Add the curve to applicable profiles in x509_crt.c if applicable.
+ */
 typedef enum
 {
     MBEDTLS_ECP_DP_NONE = 0,       /*!< Curve not defined. */
@@ -124,6 +142,16 @@ typedef enum
  */
 #define MBEDTLS_ECP_DP_MAX     12
 
+/*
+ * Curve types
+ */
+typedef enum
+{
+    MBEDTLS_ECP_TYPE_NONE = 0,
+    MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS,    /* y^2 = x^3 + a x + b      */
+    MBEDTLS_ECP_TYPE_MONTGOMERY,           /* y^2 = x^3 + a x^2 + x    */
+} mbedtls_ecp_curve_type;
+
 /**
  * Curve information, for use by other modules.
  */
@@ -268,11 +296,17 @@ mbedtls_ecp_group;
 #error "MBEDTLS_ECP_MAX_BITS is smaller than the largest supported curve"
 #endif
 
-#else
+#elif defined(MBEDTLS_ECP_C)
 /**
  * The maximum size of the groups, that is, of \c N and \c P.
  */
-#define MBEDTLS_ECP_MAX_BITS     521   /**< The maximum size of groups, in bits. */
+#define MBEDTLS_ECP_MAX_BITS     MBEDTLS_ECP_MAX_BITS_MIN
+
+#else
+/* MBEDTLS_ECP_MAX_BITS is not relevant without MBEDTLS_ECP_C, but set it
+ * to a nonzero value so that code that unconditionally allocates an array
+ * of a size based on it keeps working if built without ECC support. */
+#define MBEDTLS_ECP_MAX_BITS 1
 #endif
 
 #define MBEDTLS_ECP_MAX_BYTES    ( ( MBEDTLS_ECP_MAX_BITS + 7 ) / 8 )
@@ -281,7 +315,8 @@ mbedtls_ecp_group;
 #if !defined(MBEDTLS_ECP_WINDOW_SIZE)
 /*
  * Maximum "window" size used for point multiplication.
- * Default: 6.
+ * Default: a point where higher memory usage yields disminishing performance
+ *          returns.
  * Minimum value: 2. Maximum value: 7.
  *
  * Result is an array of at most ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) )
@@ -298,7 +333,7 @@ mbedtls_ecp_group;
  *      224       475     475     453     398     342
  *      192       640     640     633     587     476
  */
-#define MBEDTLS_ECP_WINDOW_SIZE    6   /**< The maximum window size used. */
+#define MBEDTLS_ECP_WINDOW_SIZE    4   /**< The maximum window size used. */
 #endif /* MBEDTLS_ECP_WINDOW_SIZE */
 
 #if !defined(MBEDTLS_ECP_FIXED_POINT_OPTIM)
@@ -482,10 +517,20 @@ void mbedtls_ecp_set_max_ops( unsigned max_ops );
 int mbedtls_ecp_restart_is_enabled( void );
 #endif /* MBEDTLS_ECP_RESTARTABLE */
 
+/*
+ * Get the type of a curve
+ */
+mbedtls_ecp_curve_type mbedtls_ecp_get_type( const mbedtls_ecp_group *grp );
+
 /**
  * \brief           This function retrieves the information defined in
- *                  mbedtls_ecp_curve_info() for all supported curves in order
- *                  of preference.
+ *                  mbedtls_ecp_curve_info() for all supported curves.
+ *
+ * \note            This function returns information about all curves
+ *                  supported by the library. Some curves may not be
+ *                  supported for all algorithms. Call mbedtls_ecdh_can_do()
+ *                  or mbedtls_ecdsa_can_do() to check if a curve is
+ *                  supported for ECDH or ECDSA.
  *
  * \return          A statically allocated array. The last entry is 0.
  */
@@ -496,6 +541,12 @@ const mbedtls_ecp_curve_info *mbedtls_ecp_curve_list( void );
  *                  identifiers of all supported curves in the order of
  *                  preference.
  *
+ * \note            This function returns information about all curves
+ *                  supported by the library. Some curves may not be
+ *                  supported for all algorithms. Call mbedtls_ecdh_can_do()
+ *                  or mbedtls_ecdsa_can_do() to check if a curve is
+ *                  supported for ECDH or ECDSA.
+ *
  * \return          A statically allocated array,
  *                  terminated with MBEDTLS_ECP_DP_NONE.
  */
@@ -691,6 +742,9 @@ int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix,
  * \param P         The point to export. This must be initialized.
  * \param format    The point format. This must be either
  *                  #MBEDTLS_ECP_PF_COMPRESSED or #MBEDTLS_ECP_PF_UNCOMPRESSED.
+ *                  (For groups without these formats, this parameter is
+ *                  ignored. But it still has to be either of the above
+ *                  values.)
  * \param olen      The address at which to store the length of
  *                  the output in Bytes. This must not be \c NULL.
  * \param buf       The output buffer. This must be a writable buffer
@@ -700,11 +754,14 @@ int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix,
  * \return          \c 0 on success.
  * \return          #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the output buffer
  *                  is too small to hold the point.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the point format
+ *                  or the export for the given group is not implemented.
  * \return          Another negative error code on other kinds of failure.
  */
-int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *P,
-                            int format, size_t *olen,
-                            unsigned char *buf, size_t buflen );
+int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp,
+                                    const mbedtls_ecp_point *P,
+                                    int format, size_t *olen,
+                                    unsigned char *buf, size_t buflen );
 
 /**
  * \brief           This function imports a point from unsigned binary data.
@@ -725,8 +782,8 @@ int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, const mbedtls_
  * \return          \c 0 on success.
  * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the input is invalid.
  * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
- * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the point format
- *                  is not implemented.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the import for the
+ *                  given group is not implemented.
  */
 int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp,
                                    mbedtls_ecp_point *P,
@@ -938,6 +995,7 @@ int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
              int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
              mbedtls_ecp_restart_ctx *rs_ctx );
 
+#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED)
 /**
  * \brief           This function performs multiplication and addition of two
  *                  points by integers: \p R = \p m * \p P + \p n * \p Q
@@ -947,6 +1005,10 @@ int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  * \note            In contrast to mbedtls_ecp_mul(), this function does not
  *                  guarantee a constant execution flow and timing.
  *
+ * \note            This function is only defined for short Weierstrass curves.
+ *                  It may not be included in builds without any short
+ *                  Weierstrass curve.
+ *
  * \param grp       The ECP group to use.
  *                  This must be initialized and have group parameters
  *                  set, for example through mbedtls_ecp_group_load().
@@ -965,6 +1027,8 @@ int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  *                  valid private keys, or \p P or \p Q are not valid public
  *                  keys.
  * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p grp does not
+ *                  designate a short Weierstrass curve.
  * \return          Another negative error code on other kinds of failure.
  */
 int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
@@ -982,6 +1046,10 @@ int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  *                  but it can return early and restart according to the limit
  *                  set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
  *
+ * \note            This function is only defined for short Weierstrass curves.
+ *                  It may not be included in builds without any short
+ *                  Weierstrass curve.
+ *
  * \param grp       The ECP group to use.
  *                  This must be initialized and have group parameters
  *                  set, for example through mbedtls_ecp_group_load().
@@ -1001,6 +1069,8 @@ int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
  *                  valid private keys, or \p P or \p Q are not valid public
  *                  keys.
  * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p grp does not
+ *                  designate a short Weierstrass curve.
  * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
  *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
  * \return          Another negative error code on other kinds of failure.
@@ -1010,6 +1080,7 @@ int mbedtls_ecp_muladd_restartable(
              const mbedtls_mpi *m, const mbedtls_ecp_point *P,
              const mbedtls_mpi *n, const mbedtls_ecp_point *Q,
              mbedtls_ecp_restart_ctx *rs_ctx );
+#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */
 
 /**
  * \brief           This function checks that a point is a valid public key
@@ -1161,6 +1232,46 @@ int mbedtls_ecp_gen_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key,
                          int (*f_rng)(void *, unsigned char *, size_t),
                          void *p_rng );
 
+/**
+ * \brief           This function reads an elliptic curve private key.
+ *
+ * \param grp_id    The ECP group identifier.
+ * \param key       The destination key.
+ * \param buf       The buffer containing the binary representation of the
+ *                  key. (Big endian integer for Weierstrass curves, byte
+ *                  string for Montgomery curves.)
+ * \param buflen    The length of the buffer in bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_INVALID_KEY error if the key is
+ *                  invalid.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the operation for
+ *                  the group is not implemented.
+ * \return          Another negative error code on different kinds of failure.
+ */
+int mbedtls_ecp_read_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key,
+                          const unsigned char *buf, size_t buflen );
+
+/**
+ * \brief           This function exports an elliptic curve private key.
+ *
+ * \param key       The private key.
+ * \param buf       The output buffer for containing the binary representation
+ *                  of the key. (Big endian integer for Weierstrass curves, byte
+ *                  string for Montgomery curves.)
+ * \param buflen    The total length of the buffer in bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the \p key
+                    representation is larger than the available space in \p buf.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the operation for
+ *                  the group is not implemented.
+ * \return          Another negative error code on different kinds of failure.
+ */
+int mbedtls_ecp_write_key( mbedtls_ecp_keypair *key,
+                           unsigned char *buf, size_t buflen );
+
 /**
  * \brief           This function checks that the keypair objects
  *                  \p pub and \p prv have the same group and the
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h
index 0047bd4ef91..6a47a8ff27e 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h
@@ -6,13 +6,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -25,27 +19,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 /*
@@ -87,7 +60,7 @@
 #define MBEDTLS_ECP_INTERNAL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -130,7 +103,7 @@ int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp );
  */
 void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp );
 
-#if defined(ECP_SHORTWEIERSTRASS)
+#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED)
 
 #if defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT)
 /**
@@ -270,9 +243,9 @@ int mbedtls_internal_ecp_normalize_jac( const mbedtls_ecp_group *grp,
         mbedtls_ecp_point *pt );
 #endif
 
-#endif /* ECP_SHORTWEIERSTRASS */
+#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */
 
-#if defined(ECP_MONTGOMERY)
+#if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED)
 
 #if defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT)
 int mbedtls_internal_ecp_double_add_mxz( const mbedtls_ecp_group *grp,
@@ -316,7 +289,7 @@ int mbedtls_internal_ecp_normalize_mxz( const mbedtls_ecp_group *grp,
         mbedtls_ecp_point *P );
 #endif
 
-#endif /* ECP_MONTGOMERY */
+#endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */
 
 #endif /* MBEDTLS_ECP_INTERNAL_ALT */
 
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy.h
index 1d6e9b821bf..deb3c50300b 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ENTROPY_H
 #define MBEDTLS_ENTROPY_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -58,28 +31,33 @@
 #include <stddef.h>
 
 #if defined(MBEDTLS_SHA512_C) && !defined(MBEDTLS_ENTROPY_FORCE_SHA256)
-#include "sha512.h"
+#include "mbedtls/sha512.h"
 #define MBEDTLS_ENTROPY_SHA512_ACCUMULATOR
 #else
 #if defined(MBEDTLS_SHA256_C)
 #define MBEDTLS_ENTROPY_SHA256_ACCUMULATOR
-#include "sha256.h"
+#include "mbedtls/sha256.h"
 #endif
 #endif
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 #if defined(MBEDTLS_HAVEGE_C)
-#include "havege.h"
+#include "mbedtls/havege.h"
 #endif
 
-#define MBEDTLS_ERR_ENTROPY_SOURCE_FAILED                 -0x003C  /**< Critical entropy source failure. */
-#define MBEDTLS_ERR_ENTROPY_MAX_SOURCES                   -0x003E  /**< No more sources can be added. */
-#define MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED            -0x0040  /**< No sources have been added to poll. */
-#define MBEDTLS_ERR_ENTROPY_NO_STRONG_SOURCE              -0x003D  /**< No strong sources have been added to poll. */
-#define MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR                 -0x003F  /**< Read/write error in file. */
+/** Critical entropy source failure. */
+#define MBEDTLS_ERR_ENTROPY_SOURCE_FAILED                 -0x003C
+/** No more sources can be added. */
+#define MBEDTLS_ERR_ENTROPY_MAX_SOURCES                   -0x003E
+/** No sources have been added to poll. */
+#define MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED            -0x0040
+/** No strong sources have been added to poll. */
+#define MBEDTLS_ERR_ENTROPY_NO_STRONG_SOURCE              -0x003D
+/** Read/write error in file. */
+#define MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR                 -0x003F
 
 /**
  * \name SECTION: Module settings
@@ -152,7 +130,7 @@ typedef struct mbedtls_entropy_context
                               * -1 after free. */
 #if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR)
     mbedtls_sha512_context  accumulator;
-#else
+#elif defined(MBEDTLS_ENTROPY_SHA256_ACCUMULATOR)
     mbedtls_sha256_context  accumulator;
 #endif
     int             source_count; /* Number of entries used in source. */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h
index c348fe52d42..e1d7491aa21 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ENTROPY_POLL_H
 #define MBEDTLS_ENTROPY_POLL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/error.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/error.h
index fa8582a3914..50f25385080 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/error.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/error.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,39 +18,23 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_ERROR_H
 #define MBEDTLS_ERROR_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
 
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
 /**
  * Error code layout.
  *
@@ -77,9 +55,10 @@
  * For historical reasons, low-level error codes are divided in even and odd,
  * even codes were assigned first, and -1 is reserved for other errors.
  *
- * Low-level module errors (0x0002-0x007E, 0x0003-0x007F)
+ * Low-level module errors (0x0002-0x007E, 0x0001-0x007F)
  *
  * Module   Nr  Codes assigned
+ * ERROR     2  0x006E          0x0001
  * MPI       7  0x0002-0x0010
  * GCM       3  0x0012-0x0014   0x0013-0x0013
  * BLOWFISH  3  0x0016-0x0018   0x0017-0x0017
@@ -111,7 +90,7 @@
  * CHACHA20  3                  0x0051-0x0055
  * POLY1305  3                  0x0057-0x005B
  * CHACHAPOLY 2 0x0054-0x0056
- * PLATFORM  1  0x0070-0x0072
+ * PLATFORM  2  0x0070-0x0072
  *
  * High-level module nr (3 bits - 0x0...-0x7...)
  * Name      ID  Nr of Errors
@@ -125,9 +104,9 @@
  * ECP       4   10 (Started from top)
  * MD        5   5
  * HKDF      5   1 (Started from top)
- * SSL       5   1 (Started from 0x5E80)
- * CIPHER    6   8
- * SSL       6   23 (Started from top)
+ * SSL       5   2 (Started from 0x5F00)
+ * CIPHER    6   8 (Started from 0x6080)
+ * SSL       6   24 (Started from top, plus 0x6000)
  * SSL       7   32
  *
  * Module dependent error code (5 bits 0x.00.-0x.F8.)
@@ -137,6 +116,59 @@
 extern "C" {
 #endif
 
+/** Generic error */
+#define MBEDTLS_ERR_ERROR_GENERIC_ERROR       -0x0001
+/** This is a bug in the library */
+#define MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED -0x006E
+
+/**
+ * \brief Combines a high-level and low-level error code together.
+ *
+ *        Wrapper macro for mbedtls_error_add(). See that function for
+ *        more details.
+ */
+#define MBEDTLS_ERROR_ADD( high, low ) \
+        mbedtls_error_add( high, low, __FILE__, __LINE__ )
+
+#if defined(MBEDTLS_TEST_HOOKS)
+/**
+ * \brief Testing hook called before adding/combining two error codes together.
+ *        Only used when invasive testing is enabled via MBEDTLS_TEST_HOOKS.
+ */
+extern void (*mbedtls_test_hook_error_add)( int, int, const char *, int );
+#endif
+
+/**
+ * \brief Combines a high-level and low-level error code together.
+ *
+ *        This function can be called directly however it is usually
+ *        called via the #MBEDTLS_ERROR_ADD macro.
+ *
+ *        While a value of zero is not a negative error code, it is still an
+ *        error code (that denotes success) and can be combined with both a
+ *        negative error code or another value of zero.
+ *
+ * \note  When invasive testing is enabled via #MBEDTLS_TEST_HOOKS, also try to
+ *        call \link mbedtls_test_hook_error_add \endlink.
+ *
+ * \param high      high-level error code. See error.h for more details.
+ * \param low       low-level error code. See error.h for more details.
+ * \param file      file where this error code addition occurred.
+ * \param line      line where this error code addition occurred.
+ */
+static inline int mbedtls_error_add( int high, int low,
+                                     const char *file, int line )
+{
+#if defined(MBEDTLS_TEST_HOOKS)
+    if( *mbedtls_test_hook_error_add != NULL )
+        ( *mbedtls_test_hook_error_add )( high, low, file, line );
+#endif
+    (void)file;
+    (void)line;
+
+    return( high + low );
+}
+
 /**
  * \brief Translate a mbed TLS error code into a string representation,
  *        Result is truncated if necessary and always includes a terminating
@@ -148,6 +180,36 @@ extern "C" {
  */
 void mbedtls_strerror( int errnum, char *buffer, size_t buflen );
 
+/**
+ * \brief Translate the high-level part of an Mbed TLS error code into a string
+ *        representation.
+ *
+ * This function returns a const pointer to an un-modifiable string. The caller
+ * must not try to modify the string. It is intended to be used mostly for
+ * logging purposes.
+ *
+ * \param error_code    error code
+ *
+ * \return The string representation of the error code, or \c NULL if the error
+ *         code is unknown.
+ */
+const char * mbedtls_high_level_strerr( int error_code );
+
+/**
+ * \brief Translate the low-level part of an Mbed TLS error code into a string
+ *        representation.
+ *
+ * This function returns a const pointer to an un-modifiable string. The caller
+ * must not try to modify the string. It is intended to be used mostly for
+ * logging purposes.
+ *
+ * \param error_code    error code
+ *
+ * \return The string representation of the error code, or \c NULL if the error
+ *         code is unknown.
+ */
+const char * mbedtls_low_level_strerr( int error_code );
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/gcm.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/gcm.h
index 1201fbd4f10..9723a17b65f 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/gcm.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/gcm.h
@@ -13,13 +13,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -32,51 +26,33 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_GCM_H
 #define MBEDTLS_GCM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
 #include <stdint.h>
 
 #define MBEDTLS_GCM_ENCRYPT     1
 #define MBEDTLS_GCM_DECRYPT     0
 
-#define MBEDTLS_ERR_GCM_AUTH_FAILED                       -0x0012  /**< Authenticated decryption failed. */
+/** Authenticated decryption failed. */
+#define MBEDTLS_ERR_GCM_AUTH_FAILED                       -0x0012
 
 /* MBEDTLS_ERR_GCM_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_GCM_HW_ACCEL_FAILED                   -0x0013  /**< GCM hardware accelerator failed. */
+/** GCM hardware accelerator failed. */
+#define MBEDTLS_ERR_GCM_HW_ACCEL_FAILED                   -0x0013
 
-#define MBEDTLS_ERR_GCM_BAD_INPUT                         -0x0014  /**< Bad input parameters to function. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_GCM_BAD_INPUT                         -0x0014
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/havege.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/havege.h
index e90839ddeb4..7d27039e8c7 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/havege.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/havege.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,18 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_HAVEGE_H
 #define MBEDTLS_HAVEGE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
+#include <stdint.h>
 
 #define MBEDTLS_HAVEGE_COLLECT_SIZE 1024
 
@@ -68,9 +42,9 @@ extern "C" {
  */
 typedef struct mbedtls_havege_state
 {
-    int PT1, PT2, offset[2];
-    int pool[MBEDTLS_HAVEGE_COLLECT_SIZE];
-    int WALK[8192];
+    uint32_t PT1, PT2, offset[2];
+    uint32_t pool[MBEDTLS_HAVEGE_COLLECT_SIZE];
+    uint32_t WALK[8192];
 }
 mbedtls_havege_state;
 
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hkdf.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hkdf.h
index 07ffe83b23d..223004b8ede 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hkdf.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hkdf.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,44 +21,24 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_HKDF_H
 #define MBEDTLS_HKDF_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 /**
  *  \name HKDF Error codes
  *  \{
  */
-#define MBEDTLS_ERR_HKDF_BAD_INPUT_DATA  -0x5F80  /**< Bad input parameters to function. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_HKDF_BAD_INPUT_DATA  -0x5F80
 /* \} name */
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
index 5718e187a9f..79132d4d910 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,50 +22,33 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_HMAC_DRBG_H
 #define MBEDTLS_HMAC_DRBG_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /*
  * Error codes
  */
-#define MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG              -0x0003  /**< Too many random requested in single call. */
-#define MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG                -0x0005  /**< Input too large (Entropy + additional). */
-#define MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR                -0x0007  /**< Read/write error in file. */
-#define MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED        -0x0009  /**< The entropy source failed. */
+/** Too many random requested in single call. */
+#define MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG              -0x0003
+/** Input too large (Entropy + additional). */
+#define MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG                -0x0005
+/** Read/write error in file. */
+#define MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR                -0x0007
+/** The entropy source failed. */
+#define MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED        -0x0009
 
 /**
  * \name SECTION: Module settings
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md.h
index 2ba8d9e7a91..84fafd2ac77 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,27 +20,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_MD_H
@@ -55,18 +28,24 @@
 #include <stddef.h>
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
+#include "mbedtls/platform_util.h"
 
-#define MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE                -0x5080  /**< The selected feature is not available. */
-#define MBEDTLS_ERR_MD_BAD_INPUT_DATA                     -0x5100  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_MD_ALLOC_FAILED                       -0x5180  /**< Failed to allocate memory. */
-#define MBEDTLS_ERR_MD_FILE_IO_ERROR                      -0x5200  /**< Opening or reading of file failed. */
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE                -0x5080
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_MD_BAD_INPUT_DATA                     -0x5100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_MD_ALLOC_FAILED                       -0x5180
+/** Opening or reading of file failed. */
+#define MBEDTLS_ERR_MD_FILE_IO_ERROR                      -0x5200
 
 /* MBEDTLS_ERR_MD_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD_HW_ACCEL_FAILED                    -0x5280  /**< MD hardware accelerator failed. */
+/** MD hardware accelerator failed. */
+#define MBEDTLS_ERR_MD_HW_ACCEL_FAILED                    -0x5280
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +78,12 @@ typedef enum {
 #define MBEDTLS_MD_MAX_SIZE         32  /* longest known is SHA256 or less */
 #endif
 
+#if defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_MD_MAX_BLOCK_SIZE         128
+#else
+#define MBEDTLS_MD_MAX_BLOCK_SIZE         64
+#endif
+
 /**
  * Opaque struct defined in md_internal.h.
  */
@@ -226,6 +211,7 @@ int mbedtls_md_init_ctx( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_
  *                  failure.
  * \return          #MBEDTLS_ERR_MD_ALLOC_FAILED on memory-allocation failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_setup( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info, int hmac );
 
 /**
@@ -247,6 +233,7 @@ int mbedtls_md_setup( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_inf
  * \return          \c 0 on success.
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_clone( mbedtls_md_context_t *dst,
                       const mbedtls_md_context_t *src );
 
@@ -296,6 +283,7 @@ const char *mbedtls_md_get_name( const mbedtls_md_info_t *md_info );
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_starts( mbedtls_md_context_t *ctx );
 
 /**
@@ -314,6 +302,7 @@ int mbedtls_md_starts( mbedtls_md_context_t *ctx );
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_update( mbedtls_md_context_t *ctx, const unsigned char *input, size_t ilen );
 
 /**
@@ -334,6 +323,7 @@ int mbedtls_md_update( mbedtls_md_context_t *ctx, const unsigned char *input, si
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_finish( mbedtls_md_context_t *ctx, unsigned char *output );
 
 /**
@@ -354,6 +344,7 @@ int mbedtls_md_finish( mbedtls_md_context_t *ctx, unsigned char *output );
  * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                 failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md( const mbedtls_md_info_t *md_info, const unsigned char *input, size_t ilen,
         unsigned char *output );
 
@@ -375,6 +366,7 @@ int mbedtls_md( const mbedtls_md_info_t *md_info, const unsigned char *input, si
  *                 the file pointed by \p path.
  * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA if \p md_info was NULL.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_file( const mbedtls_md_info_t *md_info, const char *path,
                      unsigned char *output );
 #endif /* MBEDTLS_FS_IO */
@@ -397,6 +389,7 @@ int mbedtls_md_file( const mbedtls_md_info_t *md_info, const char *path,
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_starts( mbedtls_md_context_t *ctx, const unsigned char *key,
                     size_t keylen );
 
@@ -419,6 +412,7 @@ int mbedtls_md_hmac_starts( mbedtls_md_context_t *ctx, const unsigned char *key,
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_update( mbedtls_md_context_t *ctx, const unsigned char *input,
                     size_t ilen );
 
@@ -440,6 +434,7 @@ int mbedtls_md_hmac_update( mbedtls_md_context_t *ctx, const unsigned char *inpu
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_finish( mbedtls_md_context_t *ctx, unsigned char *output);
 
 /**
@@ -457,6 +452,7 @@ int mbedtls_md_hmac_finish( mbedtls_md_context_t *ctx, unsigned char *output);
  * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                  failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac_reset( mbedtls_md_context_t *ctx );
 
 /**
@@ -481,11 +477,13 @@ int mbedtls_md_hmac_reset( mbedtls_md_context_t *ctx );
  * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
  *                 failure.
  */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_hmac( const mbedtls_md_info_t *md_info, const unsigned char *key, size_t keylen,
                 const unsigned char *input, size_t ilen,
                 unsigned char *output );
 
 /* Internal use */
+MBEDTLS_CHECK_RETURN_TYPICAL
 int mbedtls_md_process( mbedtls_md_context_t *ctx, const unsigned char *data );
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md2.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md2.h
index 9607df66baf..7f3d5cf446c 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md2.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md2.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -29,33 +23,12 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_MD2_H
 #define MBEDTLS_MD2_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,7 +36,8 @@
 #include <stddef.h>
 
 /* MBEDTLS_ERR_MD2_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD2_HW_ACCEL_FAILED                   -0x002B  /**< MD2 hardware accelerator failed */
+/** MD2 hardware accelerator failed */
+#define MBEDTLS_ERR_MD2_HW_ACCEL_FAILED                   -0x002B
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md4.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md4.h
index 6ceaf7a2f69..0238c6723a6 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md4.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md4.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -29,33 +23,12 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 #ifndef MBEDTLS_MD4_H
 #define MBEDTLS_MD4_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -64,7 +37,8 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_MD4_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD4_HW_ACCEL_FAILED                   -0x002D  /**< MD4 hardware accelerator failed */
+/** MD4 hardware accelerator failed */
+#define MBEDTLS_ERR_MD4_HW_ACCEL_FAILED                   -0x002D
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md5.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md5.h
index b9d0ca929a0..73e4dd2c2a7 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md5.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md5.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,33 +22,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_MD5_H
 #define MBEDTLS_MD5_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,7 +36,8 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_MD5_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_MD5_HW_ACCEL_FAILED                   -0x002F  /**< MD5 hardware accelerator failed */
+/** MD5 hardware accelerator failed */
+#define MBEDTLS_ERR_MD5_HW_ACCEL_FAILED                   -0x002F
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md_internal.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md_internal.h
index 847f50aa0a8..f33cdf6086d 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md_internal.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/md_internal.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,38 +22,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_MD_WRAP_H
 #define MBEDTLS_MD_WRAP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -71,42 +44,17 @@ extern "C" {
  */
 struct mbedtls_md_info_t
 {
-    /** Digest identifier */
-    mbedtls_md_type_t type;
-
     /** Name of the message digest */
     const char * name;
 
+    /** Digest identifier */
+    mbedtls_md_type_t type;
+
     /** Output length of the digest function in bytes */
-    int size;
+    unsigned char size;
 
     /** Block length of the digest function in bytes */
-    int block_size;
-
-    /** Digest initialisation function */
-    int (*starts_func)( void *ctx );
-
-    /** Digest update function */
-    int (*update_func)( void *ctx, const unsigned char *input, size_t ilen );
-
-    /** Digest finalisation function */
-    int (*finish_func)( void *ctx, unsigned char *output );
-
-    /** Generic digest function */
-    int (*digest_func)( const unsigned char *input, size_t ilen,
-                        unsigned char *output );
-
-    /** Allocate a new context */
-    void * (*ctx_alloc_func)( void );
-
-    /** Free the given context */
-    void (*ctx_free_func)( void *ctx );
-
-    /** Clone state from a context */
-    void (*clone_func)( void *dst, const void *src );
-
-    /** Internal use only */
-    int (*process_func)( void *ctx, const unsigned char *input );
+    unsigned char block_size;
 };
 
 #if defined(MBEDTLS_MD2_C)
@@ -129,7 +77,9 @@ extern const mbedtls_md_info_t mbedtls_sha224_info;
 extern const mbedtls_md_info_t mbedtls_sha256_info;
 #endif
 #if defined(MBEDTLS_SHA512_C)
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
 extern const mbedtls_md_info_t mbedtls_sha384_info;
+#endif
 extern const mbedtls_md_info_t mbedtls_sha512_info;
 #endif
 
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h
index 89c06174957..233977252a3 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_MEMORY_BUFFER_ALLOC_H
 #define MBEDTLS_MEMORY_BUFFER_ALLOC_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net.h
index 6c7a49d3bdf..66921887da0 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,36 +20,15 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #if !defined(MBEDTLS_DEPRECATED_REMOVED)
-#include "net_sockets.h"
+#include "mbedtls/net_sockets.h"
 #if defined(MBEDTLS_DEPRECATED_WARNING)
 #warning "Deprecated header file: Superseded by mbedtls/net_sockets.h"
 #endif /* MBEDTLS_DEPRECATED_WARNING */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
index c6e1a0270e8..ceb7d5f6527 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
@@ -21,13 +21,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -40,55 +34,47 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_NET_SOCKETS_H
 #define MBEDTLS_NET_SOCKETS_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #include <stddef.h>
 #include <stdint.h>
 
-#define MBEDTLS_ERR_NET_SOCKET_FAILED                     -0x0042  /**< Failed to open a socket. */
-#define MBEDTLS_ERR_NET_CONNECT_FAILED                    -0x0044  /**< The connection to the given server / port failed. */
-#define MBEDTLS_ERR_NET_BIND_FAILED                       -0x0046  /**< Binding of the socket failed. */
-#define MBEDTLS_ERR_NET_LISTEN_FAILED                     -0x0048  /**< Could not listen on the socket. */
-#define MBEDTLS_ERR_NET_ACCEPT_FAILED                     -0x004A  /**< Could not accept the incoming connection. */
-#define MBEDTLS_ERR_NET_RECV_FAILED                       -0x004C  /**< Reading information from the socket failed. */
-#define MBEDTLS_ERR_NET_SEND_FAILED                       -0x004E  /**< Sending information through the socket failed. */
-#define MBEDTLS_ERR_NET_CONN_RESET                        -0x0050  /**< Connection was reset by peer. */
-#define MBEDTLS_ERR_NET_UNKNOWN_HOST                      -0x0052  /**< Failed to get an IP address for the given hostname. */
-#define MBEDTLS_ERR_NET_BUFFER_TOO_SMALL                  -0x0043  /**< Buffer is too small to hold the data. */
-#define MBEDTLS_ERR_NET_INVALID_CONTEXT                   -0x0045  /**< The context is invalid, eg because it was free()ed. */
-#define MBEDTLS_ERR_NET_POLL_FAILED                       -0x0047  /**< Polling the net context failed. */
-#define MBEDTLS_ERR_NET_BAD_INPUT_DATA                    -0x0049  /**< Input invalid. */
+/** Failed to open a socket. */
+#define MBEDTLS_ERR_NET_SOCKET_FAILED                     -0x0042
+/** The connection to the given server / port failed. */
+#define MBEDTLS_ERR_NET_CONNECT_FAILED                    -0x0044
+/** Binding of the socket failed. */
+#define MBEDTLS_ERR_NET_BIND_FAILED                       -0x0046
+/** Could not listen on the socket. */
+#define MBEDTLS_ERR_NET_LISTEN_FAILED                     -0x0048
+/** Could not accept the incoming connection. */
+#define MBEDTLS_ERR_NET_ACCEPT_FAILED                     -0x004A
+/** Reading information from the socket failed. */
+#define MBEDTLS_ERR_NET_RECV_FAILED                       -0x004C
+/** Sending information through the socket failed. */
+#define MBEDTLS_ERR_NET_SEND_FAILED                       -0x004E
+/** Connection was reset by peer. */
+#define MBEDTLS_ERR_NET_CONN_RESET                        -0x0050
+/** Failed to get an IP address for the given hostname. */
+#define MBEDTLS_ERR_NET_UNKNOWN_HOST                      -0x0052
+/** Buffer is too small to hold the data. */
+#define MBEDTLS_ERR_NET_BUFFER_TOO_SMALL                  -0x0043
+/** The context is invalid, eg because it was free()ed. */
+#define MBEDTLS_ERR_NET_INVALID_CONTEXT                   -0x0045
+/** Polling the net context failed. */
+#define MBEDTLS_ERR_NET_POLL_FAILED                       -0x0047
+/** Input invalid. */
+#define MBEDTLS_ERR_NET_BAD_INPUT_DATA                    -0x0049
 
 #define MBEDTLS_NET_LISTEN_BACKLOG         10 /**< The backlog that listen() should use. */
 
@@ -294,6 +280,13 @@ int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len );
 int mbedtls_net_recv_timeout( void *ctx, unsigned char *buf, size_t len,
                       uint32_t timeout );
 
+/**
+ * \brief          Closes down the connection and free associated data
+ *
+ * \param ctx      The context to close
+ */
+void mbedtls_net_close( mbedtls_net_context *ctx );
+
 /**
  * \brief          Gracefully shutdown the connection and free associated data
  *
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h
index 94356569942..7f3e64a525d 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h
@@ -17,13 +17,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -36,39 +30,18 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_NIST_KW_H
 #define MBEDTLS_NIST_KW_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/oid.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/oid.h
index 4a7e3b4b3fd..1c39186a491 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/oid.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/oid.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,56 +18,55 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_OID_H
 #define MBEDTLS_OID_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
-#include "pk.h"
+#include "mbedtls/asn1.h"
+#include "mbedtls/pk.h"
 
 #include <stddef.h>
 
 #if defined(MBEDTLS_CIPHER_C)
-#include "cipher.h"
+#include "mbedtls/cipher.h"
 #endif
 
 #if defined(MBEDTLS_MD_C)
-#include "md.h"
+#include "mbedtls/md.h"
 #endif
 
-#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C)
-#include "x509.h"
-#endif
+/** OID is not found. */
+#define MBEDTLS_ERR_OID_NOT_FOUND                         -0x002E
+/** output buffer is too small */
+#define MBEDTLS_ERR_OID_BUF_TOO_SMALL                     -0x000B
 
-#define MBEDTLS_ERR_OID_NOT_FOUND                         -0x002E  /**< OID is not found. */
-#define MBEDTLS_ERR_OID_BUF_TOO_SMALL                     -0x000B  /**< output buffer is too small */
+/* This is for the benefit of X.509, but defined here in order to avoid
+ * having a "backwards" include of x.509.h here */
+/*
+ * X.509 extension types (internal, arbitrary values for bitsets)
+ */
+#define MBEDTLS_OID_X509_EXT_AUTHORITY_KEY_IDENTIFIER    (1 << 0)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_KEY_IDENTIFIER      (1 << 1)
+#define MBEDTLS_OID_X509_EXT_KEY_USAGE                   (1 << 2)
+#define MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES        (1 << 3)
+#define MBEDTLS_OID_X509_EXT_POLICY_MAPPINGS             (1 << 4)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_ALT_NAME            (1 << 5)
+#define MBEDTLS_OID_X509_EXT_ISSUER_ALT_NAME             (1 << 6)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_DIRECTORY_ATTRS     (1 << 7)
+#define MBEDTLS_OID_X509_EXT_BASIC_CONSTRAINTS           (1 << 8)
+#define MBEDTLS_OID_X509_EXT_NAME_CONSTRAINTS            (1 << 9)
+#define MBEDTLS_OID_X509_EXT_POLICY_CONSTRAINTS          (1 << 10)
+#define MBEDTLS_OID_X509_EXT_EXTENDED_KEY_USAGE          (1 << 11)
+#define MBEDTLS_OID_X509_EXT_CRL_DISTRIBUTION_POINTS     (1 << 12)
+#define MBEDTLS_OID_X509_EXT_INIHIBIT_ANYPOLICY          (1 << 13)
+#define MBEDTLS_OID_X509_EXT_FRESHEST_CRL                (1 << 14)
+#define MBEDTLS_OID_X509_EXT_NS_CERT_TYPE                (1 << 16)
 
 /*
  * Top level OID tuples
@@ -129,7 +122,8 @@
  * { iso(1) identified-organization(3) dod(6) internet(1)
  *                      security(5) mechanisms(5) pkix(7) }
  */
-#define MBEDTLS_OID_PKIX                        MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_DOD "\x01\x05\x05\x07"
+#define MBEDTLS_OID_INTERNET                    MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_DOD "\x01"
+#define MBEDTLS_OID_PKIX                        MBEDTLS_OID_INTERNET "\x05\x05\x07"
 
 /*
  * Arc for standard naming attributes
@@ -174,6 +168,11 @@
 #define MBEDTLS_OID_INIHIBIT_ANYPOLICY          MBEDTLS_OID_ID_CE "\x36" /**< id-ce-inhibitAnyPolicy OBJECT IDENTIFIER ::=  { id-ce 54 } */
 #define MBEDTLS_OID_FRESHEST_CRL                MBEDTLS_OID_ID_CE "\x2E" /**< id-ce-freshestCRL OBJECT IDENTIFIER ::=  { id-ce 46 } */
 
+/*
+ * Certificate policies
+ */
+#define MBEDTLS_OID_ANY_POLICY              MBEDTLS_OID_CERTIFICATE_POLICIES "\x00" /**< anyPolicy OBJECT IDENTIFIER ::= { id-ce-certificatePolicies 0 } */
+
 /*
  * Netscape certificate extensions
  */
@@ -208,6 +207,16 @@
 #define MBEDTLS_OID_TIME_STAMPING               MBEDTLS_OID_KP "\x08" /**< id-kp-timeStamping OBJECT IDENTIFIER ::= { id-kp 8 } */
 #define MBEDTLS_OID_OCSP_SIGNING                MBEDTLS_OID_KP "\x09" /**< id-kp-OCSPSigning OBJECT IDENTIFIER ::= { id-kp 9 } */
 
+/**
+ * Wi-SUN Alliance Field Area Network
+ * { iso(1) identified-organization(3) dod(6) internet(1)
+ *                      private(4) enterprise(1) WiSUN(45605) FieldAreaNetwork(1) }
+ */
+#define MBEDTLS_OID_WISUN_FAN                   MBEDTLS_OID_INTERNET "\x04\x01\x82\xe4\x25\x01"
+
+#define MBEDTLS_OID_ON                          MBEDTLS_OID_PKIX "\x08" /**< id-on OBJECT IDENTIFIER ::= { id-pkix 8 } */
+#define MBEDTLS_OID_ON_HW_MODULE_NAME           MBEDTLS_OID_ON "\x04" /**< id-on-hardwareModuleName OBJECT IDENTIFIER ::= { id-on 4 } */
+
 /*
  * PKCS definition OIDs
  */
@@ -253,6 +262,8 @@
 
 #define MBEDTLS_OID_DIGEST_ALG_SHA512           MBEDTLS_OID_NIST_ALG "\x02\x03" /**< id-mbedtls_sha512 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 3 } */
 
+#define MBEDTLS_OID_DIGEST_ALG_RIPEMD160        MBEDTLS_OID_TELETRUST "\x03\x02\x01" /**< id-ripemd160 OBJECT IDENTIFIER :: { iso(1) identified-organization(3) teletrust(36) algorithm(3) hashAlgorithm(2) ripemd160(1) } */
+
 #define MBEDTLS_OID_HMAC_SHA1                   MBEDTLS_OID_RSA_COMPANY "\x02\x07" /**< id-hmacWithSHA1 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 7 } */
 
 #define MBEDTLS_OID_HMAC_SHA224                 MBEDTLS_OID_RSA_COMPANY "\x02\x08" /**< id-hmacWithSHA224 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 8 } */
@@ -449,7 +460,6 @@ typedef struct mbedtls_oid_descriptor_t
  */
 int mbedtls_oid_get_numeric_string( char *buf, size_t size, const mbedtls_asn1_buf *oid );
 
-#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C)
 /**
  * \brief          Translate an X.509 extension OID into local values
  *
@@ -459,7 +469,6 @@ int mbedtls_oid_get_numeric_string( char *buf, size_t size, const mbedtls_asn1_b
  * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
  */
 int mbedtls_oid_get_x509_ext_type( const mbedtls_asn1_buf *oid, int *ext_type );
-#endif
 
 /**
  * \brief          Translate an X.509 attribute type OID into the short name
@@ -585,6 +594,16 @@ int mbedtls_oid_get_md_hmac( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_
  */
 int mbedtls_oid_get_extended_key_usage( const mbedtls_asn1_buf *oid, const char **desc );
 
+/**
+ * \brief          Translate certificate policies OID into description
+ *
+ * \param oid      OID to use
+ * \param desc     place to store string pointer
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_certificate_policies( const mbedtls_asn1_buf *oid, const char **desc );
+
 /**
  * \brief          Translate md_type into hash algorithm OID
  *
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/padlock.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/padlock.h
index 0e4a6bbf69f..624d02dff55 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/padlock.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/padlock.h
@@ -9,13 +9,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -28,40 +22,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PADLOCK_H
 #define MBEDTLS_PADLOCK_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "aes.h"
+#include "mbedtls/aes.h"
 
-#define MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED               -0x0030  /**< Input data should be aligned. */
+/** Input data should be aligned. */
+#define MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED               -0x0030
 
 #if defined(__has_feature)
 #if __has_feature(address_sanitizer)
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pem.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pem.h
index c9df7ca6e86..dfb4ff218e6 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pem.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pem.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PEM_H
 #define MBEDTLS_PEM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,15 +36,24 @@
  * PEM data.
  * \{
  */
-#define MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT          -0x1080  /**< No PEM header or footer found. */
-#define MBEDTLS_ERR_PEM_INVALID_DATA                      -0x1100  /**< PEM string is not as expected. */
-#define MBEDTLS_ERR_PEM_ALLOC_FAILED                      -0x1180  /**< Failed to allocate memory. */
-#define MBEDTLS_ERR_PEM_INVALID_ENC_IV                    -0x1200  /**< RSA IV is not in hex-format. */
-#define MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG                   -0x1280  /**< Unsupported key encryption algorithm. */
-#define MBEDTLS_ERR_PEM_PASSWORD_REQUIRED                 -0x1300  /**< Private key password can't be empty. */
-#define MBEDTLS_ERR_PEM_PASSWORD_MISMATCH                 -0x1380  /**< Given private key password does not allow for correct decryption. */
-#define MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE               -0x1400  /**< Unavailable feature, e.g. hashing/encryption combination. */
-#define MBEDTLS_ERR_PEM_BAD_INPUT_DATA                    -0x1480  /**< Bad input parameters to function. */
+/** No PEM header or footer found. */
+#define MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT          -0x1080
+/** PEM string is not as expected. */
+#define MBEDTLS_ERR_PEM_INVALID_DATA                      -0x1100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_PEM_ALLOC_FAILED                      -0x1180
+/** RSA IV is not in hex-format. */
+#define MBEDTLS_ERR_PEM_INVALID_ENC_IV                    -0x1200
+/** Unsupported key encryption algorithm. */
+#define MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG                   -0x1280
+/** Private key password can't be empty. */
+#define MBEDTLS_ERR_PEM_PASSWORD_REQUIRED                 -0x1300
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PEM_PASSWORD_MISMATCH                 -0x1380
+/** Unavailable feature, e.g. hashing/encryption combination. */
+#define MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE               -0x1400
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PEM_BAD_INPUT_DATA                    -0x1480
 /* \} name */
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pk.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pk.h
index 20d51d4f38c..8f2abf2a608 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pk.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pk.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,50 +18,33 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_PK_H
 #define MBEDTLS_PK_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
+#include "mbedtls/md.h"
 
 #if defined(MBEDTLS_RSA_C)
-#include "rsa.h"
+#include "mbedtls/rsa.h"
 #endif
 
 #if defined(MBEDTLS_ECP_C)
-#include "ecp.h"
+#include "mbedtls/ecp.h"
 #endif
 
 #if defined(MBEDTLS_ECDSA_C)
-#include "ecdsa.h"
+#include "mbedtls/ecdsa.h"
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
 #endif
 
 #if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
@@ -75,23 +52,38 @@
 #define inline __inline
 #endif
 
-#define MBEDTLS_ERR_PK_ALLOC_FAILED        -0x3F80  /**< Memory allocation failed. */
-#define MBEDTLS_ERR_PK_TYPE_MISMATCH       -0x3F00  /**< Type mismatch, eg attempt to encrypt with an ECDSA key */
-#define MBEDTLS_ERR_PK_BAD_INPUT_DATA      -0x3E80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_PK_FILE_IO_ERROR       -0x3E00  /**< Read/write of file failed. */
-#define MBEDTLS_ERR_PK_KEY_INVALID_VERSION -0x3D80  /**< Unsupported key version */
-#define MBEDTLS_ERR_PK_KEY_INVALID_FORMAT  -0x3D00  /**< Invalid key tag or value. */
-#define MBEDTLS_ERR_PK_UNKNOWN_PK_ALG      -0x3C80  /**< Key algorithm is unsupported (only RSA and EC are supported). */
-#define MBEDTLS_ERR_PK_PASSWORD_REQUIRED   -0x3C00  /**< Private key password can't be empty. */
-#define MBEDTLS_ERR_PK_PASSWORD_MISMATCH   -0x3B80  /**< Given private key password does not allow for correct decryption. */
-#define MBEDTLS_ERR_PK_INVALID_PUBKEY      -0x3B00  /**< The pubkey tag or value is invalid (only RSA and EC are supported). */
-#define MBEDTLS_ERR_PK_INVALID_ALG         -0x3A80  /**< The algorithm tag or value is invalid. */
-#define MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE -0x3A00  /**< Elliptic curve is unsupported (only NIST curves are supported). */
-#define MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE -0x3980  /**< Unavailable feature, e.g. RSA disabled for RSA key. */
-#define MBEDTLS_ERR_PK_SIG_LEN_MISMATCH    -0x3900  /**< The buffer contains a valid signature followed by more data. */
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_PK_ALLOC_FAILED        -0x3F80
+/** Type mismatch, eg attempt to encrypt with an ECDSA key */
+#define MBEDTLS_ERR_PK_TYPE_MISMATCH       -0x3F00
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PK_BAD_INPUT_DATA      -0x3E80
+/** Read/write of file failed. */
+#define MBEDTLS_ERR_PK_FILE_IO_ERROR       -0x3E00
+/** Unsupported key version */
+#define MBEDTLS_ERR_PK_KEY_INVALID_VERSION -0x3D80
+/** Invalid key tag or value. */
+#define MBEDTLS_ERR_PK_KEY_INVALID_FORMAT  -0x3D00
+/** Key algorithm is unsupported (only RSA and EC are supported). */
+#define MBEDTLS_ERR_PK_UNKNOWN_PK_ALG      -0x3C80
+/** Private key password can't be empty. */
+#define MBEDTLS_ERR_PK_PASSWORD_REQUIRED   -0x3C00
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PK_PASSWORD_MISMATCH   -0x3B80
+/** The pubkey tag or value is invalid (only RSA and EC are supported). */
+#define MBEDTLS_ERR_PK_INVALID_PUBKEY      -0x3B00
+/** The algorithm tag or value is invalid. */
+#define MBEDTLS_ERR_PK_INVALID_ALG         -0x3A80
+/** Elliptic curve is unsupported (only NIST curves are supported). */
+#define MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE -0x3A00
+/** Unavailable feature, e.g. RSA disabled for RSA key. */
+#define MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE -0x3980
+/** The buffer contains a valid signature followed by more data. */
+#define MBEDTLS_ERR_PK_SIG_LEN_MISMATCH    -0x3900
 
 /* MBEDTLS_ERR_PK_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_PK_HW_ACCEL_FAILED     -0x3880  /**< PK hardware accelerator failed. */
+/** PK hardware accelerator failed. */
+#define MBEDTLS_ERR_PK_HW_ACCEL_FAILED     -0x3880
 
 #ifdef __cplusplus
 extern "C" {
@@ -108,6 +100,7 @@ typedef enum {
     MBEDTLS_PK_ECDSA,
     MBEDTLS_PK_RSA_ALT,
     MBEDTLS_PK_RSASSA_PSS,
+    MBEDTLS_PK_OPAQUE,
 } mbedtls_pk_type_t;
 
 /**
@@ -121,6 +114,58 @@ typedef struct mbedtls_pk_rsassa_pss_options
 
 } mbedtls_pk_rsassa_pss_options;
 
+/**
+ * \brief           Maximum size of a signature made by mbedtls_pk_sign().
+ */
+/* We need to set MBEDTLS_PK_SIGNATURE_MAX_SIZE to the maximum signature
+ * size among the supported signature types. Do it by starting at 0,
+ * then incrementally increasing to be large enough for each supported
+ * signature mechanism.
+ *
+ * The resulting value can be 0, for example if MBEDTLS_ECDH_C is enabled
+ * (which allows the pk module to be included) but neither MBEDTLS_ECDSA_C
+ * nor MBEDTLS_RSA_C nor any opaque signature mechanism (PSA or RSA_ALT).
+ */
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE 0
+
+#if ( defined(MBEDTLS_RSA_C) || defined(MBEDTLS_PK_RSA_ALT_SUPPORT) ) && \
+    MBEDTLS_MPI_MAX_SIZE > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* For RSA, the signature can be as large as the bignum module allows.
+ * For RSA_ALT, the signature size is not necessarily tied to what the
+ * bignum module can do, but in the absence of any specific setting,
+ * we use that (rsa_alt_sign_wrap in pk_wrap will check). */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_MPI_MAX_SIZE
+#endif
+
+#if defined(MBEDTLS_ECDSA_C) &&                                 \
+    MBEDTLS_ECDSA_MAX_LEN > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* For ECDSA, the ecdsa module exports a constant for the maximum
+ * signature size. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_ECDSA_MAX_LEN
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#if PSA_SIGNATURE_MAX_SIZE > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* PSA_SIGNATURE_MAX_SIZE is the maximum size of a signature made
+ * through the PSA API in the PSA representation. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE PSA_SIGNATURE_MAX_SIZE
+#endif
+
+#if PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE + 11 > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* The Mbed TLS representation is different for ECDSA signatures:
+ * PSA uses the raw concatenation of r and s,
+ * whereas Mbed TLS uses the ASN.1 representation (SEQUENCE of two INTEGERs).
+ * Add the overhead of ASN.1: up to (1+2) + 2 * (1+2+1) for the
+ * types, lengths (represented by up to 2 bytes), and potential leading
+ * zeros of the INTEGERs and the SEQUENCE. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE ( PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE + 11 )
+#endif
+#endif /* defined(MBEDTLS_USE_PSA_CRYPTO) */
+
 /**
  * \brief           Types for interfacing with the debug module
  */
@@ -234,6 +279,11 @@ void mbedtls_pk_init( mbedtls_pk_context *ctx );
  *
  * \param ctx       The context to clear. It must have been initialized.
  *                  If this is \c NULL, this function does nothing.
+ *
+ * \note            For contexts that have been set up with
+ *                  mbedtls_pk_setup_opaque(), this does not free the underlying
+ *                  PSA key and you still need to call psa_destroy_key()
+ *                  independently if you want to destroy that key.
  */
 void mbedtls_pk_free( mbedtls_pk_context *ctx );
 
@@ -272,6 +322,39 @@ void mbedtls_pk_restart_free( mbedtls_pk_restart_ctx *ctx );
  */
 int mbedtls_pk_setup( mbedtls_pk_context *ctx, const mbedtls_pk_info_t *info );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief           Initialize a PK context to wrap a PSA key.
+ *
+ * \note            This function replaces mbedtls_pk_setup() for contexts
+ *                  that wrap a (possibly opaque) PSA key instead of
+ *                  storing and manipulating the key material directly.
+ *
+ * \param ctx       The context to initialize. It must be empty (type NONE).
+ * \param key       The PSA key to wrap, which must hold an ECC key pair
+ *                  (see notes below).
+ *
+ * \note            The wrapped key must remain valid as long as the
+ *                  wrapping PK context is in use, that is at least between
+ *                  the point this function is called and the point
+ *                  mbedtls_pk_free() is called on this context. The wrapped
+ *                  key might then be independently used or destroyed.
+ *
+ * \note            This function is currently only available for ECC key
+ *                  pairs (that is, ECC keys containing private key material).
+ *                  Support for other key types may be added later.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_PK_BAD_INPUT_DATA on invalid input
+ *                  (context already used, invalid key identifier).
+ * \return          #MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE if the key is not an
+ *                  ECC key pair.
+ * \return          #MBEDTLS_ERR_PK_ALLOC_FAILED on allocation failure.
+ */
+int mbedtls_pk_setup_opaque( mbedtls_pk_context *ctx,
+                             const psa_key_id_t key );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 #if defined(MBEDTLS_PK_RSA_ALT_SUPPORT)
 /**
  * \brief           Initialize an RSA-alt context
@@ -425,8 +508,13 @@ int mbedtls_pk_verify_ext( mbedtls_pk_type_t type, const void *options,
  * \param md_alg    Hash algorithm used (see notes)
  * \param hash      Hash of the message to sign
  * \param hash_len  Hash length or 0 (see notes)
- * \param sig       Place to write the signature
- * \param sig_len   Number of bytes written
+ * \param sig       Place to write the signature.
+ *                  It must have enough room for the signature.
+ *                  #MBEDTLS_PK_SIGNATURE_MAX_SIZE is always enough.
+ *                  You may use a smaller buffer if it is large enough
+ *                  given the key type.
+ * \param sig_len   On successful return,
+ *                  the number of bytes written to \p sig.
  * \param f_rng     RNG function
  * \param p_rng     RNG parameter
  *
@@ -441,10 +529,6 @@ int mbedtls_pk_verify_ext( mbedtls_pk_type_t type, const void *options,
  *
  * \note            For RSA, md_alg may be MBEDTLS_MD_NONE if hash_len != 0.
  *                  For ECDSA, md_alg may never be MBEDTLS_MD_NONE.
- *
- * \note            In order to ensure enough space for the signature, the
- *                  \p sig buffer size must be of at least
- *                  `max(MBEDTLS_ECDSA_MAX_LEN, MBEDTLS_MPI_MAX_SIZE)` bytes.
  */
 int mbedtls_pk_sign( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
              const unsigned char *hash, size_t hash_len,
@@ -459,22 +543,23 @@ int mbedtls_pk_sign( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
  *                  \c mbedtls_ecp_set_max_ops() to reduce blocking for ECC
  *                  operations. For RSA, same as \c mbedtls_pk_sign().
  *
- * \note            In order to ensure enough space for the signature, the
- *                  \p sig buffer size must be of at least
- *                  `max(MBEDTLS_ECDSA_MAX_LEN, MBEDTLS_MPI_MAX_SIZE)` bytes.
- *
  * \param ctx       The PK context to use. It must have been set up
  *                  with a private key.
- * \param md_alg    Hash algorithm used (see notes)
+ * \param md_alg    Hash algorithm used (see notes for mbedtls_pk_sign())
  * \param hash      Hash of the message to sign
- * \param hash_len  Hash length or 0 (see notes)
- * \param sig       Place to write the signature
- * \param sig_len   Number of bytes written
+ * \param hash_len  Hash length or 0 (see notes for mbedtls_pk_sign())
+ * \param sig       Place to write the signature.
+ *                  It must have enough room for the signature.
+ *                  #MBEDTLS_PK_SIGNATURE_MAX_SIZE is always enough.
+ *                  You may use a smaller buffer if it is large enough
+ *                  given the key type.
+ * \param sig_len   On successful return,
+ *                  the number of bytes written to \p sig.
  * \param f_rng     RNG function
  * \param p_rng     RNG parameter
  * \param rs_ctx    Restart context (NULL to disable restart)
  *
- * \return          See \c mbedtls_pk_sign(), or
+ * \return          See \c mbedtls_pk_sign().
  * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
  *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
  */
@@ -534,7 +619,11 @@ int mbedtls_pk_encrypt( mbedtls_pk_context *ctx,
  * \param pub       Context holding a public key.
  * \param prv       Context holding a private (and public) key.
  *
- * \return          0 on success or MBEDTLS_ERR_PK_BAD_INPUT_DATA
+ * \return          \c 0 on success (keys were checked and match each other).
+ * \return          #MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE if the keys could not
+ *                  be checked - in that case they may or may not match.
+ * \return          #MBEDTLS_ERR_PK_BAD_INPUT_DATA if a context is invalid.
+ * \return          Another non-zero value if the keys do not match.
  */
 int mbedtls_pk_check_pair( const mbedtls_pk_context *pub, const mbedtls_pk_context *prv );
 
@@ -773,6 +862,32 @@ int mbedtls_pk_write_pubkey( unsigned char **p, unsigned char *start,
 int mbedtls_pk_load_file( const char *path, unsigned char **buf, size_t *n );
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief           Turn an EC key into an opaque one.
+ *
+ * \warning         This is a temporary utility function for tests. It might
+ *                  change or be removed at any time without notice.
+ *
+ * \note            Only ECDSA keys are supported so far. Signing with the
+ *                  specified hash is the only allowed use of that key.
+ *
+ * \param pk        Input: the EC key to import to a PSA key.
+ *                  Output: a PK context wrapping that PSA key.
+ * \param key       Output: a PSA key identifier.
+ *                  It's the caller's responsibility to call
+ *                  psa_destroy_key() on that key identifier after calling
+ *                  mbedtls_pk_free() on the PK context.
+ * \param hash_alg  The hash algorithm to allow for use with that key.
+ *
+ * \return          \c 0 if successful.
+ * \return          An Mbed TLS error code otherwise.
+ */
+int mbedtls_pk_wrap_as_opaque( mbedtls_pk_context *pk,
+                               psa_key_id_t *key,
+                               psa_algorithm_t hash_alg );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h
index 3f84cdf7489..47f7767700c 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,39 +18,18 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_PK_WRAP_H
 #define MBEDTLS_PK_WRAP_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "pk.h"
+#include "mbedtls/pk.h"
 
 struct mbedtls_pk_info_t
 {
@@ -160,4 +133,8 @@ extern const mbedtls_pk_info_t mbedtls_ecdsa_info;
 extern const mbedtls_pk_info_t mbedtls_rsa_alt_info;
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+extern const mbedtls_pk_info_t mbedtls_pk_opaque_info;
+#endif
+
 #endif /* MBEDTLS_PK_WRAP_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h
index 3874d4a05ee..3530ee16889 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,40 +20,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PKCS11_H
 #define MBEDTLS_PKCS11_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #if defined(MBEDTLS_PKCS11_C)
 
-#include "x509_crt.h"
+#include "mbedtls/x509_crt.h"
 
 #include <pkcs11-helper-1.0/pkcs11h-certificate.h>
 
@@ -72,6 +45,8 @@
 extern "C" {
 #endif
 
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+
 /**
  * Context for PKCS #11 private keys.
  */
@@ -81,47 +56,71 @@ typedef struct mbedtls_pkcs11_context
         int len;
 } mbedtls_pkcs11_context;
 
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
 /**
  * Initialize a mbedtls_pkcs11_context.
  * (Just making memory references valid.)
+ *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
  */
-void mbedtls_pkcs11_init( mbedtls_pkcs11_context *ctx );
+MBEDTLS_DEPRECATED void mbedtls_pkcs11_init( mbedtls_pkcs11_context *ctx );
 
 /**
  * Fill in a mbed TLS certificate, based on the given PKCS11 helper certificate.
  *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
  * \param cert          X.509 certificate to fill
  * \param pkcs11h_cert  PKCS #11 helper certificate
  *
  * \return              0 on success.
  */
-int mbedtls_pkcs11_x509_cert_bind( mbedtls_x509_crt *cert, pkcs11h_certificate_t pkcs11h_cert );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_x509_cert_bind( mbedtls_x509_crt *cert,
+                                        pkcs11h_certificate_t pkcs11h_cert );
 
 /**
  * Set up a mbedtls_pkcs11_context storing the given certificate. Note that the
  * mbedtls_pkcs11_context will take over control of the certificate, freeing it when
  * done.
  *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
  * \param priv_key      Private key structure to fill.
  * \param pkcs11_cert   PKCS #11 helper certificate
  *
  * \return              0 on success
  */
-int mbedtls_pkcs11_priv_key_bind( mbedtls_pkcs11_context *priv_key,
-        pkcs11h_certificate_t pkcs11_cert );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_priv_key_bind(
+                                        mbedtls_pkcs11_context *priv_key,
+                                        pkcs11h_certificate_t pkcs11_cert );
 
 /**
  * Free the contents of the given private key context. Note that the structure
  * itself is not freed.
  *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
  * \param priv_key      Private key structure to cleanup
  */
-void mbedtls_pkcs11_priv_key_free( mbedtls_pkcs11_context *priv_key );
+MBEDTLS_DEPRECATED void mbedtls_pkcs11_priv_key_free(
+                                            mbedtls_pkcs11_context *priv_key );
 
 /**
  * \brief          Do an RSA private key decrypt, then remove the message
  *                 padding
  *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
  * \param ctx      PKCS #11 context
  * \param mode     must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature
  * \param input    buffer holding the encrypted data
@@ -135,15 +134,18 @@ void mbedtls_pkcs11_priv_key_free( mbedtls_pkcs11_context *priv_key );
  *                 of ctx->N (eg. 128 bytes if RSA-1024 is used) otherwise
  *                 an error is thrown.
  */
-int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx,
-                       int mode, size_t *olen,
-                       const unsigned char *input,
-                       unsigned char *output,
-                       size_t output_max_len );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx,
+                                               int mode, size_t *olen,
+                                               const unsigned char *input,
+                                               unsigned char *output,
+                                               size_t output_max_len );
 
 /**
  * \brief          Do a private RSA to sign a message digest
  *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
  * \param ctx      PKCS #11 context
  * \param mode     must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature
  * \param md_alg   a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data)
@@ -157,28 +159,58 @@ int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx,
  * \note           The "sig" buffer must be as large as the size
  *                 of ctx->N (eg. 128 bytes if RSA-1024 is used).
  */
-int mbedtls_pkcs11_sign( mbedtls_pkcs11_context *ctx,
-                    int mode,
-                    mbedtls_md_type_t md_alg,
-                    unsigned int hashlen,
-                    const unsigned char *hash,
-                    unsigned char *sig );
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_sign( mbedtls_pkcs11_context *ctx,
+                                            int mode,
+                                            mbedtls_md_type_t md_alg,
+                                            unsigned int hashlen,
+                                            const unsigned char *hash,
+                                            unsigned char *sig );
 
 /**
  * SSL/TLS wrappers for PKCS#11 functions
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
  */
-static inline int mbedtls_ssl_pkcs11_decrypt( void *ctx, int mode, size_t *olen,
-                        const unsigned char *input, unsigned char *output,
-                        size_t output_max_len )
+MBEDTLS_DEPRECATED static inline int mbedtls_ssl_pkcs11_decrypt( void *ctx,
+                            int mode, size_t *olen,
+                            const unsigned char *input, unsigned char *output,
+                            size_t output_max_len )
 {
     return mbedtls_pkcs11_decrypt( (mbedtls_pkcs11_context *) ctx, mode, olen, input, output,
                            output_max_len );
 }
 
-static inline int mbedtls_ssl_pkcs11_sign( void *ctx,
-                     int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
-                     int mode, mbedtls_md_type_t md_alg, unsigned int hashlen,
-                     const unsigned char *hash, unsigned char *sig )
+/**
+ * \brief          This function signs a message digest using RSA.
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
+ * \param ctx      The PKCS #11 context.
+ * \param f_rng    The RNG function. This parameter is unused.
+ * \param p_rng    The RNG context. This parameter is unused.
+ * \param mode     The operation to run. This must be set to
+ *                 MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's
+ *                 signature.
+ * \param md_alg   The message digest algorithm. One of the MBEDTLS_MD_XXX
+ *                 must be passed to this function and MBEDTLS_MD_NONE can be
+ *                 used for signing raw data.
+ * \param hashlen  The message digest length (for MBEDTLS_MD_NONE only).
+ * \param hash     The buffer holding the message digest.
+ * \param sig      The buffer that will hold the ciphertext.
+ *
+ * \return         \c 0 if the signing operation was successful.
+ * \return         A non-zero error code on failure.
+ *
+ * \note           The \p sig buffer must be as large as the size of
+ *                 <code>ctx->N</code>. For example, 128 bytes if RSA-1024 is
+ *                 used.
+ */
+MBEDTLS_DEPRECATED static inline int mbedtls_ssl_pkcs11_sign( void *ctx,
+                    int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+                    int mode, mbedtls_md_type_t md_alg, unsigned int hashlen,
+                    const unsigned char *hash, unsigned char *sig )
 {
     ((void) f_rng);
     ((void) p_rng);
@@ -186,11 +218,25 @@ static inline int mbedtls_ssl_pkcs11_sign( void *ctx,
                         hashlen, hash, sig );
 }
 
-static inline size_t mbedtls_ssl_pkcs11_key_len( void *ctx )
+/**
+ * This function gets the length of the private key.
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
+ * \param ctx      The PKCS #11 context.
+ *
+ * \return         The length of the private key.
+ */
+MBEDTLS_DEPRECATED static inline size_t mbedtls_ssl_pkcs11_key_len( void *ctx )
 {
     return ( (mbedtls_pkcs11_context *) ctx )->len;
 }
 
+#undef MBEDTLS_DEPRECATED
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h
index 9cbcb173055..d9e85b1d126 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,47 +18,30 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PKCS12_H
 #define MBEDTLS_PKCS12_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "md.h"
-#include "cipher.h"
-#include "asn1.h"
+#include "mbedtls/md.h"
+#include "mbedtls/cipher.h"
+#include "mbedtls/asn1.h"
 
 #include <stddef.h>
 
-#define MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA                 -0x1F80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE            -0x1F00  /**< Feature not available, e.g. unsupported encryption scheme. */
-#define MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT             -0x1E80  /**< PBE ASN.1 data not as expected. */
-#define MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH              -0x1E00  /**< Given private key password does not allow for correct decryption. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA                 -0x1F80
+/** Feature not available, e.g. unsupported encryption scheme. */
+#define MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE            -0x1F00
+/** PBE ASN.1 data not as expected. */
+#define MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT             -0x1E80
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH              -0x1E00
 
 #define MBEDTLS_PKCS12_DERIVE_KEY       1   /**< encryption/decryption key */
 #define MBEDTLS_PKCS12_DERIVE_IV        2   /**< initialization vector     */
@@ -102,11 +79,13 @@ int mbedtls_pkcs12_pbe_sha1_rc4_128( mbedtls_asn1_buf *pbe_params, int mode,
  * \brief            PKCS12 Password Based function (encryption / decryption)
  *                   for cipher-based and mbedtls_md-based PBE's
  *
- * \param pbe_params an ASN1 buffer containing the pkcs-12PbeParams structure
- * \param mode       either MBEDTLS_PKCS12_PBE_ENCRYPT or MBEDTLS_PKCS12_PBE_DECRYPT
+ * \param pbe_params an ASN1 buffer containing the pkcs-12 PbeParams structure
+ * \param mode       either #MBEDTLS_PKCS12_PBE_ENCRYPT or
+ *                   #MBEDTLS_PKCS12_PBE_DECRYPT
  * \param cipher_type the cipher used
- * \param md_type     the mbedtls_md used
- * \param pwd        the password used (may be NULL if no password is used)
+ * \param md_type    the mbedtls_md used
+ * \param pwd        Latin1-encoded password used. This may only be \c NULL when
+ *                   \p pwdlen is 0. No null terminator should be used.
  * \param pwdlen     length of the password (may be 0)
  * \param input      the input data
  * \param len        data length
@@ -127,18 +106,24 @@ int mbedtls_pkcs12_pbe( mbedtls_asn1_buf *pbe_params, int mode,
  *                   to produce pseudo-random bits for a particular "purpose".
  *
  *                   Depending on the given id, this function can produce an
- *                   encryption/decryption key, an nitialization vector or an
+ *                   encryption/decryption key, an initialization vector or an
  *                   integrity key.
  *
  * \param data       buffer to store the derived data in
- * \param datalen    length to fill
- * \param pwd        password to use (may be NULL if no password is used)
- * \param pwdlen     length of the password (may be 0)
- * \param salt       salt buffer to use
- * \param saltlen    length of the salt
- * \param mbedtls_md         mbedtls_md type to use during the derivation
- * \param id         id that describes the purpose (can be MBEDTLS_PKCS12_DERIVE_KEY,
- *                   MBEDTLS_PKCS12_DERIVE_IV or MBEDTLS_PKCS12_DERIVE_MAC_KEY)
+ * \param datalen    length of buffer to fill
+ * \param pwd        The password to use. For compliance with PKCS#12 §B.1, this
+ *                   should be a BMPString, i.e. a Unicode string where each
+ *                   character is encoded as 2 bytes in big-endian order, with
+ *                   no byte order mark and with a null terminator (i.e. the
+ *                   last two bytes should be 0x00 0x00).
+ * \param pwdlen     length of the password (may be 0).
+ * \param salt       Salt buffer to use This may only be \c NULL when
+ *                   \p saltlen is 0.
+ * \param saltlen    length of the salt (may be zero)
+ * \param mbedtls_md mbedtls_md type to use during the derivation
+ * \param id         id that describes the purpose (can be
+ *                   #MBEDTLS_PKCS12_DERIVE_KEY, #MBEDTLS_PKCS12_DERIVE_IV or
+ *                   #MBEDTLS_PKCS12_DERIVE_MAC_KEY)
  * \param iterations number of iterations
  *
  * \return          0 if successful, or a MD, BIGNUM type error.
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h
index 328633c492d..696930f745f 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,47 +20,30 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PKCS5_H
 #define MBEDTLS_PKCS5_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
-#include "md.h"
+#include "mbedtls/asn1.h"
+#include "mbedtls/md.h"
 
 #include <stddef.h>
 #include <stdint.h>
 
-#define MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA                  -0x2f80  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_PKCS5_INVALID_FORMAT                  -0x2f00  /**< Unexpected ASN.1 data. */
-#define MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE             -0x2e80  /**< Requested encryption or digest alg not available. */
-#define MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH               -0x2e00  /**< Given private key password does not allow for correct decryption. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA                  -0x2f80
+/** Unexpected ASN.1 data. */
+#define MBEDTLS_ERR_PKCS5_INVALID_FORMAT                  -0x2f00
+/** Requested encryption or digest alg not available. */
+#define MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE             -0x2e80
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH               -0x2e00
 
 #define MBEDTLS_PKCS5_DECRYPT      0
 #define MBEDTLS_PKCS5_ENCRYPT      1
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform.h
index 689cfc6ec79..bdef07498d7 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform.h
@@ -14,13 +14,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,43 +27,24 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PLATFORM_H
 #define MBEDTLS_PLATFORM_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #if defined(MBEDTLS_HAVE_TIME)
-#include "platform_time.h"
+#include "mbedtls/platform_time.h"
 #endif
 
-#define MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED     -0x0070 /**< Hardware accelerator failed */
-#define MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED -0x0072 /**< The requested feature is not supported by the platform */
+/** Hardware accelerator failed */
+#define MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED     -0x0070
+/** The requested feature is not supported by the platform */
+#define MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED -0x0072
 
 #ifdef __cplusplus
 extern "C" {
@@ -83,17 +58,33 @@ extern "C" {
  * \{
  */
 
+/* The older Microsoft Windows common runtime provides non-conforming
+ * implementations of some standard library functions, including snprintf
+ * and vsnprintf. This affects MSVC and MinGW builds.
+ */
+#if defined(__MINGW32__) || (defined(_MSC_VER) && _MSC_VER <= 1900)
+#define MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF
+#define MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF
+#endif
+
 #if !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS)
 #include <stdio.h>
 #include <stdlib.h>
 #include <time.h>
 #if !defined(MBEDTLS_PLATFORM_STD_SNPRINTF)
-#if defined(_WIN32)
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF)
 #define MBEDTLS_PLATFORM_STD_SNPRINTF   mbedtls_platform_win32_snprintf /**< The default \c snprintf function to use.  */
 #else
 #define MBEDTLS_PLATFORM_STD_SNPRINTF   snprintf /**< The default \c snprintf function to use.  */
 #endif
 #endif
+#if !defined(MBEDTLS_PLATFORM_STD_VSNPRINTF)
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF)
+#define MBEDTLS_PLATFORM_STD_VSNPRINTF   mbedtls_platform_win32_vsnprintf /**< The default \c vsnprintf function to use.  */
+#else
+#define MBEDTLS_PLATFORM_STD_VSNPRINTF   vsnprintf /**< The default \c vsnprintf function to use.  */
+#endif
+#endif
 #if !defined(MBEDTLS_PLATFORM_STD_PRINTF)
 #define MBEDTLS_PLATFORM_STD_PRINTF   printf /**< The default \c printf function to use. */
 #endif
@@ -229,7 +220,7 @@ int mbedtls_platform_set_printf( int (*printf_func)( const char *, ... ) );
  * - however it is acceptable to return -1 instead of the required length when
  *   the destination buffer is too short.
  */
-#if defined(_WIN32)
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF)
 /* For Windows (inc. MSYS2), we provide our own fixed implementation */
 int mbedtls_platform_win32_snprintf( char *s, size_t n, const char *fmt, ... );
 #endif
@@ -255,6 +246,42 @@ int mbedtls_platform_set_snprintf( int (*snprintf_func)( char * s, size_t n,
 #endif /* MBEDTLS_PLATFORM_SNPRINTF_MACRO */
 #endif /* MBEDTLS_PLATFORM_SNPRINTF_ALT */
 
+/*
+ * The function pointers for vsnprintf
+ *
+ * The vsnprintf implementation should conform to C99:
+ * - it *must* always correctly zero-terminate the buffer
+ *   (except when n == 0, then it must leave the buffer untouched)
+ * - however it is acceptable to return -1 instead of the required length when
+ *   the destination buffer is too short.
+ */
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF)
+#include <stdarg.h>
+/* For Older Windows (inc. MSYS2), we provide our own fixed implementation */
+int mbedtls_platform_win32_vsnprintf( char *s, size_t n, const char *fmt, va_list arg );
+#endif
+
+#if defined(MBEDTLS_PLATFORM_VSNPRINTF_ALT)
+#include <stdarg.h>
+extern int (*mbedtls_vsnprintf)( char * s, size_t n, const char * format, va_list arg );
+
+/**
+ * \brief   Set your own snprintf function pointer
+ *
+ * \param   vsnprintf_func   The \c vsnprintf function implementation
+ *
+ * \return  \c 0
+ */
+int mbedtls_platform_set_vsnprintf( int (*vsnprintf_func)( char * s, size_t n,
+                                                 const char * format, va_list arg ) );
+#else /* MBEDTLS_PLATFORM_VSNPRINTF_ALT */
+#if defined(MBEDTLS_PLATFORM_VSNPRINTF_MACRO)
+#define mbedtls_vsnprintf   MBEDTLS_PLATFORM_VSNPRINTF_MACRO
+#else
+#define mbedtls_vsnprintf   vsnprintf
+#endif /* MBEDTLS_PLATFORM_VSNPRINTF_MACRO */
+#endif /* MBEDTLS_PLATFORM_VSNPRINTF_ALT */
+
 /*
  * The function pointers for exit
  */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform_time.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform_time.h
index e132f6a688c..7e7daab6920 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform_time.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform_time.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PLATFORM_TIME_H
 #define MBEDTLS_PLATFORM_TIME_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform_util.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform_util.h
index 426afaf0401..f982db8c01c 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform_util.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/platform_util.h
@@ -6,13 +6,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -25,40 +19,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_PLATFORM_UTIL_H
 #define MBEDTLS_PLATFORM_UTIL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
 #include <stddef.h>
 #if defined(MBEDTLS_HAVE_TIME_DATE)
-#include "platform_time.h"
+#include "mbedtls/platform_time.h"
 #include <time.h>
 #endif /* MBEDTLS_HAVE_TIME_DATE */
 
@@ -159,6 +132,95 @@ MBEDTLS_DEPRECATED typedef int mbedtls_deprecated_numeric_constant_t;
 #endif /* MBEDTLS_DEPRECATED_WARNING */
 #endif /* MBEDTLS_DEPRECATED_REMOVED */
 
+/* Implementation of the check-return facility.
+ * See the user documentation in config.h.
+ *
+ * Do not use this macro directly to annotate function: instead,
+ * use one of MBEDTLS_CHECK_RETURN_CRITICAL or MBEDTLS_CHECK_RETURN_TYPICAL
+ * depending on how important it is to check the return value.
+ */
+#if !defined(MBEDTLS_CHECK_RETURN)
+#if defined(__GNUC__)
+#define MBEDTLS_CHECK_RETURN __attribute__((__warn_unused_result__))
+#elif defined(_MSC_VER) && _MSC_VER >= 1700
+#include <sal.h>
+#define MBEDTLS_CHECK_RETURN _Check_return_
+#else
+#define MBEDTLS_CHECK_RETURN
+#endif
+#endif
+
+/** Critical-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that its return value should be checked in all applications.
+ * Omitting the check is very likely to indicate a bug in the application
+ * and will result in a compile-time warning if #MBEDTLS_CHECK_RETURN
+ * is implemented for the compiler in use.
+ *
+ * \note  The use of this macro is a work in progress.
+ *        This macro may be added to more functions in the future.
+ *        Such an extension is not considered an API break, provided that
+ *        there are near-unavoidable circumstances under which the function
+ *        can fail. For example, signature/MAC/AEAD verification functions,
+ *        and functions that require a random generator, are considered
+ *        return-check-critical.
+ */
+#define MBEDTLS_CHECK_RETURN_CRITICAL MBEDTLS_CHECK_RETURN
+
+/** Ordinary-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that its return value should be generally be checked in portable
+ * applications. Omitting the check will result in a compile-time warning if
+ * #MBEDTLS_CHECK_RETURN is implemented for the compiler in use and
+ * #MBEDTLS_CHECK_RETURN_WARNING is enabled in the compile-time configuration.
+ *
+ * You can use #MBEDTLS_IGNORE_RETURN to explicitly ignore the return value
+ * of a function that is annotated with #MBEDTLS_CHECK_RETURN.
+ *
+ * \note  The use of this macro is a work in progress.
+ *        This macro will be added to more functions in the future.
+ *        Eventually this should appear before most functions returning
+ *        an error code (as \c int in the \c mbedtls_xxx API or
+ *        as ::psa_status_t in the \c psa_xxx API).
+ */
+#if defined(MBEDTLS_CHECK_RETURN_WARNING)
+#define MBEDTLS_CHECK_RETURN_TYPICAL MBEDTLS_CHECK_RETURN
+#else
+#define MBEDTLS_CHECK_RETURN_TYPICAL
+#endif
+
+/** Benign-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that it is rarely useful to check its return value.
+ *
+ * This macro has an empty expansion. It exists for documentation purposes:
+ * a #MBEDTLS_CHECK_RETURN_OPTIONAL annotation indicates that the function
+ * has been analyzed for return-check usefuless, whereas the lack of
+ * an annotation indicates that the function has not been analyzed and its
+ * return-check usefulness is unknown.
+ */
+#define MBEDTLS_CHECK_RETURN_OPTIONAL
+
+/** \def MBEDTLS_IGNORE_RETURN
+ *
+ * Call this macro with one argument, a function call, to suppress a warning
+ * from #MBEDTLS_CHECK_RETURN due to that function call.
+ */
+#if !defined(MBEDTLS_IGNORE_RETURN)
+/* GCC doesn't silence the warning with just (void)(result).
+ * (void)!(result) is known to work up at least up to GCC 10, as well
+ * as with Clang and MSVC.
+ *
+ * https://gcc.gnu.org/onlinedocs/gcc-3.4.6/gcc/Non_002dbugs.html
+ * https://stackoverflow.com/questions/40576003/ignoring-warning-wunused-result
+ * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66425#c34
+ */
+#define MBEDTLS_IGNORE_RETURN(result) ( (void) !( result ) )
+#endif
+
 /**
  * \brief       Securely zeroize a buffer
  *
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/poly1305.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/poly1305.h
index b337aa841ca..a69ede98b5e 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/poly1305.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/poly1305.h
@@ -14,13 +14,7 @@
 
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -33,34 +27,13 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 
 #ifndef MBEDTLS_POLY1305_H
 #define MBEDTLS_POLY1305_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -68,15 +41,18 @@
 #include <stdint.h>
 #include <stddef.h>
 
-#define MBEDTLS_ERR_POLY1305_BAD_INPUT_DATA         -0x0057 /**< Invalid input parameter(s). */
+/** Invalid input parameter(s). */
+#define MBEDTLS_ERR_POLY1305_BAD_INPUT_DATA         -0x0057
 
 /* MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE is deprecated and should not be
  * used. */
-#define MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE    -0x0059 /**< Feature not available. For example, s part of the API is not implemented. */
+/** Feature not available. For example, s part of the API is not implemented. */
+#define MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE    -0x0059
 
 /* MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED        -0x005B  /**< Poly1305 hardware accelerator failed. */
+/** Poly1305 hardware accelerator failed. */
+#define MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED        -0x005B
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/psa_util.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/psa_util.h
new file mode 100644
index 00000000000..af7a809e40b
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/psa_util.h
@@ -0,0 +1,512 @@
+/**
+ * \file psa_util.h
+ *
+ * \brief Utility functions for the use of the PSA Crypto library.
+ *
+ * \warning This function is not part of the public API and may
+ *          change at any time.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_PSA_UTIL_H
+#define MBEDTLS_PSA_UTIL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+
+#include "psa/crypto.h"
+
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
+#include "mbedtls/pk.h"
+#include "mbedtls/oid.h"
+
+#include <string.h>
+
+/* Translations for symmetric crypto. */
+
+static inline psa_key_type_t mbedtls_psa_translate_cipher_type(
+    mbedtls_cipher_type_t cipher )
+{
+    switch( cipher )
+    {
+        case MBEDTLS_CIPHER_AES_128_CCM:
+        case MBEDTLS_CIPHER_AES_192_CCM:
+        case MBEDTLS_CIPHER_AES_256_CCM:
+        case MBEDTLS_CIPHER_AES_128_GCM:
+        case MBEDTLS_CIPHER_AES_192_GCM:
+        case MBEDTLS_CIPHER_AES_256_GCM:
+        case MBEDTLS_CIPHER_AES_128_CBC:
+        case MBEDTLS_CIPHER_AES_192_CBC:
+        case MBEDTLS_CIPHER_AES_256_CBC:
+        case MBEDTLS_CIPHER_AES_128_ECB:
+        case MBEDTLS_CIPHER_AES_192_ECB:
+        case MBEDTLS_CIPHER_AES_256_ECB:
+            return( PSA_KEY_TYPE_AES );
+
+        /* ARIA not yet supported in PSA. */
+        /* case MBEDTLS_CIPHER_ARIA_128_CCM:
+           case MBEDTLS_CIPHER_ARIA_192_CCM:
+           case MBEDTLS_CIPHER_ARIA_256_CCM:
+           case MBEDTLS_CIPHER_ARIA_128_GCM:
+           case MBEDTLS_CIPHER_ARIA_192_GCM:
+           case MBEDTLS_CIPHER_ARIA_256_GCM:
+           case MBEDTLS_CIPHER_ARIA_128_CBC:
+           case MBEDTLS_CIPHER_ARIA_192_CBC:
+           case MBEDTLS_CIPHER_ARIA_256_CBC:
+               return( PSA_KEY_TYPE_ARIA ); */
+
+        default:
+            return( 0 );
+    }
+}
+
+static inline psa_algorithm_t mbedtls_psa_translate_cipher_mode(
+    mbedtls_cipher_mode_t mode, size_t taglen )
+{
+    switch( mode )
+    {
+        case MBEDTLS_MODE_ECB:
+            return( PSA_ALG_ECB_NO_PADDING );
+        case MBEDTLS_MODE_GCM:
+            return( PSA_ALG_AEAD_WITH_SHORTENED_TAG( PSA_ALG_GCM, taglen ) );
+        case MBEDTLS_MODE_CCM:
+            return( PSA_ALG_AEAD_WITH_SHORTENED_TAG( PSA_ALG_CCM, taglen ) );
+        case MBEDTLS_MODE_CBC:
+            if( taglen == 0 )
+                return( PSA_ALG_CBC_NO_PADDING );
+            else
+                return( 0 );
+        default:
+            return( 0 );
+    }
+}
+
+static inline psa_key_usage_t mbedtls_psa_translate_cipher_operation(
+    mbedtls_operation_t op )
+{
+    switch( op )
+    {
+        case MBEDTLS_ENCRYPT:
+            return( PSA_KEY_USAGE_ENCRYPT );
+        case MBEDTLS_DECRYPT:
+            return( PSA_KEY_USAGE_DECRYPT );
+        default:
+            return( 0 );
+    }
+}
+
+/* Translations for hashing. */
+
+static inline psa_algorithm_t mbedtls_psa_translate_md( mbedtls_md_type_t md_alg )
+{
+    switch( md_alg )
+    {
+#if defined(MBEDTLS_MD2_C)
+    case MBEDTLS_MD_MD2:
+        return( PSA_ALG_MD2 );
+#endif
+#if defined(MBEDTLS_MD4_C)
+    case MBEDTLS_MD_MD4:
+        return( PSA_ALG_MD4 );
+#endif
+#if defined(MBEDTLS_MD5_C)
+    case MBEDTLS_MD_MD5:
+        return( PSA_ALG_MD5 );
+#endif
+#if defined(MBEDTLS_SHA1_C)
+    case MBEDTLS_MD_SHA1:
+        return( PSA_ALG_SHA_1 );
+#endif
+#if defined(MBEDTLS_SHA256_C)
+    case MBEDTLS_MD_SHA224:
+        return( PSA_ALG_SHA_224 );
+    case MBEDTLS_MD_SHA256:
+        return( PSA_ALG_SHA_256 );
+#endif
+#if defined(MBEDTLS_SHA512_C)
+    case MBEDTLS_MD_SHA384:
+        return( PSA_ALG_SHA_384 );
+    case MBEDTLS_MD_SHA512:
+        return( PSA_ALG_SHA_512 );
+#endif
+#if defined(MBEDTLS_RIPEMD160_C)
+    case MBEDTLS_MD_RIPEMD160:
+        return( PSA_ALG_RIPEMD160 );
+#endif
+    case MBEDTLS_MD_NONE:
+        return( 0 );
+    default:
+        return( 0 );
+    }
+}
+
+/* Translations for ECC. */
+
+static inline int mbedtls_psa_get_ecc_oid_from_id(
+    psa_ecc_family_t curve, size_t bits,
+    char const **oid, size_t *oid_len )
+{
+    switch( curve )
+    {
+        case PSA_ECC_FAMILY_SECP_R1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+                case 192:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP192R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP192R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+                case 224:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP224R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP224R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP256R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP256R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+                case 384:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP384R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP384R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+                case 521:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP521R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP521R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */
+            }
+            break;
+        case PSA_ECC_FAMILY_SECP_K1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+                case 192:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP192K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP192K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+                case 224:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP224K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP224K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP256K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP256K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */
+            }
+            break;
+        case PSA_ECC_FAMILY_BRAINPOOL_P_R1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_BP256R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP256R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+                case 384:
+                    *oid = MBEDTLS_OID_EC_GRP_BP384R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP384R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+                case 512:
+                    *oid = MBEDTLS_OID_EC_GRP_BP512R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP512R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */
+            }
+            break;
+    }
+    (void) oid;
+    (void) oid_len;
+    return( -1 );
+}
+
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH 1
+
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 521 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 521 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 512 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 512 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */
+
+
+/* Translations for PK layer */
+
+static inline int mbedtls_psa_err_translate_pk( psa_status_t status )
+{
+    switch( status )
+    {
+        case PSA_SUCCESS:
+            return( 0 );
+        case PSA_ERROR_NOT_SUPPORTED:
+            return( MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE );
+        case PSA_ERROR_INSUFFICIENT_MEMORY:
+            return( MBEDTLS_ERR_PK_ALLOC_FAILED );
+        case PSA_ERROR_INSUFFICIENT_ENTROPY:
+            return( MBEDTLS_ERR_ECP_RANDOM_FAILED );
+        case PSA_ERROR_BAD_STATE:
+            return( MBEDTLS_ERR_PK_BAD_INPUT_DATA );
+        /* All other failures */
+        case PSA_ERROR_COMMUNICATION_FAILURE:
+        case PSA_ERROR_HARDWARE_FAILURE:
+        case PSA_ERROR_CORRUPTION_DETECTED:
+            return( MBEDTLS_ERR_PK_HW_ACCEL_FAILED );
+        default: /* We return the same as for the 'other failures',
+                  * but list them separately nonetheless to indicate
+                  * which failure conditions we have considered. */
+            return( MBEDTLS_ERR_PK_HW_ACCEL_FAILED );
+    }
+}
+
+/* Translations for ECC */
+
+/* This function transforms an ECC group identifier from
+ * https://www.iana.org/assignments/tls-parameters/tls-parameters.xhtml#tls-parameters-8
+ * into a PSA ECC group identifier. */
+#if defined(MBEDTLS_ECP_C)
+static inline psa_key_type_t mbedtls_psa_parse_tls_ecc_group(
+    uint16_t tls_ecc_grp_reg_id, size_t *bits )
+{
+    const mbedtls_ecp_curve_info *curve_info =
+        mbedtls_ecp_curve_info_from_tls_id( tls_ecc_grp_reg_id );
+    if( curve_info == NULL )
+        return( 0 );
+    return( PSA_KEY_TYPE_ECC_KEY_PAIR(
+                mbedtls_ecc_group_to_psa( curve_info->grp_id, bits ) ) );
+}
+#endif /* MBEDTLS_ECP_C */
+
+/* This function takes a buffer holding an EC public key
+ * exported through psa_export_public_key(), and converts
+ * it into an ECPoint structure to be put into a ClientKeyExchange
+ * message in an ECDHE exchange.
+ *
+ * Both the present and the foreseeable future format of EC public keys
+ * used by PSA have the ECPoint structure contained in the exported key
+ * as a subbuffer, and the function merely selects this subbuffer instead
+ * of making a copy.
+ */
+static inline int mbedtls_psa_tls_psa_ec_to_ecpoint( unsigned char *src,
+                                                     size_t srclen,
+                                                     unsigned char **dst,
+                                                     size_t *dstlen )
+{
+    *dst = src;
+    *dstlen = srclen;
+    return( 0 );
+}
+
+/* This function takes a buffer holding an ECPoint structure
+ * (as contained in a TLS ServerKeyExchange message for ECDHE
+ * exchanges) and converts it into a format that the PSA key
+ * agreement API understands.
+ */
+static inline int mbedtls_psa_tls_ecpoint_to_psa_ec( unsigned char const *src,
+                                                     size_t srclen,
+                                                     unsigned char *dst,
+                                                     size_t dstlen,
+                                                     size_t *olen )
+{
+    if( srclen > dstlen )
+        return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL );
+
+    memcpy( dst, src, srclen );
+    *olen = srclen;
+    return( 0 );
+}
+
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+/* Expose whatever RNG the PSA subsystem uses to applications using the
+ * mbedtls_xxx API. The declarations and definitions here need to be
+ * consistent with the implementation in library/psa_crypto_random_impl.h.
+ * See that file for implementation documentation. */
+#if defined(MBEDTLS_PSA_CRYPTO_C)
+
+/* The type of a `f_rng` random generator function that many library functions
+ * take.
+ *
+ * This type name is not part of the Mbed TLS stable API. It may be renamed
+ * or moved without warning.
+ */
+typedef int mbedtls_f_rng_t( void *p_rng, unsigned char *output, size_t output_size );
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+
+/** The random generator function for the PSA subsystem.
+ *
+ * This function is suitable as the `f_rng` random generator function
+ * parameter of many `mbedtls_xxx` functions. Use #MBEDTLS_PSA_RANDOM_STATE
+ * to obtain the \p p_rng parameter.
+ *
+ * The implementation of this function depends on the configuration of the
+ * library.
+ *
+ * \note Depending on the configuration, this may be a function or
+ *       a pointer to a function.
+ *
+ * \note This function may only be used if the PSA crypto subsystem is active.
+ *       This means that you must call psa_crypto_init() before any call to
+ *       this function, and you must not call this function after calling
+ *       mbedtls_psa_crypto_free().
+ *
+ * \param p_rng         The random generator context. This must be
+ *                      #MBEDTLS_PSA_RANDOM_STATE. No other state is
+ *                      supported.
+ * \param output        The buffer to fill. It must have room for
+ *                      \c output_size bytes.
+ * \param output_size   The number of bytes to write to \p output.
+ *                      This function may fail if \p output_size is too
+ *                      large. It is guaranteed to accept any output size
+ *                      requested by Mbed TLS library functions. The
+ *                      maximum request size depends on the library
+ *                      configuration.
+ *
+ * \return              \c 0 on success.
+ * \return              An `MBEDTLS_ERR_ENTROPY_xxx`,
+ *                      `MBEDTLS_ERR_PLATFORM_xxx,
+ *                      `MBEDTLS_ERR_CTR_DRBG_xxx` or
+ *                      `MBEDTLS_ERR_HMAC_DRBG_xxx` on error.
+ */
+int mbedtls_psa_get_random( void *p_rng,
+                            unsigned char *output,
+                            size_t output_size );
+
+/** The random generator state for the PSA subsystem.
+ *
+ * This macro expands to an expression which is suitable as the `p_rng`
+ * random generator state parameter of many `mbedtls_xxx` functions.
+ * It must be used in combination with the random generator function
+ * mbedtls_psa_get_random().
+ *
+ * The implementation of this macro depends on the configuration of the
+ * library. Do not make any assumption on its nature.
+ */
+#define MBEDTLS_PSA_RANDOM_STATE NULL
+
+#else /* !defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) */
+
+#if defined(MBEDTLS_CTR_DRBG_C)
+#include "mbedtls/ctr_drbg.h"
+typedef mbedtls_ctr_drbg_context mbedtls_psa_drbg_context_t;
+static mbedtls_f_rng_t *const mbedtls_psa_get_random = mbedtls_ctr_drbg_random;
+#elif defined(MBEDTLS_HMAC_DRBG_C)
+#include "mbedtls/hmac_drbg.h"
+typedef mbedtls_hmac_drbg_context mbedtls_psa_drbg_context_t;
+static mbedtls_f_rng_t *const mbedtls_psa_get_random = mbedtls_hmac_drbg_random;
+#endif
+extern mbedtls_psa_drbg_context_t *const mbedtls_psa_random_state;
+
+#define MBEDTLS_PSA_RANDOM_STATE mbedtls_psa_random_state
+
+#endif /* !defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) */
+
+#endif /* MBEDTLS_PSA_CRYPTO_C */
+
+#endif /* MBEDTLS_PSA_UTIL_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h
index 31c6637d6dc..63270d12394 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_RIPEMD160_H
 #define MBEDTLS_RIPEMD160_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -60,7 +33,8 @@
 
 /* MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED             -0x0031  /**< RIPEMD160 hardware accelerator failed */
+/** RIPEMD160 hardware accelerator failed */
+#define MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED             -0x0031
 
 #ifdef __cplusplus
 extern "C" {
@@ -82,7 +56,7 @@ typedef struct mbedtls_ripemd160_context
 mbedtls_ripemd160_context;
 
 #else  /* MBEDTLS_RIPEMD160_ALT */
-#include "ripemd160.h"
+#include "ripemd160_alt.h"
 #endif /* MBEDTLS_RIPEMD160_ALT */
 
 /**
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa.h
index b2f65334fe7..3c481e12a17 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa.h
@@ -11,13 +11,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -30,63 +24,53 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_RSA_H
 #define MBEDTLS_RSA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
-#include "md.h"
+#include "mbedtls/bignum.h"
+#include "mbedtls/md.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /*
  * RSA Error codes
  */
-#define MBEDTLS_ERR_RSA_BAD_INPUT_DATA                    -0x4080  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_RSA_INVALID_PADDING                   -0x4100  /**< Input data contains invalid padding and is rejected. */
-#define MBEDTLS_ERR_RSA_KEY_GEN_FAILED                    -0x4180  /**< Something failed during generation of a key. */
-#define MBEDTLS_ERR_RSA_KEY_CHECK_FAILED                  -0x4200  /**< Key failed to pass the validity check of the library. */
-#define MBEDTLS_ERR_RSA_PUBLIC_FAILED                     -0x4280  /**< The public key operation failed. */
-#define MBEDTLS_ERR_RSA_PRIVATE_FAILED                    -0x4300  /**< The private key operation failed. */
-#define MBEDTLS_ERR_RSA_VERIFY_FAILED                     -0x4380  /**< The PKCS#1 verification failed. */
-#define MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE                  -0x4400  /**< The output buffer for decryption is not large enough. */
-#define MBEDTLS_ERR_RSA_RNG_FAILED                        -0x4480  /**< The random generator failed to generate non-zeros. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_RSA_BAD_INPUT_DATA                    -0x4080
+/** Input data contains invalid padding and is rejected. */
+#define MBEDTLS_ERR_RSA_INVALID_PADDING                   -0x4100
+/** Something failed during generation of a key. */
+#define MBEDTLS_ERR_RSA_KEY_GEN_FAILED                    -0x4180
+/** Key failed to pass the validity check of the library. */
+#define MBEDTLS_ERR_RSA_KEY_CHECK_FAILED                  -0x4200
+/** The public key operation failed. */
+#define MBEDTLS_ERR_RSA_PUBLIC_FAILED                     -0x4280
+/** The private key operation failed. */
+#define MBEDTLS_ERR_RSA_PRIVATE_FAILED                    -0x4300
+/** The PKCS#1 verification failed. */
+#define MBEDTLS_ERR_RSA_VERIFY_FAILED                     -0x4380
+/** The output buffer for decryption is not large enough. */
+#define MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE                  -0x4400
+/** The random generator failed to generate non-zeros. */
+#define MBEDTLS_ERR_RSA_RNG_FAILED                        -0x4480
 
 /* MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION is deprecated and should not be used.
  */
-#define MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION             -0x4500  /**< The implementation does not offer the requested operation, for example, because of security violations or lack of functionality. */
+/** The implementation does not offer the requested operation, for example, because of security violations or lack of functionality. */
+#define MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION             -0x4500
 
 /* MBEDTLS_ERR_RSA_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_RSA_HW_ACCEL_FAILED                   -0x4580  /**< RSA hardware accelerator failed. */
+/** RSA hardware accelerator failed. */
+#define MBEDTLS_ERR_RSA_HW_ACCEL_FAILED                   -0x4580
 
 /*
  * RSA constants
@@ -630,7 +614,8 @@ int mbedtls_rsa_private( mbedtls_rsa_context *ctx,
  *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
  * \param ilen     The length of the plaintext in Bytes.
  * \param input    The input data to encrypt. This must be a readable
- *                 buffer of size \p ilen Bytes. This must not be \c NULL.
+ *                 buffer of size \p ilen Bytes. It may be \c NULL if
+ *                 `ilen == 0`.
  * \param output   The output buffer. This must be a writable buffer
  *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
  *                 for an 2048-bit RSA modulus.
@@ -670,7 +655,8 @@ int mbedtls_rsa_pkcs1_encrypt( mbedtls_rsa_context *ctx,
  *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
  * \param ilen     The length of the plaintext in Bytes.
  * \param input    The input data to encrypt. This must be a readable
- *                 buffer of size \p ilen Bytes. This must not be \c NULL.
+ *                 buffer of size \p ilen Bytes. It may be \c NULL if
+ *                 `ilen == 0`.
  * \param output   The output buffer. This must be a writable buffer
  *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
  *                 for an 2048-bit RSA modulus.
@@ -714,7 +700,8 @@ int mbedtls_rsa_rsaes_pkcs1_v15_encrypt( mbedtls_rsa_context *ctx,
  * \param label_len  The length of the label in Bytes.
  * \param ilen       The length of the plaintext buffer \p input in Bytes.
  * \param input      The input data to encrypt. This must be a readable
- *                   buffer of size \p ilen Bytes. This must not be \c NULL.
+ *                   buffer of size \p ilen Bytes. It may be \c NULL if
+ *                   `ilen == 0`.
  * \param output     The output buffer. This must be a writable buffer
  *                   of length \c ctx->len Bytes. For example, \c 256 Bytes
  *                   for an 2048-bit RSA modulus.
@@ -1000,12 +987,69 @@ int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx,
  * \brief          This function performs a PKCS#1 v2.1 PSS signature
  *                 operation (RSASSA-PSS-SIGN).
  *
- * \note           The \p hash_id in the RSA context is the one used for the
- *                 encoding. \p md_alg in the function call is the type of hash
- *                 that is encoded. According to <em>RFC-3447: Public-Key
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
+ *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
+ *                 Specifications</em>.
+ *
+ * \note           This function enforces that the provided salt length complies
+ *                 with FIPS 186-4 §5.5 (e) and RFC 8017 (PKCS#1 v2.2) §9.1.1
+ *                 step 3. The constraint is that the hash length plus the salt
+ *                 length plus 2 bytes must be at most the key length. If this
+ *                 constraint is not met, this function returns
+ *                 #MBEDTLS_ERR_RSA_BAD_INPUT_DATA.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG function. It must not be \c NULL.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be \c NULL
+ *                 if \p f_rng doesn't need a context argument.
+ * \param md_alg   The message-digest algorithm used to hash the original data.
+ *                 Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen  The length of the message digest.
+ *                 Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash     The buffer holding the message digest or raw data.
+ *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ *                 buffer of length \p hashlen Bytes. If \p md_alg is not
+ *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ *                 the size of the hash corresponding to \p md_alg.
+ * \param saltlen  The length of the salt that should be used.
+ *                 If passed #MBEDTLS_RSA_SALT_LEN_ANY, the function will use
+ *                 the largest possible salt length up to the hash length,
+ *                 which is the largest permitted by some standards including
+ *                 FIPS 186-4 §5.5.
+ * \param sig      The buffer to hold the signature. This must be a writable
+ *                 buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus. A buffer length of
+ *                 #MBEDTLS_MPI_MAX_SIZE is always safe.
+ *
+ * \return         \c 0 if the signing operation was successful.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pss_sign_ext( mbedtls_rsa_context *ctx,
+                         int (*f_rng)(void *, unsigned char *, size_t),
+                         void *p_rng,
+                         mbedtls_md_type_t md_alg,
+                         unsigned int hashlen,
+                         const unsigned char *hash,
+                         int saltlen,
+                         unsigned char *sig );
+
+/**
+ * \brief          This function performs a PKCS#1 v2.1 PSS signature
+ *                 operation (RSASSA-PSS-SIGN).
+ *
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
  *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
- *                 Specifications</em> it is advised to keep both hashes the
- *                 same.
+ *                 Specifications</em>.
  *
  * \note           This function always uses the maximum possible salt size,
  *                 up to the length of the payload hash. This choice of salt
@@ -1035,7 +1079,7 @@ int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx,
  * \param md_alg   The message-digest algorithm used to hash the original data.
  *                 Use #MBEDTLS_MD_NONE for signing raw data.
  * \param hashlen  The length of the message digest.
- *                 Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ *                 This is only used if \p md_alg is #MBEDTLS_MD_NONE.
  * \param hash     The buffer holding the message digest or raw data.
  *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
  *                 buffer of length \p hashlen Bytes. If \p md_alg is not
@@ -1161,16 +1205,15 @@ int mbedtls_rsa_rsassa_pkcs1_v15_verify( mbedtls_rsa_context *ctx,
  * \brief          This function performs a PKCS#1 v2.1 PSS verification
  *                 operation (RSASSA-PSS-VERIFY).
  *
- *                 The hash function for the MGF mask generating function
- *                 is that specified in the RSA context.
- *
- * \note           The \p hash_id in the RSA context is the one used for the
- *                 verification. \p md_alg in the function call is the type of
- *                 hash that is verified. According to <em>RFC-3447: Public-Key
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
  *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
- *                 Specifications</em> it is advised to keep both hashes the
- *                 same. If \p hash_id in the RSA context is unset,
- *                 the \p md_alg from the function call is used.
+ *                 Specifications</em>. If the \c hash_id set in \p ctx is
+ *                 #MBEDTLS_MD_NONE, the \p md_alg parameter is used.
  *
  * \deprecated     It is deprecated and discouraged to call this function
  *                 in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
@@ -1218,13 +1261,12 @@ int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx,
  * \brief          This function performs a PKCS#1 v2.1 PSS verification
  *                 operation (RSASSA-PSS-VERIFY).
  *
- *                 The hash function for the MGF mask generating function
- *                 is that specified in \p mgf1_hash_id.
- *
  * \note           The \p sig buffer must be as large as the size
  *                 of \p ctx->N. For example, 128 Bytes if RSA-1024 is used.
  *
- * \note           The \p hash_id in the RSA context is ignored.
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) is ignored.
  *
  * \param ctx      The initialized RSA public key context to use.
  * \param f_rng    The RNG function to use. If \p mode is #MBEDTLS_RSA_PRIVATE,
@@ -1243,7 +1285,13 @@ int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx,
  *                 buffer of length \p hashlen Bytes. If \p md_alg is not
  *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
  *                 the size of the hash corresponding to \p md_alg.
- * \param mgf1_hash_id      The message digest used for mask generation.
+ * \param mgf1_hash_id      The message digest algorithm used for the
+ *                          verification operation and the mask generation
+ *                          function (MGF1). For more details on the encoding
+ *                          operation and the mask generation function, consult
+ *                          <em>RFC-3447: Public-Key Cryptography Standards
+ *                          (PKCS) #1 v2.1: RSA Cryptography
+ *                          Specifications</em>.
  * \param expected_salt_len The length of the salt used in padding. Use
  *                          #MBEDTLS_RSA_SALT_LEN_ANY to accept any salt length.
  * \param sig      The buffer holding the signature. This must be a readable
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h
index 953cb7b81d7..d55492bb16b 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h
@@ -36,13 +36,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -56,39 +50,18 @@
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
  *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
- *
  */
 
 #ifndef MBEDTLS_RSA_INTERNAL_H
 #define MBEDTLS_RSA_INTERNAL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
+#include "mbedtls/bignum.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha1.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha1.h
index 60c514a49ec..4c3251b4a12 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha1.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha1.h
@@ -12,13 +12,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -31,33 +25,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SHA1_H
 #define MBEDTLS_SHA1_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -66,8 +39,10 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED                  -0x0035  /**< SHA-1 hardware accelerator failed */
-#define MBEDTLS_ERR_SHA1_BAD_INPUT_DATA                   -0x0073  /**< SHA-1 input data was malformed. */
+/** SHA-1 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED                  -0x0035
+/** SHA-1 input data was malformed. */
+#define MBEDTLS_ERR_SHA1_BAD_INPUT_DATA                   -0x0073
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha256.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha256.h
index b1881e183c4..5b54be21425 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha256.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha256.h
@@ -8,13 +8,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -27,33 +21,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SHA256_H
 #define MBEDTLS_SHA256_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -62,8 +35,10 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED                -0x0037  /**< SHA-256 hardware accelerator failed */
-#define MBEDTLS_ERR_SHA256_BAD_INPUT_DATA                 -0x0074  /**< SHA-256 input data was malformed. */
+/** SHA-256 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED                -0x0037
+/** SHA-256 input data was malformed. */
+#define MBEDTLS_ERR_SHA256_BAD_INPUT_DATA                 -0x0074
 
 #ifdef __cplusplus
 extern "C" {
@@ -262,6 +237,9 @@ MBEDTLS_DEPRECATED void mbedtls_sha256_process( mbedtls_sha256_context *ctx,
  *                 be a writable buffer of length \c 32 Bytes.
  * \param is224    Determines which function to use. This must be
  *                 either \c 0 for SHA-256, or \c 1 for SHA-224.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
  */
 int mbedtls_sha256_ret( const unsigned char *input,
                         size_t ilen,
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha512.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha512.h
index 5e5a15e0008..cca47c2fe62 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha512.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/sha512.h
@@ -7,13 +7,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -26,33 +20,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SHA512_H
 #define MBEDTLS_SHA512_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -61,8 +34,10 @@
 #include <stdint.h>
 
 /* MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED                -0x0039  /**< SHA-512 hardware accelerator failed */
-#define MBEDTLS_ERR_SHA512_BAD_INPUT_DATA                 -0x0075  /**< SHA-512 input data was malformed. */
+/** SHA-512 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED                -0x0039
+/** SHA-512 input data was malformed. */
+#define MBEDTLS_ERR_SHA512_BAD_INPUT_DATA                 -0x0075
 
 #ifdef __cplusplus
 extern "C" {
@@ -84,8 +59,10 @@ typedef struct mbedtls_sha512_context
     uint64_t total[2];          /*!< The number of Bytes processed. */
     uint64_t state[8];          /*!< The intermediate digest state. */
     unsigned char buffer[128];  /*!< The data block being processed. */
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
     int is384;                  /*!< Determines which function to use:
                                      0: Use SHA-512, or 1: Use SHA-384. */
+#endif
 }
 mbedtls_sha512_context;
 
@@ -126,7 +103,11 @@ void mbedtls_sha512_clone( mbedtls_sha512_context *dst,
  *
  * \param ctx      The SHA-512 context to use. This must be initialized.
  * \param is384    Determines which function to use. This must be
- *                 either \c for SHA-512, or \c 1 for SHA-384.
+ *                 either \c 0 for SHA-512, or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will return
+ *                 #MBEDTLS_ERR_SHA512_BAD_INPUT_DATA.
  *
  * \return         \c 0 on success.
  * \return         A negative error code on failure.
@@ -194,6 +175,9 @@ int mbedtls_internal_sha512_process( mbedtls_sha512_context *ctx,
  * \param ctx      The SHA-512 context to use. This must be initialized.
  * \param is384    Determines which function to use. This must be either
  *                 \c 0 for SHA-512 or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will fail to work.
  */
 MBEDTLS_DEPRECATED void mbedtls_sha512_starts( mbedtls_sha512_context *ctx,
                                                int is384 );
@@ -264,6 +248,10 @@ MBEDTLS_DEPRECATED void mbedtls_sha512_process(
  * \param is384    Determines which function to use. This must be either
  *                 \c 0 for SHA-512, or \c 1 for SHA-384.
  *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will return
+ *                 #MBEDTLS_ERR_SHA512_BAD_INPUT_DATA.
+ *
  * \return         \c 0 on success.
  * \return         A negative error code on failure.
  */
@@ -298,6 +286,9 @@ int mbedtls_sha512_ret( const unsigned char *input,
  *                 be a writable buffer of length \c 64 Bytes.
  * \param is384    Determines which function to use. This must be either
  *                 \c 0 for SHA-512, or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will fail to work.
  */
 MBEDTLS_DEPRECATED void mbedtls_sha512( const unsigned char *input,
                                         size_t ilen,
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl.h
index 0abeb430e49..209dbf6053c 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,53 +18,37 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_H
 #define MBEDTLS_SSL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "bignum.h"
-#include "ecp.h"
+#include "mbedtls/bignum.h"
+#include "mbedtls/ecp.h"
 
-#include "ssl_ciphersuites.h"
+#include "mbedtls/ssl_ciphersuites.h"
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
-#include "x509_crt.h"
-#include "x509_crl.h"
+#include "mbedtls/x509_crt.h"
+#include "mbedtls/x509_crl.h"
 #endif
 
 #if defined(MBEDTLS_DHM_C)
-#include "dhm.h"
+#include "mbedtls/dhm.h"
 #endif
 
-#if defined(MBEDTLS_ECDH_C)
-#include "ecdh.h"
+/* Adding guard for MBEDTLS_ECDSA_C to ensure no compile errors due
+ * to guards also being in ssl_srv.c and ssl_cli.c. There is a gap
+ * in functionality that access to ecdh_ctx structure is needed for
+ * MBEDTLS_ECDSA_C which does not seem correct.
+ */
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C)
+#include "mbedtls/ecdh.h"
 #endif
 
 #if defined(MBEDTLS_ZLIB_SUPPORT)
@@ -87,68 +65,132 @@
 #endif
 
 #if defined(MBEDTLS_HAVE_TIME)
-#include "platform_time.h"
+#include "mbedtls/platform_time.h"
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 /*
  * SSL Error codes
  */
-#define MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE               -0x7080  /**< The requested feature is not available. */
-#define MBEDTLS_ERR_SSL_BAD_INPUT_DATA                    -0x7100  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_SSL_INVALID_MAC                       -0x7180  /**< Verification of the message MAC failed. */
-#define MBEDTLS_ERR_SSL_INVALID_RECORD                    -0x7200  /**< An invalid SSL record was received. */
-#define MBEDTLS_ERR_SSL_CONN_EOF                          -0x7280  /**< The connection indicated an EOF. */
-#define MBEDTLS_ERR_SSL_UNKNOWN_CIPHER                    -0x7300  /**< An unknown cipher was received. */
-#define MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN                  -0x7380  /**< The server has no ciphersuites in common with the client. */
-#define MBEDTLS_ERR_SSL_NO_RNG                            -0x7400  /**< No RNG was provided to the SSL module. */
-#define MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE             -0x7480  /**< No client certification received from the client, but required by the authentication mode. */
-#define MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE             -0x7500  /**< Our own certificate(s) is/are too large to send in an SSL message. */
-#define MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED              -0x7580  /**< The own certificate is not set, but needed by the server. */
-#define MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED              -0x7600  /**< The own private key or pre-shared key is not set, but needed. */
-#define MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED                 -0x7680  /**< No CA Chain is set, but required to operate. */
-#define MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE                -0x7700  /**< An unexpected message was received from our peer. */
-#define MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE               -0x7780  /**< A fatal alert message was received from our peer. */
-#define MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED                -0x7800  /**< Verification of our peer failed. */
-#define MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY                 -0x7880  /**< The peer notified us that the connection is going to be closed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO               -0x7900  /**< Processing of the ClientHello handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO               -0x7980  /**< Processing of the ServerHello handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE                -0x7A00  /**< Processing of the Certificate handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST        -0x7A80  /**< Processing of the CertificateRequest handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE        -0x7B00  /**< Processing of the ServerKeyExchange handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE          -0x7B80  /**< Processing of the ServerHelloDone handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE        -0x7C00  /**< Processing of the ClientKeyExchange handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP     -0x7C80  /**< Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Read Public. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS     -0x7D00  /**< Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Calculate Secret. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY         -0x7D80  /**< Processing of the CertificateVerify handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC         -0x7E00  /**< Processing of the ChangeCipherSpec handshake message failed. */
-#define MBEDTLS_ERR_SSL_BAD_HS_FINISHED                   -0x7E80  /**< Processing of the Finished handshake message failed. */
-#define MBEDTLS_ERR_SSL_ALLOC_FAILED                      -0x7F00  /**< Memory allocation failed */
-#define MBEDTLS_ERR_SSL_HW_ACCEL_FAILED                   -0x7F80  /**< Hardware acceleration function returned with error */
-#define MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH              -0x6F80  /**< Hardware acceleration function skipped / left alone data */
-#define MBEDTLS_ERR_SSL_COMPRESSION_FAILED                -0x6F00  /**< Processing of the compression / decompression failed */
-#define MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION           -0x6E80  /**< Handshake protocol not within min/max boundaries */
-#define MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET         -0x6E00  /**< Processing of the NewSessionTicket handshake message failed. */
-#define MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED            -0x6D80  /**< Session ticket has expired. */
-#define MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH                  -0x6D00  /**< Public key type mismatch (eg, asked for RSA key exchange and presented EC key) */
-#define MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY                  -0x6C80  /**< Unknown identity received (eg, PSK identity) */
-#define MBEDTLS_ERR_SSL_INTERNAL_ERROR                    -0x6C00  /**< Internal error (eg, unexpected failure in lower-level module) */
-#define MBEDTLS_ERR_SSL_COUNTER_WRAPPING                  -0x6B80  /**< A counter would wrap (eg, too many messages exchanged). */
-#define MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO       -0x6B00  /**< Unexpected message at ServerHello in renegotiation. */
-#define MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED             -0x6A80  /**< DTLS client must retry for hello verification */
-#define MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL                  -0x6A00  /**< A buffer is too small to receive or write a message */
-#define MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE             -0x6980  /**< None of the common ciphersuites is usable (eg, no suitable certificate, see debug messages). */
-#define MBEDTLS_ERR_SSL_WANT_READ                         -0x6900  /**< No data of requested type currently available on underlying transport. */
-#define MBEDTLS_ERR_SSL_WANT_WRITE                        -0x6880  /**< Connection requires a write call. */
-#define MBEDTLS_ERR_SSL_TIMEOUT                           -0x6800  /**< The operation timed out. */
-#define MBEDTLS_ERR_SSL_CLIENT_RECONNECT                  -0x6780  /**< The client initiated a reconnect from the same port. */
-#define MBEDTLS_ERR_SSL_UNEXPECTED_RECORD                 -0x6700  /**< Record header looks valid but is not expected. */
-#define MBEDTLS_ERR_SSL_NON_FATAL                         -0x6680  /**< The alert message received indicates a non-fatal error. */
-#define MBEDTLS_ERR_SSL_INVALID_VERIFY_HASH               -0x6600  /**< Couldn't set the hash for verifying CertificateVerify */
-#define MBEDTLS_ERR_SSL_CONTINUE_PROCESSING               -0x6580  /**< Internal-only message signaling that further message-processing should be done */
-#define MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS                 -0x6500  /**< The asynchronous operation is not completed yet. */
-#define MBEDTLS_ERR_SSL_EARLY_MESSAGE                     -0x6480  /**< Internal-only message signaling that a message arrived early. */
-#define MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS                -0x7000  /**< A cryptographic operation is in progress. Try again later. */
-#define MBEDTLS_ERR_SSL_BAD_CONFIG                        -0x5E80  /**< Invalid value in SSL config */
+/** The requested feature is not available. */
+#define MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE               -0x7080
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_SSL_BAD_INPUT_DATA                    -0x7100
+/** Verification of the message MAC failed. */
+#define MBEDTLS_ERR_SSL_INVALID_MAC                       -0x7180
+/** An invalid SSL record was received. */
+#define MBEDTLS_ERR_SSL_INVALID_RECORD                    -0x7200
+/** The connection indicated an EOF. */
+#define MBEDTLS_ERR_SSL_CONN_EOF                          -0x7280
+/** An unknown cipher was received. */
+#define MBEDTLS_ERR_SSL_UNKNOWN_CIPHER                    -0x7300
+/** The server has no ciphersuites in common with the client. */
+#define MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN                  -0x7380
+/** No RNG was provided to the SSL module. */
+#define MBEDTLS_ERR_SSL_NO_RNG                            -0x7400
+/** No client certification received from the client, but required by the authentication mode. */
+#define MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE             -0x7480
+/** Our own certificate(s) is/are too large to send in an SSL message. */
+#define MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE             -0x7500
+/** The own certificate is not set, but needed by the server. */
+#define MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED              -0x7580
+/** The own private key or pre-shared key is not set, but needed. */
+#define MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED              -0x7600
+/** No CA Chain is set, but required to operate. */
+#define MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED                 -0x7680
+/** An unexpected message was received from our peer. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE                -0x7700
+/** A fatal alert message was received from our peer. */
+#define MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE               -0x7780
+/** Verification of our peer failed. */
+#define MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED                -0x7800
+/** The peer notified us that the connection is going to be closed. */
+#define MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY                 -0x7880
+/** Processing of the ClientHello handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO               -0x7900
+/** Processing of the ServerHello handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO               -0x7980
+/** Processing of the Certificate handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE                -0x7A00
+/** Processing of the CertificateRequest handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST        -0x7A80
+/** Processing of the ServerKeyExchange handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE        -0x7B00
+/** Processing of the ServerHelloDone handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE          -0x7B80
+/** Processing of the ClientKeyExchange handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE        -0x7C00
+/** Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Read Public. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP     -0x7C80
+/** Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Calculate Secret. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS     -0x7D00
+/** Processing of the CertificateVerify handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY         -0x7D80
+/** Processing of the ChangeCipherSpec handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC         -0x7E00
+/** Processing of the Finished handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_FINISHED                   -0x7E80
+/** Memory allocation failed */
+#define MBEDTLS_ERR_SSL_ALLOC_FAILED                      -0x7F00
+/** Hardware acceleration function returned with error */
+#define MBEDTLS_ERR_SSL_HW_ACCEL_FAILED                   -0x7F80
+/** Hardware acceleration function skipped / left alone data */
+#define MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH              -0x6F80
+/** Processing of the compression / decompression failed */
+#define MBEDTLS_ERR_SSL_COMPRESSION_FAILED                -0x6F00
+/** Handshake protocol not within min/max boundaries */
+#define MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION           -0x6E80
+/** Processing of the NewSessionTicket handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET         -0x6E00
+/** Session ticket has expired. */
+#define MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED            -0x6D80
+/** Public key type mismatch (eg, asked for RSA key exchange and presented EC key) */
+#define MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH                  -0x6D00
+/** Unknown identity received (eg, PSK identity) */
+#define MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY                  -0x6C80
+/** Internal error (eg, unexpected failure in lower-level module) */
+#define MBEDTLS_ERR_SSL_INTERNAL_ERROR                    -0x6C00
+/** A counter would wrap (eg, too many messages exchanged). */
+#define MBEDTLS_ERR_SSL_COUNTER_WRAPPING                  -0x6B80
+/** Unexpected message at ServerHello in renegotiation. */
+#define MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO       -0x6B00
+/** DTLS client must retry for hello verification */
+#define MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED             -0x6A80
+/** A buffer is too small to receive or write a message */
+#define MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL                  -0x6A00
+/** None of the common ciphersuites is usable (eg, no suitable certificate, see debug messages). */
+#define MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE             -0x6980
+/** No data of requested type currently available on underlying transport. */
+#define MBEDTLS_ERR_SSL_WANT_READ                         -0x6900
+/** Connection requires a write call. */
+#define MBEDTLS_ERR_SSL_WANT_WRITE                        -0x6880
+/** The operation timed out. */
+#define MBEDTLS_ERR_SSL_TIMEOUT                           -0x6800
+/** The client initiated a reconnect from the same port. */
+#define MBEDTLS_ERR_SSL_CLIENT_RECONNECT                  -0x6780
+/** Record header looks valid but is not expected. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_RECORD                 -0x6700
+/** The alert message received indicates a non-fatal error. */
+#define MBEDTLS_ERR_SSL_NON_FATAL                         -0x6680
+/** Couldn't set the hash for verifying CertificateVerify */
+#define MBEDTLS_ERR_SSL_INVALID_VERIFY_HASH               -0x6600
+/** Internal-only message signaling that further message-processing should be done */
+#define MBEDTLS_ERR_SSL_CONTINUE_PROCESSING               -0x6580
+/** The asynchronous operation is not completed yet. */
+#define MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS                 -0x6500
+/** Internal-only message signaling that a message arrived early. */
+#define MBEDTLS_ERR_SSL_EARLY_MESSAGE                     -0x6480
+/** An encrypted DTLS-frame with an unexpected CID was received. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_CID                    -0x6000
+/** An operation failed due to an unexpected version or configuration. */
+#define MBEDTLS_ERR_SSL_VERSION_MISMATCH                  -0x5F00
+/** A cryptographic operation is in progress. Try again later. */
+#define MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS                -0x7000
+/** Invalid value in SSL config */
+#define MBEDTLS_ERR_SSL_BAD_CONFIG                        -0x5E80
 
 /*
  * Various constants
@@ -158,6 +200,7 @@
 #define MBEDTLS_SSL_MINOR_VERSION_1             1   /*!< TLS v1.0 */
 #define MBEDTLS_SSL_MINOR_VERSION_2             2   /*!< TLS v1.1 */
 #define MBEDTLS_SSL_MINOR_VERSION_3             3   /*!< TLS v1.2 */
+#define MBEDTLS_SSL_MINOR_VERSION_4             4   /*!< TLS v1.3 (experimental) */
 
 #define MBEDTLS_SSL_TRANSPORT_STREAM            0   /*!< TLS      */
 #define MBEDTLS_SSL_TRANSPORT_DATAGRAM          1   /*!< DTLS     */
@@ -185,6 +228,9 @@
 #define MBEDTLS_SSL_EXTENDED_MS_DISABLED        0
 #define MBEDTLS_SSL_EXTENDED_MS_ENABLED         1
 
+#define MBEDTLS_SSL_CID_DISABLED                0
+#define MBEDTLS_SSL_CID_ENABLED                 1
+
 #define MBEDTLS_SSL_ETM_DISABLED                0
 #define MBEDTLS_SSL_ETM_ENABLED                 1
 
@@ -231,6 +277,9 @@
 #define MBEDTLS_SSL_CERT_REQ_CA_LIST_ENABLED       1
 #define MBEDTLS_SSL_CERT_REQ_CA_LIST_DISABLED      0
 
+#define MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED    0
+#define MBEDTLS_SSL_DTLS_SRTP_MKI_SUPPORTED      1
+
 /*
  * Default range for DTLS retransmission timer value, in milliseconds.
  * RFC 6347 4.2.4.1 says from 1 second to 60 seconds.
@@ -281,6 +330,25 @@
 #define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
 #endif
 
+/*
+ * Maximum length of CIDs for incoming and outgoing messages.
+ */
+#if !defined(MBEDTLS_SSL_CID_IN_LEN_MAX)
+#define MBEDTLS_SSL_CID_IN_LEN_MAX          32
+#endif
+
+#if !defined(MBEDTLS_SSL_CID_OUT_LEN_MAX)
+#define MBEDTLS_SSL_CID_OUT_LEN_MAX         32
+#endif
+
+#if !defined(MBEDTLS_SSL_CID_PADDING_GRANULARITY)
+#define MBEDTLS_SSL_CID_PADDING_GRANULARITY 16
+#endif
+
+#if !defined(MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY)
+#define MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY 1
+#endif
+
 /* \} name SECTION: Module settings */
 
 /*
@@ -328,6 +396,7 @@
 #define MBEDTLS_SSL_MSG_ALERT                  21
 #define MBEDTLS_SSL_MSG_HANDSHAKE              22
 #define MBEDTLS_SSL_MSG_APPLICATION_DATA       23
+#define MBEDTLS_SSL_MSG_CID                    25
 
 #define MBEDTLS_SSL_ALERT_LEVEL_WARNING         1
 #define MBEDTLS_SSL_ALERT_LEVEL_FATAL           2
@@ -390,6 +459,8 @@
 
 #define MBEDTLS_TLS_EXT_SIG_ALG                     13
 
+#define MBEDTLS_TLS_EXT_USE_SRTP                    14
+
 #define MBEDTLS_TLS_EXT_ALPN                        16
 
 #define MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC            22 /* 0x16 */
@@ -397,6 +468,17 @@
 
 #define MBEDTLS_TLS_EXT_SESSION_TICKET              35
 
+/* The value of the CID extension is still TBD as of
+ * draft-ietf-tls-dtls-connection-id-05
+ * (https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05).
+ *
+ * A future minor revision of Mbed TLS may change the default value of
+ * this option to match evolving standards and usage.
+ */
+#if !defined(MBEDTLS_TLS_EXT_CID)
+#define MBEDTLS_TLS_EXT_CID                        254 /* TBD */
+#endif
+
 #define MBEDTLS_TLS_EXT_ECJPAKE_KKPP               256 /* experimental */
 
 #define MBEDTLS_TLS_EXT_RENEGOTIATION_INFO      0xFF01
@@ -475,6 +557,18 @@ typedef enum
 }
 mbedtls_ssl_states;
 
+/*
+ * The tls_prf function types.
+ */
+typedef enum
+{
+   MBEDTLS_SSL_TLS_PRF_NONE,
+   MBEDTLS_SSL_TLS_PRF_SSL3,
+   MBEDTLS_SSL_TLS_PRF_TLS1,
+   MBEDTLS_SSL_TLS_PRF_SHA384,
+   MBEDTLS_SSL_TLS_PRF_SHA256
+}
+mbedtls_tls_prf_types;
 /**
  * \brief          Callback type: send data on the network.
  *
@@ -506,10 +600,11 @@ typedef int mbedtls_ssl_send_t( void *ctx,
  * \param buf      Buffer to write the received data to
  * \param len      Length of the receive buffer
  *
- * \return         The callback must return the number of bytes received,
- *                 or a non-zero error code.
- *                 If performing non-blocking I/O, \c MBEDTLS_ERR_SSL_WANT_READ
+ * \returns        If data has been received, the positive number of bytes received.
+ * \returns        \c 0 if the connection has been closed.
+ * \returns        If performing non-blocking I/O, \c MBEDTLS_ERR_SSL_WANT_READ
  *                 must be returned when the operation would block.
+ * \returns        Another negative error code on other kinds of failures.
  *
  * \note           The callback may receive fewer bytes than the length of the
  *                 buffer. It must always return the number of bytes actually
@@ -812,11 +907,77 @@ typedef int mbedtls_ssl_async_resume_t( mbedtls_ssl_context *ssl,
 typedef void mbedtls_ssl_async_cancel_t( mbedtls_ssl_context *ssl );
 #endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
 
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_MAX_LEN  48
+#if defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA256
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  32
+#elif defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA384
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  48
+#elif defined(MBEDTLS_SHA1_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA1
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  20
+#else
+/* This is already checked in check_config.h, but be sure. */
+#error "Bad configuration - need SHA-1, SHA-256 or SHA-512 enabled to compute digest of peer CRT."
+#endif
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED &&
+          !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+
+#define MBEDTLS_TLS_SRTP_MAX_MKI_LENGTH             255
+#define MBEDTLS_TLS_SRTP_MAX_PROFILE_LIST_LENGTH    4
+/*
+ * For code readability use a typedef for DTLS-SRTP profiles
+ *
+ * Use_srtp extension protection profiles values as defined in
+ * http://www.iana.org/assignments/srtp-protection/srtp-protection.xhtml
+ *
+ * Reminder: if this list is expanded mbedtls_ssl_check_srtp_profile_value
+ * must be updated too.
+ */
+#define MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80     ( (uint16_t) 0x0001)
+#define MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32     ( (uint16_t) 0x0002)
+#define MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80          ( (uint16_t) 0x0005)
+#define MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32          ( (uint16_t) 0x0006)
+/* This one is not iana defined, but for code readability. */
+#define MBEDTLS_TLS_SRTP_UNSET                      ( (uint16_t) 0x0000)
+
+typedef uint16_t mbedtls_ssl_srtp_profile;
+
+typedef struct mbedtls_dtls_srtp_info_t
+{
+    /*! The SRTP profile that was negotiated. */
+    mbedtls_ssl_srtp_profile chosen_dtls_srtp_profile;
+    /*! The length of mki_value. */
+    uint16_t mki_len;
+    /*! The mki_value used, with max size of 256 bytes. */
+    unsigned char mki_value[MBEDTLS_TLS_SRTP_MAX_MKI_LENGTH];
+}
+mbedtls_dtls_srtp_info;
+
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
 /*
  * This structure is used for storing current session data.
+ *
+ * Note: when changing this definition, we need to check and update:
+ *  - in tests/suites/test_suite_ssl.function:
+ *      ssl_populate_session() and ssl_serialize_session_save_load()
+ *  - in library/ssl_tls.c:
+ *      mbedtls_ssl_session_init() and mbedtls_ssl_session_free()
+ *      mbedtls_ssl_session_save() and ssl_session_load()
+ *      ssl_session_copy()
  */
 struct mbedtls_ssl_session
 {
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+    unsigned char mfl_code;     /*!< MaxFragmentLength negotiated by peer */
+#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
+
 #if defined(MBEDTLS_HAVE_TIME)
     mbedtls_time_t start;       /*!< starting time      */
 #endif
@@ -827,7 +988,15 @@ struct mbedtls_ssl_session
     unsigned char master[48];   /*!< the master secret  */
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
-    mbedtls_x509_crt *peer_cert;        /*!< peer X.509 cert chain */
+#if defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+    mbedtls_x509_crt *peer_cert;       /*!< peer X.509 cert chain */
+#else /* MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
+    /*! The digest of the peer's end-CRT. This must be kept to detect CRT
+     *  changes during renegotiation, mitigating the triple handshake attack. */
+    unsigned char *peer_cert_digest;
+    size_t peer_cert_digest_len;
+    mbedtls_md_type_t peer_cert_digest_type;
+#endif /* !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
     uint32_t verify_result;          /*!<  verification result     */
 
@@ -837,10 +1006,6 @@ struct mbedtls_ssl_session
     uint32_t ticket_lifetime;   /*!< ticket lifetime hint    */
 #endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_CLI_C */
 
-#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
-    unsigned char mfl_code;     /*!< MaxFragmentLength negotiated by peer */
-#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
-
 #if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
     int trunc_hmac;             /*!< flag for truncated hmac activation   */
 #endif /* MBEDTLS_SSL_TRUNCATED_HMAC */
@@ -855,7 +1020,98 @@ struct mbedtls_ssl_session
  */
 struct mbedtls_ssl_config
 {
-    /* Group items by size (largest first) to minimize padding overhead */
+    /* Group items by size and reorder them to maximize usage of immediate offset access.    */
+
+    /*
+     * Numerical settings (char)
+     */
+
+    unsigned char max_major_ver;    /*!< max. major version used            */
+    unsigned char max_minor_ver;    /*!< max. minor version used            */
+    unsigned char min_major_ver;    /*!< min. major version used            */
+    unsigned char min_minor_ver;    /*!< min. minor version used            */
+
+    /*
+     * Flags (could be bit-fields to save RAM, but separate bytes make
+     * the code smaller on architectures with an instruction for direct
+     * byte access).
+     */
+
+    uint8_t endpoint /*bool*/;      /*!< 0: client, 1: server               */
+    uint8_t transport /*bool*/;     /*!< stream (TLS) or datagram (DTLS)    */
+    uint8_t authmode /*2 bits*/;    /*!< MBEDTLS_SSL_VERIFY_XXX             */
+    /* needed even with renego disabled for LEGACY_BREAK_HANDSHAKE          */
+    uint8_t allow_legacy_renegotiation /*2 bits*/; /*!< MBEDTLS_LEGACY_XXX  */
+#if defined(MBEDTLS_ARC4_C)
+    uint8_t arc4_disabled /*bool*/; /*!< blacklist RC4 ciphersuites?        */
+#endif
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+    uint8_t mfl_code /*3 bits*/;    /*!< desired fragment length            */
+#endif
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+    uint8_t encrypt_then_mac /*bool*/;  /*!< negotiate encrypt-then-mac?    */
+#endif
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+    uint8_t extended_ms /*bool*/;   /*!< negotiate extended master secret?  */
+#endif
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+    uint8_t anti_replay /*bool*/;   /*!< detect and prevent replay?         */
+#endif
+#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
+    uint8_t cbc_record_splitting /*bool*/;  /*!< do cbc record splitting    */
+#endif
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+    uint8_t disable_renegotiation /*bool*/; /*!< disable renegotiation?     */
+#endif
+#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
+    uint8_t trunc_hmac /*bool*/;    /*!< negotiate truncated hmac?          */
+#endif
+#if defined(MBEDTLS_SSL_SESSION_TICKETS)
+    uint8_t session_tickets /*bool*/;   /*!< use session tickets?           */
+#endif
+#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C)
+    uint8_t fallback /*bool*/;      /*!< is this a fallback?                */
+#endif
+#if defined(MBEDTLS_SSL_SRV_C)
+    uint8_t cert_req_ca_list /*bool*/;  /*!< enable sending CA list in
+                                          Certificate Request messages?     */
+#endif
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t ignore_unexpected_cid /*bool*/; /*!< Determines whether DTLS
+                                             *   record with unexpected CID
+                                             *   should lead to failure.    */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    uint8_t dtls_srtp_mki_support /*bool*/; /*!< support having mki_value
+                                                 in the use_srtp extension? */
+#endif
+
+    /*
+     * Numerical settings (int or larger)
+     */
+
+    uint32_t read_timeout;          /*!< timeout for mbedtls_ssl_read (ms)  */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    uint32_t hs_timeout_min;        /*!< initial value of the handshake
+                                         retransmission timeout (ms)        */
+    uint32_t hs_timeout_max;        /*!< maximum value of the handshake
+                                         retransmission timeout (ms)        */
+#endif
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+    int renego_max_records;         /*!< grace period for renegotiation     */
+    unsigned char renego_period[8]; /*!< value of the record counters
+                                         that triggers renegotiation        */
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
+    unsigned int badmac_limit;      /*!< limit of records with a bad MAC    */
+#endif
+
+#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C)
+    unsigned int dhm_min_bitlen;    /*!< min. bit length of the DHM prime   */
+#endif
 
     /*
      * Pointers
@@ -889,7 +1145,7 @@ struct mbedtls_ssl_config
     void *p_vrfy;                   /*!< context for X.509 verify calllback */
 #endif
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
     /** Callback to retrieve PSK key from identity                          */
     int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *, size_t);
     void *p_psk;                    /*!< context for PSK callback           */
@@ -918,14 +1174,28 @@ struct mbedtls_ssl_config
     /** Callback to export key block and master secret                      */
     int (*f_export_keys)( void *, const unsigned char *,
             const unsigned char *, size_t, size_t, size_t );
+    /** Callback to export key block, master secret,
+     *  tls_prf and random bytes. Should replace f_export_keys    */
+    int (*f_export_keys_ext)( void *, const unsigned char *,
+                const unsigned char *, size_t, size_t, size_t,
+                const unsigned char[32], const unsigned char[32],
+                mbedtls_tls_prf_types );
     void *p_export_keys;            /*!< context for key export callback    */
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    size_t cid_len; /*!< The length of CIDs for incoming DTLS records.      */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
     const mbedtls_x509_crt_profile *cert_profile; /*!< verification profile */
     mbedtls_ssl_key_cert *key_cert; /*!< own certificate/key pair(s)        */
     mbedtls_x509_crt *ca_chain;     /*!< trusted CAs                        */
     mbedtls_x509_crl *ca_crl;       /*!< trusted CAs CRLs                   */
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+    mbedtls_x509_crt_ca_cb_t f_ca_cb;
+    void *p_ca_cb;
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
 
 #if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
@@ -938,7 +1208,7 @@ struct mbedtls_ssl_config
     void *p_async_config_data; /*!< Configuration data set by mbedtls_ssl_conf_async_private_cb(). */
 #endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
     const int *sig_hashes;          /*!< allowed signature hashes           */
 #endif
 
@@ -951,103 +1221,52 @@ struct mbedtls_ssl_config
     mbedtls_mpi dhm_G;              /*!< generator for DHM                  */
 #endif
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
-    unsigned char *psk;             /*!< pre-shared key. This field should
-                                         only be set via
-                                         mbedtls_ssl_conf_psk() */
-    size_t         psk_len;         /*!< length of the pre-shared key. This
-                                         field should only be set via
-                                         mbedtls_ssl_conf_psk() */
-    unsigned char *psk_identity;    /*!< identity for PSK negotiation. This
-                                         field should only be set via
-                                         mbedtls_ssl_conf_psk() */
-    size_t         psk_identity_len;/*!< length of identity. This field should
-                                         only be set via
-                                         mbedtls_ssl_conf_psk() */
-#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_id_t psk_opaque; /*!< PSA key slot holding opaque PSK. This field
+                              *   should only be set via
+                              *   mbedtls_ssl_conf_psk_opaque().
+                              *   If either no PSK or a raw PSK have been
+                              *   configured, this has value \c 0.
+                              */
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+    unsigned char *psk;      /*!< The raw pre-shared key. This field should
+                              *   only be set via mbedtls_ssl_conf_psk().
+                              *   If either no PSK or an opaque PSK
+                              *   have been configured, this has value NULL. */
+    size_t         psk_len;  /*!< The length of the raw pre-shared key.
+                              *   This field should only be set via
+                              *   mbedtls_ssl_conf_psk().
+                              *   Its value is non-zero if and only if
+                              *   \c psk is not \c NULL. */
+
+    unsigned char *psk_identity;    /*!< The PSK identity for PSK negotiation.
+                                     *   This field should only be set via
+                                     *   mbedtls_ssl_conf_psk().
+                                     *   This is set if and only if either
+                                     *   \c psk or \c psk_opaque are set. */
+    size_t         psk_identity_len;/*!< The length of PSK identity.
+                                     *   This field should only be set via
+                                     *   mbedtls_ssl_conf_psk().
+                                     *   Its value is non-zero if and only if
+                                     *   \c psk is not \c NULL or \c psk_opaque
+                                     *   is not \c 0. */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
 
 #if defined(MBEDTLS_SSL_ALPN)
     const char **alpn_list;         /*!< ordered list of protocols          */
 #endif
 
-    /*
-     * Numerical settings (int then char)
-     */
-
-    uint32_t read_timeout;          /*!< timeout for mbedtls_ssl_read (ms)  */
-
-#if defined(MBEDTLS_SSL_PROTO_DTLS)
-    uint32_t hs_timeout_min;        /*!< initial value of the handshake
-                                         retransmission timeout (ms)        */
-    uint32_t hs_timeout_max;        /*!< maximum value of the handshake
-                                         retransmission timeout (ms)        */
-#endif
-
-#if defined(MBEDTLS_SSL_RENEGOTIATION)
-    int renego_max_records;         /*!< grace period for renegotiation     */
-    unsigned char renego_period[8]; /*!< value of the record counters
-                                         that triggers renegotiation        */
-#endif
-
-#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
-    unsigned int badmac_limit;      /*!< limit of records with a bad MAC    */
-#endif
-
-#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C)
-    unsigned int dhm_min_bitlen;    /*!< min. bit length of the DHM prime   */
-#endif
-
-    unsigned char max_major_ver;    /*!< max. major version used            */
-    unsigned char max_minor_ver;    /*!< max. minor version used            */
-    unsigned char min_major_ver;    /*!< min. major version used            */
-    unsigned char min_minor_ver;    /*!< min. minor version used            */
-
-    /*
-     * Flags (bitfields)
-     */
-
-    unsigned int endpoint : 1;      /*!< 0: client, 1: server               */
-    unsigned int transport : 1;     /*!< stream (TLS) or datagram (DTLS)    */
-    unsigned int authmode : 2;      /*!< MBEDTLS_SSL_VERIFY_XXX             */
-    /* needed even with renego disabled for LEGACY_BREAK_HANDSHAKE          */
-    unsigned int allow_legacy_renegotiation : 2 ; /*!< MBEDTLS_LEGACY_XXX   */
-#if defined(MBEDTLS_ARC4_C)
-    unsigned int arc4_disabled : 1; /*!< blacklist RC4 ciphersuites?        */
-#endif
-#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
-    unsigned int mfl_code : 3;      /*!< desired fragment length            */
-#endif
-#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
-    unsigned int encrypt_then_mac : 1 ; /*!< negotiate encrypt-then-mac?    */
-#endif
-#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
-    unsigned int extended_ms : 1;   /*!< negotiate extended master secret?  */
-#endif
-#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
-    unsigned int anti_replay : 1;   /*!< detect and prevent replay?         */
-#endif
-#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
-    unsigned int cbc_record_splitting : 1;  /*!< do cbc record splitting    */
-#endif
-#if defined(MBEDTLS_SSL_RENEGOTIATION)
-    unsigned int disable_renegotiation : 1; /*!< disable renegotiation?     */
-#endif
-#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
-    unsigned int trunc_hmac : 1;    /*!< negotiate truncated hmac?          */
-#endif
-#if defined(MBEDTLS_SSL_SESSION_TICKETS)
-    unsigned int session_tickets : 1;   /*!< use session tickets?           */
-#endif
-#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C)
-    unsigned int fallback : 1;      /*!< is this a fallback?                */
-#endif
-#if defined(MBEDTLS_SSL_SRV_C)
-    unsigned int cert_req_ca_list : 1;  /*!< enable sending CA list in
-                                          Certificate Request messages?     */
-#endif
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    /*! ordered list of supported srtp profile */
+    const mbedtls_ssl_srtp_profile *dtls_srtp_profile_list;
+    /*! number of supported profiles */
+    size_t dtls_srtp_profile_list_len;
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
 };
 
-
 struct mbedtls_ssl_context
 {
     const mbedtls_ssl_config *conf; /*!< configuration information          */
@@ -1070,6 +1289,12 @@ struct mbedtls_ssl_context
     unsigned badmac_seen;       /*!< records with a bad MAC received    */
 #endif /* MBEDTLS_SSL_DTLS_BADMAC_LIMIT */
 
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+    /** Callback to customize X.509 certificate chain verification          */
+    int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *);
+    void *p_vrfy;                   /*!< context for X.509 verify callback */
+#endif
+
     mbedtls_ssl_send_t *f_send; /*!< Callback for network send */
     mbedtls_ssl_recv_t *f_recv; /*!< Callback for network receive */
     mbedtls_ssl_recv_timeout_t *f_recv_timeout;
@@ -1112,6 +1337,10 @@ struct mbedtls_ssl_context
                                      TLS: maintained by us
                                      DTLS: read from peer             */
     unsigned char *in_hdr;      /*!< start of record header           */
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    unsigned char *in_cid;      /*!< The start of the CID;
+                                 *   (the end is marked by in_len).   */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
     unsigned char *in_len;      /*!< two-bytes message length field   */
     unsigned char *in_iv;       /*!< ivlen-byte IV                    */
     unsigned char *in_msg;      /*!< message contents (in_iv+ivlen)   */
@@ -1120,6 +1349,9 @@ struct mbedtls_ssl_context
     int in_msgtype;             /*!< record header: message type      */
     size_t in_msglen;           /*!< record header: message length    */
     size_t in_left;             /*!< amount of data read so far       */
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+    size_t in_buf_len;          /*!< length of input buffer           */
+#endif
 #if defined(MBEDTLS_SSL_PROTO_DTLS)
     uint16_t in_epoch;          /*!< DTLS epoch for incoming records  */
     size_t next_record_offset;  /*!< offset of the next record in datagram
@@ -1148,6 +1380,10 @@ struct mbedtls_ssl_context
     unsigned char *out_buf;     /*!< output buffer                    */
     unsigned char *out_ctr;     /*!< 64-bit outgoing message counter  */
     unsigned char *out_hdr;     /*!< start of record header           */
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    unsigned char *out_cid;     /*!< The start of the CID;
+                                 *   (the end is marked by in_len).   */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
     unsigned char *out_len;     /*!< two-bytes message length field   */
     unsigned char *out_iv;      /*!< ivlen-byte IV                    */
     unsigned char *out_msg;     /*!< message contents (out_iv+ivlen)  */
@@ -1155,6 +1391,9 @@ struct mbedtls_ssl_context
     int out_msgtype;            /*!< record header: message type      */
     size_t out_msglen;          /*!< record header: message length    */
     size_t out_left;            /*!< amount of data not yet written   */
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+    size_t out_buf_len;         /*!< length of output buffer          */
+#endif
 
     unsigned char cur_out_ctr[8]; /*!<  Outgoing record sequence  number. */
 
@@ -1186,6 +1425,13 @@ struct mbedtls_ssl_context
     const char *alpn_chosen;    /*!<  negotiated protocol                   */
 #endif /* MBEDTLS_SSL_ALPN */
 
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    /*
+     * use_srtp extension
+     */
+    mbedtls_dtls_srtp_info dtls_srtp_info;
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
     /*
      * Information for DTLS hello verify
      */
@@ -1205,25 +1451,59 @@ struct mbedtls_ssl_context
     char own_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!<  previous handshake verify data */
     char peer_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!<  previous handshake verify data */
 #endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    /* CID configuration to use in subsequent handshakes. */
+
+    /*! The next incoming CID, chosen by the user and applying to
+     *  all subsequent handshakes. This may be different from the
+     *  CID currently used in case the user has re-configured the CID
+     *  after an initial handshake. */
+    unsigned char own_cid[ MBEDTLS_SSL_CID_IN_LEN_MAX ];
+    uint8_t own_cid_len;   /*!< The length of \c own_cid. */
+    uint8_t negotiate_cid; /*!< This indicates whether the CID extension should
+                            *   be negotiated in the next handshake or not.
+                            *   Possible values are #MBEDTLS_SSL_CID_ENABLED
+                            *   and #MBEDTLS_SSL_CID_DISABLED. */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
 };
 
 #if defined(MBEDTLS_SSL_HW_RECORD_ACCEL)
 
-#define MBEDTLS_SSL_CHANNEL_OUTBOUND    0
-#define MBEDTLS_SSL_CHANNEL_INBOUND     1
-
-extern int (*mbedtls_ssl_hw_record_init)(mbedtls_ssl_context *ssl,
-                const unsigned char *key_enc, const unsigned char *key_dec,
-                size_t keylen,
-                const unsigned char *iv_enc,  const unsigned char *iv_dec,
-                size_t ivlen,
-                const unsigned char *mac_enc, const unsigned char *mac_dec,
-                size_t maclen);
-extern int (*mbedtls_ssl_hw_record_activate)(mbedtls_ssl_context *ssl, int direction);
-extern int (*mbedtls_ssl_hw_record_reset)(mbedtls_ssl_context *ssl);
-extern int (*mbedtls_ssl_hw_record_write)(mbedtls_ssl_context *ssl);
-extern int (*mbedtls_ssl_hw_record_read)(mbedtls_ssl_context *ssl);
-extern int (*mbedtls_ssl_hw_record_finish)(mbedtls_ssl_context *ssl);
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#define MBEDTLS_SSL_CHANNEL_OUTBOUND   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( 0 )
+#define MBEDTLS_SSL_CHANNEL_INBOUND    MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( 1 )
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_WARNING */
+
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_init)(
+                    mbedtls_ssl_context *ssl,
+                    const unsigned char *key_enc, const unsigned char *key_dec,
+                    size_t keylen,
+                    const unsigned char *iv_enc,  const unsigned char *iv_dec,
+                    size_t ivlen,
+                    const unsigned char *mac_enc, const unsigned char *mac_dec,
+                    size_t maclen);
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_activate)(
+                                                    mbedtls_ssl_context *ssl,
+                                                    int direction );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_reset)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_write)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_read)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_finish)(
+                                                    mbedtls_ssl_context *ssl );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
 #endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */
 
 /**
@@ -1346,13 +1626,17 @@ void mbedtls_ssl_conf_authmode( mbedtls_ssl_config *conf, int authmode );
 /**
  * \brief          Set the verification callback (Optional).
  *
- *                 If set, the verify callback is called for each
- *                 certificate in the chain. For implementation
- *                 information, please see \c mbedtls_x509_crt_verify()
+ *                 If set, the provided verify callback is called for each
+ *                 certificate in the peer's CRT chain, including the trusted
+ *                 root. For more information, please see the documentation of
+ *                 \c mbedtls_x509_crt_verify().
  *
- * \param conf     SSL configuration
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
+ * \note           For per context callbacks and contexts, please use
+ *                 mbedtls_ssl_set_verify() instead.
+ *
+ * \param conf     The SSL configuration to use.
+ * \param f_vrfy   The verification callback to use during CRT verification.
+ * \param p_vrfy   The opaque context to be passed to the callback.
  */
 void mbedtls_ssl_conf_verify( mbedtls_ssl_config *conf,
                      int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
@@ -1425,6 +1709,142 @@ void mbedtls_ssl_set_bio( mbedtls_ssl_context *ssl,
                           mbedtls_ssl_recv_timeout_t *f_recv_timeout );
 
 #if defined(MBEDTLS_SSL_PROTO_DTLS)
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+
+
+/**
+ * \brief             Configure the use of the Connection ID (CID)
+ *                    extension in the next handshake.
+ *
+ *                    Reference: draft-ietf-tls-dtls-connection-id-05
+ *                    https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05
+ *
+ *                    The DTLS CID extension allows the reliable association of
+ *                    DTLS records to DTLS connections across changes in the
+ *                    underlying transport (changed IP and Port metadata) by
+ *                    adding explicit connection identifiers (CIDs) to the
+ *                    headers of encrypted DTLS records. The desired CIDs are
+ *                    configured by the application layer and are exchanged in
+ *                    new `ClientHello` / `ServerHello` extensions during the
+ *                    handshake, where each side indicates the CID it wants the
+ *                    peer to use when writing encrypted messages. The CIDs are
+ *                    put to use once records get encrypted: the stack discards
+ *                    any incoming records that don't include the configured CID
+ *                    in their header, and adds the peer's requested CID to the
+ *                    headers of outgoing messages.
+ *
+ *                    This API enables or disables the use of the CID extension
+ *                    in the next handshake and sets the value of the CID to
+ *                    be used for incoming messages.
+ *
+ * \param ssl         The SSL context to configure. This must be initialized.
+ * \param enable      This value determines whether the CID extension should
+ *                    be used or not. Possible values are:
+ *                    - MBEDTLS_SSL_CID_ENABLED to enable the use of the CID.
+ *                    - MBEDTLS_SSL_CID_DISABLED (default) to disable the use
+ *                      of the CID.
+ * \param own_cid     The address of the readable buffer holding the CID we want
+ *                    the peer to use when sending encrypted messages to us.
+ *                    This may be \c NULL if \p own_cid_len is \c 0.
+ *                    This parameter is unused if \p enabled is set to
+ *                    MBEDTLS_SSL_CID_DISABLED.
+ * \param own_cid_len The length of \p own_cid.
+ *                    This parameter is unused if \p enabled is set to
+ *                    MBEDTLS_SSL_CID_DISABLED.
+ *
+ * \note              The value of \p own_cid_len must match the value of the
+ *                    \c len parameter passed to mbedtls_ssl_conf_cid()
+ *                    when configuring the ::mbedtls_ssl_config that \p ssl
+ *                    is bound to.
+ *
+ * \note              This CID configuration applies to subsequent handshakes
+ *                    performed on the SSL context \p ssl, but does not trigger
+ *                    one. You still have to call `mbedtls_ssl_handshake()`
+ *                    (for the initial handshake) or `mbedtls_ssl_renegotiate()`
+ *                    (for a renegotiation handshake) explicitly after a
+ *                    successful call to this function to run the handshake.
+ *
+ * \note              This call cannot guarantee that the use of the CID
+ *                    will be successfully negotiated in the next handshake,
+ *                    because the peer might not support it. Specifically:
+ *                    - On the Client, enabling the use of the CID through
+ *                      this call implies that the `ClientHello` in the next
+ *                      handshake will include the CID extension, thereby
+ *                      offering the use of the CID to the server. Only if
+ *                      the `ServerHello` contains the CID extension, too,
+ *                      the CID extension will actually be put to use.
+ *                    - On the Server, enabling the use of the CID through
+ *                      this call implies that that the server will look for
+ *                      the CID extension in a `ClientHello` from the client,
+ *                      and, if present, reply with a CID extension in its
+ *                      `ServerHello`.
+ *
+ * \note              To check whether the use of the CID was negotiated
+ *                    after the subsequent handshake has completed, please
+ *                    use the API mbedtls_ssl_get_peer_cid().
+ *
+ * \warning           If the use of the CID extension is enabled in this call
+ *                    and the subsequent handshake negotiates its use, Mbed TLS
+ *                    will silently drop every packet whose CID does not match
+ *                    the CID configured in \p own_cid. It is the responsibility
+ *                    of the user to adapt the underlying transport to take care
+ *                    of CID-based demultiplexing before handing datagrams to
+ *                    Mbed TLS.
+ *
+ * \return            \c 0 on success. In this case, the CID configuration
+ *                    applies to the next handshake.
+ * \return            A negative error code on failure.
+ */
+int mbedtls_ssl_set_cid( mbedtls_ssl_context *ssl,
+                         int enable,
+                         unsigned char const *own_cid,
+                         size_t own_cid_len );
+
+/**
+ * \brief              Get information about the use of the CID extension
+ *                     in the current connection.
+ *
+ * \param ssl          The SSL context to query.
+ * \param enabled      The address at which to store whether the CID extension
+ *                     is currently in use or not. If the CID is in use,
+ *                     `*enabled` is set to MBEDTLS_SSL_CID_ENABLED;
+ *                     otherwise, it is set to MBEDTLS_SSL_CID_DISABLED.
+ * \param peer_cid     The address of the buffer in which to store the CID
+ *                     chosen by the peer (if the CID extension is used).
+ *                     This may be \c NULL in case the value of peer CID
+ *                     isn't needed. If it is not \c NULL, \p peer_cid_len
+ *                     must not be \c NULL.
+ * \param peer_cid_len The address at which to store the size of the CID
+ *                     chosen by the peer (if the CID extension is used).
+ *                     This is also the number of Bytes in \p peer_cid that
+ *                     have been written.
+ *                     This may be \c NULL in case the length of the peer CID
+ *                     isn't needed. If it is \c NULL, \p peer_cid must be
+ *                     \c NULL, too.
+ *
+ * \note               This applies to the state of the CID negotiated in
+ *                     the last complete handshake. If a handshake is in
+ *                     progress, this function will attempt to complete
+ *                     the handshake first.
+ *
+ * \note               If CID extensions have been exchanged but both client
+ *                     and server chose to use an empty CID, this function
+ *                     sets `*enabled` to #MBEDTLS_SSL_CID_DISABLED
+ *                     (the rationale for this is that the resulting
+ *                     communication is the same as if the CID extensions
+ *                     hadn't been used).
+ *
+ * \return            \c 0 on success.
+ * \return            A negative error code on failure.
+ */
+int mbedtls_ssl_get_peer_cid( mbedtls_ssl_context *ssl,
+                     int *enabled,
+                     unsigned char peer_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ],
+                     size_t *peer_cid_len );
+
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
 /**
  * \brief          Set the Maximum Tranport Unit (MTU).
  *                 Special value: 0 means unset (no limit).
@@ -1470,6 +1890,30 @@ void mbedtls_ssl_set_bio( mbedtls_ssl_context *ssl,
 void mbedtls_ssl_set_mtu( mbedtls_ssl_context *ssl, uint16_t mtu );
 #endif /* MBEDTLS_SSL_PROTO_DTLS */
 
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief          Set a connection-specific verification callback (optional).
+ *
+ *                 If set, the provided verify callback is called for each
+ *                 certificate in the peer's CRT chain, including the trusted
+ *                 root. For more information, please see the documentation of
+ *                 \c mbedtls_x509_crt_verify().
+ *
+ * \note           This call is analogous to mbedtls_ssl_conf_verify() but
+ *                 binds the verification callback and context to an SSL context
+ *                 as opposed to an SSL configuration.
+ *                 If mbedtls_ssl_conf_verify() and mbedtls_ssl_set_verify()
+ *                 are both used, mbedtls_ssl_set_verify() takes precedence.
+ *
+ * \param ssl      The SSL context to use.
+ * \param f_vrfy   The verification callback to use during CRT verification.
+ * \param p_vrfy   The opaque context to be passed to the callback.
+ */
+void mbedtls_ssl_set_verify( mbedtls_ssl_context *ssl,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
 /**
  * \brief          Set the timeout period for mbedtls_ssl_read()
  *                 (Default: no timeout.)
@@ -1488,6 +1932,56 @@ void mbedtls_ssl_set_mtu( mbedtls_ssl_context *ssl, uint16_t mtu );
  */
 void mbedtls_ssl_conf_read_timeout( mbedtls_ssl_config *conf, uint32_t timeout );
 
+#if defined(MBEDTLS_SSL_RECORD_CHECKING)
+/**
+ * \brief          Check whether a buffer contains a valid and authentic record
+ *                 that has not been seen before. (DTLS only).
+ *
+ *                 This function does not change the user-visible state
+ *                 of the SSL context. Its sole purpose is to provide
+ *                 an indication of the legitimacy of an incoming record.
+ *
+ *                 This can be useful e.g. in distributed server environments
+ *                 using the DTLS Connection ID feature, in which connections
+ *                 might need to be passed between service instances on a change
+ *                 of peer address, but where such disruptive operations should
+ *                 only happen after the validity of incoming records has been
+ *                 confirmed.
+ *
+ * \param ssl      The SSL context to use.
+ * \param buf      The address of the buffer holding the record to be checked.
+ *                 This must be a read/write buffer of length \p buflen Bytes.
+ * \param buflen   The length of \p buf in Bytes.
+ *
+ * \note           This routine only checks whether the provided buffer begins
+ *                 with a valid and authentic record that has not been seen
+ *                 before, but does not check potential data following the
+ *                 initial record. In particular, it is possible to pass DTLS
+ *                 datagrams containing multiple records, in which case only
+ *                 the first record is checked.
+ *
+ * \note           This function modifies the input buffer \p buf. If you need
+ *                 to preserve the original record, you have to maintain a copy.
+ *
+ * \return         \c 0 if the record is valid and authentic and has not been
+ *                 seen before.
+ * \return         MBEDTLS_ERR_SSL_INVALID_MAC if the check completed
+ *                 successfully but the record was found to be not authentic.
+ * \return         MBEDTLS_ERR_SSL_INVALID_RECORD if the check completed
+ *                 successfully but the record was found to be invalid for
+ *                 a reason different from authenticity checking.
+ * \return         MBEDTLS_ERR_SSL_UNEXPECTED_RECORD if the check completed
+ *                 successfully but the record was found to be unexpected
+ *                 in the state of the SSL context, including replayed records.
+ * \return         Another negative error code on different kinds of failure.
+ *                 In this case, the SSL context becomes unusable and needs
+ *                 to be freed or reset before reuse.
+ */
+int mbedtls_ssl_check_record( mbedtls_ssl_context const *ssl,
+                              unsigned char *buf,
+                              size_t buflen );
+#endif /* MBEDTLS_SSL_RECORD_CHECKING */
+
 /**
  * \brief          Set the timer callbacks (Mandatory for DTLS.)
  *
@@ -1566,6 +2060,41 @@ typedef int mbedtls_ssl_export_keys_t( void *p_expkey,
                                 size_t maclen,
                                 size_t keylen,
                                 size_t ivlen );
+
+/**
+ * \brief           Callback type: Export key block, master secret,
+ *                                 handshake randbytes and the tls_prf function
+ *                                 used to derive keys.
+ *
+ * \note            This is required for certain uses of TLS, e.g. EAP-TLS
+ *                  (RFC 5216) and Thread. The key pointers are ephemeral and
+ *                  therefore must not be stored. The master secret and keys
+ *                  should not be used directly except as an input to a key
+ *                  derivation function.
+ *
+ * \param p_expkey  Context for the callback.
+ * \param ms        Pointer to master secret (fixed length: 48 bytes).
+ * \param kb            Pointer to key block, see RFC 5246 section 6.3.
+ *                      (variable length: 2 * maclen + 2 * keylen + 2 * ivlen).
+ * \param maclen        MAC length.
+ * \param keylen        Key length.
+ * \param ivlen         IV length.
+ * \param client_random The client random bytes.
+ * \param server_random The server random bytes.
+ * \param tls_prf_type The tls_prf enum type.
+ *
+ * \return          0 if successful, or
+ *                  a specific MBEDTLS_ERR_XXX code.
+ */
+typedef int mbedtls_ssl_export_keys_ext_t( void *p_expkey,
+                                           const unsigned char *ms,
+                                           const unsigned char *kb,
+                                           size_t maclen,
+                                           size_t keylen,
+                                           size_t ivlen,
+                                           const unsigned char client_random[32],
+                                           const unsigned char server_random[32],
+                                           mbedtls_tls_prf_types tls_prf_type );
 #endif /* MBEDTLS_SSL_EXPORT_KEYS */
 
 /**
@@ -1631,6 +2160,22 @@ void mbedtls_ssl_conf_session_tickets_cb( mbedtls_ssl_config *conf,
 void mbedtls_ssl_conf_export_keys_cb( mbedtls_ssl_config *conf,
         mbedtls_ssl_export_keys_t *f_export_keys,
         void *p_export_keys );
+
+/**
+ * \brief           Configure extended key export callback.
+ *                  (Default: none.)
+ *
+ * \note            See \c mbedtls_ssl_export_keys_ext_t.
+ * \warning         Exported key material must not be used for any purpose
+ *                  before the (D)TLS handshake is completed
+ *
+ * \param conf      SSL configuration context
+ * \param f_export_keys_ext Callback for exporting keys
+ * \param p_export_keys     Context for the callback
+ */
+void mbedtls_ssl_conf_export_keys_ext_cb( mbedtls_ssl_config *conf,
+        mbedtls_ssl_export_keys_ext_t *f_export_keys_ext,
+        void *p_export_keys );
 #endif /* MBEDTLS_SSL_EXPORT_KEYS */
 
 #if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
@@ -1981,6 +2526,90 @@ void mbedtls_ssl_conf_session_cache( mbedtls_ssl_config *conf,
 int mbedtls_ssl_set_session( mbedtls_ssl_context *ssl, const mbedtls_ssl_session *session );
 #endif /* MBEDTLS_SSL_CLI_C */
 
+/**
+ * \brief          Load serialized session data into a session structure.
+ *                 On client, this can be used for loading saved sessions
+ *                 before resuming them with mbedstls_ssl_set_session().
+ *                 On server, this can be used for alternative implementations
+ *                 of session cache or session tickets.
+ *
+ * \warning        If a peer certificate chain is associated with the session,
+ *                 the serialized state will only contain the peer's
+ *                 end-entity certificate and the result of the chain
+ *                 verification (unless verification was disabled), but not
+ *                 the rest of the chain.
+ *
+ * \see            mbedtls_ssl_session_save()
+ * \see            mbedtls_ssl_set_session()
+ *
+ * \param session  The session structure to be populated. It must have been
+ *                 initialised with mbedtls_ssl_session_init() but not
+ *                 populated yet.
+ * \param buf      The buffer holding the serialized session data. It must be a
+ *                 readable buffer of at least \p len bytes.
+ * \param len      The size of the serialized data in bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if input data is invalid.
+ * \return         #MBEDTLS_ERR_SSL_VERSION_MISMATCH if the serialized data
+ *                 was generated in a different version or configuration of
+ *                 Mbed TLS.
+ * \return         Another negative value for other kinds of errors (for
+ *                 example, unsupported features in the embedded certificate).
+ */
+int mbedtls_ssl_session_load( mbedtls_ssl_session *session,
+                              const unsigned char *buf,
+                              size_t len );
+
+/**
+ * \brief          Save session structure as serialized data in a buffer.
+ *                 On client, this can be used for saving session data,
+ *                 potentially in non-volatile storage, for resuming later.
+ *                 On server, this can be used for alternative implementations
+ *                 of session cache or session tickets.
+ *
+ * \see            mbedtls_ssl_session_load()
+ * \see            mbedtls_ssl_get_session_pointer()
+ *
+ * \param session  The session structure to be saved.
+ * \param buf      The buffer to write the serialized data to. It must be a
+ *                 writeable buffer of at least \p len bytes, or may be \c
+ *                 NULL if \p len is \c 0.
+ * \param buf_len  The number of bytes available for writing in \p buf.
+ * \param olen     The size in bytes of the data that has been or would have
+ *                 been written. It must point to a valid \c size_t.
+ *
+ * \note           \p olen is updated to the correct value regardless of
+ *                 whether \p buf_len was large enough. This makes it possible
+ *                 to determine the necessary size by calling this function
+ *                 with \p buf set to \c NULL and \p buf_len to \c 0.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL if \p buf is too small.
+ */
+int mbedtls_ssl_session_save( const mbedtls_ssl_session *session,
+                              unsigned char *buf,
+                              size_t buf_len,
+                              size_t *olen );
+
+/**
+ * \brief          Get a pointer to the current session structure, for example
+ *                 to serialize it.
+ *
+ * \warning        Ownership of the session remains with the SSL context, and
+ *                 the returned pointer is only guaranteed to be valid until
+ *                 the next API call operating on the same \p ssl context.
+ *
+ * \see            mbedtls_ssl_session_save()
+ *
+ * \param ssl      The SSL context.
+ *
+ * \return         A pointer to the current session if successful.
+ * \return         \c NULL if no session is active.
+ */
+const mbedtls_ssl_session *mbedtls_ssl_get_session_pointer( const mbedtls_ssl_context *ssl );
+
 /**
  * \brief               Set the list of allowed ciphersuites and the preference
  *                      order. First in the list has the highest preference.
@@ -1999,6 +2628,45 @@ int mbedtls_ssl_set_session( mbedtls_ssl_context *ssl, const mbedtls_ssl_session
 void mbedtls_ssl_conf_ciphersuites( mbedtls_ssl_config *conf,
                                    const int *ciphersuites );
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+#define MBEDTLS_SSL_UNEXPECTED_CID_IGNORE 0
+#define MBEDTLS_SSL_UNEXPECTED_CID_FAIL   1
+/**
+ * \brief               Specify the length of Connection IDs for incoming
+ *                      encrypted DTLS records, as well as the behaviour
+ *                      on unexpected CIDs.
+ *
+ *                      By default, the CID length is set to \c 0,
+ *                      and unexpected CIDs are silently ignored.
+ *
+ * \param conf          The SSL configuration to modify.
+ * \param len           The length in Bytes of the CID fields in encrypted
+ *                      DTLS records using the CID mechanism. This must
+ *                      not be larger than #MBEDTLS_SSL_CID_OUT_LEN_MAX.
+ * \param ignore_other_cids This determines the stack's behaviour when
+ *                          receiving a record with an unexpected CID.
+ *                          Possible values are:
+ *                          - #MBEDTLS_SSL_UNEXPECTED_CID_IGNORE
+ *                            In this case, the record is silently ignored.
+ *                          - #MBEDTLS_SSL_UNEXPECTED_CID_FAIL
+ *                            In this case, the stack fails with the specific
+ *                            error code #MBEDTLS_ERR_SSL_UNEXPECTED_CID.
+ *
+ * \note                The CID specification allows implementations to either
+ *                      use a common length for all incoming connection IDs or
+ *                      allow variable-length incoming IDs. Mbed TLS currently
+ *                      requires a common length for all connections sharing the
+ *                      same SSL configuration; this allows simpler parsing of
+ *                      record headers.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if \p own_cid_len
+ *                      is too large.
+ */
+int mbedtls_ssl_conf_cid( mbedtls_ssl_config *conf, size_t len,
+                          int ignore_other_cids );
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
 /**
  * \brief               Set the list of allowed ciphersuites and the
  *                      preference order for a specific version of the protocol.
@@ -2051,6 +2719,63 @@ void mbedtls_ssl_conf_ca_chain( mbedtls_ssl_config *conf,
                                mbedtls_x509_crt *ca_chain,
                                mbedtls_x509_crl *ca_crl );
 
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+/**
+ * \brief          Set the trusted certificate callback.
+ *
+ *                 This API allows to register the set of trusted certificates
+ *                 through a callback, instead of a linked list as configured
+ *                 by mbedtls_ssl_conf_ca_chain().
+ *
+ *                 This is useful for example in contexts where a large number
+ *                 of CAs are used, and the inefficiency of maintaining them
+ *                 in a linked list cannot be tolerated. It is also useful when
+ *                 the set of trusted CAs needs to be modified frequently.
+ *
+ *                 See the documentation of `mbedtls_x509_crt_ca_cb_t` for
+ *                 more information.
+ *
+ * \param conf     The SSL configuration to register the callback with.
+ * \param f_ca_cb  The trusted certificate callback to use when verifying
+ *                 certificate chains.
+ * \param p_ca_cb  The context to be passed to \p f_ca_cb (for example,
+ *                 a reference to a trusted CA database).
+ *
+ * \note           This API is incompatible with mbedtls_ssl_conf_ca_chain():
+ *                 Any call to this function overwrites the values set through
+ *                 earlier calls to mbedtls_ssl_conf_ca_chain() or
+ *                 mbedtls_ssl_conf_ca_cb().
+ *
+ * \note           This API is incompatible with CA indication in
+ *                 CertificateRequest messages: A server-side SSL context which
+ *                 is bound to an SSL configuration that uses a CA callback
+ *                 configured via mbedtls_ssl_conf_ca_cb(), and which requires
+ *                 client authentication, will send an empty CA list in the
+ *                 corresponding CertificateRequest message.
+ *
+ * \note           This API is incompatible with mbedtls_ssl_set_hs_ca_chain():
+ *                 If an SSL context is bound to an SSL configuration which uses
+ *                 CA callbacks configured via mbedtls_ssl_conf_ca_cb(), then
+ *                 calls to mbedtls_ssl_set_hs_ca_chain() have no effect.
+ *
+ * \note           The use of this API disables the use of restartable ECC
+ *                 during X.509 CRT signature verification (but doesn't affect
+ *                 other uses).
+ *
+ * \warning        This API is incompatible with the use of CRLs. Any call to
+ *                 mbedtls_ssl_conf_ca_cb() unsets CRLs configured through
+ *                 earlier calls to mbedtls_ssl_conf_ca_chain().
+ *
+ * \warning        In multi-threaded environments, the callback \p f_ca_cb
+ *                 must be thread-safe, and it is the user's responsibility
+ *                 to guarantee this (for example through a mutex
+ *                 contained in the callback context pointed to by \p p_ca_cb).
+ */
+void mbedtls_ssl_conf_ca_cb( mbedtls_ssl_config *conf,
+                             mbedtls_x509_crt_ca_cb_t f_ca_cb,
+                             void *p_ca_cb );
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
+
 /**
  * \brief          Set own certificate chain and private key
  *
@@ -2092,76 +2817,172 @@ int mbedtls_ssl_conf_own_cert( mbedtls_ssl_config *conf,
                               mbedtls_pk_context *pk_key );
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
 /**
- * \brief          Set the Pre Shared Key (PSK) and the expected identity name
+ * \brief          Configure a pre-shared key (PSK) and identity
+ *                 to be used in PSK-based ciphersuites.
  *
  * \note           This is mainly useful for clients. Servers will usually
  *                 want to use \c mbedtls_ssl_conf_psk_cb() instead.
  *
- * \note           Currently clients can only register one pre-shared key.
- *                 In other words, the servers' identity hint is ignored.
+ * \note           A PSK set by \c mbedtls_ssl_set_hs_psk() in the PSK callback
+ *                 takes precedence over a PSK configured by this function.
+ *
+ * \warning        Currently, clients can only register a single pre-shared key.
+ *                 Calling this function or mbedtls_ssl_conf_psk_opaque() more
+ *                 than once will overwrite values configured in previous calls.
  *                 Support for setting multiple PSKs on clients and selecting
- *                 one based on the identity hint is not a planned feature but
- *                 feedback is welcomed.
+ *                 one based on the identity hint is not a planned feature,
+ *                 but feedback is welcomed.
  *
- * \param conf     SSL configuration
- * \param psk      pointer to the pre-shared key
- * \param psk_len  pre-shared key length
- * \param psk_identity      pointer to the pre-shared key identity
- * \param psk_identity_len  identity key length
+ * \param conf     The SSL configuration to register the PSK with.
+ * \param psk      The pointer to the pre-shared key to use.
+ * \param psk_len  The length of the pre-shared key in bytes.
+ * \param psk_identity      The pointer to the pre-shared key identity.
+ * \param psk_identity_len  The length of the pre-shared key identity
+ *                          in bytes.
  *
- * \return         0 if successful or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ * \note           The PSK and its identity are copied internally and
+ *                 hence need not be preserved by the caller for the lifetime
+ *                 of the SSL configuration.
+ *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
  */
 int mbedtls_ssl_conf_psk( mbedtls_ssl_config *conf,
                 const unsigned char *psk, size_t psk_len,
                 const unsigned char *psk_identity, size_t psk_identity_len );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief          Configure an opaque pre-shared key (PSK) and identity
+ *                 to be used in PSK-based ciphersuites.
+ *
+ * \note           This is mainly useful for clients. Servers will usually
+ *                 want to use \c mbedtls_ssl_conf_psk_cb() instead.
+ *
+ * \note           An opaque PSK set by \c mbedtls_ssl_set_hs_psk_opaque() in
+ *                 the PSK callback takes precedence over an opaque PSK
+ *                 configured by this function.
+ *
+ * \warning        Currently, clients can only register a single pre-shared key.
+ *                 Calling this function or mbedtls_ssl_conf_psk() more than
+ *                 once will overwrite values configured in previous calls.
+ *                 Support for setting multiple PSKs on clients and selecting
+ *                 one based on the identity hint is not a planned feature,
+ *                 but feedback is welcomed.
+ *
+ * \param conf     The SSL configuration to register the PSK with.
+ * \param psk      The identifier of the key slot holding the PSK.
+ *                 Until \p conf is destroyed or this function is successfully
+ *                 called again, the key slot \p psk must be populated with a
+ *                 key of type PSA_ALG_CATEGORY_KEY_DERIVATION whose policy
+ *                 allows its use for the key derivation algorithm applied
+ *                 in the handshake.
+ * \param psk_identity      The pointer to the pre-shared key identity.
+ * \param psk_identity_len  The length of the pre-shared key identity
+ *                          in bytes.
+ *
+ * \note           The PSK identity hint is copied internally and hence need
+ *                 not be preserved by the caller for the lifetime of the
+ *                 SSL configuration.
+ *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
+ */
+int mbedtls_ssl_conf_psk_opaque( mbedtls_ssl_config *conf,
+                                 psa_key_id_t psk,
+                                 const unsigned char *psk_identity,
+                                 size_t psk_identity_len );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
 
 /**
- * \brief          Set the Pre Shared Key (PSK) for the current handshake
+ * \brief          Set the pre-shared Key (PSK) for the current handshake.
  *
  * \note           This should only be called inside the PSK callback,
- *                 ie the function passed to \c mbedtls_ssl_conf_psk_cb().
+ *                 i.e. the function passed to \c mbedtls_ssl_conf_psk_cb().
  *
- * \param ssl      SSL context
- * \param psk      pointer to the pre-shared key
- * \param psk_len  pre-shared key length
+ * \note           A PSK set by this function takes precedence over a PSK
+ *                 configured by \c mbedtls_ssl_conf_psk().
+ *
+ * \param ssl      The SSL context to configure a PSK for.
+ * \param psk      The pointer to the pre-shared key.
+ * \param psk_len  The length of the pre-shared key in bytes.
  *
- * \return         0 if successful or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
  */
 int mbedtls_ssl_set_hs_psk( mbedtls_ssl_context *ssl,
                             const unsigned char *psk, size_t psk_len );
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief          Set an opaque pre-shared Key (PSK) for the current handshake.
+ *
+ * \note           This should only be called inside the PSK callback,
+ *                 i.e. the function passed to \c mbedtls_ssl_conf_psk_cb().
+ *
+ * \note           An opaque PSK set by this function takes precedence over an
+ *                 opaque PSK configured by \c mbedtls_ssl_conf_psk_opaque().
+ *
+ * \param ssl      The SSL context to configure a PSK for.
+ * \param psk      The identifier of the key slot holding the PSK.
+ *                 For the duration of the current handshake, the key slot
+ *                 must be populated with a key of type
+ *                 PSA_ALG_CATEGORY_KEY_DERIVATION whose policy allows its
+ *                 use for the key derivation algorithm
+ *                 applied in the handshake.
+  *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
+ */
+int mbedtls_ssl_set_hs_psk_opaque( mbedtls_ssl_context *ssl,
+                                   psa_key_id_t psk );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 /**
  * \brief          Set the PSK callback (server-side only).
  *
  *                 If set, the PSK callback is called for each
- *                 handshake where a PSK ciphersuite was negotiated.
+ *                 handshake where a PSK-based ciphersuite was negotiated.
  *                 The caller provides the identity received and wants to
  *                 receive the actual PSK data and length.
  *
- *                 The callback has the following parameters: (void *parameter,
- *                 mbedtls_ssl_context *ssl, const unsigned char *psk_identity,
- *                 size_t identity_len)
+ *                 The callback has the following parameters:
+ *                 - \c void*: The opaque pointer \p p_psk.
+ *                 - \c mbedtls_ssl_context*: The SSL context to which
+ *                                            the operation applies.
+ *                 - \c const unsigned char*: The PSK identity
+ *                                            selected by the client.
+ *                 - \c size_t: The length of the PSK identity
+ *                              selected by the client.
+ *
  *                 If a valid PSK identity is found, the callback should use
- *                 \c mbedtls_ssl_set_hs_psk() on the ssl context to set the
- *                 correct PSK and return 0.
+ *                 \c mbedtls_ssl_set_hs_psk() or
+ *                 \c mbedtls_ssl_set_hs_psk_opaque()
+ *                 on the SSL context to set the correct PSK and return \c 0.
  *                 Any other return value will result in a denied PSK identity.
  *
- * \note           If you set a PSK callback using this function, then you
- *                 don't need to set a PSK key and identity using
- *                 \c mbedtls_ssl_conf_psk().
- *
- * \param conf     SSL configuration
- * \param f_psk    PSK identity function
- * \param p_psk    PSK identity parameter
+ * \note           A dynamic PSK (i.e. set by the PSK callback) takes
+ *                 precedence over a static PSK (i.e. set by
+ *                 \c mbedtls_ssl_conf_psk() or
+ *                 \c mbedtls_ssl_conf_psk_opaque()).
+ *                 This means that if you set a PSK callback using this
+ *                 function, you don't need to set a PSK using
+ *                 \c mbedtls_ssl_conf_psk() or
+ *                 \c mbedtls_ssl_conf_psk_opaque()).
+ *
+ * \param conf     The SSL configuration to register the callback with.
+ * \param f_psk    The callback for selecting and setting the PSK based
+ *                 in the PSK identity chosen by the client.
+ * \param p_psk    A pointer to an opaque structure to be passed to
+ *                 the callback, for example a PSK store.
  */
 void mbedtls_ssl_conf_psk_cb( mbedtls_ssl_config *conf,
                      int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *,
                                   size_t),
                      void *p_psk );
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
 
 #if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_SRV_C)
 
@@ -2237,7 +3058,9 @@ void mbedtls_ssl_conf_dhm_min_bitlen( mbedtls_ssl_config *conf,
 #if defined(MBEDTLS_ECP_C)
 /**
  * \brief          Set the allowed curves in order of preference.
- *                 (Default: all defined curves in order of decreasing size.)
+ *                 (Default: all defined curves in order of decreasing size,
+ *                 except that Montgomery curves come last. This order
+ *                 is likely to change in a future version.)
  *
  *                 On server: this only affects selection of the ECDHE curve;
  *                 the curves used for ECDH and ECDSA are determined by the
@@ -2266,7 +3089,7 @@ void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
                               const mbedtls_ecp_group_id *curves );
 #endif /* MBEDTLS_ECP_C */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 /**
  * \brief          Set the allowed hashes for signatures during the handshake.
  *                 (Default: all SHA-2 hashes, largest first. Also SHA-1 if
@@ -2289,7 +3112,7 @@ void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
  */
 void mbedtls_ssl_conf_sig_hashes( mbedtls_ssl_config *conf,
                                   const int *hashes );
-#endif /* MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 /**
@@ -2437,6 +3260,105 @@ int mbedtls_ssl_conf_alpn_protocols( mbedtls_ssl_config *conf, const char **prot
 const char *mbedtls_ssl_get_alpn_protocol( const mbedtls_ssl_context *ssl );
 #endif /* MBEDTLS_SSL_ALPN */
 
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+#if defined(MBEDTLS_DEBUG_C)
+static inline const char *mbedtls_ssl_get_srtp_profile_as_string( mbedtls_ssl_srtp_profile profile )
+{
+    switch( profile )
+    {
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80:
+            return( "MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80" );
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32:
+            return( "MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32" );
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80:
+            return( "MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80" );
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32:
+            return( "MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32" );
+        default: break;
+    }
+    return( "" );
+}
+#endif /* MBEDTLS_DEBUG_C */
+/**
+ * \brief                   Manage support for mki(master key id) value
+ *                          in use_srtp extension.
+ *                          MKI is an optional part of SRTP used for key management
+ *                          and re-keying. See RFC3711 section 3.1 for details.
+ *                          The default value is
+ *                          #MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED.
+ *
+ * \param conf              The SSL configuration to manage mki support.
+ * \param support_mki_value Enable or disable mki usage. Values are
+ *                          #MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED
+ *                          or #MBEDTLS_SSL_DTLS_SRTP_MKI_SUPPORTED.
+ */
+void mbedtls_ssl_conf_srtp_mki_value_supported( mbedtls_ssl_config *conf,
+                                                int support_mki_value );
+
+/**
+ * \brief                   Set the supported DTLS-SRTP protection profiles.
+ *
+ * \param conf              SSL configuration
+ * \param profiles          Pointer to a List of MBEDTLS_TLS_SRTP_UNSET terminated
+ *                          supported protection profiles
+ *                          in decreasing preference order.
+ *                          The pointer to the list is recorded by the library
+ *                          for later reference as required, so the lifetime
+ *                          of the table must be at least as long as the lifetime
+ *                          of the SSL configuration structure.
+ *                          The list must not hold more than
+ *                          MBEDTLS_TLS_SRTP_MAX_PROFILE_LIST_LENGTH elements
+ *                          (excluding the terminating MBEDTLS_TLS_SRTP_UNSET).
+ *
+ * \return                  0 on success
+ * \return                  #MBEDTLS_ERR_SSL_BAD_INPUT_DATA when the list of
+ *                          protection profiles is incorrect.
+ */
+int mbedtls_ssl_conf_dtls_srtp_protection_profiles
+                               ( mbedtls_ssl_config *conf,
+                                 const mbedtls_ssl_srtp_profile *profiles );
+
+/**
+ * \brief                  Set the mki_value for the current DTLS-SRTP session.
+ *
+ * \param ssl              SSL context to use.
+ * \param mki_value        The MKI value to set.
+ * \param mki_len          The length of the MKI value.
+ *
+ * \note                   This function is relevant on client side only.
+ *                         The server discovers the mki value during handshake.
+ *                         A mki value set on server side using this function
+ *                         is ignored.
+ *
+ * \return                 0 on success
+ * \return                 #MBEDTLS_ERR_SSL_BAD_INPUT_DATA
+ * \return                 #MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE
+ */
+int mbedtls_ssl_dtls_srtp_set_mki_value( mbedtls_ssl_context *ssl,
+                                         unsigned char *mki_value,
+                                         uint16_t mki_len );
+/**
+ * \brief                  Get the negotiated DTLS-SRTP informations:
+ *                         Protection profile and MKI value.
+ *
+ * \warning                This function must be called after the handshake is
+ *                         completed. The value returned by this function must
+ *                         not be trusted or acted upon before the handshake completes.
+ *
+ * \param ssl              The SSL context to query.
+ * \param dtls_srtp_info   The negotiated DTLS-SRTP informations:
+ *                         - Protection profile in use.
+ *                         A direct mapping of the iana defined value for protection
+ *                         profile on an uint16_t.
+                   http://www.iana.org/assignments/srtp-protection/srtp-protection.xhtml
+ *                         #MBEDTLS_TLS_SRTP_UNSET if the use of SRTP was not negotiated
+ *                         or peer's Hello packet was not parsed yet.
+ *                         - mki size and value( if size is > 0 ).
+ */
+void mbedtls_ssl_get_dtls_srtp_negotiation_result( const mbedtls_ssl_context *ssl,
+                                                   mbedtls_dtls_srtp_info *dtls_srtp_info );
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
 /**
  * \brief          Set the maximum supported version sent from the client side
  *                 and/or accepted at the server side
@@ -2536,7 +3458,7 @@ void mbedtls_ssl_conf_extended_master_secret( mbedtls_ssl_config *conf, char ems
  * \warning        Use of RC4 in DTLS/TLS has been prohibited by RFC 7465
  *                 for security reasons. Use at your own risk.
  *
- * \note           This function is deprecated and will likely be removed in
+ * \note           This function is deprecated and will be removed in
  *                 a future version of the library.
  *                 RC4 is disabled by default at compile time and needs to be
  *                 actively enabled for use with legacy systems.
@@ -2577,14 +3499,14 @@ void mbedtls_ssl_conf_cert_req_ca_list( mbedtls_ssl_config *conf,
  *                 been set via this function to a value different than
  *                 #MBEDTLS_SSL_MAX_FRAG_LEN_NONE.
  *
- * \note           This sets the maximum length for a record's payload,
- *                 excluding record overhead that will be added to it, see
- *                 \c mbedtls_ssl_get_record_expansion().
- *
  * \note           With TLS, this currently only affects ApplicationData (sent
  *                 with \c mbedtls_ssl_read()), not handshake messages.
  *                 With DTLS, this affects both ApplicationData and handshake.
  *
+ * \note           This sets the maximum length for a record's payload,
+ *                 excluding record overhead that will be added to it, see
+ *                 \c mbedtls_ssl_get_record_expansion().
+ *
  * \note           For DTLS, it is also possible to set a limit for the total
  *                 size of daragrams passed to the transport layer, including
  *                 record overhead, see \c mbedtls_ssl_set_mtu().
@@ -2735,7 +3657,7 @@ void mbedtls_ssl_conf_renegotiation_enforced( mbedtls_ssl_config *conf, int max_
  *                 (Default: 2^48 - 1)
  *
  *                 Renegotiation is automatically triggered when a record
- *                 counter (outgoing or ingoing) crosses the defined
+ *                 counter (outgoing or incoming) crosses the defined
  *                 threshold. The default value is meant to prevent the
  *                 connection from being closed when the counter is about to
  *                 reached its maximal value (it is not allowed to wrap).
@@ -2865,18 +3787,61 @@ int mbedtls_ssl_get_record_expansion( const mbedtls_ssl_context *ssl );
 
 #if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
 /**
- * \brief          Return the maximum fragment length (payload, in bytes).
- *                 This is the value negotiated with peer if any,
- *                 or the locally configured value.
+ * \brief          Return the maximum fragment length (payload, in bytes) for
+ *                 the output buffer. For the client, this is the configured
+ *                 value. For the server, it is the minimum of two - the
+ *                 configured value and the negotiated one.
  *
  * \sa             mbedtls_ssl_conf_max_frag_len()
  * \sa             mbedtls_ssl_get_max_record_payload()
  *
  * \param ssl      SSL context
  *
- * \return         Current maximum fragment length.
+ * \return         Current maximum fragment length for the output buffer.
+ */
+size_t mbedtls_ssl_get_output_max_frag_len( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Return the maximum fragment length (payload, in bytes) for
+ *                 the input buffer. This is the negotiated maximum fragment
+ *                 length, or, if there is none, MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *                 If it is not defined either, the value is 2^14. This function
+ *                 works as its predecessor, \c mbedtls_ssl_get_max_frag_len().
+ *
+ * \sa             mbedtls_ssl_conf_max_frag_len()
+ * \sa             mbedtls_ssl_get_max_record_payload()
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Current maximum fragment length for the output buffer.
+ */
+size_t mbedtls_ssl_get_input_max_frag_len( const mbedtls_ssl_context *ssl );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
+/**
+ * \brief          This function is a deprecated approach to getting the max
+ *                 fragment length. Its an alias for
+ *                 \c mbedtls_ssl_get_output_max_frag_len(), as the behaviour
+ *                 is the same. See \c mbedtls_ssl_get_output_max_frag_len() for
+ *                 more detail.
+ *
+ * \sa             mbedtls_ssl_get_input_max_frag_len()
+ * \sa             mbedtls_ssl_get_output_max_frag_len()
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Current maximum fragment length for the output buffer.
  */
-size_t mbedtls_ssl_get_max_frag_len( const mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED size_t mbedtls_ssl_get_max_frag_len(
+                                        const mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
 #endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
 
 /**
@@ -2897,7 +3862,8 @@ size_t mbedtls_ssl_get_max_frag_len( const mbedtls_ssl_context *ssl );
  *                 when record compression is enabled.
  *
  * \sa             mbedtls_ssl_set_mtu()
- * \sa             mbedtls_ssl_get_max_frag_len()
+ * \sa             mbedtls_ssl_get_output_max_frag_len()
+ * \sa             mbedtls_ssl_get_input_max_frag_len()
  * \sa             mbedtls_ssl_get_record_expansion()
  *
  * \param ssl      SSL context
@@ -2909,18 +3875,34 @@ int mbedtls_ssl_get_max_out_record_payload( const mbedtls_ssl_context *ssl );
 
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 /**
- * \brief          Return the peer certificate from the current connection
- *
- *                 Note: Can be NULL in case no certificate was sent during
- *                 the handshake. Different calls for the same connection can
- *                 return the same or different pointers for the same
- *                 certificate and even a different certificate altogether.
- *                 The peer cert CAN change in a single connection if
- *                 renegotiation is performed.
- *
- * \param ssl      SSL context
- *
- * \return         the current peer certificate
+ * \brief          Return the peer certificate from the current connection.
+ *
+ * \param  ssl     The SSL context to use. This must be initialized and setup.
+ *
+ * \return         The current peer certificate, if available.
+ *                 The returned certificate is owned by the SSL context and
+ *                 is valid only until the next call to the SSL API.
+ * \return         \c NULL if no peer certificate is available. This might
+ *                 be because the chosen ciphersuite doesn't use CRTs
+ *                 (PSK-based ciphersuites, for example), or because
+ *                 #MBEDTLS_SSL_KEEP_PEER_CERTIFICATE has been disabled,
+ *                 allowing the stack to free the peer's CRT to save memory.
+ *
+ * \note           For one-time inspection of the peer's certificate during
+ *                 the handshake, consider registering an X.509 CRT verification
+ *                 callback through mbedtls_ssl_conf_verify() instead of calling
+ *                 this function. Using mbedtls_ssl_conf_verify() also comes at
+ *                 the benefit of allowing you to influence the verification
+ *                 process, for example by masking expected and tolerated
+ *                 verification failures.
+ *
+ * \warning        You must not use the pointer returned by this function
+ *                 after any further call to the SSL API, including
+ *                 mbedtls_ssl_read() and mbedtls_ssl_write(); this is
+ *                 because the pointer might change during renegotiation,
+ *                 which happens transparently to the user.
+ *                 If you want to use the certificate across API calls,
+ *                 you must make a copy.
  */
 const mbedtls_x509_crt *mbedtls_ssl_get_peer_cert( const mbedtls_ssl_context *ssl );
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
@@ -3065,7 +4047,14 @@ int mbedtls_ssl_renegotiate( mbedtls_ssl_context *ssl );
  *
  * \return         The (positive) number of bytes read if successful.
  * \return         \c 0 if the read end of the underlying transport was closed
- *                 - in this case you must stop using the context (see below).
+ *                 without sending a CloseNotify beforehand, which might happen
+ *                 because of various reasons (internal error of an underlying
+ *                 stack, non-conformant peer not sending a CloseNotify and
+ *                 such) - in this case you must stop using the context
+ *                 (see below).
+ * \return         #MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY if the underlying
+ *                 transport is still functional, but the peer has
+ *                 acknowledged to not send anything anymore.
  * \return         #MBEDTLS_ERR_SSL_WANT_READ or #MBEDTLS_ERR_SSL_WANT_WRITE
  *                 if the handshake is incomplete and waiting for data to
  *                 be available for reading from or writing to the underlying
@@ -3182,8 +4171,8 @@ int mbedtls_ssl_read( mbedtls_ssl_context *ssl, unsigned char *buf, size_t len )
  *                 or negotiated with the peer), then:
  *                 - with TLS, less bytes than requested are written.
  *                 - with DTLS, MBEDTLS_ERR_SSL_BAD_INPUT_DATA is returned.
- *                 \c mbedtls_ssl_get_max_frag_len() may be used to query the
- *                 active maximum fragment length.
+ *                 \c mbedtls_ssl_get_output_max_frag_len() may be used to
+ *                 query the active maximum fragment length.
  *
  * \note           Attempting to write 0 bytes will result in an empty TLS
  *                 application record being sent.
@@ -3231,6 +4220,130 @@ int mbedtls_ssl_close_notify( mbedtls_ssl_context *ssl );
  */
 void mbedtls_ssl_free( mbedtls_ssl_context *ssl );
 
+#if defined(MBEDTLS_SSL_CONTEXT_SERIALIZATION)
+/**
+ * \brief          Save an active connection as serialized data in a buffer.
+ *                 This allows the freeing or re-using of the SSL context
+ *                 while still picking up the connection later in a way that
+ *                 it entirely transparent to the peer.
+ *
+ * \see            mbedtls_ssl_context_load()
+ *
+ * \note           This feature is currently only available under certain
+ *                 conditions, see the documentation of the return value
+ *                 #MBEDTLS_ERR_SSL_BAD_INPUT_DATA for details.
+ *
+ * \note           When this function succeeds, it calls
+ *                 mbedtls_ssl_session_reset() on \p ssl which as a result is
+ *                 no longer associated with the connection that has been
+ *                 serialized. This avoids creating copies of the connection
+ *                 state. You're then free to either re-use the context
+ *                 structure for a different connection, or call
+ *                 mbedtls_ssl_free() on it. See the documentation of
+ *                 mbedtls_ssl_session_reset() for more details.
+ *
+ * \param ssl      The SSL context to save. On success, it is no longer
+ *                 associated with the connection that has been serialized.
+ * \param buf      The buffer to write the serialized data to. It must be a
+ *                 writeable buffer of at least \p buf_len bytes, or may be \c
+ *                 NULL if \p buf_len is \c 0.
+ * \param buf_len  The number of bytes available for writing in \p buf.
+ * \param olen     The size in bytes of the data that has been or would have
+ *                 been written. It must point to a valid \c size_t.
+ *
+ * \note           \p olen is updated to the correct value regardless of
+ *                 whether \p buf_len was large enough. This makes it possible
+ *                 to determine the necessary size by calling this function
+ *                 with \p buf set to \c NULL and \p buf_len to \c 0. However,
+ *                 the value of \p olen is only guaranteed to be correct when
+ *                 the function returns #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL or
+ *                 \c 0. If the return value is different, then the value of
+ *                 \p olen is undefined.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL if \p buf is too small.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed
+ *                 while reseting the context.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if a handshake is in
+ *                 progress, or there is pending data for reading or sending,
+ *                 or the connection does not use DTLS 1.2 with an AEAD
+ *                 ciphersuite, or renegotiation is enabled.
+ */
+int mbedtls_ssl_context_save( mbedtls_ssl_context *ssl,
+                              unsigned char *buf,
+                              size_t buf_len,
+                              size_t *olen );
+
+/**
+ * \brief          Load serialized connection data to an SSL context.
+ *
+ * \see            mbedtls_ssl_context_save()
+ *
+ * \warning        The same serialized data must never be loaded into more
+ *                 that one context. In order to ensure that, after
+ *                 successfully loading serialized data to an SSL context, you
+ *                 should immediately destroy or invalidate all copies of the
+ *                 serialized data that was loaded. Loading the same data in
+ *                 more than one context would cause severe security failures
+ *                 including but not limited to loss of confidentiality.
+ *
+ * \note           Before calling this function, the SSL context must be
+ *                 prepared in one of the two following ways. The first way is
+ *                 to take a context freshly initialised with
+ *                 mbedtls_ssl_init() and call mbedtls_ssl_setup() on it with
+ *                 the same ::mbedtls_ssl_config structure that was used in
+ *                 the original connection. The second way is to
+ *                 call mbedtls_ssl_session_reset() on a context that was
+ *                 previously prepared as above but used in the meantime.
+ *                 Either way, you must not use the context to perform a
+ *                 handshake between calling mbedtls_ssl_setup() or
+ *                 mbedtls_ssl_session_reset() and calling this function. You
+ *                 may however call other setter functions in that time frame
+ *                 as indicated in the note below.
+ *
+ * \note           Before or after calling this function successfully, you
+ *                 also need to configure some connection-specific callbacks
+ *                 and settings before you can use the connection again
+ *                 (unless they were already set before calling
+ *                 mbedtls_ssl_session_reset() and the values are suitable for
+ *                 the present connection). Specifically, you want to call
+ *                 at least mbedtls_ssl_set_bio() and
+ *                 mbedtls_ssl_set_timer_cb(). All other SSL setter functions
+ *                 are not necessary to call, either because they're only used
+ *                 in handshakes, or because the setting is already saved. You
+ *                 might choose to call them anyway, for example in order to
+ *                 share code between the cases of establishing a new
+ *                 connection and the case of loading an already-established
+ *                 connection.
+ *
+ * \note           If you have new information about the path MTU, you want to
+ *                 call mbedtls_ssl_set_mtu() after calling this function, as
+ *                 otherwise this function would overwrite your
+ *                 newly-configured value with the value that was active when
+ *                 the context was saved.
+ *
+ * \note           When this function returns an error code, it calls
+ *                 mbedtls_ssl_free() on \p ssl. In this case, you need to
+ *                 prepare the context with the usual sequence starting with a
+ *                 call to mbedtls_ssl_init() if you want to use it again.
+ *
+ * \param ssl      The SSL context structure to be populated. It must have
+ *                 been prepared as described in the note above.
+ * \param buf      The buffer holding the serialized connection data. It must
+ *                 be a readable buffer of at least \p len bytes.
+ * \param len      The size of the serialized data in bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed.
+ * \return         #MBEDTLS_ERR_SSL_VERSION_MISMATCH if the serialized data
+ *                 comes from a different Mbed TLS version or build.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if input data is invalid.
+ */
+int mbedtls_ssl_context_load( mbedtls_ssl_context *ssl,
+                              const unsigned char *buf,
+                              size_t len );
+#endif /* MBEDTLS_SSL_CONTEXT_SERIALIZATION */
+
 /**
  * \brief          Initialize an SSL configuration context
  *                 Just makes the context ready for
@@ -3286,6 +4399,27 @@ void mbedtls_ssl_session_init( mbedtls_ssl_session *session );
  */
 void mbedtls_ssl_session_free( mbedtls_ssl_session *session );
 
+/**
+ * \brief          TLS-PRF function for key derivation.
+ *
+ * \param prf      The tls_prf type function type to be used.
+ * \param secret   Secret for the key derivation function.
+ * \param slen     Length of the secret.
+ * \param label    String label for the key derivation function,
+ *                 terminated with null character.
+ * \param random   Random bytes.
+ * \param rlen     Length of the random bytes buffer.
+ * \param dstbuf   The buffer holding the derived key.
+ * \param dlen     Length of the output buffer.
+ *
+ * \return         0 on success. An SSL specific error on failure.
+ */
+int  mbedtls_ssl_tls_prf( const mbedtls_tls_prf_types prf,
+                          const unsigned char *secret, size_t slen,
+                          const char *label,
+                          const unsigned char *random, size_t rlen,
+                          unsigned char *dstbuf, size_t dlen );
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h
index 612d81776ef..c6ef2960f4d 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_CACHE_H
 #define MBEDTLS_SSL_CACHE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /**
@@ -95,7 +68,8 @@ struct mbedtls_ssl_cache_entry
     mbedtls_time_t timestamp;           /*!< entry timestamp    */
 #endif
     mbedtls_ssl_session session;        /*!< entry session      */
-#if defined(MBEDTLS_X509_CRT_PARSE_C)
+#if defined(MBEDTLS_X509_CRT_PARSE_C) && \
+    defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
     mbedtls_x509_buf peer_cert;         /*!< entry peer_cert    */
 #endif
     mbedtls_ssl_cache_entry *next;      /*!< chain pointer      */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h
index ab8e601db71..93c32a5edac 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,40 +18,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_CIPHERSUITES_H
 #define MBEDTLS_SSL_CIPHERSUITES_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "pk.h"
-#include "cipher.h"
-#include "md.h"
+#include "mbedtls/pk.h"
+#include "mbedtls/cipher.h"
+#include "mbedtls/md.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -337,7 +310,7 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED)      || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED
 #endif
 
 /* Key exchanges allowing client certificate requests */
@@ -347,28 +320,28 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     ||       \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)    ||       \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__CERT_REQ_ALLOWED__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_CERT_REQ_ALLOWED_ENABLED
 #endif
 
 /* Key exchanges involving server signature in ServerKeyExchange */
 #if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED
 #endif
 
 /* Key exchanges using ECDH */
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED)      || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED
 #endif
 
 /* Key exchanges that don't involve ephemeral keys */
 #if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED)           || \
     defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED)           || \
     defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
-    defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED
+    defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED
 #endif
 
 /* Key exchanges that involve ephemeral keys */
@@ -378,7 +351,7 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)     || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)   || \
     defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED
 #endif
 
 /* Key exchanges using a PSK */
@@ -386,20 +359,20 @@ typedef enum {
     defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED
 #endif
 
 /* Key exchanges using DHE */
 #if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)       || \
     defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED
 #endif
 
 /* Key exchanges using ECDHE */
 #if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)   || \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
-#define MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED
 #endif
 
 typedef struct mbedtls_ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t;
@@ -442,7 +415,7 @@ mbedtls_pk_type_t mbedtls_ssl_get_ciphersuite_sig_alg( const mbedtls_ssl_ciphers
 int mbedtls_ssl_ciphersuite_uses_ec( const mbedtls_ssl_ciphersuite_t *info );
 int mbedtls_ssl_ciphersuite_uses_psk( const mbedtls_ssl_ciphersuite_t *info );
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_has_pfs( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -459,9 +432,9 @@ static inline int mbedtls_ssl_ciphersuite_has_pfs( const mbedtls_ssl_ciphersuite
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_no_pfs( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -477,9 +450,9 @@ static inline int mbedtls_ssl_ciphersuite_no_pfs( const mbedtls_ssl_ciphersuite_
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_ecdh( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -492,7 +465,7 @@ static inline int mbedtls_ssl_ciphersuite_uses_ecdh( const mbedtls_ssl_ciphersui
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED */
 
 static inline int mbedtls_ssl_ciphersuite_cert_req_allowed( const mbedtls_ssl_ciphersuite_t *info )
 {
@@ -511,7 +484,25 @@ static inline int mbedtls_ssl_ciphersuite_cert_req_allowed( const mbedtls_ssl_ci
     }
 }
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_uses_srv_cert( const mbedtls_ssl_ciphersuite_t *info )
+{
+    switch( info->key_exchange )
+    {
+        case MBEDTLS_KEY_EXCHANGE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_RSA_PSK:
+        case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+            return( 1 );
+
+        default:
+            return( 0 );
+    }
+}
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_dhe( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -524,9 +515,9 @@ static inline int mbedtls_ssl_ciphersuite_uses_dhe( const mbedtls_ssl_ciphersuit
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED) */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED) */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_ecdhe( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -540,9 +531,9 @@ static inline int mbedtls_ssl_ciphersuite_uses_ecdhe( const mbedtls_ssl_ciphersu
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED) */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED) */
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED)
 static inline int mbedtls_ssl_ciphersuite_uses_server_signature( const mbedtls_ssl_ciphersuite_t *info )
 {
     switch( info->key_exchange )
@@ -556,7 +547,7 @@ static inline int mbedtls_ssl_ciphersuite_uses_server_signature( const mbedtls_s
             return( 0 );
     }
 }
-#endif /* MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED */
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED */
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h
index 9c2d5b62a43..0a238708e59 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,41 +18,20 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_COOKIE_H
 #define MBEDTLS_SSL_COOKIE_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
+#include "mbedtls/ssl.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 /**
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h
index 6ba6c2af09d..6913dc0f668 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,60 +18,48 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_INTERNAL_H
 #define MBEDTLS_SSL_INTERNAL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "ssl.h"
-#include "cipher.h"
+#include "mbedtls/ssl.h"
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif
 
 #if defined(MBEDTLS_MD5_C)
-#include "md5.h"
+#include "mbedtls/md5.h"
 #endif
 
 #if defined(MBEDTLS_SHA1_C)
-#include "sha1.h"
+#include "mbedtls/sha1.h"
 #endif
 
 #if defined(MBEDTLS_SHA256_C)
-#include "sha256.h"
+#include "mbedtls/sha256.h"
 #endif
 
 #if defined(MBEDTLS_SHA512_C)
-#include "sha512.h"
+#include "mbedtls/sha512.h"
 #endif
 
 #if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
-#include "ecjpake.h"
+#include "mbedtls/ecjpake.h"
 #endif
 
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#include "mbedtls/psa_util.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
 #if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
     !defined(inline) && !defined(__cplusplus)
 #define inline __inline
@@ -129,7 +111,7 @@
     defined(MBEDTLS_SSL_CLI_C) && \
     defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
     defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
-#define MBEDTLS_SSL__ECP_RESTARTABLE
+#define MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED
 #endif
 
 #define MBEDTLS_SSL_INITIAL_HANDSHAKE           0
@@ -150,6 +132,18 @@
 #define MBEDTLS_SSL_RETRANS_WAITING         2
 #define MBEDTLS_SSL_RETRANS_FINISHED        3
 
+/*
+ * Allow extra bytes for record, authentication and encryption overhead:
+ * counter (8) + header (5) + IV(16) + MAC (16-48) + padding (0-256)
+ * and allow for a maximum of 1024 of compression expansion if
+ * enabled.
+ */
+#if defined(MBEDTLS_ZLIB_SUPPORT)
+#define MBEDTLS_SSL_COMPRESSION_ADD          1024
+#else
+#define MBEDTLS_SSL_COMPRESSION_ADD             0
+#endif
+
 /* This macro determines whether CBC is supported. */
 #if defined(MBEDTLS_CIPHER_MODE_CBC) &&                               \
     ( defined(MBEDTLS_AES_C)      ||                                  \
@@ -168,19 +162,12 @@
 #define MBEDTLS_SSL_SOME_SUITES_USE_TLS_CBC
 #endif
 
-/*
- * Allow extra bytes for record, authentication and encryption overhead:
- * counter (8) + header (5) + IV(16) + MAC (16-48) + padding (0-256)
- * and allow for a maximum of 1024 of compression expansion if
- * enabled.
- */
-#if defined(MBEDTLS_ZLIB_SUPPORT)
-#define MBEDTLS_SSL_COMPRESSION_ADD          1024
-#else
-#define MBEDTLS_SSL_COMPRESSION_ADD             0
+#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_NULL_CIPHER) ||   \
+    defined(MBEDTLS_SSL_SOME_SUITES_USE_CBC)
+#define MBEDTLS_SSL_SOME_MODES_USE_MAC
 #endif
 
-#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_MODE_CBC)
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
 /* Ciphersuites using HMAC */
 #if defined(MBEDTLS_SHA512_C)
 #define MBEDTLS_SSL_MAC_ADD                 48  /* SHA-384 used for HMAC */
@@ -189,7 +176,7 @@
 #else
 #define MBEDTLS_SSL_MAC_ADD                 20  /* SHA-1   used for HMAC */
 #endif
-#else
+#else /* MBEDTLS_SSL_SOME_MODES_USE_MAC */
 /* AEAD ciphersuites: GCM and CCM use a 128 bits tag */
 #define MBEDTLS_SSL_MAC_ADD                 16
 #endif
@@ -200,10 +187,17 @@
 #define MBEDTLS_SSL_PADDING_ADD              0
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+#define MBEDTLS_SSL_MAX_CID_EXPANSION      MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#else
+#define MBEDTLS_SSL_MAX_CID_EXPANSION        0
+#endif
+
 #define MBEDTLS_SSL_PAYLOAD_OVERHEAD ( MBEDTLS_SSL_COMPRESSION_ADD +    \
                                        MBEDTLS_MAX_IV_LENGTH +          \
                                        MBEDTLS_SSL_MAC_ADD +            \
-                                       MBEDTLS_SSL_PADDING_ADD          \
+                                       MBEDTLS_SSL_PADDING_ADD +        \
+                                       MBEDTLS_SSL_MAX_CID_EXPANSION    \
                                        )
 
 #define MBEDTLS_SSL_IN_PAYLOAD_LEN ( MBEDTLS_SSL_PAYLOAD_OVERHEAD + \
@@ -262,11 +256,49 @@
    implicit sequence number. */
 #define MBEDTLS_SSL_HEADER_LEN 13
 
+#if !defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
 #define MBEDTLS_SSL_IN_BUFFER_LEN  \
     ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_IN_PAYLOAD_LEN ) )
+#else
+#define MBEDTLS_SSL_IN_BUFFER_LEN  \
+    ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_IN_PAYLOAD_LEN ) \
+      + ( MBEDTLS_SSL_CID_IN_LEN_MAX ) )
+#endif
 
+#if !defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
 #define MBEDTLS_SSL_OUT_BUFFER_LEN  \
     ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_OUT_PAYLOAD_LEN ) )
+#else
+#define MBEDTLS_SSL_OUT_BUFFER_LEN                               \
+    ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_OUT_PAYLOAD_LEN )    \
+      + ( MBEDTLS_SSL_CID_OUT_LEN_MAX ) )
+#endif
+
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+static inline size_t mbedtls_ssl_get_output_buflen( const mbedtls_ssl_context *ctx )
+{
+#if defined (MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    return mbedtls_ssl_get_output_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD
+               + MBEDTLS_SSL_CID_OUT_LEN_MAX;
+#else
+    return mbedtls_ssl_get_output_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD;
+#endif
+}
+
+static inline size_t mbedtls_ssl_get_input_buflen( const mbedtls_ssl_context *ctx )
+{
+#if defined (MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    return mbedtls_ssl_get_input_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD
+               + MBEDTLS_SSL_CID_IN_LEN_MAX;
+#else
+    return mbedtls_ssl_get_input_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD;
+#endif
+}
+#endif
 
 #ifdef MBEDTLS_ZLIB_SUPPORT
 /* Compression buffer holds both IN and OUT buffers, so should be size of the larger */
@@ -325,7 +357,7 @@ extern "C" {
 #endif
 
 #if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
-    defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 /*
  * Abstraction for a grid of allowed signature-hash-algorithm pairs.
  */
@@ -340,7 +372,54 @@ struct mbedtls_ssl_sig_hash_set_t
     mbedtls_md_type_t ecdsa;
 };
 #endif /* MBEDTLS_SSL_PROTO_TLS1_2 &&
-          MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+          MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
+
+typedef int  mbedtls_ssl_tls_prf_cb( const unsigned char *secret, size_t slen,
+                                     const char *label,
+                                     const unsigned char *random, size_t rlen,
+                                     unsigned char *dstbuf, size_t dlen );
+
+/* cipher.h exports the maximum IV, key and block length from
+ * all ciphers enabled in the config, regardless of whether those
+ * ciphers are actually usable in SSL/TLS. Notably, XTS is enabled
+ * in the default configuration and uses 64 Byte keys, but it is
+ * not used for record protection in SSL/TLS.
+ *
+ * In order to prevent unnecessary inflation of key structures,
+ * we introduce SSL-specific variants of the max-{key,block,IV}
+ * macros here which are meant to only take those ciphers into
+ * account which can be negotiated in SSL/TLS.
+ *
+ * Since the current definitions of MBEDTLS_MAX_{KEY|BLOCK|IV}_LENGTH
+ * in cipher.h are rough overapproximations of the real maxima, here
+ * we content ourselves with replicating those overapproximations
+ * for the maximum block and IV length, and excluding XTS from the
+ * computation of the maximum key length. */
+#define MBEDTLS_SSL_MAX_BLOCK_LENGTH 16
+#define MBEDTLS_SSL_MAX_IV_LENGTH    16
+#define MBEDTLS_SSL_MAX_KEY_LENGTH   32
+
+/**
+ * \brief   The data structure holding the cryptographic material (key and IV)
+ *          used for record protection in TLS 1.3.
+ */
+struct mbedtls_ssl_key_set
+{
+    /*! The key for client->server records. */
+    unsigned char client_write_key[ MBEDTLS_SSL_MAX_KEY_LENGTH ];
+    /*! The key for server->client records. */
+    unsigned char server_write_key[ MBEDTLS_SSL_MAX_KEY_LENGTH ];
+    /*! The IV  for client->server records. */
+    unsigned char client_write_iv[ MBEDTLS_SSL_MAX_IV_LENGTH ];
+    /*! The IV  for server->client records. */
+    unsigned char server_write_iv[ MBEDTLS_SSL_MAX_IV_LENGTH ];
+
+    size_t key_len; /*!< The length of client_write_key and
+                     *   server_write_key, in Bytes. */
+    size_t iv_len;  /*!< The length of client_write_iv and
+                     *   server_write_iv, in Bytes. */
+};
+typedef struct mbedtls_ssl_key_set mbedtls_ssl_key_set;
 
 /*
  * This structure contains the parameters only needed during handshake.
@@ -351,16 +430,80 @@ struct mbedtls_ssl_handshake_params
      * Handshake specific crypto variables
      */
 
-#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
-    defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+    uint8_t max_major_ver;              /*!< max. major version client*/
+    uint8_t max_minor_ver;              /*!< max. minor version client*/
+    uint8_t resume;                     /*!<  session resume indicator*/
+    uint8_t cli_exts;                   /*!< client extension presence*/
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C) &&        \
+    defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
+    uint8_t sni_authmode;               /*!< authmode from SNI callback     */
+#endif
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS)
+    uint8_t new_session_ticket;         /*!< use NewSessionTicket?    */
+#endif /* MBEDTLS_SSL_SESSION_TICKETS */
+
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+    uint8_t extended_ms;                /*!< use Extended Master Secret? */
+#endif
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+    uint8_t async_in_progress;          /*!< an asynchronous operation is in progress */
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    unsigned char retransmit_state;     /*!<  Retransmission state           */
+#endif
+
+#if defined(MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED)
+    uint8_t ecrs_enabled;               /*!< Handshake supports EC restart? */
+    enum { /* this complements ssl->state with info on intra-state operations */
+        ssl_ecrs_none = 0,              /*!< nothing going on (yet)         */
+        ssl_ecrs_crt_verify,            /*!< Certificate: crt_verify()      */
+        ssl_ecrs_ske_start_processing,  /*!< ServerKeyExchange: pk_verify() */
+        ssl_ecrs_cke_ecdh_calc_secret,  /*!< ClientKeyExchange: ECDH step 2 */
+        ssl_ecrs_crt_vrfy_sign,         /*!< CertificateVerify: pk_sign()   */
+    } ecrs_state;                       /*!< current (or last) operation    */
+    mbedtls_x509_crt *ecrs_peer_cert;   /*!< The peer's CRT chain.          */
+    size_t ecrs_n;                      /*!< place for saving a length      */
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2) &&                \
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
     mbedtls_ssl_sig_hash_set_t hash_algs;             /*!<  Set of suitable sig-hash pairs */
 #endif
+
+    size_t pmslen;                      /*!<  premaster length        */
+
+    mbedtls_ssl_ciphersuite_t const *ciphersuite_info;
+
+    void (*update_checksum)(mbedtls_ssl_context *, const unsigned char *, size_t);
+    void (*calc_verify)(const mbedtls_ssl_context *, unsigned char *, size_t *);
+    void (*calc_finished)(mbedtls_ssl_context *, unsigned char *, int);
+    mbedtls_ssl_tls_prf_cb *tls_prf;
+
 #if defined(MBEDTLS_DHM_C)
     mbedtls_dhm_context dhm_ctx;                /*!<  DHM key exchange        */
 #endif
-#if defined(MBEDTLS_ECDH_C)
+
+/* Adding guard for MBEDTLS_ECDSA_C to ensure no compile errors due
+ * to guards also being in ssl_srv.c and ssl_cli.c. There is a gap
+ * in functionality that access to ecdh_ctx structure is needed for
+ * MBEDTLS_ECDSA_C which does not seem correct.
+ */
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C)
     mbedtls_ecdh_context ecdh_ctx;              /*!<  ECDH key exchange       */
-#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_type_t ecdh_psa_type;
+    uint16_t ecdh_bits;
+    psa_key_id_t ecdh_psa_privkey;
+    unsigned char ecdh_psa_peerkey[MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH];
+    size_t ecdh_psa_peerkey_len;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C */
+
 #if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
     mbedtls_ecjpake_context ecjpake_ctx;        /*!< EC J-PAKE key exchange */
 #if defined(MBEDTLS_SSL_CLI_C)
@@ -368,56 +511,39 @@ struct mbedtls_ssl_handshake_params
     size_t ecjpake_cache_len;                   /*!< Length of cached data */
 #endif
 #endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */
-#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \
+
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) ||      \
     defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
     const mbedtls_ecp_curve_info **curves;      /*!<  Supported elliptic curves */
 #endif
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_id_t psk_opaque;            /*!< Opaque PSK from the callback   */
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
     unsigned char *psk;                 /*!<  PSK from the callback         */
     size_t psk_len;                     /*!<  Length of PSK from callback   */
-#endif
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
     mbedtls_ssl_key_cert *key_cert;     /*!< chosen key/cert pair (server)  */
 #if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
-    int sni_authmode;                   /*!< authmode from SNI callback     */
     mbedtls_ssl_key_cert *sni_key_cert; /*!< key/cert list from SNI         */
     mbedtls_x509_crt *sni_ca_chain;     /*!< trusted CAs from SNI callback  */
     mbedtls_x509_crl *sni_ca_crl;       /*!< trusted CAs CRLs from SNI      */
 #endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */
 #endif /* MBEDTLS_X509_CRT_PARSE_C */
-#if defined(MBEDTLS_SSL__ECP_RESTARTABLE)
-    int ecrs_enabled;                   /*!< Handshake supports EC restart? */
+
+#if defined(MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED)
     mbedtls_x509_crt_restart_ctx ecrs_ctx;  /*!< restart context            */
-    enum { /* this complements ssl->state with info on intra-state operations */
-        ssl_ecrs_none = 0,              /*!< nothing going on (yet)         */
-        ssl_ecrs_crt_verify,            /*!< Certificate: crt_verify()      */
-        ssl_ecrs_ske_start_processing,  /*!< ServerKeyExchange: pk_verify() */
-        ssl_ecrs_cke_ecdh_calc_secret,  /*!< ClientKeyExchange: ECDH step 2 */
-        ssl_ecrs_crt_vrfy_sign,         /*!< CertificateVerify: pk_sign()   */
-    } ecrs_state;                       /*!< current (or last) operation    */
-    size_t ecrs_n;                      /*!< place for saving a length      */
 #endif
-#if defined(MBEDTLS_SSL_PROTO_DTLS)
-    unsigned int out_msg_seq;           /*!<  Outgoing handshake sequence number */
-    unsigned int in_msg_seq;            /*!<  Incoming handshake sequence number */
-
-    unsigned char *verify_cookie;       /*!<  Cli: HelloVerifyRequest cookie
-                                              Srv: unused                    */
-    unsigned char verify_cookie_len;    /*!<  Cli: cookie length
-                                              Srv: flag for sending a cookie */
 
-    uint32_t retransmit_timeout;        /*!<  Current value of timeout       */
-    unsigned char retransmit_state;     /*!<  Retransmission state           */
-    mbedtls_ssl_flight_item *flight;    /*!<  Current outgoing flight        */
-    mbedtls_ssl_flight_item *cur_msg;   /*!<  Current message in flight      */
-    unsigned char *cur_msg_p;           /*!<  Position in current message    */
-    unsigned int in_flight_start_seq;   /*!<  Minimum message sequence in the
-                                              flight being received          */
-    mbedtls_ssl_transform *alt_transform_out;   /*!<  Alternative transform for
-                                              resending messages             */
-    unsigned char alt_out_ctr[8];       /*!<  Alternative record epoch/counter
-                                              for resending messages         */
+#if defined(MBEDTLS_X509_CRT_PARSE_C) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+    mbedtls_pk_context peer_pubkey;     /*!< The public key from the peer.  */
+#endif /* MBEDTLS_X509_CRT_PARSE_C && !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
 
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
     struct
     {
         size_t total_bytes_buffered; /*!< Cumulative size of heap allocated
@@ -444,6 +570,37 @@ struct mbedtls_ssl_handshake_params
 
     } buffering;
 
+    unsigned int out_msg_seq;           /*!<  Outgoing handshake sequence number */
+    unsigned int in_msg_seq;            /*!<  Incoming handshake sequence number */
+
+    unsigned char *verify_cookie;       /*!<  Cli: HelloVerifyRequest cookie
+                                              Srv: unused                    */
+    unsigned char verify_cookie_len;    /*!<  Cli: cookie length
+                                              Srv: flag for sending a cookie */
+
+    uint32_t retransmit_timeout;        /*!<  Current value of timeout       */
+    mbedtls_ssl_flight_item *flight;    /*!<  Current outgoing flight        */
+    mbedtls_ssl_flight_item *cur_msg;   /*!<  Current message in flight      */
+    unsigned char *cur_msg_p;           /*!<  Position in current message    */
+    unsigned int in_flight_start_seq;   /*!<  Minimum message sequence in the
+                                              flight being received          */
+    mbedtls_ssl_transform *alt_transform_out;   /*!<  Alternative transform for
+                                              resending messages             */
+    unsigned char alt_out_ctr[8];       /*!<  Alternative record epoch/counter
+                                              for resending messages         */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    /* The state of CID configuration in this handshake. */
+
+    uint8_t cid_in_use; /*!< This indicates whether the use of the CID extension
+                         *   has been negotiated. Possible values are
+                         *   #MBEDTLS_SSL_CID_ENABLED and
+                         *   #MBEDTLS_SSL_CID_DISABLED. */
+    unsigned char peer_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ]; /*! The peer's CID */
+    uint8_t peer_cid_len;                                  /*!< The length of
+                                                            *   \c peer_cid.  */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
     uint16_t mtu;                       /*!<  Handshake mtu, used to fragment outgoing messages */
 #endif /* MBEDTLS_SSL_PROTO_DTLS */
 
@@ -452,47 +609,30 @@ struct mbedtls_ssl_handshake_params
      */
 #if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \
     defined(MBEDTLS_SSL_PROTO_TLS1_1)
-       mbedtls_md5_context fin_md5;
-      mbedtls_sha1_context fin_sha1;
+    mbedtls_md5_context fin_md5;
+    mbedtls_sha1_context fin_sha1;
 #endif
 #if defined(MBEDTLS_SSL_PROTO_TLS1_2)
 #if defined(MBEDTLS_SHA256_C)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_hash_operation_t fin_sha256_psa;
+#else
     mbedtls_sha256_context fin_sha256;
 #endif
+#endif
 #if defined(MBEDTLS_SHA512_C)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_hash_operation_t fin_sha384_psa;
+#else
     mbedtls_sha512_context fin_sha512;
 #endif
+#endif
 #endif /* MBEDTLS_SSL_PROTO_TLS1_2 */
 
-    void (*update_checksum)(mbedtls_ssl_context *, const unsigned char *, size_t);
-    void (*calc_verify)(mbedtls_ssl_context *, unsigned char *);
-    void (*calc_finished)(mbedtls_ssl_context *, unsigned char *, int);
-    int  (*tls_prf)(const unsigned char *, size_t, const char *,
-                    const unsigned char *, size_t,
-                    unsigned char *, size_t);
-
-    size_t pmslen;                      /*!<  premaster length        */
-
     unsigned char randbytes[64];        /*!<  random bytes            */
     unsigned char premaster[MBEDTLS_PREMASTER_SIZE];
                                         /*!<  premaster secret        */
 
-    int resume;                         /*!<  session resume indicator*/
-    int max_major_ver;                  /*!< max. major version client*/
-    int max_minor_ver;                  /*!< max. minor version client*/
-    int cli_exts;                       /*!< client extension presence*/
-
-#if defined(MBEDTLS_SSL_SESSION_TICKETS)
-    int new_session_ticket;             /*!< use NewSessionTicket?    */
-#endif /* MBEDTLS_SSL_SESSION_TICKETS */
-#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
-    int extended_ms;                    /*!< use Extended Master Secret? */
-#endif
-
-#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
-    unsigned int async_in_progress : 1; /*!< an asynchronous operation is in progress */
-#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
-
 #if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
     /** Asynchronous operation context. This field is meant for use by the
      * asynchronous operation callbacks (mbedtls_ssl_config::f_async_sign_start,
@@ -506,25 +646,120 @@ struct mbedtls_ssl_handshake_params
 typedef struct mbedtls_ssl_hs_buffer mbedtls_ssl_hs_buffer;
 
 /*
- * This structure contains a full set of runtime transform parameters
- * either in negotiation or active.
+ * Representation of decryption/encryption transformations on records
+ *
+ * There are the following general types of record transformations:
+ * - Stream transformations (TLS versions <= 1.2 only)
+ *   Transformation adding a MAC and applying a stream-cipher
+ *   to the authenticated message.
+ * - CBC block cipher transformations ([D]TLS versions <= 1.2 only)
+ *   In addition to the distinction of the order of encryption and
+ *   authentication, there's a fundamental difference between the
+ *   handling in SSL3 & TLS 1.0 and TLS 1.1 and TLS 1.2: For SSL3
+ *   and TLS 1.0, the final IV after processing a record is used
+ *   as the IV for the next record. No explicit IV is contained
+ *   in an encrypted record. The IV for the first record is extracted
+ *   at key extraction time. In contrast, for TLS 1.1 and 1.2, no
+ *   IV is generated at key extraction time, but every encrypted
+ *   record is explicitly prefixed by the IV with which it was encrypted.
+ * - AEAD transformations ([D]TLS versions >= 1.2 only)
+ *   These come in two fundamentally different versions, the first one
+ *   used in TLS 1.2, excluding ChaChaPoly ciphersuites, and the second
+ *   one used for ChaChaPoly ciphersuites in TLS 1.2 as well as for TLS 1.3.
+ *   In the first transformation, the IV to be used for a record is obtained
+ *   as the concatenation of an explicit, static 4-byte IV and the 8-byte
+ *   record sequence number, and explicitly prepending this sequence number
+ *   to the encrypted record. In contrast, in the second transformation
+ *   the IV is obtained by XOR'ing a static IV obtained at key extraction
+ *   time with the 8-byte record sequence number, without prepending the
+ *   latter to the encrypted record.
+ *
+ * Additionally, DTLS 1.2 + CID as well as TLS 1.3 use an inner plaintext
+ * which allows to add flexible length padding and to hide a record's true
+ * content type.
+ *
+ * In addition to type and version, the following parameters are relevant:
+ * - The symmetric cipher algorithm to be used.
+ * - The (static) encryption/decryption keys for the cipher.
+ * - For stream/CBC, the type of message digest to be used.
+ * - For stream/CBC, (static) encryption/decryption keys for the digest.
+ * - For AEAD transformations, the size (potentially 0) of an explicit,
+ *   random initialization vector placed in encrypted records.
+ * - For some transformations (currently AEAD and CBC in SSL3 and TLS 1.0)
+ *   an implicit IV. It may be static (e.g. AEAD) or dynamic (e.g. CBC)
+ *   and (if present) is combined with the explicit IV in a transformation-
+ *   dependent way (e.g. appending in TLS 1.2 and XOR'ing in TLS 1.3).
+ * - For stream/CBC, a flag determining the order of encryption and MAC.
+ * - The details of the transformation depend on the SSL/TLS version.
+ * - The length of the authentication tag.
+ *
+ * Note: Except for CBC in SSL3 and TLS 1.0, these parameters are
+ *       constant across multiple encryption/decryption operations.
+ *       For CBC, the implicit IV needs to be updated after each
+ *       operation.
+ *
+ * The struct below refines this abstract view as follows:
+ * - The cipher underlying the transformation is managed in
+ *   cipher contexts cipher_ctx_{enc/dec}, which must have the
+ *   same cipher type. The mode of these cipher contexts determines
+ *   the type of the transformation in the sense above: e.g., if
+ *   the type is MBEDTLS_CIPHER_AES_256_CBC resp. MBEDTLS_CIPHER_AES_192_GCM
+ *   then the transformation has type CBC resp. AEAD.
+ * - The cipher keys are never stored explicitly but
+ *   are maintained within cipher_ctx_{enc/dec}.
+ * - For stream/CBC transformations, the message digest contexts
+ *   used for the MAC's are stored in md_ctx_{enc/dec}. These contexts
+ *   are unused for AEAD transformations.
+ * - For stream/CBC transformations and versions > SSL3, the
+ *   MAC keys are not stored explicitly but maintained within
+ *   md_ctx_{enc/dec}.
+ * - For stream/CBC transformations and version SSL3, the MAC
+ *   keys are stored explicitly in mac_enc, mac_dec and have
+ *   a fixed size of 20 bytes. These fields are unused for
+ *   AEAD transformations or transformations >= TLS 1.0.
+ * - For transformations using an implicit IV maintained within
+ *   the transformation context, its contents are stored within
+ *   iv_{enc/dec}.
+ * - The value of ivlen indicates the length of the IV.
+ *   This is redundant in case of stream/CBC transformations
+ *   which always use 0 resp. the cipher's block length as the
+ *   IV length, but is needed for AEAD ciphers and may be
+ *   different from the underlying cipher's block length
+ *   in this case.
+ * - The field fixed_ivlen is nonzero for AEAD transformations only
+ *   and indicates the length of the static part of the IV which is
+ *   constant throughout the communication, and which is stored in
+ *   the first fixed_ivlen bytes of the iv_{enc/dec} arrays.
+ *   Note: For CBC in SSL3 and TLS 1.0, the fields iv_{enc/dec}
+ *   still store IV's for continued use across multiple transformations,
+ *   so it is not true that fixed_ivlen == 0 means that iv_{enc/dec} are
+ *   not being used!
+ * - minor_ver denotes the SSL/TLS version
+ * - For stream/CBC transformations, maclen denotes the length of the
+ *   authentication tag, while taglen is unused and 0.
+ * - For AEAD transformations, taglen denotes the length of the
+ *   authentication tag, while maclen is unused and 0.
+ * - For CBC transformations, encrypt_then_mac determines the
+ *   order of encryption and authentication. This field is unused
+ *   in other transformations.
+ *
  */
 struct mbedtls_ssl_transform
 {
     /*
      * Session specific crypto layer
      */
-    const mbedtls_ssl_ciphersuite_t *ciphersuite_info;
-                                        /*!<  Chosen cipersuite_info  */
-    unsigned int keylen;                /*!<  symmetric key length (bytes)  */
     size_t minlen;                      /*!<  min. ciphertext length  */
     size_t ivlen;                       /*!<  IV length               */
     size_t fixed_ivlen;                 /*!<  Fixed part of IV (AEAD) */
-    size_t maclen;                      /*!<  MAC length              */
+    size_t maclen;                      /*!<  MAC(CBC) len            */
+    size_t taglen;                      /*!<  TAG(AEAD) len           */
 
     unsigned char iv_enc[16];           /*!<  IV (encryption)         */
     unsigned char iv_dec[16];           /*!<  IV (decryption)         */
 
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
+
 #if defined(MBEDTLS_SSL_PROTO_SSL3)
     /* Needed only for SSL v3.0 secret */
     unsigned char mac_enc[20];          /*!<  SSL v3.0 secret (enc)   */
@@ -534,8 +769,22 @@ struct mbedtls_ssl_transform
     mbedtls_md_context_t md_ctx_enc;            /*!<  MAC (encryption)        */
     mbedtls_md_context_t md_ctx_dec;            /*!<  MAC (decryption)        */
 
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+    int encrypt_then_mac;       /*!< flag for EtM activation                */
+#endif
+
+#endif /* MBEDTLS_SSL_SOME_MODES_USE_MAC */
+
     mbedtls_cipher_context_t cipher_ctx_enc;    /*!<  encryption context      */
     mbedtls_cipher_context_t cipher_ctx_dec;    /*!<  decryption context      */
+    int minor_ver;
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t in_cid_len;
+    uint8_t out_cid_len;
+    unsigned char in_cid [ MBEDTLS_SSL_CID_OUT_LEN_MAX ];
+    unsigned char out_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ];
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
 
     /*
      * Session specific compression layer
@@ -544,8 +793,83 @@ struct mbedtls_ssl_transform
     z_stream ctx_deflate;               /*!<  compression context     */
     z_stream ctx_inflate;               /*!<  decompression context   */
 #endif
+
+#if defined(MBEDTLS_SSL_CONTEXT_SERIALIZATION)
+    /* We need the Hello random bytes in order to re-derive keys from the
+     * Master Secret and other session info, see ssl_populate_transform() */
+    unsigned char randbytes[64]; /*!< ServerHello.random+ClientHello.random */
+#endif /* MBEDTLS_SSL_CONTEXT_SERIALIZATION */
 };
 
+/*
+ * Return 1 if the transform uses an AEAD cipher, 0 otherwise.
+ * Equivalently, return 0 if a separate MAC is used, 1 otherwise.
+ */
+static inline int mbedtls_ssl_transform_uses_aead(
+        const mbedtls_ssl_transform *transform )
+{
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
+    return( transform->maclen == 0 && transform->taglen != 0 );
+#else
+    (void) transform;
+    return( 1 );
+#endif
+}
+
+/*
+ * Internal representation of record frames
+ *
+ * Instances come in two flavors:
+ * (1) Encrypted
+ *     These always have data_offset = 0
+ * (2) Unencrypted
+ *     These have data_offset set to the amount of
+ *     pre-expansion during record protection. Concretely,
+ *     this is the length of the fixed part of the explicit IV
+ *     used for encryption, or 0 if no explicit IV is used
+ *     (e.g. for CBC in TLS 1.0, or stream ciphers).
+ *
+ * The reason for the data_offset in the unencrypted case
+ * is to allow for in-place conversion of an unencrypted to
+ * an encrypted record. If the offset wasn't included, the
+ * encrypted content would need to be shifted afterwards to
+ * make space for the fixed IV.
+ *
+ */
+#if MBEDTLS_SSL_CID_OUT_LEN_MAX > MBEDTLS_SSL_CID_IN_LEN_MAX
+#define MBEDTLS_SSL_CID_LEN_MAX MBEDTLS_SSL_CID_OUT_LEN_MAX
+#else
+#define MBEDTLS_SSL_CID_LEN_MAX MBEDTLS_SSL_CID_IN_LEN_MAX
+#endif
+
+typedef struct
+{
+    uint8_t ctr[8];         /* In TLS:  The implicit record sequence number.
+                             * In DTLS: The 2-byte epoch followed by
+                             *          the 6-byte sequence number.
+                             * This is stored as a raw big endian byte array
+                             * as opposed to a uint64_t because we rarely
+                             * need to perform arithmetic on this, but do
+                             * need it as a Byte array for the purpose of
+                             * MAC computations.                             */
+    uint8_t type;           /* The record content type.                      */
+    uint8_t ver[2];         /* SSL/TLS version as present on the wire.
+                             * Convert to internal presentation of versions
+                             * using mbedtls_ssl_read_version() and
+                             * mbedtls_ssl_write_version().
+                             * Keep wire-format for MAC computations.        */
+
+    unsigned char *buf;     /* Memory buffer enclosing the record content    */
+    size_t buf_len;         /* Buffer length                                 */
+    size_t data_offset;     /* Offset of record content                      */
+    size_t data_len;        /* Length of record content                      */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t cid_len;        /* Length of the CID (0 if not present)          */
+    unsigned char cid[ MBEDTLS_SSL_CID_LEN_MAX ]; /* The CID                 */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+} mbedtls_record;
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 /*
  * List of certificate + private key pairs
@@ -572,7 +896,7 @@ struct mbedtls_ssl_flight_item
 #endif /* MBEDTLS_SSL_PROTO_DTLS */
 
 #if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
-    defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 
 /* Find an entry in a signature-hash set matching a given hash algorithm. */
 mbedtls_md_type_t mbedtls_ssl_sig_hash_set_find( mbedtls_ssl_sig_hash_set_t *set,
@@ -592,7 +916,7 @@ static inline void mbedtls_ssl_sig_hash_set_init( mbedtls_ssl_sig_hash_set_t *se
 }
 
 #endif /* MBEDTLS_SSL_PROTO_TLS1_2) &&
-          MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+          MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
 
 /**
  * \brief           Free referenced items in an SSL transform context and clear
@@ -719,9 +1043,62 @@ int mbedtls_ssl_write_finished( mbedtls_ssl_context *ssl );
 void mbedtls_ssl_optimize_checksum( mbedtls_ssl_context *ssl,
                             const mbedtls_ssl_ciphersuite_t *ciphersuite_info );
 
-#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
 int mbedtls_ssl_psk_derive_premaster( mbedtls_ssl_context *ssl, mbedtls_key_exchange_type_t key_ex );
-#endif
+
+/**
+ * Get the first defined PSK by order of precedence:
+ * 1. handshake PSK set by \c mbedtls_ssl_set_hs_psk() in the PSK callback
+ * 2. static PSK configured by \c mbedtls_ssl_conf_psk()
+ * Return a code and update the pair (PSK, PSK length) passed to this function
+ */
+static inline int mbedtls_ssl_get_psk( const mbedtls_ssl_context *ssl,
+    const unsigned char **psk, size_t *psk_len )
+{
+    if( ssl->handshake->psk != NULL && ssl->handshake->psk_len > 0 )
+    {
+        *psk = ssl->handshake->psk;
+        *psk_len = ssl->handshake->psk_len;
+    }
+
+    else if( ssl->conf->psk != NULL && ssl->conf->psk_len > 0 )
+    {
+        *psk = ssl->conf->psk;
+        *psk_len = ssl->conf->psk_len;
+    }
+
+    else
+    {
+        *psk = NULL;
+        *psk_len = 0;
+        return( MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED );
+    }
+
+    return( 0 );
+}
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * Get the first defined opaque PSK by order of precedence:
+ * 1. handshake PSK set by \c mbedtls_ssl_set_hs_psk_opaque() in the PSK
+ *    callback
+ * 2. static PSK configured by \c mbedtls_ssl_conf_psk_opaque()
+ * Return an opaque PSK
+ */
+static inline psa_key_id_t mbedtls_ssl_get_opaque_psk(
+    const mbedtls_ssl_context *ssl )
+{
+    if( ! mbedtls_svc_key_id_is_null( ssl->handshake->psk_opaque ) )
+        return( ssl->handshake->psk_opaque );
+
+    if( ! mbedtls_svc_key_id_is_null( ssl->conf->psk_opaque ) )
+        return( ssl->conf->psk_opaque );
+
+    return( MBEDTLS_SVC_KEY_ID_INIT );
+}
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
 
 #if defined(MBEDTLS_PK_C)
 unsigned char mbedtls_ssl_sig_from_pk( mbedtls_pk_context *pk );
@@ -737,11 +1114,28 @@ int mbedtls_ssl_set_calc_verify_md( mbedtls_ssl_context *ssl, int md );
 int mbedtls_ssl_check_curve( const mbedtls_ssl_context *ssl, mbedtls_ecp_group_id grp_id );
 #endif
 
-#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
 int mbedtls_ssl_check_sig_hash( const mbedtls_ssl_context *ssl,
                                 mbedtls_md_type_t md );
 #endif
 
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+static inline mbedtls_ssl_srtp_profile mbedtls_ssl_check_srtp_profile_value
+                                                    ( const uint16_t srtp_profile_value )
+{
+    switch( srtp_profile_value )
+    {
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80:
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32:
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80:
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32:
+            return srtp_profile_value;
+        default: break;
+    }
+    return( MBEDTLS_TLS_SRTP_UNSET );
+}
+#endif
+
 #if defined(MBEDTLS_X509_CRT_PARSE_C)
 static inline mbedtls_pk_context *mbedtls_ssl_own_key( mbedtls_ssl_context *ssl )
 {
@@ -787,15 +1181,27 @@ void mbedtls_ssl_write_version( int major, int minor, int transport,
 void mbedtls_ssl_read_version( int *major, int *minor, int transport,
                        const unsigned char ver[2] );
 
-static inline size_t mbedtls_ssl_hdr_len( const mbedtls_ssl_context *ssl )
+static inline size_t mbedtls_ssl_in_hdr_len( const mbedtls_ssl_context *ssl )
 {
+#if !defined(MBEDTLS_SSL_PROTO_DTLS)
+    ((void) ssl);
+#endif
+
 #if defined(MBEDTLS_SSL_PROTO_DTLS)
     if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM )
+    {
         return( 13 );
-#else
-    ((void) ssl);
-#endif
-    return( 5 );
+    }
+    else
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+    {
+        return( 5 );
+    }
+}
+
+static inline size_t mbedtls_ssl_out_hdr_len( const mbedtls_ssl_context *ssl )
+{
+    return( (size_t) ( ssl->out_iv - ssl->out_hdr ) );
 }
 
 static inline size_t mbedtls_ssl_hs_hdr_len( const mbedtls_ssl_context *ssl )
@@ -818,29 +1224,12 @@ int mbedtls_ssl_flight_transmit( mbedtls_ssl_context *ssl );
 
 /* Visible for testing purposes only */
 #if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
-int mbedtls_ssl_dtls_replay_check( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_dtls_replay_check( mbedtls_ssl_context const *ssl );
 void mbedtls_ssl_dtls_replay_update( mbedtls_ssl_context *ssl );
 #endif
 
-/* constant-time buffer comparison */
-static inline int mbedtls_ssl_safer_memcmp( const void *a, const void *b, size_t n )
-{
-    size_t i;
-    volatile const unsigned char *A = (volatile const unsigned char *) a;
-    volatile const unsigned char *B = (volatile const unsigned char *) b;
-    volatile unsigned char diff = 0;
-
-    for( i = 0; i < n; i++ )
-    {
-        /* Read volatile data in order before computing diff.
-         * This avoids IAR compiler warning:
-         * 'the order of volatile accesses is undefined ..' */
-        unsigned char x = A[i], y = B[i];
-        diff |= x ^ y;
-    }
-
-    return( diff );
-}
+int mbedtls_ssl_session_copy( mbedtls_ssl_session *dst,
+                              const mbedtls_ssl_session *src );
 
 #if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \
     defined(MBEDTLS_SSL_PROTO_TLS1_1)
@@ -852,6 +1241,7 @@ int mbedtls_ssl_get_key_exchange_md_ssl_tls( mbedtls_ssl_context *ssl,
 
 #if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \
     defined(MBEDTLS_SSL_PROTO_TLS1_2)
+/* The hash buffer must have at least MBEDTLS_MD_MAX_SIZE bytes of length. */
 int mbedtls_ssl_get_key_exchange_md_tls1_2( mbedtls_ssl_context *ssl,
                                             unsigned char *hash, size_t *hashlen,
                                             unsigned char *data, size_t data_len,
@@ -859,75 +1249,60 @@ int mbedtls_ssl_get_key_exchange_md_tls1_2( mbedtls_ssl_context *ssl,
 #endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 || \
           MBEDTLS_SSL_PROTO_TLS1_2 */
 
-#if defined(MBEDTLS_SSL_SOME_SUITES_USE_TLS_CBC)
-/** \brief Compute the HMAC of variable-length data with constant flow.
- *
- * This function computes the HMAC of the concatenation of \p add_data and \p
- * data, and does with a code flow and memory access pattern that does not
- * depend on \p data_len_secret, but only on \p min_data_len and \p
- * max_data_len. In particular, this function always reads exactly \p
- * max_data_len bytes from \p data.
- *
- * \param ctx               The HMAC context. It must have keys configured
- *                          with mbedtls_md_hmac_starts() and use one of the
- *                          following hashes: SHA-384, SHA-256, SHA-1 or MD-5.
- *                          It is reset using mbedtls_md_hmac_reset() after
- *                          the computation is complete to prepare for the
- *                          next computation.
- * \param add_data          The additional data prepended to \p data. This
- *                          must point to a readable buffer of \p add_data_len
- *                          bytes.
- * \param add_data_len      The length of \p add_data in bytes.
- * \param data              The data appended to \p add_data. This must point
- *                          to a readable buffer of \p max_data_len bytes.
- * \param data_len_secret   The length of the data to process in \p data.
- *                          This must be no less than \p min_data_len and no
- *                          greater than \p max_data_len.
- * \param min_data_len      The minimal length of \p data in bytes.
- * \param max_data_len      The maximal length of \p data in bytes.
- * \param output            The HMAC will be written here. This must point to
- *                          a writable buffer of sufficient size to hold the
- *                          HMAC value.
- *
- * \retval 0
- *         Success.
- * \retval MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED
- *         The hardware accelerator failed.
- */
-int mbedtls_ssl_cf_hmac(
-        mbedtls_md_context_t *ctx,
-        const unsigned char *add_data, size_t add_data_len,
-        const unsigned char *data, size_t data_len_secret,
-        size_t min_data_len, size_t max_data_len,
-        unsigned char *output );
-
-/** \brief Copy data from a secret position with constant flow.
- *
- * This function copies \p len bytes from \p src_base + \p offset_secret to \p
- * dst, with a code flow and memory access pattern that does not depend on \p
- * offset_secret, but only on \p offset_min, \p offset_max and \p len.
- *
- * \param dst           The destination buffer. This must point to a writable
- *                      buffer of at least \p len bytes.
- * \param src_base      The base of the source buffer. This must point to a
- *                      readable buffer of at least \p offset_max + \p len
- *                      bytes.
- * \param offset_secret The offset in the source buffer from which to copy.
- *                      This must be no less than \p offset_min and no greater
- *                      than \p offset_max.
- * \param offset_min    The minimal value of \p offset_secret.
- * \param offset_max    The maximal value of \p offset_secret.
- * \param len           The number of bytes to copy.
- */
-void mbedtls_ssl_cf_memcpy_offset( unsigned char *dst,
-                                   const unsigned char *src_base,
-                                   size_t offset_secret,
-                                   size_t offset_min, size_t offset_max,
-                                   size_t len );
-#endif /* MBEDTLS_SSL_SOME_SUITES_USE_TLS_CBC */
-
 #ifdef __cplusplus
 }
 #endif
 
+void mbedtls_ssl_transform_init( mbedtls_ssl_transform *transform );
+int mbedtls_ssl_encrypt_buf( mbedtls_ssl_context *ssl,
+                             mbedtls_ssl_transform *transform,
+                             mbedtls_record *rec,
+                             int (*f_rng)(void *, unsigned char *, size_t),
+                             void *p_rng );
+int mbedtls_ssl_decrypt_buf( mbedtls_ssl_context const *ssl,
+                             mbedtls_ssl_transform *transform,
+                             mbedtls_record *rec );
+
+/* Length of the "epoch" field in the record header */
+static inline size_t mbedtls_ssl_ep_len( const mbedtls_ssl_context *ssl )
+{
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM )
+        return( 2 );
+#else
+    ((void) ssl);
+#endif
+    return( 0 );
+}
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+int mbedtls_ssl_resend_hello_request( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+void mbedtls_ssl_set_timer( mbedtls_ssl_context *ssl, uint32_t millisecs );
+int mbedtls_ssl_check_timer( mbedtls_ssl_context *ssl );
+
+void mbedtls_ssl_reset_in_out_pointers( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_update_out_pointers( mbedtls_ssl_context *ssl,
+                              mbedtls_ssl_transform *transform );
+void mbedtls_ssl_update_in_pointers( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_session_reset_int( mbedtls_ssl_context *ssl, int partial );
+
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+void mbedtls_ssl_dtls_replay_reset( mbedtls_ssl_context *ssl );
+#endif
+
+void mbedtls_ssl_handshake_wrapup_free_hs_transform( mbedtls_ssl_context *ssl );
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+int mbedtls_ssl_start_renegotiation( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+size_t mbedtls_ssl_get_current_mtu( const mbedtls_ssl_context *ssl );
+void mbedtls_ssl_buffering_free( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_flight_free( mbedtls_ssl_flight_item *flight );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
 #endif /* ssl_internal.h */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
index a83f5e66623..a882eed23b9 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_SSL_TICKET_H
 #define MBEDTLS_SSL_TICKET_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -61,11 +34,11 @@
  * secrecy, when MBEDTLS_HAVE_TIME is defined.
  */
 
-#include "ssl.h"
-#include "cipher.h"
+#include "mbedtls/ssl.h"
+#include "mbedtls/cipher.h"
 
 #if defined(MBEDTLS_THREADING_C)
-#include "threading.h"
+#include "mbedtls/threading.h"
 #endif
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/threading.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/threading.h
index 45161ce467c..d147c73f066 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/threading.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/threading.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_THREADING_H
 #define MBEDTLS_THREADING_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -63,10 +36,13 @@ extern "C" {
 
 /* MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE is deprecated and should not be
  * used. */
-#define MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE         -0x001A  /**< The selected feature is not available. */
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE         -0x001A
 
-#define MBEDTLS_ERR_THREADING_BAD_INPUT_DATA              -0x001C  /**< Bad input parameters to function. */
-#define MBEDTLS_ERR_THREADING_MUTEX_ERROR                 -0x001E  /**< Locking / unlocking / free failed with error code. */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_THREADING_BAD_INPUT_DATA              -0x001C
+/** Locking / unlocking / free failed with error code. */
+#define MBEDTLS_ERR_THREADING_MUTEX_ERROR                 -0x001E
 
 #if defined(MBEDTLS_THREADING_PTHREAD)
 #include <pthread.h>
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/timing.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/timing.h
index 8611ba9a4e5..b7290cfcabc 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/timing.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/timing.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_TIMING_H
 #define MBEDTLS_TIMING_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/version.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/version.h
index 49cbeb003a8..b1a92b2bcf3 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/version.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/version.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,27 +18,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 /*
  * This set of compile-time defines and run-time variables can be used to
@@ -54,7 +27,7 @@
 #define MBEDTLS_VERSION_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -64,17 +37,17 @@
  * Major, Minor, Patchlevel
  */
 #define MBEDTLS_VERSION_MAJOR  2
-#define MBEDTLS_VERSION_MINOR  16
-#define MBEDTLS_VERSION_PATCH  11
+#define MBEDTLS_VERSION_MINOR  28
+#define MBEDTLS_VERSION_PATCH  0
 
 /**
  * The single version number has the following structure:
  *    MMNNPP00
  *    Major version | Minor version | Patch version
  */
-#define MBEDTLS_VERSION_NUMBER         0x02100B00
-#define MBEDTLS_VERSION_STRING         "2.16.11"
-#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.16.11"
+#define MBEDTLS_VERSION_NUMBER         0x021C0000
+#define MBEDTLS_VERSION_STRING         "2.28.0"
+#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.28.0"
 
 #if defined(MBEDTLS_VERSION_C)
 
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509.h
index 5bb9b00292f..c1775014300 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,42 +18,21 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_H
 #define MBEDTLS_X509_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "asn1.h"
-#include "pk.h"
+#include "mbedtls/asn1.h"
+#include "mbedtls/pk.h"
 
 #if defined(MBEDTLS_RSA_C)
-#include "rsa.h"
+#include "mbedtls/rsa.h"
 #endif
 
 /**
@@ -83,26 +56,46 @@
  * \name X509 Error codes
  * \{
  */
-#define MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE              -0x2080  /**< Unavailable feature, e.g. RSA hashing/encryption combination. */
-#define MBEDTLS_ERR_X509_UNKNOWN_OID                      -0x2100  /**< Requested OID is unknown. */
-#define MBEDTLS_ERR_X509_INVALID_FORMAT                   -0x2180  /**< The CRT/CRL/CSR format is invalid, e.g. different type expected. */
-#define MBEDTLS_ERR_X509_INVALID_VERSION                  -0x2200  /**< The CRT/CRL/CSR version element is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_SERIAL                   -0x2280  /**< The serial tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_ALG                      -0x2300  /**< The algorithm tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_NAME                     -0x2380  /**< The name tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_DATE                     -0x2400  /**< The date tag or value is invalid. */
-#define MBEDTLS_ERR_X509_INVALID_SIGNATURE                -0x2480  /**< The signature tag or value invalid. */
-#define MBEDTLS_ERR_X509_INVALID_EXTENSIONS               -0x2500  /**< The extension tag or value is invalid. */
-#define MBEDTLS_ERR_X509_UNKNOWN_VERSION                  -0x2580  /**< CRT/CRL/CSR has an unsupported version number. */
-#define MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG                  -0x2600  /**< Signature algorithm (oid) is unsupported. */
-#define MBEDTLS_ERR_X509_SIG_MISMATCH                     -0x2680  /**< Signature algorithms do not match. (see \c ::mbedtls_x509_crt sig_oid) */
-#define MBEDTLS_ERR_X509_CERT_VERIFY_FAILED               -0x2700  /**< Certificate verification failed, e.g. CRL, CA or signature check failed. */
-#define MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT              -0x2780  /**< Format not recognized as DER or PEM. */
-#define MBEDTLS_ERR_X509_BAD_INPUT_DATA                   -0x2800  /**< Input invalid. */
-#define MBEDTLS_ERR_X509_ALLOC_FAILED                     -0x2880  /**< Allocation of memory failed. */
-#define MBEDTLS_ERR_X509_FILE_IO_ERROR                    -0x2900  /**< Read/write of file failed. */
-#define MBEDTLS_ERR_X509_BUFFER_TOO_SMALL                 -0x2980  /**< Destination buffer is too small. */
-#define MBEDTLS_ERR_X509_FATAL_ERROR                      -0x3000  /**< A fatal error occurred, eg the chain is too long or the vrfy callback failed. */
+/** Unavailable feature, e.g. RSA hashing/encryption combination. */
+#define MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE              -0x2080
+/** Requested OID is unknown. */
+#define MBEDTLS_ERR_X509_UNKNOWN_OID                      -0x2100
+/** The CRT/CRL/CSR format is invalid, e.g. different type expected. */
+#define MBEDTLS_ERR_X509_INVALID_FORMAT                   -0x2180
+/** The CRT/CRL/CSR version element is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_VERSION                  -0x2200
+/** The serial tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_SERIAL                   -0x2280
+/** The algorithm tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_ALG                      -0x2300
+/** The name tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_NAME                     -0x2380
+/** The date tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_DATE                     -0x2400
+/** The signature tag or value invalid. */
+#define MBEDTLS_ERR_X509_INVALID_SIGNATURE                -0x2480
+/** The extension tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_EXTENSIONS               -0x2500
+/** CRT/CRL/CSR has an unsupported version number. */
+#define MBEDTLS_ERR_X509_UNKNOWN_VERSION                  -0x2580
+/** Signature algorithm (oid) is unsupported. */
+#define MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG                  -0x2600
+/** Signature algorithms do not match. (see \c ::mbedtls_x509_crt sig_oid) */
+#define MBEDTLS_ERR_X509_SIG_MISMATCH                     -0x2680
+/** Certificate verification failed, e.g. CRL, CA or signature check failed. */
+#define MBEDTLS_ERR_X509_CERT_VERIFY_FAILED               -0x2700
+/** Format not recognized as DER or PEM. */
+#define MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT              -0x2780
+/** Input invalid. */
+#define MBEDTLS_ERR_X509_BAD_INPUT_DATA                   -0x2800
+/** Allocation of memory failed. */
+#define MBEDTLS_ERR_X509_ALLOC_FAILED                     -0x2880
+/** Read/write of file failed. */
+#define MBEDTLS_ERR_X509_FILE_IO_ERROR                    -0x2900
+/** Destination buffer is too small. */
+#define MBEDTLS_ERR_X509_BUFFER_TOO_SMALL                 -0x2980
+/** A fatal error occurred, eg the chain is too long or the vrfy callback failed. */
+#define MBEDTLS_ERR_X509_FATAL_ERROR                      -0x3000
 /* \} name */
 
 /**
@@ -134,6 +127,28 @@
 /* \} name */
 /* \} addtogroup x509_module */
 
+/*
+ * X.509 v3 Subject Alternative Name types.
+ *      otherName                       [0]     OtherName,
+ *      rfc822Name                      [1]     IA5String,
+ *      dNSName                         [2]     IA5String,
+ *      x400Address                     [3]     ORAddress,
+ *      directoryName                   [4]     Name,
+ *      ediPartyName                    [5]     EDIPartyName,
+ *      uniformResourceIdentifier       [6]     IA5String,
+ *      iPAddress                       [7]     OCTET STRING,
+ *      registeredID                    [8]     OBJECT IDENTIFIER
+ */
+#define MBEDTLS_X509_SAN_OTHER_NAME                      0
+#define MBEDTLS_X509_SAN_RFC822_NAME                     1
+#define MBEDTLS_X509_SAN_DNS_NAME                        2
+#define MBEDTLS_X509_SAN_X400_ADDRESS_NAME               3
+#define MBEDTLS_X509_SAN_DIRECTORY_NAME                  4
+#define MBEDTLS_X509_SAN_EDI_PARTY_NAME                  5
+#define MBEDTLS_X509_SAN_UNIFORM_RESOURCE_IDENTIFIER     6
+#define MBEDTLS_X509_SAN_IP_ADDRESS                      7
+#define MBEDTLS_X509_SAN_REGISTERED_ID                   8
+
 /*
  * X.509 v3 Key Usage Extension flags
  * Reminder: update x509_info_key_usage() when adding new flags.
@@ -167,24 +182,26 @@
  *
  * Comments refer to the status for using certificates. Status can be
  * different for writing certificates or reading CRLs or CSRs.
+ *
+ * Those are defined in oid.h as oid.c needs them in a data structure. Since
+ * these were previously defined here, let's have aliases for compatibility.
  */
-#define MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER    (1 << 0)
-#define MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER      (1 << 1)
-#define MBEDTLS_X509_EXT_KEY_USAGE                   (1 << 2)
-#define MBEDTLS_X509_EXT_CERTIFICATE_POLICIES        (1 << 3)
-#define MBEDTLS_X509_EXT_POLICY_MAPPINGS             (1 << 4)
-#define MBEDTLS_X509_EXT_SUBJECT_ALT_NAME            (1 << 5)    /* Supported (DNS) */
-#define MBEDTLS_X509_EXT_ISSUER_ALT_NAME             (1 << 6)
-#define MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS     (1 << 7)
-#define MBEDTLS_X509_EXT_BASIC_CONSTRAINTS           (1 << 8)    /* Supported */
-#define MBEDTLS_X509_EXT_NAME_CONSTRAINTS            (1 << 9)
-#define MBEDTLS_X509_EXT_POLICY_CONSTRAINTS          (1 << 10)
-#define MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE          (1 << 11)
-#define MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS     (1 << 12)
-#define MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY          (1 << 13)
-#define MBEDTLS_X509_EXT_FRESHEST_CRL                (1 << 14)
-
-#define MBEDTLS_X509_EXT_NS_CERT_TYPE                (1 << 16)
+#define MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER MBEDTLS_OID_X509_EXT_AUTHORITY_KEY_IDENTIFIER
+#define MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER   MBEDTLS_OID_X509_EXT_SUBJECT_KEY_IDENTIFIER
+#define MBEDTLS_X509_EXT_KEY_USAGE                MBEDTLS_OID_X509_EXT_KEY_USAGE
+#define MBEDTLS_X509_EXT_CERTIFICATE_POLICIES     MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES
+#define MBEDTLS_X509_EXT_POLICY_MAPPINGS          MBEDTLS_OID_X509_EXT_POLICY_MAPPINGS
+#define MBEDTLS_X509_EXT_SUBJECT_ALT_NAME         MBEDTLS_OID_X509_EXT_SUBJECT_ALT_NAME         /* Supported (DNS) */
+#define MBEDTLS_X509_EXT_ISSUER_ALT_NAME          MBEDTLS_OID_X509_EXT_ISSUER_ALT_NAME
+#define MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS  MBEDTLS_OID_X509_EXT_SUBJECT_DIRECTORY_ATTRS
+#define MBEDTLS_X509_EXT_BASIC_CONSTRAINTS        MBEDTLS_OID_X509_EXT_BASIC_CONSTRAINTS        /* Supported */
+#define MBEDTLS_X509_EXT_NAME_CONSTRAINTS         MBEDTLS_OID_X509_EXT_NAME_CONSTRAINTS
+#define MBEDTLS_X509_EXT_POLICY_CONSTRAINTS       MBEDTLS_OID_X509_EXT_POLICY_CONSTRAINTS
+#define MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE       MBEDTLS_OID_X509_EXT_EXTENDED_KEY_USAGE
+#define MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS  MBEDTLS_OID_X509_EXT_CRL_DISTRIBUTION_POINTS
+#define MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY       MBEDTLS_OID_X509_EXT_INIHIBIT_ANYPOLICY
+#define MBEDTLS_X509_EXT_FRESHEST_CRL             MBEDTLS_OID_X509_EXT_FRESHEST_CRL
+#define MBEDTLS_X509_EXT_NS_CERT_TYPE             MBEDTLS_OID_X509_EXT_NS_CERT_TYPE
 
 /*
  * Storage format identifiers
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h
index 2ade47c89db..7e9e8885f41 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_CRL_H
 #define MBEDTLS_X509_CRL_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "x509.h"
+#include "mbedtls/x509.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
index 30da1909b74..64ccb433ba8 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,39 +18,19 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_CRT_H
 #define MBEDTLS_X509_CRT_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "x509.h"
-#include "x509_crl.h"
+#include "mbedtls/x509.h"
+#include "mbedtls/x509_crl.h"
+#include "mbedtls/bignum.h"
 
 /**
  * \addtogroup x509_module
@@ -77,6 +51,8 @@ extern "C" {
  */
 typedef struct mbedtls_x509_crt
 {
+    int own_buffer;                     /**< Indicates if \c raw is owned
+                                         *   by the structure or not.        */
     mbedtls_x509_buf raw;               /**< The raw certificate data (DER). */
     mbedtls_x509_buf tbs;               /**< The raw certificate body (DER). The part that is To Be Signed. */
 
@@ -93,12 +69,15 @@ typedef struct mbedtls_x509_crt
     mbedtls_x509_time valid_from;       /**< Start time of certificate validity. */
     mbedtls_x509_time valid_to;         /**< End time of certificate validity. */
 
+    mbedtls_x509_buf pk_raw;
     mbedtls_pk_context pk;              /**< Container for the public key context. */
 
     mbedtls_x509_buf issuer_id;         /**< Optional X.509 v2/v3 issuer unique identifier. */
     mbedtls_x509_buf subject_id;        /**< Optional X.509 v2/v3 subject unique identifier. */
     mbedtls_x509_buf v3_ext;            /**< Optional X.509 v3 extensions.  */
-    mbedtls_x509_sequence subject_alt_names;    /**< Optional list of Subject Alternative Names (Only dNSName supported). */
+    mbedtls_x509_sequence subject_alt_names;    /**< Optional list of raw entries of Subject Alternative Names extension (currently only dNSName and OtherName are listed). */
+
+    mbedtls_x509_sequence certificate_policies; /**< Optional list of certificate policies (Only anyPolicy is printed and enforced, however the rest of the policies are still listed). */
 
     int ext_types;              /**< Bit string containing detected and parsed extensions */
     int ca_istrue;              /**< Optional Basic Constraint extension value: 1 if this certificate belongs to a CA, 0 otherwise. */
@@ -119,6 +98,53 @@ typedef struct mbedtls_x509_crt
 }
 mbedtls_x509_crt;
 
+/**
+ * From RFC 5280 section 4.2.1.6:
+ * OtherName ::= SEQUENCE {
+ *      type-id    OBJECT IDENTIFIER,
+ *      value      [0] EXPLICIT ANY DEFINED BY type-id }
+ */
+typedef struct mbedtls_x509_san_other_name
+{
+    /**
+     * The type_id is an OID as deifned in RFC 5280.
+     * To check the value of the type id, you should use
+     * \p MBEDTLS_OID_CMP with a known OID mbedtls_x509_buf.
+     */
+    mbedtls_x509_buf type_id;                   /**< The type id. */
+    union
+    {
+        /**
+         * From RFC 4108 section 5:
+         * HardwareModuleName ::= SEQUENCE {
+         *                         hwType OBJECT IDENTIFIER,
+         *                         hwSerialNum OCTET STRING }
+         */
+        struct
+        {
+            mbedtls_x509_buf oid;               /**< The object identifier. */
+            mbedtls_x509_buf val;               /**< The named value. */
+        }
+        hardware_module_name;
+    }
+    value;
+}
+mbedtls_x509_san_other_name;
+
+/**
+ * A structure for holding the parsed Subject Alternative Name, according to type
+ */
+typedef struct mbedtls_x509_subject_alternative_name
+{
+    int type;                              /**< The SAN type, value of MBEDTLS_X509_SAN_XXX. */
+    union {
+        mbedtls_x509_san_other_name other_name; /**< The otherName supported type. */
+        mbedtls_x509_buf   unstructured_name; /**< The buffer for the un constructed types. Only dnsName currently supported */
+    }
+    san; /**< A union of the supported SAN types */
+}
+mbedtls_x509_subject_alternative_name;
+
 /**
  * Build flag from an algorithm/curve identifier (pk, md, ecp)
  * Since 0 is always XXX_NONE, ignore it.
@@ -188,6 +214,14 @@ typedef struct
 {
     mbedtls_x509_crt_verify_chain_item items[MBEDTLS_X509_MAX_VERIFY_CHAIN_SIZE];
     unsigned len;
+
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+    /* This stores the list of potential trusted signers obtained from
+     * the CA callback used for the CRT verification, if configured.
+     * We must track it somewhere because the callback passes its
+     * ownership to the caller. */
+    mbedtls_x509_crt *trust_ca_cb_result;
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
 } mbedtls_x509_crt_verify_chain;
 
 #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
@@ -254,16 +288,142 @@ extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_suiteb;
 
 /**
  * \brief          Parse a single DER formatted certificate and add it
- *                 to the chained list.
- *
- * \param chain    points to the start of the chain
- * \param buf      buffer holding the certificate DER data
- * \param buflen   size of the buffer
- *
- * \return         0 if successful, or a specific X509 or PEM error code
+ *                 to the end of the provided chained list.
+ *
+ * \param chain    The pointer to the start of the CRT chain to attach to.
+ *                 When parsing the first CRT in a chain, this should point
+ *                 to an instance of ::mbedtls_x509_crt initialized through
+ *                 mbedtls_x509_crt_init().
+ * \param buf      The buffer holding the DER encoded certificate.
+ * \param buflen   The size in Bytes of \p buf.
+ *
+ * \note           This function makes an internal copy of the CRT buffer
+ *                 \p buf. In particular, \p buf may be destroyed or reused
+ *                 after this call returns. To avoid duplicating the CRT
+ *                 buffer (at the cost of stricter lifetime constraints),
+ *                 use mbedtls_x509_crt_parse_der_nocopy() instead.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_x509_crt_parse_der( mbedtls_x509_crt *chain,
+                                const unsigned char *buf,
+                                size_t buflen );
+
+/**
+ * \brief          The type of certificate extension callbacks.
+ *
+ *                 Callbacks of this type are passed to and used by the
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() routine when
+ *                 it encounters either an unsupported extension or a
+ *                 "certificate policies" extension containing any
+ *                 unsupported certificate policies.
+ *                 Future versions of the library may invoke the callback
+ *                 in other cases, if and when the need arises.
+ *
+ * \param p_ctx    An opaque context passed to the callback.
+ * \param crt      The certificate being parsed.
+ * \param oid      The OID of the extension.
+ * \param critical Whether the extension is critical.
+ * \param p        Pointer to the start of the extension value
+ *                 (the content of the OCTET STRING).
+ * \param end      End of extension value.
+ *
+ * \note           The callback must fail and return a negative error code
+ *                 if it can not parse or does not support the extension.
+ *                 When the callback fails to parse a critical extension
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() also fails.
+ *                 When the callback fails to parse a non critical extension
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() simply skips
+ *                 the extension and continues parsing.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+typedef int (*mbedtls_x509_crt_ext_cb_t)( void *p_ctx,
+                                          mbedtls_x509_crt const *crt,
+                                          mbedtls_x509_buf const *oid,
+                                          int critical,
+                                          const unsigned char *p,
+                                          const unsigned char *end );
+
+/**
+ * \brief            Parse a single DER formatted certificate and add it
+ *                   to the end of the provided chained list.
+ *
+ * \param chain      The pointer to the start of the CRT chain to attach to.
+ *                   When parsing the first CRT in a chain, this should point
+ *                   to an instance of ::mbedtls_x509_crt initialized through
+ *                   mbedtls_x509_crt_init().
+ * \param buf        The buffer holding the DER encoded certificate.
+ * \param buflen     The size in Bytes of \p buf.
+ * \param make_copy  When not zero this function makes an internal copy of the
+ *                   CRT buffer \p buf. In particular, \p buf may be destroyed
+ *                   or reused after this call returns.
+ *                   When zero this function avoids duplicating the CRT buffer
+ *                   by taking temporary ownership thereof until the CRT
+ *                   is destroyed (like mbedtls_x509_crt_parse_der_nocopy())
+ * \param cb         A callback invoked for every unsupported certificate
+ *                   extension.
+ * \param p_ctx      An opaque context passed to the callback.
+ *
+ * \note             This call is functionally equivalent to
+ *                   mbedtls_x509_crt_parse_der(), and/or
+ *                   mbedtls_x509_crt_parse_der_nocopy()
+ *                   but it calls the callback with every unsupported
+ *                   certificate extension and additionally the
+ *                   "certificate policies" extension if it contains any
+ *                   unsupported certificate policies.
+ *                   The callback must return a negative error code if it
+ *                   does not know how to handle such an extension.
+ *                   When the callback fails to parse a critical extension
+ *                   mbedtls_x509_crt_parse_der_with_ext_cb() also fails.
+ *                   When the callback fails to parse a non critical extension
+ *                   mbedtls_x509_crt_parse_der_with_ext_cb() simply skips
+ *                   the extension and continues parsing.
+ *                   Future versions of the library may invoke the callback
+ *                   in other cases, if and when the need arises.
+ *
+ * \return           \c 0 if successful.
+ * \return           A negative error code on failure.
+ */
+int mbedtls_x509_crt_parse_der_with_ext_cb( mbedtls_x509_crt *chain,
+                                            const unsigned char *buf,
+                                            size_t buflen,
+                                            int make_copy,
+                                            mbedtls_x509_crt_ext_cb_t cb,
+                                            void *p_ctx );
+
+/**
+ * \brief          Parse a single DER formatted certificate and add it
+ *                 to the end of the provided chained list. This is a
+ *                 variant of mbedtls_x509_crt_parse_der() which takes
+ *                 temporary ownership of the CRT buffer until the CRT
+ *                 is destroyed.
+ *
+ * \param chain    The pointer to the start of the CRT chain to attach to.
+ *                 When parsing the first CRT in a chain, this should point
+ *                 to an instance of ::mbedtls_x509_crt initialized through
+ *                 mbedtls_x509_crt_init().
+ * \param buf      The address of the readable buffer holding the DER encoded
+ *                 certificate to use. On success, this buffer must be
+ *                 retained and not be changed for the liftetime of the
+ *                 CRT chain \p chain, that is, until \p chain is destroyed
+ *                 through a call to mbedtls_x509_crt_free().
+ * \param buflen   The size in Bytes of \p buf.
+ *
+ * \note           This call is functionally equivalent to
+ *                 mbedtls_x509_crt_parse_der(), but it avoids creating a
+ *                 copy of the input buffer at the cost of stronger lifetime
+ *                 constraints. This is useful in constrained environments
+ *                 where duplication of the CRT cannot be tolerated.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
  */
-int mbedtls_x509_crt_parse_der( mbedtls_x509_crt *chain, const unsigned char *buf,
-                        size_t buflen );
+int mbedtls_x509_crt_parse_der_nocopy( mbedtls_x509_crt *chain,
+                                       const unsigned char *buf,
+                                       size_t buflen );
 
 /**
  * \brief          Parse one DER-encoded or one or more concatenated PEM-encoded
@@ -327,8 +487,37 @@ int mbedtls_x509_crt_parse_file( mbedtls_x509_crt *chain, const char *path );
  *                 if partly successful or a specific X509 or PEM error code
  */
 int mbedtls_x509_crt_parse_path( mbedtls_x509_crt *chain, const char *path );
-#endif /* MBEDTLS_FS_IO */
 
+#endif /* MBEDTLS_FS_IO */
+/**
+ * \brief          This function parses an item in the SubjectAlternativeNames
+ *                 extension.
+ *
+ * \param san_buf  The buffer holding the raw data item of the subject
+ *                 alternative name.
+ * \param san      The target structure to populate with the parsed presentation
+ *                 of the subject alternative name encoded in \p san_raw.
+ *
+ * \note           Only "dnsName" and "otherName" of type hardware_module_name
+ *                 as defined in RFC 4180 is supported.
+ *
+ * \note           This function should be called on a single raw data of
+ *                 subject alternative name. For example, after successful
+ *                 certificate parsing, one must iterate on every item in the
+ *                 \p crt->subject_alt_names sequence, and pass it to
+ *                 this function.
+ *
+ * \warning        The target structure contains pointers to the raw data of the
+ *                 parsed certificate, and its lifetime is restricted by the
+ *                 lifetime of the certificate.
+ *
+ * \return         \c 0 on success
+ * \return         #MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE for an unsupported
+ *                 SAN type.
+ * \return         Another negative value for any other failure.
+ */
+int mbedtls_x509_parse_subject_alt_name( const mbedtls_x509_buf *san_buf,
+                                         mbedtls_x509_subject_alternative_name *san );
 /**
  * \brief          Returns an informational string about the
  *                 certificate.
@@ -360,7 +549,7 @@ int mbedtls_x509_crt_verify_info( char *buf, size_t size, const char *prefix,
                           uint32_t flags );
 
 /**
- * \brief          Verify the certificate signature
+ * \brief          Verify a chain of certificates.
  *
  *                 The verify callback is a user-supplied callback that
  *                 can clear / modify / add flags for a certificate. If set,
@@ -400,22 +589,30 @@ int mbedtls_x509_crt_verify_info( char *buf, size_t size, const char *prefix,
  *                 specific peers you know) - in that case, the self-signed
  *                 certificate doesn't need to have the CA bit set.
  *
- * \param crt      a certificate (chain) to be verified
- * \param trust_ca the list of trusted CAs (see note above)
- * \param ca_crl   the list of CRLs for trusted CAs (see note above)
- * \param cn       expected Common Name (can be set to
- *                 NULL if the CN must not be verified)
- * \param flags    result of the verification
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
- *
- * \return         0 (and flags set to 0) if the chain was verified and valid,
- *                 MBEDTLS_ERR_X509_CERT_VERIFY_FAILED if the chain was verified
- *                 but found to be invalid, in which case *flags will have one
- *                 or more MBEDTLS_X509_BADCERT_XXX or MBEDTLS_X509_BADCRL_XXX
- *                 flags set, or another error (and flags set to 0xffffffff)
- *                 in case of a fatal error encountered during the
- *                 verification process.
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param cn       The expected Common Name. This will be checked to be
+ *                 present in the certificate's subjectAltNames extension or,
+ *                 if this extension is absent, as a CN component in its
+ *                 Subject name. Currently only DNS names are supported. This
+ *                 may be \c NULL if the CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         \c 0 if the chain is valid with respect to the
+ *                 passed CN, CAs, CRLs and security profile.
+ * \return         #MBEDTLS_ERR_X509_CERT_VERIFY_FAILED in case the
+ *                 certificate chain verification failed. In this case,
+ *                 \c *flags will have one or more
+ *                 \c MBEDTLS_X509_BADCERT_XXX or \c MBEDTLS_X509_BADCRL_XXX
+ *                 flags set.
+ * \return         Another negative error code in case of a fatal error
+ *                 encountered during the verification process.
  */
 int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt,
                      mbedtls_x509_crt *trust_ca,
@@ -425,7 +622,8 @@ int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt,
                      void *p_vrfy );
 
 /**
- * \brief          Verify the certificate signature according to profile
+ * \brief          Verify a chain of certificates with respect to
+ *                 a configurable security profile.
  *
  * \note           Same as \c mbedtls_x509_crt_verify(), but with explicit
  *                 security profile.
@@ -434,22 +632,28 @@ int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt,
  *                 for ECDSA) apply to all certificates: trusted root,
  *                 intermediate CAs if any, and end entity certificate.
  *
- * \param crt      a certificate (chain) to be verified
- * \param trust_ca the list of trusted CAs
- * \param ca_crl   the list of CRLs for trusted CAs
- * \param profile  security profile for verification
- * \param cn       expected Common Name (can be set to
- *                 NULL if the CN must not be verified)
- * \param flags    result of the verification
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
- *
- * \return         0 if successful or MBEDTLS_ERR_X509_CERT_VERIFY_FAILED
- *                 in which case *flags will have one or more
- *                 MBEDTLS_X509_BADCERT_XXX or MBEDTLS_X509_BADCRL_XXX flags
- *                 set,
- *                 or another error in case of a fatal error encountered
- *                 during the verification process.
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param profile  The security profile to use for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         \c 0 if the chain is valid with respect to the
+ *                 passed CN, CAs, CRLs and security profile.
+ * \return         #MBEDTLS_ERR_X509_CERT_VERIFY_FAILED in case the
+ *                 certificate chain verification failed. In this case,
+ *                 \c *flags will have one or more
+ *                 \c MBEDTLS_X509_BADCERT_XXX or \c MBEDTLS_X509_BADCRL_XXX
+ *                 flags set.
+ * \return         Another negative error code in case of a fatal error
+ *                 encountered during the verification process.
  */
 int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt,
                      mbedtls_x509_crt *trust_ca,
@@ -466,16 +670,20 @@ int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt,
  *                 but can return early and restart according to the limit
  *                 set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
  *
- * \param crt      a certificate (chain) to be verified
- * \param trust_ca the list of trusted CAs
- * \param ca_crl   the list of CRLs for trusted CAs
- * \param profile  security profile for verification
- * \param cn       expected Common Name (can be set to
- *                 NULL if the CN must not be verified)
- * \param flags    result of the verification
- * \param f_vrfy   verification function
- * \param p_vrfy   verification parameter
- * \param rs_ctx   restart context (NULL to disable restart)
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param profile  The security profile to use for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ * \param rs_ctx   The restart context to use. This may be set to \c NULL
+ *                 to disable restartable ECC.
  *
  * \return         See \c mbedtls_crt_verify_with_profile(), or
  * \return         #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
@@ -490,6 +698,73 @@ int mbedtls_x509_crt_verify_restartable( mbedtls_x509_crt *crt,
                      void *p_vrfy,
                      mbedtls_x509_crt_restart_ctx *rs_ctx );
 
+/**
+ * \brief               The type of trusted certificate callbacks.
+ *
+ *                      Callbacks of this type are passed to and used by the CRT
+ *                      verification routine mbedtls_x509_crt_verify_with_ca_cb()
+ *                      when looking for trusted signers of a given certificate.
+ *
+ *                      On success, the callback returns a list of trusted
+ *                      certificates to be considered as potential signers
+ *                      for the input certificate.
+ *
+ * \param p_ctx         An opaque context passed to the callback.
+ * \param child         The certificate for which to search a potential signer.
+ *                      This will point to a readable certificate.
+ * \param candidate_cas The address at which to store the address of the first
+ *                      entry in the generated linked list of candidate signers.
+ *                      This will not be \c NULL.
+ *
+ * \note                The callback must only return a non-zero value on a
+ *                      fatal error. If, in contrast, the search for a potential
+ *                      signer completes without a single candidate, the
+ *                      callback must return \c 0 and set \c *candidate_cas
+ *                      to \c NULL.
+ *
+ * \return              \c 0 on success. In this case, \c *candidate_cas points
+ *                      to a heap-allocated linked list of instances of
+ *                      ::mbedtls_x509_crt, and ownership of this list is passed
+ *                      to the caller.
+ * \return              A negative error code on failure.
+ */
+typedef int (*mbedtls_x509_crt_ca_cb_t)( void *p_ctx,
+                                         mbedtls_x509_crt const *child,
+                                         mbedtls_x509_crt **candidate_cas );
+
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+/**
+ * \brief          Version of \c mbedtls_x509_crt_verify_with_profile() which
+ *                 uses a callback to acquire the list of trusted CA
+ *                 certificates.
+ *
+ * \param crt      The certificate chain to be verified.
+ * \param f_ca_cb  The callback to be used to query for potential signers
+ *                 of a given child certificate. See the documentation of
+ *                 ::mbedtls_x509_crt_ca_cb_t for more information.
+ * \param p_ca_cb  The opaque context to be passed to \p f_ca_cb.
+ * \param profile  The security profile for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         See \c mbedtls_crt_verify_with_profile().
+ */
+int mbedtls_x509_crt_verify_with_ca_cb( mbedtls_x509_crt *crt,
+                     mbedtls_x509_crt_ca_cb_t f_ca_cb,
+                     void *p_ca_cb,
+                     const mbedtls_x509_crt_profile *profile,
+                     const char *cn, uint32_t *flags,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy );
+
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
+
 #if defined(MBEDTLS_X509_CHECK_KEY_USAGE)
 /**
  * \brief          Check usage of certificate against keyUsage extension.
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h
index 5dfb4213e8d..b1dfc21f1fb 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,38 +18,17 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_X509_CSR_H
 #define MBEDTLS_X509_CSR_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
 
-#include "x509.h"
+#include "mbedtls/x509.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/xtea.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/xtea.h
index cd6d3753d13..4bdc711fda0 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/xtea.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/xtea.h
@@ -5,13 +5,7 @@
  */
 /*
  *  Copyright The Mbed TLS Contributors
- *  SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
- *
- *  This file is provided under the Apache License 2.0, or the
- *  GNU General Public License v2.0 or later.
- *
- *  **********
- *  Apache License 2.0:
+ *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
  *  not use this file except in compliance with the License.
@@ -24,33 +18,12 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  **********
- *
- *  **********
- *  GNU General Public License v2.0 or later:
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- *  **********
  */
 #ifndef MBEDTLS_XTEA_H
 #define MBEDTLS_XTEA_H
 
 #if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
+#include "mbedtls/config.h"
 #else
 #include MBEDTLS_CONFIG_FILE
 #endif
@@ -61,10 +34,12 @@
 #define MBEDTLS_XTEA_ENCRYPT     1
 #define MBEDTLS_XTEA_DECRYPT     0
 
-#define MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH             -0x0028  /**< The data input has an invalid length. */
+/** The data input has an invalid length. */
+#define MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH             -0x0028
 
 /* MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED is deprecated and should not be used. */
-#define MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED                  -0x0029  /**< XTEA hardware accelerator failed. */
+/** XTEA hardware accelerator failed. */
+#define MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED                  -0x0029
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto.h
new file mode 100644
index 00000000000..b0b57c3a6ba
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto.h
@@ -0,0 +1,3956 @@
+/**
+ * \file psa/crypto.h
+ * \brief Platform Security Architecture cryptography module
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_H
+#define PSA_CRYPTO_H
+
+#include "crypto_platform.h"
+
+#include <stddef.h>
+
+#ifdef __DOXYGEN_ONLY__
+/* This __DOXYGEN_ONLY__ block contains mock definitions for things that
+ * must be defined in the crypto_platform.h header. These mock definitions
+ * are present in this file as a convenience to generate pretty-printed
+ * documentation that includes those definitions. */
+
+/** \defgroup platform Implementation-specific definitions
+ * @{
+ */
+
+/**@}*/
+#endif /* __DOXYGEN_ONLY__ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* The file "crypto_types.h" declares types that encode errors,
+ * algorithms, key types, policies, etc. */
+#include "crypto_types.h"
+
+/** \defgroup version API version
+ * @{
+ */
+
+/**
+ * The major version of this implementation of the PSA Crypto API
+ */
+#define PSA_CRYPTO_API_VERSION_MAJOR 1
+
+/**
+ * The minor version of this implementation of the PSA Crypto API
+ */
+#define PSA_CRYPTO_API_VERSION_MINOR 0
+
+/**@}*/
+
+/* The file "crypto_values.h" declares macros to build and analyze values
+ * of integral types defined in "crypto_types.h". */
+#include "crypto_values.h"
+
+/** \defgroup initialization Library initialization
+ * @{
+ */
+
+/**
+ * \brief Library initialization.
+ *
+ * Applications must call this function before calling any other
+ * function in this module.
+ *
+ * Applications may call this function more than once. Once a call
+ * succeeds, subsequent calls are guaranteed to succeed.
+ *
+ * If the application calls other functions before calling psa_crypto_init(),
+ * the behavior is undefined. Implementations are encouraged to either perform
+ * the operation as if the library had been initialized or to return
+ * #PSA_ERROR_BAD_STATE or some other applicable error. In particular,
+ * implementations should not return a success status if the lack of
+ * initialization may have security implications, for example due to improper
+ * seeding of the random number generator.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ */
+psa_status_t psa_crypto_init(void);
+
+/**@}*/
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** \def PSA_KEY_ATTRIBUTES_INIT
+ *
+ * This macro returns a suitable initializer for a key attribute structure
+ * of type #psa_key_attributes_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_KEY_ATTRIBUTES_INIT {0}
+#endif
+
+/** Return an initial value for a key attributes structure.
+ */
+static psa_key_attributes_t psa_key_attributes_init(void);
+
+/** Declare a key as persistent and set its key identifier.
+ *
+ * If the attribute structure currently declares the key as volatile (which
+ * is the default content of an attribute structure), this function sets
+ * the lifetime attribute to #PSA_KEY_LIFETIME_PERSISTENT.
+ *
+ * This function does not access storage, it merely stores the given
+ * value in the structure.
+ * The persistent key will be written to storage when the attribute
+ * structure is passed to a key creation function such as
+ * psa_import_key(), psa_generate_key(),
+ * psa_key_derivation_output_key() or psa_copy_key().
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes  The attribute structure to write to.
+ * \param key              The persistent identifier for the key.
+ */
+static void psa_set_key_id( psa_key_attributes_t *attributes,
+                            mbedtls_svc_key_id_t key );
+
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+/** Set the owner identifier of a key.
+ *
+ * When key identifiers encode key owner identifiers, psa_set_key_id() does
+ * not allow to define in key attributes the owner of volatile keys as
+ * psa_set_key_id() enforces the key to be persistent.
+ *
+ * This function allows to set in key attributes the owner identifier of a
+ * key. It is intended to be used for volatile keys. For persistent keys,
+ * it is recommended to use the PSA Cryptography API psa_set_key_id() to define
+ * the owner of a key.
+ *
+ * \param[out] attributes  The attribute structure to write to.
+ * \param owner            The key owner identifier.
+ */
+static void mbedtls_set_key_owner_id( psa_key_attributes_t *attributes,
+                                      mbedtls_key_owner_id_t owner );
+#endif
+
+/** Set the location of a persistent key.
+ *
+ * To make a key persistent, you must give it a persistent key identifier
+ * with psa_set_key_id(). By default, a key that has a persistent identifier
+ * is stored in the default storage area identifier by
+ * #PSA_KEY_LIFETIME_PERSISTENT. Call this function to choose a storage
+ * area, or to explicitly declare the key as volatile.
+ *
+ * This function does not access storage, it merely stores the given
+ * value in the structure.
+ * The persistent key will be written to storage when the attribute
+ * structure is passed to a key creation function such as
+ * psa_import_key(), psa_generate_key(),
+ * psa_key_derivation_output_key() or psa_copy_key().
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param lifetime              The lifetime for the key.
+ *                              If this is #PSA_KEY_LIFETIME_VOLATILE, the
+ *                              key will be volatile, and the key identifier
+ *                              attribute is reset to 0.
+ */
+static void psa_set_key_lifetime(psa_key_attributes_t *attributes,
+                                 psa_key_lifetime_t lifetime);
+
+/** Retrieve the key identifier from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The persistent identifier stored in the attribute structure.
+ *         This value is unspecified if the attribute structure declares
+ *         the key as volatile.
+ */
+static mbedtls_svc_key_id_t psa_get_key_id(
+    const psa_key_attributes_t *attributes);
+
+/** Retrieve the lifetime from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The lifetime value stored in the attribute structure.
+ */
+static psa_key_lifetime_t psa_get_key_lifetime(
+    const psa_key_attributes_t *attributes);
+
+/** Declare usage flags for a key.
+ *
+ * Usage flags are part of a key's usage policy. They encode what
+ * kind of operations are permitted on the key. For more details,
+ * refer to the documentation of the type #psa_key_usage_t.
+ *
+ * This function overwrites any usage flags
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param usage_flags           The usage flags to write.
+ */
+static void psa_set_key_usage_flags(psa_key_attributes_t *attributes,
+                                    psa_key_usage_t usage_flags);
+
+/** Retrieve the usage flags from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The usage flags stored in the attribute structure.
+ */
+static psa_key_usage_t psa_get_key_usage_flags(
+    const psa_key_attributes_t *attributes);
+
+/** Declare the permitted algorithm policy for a key.
+ *
+ * The permitted algorithm policy of a key encodes which algorithm or
+ * algorithms are permitted to be used with this key. The following
+ * algorithm policies are supported:
+ * - 0 does not allow any cryptographic operation with the key. The key
+ *   may be used for non-cryptographic actions such as exporting (if
+ *   permitted by the usage flags).
+ * - An algorithm value permits this particular algorithm.
+ * - An algorithm wildcard built from #PSA_ALG_ANY_HASH allows the specified
+ *   signature scheme with any hash algorithm.
+ * - An algorithm built from #PSA_ALG_AT_LEAST_THIS_LENGTH_MAC allows
+ *   any MAC algorithm from the same base class (e.g. CMAC) which
+ *   generates/verifies a MAC length greater than or equal to the length
+ *   encoded in the wildcard algorithm.
+ * - An algorithm built from #PSA_ALG_AEAD_WITH_AT_LEAST_THIS_LENGTH_TAG
+ *   allows any AEAD algorithm from the same base class (e.g. CCM) which
+ *   generates/verifies a tag length greater than or equal to the length
+ *   encoded in the wildcard algorithm.
+ *
+ * This function overwrites any algorithm policy
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param alg                   The permitted algorithm policy to write.
+ */
+static void psa_set_key_algorithm(psa_key_attributes_t *attributes,
+                                  psa_algorithm_t alg);
+
+
+/** Retrieve the algorithm policy from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The algorithm stored in the attribute structure.
+ */
+static psa_algorithm_t psa_get_key_algorithm(
+    const psa_key_attributes_t *attributes);
+
+/** Declare the type of a key.
+ *
+ * This function overwrites any key type
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param type                  The key type to write.
+ *                              If this is 0, the key type in \p attributes
+ *                              becomes unspecified.
+ */
+static void psa_set_key_type(psa_key_attributes_t *attributes,
+                             psa_key_type_t type);
+
+
+/** Declare the size of a key.
+ *
+ * This function overwrites any key size previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param bits                  The key size in bits.
+ *                              If this is 0, the key size in \p attributes
+ *                              becomes unspecified. Keys of size 0 are
+ *                              not supported.
+ */
+static void psa_set_key_bits(psa_key_attributes_t *attributes,
+                             size_t bits);
+
+/** Retrieve the key type from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The key type stored in the attribute structure.
+ */
+static psa_key_type_t psa_get_key_type(const psa_key_attributes_t *attributes);
+
+/** Retrieve the key size from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The key size stored in the attribute structure, in bits.
+ */
+static size_t psa_get_key_bits(const psa_key_attributes_t *attributes);
+
+/** Retrieve the attributes of a key.
+ *
+ * This function first resets the attribute structure as with
+ * psa_reset_key_attributes(). It then copies the attributes of
+ * the given key into the given attribute structure.
+ *
+ * \note This function may allocate memory or other resources.
+ *       Once you have called this function on an attribute structure,
+ *       you must call psa_reset_key_attributes() to free these resources.
+ *
+ * \param[in] key               Identifier of the key to query.
+ * \param[in,out] attributes    On success, the attributes of the key.
+ *                              On failure, equivalent to a
+ *                              freshly-initialized structure.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_get_key_attributes(mbedtls_svc_key_id_t key,
+                                    psa_key_attributes_t *attributes);
+
+/** Reset a key attribute structure to a freshly initialized state.
+ *
+ * You must initialize the attribute structure as described in the
+ * documentation of the type #psa_key_attributes_t before calling this
+ * function. Once the structure has been initialized, you may call this
+ * function at any time.
+ *
+ * This function frees any auxiliary resources that the structure
+ * may contain.
+ *
+ * \param[in,out] attributes    The attribute structure to reset.
+ */
+void psa_reset_key_attributes(psa_key_attributes_t *attributes);
+
+/**@}*/
+
+/** \defgroup key_management Key management
+ * @{
+ */
+
+/** Remove non-essential copies of key material from memory.
+ *
+ * If the key identifier designates a volatile key, this functions does not do
+ * anything and returns successfully.
+ *
+ * If the key identifier designates a persistent key, then this function will
+ * free all resources associated with the key in volatile memory. The key
+ * data in persistent storage is not affected and the key can still be used.
+ *
+ * \param key Identifier of the key to purge.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key material will have been removed from memory if it is not
+ *         currently required.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not a valid key identifier.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_purge_key(mbedtls_svc_key_id_t key);
+
+/** Make a copy of a key.
+ *
+ * Copy key material from one location to another.
+ *
+ * This function is primarily useful to copy a key from one location
+ * to another, since it populates a key using the material from
+ * another key which may have a different lifetime.
+ *
+ * This function may be used to share a key with a different party,
+ * subject to implementation-defined restrictions on key sharing.
+ *
+ * The policy on the source key must have the usage flag
+ * #PSA_KEY_USAGE_COPY set.
+ * This flag is sufficient to permit the copy if the key has the lifetime
+ * #PSA_KEY_LIFETIME_VOLATILE or #PSA_KEY_LIFETIME_PERSISTENT.
+ * Some secure elements do not provide a way to copy a key without
+ * making it extractable from the secure element. If a key is located
+ * in such a secure element, then the key must have both usage flags
+ * #PSA_KEY_USAGE_COPY and #PSA_KEY_USAGE_EXPORT in order to make
+ * a copy of the key outside the secure element.
+ *
+ * The resulting key may only be used in a way that conforms to
+ * both the policy of the original key and the policy specified in
+ * the \p attributes parameter:
+ * - The usage flags on the resulting key are the bitwise-and of the
+ *   usage flags on the source policy and the usage flags in \p attributes.
+ * - If both allow the same algorithm or wildcard-based
+ *   algorithm policy, the resulting key has the same algorithm policy.
+ * - If either of the policies allows an algorithm and the other policy
+ *   allows a wildcard-based algorithm policy that includes this algorithm,
+ *   the resulting key allows the same algorithm.
+ * - If the policies do not allow any algorithm in common, this function
+ *   fails with the status #PSA_ERROR_INVALID_ARGUMENT.
+ *
+ * The effect of this function on implementation-defined attributes is
+ * implementation-defined.
+ *
+ * \param source_key        The key to copy. It must allow the usage
+ *                          #PSA_KEY_USAGE_COPY. If a private or secret key is
+ *                          being copied outside of a secure element it must
+ *                          also allow #PSA_KEY_USAGE_EXPORT.
+ * \param[in] attributes    The attributes for the new key.
+ *                          They are used as follows:
+ *                          - The key type and size may be 0. If either is
+ *                            nonzero, it must match the corresponding
+ *                            attribute of the source key.
+ *                          - The key location (the lifetime and, for
+ *                            persistent keys, the key identifier) is
+ *                            used directly.
+ *                          - The policy constraints (usage flags and
+ *                            algorithm policy) are combined from
+ *                            the source key and \p attributes so that
+ *                            both sets of restrictions apply, as
+ *                            described in the documentation of this function.
+ * \param[out] target_key   On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p source_key is invalid.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The lifetime or identifier in \p attributes are invalid.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The policy constraints on the source and specified in
+ *         \p attributes are incompatible.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p attributes specifies a key type or key size
+ *         which does not match the attributes of the source key.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The source key does not have the #PSA_KEY_USAGE_COPY usage flag.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The source key is not exportable and its lifetime does not
+ *         allow copying it to the target's lifetime.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_copy_key(mbedtls_svc_key_id_t source_key,
+                          const psa_key_attributes_t *attributes,
+                          mbedtls_svc_key_id_t *target_key);
+
+
+/**
+ * \brief Destroy a key.
+ *
+ * This function destroys a key from both volatile
+ * memory and, if applicable, non-volatile storage. Implementations shall
+ * make a best effort to ensure that that the key material cannot be recovered.
+ *
+ * This function also erases any metadata such as policies and frees
+ * resources associated with the key.
+ *
+ * If a key is currently in use in a multipart operation, then destroying the
+ * key will cause the multipart operation to fail.
+ *
+ * \param key  Identifier of the key to erase. If this is \c 0, do nothing and
+ *             return #PSA_SUCCESS.
+ *
+ * \retval #PSA_SUCCESS
+ *         \p key was a valid identifier and the key material that it
+ *         referred to has been erased. Alternatively, \p key is \c 0.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key cannot be erased because it is
+ *         read-only, either due to a policy or due to physical restrictions.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p key is not a valid identifier nor \c 0.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ *         There was an failure in communication with the cryptoprocessor.
+ *         The key material may still be present in the cryptoprocessor.
+ * \retval #PSA_ERROR_DATA_INVALID
+ *         This error is typically a result of either storage corruption on a
+ *         cleartext storage backend, or an attempt to read data that was
+ *         written by an incompatible version of the library.
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The storage is corrupted. Implementations shall make a best effort
+ *         to erase key material even in this stage, however applications
+ *         should be aware that it may be impossible to guarantee that the
+ *         key material is not recoverable in such cases.
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ *         An unexpected condition which is not a storage corruption or
+ *         a communication failure occurred. The cryptoprocessor may have
+ *         been compromised.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_destroy_key(mbedtls_svc_key_id_t key);
+
+/**@}*/
+
+/** \defgroup import_export Key import and export
+ * @{
+ */
+
+/**
+ * \brief Import a key in binary format.
+ *
+ * This function supports any output from psa_export_key(). Refer to the
+ * documentation of psa_export_public_key() for the format of public keys
+ * and to the documentation of psa_export_key() for the format for
+ * other key types.
+ *
+ * The key data determines the key size. The attributes may optionally
+ * specify a key size; in this case it must match the size determined
+ * from the key data. A key size of 0 in \p attributes indicates that
+ * the key size is solely determined by the key data.
+ *
+ * Implementations must reject an attempt to import a key of size 0.
+ *
+ * This specification supports a single format for each key type.
+ * Implementations may support other formats as long as the standard
+ * format is supported. Implementations that support other formats
+ * should ensure that the formats are clearly unambiguous so as to
+ * minimize the risk that an invalid input is accidentally interpreted
+ * according to a different format.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ *                          The key size is always determined from the
+ *                          \p data buffer.
+ *                          If the key size in \p attributes is nonzero,
+ *                          it must be equal to the size from \p data.
+ * \param[out] key          On success, an identifier to the newly created key.
+ *                          For persistent keys, this is the key identifier
+ *                          defined in \p attributes.
+ *                          \c 0 on failure.
+ * \param[in] data    Buffer containing the key data. The content of this
+ *                    buffer is interpreted according to the type declared
+ *                    in \p attributes.
+ *                    All implementations must support at least the format
+ *                    described in the documentation
+ *                    of psa_export_key() or psa_export_public_key() for
+ *                    the chosen type. Implementations may allow other
+ *                    formats, but should be conservative: implementations
+ *                    should err on the side of rejecting content if it
+ *                    may be erroneous (e.g. wrong type or truncated data).
+ * \param data_length Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The key type or key size is not supported, either by the
+ *         implementation in general or in this particular persistent location.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key attributes, as a whole, are invalid.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key data is not correctly formatted.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size in \p attributes is nonzero and does not match the size
+ *         of the key data.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_import_key(const psa_key_attributes_t *attributes,
+                            const uint8_t *data,
+                            size_t data_length,
+                            mbedtls_svc_key_id_t *key);
+
+
+
+/**
+ * \brief Export a key in binary format.
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an equivalent object.
+ *
+ * If the implementation of psa_import_key() supports other formats
+ * beyond the format specified here, the output from psa_export_key()
+ * must use the representation specified here, not the original
+ * representation.
+ *
+ * For standard key types, the output format is as follows:
+ *
+ * - For symmetric keys (including MAC keys), the format is the
+ *   raw bytes of the key.
+ * - For DES, the key data consists of 8 bytes. The parity bits must be
+ *   correct.
+ * - For Triple-DES, the format is the concatenation of the
+ *   two or three DES keys.
+ * - For RSA key pairs (#PSA_KEY_TYPE_RSA_KEY_PAIR), the format
+ *   is the non-encrypted DER encoding of the representation defined by
+ *   PKCS\#1 (RFC 8017) as `RSAPrivateKey`, version 0.
+ *   ```
+ *   RSAPrivateKey ::= SEQUENCE {
+ *       version             INTEGER,  -- must be 0
+ *       modulus             INTEGER,  -- n
+ *       publicExponent      INTEGER,  -- e
+ *       privateExponent     INTEGER,  -- d
+ *       prime1              INTEGER,  -- p
+ *       prime2              INTEGER,  -- q
+ *       exponent1           INTEGER,  -- d mod (p-1)
+ *       exponent2           INTEGER,  -- d mod (q-1)
+ *       coefficient         INTEGER,  -- (inverse of q) mod p
+ *   }
+ *   ```
+ * - For elliptic curve key pairs (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_KEY_PAIR is true), the format is
+ *   a representation of the private value as a `ceiling(m/8)`-byte string
+ *   where `m` is the bit size associated with the curve, i.e. the bit size
+ *   of the order of the curve's coordinate field. This byte string is
+ *   in little-endian order for Montgomery curves (curve types
+ *   `PSA_ECC_FAMILY_CURVEXXX`), and in big-endian order for Weierstrass
+ *   curves (curve types `PSA_ECC_FAMILY_SECTXXX`, `PSA_ECC_FAMILY_SECPXXX`
+ *   and `PSA_ECC_FAMILY_BRAINPOOL_PXXX`).
+ *   For Weierstrass curves, this is the content of the `privateKey` field of
+ *   the `ECPrivateKey` format defined by RFC 5915.  For Montgomery curves,
+ *   the format is defined by RFC 7748, and output is masked according to §5.
+ *   For twisted Edwards curves, the private key is as defined by RFC 8032
+ *   (a 32-byte string for Edwards25519, a 57-byte string for Edwards448).
+ * - For Diffie-Hellman key exchange key pairs (key types for which
+ *   #PSA_KEY_TYPE_IS_DH_KEY_PAIR is true), the
+ *   format is the representation of the private key `x` as a big-endian byte
+ *   string. The length of the byte string is the private key size in bytes
+ *   (leading zeroes are not stripped).
+ * - For public keys (key types for which #PSA_KEY_TYPE_IS_PUBLIC_KEY is
+ *   true), the format is the same as for psa_export_public_key().
+ *
+ * The policy on the key must have the usage flag #PSA_KEY_USAGE_EXPORT set.
+ *
+ * \param key               Identifier of the key to export. It must allow the
+ *                          usage #PSA_KEY_USAGE_EXPORT, unless it is a public
+ *                          key.
+ * \param[out] data         Buffer where the key data is to be written.
+ * \param data_size         Size of the \p data buffer in bytes.
+ * \param[out] data_length  On success, the number of bytes
+ *                          that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_EXPORT flag.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p data buffer is too small. You can determine a
+ *         sufficient buffer size by calling
+ *         #PSA_EXPORT_KEY_OUTPUT_SIZE(\c type, \c bits)
+ *         where \c type is the key type
+ *         and \c bits is the key size in bits.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_export_key(mbedtls_svc_key_id_t key,
+                            uint8_t *data,
+                            size_t data_size,
+                            size_t *data_length);
+
+/**
+ * \brief Export a public key or the public part of a key pair in binary format.
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an object that is equivalent to the public key.
+ *
+ * This specification supports a single format for each key type.
+ * Implementations may support other formats as long as the standard
+ * format is supported. Implementations that support other formats
+ * should ensure that the formats are clearly unambiguous so as to
+ * minimize the risk that an invalid input is accidentally interpreted
+ * according to a different format.
+ *
+ * For standard key types, the output format is as follows:
+ * - For RSA public keys (#PSA_KEY_TYPE_RSA_PUBLIC_KEY), the DER encoding of
+ *   the representation defined by RFC 3279 &sect;2.3.1 as `RSAPublicKey`.
+ *   ```
+ *   RSAPublicKey ::= SEQUENCE {
+ *      modulus            INTEGER,    -- n
+ *      publicExponent     INTEGER  }  -- e
+ *   ```
+ * - For elliptic curve keys on a twisted Edwards curve (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY is true and #PSA_KEY_TYPE_ECC_GET_FAMILY
+ *   returns #PSA_ECC_FAMILY_TWISTED_EDWARDS), the public key is as defined
+ *   by RFC 8032
+ *   (a 32-byte string for Edwards25519, a 57-byte string for Edwards448).
+ * - For other elliptic curve public keys (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY is true), the format is the uncompressed
+ *   representation defined by SEC1 &sect;2.3.3 as the content of an ECPoint.
+ *   Let `m` be the bit size associated with the curve, i.e. the bit size of
+ *   `q` for a curve over `F_q`. The representation consists of:
+ *      - The byte 0x04;
+ *      - `x_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - `y_P` as a `ceiling(m/8)`-byte string, big-endian.
+ * - For Diffie-Hellman key exchange public keys (key types for which
+ *   #PSA_KEY_TYPE_IS_DH_PUBLIC_KEY is true),
+ *   the format is the representation of the public key `y = g^x mod p` as a
+ *   big-endian byte string. The length of the byte string is the length of the
+ *   base prime `p` in bytes.
+ *
+ * Exporting a public key object or the public part of a key pair is
+ * always permitted, regardless of the key's usage flags.
+ *
+ * \param key               Identifier of the key to export.
+ * \param[out] data         Buffer where the key data is to be written.
+ * \param data_size         Size of the \p data buffer in bytes.
+ * \param[out] data_length  On success, the number of bytes
+ *                          that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key is neither a public key nor a key pair.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p data buffer is too small. You can determine a
+ *         sufficient buffer size by calling
+ *         #PSA_EXPORT_KEY_OUTPUT_SIZE(#PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(\c type), \c bits)
+ *         where \c type is the key type
+ *         and \c bits is the key size in bits.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_export_public_key(mbedtls_svc_key_id_t key,
+                                   uint8_t *data,
+                                   size_t data_size,
+                                   size_t *data_length);
+
+
+
+/**@}*/
+
+/** \defgroup hash Message digests
+ * @{
+ */
+
+/** Calculate the hash (digest) of a message.
+ *
+ * \note To verify the hash of a message against an
+ *       expected value, use psa_hash_compare() instead.
+ *
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ * \param[in] input         Buffer containing the message to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] hash         Buffer where the hash is to be written.
+ * \param hash_size         Size of the \p hash buffer in bytes.
+ * \param[out] hash_length  On success, the number of bytes
+ *                          that make up the hash value. This is always
+ *                          #PSA_HASH_LENGTH(\p alg).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p hash_size is too small
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_compute(psa_algorithm_t alg,
+                              const uint8_t *input,
+                              size_t input_length,
+                              uint8_t *hash,
+                              size_t hash_size,
+                              size_t *hash_length);
+
+/** Calculate the hash (digest) of a message and compare it with a
+ * reference value.
+ *
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ * \param[in] input         Buffer containing the message to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] hash         Buffer containing the expected hash value.
+ * \param hash_length       Size of the \p hash buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected hash is identical to the actual hash of the input.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The hash of the message was calculated successfully, but it
+ *         differs from the expected hash.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p input_length or \p hash_length do not match the hash size for \p alg
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_compare(psa_algorithm_t alg,
+                              const uint8_t *input,
+                              size_t input_length,
+                              const uint8_t *hash,
+                              size_t hash_length);
+
+/** The type of the state data structure for multipart hash operations.
+ *
+ * Before calling any function on a hash operation object, the application must
+ * initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_hash_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_hash_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_HASH_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_hash_operation_t operation = PSA_HASH_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_hash_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_hash_operation_t operation;
+ *   operation = psa_hash_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_hash_operation_s psa_hash_operation_t;
+
+/** \def PSA_HASH_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a hash operation object
+ * of type #psa_hash_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_HASH_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a hash operation object.
+ */
+static psa_hash_operation_t psa_hash_operation_init(void);
+
+/** Set up a multipart hash operation.
+ *
+ * The sequence of operations to calculate a hash (message digest)
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_hash_operation_t, e.g. #PSA_HASH_OPERATION_INIT.
+ * -# Call psa_hash_setup() to specify the algorithm.
+ * -# Call psa_hash_update() zero, one or more times, passing a fragment
+ *    of the message each time. The hash that is calculated is the hash
+ *    of the concatenation of these messages in order.
+ * -# To calculate the hash, call psa_hash_finish().
+ *    To compare the hash with an expected value, call psa_hash_verify().
+ *
+ * If an error occurs at any step after a call to psa_hash_setup(), the
+ * operation will need to be reset by a call to psa_hash_abort(). The
+ * application may call psa_hash_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_hash_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_hash_finish() or psa_hash_verify().
+ * - A call to psa_hash_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_hash_operation_t and not yet in use.
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not a supported hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p alg is not a hash algorithm.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_setup(psa_hash_operation_t *operation,
+                            psa_algorithm_t alg);
+
+/** Add a message fragment to a multipart hash operation.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \param[in,out] operation Active hash operation.
+ * \param[in] input         Buffer containing the message fragment to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it muct be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_update(psa_hash_operation_t *operation,
+                             const uint8_t *input,
+                             size_t input_length);
+
+/** Finish the calculation of the hash of a message.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ * This function calculates the hash of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_hash_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \warning Applications should not call this function if they expect
+ *          a specific value for the hash. Call psa_hash_verify() instead.
+ *          Beware that comparing integrity or authenticity data such as
+ *          hash values with a function such as \c memcmp is risky
+ *          because the time taken by the comparison may leak information
+ *          about the hashed data which could allow an attacker to guess
+ *          a valid hash and thereby bypass security controls.
+ *
+ * \param[in,out] operation     Active hash operation.
+ * \param[out] hash             Buffer where the hash is to be written.
+ * \param hash_size             Size of the \p hash buffer in bytes.
+ * \param[out] hash_length      On success, the number of bytes
+ *                              that make up the hash value. This is always
+ *                              #PSA_HASH_LENGTH(\c alg) where \c alg is the
+ *                              hash algorithm that is calculated.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p hash buffer is too small. You can determine a
+ *         sufficient buffer size by calling #PSA_HASH_LENGTH(\c alg)
+ *         where \c alg is the hash algorithm that is calculated.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_finish(psa_hash_operation_t *operation,
+                             uint8_t *hash,
+                             size_t hash_size,
+                             size_t *hash_length);
+
+/** Finish the calculation of the hash of a message and compare it with
+ * an expected value.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ * This function calculates the hash of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_hash_update(). It then
+ * compares the calculated hash with the expected hash passed as a
+ * parameter to this function.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual hash and the expected hash is performed
+ * in constant time.
+ *
+ * \param[in,out] operation     Active hash operation.
+ * \param[in] hash              Buffer containing the expected hash value.
+ * \param hash_length           Size of the \p hash buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected hash is identical to the actual hash of the message.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The hash of the message was calculated successfully, but it
+ *         differs from the expected hash.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_verify(psa_hash_operation_t *operation,
+                             const uint8_t *hash,
+                             size_t hash_length);
+
+/** Abort a hash operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_hash_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized by one of the methods described in #psa_hash_operation_t.
+ *
+ * In particular, calling psa_hash_abort() after the operation has been
+ * terminated by a call to psa_hash_abort(), psa_hash_finish() or
+ * psa_hash_verify() is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized hash operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_abort(psa_hash_operation_t *operation);
+
+/** Clone a hash operation.
+ *
+ * This function copies the state of an ongoing hash operation to
+ * a new operation object. In other words, this function is equivalent
+ * to calling psa_hash_setup() on \p target_operation with the same
+ * algorithm that \p source_operation was set up for, then
+ * psa_hash_update() on \p target_operation with the same input that
+ * that was passed to \p source_operation. After this function returns, the
+ * two objects are independent, i.e. subsequent calls involving one of
+ * the objects do not affect the other object.
+ *
+ * \param[in] source_operation      The active hash operation to clone.
+ * \param[in,out] target_operation  The operation object to set up.
+ *                                  It must be initialized but not active.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The \p source_operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The \p target_operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_clone(const psa_hash_operation_t *source_operation,
+                            psa_hash_operation_t *target_operation);
+
+/**@}*/
+
+/** \defgroup MAC Message authentication codes
+ * @{
+ */
+
+/** Calculate the MAC (message authentication code) of a message.
+ *
+ * \note To verify the MAC of a message against an
+ *       expected value, use psa_mac_verify() instead.
+ *       Beware that comparing integrity or authenticity data such as
+ *       MAC values with a function such as \c memcmp is risky
+ *       because the time taken by the comparison may leak information
+ *       about the MAC value which could allow an attacker to guess
+ *       a valid MAC and thereby bypass security controls.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must allow the usage PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ * \param[in] input         Buffer containing the input message.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] mac          Buffer where the MAC value is to be written.
+ * \param mac_size          Size of the \p mac buffer in bytes.
+ * \param[out] mac_length   On success, the number of bytes
+ *                          that make up the MAC value.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p mac_size is too small
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_compute(mbedtls_svc_key_id_t key,
+                             psa_algorithm_t alg,
+                             const uint8_t *input,
+                             size_t input_length,
+                             uint8_t *mac,
+                             size_t mac_size,
+                             size_t *mac_length);
+
+/** Calculate the MAC of a message and compare it with a reference value.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must allow the usage PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ * \param[in] input         Buffer containing the input message.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] mac          Buffer containing the expected MAC value.
+ * \param mac_length        Size of the \p mac buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected MAC is identical to the actual MAC of the input.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The MAC of the message was calculated successfully, but it
+ *         differs from the expected value.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify(mbedtls_svc_key_id_t key,
+                            psa_algorithm_t alg,
+                            const uint8_t *input,
+                            size_t input_length,
+                            const uint8_t *mac,
+                            size_t mac_length);
+
+/** The type of the state data structure for multipart MAC operations.
+ *
+ * Before calling any function on a MAC operation object, the application must
+ * initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_mac_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_mac_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_MAC_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_mac_operation_t operation = PSA_MAC_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_mac_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_mac_operation_t operation;
+ *   operation = psa_mac_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_mac_operation_s psa_mac_operation_t;
+
+/** \def PSA_MAC_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a MAC operation object of type
+ * #psa_mac_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_MAC_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a MAC operation object.
+ */
+static psa_mac_operation_t psa_mac_operation_init(void);
+
+/** Set up a multipart MAC calculation operation.
+ *
+ * This function sets up the calculation of the MAC
+ * (message authentication code) of a byte string.
+ * To verify the MAC of a message against an
+ * expected value, use psa_mac_verify_setup() instead.
+ *
+ * The sequence of operations to calculate a MAC is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_mac_operation_t, e.g. #PSA_MAC_OPERATION_INIT.
+ * -# Call psa_mac_sign_setup() to specify the algorithm and key.
+ * -# Call psa_mac_update() zero, one or more times, passing a fragment
+ *    of the message each time. The MAC that is calculated is the MAC
+ *    of the concatenation of these messages in order.
+ * -# At the end of the message, call psa_mac_sign_finish() to finish
+ *    calculating the MAC value and retrieve it.
+ *
+ * If an error occurs at any step after a call to psa_mac_sign_setup(), the
+ * operation will need to be reset by a call to psa_mac_abort(). The
+ * application may call psa_mac_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_mac_sign_setup(), the application must
+ * eventually terminate the operation through one of the following methods:
+ * - A successful call to psa_mac_sign_finish().
+ * - A call to psa_mac_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_mac_operation_t and not yet in use.
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must remain valid until the operation terminates.
+ *                          It must allow the usage PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_sign_setup(psa_mac_operation_t *operation,
+                                mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg);
+
+/** Set up a multipart MAC verification operation.
+ *
+ * This function sets up the verification of the MAC
+ * (message authentication code) of a byte string against an expected value.
+ *
+ * The sequence of operations to verify a MAC is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_mac_operation_t, e.g. #PSA_MAC_OPERATION_INIT.
+ * -# Call psa_mac_verify_setup() to specify the algorithm and key.
+ * -# Call psa_mac_update() zero, one or more times, passing a fragment
+ *    of the message each time. The MAC that is calculated is the MAC
+ *    of the concatenation of these messages in order.
+ * -# At the end of the message, call psa_mac_verify_finish() to finish
+ *    calculating the actual MAC of the message and verify it against
+ *    the expected value.
+ *
+ * If an error occurs at any step after a call to psa_mac_verify_setup(), the
+ * operation will need to be reset by a call to psa_mac_abort(). The
+ * application may call psa_mac_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_mac_verify_setup(), the application must
+ * eventually terminate the operation through one of the following methods:
+ * - A successful call to psa_mac_verify_finish().
+ * - A call to psa_mac_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_mac_operation_t and not yet in use.
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must remain valid until the operation terminates.
+ *                          It must allow the usage
+ *                          PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c key is not compatible with \c alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify_setup(psa_mac_operation_t *operation,
+                                  mbedtls_svc_key_id_t key,
+                                  psa_algorithm_t alg);
+
+/** Add a message fragment to a multipart MAC operation.
+ *
+ * The application must call psa_mac_sign_setup() or psa_mac_verify_setup()
+ * before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[in] input         Buffer containing the message fragment to add to
+ *                          the MAC calculation.
+ * \param input_length      Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_update(psa_mac_operation_t *operation,
+                            const uint8_t *input,
+                            size_t input_length);
+
+/** Finish the calculation of the MAC of a message.
+ *
+ * The application must call psa_mac_sign_setup() before calling this function.
+ * This function calculates the MAC of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_mac_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \warning Applications should not call this function if they expect
+ *          a specific value for the MAC. Call psa_mac_verify_finish() instead.
+ *          Beware that comparing integrity or authenticity data such as
+ *          MAC values with a function such as \c memcmp is risky
+ *          because the time taken by the comparison may leak information
+ *          about the MAC value which could allow an attacker to guess
+ *          a valid MAC and thereby bypass security controls.
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[out] mac          Buffer where the MAC value is to be written.
+ * \param mac_size          Size of the \p mac buffer in bytes.
+ * \param[out] mac_length   On success, the number of bytes
+ *                          that make up the MAC value. This is always
+ *                          #PSA_MAC_LENGTH(\c key_type, \c key_bits, \c alg)
+ *                          where \c key_type and \c key_bits are the type and
+ *                          bit-size respectively of the key and \c alg is the
+ *                          MAC algorithm that is calculated.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active mac sign
+ *         operation).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p mac buffer is too small. You can determine a
+ *         sufficient buffer size by calling PSA_MAC_LENGTH().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_sign_finish(psa_mac_operation_t *operation,
+                                 uint8_t *mac,
+                                 size_t mac_size,
+                                 size_t *mac_length);
+
+/** Finish the calculation of the MAC of a message and compare it with
+ * an expected value.
+ *
+ * The application must call psa_mac_verify_setup() before calling this function.
+ * This function calculates the MAC of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_mac_update(). It then
+ * compares the calculated MAC with the expected MAC passed as a
+ * parameter to this function.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual MAC and the expected MAC is performed
+ * in constant time.
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[in] mac           Buffer containing the expected MAC value.
+ * \param mac_length        Size of the \p mac buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected MAC is identical to the actual MAC of the message.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The MAC of the message was calculated successfully, but it
+ *         differs from the expected MAC.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active mac verify
+ *         operation).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify_finish(psa_mac_operation_t *operation,
+                                   const uint8_t *mac,
+                                   size_t mac_length);
+
+/** Abort a MAC operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_mac_sign_setup() or psa_mac_verify_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized by one of the methods described in #psa_mac_operation_t.
+ *
+ * In particular, calling psa_mac_abort() after the operation has been
+ * terminated by a call to psa_mac_abort(), psa_mac_sign_finish() or
+ * psa_mac_verify_finish() is safe and has no effect.
+ *
+ * \param[in,out] operation Initialized MAC operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_abort(psa_mac_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup cipher Symmetric ciphers
+ * @{
+ */
+
+/** Encrypt a message using a symmetric cipher.
+ *
+ * This function encrypts a message with a random IV (initialization
+ * vector). Use the multipart operation interface with a
+ * #psa_cipher_operation_t object to provide other forms of IV.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must allow the usage #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param[in] input             Buffer containing the message to encrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ *                              The output contains the IV followed by
+ *                              the ciphertext proper.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_encrypt(mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg,
+                                const uint8_t *input,
+                                size_t input_length,
+                                uint8_t *output,
+                                size_t output_size,
+                                size_t *output_length);
+
+/** Decrypt a message using a symmetric cipher.
+ *
+ * This function decrypts a message encrypted with a symmetric cipher.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param[in] input             Buffer containing the message to decrypt.
+ *                              This consists of the IV followed by the
+ *                              ciphertext proper.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the plaintext is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_decrypt(mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg,
+                                const uint8_t *input,
+                                size_t input_length,
+                                uint8_t *output,
+                                size_t output_size,
+                                size_t *output_length);
+
+/** The type of the state data structure for multipart cipher operations.
+ *
+ * Before calling any function on a cipher operation object, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_cipher_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_cipher_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_CIPHER_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_cipher_operation_t operation = PSA_CIPHER_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_cipher_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_cipher_operation_t operation;
+ *   operation = psa_cipher_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_cipher_operation_s psa_cipher_operation_t;
+
+/** \def PSA_CIPHER_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a cipher operation object of
+ * type #psa_cipher_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_CIPHER_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a cipher operation object.
+ */
+static psa_cipher_operation_t psa_cipher_operation_init(void);
+
+/** Set the key for a multipart symmetric encryption operation.
+ *
+ * The sequence of operations to encrypt a message with a symmetric cipher
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_cipher_operation_t, e.g.
+ *    #PSA_CIPHER_OPERATION_INIT.
+ * -# Call psa_cipher_encrypt_setup() to specify the algorithm and key.
+ * -# Call either psa_cipher_generate_iv() or psa_cipher_set_iv() to
+ *    generate or set the IV (initialization vector). You should use
+ *    psa_cipher_generate_iv() unless the protocol you are implementing
+ *    requires a specific IV value.
+ * -# Call psa_cipher_update() zero, one or more times, passing a fragment
+ *    of the message each time.
+ * -# Call psa_cipher_finish().
+ *
+ * If an error occurs at any step after a call to psa_cipher_encrypt_setup(),
+ * the operation will need to be reset by a call to psa_cipher_abort(). The
+ * application may call psa_cipher_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_cipher_encrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_cipher_finish().
+ * - A call to psa_cipher_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_cipher_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_encrypt_setup(psa_cipher_operation_t *operation,
+                                      mbedtls_svc_key_id_t key,
+                                      psa_algorithm_t alg);
+
+/** Set the key for a multipart symmetric decryption operation.
+ *
+ * The sequence of operations to decrypt a message with a symmetric cipher
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_cipher_operation_t, e.g.
+ *    #PSA_CIPHER_OPERATION_INIT.
+ * -# Call psa_cipher_decrypt_setup() to specify the algorithm and key.
+ * -# Call psa_cipher_set_iv() with the IV (initialization vector) for the
+ *    decryption. If the IV is prepended to the ciphertext, you can call
+ *    psa_cipher_update() on a buffer containing the IV followed by the
+ *    beginning of the message.
+ * -# Call psa_cipher_update() zero, one or more times, passing a fragment
+ *    of the message each time.
+ * -# Call psa_cipher_finish().
+ *
+ * If an error occurs at any step after a call to psa_cipher_decrypt_setup(),
+ * the operation will need to be reset by a call to psa_cipher_abort(). The
+ * application may call psa_cipher_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_cipher_decrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_cipher_finish().
+ * - A call to psa_cipher_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_cipher_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_decrypt_setup(psa_cipher_operation_t *operation,
+                                      mbedtls_svc_key_id_t key,
+                                      psa_algorithm_t alg);
+
+/** Generate an IV for a symmetric encryption operation.
+ *
+ * This function generates a random IV (initialization vector), nonce
+ * or initial counter value for the encryption operation as appropriate
+ * for the chosen algorithm, key type and key size.
+ *
+ * The application must call psa_cipher_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[out] iv               Buffer where the generated IV is to be written.
+ * \param iv_size               Size of the \p iv buffer in bytes.
+ * \param[out] iv_length        On success, the number of bytes of the
+ *                              generated IV.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with no IV set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p iv buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_generate_iv(psa_cipher_operation_t *operation,
+                                    uint8_t *iv,
+                                    size_t iv_size,
+                                    size_t *iv_length);
+
+/** Set the IV for a symmetric encryption or decryption operation.
+ *
+ * This function sets the IV (initialization vector), nonce
+ * or initial counter value for the encryption or decryption operation.
+ *
+ * The application must call psa_cipher_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \note When encrypting, applications should use psa_cipher_generate_iv()
+ * instead of this function, unless implementing a protocol that requires
+ * a non-random IV.
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[in] iv                Buffer containing the IV to use.
+ * \param iv_length             Size of the IV in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active cipher
+ *         encrypt operation, with no IV set).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size of \p iv is not acceptable for the chosen algorithm,
+ *         or the chosen algorithm does not use an IV.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_set_iv(psa_cipher_operation_t *operation,
+                               const uint8_t *iv,
+                               size_t iv_length);
+
+/** Encrypt or decrypt a message fragment in an active cipher operation.
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_cipher_encrypt_setup() or psa_cipher_decrypt_setup().
+ *    The choice of setup function determines whether this function
+ *    encrypts or decrypts its input.
+ * 2. If the algorithm requires an IV, call psa_cipher_generate_iv()
+ *    (recommended when encrypting) or psa_cipher_set_iv().
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[in] input             Buffer containing the message fragment to
+ *                              encrypt or decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with an IV set
+ *         if required for the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_update(psa_cipher_operation_t *operation,
+                               const uint8_t *input,
+                               size_t input_length,
+                               uint8_t *output,
+                               size_t output_size,
+                               size_t *output_length);
+
+/** Finish encrypting or decrypting a message in a cipher operation.
+ *
+ * The application must call psa_cipher_encrypt_setup() or
+ * psa_cipher_decrypt_setup() before calling this function. The choice
+ * of setup function determines whether this function encrypts or
+ * decrypts its input.
+ *
+ * This function finishes the encryption or decryption of the message
+ * formed by concatenating the inputs passed to preceding calls to
+ * psa_cipher_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input size passed to this operation is not valid for
+ *         this particular algorithm. For example, the algorithm is a based
+ *         on block cipher and requires a whole number of blocks, but the
+ *         total input size is not a multiple of the block size.
+ * \retval #PSA_ERROR_INVALID_PADDING
+ *         This is a decryption operation for an algorithm that includes
+ *         padding, and the ciphertext does not contain valid padding.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with an IV set
+ *         if required for the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_finish(psa_cipher_operation_t *operation,
+                               uint8_t *output,
+                               size_t output_size,
+                               size_t *output_length);
+
+/** Abort a cipher operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_cipher_encrypt_setup() or psa_cipher_decrypt_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized as described in #psa_cipher_operation_t.
+ *
+ * In particular, calling psa_cipher_abort() after the operation has been
+ * terminated by a call to psa_cipher_abort() or psa_cipher_finish()
+ * is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized cipher operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_abort(psa_cipher_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup aead Authenticated encryption with associated data (AEAD)
+ * @{
+ */
+
+/** Process an authenticated encryption operation.
+ *
+ * \param key                     Identifier of the key to use for the
+ *                                operation. It must allow the usage
+ *                                #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                     The AEAD algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param[in] nonce               Nonce or IV to use.
+ * \param nonce_length            Size of the \p nonce buffer in bytes.
+ * \param[in] additional_data     Additional data that will be authenticated
+ *                                but not encrypted.
+ * \param additional_data_length  Size of \p additional_data in bytes.
+ * \param[in] plaintext           Data that will be authenticated and
+ *                                encrypted.
+ * \param plaintext_length        Size of \p plaintext in bytes.
+ * \param[out] ciphertext         Output buffer for the authenticated and
+ *                                encrypted data. The additional data is not
+ *                                part of this output. For algorithms where the
+ *                                encrypted data and the authentication tag
+ *                                are defined as separate outputs, the
+ *                                authentication tag is appended to the
+ *                                encrypted data.
+ * \param ciphertext_size         Size of the \p ciphertext buffer in bytes.
+ *                                This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\c key_type,
+ *                                  \p alg, \p plaintext_length) where
+ *                                  \c key_type is the type of \p key.
+ *                                - #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p
+ *                                  plaintext_length) evaluates to the maximum
+ *                                  ciphertext size of any supported AEAD
+ *                                  encryption.
+ * \param[out] ciphertext_length  On success, the size of the output
+ *                                in the \p ciphertext buffer.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p ciphertext_size is too small.
+ *         #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\c key_type, \p alg,
+ *         \p plaintext_length) or
+ *         #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p plaintext_length) can be used to
+ *         determine the required buffer size.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_encrypt(mbedtls_svc_key_id_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *nonce,
+                              size_t nonce_length,
+                              const uint8_t *additional_data,
+                              size_t additional_data_length,
+                              const uint8_t *plaintext,
+                              size_t plaintext_length,
+                              uint8_t *ciphertext,
+                              size_t ciphertext_size,
+                              size_t *ciphertext_length);
+
+/** Process an authenticated decryption operation.
+ *
+ * \param key                     Identifier of the key to use for the
+ *                                operation. It must allow the usage
+ *                                #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                     The AEAD algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param[in] nonce               Nonce or IV to use.
+ * \param nonce_length            Size of the \p nonce buffer in bytes.
+ * \param[in] additional_data     Additional data that has been authenticated
+ *                                but not encrypted.
+ * \param additional_data_length  Size of \p additional_data in bytes.
+ * \param[in] ciphertext          Data that has been authenticated and
+ *                                encrypted. For algorithms where the
+ *                                encrypted data and the authentication tag
+ *                                are defined as separate inputs, the buffer
+ *                                must contain the encrypted data followed
+ *                                by the authentication tag.
+ * \param ciphertext_length       Size of \p ciphertext in bytes.
+ * \param[out] plaintext          Output buffer for the decrypted data.
+ * \param plaintext_size          Size of the \p plaintext buffer in bytes.
+ *                                This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\c key_type,
+ *                                  \p alg, \p ciphertext_length) where
+ *                                  \c key_type is the type of \p key.
+ *                                - #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p
+ *                                  ciphertext_length) evaluates to the maximum
+ *                                  plaintext size of any supported AEAD
+ *                                  decryption.
+ * \param[out] plaintext_length   On success, the size of the output
+ *                                in the \p plaintext buffer.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The ciphertext is not authentic.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p plaintext_size is too small.
+ *         #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\c key_type, \p alg,
+ *         \p ciphertext_length) or
+ *         #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p ciphertext_length) can be used
+ *         to determine the required buffer size.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_decrypt(mbedtls_svc_key_id_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *nonce,
+                              size_t nonce_length,
+                              const uint8_t *additional_data,
+                              size_t additional_data_length,
+                              const uint8_t *ciphertext,
+                              size_t ciphertext_length,
+                              uint8_t *plaintext,
+                              size_t plaintext_size,
+                              size_t *plaintext_length);
+
+/** The type of the state data structure for multipart AEAD operations.
+ *
+ * Before calling any function on an AEAD operation object, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_aead_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_aead_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_AEAD_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_aead_operation_t operation = PSA_AEAD_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_aead_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_aead_operation_t operation;
+ *   operation = psa_aead_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_aead_operation_s psa_aead_operation_t;
+
+/** \def PSA_AEAD_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for an AEAD operation object of
+ * type #psa_aead_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_AEAD_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for an AEAD operation object.
+ */
+static psa_aead_operation_t psa_aead_operation_init(void);
+
+/** Set the key for a multipart authenticated encryption operation.
+ *
+ * The sequence of operations to encrypt a message with authentication
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_aead_operation_t, e.g.
+ *    #PSA_AEAD_OPERATION_INIT.
+ * -# Call psa_aead_encrypt_setup() to specify the algorithm and key.
+ * -# If needed, call psa_aead_set_lengths() to specify the length of the
+ *    inputs to the subsequent calls to psa_aead_update_ad() and
+ *    psa_aead_update(). See the documentation of psa_aead_set_lengths()
+ *    for details.
+ * -# Call either psa_aead_generate_nonce() or psa_aead_set_nonce() to
+ *    generate or set the nonce. You should use
+ *    psa_aead_generate_nonce() unless the protocol you are implementing
+ *    requires a specific nonce value.
+ * -# Call psa_aead_update_ad() zero, one or more times, passing a fragment
+ *    of the non-encrypted additional authenticated data each time.
+ * -# Call psa_aead_update() zero, one or more times, passing a fragment
+ *    of the message to encrypt each time.
+ * -# Call psa_aead_finish().
+ *
+ * If an error occurs at any step after a call to psa_aead_encrypt_setup(),
+ * the operation will need to be reset by a call to psa_aead_abort(). The
+ * application may call psa_aead_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_aead_encrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_aead_finish().
+ * - A call to psa_aead_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_aead_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The AEAD algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_encrypt_setup(psa_aead_operation_t *operation,
+                                    mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg);
+
+/** Set the key for a multipart authenticated decryption operation.
+ *
+ * The sequence of operations to decrypt a message with authentication
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_aead_operation_t, e.g.
+ *    #PSA_AEAD_OPERATION_INIT.
+ * -# Call psa_aead_decrypt_setup() to specify the algorithm and key.
+ * -# If needed, call psa_aead_set_lengths() to specify the length of the
+ *    inputs to the subsequent calls to psa_aead_update_ad() and
+ *    psa_aead_update(). See the documentation of psa_aead_set_lengths()
+ *    for details.
+ * -# Call psa_aead_set_nonce() with the nonce for the decryption.
+ * -# Call psa_aead_update_ad() zero, one or more times, passing a fragment
+ *    of the non-encrypted additional authenticated data each time.
+ * -# Call psa_aead_update() zero, one or more times, passing a fragment
+ *    of the ciphertext to decrypt each time.
+ * -# Call psa_aead_verify().
+ *
+ * If an error occurs at any step after a call to psa_aead_decrypt_setup(),
+ * the operation will need to be reset by a call to psa_aead_abort(). The
+ * application may call psa_aead_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_aead_decrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_aead_verify().
+ * - A call to psa_aead_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_aead_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The AEAD algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_decrypt_setup(psa_aead_operation_t *operation,
+                                    mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg);
+
+/** Generate a random nonce for an authenticated encryption operation.
+ *
+ * This function generates a random nonce for the authenticated encryption
+ * operation with an appropriate size for the chosen algorithm, key type
+ * and key size.
+ *
+ * The application must call psa_aead_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] nonce            Buffer where the generated nonce is to be
+ *                              written.
+ * \param nonce_size            Size of the \p nonce buffer in bytes.
+ * \param[out] nonce_length     On success, the number of bytes of the
+ *                              generated nonce.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active aead encrypt
+ *         operation, with no nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p nonce buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_generate_nonce(psa_aead_operation_t *operation,
+                                     uint8_t *nonce,
+                                     size_t nonce_size,
+                                     size_t *nonce_length);
+
+/** Set the nonce for an authenticated encryption or decryption operation.
+ *
+ * This function sets the nonce for the authenticated
+ * encryption or decryption operation.
+ *
+ * The application must call psa_aead_encrypt_setup() or
+ * psa_aead_decrypt_setup() before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \note When encrypting, applications should use psa_aead_generate_nonce()
+ * instead of this function, unless implementing a protocol that requires
+ * a non-random IV.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] nonce             Buffer containing the nonce to use.
+ * \param nonce_length          Size of the nonce in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with no nonce
+ *         set).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size of \p nonce is not acceptable for the chosen algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_set_nonce(psa_aead_operation_t *operation,
+                                const uint8_t *nonce,
+                                size_t nonce_length);
+
+/** Declare the lengths of the message and additional data for AEAD.
+ *
+ * The application must call this function before calling
+ * psa_aead_update_ad() or psa_aead_update() if the algorithm for
+ * the operation requires it. If the algorithm does not require it,
+ * calling this function is optional, but if this function is called
+ * then the implementation must enforce the lengths.
+ *
+ * You may call this function before or after setting the nonce with
+ * psa_aead_set_nonce() or psa_aead_generate_nonce().
+ *
+ * - For #PSA_ALG_CCM, calling this function is required.
+ * - For the other AEAD algorithms defined in this specification, calling
+ *   this function is not required.
+ * - For vendor-defined algorithm, refer to the vendor documentation.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param ad_length             Size of the non-encrypted additional
+ *                              authenticated data in bytes.
+ * \param plaintext_length      Size of the plaintext to encrypt in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, and
+ *         psa_aead_update_ad() and psa_aead_update() must not have been
+ *         called yet).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         At least one of the lengths is not acceptable for the chosen
+ *         algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_set_lengths(psa_aead_operation_t *operation,
+                                  size_t ad_length,
+                                  size_t plaintext_length);
+
+/** Pass additional data to an active AEAD operation.
+ *
+ * Additional data is authenticated, but not encrypted.
+ *
+ * You may call this function multiple times to pass successive fragments
+ * of the additional data. You may not call this function after passing
+ * data to encrypt or decrypt with psa_aead_update().
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_aead_encrypt_setup() or psa_aead_decrypt_setup().
+ * 2. Set the nonce with psa_aead_generate_nonce() or psa_aead_set_nonce().
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \warning When decrypting, until psa_aead_verify() has returned #PSA_SUCCESS,
+ *          there is no guarantee that the input is valid. Therefore, until
+ *          you have called psa_aead_verify() and it has returned #PSA_SUCCESS,
+ *          treat the input as untrusted and prepare to undo any action that
+ *          depends on the input if psa_aead_verify() returns an error status.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] input             Buffer containing the fragment of
+ *                              additional data.
+ * \param input_length          Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, have a nonce
+ *         set, have lengths set if required by the algorithm, and
+ *         psa_aead_update() must not have been called yet).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input length overflows the additional data length that
+ *         was previously specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_update_ad(psa_aead_operation_t *operation,
+                                const uint8_t *input,
+                                size_t input_length);
+
+/** Encrypt or decrypt a message fragment in an active AEAD operation.
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_aead_encrypt_setup() or psa_aead_decrypt_setup().
+ *    The choice of setup function determines whether this function
+ *    encrypts or decrypts its input.
+ * 2. Set the nonce with psa_aead_generate_nonce() or psa_aead_set_nonce().
+ * 3. Call psa_aead_update_ad() to pass all the additional data.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \warning When decrypting, until psa_aead_verify() has returned #PSA_SUCCESS,
+ *          there is no guarantee that the input is valid. Therefore, until
+ *          you have called psa_aead_verify() and it has returned #PSA_SUCCESS:
+ *          - Do not use the output in any way other than storing it in a
+ *            confidential location. If you take any action that depends
+ *            on the tentative decrypted data, this action will need to be
+ *            undone if the input turns out not to be valid. Furthermore,
+ *            if an adversary can observe that this action took place
+ *            (for example through timing), they may be able to use this
+ *            fact as an oracle to decrypt any message encrypted with the
+ *            same key.
+ *          - In particular, do not copy the output anywhere but to a
+ *            memory or storage space that you have exclusive access to.
+ *
+ * This function does not require the input to be aligned to any
+ * particular block boundary. If the implementation can only process
+ * a whole block at a time, it must consume all the input provided, but
+ * it may delay the end of the corresponding output until a subsequent
+ * call to psa_aead_update(), psa_aead_finish() or psa_aead_verify()
+ * provides sufficient input. The amount of data that can be delayed
+ * in this way is bounded by #PSA_AEAD_UPDATE_OUTPUT_SIZE.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] input             Buffer containing the message fragment to
+ *                              encrypt or decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_UPDATE_OUTPUT_SIZE(\c key_type,
+ *                                  \c alg, \p input_length) where
+ *                                  \c key_type is the type of key and \c alg is
+ *                                  the algorithm that were used to set up the
+ *                                  operation.
+ *                                - #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p
+ *                                  input_length) evaluates to the maximum
+ *                                  output size of any supported AEAD
+ *                                  algorithm.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, have a nonce
+ *         set, and have lengths set if required by the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ *         #PSA_AEAD_UPDATE_OUTPUT_SIZE(\c key_type, \c alg, \p input_length) or
+ *         #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p input_length) can be used to
+ *         determine the required buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input length overflows the plaintext length that
+ *         was previously specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_update(psa_aead_operation_t *operation,
+                             const uint8_t *input,
+                             size_t input_length,
+                             uint8_t *output,
+                             size_t output_size,
+                             size_t *output_length);
+
+/** Finish encrypting a message in an AEAD operation.
+ *
+ * The operation must have been set up with psa_aead_encrypt_setup().
+ *
+ * This function finishes the authentication of the additional data
+ * formed by concatenating the inputs passed to preceding calls to
+ * psa_aead_update_ad() with the plaintext formed by concatenating the
+ * inputs passed to preceding calls to psa_aead_update().
+ *
+ * This function has two output buffers:
+ * - \p ciphertext contains trailing ciphertext that was buffered from
+ *   preceding calls to psa_aead_update().
+ * - \p tag contains the authentication tag.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] ciphertext       Buffer where the last part of the ciphertext
+ *                              is to be written.
+ * \param ciphertext_size       Size of the \p ciphertext buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - A sufficient output size is
+ *                                #PSA_AEAD_FINISH_OUTPUT_SIZE(\c key_type,
+ *                                \c alg) where \c key_type is the type of key
+ *                                and \c alg is the algorithm that were used to
+ *                                set up the operation.
+ *                              - #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE evaluates to
+ *                                the maximum output size of any supported AEAD
+ *                                algorithm.
+ * \param[out] ciphertext_length On success, the number of bytes of
+ *                              returned ciphertext.
+ * \param[out] tag              Buffer where the authentication tag is
+ *                              to be written.
+ * \param tag_size              Size of the \p tag buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - The exact tag size is #PSA_AEAD_TAG_LENGTH(\c
+ *                                key_type, \c key_bits, \c alg) where
+ *                                \c key_type and \c key_bits are the type and
+ *                                bit-size of the key, and \c alg is the
+ *                                algorithm that were used in the call to
+ *                                psa_aead_encrypt_setup().
+ *                              - #PSA_AEAD_TAG_MAX_SIZE evaluates to the
+ *                                maximum tag size of any supported AEAD
+ *                                algorithm.
+ * \param[out] tag_length       On success, the number of bytes
+ *                              that make up the returned tag.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active encryption
+ *         operation with a nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p ciphertext or \p tag buffer is too small.
+ *         #PSA_AEAD_FINISH_OUTPUT_SIZE(\c key_type, \c alg) or
+ *         #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE can be used to determine the
+ *         required \p ciphertext buffer size. #PSA_AEAD_TAG_LENGTH(\c key_type,
+ *         \c key_bits, \c alg) or #PSA_AEAD_TAG_MAX_SIZE can be used to
+ *         determine the required \p tag buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update() so far is
+ *         less than the plaintext length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_finish(psa_aead_operation_t *operation,
+                             uint8_t *ciphertext,
+                             size_t ciphertext_size,
+                             size_t *ciphertext_length,
+                             uint8_t *tag,
+                             size_t tag_size,
+                             size_t *tag_length);
+
+/** Finish authenticating and decrypting a message in an AEAD operation.
+ *
+ * The operation must have been set up with psa_aead_decrypt_setup().
+ *
+ * This function finishes the authenticated decryption of the message
+ * components:
+ *
+ * -  The additional data consisting of the concatenation of the inputs
+ *    passed to preceding calls to psa_aead_update_ad().
+ * -  The ciphertext consisting of the concatenation of the inputs passed to
+ *    preceding calls to psa_aead_update().
+ * -  The tag passed to this function call.
+ *
+ * If the authentication tag is correct, this function outputs any remaining
+ * plaintext and reports success. If the authentication tag is not correct,
+ * this function returns #PSA_ERROR_INVALID_SIGNATURE.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual tag and the expected tag is performed
+ * in constant time.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] plaintext        Buffer where the last part of the plaintext
+ *                              is to be written. This is the remaining data
+ *                              from previous calls to psa_aead_update()
+ *                              that could not be processed until the end
+ *                              of the input.
+ * \param plaintext_size        Size of the \p plaintext buffer in bytes.
+ *                              This must be appropriate for the selected algorithm and key:
+ *                              - A sufficient output size is
+ *                                #PSA_AEAD_VERIFY_OUTPUT_SIZE(\c key_type,
+ *                                \c alg) where \c key_type is the type of key
+ *                                and \c alg is the algorithm that were used to
+ *                                set up the operation.
+ *                              - #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE evaluates to
+ *                                the maximum output size of any supported AEAD
+ *                                algorithm.
+ * \param[out] plaintext_length On success, the number of bytes of
+ *                              returned plaintext.
+ * \param[in] tag               Buffer containing the authentication tag.
+ * \param tag_length            Size of the \p tag buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculations were successful, but the authentication tag is
+ *         not correct.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active decryption
+ *         operation with a nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p plaintext buffer is too small.
+ *         #PSA_AEAD_VERIFY_OUTPUT_SIZE(\c key_type, \c alg) or
+ *         #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE can be used to determine the
+ *         required buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update() so far is
+ *         less than the plaintext length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_verify(psa_aead_operation_t *operation,
+                             uint8_t *plaintext,
+                             size_t plaintext_size,
+                             size_t *plaintext_length,
+                             const uint8_t *tag,
+                             size_t tag_length);
+
+/** Abort an AEAD operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_aead_encrypt_setup() or psa_aead_decrypt_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized as described in #psa_aead_operation_t.
+ *
+ * In particular, calling psa_aead_abort() after the operation has been
+ * terminated by a call to psa_aead_abort(), psa_aead_finish() or
+ * psa_aead_verify() is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized AEAD operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_abort(psa_aead_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup asymmetric Asymmetric cryptography
+ * @{
+ */
+
+/**
+ * \brief Sign a message with a private key. For hash-and-sign algorithms,
+ *        this includes the hashing step.
+ *
+ * \note To perform a multi-part hash-and-sign signature algorithm, first use
+ *       a multi-part hash operation and then pass the resulting hash to
+ *       psa_sign_hash(). PSA_ALG_GET_HASH(\p alg) can be used to determine the
+ *       hash algorithm to use.
+ *
+ * \param[in]  key              Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. The key must
+ *                              allow the usage #PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param[in]  alg              An asymmetric signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_MESSAGE(\p alg)
+ *                              is true), that is compatible with the type of
+ *                              \p key.
+ * \param[in]  input            The input message to sign.
+ * \param[in]  input_length     Size of the \p input buffer in bytes.
+ * \param[out] signature        Buffer where the signature is to be written.
+ * \param[in]  signature_size   Size of the \p signature buffer in bytes. This
+ *                              must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - The required signature size is
+ *                                #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *                                where \c key_type and \c key_bits are the type and
+ *                                bit-size respectively of key.
+ *                              - #PSA_SIGNATURE_MAX_SIZE evaluates to the
+ *                                maximum signature size of any supported
+ *                                signature algorithm.
+ * \param[out] signature_length On success, the number of bytes that make up
+ *                              the returned signature value.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_SIGN_MESSAGE flag,
+ *         or it does not permit the requested algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p signature buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_sign_message( mbedtls_svc_key_id_t key,
+                               psa_algorithm_t alg,
+                               const uint8_t * input,
+                               size_t input_length,
+                               uint8_t * signature,
+                               size_t signature_size,
+                               size_t * signature_length );
+
+/** \brief Verify the signature of a message with a public key, using
+ *         a hash-and-sign verification algorithm.
+ *
+ * \note To perform a multi-part hash-and-sign signature verification
+ *       algorithm, first use a multi-part hash operation to hash the message
+ *       and then pass the resulting hash to psa_verify_hash().
+ *       PSA_ALG_GET_HASH(\p alg) can be used to determine the hash algorithm
+ *       to use.
+ *
+ * \param[in]  key              Identifier of the key to use for the operation.
+ *                              It must be a public key or an asymmetric key
+ *                              pair. The key must allow the usage
+ *                              #PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param[in]  alg              An asymmetric signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_MESSAGE(\p alg)
+ *                              is true), that is compatible with the type of
+ *                              \p key.
+ * \param[in]  input            The message whose signature is to be verified.
+ * \param[in]  input_length     Size of the \p input buffer in bytes.
+ * \param[out] signature        Buffer containing the signature to verify.
+ * \param[in]  signature_length Size of the \p signature buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_SIGN_MESSAGE flag,
+ *         or it does not permit the requested algorithm.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculation was performed successfully, but the passed signature
+ *         is not a valid signature.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_verify_message( mbedtls_svc_key_id_t key,
+                                 psa_algorithm_t alg,
+                                 const uint8_t * input,
+                                 size_t input_length,
+                                 const uint8_t * signature,
+                                 size_t signature_length );
+
+/**
+ * \brief Sign a hash or short message with a private key.
+ *
+ * Note that to perform a hash-and-sign signature algorithm, you must
+ * first calculate the hash by calling psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(), or alternatively by calling psa_hash_compute().
+ * Then pass the resulting hash as the \p hash
+ * parameter to this function. You can use #PSA_ALG_SIGN_GET_HASH(\p alg)
+ * to determine the hash algorithm to use.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. The key must
+ *                              allow the usage #PSA_KEY_USAGE_SIGN_HASH.
+ * \param alg                   A signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_HASH(\p alg)
+ *                              is true), that is compatible with
+ *                              the type of \p key.
+ * \param[in] hash              The hash or message to sign.
+ * \param hash_length           Size of the \p hash buffer in bytes.
+ * \param[out] signature        Buffer where the signature is to be written.
+ * \param signature_size        Size of the \p signature buffer in bytes.
+ * \param[out] signature_length On success, the number of bytes
+ *                              that make up the returned signature value.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p signature buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_sign_hash(mbedtls_svc_key_id_t key,
+                           psa_algorithm_t alg,
+                           const uint8_t *hash,
+                           size_t hash_length,
+                           uint8_t *signature,
+                           size_t signature_size,
+                           size_t *signature_length);
+
+/**
+ * \brief Verify the signature of a hash or short message using a public key.
+ *
+ * Note that to perform a hash-and-sign signature algorithm, you must
+ * first calculate the hash by calling psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(), or alternatively by calling psa_hash_compute().
+ * Then pass the resulting hash as the \p hash
+ * parameter to this function. You can use #PSA_ALG_SIGN_GET_HASH(\p alg)
+ * to determine the hash algorithm to use.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must be a public key or an asymmetric key pair. The
+ *                          key must allow the usage
+ *                          #PSA_KEY_USAGE_VERIFY_HASH.
+ * \param alg               A signature algorithm (PSA_ALG_XXX
+ *                          value such that #PSA_ALG_IS_SIGN_HASH(\p alg)
+ *                          is true), that is compatible with
+ *                          the type of \p key.
+ * \param[in] hash          The hash or message whose signature is to be
+ *                          verified.
+ * \param hash_length       Size of the \p hash buffer in bytes.
+ * \param[in] signature     Buffer containing the signature to verify.
+ * \param signature_length  Size of the \p signature buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The signature is valid.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculation was perfomed successfully, but the passed
+ *         signature is not a valid signature.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_verify_hash(mbedtls_svc_key_id_t key,
+                             psa_algorithm_t alg,
+                             const uint8_t *hash,
+                             size_t hash_length,
+                             const uint8_t *signature,
+                             size_t signature_length);
+
+/**
+ * \brief Encrypt a short message with a public key.
+ *
+ * \param key                   Identifer of the key to use for the operation.
+ *                              It must be a public key or an asymmetric key
+ *                              pair. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   An asymmetric encryption algorithm that is
+ *                              compatible with the type of \p key.
+ * \param[in] input             The message to encrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[in] salt              A salt or label, if supported by the
+ *                              encryption algorithm.
+ *                              If the algorithm does not support a
+ *                              salt, pass \c NULL.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass \c NULL.
+ *
+ *                              - For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                                supported.
+ * \param salt_length           Size of the \p salt buffer in bytes.
+ *                              If \p salt is \c NULL, pass 0.
+ * \param[out] output           Buffer where the encrypted message is to
+ *                              be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_asymmetric_encrypt(mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg,
+                                    const uint8_t *input,
+                                    size_t input_length,
+                                    const uint8_t *salt,
+                                    size_t salt_length,
+                                    uint8_t *output,
+                                    size_t output_size,
+                                    size_t *output_length);
+
+/**
+ * \brief Decrypt a short message with a private key.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. It must
+ *                              allow the usage #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   An asymmetric encryption algorithm that is
+ *                              compatible with the type of \p key.
+ * \param[in] input             The message to decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[in] salt              A salt or label, if supported by the
+ *                              encryption algorithm.
+ *                              If the algorithm does not support a
+ *                              salt, pass \c NULL.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass \c NULL.
+ *
+ *                              - For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                                supported.
+ * \param salt_length           Size of the \p salt buffer in bytes.
+ *                              If \p salt is \c NULL, pass 0.
+ * \param[out] output           Buffer where the decrypted message is to
+ *                              be written.
+ * \param output_size           Size of the \c output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_INVALID_PADDING
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_asymmetric_decrypt(mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg,
+                                    const uint8_t *input,
+                                    size_t input_length,
+                                    const uint8_t *salt,
+                                    size_t salt_length,
+                                    uint8_t *output,
+                                    size_t output_size,
+                                    size_t *output_length);
+
+/**@}*/
+
+/** \defgroup key_derivation Key derivation and pseudorandom generation
+ * @{
+ */
+
+/** The type of the state data structure for key derivation operations.
+ *
+ * Before calling any function on a key derivation operation object, the
+ * application must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_KEY_DERIVATION_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation = PSA_KEY_DERIVATION_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_key_derivation_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation;
+ *   operation = psa_key_derivation_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation.
+ */
+typedef struct psa_key_derivation_s psa_key_derivation_operation_t;
+
+/** \def PSA_KEY_DERIVATION_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a key derivation operation
+ * object of type #psa_key_derivation_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_KEY_DERIVATION_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a key derivation operation object.
+ */
+static psa_key_derivation_operation_t psa_key_derivation_operation_init(void);
+
+/** Set up a key derivation operation.
+ *
+ * A key derivation algorithm takes some inputs and uses them to generate
+ * a byte stream in a deterministic way.
+ * This byte stream can be used to produce keys and other
+ * cryptographic material.
+ *
+ * To derive a key:
+ * -# Start with an initialized object of type #psa_key_derivation_operation_t.
+ * -# Call psa_key_derivation_setup() to select the algorithm.
+ * -# Provide the inputs for the key derivation by calling
+ *    psa_key_derivation_input_bytes() or psa_key_derivation_input_key()
+ *    as appropriate. Which inputs are needed, in what order, and whether
+ *    they may be keys and if so of what type depends on the algorithm.
+ * -# Optionally set the operation's maximum capacity with
+ *    psa_key_derivation_set_capacity(). You may do this before, in the middle
+ *    of or after providing inputs. For some algorithms, this step is mandatory
+ *    because the output depends on the maximum capacity.
+ * -# To derive a key, call psa_key_derivation_output_key().
+ *    To derive a byte string for a different purpose, call
+ *    psa_key_derivation_output_bytes().
+ *    Successive calls to these functions use successive output bytes
+ *    calculated by the key derivation algorithm.
+ * -# Clean up the key derivation operation object with
+ *    psa_key_derivation_abort().
+ *
+ * If this function returns an error, the key derivation operation object is
+ * not changed.
+ *
+ * If an error occurs at any step after a call to psa_key_derivation_setup(),
+ * the operation will need to be reset by a call to psa_key_derivation_abort().
+ *
+ * Implementations must reject an attempt to derive a key of size 0.
+ *
+ * \param[in,out] operation       The key derivation operation object
+ *                                to set up. It must
+ *                                have been initialized but not set up yet.
+ * \param alg                     The key derivation algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_KEY_DERIVATION(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c alg is not a key derivation algorithm.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a key derivation algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_setup(
+    psa_key_derivation_operation_t *operation,
+    psa_algorithm_t alg);
+
+/** Retrieve the current capacity of a key derivation operation.
+ *
+ * The capacity of a key derivation is the maximum number of bytes that it can
+ * return. When you get *N* bytes of output from a key derivation operation,
+ * this reduces its capacity by *N*.
+ *
+ * \param[in] operation     The operation to query.
+ * \param[out] capacity     On success, the capacity of the operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_get_capacity(
+    const psa_key_derivation_operation_t *operation,
+    size_t *capacity);
+
+/** Set the maximum capacity of a key derivation operation.
+ *
+ * The capacity of a key derivation operation is the maximum number of bytes
+ * that the key derivation operation can return from this point onwards.
+ *
+ * \param[in,out] operation The key derivation operation object to modify.
+ * \param capacity          The new capacity of the operation.
+ *                          It must be less or equal to the operation's
+ *                          current capacity.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p capacity is larger than the operation's current capacity.
+ *         In this case, the operation object remains valid and its capacity
+ *         remains unchanged.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_set_capacity(
+    psa_key_derivation_operation_t *operation,
+    size_t capacity);
+
+/** Use the maximum possible capacity for a key derivation operation.
+ *
+ * Use this value as the capacity argument when setting up a key derivation
+ * to indicate that the operation should have the maximum possible capacity.
+ * The value of the maximum possible capacity depends on the key derivation
+ * algorithm.
+ */
+#define PSA_KEY_DERIVATION_UNLIMITED_CAPACITY ((size_t)(-1))
+
+/** Provide an input for key derivation or key agreement.
+ *
+ * Which inputs are required and in what order depends on the algorithm.
+ * Refer to the documentation of each key derivation or key agreement
+ * algorithm for information.
+ *
+ * This function passes direct inputs, which is usually correct for
+ * non-secret inputs. To pass a secret input, which should be in a key
+ * object, call psa_key_derivation_input_key() instead of this function.
+ * Refer to the documentation of individual step types
+ * (`PSA_KEY_DERIVATION_INPUT_xxx` values of type ::psa_key_derivation_step_t)
+ * for more information.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() and must not
+ *                                have produced any output yet.
+ * \param step                    Which step the input data is for.
+ * \param[in] data                Input data to use.
+ * \param data_length             Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step is not compatible with the operation's algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow direct inputs.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this input \p step.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_input_bytes(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    const uint8_t *data,
+    size_t data_length);
+
+/** Provide an input for key derivation in the form of a key.
+ *
+ * Which inputs are required and in what order depends on the algorithm.
+ * Refer to the documentation of each key derivation or key agreement
+ * algorithm for information.
+ *
+ * This function obtains input from a key object, which is usually correct for
+ * secret inputs or for non-secret personalization strings kept in the key
+ * store. To pass a non-secret parameter which is not in the key store,
+ * call psa_key_derivation_input_bytes() instead of this function.
+ * Refer to the documentation of individual step types
+ * (`PSA_KEY_DERIVATION_INPUT_xxx` values of type ::psa_key_derivation_step_t)
+ * for more information.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() and must not
+ *                                have produced any output yet.
+ * \param step                    Which step the input data is for.
+ * \param key                     Identifier of the key. It must have an
+ *                                appropriate type for step and must allow the
+ *                                usage #PSA_KEY_USAGE_DERIVE.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step is not compatible with the operation's algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow key inputs of the given type
+ *         or does not allow key inputs at all.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this input \p step.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_input_key(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    mbedtls_svc_key_id_t key);
+
+/** Perform a key agreement and use the shared secret as input to a key
+ * derivation.
+ *
+ * A key agreement algorithm takes two inputs: a private key \p private_key
+ * a public key \p peer_key.
+ * The result of this function is passed as input to a key derivation.
+ * The output of this key derivation can be extracted by reading from the
+ * resulting operation to produce keys and other cryptographic material.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() with a
+ *                                key agreement and derivation algorithm
+ *                                \c alg (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_KEY_AGREEMENT(\c alg) is true
+ *                                and #PSA_ALG_IS_RAW_KEY_AGREEMENT(\c alg)
+ *                                is false).
+ *                                The operation must be ready for an
+ *                                input of the type given by \p step.
+ * \param step                    Which step the input data is for.
+ * \param private_key             Identifier of the private key to use. It must
+ *                                allow the usage #PSA_KEY_USAGE_DERIVE.
+ * \param[in] peer_key      Public key of the peer. The peer key must be in the
+ *                          same format that psa_import_key() accepts for the
+ *                          public key type corresponding to the type of
+ *                          private_key. That is, this function performs the
+ *                          equivalent of
+ *                          #psa_import_key(...,
+ *                          `peer_key`, `peer_key_length`) where
+ *                          with key attributes indicating the public key
+ *                          type corresponding to the type of `private_key`.
+ *                          For example, for EC keys, this means that peer_key
+ *                          is interpreted as a point on the curve that the
+ *                          private key is on. The standard formats for public
+ *                          keys are documented in the documentation of
+ *                          psa_export_public_key().
+ * \param peer_key_length         Size of \p peer_key in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this key agreement \p step.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c private_key is not compatible with \c alg,
+ *         or \p peer_key is not valid for \c alg or not compatible with
+ *         \c private_key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a key derivation algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow an input resulting from a key agreement.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_key_agreement(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    mbedtls_svc_key_id_t private_key,
+    const uint8_t *peer_key,
+    size_t peer_key_length);
+
+/** Read some data from a key derivation operation.
+ *
+ * This function calculates output bytes from a key derivation algorithm and
+ * return those bytes.
+ * If you view the key derivation's output as a stream of bytes, this
+ * function destructively reads the requested number of bytes from the
+ * stream.
+ * The operation's capacity decreases by the number of bytes read.
+ *
+ * If this function returns an error status other than
+ * #PSA_ERROR_INSUFFICIENT_DATA, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation The key derivation operation object to read from.
+ * \param[out] output       Buffer where the output will be written.
+ * \param output_length     Number of bytes to output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INSUFFICIENT_DATA
+ *                          The operation's capacity was less than
+ *                          \p output_length bytes. Note that in this case,
+ *                          no output is written to the output buffer.
+ *                          The operation's capacity is set to 0, thus
+ *                          subsequent calls to this function will not
+ *                          succeed, even with a smaller output buffer.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active and completed
+ *         all required input steps).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_output_bytes(
+    psa_key_derivation_operation_t *operation,
+    uint8_t *output,
+    size_t output_length);
+
+/** Derive a key from an ongoing key derivation operation.
+ *
+ * This function calculates output bytes from a key derivation algorithm
+ * and uses those bytes to generate a key deterministically.
+ * The key's location, usage policy, type and size are taken from
+ * \p attributes.
+ *
+ * If you view the key derivation's output as a stream of bytes, this
+ * function destructively reads as many bytes as required from the
+ * stream.
+ * The operation's capacity decreases by the number of bytes read.
+ *
+ * If this function returns an error status other than
+ * #PSA_ERROR_INSUFFICIENT_DATA, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * How much output is produced and consumed from the operation, and how
+ * the key is derived, depends on the key type and on the key size
+ * (denoted \c bits below):
+ *
+ * - For key types for which the key is an arbitrary sequence of bytes
+ *   of a given size, this function is functionally equivalent to
+ *   calling #psa_key_derivation_output_bytes
+ *   and passing the resulting output to #psa_import_key.
+ *   However, this function has a security benefit:
+ *   if the implementation provides an isolation boundary then
+ *   the key material is not exposed outside the isolation boundary.
+ *   As a consequence, for these key types, this function always consumes
+ *   exactly (\c bits / 8) bytes from the operation.
+ *   The following key types defined in this specification follow this scheme:
+ *
+ *     - #PSA_KEY_TYPE_AES;
+ *     - #PSA_KEY_TYPE_ARC4;
+ *     - #PSA_KEY_TYPE_ARIA;
+ *     - #PSA_KEY_TYPE_CAMELLIA;
+ *     - #PSA_KEY_TYPE_DERIVE;
+ *     - #PSA_KEY_TYPE_HMAC.
+ *
+ * - For ECC keys on a Montgomery elliptic curve
+ *   (#PSA_KEY_TYPE_ECC_KEY_PAIR(\c curve) where \c curve designates a
+ *   Montgomery curve), this function always draws a byte string whose
+ *   length is determined by the curve, and sets the mandatory bits
+ *   accordingly. That is:
+ *
+ *     - Curve25519 (#PSA_ECC_FAMILY_MONTGOMERY, 255 bits): draw a 32-byte
+ *       string and process it as specified in RFC 7748 &sect;5.
+ *     - Curve448 (#PSA_ECC_FAMILY_MONTGOMERY, 448 bits): draw a 56-byte
+ *       string and process it as specified in RFC 7748 &sect;5.
+ *
+ * - For key types for which the key is represented by a single sequence of
+ *   \c bits bits with constraints as to which bit sequences are acceptable,
+ *   this function draws a byte string of length (\c bits / 8) bytes rounded
+ *   up to the nearest whole number of bytes. If the resulting byte string
+ *   is acceptable, it becomes the key, otherwise the drawn bytes are discarded.
+ *   This process is repeated until an acceptable byte string is drawn.
+ *   The byte string drawn from the operation is interpreted as specified
+ *   for the output produced by psa_export_key().
+ *   The following key types defined in this specification follow this scheme:
+ *
+ *     - #PSA_KEY_TYPE_DES.
+ *       Force-set the parity bits, but discard forbidden weak keys.
+ *       For 2-key and 3-key triple-DES, the three keys are generated
+ *       successively (for example, for 3-key triple-DES,
+ *       if the first 8 bytes specify a weak key and the next 8 bytes do not,
+ *       discard the first 8 bytes, use the next 8 bytes as the first key,
+ *       and continue reading output from the operation to derive the other
+ *       two keys).
+ *     - Finite-field Diffie-Hellman keys (#PSA_KEY_TYPE_DH_KEY_PAIR(\c group)
+ *       where \c group designates any Diffie-Hellman group) and
+ *       ECC keys on a Weierstrass elliptic curve
+ *       (#PSA_KEY_TYPE_ECC_KEY_PAIR(\c curve) where \c curve designates a
+ *       Weierstrass curve).
+ *       For these key types, interpret the byte string as integer
+ *       in big-endian order. Discard it if it is not in the range
+ *       [0, *N* - 2] where *N* is the boundary of the private key domain
+ *       (the prime *p* for Diffie-Hellman, the subprime *q* for DSA,
+ *       or the order of the curve's base point for ECC).
+ *       Add 1 to the resulting integer and use this as the private key *x*.
+ *       This method allows compliance to NIST standards, specifically
+ *       the methods titled "key-pair generation by testing candidates"
+ *       in NIST SP 800-56A &sect;5.6.1.1.4 for Diffie-Hellman,
+ *       in FIPS 186-4 &sect;B.1.2 for DSA, and
+ *       in NIST SP 800-56A &sect;5.6.1.2.2 or
+ *       FIPS 186-4 &sect;B.4.2 for elliptic curve keys.
+ *
+ * - For other key types, including #PSA_KEY_TYPE_RSA_KEY_PAIR,
+ *   the way in which the operation output is consumed is
+ *   implementation-defined.
+ *
+ * In all cases, the data that is read is discarded from the operation.
+ * The operation's capacity is decreased by the number of bytes read.
+ *
+ * For algorithms that take an input step #PSA_KEY_DERIVATION_INPUT_SECRET,
+ * the input to that step must be provided with psa_key_derivation_input_key().
+ * Future versions of this specification may include additional restrictions
+ * on the derived key based on the attributes and strength of the secret key.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ * \param[in,out] operation The key derivation operation object to read from.
+ * \param[out] key          On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_INSUFFICIENT_DATA
+ *         There was not enough data to create the desired key.
+ *         Note that in this case, no output is written to the output buffer.
+ *         The operation's capacity is set to 0, thus subsequent calls to
+ *         this function will not succeed, even with a smaller output buffer.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The key type or key size is not supported, either by the
+ *         implementation in general or in this particular location.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The provided key attributes are not valid for the operation.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The #PSA_KEY_DERIVATION_INPUT_SECRET input was not provided through
+ *         a key.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active and completed
+ *         all required input steps).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_output_key(
+    const psa_key_attributes_t *attributes,
+    psa_key_derivation_operation_t *operation,
+    mbedtls_svc_key_id_t *key);
+
+/** Abort a key derivation operation.
+ *
+ * Aborting an operation frees all associated resources except for the \c
+ * operation structure itself. Once aborted, the operation object can be reused
+ * for another operation by calling psa_key_derivation_setup() again.
+ *
+ * This function may be called at any time after the operation
+ * object has been initialized as described in #psa_key_derivation_operation_t.
+ *
+ * In particular, it is valid to call psa_key_derivation_abort() twice, or to
+ * call psa_key_derivation_abort() on an operation that has not been set up.
+ *
+ * \param[in,out] operation    The operation to abort.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_abort(
+    psa_key_derivation_operation_t *operation);
+
+/** Perform a key agreement and return the raw shared secret.
+ *
+ * \warning The raw result of a key agreement algorithm such as finite-field
+ * Diffie-Hellman or elliptic curve Diffie-Hellman has biases and should
+ * not be used directly as key material. It should instead be passed as
+ * input to a key derivation algorithm. To chain a key agreement with
+ * a key derivation, use psa_key_derivation_key_agreement() and other
+ * functions from the key derivation interface.
+ *
+ * \param alg                     The key agreement algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_RAW_KEY_AGREEMENT(\p alg)
+ *                                is true).
+ * \param private_key             Identifier of the private key to use. It must
+ *                                allow the usage #PSA_KEY_USAGE_DERIVE.
+ * \param[in] peer_key            Public key of the peer. It must be
+ *                                in the same format that psa_import_key()
+ *                                accepts. The standard formats for public
+ *                                keys are documented in the documentation
+ *                                of psa_export_public_key().
+ * \param peer_key_length         Size of \p peer_key in bytes.
+ * \param[out] output             Buffer where the decrypted message is to
+ *                                be written.
+ * \param output_size             Size of the \c output buffer in bytes.
+ * \param[out] output_length      On success, the number of bytes
+ *                                that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p alg is not a key agreement algorithm
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p private_key is not compatible with \p alg,
+ *         or \p peer_key is not valid for \p alg or not compatible with
+ *         \p private_key.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p output_size is too small
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not a supported key agreement algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_raw_key_agreement(psa_algorithm_t alg,
+                                   mbedtls_svc_key_id_t private_key,
+                                   const uint8_t *peer_key,
+                                   size_t peer_key_length,
+                                   uint8_t *output,
+                                   size_t output_size,
+                                   size_t *output_length);
+
+/**@}*/
+
+/** \defgroup random Random generation
+ * @{
+ */
+
+/**
+ * \brief Generate random bytes.
+ *
+ * \warning This function **can** fail! Callers MUST check the return status
+ *          and MUST NOT use the content of the output buffer if the return
+ *          status is not #PSA_SUCCESS.
+ *
+ * \note    To generate a key, use psa_generate_key() instead.
+ *
+ * \param[out] output       Output buffer for the generated data.
+ * \param output_size       Number of bytes to generate and output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_generate_random(uint8_t *output,
+                                 size_t output_size);
+
+/**
+ * \brief Generate a key or key pair.
+ *
+ * The key is generated randomly.
+ * Its location, usage policy, type and size are taken from \p attributes.
+ *
+ * Implementations must reject an attempt to generate a key of size 0.
+ *
+ * The following type-specific considerations apply:
+ * - For RSA keys (#PSA_KEY_TYPE_RSA_KEY_PAIR),
+ *   the public exponent is 65537.
+ *   The modulus is a product of two probabilistic primes
+ *   between 2^{n-1} and 2^n where n is the bit size specified in the
+ *   attributes.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ * \param[out] key          On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_generate_key(const psa_key_attributes_t *attributes,
+                              mbedtls_svc_key_id_t *key);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/* The file "crypto_sizes.h" contains definitions for size calculation
+ * macros whose definitions are implementation-specific. */
+#include "crypto_sizes.h"
+
+/* The file "crypto_struct.h" contains definitions for
+ * implementation-specific structs that are declared above. */
+#include "crypto_struct.h"
+
+/* The file "crypto_extra.h" contains vendor-specific definitions. This
+ * can include vendor-defined algorithms, extra functions, etc. */
+#include "crypto_extra.h"
+
+#endif /* PSA_CRYPTO_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h
new file mode 100644
index 00000000000..a875b237041
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h
@@ -0,0 +1,79 @@
+/*
+ *  Context structure declaration of the Mbed TLS software-based PSA drivers
+ *  called through the PSA Crypto driver dispatch layer.
+ *  This file contains the context structures of those algorithms which need to
+ *  rely on other algorithms, i.e. are 'composite' algorithms.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the Mbed TLS software-based PSA drivers. The
+ * definition of these objects are then used by crypto_struct.h to define the
+ * implementation-defined types of PSA multi-part state objects.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_BUILTIN_COMPOSITES_H
+#define PSA_CRYPTO_BUILTIN_COMPOSITES_H
+
+#include <psa/crypto_driver_common.h>
+
+/*
+ * MAC multi-part operation definitions.
+ */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_CMAC) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC)
+#define MBEDTLS_PSA_BUILTIN_MAC
+#endif
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+typedef struct
+{
+    /** The HMAC algorithm in use */
+    psa_algorithm_t alg;
+    /** The hash context. */
+    struct psa_hash_operation_s hash_ctx;
+    /** The HMAC part of the context. */
+    uint8_t opad[PSA_HMAC_MAX_HASH_BLOCK_SIZE];
+} mbedtls_psa_hmac_operation_t;
+
+#define MBEDTLS_PSA_HMAC_OPERATION_INIT {0, PSA_HASH_OPERATION_INIT, {0}}
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HMAC */
+
+#include "mbedtls/cmac.h"
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    union
+    {
+        unsigned dummy; /* Make the union non-empty even with no supported algorithms. */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+        mbedtls_psa_hmac_operation_t hmac;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HMAC */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_CMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+        mbedtls_cipher_context_t cmac;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_CMAC */
+    } ctx;
+} mbedtls_psa_mac_operation_t;
+
+#define MBEDTLS_PSA_MAC_OPERATION_INIT {0, {0}}
+
+#endif /* PSA_CRYPTO_BUILTIN_COMPOSITES_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h
new file mode 100644
index 00000000000..62a0e6f3704
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h
@@ -0,0 +1,126 @@
+/*
+ *  Context structure declaration of the Mbed TLS software-based PSA drivers
+ *  called through the PSA Crypto driver dispatch layer.
+ *  This file contains the context structures of those algorithms which do not
+ *  rely on other algorithms, i.e. are 'primitive' algorithms.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the Mbed TLS software-based PSA drivers. The
+ * definition of these objects are then used by crypto_struct.h to define the
+ * implementation-defined types of PSA multi-part state objects.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_BUILTIN_PRIMITIVES_H
+#define PSA_CRYPTO_BUILTIN_PRIMITIVES_H
+
+#include <psa/crypto_driver_common.h>
+
+/*
+ * Hash multi-part operation definitions.
+ */
+
+#include "mbedtls/md2.h"
+#include "mbedtls/md4.h"
+#include "mbedtls/md5.h"
+#include "mbedtls/ripemd160.h"
+#include "mbedtls/sha1.h"
+#include "mbedtls/sha256.h"
+#include "mbedtls/sha512.h"
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD2) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_MD4) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_MD5) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_1) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_224) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_256) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_384) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_512)
+#define MBEDTLS_PSA_BUILTIN_HASH
+#endif
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    union
+    {
+        unsigned dummy; /* Make the union non-empty even with no supported algorithms. */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD2)
+        mbedtls_md2_context md2;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD4)
+        mbedtls_md4_context md4;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD5)
+        mbedtls_md5_context md5;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160)
+        mbedtls_ripemd160_context ripemd160;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_1)
+        mbedtls_sha1_context sha1;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_256) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_224)
+        mbedtls_sha256_context sha256;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_512) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_384)
+        mbedtls_sha512_context sha512;
+#endif
+    } ctx;
+} mbedtls_psa_hash_operation_t;
+
+#define MBEDTLS_PSA_HASH_OPERATION_INIT {0, {0}}
+
+/*
+ * Cipher multi-part operation definitions.
+ */
+
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CTR) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CFB) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_OFB) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_XTS) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7)
+#define MBEDTLS_PSA_BUILTIN_CIPHER  1
+#endif
+
+typedef struct {
+    /* Context structure for the Mbed TLS cipher implementation. */
+    psa_algorithm_t alg;
+    uint8_t iv_length;
+    uint8_t block_length;
+    union {
+        unsigned int dummy;
+        mbedtls_cipher_context_t cipher;
+    } ctx;
+} mbedtls_psa_cipher_operation_t;
+
+#define MBEDTLS_PSA_CIPHER_OPERATION_INIT {0, 0, 0, {0}}
+
+#endif /* PSA_CRYPTO_BUILTIN_PRIMITIVES_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_compat.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_compat.h
new file mode 100644
index 00000000000..09ac488398f
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_compat.h
@@ -0,0 +1,528 @@
+/**
+ * \file psa/crypto_compat.h
+ *
+ * \brief PSA cryptography module: Backward compatibility aliases
+ *
+ * This header declares alternative names for macro and functions.
+ * New application code should not use these names.
+ * These names may be removed in a future version of Mbed Crypto.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_COMPAT_H
+#define PSA_CRYPTO_COMPAT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * To support both openless APIs and psa_open_key() temporarily, define
+ * psa_key_handle_t to be equal to mbedtls_svc_key_id_t. Do not mark the
+ * type and its utility macros and functions deprecated yet. This will be done
+ * in a subsequent phase.
+ */
+typedef mbedtls_svc_key_id_t psa_key_handle_t;
+
+#define PSA_KEY_HANDLE_INIT MBEDTLS_SVC_KEY_ID_INIT
+
+/** Check whether an handle is null.
+ *
+ * \param handle  Handle
+ *
+ * \return Non-zero if the handle is null, zero otherwise.
+ */
+static inline int psa_key_handle_is_null( psa_key_handle_t handle )
+{
+    return( mbedtls_svc_key_id_is_null( handle ) );
+}
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+/*
+ * Mechanism for declaring deprecated values
+ */
+#if defined(MBEDTLS_DEPRECATED_WARNING) && !defined(MBEDTLS_PSA_DEPRECATED)
+#define MBEDTLS_PSA_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_PSA_DEPRECATED
+#endif
+
+typedef MBEDTLS_PSA_DEPRECATED size_t mbedtls_deprecated_size_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_status_t mbedtls_deprecated_psa_status_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_key_usage_t mbedtls_deprecated_psa_key_usage_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_ecc_family_t mbedtls_deprecated_psa_ecc_family_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_dh_family_t mbedtls_deprecated_psa_dh_family_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_ecc_family_t psa_ecc_curve_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_dh_family_t psa_dh_group_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_algorithm_t mbedtls_deprecated_psa_algorithm_t;
+
+#define PSA_KEY_TYPE_GET_CURVE PSA_KEY_TYPE_ECC_GET_FAMILY
+#define PSA_KEY_TYPE_GET_GROUP PSA_KEY_TYPE_DH_GET_FAMILY
+
+#define MBEDTLS_DEPRECATED_CONSTANT( type, value )      \
+    ( (mbedtls_deprecated_##type) ( value ) )
+
+/*
+ * Deprecated PSA Crypto error code definitions (PSA Crypto API  <= 1.0 beta2)
+ */
+#define PSA_ERROR_UNKNOWN_ERROR \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_GENERIC_ERROR )
+#define PSA_ERROR_OCCUPIED_SLOT \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_ALREADY_EXISTS )
+#define PSA_ERROR_EMPTY_SLOT \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_DOES_NOT_EXIST )
+#define PSA_ERROR_INSUFFICIENT_CAPACITY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_INSUFFICIENT_DATA )
+#define PSA_ERROR_TAMPERING_DETECTED \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_CORRUPTION_DETECTED )
+
+/*
+ * Deprecated PSA Crypto numerical encodings (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_KEY_USAGE_SIGN \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_key_usage_t, PSA_KEY_USAGE_SIGN_HASH )
+#define PSA_KEY_USAGE_VERIFY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_key_usage_t, PSA_KEY_USAGE_VERIFY_HASH )
+
+/*
+ * Deprecated PSA Crypto size calculation macros (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ASYMMETRIC_SIGNATURE_MAX_SIZE \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_SIGNATURE_MAX_SIZE )
+#define PSA_ASYMMETRIC_SIGN_OUTPUT_SIZE( key_type, key_bits, alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_SIGN_OUTPUT_SIZE( key_type, key_bits, alg ) )
+#define PSA_KEY_EXPORT_MAX_SIZE( key_type, key_bits ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_EXPORT_KEY_OUTPUT_SIZE( key_type, key_bits ) )
+#define PSA_BLOCK_CIPHER_BLOCK_SIZE( type ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_BLOCK_CIPHER_BLOCK_LENGTH( type ) )
+#define PSA_MAX_BLOCK_CIPHER_BLOCK_SIZE \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE )
+#define PSA_HASH_SIZE( alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_HASH_LENGTH( alg ) )
+#define PSA_MAC_FINAL_SIZE( key_type, key_bits, alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_MAC_LENGTH( key_type, key_bits, alg ) )
+#define PSA_ALG_TLS12_PSK_TO_MS_MAX_PSK_LEN \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE )
+
+/*
+ * Deprecated PSA Crypto function names (PSA Crypto API  <= 1.0 beta3)
+ */
+MBEDTLS_PSA_DEPRECATED static inline psa_status_t psa_asymmetric_sign( psa_key_handle_t key,
+                            psa_algorithm_t alg,
+                            const uint8_t *hash,
+                            size_t hash_length,
+                            uint8_t *signature,
+                            size_t signature_size,
+                            size_t *signature_length )
+{
+    return psa_sign_hash( key, alg, hash, hash_length, signature, signature_size, signature_length );
+}
+
+MBEDTLS_PSA_DEPRECATED static inline psa_status_t psa_asymmetric_verify( psa_key_handle_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *hash,
+                              size_t hash_length,
+                              const uint8_t *signature,
+                              size_t signature_length )
+{
+    return psa_verify_hash( key, alg, hash, hash_length, signature, signature_length );
+}
+
+/*
+ * Size-specific elliptic curve families.
+ */
+#define PSA_ECC_CURVE_SECP160K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP192K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP224K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP256K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP160R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP192R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP224R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP256R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP384R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP521R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP160R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R2 )
+#define PSA_ECC_CURVE_SECT163K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT233K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT239K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT283K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT409K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT571K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT163R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT193R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT233R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT283R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT409R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT571R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT163R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_SECT193R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_BRAINPOOL_P256R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_BRAINPOOL_P384R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_BRAINPOOL_P512R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_CURVE25519 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+#define PSA_ECC_CURVE_CURVE448 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+
+/*
+ * Curves that changed name due to PSA specification.
+ */
+#define PSA_ECC_CURVE_SECP_K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP_R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R2 )
+#define PSA_ECC_CURVE_SECT_K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT_R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_BRAINPOOL_P_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_MONTGOMERY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+
+/*
+ * Finite-field Diffie-Hellman families.
+ */
+#define PSA_DH_GROUP_FFDHE2048 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE3072 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE4096 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE6144 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE8192 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+
+/*
+ * Diffie-Hellman families that changed name due to PSA specification.
+ */
+#define PSA_DH_GROUP_RFC7919 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_CUSTOM \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_CUSTOM )
+
+/*
+ * Deprecated PSA Crypto stream cipher algorithms (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ALG_ARC4 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_STREAM_CIPHER )
+#define PSA_ALG_CHACHA20 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_STREAM_CIPHER )
+
+/*
+ * Renamed AEAD tag length macros (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ALG_AEAD_WITH_DEFAULT_TAG_LENGTH( aead_alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG( aead_alg ) )
+#define PSA_ALG_AEAD_WITH_TAG_LENGTH( aead_alg, tag_length ) \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_AEAD_WITH_SHORTENED_TAG( aead_alg, tag_length ) )
+
+/*
+ * Deprecated PSA AEAD output size macros (PSA Crypto API  <= 1.0 beta3)
+ */
+
+/** The tag size for an AEAD algorithm, in bytes.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    The tag size for the specified algorithm.
+ *                            If the AEAD algorithm does not have an identified
+ *                            tag that can be distinguished from the rest of
+ *                            the ciphertext, return 0.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_TAG_LENGTH_1_ARG( alg )     \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,     \
+        PSA_ALG_IS_AEAD( alg ) ?             \
+        PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) : \
+        0 )
+
+/** The maximum size of the output of psa_aead_encrypt(), in bytes.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_encrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the ciphertext may be smaller.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_SIZE_2_ARG( alg, plaintext_length ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                            \
+        PSA_ALG_IS_AEAD( alg ) ?                                    \
+        (plaintext_length) + PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) :   \
+        0 )
+
+/** The maximum size of the output of psa_aead_decrypt(), in bytes.
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_decrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the plaintext may be smaller.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param ciphertext_length   Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_SIZE_2_ARG( alg, ciphertext_length )   \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                               \
+        PSA_ALG_IS_AEAD( alg ) &&                                      \
+            (ciphertext_length) > PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) ? \
+            (ciphertext_length) - PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) : \
+        0 )
+
+/** A sufficient output buffer size for psa_aead_update().
+ *
+ * If the size of the output buffer is at least this large, it is
+ * guaranteed that psa_aead_update() will not fail due to an
+ * insufficient buffer size. The actual size of the output may be smaller
+ * in any given call.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param input_length        Size of the input in bytes.
+ *
+ * \return                    A sufficient output buffer size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+/* For all the AEAD modes defined in this specification, it is possible
+ * to emit output without delay. However, hardware may not always be
+ * capable of this. So for modes based on a block cipher, allow the
+ * implementation to delay the output until it has a full block. */
+#define PSA_AEAD_UPDATE_OUTPUT_SIZE_2_ARG( alg, input_length )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                              \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                                      \
+        PSA_ROUND_UP_TO_MULTIPLE( PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, (input_length) ) : \
+        (input_length) )
+
+/** A sufficient ciphertext buffer size for psa_aead_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_finish() will not fail due to an
+ * insufficient ciphertext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient ciphertext buffer size for the
+ *                            specified algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_FINISH_OUTPUT_SIZE_1_ARG( alg )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                        \
+        PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE :                               \
+        0 )
+
+/** A sufficient plaintext buffer size for psa_aead_verify().
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_verify() will not fail due to an
+ * insufficient plaintext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient plaintext buffer size for the
+ *                            specified algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_SIZE_1_ARG( alg )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                        \
+        PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE :                               \
+        0 )
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/** Open a handle to an existing persistent key.
+ *
+ * Open a handle to a persistent key. A key is persistent if it was created
+ * with a lifetime other than #PSA_KEY_LIFETIME_VOLATILE. A persistent key
+ * always has a nonzero key identifier, set with psa_set_key_id() when
+ * creating the key. Implementations may provide additional pre-provisioned
+ * keys that can be opened with psa_open_key(). Such keys have an application
+ * key identifier in the vendor range, as documented in the description of
+ * #psa_key_id_t.
+ *
+ * The application must eventually close the handle with psa_close_key() or
+ * psa_destroy_key() to release associated resources. If the application dies
+ * without calling one of these functions, the implementation should perform
+ * the equivalent of a call to psa_close_key().
+ *
+ * Some implementations permit an application to open the same key multiple
+ * times. If this is successful, each call to psa_open_key() will return a
+ * different key handle.
+ *
+ * \note This API is not part of the PSA Cryptography API Release 1.0.0
+ * specification. It was defined in the 1.0 Beta 3 version of the
+ * specification but was removed in the 1.0.0 released version. This API is
+ * kept for the time being to not break applications relying on it. It is not
+ * deprecated yet but will be in the near future.
+ *
+ * \note Applications that rely on opening a key multiple times will not be
+ * portable to implementations that only permit a single key handle to be
+ * opened. See also :ref:\`key-handles\`.
+ *
+ *
+ * \param key           The persistent identifier of the key.
+ * \param[out] handle   On success, a handle to the key.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success. The application can now use the value of `*handle`
+ *         to access the key.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ *         The implementation does not have sufficient resources to open the
+ *         key. This can be due to reaching an implementation limit on the
+ *         number of open keys, the number of open key handles, or available
+ *         memory.
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ *         There is no persistent key with key identifier \p key.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not a valid persistent key identifier.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The specified key exists, but the application does not have the
+ *         permission to access it. Note that this specification does not
+ *         define any way to create such a key, but it may be possible
+ *         through implementation-specific means.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_open_key( mbedtls_svc_key_id_t key,
+                           psa_key_handle_t *handle );
+
+/** Close a key handle.
+ *
+ * If the handle designates a volatile key, this will destroy the key material
+ * and free all associated resources, just like psa_destroy_key().
+ *
+ * If this is the last open handle to a persistent key, then closing the handle
+ * will free all resources associated with the key in volatile memory. The key
+ * data in persistent storage is not affected and can be opened again later
+ * with a call to psa_open_key().
+ *
+ * Closing the key handle makes the handle invalid, and the key handle
+ * must not be used again by the application.
+ *
+ * \note This API is not part of the PSA Cryptography API Release 1.0.0
+ * specification. It was defined in the 1.0 Beta 3 version of the
+ * specification but was removed in the 1.0.0 released version. This API is
+ * kept for the time being to not break applications relying on it. It is not
+ * deprecated yet but will be in the near future.
+ *
+ * \note If the key handle was used to set up an active
+ * :ref:\`multipart operation <multipart-operations>\`, then closing the
+ * key handle can cause the multipart operation to fail. Applications should
+ * maintain the key handle until after the multipart operation has finished.
+ *
+ * \param handle        The key handle to close.
+ *                      If this is \c 0, do nothing and return \c PSA_SUCCESS.
+ *
+ * \retval #PSA_SUCCESS
+ *         \p handle was a valid handle or \c 0. It is now closed.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p handle is not a valid handle nor \c 0.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_close_key(psa_key_handle_t handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_COMPAT_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_config.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_config.h
new file mode 100644
index 00000000000..e2446cb26c4
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_config.h
@@ -0,0 +1,129 @@
+/**
+ * \file psa/crypto_config.h
+ * \brief PSA crypto configuration options (set of defines)
+ *
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+/**
+ * When #MBEDTLS_PSA_CRYPTO_CONFIG is enabled in config.h,
+ * this file determines which cryptographic mechanisms are enabled
+ * through the PSA Cryptography API (\c psa_xxx() functions).
+ *
+ * To enable a cryptographic mechanism, uncomment the definition of
+ * the corresponding \c PSA_WANT_xxx preprocessor symbol.
+ * To disable a cryptographic mechanism, comment out the definition of
+ * the corresponding \c PSA_WANT_xxx preprocessor symbol.
+ * The names of cryptographic mechanisms correspond to values
+ * defined in psa/crypto_values.h, with the prefix \c PSA_WANT_ instead
+ * of \c PSA_.
+ *
+ * Note that many cryptographic mechanisms involve two symbols: one for
+ * the key type (\c PSA_WANT_KEY_TYPE_xxx) and one for the algorithm
+ * (\c PSA_WANT_ALG_xxx). Mechanisms with additional parameters may involve
+ * additional symbols.
+ */
+#else
+/**
+ * When \c MBEDTLS_PSA_CRYPTO_CONFIG is disabled in config.h,
+ * this file is not used, and cryptographic mechanisms are supported
+ * through the PSA API if and only if they are supported through the
+ * mbedtls_xxx API.
+ */
+#endif
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_CONFIG_H
+#define PSA_CRYPTO_CONFIG_H
+
+/*
+ * CBC-MAC is not yet supported via the PSA API in Mbed TLS.
+ */
+//#define PSA_WANT_ALG_CBC_MAC                    1
+#define PSA_WANT_ALG_CBC_NO_PADDING             1
+#define PSA_WANT_ALG_CBC_PKCS7                  1
+#define PSA_WANT_ALG_CCM                        1
+#define PSA_WANT_ALG_CMAC                       1
+#define PSA_WANT_ALG_CFB                        1
+#define PSA_WANT_ALG_CHACHA20_POLY1305          1
+#define PSA_WANT_ALG_CMAC                       1
+#define PSA_WANT_ALG_CTR                        1
+#define PSA_WANT_ALG_DETERMINISTIC_ECDSA        1
+#define PSA_WANT_ALG_ECB_NO_PADDING             1
+#define PSA_WANT_ALG_ECDH                       1
+#define PSA_WANT_ALG_ECDSA                      1
+#define PSA_WANT_ALG_GCM                        1
+#define PSA_WANT_ALG_HKDF                       1
+#define PSA_WANT_ALG_HMAC                       1
+#define PSA_WANT_ALG_MD2                        1
+#define PSA_WANT_ALG_MD4                        1
+#define PSA_WANT_ALG_MD5                        1
+#define PSA_WANT_ALG_OFB                        1
+#define PSA_WANT_ALG_RIPEMD160                  1
+#define PSA_WANT_ALG_RSA_OAEP                   1
+#define PSA_WANT_ALG_RSA_PKCS1V15_CRYPT         1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN          1
+#define PSA_WANT_ALG_RSA_PSS                    1
+#define PSA_WANT_ALG_SHA_1                      1
+#define PSA_WANT_ALG_SHA_224                    1
+#define PSA_WANT_ALG_SHA_256                    1
+#define PSA_WANT_ALG_SHA_384                    1
+#define PSA_WANT_ALG_SHA_512                    1
+#define PSA_WANT_ALG_STREAM_CIPHER              1
+#define PSA_WANT_ALG_TLS12_PRF                  1
+#define PSA_WANT_ALG_TLS12_PSK_TO_MS            1
+#define PSA_WANT_ALG_XTS                        1
+
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_256         1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_384         1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_512         1
+#define PSA_WANT_ECC_MONTGOMERY_255             1
+/*
+ * Curve448 is not yet supported via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/4249). Thus, do not enable it by
+ * default.
+ */
+//#define PSA_WANT_ECC_MONTGOMERY_448             1
+#define PSA_WANT_ECC_SECP_K1_192                1
+/*
+ * SECP224K1 is buggy via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/3541). Thus, do not enable it by
+ * default.
+ */
+//#define PSA_WANT_ECC_SECP_K1_224                1
+#define PSA_WANT_ECC_SECP_K1_256                1
+#define PSA_WANT_ECC_SECP_R1_192                1
+#define PSA_WANT_ECC_SECP_R1_224                1
+#define PSA_WANT_ECC_SECP_R1_256                1
+#define PSA_WANT_ECC_SECP_R1_384                1
+#define PSA_WANT_ECC_SECP_R1_521                1
+
+#define PSA_WANT_KEY_TYPE_DERIVE                1
+#define PSA_WANT_KEY_TYPE_HMAC                  1
+#define PSA_WANT_KEY_TYPE_AES                   1
+#define PSA_WANT_KEY_TYPE_ARC4                  1
+#define PSA_WANT_KEY_TYPE_ARIA                  1
+#define PSA_WANT_KEY_TYPE_CAMELLIA              1
+#define PSA_WANT_KEY_TYPE_CHACHA20              1
+#define PSA_WANT_KEY_TYPE_DES                   1
+#define PSA_WANT_KEY_TYPE_ECC_KEY_PAIR          1
+#define PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY        1
+#define PSA_WANT_KEY_TYPE_RAW_DATA              1
+#define PSA_WANT_KEY_TYPE_RSA_KEY_PAIR          1
+#define PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY        1
+
+#endif /* PSA_CRYPTO_CONFIG_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h
new file mode 100644
index 00000000000..26363c6b2f3
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h
@@ -0,0 +1,56 @@
+/**
+ * \file psa/crypto_driver_common.h
+ * \brief Definitions for all PSA crypto drivers
+ *
+ * This file contains common definitions shared by all PSA crypto drivers.
+ * Do not include it directly: instead, include the header file(s) for
+ * the type(s) of driver that you are implementing. For example, if
+ * you are writing a dynamically registered driver for a secure element,
+ * include `psa/crypto_se_driver.h`.
+ *
+ * This file is part of the PSA Crypto Driver Model, containing functions for
+ * driver developers to implement to enable hardware to be called in a
+ * standardized way by a PSA Cryptographic API implementation. The functions
+ * comprising the driver model, which driver authors implement, are not
+ * intended to be called by application developers.
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef PSA_CRYPTO_DRIVER_COMMON_H
+#define PSA_CRYPTO_DRIVER_COMMON_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* Include type definitions (psa_status_t, psa_algorithm_t,
+ * psa_key_type_t, etc.) and macros to build and analyze values
+ * of these types. */
+#include "crypto_types.h"
+#include "crypto_values.h"
+/* Include size definitions which are used to size some arrays in operation
+ * structures. */
+#include <psa/crypto_sizes.h>
+
+/** For encrypt-decrypt functions, whether the operation is an encryption
+ * or a decryption. */
+typedef enum {
+    PSA_CRYPTO_DRIVER_DECRYPT,
+    PSA_CRYPTO_DRIVER_ENCRYPT
+} psa_encrypt_or_decrypt_t;
+
+#endif /* PSA_CRYPTO_DRIVER_COMMON_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h
new file mode 100644
index 00000000000..a7220091ea3
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h
@@ -0,0 +1,93 @@
+/*
+ *  Declaration of context structures for use with the PSA driver wrapper
+ *  interface. This file contains the context structures for 'composite'
+ *  operations, i.e. those operations which need to make use of other operations
+ *  from the primitives (crypto_driver_contexts_primitives.h)
+ *
+ *  Warning: This file will be auto-generated in the future.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the PSA drivers included in the cryptographic
+ * library. The definition of these objects are then used by crypto_struct.h
+ * to define the implementation-defined types of PSA multi-part state objects.
+ */
+/*  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H
+#define PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H
+
+#include "psa/crypto_driver_common.h"
+
+/* Include the context structure definitions for the Mbed TLS software drivers */
+#include "psa/crypto_builtin_composites.h"
+
+/* Include the context structure definitions for those drivers that were
+ * declared during the autogeneration process. */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1)
+#include <libtestdriver1/include/psa/crypto.h>
+#endif
+
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_MAC)
+typedef libtestdriver1_mbedtls_psa_mac_operation_t
+        mbedtls_transparent_test_driver_mac_operation_t;
+typedef libtestdriver1_mbedtls_psa_mac_operation_t
+        mbedtls_opaque_test_driver_mac_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_MAC_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_MAC_OPERATION_INIT
+#define MBEDTLS_OPAQUE_TEST_DRIVER_MAC_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_MAC_OPERATION_INIT
+
+#else
+typedef mbedtls_psa_mac_operation_t
+        mbedtls_transparent_test_driver_mac_operation_t;
+typedef mbedtls_psa_mac_operation_t
+        mbedtls_opaque_test_driver_mac_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_MAC_OPERATION_INIT \
+        MBEDTLS_PSA_MAC_OPERATION_INIT
+#define MBEDTLS_OPAQUE_TEST_DRIVER_MAC_OPERATION_INIT \
+        MBEDTLS_PSA_MAC_OPERATION_INIT
+
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 */
+#endif /* PSA_CRYPTO_DRIVER_TEST */
+
+/* Define the context to be used for an operation that is executed through the
+ * PSA Driver wrapper layer as the union of all possible driver's contexts.
+ *
+ * The union members are the driver's context structures, and the member names
+ * are formatted as `'drivername'_ctx`. This allows for procedural generation
+ * of both this file and the content of psa_crypto_driver_wrappers.c */
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_mac_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_mac_operation_t transparent_test_driver_ctx;
+    mbedtls_opaque_test_driver_mac_operation_t opaque_test_driver_ctx;
+#endif
+} psa_driver_mac_context_t;
+
+#endif /* PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H */
+/* End of automatically generated file. */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h
new file mode 100644
index 00000000000..2bb01ed432f
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h
@@ -0,0 +1,117 @@
+/*
+ *  Declaration of context structures for use with the PSA driver wrapper
+ *  interface. This file contains the context structures for 'primitive'
+ *  operations, i.e. those operations which do not rely on other contexts.
+ *
+ *  Warning: This file will be auto-generated in the future.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the PSA drivers included in the cryptographic
+ * library. The definition of these objects are then used by crypto_struct.h
+ * to define the implementation-defined types of PSA multi-part state objects.
+ */
+/*  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H
+#define PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H
+
+#include "psa/crypto_driver_common.h"
+
+/* Include the context structure definitions for the Mbed TLS software drivers */
+#include "psa/crypto_builtin_primitives.h"
+
+/* Include the context structure definitions for those drivers that were
+ * declared during the autogeneration process. */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1)
+#include <libtestdriver1/include/psa/crypto.h>
+#endif
+
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_CIPHER)
+typedef libtestdriver1_mbedtls_psa_cipher_operation_t
+        mbedtls_transparent_test_driver_cipher_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_CIPHER_OPERATION_INIT
+#else
+typedef mbedtls_psa_cipher_operation_t
+        mbedtls_transparent_test_driver_cipher_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT \
+        MBEDTLS_PSA_CIPHER_OPERATION_INIT
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 &&
+          LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_CIPHER */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_HASH)
+typedef libtestdriver1_mbedtls_psa_hash_operation_t
+        mbedtls_transparent_test_driver_hash_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_HASH_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_HASH_OPERATION_INIT
+#else
+typedef mbedtls_psa_hash_operation_t
+        mbedtls_transparent_test_driver_hash_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_HASH_OPERATION_INIT \
+        MBEDTLS_PSA_HASH_OPERATION_INIT
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 &&
+          LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_HASH */
+
+typedef struct {
+    unsigned int initialised : 1;
+    mbedtls_transparent_test_driver_cipher_operation_t ctx;
+} mbedtls_opaque_test_driver_cipher_operation_t;
+
+#define MBEDTLS_OPAQUE_TEST_DRIVER_CIPHER_OPERATION_INIT \
+     { 0, MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT }
+
+#endif /* PSA_CRYPTO_DRIVER_TEST */
+
+/* Define the context to be used for an operation that is executed through the
+ * PSA Driver wrapper layer as the union of all possible driver's contexts.
+ *
+ * The union members are the driver's context structures, and the member names
+ * are formatted as `'drivername'_ctx`. This allows for procedural generation
+ * of both this file and the content of psa_crypto_driver_wrappers.c */
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_hash_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_hash_operation_t test_driver_ctx;
+#endif
+} psa_driver_hash_context_t;
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_cipher_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_cipher_operation_t transparent_test_driver_ctx;
+    mbedtls_opaque_test_driver_cipher_operation_t opaque_test_driver_ctx;
+#endif
+} psa_driver_cipher_context_t;
+
+#endif /* PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H */
+/* End of automatically generated file. */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_extra.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_extra.h
new file mode 100644
index 00000000000..3ee0482cbda
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_extra.h
@@ -0,0 +1,819 @@
+/**
+ * \file psa/crypto_extra.h
+ *
+ * \brief PSA cryptography module: Mbed TLS vendor extensions
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file is reserved for vendor-specific definitions.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_EXTRA_H
+#define PSA_CRYPTO_EXTRA_H
+
+#include "mbedtls/platform_util.h"
+
+#include "crypto_types.h"
+#include "crypto_compat.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* UID for secure storage seed */
+#define PSA_CRYPTO_ITS_RANDOM_SEED_UID 0xFFFFFF52
+
+/* See config.h for definition */
+#if !defined(MBEDTLS_PSA_KEY_SLOT_COUNT)
+#define MBEDTLS_PSA_KEY_SLOT_COUNT 32
+#endif
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** \brief Declare the enrollment algorithm for a key.
+ *
+ * An operation on a key may indifferently use the algorithm set with
+ * psa_set_key_algorithm() or with this function.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param alg2                  A second algorithm that the key may be used
+ *                              for, in addition to the algorithm set with
+ *                              psa_set_key_algorithm().
+ *
+ * \warning Setting an enrollment algorithm is not recommended, because
+ *          using the same key with different algorithms can allow some
+ *          attacks based on arithmetic relations between different
+ *          computations made with the same key, or can escalate harmless
+ *          side channels into exploitable ones. Use this function only
+ *          if it is necessary to support a protocol for which it has been
+ *          verified that the usage of the key with multiple algorithms
+ *          is safe.
+ */
+static inline void psa_set_key_enrollment_algorithm(
+    psa_key_attributes_t *attributes,
+    psa_algorithm_t alg2)
+{
+    attributes->core.policy.alg2 = alg2;
+}
+
+/** Retrieve the enrollment algorithm policy from key attributes.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The enrollment algorithm stored in the attribute structure.
+ */
+static inline psa_algorithm_t psa_get_key_enrollment_algorithm(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.alg2 );
+}
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+
+/** Retrieve the slot number where a key is stored.
+ *
+ * A slot number is only defined for keys that are stored in a secure
+ * element.
+ *
+ * This information is only useful if the secure element is not entirely
+ * managed through the PSA Cryptography API. It is up to the secure
+ * element driver to decide how PSA slot numbers map to any other interface
+ * that the secure element may have.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ * \param[out] slot_number      On success, the slot number containing the key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key is located in a secure element, and \p *slot_number
+ *         indicates the slot number that contains it.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The caller is not permitted to query the slot number.
+ *         Mbed Crypto currently does not return this error.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key is not located in a secure element.
+ */
+psa_status_t psa_get_key_slot_number(
+    const psa_key_attributes_t *attributes,
+    psa_key_slot_number_t *slot_number );
+
+/** Choose the slot number where a key is stored.
+ *
+ * This function declares a slot number in the specified attribute
+ * structure.
+ *
+ * A slot number is only meaningful for keys that are stored in a secure
+ * element. It is up to the secure element driver to decide how PSA slot
+ * numbers map to any other interface that the secure element may have.
+ *
+ * \note Setting a slot number in key attributes for a key creation can
+ *       cause the following errors when creating the key:
+ *       - #PSA_ERROR_NOT_SUPPORTED if the selected secure element does
+ *         not support choosing a specific slot number.
+ *       - #PSA_ERROR_NOT_PERMITTED if the caller is not permitted to
+ *         choose slot numbers in general or to choose this specific slot.
+ *       - #PSA_ERROR_INVALID_ARGUMENT if the chosen slot number is not
+ *         valid in general or not valid for this specific key.
+ *       - #PSA_ERROR_ALREADY_EXISTS if there is already a key in the
+ *         selected slot.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param slot_number           The slot number to set.
+ */
+static inline void psa_set_key_slot_number(
+    psa_key_attributes_t *attributes,
+    psa_key_slot_number_t slot_number )
+{
+    attributes->core.flags |= MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER;
+    attributes->slot_number = slot_number;
+}
+
+/** Remove the slot number attribute from a key attribute structure.
+ *
+ * This function undoes the action of psa_set_key_slot_number().
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ */
+static inline void psa_clear_key_slot_number(
+    psa_key_attributes_t *attributes )
+{
+    attributes->core.flags &= ~MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER;
+}
+
+/** Register a key that is already present in a secure element.
+ *
+ * The key must be located in a secure element designated by the
+ * lifetime field in \p attributes, in the slot set with
+ * psa_set_key_slot_number() in the attribute structure.
+ * This function makes the key available through the key identifier
+ * specified in \p attributes.
+ *
+ * \param[in] attributes        The attributes of the existing key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key was successfully registered.
+ *         Note that depending on the design of the driver, this may or may
+ *         not guarantee that a key actually exists in the designated slot
+ *         and is compatible with the specified attributes.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a key with the identifier specified in
+ *         \p attributes.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The secure element driver for the specified lifetime does not
+ *         support registering a key.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The identifier in \p attributes is invalid, namely the identifier is
+ *         not in the user range.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p attributes specifies a lifetime which is not located
+ *         in a secure element.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         No slot number is specified in \p attributes,
+ *         or the specified slot number is not valid.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The caller is not authorized to register the specified key slot.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t mbedtls_psa_register_se_key(
+    const psa_key_attributes_t *attributes);
+
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+
+/**@}*/
+
+/**
+ * \brief Library deinitialization.
+ *
+ * This function clears all data associated with the PSA layer,
+ * including the whole key store.
+ *
+ * This is an Mbed TLS extension.
+ */
+void mbedtls_psa_crypto_free( void );
+
+/** \brief Statistics about
+ * resource consumption related to the PSA keystore.
+ *
+ * \note The content of this structure is not part of the stable API and ABI
+ *       of Mbed Crypto and may change arbitrarily from version to version.
+ */
+typedef struct mbedtls_psa_stats_s
+{
+    /** Number of slots containing key material for a volatile key. */
+    size_t volatile_slots;
+    /** Number of slots containing key material for a key which is in
+     * internal persistent storage. */
+    size_t persistent_slots;
+    /** Number of slots containing a reference to a key in a
+     * secure element. */
+    size_t external_slots;
+    /** Number of slots which are occupied, but do not contain
+     * key material yet. */
+    size_t half_filled_slots;
+    /** Number of slots that contain cache data. */
+    size_t cache_slots;
+    /** Number of slots that are not used for anything. */
+    size_t empty_slots;
+    /** Number of slots that are locked. */
+    size_t locked_slots;
+    /** Largest key id value among open keys in internal persistent storage. */
+    psa_key_id_t max_open_internal_key_id;
+    /** Largest key id value among open keys in secure elements. */
+    psa_key_id_t max_open_external_key_id;
+} mbedtls_psa_stats_t;
+
+/** \brief Get statistics about
+ * resource consumption related to the PSA keystore.
+ *
+ * \note When Mbed Crypto is built as part of a service, with isolation
+ *       between the application and the keystore, the service may or
+ *       may not expose this function.
+ */
+void mbedtls_psa_get_stats( mbedtls_psa_stats_t *stats );
+
+/**
+ * \brief Inject an initial entropy seed for the random generator into
+ *        secure storage.
+ *
+ * This function injects data to be used as a seed for the random generator
+ * used by the PSA Crypto implementation. On devices that lack a trusted
+ * entropy source (preferably a hardware random number generator),
+ * the Mbed PSA Crypto implementation uses this value to seed its
+ * random generator.
+ *
+ * On devices without a trusted entropy source, this function must be
+ * called exactly once in the lifetime of the device. On devices with
+ * a trusted entropy source, calling this function is optional.
+ * In all cases, this function may only be called before calling any
+ * other function in the PSA Crypto API, including psa_crypto_init().
+ *
+ * When this function returns successfully, it populates a file in
+ * persistent storage. Once the file has been created, this function
+ * can no longer succeed.
+ *
+ * If any error occurs, this function does not change the system state.
+ * You can call this function again after correcting the reason for the
+ * error if possible.
+ *
+ * \warning This function **can** fail! Callers MUST check the return status.
+ *
+ * \warning If you use this function, you should use it as part of a
+ *          factory provisioning process. The value of the injected seed
+ *          is critical to the security of the device. It must be
+ *          *secret*, *unpredictable* and (statistically) *unique per device*.
+ *          You should be generate it randomly using a cryptographically
+ *          secure random generator seeded from trusted entropy sources.
+ *          You should transmit it securely to the device and ensure
+ *          that its value is not leaked or stored anywhere beyond the
+ *          needs of transmitting it from the point of generation to
+ *          the call of this function, and erase all copies of the value
+ *          once this function returns.
+ *
+ * This is an Mbed TLS extension.
+ *
+ * \note This function is only available on the following platforms:
+ * * If the compile-time option MBEDTLS_PSA_INJECT_ENTROPY is enabled.
+ *   Note that you must provide compatible implementations of
+ *   mbedtls_nv_seed_read and mbedtls_nv_seed_write.
+ * * In a client-server integration of PSA Cryptography, on the client side,
+ *   if the server supports this feature.
+ * \param[in] seed          Buffer containing the seed value to inject.
+ * \param[in] seed_size     Size of the \p seed buffer.
+ *                          The size of the seed in bytes must be greater
+ *                          or equal to both #MBEDTLS_ENTROPY_MIN_PLATFORM
+ *                          and #MBEDTLS_ENTROPY_BLOCK_SIZE.
+ *                          It must be less or equal to
+ *                          #MBEDTLS_ENTROPY_MAX_SEED_SIZE.
+ *
+ * \retval #PSA_SUCCESS
+ *         The seed value was injected successfully. The random generator
+ *         of the PSA Crypto implementation is now ready for use.
+ *         You may now call psa_crypto_init() and use the PSA Crypto
+ *         implementation.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p seed_size is out of range.
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         There was a failure reading or writing from storage.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The library has already been initialized. It is no longer
+ *         possible to call this function.
+ */
+psa_status_t mbedtls_psa_inject_entropy(const uint8_t *seed,
+                                        size_t seed_size);
+
+/** \addtogroup crypto_types
+ * @{
+ */
+
+/** DSA public key.
+ *
+ * The import and export format is the
+ * representation of the public key `y = g^x mod p` as a big-endian byte
+ * string. The length of the byte string is the length of the base prime `p`
+ * in bytes.
+ */
+#define PSA_KEY_TYPE_DSA_PUBLIC_KEY                 ((psa_key_type_t)0x4002)
+
+/** DSA key pair (private and public key).
+ *
+ * The import and export format is the
+ * representation of the private key `x` as a big-endian byte string. The
+ * length of the byte string is the private key size in bytes (leading zeroes
+ * are not stripped).
+ *
+ * Determinstic DSA key derivation with psa_generate_derived_key follows
+ * FIPS 186-4 &sect;B.1.2: interpret the byte string as integer
+ * in big-endian order. Discard it if it is not in the range
+ * [0, *N* - 2] where *N* is the boundary of the private key domain
+ * (the prime *p* for Diffie-Hellman, the subprime *q* for DSA,
+ * or the order of the curve's base point for ECC).
+ * Add 1 to the resulting integer and use this as the private key *x*.
+ *
+ */
+#define PSA_KEY_TYPE_DSA_KEY_PAIR                    ((psa_key_type_t)0x7002)
+
+/** Whether a key type is an DSA key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_DSA(type)                                       \
+    (PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) == PSA_KEY_TYPE_DSA_PUBLIC_KEY)
+
+#define PSA_ALG_DSA_BASE                        ((psa_algorithm_t)0x06000400)
+/** DSA signature with hashing.
+ *
+ * This is the signature scheme defined by FIPS 186-4,
+ * with a random per-message secret number (*k*).
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding DSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DSA(hash_alg)                             \
+    (PSA_ALG_DSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_DETERMINISTIC_DSA_BASE          ((psa_algorithm_t)0x06000500)
+#define PSA_ALG_DSA_DETERMINISTIC_FLAG PSA_ALG_ECDSA_DETERMINISTIC_FLAG
+/** Deterministic DSA signature with hashing.
+ *
+ * This is the deterministic variant defined by RFC 6979 of
+ * the signature scheme defined by FIPS 186-4.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding DSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DETERMINISTIC_DSA(hash_alg)                             \
+    (PSA_ALG_DETERMINISTIC_DSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_IS_DSA(alg)                                             \
+    (((alg) & ~PSA_ALG_HASH_MASK & ~PSA_ALG_DSA_DETERMINISTIC_FLAG) ==  \
+     PSA_ALG_DSA_BASE)
+#define PSA_ALG_DSA_IS_DETERMINISTIC(alg)               \
+    (((alg) & PSA_ALG_DSA_DETERMINISTIC_FLAG) != 0)
+#define PSA_ALG_IS_DETERMINISTIC_DSA(alg)                       \
+    (PSA_ALG_IS_DSA(alg) && PSA_ALG_DSA_IS_DETERMINISTIC(alg))
+#define PSA_ALG_IS_RANDOMIZED_DSA(alg)                          \
+    (PSA_ALG_IS_DSA(alg) && !PSA_ALG_DSA_IS_DETERMINISTIC(alg))
+
+
+/* We need to expand the sample definition of this macro from
+ * the API definition. */
+#undef PSA_ALG_IS_VENDOR_HASH_AND_SIGN
+#define PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg)    \
+    PSA_ALG_IS_DSA(alg)
+
+/**@}*/
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** Custom Diffie-Hellman group.
+ *
+ * For keys of type #PSA_KEY_TYPE_DH_PUBLIC_KEY(#PSA_DH_FAMILY_CUSTOM) or
+ * #PSA_KEY_TYPE_DH_KEY_PAIR(#PSA_DH_FAMILY_CUSTOM), the group data comes
+ * from domain parameters set by psa_set_key_domain_parameters().
+ */
+#define PSA_DH_FAMILY_CUSTOM             ((psa_dh_family_t) 0x7e)
+
+
+/**
+ * \brief Set domain parameters for a key.
+ *
+ * Some key types require additional domain parameters in addition to
+ * the key type identifier and the key size. Use this function instead
+ * of psa_set_key_type() when you need to specify domain parameters.
+ *
+ * The format for the required domain parameters varies based on the key type.
+ *
+ * - For RSA keys (#PSA_KEY_TYPE_RSA_PUBLIC_KEY or #PSA_KEY_TYPE_RSA_KEY_PAIR),
+ *   the domain parameter data consists of the public exponent,
+ *   represented as a big-endian integer with no leading zeros.
+ *   This information is used when generating an RSA key pair.
+ *   When importing a key, the public exponent is read from the imported
+ *   key data and the exponent recorded in the attribute structure is ignored.
+ *   As an exception, the public exponent 65537 is represented by an empty
+ *   byte string.
+ * - For DSA keys (#PSA_KEY_TYPE_DSA_PUBLIC_KEY or #PSA_KEY_TYPE_DSA_KEY_PAIR),
+ *   the `Dss-Parms` format as defined by RFC 3279 &sect;2.3.2.
+ *   ```
+ *   Dss-Parms ::= SEQUENCE  {
+ *      p       INTEGER,
+ *      q       INTEGER,
+ *      g       INTEGER
+ *   }
+ *   ```
+ * - For Diffie-Hellman key exchange keys
+ *   (#PSA_KEY_TYPE_DH_PUBLIC_KEY(#PSA_DH_FAMILY_CUSTOM) or
+ *   #PSA_KEY_TYPE_DH_KEY_PAIR(#PSA_DH_FAMILY_CUSTOM)), the
+ *   `DomainParameters` format as defined by RFC 3279 &sect;2.3.3.
+ *   ```
+ *   DomainParameters ::= SEQUENCE {
+ *      p               INTEGER,                    -- odd prime, p=jq +1
+ *      g               INTEGER,                    -- generator, g
+ *      q               INTEGER,                    -- factor of p-1
+ *      j               INTEGER OPTIONAL,           -- subgroup factor
+ *      validationParms ValidationParms OPTIONAL
+ *   }
+ *   ValidationParms ::= SEQUENCE {
+ *      seed            BIT STRING,
+ *      pgenCounter     INTEGER
+ *   }
+ *   ```
+ *
+ * \note This function may allocate memory or other resources.
+ *       Once you have called this function on an attribute structure,
+ *       you must call psa_reset_key_attributes() to free these resources.
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param[in,out] attributes    Attribute structure where the specified domain
+ *                              parameters will be stored.
+ *                              If this function fails, the content of
+ *                              \p attributes is not modified.
+ * \param type                  Key type (a \c PSA_KEY_TYPE_XXX value).
+ * \param[in] data              Buffer containing the key domain parameters.
+ *                              The content of this buffer is interpreted
+ *                              according to \p type as described above.
+ * \param data_length           Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ */
+psa_status_t psa_set_key_domain_parameters(psa_key_attributes_t *attributes,
+                                           psa_key_type_t type,
+                                           const uint8_t *data,
+                                           size_t data_length);
+
+/**
+ * \brief Get domain parameters for a key.
+ *
+ * Get the domain parameters for a key with this function, if any. The format
+ * of the domain parameters written to \p data is specified in the
+ * documentation for psa_set_key_domain_parameters().
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ * \param[out] data             On success, the key domain parameters.
+ * \param data_size             Size of the \p data buffer in bytes.
+ *                              The buffer is guaranteed to be large
+ *                              enough if its size in bytes is at least
+ *                              the value given by
+ *                              PSA_KEY_DOMAIN_PARAMETERS_SIZE().
+ * \param[out] data_length      On success, the number of bytes
+ *                              that make up the key domain parameters data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ */
+psa_status_t psa_get_key_domain_parameters(
+    const psa_key_attributes_t *attributes,
+    uint8_t *data,
+    size_t data_size,
+    size_t *data_length);
+
+/** Safe output buffer size for psa_get_key_domain_parameters().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param key_type  A supported key type.
+ * \param key_bits  The size of the key in bits.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_get_key_domain_parameters() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported
+ *         by the implementation, this macro shall return either a
+ *         sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_KEY_DOMAIN_PARAMETERS_SIZE(key_type, key_bits)              \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? sizeof(int) :                      \
+     PSA_KEY_TYPE_IS_DH(key_type) ? PSA_DH_KEY_DOMAIN_PARAMETERS_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_DSA(key_type) ? PSA_DSA_KEY_DOMAIN_PARAMETERS_SIZE(key_bits) : \
+     0)
+#define PSA_DH_KEY_DOMAIN_PARAMETERS_SIZE(key_bits)     \
+    (4 + (PSA_BITS_TO_BYTES(key_bits) + 5) * 3 /*without optional parts*/)
+#define PSA_DSA_KEY_DOMAIN_PARAMETERS_SIZE(key_bits)    \
+    (4 + (PSA_BITS_TO_BYTES(key_bits) + 5) * 2 /*p, g*/ + 34 /*q*/)
+
+/**@}*/
+
+/** \defgroup psa_tls_helpers TLS helper functions
+ * @{
+ */
+
+#if defined(MBEDTLS_ECP_C)
+#include <mbedtls/ecp.h>
+
+/** Convert an ECC curve identifier from the Mbed TLS encoding to PSA.
+ *
+ * \note This function is provided solely for the convenience of
+ *       Mbed TLS and may be removed at any time without notice.
+ *
+ * \param grpid         An Mbed TLS elliptic curve identifier
+ *                      (`MBEDTLS_ECP_DP_xxx`).
+ * \param[out] bits     On success, the bit size of the curve.
+ *
+ * \return              The corresponding PSA elliptic curve identifier
+ *                      (`PSA_ECC_FAMILY_xxx`).
+ * \return              \c 0 on failure (\p grpid is not recognized).
+ */
+static inline psa_ecc_family_t mbedtls_ecc_group_to_psa( mbedtls_ecp_group_id grpid,
+                                                        size_t *bits )
+{
+    switch( grpid )
+    {
+        case MBEDTLS_ECP_DP_SECP192R1:
+            *bits = 192;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP224R1:
+            *bits = 224;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP256R1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP384R1:
+            *bits = 384;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP521R1:
+            *bits = 521;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_BP256R1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_BP384R1:
+            *bits = 384;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_BP512R1:
+            *bits = 512;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_CURVE25519:
+            *bits = 255;
+            return( PSA_ECC_FAMILY_MONTGOMERY );
+        case MBEDTLS_ECP_DP_SECP192K1:
+            *bits = 192;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_SECP224K1:
+            *bits = 224;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_SECP256K1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_CURVE448:
+            *bits = 448;
+            return( PSA_ECC_FAMILY_MONTGOMERY );
+        default:
+            *bits = 0;
+            return( 0 );
+    }
+}
+
+/** Convert an ECC curve identifier from the PSA encoding to Mbed TLS.
+ *
+ * \note This function is provided solely for the convenience of
+ *       Mbed TLS and may be removed at any time without notice.
+ *
+ * \param curve         A PSA elliptic curve identifier
+ *                      (`PSA_ECC_FAMILY_xxx`).
+ * \param bits          The bit-length of a private key on \p curve.
+ * \param bits_is_sloppy If true, \p bits may be the bit-length rounded up
+ *                      to the nearest multiple of 8. This allows the caller
+ *                      to infer the exact curve from the length of a key
+ *                      which is supplied as a byte string.
+ *
+ * \return              The corresponding Mbed TLS elliptic curve identifier
+ *                      (`MBEDTLS_ECP_DP_xxx`).
+ * \return              #MBEDTLS_ECP_DP_NONE if \c curve is not recognized.
+ * \return              #MBEDTLS_ECP_DP_NONE if \p bits is not
+ *                      correct for \p curve.
+ */
+mbedtls_ecp_group_id mbedtls_ecc_group_of_psa( psa_ecc_family_t curve,
+                                               size_t bits,
+                                               int bits_is_sloppy );
+#endif /* MBEDTLS_ECP_C */
+
+/**@}*/
+
+/** \defgroup psa_external_rng External random generator
+ * @{
+ */
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+/** External random generator function, implemented by the platform.
+ *
+ * When the compile-time option #MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG is enabled,
+ * this function replaces Mbed TLS's entropy and DRBG modules for all
+ * random generation triggered via PSA crypto interfaces.
+ *
+ * \note This random generator must deliver random numbers with cryptographic
+ *       quality and high performance. It must supply unpredictable numbers
+ *       with a uniform distribution. The implementation of this function
+ *       is responsible for ensuring that the random generator is seeded
+ *       with sufficient entropy. If you have a hardware TRNG which is slow
+ *       or delivers non-uniform output, declare it as an entropy source
+ *       with mbedtls_entropy_add_source() instead of enabling this option.
+ *
+ * \param[in,out] context       Pointer to the random generator context.
+ *                              This is all-bits-zero on the first call
+ *                              and preserved between successive calls.
+ * \param[out] output           Output buffer. On success, this buffer
+ *                              contains random data with a uniform
+ *                              distribution.
+ * \param output_size           The size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, set this value to \p output_size.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success. The output buffer contains \p output_size bytes of
+ *         cryptographic-quality random data, and \c *output_length is
+ *         set to \p output_size.
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ *         The random generator requires extra entropy and there is no
+ *         way to obtain entropy under current environment conditions.
+ *         This error should not happen under normal circumstances since
+ *         this function is responsible for obtaining as much entropy as
+ *         it needs. However implementations of this function may return
+ *         #PSA_ERROR_INSUFFICIENT_ENTROPY if there is no way to obtain
+ *         entropy without blocking indefinitely.
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ *         A failure of the random generator hardware that isn't covered
+ *         by #PSA_ERROR_INSUFFICIENT_ENTROPY.
+ */
+psa_status_t mbedtls_psa_external_get_random(
+    mbedtls_psa_external_random_context_t *context,
+    uint8_t *output, size_t output_size, size_t *output_length );
+#endif /* MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG */
+
+/**@}*/
+
+/** \defgroup psa_builtin_keys Built-in keys
+ * @{
+ */
+
+/** The minimum value for a key identifier that is built into the
+ * implementation.
+ *
+ * The range of key identifiers from #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN
+ * to #MBEDTLS_PSA_KEY_ID_BUILTIN_MAX within the range from
+ * #PSA_KEY_ID_VENDOR_MIN and #PSA_KEY_ID_VENDOR_MAX and must not intersect
+ * with any other set of implementation-chosen key identifiers.
+ *
+ * This value is part of the library's ABI since changing it would invalidate
+ * the values of built-in key identifiers in applications.
+ */
+#define MBEDTLS_PSA_KEY_ID_BUILTIN_MIN          ((psa_key_id_t)0x7fff0000)
+
+/** The maximum value for a key identifier that is built into the
+ * implementation.
+ *
+ * See #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN for more information.
+ */
+#define MBEDTLS_PSA_KEY_ID_BUILTIN_MAX          ((psa_key_id_t)0x7fffefff)
+
+/** A slot number identifying a key in a driver.
+ *
+ * Values of this type are used to identify built-in keys.
+ */
+typedef uint64_t psa_drv_slot_number_t;
+
+#if defined(MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS)
+/** Test whether a key identifier belongs to the builtin key range.
+ *
+ * \param key_id  Key identifier to test.
+ *
+ * \retval 1
+ *         The key identifier is a builtin key identifier.
+ * \retval 0
+ *         The key identifier is not a builtin key identifier.
+ */
+static inline int psa_key_id_is_builtin( psa_key_id_t key_id )
+{
+    return( ( key_id >= MBEDTLS_PSA_KEY_ID_BUILTIN_MIN ) &&
+            ( key_id <= MBEDTLS_PSA_KEY_ID_BUILTIN_MAX ) );
+}
+
+/** Platform function to obtain the location and slot number of a built-in key.
+ *
+ * An application-specific implementation of this function must be provided if
+ * #MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS is enabled. This would typically be provided
+ * as part of a platform's system image.
+ *
+ * #MBEDTLS_SVC_KEY_ID_GET_KEY_ID(\p key_id) needs to be in the range from
+ * #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN to #MBEDTLS_PSA_KEY_ID_BUILTIN_MAX.
+ *
+ * In a multi-application configuration
+ * (\c MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER is defined),
+ * this function should check that #MBEDTLS_SVC_KEY_ID_GET_OWNER_ID(\p key_id)
+ * is allowed to use the given key.
+ *
+ * \param key_id                The key ID for which to retrieve the
+ *                              location and slot attributes.
+ * \param[out] lifetime         On success, the lifetime associated with the key
+ *                              corresponding to \p key_id. Lifetime is a
+ *                              combination of which driver contains the key,
+ *                              and with what persistence level the key is
+ *                              intended to be used. If the platform
+ *                              implementation does not contain specific
+ *                              information about the intended key persistence
+ *                              level, the persistence level may be reported as
+ *                              #PSA_KEY_PERSISTENCE_DEFAULT.
+ * \param[out] slot_number      On success, the slot number known to the driver
+ *                              registered at the lifetime location reported
+ *                              through \p lifetime which corresponds to the
+ *                              requested built-in key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The requested key identifier designates a built-in key.
+ *         In a multi-application configuration, the requested owner
+ *         is allowed to access it.
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ *         The requested key identifier is not a built-in key which is known
+ *         to this function. If a key exists in the key storage with this
+ *         identifier, the data from the storage will be used.
+ * \return (any other error)
+ *         Any other error is propagated to the function that requested the key.
+ *         Common errors include:
+ *         - #PSA_ERROR_NOT_PERMITTED: the key exists but the requested owner
+ *           is not allowed to access it.
+ */
+psa_status_t mbedtls_psa_platform_get_builtin_key(
+    mbedtls_svc_key_id_t key_id,
+    psa_key_lifetime_t *lifetime,
+    psa_drv_slot_number_t *slot_number );
+#endif /* MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS */
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_EXTRA_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_platform.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_platform.h
new file mode 100644
index 00000000000..66f46879305
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_platform.h
@@ -0,0 +1,111 @@
+/**
+ * \file psa/crypto_platform.h
+ *
+ * \brief PSA cryptography module: Mbed TLS platform definitions
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains platform-dependent type definitions.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, implementers should take care to ensure that
+ * the definitions that are exposed to applications match what the
+ * module implements.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_PLATFORM_H
+#define PSA_CRYPTO_PLATFORM_H
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+/* Translate between classic MBEDTLS_xxx feature symbols and PSA_xxx
+ * feature symbols. */
+#include "mbedtls/config_psa.h"
+
+/* PSA requires several types which C99 provides in stdint.h. */
+#include <stdint.h>
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+
+/* Building for the PSA Crypto service on a PSA platform, a key owner is a PSA
+ * partition identifier.
+ *
+ * The function psa_its_identifier_of_slot() in psa_crypto_storage.c that
+ * translates a key identifier to a key storage file name assumes that
+ * mbedtls_key_owner_id_t is an 32 bits integer. This function thus needs
+ * reworking if mbedtls_key_owner_id_t is not defined as a 32 bits integer
+ * here anymore.
+ */
+typedef int32_t mbedtls_key_owner_id_t;
+
+/** Compare two key owner identifiers.
+ *
+ * \param id1 First key owner identifier.
+ * \param id2 Second key owner identifier.
+ *
+ * \return Non-zero if the two key owner identifiers are equal, zero otherwise.
+ */
+static inline int mbedtls_key_owner_id_equal( mbedtls_key_owner_id_t id1,
+                                              mbedtls_key_owner_id_t id2 )
+{
+    return( id1 == id2 );
+}
+
+#endif /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/*
+ * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is being built for SPM
+ * (Secure Partition Manager) integration which separates the code into two
+ * parts: NSPE (Non-Secure Processing Environment) and SPE (Secure Processing
+ * Environment). When building for the SPE, an additional header file should be
+ * included.
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_SPM)
+#define PSA_CRYPTO_SECURE 1
+#include "crypto_spe.h"
+#endif // MBEDTLS_PSA_CRYPTO_SPM
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+/** The type of the context passed to mbedtls_psa_external_get_random().
+ *
+ * Mbed TLS initializes the context to all-bits-zero before calling
+ * mbedtls_psa_external_get_random() for the first time.
+ *
+ * The definition of this type in the Mbed TLS source code is for
+ * demonstration purposes. Implementers of mbedtls_psa_external_get_random()
+ * are expected to replace it with a custom definition.
+ */
+typedef struct {
+    uintptr_t opaque[2];
+} mbedtls_psa_external_random_context_t;
+#endif /* MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG */
+
+#endif /* PSA_CRYPTO_PLATFORM_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h
new file mode 100644
index 00000000000..1dc8f9b5c40
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h
@@ -0,0 +1,1395 @@
+/**
+ * \file psa/crypto_se_driver.h
+ * \brief PSA external cryptoprocessor driver module
+ *
+ * This header declares types and function signatures for cryptography
+ * drivers that access key material via opaque references.
+ * This is meant for cryptoprocessors that have a separate key storage from the
+ * space in which the PSA Crypto implementation runs, typically secure
+ * elements (SEs).
+ *
+ * This file is part of the PSA Crypto Driver HAL (hardware abstraction layer),
+ * containing functions for driver developers to implement to enable hardware
+ * to be called in a standardized way by a PSA Cryptography API
+ * implementation. The functions comprising the driver HAL, which driver
+ * authors implement, are not intended to be called by application developers.
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef PSA_CRYPTO_SE_DRIVER_H
+#define PSA_CRYPTO_SE_DRIVER_H
+
+#include "crypto_driver_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup se_init Secure element driver initialization
+ */
+/**@{*/
+
+/** \brief Driver context structure
+ *
+ * Driver functions receive a pointer to this structure.
+ * Each registered driver has one instance of this structure.
+ *
+ * Implementations must include the fields specified here and
+ * may include other fields.
+ */
+typedef struct {
+    /** A read-only pointer to the driver's persistent data.
+     *
+     * Drivers typically use this persistent data to keep track of
+     * which slot numbers are available. This is only a guideline:
+     * drivers may use the persistent data for any purpose, keeping
+     * in mind the restrictions on when the persistent data is saved
+     * to storage: the persistent data is only saved after calling
+     * certain functions that receive a writable pointer to the
+     * persistent data.
+     *
+     * The core allocates a memory buffer for the persistent data.
+     * The pointer is guaranteed to be suitably aligned for any data type,
+     * like a pointer returned by `malloc` (but the core can use any
+     * method to allocate the buffer, not necessarily `malloc`).
+     *
+     * The size of this buffer is in the \c persistent_data_size field of
+     * this structure.
+     *
+     * Before the driver is initialized for the first time, the content of
+     * the persistent data is all-bits-zero. After a driver upgrade, if the
+     * size of the persistent data has increased, the original data is padded
+     * on the right with zeros; if the size has decreased, the original data
+     * is truncated to the new size.
+     *
+     * This pointer is to read-only data. Only a few driver functions are
+     * allowed to modify the persistent data. These functions receive a
+     * writable pointer. These functions are:
+     * - psa_drv_se_t::p_init
+     * - psa_drv_se_key_management_t::p_allocate
+     * - psa_drv_se_key_management_t::p_destroy
+     *
+     * The PSA Cryptography core saves the persistent data from one
+     * session to the next. It does this before returning from API functions
+     * that call a driver method that is allowed to modify the persistent
+     * data, specifically:
+     * - psa_crypto_init() causes a call to psa_drv_se_t::p_init, and may call
+     *   psa_drv_se_key_management_t::p_destroy to complete an action
+     *   that was interrupted by a power failure.
+     * - Key creation functions cause a call to
+     *   psa_drv_se_key_management_t::p_allocate, and may cause a call to
+     *   psa_drv_se_key_management_t::p_destroy in case an error occurs.
+     * - psa_destroy_key() causes a call to
+     *   psa_drv_se_key_management_t::p_destroy.
+     */
+    const void *const persistent_data;
+
+    /** The size of \c persistent_data in bytes.
+     *
+     * This is always equal to the value of the `persistent_data_size` field
+     * of the ::psa_drv_se_t structure when the driver is registered.
+     */
+    const size_t persistent_data_size;
+
+    /** Driver transient data.
+     *
+     * The core initializes this value to 0 and does not read or modify it
+     * afterwards. The driver may store whatever it wants in this field.
+     */
+    uintptr_t transient_data;
+} psa_drv_se_context_t;
+
+/** \brief A driver initialization function.
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param location                  The location value for which this driver
+ *                                  is registered. The driver will be invoked
+ *                                  for all keys whose lifetime is in this
+ *                                  location.
+ *
+ * \retval #PSA_SUCCESS
+ *         The driver is operational.
+ *         The core will update the persistent data in storage.
+ * \return
+ *         Any other return value prevents the driver from being used in
+ *         this session.
+ *         The core will NOT update the persistent data in storage.
+ */
+typedef psa_status_t (*psa_drv_se_init_t)(psa_drv_se_context_t *drv_context,
+                                          void *persistent_data,
+                                          psa_key_location_t location);
+
+#if defined(__DOXYGEN_ONLY__) || !defined(MBEDTLS_PSA_CRYPTO_SE_C)
+/* Mbed Crypto with secure element support enabled defines this type in
+ * crypto_types.h because it is also visible to applications through an
+ * implementation-specific extension.
+ * For the PSA Cryptography specification, this type is only visible
+ * via crypto_se_driver.h. */
+/** An internal designation of a key slot between the core part of the
+ * PSA Crypto implementation and the driver. The meaning of this value
+ * is driver-dependent. */
+typedef uint64_t psa_key_slot_number_t;
+#endif /* __DOXYGEN_ONLY__ || !MBEDTLS_PSA_CRYPTO_SE_C */
+
+/**@}*/
+
+/** \defgroup se_mac Secure Element Message Authentication Codes
+ * Generation and authentication of Message Authentication Codes (MACs) using
+ * a secure element can be done either as a single function call (via the
+ * `psa_drv_se_mac_generate_t` or `psa_drv_se_mac_verify_t` functions), or in
+ * parts using the following sequence:
+ * - `psa_drv_se_mac_setup_t`
+ * - `psa_drv_se_mac_update_t`
+ * - `psa_drv_se_mac_update_t`
+ * - ...
+ * - `psa_drv_se_mac_finish_t` or `psa_drv_se_mac_finish_verify_t`
+ *
+ * If a previously started secure element MAC operation needs to be terminated,
+ * it should be done so by the `psa_drv_se_mac_abort_t`. Failure to do so may
+ * result in allocated resources not being freed or in other undefined
+ * behavior.
+ */
+/**@{*/
+/** \brief A function that starts a secure element  MAC operation for a PSA
+ * Crypto Driver implementation
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A structure that will contain the
+ *                              hardware-specific MAC context
+ * \param[in] key_slot          The slot of the key to be used for the
+ *                              operation
+ * \param[in] algorithm         The algorithm to be used to underly the MAC
+ *                              operation
+ *
+ * \retval  #PSA_SUCCESS
+ *          Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_setup_t)(psa_drv_se_context_t *drv_context,
+                                               void *op_context,
+                                               psa_key_slot_number_t key_slot,
+                                               psa_algorithm_t algorithm);
+
+/** \brief A function that continues a previously started secure element MAC
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously-established MAC operation to be
+ *                              updated
+ * \param[in] p_input           A buffer containing the message to be appended
+ *                              to the MAC operation
+ * \param[in] input_length      The size in bytes of the input message buffer
+ */
+typedef psa_status_t (*psa_drv_se_mac_update_t)(void *op_context,
+                                                const uint8_t *p_input,
+                                                size_t input_length);
+
+/** \brief a function that completes a previously started secure element MAC
+ * operation by returning the resulting MAC.
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started MAC operation to be
+ *                              finished
+ * \param[out] p_mac            A buffer where the generated MAC will be
+ *                              placed
+ * \param[in] mac_size          The size in bytes of the buffer that has been
+ *                              allocated for the `output` buffer
+ * \param[out] p_mac_length     After completion, will contain the number of
+ *                              bytes placed in the `p_mac` buffer
+ *
+ * \retval  #PSA_SUCCESS
+ *          Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_finish_t)(void *op_context,
+                                                uint8_t *p_mac,
+                                                size_t mac_size,
+                                                size_t *p_mac_length);
+
+/** \brief A function that completes a previously started secure element MAC
+ * operation by comparing the resulting MAC against a provided value
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the previously
+ *                              started MAC operation to be fiinished
+ * \param[in] p_mac             The MAC value against which the resulting MAC
+ *                              will be compared against
+ * \param[in] mac_length        The size in bytes of the value stored in `p_mac`
+ *
+ * \retval #PSA_SUCCESS
+ *         The operation completed successfully and the MACs matched each
+ *         other
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The operation completed successfully, but the calculated MAC did
+ *         not match the provided MAC
+ */
+typedef psa_status_t (*psa_drv_se_mac_finish_verify_t)(void *op_context,
+                                                       const uint8_t *p_mac,
+                                                       size_t mac_length);
+
+/** \brief A function that aborts a previous started secure element MAC
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the previously
+ *                              started MAC operation to be aborted
+ */
+typedef psa_status_t (*psa_drv_se_mac_abort_t)(void *op_context);
+
+/** \brief A function that performs a secure element MAC operation in one
+ * command and returns the calculated MAC
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] p_input           A buffer containing the message to be MACed
+ * \param[in] input_length      The size in bytes of `p_input`
+ * \param[in] key_slot          The slot of the key to be used
+ * \param[in] alg               The algorithm to be used to underlie the MAC
+ *                              operation
+ * \param[out] p_mac            A buffer where the generated MAC will be
+ *                              placed
+ * \param[in] mac_size          The size in bytes of the `p_mac` buffer
+ * \param[out] p_mac_length     After completion, will contain the number of
+ *                              bytes placed in the `output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_generate_t)(psa_drv_se_context_t *drv_context,
+                                                  const uint8_t *p_input,
+                                                  size_t input_length,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t alg,
+                                                  uint8_t *p_mac,
+                                                  size_t mac_size,
+                                                  size_t *p_mac_length);
+
+/** \brief A function that performs a secure element MAC operation in one
+ * command and compares the resulting MAC against a provided value
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in] p_input       A buffer containing the message to be MACed
+ * \param[in] input_length  The size in bytes of `input`
+ * \param[in] key_slot      The slot of the key to be used
+ * \param[in] alg           The algorithm to be used to underlie the MAC
+ *                          operation
+ * \param[in] p_mac         The MAC value against which the resulting MAC will
+ *                          be compared against
+ * \param[in] mac_length   The size in bytes of `mac`
+ *
+ * \retval #PSA_SUCCESS
+ *         The operation completed successfully and the MACs matched each
+ *         other
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The operation completed successfully, but the calculated MAC did
+ *         not match the provided MAC
+ */
+typedef psa_status_t (*psa_drv_se_mac_verify_t)(psa_drv_se_context_t *drv_context,
+                                                const uint8_t *p_input,
+                                                size_t input_length,
+                                                psa_key_slot_number_t key_slot,
+                                                psa_algorithm_t alg,
+                                                const uint8_t *p_mac,
+                                                size_t mac_length);
+
+/** \brief A struct containing all of the function pointers needed to
+ * perform secure element MAC operations
+ *
+ * PSA Crypto API implementations should populate the table as appropriate
+ * upon startup.
+ *
+ * If one of the functions is not implemented (such as
+ * `psa_drv_se_mac_generate_t`), it should be set to NULL.
+ *
+ * Driver implementers should ensure that they implement all of the functions
+ * that make sense for their hardware, and that they provide a full solution
+ * (for example, if they support `p_setup`, they should also support
+ * `p_update` and at least one of `p_finish` or `p_finish_verify`).
+ *
+ */
+typedef struct {
+    /**The size in bytes of the hardware-specific secure element MAC context
+     * structure
+    */
+    size_t                    context_size;
+    /** Function that performs a MAC setup operation
+     */
+    psa_drv_se_mac_setup_t          p_setup;
+    /** Function that performs a MAC update operation
+     */
+    psa_drv_se_mac_update_t         p_update;
+    /** Function that completes a MAC operation
+     */
+    psa_drv_se_mac_finish_t         p_finish;
+    /** Function that completes a MAC operation with a verify check
+     */
+    psa_drv_se_mac_finish_verify_t  p_finish_verify;
+    /** Function that aborts a previoustly started MAC operation
+     */
+    psa_drv_se_mac_abort_t          p_abort;
+    /** Function that performs a MAC operation in one call
+     */
+    psa_drv_se_mac_generate_t       p_mac;
+    /** Function that performs a MAC and verify operation in one call
+     */
+    psa_drv_se_mac_verify_t         p_mac_verify;
+} psa_drv_se_mac_t;
+/**@}*/
+
+/** \defgroup se_cipher Secure Element Symmetric Ciphers
+ *
+ * Encryption and Decryption using secure element keys in block modes other
+ * than ECB must be done in multiple parts, using the following flow:
+ * - `psa_drv_se_cipher_setup_t`
+ * - `psa_drv_se_cipher_set_iv_t` (optional depending upon block mode)
+ * - `psa_drv_se_cipher_update_t`
+ * - `psa_drv_se_cipher_update_t`
+ * - ...
+ * - `psa_drv_se_cipher_finish_t`
+ *
+ * If a previously started secure element Cipher operation needs to be
+ * terminated, it should be done so by the `psa_drv_se_cipher_abort_t`. Failure
+ * to do so may result in allocated resources not being freed or in other
+ * undefined behavior.
+ *
+ * In situations where a PSA Cryptographic API implementation is using a block
+ * mode not-supported by the underlying hardware or driver, it can construct
+ * the block mode itself, while calling the `psa_drv_se_cipher_ecb_t` function
+ * for the cipher operations.
+ */
+/**@{*/
+
+/** \brief A function that provides the cipher setup function for a
+ * secure element driver
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A structure that will contain the
+ *                              hardware-specific cipher context.
+ * \param[in] key_slot          The slot of the key to be used for the
+ *                              operation
+ * \param[in] algorithm         The algorithm to be used in the cipher
+ *                              operation
+ * \param[in] direction         Indicates whether the operation is an encrypt
+ *                              or decrypt
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ */
+typedef psa_status_t (*psa_drv_se_cipher_setup_t)(psa_drv_se_context_t *drv_context,
+                                                  void *op_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  psa_encrypt_or_decrypt_t direction);
+
+/** \brief A function that sets the initialization vector (if
+ * necessary) for an secure element cipher operation
+ *
+ * Rationale: The `psa_se_cipher_*` operation in the PSA Cryptographic API has
+ * two IV functions: one to set the IV, and one to generate it internally. The
+ * generate function is not necessary for the drivers to implement as the PSA
+ * Crypto implementation can do the generation using its RNG features.
+ *
+ * \param[in,out] op_context    A structure that contains the previously set up
+ *                              hardware-specific cipher context
+ * \param[in] p_iv              A buffer containing the initialization vector
+ * \param[in] iv_length         The size (in bytes) of the `p_iv` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_set_iv_t)(void *op_context,
+                                                   const uint8_t *p_iv,
+                                                   size_t iv_length);
+
+/** \brief A function that continues a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context        A hardware-specific structure for the
+ *                                  previously started cipher operation
+ * \param[in] p_input               A buffer containing the data to be
+ *                                  encrypted/decrypted
+ * \param[in] input_size            The size in bytes of the buffer pointed to
+ *                                  by `p_input`
+ * \param[out] p_output             The caller-allocated buffer where the
+ *                                  output will be placed
+ * \param[in] output_size           The allocated size in bytes of the
+ *                                  `p_output` buffer
+ * \param[out] p_output_length      After completion, will contain the number
+ *                                  of bytes placed in the `p_output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_update_t)(void *op_context,
+                                                   const uint8_t *p_input,
+                                                   size_t input_size,
+                                                   uint8_t *p_output,
+                                                   size_t output_size,
+                                                   size_t *p_output_length);
+
+/** \brief A function that completes a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started cipher operation
+ * \param[out] p_output         The caller-allocated buffer where the output
+ *                              will be placed
+ * \param[in] output_size       The allocated size in bytes of the `p_output`
+ *                              buffer
+ * \param[out] p_output_length  After completion, will contain the number of
+ *                              bytes placed in the `p_output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_finish_t)(void *op_context,
+                                                   uint8_t *p_output,
+                                                   size_t output_size,
+                                                   size_t *p_output_length);
+
+/** \brief A function that aborts a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started cipher operation
+ */
+typedef psa_status_t (*psa_drv_se_cipher_abort_t)(void *op_context);
+
+/** \brief A function that performs the ECB block mode for secure element
+ * cipher operations
+ *
+ * Note: this function should only be used with implementations that do not
+ * provide a needed higher-level operation.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          The slot of the key to be used for the operation
+ * \param[in] algorithm         The algorithm to be used in the cipher operation
+ * \param[in] direction         Indicates whether the operation is an encrypt or
+ *                              decrypt
+ * \param[in] p_input           A buffer containing the data to be
+ *                              encrypted/decrypted
+ * \param[in] input_size        The size in bytes of the buffer pointed to by
+ *                              `p_input`
+ * \param[out] p_output         The caller-allocated buffer where the output
+ *                              will be placed
+ * \param[in] output_size       The allocated size in bytes of the `p_output`
+ *                              buffer
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ */
+typedef psa_status_t (*psa_drv_se_cipher_ecb_t)(psa_drv_se_context_t *drv_context,
+                                                psa_key_slot_number_t key_slot,
+                                                psa_algorithm_t algorithm,
+                                                psa_encrypt_or_decrypt_t direction,
+                                                const uint8_t *p_input,
+                                                size_t input_size,
+                                                uint8_t *p_output,
+                                                size_t output_size);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * cipher operations using secure elements.
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented (such as
+ * `psa_drv_se_cipher_ecb_t`), it should be set to NULL.
+ */
+typedef struct {
+    /** The size in bytes of the hardware-specific secure element cipher
+     * context structure
+     */
+    size_t               context_size;
+    /** Function that performs a cipher setup operation */
+    psa_drv_se_cipher_setup_t  p_setup;
+    /** Function that sets a cipher IV (if necessary) */
+    psa_drv_se_cipher_set_iv_t p_set_iv;
+    /** Function that performs a cipher update operation */
+    psa_drv_se_cipher_update_t p_update;
+    /** Function that completes a cipher operation */
+    psa_drv_se_cipher_finish_t p_finish;
+    /** Function that aborts a cipher operation */
+    psa_drv_se_cipher_abort_t  p_abort;
+    /** Function that performs ECB mode for a cipher operation
+     * (Danger: ECB mode should not be used directly by clients of the PSA
+     * Crypto Client API)
+     */
+    psa_drv_se_cipher_ecb_t    p_ecb;
+} psa_drv_se_cipher_t;
+
+/**@}*/
+
+/** \defgroup se_asymmetric Secure Element Asymmetric Cryptography
+ *
+ * Since the amount of data that can (or should) be encrypted or signed using
+ * asymmetric keys is limited by the key size, asymmetric key operations using
+ * keys in a secure element must be done in single function calls.
+ */
+/**@{*/
+
+/**
+ * \brief A function that signs a hash or short message with a private key in
+ * a secure element
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in] key_slot              Key slot of an asymmetric key pair
+ * \param[in] alg                   A signature algorithm that is compatible
+ *                                  with the type of `key`
+ * \param[in] p_hash                The hash to sign
+ * \param[in] hash_length           Size of the `p_hash` buffer in bytes
+ * \param[out] p_signature          Buffer where the signature is to be written
+ * \param[in] signature_size        Size of the `p_signature` buffer in bytes
+ * \param[out] p_signature_length   On success, the number of bytes
+ *                                  that make up the returned signature value
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_sign_t)(psa_drv_se_context_t *drv_context,
+                                                     psa_key_slot_number_t key_slot,
+                                                     psa_algorithm_t alg,
+                                                     const uint8_t *p_hash,
+                                                     size_t hash_length,
+                                                     uint8_t *p_signature,
+                                                     size_t signature_size,
+                                                     size_t *p_signature_length);
+
+/**
+ * \brief A function that verifies the signature a hash or short message using
+ * an asymmetric public key in a secure element
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of a public key or an asymmetric key
+ *                              pair
+ * \param[in] alg               A signature algorithm that is compatible with
+ *                              the type of `key`
+ * \param[in] p_hash            The hash whose signature is to be verified
+ * \param[in] hash_length       Size of the `p_hash` buffer in bytes
+ * \param[in] p_signature       Buffer containing the signature to verify
+ * \param[in] signature_length  Size of the `p_signature` buffer in bytes
+ *
+ * \retval #PSA_SUCCESS
+ *         The signature is valid.
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_verify_t)(psa_drv_se_context_t *drv_context,
+                                                       psa_key_slot_number_t key_slot,
+                                                       psa_algorithm_t alg,
+                                                       const uint8_t *p_hash,
+                                                       size_t hash_length,
+                                                       const uint8_t *p_signature,
+                                                       size_t signature_length);
+
+/**
+ * \brief A function that encrypts a short message with an asymmetric public
+ * key in a secure element
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of a public key or an asymmetric key
+ *                              pair
+ * \param[in] alg               An asymmetric encryption algorithm that is
+ *                              compatible with the type of `key`
+ * \param[in] p_input           The message to encrypt
+ * \param[in] input_length      Size of the `p_input` buffer in bytes
+ * \param[in] p_salt            A salt or label, if supported by the
+ *                              encryption algorithm
+ *                              If the algorithm does not support a
+ *                              salt, pass `NULL`.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass `NULL`.
+ *                              For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                              supported.
+ * \param[in] salt_length       Size of the `p_salt` buffer in bytes
+ *                              If `p_salt` is `NULL`, pass 0.
+ * \param[out] p_output         Buffer where the encrypted message is to
+ *                              be written
+ * \param[in] output_size       Size of the `p_output` buffer in bytes
+ * \param[out] p_output_length  On success, the number of bytes that make up
+ *                              the returned output
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_encrypt_t)(psa_drv_se_context_t *drv_context,
+                                                        psa_key_slot_number_t key_slot,
+                                                        psa_algorithm_t alg,
+                                                        const uint8_t *p_input,
+                                                        size_t input_length,
+                                                        const uint8_t *p_salt,
+                                                        size_t salt_length,
+                                                        uint8_t *p_output,
+                                                        size_t output_size,
+                                                        size_t *p_output_length);
+
+/**
+ * \brief A function that decrypts a short message with an asymmetric private
+ * key in a secure element.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of an asymmetric key pair
+ * \param[in] alg               An asymmetric encryption algorithm that is
+ *                              compatible with the type of `key`
+ * \param[in] p_input           The message to decrypt
+ * \param[in] input_length      Size of the `p_input` buffer in bytes
+ * \param[in] p_salt            A salt or label, if supported by the
+ *                              encryption algorithm
+ *                              If the algorithm does not support a
+ *                              salt, pass `NULL`.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass `NULL`.
+ *                              For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                              supported.
+ * \param[in] salt_length       Size of the `p_salt` buffer in bytes
+ *                              If `p_salt` is `NULL`, pass 0.
+ * \param[out] p_output         Buffer where the decrypted message is to
+ *                              be written
+ * \param[in] output_size       Size of the `p_output` buffer in bytes
+ * \param[out] p_output_length  On success, the number of bytes
+ *                              that make up the returned output
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_decrypt_t)(psa_drv_se_context_t *drv_context,
+                                                        psa_key_slot_number_t key_slot,
+                                                        psa_algorithm_t alg,
+                                                        const uint8_t *p_input,
+                                                        size_t input_length,
+                                                        const uint8_t *p_salt,
+                                                        size_t salt_length,
+                                                        uint8_t *p_output,
+                                                        size_t output_size,
+                                                        size_t *p_output_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * asymmetric cryptographic operations using secure elements.
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that performs an asymmetric sign operation */
+    psa_drv_se_asymmetric_sign_t    p_sign;
+    /** Function that performs an asymmetric verify operation */
+    psa_drv_se_asymmetric_verify_t  p_verify;
+    /** Function that performs an asymmetric encrypt operation */
+    psa_drv_se_asymmetric_encrypt_t p_encrypt;
+    /** Function that performs an asymmetric decrypt operation */
+    psa_drv_se_asymmetric_decrypt_t p_decrypt;
+} psa_drv_se_asymmetric_t;
+
+/**@}*/
+
+/** \defgroup se_aead Secure Element Authenticated Encryption with Additional Data
+ * Authenticated Encryption with Additional Data (AEAD) operations with secure
+ * elements must be done in one function call. While this creates a burden for
+ * implementers as there must be sufficient space in memory for the entire
+ * message, it prevents decrypted data from being made available before the
+ * authentication operation is complete and the data is known to be authentic.
+ */
+/**@{*/
+
+/** \brief A function that performs a secure element authenticated encryption
+ * operation
+ *
+ * \param[in,out] drv_context           The driver context structure.
+ * \param[in] key_slot                  Slot containing the key to use.
+ * \param[in] algorithm                 The AEAD algorithm to compute
+ *                                      (\c PSA_ALG_XXX value such that
+ *                                      #PSA_ALG_IS_AEAD(`alg`) is true)
+ * \param[in] p_nonce                   Nonce or IV to use
+ * \param[in] nonce_length              Size of the `p_nonce` buffer in bytes
+ * \param[in] p_additional_data         Additional data that will be
+ *                                      authenticated but not encrypted
+ * \param[in] additional_data_length    Size of `p_additional_data` in bytes
+ * \param[in] p_plaintext               Data that will be authenticated and
+ *                                      encrypted
+ * \param[in] plaintext_length          Size of `p_plaintext` in bytes
+ * \param[out] p_ciphertext             Output buffer for the authenticated and
+ *                                      encrypted data. The additional data is
+ *                                      not part of this output. For algorithms
+ *                                      where the encrypted data and the
+ *                                      authentication tag are defined as
+ *                                      separate outputs, the authentication
+ *                                      tag is appended to the encrypted data.
+ * \param[in] ciphertext_size           Size of the `p_ciphertext` buffer in
+ *                                      bytes
+ * \param[out] p_ciphertext_length      On success, the size of the output in
+ *                                      the `p_ciphertext` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_aead_encrypt_t)(psa_drv_se_context_t *drv_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  const uint8_t *p_nonce,
+                                                  size_t nonce_length,
+                                                  const uint8_t *p_additional_data,
+                                                  size_t additional_data_length,
+                                                  const uint8_t *p_plaintext,
+                                                  size_t plaintext_length,
+                                                  uint8_t *p_ciphertext,
+                                                  size_t ciphertext_size,
+                                                  size_t *p_ciphertext_length);
+
+/** A function that peforms a secure element authenticated decryption operation
+ *
+ * \param[in,out] drv_context           The driver context structure.
+ * \param[in] key_slot                  Slot containing the key to use
+ * \param[in] algorithm                 The AEAD algorithm to compute
+ *                                      (\c PSA_ALG_XXX value such that
+ *                                      #PSA_ALG_IS_AEAD(`alg`) is true)
+ * \param[in] p_nonce                   Nonce or IV to use
+ * \param[in] nonce_length              Size of the `p_nonce` buffer in bytes
+ * \param[in] p_additional_data         Additional data that has been
+ *                                      authenticated but not encrypted
+ * \param[in] additional_data_length    Size of `p_additional_data` in bytes
+ * \param[in] p_ciphertext              Data that has been authenticated and
+ *                                      encrypted.
+ *                                      For algorithms where the encrypted data
+ *                                      and the authentication tag are defined
+ *                                      as separate inputs, the buffer must
+ *                                      contain the encrypted data followed by
+ *                                      the authentication tag.
+ * \param[in] ciphertext_length         Size of `p_ciphertext` in bytes
+ * \param[out] p_plaintext              Output buffer for the decrypted data
+ * \param[in] plaintext_size            Size of the `p_plaintext` buffer in
+ *                                      bytes
+ * \param[out] p_plaintext_length       On success, the size of the output in
+ *                                      the `p_plaintext` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_aead_decrypt_t)(psa_drv_se_context_t *drv_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  const uint8_t *p_nonce,
+                                                  size_t nonce_length,
+                                                  const uint8_t *p_additional_data,
+                                                  size_t additional_data_length,
+                                                  const uint8_t *p_ciphertext,
+                                                  size_t ciphertext_length,
+                                                  uint8_t *p_plaintext,
+                                                  size_t plaintext_size,
+                                                  size_t *p_plaintext_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * secure element Authenticated Encryption with Additional Data operations
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that performs the AEAD encrypt operation */
+    psa_drv_se_aead_encrypt_t p_encrypt;
+    /** Function that performs the AEAD decrypt operation */
+    psa_drv_se_aead_decrypt_t p_decrypt;
+} psa_drv_se_aead_t;
+/**@}*/
+
+/** \defgroup se_key_management Secure Element Key Management
+ * Currently, key management is limited to importing keys in the clear,
+ * destroying keys, and exporting keys in the clear.
+ * Whether a key may be exported is determined by the key policies in place
+ * on the key slot.
+ */
+/**@{*/
+
+/** An enumeration indicating how a key is created.
+ */
+typedef enum
+{
+    PSA_KEY_CREATION_IMPORT, /**< During psa_import_key() */
+    PSA_KEY_CREATION_GENERATE, /**< During psa_generate_key() */
+    PSA_KEY_CREATION_DERIVE, /**< During psa_key_derivation_output_key() */
+    PSA_KEY_CREATION_COPY, /**< During psa_copy_key() */
+
+#ifndef __DOXYGEN_ONLY__
+    /** A key is being registered with mbedtls_psa_register_se_key().
+     *
+     * The core only passes this value to
+     * psa_drv_se_key_management_t::p_validate_slot_number, not to
+     * psa_drv_se_key_management_t::p_allocate. The call to
+     * `p_validate_slot_number` is not followed by any other call to the
+     * driver: the key is considered successfully registered if the call to
+     * `p_validate_slot_number` succeeds, or if `p_validate_slot_number` is
+     * null.
+     *
+     * With this creation method, the driver must return #PSA_SUCCESS if
+     * the given attributes are compatible with the existing key in the slot,
+     * and #PSA_ERROR_DOES_NOT_EXIST if the driver can determine that there
+     * is no key with the specified slot number.
+     *
+     * This is an Mbed Crypto extension.
+     */
+    PSA_KEY_CREATION_REGISTER,
+#endif
+} psa_key_creation_method_t;
+
+/** \brief A function that allocates a slot for a key.
+ *
+ * To create a key in a specific slot in a secure element, the core
+ * first calls this function to determine a valid slot number,
+ * then calls a function to create the key material in that slot.
+ * In nominal conditions (that is, if no error occurs),
+ * the effect of a call to a key creation function in the PSA Cryptography
+ * API with a lifetime that places the key in a secure element is the
+ * following:
+ * -# The core calls psa_drv_se_key_management_t::p_allocate
+ *    (or in some implementations
+ *    psa_drv_se_key_management_t::p_validate_slot_number). The driver
+ *    selects (or validates) a suitable slot number given the key attributes
+ *    and the state of the secure element.
+ * -# The core calls a key creation function in the driver.
+ *
+ * The key creation functions in the PSA Cryptography API are:
+ * - psa_import_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_IMPORT
+ *   then a call to psa_drv_se_key_management_t::p_import.
+ * - psa_generate_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_GENERATE
+ *   then a call to psa_drv_se_key_management_t::p_import.
+ * - psa_key_derivation_output_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_DERIVE
+ *   then a call to psa_drv_se_key_derivation_t::p_derive.
+ * - psa_copy_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_COPY
+ *   then a call to psa_drv_se_key_management_t::p_export.
+ *
+ * In case of errors, other behaviors are possible.
+ * - If the PSA Cryptography subsystem dies after the first step,
+ *   for example because the device has lost power abruptly,
+ *   the second step may never happen, or may happen after a reset
+ *   and re-initialization. Alternatively, after a reset and
+ *   re-initialization, the core may call
+ *   psa_drv_se_key_management_t::p_destroy on the slot number that
+ *   was allocated (or validated) instead of calling a key creation function.
+ * - If an error occurs, the core may call
+ *   psa_drv_se_key_management_t::p_destroy on the slot number that
+ *   was allocated (or validated) instead of calling a key creation function.
+ *
+ * Errors and system resets also have an impact on the driver's persistent
+ * data. If a reset happens before the overall key creation process is
+ * completed (before or after the second step above), it is unspecified
+ * whether the persistent data after the reset is identical to what it
+ * was before or after the call to `p_allocate` (or `p_validate_slot_number`).
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param[in] attributes            Attributes of the key.
+ * \param method                    The way in which the key is being created.
+ * \param[out] key_slot             Slot where the key will be stored.
+ *                                  This must be a valid slot for a key of the
+ *                                  chosen type. It must be unoccupied.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         The core will record \c *key_slot as the key slot where the key
+ *         is stored and will update the persistent data in storage.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ */
+typedef psa_status_t (*psa_drv_se_allocate_key_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    const psa_key_attributes_t *attributes,
+    psa_key_creation_method_t method,
+    psa_key_slot_number_t *key_slot);
+
+/** \brief A function that determines whether a slot number is valid
+ * for a key.
+ *
+ * To create a key in a specific slot in a secure element, the core
+ * first calls this function to validate the choice of slot number,
+ * then calls a function to create the key material in that slot.
+ * See the documentation of #psa_drv_se_allocate_key_t for more details.
+ *
+ * As of the PSA Cryptography API specification version 1.0, there is no way
+ * for applications to trigger a call to this function. However some
+ * implementations offer the capability to create or declare a key in
+ * a specific slot via implementation-specific means, generally for the
+ * sake of initial device provisioning or onboarding. Such a mechanism may
+ * be added to a future version of the PSA Cryptography API specification.
+ *
+ * This function may update the driver's persistent data through
+ * \p persistent_data. The core will save the updated persistent data at the
+ * end of the key creation process. See the description of
+ * ::psa_drv_se_allocate_key_t for more information.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param[in] attributes        Attributes of the key.
+ * \param method                The way in which the key is being created.
+ * \param[in] key_slot          Slot where the key is to be stored.
+ *
+ * \retval #PSA_SUCCESS
+ *         The given slot number is valid for a key with the given
+ *         attributes.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The given slot number is not valid for a key with the
+ *         given attributes. This includes the case where the slot
+ *         number is not valid at all.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a key with the specified slot number.
+ *         Drivers may choose to return this error from the key
+ *         creation function instead.
+ */
+typedef psa_status_t (*psa_drv_se_validate_slot_number_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    const psa_key_attributes_t *attributes,
+    psa_key_creation_method_t method,
+    psa_key_slot_number_t key_slot);
+
+/** \brief A function that imports a key into a secure element in binary format
+ *
+ * This function can support any output from psa_export_key(). Refer to the
+ * documentation of psa_export_key() for the format for each key type.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param key_slot              Slot where the key will be stored.
+ *                              This must be a valid slot for a key of the
+ *                              chosen type. It must be unoccupied.
+ * \param[in] attributes        The key attributes, including the lifetime,
+ *                              the key type and the usage policy.
+ *                              Drivers should not access the key size stored
+ *                              in the attributes: it may not match the
+ *                              data passed in \p data.
+ *                              Drivers can call psa_get_key_lifetime(),
+ *                              psa_get_key_type(),
+ *                              psa_get_key_usage_flags() and
+ *                              psa_get_key_algorithm() to access this
+ *                              information.
+ * \param[in] data              Buffer containing the key data.
+ * \param[in] data_length       Size of the \p data buffer in bytes.
+ * \param[out] bits             On success, the key size in bits. The driver
+ *                              must determine this value after parsing the
+ *                              key according to the key type.
+ *                              This value is not used if the function fails.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_import_key_t)(
+    psa_drv_se_context_t *drv_context,
+    psa_key_slot_number_t key_slot,
+    const psa_key_attributes_t *attributes,
+    const uint8_t *data,
+    size_t data_length,
+    size_t *bits);
+
+/**
+ * \brief A function that destroys a secure element key and restore the slot to
+ * its default state
+ *
+ * This function destroys the content of the key from a secure element.
+ * Implementations shall make a best effort to ensure that any previous content
+ * of the slot is unrecoverable.
+ *
+ * This function returns the specified slot to its default state.
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param key_slot                  The key slot to erase.
+ *
+ * \retval #PSA_SUCCESS
+ *         The slot's content, if any, has been erased.
+ */
+typedef psa_status_t (*psa_drv_se_destroy_key_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    psa_key_slot_number_t key_slot);
+
+/**
+ * \brief A function that exports a secure element key in binary format
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an equivalent object.
+ *
+ * If a key is created with `psa_import_key()` and then exported with
+ * this function, it is not guaranteed that the resulting data is
+ * identical: the implementation may choose a different representation
+ * of the same key if the format permits it.
+ *
+ * This function should generate output in the same format that
+ * `psa_export_key()` does. Refer to the
+ * documentation of `psa_export_key()` for the format for each key type.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key               Slot whose content is to be exported. This must
+ *                              be an occupied key slot.
+ * \param[out] p_data           Buffer where the key data is to be written.
+ * \param[in] data_size         Size of the `p_data` buffer in bytes.
+ * \param[out] p_data_length    On success, the number of bytes
+ *                              that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ */
+typedef psa_status_t (*psa_drv_se_export_key_t)(psa_drv_se_context_t *drv_context,
+                                                psa_key_slot_number_t key,
+                                                uint8_t *p_data,
+                                                size_t data_size,
+                                                size_t *p_data_length);
+
+/**
+ * \brief A function that generates a symmetric or asymmetric key on a secure
+ * element
+ *
+ * If the key type \c type recorded in \p attributes
+ * is asymmetric (#PSA_KEY_TYPE_IS_ASYMMETRIC(\c type) = 1),
+ * the driver may export the public key at the time of generation,
+ * in the format documented for psa_export_public_key() by writing it
+ * to the \p pubkey buffer.
+ * This is optional, intended for secure elements that output the
+ * public key at generation time and that cannot export the public key
+ * later. Drivers that do not need this feature should leave
+ * \p *pubkey_length set to 0 and should
+ * implement the psa_drv_key_management_t::p_export_public function.
+ * Some implementations do not support this feature, in which case
+ * \p pubkey is \c NULL and \p pubkey_size is 0.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param key_slot              Slot where the key will be stored.
+ *                              This must be a valid slot for a key of the
+ *                              chosen type. It must be unoccupied.
+ * \param[in] attributes        The key attributes, including the lifetime,
+ *                              the key type and size, and the usage policy.
+ *                              Drivers can call psa_get_key_lifetime(),
+ *                              psa_get_key_type(), psa_get_key_bits(),
+ *                              psa_get_key_usage_flags() and
+ *                              psa_get_key_algorithm() to access this
+ *                              information.
+ * \param[out] pubkey           A buffer where the driver can write the
+ *                              public key, when generating an asymmetric
+ *                              key pair.
+ *                              This is \c NULL when generating a symmetric
+ *                              key or if the core does not support
+ *                              exporting the public key at generation time.
+ * \param pubkey_size           The size of the `pubkey` buffer in bytes.
+ *                              This is 0 when generating a symmetric
+ *                              key or if the core does not support
+ *                              exporting the public key at generation time.
+ * \param[out] pubkey_length    On entry, this is always 0.
+ *                              On success, the number of bytes written to
+ *                              \p pubkey. If this is 0 or unchanged on return,
+ *                              the core will not read the \p pubkey buffer,
+ *                              and will instead call the driver's
+ *                              psa_drv_key_management_t::p_export_public
+ *                              function to export the public key when needed.
+ */
+typedef psa_status_t (*psa_drv_se_generate_key_t)(
+    psa_drv_se_context_t *drv_context,
+    psa_key_slot_number_t key_slot,
+    const psa_key_attributes_t *attributes,
+    uint8_t *pubkey, size_t pubkey_size, size_t *pubkey_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to for secure
+ * element key management
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that allocates a slot for a key. */
+    psa_drv_se_allocate_key_t   p_allocate;
+    /** Function that checks the validity of a slot for a key. */
+    psa_drv_se_validate_slot_number_t p_validate_slot_number;
+    /** Function that performs a key import operation */
+    psa_drv_se_import_key_t     p_import;
+    /** Function that performs a generation */
+    psa_drv_se_generate_key_t   p_generate;
+    /** Function that performs a key destroy operation */
+    psa_drv_se_destroy_key_t    p_destroy;
+    /** Function that performs a key export operation */
+    psa_drv_se_export_key_t     p_export;
+    /** Function that performs a public key export operation */
+    psa_drv_se_export_key_t     p_export_public;
+} psa_drv_se_key_management_t;
+
+/**@}*/
+
+/** \defgroup driver_derivation Secure Element Key Derivation and Agreement
+ * Key derivation is the process of generating new key material using an
+ * existing key and additional parameters, iterating through a basic
+ * cryptographic function, such as a hash.
+ * Key agreement is a part of cryptographic protocols that allows two parties
+ * to agree on the same key value, but starting from different original key
+ * material.
+ * The flows are similar, and the PSA Crypto Driver Model uses the same functions
+ * for both of the flows.
+ *
+ * There are two different final functions for the flows,
+ * `psa_drv_se_key_derivation_derive` and `psa_drv_se_key_derivation_export`.
+ * `psa_drv_se_key_derivation_derive` is used when the key material should be
+ * placed in a slot on the hardware and not exposed to the caller.
+ * `psa_drv_se_key_derivation_export` is used when the key material should be
+ * returned to the PSA Cryptographic API implementation.
+ *
+ * Different key derivation algorithms require a different number of inputs.
+ * Instead of having an API that takes as input variable length arrays, which
+ * can be problemmatic to manage on embedded platforms, the inputs are passed
+ * to the driver via a function, `psa_drv_se_key_derivation_collateral`, that
+ * is called multiple times with different `collateral_id`s. Thus, for a key
+ * derivation algorithm that required 3 parameter inputs, the flow would look
+ * something like:
+ * ~~~~~~~~~~~~~{.c}
+ * psa_drv_se_key_derivation_setup(kdf_algorithm, source_key, dest_key_size_bytes);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_0,
+ *                                      p_collateral_0,
+ *                                      collateral_0_size);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_1,
+ *                                      p_collateral_1,
+ *                                      collateral_1_size);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_2,
+ *                                      p_collateral_2,
+ *                                      collateral_2_size);
+ * psa_drv_se_key_derivation_derive();
+ * ~~~~~~~~~~~~~
+ *
+ * key agreement example:
+ * ~~~~~~~~~~~~~{.c}
+ * psa_drv_se_key_derivation_setup(alg, source_key. dest_key_size_bytes);
+ * psa_drv_se_key_derivation_collateral(DHE_PUBKEY, p_pubkey, pubkey_size);
+ * psa_drv_se_key_derivation_export(p_session_key,
+ *                                  session_key_size,
+ *                                  &session_key_length);
+ * ~~~~~~~~~~~~~
+ */
+/**@{*/
+
+/** \brief A function that Sets up a secure element key derivation operation by
+ * specifying the algorithm and the source key sot
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] kdf_alg           The algorithm to be used for the key derivation
+ * \param[in] source_key        The key to be used as the source material for
+ *                              the key derivation
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_setup_t)(psa_drv_se_context_t *drv_context,
+                                                          void *op_context,
+                                                          psa_algorithm_t kdf_alg,
+                                                          psa_key_slot_number_t source_key);
+
+/** \brief A function that provides collateral (parameters) needed for a secure
+ * element key derivation or key agreement operation
+ *
+ * Since many key derivation algorithms require multiple parameters, it is
+ * expected that this function may be called multiple times for the same
+ * operation, each with a different algorithm-specific `collateral_id`
+ *
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] collateral_id     An ID for the collateral being provided
+ * \param[in] p_collateral      A buffer containing the collateral data
+ * \param[in] collateral_size   The size in bytes of the collateral
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_collateral_t)(void *op_context,
+                                                               uint32_t collateral_id,
+                                                               const uint8_t *p_collateral,
+                                                               size_t collateral_size);
+
+/** \brief A function that performs the final secure element key derivation
+ * step and place the generated key material in a slot
+ *
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] dest_key          The slot where the generated key material
+ *                              should be placed
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_derive_t)(void *op_context,
+                                                          psa_key_slot_number_t dest_key);
+
+/** \brief A function that performs the final step of a secure element key
+ * agreement and place the generated key material in a buffer
+ *
+ * \param[out] p_output         Buffer in which to place the generated key
+ *                              material
+ * \param[in] output_size       The size in bytes of `p_output`
+ * \param[out] p_output_length  Upon success, contains the number of bytes of
+ *                              key material placed in `p_output`
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_export_t)(void *op_context,
+                                                           uint8_t *p_output,
+                                                           size_t output_size,
+                                                           size_t *p_output_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to for secure
+ * element key derivation and agreement
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** The driver-specific size of the key derivation context */
+    size_t                           context_size;
+    /** Function that performs a key derivation setup */
+    psa_drv_se_key_derivation_setup_t      p_setup;
+    /** Function that sets key derivation collateral */
+    psa_drv_se_key_derivation_collateral_t p_collateral;
+    /** Function that performs a final key derivation step */
+    psa_drv_se_key_derivation_derive_t     p_derive;
+    /** Function that perforsm a final key derivation or agreement and
+     * exports the key */
+    psa_drv_se_key_derivation_export_t     p_export;
+} psa_drv_se_key_derivation_t;
+
+/**@}*/
+
+/** \defgroup se_registration Secure element driver registration
+ */
+/**@{*/
+
+/** A structure containing pointers to all the entry points of a
+ * secure element driver.
+ *
+ * Future versions of this specification may add extra substructures at
+ * the end of this structure.
+ */
+typedef struct {
+    /** The version of the driver HAL that this driver implements.
+     * This is a protection against loading driver binaries built against
+     * a different version of this specification.
+     * Use #PSA_DRV_SE_HAL_VERSION.
+     */
+    uint32_t hal_version;
+
+    /** The size of the driver's persistent data in bytes.
+     *
+     * This can be 0 if the driver does not need persistent data.
+     *
+     * See the documentation of psa_drv_se_context_t::persistent_data
+     * for more information about why and how a driver can use
+     * persistent data.
+     */
+    size_t persistent_data_size;
+
+    /** The driver initialization function.
+     *
+     * This function is called once during the initialization of the
+     * PSA Cryptography subsystem, before any other function of the
+     * driver is called. If this function returns a failure status,
+     * the driver will be unusable, at least until the next system reset.
+     *
+     * If this field is \c NULL, it is equivalent to a function that does
+     * nothing and returns #PSA_SUCCESS.
+     */
+    psa_drv_se_init_t p_init;
+
+    const psa_drv_se_key_management_t *key_management;
+    const psa_drv_se_mac_t *mac;
+    const psa_drv_se_cipher_t *cipher;
+    const psa_drv_se_aead_t *aead;
+    const psa_drv_se_asymmetric_t *asymmetric;
+    const psa_drv_se_key_derivation_t *derivation;
+} psa_drv_se_t;
+
+/** The current version of the secure element driver HAL.
+ */
+/* 0.0.0 patchlevel 5 */
+#define PSA_DRV_SE_HAL_VERSION 0x00000005
+
+/** Register an external cryptoprocessor (secure element) driver.
+ *
+ * This function is only intended to be used by driver code, not by
+ * application code. In implementations with separation between the
+ * PSA cryptography module and applications, this function should
+ * only be available to callers that run in the same memory space as
+ * the cryptography module, and should not be exposed to applications
+ * running in a different memory space.
+ *
+ * This function may be called before psa_crypto_init(). It is
+ * implementation-defined whether this function may be called
+ * after psa_crypto_init().
+ *
+ * \note Implementations store metadata about keys including the lifetime
+ *       value, which contains the driver's location indicator. Therefore,
+ *       from one instantiation of the PSA Cryptography
+ *       library to the next one, if there is a key in storage with a certain
+ *       lifetime value, you must always register the same driver (or an
+ *       updated version that communicates with the same secure element)
+ *       with the same location value.
+ *
+ * \param location      The location value through which this driver will
+ *                      be exposed to applications.
+ *                      This driver will be used for all keys such that
+ *                      `location == #PSA_KEY_LIFETIME_GET_LOCATION( lifetime )`.
+ *                      The value #PSA_KEY_LOCATION_LOCAL_STORAGE is reserved
+ *                      and may not be used for drivers. Implementations
+ *                      may reserve other values.
+ * \param[in] methods   The method table of the driver. This structure must
+ *                      remain valid for as long as the cryptography
+ *                      module keeps running. It is typically a global
+ *                      constant.
+ *
+ * \return #PSA_SUCCESS
+ *         The driver was successfully registered. Applications can now
+ *         use \p location to access keys through the methods passed to
+ *         this function.
+ * \return #PSA_ERROR_BAD_STATE
+ *         This function was called after the initialization of the
+ *         cryptography module, and this implementation does not support
+ *         driver registration at this stage.
+ * \return #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a registered driver for this value of \p location.
+ * \return #PSA_ERROR_INVALID_ARGUMENT
+ *         \p location is a reserved value.
+ * \return #PSA_ERROR_NOT_SUPPORTED
+ *         `methods->hal_version` is not supported by this implementation.
+ * \return #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \return #PSA_ERROR_NOT_PERMITTED
+ * \return #PSA_ERROR_STORAGE_FAILURE
+ * \return #PSA_ERROR_DATA_CORRUPT
+ */
+psa_status_t psa_register_se_driver(
+    psa_key_location_t location,
+    const psa_drv_se_t *methods);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_SE_DRIVER_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_sizes.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_sizes.h
new file mode 100644
index 00000000000..e2ae5965d4f
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_sizes.h
@@ -0,0 +1,1171 @@
+/**
+ * \file psa/crypto_sizes.h
+ *
+ * \brief PSA cryptography module: Mbed TLS buffer size macros
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains the definitions of macros that are useful to
+ * compute buffer sizes. The signatures and semantics of these macros
+ * are standardized, but the definitions are not, because they depend on
+ * the available algorithms and, in some cases, on permitted tolerances
+ * on buffer sizes.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, implementers should take care to ensure that
+ * the definitions that are exposed to applications match what the
+ * module implements.
+ *
+ * Macros that compute sizes whose values do not depend on the
+ * implementation are in crypto.h.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_SIZES_H
+#define PSA_CRYPTO_SIZES_H
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#define PSA_BITS_TO_BYTES(bits) (((bits) + 7) / 8)
+#define PSA_BYTES_TO_BITS(bytes) ((bytes) * 8)
+
+#define PSA_ROUND_UP_TO_MULTIPLE(block_size, length) \
+    (((length) + (block_size) - 1) / (block_size) * (block_size))
+
+/** The size of the output of psa_hash_finish(), in bytes.
+ *
+ * This is also the hash size that psa_hash_verify() expects.
+ *
+ * \param alg   A hash algorithm (\c PSA_ALG_XXX value such that
+ *              #PSA_ALG_IS_HASH(\p alg) is true), or an HMAC algorithm
+ *              (#PSA_ALG_HMAC(\c hash_alg) where \c hash_alg is a
+ *              hash algorithm).
+ *
+ * \return The hash size for the specified hash algorithm.
+ *         If the hash algorithm is not recognized, return 0.
+ */
+#define PSA_HASH_LENGTH(alg)                                        \
+    (                                                               \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD2 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD4 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD5 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_RIPEMD160 ? 20 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_1 ? 20 :          \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_224 ? 28 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_256 ? 32 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_384 ? 48 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_224 ? 28 :    \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_256 ? 32 :    \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_224 ? 28 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_256 ? 32 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_384 ? 48 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_512 ? 64 :       \
+        0)
+
+/** The input block size of a hash algorithm, in bytes.
+ *
+ * Hash algorithms process their input data in blocks. Hash operations will
+ * retain any partial blocks until they have enough input to fill the block or
+ * until the operation is finished.
+ * This affects the output from psa_hash_suspend().
+ *
+ * \param alg   A hash algorithm (\c PSA_ALG_XXX value such that
+ *              PSA_ALG_IS_HASH(\p alg) is true).
+ *
+ * \return      The block size in bytes for the specified hash algorithm.
+ *              If the hash algorithm is not recognized, return 0.
+ *              An implementation can return either 0 or the correct size for a
+ *              hash algorithm that it recognizes, but does not support.
+ */
+#define PSA_HASH_BLOCK_LENGTH(alg)                                  \
+    (                                                               \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD2 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD4 ? 64 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD5 ? 64 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_RIPEMD160 ? 64 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_1 ? 64 :          \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_224 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_256 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_384 ? 128 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512 ? 128 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_224 ? 128 :   \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_256 ? 128 :   \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_224 ? 144 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_256 ? 136 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_384 ? 104 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_512 ? 72 :       \
+        0)
+
+/** \def PSA_HASH_MAX_SIZE
+ *
+ * Maximum size of a hash.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a hash in bytes.
+ */
+/* Note: for HMAC-SHA-3, the block size is 144 bytes for HMAC-SHA3-226,
+ * 136 bytes for HMAC-SHA3-256, 104 bytes for SHA3-384, 72 bytes for
+ * HMAC-SHA3-512. */
+#if defined(PSA_WANT_ALG_SHA_512) || defined(PSA_WANT_ALG_SHA_384)
+#define PSA_HASH_MAX_SIZE 64
+#define PSA_HMAC_MAX_HASH_BLOCK_SIZE 128
+#else
+#define PSA_HASH_MAX_SIZE 32
+#define PSA_HMAC_MAX_HASH_BLOCK_SIZE 64
+#endif
+
+/** \def PSA_MAC_MAX_SIZE
+ *
+ * Maximum size of a MAC.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a MAC in bytes.
+ */
+/* All non-HMAC MACs have a maximum size that's smaller than the
+ * minimum possible value of PSA_HASH_MAX_SIZE in this implementation. */
+/* Note that the encoding of truncated MAC algorithms limits this value
+ * to 64 bytes.
+ */
+#define PSA_MAC_MAX_SIZE PSA_HASH_MAX_SIZE
+
+/** The length of a tag for an AEAD algorithm, in bytes.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to store the
+ * tag output from psa_aead_finish().
+ *
+ * See also #PSA_AEAD_TAG_MAX_SIZE.
+ *
+ * \param key_type            The type of the AEAD key.
+ * \param key_bits            The size of the AEAD key in bits.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    The tag length for the specified algorithm and key.
+ *                            If the AEAD algorithm does not have an identified
+ *                            tag that can be distinguished from the rest of
+ *                            the ciphertext, return 0.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_TAG_LENGTH(key_type, key_bits, alg)                        \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                            \
+     PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :                                     \
+     ((void) (key_bits), 0))
+
+/** The maximum tag size for all supported AEAD algorithms, in bytes.
+ *
+ * See also #PSA_AEAD_TAG_LENGTH(\p key_type, \p key_bits, \p alg).
+ */
+#define PSA_AEAD_TAG_MAX_SIZE       16
+
+/* The maximum size of an RSA key on this implementation, in bits.
+ * This is a vendor-specific macro.
+ *
+ * Mbed TLS does not set a hard limit on the size of RSA keys: any key
+ * whose parameters fit in a bignum is accepted. However large keys can
+ * induce a large memory usage and long computation times. Unlike other
+ * auxiliary macros in this file and in crypto.h, which reflect how the
+ * library is configured, this macro defines how the library is
+ * configured. This implementation refuses to import or generate an
+ * RSA key whose size is larger than the value defined here.
+ *
+ * Note that an implementation may set different size limits for different
+ * operations, and does not need to accept all key sizes up to the limit. */
+#define PSA_VENDOR_RSA_MAX_KEY_BITS 4096
+
+/* The maximum size of an ECC key on this implementation, in bits.
+ * This is a vendor-specific macro. */
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 521
+#elif defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 512
+#elif defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 448
+#elif defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 384
+#elif defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 384
+#elif defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 255
+#elif defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 224
+#elif defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 224
+#elif defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 192
+#elif defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 192
+#else
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 0
+#endif
+
+/** This macro returns the maximum supported length of the PSK for the
+ * TLS-1.2 PSK-to-MS key derivation
+ * (#PSA_ALG_TLS12_PSK_TO_MS(\c hash_alg)).
+ *
+ * The maximum supported length does not depend on the chosen hash algorithm.
+ *
+ * Quoting RFC 4279, Sect 5.3:
+ * TLS implementations supporting these ciphersuites MUST support
+ * arbitrary PSK identities up to 128 octets in length, and arbitrary
+ * PSKs up to 64 octets in length.  Supporting longer identities and
+ * keys is RECOMMENDED.
+ *
+ * Therefore, no implementation should define a value smaller than 64
+ * for #PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE.
+ */
+#define PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE 128
+
+/** The maximum size of a block cipher. */
+#define PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE 16
+
+/** The size of the output of psa_mac_sign_finish(), in bytes.
+ *
+ * This is also the MAC size that psa_mac_verify_finish() expects.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type      The type of the MAC key.
+ * \param key_bits      The size of the MAC key in bits.
+ * \param alg           A MAC algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \return              The MAC size for the specified algorithm with
+ *                      the specified key parameters.
+ * \return              0 if the MAC algorithm is not recognized.
+ * \return              Either 0 or the correct size for a MAC algorithm that
+ *                      the implementation recognizes, but does not support.
+ * \return              Unspecified if the key parameters are not consistent
+ *                      with the algorithm.
+ */
+#define PSA_MAC_LENGTH(key_type, key_bits, alg)                                   \
+    ((alg) & PSA_ALG_MAC_TRUNCATION_MASK ? PSA_MAC_TRUNCATED_LENGTH(alg) :        \
+     PSA_ALG_IS_HMAC(alg) ? PSA_HASH_LENGTH(PSA_ALG_HMAC_GET_HASH(alg)) :         \
+     PSA_ALG_IS_BLOCK_CIPHER_MAC(alg) ? PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     ((void)(key_type), (void)(key_bits), 0))
+
+/** The maximum size of the output of psa_aead_encrypt(), in bytes.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_encrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the ciphertext may be smaller.
+ *
+ * See also #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p plaintext_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_SIZE(key_type, alg, plaintext_length) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                      \
+     (plaintext_length) + PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :          \
+     0)
+
+/** A sufficient output buffer size for psa_aead_encrypt(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is guaranteed
+ * that psa_aead_encrypt() will not fail due to an insufficient buffer size.
+ *
+ * \note This macro returns a compile-time constant if its arguments are
+ *       compile-time constants.
+ *
+ * See also #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\p key_type, \p alg,
+ * \p plaintext_length).
+ *
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    A sufficient output buffer size for any of the
+ *                            supported key types and AEAD algorithms.
+ *
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(plaintext_length)          \
+    ((plaintext_length) + PSA_AEAD_TAG_MAX_SIZE)
+
+
+/** The maximum size of the output of psa_aead_decrypt(), in bytes.
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_decrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the plaintext may be smaller.
+ *
+ * See also #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p ciphertext_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param ciphertext_length   Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_SIZE(key_type, alg, ciphertext_length) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&                      \
+         (ciphertext_length) > PSA_ALG_AEAD_GET_TAG_LENGTH(alg) ?      \
+         (ciphertext_length) - PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :      \
+     0)
+
+/** A sufficient output buffer size for psa_aead_decrypt(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the plaintext buffer is at least this large, it is guaranteed
+ * that psa_aead_decrypt() will not fail due to an insufficient buffer size.
+ *
+ * \note This macro returns a compile-time constant if its arguments are
+ *       compile-time constants.
+ *
+ * See also #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\p key_type, \p alg,
+ * \p ciphertext_length).
+ *
+ * \param ciphertext_length   Size of the ciphertext in bytes.
+ *
+ * \return                    A sufficient output buffer size for any of the
+ *                            supported key types and AEAD algorithms.
+ *
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(ciphertext_length)     \
+     (ciphertext_length)
+
+/** The default nonce size for an AEAD algorithm, in bytes.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to
+ * store the nonce output from #psa_aead_generate_nonce().
+ *
+ * See also #PSA_AEAD_NONCE_MAX_SIZE.
+ *
+ * \note This is not the maximum size of nonce supported as input to
+ *       #psa_aead_set_nonce(), #psa_aead_encrypt() or #psa_aead_decrypt(),
+ *       just the default size that is generated by #psa_aead_generate_nonce().
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  A symmetric key type that is compatible with
+ *                  algorithm \p alg.
+ *
+ * \param alg       An AEAD algorithm (\c PSA_ALG_XXX value such that
+ *                  #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return The default nonce size for the specified key type and algorithm.
+ *         If the key type or AEAD algorithm is not recognized,
+ *         or the parameters are incompatible, return 0.
+ */
+#define PSA_AEAD_NONCE_LENGTH(key_type, alg) \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) == 16 ? \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_CCM) ? 13 : \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_GCM) ? 12 : \
+          0 : \
+     (key_type) == PSA_KEY_TYPE_CHACHA20 && \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_CHACHA20_POLY1305) ? 12 : \
+     0)
+
+/** The maximum default nonce size among all supported pairs of key types and
+ *  AEAD algorithms, in bytes.
+ *
+ * This is equal to or greater than any value that #PSA_AEAD_NONCE_LENGTH()
+ * may return.
+ *
+ * \note This is not the maximum size of nonce supported as input to
+ *       #psa_aead_set_nonce(), #psa_aead_encrypt() or #psa_aead_decrypt(),
+ *       just the largest size that may be generated by
+ *       #psa_aead_generate_nonce().
+ */
+#define PSA_AEAD_NONCE_MAX_SIZE 13
+
+/** A sufficient output buffer size for psa_aead_update().
+ *
+ * If the size of the output buffer is at least this large, it is
+ * guaranteed that psa_aead_update() will not fail due to an
+ * insufficient buffer size. The actual size of the output may be smaller
+ * in any given call.
+ *
+ * See also #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param input_length        Size of the input in bytes.
+ *
+ * \return                    A sufficient output buffer size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+/* For all the AEAD modes defined in this specification, it is possible
+ * to emit output without delay. However, hardware may not always be
+ * capable of this. So for modes based on a block cipher, allow the
+ * implementation to delay the output until it has a full block. */
+#define PSA_AEAD_UPDATE_OUTPUT_SIZE(key_type, alg, input_length)                             \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                                             \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?                                              \
+         PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type), (input_length)) : \
+         (input_length) : \
+     0)
+
+/** A sufficient output buffer size for psa_aead_update(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_aead_update() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_AEAD_UPDATE_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length      Size of the input in bytes.
+ */
+#define PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(input_length)                           \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, (input_length)))
+
+/** A sufficient ciphertext buffer size for psa_aead_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_finish() will not fail due to an
+ * insufficient ciphertext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * See also #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type            A symmetric key type that is
+                              compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient ciphertext buffer size for the
+ *                            specified algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_FINISH_OUTPUT_SIZE(key_type, alg) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&  \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?    \
+         PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     0)
+
+/** A sufficient ciphertext buffer size for psa_aead_finish(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * See also #PSA_AEAD_FINISH_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_AEAD_FINISH_OUTPUT_MAX_SIZE     (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+/** A sufficient plaintext buffer size for psa_aead_verify().
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_verify() will not fail due to an
+ * insufficient plaintext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * See also #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient plaintext buffer size for the
+ *                            specified algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_SIZE(key_type, alg) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&  \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?    \
+         PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     0)
+
+/** A sufficient plaintext buffer size for psa_aead_verify(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * See also #PSA_AEAD_VERIFY_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE     (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+#define PSA_RSA_MINIMUM_PADDING_SIZE(alg)                         \
+    (PSA_ALG_IS_RSA_OAEP(alg) ?                                   \
+     2 * PSA_HASH_LENGTH(PSA_ALG_RSA_OAEP_GET_HASH(alg)) + 1 :    \
+     11 /*PKCS#1v1.5*/)
+
+/**
+ * \brief ECDSA signature size for a given curve bit size
+ *
+ * \param curve_bits    Curve size in bits.
+ * \return              Signature size in bytes.
+ *
+ * \note This macro returns a compile-time constant if its argument is one.
+ */
+#define PSA_ECDSA_SIGNATURE_SIZE(curve_bits)    \
+    (PSA_BITS_TO_BYTES(curve_bits) * 2)
+
+/** Sufficient signature buffer size for psa_sign_hash().
+ *
+ * This macro returns a sufficient buffer size for a signature using a key
+ * of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the signature may be smaller
+ * (some algorithms produce a variable-size signature).
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The signature algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_sign_hash() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_SIGN_OUTPUT_SIZE(key_type, key_bits, alg)        \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? ((void)alg, PSA_BITS_TO_BYTES(key_bits)) : \
+     PSA_KEY_TYPE_IS_ECC(key_type) ? PSA_ECDSA_SIGNATURE_SIZE(key_bits) : \
+     ((void)alg, 0))
+
+#define PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE     \
+    PSA_ECDSA_SIGNATURE_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS)
+
+/** \def PSA_SIGNATURE_MAX_SIZE
+ *
+ * Maximum size of an asymmetric signature.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a signature in bytes.
+ */
+#define PSA_SIGNATURE_MAX_SIZE                               \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS) > PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE ? \
+     PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS) :                   \
+     PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE)
+
+/** Sufficient output buffer size for psa_asymmetric_encrypt().
+ *
+ * This macro returns a sufficient buffer size for a ciphertext produced using
+ * a key of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the ciphertext may be smaller, depending
+ * on the algorithm.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The asymmetric encryption algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_asymmetric_encrypt() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(key_type, key_bits, alg)     \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ?                                    \
+     ((void)alg, PSA_BITS_TO_BYTES(key_bits)) :                         \
+     0)
+
+/** A sufficient output buffer size for psa_asymmetric_encrypt(), for any
+ *  supported asymmetric encryption.
+ *
+ * See also #PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(\p key_type, \p key_bits, \p alg).
+ */
+/* This macro assumes that RSA is the only supported asymmetric encryption. */
+#define PSA_ASYMMETRIC_ENCRYPT_OUTPUT_MAX_SIZE          \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS))
+
+/** Sufficient output buffer size for psa_asymmetric_decrypt().
+ *
+ * This macro returns a sufficient buffer size for a plaintext produced using
+ * a key of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the plaintext may be smaller, depending
+ * on the algorithm.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The asymmetric encryption algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_asymmetric_decrypt() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(key_type, key_bits, alg)     \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ?                                    \
+     PSA_BITS_TO_BYTES(key_bits) - PSA_RSA_MINIMUM_PADDING_SIZE(alg) :  \
+     0)
+
+/** A sufficient output buffer size for psa_asymmetric_decrypt(), for any
+ *  supported asymmetric decryption.
+ *
+ * This macro assumes that RSA is the only supported asymmetric encryption.
+ *
+ * See also #PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(\p key_type, \p key_bits, \p alg).
+ */
+#define PSA_ASYMMETRIC_DECRYPT_OUTPUT_MAX_SIZE          \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS))
+
+/* Maximum size of the ASN.1 encoding of an INTEGER with the specified
+ * number of bits.
+ *
+ * This definition assumes that bits <= 2^19 - 9 so that the length field
+ * is at most 3 bytes. The length of the encoding is the length of the
+ * bit string padded to a whole number of bytes plus:
+ * - 1 type byte;
+ * - 1 to 3 length bytes;
+ * - 0 to 1 bytes of leading 0 due to the sign bit.
+ */
+#define PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(bits)      \
+    ((bits) / 8 + 5)
+
+/* Maximum size of the export encoding of an RSA public key.
+ * Assumes that the public exponent is less than 2^32.
+ *
+ * RSAPublicKey  ::=  SEQUENCE  {
+ *    modulus            INTEGER,    -- n
+ *    publicExponent     INTEGER  }  -- e
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - n : INTEGER;
+ * - 7 bytes for the public exponent.
+ */
+#define PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) + 11)
+
+/* Maximum size of the export encoding of an RSA key pair.
+ * Assumes thatthe public exponent is less than 2^32 and that the size
+ * difference between the two primes is at most 1 bit.
+ *
+ * RSAPrivateKey ::= SEQUENCE {
+ *     version           Version,  -- 0
+ *     modulus           INTEGER,  -- N-bit
+ *     publicExponent    INTEGER,  -- 32-bit
+ *     privateExponent   INTEGER,  -- N-bit
+ *     prime1            INTEGER,  -- N/2-bit
+ *     prime2            INTEGER,  -- N/2-bit
+ *     exponent1         INTEGER,  -- N/2-bit
+ *     exponent2         INTEGER,  -- N/2-bit
+ *     coefficient       INTEGER,  -- N/2-bit
+ * }
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - 3 bytes of version;
+ * - 7 half-size INTEGERs plus 2 full-size INTEGERs,
+ *   overapproximated as 9 half-size INTEGERS;
+ * - 7 bytes for the public exponent.
+ */
+#define PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (9 * PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE((key_bits) / 2 + 1) + 14)
+
+/* Maximum size of the export encoding of a DSA public key.
+ *
+ * SubjectPublicKeyInfo  ::=  SEQUENCE  {
+ *      algorithm            AlgorithmIdentifier,
+ *      subjectPublicKey     BIT STRING  } -- contains DSAPublicKey
+ * AlgorithmIdentifier  ::=  SEQUENCE  {
+ *      algorithm               OBJECT IDENTIFIER,
+ *      parameters              Dss-Parms  } -- SEQUENCE of 3 INTEGERs
+ * DSAPublicKey  ::=  INTEGER -- public key, Y
+ *
+ * - 3 * 4 bytes of SEQUENCE overhead;
+ * - 1 + 1 + 7 bytes of algorithm (DSA OID);
+ * - 4 bytes of BIT STRING overhead;
+ * - 3 full-size INTEGERs (p, g, y);
+ * - 1 + 1 + 32 bytes for 1 sub-size INTEGER (q <= 256 bits).
+ */
+#define PSA_KEY_EXPORT_DSA_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) * 3 + 59)
+
+/* Maximum size of the export encoding of a DSA key pair.
+ *
+ * DSAPrivateKey ::= SEQUENCE {
+ *     version             Version,  -- 0
+ *     prime               INTEGER,  -- p
+ *     subprime            INTEGER,  -- q
+ *     generator           INTEGER,  -- g
+ *     public              INTEGER,  -- y
+ *     private             INTEGER,  -- x
+ * }
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - 3 bytes of version;
+ * - 3 full-size INTEGERs (p, g, y);
+ * - 2 * (1 + 1 + 32) bytes for 2 sub-size INTEGERs (q, x <= 256 bits).
+ */
+#define PSA_KEY_EXPORT_DSA_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) * 3 + 75)
+
+/* Maximum size of the export encoding of an ECC public key.
+ *
+ * The representation of an ECC public key is:
+ *      - The byte 0x04;
+ *      - `x_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - `y_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - where m is the bit size associated with the curve.
+ *
+ * - 1 byte + 2 * point size.
+ */
+#define PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (2 * PSA_BITS_TO_BYTES(key_bits) + 1)
+
+/* Maximum size of the export encoding of an ECC key pair.
+ *
+ * An ECC key pair is represented by the secret value.
+ */
+#define PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (PSA_BITS_TO_BYTES(key_bits))
+
+/** Sufficient output buffer size for psa_export_key() or
+ * psa_export_public_key().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * The following code illustrates how to allocate enough memory to export
+ * a key by querying the key type and size at runtime.
+ * \code{c}
+ * psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ * psa_status_t status;
+ * status = psa_get_key_attributes(key, &attributes);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * psa_key_type_t key_type = psa_get_key_type(&attributes);
+ * size_t key_bits = psa_get_key_bits(&attributes);
+ * size_t buffer_size = PSA_EXPORT_KEY_OUTPUT_SIZE(key_type, key_bits);
+ * psa_reset_key_attributes(&attributes);
+ * uint8_t *buffer = malloc(buffer_size);
+ * if (buffer == NULL) handle_error(...);
+ * size_t buffer_length;
+ * status = psa_export_key(key, buffer, buffer_size, &buffer_length);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * \endcode
+ *
+ * \param key_type  A supported key type.
+ * \param key_bits  The size of the key in bits.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_export_key() or psa_export_public_key() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the return value is unspecified.
+ */
+#define PSA_EXPORT_KEY_OUTPUT_SIZE(key_type, key_bits)                                              \
+    (PSA_KEY_TYPE_IS_UNSTRUCTURED(key_type) ? PSA_BITS_TO_BYTES(key_bits) :                         \
+     (key_type) == PSA_KEY_TYPE_RSA_KEY_PAIR ? PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(key_bits) :     \
+     (key_type) == PSA_KEY_TYPE_RSA_PUBLIC_KEY ? PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     (key_type) == PSA_KEY_TYPE_DSA_KEY_PAIR ? PSA_KEY_EXPORT_DSA_KEY_PAIR_MAX_SIZE(key_bits) :     \
+     (key_type) == PSA_KEY_TYPE_DSA_PUBLIC_KEY ? PSA_KEY_EXPORT_DSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_ECC_KEY_PAIR(key_type) ? PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(key_bits) :      \
+     PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY(key_type) ? PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits) :  \
+     0)
+
+/** Sufficient output buffer size for psa_export_public_key().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * The following code illustrates how to allocate enough memory to export
+ * a public key by querying the key type and size at runtime.
+ * \code{c}
+ * psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ * psa_status_t status;
+ * status = psa_get_key_attributes(key, &attributes);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * psa_key_type_t key_type = psa_get_key_type(&attributes);
+ * size_t key_bits = psa_get_key_bits(&attributes);
+ * size_t buffer_size = PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(key_type, key_bits);
+ * psa_reset_key_attributes(&attributes);
+ * uint8_t *buffer = malloc(buffer_size);
+ * if (buffer == NULL) handle_error(...);
+ * size_t buffer_length;
+ * status = psa_export_public_key(key, buffer, buffer_size, &buffer_length);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * \endcode
+ *
+ * \param key_type      A public key or key pair key type.
+ * \param key_bits      The size of the key in bits.
+ *
+ * \return              If the parameters are valid and supported, return
+ *                      a buffer size in bytes that guarantees that
+ *                      psa_export_public_key() will not fail with
+ *                      #PSA_ERROR_BUFFER_TOO_SMALL.
+ *                      If the parameters are a valid combination that is not
+ *                      supported, return either a sensible size or 0.
+ *                      If the parameters are not valid,
+ *                      the return value is unspecified.
+ *
+ *                      If the parameters are valid and supported,
+ *                      return the same result as
+ *                      #PSA_EXPORT_KEY_OUTPUT_SIZE(
+ *                          \p #PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(\p key_type),
+ *                          \p key_bits).
+ */
+#define PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(key_type, key_bits)                           \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_ECC(key_type) ? PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     0)
+
+/** Sufficient buffer size for exporting any asymmetric key pair.
+ *
+ * This macro expands to a compile-time constant integer. This value is
+ * a sufficient buffer size when calling psa_export_key() to export any
+ * asymmetric key pair, regardless of the exact key type and key size.
+ *
+ * See also #PSA_EXPORT_KEY_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_EXPORT_KEY_PAIR_MAX_SIZE                                            \
+    (PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) >        \
+     PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS) ?      \
+     PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) :        \
+     PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** Sufficient buffer size for exporting any asymmetric public key.
+ *
+ * This macro expands to a compile-time constant integer. This value is
+ * a sufficient buffer size when calling psa_export_key() or
+ * psa_export_public_key() to export any asymmetric public key,
+ * regardless of the exact key type and key size.
+ *
+ * See also #PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_EXPORT_PUBLIC_KEY_MAX_SIZE                                          \
+    (PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) >      \
+     PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS) ?    \
+     PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) :      \
+     PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** Sufficient output buffer size for psa_raw_key_agreement().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * See also #PSA_RAW_KEY_AGREEMENT_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type      A supported key type.
+ * \param key_bits      The size of the key in bits.
+ *
+ * \return              If the parameters are valid and supported, return
+ *                      a buffer size in bytes that guarantees that
+ *                      psa_raw_key_agreement() will not fail with
+ *                      #PSA_ERROR_BUFFER_TOO_SMALL.
+ *                      If the parameters are a valid combination that
+ *                      is not supported, return either a sensible size or 0.
+ *                      If the parameters are not valid,
+ *                      the return value is unspecified.
+ */
+/* FFDH is not yet supported in PSA. */
+#define PSA_RAW_KEY_AGREEMENT_OUTPUT_SIZE(key_type, key_bits)   \
+    (PSA_KEY_TYPE_IS_ECC_KEY_PAIR(key_type) ?                   \
+     PSA_BITS_TO_BYTES(key_bits) :                              \
+     0)
+
+/** Maximum size of the output from psa_raw_key_agreement().
+ *
+ * This macro expands to a compile-time constant integer. This value is the
+ * maximum size of the output any raw key agreement algorithm, in bytes.
+ *
+ * See also #PSA_RAW_KEY_AGREEMENT_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_RAW_KEY_AGREEMENT_OUTPUT_MAX_SIZE   \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** The default IV size for a cipher algorithm, in bytes.
+ *
+ * The IV that is generated as part of a call to #psa_cipher_encrypt() is always
+ * the default IV length for the algorithm.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to
+ * store the IV output from #psa_cipher_generate_iv() when using
+ * a multi-part cipher operation.
+ *
+ * See also #PSA_CIPHER_IV_MAX_SIZE.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  A symmetric key type that is compatible with algorithm \p alg.
+ *
+ * \param alg       A cipher algorithm (\c PSA_ALG_XXX value such that #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \return The default IV size for the specified key type and algorithm.
+ *         If the algorithm does not use an IV, return 0.
+ *         If the key type or cipher algorithm is not recognized,
+ *         or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_IV_LENGTH(key_type, alg) \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) > 1 && \
+        ((alg) == PSA_ALG_CTR || \
+         (alg) == PSA_ALG_CFB || \
+         (alg) == PSA_ALG_OFB || \
+         (alg) == PSA_ALG_XTS || \
+         (alg) == PSA_ALG_CBC_NO_PADDING || \
+         (alg) == PSA_ALG_CBC_PKCS7) ? PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     (key_type) == PSA_KEY_TYPE_CHACHA20 && \
+         (alg) == PSA_ALG_STREAM_CIPHER ? 12 : \
+     0)
+
+/** The maximum IV size for all supported cipher algorithms, in bytes.
+ *
+ * See also #PSA_CIPHER_IV_LENGTH().
+ */
+#define PSA_CIPHER_IV_MAX_SIZE 16
+
+/** The maximum size of the output of psa_cipher_encrypt(), in bytes.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_encrypt() will not fail due to an insufficient buffer size.
+ * Depending on the algorithm, the actual size of the output might be smaller.
+ *
+ * See also #PSA_CIPHER_ENCRYPT_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible,
+ *                      return 0.
+ */
+#define PSA_CIPHER_ENCRYPT_OUTPUT_SIZE(key_type, alg, input_length)             \
+    (alg == PSA_ALG_CBC_PKCS7 ?                                                 \
+     (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) != 0 ?                            \
+     PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type),          \
+                              (input_length) + 1) +                             \
+     PSA_CIPHER_IV_LENGTH((key_type), (alg)) : 0) :                             \
+     (PSA_ALG_IS_CIPHER(alg) ?                                                  \
+      (input_length) + PSA_CIPHER_IV_LENGTH((key_type), (alg)) :                \
+     0))
+
+/** A sufficient output buffer size for psa_cipher_encrypt(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_encrypt() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_ENCRYPT_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ *
+ */
+#define PSA_CIPHER_ENCRYPT_OUTPUT_MAX_SIZE(input_length)                        \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE,                  \
+                              (input_length) + 1) +                             \
+     PSA_CIPHER_IV_MAX_SIZE)
+
+/** The maximum size of the output of psa_cipher_decrypt(), in bytes.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_decrypt() will not fail due to an insufficient buffer size.
+ * Depending on the algorithm, the actual size of the output might be smaller.
+ *
+ * See also #PSA_CIPHER_DECRYPT_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible,
+ *                      return 0.
+ */
+#define PSA_CIPHER_DECRYPT_OUTPUT_SIZE(key_type, alg, input_length)                 \
+    (PSA_ALG_IS_CIPHER(alg) &&                                                      \
+     ((key_type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC ? \
+     (input_length) :                                                               \
+     0)
+
+/** A sufficient output buffer size for psa_cipher_decrypt(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_decrypt() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_DECRYPT_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ */
+#define PSA_CIPHER_DECRYPT_OUTPUT_MAX_SIZE(input_length)    \
+    (input_length)
+
+/** A sufficient output buffer size for psa_cipher_update().
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_update() will not fail due to an insufficient buffer size.
+ * The actual size of the output might be smaller in any given call.
+ *
+ * See also #PSA_CIPHER_UPDATE_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_UPDATE_OUTPUT_SIZE(key_type, alg, input_length)              \
+    (PSA_ALG_IS_CIPHER(alg) ?                                                   \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) != 0 ?                             \
+     (((alg) == PSA_ALG_CBC_PKCS7      ||                                       \
+       (alg) == PSA_ALG_CBC_NO_PADDING ||                                       \
+       (alg) == PSA_ALG_ECB_NO_PADDING) ?                                       \
+      PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type),         \
+                                input_length) :                                 \
+      (input_length)) : 0) :                                                    \
+     0)
+
+/** A sufficient output buffer size for psa_cipher_update(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_update() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_UPDATE_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ */
+#define PSA_CIPHER_UPDATE_OUTPUT_MAX_SIZE(input_length)     \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, input_length))
+
+/** A sufficient ciphertext buffer size for psa_cipher_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_cipher_finish() will not fail due to an insufficient
+ * ciphertext buffer size. The actual size of the output might be smaller in
+ * any given call.
+ *
+ * See also #PSA_CIPHER_FINISH_OUTPUT_MAX_SIZE().
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_FINISH_OUTPUT_SIZE(key_type, alg)    \
+    (PSA_ALG_IS_CIPHER(alg) ?                           \
+     (alg == PSA_ALG_CBC_PKCS7 ?                        \
+      PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) :         \
+      0) :                                              \
+     0)
+
+/** A sufficient ciphertext buffer size for psa_cipher_finish(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * See also #PSA_CIPHER_FINISH_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_CIPHER_FINISH_OUTPUT_MAX_SIZE           \
+    (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+#endif /* PSA_CRYPTO_SIZES_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_struct.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_struct.h
new file mode 100644
index 00000000000..23a02a5d8ef
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_struct.h
@@ -0,0 +1,478 @@
+/**
+ * \file psa/crypto_struct.h
+ *
+ * \brief PSA cryptography module: Mbed TLS structured type implementations
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains the definitions of some data structures with
+ * implementation-specific definitions.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, it is expected that the front-end and the back-end
+ * would have different versions of this file.
+ *
+ * <h3>Design notes about multipart operation structures</h3>
+ *
+ * For multipart operations without driver delegation support, each multipart
+ * operation structure contains a `psa_algorithm_t alg` field which indicates
+ * which specific algorithm the structure is for. When the structure is not in
+ * use, `alg` is 0. Most of the structure consists of a union which is
+ * discriminated by `alg`.
+ *
+ * For multipart operations with driver delegation support, each multipart
+ * operation structure contains an `unsigned int id` field indicating which
+ * driver got assigned to do the operation. When the structure is not in use,
+ * 'id' is 0. The structure contains also a driver context which is the union
+ * of the contexts of all drivers able to handle the type of multipart
+ * operation.
+ *
+ * Note that when `alg` or `id` is 0, the content of other fields is undefined.
+ * In particular, it is not guaranteed that a freshly-initialized structure
+ * is all-zero: we initialize structures to something like `{0, 0}`, which
+ * is only guaranteed to initializes the first member of the union;
+ * GCC and Clang initialize the whole structure to 0 (at the time of writing),
+ * but MSVC and CompCert don't.
+ *
+ * In Mbed Crypto, multipart operation structures live independently from
+ * the key. This allows Mbed Crypto to free the key objects when destroying
+ * a key slot. If a multipart operation needs to remember the key after
+ * the setup function returns, the operation structure needs to contain a
+ * copy of the key.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_STRUCT_H
+#define PSA_CRYPTO_STRUCT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/cmac.h"
+#include "mbedtls/gcm.h"
+
+/* Include the context definition for the compiled-in drivers for the primitive
+ * algorithms. */
+#include "psa/crypto_driver_contexts_primitives.h"
+
+struct psa_hash_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_driver_wrappers.h.
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. the driver context is not active, in use). */
+    unsigned int id;
+    psa_driver_hash_context_t ctx;
+};
+
+#define PSA_HASH_OPERATION_INIT {0, {0}}
+static inline struct psa_hash_operation_s psa_hash_operation_init( void )
+{
+    const struct psa_hash_operation_s v = PSA_HASH_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_cipher_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_crypto_driver_wrappers.h
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. none of the driver contexts are active). */
+    unsigned int id;
+
+    unsigned int iv_required : 1;
+    unsigned int iv_set : 1;
+
+    uint8_t default_iv_length;
+
+    psa_driver_cipher_context_t ctx;
+};
+
+#define PSA_CIPHER_OPERATION_INIT {0, 0, 0, 0, {0}}
+static inline struct psa_cipher_operation_s psa_cipher_operation_init( void )
+{
+    const struct psa_cipher_operation_s v = PSA_CIPHER_OPERATION_INIT;
+    return( v );
+}
+
+/* Include the context definition for the compiled-in drivers for the composite
+ * algorithms. */
+#include "psa/crypto_driver_contexts_composites.h"
+
+struct psa_mac_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_driver_wrappers.h
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. none of the driver contexts are active). */
+    unsigned int id;
+    uint8_t mac_size;
+    unsigned int is_sign : 1;
+    psa_driver_mac_context_t ctx;
+};
+
+#define PSA_MAC_OPERATION_INIT {0, 0, 0, {0}}
+static inline struct psa_mac_operation_s psa_mac_operation_init( void )
+{
+    const struct psa_mac_operation_s v = PSA_MAC_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_aead_operation_s
+{
+    psa_algorithm_t alg;
+    unsigned int key_set : 1;
+    unsigned int iv_set : 1;
+    uint8_t iv_size;
+    uint8_t block_size;
+    union
+    {
+        unsigned dummy; /* Enable easier initializing of the union. */
+        mbedtls_cipher_context_t cipher;
+    } ctx;
+};
+
+#define PSA_AEAD_OPERATION_INIT {0, 0, 0, 0, 0, {0}}
+static inline struct psa_aead_operation_s psa_aead_operation_init( void )
+{
+    const struct psa_aead_operation_s v = PSA_AEAD_OPERATION_INIT;
+    return( v );
+}
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HKDF)
+typedef struct
+{
+    uint8_t *info;
+    size_t info_length;
+#if PSA_HASH_MAX_SIZE > 0xff
+#error "PSA_HASH_MAX_SIZE does not fit in uint8_t"
+#endif
+    uint8_t offset_in_block;
+    uint8_t block_number;
+    unsigned int state : 2;
+    unsigned int info_set : 1;
+    uint8_t output_block[PSA_HASH_MAX_SIZE];
+    uint8_t prk[PSA_HASH_MAX_SIZE];
+    struct psa_mac_operation_s hmac;
+} psa_hkdf_key_derivation_t;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HKDF */
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS)
+typedef enum
+{
+    PSA_TLS12_PRF_STATE_INIT,       /* no input provided */
+    PSA_TLS12_PRF_STATE_SEED_SET,   /* seed has been set */
+    PSA_TLS12_PRF_STATE_KEY_SET,    /* key has been set */
+    PSA_TLS12_PRF_STATE_LABEL_SET,  /* label has been set */
+    PSA_TLS12_PRF_STATE_OUTPUT      /* output has been started */
+} psa_tls12_prf_key_derivation_state_t;
+
+typedef struct psa_tls12_prf_key_derivation_s
+{
+#if PSA_HASH_MAX_SIZE > 0xff
+#error "PSA_HASH_MAX_SIZE does not fit in uint8_t"
+#endif
+
+    /* Indicates how many bytes in the current HMAC block have
+     * not yet been read by the user. */
+    uint8_t left_in_block;
+
+    /* The 1-based number of the block. */
+    uint8_t block_number;
+
+    psa_tls12_prf_key_derivation_state_t state;
+
+    uint8_t *secret;
+    size_t secret_length;
+    uint8_t *seed;
+    size_t seed_length;
+    uint8_t *label;
+    size_t label_length;
+
+    uint8_t Ai[PSA_HASH_MAX_SIZE];
+
+    /* `HMAC_hash( prk, A(i) + seed )` in the notation of RFC 5246, Sect. 5. */
+    uint8_t output_block[PSA_HASH_MAX_SIZE];
+} psa_tls12_prf_key_derivation_t;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) ||
+        * MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS */
+
+struct psa_key_derivation_s
+{
+    psa_algorithm_t alg;
+    unsigned int can_output_key : 1;
+    size_t capacity;
+    union
+    {
+        /* Make the union non-empty even with no supported algorithms. */
+        uint8_t dummy;
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HKDF)
+        psa_hkdf_key_derivation_t hkdf;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS)
+        psa_tls12_prf_key_derivation_t tls12_prf;
+#endif
+    } ctx;
+};
+
+/* This only zeroes out the first byte in the union, the rest is unspecified. */
+#define PSA_KEY_DERIVATION_OPERATION_INIT {0, 0, 0, {0}}
+static inline struct psa_key_derivation_s psa_key_derivation_operation_init( void )
+{
+    const struct psa_key_derivation_s v = PSA_KEY_DERIVATION_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_key_policy_s
+{
+    psa_key_usage_t usage;
+    psa_algorithm_t alg;
+    psa_algorithm_t alg2;
+};
+typedef struct psa_key_policy_s psa_key_policy_t;
+
+#define PSA_KEY_POLICY_INIT {0, 0, 0}
+static inline struct psa_key_policy_s psa_key_policy_init( void )
+{
+    const struct psa_key_policy_s v = PSA_KEY_POLICY_INIT;
+    return( v );
+}
+
+/* The type used internally for key sizes.
+ * Public interfaces use size_t, but internally we use a smaller type. */
+typedef uint16_t psa_key_bits_t;
+/* The maximum value of the type used to represent bit-sizes.
+ * This is used to mark an invalid key size. */
+#define PSA_KEY_BITS_TOO_LARGE ( (psa_key_bits_t) ( -1 ) )
+/* The maximum size of a key in bits.
+ * Currently defined as the maximum that can be represented, rounded down
+ * to a whole number of bytes.
+ * This is an uncast value so that it can be used in preprocessor
+ * conditionals. */
+#define PSA_MAX_KEY_BITS 0xfff8
+
+/** A mask of flags that can be stored in key attributes.
+ *
+ * This type is also used internally to store flags in slots. Internal
+ * flags are defined in library/psa_crypto_core.h. Internal flags may have
+ * the same value as external flags if they are properly handled during
+ * key creation and in psa_get_key_attributes.
+ */
+typedef uint16_t psa_key_attributes_flag_t;
+
+#define MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER     \
+    ( (psa_key_attributes_flag_t) 0x0001 )
+
+/* A mask of key attribute flags used externally only.
+ * Only meant for internal checks inside the library. */
+#define MBEDTLS_PSA_KA_MASK_EXTERNAL_ONLY (      \
+        MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER |    \
+        0 )
+
+/* A mask of key attribute flags used both internally and externally.
+ * Currently there aren't any. */
+#define MBEDTLS_PSA_KA_MASK_DUAL_USE (          \
+        0 )
+
+typedef struct
+{
+    psa_key_type_t type;
+    psa_key_bits_t bits;
+    psa_key_lifetime_t lifetime;
+    mbedtls_svc_key_id_t id;
+    psa_key_policy_t policy;
+    psa_key_attributes_flag_t flags;
+} psa_core_key_attributes_t;
+
+#define PSA_CORE_KEY_ATTRIBUTES_INIT {PSA_KEY_TYPE_NONE, 0, PSA_KEY_LIFETIME_VOLATILE, MBEDTLS_SVC_KEY_ID_INIT, PSA_KEY_POLICY_INIT, 0}
+
+struct psa_key_attributes_s
+{
+    psa_core_key_attributes_t core;
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+    psa_key_slot_number_t slot_number;
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+    void *domain_parameters;
+    size_t domain_parameters_size;
+};
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+#define PSA_KEY_ATTRIBUTES_INIT {PSA_CORE_KEY_ATTRIBUTES_INIT, 0, NULL, 0}
+#else
+#define PSA_KEY_ATTRIBUTES_INIT {PSA_CORE_KEY_ATTRIBUTES_INIT, NULL, 0}
+#endif
+
+static inline struct psa_key_attributes_s psa_key_attributes_init( void )
+{
+    const struct psa_key_attributes_s v = PSA_KEY_ATTRIBUTES_INIT;
+    return( v );
+}
+
+static inline void psa_set_key_id( psa_key_attributes_t *attributes,
+                                   mbedtls_svc_key_id_t key )
+{
+    psa_key_lifetime_t lifetime = attributes->core.lifetime;
+
+    attributes->core.id = key;
+
+    if( PSA_KEY_LIFETIME_IS_VOLATILE( lifetime ) )
+    {
+        attributes->core.lifetime =
+            PSA_KEY_LIFETIME_FROM_PERSISTENCE_AND_LOCATION(
+                PSA_KEY_LIFETIME_PERSISTENT,
+                PSA_KEY_LIFETIME_GET_LOCATION( lifetime ) );
+    }
+}
+
+static inline mbedtls_svc_key_id_t psa_get_key_id(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.id );
+}
+
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+static inline void mbedtls_set_key_owner_id( psa_key_attributes_t *attributes,
+                                             mbedtls_key_owner_id_t owner )
+{
+    attributes->core.id.owner = owner;
+}
+#endif
+
+static inline void psa_set_key_lifetime(psa_key_attributes_t *attributes,
+                                        psa_key_lifetime_t lifetime)
+{
+    attributes->core.lifetime = lifetime;
+    if( PSA_KEY_LIFETIME_IS_VOLATILE( lifetime ) )
+    {
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+        attributes->core.id.key_id = 0;
+#else
+        attributes->core.id = 0;
+#endif
+    }
+}
+
+static inline psa_key_lifetime_t psa_get_key_lifetime(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.lifetime );
+}
+
+static inline void psa_extend_key_usage_flags( psa_key_usage_t *usage_flags )
+{
+    if( *usage_flags & PSA_KEY_USAGE_SIGN_HASH )
+        *usage_flags |= PSA_KEY_USAGE_SIGN_MESSAGE;
+
+    if( *usage_flags & PSA_KEY_USAGE_VERIFY_HASH )
+        *usage_flags |= PSA_KEY_USAGE_VERIFY_MESSAGE;
+}
+
+static inline void psa_set_key_usage_flags(psa_key_attributes_t *attributes,
+                                           psa_key_usage_t usage_flags)
+{
+    psa_extend_key_usage_flags( &usage_flags );
+    attributes->core.policy.usage = usage_flags;
+}
+
+static inline psa_key_usage_t psa_get_key_usage_flags(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.usage );
+}
+
+static inline void psa_set_key_algorithm(psa_key_attributes_t *attributes,
+                                         psa_algorithm_t alg)
+{
+    attributes->core.policy.alg = alg;
+}
+
+static inline psa_algorithm_t psa_get_key_algorithm(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.alg );
+}
+
+/* This function is declared in crypto_extra.h, which comes after this
+ * header file, but we need the function here, so repeat the declaration. */
+psa_status_t psa_set_key_domain_parameters(psa_key_attributes_t *attributes,
+                                           psa_key_type_t type,
+                                           const uint8_t *data,
+                                           size_t data_length);
+
+static inline void psa_set_key_type(psa_key_attributes_t *attributes,
+                                    psa_key_type_t type)
+{
+    if( attributes->domain_parameters == NULL )
+    {
+        /* Common case: quick path */
+        attributes->core.type = type;
+    }
+    else
+    {
+        /* Call the bigger function to free the old domain paramteres.
+         * Ignore any errors which may arise due to type requiring
+         * non-default domain parameters, since this function can't
+         * report errors. */
+        (void) psa_set_key_domain_parameters( attributes, type, NULL, 0 );
+    }
+}
+
+static inline psa_key_type_t psa_get_key_type(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.type );
+}
+
+static inline void psa_set_key_bits(psa_key_attributes_t *attributes,
+                                    size_t bits)
+{
+    if( bits > PSA_MAX_KEY_BITS )
+        attributes->core.bits = PSA_KEY_BITS_TOO_LARGE;
+    else
+        attributes->core.bits = (psa_key_bits_t) bits;
+}
+
+static inline size_t psa_get_key_bits(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.bits );
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_STRUCT_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_types.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_types.h
new file mode 100644
index 00000000000..386c7d794b4
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_types.h
@@ -0,0 +1,383 @@
+/**
+ * \file psa/crypto_types.h
+ *
+ * \brief PSA cryptography module: type aliases.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h. Drivers must include the appropriate driver
+ * header file.
+ *
+ * This file contains portable definitions of integral types for properties
+ * of cryptographic keys, designations of cryptographic algorithms, and
+ * error codes returned by the library.
+ *
+ * This header file does not declare any function.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_TYPES_H
+#define PSA_CRYPTO_TYPES_H
+
+#include "crypto_platform.h"
+
+/* If MBEDTLS_PSA_CRYPTO_C is defined, make sure MBEDTLS_PSA_CRYPTO_CLIENT
+ * is defined as well to include all PSA code.
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_C)
+#define MBEDTLS_PSA_CRYPTO_CLIENT
+#endif /* MBEDTLS_PSA_CRYPTO_C */
+
+#include <stdint.h>
+
+/** \defgroup error Error codes
+ * @{
+ */
+
+/**
+ * \brief Function return status.
+ *
+ * This is either #PSA_SUCCESS (which is zero), indicating success,
+ * or a small negative value indicating that an error occurred. Errors are
+ * encoded as one of the \c PSA_ERROR_xxx values defined here. */
+/* If #PSA_SUCCESS is already defined, it means that #psa_status_t
+ * is also defined in an external header, so prevent its multiple
+ * definition.
+ */
+#ifndef PSA_SUCCESS
+typedef int32_t psa_status_t;
+#endif
+
+/**@}*/
+
+/** \defgroup crypto_types Key and algorithm types
+ * @{
+ */
+
+/** \brief Encoding of a key type.
+ */
+typedef uint16_t psa_key_type_t;
+
+/** The type of PSA elliptic curve family identifiers.
+ *
+ * The curve identifier is required to create an ECC key using the
+ * PSA_KEY_TYPE_ECC_KEY_PAIR() or PSA_KEY_TYPE_ECC_PUBLIC_KEY()
+ * macros.
+ *
+ * Values defined by this standard will never be in the range 0x80-0xff.
+ * Vendors who define additional families must use an encoding in this range.
+ */
+typedef uint8_t psa_ecc_family_t;
+
+/** The type of PSA Diffie-Hellman group family identifiers.
+ *
+ * The group identifier is required to create an Diffie-Hellman key using the
+ * PSA_KEY_TYPE_DH_KEY_PAIR() or PSA_KEY_TYPE_DH_PUBLIC_KEY()
+ * macros.
+ *
+ * Values defined by this standard will never be in the range 0x80-0xff.
+ * Vendors who define additional families must use an encoding in this range.
+ */
+typedef uint8_t psa_dh_family_t;
+
+/** \brief Encoding of a cryptographic algorithm.
+ *
+ * For algorithms that can be applied to multiple key types, this type
+ * does not encode the key type. For example, for symmetric ciphers
+ * based on a block cipher, #psa_algorithm_t encodes the block cipher
+ * mode and the padding mode while the block cipher itself is encoded
+ * via #psa_key_type_t.
+ */
+typedef uint32_t psa_algorithm_t;
+
+/**@}*/
+
+/** \defgroup key_lifetimes Key lifetimes
+ * @{
+ */
+
+/** Encoding of key lifetimes.
+ *
+ * The lifetime of a key indicates where it is stored and what system actions
+ * may create and destroy it.
+ *
+ * Lifetime values have the following structure:
+ * - Bits 0-7 (#PSA_KEY_LIFETIME_GET_PERSISTENCE(\c lifetime)):
+ *   persistence level. This value indicates what device management
+ *   actions can cause it to be destroyed. In particular, it indicates
+ *   whether the key is _volatile_ or _persistent_.
+ *   See ::psa_key_persistence_t for more information.
+ * - Bits 8-31 (#PSA_KEY_LIFETIME_GET_LOCATION(\c lifetime)):
+ *   location indicator. This value indicates which part of the system
+ *   has access to the key material and can perform operations using the key.
+ *   See ::psa_key_location_t for more information.
+ *
+ * Volatile keys are automatically destroyed when the application instance
+ * terminates or on a power reset of the device. Persistent keys are
+ * preserved until the application explicitly destroys them or until an
+ * integration-specific device management event occurs (for example,
+ * a factory reset).
+ *
+ * Persistent keys have a key identifier of type #mbedtls_svc_key_id_t.
+ * This identifier remains valid throughout the lifetime of the key,
+ * even if the application instance that created the key terminates.
+ * The application can call psa_open_key() to open a persistent key that
+ * it created previously.
+ *
+ * The default lifetime of a key is #PSA_KEY_LIFETIME_VOLATILE. The lifetime
+ * #PSA_KEY_LIFETIME_PERSISTENT is supported if persistent storage is
+ * available. Other lifetime values may be supported depending on the
+ * library configuration.
+ */
+typedef uint32_t psa_key_lifetime_t;
+
+/** Encoding of key persistence levels.
+ *
+ * What distinguishes different persistence levels is what device management
+ * events may cause keys to be destroyed. _Volatile_ keys are destroyed
+ * by a power reset. Persistent keys may be destroyed by events such as
+ * a transfer of ownership or a factory reset. What management events
+ * actually affect persistent keys at different levels is outside the
+ * scope of the PSA Cryptography specification.
+ *
+ * The PSA Cryptography specification defines the following values of
+ * persistence levels:
+ * - \c 0 = #PSA_KEY_PERSISTENCE_VOLATILE: volatile key.
+ *   A volatile key is automatically destroyed by the implementation when
+ *   the application instance terminates. In particular, a volatile key
+ *   is automatically destroyed on a power reset of the device.
+ * - \c 1 = #PSA_KEY_PERSISTENCE_DEFAULT:
+ *   persistent key with a default lifetime.
+ * - \c 2-254: currently not supported by Mbed TLS.
+ * - \c 255 = #PSA_KEY_PERSISTENCE_READ_ONLY:
+ *   read-only or write-once key.
+ *   A key with this persistence level cannot be destroyed.
+ *   Mbed TLS does not currently offer a way to create such keys, but
+ *   integrations of Mbed TLS can use it for built-in keys that the
+ *   application cannot modify (for example, a hardware unique key (HUK)).
+ *
+ * \note Key persistence levels are 8-bit values. Key management
+ *       interfaces operate on lifetimes (type ::psa_key_lifetime_t) which
+ *       encode the persistence as the lower 8 bits of a 32-bit value.
+ */
+typedef uint8_t psa_key_persistence_t;
+
+/** Encoding of key location indicators.
+ *
+ * If an integration of Mbed TLS can make calls to external
+ * cryptoprocessors such as secure elements, the location of a key
+ * indicates which secure element performs the operations on the key.
+ * Depending on the design of the secure element, the key
+ * material may be stored either in the secure element, or
+ * in wrapped (encrypted) form alongside the key metadata in the
+ * primary local storage.
+ *
+ * The PSA Cryptography API specification defines the following values of
+ * location indicators:
+ * - \c 0: primary local storage.
+ *   This location is always available.
+ *   The primary local storage is typically the same storage area that
+ *   contains the key metadata.
+ * - \c 1: primary secure element.
+ *   Integrations of Mbed TLS should support this value if there is a secure
+ *   element attached to the operating environment.
+ *   As a guideline, secure elements may provide higher resistance against
+ *   side channel and physical attacks than the primary local storage, but may
+ *   have restrictions on supported key types, sizes, policies and operations
+ *   and may have different performance characteristics.
+ * - \c 2-0x7fffff: other locations defined by a PSA specification.
+ *   The PSA Cryptography API does not currently assign any meaning to these
+ *   locations, but future versions of that specification or other PSA
+ *   specifications may do so.
+ * - \c 0x800000-0xffffff: vendor-defined locations.
+ *   No PSA specification will assign a meaning to locations in this range.
+ *
+ * \note Key location indicators are 24-bit values. Key management
+ *       interfaces operate on lifetimes (type ::psa_key_lifetime_t) which
+ *       encode the location as the upper 24 bits of a 32-bit value.
+ */
+typedef uint32_t psa_key_location_t;
+
+/** Encoding of identifiers of persistent keys.
+ *
+ * - Applications may freely choose key identifiers in the range
+ *   #PSA_KEY_ID_USER_MIN to #PSA_KEY_ID_USER_MAX.
+ * - The implementation may define additional key identifiers in the range
+ *   #PSA_KEY_ID_VENDOR_MIN to #PSA_KEY_ID_VENDOR_MAX.
+ * - 0 is reserved as an invalid key identifier.
+ * - Key identifiers outside these ranges are reserved for future use.
+ */
+typedef uint32_t psa_key_id_t;
+
+#if !defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+typedef psa_key_id_t mbedtls_svc_key_id_t;
+
+#else /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+/* Implementation-specific: The Mbed Cryptography library can be built as
+ * part of a multi-client service that exposes the PSA Cryptograpy API in each
+ * client and encodes the client identity in the key identifier argument of
+ * functions such as psa_open_key().
+ */
+typedef struct
+{
+    psa_key_id_t key_id;
+    mbedtls_key_owner_id_t owner;
+} mbedtls_svc_key_id_t;
+
+#endif /* !MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/**@}*/
+
+/** \defgroup policy Key policies
+ * @{
+ */
+
+/** \brief Encoding of permitted usage on a key. */
+typedef uint32_t psa_key_usage_t;
+
+/**@}*/
+
+/** \defgroup attributes Key attributes
+ * @{
+ */
+
+/** The type of a structure containing key attributes.
+ *
+ * This is an opaque structure that can represent the metadata of a key
+ * object. Metadata that can be stored in attributes includes:
+ * - The location of the key in storage, indicated by its key identifier
+ *   and its lifetime.
+ * - The key's policy, comprising usage flags and a specification of
+ *   the permitted algorithm(s).
+ * - Information about the key itself: the key type and its size.
+ * - Additional implementation-defined attributes.
+ *
+ * The actual key material is not considered an attribute of a key.
+ * Key attributes do not contain information that is generally considered
+ * highly confidential.
+ *
+ * An attribute structure works like a simple data structure where each function
+ * `psa_set_key_xxx` sets a field and the corresponding function
+ * `psa_get_key_xxx` retrieves the value of the corresponding field.
+ * However, a future version of the library  may report values that are
+ * equivalent to the original one, but have a different encoding. Invalid
+ * values may be mapped to different, also invalid values.
+ *
+ * An attribute structure may contain references to auxiliary resources,
+ * for example pointers to allocated memory or indirect references to
+ * pre-calculated values. In order to free such resources, the application
+ * must call psa_reset_key_attributes(). As an exception, calling
+ * psa_reset_key_attributes() on an attribute structure is optional if
+ * the structure has only been modified by the following functions
+ * since it was initialized or last reset with psa_reset_key_attributes():
+ * - psa_set_key_id()
+ * - psa_set_key_lifetime()
+ * - psa_set_key_type()
+ * - psa_set_key_bits()
+ * - psa_set_key_usage_flags()
+ * - psa_set_key_algorithm()
+ *
+ * Before calling any function on a key attribute structure, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_key_attributes_t attributes;
+ *   memset(&attributes, 0, sizeof(attributes));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_key_attributes_t attributes = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_KEY_ATTRIBUTES_INIT,
+ *   for example:
+ *   \code
+ *   psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_key_attributes_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_key_attributes_t attributes;
+ *   attributes = psa_key_attributes_init();
+ *   \endcode
+ *
+ * A freshly initialized attribute structure contains the following
+ * values:
+ *
+ * - lifetime: #PSA_KEY_LIFETIME_VOLATILE.
+ * - key identifier: 0 (which is not a valid key identifier).
+ * - type: \c 0 (meaning that the type is unspecified).
+ * - key size: \c 0 (meaning that the size is unspecified).
+ * - usage flags: \c 0 (which allows no usage except exporting a public key).
+ * - algorithm: \c 0 (which allows no cryptographic usage, but allows
+ *   exporting).
+ *
+ * A typical sequence to create a key is as follows:
+ * -# Create and initialize an attribute structure.
+ * -# If the key is persistent, call psa_set_key_id().
+ *    Also call psa_set_key_lifetime() to place the key in a non-default
+ *    location.
+ * -# Set the key policy with psa_set_key_usage_flags() and
+ *    psa_set_key_algorithm().
+ * -# Set the key type with psa_set_key_type().
+ *    Skip this step if copying an existing key with psa_copy_key().
+ * -# When generating a random key with psa_generate_key() or deriving a key
+ *    with psa_key_derivation_output_key(), set the desired key size with
+ *    psa_set_key_bits().
+ * -# Call a key creation function: psa_import_key(), psa_generate_key(),
+ *    psa_key_derivation_output_key() or psa_copy_key(). This function reads
+ *    the attribute structure, creates a key with these attributes, and
+ *    outputs a key identifier to the newly created key.
+ * -# The attribute structure is now no longer necessary.
+ *    You may call psa_reset_key_attributes(), although this is optional
+ *    with the workflow presented here because the attributes currently
+ *    defined in this specification do not require any additional resources
+ *    beyond the structure itself.
+ *
+ * A typical sequence to query a key's attributes is as follows:
+ * -# Call psa_get_key_attributes().
+ * -# Call `psa_get_key_xxx` functions to retrieve the attribute(s) that
+ *    you are interested in.
+ * -# Call psa_reset_key_attributes() to free any resources that may be
+ *    used by the attribute structure.
+ *
+ * Once a key has been created, it is impossible to change its attributes.
+ */
+typedef struct psa_key_attributes_s psa_key_attributes_t;
+
+
+#ifndef __DOXYGEN_ONLY__
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+/* Mbed Crypto defines this type in crypto_types.h because it is also
+ * visible to applications through an implementation-specific extension.
+ * For the PSA Cryptography specification, this type is only visible
+ * via crypto_se_driver.h. */
+typedef uint64_t psa_key_slot_number_t;
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+#endif /* !__DOXYGEN_ONLY__ */
+
+/**@}*/
+
+/** \defgroup derivation Key derivation
+ * @{
+ */
+
+/** \brief Encoding of the step of a key derivation. */
+typedef uint16_t psa_key_derivation_step_t;
+
+/**@}*/
+
+#endif /* PSA_CRYPTO_TYPES_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_values.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_values.h
new file mode 100644
index 00000000000..fafe93cf9ba
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/psa/crypto_values.h
@@ -0,0 +1,2325 @@
+/**
+ * \file psa/crypto_values.h
+ *
+ * \brief PSA cryptography module: macros to build and analyze integer values.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h. Drivers must include the appropriate driver
+ * header file.
+ *
+ * This file contains portable definitions of macros to build and analyze
+ * values of integral types that encode properties of cryptographic keys,
+ * designations of cryptographic algorithms, and error codes returned by
+ * the library.
+ *
+ * This header file only defines preprocessor macros.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_VALUES_H
+#define PSA_CRYPTO_VALUES_H
+
+/** \defgroup error Error codes
+ * @{
+ */
+
+/* PSA error codes */
+
+/** The action was completed successfully. */
+#define PSA_SUCCESS ((psa_status_t)0)
+
+/** An error occurred that does not correspond to any defined
+ * failure cause.
+ *
+ * Implementations may use this error code if none of the other standard
+ * error codes are applicable. */
+#define PSA_ERROR_GENERIC_ERROR         ((psa_status_t)-132)
+
+/** The requested operation or a parameter is not supported
+ * by this implementation.
+ *
+ * Implementations should return this error code when an enumeration
+ * parameter such as a key type, algorithm, etc. is not recognized.
+ * If a combination of parameters is recognized and identified as
+ * not valid, return #PSA_ERROR_INVALID_ARGUMENT instead. */
+#define PSA_ERROR_NOT_SUPPORTED         ((psa_status_t)-134)
+
+/** The requested action is denied by a policy.
+ *
+ * Implementations should return this error code when the parameters
+ * are recognized as valid and supported, and a policy explicitly
+ * denies the requested operation.
+ *
+ * If a subset of the parameters of a function call identify a
+ * forbidden operation, and another subset of the parameters are
+ * not valid or not supported, it is unspecified whether the function
+ * returns #PSA_ERROR_NOT_PERMITTED, #PSA_ERROR_NOT_SUPPORTED or
+ * #PSA_ERROR_INVALID_ARGUMENT. */
+#define PSA_ERROR_NOT_PERMITTED         ((psa_status_t)-133)
+
+/** An output buffer is too small.
+ *
+ * Applications can call the \c PSA_xxx_SIZE macro listed in the function
+ * description to determine a sufficient buffer size.
+ *
+ * Implementations should preferably return this error code only
+ * in cases when performing the operation with a larger output
+ * buffer would succeed. However implementations may return this
+ * error if a function has invalid or unsupported parameters in addition
+ * to the parameters that determine the necessary output buffer size. */
+#define PSA_ERROR_BUFFER_TOO_SMALL      ((psa_status_t)-138)
+
+/** Asking for an item that already exists
+ *
+ * Implementations should return this error, when attempting
+ * to write an item (like a key) that already exists. */
+#define PSA_ERROR_ALREADY_EXISTS        ((psa_status_t)-139)
+
+/** Asking for an item that doesn't exist
+ *
+ * Implementations should return this error, if a requested item (like
+ * a key) does not exist. */
+#define PSA_ERROR_DOES_NOT_EXIST        ((psa_status_t)-140)
+
+/** The requested action cannot be performed in the current state.
+ *
+ * Multipart operations return this error when one of the
+ * functions is called out of sequence. Refer to the function
+ * descriptions for permitted sequencing of functions.
+ *
+ * Implementations shall not return this error code to indicate
+ * that a key either exists or not,
+ * but shall instead return #PSA_ERROR_ALREADY_EXISTS or #PSA_ERROR_DOES_NOT_EXIST
+ * as applicable.
+ *
+ * Implementations shall not return this error code to indicate that a
+ * key identifier is invalid, but shall return #PSA_ERROR_INVALID_HANDLE
+ * instead. */
+#define PSA_ERROR_BAD_STATE             ((psa_status_t)-137)
+
+/** The parameters passed to the function are invalid.
+ *
+ * Implementations may return this error any time a parameter or
+ * combination of parameters are recognized as invalid.
+ *
+ * Implementations shall not return this error code to indicate that a
+ * key identifier is invalid, but shall return #PSA_ERROR_INVALID_HANDLE
+ * instead.
+ */
+#define PSA_ERROR_INVALID_ARGUMENT      ((psa_status_t)-135)
+
+/** There is not enough runtime memory.
+ *
+ * If the action is carried out across multiple security realms, this
+ * error can refer to available memory in any of the security realms. */
+#define PSA_ERROR_INSUFFICIENT_MEMORY   ((psa_status_t)-141)
+
+/** There is not enough persistent storage.
+ *
+ * Functions that modify the key storage return this error code if
+ * there is insufficient storage space on the host media. In addition,
+ * many functions that do not otherwise access storage may return this
+ * error code if the implementation requires a mandatory log entry for
+ * the requested action and the log storage space is full. */
+#define PSA_ERROR_INSUFFICIENT_STORAGE  ((psa_status_t)-142)
+
+/** There was a communication failure inside the implementation.
+ *
+ * This can indicate a communication failure between the application
+ * and an external cryptoprocessor or between the cryptoprocessor and
+ * an external volatile or persistent memory. A communication failure
+ * may be transient or permanent depending on the cause.
+ *
+ * \warning If a function returns this error, it is undetermined
+ * whether the requested action has completed or not. Implementations
+ * should return #PSA_SUCCESS on successful completion whenever
+ * possible, however functions may return #PSA_ERROR_COMMUNICATION_FAILURE
+ * if the requested action was completed successfully in an external
+ * cryptoprocessor but there was a breakdown of communication before
+ * the cryptoprocessor could report the status to the application.
+ */
+#define PSA_ERROR_COMMUNICATION_FAILURE ((psa_status_t)-145)
+
+/** There was a storage failure that may have led to data loss.
+ *
+ * This error indicates that some persistent storage is corrupted.
+ * It should not be used for a corruption of volatile memory
+ * (use #PSA_ERROR_CORRUPTION_DETECTED), for a communication error
+ * between the cryptoprocessor and its external storage (use
+ * #PSA_ERROR_COMMUNICATION_FAILURE), or when the storage is
+ * in a valid state but is full (use #PSA_ERROR_INSUFFICIENT_STORAGE).
+ *
+ * Note that a storage failure does not indicate that any data that was
+ * previously read is invalid. However this previously read data may no
+ * longer be readable from storage.
+ *
+ * When a storage failure occurs, it is no longer possible to ensure
+ * the global integrity of the keystore. Depending on the global
+ * integrity guarantees offered by the implementation, access to other
+ * data may or may not fail even if the data is still readable but
+ * its integrity cannot be guaranteed.
+ *
+ * Implementations should only use this error code to report a
+ * permanent storage corruption. However application writers should
+ * keep in mind that transient errors while reading the storage may be
+ * reported using this error code. */
+#define PSA_ERROR_STORAGE_FAILURE       ((psa_status_t)-146)
+
+/** A hardware failure was detected.
+ *
+ * A hardware failure may be transient or permanent depending on the
+ * cause. */
+#define PSA_ERROR_HARDWARE_FAILURE      ((psa_status_t)-147)
+
+/** A tampering attempt was detected.
+ *
+ * If an application receives this error code, there is no guarantee
+ * that previously accessed or computed data was correct and remains
+ * confidential. Applications should not perform any security function
+ * and should enter a safe failure state.
+ *
+ * Implementations may return this error code if they detect an invalid
+ * state that cannot happen during normal operation and that indicates
+ * that the implementation's security guarantees no longer hold. Depending
+ * on the implementation architecture and on its security and safety goals,
+ * the implementation may forcibly terminate the application.
+ *
+ * This error code is intended as a last resort when a security breach
+ * is detected and it is unsure whether the keystore data is still
+ * protected. Implementations shall only return this error code
+ * to report an alarm from a tampering detector, to indicate that
+ * the confidentiality of stored data can no longer be guaranteed,
+ * or to indicate that the integrity of previously returned data is now
+ * considered compromised. Implementations shall not use this error code
+ * to indicate a hardware failure that merely makes it impossible to
+ * perform the requested operation (use #PSA_ERROR_COMMUNICATION_FAILURE,
+ * #PSA_ERROR_STORAGE_FAILURE, #PSA_ERROR_HARDWARE_FAILURE,
+ * #PSA_ERROR_INSUFFICIENT_ENTROPY or other applicable error code
+ * instead).
+ *
+ * This error indicates an attack against the application. Implementations
+ * shall not return this error code as a consequence of the behavior of
+ * the application itself. */
+#define PSA_ERROR_CORRUPTION_DETECTED    ((psa_status_t)-151)
+
+/** There is not enough entropy to generate random data needed
+ * for the requested action.
+ *
+ * This error indicates a failure of a hardware random generator.
+ * Application writers should note that this error can be returned not
+ * only by functions whose purpose is to generate random data, such
+ * as key, IV or nonce generation, but also by functions that execute
+ * an algorithm with a randomized result, as well as functions that
+ * use randomization of intermediate computations as a countermeasure
+ * to certain attacks.
+ *
+ * Implementations should avoid returning this error after psa_crypto_init()
+ * has succeeded. Implementations should generate sufficient
+ * entropy during initialization and subsequently use a cryptographically
+ * secure pseudorandom generator (PRNG). However implementations may return
+ * this error at any time if a policy requires the PRNG to be reseeded
+ * during normal operation. */
+#define PSA_ERROR_INSUFFICIENT_ENTROPY  ((psa_status_t)-148)
+
+/** The signature, MAC or hash is incorrect.
+ *
+ * Verification functions return this error if the verification
+ * calculations completed successfully, and the value to be verified
+ * was determined to be incorrect.
+ *
+ * If the value to verify has an invalid size, implementations may return
+ * either #PSA_ERROR_INVALID_ARGUMENT or #PSA_ERROR_INVALID_SIGNATURE. */
+#define PSA_ERROR_INVALID_SIGNATURE     ((psa_status_t)-149)
+
+/** The decrypted padding is incorrect.
+ *
+ * \warning In some protocols, when decrypting data, it is essential that
+ * the behavior of the application does not depend on whether the padding
+ * is correct, down to precise timing. Applications should prefer
+ * protocols that use authenticated encryption rather than plain
+ * encryption. If the application must perform a decryption of
+ * unauthenticated data, the application writer should take care not
+ * to reveal whether the padding is invalid.
+ *
+ * Implementations should strive to make valid and invalid padding
+ * as close as possible to indistinguishable to an external observer.
+ * In particular, the timing of a decryption operation should not
+ * depend on the validity of the padding. */
+#define PSA_ERROR_INVALID_PADDING       ((psa_status_t)-150)
+
+/** Return this error when there's insufficient data when attempting
+ * to read from a resource. */
+#define PSA_ERROR_INSUFFICIENT_DATA     ((psa_status_t)-143)
+
+/** The key identifier is not valid. See also :ref:\`key-handles\`.
+ */
+#define PSA_ERROR_INVALID_HANDLE        ((psa_status_t)-136)
+
+/** Stored data has been corrupted.
+ *
+ * This error indicates that some persistent storage has suffered corruption.
+ * It does not indicate the following situations, which have specific error
+ * codes:
+ *
+ * - A corruption of volatile memory - use #PSA_ERROR_CORRUPTION_DETECTED.
+ * - A communication error between the cryptoprocessor and its external
+ *   storage - use #PSA_ERROR_COMMUNICATION_FAILURE.
+ * - When the storage is in a valid state but is full - use
+ *   #PSA_ERROR_INSUFFICIENT_STORAGE.
+ * - When the storage fails for other reasons - use
+ *   #PSA_ERROR_STORAGE_FAILURE.
+ * - When the stored data is not valid - use #PSA_ERROR_DATA_INVALID.
+ *
+ * \note A storage corruption does not indicate that any data that was
+ * previously read is invalid. However this previously read data might no
+ * longer be readable from storage.
+ *
+ * When a storage failure occurs, it is no longer possible to ensure the
+ * global integrity of the keystore.
+ */
+#define PSA_ERROR_DATA_CORRUPT          ((psa_status_t)-152)
+
+/** Data read from storage is not valid for the implementation.
+ *
+ * This error indicates that some data read from storage does not have a valid
+ * format. It does not indicate the following situations, which have specific
+ * error codes:
+ *
+ * - When the storage or stored data is corrupted - use #PSA_ERROR_DATA_CORRUPT
+ * - When the storage fails for other reasons - use #PSA_ERROR_STORAGE_FAILURE
+ * - An invalid argument to the API - use #PSA_ERROR_INVALID_ARGUMENT
+ *
+ * This error is typically a result of either storage corruption on a
+ * cleartext storage backend, or an attempt to read data that was
+ * written by an incompatible version of the library.
+ */
+#define PSA_ERROR_DATA_INVALID          ((psa_status_t)-153)
+
+/**@}*/
+
+/** \defgroup crypto_types Key and algorithm types
+ * @{
+ */
+
+/** An invalid key type value.
+ *
+ * Zero is not the encoding of any key type.
+ */
+#define PSA_KEY_TYPE_NONE                           ((psa_key_type_t)0x0000)
+
+/** Vendor-defined key type flag.
+ *
+ * Key types defined by this standard will never have the
+ * #PSA_KEY_TYPE_VENDOR_FLAG bit set. Vendors who define additional key types
+ * must use an encoding with the #PSA_KEY_TYPE_VENDOR_FLAG bit set and should
+ * respect the bitwise structure used by standard encodings whenever practical.
+ */
+#define PSA_KEY_TYPE_VENDOR_FLAG                    ((psa_key_type_t)0x8000)
+
+#define PSA_KEY_TYPE_CATEGORY_MASK                  ((psa_key_type_t)0x7000)
+#define PSA_KEY_TYPE_CATEGORY_RAW                   ((psa_key_type_t)0x1000)
+#define PSA_KEY_TYPE_CATEGORY_SYMMETRIC             ((psa_key_type_t)0x2000)
+#define PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY            ((psa_key_type_t)0x4000)
+#define PSA_KEY_TYPE_CATEGORY_KEY_PAIR              ((psa_key_type_t)0x7000)
+
+#define PSA_KEY_TYPE_CATEGORY_FLAG_PAIR             ((psa_key_type_t)0x3000)
+
+/** Whether a key type is vendor-defined.
+ *
+ * See also #PSA_KEY_TYPE_VENDOR_FLAG.
+ */
+#define PSA_KEY_TYPE_IS_VENDOR_DEFINED(type) \
+    (((type) & PSA_KEY_TYPE_VENDOR_FLAG) != 0)
+
+/** Whether a key type is an unstructured array of bytes.
+ *
+ * This encompasses both symmetric keys and non-key data.
+ */
+#define PSA_KEY_TYPE_IS_UNSTRUCTURED(type) \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_RAW || \
+     ((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC)
+
+/** Whether a key type is asymmetric: either a key pair or a public key. */
+#define PSA_KEY_TYPE_IS_ASYMMETRIC(type)                                \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK                               \
+      & ~PSA_KEY_TYPE_CATEGORY_FLAG_PAIR) ==                            \
+     PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY)
+/** Whether a key type is the public part of a key pair. */
+#define PSA_KEY_TYPE_IS_PUBLIC_KEY(type)                                \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY)
+/** Whether a key type is a key pair containing a private part and a public
+ * part. */
+#define PSA_KEY_TYPE_IS_KEY_PAIR(type)                                   \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_KEY_PAIR)
+/** The key pair type corresponding to a public key type.
+ *
+ * You may also pass a key pair type as \p type, it will be left unchanged.
+ *
+ * \param type      A public key type or key pair type.
+ *
+ * \return          The corresponding key pair type.
+ *                  If \p type is not a public key or a key pair,
+ *                  the return value is undefined.
+ */
+#define PSA_KEY_TYPE_KEY_PAIR_OF_PUBLIC_KEY(type)        \
+    ((type) | PSA_KEY_TYPE_CATEGORY_FLAG_PAIR)
+/** The public key type corresponding to a key pair type.
+ *
+ * You may also pass a key pair type as \p type, it will be left unchanged.
+ *
+ * \param type      A public key type or key pair type.
+ *
+ * \return          The corresponding public key type.
+ *                  If \p type is not a public key or a key pair,
+ *                  the return value is undefined.
+ */
+#define PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type)        \
+    ((type) & ~PSA_KEY_TYPE_CATEGORY_FLAG_PAIR)
+
+/** Raw data.
+ *
+ * A "key" of this type cannot be used for any cryptographic operation.
+ * Applications may use this type to store arbitrary data in the keystore. */
+#define PSA_KEY_TYPE_RAW_DATA                       ((psa_key_type_t)0x1001)
+
+/** HMAC key.
+ *
+ * The key policy determines which underlying hash algorithm the key can be
+ * used for.
+ *
+ * HMAC keys should generally have the same size as the underlying hash.
+ * This size can be calculated with #PSA_HASH_LENGTH(\c alg) where
+ * \c alg is the HMAC algorithm or the underlying hash algorithm. */
+#define PSA_KEY_TYPE_HMAC                           ((psa_key_type_t)0x1100)
+
+/** A secret for key derivation.
+ *
+ * The key policy determines which key derivation algorithm the key
+ * can be used for.
+ */
+#define PSA_KEY_TYPE_DERIVE                         ((psa_key_type_t)0x1200)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the AES block cipher.
+ *
+ * The size of the key can be 16 bytes (AES-128), 24 bytes (AES-192) or
+ * 32 bytes (AES-256).
+ */
+#define PSA_KEY_TYPE_AES                            ((psa_key_type_t)0x2400)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the
+ * ARIA block cipher. */
+#define PSA_KEY_TYPE_ARIA                           ((psa_key_type_t)0x2406)
+
+/** Key for a cipher or MAC algorithm based on DES or 3DES (Triple-DES).
+ *
+ * The size of the key can be 64 bits (single DES), 128 bits (2-key 3DES) or
+ * 192 bits (3-key 3DES).
+ *
+ * Note that single DES and 2-key 3DES are weak and strongly
+ * deprecated and should only be used to decrypt legacy data. 3-key 3DES
+ * is weak and deprecated and should only be used in legacy protocols.
+ */
+#define PSA_KEY_TYPE_DES                            ((psa_key_type_t)0x2301)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the
+ * Camellia block cipher. */
+#define PSA_KEY_TYPE_CAMELLIA                       ((psa_key_type_t)0x2403)
+
+/** Key for the RC4 stream cipher.
+ *
+ * Note that RC4 is weak and deprecated and should only be used in
+ * legacy protocols. */
+#define PSA_KEY_TYPE_ARC4                           ((psa_key_type_t)0x2002)
+
+/** Key for the ChaCha20 stream cipher or the Chacha20-Poly1305 AEAD algorithm.
+ *
+ * ChaCha20 and the ChaCha20_Poly1305 construction are defined in RFC 7539.
+ *
+ * Implementations must support 12-byte nonces, may support 8-byte nonces,
+ * and should reject other sizes.
+ */
+#define PSA_KEY_TYPE_CHACHA20                       ((psa_key_type_t)0x2004)
+
+/** RSA public key.
+ *
+ * The size of an RSA key is the bit size of the modulus.
+ */
+#define PSA_KEY_TYPE_RSA_PUBLIC_KEY                 ((psa_key_type_t)0x4001)
+/** RSA key pair (private and public key).
+ *
+ * The size of an RSA key is the bit size of the modulus.
+ */
+#define PSA_KEY_TYPE_RSA_KEY_PAIR                   ((psa_key_type_t)0x7001)
+/** Whether a key type is an RSA key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_RSA(type)                                       \
+    (PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) == PSA_KEY_TYPE_RSA_PUBLIC_KEY)
+
+#define PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE            ((psa_key_type_t)0x4100)
+#define PSA_KEY_TYPE_ECC_KEY_PAIR_BASE              ((psa_key_type_t)0x7100)
+#define PSA_KEY_TYPE_ECC_CURVE_MASK                 ((psa_key_type_t)0x00ff)
+/** Elliptic curve key pair.
+ *
+ * The size of an elliptic curve key is the bit size associated with the curve,
+ * i.e. the bit size of *q* for a curve over a field *F<sub>q</sub>*.
+ * See the documentation of `PSA_ECC_FAMILY_xxx` curve families for details.
+ *
+ * \param curve     A value of type ::psa_ecc_family_t that
+ *                  identifies the ECC curve to be used.
+ */
+#define PSA_KEY_TYPE_ECC_KEY_PAIR(curve)         \
+    (PSA_KEY_TYPE_ECC_KEY_PAIR_BASE | (curve))
+/** Elliptic curve public key.
+ *
+ * The size of an elliptic curve public key is the same as the corresponding
+ * private key (see #PSA_KEY_TYPE_ECC_KEY_PAIR and the documentation of
+ * `PSA_ECC_FAMILY_xxx` curve families).
+ *
+ * \param curve     A value of type ::psa_ecc_family_t that
+ *                  identifies the ECC curve to be used.
+ */
+#define PSA_KEY_TYPE_ECC_PUBLIC_KEY(curve)              \
+    (PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE | (curve))
+
+/** Whether a key type is an elliptic curve key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_ECC(type)                                       \
+    ((PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) &                        \
+      ~PSA_KEY_TYPE_ECC_CURVE_MASK) == PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE)
+/** Whether a key type is an elliptic curve key pair. */
+#define PSA_KEY_TYPE_IS_ECC_KEY_PAIR(type)                               \
+    (((type) & ~PSA_KEY_TYPE_ECC_CURVE_MASK) ==                         \
+     PSA_KEY_TYPE_ECC_KEY_PAIR_BASE)
+/** Whether a key type is an elliptic curve public key. */
+#define PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY(type)                            \
+    (((type) & ~PSA_KEY_TYPE_ECC_CURVE_MASK) ==                         \
+     PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE)
+
+/** Extract the curve from an elliptic curve key type. */
+#define PSA_KEY_TYPE_ECC_GET_FAMILY(type)                        \
+    ((psa_ecc_family_t) (PSA_KEY_TYPE_IS_ECC(type) ?             \
+                        ((type) & PSA_KEY_TYPE_ECC_CURVE_MASK) : \
+                        0))
+
+/** SEC Koblitz curves over prime fields.
+ *
+ * This family comprises the following curves:
+ * secp192k1, secp224k1, secp256k1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECP_K1           ((psa_ecc_family_t) 0x17)
+
+/** SEC random curves over prime fields.
+ *
+ * This family comprises the following curves:
+ * secp192k1, secp224r1, secp256r1, secp384r1, secp521r1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECP_R1           ((psa_ecc_family_t) 0x12)
+/* SECP160R2 (SEC2 v1, obsolete) */
+#define PSA_ECC_FAMILY_SECP_R2           ((psa_ecc_family_t) 0x1b)
+
+/** SEC Koblitz curves over binary fields.
+ *
+ * This family comprises the following curves:
+ * sect163k1, sect233k1, sect239k1, sect283k1, sect409k1, sect571k1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_K1           ((psa_ecc_family_t) 0x27)
+
+/** SEC random curves over binary fields.
+ *
+ * This family comprises the following curves:
+ * sect163r1, sect233r1, sect283r1, sect409r1, sect571r1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_R1           ((psa_ecc_family_t) 0x22)
+
+/** SEC additional random curves over binary fields.
+ *
+ * This family comprises the following curve:
+ * sect163r2.
+ * It is defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_R2           ((psa_ecc_family_t) 0x2b)
+
+/** Brainpool P random curves.
+ *
+ * This family comprises the following curves:
+ * brainpoolP160r1, brainpoolP192r1, brainpoolP224r1, brainpoolP256r1,
+ * brainpoolP320r1, brainpoolP384r1, brainpoolP512r1.
+ * It is defined in RFC 5639.
+ */
+#define PSA_ECC_FAMILY_BRAINPOOL_P_R1    ((psa_ecc_family_t) 0x30)
+
+/** Curve25519 and Curve448.
+ *
+ * This family comprises the following Montgomery curves:
+ * - 255-bit: Bernstein et al.,
+ *   _Curve25519: new Diffie-Hellman speed records_, LNCS 3958, 2006.
+ *   The algorithm #PSA_ALG_ECDH performs X25519 when used with this curve.
+ * - 448-bit: Hamburg,
+ *   _Ed448-Goldilocks, a new elliptic curve_, NIST ECC Workshop, 2015.
+ *   The algorithm #PSA_ALG_ECDH performs X448 when used with this curve.
+ */
+#define PSA_ECC_FAMILY_MONTGOMERY        ((psa_ecc_family_t) 0x41)
+
+/** The twisted Edwards curves Ed25519 and Ed448.
+ *
+ * These curves are suitable for EdDSA (#PSA_ALG_PURE_EDDSA for both curves,
+ * #PSA_ALG_ED25519PH for the 255-bit curve,
+ * #PSA_ALG_ED448PH for the 448-bit curve).
+ *
+ * This family comprises the following twisted Edwards curves:
+ * - 255-bit: Edwards25519, the twisted Edwards curve birationally equivalent
+ *   to Curve25519.
+ *   Bernstein et al., _Twisted Edwards curves_, Africacrypt 2008.
+ * - 448-bit: Edwards448, the twisted Edwards curve birationally equivalent
+ *   to Curve448.
+ *   Hamburg, _Ed448-Goldilocks, a new elliptic curve_, NIST ECC Workshop, 2015.
+ */
+#define PSA_ECC_FAMILY_TWISTED_EDWARDS   ((psa_ecc_family_t) 0x42)
+
+#define PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE             ((psa_key_type_t)0x4200)
+#define PSA_KEY_TYPE_DH_KEY_PAIR_BASE               ((psa_key_type_t)0x7200)
+#define PSA_KEY_TYPE_DH_GROUP_MASK                  ((psa_key_type_t)0x00ff)
+/** Diffie-Hellman key pair.
+ *
+ * \param group     A value of type ::psa_dh_family_t that identifies the
+ *                  Diffie-Hellman group to be used.
+ */
+#define PSA_KEY_TYPE_DH_KEY_PAIR(group)          \
+    (PSA_KEY_TYPE_DH_KEY_PAIR_BASE | (group))
+/** Diffie-Hellman public key.
+ *
+ * \param group     A value of type ::psa_dh_family_t that identifies the
+ *                  Diffie-Hellman group to be used.
+ */
+#define PSA_KEY_TYPE_DH_PUBLIC_KEY(group)               \
+    (PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE | (group))
+
+/** Whether a key type is a Diffie-Hellman key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_DH(type)                                        \
+    ((PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) &                        \
+      ~PSA_KEY_TYPE_DH_GROUP_MASK) == PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE)
+/** Whether a key type is a Diffie-Hellman key pair. */
+#define PSA_KEY_TYPE_IS_DH_KEY_PAIR(type)                               \
+    (((type) & ~PSA_KEY_TYPE_DH_GROUP_MASK) ==                         \
+     PSA_KEY_TYPE_DH_KEY_PAIR_BASE)
+/** Whether a key type is a Diffie-Hellman public key. */
+#define PSA_KEY_TYPE_IS_DH_PUBLIC_KEY(type)                            \
+    (((type) & ~PSA_KEY_TYPE_DH_GROUP_MASK) ==                         \
+     PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE)
+
+/** Extract the group from a Diffie-Hellman key type. */
+#define PSA_KEY_TYPE_DH_GET_FAMILY(type)                        \
+    ((psa_dh_family_t) (PSA_KEY_TYPE_IS_DH(type) ?              \
+                       ((type) & PSA_KEY_TYPE_DH_GROUP_MASK) :  \
+                       0))
+
+/** Diffie-Hellman groups defined in RFC 7919 Appendix A.
+ *
+ * This family includes groups with the following key sizes (in bits):
+ * 2048, 3072, 4096, 6144, 8192. A given implementation may support
+ * all of these sizes or only a subset.
+ */
+#define PSA_DH_FAMILY_RFC7919            ((psa_dh_family_t) 0x03)
+
+#define PSA_GET_KEY_TYPE_BLOCK_SIZE_EXPONENT(type)      \
+    (((type) >> 8) & 7)
+/** The block size of a block cipher.
+ *
+ * \param type  A cipher key type (value of type #psa_key_type_t).
+ *
+ * \return      The block size for a block cipher, or 1 for a stream cipher.
+ *              The return value is undefined if \p type is not a supported
+ *              cipher key type.
+ *
+ * \note It is possible to build stream cipher algorithms on top of a block
+ *       cipher, for example CTR mode (#PSA_ALG_CTR).
+ *       This macro only takes the key type into account, so it cannot be
+ *       used to determine the size of the data that #psa_cipher_update()
+ *       might buffer for future processing in general.
+ *
+ * \note This macro returns a compile-time constant if its argument is one.
+ *
+ * \warning This macro may evaluate its argument multiple times.
+ */
+#define PSA_BLOCK_CIPHER_BLOCK_LENGTH(type)                                     \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC ? \
+     1u << PSA_GET_KEY_TYPE_BLOCK_SIZE_EXPONENT(type) :                         \
+     0u)
+
+/** Vendor-defined algorithm flag.
+ *
+ * Algorithms defined by this standard will never have the #PSA_ALG_VENDOR_FLAG
+ * bit set. Vendors who define additional algorithms must use an encoding with
+ * the #PSA_ALG_VENDOR_FLAG bit set and should respect the bitwise structure
+ * used by standard encodings whenever practical.
+ */
+#define PSA_ALG_VENDOR_FLAG                     ((psa_algorithm_t)0x80000000)
+
+#define PSA_ALG_CATEGORY_MASK                   ((psa_algorithm_t)0x7f000000)
+#define PSA_ALG_CATEGORY_HASH                   ((psa_algorithm_t)0x02000000)
+#define PSA_ALG_CATEGORY_MAC                    ((psa_algorithm_t)0x03000000)
+#define PSA_ALG_CATEGORY_CIPHER                 ((psa_algorithm_t)0x04000000)
+#define PSA_ALG_CATEGORY_AEAD                   ((psa_algorithm_t)0x05000000)
+#define PSA_ALG_CATEGORY_SIGN                   ((psa_algorithm_t)0x06000000)
+#define PSA_ALG_CATEGORY_ASYMMETRIC_ENCRYPTION  ((psa_algorithm_t)0x07000000)
+#define PSA_ALG_CATEGORY_KEY_DERIVATION         ((psa_algorithm_t)0x08000000)
+#define PSA_ALG_CATEGORY_KEY_AGREEMENT          ((psa_algorithm_t)0x09000000)
+
+/** Whether an algorithm is vendor-defined.
+ *
+ * See also #PSA_ALG_VENDOR_FLAG.
+ */
+#define PSA_ALG_IS_VENDOR_DEFINED(alg)                                  \
+    (((alg) & PSA_ALG_VENDOR_FLAG) != 0)
+
+/** Whether the specified algorithm is a hash algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a hash algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HASH(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_HASH)
+
+/** Whether the specified algorithm is a MAC algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a MAC algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_MAC(alg)                                             \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_MAC)
+
+/** Whether the specified algorithm is a symmetric cipher algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a symmetric cipher algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_CIPHER(alg)                                          \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_CIPHER)
+
+/** Whether the specified algorithm is an authenticated encryption
+ * with associated data (AEAD) algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an AEAD algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_AEAD(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_AEAD)
+
+/** Whether the specified algorithm is an asymmetric signature algorithm,
+ * also known as public-key signature algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an asymmetric signature algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_SIGN)
+
+/** Whether the specified algorithm is an asymmetric encryption algorithm,
+ * also known as public-key encryption algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an asymmetric encryption algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_ASYMMETRIC_ENCRYPTION(alg)                           \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_ASYMMETRIC_ENCRYPTION)
+
+/** Whether the specified algorithm is a key agreement algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a key agreement algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_KEY_AGREEMENT(alg)                                   \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_KEY_AGREEMENT)
+
+/** Whether the specified algorithm is a key derivation algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a key derivation algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_KEY_DERIVATION(alg)                                  \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+/** An invalid algorithm identifier value. */
+#define PSA_ALG_NONE                            ((psa_algorithm_t)0)
+
+#define PSA_ALG_HASH_MASK                       ((psa_algorithm_t)0x000000ff)
+/** MD2 */
+#define PSA_ALG_MD2                             ((psa_algorithm_t)0x02000001)
+/** MD4 */
+#define PSA_ALG_MD4                             ((psa_algorithm_t)0x02000002)
+/** MD5 */
+#define PSA_ALG_MD5                             ((psa_algorithm_t)0x02000003)
+/** PSA_ALG_RIPEMD160 */
+#define PSA_ALG_RIPEMD160                       ((psa_algorithm_t)0x02000004)
+/** SHA1 */
+#define PSA_ALG_SHA_1                           ((psa_algorithm_t)0x02000005)
+/** SHA2-224 */
+#define PSA_ALG_SHA_224                         ((psa_algorithm_t)0x02000008)
+/** SHA2-256 */
+#define PSA_ALG_SHA_256                         ((psa_algorithm_t)0x02000009)
+/** SHA2-384 */
+#define PSA_ALG_SHA_384                         ((psa_algorithm_t)0x0200000a)
+/** SHA2-512 */
+#define PSA_ALG_SHA_512                         ((psa_algorithm_t)0x0200000b)
+/** SHA2-512/224 */
+#define PSA_ALG_SHA_512_224                     ((psa_algorithm_t)0x0200000c)
+/** SHA2-512/256 */
+#define PSA_ALG_SHA_512_256                     ((psa_algorithm_t)0x0200000d)
+/** SHA3-224 */
+#define PSA_ALG_SHA3_224                        ((psa_algorithm_t)0x02000010)
+/** SHA3-256 */
+#define PSA_ALG_SHA3_256                        ((psa_algorithm_t)0x02000011)
+/** SHA3-384 */
+#define PSA_ALG_SHA3_384                        ((psa_algorithm_t)0x02000012)
+/** SHA3-512 */
+#define PSA_ALG_SHA3_512                        ((psa_algorithm_t)0x02000013)
+/** The first 512 bits (64 bytes) of the SHAKE256 output.
+ *
+ * This is the prehashing for Ed448ph (see #PSA_ALG_ED448PH). For other
+ * scenarios where a hash function based on SHA3/SHAKE is desired, SHA3-512
+ * has the same output size and a (theoretically) higher security strength.
+ */
+#define PSA_ALG_SHAKE256_512                    ((psa_algorithm_t)0x02000015)
+
+/** In a hash-and-sign algorithm policy, allow any hash algorithm.
+ *
+ * This value may be used to form the algorithm usage field of a policy
+ * for a signature algorithm that is parametrized by a hash. The key
+ * may then be used to perform operations using the same signature
+ * algorithm parametrized with any supported hash.
+ *
+ * That is, suppose that `PSA_xxx_SIGNATURE` is one of the following macros:
+ * - #PSA_ALG_RSA_PKCS1V15_SIGN, #PSA_ALG_RSA_PSS, #PSA_ALG_RSA_PSS_ANY_SALT,
+ * - #PSA_ALG_ECDSA, #PSA_ALG_DETERMINISTIC_ECDSA.
+ * Then you may create and use a key as follows:
+ * - Set the key usage field using #PSA_ALG_ANY_HASH, for example:
+ *   ```
+ *   psa_set_key_usage_flags(&attributes, PSA_KEY_USAGE_SIGN_HASH); // or VERIFY
+ *   psa_set_key_algorithm(&attributes, PSA_xxx_SIGNATURE(PSA_ALG_ANY_HASH));
+ *   ```
+ * - Import or generate key material.
+ * - Call psa_sign_hash() or psa_verify_hash(), passing
+ *   an algorithm built from `PSA_xxx_SIGNATURE` and a specific hash. Each
+ *   call to sign or verify a message may use a different hash.
+ *   ```
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA_256), ...);
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA_512), ...);
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA3_256), ...);
+ *   ```
+ *
+ * This value may not be used to build other algorithms that are
+ * parametrized over a hash. For any valid use of this macro to build
+ * an algorithm \c alg, #PSA_ALG_IS_HASH_AND_SIGN(\c alg) is true.
+ *
+ * This value may not be used to build an algorithm specification to
+ * perform an operation. It is only valid to build policies.
+ */
+#define PSA_ALG_ANY_HASH                        ((psa_algorithm_t)0x020000ff)
+
+#define PSA_ALG_MAC_SUBCATEGORY_MASK            ((psa_algorithm_t)0x00c00000)
+#define PSA_ALG_HMAC_BASE                       ((psa_algorithm_t)0x03800000)
+/** Macro to build an HMAC algorithm.
+ *
+ * For example, #PSA_ALG_HMAC(#PSA_ALG_SHA_256) is HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding HMAC algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_HMAC(hash_alg)                                  \
+    (PSA_ALG_HMAC_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_HMAC_GET_HASH(hmac_alg)                             \
+    (PSA_ALG_CATEGORY_HASH | ((hmac_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is an HMAC algorithm.
+ *
+ * HMAC is a family of MAC algorithms that are based on a hash function.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an HMAC algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HMAC(alg)                                            \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_MAC_SUBCATEGORY_MASK)) == \
+     PSA_ALG_HMAC_BASE)
+
+/* In the encoding of a MAC algorithm, the bits corresponding to
+ * PSA_ALG_MAC_TRUNCATION_MASK encode the length to which the MAC is
+ * truncated. As an exception, the value 0 means the untruncated algorithm,
+ * whatever its length is. The length is encoded in 6 bits, so it can
+ * reach up to 63; the largest MAC is 64 bytes so its trivial truncation
+ * to full length is correctly encoded as 0 and any non-trivial truncation
+ * is correctly encoded as a value between 1 and 63. */
+#define PSA_ALG_MAC_TRUNCATION_MASK             ((psa_algorithm_t)0x003f0000)
+#define PSA_MAC_TRUNCATION_OFFSET 16
+
+/* In the encoding of a MAC algorithm, the bit corresponding to
+ * #PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG encodes the fact that the algorithm
+ * is a wildcard algorithm. A key with such wildcard algorithm as permitted
+ * algorithm policy can be used with any algorithm corresponding to the
+ * same base class and having a (potentially truncated) MAC length greater or
+ * equal than the one encoded in #PSA_ALG_MAC_TRUNCATION_MASK. */
+#define PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG   ((psa_algorithm_t)0x00008000)
+
+/** Macro to build a truncated MAC algorithm.
+ *
+ * A truncated MAC algorithm is identical to the corresponding MAC
+ * algorithm except that the MAC value for the truncated algorithm
+ * consists of only the first \p mac_length bytes of the MAC value
+ * for the untruncated algorithm.
+ *
+ * \note    This macro may allow constructing algorithm identifiers that
+ *          are not valid, either because the specified length is larger
+ *          than the untruncated MAC or because the specified length is
+ *          smaller than permitted by the implementation.
+ *
+ * \note    It is implementation-defined whether a truncated MAC that
+ *          is truncated to the same length as the MAC of the untruncated
+ *          algorithm is considered identical to the untruncated algorithm
+ *          for policy comparison purposes.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true). This may be a truncated or untruncated
+ *                      MAC algorithm.
+ * \param mac_length    Desired length of the truncated MAC in bytes.
+ *                      This must be at most the full length of the MAC
+ *                      and must be at least an implementation-specified
+ *                      minimum. The implementation-specified minimum
+ *                      shall not be zero.
+ *
+ * \return              The corresponding MAC algorithm with the specified
+ *                      length.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm or if \p mac_length is too small or
+ *                      too large for the specified MAC algorithm.
+ */
+#define PSA_ALG_TRUNCATED_MAC(mac_alg, mac_length)              \
+    (((mac_alg) & ~(PSA_ALG_MAC_TRUNCATION_MASK |               \
+                    PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG)) |   \
+     ((mac_length) << PSA_MAC_TRUNCATION_OFFSET & PSA_ALG_MAC_TRUNCATION_MASK))
+
+/** Macro to build the base MAC algorithm corresponding to a truncated
+ * MAC algorithm.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true). This may be a truncated or untruncated
+ *                      MAC algorithm.
+ *
+ * \return              The corresponding base MAC algorithm.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm.
+ */
+#define PSA_ALG_FULL_LENGTH_MAC(mac_alg)                        \
+    ((mac_alg) & ~(PSA_ALG_MAC_TRUNCATION_MASK |                \
+                   PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG))
+
+/** Length to which a MAC algorithm is truncated.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true).
+ *
+ * \return              Length of the truncated MAC in bytes.
+ * \return              0 if \p mac_alg is a non-truncated MAC algorithm.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm.
+ */
+#define PSA_MAC_TRUNCATED_LENGTH(mac_alg)                               \
+    (((mac_alg) & PSA_ALG_MAC_TRUNCATION_MASK) >> PSA_MAC_TRUNCATION_OFFSET)
+
+/** Macro to build a MAC minimum-MAC-length wildcard algorithm.
+ *
+ * A minimum-MAC-length MAC wildcard algorithm permits all MAC algorithms
+ * sharing the same base algorithm, and where the (potentially truncated) MAC
+ * length of the specific algorithm is equal to or larger then the wildcard
+ * algorithm's minimum MAC length.
+ *
+ * \note    When setting the minimum required MAC length to less than the
+ *          smallest MAC length allowed by the base algorithm, this effectively
+ *          becomes an 'any-MAC-length-allowed' policy for that base algorithm.
+ *
+ * \param mac_alg         A MAC algorithm identifier (value of type
+ *                        #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                        is true).
+ * \param min_mac_length  Desired minimum length of the message authentication
+ *                        code in bytes. This must be at most the untruncated
+ *                        length of the MAC and must be at least 1.
+ *
+ * \return                The corresponding MAC wildcard algorithm with the
+ *                        specified minimum length.
+ * \return                Unspecified if \p mac_alg is not a supported MAC
+ *                        algorithm or if \p min_mac_length is less than 1 or
+ *                        too large for the specified MAC algorithm.
+ */
+#define PSA_ALG_AT_LEAST_THIS_LENGTH_MAC(mac_alg, min_mac_length)   \
+    ( PSA_ALG_TRUNCATED_MAC(mac_alg, min_mac_length) |              \
+      PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG )
+
+#define PSA_ALG_CIPHER_MAC_BASE                 ((psa_algorithm_t)0x03c00000)
+/** The CBC-MAC construction over a block cipher
+ *
+ * \warning CBC-MAC is insecure in many cases.
+ * A more secure mode, such as #PSA_ALG_CMAC, is recommended.
+ */
+#define PSA_ALG_CBC_MAC                         ((psa_algorithm_t)0x03c00100)
+/** The CMAC construction over a block cipher */
+#define PSA_ALG_CMAC                            ((psa_algorithm_t)0x03c00200)
+
+/** Whether the specified algorithm is a MAC algorithm based on a block cipher.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a MAC algorithm based on a block cipher, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_BLOCK_CIPHER_MAC(alg)                                \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_MAC_SUBCATEGORY_MASK)) == \
+     PSA_ALG_CIPHER_MAC_BASE)
+
+#define PSA_ALG_CIPHER_STREAM_FLAG              ((psa_algorithm_t)0x00800000)
+#define PSA_ALG_CIPHER_FROM_BLOCK_FLAG          ((psa_algorithm_t)0x00400000)
+
+/** Whether the specified algorithm is a stream cipher.
+ *
+ * A stream cipher is a symmetric cipher that encrypts or decrypts messages
+ * by applying a bitwise-xor with a stream of bytes that is generated
+ * from a key.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a stream cipher algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier or if it is not a symmetric cipher algorithm.
+ */
+#define PSA_ALG_IS_STREAM_CIPHER(alg)            \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_CIPHER_STREAM_FLAG)) == \
+        (PSA_ALG_CATEGORY_CIPHER | PSA_ALG_CIPHER_STREAM_FLAG))
+
+/** The stream cipher mode of a stream cipher algorithm.
+ *
+ * The underlying stream cipher is determined by the key type.
+ * - To use ChaCha20, use a key type of #PSA_KEY_TYPE_CHACHA20.
+ * - To use ARC4, use a key type of #PSA_KEY_TYPE_ARC4.
+ */
+#define PSA_ALG_STREAM_CIPHER                   ((psa_algorithm_t)0x04800100)
+
+/** The CTR stream cipher mode.
+ *
+ * CTR is a stream cipher which is built from a block cipher.
+ * The underlying block cipher is determined by the key type.
+ * For example, to use AES-128-CTR, use this algorithm with
+ * a key of type #PSA_KEY_TYPE_AES and a length of 128 bits (16 bytes).
+ */
+#define PSA_ALG_CTR                             ((psa_algorithm_t)0x04c01000)
+
+/** The CFB stream cipher mode.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_CFB                             ((psa_algorithm_t)0x04c01100)
+
+/** The OFB stream cipher mode.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_OFB                             ((psa_algorithm_t)0x04c01200)
+
+/** The XTS cipher mode.
+ *
+ * XTS is a cipher mode which is built from a block cipher. It requires at
+ * least one full block of input, but beyond this minimum the input
+ * does not need to be a whole number of blocks.
+ */
+#define PSA_ALG_XTS                             ((psa_algorithm_t)0x0440ff00)
+
+/** The Electronic Code Book (ECB) mode of a block cipher, with no padding.
+ *
+ * \warning ECB mode does not protect the confidentiality of the encrypted data
+ * except in extremely narrow circumstances. It is recommended that applications
+ * only use ECB if they need to construct an operating mode that the
+ * implementation does not provide. Implementations are encouraged to provide
+ * the modes that applications need in preference to supporting direct access
+ * to ECB.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This symmetric cipher mode can only be used with messages whose lengths are a
+ * multiple of the block size of the chosen block cipher.
+ *
+ * ECB mode does not accept an initialization vector (IV). When using a
+ * multi-part cipher operation with this algorithm, psa_cipher_generate_iv()
+ * and psa_cipher_set_iv() must not be called.
+ */
+#define PSA_ALG_ECB_NO_PADDING                  ((psa_algorithm_t)0x04404400)
+
+/** The CBC block cipher chaining mode, with no padding.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This symmetric cipher mode can only be used with messages whose lengths
+ * are whole number of blocks for the chosen block cipher.
+ */
+#define PSA_ALG_CBC_NO_PADDING                  ((psa_algorithm_t)0x04404000)
+
+/** The CBC block cipher chaining mode with PKCS#7 padding.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This is the padding method defined by PKCS#7 (RFC 2315) &sect;10.3.
+ */
+#define PSA_ALG_CBC_PKCS7                       ((psa_algorithm_t)0x04404100)
+
+#define PSA_ALG_AEAD_FROM_BLOCK_FLAG            ((psa_algorithm_t)0x00400000)
+
+/** Whether the specified algorithm is an AEAD mode on a block cipher.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an AEAD algorithm which is an AEAD mode based on
+ *         a block cipher, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg)    \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_AEAD_FROM_BLOCK_FLAG)) == \
+     (PSA_ALG_CATEGORY_AEAD | PSA_ALG_AEAD_FROM_BLOCK_FLAG))
+
+/** The CCM authenticated encryption algorithm.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_CCM                             ((psa_algorithm_t)0x05500100)
+
+/** The GCM authenticated encryption algorithm.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_GCM                             ((psa_algorithm_t)0x05500200)
+
+/** The Chacha20-Poly1305 AEAD algorithm.
+ *
+ * The ChaCha20_Poly1305 construction is defined in RFC 7539.
+ *
+ * Implementations must support 12-byte nonces, may support 8-byte nonces,
+ * and should reject other sizes.
+ *
+ * Implementations must support 16-byte tags and should reject other sizes.
+ */
+#define PSA_ALG_CHACHA20_POLY1305               ((psa_algorithm_t)0x05100500)
+
+/* In the encoding of a AEAD algorithm, the bits corresponding to
+ * PSA_ALG_AEAD_TAG_LENGTH_MASK encode the length of the AEAD tag.
+ * The constants for default lengths follow this encoding.
+ */
+#define PSA_ALG_AEAD_TAG_LENGTH_MASK            ((psa_algorithm_t)0x003f0000)
+#define PSA_AEAD_TAG_LENGTH_OFFSET 16
+
+/* In the encoding of an AEAD algorithm, the bit corresponding to
+ * #PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG encodes the fact that the algorithm
+ * is a wildcard algorithm. A key with such wildcard algorithm as permitted
+ * algorithm policy can be used with any algorithm corresponding to the
+ * same base class and having a tag length greater than or equal to the one
+ * encoded in #PSA_ALG_AEAD_TAG_LENGTH_MASK. */
+#define PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG  ((psa_algorithm_t)0x00008000)
+
+/** Macro to build a shortened AEAD algorithm.
+ *
+ * A shortened AEAD algorithm is similar to the corresponding AEAD
+ * algorithm, but has an authentication tag that consists of fewer bytes.
+ * Depending on the algorithm, the tag length may affect the calculation
+ * of the ciphertext.
+ *
+ * \param aead_alg      An AEAD algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_AEAD(\p aead_alg)
+ *                      is true).
+ * \param tag_length    Desired length of the authentication tag in bytes.
+ *
+ * \return              The corresponding AEAD algorithm with the specified
+ *                      length.
+ * \return              Unspecified if \p aead_alg is not a supported
+ *                      AEAD algorithm or if \p tag_length is not valid
+ *                      for the specified AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, tag_length)           \
+    (((aead_alg) & ~(PSA_ALG_AEAD_TAG_LENGTH_MASK |                     \
+                     PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG)) |         \
+     ((tag_length) << PSA_AEAD_TAG_LENGTH_OFFSET &                      \
+      PSA_ALG_AEAD_TAG_LENGTH_MASK))
+
+/** Retrieve the tag length of a specified AEAD algorithm
+ *
+ * \param aead_alg      An AEAD algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_AEAD(\p aead_alg)
+ *                      is true).
+ *
+ * \return              The tag length specified by the input algorithm.
+ * \return              Unspecified if \p aead_alg is not a supported
+ *                      AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_GET_TAG_LENGTH(aead_alg)                           \
+    (((aead_alg) & PSA_ALG_AEAD_TAG_LENGTH_MASK) >>                     \
+      PSA_AEAD_TAG_LENGTH_OFFSET )
+
+/** Calculate the corresponding AEAD algorithm with the default tag length.
+ *
+ * \param aead_alg      An AEAD algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_AEAD(\p aead_alg) is true).
+ *
+ * \return              The corresponding AEAD algorithm with the default
+ *                      tag length for that algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG(aead_alg)                   \
+    (                                                                    \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_CCM) \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_GCM) \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_CHACHA20_POLY1305) \
+        0)
+#define PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, ref)         \
+    PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, 0) ==                      \
+    PSA_ALG_AEAD_WITH_SHORTENED_TAG(ref, 0) ?                            \
+    ref :
+
+/** Macro to build an AEAD minimum-tag-length wildcard algorithm.
+ *
+ * A minimum-tag-length AEAD wildcard algorithm permits all AEAD algorithms
+ * sharing the same base algorithm, and where the tag length of the specific
+ * algorithm is equal to or larger then the minimum tag length specified by the
+ * wildcard algorithm.
+ *
+ * \note    When setting the minimum required tag length to less than the
+ *          smallest tag length allowed by the base algorithm, this effectively
+ *          becomes an 'any-tag-length-allowed' policy for that base algorithm.
+ *
+ * \param aead_alg        An AEAD algorithm identifier (value of type
+ *                        #psa_algorithm_t such that
+ *                        #PSA_ALG_IS_AEAD(\p aead_alg) is true).
+ * \param min_tag_length  Desired minimum length of the authentication tag in
+ *                        bytes. This must be at least 1 and at most the largest
+ *                        allowed tag length of the algorithm.
+ *
+ * \return                The corresponding AEAD wildcard algorithm with the
+ *                        specified minimum length.
+ * \return                Unspecified if \p aead_alg is not a supported
+ *                        AEAD algorithm or if \p min_tag_length is less than 1
+ *                        or too large for the specified AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_AT_LEAST_THIS_LENGTH_TAG(aead_alg, min_tag_length) \
+    ( PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, min_tag_length) |            \
+      PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG )
+
+#define PSA_ALG_RSA_PKCS1V15_SIGN_BASE          ((psa_algorithm_t)0x06000200)
+/** RSA PKCS#1 v1.5 signature with hashing.
+ *
+ * This is the signature scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSASSA-PKCS1-v1_5.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PKCS#1 v1.5 signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PKCS1V15_SIGN(hash_alg)                             \
+    (PSA_ALG_RSA_PKCS1V15_SIGN_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** Raw PKCS#1 v1.5 signature.
+ *
+ * The input to this algorithm is the DigestInfo structure used by
+ * RFC 8017 (PKCS#1: RSA Cryptography Specifications), &sect;9.2
+ * steps 3&ndash;6.
+ */
+#define PSA_ALG_RSA_PKCS1V15_SIGN_RAW PSA_ALG_RSA_PKCS1V15_SIGN_BASE
+#define PSA_ALG_IS_RSA_PKCS1V15_SIGN(alg)                               \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PKCS1V15_SIGN_BASE)
+
+#define PSA_ALG_RSA_PSS_BASE               ((psa_algorithm_t)0x06000300)
+#define PSA_ALG_RSA_PSS_ANY_SALT_BASE      ((psa_algorithm_t)0x06001300)
+/** RSA PSS signature with hashing.
+ *
+ * This is the signature scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSASSA-PSS, with the message generation function MGF1, and with
+ * a salt length equal to the length of the hash. The specified
+ * hash algorithm is used to hash the input message, to create the
+ * salted hash, and for the mask generation.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PSS signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PSS(hash_alg)                               \
+    (PSA_ALG_RSA_PSS_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** RSA PSS signature with hashing with relaxed verification.
+ *
+ * This algorithm has the same behavior as #PSA_ALG_RSA_PSS when signing,
+ * but allows an arbitrary salt length (including \c 0) when verifying a
+ * signature.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PSS signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PSS_ANY_SALT(hash_alg)                      \
+    (PSA_ALG_RSA_PSS_ANY_SALT_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is RSA PSS with standard salt.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS_STANDARD_SALT(alg)                   \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PSS_BASE)
+
+/** Whether the specified algorithm is RSA PSS with any salt.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS_ANY_SALT_BASE(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS_ANY_SALT(alg)                                \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PSS_ANY_SALT_BASE)
+
+/** Whether the specified algorithm is RSA PSS.
+ *
+ * This includes any of the RSA PSS algorithm variants, regardless of the
+ * constraints on salt length.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS(\c hash_alg) or
+ *                      #PSA_ALG_RSA_PSS_ANY_SALT_BASE(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS(alg)                                 \
+    (PSA_ALG_IS_RSA_PSS_STANDARD_SALT(alg) ||                   \
+     PSA_ALG_IS_RSA_PSS_ANY_SALT(alg))
+
+#define PSA_ALG_ECDSA_BASE                      ((psa_algorithm_t)0x06000600)
+/** ECDSA signature with hashing.
+ *
+ * This is the ECDSA signature scheme defined by ANSI X9.62,
+ * with a random per-message secret number (*k*).
+ *
+ * The representation of the signature as a byte string consists of
+ * the concatentation of the signature values *r* and *s*. Each of
+ * *r* and *s* is encoded as an *N*-octet string, where *N* is the length
+ * of the base point of the curve in octets. Each value is represented
+ * in big-endian order (most significant octet first).
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding ECDSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_ECDSA(hash_alg)                                 \
+    (PSA_ALG_ECDSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** ECDSA signature without hashing.
+ *
+ * This is the same signature scheme as #PSA_ALG_ECDSA(), but
+ * without specifying a hash algorithm. This algorithm may only be
+ * used to sign or verify a sequence of bytes that should be an
+ * already-calculated hash. Note that the input is padded with
+ * zeros on the left or truncated on the left as required to fit
+ * the curve size.
+ */
+#define PSA_ALG_ECDSA_ANY PSA_ALG_ECDSA_BASE
+#define PSA_ALG_DETERMINISTIC_ECDSA_BASE        ((psa_algorithm_t)0x06000700)
+/** Deterministic ECDSA signature with hashing.
+ *
+ * This is the deterministic ECDSA signature scheme defined by RFC 6979.
+ *
+ * The representation of a signature is the same as with #PSA_ALG_ECDSA().
+ *
+ * Note that when this algorithm is used for verification, signatures
+ * made with randomized ECDSA (#PSA_ALG_ECDSA(\p hash_alg)) with the
+ * same private key are accepted. In other words,
+ * #PSA_ALG_DETERMINISTIC_ECDSA(\p hash_alg) differs from
+ * #PSA_ALG_ECDSA(\p hash_alg) only for signature, not for verification.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding deterministic ECDSA signature
+ *                      algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DETERMINISTIC_ECDSA(hash_alg)                           \
+    (PSA_ALG_DETERMINISTIC_ECDSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_ECDSA_DETERMINISTIC_FLAG        ((psa_algorithm_t)0x00000100)
+#define PSA_ALG_IS_ECDSA(alg)                                           \
+    (((alg) & ~PSA_ALG_HASH_MASK & ~PSA_ALG_ECDSA_DETERMINISTIC_FLAG) ==  \
+     PSA_ALG_ECDSA_BASE)
+#define PSA_ALG_ECDSA_IS_DETERMINISTIC(alg)             \
+    (((alg) & PSA_ALG_ECDSA_DETERMINISTIC_FLAG) != 0)
+#define PSA_ALG_IS_DETERMINISTIC_ECDSA(alg)                             \
+    (PSA_ALG_IS_ECDSA(alg) && PSA_ALG_ECDSA_IS_DETERMINISTIC(alg))
+#define PSA_ALG_IS_RANDOMIZED_ECDSA(alg)                                \
+    (PSA_ALG_IS_ECDSA(alg) && !PSA_ALG_ECDSA_IS_DETERMINISTIC(alg))
+
+/** Edwards-curve digital signature algorithm without prehashing (PureEdDSA),
+ * using standard parameters.
+ *
+ * Contexts are not supported in the current version of this specification
+ * because there is no suitable signature interface that can take the
+ * context as a parameter. A future version of this specification may add
+ * suitable functions and extend this algorithm to support contexts.
+ *
+ * PureEdDSA requires an elliptic curve key on a twisted Edwards curve.
+ * In this specification, the following curves are supported:
+ * - #PSA_ECC_FAMILY_TWISTED_EDWARDS, 255-bit: Ed25519 as specified
+ *   in RFC 8032.
+ *   The curve is Edwards25519.
+ *   The hash function used internally is SHA-512.
+ * - #PSA_ECC_FAMILY_TWISTED_EDWARDS, 448-bit: Ed448 as specified
+ *   in RFC 8032.
+ *   The curve is Edwards448.
+ *   The hash function used internally is the first 114 bytes of the
+ *   SHAKE256 output.
+ *
+ * This algorithm can be used with psa_sign_message() and
+ * psa_verify_message(). Since there is no prehashing, it cannot be used
+ * with psa_sign_hash() or psa_verify_hash().
+ *
+ * The signature format is the concatenation of R and S as defined by
+ * RFC 8032 §5.1.6 and §5.2.6 (a 64-byte string for Ed25519, a 114-byte
+ * string for Ed448).
+ */
+#define PSA_ALG_PURE_EDDSA                      ((psa_algorithm_t)0x06000800)
+
+#define PSA_ALG_HASH_EDDSA_BASE                 ((psa_algorithm_t)0x06000900)
+#define PSA_ALG_IS_HASH_EDDSA(alg)              \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_HASH_EDDSA_BASE)
+
+/** Edwards-curve digital signature algorithm with prehashing (HashEdDSA),
+ * using SHA-512 and the Edwards25519 curve.
+ *
+ * See #PSA_ALG_PURE_EDDSA regarding context support and the signature format.
+ *
+ * This algorithm is Ed25519 as specified in RFC 8032.
+ * The curve is Edwards25519.
+ * The prehash is SHA-512.
+ * The hash function used internally is SHA-512.
+ *
+ * This is a hash-and-sign algorithm: to calculate a signature,
+ * you can either:
+ * - call psa_sign_message() on the message;
+ * - or calculate the SHA-512 hash of the message
+ *   with psa_hash_compute()
+ *   or with a multi-part hash operation started with psa_hash_setup(),
+ *   using the hash algorithm #PSA_ALG_SHA_512,
+ *   then sign the calculated hash with psa_sign_hash().
+ * Verifying a signature is similar, using psa_verify_message() or
+ * psa_verify_hash() instead of the signature function.
+ */
+#define PSA_ALG_ED25519PH                               \
+    (PSA_ALG_HASH_EDDSA_BASE | (PSA_ALG_SHA_512 & PSA_ALG_HASH_MASK))
+
+/** Edwards-curve digital signature algorithm with prehashing (HashEdDSA),
+ * using SHAKE256 and the Edwards448 curve.
+ *
+ * See #PSA_ALG_PURE_EDDSA regarding context support and the signature format.
+ *
+ * This algorithm is Ed448 as specified in RFC 8032.
+ * The curve is Edwards448.
+ * The prehash is the first 64 bytes of the SHAKE256 output.
+ * The hash function used internally is the first 114 bytes of the
+ * SHAKE256 output.
+ *
+ * This is a hash-and-sign algorithm: to calculate a signature,
+ * you can either:
+ * - call psa_sign_message() on the message;
+ * - or calculate the first 64 bytes of the SHAKE256 output of the message
+ *   with psa_hash_compute()
+ *   or with a multi-part hash operation started with psa_hash_setup(),
+ *   using the hash algorithm #PSA_ALG_SHAKE256_512,
+ *   then sign the calculated hash with psa_sign_hash().
+ * Verifying a signature is similar, using psa_verify_message() or
+ * psa_verify_hash() instead of the signature function.
+ */
+#define PSA_ALG_ED448PH                                 \
+    (PSA_ALG_HASH_EDDSA_BASE | (PSA_ALG_SHAKE256_512 & PSA_ALG_HASH_MASK))
+
+/* Default definition, to be overridden if the library is extended with
+ * more hash-and-sign algorithms that we want to keep out of this header
+ * file. */
+#define PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg) 0
+
+/** Whether the specified algorithm is a signature algorithm that can be used
+ * with psa_sign_hash() and psa_verify_hash().
+ *
+ * This encompasses all strict hash-and-sign algorithms categorized by
+ * PSA_ALG_IS_HASH_AND_SIGN(), as well as algorithms that follow the
+ * paradigm more loosely:
+ * - #PSA_ALG_RSA_PKCS1V15_SIGN_RAW (expects its input to be an encoded hash)
+ * - #PSA_ALG_ECDSA_ANY (doesn't specify what kind of hash the input is)
+ *
+ * \param alg An algorithm identifier (value of type psa_algorithm_t).
+ *
+ * \return 1 if alg is a signature algorithm that can be used to sign a
+ *         hash. 0 if alg is a signature algorithm that can only be used
+ *         to sign a message. 0 if alg is not a signature algorithm.
+ *         This macro can return either 0 or 1 if alg is not a
+ *         supported algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN_HASH(alg)                                       \
+    (PSA_ALG_IS_RSA_PSS(alg) || PSA_ALG_IS_RSA_PKCS1V15_SIGN(alg) ||    \
+     PSA_ALG_IS_ECDSA(alg) || PSA_ALG_IS_HASH_EDDSA(alg) ||             \
+     PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg))
+
+/** Whether the specified algorithm is a signature algorithm that can be used
+ * with psa_sign_message() and psa_verify_message().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if alg is a signature algorithm that can be used to sign a
+ *         message. 0 if \p alg is a signature algorithm that can only be used
+ *         to sign an already-calculated hash. 0 if \p alg is not a signature
+ *         algorithm. This macro can return either 0 or 1 if \p alg is not a
+ *         supported algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN_MESSAGE(alg)                                    \
+    (PSA_ALG_IS_SIGN_HASH(alg) || (alg) == PSA_ALG_PURE_EDDSA )
+
+/** Whether the specified algorithm is a hash-and-sign algorithm.
+ *
+ * Hash-and-sign algorithms are asymmetric (public-key) signature algorithms
+ * structured in two parts: first the calculation of a hash in a way that
+ * does not depend on the key, then the calculation of a signature from the
+ * hash value and the key. Hash-and-sign algorithms encode the hash
+ * used for the hashing step, and you can call #PSA_ALG_SIGN_GET_HASH
+ * to extract this algorithm.
+ *
+ * Thus, for a hash-and-sign algorithm,
+ * `psa_sign_message(key, alg, input, ...)` is equivalent to
+ * ```
+ * psa_hash_compute(PSA_ALG_SIGN_GET_HASH(alg), input, ..., hash, ...);
+ * psa_sign_hash(key, alg, hash, ..., signature, ...);
+ * ```
+ * Most usefully, separating the hash from the signature allows the hash
+ * to be calculated in multiple steps with psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(). Likewise psa_verify_message() is equivalent to
+ * calculating the hash and then calling psa_verify_hash().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a hash-and-sign algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HASH_AND_SIGN(alg)                                   \
+    (PSA_ALG_IS_SIGN_HASH(alg) &&                                       \
+     ((alg) & PSA_ALG_HASH_MASK) != 0)
+
+/** Get the hash used by a hash-and-sign signature algorithm.
+ *
+ * A hash-and-sign algorithm is a signature algorithm which is
+ * composed of two phases: first a hashing phase which does not use
+ * the key and produces a hash of the input message, then a signing
+ * phase which only uses the hash and the key and not the message
+ * itself.
+ *
+ * \param alg   A signature algorithm (\c PSA_ALG_XXX value such that
+ *              #PSA_ALG_IS_SIGN(\p alg) is true).
+ *
+ * \return      The underlying hash algorithm if \p alg is a hash-and-sign
+ *              algorithm.
+ * \return      0 if \p alg is a signature algorithm that does not
+ *              follow the hash-and-sign structure.
+ * \return      Unspecified if \p alg is not a signature algorithm or
+ *              if it is not supported by the implementation.
+ */
+#define PSA_ALG_SIGN_GET_HASH(alg)                                     \
+    (PSA_ALG_IS_HASH_AND_SIGN(alg) ?                                   \
+     ((alg) & PSA_ALG_HASH_MASK) | PSA_ALG_CATEGORY_HASH :             \
+     0)
+
+/** RSA PKCS#1 v1.5 encryption.
+ */
+#define PSA_ALG_RSA_PKCS1V15_CRYPT              ((psa_algorithm_t)0x07000200)
+
+#define PSA_ALG_RSA_OAEP_BASE                   ((psa_algorithm_t)0x07000300)
+/** RSA OAEP encryption.
+ *
+ * This is the encryption scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSAES-OAEP, with the message generation function MGF1.
+ *
+ * \param hash_alg      The hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true) to use
+ *                      for MGF1.
+ *
+ * \return              The corresponding RSA OAEP encryption algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_OAEP(hash_alg)                              \
+    (PSA_ALG_RSA_OAEP_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_IS_RSA_OAEP(alg)                                \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_OAEP_BASE)
+#define PSA_ALG_RSA_OAEP_GET_HASH(alg)                          \
+    (PSA_ALG_IS_RSA_OAEP(alg) ?                                 \
+     ((alg) & PSA_ALG_HASH_MASK) | PSA_ALG_CATEGORY_HASH :      \
+     0)
+
+#define PSA_ALG_HKDF_BASE                       ((psa_algorithm_t)0x08000100)
+/** Macro to build an HKDF algorithm.
+ *
+ * For example, `PSA_ALG_HKDF(PSA_ALG_SHA256)` is HKDF using HMAC-SHA-256.
+ *
+ * This key derivation algorithm uses the following inputs:
+ * - #PSA_KEY_DERIVATION_INPUT_SALT is the salt used in the "extract" step.
+ *   It is optional; if omitted, the derivation uses an empty salt.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key used in the "extract" step.
+ * - #PSA_KEY_DERIVATION_INPUT_INFO is the info string used in the "expand" step.
+ * You must pass #PSA_KEY_DERIVATION_INPUT_SALT before #PSA_KEY_DERIVATION_INPUT_SECRET.
+ * You may pass #PSA_KEY_DERIVATION_INPUT_INFO at any time after steup and before
+ * starting to generate output.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding HKDF algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_HKDF(hash_alg)                                  \
+    (PSA_ALG_HKDF_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** Whether the specified algorithm is an HKDF algorithm.
+ *
+ * HKDF is a family of key derivation algorithms that are based on a hash
+ * function and the HMAC construction.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is an HKDF algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_HKDF(alg)                            \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_HKDF_BASE)
+#define PSA_ALG_HKDF_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_TLS12_PRF_BASE                  ((psa_algorithm_t)0x08000200)
+/** Macro to build a TLS-1.2 PRF algorithm.
+ *
+ * TLS 1.2 uses a custom pseudorandom function (PRF) for key schedule,
+ * specified in Section 5 of RFC 5246. It is based on HMAC and can be
+ * used with either SHA-256 or SHA-384.
+ *
+ * This key derivation algorithm uses the following inputs, which must be
+ * passed in the order given here:
+ * - #PSA_KEY_DERIVATION_INPUT_SEED is the seed.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key.
+ * - #PSA_KEY_DERIVATION_INPUT_LABEL is the label.
+ *
+ * For the application to TLS-1.2 key expansion, the seed is the
+ * concatenation of ServerHello.Random + ClientHello.Random,
+ * and the label is "key expansion".
+ *
+ * For example, `PSA_ALG_TLS12_PRF(PSA_ALG_SHA256)` represents the
+ * TLS 1.2 PRF using HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding TLS-1.2 PRF algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_TLS12_PRF(hash_alg)                                  \
+    (PSA_ALG_TLS12_PRF_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is a TLS-1.2 PRF algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a TLS-1.2 PRF algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_TLS12_PRF(alg)                                    \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_TLS12_PRF_BASE)
+#define PSA_ALG_TLS12_PRF_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_TLS12_PSK_TO_MS_BASE            ((psa_algorithm_t)0x08000300)
+/** Macro to build a TLS-1.2 PSK-to-MasterSecret algorithm.
+ *
+ * In a pure-PSK handshake in TLS 1.2, the master secret is derived
+ * from the PreSharedKey (PSK) through the application of padding
+ * (RFC 4279, Section 2) and the TLS-1.2 PRF (RFC 5246, Section 5).
+ * The latter is based on HMAC and can be used with either SHA-256
+ * or SHA-384.
+ *
+ * This key derivation algorithm uses the following inputs, which must be
+ * passed in the order given here:
+ * - #PSA_KEY_DERIVATION_INPUT_SEED is the seed.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key.
+ * - #PSA_KEY_DERIVATION_INPUT_LABEL is the label.
+ *
+ * For the application to TLS-1.2, the seed (which is
+ * forwarded to the TLS-1.2 PRF) is the concatenation of the
+ * ClientHello.Random + ServerHello.Random,
+ * and the label is "master secret" or "extended master secret".
+ *
+ * For example, `PSA_ALG_TLS12_PSK_TO_MS(PSA_ALG_SHA256)` represents the
+ * TLS-1.2 PSK to MasterSecret derivation PRF using HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding TLS-1.2 PSK to MS algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_TLS12_PSK_TO_MS(hash_alg)                                  \
+    (PSA_ALG_TLS12_PSK_TO_MS_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is a TLS-1.2 PSK to MS algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a TLS-1.2 PSK to MS algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_TLS12_PSK_TO_MS(alg)                                    \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_TLS12_PSK_TO_MS_BASE)
+#define PSA_ALG_TLS12_PSK_TO_MS_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_KEY_DERIVATION_MASK             ((psa_algorithm_t)0xfe00ffff)
+#define PSA_ALG_KEY_AGREEMENT_MASK              ((psa_algorithm_t)0xffff0000)
+
+/** Macro to build a combined algorithm that chains a key agreement with
+ * a key derivation.
+ *
+ * \param ka_alg        A key agreement algorithm (\c PSA_ALG_XXX value such
+ *                      that #PSA_ALG_IS_KEY_AGREEMENT(\p ka_alg) is true).
+ * \param kdf_alg       A key derivation algorithm (\c PSA_ALG_XXX value such
+ *                      that #PSA_ALG_IS_KEY_DERIVATION(\p kdf_alg) is true).
+ *
+ * \return              The corresponding key agreement and derivation
+ *                      algorithm.
+ * \return              Unspecified if \p ka_alg is not a supported
+ *                      key agreement algorithm or \p kdf_alg is not a
+ *                      supported key derivation algorithm.
+ */
+#define PSA_ALG_KEY_AGREEMENT(ka_alg, kdf_alg)  \
+    ((ka_alg) | (kdf_alg))
+
+#define PSA_ALG_KEY_AGREEMENT_GET_KDF(alg)                              \
+    (((alg) & PSA_ALG_KEY_DERIVATION_MASK) | PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+#define PSA_ALG_KEY_AGREEMENT_GET_BASE(alg)                             \
+    (((alg) & PSA_ALG_KEY_AGREEMENT_MASK) | PSA_ALG_CATEGORY_KEY_AGREEMENT)
+
+/** Whether the specified algorithm is a raw key agreement algorithm.
+ *
+ * A raw key agreement algorithm is one that does not specify
+ * a key derivation function.
+ * Usually, raw key agreement algorithms are constructed directly with
+ * a \c PSA_ALG_xxx macro while non-raw key agreement algorithms are
+ * constructed with #PSA_ALG_KEY_AGREEMENT().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a raw key agreement algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_RAW_KEY_AGREEMENT(alg)                               \
+    (PSA_ALG_IS_KEY_AGREEMENT(alg) &&                                   \
+     PSA_ALG_KEY_AGREEMENT_GET_KDF(alg) == PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+#define PSA_ALG_IS_KEY_DERIVATION_OR_AGREEMENT(alg)     \
+    ((PSA_ALG_IS_KEY_DERIVATION(alg) || PSA_ALG_IS_KEY_AGREEMENT(alg)))
+
+/** The finite-field Diffie-Hellman (DH) key agreement algorithm.
+ *
+ * The shared secret produced by key agreement is
+ * `g^{ab}` in big-endian format.
+ * It is `ceiling(m / 8)` bytes long where `m` is the size of the prime `p`
+ * in bits.
+ */
+#define PSA_ALG_FFDH                            ((psa_algorithm_t)0x09010000)
+
+/** Whether the specified algorithm is a finite field Diffie-Hellman algorithm.
+ *
+ * This includes the raw finite field Diffie-Hellman algorithm as well as
+ * finite-field Diffie-Hellman followed by any supporter key derivation
+ * algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a finite field Diffie-Hellman algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key agreement algorithm identifier.
+ */
+#define PSA_ALG_IS_FFDH(alg) \
+    (PSA_ALG_KEY_AGREEMENT_GET_BASE(alg) == PSA_ALG_FFDH)
+
+/** The elliptic curve Diffie-Hellman (ECDH) key agreement algorithm.
+ *
+ * The shared secret produced by key agreement is the x-coordinate of
+ * the shared secret point. It is always `ceiling(m / 8)` bytes long where
+ * `m` is the bit size associated with the curve, i.e. the bit size of the
+ * order of the curve's coordinate field. When `m` is not a multiple of 8,
+ * the byte containing the most significant bit of the shared secret
+ * is padded with zero bits. The byte order is either little-endian
+ * or big-endian depending on the curve type.
+ *
+ * - For Montgomery curves (curve types `PSA_ECC_FAMILY_CURVEXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in little-endian byte order.
+ *   The bit size is 448 for Curve448 and 255 for Curve25519.
+ * - For Weierstrass curves over prime fields (curve types
+ *   `PSA_ECC_FAMILY_SECPXXX` and `PSA_ECC_FAMILY_BRAINPOOL_PXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in big-endian byte order.
+ *   The bit size is `m = ceiling(log_2(p))` for the field `F_p`.
+ * - For Weierstrass curves over binary fields (curve types
+ *   `PSA_ECC_FAMILY_SECTXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in big-endian byte order.
+ *   The bit size is `m` for the field `F_{2^m}`.
+ */
+#define PSA_ALG_ECDH                            ((psa_algorithm_t)0x09020000)
+
+/** Whether the specified algorithm is an elliptic curve Diffie-Hellman
+ * algorithm.
+ *
+ * This includes the raw elliptic curve Diffie-Hellman algorithm as well as
+ * elliptic curve Diffie-Hellman followed by any supporter key derivation
+ * algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is an elliptic curve Diffie-Hellman algorithm,
+ *         0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key agreement algorithm identifier.
+ */
+#define PSA_ALG_IS_ECDH(alg) \
+    (PSA_ALG_KEY_AGREEMENT_GET_BASE(alg) == PSA_ALG_ECDH)
+
+/** Whether the specified algorithm encoding is a wildcard.
+ *
+ * Wildcard values may only be used to set the usage algorithm field in
+ * a policy, not to perform an operation.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a wildcard algorithm encoding.
+ * \return 0 if \c alg is a non-wildcard algorithm encoding (suitable for
+ *         an operation).
+ * \return This macro may return either 0 or 1 if \c alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_WILDCARD(alg)                            \
+    (PSA_ALG_IS_HASH_AND_SIGN(alg) ?                        \
+     PSA_ALG_SIGN_GET_HASH(alg) == PSA_ALG_ANY_HASH :       \
+     PSA_ALG_IS_MAC(alg) ?                                  \
+     (alg & PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG) != 0 :   \
+     PSA_ALG_IS_AEAD(alg) ?                                 \
+     (alg & PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG) != 0 :  \
+     (alg) == PSA_ALG_ANY_HASH)
+
+/**@}*/
+
+/** \defgroup key_lifetimes Key lifetimes
+ * @{
+ */
+
+/** The default lifetime for volatile keys.
+ *
+ * A volatile key only exists as long as the identifier to it is not destroyed.
+ * The key material is guaranteed to be erased on a power reset.
+ *
+ * A key with this lifetime is typically stored in the RAM area of the
+ * PSA Crypto subsystem. However this is an implementation choice.
+ * If an implementation stores data about the key in a non-volatile memory,
+ * it must release all the resources associated with the key and erase the
+ * key material if the calling application terminates.
+ */
+#define PSA_KEY_LIFETIME_VOLATILE               ((psa_key_lifetime_t)0x00000000)
+
+/** The default lifetime for persistent keys.
+ *
+ * A persistent key remains in storage until it is explicitly destroyed or
+ * until the corresponding storage area is wiped. This specification does
+ * not define any mechanism to wipe a storage area, but integrations may
+ * provide their own mechanism (for example to perform a factory reset,
+ * to prepare for device refurbishment, or to uninstall an application).
+ *
+ * This lifetime value is the default storage area for the calling
+ * application. Integrations of Mbed TLS may support other persistent lifetimes.
+ * See ::psa_key_lifetime_t for more information.
+ */
+#define PSA_KEY_LIFETIME_PERSISTENT             ((psa_key_lifetime_t)0x00000001)
+
+/** The persistence level of volatile keys.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_VOLATILE            ((psa_key_persistence_t)0x00)
+
+/** The default persistence level for persistent keys.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_DEFAULT             ((psa_key_persistence_t)0x01)
+
+/** A persistence level indicating that a key is never destroyed.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_READ_ONLY           ((psa_key_persistence_t)0xff)
+
+#define PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime)      \
+    ((psa_key_persistence_t)((lifetime) & 0x000000ff))
+
+#define PSA_KEY_LIFETIME_GET_LOCATION(lifetime)      \
+    ((psa_key_location_t)((lifetime) >> 8))
+
+/** Whether a key lifetime indicates that the key is volatile.
+ *
+ * A volatile key is automatically destroyed by the implementation when
+ * the application instance terminates. In particular, a volatile key
+ * is automatically destroyed on a power reset of the device.
+ *
+ * A key that is not volatile is persistent. Persistent keys are
+ * preserved until the application explicitly destroys them or until an
+ * implementation-specific device management event occurs (for example,
+ * a factory reset).
+ *
+ * \param lifetime      The lifetime value to query (value of type
+ *                      ::psa_key_lifetime_t).
+ *
+ * \return \c 1 if the key is volatile, otherwise \c 0.
+ */
+#define PSA_KEY_LIFETIME_IS_VOLATILE(lifetime)  \
+    (PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime) == \
+     PSA_KEY_PERSISTENCE_VOLATILE)
+
+/** Whether a key lifetime indicates that the key is read-only.
+ *
+ * Read-only keys cannot be created or destroyed through the PSA Crypto API.
+ * They must be created through platform-specific means that bypass the API.
+ *
+ * Some platforms may offer ways to destroy read-only keys. For example,
+ * consider a platform with multiple levels of privilege, where a
+ * low-privilege application can use a key but is not allowed to destroy
+ * it, and the platform exposes the key to the application with a read-only
+ * lifetime. High-privilege code can destroy the key even though the
+ * application sees the key as read-only.
+ *
+ * \param lifetime      The lifetime value to query (value of type
+ *                      ::psa_key_lifetime_t).
+ *
+ * \return \c 1 if the key is read-only, otherwise \c 0.
+ */
+#define PSA_KEY_LIFETIME_IS_READ_ONLY(lifetime)  \
+    (PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime) == \
+     PSA_KEY_PERSISTENCE_READ_ONLY)
+
+/** Construct a lifetime from a persistence level and a location.
+ *
+ * \param persistence   The persistence level
+ *                      (value of type ::psa_key_persistence_t).
+ * \param location      The location indicator
+ *                      (value of type ::psa_key_location_t).
+ *
+ * \return The constructed lifetime value.
+ */
+#define PSA_KEY_LIFETIME_FROM_PERSISTENCE_AND_LOCATION(persistence, location) \
+    ((location) << 8 | (persistence))
+
+/** The local storage area for persistent keys.
+ *
+ * This storage area is available on all systems that can store persistent
+ * keys without delegating the storage to a third-party cryptoprocessor.
+ *
+ * See ::psa_key_location_t for more information.
+ */
+#define PSA_KEY_LOCATION_LOCAL_STORAGE          ((psa_key_location_t)0x000000)
+
+#define PSA_KEY_LOCATION_VENDOR_FLAG            ((psa_key_location_t)0x800000)
+
+/** The null key identifier.
+ */
+#define PSA_KEY_ID_NULL                         ((psa_key_id_t)0)
+/** The minimum value for a key identifier chosen by the application.
+ */
+#define PSA_KEY_ID_USER_MIN                     ((psa_key_id_t)0x00000001)
+/** The maximum value for a key identifier chosen by the application.
+ */
+#define PSA_KEY_ID_USER_MAX                     ((psa_key_id_t)0x3fffffff)
+/** The minimum value for a key identifier chosen by the implementation.
+ */
+#define PSA_KEY_ID_VENDOR_MIN                   ((psa_key_id_t)0x40000000)
+/** The maximum value for a key identifier chosen by the implementation.
+ */
+#define PSA_KEY_ID_VENDOR_MAX                   ((psa_key_id_t)0x7fffffff)
+
+
+#if !defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+
+#define MBEDTLS_SVC_KEY_ID_INIT ( (psa_key_id_t)0 )
+#define MBEDTLS_SVC_KEY_ID_GET_KEY_ID( id ) ( id )
+#define MBEDTLS_SVC_KEY_ID_GET_OWNER_ID( id ) ( 0 )
+
+/** Utility to initialize a key identifier at runtime.
+ *
+ * \param unused  Unused parameter.
+ * \param key_id  Identifier of the key.
+ */
+static inline mbedtls_svc_key_id_t mbedtls_svc_key_id_make(
+    unsigned int unused, psa_key_id_t key_id )
+{
+    (void)unused;
+
+    return( key_id );
+}
+
+/** Compare two key identifiers.
+ *
+ * \param id1 First key identifier.
+ * \param id2 Second key identifier.
+ *
+ * \return Non-zero if the two key identifier are equal, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_equal( mbedtls_svc_key_id_t id1,
+                                            mbedtls_svc_key_id_t id2 )
+{
+    return( id1 == id2 );
+}
+
+/** Check whether a key identifier is null.
+ *
+ * \param key Key identifier.
+ *
+ * \return Non-zero if the key identifier is null, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_is_null( mbedtls_svc_key_id_t key )
+{
+    return( key == 0 );
+}
+
+#else /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+#define MBEDTLS_SVC_KEY_ID_INIT ( (mbedtls_svc_key_id_t){ 0, 0 } )
+#define MBEDTLS_SVC_KEY_ID_GET_KEY_ID( id ) ( ( id ).key_id )
+#define MBEDTLS_SVC_KEY_ID_GET_OWNER_ID( id ) ( ( id ).owner )
+
+/** Utility to initialize a key identifier at runtime.
+ *
+ * \param owner_id Identifier of the key owner.
+ * \param key_id   Identifier of the key.
+ */
+static inline mbedtls_svc_key_id_t mbedtls_svc_key_id_make(
+    mbedtls_key_owner_id_t owner_id, psa_key_id_t key_id )
+{
+    return( (mbedtls_svc_key_id_t){ .key_id = key_id,
+                                    .owner = owner_id } );
+}
+
+/** Compare two key identifiers.
+ *
+ * \param id1 First key identifier.
+ * \param id2 Second key identifier.
+ *
+ * \return Non-zero if the two key identifier are equal, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_equal( mbedtls_svc_key_id_t id1,
+                                            mbedtls_svc_key_id_t id2 )
+{
+    return( ( id1.key_id == id2.key_id ) &&
+            mbedtls_key_owner_id_equal( id1.owner, id2.owner ) );
+}
+
+/** Check whether a key identifier is null.
+ *
+ * \param key Key identifier.
+ *
+ * \return Non-zero if the key identifier is null, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_is_null( mbedtls_svc_key_id_t key )
+{
+    return( key.key_id == 0 );
+}
+
+#endif /* !MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/**@}*/
+
+/** \defgroup policy Key policies
+ * @{
+ */
+
+/** Whether the key may be exported.
+ *
+ * A public key or the public part of a key pair may always be exported
+ * regardless of the value of this permission flag.
+ *
+ * If a key does not have export permission, implementations shall not
+ * allow the key to be exported in plain form from the cryptoprocessor,
+ * whether through psa_export_key() or through a proprietary interface.
+ * The key may however be exportable in a wrapped form, i.e. in a form
+ * where it is encrypted by another key.
+ */
+#define PSA_KEY_USAGE_EXPORT                    ((psa_key_usage_t)0x00000001)
+
+/** Whether the key may be copied.
+ *
+ * This flag allows the use of psa_copy_key() to make a copy of the key
+ * with the same policy or a more restrictive policy.
+ *
+ * For lifetimes for which the key is located in a secure element which
+ * enforce the non-exportability of keys, copying a key outside the secure
+ * element also requires the usage flag #PSA_KEY_USAGE_EXPORT.
+ * Copying the key inside the secure element is permitted with just
+ * #PSA_KEY_USAGE_COPY if the secure element supports it.
+ * For keys with the lifetime #PSA_KEY_LIFETIME_VOLATILE or
+ * #PSA_KEY_LIFETIME_PERSISTENT, the usage flag #PSA_KEY_USAGE_COPY
+ * is sufficient to permit the copy.
+ */
+#define PSA_KEY_USAGE_COPY                      ((psa_key_usage_t)0x00000002)
+
+/** Whether the key may be used to encrypt a message.
+ *
+ * This flag allows the key to be used for a symmetric encryption operation,
+ * for an AEAD encryption-and-authentication operation,
+ * or for an asymmetric encryption operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_ENCRYPT                   ((psa_key_usage_t)0x00000100)
+
+/** Whether the key may be used to decrypt a message.
+ *
+ * This flag allows the key to be used for a symmetric decryption operation,
+ * for an AEAD decryption-and-verification operation,
+ * or for an asymmetric decryption operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_DECRYPT                   ((psa_key_usage_t)0x00000200)
+
+/** Whether the key may be used to sign a message.
+ *
+ * This flag allows the key to be used for a MAC calculation operation or for
+ * an asymmetric message signature operation, if otherwise permitted by the
+ * key’s type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_SIGN_MESSAGE              ((psa_key_usage_t)0x00000400)
+
+/** Whether the key may be used to verify a message.
+ *
+ * This flag allows the key to be used for a MAC verification operation or for
+ * an asymmetric message signature verification operation, if otherwise
+ * permitted by the key’s type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_VERIFY_MESSAGE            ((psa_key_usage_t)0x00000800)
+
+/** Whether the key may be used to sign a message.
+ *
+ * This flag allows the key to be used for a MAC calculation operation
+ * or for an asymmetric signature operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_SIGN_HASH                 ((psa_key_usage_t)0x00001000)
+
+/** Whether the key may be used to verify a message signature.
+ *
+ * This flag allows the key to be used for a MAC verification operation
+ * or for an asymmetric signature verification operation,
+ * if otherwise permitted by by the key's type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_VERIFY_HASH               ((psa_key_usage_t)0x00002000)
+
+/** Whether the key may be used to derive other keys.
+ */
+#define PSA_KEY_USAGE_DERIVE                    ((psa_key_usage_t)0x00004000)
+
+/**@}*/
+
+/** \defgroup derivation Key derivation
+ * @{
+ */
+
+/** A secret input for key derivation.
+ *
+ * This should be a key of type #PSA_KEY_TYPE_DERIVE
+ * (passed to psa_key_derivation_input_key())
+ * or the shared secret resulting from a key agreement
+ * (obtained via psa_key_derivation_key_agreement()).
+ *
+ * The secret can also be a direct input (passed to
+ * key_derivation_input_bytes()). In this case, the derivation operation
+ * may not be used to derive keys: the operation will only allow
+ * psa_key_derivation_output_bytes(), not psa_key_derivation_output_key().
+ */
+#define PSA_KEY_DERIVATION_INPUT_SECRET     ((psa_key_derivation_step_t)0x0101)
+
+/** A label for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_LABEL      ((psa_key_derivation_step_t)0x0201)
+
+/** A salt for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_SALT       ((psa_key_derivation_step_t)0x0202)
+
+/** An information string for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_INFO       ((psa_key_derivation_step_t)0x0203)
+
+/** A seed for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_SEED       ((psa_key_derivation_step_t)0x0204)
+
+/**@}*/
+
+/** \defgroup helper_macros Helper macros
+ * @{
+ */
+
+/* Helper macros */
+
+/** Check if two AEAD algorithm identifiers refer to the same AEAD algorithm
+ *  regardless of the tag length they encode.
+ *
+ * \param aead_alg_1 An AEAD algorithm identifier.
+ * \param aead_alg_2 An AEAD algorithm identifier.
+ *
+ * \return           1 if both identifiers refer to the same AEAD algorithm,
+ *                   0 otherwise.
+ *                   Unspecified if neither \p aead_alg_1 nor \p aead_alg_2 are
+ *                   a supported AEAD algorithm.
+ */
+#define MBEDTLS_PSA_ALG_AEAD_EQUAL(aead_alg_1, aead_alg_2) \
+    (!(((aead_alg_1) ^ (aead_alg_2)) & \
+       ~(PSA_ALG_AEAD_TAG_LENGTH_MASK | PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG)))
+
+/**@}*/
+
+#endif /* PSA_CRYPTO_VALUES_H */
diff --git a/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h b/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h
index 9c63118eb57..607d35ffc69 100644
--- a/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h
+++ b/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h
@@ -1,12 +1,13 @@
 /**
  *
- * \brief Default mbedTLS configuration options for esp-idf
+ * \brief Default mbedTLS configuration options for ESP-IDF
  *
  *  This set of compile-time options may be used to enable
  *  or disable features selectively, and reduce the global
  *  memory footprint.
- *
- *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
  *  SPDX-License-Identifier: Apache-2.0
  *
  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
@@ -20,8 +21,6 @@
  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  *  See the License for the specific language governing permissions and
  *  limitations under the License.
- *
- *  This file is part of mbed TLS (https://tls.mbed.org)
  */
 
 #ifndef ESP_CONFIG_H
@@ -310,18 +309,54 @@
  *
  * \note  This option only works with the default software implementation of
  *        elliptic curve functionality. It is incompatible with
- *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT and MBEDTLS_ECDSA_XXX_ALT.
+ *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT, MBEDTLS_ECDSA_XXX_ALT
+ *        and MBEDTLS_ECDH_LEGACY_CONTEXT.
  */
 #ifdef CONFIG_MBEDTLS_ECP_RESTARTABLE
 #define MBEDTLS_ECP_RESTARTABLE
 #endif
 
+/**
+ * \def MBEDTLS_ECDH_LEGACY_CONTEXT
+ *
+ * Use a backward compatible ECDH context.
+ *
+ * Mbed TLS supports two formats for ECDH contexts (#mbedtls_ecdh_context
+ * defined in `ecdh.h`). For most applications, the choice of format makes
+ * no difference, since all library functions can work with either format,
+ * except that the new format is incompatible with MBEDTLS_ECP_RESTARTABLE.
+
+ * The new format used when this option is disabled is smaller
+ * (56 bytes on a 32-bit platform). In future versions of the library, it
+ * will support alternative implementations of ECDH operations.
+ * The new format is incompatible with applications that access
+ * context fields directly and with restartable ECP operations.
+ *
+ * Define this macro if you enable MBEDTLS_ECP_RESTARTABLE or if you
+ * want to access ECDH context fields directly. Otherwise you should
+ * comment out this macro definition.
+ *
+ * This option has no effect if #MBEDTLS_ECDH_C is not enabled.
+ *
+ * \note This configuration option is experimental. Future versions of the
+ *       library may modify the way the ECDH context layout is configured
+ *       and may modify the layout of the new context type.
+ */
+#ifdef CONFIG_MBEDTLS_ECDH_LEGACY_CONTEXT
+#define MBEDTLS_ECDH_LEGACY_CONTEXT
+#endif
+
 /**
  * \def MBEDTLS_CMAC_C
  *
  * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
  * ciphers.
  *
+ * \note When #MBEDTLS_CMAC_ALT is active, meaning that the underlying
+ *       implementation of the CMAC algorithm is provided by an alternate
+ *       implementation, that alternate implementation may opt to not support
+ *       AES-192 or 3DES as underlying block ciphers for the CMAC operation.
+ *
  * Module:  library/cmac.c
  *
  * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
@@ -339,6 +374,7 @@
  *
  * Comment macros to disable the curve and functions for it
  */
+/* Short Weierstrass curves (supporting ECP, ECDH, ECDSA) */
 #ifdef CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED
 #define MBEDTLS_ECP_DP_SECP192R1_ENABLED
 #else
@@ -394,12 +430,12 @@
 #else
 #undef MBEDTLS_ECP_DP_BP512R1_ENABLED
 #endif
+/* Montgomery curves (supporting ECP) */
 #ifdef CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #define MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #else
 #undef MBEDTLS_ECP_DP_CURVE25519_ENABLED
 #endif
-
 #ifdef MBEDTLS_ECP_DP_CURVE448_ENABLED
 #undef MBEDTLS_ECP_DP_CURVE448_ENABLED
 #endif
@@ -427,7 +463,7 @@
  * may result in a compromise of the long-term signing key. This is avoided by
  * the deterministic variant.
  *
- * Requires: MBEDTLS_HMAC_DRBG_C
+ * Requires: MBEDTLS_HMAC_DRBG_C, MBEDTLS_ECDSA_C
  *
  * Comment this macro to disable deterministic ECDSA.
  */
@@ -668,7 +704,7 @@
  *
  * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -696,7 +732,7 @@
  *
  * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
  *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_X509_CRT_PARSE_C
  *
  * This enables the following ciphersuites (if other requisites are
  * enabled as well):
@@ -850,6 +886,69 @@
  */
 #define MBEDTLS_SSL_ALL_ALERT_MESSAGES
 
+/**
+ * \def MBEDTLS_SSL_DTLS_CONNECTION_ID
+ *
+ * Enable support for the DTLS Connection ID extension
+ * (version draft-ietf-tls-dtls-connection-id-05,
+ * https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05)
+ * which allows to identify DTLS connections across changes
+ * in the underlying transport.
+ *
+ * Setting this option enables the SSL APIs `mbedtls_ssl_set_cid()`,
+ * `mbedtls_ssl_get_peer_cid()` and `mbedtls_ssl_conf_cid()`.
+ * See the corresponding documentation for more information.
+ *
+ * \warning The Connection ID extension is still in draft state.
+ *          We make no stability promises for the availability
+ *          or the shape of the API controlled by this option.
+ *
+ * The maximum lengths of outgoing and incoming CIDs can be configured
+ * through the options
+ * - MBEDTLS_SSL_CID_OUT_LEN_MAX
+ * - MBEDTLS_SSL_CID_IN_LEN_MAX.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment to enable the Connection ID extension.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_DTLS_CONNECTION_ID
+#else
+#undef MBEDTLS_SSL_DTLS_CONNECTION_ID
+#endif
+
+/**
+ * \def MBEDTLS_SSL_CONTEXT_SERIALIZATION
+ *
+ * Enable serialization of the TLS context structures, through use of the
+ * functions mbedtls_ssl_context_save() and mbedtls_ssl_context_load().
+ *
+ * This pair of functions allows one side of a connection to serialize the
+ * context associated with the connection, then free or re-use that context
+ * while the serialized state is persisted elsewhere, and finally deserialize
+ * that state to a live context for resuming read/write operations on the
+ * connection. From a protocol perspective, the state of the connection is
+ * unaffected, in particular this is entirely transparent to the peer.
+ *
+ * Note: this is distinct from TLS session resumption, which is part of the
+ * protocol and fully visible by the peer. TLS session resumption enables
+ * establishing new connections associated to a saved session with shorter,
+ * lighter handshakes, while context serialization is a local optimization in
+ * handling a single, potentially long-lived connection.
+ *
+ * Enabling these APIs makes some SSL structures larger, as 64 extra bytes are
+ * saved after the handshake to allow for more efficient serialization, so if
+ * you don't need this feature you'll save RAM by disabling it.
+ *
+ * Comment to disable the context serialization APIs.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#define MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#else
+#undef MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#endif
+
 /** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
  *
  * Enable support for Encrypt-then-MAC, RFC 7366.
@@ -874,8 +973,8 @@
 
 /** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
  *
- * Enable support for Extended Master Secret, aka Session Hash
- * (draft-ietf-tls-session-hash-02).
+ * Enable support for RFC 7627: Session Hash and Extended Master Secret
+ * Extension.
  *
  * This was introduced as "the proper fix" to the Triple Handshake familiy of
  * attacks, but it is recommended to always use it (even if you disable
@@ -897,7 +996,8 @@
 /**
  * \def MBEDTLS_SSL_FALLBACK_SCSV
  *
- * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ * Enable support for RFC 7507: Fallback Signaling Cipher Suite Value (SCSV)
+ * for Preventing Protocol Downgrade Attacks.
  *
  * For servers, it is recommended to always enable this, unless you support
  * only one version of TLS, or know for sure that none of your clients
@@ -911,6 +1011,32 @@
  */
 #define MBEDTLS_SSL_FALLBACK_SCSV
 
+/**
+ * \def MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+ *
+ * This option controls the availability of the API mbedtls_ssl_get_peer_cert()
+ * giving access to the peer's certificate after completion of the handshake.
+ *
+ * Unless you need mbedtls_ssl_peer_cert() in your application, it is
+ * recommended to disable this option for reduced RAM usage.
+ *
+ * \note If this option is disabled, mbedtls_ssl_get_peer_cert() is still
+ *       defined, but always returns \c NULL.
+ *
+ * \note This option has no influence on the protection against the
+ *       triple handshake attack. Even if it is disabled, Mbed TLS will
+ *       still ensure that certificates do not change during renegotiation,
+ *       for exaple by keeping a hash of the peer's certificate.
+ *
+ * Comment this macro to disable storing the peer's certificate
+ * after the handshake.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#define MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#else
+#undef MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#endif
+
 /**
  * \def MBEDTLS_SSL_PROTO_TLS1
  *
@@ -935,6 +1061,9 @@
  * Requires: MBEDTLS_MD5_C
  *           MBEDTLS_SHA1_C
  *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
  * Comment this macro to disable support for SSL 3.0
  */
 #ifdef CONFIG_MBEDTLS_SSL_PROTO_SSL3
@@ -1092,6 +1221,41 @@
 #undef MBEDTLS_SSL_DTLS_HELLO_VERIFY
 #endif
 
+/**
+ * \def MBEDTLS_SSL_DTLS_SRTP
+ *
+ * Enable support for negotiation of DTLS-SRTP (RFC 5764)
+ * through the use_srtp extension.
+ *
+ * \note This feature provides the minimum functionality required
+ * to negotiate the use of DTLS-SRTP and to allow the derivation of
+ * the associated SRTP packet protection key material.
+ * In particular, the SRTP packet protection itself, as well as the
+ * demultiplexing of RTP and DTLS packets at the datagram layer
+ * (see Section 5 of RFC 5764), are not handled by this feature.
+ * Instead, after successful completion of a handshake negotiating
+ * the use of DTLS-SRTP, the extended key exporter API
+ * mbedtls_ssl_conf_export_keys_ext_cb() should be used to implement
+ * the key exporter described in Section 4.2 of RFC 5764 and RFC 5705
+ * (this is implemented in the SSL example programs).
+ * The resulting key should then be passed to an SRTP stack.
+ *
+ * Setting this option enables the runtime API
+ * mbedtls_ssl_conf_dtls_srtp_protection_profiles()
+ * through which the supported DTLS-SRTP protection
+ * profiles can be configured. You must call this API at
+ * runtime if you wish to negotiate the use of DTLS-SRTP.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment this to enable support for use_srtp extension.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_DTLS
+#define MBEDTLS_SSL_DTLS_SRTP
+#else
+#undef MBEDTLS_SSL_DTLS_SRTP
+#endif
+
 /**
  * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
  *
@@ -1176,6 +1340,21 @@
 #define MBEDTLS_SSL_TRUNCATED_HMAC
 
 /**
+ * \def MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+ *
+ * When this option is enabled, the SSL buffer will be resized automatically
+ * based on the negotiated maximum fragment length in each direction.
+ *
+ * Requires: MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ */
+#if defined MBEDTLS_SSL_MAX_FRAGMENT_LENGTH && CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#define MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#else
+#undef MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#endif
+
+/**
+ *
  * \def MBEDTLS_VERSION_FEATURES
  *
  * Allow run-time checking of compile-time enabled features. Thus allowing users
@@ -1641,7 +1820,9 @@
  * This module is used by the following key exchanges:
  *      ECDHE-ECDSA
  *
- * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C,
+ *           and at least one MBEDTLS_ECP_DP_XXX_ENABLED for a
+ *           short Weierstrass curve.
  */
 #ifdef CONFIG_MBEDTLS_ECDSA_C
 #define MBEDTLS_ECDSA_C
@@ -1719,11 +1900,11 @@
 /**
  * \def MBEDTLS_GCM_C
  *
- * Enable the Galois/Counter Mode (GCM) for AES.
+ * Enable the Galois/Counter Mode (GCM).
  *
  * Module:  library/gcm.c
  *
- * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C or MBEDTLS_ARIA_C
  *
  * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
  * requisites are enabled as well.
@@ -2323,6 +2504,29 @@
 #undef MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
 #endif
 
+/**
+ * \def MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+ *
+ * If set, this enables the X.509 API `mbedtls_x509_crt_verify_with_ca_cb()`
+ * and the SSL API `mbedtls_ssl_conf_ca_cb()` which allow users to configure
+ * the set of trusted certificates through a callback instead of a linked
+ * list.
+ *
+ * This is useful for example in environments where a large number of trusted
+ * certificates is present and storing them in a linked list isn't efficient
+ * enough, or when the set of trusted certificates changes frequently.
+ *
+ * See the documentation of `mbedtls_x509_crt_verify_with_ca_cb()` and
+ * `mbedtls_ssl_conf_ca_cb()` for more information.
+ *
+ * Uncomment to enable trusted certificate callbacks.
+ */
+#ifdef CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK
+#define MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+#else
+#undef MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+#endif
+
 /**
  * \def MBEDTLS_X509_CSR_WRITE_C
  *
@@ -2383,6 +2587,51 @@
  */
 #define MBEDTLS_SSL_IN_CONTENT_LEN              CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN
 
+/** \def MBEDTLS_SSL_CID_IN_LEN_MAX
+ *
+ * The maximum length of CIDs used for incoming DTLS messages.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_IN_LEN_MAX              CONFIG_MBEDTLS_SSL_CID_IN_LEN_MAX
+#else
+#undef MBEDTLS_SSL_CID_IN_LEN_MAX
+#endif
+
+
+/** \def MBEDTLS_SSL_CID_OUT_LEN_MAX
+ *
+ * The maximum length of CIDs used for outgoing DTLS messages.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_OUT_LEN_MAX            CONFIG_MBEDTLS_SSL_CID_OUT_LEN_MAX
+#else
+#undef MBEDTLS_SSL_CID_OUT_LEN_MAX
+#endif
+
+/** \def MBEDTLS_SSL_CID_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * when using the Connection ID extension in DTLS 1.2.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_PADDING_GRANULARITY    CONFIG_MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#else
+#undef MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#endif
+
+
 /** \def MBEDTLS_SSL_OUT_CONTENT_LEN
  *
  * Maximum outgoing fragment length in bytes.
@@ -2416,6 +2665,10 @@
  * default. At the time of writing, there is no practical attack on the use
  * of SHA-1 in handshake signatures, hence this option is turned on by default
  * for compatibility with existing peers.
+ *
+ * \warning   SHA-1 is considered a weak message digest and its use constitutes
+ *            a security risk. If possible, we recommend avoiding dependencies
+ *            on it, and considering stronger message digests instead.
  */
 #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
 
diff --git a/tools/sdk/esp32s2/include/nvs_flash/include/nvs.h b/tools/sdk/esp32s2/include/nvs_flash/include/nvs.h
index 26183853b7c..6a45327bbae 100644
--- a/tools/sdk/esp32s2/include/nvs_flash/include/nvs.h
+++ b/tools/sdk/esp32s2/include/nvs_flash/include/nvs.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_NVS_H
 #define ESP_NVS_H
 
@@ -105,7 +97,7 @@ typedef enum {
  */
 typedef struct {
     char namespace_name[16];    /*!< Namespace to which key-value belong */
-    char key[16];               /*!< Key of stored key-value pair */
+    char key[NVS_KEY_NAME_MAX_SIZE];               /*!< Key of stored key-value pair */
     nvs_type_t type;            /*!< Type of stored key-value pair */
 } nvs_entry_info_t;
 
diff --git a/tools/sdk/esp32s2/include/qrcode/include/qrcode.h b/tools/sdk/esp32s2/include/qrcode/include/qrcode.h
new file mode 100644
index 00000000000..27de85f5baa
--- /dev/null
+++ b/tools/sdk/esp32s2/include/qrcode/include/qrcode.h
@@ -0,0 +1,122 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief  Generate and display QR Code on the console
+  *         Encodes the given string into a QR Code & displays it on the console
+  *
+  * @attention 1. Can successfully encode a UTF-8 string of up to 2953 bytes or an alphanumeric
+  *               string of up to 4296 characters or any digit string of up to 7089 characters
+  *
+  * @note This API is kept for backward compatibility
+  *
+  * @param  text  string to encode into a QR Code.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_FAIL: Failed to encode string into a QR Code
+  *    - ESP_ERR_NO_MEM: Failed to allocate buffer for given MAX_QRCODE_VERSION
+  */
+esp_err_t qrcode_display(const char *text);
+
+/**
+  * @brief  QR Code handle used by the display function
+  */
+typedef const uint8_t * esp_qrcode_handle_t;
+
+/**
+  * @brief  QR Code configuration options
+  */
+typedef struct {
+    void (*display_func)(esp_qrcode_handle_t qrcode);   /**< Function called for displaying the QR Code after encoding is complete */
+    int max_qrcode_version;                             /**< Max QR Code Version to be used. Range: 2 - 40 */
+    int qrcode_ecc_level;                               /**< Error Correction Level for QR Code */
+} esp_qrcode_config_t;
+
+/**
+  * @brief  Error Correction Level in a QR Code Symbol
+  */
+enum {
+    ESP_QRCODE_ECC_LOW,     /**< QR Code Error Tolerance of 7% */
+    ESP_QRCODE_ECC_MED,     /**< QR Code Error Tolerance of 15% */
+    ESP_QRCODE_ECC_QUART,   /**< QR Code Error Tolerance of 25% */
+    ESP_QRCODE_ECC_HIGH     /**< QR Code Error Tolerance of 30% */
+};
+
+/**
+  * @brief  Encodes the given string into a QR Code and calls the display function
+  *
+  * @attention 1. Can successfully encode a UTF-8 string of up to 2953 bytes or an alphanumeric
+  *               string of up to 4296 characters or any digit string of up to 7089 characters
+  *
+  * @param  cfg   Configuration used for QR Code encoding.
+  * @param  text  String to encode into a QR Code.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_FAIL: Failed to encode string into a QR Code
+  *    - ESP_ERR_NO_MEM: Failed to allocate buffer for given max_qrcode_version
+  */
+esp_err_t esp_qrcode_generate(esp_qrcode_config_t *cfg, const char *text);
+
+/**
+  * @brief  Displays QR Code on the console
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  */
+void esp_qrcode_print_console(esp_qrcode_handle_t qrcode);
+
+/**
+  * @brief  Returns the side length of the given QR Code
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  *
+  * @return
+  *    - val[21, 177]: Side length of QR Code
+  */
+int esp_qrcode_get_size(esp_qrcode_handle_t qrcode);
+
+/**
+  * @brief  Returns the Pixel value for the given coordinates
+  *         False indicates White and True indicates Black
+  *
+  * @attention 1. Coordinates for top left corner are (x=0, y=0)
+  * @attention 2. For out of bound coordinates false (White) is returned
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  * @param  x  X-Coordinate of QR Code module
+  * @param  y  Y-Coordinate of QR Code module
+  *
+  * @return
+  *    - true: (x, y) Pixel is Black
+  *    - false: (x, y) Pixel is White
+  */
+bool esp_qrcode_get_module(esp_qrcode_handle_t qrcode, int x, int y);
+
+#define ESP_QRCODE_CONFIG_DEFAULT() (esp_qrcode_config_t) { \
+    .display_func = esp_qrcode_print_console, \
+    .max_qrcode_version = 10, \
+    .qrcode_ecc_level = ESP_QRCODE_ECC_LOW, \
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_common_events.h b/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_common_events.h
new file mode 100644
index 00000000000..b77f8a3d142
--- /dev/null
+++ b/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_common_events.h
@@ -0,0 +1,60 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** ESP RainMaker Common Event Base */
+ESP_EVENT_DECLARE_BASE(RMAKER_COMMON_EVENT);
+
+typedef enum {
+    /** Node reboot has been triggered. The associated event data is the time in seconds
+     * (type: uint8_t) after which the node will reboot. Note that this time may not be
+     * accurate as the events are received asynchronously.*/
+    RMAKER_EVENT_REBOOT,
+    /** Wi-Fi credentials reset. Triggered after calling esp_rmaker_wifi_reset() */
+    RMAKER_EVENT_WIFI_RESET,
+    /** Node reset to factory defaults. Triggered after calling esp_rmaker_factory_reset() */
+    RMAKER_EVENT_FACTORY_RESET,
+    /** Connected to MQTT Broker */
+    RMAKER_MQTT_EVENT_CONNECTED,
+    /** Disconnected from MQTT Broker */
+    RMAKER_MQTT_EVENT_DISCONNECTED,
+    /** MQTT message published successfully.
+     * Event data will contain the message ID (integer) of published message.
+     */
+    RMAKER_MQTT_EVENT_PUBLISHED,
+    /** POSIX Timezone Changed. Associated data would be NULL terminated POSIX Timezone
+     * Eg. "PST8PDT,M3.2.0,M11.1.0" */
+    RMAKER_EVENT_TZ_POSIX_CHANGED,
+    /** Timezone Changed. Associated data would be NULL terminated Timezone.
+     * Eg. "America/Los_Angeles"
+     * Note that whenever this event is received, the RMAKER_EVENT_TZ_POSIX_CHANGED event
+     * will also be received, but not necessarily vice versa.
+     */
+    RMAKER_EVENT_TZ_CHANGED,
+    /**
+     * MQTT message deleted from the outbox if the message couldn't have been sent and acknowledged.
+     * Event data will contain the message ID (integer) of deleted message.
+     * Valid only if CONFIG_MQTT_REPORT_DELETED_MESSAGES is enabled.
+     */
+    RMAKER_MQTT_EVENT_MSG_DELETED,
+} esp_rmaker_common_event_t;
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_factory.h b/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_factory.h
new file mode 100644
index 00000000000..9ef781b798b
--- /dev/null
+++ b/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_factory.h
@@ -0,0 +1,61 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Initialize Factory NVS
+ *
+ * This initializes the Factory NVS partition which will store data
+ * that should not be cleared even after a reset to factory.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_factory_init(void);
+
+/** Get value from factory NVS
+ *
+ * This will search for the specified key in the Factory NVS partition,
+ * allocate the required memory to hold it, copy the value and return
+ * the pointer to it. It is responsibility of the caller to free the
+ * memory when the value is no more required.
+ *
+ * @param[in] key The key of the value to be read from factory NVS.
+ *
+ * @return pointer to the value on success.
+ * @return NULL on failure.
+ */
+void *esp_rmaker_factory_get(const char *key);
+
+/** Set a value in factory NVS
+ *
+ * This will write the value for the specified key into factory NVS.
+ *
+ * @param[in] key The key for the value to be set in factory NVS.
+ * @param[in] data Pointer to the value.
+ * @param[in] len Length of the value.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_factory_set(const char *key, void *value, size_t len);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_mqtt_glue.h b/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_mqtt_glue.h
new file mode 100644
index 00000000000..95744bdf58c
--- /dev/null
+++ b/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_mqtt_glue.h
@@ -0,0 +1,160 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define RMAKER_MQTT_QOS0    0
+#define RMAKER_MQTT_QOS1    1
+
+/** MQTT Connection parameters */
+typedef struct {
+    /** MQTT Host */
+    char *mqtt_host;
+    /** Client ID */
+    char *client_id;
+    /** Client Certificate in NULL terminated PEM format */
+    char *client_cert;
+    /** Client Key in NULL terminated PEM format */
+    char *client_key;
+    /** Server Certificate in NULL terminated PEM format */
+    char *server_cert;
+} esp_rmaker_mqtt_conn_params_t;
+
+/** MQTT Get Connection Parameters function prototype
+ *
+ * @return Pointer to \ref esp_rmaker_mqtt_conn_params_t on success.
+ * @return NULL on failure.
+ */
+typedef esp_rmaker_mqtt_conn_params_t *(*esp_rmaker_mqtt_get_conn_params_t)(void);
+
+/** MQTT Subscribe callback prototype
+ *
+ * @param[in] topic Topic on which the message was received
+ * @param[in] payload Data received in the message
+ * @param[in] payload_len Length of the data
+ * @param[in] priv_data The private data passed during subscription
+ */
+typedef void (*esp_rmaker_mqtt_subscribe_cb_t)(const char *topic, void *payload, size_t payload_len, void *priv_data);
+
+/** MQTT Init function prototype
+ *
+ * @param[in] conn_params The MQTT connection parameters. If NULL is passed, it should internally use the
+ * \ref esp_rmaker_mqtt_get_conn_params call if registered.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_init_t)(esp_rmaker_mqtt_conn_params_t *conn_params);
+
+/** MQTT Deinit function prototype
+ *
+ * Call this function after MQTT has disconnected.
+ */
+typedef void (*esp_rmaker_mqtt_deinit_t)(void);
+
+/** MQTT Connect function prototype
+ *
+ * Starts the connection attempts to the MQTT broker.
+ * This should ideally be called after successful network connection.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_connect_t)(void);
+
+/** MQTT Disconnect function prototype
+ *
+ * Disconnects from the MQTT broker.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_disconnect_t)(void);
+
+/** MQTT Publish Message function prototype
+ *
+ * @param[in] topic The MQTT topic on which the message should be published.
+ * @param[in] data Data to be published.
+ * @param[in] data_len Length of the data.
+ * @param[in] qos Quality of service for the message.
+ * @param[out] msg_id If a non NULL pointer is passed, the id of the published message will be returned in this.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_publish_t)(const char *topic, void *data, size_t data_len, uint8_t qos, int *msg_id);
+
+/** MQTT Subscribe function prototype
+ *
+ * @param[in] topic The topic to be subscribed to.
+ * @param[in] cb The callback to be invoked when a message is received on the given topic.
+ * @param[in] qos Quality of service for the subscription.
+ * @param[in] priv_data Optional private data to be passed to the callback.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_subscribe_t)(const char *topic, esp_rmaker_mqtt_subscribe_cb_t cb, uint8_t qos, void *priv_data);
+
+/** MQTT Unsubscribe function prototype
+ *
+ * @param[in] topic Topic from which to unsubscribe.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_unsubscribe_t)(const char *topic);
+
+/**  MQTT configuration */
+typedef struct {
+    /** Flag to indicate if the MQTT config setup is done */
+    bool setup_done;
+    /** Pointer to the Get MQTT params function. */
+    esp_rmaker_mqtt_get_conn_params_t get_conn_params;
+    /** Pointer to MQTT Init function. */
+    esp_rmaker_mqtt_init_t init;
+    /** Pointer to MQTT Deinit function. */
+    esp_rmaker_mqtt_deinit_t deinit;
+    /** Pointer to MQTT Connect function. */
+    esp_rmaker_mqtt_connect_t connect;
+    /** Pointer to MQTQ Disconnect function */
+    esp_rmaker_mqtt_disconnect_t disconnect;
+    /** Pointer to MQTT Publish function */
+    esp_rmaker_mqtt_publish_t publish;
+    /** Pointer to MQTT Subscribe function */
+    esp_rmaker_mqtt_subscribe_t subscribe;
+    /** Pointer to MQTT Unsubscribe function */
+    esp_rmaker_mqtt_unsubscribe_t unsubscribe;
+} esp_rmaker_mqtt_config_t;
+
+/** Setup MQTT Glue
+ *
+ * This function initializes MQTT glue layer with all the default functions.
+ *
+ * @param[out] mqtt_config Pointer to an allocated MQTT configuration structure.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_glue_setup(esp_rmaker_mqtt_config_t *mqtt_config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_utils.h b/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_utils.h
new file mode 100644
index 00000000000..86ab691d492
--- /dev/null
+++ b/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_utils.h
@@ -0,0 +1,205 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <sntp.h>
+#include <esp_err.h>
+#include <esp_heap_caps.h>
+#include <sdkconfig.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#ifdef CONFIG_SPIRAM
+#define MEM_ALLOC_EXTRAM(size)         heap_caps_malloc(size, MALLOC_CAP_SPIRAM)
+#define MEM_CALLOC_EXTRAM(num, size)   heap_caps_calloc(num, size, MALLOC_CAP_SPIRAM)
+#define MEM_REALLOC_EXTRAM(ptr, size)  heap_caps_realloc(ptr, size, MALLOC_CAP_SPIRAM)
+#else
+#define MEM_ALLOC_EXTRAM(size)         malloc(size)
+#define MEM_CALLOC_EXTRAM(num, size)   calloc(num, size)
+#define MEM_REALLOC_EXTRAM(ptr, size)  realloc(ptr, size)
+#endif
+
+typedef struct esp_rmaker_time_config {
+    /** If not specified, then 'CONFIG_ESP_RMAKER_SNTP_SERVER_NAME' is used as the SNTP server. */
+    char *sntp_server_name;
+    /** Optional callback to invoke, whenever time is synchronised. This will be called
+     * periodically as per the SNTP polling interval (which is 60min by default).
+     * If kept NULL, the default callback will be invoked, which will just print the
+     * current local time.
+     */
+    sntp_sync_time_cb_t sync_time_cb;
+} esp_rmaker_time_config_t;
+
+/** Reboot the device after a delay
+ *
+ * This API just starts a reboot timer and returns immediately.
+ * The actual reboot is trigerred asynchronously in the timer callback.
+ * This is useful if you want to reboot after a delay, to allow other tasks to finish
+ * their operations (Eg. MQTT publish to indicate OTA success). The \ref RMAKER_EVENT_REBOOT
+ * event is triggered when the reboot timer is started.
+ *
+ * @param[in] seconds Time in seconds after which the device should reboot.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_reboot(int8_t seconds);
+
+/** Reset Wi-Fi credentials and (optionally) reboot
+ *
+ * This will reset just the Wi-Fi credentials and (optionally) trigger a reboot.
+ * This is useful when you want to keep all the entries in NVS memory
+ * intact, but just change the Wi-Fi credentials. The \ref RMAKER_EVENT_WIFI_RESET
+ * event is triggered when this API is called. The actual reset will happen after a
+ * delay if reset_seconds is not zero.
+ *
+ * @note This reset and reboot operations will happen asynchronously depending
+ * on the values passed to the API.
+ *
+ * @param[in] reset_seconds Time in seconds after which the reset should get triggered.
+ * This will help other modules take some actions before the device actually resets.
+ * If set to zero, the operation would be performed immediately.
+ * @param[in] reboot_seconds Time in seconds after which the device should reboot. If set
+ * to negative value, the device will not reboot at all.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_wifi_reset(int8_t reset_seconds, int8_t reboot_seconds);
+
+/** Reset to factory defaults and reboot
+ *
+ * This will clear entire NVS partition and (optionally) trigger a reboot.
+ * The \ref RMAKER_EVENT_FACTORY_RESET event is triggered when this API is called.
+ * The actual reset will happen after a delay if reset_seconds is not zero.
+ *
+ * @note This reset and reboot operations will happen asynchronously depending
+ * on the values passed to the API.
+ *
+ * @param[in] reset_seconds Time in seconds after which the reset should get triggered.
+ * This will help other modules take some actions before the device actually resets.
+ * If set to zero, the operation would be performed immediately.
+ * @param[in] reboot_seconds Time in seconds after which the device should reboot. If set
+ * to negative value, the device will not reboot at all.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_factory_reset(int8_t reset_seconds, int8_t reboot_seconds);
+
+/** Initialize time synchronization
+ *
+ * This API initializes SNTP for time synchronization.
+ *
+ * @param[in] config Configuration to be used for SNTP time synchronization. The default configuration is used if NULL is passed.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_sync_init(esp_rmaker_time_config_t *config);
+
+/** Check if current time is updated
+ *
+ * This API checks if the current system time is updated against the reference time of 1-Jan-2019.
+ *
+ * @return true if time is updated
+ * @return false if time is not updated
+ */
+bool esp_rmaker_time_check(void);
+
+/** Wait for time synchronization
+ *
+ * This API waits for the system time to be updated against the reference time of 1-Jan-2019.
+ * This is a blocking call.
+ *
+ * @param[in] ticks_to_wait Number of ticks to wait for time synchronization. Accepted values: 0 to portMAX_DELAY.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_wait_for_sync(uint32_t ticks_to_wait);
+
+/** Set POSIX timezone
+ *
+ * Set the timezone (TZ environment variable) as per the POSIX format
+ * specified in the [GNU libc documentation](https://www.gnu.org/software/libc/manual/html_node/TZ-Variable.html).
+ * Eg. For China: "CST-8"
+ *     For US Pacific Time (including daylight saving information): "PST8PDT,M3.2.0,M11.1.0"
+ *
+ * @param[in] tz_posix NULL terminated TZ POSIX string
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_set_timezone_posix(const char *tz_posix);
+
+/** Set timezone location string
+ *
+ * Set the timezone as a user friendly location string.
+ * Check [here](https://rainmaker.espressif.com/docs/time-service.html) for a list of valid values.
+ *
+ * Eg. For China: "Asia/Shanghai"
+ *     For US Pacific Time: "America/Los_Angeles"
+ *
+ * @note Setting timezone using this API internally also sets the POSIX timezone string.
+ *
+ * @param[in] tz NULL terminated Timezone location string
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_set_timezone(const char *tz);
+
+/** Get the current POSIX timezone
+ *
+ * This fetches the current timezone in POSIX format, read from NVS.
+ *
+ * @return Pointer to a NULL terminated POSIX timezone string on success.
+ *      Freeing this is the responsibility of the caller.
+ * @return NULL on failure.
+ */
+char *esp_rmaker_time_get_timezone_posix(void);
+
+/** Get the current timezone
+ *
+ * This fetches the current timezone in POSIX format, read from NVS.
+ *
+ * @return Pointer to a NULL terminated timezone string on success.
+ *      Freeing this is the responsibility of the caller.
+ * @return NULL on failure.
+ */
+char *esp_rmaker_time_get_timezone(void);
+
+/** Get printable local time string
+ *
+ * Get a printable local time string, with information of timezone and Daylight Saving.
+ * Eg. "Tue Sep  1 09:04:38 2020 -0400[EDT], DST: Yes"
+ * "Tue Sep  1 21:04:04 2020 +0800[CST], DST: No"
+ *
+ *
+ * @param[out] buf Pointer to a pre-allocated buffer into which the time string will
+ *                  be populated.
+ * @param[in] buf_len Length of the above buffer.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_get_local_time_str(char *buf, size_t buf_len);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_work_queue.h b/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_work_queue.h
new file mode 100644
index 00000000000..0e696d46848
--- /dev/null
+++ b/tools/sdk/esp32s2/include/rmaker_common/include/esp_rmaker_work_queue.h
@@ -0,0 +1,82 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+/** Prototype for ESP RainMaker Work Queue Function
+ *
+ * @param[in] priv_data The private data associated with the work function.
+ */
+typedef void (*esp_rmaker_work_fn_t)(void *priv_data);
+
+/** Initializes the Work Queue
+ *
+ * This initializes the work queue, which is basically a mechanism to run
+ * tasks in the context of a dedicated thread. You can start queueing tasks
+ * after this, but they will get executed only after calling
+ * esp_rmaker_work_queue_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_init(void);
+
+/** De-initialize the Work Queue
+ *
+ * This de-initializes the work queue. Note that the work queue needs to
+ * be stopped using esp_rmaker_work_queue_stop() before calling this.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_deinit(void);
+
+/** Start the Work Queue
+ *
+ * This starts the Work Queue thread which then starts executing the tasks queued.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_start(void);
+
+/** Stop the Work Queue
+ *
+ * This stops a running Work Queue.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_stop(void);
+
+/** Queue execution of a function in the Work Queue's context
+ *
+ * This API queues a work function for execution in the Work Queue Task's context.
+ *
+ * @param[in] work_fn The Work function to be queued.
+ * @param[in] priv_data Private data to be passed to the work function.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_add_task(esp_rmaker_work_fn_t work_fn, void *priv_data);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/sdmmc/include/sdmmc_cmd.h b/tools/sdk/esp32s2/include/sdmmc/include/sdmmc_cmd.h
index e0e7162391b..9b7319641e2 100644
--- a/tools/sdk/esp32s2/include/sdmmc/include/sdmmc_cmd.h
+++ b/tools/sdk/esp32s2/include/sdmmc/include/sdmmc_cmd.h
@@ -224,10 +224,10 @@ esp_err_t sdmmc_io_enable_int(sdmmc_card_t* card);
 esp_err_t sdmmc_io_wait_int(sdmmc_card_t* card, TickType_t timeout_ticks);
 
 /**
- * Get the data of CIS region of a SDIO card.
+ * Get the data of CIS region of an SDIO card.
  *
  * You may provide a buffer not sufficient to store all the CIS data. In this
- * case, this functions store as much data into your buffer as possible. Also,
+ * case, this function stores as much data into your buffer as possible. Also,
  * this function will try to get and return the size required for you.
  *
  * @param card  pointer to card information structure previously initialized
@@ -253,7 +253,7 @@ esp_err_t sdmmc_io_wait_int(sdmmc_card_t* card, TickType_t timeout_ticks);
 esp_err_t sdmmc_io_get_cis_data(sdmmc_card_t* card, uint8_t* out_buffer, size_t buffer_size, size_t* inout_cis_size);
 
 /**
- * Parse and print the CIS information of a SDIO card.
+ * Parse and print the CIS information of an SDIO card.
  *
  * @note Not all the CIS codes and all kinds of tuples are supported. If you
  * see some unresolved code, you can add the parsing of these code in
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/dport_reg.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/dport_reg.h
index d38723706f7..8eabe727871 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/dport_reg.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/dport_reg.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef _SOC_DPORT_REG_H_
 #define _SOC_DPORT_REG_H_
 
@@ -25,10 +17,6 @@ extern "C" {
 
 #define DPORT_DATE_REG SYSTEM_DATE_REG
 
-#define TRACEMEM_MUX_BLK0_NUM                   19
-#define TRACEMEM_MUX_BLK1_NUM                   20
-#define TRACEMEM_BLK_NUM2ADDR(_n_)              (0x3FFB8000UL + 0x4000UL*((_n_)-4))
-
 #ifndef __ASSEMBLER__
 #include "dport_access.h"
 #endif
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/periph_defs.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/periph_defs.h
index 1b8a65c6dcf..56d19dd1107 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/periph_defs.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/periph_defs.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef _SOC_PERIPH_DEFS_H_
 #define _SOC_PERIPH_DEFS_H_
@@ -50,6 +42,7 @@ typedef enum {
     PERIPH_AES_DMA_MODULE,
     PERIPH_SHA_DMA_MODULE,
     PERIPH_DEDIC_GPIO_MODULE,
+    PERIPH_SARADC_MODULE,
     PERIPH_MODULE_MAX
 } periph_module_t;
 
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rmt_reg.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rmt_reg.h
index 0cd0aed5c1b..8225f6a6876 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rmt_reg.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rmt_reg.h
@@ -1,1716 +1,2132 @@
-// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_RMT_REG_H_
-#define _SOC_RMT_REG_H_
+/**
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ *  SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
 
+#include <stdint.h>
+#include "soc/soc.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
-#include "soc.h"
-#define RMT_CH0DATA_REG          (DR_REG_RMT_BASE + 0x0000)
 
-#define RMT_CH1DATA_REG          (DR_REG_RMT_BASE + 0x0004)
+/** RMT_CH0DATA_REG register
+ *  Read and write data for channel 0 via APB FIFO
+ */
+#define RMT_CH0DATA_REG (DR_REG_RMT_BASE + 0x0)
+/** RMT_CH0_DATA : RO; bitpos: [31:0]; default: 0;
+ *  This register is used to read and write data for channel 0 via APB FIFO.
+ */
+#define RMT_CH0_DATA    0xFFFFFFFFU
+#define RMT_CH0_DATA_M  (RMT_CH0_DATA_V << RMT_CH0_DATA_S)
+#define RMT_CH0_DATA_V  0xFFFFFFFFU
+#define RMT_CH0_DATA_S  0
 
-#define RMT_CH2DATA_REG          (DR_REG_RMT_BASE + 0x0008)
+/** RMT_CH1DATA_REG register
+ *  Read and write data for channel 1 via APB FIFO
+ */
+#define RMT_CH1DATA_REG (DR_REG_RMT_BASE + 0x4)
+/** RMT_CH0_DATA : RO; bitpos: [31:0]; default: 0;
+ *  This register is used to read and write data for channel 1 via APB FIFO.
+ */
+#define RMT_CH0_DATA    0xFFFFFFFFU
+#define RMT_CH0_DATA_M  (RMT_CH0_DATA_V << RMT_CH0_DATA_S)
+#define RMT_CH0_DATA_V  0xFFFFFFFFU
+#define RMT_CH0_DATA_S  0
 
-#define RMT_CH3DATA_REG          (DR_REG_RMT_BASE + 0x000c)
+/** RMT_CH2DATA_REG register
+ *  Read and write data for channel 2 via APB FIFO
+ */
+#define RMT_CH2DATA_REG (DR_REG_RMT_BASE + 0x8)
+/** RMT_CH0_DATA : RO; bitpos: [31:0]; default: 0;
+ *  This register is used to read and write data for channel 2 via APB FIFO.
+ */
+#define RMT_CH0_DATA    0xFFFFFFFFU
+#define RMT_CH0_DATA_M  (RMT_CH0_DATA_V << RMT_CH0_DATA_S)
+#define RMT_CH0_DATA_V  0xFFFFFFFFU
+#define RMT_CH0_DATA_S  0
 
-#define RMT_CH0CONF0_REG          (DR_REG_RMT_BASE + 0x0010)
-/* RMT_CARRIER_OUT_LV_CH0 : R/W ;bitpos:[29] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_OUT_LV_CH0  (BIT(29))
-#define RMT_CARRIER_OUT_LV_CH0_M  (BIT(29))
-#define RMT_CARRIER_OUT_LV_CH0_V  0x1
-#define RMT_CARRIER_OUT_LV_CH0_S  29
-/* RMT_CARRIER_EN_CH0 : R/W ;bitpos:[28] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_EN_CH0  (BIT(28))
-#define RMT_CARRIER_EN_CH0_M  (BIT(28))
-#define RMT_CARRIER_EN_CH0_V  0x1
-#define RMT_CARRIER_EN_CH0_S  28
-/* RMT_CARRIER_EFF_EN_CH0 : R/W ;bitpos:[27] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_EFF_EN_CH0  (BIT(27))
-#define RMT_CARRIER_EFF_EN_CH0_M  (BIT(27))
-#define RMT_CARRIER_EFF_EN_CH0_V  0x1
-#define RMT_CARRIER_EFF_EN_CH0_S  27
-/* RMT_MEM_SIZE_CH0 : R/W ;bitpos:[26:24] ;default: 3'h1 ; */
-/*description: */
-#define RMT_MEM_SIZE_CH0  0x00000007
-#define RMT_MEM_SIZE_CH0_M  ((RMT_MEM_SIZE_CH0_V)<<(RMT_MEM_SIZE_CH0_S))
-#define RMT_MEM_SIZE_CH0_V  0x7
-#define RMT_MEM_SIZE_CH0_S  24
-/* RMT_IDLE_THRES_CH0 : R/W ;bitpos:[23:8] ;default: 16'h1000 ; */
-/*description: */
-#define RMT_IDLE_THRES_CH0  0x0000FFFF
-#define RMT_IDLE_THRES_CH0_M  ((RMT_IDLE_THRES_CH0_V)<<(RMT_IDLE_THRES_CH0_S))
-#define RMT_IDLE_THRES_CH0_V  0xFFFF
-#define RMT_IDLE_THRES_CH0_S  8
-/* RMT_DIV_CNT_CH0 : R/W ;bitpos:[7:0] ;default: 8'h2 ; */
-/*description: */
-#define RMT_DIV_CNT_CH0  0x000000FF
-#define RMT_DIV_CNT_CH0_M  ((RMT_DIV_CNT_CH0_V)<<(RMT_DIV_CNT_CH0_S))
-#define RMT_DIV_CNT_CH0_V  0xFF
+/** RMT_CH3DATA_REG register
+ *  Read and write data for channel 3 via APB FIFO
+ */
+#define RMT_CH3DATA_REG (DR_REG_RMT_BASE + 0xc)
+/** RMT_CH0_DATA : RO; bitpos: [31:0]; default: 0;
+ *  This register is used to read and write data for channel 3 via APB FIFO.
+ */
+#define RMT_CH0_DATA    0xFFFFFFFFU
+#define RMT_CH0_DATA_M  (RMT_CH0_DATA_V << RMT_CH0_DATA_S)
+#define RMT_CH0_DATA_V  0xFFFFFFFFU
+#define RMT_CH0_DATA_S  0
+
+/** RMT_CH0CONF0_REG register
+ *  Channel 0 configuration register 0
+ */
+#define RMT_CH0CONF0_REG (DR_REG_RMT_BASE + 0x10)
+/** RMT_DIV_CNT_CH0 : R/W; bitpos: [7:0]; default: 2;
+ *  This field is used to configure clock divider for channel 0.
+ */
+#define RMT_DIV_CNT_CH0    0x000000FFU
+#define RMT_DIV_CNT_CH0_M  (RMT_DIV_CNT_CH0_V << RMT_DIV_CNT_CH0_S)
+#define RMT_DIV_CNT_CH0_V  0x000000FFU
 #define RMT_DIV_CNT_CH0_S  0
+/** RMT_IDLE_THRES_CH0 : R/W; bitpos: [23:8]; default: 4096;
+ *  Receiving ends when no edge is detected on input signals for continuous clock
+ *  cycles longer than this field value.
+ */
+#define RMT_IDLE_THRES_CH0    0x0000FFFFU
+#define RMT_IDLE_THRES_CH0_M  (RMT_IDLE_THRES_CH0_V << RMT_IDLE_THRES_CH0_S)
+#define RMT_IDLE_THRES_CH0_V  0x0000FFFFU
+#define RMT_IDLE_THRES_CH0_S  8
+/** RMT_MEM_SIZE_CH0 : R/W; bitpos: [26:24]; default: 1;
+ *  This field is used to configure the maximum blocks allocated to channel 0. The
+ *  valid range is from 1 ~ 4-0.
+ */
+#define RMT_MEM_SIZE_CH0    0x00000007U
+#define RMT_MEM_SIZE_CH0_M  (RMT_MEM_SIZE_CH0_V << RMT_MEM_SIZE_CH0_S)
+#define RMT_MEM_SIZE_CH0_V  0x00000007U
+#define RMT_MEM_SIZE_CH0_S  24
+/** RMT_CARRIER_EFF_EN_CH0 : R/W; bitpos: [27]; default: 1;
+ *  1: Add carrier modulation on output signals only at data sending state for channel
+ *  0. 0: Add carrier modulation on signals at all states for channel 0. States here
+ *  include idle state (ST_IDLE), reading data from RAM (ST_RD_MEM), and sending data
+ *  stored in RAM (ST_SEND). Only valid when RMT_CARRIER_EN_CH0 is set to 1.
+ */
+#define RMT_CARRIER_EFF_EN_CH0    (BIT(27))
+#define RMT_CARRIER_EFF_EN_CH0_M  (RMT_CARRIER_EFF_EN_CH0_V << RMT_CARRIER_EFF_EN_CH0_S)
+#define RMT_CARRIER_EFF_EN_CH0_V  0x00000001U
+#define RMT_CARRIER_EFF_EN_CH0_S  27
+/** RMT_CARRIER_EN_CH0 : R/W; bitpos: [28]; default: 1;
+ *  This bit is used to enable carrier modulation for channel 0. 1: Add carrier
+ *  modulation on output signals. 0: No carrier modulation is added on output signals.
+ */
+#define RMT_CARRIER_EN_CH0    (BIT(28))
+#define RMT_CARRIER_EN_CH0_M  (RMT_CARRIER_EN_CH0_V << RMT_CARRIER_EN_CH0_S)
+#define RMT_CARRIER_EN_CH0_V  0x00000001U
+#define RMT_CARRIER_EN_CH0_S  28
+/** RMT_CARRIER_OUT_LV_CH0 : R/W; bitpos: [29]; default: 1;
+ *  This bit is used to configure the position of carrier wave for channel 0.
+ *
+ *  1'h0: Add carrier wave on low-level output signals.
+ *
+ *  1'h1: Add carrier wave on high-level output signals.
+ */
+#define RMT_CARRIER_OUT_LV_CH0    (BIT(29))
+#define RMT_CARRIER_OUT_LV_CH0_M  (RMT_CARRIER_OUT_LV_CH0_V << RMT_CARRIER_OUT_LV_CH0_S)
+#define RMT_CARRIER_OUT_LV_CH0_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_CH0_S  29
 
-#define RMT_CH0CONF1_REG          (DR_REG_RMT_BASE + 0x0014)
-/* RMT_TX_STOP_CH0 : R/W ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_STOP_CH0  (BIT(20))
-#define RMT_TX_STOP_CH0_M  (BIT(20))
-#define RMT_TX_STOP_CH0_V  0x1
-#define RMT_TX_STOP_CH0_S  20
-/* RMT_IDLE_OUT_EN_CH0 : R/W ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_IDLE_OUT_EN_CH0  (BIT(19))
-#define RMT_IDLE_OUT_EN_CH0_M  (BIT(19))
-#define RMT_IDLE_OUT_EN_CH0_V  0x1
-#define RMT_IDLE_OUT_EN_CH0_S  19
-/* RMT_IDLE_OUT_LV_CH0 : R/W ;bitpos:[18] ;default: 1'b0 ; */
-/*description: */
-#define RMT_IDLE_OUT_LV_CH0  (BIT(18))
-#define RMT_IDLE_OUT_LV_CH0_M  (BIT(18))
-#define RMT_IDLE_OUT_LV_CH0_V  0x1
-#define RMT_IDLE_OUT_LV_CH0_S  18
-/* RMT_REF_ALWAYS_ON_CH0 : R/W ;bitpos:[17] ;default: 1'b0 ; */
-/*description: */
-#define RMT_REF_ALWAYS_ON_CH0  (BIT(17))
-#define RMT_REF_ALWAYS_ON_CH0_M  (BIT(17))
-#define RMT_REF_ALWAYS_ON_CH0_V  0x1
-#define RMT_REF_ALWAYS_ON_CH0_S  17
-/* RMT_CHK_RX_CARRIER_EN_CH0 : R/W ;bitpos:[16] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CHK_RX_CARRIER_EN_CH0  (BIT(16))
-#define RMT_CHK_RX_CARRIER_EN_CH0_M  (BIT(16))
-#define RMT_CHK_RX_CARRIER_EN_CH0_V  0x1
-#define RMT_CHK_RX_CARRIER_EN_CH0_S  16
-/* RMT_RX_FILTER_THRES_CH0 : R/W ;bitpos:[15:8] ;default: 8'hf ; */
-/*description: */
-#define RMT_RX_FILTER_THRES_CH0  0x000000FF
-#define RMT_RX_FILTER_THRES_CH0_M  ((RMT_RX_FILTER_THRES_CH0_V)<<(RMT_RX_FILTER_THRES_CH0_S))
-#define RMT_RX_FILTER_THRES_CH0_V  0xFF
-#define RMT_RX_FILTER_THRES_CH0_S  8
-/* RMT_RX_FILTER_EN_CH0 : R/W ;bitpos:[7] ;default: 1'b0 ; */
-/*description: */
-#define RMT_RX_FILTER_EN_CH0  (BIT(7))
-#define RMT_RX_FILTER_EN_CH0_M  (BIT(7))
-#define RMT_RX_FILTER_EN_CH0_V  0x1
-#define RMT_RX_FILTER_EN_CH0_S  7
-/* RMT_TX_CONTI_MODE_CH0 : R/W ;bitpos:[6] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_CONTI_MODE_CH0  (BIT(6))
-#define RMT_TX_CONTI_MODE_CH0_M  (BIT(6))
-#define RMT_TX_CONTI_MODE_CH0_V  0x1
-#define RMT_TX_CONTI_MODE_CH0_S  6
-/* RMT_MEM_OWNER_CH0 : R/W ;bitpos:[5] ;default: 1'b1 ; */
-/*description: */
-#define RMT_MEM_OWNER_CH0  (BIT(5))
-#define RMT_MEM_OWNER_CH0_M  (BIT(5))
-#define RMT_MEM_OWNER_CH0_V  0x1
-#define RMT_MEM_OWNER_CH0_S  5
-/* RMT_APB_MEM_RST_CH0 : WO ;bitpos:[4] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RST_CH0  (BIT(4))
-#define RMT_APB_MEM_RST_CH0_M  (BIT(4))
-#define RMT_APB_MEM_RST_CH0_V  0x1
-#define RMT_APB_MEM_RST_CH0_S  4
-/* RMT_MEM_RD_RST_CH0 : WO ;bitpos:[3] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_RD_RST_CH0  (BIT(3))
-#define RMT_MEM_RD_RST_CH0_M  (BIT(3))
-#define RMT_MEM_RD_RST_CH0_V  0x1
-#define RMT_MEM_RD_RST_CH0_S  3
-/* RMT_MEM_WR_RST_CH0 : WO ;bitpos:[2] ;default: 1'h0 ; */
-/*description: */
-#define RMT_MEM_WR_RST_CH0  (BIT(2))
-#define RMT_MEM_WR_RST_CH0_M  (BIT(2))
-#define RMT_MEM_WR_RST_CH0_V  0x1
-#define RMT_MEM_WR_RST_CH0_S  2
-/* RMT_RX_EN_CH0 : R/W ;bitpos:[1] ;default: 1'h0 ; */
-/*description: */
-#define RMT_RX_EN_CH0  (BIT(1))
-#define RMT_RX_EN_CH0_M  (BIT(1))
-#define RMT_RX_EN_CH0_V  0x1
-#define RMT_RX_EN_CH0_S  1
-/* RMT_TX_START_CH0 : R/W ;bitpos:[0] ;default: 1'h0 ; */
-/*description: */
-#define RMT_TX_START_CH0  (BIT(0))
-#define RMT_TX_START_CH0_M  (BIT(0))
-#define RMT_TX_START_CH0_V  0x1
+/** RMT_CH0CONF1_REG register
+ *  Channel 0 configuration register 1
+ */
+#define RMT_CH0CONF1_REG (DR_REG_RMT_BASE + 0x14)
+/** RMT_TX_START_CH0 : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to start sending data on channel 0.
+ */
+#define RMT_TX_START_CH0    (BIT(0))
+#define RMT_TX_START_CH0_M  (RMT_TX_START_CH0_V << RMT_TX_START_CH0_S)
+#define RMT_TX_START_CH0_V  0x00000001U
 #define RMT_TX_START_CH0_S  0
+/** RMT_RX_EN_CH0 : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to enable receiver to receive data on channel 0.
+ */
+#define RMT_RX_EN_CH0    (BIT(1))
+#define RMT_RX_EN_CH0_M  (RMT_RX_EN_CH0_V << RMT_RX_EN_CH0_S)
+#define RMT_RX_EN_CH0_V  0x00000001U
+#define RMT_RX_EN_CH0_S  1
+/** RMT_MEM_WR_RST_CH0 : WO; bitpos: [2]; default: 0;
+ *  Set this bit to reset RAM write address accessed by the receiver for channel 0.
+ */
+#define RMT_MEM_WR_RST_CH0    (BIT(2))
+#define RMT_MEM_WR_RST_CH0_M  (RMT_MEM_WR_RST_CH0_V << RMT_MEM_WR_RST_CH0_S)
+#define RMT_MEM_WR_RST_CH0_V  0x00000001U
+#define RMT_MEM_WR_RST_CH0_S  2
+/** RMT_MEM_RD_RST_CH0 : WO; bitpos: [3]; default: 0;
+ *  Set this bit to reset RAM read address accessed by the transmitter for channel 0.
+ */
+#define RMT_MEM_RD_RST_CH0    (BIT(3))
+#define RMT_MEM_RD_RST_CH0_M  (RMT_MEM_RD_RST_CH0_V << RMT_MEM_RD_RST_CH0_S)
+#define RMT_MEM_RD_RST_CH0_V  0x00000001U
+#define RMT_MEM_RD_RST_CH0_S  3
+/** RMT_APB_MEM_RST_CH0 : WO; bitpos: [4]; default: 0;
+ *  Set this bit to reset W/R ram address for channel 0 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_CH0    (BIT(4))
+#define RMT_APB_MEM_RST_CH0_M  (RMT_APB_MEM_RST_CH0_V << RMT_APB_MEM_RST_CH0_S)
+#define RMT_APB_MEM_RST_CH0_V  0x00000001U
+#define RMT_APB_MEM_RST_CH0_S  4
+/** RMT_MEM_OWNER_CH0 : R/W; bitpos: [5]; default: 1;
+ *  This bit marks the ownership of channel 0's RAM block.
+ *
+ *  1'h1: Receiver is using the RAM.
+ *
+ *  1'h0: Transmitter is using the RAM.
+ */
+#define RMT_MEM_OWNER_CH0    (BIT(5))
+#define RMT_MEM_OWNER_CH0_M  (RMT_MEM_OWNER_CH0_V << RMT_MEM_OWNER_CH0_S)
+#define RMT_MEM_OWNER_CH0_V  0x00000001U
+#define RMT_MEM_OWNER_CH0_S  5
+/** RMT_TX_CONTI_MODE_CH0 : R/W; bitpos: [6]; default: 0;
+ *  Set this bit to restart transmission in continuous node from the first data in
+ *  channel 0.
+ */
+#define RMT_TX_CONTI_MODE_CH0    (BIT(6))
+#define RMT_TX_CONTI_MODE_CH0_M  (RMT_TX_CONTI_MODE_CH0_V << RMT_TX_CONTI_MODE_CH0_S)
+#define RMT_TX_CONTI_MODE_CH0_V  0x00000001U
+#define RMT_TX_CONTI_MODE_CH0_S  6
+/** RMT_RX_FILTER_EN_CH0 : R/W; bitpos: [7]; default: 0;
+ *  Set this bit to enable the receiver's filter for channel 0.
+ */
+#define RMT_RX_FILTER_EN_CH0    (BIT(7))
+#define RMT_RX_FILTER_EN_CH0_M  (RMT_RX_FILTER_EN_CH0_V << RMT_RX_FILTER_EN_CH0_S)
+#define RMT_RX_FILTER_EN_CH0_V  0x00000001U
+#define RMT_RX_FILTER_EN_CH0_S  7
+/** RMT_RX_FILTER_THRES_CH0 : R/W; bitpos: [15:8]; default: 15;
+ *  Set this field to ignore the input pulse when its width is less than
+ *  RMT_RX_FILTER_THRES_CH0 APB clock cycles in receive mode.
+ */
+#define RMT_RX_FILTER_THRES_CH0    0x000000FFU
+#define RMT_RX_FILTER_THRES_CH0_M  (RMT_RX_FILTER_THRES_CH0_V << RMT_RX_FILTER_THRES_CH0_S)
+#define RMT_RX_FILTER_THRES_CH0_V  0x000000FFU
+#define RMT_RX_FILTER_THRES_CH0_S  8
+/** RMT_CHK_RX_CARRIER_EN_CH0 : R/W; bitpos: [16]; default: 0;
+ *  Set this bit to enable memory loop read mode when carrier modulation is enabled for
+ *  channel 0.
+ */
+#define RMT_CHK_RX_CARRIER_EN_CH0    (BIT(16))
+#define RMT_CHK_RX_CARRIER_EN_CH0_M  (RMT_CHK_RX_CARRIER_EN_CH0_V << RMT_CHK_RX_CARRIER_EN_CH0_S)
+#define RMT_CHK_RX_CARRIER_EN_CH0_V  0x00000001U
+#define RMT_CHK_RX_CARRIER_EN_CH0_S  16
+/** RMT_REF_ALWAYS_ON_CH0 : R/W; bitpos: [17]; default: 0;
+ *  Set this bit to select a base clock for channel 0.
+ *
+ *  1'h1: APB_CLK    1'h0: REF_TICK
+ */
+#define RMT_REF_ALWAYS_ON_CH0    (BIT(17))
+#define RMT_REF_ALWAYS_ON_CH0_M  (RMT_REF_ALWAYS_ON_CH0_V << RMT_REF_ALWAYS_ON_CH0_S)
+#define RMT_REF_ALWAYS_ON_CH0_V  0x00000001U
+#define RMT_REF_ALWAYS_ON_CH0_S  17
+/** RMT_IDLE_OUT_LV_CH0 : R/W; bitpos: [18]; default: 0;
+ *  This bit configures the level of output signals in channel 0 when the transmitter
+ *  is in idle state.
+ */
+#define RMT_IDLE_OUT_LV_CH0    (BIT(18))
+#define RMT_IDLE_OUT_LV_CH0_M  (RMT_IDLE_OUT_LV_CH0_V << RMT_IDLE_OUT_LV_CH0_S)
+#define RMT_IDLE_OUT_LV_CH0_V  0x00000001U
+#define RMT_IDLE_OUT_LV_CH0_S  18
+/** RMT_IDLE_OUT_EN_CH0 : R/W; bitpos: [19]; default: 0;
+ *  This is the output enable bit for channel 0 in idle state.
+ */
+#define RMT_IDLE_OUT_EN_CH0    (BIT(19))
+#define RMT_IDLE_OUT_EN_CH0_M  (RMT_IDLE_OUT_EN_CH0_V << RMT_IDLE_OUT_EN_CH0_S)
+#define RMT_IDLE_OUT_EN_CH0_V  0x00000001U
+#define RMT_IDLE_OUT_EN_CH0_S  19
+/** RMT_TX_STOP_CH0 : R/W; bitpos: [20]; default: 0;
+ *  Set this bit to stop the transmitter of channel 0 sending data out.
+ */
+#define RMT_TX_STOP_CH0    (BIT(20))
+#define RMT_TX_STOP_CH0_M  (RMT_TX_STOP_CH0_V << RMT_TX_STOP_CH0_S)
+#define RMT_TX_STOP_CH0_V  0x00000001U
+#define RMT_TX_STOP_CH0_S  20
 
-#define RMT_CH1CONF0_REG          (DR_REG_RMT_BASE + 0x0018)
-/* RMT_CARRIER_OUT_LV_CH1 : R/W ;bitpos:[29] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_OUT_LV_CH1  (BIT(29))
-#define RMT_CARRIER_OUT_LV_CH1_M  (BIT(29))
-#define RMT_CARRIER_OUT_LV_CH1_V  0x1
-#define RMT_CARRIER_OUT_LV_CH1_S  29
-/* RMT_CARRIER_EN_CH1 : R/W ;bitpos:[28] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_EN_CH1  (BIT(28))
-#define RMT_CARRIER_EN_CH1_M  (BIT(28))
-#define RMT_CARRIER_EN_CH1_V  0x1
-#define RMT_CARRIER_EN_CH1_S  28
-/* RMT_CARRIER_EFF_EN_CH1 : R/W ;bitpos:[27] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_EFF_EN_CH1  (BIT(27))
-#define RMT_CARRIER_EFF_EN_CH1_M  (BIT(27))
-#define RMT_CARRIER_EFF_EN_CH1_V  0x1
-#define RMT_CARRIER_EFF_EN_CH1_S  27
-/* RMT_MEM_SIZE_CH1 : R/W ;bitpos:[26:24] ;default: 3'h1 ; */
-/*description: */
-#define RMT_MEM_SIZE_CH1  0x00000007
-#define RMT_MEM_SIZE_CH1_M  ((RMT_MEM_SIZE_CH1_V)<<(RMT_MEM_SIZE_CH1_S))
-#define RMT_MEM_SIZE_CH1_V  0x7
-#define RMT_MEM_SIZE_CH1_S  24
-/* RMT_IDLE_THRES_CH1 : R/W ;bitpos:[23:8] ;default: 16'h1000 ; */
-/*description: */
-#define RMT_IDLE_THRES_CH1  0x0000FFFF
-#define RMT_IDLE_THRES_CH1_M  ((RMT_IDLE_THRES_CH1_V)<<(RMT_IDLE_THRES_CH1_S))
-#define RMT_IDLE_THRES_CH1_V  0xFFFF
-#define RMT_IDLE_THRES_CH1_S  8
-/* RMT_DIV_CNT_CH1 : R/W ;bitpos:[7:0] ;default: 8'h2 ; */
-/*description: */
-#define RMT_DIV_CNT_CH1  0x000000FF
-#define RMT_DIV_CNT_CH1_M  ((RMT_DIV_CNT_CH1_V)<<(RMT_DIV_CNT_CH1_S))
-#define RMT_DIV_CNT_CH1_V  0xFF
-#define RMT_DIV_CNT_CH1_S  0
+/** RMT_CH1CONF0_REG register
+ *  Channel 1 configuration register 0
+ */
+#define RMT_CH1CONF0_REG (DR_REG_RMT_BASE + 0x18)
+/** RMT_DIV_CNT_CH0 : R/W; bitpos: [7:0]; default: 2;
+ *  This field is used to configure clock divider for channel 1.
+ */
+#define RMT_DIV_CNT_CH0    0x000000FFU
+#define RMT_DIV_CNT_CH0_M  (RMT_DIV_CNT_CH0_V << RMT_DIV_CNT_CH0_S)
+#define RMT_DIV_CNT_CH0_V  0x000000FFU
+#define RMT_DIV_CNT_CH0_S  0
+/** RMT_IDLE_THRES_CH0 : R/W; bitpos: [23:8]; default: 4096;
+ *  Receiving ends when no edge is detected on input signals for continuous clock
+ *  cycles longer than this field value.
+ */
+#define RMT_IDLE_THRES_CH0    0x0000FFFFU
+#define RMT_IDLE_THRES_CH0_M  (RMT_IDLE_THRES_CH0_V << RMT_IDLE_THRES_CH0_S)
+#define RMT_IDLE_THRES_CH0_V  0x0000FFFFU
+#define RMT_IDLE_THRES_CH0_S  8
+/** RMT_MEM_SIZE_CH0 : R/W; bitpos: [26:24]; default: 1;
+ *  This field is used to configure the maximum blocks allocated to channel 1. The
+ *  valid range is from 1 ~ 4-1.
+ */
+#define RMT_MEM_SIZE_CH0    0x00000007U
+#define RMT_MEM_SIZE_CH0_M  (RMT_MEM_SIZE_CH0_V << RMT_MEM_SIZE_CH0_S)
+#define RMT_MEM_SIZE_CH0_V  0x00000007U
+#define RMT_MEM_SIZE_CH0_S  24
+/** RMT_CARRIER_EFF_EN_CH0 : R/W; bitpos: [27]; default: 1;
+ *  1: Add carrier modulation on output signals only at data sending state for channel
+ *  1. 0: Add carrier modulation on signals at all states for channel 1. States here
+ *  include idle state (ST_IDLE), reading data from RAM (ST_RD_MEM), and sending data
+ *  stored in RAM (ST_SEND). Only valid when RMT_CARRIER_EN_CH1 is set to 1.
+ */
+#define RMT_CARRIER_EFF_EN_CH0    (BIT(27))
+#define RMT_CARRIER_EFF_EN_CH0_M  (RMT_CARRIER_EFF_EN_CH0_V << RMT_CARRIER_EFF_EN_CH0_S)
+#define RMT_CARRIER_EFF_EN_CH0_V  0x00000001U
+#define RMT_CARRIER_EFF_EN_CH0_S  27
+/** RMT_CARRIER_EN_CH0 : R/W; bitpos: [28]; default: 1;
+ *  This bit is used to enable carrier modulation for channel 1. 1: Add carrier
+ *  modulation on output signals. 0: No carrier modulation is added on output signals.
+ */
+#define RMT_CARRIER_EN_CH0    (BIT(28))
+#define RMT_CARRIER_EN_CH0_M  (RMT_CARRIER_EN_CH0_V << RMT_CARRIER_EN_CH0_S)
+#define RMT_CARRIER_EN_CH0_V  0x00000001U
+#define RMT_CARRIER_EN_CH0_S  28
+/** RMT_CARRIER_OUT_LV_CH0 : R/W; bitpos: [29]; default: 1;
+ *  This bit is used to configure the position of carrier wave for channel 1.
+ *
+ *  1'h0: Add carrier wave on low-level output signals.
+ *
+ *  1'h1: Add carrier wave on high-level output signals.
+ */
+#define RMT_CARRIER_OUT_LV_CH0    (BIT(29))
+#define RMT_CARRIER_OUT_LV_CH0_M  (RMT_CARRIER_OUT_LV_CH0_V << RMT_CARRIER_OUT_LV_CH0_S)
+#define RMT_CARRIER_OUT_LV_CH0_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_CH0_S  29
 
-#define RMT_CH1CONF1_REG          (DR_REG_RMT_BASE + 0x001c)
-/* RMT_TX_STOP_CH1 : R/W ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_STOP_CH1  (BIT(20))
-#define RMT_TX_STOP_CH1_M  (BIT(20))
-#define RMT_TX_STOP_CH1_V  0x1
-#define RMT_TX_STOP_CH1_S  20
-/* RMT_IDLE_OUT_EN_CH1 : R/W ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_IDLE_OUT_EN_CH1  (BIT(19))
-#define RMT_IDLE_OUT_EN_CH1_M  (BIT(19))
-#define RMT_IDLE_OUT_EN_CH1_V  0x1
-#define RMT_IDLE_OUT_EN_CH1_S  19
-/* RMT_IDLE_OUT_LV_CH1 : R/W ;bitpos:[18] ;default: 1'b0 ; */
-/*description: */
-#define RMT_IDLE_OUT_LV_CH1  (BIT(18))
-#define RMT_IDLE_OUT_LV_CH1_M  (BIT(18))
-#define RMT_IDLE_OUT_LV_CH1_V  0x1
-#define RMT_IDLE_OUT_LV_CH1_S  18
-/* RMT_REF_ALWAYS_ON_CH1 : R/W ;bitpos:[17] ;default: 1'b0 ; */
-/*description: */
-#define RMT_REF_ALWAYS_ON_CH1  (BIT(17))
-#define RMT_REF_ALWAYS_ON_CH1_M  (BIT(17))
-#define RMT_REF_ALWAYS_ON_CH1_V  0x1
-#define RMT_REF_ALWAYS_ON_CH1_S  17
-/* RMT_CHK_RX_CARRIER_EN_CH1 : R/W ;bitpos:[16] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CHK_RX_CARRIER_EN_CH1  (BIT(16))
-#define RMT_CHK_RX_CARRIER_EN_CH1_M  (BIT(16))
-#define RMT_CHK_RX_CARRIER_EN_CH1_V  0x1
-#define RMT_CHK_RX_CARRIER_EN_CH1_S  16
-/* RMT_RX_FILTER_THRES_CH1 : R/W ;bitpos:[15:8] ;default: 8'hf ; */
-/*description: */
-#define RMT_RX_FILTER_THRES_CH1  0x000000FF
-#define RMT_RX_FILTER_THRES_CH1_M  ((RMT_RX_FILTER_THRES_CH1_V)<<(RMT_RX_FILTER_THRES_CH1_S))
-#define RMT_RX_FILTER_THRES_CH1_V  0xFF
-#define RMT_RX_FILTER_THRES_CH1_S  8
-/* RMT_RX_FILTER_EN_CH1 : R/W ;bitpos:[7] ;default: 1'b0 ; */
-/*description: */
-#define RMT_RX_FILTER_EN_CH1  (BIT(7))
-#define RMT_RX_FILTER_EN_CH1_M  (BIT(7))
-#define RMT_RX_FILTER_EN_CH1_V  0x1
-#define RMT_RX_FILTER_EN_CH1_S  7
-/* RMT_TX_CONTI_MODE_CH1 : R/W ;bitpos:[6] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_CONTI_MODE_CH1  (BIT(6))
-#define RMT_TX_CONTI_MODE_CH1_M  (BIT(6))
-#define RMT_TX_CONTI_MODE_CH1_V  0x1
-#define RMT_TX_CONTI_MODE_CH1_S  6
-/* RMT_MEM_OWNER_CH1 : R/W ;bitpos:[5] ;default: 1'b1 ; */
-/*description: */
-#define RMT_MEM_OWNER_CH1  (BIT(5))
-#define RMT_MEM_OWNER_CH1_M  (BIT(5))
-#define RMT_MEM_OWNER_CH1_V  0x1
-#define RMT_MEM_OWNER_CH1_S  5
-/* RMT_APB_MEM_RST_CH1 : WO ;bitpos:[4] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RST_CH1  (BIT(4))
-#define RMT_APB_MEM_RST_CH1_M  (BIT(4))
-#define RMT_APB_MEM_RST_CH1_V  0x1
-#define RMT_APB_MEM_RST_CH1_S  4
-/* RMT_MEM_RD_RST_CH1 : WO ;bitpos:[3] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_RD_RST_CH1  (BIT(3))
-#define RMT_MEM_RD_RST_CH1_M  (BIT(3))
-#define RMT_MEM_RD_RST_CH1_V  0x1
-#define RMT_MEM_RD_RST_CH1_S  3
-/* RMT_MEM_WR_RST_CH1 : WO ;bitpos:[2] ;default: 1'h0 ; */
-/*description: */
-#define RMT_MEM_WR_RST_CH1  (BIT(2))
-#define RMT_MEM_WR_RST_CH1_M  (BIT(2))
-#define RMT_MEM_WR_RST_CH1_V  0x1
-#define RMT_MEM_WR_RST_CH1_S  2
-/* RMT_RX_EN_CH1 : R/W ;bitpos:[1] ;default: 1'h0 ; */
-/*description: */
-#define RMT_RX_EN_CH1  (BIT(1))
-#define RMT_RX_EN_CH1_M  (BIT(1))
-#define RMT_RX_EN_CH1_V  0x1
-#define RMT_RX_EN_CH1_S  1
-/* RMT_TX_START_CH1 : R/W ;bitpos:[0] ;default: 1'h0 ; */
-/*description: */
-#define RMT_TX_START_CH1  (BIT(0))
-#define RMT_TX_START_CH1_M  (BIT(0))
-#define RMT_TX_START_CH1_V  0x1
-#define RMT_TX_START_CH1_S  0
+/** RMT_CH1CONF1_REG register
+ *  Channel 1 configuration register 1
+ */
+#define RMT_CH1CONF1_REG (DR_REG_RMT_BASE + 0x1c)
+/** RMT_TX_START_CH0 : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to start sending data on channel 1.
+ */
+#define RMT_TX_START_CH0    (BIT(0))
+#define RMT_TX_START_CH0_M  (RMT_TX_START_CH0_V << RMT_TX_START_CH0_S)
+#define RMT_TX_START_CH0_V  0x00000001U
+#define RMT_TX_START_CH0_S  0
+/** RMT_RX_EN_CH0 : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to enable receiver to receive data on channel 1.
+ */
+#define RMT_RX_EN_CH0    (BIT(1))
+#define RMT_RX_EN_CH0_M  (RMT_RX_EN_CH0_V << RMT_RX_EN_CH0_S)
+#define RMT_RX_EN_CH0_V  0x00000001U
+#define RMT_RX_EN_CH0_S  1
+/** RMT_MEM_WR_RST_CH0 : WO; bitpos: [2]; default: 0;
+ *  Set this bit to reset RAM write address accessed by the receiver for channel 1.
+ */
+#define RMT_MEM_WR_RST_CH0    (BIT(2))
+#define RMT_MEM_WR_RST_CH0_M  (RMT_MEM_WR_RST_CH0_V << RMT_MEM_WR_RST_CH0_S)
+#define RMT_MEM_WR_RST_CH0_V  0x00000001U
+#define RMT_MEM_WR_RST_CH0_S  2
+/** RMT_MEM_RD_RST_CH0 : WO; bitpos: [3]; default: 0;
+ *  Set this bit to reset RAM read address accessed by the transmitter for channel 1.
+ */
+#define RMT_MEM_RD_RST_CH0    (BIT(3))
+#define RMT_MEM_RD_RST_CH0_M  (RMT_MEM_RD_RST_CH0_V << RMT_MEM_RD_RST_CH0_S)
+#define RMT_MEM_RD_RST_CH0_V  0x00000001U
+#define RMT_MEM_RD_RST_CH0_S  3
+/** RMT_APB_MEM_RST_CH0 : WO; bitpos: [4]; default: 0;
+ *  Set this bit to reset W/R ram address for channel 1 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_CH0    (BIT(4))
+#define RMT_APB_MEM_RST_CH0_M  (RMT_APB_MEM_RST_CH0_V << RMT_APB_MEM_RST_CH0_S)
+#define RMT_APB_MEM_RST_CH0_V  0x00000001U
+#define RMT_APB_MEM_RST_CH0_S  4
+/** RMT_MEM_OWNER_CH0 : R/W; bitpos: [5]; default: 1;
+ *  This bit marks the ownership of channel 1's RAM block.
+ *
+ *  1'h1: Receiver is using the RAM.
+ *
+ *  1'h0: Transmitter is using the RAM.
+ */
+#define RMT_MEM_OWNER_CH0    (BIT(5))
+#define RMT_MEM_OWNER_CH0_M  (RMT_MEM_OWNER_CH0_V << RMT_MEM_OWNER_CH0_S)
+#define RMT_MEM_OWNER_CH0_V  0x00000001U
+#define RMT_MEM_OWNER_CH0_S  5
+/** RMT_TX_CONTI_MODE_CH0 : R/W; bitpos: [6]; default: 0;
+ *  Set this bit to restart transmission in continuous node from the first data in
+ *  channel 1.
+ */
+#define RMT_TX_CONTI_MODE_CH0    (BIT(6))
+#define RMT_TX_CONTI_MODE_CH0_M  (RMT_TX_CONTI_MODE_CH0_V << RMT_TX_CONTI_MODE_CH0_S)
+#define RMT_TX_CONTI_MODE_CH0_V  0x00000001U
+#define RMT_TX_CONTI_MODE_CH0_S  6
+/** RMT_RX_FILTER_EN_CH0 : R/W; bitpos: [7]; default: 0;
+ *  Set this bit to enable the receiver's filter for channel 1.
+ */
+#define RMT_RX_FILTER_EN_CH0    (BIT(7))
+#define RMT_RX_FILTER_EN_CH0_M  (RMT_RX_FILTER_EN_CH0_V << RMT_RX_FILTER_EN_CH0_S)
+#define RMT_RX_FILTER_EN_CH0_V  0x00000001U
+#define RMT_RX_FILTER_EN_CH0_S  7
+/** RMT_RX_FILTER_THRES_CH0 : R/W; bitpos: [15:8]; default: 15;
+ *  Set this field to ignore the input pulse when its width is less than
+ *  RMT_RX_FILTER_THRES_CH1 APB clock cycles in receive mode.
+ */
+#define RMT_RX_FILTER_THRES_CH0    0x000000FFU
+#define RMT_RX_FILTER_THRES_CH0_M  (RMT_RX_FILTER_THRES_CH0_V << RMT_RX_FILTER_THRES_CH0_S)
+#define RMT_RX_FILTER_THRES_CH0_V  0x000000FFU
+#define RMT_RX_FILTER_THRES_CH0_S  8
+/** RMT_CHK_RX_CARRIER_EN_CH0 : R/W; bitpos: [16]; default: 0;
+ *  Set this bit to enable memory loop read mode when carrier modulation is enabled for
+ *  channel 1.
+ */
+#define RMT_CHK_RX_CARRIER_EN_CH0    (BIT(16))
+#define RMT_CHK_RX_CARRIER_EN_CH0_M  (RMT_CHK_RX_CARRIER_EN_CH0_V << RMT_CHK_RX_CARRIER_EN_CH0_S)
+#define RMT_CHK_RX_CARRIER_EN_CH0_V  0x00000001U
+#define RMT_CHK_RX_CARRIER_EN_CH0_S  16
+/** RMT_REF_ALWAYS_ON_CH0 : R/W; bitpos: [17]; default: 0;
+ *  Set this bit to select a base clock for channel 1.
+ *
+ *  1'h1: APB_CLK    1'h0: REF_TICK
+ */
+#define RMT_REF_ALWAYS_ON_CH0    (BIT(17))
+#define RMT_REF_ALWAYS_ON_CH0_M  (RMT_REF_ALWAYS_ON_CH0_V << RMT_REF_ALWAYS_ON_CH0_S)
+#define RMT_REF_ALWAYS_ON_CH0_V  0x00000001U
+#define RMT_REF_ALWAYS_ON_CH0_S  17
+/** RMT_IDLE_OUT_LV_CH0 : R/W; bitpos: [18]; default: 0;
+ *  This bit configures the level of output signals in channel 1 when the transmitter
+ *  is in idle state.
+ */
+#define RMT_IDLE_OUT_LV_CH0    (BIT(18))
+#define RMT_IDLE_OUT_LV_CH0_M  (RMT_IDLE_OUT_LV_CH0_V << RMT_IDLE_OUT_LV_CH0_S)
+#define RMT_IDLE_OUT_LV_CH0_V  0x00000001U
+#define RMT_IDLE_OUT_LV_CH0_S  18
+/** RMT_IDLE_OUT_EN_CH0 : R/W; bitpos: [19]; default: 0;
+ *  This is the output enable bit for channel 1 in idle state.
+ */
+#define RMT_IDLE_OUT_EN_CH0    (BIT(19))
+#define RMT_IDLE_OUT_EN_CH0_M  (RMT_IDLE_OUT_EN_CH0_V << RMT_IDLE_OUT_EN_CH0_S)
+#define RMT_IDLE_OUT_EN_CH0_V  0x00000001U
+#define RMT_IDLE_OUT_EN_CH0_S  19
+/** RMT_TX_STOP_CH0 : R/W; bitpos: [20]; default: 0;
+ *  Set this bit to stop the transmitter of channel 1 sending data out.
+ */
+#define RMT_TX_STOP_CH0    (BIT(20))
+#define RMT_TX_STOP_CH0_M  (RMT_TX_STOP_CH0_V << RMT_TX_STOP_CH0_S)
+#define RMT_TX_STOP_CH0_V  0x00000001U
+#define RMT_TX_STOP_CH0_S  20
 
-#define RMT_CH2CONF0_REG          (DR_REG_RMT_BASE + 0x0020)
-/* RMT_CARRIER_OUT_LV_CH2 : R/W ;bitpos:[29] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_OUT_LV_CH2  (BIT(29))
-#define RMT_CARRIER_OUT_LV_CH2_M  (BIT(29))
-#define RMT_CARRIER_OUT_LV_CH2_V  0x1
-#define RMT_CARRIER_OUT_LV_CH2_S  29
-/* RMT_CARRIER_EN_CH2 : R/W ;bitpos:[28] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_EN_CH2  (BIT(28))
-#define RMT_CARRIER_EN_CH2_M  (BIT(28))
-#define RMT_CARRIER_EN_CH2_V  0x1
-#define RMT_CARRIER_EN_CH2_S  28
-/* RMT_CARRIER_EFF_EN_CH2 : R/W ;bitpos:[27] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_EFF_EN_CH2  (BIT(27))
-#define RMT_CARRIER_EFF_EN_CH2_M  (BIT(27))
-#define RMT_CARRIER_EFF_EN_CH2_V  0x1
-#define RMT_CARRIER_EFF_EN_CH2_S  27
-/* RMT_MEM_SIZE_CH2 : R/W ;bitpos:[26:24] ;default: 3'h1 ; */
-/*description: */
-#define RMT_MEM_SIZE_CH2  0x00000007
-#define RMT_MEM_SIZE_CH2_M  ((RMT_MEM_SIZE_CH2_V)<<(RMT_MEM_SIZE_CH2_S))
-#define RMT_MEM_SIZE_CH2_V  0x7
-#define RMT_MEM_SIZE_CH2_S  24
-/* RMT_IDLE_THRES_CH2 : R/W ;bitpos:[23:8] ;default: 16'h1000 ; */
-/*description: */
-#define RMT_IDLE_THRES_CH2  0x0000FFFF
-#define RMT_IDLE_THRES_CH2_M  ((RMT_IDLE_THRES_CH2_V)<<(RMT_IDLE_THRES_CH2_S))
-#define RMT_IDLE_THRES_CH2_V  0xFFFF
-#define RMT_IDLE_THRES_CH2_S  8
-/* RMT_DIV_CNT_CH2 : R/W ;bitpos:[7:0] ;default: 8'h2 ; */
-/*description: */
-#define RMT_DIV_CNT_CH2  0x000000FF
-#define RMT_DIV_CNT_CH2_M  ((RMT_DIV_CNT_CH2_V)<<(RMT_DIV_CNT_CH2_S))
-#define RMT_DIV_CNT_CH2_V  0xFF
-#define RMT_DIV_CNT_CH2_S  0
+/** RMT_CH2CONF0_REG register
+ *  Channel 2 configuration register 0
+ */
+#define RMT_CH2CONF0_REG (DR_REG_RMT_BASE + 0x20)
+/** RMT_DIV_CNT_CH0 : R/W; bitpos: [7:0]; default: 2;
+ *  This field is used to configure clock divider for channel 2.
+ */
+#define RMT_DIV_CNT_CH0    0x000000FFU
+#define RMT_DIV_CNT_CH0_M  (RMT_DIV_CNT_CH0_V << RMT_DIV_CNT_CH0_S)
+#define RMT_DIV_CNT_CH0_V  0x000000FFU
+#define RMT_DIV_CNT_CH0_S  0
+/** RMT_IDLE_THRES_CH0 : R/W; bitpos: [23:8]; default: 4096;
+ *  Receiving ends when no edge is detected on input signals for continuous clock
+ *  cycles longer than this field value.
+ */
+#define RMT_IDLE_THRES_CH0    0x0000FFFFU
+#define RMT_IDLE_THRES_CH0_M  (RMT_IDLE_THRES_CH0_V << RMT_IDLE_THRES_CH0_S)
+#define RMT_IDLE_THRES_CH0_V  0x0000FFFFU
+#define RMT_IDLE_THRES_CH0_S  8
+/** RMT_MEM_SIZE_CH0 : R/W; bitpos: [26:24]; default: 1;
+ *  This field is used to configure the maximum blocks allocated to channel 2. The
+ *  valid range is from 1 ~ 4-2.
+ */
+#define RMT_MEM_SIZE_CH0    0x00000007U
+#define RMT_MEM_SIZE_CH0_M  (RMT_MEM_SIZE_CH0_V << RMT_MEM_SIZE_CH0_S)
+#define RMT_MEM_SIZE_CH0_V  0x00000007U
+#define RMT_MEM_SIZE_CH0_S  24
+/** RMT_CARRIER_EFF_EN_CH0 : R/W; bitpos: [27]; default: 1;
+ *  1: Add carrier modulation on output signals only at data sending state for channel
+ *  2. 0: Add carrier modulation on signals at all states for channel 2. States here
+ *  include idle state (ST_IDLE), reading data from RAM (ST_RD_MEM), and sending data
+ *  stored in RAM (ST_SEND). Only valid when RMT_CARRIER_EN_CH2 is set to 1.
+ */
+#define RMT_CARRIER_EFF_EN_CH0    (BIT(27))
+#define RMT_CARRIER_EFF_EN_CH0_M  (RMT_CARRIER_EFF_EN_CH0_V << RMT_CARRIER_EFF_EN_CH0_S)
+#define RMT_CARRIER_EFF_EN_CH0_V  0x00000001U
+#define RMT_CARRIER_EFF_EN_CH0_S  27
+/** RMT_CARRIER_EN_CH0 : R/W; bitpos: [28]; default: 1;
+ *  This bit is used to enable carrier modulation for channel 2. 1: Add carrier
+ *  modulation on output signals. 0: No carrier modulation is added on output signals.
+ */
+#define RMT_CARRIER_EN_CH0    (BIT(28))
+#define RMT_CARRIER_EN_CH0_M  (RMT_CARRIER_EN_CH0_V << RMT_CARRIER_EN_CH0_S)
+#define RMT_CARRIER_EN_CH0_V  0x00000001U
+#define RMT_CARRIER_EN_CH0_S  28
+/** RMT_CARRIER_OUT_LV_CH0 : R/W; bitpos: [29]; default: 1;
+ *  This bit is used to configure the position of carrier wave for channel 2.
+ *
+ *  1'h0: Add carrier wave on low-level output signals.
+ *
+ *  1'h1: Add carrier wave on high-level output signals.
+ */
+#define RMT_CARRIER_OUT_LV_CH0    (BIT(29))
+#define RMT_CARRIER_OUT_LV_CH0_M  (RMT_CARRIER_OUT_LV_CH0_V << RMT_CARRIER_OUT_LV_CH0_S)
+#define RMT_CARRIER_OUT_LV_CH0_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_CH0_S  29
 
-#define RMT_CH2CONF1_REG          (DR_REG_RMT_BASE + 0x0024)
-/* RMT_TX_STOP_CH2 : R/W ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_STOP_CH2  (BIT(20))
-#define RMT_TX_STOP_CH2_M  (BIT(20))
-#define RMT_TX_STOP_CH2_V  0x1
-#define RMT_TX_STOP_CH2_S  20
-/* RMT_IDLE_OUT_EN_CH2 : R/W ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_IDLE_OUT_EN_CH2  (BIT(19))
-#define RMT_IDLE_OUT_EN_CH2_M  (BIT(19))
-#define RMT_IDLE_OUT_EN_CH2_V  0x1
-#define RMT_IDLE_OUT_EN_CH2_S  19
-/* RMT_IDLE_OUT_LV_CH2 : R/W ;bitpos:[18] ;default: 1'b0 ; */
-/*description: */
-#define RMT_IDLE_OUT_LV_CH2  (BIT(18))
-#define RMT_IDLE_OUT_LV_CH2_M  (BIT(18))
-#define RMT_IDLE_OUT_LV_CH2_V  0x1
-#define RMT_IDLE_OUT_LV_CH2_S  18
-/* RMT_REF_ALWAYS_ON_CH2 : R/W ;bitpos:[17] ;default: 1'b0 ; */
-/*description: */
-#define RMT_REF_ALWAYS_ON_CH2  (BIT(17))
-#define RMT_REF_ALWAYS_ON_CH2_M  (BIT(17))
-#define RMT_REF_ALWAYS_ON_CH2_V  0x1
-#define RMT_REF_ALWAYS_ON_CH2_S  17
-/* RMT_CHK_RX_CARRIER_EN_CH2 : R/W ;bitpos:[16] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CHK_RX_CARRIER_EN_CH2  (BIT(16))
-#define RMT_CHK_RX_CARRIER_EN_CH2_M  (BIT(16))
-#define RMT_CHK_RX_CARRIER_EN_CH2_V  0x1
-#define RMT_CHK_RX_CARRIER_EN_CH2_S  16
-/* RMT_RX_FILTER_THRES_CH2 : R/W ;bitpos:[15:8] ;default: 8'hf ; */
-/*description: */
-#define RMT_RX_FILTER_THRES_CH2  0x000000FF
-#define RMT_RX_FILTER_THRES_CH2_M  ((RMT_RX_FILTER_THRES_CH2_V)<<(RMT_RX_FILTER_THRES_CH2_S))
-#define RMT_RX_FILTER_THRES_CH2_V  0xFF
-#define RMT_RX_FILTER_THRES_CH2_S  8
-/* RMT_RX_FILTER_EN_CH2 : R/W ;bitpos:[7] ;default: 1'b0 ; */
-/*description: */
-#define RMT_RX_FILTER_EN_CH2  (BIT(7))
-#define RMT_RX_FILTER_EN_CH2_M  (BIT(7))
-#define RMT_RX_FILTER_EN_CH2_V  0x1
-#define RMT_RX_FILTER_EN_CH2_S  7
-/* RMT_TX_CONTI_MODE_CH2 : R/W ;bitpos:[6] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_CONTI_MODE_CH2  (BIT(6))
-#define RMT_TX_CONTI_MODE_CH2_M  (BIT(6))
-#define RMT_TX_CONTI_MODE_CH2_V  0x1
-#define RMT_TX_CONTI_MODE_CH2_S  6
-/* RMT_MEM_OWNER_CH2 : R/W ;bitpos:[5] ;default: 1'b1 ; */
-/*description: */
-#define RMT_MEM_OWNER_CH2  (BIT(5))
-#define RMT_MEM_OWNER_CH2_M  (BIT(5))
-#define RMT_MEM_OWNER_CH2_V  0x1
-#define RMT_MEM_OWNER_CH2_S  5
-/* RMT_APB_MEM_RST_CH2 : WO ;bitpos:[4] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RST_CH2  (BIT(4))
-#define RMT_APB_MEM_RST_CH2_M  (BIT(4))
-#define RMT_APB_MEM_RST_CH2_V  0x1
-#define RMT_APB_MEM_RST_CH2_S  4
-/* RMT_MEM_RD_RST_CH2 : WO ;bitpos:[3] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_RD_RST_CH2  (BIT(3))
-#define RMT_MEM_RD_RST_CH2_M  (BIT(3))
-#define RMT_MEM_RD_RST_CH2_V  0x1
-#define RMT_MEM_RD_RST_CH2_S  3
-/* RMT_MEM_WR_RST_CH2 : WO ;bitpos:[2] ;default: 1'h0 ; */
-/*description: */
-#define RMT_MEM_WR_RST_CH2  (BIT(2))
-#define RMT_MEM_WR_RST_CH2_M  (BIT(2))
-#define RMT_MEM_WR_RST_CH2_V  0x1
-#define RMT_MEM_WR_RST_CH2_S  2
-/* RMT_RX_EN_CH2 : R/W ;bitpos:[1] ;default: 1'h0 ; */
-/*description: */
-#define RMT_RX_EN_CH2  (BIT(1))
-#define RMT_RX_EN_CH2_M  (BIT(1))
-#define RMT_RX_EN_CH2_V  0x1
-#define RMT_RX_EN_CH2_S  1
-/* RMT_TX_START_CH2 : R/W ;bitpos:[0] ;default: 1'h0 ; */
-/*description: */
-#define RMT_TX_START_CH2  (BIT(0))
-#define RMT_TX_START_CH2_M  (BIT(0))
-#define RMT_TX_START_CH2_V  0x1
-#define RMT_TX_START_CH2_S  0
+/** RMT_CH2CONF1_REG register
+ *  Channel 2 configuration register 1
+ */
+#define RMT_CH2CONF1_REG (DR_REG_RMT_BASE + 0x24)
+/** RMT_TX_START_CH0 : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to start sending data on channel 2.
+ */
+#define RMT_TX_START_CH0    (BIT(0))
+#define RMT_TX_START_CH0_M  (RMT_TX_START_CH0_V << RMT_TX_START_CH0_S)
+#define RMT_TX_START_CH0_V  0x00000001U
+#define RMT_TX_START_CH0_S  0
+/** RMT_RX_EN_CH0 : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to enable receiver to receive data on channel 2.
+ */
+#define RMT_RX_EN_CH0    (BIT(1))
+#define RMT_RX_EN_CH0_M  (RMT_RX_EN_CH0_V << RMT_RX_EN_CH0_S)
+#define RMT_RX_EN_CH0_V  0x00000001U
+#define RMT_RX_EN_CH0_S  1
+/** RMT_MEM_WR_RST_CH0 : WO; bitpos: [2]; default: 0;
+ *  Set this bit to reset RAM write address accessed by the receiver for channel 2.
+ */
+#define RMT_MEM_WR_RST_CH0    (BIT(2))
+#define RMT_MEM_WR_RST_CH0_M  (RMT_MEM_WR_RST_CH0_V << RMT_MEM_WR_RST_CH0_S)
+#define RMT_MEM_WR_RST_CH0_V  0x00000001U
+#define RMT_MEM_WR_RST_CH0_S  2
+/** RMT_MEM_RD_RST_CH0 : WO; bitpos: [3]; default: 0;
+ *  Set this bit to reset RAM read address accessed by the transmitter for channel 2.
+ */
+#define RMT_MEM_RD_RST_CH0    (BIT(3))
+#define RMT_MEM_RD_RST_CH0_M  (RMT_MEM_RD_RST_CH0_V << RMT_MEM_RD_RST_CH0_S)
+#define RMT_MEM_RD_RST_CH0_V  0x00000001U
+#define RMT_MEM_RD_RST_CH0_S  3
+/** RMT_APB_MEM_RST_CH0 : WO; bitpos: [4]; default: 0;
+ *  Set this bit to reset W/R ram address for channel 2 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_CH0    (BIT(4))
+#define RMT_APB_MEM_RST_CH0_M  (RMT_APB_MEM_RST_CH0_V << RMT_APB_MEM_RST_CH0_S)
+#define RMT_APB_MEM_RST_CH0_V  0x00000001U
+#define RMT_APB_MEM_RST_CH0_S  4
+/** RMT_MEM_OWNER_CH0 : R/W; bitpos: [5]; default: 1;
+ *  This bit marks the ownership of channel 2's RAM block.
+ *
+ *  1'h1: Receiver is using the RAM.
+ *
+ *  1'h0: Transmitter is using the RAM.
+ */
+#define RMT_MEM_OWNER_CH0    (BIT(5))
+#define RMT_MEM_OWNER_CH0_M  (RMT_MEM_OWNER_CH0_V << RMT_MEM_OWNER_CH0_S)
+#define RMT_MEM_OWNER_CH0_V  0x00000001U
+#define RMT_MEM_OWNER_CH0_S  5
+/** RMT_TX_CONTI_MODE_CH0 : R/W; bitpos: [6]; default: 0;
+ *  Set this bit to restart transmission in continuous node from the first data in
+ *  channel 2.
+ */
+#define RMT_TX_CONTI_MODE_CH0    (BIT(6))
+#define RMT_TX_CONTI_MODE_CH0_M  (RMT_TX_CONTI_MODE_CH0_V << RMT_TX_CONTI_MODE_CH0_S)
+#define RMT_TX_CONTI_MODE_CH0_V  0x00000001U
+#define RMT_TX_CONTI_MODE_CH0_S  6
+/** RMT_RX_FILTER_EN_CH0 : R/W; bitpos: [7]; default: 0;
+ *  Set this bit to enable the receiver's filter for channel 2.
+ */
+#define RMT_RX_FILTER_EN_CH0    (BIT(7))
+#define RMT_RX_FILTER_EN_CH0_M  (RMT_RX_FILTER_EN_CH0_V << RMT_RX_FILTER_EN_CH0_S)
+#define RMT_RX_FILTER_EN_CH0_V  0x00000001U
+#define RMT_RX_FILTER_EN_CH0_S  7
+/** RMT_RX_FILTER_THRES_CH0 : R/W; bitpos: [15:8]; default: 15;
+ *  Set this field to ignore the input pulse when its width is less than
+ *  RMT_RX_FILTER_THRES_CH2 APB clock cycles in receive mode.
+ */
+#define RMT_RX_FILTER_THRES_CH0    0x000000FFU
+#define RMT_RX_FILTER_THRES_CH0_M  (RMT_RX_FILTER_THRES_CH0_V << RMT_RX_FILTER_THRES_CH0_S)
+#define RMT_RX_FILTER_THRES_CH0_V  0x000000FFU
+#define RMT_RX_FILTER_THRES_CH0_S  8
+/** RMT_CHK_RX_CARRIER_EN_CH0 : R/W; bitpos: [16]; default: 0;
+ *  Set this bit to enable memory loop read mode when carrier modulation is enabled for
+ *  channel 2.
+ */
+#define RMT_CHK_RX_CARRIER_EN_CH0    (BIT(16))
+#define RMT_CHK_RX_CARRIER_EN_CH0_M  (RMT_CHK_RX_CARRIER_EN_CH0_V << RMT_CHK_RX_CARRIER_EN_CH0_S)
+#define RMT_CHK_RX_CARRIER_EN_CH0_V  0x00000001U
+#define RMT_CHK_RX_CARRIER_EN_CH0_S  16
+/** RMT_REF_ALWAYS_ON_CH0 : R/W; bitpos: [17]; default: 0;
+ *  Set this bit to select a base clock for channel 2.
+ *
+ *  1'h1: APB_CLK    1'h0: REF_TICK
+ */
+#define RMT_REF_ALWAYS_ON_CH0    (BIT(17))
+#define RMT_REF_ALWAYS_ON_CH0_M  (RMT_REF_ALWAYS_ON_CH0_V << RMT_REF_ALWAYS_ON_CH0_S)
+#define RMT_REF_ALWAYS_ON_CH0_V  0x00000001U
+#define RMT_REF_ALWAYS_ON_CH0_S  17
+/** RMT_IDLE_OUT_LV_CH0 : R/W; bitpos: [18]; default: 0;
+ *  This bit configures the level of output signals in channel 2 when the transmitter
+ *  is in idle state.
+ */
+#define RMT_IDLE_OUT_LV_CH0    (BIT(18))
+#define RMT_IDLE_OUT_LV_CH0_M  (RMT_IDLE_OUT_LV_CH0_V << RMT_IDLE_OUT_LV_CH0_S)
+#define RMT_IDLE_OUT_LV_CH0_V  0x00000001U
+#define RMT_IDLE_OUT_LV_CH0_S  18
+/** RMT_IDLE_OUT_EN_CH0 : R/W; bitpos: [19]; default: 0;
+ *  This is the output enable bit for channel 2 in idle state.
+ */
+#define RMT_IDLE_OUT_EN_CH0    (BIT(19))
+#define RMT_IDLE_OUT_EN_CH0_M  (RMT_IDLE_OUT_EN_CH0_V << RMT_IDLE_OUT_EN_CH0_S)
+#define RMT_IDLE_OUT_EN_CH0_V  0x00000001U
+#define RMT_IDLE_OUT_EN_CH0_S  19
+/** RMT_TX_STOP_CH0 : R/W; bitpos: [20]; default: 0;
+ *  Set this bit to stop the transmitter of channel 2 sending data out.
+ */
+#define RMT_TX_STOP_CH0    (BIT(20))
+#define RMT_TX_STOP_CH0_M  (RMT_TX_STOP_CH0_V << RMT_TX_STOP_CH0_S)
+#define RMT_TX_STOP_CH0_V  0x00000001U
+#define RMT_TX_STOP_CH0_S  20
 
-#define RMT_CH3CONF0_REG          (DR_REG_RMT_BASE + 0x0028)
-/* RMT_CARRIER_OUT_LV_CH3 : R/W ;bitpos:[29] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_OUT_LV_CH3  (BIT(29))
-#define RMT_CARRIER_OUT_LV_CH3_M  (BIT(29))
-#define RMT_CARRIER_OUT_LV_CH3_V  0x1
-#define RMT_CARRIER_OUT_LV_CH3_S  29
-/* RMT_CARRIER_EN_CH3 : R/W ;bitpos:[28] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_EN_CH3  (BIT(28))
-#define RMT_CARRIER_EN_CH3_M  (BIT(28))
-#define RMT_CARRIER_EN_CH3_V  0x1
-#define RMT_CARRIER_EN_CH3_S  28
-/* RMT_CARRIER_EFF_EN_CH3 : R/W ;bitpos:[27] ;default: 1'b1 ; */
-/*description: */
-#define RMT_CARRIER_EFF_EN_CH3  (BIT(27))
-#define RMT_CARRIER_EFF_EN_CH3_M  (BIT(27))
-#define RMT_CARRIER_EFF_EN_CH3_V  0x1
-#define RMT_CARRIER_EFF_EN_CH3_S  27
-/* RMT_MEM_SIZE_CH3 : R/W ;bitpos:[26:24] ;default: 3'h1 ; */
-/*description: */
-#define RMT_MEM_SIZE_CH3  0x00000007
-#define RMT_MEM_SIZE_CH3_M  ((RMT_MEM_SIZE_CH3_V)<<(RMT_MEM_SIZE_CH3_S))
-#define RMT_MEM_SIZE_CH3_V  0x7
-#define RMT_MEM_SIZE_CH3_S  24
-/* RMT_IDLE_THRES_CH3 : R/W ;bitpos:[23:8] ;default: 16'h1000 ; */
-/*description: */
-#define RMT_IDLE_THRES_CH3  0x0000FFFF
-#define RMT_IDLE_THRES_CH3_M  ((RMT_IDLE_THRES_CH3_V)<<(RMT_IDLE_THRES_CH3_S))
-#define RMT_IDLE_THRES_CH3_V  0xFFFF
-#define RMT_IDLE_THRES_CH3_S  8
-/* RMT_DIV_CNT_CH3 : R/W ;bitpos:[7:0] ;default: 8'h2 ; */
-/*description: */
-#define RMT_DIV_CNT_CH3  0x000000FF
-#define RMT_DIV_CNT_CH3_M  ((RMT_DIV_CNT_CH3_V)<<(RMT_DIV_CNT_CH3_S))
-#define RMT_DIV_CNT_CH3_V  0xFF
-#define RMT_DIV_CNT_CH3_S  0
+/** RMT_CH3CONF0_REG register
+ *  Channel 3 configuration register 0
+ */
+#define RMT_CH3CONF0_REG (DR_REG_RMT_BASE + 0x28)
+/** RMT_DIV_CNT_CH0 : R/W; bitpos: [7:0]; default: 2;
+ *  This field is used to configure clock divider for channel 3.
+ */
+#define RMT_DIV_CNT_CH0    0x000000FFU
+#define RMT_DIV_CNT_CH0_M  (RMT_DIV_CNT_CH0_V << RMT_DIV_CNT_CH0_S)
+#define RMT_DIV_CNT_CH0_V  0x000000FFU
+#define RMT_DIV_CNT_CH0_S  0
+/** RMT_IDLE_THRES_CH0 : R/W; bitpos: [23:8]; default: 4096;
+ *  Receiving ends when no edge is detected on input signals for continuous clock
+ *  cycles longer than this field value.
+ */
+#define RMT_IDLE_THRES_CH0    0x0000FFFFU
+#define RMT_IDLE_THRES_CH0_M  (RMT_IDLE_THRES_CH0_V << RMT_IDLE_THRES_CH0_S)
+#define RMT_IDLE_THRES_CH0_V  0x0000FFFFU
+#define RMT_IDLE_THRES_CH0_S  8
+/** RMT_MEM_SIZE_CH0 : R/W; bitpos: [26:24]; default: 1;
+ *  This field is used to configure the maximum blocks allocated to channel 3. The
+ *  valid range is from 1 ~ 4-3.
+ */
+#define RMT_MEM_SIZE_CH0    0x00000007U
+#define RMT_MEM_SIZE_CH0_M  (RMT_MEM_SIZE_CH0_V << RMT_MEM_SIZE_CH0_S)
+#define RMT_MEM_SIZE_CH0_V  0x00000007U
+#define RMT_MEM_SIZE_CH0_S  24
+/** RMT_CARRIER_EFF_EN_CH0 : R/W; bitpos: [27]; default: 1;
+ *  1: Add carrier modulation on output signals only at data sending state for channel
+ *  3. 0: Add carrier modulation on signals at all states for channel 3. States here
+ *  include idle state (ST_IDLE), reading data from RAM (ST_RD_MEM), and sending data
+ *  stored in RAM (ST_SEND). Only valid when RMT_CARRIER_EN_CH3 is set to 1.
+ */
+#define RMT_CARRIER_EFF_EN_CH0    (BIT(27))
+#define RMT_CARRIER_EFF_EN_CH0_M  (RMT_CARRIER_EFF_EN_CH0_V << RMT_CARRIER_EFF_EN_CH0_S)
+#define RMT_CARRIER_EFF_EN_CH0_V  0x00000001U
+#define RMT_CARRIER_EFF_EN_CH0_S  27
+/** RMT_CARRIER_EN_CH0 : R/W; bitpos: [28]; default: 1;
+ *  This bit is used to enable carrier modulation for channel 3. 1: Add carrier
+ *  modulation on output signals. 0: No carrier modulation is added on output signals.
+ */
+#define RMT_CARRIER_EN_CH0    (BIT(28))
+#define RMT_CARRIER_EN_CH0_M  (RMT_CARRIER_EN_CH0_V << RMT_CARRIER_EN_CH0_S)
+#define RMT_CARRIER_EN_CH0_V  0x00000001U
+#define RMT_CARRIER_EN_CH0_S  28
+/** RMT_CARRIER_OUT_LV_CH0 : R/W; bitpos: [29]; default: 1;
+ *  This bit is used to configure the position of carrier wave for channel 3.
+ *
+ *  1'h0: Add carrier wave on low-level output signals.
+ *
+ *  1'h1: Add carrier wave on high-level output signals.
+ */
+#define RMT_CARRIER_OUT_LV_CH0    (BIT(29))
+#define RMT_CARRIER_OUT_LV_CH0_M  (RMT_CARRIER_OUT_LV_CH0_V << RMT_CARRIER_OUT_LV_CH0_S)
+#define RMT_CARRIER_OUT_LV_CH0_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_CH0_S  29
 
-#define RMT_CH3CONF1_REG          (DR_REG_RMT_BASE + 0x002c)
-/* RMT_TX_STOP_CH3 : R/W ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_STOP_CH3  (BIT(20))
-#define RMT_TX_STOP_CH3_M  (BIT(20))
-#define RMT_TX_STOP_CH3_V  0x1
-#define RMT_TX_STOP_CH3_S  20
-/* RMT_IDLE_OUT_EN_CH3 : R/W ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_IDLE_OUT_EN_CH3  (BIT(19))
-#define RMT_IDLE_OUT_EN_CH3_M  (BIT(19))
-#define RMT_IDLE_OUT_EN_CH3_V  0x1
-#define RMT_IDLE_OUT_EN_CH3_S  19
-/* RMT_IDLE_OUT_LV_CH3 : R/W ;bitpos:[18] ;default: 1'b0 ; */
-/*description: */
-#define RMT_IDLE_OUT_LV_CH3  (BIT(18))
-#define RMT_IDLE_OUT_LV_CH3_M  (BIT(18))
-#define RMT_IDLE_OUT_LV_CH3_V  0x1
-#define RMT_IDLE_OUT_LV_CH3_S  18
-/* RMT_REF_ALWAYS_ON_CH3 : R/W ;bitpos:[17] ;default: 1'b0 ; */
-/*description: */
-#define RMT_REF_ALWAYS_ON_CH3  (BIT(17))
-#define RMT_REF_ALWAYS_ON_CH3_M  (BIT(17))
-#define RMT_REF_ALWAYS_ON_CH3_V  0x1
-#define RMT_REF_ALWAYS_ON_CH3_S  17
-/* RMT_CHK_RX_CARRIER_EN_CH3 : R/W ;bitpos:[16] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CHK_RX_CARRIER_EN_CH3  (BIT(16))
-#define RMT_CHK_RX_CARRIER_EN_CH3_M  (BIT(16))
-#define RMT_CHK_RX_CARRIER_EN_CH3_V  0x1
-#define RMT_CHK_RX_CARRIER_EN_CH3_S  16
-/* RMT_RX_FILTER_THRES_CH3 : R/W ;bitpos:[15:8] ;default: 8'hf ; */
-/*description: */
-#define RMT_RX_FILTER_THRES_CH3  0x000000FF
-#define RMT_RX_FILTER_THRES_CH3_M  ((RMT_RX_FILTER_THRES_CH3_V)<<(RMT_RX_FILTER_THRES_CH3_S))
-#define RMT_RX_FILTER_THRES_CH3_V  0xFF
-#define RMT_RX_FILTER_THRES_CH3_S  8
-/* RMT_RX_FILTER_EN_CH3 : R/W ;bitpos:[7] ;default: 1'b0 ; */
-/*description: */
-#define RMT_RX_FILTER_EN_CH3  (BIT(7))
-#define RMT_RX_FILTER_EN_CH3_M  (BIT(7))
-#define RMT_RX_FILTER_EN_CH3_V  0x1
-#define RMT_RX_FILTER_EN_CH3_S  7
-/* RMT_TX_CONTI_MODE_CH3 : R/W ;bitpos:[6] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_CONTI_MODE_CH3  (BIT(6))
-#define RMT_TX_CONTI_MODE_CH3_M  (BIT(6))
-#define RMT_TX_CONTI_MODE_CH3_V  0x1
-#define RMT_TX_CONTI_MODE_CH3_S  6
-/* RMT_MEM_OWNER_CH3 : R/W ;bitpos:[5] ;default: 1'b1 ; */
-/*description: */
-#define RMT_MEM_OWNER_CH3  (BIT(5))
-#define RMT_MEM_OWNER_CH3_M  (BIT(5))
-#define RMT_MEM_OWNER_CH3_V  0x1
-#define RMT_MEM_OWNER_CH3_S  5
-/* RMT_APB_MEM_RST_CH3 : WO ;bitpos:[4] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RST_CH3  (BIT(4))
-#define RMT_APB_MEM_RST_CH3_M  (BIT(4))
-#define RMT_APB_MEM_RST_CH3_V  0x1
-#define RMT_APB_MEM_RST_CH3_S  4
-/* RMT_MEM_RD_RST_CH3 : WO ;bitpos:[3] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_RD_RST_CH3  (BIT(3))
-#define RMT_MEM_RD_RST_CH3_M  (BIT(3))
-#define RMT_MEM_RD_RST_CH3_V  0x1
-#define RMT_MEM_RD_RST_CH3_S  3
-/* RMT_MEM_WR_RST_CH3 : WO ;bitpos:[2] ;default: 1'h0 ; */
-/*description: */
-#define RMT_MEM_WR_RST_CH3  (BIT(2))
-#define RMT_MEM_WR_RST_CH3_M  (BIT(2))
-#define RMT_MEM_WR_RST_CH3_V  0x1
-#define RMT_MEM_WR_RST_CH3_S  2
-/* RMT_RX_EN_CH3 : R/W ;bitpos:[1] ;default: 1'h0 ; */
-/*description: */
-#define RMT_RX_EN_CH3  (BIT(1))
-#define RMT_RX_EN_CH3_M  (BIT(1))
-#define RMT_RX_EN_CH3_V  0x1
-#define RMT_RX_EN_CH3_S  1
-/* RMT_TX_START_CH3 : R/W ;bitpos:[0] ;default: 1'h0 ; */
-/*description: */
-#define RMT_TX_START_CH3  (BIT(0))
-#define RMT_TX_START_CH3_M  (BIT(0))
-#define RMT_TX_START_CH3_V  0x1
-#define RMT_TX_START_CH3_S  0
+/** RMT_CH3CONF1_REG register
+ *  Channel 3 configuration register 1
+ */
+#define RMT_CH3CONF1_REG (DR_REG_RMT_BASE + 0x2c)
+/** RMT_TX_START_CH0 : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to start sending data on channel 3.
+ */
+#define RMT_TX_START_CH0    (BIT(0))
+#define RMT_TX_START_CH0_M  (RMT_TX_START_CH0_V << RMT_TX_START_CH0_S)
+#define RMT_TX_START_CH0_V  0x00000001U
+#define RMT_TX_START_CH0_S  0
+/** RMT_RX_EN_CH0 : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to enable receiver to receive data on channel 3.
+ */
+#define RMT_RX_EN_CH0    (BIT(1))
+#define RMT_RX_EN_CH0_M  (RMT_RX_EN_CH0_V << RMT_RX_EN_CH0_S)
+#define RMT_RX_EN_CH0_V  0x00000001U
+#define RMT_RX_EN_CH0_S  1
+/** RMT_MEM_WR_RST_CH0 : WO; bitpos: [2]; default: 0;
+ *  Set this bit to reset RAM write address accessed by the receiver for channel 3.
+ */
+#define RMT_MEM_WR_RST_CH0    (BIT(2))
+#define RMT_MEM_WR_RST_CH0_M  (RMT_MEM_WR_RST_CH0_V << RMT_MEM_WR_RST_CH0_S)
+#define RMT_MEM_WR_RST_CH0_V  0x00000001U
+#define RMT_MEM_WR_RST_CH0_S  2
+/** RMT_MEM_RD_RST_CH0 : WO; bitpos: [3]; default: 0;
+ *  Set this bit to reset RAM read address accessed by the transmitter for channel 3.
+ */
+#define RMT_MEM_RD_RST_CH0    (BIT(3))
+#define RMT_MEM_RD_RST_CH0_M  (RMT_MEM_RD_RST_CH0_V << RMT_MEM_RD_RST_CH0_S)
+#define RMT_MEM_RD_RST_CH0_V  0x00000001U
+#define RMT_MEM_RD_RST_CH0_S  3
+/** RMT_APB_MEM_RST_CH0 : WO; bitpos: [4]; default: 0;
+ *  Set this bit to reset W/R ram address for channel 3 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_CH0    (BIT(4))
+#define RMT_APB_MEM_RST_CH0_M  (RMT_APB_MEM_RST_CH0_V << RMT_APB_MEM_RST_CH0_S)
+#define RMT_APB_MEM_RST_CH0_V  0x00000001U
+#define RMT_APB_MEM_RST_CH0_S  4
+/** RMT_MEM_OWNER_CH0 : R/W; bitpos: [5]; default: 1;
+ *  This bit marks the ownership of channel 3's RAM block.
+ *
+ *  1'h1: Receiver is using the RAM.
+ *
+ *  1'h0: Transmitter is using the RAM.
+ */
+#define RMT_MEM_OWNER_CH0    (BIT(5))
+#define RMT_MEM_OWNER_CH0_M  (RMT_MEM_OWNER_CH0_V << RMT_MEM_OWNER_CH0_S)
+#define RMT_MEM_OWNER_CH0_V  0x00000001U
+#define RMT_MEM_OWNER_CH0_S  5
+/** RMT_TX_CONTI_MODE_CH0 : R/W; bitpos: [6]; default: 0;
+ *  Set this bit to restart transmission in continuous node from the first data in
+ *  channel 3.
+ */
+#define RMT_TX_CONTI_MODE_CH0    (BIT(6))
+#define RMT_TX_CONTI_MODE_CH0_M  (RMT_TX_CONTI_MODE_CH0_V << RMT_TX_CONTI_MODE_CH0_S)
+#define RMT_TX_CONTI_MODE_CH0_V  0x00000001U
+#define RMT_TX_CONTI_MODE_CH0_S  6
+/** RMT_RX_FILTER_EN_CH0 : R/W; bitpos: [7]; default: 0;
+ *  Set this bit to enable the receiver's filter for channel 3.
+ */
+#define RMT_RX_FILTER_EN_CH0    (BIT(7))
+#define RMT_RX_FILTER_EN_CH0_M  (RMT_RX_FILTER_EN_CH0_V << RMT_RX_FILTER_EN_CH0_S)
+#define RMT_RX_FILTER_EN_CH0_V  0x00000001U
+#define RMT_RX_FILTER_EN_CH0_S  7
+/** RMT_RX_FILTER_THRES_CH0 : R/W; bitpos: [15:8]; default: 15;
+ *  Set this field to ignore the input pulse when its width is less than
+ *  RMT_RX_FILTER_THRES_CH3 APB clock cycles in receive mode.
+ */
+#define RMT_RX_FILTER_THRES_CH0    0x000000FFU
+#define RMT_RX_FILTER_THRES_CH0_M  (RMT_RX_FILTER_THRES_CH0_V << RMT_RX_FILTER_THRES_CH0_S)
+#define RMT_RX_FILTER_THRES_CH0_V  0x000000FFU
+#define RMT_RX_FILTER_THRES_CH0_S  8
+/** RMT_CHK_RX_CARRIER_EN_CH0 : R/W; bitpos: [16]; default: 0;
+ *  Set this bit to enable memory loop read mode when carrier modulation is enabled for
+ *  channel 3.
+ */
+#define RMT_CHK_RX_CARRIER_EN_CH0    (BIT(16))
+#define RMT_CHK_RX_CARRIER_EN_CH0_M  (RMT_CHK_RX_CARRIER_EN_CH0_V << RMT_CHK_RX_CARRIER_EN_CH0_S)
+#define RMT_CHK_RX_CARRIER_EN_CH0_V  0x00000001U
+#define RMT_CHK_RX_CARRIER_EN_CH0_S  16
+/** RMT_REF_ALWAYS_ON_CH0 : R/W; bitpos: [17]; default: 0;
+ *  Set this bit to select a base clock for channel 3.
+ *
+ *  1'h1: APB_CLK    1'h0: REF_TICK
+ */
+#define RMT_REF_ALWAYS_ON_CH0    (BIT(17))
+#define RMT_REF_ALWAYS_ON_CH0_M  (RMT_REF_ALWAYS_ON_CH0_V << RMT_REF_ALWAYS_ON_CH0_S)
+#define RMT_REF_ALWAYS_ON_CH0_V  0x00000001U
+#define RMT_REF_ALWAYS_ON_CH0_S  17
+/** RMT_IDLE_OUT_LV_CH0 : R/W; bitpos: [18]; default: 0;
+ *  This bit configures the level of output signals in channel 3 when the transmitter
+ *  is in idle state.
+ */
+#define RMT_IDLE_OUT_LV_CH0    (BIT(18))
+#define RMT_IDLE_OUT_LV_CH0_M  (RMT_IDLE_OUT_LV_CH0_V << RMT_IDLE_OUT_LV_CH0_S)
+#define RMT_IDLE_OUT_LV_CH0_V  0x00000001U
+#define RMT_IDLE_OUT_LV_CH0_S  18
+/** RMT_IDLE_OUT_EN_CH0 : R/W; bitpos: [19]; default: 0;
+ *  This is the output enable bit for channel 3 in idle state.
+ */
+#define RMT_IDLE_OUT_EN_CH0    (BIT(19))
+#define RMT_IDLE_OUT_EN_CH0_M  (RMT_IDLE_OUT_EN_CH0_V << RMT_IDLE_OUT_EN_CH0_S)
+#define RMT_IDLE_OUT_EN_CH0_V  0x00000001U
+#define RMT_IDLE_OUT_EN_CH0_S  19
+/** RMT_TX_STOP_CH0 : R/W; bitpos: [20]; default: 0;
+ *  Set this bit to stop the transmitter of channel 3 sending data out.
+ */
+#define RMT_TX_STOP_CH0    (BIT(20))
+#define RMT_TX_STOP_CH0_M  (RMT_TX_STOP_CH0_V << RMT_TX_STOP_CH0_S)
+#define RMT_TX_STOP_CH0_V  0x00000001U
+#define RMT_TX_STOP_CH0_S  20
 
-#define RMT_CH0STATUS_REG          (DR_REG_RMT_BASE + 0x0030)
-/* RMT_APB_MEM_RD_ERR_CH0 : RO ;bitpos:[27] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RD_ERR_CH0  (BIT(27))
-#define RMT_APB_MEM_RD_ERR_CH0_M  (BIT(27))
-#define RMT_APB_MEM_RD_ERR_CH0_V  0x1
-#define RMT_APB_MEM_RD_ERR_CH0_S  27
-/* RMT_APB_MEM_WR_ERR_CH0 : RO ;bitpos:[26] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_WR_ERR_CH0  (BIT(26))
-#define RMT_APB_MEM_WR_ERR_CH0_M  (BIT(26))
-#define RMT_APB_MEM_WR_ERR_CH0_V  0x1
-#define RMT_APB_MEM_WR_ERR_CH0_S  26
-/* RMT_MEM_EMPTY_CH0 : RO ;bitpos:[25] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_EMPTY_CH0  (BIT(25))
-#define RMT_MEM_EMPTY_CH0_M  (BIT(25))
-#define RMT_MEM_EMPTY_CH0_V  0x1
-#define RMT_MEM_EMPTY_CH0_S  25
-/* RMT_MEM_FULL_CH0 : RO ;bitpos:[24] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_FULL_CH0  (BIT(24))
-#define RMT_MEM_FULL_CH0_M  (BIT(24))
-#define RMT_MEM_FULL_CH0_V  0x1
-#define RMT_MEM_FULL_CH0_S  24
-/* RMT_MEM_OWNER_ERR_CH0 : RO ;bitpos:[23] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_OWNER_ERR_CH0  (BIT(23))
-#define RMT_MEM_OWNER_ERR_CH0_M  (BIT(23))
-#define RMT_MEM_OWNER_ERR_CH0_V  0x1
-#define RMT_MEM_OWNER_ERR_CH0_S  23
-/* RMT_STATE_CH0 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
-/*description: */
-#define RMT_STATE_CH0  0x00000007
-#define RMT_STATE_CH0_M  ((RMT_STATE_CH0_V)<<(RMT_STATE_CH0_S))
-#define RMT_STATE_CH0_V  0x7
-#define RMT_STATE_CH0_S  20
-/* RMT_MEM_RADDR_EX_CH0 : RO ;bitpos:[18:10] ;default: 9'b0 ; */
-/*description: */
-#define RMT_MEM_RADDR_EX_CH0  0x000001FF
-#define RMT_MEM_RADDR_EX_CH0_M  ((RMT_MEM_RADDR_EX_CH0_V)<<(RMT_MEM_RADDR_EX_CH0_S))
-#define RMT_MEM_RADDR_EX_CH0_V  0x1FF
-#define RMT_MEM_RADDR_EX_CH0_S  10
-/* RMT_MEM_WADDR_EX_CH0 : RO ;bitpos:[8:0] ;default: 9'b0 ; */
-/*description: */
-#define RMT_MEM_WADDR_EX_CH0  0x000001FF
-#define RMT_MEM_WADDR_EX_CH0_M  ((RMT_MEM_WADDR_EX_CH0_V)<<(RMT_MEM_WADDR_EX_CH0_S))
-#define RMT_MEM_WADDR_EX_CH0_V  0x1FF
+/** RMT_CH0STATUS_REG register
+ *  Channel 0 status register
+ */
+#define RMT_CH0STATUS_REG (DR_REG_RMT_BASE + 0x30)
+/** RMT_MEM_WADDR_EX_CH0 : RO; bitpos: [8:0]; default: 0;
+ *  This field records the memory address offset when receiver of channel 0 is using
+ *  the RAM.
+ */
+#define RMT_MEM_WADDR_EX_CH0    0x000001FFU
+#define RMT_MEM_WADDR_EX_CH0_M  (RMT_MEM_WADDR_EX_CH0_V << RMT_MEM_WADDR_EX_CH0_S)
+#define RMT_MEM_WADDR_EX_CH0_V  0x000001FFU
 #define RMT_MEM_WADDR_EX_CH0_S  0
+/** RMT_MEM_RADDR_EX_CH0 : RO; bitpos: [18:10]; default: 0;
+ *  This field records the memory address offset when transmitter of channel 0 is using
+ *  the RAM.
+ */
+#define RMT_MEM_RADDR_EX_CH0    0x000001FFU
+#define RMT_MEM_RADDR_EX_CH0_M  (RMT_MEM_RADDR_EX_CH0_V << RMT_MEM_RADDR_EX_CH0_S)
+#define RMT_MEM_RADDR_EX_CH0_V  0x000001FFU
+#define RMT_MEM_RADDR_EX_CH0_S  10
+/** RMT_STATE_CH0 : RO; bitpos: [22:20]; default: 0;
+ *  This field records the FSM status of channel 0.
+ */
+#define RMT_STATE_CH0    0x00000007U
+#define RMT_STATE_CH0_M  (RMT_STATE_CH0_V << RMT_STATE_CH0_S)
+#define RMT_STATE_CH0_V  0x00000007U
+#define RMT_STATE_CH0_S  20
+/** RMT_MEM_OWNER_ERR_CH0 : RO; bitpos: [23]; default: 0;
+ *  This status bit will be set when the ownership of memory block is violated.
+ */
+#define RMT_MEM_OWNER_ERR_CH0    (BIT(23))
+#define RMT_MEM_OWNER_ERR_CH0_M  (RMT_MEM_OWNER_ERR_CH0_V << RMT_MEM_OWNER_ERR_CH0_S)
+#define RMT_MEM_OWNER_ERR_CH0_V  0x00000001U
+#define RMT_MEM_OWNER_ERR_CH0_S  23
+/** RMT_MEM_FULL_CH0 : RO; bitpos: [24]; default: 0;
+ *  This status bit will be set if the receiver receives more data than the memory
+ *  allows.
+ */
+#define RMT_MEM_FULL_CH0    (BIT(24))
+#define RMT_MEM_FULL_CH0_M  (RMT_MEM_FULL_CH0_V << RMT_MEM_FULL_CH0_S)
+#define RMT_MEM_FULL_CH0_V  0x00000001U
+#define RMT_MEM_FULL_CH0_S  24
+/** RMT_MEM_EMPTY_CH0 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the data to be sent is more than memory allows and
+ *  the wrap mode is disabled.
+ */
+#define RMT_MEM_EMPTY_CH0    (BIT(25))
+#define RMT_MEM_EMPTY_CH0_M  (RMT_MEM_EMPTY_CH0_V << RMT_MEM_EMPTY_CH0_S)
+#define RMT_MEM_EMPTY_CH0_V  0x00000001U
+#define RMT_MEM_EMPTY_CH0_S  25
+/** RMT_APB_MEM_WR_ERR_CH0 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when writes
+ *  RAM via APB bus.
+ */
+#define RMT_APB_MEM_WR_ERR_CH0    (BIT(26))
+#define RMT_APB_MEM_WR_ERR_CH0_M  (RMT_APB_MEM_WR_ERR_CH0_V << RMT_APB_MEM_WR_ERR_CH0_S)
+#define RMT_APB_MEM_WR_ERR_CH0_V  0x00000001U
+#define RMT_APB_MEM_WR_ERR_CH0_S  26
+/** RMT_APB_MEM_RD_ERR_CH0 : RO; bitpos: [27]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when reads RAM
+ *  via APB bus.
+ */
+#define RMT_APB_MEM_RD_ERR_CH0    (BIT(27))
+#define RMT_APB_MEM_RD_ERR_CH0_M  (RMT_APB_MEM_RD_ERR_CH0_V << RMT_APB_MEM_RD_ERR_CH0_S)
+#define RMT_APB_MEM_RD_ERR_CH0_V  0x00000001U
+#define RMT_APB_MEM_RD_ERR_CH0_S  27
 
-#define RMT_CH1STATUS_REG          (DR_REG_RMT_BASE + 0x0034)
-/* RMT_APB_MEM_RD_ERR_CH1 : RO ;bitpos:[27] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RD_ERR_CH1  (BIT(27))
-#define RMT_APB_MEM_RD_ERR_CH1_M  (BIT(27))
-#define RMT_APB_MEM_RD_ERR_CH1_V  0x1
-#define RMT_APB_MEM_RD_ERR_CH1_S  27
-/* RMT_APB_MEM_WR_ERR_CH1 : RO ;bitpos:[26] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_WR_ERR_CH1  (BIT(26))
-#define RMT_APB_MEM_WR_ERR_CH1_M  (BIT(26))
-#define RMT_APB_MEM_WR_ERR_CH1_V  0x1
-#define RMT_APB_MEM_WR_ERR_CH1_S  26
-/* RMT_MEM_EMPTY_CH1 : RO ;bitpos:[25] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_EMPTY_CH1  (BIT(25))
-#define RMT_MEM_EMPTY_CH1_M  (BIT(25))
-#define RMT_MEM_EMPTY_CH1_V  0x1
-#define RMT_MEM_EMPTY_CH1_S  25
-/* RMT_MEM_FULL_CH1 : RO ;bitpos:[24] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_FULL_CH1  (BIT(24))
-#define RMT_MEM_FULL_CH1_M  (BIT(24))
-#define RMT_MEM_FULL_CH1_V  0x1
-#define RMT_MEM_FULL_CH1_S  24
-/* RMT_MEM_OWNER_ERR_CH1 : RO ;bitpos:[23] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_OWNER_ERR_CH1  (BIT(23))
-#define RMT_MEM_OWNER_ERR_CH1_M  (BIT(23))
-#define RMT_MEM_OWNER_ERR_CH1_V  0x1
-#define RMT_MEM_OWNER_ERR_CH1_S  23
-/* RMT_STATE_CH1 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
-/*description: */
-#define RMT_STATE_CH1  0x00000007
-#define RMT_STATE_CH1_M  ((RMT_STATE_CH1_V)<<(RMT_STATE_CH1_S))
-#define RMT_STATE_CH1_V  0x7
-#define RMT_STATE_CH1_S  20
-/* RMT_MEM_RADDR_EX_CH1 : RO ;bitpos:[18:10] ;default: 9'b0 ; */
-/*description: */
-#define RMT_MEM_RADDR_EX_CH1  0x000001FF
-#define RMT_MEM_RADDR_EX_CH1_M  ((RMT_MEM_RADDR_EX_CH1_V)<<(RMT_MEM_RADDR_EX_CH1_S))
-#define RMT_MEM_RADDR_EX_CH1_V  0x1FF
-#define RMT_MEM_RADDR_EX_CH1_S  10
-/* RMT_MEM_WADDR_EX_CH1 : RO ;bitpos:[8:0] ;default: 9'b0 ; */
-/*description: */
-#define RMT_MEM_WADDR_EX_CH1  0x000001FF
-#define RMT_MEM_WADDR_EX_CH1_M  ((RMT_MEM_WADDR_EX_CH1_V)<<(RMT_MEM_WADDR_EX_CH1_S))
-#define RMT_MEM_WADDR_EX_CH1_V  0x1FF
-#define RMT_MEM_WADDR_EX_CH1_S  0
+/** RMT_CH1STATUS_REG register
+ *  Channel 1 status register
+ */
+#define RMT_CH1STATUS_REG (DR_REG_RMT_BASE + 0x34)
+/** RMT_MEM_WADDR_EX_CH0 : RO; bitpos: [8:0]; default: 0;
+ *  This field records the memory address offset when receiver of channel 1 is using
+ *  the RAM.
+ */
+#define RMT_MEM_WADDR_EX_CH0    0x000001FFU
+#define RMT_MEM_WADDR_EX_CH0_M  (RMT_MEM_WADDR_EX_CH0_V << RMT_MEM_WADDR_EX_CH0_S)
+#define RMT_MEM_WADDR_EX_CH0_V  0x000001FFU
+#define RMT_MEM_WADDR_EX_CH0_S  0
+/** RMT_MEM_RADDR_EX_CH0 : RO; bitpos: [18:10]; default: 0;
+ *  This field records the memory address offset when transmitter of channel 1 is using
+ *  the RAM.
+ */
+#define RMT_MEM_RADDR_EX_CH0    0x000001FFU
+#define RMT_MEM_RADDR_EX_CH0_M  (RMT_MEM_RADDR_EX_CH0_V << RMT_MEM_RADDR_EX_CH0_S)
+#define RMT_MEM_RADDR_EX_CH0_V  0x000001FFU
+#define RMT_MEM_RADDR_EX_CH0_S  10
+/** RMT_STATE_CH0 : RO; bitpos: [22:20]; default: 0;
+ *  This field records the FSM status of channel 1.
+ */
+#define RMT_STATE_CH0    0x00000007U
+#define RMT_STATE_CH0_M  (RMT_STATE_CH0_V << RMT_STATE_CH0_S)
+#define RMT_STATE_CH0_V  0x00000007U
+#define RMT_STATE_CH0_S  20
+/** RMT_MEM_OWNER_ERR_CH0 : RO; bitpos: [23]; default: 0;
+ *  This status bit will be set when the ownership of memory block is violated.
+ */
+#define RMT_MEM_OWNER_ERR_CH0    (BIT(23))
+#define RMT_MEM_OWNER_ERR_CH0_M  (RMT_MEM_OWNER_ERR_CH0_V << RMT_MEM_OWNER_ERR_CH0_S)
+#define RMT_MEM_OWNER_ERR_CH0_V  0x00000001U
+#define RMT_MEM_OWNER_ERR_CH0_S  23
+/** RMT_MEM_FULL_CH0 : RO; bitpos: [24]; default: 0;
+ *  This status bit will be set if the receiver receives more data than the memory
+ *  allows.
+ */
+#define RMT_MEM_FULL_CH0    (BIT(24))
+#define RMT_MEM_FULL_CH0_M  (RMT_MEM_FULL_CH0_V << RMT_MEM_FULL_CH0_S)
+#define RMT_MEM_FULL_CH0_V  0x00000001U
+#define RMT_MEM_FULL_CH0_S  24
+/** RMT_MEM_EMPTY_CH0 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the data to be sent is more than memory allows and
+ *  the wrap mode is disabled.
+ */
+#define RMT_MEM_EMPTY_CH0    (BIT(25))
+#define RMT_MEM_EMPTY_CH0_M  (RMT_MEM_EMPTY_CH0_V << RMT_MEM_EMPTY_CH0_S)
+#define RMT_MEM_EMPTY_CH0_V  0x00000001U
+#define RMT_MEM_EMPTY_CH0_S  25
+/** RMT_APB_MEM_WR_ERR_CH0 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when writes
+ *  RAM via APB bus.
+ */
+#define RMT_APB_MEM_WR_ERR_CH0    (BIT(26))
+#define RMT_APB_MEM_WR_ERR_CH0_M  (RMT_APB_MEM_WR_ERR_CH0_V << RMT_APB_MEM_WR_ERR_CH0_S)
+#define RMT_APB_MEM_WR_ERR_CH0_V  0x00000001U
+#define RMT_APB_MEM_WR_ERR_CH0_S  26
+/** RMT_APB_MEM_RD_ERR_CH0 : RO; bitpos: [27]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when reads RAM
+ *  via APB bus.
+ */
+#define RMT_APB_MEM_RD_ERR_CH0    (BIT(27))
+#define RMT_APB_MEM_RD_ERR_CH0_M  (RMT_APB_MEM_RD_ERR_CH0_V << RMT_APB_MEM_RD_ERR_CH0_S)
+#define RMT_APB_MEM_RD_ERR_CH0_V  0x00000001U
+#define RMT_APB_MEM_RD_ERR_CH0_S  27
 
-#define RMT_CH2STATUS_REG          (DR_REG_RMT_BASE + 0x0038)
-/* RMT_APB_MEM_RD_ERR_CH2 : RO ;bitpos:[27] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RD_ERR_CH2  (BIT(27))
-#define RMT_APB_MEM_RD_ERR_CH2_M  (BIT(27))
-#define RMT_APB_MEM_RD_ERR_CH2_V  0x1
-#define RMT_APB_MEM_RD_ERR_CH2_S  27
-/* RMT_APB_MEM_WR_ERR_CH2 : RO ;bitpos:[26] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_WR_ERR_CH2  (BIT(26))
-#define RMT_APB_MEM_WR_ERR_CH2_M  (BIT(26))
-#define RMT_APB_MEM_WR_ERR_CH2_V  0x1
-#define RMT_APB_MEM_WR_ERR_CH2_S  26
-/* RMT_MEM_EMPTY_CH2 : RO ;bitpos:[25] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_EMPTY_CH2  (BIT(25))
-#define RMT_MEM_EMPTY_CH2_M  (BIT(25))
-#define RMT_MEM_EMPTY_CH2_V  0x1
-#define RMT_MEM_EMPTY_CH2_S  25
-/* RMT_MEM_FULL_CH2 : RO ;bitpos:[24] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_FULL_CH2  (BIT(24))
-#define RMT_MEM_FULL_CH2_M  (BIT(24))
-#define RMT_MEM_FULL_CH2_V  0x1
-#define RMT_MEM_FULL_CH2_S  24
-/* RMT_MEM_OWNER_ERR_CH2 : RO ;bitpos:[23] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_OWNER_ERR_CH2  (BIT(23))
-#define RMT_MEM_OWNER_ERR_CH2_M  (BIT(23))
-#define RMT_MEM_OWNER_ERR_CH2_V  0x1
-#define RMT_MEM_OWNER_ERR_CH2_S  23
-/* RMT_STATE_CH2 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
-/*description: */
-#define RMT_STATE_CH2  0x00000007
-#define RMT_STATE_CH2_M  ((RMT_STATE_CH2_V)<<(RMT_STATE_CH2_S))
-#define RMT_STATE_CH2_V  0x7
-#define RMT_STATE_CH2_S  20
-/* RMT_MEM_RADDR_EX_CH2 : RO ;bitpos:[18:10] ;default: 9'b0 ; */
-/*description: */
-#define RMT_MEM_RADDR_EX_CH2  0x000001FF
-#define RMT_MEM_RADDR_EX_CH2_M  ((RMT_MEM_RADDR_EX_CH2_V)<<(RMT_MEM_RADDR_EX_CH2_S))
-#define RMT_MEM_RADDR_EX_CH2_V  0x1FF
-#define RMT_MEM_RADDR_EX_CH2_S  10
-/* RMT_MEM_WADDR_EX_CH2 : RO ;bitpos:[8:0] ;default: 9'b0 ; */
-/*description: */
-#define RMT_MEM_WADDR_EX_CH2  0x000001FF
-#define RMT_MEM_WADDR_EX_CH2_M  ((RMT_MEM_WADDR_EX_CH2_V)<<(RMT_MEM_WADDR_EX_CH2_S))
-#define RMT_MEM_WADDR_EX_CH2_V  0x1FF
-#define RMT_MEM_WADDR_EX_CH2_S  0
+/** RMT_CH2STATUS_REG register
+ *  Channel 2 status register
+ */
+#define RMT_CH2STATUS_REG (DR_REG_RMT_BASE + 0x38)
+/** RMT_MEM_WADDR_EX_CH0 : RO; bitpos: [8:0]; default: 0;
+ *  This field records the memory address offset when receiver of channel 2 is using
+ *  the RAM.
+ */
+#define RMT_MEM_WADDR_EX_CH0    0x000001FFU
+#define RMT_MEM_WADDR_EX_CH0_M  (RMT_MEM_WADDR_EX_CH0_V << RMT_MEM_WADDR_EX_CH0_S)
+#define RMT_MEM_WADDR_EX_CH0_V  0x000001FFU
+#define RMT_MEM_WADDR_EX_CH0_S  0
+/** RMT_MEM_RADDR_EX_CH0 : RO; bitpos: [18:10]; default: 0;
+ *  This field records the memory address offset when transmitter of channel 2 is using
+ *  the RAM.
+ */
+#define RMT_MEM_RADDR_EX_CH0    0x000001FFU
+#define RMT_MEM_RADDR_EX_CH0_M  (RMT_MEM_RADDR_EX_CH0_V << RMT_MEM_RADDR_EX_CH0_S)
+#define RMT_MEM_RADDR_EX_CH0_V  0x000001FFU
+#define RMT_MEM_RADDR_EX_CH0_S  10
+/** RMT_STATE_CH0 : RO; bitpos: [22:20]; default: 0;
+ *  This field records the FSM status of channel 2.
+ */
+#define RMT_STATE_CH0    0x00000007U
+#define RMT_STATE_CH0_M  (RMT_STATE_CH0_V << RMT_STATE_CH0_S)
+#define RMT_STATE_CH0_V  0x00000007U
+#define RMT_STATE_CH0_S  20
+/** RMT_MEM_OWNER_ERR_CH0 : RO; bitpos: [23]; default: 0;
+ *  This status bit will be set when the ownership of memory block is violated.
+ */
+#define RMT_MEM_OWNER_ERR_CH0    (BIT(23))
+#define RMT_MEM_OWNER_ERR_CH0_M  (RMT_MEM_OWNER_ERR_CH0_V << RMT_MEM_OWNER_ERR_CH0_S)
+#define RMT_MEM_OWNER_ERR_CH0_V  0x00000001U
+#define RMT_MEM_OWNER_ERR_CH0_S  23
+/** RMT_MEM_FULL_CH0 : RO; bitpos: [24]; default: 0;
+ *  This status bit will be set if the receiver receives more data than the memory
+ *  allows.
+ */
+#define RMT_MEM_FULL_CH0    (BIT(24))
+#define RMT_MEM_FULL_CH0_M  (RMT_MEM_FULL_CH0_V << RMT_MEM_FULL_CH0_S)
+#define RMT_MEM_FULL_CH0_V  0x00000001U
+#define RMT_MEM_FULL_CH0_S  24
+/** RMT_MEM_EMPTY_CH0 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the data to be sent is more than memory allows and
+ *  the wrap mode is disabled.
+ */
+#define RMT_MEM_EMPTY_CH0    (BIT(25))
+#define RMT_MEM_EMPTY_CH0_M  (RMT_MEM_EMPTY_CH0_V << RMT_MEM_EMPTY_CH0_S)
+#define RMT_MEM_EMPTY_CH0_V  0x00000001U
+#define RMT_MEM_EMPTY_CH0_S  25
+/** RMT_APB_MEM_WR_ERR_CH0 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when writes
+ *  RAM via APB bus.
+ */
+#define RMT_APB_MEM_WR_ERR_CH0    (BIT(26))
+#define RMT_APB_MEM_WR_ERR_CH0_M  (RMT_APB_MEM_WR_ERR_CH0_V << RMT_APB_MEM_WR_ERR_CH0_S)
+#define RMT_APB_MEM_WR_ERR_CH0_V  0x00000001U
+#define RMT_APB_MEM_WR_ERR_CH0_S  26
+/** RMT_APB_MEM_RD_ERR_CH0 : RO; bitpos: [27]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when reads RAM
+ *  via APB bus.
+ */
+#define RMT_APB_MEM_RD_ERR_CH0    (BIT(27))
+#define RMT_APB_MEM_RD_ERR_CH0_M  (RMT_APB_MEM_RD_ERR_CH0_V << RMT_APB_MEM_RD_ERR_CH0_S)
+#define RMT_APB_MEM_RD_ERR_CH0_V  0x00000001U
+#define RMT_APB_MEM_RD_ERR_CH0_S  27
 
-#define RMT_CH3STATUS_REG          (DR_REG_RMT_BASE + 0x003c)
-/* RMT_APB_MEM_RD_ERR_CH3 : RO ;bitpos:[27] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RD_ERR_CH3  (BIT(27))
-#define RMT_APB_MEM_RD_ERR_CH3_M  (BIT(27))
-#define RMT_APB_MEM_RD_ERR_CH3_V  0x1
-#define RMT_APB_MEM_RD_ERR_CH3_S  27
-/* RMT_APB_MEM_WR_ERR_CH3 : RO ;bitpos:[26] ;default: 1'b0 ; */
-/*description: */
-#define RMT_APB_MEM_WR_ERR_CH3  (BIT(26))
-#define RMT_APB_MEM_WR_ERR_CH3_M  (BIT(26))
-#define RMT_APB_MEM_WR_ERR_CH3_V  0x1
-#define RMT_APB_MEM_WR_ERR_CH3_S  26
-/* RMT_MEM_EMPTY_CH3 : RO ;bitpos:[25] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_EMPTY_CH3  (BIT(25))
-#define RMT_MEM_EMPTY_CH3_M  (BIT(25))
-#define RMT_MEM_EMPTY_CH3_V  0x1
-#define RMT_MEM_EMPTY_CH3_S  25
-/* RMT_MEM_FULL_CH3 : RO ;bitpos:[24] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_FULL_CH3  (BIT(24))
-#define RMT_MEM_FULL_CH3_M  (BIT(24))
-#define RMT_MEM_FULL_CH3_V  0x1
-#define RMT_MEM_FULL_CH3_S  24
-/* RMT_MEM_OWNER_ERR_CH3 : RO ;bitpos:[23] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_OWNER_ERR_CH3  (BIT(23))
-#define RMT_MEM_OWNER_ERR_CH3_M  (BIT(23))
-#define RMT_MEM_OWNER_ERR_CH3_V  0x1
-#define RMT_MEM_OWNER_ERR_CH3_S  23
-/* RMT_STATE_CH3 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
-/*description: */
-#define RMT_STATE_CH3  0x00000007
-#define RMT_STATE_CH3_M  ((RMT_STATE_CH3_V)<<(RMT_STATE_CH3_S))
-#define RMT_STATE_CH3_V  0x7
-#define RMT_STATE_CH3_S  20
-/* RMT_MEM_RADDR_EX_CH3 : RO ;bitpos:[18:10] ;default: 9'b0 ; */
-/*description: */
-#define RMT_MEM_RADDR_EX_CH3  0x000001FF
-#define RMT_MEM_RADDR_EX_CH3_M  ((RMT_MEM_RADDR_EX_CH3_V)<<(RMT_MEM_RADDR_EX_CH3_S))
-#define RMT_MEM_RADDR_EX_CH3_V  0x1FF
-#define RMT_MEM_RADDR_EX_CH3_S  10
-/* RMT_MEM_WADDR_EX_CH3 : RO ;bitpos:[8:0] ;default: 9'b0 ; */
-/*description: */
-#define RMT_MEM_WADDR_EX_CH3  0x000001FF
-#define RMT_MEM_WADDR_EX_CH3_M  ((RMT_MEM_WADDR_EX_CH3_V)<<(RMT_MEM_WADDR_EX_CH3_S))
-#define RMT_MEM_WADDR_EX_CH3_V  0x1FF
-#define RMT_MEM_WADDR_EX_CH3_S  0
+/** RMT_CH3STATUS_REG register
+ *  Channel 3 status register
+ */
+#define RMT_CH3STATUS_REG (DR_REG_RMT_BASE + 0x3c)
+/** RMT_MEM_WADDR_EX_CH0 : RO; bitpos: [8:0]; default: 0;
+ *  This field records the memory address offset when receiver of channel 3 is using
+ *  the RAM.
+ */
+#define RMT_MEM_WADDR_EX_CH0    0x000001FFU
+#define RMT_MEM_WADDR_EX_CH0_M  (RMT_MEM_WADDR_EX_CH0_V << RMT_MEM_WADDR_EX_CH0_S)
+#define RMT_MEM_WADDR_EX_CH0_V  0x000001FFU
+#define RMT_MEM_WADDR_EX_CH0_S  0
+/** RMT_MEM_RADDR_EX_CH0 : RO; bitpos: [18:10]; default: 0;
+ *  This field records the memory address offset when transmitter of channel 3 is using
+ *  the RAM.
+ */
+#define RMT_MEM_RADDR_EX_CH0    0x000001FFU
+#define RMT_MEM_RADDR_EX_CH0_M  (RMT_MEM_RADDR_EX_CH0_V << RMT_MEM_RADDR_EX_CH0_S)
+#define RMT_MEM_RADDR_EX_CH0_V  0x000001FFU
+#define RMT_MEM_RADDR_EX_CH0_S  10
+/** RMT_STATE_CH0 : RO; bitpos: [22:20]; default: 0;
+ *  This field records the FSM status of channel 3.
+ */
+#define RMT_STATE_CH0    0x00000007U
+#define RMT_STATE_CH0_M  (RMT_STATE_CH0_V << RMT_STATE_CH0_S)
+#define RMT_STATE_CH0_V  0x00000007U
+#define RMT_STATE_CH0_S  20
+/** RMT_MEM_OWNER_ERR_CH0 : RO; bitpos: [23]; default: 0;
+ *  This status bit will be set when the ownership of memory block is violated.
+ */
+#define RMT_MEM_OWNER_ERR_CH0    (BIT(23))
+#define RMT_MEM_OWNER_ERR_CH0_M  (RMT_MEM_OWNER_ERR_CH0_V << RMT_MEM_OWNER_ERR_CH0_S)
+#define RMT_MEM_OWNER_ERR_CH0_V  0x00000001U
+#define RMT_MEM_OWNER_ERR_CH0_S  23
+/** RMT_MEM_FULL_CH0 : RO; bitpos: [24]; default: 0;
+ *  This status bit will be set if the receiver receives more data than the memory
+ *  allows.
+ */
+#define RMT_MEM_FULL_CH0    (BIT(24))
+#define RMT_MEM_FULL_CH0_M  (RMT_MEM_FULL_CH0_V << RMT_MEM_FULL_CH0_S)
+#define RMT_MEM_FULL_CH0_V  0x00000001U
+#define RMT_MEM_FULL_CH0_S  24
+/** RMT_MEM_EMPTY_CH0 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the data to be sent is more than memory allows and
+ *  the wrap mode is disabled.
+ */
+#define RMT_MEM_EMPTY_CH0    (BIT(25))
+#define RMT_MEM_EMPTY_CH0_M  (RMT_MEM_EMPTY_CH0_V << RMT_MEM_EMPTY_CH0_S)
+#define RMT_MEM_EMPTY_CH0_V  0x00000001U
+#define RMT_MEM_EMPTY_CH0_S  25
+/** RMT_APB_MEM_WR_ERR_CH0 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when writes
+ *  RAM via APB bus.
+ */
+#define RMT_APB_MEM_WR_ERR_CH0    (BIT(26))
+#define RMT_APB_MEM_WR_ERR_CH0_M  (RMT_APB_MEM_WR_ERR_CH0_V << RMT_APB_MEM_WR_ERR_CH0_S)
+#define RMT_APB_MEM_WR_ERR_CH0_V  0x00000001U
+#define RMT_APB_MEM_WR_ERR_CH0_S  26
+/** RMT_APB_MEM_RD_ERR_CH0 : RO; bitpos: [27]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when reads RAM
+ *  via APB bus.
+ */
+#define RMT_APB_MEM_RD_ERR_CH0    (BIT(27))
+#define RMT_APB_MEM_RD_ERR_CH0_M  (RMT_APB_MEM_RD_ERR_CH0_V << RMT_APB_MEM_RD_ERR_CH0_S)
+#define RMT_APB_MEM_RD_ERR_CH0_V  0x00000001U
+#define RMT_APB_MEM_RD_ERR_CH0_S  27
 
-#define RMT_CH0ADDR_REG          (DR_REG_RMT_BASE + 0x0040)
-/* RMT_APB_MEM_RADDR_CH0 : RO ;bitpos:[18:10] ;default: 9'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RADDR_CH0  0x000001FF
-#define RMT_APB_MEM_RADDR_CH0_M  ((RMT_APB_MEM_RADDR_CH0_V)<<(RMT_APB_MEM_RADDR_CH0_S))
-#define RMT_APB_MEM_RADDR_CH0_V  0x1FF
-#define RMT_APB_MEM_RADDR_CH0_S  10
-/* RMT_APB_MEM_WADDR_CH0 : RO ;bitpos:[8:0] ;default: 9'b0 ; */
-/*description: */
-#define RMT_APB_MEM_WADDR_CH0  0x000001FF
-#define RMT_APB_MEM_WADDR_CH0_M  ((RMT_APB_MEM_WADDR_CH0_V)<<(RMT_APB_MEM_WADDR_CH0_S))
-#define RMT_APB_MEM_WADDR_CH0_V  0x1FF
+/** RMT_CH0ADDR_REG register
+ *  Channel 0 address register
+ */
+#define RMT_CH0ADDR_REG (DR_REG_RMT_BASE + 0x40)
+/** RMT_APB_MEM_WADDR_CH0 : RO; bitpos: [8:0]; default: 0;
+ *  This field records the memory address offset when channel 0 writes RAM via APB bus.
+ */
+#define RMT_APB_MEM_WADDR_CH0    0x000001FFU
+#define RMT_APB_MEM_WADDR_CH0_M  (RMT_APB_MEM_WADDR_CH0_V << RMT_APB_MEM_WADDR_CH0_S)
+#define RMT_APB_MEM_WADDR_CH0_V  0x000001FFU
 #define RMT_APB_MEM_WADDR_CH0_S  0
+/** RMT_APB_MEM_RADDR_CH0 : RO; bitpos: [18:10]; default: 0;
+ *  This field records the memory address offset when channel 0 reads RAM via APB bus.
+ */
+#define RMT_APB_MEM_RADDR_CH0    0x000001FFU
+#define RMT_APB_MEM_RADDR_CH0_M  (RMT_APB_MEM_RADDR_CH0_V << RMT_APB_MEM_RADDR_CH0_S)
+#define RMT_APB_MEM_RADDR_CH0_V  0x000001FFU
+#define RMT_APB_MEM_RADDR_CH0_S  10
 
-#define RMT_CH1ADDR_REG          (DR_REG_RMT_BASE + 0x0044)
-/* RMT_APB_MEM_RADDR_CH1 : RO ;bitpos:[18:10] ;default: 9'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RADDR_CH1  0x000001FF
-#define RMT_APB_MEM_RADDR_CH1_M  ((RMT_APB_MEM_RADDR_CH1_V)<<(RMT_APB_MEM_RADDR_CH1_S))
-#define RMT_APB_MEM_RADDR_CH1_V  0x1FF
-#define RMT_APB_MEM_RADDR_CH1_S  10
-/* RMT_APB_MEM_WADDR_CH1 : RO ;bitpos:[8:0] ;default: 9'b0 ; */
-/*description: */
-#define RMT_APB_MEM_WADDR_CH1  0x000001FF
-#define RMT_APB_MEM_WADDR_CH1_M  ((RMT_APB_MEM_WADDR_CH1_V)<<(RMT_APB_MEM_WADDR_CH1_S))
-#define RMT_APB_MEM_WADDR_CH1_V  0x1FF
-#define RMT_APB_MEM_WADDR_CH1_S  0
+/** RMT_CH1ADDR_REG register
+ *  Channel 1 address register
+ */
+#define RMT_CH1ADDR_REG (DR_REG_RMT_BASE + 0x44)
+/** RMT_APB_MEM_WADDR_CH0 : RO; bitpos: [8:0]; default: 0;
+ *  This field records the memory address offset when channel 1 writes RAM via APB bus.
+ */
+#define RMT_APB_MEM_WADDR_CH0    0x000001FFU
+#define RMT_APB_MEM_WADDR_CH0_M  (RMT_APB_MEM_WADDR_CH0_V << RMT_APB_MEM_WADDR_CH0_S)
+#define RMT_APB_MEM_WADDR_CH0_V  0x000001FFU
+#define RMT_APB_MEM_WADDR_CH0_S  0
+/** RMT_APB_MEM_RADDR_CH0 : RO; bitpos: [18:10]; default: 0;
+ *  This field records the memory address offset when channel 1 reads RAM via APB bus.
+ */
+#define RMT_APB_MEM_RADDR_CH0    0x000001FFU
+#define RMT_APB_MEM_RADDR_CH0_M  (RMT_APB_MEM_RADDR_CH0_V << RMT_APB_MEM_RADDR_CH0_S)
+#define RMT_APB_MEM_RADDR_CH0_V  0x000001FFU
+#define RMT_APB_MEM_RADDR_CH0_S  10
 
-#define RMT_CH2ADDR_REG          (DR_REG_RMT_BASE + 0x0048)
-/* RMT_APB_MEM_RADDR_CH2 : RO ;bitpos:[18:10] ;default: 9'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RADDR_CH2  0x000001FF
-#define RMT_APB_MEM_RADDR_CH2_M  ((RMT_APB_MEM_RADDR_CH2_V)<<(RMT_APB_MEM_RADDR_CH2_S))
-#define RMT_APB_MEM_RADDR_CH2_V  0x1FF
-#define RMT_APB_MEM_RADDR_CH2_S  10
-/* RMT_APB_MEM_WADDR_CH2 : RO ;bitpos:[8:0] ;default: 9'b0 ; */
-/*description: */
-#define RMT_APB_MEM_WADDR_CH2  0x000001FF
-#define RMT_APB_MEM_WADDR_CH2_M  ((RMT_APB_MEM_WADDR_CH2_V)<<(RMT_APB_MEM_WADDR_CH2_S))
-#define RMT_APB_MEM_WADDR_CH2_V  0x1FF
-#define RMT_APB_MEM_WADDR_CH2_S  0
+/** RMT_CH2ADDR_REG register
+ *  Channel 2 address register
+ */
+#define RMT_CH2ADDR_REG (DR_REG_RMT_BASE + 0x48)
+/** RMT_APB_MEM_WADDR_CH0 : RO; bitpos: [8:0]; default: 0;
+ *  This field records the memory address offset when channel 2 writes RAM via APB bus.
+ */
+#define RMT_APB_MEM_WADDR_CH0    0x000001FFU
+#define RMT_APB_MEM_WADDR_CH0_M  (RMT_APB_MEM_WADDR_CH0_V << RMT_APB_MEM_WADDR_CH0_S)
+#define RMT_APB_MEM_WADDR_CH0_V  0x000001FFU
+#define RMT_APB_MEM_WADDR_CH0_S  0
+/** RMT_APB_MEM_RADDR_CH0 : RO; bitpos: [18:10]; default: 0;
+ *  This field records the memory address offset when channel 2 reads RAM via APB bus.
+ */
+#define RMT_APB_MEM_RADDR_CH0    0x000001FFU
+#define RMT_APB_MEM_RADDR_CH0_M  (RMT_APB_MEM_RADDR_CH0_V << RMT_APB_MEM_RADDR_CH0_S)
+#define RMT_APB_MEM_RADDR_CH0_V  0x000001FFU
+#define RMT_APB_MEM_RADDR_CH0_S  10
 
-#define RMT_CH3ADDR_REG          (DR_REG_RMT_BASE + 0x004c)
-/* RMT_APB_MEM_RADDR_CH3 : RO ;bitpos:[18:10] ;default: 9'b0 ; */
-/*description: */
-#define RMT_APB_MEM_RADDR_CH3  0x000001FF
-#define RMT_APB_MEM_RADDR_CH3_M  ((RMT_APB_MEM_RADDR_CH3_V)<<(RMT_APB_MEM_RADDR_CH3_S))
-#define RMT_APB_MEM_RADDR_CH3_V  0x1FF
-#define RMT_APB_MEM_RADDR_CH3_S  10
-/* RMT_APB_MEM_WADDR_CH3 : RO ;bitpos:[8:0] ;default: 9'b0 ; */
-/*description: */
-#define RMT_APB_MEM_WADDR_CH3  0x000001FF
-#define RMT_APB_MEM_WADDR_CH3_M  ((RMT_APB_MEM_WADDR_CH3_V)<<(RMT_APB_MEM_WADDR_CH3_S))
-#define RMT_APB_MEM_WADDR_CH3_V  0x1FF
-#define RMT_APB_MEM_WADDR_CH3_S  0
+/** RMT_CH3ADDR_REG register
+ *  Channel 3 address register
+ */
+#define RMT_CH3ADDR_REG (DR_REG_RMT_BASE + 0x4c)
+/** RMT_APB_MEM_WADDR_CH0 : RO; bitpos: [8:0]; default: 0;
+ *  This field records the memory address offset when channel 3 writes RAM via APB bus.
+ */
+#define RMT_APB_MEM_WADDR_CH0    0x000001FFU
+#define RMT_APB_MEM_WADDR_CH0_M  (RMT_APB_MEM_WADDR_CH0_V << RMT_APB_MEM_WADDR_CH0_S)
+#define RMT_APB_MEM_WADDR_CH0_V  0x000001FFU
+#define RMT_APB_MEM_WADDR_CH0_S  0
+/** RMT_APB_MEM_RADDR_CH0 : RO; bitpos: [18:10]; default: 0;
+ *  This field records the memory address offset when channel 3 reads RAM via APB bus.
+ */
+#define RMT_APB_MEM_RADDR_CH0    0x000001FFU
+#define RMT_APB_MEM_RADDR_CH0_M  (RMT_APB_MEM_RADDR_CH0_V << RMT_APB_MEM_RADDR_CH0_S)
+#define RMT_APB_MEM_RADDR_CH0_V  0x000001FFU
+#define RMT_APB_MEM_RADDR_CH0_S  10
 
-#define RMT_INT_RAW_REG          (DR_REG_RMT_BASE + 0x0050)
-/* RMT_CH3_RX_THR_EVENT_INT_RAW : RO ;bitpos:[23] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_RX_THR_EVENT_INT_RAW  (BIT(23))
-#define RMT_CH3_RX_THR_EVENT_INT_RAW_M  (BIT(23))
-#define RMT_CH3_RX_THR_EVENT_INT_RAW_V  0x1
-#define RMT_CH3_RX_THR_EVENT_INT_RAW_S  23
-/* RMT_CH2_RX_THR_EVENT_INT_RAW : RO ;bitpos:[22] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_RX_THR_EVENT_INT_RAW  (BIT(22))
-#define RMT_CH2_RX_THR_EVENT_INT_RAW_M  (BIT(22))
-#define RMT_CH2_RX_THR_EVENT_INT_RAW_V  0x1
-#define RMT_CH2_RX_THR_EVENT_INT_RAW_S  22
-/* RMT_CH1_RX_THR_EVENT_INT_RAW : RO ;bitpos:[21] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_RX_THR_EVENT_INT_RAW  (BIT(21))
-#define RMT_CH1_RX_THR_EVENT_INT_RAW_M  (BIT(21))
-#define RMT_CH1_RX_THR_EVENT_INT_RAW_V  0x1
-#define RMT_CH1_RX_THR_EVENT_INT_RAW_S  21
-/* RMT_CH0_RX_THR_EVENT_INT_RAW : RO ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_RX_THR_EVENT_INT_RAW  (BIT(20))
-#define RMT_CH0_RX_THR_EVENT_INT_RAW_M  (BIT(20))
-#define RMT_CH0_RX_THR_EVENT_INT_RAW_V  0x1
-#define RMT_CH0_RX_THR_EVENT_INT_RAW_S  20
-/* RMT_CH3_TX_LOOP_INT_RAW : RO ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_LOOP_INT_RAW  (BIT(19))
-#define RMT_CH3_TX_LOOP_INT_RAW_M  (BIT(19))
-#define RMT_CH3_TX_LOOP_INT_RAW_V  0x1
-#define RMT_CH3_TX_LOOP_INT_RAW_S  19
-/* RMT_CH2_TX_LOOP_INT_RAW : RO ;bitpos:[18] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_LOOP_INT_RAW  (BIT(18))
-#define RMT_CH2_TX_LOOP_INT_RAW_M  (BIT(18))
-#define RMT_CH2_TX_LOOP_INT_RAW_V  0x1
-#define RMT_CH2_TX_LOOP_INT_RAW_S  18
-/* RMT_CH1_TX_LOOP_INT_RAW : RO ;bitpos:[17] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_LOOP_INT_RAW  (BIT(17))
-#define RMT_CH1_TX_LOOP_INT_RAW_M  (BIT(17))
-#define RMT_CH1_TX_LOOP_INT_RAW_V  0x1
-#define RMT_CH1_TX_LOOP_INT_RAW_S  17
-/* RMT_CH0_TX_LOOP_INT_RAW : RO ;bitpos:[16] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_LOOP_INT_RAW  (BIT(16))
-#define RMT_CH0_TX_LOOP_INT_RAW_M  (BIT(16))
-#define RMT_CH0_TX_LOOP_INT_RAW_V  0x1
-#define RMT_CH0_TX_LOOP_INT_RAW_S  16
-/* RMT_CH3_TX_THR_EVENT_INT_RAW : RO ;bitpos:[15] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_THR_EVENT_INT_RAW  (BIT(15))
-#define RMT_CH3_TX_THR_EVENT_INT_RAW_M  (BIT(15))
-#define RMT_CH3_TX_THR_EVENT_INT_RAW_V  0x1
-#define RMT_CH3_TX_THR_EVENT_INT_RAW_S  15
-/* RMT_CH2_TX_THR_EVENT_INT_RAW : RO ;bitpos:[14] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_THR_EVENT_INT_RAW  (BIT(14))
-#define RMT_CH2_TX_THR_EVENT_INT_RAW_M  (BIT(14))
-#define RMT_CH2_TX_THR_EVENT_INT_RAW_V  0x1
-#define RMT_CH2_TX_THR_EVENT_INT_RAW_S  14
-/* RMT_CH1_TX_THR_EVENT_INT_RAW : RO ;bitpos:[13] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_THR_EVENT_INT_RAW  (BIT(13))
-#define RMT_CH1_TX_THR_EVENT_INT_RAW_M  (BIT(13))
-#define RMT_CH1_TX_THR_EVENT_INT_RAW_V  0x1
-#define RMT_CH1_TX_THR_EVENT_INT_RAW_S  13
-/* RMT_CH0_TX_THR_EVENT_INT_RAW : RO ;bitpos:[12] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_THR_EVENT_INT_RAW  (BIT(12))
-#define RMT_CH0_TX_THR_EVENT_INT_RAW_M  (BIT(12))
-#define RMT_CH0_TX_THR_EVENT_INT_RAW_V  0x1
-#define RMT_CH0_TX_THR_EVENT_INT_RAW_S  12
-/* RMT_CH3_ERR_INT_RAW : RO ;bitpos:[11] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_ERR_INT_RAW  (BIT(11))
-#define RMT_CH3_ERR_INT_RAW_M  (BIT(11))
-#define RMT_CH3_ERR_INT_RAW_V  0x1
-#define RMT_CH3_ERR_INT_RAW_S  11
-/* RMT_CH3_RX_END_INT_RAW : RO ;bitpos:[10] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_RX_END_INT_RAW  (BIT(10))
-#define RMT_CH3_RX_END_INT_RAW_M  (BIT(10))
-#define RMT_CH3_RX_END_INT_RAW_V  0x1
-#define RMT_CH3_RX_END_INT_RAW_S  10
-/* RMT_CH3_TX_END_INT_RAW : RO ;bitpos:[9] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_END_INT_RAW  (BIT(9))
-#define RMT_CH3_TX_END_INT_RAW_M  (BIT(9))
-#define RMT_CH3_TX_END_INT_RAW_V  0x1
-#define RMT_CH3_TX_END_INT_RAW_S  9
-/* RMT_CH2_ERR_INT_RAW : RO ;bitpos:[8] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_ERR_INT_RAW  (BIT(8))
-#define RMT_CH2_ERR_INT_RAW_M  (BIT(8))
-#define RMT_CH2_ERR_INT_RAW_V  0x1
-#define RMT_CH2_ERR_INT_RAW_S  8
-/* RMT_CH2_RX_END_INT_RAW : RO ;bitpos:[7] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_RX_END_INT_RAW  (BIT(7))
-#define RMT_CH2_RX_END_INT_RAW_M  (BIT(7))
-#define RMT_CH2_RX_END_INT_RAW_V  0x1
-#define RMT_CH2_RX_END_INT_RAW_S  7
-/* RMT_CH2_TX_END_INT_RAW : RO ;bitpos:[6] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_END_INT_RAW  (BIT(6))
-#define RMT_CH2_TX_END_INT_RAW_M  (BIT(6))
-#define RMT_CH2_TX_END_INT_RAW_V  0x1
-#define RMT_CH2_TX_END_INT_RAW_S  6
-/* RMT_CH1_ERR_INT_RAW : RO ;bitpos:[5] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_ERR_INT_RAW  (BIT(5))
-#define RMT_CH1_ERR_INT_RAW_M  (BIT(5))
-#define RMT_CH1_ERR_INT_RAW_V  0x1
-#define RMT_CH1_ERR_INT_RAW_S  5
-/* RMT_CH1_RX_END_INT_RAW : RO ;bitpos:[4] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_RX_END_INT_RAW  (BIT(4))
-#define RMT_CH1_RX_END_INT_RAW_M  (BIT(4))
-#define RMT_CH1_RX_END_INT_RAW_V  0x1
-#define RMT_CH1_RX_END_INT_RAW_S  4
-/* RMT_CH1_TX_END_INT_RAW : RO ;bitpos:[3] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_END_INT_RAW  (BIT(3))
-#define RMT_CH1_TX_END_INT_RAW_M  (BIT(3))
-#define RMT_CH1_TX_END_INT_RAW_V  0x1
-#define RMT_CH1_TX_END_INT_RAW_S  3
-/* RMT_CH0_ERR_INT_RAW : RO ;bitpos:[2] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_ERR_INT_RAW  (BIT(2))
-#define RMT_CH0_ERR_INT_RAW_M  (BIT(2))
-#define RMT_CH0_ERR_INT_RAW_V  0x1
-#define RMT_CH0_ERR_INT_RAW_S  2
-/* RMT_CH0_RX_END_INT_RAW : RO ;bitpos:[1] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_RX_END_INT_RAW  (BIT(1))
-#define RMT_CH0_RX_END_INT_RAW_M  (BIT(1))
-#define RMT_CH0_RX_END_INT_RAW_V  0x1
-#define RMT_CH0_RX_END_INT_RAW_S  1
-/* RMT_CH0_TX_END_INT_RAW : RO ;bitpos:[0] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_END_INT_RAW  (BIT(0))
-#define RMT_CH0_TX_END_INT_RAW_M  (BIT(0))
-#define RMT_CH0_TX_END_INT_RAW_V  0x1
+/** RMT_INT_RAW_REG register
+ *  Raw interrupt status register
+ */
+#define RMT_INT_RAW_REG (DR_REG_RMT_BASE + 0x50)
+/** RMT_CH0_TX_END_INT_RAW : RO; bitpos: [0]; default: 0;
+ *  The interrupt raw bit for channel 0. Triggered when transmitting ends.
+ */
+#define RMT_CH0_TX_END_INT_RAW    (BIT(0))
+#define RMT_CH0_TX_END_INT_RAW_M  (RMT_CH0_TX_END_INT_RAW_V << RMT_CH0_TX_END_INT_RAW_S)
+#define RMT_CH0_TX_END_INT_RAW_V  0x00000001U
 #define RMT_CH0_TX_END_INT_RAW_S  0
+/** RMT_CH0_RX_END_INT_RAW : RO; bitpos: [1]; default: 0;
+ *  The interrupt raw bit for channel 0. Triggered when receiving ends.
+ */
+#define RMT_CH0_RX_END_INT_RAW    (BIT(1))
+#define RMT_CH0_RX_END_INT_RAW_M  (RMT_CH0_RX_END_INT_RAW_V << RMT_CH0_RX_END_INT_RAW_S)
+#define RMT_CH0_RX_END_INT_RAW_V  0x00000001U
+#define RMT_CH0_RX_END_INT_RAW_S  1
+/** RMT_CH0_ERR_INT_RAW : RO; bitpos: [2]; default: 0;
+ *  The interrupt raw bit for channel 0. Triggered when error occurs.
+ */
+#define RMT_CH0_ERR_INT_RAW    (BIT(2))
+#define RMT_CH0_ERR_INT_RAW_M  (RMT_CH0_ERR_INT_RAW_V << RMT_CH0_ERR_INT_RAW_S)
+#define RMT_CH0_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH0_ERR_INT_RAW_S  2
+/** RMT_CH1_TX_END_INT_RAW : RO; bitpos: [3]; default: 0;
+ *  The interrupt raw bit for channel 1. Triggered when transmitting ends.
+ */
+#define RMT_CH1_TX_END_INT_RAW    (BIT(3))
+#define RMT_CH1_TX_END_INT_RAW_M  (RMT_CH1_TX_END_INT_RAW_V << RMT_CH1_TX_END_INT_RAW_S)
+#define RMT_CH1_TX_END_INT_RAW_V  0x00000001U
+#define RMT_CH1_TX_END_INT_RAW_S  3
+/** RMT_CH1_RX_END_INT_RAW : RO; bitpos: [4]; default: 0;
+ *  The interrupt raw bit for channel 1. Triggered when receiving ends.
+ */
+#define RMT_CH1_RX_END_INT_RAW    (BIT(4))
+#define RMT_CH1_RX_END_INT_RAW_M  (RMT_CH1_RX_END_INT_RAW_V << RMT_CH1_RX_END_INT_RAW_S)
+#define RMT_CH1_RX_END_INT_RAW_V  0x00000001U
+#define RMT_CH1_RX_END_INT_RAW_S  4
+/** RMT_CH1_ERR_INT_RAW : RO; bitpos: [5]; default: 0;
+ *  The interrupt raw bit for channel 1. Triggered when error occurs.
+ */
+#define RMT_CH1_ERR_INT_RAW    (BIT(5))
+#define RMT_CH1_ERR_INT_RAW_M  (RMT_CH1_ERR_INT_RAW_V << RMT_CH1_ERR_INT_RAW_S)
+#define RMT_CH1_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH1_ERR_INT_RAW_S  5
+/** RMT_CH2_TX_END_INT_RAW : RO; bitpos: [6]; default: 0;
+ *  The interrupt raw bit for channel 2. Triggered when transmitting ends.
+ */
+#define RMT_CH2_TX_END_INT_RAW    (BIT(6))
+#define RMT_CH2_TX_END_INT_RAW_M  (RMT_CH2_TX_END_INT_RAW_V << RMT_CH2_TX_END_INT_RAW_S)
+#define RMT_CH2_TX_END_INT_RAW_V  0x00000001U
+#define RMT_CH2_TX_END_INT_RAW_S  6
+/** RMT_CH2_RX_END_INT_RAW : RO; bitpos: [7]; default: 0;
+ *  The interrupt raw bit for channel 2. Triggered when receiving ends.
+ */
+#define RMT_CH2_RX_END_INT_RAW    (BIT(7))
+#define RMT_CH2_RX_END_INT_RAW_M  (RMT_CH2_RX_END_INT_RAW_V << RMT_CH2_RX_END_INT_RAW_S)
+#define RMT_CH2_RX_END_INT_RAW_V  0x00000001U
+#define RMT_CH2_RX_END_INT_RAW_S  7
+/** RMT_CH2_ERR_INT_RAW : RO; bitpos: [8]; default: 0;
+ *  The interrupt raw bit for channel 2. Triggered when error occurs.
+ */
+#define RMT_CH2_ERR_INT_RAW    (BIT(8))
+#define RMT_CH2_ERR_INT_RAW_M  (RMT_CH2_ERR_INT_RAW_V << RMT_CH2_ERR_INT_RAW_S)
+#define RMT_CH2_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH2_ERR_INT_RAW_S  8
+/** RMT_CH3_TX_END_INT_RAW : RO; bitpos: [9]; default: 0;
+ *  The interrupt raw bit for channel 3. Triggered when transmitting ends.
+ */
+#define RMT_CH3_TX_END_INT_RAW    (BIT(9))
+#define RMT_CH3_TX_END_INT_RAW_M  (RMT_CH3_TX_END_INT_RAW_V << RMT_CH3_TX_END_INT_RAW_S)
+#define RMT_CH3_TX_END_INT_RAW_V  0x00000001U
+#define RMT_CH3_TX_END_INT_RAW_S  9
+/** RMT_CH3_RX_END_INT_RAW : RO; bitpos: [10]; default: 0;
+ *  The interrupt raw bit for channel 3. Triggered when receiving ends.
+ */
+#define RMT_CH3_RX_END_INT_RAW    (BIT(10))
+#define RMT_CH3_RX_END_INT_RAW_M  (RMT_CH3_RX_END_INT_RAW_V << RMT_CH3_RX_END_INT_RAW_S)
+#define RMT_CH3_RX_END_INT_RAW_V  0x00000001U
+#define RMT_CH3_RX_END_INT_RAW_S  10
+/** RMT_CH3_ERR_INT_RAW : RO; bitpos: [11]; default: 0;
+ *  The interrupt raw bit for channel 3. Triggered when error occurs.
+ */
+#define RMT_CH3_ERR_INT_RAW    (BIT(11))
+#define RMT_CH3_ERR_INT_RAW_M  (RMT_CH3_ERR_INT_RAW_V << RMT_CH3_ERR_INT_RAW_S)
+#define RMT_CH3_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH3_ERR_INT_RAW_S  11
+/** RMT_CH0_TX_THR_EVENT_INT_RAW : RO; bitpos: [12]; default: 0;
+ *  The interrupt raw bit for channel 0. Triggered when transmitter sends more data
+ *  than configured value.
+ */
+#define RMT_CH0_TX_THR_EVENT_INT_RAW    (BIT(12))
+#define RMT_CH0_TX_THR_EVENT_INT_RAW_M  (RMT_CH0_TX_THR_EVENT_INT_RAW_V << RMT_CH0_TX_THR_EVENT_INT_RAW_S)
+#define RMT_CH0_TX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH0_TX_THR_EVENT_INT_RAW_S  12
+/** RMT_CH1_TX_THR_EVENT_INT_RAW : RO; bitpos: [13]; default: 0;
+ *  The interrupt raw bit for channel 1. Triggered when transmitter sends more data
+ *  than configured value.
+ */
+#define RMT_CH1_TX_THR_EVENT_INT_RAW    (BIT(13))
+#define RMT_CH1_TX_THR_EVENT_INT_RAW_M  (RMT_CH1_TX_THR_EVENT_INT_RAW_V << RMT_CH1_TX_THR_EVENT_INT_RAW_S)
+#define RMT_CH1_TX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH1_TX_THR_EVENT_INT_RAW_S  13
+/** RMT_CH2_TX_THR_EVENT_INT_RAW : RO; bitpos: [14]; default: 0;
+ *  The interrupt raw bit for channel 2. Triggered when transmitter sends more data
+ *  than configured value.
+ */
+#define RMT_CH2_TX_THR_EVENT_INT_RAW    (BIT(14))
+#define RMT_CH2_TX_THR_EVENT_INT_RAW_M  (RMT_CH2_TX_THR_EVENT_INT_RAW_V << RMT_CH2_TX_THR_EVENT_INT_RAW_S)
+#define RMT_CH2_TX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH2_TX_THR_EVENT_INT_RAW_S  14
+/** RMT_CH3_TX_THR_EVENT_INT_RAW : RO; bitpos: [15]; default: 0;
+ *  The interrupt raw bit for channel 3. Triggered when transmitter sends more data
+ *  than configured value.
+ */
+#define RMT_CH3_TX_THR_EVENT_INT_RAW    (BIT(15))
+#define RMT_CH3_TX_THR_EVENT_INT_RAW_M  (RMT_CH3_TX_THR_EVENT_INT_RAW_V << RMT_CH3_TX_THR_EVENT_INT_RAW_S)
+#define RMT_CH3_TX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH3_TX_THR_EVENT_INT_RAW_S  15
+/** RMT_CH0_TX_LOOP_INT_RAW : RO; bitpos: [16]; default: 0;
+ *  The interrupt raw bit for channel 0. Triggered when loop counting reaches the
+ *  configured threshold value.
+ */
+#define RMT_CH0_TX_LOOP_INT_RAW    (BIT(16))
+#define RMT_CH0_TX_LOOP_INT_RAW_M  (RMT_CH0_TX_LOOP_INT_RAW_V << RMT_CH0_TX_LOOP_INT_RAW_S)
+#define RMT_CH0_TX_LOOP_INT_RAW_V  0x00000001U
+#define RMT_CH0_TX_LOOP_INT_RAW_S  16
+/** RMT_CH1_TX_LOOP_INT_RAW : RO; bitpos: [17]; default: 0;
+ *  The interrupt raw bit for channel 1. Triggered when loop counting reaches the
+ *  configured threshold value.
+ */
+#define RMT_CH1_TX_LOOP_INT_RAW    (BIT(17))
+#define RMT_CH1_TX_LOOP_INT_RAW_M  (RMT_CH1_TX_LOOP_INT_RAW_V << RMT_CH1_TX_LOOP_INT_RAW_S)
+#define RMT_CH1_TX_LOOP_INT_RAW_V  0x00000001U
+#define RMT_CH1_TX_LOOP_INT_RAW_S  17
+/** RMT_CH2_TX_LOOP_INT_RAW : RO; bitpos: [18]; default: 0;
+ *  The interrupt raw bit for channel 2. Triggered when loop counting reaches the
+ *  configured threshold value.
+ */
+#define RMT_CH2_TX_LOOP_INT_RAW    (BIT(18))
+#define RMT_CH2_TX_LOOP_INT_RAW_M  (RMT_CH2_TX_LOOP_INT_RAW_V << RMT_CH2_TX_LOOP_INT_RAW_S)
+#define RMT_CH2_TX_LOOP_INT_RAW_V  0x00000001U
+#define RMT_CH2_TX_LOOP_INT_RAW_S  18
+/** RMT_CH3_TX_LOOP_INT_RAW : RO; bitpos: [19]; default: 0;
+ *  The interrupt raw bit for channel 3. Triggered when loop counting reaches the
+ *  configured threshold value.
+ */
+#define RMT_CH3_TX_LOOP_INT_RAW    (BIT(19))
+#define RMT_CH3_TX_LOOP_INT_RAW_M  (RMT_CH3_TX_LOOP_INT_RAW_V << RMT_CH3_TX_LOOP_INT_RAW_S)
+#define RMT_CH3_TX_LOOP_INT_RAW_V  0x00000001U
+#define RMT_CH3_TX_LOOP_INT_RAW_S  19
 
-#define RMT_INT_ST_REG          (DR_REG_RMT_BASE + 0x0054)
-/* RMT_CH3_RX_THR_EVENT_INT_ST : RO ;bitpos:[23] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_RX_THR_EVENT_INT_ST  (BIT(23))
-#define RMT_CH3_RX_THR_EVENT_INT_ST_M  (BIT(23))
-#define RMT_CH3_RX_THR_EVENT_INT_ST_V  0x1
-#define RMT_CH3_RX_THR_EVENT_INT_ST_S  23
-/* RMT_CH2_RX_THR_EVENT_INT_ST : RO ;bitpos:[22] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_RX_THR_EVENT_INT_ST  (BIT(22))
-#define RMT_CH2_RX_THR_EVENT_INT_ST_M  (BIT(22))
-#define RMT_CH2_RX_THR_EVENT_INT_ST_V  0x1
-#define RMT_CH2_RX_THR_EVENT_INT_ST_S  22
-/* RMT_CH1_RX_THR_EVENT_INT_ST : RO ;bitpos:[21] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_RX_THR_EVENT_INT_ST  (BIT(21))
-#define RMT_CH1_RX_THR_EVENT_INT_ST_M  (BIT(21))
-#define RMT_CH1_RX_THR_EVENT_INT_ST_V  0x1
-#define RMT_CH1_RX_THR_EVENT_INT_ST_S  21
-/* RMT_CH0_RX_THR_EVENT_INT_ST : RO ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_RX_THR_EVENT_INT_ST  (BIT(20))
-#define RMT_CH0_RX_THR_EVENT_INT_ST_M  (BIT(20))
-#define RMT_CH0_RX_THR_EVENT_INT_ST_V  0x1
-#define RMT_CH0_RX_THR_EVENT_INT_ST_S  20
-/* RMT_CH3_TX_LOOP_INT_ST : RO ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_LOOP_INT_ST  (BIT(19))
-#define RMT_CH3_TX_LOOP_INT_ST_M  (BIT(19))
-#define RMT_CH3_TX_LOOP_INT_ST_V  0x1
-#define RMT_CH3_TX_LOOP_INT_ST_S  19
-/* RMT_CH2_TX_LOOP_INT_ST : RO ;bitpos:[18] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_LOOP_INT_ST  (BIT(18))
-#define RMT_CH2_TX_LOOP_INT_ST_M  (BIT(18))
-#define RMT_CH2_TX_LOOP_INT_ST_V  0x1
-#define RMT_CH2_TX_LOOP_INT_ST_S  18
-/* RMT_CH1_TX_LOOP_INT_ST : RO ;bitpos:[17] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_LOOP_INT_ST  (BIT(17))
-#define RMT_CH1_TX_LOOP_INT_ST_M  (BIT(17))
-#define RMT_CH1_TX_LOOP_INT_ST_V  0x1
-#define RMT_CH1_TX_LOOP_INT_ST_S  17
-/* RMT_CH0_TX_LOOP_INT_ST : RO ;bitpos:[16] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_LOOP_INT_ST  (BIT(16))
-#define RMT_CH0_TX_LOOP_INT_ST_M  (BIT(16))
-#define RMT_CH0_TX_LOOP_INT_ST_V  0x1
-#define RMT_CH0_TX_LOOP_INT_ST_S  16
-/* RMT_CH3_TX_THR_EVENT_INT_ST : RO ;bitpos:[15] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_THR_EVENT_INT_ST  (BIT(15))
-#define RMT_CH3_TX_THR_EVENT_INT_ST_M  (BIT(15))
-#define RMT_CH3_TX_THR_EVENT_INT_ST_V  0x1
-#define RMT_CH3_TX_THR_EVENT_INT_ST_S  15
-/* RMT_CH2_TX_THR_EVENT_INT_ST : RO ;bitpos:[14] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_THR_EVENT_INT_ST  (BIT(14))
-#define RMT_CH2_TX_THR_EVENT_INT_ST_M  (BIT(14))
-#define RMT_CH2_TX_THR_EVENT_INT_ST_V  0x1
-#define RMT_CH2_TX_THR_EVENT_INT_ST_S  14
-/* RMT_CH1_TX_THR_EVENT_INT_ST : RO ;bitpos:[13] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_THR_EVENT_INT_ST  (BIT(13))
-#define RMT_CH1_TX_THR_EVENT_INT_ST_M  (BIT(13))
-#define RMT_CH1_TX_THR_EVENT_INT_ST_V  0x1
-#define RMT_CH1_TX_THR_EVENT_INT_ST_S  13
-/* RMT_CH0_TX_THR_EVENT_INT_ST : RO ;bitpos:[12] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_THR_EVENT_INT_ST  (BIT(12))
-#define RMT_CH0_TX_THR_EVENT_INT_ST_M  (BIT(12))
-#define RMT_CH0_TX_THR_EVENT_INT_ST_V  0x1
-#define RMT_CH0_TX_THR_EVENT_INT_ST_S  12
-/* RMT_CH3_ERR_INT_ST : RO ;bitpos:[11] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_ERR_INT_ST  (BIT(11))
-#define RMT_CH3_ERR_INT_ST_M  (BIT(11))
-#define RMT_CH3_ERR_INT_ST_V  0x1
-#define RMT_CH3_ERR_INT_ST_S  11
-/* RMT_CH3_RX_END_INT_ST : RO ;bitpos:[10] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_RX_END_INT_ST  (BIT(10))
-#define RMT_CH3_RX_END_INT_ST_M  (BIT(10))
-#define RMT_CH3_RX_END_INT_ST_V  0x1
-#define RMT_CH3_RX_END_INT_ST_S  10
-/* RMT_CH3_TX_END_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_END_INT_ST  (BIT(9))
-#define RMT_CH3_TX_END_INT_ST_M  (BIT(9))
-#define RMT_CH3_TX_END_INT_ST_V  0x1
-#define RMT_CH3_TX_END_INT_ST_S  9
-/* RMT_CH2_ERR_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_ERR_INT_ST  (BIT(8))
-#define RMT_CH2_ERR_INT_ST_M  (BIT(8))
-#define RMT_CH2_ERR_INT_ST_V  0x1
-#define RMT_CH2_ERR_INT_ST_S  8
-/* RMT_CH2_RX_END_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_RX_END_INT_ST  (BIT(7))
-#define RMT_CH2_RX_END_INT_ST_M  (BIT(7))
-#define RMT_CH2_RX_END_INT_ST_V  0x1
-#define RMT_CH2_RX_END_INT_ST_S  7
-/* RMT_CH2_TX_END_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_END_INT_ST  (BIT(6))
-#define RMT_CH2_TX_END_INT_ST_M  (BIT(6))
-#define RMT_CH2_TX_END_INT_ST_V  0x1
-#define RMT_CH2_TX_END_INT_ST_S  6
-/* RMT_CH1_ERR_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_ERR_INT_ST  (BIT(5))
-#define RMT_CH1_ERR_INT_ST_M  (BIT(5))
-#define RMT_CH1_ERR_INT_ST_V  0x1
-#define RMT_CH1_ERR_INT_ST_S  5
-/* RMT_CH1_RX_END_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_RX_END_INT_ST  (BIT(4))
-#define RMT_CH1_RX_END_INT_ST_M  (BIT(4))
-#define RMT_CH1_RX_END_INT_ST_V  0x1
-#define RMT_CH1_RX_END_INT_ST_S  4
-/* RMT_CH1_TX_END_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_END_INT_ST  (BIT(3))
-#define RMT_CH1_TX_END_INT_ST_M  (BIT(3))
-#define RMT_CH1_TX_END_INT_ST_V  0x1
-#define RMT_CH1_TX_END_INT_ST_S  3
-/* RMT_CH0_ERR_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_ERR_INT_ST  (BIT(2))
-#define RMT_CH0_ERR_INT_ST_M  (BIT(2))
-#define RMT_CH0_ERR_INT_ST_V  0x1
-#define RMT_CH0_ERR_INT_ST_S  2
-/* RMT_CH0_RX_END_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_RX_END_INT_ST  (BIT(1))
-#define RMT_CH0_RX_END_INT_ST_M  (BIT(1))
-#define RMT_CH0_RX_END_INT_ST_V  0x1
-#define RMT_CH0_RX_END_INT_ST_S  1
-/* RMT_CH0_TX_END_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_END_INT_ST  (BIT(0))
-#define RMT_CH0_TX_END_INT_ST_M  (BIT(0))
-#define RMT_CH0_TX_END_INT_ST_V  0x1
+/** RMT_INT_ST_REG register
+ *  Masked interrupt status register
+ */
+#define RMT_INT_ST_REG (DR_REG_RMT_BASE + 0x54)
+/** RMT_CH0_TX_END_INT_ST : RO; bitpos: [0]; default: 0;
+ *  The masked interrupt status bit for RMT_CH0_TX_END_INT.
+ */
+#define RMT_CH0_TX_END_INT_ST    (BIT(0))
+#define RMT_CH0_TX_END_INT_ST_M  (RMT_CH0_TX_END_INT_ST_V << RMT_CH0_TX_END_INT_ST_S)
+#define RMT_CH0_TX_END_INT_ST_V  0x00000001U
 #define RMT_CH0_TX_END_INT_ST_S  0
+/** RMT_CH0_RX_END_INT_ST : RO; bitpos: [1]; default: 0;
+ *  The masked interrupt status bit for RMT_CH0_RX_END_INT.
+ */
+#define RMT_CH0_RX_END_INT_ST    (BIT(1))
+#define RMT_CH0_RX_END_INT_ST_M  (RMT_CH0_RX_END_INT_ST_V << RMT_CH0_RX_END_INT_ST_S)
+#define RMT_CH0_RX_END_INT_ST_V  0x00000001U
+#define RMT_CH0_RX_END_INT_ST_S  1
+/** RMT_CH0_ERR_INT_ST : RO; bitpos: [2]; default: 0;
+ *  The masked interrupt status bit for RMT_CH0_ERR_INT.
+ */
+#define RMT_CH0_ERR_INT_ST    (BIT(2))
+#define RMT_CH0_ERR_INT_ST_M  (RMT_CH0_ERR_INT_ST_V << RMT_CH0_ERR_INT_ST_S)
+#define RMT_CH0_ERR_INT_ST_V  0x00000001U
+#define RMT_CH0_ERR_INT_ST_S  2
+/** RMT_CH1_TX_END_INT_ST : RO; bitpos: [3]; default: 0;
+ *  The masked interrupt status bit for RMT_CH1_TX_END_INT.
+ */
+#define RMT_CH1_TX_END_INT_ST    (BIT(3))
+#define RMT_CH1_TX_END_INT_ST_M  (RMT_CH1_TX_END_INT_ST_V << RMT_CH1_TX_END_INT_ST_S)
+#define RMT_CH1_TX_END_INT_ST_V  0x00000001U
+#define RMT_CH1_TX_END_INT_ST_S  3
+/** RMT_CH1_RX_END_INT_ST : RO; bitpos: [4]; default: 0;
+ *  The masked interrupt status bit for RMT_CH1_RX_END_INT.
+ */
+#define RMT_CH1_RX_END_INT_ST    (BIT(4))
+#define RMT_CH1_RX_END_INT_ST_M  (RMT_CH1_RX_END_INT_ST_V << RMT_CH1_RX_END_INT_ST_S)
+#define RMT_CH1_RX_END_INT_ST_V  0x00000001U
+#define RMT_CH1_RX_END_INT_ST_S  4
+/** RMT_CH1_ERR_INT_ST : RO; bitpos: [5]; default: 0;
+ *  The masked interrupt status bit for RMT_CH1_ERR_INT.
+ */
+#define RMT_CH1_ERR_INT_ST    (BIT(5))
+#define RMT_CH1_ERR_INT_ST_M  (RMT_CH1_ERR_INT_ST_V << RMT_CH1_ERR_INT_ST_S)
+#define RMT_CH1_ERR_INT_ST_V  0x00000001U
+#define RMT_CH1_ERR_INT_ST_S  5
+/** RMT_CH2_TX_END_INT_ST : RO; bitpos: [6]; default: 0;
+ *  The masked interrupt status bit for RMT_CH2_TX_END_INT.
+ */
+#define RMT_CH2_TX_END_INT_ST    (BIT(6))
+#define RMT_CH2_TX_END_INT_ST_M  (RMT_CH2_TX_END_INT_ST_V << RMT_CH2_TX_END_INT_ST_S)
+#define RMT_CH2_TX_END_INT_ST_V  0x00000001U
+#define RMT_CH2_TX_END_INT_ST_S  6
+/** RMT_CH2_RX_END_INT_ST : RO; bitpos: [7]; default: 0;
+ *  The masked interrupt status bit for RMT_CH2_RX_END_INT.
+ */
+#define RMT_CH2_RX_END_INT_ST    (BIT(7))
+#define RMT_CH2_RX_END_INT_ST_M  (RMT_CH2_RX_END_INT_ST_V << RMT_CH2_RX_END_INT_ST_S)
+#define RMT_CH2_RX_END_INT_ST_V  0x00000001U
+#define RMT_CH2_RX_END_INT_ST_S  7
+/** RMT_CH2_ERR_INT_ST : RO; bitpos: [8]; default: 0;
+ *  The masked interrupt status bit for RMT_CH2_ERR_INT.
+ */
+#define RMT_CH2_ERR_INT_ST    (BIT(8))
+#define RMT_CH2_ERR_INT_ST_M  (RMT_CH2_ERR_INT_ST_V << RMT_CH2_ERR_INT_ST_S)
+#define RMT_CH2_ERR_INT_ST_V  0x00000001U
+#define RMT_CH2_ERR_INT_ST_S  8
+/** RMT_CH3_TX_END_INT_ST : RO; bitpos: [9]; default: 0;
+ *  The masked interrupt status bit for RMT_CH3_TX_END_INT.
+ */
+#define RMT_CH3_TX_END_INT_ST    (BIT(9))
+#define RMT_CH3_TX_END_INT_ST_M  (RMT_CH3_TX_END_INT_ST_V << RMT_CH3_TX_END_INT_ST_S)
+#define RMT_CH3_TX_END_INT_ST_V  0x00000001U
+#define RMT_CH3_TX_END_INT_ST_S  9
+/** RMT_CH3_RX_END_INT_ST : RO; bitpos: [10]; default: 0;
+ *  The masked interrupt status bit for RMT_CH3_RX_END_INT.
+ */
+#define RMT_CH3_RX_END_INT_ST    (BIT(10))
+#define RMT_CH3_RX_END_INT_ST_M  (RMT_CH3_RX_END_INT_ST_V << RMT_CH3_RX_END_INT_ST_S)
+#define RMT_CH3_RX_END_INT_ST_V  0x00000001U
+#define RMT_CH3_RX_END_INT_ST_S  10
+/** RMT_CH3_ERR_INT_ST : RO; bitpos: [11]; default: 0;
+ *  The masked interrupt status bit for RMT_CH3_ERR_INT.
+ */
+#define RMT_CH3_ERR_INT_ST    (BIT(11))
+#define RMT_CH3_ERR_INT_ST_M  (RMT_CH3_ERR_INT_ST_V << RMT_CH3_ERR_INT_ST_S)
+#define RMT_CH3_ERR_INT_ST_V  0x00000001U
+#define RMT_CH3_ERR_INT_ST_S  11
+/** RMT_CH0_TX_THR_EVENT_INT_ST : RO; bitpos: [12]; default: 0;
+ *  The masked interrupt status bit for RMT_CH0_TX_THR_EVENT_INT.
+ */
+#define RMT_CH0_TX_THR_EVENT_INT_ST    (BIT(12))
+#define RMT_CH0_TX_THR_EVENT_INT_ST_M  (RMT_CH0_TX_THR_EVENT_INT_ST_V << RMT_CH0_TX_THR_EVENT_INT_ST_S)
+#define RMT_CH0_TX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH0_TX_THR_EVENT_INT_ST_S  12
+/** RMT_CH1_TX_THR_EVENT_INT_ST : RO; bitpos: [13]; default: 0;
+ *  The masked interrupt status bit for RMT_CH1_TX_THR_EVENT_INT.
+ */
+#define RMT_CH1_TX_THR_EVENT_INT_ST    (BIT(13))
+#define RMT_CH1_TX_THR_EVENT_INT_ST_M  (RMT_CH1_TX_THR_EVENT_INT_ST_V << RMT_CH1_TX_THR_EVENT_INT_ST_S)
+#define RMT_CH1_TX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH1_TX_THR_EVENT_INT_ST_S  13
+/** RMT_CH2_TX_THR_EVENT_INT_ST : RO; bitpos: [14]; default: 0;
+ *  The masked interrupt status bit for RMT_CH2_TX_THR_EVENT_INT.
+ */
+#define RMT_CH2_TX_THR_EVENT_INT_ST    (BIT(14))
+#define RMT_CH2_TX_THR_EVENT_INT_ST_M  (RMT_CH2_TX_THR_EVENT_INT_ST_V << RMT_CH2_TX_THR_EVENT_INT_ST_S)
+#define RMT_CH2_TX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH2_TX_THR_EVENT_INT_ST_S  14
+/** RMT_CH3_TX_THR_EVENT_INT_ST : RO; bitpos: [15]; default: 0;
+ *  The masked interrupt status bit for RMT_CH3_TX_THR_EVENT_INT.
+ */
+#define RMT_CH3_TX_THR_EVENT_INT_ST    (BIT(15))
+#define RMT_CH3_TX_THR_EVENT_INT_ST_M  (RMT_CH3_TX_THR_EVENT_INT_ST_V << RMT_CH3_TX_THR_EVENT_INT_ST_S)
+#define RMT_CH3_TX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH3_TX_THR_EVENT_INT_ST_S  15
+/** RMT_CH0_TX_LOOP_INT_ST : RO; bitpos: [16]; default: 0;
+ *  The masked interrupt status bit for RMT_CH0_TX_LOOP_INT.
+ */
+#define RMT_CH0_TX_LOOP_INT_ST    (BIT(16))
+#define RMT_CH0_TX_LOOP_INT_ST_M  (RMT_CH0_TX_LOOP_INT_ST_V << RMT_CH0_TX_LOOP_INT_ST_S)
+#define RMT_CH0_TX_LOOP_INT_ST_V  0x00000001U
+#define RMT_CH0_TX_LOOP_INT_ST_S  16
+/** RMT_CH1_TX_LOOP_INT_ST : RO; bitpos: [17]; default: 0;
+ *  The masked interrupt status bit for RMT_CH1_TX_LOOP_INT.
+ */
+#define RMT_CH1_TX_LOOP_INT_ST    (BIT(17))
+#define RMT_CH1_TX_LOOP_INT_ST_M  (RMT_CH1_TX_LOOP_INT_ST_V << RMT_CH1_TX_LOOP_INT_ST_S)
+#define RMT_CH1_TX_LOOP_INT_ST_V  0x00000001U
+#define RMT_CH1_TX_LOOP_INT_ST_S  17
+/** RMT_CH2_TX_LOOP_INT_ST : RO; bitpos: [18]; default: 0;
+ *  The masked interrupt status bit for RMT_CH2_TX_LOOP_INT.
+ */
+#define RMT_CH2_TX_LOOP_INT_ST    (BIT(18))
+#define RMT_CH2_TX_LOOP_INT_ST_M  (RMT_CH2_TX_LOOP_INT_ST_V << RMT_CH2_TX_LOOP_INT_ST_S)
+#define RMT_CH2_TX_LOOP_INT_ST_V  0x00000001U
+#define RMT_CH2_TX_LOOP_INT_ST_S  18
+/** RMT_CH3_TX_LOOP_INT_ST : RO; bitpos: [19]; default: 0;
+ *  The masked interrupt status bit for RMT_CH3_TX_LOOP_INT.
+ */
+#define RMT_CH3_TX_LOOP_INT_ST    (BIT(19))
+#define RMT_CH3_TX_LOOP_INT_ST_M  (RMT_CH3_TX_LOOP_INT_ST_V << RMT_CH3_TX_LOOP_INT_ST_S)
+#define RMT_CH3_TX_LOOP_INT_ST_V  0x00000001U
+#define RMT_CH3_TX_LOOP_INT_ST_S  19
 
-#define RMT_INT_ENA_REG          (DR_REG_RMT_BASE + 0x0058)
-/* RMT_CH3_RX_THR_EVENT_INT_ENA : R/W ;bitpos:[23] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_RX_THR_EVENT_INT_ENA  (BIT(23))
-#define RMT_CH3_RX_THR_EVENT_INT_ENA_M  (BIT(23))
-#define RMT_CH3_RX_THR_EVENT_INT_ENA_V  0x1
-#define RMT_CH3_RX_THR_EVENT_INT_ENA_S  23
-/* RMT_CH2_RX_THR_EVENT_INT_ENA : R/W ;bitpos:[22] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_RX_THR_EVENT_INT_ENA  (BIT(22))
-#define RMT_CH2_RX_THR_EVENT_INT_ENA_M  (BIT(22))
-#define RMT_CH2_RX_THR_EVENT_INT_ENA_V  0x1
-#define RMT_CH2_RX_THR_EVENT_INT_ENA_S  22
-/* RMT_CH1_RX_THR_EVENT_INT_ENA : R/W ;bitpos:[21] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_RX_THR_EVENT_INT_ENA  (BIT(21))
-#define RMT_CH1_RX_THR_EVENT_INT_ENA_M  (BIT(21))
-#define RMT_CH1_RX_THR_EVENT_INT_ENA_V  0x1
-#define RMT_CH1_RX_THR_EVENT_INT_ENA_S  21
-/* RMT_CH0_RX_THR_EVENT_INT_ENA : R/W ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_RX_THR_EVENT_INT_ENA  (BIT(20))
-#define RMT_CH0_RX_THR_EVENT_INT_ENA_M  (BIT(20))
-#define RMT_CH0_RX_THR_EVENT_INT_ENA_V  0x1
-#define RMT_CH0_RX_THR_EVENT_INT_ENA_S  20
-/* RMT_CH3_TX_LOOP_INT_ENA : R/W ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_LOOP_INT_ENA  (BIT(19))
-#define RMT_CH3_TX_LOOP_INT_ENA_M  (BIT(19))
-#define RMT_CH3_TX_LOOP_INT_ENA_V  0x1
-#define RMT_CH3_TX_LOOP_INT_ENA_S  19
-/* RMT_CH2_TX_LOOP_INT_ENA : R/W ;bitpos:[18] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_LOOP_INT_ENA  (BIT(18))
-#define RMT_CH2_TX_LOOP_INT_ENA_M  (BIT(18))
-#define RMT_CH2_TX_LOOP_INT_ENA_V  0x1
-#define RMT_CH2_TX_LOOP_INT_ENA_S  18
-/* RMT_CH1_TX_LOOP_INT_ENA : R/W ;bitpos:[17] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_LOOP_INT_ENA  (BIT(17))
-#define RMT_CH1_TX_LOOP_INT_ENA_M  (BIT(17))
-#define RMT_CH1_TX_LOOP_INT_ENA_V  0x1
-#define RMT_CH1_TX_LOOP_INT_ENA_S  17
-/* RMT_CH0_TX_LOOP_INT_ENA : R/W ;bitpos:[16] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_LOOP_INT_ENA  (BIT(16))
-#define RMT_CH0_TX_LOOP_INT_ENA_M  (BIT(16))
-#define RMT_CH0_TX_LOOP_INT_ENA_V  0x1
-#define RMT_CH0_TX_LOOP_INT_ENA_S  16
-/* RMT_CH3_TX_THR_EVENT_INT_ENA : R/W ;bitpos:[15] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_THR_EVENT_INT_ENA  (BIT(15))
-#define RMT_CH3_TX_THR_EVENT_INT_ENA_M  (BIT(15))
-#define RMT_CH3_TX_THR_EVENT_INT_ENA_V  0x1
-#define RMT_CH3_TX_THR_EVENT_INT_ENA_S  15
-/* RMT_CH2_TX_THR_EVENT_INT_ENA : R/W ;bitpos:[14] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_THR_EVENT_INT_ENA  (BIT(14))
-#define RMT_CH2_TX_THR_EVENT_INT_ENA_M  (BIT(14))
-#define RMT_CH2_TX_THR_EVENT_INT_ENA_V  0x1
-#define RMT_CH2_TX_THR_EVENT_INT_ENA_S  14
-/* RMT_CH1_TX_THR_EVENT_INT_ENA : R/W ;bitpos:[13] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_THR_EVENT_INT_ENA  (BIT(13))
-#define RMT_CH1_TX_THR_EVENT_INT_ENA_M  (BIT(13))
-#define RMT_CH1_TX_THR_EVENT_INT_ENA_V  0x1
-#define RMT_CH1_TX_THR_EVENT_INT_ENA_S  13
-/* RMT_CH0_TX_THR_EVENT_INT_ENA : R/W ;bitpos:[12] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_THR_EVENT_INT_ENA  (BIT(12))
-#define RMT_CH0_TX_THR_EVENT_INT_ENA_M  (BIT(12))
-#define RMT_CH0_TX_THR_EVENT_INT_ENA_V  0x1
-#define RMT_CH0_TX_THR_EVENT_INT_ENA_S  12
-/* RMT_CH3_ERR_INT_ENA : R/W ;bitpos:[11] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_ERR_INT_ENA  (BIT(11))
-#define RMT_CH3_ERR_INT_ENA_M  (BIT(11))
-#define RMT_CH3_ERR_INT_ENA_V  0x1
-#define RMT_CH3_ERR_INT_ENA_S  11
-/* RMT_CH3_RX_END_INT_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_RX_END_INT_ENA  (BIT(10))
-#define RMT_CH3_RX_END_INT_ENA_M  (BIT(10))
-#define RMT_CH3_RX_END_INT_ENA_V  0x1
-#define RMT_CH3_RX_END_INT_ENA_S  10
-/* RMT_CH3_TX_END_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_END_INT_ENA  (BIT(9))
-#define RMT_CH3_TX_END_INT_ENA_M  (BIT(9))
-#define RMT_CH3_TX_END_INT_ENA_V  0x1
-#define RMT_CH3_TX_END_INT_ENA_S  9
-/* RMT_CH2_ERR_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_ERR_INT_ENA  (BIT(8))
-#define RMT_CH2_ERR_INT_ENA_M  (BIT(8))
-#define RMT_CH2_ERR_INT_ENA_V  0x1
-#define RMT_CH2_ERR_INT_ENA_S  8
-/* RMT_CH2_RX_END_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_RX_END_INT_ENA  (BIT(7))
-#define RMT_CH2_RX_END_INT_ENA_M  (BIT(7))
-#define RMT_CH2_RX_END_INT_ENA_V  0x1
-#define RMT_CH2_RX_END_INT_ENA_S  7
-/* RMT_CH2_TX_END_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_END_INT_ENA  (BIT(6))
-#define RMT_CH2_TX_END_INT_ENA_M  (BIT(6))
-#define RMT_CH2_TX_END_INT_ENA_V  0x1
-#define RMT_CH2_TX_END_INT_ENA_S  6
-/* RMT_CH1_ERR_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_ERR_INT_ENA  (BIT(5))
-#define RMT_CH1_ERR_INT_ENA_M  (BIT(5))
-#define RMT_CH1_ERR_INT_ENA_V  0x1
-#define RMT_CH1_ERR_INT_ENA_S  5
-/* RMT_CH1_RX_END_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_RX_END_INT_ENA  (BIT(4))
-#define RMT_CH1_RX_END_INT_ENA_M  (BIT(4))
-#define RMT_CH1_RX_END_INT_ENA_V  0x1
-#define RMT_CH1_RX_END_INT_ENA_S  4
-/* RMT_CH1_TX_END_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_END_INT_ENA  (BIT(3))
-#define RMT_CH1_TX_END_INT_ENA_M  (BIT(3))
-#define RMT_CH1_TX_END_INT_ENA_V  0x1
-#define RMT_CH1_TX_END_INT_ENA_S  3
-/* RMT_CH0_ERR_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_ERR_INT_ENA  (BIT(2))
-#define RMT_CH0_ERR_INT_ENA_M  (BIT(2))
-#define RMT_CH0_ERR_INT_ENA_V  0x1
-#define RMT_CH0_ERR_INT_ENA_S  2
-/* RMT_CH0_RX_END_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_RX_END_INT_ENA  (BIT(1))
-#define RMT_CH0_RX_END_INT_ENA_M  (BIT(1))
-#define RMT_CH0_RX_END_INT_ENA_V  0x1
-#define RMT_CH0_RX_END_INT_ENA_S  1
-/* RMT_CH0_TX_END_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_END_INT_ENA  (BIT(0))
-#define RMT_CH0_TX_END_INT_ENA_M  (BIT(0))
-#define RMT_CH0_TX_END_INT_ENA_V  0x1
+/** RMT_INT_ENA_REG register
+ *  Interrupt enable register
+ */
+#define RMT_INT_ENA_REG (DR_REG_RMT_BASE + 0x58)
+/** RMT_CH0_TX_END_INT_ENA : R/W; bitpos: [0]; default: 0;
+ *  The interrupt enabled bit for RMT_CH0_TX_END_INT.
+ */
+#define RMT_CH0_TX_END_INT_ENA    (BIT(0))
+#define RMT_CH0_TX_END_INT_ENA_M  (RMT_CH0_TX_END_INT_ENA_V << RMT_CH0_TX_END_INT_ENA_S)
+#define RMT_CH0_TX_END_INT_ENA_V  0x00000001U
 #define RMT_CH0_TX_END_INT_ENA_S  0
+/** RMT_CH0_RX_END_INT_ENA : R/W; bitpos: [1]; default: 0;
+ *  The interrupt enabled bit for RMT_CH0_RX_END_INT.
+ */
+#define RMT_CH0_RX_END_INT_ENA    (BIT(1))
+#define RMT_CH0_RX_END_INT_ENA_M  (RMT_CH0_RX_END_INT_ENA_V << RMT_CH0_RX_END_INT_ENA_S)
+#define RMT_CH0_RX_END_INT_ENA_V  0x00000001U
+#define RMT_CH0_RX_END_INT_ENA_S  1
+/** RMT_CH0_ERR_INT_ENA : R/W; bitpos: [2]; default: 0;
+ *  The interrupt enabled bit for RMT_CH0_ERR_INT.
+ */
+#define RMT_CH0_ERR_INT_ENA    (BIT(2))
+#define RMT_CH0_ERR_INT_ENA_M  (RMT_CH0_ERR_INT_ENA_V << RMT_CH0_ERR_INT_ENA_S)
+#define RMT_CH0_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH0_ERR_INT_ENA_S  2
+/** RMT_CH1_TX_END_INT_ENA : R/W; bitpos: [3]; default: 0;
+ *  The interrupt enabled bit for RMT_CH1_TX_END_INT.
+ */
+#define RMT_CH1_TX_END_INT_ENA    (BIT(3))
+#define RMT_CH1_TX_END_INT_ENA_M  (RMT_CH1_TX_END_INT_ENA_V << RMT_CH1_TX_END_INT_ENA_S)
+#define RMT_CH1_TX_END_INT_ENA_V  0x00000001U
+#define RMT_CH1_TX_END_INT_ENA_S  3
+/** RMT_CH1_RX_END_INT_ENA : R/W; bitpos: [4]; default: 0;
+ *  The interrupt enabled bit for RMT_CH1_RX_END_INT.
+ */
+#define RMT_CH1_RX_END_INT_ENA    (BIT(4))
+#define RMT_CH1_RX_END_INT_ENA_M  (RMT_CH1_RX_END_INT_ENA_V << RMT_CH1_RX_END_INT_ENA_S)
+#define RMT_CH1_RX_END_INT_ENA_V  0x00000001U
+#define RMT_CH1_RX_END_INT_ENA_S  4
+/** RMT_CH1_ERR_INT_ENA : R/W; bitpos: [5]; default: 0;
+ *  The interrupt enabled bit for RMT_CH1_ERR_INT.
+ */
+#define RMT_CH1_ERR_INT_ENA    (BIT(5))
+#define RMT_CH1_ERR_INT_ENA_M  (RMT_CH1_ERR_INT_ENA_V << RMT_CH1_ERR_INT_ENA_S)
+#define RMT_CH1_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH1_ERR_INT_ENA_S  5
+/** RMT_CH2_TX_END_INT_ENA : R/W; bitpos: [6]; default: 0;
+ *  The interrupt enabled bit for RMT_CH2_TX_END_INT.
+ */
+#define RMT_CH2_TX_END_INT_ENA    (BIT(6))
+#define RMT_CH2_TX_END_INT_ENA_M  (RMT_CH2_TX_END_INT_ENA_V << RMT_CH2_TX_END_INT_ENA_S)
+#define RMT_CH2_TX_END_INT_ENA_V  0x00000001U
+#define RMT_CH2_TX_END_INT_ENA_S  6
+/** RMT_CH2_RX_END_INT_ENA : R/W; bitpos: [7]; default: 0;
+ *  The interrupt enabled bit for RMT_CH2_RX_END_INT.
+ */
+#define RMT_CH2_RX_END_INT_ENA    (BIT(7))
+#define RMT_CH2_RX_END_INT_ENA_M  (RMT_CH2_RX_END_INT_ENA_V << RMT_CH2_RX_END_INT_ENA_S)
+#define RMT_CH2_RX_END_INT_ENA_V  0x00000001U
+#define RMT_CH2_RX_END_INT_ENA_S  7
+/** RMT_CH2_ERR_INT_ENA : R/W; bitpos: [8]; default: 0;
+ *  The interrupt enabled bit for RMT_CH2_ERR_INT.
+ */
+#define RMT_CH2_ERR_INT_ENA    (BIT(8))
+#define RMT_CH2_ERR_INT_ENA_M  (RMT_CH2_ERR_INT_ENA_V << RMT_CH2_ERR_INT_ENA_S)
+#define RMT_CH2_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH2_ERR_INT_ENA_S  8
+/** RMT_CH3_TX_END_INT_ENA : R/W; bitpos: [9]; default: 0;
+ *  The interrupt enabled bit for RMT_CH3_TX_END_INT.
+ */
+#define RMT_CH3_TX_END_INT_ENA    (BIT(9))
+#define RMT_CH3_TX_END_INT_ENA_M  (RMT_CH3_TX_END_INT_ENA_V << RMT_CH3_TX_END_INT_ENA_S)
+#define RMT_CH3_TX_END_INT_ENA_V  0x00000001U
+#define RMT_CH3_TX_END_INT_ENA_S  9
+/** RMT_CH3_RX_END_INT_ENA : R/W; bitpos: [10]; default: 0;
+ *  The interrupt enabled bit for RMT_CH3_RX_END_INT.
+ */
+#define RMT_CH3_RX_END_INT_ENA    (BIT(10))
+#define RMT_CH3_RX_END_INT_ENA_M  (RMT_CH3_RX_END_INT_ENA_V << RMT_CH3_RX_END_INT_ENA_S)
+#define RMT_CH3_RX_END_INT_ENA_V  0x00000001U
+#define RMT_CH3_RX_END_INT_ENA_S  10
+/** RMT_CH3_ERR_INT_ENA : R/W; bitpos: [11]; default: 0;
+ *  The interrupt enabled bit for RMT_CH3_ERR_INT.
+ */
+#define RMT_CH3_ERR_INT_ENA    (BIT(11))
+#define RMT_CH3_ERR_INT_ENA_M  (RMT_CH3_ERR_INT_ENA_V << RMT_CH3_ERR_INT_ENA_S)
+#define RMT_CH3_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH3_ERR_INT_ENA_S  11
+/** RMT_CH0_TX_THR_EVENT_INT_ENA : R/W; bitpos: [12]; default: 0;
+ *  The interrupt enabled bit for RMT_CH0_TX_THR_EVENT_INT.
+ */
+#define RMT_CH0_TX_THR_EVENT_INT_ENA    (BIT(12))
+#define RMT_CH0_TX_THR_EVENT_INT_ENA_M  (RMT_CH0_TX_THR_EVENT_INT_ENA_V << RMT_CH0_TX_THR_EVENT_INT_ENA_S)
+#define RMT_CH0_TX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH0_TX_THR_EVENT_INT_ENA_S  12
+/** RMT_CH1_TX_THR_EVENT_INT_ENA : R/W; bitpos: [13]; default: 0;
+ *  The interrupt enabled bit for RMT_CH1_TX_THR_EVENT_INT.
+ */
+#define RMT_CH1_TX_THR_EVENT_INT_ENA    (BIT(13))
+#define RMT_CH1_TX_THR_EVENT_INT_ENA_M  (RMT_CH1_TX_THR_EVENT_INT_ENA_V << RMT_CH1_TX_THR_EVENT_INT_ENA_S)
+#define RMT_CH1_TX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH1_TX_THR_EVENT_INT_ENA_S  13
+/** RMT_CH2_TX_THR_EVENT_INT_ENA : R/W; bitpos: [14]; default: 0;
+ *  The interrupt enabled bit for RMT_CH2_TX_THR_EVENT_INT.
+ */
+#define RMT_CH2_TX_THR_EVENT_INT_ENA    (BIT(14))
+#define RMT_CH2_TX_THR_EVENT_INT_ENA_M  (RMT_CH2_TX_THR_EVENT_INT_ENA_V << RMT_CH2_TX_THR_EVENT_INT_ENA_S)
+#define RMT_CH2_TX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH2_TX_THR_EVENT_INT_ENA_S  14
+/** RMT_CH3_TX_THR_EVENT_INT_ENA : R/W; bitpos: [15]; default: 0;
+ *  The interrupt enabled bit for RMT_CH3_TX_THR_EVENT_INT.
+ */
+#define RMT_CH3_TX_THR_EVENT_INT_ENA    (BIT(15))
+#define RMT_CH3_TX_THR_EVENT_INT_ENA_M  (RMT_CH3_TX_THR_EVENT_INT_ENA_V << RMT_CH3_TX_THR_EVENT_INT_ENA_S)
+#define RMT_CH3_TX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH3_TX_THR_EVENT_INT_ENA_S  15
+/** RMT_CH0_TX_LOOP_INT_ENA : R/W; bitpos: [16]; default: 0;
+ *  The interrupt enabled bit for RMT_CH0_TX_LOOP_INT.
+ */
+#define RMT_CH0_TX_LOOP_INT_ENA    (BIT(16))
+#define RMT_CH0_TX_LOOP_INT_ENA_M  (RMT_CH0_TX_LOOP_INT_ENA_V << RMT_CH0_TX_LOOP_INT_ENA_S)
+#define RMT_CH0_TX_LOOP_INT_ENA_V  0x00000001U
+#define RMT_CH0_TX_LOOP_INT_ENA_S  16
+/** RMT_CH1_TX_LOOP_INT_ENA : R/W; bitpos: [17]; default: 0;
+ *  The interrupt enabled bit for RMT_CH1_TX_LOOP_INT.
+ */
+#define RMT_CH1_TX_LOOP_INT_ENA    (BIT(17))
+#define RMT_CH1_TX_LOOP_INT_ENA_M  (RMT_CH1_TX_LOOP_INT_ENA_V << RMT_CH1_TX_LOOP_INT_ENA_S)
+#define RMT_CH1_TX_LOOP_INT_ENA_V  0x00000001U
+#define RMT_CH1_TX_LOOP_INT_ENA_S  17
+/** RMT_CH2_TX_LOOP_INT_ENA : R/W; bitpos: [18]; default: 0;
+ *  The interrupt enabled bit for RMT_CH2_TX_LOOP_INT.
+ */
+#define RMT_CH2_TX_LOOP_INT_ENA    (BIT(18))
+#define RMT_CH2_TX_LOOP_INT_ENA_M  (RMT_CH2_TX_LOOP_INT_ENA_V << RMT_CH2_TX_LOOP_INT_ENA_S)
+#define RMT_CH2_TX_LOOP_INT_ENA_V  0x00000001U
+#define RMT_CH2_TX_LOOP_INT_ENA_S  18
+/** RMT_CH3_TX_LOOP_INT_ENA : R/W; bitpos: [19]; default: 0;
+ *  The interrupt enabled bit for RMT_CH3_TX_LOOP_INT.
+ */
+#define RMT_CH3_TX_LOOP_INT_ENA    (BIT(19))
+#define RMT_CH3_TX_LOOP_INT_ENA_M  (RMT_CH3_TX_LOOP_INT_ENA_V << RMT_CH3_TX_LOOP_INT_ENA_S)
+#define RMT_CH3_TX_LOOP_INT_ENA_V  0x00000001U
+#define RMT_CH3_TX_LOOP_INT_ENA_S  19
 
-#define RMT_INT_CLR_REG          (DR_REG_RMT_BASE + 0x005c)
-/* RMT_CH3_RX_THR_EVENT_INT_CLR : WO ;bitpos:[23] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_RX_THR_EVENT_INT_CLR  (BIT(23))
-#define RMT_CH3_RX_THR_EVENT_INT_CLR_M  (BIT(23))
-#define RMT_CH3_RX_THR_EVENT_INT_CLR_V  0x1
-#define RMT_CH3_RX_THR_EVENT_INT_CLR_S  23
-/* RMT_CH2_RX_THR_EVENT_INT_CLR : WO ;bitpos:[22] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_RX_THR_EVENT_INT_CLR  (BIT(22))
-#define RMT_CH2_RX_THR_EVENT_INT_CLR_M  (BIT(22))
-#define RMT_CH2_RX_THR_EVENT_INT_CLR_V  0x1
-#define RMT_CH2_RX_THR_EVENT_INT_CLR_S  22
-/* RMT_CH1_RX_THR_EVENT_INT_CLR : WO ;bitpos:[21] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_RX_THR_EVENT_INT_CLR  (BIT(21))
-#define RMT_CH1_RX_THR_EVENT_INT_CLR_M  (BIT(21))
-#define RMT_CH1_RX_THR_EVENT_INT_CLR_V  0x1
-#define RMT_CH1_RX_THR_EVENT_INT_CLR_S  21
-/* RMT_CH0_RX_THR_EVENT_INT_CLR : WO ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_RX_THR_EVENT_INT_CLR  (BIT(20))
-#define RMT_CH0_RX_THR_EVENT_INT_CLR_M  (BIT(20))
-#define RMT_CH0_RX_THR_EVENT_INT_CLR_V  0x1
-#define RMT_CH0_RX_THR_EVENT_INT_CLR_S  20
-/* RMT_CH3_TX_LOOP_INT_CLR : WO ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_LOOP_INT_CLR  (BIT(19))
-#define RMT_CH3_TX_LOOP_INT_CLR_M  (BIT(19))
-#define RMT_CH3_TX_LOOP_INT_CLR_V  0x1
-#define RMT_CH3_TX_LOOP_INT_CLR_S  19
-/* RMT_CH2_TX_LOOP_INT_CLR : WO ;bitpos:[18] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_LOOP_INT_CLR  (BIT(18))
-#define RMT_CH2_TX_LOOP_INT_CLR_M  (BIT(18))
-#define RMT_CH2_TX_LOOP_INT_CLR_V  0x1
-#define RMT_CH2_TX_LOOP_INT_CLR_S  18
-/* RMT_CH1_TX_LOOP_INT_CLR : WO ;bitpos:[17] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_LOOP_INT_CLR  (BIT(17))
-#define RMT_CH1_TX_LOOP_INT_CLR_M  (BIT(17))
-#define RMT_CH1_TX_LOOP_INT_CLR_V  0x1
-#define RMT_CH1_TX_LOOP_INT_CLR_S  17
-/* RMT_CH0_TX_LOOP_INT_CLR : WO ;bitpos:[16] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_LOOP_INT_CLR  (BIT(16))
-#define RMT_CH0_TX_LOOP_INT_CLR_M  (BIT(16))
-#define RMT_CH0_TX_LOOP_INT_CLR_V  0x1
-#define RMT_CH0_TX_LOOP_INT_CLR_S  16
-/* RMT_CH3_TX_THR_EVENT_INT_CLR : WO ;bitpos:[15] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_THR_EVENT_INT_CLR  (BIT(15))
-#define RMT_CH3_TX_THR_EVENT_INT_CLR_M  (BIT(15))
-#define RMT_CH3_TX_THR_EVENT_INT_CLR_V  0x1
-#define RMT_CH3_TX_THR_EVENT_INT_CLR_S  15
-/* RMT_CH2_TX_THR_EVENT_INT_CLR : WO ;bitpos:[14] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_THR_EVENT_INT_CLR  (BIT(14))
-#define RMT_CH2_TX_THR_EVENT_INT_CLR_M  (BIT(14))
-#define RMT_CH2_TX_THR_EVENT_INT_CLR_V  0x1
-#define RMT_CH2_TX_THR_EVENT_INT_CLR_S  14
-/* RMT_CH1_TX_THR_EVENT_INT_CLR : WO ;bitpos:[13] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_THR_EVENT_INT_CLR  (BIT(13))
-#define RMT_CH1_TX_THR_EVENT_INT_CLR_M  (BIT(13))
-#define RMT_CH1_TX_THR_EVENT_INT_CLR_V  0x1
-#define RMT_CH1_TX_THR_EVENT_INT_CLR_S  13
-/* RMT_CH0_TX_THR_EVENT_INT_CLR : WO ;bitpos:[12] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_THR_EVENT_INT_CLR  (BIT(12))
-#define RMT_CH0_TX_THR_EVENT_INT_CLR_M  (BIT(12))
-#define RMT_CH0_TX_THR_EVENT_INT_CLR_V  0x1
-#define RMT_CH0_TX_THR_EVENT_INT_CLR_S  12
-/* RMT_CH3_ERR_INT_CLR : WO ;bitpos:[11] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_ERR_INT_CLR  (BIT(11))
-#define RMT_CH3_ERR_INT_CLR_M  (BIT(11))
-#define RMT_CH3_ERR_INT_CLR_V  0x1
-#define RMT_CH3_ERR_INT_CLR_S  11
-/* RMT_CH3_RX_END_INT_CLR : WO ;bitpos:[10] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_RX_END_INT_CLR  (BIT(10))
-#define RMT_CH3_RX_END_INT_CLR_M  (BIT(10))
-#define RMT_CH3_RX_END_INT_CLR_V  0x1
-#define RMT_CH3_RX_END_INT_CLR_S  10
-/* RMT_CH3_TX_END_INT_CLR : WO ;bitpos:[9] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH3_TX_END_INT_CLR  (BIT(9))
-#define RMT_CH3_TX_END_INT_CLR_M  (BIT(9))
-#define RMT_CH3_TX_END_INT_CLR_V  0x1
-#define RMT_CH3_TX_END_INT_CLR_S  9
-/* RMT_CH2_ERR_INT_CLR : WO ;bitpos:[8] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_ERR_INT_CLR  (BIT(8))
-#define RMT_CH2_ERR_INT_CLR_M  (BIT(8))
-#define RMT_CH2_ERR_INT_CLR_V  0x1
-#define RMT_CH2_ERR_INT_CLR_S  8
-/* RMT_CH2_RX_END_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_RX_END_INT_CLR  (BIT(7))
-#define RMT_CH2_RX_END_INT_CLR_M  (BIT(7))
-#define RMT_CH2_RX_END_INT_CLR_V  0x1
-#define RMT_CH2_RX_END_INT_CLR_S  7
-/* RMT_CH2_TX_END_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH2_TX_END_INT_CLR  (BIT(6))
-#define RMT_CH2_TX_END_INT_CLR_M  (BIT(6))
-#define RMT_CH2_TX_END_INT_CLR_V  0x1
-#define RMT_CH2_TX_END_INT_CLR_S  6
-/* RMT_CH1_ERR_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_ERR_INT_CLR  (BIT(5))
-#define RMT_CH1_ERR_INT_CLR_M  (BIT(5))
-#define RMT_CH1_ERR_INT_CLR_V  0x1
-#define RMT_CH1_ERR_INT_CLR_S  5
-/* RMT_CH1_RX_END_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_RX_END_INT_CLR  (BIT(4))
-#define RMT_CH1_RX_END_INT_CLR_M  (BIT(4))
-#define RMT_CH1_RX_END_INT_CLR_V  0x1
-#define RMT_CH1_RX_END_INT_CLR_S  4
-/* RMT_CH1_TX_END_INT_CLR : WO ;bitpos:[3] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH1_TX_END_INT_CLR  (BIT(3))
-#define RMT_CH1_TX_END_INT_CLR_M  (BIT(3))
-#define RMT_CH1_TX_END_INT_CLR_V  0x1
-#define RMT_CH1_TX_END_INT_CLR_S  3
-/* RMT_CH0_ERR_INT_CLR : WO ;bitpos:[2] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_ERR_INT_CLR  (BIT(2))
-#define RMT_CH0_ERR_INT_CLR_M  (BIT(2))
-#define RMT_CH0_ERR_INT_CLR_V  0x1
-#define RMT_CH0_ERR_INT_CLR_S  2
-/* RMT_CH0_RX_END_INT_CLR : WO ;bitpos:[1] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_RX_END_INT_CLR  (BIT(1))
-#define RMT_CH0_RX_END_INT_CLR_M  (BIT(1))
-#define RMT_CH0_RX_END_INT_CLR_V  0x1
-#define RMT_CH0_RX_END_INT_CLR_S  1
-/* RMT_CH0_TX_END_INT_CLR : WO ;bitpos:[0] ;default: 1'b0 ; */
-/*description: */
-#define RMT_CH0_TX_END_INT_CLR  (BIT(0))
-#define RMT_CH0_TX_END_INT_CLR_M  (BIT(0))
-#define RMT_CH0_TX_END_INT_CLR_V  0x1
+/** RMT_INT_CLR_REG register
+ *  Interrupt clear register
+ */
+#define RMT_INT_CLR_REG (DR_REG_RMT_BASE + 0x5c)
+/** RMT_CH0_TX_END_INT_CLR : WO; bitpos: [0]; default: 0;
+ *  Set this bit to clear RMT_CH0_TX_END_INT interrupt.
+ */
+#define RMT_CH0_TX_END_INT_CLR    (BIT(0))
+#define RMT_CH0_TX_END_INT_CLR_M  (RMT_CH0_TX_END_INT_CLR_V << RMT_CH0_TX_END_INT_CLR_S)
+#define RMT_CH0_TX_END_INT_CLR_V  0x00000001U
 #define RMT_CH0_TX_END_INT_CLR_S  0
+/** RMT_CH0_RX_END_INT_CLR : WO; bitpos: [1]; default: 0;
+ *  Set this bit to clear RMT_CH0_RX_END_INT interrupt.
+ */
+#define RMT_CH0_RX_END_INT_CLR    (BIT(1))
+#define RMT_CH0_RX_END_INT_CLR_M  (RMT_CH0_RX_END_INT_CLR_V << RMT_CH0_RX_END_INT_CLR_S)
+#define RMT_CH0_RX_END_INT_CLR_V  0x00000001U
+#define RMT_CH0_RX_END_INT_CLR_S  1
+/** RMT_CH0_ERR_INT_CLR : WO; bitpos: [2]; default: 0;
+ *  Set this bit to clear RMT_CH0_ERR_INT interrupt.
+ */
+#define RMT_CH0_ERR_INT_CLR    (BIT(2))
+#define RMT_CH0_ERR_INT_CLR_M  (RMT_CH0_ERR_INT_CLR_V << RMT_CH0_ERR_INT_CLR_S)
+#define RMT_CH0_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH0_ERR_INT_CLR_S  2
+/** RMT_CH1_TX_END_INT_CLR : WO; bitpos: [3]; default: 0;
+ *  Set this bit to clear RMT_CH1_TX_END_INT interrupt.
+ */
+#define RMT_CH1_TX_END_INT_CLR    (BIT(3))
+#define RMT_CH1_TX_END_INT_CLR_M  (RMT_CH1_TX_END_INT_CLR_V << RMT_CH1_TX_END_INT_CLR_S)
+#define RMT_CH1_TX_END_INT_CLR_V  0x00000001U
+#define RMT_CH1_TX_END_INT_CLR_S  3
+/** RMT_CH1_RX_END_INT_CLR : WO; bitpos: [4]; default: 0;
+ *  Set this bit to clear RMT_CH1_RX_END_INT interrupt.
+ */
+#define RMT_CH1_RX_END_INT_CLR    (BIT(4))
+#define RMT_CH1_RX_END_INT_CLR_M  (RMT_CH1_RX_END_INT_CLR_V << RMT_CH1_RX_END_INT_CLR_S)
+#define RMT_CH1_RX_END_INT_CLR_V  0x00000001U
+#define RMT_CH1_RX_END_INT_CLR_S  4
+/** RMT_CH1_ERR_INT_CLR : WO; bitpos: [5]; default: 0;
+ *  Set this bit to clear RMT_CH1_ERR_INT interrupt.
+ */
+#define RMT_CH1_ERR_INT_CLR    (BIT(5))
+#define RMT_CH1_ERR_INT_CLR_M  (RMT_CH1_ERR_INT_CLR_V << RMT_CH1_ERR_INT_CLR_S)
+#define RMT_CH1_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH1_ERR_INT_CLR_S  5
+/** RMT_CH2_TX_END_INT_CLR : WO; bitpos: [6]; default: 0;
+ *  Set this bit to clear RMT_CH2_TX_END_INT interrupt.
+ */
+#define RMT_CH2_TX_END_INT_CLR    (BIT(6))
+#define RMT_CH2_TX_END_INT_CLR_M  (RMT_CH2_TX_END_INT_CLR_V << RMT_CH2_TX_END_INT_CLR_S)
+#define RMT_CH2_TX_END_INT_CLR_V  0x00000001U
+#define RMT_CH2_TX_END_INT_CLR_S  6
+/** RMT_CH2_RX_END_INT_CLR : WO; bitpos: [7]; default: 0;
+ *  Set this bit to clear RMT_CH2_RX_END_INT interrupt.
+ */
+#define RMT_CH2_RX_END_INT_CLR    (BIT(7))
+#define RMT_CH2_RX_END_INT_CLR_M  (RMT_CH2_RX_END_INT_CLR_V << RMT_CH2_RX_END_INT_CLR_S)
+#define RMT_CH2_RX_END_INT_CLR_V  0x00000001U
+#define RMT_CH2_RX_END_INT_CLR_S  7
+/** RMT_CH2_ERR_INT_CLR : WO; bitpos: [8]; default: 0;
+ *  Set this bit to clear RMT_CH2_ERR_INT interrupt.
+ */
+#define RMT_CH2_ERR_INT_CLR    (BIT(8))
+#define RMT_CH2_ERR_INT_CLR_M  (RMT_CH2_ERR_INT_CLR_V << RMT_CH2_ERR_INT_CLR_S)
+#define RMT_CH2_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH2_ERR_INT_CLR_S  8
+/** RMT_CH3_TX_END_INT_CLR : WO; bitpos: [9]; default: 0;
+ *  Set this bit to clear RMT_CH3_TX_END_INT interrupt.
+ */
+#define RMT_CH3_TX_END_INT_CLR    (BIT(9))
+#define RMT_CH3_TX_END_INT_CLR_M  (RMT_CH3_TX_END_INT_CLR_V << RMT_CH3_TX_END_INT_CLR_S)
+#define RMT_CH3_TX_END_INT_CLR_V  0x00000001U
+#define RMT_CH3_TX_END_INT_CLR_S  9
+/** RMT_CH3_RX_END_INT_CLR : WO; bitpos: [10]; default: 0;
+ *  Set this bit to clear RMT_CH3_RX_END_INT interrupt.
+ */
+#define RMT_CH3_RX_END_INT_CLR    (BIT(10))
+#define RMT_CH3_RX_END_INT_CLR_M  (RMT_CH3_RX_END_INT_CLR_V << RMT_CH3_RX_END_INT_CLR_S)
+#define RMT_CH3_RX_END_INT_CLR_V  0x00000001U
+#define RMT_CH3_RX_END_INT_CLR_S  10
+/** RMT_CH3_ERR_INT_CLR : WO; bitpos: [11]; default: 0;
+ *  Set this bit to clear RMT_CH3_ERR_INT interrupt.
+ */
+#define RMT_CH3_ERR_INT_CLR    (BIT(11))
+#define RMT_CH3_ERR_INT_CLR_M  (RMT_CH3_ERR_INT_CLR_V << RMT_CH3_ERR_INT_CLR_S)
+#define RMT_CH3_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH3_ERR_INT_CLR_S  11
+/** RMT_CH0_TX_THR_EVENT_INT_CLR : WO; bitpos: [12]; default: 0;
+ *  Set this bit to clear RMT_CH0_TX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH0_TX_THR_EVENT_INT_CLR    (BIT(12))
+#define RMT_CH0_TX_THR_EVENT_INT_CLR_M  (RMT_CH0_TX_THR_EVENT_INT_CLR_V << RMT_CH0_TX_THR_EVENT_INT_CLR_S)
+#define RMT_CH0_TX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH0_TX_THR_EVENT_INT_CLR_S  12
+/** RMT_CH1_TX_THR_EVENT_INT_CLR : WO; bitpos: [13]; default: 0;
+ *  Set this bit to clear RMT_CH1_TX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH1_TX_THR_EVENT_INT_CLR    (BIT(13))
+#define RMT_CH1_TX_THR_EVENT_INT_CLR_M  (RMT_CH1_TX_THR_EVENT_INT_CLR_V << RMT_CH1_TX_THR_EVENT_INT_CLR_S)
+#define RMT_CH1_TX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH1_TX_THR_EVENT_INT_CLR_S  13
+/** RMT_CH2_TX_THR_EVENT_INT_CLR : WO; bitpos: [14]; default: 0;
+ *  Set this bit to clear RMT_CH2_TX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH2_TX_THR_EVENT_INT_CLR    (BIT(14))
+#define RMT_CH2_TX_THR_EVENT_INT_CLR_M  (RMT_CH2_TX_THR_EVENT_INT_CLR_V << RMT_CH2_TX_THR_EVENT_INT_CLR_S)
+#define RMT_CH2_TX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH2_TX_THR_EVENT_INT_CLR_S  14
+/** RMT_CH3_TX_THR_EVENT_INT_CLR : WO; bitpos: [15]; default: 0;
+ *  Set this bit to clear RMT_CH3_TX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH3_TX_THR_EVENT_INT_CLR    (BIT(15))
+#define RMT_CH3_TX_THR_EVENT_INT_CLR_M  (RMT_CH3_TX_THR_EVENT_INT_CLR_V << RMT_CH3_TX_THR_EVENT_INT_CLR_S)
+#define RMT_CH3_TX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH3_TX_THR_EVENT_INT_CLR_S  15
+/** RMT_CH0_TX_LOOP_INT_CLR : WO; bitpos: [16]; default: 0;
+ *  Set this bit to clear RMT_CH0_TX_LOOP_INT interrupt.
+ */
+#define RMT_CH0_TX_LOOP_INT_CLR    (BIT(16))
+#define RMT_CH0_TX_LOOP_INT_CLR_M  (RMT_CH0_TX_LOOP_INT_CLR_V << RMT_CH0_TX_LOOP_INT_CLR_S)
+#define RMT_CH0_TX_LOOP_INT_CLR_V  0x00000001U
+#define RMT_CH0_TX_LOOP_INT_CLR_S  16
+/** RMT_CH1_TX_LOOP_INT_CLR : WO; bitpos: [17]; default: 0;
+ *  Set this bit to clear RMT_CH1_TX_LOOP_INT interrupt.
+ */
+#define RMT_CH1_TX_LOOP_INT_CLR    (BIT(17))
+#define RMT_CH1_TX_LOOP_INT_CLR_M  (RMT_CH1_TX_LOOP_INT_CLR_V << RMT_CH1_TX_LOOP_INT_CLR_S)
+#define RMT_CH1_TX_LOOP_INT_CLR_V  0x00000001U
+#define RMT_CH1_TX_LOOP_INT_CLR_S  17
+/** RMT_CH2_TX_LOOP_INT_CLR : WO; bitpos: [18]; default: 0;
+ *  Set this bit to clear RMT_CH2_TX_LOOP_INT interrupt.
+ */
+#define RMT_CH2_TX_LOOP_INT_CLR    (BIT(18))
+#define RMT_CH2_TX_LOOP_INT_CLR_M  (RMT_CH2_TX_LOOP_INT_CLR_V << RMT_CH2_TX_LOOP_INT_CLR_S)
+#define RMT_CH2_TX_LOOP_INT_CLR_V  0x00000001U
+#define RMT_CH2_TX_LOOP_INT_CLR_S  18
+/** RMT_CH3_TX_LOOP_INT_CLR : WO; bitpos: [19]; default: 0;
+ *  Set this bit to clear RMT_CH3_TX_LOOP_INT interrupt.
+ */
+#define RMT_CH3_TX_LOOP_INT_CLR    (BIT(19))
+#define RMT_CH3_TX_LOOP_INT_CLR_M  (RMT_CH3_TX_LOOP_INT_CLR_V << RMT_CH3_TX_LOOP_INT_CLR_S)
+#define RMT_CH3_TX_LOOP_INT_CLR_V  0x00000001U
+#define RMT_CH3_TX_LOOP_INT_CLR_S  19
 
-#define RMT_CH0CARRIER_DUTY_REG          (DR_REG_RMT_BASE + 0x0060)
-/* RMT_CARRIER_HIGH_CH0 : R/W ;bitpos:[31:16] ;default: 16'h40 ; */
-/*description: */
-#define RMT_CARRIER_HIGH_CH0  0x0000FFFF
-#define RMT_CARRIER_HIGH_CH0_M  ((RMT_CARRIER_HIGH_CH0_V)<<(RMT_CARRIER_HIGH_CH0_S))
-#define RMT_CARRIER_HIGH_CH0_V  0xFFFF
-#define RMT_CARRIER_HIGH_CH0_S  16
-/* RMT_CARRIER_LOW_CH0 : R/W ;bitpos:[15:0] ;default: 16'h40 ; */
-/*description: */
-#define RMT_CARRIER_LOW_CH0  0x0000FFFF
-#define RMT_CARRIER_LOW_CH0_M  ((RMT_CARRIER_LOW_CH0_V)<<(RMT_CARRIER_LOW_CH0_S))
-#define RMT_CARRIER_LOW_CH0_V  0xFFFF
+/** RMT_CH0CARRIER_DUTY_REG register
+ *  Channel 0 duty cycle configuration register
+ */
+#define RMT_CH0CARRIER_DUTY_REG (DR_REG_RMT_BASE + 0x60)
+/** RMT_CARRIER_LOW_CH0 : R/W; bitpos: [15:0]; default: 64;
+ *  This field is used to configure the clock cycles of carrier wave at low level for
+ *  channel 0.
+ */
+#define RMT_CARRIER_LOW_CH0    0x0000FFFFU
+#define RMT_CARRIER_LOW_CH0_M  (RMT_CARRIER_LOW_CH0_V << RMT_CARRIER_LOW_CH0_S)
+#define RMT_CARRIER_LOW_CH0_V  0x0000FFFFU
 #define RMT_CARRIER_LOW_CH0_S  0
+/** RMT_CARRIER_HIGH_CH0 : R/W; bitpos: [31:16]; default: 64;
+ *  This field is used to configure the clock cycles of carrier wave at high level for
+ *  channel 0.
+ */
+#define RMT_CARRIER_HIGH_CH0    0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH0_M  (RMT_CARRIER_HIGH_CH0_V << RMT_CARRIER_HIGH_CH0_S)
+#define RMT_CARRIER_HIGH_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH0_S  16
 
-#define RMT_CH1CARRIER_DUTY_REG          (DR_REG_RMT_BASE + 0x0064)
-/* RMT_CARRIER_HIGH_CH1 : R/W ;bitpos:[31:16] ;default: 16'h40 ; */
-/*description: */
-#define RMT_CARRIER_HIGH_CH1  0x0000FFFF
-#define RMT_CARRIER_HIGH_CH1_M  ((RMT_CARRIER_HIGH_CH1_V)<<(RMT_CARRIER_HIGH_CH1_S))
-#define RMT_CARRIER_HIGH_CH1_V  0xFFFF
-#define RMT_CARRIER_HIGH_CH1_S  16
-/* RMT_CARRIER_LOW_CH1 : R/W ;bitpos:[15:0] ;default: 16'h40 ; */
-/*description: */
-#define RMT_CARRIER_LOW_CH1  0x0000FFFF
-#define RMT_CARRIER_LOW_CH1_M  ((RMT_CARRIER_LOW_CH1_V)<<(RMT_CARRIER_LOW_CH1_S))
-#define RMT_CARRIER_LOW_CH1_V  0xFFFF
-#define RMT_CARRIER_LOW_CH1_S  0
+/** RMT_CH1CARRIER_DUTY_REG register
+ *  Channel 1 duty cycle configuration register
+ */
+#define RMT_CH1CARRIER_DUTY_REG (DR_REG_RMT_BASE + 0x64)
+/** RMT_CARRIER_LOW_CH0 : R/W; bitpos: [15:0]; default: 64;
+ *  This field is used to configure the clock cycles of carrier wave at low level for
+ *  channel 1.
+ */
+#define RMT_CARRIER_LOW_CH0    0x0000FFFFU
+#define RMT_CARRIER_LOW_CH0_M  (RMT_CARRIER_LOW_CH0_V << RMT_CARRIER_LOW_CH0_S)
+#define RMT_CARRIER_LOW_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_CH0_S  0
+/** RMT_CARRIER_HIGH_CH0 : R/W; bitpos: [31:16]; default: 64;
+ *  This field is used to configure the clock cycles of carrier wave at high level for
+ *  channel 1.
+ */
+#define RMT_CARRIER_HIGH_CH0    0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH0_M  (RMT_CARRIER_HIGH_CH0_V << RMT_CARRIER_HIGH_CH0_S)
+#define RMT_CARRIER_HIGH_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH0_S  16
 
-#define RMT_CH2CARRIER_DUTY_REG          (DR_REG_RMT_BASE + 0x0068)
-/* RMT_CARRIER_HIGH_CH2 : R/W ;bitpos:[31:16] ;default: 16'h40 ; */
-/*description: */
-#define RMT_CARRIER_HIGH_CH2  0x0000FFFF
-#define RMT_CARRIER_HIGH_CH2_M  ((RMT_CARRIER_HIGH_CH2_V)<<(RMT_CARRIER_HIGH_CH2_S))
-#define RMT_CARRIER_HIGH_CH2_V  0xFFFF
-#define RMT_CARRIER_HIGH_CH2_S  16
-/* RMT_CARRIER_LOW_CH2 : R/W ;bitpos:[15:0] ;default: 16'h40 ; */
-/*description: */
-#define RMT_CARRIER_LOW_CH2  0x0000FFFF
-#define RMT_CARRIER_LOW_CH2_M  ((RMT_CARRIER_LOW_CH2_V)<<(RMT_CARRIER_LOW_CH2_S))
-#define RMT_CARRIER_LOW_CH2_V  0xFFFF
-#define RMT_CARRIER_LOW_CH2_S  0
+/** RMT_CH2CARRIER_DUTY_REG register
+ *  Channel 2 duty cycle configuration register
+ */
+#define RMT_CH2CARRIER_DUTY_REG (DR_REG_RMT_BASE + 0x68)
+/** RMT_CARRIER_LOW_CH0 : R/W; bitpos: [15:0]; default: 64;
+ *  This field is used to configure the clock cycles of carrier wave at low level for
+ *  channel 2.
+ */
+#define RMT_CARRIER_LOW_CH0    0x0000FFFFU
+#define RMT_CARRIER_LOW_CH0_M  (RMT_CARRIER_LOW_CH0_V << RMT_CARRIER_LOW_CH0_S)
+#define RMT_CARRIER_LOW_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_CH0_S  0
+/** RMT_CARRIER_HIGH_CH0 : R/W; bitpos: [31:16]; default: 64;
+ *  This field is used to configure the clock cycles of carrier wave at high level for
+ *  channel 2.
+ */
+#define RMT_CARRIER_HIGH_CH0    0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH0_M  (RMT_CARRIER_HIGH_CH0_V << RMT_CARRIER_HIGH_CH0_S)
+#define RMT_CARRIER_HIGH_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH0_S  16
 
-#define RMT_CH3CARRIER_DUTY_REG          (DR_REG_RMT_BASE + 0x006c)
-/* RMT_CARRIER_HIGH_CH3 : R/W ;bitpos:[31:16] ;default: 16'h40 ; */
-/*description: */
-#define RMT_CARRIER_HIGH_CH3  0x0000FFFF
-#define RMT_CARRIER_HIGH_CH3_M  ((RMT_CARRIER_HIGH_CH3_V)<<(RMT_CARRIER_HIGH_CH3_S))
-#define RMT_CARRIER_HIGH_CH3_V  0xFFFF
-#define RMT_CARRIER_HIGH_CH3_S  16
-/* RMT_CARRIER_LOW_CH3 : R/W ;bitpos:[15:0] ;default: 16'h40 ; */
-/*description: */
-#define RMT_CARRIER_LOW_CH3  0x0000FFFF
-#define RMT_CARRIER_LOW_CH3_M  ((RMT_CARRIER_LOW_CH3_V)<<(RMT_CARRIER_LOW_CH3_S))
-#define RMT_CARRIER_LOW_CH3_V  0xFFFF
-#define RMT_CARRIER_LOW_CH3_S  0
+/** RMT_CH3CARRIER_DUTY_REG register
+ *  Channel 3 duty cycle configuration register
+ */
+#define RMT_CH3CARRIER_DUTY_REG (DR_REG_RMT_BASE + 0x6c)
+/** RMT_CARRIER_LOW_CH0 : R/W; bitpos: [15:0]; default: 64;
+ *  This field is used to configure the clock cycles of carrier wave at low level for
+ *  channel 3.
+ */
+#define RMT_CARRIER_LOW_CH0    0x0000FFFFU
+#define RMT_CARRIER_LOW_CH0_M  (RMT_CARRIER_LOW_CH0_V << RMT_CARRIER_LOW_CH0_S)
+#define RMT_CARRIER_LOW_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_CH0_S  0
+/** RMT_CARRIER_HIGH_CH0 : R/W; bitpos: [31:16]; default: 64;
+ *  This field is used to configure the clock cycles of carrier wave at high level for
+ *  channel 3.
+ */
+#define RMT_CARRIER_HIGH_CH0    0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH0_M  (RMT_CARRIER_HIGH_CH0_V << RMT_CARRIER_HIGH_CH0_S)
+#define RMT_CARRIER_HIGH_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH0_S  16
 
-#define RMT_CH0_TX_LIM_REG          (DR_REG_RMT_BASE + 0x0070)
-/* RMT_RX_LIM_CH0 : R/W ;bitpos:[29:21] ;default: 9'h80 ; */
-/*description: */
-#define RMT_RX_LIM_CH0  0x000001FF
-#define RMT_RX_LIM_CH0_M  ((RMT_RX_LIM_CH0_V)<<(RMT_RX_LIM_CH0_S))
-#define RMT_RX_LIM_CH0_V  0x1FF
-#define RMT_RX_LIM_CH0_S  21
-/* RMT_LOOP_COUNT_RESET_CH0 : WO ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_LOOP_COUNT_RESET_CH0  (BIT(20))
-#define RMT_LOOP_COUNT_RESET_CH0_M  (BIT(20))
-#define RMT_LOOP_COUNT_RESET_CH0_V  0x1
-#define RMT_LOOP_COUNT_RESET_CH0_S  20
-/* RMT_TX_LOOP_CNT_EN_CH0 : R/W ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_LOOP_CNT_EN_CH0  (BIT(19))
-#define RMT_TX_LOOP_CNT_EN_CH0_M  (BIT(19))
-#define RMT_TX_LOOP_CNT_EN_CH0_V  0x1
-#define RMT_TX_LOOP_CNT_EN_CH0_S  19
-/* RMT_TX_LOOP_NUM_CH0 : R/W ;bitpos:[18:9] ;default: 10'b0 ; */
-/*description: */
-#define RMT_TX_LOOP_NUM_CH0  0x000003FF
-#define RMT_TX_LOOP_NUM_CH0_M  ((RMT_TX_LOOP_NUM_CH0_V)<<(RMT_TX_LOOP_NUM_CH0_S))
-#define RMT_TX_LOOP_NUM_CH0_V  0x3FF
-#define RMT_TX_LOOP_NUM_CH0_S  9
-/* RMT_TX_LIM_CH0 : R/W ;bitpos:[8:0] ;default: 9'h80 ; */
-/*description: */
-#define RMT_TX_LIM_CH0  0x000001FF
-#define RMT_TX_LIM_CH0_M  ((RMT_TX_LIM_CH0_V)<<(RMT_TX_LIM_CH0_S))
-#define RMT_TX_LIM_CH0_V  0x1FF
+/** RMT_CH0_TX_LIM_REG register
+ *  Channel 0 Tx event configuration register
+ */
+#define RMT_CH0_TX_LIM_REG (DR_REG_RMT_BASE + 0x70)
+/** RMT_TX_LIM_CH0 : R/W; bitpos: [8:0]; default: 128;
+ *  This field is used to configure the maximum entries that channel 0 can send out.
+ *  When RMT_MEM_SIZE_CH0 = 1, this field can be set to any value among 0 ~ 128
+ *  (64*32/16 = 128). When RMT_MEM_SIZE_CH0 > 1, this field can be set to any value
+ *  among (0 ~ 128)*RMT_MEM_SIZE_CH0.
+ */
+#define RMT_TX_LIM_CH0    0x000001FFU
+#define RMT_TX_LIM_CH0_M  (RMT_TX_LIM_CH0_V << RMT_TX_LIM_CH0_S)
+#define RMT_TX_LIM_CH0_V  0x000001FFU
 #define RMT_TX_LIM_CH0_S  0
+/** RMT_TX_LOOP_NUM_CH0 : R/W; bitpos: [18:9]; default: 0;
+ *  This field is used to configure the maximum loop times when continuous transmission
+ *  mode is enabled.
+ */
+#define RMT_TX_LOOP_NUM_CH0    0x000003FFU
+#define RMT_TX_LOOP_NUM_CH0_M  (RMT_TX_LOOP_NUM_CH0_V << RMT_TX_LOOP_NUM_CH0_S)
+#define RMT_TX_LOOP_NUM_CH0_V  0x000003FFU
+#define RMT_TX_LOOP_NUM_CH0_S  9
+/** RMT_TX_LOOP_CNT_EN_CH0 : R/W; bitpos: [19]; default: 0;
+ *  This bit is used to enable loop counting.
+ */
+#define RMT_TX_LOOP_CNT_EN_CH0    (BIT(19))
+#define RMT_TX_LOOP_CNT_EN_CH0_M  (RMT_TX_LOOP_CNT_EN_CH0_V << RMT_TX_LOOP_CNT_EN_CH0_S)
+#define RMT_TX_LOOP_CNT_EN_CH0_V  0x00000001U
+#define RMT_TX_LOOP_CNT_EN_CH0_S  19
+/** RMT_LOOP_COUNT_RESET_CH0 : WO; bitpos: [20]; default: 0;
+ *  This bit is used to reset loop counting when continuous transmission mode is valid.
+ */
+#define RMT_LOOP_COUNT_RESET_CH0    (BIT(20))
+#define RMT_LOOP_COUNT_RESET_CH0_M  (RMT_LOOP_COUNT_RESET_CH0_V << RMT_LOOP_COUNT_RESET_CH0_S)
+#define RMT_LOOP_COUNT_RESET_CH0_V  0x00000001U
+#define RMT_LOOP_COUNT_RESET_CH0_S  20
 
-#define RMT_CH1_TX_LIM_REG          (DR_REG_RMT_BASE + 0x0074)
-/* RMT_RX_LIM_CH1 : R/W ;bitpos:[29:21] ;default: 9'h80 ; */
-/*description: */
-#define RMT_RX_LIM_CH1  0x000001FF
-#define RMT_RX_LIM_CH1_M  ((RMT_RX_LIM_CH1_V)<<(RMT_RX_LIM_CH1_S))
-#define RMT_RX_LIM_CH1_V  0x1FF
-#define RMT_RX_LIM_CH1_S  21
-/* RMT_LOOP_COUNT_RESET_CH1 : WO ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_LOOP_COUNT_RESET_CH1  (BIT(20))
-#define RMT_LOOP_COUNT_RESET_CH1_M  (BIT(20))
-#define RMT_LOOP_COUNT_RESET_CH1_V  0x1
-#define RMT_LOOP_COUNT_RESET_CH1_S  20
-/* RMT_TX_LOOP_CNT_EN_CH1 : R/W ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_LOOP_CNT_EN_CH1  (BIT(19))
-#define RMT_TX_LOOP_CNT_EN_CH1_M  (BIT(19))
-#define RMT_TX_LOOP_CNT_EN_CH1_V  0x1
-#define RMT_TX_LOOP_CNT_EN_CH1_S  19
-/* RMT_TX_LOOP_NUM_CH1 : R/W ;bitpos:[18:9] ;default: 10'b0 ; */
-/*description: */
-#define RMT_TX_LOOP_NUM_CH1  0x000003FF
-#define RMT_TX_LOOP_NUM_CH1_M  ((RMT_TX_LOOP_NUM_CH1_V)<<(RMT_TX_LOOP_NUM_CH1_S))
-#define RMT_TX_LOOP_NUM_CH1_V  0x3FF
-#define RMT_TX_LOOP_NUM_CH1_S  9
-/* RMT_TX_LIM_CH1 : R/W ;bitpos:[8:0] ;default: 9'h80 ; */
-/*description: */
-#define RMT_TX_LIM_CH1  0x000001FF
-#define RMT_TX_LIM_CH1_M  ((RMT_TX_LIM_CH1_V)<<(RMT_TX_LIM_CH1_S))
-#define RMT_TX_LIM_CH1_V  0x1FF
-#define RMT_TX_LIM_CH1_S  0
+/** RMT_CH1_TX_LIM_REG register
+ *  Channel 1 Tx event configuration register
+ */
+#define RMT_CH1_TX_LIM_REG (DR_REG_RMT_BASE + 0x74)
+/** RMT_TX_LIM_CH0 : R/W; bitpos: [8:0]; default: 128;
+ *  This field is used to configure the maximum entries that channel 1 can send out.
+ *  When RMT_MEM_SIZE_CH1 = 1, this field can be set to any value among 0 ~ 128
+ *  (64*32/16 = 128). When RMT_MEM_SIZE_CH1 > 1, this field can be set to any value
+ *  among (0 ~ 128)*RMT_MEM_SIZE_CH1.
+ */
+#define RMT_TX_LIM_CH0    0x000001FFU
+#define RMT_TX_LIM_CH0_M  (RMT_TX_LIM_CH0_V << RMT_TX_LIM_CH0_S)
+#define RMT_TX_LIM_CH0_V  0x000001FFU
+#define RMT_TX_LIM_CH0_S  0
+/** RMT_TX_LOOP_NUM_CH0 : R/W; bitpos: [18:9]; default: 0;
+ *  This field is used to configure the maximum loop times when continuous transmission
+ *  mode is enabled.
+ */
+#define RMT_TX_LOOP_NUM_CH0    0x000003FFU
+#define RMT_TX_LOOP_NUM_CH0_M  (RMT_TX_LOOP_NUM_CH0_V << RMT_TX_LOOP_NUM_CH0_S)
+#define RMT_TX_LOOP_NUM_CH0_V  0x000003FFU
+#define RMT_TX_LOOP_NUM_CH0_S  9
+/** RMT_TX_LOOP_CNT_EN_CH0 : R/W; bitpos: [19]; default: 0;
+ *  This bit is used to enable loop counting.
+ */
+#define RMT_TX_LOOP_CNT_EN_CH0    (BIT(19))
+#define RMT_TX_LOOP_CNT_EN_CH0_M  (RMT_TX_LOOP_CNT_EN_CH0_V << RMT_TX_LOOP_CNT_EN_CH0_S)
+#define RMT_TX_LOOP_CNT_EN_CH0_V  0x00000001U
+#define RMT_TX_LOOP_CNT_EN_CH0_S  19
+/** RMT_LOOP_COUNT_RESET_CH0 : WO; bitpos: [20]; default: 0;
+ *  This bit is used to reset loop counting when continuous transmission mode is valid.
+ */
+#define RMT_LOOP_COUNT_RESET_CH0    (BIT(20))
+#define RMT_LOOP_COUNT_RESET_CH0_M  (RMT_LOOP_COUNT_RESET_CH0_V << RMT_LOOP_COUNT_RESET_CH0_S)
+#define RMT_LOOP_COUNT_RESET_CH0_V  0x00000001U
+#define RMT_LOOP_COUNT_RESET_CH0_S  20
 
-#define RMT_CH2_TX_LIM_REG          (DR_REG_RMT_BASE + 0x0078)
-/* RMT_RX_LIM_CH2 : R/W ;bitpos:[29:21] ;default: 9'h80 ; */
-/*description: */
-#define RMT_RX_LIM_CH2  0x000001FF
-#define RMT_RX_LIM_CH2_M  ((RMT_RX_LIM_CH2_V)<<(RMT_RX_LIM_CH2_S))
-#define RMT_RX_LIM_CH2_V  0x1FF
-#define RMT_RX_LIM_CH2_S  21
-/* RMT_LOOP_COUNT_RESET_CH2 : WO ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_LOOP_COUNT_RESET_CH2  (BIT(20))
-#define RMT_LOOP_COUNT_RESET_CH2_M  (BIT(20))
-#define RMT_LOOP_COUNT_RESET_CH2_V  0x1
-#define RMT_LOOP_COUNT_RESET_CH2_S  20
-/* RMT_TX_LOOP_CNT_EN_CH2 : R/W ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_LOOP_CNT_EN_CH2  (BIT(19))
-#define RMT_TX_LOOP_CNT_EN_CH2_M  (BIT(19))
-#define RMT_TX_LOOP_CNT_EN_CH2_V  0x1
-#define RMT_TX_LOOP_CNT_EN_CH2_S  19
-/* RMT_TX_LOOP_NUM_CH2 : R/W ;bitpos:[18:9] ;default: 10'b0 ; */
-/*description: */
-#define RMT_TX_LOOP_NUM_CH2  0x000003FF
-#define RMT_TX_LOOP_NUM_CH2_M  ((RMT_TX_LOOP_NUM_CH2_V)<<(RMT_TX_LOOP_NUM_CH2_S))
-#define RMT_TX_LOOP_NUM_CH2_V  0x3FF
-#define RMT_TX_LOOP_NUM_CH2_S  9
-/* RMT_TX_LIM_CH2 : R/W ;bitpos:[8:0] ;default: 9'h80 ; */
-/*description: */
-#define RMT_TX_LIM_CH2  0x000001FF
-#define RMT_TX_LIM_CH2_M  ((RMT_TX_LIM_CH2_V)<<(RMT_TX_LIM_CH2_S))
-#define RMT_TX_LIM_CH2_V  0x1FF
-#define RMT_TX_LIM_CH2_S  0
+/** RMT_CH2_TX_LIM_REG register
+ *  Channel 2 Tx event configuration register
+ */
+#define RMT_CH2_TX_LIM_REG (DR_REG_RMT_BASE + 0x78)
+/** RMT_TX_LIM_CH0 : R/W; bitpos: [8:0]; default: 128;
+ *  This field is used to configure the maximum entries that channel 2 can send out.
+ *  When RMT_MEM_SIZE_CH2 = 1, this field can be set to any value among 0 ~ 128
+ *  (64*32/16 = 128). When RMT_MEM_SIZE_CH2 > 1, this field can be set to any value
+ *  among (0 ~ 128)*RMT_MEM_SIZE_CH2.
+ */
+#define RMT_TX_LIM_CH0    0x000001FFU
+#define RMT_TX_LIM_CH0_M  (RMT_TX_LIM_CH0_V << RMT_TX_LIM_CH0_S)
+#define RMT_TX_LIM_CH0_V  0x000001FFU
+#define RMT_TX_LIM_CH0_S  0
+/** RMT_TX_LOOP_NUM_CH0 : R/W; bitpos: [18:9]; default: 0;
+ *  This field is used to configure the maximum loop times when continuous transmission
+ *  mode is enabled.
+ */
+#define RMT_TX_LOOP_NUM_CH0    0x000003FFU
+#define RMT_TX_LOOP_NUM_CH0_M  (RMT_TX_LOOP_NUM_CH0_V << RMT_TX_LOOP_NUM_CH0_S)
+#define RMT_TX_LOOP_NUM_CH0_V  0x000003FFU
+#define RMT_TX_LOOP_NUM_CH0_S  9
+/** RMT_TX_LOOP_CNT_EN_CH0 : R/W; bitpos: [19]; default: 0;
+ *  This bit is used to enable loop counting.
+ */
+#define RMT_TX_LOOP_CNT_EN_CH0    (BIT(19))
+#define RMT_TX_LOOP_CNT_EN_CH0_M  (RMT_TX_LOOP_CNT_EN_CH0_V << RMT_TX_LOOP_CNT_EN_CH0_S)
+#define RMT_TX_LOOP_CNT_EN_CH0_V  0x00000001U
+#define RMT_TX_LOOP_CNT_EN_CH0_S  19
+/** RMT_LOOP_COUNT_RESET_CH0 : WO; bitpos: [20]; default: 0;
+ *  This bit is used to reset loop counting when continuous transmission mode is valid.
+ */
+#define RMT_LOOP_COUNT_RESET_CH0    (BIT(20))
+#define RMT_LOOP_COUNT_RESET_CH0_M  (RMT_LOOP_COUNT_RESET_CH0_V << RMT_LOOP_COUNT_RESET_CH0_S)
+#define RMT_LOOP_COUNT_RESET_CH0_V  0x00000001U
+#define RMT_LOOP_COUNT_RESET_CH0_S  20
 
-#define RMT_CH3_TX_LIM_REG          (DR_REG_RMT_BASE + 0x007c)
-/* RMT_RX_LIM_CH3 : R/W ;bitpos:[29:21] ;default: 9'h80 ; */
-/*description: */
-#define RMT_RX_LIM_CH3  0x000001FF
-#define RMT_RX_LIM_CH3_M  ((RMT_RX_LIM_CH3_V)<<(RMT_RX_LIM_CH3_S))
-#define RMT_RX_LIM_CH3_V  0x1FF
-#define RMT_RX_LIM_CH3_S  21
-/* RMT_LOOP_COUNT_RESET_CH3 : WO ;bitpos:[20] ;default: 1'b0 ; */
-/*description: */
-#define RMT_LOOP_COUNT_RESET_CH3  (BIT(20))
-#define RMT_LOOP_COUNT_RESET_CH3_M  (BIT(20))
-#define RMT_LOOP_COUNT_RESET_CH3_V  0x1
-#define RMT_LOOP_COUNT_RESET_CH3_S  20
-/* RMT_TX_LOOP_CNT_EN_CH3 : R/W ;bitpos:[19] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_LOOP_CNT_EN_CH3  (BIT(19))
-#define RMT_TX_LOOP_CNT_EN_CH3_M  (BIT(19))
-#define RMT_TX_LOOP_CNT_EN_CH3_V  0x1
-#define RMT_TX_LOOP_CNT_EN_CH3_S  19
-/* RMT_TX_LOOP_NUM_CH3 : R/W ;bitpos:[18:9] ;default: 10'b0 ; */
-/*description: */
-#define RMT_TX_LOOP_NUM_CH3  0x000003FF
-#define RMT_TX_LOOP_NUM_CH3_M  ((RMT_TX_LOOP_NUM_CH3_V)<<(RMT_TX_LOOP_NUM_CH3_S))
-#define RMT_TX_LOOP_NUM_CH3_V  0x3FF
-#define RMT_TX_LOOP_NUM_CH3_S  9
-/* RMT_TX_LIM_CH3 : R/W ;bitpos:[8:0] ;default: 9'h80 ; */
-/*description: */
-#define RMT_TX_LIM_CH3  0x000001FF
-#define RMT_TX_LIM_CH3_M  ((RMT_TX_LIM_CH3_V)<<(RMT_TX_LIM_CH3_S))
-#define RMT_TX_LIM_CH3_V  0x1FF
-#define RMT_TX_LIM_CH3_S  0
+/** RMT_CH3_TX_LIM_REG register
+ *  Channel 3 Tx event configuration register
+ */
+#define RMT_CH3_TX_LIM_REG (DR_REG_RMT_BASE + 0x7c)
+/** RMT_TX_LIM_CH0 : R/W; bitpos: [8:0]; default: 128;
+ *  This field is used to configure the maximum entries that channel 3 can send out.
+ *  When RMT_MEM_SIZE_CH3 = 1, this field can be set to any value among 0 ~ 128
+ *  (64*32/16 = 128). When RMT_MEM_SIZE_CH3 > 1, this field can be set to any value
+ *  among (0 ~ 128)*RMT_MEM_SIZE_CH3.
+ */
+#define RMT_TX_LIM_CH0    0x000001FFU
+#define RMT_TX_LIM_CH0_M  (RMT_TX_LIM_CH0_V << RMT_TX_LIM_CH0_S)
+#define RMT_TX_LIM_CH0_V  0x000001FFU
+#define RMT_TX_LIM_CH0_S  0
+/** RMT_TX_LOOP_NUM_CH0 : R/W; bitpos: [18:9]; default: 0;
+ *  This field is used to configure the maximum loop times when continuous transmission
+ *  mode is enabled.
+ */
+#define RMT_TX_LOOP_NUM_CH0    0x000003FFU
+#define RMT_TX_LOOP_NUM_CH0_M  (RMT_TX_LOOP_NUM_CH0_V << RMT_TX_LOOP_NUM_CH0_S)
+#define RMT_TX_LOOP_NUM_CH0_V  0x000003FFU
+#define RMT_TX_LOOP_NUM_CH0_S  9
+/** RMT_TX_LOOP_CNT_EN_CH0 : R/W; bitpos: [19]; default: 0;
+ *  This bit is used to enable loop counting.
+ */
+#define RMT_TX_LOOP_CNT_EN_CH0    (BIT(19))
+#define RMT_TX_LOOP_CNT_EN_CH0_M  (RMT_TX_LOOP_CNT_EN_CH0_V << RMT_TX_LOOP_CNT_EN_CH0_S)
+#define RMT_TX_LOOP_CNT_EN_CH0_V  0x00000001U
+#define RMT_TX_LOOP_CNT_EN_CH0_S  19
+/** RMT_LOOP_COUNT_RESET_CH0 : WO; bitpos: [20]; default: 0;
+ *  This bit is used to reset loop counting when continuous transmission mode is valid.
+ */
+#define RMT_LOOP_COUNT_RESET_CH0    (BIT(20))
+#define RMT_LOOP_COUNT_RESET_CH0_M  (RMT_LOOP_COUNT_RESET_CH0_V << RMT_LOOP_COUNT_RESET_CH0_S)
+#define RMT_LOOP_COUNT_RESET_CH0_V  0x00000001U
+#define RMT_LOOP_COUNT_RESET_CH0_S  20
 
-#define RMT_APB_CONF_REG          (DR_REG_RMT_BASE + 0x0080)
-/* RMT_CLK_EN : R/W ;bitpos:[31] ;default: 1'h0 ; */
-/*description: */
-#define RMT_CLK_EN  (BIT(31))
-#define RMT_CLK_EN_M  (BIT(31))
-#define RMT_CLK_EN_V  0x1
-#define RMT_CLK_EN_S  31
-/* RMT_MEM_FORCE_PU : R/W ;bitpos:[4] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_FORCE_PU  (BIT(4))
-#define RMT_MEM_FORCE_PU_M  (BIT(4))
-#define RMT_MEM_FORCE_PU_V  0x1
-#define RMT_MEM_FORCE_PU_S  4
-/* RMT_MEM_FORCE_PD : R/W ;bitpos:[3] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_FORCE_PD  (BIT(3))
-#define RMT_MEM_FORCE_PD_M  (BIT(3))
-#define RMT_MEM_FORCE_PD_V  0x1
-#define RMT_MEM_FORCE_PD_S  3
-/* RMT_MEM_CLK_FORCE_ON : R/W ;bitpos:[2] ;default: 1'b1 ; */
-/*description: */
-#define RMT_MEM_CLK_FORCE_ON  (BIT(2))
-#define RMT_MEM_CLK_FORCE_ON_M  (BIT(2))
-#define RMT_MEM_CLK_FORCE_ON_V  0x1
-#define RMT_MEM_CLK_FORCE_ON_S  2
-/* RMT_MEM_TX_WRAP_EN : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: */
-#define RMT_MEM_TX_WRAP_EN  (BIT(1))
-#define RMT_MEM_TX_WRAP_EN_M  (BIT(1))
-#define RMT_MEM_TX_WRAP_EN_V  0x1
-#define RMT_MEM_TX_WRAP_EN_S  1
-/* RMT_APB_FIFO_MASK : R/W ;bitpos:[0] ;default: 1'h0 ; */
-/*description: */
-#define RMT_APB_FIFO_MASK  (BIT(0))
-#define RMT_APB_FIFO_MASK_M  (BIT(0))
-#define RMT_APB_FIFO_MASK_V  0x1
+/** RMT_APB_CONF_REG register
+ *  RMT APB configuration register
+ */
+#define RMT_APB_CONF_REG (DR_REG_RMT_BASE + 0x80)
+/** RMT_APB_FIFO_MASK : R/W; bitpos: [0]; default: 0;
+ *  1'h1: Access memory directly.  1'h0: access memory via APB FIFO.
+ */
+#define RMT_APB_FIFO_MASK    (BIT(0))
+#define RMT_APB_FIFO_MASK_M  (RMT_APB_FIFO_MASK_V << RMT_APB_FIFO_MASK_S)
+#define RMT_APB_FIFO_MASK_V  0x00000001U
 #define RMT_APB_FIFO_MASK_S  0
+/** RMT_MEM_TX_WRAP_EN : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to enable wrap mode.
+ */
+#define RMT_MEM_TX_WRAP_EN    (BIT(1))
+#define RMT_MEM_TX_WRAP_EN_M  (RMT_MEM_TX_WRAP_EN_V << RMT_MEM_TX_WRAP_EN_S)
+#define RMT_MEM_TX_WRAP_EN_V  0x00000001U
+#define RMT_MEM_TX_WRAP_EN_S  1
+/** RMT_MEM_CLK_FORCE_ON : R/W; bitpos: [2]; default: 1;
+ *  Set this bit to enable the clock for RAM when RMT module starts working, disable
+ *  this clock when RMT stops working, to achieve low-power scheme.
+ */
+#define RMT_MEM_CLK_FORCE_ON    (BIT(2))
+#define RMT_MEM_CLK_FORCE_ON_M  (RMT_MEM_CLK_FORCE_ON_V << RMT_MEM_CLK_FORCE_ON_S)
+#define RMT_MEM_CLK_FORCE_ON_V  0x00000001U
+#define RMT_MEM_CLK_FORCE_ON_S  2
+/** RMT_MEM_FORCE_PD : R/W; bitpos: [3]; default: 0;
+ *  Set this bit to power down RMT memory.
+ */
+#define RMT_MEM_FORCE_PD    (BIT(3))
+#define RMT_MEM_FORCE_PD_M  (RMT_MEM_FORCE_PD_V << RMT_MEM_FORCE_PD_S)
+#define RMT_MEM_FORCE_PD_V  0x00000001U
+#define RMT_MEM_FORCE_PD_S  3
+/** RMT_MEM_FORCE_PU : R/W; bitpos: [4]; default: 0;
+ *  1: Disable RAM's Light-sleep power down function. 0: power down RMT RAM when RMT is
+ *  in Light-sleep mode.
+ */
+#define RMT_MEM_FORCE_PU    (BIT(4))
+#define RMT_MEM_FORCE_PU_M  (RMT_MEM_FORCE_PU_V << RMT_MEM_FORCE_PU_S)
+#define RMT_MEM_FORCE_PU_V  0x00000001U
+#define RMT_MEM_FORCE_PU_S  4
+/** RMT_CLK_EN : R/W; bitpos: [31]; default: 0;
+ *  Clock gating enable bit for RMT registers to achieve low-power scheme. 1: Power up
+ *  drive clock for RMT registers. 0: Power down drive clock for RMT registers.
+ */
+#define RMT_CLK_EN    (BIT(31))
+#define RMT_CLK_EN_M  (RMT_CLK_EN_V << RMT_CLK_EN_S)
+#define RMT_CLK_EN_V  0x00000001U
+#define RMT_CLK_EN_S  31
 
-#define RMT_TX_SIM_REG          (DR_REG_RMT_BASE + 0x0084)
-/* RMT_TX_SIM_EN : R/W ;bitpos:[4] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_SIM_EN  (BIT(4))
-#define RMT_TX_SIM_EN_M  (BIT(4))
-#define RMT_TX_SIM_EN_V  0x1
-#define RMT_TX_SIM_EN_S  4
-/* RMT_TX_SIM_CH3 : R/W ;bitpos:[3] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_SIM_CH3  (BIT(3))
-#define RMT_TX_SIM_CH3_M  (BIT(3))
-#define RMT_TX_SIM_CH3_V  0x1
-#define RMT_TX_SIM_CH3_S  3
-/* RMT_TX_SIM_CH2 : R/W ;bitpos:[2] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_SIM_CH2  (BIT(2))
-#define RMT_TX_SIM_CH2_M  (BIT(2))
-#define RMT_TX_SIM_CH2_V  0x1
-#define RMT_TX_SIM_CH2_S  2
-/* RMT_TX_SIM_CH1 : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_SIM_CH1  (BIT(1))
-#define RMT_TX_SIM_CH1_M  (BIT(1))
-#define RMT_TX_SIM_CH1_V  0x1
-#define RMT_TX_SIM_CH1_S  1
-/* RMT_TX_SIM_CH0 : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: */
-#define RMT_TX_SIM_CH0  (BIT(0))
-#define RMT_TX_SIM_CH0_M  (BIT(0))
-#define RMT_TX_SIM_CH0_V  0x1
+/** RMT_TX_SIM_REG register
+ *  Enable RMT simultaneous transmission
+ */
+#define RMT_TX_SIM_REG (DR_REG_RMT_BASE + 0x84)
+/** RMT_TX_SIM_CH0 : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to enable channel 0 to start sending data simultaneously with other
+ *  enabled channels.
+ */
+#define RMT_TX_SIM_CH0    (BIT(0))
+#define RMT_TX_SIM_CH0_M  (RMT_TX_SIM_CH0_V << RMT_TX_SIM_CH0_S)
+#define RMT_TX_SIM_CH0_V  0x00000001U
 #define RMT_TX_SIM_CH0_S  0
+/** RMT_TX_SIM_CH1 : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to enable channel 1 to start sending data simultaneously with other
+ *  enabled channels.
+ */
+#define RMT_TX_SIM_CH1    (BIT(1))
+#define RMT_TX_SIM_CH1_M  (RMT_TX_SIM_CH1_V << RMT_TX_SIM_CH1_S)
+#define RMT_TX_SIM_CH1_V  0x00000001U
+#define RMT_TX_SIM_CH1_S  1
+/** RMT_TX_SIM_CH2 : R/W; bitpos: [2]; default: 0;
+ *  Set this bit to enable channel 2 to start sending data simultaneously with other
+ *  enabled channels.
+ */
+#define RMT_TX_SIM_CH2    (BIT(2))
+#define RMT_TX_SIM_CH2_M  (RMT_TX_SIM_CH2_V << RMT_TX_SIM_CH2_S)
+#define RMT_TX_SIM_CH2_V  0x00000001U
+#define RMT_TX_SIM_CH2_S  2
+/** RMT_TX_SIM_CH3 : R/W; bitpos: [3]; default: 0;
+ *  Set this bit to enable channel 3 to start sending data simultaneously with other
+ *  enabled channels.
+ */
+#define RMT_TX_SIM_CH3    (BIT(3))
+#define RMT_TX_SIM_CH3_M  (RMT_TX_SIM_CH3_V << RMT_TX_SIM_CH3_S)
+#define RMT_TX_SIM_CH3_V  0x00000001U
+#define RMT_TX_SIM_CH3_S  3
+/** RMT_TX_SIM_EN : R/W; bitpos: [4]; default: 0;
+ *  This bit is used to enable multiple channels to start sending data simultaneously.
+ */
+#define RMT_TX_SIM_EN    (BIT(4))
+#define RMT_TX_SIM_EN_M  (RMT_TX_SIM_EN_V << RMT_TX_SIM_EN_S)
+#define RMT_TX_SIM_EN_V  0x00000001U
+#define RMT_TX_SIM_EN_S  4
 
-#define RMT_REF_CNT_RST_REG          (DR_REG_RMT_BASE + 0x0088)
-/* RMT_REF_CNT_RST_CH3 : R/W ;bitpos:[3] ;default: 1'b0 ; */
-/*description: */
-#define RMT_REF_CNT_RST_CH3  (BIT(3))
-#define RMT_REF_CNT_RST_CH3_M  (BIT(3))
-#define RMT_REF_CNT_RST_CH3_V  0x1
-#define RMT_REF_CNT_RST_CH3_S  3
-/* RMT_REF_CNT_RST_CH2 : R/W ;bitpos:[2] ;default: 1'b0 ; */
-/*description: */
-#define RMT_REF_CNT_RST_CH2  (BIT(2))
-#define RMT_REF_CNT_RST_CH2_M  (BIT(2))
-#define RMT_REF_CNT_RST_CH2_V  0x1
-#define RMT_REF_CNT_RST_CH2_S  2
-/* RMT_REF_CNT_RST_CH1 : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: */
-#define RMT_REF_CNT_RST_CH1  (BIT(1))
-#define RMT_REF_CNT_RST_CH1_M  (BIT(1))
-#define RMT_REF_CNT_RST_CH1_V  0x1
-#define RMT_REF_CNT_RST_CH1_S  1
-/* RMT_REF_CNT_RST_CH0 : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: */
-#define RMT_REF_CNT_RST_CH0  (BIT(0))
-#define RMT_REF_CNT_RST_CH0_M  (BIT(0))
-#define RMT_REF_CNT_RST_CH0_V  0x1
+/** RMT_REF_CNT_RST_REG register
+ *  RMT clock divider reset register
+ */
+#define RMT_REF_CNT_RST_REG (DR_REG_RMT_BASE + 0x88)
+/** RMT_REF_CNT_RST_CH0 : R/W; bitpos: [0]; default: 0;
+ *  This bit is used to reset the clock divider of channel 0.
+ */
+#define RMT_REF_CNT_RST_CH0    (BIT(0))
+#define RMT_REF_CNT_RST_CH0_M  (RMT_REF_CNT_RST_CH0_V << RMT_REF_CNT_RST_CH0_S)
+#define RMT_REF_CNT_RST_CH0_V  0x00000001U
 #define RMT_REF_CNT_RST_CH0_S  0
+/** RMT_REF_CNT_RST_CH1 : R/W; bitpos: [1]; default: 0;
+ *  This bit is used to reset the clock divider of channel 1.
+ */
+#define RMT_REF_CNT_RST_CH1    (BIT(1))
+#define RMT_REF_CNT_RST_CH1_M  (RMT_REF_CNT_RST_CH1_V << RMT_REF_CNT_RST_CH1_S)
+#define RMT_REF_CNT_RST_CH1_V  0x00000001U
+#define RMT_REF_CNT_RST_CH1_S  1
+/** RMT_REF_CNT_RST_CH2 : R/W; bitpos: [2]; default: 0;
+ *  This bit is used to reset the clock divider of channel 2.
+ */
+#define RMT_REF_CNT_RST_CH2    (BIT(2))
+#define RMT_REF_CNT_RST_CH2_M  (RMT_REF_CNT_RST_CH2_V << RMT_REF_CNT_RST_CH2_S)
+#define RMT_REF_CNT_RST_CH2_V  0x00000001U
+#define RMT_REF_CNT_RST_CH2_S  2
+/** RMT_REF_CNT_RST_CH3 : R/W; bitpos: [3]; default: 0;
+ *  This bit is used to reset the clock divider of channel 3.
+ */
+#define RMT_REF_CNT_RST_CH3    (BIT(3))
+#define RMT_REF_CNT_RST_CH3_M  (RMT_REF_CNT_RST_CH3_V << RMT_REF_CNT_RST_CH3_S)
+#define RMT_REF_CNT_RST_CH3_V  0x00000001U
+#define RMT_REF_CNT_RST_CH3_S  3
 
-#define RMT_CH0_RX_CARRIER_RM_REG          (DR_REG_RMT_BASE + 0x008c)
-/* RMT_CARRIER_HIGH_THRES_CH0 : R/W ;bitpos:[31:16] ;default: 16'h0 ; */
-/*description: */
-#define RMT_CARRIER_HIGH_THRES_CH0  0x0000FFFF
-#define RMT_CARRIER_HIGH_THRES_CH0_M  ((RMT_CARRIER_HIGH_THRES_CH0_V)<<(RMT_CARRIER_HIGH_THRES_CH0_S))
-#define RMT_CARRIER_HIGH_THRES_CH0_V  0xFFFF
-#define RMT_CARRIER_HIGH_THRES_CH0_S  16
-/* RMT_CARRIER_LOW_THRES_CH0 : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
-/*description: */
-#define RMT_CARRIER_LOW_THRES_CH0  0x0000FFFF
-#define RMT_CARRIER_LOW_THRES_CH0_M  ((RMT_CARRIER_LOW_THRES_CH0_V)<<(RMT_CARRIER_LOW_THRES_CH0_S))
-#define RMT_CARRIER_LOW_THRES_CH0_V  0xFFFF
+/** RMT_CH0_RX_CARRIER_RM_REG register
+ *  Channel 0 carrier remove register
+ */
+#define RMT_CH0_RX_CARRIER_RM_REG (DR_REG_RMT_BASE + 0x8c)
+/** RMT_CARRIER_LOW_THRES_CH0 : R/W; bitpos: [15:0]; default: 0;
+ *  The low level period in carrier modulation mode is (RMT_CARRIER_LOW_THRES_CH0 + 1)
+ *  clock cycles for channel 0.
+ */
+#define RMT_CARRIER_LOW_THRES_CH0    0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH0_M  (RMT_CARRIER_LOW_THRES_CH0_V << RMT_CARRIER_LOW_THRES_CH0_S)
+#define RMT_CARRIER_LOW_THRES_CH0_V  0x0000FFFFU
 #define RMT_CARRIER_LOW_THRES_CH0_S  0
+/** RMT_CARRIER_HIGH_THRES_CH0 : R/W; bitpos: [31:16]; default: 0;
+ *  The high level period in carrier modulation mode is (RMT_CARRIER_HIGH_THRES_CH0 +
+ *  1) clock cycles for channel 0.
+ */
+#define RMT_CARRIER_HIGH_THRES_CH0    0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH0_M  (RMT_CARRIER_HIGH_THRES_CH0_V << RMT_CARRIER_HIGH_THRES_CH0_S)
+#define RMT_CARRIER_HIGH_THRES_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH0_S  16
 
-#define RMT_CH1_RX_CARRIER_RM_REG          (DR_REG_RMT_BASE + 0x0090)
-/* RMT_CARRIER_HIGH_THRES_CH1 : R/W ;bitpos:[31:16] ;default: 16'h0 ; */
-/*description: */
-#define RMT_CARRIER_HIGH_THRES_CH1  0x0000FFFF
-#define RMT_CARRIER_HIGH_THRES_CH1_M  ((RMT_CARRIER_HIGH_THRES_CH1_V)<<(RMT_CARRIER_HIGH_THRES_CH1_S))
-#define RMT_CARRIER_HIGH_THRES_CH1_V  0xFFFF
-#define RMT_CARRIER_HIGH_THRES_CH1_S  16
-/* RMT_CARRIER_LOW_THRES_CH1 : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
-/*description: */
-#define RMT_CARRIER_LOW_THRES_CH1  0x0000FFFF
-#define RMT_CARRIER_LOW_THRES_CH1_M  ((RMT_CARRIER_LOW_THRES_CH1_V)<<(RMT_CARRIER_LOW_THRES_CH1_S))
-#define RMT_CARRIER_LOW_THRES_CH1_V  0xFFFF
-#define RMT_CARRIER_LOW_THRES_CH1_S  0
+/** RMT_CH1_RX_CARRIER_RM_REG register
+ *  Channel 1 carrier remove register
+ */
+#define RMT_CH1_RX_CARRIER_RM_REG (DR_REG_RMT_BASE + 0x90)
+/** RMT_CARRIER_LOW_THRES_CH0 : R/W; bitpos: [15:0]; default: 0;
+ *  The low level period in carrier modulation mode is (RMT_CARRIER_LOW_THRES_CH1 + 1)
+ *  clock cycles for channel 1.
+ */
+#define RMT_CARRIER_LOW_THRES_CH0    0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH0_M  (RMT_CARRIER_LOW_THRES_CH0_V << RMT_CARRIER_LOW_THRES_CH0_S)
+#define RMT_CARRIER_LOW_THRES_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH0_S  0
+/** RMT_CARRIER_HIGH_THRES_CH0 : R/W; bitpos: [31:16]; default: 0;
+ *  The high level period in carrier modulation mode is (RMT_CARRIER_HIGH_THRES_CH1 +
+ *  1) clock cycles for channel 1.
+ */
+#define RMT_CARRIER_HIGH_THRES_CH0    0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH0_M  (RMT_CARRIER_HIGH_THRES_CH0_V << RMT_CARRIER_HIGH_THRES_CH0_S)
+#define RMT_CARRIER_HIGH_THRES_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH0_S  16
 
-#define RMT_CH2_RX_CARRIER_RM_REG          (DR_REG_RMT_BASE + 0x0094)
-/* RMT_CARRIER_HIGH_THRES_CH2 : R/W ;bitpos:[31:16] ;default: 16'h0 ; */
-/*description: */
-#define RMT_CARRIER_HIGH_THRES_CH2  0x0000FFFF
-#define RMT_CARRIER_HIGH_THRES_CH2_M  ((RMT_CARRIER_HIGH_THRES_CH2_V)<<(RMT_CARRIER_HIGH_THRES_CH2_S))
-#define RMT_CARRIER_HIGH_THRES_CH2_V  0xFFFF
-#define RMT_CARRIER_HIGH_THRES_CH2_S  16
-/* RMT_CARRIER_LOW_THRES_CH2 : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
-/*description: */
-#define RMT_CARRIER_LOW_THRES_CH2  0x0000FFFF
-#define RMT_CARRIER_LOW_THRES_CH2_M  ((RMT_CARRIER_LOW_THRES_CH2_V)<<(RMT_CARRIER_LOW_THRES_CH2_S))
-#define RMT_CARRIER_LOW_THRES_CH2_V  0xFFFF
-#define RMT_CARRIER_LOW_THRES_CH2_S  0
+/** RMT_CH2_RX_CARRIER_RM_REG register
+ *  Channel 2 carrier remove register
+ */
+#define RMT_CH2_RX_CARRIER_RM_REG (DR_REG_RMT_BASE + 0x94)
+/** RMT_CARRIER_LOW_THRES_CH0 : R/W; bitpos: [15:0]; default: 0;
+ *  The low level period in carrier modulation mode is (RMT_CARRIER_LOW_THRES_CH2 + 1)
+ *  clock cycles for channel 2.
+ */
+#define RMT_CARRIER_LOW_THRES_CH0    0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH0_M  (RMT_CARRIER_LOW_THRES_CH0_V << RMT_CARRIER_LOW_THRES_CH0_S)
+#define RMT_CARRIER_LOW_THRES_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH0_S  0
+/** RMT_CARRIER_HIGH_THRES_CH0 : R/W; bitpos: [31:16]; default: 0;
+ *  The high level period in carrier modulation mode is (RMT_CARRIER_HIGH_THRES_CH2 +
+ *  1) clock cycles for channel 2.
+ */
+#define RMT_CARRIER_HIGH_THRES_CH0    0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH0_M  (RMT_CARRIER_HIGH_THRES_CH0_V << RMT_CARRIER_HIGH_THRES_CH0_S)
+#define RMT_CARRIER_HIGH_THRES_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH0_S  16
 
-#define RMT_CH3_RX_CARRIER_RM_REG          (DR_REG_RMT_BASE + 0x0098)
-/* RMT_CARRIER_HIGH_THRES_CH3 : R/W ;bitpos:[31:16] ;default: 16'h0 ; */
-/*description: */
-#define RMT_CARRIER_HIGH_THRES_CH3  0x0000FFFF
-#define RMT_CARRIER_HIGH_THRES_CH3_M  ((RMT_CARRIER_HIGH_THRES_CH3_V)<<(RMT_CARRIER_HIGH_THRES_CH3_S))
-#define RMT_CARRIER_HIGH_THRES_CH3_V  0xFFFF
-#define RMT_CARRIER_HIGH_THRES_CH3_S  16
-/* RMT_CARRIER_LOW_THRES_CH3 : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
-/*description: */
-#define RMT_CARRIER_LOW_THRES_CH3  0x0000FFFF
-#define RMT_CARRIER_LOW_THRES_CH3_M  ((RMT_CARRIER_LOW_THRES_CH3_V)<<(RMT_CARRIER_LOW_THRES_CH3_S))
-#define RMT_CARRIER_LOW_THRES_CH3_V  0xFFFF
-#define RMT_CARRIER_LOW_THRES_CH3_S  0
+/** RMT_CH3_RX_CARRIER_RM_REG register
+ *  Channel 3 carrier remove register
+ */
+#define RMT_CH3_RX_CARRIER_RM_REG (DR_REG_RMT_BASE + 0x98)
+/** RMT_CARRIER_LOW_THRES_CH0 : R/W; bitpos: [15:0]; default: 0;
+ *  The low level period in carrier modulation mode is (RMT_CARRIER_LOW_THRES_CH3 + 1)
+ *  clock cycles for channel 3.
+ */
+#define RMT_CARRIER_LOW_THRES_CH0    0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH0_M  (RMT_CARRIER_LOW_THRES_CH0_V << RMT_CARRIER_LOW_THRES_CH0_S)
+#define RMT_CARRIER_LOW_THRES_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH0_S  0
+/** RMT_CARRIER_HIGH_THRES_CH0 : R/W; bitpos: [31:16]; default: 0;
+ *  The high level period in carrier modulation mode is (RMT_CARRIER_HIGH_THRES_CH3 +
+ *  1) clock cycles for channel 3.
+ */
+#define RMT_CARRIER_HIGH_THRES_CH0    0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH0_M  (RMT_CARRIER_HIGH_THRES_CH0_V << RMT_CARRIER_HIGH_THRES_CH0_S)
+#define RMT_CARRIER_HIGH_THRES_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH0_S  16
 
-#define RMT_DATE_REG          (DR_REG_RMT_BASE + 0x0fc)
-/* RMT_DATE : R/W ;bitpos:[31:0] ;default: 32'h19080700 ; */
-/*description: */
-#define RMT_DATE  0xFFFFFFFF
-#define RMT_DATE_M  ((RMT_DATE_V)<<(RMT_DATE_S))
-#define RMT_DATE_V  0xFFFFFFFF
+/** RMT_DATE_REG register
+ *  Version control register
+ */
+#define RMT_DATE_REG (DR_REG_RMT_BASE + 0xfc)
+/** RMT_DATE : R/W; bitpos: [31:0]; default: 419898881;
+ *  Version control register
+ */
+#define RMT_DATE    0xFFFFFFFFU
+#define RMT_DATE_M  (RMT_DATE_V << RMT_DATE_S)
+#define RMT_DATE_V  0xFFFFFFFFU
 #define RMT_DATE_S  0
 
 #ifdef __cplusplus
 }
 #endif
-
-
-
-#endif /*_SOC_RMT_REG_H_ */
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rmt_struct.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rmt_struct.h
index 5e430040939..b9f27182488 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rmt_struct.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rmt_struct.h
@@ -1,18 +1,9 @@
-// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_RMT_STRUCT_H_
-#define _SOC_RMT_STRUCT_H_
+/**
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
 
 #include <stdint.h>
 
@@ -20,271 +11,795 @@
 extern "C" {
 #endif
 
-typedef volatile struct rmt_dev_s {
-    uint32_t data_ch[4]; /* Data FIFO, Can only be accessed by PeriBus2 */
+/** Group: FIFO R/W registers */
+/** Type of chndata register
+ *  Read and write data for channel n via APB FIFO
+ */
+typedef union {
     struct {
-        union {
-            struct {
-                uint32_t div_cnt:            8;
-                uint32_t idle_thres:        16;
-                uint32_t mem_size:           3;
-                uint32_t carrier_eff_en:     1;
-                uint32_t carrier_en:         1;
-                uint32_t carrier_out_lv:     1;
-                uint32_t reserved30:         2;
-            };
-            uint32_t val;
-        } conf0;
-        union {
-            struct {
-                uint32_t tx_start:              1;
-                uint32_t rx_en:                 1;
-                uint32_t mem_wr_rst:            1;
-                uint32_t mem_rd_rst:            1;
-                uint32_t apb_mem_rst:           1;
-                uint32_t mem_owner:             1;
-                uint32_t tx_conti_mode:         1;
-                uint32_t rx_filter_en:          1;
-                uint32_t rx_filter_thres:       8;
-                uint32_t chk_rx_carrier_en:     1;
-                uint32_t ref_always_on:         1;
-                uint32_t idle_out_lv:           1;
-                uint32_t idle_out_en:           1;
-                uint32_t tx_stop:               1;
-                uint32_t reserved21:           11;
-            };
-            uint32_t val;
-        } conf1;
+        /** chn_data : RO; bitpos: [31:0]; default: 0;
+         *  This register is used to read and write data for channel n via APB FIFO.
+         */
+        uint32_t chn_data: 32;
+    };
+    uint32_t val;
+} rmt_chndata_reg_t;
+
+
+/** Group: Configuration registers */
+/** Type of chnconf0 register
+ *  Channel n configuration register 0
+ */
+typedef union {
+    struct {
+        /** div_cnt : R/W; bitpos: [7:0]; default: 2;
+         *  This field is used to configure clock divider for channel n.
+         */
+        uint32_t div_cnt: 8;
+        /** idle_thres : R/W; bitpos: [23:8]; default: 4096;
+         *  Receiving ends when no edge is detected on input signals for continuous clock
+         *  cycles longer than this field value.
+         */
+        uint32_t idle_thres: 16;
+        /** mem_size : R/W; bitpos: [26:24]; default: 1;
+         *  This field is used to configure the maximum blocks allocated to channel n. The
+         *  valid range is from 1 ~ 4-n.
+         */
+        uint32_t mem_size: 3;
+        /** carrier_eff_en : R/W; bitpos: [27]; default: 1;
+         *  1: Add carrier modulation on output signals only at data sending state for channel
+         *  n. 0: Add carrier modulation on signals at all states for channel n. States here
+         *  include idle state (ST_IDLE), reading data from RAM (ST_RD_MEM), and sending data
+         *  stored in RAM (ST_SEND). Only valid when RMT_CARRIER_EN_CHn is set to 1.
+         */
+        uint32_t carrier_eff_en: 1;
+        /** carrier_en : R/W; bitpos: [28]; default: 1;
+         *  This bit is used to enable carrier modulation for channel n. 1: Add carrier
+         *  modulation on output signals. 0: No carrier modulation is added on output signals.
+         */
+        uint32_t carrier_en: 1;
+        /** carrier_out_lv : R/W; bitpos: [29]; default: 1;
+         *  This bit is used to configure the position of carrier wave for channel n.
+         *
+         *  1'h0: Add carrier wave on low-level output signals.
+         *
+         *  1'h1: Add carrier wave on high-level output signals.
+         */
+        uint32_t carrier_out_lv: 1;
+        uint32_t reserved_30: 2;
+    };
+    uint32_t val;
+} rmt_chnconf0_reg_t;
+
+/** Type of chnconf1 register
+ *  Channel n configuration register 1
+ */
+typedef union {
+    struct {
+        /** tx_start : R/W; bitpos: [0]; default: 0;
+         *  Set this bit to start sending data on channel n.
+         */
+        uint32_t tx_start: 1;
+        /** rx_en : R/W; bitpos: [1]; default: 0;
+         *  Set this bit to enable receiver to receive data on channel n.
+         */
+        uint32_t rx_en: 1;
+        /** mem_wr_rst : WO; bitpos: [2]; default: 0;
+         *  Set this bit to reset RAM write address accessed by the receiver for channel n.
+         */
+        uint32_t mem_wr_rst: 1;
+        /** mem_rd_rst : WO; bitpos: [3]; default: 0;
+         *  Set this bit to reset RAM read address accessed by the transmitter for channel n.
+         */
+        uint32_t mem_rd_rst: 1;
+        /** apb_mem_rst : WO; bitpos: [4]; default: 0;
+         *  Set this bit to reset W/R ram address for channel n by accessing apb fifo.
+         */
+        uint32_t apb_mem_rst: 1;
+        /** mem_owner : R/W; bitpos: [5]; default: 1;
+         *  This bit marks the ownership of channel n's RAM block.
+         *
+         *  1'h1: Receiver is using the RAM.
+         *
+         *  1'h0: Transmitter is using the RAM.
+         */
+        uint32_t mem_owner: 1;
+        /** tx_conti_mode : R/W; bitpos: [6]; default: 0;
+         *  Set this bit to restart transmission in continuous node from the first data in
+         *  channel n.
+         */
+        uint32_t tx_conti_mode: 1;
+        /** rx_filter_en : R/W; bitpos: [7]; default: 0;
+         *  Set this bit to enable the receiver's filter for channel n.
+         */
+        uint32_t rx_filter_en: 1;
+        /** rx_filter_thres : R/W; bitpos: [15:8]; default: 15;
+         *  Set this field to ignore the input pulse when its width is less than
+         *  RMT_RX_FILTER_THRES_CHn APB clock cycles in receive mode.
+         */
+        uint32_t rx_filter_thres: 8;
+        /** chk_rx_carrier_en : R/W; bitpos: [16]; default: 0;
+         *  Set this bit to enable memory loop read mode when carrier modulation is enabled for
+         *  channel n.
+         */
+        uint32_t chk_rx_carrier_en: 1;
+        /** ref_always_on : R/W; bitpos: [17]; default: 0;
+         *  Set this bit to select a base clock for channel n.
+         *
+         *  1'h1: APB_CLK    1'h0: REF_TICK
+         */
+        uint32_t ref_always_on: 1;
+        /** idle_out_lv : R/W; bitpos: [18]; default: 0;
+         *  This bit configures the level of output signals in channel n when the transmitter
+         *  is in idle state.
+         */
+        uint32_t idle_out_lv: 1;
+        /** idle_out_en : R/W; bitpos: [19]; default: 0;
+         *  This is the output enable bit for channel n in idle state.
+         */
+        uint32_t idle_out_en: 1;
+        /** tx_stop : R/W; bitpos: [20]; default: 0;
+         *  Set this bit to stop the transmitter of channel n sending data out.
+         */
+        uint32_t tx_stop: 1;
+        uint32_t reserved_21: 11;
+    };
+    uint32_t val;
+} rmt_chnconf1_reg_t;
+
+/** Type of apb_conf register
+ *  RMT APB configuration register
+ */
+typedef union {
+    struct {
+        /** apb_fifo_mask : R/W; bitpos: [0]; default: 0;
+         *  1'h1: Access memory directly.  1'h0: access memory via APB FIFO.
+         */
+        uint32_t apb_fifo_mask: 1;
+        /** mem_tx_wrap_en : R/W; bitpos: [1]; default: 0;
+         *  Set this bit to enable wrap mode.
+         */
+        uint32_t mem_tx_wrap_en: 1;
+        /** mem_clk_force_on : R/W; bitpos: [2]; default: 1;
+         *  Set this bit to enable the clock for RAM when RMT module starts working, disable
+         *  this clock when RMT stops working, to achieve low-power scheme.
+         */
+        uint32_t mem_clk_force_on: 1;
+        /** mem_force_pd : R/W; bitpos: [3]; default: 0;
+         *  Set this bit to power down RMT memory.
+         */
+        uint32_t mem_force_pd: 1;
+        /** mem_force_pu : R/W; bitpos: [4]; default: 0;
+         *  1: Disable RAM's Light-sleep power down function. 0: power down RMT RAM when RMT is
+         *  in Light-sleep mode.
+         */
+        uint32_t mem_force_pu: 1;
+        uint32_t reserved_5: 26;
+        /** clk_en : R/W; bitpos: [31]; default: 0;
+         *  Clock gating enable bit for RMT registers to achieve low-power scheme. 1: Power up
+         *  drive clock for RMT registers. 0: Power down drive clock for RMT registers.
+         */
+        uint32_t clk_en: 1;
+    };
+    uint32_t val;
+} rmt_apb_conf_reg_t;
+
+/** Type of ref_cnt_rst register
+ *  RMT clock divider reset register
+ */
+typedef union {
+    struct {
+        /** ref_cnt_rst_ch0 : R/W; bitpos: [0]; default: 0;
+         *  This bit is used to reset the clock divider of channel 0.
+         */
+        uint32_t ref_cnt_rst_ch0: 1;
+        /** ref_cnt_rst_ch1 : R/W; bitpos: [1]; default: 0;
+         *  This bit is used to reset the clock divider of channel 1.
+         */
+        uint32_t ref_cnt_rst_ch1: 1;
+        /** ref_cnt_rst_ch2 : R/W; bitpos: [2]; default: 0;
+         *  This bit is used to reset the clock divider of channel 2.
+         */
+        uint32_t ref_cnt_rst_ch2: 1;
+        /** ref_cnt_rst_ch3 : R/W; bitpos: [3]; default: 0;
+         *  This bit is used to reset the clock divider of channel 3.
+         */
+        uint32_t ref_cnt_rst_ch3: 1;
+        uint32_t reserved_4: 28;
+    };
+    uint32_t val;
+} rmt_ref_cnt_rst_reg_t;
+
+/** Type of chn_rx_carrier_rm register
+ *  Channel n carrier remove register
+ */
+typedef union {
+    struct {
+        /** carrier_low_thres_ch : R/W; bitpos: [15:0]; default: 0;
+         *  The low level period in carrier modulation mode is (RMT_CARRIER_LOW_THRES_CHn + 1)
+         *  clock cycles for channel n.
+         */
+        uint32_t carrier_low_thres_ch: 16;
+        /** carrier_high_thres_ch : R/W; bitpos: [31:16]; default: 0;
+         *  The high level period in carrier modulation mode is (RMT_CARRIER_HIGH_THRES_CHn +
+         *  1) clock cycles for channel n.
+         */
+        uint32_t carrier_high_thres_ch: 16;
+    };
+    uint32_t val;
+} rmt_chn_rx_carrier_rm_reg_t;
+
+
+/** Group: Status registers */
+/** Type of chnstatus register
+ *  Channel n status register
+ */
+typedef union {
+    struct {
+        /** mem_waddr_ex : RO; bitpos: [8:0]; default: 0;
+         *  This field records the memory address offset when receiver of channel n is using
+         *  the RAM.
+         */
+        uint32_t mem_waddr_ex: 9;
+        uint32_t reserved_9: 1;
+        /** mem_raddr_ex : RO; bitpos: [18:10]; default: 0;
+         *  This field records the memory address offset when transmitter of channel n is using
+         *  the RAM.
+         */
+        uint32_t mem_raddr_ex: 9;
+        uint32_t reserved_19: 1;
+        /** state : RO; bitpos: [22:20]; default: 0;
+         *  This field records the FSM status of channel n.
+         */
+        uint32_t state: 3;
+        /** mem_owner_err : RO; bitpos: [23]; default: 0;
+         *  This status bit will be set when the ownership of memory block is violated.
+         */
+        uint32_t mem_owner_err: 1;
+        /** mem_full : RO; bitpos: [24]; default: 0;
+         *  This status bit will be set if the receiver receives more data than the memory
+         *  allows.
+         */
+        uint32_t mem_full: 1;
+        /** mem_empty : RO; bitpos: [25]; default: 0;
+         *  This status bit will be set when the data to be sent is more than memory allows and
+         *  the wrap mode is disabled.
+         */
+        uint32_t mem_empty: 1;
+        /** apb_mem_wr_err : RO; bitpos: [26]; default: 0;
+         *  This status bit will be set if the offset address out of memory size when writes
+         *  RAM via APB bus.
+         */
+        uint32_t apb_mem_wr_err: 1;
+        /** apb_mem_rd_err : RO; bitpos: [27]; default: 0;
+         *  This status bit will be set if the offset address out of memory size when reads RAM
+         *  via APB bus.
+         */
+        uint32_t apb_mem_rd_err: 1;
+        uint32_t reserved_28: 4;
+    };
+    uint32_t val;
+} rmt_chnstatus_reg_t;
+
+/** Type of chnaddr register
+ *  Channel n address register
+ */
+typedef union {
+    struct {
+        /** apb_mem_waddr_ch0 : RO; bitpos: [8:0]; default: 0;
+         *  This field records the memory address offset when channel n writes RAM via APB bus.
+         */
+        uint32_t apb_mem_waddr_ch0: 9;
+        uint32_t reserved_9: 1;
+        /** apb_mem_raddr_ch0 : RO; bitpos: [18:10]; default: 0;
+         *  This field records the memory address offset when channel n reads RAM via APB bus.
+         */
+        uint32_t apb_mem_raddr_ch0: 9;
+        uint32_t reserved_19: 13;
+    };
+    uint32_t val;
+} rmt_chnaddr_reg_t;
+
+
+/** Group: Interrupt registers */
+/** Type of int_raw register
+ *  Raw interrupt status register
+ */
+typedef union {
+    struct {
+        /** ch0_tx_end_int_raw : RO; bitpos: [0]; default: 0;
+         *  The interrupt raw bit for channel 0. Triggered when transmitting ends.
+         */
+        uint32_t ch0_tx_end_int_raw: 1;
+        /** ch0_rx_end_int_raw : RO; bitpos: [1]; default: 0;
+         *  The interrupt raw bit for channel 0. Triggered when receiving ends.
+         */
+        uint32_t ch0_rx_end_int_raw: 1;
+        /** ch0_err_int_raw : RO; bitpos: [2]; default: 0;
+         *  The interrupt raw bit for channel 0. Triggered when error occurs.
+         */
+        uint32_t ch0_err_int_raw: 1;
+        /** ch1_tx_end_int_raw : RO; bitpos: [3]; default: 0;
+         *  The interrupt raw bit for channel 1. Triggered when transmitting ends.
+         */
+        uint32_t ch1_tx_end_int_raw: 1;
+        /** ch1_rx_end_int_raw : RO; bitpos: [4]; default: 0;
+         *  The interrupt raw bit for channel 1. Triggered when receiving ends.
+         */
+        uint32_t ch1_rx_end_int_raw: 1;
+        /** ch1_err_int_raw : RO; bitpos: [5]; default: 0;
+         *  The interrupt raw bit for channel 1. Triggered when error occurs.
+         */
+        uint32_t ch1_err_int_raw: 1;
+        /** ch2_tx_end_int_raw : RO; bitpos: [6]; default: 0;
+         *  The interrupt raw bit for channel 2. Triggered when transmitting ends.
+         */
+        uint32_t ch2_tx_end_int_raw: 1;
+        /** ch2_rx_end_int_raw : RO; bitpos: [7]; default: 0;
+         *  The interrupt raw bit for channel 2. Triggered when receiving ends.
+         */
+        uint32_t ch2_rx_end_int_raw: 1;
+        /** ch2_err_int_raw : RO; bitpos: [8]; default: 0;
+         *  The interrupt raw bit for channel 2. Triggered when error occurs.
+         */
+        uint32_t ch2_err_int_raw: 1;
+        /** ch3_tx_end_int_raw : RO; bitpos: [9]; default: 0;
+         *  The interrupt raw bit for channel 3. Triggered when transmitting ends.
+         */
+        uint32_t ch3_tx_end_int_raw: 1;
+        /** ch3_rx_end_int_raw : RO; bitpos: [10]; default: 0;
+         *  The interrupt raw bit for channel 3. Triggered when receiving ends.
+         */
+        uint32_t ch3_rx_end_int_raw: 1;
+        /** ch3_err_int_raw : RO; bitpos: [11]; default: 0;
+         *  The interrupt raw bit for channel 3. Triggered when error occurs.
+         */
+        uint32_t ch3_err_int_raw: 1;
+        /** ch0_tx_thr_event_int_raw : RO; bitpos: [12]; default: 0;
+         *  The interrupt raw bit for channel 0. Triggered when transmitter sends more data
+         *  than configured value.
+         */
+        uint32_t ch0_tx_thr_event_int_raw: 1;
+        /** ch1_tx_thr_event_int_raw : RO; bitpos: [13]; default: 0;
+         *  The interrupt raw bit for channel 1. Triggered when transmitter sends more data
+         *  than configured value.
+         */
+        uint32_t ch1_tx_thr_event_int_raw: 1;
+        /** ch2_tx_thr_event_int_raw : RO; bitpos: [14]; default: 0;
+         *  The interrupt raw bit for channel 2. Triggered when transmitter sends more data
+         *  than configured value.
+         */
+        uint32_t ch2_tx_thr_event_int_raw: 1;
+        /** ch3_tx_thr_event_int_raw : RO; bitpos: [15]; default: 0;
+         *  The interrupt raw bit for channel 3. Triggered when transmitter sends more data
+         *  than configured value.
+         */
+        uint32_t ch3_tx_thr_event_int_raw: 1;
+        /** ch0_tx_loop_int_raw : RO; bitpos: [16]; default: 0;
+         *  The interrupt raw bit for channel 0. Triggered when loop counting reaches the
+         *  configured threshold value.
+         */
+        uint32_t ch0_tx_loop_int_raw: 1;
+        /** ch1_tx_loop_int_raw : RO; bitpos: [17]; default: 0;
+         *  The interrupt raw bit for channel 1. Triggered when loop counting reaches the
+         *  configured threshold value.
+         */
+        uint32_t ch1_tx_loop_int_raw: 1;
+        /** ch2_tx_loop_int_raw : RO; bitpos: [18]; default: 0;
+         *  The interrupt raw bit for channel 2. Triggered when loop counting reaches the
+         *  configured threshold value.
+         */
+        uint32_t ch2_tx_loop_int_raw: 1;
+        /** ch3_tx_loop_int_raw : RO; bitpos: [19]; default: 0;
+         *  The interrupt raw bit for channel 3. Triggered when loop counting reaches the
+         *  configured threshold value.
+         */
+        uint32_t ch3_tx_loop_int_raw: 1;
+        uint32_t reserved_20: 12;
+    };
+    uint32_t val;
+} rmt_int_raw_reg_t;
+
+/** Type of int_st register
+ *  Masked interrupt status register
+ */
+typedef union {
+    struct {
+        /** ch0_tx_end_int_st : RO; bitpos: [0]; default: 0;
+         *  The masked interrupt status bit for RMT_CH0_TX_END_INT.
+         */
+        uint32_t ch0_tx_end_int_st: 1;
+        /** ch0_rx_end_int_st : RO; bitpos: [1]; default: 0;
+         *  The masked interrupt status bit for RMT_CH0_RX_END_INT.
+         */
+        uint32_t ch0_rx_end_int_st: 1;
+        /** ch0_err_int_st : RO; bitpos: [2]; default: 0;
+         *  The masked interrupt status bit for RMT_CH0_ERR_INT.
+         */
+        uint32_t ch0_err_int_st: 1;
+        /** ch1_tx_end_int_st : RO; bitpos: [3]; default: 0;
+         *  The masked interrupt status bit for RMT_CH1_TX_END_INT.
+         */
+        uint32_t ch1_tx_end_int_st: 1;
+        /** ch1_rx_end_int_st : RO; bitpos: [4]; default: 0;
+         *  The masked interrupt status bit for RMT_CH1_RX_END_INT.
+         */
+        uint32_t ch1_rx_end_int_st: 1;
+        /** ch1_err_int_st : RO; bitpos: [5]; default: 0;
+         *  The masked interrupt status bit for RMT_CH1_ERR_INT.
+         */
+        uint32_t ch1_err_int_st: 1;
+        /** ch2_tx_end_int_st : RO; bitpos: [6]; default: 0;
+         *  The masked interrupt status bit for RMT_CH2_TX_END_INT.
+         */
+        uint32_t ch2_tx_end_int_st: 1;
+        /** ch2_rx_end_int_st : RO; bitpos: [7]; default: 0;
+         *  The masked interrupt status bit for RMT_CH2_RX_END_INT.
+         */
+        uint32_t ch2_rx_end_int_st: 1;
+        /** ch2_err_int_st : RO; bitpos: [8]; default: 0;
+         *  The masked interrupt status bit for RMT_CH2_ERR_INT.
+         */
+        uint32_t ch2_err_int_st: 1;
+        /** ch3_tx_end_int_st : RO; bitpos: [9]; default: 0;
+         *  The masked interrupt status bit for RMT_CH3_TX_END_INT.
+         */
+        uint32_t ch3_tx_end_int_st: 1;
+        /** ch3_rx_end_int_st : RO; bitpos: [10]; default: 0;
+         *  The masked interrupt status bit for RMT_CH3_RX_END_INT.
+         */
+        uint32_t ch3_rx_end_int_st: 1;
+        /** ch3_err_int_st : RO; bitpos: [11]; default: 0;
+         *  The masked interrupt status bit for RMT_CH3_ERR_INT.
+         */
+        uint32_t ch3_err_int_st: 1;
+        /** ch0_tx_thr_event_int_st : RO; bitpos: [12]; default: 0;
+         *  The masked interrupt status bit for RMT_CH0_TX_THR_EVENT_INT.
+         */
+        uint32_t ch0_tx_thr_event_int_st: 1;
+        /** ch1_tx_thr_event_int_st : RO; bitpos: [13]; default: 0;
+         *  The masked interrupt status bit for RMT_CH1_TX_THR_EVENT_INT.
+         */
+        uint32_t ch1_tx_thr_event_int_st: 1;
+        /** ch2_tx_thr_event_int_st : RO; bitpos: [14]; default: 0;
+         *  The masked interrupt status bit for RMT_CH2_TX_THR_EVENT_INT.
+         */
+        uint32_t ch2_tx_thr_event_int_st: 1;
+        /** ch3_tx_thr_event_int_st : RO; bitpos: [15]; default: 0;
+         *  The masked interrupt status bit for RMT_CH3_TX_THR_EVENT_INT.
+         */
+        uint32_t ch3_tx_thr_event_int_st: 1;
+        /** ch0_tx_loop_int_st : RO; bitpos: [16]; default: 0;
+         *  The masked interrupt status bit for RMT_CH0_TX_LOOP_INT.
+         */
+        uint32_t ch0_tx_loop_int_st: 1;
+        /** ch1_tx_loop_int_st : RO; bitpos: [17]; default: 0;
+         *  The masked interrupt status bit for RMT_CH1_TX_LOOP_INT.
+         */
+        uint32_t ch1_tx_loop_int_st: 1;
+        /** ch2_tx_loop_int_st : RO; bitpos: [18]; default: 0;
+         *  The masked interrupt status bit for RMT_CH2_TX_LOOP_INT.
+         */
+        uint32_t ch2_tx_loop_int_st: 1;
+        /** ch3_tx_loop_int_st : RO; bitpos: [19]; default: 0;
+         *  The masked interrupt status bit for RMT_CH3_TX_LOOP_INT.
+         */
+        uint32_t ch3_tx_loop_int_st: 1;
+        uint32_t reserved_20: 12;
+    };
+    uint32_t val;
+} rmt_int_st_reg_t;
+
+/** Type of int_ena register
+ *  Interrupt enable register
+ */
+typedef union {
+    struct {
+        /** ch0_tx_end_int_ena : R/W; bitpos: [0]; default: 0;
+         *  The interrupt enabled bit for RMT_CH0_TX_END_INT.
+         */
+        uint32_t ch0_tx_end_int_ena: 1;
+        /** ch0_rx_end_int_ena : R/W; bitpos: [1]; default: 0;
+         *  The interrupt enabled bit for RMT_CH0_RX_END_INT.
+         */
+        uint32_t ch0_rx_end_int_ena: 1;
+        /** ch0_err_int_ena : R/W; bitpos: [2]; default: 0;
+         *  The interrupt enabled bit for RMT_CH0_ERR_INT.
+         */
+        uint32_t ch0_err_int_ena: 1;
+        /** ch1_tx_end_int_ena : R/W; bitpos: [3]; default: 0;
+         *  The interrupt enabled bit for RMT_CH1_TX_END_INT.
+         */
+        uint32_t ch1_tx_end_int_ena: 1;
+        /** ch1_rx_end_int_ena : R/W; bitpos: [4]; default: 0;
+         *  The interrupt enabled bit for RMT_CH1_RX_END_INT.
+         */
+        uint32_t ch1_rx_end_int_ena: 1;
+        /** ch1_err_int_ena : R/W; bitpos: [5]; default: 0;
+         *  The interrupt enabled bit for RMT_CH1_ERR_INT.
+         */
+        uint32_t ch1_err_int_ena: 1;
+        /** ch2_tx_end_int_ena : R/W; bitpos: [6]; default: 0;
+         *  The interrupt enabled bit for RMT_CH2_TX_END_INT.
+         */
+        uint32_t ch2_tx_end_int_ena: 1;
+        /** ch2_rx_end_int_ena : R/W; bitpos: [7]; default: 0;
+         *  The interrupt enabled bit for RMT_CH2_RX_END_INT.
+         */
+        uint32_t ch2_rx_end_int_ena: 1;
+        /** ch2_err_int_ena : R/W; bitpos: [8]; default: 0;
+         *  The interrupt enabled bit for RMT_CH2_ERR_INT.
+         */
+        uint32_t ch2_err_int_ena: 1;
+        /** ch3_tx_end_int_ena : R/W; bitpos: [9]; default: 0;
+         *  The interrupt enabled bit for RMT_CH3_TX_END_INT.
+         */
+        uint32_t ch3_tx_end_int_ena: 1;
+        /** ch3_rx_end_int_ena : R/W; bitpos: [10]; default: 0;
+         *  The interrupt enabled bit for RMT_CH3_RX_END_INT.
+         */
+        uint32_t ch3_rx_end_int_ena: 1;
+        /** ch3_err_int_ena : R/W; bitpos: [11]; default: 0;
+         *  The interrupt enabled bit for RMT_CH3_ERR_INT.
+         */
+        uint32_t ch3_err_int_ena: 1;
+        /** ch0_tx_thr_event_int_ena : R/W; bitpos: [12]; default: 0;
+         *  The interrupt enabled bit for RMT_CH0_TX_THR_EVENT_INT.
+         */
+        uint32_t ch0_tx_thr_event_int_ena: 1;
+        /** ch1_tx_thr_event_int_ena : R/W; bitpos: [13]; default: 0;
+         *  The interrupt enabled bit for RMT_CH1_TX_THR_EVENT_INT.
+         */
+        uint32_t ch1_tx_thr_event_int_ena: 1;
+        /** ch2_tx_thr_event_int_ena : R/W; bitpos: [14]; default: 0;
+         *  The interrupt enabled bit for RMT_CH2_TX_THR_EVENT_INT.
+         */
+        uint32_t ch2_tx_thr_event_int_ena: 1;
+        /** ch3_tx_thr_event_int_ena : R/W; bitpos: [15]; default: 0;
+         *  The interrupt enabled bit for RMT_CH3_TX_THR_EVENT_INT.
+         */
+        uint32_t ch3_tx_thr_event_int_ena: 1;
+        /** ch0_tx_loop_int_ena : R/W; bitpos: [16]; default: 0;
+         *  The interrupt enabled bit for RMT_CH0_TX_LOOP_INT.
+         */
+        uint32_t ch0_tx_loop_int_ena: 1;
+        /** ch1_tx_loop_int_ena : R/W; bitpos: [17]; default: 0;
+         *  The interrupt enabled bit for RMT_CH1_TX_LOOP_INT.
+         */
+        uint32_t ch1_tx_loop_int_ena: 1;
+        /** ch2_tx_loop_int_ena : R/W; bitpos: [18]; default: 0;
+         *  The interrupt enabled bit for RMT_CH2_TX_LOOP_INT.
+         */
+        uint32_t ch2_tx_loop_int_ena: 1;
+        /** ch3_tx_loop_int_ena : R/W; bitpos: [19]; default: 0;
+         *  The interrupt enabled bit for RMT_CH3_TX_LOOP_INT.
+         */
+        uint32_t ch3_tx_loop_int_ena: 1;
+        uint32_t reserved_20: 12;
+    };
+    uint32_t val;
+} rmt_int_ena_reg_t;
+
+/** Type of int_clr register
+ *  Interrupt clear register
+ */
+typedef union {
+    struct {
+        /** ch0_tx_end_int_clr : WO; bitpos: [0]; default: 0;
+         *  Set this bit to clear RMT_CH0_TX_END_INT interrupt.
+         */
+        uint32_t ch0_tx_end_int_clr: 1;
+        /** ch0_rx_end_int_clr : WO; bitpos: [1]; default: 0;
+         *  Set this bit to clear RMT_CH0_RX_END_INT interrupt.
+         */
+        uint32_t ch0_rx_end_int_clr: 1;
+        /** ch0_err_int_clr : WO; bitpos: [2]; default: 0;
+         *  Set this bit to clear RMT_CH0_ERR_INT interrupt.
+         */
+        uint32_t ch0_err_int_clr: 1;
+        /** ch1_tx_end_int_clr : WO; bitpos: [3]; default: 0;
+         *  Set this bit to clear RMT_CH1_TX_END_INT interrupt.
+         */
+        uint32_t ch1_tx_end_int_clr: 1;
+        /** ch1_rx_end_int_clr : WO; bitpos: [4]; default: 0;
+         *  Set this bit to clear RMT_CH1_RX_END_INT interrupt.
+         */
+        uint32_t ch1_rx_end_int_clr: 1;
+        /** ch1_err_int_clr : WO; bitpos: [5]; default: 0;
+         *  Set this bit to clear RMT_CH1_ERR_INT interrupt.
+         */
+        uint32_t ch1_err_int_clr: 1;
+        /** ch2_tx_end_int_clr : WO; bitpos: [6]; default: 0;
+         *  Set this bit to clear RMT_CH2_TX_END_INT interrupt.
+         */
+        uint32_t ch2_tx_end_int_clr: 1;
+        /** ch2_rx_end_int_clr : WO; bitpos: [7]; default: 0;
+         *  Set this bit to clear RMT_CH2_RX_END_INT interrupt.
+         */
+        uint32_t ch2_rx_end_int_clr: 1;
+        /** ch2_err_int_clr : WO; bitpos: [8]; default: 0;
+         *  Set this bit to clear RMT_CH2_ERR_INT interrupt.
+         */
+        uint32_t ch2_err_int_clr: 1;
+        /** ch3_tx_end_int_clr : WO; bitpos: [9]; default: 0;
+         *  Set this bit to clear RMT_CH3_TX_END_INT interrupt.
+         */
+        uint32_t ch3_tx_end_int_clr: 1;
+        /** ch3_rx_end_int_clr : WO; bitpos: [10]; default: 0;
+         *  Set this bit to clear RMT_CH3_RX_END_INT interrupt.
+         */
+        uint32_t ch3_rx_end_int_clr: 1;
+        /** ch3_err_int_clr : WO; bitpos: [11]; default: 0;
+         *  Set this bit to clear RMT_CH3_ERR_INT interrupt.
+         */
+        uint32_t ch3_err_int_clr: 1;
+        /** ch0_tx_thr_event_int_clr : WO; bitpos: [12]; default: 0;
+         *  Set this bit to clear RMT_CH0_TX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch0_tx_thr_event_int_clr: 1;
+        /** ch1_tx_thr_event_int_clr : WO; bitpos: [13]; default: 0;
+         *  Set this bit to clear RMT_CH1_TX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch1_tx_thr_event_int_clr: 1;
+        /** ch2_tx_thr_event_int_clr : WO; bitpos: [14]; default: 0;
+         *  Set this bit to clear RMT_CH2_TX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch2_tx_thr_event_int_clr: 1;
+        /** ch3_tx_thr_event_int_clr : WO; bitpos: [15]; default: 0;
+         *  Set this bit to clear RMT_CH3_TX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch3_tx_thr_event_int_clr: 1;
+        /** ch0_tx_loop_int_clr : WO; bitpos: [16]; default: 0;
+         *  Set this bit to clear RMT_CH0_TX_LOOP_INT interrupt.
+         */
+        uint32_t ch0_tx_loop_int_clr: 1;
+        /** ch1_tx_loop_int_clr : WO; bitpos: [17]; default: 0;
+         *  Set this bit to clear RMT_CH1_TX_LOOP_INT interrupt.
+         */
+        uint32_t ch1_tx_loop_int_clr: 1;
+        /** ch2_tx_loop_int_clr : WO; bitpos: [18]; default: 0;
+         *  Set this bit to clear RMT_CH2_TX_LOOP_INT interrupt.
+         */
+        uint32_t ch2_tx_loop_int_clr: 1;
+        /** ch3_tx_loop_int_clr : WO; bitpos: [19]; default: 0;
+         *  Set this bit to clear RMT_CH3_TX_LOOP_INT interrupt.
+         */
+        uint32_t ch3_tx_loop_int_clr: 1;
+        uint32_t reserved_20: 12;
+    };
+    uint32_t val;
+} rmt_int_clr_reg_t;
+
+
+/** Group: Carrier wave duty cycle registers */
+/** Type of chncarrier_duty register
+ *  Channel n duty cycle configuration register
+ */
+typedef union {
+    struct {
+        /** low : R/W; bitpos: [15:0]; default: 64;
+         *  This field is used to configure the clock cycles of carrier wave at low level for
+         *  channel n.
+         */
+        uint32_t low: 16;
+        /** high : R/W; bitpos: [31:16]; default: 64;
+         *  This field is used to configure the clock cycles of carrier wave at high level for
+         *  channel n.
+         */
+        uint32_t high: 16;
+    };
+    uint32_t val;
+} rmt_chncarrier_duty_reg_t;
+
+
+/** Group: Tx event configuration registers */
+/** Type of chn_tx_lim register
+ *  Channel n Tx event configuration register
+ */
+typedef union {
+    struct {
+        /** tx_lim : R/W; bitpos: [8:0]; default: 128;
+         *  This field is used to configure the maximum entries that channel n can send out.
+         *  When RMT_MEM_SIZE_CHn = 1, this field can be set to any value among 0 ~ 128
+         *  (64*32/16 = 128). When RMT_MEM_SIZE_CHn > 1, this field can be set to any value
+         *  among (0 ~ 128)*RMT_MEM_SIZE_CHn.
+         */
+        uint32_t tx_lim: 9;
+        /** tx_loop_num : R/W; bitpos: [18:9]; default: 0;
+         *  This field is used to configure the maximum loop times when continuous transmission
+         *  mode is enabled.
+         */
+        uint32_t tx_loop_num: 10;
+        /** tx_loop_cnt_en : R/W; bitpos: [19]; default: 0;
+         *  This bit is used to enable loop counting.
+         */
+        uint32_t tx_loop_cnt_en: 1;
+        /** loop_count_reset : WO; bitpos: [20]; default: 0;
+         *  This bit is used to reset loop counting when continuous transmission mode is valid.
+         */
+        uint32_t loop_count_reset: 1;
+        uint32_t reserved_21: 11;
+    };
+    uint32_t val;
+} rmt_chn_tx_lim_reg_t;
+
+/** Type of tx_sim register
+ *  Enable RMT simultaneous transmission
+ */
+typedef union {
+    struct {
+        /** tx_sim_ch0 : R/W; bitpos: [0]; default: 0;
+         *  Set this bit to enable channel 0 to start sending data simultaneously with other
+         *  enabled channels.
+         */
+        uint32_t tx_sim_ch0: 1;
+        /** tx_sim_ch1 : R/W; bitpos: [1]; default: 0;
+         *  Set this bit to enable channel 1 to start sending data simultaneously with other
+         *  enabled channels.
+         */
+        uint32_t tx_sim_ch1: 1;
+        /** tx_sim_ch2 : R/W; bitpos: [2]; default: 0;
+         *  Set this bit to enable channel 2 to start sending data simultaneously with other
+         *  enabled channels.
+         */
+        uint32_t tx_sim_ch2: 1;
+        /** tx_sim_ch3 : R/W; bitpos: [3]; default: 0;
+         *  Set this bit to enable channel 3 to start sending data simultaneously with other
+         *  enabled channels.
+         */
+        uint32_t tx_sim_ch3: 1;
+        /** tx_sim_en : R/W; bitpos: [4]; default: 0;
+         *  This bit is used to enable multiple channels to start sending data simultaneously.
+         */
+        uint32_t en: 1;
+        uint32_t reserved_5: 27;
+    };
+    uint32_t val;
+} rmt_tx_sim_reg_t;
+
+
+/** Group: Version register */
+/** Type of date register
+ *  Version control register
+ */
+typedef union {
+    struct {
+        /** date : R/W; bitpos: [31:0]; default: 419898881;
+         *  Version control register
+         */
+        uint32_t date: 32;
+    };
+    uint32_t val;
+} rmt_date_reg_t;
+
+
+typedef struct rmt_dev_t {
+    volatile rmt_chndata_reg_t data_ch[4];
+    volatile struct {
+        volatile rmt_chnconf0_reg_t conf0;
+        volatile rmt_chnconf1_reg_t conf1;
     } conf_ch[4];
-    union {
-        struct {
-            uint32_t mem_waddr_ex:       9;
-            uint32_t reserved9:          1;
-            uint32_t mem_raddr_ex:       9;
-            uint32_t reserved19:         1;
-            uint32_t state:              3;
-            uint32_t mem_owner_err:      1;
-            uint32_t mem_full:           1;
-            uint32_t mem_empty:          1;
-            uint32_t apb_mem_wr_err:     1;
-            uint32_t apb_mem_rd_err:     1;
-            uint32_t reserved28:         4;
-        };
-        uint32_t val;
-    } status_ch[4];
-    union {
-        struct {
-            uint32_t waddr:             9;
-            uint32_t reserved9:         1;
-            uint32_t raddr:             9;
-            uint32_t reserved19:       13;
-        };
-        uint32_t val;
-    } apb_mem_addr_ch[4];
-    union {
-        struct {
-            uint32_t ch0_tx_end:               1;
-            uint32_t ch0_rx_end:               1;
-            uint32_t ch0_err:                  1;
-            uint32_t ch1_tx_end:               1;
-            uint32_t ch1_rx_end:               1;
-            uint32_t ch1_err:                  1;
-            uint32_t ch2_tx_end:               1;
-            uint32_t ch2_rx_end:               1;
-            uint32_t ch2_err:                  1;
-            uint32_t ch3_tx_end:               1;
-            uint32_t ch3_rx_end:               1;
-            uint32_t ch3_err:                  1;
-            uint32_t ch0_tx_thr_event:         1;
-            uint32_t ch1_tx_thr_event:         1;
-            uint32_t ch2_tx_thr_event:         1;
-            uint32_t ch3_tx_thr_event:         1;
-            uint32_t ch0_tx_loop:              1;
-            uint32_t ch1_tx_loop:              1;
-            uint32_t ch2_tx_loop:              1;
-            uint32_t ch3_tx_loop:              1;
-            uint32_t ch0_rx_thr_event:         1;
-            uint32_t ch1_rx_thr_event:         1;
-            uint32_t ch2_rx_thr_event:         1;
-            uint32_t ch3_rx_thr_event:         1;
-            uint32_t reserved24:               8;
-        };
-        uint32_t val;
-    } int_raw;
-    union {
-        struct {
-            uint32_t ch0_tx_end:              1;
-            uint32_t ch0_rx_end:              1;
-            uint32_t ch0_err:                 1;
-            uint32_t ch1_tx_end:              1;
-            uint32_t ch1_rx_end:              1;
-            uint32_t ch1_err:                 1;
-            uint32_t ch2_tx_end:              1;
-            uint32_t ch2_rx_end:              1;
-            uint32_t ch2_err:                 1;
-            uint32_t ch3_tx_end:              1;
-            uint32_t ch3_rx_end:              1;
-            uint32_t ch3_err:                 1;
-            uint32_t ch0_tx_thr_event:        1;
-            uint32_t ch1_tx_thr_event:        1;
-            uint32_t ch2_tx_thr_event:        1;
-            uint32_t ch3_tx_thr_event:        1;
-            uint32_t ch0_tx_loop:             1;
-            uint32_t ch1_tx_loop:             1;
-            uint32_t ch2_tx_loop:             1;
-            uint32_t ch3_tx_loop:             1;
-            uint32_t ch0_rx_thr_event:        1;
-            uint32_t ch1_rx_thr_event:        1;
-            uint32_t ch2_rx_thr_event:        1;
-            uint32_t ch3_rx_thr_event:        1;
-            uint32_t reserved24:              8;
-        };
-        uint32_t val;
-    } int_st;
-    union {
-        struct {
-            uint32_t ch0_tx_end:               1;
-            uint32_t ch0_rx_end:               1;
-            uint32_t ch0_err:                  1;
-            uint32_t ch1_tx_end:               1;
-            uint32_t ch1_rx_end:               1;
-            uint32_t ch1_err:                  1;
-            uint32_t ch2_tx_end:               1;
-            uint32_t ch2_rx_end:               1;
-            uint32_t ch2_err:                  1;
-            uint32_t ch3_tx_end:               1;
-            uint32_t ch3_rx_end:               1;
-            uint32_t ch3_err:                  1;
-            uint32_t ch0_tx_thr_event:         1;
-            uint32_t ch1_tx_thr_event:         1;
-            uint32_t ch2_tx_thr_event:         1;
-            uint32_t ch3_tx_thr_event:         1;
-            uint32_t ch0_tx_loop:              1;
-            uint32_t ch1_tx_loop:              1;
-            uint32_t ch2_tx_loop:              1;
-            uint32_t ch3_tx_loop:              1;
-            uint32_t ch0_rx_thr_event:         1;
-            uint32_t ch1_rx_thr_event:         1;
-            uint32_t ch2_rx_thr_event:         1;
-            uint32_t ch3_rx_thr_event:         1;
-            uint32_t reserved24:               8;
-        };
-        uint32_t val;
-    } int_ena;
-    union {
-        struct {
-            uint32_t ch0_tx_end:               1;
-            uint32_t ch0_rx_end:               1;
-            uint32_t ch0_err:                  1;
-            uint32_t ch1_tx_end:               1;
-            uint32_t ch1_rx_end:               1;
-            uint32_t ch1_err:                  1;
-            uint32_t ch2_tx_end:               1;
-            uint32_t ch2_rx_end:               1;
-            uint32_t ch2_err:                  1;
-            uint32_t ch3_tx_end:               1;
-            uint32_t ch3_rx_end:               1;
-            uint32_t ch3_err:                  1;
-            uint32_t ch0_tx_thr_event:         1;
-            uint32_t ch1_tx_thr_event:         1;
-            uint32_t ch2_tx_thr_event:         1;
-            uint32_t ch3_tx_thr_event:         1;
-            uint32_t ch0_tx_loop:              1;
-            uint32_t ch1_tx_loop:              1;
-            uint32_t ch2_tx_loop:              1;
-            uint32_t ch3_tx_loop:              1;
-            uint32_t ch0_rx_thr_event:         1;
-            uint32_t ch1_rx_thr_event:         1;
-            uint32_t ch2_rx_thr_event:         1;
-            uint32_t ch3_rx_thr_event:         1;
-            uint32_t reserved24:               8;
-        };
-        uint32_t val;
-    } int_clr;
-    union {
-        struct {
-            uint32_t low:             16;
-            uint32_t high:            16;
-        };
-        uint32_t val;
-    } carrier_duty_ch[4];
-    union {
-        struct {
-            uint32_t limit:                9;
-            uint32_t tx_loop_num:         10;
-            uint32_t tx_loop_cnt_en:       1;
-            uint32_t loop_count_reset:     1;
-            uint32_t rx_lim:               9;
-            uint32_t reserved30:           2;
-        };
-        uint32_t val;
-    } tx_lim_ch[4];
-    union {
-        struct {
-            uint32_t fifo_mask:        1;
-            uint32_t mem_tx_wrap_en:   1;
-            uint32_t mem_clk_force_on: 1;
-            uint32_t mem_force_pd:     1;
-            uint32_t mem_force_pu:     1;
-            uint32_t reserved5:       26;
-            uint32_t clk_en:           1;
-        };
-        uint32_t val;
-    } apb_conf;
-    union {
-        struct {
-            uint32_t ch0:        1;
-            uint32_t ch1:        1;
-            uint32_t ch2:        1;
-            uint32_t ch3:        1;
-            uint32_t en:         1;
-            uint32_t reserved5: 27;
-        };
-        uint32_t val;
-    } tx_sim;
-    union {
-        struct {
-            uint32_t ch0:             1;
-            uint32_t ch1:             1;
-            uint32_t ch2:             1;
-            uint32_t ch3:             1;
-            uint32_t reserved4:      28;
-        };
-        uint32_t val;
-    } ref_cnt_rst;
-    union {
-        struct {
-            uint32_t carrier_low_thres_ch: 16;
-            uint32_t carrier_high_thres_ch:16;
-        };
-        uint32_t val;
-    } ch_rx_carrier_rm[4];
-    uint32_t reserved_9c;
-    uint32_t reserved_a0;
-    uint32_t reserved_a4;
-    uint32_t reserved_a8;
-    uint32_t reserved_ac;
-    uint32_t reserved_b0;
-    uint32_t reserved_b4;
-    uint32_t reserved_b8;
-    uint32_t reserved_bc;
-    uint32_t reserved_c0;
-    uint32_t reserved_c4;
-    uint32_t reserved_c8;
-    uint32_t reserved_cc;
-    uint32_t reserved_d0;
-    uint32_t reserved_d4;
-    uint32_t reserved_d8;
-    uint32_t reserved_dc;
-    uint32_t reserved_e0;
-    uint32_t reserved_e4;
-    uint32_t reserved_e8;
-    uint32_t reserved_ec;
-    uint32_t reserved_f0;
-    uint32_t reserved_f4;
-    uint32_t reserved_f8;
-    uint32_t date; /* Version Control Register */
+    volatile rmt_chnstatus_reg_t status_ch[4];
+    volatile rmt_chnaddr_reg_t apb_mem_addr_ch[4];
+    volatile rmt_int_raw_reg_t int_raw;
+    volatile rmt_int_st_reg_t int_st;
+    volatile rmt_int_ena_reg_t int_ena;
+    volatile rmt_int_clr_reg_t int_clr;
+    volatile rmt_chncarrier_duty_reg_t carrier_duty_ch[4];
+    volatile rmt_chn_tx_lim_reg_t tx_lim_ch[4];
+    volatile rmt_apb_conf_reg_t apb_conf;
+    volatile rmt_tx_sim_reg_t tx_sim;
+    volatile rmt_ref_cnt_rst_reg_t ref_cnt_rst;
+    volatile rmt_chn_rx_carrier_rm_reg_t ch_rx_carrier_rm[4];
+    uint32_t reserved_09c[24];
+    volatile rmt_date_reg_t date;
 } rmt_dev_t;
+
+
+#ifndef __cplusplus
+_Static_assert(sizeof(rmt_dev_t) == 0x100, "Invalid size of rmt_dev_t structure");
+#endif
+
 extern rmt_dev_t RMT;
 
 typedef struct {
@@ -305,10 +820,9 @@ typedef volatile struct rmt_mem_s {
         rmt_item32_t data32[64];
     } chan[4];
 } rmt_mem_t;
+
 extern rmt_mem_t RMTMEM;
 
 #ifdef __cplusplus
 }
 #endif
-
-#endif  /* _SOC_RMT_STRUCT_H_ */
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h
index 620c5dc9ac8..2d311893dde 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -29,6 +29,7 @@
 #pragma once
 
 /*-------------------------- COMMON CAPS ---------------------------------------*/
+#define SOC_ADC_SUPPORTED               1
 #define SOC_DAC_SUPPORTED               1
 #define SOC_TWAI_SUPPORTED              1
 #define SOC_CP_DMA_SUPPORTED            1
@@ -56,6 +57,7 @@
 /*-------------------------- ADC CAPS ----------------------------------------*/
 /*!< SAR ADC Module*/
 #define SOC_ADC_RTC_CTRL_SUPPORTED              1
+#define SOC_ADC_DIG_CTRL_SUPPORTED              1
 #define SOC_ADC_ARBITER_SUPPORTED               1
 #define SOC_ADC_FILTER_SUPPORTED                1
 #define SOC_ADC_MONITOR_SUPPORTED               1
@@ -77,7 +79,6 @@
 /*!< Calibration */
 #define SOC_ADC_CALIBRATION_V1_SUPPORTED        (1) /*!< support HW offset calibration version 1*/
 
-
 /*-------------------------- BROWNOUT CAPS -----------------------------------*/
 #define SOC_BROWNOUT_RESET_SUPPORTED 1
 
@@ -97,18 +98,18 @@
 /*-------------------------- GPIO CAPS ---------------------------------------*/
 // ESP32-S2 has 1 GPIO peripheral
 #define SOC_GPIO_PORT           (1)
-#define SOC_GPIO_PIN_COUNT      (48)
+#define SOC_GPIO_PIN_COUNT      (47)
 
-// On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register.
+// On ESP32-S2 those PADs which have RTC functions must set pullup/down/capability via RTC register.
 // On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
 #define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1)
 // Force hold is a new function of ESP32-S2
 #define SOC_GPIO_SUPPORT_FORCE_HOLD      (1)
 
-// 0~47 except from 22~25, 47 are valid
-#define SOC_GPIO_VALID_GPIO_MASK             (0xFFFFFFFFFFFFULL & ~(0ULL | BIT22 | BIT23 | BIT24 | BIT25 | BIT47))
-// GPIO 46, 47 are input only
-#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK     (SOC_GPIO_VALID_GPIO_MASK & ~(0ULL | BIT46 | BIT47))
+// 0~46 except from 22~25 are valid
+#define SOC_GPIO_VALID_GPIO_MASK             (0x7FFFFFFFFFFFULL & ~(0ULL | BIT22 | BIT23 | BIT24 | BIT25))
+// GPIO 46 is input only
+#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK     (SOC_GPIO_VALID_GPIO_MASK & ~(0ULL | BIT46))
 
 // Support to configure slept status
 #define SOC_GPIO_SUPPORT_SLP_SWITCH  (1)
@@ -134,14 +135,19 @@
 #define SOC_I2C_SUPPORT_REF_TICK   (1)
 #define SOC_I2C_SUPPORT_APB        (1)
 
+/*-------------------------- APLL CAPS ----------------------------------------*/
+#define SOC_CLK_APLL_SUPPORTED       (1)
+// apll_multiplier_out = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536)
+#define SOC_APLL_MULTIPLIER_OUT_MIN_HZ (350000000) // 350 MHz
+#define SOC_APLL_MULTIPLIER_OUT_MAX_HZ (500000000) // 500 MHz
+#define SOC_APLL_MIN_HZ    (5303031)   // 5.303031 MHz
+#define SOC_APLL_MAX_HZ    (125000000) // 125MHz
+
 /*-------------------------- I2S CAPS ----------------------------------------*/
 // ESP32-S2 have 1 I2S
 #define SOC_I2S_NUM                (1)
 #define SOC_I2S_SUPPORTS_APLL      (1)// ESP32-S2 support APLL
 #define SOC_I2S_SUPPORTS_DMA_EQUAL (1)
-#define SOC_I2S_APLL_MIN_FREQ      (250000000)
-#define SOC_I2S_APLL_MAX_FREQ      (500000000)
-#define SOC_I2S_APLL_MIN_RATE      (10675) //in Hz, I2S Clock rate limited by hardware
 #define SOC_I2S_LCD_I80_VARIANT    (1)
 
 /*-------------------------- LCD CAPS ----------------------------------------*/
@@ -175,7 +181,6 @@
 #define SOC_RMT_RX_CANDIDATES_PER_GROUP (4)  /*!< Number of channels that capable of Receive in each group */
 #define SOC_RMT_CHANNELS_PER_GROUP      (4)  /*!< Total 4 channels */
 #define SOC_RMT_MEM_WORDS_PER_CHANNEL   (64) /*!< Each channel owns 64 words memory (1 word = 4 Bytes) */
-#define SOC_RMT_SUPPORT_RX_PINGPONG     (1)  /*!< Support Ping-Pong mode on RX path */
 #define SOC_RMT_SUPPORT_RX_DEMODULATION (1)  /*!< Support signal demodulation on RX path (i.e. remove carrier) */
 #define SOC_RMT_SUPPORT_TX_LOOP_COUNT   (1)  /*!< Support transmiting specified number of cycles in loop mode */
 #define SOC_RMT_SUPPORT_TX_SYNCHRO      (1)  /*!< Support coordinate a group of TX channels to start simultaneously */
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/tracemem_config.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/tracemem_config.h
new file mode 100644
index 00000000000..7175279de6a
--- /dev/null
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/tracemem_config.h
@@ -0,0 +1,21 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define TRACEMEM_MUX_BLK0_NUM                   19
+#define TRACEMEM_MUX_BLK1_NUM                   20
+#define TRACEMEM_BLK_NUM2ADDR(_n_)              (0x3FFB8000UL + 0x4000UL*((_n_)-4))
+
+#define TRACEMEM_BLK0_ADDR                      TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK0_NUM)
+#define TRACEMEM_BLK1_ADDR                      TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK1_NUM)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/uart_channel.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/uart_channel.h
index 5b8dc56d5ae..ae5c84fb45c 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/uart_channel.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/uart_channel.h
@@ -1,61 +1,41 @@
-// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
+/*
+ * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32S2.
 
 #ifndef _SOC_UART_CHANNEL_H
 #define _SOC_UART_CHANNEL_H
 
 //UART channels
-#define UART_GPIO1_DIRECT_CHANNEL       UART_NUM_0
-#define UART_NUM_0_TXD_DIRECT_GPIO_NUM  1
-#define UART_GPIO3_DIRECT_CHANNEL       UART_NUM_0
-#define UART_NUM_0_RXD_DIRECT_GPIO_NUM  3
-#define UART_GPIO19_DIRECT_CHANNEL      UART_NUM_0
-#define UART_NUM_0_CTS_DIRECT_GPIO_NUM  19
-#define UART_GPIO22_DIRECT_CHANNEL      UART_NUM_0
-#define UART_NUM_0_RTS_DIRECT_GPIO_NUM  22
-
-#define UART_TXD_GPIO1_DIRECT_CHANNEL   UART_GPIO1_DIRECT_CHANNEL
-#define UART_RXD_GPIO3_DIRECT_CHANNEL   UART_GPIO3_DIRECT_CHANNEL
-#define UART_CTS_GPIO19_DIRECT_CHANNEL  UART_GPIO19_DIRECT_CHANNEL
-#define UART_RTS_GPIO22_DIRECT_CHANNEL  UART_GPIO22_DIRECT_CHANNEL
-
-#define UART_GPIO10_DIRECT_CHANNEL      UART_NUM_1
-#define UART_NUM_1_TXD_DIRECT_GPIO_NUM  10
-#define UART_GPIO9_DIRECT_CHANNEL       UART_NUM_1
-#define UART_NUM_1_RXD_DIRECT_GPIO_NUM  9
-#define UART_GPIO6_DIRECT_CHANNEL       UART_NUM_1
-#define UART_NUM_1_CTS_DIRECT_GPIO_NUM  6
-#define UART_GPIO11_DIRECT_CHANNEL      UART_NUM_1
-#define UART_NUM_1_RTS_DIRECT_GPIO_NUM  11
-
-#define UART_TXD_GPIO10_DIRECT_CHANNEL  UART_GPIO10_DIRECT_CHANNEL
-#define UART_RXD_GPIO9_DIRECT_CHANNEL   UART_GPIO9_DIRECT_CHANNEL
-#define UART_CTS_GPIO6_DIRECT_CHANNEL   UART_GPIO6_DIRECT_CHANNEL
-#define UART_RTS_GPIO11_DIRECT_CHANNEL  UART_GPIO11_DIRECT_CHANNEL
-
-#define UART_GPIO17_DIRECT_CHANNEL      UART_NUM_2
-#define UART_NUM_2_TXD_DIRECT_GPIO_NUM  17
-#define UART_GPIO16_DIRECT_CHANNEL      UART_NUM_2
-#define UART_NUM_2_RXD_DIRECT_GPIO_NUM  16
-#define UART_GPIO8_DIRECT_CHANNEL       UART_NUM_2
-#define UART_NUM_2_CTS_DIRECT_GPIO_NUM  8
-#define UART_GPIO7_DIRECT_CHANNEL       UART_NUM_2
-#define UART_NUM_2_RTS_DIRECT_GPIO_NUM  7
+#define UART_GPIO43_DIRECT_CHANNEL      UART_NUM_0
+#define UART_NUM_0_TXD_DIRECT_GPIO_NUM  43
+#define UART_GPIO44_DIRECT_CHANNEL      UART_NUM_0
+#define UART_NUM_0_RXD_DIRECT_GPIO_NUM  44
+#define UART_GPIO16_DIRECT_CHANNEL      UART_NUM_0
+#define UART_NUM_0_CTS_DIRECT_GPIO_NUM  16
+#define UART_GPIO15_DIRECT_CHANNEL      UART_NUM_0
+#define UART_NUM_0_RTS_DIRECT_GPIO_NUM  15
+
+#define UART_TXD_GPIO43_DIRECT_CHANNEL  UART_GPIO43_DIRECT_CHANNEL
+#define UART_RXD_GPIO44_DIRECT_CHANNEL  UART_GPIO44_DIRECT_CHANNEL
+#define UART_CTS_GPIO16_DIRECT_CHANNEL  UART_GPIO16_DIRECT_CHANNEL
+#define UART_RTS_GPIO15_DIRECT_CHANNEL  UART_GPIO15_DIRECT_CHANNEL
+
+#define UART_GPIO17_DIRECT_CHANNEL      UART_NUM_1
+#define UART_NUM_1_TXD_DIRECT_GPIO_NUM  17
+#define UART_GPIO18_DIRECT_CHANNEL      UART_NUM_1
+#define UART_NUM_1_RXD_DIRECT_GPIO_NUM  18
+#define UART_GPIO20_DIRECT_CHANNEL      UART_NUM_1
+#define UART_NUM_1_CTS_DIRECT_GPIO_NUM  20
+#define UART_GPIO19_DIRECT_CHANNEL      UART_NUM_1
+#define UART_NUM_1_RTS_DIRECT_GPIO_NUM  19
 
 #define UART_TXD_GPIO17_DIRECT_CHANNEL  UART_GPIO17_DIRECT_CHANNEL
-#define UART_RXD_GPIO16_DIRECT_CHANNEL  UART_GPIO16_DIRECT_CHANNEL
-#define UART_CTS_GPIO8_DIRECT_CHANNEL   UART_GPIO8_DIRECT_CHANNEL
-#define UART_RTS_GPIO7_DIRECT_CHANNEL   UART_GPIO7_DIRECT_CHANNEL
+#define UART_RXD_GPIO18_DIRECT_CHANNEL  UART_GPIO18_DIRECT_CHANNEL
+#define UART_CTS_GPIO20_DIRECT_CHANNEL  UART_GPIO20_DIRECT_CHANNEL
+#define UART_RTS_GPIO19_DIRECT_CHANNEL  UART_GPIO19_DIRECT_CHANNEL
 
 #endif
diff --git a/tools/sdk/esp32s2/include/spi_flash/include/spi_flash_chip_th.h b/tools/sdk/esp32s2/include/spi_flash/include/spi_flash_chip_th.h
new file mode 100644
index 00000000000..7f631faf136
--- /dev/null
+++ b/tools/sdk/esp32s2/include/spi_flash/include/spi_flash_chip_th.h
@@ -0,0 +1,13 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_flash.h"
+#include "spi_flash_chip_driver.h"
+
+extern const spi_flash_chip_t esp_flash_chip_th;
diff --git a/tools/sdk/esp32s2/include/usb/include/esp_private/usb_phy.h b/tools/sdk/esp32s2/include/usb/include/esp_private/usb_phy.h
index 5e8f9c8df19..5260e0589e6 100644
--- a/tools/sdk/esp32s2/include/usb/include/esp_private/usb_phy.h
+++ b/tools/sdk/esp32s2/include/usb/include/esp_private/usb_phy.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -63,6 +63,8 @@ typedef struct phy_context_t *usb_phy_handle_t;    /**< USB PHY context handle *
  * @brief Initialize a new USB PHY
  *        Configure at least PHY source.
  *
+ * This function will enable the OTG Controller
+ *
  * @param[in] config USB PHY configurtion struct
  * @param[out] handle_ret USB PHY context handle
  *
diff --git a/tools/sdk/esp32s2/include/usb/include/usb/usb_helpers.h b/tools/sdk/esp32s2/include/usb/include/usb/usb_helpers.h
index d8405dd5fcd..955d2fa96d3 100644
--- a/tools/sdk/esp32s2/include/usb/include/usb/usb_helpers.h
+++ b/tools/sdk/esp32s2/include/usb/include/usb/usb_helpers.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -11,6 +11,8 @@ Warning: The USB Host Library API is still a beta version and may be subject to
 #pragma once
 
 #include <stdint.h>
+#include "esp_err.h"
+#include "usb/usb_types_stack.h"
 #include "usb/usb_types_ch9.h"
 
 #ifdef __cplusplus
@@ -109,6 +111,44 @@ const usb_ep_desc_t *usb_parse_endpoint_descriptor_by_index(const usb_intf_desc_
  */
 const usb_ep_desc_t *usb_parse_endpoint_descriptor_by_address(const usb_config_desc_t *config_desc, uint8_t bInterfaceNumber, uint8_t bAlternateSetting, uint8_t bEndpointAddress, int *offset);
 
+// ----------------------------------------------- Descriptor Printing -------------------------------------------------
+
+/**
+ * @brief Print class specific descriptor callback
+ *
+ * Optional callback to be provided to usb_print_config_descriptor() function.
+ * The callback is called when when a non-standard descriptor is encountered.
+ * The callback should decode the descriptor as print it.
+ */
+typedef void (*print_class_descriptor_cb)(const usb_standard_desc_t *);
+
+/**
+ * @brief Print device descriptor
+ *
+ * @param devc_desc Device descriptor
+ */
+void usb_print_device_descriptor(const usb_device_desc_t *devc_desc);
+
+/**
+ * @brief Print configuration descriptor
+ *
+ * - This function prints the full contents of a configuration descriptor (including interface and endpoint descriptors)
+ * - When a non-standard descriptor is encountered, this function will call the class_specific_cb if it is provided
+ *
+ * @param cfg_desc Configuration descriptor
+ * @param class_specific_cb Class specific descriptor callback. Can be NULL
+ */
+void usb_print_config_descriptor(const usb_config_desc_t *cfg_desc, print_class_descriptor_cb class_specific_cb);
+
+/**
+ * @brief Print a string descriptor
+ *
+ * This funciton will only print ASCII characters of the UTF-16 encoded string
+ *
+ * @param str_desc String descriptor
+ */
+void usb_print_string_descriptor(const usb_str_desc_t *str_desc);
+
 // ------------------------------------------------------ Misc ---------------------------------------------------------
 
 /**
@@ -116,6 +156,8 @@ const usb_ep_desc_t *usb_parse_endpoint_descriptor_by_address(const usb_config_d
  *
  * This is a convenience function to round up a size/length to an endpoint's MPS (Maximum packet size). This is useful
  * when calculating transfer or buffer lengths of IN endpoints.
+ * - If MPS <= 0, this function will return 0
+ * - If num_bytes <= 0, this function will return 0
  *
  * @param[in] num_bytes Number of bytes
  * @param[in] mps MPS
@@ -123,7 +165,7 @@ const usb_ep_desc_t *usb_parse_endpoint_descriptor_by_address(const usb_config_d
  */
 static inline int usb_round_up_to_mps(int num_bytes, int mps)
 {
-    if (num_bytes < 0 || mps < 0) {
+    if (num_bytes <= 0 || mps <= 0) {    //MPS can never be zero
         return 0;
     }
     return ((num_bytes + mps - 1) / mps) * mps;
diff --git a/tools/sdk/esp32s2/include/usb/include/usb/usb_host.h b/tools/sdk/esp32s2/include/usb/include/usb/usb_host.h
index 9a91e7ed18f..8c6f6f42b1b 100644
--- a/tools/sdk/esp32s2/include/usb/include/usb/usb_host.h
+++ b/tools/sdk/esp32s2/include/usb/include/usb/usb_host.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -72,6 +72,16 @@ typedef struct {
     };
 } usb_host_client_event_msg_t;
 
+// ------------------------ Info ---------------------------
+
+/**
+ * @brief Current information about the USB Host Library obtained via usb_host_lib_info()
+ */
+typedef struct {
+    int num_devices;    /**< Current number of connected (and enumerated) devices */
+    int num_clients;    /**< Current number of registered clients */
+} usb_host_lib_info_t;
+
 // ---------------------- Callbacks ------------------------
 
 /**
@@ -91,7 +101,11 @@ typedef void (*usb_host_client_event_cb_t)(const usb_host_client_event_msg_t *ev
  * Configuration structure of the USB Host Library. Provided in the usb_host_install() function
  */
 typedef struct {
-    int intr_flags;                     /**< Interrupt flags for the underlying ISR used by the USB Host stack */
+    bool skip_phy_setup;        /**< If set, the USB Host Library will not configure the USB PHY thus allowing the user
+                                     to manually configure the USB PHY before calling usb_host_install(). Users should
+                                     set this if they want to use an external USB PHY. Otherwise, the USB Host Library
+                                     will automatically configure the internal USB PHY */
+    int intr_flags;             /**< Interrupt flags for the underlying ISR used by the USB Host stack */
 } usb_host_config_t;
 
 /**
@@ -118,6 +132,9 @@ typedef struct {
  * - This function should only once to install the USB Host Library
  * - This function should be called before any other USB Host Library functions are called
  *
+ * @note If skip_phy_setup is set in the install configuration, the user is responsible for ensuring that the underlying
+ *       Host Controller is enabled and the USB PHY (internal or external) is already setup before this function is
+ *       called.
  * @param[in] config USB Host Library configuration
  * @return esp_err_t
  */
@@ -131,6 +148,8 @@ esp_err_t usb_host_install(const usb_host_config_t *config);
  * - All devices must have been freed by calling usb_host_device_free_all() and receiving the
  *   USB_HOST_LIB_EVENT_FLAGS_ALL_FREE event flag
  *
+ * @note If skip_phy_setup was set when the Host Library was installed, the user is responsible for disabling the
+ *       underlying Host Controller and USB PHY (internal or external).
  * @return esp_err_t
  */
 esp_err_t usb_host_uninstall(void);
@@ -140,10 +159,11 @@ esp_err_t usb_host_uninstall(void);
  *
  * - This function handles all of the USB Host Library's processing and should be called repeatedly in a loop
  * - Check event_flags_ret to see if an flags are set indicating particular USB Host Library events
+ * - This function should never be called by multiple threads simultaneously
  *
  * @note This function can block
  * @param[in] timeout_ticks Timeout in ticks to wait for an event to occur
- * @param[out] event_flags_ret Event flags that indicate what USB Host Library event occurred
+ * @param[out] event_flags_ret Event flags that indicate what USB Host Library event occurred.
  * @return esp_err_t
  */
 esp_err_t usb_host_lib_handle_events(TickType_t timeout_ticks, uint32_t *event_flags_ret);
@@ -157,6 +177,14 @@ esp_err_t usb_host_lib_handle_events(TickType_t timeout_ticks, uint32_t *event_f
  */
 esp_err_t usb_host_lib_unblock(void);
 
+/**
+ * @brief Get current information about the USB Host Library
+ *
+ * @param[out] info_ret USB Host Library Information
+ * @return esp_err_t
+ */
+esp_err_t usb_host_lib_info(usb_host_lib_info_t *info_ret);
+
 // ------------------------------------------------ Client Functions ---------------------------------------------------
 
 /**
@@ -186,6 +214,7 @@ esp_err_t usb_host_client_deregister(usb_host_client_handle_t client_hdl);
  * @brief USB Host Library client processing function
  *
  * - This function handles all of a client's processing and should be called repeatedly in a loop
+ * - For a particular client, this function should never be called by multiple threads simultaneously
  *
  * @note This function can block
  * @param[in] client_hdl Client handle
@@ -256,8 +285,7 @@ esp_err_t usb_host_device_free_all(void);
  *
  * - This function fills an empty list with the address of connected devices
  * - The Device addresses can then used in usb_host_device_open()
- * - If there are more devices than the list_len, this function will only fill
- *   up to list_len number of devices.
+ * - If there are more devices than the list_len, this function will only fill up to list_len number of devices.
  *
  * @param[in] list_len Length of the empty list
  * @param[inout] dev_addr_list Empty list to be filled
@@ -413,6 +441,7 @@ esp_err_t usb_host_transfer_alloc(size_t data_buffer_size, int num_isoc_packets,
  *
  * - Free a transfer object previously allocated using usb_host_transfer_alloc()
  * - The transfer must not be in-flight when attempting to free it
+ * - If a NULL pointer is passed, this function will simply return ESP_OK
  *
  * @param[in] transfer Transfer object
  * @return esp_err_t
diff --git a/tools/sdk/esp32s2/include/usb/include/usb/usb_types_ch9.h b/tools/sdk/esp32s2/include/usb/include/usb/usb_types_ch9.h
index 7d40bc46e0e..b11305900f0 100644
--- a/tools/sdk/esp32s2/include/usb/include/usb/usb_types_ch9.h
+++ b/tools/sdk/esp32s2/include/usb/include/usb/usb_types_ch9.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -214,6 +214,17 @@ _Static_assert(sizeof(usb_setup_packet_t) == USB_SETUP_PACKET_SIZE, "Size of usb
     (setup_pkt_ptr)->wLength = 0;   \
 })
 
+/**
+ * @brief Initializer for a request to get an string descriptor
+ */
+#define USB_SETUP_PACKET_INIT_GET_STR_DESC(setup_pkt_ptr, string_index, lang_id, desc_len) ({ \
+    (setup_pkt_ptr)->bmRequestType = USB_BM_REQUEST_TYPE_DIR_IN | USB_BM_REQUEST_TYPE_TYPE_STANDARD | USB_BM_REQUEST_TYPE_RECIP_DEVICE; \
+    (setup_pkt_ptr)->bRequest = USB_B_REQUEST_GET_DESCRIPTOR; \
+    (setup_pkt_ptr)->wValue = (USB_W_VALUE_DT_STRING << 8) | ((string_index) & 0xFF); \
+    (setup_pkt_ptr)->wIndex = (lang_id); \
+    (setup_pkt_ptr)->wLength = (desc_len); \
+})
+
 // ---------------- Standard Descriptor --------------------
 
 /**
@@ -454,7 +465,7 @@ _Static_assert(sizeof(usb_ep_desc_t) == USB_EP_DESC_SIZE, "Size of usb_ep_desc_t
 /**
  * @brief Size of a short USB string descriptor in bytes
  */
-#define USB_STR_DESC_SIZE       4
+#define USB_STR_DESC_SIZE       2
 
 /**
  * @brief Structure representing a USB string descriptor
@@ -463,7 +474,7 @@ typedef union {
     struct {
         uint8_t bLength;                    /**< Size of the descriptor in bytes */
         uint8_t bDescriptorType;            /**< STRING Descriptor Type */
-        uint16_t wData[1];                  /**< UTF-16LE encoded */
+        uint16_t wData[];                   /**< UTF-16LE encoded */
     } USB_DESC_ATTR;
     uint8_t val[USB_STR_DESC_SIZE];
 } usb_str_desc_t;
diff --git a/tools/sdk/esp32s2/include/usb/include/usb/usb_types_stack.h b/tools/sdk/esp32s2/include/usb/include/usb/usb_types_stack.h
index 974d01def55..c438c54a7f8 100644
--- a/tools/sdk/esp32s2/include/usb/include/usb/usb_types_stack.h
+++ b/tools/sdk/esp32s2/include/usb/include/usb/usb_types_stack.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -49,10 +49,13 @@ typedef struct usb_device_handle_s * usb_device_handle_t;
  * @brief Basic information of an enumerated device
  */
 typedef struct {
-    usb_speed_t speed;                  /**< Device's speed */
-    uint8_t dev_addr;                   /**< Device's address */
-    uint8_t bMaxPacketSize0;            /**< The maximum packet size of the device's default endpoint */
-    uint8_t bConfigurationValue;        /**< Device's current configuration number */
+    usb_speed_t speed;                              /**< Device's speed */
+    uint8_t dev_addr;                               /**< Device's address */
+    uint8_t bMaxPacketSize0;                        /**< The maximum packet size of the device's default endpoint */
+    uint8_t bConfigurationValue;                    /**< Device's current configuration number */
+    const usb_str_desc_t *str_desc_manufacturer;    /**< Pointer to Manufacturer string descriptor (can be NULL) */
+    const usb_str_desc_t *str_desc_product;         /**< Pointer to Product string descriptor (can be NULL) */
+    const usb_str_desc_t *str_desc_serial_num;      /**< Pointer to Serial Number string descriptor (can be NULL) */
 } usb_device_info_t;
 
 // ------------------------------------------------ Transfer Related ---------------------------------------------------
@@ -135,9 +138,32 @@ struct usb_transfer_s{
     usb_transfer_cb_t callback;                     /**< Transfer callback */
     void *context;                                  /**< Context variable for transfer to associate transfer with something */
     const int num_isoc_packets;                     /**< Only relevant to Isochronous. Number of service periods (i.e., intervals) to transfer data buffer over. */
-    usb_isoc_packet_desc_t isoc_packet_desc[0];     /**< Descriptors for each Isochronous packet */
+    usb_isoc_packet_desc_t isoc_packet_desc[];      /**< Descriptors for each Isochronous packet */
 };
 
+/**
+ * @brief Terminate Bulk/Interrupt OUT transfer with a zero length packet
+ *
+ * OUT transfers normally terminate when the Host has transferred the exact amount of data it needs to the device.
+ * However, for bulk and interrupt OUT transfers, if the transfer size just happened to be a multiple of MPS, it will be
+ * impossible to know the boundary between two consecutive transfers to the same endpoint.
+ *
+ * Therefore, this flag will cause the transfer to automatically add a zero length packet (ZLP) at the end of the
+ * transfer if the following conditions are met:
+ * - The target endpoint is a Bulk/Interrupt OUT endpoint (Host to device)
+ * - The transfer's length (i.e., transfer.num_bytes) is a multiple of the endpoint's MPS
+ *
+ * Otherwise, this flag has no effect.
+ *
+ * Users should check whether their target device's class requires a ZLP, as not all Bulk/Interrupt OUT endpoints
+ * require them. For example:
+ * - For MSC Bulk Only Transport class, the Host MUST NEVER send a ZLP. Bulk transfer boundaries are determined by the CBW and CSW instead
+ * - For CDC Ethernet, the Host MUST ALWAYS send a ZLP if a segment (i.e., a transfer) is a multiple of MPS (See 3.3.1 Segment Delineation)
+ *
+ * @note See USB2.0 specification 5.7.3 and 5.8.3 for more details
+ * @note IN transfers normally terminate when the Host as receive the exact amount of data it needs (must be multiple of MPS)
+ *       or the endpoint sends a short packet to the Host
+ */
 #define USB_TRANSFER_FLAG_ZERO_PACK  0x01           /**< (For bulk OUT only). Indicates that a bulk OUT transfers should always terminate with a short packet, even if it means adding an extra zero length packet */
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32s2/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h b/tools/sdk/esp32s2/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h
index 2fa64448d49..d477580fa99 100644
--- a/tools/sdk/esp32s2/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h
+++ b/tools/sdk/esp32s2/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h
@@ -15,7 +15,7 @@
 #ifndef _WIFI_PROV_CONFIG_H_
 #define _WIFI_PROV_CONFIG_H_
 
-#include <lwip/inet.h>
+#include <lwip/ip4_addr.h>
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/tools/sdk/esp32s2/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h b/tools/sdk/esp32s2/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h
index 9777a424e15..41a6a7d685c 100644
--- a/tools/sdk/esp32s2/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h
+++ b/tools/sdk/esp32s2/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -17,7 +17,13 @@ typedef enum {
     ESP_EAP_TTLS_PHASE2_MSCHAP,
     ESP_EAP_TTLS_PHASE2_PAP,
     ESP_EAP_TTLS_PHASE2_CHAP
-} esp_eap_ttls_phase2_types ;
+} esp_eap_ttls_phase2_types;
+
+typedef struct {
+   int fast_provisioning;
+   int fast_max_pac_list_len;
+   bool fast_pac_format_binary;
+} esp_eap_fast_config;
 
 #ifdef __cplusplus
 extern "C" {
@@ -211,6 +217,35 @@ esp_err_t esp_wifi_sta_wpa2_ent_set_ttls_phase2_method(esp_eap_ttls_phase2_types
   */
 esp_err_t esp_wifi_sta_wpa2_set_suiteb_192bit_certification(bool enable);
 
+/**
+  * @brief  Set client pac file
+  *
+  * @attention  1. For files read from the file system, length has to be decremented by 1 byte.
+  * @attention  2. Disabling the WPA_MBEDTLS_CRYPTO config is required to use EAP-FAST.
+  *
+  * @param  pac_file: pointer to the pac file
+  *         pac_file_len: length of the pac file
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_pac_file(const unsigned char *pac_file, int pac_file_len);
+
+/**
+  * @brief  Set Phase 1 parameters for EAP-FAST
+  *
+  * @attention  1. Disabling the WPA_MBEDTLS_CRYPTO config is required to use EAP-FAST.
+  *
+  * @param  config: eap fast phase 1 configuration
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_ARG: fail(out of bound arguments)
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_fast_phase1_params(esp_eap_fast_config config);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/wpa_supplicant/include/utils/wpabuf.h b/tools/sdk/esp32s2/include/wpa_supplicant/include/utils/wpabuf.h
index e9f4ce7b34e..092b31e08ba 100644
--- a/tools/sdk/esp32s2/include/wpa_supplicant/include/utils/wpabuf.h
+++ b/tools/sdk/esp32s2/include/wpa_supplicant/include/utils/wpabuf.h
@@ -1,6 +1,6 @@
 /*
  * Dynamic data buffer
- * Copyright (c) 2007-2009, Jouni Malinen <j@w1.fi>
+ * Copyright (c) 2007-2012, Jouni Malinen <j@w1.fi>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -15,6 +15,9 @@
 #ifndef WPABUF_H
 #define WPABUF_H
 
+/* wpabuf::buf is a pointer to external data */
+#define WPABUF_FLAG_EXT_DATA BIT(0)
+
 /*
  * Internal data structure for wpabuf. Please do not touch this directly from
  * elsewhere. This is only defined in header file to allow inline functions
@@ -23,8 +26,8 @@
 struct wpabuf {
 	size_t size; /* total size of the allocated buffer */
 	size_t used; /* length of data in the buffer */
-	u8 *ext_data; /* pointer to external data; NULL if data follows
-		       * struct wpabuf */
+	u8 *buf; /* pointer to the head of the buffer */
+	unsigned int flags;
 	/* optionally followed by the allocated buffer */
 };
 
@@ -35,6 +38,7 @@ struct wpabuf * wpabuf_alloc_ext_data(u8 *data, size_t len);
 struct wpabuf * wpabuf_alloc_copy(const void *data, size_t len);
 struct wpabuf * wpabuf_dup(const struct wpabuf *src);
 void wpabuf_free(struct wpabuf *buf);
+void wpabuf_clear_free(struct wpabuf *buf);
 void * wpabuf_put(struct wpabuf *buf, size_t len);
 struct wpabuf * wpabuf_concat(struct wpabuf *a, struct wpabuf *b);
 struct wpabuf * wpabuf_zeropad(struct wpabuf *buf, size_t len);
@@ -78,9 +82,7 @@ static inline size_t wpabuf_tailroom(const struct wpabuf *buf)
  */
 static inline const void * wpabuf_head(const struct wpabuf *buf)
 {
-	if (buf->ext_data)
-		return buf->ext_data;
-	return buf + 1;
+	return buf->buf;
 }
 
 static inline const u8 * wpabuf_head_u8(const struct wpabuf *buf)
@@ -95,9 +97,7 @@ static inline const u8 * wpabuf_head_u8(const struct wpabuf *buf)
  */
 static inline void * wpabuf_mhead(struct wpabuf *buf)
 {
-	if (buf->ext_data)
-		return buf->ext_data;
-	return buf + 1;
+	return buf->buf;
 }
 
 static inline u8 * wpabuf_mhead_u8(struct wpabuf *buf)
@@ -156,7 +156,8 @@ static inline void wpabuf_put_buf(struct wpabuf *dst,
 
 static inline void wpabuf_set(struct wpabuf *buf, const void *data, size_t len)
 {
-	buf->ext_data = (u8 *) data;
+	buf->buf = (u8 *) data;
+	buf->flags = WPABUF_FLAG_EXT_DATA;
 	buf->size = buf->used = len;
 }
 
diff --git a/tools/sdk/esp32s2/include/wpa_supplicant/port/include/os.h b/tools/sdk/esp32s2/include/wpa_supplicant/port/include/os.h
index 74e1e349e91..ce9aa559a44 100644
--- a/tools/sdk/esp32s2/include/wpa_supplicant/port/include/os.h
+++ b/tools/sdk/esp32s2/include/wpa_supplicant/port/include/os.h
@@ -289,6 +289,9 @@ char * ets_strdup(const char *s);
 #ifndef os_strlcpy
 #define os_strlcpy(d, s, n) strlcpy((d), (s), (n))
 #endif
+#ifndef os_strcat
+#define os_strcat(d, s) strcat((d), (s))
+#endif
 
 #ifndef os_snprintf
 #ifdef _MSC_VER
@@ -297,6 +300,9 @@ char * ets_strdup(const char *s);
 #define os_snprintf snprintf
 #endif
 #endif
+#ifndef os_sprintf
+#define os_sprintf sprintf
+#endif
 
 static inline int os_snprintf_error(size_t size, int res)
 {
diff --git a/tools/sdk/esp32s2/include/ws2812_led/led_strip.h b/tools/sdk/esp32s2/include/ws2812_led/led_strip.h
new file mode 100644
index 00000000000..8b0e826c705
--- /dev/null
+++ b/tools/sdk/esp32s2/include/ws2812_led/led_strip.h
@@ -0,0 +1,126 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "esp_err.h"
+
+/**
+* @brief LED Strip Type
+*
+*/
+typedef struct led_strip_s led_strip_t;
+
+/**
+* @brief LED Strip Device Type
+*
+*/
+typedef void *led_strip_dev_t;
+
+/**
+* @brief Declare of LED Strip Type
+*
+*/
+struct led_strip_s {
+    /**
+    * @brief Set RGB for a specific pixel
+    *
+    * @param strip: LED strip
+    * @param index: index of pixel to set
+    * @param red: red part of color
+    * @param green: green part of color
+    * @param blue: blue part of color
+    *
+    * @return
+    *      - ESP_OK: Set RGB for a specific pixel successfully
+    *      - ESP_ERR_INVALID_ARG: Set RGB for a specific pixel failed because of invalid parameters
+    *      - ESP_FAIL: Set RGB for a specific pixel failed because other error occurred
+    */
+    esp_err_t (*set_pixel)(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue);
+
+    /**
+    * @brief Refresh memory colors to LEDs
+    *
+    * @param strip: LED strip
+    * @param timeout_ms: timeout value for refreshing task
+    *
+    * @return
+    *      - ESP_OK: Refresh successfully
+    *      - ESP_ERR_TIMEOUT: Refresh failed because of timeout
+    *      - ESP_FAIL: Refresh failed because some other error occurred
+    *
+    * @note:
+    *      After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip.
+    */
+    esp_err_t (*refresh)(led_strip_t *strip, uint32_t timeout_ms);
+
+    /**
+    * @brief Clear LED strip (turn off all LEDs)
+    *
+    * @param strip: LED strip
+    * @param timeout_ms: timeout value for clearing task
+    *
+    * @return
+    *      - ESP_OK: Clear LEDs successfully
+    *      - ESP_ERR_TIMEOUT: Clear LEDs failed because of timeout
+    *      - ESP_FAIL: Clear LEDs failed because some other error occurred
+    */
+    esp_err_t (*clear)(led_strip_t *strip, uint32_t timeout_ms);
+
+    /**
+    * @brief Free LED strip resources
+    *
+    * @param strip: LED strip
+    *
+    * @return
+    *      - ESP_OK: Free resources successfully
+    *      - ESP_FAIL: Free resources failed because error occurred
+    */
+    esp_err_t (*del)(led_strip_t *strip);
+};
+
+/**
+* @brief LED Strip Configuration Type
+*
+*/
+typedef struct {
+    uint32_t max_leds;   /*!< Maximum LEDs in a single strip */
+    led_strip_dev_t dev; /*!< LED strip device (e.g. RMT channel, PWM channel, etc) */
+} led_strip_config_t;
+
+/**
+ * @brief Default configuration for LED strip
+ *
+ */
+#define LED_STRIP_DEFAULT_CONFIG(number, dev_hdl) \
+    {                                             \
+        .max_leds = number,                       \
+        .dev = dev_hdl,                           \
+    }
+
+/**
+* @brief Install a new ws2812 driver (based on RMT peripheral)
+*
+* @param config: LED strip configuration
+* @return
+*      LED strip instance or NULL
+*/
+led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/ws2812_led/ws2812_led.h b/tools/sdk/esp32s2/include/ws2812_led/ws2812_led.h
new file mode 100644
index 00000000000..8a3e4076663
--- /dev/null
+++ b/tools/sdk/esp32s2/include/ws2812_led/ws2812_led.h
@@ -0,0 +1,44 @@
+/*
+   This example code is in the Public Domain (or CC0 licensed, at your option.)
+
+   Unless required by applicable law or agreed to in writing, this
+   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+*/
+#pragma once
+#include <esp_err.h>
+
+/** Initialize the WS2812 RGB LED
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_init(void);
+
+/** Set RGB value for the WS2812 LED
+ *
+ * @param[in] red Intensity of Red color (0-100)
+ * @param[in] green Intensity of Green color (0-100)
+ * @param[in] blue Intensity of Green color (0-100)
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_set_rgb(uint32_t red, uint32_t green, uint32_t blue);
+
+/** Set HSV value for the WS2812 LED
+ *
+ * @param[in] hue Value of hue in arc degrees (0-360)
+ * @param[in] saturation Saturation in percentage (0-100)
+ * @param[in] value Value (also called Intensity) in percentage (0-100)
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_set_hsv(uint32_t hue, uint32_t saturation, uint32_t value);
+
+/** Clear (turn off) the WS2812 LED
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_clear(void);
diff --git a/tools/sdk/esp32s2/ld/esp32s2.rom.newlib-funcs.ld b/tools/sdk/esp32s2/ld/esp32s2.rom.newlib-funcs.ld
index fc976bbbafe..899997df46d 100644
--- a/tools/sdk/esp32s2/ld/esp32s2.rom.newlib-funcs.ld
+++ b/tools/sdk/esp32s2/ld/esp32s2.rom.newlib-funcs.ld
@@ -29,7 +29,6 @@ _fwalk_reent = 0x4001bd24;
 isalnum = 0x400078d8;
 isalpha = 0x400078e8;
 isascii = 0x4001aaec;
-_isatty_r = 0x400078a0;
 isblank = 0x400078f8;
 iscntrl = 0x40007918;
 isdigit = 0x40007930;
@@ -66,11 +65,9 @@ __sfmoreglue = 0x4001a4c8;
 __sfp = 0x4001a590;
 __sfp_lock_acquire = 0x4001a508;
 __sfp_lock_release = 0x4001a514;
-__sfvwrite_r = 0x40001310;
 __sinit = 0x4001a538;
 __sinit_lock_acquire = 0x4001a520;
 __sinit_lock_release = 0x4001a52c;
-__smakebuf_r = 0x40001954;
 srand = 0x40007a24;
 __sread = 0x4001a660;
 __sseek = 0x4001a6cc;
@@ -104,9 +101,7 @@ strtok_r = 0x4001af7c;
 strupr = 0x40008084;
 __swbuf = 0x4000167c;
 __swbuf_r = 0x400015bc;
-__swhatbuf_r = 0x400018f8;
 __swrite = 0x4001a698;
-__swsetup_r = 0x40001690;
 toascii = 0x4001af90;
 tolower = 0x40008158;
 toupper = 0x40008174;
diff --git a/tools/sdk/esp32s2/ld/esp32s2.rom.newlib-time.ld b/tools/sdk/esp32s2/ld/esp32s2.rom.newlib-time.ld
new file mode 100644
index 00000000000..1e705c698b5
--- /dev/null
+++ b/tools/sdk/esp32s2/ld/esp32s2.rom.newlib-time.ld
@@ -0,0 +1,16 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* These are the newlib functions and the .bss/.data symbols which are related to 'time_t'
+   or other structures which include 'time_t' (like 'struct stat').
+   These ROM functions were compiled with sizeof(time_t) == 4.
+   When compiling with sizeof(time_t) == 8, these functions should be excluded from the build.
+ */
+
+__swsetup_r = 0x40001690;
+__smakebuf_r = 0x40001954;
+__swhatbuf_r = 0x400018f8;
+__sfvwrite_r = 0x40001310;
+_isatty_r = 0x400078a0;
diff --git a/tools/sdk/esp32s2/ld/libesp_tts_chinese.a b/tools/sdk/esp32s2/ld/libesp_tts_chinese.a
new file mode 100644
index 00000000000..bacd8c9572b
Binary files /dev/null and b/tools/sdk/esp32s2/ld/libesp_tts_chinese.a differ
diff --git a/tools/sdk/esp32s2/ld/libphy.a b/tools/sdk/esp32s2/ld/libphy.a
index 7d6067b0959..37acfc40b93 100644
Binary files a/tools/sdk/esp32s2/ld/libphy.a and b/tools/sdk/esp32s2/ld/libphy.a differ
diff --git a/tools/sdk/esp32s2/ld/libvoice_set_xiaole.a b/tools/sdk/esp32s2/ld/libvoice_set_xiaole.a
new file mode 100644
index 00000000000..fe8042ea480
Binary files /dev/null and b/tools/sdk/esp32s2/ld/libvoice_set_xiaole.a differ
diff --git a/tools/sdk/esp32s2/lib/libapp_trace.a b/tools/sdk/esp32s2/lib/libapp_trace.a
index 9f3ef64051d..548bcdecc33 100644
Binary files a/tools/sdk/esp32s2/lib/libapp_trace.a and b/tools/sdk/esp32s2/lib/libapp_trace.a differ
diff --git a/tools/sdk/esp32s2/lib/libapp_update.a b/tools/sdk/esp32s2/lib/libapp_update.a
index 4df1eb88005..bcc664b67d8 100644
Binary files a/tools/sdk/esp32s2/lib/libapp_update.a and b/tools/sdk/esp32s2/lib/libapp_update.a differ
diff --git a/tools/sdk/esp32s2/lib/libarduino_tinyusb.a b/tools/sdk/esp32s2/lib/libarduino_tinyusb.a
index 88ca4f39605..875b2509375 100644
Binary files a/tools/sdk/esp32s2/lib/libarduino_tinyusb.a and b/tools/sdk/esp32s2/lib/libarduino_tinyusb.a differ
diff --git a/tools/sdk/esp32s2/lib/libasio.a b/tools/sdk/esp32s2/lib/libasio.a
index a11e63f9046..3d65da83da5 100644
Binary files a/tools/sdk/esp32s2/lib/libasio.a and b/tools/sdk/esp32s2/lib/libasio.a differ
diff --git a/tools/sdk/esp32s2/lib/libbutton.a b/tools/sdk/esp32s2/lib/libbutton.a
new file mode 100644
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diff --git a/tools/sdk/esp32s2/lib/libtcpip_adapter.a b/tools/sdk/esp32s2/lib/libtcpip_adapter.a
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Binary files a/tools/sdk/esp32s2/lib/libtcpip_adapter.a and b/tools/sdk/esp32s2/lib/libtcpip_adapter.a differ
diff --git a/tools/sdk/esp32s2/lib/libtouch_element.a b/tools/sdk/esp32s2/lib/libtouch_element.a
index d15fed6f951..3986e96c606 100644
Binary files a/tools/sdk/esp32s2/lib/libtouch_element.a and b/tools/sdk/esp32s2/lib/libtouch_element.a differ
diff --git a/tools/sdk/esp32s2/lib/libulp.a b/tools/sdk/esp32s2/lib/libulp.a
index 5da81246264..a22faac38d8 100644
Binary files a/tools/sdk/esp32s2/lib/libulp.a and b/tools/sdk/esp32s2/lib/libulp.a differ
diff --git a/tools/sdk/esp32s2/lib/libunity.a b/tools/sdk/esp32s2/lib/libunity.a
index 3a597a6926d..afbbb5d7c4b 100644
Binary files a/tools/sdk/esp32s2/lib/libunity.a and b/tools/sdk/esp32s2/lib/libunity.a differ
diff --git a/tools/sdk/esp32s2/lib/libusb.a b/tools/sdk/esp32s2/lib/libusb.a
index 767910c9002..3d8dd46f43e 100644
Binary files a/tools/sdk/esp32s2/lib/libusb.a and b/tools/sdk/esp32s2/lib/libusb.a differ
diff --git a/tools/sdk/esp32s2/lib/libvfs.a b/tools/sdk/esp32s2/lib/libvfs.a
index 8c806df82d0..2698638304b 100644
Binary files a/tools/sdk/esp32s2/lib/libvfs.a and b/tools/sdk/esp32s2/lib/libvfs.a differ
diff --git a/tools/sdk/esp32s2/lib/libwapi.a b/tools/sdk/esp32s2/lib/libwapi.a
index 71485600253..7b0697a2410 100644
Binary files a/tools/sdk/esp32s2/lib/libwapi.a and b/tools/sdk/esp32s2/lib/libwapi.a differ
diff --git a/tools/sdk/esp32s2/lib/libwear_levelling.a b/tools/sdk/esp32s2/lib/libwear_levelling.a
index 42e72e1cd5a..340541e376c 100644
Binary files a/tools/sdk/esp32s2/lib/libwear_levelling.a and b/tools/sdk/esp32s2/lib/libwear_levelling.a differ
diff --git a/tools/sdk/esp32s2/lib/libwifi_provisioning.a b/tools/sdk/esp32s2/lib/libwifi_provisioning.a
index 9056b82679c..ecba0dbdace 100644
Binary files a/tools/sdk/esp32s2/lib/libwifi_provisioning.a and b/tools/sdk/esp32s2/lib/libwifi_provisioning.a differ
diff --git a/tools/sdk/esp32s2/lib/libwpa_supplicant.a b/tools/sdk/esp32s2/lib/libwpa_supplicant.a
index 5dcfa9c3a36..932d173553f 100644
Binary files a/tools/sdk/esp32s2/lib/libwpa_supplicant.a and b/tools/sdk/esp32s2/lib/libwpa_supplicant.a differ
diff --git a/tools/sdk/esp32s2/lib/libws2812_led.a b/tools/sdk/esp32s2/lib/libws2812_led.a
new file mode 100644
index 00000000000..ecc9cc216a7
Binary files /dev/null and b/tools/sdk/esp32s2/lib/libws2812_led.a differ
diff --git a/tools/sdk/esp32s2/lib/libxtensa.a b/tools/sdk/esp32s2/lib/libxtensa.a
index 44114f73ccb..386aa74f0c7 100644
Binary files a/tools/sdk/esp32s2/lib/libxtensa.a and b/tools/sdk/esp32s2/lib/libxtensa.a differ
diff --git a/tools/sdk/esp32s2/include/config/sdkconfig.h b/tools/sdk/esp32s2/qspi_qspi/include/sdkconfig.h
similarity index 93%
rename from tools/sdk/esp32s2/include/config/sdkconfig.h
rename to tools/sdk/esp32s2/qspi_qspi/include/sdkconfig.h
index f847f0cd99f..ca14eaf2a3b 100644
--- a/tools/sdk/esp32s2/include/config/sdkconfig.h
+++ b/tools/sdk/esp32s2/qspi_qspi/include/sdkconfig.h
@@ -49,6 +49,20 @@
 #define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
 #define CONFIG_PARTITION_TABLE_OFFSET 0x8000
 #define CONFIG_PARTITION_TABLE_MD5 1
+#define CONFIG_LIB_BUILDER_FLASHMODE "qio"
+#define CONFIG_LIB_BUILDER_FLASHFREQ "80m"
+#define CONFIG_ESP_RMAKER_SELF_CLAIM 1
+#define CONFIG_ESP_RMAKER_CLAIM_TYPE 1
+#define CONFIG_ESP_RMAKER_CLAIM_SERVICE_BASE_URL "https://esp-claiming.rainmaker.espressif.com"
+#define CONFIG_ESP_RMAKER_MQTT_HOST "a1p72mufdu6064-ats.iot.us-east-1.amazonaws.com"
+#define CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE 1024
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0 1
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM 0
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH 1
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD 0
+#define CONFIG_ESP_RMAKER_OTA_HTTP_RX_BUFFER_SIZE 1024
+#define CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES 10
+#define CONFIG_ESP_RMAKER_SCENES_MAX_SCENES 10
 #define CONFIG_ENABLE_ARDUINO_DEPENDS 1
 #define CONFIG_AUTOSTART_ARDUINO 1
 #define CONFIG_ARDUINO_RUN_CORE0 1
@@ -145,7 +159,7 @@
 #define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
 #define CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH 1
 #define CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH 1
-#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 512
+#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 1024
 #define CONFIG_HTTPD_MAX_URI_LEN 512
 #define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
 #define CONFIG_HTTPD_PURGE_BUF_LEN 32
@@ -275,7 +289,6 @@
 #define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
 #define CONFIG_HEAP_POISONING_LIGHT 1
 #define CONFIG_HEAP_TRACING_OFF 1
-#define CONFIG_LIBSODIUM_USE_MBEDTLS_SHA 1
 #define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
 #define CONFIG_LOG_DEFAULT_LEVEL 1
 #define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
@@ -339,11 +352,14 @@
 #define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
 #define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
 #define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
+#define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
 #define CONFIG_MBEDTLS_HARDWARE_AES 1
 #define CONFIG_MBEDTLS_AES_USE_INTERRUPT 1
 #define CONFIG_MBEDTLS_HARDWARE_GCM 1
+#define CONFIG_MBEDTLS_HARDWARE_MPI 1
+#define CONFIG_MBEDTLS_HARDWARE_SHA 1
 #define CONFIG_MBEDTLS_ROM_MD5 1
 #define CONFIG_MBEDTLS_HAVE_TIME 1
 #define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
@@ -430,6 +446,7 @@
 #define CONFIG_SPI_FLASH_SUPPORT_GD_CHIP 1
 #define CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP 1
 #define CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_TH_CHIP 1
 #define CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE 1
 #define CONFIG_SPIFFS_MAX_PARTITIONS 3
 #define CONFIG_SPIFFS_CACHE 1
@@ -462,6 +479,19 @@
 #define CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES 16
 #define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
 #define CONFIG_WPA_MBEDTLS_CRYPTO 1
+#define CONFIG_IO_GLITCH_FILTER_TIME_MS 50
+#define CONFIG_ESP_RMAKER_LIB_ESP_MQTT 1
+#define CONFIG_ESP_RMAKER_MQTT_GLUE_LIB 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT_443 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT 1
+#define CONFIG_ESP_RMAKER_MQTT_SEND_USERNAME 1
+#define CONFIG_ESP_RMAKER_MQTT_USERNAME "?Platform=APN/1 ESPIF,RAINMAKER,v1.0"
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK 4096
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_PRIORITY 5
+#define CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME "fctry"
+#define CONFIG_ESP_RMAKER_FACTORY_NAMESPACE "rmaker_creds"
+#define CONFIG_ESP_RMAKER_DEF_TIMEZONE "Asia/Shanghai"
+#define CONFIG_ESP_RMAKER_SNTP_SERVER_NAME "pool.ntp.org"
 #define CONFIG_DSP_ANSI 1
 #define CONFIG_DSP_OPTIMIZATION 0
 #define CONFIG_DSP_MAX_FFT_SIZE_4096 1
@@ -475,7 +505,10 @@
 #define CONFIG_GC2145_SUPPORT 1
 #define CONFIG_GC032A_SUPPORT 1
 #define CONFIG_GC0308_SUPPORT 1
+#define CONFIG_BF3005_SUPPORT 1
+#define CONFIG_BF20A6_SUPPORT 1
 #define CONFIG_SCCB_HARDWARE_I2C_PORT1 1
+#define CONFIG_SCCB_CLK_FREQ 100000
 #define CONFIG_GC_SENSOR_SUBSAMPLE_MODE 1
 #define CONFIG_CAMERA_CORE0 1
 #define CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX 32768
@@ -579,5 +612,5 @@
 #define CONFIG_USB_MSC_BUFSIZE CONFIG_TINYUSB_MSC_BUFSIZE
 #define CONFIG_USB_MSC_ENABLED CONFIG_TINYUSB_MSC_ENABLED
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
-#define CONFIG_ARDUINO_IDF_COMMIT "a79dc75f0a"
+#define CONFIG_ARDUINO_IDF_COMMIT "b8050b365e"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32s2/lib/libbootloader_support.a b/tools/sdk/esp32s2/qspi_qspi/libbootloader_support.a
similarity index 61%
rename from tools/sdk/esp32s2/lib/libbootloader_support.a
rename to tools/sdk/esp32s2/qspi_qspi/libbootloader_support.a
index fc067928c95..fee93006e2e 100644
Binary files a/tools/sdk/esp32s2/lib/libbootloader_support.a and b/tools/sdk/esp32s2/qspi_qspi/libbootloader_support.a differ
diff --git a/tools/sdk/esp32s2/lib/libesp_hw_support.a b/tools/sdk/esp32s2/qspi_qspi/libesp_hw_support.a
similarity index 65%
rename from tools/sdk/esp32s2/lib/libesp_hw_support.a
rename to tools/sdk/esp32s2/qspi_qspi/libesp_hw_support.a
index 30edc9fad03..0af7e7ef033 100644
Binary files a/tools/sdk/esp32s2/lib/libesp_hw_support.a and b/tools/sdk/esp32s2/qspi_qspi/libesp_hw_support.a differ
diff --git a/tools/sdk/esp32s2/lib/libesp_system.a b/tools/sdk/esp32s2/qspi_qspi/libesp_system.a
similarity index 56%
rename from tools/sdk/esp32s2/lib/libesp_system.a
rename to tools/sdk/esp32s2/qspi_qspi/libesp_system.a
index e7f2ec0ebfc..066dab31be2 100644
Binary files a/tools/sdk/esp32s2/lib/libesp_system.a and b/tools/sdk/esp32s2/qspi_qspi/libesp_system.a differ
diff --git a/tools/sdk/esp32s2/lib/libfreertos.a b/tools/sdk/esp32s2/qspi_qspi/libfreertos.a
similarity index 55%
rename from tools/sdk/esp32s2/lib/libfreertos.a
rename to tools/sdk/esp32s2/qspi_qspi/libfreertos.a
index 447b5b00404..89da945613e 100644
Binary files a/tools/sdk/esp32s2/lib/libfreertos.a and b/tools/sdk/esp32s2/qspi_qspi/libfreertos.a differ
diff --git a/tools/sdk/esp32s2/qspi_qspi/libspi_flash.a b/tools/sdk/esp32s2/qspi_qspi/libspi_flash.a
new file mode 100644
index 00000000000..1f055153c4b
Binary files /dev/null and b/tools/sdk/esp32s2/qspi_qspi/libspi_flash.a differ
diff --git a/tools/sdk/esp32s2/ld/sections.ld b/tools/sdk/esp32s2/qspi_qspi/sections.ld
similarity index 80%
rename from tools/sdk/esp32s2/ld/sections.ld
rename to tools/sdk/esp32s2/qspi_qspi/sections.ld
index 278d84c981a..162cc4144a2 100644
--- a/tools/sdk/esp32s2/ld/sections.ld
+++ b/tools/sdk/esp32s2/qspi_qspi/sections.ld
@@ -241,13 +241,15 @@ SECTIONS
     *libspi_flash.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
     *libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
     *libxt_hal.a:(.literal .literal.* .text .text.*)
     *libxtensa.a:eri.*(.literal .literal.* .text .text.*)
     *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*)
 
-    /* added to maintain compability */
+    /* Added to maintain compability, there are no iram0 data section to put
+     * sections:iram_coredump entry defined in espcoredump's linker.lf file */
     _coredump_iram_start = 0;
     _coredump_iram_end = 0;
 
@@ -284,7 +286,7 @@ SECTIONS
     *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*)
     *(.dram1 .dram1.*)
     _coredump_dram_start = ABSOLUTE(.);
-    *(.dram1.coredump .dram1.coredump.*)
+    *(.dram2.coredump .dram2.coredump.*)
     _coredump_dram_end = ABSOLUTE(.);
     *libapp_trace.a:app_trace.*(.rodata .rodata.*)
     *libapp_trace.a:app_trace_util.*(.rodata .rodata.*)
@@ -332,6 +334,7 @@ SECTIONS
     *libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_chip_mxic.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*)
     *libspi_flash.a:spi_flash_rom_patch.*(.rodata .rodata.*)
 
@@ -421,7 +424,7 @@ SECTIONS
   {
     _flash_rodata_start = ABSOLUTE(.);
 
-    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
+    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
     *(.rodata_wlog_error .rodata_wlog_error.*)
 
     *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
@@ -495,7 +498,7 @@ SECTIONS
     _instruction_reserved_start = ABSOLUTE(.);
     _text_start = ABSOLUTE(.);
 
-    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*)
+    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*)
     *(.wifi0iram .wifi0iram.*)
     *(.wifiorslpiram .wifiorslpiram.*)
     *(.wifirxiram .wifirxiram.*)
diff --git a/tools/sdk/esp32s2/sdkconfig b/tools/sdk/esp32s2/sdkconfig
index 1a5566f1f08..eb40dc14fbb 100644
--- a/tools/sdk/esp32s2/sdkconfig
+++ b/tools/sdk/esp32s2/sdkconfig
@@ -138,6 +138,50 @@ CONFIG_PARTITION_TABLE_OFFSET=0x8000
 CONFIG_PARTITION_TABLE_MD5=y
 # end of Partition Table
 
+CONFIG_LIB_BUILDER_FLASHMODE="qio"
+CONFIG_LIB_BUILDER_FLASHFREQ="80m"
+
+#
+# ESP RainMaker Config
+#
+# CONFIG_ESP_RMAKER_NO_CLAIM is not set
+CONFIG_ESP_RMAKER_SELF_CLAIM=y
+CONFIG_ESP_RMAKER_CLAIM_TYPE=1
+CONFIG_ESP_RMAKER_CLAIM_SERVICE_BASE_URL="https://esp-claiming.rainmaker.espressif.com"
+CONFIG_ESP_RMAKER_MQTT_HOST="a1p72mufdu6064-ats.iot.us-east-1.amazonaws.com"
+CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE=1024
+# CONFIG_ESP_RMAKER_DISABLE_USER_MAPPING_PROV is not set
+# CONFIG_ESP_RMAKER_USER_ID_CHECK is not set
+# CONFIG_ESP_RMAKER_LOCAL_CTRL_ENABLE is not set
+CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0=y
+# CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_1 is not set
+CONFIG_ESP_RMAKER_CONSOLE_UART_NUM=0
+
+#
+# ESP RainMaker OTA Config
+#
+CONFIG_ESP_RMAKER_OTA_AUTOFETCH=y
+CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD=0
+# CONFIG_ESP_RMAKER_SKIP_COMMON_NAME_CHECK is not set
+# CONFIG_ESP_RMAKER_SKIP_VERSION_CHECK is not set
+# CONFIG_ESP_RMAKER_SKIP_PROJECT_NAME_CHECK is not set
+CONFIG_ESP_RMAKER_OTA_HTTP_RX_BUFFER_SIZE=1024
+# end of ESP RainMaker OTA Config
+
+#
+# ESP RainMaker Scheduling
+#
+CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES=10
+# end of ESP RainMaker Scheduling
+
+#
+# ESP RainMaker Scenes
+#
+CONFIG_ESP_RMAKER_SCENES_MAX_SCENES=10
+# CONFIG_ESP_RMAKER_SCENES_DEACTIVATE_SUPPORT is not set
+# end of ESP RainMaker Scenes
+# end of ESP RainMaker Config
+
 #
 # Arduino Configuration
 #
@@ -251,6 +295,18 @@ CONFIG_TINYUSB_VENDOR_TX_BUFSIZE=64
 CONFIG_TINYUSB_DEBUG_LEVEL=0
 # end of Arduino TinyUSB
 
+#
+# ESP Speech Recognition
+#
+# CONFIG_USE_WAKENET is not set
+# CONFIG_USE_MULTINET is not set
+
+#
+# Add speech commands
+#
+# end of Add speech commands
+# end of ESP Speech Recognition
+
 #
 # Compiler options
 #
@@ -341,6 +397,13 @@ CONFIG_ADC_DISABLE_DAC=y
 #
 # CONFIG_UART_ISR_IN_IRAM is not set
 # end of UART configuration
+
+#
+# GDMA Configuration
+#
+# CONFIG_GDMA_CTRL_FUNC_IN_IRAM is not set
+# CONFIG_GDMA_ISR_IRAM_SAFE is not set
+# end of GDMA Configuration
 # end of Driver configurations
 
 #
@@ -426,7 +489,6 @@ CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM=0x0
 # CONFIG_ESP32S2_ULP_COPROC_ENABLED is not set
 CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=0
 CONFIG_ESP32S2_DEBUG_OCDAWARE=y
-# CONFIG_ESP32S2_DEBUG_STUBS_ENABLE is not set
 CONFIG_ESP32S2_BROWNOUT_DET=y
 CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_7=y
 # CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_6 is not set
@@ -497,7 +559,7 @@ CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH=y
 #
 # HTTP Server
 #
-CONFIG_HTTPD_MAX_REQ_HDR_LEN=512
+CONFIG_HTTPD_MAX_REQ_HDR_LEN=1024
 CONFIG_HTTPD_MAX_URI_LEN=512
 CONFIG_HTTPD_ERR_RESP_NO_DELAY=y
 CONFIG_HTTPD_PURGE_BUF_LEN=32
@@ -539,6 +601,11 @@ CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y
 # CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND is not set
 # CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND is not set
 # end of Sleep Config
+
+#
+# RTC Clock Config
+#
+# end of RTC Clock Config
 # end of Hardware Settings
 
 #
@@ -627,6 +694,7 @@ CONFIG_ESP_TASK_WDT_PANIC=y
 CONFIG_ESP_TASK_WDT_TIMEOUT_S=5
 # CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set
 # CONFIG_ESP_PANIC_HANDLER_IRAM is not set
+# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set
 CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y
 # end of ESP System Settings
 
@@ -827,7 +895,6 @@ CONFIG_HEAP_TRACING_OFF=y
 #
 # libsodium
 #
-CONFIG_LIBSODIUM_USE_MBEDTLS_SHA=y
 # end of libsodium
 
 #
@@ -1003,9 +1070,24 @@ CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
 # CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set
 CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=16384
 # CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN is not set
-# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set
 # CONFIG_MBEDTLS_DEBUG is not set
 
+#
+# mbedTLS v2.28.x related
+#
+# CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set
+# CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set
+# CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set
+CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE=y
+
+#
+# DTLS-based configurations
+#
+# CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID is not set
+# CONFIG_MBEDTLS_SSL_DTLS_SRTP is not set
+# end of DTLS-based configurations
+# end of mbedTLS v2.28.x related
+
 #
 # Certificate Bundle
 #
@@ -1021,8 +1103,8 @@ CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y
 CONFIG_MBEDTLS_HARDWARE_AES=y
 CONFIG_MBEDTLS_AES_USE_INTERRUPT=y
 CONFIG_MBEDTLS_HARDWARE_GCM=y
-# CONFIG_MBEDTLS_HARDWARE_MPI is not set
-# CONFIG_MBEDTLS_HARDWARE_SHA is not set
+CONFIG_MBEDTLS_HARDWARE_MPI=y
+CONFIG_MBEDTLS_HARDWARE_SHA=y
 CONFIG_MBEDTLS_ROM_MD5=y
 # CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set
 # CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set
@@ -1116,6 +1198,7 @@ CONFIG_MBEDTLS_ECP_NIST_OPTIM=y
 # CONFIG_MBEDTLS_CHACHA20_C is not set
 # CONFIG_MBEDTLS_HKDF_C is not set
 # CONFIG_MBEDTLS_THREADING_C is not set
+# CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI is not set
 # CONFIG_MBEDTLS_SECURITY_RISKS is not set
 # end of mbedTLS
 
@@ -1219,6 +1302,7 @@ CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y
 CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
 CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y
 CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_TH_CHIP=y
 # end of Auto-detect flash chips
 
 CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y
@@ -1344,6 +1428,38 @@ CONFIG_WPA_MBEDTLS_CRYPTO=y
 # CONFIG_WPA_11KV_SUPPORT is not set
 # end of Supplicant
 
+#
+# Button
+#
+CONFIG_IO_GLITCH_FILTER_TIME_MS=50
+# end of Button
+
+#
+# ESP RainMaker Common
+#
+CONFIG_ESP_RMAKER_LIB_ESP_MQTT=y
+# CONFIG_ESP_RMAKER_LIB_AWS_IOT is not set
+CONFIG_ESP_RMAKER_MQTT_GLUE_LIB=1
+CONFIG_ESP_RMAKER_MQTT_PORT_443=y
+# CONFIG_ESP_RMAKER_MQTT_PORT_8883 is not set
+CONFIG_ESP_RMAKER_MQTT_PORT=1
+# CONFIG_ESP_RMAKER_MQTT_PERSISTENT_SESSION is not set
+CONFIG_ESP_RMAKER_MQTT_SEND_USERNAME=y
+CONFIG_ESP_RMAKER_MQTT_USERNAME="?Platform=APN/1 ESPIF,RAINMAKER,v1.0"
+CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK=4096
+CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_PRIORITY=5
+CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME="fctry"
+CONFIG_ESP_RMAKER_FACTORY_NAMESPACE="rmaker_creds"
+CONFIG_ESP_RMAKER_DEF_TIMEZONE="Asia/Shanghai"
+CONFIG_ESP_RMAKER_SNTP_SERVER_NAME="pool.ntp.org"
+# end of ESP RainMaker Common
+
+#
+# WS2812 RGB LED
+#
+# CONFIG_WS2812_LED_ENABLE is not set
+# end of WS2812 RGB LED
+
 #
 # DSP Library
 #
@@ -1371,8 +1487,11 @@ CONFIG_OV5640_SUPPORT=y
 CONFIG_GC2145_SUPPORT=y
 CONFIG_GC032A_SUPPORT=y
 CONFIG_GC0308_SUPPORT=y
+CONFIG_BF3005_SUPPORT=y
+CONFIG_BF20A6_SUPPORT=y
 # CONFIG_SCCB_HARDWARE_I2C_PORT0 is not set
 CONFIG_SCCB_HARDWARE_I2C_PORT1=y
+CONFIG_SCCB_CLK_FREQ=100000
 # CONFIG_GC_SENSOR_WINDOWING_MODE is not set
 CONFIG_GC_SENSOR_SUBSAMPLE_MODE=y
 CONFIG_CAMERA_CORE0=y
@@ -1398,6 +1517,7 @@ CONFIG_LITTLEFS_USE_MTIME=y
 CONFIG_LITTLEFS_MTIME_USE_SECONDS=y
 # CONFIG_LITTLEFS_MTIME_USE_NONCE is not set
 # CONFIG_LITTLEFS_SPIFFS_COMPAT is not set
+# CONFIG_LITTLEFS_FLUSH_FILE_EVERY_WRITE is not set
 # end of LittleFS
 # end of Component config
 
@@ -1490,6 +1610,7 @@ CONFIG_TASK_WDT=y
 CONFIG_TASK_WDT_PANIC=y
 CONFIG_TASK_WDT_TIMEOUT_S=5
 # CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set
+# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set
 CONFIG_TIMER_TASK_STACK_SIZE=4096
 # CONFIG_EXTERNAL_COEX_ENABLE is not set
 # CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
diff --git a/tools/sdk/esp32s3/bin/bootloader_dio_80m.bin b/tools/sdk/esp32s3/bin/bootloader_dio_80m.bin
new file mode 100644
index 00000000000..63f72bee8c4
Binary files /dev/null and b/tools/sdk/esp32s3/bin/bootloader_dio_80m.bin differ
diff --git a/tools/sdk/esp32s3/bin/bootloader_opi_80m.bin b/tools/sdk/esp32s3/bin/bootloader_opi_80m.bin
new file mode 100644
index 00000000000..f0ecf45aaab
Binary files /dev/null and b/tools/sdk/esp32s3/bin/bootloader_opi_80m.bin differ
diff --git a/tools/sdk/esp32s3/bin/bootloader_qio_120m.bin b/tools/sdk/esp32s3/bin/bootloader_qio_120m.bin
new file mode 100644
index 00000000000..d13c1ecaf4a
Binary files /dev/null and b/tools/sdk/esp32s3/bin/bootloader_qio_120m.bin differ
diff --git a/tools/sdk/esp32s3/bin/bootloader_qio_80m.bin b/tools/sdk/esp32s3/bin/bootloader_qio_80m.bin
new file mode 100644
index 00000000000..d13c1ecaf4a
Binary files /dev/null and b/tools/sdk/esp32s3/bin/bootloader_qio_80m.bin differ
diff --git a/tools/sdk/esp32s3/include/app_trace/include/esp_app_trace.h b/tools/sdk/esp32s3/include/app_trace/include/esp_app_trace.h
new file mode 100644
index 00000000000..95131b5aa71
--- /dev/null
+++ b/tools/sdk/esp32s3/include/app_trace/include/esp_app_trace.h
@@ -0,0 +1,268 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef ESP_APP_TRACE_H_
+#define ESP_APP_TRACE_H_
+
+#include <stdarg.h>
+#include "esp_err.h"
+#include "esp_app_trace_util.h" // ESP_APPTRACE_TMO_INFINITE
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Application trace data destinations bits.
+ */
+typedef enum {
+    ESP_APPTRACE_DEST_JTAG = 1,                         ///< JTAG destination
+    ESP_APPTRACE_DEST_TRAX = ESP_APPTRACE_DEST_JTAG, 	///< xxx_TRAX name is obsolete, use more common xxx_JTAG
+    ESP_APPTRACE_DEST_UART0,	                        ///< UART0 destination
+    ESP_APPTRACE_DEST_MAX = ESP_APPTRACE_DEST_UART0,
+    ESP_APPTRACE_DEST_NUM
+} esp_apptrace_dest_t;
+
+/**
+ * @brief  Initializes application tracing module.
+ *
+ * @note   Should be called before any esp_apptrace_xxx call.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_init(void);
+
+/**
+ * @brief Configures down buffer.
+ *        @note Needs to be called before initiating any data transfer using esp_apptrace_buffer_get and esp_apptrace_write.
+ *              This function does not protect internal data by lock.
+ *
+ * @param buf Address of buffer to use for down channel (host to target) data.
+ * @param size Size of the buffer.
+ */
+void esp_apptrace_down_buffer_config(uint8_t *buf, uint32_t size);
+
+/**
+ * @brief Allocates buffer for trace data.
+ *        After data in buffer are ready to be sent off esp_apptrace_buffer_put must be called to indicate it.
+ *
+ * @param dest Indicates HW interface to send data.
+ * @param size Size of data to write to trace buffer.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return non-NULL on success, otherwise NULL.
+ */
+uint8_t *esp_apptrace_buffer_get(esp_apptrace_dest_t dest, uint32_t size, uint32_t tmo);
+
+/**
+ * @brief Indicates that the data in buffer are ready to be sent off.
+ *        This function is a counterpart of and must be preceeded by esp_apptrace_buffer_get.
+ *
+ * @param dest Indicates HW interface to send data. Should be identical to the same parameter in call to esp_apptrace_buffer_get.
+ * @param ptr  Address of trace buffer to release. Should be the value returned by call to esp_apptrace_buffer_get.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_buffer_put(esp_apptrace_dest_t dest, uint8_t *ptr, uint32_t tmo);
+
+/**
+ * @brief  Writes data to trace buffer.
+ *
+ * @param dest Indicates HW interface to send data.
+ * @param data Address of data to write to trace buffer.
+ * @param size Size of data to write to trace buffer.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_write(esp_apptrace_dest_t dest, const void *data, uint32_t size, uint32_t tmo);
+
+/**
+ * @brief vprintf-like function to sent log messages to host via specified HW interface.
+ *
+ * @param dest Indicates HW interface to send data.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ * @param fmt  Address of format string.
+ * @param ap   List of arguments.
+ *
+ * @return Number of bytes written.
+ */
+int esp_apptrace_vprintf_to(esp_apptrace_dest_t dest, uint32_t tmo, const char *fmt, va_list ap);
+
+/**
+ * @brief vprintf-like function to sent log messages to host.
+ *
+ * @param fmt  Address of format string.
+ * @param ap   List of arguments.
+ *
+ * @return Number of bytes written.
+ */
+int esp_apptrace_vprintf(const char *fmt, va_list ap);
+
+/**
+ * @brief Flushes remaining data in trace buffer to host.
+ *
+ * @param dest Indicates HW interface to flush data on.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_flush(esp_apptrace_dest_t dest, uint32_t tmo);
+
+/**
+ * @brief Flushes remaining data in trace buffer to host without locking internal data.
+ *        This is special version of esp_apptrace_flush which should be called from panic handler.
+ *
+ * @param dest   Indicates HW interface to flush data on.
+ * @param min_sz Threshold for flushing data. If current filling level is above this value, data will be flushed. TRAX destinations only.
+ * @param tmo    Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_flush_nolock(esp_apptrace_dest_t dest, uint32_t min_sz, uint32_t tmo);
+
+/**
+ * @brief Reads host data from trace buffer.
+ *
+ * @param dest Indicates HW interface to read the data on.
+ * @param data Address of buffer to put data from trace buffer.
+ * @param size Pointer to store size of read data. Before call to this function pointed memory must hold requested size of data
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_read(esp_apptrace_dest_t dest, void *data, uint32_t *size, uint32_t tmo);
+
+/**
+ * @brief Retrieves incoming data buffer if any.
+ *        After data in buffer are processed esp_apptrace_down_buffer_put must be called to indicate it.
+ *
+ * @param dest Indicates HW interface to receive data.
+ * @param size Address to store size of available data in down buffer. Must be initialized with requested value.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return non-NULL on success, otherwise NULL.
+ */
+uint8_t *esp_apptrace_down_buffer_get(esp_apptrace_dest_t dest, uint32_t *size, uint32_t tmo);
+
+/**
+ * @brief Indicates that the data in down buffer are processed.
+ *        This function is a counterpart of and must be preceeded by esp_apptrace_down_buffer_get.
+ *
+ * @param dest Indicates HW interface to receive data. Should be identical to the same parameter in call to esp_apptrace_down_buffer_get.
+ * @param ptr  Address of trace buffer to release. Should be the value returned by call to esp_apptrace_down_buffer_get.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_down_buffer_put(esp_apptrace_dest_t dest, uint8_t *ptr, uint32_t tmo);
+
+/**
+ * @brief Checks whether host is connected.
+ *
+ * @param dest Indicates HW interface to use.
+ *
+ * @return true if host is connected, otherwise false
+ */
+bool esp_apptrace_host_is_connected(esp_apptrace_dest_t dest);
+
+/**
+ * @brief Opens file on host.
+ *		  This function has the same semantic as 'fopen' except for the first argument.
+ *
+ * @param dest Indicates HW interface to use.
+ * @param path Path to file.
+ * @param mode Mode string. See fopen for details.
+ *
+ * @return non zero file handle on success, otherwise 0
+ */
+void *esp_apptrace_fopen(esp_apptrace_dest_t dest, const char *path, const char *mode);
+
+/**
+ * @brief Closes file on host.
+ *		  This function has the same semantic as 'fclose' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Zero on success, otherwise non-zero. See fclose for details.
+ */
+int esp_apptrace_fclose(esp_apptrace_dest_t dest, void *stream);
+
+/**
+ * @brief Writes to file on host.
+ *		  This function has the same semantic as 'fwrite' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param ptr 	 Address of data to write.
+ * @param size 	 Size of an item.
+ * @param nmemb  Number of items to write.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Number of written items. See fwrite for details.
+ */
+size_t esp_apptrace_fwrite(esp_apptrace_dest_t dest, const void *ptr, size_t size, size_t nmemb, void *stream);
+
+/**
+ * @brief Read file on host.
+ *		  This function has the same semantic as 'fread' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param ptr 	 Address to store read data.
+ * @param size 	 Size of an item.
+ * @param nmemb  Number of items to read.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Number of read items. See fread for details.
+ */
+size_t esp_apptrace_fread(esp_apptrace_dest_t dest, void *ptr, size_t size, size_t nmemb, void *stream);
+
+/**
+ * @brief Set position indicator in file on host.
+ *		  This function has the same semantic as 'fseek' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ * @param offset Offset. See fseek for details.
+ * @param whence Position in file. See fseek for details.
+ *
+ * @return Zero on success, otherwise non-zero. See fseek for details.
+ */
+int esp_apptrace_fseek(esp_apptrace_dest_t dest, void *stream, long offset, int whence);
+
+/**
+ * @brief Get current position indicator for file on host.
+ *		  This function has the same semantic as 'ftell' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Current position in file. See ftell for details.
+ */
+int esp_apptrace_ftell(esp_apptrace_dest_t dest, void *stream);
+
+/**
+ * @brief Indicates to the host that all file operations are completed.
+ *		  This function should be called after all file operations are finished and
+ *		  indicate to the host that it can perform cleanup operations (close open files etc.).
+ *
+ * @param dest   Indicates HW interface to use.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+int esp_apptrace_fstop(esp_apptrace_dest_t dest);
+
+/**
+ * @brief Triggers gcov info dump.
+ *		  This function waits for the host to connect to target before dumping data.
+ */
+void esp_gcov_dump(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/app_trace/include/esp_app_trace_util.h b/tools/sdk/esp32s3/include/app_trace/include/esp_app_trace_util.h
new file mode 100644
index 00000000000..96595c69827
--- /dev/null
+++ b/tools/sdk/esp32s3/include/app_trace/include/esp_app_trace_util.h
@@ -0,0 +1,192 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef ESP_APP_TRACE_UTIL_H_
+#define ESP_APP_TRACE_UTIL_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "freertos/FreeRTOS.h"
+#include "esp_err.h"
+#include "esp_timer.h"
+
+/** Infinite waiting timeout */
+#define ESP_APPTRACE_TMO_INFINITE               ((uint32_t)-1)
+
+/** Structure which holds data necessary for measuring time intervals.
+ *
+ *  After initialization via esp_apptrace_tmo_init() user needs to call esp_apptrace_tmo_check()
+ *  periodically to check timeout for expiration.
+ */
+typedef struct {
+    int64_t   start;   ///< time interval start (in us)
+    int64_t   tmo;     ///< timeout value (in us)
+    int64_t   elapsed; ///< elapsed time (in us)
+} esp_apptrace_tmo_t;
+
+/**
+ * @brief Initializes timeout structure.
+ *
+ * @param tmo       Pointer to timeout structure to be initialized.
+ * @param user_tmo  Timeout value (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+*/
+static inline void esp_apptrace_tmo_init(esp_apptrace_tmo_t *tmo, uint32_t user_tmo)
+{
+    tmo->start = esp_timer_get_time();
+    tmo->tmo = user_tmo == ESP_APPTRACE_TMO_INFINITE ? (int64_t)-1 : (int64_t)user_tmo;
+    tmo->elapsed = 0;
+}
+
+/**
+ * @brief Checks timeout for expiration.
+ *
+ * @param tmo Pointer to timeout structure.
+ *
+ * @return number of remaining us till tmo.
+ */
+esp_err_t esp_apptrace_tmo_check(esp_apptrace_tmo_t *tmo);
+
+static inline uint32_t esp_apptrace_tmo_remaining_us(esp_apptrace_tmo_t *tmo)
+{
+    return tmo->tmo != (int64_t)-1 ? (tmo->elapsed - tmo->tmo) : ESP_APPTRACE_TMO_INFINITE;
+}
+
+/** Tracing module synchronization lock */
+typedef struct {
+    portMUX_TYPE mux;
+    unsigned int_state;
+} esp_apptrace_lock_t;
+
+/**
+ * @brief Initializes lock structure.
+ *
+ * @param lock Pointer to lock structure to be initialized.
+ */
+static inline void esp_apptrace_lock_init(esp_apptrace_lock_t *lock)
+{
+    portMUX_INITIALIZE(&lock->mux);
+    lock->int_state = 0;
+}
+
+/**
+ * @brief Tries to acquire lock in specified time period.
+ *
+ * @param lock Pointer to lock structure.
+ * @param tmo  Pointer to timeout struct.
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ */
+esp_err_t esp_apptrace_lock_take(esp_apptrace_lock_t *lock, esp_apptrace_tmo_t *tmo);
+
+/**
+ * @brief Releases lock.
+ *
+ * @param lock Pointer to lock structure.
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ */
+esp_err_t esp_apptrace_lock_give(esp_apptrace_lock_t *lock);
+
+/** Ring buffer control structure.
+ *
+ * @note For purposes of application tracing module if there is no enough space for user data and write pointer can be wrapped
+ *       current ring buffer size can be temporarily shrinked in order to provide buffer with requested size.
+ */
+typedef struct {
+    uint8_t *data;      ///< pointer to data storage
+    volatile uint32_t size;      ///< size of data storage
+    volatile uint32_t cur_size;  ///< current size of data storage
+    volatile uint32_t rd;        ///< read pointer
+    volatile uint32_t wr;        ///< write pointer
+} esp_apptrace_rb_t;
+
+/**
+ * @brief Initializes ring buffer control  structure.
+ *
+ * @param rb   Pointer to ring buffer structure to be initialized.
+ * @param data Pointer to buffer to be used as ring buffer's data storage.
+ * @param size Size of buffer to be used as ring buffer's data storage.
+ */
+static inline void esp_apptrace_rb_init(esp_apptrace_rb_t *rb, uint8_t *data, uint32_t size)
+{
+    rb->data = data;
+    rb->size = rb->cur_size = size;
+    rb->rd = 0;
+    rb->wr = 0;
+}
+
+/**
+ * @brief Allocates memory chunk in ring buffer.
+ *
+ * @param rb   Pointer to ring buffer structure.
+ * @param size Size of the memory to allocate.
+ *
+ * @return Pointer to the allocated memory or NULL in case of failure.
+ */
+uint8_t *esp_apptrace_rb_produce(esp_apptrace_rb_t *rb, uint32_t size);
+
+/**
+ * @brief Consumes memory chunk in ring buffer.
+ *
+ * @param rb   Pointer to ring buffer structure.
+ * @param size Size of the memory to consume.
+ *
+ * @return Pointer to consumed memory chunk or NULL in case of failure.
+ */
+uint8_t *esp_apptrace_rb_consume(esp_apptrace_rb_t *rb, uint32_t size);
+
+/**
+ * @brief Gets size of memory which can consumed with single call to esp_apptrace_rb_consume().
+ *
+ * @param rb Pointer to ring buffer structure.
+ *
+ * @return Size of memory which can consumed.
+ *
+ * @note Due to read pointer wrapping returned size can be less then the total size of available data.
+ */
+uint32_t esp_apptrace_rb_read_size_get(esp_apptrace_rb_t *rb);
+
+/**
+ * @brief Gets size of memory which can produced with single call to esp_apptrace_rb_produce().
+ *
+ * @param rb Pointer to ring buffer structure.
+ *
+ * @return Size of memory which can produced.
+ *
+ * @note Due to write pointer wrapping returned size can be less then the total size of available data.
+ */
+uint32_t esp_apptrace_rb_write_size_get(esp_apptrace_rb_t *rb);
+
+int esp_apptrace_log_lock(void);
+void esp_apptrace_log_unlock(void);
+
+#define ESP_APPTRACE_LOG( format, ... )   \
+    do { \
+        esp_apptrace_log_lock(); \
+        esp_rom_printf(format, ##__VA_ARGS__); \
+        esp_apptrace_log_unlock(); \
+    } while(0)
+
+#define ESP_APPTRACE_LOG_LEV( _L_, level, format, ... )   \
+    do { \
+        if (LOG_LOCAL_LEVEL >= level) { \
+            ESP_APPTRACE_LOG(LOG_FORMAT(_L_, format), esp_log_early_timestamp(), TAG, ##__VA_ARGS__); \
+        } \
+    } while(0)
+
+#define ESP_APPTRACE_LOGE( format, ... )  ESP_APPTRACE_LOG_LEV(E, ESP_LOG_ERROR, format, ##__VA_ARGS__)
+#define ESP_APPTRACE_LOGW( format, ... )  ESP_APPTRACE_LOG_LEV(W, ESP_LOG_WARN, format, ##__VA_ARGS__)
+#define ESP_APPTRACE_LOGI( format, ... )  ESP_APPTRACE_LOG_LEV(I, ESP_LOG_INFO, format, ##__VA_ARGS__)
+#define ESP_APPTRACE_LOGD( format, ... )  ESP_APPTRACE_LOG_LEV(D, ESP_LOG_DEBUG, format, ##__VA_ARGS__)
+#define ESP_APPTRACE_LOGV( format, ... )  ESP_APPTRACE_LOG_LEV(V, ESP_LOG_VERBOSE, format, ##__VA_ARGS__)
+#define ESP_APPTRACE_LOGO( format, ... )  ESP_APPTRACE_LOG_LEV(E, ESP_LOG_NONE, format, ##__VA_ARGS__)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //ESP_APP_TRACE_UTIL_H_
diff --git a/tools/sdk/esp32s3/include/app_trace/include/esp_sysview_trace.h b/tools/sdk/esp32s3/include/app_trace/include/esp_sysview_trace.h
new file mode 100644
index 00000000000..de9c8f753c0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/app_trace/include/esp_sysview_trace.h
@@ -0,0 +1,80 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef ESP_SYSVIEW_TRACE_H_
+#define ESP_SYSVIEW_TRACE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdarg.h>
+#include "esp_err.h"
+#include "SEGGER_RTT.h" // SEGGER_RTT_ESP_Flush
+#include "esp_app_trace_util.h" // ESP_APPTRACE_TMO_INFINITE
+
+/**
+ * @brief Flushes remaining data in SystemView trace buffer to host.
+ *
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+ *
+ * @return ESP_OK.
+ */
+static inline esp_err_t esp_sysview_flush(uint32_t tmo)
+{
+    SEGGER_RTT_ESP_Flush(0, tmo);
+    return ESP_OK;
+}
+
+/**
+ * @brief vprintf-like function to sent log messages to the host.
+ *
+ * @param format  Address of format string.
+ * @param args    List of arguments.
+ *
+ * @return Number of bytes written.
+ */
+int esp_sysview_vprintf(const char * format, va_list args);
+
+/**
+ * @brief  Starts SystemView heap tracing.
+ *
+ * @param tmo Timeout (in us) to wait for the host to be connected. Use -1 to wait forever.
+ *
+ * @return ESP_OK on success, ESP_ERR_TIMEOUT if operation has been timed out.
+ */
+esp_err_t esp_sysview_heap_trace_start(uint32_t tmo);
+
+/**
+ * @brief  Stops SystemView heap tracing.
+ *
+ * @return ESP_OK.
+ */
+esp_err_t esp_sysview_heap_trace_stop(void);
+
+/**
+ * @brief Sends heap allocation event to the host.
+ *
+ * @param addr      Address of allocated block.
+ * @param size      Size of allocated block.
+ * @param callers   Pointer to array with callstack addresses.
+ *                  Array size must be CONFIG_HEAP_TRACING_STACK_DEPTH.
+ */
+void esp_sysview_heap_trace_alloc(void *addr, uint32_t size, const void *callers);
+
+/**
+ * @brief Sends heap de-allocation event to the host.
+ *
+ * @param addr      Address of de-allocated block.
+ * @param callers   Pointer to array with callstack addresses.
+ *                  Array size must be CONFIG_HEAP_TRACING_STACK_DEPTH.
+ */
+void esp_sysview_heap_trace_free(void *addr, const void *callers);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //ESP_SYSVIEW_TRACE_H_
diff --git a/tools/sdk/esp32s3/include/app_update/include/esp_ota_ops.h b/tools/sdk/esp32s3/include/app_update/include/esp_ota_ops.h
new file mode 100644
index 00000000000..ba07c013d90
--- /dev/null
+++ b/tools/sdk/esp32s3/include/app_update/include/esp_ota_ops.h
@@ -0,0 +1,348 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _OTA_OPS_H
+#define _OTA_OPS_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include "esp_err.h"
+#include "esp_partition.h"
+#include "esp_image_format.h"
+#include "esp_flash_partitions.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define OTA_SIZE_UNKNOWN 0xffffffff /*!< Used for esp_ota_begin() if new image size is unknown */
+#define OTA_WITH_SEQUENTIAL_WRITES 0xfffffffe /*!< Used for esp_ota_begin() if new image size is unknown and erase can be done in incremental manner (assuming write operation is in continuous sequence) */
+
+#define ESP_ERR_OTA_BASE                         0x1500                     /*!< Base error code for ota_ops api */
+#define ESP_ERR_OTA_PARTITION_CONFLICT           (ESP_ERR_OTA_BASE + 0x01)  /*!< Error if request was to write or erase the current running partition */
+#define ESP_ERR_OTA_SELECT_INFO_INVALID          (ESP_ERR_OTA_BASE + 0x02)  /*!< Error if OTA data partition contains invalid content */
+#define ESP_ERR_OTA_VALIDATE_FAILED              (ESP_ERR_OTA_BASE + 0x03)  /*!< Error if OTA app image is invalid */
+#define ESP_ERR_OTA_SMALL_SEC_VER                (ESP_ERR_OTA_BASE + 0x04)  /*!< Error if the firmware has a secure version less than the running firmware. */
+#define ESP_ERR_OTA_ROLLBACK_FAILED              (ESP_ERR_OTA_BASE + 0x05)  /*!< Error if flash does not have valid firmware in passive partition and hence rollback is not possible */
+#define ESP_ERR_OTA_ROLLBACK_INVALID_STATE       (ESP_ERR_OTA_BASE + 0x06)  /*!< Error if current active firmware is still marked in pending validation state (ESP_OTA_IMG_PENDING_VERIFY), essentially first boot of firmware image post upgrade and hence firmware upgrade is not possible */
+
+
+/**
+ * @brief Opaque handle for an application OTA update
+ *
+ * esp_ota_begin() returns a handle which is then used for subsequent
+ * calls to esp_ota_write() and esp_ota_end().
+ */
+typedef uint32_t esp_ota_handle_t;
+
+/**
+ * @brief   Return esp_app_desc structure. This structure includes app version.
+ *
+ * Return description for running app.
+ * @return Pointer to esp_app_desc structure.
+ */
+const esp_app_desc_t *esp_ota_get_app_description(void);
+
+/**
+ * @brief   Fill the provided buffer with SHA256 of the ELF file, formatted as hexadecimal, null-terminated.
+ * If the buffer size is not sufficient to fit the entire SHA256 in hex plus a null terminator,
+ * the largest possible number of bytes will be written followed by a null.
+ * @param dst   Destination buffer
+ * @param size  Size of the buffer
+ * @return      Number of bytes written to dst (including null terminator)
+ */
+int esp_ota_get_app_elf_sha256(char* dst, size_t size);
+
+/**
+ * @brief   Commence an OTA update writing to the specified partition.
+
+ * The specified partition is erased to the specified image size.
+ *
+ * If image size is not yet known, pass OTA_SIZE_UNKNOWN which will
+ * cause the entire partition to be erased.
+ *
+ * On success, this function allocates memory that remains in use
+ * until esp_ota_end() is called with the returned handle.
+ *
+ * Note: If the rollback option is enabled and the running application has the ESP_OTA_IMG_PENDING_VERIFY state then
+ * it will lead to the ESP_ERR_OTA_ROLLBACK_INVALID_STATE error. Confirm the running app before to run download a new app,
+ * use esp_ota_mark_app_valid_cancel_rollback() function for it (this should be done as early as possible when you first download a new application).
+ *
+ * @param partition Pointer to info for partition which will receive the OTA update. Required.
+ * @param image_size Size of new OTA app image. Partition will be erased in order to receive this size of image. If 0 or OTA_SIZE_UNKNOWN, the entire partition is erased.
+ * @param out_handle On success, returns a handle which should be used for subsequent esp_ota_write() and esp_ota_end() calls.
+
+ * @return
+ *    - ESP_OK: OTA operation commenced successfully.
+ *    - ESP_ERR_INVALID_ARG: partition or out_handle arguments were NULL, or partition doesn't point to an OTA app partition.
+ *    - ESP_ERR_NO_MEM: Cannot allocate memory for OTA operation.
+ *    - ESP_ERR_OTA_PARTITION_CONFLICT: Partition holds the currently running firmware, cannot update in place.
+ *    - ESP_ERR_NOT_FOUND: Partition argument not found in partition table.
+ *    - ESP_ERR_OTA_SELECT_INFO_INVALID: The OTA data partition contains invalid data.
+ *    - ESP_ERR_INVALID_SIZE: Partition doesn't fit in configured flash size.
+ *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
+ *    - ESP_ERR_OTA_ROLLBACK_INVALID_STATE: If the running app has not confirmed state. Before performing an update, the application must be valid.
+ */
+esp_err_t esp_ota_begin(const esp_partition_t* partition, size_t image_size, esp_ota_handle_t* out_handle);
+
+/**
+ * @brief   Write OTA update data to partition
+ *
+ * This function can be called multiple times as
+ * data is received during the OTA operation. Data is written
+ * sequentially to the partition.
+ *
+ * @param handle  Handle obtained from esp_ota_begin
+ * @param data    Data buffer to write
+ * @param size    Size of data buffer in bytes.
+ *
+ * @return
+ *    - ESP_OK: Data was written to flash successfully.
+ *    - ESP_ERR_INVALID_ARG: handle is invalid.
+ *    - ESP_ERR_OTA_VALIDATE_FAILED: First byte of image contains invalid app image magic byte.
+ *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
+ *    - ESP_ERR_OTA_SELECT_INFO_INVALID: OTA data partition has invalid contents
+ */
+esp_err_t esp_ota_write(esp_ota_handle_t handle, const void* data, size_t size);
+
+/**
+ * @brief   Write OTA update data to partition
+ *
+ * This function can write data in non contiguous manner.
+ * If flash encryption is enabled, data should be 16 byte aligned.
+ *
+ * @param handle  Handle obtained from esp_ota_begin
+ * @param data    Data buffer to write
+ * @param size    Size of data buffer in bytes
+ * @param offset  Offset in flash partition
+ *
+ * @note While performing OTA, if the packets arrive out of order, esp_ota_write_with_offset() can be used to write data in non contiguous manner.
+ *       Use of esp_ota_write_with_offset() in combination with esp_ota_write() is not recommended.
+ *
+ * @return
+ *    - ESP_OK: Data was written to flash successfully.
+ *    - ESP_ERR_INVALID_ARG: handle is invalid.
+ *    - ESP_ERR_OTA_VALIDATE_FAILED: First byte of image contains invalid app image magic byte.
+ *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
+ *    - ESP_ERR_OTA_SELECT_INFO_INVALID: OTA data partition has invalid contents
+ */
+esp_err_t esp_ota_write_with_offset(esp_ota_handle_t handle, const void *data, size_t size, uint32_t offset);
+
+/**
+ * @brief Finish OTA update and validate newly written app image.
+ *
+ * @param handle  Handle obtained from esp_ota_begin().
+ *
+ * @note After calling esp_ota_end(), the handle is no longer valid and any memory associated with it is freed (regardless of result).
+ *
+ * @return
+ *    - ESP_OK: Newly written OTA app image is valid.
+ *    - ESP_ERR_NOT_FOUND: OTA handle was not found.
+ *    - ESP_ERR_INVALID_ARG: Handle was never written to.
+ *    - ESP_ERR_OTA_VALIDATE_FAILED: OTA image is invalid (either not a valid app image, or - if secure boot is enabled - signature failed to verify.)
+ *    - ESP_ERR_INVALID_STATE: If flash encryption is enabled, this result indicates an internal error writing the final encrypted bytes to flash.
+ */
+esp_err_t esp_ota_end(esp_ota_handle_t handle);
+
+/**
+ * @brief Abort OTA update, free the handle and memory associated with it.
+ *
+ * @param handle obtained from esp_ota_begin().
+ *
+ * @return
+ *    - ESP_OK: Handle and its associated memory is freed successfully.
+ *    - ESP_ERR_NOT_FOUND: OTA handle was not found.
+ */
+esp_err_t esp_ota_abort(esp_ota_handle_t handle);
+
+
+/**
+ * @brief Configure OTA data for a new boot partition
+ *
+ * @note If this function returns ESP_OK, calling esp_restart() will boot the newly configured app partition.
+ *
+ * @param partition Pointer to info for partition containing app image to boot.
+ *
+ * @return
+ *    - ESP_OK: OTA data updated, next reboot will use specified partition.
+ *    - ESP_ERR_INVALID_ARG: partition argument was NULL or didn't point to a valid OTA partition of type "app".
+ *    - ESP_ERR_OTA_VALIDATE_FAILED: Partition contained invalid app image. Also returned if secure boot is enabled and signature validation failed.
+ *    - ESP_ERR_NOT_FOUND: OTA data partition not found.
+ *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash erase or write failed.
+ */
+esp_err_t esp_ota_set_boot_partition(const esp_partition_t* partition);
+
+/**
+ * @brief Get partition info of currently configured boot app
+ *
+ * If esp_ota_set_boot_partition() has been called, the partition which was set by that function will be returned.
+ *
+ * If esp_ota_set_boot_partition() has not been called, the result is usually the same as esp_ota_get_running_partition().
+ * The two results are not equal if the configured boot partition does not contain a valid app (meaning that the running partition
+ * will be an app that the bootloader chose via fallback).
+ *
+ * If the OTA data partition is not present or not valid then the result is the first app partition found in the
+ * partition table. In priority order, this means: the factory app, the first OTA app slot, or the test app partition.
+ *
+ * Note that there is no guarantee the returned partition is a valid app. Use esp_image_verify(ESP_IMAGE_VERIFY, ...) to verify if the
+ * returned partition contains a bootable image.
+ *
+ * @return Pointer to info for partition structure, or NULL if partition table is invalid or a flash read operation failed. Any returned pointer is valid for the lifetime of the application.
+ */
+const esp_partition_t* esp_ota_get_boot_partition(void);
+
+
+/**
+ * @brief Get partition info of currently running app
+ *
+ * This function is different to esp_ota_get_boot_partition() in that
+ * it ignores any change of selected boot partition caused by
+ * esp_ota_set_boot_partition(). Only the app whose code is currently
+ * running will have its partition information returned.
+ *
+ * The partition returned by this function may also differ from esp_ota_get_boot_partition() if the configured boot
+ * partition is somehow invalid, and the bootloader fell back to a different app partition at boot.
+ *
+ * @return Pointer to info for partition structure, or NULL if no partition is found or flash read operation failed. Returned pointer is valid for the lifetime of the application.
+ */
+const esp_partition_t* esp_ota_get_running_partition(void);
+
+
+/**
+ * @brief Return the next OTA app partition which should be written with a new firmware.
+ *
+ * Call this function to find an OTA app partition which can be passed to esp_ota_begin().
+ *
+ * Finds next partition round-robin, starting from the current running partition.
+ *
+ * @param start_from If set, treat this partition info as describing the current running partition. Can be NULL, in which case esp_ota_get_running_partition() is used to find the currently running partition. The result of this function is never the same as this argument.
+ *
+ * @return Pointer to info for partition which should be updated next. NULL result indicates invalid OTA data partition, or that no eligible OTA app slot partition was found.
+ *
+ */
+const esp_partition_t* esp_ota_get_next_update_partition(const esp_partition_t *start_from);
+
+/**
+ * @brief Returns esp_app_desc structure for app partition. This structure includes app version.
+ *
+ * Returns a description for the requested app partition.
+ * @param[in] partition     Pointer to app partition. (only app partition)
+ * @param[out] app_desc     Structure of info about app.
+ * @return
+ *  - ESP_OK                Successful.
+ *  - ESP_ERR_NOT_FOUND     app_desc structure is not found. Magic word is incorrect.
+ *  - ESP_ERR_NOT_SUPPORTED Partition is not application.
+ *  - ESP_ERR_INVALID_ARG   Arguments is NULL or if partition's offset exceeds partition size.
+ *  - ESP_ERR_INVALID_SIZE  Read would go out of bounds of the partition.
+ *  - or one of error codes from lower-level flash driver.
+ */
+esp_err_t esp_ota_get_partition_description(const esp_partition_t *partition, esp_app_desc_t *app_desc);
+
+/**
+ * @brief Returns number of ota partitions provided in partition table.
+ *
+ * @return
+ *  - Number of OTA partitions
+ */
+uint8_t esp_ota_get_app_partition_count(void);
+
+/**
+ * @brief This function is called to indicate that the running app is working well.
+ *
+ * @return
+ *  - ESP_OK: if successful.
+ */
+esp_err_t esp_ota_mark_app_valid_cancel_rollback(void);
+
+/**
+ * @brief This function is called to roll back to the previously workable app with reboot.
+ *
+ * If rollback is successful then device will reset else API will return with error code.
+ * Checks applications on a flash drive that can be booted in case of rollback.
+ * If the flash does not have at least one app (except the running app) then rollback is not possible.
+ * @return
+ *  - ESP_FAIL: if not successful.
+ *  - ESP_ERR_OTA_ROLLBACK_FAILED: The rollback is not possible due to flash does not have any apps.
+ */
+esp_err_t esp_ota_mark_app_invalid_rollback_and_reboot(void);
+
+/**
+ * @brief Returns last partition with invalid state (ESP_OTA_IMG_INVALID or ESP_OTA_IMG_ABORTED).
+ *
+ * @return partition.
+ */
+const esp_partition_t* esp_ota_get_last_invalid_partition(void);
+
+/**
+ * @brief Returns state for given partition.
+ *
+ * @param[in] partition  Pointer to partition.
+ * @param[out] ota_state state of partition (if this partition has a record in otadata).
+ * @return
+ *        - ESP_OK:                 Successful.
+ *        - ESP_ERR_INVALID_ARG:    partition or ota_state arguments were NULL.
+ *        - ESP_ERR_NOT_SUPPORTED:  partition is not ota.
+ *        - ESP_ERR_NOT_FOUND:      Partition table does not have otadata or state was not found for given partition.
+ */
+esp_err_t esp_ota_get_state_partition(const esp_partition_t *partition, esp_ota_img_states_t *ota_state);
+
+/**
+ * @brief Erase previous boot app partition and corresponding otadata select for this partition.
+ *
+ * When current app is marked to as valid then you can erase previous app partition.
+ * @return
+ *        - ESP_OK:   Successful, otherwise ESP_ERR.
+ */
+esp_err_t esp_ota_erase_last_boot_app_partition(void);
+
+/**
+ * @brief Checks applications on the slots which can be booted in case of rollback.
+ *
+ * These applications should be valid (marked in otadata as not UNDEFINED, INVALID or ABORTED and crc is good) and be able booted,
+ * and secure_version of app >= secure_version of efuse (if anti-rollback is enabled).
+ *
+ * @return
+ *        - True: Returns true if the slots have at least one app (except the running app).
+ *        - False: The rollback is not possible.
+ */
+bool esp_ota_check_rollback_is_possible(void);
+
+#if SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS > 1 && (CONFIG_SECURE_BOOT_V2_ENABLED || __DOXYGEN__)
+
+/**
+ * Secure Boot V2 public key indexes.
+ */
+typedef enum {
+    SECURE_BOOT_PUBLIC_KEY_INDEX_0,     /*!< Points to the 0th index of the Secure Boot v2 public key */
+    SECURE_BOOT_PUBLIC_KEY_INDEX_1,     /*!< Points to the 1st index of the Secure Boot v2 public key */
+    SECURE_BOOT_PUBLIC_KEY_INDEX_2      /*!< Points to the 2nd index of the Secure Boot v2 public key */
+} esp_ota_secure_boot_public_key_index_t;
+
+/**
+ * @brief Revokes the old signature digest. To be called in the application after the rollback logic.
+ *
+ * Relevant for Secure boot v2 on ESP32-S2 where upto 3 key digests can be stored (Key #N-1, Key #N, Key #N+1).
+ * When key #N-1 used to sign an app is invalidated, an OTA update is to be sent with an app signed with key #N-1 & Key #N.
+ * After successfully booting the OTA app should call this function to revoke Key #N-1.
+ *
+ * @param index - The index of the signature block to be revoked
+ *
+ * @return
+ *        - ESP_OK: If revocation is successful.
+ *        - ESP_ERR_INVALID_ARG: If the index of the public key to be revoked is incorrect.
+ *        - ESP_FAIL: If secure boot v2 has not been enabled.
+ */
+esp_err_t esp_ota_revoke_secure_boot_public_key(esp_ota_secure_boot_public_key_index_t index);
+#endif /* SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS > 1 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* OTA_OPS_H */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/include/tusb_config.h b/tools/sdk/esp32s3/include/arduino_tinyusb/include/tusb_config.h
new file mode 100755
index 00000000000..a5a0afd32dc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/include/tusb_config.h
@@ -0,0 +1,135 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org),
+ * Additions Copyright (c) 2020, Espressif Systems (Shanghai) PTE LTD
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#pragma once
+#include "tusb_option.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*         */
+/* KCONFIG */
+/*         */
+
+#ifndef CONFIG_TINYUSB_CDC_ENABLED
+#   define CONFIG_TINYUSB_CDC_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_MSC_ENABLED
+#   define CONFIG_TINYUSB_MSC_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_HID_ENABLED
+#   define CONFIG_TINYUSB_HID_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_MIDI_ENABLED
+#   define CONFIG_TINYUSB_MIDI_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_VIDEO_ENABLED
+#   define CONFIG_TINYUSB_VIDEO_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_CUSTOM_CLASS_ENABLED
+#   define CONFIG_TINYUSB_CUSTOM_CLASS_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_DFU_RT_ENABLED
+#   define CONFIG_TINYUSB_DFU_RT_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_VENDOR_ENABLED
+#   define CONFIG_TINYUSB_VENDOR_ENABLED 0
+#endif
+
+/*                      */
+/* COMMON CONFIGURATION */
+/*                      */
+
+#define CFG_TUSB_MCU				OPT_MCU_ESP32S2
+#define CFG_TUSB_RHPORT0_MODE       OPT_MODE_DEVICE
+#define CFG_TUSB_OS                 OPT_OS_FREERTOS
+
+/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
+ * Tinyusb use follows macros to declare transferring memory so that they can be put
+ * into those specific section.
+ * e.g
+ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
+ * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
+ */
+#ifndef CFG_TUSB_MEM_SECTION
+#   define CFG_TUSB_MEM_SECTION
+#endif
+
+#ifndef CFG_TUSB_MEM_ALIGN
+#   define CFG_TUSB_MEM_ALIGN       TU_ATTR_ALIGNED(4)
+#endif
+
+/*                      */
+/* DRIVER CONFIGURATION */
+/*                      */
+
+#define CFG_TUD_MAINTASK_SIZE 		4096
+#define CFG_TUD_ENDOINT0_SIZE 		64
+
+// Enabled Drivers
+#define CFG_TUD_CDC 				CONFIG_TINYUSB_CDC_ENABLED
+#define CFG_TUD_MSC 				CONFIG_TINYUSB_MSC_ENABLED
+#define CFG_TUD_HID 				CONFIG_TINYUSB_HID_ENABLED
+#define CFG_TUD_MIDI 				CONFIG_TINYUSB_MIDI_ENABLED
+#define CFG_TUD_VIDEO               CONFIG_TINYUSB_VIDEO_ENABLED
+#define CFG_TUD_CUSTOM_CLASS 		CONFIG_TINYUSB_CUSTOM_CLASS_ENABLED
+#define CFG_TUD_DFU_RUNTIME			CONFIG_TINYUSB_DFU_RT_ENABLED
+#define CFG_TUD_VENDOR 				CONFIG_TINYUSB_VENDOR_ENABLED
+
+// CDC FIFO size of TX and RX
+#define CFG_TUD_CDC_RX_BUFSIZE 		CONFIG_TINYUSB_CDC_RX_BUFSIZE
+#define CFG_TUD_CDC_TX_BUFSIZE 		CONFIG_TINYUSB_CDC_TX_BUFSIZE
+
+// MSC Buffer size of Device Mass storage:
+#define CFG_TUD_MSC_BUFSIZE 		CONFIG_TINYUSB_MSC_BUFSIZE
+
+// HID buffer size Should be sufficient to hold ID (if any) + Data
+#define CFG_TUD_HID_BUFSIZE 		CONFIG_TINYUSB_HID_BUFSIZE
+
+// MIDI FIFO size of TX and RX
+#define CFG_TUD_MIDI_RX_BUFSIZE		CONFIG_TINYUSB_MIDI_RX_BUFSIZE
+#define CFG_TUD_MIDI_TX_BUFSIZE		CONFIG_TINYUSB_MIDI_TX_BUFSIZE
+
+// The number of video streaming interfaces and  endpoint size
+#define CFG_TUD_VIDEO_STREAMING     CONFIG_TINYUSB_VIDEO_STREAMING_IFS
+#define CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE  CONFIG_TINYUSB_VIDEO_STREAMING_BUFSIZE
+
+// VENDOR FIFO size of TX and RX
+#define CFG_TUD_VENDOR_RX_BUFSIZE 	CONFIG_TINYUSB_VENDOR_RX_BUFSIZE
+#define CFG_TUD_VENDOR_TX_BUFSIZE 	CONFIG_TINYUSB_VENDOR_TX_BUFSIZE
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/audio/audio.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/audio/audio.h
new file mode 100644
index 00000000000..6f9c1a6b582
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/audio/audio.h
@@ -0,0 +1,933 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2020 Reinhard Panhuber
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/** \ingroup group_class
+ *  \defgroup ClassDriver_Audio Audio
+ *            Currently only MIDI subclass is supported
+ *  @{ */
+
+#ifndef _TUSB_AUDIO_H__
+#define _TUSB_AUDIO_H__
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Audio Device Class Codes
+
+/// A.2 - Audio Function Subclass Codes
+typedef enum
+{
+  AUDIO_FUNCTION_SUBCLASS_UNDEFINED = 0x00,
+} audio_function_subclass_type_t;
+
+/// A.3 - Audio Function Protocol Codes
+typedef enum
+{
+  AUDIO_FUNC_PROTOCOL_CODE_UNDEF       = 0x00,
+  AUDIO_FUNC_PROTOCOL_CODE_V2          = 0x20, ///< Version 2.0
+} audio_function_protocol_code_t;
+
+/// A.5 - Audio Interface Subclass Codes
+typedef enum
+{
+  AUDIO_SUBCLASS_UNDEFINED = 0x00,
+  AUDIO_SUBCLASS_CONTROL         , ///< Audio Control
+  AUDIO_SUBCLASS_STREAMING       , ///< Audio Streaming
+  AUDIO_SUBCLASS_MIDI_STREAMING  , ///< MIDI Streaming
+} audio_subclass_type_t;
+
+/// A.6 - Audio Interface Protocol Codes
+typedef enum
+{
+  AUDIO_INT_PROTOCOL_CODE_UNDEF       = 0x00,
+  AUDIO_INT_PROTOCOL_CODE_V2          = 0x20, ///< Version 2.0
+} audio_interface_protocol_code_t;
+
+/// A.7 - Audio Function Category Codes
+typedef enum
+{
+  AUDIO_FUNC_UNDEF              = 0x00,
+  AUDIO_FUNC_DESKTOP_SPEAKER    = 0x01,
+  AUDIO_FUNC_HOME_THEATER       = 0x02,
+  AUDIO_FUNC_MICROPHONE         = 0x03,
+  AUDIO_FUNC_HEADSET            = 0x04,
+  AUDIO_FUNC_TELEPHONE          = 0x05,
+  AUDIO_FUNC_CONVERTER          = 0x06,
+  AUDIO_FUNC_SOUND_RECODER      = 0x07,
+  AUDIO_FUNC_IO_BOX             = 0x08,
+  AUDIO_FUNC_MUSICAL_INSTRUMENT = 0x09,
+  AUDIO_FUNC_PRO_AUDIO          = 0x0A,
+  AUDIO_FUNC_AUDIO_VIDEO        = 0x0B,
+  AUDIO_FUNC_CONTROL_PANEL      = 0x0C,
+  AUDIO_FUNC_OTHER              = 0xFF,
+} audio_function_code_t;
+
+/// A.9 - Audio Class-Specific AC Interface Descriptor Subtypes UAC2
+typedef enum
+{
+  AUDIO_CS_AC_INTERFACE_AC_DESCRIPTOR_UNDEF   = 0x00,
+  AUDIO_CS_AC_INTERFACE_HEADER                = 0x01,
+  AUDIO_CS_AC_INTERFACE_INPUT_TERMINAL        = 0x02,
+  AUDIO_CS_AC_INTERFACE_OUTPUT_TERMINAL       = 0x03,
+  AUDIO_CS_AC_INTERFACE_MIXER_UNIT            = 0x04,
+  AUDIO_CS_AC_INTERFACE_SELECTOR_UNIT         = 0x05,
+  AUDIO_CS_AC_INTERFACE_FEATURE_UNIT          = 0x06,
+  AUDIO_CS_AC_INTERFACE_EFFECT_UNIT           = 0x07,
+  AUDIO_CS_AC_INTERFACE_PROCESSING_UNIT       = 0x08,
+  AUDIO_CS_AC_INTERFACE_EXTENSION_UNIT        = 0x09,
+  AUDIO_CS_AC_INTERFACE_CLOCK_SOURCE          = 0x0A,
+  AUDIO_CS_AC_INTERFACE_CLOCK_SELECTOR        = 0x0B,
+  AUDIO_CS_AC_INTERFACE_CLOCK_MULTIPLIER      = 0x0C,
+  AUDIO_CS_AC_INTERFACE_SAMPLE_RATE_CONVERTER = 0x0D,
+} audio_cs_ac_interface_subtype_t;
+
+/// A.10 - Audio Class-Specific AS Interface Descriptor Subtypes UAC2
+typedef enum
+{
+  AUDIO_CS_AS_INTERFACE_AS_DESCRIPTOR_UNDEF   = 0x00,
+  AUDIO_CS_AS_INTERFACE_AS_GENERAL            = 0x01,
+  AUDIO_CS_AS_INTERFACE_FORMAT_TYPE           = 0x02,
+  AUDIO_CS_AS_INTERFACE_ENCODER               = 0x03,
+  AUDIO_CS_AS_INTERFACE_DECODER               = 0x04,
+} audio_cs_as_interface_subtype_t;
+
+/// A.11 - Effect Unit Effect Types
+typedef enum
+{
+  AUDIO_EFFECT_TYPE_UNDEF                     = 0x00,
+  AUDIO_EFFECT_TYPE_PARAM_EQ_SECTION          = 0x01,
+  AUDIO_EFFECT_TYPE_REVERBERATION             = 0x02,
+  AUDIO_EFFECT_TYPE_MOD_DELAY                 = 0x03,
+  AUDIO_EFFECT_TYPE_DYN_RANGE_COMP            = 0x04,
+} audio_effect_unit_effect_type_t;
+
+/// A.12 - Processing Unit Process Types
+typedef enum
+{
+  AUDIO_PROCESS_TYPE_UNDEF                    = 0x00,
+  AUDIO_PROCESS_TYPE_UP_DOWN_MIX              = 0x01,
+  AUDIO_PROCESS_TYPE_DOLBY_PROLOGIC           = 0x02,
+  AUDIO_PROCESS_TYPE_STEREO_EXTENDER          = 0x03,
+} audio_processing_unit_process_type_t;
+
+/// A.13 - Audio Class-Specific EP Descriptor Subtypes UAC2
+typedef enum
+{
+  AUDIO_CS_EP_SUBTYPE_UNDEF                   = 0x00,
+  AUDIO_CS_EP_SUBTYPE_GENERAL                 = 0x01,
+} audio_cs_ep_subtype_t;
+
+/// A.14 - Audio Class-Specific Request Codes
+typedef enum
+{
+  AUDIO_CS_REQ_UNDEF                          = 0x00,
+  AUDIO_CS_REQ_CUR                            = 0x01,
+  AUDIO_CS_REQ_RANGE                          = 0x02,
+  AUDIO_CS_REQ_MEM                            = 0x03,
+} audio_cs_req_t;
+
+/// A.17 - Control Selector Codes
+
+/// A.17.1 - Clock Source Control Selectors
+typedef enum
+{
+  AUDIO_CS_CTRL_UNDEF                         = 0x00,
+  AUDIO_CS_CTRL_SAM_FREQ                      = 0x01,
+  AUDIO_CS_CTRL_CLK_VALID                     = 0x02,
+} audio_clock_src_control_selector_t;
+
+/// A.17.2 - Clock Selector Control Selectors
+typedef enum
+{
+  AUDIO_CX_CTRL_UNDEF                         = 0x00,
+  AUDIO_CX_CTRL_CONTROL                       = 0x01,
+} audio_clock_sel_control_selector_t;
+
+/// A.17.3 - Clock Multiplier Control Selectors
+typedef enum
+{
+  AUDIO_CM_CTRL_UNDEF                         = 0x00,
+  AUDIO_CM_CTRL_NUMERATOR_CONTROL             = 0x01,
+  AUDIO_CM_CTRL_DENOMINATOR_CONTROL           = 0x02,
+} audio_clock_mul_control_selector_t;
+
+/// A.17.4 - Terminal Control Selectors
+typedef enum
+{
+  AUDIO_TE_CTRL_UNDEF                         = 0x00,
+  AUDIO_TE_CTRL_COPY_PROTECT                  = 0x01,
+  AUDIO_TE_CTRL_CONNECTOR                     = 0x02,
+  AUDIO_TE_CTRL_OVERLOAD                      = 0x03,
+  AUDIO_TE_CTRL_CLUSTER                       = 0x04,
+  AUDIO_TE_CTRL_UNDERFLOW                     = 0x05,
+  AUDIO_TE_CTRL_OVERFLOW                      = 0x06,
+  AUDIO_TE_CTRL_LATENCY                       = 0x07,
+} audio_terminal_control_selector_t;
+
+/// A.17.5 - Mixer Control Selectors
+typedef enum
+{
+  AUDIO_MU_CTRL_UNDEF                         = 0x00,
+  AUDIO_MU_CTRL_MIXER                         = 0x01,
+  AUDIO_MU_CTRL_CLUSTER                       = 0x02,
+  AUDIO_MU_CTRL_UNDERFLOW                     = 0x03,
+  AUDIO_MU_CTRL_OVERFLOW                      = 0x04,
+  AUDIO_MU_CTRL_LATENCY                       = 0x05,
+} audio_mixer_control_selector_t;
+
+/// A.17.6 - Selector Control Selectors
+typedef enum
+{
+  AUDIO_SU_CTRL_UNDEF                         = 0x00,
+  AUDIO_SU_CTRL_SELECTOR                      = 0x01,
+  AUDIO_SU_CTRL_LATENCY                       = 0x02,
+} audio_sel_control_selector_t;
+
+/// A.17.7 - Feature Unit Control Selectors
+typedef enum
+{
+  AUDIO_FU_CTRL_UNDEF                         = 0x00,
+  AUDIO_FU_CTRL_MUTE                          = 0x01,
+  AUDIO_FU_CTRL_VOLUME                        = 0x02,
+  AUDIO_FU_CTRL_BASS                          = 0x03,
+  AUDIO_FU_CTRL_MID                           = 0x04,
+  AUDIO_FU_CTRL_TREBLE                        = 0x05,
+  AUDIO_FU_CTRL_GRAPHIC_EQUALIZER             = 0x06,
+  AUDIO_FU_CTRL_AGC                           = 0x07,
+  AUDIO_FU_CTRL_DELAY                         = 0x08,
+  AUDIO_FU_CTRL_BASS_BOOST                    = 0x09,
+  AUDIO_FU_CTRL_LOUDNESS                      = 0x0A,
+  AUDIO_FU_CTRL_INPUT_GAIN                    = 0x0B,
+  AUDIO_FU_CTRL_GAIN_PAD                      = 0x0C,
+  AUDIO_FU_CTRL_INVERTER                      = 0x0D,
+  AUDIO_FU_CTRL_UNDERFLOW                     = 0x0E,
+  AUDIO_FU_CTRL_OVERVLOW                      = 0x0F,
+  AUDIO_FU_CTRL_LATENCY                       = 0x10,
+} audio_feature_unit_control_selector_t;
+
+/// A.17.8 Effect Unit Control Selectors
+
+/// A.17.8.1 Parametric Equalizer Section Effect Unit Control Selectors
+typedef enum
+{
+  AUDIO_PE_CTRL_UNDEF                         = 0x00,
+  AUDIO_PE_CTRL_ENABLE                        = 0x01,
+  AUDIO_PE_CTRL_CENTERFREQ                    = 0x02,
+  AUDIO_PE_CTRL_QFACTOR                       = 0x03,
+  AUDIO_PE_CTRL_GAIN                          = 0x04,
+  AUDIO_PE_CTRL_UNDERFLOW                     = 0x05,
+  AUDIO_PE_CTRL_OVERFLOW                      = 0x06,
+  AUDIO_PE_CTRL_LATENCY                       = 0x07,
+} audio_parametric_equalizer_control_selector_t;
+
+/// A.17.8.2 Reverberation Effect Unit Control Selectors
+typedef enum
+{
+  AUDIO_RV_CTRL_UNDEF                         = 0x00,
+  AUDIO_RV_CTRL_ENABLE                        = 0x01,
+  AUDIO_RV_CTRL_TYPE                          = 0x02,
+  AUDIO_RV_CTRL_LEVEL                         = 0x03,
+  AUDIO_RV_CTRL_TIME                          = 0x04,
+  AUDIO_RV_CTRL_FEEDBACK                      = 0x05,
+  AUDIO_RV_CTRL_PREDELAY                      = 0x06,
+  AUDIO_RV_CTRL_DENSITY                       = 0x07,
+  AUDIO_RV_CTRL_HIFREQ_ROLLOFF                = 0x08,
+  AUDIO_RV_CTRL_UNDERFLOW                     = 0x09,
+  AUDIO_RV_CTRL_OVERFLOW                      = 0x0A,
+  AUDIO_RV_CTRL_LATENCY                       = 0x0B,
+} audio_reverberation_effect_control_selector_t;
+
+/// A.17.8.3 Modulation Delay Effect Unit Control Selectors
+typedef enum
+{
+  AUDIO_MD_CTRL_UNDEF                         = 0x00,
+  AUDIO_MD_CTRL_ENABLE                        = 0x01,
+  AUDIO_MD_CTRL_BALANCE                       = 0x02,
+  AUDIO_MD_CTRL_RATE                          = 0x03,
+  AUDIO_MD_CTRL_DEPTH                         = 0x04,
+  AUDIO_MD_CTRL_TIME                          = 0x05,
+  AUDIO_MD_CTRL_FEEDBACK                      = 0x06,
+  AUDIO_MD_CTRL_UNDERFLOW                     = 0x07,
+  AUDIO_MD_CTRL_OVERFLOW                      = 0x08,
+  AUDIO_MD_CTRL_LATENCY                       = 0x09,
+} audio_modulation_delay_control_selector_t;
+
+/// A.17.8.4 Dynamic Range Compressor Effect Unit Control Selectors
+typedef enum
+{
+  AUDIO_DR_CTRL_UNDEF                         = 0x00,
+  AUDIO_DR_CTRL_ENABLE                        = 0x01,
+  AUDIO_DR_CTRL_COMPRESSION_RATE              = 0x02,
+  AUDIO_DR_CTRL_MAXAMPL                       = 0x03,
+  AUDIO_DR_CTRL_THRESHOLD                     = 0x04,
+  AUDIO_DR_CTRL_ATTACK_TIME                   = 0x05,
+  AUDIO_DR_CTRL_RELEASE_TIME                  = 0x06,
+  AUDIO_DR_CTRL_UNDERFLOW                     = 0x07,
+  AUDIO_DR_CTRL_OVERFLOW                      = 0x08,
+  AUDIO_DR_CTRL_LATENCY                       = 0x09,
+} audio_dynamic_range_compression_control_selector_t;
+
+/// A.17.9 Processing Unit Control Selectors
+
+/// A.17.9.1 Up/Down-mix Processing Unit Control Selectors
+typedef enum
+{
+  AUDIO_UD_CTRL_UNDEF                         = 0x00,
+  AUDIO_UD_CTRL_ENABLE                        = 0x01,
+  AUDIO_UD_CTRL_MODE_SELECT                   = 0x02,
+  AUDIO_UD_CTRL_CLUSTER                       = 0x03,
+  AUDIO_UD_CTRL_UNDERFLOW                     = 0x04,
+  AUDIO_UD_CTRL_OVERFLOW                      = 0x05,
+  AUDIO_UD_CTRL_LATENCY                       = 0x06,
+} audio_up_down_mix_control_selector_t;
+
+/// A.17.9.2 Dolby Prologic ™ Processing Unit Control Selectors
+typedef enum
+{
+  AUDIO_DP_CTRL_UNDEF                         = 0x00,
+  AUDIO_DP_CTRL_ENABLE                        = 0x01,
+  AUDIO_DP_CTRL_MODE_SELECT                   = 0x02,
+  AUDIO_DP_CTRL_CLUSTER                       = 0x03,
+  AUDIO_DP_CTRL_UNDERFLOW                     = 0x04,
+  AUDIO_DP_CTRL_OVERFLOW                      = 0x05,
+  AUDIO_DP_CTRL_LATENCY                       = 0x06,
+} audio_dolby_prologic_control_selector_t;
+
+/// A.17.9.3 Stereo Extender Processing Unit Control Selectors
+typedef enum
+{
+  AUDIO_ST_EXT_CTRL_UNDEF                     = 0x00,
+  AUDIO_ST_EXT_CTRL_ENABLE                    = 0x01,
+  AUDIO_ST_EXT_CTRL_WIDTH                     = 0x02,
+  AUDIO_ST_EXT_CTRL_UNDERFLOW                 = 0x03,
+  AUDIO_ST_EXT_CTRL_OVERFLOW                  = 0x04,
+  AUDIO_ST_EXT_CTRL_LATENCY                   = 0x05,
+} audio_stereo_extender_control_selector_t;
+
+/// A.17.10 Extension Unit Control Selectors
+typedef enum
+{
+  AUDIO_XU_CTRL_UNDEF                         = 0x00,
+  AUDIO_XU_CTRL_ENABLE                        = 0x01,
+  AUDIO_XU_CTRL_CLUSTER                       = 0x02,
+  AUDIO_XU_CTRL_UNDERFLOW                     = 0x03,
+  AUDIO_XU_CTRL_OVERFLOW                      = 0x04,
+  AUDIO_XU_CTRL_LATENCY                       = 0x05,
+} audio_extension_unit_control_selector_t;
+
+/// A.17.11 AudioStreaming Interface Control Selectors
+typedef enum
+{
+  AUDIO_AS_CTRL_UNDEF                         = 0x00,
+  AUDIO_AS_CTRL_ACT_ALT_SETTING               = 0x01,
+  AUDIO_AS_CTRL_VAL_ALT_SETTINGS              = 0x02,
+  AUDIO_AS_CTRL_AUDIO_DATA_FORMAT             = 0x03,
+} audio_audiostreaming_interface_control_selector_t;
+
+/// A.17.12 Encoder Control Selectors
+typedef enum
+{
+  AUDIO_EN_CTRL_UNDEF                         = 0x00,
+  AUDIO_EN_CTRL_BIT_RATE                      = 0x01,
+  AUDIO_EN_CTRL_QUALITY                       = 0x02,
+  AUDIO_EN_CTRL_VBR                           = 0x03,
+  AUDIO_EN_CTRL_TYPE                          = 0x04,
+  AUDIO_EN_CTRL_UNDERFLOW                     = 0x05,
+  AUDIO_EN_CTRL_OVERFLOW                      = 0x06,
+  AUDIO_EN_CTRL_ENCODER_ERROR                 = 0x07,
+  AUDIO_EN_CTRL_PARAM1                        = 0x08,
+  AUDIO_EN_CTRL_PARAM2                        = 0x09,
+  AUDIO_EN_CTRL_PARAM3                        = 0x0A,
+  AUDIO_EN_CTRL_PARAM4                        = 0x0B,
+  AUDIO_EN_CTRL_PARAM5                        = 0x0C,
+  AUDIO_EN_CTRL_PARAM6                        = 0x0D,
+  AUDIO_EN_CTRL_PARAM7                        = 0x0E,
+  AUDIO_EN_CTRL_PARAM8                        = 0x0F,
+} audio_encoder_control_selector_t;
+
+/// A.17.13 Decoder Control Selectors
+
+/// A.17.13.1 MPEG Decoder Control Selectors
+typedef enum
+{
+  AUDIO_MPD_CTRL_UNDEF                        = 0x00,
+  AUDIO_MPD_CTRL_DUAL_CHANNEL                 = 0x01,
+  AUDIO_MPD_CTRL_SECOND_STEREO                = 0x02,
+  AUDIO_MPD_CTRL_MULTILINGUAL                 = 0x03,
+  AUDIO_MPD_CTRL_DYN_RANGE                    = 0x04,
+  AUDIO_MPD_CTRL_SCALING                      = 0x05,
+  AUDIO_MPD_CTRL_HILO_SCALING                 = 0x06,
+  AUDIO_MPD_CTRL_UNDERFLOW                    = 0x07,
+  AUDIO_MPD_CTRL_OVERFLOW                     = 0x08,
+  AUDIO_MPD_CTRL_DECODER_ERROR                = 0x09,
+} audio_MPEG_decoder_control_selector_t;
+
+/// A.17.13.2 AC-3 Decoder Control Selectors
+typedef enum
+{
+  AUDIO_AD_CTRL_UNDEF                         = 0x00,
+  AUDIO_AD_CTRL_MODE                          = 0x01,
+  AUDIO_AD_CTRL_DYN_RANGE                     = 0x02,
+  AUDIO_AD_CTRL_SCALING                       = 0x03,
+  AUDIO_AD_CTRL_HILO_SCALING                  = 0x04,
+  AUDIO_AD_CTRL_UNDERFLOW                     = 0x05,
+  AUDIO_AD_CTRL_OVERFLOW                      = 0x06,
+  AUDIO_AD_CTRL_DECODER_ERROR                 = 0x07,
+} audio_AC3_decoder_control_selector_t;
+
+/// A.17.13.3 WMA Decoder Control Selectors
+typedef enum
+{
+  AUDIO_WD_CTRL_UNDEF                         = 0x00,
+  AUDIO_WD_CTRL_UNDERFLOW                     = 0x01,
+  AUDIO_WD_CTRL_OVERFLOW                      = 0x02,
+  AUDIO_WD_CTRL_DECODER_ERROR                 = 0x03,
+} audio_WMA_decoder_control_selector_t;
+
+/// A.17.13.4 DTS Decoder Control Selectors
+typedef enum
+{
+  AUDIO_DD_CTRL_UNDEF                         = 0x00,
+  AUDIO_DD_CTRL_UNDERFLOW                     = 0x01,
+  AUDIO_DD_CTRL_OVERFLOW                      = 0x02,
+  AUDIO_DD_CTRL_DECODER_ERROR                 = 0x03,
+} audio_DTS_decoder_control_selector_t;
+
+/// A.17.14 Endpoint Control Selectors
+typedef enum
+{
+  AUDIO_EP_CTRL_UNDEF                         = 0x00,
+  AUDIO_EP_CTRL_PITCH                         = 0x01,
+  AUDIO_EP_CTRL_DATA_OVERRUN                  = 0x02,
+  AUDIO_EP_CTRL_DATA_UNDERRUN                 = 0x03,
+} audio_EP_control_selector_t;
+
+/// Terminal Types
+
+/// 2.1 - Audio Class-Terminal Types UAC2
+typedef enum
+{
+  AUDIO_TERM_TYPE_USB_UNDEFINED       = 0x0100,
+  AUDIO_TERM_TYPE_USB_STREAMING       = 0x0101,
+  AUDIO_TERM_TYPE_USB_VENDOR_SPEC     = 0x01FF,
+} audio_terminal_type_t;
+
+/// 2.2 - Audio Class-Input Terminal Types UAC2
+typedef enum
+{
+  AUDIO_TERM_TYPE_IN_UNDEFINED        = 0x0200,
+  AUDIO_TERM_TYPE_IN_GENERIC_MIC      = 0x0201,
+  AUDIO_TERM_TYPE_IN_DESKTOP_MIC      = 0x0202,
+  AUDIO_TERM_TYPE_IN_PERSONAL_MIC     = 0x0203,
+  AUDIO_TERM_TYPE_IN_OMNI_MIC         = 0x0204,
+  AUDIO_TERM_TYPE_IN_ARRAY_MIC        = 0x0205,
+  AUDIO_TERM_TYPE_IN_PROC_ARRAY_MIC   = 0x0206,
+} audio_terminal_input_type_t;
+
+/// 2.3 - Audio Class-Output Terminal Types UAC2
+typedef enum
+{
+  AUDIO_TERM_TYPE_OUT_UNDEFINED               = 0x0300,
+  AUDIO_TERM_TYPE_OUT_GENERIC_SPEAKER         = 0x0301,
+  AUDIO_TERM_TYPE_OUT_HEADPHONES              = 0x0302,
+  AUDIO_TERM_TYPE_OUT_HEAD_MNT_DISP_AUIDO     = 0x0303,
+  AUDIO_TERM_TYPE_OUT_DESKTOP_SPEAKER         = 0x0304,
+  AUDIO_TERM_TYPE_OUT_ROOM_SPEAKER            = 0x0305,
+  AUDIO_TERM_TYPE_OUT_COMMUNICATION_SPEAKER   = 0x0306,
+  AUDIO_TERM_TYPE_OUT_LOW_FRQ_EFFECTS_SPEAKER = 0x0307,
+} audio_terminal_output_type_t;
+
+/// Rest is yet to be implemented
+
+/// Additional Audio Device Class Codes - Source: Audio Data Formats
+
+/// A.1 - Audio Class-Format Type Codes UAC2
+typedef enum
+{
+  AUDIO_FORMAT_TYPE_UNDEFINED     = 0x00,
+  AUDIO_FORMAT_TYPE_I             = 0x01,
+  AUDIO_FORMAT_TYPE_II            = 0x02,
+  AUDIO_FORMAT_TYPE_III           = 0x03,
+  AUDIO_FORMAT_TYPE_IV            = 0x04,
+  AUDIO_EXT_FORMAT_TYPE_I         = 0x81,
+  AUDIO_EXT_FORMAT_TYPE_II        = 0x82,
+  AUDIO_EXT_FORMAT_TYPE_III       = 0x83,
+} audio_format_type_t;
+
+// A.2.1 - Audio Class-Audio Data Format Type I UAC2
+typedef enum
+{
+  AUDIO_DATA_FORMAT_TYPE_I_PCM            = (uint32_t) (1 << 0),
+  AUDIO_DATA_FORMAT_TYPE_I_PCM8           = (uint32_t) (1 << 1),
+  AUDIO_DATA_FORMAT_TYPE_I_IEEE_FLOAT     = (uint32_t) (1 << 2),
+  AUDIO_DATA_FORMAT_TYPE_I_ALAW           = (uint32_t) (1 << 3),
+  AUDIO_DATA_FORMAT_TYPE_I_MULAW          = (uint32_t) (1 << 4),
+  AUDIO_DATA_FORMAT_TYPE_I_RAW_DATA       = 0x80000000,
+} audio_data_format_type_I_t;
+
+/// All remaining definitions are taken from the descriptor descriptions in the UAC2 main specification
+
+/// Audio Class-Control Values UAC2
+typedef enum
+{
+  AUDIO_CTRL_NONE     = 0x00,         ///< No Host access
+  AUDIO_CTRL_R        = 0x01,         ///< Host read access only
+  AUDIO_CTRL_RW       = 0x03,         ///< Host read write access
+} audio_control_t;
+
+/// Audio Class-Specific AC Interface Descriptor Controls UAC2
+typedef enum
+{
+  AUDIO_CS_AS_INTERFACE_CTRL_LATENCY_POS  = 0,
+} audio_cs_ac_interface_control_pos_t;
+
+/// Audio Class-Specific AS Interface Descriptor Controls UAC2
+typedef enum
+{
+  AUDIO_CS_AS_INTERFACE_CTRL_ACTIVE_ALT_SET_POS   = 0,
+  AUDIO_CS_AS_INTERFACE_CTRL_VALID_ALT_SET_POS    = 2,
+} audio_cs_as_interface_control_pos_t;
+
+/// Audio Class-Specific AS Isochronous Data EP Attributes UAC2
+typedef enum
+{
+  AUDIO_CS_AS_ISO_DATA_EP_ATT_MAX_PACKETS_ONLY    = 0x80,
+  AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK  = 0x00,
+} audio_cs_as_iso_data_ep_attribute_t;
+
+/// Audio Class-Specific AS Isochronous Data EP Controls UAC2
+typedef enum
+{
+  AUDIO_CS_AS_ISO_DATA_EP_CTRL_PITCH_POS          = 0,
+  AUDIO_CS_AS_ISO_DATA_EP_CTRL_DATA_OVERRUN_POS   = 2,
+  AUDIO_CS_AS_ISO_DATA_EP_CTRL_DATA_UNDERRUN_POS  = 4,
+} audio_cs_as_iso_data_ep_control_pos_t;
+
+/// Audio Class-Specific AS Isochronous Data EP Lock Delay Units UAC2
+typedef enum
+{
+  AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED       = 0x00,
+  AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC        = 0x01,
+  AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_PCM_SAMPLES     = 0x02,
+} audio_cs_as_iso_data_ep_lock_delay_unit_t;
+
+/// Audio Class-Clock Source Attributes UAC2
+typedef enum
+{
+  AUDIO_CLOCK_SOURCE_ATT_EXT_CLK      = 0x00,
+  AUDIO_CLOCK_SOURCE_ATT_INT_FIX_CLK  = 0x01,
+  AUDIO_CLOCK_SOURCE_ATT_INT_VAR_CLK  = 0x02,
+  AUDIO_CLOCK_SOURCE_ATT_INT_PRO_CLK  = 0x03,
+  AUDIO_CLOCK_SOURCE_ATT_CLK_SYC_SOF  = 0x04,
+} audio_clock_source_attribute_t;
+
+/// Audio Class-Clock Source Controls UAC2
+typedef enum
+{
+  AUDIO_CLOCK_SOURCE_CTRL_CLK_FRQ_POS     = 0,
+  AUDIO_CLOCK_SOURCE_CTRL_CLK_VAL_POS     = 2,
+} audio_clock_source_control_pos_t;
+
+/// Audio Class-Clock Selector Controls UAC2
+typedef enum
+{
+  AUDIO_CLOCK_SELECTOR_CTRL_POS   = 0,
+} audio_clock_selector_control_pos_t;
+
+/// Audio Class-Clock Multiplier Controls UAC2
+typedef enum
+{
+  AUDIO_CLOCK_MULTIPLIER_CTRL_NUMERATOR_POS       = 0,
+  AUDIO_CLOCK_MULTIPLIER_CTRL_DENOMINATOR_POS     = 2,
+} audio_clock_multiplier_control_pos_t;
+
+/// Audio Class-Input Terminal Controls UAC2
+typedef enum
+{
+  AUDIO_IN_TERM_CTRL_CPY_PROT_POS     = 0,
+  AUDIO_IN_TERM_CTRL_CONNECTOR_POS    = 2,
+  AUDIO_IN_TERM_CTRL_OVERLOAD_POS     = 4,
+  AUDIO_IN_TERM_CTRL_CLUSTER_POS      = 6,
+  AUDIO_IN_TERM_CTRL_UNDERFLOW_POS    = 8,
+  AUDIO_IN_TERM_CTRL_OVERFLOW_POS     = 10,
+} audio_terminal_input_control_pos_t;
+
+/// Audio Class-Output Terminal Controls UAC2
+typedef enum
+{
+  AUDIO_OUT_TERM_CTRL_CPY_PROT_POS    = 0,
+  AUDIO_OUT_TERM_CTRL_CONNECTOR_POS   = 2,
+  AUDIO_OUT_TERM_CTRL_OVERLOAD_POS    = 4,
+  AUDIO_OUT_TERM_CTRL_UNDERFLOW_POS   = 6,
+  AUDIO_OUT_TERM_CTRL_OVERFLOW_POS    = 8,
+} audio_terminal_output_control_pos_t;
+
+/// Audio Class-Feature Unit Controls UAC2
+typedef enum
+{
+  AUDIO_FEATURE_UNIT_CTRL_MUTE_POS            = 0,
+  AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS          = 2,
+  AUDIO_FEATURE_UNIT_CTRL_BASS_POS            = 4,
+  AUDIO_FEATURE_UNIT_CTRL_MID_POS             = 6,
+  AUDIO_FEATURE_UNIT_CTRL_TREBLE_POS          = 8,
+  AUDIO_FEATURE_UNIT_CTRL_GRAPHIC_EQU_POS     = 10,
+  AUDIO_FEATURE_UNIT_CTRL_AGC_POS             = 12,
+  AUDIO_FEATURE_UNIT_CTRL_DELAY_POS           = 14,
+  AUDIO_FEATURE_UNIT_CTRL_BASS_BOOST_POS      = 16,
+  AUDIO_FEATURE_UNIT_CTRL_LOUDNESS_POS        = 18,
+  AUDIO_FEATURE_UNIT_CTRL_INPUT_GAIN_POS      = 20,
+  AUDIO_FEATURE_UNIT_CTRL_INPUT_GAIN_PAD_POS  = 22,
+  AUDIO_FEATURE_UNIT_CTRL_PHASE_INV_POS       = 24,
+  AUDIO_FEATURE_UNIT_CTRL_UNDERFLOW_POS       = 26,
+  AUDIO_FEATURE_UNIT_CTRL_OVERFLOW_POS        = 28,
+} audio_feature_unit_control_pos_t;
+
+/// Audio Class-Audio Channel Configuration UAC2
+typedef enum
+{
+  AUDIO_CHANNEL_CONFIG_NON_PREDEFINED             = 0x00000000,
+  AUDIO_CHANNEL_CONFIG_FRONT_LEFT                 = 0x00000001,
+  AUDIO_CHANNEL_CONFIG_FRONT_RIGHT                = 0x00000002,
+  AUDIO_CHANNEL_CONFIG_FRONT_CENTER               = 0x00000004,
+  AUDIO_CHANNEL_CONFIG_LOW_FRQ_EFFECTS            = 0x00000008,
+  AUDIO_CHANNEL_CONFIG_BACK_LEFT                  = 0x00000010,
+  AUDIO_CHANNEL_CONFIG_BACK_RIGHT                 = 0x00000020,
+  AUDIO_CHANNEL_CONFIG_FRONT_LEFT_OF_CENTER       = 0x00000040,
+  AUDIO_CHANNEL_CONFIG_FRONT_RIGHT_OF_CENTER      = 0x00000080,
+  AUDIO_CHANNEL_CONFIG_BACK_CENTER                = 0x00000100,
+  AUDIO_CHANNEL_CONFIG_SIDE_LEFT                  = 0x00000200,
+  AUDIO_CHANNEL_CONFIG_SIDE_RIGHT                 = 0x00000400,
+  AUDIO_CHANNEL_CONFIG_TOP_CENTER                 = 0x00000800,
+  AUDIO_CHANNEL_CONFIG_TOP_FRONT_LEFT             = 0x00001000,
+  AUDIO_CHANNEL_CONFIG_TOP_FRONT_CENTER           = 0x00002000,
+  AUDIO_CHANNEL_CONFIG_TOP_FRONT_RIGHT            = 0x00004000,
+  AUDIO_CHANNEL_CONFIG_TOP_BACK_LEFT              = 0x00008000,
+  AUDIO_CHANNEL_CONFIG_TOP_BACK_CENTER            = 0x00010000,
+  AUDIO_CHANNEL_CONFIG_TOP_BACK_RIGHT             = 0x00020000,
+  AUDIO_CHANNEL_CONFIG_TOP_FRONT_LEFT_OF_CENTER   = 0x00040000,
+  AUDIO_CHANNEL_CONFIG_TOP_FRONT_RIGHT_OF_CENTER  = 0x00080000,
+  AUDIO_CHANNEL_CONFIG_LEFT_LOW_FRQ_EFFECTS       = 0x00100000,
+  AUDIO_CHANNEL_CONFIG_RIGHT_LOW_FRQ_EFFECTS      = 0x00200000,
+  AUDIO_CHANNEL_CONFIG_TOP_SIDE_LEFT              = 0x00400000,
+  AUDIO_CHANNEL_CONFIG_TOP_SIDE_RIGHT             = 0x00800000,
+  AUDIO_CHANNEL_CONFIG_BOTTOM_CENTER              = 0x01000000,
+  AUDIO_CHANNEL_CONFIG_BACK_LEFT_OF_CENTER        = 0x02000000,
+  AUDIO_CHANNEL_CONFIG_BACK_RIGHT_OF_CENTER       = 0x04000000,
+  AUDIO_CHANNEL_CONFIG_RAW_DATA                   = 0x80000000,
+} audio_channel_config_t;
+
+/// AUDIO Channel Cluster Descriptor (4.1)
+typedef struct TU_ATTR_PACKED {
+  uint8_t                 bNrChannels;        ///< Number of channels currently connected.
+  audio_channel_config_t  bmChannelConfig;    ///< Bitmap according to 'audio_channel_config_t' with a 1 set if channel is connected and 0 else. In case channels are non-predefined ignore them here (see UAC2 specification 4.1 Audio Channel Cluster Descriptor.
+  uint8_t                 iChannelNames;      ///< Index of a string descriptor, describing the name of the first inserted channel with a non-predefined spatial location.
+} audio_desc_channel_cluster_t;
+
+/// AUDIO Class-Specific AC Interface Header Descriptor (4.7.2)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes: 9.
+  uint8_t bDescriptorType    ; ///< Descriptor Type. Value: TUSB_DESC_CS_INTERFACE.
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType. Value: AUDIO_CS_AC_INTERFACE_HEADER.
+  uint16_t bcdADC            ; ///< Audio Device Class Specification Release Number in Binary-Coded Decimal. Value: U16_TO_U8S_LE(0x0200).
+  uint8_t bCategory          ; ///< Constant, indicating the primary use of this audio function, as intended by the manufacturer. See: audio_function_t.
+  uint16_t wTotalLength      ; ///< Total number of bytes returned for the class-specific AudioControl interface descriptor. Includes the combined length of this descriptor header and all Clock Source, Unit and Terminal descriptors.
+  uint8_t bmControls         ; ///< See: audio_cs_ac_interface_control_pos_t.
+} audio_desc_cs_ac_interface_t;
+
+/// AUDIO Clock Source Descriptor (4.7.2.1)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes: 8.
+  uint8_t bDescriptorType    ; ///< Descriptor Type. Value: TUSB_DESC_CS_INTERFACE.
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType. Value: AUDIO_CS_AC_INTERFACE_CLOCK_SOURCE.
+  uint8_t bClockID           ; ///< Constant uniquely identifying the Clock Source Entity within the audio function. This value is used in all requests to address this Entity.
+  uint8_t bmAttributes       ; ///< See: audio_clock_source_attribute_t.
+  uint8_t bmControls         ; ///< See: audio_clock_source_control_pos_t.
+  uint8_t bAssocTerminal     ; ///< Terminal ID of the Terminal that is associated with this Clock Source.
+  uint8_t iClockSource       ; ///< Index of a string descriptor, describing the Clock Source Entity.
+} audio_desc_clock_source_t;
+
+/// AUDIO Clock Selector Descriptor (4.7.2.2) for ONE pin
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor, in bytes: 7+p.
+  uint8_t bDescriptorType    ; ///< Descriptor Type. Value: TUSB_DESC_CS_INTERFACE.
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType. Value: AUDIO_CS_AC_INTERFACE_CLOCK_SELECTOR.
+  uint8_t bClockID           ; ///< Constant uniquely identifying the Clock Selector Entity within the audio function. This value is used in all requests to address this Entity.
+  uint8_t bNrInPins          ; ///< Number of Input Pins of this Unit: p = 1 thus bNrInPins = 1.
+  uint8_t baCSourceID        ; ///< ID of the Clock Entity to which the first Clock Input Pin of this Clock Selector Entity is connected..
+  uint8_t bmControls         ; ///< See: audio_clock_selector_control_pos_t.
+  uint8_t iClockSource       ; ///< Index of a string descriptor, describing the Clock Selector Entity.
+} audio_desc_clock_selector_t;
+
+/// AUDIO Clock Selector Descriptor (4.7.2.2) for multiple pins
+#define audio_desc_clock_selector_n_t(source_num) \
+    struct TU_ATTR_PACKED {       \
+  uint8_t bLength               ; \
+  uint8_t bDescriptorType       ; \
+  uint8_t bDescriptorSubType    ; \
+  uint8_t bClockID              ; \
+  uint8_t bNrInPins             ; \
+  struct TU_ATTR_PACKED {         \
+    uint8_t baSourceID          ; \
+  } sourceID[source_num]        ; \
+  uint8_t bmControls            ; \
+  uint8_t iClockSource          ; \
+}
+
+/// AUDIO Clock Multiplier Descriptor (4.7.2.3)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor, in bytes: 7.
+  uint8_t bDescriptorType    ; ///< Descriptor Type. Value: TUSB_DESC_CS_INTERFACE.
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType. Value: AUDIO_CS_AC_INTERFACE_CLOCK_MULTIPLIER.
+  uint8_t bClockID           ; ///< Constant uniquely identifying the Clock Multiplier Entity within the audio function. This value is used in all requests to address this Entity.
+  uint8_t bCSourceID         ; ///< ID of the Clock Entity to which the last Clock Input Pin of this Clock Selector Entity is connected.
+  uint8_t bmControls         ; ///< See: audio_clock_multiplier_control_pos_t.
+  uint8_t iClockSource       ; ///< Index of a string descriptor, describing the Clock Multiplier Entity.
+} audio_desc_clock_multiplier_t;
+
+/// AUDIO Input Terminal Descriptor(4.7.2.4)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor, in bytes: 17.
+  uint8_t bDescriptorType    ; ///< Descriptor Type. Value: TUSB_DESC_CS_INTERFACE.
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType. Value: AUDIO_CS_AC_INTERFACE_INPUT_TERMINAL.
+  uint16_t wTerminalType     ; ///< Constant characterizing the type of Terminal. See: audio_terminal_type_t for USB streaming and audio_terminal_input_type_t for other input types.
+  uint8_t bAssocTerminal     ; ///< ID of the Output Terminal to which this Input Terminal is associated.
+  uint8_t bCSourceID         ; ///< ID of the Clock Entity to which this Input Terminal is connected.
+  uint8_t bNrChannels        ; ///< Number of logical output channels in the Terminal’s output audio channel cluster.
+  uint32_t bmChannelConfig   ; ///< Describes the spatial location of the logical channels. See:audio_channel_config_t.
+  uint16_t bmControls        ; ///< See: audio_terminal_input_control_pos_t.
+  uint8_t iTerminal          ; ///< Index of a string descriptor, describing the Input Terminal.
+} audio_desc_input_terminal_t;
+
+/// AUDIO Output Terminal Descriptor(4.7.2.5)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor, in bytes: 12.
+  uint8_t bDescriptorType    ; ///< Descriptor Type. Value: TUSB_DESC_CS_INTERFACE.
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType. Value: AUDIO_CS_AC_INTERFACE_OUTPUT_TERMINAL.
+  uint8_t bTerminalID        ; ///< Constant uniquely identifying the Terminal within the audio function. This value is used in all requests to address this Terminal.
+  uint16_t wTerminalType     ; ///< Constant characterizing the type of Terminal. See: audio_terminal_type_t for USB streaming and audio_terminal_output_type_t for other output types.
+  uint8_t bAssocTerminal     ; ///< Constant, identifying the Input Terminal to which this Output Terminal is associated.
+  uint8_t bSourceID          ; ///< ID of the Unit or Terminal to which this Terminal is connected.
+  uint8_t bCSourceID         ; ///< ID of the Clock Entity to which this Output Terminal is connected.
+  uint16_t bmControls        ; ///< See: audio_terminal_output_type_t.
+  uint8_t iTerminal          ; ///< Index of a string descriptor, describing the Output Terminal.
+} audio_desc_output_terminal_t;
+
+/// AUDIO Feature Unit Descriptor(4.7.2.8) for ONE channel
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor, in bytes: 14.
+  uint8_t bDescriptorType    ; ///< Descriptor Type. Value: TUSB_DESC_CS_INTERFACE.
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType. Value: AUDIO_CS_AC_INTERFACE_FEATURE_UNIT.
+  uint8_t bUnitID            ; ///< Constant uniquely identifying the Unit within the audio function. This value is used in all requests to address this Unit.
+  uint8_t bSourceID          ; ///< ID of the Unit or Terminal to which this Feature Unit is connected.
+  struct TU_ATTR_PACKED {
+    uint32_t bmaControls     ; ///< See: audio_feature_unit_control_pos_t. Controls0 is master channel 0 (always present) and Controls1 is logical channel 1.
+  } controls[2]              ;
+  uint8_t iTerminal          ; ///< Index of a string descriptor, describing this Feature Unit.
+} audio_desc_feature_unit_t;
+
+/// AUDIO Feature Unit Descriptor(4.7.2.8) for multiple channels
+#define audio_desc_feature_unit_n_t(ch_num)\
+    struct TU_ATTR_PACKED {         \
+  uint8_t bLength               ; /* 6+(ch_num+1)*4 */\
+    uint8_t bDescriptorType     ; \
+    uint8_t bDescriptorSubType  ; \
+    uint8_t bUnitID             ; \
+    uint8_t bSourceID           ; \
+    struct TU_ATTR_PACKED {       \
+      uint32_t bmaControls      ; \
+    } controls[ch_num+1]        ; \
+    uint8_t iTerminal           ; \
+}
+
+/// AUDIO Class-Specific AS Interface Descriptor(4.9.2)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor, in bytes: 16.
+  uint8_t bDescriptorType    ; ///< Descriptor Type. Value: TUSB_DESC_CS_INTERFACE.
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType. Value: AUDIO_CS_AS_INTERFACE_AS_GENERAL.
+  uint8_t bTerminalLink      ; ///< The Terminal ID of the Terminal to which this interface is connected.
+  uint8_t bmControls         ; ///< See: audio_cs_as_interface_control_pos_t.
+  uint8_t bFormatType        ; ///< Constant identifying the Format Type the AudioStreaming interface is using. See: audio_format_type_t.
+  uint32_t bmFormats         ; ///< The Audio Data Format(s) that can be used to communicate with this interface.See: audio_data_format_type_I_t.
+  uint8_t bNrChannels        ; ///< Number of physical channels in the AS Interface audio channel cluster.
+  uint32_t bmChannelConfig   ; ///< Describes the spatial location of the physical channels. See: audio_channel_config_t.
+  uint8_t iChannelNames      ; ///< Index of a string descriptor, describing the name of the first physical channel.
+} audio_desc_cs_as_interface_t;
+
+/// AUDIO Type I Format Type Descriptor(2.3.1.6 - Audio Formats)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor, in bytes: 6.
+  uint8_t bDescriptorType    ; ///< Descriptor Type. Value: TUSB_DESC_CS_INTERFACE.
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType. Value: AUDIO_CS_AS_INTERFACE_FORMAT_TYPE.
+  uint8_t bFormatType        ; ///< Constant identifying the Format Type the AudioStreaming interface is using. Value: AUDIO_FORMAT_TYPE_I.
+  uint8_t bSubslotSize       ; ///< The number of bytes occupied by one audio subslot. Can be 1, 2, 3 or 4.
+  uint8_t bBitResolution     ; ///< The number of effectively used bits from the available bits in an audio subslot.
+} audio_desc_type_I_format_t;
+
+/// AUDIO Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor, in bytes: 8.
+  uint8_t bDescriptorType    ; ///< Descriptor Type. Value: TUSB_DESC_CS_ENDPOINT.
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType. Value: AUDIO_CS_EP_SUBTYPE_GENERAL.
+  uint8_t bmAttributes       ; ///< See: audio_cs_as_iso_data_ep_attribute_t.
+  uint8_t bmControls         ; ///< See: audio_cs_as_iso_data_ep_control_pos_t.
+  uint8_t bLockDelayUnits    ; ///< Indicates the units used for the wLockDelay field. See: audio_cs_as_iso_data_ep_lock_delay_unit_t.
+  uint16_t wLockDelay        ; ///< Indicates the time it takes this endpoint to reliably lock its internal clock recovery circuitry. Units used depend on the value of the bLockDelayUnits field.
+} audio_desc_cs_as_iso_data_ep_t;
+
+// 5.2.2 Control Request Layout
+typedef struct TU_ATTR_PACKED
+{
+    union
+    {
+        struct TU_ATTR_PACKED
+        {
+            uint8_t recipient :  5; ///< Recipient type tusb_request_recipient_t.
+            uint8_t type      :  2; ///< Request type tusb_request_type_t.
+            uint8_t direction :  1; ///< Direction type. tusb_dir_t
+        } bmRequestType_bit;
+        
+        uint8_t bmRequestType;
+    };
+    
+    uint8_t bRequest;  ///< Request type audio_cs_req_t
+    uint8_t bChannelNumber;
+    uint8_t bControlSelector;
+    union
+    {
+        uint8_t bInterface;
+        uint8_t bEndpoint;
+    };
+    uint8_t bEntityID;
+    uint16_t wLength;
+} audio_control_request_t;
+
+//// 5.2.3 Control Request Parameter Block Layout
+
+// 5.2.3.1 1-byte Control CUR Parameter Block
+typedef struct TU_ATTR_PACKED
+{
+  int8_t bCur               ;   ///< The setting for the CUR attribute of the addressed Control
+} audio_control_cur_1_t;
+
+// 5.2.3.2 2-byte Control CUR Parameter Block
+typedef struct TU_ATTR_PACKED
+{
+  int16_t bCur              ;   ///< The setting for the CUR attribute of the addressed Control
+} audio_control_cur_2_t;
+
+// 5.2.3.3 4-byte Control CUR Parameter Block
+typedef struct TU_ATTR_PACKED
+{
+  int32_t bCur              ;   ///< The setting for the CUR attribute of the addressed Control
+} audio_control_cur_4_t;
+
+// Use the following ONLY for RECEIVED data - compiler does not know how many subranges are defined! Use the one below for predefined lengths - or if you know what you are doing do what you like
+// 5.2.3.1 1-byte Control RANGE Parameter Block
+typedef struct TU_ATTR_PACKED {
+  uint16_t wNumSubRanges;
+  struct TU_ATTR_PACKED {
+    int8_t bMin             ; /*The setting for the MIN attribute of the nth subrange of the addressed Control*/
+    int8_t bMax             ; /*The setting for the MAX attribute of the nth subrange of the addressed Control*/
+    uint8_t bRes            ; /*The setting for the RES attribute of the nth subrange of the addressed Control*/
+  } subrange[]              ;
+} audio_control_range_1_t;
+
+// 5.2.3.2 2-byte Control RANGE Parameter Block
+typedef struct TU_ATTR_PACKED {
+  uint16_t wNumSubRanges;
+  struct TU_ATTR_PACKED {
+    int16_t bMin            ; /*The setting for the MIN attribute of the nth subrange of the addressed Control*/
+    int16_t bMax            ; /*The setting for the MAX attribute of the nth subrange of the addressed Control*/
+    uint16_t bRes           ; /*The setting for the RES attribute of the nth subrange of the addressed Control*/
+  } subrange[]              ;
+} audio_control_range_2_t;
+
+// 5.2.3.3 4-byte Control RANGE Parameter Block
+typedef struct TU_ATTR_PACKED {
+  uint16_t wNumSubRanges;
+  struct TU_ATTR_PACKED {
+    int32_t bMin            ; /*The setting for the MIN attribute of the nth subrange of the addressed Control*/
+    int32_t bMax            ; /*The setting for the MAX attribute of the nth subrange of the addressed Control*/
+    uint32_t bRes           ; /*The setting for the RES attribute of the nth subrange of the addressed Control*/
+  } subrange[]              ;
+} audio_control_range_4_t;
+
+// 5.2.3.1 1-byte Control RANGE Parameter Block
+#define audio_control_range_1_n_t(numSubRanges) \
+    struct TU_ATTR_PACKED {                     \
+  uint16_t wNumSubRanges;                       \
+  struct TU_ATTR_PACKED {                       \
+      int8_t bMin               ; /*The setting for the MIN attribute of the nth subrange of the addressed Control*/\
+    int8_t bMax                 ; /*The setting for the MAX attribute of the nth subrange of the addressed Control*/\
+    uint8_t bRes                ; /*The setting for the RES attribute of the nth subrange of the addressed Control*/\
+    } subrange[numSubRanges]    ;               \
+}
+
+/// 5.2.3.2 2-byte Control RANGE Parameter Block
+#define audio_control_range_2_n_t(numSubRanges) \
+    struct TU_ATTR_PACKED {                     \
+  uint16_t wNumSubRanges;                       \
+  struct TU_ATTR_PACKED {                       \
+      int16_t bMin          ; /*The setting for the MIN attribute of the nth subrange of the addressed Control*/\
+    int16_t bMax            ; /*The setting for the MAX attribute of the nth subrange of the addressed Control*/\
+    uint16_t bRes           ; /*The setting for the RES attribute of the nth subrange of the addressed Control*/\
+    } subrange[numSubRanges];                   \
+}
+
+// 5.2.3.3 4-byte Control RANGE Parameter Block
+#define audio_control_range_4_n_t(numSubRanges) \
+    struct TU_ATTR_PACKED {                     \
+  uint16_t wNumSubRanges;                       \
+  struct TU_ATTR_PACKED {                       \
+      int32_t bMin          ; /*The setting for the MIN attribute of the nth subrange of the addressed Control*/\
+    int32_t bMax            ; /*The setting for the MAX attribute of the nth subrange of the addressed Control*/\
+    uint32_t bRes           ; /*The setting for the RES attribute of the nth subrange of the addressed Control*/\
+    } subrange[numSubRanges];                   \
+}
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/** @} */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/audio/audio_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/audio/audio_device.h
new file mode 100644
index 00000000000..f406cf28110
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/audio/audio_device.h
@@ -0,0 +1,637 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Ha Thach (tinyusb.org)
+ * Copyright (c) 2020 Reinhard Panhuber
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_AUDIO_DEVICE_H_
+#define _TUSB_AUDIO_DEVICE_H_
+
+#include "audio.h"
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+// All sizes are in bytes!
+
+#ifndef CFG_TUD_AUDIO_FUNC_1_DESC_LEN
+#error You must tell the driver the length of the audio function descriptor including IAD descriptor
+#endif
+#if CFG_TUD_AUDIO > 1
+#ifndef CFG_TUD_AUDIO_FUNC_2_DESC_LEN
+#error You must tell the driver the length of the audio function descriptor including IAD descriptor
+#endif
+#endif
+#if CFG_TUD_AUDIO > 2
+#ifndef CFG_TUD_AUDIO_FUNC_3_DESC_LEN
+#error You must tell the driver the length of the audio function descriptor including IAD descriptor
+#endif
+#endif
+
+// Number of Standard AS Interface Descriptors (4.9.1) defined per audio function - this is required to be able to remember the current alternate settings of these interfaces
+#ifndef CFG_TUD_AUDIO_FUNC_1_N_AS_INT
+#error You must tell the driver the number of Standard AS Interface Descriptors you have defined in the audio function descriptor!
+#endif
+#if CFG_TUD_AUDIO > 1
+#ifndef CFG_TUD_AUDIO_FUNC_2_N_AS_INT
+#error You must tell the driver the number of Standard AS Interface Descriptors you have defined in the audio function descriptor!
+#endif
+#endif
+#if CFG_TUD_AUDIO > 2
+#ifndef CFG_TUD_AUDIO_FUNC_3_N_AS_INT
+#error You must tell the driver the number of Standard AS Interface Descriptors you have defined in the audio function descriptor!
+#endif
+#endif
+
+// Size of control buffer used to receive and send control messages via EP0 - has to be big enough to hold your biggest request structure e.g. range requests with multiple intervals defined or cluster descriptors
+#ifndef CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ
+#error You must define an audio class control request buffer size!
+#endif
+
+#if CFG_TUD_AUDIO > 1
+#ifndef CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ
+#error You must define an audio class control request buffer size!
+#endif
+#endif
+
+#if CFG_TUD_AUDIO > 2
+#ifndef CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ
+#error You must define an audio class control request buffer size!
+#endif
+#endif
+
+// End point sizes IN BYTES - Limits: Full Speed <= 1023, High Speed <= 1024
+#ifndef CFG_TUD_AUDIO_ENABLE_EP_IN
+#define CFG_TUD_AUDIO_ENABLE_EP_IN 0   // TX
+#endif
+
+#ifndef CFG_TUD_AUDIO_ENABLE_EP_OUT
+#define CFG_TUD_AUDIO_ENABLE_EP_OUT 0  // RX
+#endif
+
+// Maximum EP sizes for all alternate AS interface settings - used for checks and buffer allocation
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+#ifndef CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX
+#error You must tell the driver the biggest EP IN size!
+#endif
+#if CFG_TUD_AUDIO > 1
+#ifndef CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX
+#error You must tell the driver the biggest EP IN size!
+#endif
+#endif
+#if CFG_TUD_AUDIO > 2
+#ifndef CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX
+#error You must tell the driver the biggest EP IN size!
+#endif
+#endif
+#endif // CFG_TUD_AUDIO_ENABLE_EP_IN
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+#ifndef CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX
+#error You must tell the driver the biggest EP OUT size!
+#endif
+#if CFG_TUD_AUDIO > 1
+#ifndef CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX
+#error You must tell the driver the biggest EP OUT size!
+#endif
+#endif
+#if CFG_TUD_AUDIO > 2
+#ifndef CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX
+#error You must tell the driver the biggest EP OUT size!
+#endif
+#endif
+#endif // CFG_TUD_AUDIO_ENABLE_EP_OUT
+
+// Software EP FIFO buffer sizes - must be >= max EP SIZEs!
+#ifndef CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ                0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ                0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ                0
+#endif
+
+#ifndef CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ               0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ               0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ               0
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+#if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+
+#if CFG_TUD_AUDIO > 1
+#if CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+#endif
+
+#if CFG_TUD_AUDIO > 2
+#if CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+#endif
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+#if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+
+#if CFG_TUD_AUDIO > 1
+#if CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+#endif
+
+#if CFG_TUD_AUDIO > 2
+#if CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+#endif
+#endif
+
+// Enable/disable feedback EP (required for asynchronous RX applications)
+#ifndef CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP                    0                             // Feedback - 0 or 1
+#endif
+
+// Enable/disable conversion from 16.16 to 10.14 format on full-speed devices. See tud_audio_n_fb_set().
+#ifndef CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION
+#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION     0                             // 0 or 1
+#endif
+
+// Audio interrupt control EP size - disabled if 0
+#ifndef CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN
+#define CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN                     0                             // Audio interrupt control - if required - 6 Bytes according to UAC 2 specification (p. 74)
+#endif
+
+#ifndef CFG_TUD_AUDIO_INT_CTR_EP_IN_SW_BUFFER_SIZE
+#define CFG_TUD_AUDIO_INT_CTR_EP_IN_SW_BUFFER_SIZE          6                             // Buffer size of audio control interrupt EP - 6 Bytes according to UAC 2 specification (p. 74)
+#endif
+
+// Use software encoding/decoding
+
+// The software coding feature of the driver is not mandatory. It is useful if, for instance, you have two I2S streams which need to be interleaved
+// into a single PCM stream as SAMPLE_1 | SAMPLE_2 | SAMPLE_3 | SAMPLE_4.
+//
+// Currently, only PCM type I encoding/decoding is supported!
+//
+// If the coding feature is to be used, support FIFOs need to be configured. Their sizes and numbers are defined below.
+
+// Encoding/decoding is done in software and thus time consuming. If you can encode/decode your stream more efficiently do not use the
+// support FIFOs but write/read directly into/from the EP_X_SW_BUFFER_FIFOs using
+// - tud_audio_n_write() or
+// - tud_audio_n_read().
+// To write/read to/from the support FIFOs use
+// - tud_audio_n_write_support_ff() or
+// - tud_audio_n_read_support_ff().
+//
+// The encoding/decoding format type done is defined below.
+//
+// The encoding/decoding starts when the private callback functions
+// - audio_tx_done_cb()
+// - audio_rx_done_cb()
+// are invoked. If support FIFOs are used, the corresponding encoding/decoding functions are called from there.
+// Once encoding/decoding is done the result is put directly into the EP_X_SW_BUFFER_FIFOs. You can use the public callback functions
+// - tud_audio_tx_done_pre_load_cb() or tud_audio_tx_done_post_load_cb()
+// - tud_audio_rx_done_pre_read_cb() or tud_audio_rx_done_post_read_cb()
+// if you want to get informed what happened.
+//
+// If you don't use the support FIFOs you may use the public callback functions
+// - tud_audio_tx_done_pre_load_cb() or tud_audio_tx_done_post_load_cb()
+// - tud_audio_rx_done_pre_read_cb() or tud_audio_rx_done_post_read_cb()
+// to write/read from/into the EP_X_SW_BUFFER_FIFOs at the right time.
+//
+// If you need a different encoding which is not support so far implement it in the
+// - audio_tx_done_cb()
+// - audio_rx_done_cb()
+// functions.
+
+// Enable encoding/decodings - for these to work, support FIFOs need to be setup in appropriate numbers and size
+// The actual coding parameters of active AS alternate interface is parsed from the descriptors
+
+// The item size of the FIFO is always fixed to one i.e. bytes! Furthermore, the actively used FIFO depth is reconfigured such that the depth is a multiple of the current sample size in order to avoid samples to get split up in case of a wrap in the FIFO ring buffer (depth = (max_depth / sampe_sz) * sampe_sz)!
+// This is important to remind in case you use DMAs! If the sample sizes changes, the DMA MUST BE RECONFIGURED just like the FIFOs for a different depth!!!
+
+// For PCM encoding/decoding
+
+#ifndef CFG_TUD_AUDIO_ENABLE_ENCODING
+#define CFG_TUD_AUDIO_ENABLE_ENCODING                       0
+#endif
+
+#ifndef CFG_TUD_AUDIO_ENABLE_DECODING
+#define CFG_TUD_AUDIO_ENABLE_DECODING                       0
+#endif
+
+// This enabling allows to save the current coding parameters e.g. # of bytes per sample etc. - TYPE_I includes common PCM encoding
+#ifndef CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
+#define CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING                0
+#endif
+
+#ifndef CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING
+#define CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING                0
+#endif
+
+// Type I Coding parameters not given within UAC2 descriptors
+// It would be possible to allow for a more flexible setting and not fix this parameter as done below. However, this is most often not needed and kept for later if really necessary. The more flexible setting could be implemented within set_interface(), however, how the values are saved per alternate setting is to be determined!
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING && CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
+#ifndef CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX
+#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
+#endif
+#if CFG_TUD_AUDIO > 1
+#ifndef CFG_TUD_AUDIO_FUNC_2_CHANNEL_PER_FIFO_TX
+#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
+#endif
+#endif
+#if CFG_TUD_AUDIO > 2
+#ifndef CFG_TUD_AUDIO_FUNC_3_CHANNEL_PER_FIFO_TX
+#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
+#endif
+#endif
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING && CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING
+#ifndef CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_RX
+#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
+#endif
+#if CFG_TUD_AUDIO > 1
+#ifndef CFG_TUD_AUDIO_FUNC_2_CHANNEL_PER_FIFO_RX
+#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
+#endif
+#endif
+#if CFG_TUD_AUDIO > 2
+#ifndef CFG_TUD_AUDIO_FUNC_3_CHANNEL_PER_FIFO_RX
+#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
+#endif
+#endif
+#endif
+
+// Remaining types not support so far
+
+// Number of support FIFOs to set up - multiple channels can be handled by one FIFO - very common is two channels per FIFO stemming from one I2S interface
+#ifndef CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO
+#define CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO              0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO
+#define CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO              0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO
+#define CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO              0
+#endif
+
+#ifndef CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO
+#define CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO              0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO
+#define CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO              0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO
+#define CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO              0
+#endif
+
+// Size of support FIFOs IN BYTES - if size > 0 there are as many FIFOs set up as CFG_TUD_AUDIO_FUNC_X_N_TX_SUPP_SW_FIFO and CFG_TUD_AUDIO_FUNC_X_N_RX_SUPP_SW_FIFO
+#ifndef CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ
+#define CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ             0         // FIFO size - minimum size: ceil(f_s/1000) * max(# of TX channels) / (# of TX support FIFOs) * max(# of bytes per sample)
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ
+#define CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ             0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ
+#define CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ             0
+#endif
+
+#ifndef CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ
+#define CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ             0         // FIFO size - minimum size: ceil(f_s/1000) * max(# of RX channels) / (# of RX support FIFOs) * max(# of bytes per sample)
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ
+#define CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ             0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ
+#define CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ             0
+#endif
+
+//static_assert(sizeof(tud_audio_desc_lengths) != CFG_TUD_AUDIO, "Supply audio function descriptor pack length!");
+
+// Supported types of this driver:
+// AUDIO_DATA_FORMAT_TYPE_I_PCM     -   Required definitions: CFG_TUD_AUDIO_N_CHANNELS and CFG_TUD_AUDIO_BYTES_PER_CHANNEL
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \addtogroup AUDIO_Serial Serial
+ *  @{
+ *  \defgroup   AUDIO_Serial_Device Device
+ *  @{ */
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Interfaces)
+// CFG_TUD_AUDIO > 1
+//--------------------------------------------------------------------+
+bool     tud_audio_n_mounted    (uint8_t func_id);
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
+uint16_t tud_audio_n_available                    (uint8_t func_id);
+uint16_t tud_audio_n_read                         (uint8_t func_id, void* buffer, uint16_t bufsize);
+bool     tud_audio_n_clear_ep_out_ff              (uint8_t func_id);                          // Delete all content in the EP OUT FIFO
+tu_fifo_t*   tud_audio_n_get_ep_out_ff            (uint8_t func_id);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
+bool     tud_audio_n_clear_rx_support_ff          (uint8_t func_id, uint8_t ff_idx);       // Delete all content in the support RX FIFOs
+uint16_t tud_audio_n_available_support_ff         (uint8_t func_id, uint8_t ff_idx);
+uint16_t tud_audio_n_read_support_ff              (uint8_t func_id, uint8_t ff_idx, void* buffer, uint16_t bufsize);
+tu_fifo_t* tud_audio_n_get_rx_support_ff          (uint8_t func_id, uint8_t ff_idx);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
+uint16_t tud_audio_n_write                        (uint8_t func_id, const void * data, uint16_t len);
+bool     tud_audio_n_clear_ep_in_ff               (uint8_t func_id);                          // Delete all content in the EP IN FIFO
+tu_fifo_t*   tud_audio_n_get_ep_in_ff             (uint8_t func_id);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
+uint16_t tud_audio_n_flush_tx_support_ff          (uint8_t func_id);      // Force all content in the support TX FIFOs to be written into EP SW FIFO
+bool     tud_audio_n_clear_tx_support_ff          (uint8_t func_id, uint8_t ff_idx);
+uint16_t tud_audio_n_write_support_ff             (uint8_t func_id, uint8_t ff_idx, const void * data, uint16_t len);
+tu_fifo_t* tud_audio_n_get_tx_support_ff          (uint8_t func_id, uint8_t ff_idx);
+#endif
+
+#if CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN
+uint16_t    tud_audio_int_ctr_n_write             (uint8_t func_id, uint8_t const* buffer, uint16_t len);
+#endif
+
+//--------------------------------------------------------------------+
+// Application API (Interface0)
+//--------------------------------------------------------------------+
+
+static inline bool         tud_audio_mounted                (void);
+
+// RX API
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
+static inline uint16_t     tud_audio_available              (void);
+static inline bool         tud_audio_clear_ep_out_ff        (void);                       // Delete all content in the EP OUT FIFO
+static inline uint16_t     tud_audio_read                   (void* buffer, uint16_t bufsize);
+static inline tu_fifo_t*   tud_audio_get_ep_out_ff          (void);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
+static inline bool     tud_audio_clear_rx_support_ff        (uint8_t ff_idx);
+static inline uint16_t tud_audio_available_support_ff       (uint8_t ff_idx);
+static inline uint16_t tud_audio_read_support_ff            (uint8_t ff_idx, void* buffer, uint16_t bufsize);
+static inline tu_fifo_t* tud_audio_get_rx_support_ff        (uint8_t ff_idx);
+#endif
+
+// TX API
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
+static inline uint16_t tud_audio_write                      (const void * data, uint16_t len);
+static inline bool 	   tud_audio_clear_ep_in_ff             (void);
+static inline tu_fifo_t* tud_audio_get_ep_in_ff             (void);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
+static inline uint16_t tud_audio_flush_tx_support_ff        (void);
+static inline uint16_t tud_audio_clear_tx_support_ff        (uint8_t ff_idx);
+static inline uint16_t tud_audio_write_support_ff           (uint8_t ff_idx, const void * data, uint16_t len);
+static inline tu_fifo_t* tud_audio_get_tx_support_ff        (uint8_t ff_idx);
+#endif
+
+// INT CTR API
+
+#if CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN
+static inline uint16_t tud_audio_int_ctr_write              (uint8_t const* buffer, uint16_t len);
+#endif
+
+// Buffer control EP data and schedule a transmit
+// This function is intended to be used if you do not have a persistent buffer or memory location available (e.g. non-local variables) and need to answer onto a
+// get request. This function buffers your answer request frame into the control buffer of the corresponding audio driver and schedules a transmit for sending it.
+// Since transmission is triggered via interrupts, a persistent memory location is required onto which the buffer pointer in pointing. If you already have such
+// available you may directly use 'tud_control_xfer(...)'. In this case data does not need to be copied into an additional buffer and you save some time.
+// If the request's wLength is zero, a status packet is sent instead.
+bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_request_t const * p_request, void* data, uint16_t len);
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+TU_ATTR_WEAK bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t func_id, uint8_t ep_in, uint8_t cur_alt_setting);
+TU_ATTR_WEAK bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uint8_t func_id, uint8_t ep_in, uint8_t cur_alt_setting);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+TU_ATTR_WEAK bool tud_audio_rx_done_pre_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting);
+TU_ATTR_WEAK bool tud_audio_rx_done_post_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+TU_ATTR_WEAK bool tud_audio_fb_done_cb(uint8_t rhport);
+
+// This function is used to provide data rate feedback from an asynchronous sink. Feedback value will be sent at FB endpoint interval till it's changed.
+//
+// The feedback format is specified to be 16.16 for HS and 10.14 for FS devices (see Universal Serial Bus Specification Revision 2.0 5.12.4.2). By default,
+// the choice of format is left to the caller and feedback argument is sent as-is. If CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION is set, then tinyusb
+// expects 16.16 format and handles the conversion to 10.14 on FS.
+//
+// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the 
+// driver can work with either format. So a good compromise is to keep format correction disabled and stick to 16.16 format.
+bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback);
+static inline bool tud_audio_fb_set(uint32_t feedback);
+#endif
+
+#if CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN
+TU_ATTR_WEAK bool tud_audio_int_ctr_done_cb(uint8_t rhport, uint16_t n_bytes_copied);
+#endif
+
+// Invoked when audio set interface request received
+TU_ATTR_WEAK bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+
+// Invoked when audio set interface request received which closes an EP
+TU_ATTR_WEAK bool tud_audio_set_itf_close_EP_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+
+// Invoked when audio class specific set request received for an EP
+TU_ATTR_WEAK bool tud_audio_set_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
+
+// Invoked when audio class specific set request received for an interface
+TU_ATTR_WEAK bool tud_audio_set_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
+
+// Invoked when audio class specific set request received for an entity
+TU_ATTR_WEAK bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
+
+// Invoked when audio class specific get request received for an EP
+TU_ATTR_WEAK bool tud_audio_get_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+
+// Invoked when audio class specific get request received for an interface
+TU_ATTR_WEAK bool tud_audio_get_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+
+// Invoked when audio class specific get request received for an entity
+TU_ATTR_WEAK bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+
+//--------------------------------------------------------------------+
+// Inline Functions
+//--------------------------------------------------------------------+
+
+static inline bool tud_audio_mounted(void)
+{
+  return tud_audio_n_mounted(0);
+}
+
+// RX API
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
+
+static inline uint16_t tud_audio_available(void)
+{
+  return tud_audio_n_available(0);
+}
+
+static inline uint16_t tud_audio_read(void* buffer, uint16_t bufsize)
+{
+  return tud_audio_n_read(0, buffer, bufsize);
+}
+
+static inline bool tud_audio_clear_ep_out_ff(void)
+{
+  return tud_audio_n_clear_ep_out_ff(0);
+}
+
+static inline tu_fifo_t* tud_audio_get_ep_out_ff(void)
+{
+  return tud_audio_n_get_ep_out_ff(0);
+}
+
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
+
+static inline bool tud_audio_clear_rx_support_ff(uint8_t ff_idx)
+{
+  return tud_audio_n_clear_rx_support_ff(0, ff_idx);
+}
+
+static inline uint16_t tud_audio_available_support_ff(uint8_t ff_idx)
+{
+  return tud_audio_n_available_support_ff(0, ff_idx);
+}
+
+static inline uint16_t tud_audio_read_support_ff(uint8_t ff_idx, void* buffer, uint16_t bufsize)
+{
+  return tud_audio_n_read_support_ff(0, ff_idx, buffer, bufsize);
+}
+
+static inline tu_fifo_t* tud_audio_get_rx_support_ff(uint8_t ff_idx)
+{
+  return tud_audio_n_get_rx_support_ff(0, ff_idx);
+}
+
+#endif
+
+// TX API
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
+
+static inline uint16_t tud_audio_write(const void * data, uint16_t len)
+{
+  return tud_audio_n_write(0, data, len);
+}
+
+static inline bool tud_audio_clear_ep_in_ff(void)
+{
+  return tud_audio_n_clear_ep_in_ff(0);
+}
+
+static inline tu_fifo_t* tud_audio_get_ep_in_ff(void)
+{
+  return tud_audio_n_get_ep_in_ff(0);
+}
+
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
+
+static inline uint16_t tud_audio_flush_tx_support_ff(void)
+{
+  return tud_audio_n_flush_tx_support_ff(0);
+}
+
+static inline uint16_t tud_audio_clear_tx_support_ff(uint8_t ff_idx)
+{
+  return tud_audio_n_clear_tx_support_ff(0, ff_idx);
+}
+
+static inline uint16_t tud_audio_write_support_ff(uint8_t ff_idx, const void * data, uint16_t len)
+{
+  return tud_audio_n_write_support_ff(0, ff_idx, data, len);
+}
+
+static inline tu_fifo_t* tud_audio_get_tx_support_ff(uint8_t ff_idx)
+{
+  return tud_audio_n_get_tx_support_ff(0, ff_idx);
+}
+
+#endif
+
+#if CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN
+static inline uint16_t tud_audio_int_ctr_write(uint8_t const* buffer, uint16_t len)
+{
+  return tud_audio_int_ctr_n_write(0, buffer, len);
+}
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+static inline bool tud_audio_fb_set(uint32_t feedback)
+{
+  return tud_audio_n_fb_set(0, feedback);
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     audiod_init           (void);
+void     audiod_reset          (uint8_t rhport);
+uint16_t audiod_open           (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     audiod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool     audiod_xfer_cb        (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TUSB_AUDIO_DEVICE_H_ */
+
+/** @} */
+/** @} */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/bth/bth_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/bth/bth_device.h
new file mode 100755
index 00000000000..1b90d09155f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/bth/bth_device.h
@@ -0,0 +1,109 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jerzy Kasenberg
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_BTH_DEVICE_H_
+#define _TUSB_BTH_DEVICE_H_
+
+#include <common/tusb_common.h>
+#include <device/usbd.h>
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+#ifndef CFG_TUD_BTH_EVENT_EPSIZE
+#define CFG_TUD_BTH_EVENT_EPSIZE     16
+#endif
+#ifndef CFG_TUD_BTH_DATA_EPSIZE
+#define CFG_TUD_BTH_DATA_EPSIZE      64
+#endif
+
+typedef struct TU_ATTR_PACKED
+{
+  uint16_t op_code;
+  uint8_t param_length;
+  uint8_t param[255];
+} bt_hci_cmd_t;
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when HCI command was received over USB from Bluetooth host.
+// Detailed format is described in Bluetooth core specification Vol 2,
+// Part E, 5.4.1.
+// Length of the command is from 3 bytes (2 bytes for OpCode,
+// 1 byte for parameter total length) to 258.
+TU_ATTR_WEAK void tud_bt_hci_cmd_cb(void *hci_cmd, size_t cmd_len);
+
+// Invoked when ACL data was received over USB from Bluetooth host.
+// Detailed format is described in Bluetooth core specification Vol 2,
+// Part E, 5.4.2.
+// Length is from 4 bytes, (12 bits for Handle, 4 bits for flags
+// and 16 bits for data total length) to endpoint size.
+TU_ATTR_WEAK void tud_bt_acl_data_received_cb(void *acl_data, uint16_t data_len);
+
+// Called when event sent with tud_bt_event_send() was delivered to BT stack.
+// Controller can release/reuse buffer with Event packet at this point.
+TU_ATTR_WEAK void tud_bt_event_sent_cb(uint16_t sent_bytes);
+
+// Called when ACL data that was sent with tud_bt_acl_data_send()
+// was delivered to BT stack.
+// Controller can release/reuse buffer with ACL packet at this point.
+TU_ATTR_WEAK void tud_bt_acl_data_sent_cb(uint16_t sent_bytes);
+
+// Bluetooth controller calls this function when it wants to send even packet
+// as described in Bluetooth core specification Vol 2, Part E, 5.4.4.
+// Event has at least 2 bytes, first is Event code second contains parameter
+// total length. Controller can release/reuse event memory after
+// tud_bt_event_sent_cb() is called.
+bool tud_bt_event_send(void *event, uint16_t event_len);
+
+// Bluetooth controller calls this to send ACL data packet
+// as described in Bluetooth core specification Vol 2, Part E, 5.4.2
+// Minimum length is 4 bytes, (12 bits for Handle, 4 bits for flags
+// and 16 bits for data total length). Upper limit is not limited
+// to endpoint size since buffer is allocate by controller
+// and must not be reused till tud_bt_acl_data_sent_cb() is called.
+bool tud_bt_acl_data_send(void *acl_data, uint16_t data_len);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     btd_init            (void);
+void     btd_reset           (uint8_t rhport);
+uint16_t btd_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     btd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const *request);
+bool     btd_xfer_cb         (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_BTH_DEVICE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc.h
new file mode 100644
index 00000000000..e345139eab0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc.h
@@ -0,0 +1,409 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/** \ingroup group_class
+ *  \defgroup ClassDriver_CDC Communication Device Class (CDC)
+ *            Currently only Abstract Control Model subclass is supported
+ *  @{ */
+
+#ifndef _TUSB_CDC_H__
+#define _TUSB_CDC_H__
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** \defgroup ClassDriver_CDC_Common Common Definitions
+ *  @{ */
+
+// TODO remove
+/// CDC Pipe ID, used to indicate which pipe the API is addressing to (Notification, Out, In)
+typedef enum
+{
+  CDC_PIPE_NOTIFICATION , ///< Notification pipe
+  CDC_PIPE_DATA_IN      , ///< Data in pipe
+  CDC_PIPE_DATA_OUT     , ///< Data out pipe
+  CDC_PIPE_ERROR        , ///< Invalid Pipe ID
+}cdc_pipeid_t;
+
+//--------------------------------------------------------------------+
+// CDC Communication Interface Class
+//--------------------------------------------------------------------+
+
+/// Communication Interface Subclass Codes
+typedef enum
+{
+  CDC_COMM_SUBCLASS_DIRECT_LINE_CONTROL_MODEL      = 0x01 , ///< Direct Line Control Model         [USBPSTN1.2]
+  CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL         = 0x02 , ///< Abstract Control Model            [USBPSTN1.2]
+  CDC_COMM_SUBCLASS_TELEPHONE_CONTROL_MODEL        = 0x03 , ///< Telephone Control Model           [USBPSTN1.2]
+  CDC_COMM_SUBCLASS_MULTICHANNEL_CONTROL_MODEL     = 0x04 , ///< Multi-Channel Control Model       [USBISDN1.2]
+  CDC_COMM_SUBCLASS_CAPI_CONTROL_MODEL             = 0x05 , ///< CAPI Control Model                [USBISDN1.2]
+  CDC_COMM_SUBCLASS_ETHERNET_CONTROL_MODEL         = 0x06 , ///< Ethernet Networking Control Model [USBECM1.2]
+  CDC_COMM_SUBCLASS_ATM_NETWORKING_CONTROL_MODEL   = 0x07 , ///< ATM Networking Control Model      [USBATM1.2]
+  CDC_COMM_SUBCLASS_WIRELESS_HANDSET_CONTROL_MODEL = 0x08 , ///< Wireless Handset Control Model    [USBWMC1.1]
+  CDC_COMM_SUBCLASS_DEVICE_MANAGEMENT              = 0x09 , ///< Device Management                 [USBWMC1.1]
+  CDC_COMM_SUBCLASS_MOBILE_DIRECT_LINE_MODEL       = 0x0A , ///< Mobile Direct Line Model          [USBWMC1.1]
+  CDC_COMM_SUBCLASS_OBEX                           = 0x0B , ///< OBEX                              [USBWMC1.1]
+  CDC_COMM_SUBCLASS_ETHERNET_EMULATION_MODEL       = 0x0C , ///< Ethernet Emulation Model          [USBEEM1.0]
+  CDC_COMM_SUBCLASS_NETWORK_CONTROL_MODEL          = 0x0D   ///< Network Control Model             [USBNCM1.0]
+} cdc_comm_sublcass_type_t;
+
+/// Communication Interface Protocol Codes
+typedef enum
+{
+  CDC_COMM_PROTOCOL_NONE                          = 0x00 , ///< No specific protocol
+  CDC_COMM_PROTOCOL_ATCOMMAND                     = 0x01 , ///< AT Commands: V.250 etc
+  CDC_COMM_PROTOCOL_ATCOMMAND_PCCA_101            = 0x02 , ///< AT Commands defined by PCCA-101
+  CDC_COMM_PROTOCOL_ATCOMMAND_PCCA_101_AND_ANNEXO = 0x03 , ///< AT Commands defined by PCCA-101 & Annex O
+  CDC_COMM_PROTOCOL_ATCOMMAND_GSM_707             = 0x04 , ///< AT Commands defined by GSM 07.07
+  CDC_COMM_PROTOCOL_ATCOMMAND_3GPP_27007          = 0x05 , ///< AT Commands defined by 3GPP 27.007
+  CDC_COMM_PROTOCOL_ATCOMMAND_CDMA                = 0x06 , ///< AT Commands defined by TIA for CDMA
+  CDC_COMM_PROTOCOL_ETHERNET_EMULATION_MODEL      = 0x07   ///< Ethernet Emulation Model
+} cdc_comm_protocol_type_t;
+
+//------------- SubType Descriptor in COMM Functional Descriptor -------------//
+/// Communication Interface SubType Descriptor
+typedef enum
+{
+  CDC_FUNC_DESC_HEADER                                           = 0x00 , ///< Header Functional Descriptor, which marks the beginning of the concatenated set of functional descriptors for the interface.
+  CDC_FUNC_DESC_CALL_MANAGEMENT                                  = 0x01 , ///< Call Management Functional Descriptor.
+  CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT                      = 0x02 , ///< Abstract Control Management Functional Descriptor.
+  CDC_FUNC_DESC_DIRECT_LINE_MANAGEMENT                           = 0x03 , ///< Direct Line Management Functional Descriptor.
+  CDC_FUNC_DESC_TELEPHONE_RINGER                                 = 0x04 , ///< Telephone Ringer Functional Descriptor.
+  CDC_FUNC_DESC_TELEPHONE_CALL_AND_LINE_STATE_REPORTING_CAPACITY = 0x05 , ///< Telephone Call and Line State Reporting Capabilities Functional Descriptor.
+  CDC_FUNC_DESC_UNION                                            = 0x06 , ///< Union Functional Descriptor
+  CDC_FUNC_DESC_COUNTRY_SELECTION                                = 0x07 , ///< Country Selection Functional Descriptor
+  CDC_FUNC_DESC_TELEPHONE_OPERATIONAL_MODES                      = 0x08 , ///< Telephone Operational ModesFunctional Descriptor
+  CDC_FUNC_DESC_USB_TERMINAL                                     = 0x09 , ///< USB Terminal Functional Descriptor
+  CDC_FUNC_DESC_NETWORK_CHANNEL_TERMINAL                         = 0x0A , ///< Network Channel Terminal Descriptor
+  CDC_FUNC_DESC_PROTOCOL_UNIT                                    = 0x0B , ///< Protocol Unit Functional Descriptor
+  CDC_FUNC_DESC_EXTENSION_UNIT                                   = 0x0C , ///< Extension Unit Functional Descriptor
+  CDC_FUNC_DESC_MULTICHANEL_MANAGEMENT                           = 0x0D , ///< Multi-Channel Management Functional Descriptor
+  CDC_FUNC_DESC_CAPI_CONTROL_MANAGEMENT                          = 0x0E , ///< CAPI Control Management Functional Descriptor
+  CDC_FUNC_DESC_ETHERNET_NETWORKING                              = 0x0F , ///< Ethernet Networking Functional Descriptor
+  CDC_FUNC_DESC_ATM_NETWORKING                                   = 0x10 , ///< ATM Networking Functional Descriptor
+  CDC_FUNC_DESC_WIRELESS_HANDSET_CONTROL_MODEL                   = 0x11 , ///< Wireless Handset Control Model Functional Descriptor
+  CDC_FUNC_DESC_MOBILE_DIRECT_LINE_MODEL                         = 0x12 , ///< Mobile Direct Line Model Functional Descriptor
+  CDC_FUNC_DESC_MOBILE_DIRECT_LINE_MODEL_DETAIL                  = 0x13 , ///< MDLM Detail Functional Descriptor
+  CDC_FUNC_DESC_DEVICE_MANAGEMENT_MODEL                          = 0x14 , ///< Device Management Model Functional Descriptor
+  CDC_FUNC_DESC_OBEX                                             = 0x15 , ///< OBEX Functional Descriptor
+  CDC_FUNC_DESC_COMMAND_SET                                      = 0x16 , ///< Command Set Functional Descriptor
+  CDC_FUNC_DESC_COMMAND_SET_DETAIL                               = 0x17 , ///< Command Set Detail Functional Descriptor
+  CDC_FUNC_DESC_TELEPHONE_CONTROL_MODEL                          = 0x18 , ///< Telephone Control Model Functional Descriptor
+  CDC_FUNC_DESC_OBEX_SERVICE_IDENTIFIER                          = 0x19 , ///< OBEX Service Identifier Functional Descriptor
+  CDC_FUNC_DESC_NCM                                              = 0x1A , ///< NCM Functional Descriptor
+}cdc_func_desc_type_t;
+
+//--------------------------------------------------------------------+
+// CDC Data Interface Class
+//--------------------------------------------------------------------+
+
+// SUBCLASS code of Data Interface is not used and should/must be zero
+
+// Data Interface Protocol Codes
+typedef enum{
+  CDC_DATA_PROTOCOL_ISDN_BRI                               = 0x30, ///< Physical interface protocol for ISDN BRI
+  CDC_DATA_PROTOCOL_HDLC                                   = 0x31, ///< HDLC
+  CDC_DATA_PROTOCOL_TRANSPARENT                            = 0x32, ///< Transparent
+  CDC_DATA_PROTOCOL_Q921_MANAGEMENT                        = 0x50, ///< Management protocol for Q.921 data link protocol
+  CDC_DATA_PROTOCOL_Q921_DATA_LINK                         = 0x51, ///< Data link protocol for Q.931
+  CDC_DATA_PROTOCOL_Q921_TEI_MULTIPLEXOR                   = 0x52, ///< TEI-multiplexor for Q.921 data link protocol
+  CDC_DATA_PROTOCOL_V42BIS_DATA_COMPRESSION                = 0x90, ///< Data compression procedures
+  CDC_DATA_PROTOCOL_EURO_ISDN                              = 0x91, ///< Euro-ISDN protocol control
+  CDC_DATA_PROTOCOL_V24_RATE_ADAPTION_TO_ISDN              = 0x92, ///< V.24 rate adaptation to ISDN
+  CDC_DATA_PROTOCOL_CAPI_COMMAND                           = 0x93, ///< CAPI Commands
+  CDC_DATA_PROTOCOL_HOST_BASED_DRIVER                      = 0xFD, ///< Host based driver. Note: This protocol code should only be used in messages between host and device to identify the host driver portion of a protocol stack.
+  CDC_DATA_PROTOCOL_IN_PROTOCOL_UNIT_FUNCTIONAL_DESCRIPTOR = 0xFE  ///< The protocol(s) are described using a ProtocolUnit Functional Descriptors on Communications Class Interface
+}cdc_data_protocol_type_t;
+
+//--------------------------------------------------------------------+
+// Management Element Request (Control Endpoint)
+//--------------------------------------------------------------------+
+
+/// Communication Interface Management Element Request Codes
+typedef enum
+{
+  CDC_REQUEST_SEND_ENCAPSULATED_COMMAND                    = 0x00, ///< is used to issue a command in the format of the supported control protocol of the Communications Class interface
+  CDC_REQUEST_GET_ENCAPSULATED_RESPONSE                    = 0x01, ///< is used to request a response in the format of the supported control protocol of the Communications Class interface.
+  CDC_REQUEST_SET_COMM_FEATURE                             = 0x02,
+  CDC_REQUEST_GET_COMM_FEATURE                             = 0x03,
+  CDC_REQUEST_CLEAR_COMM_FEATURE                           = 0x04,
+
+  CDC_REQUEST_SET_AUX_LINE_STATE                           = 0x10,
+  CDC_REQUEST_SET_HOOK_STATE                               = 0x11,
+  CDC_REQUEST_PULSE_SETUP                                  = 0x12,
+  CDC_REQUEST_SEND_PULSE                                   = 0x13,
+  CDC_REQUEST_SET_PULSE_TIME                               = 0x14,
+  CDC_REQUEST_RING_AUX_JACK                                = 0x15,
+
+  CDC_REQUEST_SET_LINE_CODING                              = 0x20,
+  CDC_REQUEST_GET_LINE_CODING                              = 0x21,
+  CDC_REQUEST_SET_CONTROL_LINE_STATE                       = 0x22,
+  CDC_REQUEST_SEND_BREAK                                   = 0x23,
+
+  CDC_REQUEST_SET_RINGER_PARMS                             = 0x30,
+  CDC_REQUEST_GET_RINGER_PARMS                             = 0x31,
+  CDC_REQUEST_SET_OPERATION_PARMS                          = 0x32,
+  CDC_REQUEST_GET_OPERATION_PARMS                          = 0x33,
+  CDC_REQUEST_SET_LINE_PARMS                               = 0x34,
+  CDC_REQUEST_GET_LINE_PARMS                               = 0x35,
+  CDC_REQUEST_DIAL_DIGITS                                  = 0x36,
+  CDC_REQUEST_SET_UNIT_PARAMETER                           = 0x37,
+  CDC_REQUEST_GET_UNIT_PARAMETER                           = 0x38,
+  CDC_REQUEST_CLEAR_UNIT_PARAMETER                         = 0x39,
+  CDC_REQUEST_GET_PROFILE                                  = 0x3A,
+
+  CDC_REQUEST_SET_ETHERNET_MULTICAST_FILTERS               = 0x40,
+  CDC_REQUEST_SET_ETHERNET_POWER_MANAGEMENT_PATTERN_FILTER = 0x41,
+  CDC_REQUEST_GET_ETHERNET_POWER_MANAGEMENT_PATTERN_FILTER = 0x42,
+  CDC_REQUEST_SET_ETHERNET_PACKET_FILTER                   = 0x43,
+  CDC_REQUEST_GET_ETHERNET_STATISTIC                       = 0x44,
+
+  CDC_REQUEST_SET_ATM_DATA_FORMAT                          = 0x50,
+  CDC_REQUEST_GET_ATM_DEVICE_STATISTICS                    = 0x51,
+  CDC_REQUEST_SET_ATM_DEFAULT_VC                           = 0x52,
+  CDC_REQUEST_GET_ATM_VC_STATISTICS                        = 0x53,
+
+  CDC_REQUEST_MDLM_SEMANTIC_MODEL                          = 0x60,
+}cdc_management_request_t;
+
+//--------------------------------------------------------------------+
+// Management Elemenent Notification (Notification Endpoint)
+//--------------------------------------------------------------------+
+
+/// 6.3 Notification Codes
+typedef enum
+{
+  CDC_NOTIF_NETWORK_CONNECTION               = 0x00, ///< This notification allows the device to notify the host about network connection status.
+  CDC_NOTIF_RESPONSE_AVAILABLE               = 0x01, ///< This notification allows the device to notify the hostthat a response is available. This response can be retrieved with a subsequent \ref CDC_REQUEST_GET_ENCAPSULATED_RESPONSE request.
+  CDC_NOTIF_AUX_JACK_HOOK_STATE              = 0x08,
+  CDC_NOTIF_RING_DETECT                      = 0x09,
+  CDC_NOTIF_SERIAL_STATE                     = 0x20,
+  CDC_NOTIF_CALL_STATE_CHANGE                = 0x28,
+  CDC_NOTIF_LINE_STATE_CHANGE                = 0x29,
+  CDC_NOTIF_CONNECTION_SPEED_CHANGE          = 0x2A, ///< This notification allows the device to inform the host-networking driver that a change in either the upstream or the downstream bit rate of the connection has occurred
+  CDC_NOTIF_MDLM_SEMANTIC_MODEL_NOTIFICATION = 0x40,
+}cdc_notification_request_t;
+
+//--------------------------------------------------------------------+
+// Class Specific Functional Descriptor (Communication Interface)
+//--------------------------------------------------------------------+
+
+// Start of all packed definitions for compiler without per-type packed
+TU_ATTR_PACKED_BEGIN
+TU_ATTR_BIT_FIELD_ORDER_BEGIN
+
+/// Header Functional Descriptor (Communication Interface)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUNC_DESC_
+  uint16_t bcdCDC            ; ///< CDC release number in Binary-Coded Decimal
+}cdc_desc_func_header_t;
+
+/// Union Functional Descriptor (Communication Interface)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength                  ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType          ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType       ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  uint8_t bControlInterface        ; ///< Interface number of Communication Interface
+  uint8_t bSubordinateInterface    ; ///< Array of Interface number of Data Interface
+}cdc_desc_func_union_t;
+
+#define cdc_desc_func_union_n_t(no_slave)\
+ struct TU_ATTR_PACKED {                   \
+  uint8_t bLength                         ;\
+  uint8_t bDescriptorType                 ;\
+  uint8_t bDescriptorSubType              ;\
+  uint8_t bControlInterface               ;\
+  uint8_t bSubordinateInterface[no_slave] ;\
+}
+
+/// Country Selection Functional Descriptor (Communication Interface)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength             ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType     ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType  ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  uint8_t iCountryCodeRelDate ; ///< Index of a string giving the release date for the implemented ISO 3166 Country Codes.
+  uint16_t wCountryCode       ; ///< Country code in the format as defined in [ISO3166], release date as specified inoffset 3 for the first supported country.
+}cdc_desc_func_country_selection_t;
+
+#define cdc_desc_func_country_selection_n_t(no_country) \
+  struct TU_ATTR_PACKED {            \
+  uint8_t bLength                   ;\
+  uint8_t bDescriptorType           ;\
+  uint8_t bDescriptorSubType        ;\
+  uint8_t iCountryCodeRelDate       ;\
+  uint16_t wCountryCode[no_country] ;\
+}
+
+//--------------------------------------------------------------------+
+// PUBLIC SWITCHED TELEPHONE NETWORK (PSTN) SUBCLASS
+//--------------------------------------------------------------------+
+
+/// \brief Call Management Functional Descriptor
+/// \details This functional descriptor describes the processing of calls for the Communications Class interface.
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+
+  struct {
+    uint8_t handle_call    : 1; ///< 0 - Device sends/receives call management information only over the Communications Class interface. 1 - Device can send/receive call management information over a Data Class interface.
+    uint8_t send_recv_call : 1; ///< 0 - Device does not handle call management itself. 1 - Device handles call management itself.
+    uint8_t TU_RESERVED    : 6;
+  } bmCapabilities;
+
+  uint8_t bDataInterface;
+}cdc_desc_func_call_management_t;
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t support_comm_request                    : 1; ///< Device supports the request combination of Set_Comm_Feature, Clear_Comm_Feature, and Get_Comm_Feature.
+  uint8_t support_line_request                    : 1; ///< Device supports the request combination of Set_Line_Coding, Set_Control_Line_State, Get_Line_Coding, and the notification Serial_State.
+  uint8_t support_send_break                      : 1; ///< Device supports the request Send_Break
+  uint8_t support_notification_network_connection : 1; ///< Device supports the notification Network_Connection.
+  uint8_t TU_RESERVED                             : 4;
+}cdc_acm_capability_t;
+
+TU_VERIFY_STATIC(sizeof(cdc_acm_capability_t) == 1, "mostly problem with compiler");
+
+/// Abstract Control Management Functional Descriptor
+/// This functional descriptor describes the commands supported by by the Communications Class interface with SubClass code of \ref CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength                  ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType          ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType       ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  cdc_acm_capability_t bmCapabilities ;
+}cdc_desc_func_acm_t;
+
+/// \brief Direct Line Management Functional Descriptor
+/// \details This functional descriptor describes the commands supported by the Communications Class interface with SubClass code of \ref CDC_FUNC_DESC_DIRECT_LINE_MANAGEMENT
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  struct {
+    uint8_t require_pulse_setup   : 1; ///< Device requires extra Pulse_Setup request during pulse dialing sequence to disengage holding circuit.
+    uint8_t support_aux_request   : 1; ///< Device supports the request combination of Set_Aux_Line_State, Ring_Aux_Jack, and notification Aux_Jack_Hook_State.
+    uint8_t support_pulse_request : 1; ///< Device supports the request combination of Pulse_Setup, Send_Pulse, and Set_Pulse_Time.
+    uint8_t TU_RESERVED           : 5;
+  } bmCapabilities;
+}cdc_desc_func_direct_line_management_t;
+
+/// \brief Telephone Ringer Functional Descriptor
+/// \details The Telephone Ringer functional descriptor describes the ringer capabilities supported by the Communications Class interface,
+/// with the SubClass code of \ref CDC_COMM_SUBCLASS_TELEPHONE_CONTROL_MODEL
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  uint8_t bRingerVolSteps    ;
+  uint8_t bNumRingerPatterns ;
+}cdc_desc_func_telephone_ringer_t;
+
+/// \brief Telephone Operational Modes Functional Descriptor
+/// \details The Telephone Operational Modes functional descriptor describes the operational modes supported by
+/// the Communications Class interface, with the SubClass code of \ref CDC_COMM_SUBCLASS_TELEPHONE_CONTROL_MODEL
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  struct {
+    uint8_t simple_mode           : 1;
+    uint8_t standalone_mode       : 1;
+    uint8_t computer_centric_mode : 1;
+    uint8_t TU_RESERVED           : 5;
+  } bmCapabilities;
+}cdc_desc_func_telephone_operational_modes_t;
+
+/// \brief Telephone Call and Line State Reporting Capabilities Descriptor
+/// \details The Telephone Call and Line State Reporting Capabilities functional descriptor describes the abilities of a
+/// telephone device to report optional call and line states.
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  struct {
+    uint32_t interrupted_dialtone   : 1; ///< 0 : Reports only dialtone (does not differentiate between normal and interrupted dialtone). 1 : Reports interrupted dialtone in addition to normal dialtone
+    uint32_t ringback_busy_fastbusy : 1; ///< 0 : Reports only dialing state. 1 : Reports ringback, busy, and fast busy states.
+    uint32_t caller_id              : 1; ///< 0 : Does not report caller ID. 1 : Reports caller ID information.
+    uint32_t incoming_distinctive   : 1; ///< 0 : Reports only incoming ringing. 1 : Reports incoming distinctive ringing patterns.
+    uint32_t dual_tone_multi_freq   : 1; ///< 0 : Cannot report dual tone multi-frequency (DTMF) digits input remotely over the telephone line. 1 : Can report DTMF digits input remotely over the telephone line.
+    uint32_t line_state_change      : 1; ///< 0 : Does not support line state change notification. 1 : Does support line state change notification
+    uint32_t TU_RESERVED            : 26;
+  } bmCapabilities;
+}cdc_desc_func_telephone_call_state_reporting_capabilities_t;
+
+// TODO remove
+static inline uint8_t cdc_functional_desc_typeof(uint8_t const * p_desc)
+{
+  return p_desc[2];
+}
+
+//--------------------------------------------------------------------+
+// Requests
+//--------------------------------------------------------------------+
+typedef struct TU_ATTR_PACKED
+{
+  uint32_t bit_rate;
+  uint8_t  stop_bits; ///< 0: 1 stop bit - 1: 1.5 stop bits - 2: 2 stop bits
+  uint8_t  parity;    ///< 0: None - 1: Odd - 2: Even - 3: Mark - 4: Space
+  uint8_t  data_bits; ///< can be 5, 6, 7, 8 or 16
+} cdc_line_coding_t;
+
+TU_VERIFY_STATIC(sizeof(cdc_line_coding_t) == 7, "size is not correct");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint16_t dte_is_present : 1; ///< Indicates to DCE if DTE is presentor not. This signal corresponds to V.24 signal 108/2 and RS-232 signal DTR.
+  uint16_t half_duplex_carrier_control : 1;
+  uint16_t : 14;
+} cdc_line_control_state_t;
+
+TU_VERIFY_STATIC(sizeof(cdc_line_control_state_t) == 2, "size is not correct");
+
+TU_ATTR_PACKED_END  // End of all packed definitions
+TU_ATTR_BIT_FIELD_ORDER_END
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
+
+/** @} */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_device.h
new file mode 100644
index 00000000000..fbc7162a366
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_device.h
@@ -0,0 +1,260 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_CDC_DEVICE_H_
+#define _TUSB_CDC_DEVICE_H_
+
+#include "common/tusb_common.h"
+#include "cdc.h"
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+#if !defined(CFG_TUD_CDC_EP_BUFSIZE) && defined(CFG_TUD_CDC_EPSIZE)
+  #warning CFG_TUD_CDC_EPSIZE is renamed to CFG_TUD_CDC_EP_BUFSIZE, please update to use the new name
+  #define CFG_TUD_CDC_EP_BUFSIZE    CFG_TUD_CDC_EPSIZE
+#endif
+
+#ifndef CFG_TUD_CDC_EP_BUFSIZE
+  #define CFG_TUD_CDC_EP_BUFSIZE    (TUD_OPT_HIGH_SPEED ? 512 : 64)
+#endif
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** \addtogroup CDC_Serial Serial
+ *  @{
+ *  \defgroup   CDC_Serial_Device Device
+ *  @{ */
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Ports)
+// CFG_TUD_CDC > 1
+//--------------------------------------------------------------------+
+
+// Check if terminal is connected to this port
+bool     tud_cdc_n_connected       (uint8_t itf);
+
+// Get current line state. Bit 0:  DTR (Data Terminal Ready), Bit 1: RTS (Request to Send)
+uint8_t  tud_cdc_n_get_line_state  (uint8_t itf);
+
+// Get current line encoding: bit rate, stop bits parity etc ..
+void     tud_cdc_n_get_line_coding (uint8_t itf, cdc_line_coding_t* coding);
+
+// Set special character that will trigger tud_cdc_rx_wanted_cb() callback on receiving
+void     tud_cdc_n_set_wanted_char (uint8_t itf, char wanted);
+
+// Get the number of bytes available for reading
+uint32_t tud_cdc_n_available       (uint8_t itf);
+
+// Read received bytes
+uint32_t tud_cdc_n_read            (uint8_t itf, void* buffer, uint32_t bufsize);
+
+// Read a byte, return -1 if there is none
+static inline
+int32_t  tud_cdc_n_read_char       (uint8_t itf);
+
+// Clear the received FIFO
+void     tud_cdc_n_read_flush      (uint8_t itf);
+
+// Get a byte from FIFO at the specified position without removing it
+bool     tud_cdc_n_peek            (uint8_t itf, uint8_t* ui8);
+
+// Write bytes to TX FIFO, data may remain in the FIFO for a while
+uint32_t tud_cdc_n_write           (uint8_t itf, void const* buffer, uint32_t bufsize);
+
+// Write a byte
+static inline
+uint32_t tud_cdc_n_write_char      (uint8_t itf, char ch);
+
+// Write a null-terminated string
+static inline
+uint32_t tud_cdc_n_write_str       (uint8_t itf, char const* str);
+
+// Force sending data if possible, return number of forced bytes
+uint32_t tud_cdc_n_write_flush     (uint8_t itf);
+
+// Return the number of bytes (characters) available for writing to TX FIFO buffer in a single n_write operation.
+uint32_t tud_cdc_n_write_available (uint8_t itf);
+
+// Clear the transmit FIFO
+bool tud_cdc_n_write_clear (uint8_t itf);
+
+//--------------------------------------------------------------------+
+// Application API (Single Port)
+//--------------------------------------------------------------------+
+static inline bool     tud_cdc_connected       (void);
+static inline uint8_t  tud_cdc_get_line_state  (void);
+static inline void     tud_cdc_get_line_coding (cdc_line_coding_t* coding);
+static inline void     tud_cdc_set_wanted_char (char wanted);
+
+static inline uint32_t tud_cdc_available       (void);
+static inline int32_t  tud_cdc_read_char       (void);
+static inline uint32_t tud_cdc_read            (void* buffer, uint32_t bufsize);
+static inline void     tud_cdc_read_flush      (void);
+static inline bool     tud_cdc_peek            (uint8_t* ui8);
+
+static inline uint32_t tud_cdc_write_char      (char ch);
+static inline uint32_t tud_cdc_write           (void const* buffer, uint32_t bufsize);
+static inline uint32_t tud_cdc_write_str       (char const* str);
+static inline uint32_t tud_cdc_write_flush     (void);
+static inline uint32_t tud_cdc_write_available (void);
+static inline bool     tud_cdc_write_clear     (void);
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when received new data
+TU_ATTR_WEAK void tud_cdc_rx_cb(uint8_t itf);
+
+// Invoked when received `wanted_char`
+TU_ATTR_WEAK void tud_cdc_rx_wanted_cb(uint8_t itf, char wanted_char);
+
+// Invoked when space becomes available in TX buffer
+TU_ATTR_WEAK void tud_cdc_tx_complete_cb(uint8_t itf);
+
+// Invoked when line state DTR & RTS are changed via SET_CONTROL_LINE_STATE
+TU_ATTR_WEAK void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts);
+
+// Invoked when line coding is change via SET_LINE_CODING
+TU_ATTR_WEAK void tud_cdc_line_coding_cb(uint8_t itf, cdc_line_coding_t const* p_line_coding);
+
+// Invoked when received send break
+TU_ATTR_WEAK void tud_cdc_send_break_cb(uint8_t itf, uint16_t duration_ms);
+
+//--------------------------------------------------------------------+
+// Inline Functions
+//--------------------------------------------------------------------+
+static inline int32_t tud_cdc_n_read_char (uint8_t itf)
+{
+  uint8_t ch;
+  return tud_cdc_n_read(itf, &ch, 1) ? (int32_t) ch : -1;
+}
+
+static inline uint32_t tud_cdc_n_write_char(uint8_t itf, char ch)
+{
+  return tud_cdc_n_write(itf, &ch, 1);
+}
+
+static inline uint32_t tud_cdc_n_write_str (uint8_t itf, char const* str)
+{
+  return tud_cdc_n_write(itf, str, strlen(str));
+}
+
+static inline bool tud_cdc_connected (void)
+{
+  return tud_cdc_n_connected(0);
+}
+
+static inline uint8_t tud_cdc_get_line_state (void)
+{
+  return tud_cdc_n_get_line_state(0);
+}
+
+static inline void tud_cdc_get_line_coding (cdc_line_coding_t* coding)
+{
+  tud_cdc_n_get_line_coding(0, coding);
+}
+
+static inline void tud_cdc_set_wanted_char (char wanted)
+{
+  tud_cdc_n_set_wanted_char(0, wanted);
+}
+
+static inline uint32_t tud_cdc_available (void)
+{
+  return tud_cdc_n_available(0);
+}
+
+static inline int32_t tud_cdc_read_char (void)
+{
+  return tud_cdc_n_read_char(0);
+}
+
+static inline uint32_t tud_cdc_read (void* buffer, uint32_t bufsize)
+{
+  return tud_cdc_n_read(0, buffer, bufsize);
+}
+
+static inline void tud_cdc_read_flush (void)
+{
+  tud_cdc_n_read_flush(0);
+}
+
+static inline bool tud_cdc_peek (uint8_t* ui8)
+{
+  return tud_cdc_n_peek(0, ui8);
+}
+
+static inline uint32_t tud_cdc_write_char (char ch)
+{
+  return tud_cdc_n_write_char(0, ch);
+}
+
+static inline uint32_t tud_cdc_write (void const* buffer, uint32_t bufsize)
+{
+  return tud_cdc_n_write(0, buffer, bufsize);
+}
+
+static inline uint32_t tud_cdc_write_str (char const* str)
+{
+  return tud_cdc_n_write_str(0, str);
+}
+
+static inline uint32_t tud_cdc_write_flush (void)
+{
+  return tud_cdc_n_write_flush(0);
+}
+
+static inline uint32_t tud_cdc_write_available(void)
+{
+  return tud_cdc_n_write_available(0);
+}
+
+static inline bool tud_cdc_write_clear(void)
+{
+  return tud_cdc_n_write_clear(0);
+}
+
+/** @} */
+/** @} */
+
+//--------------------------------------------------------------------+
+// INTERNAL USBD-CLASS DRIVER API
+//--------------------------------------------------------------------+
+void     cdcd_init            (void);
+void     cdcd_reset           (uint8_t rhport);
+uint16_t cdcd_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     cdcd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool     cdcd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_CDC_DEVICE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_host.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_host.h
new file mode 100644
index 00000000000..33dbd2efb4d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_host.h
@@ -0,0 +1,134 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_CDC_HOST_H_
+#define _TUSB_CDC_HOST_H_
+
+#include "cdc.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// CDC APPLICATION PUBLIC API
+//--------------------------------------------------------------------+
+/** \ingroup ClassDriver_CDC Communication Device Class (CDC)
+ * \addtogroup CDC_Serial Serial
+ * @{
+ * \defgroup   CDC_Serial_Host Host
+ * @{ */
+
+bool tuh_cdc_set_control_line_state(uint8_t dev_addr, bool dtr, bool rts, tuh_xfer_cb_t complete_cb);
+
+static inline bool tuh_cdc_connect(uint8_t dev_addr, tuh_xfer_cb_t complete_cb)
+{
+  return tuh_cdc_set_control_line_state(dev_addr, true, true, complete_cb);
+}
+
+static inline bool tuh_cdc_disconnect(uint8_t dev_addr, tuh_xfer_cb_t complete_cb)
+{
+  return tuh_cdc_set_control_line_state(dev_addr, false, false, complete_cb);
+}
+
+/** \brief 			Check if device support CDC Serial interface or not
+ * \param[in]		dev_addr	device address
+ * \retval      true if device supports
+ * \retval      false if device does not support or is not mounted
+ */
+bool tuh_cdc_serial_is_mounted(uint8_t dev_addr);
+
+/** \brief      Check if the interface is currently busy or not
+ * \param[in]   dev_addr device address
+ * \param[in]   pipeid value from \ref cdc_pipeid_t to indicate target pipe.
+ * \retval      true if the interface is busy, meaning the stack is still transferring/waiting data from/to device
+ * \retval      false if the interface is not busy, meaning the stack successfully transferred data from/to device
+ * \note        This function is used to check if previous transfer is complete (success or error), so that the next transfer
+ *              can be scheduled. User needs to make sure the corresponding interface is mounted
+ *              (by \ref tuh_cdc_serial_is_mounted) before calling this function.
+ */
+bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid);
+
+/** \brief 			Perform USB OUT transfer to device
+ * \param[in]		dev_addr	device address
+ * \param[in]	  p_data    Buffer containing data. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION)
+ * \param[in]		length    Number of bytes to be transferred via USB bus
+ * \retval      TUSB_ERROR_NONE on success
+ * \retval      TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device
+ * \retval      TUSB_ERROR_DEVICE_NOT_READY if device is not yet configured (by SET CONFIGURED request)
+ * \retval      TUSB_ERROR_INVALID_PARA if input parameters are not correct
+ * \note        This function is non-blocking and returns immediately. The result of USB transfer will be reported by the
+ *              interface's callback function. \a p_data must be declared with \ref CFG_TUSB_MEM_SECTION.
+ */
+bool tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool is_notify);
+
+/** \brief 			Perform USB IN transfer to get data from device
+ * \param[in]		dev_addr	device address
+ * \param[in]	  p_buffer  Buffer containing received data. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION)
+ * \param[in]		length    Number of bytes to be transferred via USB bus
+ * \retval      TUSB_ERROR_NONE on success
+ * \retval      TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device
+ * \retval      TUSB_ERROR_DEVICE_NOT_READY if device is not yet configured (by SET CONFIGURED request)
+ * \retval      TUSB_ERROR_INVALID_PARA if input parameters are not correct
+ * \note        This function is non-blocking and returns immediately. The result of USB transfer will be reported by the
+ *              interface's callback function. \a p_data must be declared with \ref CFG_TUSB_MEM_SECTION.
+ */
+bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify);
+
+//--------------------------------------------------------------------+
+// CDC APPLICATION CALLBACKS
+//--------------------------------------------------------------------+
+
+/** \brief      Callback function that is invoked when an transferring event occurred
+ * \param[in]		dev_addr	Address of device
+ * \param[in]   event an value from \ref xfer_result_t
+ * \param[in]   pipe_id value from \ref cdc_pipeid_t indicate the pipe
+ * \param[in]   xferred_bytes Number of bytes transferred via USB bus
+ * \note        event can be one of following
+ *              - XFER_RESULT_SUCCESS : previously scheduled transfer completes successfully.
+ *              - XFER_RESULT_FAILED   : previously scheduled transfer encountered a transaction error.
+ *              - XFER_RESULT_STALLED : previously scheduled transfer is stalled by device.
+ * \note
+ */
+void tuh_cdc_xfer_isr(uint8_t dev_addr, xfer_result_t event, cdc_pipeid_t pipe_id, uint32_t xferred_bytes);
+
+/// @} // group CDC_Serial_Host
+/// @}
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void cdch_init       (void);
+bool cdch_open       (uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
+bool cdch_set_config (uint8_t dev_addr, uint8_t itf_num);
+bool cdch_xfer_cb    (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+void cdch_close      (uint8_t dev_addr);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_CDC_HOST_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_rndis.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_rndis.h
new file mode 100644
index 00000000000..e0f129fe39c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_rndis.h
@@ -0,0 +1,301 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/** \ingroup ClassDriver_CDC Communication Device Class (CDC)
+ * \defgroup CDC_RNDIS Remote Network Driver Interface Specification (RNDIS)
+ *  @{
+ *  \defgroup CDC_RNDIS_Common Common Definitions
+ *  @{ */
+
+#ifndef _TUSB_CDC_RNDIS_H_
+#define _TUSB_CDC_RNDIS_H_
+
+#include "cdc.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifdef __CC_ARM
+#pragma diag_suppress 66 // Suppress Keil warnings #66-D: enumeration value is out of "int" range
+#endif
+
+/// RNDIS Message Types
+typedef enum
+{
+  RNDIS_MSG_PACKET           = 0x00000001UL, ///< The host and device use this to send network data to one another.
+
+  RNDIS_MSG_INITIALIZE       = 0x00000002UL, ///< Sent by the host to initialize the device.
+  RNDIS_MSG_INITIALIZE_CMPLT = 0x80000002UL, ///< Device response to an initialize message.
+
+  RNDIS_MSG_HALT             = 0x00000003UL, ///< Sent by the host to halt the device. This does not have a response. It is optional for the device to send this message to the host.
+
+  RNDIS_MSG_QUERY            = 0x00000004UL, ///< Sent by the host to send a query OID.
+  RNDIS_MSG_QUERY_CMPLT      = 0x80000004UL, ///< Device response to a query OID.
+
+  RNDIS_MSG_SET              = 0x00000005UL, ///< Sent by the host to send a set OID.
+  RNDIS_MSG_SET_CMPLT        = 0x80000005UL, ///< Device response to a set OID.
+
+  RNDIS_MSG_RESET            = 0x00000006UL, ///< Sent by the host to perform a soft reset on the device.
+  RNDIS_MSG_RESET_CMPLT      = 0x80000006UL, ///< Device response to reset message.
+
+  RNDIS_MSG_INDICATE_STATUS  = 0x00000007UL, ///< Sent by the device to indicate its status or an error when an unrecognized message is received.
+
+  RNDIS_MSG_KEEP_ALIVE       = 0x00000008UL, ///< During idle periods, sent every few seconds by the host to check that the device is still responsive. It is optional for the device to send this message to check if the host is active.
+  RNDIS_MSG_KEEP_ALIVE_CMPLT = 0x80000008UL  ///< The device response to a keepalivemessage. The host can respond with this message to a keepalive message from the device when the device implements the optional KeepAliveTimer.
+}rndis_msg_type_t;
+
+/// RNDIS Message Status Values
+typedef enum
+{
+  RNDIS_STATUS_SUCCESS          = 0x00000000UL, ///< Success
+  RNDIS_STATUS_FAILURE          = 0xC0000001UL, ///< Unspecified error
+  RNDIS_STATUS_INVALID_DATA     = 0xC0010015UL, ///< Invalid data error
+  RNDIS_STATUS_NOT_SUPPORTED    = 0xC00000BBUL, ///< Unsupported request error
+  RNDIS_STATUS_MEDIA_CONNECT    = 0x4001000BUL, ///< Device is connected to a network medium.
+  RNDIS_STATUS_MEDIA_DISCONNECT = 0x4001000CUL  ///< Device is disconnected from the medium.
+}rndis_msg_status_t;
+
+#ifdef __CC_ARM
+#pragma diag_default 66 // return Keil 66 to normal severity
+#endif
+
+//--------------------------------------------------------------------+
+// MESSAGE STRUCTURE
+//--------------------------------------------------------------------+
+
+//------------- Initialize -------------//
+/// \brief Initialize Message
+/// \details This message MUST be sent by the host to initialize the device.
+typedef struct {
+  uint32_t type          ; ///< Message type, must be \ref RNDIS_MSG_INITIALIZE
+  uint32_t length        ; ///< Message length in bytes, must be 0x18
+  uint32_t request_id    ; ///< A 32-bit integer value, generated by the host, used to match the host's sent request to the response from the device.
+  uint32_t major_version ; ///< The major version of the RNDIS Protocol implemented by the host.
+  uint32_t minor_version ; ///< The minor version of the RNDIS Protocol implemented by the host
+  uint32_t max_xfer_size ; ///< The maximum size, in bytes, of any single bus data transfer that the host expects to receive from the device.
+}rndis_msg_initialize_t;
+
+/// \brief Initialize Complete Message
+/// \details This message MUST be sent by the device in response to an initialize message.
+typedef struct {
+  uint32_t type                    ; ///< Message Type, must be \ref RNDIS_MSG_INITIALIZE_CMPLT
+  uint32_t length                  ; ///< Message length in bytes, must be 0x30
+  uint32_t request_id              ; ///< A 32-bit integer value from \a request_id field of the \ref rndis_msg_initialize_t to which this message is a response.
+  uint32_t status                  ; ///< The initialization status of the device, has value from \ref rndis_msg_status_t
+  uint32_t major_version           ; ///< the highest-numbered RNDIS Protocol version supported by the device.
+  uint32_t minor_version           ; ///< the highest-numbered RNDIS Protocol version supported by the device.
+  uint32_t device_flags            ; ///< MUST be set to 0x000000010. Other values are reserved for future use.
+  uint32_t medium                  ; ///< is 0x00 for RNDIS_MEDIUM_802_3
+  uint32_t max_packet_per_xfer     ; ///< The maximum number of concatenated \ref RNDIS_MSG_PACKET messages that the device can handle in a single bus transfer to it. This value MUST be at least 1.
+  uint32_t max_xfer_size           ; ///< The maximum size, in bytes, of any single bus data transfer that the device expects to receive from the host.
+  uint32_t packet_alignment_factor ; ///< The byte alignment the device expects for each RNDIS message that is part of a multimessage transfer to it. The value is specified as an exponent of 2; for example, the host uses 2<SUP>{PacketAlignmentFactor}</SUP> as the alignment value.
+  uint32_t reserved[2]             ;
+} rndis_msg_initialize_cmplt_t;
+
+//------------- Query -------------//
+/// \brief Query Message
+/// \details This message MUST be sent by the host to query an OID.
+typedef struct {
+  uint32_t type          ; ///< Message Type, must be \ref RNDIS_MSG_QUERY
+  uint32_t length        ; ///< Message length in bytes, including the header and the \a oid_buffer
+  uint32_t request_id    ; ///< A 32-bit integer value, generated by the host, used to match the host's sent request to the response from the device.
+  uint32_t oid           ; ///< The integer value of the host operating system-defined identifier, for the parameter of the device being queried for.
+  uint32_t buffer_length ; ///< The length, in bytes, of the input data required for the OID query. This MUST be set to 0 when there is no input data associated with the OID.
+  uint32_t buffer_offset ; ///< The offset, in bytes, from the beginning of \a request_id field where the input data for the query is located in the message. This value MUST be set to 0 when there is no input data associated with the OID.
+  uint32_t reserved      ;
+  uint8_t  oid_buffer[]  ; ///< Flexible array contains the input data supplied by the host, required for the OID query request processing by the device, as per the host NDIS specification.
+} rndis_msg_query_t, rndis_msg_set_t;
+
+TU_VERIFY_STATIC(sizeof(rndis_msg_query_t) == 28, "Make sure flexible array member does not affect layout");
+
+/// \brief Query Complete Message
+/// \details This message MUST be sent by the device in response to a query OID message.
+typedef struct {
+  uint32_t type          ; ///< Message Type, must be \ref RNDIS_MSG_QUERY_CMPLT
+  uint32_t length        ; ///< Message length in bytes, including the header and the \a oid_buffer
+  uint32_t request_id    ; ///< A 32-bit integer value from \a request_id field of the \ref rndis_msg_query_t to which this message is a response.
+  uint32_t status        ; ///< The status of processing for the query request, has value from \ref rndis_msg_status_t.
+  uint32_t buffer_length ; ///< The length, in bytes, of the data in the response to the query. This MUST be set to 0 when there is no OIDInputBuffer.
+  uint32_t buffer_offset ; ///< The offset, in bytes, from the beginning of \a request_id field where the response data for the query is located in the message. This MUST be set to 0 when there is no \ref oid_buffer.
+  uint8_t  oid_buffer[]  ; ///< Flexible array member contains the response data to the OID query request as specified by the host.
+} rndis_msg_query_cmplt_t;
+
+TU_VERIFY_STATIC(sizeof(rndis_msg_query_cmplt_t) == 24, "Make sure flexible array member does not affect layout");
+
+//------------- Reset -------------//
+/// \brief Reset Message
+/// \details This message MUST be sent by the host to perform a soft reset on the device.
+typedef struct {
+  uint32_t type     ; ///< Message Type, must be \ref RNDIS_MSG_RESET
+  uint32_t length   ; ///< Message length in bytes, MUST be 0x06
+  uint32_t reserved ;
+} rndis_msg_reset_t;
+
+/// \brief Reset Complete Message
+/// \details This message MUST be sent by the device in response to a reset message.
+typedef struct {
+  uint32_t type             ; ///< Message Type, must be \ref RNDIS_MSG_RESET_CMPLT
+  uint32_t length           ; ///< Message length in bytes, MUST be 0x10
+  uint32_t status           ; ///< The status of processing for the \ref rndis_msg_reset_t, has value from \ref rndis_msg_status_t.
+  uint32_t addressing_reset ; ///< This field indicates whether the addressing information, which is the multicast address list or packet filter, has been lost during the reset operation. This MUST be set to 0x00000001 if the device requires that the host to resend addressing information or MUST be set to zero otherwise.
+} rndis_msg_reset_cmplt_t;
+
+//typedef struct {
+//  uint32_t type;
+//  uint32_t length;
+//  uint32_t status;
+//  uint32_t buffer_length;
+//  uint32_t buffer_offset;
+//  uint32_t diagnostic_status; // optional
+//  uint32_t diagnostic_error_offset; // optional
+//  uint32_t status_buffer[0]; // optional
+//} rndis_msg_indicate_status_t;
+
+/// \brief Keep Alive Message
+/// \details This message MUST be sent by the host to check that device is still responsive. It is optional for the device to send this message to check if the host is active
+typedef struct {
+  uint32_t type       ; ///< Message Type
+  uint32_t length     ; ///< Message length in bytes, MUST be 0x10
+  uint32_t request_id ;
+} rndis_msg_keep_alive_t, rndis_msg_halt_t;
+
+/// \brief Set Complete Message
+/// \brief This message MUST be sent in response to a the request message
+typedef struct {
+  uint32_t type       ; ///< Message Type
+  uint32_t length     ; ///< Message length in bytes, MUST be 0x10
+  uint32_t request_id ; ///< must be the same as requesting message
+  uint32_t status     ; ///< The status of processing for the request message request by the device to which this message is the response.
+} rndis_msg_set_cmplt_t, rndis_msg_keep_alive_cmplt_t;
+
+/// \brief Packet Data Message
+/// \brief This message MUST be used by the host and the device to send network data to one another.
+typedef struct {
+  uint32_t type                          ; ///< Message Type, must be \ref RNDIS_MSG_PACKET
+  uint32_t length                        ; ///< Message length in bytes, The total length of this RNDIS message including the header, payload, and padding.
+  uint32_t data_offset                   ; ///< Specifies the offset, in bytes, from the start of this \a data_offset field of this message to the start of the data. This MUST be an integer multiple of 4.
+  uint32_t data_length                   ; ///< Specifies the number of bytes in the payload of this message.
+  uint32_t out_of_band_data_offet        ; ///< Specifies the offset, in bytes, of the first out-of-band data record from the start of the DataOffset field in this message. MUST be an integer multiple of 4 when out-of-band data is present or set to 0 otherwise. When there are multiple out-ofband data records, each subsequent record MUST immediately follow the previous out-of-band data record.
+  uint32_t out_of_band_data_length       ; ///< Specifies, in bytes, the total length of the out-of-band data.
+  uint32_t num_out_of_band_data_elements ; ///< Specifies the number of out-of-band records in this message.
+  uint32_t per_packet_info_offset        ; ///< Specifies the offset, in bytes, of the start of per-packet-info data record from the start of the \a data_offset field in this message. MUST be an integer multiple of 4 when per-packet-info data record is present or MUST be set to 0 otherwise. When there are multiple per-packet-info data records, each subsequent record MUST immediately follow the previous record.
+  uint32_t per_packet_info_length        ; ///< Specifies, in bytes, the total length of per-packetinformation contained in this message.
+  uint32_t reserved[2]                   ;
+  uint32_t payload[0]                    ; ///< Network data contained in this message.
+
+  // uint8_t  padding[0]
+  // Additional bytes of zeros added at the end of the message to comply with
+  // the internal and external padding requirements. Internal padding SHOULD be as per the
+  // specification of the out-of-band data record and per-packet-info data record. The external
+  //padding size SHOULD be determined based on the PacketAlignmentFactor field specification
+  //in REMOTE_NDIS_INITIALIZE_CMPLT message by the device, when multiple
+  //REMOTE_NDIS_PACKET_MSG messages are bundled together in a single bus-native message.
+  //In this case, all but the very last REMOTE_NDIS_PACKET_MSG MUST respect the
+  //PacketAlignmentFactor field.
+
+  // rndis_msg_packet_t [0] : (optional) more packet if multiple packet per bus transaction is supported
+} rndis_msg_packet_t;
+
+
+typedef struct {
+  uint32_t size    ; ///< Length, in bytes, of this header and appended data and padding. This value MUST be an integer multiple of 4.
+  uint32_t type    ; ///< MUST be as per host operating system specification.
+  uint32_t offset  ; ///< The byte offset from the beginning of this record to the beginning of data.
+  uint32_t data[0] ; ///< Flexible array contains data
+} rndis_msg_out_of_band_data_t, rndis_msg_per_packet_info_t;
+
+//--------------------------------------------------------------------+
+// NDIS Object ID
+//--------------------------------------------------------------------+
+
+/// NDIS Object ID
+typedef enum
+{
+  //------------- General Required OIDs -------------//
+  RNDIS_OID_GEN_SUPPORTED_LIST          = 0x00010101, ///< List of supported OIDs
+  RNDIS_OID_GEN_HARDWARE_STATUS         = 0x00010102, ///< Hardware status
+  RNDIS_OID_GEN_MEDIA_SUPPORTED         = 0x00010103, ///< Media types supported (encoded)
+  RNDIS_OID_GEN_MEDIA_IN_USE            = 0x00010104, ///< Media types in use (encoded)
+  RNDIS_OID_GEN_MAXIMUM_LOOKAHEAD       = 0x00010105, ///<
+  RNDIS_OID_GEN_MAXIMUM_FRAME_SIZE      = 0x00010106, ///< Maximum frame size in bytes
+  RNDIS_OID_GEN_LINK_SPEED              = 0x00010107, ///< Link speed in units of 100 bps
+  RNDIS_OID_GEN_TRANSMIT_BUFFER_SPACE   = 0x00010108, ///< Transmit buffer space
+  RNDIS_OID_GEN_RECEIVE_BUFFER_SPACE    = 0x00010109, ///< Receive buffer space
+  RNDIS_OID_GEN_TRANSMIT_BLOCK_SIZE     = 0x0001010A, ///< Minimum amount of storage, in bytes, that a single packet occupies in the transmit buffer space of the NIC
+  RNDIS_OID_GEN_RECEIVE_BLOCK_SIZE      = 0x0001010B, ///< Amount of storage, in bytes, that a single packet occupies in the receive buffer space of the NIC
+  RNDIS_OID_GEN_VENDOR_ID               = 0x0001010C, ///< Vendor NIC code
+  RNDIS_OID_GEN_VENDOR_DESCRIPTION      = 0x0001010D, ///< Vendor network card description
+  RNDIS_OID_GEN_CURRENT_PACKET_FILTER   = 0x0001010E, ///< Current packet filter (encoded)
+  RNDIS_OID_GEN_CURRENT_LOOKAHEAD       = 0x0001010F, ///< Current lookahead size in bytes
+  RNDIS_OID_GEN_DRIVER_VERSION          = 0x00010110, ///< NDIS version number used by the driver
+  RNDIS_OID_GEN_MAXIMUM_TOTAL_SIZE      = 0x00010111, ///< Maximum total packet length in bytes
+  RNDIS_OID_GEN_PROTOCOL_OPTIONS        = 0x00010112, ///< Optional protocol flags (encoded)
+  RNDIS_OID_GEN_MAC_OPTIONS             = 0x00010113, ///< Optional NIC flags (encoded)
+  RNDIS_OID_GEN_MEDIA_CONNECT_STATUS    = 0x00010114, ///< Whether the NIC is connected to the network
+  RNDIS_OID_GEN_MAXIMUM_SEND_PACKETS    = 0x00010115, ///< The maximum number of send packets the driver can accept per call to its MiniportSendPacketsfunction
+
+  //------------- General Optional OIDs -------------//
+  RNDIS_OID_GEN_VENDOR_DRIVER_VERSION   = 0x00010116, ///< Vendor-assigned version number of the driver
+  RNDIS_OID_GEN_SUPPORTED_GUIDS         = 0x00010117, ///< The custom GUIDs (Globally Unique Identifier) supported by the miniport driver
+  RNDIS_OID_GEN_NETWORK_LAYER_ADDRESSES = 0x00010118, ///< List of network-layer addresses associated with the binding between a transport and the driver
+  RNDIS_OID_GEN_TRANSPORT_HEADER_OFFSET = 0x00010119, ///< Size of packets' additional headers
+  RNDIS_OID_GEN_MEDIA_CAPABILITIES      = 0x00010201, ///<
+  RNDIS_OID_GEN_PHYSICAL_MEDIUM         = 0x00010202, ///< Physical media supported by the miniport driver (encoded)
+
+  //------------- 802.3 Objects (Ethernet) -------------//
+  RNDIS_OID_802_3_PERMANENT_ADDRESS     = 0x01010101, ///< Permanent station address
+  RNDIS_OID_802_3_CURRENT_ADDRESS       = 0x01010102, ///< Current station address
+  RNDIS_OID_802_3_MULTICAST_LIST        = 0x01010103, ///< Current multicast address list
+  RNDIS_OID_802_3_MAXIMUM_LIST_SIZE     = 0x01010104, ///< Maximum size of multicast address list
+} rndis_oid_type_t;
+
+/// RNDIS Packet Filter Bits \ref RNDIS_OID_GEN_CURRENT_PACKET_FILTER.
+typedef enum
+{
+  RNDIS_PACKET_TYPE_DIRECTED              = 0x00000001, ///< Directed packets. Directed packets contain a destination address equal to the station address of the NIC.
+  RNDIS_PACKET_TYPE_MULTICAST             = 0x00000002, ///< Multicast address packets sent to addresses in the multicast address list.
+  RNDIS_PACKET_TYPE_ALL_MULTICAST         = 0x00000004, ///< All multicast address packets, not just the ones enumerated in the multicast address list.
+  RNDIS_PACKET_TYPE_BROADCAST             = 0x00000008, ///< Broadcast packets.
+  RNDIS_PACKET_TYPE_SOURCE_ROUTING        = 0x00000010, ///< All source routing packets. If the protocol driver sets this bit, the NDIS library attempts to act as a source routing bridge.
+  RNDIS_PACKET_TYPE_PROMISCUOUS           = 0x00000020, ///< Specifies all packets regardless of whether VLAN filtering is enabled or not and whether the VLAN identifier matches or not.
+  RNDIS_PACKET_TYPE_SMT                   = 0x00000040, ///< SMT packets that an FDDI NIC receives.
+  RNDIS_PACKET_TYPE_ALL_LOCAL             = 0x00000080, ///< All packets sent by installed protocols and all packets indicated by the NIC that is identified by a given NdisBindingHandle.
+  RNDIS_PACKET_TYPE_GROUP                 = 0x00001000, ///< Packets sent to the current group address.
+  RNDIS_PACKET_TYPE_ALL_FUNCTIONAL        = 0x00002000, ///< All functional address packets, not just the ones in the current functional address.
+  RNDIS_PACKET_TYPE_FUNCTIONAL            = 0x00004000, ///< Functional address packets sent to addresses included in the current functional address.
+  RNDIS_PACKET_TYPE_MAC_FRAME             = 0x00008000, ///< NIC driver frames that a Token Ring NIC receives.
+  RNDIS_PACKET_TYPE_NO_LOCAL              = 0x00010000,
+} rndis_packet_filter_type_t;
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_CDC_RNDIS_H_ */
+
+/** @} */
+/** @} */
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_error.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_rndis_host.h
similarity index 52%
rename from tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_error.h
rename to tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_rndis_host.h
index d7ad8c3186e..447cc4e97f2 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_error.h
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_rndis_host.h
@@ -24,52 +24,40 @@
  * This file is part of the TinyUSB stack.
  */
 
-/** \ingroup Group_Common
- *  \defgroup Group_Error Error Codes
+/** \ingroup CDC_RNDIS
+ * \defgroup CDC_RNSID_Host Host
  *  @{ */
 
-#ifndef _TUSB_ERRORS_H_
-#define _TUSB_ERRORS_H_
+#ifndef _TUSB_CDC_RNDIS_HOST_H_
+#define _TUSB_CDC_RNDIS_HOST_H_
 
-#include "tusb_option.h"
+#include "common/tusb_common.h"
+#include "host/usbh.h"
+#include "cdc_rndis.h"
 
 #ifdef __cplusplus
  extern "C" {
 #endif
 
-#define ERROR_ENUM(x) x,
-#define ERROR_STRING(x) #x,
-
-#define ERROR_TABLE(ENTRY) \
-    ENTRY(TUSB_ERROR_NONE                            )\
-    ENTRY(TUSB_ERROR_INVALID_PARA                    )\
-    ENTRY(TUSB_ERROR_DEVICE_NOT_READY                )\
-    ENTRY(TUSB_ERROR_INTERFACE_IS_BUSY               )\
-    ENTRY(TUSB_ERROR_HCD_OPEN_PIPE_FAILED            )\
-    ENTRY(TUSB_ERROR_OSAL_TIMEOUT                    )\
-    ENTRY(TUSB_ERROR_CDCH_DEVICE_NOT_MOUNTED         )\
-    ENTRY(TUSB_ERROR_MSCH_DEVICE_NOT_MOUNTED         )\
-    ENTRY(TUSB_ERROR_NOT_SUPPORTED                   )\
-    ENTRY(TUSB_ERROR_NOT_ENOUGH_MEMORY               )\
-    ENTRY(TUSB_ERROR_FAILED                          )\
-
-/// \brief Error Code returned
-/// TODO obsolete and to be remove
-typedef enum
-{
-  ERROR_TABLE(ERROR_ENUM)
-  TUSB_ERROR_COUNT
-}tusb_error_t;
-
-#if CFG_TUSB_DEBUG
-/// Enum to String for debugging purposes. Only available if \ref CFG_TUSB_DEBUG > 0
-extern char const* const tusb_strerr[TUSB_ERROR_COUNT];
-#endif
+//--------------------------------------------------------------------+
+// INTERNAL RNDIS-CDC Driver API
+//--------------------------------------------------------------------+
+typedef struct {
+  OSAL_SEM_DEF(semaphore_notification);
+  osal_semaphore_handle_t sem_notification_hdl;  // used to wait on notification pipe
+  uint32_t max_xfer_size; // got from device's msg initialize complete
+  uint8_t mac_address[6];
+}rndish_data_t;
+
+void rndish_init(void);
+bool rndish_open_subtask(uint8_t dev_addr, cdch_data_t *p_cdc);
+void rndish_xfer_isr(cdch_data_t *p_cdc, pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes);
+void rndish_close(uint8_t dev_addr);
 
 #ifdef __cplusplus
  }
 #endif
 
-#endif /* _TUSB_ERRORS_H_ */
+#endif /* _TUSB_CDC_RNDIS_HOST_H_ */
 
-/**  @} */
+/** @} */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu.h
new file mode 100644
index 00000000000..114c827b8b7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu.h
@@ -0,0 +1,119 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 XMOS LIMITED
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_DFU_H_
+#define _TUSB_DFU_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Common Definitions
+//--------------------------------------------------------------------+
+
+// DFU Protocol
+typedef enum
+{
+  DFU_PROTOCOL_RT  = 0x01,
+  DFU_PROTOCOL_DFU = 0x02,
+} dfu_protocol_type_t;
+
+// DFU Descriptor Type
+typedef enum
+{
+  DFU_DESC_FUNCTIONAL = 0x21,
+} dfu_descriptor_type_t;
+
+// DFU Requests
+typedef enum {
+  DFU_REQUEST_DETACH         = 0,
+  DFU_REQUEST_DNLOAD         = 1,
+  DFU_REQUEST_UPLOAD         = 2,
+  DFU_REQUEST_GETSTATUS      = 3,
+  DFU_REQUEST_CLRSTATUS      = 4,
+  DFU_REQUEST_GETSTATE       = 5,
+  DFU_REQUEST_ABORT          = 6,
+} dfu_requests_t;
+
+// DFU States
+typedef enum {
+  APP_IDLE                   = 0,
+  APP_DETACH                 = 1,
+  DFU_IDLE                   = 2,
+  DFU_DNLOAD_SYNC            = 3,
+  DFU_DNBUSY                 = 4,
+  DFU_DNLOAD_IDLE            = 5,
+  DFU_MANIFEST_SYNC          = 6,
+  DFU_MANIFEST               = 7,
+  DFU_MANIFEST_WAIT_RESET    = 8,
+  DFU_UPLOAD_IDLE            = 9,
+  DFU_ERROR                  = 10,
+} dfu_state_t;
+
+// DFU Status
+typedef enum {
+  DFU_STATUS_OK               = 0x00,
+  DFU_STATUS_ERR_TARGET       = 0x01,
+  DFU_STATUS_ERR_FILE         = 0x02,
+  DFU_STATUS_ERR_WRITE        = 0x03,
+  DFU_STATUS_ERR_ERASE        = 0x04,
+  DFU_STATUS_ERR_CHECK_ERASED = 0x05,
+  DFU_STATUS_ERR_PROG         = 0x06,
+  DFU_STATUS_ERR_VERIFY       = 0x07,
+  DFU_STATUS_ERR_ADDRESS      = 0x08,
+  DFU_STATUS_ERR_NOTDONE      = 0x09,
+  DFU_STATUS_ERR_FIRMWARE     = 0x0A,
+  DFU_STATUS_ERR_VENDOR       = 0x0B,
+  DFU_STATUS_ERR_USBR         = 0x0C,
+  DFU_STATUS_ERR_POR          = 0x0D,
+  DFU_STATUS_ERR_UNKNOWN      = 0x0E,
+  DFU_STATUS_ERR_STALLEDPKT   = 0x0F,
+} dfu_status_t;
+
+#define DFU_ATTR_CAN_DOWNLOAD              (1u << 0)
+#define DFU_ATTR_CAN_UPLOAD                (1u << 1)
+#define DFU_ATTR_MANIFESTATION_TOLERANT    (1u << 2)
+#define DFU_ATTR_WILL_DETACH               (1u << 3)
+
+// DFU Status Request Payload
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bStatus;
+  uint8_t bwPollTimeout[3];
+  uint8_t bState;
+  uint8_t iString;
+} dfu_status_response_t;
+
+TU_VERIFY_STATIC( sizeof(dfu_status_response_t) == 6, "size is not correct");
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_DFU_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_device.h
new file mode 100644
index 00000000000..fecf8596fce
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_device.h
@@ -0,0 +1,98 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 XMOS LIMITED
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_DFU_DEVICE_H_
+#define _TUSB_DFU_DEVICE_H_
+
+#include "dfu.h"
+
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Default Configure & Validation
+//--------------------------------------------------------------------+
+
+#if !defined(CFG_TUD_DFU_XFER_BUFSIZE)
+  #error "CFG_TUD_DFU_XFER_BUFSIZE must be defined, it has to be set to the buffer size used in TUD_DFU_DESCRIPTOR"
+#endif
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// Must be called when the application is done with flashing started by
+// tud_dfu_download_cb() and tud_dfu_manifest_cb().
+// status is DFU_STATUS_OK if successful, any other error status will cause state to enter dfuError
+void tud_dfu_finish_flashing(uint8_t status);
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+
+// Note: alt is used as the partition number, in order to support multiple partitions like FLASH, EEPROM, etc.
+
+// Invoked right before tud_dfu_download_cb() (state=DFU_DNBUSY) or tud_dfu_manifest_cb() (state=DFU_MANIFEST)
+// Application return timeout in milliseconds (bwPollTimeout) for the next download/manifest operation.
+// During this period, USB host won't try to communicate with us.
+uint32_t tud_dfu_get_timeout_cb(uint8_t alt, uint8_t state);
+
+// Invoked when received DFU_DNLOAD (wLength>0) following by DFU_GETSTATUS (state=DFU_DNBUSY) requests
+// This callback could be returned before flashing op is complete (async).
+// Once finished flashing, application must call tud_dfu_finish_flashing()
+void tud_dfu_download_cb (uint8_t alt, uint16_t block_num, uint8_t const *data, uint16_t length);
+
+// Invoked when download process is complete, received DFU_DNLOAD (wLength=0) following by DFU_GETSTATUS (state=Manifest)
+// Application can do checksum, or actual flashing if buffered entire image previously.
+// Once finished flashing, application must call tud_dfu_finish_flashing()
+void tud_dfu_manifest_cb(uint8_t alt);
+
+// Invoked when received DFU_UPLOAD request
+// Application must populate data with up to length bytes and
+// Return the number of written bytes
+TU_ATTR_WEAK uint16_t tud_dfu_upload_cb(uint8_t alt, uint16_t block_num, uint8_t* data, uint16_t length);
+
+// Invoked when a DFU_DETACH request is received
+TU_ATTR_WEAK void tud_dfu_detach_cb(void);
+
+// Invoked when the Host has terminated a download or upload transfer
+TU_ATTR_WEAK void tud_dfu_abort_cb(uint8_t alt);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     dfu_moded_init(void);
+void     dfu_moded_reset(uint8_t rhport);
+uint16_t dfu_moded_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_DFU_MODE_DEVICE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_rt_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_rt_device.h
new file mode 100644
index 00000000000..babaa8214d7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_rt_device.h
@@ -0,0 +1,54 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Sylvain Munaut <tnt@246tNt.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_DFU_RT_DEVICE_H_
+#define _TUSB_DFU_RT_DEVICE_H_
+
+#include "dfu.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+// Invoked when a DFU_DETACH request is received and bitWillDetach is set
+void tud_dfu_runtime_reboot_to_dfu_cb(void);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     dfu_rtd_init(void);
+void     dfu_rtd_reset(uint8_t rhport);
+uint16_t dfu_rtd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     dfu_rtd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_DFU_RT_DEVICE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/hid/hid.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/hid/hid.h
new file mode 100644
index 00000000000..44a464be119
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/hid/hid.h
@@ -0,0 +1,1122 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/** \ingroup group_class
+ *  \defgroup ClassDriver_HID Human Interface Device (HID)
+ *  @{ */
+
+#ifndef _TUSB_HID_H_
+#define _TUSB_HID_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Common Definitions
+//--------------------------------------------------------------------+
+/** \defgroup ClassDriver_HID_Common Common Definitions
+ *  @{ */
+
+/// USB HID Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  bLength;         /**< Numeric expression that is the total size of the HID descriptor */
+  uint8_t  bDescriptorType; /**< Constant name specifying type of HID descriptor. */
+
+  uint16_t bcdHID;          /**< Numeric expression identifying the HID Class Specification release */
+  uint8_t  bCountryCode;    /**< Numeric expression identifying country code of the localized hardware.  */
+  uint8_t  bNumDescriptors; /**< Numeric expression specifying the number of class descriptors */
+
+  uint8_t  bReportType;     /**< Type of HID class report. */
+  uint16_t wReportLength;   /**< the total size of the Report descriptor. */
+} tusb_hid_descriptor_hid_t;
+
+/// HID Subclass
+typedef enum
+{
+  HID_SUBCLASS_NONE = 0, ///< No Subclass
+  HID_SUBCLASS_BOOT = 1  ///< Boot Interface Subclass
+}hid_subclass_enum_t;
+
+/// HID Interface Protocol
+typedef enum
+{
+  HID_ITF_PROTOCOL_NONE     = 0, ///< None
+  HID_ITF_PROTOCOL_KEYBOARD = 1, ///< Keyboard
+  HID_ITF_PROTOCOL_MOUSE    = 2  ///< Mouse
+}hid_interface_protocol_enum_t;
+
+/// HID Descriptor Type
+typedef enum
+{
+  HID_DESC_TYPE_HID      = 0x21, ///< HID Descriptor
+  HID_DESC_TYPE_REPORT   = 0x22, ///< Report Descriptor
+  HID_DESC_TYPE_PHYSICAL = 0x23  ///< Physical Descriptor
+}hid_descriptor_enum_t;
+
+/// HID Request Report Type
+typedef enum
+{
+  HID_REPORT_TYPE_INVALID = 0,
+  HID_REPORT_TYPE_INPUT,      ///< Input
+  HID_REPORT_TYPE_OUTPUT,     ///< Output
+  HID_REPORT_TYPE_FEATURE     ///< Feature
+}hid_report_type_t;
+
+/// HID Class Specific Control Request
+typedef enum
+{
+  HID_REQ_CONTROL_GET_REPORT   = 0x01, ///< Get Report
+  HID_REQ_CONTROL_GET_IDLE     = 0x02, ///< Get Idle
+  HID_REQ_CONTROL_GET_PROTOCOL = 0x03, ///< Get Protocol
+  HID_REQ_CONTROL_SET_REPORT   = 0x09, ///< Set Report
+  HID_REQ_CONTROL_SET_IDLE     = 0x0a, ///< Set Idle
+  HID_REQ_CONTROL_SET_PROTOCOL = 0x0b  ///< Set Protocol
+}hid_request_enum_t;
+
+/// HID Local Code
+typedef enum
+{
+  HID_LOCAL_NotSupported = 0   , ///< NotSupported
+  HID_LOCAL_Arabic             , ///< Arabic
+  HID_LOCAL_Belgian            , ///< Belgian
+  HID_LOCAL_Canadian_Bilingual , ///< Canadian_Bilingual
+  HID_LOCAL_Canadian_French    , ///< Canadian_French
+  HID_LOCAL_Czech_Republic     , ///< Czech_Republic
+  HID_LOCAL_Danish             , ///< Danish
+  HID_LOCAL_Finnish            , ///< Finnish
+  HID_LOCAL_French             , ///< French
+  HID_LOCAL_German             , ///< German
+  HID_LOCAL_Greek              , ///< Greek
+  HID_LOCAL_Hebrew             , ///< Hebrew
+  HID_LOCAL_Hungary            , ///< Hungary
+  HID_LOCAL_International      , ///< International
+  HID_LOCAL_Italian            , ///< Italian
+  HID_LOCAL_Japan_Katakana     , ///< Japan_Katakana
+  HID_LOCAL_Korean             , ///< Korean
+  HID_LOCAL_Latin_American     , ///< Latin_American
+  HID_LOCAL_Netherlands_Dutch  , ///< Netherlands/Dutch
+  HID_LOCAL_Norwegian          , ///< Norwegian
+  HID_LOCAL_Persian_Farsi      , ///< Persian (Farsi)
+  HID_LOCAL_Poland             , ///< Poland
+  HID_LOCAL_Portuguese         , ///< Portuguese
+  HID_LOCAL_Russia             , ///< Russia
+  HID_LOCAL_Slovakia           , ///< Slovakia
+  HID_LOCAL_Spanish            , ///< Spanish
+  HID_LOCAL_Swedish            , ///< Swedish
+  HID_LOCAL_Swiss_French       , ///< Swiss/French
+  HID_LOCAL_Swiss_German       , ///< Swiss/German
+  HID_LOCAL_Switzerland        , ///< Switzerland
+  HID_LOCAL_Taiwan             , ///< Taiwan
+  HID_LOCAL_Turkish_Q          , ///< Turkish-Q
+  HID_LOCAL_UK                 , ///< UK
+  HID_LOCAL_US                 , ///< US
+  HID_LOCAL_Yugoslavia         , ///< Yugoslavia
+  HID_LOCAL_Turkish_F            ///< Turkish-F
+} hid_local_enum_t;
+
+// HID protocol value used by GetProtocol / SetProtocol
+typedef enum
+{
+  HID_PROTOCOL_BOOT = 0,
+  HID_PROTOCOL_REPORT = 1
+} hid_protocol_mode_enum_t;
+
+/** @} */
+
+//--------------------------------------------------------------------+
+// GAMEPAD
+//--------------------------------------------------------------------+
+/** \addtogroup ClassDriver_HID_Gamepad Gamepad
+ *  @{ */
+
+/* From https://www.kernel.org/doc/html/latest/input/gamepad.html
+          ____________________________              __
+         / [__ZL__]          [__ZR__] \               |
+        / [__ TL __]        [__ TR __] \              | Front Triggers
+     __/________________________________\__         __|
+    /                                  _   \          |
+   /      /\           __             (N)   \         |
+  /       ||      __  |MO|  __     _       _ \        | Main Pad
+ |    <===DP===> |SE|      |ST|   (W) -|- (E) |       |
+  \       ||    ___          ___       _     /        |
+  /\      \/   /   \        /   \     (S)   /\      __|
+ /  \________ | LS  | ____ |  RS | ________/  \       |
+|         /  \ \___/ /    \ \___/ /  \         |      | Control Sticks
+|        /    \_____/      \_____/    \        |    __|
+|       /                              \       |
+ \_____/                                \_____/
+
+     |________|______|    |______|___________|
+       D-Pad    Left       Right   Action Pad
+               Stick       Stick
+
+                 |_____________|
+                    Menu Pad
+
+  Most gamepads have the following features:
+  - Action-Pad 4 buttons in diamonds-shape (on the right side) NORTH, SOUTH, WEST and EAST.
+  - D-Pad (Direction-pad) 4 buttons (on the left side) that point up, down, left and right.
+  - Menu-Pad Different constellations, but most-times 2 buttons: SELECT - START.
+  - Analog-Sticks provide freely moveable sticks to control directions, Analog-sticks may also
+  provide a digital button if you press them.
+  - Triggers are located on the upper-side of the pad in vertical direction. The upper buttons
+  are normally named Left- and Right-Triggers, the lower buttons Z-Left and Z-Right.
+  - Rumble Many devices provide force-feedback features. But are mostly just simple rumble motors.
+ */
+
+/// HID Gamepad Protocol Report.
+typedef struct TU_ATTR_PACKED
+{
+  int8_t  x;         ///< Delta x  movement of left analog-stick
+  int8_t  y;         ///< Delta y  movement of left analog-stick
+  int8_t  z;         ///< Delta z  movement of right analog-joystick
+  int8_t  rz;        ///< Delta Rz movement of right analog-joystick
+  int8_t  rx;        ///< Delta Rx movement of analog left trigger
+  int8_t  ry;        ///< Delta Ry movement of analog right trigger
+  uint8_t hat;       ///< Buttons mask for currently pressed buttons in the DPad/hat
+  uint32_t buttons;  ///< Buttons mask for currently pressed buttons
+}hid_gamepad_report_t;
+
+/// Standard Gamepad Buttons Bitmap
+typedef enum
+{
+  GAMEPAD_BUTTON_0  = TU_BIT(0),
+  GAMEPAD_BUTTON_1  = TU_BIT(1),
+  GAMEPAD_BUTTON_2  = TU_BIT(2),
+  GAMEPAD_BUTTON_3  = TU_BIT(3),
+  GAMEPAD_BUTTON_4  = TU_BIT(4),
+  GAMEPAD_BUTTON_5  = TU_BIT(5),
+  GAMEPAD_BUTTON_6  = TU_BIT(6),
+  GAMEPAD_BUTTON_7  = TU_BIT(7),
+  GAMEPAD_BUTTON_8  = TU_BIT(8),
+  GAMEPAD_BUTTON_9  = TU_BIT(9),
+  GAMEPAD_BUTTON_10 = TU_BIT(10),
+  GAMEPAD_BUTTON_11 = TU_BIT(11),
+  GAMEPAD_BUTTON_12 = TU_BIT(12),
+  GAMEPAD_BUTTON_13 = TU_BIT(13),
+  GAMEPAD_BUTTON_14 = TU_BIT(14),
+  GAMEPAD_BUTTON_15 = TU_BIT(15),
+  GAMEPAD_BUTTON_16 = TU_BIT(16),
+  GAMEPAD_BUTTON_17 = TU_BIT(17),
+  GAMEPAD_BUTTON_18 = TU_BIT(18),
+  GAMEPAD_BUTTON_19 = TU_BIT(19),
+  GAMEPAD_BUTTON_20 = TU_BIT(20),
+  GAMEPAD_BUTTON_21 = TU_BIT(21),
+  GAMEPAD_BUTTON_22 = TU_BIT(22),
+  GAMEPAD_BUTTON_23 = TU_BIT(23),
+  GAMEPAD_BUTTON_24 = TU_BIT(24),
+  GAMEPAD_BUTTON_25 = TU_BIT(25),
+  GAMEPAD_BUTTON_26 = TU_BIT(26),
+  GAMEPAD_BUTTON_27 = TU_BIT(27),
+  GAMEPAD_BUTTON_28 = TU_BIT(28),
+  GAMEPAD_BUTTON_29 = TU_BIT(29),
+  GAMEPAD_BUTTON_30 = TU_BIT(30),
+  GAMEPAD_BUTTON_31 = TU_BIT(31),
+}hid_gamepad_button_bm_t;
+
+/// Standard Gamepad Buttons Naming from Linux input event codes
+/// https://github.com/torvalds/linux/blob/master/include/uapi/linux/input-event-codes.h
+#define GAMEPAD_BUTTON_A       GAMEPAD_BUTTON_0
+#define GAMEPAD_BUTTON_SOUTH   GAMEPAD_BUTTON_0
+
+#define GAMEPAD_BUTTON_B       GAMEPAD_BUTTON_1
+#define GAMEPAD_BUTTON_EAST    GAMEPAD_BUTTON_1
+
+#define GAMEPAD_BUTTON_C       GAMEPAD_BUTTON_2
+
+#define GAMEPAD_BUTTON_X       GAMEPAD_BUTTON_3
+#define GAMEPAD_BUTTON_NORTH   GAMEPAD_BUTTON_3
+
+#define GAMEPAD_BUTTON_Y       GAMEPAD_BUTTON_4
+#define GAMEPAD_BUTTON_WEST    GAMEPAD_BUTTON_4
+
+#define GAMEPAD_BUTTON_Z       GAMEPAD_BUTTON_5
+#define GAMEPAD_BUTTON_TL      GAMEPAD_BUTTON_6
+#define GAMEPAD_BUTTON_TR      GAMEPAD_BUTTON_7
+#define GAMEPAD_BUTTON_TL2     GAMEPAD_BUTTON_8
+#define GAMEPAD_BUTTON_TR2     GAMEPAD_BUTTON_9
+#define GAMEPAD_BUTTON_SELECT  GAMEPAD_BUTTON_10
+#define GAMEPAD_BUTTON_START   GAMEPAD_BUTTON_11
+#define GAMEPAD_BUTTON_MODE    GAMEPAD_BUTTON_12
+#define GAMEPAD_BUTTON_THUMBL  GAMEPAD_BUTTON_13
+#define GAMEPAD_BUTTON_THUMBR  GAMEPAD_BUTTON_14
+
+/// Standard Gamepad HAT/DPAD Buttons (from Linux input event codes)
+typedef enum
+{
+  GAMEPAD_HAT_CENTERED   = 0,  ///< DPAD_CENTERED
+  GAMEPAD_HAT_UP         = 1,  ///< DPAD_UP
+  GAMEPAD_HAT_UP_RIGHT   = 2,  ///< DPAD_UP_RIGHT
+  GAMEPAD_HAT_RIGHT      = 3,  ///< DPAD_RIGHT
+  GAMEPAD_HAT_DOWN_RIGHT = 4,  ///< DPAD_DOWN_RIGHT
+  GAMEPAD_HAT_DOWN       = 5,  ///< DPAD_DOWN
+  GAMEPAD_HAT_DOWN_LEFT  = 6,  ///< DPAD_DOWN_LEFT
+  GAMEPAD_HAT_LEFT       = 7,  ///< DPAD_LEFT
+  GAMEPAD_HAT_UP_LEFT    = 8,  ///< DPAD_UP_LEFT
+}hid_gamepad_hat_t;
+
+/// @}
+
+//--------------------------------------------------------------------+
+// MOUSE
+//--------------------------------------------------------------------+
+/** \addtogroup ClassDriver_HID_Mouse Mouse
+ *  @{ */
+
+/// Standard HID Boot Protocol Mouse Report.
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t buttons; /**< buttons mask for currently pressed buttons in the mouse. */
+  int8_t  x;       /**< Current delta x movement of the mouse. */
+  int8_t  y;       /**< Current delta y movement on the mouse. */
+  int8_t  wheel;   /**< Current delta wheel movement on the mouse. */
+  int8_t  pan;     // using AC Pan
+} hid_mouse_report_t;
+
+/// Standard Mouse Buttons Bitmap
+typedef enum
+{
+  MOUSE_BUTTON_LEFT     = TU_BIT(0), ///< Left button
+  MOUSE_BUTTON_RIGHT    = TU_BIT(1), ///< Right button
+  MOUSE_BUTTON_MIDDLE   = TU_BIT(2), ///< Middle button
+  MOUSE_BUTTON_BACKWARD = TU_BIT(3), ///< Backward button,
+  MOUSE_BUTTON_FORWARD  = TU_BIT(4), ///< Forward button,
+}hid_mouse_button_bm_t;
+
+/// @}
+
+//--------------------------------------------------------------------+
+// Keyboard
+//--------------------------------------------------------------------+
+/** \addtogroup ClassDriver_HID_Keyboard Keyboard
+ *  @{ */
+
+/// Standard HID Boot Protocol Keyboard Report.
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t modifier;   /**< Keyboard modifier (KEYBOARD_MODIFIER_* masks). */
+  uint8_t reserved;   /**< Reserved for OEM use, always set to 0. */
+  uint8_t keycode[6]; /**< Key codes of the currently pressed keys. */
+} hid_keyboard_report_t;
+
+/// Keyboard modifier codes bitmap
+typedef enum
+{
+  KEYBOARD_MODIFIER_LEFTCTRL   = TU_BIT(0), ///< Left Control
+  KEYBOARD_MODIFIER_LEFTSHIFT  = TU_BIT(1), ///< Left Shift
+  KEYBOARD_MODIFIER_LEFTALT    = TU_BIT(2), ///< Left Alt
+  KEYBOARD_MODIFIER_LEFTGUI    = TU_BIT(3), ///< Left Window
+  KEYBOARD_MODIFIER_RIGHTCTRL  = TU_BIT(4), ///< Right Control
+  KEYBOARD_MODIFIER_RIGHTSHIFT = TU_BIT(5), ///< Right Shift
+  KEYBOARD_MODIFIER_RIGHTALT   = TU_BIT(6), ///< Right Alt
+  KEYBOARD_MODIFIER_RIGHTGUI   = TU_BIT(7)  ///< Right Window
+}hid_keyboard_modifier_bm_t;
+
+typedef enum
+{
+  KEYBOARD_LED_NUMLOCK    = TU_BIT(0), ///< Num Lock LED
+  KEYBOARD_LED_CAPSLOCK   = TU_BIT(1), ///< Caps Lock LED
+  KEYBOARD_LED_SCROLLLOCK = TU_BIT(2), ///< Scroll Lock LED
+  KEYBOARD_LED_COMPOSE    = TU_BIT(3), ///< Composition Mode
+  KEYBOARD_LED_KANA       = TU_BIT(4) ///< Kana mode
+}hid_keyboard_led_bm_t;
+
+/// @}
+
+//--------------------------------------------------------------------+
+// HID KEYCODE
+//--------------------------------------------------------------------+
+#define HID_KEY_NONE                      0x00
+#define HID_KEY_A                         0x04
+#define HID_KEY_B                         0x05
+#define HID_KEY_C                         0x06
+#define HID_KEY_D                         0x07
+#define HID_KEY_E                         0x08
+#define HID_KEY_F                         0x09
+#define HID_KEY_G                         0x0A
+#define HID_KEY_H                         0x0B
+#define HID_KEY_I                         0x0C
+#define HID_KEY_J                         0x0D
+#define HID_KEY_K                         0x0E
+#define HID_KEY_L                         0x0F
+#define HID_KEY_M                         0x10
+#define HID_KEY_N                         0x11
+#define HID_KEY_O                         0x12
+#define HID_KEY_P                         0x13
+#define HID_KEY_Q                         0x14
+#define HID_KEY_R                         0x15
+#define HID_KEY_S                         0x16
+#define HID_KEY_T                         0x17
+#define HID_KEY_U                         0x18
+#define HID_KEY_V                         0x19
+#define HID_KEY_W                         0x1A
+#define HID_KEY_X                         0x1B
+#define HID_KEY_Y                         0x1C
+#define HID_KEY_Z                         0x1D
+#define HID_KEY_1                         0x1E
+#define HID_KEY_2                         0x1F
+#define HID_KEY_3                         0x20
+#define HID_KEY_4                         0x21
+#define HID_KEY_5                         0x22
+#define HID_KEY_6                         0x23
+#define HID_KEY_7                         0x24
+#define HID_KEY_8                         0x25
+#define HID_KEY_9                         0x26
+#define HID_KEY_0                         0x27
+#define HID_KEY_ENTER                     0x28
+#define HID_KEY_ESCAPE                    0x29
+#define HID_KEY_BACKSPACE                 0x2A
+#define HID_KEY_TAB                       0x2B
+#define HID_KEY_SPACE                     0x2C
+#define HID_KEY_MINUS                     0x2D
+#define HID_KEY_EQUAL                     0x2E
+#define HID_KEY_BRACKET_LEFT              0x2F
+#define HID_KEY_BRACKET_RIGHT             0x30
+#define HID_KEY_BACKSLASH                 0x31
+#define HID_KEY_EUROPE_1                  0x32
+#define HID_KEY_SEMICOLON                 0x33
+#define HID_KEY_APOSTROPHE                0x34
+#define HID_KEY_GRAVE                     0x35
+#define HID_KEY_COMMA                     0x36
+#define HID_KEY_PERIOD                    0x37
+#define HID_KEY_SLASH                     0x38
+#define HID_KEY_CAPS_LOCK                 0x39
+#define HID_KEY_F1                        0x3A
+#define HID_KEY_F2                        0x3B
+#define HID_KEY_F3                        0x3C
+#define HID_KEY_F4                        0x3D
+#define HID_KEY_F5                        0x3E
+#define HID_KEY_F6                        0x3F
+#define HID_KEY_F7                        0x40
+#define HID_KEY_F8                        0x41
+#define HID_KEY_F9                        0x42
+#define HID_KEY_F10                       0x43
+#define HID_KEY_F11                       0x44
+#define HID_KEY_F12                       0x45
+#define HID_KEY_PRINT_SCREEN              0x46
+#define HID_KEY_SCROLL_LOCK               0x47
+#define HID_KEY_PAUSE                     0x48
+#define HID_KEY_INSERT                    0x49
+#define HID_KEY_HOME                      0x4A
+#define HID_KEY_PAGE_UP                   0x4B
+#define HID_KEY_DELETE                    0x4C
+#define HID_KEY_END                       0x4D
+#define HID_KEY_PAGE_DOWN                 0x4E
+#define HID_KEY_ARROW_RIGHT               0x4F
+#define HID_KEY_ARROW_LEFT                0x50
+#define HID_KEY_ARROW_DOWN                0x51
+#define HID_KEY_ARROW_UP                  0x52
+#define HID_KEY_NUM_LOCK                  0x53
+#define HID_KEY_KEYPAD_DIVIDE             0x54
+#define HID_KEY_KEYPAD_MULTIPLY           0x55
+#define HID_KEY_KEYPAD_SUBTRACT           0x56
+#define HID_KEY_KEYPAD_ADD                0x57
+#define HID_KEY_KEYPAD_ENTER              0x58
+#define HID_KEY_KEYPAD_1                  0x59
+#define HID_KEY_KEYPAD_2                  0x5A
+#define HID_KEY_KEYPAD_3                  0x5B
+#define HID_KEY_KEYPAD_4                  0x5C
+#define HID_KEY_KEYPAD_5                  0x5D
+#define HID_KEY_KEYPAD_6                  0x5E
+#define HID_KEY_KEYPAD_7                  0x5F
+#define HID_KEY_KEYPAD_8                  0x60
+#define HID_KEY_KEYPAD_9                  0x61
+#define HID_KEY_KEYPAD_0                  0x62
+#define HID_KEY_KEYPAD_DECIMAL            0x63
+#define HID_KEY_EUROPE_2                  0x64
+#define HID_KEY_APPLICATION               0x65
+#define HID_KEY_POWER                     0x66
+#define HID_KEY_KEYPAD_EQUAL              0x67
+#define HID_KEY_F13                       0x68
+#define HID_KEY_F14                       0x69
+#define HID_KEY_F15                       0x6A
+#define HID_KEY_F16                       0x6B
+#define HID_KEY_F17                       0x6C
+#define HID_KEY_F18                       0x6D
+#define HID_KEY_F19                       0x6E
+#define HID_KEY_F20                       0x6F
+#define HID_KEY_F21                       0x70
+#define HID_KEY_F22                       0x71
+#define HID_KEY_F23                       0x72
+#define HID_KEY_F24                       0x73
+#define HID_KEY_EXECUTE                   0x74
+#define HID_KEY_HELP                      0x75
+#define HID_KEY_MENU                      0x76
+#define HID_KEY_SELECT                    0x77
+#define HID_KEY_STOP                      0x78
+#define HID_KEY_AGAIN                     0x79
+#define HID_KEY_UNDO                      0x7A
+#define HID_KEY_CUT                       0x7B
+#define HID_KEY_COPY                      0x7C
+#define HID_KEY_PASTE                     0x7D
+#define HID_KEY_FIND                      0x7E
+#define HID_KEY_MUTE                      0x7F
+#define HID_KEY_VOLUME_UP                 0x80
+#define HID_KEY_VOLUME_DOWN               0x81
+#define HID_KEY_LOCKING_CAPS_LOCK         0x82
+#define HID_KEY_LOCKING_NUM_LOCK          0x83
+#define HID_KEY_LOCKING_SCROLL_LOCK       0x84
+#define HID_KEY_KEYPAD_COMMA              0x85
+#define HID_KEY_KEYPAD_EQUAL_SIGN         0x86
+#define HID_KEY_KANJI1                    0x87
+#define HID_KEY_KANJI2                    0x88
+#define HID_KEY_KANJI3                    0x89
+#define HID_KEY_KANJI4                    0x8A
+#define HID_KEY_KANJI5                    0x8B
+#define HID_KEY_KANJI6                    0x8C
+#define HID_KEY_KANJI7                    0x8D
+#define HID_KEY_KANJI8                    0x8E
+#define HID_KEY_KANJI9                    0x8F
+#define HID_KEY_LANG1                     0x90
+#define HID_KEY_LANG2                     0x91
+#define HID_KEY_LANG3                     0x92
+#define HID_KEY_LANG4                     0x93
+#define HID_KEY_LANG5                     0x94
+#define HID_KEY_LANG6                     0x95
+#define HID_KEY_LANG7                     0x96
+#define HID_KEY_LANG8                     0x97
+#define HID_KEY_LANG9                     0x98
+#define HID_KEY_ALTERNATE_ERASE           0x99
+#define HID_KEY_SYSREQ_ATTENTION          0x9A
+#define HID_KEY_CANCEL                    0x9B
+#define HID_KEY_CLEAR                     0x9C
+#define HID_KEY_PRIOR                     0x9D
+#define HID_KEY_RETURN                    0x9E
+#define HID_KEY_SEPARATOR                 0x9F
+#define HID_KEY_OUT                       0xA0
+#define HID_KEY_OPER                      0xA1
+#define HID_KEY_CLEAR_AGAIN               0xA2
+#define HID_KEY_CRSEL_PROPS               0xA3
+#define HID_KEY_EXSEL                     0xA4
+// RESERVED					                      0xA5-DF
+#define HID_KEY_CONTROL_LEFT              0xE0
+#define HID_KEY_SHIFT_LEFT                0xE1
+#define HID_KEY_ALT_LEFT                  0xE2
+#define HID_KEY_GUI_LEFT                  0xE3
+#define HID_KEY_CONTROL_RIGHT             0xE4
+#define HID_KEY_SHIFT_RIGHT               0xE5
+#define HID_KEY_ALT_RIGHT                 0xE6
+#define HID_KEY_GUI_RIGHT                 0xE7
+
+
+//--------------------------------------------------------------------+
+// REPORT DESCRIPTOR
+//--------------------------------------------------------------------+
+
+//------------- ITEM & TAG -------------//
+#define HID_REPORT_DATA_0(data)
+#define HID_REPORT_DATA_1(data) , data
+#define HID_REPORT_DATA_2(data) , U16_TO_U8S_LE(data)
+#define HID_REPORT_DATA_3(data) , U32_TO_U8S_LE(data)
+
+#define HID_REPORT_ITEM(data, tag, type, size) \
+  (((tag) << 4) | ((type) << 2) | (size)) HID_REPORT_DATA_##size(data)
+
+// Report Item Types
+enum {
+  RI_TYPE_MAIN   = 0,
+  RI_TYPE_GLOBAL = 1,
+  RI_TYPE_LOCAL  = 2
+};
+
+//------------- Main Items - HID 1.11 section 6.2.2.4 -------------//
+
+// Report Item Main group
+enum {
+  RI_MAIN_INPUT          = 8,
+  RI_MAIN_OUTPUT         = 9,
+  RI_MAIN_COLLECTION     = 10,
+  RI_MAIN_FEATURE        = 11,
+  RI_MAIN_COLLECTION_END = 12
+};
+
+#define HID_INPUT(x)           HID_REPORT_ITEM(x, RI_MAIN_INPUT         , RI_TYPE_MAIN, 1)
+#define HID_OUTPUT(x)          HID_REPORT_ITEM(x, RI_MAIN_OUTPUT        , RI_TYPE_MAIN, 1)
+#define HID_COLLECTION(x)      HID_REPORT_ITEM(x, RI_MAIN_COLLECTION    , RI_TYPE_MAIN, 1)
+#define HID_FEATURE(x)         HID_REPORT_ITEM(x, RI_MAIN_FEATURE       , RI_TYPE_MAIN, 1)
+#define HID_COLLECTION_END     HID_REPORT_ITEM(x, RI_MAIN_COLLECTION_END, RI_TYPE_MAIN, 0)
+
+//------------- Input, Output, Feature - HID 1.11 section 6.2.2.5 -------------//
+#define HID_DATA             (0<<0)
+#define HID_CONSTANT         (1<<0)
+
+#define HID_ARRAY            (0<<1)
+#define HID_VARIABLE         (1<<1)
+
+#define HID_ABSOLUTE         (0<<2)
+#define HID_RELATIVE         (1<<2)
+
+#define HID_WRAP_NO          (0<<3)
+#define HID_WRAP             (1<<3)
+
+#define HID_LINEAR           (0<<4)
+#define HID_NONLINEAR        (1<<4)
+
+#define HID_PREFERRED_STATE  (0<<5)
+#define HID_PREFERRED_NO     (1<<5)
+
+#define HID_NO_NULL_POSITION (0<<6)
+#define HID_NULL_STATE       (1<<6)
+
+#define HID_NON_VOLATILE     (0<<7)
+#define HID_VOLATILE         (1<<7)
+
+#define HID_BITFIELD         (0<<8)
+#define HID_BUFFERED_BYTES   (1<<8)
+
+//------------- Collection Item - HID 1.11 section 6.2.2.6 -------------//
+enum {
+  HID_COLLECTION_PHYSICAL = 0,
+  HID_COLLECTION_APPLICATION,
+  HID_COLLECTION_LOGICAL,
+  HID_COLLECTION_REPORT,
+  HID_COLLECTION_NAMED_ARRAY,
+  HID_COLLECTION_USAGE_SWITCH,
+  HID_COLLECTION_USAGE_MODIFIER
+};
+
+//------------- Global Items - HID 1.11 section 6.2.2.7 -------------//
+
+// Report Item Global group
+enum {
+  RI_GLOBAL_USAGE_PAGE    = 0,
+  RI_GLOBAL_LOGICAL_MIN   = 1,
+  RI_GLOBAL_LOGICAL_MAX   = 2,
+  RI_GLOBAL_PHYSICAL_MIN  = 3,
+  RI_GLOBAL_PHYSICAL_MAX  = 4,
+  RI_GLOBAL_UNIT_EXPONENT = 5,
+  RI_GLOBAL_UNIT          = 6,
+  RI_GLOBAL_REPORT_SIZE   = 7,
+  RI_GLOBAL_REPORT_ID     = 8,
+  RI_GLOBAL_REPORT_COUNT  = 9,
+  RI_GLOBAL_PUSH          = 10,
+  RI_GLOBAL_POP           = 11
+};
+
+#define HID_USAGE_PAGE(x)         HID_REPORT_ITEM(x, RI_GLOBAL_USAGE_PAGE, RI_TYPE_GLOBAL, 1)
+#define HID_USAGE_PAGE_N(x, n)    HID_REPORT_ITEM(x, RI_GLOBAL_USAGE_PAGE, RI_TYPE_GLOBAL, n)
+
+#define HID_LOGICAL_MIN(x)        HID_REPORT_ITEM(x, RI_GLOBAL_LOGICAL_MIN, RI_TYPE_GLOBAL, 1)
+#define HID_LOGICAL_MIN_N(x, n)   HID_REPORT_ITEM(x, RI_GLOBAL_LOGICAL_MIN, RI_TYPE_GLOBAL, n)
+
+#define HID_LOGICAL_MAX(x)        HID_REPORT_ITEM(x, RI_GLOBAL_LOGICAL_MAX, RI_TYPE_GLOBAL, 1)
+#define HID_LOGICAL_MAX_N(x, n)   HID_REPORT_ITEM(x, RI_GLOBAL_LOGICAL_MAX, RI_TYPE_GLOBAL, n)
+
+#define HID_PHYSICAL_MIN(x)       HID_REPORT_ITEM(x, RI_GLOBAL_PHYSICAL_MIN, RI_TYPE_GLOBAL, 1)
+#define HID_PHYSICAL_MIN_N(x, n)  HID_REPORT_ITEM(x, RI_GLOBAL_PHYSICAL_MIN, RI_TYPE_GLOBAL, n)
+
+#define HID_PHYSICAL_MAX(x)       HID_REPORT_ITEM(x, RI_GLOBAL_PHYSICAL_MAX, RI_TYPE_GLOBAL, 1)
+#define HID_PHYSICAL_MAX_N(x, n)  HID_REPORT_ITEM(x, RI_GLOBAL_PHYSICAL_MAX, RI_TYPE_GLOBAL, n)
+
+#define HID_UNIT_EXPONENT(x)      HID_REPORT_ITEM(x, RI_GLOBAL_UNIT_EXPONENT, RI_TYPE_GLOBAL, 1)
+#define HID_UNIT_EXPONENT_N(x, n) HID_REPORT_ITEM(x, RI_GLOBAL_UNIT_EXPONENT, RI_TYPE_GLOBAL, n)
+
+#define HID_UNIT(x)               HID_REPORT_ITEM(x, RI_GLOBAL_UNIT, RI_TYPE_GLOBAL, 1)
+#define HID_UNIT_N(x, n)          HID_REPORT_ITEM(x, RI_GLOBAL_UNIT, RI_TYPE_GLOBAL, n)
+
+#define HID_REPORT_SIZE(x)        HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_SIZE, RI_TYPE_GLOBAL, 1)
+#define HID_REPORT_SIZE_N(x, n)   HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_SIZE, RI_TYPE_GLOBAL, n)
+
+#define HID_REPORT_ID(x)          HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_ID, RI_TYPE_GLOBAL, 1),
+#define HID_REPORT_ID_N(x, n)     HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_ID, RI_TYPE_GLOBAL, n),
+
+#define HID_REPORT_COUNT(x)       HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_COUNT, RI_TYPE_GLOBAL, 1)
+#define HID_REPORT_COUNT_N(x, n)  HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_COUNT, RI_TYPE_GLOBAL, n)
+
+#define HID_PUSH                  HID_REPORT_ITEM(x, RI_GLOBAL_PUSH, RI_TYPE_GLOBAL, 0)
+#define HID_POP                   HID_REPORT_ITEM(x, RI_GLOBAL_POP, RI_TYPE_GLOBAL, 0)
+
+//------------- LOCAL ITEMS 6.2.2.8 -------------//
+
+enum {
+  RI_LOCAL_USAGE            = 0,
+  RI_LOCAL_USAGE_MIN        = 1,
+  RI_LOCAL_USAGE_MAX        = 2,
+  RI_LOCAL_DESIGNATOR_INDEX = 3,
+  RI_LOCAL_DESIGNATOR_MIN   = 4,
+  RI_LOCAL_DESIGNATOR_MAX   = 5,
+  // 6 is reserved
+  RI_LOCAL_STRING_INDEX     = 7,
+  RI_LOCAL_STRING_MIN       = 8,
+  RI_LOCAL_STRING_MAX       = 9,
+  RI_LOCAL_DELIMITER        = 10,
+};
+
+#define HID_USAGE(x)              HID_REPORT_ITEM(x, RI_LOCAL_USAGE, RI_TYPE_LOCAL, 1)
+#define HID_USAGE_N(x, n)         HID_REPORT_ITEM(x, RI_LOCAL_USAGE, RI_TYPE_LOCAL, n)
+
+#define HID_USAGE_MIN(x)          HID_REPORT_ITEM(x, RI_LOCAL_USAGE_MIN, RI_TYPE_LOCAL, 1)
+#define HID_USAGE_MIN_N(x, n)     HID_REPORT_ITEM(x, RI_LOCAL_USAGE_MIN, RI_TYPE_LOCAL, n)
+
+#define HID_USAGE_MAX(x)          HID_REPORT_ITEM(x, RI_LOCAL_USAGE_MAX, RI_TYPE_LOCAL, 1)
+#define HID_USAGE_MAX_N(x, n)     HID_REPORT_ITEM(x, RI_LOCAL_USAGE_MAX, RI_TYPE_LOCAL, n)
+
+//--------------------------------------------------------------------+
+// Usage Table
+//--------------------------------------------------------------------+
+
+/// HID Usage Table - Table 1: Usage Page Summary
+enum {
+  HID_USAGE_PAGE_DESKTOP         = 0x01,
+  HID_USAGE_PAGE_SIMULATE        = 0x02,
+  HID_USAGE_PAGE_VIRTUAL_REALITY = 0x03,
+  HID_USAGE_PAGE_SPORT           = 0x04,
+  HID_USAGE_PAGE_GAME            = 0x05,
+  HID_USAGE_PAGE_GENERIC_DEVICE  = 0x06,
+  HID_USAGE_PAGE_KEYBOARD        = 0x07,
+  HID_USAGE_PAGE_LED             = 0x08,
+  HID_USAGE_PAGE_BUTTON          = 0x09,
+  HID_USAGE_PAGE_ORDINAL         = 0x0a,
+  HID_USAGE_PAGE_TELEPHONY       = 0x0b,
+  HID_USAGE_PAGE_CONSUMER        = 0x0c,
+  HID_USAGE_PAGE_DIGITIZER       = 0x0d,
+  HID_USAGE_PAGE_PID             = 0x0f,
+  HID_USAGE_PAGE_UNICODE         = 0x10,
+  HID_USAGE_PAGE_ALPHA_DISPLAY   = 0x14,
+  HID_USAGE_PAGE_MEDICAL         = 0x40,
+  HID_USAGE_PAGE_MONITOR         = 0x80, //0x80 - 0x83
+  HID_USAGE_PAGE_POWER           = 0x84, // 0x084 - 0x87
+  HID_USAGE_PAGE_BARCODE_SCANNER = 0x8c,
+  HID_USAGE_PAGE_SCALE           = 0x8d,
+  HID_USAGE_PAGE_MSR             = 0x8e,
+  HID_USAGE_PAGE_CAMERA          = 0x90,
+  HID_USAGE_PAGE_ARCADE          = 0x91,
+  HID_USAGE_PAGE_VENDOR          = 0xFF00 // 0xFF00 - 0xFFFF
+};
+
+/// HID Usage Table - Table 6: Generic Desktop Page
+enum {
+  HID_USAGE_DESKTOP_POINTER                               = 0x01,
+  HID_USAGE_DESKTOP_MOUSE                                 = 0x02,
+  HID_USAGE_DESKTOP_JOYSTICK                              = 0x04,
+  HID_USAGE_DESKTOP_GAMEPAD                               = 0x05,
+  HID_USAGE_DESKTOP_KEYBOARD                              = 0x06,
+  HID_USAGE_DESKTOP_KEYPAD                                = 0x07,
+  HID_USAGE_DESKTOP_MULTI_AXIS_CONTROLLER                 = 0x08,
+  HID_USAGE_DESKTOP_TABLET_PC_SYSTEM                      = 0x09,
+  HID_USAGE_DESKTOP_X                                     = 0x30,
+  HID_USAGE_DESKTOP_Y                                     = 0x31,
+  HID_USAGE_DESKTOP_Z                                     = 0x32,
+  HID_USAGE_DESKTOP_RX                                    = 0x33,
+  HID_USAGE_DESKTOP_RY                                    = 0x34,
+  HID_USAGE_DESKTOP_RZ                                    = 0x35,
+  HID_USAGE_DESKTOP_SLIDER                                = 0x36,
+  HID_USAGE_DESKTOP_DIAL                                  = 0x37,
+  HID_USAGE_DESKTOP_WHEEL                                 = 0x38,
+  HID_USAGE_DESKTOP_HAT_SWITCH                            = 0x39,
+  HID_USAGE_DESKTOP_COUNTED_BUFFER                        = 0x3a,
+  HID_USAGE_DESKTOP_BYTE_COUNT                            = 0x3b,
+  HID_USAGE_DESKTOP_MOTION_WAKEUP                         = 0x3c,
+  HID_USAGE_DESKTOP_START                                 = 0x3d,
+  HID_USAGE_DESKTOP_SELECT                                = 0x3e,
+  HID_USAGE_DESKTOP_VX                                    = 0x40,
+  HID_USAGE_DESKTOP_VY                                    = 0x41,
+  HID_USAGE_DESKTOP_VZ                                    = 0x42,
+  HID_USAGE_DESKTOP_VBRX                                  = 0x43,
+  HID_USAGE_DESKTOP_VBRY                                  = 0x44,
+  HID_USAGE_DESKTOP_VBRZ                                  = 0x45,
+  HID_USAGE_DESKTOP_VNO                                   = 0x46,
+  HID_USAGE_DESKTOP_FEATURE_NOTIFICATION                  = 0x47,
+  HID_USAGE_DESKTOP_RESOLUTION_MULTIPLIER                 = 0x48,
+  HID_USAGE_DESKTOP_SYSTEM_CONTROL                        = 0x80,
+  HID_USAGE_DESKTOP_SYSTEM_POWER_DOWN                     = 0x81,
+  HID_USAGE_DESKTOP_SYSTEM_SLEEP                          = 0x82,
+  HID_USAGE_DESKTOP_SYSTEM_WAKE_UP                        = 0x83,
+  HID_USAGE_DESKTOP_SYSTEM_CONTEXT_MENU                   = 0x84,
+  HID_USAGE_DESKTOP_SYSTEM_MAIN_MENU                      = 0x85,
+  HID_USAGE_DESKTOP_SYSTEM_APP_MENU                       = 0x86,
+  HID_USAGE_DESKTOP_SYSTEM_MENU_HELP                      = 0x87,
+  HID_USAGE_DESKTOP_SYSTEM_MENU_EXIT                      = 0x88,
+  HID_USAGE_DESKTOP_SYSTEM_MENU_SELECT                    = 0x89,
+  HID_USAGE_DESKTOP_SYSTEM_MENU_RIGHT                     = 0x8A,
+  HID_USAGE_DESKTOP_SYSTEM_MENU_LEFT                      = 0x8B,
+  HID_USAGE_DESKTOP_SYSTEM_MENU_UP                        = 0x8C,
+  HID_USAGE_DESKTOP_SYSTEM_MENU_DOWN                      = 0x8D,
+  HID_USAGE_DESKTOP_SYSTEM_COLD_RESTART                   = 0x8E,
+  HID_USAGE_DESKTOP_SYSTEM_WARM_RESTART                   = 0x8F,
+  HID_USAGE_DESKTOP_DPAD_UP                               = 0x90,
+  HID_USAGE_DESKTOP_DPAD_DOWN                             = 0x91,
+  HID_USAGE_DESKTOP_DPAD_RIGHT                            = 0x92,
+  HID_USAGE_DESKTOP_DPAD_LEFT                             = 0x93,
+  HID_USAGE_DESKTOP_SYSTEM_DOCK                           = 0xA0,
+  HID_USAGE_DESKTOP_SYSTEM_UNDOCK                         = 0xA1,
+  HID_USAGE_DESKTOP_SYSTEM_SETUP                          = 0xA2,
+  HID_USAGE_DESKTOP_SYSTEM_BREAK                          = 0xA3,
+  HID_USAGE_DESKTOP_SYSTEM_DEBUGGER_BREAK                 = 0xA4,
+  HID_USAGE_DESKTOP_APPLICATION_BREAK                     = 0xA5,
+  HID_USAGE_DESKTOP_APPLICATION_DEBUGGER_BREAK            = 0xA6,
+  HID_USAGE_DESKTOP_SYSTEM_SPEAKER_MUTE                   = 0xA7,
+  HID_USAGE_DESKTOP_SYSTEM_HIBERNATE                      = 0xA8,
+  HID_USAGE_DESKTOP_SYSTEM_DISPLAY_INVERT                 = 0xB0,
+  HID_USAGE_DESKTOP_SYSTEM_DISPLAY_INTERNAL               = 0xB1,
+  HID_USAGE_DESKTOP_SYSTEM_DISPLAY_EXTERNAL               = 0xB2,
+  HID_USAGE_DESKTOP_SYSTEM_DISPLAY_BOTH                   = 0xB3,
+  HID_USAGE_DESKTOP_SYSTEM_DISPLAY_DUAL                   = 0xB4,
+  HID_USAGE_DESKTOP_SYSTEM_DISPLAY_TOGGLE_INT_EXT         = 0xB5,
+  HID_USAGE_DESKTOP_SYSTEM_DISPLAY_SWAP_PRIMARY_SECONDARY = 0xB6,
+  HID_USAGE_DESKTOP_SYSTEM_DISPLAY_LCD_AUTOSCALE          = 0xB7
+};
+
+
+/// HID Usage Table: Consumer Page (0x0C)
+/// Only contains controls that supported by Windows (whole list is too long)
+enum
+{
+  // Generic Control
+  HID_USAGE_CONSUMER_CONTROL                           = 0x0001,
+
+  // Power Control
+  HID_USAGE_CONSUMER_POWER                             = 0x0030,
+  HID_USAGE_CONSUMER_RESET                             = 0x0031,
+  HID_USAGE_CONSUMER_SLEEP                             = 0x0032,
+
+  // Screen Brightness
+  HID_USAGE_CONSUMER_BRIGHTNESS_INCREMENT              = 0x006F,
+  HID_USAGE_CONSUMER_BRIGHTNESS_DECREMENT              = 0x0070,
+
+  // These HID usages operate only on mobile systems (battery powered) and
+  // require Windows 8 (build 8302 or greater).
+  HID_USAGE_CONSUMER_WIRELESS_RADIO_CONTROLS           = 0x000C,
+  HID_USAGE_CONSUMER_WIRELESS_RADIO_BUTTONS            = 0x00C6,
+  HID_USAGE_CONSUMER_WIRELESS_RADIO_LED                = 0x00C7,
+  HID_USAGE_CONSUMER_WIRELESS_RADIO_SLIDER_SWITCH      = 0x00C8,
+
+  // Media Control
+  HID_USAGE_CONSUMER_PLAY_PAUSE                        = 0x00CD,
+  HID_USAGE_CONSUMER_SCAN_NEXT                         = 0x00B5,
+  HID_USAGE_CONSUMER_SCAN_PREVIOUS                     = 0x00B6,
+  HID_USAGE_CONSUMER_STOP                              = 0x00B7,
+  HID_USAGE_CONSUMER_VOLUME                            = 0x00E0,
+  HID_USAGE_CONSUMER_MUTE                              = 0x00E2,
+  HID_USAGE_CONSUMER_BASS                              = 0x00E3,
+  HID_USAGE_CONSUMER_TREBLE                            = 0x00E4,
+  HID_USAGE_CONSUMER_BASS_BOOST                        = 0x00E5,
+  HID_USAGE_CONSUMER_VOLUME_INCREMENT                  = 0x00E9,
+  HID_USAGE_CONSUMER_VOLUME_DECREMENT                  = 0x00EA,
+  HID_USAGE_CONSUMER_BASS_INCREMENT                    = 0x0152,
+  HID_USAGE_CONSUMER_BASS_DECREMENT                    = 0x0153,
+  HID_USAGE_CONSUMER_TREBLE_INCREMENT                  = 0x0154,
+  HID_USAGE_CONSUMER_TREBLE_DECREMENT                  = 0x0155,
+
+  // Application Launcher
+  HID_USAGE_CONSUMER_AL_CONSUMER_CONTROL_CONFIGURATION = 0x0183,
+  HID_USAGE_CONSUMER_AL_EMAIL_READER                   = 0x018A,
+  HID_USAGE_CONSUMER_AL_CALCULATOR                     = 0x0192,
+  HID_USAGE_CONSUMER_AL_LOCAL_BROWSER                  = 0x0194,
+
+  // Browser/Explorer Specific
+  HID_USAGE_CONSUMER_AC_SEARCH                         = 0x0221,
+  HID_USAGE_CONSUMER_AC_HOME                           = 0x0223,
+  HID_USAGE_CONSUMER_AC_BACK                           = 0x0224,
+  HID_USAGE_CONSUMER_AC_FORWARD                        = 0x0225,
+  HID_USAGE_CONSUMER_AC_STOP                           = 0x0226,
+  HID_USAGE_CONSUMER_AC_REFRESH                        = 0x0227,
+  HID_USAGE_CONSUMER_AC_BOOKMARKS                      = 0x022A,
+
+  // Mouse Horizontal scroll
+  HID_USAGE_CONSUMER_AC_PAN                            = 0x0238,
+};
+
+/*--------------------------------------------------------------------
+ * ASCII to KEYCODE Conversion
+ *  Expand to array of [128][2] (shift, keycode)
+ *
+ * Usage: example to convert input chr into keyboard report (modifier + keycode)
+ *
+ *  uint8_t const conv_table[128][2] =  { HID_ASCII_TO_KEYCODE };
+ *
+ *  uint8_t keycode[6] = { 0 };
+ *  uint8_t modifier   = 0;
+ *
+ *  if ( conv_table[chr][0] ) modifier = KEYBOARD_MODIFIER_LEFTSHIFT;
+ *  keycode[0] = conv_table[chr][1];
+ *  tud_hid_keyboard_report(report_id, modifier, keycode);
+ *
+ *--------------------------------------------------------------------*/
+#define HID_ASCII_TO_KEYCODE \
+    {0, 0                     }, /* 0x00 Null      */ \
+    {0, 0                     }, /* 0x01           */ \
+    {0, 0                     }, /* 0x02           */ \
+    {0, 0                     }, /* 0x03           */ \
+    {0, 0                     }, /* 0x04           */ \
+    {0, 0                     }, /* 0x05           */ \
+    {0, 0                     }, /* 0x06           */ \
+    {0, 0                     }, /* 0x07           */ \
+    {0, HID_KEY_BACKSPACE     }, /* 0x08 Backspace */ \
+    {0, HID_KEY_TAB           }, /* 0x09 Tab       */ \
+    {0, HID_KEY_ENTER         }, /* 0x0A Line Feed */ \
+    {0, 0                     }, /* 0x0B           */ \
+    {0, 0                     }, /* 0x0C           */ \
+    {0, HID_KEY_ENTER         }, /* 0x0D CR        */ \
+    {0, 0                     }, /* 0x0E           */ \
+    {0, 0                     }, /* 0x0F           */ \
+    {0, 0                     }, /* 0x10           */ \
+    {0, 0                     }, /* 0x11           */ \
+    {0, 0                     }, /* 0x12           */ \
+    {0, 0                     }, /* 0x13           */ \
+    {0, 0                     }, /* 0x14           */ \
+    {0, 0                     }, /* 0x15           */ \
+    {0, 0                     }, /* 0x16           */ \
+    {0, 0                     }, /* 0x17           */ \
+    {0, 0                     }, /* 0x18           */ \
+    {0, 0                     }, /* 0x19           */ \
+    {0, 0                     }, /* 0x1A           */ \
+    {0, HID_KEY_ESCAPE        }, /* 0x1B Escape    */ \
+    {0, 0                     }, /* 0x1C           */ \
+    {0, 0                     }, /* 0x1D           */ \
+    {0, 0                     }, /* 0x1E           */ \
+    {0, 0                     }, /* 0x1F           */ \
+                                                      \
+    {0, HID_KEY_SPACE         }, /* 0x20           */ \
+    {1, HID_KEY_1             }, /* 0x21 !         */ \
+    {1, HID_KEY_APOSTROPHE    }, /* 0x22 "         */ \
+    {1, HID_KEY_3             }, /* 0x23 #         */ \
+    {1, HID_KEY_4             }, /* 0x24 $         */ \
+    {1, HID_KEY_5             }, /* 0x25 %         */ \
+    {1, HID_KEY_7             }, /* 0x26 &         */ \
+    {0, HID_KEY_APOSTROPHE    }, /* 0x27 '         */ \
+    {1, HID_KEY_9             }, /* 0x28 (         */ \
+    {1, HID_KEY_0             }, /* 0x29 )         */ \
+    {1, HID_KEY_8             }, /* 0x2A *         */ \
+    {1, HID_KEY_EQUAL         }, /* 0x2B +         */ \
+    {0, HID_KEY_COMMA         }, /* 0x2C ,         */ \
+    {0, HID_KEY_MINUS         }, /* 0x2D -         */ \
+    {0, HID_KEY_PERIOD        }, /* 0x2E .         */ \
+    {0, HID_KEY_SLASH         }, /* 0x2F /         */ \
+    {0, HID_KEY_0             }, /* 0x30 0         */ \
+    {0, HID_KEY_1             }, /* 0x31 1         */ \
+    {0, HID_KEY_2             }, /* 0x32 2         */ \
+    {0, HID_KEY_3             }, /* 0x33 3         */ \
+    {0, HID_KEY_4             }, /* 0x34 4         */ \
+    {0, HID_KEY_5             }, /* 0x35 5         */ \
+    {0, HID_KEY_6             }, /* 0x36 6         */ \
+    {0, HID_KEY_7             }, /* 0x37 7         */ \
+    {0, HID_KEY_8             }, /* 0x38 8         */ \
+    {0, HID_KEY_9             }, /* 0x39 9         */ \
+    {1, HID_KEY_SEMICOLON     }, /* 0x3A :         */ \
+    {0, HID_KEY_SEMICOLON     }, /* 0x3B ;         */ \
+    {1, HID_KEY_COMMA         }, /* 0x3C <         */ \
+    {0, HID_KEY_EQUAL         }, /* 0x3D =         */ \
+    {1, HID_KEY_PERIOD        }, /* 0x3E >         */ \
+    {1, HID_KEY_SLASH         }, /* 0x3F ?         */ \
+                                                      \
+    {1, HID_KEY_2             }, /* 0x40 @         */ \
+    {1, HID_KEY_A             }, /* 0x41 A         */ \
+    {1, HID_KEY_B             }, /* 0x42 B         */ \
+    {1, HID_KEY_C             }, /* 0x43 C         */ \
+    {1, HID_KEY_D             }, /* 0x44 D         */ \
+    {1, HID_KEY_E             }, /* 0x45 E         */ \
+    {1, HID_KEY_F             }, /* 0x46 F         */ \
+    {1, HID_KEY_G             }, /* 0x47 G         */ \
+    {1, HID_KEY_H             }, /* 0x48 H         */ \
+    {1, HID_KEY_I             }, /* 0x49 I         */ \
+    {1, HID_KEY_J             }, /* 0x4A J         */ \
+    {1, HID_KEY_K             }, /* 0x4B K         */ \
+    {1, HID_KEY_L             }, /* 0x4C L         */ \
+    {1, HID_KEY_M             }, /* 0x4D M         */ \
+    {1, HID_KEY_N             }, /* 0x4E N         */ \
+    {1, HID_KEY_O             }, /* 0x4F O         */ \
+    {1, HID_KEY_P             }, /* 0x50 P         */ \
+    {1, HID_KEY_Q             }, /* 0x51 Q         */ \
+    {1, HID_KEY_R             }, /* 0x52 R         */ \
+    {1, HID_KEY_S             }, /* 0x53 S         */ \
+    {1, HID_KEY_T             }, /* 0x55 T         */ \
+    {1, HID_KEY_U             }, /* 0x55 U         */ \
+    {1, HID_KEY_V             }, /* 0x56 V         */ \
+    {1, HID_KEY_W             }, /* 0x57 W         */ \
+    {1, HID_KEY_X             }, /* 0x58 X         */ \
+    {1, HID_KEY_Y             }, /* 0x59 Y         */ \
+    {1, HID_KEY_Z             }, /* 0x5A Z         */ \
+    {0, HID_KEY_BRACKET_LEFT  }, /* 0x5B [         */ \
+    {0, HID_KEY_BACKSLASH     }, /* 0x5C '\'       */ \
+    {0, HID_KEY_BRACKET_RIGHT }, /* 0x5D ]         */ \
+    {1, HID_KEY_6             }, /* 0x5E ^         */ \
+    {1, HID_KEY_MINUS         }, /* 0x5F _         */ \
+                                                      \
+    {0, HID_KEY_GRAVE         }, /* 0x60 `         */ \
+    {0, HID_KEY_A             }, /* 0x61 a         */ \
+    {0, HID_KEY_B             }, /* 0x62 b         */ \
+    {0, HID_KEY_C             }, /* 0x63 c         */ \
+    {0, HID_KEY_D             }, /* 0x66 d         */ \
+    {0, HID_KEY_E             }, /* 0x65 e         */ \
+    {0, HID_KEY_F             }, /* 0x66 f         */ \
+    {0, HID_KEY_G             }, /* 0x67 g         */ \
+    {0, HID_KEY_H             }, /* 0x68 h         */ \
+    {0, HID_KEY_I             }, /* 0x69 i         */ \
+    {0, HID_KEY_J             }, /* 0x6A j         */ \
+    {0, HID_KEY_K             }, /* 0x6B k         */ \
+    {0, HID_KEY_L             }, /* 0x6C l         */ \
+    {0, HID_KEY_M             }, /* 0x6D m         */ \
+    {0, HID_KEY_N             }, /* 0x6E n         */ \
+    {0, HID_KEY_O             }, /* 0x6F o         */ \
+    {0, HID_KEY_P             }, /* 0x70 p         */ \
+    {0, HID_KEY_Q             }, /* 0x71 q         */ \
+    {0, HID_KEY_R             }, /* 0x72 r         */ \
+    {0, HID_KEY_S             }, /* 0x73 s         */ \
+    {0, HID_KEY_T             }, /* 0x75 t         */ \
+    {0, HID_KEY_U             }, /* 0x75 u         */ \
+    {0, HID_KEY_V             }, /* 0x76 v         */ \
+    {0, HID_KEY_W             }, /* 0x77 w         */ \
+    {0, HID_KEY_X             }, /* 0x78 x         */ \
+    {0, HID_KEY_Y             }, /* 0x79 y         */ \
+    {0, HID_KEY_Z             }, /* 0x7A z         */ \
+    {1, HID_KEY_BRACKET_LEFT  }, /* 0x7B {         */ \
+    {1, HID_KEY_BACKSLASH     }, /* 0x7C |         */ \
+    {1, HID_KEY_BRACKET_RIGHT }, /* 0x7D }         */ \
+    {1, HID_KEY_GRAVE         }, /* 0x7E ~         */ \
+    {0, HID_KEY_DELETE        }  /* 0x7F Delete    */ \
+
+/*--------------------------------------------------------------------
+ * KEYCODE to Ascii Conversion
+ *  Expand to array of [128][2] (ascii without shift, ascii with shift)
+ *
+ * Usage: example to convert ascii from keycode (key) and shift modifier (shift).
+ * Here we assume key < 128 ( printable )
+ *
+ *  uint8_t const conv_table[128][2] =  { HID_KEYCODE_TO_ASCII };
+ *  char ch = shift ? conv_table[chr][1] : conv_table[chr][0];
+ *
+ *--------------------------------------------------------------------*/
+#define HID_KEYCODE_TO_ASCII    \
+    {0     , 0      }, /* 0x00 */ \
+    {0     , 0      }, /* 0x01 */ \
+    {0     , 0      }, /* 0x02 */ \
+    {0     , 0      }, /* 0x03 */ \
+    {'a'   , 'A'    }, /* 0x04 */ \
+    {'b'   , 'B'    }, /* 0x05 */ \
+    {'c'   , 'C'    }, /* 0x06 */ \
+    {'d'   , 'D'    }, /* 0x07 */ \
+    {'e'   , 'E'    }, /* 0x08 */ \
+    {'f'   , 'F'    }, /* 0x09 */ \
+    {'g'   , 'G'    }, /* 0x0a */ \
+    {'h'   , 'H'    }, /* 0x0b */ \
+    {'i'   , 'I'    }, /* 0x0c */ \
+    {'j'   , 'J'    }, /* 0x0d */ \
+    {'k'   , 'K'    }, /* 0x0e */ \
+    {'l'   , 'L'    }, /* 0x0f */ \
+    {'m'   , 'M'    }, /* 0x10 */ \
+    {'n'   , 'N'    }, /* 0x11 */ \
+    {'o'   , 'O'    }, /* 0x12 */ \
+    {'p'   , 'P'    }, /* 0x13 */ \
+    {'q'   , 'Q'    }, /* 0x14 */ \
+    {'r'   , 'R'    }, /* 0x15 */ \
+    {'s'   , 'S'    }, /* 0x16 */ \
+    {'t'   , 'T'    }, /* 0x17 */ \
+    {'u'   , 'U'    }, /* 0x18 */ \
+    {'v'   , 'V'    }, /* 0x19 */ \
+    {'w'   , 'W'    }, /* 0x1a */ \
+    {'x'   , 'X'    }, /* 0x1b */ \
+    {'y'   , 'Y'    }, /* 0x1c */ \
+    {'z'   , 'Z'    }, /* 0x1d */ \
+    {'1'   , '!'    }, /* 0x1e */ \
+    {'2'   , '@'    }, /* 0x1f */ \
+    {'3'   , '#'    }, /* 0x20 */ \
+    {'4'   , '$'    }, /* 0x21 */ \
+    {'5'   , '%'    }, /* 0x22 */ \
+    {'6'   , '^'    }, /* 0x23 */ \
+    {'7'   , '&'    }, /* 0x24 */ \
+    {'8'   , '*'    }, /* 0x25 */ \
+    {'9'   , '('    }, /* 0x26 */ \
+    {'0'   , ')'    }, /* 0x27 */ \
+    {'\r'  , '\r'   }, /* 0x28 */ \
+    {'\x1b', '\x1b' }, /* 0x29 */ \
+    {'\b'  , '\b'   }, /* 0x2a */ \
+    {'\t'  , '\t'   }, /* 0x2b */ \
+    {' '   , ' '    }, /* 0x2c */ \
+    {'-'   , '_'    }, /* 0x2d */ \
+    {'='   , '+'    }, /* 0x2e */ \
+    {'['   , '{'    }, /* 0x2f */ \
+    {']'   , '}'    }, /* 0x30 */ \
+    {'\\'  , '|'    }, /* 0x31 */ \
+    {'#'   , '~'    }, /* 0x32 */ \
+    {';'   , ':'    }, /* 0x33 */ \
+    {'\''  , '\"'   }, /* 0x34 */ \
+    {'`'   , '~'    }, /* 0x35 */ \
+    {','   , '<'    }, /* 0x36 */ \
+    {'.'   , '>'    }, /* 0x37 */ \
+    {'/'   , '?'    }, /* 0x38 */ \
+                                  \
+    {0     , 0      }, /* 0x39 */ \
+    {0     , 0      }, /* 0x3a */ \
+    {0     , 0      }, /* 0x3b */ \
+    {0     , 0      }, /* 0x3c */ \
+    {0     , 0      }, /* 0x3d */ \
+    {0     , 0      }, /* 0x3e */ \
+    {0     , 0      }, /* 0x3f */ \
+    {0     , 0      }, /* 0x40 */ \
+    {0     , 0      }, /* 0x41 */ \
+    {0     , 0      }, /* 0x42 */ \
+    {0     , 0      }, /* 0x43 */ \
+    {0     , 0      }, /* 0x44 */ \
+    {0     , 0      }, /* 0x45 */ \
+    {0     , 0      }, /* 0x46 */ \
+    {0     , 0      }, /* 0x47 */ \
+    {0     , 0      }, /* 0x48 */ \
+    {0     , 0      }, /* 0x49 */ \
+    {0     , 0      }, /* 0x4a */ \
+    {0     , 0      }, /* 0x4b */ \
+    {0     , 0      }, /* 0x4c */ \
+    {0     , 0      }, /* 0x4d */ \
+    {0     , 0      }, /* 0x4e */ \
+    {0     , 0      }, /* 0x4f */ \
+    {0     , 0      }, /* 0x50 */ \
+    {0     , 0      }, /* 0x51 */ \
+    {0     , 0      }, /* 0x52 */ \
+    {0     , 0      }, /* 0x53 */ \
+                                  \
+    {'/'   , '/'    }, /* 0x54 */ \
+    {'*'   , '*'    }, /* 0x55 */ \
+    {'-'   , '-'    }, /* 0x56 */ \
+    {'+'   , '+'    }, /* 0x57 */ \
+    {'\r'  , '\r'   }, /* 0x58 */ \
+    {'1'   , 0      }, /* 0x59 */ \
+    {'2'   , 0      }, /* 0x5a */ \
+    {'3'   , 0      }, /* 0x5b */ \
+    {'4'   , 0      }, /* 0x5c */ \
+    {'5'   , '5'    }, /* 0x5d */ \
+    {'6'   , 0      }, /* 0x5e */ \
+    {'7'   , 0      }, /* 0x5f */ \
+    {'8'   , 0      }, /* 0x60 */ \
+    {'9'   , 0      }, /* 0x61 */ \
+    {'0'   , 0      }, /* 0x62 */ \
+    {'.'   , 0      }, /* 0x63 */ \
+    {0     , 0      }, /* 0x64 */ \
+    {0     , 0      }, /* 0x65 */ \
+    {0     , 0      }, /* 0x66 */ \
+    {'='   , '='    }, /* 0x67 */ \
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_HID_H__ */
+
+/// @}
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/hid/hid_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/hid/hid_device.h
new file mode 100644
index 00000000000..078b67349dc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/hid/hid_device.h
@@ -0,0 +1,393 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_HID_DEVICE_H_
+#define _TUSB_HID_DEVICE_H_
+
+#include "hid.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Default Configure & Validation
+//--------------------------------------------------------------------+
+
+#if !defined(CFG_TUD_HID_EP_BUFSIZE) & defined(CFG_TUD_HID_BUFSIZE)
+  // TODO warn user to use new name later on
+  // #warning CFG_TUD_HID_BUFSIZE is renamed to CFG_TUD_HID_EP_BUFSIZE, please update to use the new name
+  #define CFG_TUD_HID_EP_BUFSIZE  CFG_TUD_HID_BUFSIZE
+#endif
+
+#ifndef CFG_TUD_HID_EP_BUFSIZE
+  #define CFG_TUD_HID_EP_BUFSIZE     64
+#endif
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Instances)
+// CFG_TUD_HID > 1
+//--------------------------------------------------------------------+
+
+// Check if the interface is ready to use
+bool tud_hid_n_ready(uint8_t instance);
+
+// Get interface supported protocol (bInterfaceProtocol) check out hid_interface_protocol_enum_t for possible values
+uint8_t tud_hid_n_interface_protocol(uint8_t instance);
+
+// Get current active protocol: HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+uint8_t tud_hid_n_get_protocol(uint8_t instance);
+
+// Send report to host
+bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, uint8_t len);
+
+// KEYBOARD: convenient helper to send keyboard report if application
+// use template layout report as defined by hid_keyboard_report_t
+bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modifier, uint8_t keycode[6]);
+
+// MOUSE: convenient helper to send mouse report if application
+// use template layout report as defined by hid_mouse_report_t
+bool tud_hid_n_mouse_report(uint8_t instance, uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal);
+
+// Gamepad: convenient helper to send gamepad report if application
+// use template layout report TUD_HID_REPORT_DESC_GAMEPAD
+bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons);
+
+//--------------------------------------------------------------------+
+// Application API (Single Port)
+//--------------------------------------------------------------------+
+static inline bool    tud_hid_ready(void);
+static inline uint8_t tud_hid_interface_protocol(void);
+static inline uint8_t tud_hid_get_protocol(void);
+static inline bool    tud_hid_report(uint8_t report_id, void const* report, uint8_t len);
+static inline bool    tud_hid_keyboard_report(uint8_t report_id, uint8_t modifier, uint8_t keycode[6]);
+static inline bool    tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal);
+static inline bool    tud_hid_gamepad_report(uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons);
+
+//--------------------------------------------------------------------+
+// Callbacks (Weak is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when received GET HID REPORT DESCRIPTOR request
+// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
+uint8_t const * tud_hid_descriptor_report_cb(uint8_t instance);
+
+// Invoked when received GET_REPORT control request
+// Application must fill buffer report's content and return its length.
+// Return zero will cause the stack to STALL request
+uint16_t tud_hid_get_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t* buffer, uint16_t reqlen);
+
+// Invoked when received SET_REPORT control request or
+// received data on OUT endpoint ( Report ID = 0, Type = 0 )
+void tud_hid_set_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t const* buffer, uint16_t bufsize);
+
+// Invoked when received SET_PROTOCOL request
+// protocol is either HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+TU_ATTR_WEAK void tud_hid_set_protocol_cb(uint8_t instance, uint8_t protocol);
+
+// Invoked when received SET_IDLE request. return false will stall the request
+// - Idle Rate = 0 : only send report if there is changes, i.e skip duplication
+// - Idle Rate > 0 : skip duplication, but send at least 1 report every idle rate (in unit of 4 ms).
+TU_ATTR_WEAK bool tud_hid_set_idle_cb(uint8_t instance, uint8_t idle_rate);
+
+// Invoked when sent REPORT successfully to host
+// Application can use this to send the next report
+// Note: For composite reports, report[0] is report ID
+TU_ATTR_WEAK void tud_hid_report_complete_cb(uint8_t instance, uint8_t const* report, uint8_t len);
+
+
+//--------------------------------------------------------------------+
+// Inline Functions
+//--------------------------------------------------------------------+
+static inline bool tud_hid_ready(void)
+{
+  return tud_hid_n_ready(0);
+}
+
+static inline uint8_t tud_hid_interface_protocol(void)
+{
+  return tud_hid_n_interface_protocol(0);
+}
+
+static inline uint8_t tud_hid_get_protocol(void)
+{
+  return tud_hid_n_get_protocol(0);
+}
+
+static inline bool tud_hid_report(uint8_t report_id, void const* report, uint8_t len)
+{
+  return tud_hid_n_report(0, report_id, report, len);
+}
+
+static inline bool tud_hid_keyboard_report(uint8_t report_id, uint8_t modifier, uint8_t keycode[6])
+{
+  return tud_hid_n_keyboard_report(0, report_id, modifier, keycode);
+}
+
+static inline bool tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal)
+{
+  return tud_hid_n_mouse_report(0, report_id, buttons, x, y, vertical, horizontal);
+}
+
+static inline bool  tud_hid_gamepad_report(uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons)
+{
+  return tud_hid_n_gamepad_report(0, report_id, x, y, z, rz, rx, ry, hat, buttons);
+}
+
+/* --------------------------------------------------------------------+
+ * HID Report Descriptor Template
+ *
+ * Convenient for declaring popular HID device (keyboard, mouse, consumer,
+ * gamepad etc...). Templates take "HID_REPORT_ID(n)" as input, leave
+ * empty if multiple reports is not used
+ *
+ * - Only 1 report: no parameter
+ *      uint8_t const report_desc[] = { TUD_HID_REPORT_DESC_KEYBOARD() };
+ *
+ * - Multiple Reports: "HID_REPORT_ID(ID)" must be passed to template
+ *      uint8_t const report_desc[] =
+ *      {
+ *          TUD_HID_REPORT_DESC_KEYBOARD( HID_REPORT_ID(1) ) ,
+ *          TUD_HID_REPORT_DESC_MOUSE   ( HID_REPORT_ID(2) )
+ *      };
+ *--------------------------------------------------------------------*/
+
+// Keyboard Report Descriptor Template
+#define TUD_HID_REPORT_DESC_KEYBOARD(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP     )                    ,\
+  HID_USAGE      ( HID_USAGE_DESKTOP_KEYBOARD )                    ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION )                    ,\
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    /* 8 bits Modifier Keys (Shfit, Control, Alt) */ \
+    HID_USAGE_PAGE ( HID_USAGE_PAGE_KEYBOARD )                     ,\
+      HID_USAGE_MIN    ( 224                                    )  ,\
+      HID_USAGE_MAX    ( 231                                    )  ,\
+      HID_LOGICAL_MIN  ( 0                                      )  ,\
+      HID_LOGICAL_MAX  ( 1                                      )  ,\
+      HID_REPORT_COUNT ( 8                                      )  ,\
+      HID_REPORT_SIZE  ( 1                                      )  ,\
+      HID_INPUT        ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE )  ,\
+      /* 8 bit reserved */ \
+      HID_REPORT_COUNT ( 1                                      )  ,\
+      HID_REPORT_SIZE  ( 8                                      )  ,\
+      HID_INPUT        ( HID_CONSTANT                           )  ,\
+    /* Output 5-bit LED Indicator Kana | Compose | ScrollLock | CapsLock | NumLock */ \
+    HID_USAGE_PAGE  ( HID_USAGE_PAGE_LED                   )       ,\
+      HID_USAGE_MIN    ( 1                                       ) ,\
+      HID_USAGE_MAX    ( 5                                       ) ,\
+      HID_REPORT_COUNT ( 5                                       ) ,\
+      HID_REPORT_SIZE  ( 1                                       ) ,\
+      HID_OUTPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE  ) ,\
+      /* led padding */ \
+      HID_REPORT_COUNT ( 1                                       ) ,\
+      HID_REPORT_SIZE  ( 3                                       ) ,\
+      HID_OUTPUT       ( HID_CONSTANT                            ) ,\
+    /* 6-byte Keycodes */ \
+    HID_USAGE_PAGE ( HID_USAGE_PAGE_KEYBOARD )                     ,\
+      HID_USAGE_MIN    ( 0                                   )     ,\
+      HID_USAGE_MAX_N  ( 255, 2                              )     ,\
+      HID_LOGICAL_MIN  ( 0                                   )     ,\
+      HID_LOGICAL_MAX_N( 255, 2                              )     ,\
+      HID_REPORT_COUNT ( 6                                   )     ,\
+      HID_REPORT_SIZE  ( 8                                   )     ,\
+      HID_INPUT        ( HID_DATA | HID_ARRAY | HID_ABSOLUTE )     ,\
+  HID_COLLECTION_END \
+
+// Mouse Report Descriptor Template
+#define TUD_HID_REPORT_DESC_MOUSE(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP      )                   ,\
+  HID_USAGE      ( HID_USAGE_DESKTOP_MOUSE     )                   ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION  )                   ,\
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    HID_USAGE      ( HID_USAGE_DESKTOP_POINTER )                   ,\
+    HID_COLLECTION ( HID_COLLECTION_PHYSICAL   )                   ,\
+      HID_USAGE_PAGE  ( HID_USAGE_PAGE_BUTTON  )                   ,\
+        HID_USAGE_MIN   ( 1                                      ) ,\
+        HID_USAGE_MAX   ( 5                                      ) ,\
+        HID_LOGICAL_MIN ( 0                                      ) ,\
+        HID_LOGICAL_MAX ( 1                                      ) ,\
+        /* Left, Right, Middle, Backward, Forward buttons */ \
+        HID_REPORT_COUNT( 5                                      ) ,\
+        HID_REPORT_SIZE ( 1                                      ) ,\
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+        /* 3 bit padding */ \
+        HID_REPORT_COUNT( 1                                      ) ,\
+        HID_REPORT_SIZE ( 3                                      ) ,\
+        HID_INPUT       ( HID_CONSTANT                           ) ,\
+      HID_USAGE_PAGE  ( HID_USAGE_PAGE_DESKTOP )                   ,\
+        /* X, Y position [-127, 127] */ \
+        HID_USAGE       ( HID_USAGE_DESKTOP_X                    ) ,\
+        HID_USAGE       ( HID_USAGE_DESKTOP_Y                    ) ,\
+        HID_LOGICAL_MIN ( 0x81                                   ) ,\
+        HID_LOGICAL_MAX ( 0x7f                                   ) ,\
+        HID_REPORT_COUNT( 2                                      ) ,\
+        HID_REPORT_SIZE ( 8                                      ) ,\
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_RELATIVE ) ,\
+        /* Verital wheel scroll [-127, 127] */ \
+        HID_USAGE       ( HID_USAGE_DESKTOP_WHEEL                )  ,\
+        HID_LOGICAL_MIN ( 0x81                                   )  ,\
+        HID_LOGICAL_MAX ( 0x7f                                   )  ,\
+        HID_REPORT_COUNT( 1                                      )  ,\
+        HID_REPORT_SIZE ( 8                                      )  ,\
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_RELATIVE )  ,\
+      HID_USAGE_PAGE  ( HID_USAGE_PAGE_CONSUMER ), \
+       /* Horizontal wheel scroll [-127, 127] */ \
+        HID_USAGE_N     ( HID_USAGE_CONSUMER_AC_PAN, 2           ), \
+        HID_LOGICAL_MIN ( 0x81                                   ), \
+        HID_LOGICAL_MAX ( 0x7f                                   ), \
+        HID_REPORT_COUNT( 1                                      ), \
+        HID_REPORT_SIZE ( 8                                      ), \
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_RELATIVE ), \
+    HID_COLLECTION_END                                            , \
+  HID_COLLECTION_END \
+
+// Consumer Control Report Descriptor Template
+#define TUD_HID_REPORT_DESC_CONSUMER(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_CONSUMER    )              ,\
+  HID_USAGE      ( HID_USAGE_CONSUMER_CONTROL )              ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION )              ,\
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    HID_LOGICAL_MIN  ( 0x00                                ) ,\
+    HID_LOGICAL_MAX_N( 0x03FF, 2                           ) ,\
+    HID_USAGE_MIN    ( 0x00                                ) ,\
+    HID_USAGE_MAX_N  ( 0x03FF, 2                           ) ,\
+    HID_REPORT_COUNT ( 1                                   ) ,\
+    HID_REPORT_SIZE  ( 16                                  ) ,\
+    HID_INPUT        ( HID_DATA | HID_ARRAY | HID_ABSOLUTE ) ,\
+  HID_COLLECTION_END \
+
+/* System Control Report Descriptor Template
+ * 0x00 - do nothing
+ * 0x01 - Power Off
+ * 0x02 - Standby
+ * 0x03 - Wake Host
+ */
+#define TUD_HID_REPORT_DESC_SYSTEM_CONTROL(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP           )        ,\
+  HID_USAGE      ( HID_USAGE_DESKTOP_SYSTEM_CONTROL )        ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION       )        ,\
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    /* 2 bit system power control */ \
+    HID_LOGICAL_MIN  ( 1                                   ) ,\
+    HID_LOGICAL_MAX  ( 3                                   ) ,\
+    HID_REPORT_COUNT ( 1                                   ) ,\
+    HID_REPORT_SIZE  ( 2                                   ) ,\
+    HID_USAGE        ( HID_USAGE_DESKTOP_SYSTEM_POWER_DOWN ) ,\
+    HID_USAGE        ( HID_USAGE_DESKTOP_SYSTEM_SLEEP      ) ,\
+    HID_USAGE        ( HID_USAGE_DESKTOP_SYSTEM_WAKE_UP    ) ,\
+    HID_INPUT        ( HID_DATA | HID_ARRAY | HID_ABSOLUTE ) ,\
+    /* 6 bit padding */ \
+    HID_REPORT_COUNT ( 1                                   ) ,\
+    HID_REPORT_SIZE  ( 6                                   ) ,\
+    HID_INPUT        ( HID_CONSTANT                        ) ,\
+  HID_COLLECTION_END \
+
+// Gamepad Report Descriptor Template
+// with 32 buttons, 2 joysticks and 1 hat/dpad with following layout
+// | X | Y | Z | Rz | Rx | Ry (1 byte each) | hat/DPAD (1 byte) | Button Map (4 bytes) |
+#define TUD_HID_REPORT_DESC_GAMEPAD(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP     )                 ,\
+  HID_USAGE      ( HID_USAGE_DESKTOP_GAMEPAD  )                 ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION )                 ,\
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    /* 8 bit X, Y, Z, Rz, Rx, Ry (min -127, max 127 ) */ \
+    HID_USAGE_PAGE     ( HID_USAGE_PAGE_DESKTOP                 ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_X                    ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_Y                    ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_Z                    ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_RZ                   ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_RX                   ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_RY                   ) ,\
+    HID_LOGICAL_MIN    ( 0x81                                   ) ,\
+    HID_LOGICAL_MAX    ( 0x7f                                   ) ,\
+    HID_REPORT_COUNT   ( 6                                      ) ,\
+    HID_REPORT_SIZE    ( 8                                      ) ,\
+    HID_INPUT          ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+    /* 8 bit DPad/Hat Button Map  */ \
+    HID_USAGE_PAGE     ( HID_USAGE_PAGE_DESKTOP                 ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_HAT_SWITCH           ) ,\
+    HID_LOGICAL_MIN    ( 1                                      ) ,\
+    HID_LOGICAL_MAX    ( 8                                      ) ,\
+    HID_PHYSICAL_MIN   ( 0                                      ) ,\
+    HID_PHYSICAL_MAX_N ( 315, 2                                 ) ,\
+    HID_REPORT_COUNT   ( 1                                      ) ,\
+    HID_REPORT_SIZE    ( 8                                      ) ,\
+    HID_INPUT          ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+    /* 32 bit Button Map */ \
+    HID_USAGE_PAGE     ( HID_USAGE_PAGE_BUTTON                  ) ,\
+    HID_USAGE_MIN      ( 1                                      ) ,\
+    HID_USAGE_MAX      ( 32                                     ) ,\
+    HID_LOGICAL_MIN    ( 0                                      ) ,\
+    HID_LOGICAL_MAX    ( 1                                      ) ,\
+    HID_REPORT_COUNT   ( 32                                     ) ,\
+    HID_REPORT_SIZE    ( 1                                      ) ,\
+    HID_INPUT          ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+  HID_COLLECTION_END \
+
+// HID Generic Input & Output
+// - 1st parameter is report size (mandatory)
+// - 2nd parameter is report id HID_REPORT_ID(n) (optional)
+#define TUD_HID_REPORT_DESC_GENERIC_INOUT(report_size, ...) \
+    HID_USAGE_PAGE_N ( HID_USAGE_PAGE_VENDOR, 2   ),\
+    HID_USAGE        ( 0x01                       ),\
+    HID_COLLECTION   ( HID_COLLECTION_APPLICATION ),\
+      /* Report ID if any */\
+      __VA_ARGS__ \
+      /* Input */ \
+      HID_USAGE       ( 0x02                                   ),\
+      HID_LOGICAL_MIN ( 0x00                                   ),\
+      HID_LOGICAL_MAX_N ( 0xff, 2                              ),\
+      HID_REPORT_SIZE ( 8                                      ),\
+      HID_REPORT_COUNT( report_size                            ),\
+      HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ),\
+      /* Output */ \
+      HID_USAGE       ( 0x03                                    ),\
+      HID_LOGICAL_MIN ( 0x00                                    ),\
+      HID_LOGICAL_MAX_N ( 0xff, 2                               ),\
+      HID_REPORT_SIZE ( 8                                       ),\
+      HID_REPORT_COUNT( report_size                             ),\
+      HID_OUTPUT      ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE  ),\
+    HID_COLLECTION_END \
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     hidd_init            (void);
+void     hidd_reset           (uint8_t rhport);
+uint16_t hidd_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     hidd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool     hidd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_HID_DEVICE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/hid/hid_host.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/hid/hid_host.h
new file mode 100644
index 00000000000..fe09b03b2f6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/hid/hid_host.h
@@ -0,0 +1,152 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_HID_HOST_H_
+#define _TUSB_HID_HOST_H_
+
+#include "hid.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+// TODO Highspeed interrupt can be up to 512 bytes
+#ifndef CFG_TUH_HID_EPIN_BUFSIZE
+#define CFG_TUH_HID_EPIN_BUFSIZE 64
+#endif
+
+#ifndef CFG_TUH_HID_EPOUT_BUFSIZE
+#define CFG_TUH_HID_EPOUT_BUFSIZE 64
+#endif
+
+
+typedef struct
+{
+  uint8_t  report_id;
+  uint8_t  usage;
+  uint16_t usage_page;
+
+  // TODO still use the endpoint size for now
+//  uint8_t in_len;      // length of IN report
+//  uint8_t out_len;     // length of OUT report
+} tuh_hid_report_info_t;
+
+//--------------------------------------------------------------------+
+// Interface API
+//--------------------------------------------------------------------+
+
+// Get the number of HID instances
+uint8_t tuh_hid_instance_count(uint8_t dev_addr);
+
+// Check if HID instance is mounted
+bool tuh_hid_mounted(uint8_t dev_addr, uint8_t instance);
+
+// Get interface supported protocol (bInterfaceProtocol) check out hid_interface_protocol_enum_t for possible values
+uint8_t tuh_hid_interface_protocol(uint8_t dev_addr, uint8_t instance);
+
+// Parse report descriptor into array of report_info struct and return number of reports.
+// For complicated report, application should write its own parser.
+uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* reports_info_arr, uint8_t arr_count, uint8_t const* desc_report, uint16_t desc_len) TU_ATTR_UNUSED;
+
+//--------------------------------------------------------------------+
+// Control Endpoint API
+//--------------------------------------------------------------------+
+
+// Get current protocol: HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+// Note: Device will be initialized in Boot protocol for simplicity.
+//       Application can use set_protocol() to switch back to Report protocol.
+uint8_t tuh_hid_get_protocol(uint8_t dev_addr, uint8_t instance);
+
+// Set protocol to HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+// This function is only supported by Boot interface (tuh_n_hid_interface_protocol() != NONE)
+bool tuh_hid_set_protocol(uint8_t dev_addr, uint8_t instance, uint8_t protocol);
+
+// Set Report using control endpoint
+// report_type is either Intput, Output or Feature, (value from hid_report_type_t)
+bool tuh_hid_set_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t report_type, void* report, uint16_t len);
+
+//--------------------------------------------------------------------+
+// Interrupt Endpoint API
+//--------------------------------------------------------------------+
+
+// Check if the interface is ready to use
+//bool tuh_n_hid_n_ready(uint8_t dev_addr, uint8_t instance);
+
+// Try to receive next report on Interrupt Endpoint. Immediately return
+// - true If succeeded, tuh_hid_report_received_cb() callback will be invoked when report is available
+// - false if failed to queue the transfer e.g endpoint is busy
+bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance);
+
+// Send report using interrupt endpoint
+// If report_id > 0 (composite), it will be sent as 1st byte, then report contents. Otherwise only report content is sent.
+//void tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len);
+
+//--------------------------------------------------------------------+
+// Callbacks (Weak is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when device with hid interface is mounted
+// Report descriptor is also available for use. tuh_hid_parse_report_descriptor()
+// can be used to parse common/simple enough descriptor.
+// Note: if report descriptor length > CFG_TUH_ENUMERATION_BUFSIZE, it will be skipped
+// therefore report_desc = NULL, desc_len = 0
+void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report_desc, uint16_t desc_len);
+
+// Invoked when device with hid interface is un-mounted
+TU_ATTR_WEAK void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance);
+
+// Invoked when received report from device via interrupt endpoint
+// Note: if there is report ID (composite), it is 1st byte of report
+void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len);
+
+// Invoked when sent report to device successfully via interrupt endpoint
+TU_ATTR_WEAK void tuh_hid_report_sent_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len);
+
+// Invoked when Sent Report to device via either control endpoint
+// len = 0 indicate there is error in the transfer e.g stalled response
+TU_ATTR_WEAK void tuh_hid_set_report_complete_cb(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t report_type, uint16_t len);
+
+// Invoked when Set Protocol request is complete
+TU_ATTR_WEAK void tuh_hid_set_protocol_complete_cb(uint8_t dev_addr, uint8_t instance, uint8_t protocol);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void hidh_init       (void);
+bool hidh_open       (uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *desc_itf, uint16_t max_len);
+bool hidh_set_config (uint8_t dev_addr, uint8_t itf_num);
+bool hidh_xfer_cb    (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+void hidh_close      (uint8_t dev_addr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TUSB_HID_HOST_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/midi/midi.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/midi/midi.h
new file mode 100644
index 00000000000..74dc41749b3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/midi/midi.h
@@ -0,0 +1,212 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/** \ingroup group_class
+ *  \defgroup ClassDriver_CDC Communication Device Class (CDC)
+ *            Currently only Abstract Control Model subclass is supported
+ *  @{ */
+
+#ifndef _TUSB_MIDI_H__
+#define _TUSB_MIDI_H__
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Specific Descriptor
+//--------------------------------------------------------------------+
+
+typedef enum
+{
+  MIDI_CS_INTERFACE_HEADER    = 0x01,
+  MIDI_CS_INTERFACE_IN_JACK   = 0x02,
+  MIDI_CS_INTERFACE_OUT_JACK  = 0x03,
+  MIDI_CS_INTERFACE_ELEMENT   = 0x04,
+} midi_cs_interface_subtype_t;
+
+typedef enum
+{
+  MIDI_CS_ENDPOINT_GENERAL = 0x01
+} midi_cs_endpoint_subtype_t;
+
+typedef enum
+{
+  MIDI_JACK_EMBEDDED = 0x01,
+  MIDI_JACK_EXTERNAL = 0x02
+} midi_jack_type_t;
+
+typedef enum
+{
+  MIDI_CIN_MISC              = 0,
+  MIDI_CIN_CABLE_EVENT       = 1,
+  MIDI_CIN_SYSCOM_2BYTE      = 2, // 2 byte system common message e.g MTC, SongSelect
+  MIDI_CIN_SYSCOM_3BYTE      = 3, // 3 byte system common message e.g SPP
+  MIDI_CIN_SYSEX_START       = 4, // SysEx starts or continue
+  MIDI_CIN_SYSEX_END_1BYTE   = 5, // SysEx ends with 1 data, or 1 byte system common message
+  MIDI_CIN_SYSEX_END_2BYTE   = 6, // SysEx ends with 2 data
+  MIDI_CIN_SYSEX_END_3BYTE   = 7, // SysEx ends with 3 data
+  MIDI_CIN_NOTE_ON           = 8,
+  MIDI_CIN_NOTE_OFF          = 9,
+  MIDI_CIN_POLY_KEYPRESS     = 10,
+  MIDI_CIN_CONTROL_CHANGE    = 11,
+  MIDI_CIN_PROGRAM_CHANGE    = 12,
+  MIDI_CIN_CHANNEL_PRESSURE  = 13,
+  MIDI_CIN_PITCH_BEND_CHANGE = 14,
+  MIDI_CIN_1BYTE_DATA = 15
+} midi_code_index_number_t;
+
+// MIDI 1.0 status byte
+enum
+{
+  //------------- System Exclusive -------------//
+  MIDI_STATUS_SYSEX_START                    = 0xF0,
+  MIDI_STATUS_SYSEX_END                      = 0xF7,
+
+  //------------- System Common -------------//
+  MIDI_STATUS_SYSCOM_TIME_CODE_QUARTER_FRAME = 0xF1,
+  MIDI_STATUS_SYSCOM_SONG_POSITION_POINTER   = 0xF2,
+  MIDI_STATUS_SYSCOM_SONG_SELECT             = 0xF3,
+  // F4, F5 is undefined
+  MIDI_STATUS_SYSCOM_TUNE_REQUEST            = 0xF6,
+
+  //------------- System RealTime  -------------//
+  MIDI_STATUS_SYSREAL_TIMING_CLOCK           = 0xF8,
+  // 0xF9 is undefined
+  MIDI_STATUS_SYSREAL_START                  = 0xFA,
+  MIDI_STATUS_SYSREAL_CONTINUE               = 0xFB,
+  MIDI_STATUS_SYSREAL_STOP                   = 0xFC,
+  // 0xFD is undefined
+  MIDI_STATUS_SYSREAL_ACTIVE_SENSING         = 0xFE,
+  MIDI_STATUS_SYSREAL_SYSTEM_RESET           = 0xFF,
+};
+
+/// MIDI Interface Header Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType
+  uint16_t bcdMSC            ; ///< MidiStreaming SubClass release number in Binary-Coded Decimal
+  uint16_t wTotalLength      ;
+} midi_desc_header_t;
+
+/// MIDI In Jack Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType
+  uint8_t bJackType          ; ///< Embedded or External
+  uint8_t bJackID            ; ///< Unique ID for MIDI IN Jack
+  uint8_t iJack              ; ///< string descriptor
+} midi_desc_in_jack_t;
+
+
+/// MIDI Out Jack Descriptor with single pin
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType
+  uint8_t bJackType          ; ///< Embedded or External
+  uint8_t bJackID            ; ///< Unique ID for MIDI IN Jack
+  uint8_t bNrInputPins;
+
+  uint8_t baSourceID;
+  uint8_t baSourcePin;
+
+  uint8_t iJack              ; ///< string descriptor
+} midi_desc_out_jack_t ;
+
+/// MIDI Out Jack Descriptor with multiple pins
+#define midi_desc_out_jack_n_t(input_num) \
+  struct TU_ATTR_PACKED { \
+    uint8_t bLength            ; \
+    uint8_t bDescriptorType    ; \
+    uint8_t bDescriptorSubType ; \
+    uint8_t bJackType          ; \
+    uint8_t bJackID            ; \
+    uint8_t bNrInputPins       ; \
+    struct TU_ATTR_PACKED {      \
+        uint8_t baSourceID;      \
+        uint8_t baSourcePin;     \
+    } pins[input_num];           \
+   uint8_t iJack              ;  \
+  }
+
+/// MIDI Element Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType
+  uint8_t bElementID;
+
+  uint8_t bNrInputPins;
+  uint8_t baSourceID;
+  uint8_t baSourcePin;
+
+  uint8_t bNrOutputPins;
+  uint8_t bInTerminalLink;
+  uint8_t bOutTerminalLink;
+  uint8_t bElCapsSize;
+
+  uint16_t bmElementCaps;
+  uint8_t  iElement;
+} midi_desc_element_t;
+
+/// MIDI Element Descriptor with multiple pins
+#define midi_desc_element_n_t(input_num) \
+  struct TU_ATTR_PACKED {       \
+    uint8_t bLength;            \
+    uint8_t bDescriptorType;    \
+    uint8_t bDescriptorSubType; \
+    uint8_t bElementID;         \
+    uint8_t bNrInputPins;       \
+    struct TU_ATTR_PACKED {     \
+        uint8_t baSourceID;     \
+        uint8_t baSourcePin;    \
+    } pins[input_num];          \
+    uint8_t bNrOutputPins;      \
+    uint8_t bInTerminalLink;    \
+    uint8_t bOutTerminalLink;   \
+    uint8_t bElCapsSize;        \
+    uint16_t bmElementCaps;     \
+    uint8_t  iElement;          \
+ }
+
+/** @} */
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
+
+/** @} */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/midi/midi_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/midi/midi_device.h
new file mode 100644
index 00000000000..211edc8d1c4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/midi/midi_device.h
@@ -0,0 +1,173 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_MIDI_DEVICE_H_
+#define _TUSB_MIDI_DEVICE_H_
+
+#include "class/audio/audio.h"
+#include "midi.h"
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+#if !defined(CFG_TUD_MIDI_EP_BUFSIZE) && defined(CFG_TUD_MIDI_EPSIZE)
+  #warning CFG_TUD_MIDI_EPSIZE is renamed to CFG_TUD_MIDI_EP_BUFSIZE, please update to use the new name
+  #define CFG_TUD_MIDI_EP_BUFSIZE    CFG_TUD_MIDI_EPSIZE
+#endif
+
+#ifndef CFG_TUD_MIDI_EP_BUFSIZE
+  #define CFG_TUD_MIDI_EP_BUFSIZE     (TUD_OPT_HIGH_SPEED ? 512 : 64)
+#endif
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** \addtogroup MIDI_Serial Serial
+ *  @{
+ *  \defgroup   MIDI_Serial_Device Device
+ *  @{ */
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Interfaces)
+// CFG_TUD_MIDI > 1
+//--------------------------------------------------------------------+
+
+// Check if midi interface is mounted
+bool     tud_midi_n_mounted      (uint8_t itf);
+
+// Get the number of bytes available for reading
+uint32_t tud_midi_n_available    (uint8_t itf, uint8_t cable_num);
+
+// Read byte stream              (legacy)
+uint32_t tud_midi_n_stream_read  (uint8_t itf, uint8_t cable_num, void* buffer, uint32_t bufsize);
+
+// Write byte Stream             (legacy)
+uint32_t tud_midi_n_stream_write (uint8_t itf, uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize);
+
+// Read event packet             (4 bytes)
+bool     tud_midi_n_packet_read  (uint8_t itf, uint8_t packet[4]);
+
+// Write event packet            (4 bytes)
+bool     tud_midi_n_packet_write (uint8_t itf, uint8_t const packet[4]);
+
+//--------------------------------------------------------------------+
+// Application API (Single Interface)
+//--------------------------------------------------------------------+
+static inline bool     tud_midi_mounted      (void);
+static inline uint32_t tud_midi_available    (void);
+
+static inline uint32_t tud_midi_stream_read  (void* buffer, uint32_t bufsize);
+static inline uint32_t tud_midi_stream_write (uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize);
+
+static inline bool     tud_midi_packet_read  (uint8_t packet[4]);
+static inline bool     tud_midi_packet_write (uint8_t const packet[4]);
+
+//------------- Deprecated API name  -------------//
+// TODO remove after 0.10.0 release
+
+TU_ATTR_DEPRECATED("tud_midi_read() is renamed to tud_midi_stream_read()")
+static inline uint32_t tud_midi_read (void* buffer, uint32_t bufsize)
+{
+  return tud_midi_stream_read(buffer, bufsize);
+}
+
+TU_ATTR_DEPRECATED("tud_midi_write() is renamed to tud_midi_stream_write()")
+static inline uint32_t tud_midi_write(uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize)
+{
+  return tud_midi_stream_write(cable_num, buffer, bufsize);
+}
+
+
+TU_ATTR_DEPRECATED("tud_midi_send() is renamed to tud_midi_packet_write()")
+static inline bool tud_midi_send(uint8_t packet[4])
+{
+  return tud_midi_packet_write(packet);
+}
+
+TU_ATTR_DEPRECATED("tud_midi_receive() is renamed to tud_midi_packet_read()")
+static inline bool tud_midi_receive(uint8_t packet[4])
+{
+  return tud_midi_packet_read(packet);
+}
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+TU_ATTR_WEAK void tud_midi_rx_cb(uint8_t itf);
+
+//--------------------------------------------------------------------+
+// Inline Functions
+//--------------------------------------------------------------------+
+
+static inline bool tud_midi_mounted (void)
+{
+  return tud_midi_n_mounted(0);
+}
+
+static inline uint32_t tud_midi_available (void)
+{
+  return tud_midi_n_available(0, 0);
+}
+
+static inline uint32_t tud_midi_stream_read (void* buffer, uint32_t bufsize)
+{
+  return tud_midi_n_stream_read(0, 0, buffer, bufsize);
+}
+
+static inline uint32_t tud_midi_stream_write (uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize)
+{
+  return tud_midi_n_stream_write(0, cable_num, buffer, bufsize);
+}
+
+static inline bool tud_midi_packet_read (uint8_t packet[4])
+{
+  return tud_midi_n_packet_read(0, packet);
+}
+
+static inline bool tud_midi_packet_write (uint8_t const packet[4])
+{
+  return tud_midi_n_packet_write(0, packet);
+}
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     midid_init            (void);
+void     midid_reset           (uint8_t rhport);
+uint16_t midid_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     midid_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool     midid_xfer_cb         (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_MIDI_DEVICE_H_ */
+
+/** @} */
+/** @} */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/msc/msc.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/msc/msc.h
new file mode 100644
index 00000000000..84b6e4d799e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/msc/msc.h
@@ -0,0 +1,382 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_MSC_H_
+#define _TUSB_MSC_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Mass Storage Class Constant
+//--------------------------------------------------------------------+
+/// MassStorage Subclass
+typedef enum
+{
+  MSC_SUBCLASS_RBC = 1 , ///< Reduced Block Commands (RBC) T10 Project 1240-D
+  MSC_SUBCLASS_SFF_MMC , ///< SFF-8020i, MMC-2 (ATAPI). Typically used by a CD/DVD device
+  MSC_SUBCLASS_QIC     , ///< QIC-157. Typically used by a tape device
+  MSC_SUBCLASS_UFI     , ///< UFI. Typically used by Floppy Disk Drive (FDD) device
+  MSC_SUBCLASS_SFF     , ///< SFF-8070i. Can be used by Floppy Disk Drive (FDD) device
+  MSC_SUBCLASS_SCSI      ///< SCSI transparent command set
+}msc_subclass_type_t;
+
+enum {
+  MSC_CBW_SIGNATURE = 0x43425355, ///< Constant value of 43425355h (little endian)
+  MSC_CSW_SIGNATURE = 0x53425355  ///< Constant value of 53425355h (little endian)
+};
+
+/// \brief MassStorage Protocol.
+/// \details CBI only approved to use with full-speed floopy disk & should not used with highspeed or device other than floopy
+typedef enum
+{
+  MSC_PROTOCOL_CBI              = 0 ,  ///< Control/Bulk/Interrupt protocol (with command completion interrupt)
+  MSC_PROTOCOL_CBI_NO_INTERRUPT = 1 ,  ///< Control/Bulk/Interrupt protocol (without command completion interrupt)
+  MSC_PROTOCOL_BOT              = 0x50 ///< Bulk-Only Transport
+}msc_protocol_type_t;
+
+/// MassStorage Class-Specific Control Request
+typedef enum
+{
+  MSC_REQ_GET_MAX_LUN = 254, ///< The Get Max LUN device request is used to determine the number of logical units supported by the device. Logical Unit Numbers on the device shall be numbered contiguously starting from LUN 0 to a maximum LUN of 15
+  MSC_REQ_RESET       = 255  ///< This request is used to reset the mass storage device and its associated interface. This class-specific request shall ready the device for the next CBW from the host.
+}msc_request_type_t;
+
+/// \brief Command Block Status Values
+/// \details Indicates the success or failure of the command. The device shall set this byte to zero if the command completed
+/// successfully. A non-zero value shall indicate a failure during command execution according to the following
+typedef enum
+{
+  MSC_CSW_STATUS_PASSED = 0 , ///< MSC_CSW_STATUS_PASSED
+  MSC_CSW_STATUS_FAILED     , ///< MSC_CSW_STATUS_FAILED
+  MSC_CSW_STATUS_PHASE_ERROR  ///< MSC_CSW_STATUS_PHASE_ERROR
+}msc_csw_status_t;
+
+/// Command Block Wrapper
+typedef struct TU_ATTR_PACKED
+{
+  uint32_t signature;   ///< Signature that helps identify this data packet as a CBW. The signature field shall contain the value 43425355h (little endian), indicating a CBW.
+  uint32_t tag;         ///< Tag sent by the host. The device shall echo the contents of this field back to the host in the dCSWTagfield of the associated CSW. The dCSWTagpositively associates a CSW with the corresponding CBW.
+  uint32_t total_bytes; ///< The number of bytes of data that the host expects to transfer on the Bulk-In or Bulk-Out endpoint (as indicated by the Direction bit) during the execution of this command. If this field is zero, the device and the host shall transfer no data between the CBW and the associated CSW, and the device shall ignore the value of the Direction bit in bmCBWFlags.
+  uint8_t dir;          ///< Bit 7 of this field define transfer direction \n - 0 : Data-Out from host to the device. \n - 1 : Data-In from the device to the host.
+  uint8_t lun;          ///< The device Logical Unit Number (LUN) to which the command block is being sent. For devices that support multiple LUNs, the host shall place into this field the LUN to which this command block is addressed. Otherwise, the host shall set this field to zero.
+  uint8_t cmd_len;      ///< The valid length of the CBWCBin bytes. This defines the valid length of the command block. The only legal values are 1 through 16
+  uint8_t command[16];  ///< The command block to be executed by the device. The device shall interpret the first cmd_len bytes in this field as a command block
+}msc_cbw_t;
+
+TU_VERIFY_STATIC(sizeof(msc_cbw_t) == 31, "size is not correct");
+
+/// Command Status Wrapper
+typedef struct TU_ATTR_PACKED
+{
+  uint32_t signature    ; ///< Signature that helps identify this data packet as a CSW. The signature field shall contain the value 53425355h (little endian), indicating CSW.
+  uint32_t tag          ; ///< The device shall set this field to the value received in the dCBWTag of the associated CBW.
+  uint32_t data_residue ; ///< For Data-Out the device shall report in the dCSWDataResiduethe difference between the amount of data expected as stated in the dCBWDataTransferLength, and the actual amount of data processed by the device. For Data-In the device shall report in the dCSWDataResiduethe difference between the amount of data expected as stated in the dCBWDataTransferLengthand the actual amount of relevant data sent by the device
+  uint8_t  status       ; ///< indicates the success or failure of the command. Values from \ref msc_csw_status_t
+}msc_csw_t;
+
+TU_VERIFY_STATIC(sizeof(msc_csw_t) == 13, "size is not correct");
+
+//--------------------------------------------------------------------+
+// SCSI Constant
+//--------------------------------------------------------------------+
+
+/// SCSI Command Operation Code
+typedef enum
+{
+  SCSI_CMD_TEST_UNIT_READY              = 0x00, ///< The SCSI Test Unit Ready command is used to determine if a device is ready to transfer data (read/write), i.e. if a disk has spun up, if a tape is loaded and ready etc. The device does not perform a self-test operation.
+  SCSI_CMD_INQUIRY                      = 0x12, ///< The SCSI Inquiry command is used to obtain basic information from a target device.
+  SCSI_CMD_MODE_SELECT_6                = 0x15, ///<  provides a means for the application client to specify medium, logical unit, or peripheral device parameters to the device server. Device servers that implement the MODE SELECT(6) command shall also implement the MODE SENSE(6) command. Application clients should issue MODE SENSE(6) prior to each MODE SELECT(6) to determine supported mode pages, page lengths, and other parameters.
+  SCSI_CMD_MODE_SENSE_6                 = 0x1A, ///< provides a means for a device server to report parameters to an application client. It is a complementary command to the MODE SELECT(6) command. Device servers that implement the MODE SENSE(6) command shall also implement the MODE SELECT(6) command.
+  SCSI_CMD_START_STOP_UNIT              = 0x1B,
+  SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL = 0x1E,
+  SCSI_CMD_READ_CAPACITY_10             = 0x25, ///< The SCSI Read Capacity command is used to obtain data capacity information from a target device.
+  SCSI_CMD_REQUEST_SENSE                = 0x03, ///< The SCSI Request Sense command is part of the SCSI computer protocol standard. This command is used to obtain sense data -- status/error information -- from a target device.
+  SCSI_CMD_READ_FORMAT_CAPACITY         = 0x23, ///< The command allows the Host to request a list of the possible format capacities for an installed writable media. This command also has the capability to report the writable capacity for a media when it is installed
+  SCSI_CMD_READ_10                      = 0x28, ///< The READ (10) command requests that the device server read the specified logical block(s) and transfer them to the data-in buffer.
+  SCSI_CMD_WRITE_10                     = 0x2A, ///< The WRITE (10) command requests thatthe device server transfer the specified logical block(s) from the data-out buffer and write them.
+}scsi_cmd_type_t;
+
+/// SCSI Sense Key
+typedef enum
+{
+  SCSI_SENSE_NONE            = 0x00, ///< no specific Sense Key. This would be the case for a successful command
+  SCSI_SENSE_RECOVERED_ERROR = 0x01, ///< ndicates the last command completed successfully with some recovery action performed by the disc drive.
+  SCSI_SENSE_NOT_READY       = 0x02, ///< Indicates the logical unit addressed cannot be accessed.
+  SCSI_SENSE_MEDIUM_ERROR    = 0x03, ///< Indicates the command terminated with a non-recovered error condition.
+  SCSI_SENSE_HARDWARE_ERROR  = 0x04, ///< Indicates the disc drive detected a nonrecoverable hardware failure while performing the command or during a self test.
+  SCSI_SENSE_ILLEGAL_REQUEST = 0x05, ///< Indicates an illegal parameter in the command descriptor block or in the additional parameters
+  SCSI_SENSE_UNIT_ATTENTION  = 0x06, ///< Indicates the disc drive may have been reset.
+  SCSI_SENSE_DATA_PROTECT    = 0x07, ///< Indicates that a command that reads or writes the medium was attempted on a block that is protected from this operation. The read or write operation is not performed.
+  SCSI_SENSE_FIRMWARE_ERROR  = 0x08, ///< Vendor specific sense key.
+  SCSI_SENSE_ABORTED_COMMAND = 0x0b, ///< Indicates the disc drive aborted the command.
+  SCSI_SENSE_EQUAL           = 0x0c, ///< Indicates a SEARCH DATA command has satisfied an equal comparison.
+  SCSI_SENSE_VOLUME_OVERFLOW = 0x0d, ///< Indicates a buffered peripheral device has reached the end of medium partition and data remains in the buffer that has not been written to the medium.
+  SCSI_SENSE_MISCOMPARE      = 0x0e  ///< ndicates that the source data did not match the data read from the medium.
+}scsi_sense_key_type_t;
+
+//--------------------------------------------------------------------+
+// SCSI Primary Command (SPC-4)
+//--------------------------------------------------------------------+
+
+/// SCSI Test Unit Ready Command
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code    ; ///< SCSI OpCode for \ref SCSI_CMD_TEST_UNIT_READY
+  uint8_t lun         ; ///< Logical Unit
+  uint8_t reserved[3] ;
+  uint8_t control     ;
+} scsi_test_unit_ready_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_test_unit_ready_t) == 6, "size is not correct");
+
+/// SCSI Inquiry Command
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code     ; ///< SCSI OpCode for \ref SCSI_CMD_INQUIRY
+  uint8_t reserved1    ;
+  uint8_t page_code    ;
+  uint8_t reserved2    ;
+  uint8_t alloc_length ; ///< specifies the maximum number of bytes that USB host has allocated in the Data-In Buffer. An allocation length of zero specifies that no data shall be transferred.
+  uint8_t control      ;
+} scsi_inquiry_t, scsi_request_sense_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_inquiry_t) == 6, "size is not correct");
+
+/// SCSI Inquiry Response Data
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t peripheral_device_type     : 5;
+  uint8_t peripheral_qualifier       : 3;
+
+  uint8_t                            : 7;
+  uint8_t is_removable               : 1;
+
+  uint8_t version;
+
+  uint8_t response_data_format       : 4;
+  uint8_t hierarchical_support       : 1;
+  uint8_t normal_aca                 : 1;
+  uint8_t                            : 2;
+
+  uint8_t additional_length;
+
+  uint8_t protect                    : 1;
+  uint8_t                            : 2;
+  uint8_t third_party_copy           : 1;
+  uint8_t target_port_group_support  : 2;
+  uint8_t access_control_coordinator : 1;
+  uint8_t scc_support                : 1;
+
+  uint8_t addr16                     : 1;
+  uint8_t                            : 3;
+  uint8_t multi_port                 : 1;
+  uint8_t                            : 1; // vendor specific
+  uint8_t enclosure_service          : 1;
+  uint8_t                            : 1;
+
+  uint8_t                            : 1; // vendor specific
+  uint8_t cmd_que                    : 1;
+  uint8_t                            : 2;
+  uint8_t sync                       : 1;
+  uint8_t wbus16                     : 1;
+  uint8_t                            : 2;
+
+  uint8_t vendor_id[8]  ; ///< 8 bytes of ASCII data identifying the vendor of the product.
+  uint8_t product_id[16]; ///< 16 bytes of ASCII data defined by the vendor.
+  uint8_t product_rev[4]; ///< 4 bytes of ASCII data defined by the vendor.
+} scsi_inquiry_resp_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_inquiry_resp_t) == 36, "size is not correct");
+
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t response_code : 7; ///< 70h - current errors, Fixed Format 71h - deferred errors, Fixed Format
+  uint8_t valid         : 1;
+
+  uint8_t reserved;
+
+  uint8_t sense_key     : 4;
+  uint8_t               : 1;
+  uint8_t ili           : 1; ///< Incorrect length indicator
+  uint8_t end_of_medium : 1;
+  uint8_t filemark      : 1;
+
+  uint32_t information;
+  uint8_t  add_sense_len;
+  uint32_t command_specific_info;
+  uint8_t  add_sense_code;
+  uint8_t  add_sense_qualifier;
+  uint8_t  field_replaceable_unit_code;
+
+  uint8_t  sense_key_specific[3]; ///< sense key specific valid bit is bit 7 of key[0], aka MSB in Big Endian layout
+
+} scsi_sense_fixed_resp_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_sense_fixed_resp_t) == 18, "size is not correct");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code     ; ///< SCSI OpCode for \ref SCSI_CMD_MODE_SENSE_6
+
+  uint8_t : 3;
+  uint8_t disable_block_descriptor : 1;
+  uint8_t : 4;
+
+  uint8_t page_code : 6;
+  uint8_t page_control : 2;
+
+  uint8_t subpage_code;
+  uint8_t alloc_length;
+  uint8_t control;
+} scsi_mode_sense6_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_mode_sense6_t) == 6, "size is not correct");
+
+// This is only a Mode parameter header(6).
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t data_len;
+  uint8_t medium_type;
+
+  uint8_t reserved : 7;
+  bool write_protected : 1;
+
+  uint8_t block_descriptor_len;
+} scsi_mode_sense6_resp_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_mode_sense6_resp_t) == 4, "size is not correct");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code; ///< SCSI OpCode for \ref SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL
+  uint8_t reserved[3];
+  uint8_t prohibit_removal;
+  uint8_t control;
+} scsi_prevent_allow_medium_removal_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_prevent_allow_medium_removal_t) == 6, "size is not correct");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code;
+
+  uint8_t immded : 1;
+  uint8_t        : 7;
+
+  uint8_t TU_RESERVED;
+
+  uint8_t power_condition_mod : 4;
+  uint8_t                     : 4;
+
+  uint8_t start           : 1;
+  uint8_t load_eject      : 1;
+  uint8_t no_flush        : 1;
+  uint8_t                 : 1;
+  uint8_t power_condition : 4;
+
+  uint8_t control;
+} scsi_start_stop_unit_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_start_stop_unit_t) == 6, "size is not correct");
+
+//--------------------------------------------------------------------+
+// SCSI MMC
+//--------------------------------------------------------------------+
+/// SCSI Read Format Capacity: Write Capacity
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code;
+  uint8_t reserved[6];
+  uint16_t alloc_length;
+  uint8_t control;
+} scsi_read_format_capacity_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_read_format_capacity_t) == 10, "size is not correct");
+
+typedef struct TU_ATTR_PACKED{
+  uint8_t reserved[3];
+  uint8_t list_length; /// must be 8*n, length in bytes of formattable capacity descriptor followed it.
+
+  uint32_t block_num; /// Number of Logical Blocks
+  uint8_t  descriptor_type; // 00: reserved, 01 unformatted media , 10 Formatted media, 11 No media present
+
+  uint8_t  reserved2;
+  uint16_t block_size_u16;
+
+} scsi_read_format_capacity_data_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_read_format_capacity_data_t) == 12, "size is not correct");
+
+//--------------------------------------------------------------------+
+// SCSI Block Command (SBC-3)
+// NOTE: All data in SCSI command are in Big Endian
+//--------------------------------------------------------------------+
+
+/// SCSI Read Capacity 10 Command: Read Capacity
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  cmd_code                 ; ///< SCSI OpCode for \ref SCSI_CMD_READ_CAPACITY_10
+  uint8_t  reserved1                ;
+  uint32_t lba                      ; ///< The first Logical Block Address (LBA) accessed by this command
+  uint16_t reserved2                ;
+  uint8_t  partial_medium_indicator ;
+  uint8_t  control                  ;
+} scsi_read_capacity10_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_read_capacity10_t) == 10, "size is not correct");
+
+/// SCSI Read Capacity 10 Response Data
+typedef struct {
+  uint32_t last_lba   ; ///< The last Logical Block Address of the device
+  uint32_t block_size ; ///< Block size in bytes
+} scsi_read_capacity10_resp_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_read_capacity10_resp_t) == 8, "size is not correct");
+
+/// SCSI Read 10 Command
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  cmd_code    ; ///< SCSI OpCode
+  uint8_t  reserved    ; // has LUN according to wiki
+  uint32_t lba         ; ///< The first Logical Block Address (LBA) accessed by this command
+  uint8_t  reserved2   ;
+  uint16_t block_count ; ///< Number of Blocks used by this command
+  uint8_t  control     ;
+} scsi_read10_t, scsi_write10_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_read10_t) == 10, "size is not correct");
+TU_VERIFY_STATIC(sizeof(scsi_write10_t) == 10, "size is not correct");
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_MSC_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/msc/msc_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/msc/msc_device.h
new file mode 100644
index 00000000000..5839b168d56
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/msc/msc_device.h
@@ -0,0 +1,162 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_MSC_DEVICE_H_
+#define _TUSB_MSC_DEVICE_H_
+
+#include "common/tusb_common.h"
+#include "msc.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+#if !defined(CFG_TUD_MSC_EP_BUFSIZE) & defined(CFG_TUD_MSC_BUFSIZE)
+  // TODO warn user to use new name later on
+  // #warning CFG_TUD_MSC_BUFSIZE is renamed to CFG_TUD_MSC_EP_BUFSIZE, please update to use the new name
+  #define CFG_TUD_MSC_EP_BUFSIZE  CFG_TUD_MSC_BUFSIZE
+#endif
+
+#ifndef CFG_TUD_MSC_EP_BUFSIZE
+  #error CFG_TUD_MSC_EP_BUFSIZE must be defined, value of a block size should work well, the more the better
+#endif
+
+TU_VERIFY_STATIC(CFG_TUD_MSC_EP_BUFSIZE < UINT16_MAX, "Size is not correct");
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// Set SCSI sense response
+bool tud_msc_set_sense(uint8_t lun, uint8_t sense_key, uint8_t add_sense_code, uint8_t add_sense_qualifier);
+
+//--------------------------------------------------------------------+
+// Application Callbacks (WEAK is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when received SCSI READ10 command
+// - Address = lba * BLOCK_SIZE + offset
+//   - offset is only needed if CFG_TUD_MSC_EP_BUFSIZE is smaller than BLOCK_SIZE.
+//
+// - Application fill the buffer (up to bufsize) with address contents and return number of read byte. If
+//   - read < bufsize : These bytes are transferred first and callback invoked again for remaining data.
+//
+//   - read == 0      : Indicate application is not ready yet e.g disk I/O busy.
+//                      Callback invoked again with the same parameters later on.
+//
+//   - read < 0       : Indicate application error e.g invalid address. This request will be STALLed
+//                      and return failed status in command status wrapper phase.
+int32_t tud_msc_read10_cb (uint8_t lun, uint32_t lba, uint32_t offset, void* buffer, uint32_t bufsize);
+
+// Invoked when received SCSI WRITE10 command
+// - Address = lba * BLOCK_SIZE + offset
+//   - offset is only needed if CFG_TUD_MSC_EP_BUFSIZE is smaller than BLOCK_SIZE.
+//
+// - Application write data from buffer to address contents (up to bufsize) and return number of written byte. If
+//   - write < bufsize : callback invoked again with remaining data later on.
+//
+//   - write == 0      : Indicate application is not ready yet e.g disk I/O busy.
+//                       Callback invoked again with the same parameters later on.
+//
+//   - write < 0       : Indicate application error e.g invalid address. This request will be STALLed
+//                       and return failed status in command status wrapper phase.
+//
+// TODO change buffer to const uint8_t*
+int32_t tud_msc_write10_cb (uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize);
+
+// Invoked when received SCSI_CMD_INQUIRY
+// Application fill vendor id, product id and revision with string up to 8, 16, 4 characters respectively
+void tud_msc_inquiry_cb(uint8_t lun, uint8_t vendor_id[8], uint8_t product_id[16], uint8_t product_rev[4]);
+
+// Invoked when received Test Unit Ready command.
+// return true allowing host to read/write this LUN e.g SD card inserted
+bool tud_msc_test_unit_ready_cb(uint8_t lun);
+
+// Invoked when received SCSI_CMD_READ_CAPACITY_10 and SCSI_CMD_READ_FORMAT_CAPACITY to determine the disk size
+// Application update block count and block size
+void tud_msc_capacity_cb(uint8_t lun, uint32_t* block_count, uint16_t* block_size);
+
+/**
+ * Invoked when received an SCSI command not in built-in list below.
+ * - READ_CAPACITY10, READ_FORMAT_CAPACITY, INQUIRY, TEST_UNIT_READY, START_STOP_UNIT, MODE_SENSE6, REQUEST_SENSE
+ * - READ10 and WRITE10 has their own callbacks
+ *
+ * \param[in]   lun         Logical unit number
+ * \param[in]   scsi_cmd    SCSI command contents which application must examine to response accordingly
+ * \param[out]  buffer      Buffer for SCSI Data Stage.
+ *                            - For INPUT: application must fill this with response.
+ *                            - For OUTPUT it holds the Data from host
+ * \param[in]   bufsize     Buffer's length.
+ *
+ * \return      Actual bytes processed, can be zero for no-data command.
+ * \retval      negative    Indicate error e.g unsupported command, tinyusb will \b STALL the corresponding
+ *                          endpoint and return failed status in command status wrapper phase.
+ */
+int32_t tud_msc_scsi_cb (uint8_t lun, uint8_t const scsi_cmd[16], void* buffer, uint16_t bufsize);
+
+/*------------- Optional callbacks -------------*/
+
+// Invoked when received GET_MAX_LUN request, required for multiple LUNs implementation
+TU_ATTR_WEAK uint8_t tud_msc_get_maxlun_cb(void);
+
+// Invoked when received Start Stop Unit command
+// - Start = 0 : stopped power mode, if load_eject = 1 : unload disk storage
+// - Start = 1 : active mode, if load_eject = 1 : load disk storage
+TU_ATTR_WEAK bool tud_msc_start_stop_cb(uint8_t lun, uint8_t power_condition, bool start, bool load_eject);
+
+// Invoked when received REQUEST_SENSE
+TU_ATTR_WEAK int32_t tud_msc_request_sense_cb(uint8_t lun, void* buffer, uint16_t bufsize);
+
+// Invoked when Read10 command is complete
+TU_ATTR_WEAK void tud_msc_read10_complete_cb(uint8_t lun);
+
+// Invoke when Write10 command is complete, can be used to flush flash caching
+TU_ATTR_WEAK void tud_msc_write10_complete_cb(uint8_t lun);
+
+// Invoked when command in tud_msc_scsi_cb is complete
+TU_ATTR_WEAK void tud_msc_scsi_complete_cb(uint8_t lun, uint8_t const scsi_cmd[16]);
+
+// Invoked to check if device is writable as part of SCSI WRITE10
+TU_ATTR_WEAK bool tud_msc_is_writable_cb(uint8_t lun);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     mscd_init            (void);
+void     mscd_reset           (uint8_t rhport);
+uint16_t mscd_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     mscd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const * p_request);
+bool     mscd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_MSC_DEVICE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/msc/msc_host.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/msc/msc_host.h
new file mode 100644
index 00000000000..7718ad4fe0e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/msc/msc_host.h
@@ -0,0 +1,119 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_MSC_HOST_H_
+#define _TUSB_MSC_HOST_H_
+
+#include "msc.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+#ifndef CFG_TUH_MSC_MAXLUN
+#define CFG_TUH_MSC_MAXLUN  4
+#endif
+
+typedef bool (*tuh_msc_complete_cb_t)(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw);
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// Check if device supports MassStorage interface.
+// This function true after tuh_msc_mounted_cb() and false after tuh_msc_unmounted_cb()
+bool tuh_msc_mounted(uint8_t dev_addr);
+
+// Check if the interface is currently ready or busy transferring data
+bool tuh_msc_ready(uint8_t dev_addr);
+
+// Get Max Lun
+uint8_t tuh_msc_get_maxlun(uint8_t dev_addr);
+
+// Get number of block
+uint32_t tuh_msc_get_block_count(uint8_t dev_addr, uint8_t lun);
+
+// Get block size in bytes
+uint32_t tuh_msc_get_block_size(uint8_t dev_addr, uint8_t lun);
+
+// Perform a full SCSI command (cbw, data, csw) in non-blocking manner.
+// Complete callback is invoked when SCSI op is complete.
+// return true if success, false if there is already pending operation.
+bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb);
+
+// Perform SCSI Inquiry command
+// Complete callback is invoked when SCSI op is complete.
+bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb);
+
+// Perform SCSI Test Unit Ready command
+// Complete callback is invoked when SCSI op is complete.
+bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb);
+
+// Perform SCSI Request Sense 10 command
+// Complete callback is invoked when SCSI op is complete.
+bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb);
+
+// Perform SCSI Read 10 command. Read n blocks starting from LBA to buffer
+// Complete callback is invoked when SCSI op is complete.
+bool  tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb);
+
+// Perform SCSI Write 10 command. Write n blocks starting from LBA to device
+// Complete callback is invoked when SCSI op is complete.
+bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb);
+
+// Perform SCSI Read Capacity 10 command
+// Complete callback is invoked when SCSI op is complete.
+// Note: during enumeration, host stack already carried out this request. Application can retrieve capacity by
+// simply call tuh_msc_get_block_count() and tuh_msc_get_block_size()
+bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb);
+
+//------------- Application Callback -------------//
+
+// Invoked when a device with MassStorage interface is mounted
+TU_ATTR_WEAK void tuh_msc_mount_cb(uint8_t dev_addr);
+
+// Invoked when a device with MassStorage interface is unmounted
+TU_ATTR_WEAK void tuh_msc_umount_cb(uint8_t dev_addr);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+
+void msch_init       (void);
+bool msch_open       (uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *desc_itf, uint16_t max_len);
+bool msch_set_config (uint8_t dev_addr, uint8_t itf_num);
+void msch_close      (uint8_t dev_addr);
+bool msch_xfer_cb    (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_MSC_HOST_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/net/ncm.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/net/ncm.h
new file mode 100644
index 00000000000..96ba11fbc5c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/net/ncm.h
@@ -0,0 +1,69 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+
+#ifndef _TUSB_NCM_H_
+#define _TUSB_NCM_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// Table 4.3 Data Class Interface Protocol Codes
+typedef enum
+{
+  NCM_DATA_PROTOCOL_NETWORK_TRANSFER_BLOCK = 0x01
+} ncm_data_interface_protocol_code_t;
+
+
+// Table 6.2 Class-Specific Request Codes for Network Control Model subclass
+typedef enum
+{
+  NCM_SET_ETHERNET_MULTICAST_FILTERS               = 0x40,
+  NCM_SET_ETHERNET_POWER_MANAGEMENT_PATTERN_FILTER = 0x41,
+  NCM_GET_ETHERNET_POWER_MANAGEMENT_PATTERN_FILTER = 0x42,
+  NCM_SET_ETHERNET_PACKET_FILTER                   = 0x43,
+  NCM_GET_ETHERNET_STATISTIC                       = 0x44,
+  NCM_GET_NTB_PARAMETERS                           = 0x80,
+  NCM_GET_NET_ADDRESS                              = 0x81,
+  NCM_SET_NET_ADDRESS                              = 0x82,
+  NCM_GET_NTB_FORMAT                               = 0x83,
+  NCM_SET_NTB_FORMAT                               = 0x84,
+  NCM_GET_NTB_INPUT_SIZE                           = 0x85,
+  NCM_SET_NTB_INPUT_SIZE                           = 0x86,
+  NCM_GET_MAX_DATAGRAM_SIZE                        = 0x87,
+  NCM_SET_MAX_DATAGRAM_SIZE                        = 0x88,
+  NCM_GET_CRC_MODE                                 = 0x89,
+  NCM_SET_CRC_MODE                                 = 0x8A,
+} ncm_request_code_t;
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/net/net_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/net/net_device.h
new file mode 100644
index 00000000000..6e294465b28
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/net/net_device.h
@@ -0,0 +1,118 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Peter Lawrence
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_NET_DEVICE_H_
+#define _TUSB_NET_DEVICE_H_
+
+#include "class/cdc/cdc.h"
+
+#if CFG_TUD_ECM_RNDIS && CFG_TUD_NCM
+#error "Cannot enable both ECM_RNDIS and NCM network drivers"
+#endif
+
+#include "ncm.h"
+
+/* declared here, NOT in usb_descriptors.c, so that the driver can intelligently ZLP as needed */
+#define CFG_TUD_NET_ENDPOINT_SIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
+
+/* Maximum Transmission Unit (in bytes) of the network, including Ethernet header */
+#ifndef CFG_TUD_NET_MTU
+#define CFG_TUD_NET_MTU           1514
+#endif
+
+#ifndef CFG_TUD_NCM_IN_NTB_MAX_SIZE
+#define CFG_TUD_NCM_IN_NTB_MAX_SIZE 3200
+#endif
+
+#ifndef CFG_TUD_NCM_OUT_NTB_MAX_SIZE
+#define CFG_TUD_NCM_OUT_NTB_MAX_SIZE 3200
+#endif
+
+#ifndef CFG_TUD_NCM_MAX_DATAGRAMS_PER_NTB
+#define CFG_TUD_NCM_MAX_DATAGRAMS_PER_NTB 8
+#endif
+
+#ifndef CFG_TUD_NCM_ALIGNMENT
+#define CFG_TUD_NCM_ALIGNMENT 4
+#endif
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// indicate to network driver that client has finished with the packet provided to network_recv_cb()
+void tud_network_recv_renew(void);
+
+// poll network driver for its ability to accept another packet to transmit
+bool tud_network_can_xmit(uint16_t size);
+
+// if network_can_xmit() returns true, network_xmit() can be called once
+void tud_network_xmit(void *ref, uint16_t arg);
+
+//--------------------------------------------------------------------+
+// Application Callbacks (WEAK is optional)
+//--------------------------------------------------------------------+
+
+// client must provide this: return false if the packet buffer was not accepted
+bool tud_network_recv_cb(const uint8_t *src, uint16_t size);
+
+// client must provide this: copy from network stack packet pointer to dst
+uint16_t tud_network_xmit_cb(uint8_t *dst, void *ref, uint16_t arg);
+
+//------------- ECM/RNDIS -------------//
+
+// client must provide this: initialize any network state back to the beginning
+void tud_network_init_cb(void);
+
+// client must provide this: 48-bit MAC address
+// TODO removed later since it is not part of tinyusb stack
+extern const uint8_t tud_network_mac_address[6];
+
+//------------- NCM -------------//
+
+// callback to client providing optional indication of internal state of network driver
+void tud_network_link_state_cb(bool state);
+
+//--------------------------------------------------------------------+
+// INTERNAL USBD-CLASS DRIVER API
+//--------------------------------------------------------------------+
+void     netd_init            (void);
+void     netd_reset           (uint8_t rhport);
+uint16_t netd_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     netd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool     netd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+void     netd_report          (uint8_t *buf, uint16_t len);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_NET_DEVICE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/usbtmc/usbtmc.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/usbtmc/usbtmc.h
new file mode 100644
index 00000000000..7d7005c2e36
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/usbtmc/usbtmc.h
@@ -0,0 +1,316 @@
+
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 N Conrad
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_USBTMC_H__
+#define _TUSB_USBTMC_H__
+
+#include "common/tusb_common.h"
+
+
+/* Implements USBTMC Revision 1.0, April 14, 2003
+
+ String descriptors must have a "LANGID=0x409"/US English string.
+ Characters must be 0x20 (' ') to 0x7E ('~') ASCII,
+   But MUST not contain: "/:?\*
+   Also must not have leading or trailing space (' ')
+ Device descriptor must state USB version 0x0200 or greater
+
+ If USB488DeviceCapabilites.D2 = 1 (SR1), then there must be a INT endpoint.
+*/
+
+#define USBTMC_VERSION 0x0100
+#define USBTMC_488_VERSION 0x0100
+
+typedef enum {
+  USBTMC_MSGID_DEV_DEP_MSG_OUT = 1u,
+  USBTMC_MSGID_DEV_DEP_MSG_IN = 2u,
+  USBTMC_MSGID_VENDOR_SPECIFIC_MSG_OUT = 126u,
+  USBTMC_MSGID_VENDOR_SPECIFIC_IN = 127u,
+  USBTMC_MSGID_USB488_TRIGGER = 128u,
+} usbtmc_msgid_enum;
+
+/// \brief Message header (For BULK OUT and BULK IN); 4 bytes
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t MsgID              ; ///< Message type ID (usbtmc_msgid_enum)
+  uint8_t bTag    		       ; ///< Transfer ID 1<=bTag<=255
+  uint8_t bTagInverse        ; ///< Complement of the tag
+  uint8_t _reserved           ; ///< Must be 0x00
+} usbtmc_msg_header_t;
+
+typedef struct TU_ATTR_PACKED
+{
+  usbtmc_msg_header_t header;
+  uint8_t data[8];
+} usbtmc_msg_generic_t;
+
+/* Uses on the bulk-out endpoint: */
+// Next 8 bytes are message-specific
+typedef struct TU_ATTR_PACKED {
+	usbtmc_msg_header_t header ; ///< Header
+	uint32_t TransferSize      ; ///< Transfer size; LSB first
+	struct TU_ATTR_PACKED
+	{
+	  unsigned int EOM  : 1         ; ///< EOM set on last byte
+  } bmTransferAttributes;
+  uint8_t _reserved[3];
+} usbtmc_msg_request_dev_dep_out;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_msg_request_dev_dep_out) == 12u, "struct wrong length");
+
+// Next 8 bytes are message-specific
+typedef struct TU_ATTR_PACKED
+{
+  usbtmc_msg_header_t header ; ///< Header
+  uint32_t TransferSize      ; ///< Transfer size; LSB first
+  struct TU_ATTR_PACKED
+  {
+    unsigned int TermCharEnabled  : 1 ; ///< "The Bulk-IN transfer must terminate on the specified TermChar."; CAPABILITIES must list TermChar
+  } bmTransferAttributes;
+  uint8_t TermChar;
+  uint8_t _reserved[2];
+} usbtmc_msg_request_dev_dep_in;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_msg_request_dev_dep_in) == 12u, "struct wrong length");
+
+/* Bulk-in headers */
+
+typedef struct TU_ATTR_PACKED
+{
+  usbtmc_msg_header_t header;
+  uint32_t TransferSize;
+  struct TU_ATTR_PACKED
+  {
+    uint8_t EOM: 1;           ///< Last byte of transfer is the end of the message
+    uint8_t UsingTermChar: 1; ///< Support TermChar && Request.TermCharEnabled && last char in transfer is TermChar
+  } bmTransferAttributes;
+  uint8_t _reserved[3];
+} usbtmc_msg_dev_dep_msg_in_header_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_msg_dev_dep_msg_in_header_t) == 12u, "struct wrong length");
+
+/* Unsupported vendor things.... Are these ever used?*/
+
+typedef struct TU_ATTR_PACKED
+{
+  usbtmc_msg_header_t header ; ///< Header
+  uint32_t TransferSize      ; ///< Transfer size; LSB first
+  uint8_t _reserved[4];
+} usbtmc_msg_request_vendor_specific_out;
+
+
+TU_VERIFY_STATIC(sizeof(usbtmc_msg_request_vendor_specific_out) == 12u, "struct wrong length");
+
+typedef struct TU_ATTR_PACKED
+{
+  usbtmc_msg_header_t header ; ///< Header
+  uint32_t TransferSize      ; ///< Transfer size; LSB first
+  uint8_t _reserved[4];
+} usbtmc_msg_request_vendor_specific_in;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_msg_request_vendor_specific_in) == 12u, "struct wrong length");
+
+// Control request type should use tusb_control_request_t
+
+/*
+typedef struct TU_ATTR_PACKED {
+  struct {
+    unsigned int Recipient  : 5         ; ///< EOM set on last byte
+    unsigned int Type       : 2         ; ///< EOM set on last byte
+    unsigned int DirectionToHost  : 1   ; ///< 0 is OUT, 1 is IN
+  } bmRequestType;
+  uint8_t bRequest                 ; ///< If bmRequestType.Type = Class, see usmtmc_request_type_enum
+  uint16_t wValue                  ;
+  uint16_t wIndex                  ;
+  uint16_t wLength                 ; // Number of bytes in data stage
+} usbtmc_class_specific_control_req;
+
+*/
+// bulk-in protocol errors
+enum {
+  USBTMC_BULK_IN_ERR_INCOMPLETE_HEADER = 1u,
+  USBTMC_BULK_IN_ERR_UNSUPPORTED = 2u,
+  USBTMC_BULK_IN_ERR_BAD_PARAMETER = 3u,
+  USBTMC_BULK_IN_ERR_DATA_TOO_SHORT = 4u,
+  USBTMC_BULK_IN_ERR_DATA_TOO_LONG = 5u,
+};
+// bult-in halt errors
+enum {
+  USBTMC_BULK_IN_ERR = 1u, ///< receives a USBTMC command message that expects a response while a
+                           /// Bulk-IN transfer is in progress
+};
+
+typedef enum {
+  USBTMC_bREQUEST_INITIATE_ABORT_BULK_OUT      = 1u,
+  USBTMC_bREQUEST_CHECK_ABORT_BULK_OUT_STATUS  = 2u,
+  USBTMC_bREQUEST_INITIATE_ABORT_BULK_IN       = 3u,
+  USBTMC_bREQUEST_CHECK_ABORT_BULK_IN_STATUS   = 4u,
+  USBTMC_bREQUEST_INITIATE_CLEAR               = 5u,
+  USBTMC_bREQUEST_CHECK_CLEAR_STATUS           = 6u,
+  USBTMC_bREQUEST_GET_CAPABILITIES             = 7u,
+
+  USBTMC_bREQUEST_INDICATOR_PULSE               = 64u, // Optional
+
+  /****** USBTMC 488 *************/
+  USB488_bREQUEST_READ_STATUS_BYTE  = 128u,
+  USB488_bREQUEST_REN_CONTROL       = 160u,
+  USB488_bREQUEST_GO_TO_LOCAL       = 161u,
+  USB488_bREQUEST_LOCAL_LOCKOUT     = 162u,
+
+} usmtmc_request_type_enum;
+
+typedef enum {
+  USBTMC_STATUS_SUCCESS = 0x01,
+  USBTMC_STATUS_PENDING = 0x02,
+  USBTMC_STATUS_FAILED = 0x80,
+  USBTMC_STATUS_TRANSFER_NOT_IN_PROGRESS = 0x81,
+  USBTMC_STATUS_SPLIT_NOT_IN_PROGRESS = 0x82,
+  USBTMC_STATUS_SPLIT_IN_PROGRESS  = 0x83
+} usbtmc_status_enum;
+
+/************************************************************
+ * Control Responses
+ */
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t USBTMC_status;                 ///< usbtmc_status_enum
+  uint8_t _reserved;
+  uint16_t bcdUSBTMC;                    ///< USBTMC_VERSION
+
+  struct TU_ATTR_PACKED
+  {
+    unsigned int listenOnly :1;
+    unsigned int talkOnly :1;
+    unsigned int supportsIndicatorPulse :1;
+  } bmIntfcCapabilities;
+  struct TU_ATTR_PACKED
+  {
+    unsigned int canEndBulkInOnTermChar :1;
+  } bmDevCapabilities;
+  uint8_t _reserved2[6];
+  uint8_t _reserved3[12];
+} usbtmc_response_capabilities_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_response_capabilities_t) == 0x18, "struct wrong length");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t USBTMC_status;
+  struct TU_ATTR_PACKED
+  {
+    unsigned int BulkInFifoBytes :1;
+  } bmClear;
+} usbtmc_get_clear_status_rsp_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_get_clear_status_rsp_t) == 2u, "struct wrong length");
+
+// Used for both abort bulk IN and bulk OUT
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t USBTMC_status;
+  uint8_t bTag;
+} usbtmc_initiate_abort_rsp_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_get_clear_status_rsp_t) == 2u, "struct wrong length");
+
+// Used for both check_abort_bulk_in_status and check_abort_bulk_out_status
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t USBTMC_status;
+  struct TU_ATTR_PACKED
+  {
+    unsigned int BulkInFifoBytes : 1; ///< Has queued data or a short packet that is queued
+  } bmAbortBulkIn;
+  uint8_t _reserved[2];               ///< Must be zero
+  uint32_t NBYTES_RXD_TXD;
+} usbtmc_check_abort_bulk_rsp_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_check_abort_bulk_rsp_t) == 8u, "struct wrong length");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t USBTMC_status;                 ///< usbtmc_status_enum
+  uint8_t _reserved;
+  uint16_t bcdUSBTMC;                    ///< USBTMC_VERSION
+
+  struct TU_ATTR_PACKED
+  {
+    unsigned int listenOnly :1;
+    unsigned int talkOnly :1;
+    unsigned int supportsIndicatorPulse :1;
+  } bmIntfcCapabilities;
+
+  struct TU_ATTR_PACKED
+  {
+    unsigned int canEndBulkInOnTermChar :1;
+  } bmDevCapabilities;
+
+  uint8_t _reserved2[6];
+  uint16_t bcdUSB488;
+
+  struct TU_ATTR_PACKED
+  {
+    unsigned int is488_2 :1;
+    unsigned int supportsREN_GTL_LLO :1;
+    unsigned int supportsTrigger :1;
+  } bmIntfcCapabilities488;
+
+  struct TU_ATTR_PACKED
+  {
+    unsigned int SCPI :1;
+    unsigned int SR1 :1;
+    unsigned int RL1 :1;
+    unsigned int DT1 :1;
+  } bmDevCapabilities488;
+  uint8_t _reserved3[8];
+} usbtmc_response_capabilities_488_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_response_capabilities_488_t) == 0x18, "struct wrong length");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t USBTMC_status;
+  uint8_t bTag;
+  uint8_t statusByte;
+} usbtmc_read_stb_rsp_488_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_read_stb_rsp_488_t) == 3u, "struct wrong length");
+
+typedef struct TU_ATTR_PACKED
+{
+  struct TU_ATTR_PACKED
+  {
+      unsigned int bTag : 7;
+      unsigned int one  : 1;
+  } bNotify1;
+  uint8_t StatusByte;
+} usbtmc_read_stb_interrupt_488_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_read_stb_interrupt_488_t) == 2u, "struct wrong length");
+
+#endif
+
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/usbtmc/usbtmc_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/usbtmc/usbtmc_device.h
new file mode 100644
index 00000000000..0549a1569e8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/usbtmc/usbtmc_device.h
@@ -0,0 +1,116 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 N Conrad
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+
+#ifndef CLASS_USBTMC_USBTMC_DEVICE_H_
+#define CLASS_USBTMC_USBTMC_DEVICE_H_
+
+#include "usbtmc.h"
+
+// Enable 488 mode by default
+#if !defined(CFG_TUD_USBTMC_ENABLE_488)
+#define CFG_TUD_USBTMC_ENABLE_488 (1)
+#endif
+
+// USB spec says that full-speed must be 8,16,32, or 64.
+// However, this driver implementation requires it to be >=32
+#define USBTMCD_MAX_PACKET_SIZE (64u)
+
+/***********************************************
+ *  Functions to be implemeted by the class implementation
+ */
+
+// In order to proceed, app must call call tud_usbtmc_start_bus_read(rhport) during or soon after:
+// * tud_usbtmc_open_cb
+// * tud_usbtmc_msg_data_cb
+// * tud_usbtmc_msgBulkIn_complete_cb
+// * tud_usbtmc_msg_trigger_cb
+// * (successful) tud_usbtmc_check_abort_bulk_out_cb
+// * (successful) tud_usbtmc_check_abort_bulk_in_cb
+// * (successful) tud_usmtmc_bulkOut_clearFeature_cb
+
+#if (CFG_TUD_USBTMC_ENABLE_488)
+usbtmc_response_capabilities_488_t const * tud_usbtmc_get_capabilities_cb(void);
+#else
+usbtmc_response_capabilities_t const * tud_usbtmc_get_capabilities_cb(void);
+#endif
+
+void tud_usbtmc_open_cb(uint8_t interface_id);
+
+bool tud_usbtmc_msgBulkOut_start_cb(usbtmc_msg_request_dev_dep_out const * msgHeader);
+// transfer_complete does not imply that a message is complete.
+bool tud_usbtmc_msg_data_cb( void *data, size_t len, bool transfer_complete);
+void tud_usbtmc_bulkOut_clearFeature_cb(void); // Notice to clear and abort the pending BULK out transfer
+
+bool tud_usbtmc_msgBulkIn_request_cb(usbtmc_msg_request_dev_dep_in const * request);
+bool tud_usbtmc_msgBulkIn_complete_cb(void);
+void tud_usbtmc_bulkIn_clearFeature_cb(void); // Notice to clear and abort the pending BULK out transfer
+
+bool tud_usbtmc_initiate_abort_bulk_in_cb(uint8_t *tmcResult);
+bool tud_usbtmc_initiate_abort_bulk_out_cb(uint8_t *tmcResult);
+bool tud_usbtmc_initiate_clear_cb(uint8_t *tmcResult);
+
+bool tud_usbtmc_check_abort_bulk_in_cb(usbtmc_check_abort_bulk_rsp_t *rsp);
+bool tud_usbtmc_check_abort_bulk_out_cb(usbtmc_check_abort_bulk_rsp_t *rsp);
+bool tud_usbtmc_check_clear_cb(usbtmc_get_clear_status_rsp_t *rsp);
+
+// Indicator pulse should be 0.5 to 1.0 seconds long
+TU_ATTR_WEAK bool tud_usbtmc_indicator_pulse_cb(tusb_control_request_t const * msg, uint8_t *tmcResult);
+
+#if (CFG_TUD_USBTMC_ENABLE_488)
+uint8_t tud_usbtmc_get_stb_cb(uint8_t *tmcResult);
+TU_ATTR_WEAK bool tud_usbtmc_msg_trigger_cb(usbtmc_msg_generic_t* msg);
+//TU_ATTR_WEAK bool tud_usbtmc_app_go_to_local_cb();
+#endif
+
+/*******************************************
+ * Called from app
+ *
+ * We keep a reference to the buffer, so it MUST not change until the app is
+ * notified that the transfer is complete.
+ ******************************************/
+
+bool tud_usbtmc_transmit_dev_msg_data(
+    const void * data, size_t len,
+    bool endOfMessage, bool usingTermChar);
+
+bool tud_usbtmc_start_bus_read(void);
+
+
+/* "callbacks" from USB device core */
+
+uint16_t usbtmcd_open_cb(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+void     usbtmcd_reset_cb(uint8_t rhport);
+bool     usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+bool     usbtmcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+void     usbtmcd_init_cb(void);
+
+/************************************************************
+ * USBTMC Descriptor Templates
+ *************************************************************/
+
+
+#endif /* CLASS_USBTMC_USBTMC_DEVICE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_device.h
new file mode 100644
index 00000000000..4a873e5fcbc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_device.h
@@ -0,0 +1,145 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_VENDOR_DEVICE_H_
+#define _TUSB_VENDOR_DEVICE_H_
+
+#include "common/tusb_common.h"
+
+#ifndef CFG_TUD_VENDOR_EPSIZE
+#define CFG_TUD_VENDOR_EPSIZE     64
+#endif
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Interfaces)
+//--------------------------------------------------------------------+
+bool     tud_vendor_n_mounted         (uint8_t itf);
+
+uint32_t tud_vendor_n_available       (uint8_t itf);
+uint32_t tud_vendor_n_read            (uint8_t itf, void* buffer, uint32_t bufsize);
+bool     tud_vendor_n_peek            (uint8_t itf, uint8_t* ui8);
+void     tud_vendor_n_read_flush      (uint8_t itf);
+
+uint32_t tud_vendor_n_write           (uint8_t itf, void const* buffer, uint32_t bufsize);
+uint32_t tud_vendor_n_write_available (uint8_t itf);
+
+static inline
+uint32_t tud_vendor_n_write_str       (uint8_t itf, char const* str);
+uint32_t tud_vendor_n_flush           (uint8_t itf);
+
+//--------------------------------------------------------------------+
+// Application API (Single Port)
+//--------------------------------------------------------------------+
+static inline bool     tud_vendor_mounted         (void);
+static inline uint32_t tud_vendor_available       (void);
+static inline uint32_t tud_vendor_read            (void* buffer, uint32_t bufsize);
+static inline bool     tud_vendor_peek            (uint8_t* ui8);
+static inline void     tud_vendor_read_flush      (void);
+static inline uint32_t tud_vendor_write           (void const* buffer, uint32_t bufsize);
+static inline uint32_t tud_vendor_write_str       (char const* str);
+static inline uint32_t tud_vendor_write_available (void);
+static inline uint32_t tud_vendor_flush           (void);
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when received new data
+TU_ATTR_WEAK void tud_vendor_rx_cb(uint8_t itf);
+// Invoked when last rx transfer finished
+TU_ATTR_WEAK void tud_vendor_tx_cb(uint8_t itf, uint32_t sent_bytes);
+
+//--------------------------------------------------------------------+
+// Inline Functions
+//--------------------------------------------------------------------+
+
+static inline uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str)
+{
+  return tud_vendor_n_write(itf, str, strlen(str));
+}
+
+static inline bool tud_vendor_mounted (void)
+{
+  return tud_vendor_n_mounted(0);
+}
+
+static inline uint32_t tud_vendor_available (void)
+{
+  return tud_vendor_n_available(0);
+}
+
+static inline uint32_t tud_vendor_read (void* buffer, uint32_t bufsize)
+{
+  return tud_vendor_n_read(0, buffer, bufsize);
+}
+
+static inline bool tud_vendor_peek (uint8_t* ui8)
+{
+  return tud_vendor_n_peek(0, ui8);
+}
+
+static inline void tud_vendor_read_flush(void)
+{
+    tud_vendor_n_read_flush(0);
+}
+
+static inline uint32_t tud_vendor_write (void const* buffer, uint32_t bufsize)
+{
+  return tud_vendor_n_write(0, buffer, bufsize);
+}
+
+static inline uint32_t tud_vendor_write_str (char const* str)
+{
+  return tud_vendor_n_write_str(0, str);
+}
+
+static inline uint32_t tud_vendor_write_available (void)
+{
+  return tud_vendor_n_write_available(0);
+}
+
+static inline uint32_t tud_vendor_flush (void)
+{
+  return tud_vendor_n_flush(0);
+}
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     vendord_init(void);
+void     vendord_reset(uint8_t rhport);
+uint16_t vendord_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     vendord_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_VENDOR_DEVICE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_host.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_host.h
new file mode 100644
index 00000000000..65223fbca07
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_host.h
@@ -0,0 +1,67 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_VENDOR_HOST_H_
+#define _TUSB_VENDOR_HOST_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+typedef struct {
+  pipe_handle_t pipe_in;
+  pipe_handle_t pipe_out;
+}custom_interface_info_t;
+
+//--------------------------------------------------------------------+
+// USBH-CLASS DRIVER API
+//--------------------------------------------------------------------+
+static inline bool tusbh_custom_is_mounted(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id)
+{
+  (void) vendor_id; // TODO check this later
+  (void) product_id;
+//  return (tusbh_device_get_mounted_class_flag(dev_addr) & TU_BIT(TUSB_CLASS_MAPPED_INDEX_END-1) ) != 0;
+  return false;
+}
+
+bool tusbh_custom_read(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void * p_buffer, uint16_t length);
+bool tusbh_custom_write(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void const * p_data, uint16_t length);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void cush_init(void);
+bool cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length);
+void cush_isr(pipe_handle_t pipe_hdl, xfer_result_t event);
+void cush_close(uint8_t dev_addr);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_VENDOR_HOST_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/video/video.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/video/video.h
new file mode 100644
index 00000000000..84474654663
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/video/video.h
@@ -0,0 +1,480 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Koji KITAYAMA
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_VIDEO_H_
+#define TUSB_VIDEO_H_
+
+#include "common/tusb_common.h"
+
+// Table 3-19 Color Matching Descriptor
+typedef enum {
+  VIDEO_COLOR_PRIMARIES_UNDEFINED = 0x00,
+  VIDEO_COLOR_PRIMARIES_BT709, // sRGB (default)
+  VIDEO_COLOR_PRIMARIES_BT470_2M,
+  VIDEO_COLOR_PRIMARIES_BT470_2BG,
+  VIDEO_COLOR_PRIMARIES_SMPTE170M,
+  VIDEO_COLOR_PRIMARIES_SMPTE240M,
+} video_color_primaries_t;
+
+// Table 3-19 Color Matching Descriptor
+typedef enum {
+  VIDEO_COLOR_XFER_CH_UNDEFINED = 0x00,
+  VIDEO_COLOR_XFER_CH_BT709, // default
+  VIDEO_COLOR_XFER_CH_BT470_2M,
+  VIDEO_COLOR_XFER_CH_BT470_2BG,
+  VIDEO_COLOR_XFER_CH_SMPTE170M,
+  VIDEO_COLOR_XFER_CH_SMPTE240M,
+  VIDEO_COLOR_XFER_CH_LINEAR,
+  VIDEO_COLOR_XFER_CH_SRGB,
+} video_color_transfer_characteristics_t;
+
+// Table 3-19 Color Matching Descriptor
+typedef enum {
+  VIDEO_COLOR_COEF_UNDEFINED = 0x00,
+  VIDEO_COLOR_COEF_BT709,
+  VIDEO_COLOR_COEF_FCC,
+  VIDEO_COLOR_COEF_BT470_2BG,
+  VIDEO_COLOR_COEF_SMPTE170M, // BT.601 default
+  VIDEO_COLOR_COEF_SMPTE240M,
+} video_color_matrix_coefficients_t;
+
+/* 4.2.1.2 Request Error Code Control */
+typedef enum {
+  VIDEO_ERROR_NONE = 0, /* The request succeeded. */
+  VIDEO_ERROR_NOT_READY,
+  VIDEO_ERROR_WRONG_STATE,
+  VIDEO_ERROR_POWER,
+  VIDEO_ERROR_OUT_OF_RANGE,
+  VIDEO_ERROR_INVALID_UNIT,
+  VIDEO_ERROR_INVALID_CONTROL,
+  VIDEO_ERROR_INVALID_REQUEST,
+  VIDEO_ERROR_INVALID_VALUE_WITHIN_RANGE,
+  VIDEO_ERROR_UNKNOWN = 0xFF,
+} video_error_code_t;
+
+/* A.2 Interface Subclass */
+typedef enum {
+  VIDEO_SUBCLASS_UNDEFINED = 0x00,
+  VIDEO_SUBCLASS_CONTROL,
+  VIDEO_SUBCLASS_STREAMING,
+  VIDEO_SUBCLASS_INTERFACE_COLLECTION,
+} video_subclass_type_t;
+
+/* A.3 Interface Protocol */
+typedef enum {
+  VIDEO_ITF_PROTOCOL_UNDEFINED = 0x00,
+  VIDEO_ITF_PROTOCOL_15,
+} video_interface_protocol_code_t;
+
+/* A.5 Class-Specific VideoControl Interface Descriptor Subtypes */
+typedef enum {
+  VIDEO_CS_ITF_VC_UNDEFINED = 0x00,
+  VIDEO_CS_ITF_VC_HEADER,
+  VIDEO_CS_ITF_VC_INPUT_TERMINAL,
+  VIDEO_CS_ITF_VC_OUTPUT_TERMINAL,
+  VIDEO_CS_ITF_VC_SELECTOR_UNIT,
+  VIDEO_CS_ITF_VC_PROCESSING_UNIT,
+  VIDEO_CS_ITF_VC_EXTENSION_UNIT,
+  VIDEO_CS_ITF_VC_ENCODING_UNIT,
+  VIDEO_CS_ITF_VC_MAX,
+} video_cs_vc_interface_subtype_t;
+
+/* A.6 Class-Specific VideoStreaming Interface Descriptor Subtypes */
+typedef enum {
+  VIDEO_CS_ITF_VS_UNDEFINED             = 0x00,
+  VIDEO_CS_ITF_VS_INPUT_HEADER          = 0x01,
+  VIDEO_CS_ITF_VS_OUTPUT_HEADER         = 0x02,
+  VIDEO_CS_ITF_VS_STILL_IMAGE_FRAME     = 0x03,
+  VIDEO_CS_ITF_VS_FORMAT_UNCOMPRESSED   = 0x04,
+  VIDEO_CS_ITF_VS_FRAME_UNCOMPRESSED    = 0x05,
+  VIDEO_CS_ITF_VS_FORMAT_MJPEG          = 0x06,
+  VIDEO_CS_ITF_VS_FRAME_MJPEG           = 0x07,
+  VIDEO_CS_ITF_VS_FORMAT_MPEG2TS        = 0x0A,
+  VIDEO_CS_ITF_VS_FORMAT_DV             = 0x0C,
+  VIDEO_CS_ITF_VS_COLORFORMAT           = 0x0D,
+  VIDEO_CS_ITF_VS_FORMAT_FRAME_BASED    = 0x10,
+  VIDEO_CS_ITF_VS_FRAME_FRAME_BASED     = 0x11,
+  VIDEO_CS_ITF_VS_FORMAT_STREAM_BASED   = 0x12,
+  VIDEO_CS_ITF_VS_FORMAT_H264           = 0x13,
+  VIDEO_CS_ITF_VS_FRAME_H264            = 0x14,
+  VIDEO_CS_ITF_VS_FORMAT_H264_SIMULCAST = 0x15,
+  VIDEO_CS_ITF_VS_FORMAT_VP8            = 0x16,
+  VIDEO_CS_ITF_VS_FRAME_VP8             = 0x17,
+  VIDEO_CS_ITF_VS_FORMAT_VP8_SIMULCAST  = 0x18,
+} video_cs_vs_interface_subtype_t;
+
+/* A.7. Class-Specific Endpoint Descriptor Subtypes */
+typedef enum {
+  VIDEO_CS_EP_UNDEFINED = 0x00,
+  VIDEO_CS_EP_GENERAL,
+  VIDEO_CS_EP_ENDPOINT,
+  VIDEO_CS_EP_INTERRUPT
+} video_cs_ep_subtype_t;
+
+/* A.8 Class-Specific Request Codes */
+typedef enum {
+  VIDEO_REQUEST_UNDEFINED   = 0x00,
+  VIDEO_REQUEST_SET_CUR     = 0x01,
+  VIDEO_REQUEST_SET_CUR_ALL = 0x11,
+  VIDEO_REQUEST_GET_CUR     = 0x81,
+  VIDEO_REQUEST_GET_MIN     = 0x82,
+  VIDEO_REQUEST_GET_MAX     = 0x83,
+  VIDEO_REQUEST_GET_RES     = 0x84,
+  VIDEO_REQUEST_GET_LEN     = 0x85,
+  VIDEO_REQUEST_GET_INFO    = 0x86,
+  VIDEO_REQUEST_GET_DEF     = 0x87,
+  VIDEO_REQUEST_GET_CUR_ALL = 0x91,
+  VIDEO_REQUEST_GET_MIN_ALL = 0x92,
+  VIDEO_REQUEST_GET_MAX_ALL = 0x93,
+  VIDEO_REQUEST_GET_RES_ALL = 0x94,
+  VIDEO_REQUEST_GET_DEF_ALL = 0x97
+} video_control_request_t;
+
+/* A.9.1 VideoControl Interface Control Selectors */
+typedef enum {
+  VIDEO_VC_CTL_UNDEFINED = 0x00,
+  VIDEO_VC_CTL_VIDEO_POWER_MODE,
+  VIDEO_VC_CTL_REQUEST_ERROR_CODE,
+} video_interface_control_selector_t;
+
+/* A.9.8 VideoStreaming Interface Control Selectors */
+typedef enum {
+  VIDEO_VS_CTL_UNDEFINED = 0x00,
+  VIDEO_VS_CTL_PROBE,
+  VIDEO_VS_CTL_COMMIT,
+  VIDEO_VS_CTL_STILL_PROBE,
+  VIDEO_VS_CTL_STILL_COMMIT,
+  VIDEO_VS_CTL_STILL_IMAGE_TRIGGER,
+  VIDEO_VS_CTL_STREAM_ERROR_CODE,
+  VIDEO_VS_CTL_GENERATE_KEY_FRAME,
+  VIDEO_VS_CTL_UPDATE_FRAME_SEGMENT,
+  VIDEO_VS_CTL_SYNCH_DELAY_CONTROL,
+} video_interface_streaming_selector_t;
+
+/* B. Terminal Types */
+typedef enum {
+  // Terminal
+  VIDEO_TT_VENDOR_SPECIFIC         = 0x0100,
+  VIDEO_TT_STREAMING               = 0x0101,
+
+  // Input
+  VIDEO_ITT_VENDOR_SPECIFIC        = 0x0200,
+  VIDEO_ITT_CAMERA                 = 0x0201,
+  VIDEO_ITT_MEDIA_TRANSPORT_INPUT  = 0x0202,
+
+  // Output
+  VIDEO_OTT_VENDOR_SPECIFIC        = 0x0300,
+  VIDEO_OTT_DISPLAY                = 0x0301,
+  VIDEO_OTT_MEDIA_TRANSPORT_OUTPUT = 0x0302,
+
+  // External
+  VIDEO_ETT_VENDOR_SPEIFIC         = 0x0400,
+  VIDEO_ETT_COMPOSITE_CONNECTOR    = 0x0401,
+  VIDEO_ETT_SVIDEO_CONNECTOR       = 0x0402,
+  VIDEO_ETT_COMPONENT_CONNECTOR    = 0x0403,
+} video_terminal_type_t;
+
+//--------------------------------------------------------------------+
+// Descriptors
+//--------------------------------------------------------------------+
+
+/* 2.3.4.2 */
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint16_t bcdUVC;
+  uint16_t wTotalLength;
+  uint32_t dwClockFrequency;
+  uint8_t  bInCollection;
+  uint8_t  baInterfaceNr[];
+} tusb_desc_cs_video_ctl_itf_hdr_t;
+
+/* 2.4.3.3 */
+typedef struct TU_ATTR_PACKED {
+  uint8_t bHeaderLength;
+  union {
+    uint8_t bmHeaderInfo;
+    struct {
+      uint8_t FrameID:              1;
+      uint8_t EndOfFrame:           1;
+      uint8_t PresentationTime:     1;
+      uint8_t SourceClockReference: 1;
+      uint8_t PayloadSpecific:      1;
+      uint8_t StillImage:           1;
+      uint8_t Error:                1;
+      uint8_t EndOfHeader:          1;
+    };
+  };
+} tusb_video_payload_header_t;
+
+/* 3.9.2.1 */
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bNumFormats;
+  uint16_t wTotalLength;
+  uint8_t  bEndpointAddress;
+  uint8_t  bmInfo;
+  uint8_t  bTerminalLink;
+  uint8_t  bStillCaptureMethod;
+  uint8_t  bTriggerSupport;
+  uint8_t  bTriggerUsage;
+  uint8_t  bControlSize;
+  uint8_t  bmaControls[];
+} tusb_desc_cs_video_stm_itf_in_hdr_t;
+
+/* 3.9.2.2 */
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bNumFormats;
+  uint16_t wTotalLength;
+  uint8_t  bEndpointAddress;
+  uint8_t  bTerminalLink;
+  uint8_t  bControlSize;
+  uint8_t  bmaControls[];
+} tusb_desc_cs_video_stm_itf_out_hdr_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bNumFormats;
+  uint16_t wTotalLength;
+  uint8_t  bEndpointAddress;
+  union {
+    struct {
+      uint8_t  bmInfo;
+      uint8_t  bTerminalLink;
+      uint8_t  bStillCaptureMethod;
+      uint8_t  bTriggerSupport;
+      uint8_t  bTriggerUsage;
+      uint8_t  bControlSize;
+      uint8_t  bmaControls[];
+    } input;
+    struct {
+      uint8_t  bEndpointAddress;
+      uint8_t  bTerminalLink;
+      uint8_t  bControlSize;
+      uint8_t  bmaControls[];
+    } output;
+  };
+} tusb_desc_cs_video_stm_itf_hdr_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength;
+  uint8_t bDescriptorType;
+  uint8_t bDescriptorSubType;
+  uint8_t bFormatIndex;
+  uint8_t bNumFrameDescriptors;
+  uint8_t guidFormat[16];
+  uint8_t bBitsPerPixel;
+  uint8_t bDefaultFrameIndex;
+  uint8_t bAspectRatioX;
+  uint8_t bAspectRatioY;
+  uint8_t bmInterlaceFlags;
+  uint8_t bCopyProtect;
+} tusb_desc_cs_video_fmt_uncompressed_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bFrameIndex;
+  uint8_t  bmCapabilities;
+  uint16_t wWidth;
+  uint16_t wHeight;
+  uint32_t dwMinBitRate;
+  uint32_t dwMaxBitRate;
+  uint32_t dwMaxVideoFrameBufferSize; /* deprecated */
+  uint32_t dwDefaultFrameInterval;
+  uint8_t  bFrameIntervalType;
+  uint32_t dwFrameInterval[];
+} tusb_desc_cs_video_frm_uncompressed_t;
+
+//--------------------------------------------------------------------+
+// Requests
+//--------------------------------------------------------------------+
+
+/* 4.3.1.1 */
+typedef struct TU_ATTR_PACKED {
+  union {
+    uint8_t bmHint;
+    struct TU_ATTR_PACKED {
+      uint16_t dwFrameInterval: 1;
+      uint16_t wKeyFrameRatel : 1;
+      uint16_t wPFrameRate    : 1;
+      uint16_t wCompQuality   : 1;
+      uint16_t wCompWindowSize: 1;
+      uint16_t                : 0;
+    } Hint;
+  };
+  uint8_t  bFormatIndex;
+  uint8_t  bFrameIndex;
+  uint32_t dwFrameInterval;
+  uint16_t wKeyFrameRate;
+  uint16_t wPFrameRate;
+  uint16_t wCompQuality;
+  uint16_t wCompWindowSize;
+  uint16_t wDelay;
+  uint32_t dwMaxVideoFrameSize;
+  uint32_t dwMaxPayloadTransferSize;
+  uint32_t dwClockFrequency;
+  union {
+    uint8_t bmFramingInfo;
+    struct TU_ATTR_PACKED {
+      uint8_t FrameID   : 1;
+      uint8_t EndOfFrame: 1;
+      uint8_t EndOfSlice: 1;
+      uint8_t           : 0;
+    } FramingInfo;
+  };
+  uint8_t  bPreferedVersion;
+  uint8_t  bMinVersion;
+  uint8_t  bMaxVersion;
+  uint8_t  bUsage;
+  uint8_t  bBitDepthLuma;
+  uint8_t  bmSettings;
+  uint8_t  bMaxNumberOfRefFramesPlus1;
+  uint16_t bmRateControlModes;
+  uint64_t bmLayoutPerStream;
+} video_probe_and_commit_control_t;
+
+TU_VERIFY_STATIC( sizeof(video_probe_and_commit_control_t) == 48, "size is not correct");
+
+#define TUD_VIDEO_DESC_IAD_LEN                    8
+#define TUD_VIDEO_DESC_STD_VC_LEN                 9
+#define TUD_VIDEO_DESC_CS_VC_LEN                  12
+#define TUD_VIDEO_DESC_INPUT_TERM_LEN             8
+#define TUD_VIDEO_DESC_OUTPUT_TERM_LEN            9
+#define TUD_VIDEO_DESC_CAMERA_TERM_LEN            18
+#define TUD_VIDEO_DESC_STD_VS_LEN                 9
+#define TUD_VIDEO_DESC_CS_VS_IN_LEN               13
+#define TUD_VIDEO_DESC_CS_VS_OUT_LEN              9
+#define TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN      27
+#define TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN 38
+#define TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_DISC_LEN 26
+#define TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN   6
+
+/* 2.2 compression formats */
+#define TUD_VIDEO_GUID_YUY2   0x59,0x55,0x59,0x32,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71
+#define TUD_VIDEO_GUID_NV12   0x4E,0x56,0x31,0x32,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71
+#define TUD_VIDEO_GUID_M420   0x4D,0x34,0x32,0x30,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71
+#define TUD_VIDEO_GUID_I420   0x49,0x34,0x32,0x30,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71
+
+#define TUD_VIDEO_DESC_IAD(_firstitfs, _nitfs, _stridx) \
+  TUD_VIDEO_DESC_IAD_LEN, TUSB_DESC_INTERFACE_ASSOCIATION, \
+  _firstitfs, _nitfs, TUSB_CLASS_VIDEO, VIDEO_SUBCLASS_INTERFACE_COLLECTION, \
+  VIDEO_ITF_PROTOCOL_UNDEFINED, _stridx
+
+#define TUD_VIDEO_DESC_STD_VC(_itfnum, _nEPs, _stridx) \
+  TUD_VIDEO_DESC_STD_VC_LEN, TUSB_DESC_INTERFACE, _itfnum, /* fixed to zero */ 0x00, \
+  _nEPs, TUSB_CLASS_VIDEO, VIDEO_SUBCLASS_CONTROL, VIDEO_ITF_PROTOCOL_15, _stridx
+
+/* 3.7.2 */
+#define TUD_VIDEO_DESC_CS_VC(_bcdUVC, _totallen, _clkfreq, ...)	\
+  TUD_VIDEO_DESC_CS_VC_LEN + (TU_ARGS_NUM(__VA_ARGS__)), TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VC_HEADER, \
+  U16_TO_U8S_LE(_bcdUVC), U16_TO_U8S_LE((_totallen) + TUD_VIDEO_DESC_CS_VC_LEN + (TU_ARGS_NUM(__VA_ARGS__))), \
+  U32_TO_U8S_LE(_clkfreq), TU_ARGS_NUM(__VA_ARGS__), __VA_ARGS__
+
+/* 3.7.2.1 */
+#define TUD_VIDEO_DESC_INPUT_TERM(_tid, _tt, _at, _stridx) \
+  TUD_VIDEO_DESC_INPUT_TERM_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VC_INPUT_TERMINAL, \
+    _tid, U16_TO_U8S_LE(_tt), _at, _stridx
+
+/* 3.7.2.2 */
+#define TUD_VIDEO_DESC_OUTPUT_TERM(_tid, _tt, _at, _srcid, _stridx) \
+  TUD_VIDEO_DESC_OUTPUT_TERM_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VC_OUTPUT_TERMINAL, \
+    _tid, U16_TO_U8S_LE(_tt), _at, _srcid, _stridx
+
+/* 3.7.2.3 */
+#define TUD_VIDEO_DESC_CAMERA_TERM(_tid, _at, _stridx, _focal_min, _focal_max, _focal, _ctls) \
+  TUD_VIDEO_DESC_CAMERA_TERM_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VC_INPUT_TERMINAL, \
+    _tid, U16_TO_U8S_LE(VIDEO_ITT_CAMERA), _at, _stridx, \
+    U16_TO_U8S_LE(_focal_min), U16_TO_U8S_LE(_focal_max), U16_TO_U8S_LE(_focal), 3, \
+    TU_U32_BYTE0(_ctls), TU_U32_BYTE1(_ctls), TU_U32_BYTE2(_ctls)
+
+/* 3.9.1 */
+#define TUD_VIDEO_DESC_STD_VS(_itfnum, _alt, _epn, _stridx) \
+  TUD_VIDEO_DESC_STD_VS_LEN, TUSB_DESC_INTERFACE, _itfnum, _alt, \
+  _epn, TUSB_CLASS_VIDEO, VIDEO_SUBCLASS_STREAMING, VIDEO_ITF_PROTOCOL_15, _stridx
+
+/* 3.9.2.1 */
+#define TUD_VIDEO_DESC_CS_VS_INPUT(_numfmt, _totallen, _ep, _inf, _termlnk, _sticaptmeth, _trgspt, _trgusg, ...) \
+  TUD_VIDEO_DESC_CS_VS_IN_LEN + (_numfmt) * (TU_ARGS_NUM(__VA_ARGS__)), TUSB_DESC_CS_INTERFACE, \
+  VIDEO_CS_ITF_VS_INPUT_HEADER, _numfmt, \
+  U16_TO_U8S_LE((_totallen) + TUD_VIDEO_DESC_CS_VS_IN_LEN + (_numfmt) * (TU_ARGS_NUM(__VA_ARGS__))), \
+  _ep, _inf, _termlnk, _sticaptmeth, _trgspt, _trgusg, (TU_ARGS_NUM(__VA_ARGS__)), __VA_ARGS__
+
+/* 3.9.2.2 */
+#define TUD_VIDEO_DESC_CS_VS_OUTPUT(_numfmt, _totallen, _ep, _inf, _termlnk, ...) \
+  TUD_VIDEO_DESC_CS_VS_OUT_LEN + (_numfmt) * (TU_ARGS_NUM(__VA_ARGS__)), TUSB_DESC_CS_INTERFACE, \
+  VIDEO_CS_ITF_VS_OUTPUT_HEADER, _numfmt, \
+  U16_TO_U8S_LE((_totallen) + TUD_VIDEO_DESC_CS_VS_OUT_LEN + (_numfmt) * (TU_ARGS_NUM(__VA_ARGS__))), \
+  _ep, _inf, _termlnk, (TU_ARGS_NUM(__VA_ARGS__)), __VA_ARGS__
+
+/* Uncompressed 3.1.1 */
+#define TUD_VIDEO_GUID(_g0,_g1,_g2,_g3,_g4,_g5,_g6,_g7,_g8,_g9,_g10,_g11,_g12,_g13,_g14,_g15) _g0,_g1,_g2,_g3,_g4,_g5,_g6,_g7,_g8,_g9,_g10,_g11,_g12,_g13,_g14,_g15
+
+#define TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR(_fmtidx, _numfrmdesc, \
+  _guid, _bitsperpix, _frmidx, _asrx, _asry, _interlace, _cp) \
+  TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FORMAT_UNCOMPRESSED, \
+  _fmtidx, _numfrmdesc, TUD_VIDEO_GUID(_guid), \
+  _bitsperpix, _frmidx, _asrx,  _asry, _interlace, _cp
+
+/* Uncompressed 3.1.2 Table 3-3 */
+#define TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT(_frmidx, _cap, _width, _height, _minbr, _maxbr, _maxfrmbufsz, _frminterval, _minfrminterval, _maxfrminterval, _frmintervalstep) \
+  TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FRAME_UNCOMPRESSED, \
+  _frmidx, _cap, U16_TO_U8S_LE(_width), U16_TO_U8S_LE(_height), U32_TO_U8S_LE(_minbr), U32_TO_U8S_LE(_maxbr), \
+  U32_TO_U8S_LE(_maxfrmbufsz), U32_TO_U8S_LE(_frminterval), 0, \
+  U32_TO_U8S_LE(_minfrminterval), U32_TO_U8S_LE(_maxfrminterval), U32_TO_U8S_LE(_frmintervalstep)
+
+/* Uncompressed 3.1.2 Table 3-4 */
+#define TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_DISC(_frmidx, _cap, _width, _height, _minbr, _maxbr, _maxfrmbufsz, _frminterval, ...) \
+  TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_DISC_LEN + (TU_ARGS_NUM(__VA_ARGS__)) * 4, \
+  TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FRAME_UNCOMPRESSED, \
+  _frmidx, _cap, U16_TO_U8S_LE(_width), U16_TO_U8S_LE(_height), U32_TO_U8S_LE(_minbr), U32_TO_U8S_LE(_maxbr), \
+  U32_TO_U8S_LE(_maxfrmbufsz), U32_TO_U8S_LE(_frminterval), (TU_ARGS_NUM(__VA_ARGS__)), __VA_ARGS__
+
+/* 3.9.2.6 */
+#define TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING(_color, _trns, _mat) \
+  TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN, \
+  TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_COLORFORMAT, \
+  _color, _trns, _mat
+
+/* 3.10.1.1 */
+#define TUD_VIDEO_DESC_EP_ISO(_ep, _epsize, _ep_interval) \
+  7, TUSB_DESC_ENDPOINT, _ep, TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS,\
+  U16_TO_U8S_LE(_epsize), _ep_interval
+
+/* 3.10.1.2 */
+#define TUD_VIDEO_DESC_EP_BULK(_ep, _epsize, _ep_interval) \
+  7, TUSB_DESC_ENDPOINT, _ep, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), _ep_interval
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/video/video_device.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/video/video_device.h
new file mode 100644
index 00000000000..ee2fcb9d513
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/class/video/video_device.h
@@ -0,0 +1,97 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2021 Koji KITAYAMA
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_VIDEO_DEVICE_H_
+#define TUSB_VIDEO_DEVICE_H_
+
+#include "common/tusb_common.h"
+#include "video.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Ports)
+// CFG_TUD_VIDEO > 1
+//--------------------------------------------------------------------+
+
+/** Return true if streaming
+ *
+ * @param[in] ctl_idx    Destination control interface index
+ * @param[in] stm_idx    Destination streaming interface index */
+bool tud_video_n_streaming(uint_fast8_t ctl_idx, uint_fast8_t stm_idx);
+
+/** Transfer a frame
+ *
+ * @param[in] ctl_idx    Destination control interface index
+ * @param[in] stm_idx    Destination streaming interface index
+ * @param[in] buffer     Frame buffer. The caller must not use this buffer until the operation is completed.
+ * @param[in] bufsize    Byte size of the frame buffer */
+bool tud_video_n_frame_xfer(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, void *buffer, size_t bufsize);
+
+/*------------- Optional callbacks -------------*/
+/** Invoked when compeletion of a frame transfer
+ *
+ * @param[in] ctl_idx    Destination control interface index
+ * @param[in] stm_idx    Destination streaming interface index */
+TU_ATTR_WEAK void tud_video_frame_xfer_complete_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx);
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+
+/** Invoked when SET_POWER_MODE request received
+ *
+ * @param[in] ctl_idx    Destination control interface index
+ * @param[in] stm_idx    Destination streaming interface index
+ * @return video_error_code_t */
+TU_ATTR_WEAK int tud_video_power_mode_cb(uint_fast8_t ctl_idx, uint8_t power_mod);
+
+/** Invoked when VS_COMMIT_CONTROL(SET_CUR) request received
+ *
+ * @param[in] ctl_idx     Destination control interface index
+ * @param[in] stm_idx     Destination streaming interface index
+ * @param[in] parameters  Video streaming parameters
+ * @return video_error_code_t */
+TU_ATTR_WEAK int tud_video_commit_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx,
+                                     video_probe_and_commit_control_t const *parameters);
+
+//--------------------------------------------------------------------+
+// INTERNAL USBD-CLASS DRIVER API
+//--------------------------------------------------------------------+
+void     videod_init           (void);
+void     videod_reset          (uint8_t rhport);
+uint16_t videod_open           (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     videod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool     videod_xfer_cb        (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h
new file mode 100644
index 00000000000..58591f0bea0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h
@@ -0,0 +1,262 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_COMMON_H_
+#define _TUSB_COMMON_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Macros Helper
+//--------------------------------------------------------------------+
+#define TU_ARRAY_SIZE(_arr)   ( sizeof(_arr) / sizeof(_arr[0]) )
+#define TU_MIN(_x, _y)        ( ( (_x) < (_y) ) ? (_x) : (_y) )
+#define TU_MAX(_x, _y)        ( ( (_x) > (_y) ) ? (_x) : (_y) )
+
+#define TU_U16(_high, _low)   ((uint16_t) (((_high) << 8) | (_low)))
+#define TU_U16_HIGH(_u16)     ((uint8_t) (((_u16) >> 8) & 0x00ff))
+#define TU_U16_LOW(_u16)      ((uint8_t) ((_u16)       & 0x00ff))
+#define U16_TO_U8S_BE(_u16)   TU_U16_HIGH(_u16), TU_U16_LOW(_u16)
+#define U16_TO_U8S_LE(_u16)   TU_U16_LOW(_u16), TU_U16_HIGH(_u16)
+
+#define TU_U32_BYTE3(_u32)    ((uint8_t) ((((uint32_t) _u32) >> 24) & 0x000000ff)) // MSB
+#define TU_U32_BYTE2(_u32)    ((uint8_t) ((((uint32_t) _u32) >> 16) & 0x000000ff))
+#define TU_U32_BYTE1(_u32)    ((uint8_t) ((((uint32_t) _u32) >>  8) & 0x000000ff))
+#define TU_U32_BYTE0(_u32)    ((uint8_t) (((uint32_t)  _u32)        & 0x000000ff)) // LSB
+
+#define U32_TO_U8S_BE(_u32)   TU_U32_BYTE3(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE0(_u32)
+#define U32_TO_U8S_LE(_u32)   TU_U32_BYTE0(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE3(_u32)
+
+#define TU_BIT(n)             (1UL << (n))
+#define TU_GENMASK(h, l)      ( (UINT32_MAX << (l)) & (UINT32_MAX >> (31 - (h))) )
+
+//--------------------------------------------------------------------+
+// Includes
+//--------------------------------------------------------------------+
+
+// Standard Headers
+#include <stdbool.h>
+#include <stdint.h>
+#include <stddef.h>
+#include <string.h>
+#include <stdio.h>
+
+// Tinyusb Common Headers
+#include "tusb_option.h"
+#include "tusb_compiler.h"
+#include "tusb_verify.h"
+#include "tusb_types.h"
+#include "tusb_debug.h"
+
+#include "tusb_timeout.h" // TODO remove
+
+//--------------------------------------------------------------------+
+// Internal Inline Functions
+//--------------------------------------------------------------------+
+
+//------------- Mem -------------//
+#define tu_memclr(buffer, size)  memset((buffer), 0, (size))
+#define tu_varclr(_var)          tu_memclr(_var, sizeof(*(_var)))
+
+//------------- Bytes -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_u32(uint8_t b3, uint8_t b2, uint8_t b1, uint8_t b0)
+{
+  return ( ((uint32_t) b3) << 24) | ( ((uint32_t) b2) << 16) | ( ((uint32_t) b1) << 8) | b0;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u16(uint8_t high, uint8_t low)
+{
+  return (uint16_t) ((((uint16_t) high) << 8) | low);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte3(uint32_t ui32) { return TU_U32_BYTE3(ui32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte2(uint32_t ui32) { return TU_U32_BYTE2(ui32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte1(uint32_t ui32) { return TU_U32_BYTE1(ui32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte0(uint32_t ui32) { return TU_U32_BYTE0(ui32); }
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u32_high16(uint32_t ui32) { return (uint16_t) (ui32 >> 16); }
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u32_low16 (uint32_t ui32) { return (uint16_t) (ui32 & 0x0000ffffu); }
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t ui16) { return TU_U16_HIGH(ui16); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t ui16) { return TU_U16_LOW(ui16); }
+
+//------------- Bits -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_bit_set  (uint32_t value, uint8_t pos) { return value | TU_BIT(pos);                  }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_bit_clear(uint32_t value, uint8_t pos) { return value & (~TU_BIT(pos));               }
+TU_ATTR_ALWAYS_INLINE static inline bool     tu_bit_test (uint32_t value, uint8_t pos) { return (value & TU_BIT(pos)) ? true : false; }
+
+//------------- Min -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint8_t  tu_min8  (uint8_t  x, uint8_t y ) { return (x < y) ? x : y; }
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_min16 (uint16_t x, uint16_t y) { return (x < y) ? x : y; }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_min32 (uint32_t x, uint32_t y) { return (x < y) ? x : y; }
+
+//------------- Max -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint8_t  tu_max8  (uint8_t  x, uint8_t y ) { return (x > y) ? x : y; }
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_max16 (uint16_t x, uint16_t y) { return (x > y) ? x : y; }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_max32 (uint32_t x, uint32_t y) { return (x > y) ? x : y; }
+
+//------------- Align -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align(uint32_t value, uint32_t alignment)
+{
+  return value & ((uint32_t) ~(alignment-1));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align16 (uint32_t value) { return (value & 0xFFFFFFF0UL); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align32 (uint32_t value) { return (value & 0xFFFFFFE0UL); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); }
+
+//------------- Mathematics -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return (v + d -1)/d; }
+
+/// inclusive range checking TODO remove
+TU_ATTR_ALWAYS_INLINE static inline bool tu_within(uint32_t lower, uint32_t value, uint32_t upper)
+{
+  return (lower <= value) && (value <= upper);
+}
+
+// log2 of a value is its MSB's position
+// TODO use clz TODO remove
+static inline uint8_t tu_log2(uint32_t value)
+{
+  uint8_t result = 0;
+  while (value >>= 1) { result++; }
+  return result;
+}
+
+//------------- Unaligned Access -------------//
+#if TUP_ARCH_STRICT_ALIGN
+
+// Rely on compiler to generate correct code for unaligned access
+typedef struct { uint16_t val; } TU_ATTR_PACKED tu_unaligned_uint16_t;
+typedef struct { uint32_t val; } TU_ATTR_PACKED tu_unaligned_uint32_t;
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32(const void* mem)
+{
+  tu_unaligned_uint32_t const* ua32 = (tu_unaligned_uint32_t const*) mem;
+  return ua32->val;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32(void* mem, uint32_t value)
+{
+  tu_unaligned_uint32_t* ua32 = (tu_unaligned_uint32_t*) mem;
+  ua32->val = value;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16(const void* mem)
+{
+  tu_unaligned_uint16_t const* ua16 = (tu_unaligned_uint16_t const*) mem;
+  return ua16->val;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void* mem, uint16_t value)
+{
+  tu_unaligned_uint16_t* ua16 = (tu_unaligned_uint16_t*) mem;
+  ua16->val = value;
+}
+
+#elif TUP_MCU_STRICT_ALIGN
+
+// MCU such as LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM although it is ARM M4.
+// We have to manually pick up bytes since tu_unaligned_uint32_t will still generate unaligned code
+// NOTE: volatile cast to memory to prevent compiler to optimize and generate unaligned code
+// TODO Big Endian may need minor changes
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32(const void* mem)
+{
+  volatile uint8_t const* buf8 = (uint8_t const*) mem;
+  return tu_u32(buf8[3], buf8[2], buf8[1], buf8[0]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32(void* mem, uint32_t value)
+{
+  volatile uint8_t* buf8 = (uint8_t*) mem;
+  buf8[0] = tu_u32_byte0(value);
+  buf8[1] = tu_u32_byte1(value);
+  buf8[2] = tu_u32_byte2(value);
+  buf8[3] = tu_u32_byte3(value);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16(const void* mem)
+{
+  volatile uint8_t const* buf8 = (uint8_t const*) mem;
+  return tu_u16(buf8[1], buf8[0]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void* mem, uint16_t value)
+{
+  volatile uint8_t* buf8 = (uint8_t*) mem;
+  buf8[0] = tu_u16_low(value);
+  buf8[1] = tu_u16_high(value);
+}
+
+
+#else
+
+// MCU that could access unaligned memory natively
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32  (const void* mem) { return *((uint32_t const *) mem); }
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16  (const void* mem) { return *((uint16_t const *) mem); }
+
+TU_ATTR_ALWAYS_INLINE static inline void     tu_unaligned_write32 (void* mem, uint32_t value ) { *((uint32_t*) mem) = value; }
+TU_ATTR_ALWAYS_INLINE static inline void     tu_unaligned_write16 (void* mem, uint16_t value ) { *((uint16_t*) mem) = value; }
+
+#endif
+
+// To be removed
+//------------- Binary constant -------------//
+#if defined(__GNUC__) && !defined(__CC_ARM)
+
+#define TU_BIN8(x)               ((uint8_t)  (0b##x))
+#define TU_BIN16(b1, b2)         ((uint16_t) (0b##b1##b2))
+#define TU_BIN32(b1, b2, b3, b4) ((uint32_t) (0b##b1##b2##b3##b4))
+
+#else
+
+//  internal macro of B8, B16, B32
+#define _B8__(x) (((x&0x0000000FUL)?1:0) \
+                +((x&0x000000F0UL)?2:0) \
+                +((x&0x00000F00UL)?4:0) \
+                +((x&0x0000F000UL)?8:0) \
+                +((x&0x000F0000UL)?16:0) \
+                +((x&0x00F00000UL)?32:0) \
+                +((x&0x0F000000UL)?64:0) \
+                +((x&0xF0000000UL)?128:0))
+
+#define TU_BIN8(d) ((uint8_t) _B8__(0x##d##UL))
+#define TU_BIN16(dmsb,dlsb) (((uint16_t)TU_BIN8(dmsb)<<8) + TU_BIN8(dlsb))
+#define TU_BIN32(dmsb,db2,db3,dlsb) \
+            (((uint32_t)TU_BIN8(dmsb)<<24) \
+            + ((uint32_t)TU_BIN8(db2)<<16) \
+            + ((uint32_t)TU_BIN8(db3)<<8) \
+            + TU_BIN8(dlsb))
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_COMMON_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_compiler.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_compiler.h
new file mode 100644
index 00000000000..ae00f4e7516
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_compiler.h
@@ -0,0 +1,264 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/** \ingroup Group_Common
+ *  \defgroup Group_Compiler Compiler
+ *  \brief Group_Compiler brief
+ *  @{ */
+
+#ifndef _TUSB_COMPILER_H_
+#define _TUSB_COMPILER_H_
+
+#define TU_TOKEN(x)           x
+#define TU_STRING(x)          #x                  ///< stringify without expand
+#define TU_XSTRING(x)         TU_STRING(x)        ///< expand then stringify
+
+#define TU_STRCAT(a, b)       a##b                ///< concat without expand
+#define TU_STRCAT3(a, b, c)   a##b##c             ///< concat without expand
+
+#define TU_XSTRCAT(a, b)      TU_STRCAT(a, b)     ///< expand then concat
+#define TU_XSTRCAT3(a, b, c)  TU_STRCAT3(a, b, c) ///< expand then concat 3 tokens
+
+#define TU_INCLUDE_PATH(_dir,_file) TU_XSTRING( TU_TOKEN(_dir)TU_TOKEN(_file) )
+
+#if defined __COUNTER__ && __COUNTER__ != __COUNTER__
+  #define _TU_COUNTER_ __COUNTER__
+#else
+  #define _TU_COUNTER_ __LINE__
+#endif
+
+// Compile-time Assert
+#if defined (__cplusplus) && __cplusplus >= 201103L
+  #define TU_VERIFY_STATIC   static_assert
+#elif defined (__STDC_VERSION__) && __STDC_VERSION__ >= 201112L
+  #define TU_VERIFY_STATIC   _Static_assert
+#elif defined(__CCRX__)
+  #define TU_VERIFY_STATIC(const_expr, _mess) typedef char TU_XSTRCAT(Line, __LINE__)[(const_expr) ? 1 : 0];
+#else
+  #define TU_VERIFY_STATIC(const_expr, _mess) enum { TU_XSTRCAT(_verify_static_, _TU_COUNTER_) = 1/(!!(const_expr)) }
+#endif
+
+// for declaration of reserved field, make use of _TU_COUNTER_
+#define TU_RESERVED           TU_XSTRCAT(reserved, _TU_COUNTER_)
+
+#define TU_LITTLE_ENDIAN (0x12u)
+#define TU_BIG_ENDIAN (0x21u)
+
+/*------------------------------------------------------------------*/
+/* Count number of arguments of __VA_ARGS__
+ * - reference https://stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
+ * - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
+ * - _RSEQ_N() is reverse sequential to N to add padding to have
+ * Nth position is the same as the number of arguments
+ * - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma)
+ *------------------------------------------------------------------*/
+#if !defined(__CCRX__)
+#define TU_ARGS_NUM(...)   _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N())
+#else
+#define TU_ARGS_NUM(...)   _TU_NARG(_0, __VA_ARGS__,_RSEQ_N())
+#endif
+
+#define _TU_NARG(...)      _GET_NTH_ARG(__VA_ARGS__)
+#define _GET_NTH_ARG( \
+          _1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \
+         _11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \
+         _21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \
+         _31,_32,_33,_34,_35,_36,_37,_38,_39,_40, \
+         _41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \
+         _51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \
+         _61,_62,_63,N,...) N
+#define _RSEQ_N() \
+         62,61,60,                      \
+         59,58,57,56,55,54,53,52,51,50, \
+         49,48,47,46,45,44,43,42,41,40, \
+         39,38,37,36,35,34,33,32,31,30, \
+         29,28,27,26,25,24,23,22,21,20, \
+         19,18,17,16,15,14,13,12,11,10, \
+         9,8,7,6,5,4,3,2,1,0
+
+// Apply an macro X to each of the arguments with an separated of choice
+#define TU_ARGS_APPLY(_X, _s, ...)   TU_XSTRCAT(_TU_ARGS_APPLY_, TU_ARGS_NUM(__VA_ARGS__))(_X, _s, __VA_ARGS__)
+
+#define _TU_ARGS_APPLY_1(_X, _s, _a1)                                    _X(_a1)
+#define _TU_ARGS_APPLY_2(_X, _s, _a1, _a2)                               _X(_a1) _s _X(_a2)
+#define _TU_ARGS_APPLY_3(_X, _s, _a1, _a2, _a3)                          _X(_a1) _s _TU_ARGS_APPLY_2(_X, _s, _a2, _a3)
+#define _TU_ARGS_APPLY_4(_X, _s, _a1, _a2, _a3, _a4)                     _X(_a1) _s _TU_ARGS_APPLY_3(_X, _s, _a2, _a3, _a4)
+#define _TU_ARGS_APPLY_5(_X, _s, _a1, _a2, _a3, _a4, _a5)                _X(_a1) _s _TU_ARGS_APPLY_4(_X, _s, _a2, _a3, _a4, _a5)
+#define _TU_ARGS_APPLY_6(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6)           _X(_a1) _s _TU_ARGS_APPLY_5(_X, _s, _a2, _a3, _a4, _a5, _a6)
+#define _TU_ARGS_APPLY_7(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7)      _X(_a1) _s _TU_ARGS_APPLY_6(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7)
+#define _TU_ARGS_APPLY_8(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1) _s _TU_ARGS_APPLY_7(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
+
+//--------------------------------------------------------------------+
+// Compiler porting with Attribute and Endian
+//--------------------------------------------------------------------+
+
+// TODO refactor since __attribute__ is supported across many compiler
+#if defined(__GNUC__)
+  #define TU_ATTR_ALIGNED(Bytes)        __attribute__ ((aligned(Bytes)))
+  #define TU_ATTR_SECTION(sec_name)     __attribute__ ((section(#sec_name)))
+  #define TU_ATTR_PACKED                __attribute__ ((packed))
+  #define TU_ATTR_WEAK                  __attribute__ ((weak))
+  #define TU_ATTR_ALWAYS_INLINE         __attribute__ ((always_inline))
+  #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
+  #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
+  #define TU_ATTR_USED                  __attribute__ ((used))             // Function/Variable is meant to be used
+
+  #define TU_ATTR_PACKED_BEGIN
+  #define TU_ATTR_PACKED_END
+  #define TU_ATTR_BIT_FIELD_ORDER_BEGIN
+  #define TU_ATTR_BIT_FIELD_ORDER_END
+
+  // Endian conversion use well-known host to network (big endian) naming
+  #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+    #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
+  #else
+    #define TU_BYTE_ORDER TU_BIG_ENDIAN
+  #endif
+
+  #define TU_BSWAP16(u16) (__builtin_bswap16(u16))
+  #define TU_BSWAP32(u32) (__builtin_bswap32(u32))
+
+	#ifndef __ARMCC_VERSION
+  // List of obsolete callback function that is renamed and should not be defined.
+  // Put it here since only gcc support this pragma
+		#pragma GCC poison tud_vendor_control_request_cb
+	#endif
+
+#elif defined(__TI_COMPILER_VERSION__)
+  #define TU_ATTR_ALIGNED(Bytes)        __attribute__ ((aligned(Bytes)))
+  #define TU_ATTR_SECTION(sec_name)     __attribute__ ((section(#sec_name)))
+  #define TU_ATTR_PACKED                __attribute__ ((packed))
+  #define TU_ATTR_WEAK                  __attribute__ ((weak))
+  #define TU_ATTR_ALWAYS_INLINE         __attribute__ ((always_inline))
+  #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
+  #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
+  #define TU_ATTR_USED                  __attribute__ ((used))
+
+  #define TU_ATTR_PACKED_BEGIN
+  #define TU_ATTR_PACKED_END
+  #define TU_ATTR_BIT_FIELD_ORDER_BEGIN
+  #define TU_ATTR_BIT_FIELD_ORDER_END
+
+  // __BYTE_ORDER is defined in the TI ARM compiler, but not MSP430 (which is little endian)
+  #if ((__BYTE_ORDER__) == (__ORDER_LITTLE_ENDIAN__)) || defined(__MSP430__)
+    #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
+  #else
+    #define TU_BYTE_ORDER TU_BIG_ENDIAN
+  #endif
+
+  #define TU_BSWAP16(u16) (__builtin_bswap16(u16))
+  #define TU_BSWAP32(u32) (__builtin_bswap32(u32))
+
+#elif defined(__ICCARM__)
+  #include <intrinsics.h>
+  #define TU_ATTR_ALIGNED(Bytes)        __attribute__ ((aligned(Bytes)))
+  #define TU_ATTR_SECTION(sec_name)     __attribute__ ((section(#sec_name)))
+  #define TU_ATTR_PACKED                __attribute__ ((packed))
+  #define TU_ATTR_WEAK                  __attribute__ ((weak))
+  #define TU_ATTR_ALWAYS_INLINE         __attribute__ ((always_inline))
+  #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
+  #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
+  #define TU_ATTR_USED                  __attribute__ ((used))             // Function/Variable is meant to be used
+
+  #define TU_ATTR_PACKED_BEGIN
+  #define TU_ATTR_PACKED_END
+  #define TU_ATTR_BIT_FIELD_ORDER_BEGIN
+  #define TU_ATTR_BIT_FIELD_ORDER_END
+
+  // Endian conversion use well-known host to network (big endian) naming
+  #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+    #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
+  #else
+    #define TU_BYTE_ORDER TU_BIG_ENDIAN
+  #endif
+
+  #define TU_BSWAP16(u16) (__iar_builtin_REV16(u16))
+  #define TU_BSWAP32(u32) (__iar_builtin_REV(u32))
+
+#elif defined(__CCRX__)
+  #define TU_ATTR_ALIGNED(Bytes)
+  #define TU_ATTR_SECTION(sec_name)
+  #define TU_ATTR_PACKED
+  #define TU_ATTR_WEAK
+  #define TU_ATTR_ALWAYS_INLINE
+  #define TU_ATTR_DEPRECATED(mess)
+  #define TU_ATTR_UNUSED
+  #define TU_ATTR_USED
+
+  #define TU_ATTR_PACKED_BEGIN          _Pragma("pack")
+  #define TU_ATTR_PACKED_END            _Pragma("packoption")
+  #define TU_ATTR_BIT_FIELD_ORDER_BEGIN _Pragma("bit_order right")
+  #define TU_ATTR_BIT_FIELD_ORDER_END   _Pragma("bit_order")
+
+  // Endian conversion use well-known host to network (big endian) naming
+  #if defined(__LIT)
+    #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
+  #else
+    #define TU_BYTE_ORDER TU_BIG_ENDIAN
+  #endif
+
+  #define TU_BSWAP16(u16) ((unsigned short)_builtin_revw((unsigned long)u16))
+  #define TU_BSWAP32(u32) (_builtin_revl(u32))
+
+#else 
+  #error "Compiler attribute porting is required"
+#endif
+
+#if (TU_BYTE_ORDER == TU_LITTLE_ENDIAN)
+
+  #define tu_htons(u16)  (TU_BSWAP16(u16))
+  #define tu_ntohs(u16)  (TU_BSWAP16(u16))
+
+  #define tu_htonl(u32)  (TU_BSWAP32(u32))
+  #define tu_ntohl(u32)  (TU_BSWAP32(u32))
+
+  #define tu_htole16(u16) (u16)
+  #define tu_le16toh(u16) (u16)
+
+  #define tu_htole32(u32) (u32)
+  #define tu_le32toh(u32) (u32)
+
+#elif (TU_BYTE_ORDER == TU_BIG_ENDIAN)
+
+  #define tu_htons(u16)  (u16)
+  #define tu_ntohs(u16)  (u16)
+
+  #define tu_htonl(u32)  (u32)
+  #define tu_ntohl(u32)  (u32)
+
+  #define tu_htole16(u16) (TU_BSWAP16(u16))
+  #define tu_le16toh(u16) (TU_BSWAP16(u16))
+
+  #define tu_htole32(u32) (TU_BSWAP32(u32))
+  #define tu_le32toh(u32) (TU_BSWAP32(u32))
+
+#else
+  #error Byte order is undefined
+#endif
+
+#endif /* _TUSB_COMPILER_H_ */
+
+/// @}
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_debug.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_debug.h
new file mode 100644
index 00000000000..647e8a8db5d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_debug.h
@@ -0,0 +1,174 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_DEBUG_H_
+#define _TUSB_DEBUG_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Debug
+//--------------------------------------------------------------------+
+
+// CFG_TUSB_DEBUG for debugging
+// 0 : no debug
+// 1 : print error
+// 2 : print warning
+// 3 : print info
+#if CFG_TUSB_DEBUG
+
+// Enum to String for debugging purposes
+#if CFG_TUSB_DEBUG >= 2
+extern char const* const tu_str_speed[];
+extern char const* const tu_str_std_request[];
+#endif
+
+void tu_print_mem(void const *buf, uint32_t count, uint8_t indent);
+
+#ifdef CFG_TUSB_DEBUG_PRINTF
+  extern int CFG_TUSB_DEBUG_PRINTF(const char *format, ...);
+  #define tu_printf    CFG_TUSB_DEBUG_PRINTF
+#else
+  #define tu_printf    printf
+#endif
+
+static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize)
+{
+  for(uint32_t i=0; i<bufsize; i++) tu_printf("%02X ", buf[i]);
+}
+
+// Log with Level
+#define TU_LOG(n, ...)        TU_XSTRCAT(TU_LOG, n)(__VA_ARGS__)
+#define TU_LOG_MEM(n, ...)    TU_XSTRCAT3(TU_LOG, n, _MEM)(__VA_ARGS__)
+#define TU_LOG_VAR(n, ...)    TU_XSTRCAT3(TU_LOG, n, _VAR)(__VA_ARGS__)
+#define TU_LOG_INT(n, ...)    TU_XSTRCAT3(TU_LOG, n, _INT)(__VA_ARGS__)
+#define TU_LOG_HEX(n, ...)    TU_XSTRCAT3(TU_LOG, n, _HEX)(__VA_ARGS__)
+#define TU_LOG_LOCATION()     tu_printf("%s: %d:\r\n", __PRETTY_FUNCTION__, __LINE__)
+#define TU_LOG_FAILED()       tu_printf("%s: %d: Failed\r\n", __PRETTY_FUNCTION__, __LINE__)
+
+// Log Level 1: Error
+#define TU_LOG1               tu_printf
+#define TU_LOG1_MEM           tu_print_mem
+#define TU_LOG1_VAR(_x)       tu_print_var((uint8_t const*)(_x), sizeof(*(_x)))
+#define TU_LOG1_INT(_x)       tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) )
+#define TU_LOG1_HEX(_x)       tu_printf(#_x " = %lX\r\n", (unsigned long) (_x) )
+
+// Log Level 2: Warn
+#if CFG_TUSB_DEBUG >= 2
+  #define TU_LOG2             TU_LOG1
+  #define TU_LOG2_MEM         TU_LOG1_MEM
+  #define TU_LOG2_VAR         TU_LOG1_VAR
+  #define TU_LOG2_INT         TU_LOG1_INT
+  #define TU_LOG2_HEX         TU_LOG1_HEX
+#endif
+
+// Log Level 3: Info
+#if CFG_TUSB_DEBUG >= 3
+  #define TU_LOG3             TU_LOG1
+  #define TU_LOG3_MEM         TU_LOG1_MEM
+  #define TU_LOG3_VAR         TU_LOG1_VAR
+  #define TU_LOG3_INT         TU_LOG1_INT
+  #define TU_LOG3_HEX         TU_LOG1_HEX
+#endif
+
+typedef struct
+{
+  uint32_t key;
+  const char* data;
+} tu_lookup_entry_t;
+
+typedef struct
+{
+  uint16_t count;
+  tu_lookup_entry_t const* items;
+} tu_lookup_table_t;
+
+static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key)
+{
+  static char not_found[11];
+
+  for(uint16_t i=0; i<p_table->count; i++)
+  {
+    if (p_table->items[i].key == key) return p_table->items[i].data;
+  }
+
+  // not found return the key value in hex
+  snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long) key);
+
+  return not_found;
+}
+
+#endif // CFG_TUSB_DEBUG
+
+#ifndef TU_LOG
+  #define TU_LOG(n, ...)
+  #define TU_LOG_MEM(n, ...)
+  #define TU_LOG_VAR(n, ...)
+  #define TU_LOG_INT(n, ...)
+  #define TU_LOG_HEX(n, ...)
+  #define TU_LOG_LOCATION()
+  #define TU_LOG_FAILED()
+#endif
+
+// TODO replace all TU_LOGn with TU_LOG(n)
+
+#define TU_LOG0(...)
+#define TU_LOG0_MEM(...)
+#define TU_LOG0_VAR(...)
+#define TU_LOG0_INT(...)
+#define TU_LOG0_HEX(...)
+
+#ifndef TU_LOG1
+  #define TU_LOG1(...)
+  #define TU_LOG1_MEM(...)
+  #define TU_LOG1_VAR(...)
+  #define TU_LOG1_INT(...)
+  #define TU_LOG1_HEX(...)
+#endif
+
+#ifndef TU_LOG2
+  #define TU_LOG2(...)
+  #define TU_LOG2_MEM(...)
+  #define TU_LOG2_VAR(...)
+  #define TU_LOG2_INT(...)
+  #define TU_LOG2_HEX(...)
+#endif
+
+#ifndef TU_LOG3
+  #define TU_LOG3(...)
+  #define TU_LOG3_MEM(...)
+  #define TU_LOG3_VAR(...)
+  #define TU_LOG3_INT(...)
+  #define TU_LOG3_HEX(...)
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_DEBUG_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_fifo.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_fifo.h
new file mode 100644
index 00000000000..18db289a106
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_fifo.h
@@ -0,0 +1,151 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2020 Reinhard Panhuber - rework to unmasked pointers
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_FIFO_H_
+#define _TUSB_FIFO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Due to the use of unmasked pointers, this FIFO does not suffer from loosing
+// one item slice. Furthermore, write and read operations are completely
+// decoupled as write and read functions do not modify a common state. Henceforth,
+// writing or reading from the FIFO within an ISR is safe as long as no other
+// process (thread or ISR) interferes.
+// Also, this FIFO is ready to be used in combination with a DMA as the write and
+// read pointers can be updated from within a DMA ISR. Overflows are detectable
+// within a certain number (see tu_fifo_overflow()).
+
+#include "common/tusb_common.h"
+
+// mutex is only needed for RTOS
+// for OS None, we don't get preempted
+#define CFG_FIFO_MUTEX      (CFG_TUSB_OS != OPT_OS_NONE)
+
+#if CFG_FIFO_MUTEX
+#include "osal/osal.h"
+#define tu_fifo_mutex_t  osal_mutex_t
+#endif
+
+typedef struct
+{
+  uint8_t* buffer               ; ///< buffer pointer
+  uint16_t depth                ; ///< max items
+  uint16_t item_size            ; ///< size of each item
+  bool overwritable             ;
+
+  uint16_t non_used_index_space ; ///< required for non-power-of-two buffer length
+  uint16_t max_pointer_idx      ; ///< maximum absolute pointer index
+
+  volatile uint16_t wr_idx      ; ///< write pointer
+  volatile uint16_t rd_idx      ; ///< read pointer
+
+#if CFG_FIFO_MUTEX
+  tu_fifo_mutex_t mutex_wr;
+  tu_fifo_mutex_t mutex_rd;
+#endif
+
+} tu_fifo_t;
+
+typedef struct
+{
+  uint16_t len_lin  ; ///< linear length in item size
+  uint16_t len_wrap ; ///< wrapped length in item size
+  void * ptr_lin    ; ///< linear part start pointer
+  void * ptr_wrap   ; ///< wrapped part start pointer
+} tu_fifo_buffer_info_t;
+
+#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \
+{                                                           \
+  .buffer               = _buffer,                          \
+  .depth                = _depth,                           \
+  .item_size            = sizeof(_type),                    \
+  .overwritable         = _overwritable,                    \
+  .non_used_index_space = UINT16_MAX - (2*(_depth)-1),      \
+  .max_pointer_idx      = 2*(_depth)-1,                     \
+}
+
+#define TU_FIFO_DEF(_name, _depth, _type, _overwritable)                      \
+    uint8_t _name##_buf[_depth*sizeof(_type)];                                \
+    tu_fifo_t _name = TU_FIFO_INIT(_name##_buf, _depth, _type, _overwritable)
+
+
+bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable);
+bool tu_fifo_clear(tu_fifo_t *f);
+bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_size, bool overwritable);
+
+#if CFG_FIFO_MUTEX
+TU_ATTR_ALWAYS_INLINE static inline
+void tu_fifo_config_mutex(tu_fifo_t *f, tu_fifo_mutex_t write_mutex_hdl, tu_fifo_mutex_t read_mutex_hdl)
+{
+  f->mutex_wr = write_mutex_hdl;
+  f->mutex_rd = read_mutex_hdl;
+}
+#endif
+
+bool     tu_fifo_write                  (tu_fifo_t* f, void const * p_data);
+uint16_t tu_fifo_write_n                (tu_fifo_t* f, void const * p_data, uint16_t n);
+uint16_t tu_fifo_write_n_const_addr_full_words    (tu_fifo_t* f, const void * data, uint16_t n);
+
+bool     tu_fifo_read                   (tu_fifo_t* f, void * p_buffer);
+uint16_t tu_fifo_read_n                 (tu_fifo_t* f, void * p_buffer, uint16_t n);
+uint16_t tu_fifo_read_n_const_addr_full_words     (tu_fifo_t* f, void * buffer, uint16_t n);
+
+bool     tu_fifo_peek                   (tu_fifo_t* f, void * p_buffer);
+uint16_t tu_fifo_peek_n                 (tu_fifo_t* f, void * p_buffer, uint16_t n);
+
+uint16_t tu_fifo_count                  (tu_fifo_t* f);
+uint16_t tu_fifo_remaining              (tu_fifo_t* f);
+bool     tu_fifo_empty                  (tu_fifo_t* f);
+bool     tu_fifo_full                   (tu_fifo_t* f);
+bool     tu_fifo_overflowed             (tu_fifo_t* f);
+void     tu_fifo_correct_read_pointer   (tu_fifo_t* f);
+
+TU_ATTR_ALWAYS_INLINE static inline
+uint16_t tu_fifo_depth(tu_fifo_t* f)
+{
+  return f->depth;
+}
+
+// Pointer modifications intended to be used in combinations with DMAs.
+// USE WITH CARE - NO SAFTY CHECKS CONDUCTED HERE! NOT MUTEX PROTECTED!
+void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n);
+void tu_fifo_advance_read_pointer (tu_fifo_t *f, uint16_t n);
+
+// If you want to read/write from/to the FIFO by use of a DMA, you may need to conduct two copies
+// to handle a possible wrapping part. These functions deliver a pointer to start
+// reading/writing from/to and a valid linear length along which no wrap occurs.
+void tu_fifo_get_read_info (tu_fifo_t *f, tu_fifo_buffer_info_t *info);
+void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TUSB_FIFO_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_mcu.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_mcu.h
new file mode 100644
index 00000000000..8eb4ad47581
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_mcu.h
@@ -0,0 +1,285 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MCU_H_
+#define TUSB_MCU_H_
+
+//--------------------------------------------------------------------+
+// Port Specific
+// TUP stand for TinyUSB Port (can be renamed)
+//--------------------------------------------------------------------+
+
+//------------- Unaligned Memory Access -------------//
+
+// ARMv7+ (M3-M7, M23-M33) can access unaligned memory
+#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7))
+  #define TUP_ARCH_STRICT_ALIGN   0
+#else
+  #define TUP_ARCH_STRICT_ALIGN   1
+#endif
+
+/* USB Controller Attributes for Device, Host or MCU (both)
+ * - ENDPOINT_MAX: max (logical) number of endpoint
+ * - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed,
+ *                              e.g EP1 OUT & EP1 IN cannot exist together
+ * - RHPORT_HIGHSPEED: mask to indicate which port support highspeed mode (without external PHY)
+ *                     bit0 for port0 and so on.
+ */
+
+//------------- NXP -------------//
+#if   TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
+  #define TUP_DCD_ENDPOINT_MAX    5
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
+  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_USBIP_OHCI
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
+  // TODO USB0 has 6, USB1 has 4
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX    6
+  #define TUP_RHPORT_HIGHSPEED    0x01 // Port0 HS, Port1 FS
+
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
+   #define TUP_DCD_ENDPOINT_MAX   5
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX)
+  // TODO USB0 has 5, USB1 has 6
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC55XX)
+  // TODO USB0 has 5, USB1 has 6
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX)
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_RHPORT_HIGHSPEED    0x03 // Port0 HS, Port1 HS
+
+
+#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX)
+  #define TUP_DCD_ENDPOINT_MAX    16
+
+#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
+  #define TUP_DCD_ENDPOINT_MAX    16
+
+//------------- Nordic -------------//
+#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
+  // 8 CBI + 1 ISO
+  #define TUP_DCD_ENDPOINT_MAX    9
+
+//------------- Microchip -------------//
+#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
+      TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_SAMG)
+  #define TUP_DCD_ENDPOINT_MAX    6
+  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+
+#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
+  #define TUP_DCD_ENDPOINT_MAX    10
+  #define TUP_RHPORT_HIGHSPEED    0x01
+  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+
+#elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
+  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+
+//------------- ST -------------//
+#elif TU_CHECK_MCU(OPT_MCU_STM32F0)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F1)
+  #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
+      defined (STM32F107xB) || defined (STM32F107xC)
+    #define TUP_USBIP_DWC2
+    #define TUP_USBIP_DWC2_STM32
+
+    #define TUP_DCD_ENDPOINT_MAX  4
+  #else
+    #define TUP_DCD_ENDPOINT_MAX  8
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F2)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  // FS has 4 ep, HS has 5 ep
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F3)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F4)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  // FS has 6, HS has 9
+  #define TUP_DCD_ENDPOINT_MAX    9
+
+  // MCU with on-chip HS Phy
+  #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx)
+    #define TUP_RHPORT_HIGHSPEED  0x02 // Port 0: FS, Port 1: HS
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  #define TUP_DCD_ENDPOINT_MAX    9
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32L4)
+  #if defined (STM32L475xx) || defined (STM32L476xx) ||                          \
+      defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \
+      defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
+      defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \
+      defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
+    #define TUP_USBIP_DWC2
+    #define TUP_USBIP_DWC2_STM32
+
+    #define TUP_DCD_ENDPOINT_MAX  6
+  #else
+    #define TUP_DCD_ENDPOINT_MAX  8
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32WB)
+#define TUP_DCD_ENDPOINT_MAX    8
+
+//------------- Sony -------------//
+#elif TU_CHECK_MCU(OPT_MCU_CXD56)
+  #define TUP_DCD_ENDPOINT_MAX    7
+  #define TUP_RHPORT_HIGHSPEED    0x01
+  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+
+//------------- TI -------------//
+#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+//------------- ValentyUSB -------------//
+#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
+  #define TUP_DCD_ENDPOINT_MAX    16
+
+//------------- Nuvoton -------------//
+#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_NUC120)
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+#elif TU_CHECK_MCU(OPT_MCU_NUC505)
+  #define TUP_DCD_ENDPOINT_MAX    12
+  #define TUP_RHPORT_HIGHSPEED    0x01
+
+//------------- Espressif -------------//
+#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX    6
+
+//------------- Dialog -------------//
+#elif TU_CHECK_MCU(OPT_MCU_DA1469X)
+  #define TUP_DCD_ENDPOINT_MAX    4
+
+//------------- Raspberry Pi -------------//
+#elif TU_CHECK_MCU(OPT_MCU_RP2040)
+  #define TUP_DCD_ENDPOINT_MAX    16
+
+//------------- Silabs -------------//
+#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX    7
+
+//------------- Renesas -------------//
+#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
+  #define TUP_DCD_ENDPOINT_MAX    10
+
+//------------- GigaDevice -------------//
+#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX    4
+
+//------------- Broadcom -------------//
+#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_RHPORT_HIGHSPEED    0x01
+
+//------------- Broadcom -------------//
+#elif TU_CHECK_MCU(OPT_MCU_XMC4000)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+//------------- BridgeTek -------------//
+#elif TU_CHECK_MCU(OPT_MCU_FT90X)
+  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_RHPORT_HIGHSPEED    0x01
+
+#elif TU_CHECK_MCU(OPT_MCU_FT93X)
+  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_RHPORT_HIGHSPEED    0x01
+
+//------------ Allwinner -------------//
+#elif TU_CHECK_MCU(OPT_MCU_F1C100S)
+  #define TUP_DCD_ENDPOINT_MAX    4
+
+#endif
+
+//--------------------------------------------------------------------+
+// Default Values
+//--------------------------------------------------------------------+
+
+#ifndef TUP_DCD_ENDPOINT_MAX
+  #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8"
+  #define TUP_DCD_ENDPOINT_MAX    8
+#endif
+
+// Default to fullspeed if not defined
+#ifndef TUP_RHPORT_HIGHSPEED
+  #define TUP_RHPORT_HIGHSPEED    0x00
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_private.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_private.h
new file mode 100644
index 00000000000..b34506f6500
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_private.h
@@ -0,0 +1,65 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+
+#ifndef _TUSB_PRIVATE_H_
+#define _TUSB_PRIVATE_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+typedef struct TU_ATTR_PACKED
+{
+  volatile uint8_t busy    : 1;
+  volatile uint8_t stalled : 1;
+  volatile uint8_t claimed : 1;
+}tu_edpt_state_t;
+
+//--------------------------------------------------------------------+
+// Internal Helper used by Host and Device Stack
+//--------------------------------------------------------------------+
+
+// Check if endpoint descriptor is valid per USB specs
+bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed);
+
+// Bind all endpoint of a interface descriptor to class driver
+void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* p_desc, uint16_t desc_len, uint8_t driver_id);
+
+// Calculate total length of n interfaces (depending on IAD)
+uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len);
+
+// Claim an endpoint with provided mutex
+bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex);
+
+// Release an endpoint with provided mutex
+bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_PRIVATE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_timeout.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_timeout.h
new file mode 100644
index 00000000000..ce53955f002
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_timeout.h
@@ -0,0 +1,80 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/** \ingroup Group_Common Common Files
+ *  \defgroup Group_TimeoutTimer timeout timer
+ *  @{ */
+
+#ifndef _TUSB_TIMEOUT_H_
+#define _TUSB_TIMEOUT_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+  uint32_t start;
+  uint32_t interval;
+}tu_timeout_t;
+
+#if 0
+
+extern uint32_t tusb_hal_millis(void);
+
+static inline void tu_timeout_set(tu_timeout_t* tt, uint32_t msec)
+{
+  tt->interval = msec;
+  tt->start    = tusb_hal_millis();
+}
+
+static inline bool tu_timeout_expired(tu_timeout_t* tt)
+{
+  return ( tusb_hal_millis() - tt->start ) >= tt->interval;
+}
+
+// For used with periodic event to prevent drift
+static inline void tu_timeout_reset(tu_timeout_t* tt)
+{
+  tt->start += tt->interval;
+}
+
+static inline void tu_timeout_restart(tu_timeout_t* tt)
+{
+  tt->start = tusb_hal_millis();
+}
+
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_TIMEOUT_H_ */
+
+/** @} */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h
new file mode 100644
index 00000000000..e2fa175327f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h
@@ -0,0 +1,541 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/** \ingroup group_usb_definitions
+ *  \defgroup USBDef_Type USB Types
+ *  @{ */
+
+#ifndef _TUSB_TYPES_H_
+#define _TUSB_TYPES_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "tusb_compiler.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/*------------------------------------------------------------------*/
+/* CONSTANTS
+ *------------------------------------------------------------------*/
+
+/// defined base on EHCI specs value for Endpoint Speed
+typedef enum
+{
+  TUSB_SPEED_FULL = 0,
+  TUSB_SPEED_LOW  = 1,
+  TUSB_SPEED_HIGH = 2,
+  TUSB_SPEED_INVALID = 0xff,
+}tusb_speed_t;
+
+/// defined base on USB Specs Endpoint's bmAttributes
+typedef enum
+{
+  TUSB_XFER_CONTROL = 0 ,
+  TUSB_XFER_ISOCHRONOUS ,
+  TUSB_XFER_BULK        ,
+  TUSB_XFER_INTERRUPT
+}tusb_xfer_type_t;
+
+typedef enum
+{
+  TUSB_DIR_OUT = 0,
+  TUSB_DIR_IN  = 1,
+
+  TUSB_DIR_IN_MASK = 0x80
+}tusb_dir_t;
+
+/// Isochronous End Point Attributes
+typedef enum
+{
+  TUSB_ISO_EP_ATT_NO_SYNC         = 0x00,
+  TUSB_ISO_EP_ATT_ASYNCHRONOUS    = 0x04,
+  TUSB_ISO_EP_ATT_ADAPTIVE        = 0x08,
+  TUSB_ISO_EP_ATT_SYNCHRONOUS     = 0x0C,
+  TUSB_ISO_EP_ATT_DATA            = 0x00, ///< Data End Point
+  TUSB_ISO_EP_ATT_EXPLICIT_FB     = 0x10, ///< Feedback End Point
+  TUSB_ISO_EP_ATT_IMPLICIT_FB     = 0x20, ///< Data endpoint that also serves as an implicit feedback
+}tusb_iso_ep_attribute_t;
+
+/// USB Descriptor Types
+typedef enum
+{
+  TUSB_DESC_DEVICE                = 0x01,
+  TUSB_DESC_CONFIGURATION         = 0x02,
+  TUSB_DESC_STRING                = 0x03,
+  TUSB_DESC_INTERFACE             = 0x04,
+  TUSB_DESC_ENDPOINT              = 0x05,
+  TUSB_DESC_DEVICE_QUALIFIER      = 0x06,
+  TUSB_DESC_OTHER_SPEED_CONFIG    = 0x07,
+  TUSB_DESC_INTERFACE_POWER       = 0x08,
+  TUSB_DESC_OTG                   = 0x09,
+  TUSB_DESC_DEBUG                 = 0x0A,
+  TUSB_DESC_INTERFACE_ASSOCIATION = 0x0B,
+
+  TUSB_DESC_BOS                   = 0x0F,
+  TUSB_DESC_DEVICE_CAPABILITY     = 0x10,
+
+  TUSB_DESC_FUNCTIONAL            = 0x21,
+
+  // Class Specific Descriptor
+  TUSB_DESC_CS_DEVICE             = 0x21,
+  TUSB_DESC_CS_CONFIGURATION      = 0x22,
+  TUSB_DESC_CS_STRING             = 0x23,
+  TUSB_DESC_CS_INTERFACE          = 0x24,
+  TUSB_DESC_CS_ENDPOINT           = 0x25,
+
+  TUSB_DESC_SUPERSPEED_ENDPOINT_COMPANION     = 0x30,
+  TUSB_DESC_SUPERSPEED_ISO_ENDPOINT_COMPANION = 0x31
+}tusb_desc_type_t;
+
+typedef enum
+{
+  TUSB_REQ_GET_STATUS        = 0  ,
+  TUSB_REQ_CLEAR_FEATURE     = 1  ,
+  TUSB_REQ_RESERVED          = 2  ,
+  TUSB_REQ_SET_FEATURE       = 3  ,
+  TUSB_REQ_RESERVED2         = 4  ,
+  TUSB_REQ_SET_ADDRESS       = 5  ,
+  TUSB_REQ_GET_DESCRIPTOR    = 6  ,
+  TUSB_REQ_SET_DESCRIPTOR    = 7  ,
+  TUSB_REQ_GET_CONFIGURATION = 8  ,
+  TUSB_REQ_SET_CONFIGURATION = 9  ,
+  TUSB_REQ_GET_INTERFACE     = 10 ,
+  TUSB_REQ_SET_INTERFACE     = 11 ,
+  TUSB_REQ_SYNCH_FRAME       = 12
+}tusb_request_code_t;
+
+typedef enum
+{
+  TUSB_REQ_FEATURE_EDPT_HALT     = 0,
+  TUSB_REQ_FEATURE_REMOTE_WAKEUP = 1,
+  TUSB_REQ_FEATURE_TEST_MODE     = 2
+}tusb_request_feature_selector_t;
+
+typedef enum
+{
+  TUSB_REQ_TYPE_STANDARD = 0,
+  TUSB_REQ_TYPE_CLASS,
+  TUSB_REQ_TYPE_VENDOR,
+  TUSB_REQ_TYPE_INVALID
+} tusb_request_type_t;
+
+typedef enum
+{
+  TUSB_REQ_RCPT_DEVICE =0,
+  TUSB_REQ_RCPT_INTERFACE,
+  TUSB_REQ_RCPT_ENDPOINT,
+  TUSB_REQ_RCPT_OTHER
+} tusb_request_recipient_t;
+
+// https://www.usb.org/defined-class-codes
+typedef enum
+{
+  TUSB_CLASS_UNSPECIFIED          = 0    ,
+  TUSB_CLASS_AUDIO                = 1    ,
+  TUSB_CLASS_CDC                  = 2    ,
+  TUSB_CLASS_HID                  = 3    ,
+  TUSB_CLASS_RESERVED_4           = 4    ,
+  TUSB_CLASS_PHYSICAL             = 5    ,
+  TUSB_CLASS_IMAGE                = 6    ,
+  TUSB_CLASS_PRINTER              = 7    ,
+  TUSB_CLASS_MSC                  = 8    ,
+  TUSB_CLASS_HUB                  = 9    ,
+  TUSB_CLASS_CDC_DATA             = 10   ,
+  TUSB_CLASS_SMART_CARD           = 11   ,
+  TUSB_CLASS_RESERVED_12          = 12   ,
+  TUSB_CLASS_CONTENT_SECURITY     = 13   ,
+  TUSB_CLASS_VIDEO                = 14   ,
+  TUSB_CLASS_PERSONAL_HEALTHCARE  = 15   ,
+  TUSB_CLASS_AUDIO_VIDEO          = 16   ,
+
+  TUSB_CLASS_DIAGNOSTIC           = 0xDC ,
+  TUSB_CLASS_WIRELESS_CONTROLLER  = 0xE0 ,
+  TUSB_CLASS_MISC                 = 0xEF ,
+  TUSB_CLASS_APPLICATION_SPECIFIC = 0xFE ,
+  TUSB_CLASS_VENDOR_SPECIFIC      = 0xFF
+}tusb_class_code_t;
+
+typedef enum
+{
+  MISC_SUBCLASS_COMMON = 2
+}misc_subclass_type_t;
+
+typedef enum
+{
+  MISC_PROTOCOL_IAD = 1
+}misc_protocol_type_t;
+
+typedef enum
+{
+  APP_SUBCLASS_USBTMC = 0x03,
+  APP_SUBCLASS_DFU_RUNTIME = 0x01
+} app_subclass_type_t;
+
+typedef enum
+{
+  DEVICE_CAPABILITY_WIRELESS_USB               = 0x01,
+  DEVICE_CAPABILITY_USB20_EXTENSION            = 0x02,
+  DEVICE_CAPABILITY_SUPERSPEED_USB             = 0x03,
+  DEVICE_CAPABILITY_CONTAINER_id               = 0x04,
+  DEVICE_CAPABILITY_PLATFORM                   = 0x05,
+  DEVICE_CAPABILITY_POWER_DELIVERY             = 0x06,
+  DEVICE_CAPABILITY_BATTERY_INFO               = 0x07,
+  DEVICE_CAPABILITY_PD_CONSUMER_PORT           = 0x08,
+  DEVICE_CAPABILITY_PD_PROVIDER_PORT           = 0x09,
+  DEVICE_CAPABILITY_SUPERSPEED_PLUS            = 0x0A,
+  DEVICE_CAPABILITY_PRECESION_TIME_MEASUREMENT = 0x0B,
+  DEVICE_CAPABILITY_WIRELESS_USB_EXT           = 0x0C,
+  DEVICE_CAPABILITY_BILLBOARD                  = 0x0D,
+  DEVICE_CAPABILITY_AUTHENTICATION             = 0x0E,
+  DEVICE_CAPABILITY_BILLBOARD_EX               = 0x0F,
+  DEVICE_CAPABILITY_CONFIGURATION_SUMMARY      = 0x10
+}device_capability_type_t;
+
+enum {
+  TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = TU_BIT(5),
+  TUSB_DESC_CONFIG_ATT_SELF_POWERED  = TU_BIT(6),
+};
+
+#define TUSB_DESC_CONFIG_POWER_MA(x)  ((x)/2)
+
+typedef enum
+{
+  XFER_RESULT_SUCCESS,
+  XFER_RESULT_FAILED,
+  XFER_RESULT_STALLED,
+  XFER_RESULT_TIMEOUT,
+  XFER_RESULT_INVALID
+}xfer_result_t;
+
+enum // TODO remove
+{
+  DESC_OFFSET_LEN  = 0,
+  DESC_OFFSET_TYPE = 1
+};
+
+enum
+{
+  INTERFACE_INVALID_NUMBER = 0xff
+};
+
+
+typedef enum
+{
+  MS_OS_20_SET_HEADER_DESCRIPTOR       = 0x00,
+  MS_OS_20_SUBSET_HEADER_CONFIGURATION = 0x01,
+  MS_OS_20_SUBSET_HEADER_FUNCTION      = 0x02,
+  MS_OS_20_FEATURE_COMPATBLE_ID        = 0x03,
+  MS_OS_20_FEATURE_REG_PROPERTY        = 0x04,
+  MS_OS_20_FEATURE_MIN_RESUME_TIME     = 0x05,
+  MS_OS_20_FEATURE_MODEL_ID            = 0x06,
+  MS_OS_20_FEATURE_CCGP_DEVICE         = 0x07,
+  MS_OS_20_FEATURE_VENDOR_REVISION     = 0x08
+} microsoft_os_20_type_t;
+
+enum
+{
+  CONTROL_STAGE_IDLE,
+  CONTROL_STAGE_SETUP,
+  CONTROL_STAGE_DATA,
+  CONTROL_STAGE_ACK
+};
+
+//--------------------------------------------------------------------+
+// USB Descriptors
+//--------------------------------------------------------------------+
+
+// Start of all packed definitions for compiler without per-type packed
+TU_ATTR_PACKED_BEGIN
+TU_ATTR_BIT_FIELD_ORDER_BEGIN
+
+/// USB Device Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t  bDescriptorType    ; ///< DEVICE Descriptor Type.
+  uint16_t bcdUSB             ; ///< BUSB Specification Release Number in Binary-Coded Decimal (i.e., 2.10 is 210H). This field identifies the release of the USB Specification with which the device and its descriptors are compliant.
+
+  uint8_t  bDeviceClass       ; ///< Class code (assigned by the USB-IF). \li If this field is reset to zero, each interface within a configuration specifies its own class information and the various interfaces operate independently. \li If this field is set to a value between 1 and FEH, the device supports different class specifications on different interfaces and the interfaces may not operate independently. This value identifies the class definition used for the aggregate interfaces. \li If this field is set to FFH, the device class is vendor-specific.
+  uint8_t  bDeviceSubClass    ; ///< Subclass code (assigned by the USB-IF). These codes are qualified by the value of the bDeviceClass field. \li If the bDeviceClass field is reset to zero, this field must also be reset to zero. \li If the bDeviceClass field is not set to FFH, all values are reserved for assignment by the USB-IF.
+  uint8_t  bDeviceProtocol    ; ///< Protocol code (assigned by the USB-IF). These codes are qualified by the value of the bDeviceClass and the bDeviceSubClass fields. If a device supports class-specific protocols on a device basis as opposed to an interface basis, this code identifies the protocols that the device uses as defined by the specification of the device class. \li If this field is reset to zero, the device does not use class-specific protocols on a device basis. However, it may use classspecific protocols on an interface basis. \li If this field is set to FFH, the device uses a vendor-specific protocol on a device basis.
+  uint8_t  bMaxPacketSize0    ; ///< Maximum packet size for endpoint zero (only 8, 16, 32, or 64 are valid). For HS devices is fixed to 64.
+
+  uint16_t idVendor           ; ///< Vendor ID (assigned by the USB-IF).
+  uint16_t idProduct          ; ///< Product ID (assigned by the manufacturer).
+  uint16_t bcdDevice          ; ///< Device release number in binary-coded decimal.
+  uint8_t  iManufacturer      ; ///< Index of string descriptor describing manufacturer.
+  uint8_t  iProduct           ; ///< Index of string descriptor describing product.
+  uint8_t  iSerialNumber      ; ///< Index of string descriptor describing the device's serial number.
+
+  uint8_t  bNumConfigurations ; ///< Number of possible configurations.
+} tusb_desc_device_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_device_t) == 18, "size is not correct");
+
+// USB Binary Device Object Store (BOS) Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  bLength         ; ///< Size of this descriptor in bytes
+  uint8_t  bDescriptorType ; ///< CONFIGURATION Descriptor Type
+  uint16_t wTotalLength    ; ///< Total length of data returned for this descriptor
+  uint8_t  bNumDeviceCaps  ; ///< Number of device capability descriptors in the BOS
+} tusb_desc_bos_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_bos_t) == 5, "size is not correct");
+
+/// USB Configuration Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  bLength             ; ///< Size of this descriptor in bytes
+  uint8_t  bDescriptorType     ; ///< CONFIGURATION Descriptor Type
+  uint16_t wTotalLength        ; ///< Total length of data returned for this configuration. Includes the combined length of all descriptors (configuration, interface, endpoint, and class- or vendor-specific) returned for this configuration.
+
+  uint8_t  bNumInterfaces      ; ///< Number of interfaces supported by this configuration
+  uint8_t  bConfigurationValue ; ///< Value to use as an argument to the SetConfiguration() request to select this configuration.
+  uint8_t  iConfiguration      ; ///< Index of string descriptor describing this configuration
+  uint8_t  bmAttributes        ; ///< Configuration characteristics \n D7: Reserved (set to one)\n D6: Self-powered \n D5: Remote Wakeup \n D4...0: Reserved (reset to zero) \n D7 is reserved and must be set to one for historical reasons. \n A device configuration that uses power from the bus and a local source reports a non-zero value in bMaxPower to indicate the amount of bus power required and sets D6. The actual power source at runtime may be determined using the GetStatus(DEVICE) request (see USB 2.0 spec Section 9.4.5). \n If a device configuration supports remote wakeup, D5 is set to one.
+  uint8_t  bMaxPower           ; ///< Maximum power consumption of the USB device from the bus in this specific configuration when the device is fully operational. Expressed in 2 mA units (i.e., 50 = 100 mA).
+} tusb_desc_configuration_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_configuration_t) == 9, "size is not correct");
+
+/// USB Interface Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  bLength            ; ///< Size of this descriptor in bytes
+  uint8_t  bDescriptorType    ; ///< INTERFACE Descriptor Type
+
+  uint8_t  bInterfaceNumber   ; ///< Number of this interface. Zero-based value identifying the index in the array of concurrent interfaces supported by this configuration.
+  uint8_t  bAlternateSetting  ; ///< Value used to select this alternate setting for the interface identified in the prior field
+  uint8_t  bNumEndpoints      ; ///< Number of endpoints used by this interface (excluding endpoint zero). If this value is zero, this interface only uses the Default Control Pipe.
+  uint8_t  bInterfaceClass    ; ///< Class code (assigned by the USB-IF). \li A value of zero is reserved for future standardization. \li If this field is set to FFH, the interface class is vendor-specific. \li All other values are reserved for assignment by the USB-IF.
+  uint8_t  bInterfaceSubClass ; ///< Subclass code (assigned by the USB-IF). \n These codes are qualified by the value of the bInterfaceClass field. \li If the bInterfaceClass field is reset to zero, this field must also be reset to zero. \li If the bInterfaceClass field is not set to FFH, all values are reserved for assignment by the USB-IF.
+  uint8_t  bInterfaceProtocol ; ///< Protocol code (assigned by the USB). \n These codes are qualified by the value of the bInterfaceClass and the bInterfaceSubClass fields. If an interface supports class-specific requests, this code identifies the protocols that the device uses as defined by the specification of the device class. \li If this field is reset to zero, the device does not use a class-specific protocol on this interface. \li If this field is set to FFH, the device uses a vendor-specific protocol for this interface.
+  uint8_t  iInterface         ; ///< Index of string descriptor describing this interface
+} tusb_desc_interface_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_interface_t) == 9, "size is not correct");
+
+/// USB Endpoint Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  bLength          ; // Size of this descriptor in bytes
+  uint8_t  bDescriptorType  ; // ENDPOINT Descriptor Type
+
+  uint8_t  bEndpointAddress ; // The address of the endpoint
+
+  struct TU_ATTR_PACKED {
+    uint8_t xfer  : 2;        // Control, ISO, Bulk, Interrupt
+    uint8_t sync  : 2;        // None, Asynchronous, Adaptive, Synchronous
+    uint8_t usage : 2;        // Data, Feedback, Implicit feedback
+    uint8_t       : 2;
+  } bmAttributes;
+
+  uint16_t wMaxPacketSize   ; // Bit 10..0 : max packet size, bit 12..11 additional transaction per highspeed micro-frame
+  uint8_t  bInterval        ; // Polling interval, in frames or microframes depending on the operating speed
+} tusb_desc_endpoint_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_endpoint_t) == 7, "size is not correct");
+
+/// USB Other Speed Configuration Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  bLength             ; ///< Size of descriptor
+  uint8_t  bDescriptorType     ; ///< Other_speed_Configuration Type
+  uint16_t wTotalLength        ; ///< Total length of data returned
+
+  uint8_t  bNumInterfaces      ; ///< Number of interfaces supported by this speed configuration
+  uint8_t  bConfigurationValue ; ///< Value to use to select configuration
+  uint8_t  iConfiguration      ; ///< Index of string descriptor
+  uint8_t  bmAttributes        ; ///< Same as Configuration descriptor
+  uint8_t  bMaxPower           ; ///< Same as Configuration descriptor
+} tusb_desc_other_speed_t;
+
+/// USB Device Qualifier Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  bLength            ; ///< Size of descriptor
+  uint8_t  bDescriptorType    ; ///< Device Qualifier Type
+  uint16_t bcdUSB             ; ///< USB specification version number (e.g., 0200H for V2.00)
+
+  uint8_t  bDeviceClass       ; ///< Class Code
+  uint8_t  bDeviceSubClass    ; ///< SubClass Code
+  uint8_t  bDeviceProtocol    ; ///< Protocol Code
+
+  uint8_t  bMaxPacketSize0    ; ///< Maximum packet size for other speed
+  uint8_t  bNumConfigurations ; ///< Number of Other-speed Configurations
+  uint8_t  bReserved          ; ///< Reserved for future use, must be zero
+} tusb_desc_device_qualifier_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_device_qualifier_t) == 10, "size is not correct");
+
+/// USB Interface Association Descriptor (IAD ECN)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength           ; ///< Size of descriptor
+  uint8_t bDescriptorType   ; ///< Other_speed_Configuration Type
+
+  uint8_t bFirstInterface   ; ///< Index of the first associated interface.
+  uint8_t bInterfaceCount   ; ///< Total number of associated interfaces.
+
+  uint8_t bFunctionClass    ; ///< Interface class ID.
+  uint8_t bFunctionSubClass ; ///< Interface subclass ID.
+  uint8_t bFunctionProtocol ; ///< Interface protocol ID.
+
+  uint8_t iFunction         ; ///< Index of the string descriptor describing the interface association.
+} tusb_desc_interface_assoc_t;
+
+// USB String Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  bLength         ; ///< Size of this descriptor in bytes
+  uint8_t  bDescriptorType ; ///< Descriptor Type
+  uint16_t unicode_string[];
+} tusb_desc_string_t;
+
+// USB Binary Device Object Store (BOS)
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength;
+  uint8_t bDescriptorType ;
+  uint8_t bDevCapabilityType;
+  uint8_t bReserved;
+  uint8_t PlatformCapabilityUUID[16];
+  uint8_t CapabilityData[];
+} tusb_desc_bos_platform_t;
+
+// USB WebuSB URL Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength;
+  uint8_t bDescriptorType;
+  uint8_t bScheme;
+  char    url[];
+} tusb_desc_webusb_url_t;
+
+// DFU Functional Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+
+  union {
+    struct TU_ATTR_PACKED {
+      uint8_t bitCanDnload             : 1;
+      uint8_t bitCanUpload             : 1;
+      uint8_t bitManifestationTolerant : 1;
+      uint8_t bitWillDetach            : 1;
+      uint8_t reserved                 : 4;
+    } bmAttributes;
+
+    uint8_t bAttributes;
+  };
+
+  uint16_t wDetachTimeOut;
+  uint16_t wTransferSize;
+  uint16_t bcdDFUVersion;
+} tusb_desc_dfu_functional_t;
+
+/*------------------------------------------------------------------*/
+/* Types
+ *------------------------------------------------------------------*/
+typedef struct TU_ATTR_PACKED{
+  union {
+    struct TU_ATTR_PACKED {
+      uint8_t recipient :  5; ///< Recipient type tusb_request_recipient_t.
+      uint8_t type      :  2; ///< Request type tusb_request_type_t.
+      uint8_t direction :  1; ///< Direction type. tusb_dir_t
+    } bmRequestType_bit;
+
+    uint8_t bmRequestType;
+  };
+
+  uint8_t  bRequest;
+  uint16_t wValue;
+  uint16_t wIndex;
+  uint16_t wLength;
+} tusb_control_request_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct");
+
+
+TU_ATTR_PACKED_END  // End of all packed definitions
+TU_ATTR_BIT_FIELD_ORDER_END
+
+//--------------------------------------------------------------------+
+// Endpoint helper
+//--------------------------------------------------------------------+
+
+// Get direction from Endpoint address
+static inline tusb_dir_t tu_edpt_dir(uint8_t addr)
+{
+  return (addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
+}
+
+// Get Endpoint number from address
+static inline uint8_t tu_edpt_number(uint8_t addr)
+{
+  return (uint8_t)(addr & (~TUSB_DIR_IN_MASK));
+}
+
+static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir)
+{
+  return (uint8_t)(num | (dir ? TUSB_DIR_IN_MASK : 0));
+}
+
+static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep)
+{
+  return tu_le16toh(desc_ep->wMaxPacketSize) & TU_GENMASK(10, 0);
+}
+
+//--------------------------------------------------------------------+
+// Descriptor helper
+//--------------------------------------------------------------------+
+static inline uint8_t const * tu_desc_next(void const* desc)
+{
+  uint8_t const* desc8 = (uint8_t const*) desc;
+  return desc8 + desc8[DESC_OFFSET_LEN];
+}
+
+static inline uint8_t tu_desc_type(void const* desc)
+{
+  return ((uint8_t const*) desc)[DESC_OFFSET_TYPE];
+}
+
+static inline uint8_t tu_desc_len(void const* desc)
+{
+  return ((uint8_t const*) desc)[DESC_OFFSET_LEN];
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_TYPES_H_ */
+
+/** @} */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_verify.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_verify.h
new file mode 100644
index 00000000000..f4a08ce2f91
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_verify.h
@@ -0,0 +1,153 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_VERIFY_H_
+#define TUSB_VERIFY_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "tusb_option.h"
+#include "tusb_compiler.h"
+
+/*------------------------------------------------------------------*/
+/* This file use an advanced macro technique to mimic the default parameter
+ * as C++ for the sake of code simplicity. Beware of a headache macro
+ * manipulation that you are told to stay away.
+ *
+ * This contains macros for both VERIFY and ASSERT:
+ *
+ *   VERIFY: Used when there is an error condition which is not the
+ *           fault of the MCU. For example, bounds checking on data
+ *           sent to the micro over USB should use this function.
+ *           Another example is checking for buffer overflows, where
+ *           returning from the active function causes a NAK.
+ *
+ *   ASSERT: Used for error conditions that are caused by MCU firmware
+ *           bugs. This is used to discover bugs in the code more
+ *           quickly. One example would be adding assertions in library
+ *           function calls to confirm a function's (untainted)
+ *           parameters are valid.
+ *
+ * The difference in behavior is that ASSERT triggers a breakpoint while
+ * verify does not.
+ *
+ *   #define TU_VERIFY(cond)                  if(cond) return false;
+ *   #define TU_VERIFY(cond,ret)              if(cond) return ret;
+ *
+ *   #define TU_VERIFY_HDLR(cond,handler)     if(cond) {handler; return false;}
+ *   #define TU_VERIFY_HDLR(cond,ret,handler) if(cond) {handler; return ret;}
+ *
+ *   #define TU_ASSERT(cond)                  if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return false;}
+ *   #define TU_ASSERT(cond,ret)              if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return ret;}
+ *
+ *------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TU_VERIFY Helper
+//--------------------------------------------------------------------+
+
+#if CFG_TUSB_DEBUG
+  #include <stdio.h>
+  #define _MESS_FAILED()    tu_printf("%s %d: ASSERT FAILED\r\n", __func__, __LINE__)
+#else
+  #define _MESS_FAILED() do {} while (0)
+#endif
+
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__)
+  #define TU_BREAKPOINT() do                                                                                \
+  {                                                                                                         \
+    volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+    if ( (*ARM_CM_DHCSR) & 1UL ) __asm("BKPT #0\n"); /* Only halt mcu if debugger is attached */            \
+  } while(0)
+
+#elif defined(__riscv)
+  #define TU_BREAKPOINT() do { __asm("ebreak\n"); } while(0)
+
+#else
+  #define TU_BREAKPOINT() do {} while (0)
+#endif
+
+/*------------------------------------------------------------------*/
+/* Macro Generator
+ *------------------------------------------------------------------*/
+
+// Helper to implement optional parameter for TU_VERIFY Macro family
+#define GET_3RD_ARG(arg1, arg2, arg3, ...)        arg3
+#define GET_4TH_ARG(arg1, arg2, arg3, arg4, ...)  arg4
+
+/*------------- Generator for TU_VERIFY and TU_VERIFY_HDLR -------------*/
+#define TU_VERIFY_DEFINE(_cond, _handler, _ret)  do            \
+{                                                              \
+  if ( !(_cond) ) { _handler; return _ret;  }                  \
+} while(0)
+
+/*------------------------------------------------------------------*/
+/* TU_VERIFY
+ * - TU_VERIFY_1ARGS : return false if failed
+ * - TU_VERIFY_2ARGS : return provided value if failed
+ *------------------------------------------------------------------*/
+#define TU_VERIFY_1ARGS(_cond)                         TU_VERIFY_DEFINE(_cond, , false)
+#define TU_VERIFY_2ARGS(_cond, _ret)                   TU_VERIFY_DEFINE(_cond, , _ret)
+
+#define TU_VERIFY(...)                   GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_2ARGS, TU_VERIFY_1ARGS, UNUSED)(__VA_ARGS__)
+
+
+/*------------------------------------------------------------------*/
+/* TU_VERIFY WITH HANDLER
+ * - TU_VERIFY_HDLR_2ARGS : execute handler, return false if failed
+ * - TU_VERIFY_HDLR_3ARGS : execute handler, return provided error if failed
+ *------------------------------------------------------------------*/
+#define TU_VERIFY_HDLR_2ARGS(_cond, _handler)           TU_VERIFY_DEFINE(_cond, _handler, false)
+#define TU_VERIFY_HDLR_3ARGS(_cond, _handler, _ret)     TU_VERIFY_DEFINE(_cond, _handler, _ret)
+
+#define TU_VERIFY_HDLR(...)              GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_HDLR_3ARGS, TU_VERIFY_HDLR_2ARGS,UNUSED)(__VA_ARGS__)
+
+/*------------------------------------------------------------------*/
+/* ASSERT
+ * basically TU_VERIFY with TU_BREAKPOINT() as handler
+ * - 1 arg : return false if failed
+ * - 2 arg : return error if failed
+ *------------------------------------------------------------------*/
+#define ASSERT_1ARGS(_cond)            TU_VERIFY_DEFINE(_cond, _MESS_FAILED(); TU_BREAKPOINT(), false)
+#define ASSERT_2ARGS(_cond, _ret)      TU_VERIFY_DEFINE(_cond, _MESS_FAILED(); TU_BREAKPOINT(), _ret)
+
+#ifndef TU_ASSERT
+#define TU_ASSERT(...)             GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS,UNUSED)(__VA_ARGS__)
+#endif
+
+/*------------------------------------------------------------------*/
+/* ASSERT HDLR
+ *------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_VERIFY_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/device/dcd.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/device/dcd.h
new file mode 100644
index 00000000000..8efbc90ef6b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/device/dcd.h
@@ -0,0 +1,192 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_DCD_H_
+#define _TUSB_DCD_H_
+
+#include "common/tusb_common.h"
+#include "osal/osal.h"
+#include "common/tusb_fifo.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+
+#ifndef CFG_TUD_ENDPPOINT_MAX
+  #define CFG_TUD_ENDPPOINT_MAX   TUP_DCD_ENDPOINT_MAX
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF PROTYPES
+//--------------------------------------------------------------------+
+
+typedef enum
+{
+  DCD_EVENT_INVALID = 0,
+  DCD_EVENT_BUS_RESET,
+  DCD_EVENT_UNPLUGGED,
+  DCD_EVENT_SOF,
+  DCD_EVENT_SUSPEND, // TODO LPM Sleep L1 support
+  DCD_EVENT_RESUME,
+
+  DCD_EVENT_SETUP_RECEIVED,
+  DCD_EVENT_XFER_COMPLETE,
+
+  // Not an DCD event, just a convenient way to defer ISR function
+  USBD_EVENT_FUNC_CALL,
+
+  DCD_EVENT_COUNT
+} dcd_eventid_t;
+
+typedef struct TU_ATTR_ALIGNED(4)
+{
+  uint8_t rhport;
+  uint8_t event_id;
+
+  union
+  {
+    // BUS RESET
+    struct {
+      tusb_speed_t speed;
+    } bus_reset;
+
+    // SETUP_RECEIVED
+    tusb_control_request_t setup_received;
+
+    // XFER_COMPLETE
+    struct {
+      uint8_t  ep_addr;
+      uint8_t  result;
+      uint32_t len;
+    }xfer_complete;
+
+    // FUNC_CALL
+    struct {
+      void (*func) (void*);
+      void* param;
+    }func_call;
+  };
+} dcd_event_t;
+
+//TU_VERIFY_STATIC(sizeof(dcd_event_t) <= 12, "size is not correct");
+
+//--------------------------------------------------------------------+
+// Controller API
+//--------------------------------------------------------------------+
+
+// Initialize controller to device mode
+void dcd_init       (uint8_t rhport);
+
+// Interrupt Handler
+#if __GNUC__ && !defined(__ARMCC_VERSION)
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wredundant-decls"
+#endif
+void dcd_int_handler(uint8_t rhport);
+#if __GNUC__ && !defined(__ARMCC_VERSION)
+#pragma GCC diagnostic pop
+#endif
+
+// Enable device interrupt
+void dcd_int_enable (uint8_t rhport);
+
+// Disable device interrupt
+void dcd_int_disable(uint8_t rhport);
+
+// Receive Set Address request, mcu port must also include status IN response
+void dcd_set_address(uint8_t rhport, uint8_t dev_addr);
+
+// Wake up host
+void dcd_remote_wakeup(uint8_t rhport);
+
+// Connect by enabling internal pull-up resistor on D+/D-
+void dcd_connect(uint8_t rhport) TU_ATTR_WEAK;
+
+// Disconnect by disabling internal pull-up resistor on D+/D-
+void dcd_disconnect(uint8_t rhport) TU_ATTR_WEAK;
+
+//--------------------------------------------------------------------+
+// Endpoint API
+//--------------------------------------------------------------------+
+
+// Invoked when a control transfer's status stage is complete.
+// May help DCD to prepare for next control transfer, this API is optional.
+void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request) TU_ATTR_WEAK;
+
+// Configure endpoint's registers according to descriptor
+bool dcd_edpt_open            (uint8_t rhport, tusb_desc_endpoint_t const * desc_ep);
+
+// Close all non-control endpoints, cancel all pending transfers if any.
+// Invoked when switching from a non-zero Configuration by SET_CONFIGURE therefore
+// required for multiple configuration support.
+void dcd_edpt_close_all       (uint8_t rhport);
+
+// Close an endpoint.
+// Since it is weak, caller must TU_ASSERT this function's existence before calling it.
+void dcd_edpt_close           (uint8_t rhport, uint8_t ep_addr) TU_ATTR_WEAK;
+
+// Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
+bool dcd_edpt_xfer            (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes);
+
+// Submit an transfer using fifo, When complete dcd_event_xfer_complete() is invoked to notify the stack
+// This API is optional, may be useful for register-based for transferring data.
+bool dcd_edpt_xfer_fifo       (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) TU_ATTR_WEAK;
+
+// Stall endpoint, any queuing transfer should be removed from endpoint
+void dcd_edpt_stall           (uint8_t rhport, uint8_t ep_addr);
+
+// clear stall, data toggle is also reset to DATA0
+// This API never calls with control endpoints, since it is auto cleared when receiving setup packet
+void dcd_edpt_clear_stall     (uint8_t rhport, uint8_t ep_addr);
+
+//--------------------------------------------------------------------+
+// Event API (implemented by stack)
+//--------------------------------------------------------------------+
+
+// Called by DCD to notify device stack
+extern void dcd_event_handler(dcd_event_t const * event, bool in_isr);
+
+// helper to send bus signal event
+extern void dcd_event_bus_signal (uint8_t rhport, dcd_eventid_t eid, bool in_isr);
+
+// helper to send bus reset event
+extern void dcd_event_bus_reset (uint8_t rhport, tusb_speed_t speed, bool in_isr);
+
+// helper to send setup received
+extern void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr);
+
+// helper to send transfer complete event
+extern void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_DCD_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/device/usbd.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/device/usbd.h
new file mode 100644
index 00000000000..b2bf8ba9d78
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/device/usbd.h
@@ -0,0 +1,853 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_USBD_H_
+#define _TUSB_USBD_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// Init device stack
+bool tud_init (uint8_t rhport);
+
+// Check if device stack is already initialized
+bool tud_inited(void);
+
+// Task function should be called in main/rtos loop
+void tud_task (void);
+
+// Check if there is pending events need proccessing by tud_task()
+bool tud_task_event_ready(void);
+
+// Interrupt handler, name alias to DCD
+extern void dcd_int_handler(uint8_t rhport);
+#define tud_int_handler   dcd_int_handler
+
+// Get current bus speed
+tusb_speed_t tud_speed_get(void);
+
+// Check if device is connected (may not mounted/configured yet)
+// True if just got out of Bus Reset and received the very first data from host
+bool tud_connected(void);
+
+// Check if device is connected and configured
+bool tud_mounted(void);
+
+// Check if device is suspended
+bool tud_suspended(void);
+
+// Check if device is ready to transfer
+TU_ATTR_ALWAYS_INLINE static inline
+bool tud_ready(void)
+{
+  return tud_mounted() && !tud_suspended();
+}
+
+// Remote wake up host, only if suspended and enabled by host
+bool tud_remote_wakeup(void);
+
+// Enable pull-up resistor on D+ D-
+// Return false on unsupported MCUs
+bool tud_disconnect(void);
+
+// Disable pull-up resistor on D+ D-
+// Return false on unsupported MCUs
+bool tud_connect(void);
+
+// Carry out Data and Status stage of control transfer
+// - If len = 0, it is equivalent to sending status only
+// - If len > wLength : it will be truncated
+bool tud_control_xfer(uint8_t rhport, tusb_control_request_t const * request, void* buffer, uint16_t len);
+
+// Send STATUS (zero length) packet
+bool tud_control_status(uint8_t rhport, tusb_control_request_t const * request);
+
+//--------------------------------------------------------------------+
+// Application Callbacks (WEAK is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when received GET DEVICE DESCRIPTOR request
+// Application return pointer to descriptor
+uint8_t const * tud_descriptor_device_cb(void);
+
+// Invoked when received GET CONFIGURATION DESCRIPTOR request
+// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
+uint8_t const * tud_descriptor_configuration_cb(uint8_t index);
+
+// Invoked when received GET STRING DESCRIPTOR request
+// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
+uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid);
+
+// Invoked when received GET BOS DESCRIPTOR request
+// Application return pointer to descriptor
+TU_ATTR_WEAK uint8_t const * tud_descriptor_bos_cb(void);
+
+// Invoked when received GET DEVICE QUALIFIER DESCRIPTOR request
+// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete.
+// device_qualifier descriptor describes information about a high-speed capable device that would
+// change if the device were operating at the other speed. If not highspeed capable stall this request.
+TU_ATTR_WEAK uint8_t const* tud_descriptor_device_qualifier_cb(void);
+
+// Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request
+// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
+// Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa
+TU_ATTR_WEAK uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index);
+
+// Invoked when device is mounted (configured)
+TU_ATTR_WEAK void tud_mount_cb(void);
+
+// Invoked when device is unmounted
+TU_ATTR_WEAK void tud_umount_cb(void);
+
+// Invoked when usb bus is suspended
+// Within 7ms, device must draw an average of current less than 2.5 mA from bus
+TU_ATTR_WEAK void tud_suspend_cb(bool remote_wakeup_en);
+
+// Invoked when usb bus is resumed
+TU_ATTR_WEAK void tud_resume_cb(void);
+
+// Invoked when received control request with VENDOR TYPE
+TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+
+//--------------------------------------------------------------------+
+// Binary Device Object Store (BOS) Descriptor Templates
+//--------------------------------------------------------------------+
+
+#define TUD_BOS_DESC_LEN      5
+
+// total length, number of device caps
+#define TUD_BOS_DESCRIPTOR(_total_len, _caps_num) \
+  5, TUSB_DESC_BOS, U16_TO_U8S_LE(_total_len), _caps_num
+
+// Device Capability Platform 128-bit UUID + Data
+#define TUD_BOS_PLATFORM_DESCRIPTOR(...) \
+  4+TU_ARGS_NUM(__VA_ARGS__), TUSB_DESC_DEVICE_CAPABILITY, DEVICE_CAPABILITY_PLATFORM, 0x00, __VA_ARGS__
+
+//------------- WebUSB BOS Platform -------------//
+
+// Descriptor Length
+#define TUD_BOS_WEBUSB_DESC_LEN         24
+
+// Vendor Code, iLandingPage
+#define TUD_BOS_WEBUSB_DESCRIPTOR(_vendor_code, _ipage) \
+  TUD_BOS_PLATFORM_DESCRIPTOR(TUD_BOS_WEBUSB_UUID, U16_TO_U8S_LE(0x0100), _vendor_code, _ipage)
+
+#define TUD_BOS_WEBUSB_UUID   \
+  0x38, 0xB6, 0x08, 0x34, 0xA9, 0x09, 0xA0, 0x47, \
+  0x8B, 0xFD, 0xA0, 0x76, 0x88, 0x15, 0xB6, 0x65
+
+//------------- Microsoft OS 2.0 Platform -------------//
+#define TUD_BOS_MICROSOFT_OS_DESC_LEN   28
+
+// Total Length of descriptor set, vendor code
+#define TUD_BOS_MS_OS_20_DESCRIPTOR(_desc_set_len, _vendor_code) \
+  TUD_BOS_PLATFORM_DESCRIPTOR(TUD_BOS_MS_OS_20_UUID, U32_TO_U8S_LE(0x06030000), U16_TO_U8S_LE(_desc_set_len), _vendor_code, 0)
+
+#define TUD_BOS_MS_OS_20_UUID \
+    0xDF, 0x60, 0xDD, 0xD8, 0x89, 0x45, 0xC7, 0x4C, \
+  0x9C, 0xD2, 0x65, 0x9D, 0x9E, 0x64, 0x8A, 0x9F
+
+//--------------------------------------------------------------------+
+// Configuration Descriptor Templates
+//--------------------------------------------------------------------+
+
+#define TUD_CONFIG_DESC_LEN   (9)
+
+// Config number, interface count, string index, total length, attribute, power in mA
+#define TUD_CONFIG_DESCRIPTOR(config_num, _itfcount, _stridx, _total_len, _attribute, _power_ma) \
+  9, TUSB_DESC_CONFIGURATION, U16_TO_U8S_LE(_total_len), _itfcount, config_num, _stridx, TU_BIT(7) | _attribute, (_power_ma)/2
+
+//--------------------------------------------------------------------+
+// CDC Descriptor Templates
+//--------------------------------------------------------------------+
+
+// Length of template descriptor: 66 bytes
+#define TUD_CDC_DESC_LEN  (8+9+5+5+4+5+7+9+7+7)
+
+// CDC Descriptor Template
+// Interface number, string index, EP notification address and size, EP data address (out, in) and size.
+#define TUD_CDC_DESCRIPTOR(_itfnum, _stridx, _ep_notif, _ep_notif_size, _epout, _epin, _epsize) \
+  /* Interface Associate */\
+  8, TUSB_DESC_INTERFACE_ASSOCIATION, _itfnum, 2, TUSB_CLASS_CDC, CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL, CDC_COMM_PROTOCOL_NONE, 0,\
+  /* CDC Control Interface */\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 1, TUSB_CLASS_CDC, CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL, CDC_COMM_PROTOCOL_NONE, _stridx,\
+  /* CDC Header */\
+  5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_HEADER, U16_TO_U8S_LE(0x0120),\
+  /* CDC Call */\
+  5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_CALL_MANAGEMENT, 0, (uint8_t)((_itfnum) + 1),\
+  /* CDC ACM: support line request */\
+  4, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT, 2,\
+  /* CDC Union */\
+  5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_UNION, _itfnum, (uint8_t)((_itfnum) + 1),\
+  /* Endpoint Notification */\
+  7, TUSB_DESC_ENDPOINT, _ep_notif, TUSB_XFER_INTERRUPT, U16_TO_U8S_LE(_ep_notif_size), 16,\
+  /* CDC Data Interface */\
+  9, TUSB_DESC_INTERFACE, (uint8_t)((_itfnum)+1), 0, 2, TUSB_CLASS_CDC_DATA, 0, 0, 0,\
+  /* Endpoint Out */\
+  7, TUSB_DESC_ENDPOINT, _epout, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0,\
+  /* Endpoint In */\
+  7, TUSB_DESC_ENDPOINT, _epin, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0
+
+//--------------------------------------------------------------------+
+// MSC Descriptor Templates
+//--------------------------------------------------------------------+
+
+// Length of template descriptor: 23 bytes
+#define TUD_MSC_DESC_LEN    (9 + 7 + 7)
+
+// Interface number, string index, EP Out & EP In address, EP size
+#define TUD_MSC_DESCRIPTOR(_itfnum, _stridx, _epout, _epin, _epsize) \
+  /* Interface */\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 2, TUSB_CLASS_MSC, MSC_SUBCLASS_SCSI, MSC_PROTOCOL_BOT, _stridx,\
+  /* Endpoint Out */\
+  7, TUSB_DESC_ENDPOINT, _epout, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0,\
+  /* Endpoint In */\
+  7, TUSB_DESC_ENDPOINT, _epin, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0
+
+
+//--------------------------------------------------------------------+
+// HID Descriptor Templates
+//--------------------------------------------------------------------+
+
+// Length of template descriptor: 25 bytes
+#define TUD_HID_DESC_LEN    (9 + 9 + 7)
+
+// HID Input only descriptor
+// Interface number, string index, protocol, report descriptor len, EP In address, size & polling interval
+#define TUD_HID_DESCRIPTOR(_itfnum, _stridx, _boot_protocol, _report_desc_len, _epin, _epsize, _ep_interval) \
+  /* Interface */\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 1, TUSB_CLASS_HID, (uint8_t)((_boot_protocol) ? (uint8_t)HID_SUBCLASS_BOOT : 0), _boot_protocol, _stridx,\
+  /* HID descriptor */\
+  9, HID_DESC_TYPE_HID, U16_TO_U8S_LE(0x0111), 0, 1, HID_DESC_TYPE_REPORT, U16_TO_U8S_LE(_report_desc_len),\
+  /* Endpoint In */\
+  7, TUSB_DESC_ENDPOINT, _epin, TUSB_XFER_INTERRUPT, U16_TO_U8S_LE(_epsize), _ep_interval
+
+// Length of template descriptor: 32 bytes
+#define TUD_HID_INOUT_DESC_LEN    (9 + 9 + 7 + 7)
+
+// HID Input & Output descriptor
+// Interface number, string index, protocol, report descriptor len, EP OUT & IN address, size & polling interval
+#define TUD_HID_INOUT_DESCRIPTOR(_itfnum, _stridx, _boot_protocol, _report_desc_len, _epout, _epin, _epsize, _ep_interval) \
+  /* Interface */\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 2, TUSB_CLASS_HID, (uint8_t)((_boot_protocol) ? (uint8_t)HID_SUBCLASS_BOOT : 0), _boot_protocol, _stridx,\
+  /* HID descriptor */\
+  9, HID_DESC_TYPE_HID, U16_TO_U8S_LE(0x0111), 0, 1, HID_DESC_TYPE_REPORT, U16_TO_U8S_LE(_report_desc_len),\
+  /* Endpoint Out */\
+  7, TUSB_DESC_ENDPOINT, _epout, TUSB_XFER_INTERRUPT, U16_TO_U8S_LE(_epsize), _ep_interval, \
+  /* Endpoint In */\
+  7, TUSB_DESC_ENDPOINT, _epin, TUSB_XFER_INTERRUPT, U16_TO_U8S_LE(_epsize), _ep_interval
+
+//--------------------------------------------------------------------+
+// MIDI Descriptor Templates
+// Note: MIDI v1.0 is based on Audio v1.0
+//--------------------------------------------------------------------+
+
+#define TUD_MIDI_DESC_HEAD_LEN (9 + 9 + 9 + 7)
+#define TUD_MIDI_DESC_HEAD(_itfnum,  _stridx, _numcables) \
+  /* Audio Control (AC) Interface */\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 0, TUSB_CLASS_AUDIO, AUDIO_SUBCLASS_CONTROL, AUDIO_FUNC_PROTOCOL_CODE_UNDEF, _stridx,\
+  /* AC Header */\
+  9, TUSB_DESC_CS_INTERFACE, AUDIO_CS_AC_INTERFACE_HEADER, U16_TO_U8S_LE(0x0100), U16_TO_U8S_LE(0x0009), 1, (uint8_t)((_itfnum) + 1),\
+  /* MIDI Streaming (MS) Interface */\
+  9, TUSB_DESC_INTERFACE, (uint8_t)((_itfnum) + 1), 0, 2, TUSB_CLASS_AUDIO, AUDIO_SUBCLASS_MIDI_STREAMING, AUDIO_FUNC_PROTOCOL_CODE_UNDEF, 0,\
+  /* MS Header */\
+  7, TUSB_DESC_CS_INTERFACE, MIDI_CS_INTERFACE_HEADER, U16_TO_U8S_LE(0x0100), U16_TO_U8S_LE(7 + (_numcables) * TUD_MIDI_DESC_JACK_LEN)
+
+#define TUD_MIDI_JACKID_IN_EMB(_cablenum) \
+  (uint8_t)(((_cablenum) - 1) * 4 + 1)
+
+#define TUD_MIDI_JACKID_IN_EXT(_cablenum) \
+  (uint8_t)(((_cablenum) - 1) * 4 + 2)
+
+#define TUD_MIDI_JACKID_OUT_EMB(_cablenum) \
+  (uint8_t)(((_cablenum) - 1) * 4 + 3)
+
+#define TUD_MIDI_JACKID_OUT_EXT(_cablenum) \
+  (uint8_t)(((_cablenum) - 1) * 4 + 4)
+
+#define TUD_MIDI_DESC_JACK_LEN (6 + 6 + 9 + 9)
+#define TUD_MIDI_DESC_JACK(_cablenum) \
+  /* MS In Jack (Embedded) */\
+  6, TUSB_DESC_CS_INTERFACE, MIDI_CS_INTERFACE_IN_JACK, MIDI_JACK_EMBEDDED, TUD_MIDI_JACKID_IN_EMB(_cablenum), 0,\
+  /* MS In Jack (External) */\
+  6, TUSB_DESC_CS_INTERFACE, MIDI_CS_INTERFACE_IN_JACK, MIDI_JACK_EXTERNAL, TUD_MIDI_JACKID_IN_EXT(_cablenum), 0,\
+  /* MS Out Jack (Embedded), connected to In Jack External */\
+  9, TUSB_DESC_CS_INTERFACE, MIDI_CS_INTERFACE_OUT_JACK, MIDI_JACK_EMBEDDED, TUD_MIDI_JACKID_OUT_EMB(_cablenum), 1, TUD_MIDI_JACKID_IN_EXT(_cablenum), 1, 0,\
+  /* MS Out Jack (External), connected to In Jack Embedded */\
+  9, TUSB_DESC_CS_INTERFACE, MIDI_CS_INTERFACE_OUT_JACK, MIDI_JACK_EXTERNAL, TUD_MIDI_JACKID_OUT_EXT(_cablenum), 1, TUD_MIDI_JACKID_IN_EMB(_cablenum), 1, 0
+
+#define TUD_MIDI_DESC_EP_LEN(_numcables) (9 + 4 + (_numcables))
+#define TUD_MIDI_DESC_EP(_epout, _epsize, _numcables) \
+  /* Endpoint: Note Audio v1.0's endpoint has 9 bytes instead of 7 */\
+  9, TUSB_DESC_ENDPOINT, _epout, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0, 0, 0, \
+  /* MS Endpoint (connected to embedded jack) */\
+  (uint8_t)(4 + (_numcables)), TUSB_DESC_CS_ENDPOINT, MIDI_CS_ENDPOINT_GENERAL, _numcables
+
+// Length of template descriptor (88 bytes)
+#define TUD_MIDI_DESC_LEN (TUD_MIDI_DESC_HEAD_LEN + TUD_MIDI_DESC_JACK_LEN + TUD_MIDI_DESC_EP_LEN(1) * 2)
+
+// MIDI simple descriptor
+// - 1 Embedded Jack In connected to 1 External Jack Out
+// - 1 Embedded Jack out connected to 1 External Jack In
+#define TUD_MIDI_DESCRIPTOR(_itfnum, _stridx, _epout, _epin, _epsize) \
+  TUD_MIDI_DESC_HEAD(_itfnum, _stridx, 1),\
+  TUD_MIDI_DESC_JACK(1),\
+  TUD_MIDI_DESC_EP(_epout, _epsize, 1),\
+  TUD_MIDI_JACKID_IN_EMB(1),\
+  TUD_MIDI_DESC_EP(_epin, _epsize, 1),\
+  TUD_MIDI_JACKID_OUT_EMB(1)
+
+//--------------------------------------------------------------------+
+// Audio v2.0 Descriptor Templates
+//--------------------------------------------------------------------+
+
+/* Standard Interface Association Descriptor (IAD) */
+#define TUD_AUDIO_DESC_IAD_LEN 8
+#define TUD_AUDIO_DESC_IAD(_firstitfs, _nitfs, _stridx) \
+  TUD_AUDIO_DESC_IAD_LEN, TUSB_DESC_INTERFACE_ASSOCIATION, _firstitfs, _nitfs, TUSB_CLASS_AUDIO, AUDIO_FUNCTION_SUBCLASS_UNDEFINED, AUDIO_FUNC_PROTOCOL_CODE_V2, _stridx
+
+/* Standard AC Interface Descriptor(4.7.1) */
+#define TUD_AUDIO_DESC_STD_AC_LEN 9
+#define TUD_AUDIO_DESC_STD_AC(_itfnum, _nEPs, _stridx) /* _nEPs is 0 or 1 */\
+  TUD_AUDIO_DESC_STD_AC_LEN, TUSB_DESC_INTERFACE, _itfnum, /* fixed to zero */ 0x00, _nEPs, TUSB_CLASS_AUDIO, AUDIO_SUBCLASS_CONTROL, AUDIO_INT_PROTOCOL_CODE_V2, _stridx
+
+/* Class-Specific AC Interface Header Descriptor(4.7.2) */
+#define TUD_AUDIO_DESC_CS_AC_LEN 9
+#define TUD_AUDIO_DESC_CS_AC(_bcdADC, _category, _totallen, _ctrl) /* _bcdADC : Audio Device Class Specification Release Number in Binary-Coded Decimal, _category : see audio_function_t, _totallen : Total number of bytes returned for the class-specific AudioControl interface i.e. Clock Source, Unit and Terminal descriptors - Do not include TUD_AUDIO_DESC_CS_AC_LEN, we already do this here*/ \
+  TUD_AUDIO_DESC_CS_AC_LEN, TUSB_DESC_CS_INTERFACE, AUDIO_CS_AC_INTERFACE_HEADER, U16_TO_U8S_LE(_bcdADC), _category, U16_TO_U8S_LE(_totallen + TUD_AUDIO_DESC_CS_AC_LEN), _ctrl
+
+/* Clock Source Descriptor(4.7.2.1) */
+#define TUD_AUDIO_DESC_CLK_SRC_LEN 8
+#define TUD_AUDIO_DESC_CLK_SRC(_clkid, _attr, _ctrl, _assocTerm, _stridx) \
+  TUD_AUDIO_DESC_CLK_SRC_LEN, TUSB_DESC_CS_INTERFACE, AUDIO_CS_AC_INTERFACE_CLOCK_SOURCE, _clkid, _attr, _ctrl, _assocTerm, _stridx
+
+/* Input Terminal Descriptor(4.7.2.4) */
+#define TUD_AUDIO_DESC_INPUT_TERM_LEN 17
+#define TUD_AUDIO_DESC_INPUT_TERM(_termid, _termtype, _assocTerm, _clkid, _nchannelslogical, _channelcfg, _idxchannelnames, _ctrl, _stridx) \
+  TUD_AUDIO_DESC_INPUT_TERM_LEN, TUSB_DESC_CS_INTERFACE, AUDIO_CS_AC_INTERFACE_INPUT_TERMINAL, _termid, U16_TO_U8S_LE(_termtype), _assocTerm, _clkid, _nchannelslogical, U32_TO_U8S_LE(_channelcfg), _idxchannelnames, U16_TO_U8S_LE(_ctrl), _stridx
+
+/* Output Terminal Descriptor(4.7.2.5) */
+#define TUD_AUDIO_DESC_OUTPUT_TERM_LEN 12
+#define TUD_AUDIO_DESC_OUTPUT_TERM(_termid, _termtype, _assocTerm, _srcid, _clkid, _ctrl, _stridx) \
+  TUD_AUDIO_DESC_OUTPUT_TERM_LEN, TUSB_DESC_CS_INTERFACE, AUDIO_CS_AC_INTERFACE_OUTPUT_TERMINAL, _termid, U16_TO_U8S_LE(_termtype), _assocTerm, _srcid, _clkid, U16_TO_U8S_LE(_ctrl), _stridx
+
+/* Feature Unit Descriptor(4.7.2.8) */
+// 1 - Channel
+#define TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL_LEN 6+(1+1)*4
+#define TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL(_unitid, _srcid, _ctrlch0master, _ctrlch1, _stridx) \
+  TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL_LEN, TUSB_DESC_CS_INTERFACE, AUDIO_CS_AC_INTERFACE_FEATURE_UNIT, _unitid, _srcid, U32_TO_U8S_LE(_ctrlch0master), U32_TO_U8S_LE(_ctrlch1), _stridx
+
+// 2 - Channels
+#define TUD_AUDIO_DESC_FEATURE_UNIT_TWO_CHANNEL_LEN (6+(2+1)*4)
+#define TUD_AUDIO_DESC_FEATURE_UNIT_TWO_CHANNEL(_unitid, _srcid, _ctrlch0master, _ctrlch1, _ctrlch2, _stridx) \
+		TUD_AUDIO_DESC_FEATURE_UNIT_TWO_CHANNEL_LEN, TUSB_DESC_CS_INTERFACE, AUDIO_CS_AC_INTERFACE_FEATURE_UNIT, _unitid, _srcid, U32_TO_U8S_LE(_ctrlch0master), U32_TO_U8S_LE(_ctrlch1), U32_TO_U8S_LE(_ctrlch2), _stridx
+// 4 - Channels
+#define TUD_AUDIO_DESC_FEATURE_UNIT_FOUR_CHANNEL_LEN (6+(4+1)*4)
+#define TUD_AUDIO_DESC_FEATURE_UNIT_FOUR_CHANNEL(_unitid, _srcid, _ctrlch0master, _ctrlch1, _ctrlch2, _ctrlch3, _ctrlch4, _stridx) \
+                    TUD_AUDIO_DESC_FEATURE_UNIT_FOUR_CHANNEL_LEN, TUSB_DESC_CS_INTERFACE, AUDIO_CS_AC_INTERFACE_FEATURE_UNIT, _unitid, _srcid, U32_TO_U8S_LE(_ctrlch0master), U32_TO_U8S_LE(_ctrlch1), U32_TO_U8S_LE(_ctrlch2), U32_TO_U8S_LE(_ctrlch3), U32_TO_U8S_LE(_ctrlch4), _stridx
+
+// For more channels, add definitions here
+
+/* Standard AS Interface Descriptor(4.9.1) */
+#define TUD_AUDIO_DESC_STD_AS_INT_LEN 9
+#define TUD_AUDIO_DESC_STD_AS_INT(_itfnum, _altset, _nEPs, _stridx) \
+  TUD_AUDIO_DESC_STD_AS_INT_LEN, TUSB_DESC_INTERFACE, _itfnum, _altset, _nEPs, TUSB_CLASS_AUDIO, AUDIO_SUBCLASS_STREAMING, AUDIO_INT_PROTOCOL_CODE_V2, _stridx
+
+/* Class-Specific AS Interface Descriptor(4.9.2) */
+#define TUD_AUDIO_DESC_CS_AS_INT_LEN 16
+#define TUD_AUDIO_DESC_CS_AS_INT(_termid, _ctrl, _formattype, _formats, _nchannelsphysical, _channelcfg, _stridx) \
+  TUD_AUDIO_DESC_CS_AS_INT_LEN, TUSB_DESC_CS_INTERFACE, AUDIO_CS_AS_INTERFACE_AS_GENERAL, _termid, _ctrl, _formattype, U32_TO_U8S_LE(_formats), _nchannelsphysical, U32_TO_U8S_LE(_channelcfg), _stridx
+
+/* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */
+#define TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN 6
+#define TUD_AUDIO_DESC_TYPE_I_FORMAT(_subslotsize, _bitresolution) /* _subslotsize is number of bytes per sample (i.e. subslot) and can be 1,2,3, or 4 */\
+  TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN, TUSB_DESC_CS_INTERFACE, AUDIO_CS_AS_INTERFACE_FORMAT_TYPE, AUDIO_FORMAT_TYPE_I, _subslotsize, _bitresolution
+
+/* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */
+#define TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN 7
+#define TUD_AUDIO_DESC_STD_AS_ISO_EP(_ep, _attr, _maxEPsize, _interval) \
+  TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN, TUSB_DESC_ENDPOINT, _ep, _attr, U16_TO_U8S_LE(_maxEPsize), _interval
+
+/* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */
+#define TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN 8
+#define TUD_AUDIO_DESC_CS_AS_ISO_EP(_attr, _ctrl, _lockdelayunit, _lockdelay) \
+  TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN, TUSB_DESC_CS_ENDPOINT, AUDIO_CS_EP_SUBTYPE_GENERAL, _attr, _ctrl, _lockdelayunit, U16_TO_U8S_LE(_lockdelay)
+
+/* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */
+#define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN 7
+#define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(_ep, _interval) \
+  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_NO_SYNC | TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval
+
+// AUDIO simple descriptor (UAC2) for 1 microphone input
+// - 1 Input Terminal, 1 Feature Unit (Mute and Volume Control), 1 Output Terminal, 1 Clock Source
+
+#define TUD_AUDIO_MIC_ONE_CH_DESC_LEN (TUD_AUDIO_DESC_IAD_LEN\
+  + TUD_AUDIO_DESC_STD_AC_LEN\
+  + TUD_AUDIO_DESC_CS_AC_LEN\
+  + TUD_AUDIO_DESC_CLK_SRC_LEN\
+  + TUD_AUDIO_DESC_INPUT_TERM_LEN\
+  + TUD_AUDIO_DESC_OUTPUT_TERM_LEN\
+  + TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL_LEN\
+  + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+  + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+  + TUD_AUDIO_DESC_CS_AS_INT_LEN\
+  + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\
+  + TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN\
+  + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN)
+
+#define TUD_AUDIO_MIC_ONE_CH_DESC_N_AS_INT 1 	// Number of AS interfaces
+
+#define TUD_AUDIO_MIC_ONE_CH_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epin, _epsize) \
+  /* Standard Interface Association Descriptor (IAD) */\
+  TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
+  /* Standard AC Interface Descriptor(4.7.1) */\
+  TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\
+  /* Class-Specific AC Interface Header Descriptor(4.7.2) */\
+  TUD_AUDIO_DESC_CS_AC(/*_bcdADC*/ 0x0200, /*_category*/ AUDIO_FUNC_MICROPHONE, /*_totallen*/ TUD_AUDIO_DESC_CLK_SRC_LEN+TUD_AUDIO_DESC_INPUT_TERM_LEN+TUD_AUDIO_DESC_OUTPUT_TERM_LEN+TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL_LEN, /*_ctrl*/ AUDIO_CS_AS_INTERFACE_CTRL_LATENCY_POS),\
+  /* Clock Source Descriptor(4.7.2.1) */\
+  TUD_AUDIO_DESC_CLK_SRC(/*_clkid*/ 0x04, /*_attr*/ AUDIO_CLOCK_SOURCE_ATT_INT_FIX_CLK, /*_ctrl*/ (AUDIO_CTRL_R << AUDIO_CLOCK_SOURCE_CTRL_CLK_FRQ_POS), /*_assocTerm*/ 0x01,  /*_stridx*/ 0x00),\
+  /* Input Terminal Descriptor(4.7.2.4) */\
+  TUD_AUDIO_DESC_INPUT_TERM(/*_termid*/ 0x01, /*_termtype*/ AUDIO_TERM_TYPE_IN_GENERIC_MIC, /*_assocTerm*/ 0x03, /*_clkid*/ 0x04, /*_nchannelslogical*/ 0x01, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_idxchannelnames*/ 0x00, /*_ctrl*/ AUDIO_CTRL_R << AUDIO_IN_TERM_CTRL_CONNECTOR_POS, /*_stridx*/ 0x00),\
+  /* Output Terminal Descriptor(4.7.2.5) */\
+  TUD_AUDIO_DESC_OUTPUT_TERM(/*_termid*/ 0x03, /*_termtype*/ AUDIO_TERM_TYPE_USB_STREAMING, /*_assocTerm*/ 0x01, /*_srcid*/ 0x02, /*_clkid*/ 0x04, /*_ctrl*/ 0x0000, /*_stridx*/ 0x00),\
+  /* Feature Unit Descriptor(4.7.2.8) */\
+  TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL(/*_unitid*/ 0x02, /*_srcid*/ 0x01, /*_ctrlch0master*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_ctrlch1*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_stridx*/ 0x00),\
+  /* Standard AS Interface Descriptor(4.9.1) */\
+  /* Interface 1, Alternate 0 - default alternate setting with 0 bandwidth */\
+  TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum)+1), /*_altset*/ 0x00, /*_nEPs*/ 0x00, /*_stridx*/ 0x00),\
+  /* Standard AS Interface Descriptor(4.9.1) */\
+  /* Interface 1, Alternate 1 - alternate interface for data streaming */\
+  TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum)+1), /*_altset*/ 0x01, /*_nEPs*/ 0x01, /*_stridx*/ 0x00),\
+  /* Class-Specific AS Interface Descriptor(4.9.2) */\
+  TUD_AUDIO_DESC_CS_AS_INT(/*_termid*/ 0x03, /*_ctrl*/ AUDIO_CTRL_NONE, /*_formattype*/ AUDIO_FORMAT_TYPE_I, /*_formats*/ AUDIO_DATA_FORMAT_TYPE_I_PCM, /*_nchannelsphysical*/ 0x01, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_stridx*/ 0x00),\
+  /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
+  TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
+  /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
+  /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
+  TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
+
+// AUDIO simple descriptor (UAC2) for 4 microphone input
+// - 1 Input Terminal, 1 Feature Unit (Mute and Volume Control), 1 Output Terminal, 1 Clock Source
+
+#define TUD_AUDIO_MIC_FOUR_CH_DESC_LEN (TUD_AUDIO_DESC_IAD_LEN\
+  + TUD_AUDIO_DESC_STD_AC_LEN\
+  + TUD_AUDIO_DESC_CS_AC_LEN\
+  + TUD_AUDIO_DESC_CLK_SRC_LEN\
+  + TUD_AUDIO_DESC_INPUT_TERM_LEN\
+  + TUD_AUDIO_DESC_OUTPUT_TERM_LEN\
+  + TUD_AUDIO_DESC_FEATURE_UNIT_FOUR_CHANNEL_LEN\
+  + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+  + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+  + TUD_AUDIO_DESC_CS_AS_INT_LEN\
+  + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\
+  + TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN\
+  + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN)
+
+#define TUD_AUDIO_MIC_FOUR_CH_DESC_N_AS_INT 1   // Number of AS interfaces
+
+#define TUD_AUDIO_MIC_FOUR_CH_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epin, _epsize) \
+  /* Standard Interface Association Descriptor (IAD) */\
+  TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
+  /* Standard AC Interface Descriptor(4.7.1) */\
+  TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\
+  /* Class-Specific AC Interface Header Descriptor(4.7.2) */\
+  TUD_AUDIO_DESC_CS_AC(/*_bcdADC*/ 0x0200, /*_category*/ AUDIO_FUNC_MICROPHONE, /*_totallen*/ TUD_AUDIO_DESC_CLK_SRC_LEN+TUD_AUDIO_DESC_INPUT_TERM_LEN+TUD_AUDIO_DESC_OUTPUT_TERM_LEN+TUD_AUDIO_DESC_FEATURE_UNIT_FOUR_CHANNEL_LEN, /*_ctrl*/ AUDIO_CS_AS_INTERFACE_CTRL_LATENCY_POS),\
+  /* Clock Source Descriptor(4.7.2.1) */\
+  TUD_AUDIO_DESC_CLK_SRC(/*_clkid*/ 0x04, /*_attr*/ AUDIO_CLOCK_SOURCE_ATT_INT_FIX_CLK, /*_ctrl*/ (AUDIO_CTRL_R << AUDIO_CLOCK_SOURCE_CTRL_CLK_FRQ_POS), /*_assocTerm*/ 0x01,  /*_stridx*/ 0x00),\
+  /* Input Terminal Descriptor(4.7.2.4) */\
+  TUD_AUDIO_DESC_INPUT_TERM(/*_termid*/ 0x01, /*_termtype*/ AUDIO_TERM_TYPE_IN_GENERIC_MIC, /*_assocTerm*/ 0x03, /*_clkid*/ 0x04, /*_nchannelslogical*/ 0x04, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_idxchannelnames*/ 0x00, /*_ctrl*/ AUDIO_CTRL_R << AUDIO_IN_TERM_CTRL_CONNECTOR_POS, /*_stridx*/ 0x00),\
+  /* Output Terminal Descriptor(4.7.2.5) */\
+  TUD_AUDIO_DESC_OUTPUT_TERM(/*_termid*/ 0x03, /*_termtype*/ AUDIO_TERM_TYPE_USB_STREAMING, /*_assocTerm*/ 0x01, /*_srcid*/ 0x02, /*_clkid*/ 0x04, /*_ctrl*/ 0x0000, /*_stridx*/ 0x00),\
+  /* Feature Unit Descriptor(4.7.2.8) */\
+  TUD_AUDIO_DESC_FEATURE_UNIT_FOUR_CHANNEL(/*_unitid*/ 0x02, /*_srcid*/ 0x01, /*_ctrlch0master*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_ctrlch1*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_ctrlch2*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_ctrlch3*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_ctrlch4*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_stridx*/ 0x00),\
+  /* Standard AS Interface Descriptor(4.9.1) */\
+  /* Interface 1, Alternate 0 - default alternate setting with 0 bandwidth */\
+  TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum)+1), /*_altset*/ 0x00, /*_nEPs*/ 0x00, /*_stridx*/ 0x00),\
+  /* Standard AS Interface Descriptor(4.9.1) */\
+  /* Interface 1, Alternate 1 - alternate interface for data streaming */\
+  TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum)+1), /*_altset*/ 0x01, /*_nEPs*/ 0x01, /*_stridx*/ 0x00),\
+  /* Class-Specific AS Interface Descriptor(4.9.2) */\
+  TUD_AUDIO_DESC_CS_AS_INT(/*_termid*/ 0x03, /*_ctrl*/ AUDIO_CTRL_NONE, /*_formattype*/ AUDIO_FORMAT_TYPE_I, /*_formats*/ AUDIO_DATA_FORMAT_TYPE_I_PCM, /*_nchannelsphysical*/ 0x04, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_stridx*/ 0x00),\
+  /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
+  TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
+  /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
+  /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
+  TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
+
+// AUDIO simple descriptor (UAC2) for mono speaker
+// - 1 Input Terminal, 2 Feature Unit (Mute and Volume Control), 3 Output Terminal, 4 Clock Source
+
+#define TUD_AUDIO_SPEAKER_MONO_FB_DESC_LEN (TUD_AUDIO_DESC_IAD_LEN\
+  + TUD_AUDIO_DESC_STD_AC_LEN\
+  + TUD_AUDIO_DESC_CS_AC_LEN\
+  + TUD_AUDIO_DESC_CLK_SRC_LEN\
+  + TUD_AUDIO_DESC_INPUT_TERM_LEN\
+  + TUD_AUDIO_DESC_OUTPUT_TERM_LEN\
+  + TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL_LEN\
+  + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+  + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+  + TUD_AUDIO_DESC_CS_AS_INT_LEN\
+  + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\
+  + TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN\
+  + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN\
+  + TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN)
+
+#define TUD_AUDIO_SPEAKER_MONO_FB_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epout, _epsize, _epfb) \
+  /* Standard Interface Association Descriptor (IAD) */\
+  TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
+  /* Standard AC Interface Descriptor(4.7.1) */\
+  TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\
+  /* Class-Specific AC Interface Header Descriptor(4.7.2) */\
+  TUD_AUDIO_DESC_CS_AC(/*_bcdADC*/ 0x0200, /*_category*/ AUDIO_FUNC_DESKTOP_SPEAKER, /*_totallen*/ TUD_AUDIO_DESC_CLK_SRC_LEN+TUD_AUDIO_DESC_INPUT_TERM_LEN+TUD_AUDIO_DESC_OUTPUT_TERM_LEN+TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL_LEN, /*_ctrl*/ AUDIO_CS_AS_INTERFACE_CTRL_LATENCY_POS),\
+  /* Clock Source Descriptor(4.7.2.1) */\
+  TUD_AUDIO_DESC_CLK_SRC(/*_clkid*/ 0x04, /*_attr*/ AUDIO_CLOCK_SOURCE_ATT_INT_FIX_CLK, /*_ctrl*/ (AUDIO_CTRL_R << AUDIO_CLOCK_SOURCE_CTRL_CLK_FRQ_POS), /*_assocTerm*/ 0x01,  /*_stridx*/ 0x00),\
+  /* Input Terminal Descriptor(4.7.2.4) */\
+  TUD_AUDIO_DESC_INPUT_TERM(/*_termid*/ 0x01, /*_termtype*/ AUDIO_TERM_TYPE_USB_STREAMING, /*_assocTerm*/ 0x00, /*_clkid*/ 0x04, /*_nchannelslogical*/ 0x01, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_idxchannelnames*/ 0x00, /*_ctrl*/ 0 * (AUDIO_CTRL_R << AUDIO_IN_TERM_CTRL_CONNECTOR_POS), /*_stridx*/ 0x00),\
+  /* Output Terminal Descriptor(4.7.2.5) */\
+  TUD_AUDIO_DESC_OUTPUT_TERM(/*_termid*/ 0x03, /*_termtype*/ AUDIO_TERM_TYPE_OUT_DESKTOP_SPEAKER, /*_assocTerm*/ 0x01, /*_srcid*/ 0x02, /*_clkid*/ 0x04, /*_ctrl*/ 0x0000, /*_stridx*/ 0x00),\
+  /* Feature Unit Descriptor(4.7.2.8) */\
+  TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL(/*_unitid*/ 0x02, /*_srcid*/ 0x01, /*_ctrlch0master*/ 0 * (AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS), /*_ctrlch1*/ 0 * (AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS), /*_stridx*/ 0x00),\
+  /* Standard AS Interface Descriptor(4.9.1) */\
+  /* Interface 1, Alternate 0 - default alternate setting with 0 bandwidth */\
+  TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum) + 1), /*_altset*/ 0x00, /*_nEPs*/ 0x00, /*_stridx*/ 0x00),\
+  /* Standard AS Interface Descriptor(4.9.1) */\
+  /* Interface 1, Alternate 1 - alternate interface for data streaming */\
+  TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum) + 1), /*_altset*/ 0x01, /*_nEPs*/ 0x02, /*_stridx*/ 0x00),\
+  /* Class-Specific AS Interface Descriptor(4.9.2) */\
+  TUD_AUDIO_DESC_CS_AS_INT(/*_termid*/ 0x01, /*_ctrl*/ AUDIO_CTRL_NONE, /*_formattype*/ AUDIO_FORMAT_TYPE_I, /*_formats*/ AUDIO_DATA_FORMAT_TYPE_I_PCM, /*_nchannelsphysical*/ 0x01, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_stridx*/ 0x00),\
+  /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
+  TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
+  /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
+  /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
+  TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\
+  /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */\
+  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(/*_ep*/ _epfb, /*_interval*/ 1)\
+
+//   Calculate wMaxPacketSize of Endpoints
+#define TUD_AUDIO_EP_SIZE(_maxFrequency, _nBytesPerSample, _nChannels) \
+    ((((_maxFrequency + (TUD_OPT_HIGH_SPEED ? 7999 : 999)) / (TUD_OPT_HIGH_SPEED ? 8000 : 1000)) + 1) * _nBytesPerSample * _nChannels)
+
+
+//--------------------------------------------------------------------+
+// USBTMC/USB488 Descriptor Templates
+//--------------------------------------------------------------------+
+
+#define TUD_USBTMC_APP_CLASS    (TUSB_CLASS_APPLICATION_SPECIFIC)
+#define TUD_USBTMC_APP_SUBCLASS 0x03u
+
+#define TUD_USBTMC_PROTOCOL_STD    0x00u
+#define TUD_USBTMC_PROTOCOL_USB488 0x01u
+
+//   Interface number, number of endpoints, EP string index, USB_TMC_PROTOCOL*, bulk-out endpoint ID,
+//   bulk-in endpoint ID
+#define TUD_USBTMC_IF_DESCRIPTOR(_itfnum, _bNumEndpoints, _stridx, _itfProtocol) \
+  /* Interface */ \
+  0x09, TUSB_DESC_INTERFACE, _itfnum, 0x00, _bNumEndpoints, TUD_USBTMC_APP_CLASS, TUD_USBTMC_APP_SUBCLASS, _itfProtocol, _stridx
+
+#define TUD_USBTMC_IF_DESCRIPTOR_LEN 9u
+
+#define TUD_USBTMC_BULK_DESCRIPTORS(_epout, _epin, _bulk_epsize) \
+  /* Endpoint Out */ \
+  7, TUSB_DESC_ENDPOINT, _epout, TUSB_XFER_BULK, U16_TO_U8S_LE(_bulk_epsize), 0u, \
+  /* Endpoint In */ \
+  7, TUSB_DESC_ENDPOINT, _epin, TUSB_XFER_BULK, U16_TO_U8S_LE(_bulk_epsize), 0u
+
+#define TUD_USBTMC_BULK_DESCRIPTORS_LEN (7u+7u)
+
+/* optional interrupt endpoint */ \
+// _int_pollingInterval : for LS/FS, expressed in frames (1ms each). 16 may be a good number?
+#define TUD_USBTMC_INT_DESCRIPTOR(_ep_interrupt, _ep_interrupt_size, _int_pollingInterval ) \
+  7, TUSB_DESC_ENDPOINT, _ep_interrupt, TUSB_XFER_INTERRUPT, U16_TO_U8S_LE(_ep_interrupt_size), 0x16
+
+#define TUD_USBTMC_INT_DESCRIPTOR_LEN (7u)
+
+//--------------------------------------------------------------------+
+// Vendor Descriptor Templates
+//--------------------------------------------------------------------+
+
+#define TUD_VENDOR_DESC_LEN  (9+7+7)
+
+// Interface number, string index, EP Out & IN address, EP size
+#define TUD_VENDOR_DESCRIPTOR(_itfnum, _stridx, _epout, _epin, _epsize) \
+  /* Interface */\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 2, TUSB_CLASS_VENDOR_SPECIFIC, 0x00, 0x00, _stridx,\
+  /* Endpoint Out */\
+  7, TUSB_DESC_ENDPOINT, _epout, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0,\
+  /* Endpoint In */\
+  7, TUSB_DESC_ENDPOINT, _epin, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0
+
+//--------------------------------------------------------------------+
+// DFU Runtime Descriptor Templates
+//--------------------------------------------------------------------+
+
+#define TUD_DFU_APP_CLASS    (TUSB_CLASS_APPLICATION_SPECIFIC)
+#define TUD_DFU_APP_SUBCLASS (APP_SUBCLASS_DFU_RUNTIME)
+
+// Length of template descriptr: 18 bytes
+#define TUD_DFU_RT_DESC_LEN (9 + 9)
+
+// DFU runtime descriptor
+// Interface number, string index, attributes, detach timeout, transfer size
+#define TUD_DFU_RT_DESCRIPTOR(_itfnum, _stridx, _attr, _timeout, _xfer_size) \
+  /* Interface */ \
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 0, TUD_DFU_APP_CLASS, TUD_DFU_APP_SUBCLASS, DFU_PROTOCOL_RT, _stridx, \
+  /* Function */ \
+  9, DFU_DESC_FUNCTIONAL, _attr, U16_TO_U8S_LE(_timeout), U16_TO_U8S_LE(_xfer_size), U16_TO_U8S_LE(0x0101)
+
+//--------------------------------------------------------------------+
+// DFU Descriptor Templates
+//--------------------------------------------------------------------+
+
+// Length of template descriptor: 9 bytes + number of alternatives * 9
+#define TUD_DFU_DESC_LEN(_alt_count)    (9 + (_alt_count) * 9)
+
+// Interface number, Alternate count, starting string index, attributes, detach timeout, transfer size
+// Note: Alternate count must be numberic or macro, string index is increased by one for each Alt interface
+#define TUD_DFU_DESCRIPTOR(_itfnum, _alt_count, _stridx, _attr, _timeout, _xfer_size) \
+  TU_XSTRCAT(_TUD_DFU_ALT_,_alt_count)(_itfnum, 0, _stridx), \
+  /* Function */ \
+  9, DFU_DESC_FUNCTIONAL, _attr, U16_TO_U8S_LE(_timeout), U16_TO_U8S_LE(_xfer_size), U16_TO_U8S_LE(0x0101)
+
+#define _TUD_DFU_ALT(_itfnum, _alt, _stridx) \
+  /* Interface */ \
+  9, TUSB_DESC_INTERFACE, _itfnum, _alt, 0, TUD_DFU_APP_CLASS, TUD_DFU_APP_SUBCLASS, DFU_PROTOCOL_DFU, _stridx
+
+#define _TUD_DFU_ALT_1(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx)
+
+#define _TUD_DFU_ALT_2(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_1(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_3(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_2(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_4(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_3(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_5(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_4(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_6(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_5(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_7(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_6(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_8(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_7(_itfnum, _alt_count+1, _stridx+1)
+
+//--------------------------------------------------------------------+
+// CDC-ECM Descriptor Templates
+//--------------------------------------------------------------------+
+
+// Length of template descriptor: 71 bytes
+#define TUD_CDC_ECM_DESC_LEN  (8+9+5+5+13+7+9+9+7+7)
+
+// CDC-ECM Descriptor Template
+// Interface number, description string index, MAC address string index, EP notification address and size, EP data address (out, in), and size, max segment size.
+#define TUD_CDC_ECM_DESCRIPTOR(_itfnum, _desc_stridx, _mac_stridx, _ep_notif, _ep_notif_size, _epout, _epin, _epsize, _maxsegmentsize) \
+  /* Interface Association */\
+  8, TUSB_DESC_INTERFACE_ASSOCIATION, _itfnum, 2, TUSB_CLASS_CDC, CDC_COMM_SUBCLASS_ETHERNET_CONTROL_MODEL, 0, 0,\
+  /* CDC Control Interface */\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 1, TUSB_CLASS_CDC, CDC_COMM_SUBCLASS_ETHERNET_CONTROL_MODEL, 0, _desc_stridx,\
+  /* CDC-ECM Header */\
+  5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_HEADER, U16_TO_U8S_LE(0x0120),\
+  /* CDC-ECM Union */\
+  5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_UNION, _itfnum, (uint8_t)((_itfnum) + 1),\
+  /* CDC-ECM Functional Descriptor */\
+  13, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_ETHERNET_NETWORKING, _mac_stridx, 0, 0, 0, 0, U16_TO_U8S_LE(_maxsegmentsize), U16_TO_U8S_LE(0), 0,\
+  /* Endpoint Notification */\
+  7, TUSB_DESC_ENDPOINT, _ep_notif, TUSB_XFER_INTERRUPT, U16_TO_U8S_LE(_ep_notif_size), 1,\
+  /* CDC Data Interface (default inactive) */\
+  9, TUSB_DESC_INTERFACE, (uint8_t)((_itfnum)+1), 0, 0, TUSB_CLASS_CDC_DATA, 0, 0, 0,\
+  /* CDC Data Interface (alternative active) */\
+  9, TUSB_DESC_INTERFACE, (uint8_t)((_itfnum)+1), 1, 2, TUSB_CLASS_CDC_DATA, 0, 0, 0,\
+  /* Endpoint In */\
+  7, TUSB_DESC_ENDPOINT, _epin, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0,\
+  /* Endpoint Out */\
+  7, TUSB_DESC_ENDPOINT, _epout, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0
+
+//--------------------------------------------------------------------+
+// RNDIS Descriptor Templates
+//--------------------------------------------------------------------+
+
+#if 0
+/* Windows XP */
+#define TUD_RNDIS_ITF_CLASS    TUSB_CLASS_CDC
+#define TUD_RNDIS_ITF_SUBCLASS CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL
+#define TUD_RNDIS_ITF_PROTOCOL 0xFF /* CDC_COMM_PROTOCOL_MICROSOFT_RNDIS */
+#else
+/* Windows 7+ */
+#define TUD_RNDIS_ITF_CLASS    TUSB_CLASS_WIRELESS_CONTROLLER
+#define TUD_RNDIS_ITF_SUBCLASS 0x01
+#define TUD_RNDIS_ITF_PROTOCOL 0x03
+#endif
+
+// Length of template descriptor: 66 bytes
+#define TUD_RNDIS_DESC_LEN  (8+9+5+5+4+5+7+9+7+7)
+
+// RNDIS Descriptor Template
+// Interface number, string index, EP notification address and size, EP data address (out, in) and size.
+#define TUD_RNDIS_DESCRIPTOR(_itfnum, _stridx, _ep_notif, _ep_notif_size, _epout, _epin, _epsize) \
+  /* Interface Association */\
+  8, TUSB_DESC_INTERFACE_ASSOCIATION, _itfnum, 2, TUD_RNDIS_ITF_CLASS, TUD_RNDIS_ITF_SUBCLASS, TUD_RNDIS_ITF_PROTOCOL, 0,\
+  /* CDC Control Interface */\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 1, TUD_RNDIS_ITF_CLASS, TUD_RNDIS_ITF_SUBCLASS, TUD_RNDIS_ITF_PROTOCOL, _stridx,\
+  /* CDC-ACM Header */\
+  5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_HEADER, U16_TO_U8S_LE(0x0110),\
+  /* CDC Call Management */\
+  5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_CALL_MANAGEMENT, 0, (uint8_t)((_itfnum) + 1),\
+  /* ACM */\
+  4, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT, 0,\
+  /* CDC Union */\
+  5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_UNION, _itfnum, (uint8_t)((_itfnum) + 1),\
+  /* Endpoint Notification */\
+  7, TUSB_DESC_ENDPOINT, _ep_notif, TUSB_XFER_INTERRUPT, U16_TO_U8S_LE(_ep_notif_size), 1,\
+  /* CDC Data Interface */\
+  9, TUSB_DESC_INTERFACE, (uint8_t)((_itfnum)+1), 0, 2, TUSB_CLASS_CDC_DATA, 0, 0, 0,\
+  /* Endpoint In */\
+  7, TUSB_DESC_ENDPOINT, _epin, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0,\
+  /* Endpoint Out */\
+  7, TUSB_DESC_ENDPOINT, _epout, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0
+
+//--------------------------------------------------------------------+
+// Bluetooth Radio Descriptor Templates
+//--------------------------------------------------------------------+
+
+#define TUD_BT_APP_CLASS                    (TUSB_CLASS_WIRELESS_CONTROLLER)
+#define TUD_BT_APP_SUBCLASS                 0x01
+#define TUD_BT_PROTOCOL_PRIMARY_CONTROLLER  0x01
+#define TUD_BT_PROTOCOL_AMP_CONTROLLER      0x02
+
+#ifndef CFG_TUD_BTH_ISO_ALT_COUNT
+#define CFG_TUD_BTH_ISO_ALT_COUNT 0
+#endif
+
+// Length of template descriptor: 38 bytes + number of ISO alternatives * 23
+#define TUD_BTH_DESC_LEN (8 + 9 + 7 + 7 + 7 + (CFG_TUD_BTH_ISO_ALT_COUNT) * (9 + 7 + 7))
+
+/* Primary Interface */
+#define TUD_BTH_PRI_ITF(_itfnum, _stridx, _ep_evt, _ep_evt_size, _ep_evt_interval, _ep_in, _ep_out, _ep_size) \
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 3, TUD_BT_APP_CLASS, TUD_BT_APP_SUBCLASS, TUD_BT_PROTOCOL_PRIMARY_CONTROLLER, _stridx, \
+  /* Endpoint In for events */ \
+  7, TUSB_DESC_ENDPOINT, _ep_evt, TUSB_XFER_INTERRUPT, U16_TO_U8S_LE(_ep_evt_size), _ep_evt_interval, \
+  /* Endpoint In for ACL data */ \
+  7, TUSB_DESC_ENDPOINT, _ep_in, TUSB_XFER_BULK, U16_TO_U8S_LE(_ep_size), 1, \
+  /* Endpoint Out for ACL data */ \
+  7, TUSB_DESC_ENDPOINT, _ep_out, TUSB_XFER_BULK, U16_TO_U8S_LE(_ep_size), 1
+
+#define TUD_BTH_ISO_ITF(_itfnum, _alt, _ep_in, _ep_out, _n) ,\
+  /* Interface with 2 endpoints */ \
+  9, TUSB_DESC_INTERFACE, _itfnum, _alt, 2, TUD_BT_APP_CLASS, TUD_BT_APP_SUBCLASS, TUD_BT_PROTOCOL_PRIMARY_CONTROLLER, 0, \
+  /* Isochronous endpoints */ \
+  7, TUSB_DESC_ENDPOINT, _ep_in, TUSB_XFER_ISOCHRONOUS, U16_TO_U8S_LE(_n), 1, \
+  7, TUSB_DESC_ENDPOINT, _ep_out, TUSB_XFER_ISOCHRONOUS, U16_TO_U8S_LE(_n), 1
+
+#define _FIRST(a, ...) a
+#define _REST(a, ...) __VA_ARGS__
+
+#define TUD_BTH_ISO_ITF_0(_itfnum, ...)
+#define TUD_BTH_ISO_ITF_1(_itfnum, _ep_in, _ep_out, ...) TUD_BTH_ISO_ITF(_itfnum, (CFG_TUD_BTH_ISO_ALT_COUNT) - 1, _ep_in, _ep_out, _FIRST(__VA_ARGS__))
+#define TUD_BTH_ISO_ITF_2(_itfnum, _ep_in, _ep_out, ...) TUD_BTH_ISO_ITF(_itfnum, (CFG_TUD_BTH_ISO_ALT_COUNT) - 2, _ep_in, _ep_out, _FIRST(__VA_ARGS__)) \
+  TUD_BTH_ISO_ITF_1(_itfnum, _ep_in, _ep_out, _REST(__VA_ARGS__))
+#define TUD_BTH_ISO_ITF_3(_itfnum, _ep_in, _ep_out, ...) TUD_BTH_ISO_ITF(_itfnum, (CFG_TUD_BTH_ISO_ALT_COUNT) - 3, _ep_in, _ep_out, _FIRST(__VA_ARGS__)) \
+  TUD_BTH_ISO_ITF_2(_itfnum, _ep_in, _ep_out, _REST(__VA_ARGS__))
+#define TUD_BTH_ISO_ITF_4(_itfnum, _ep_in, _ep_out, ...) TUD_BTH_ISO_ITF(_itfnum, (CFG_TUD_BTH_ISO_ALT_COUNT) - 4, _ep_in, _ep_out, _FIRST(__VA_ARGS__)) \
+  TUD_BTH_ISO_ITF_3(_itfnum, _ep_in, _ep_out, _REST(__VA_ARGS__))
+#define TUD_BTH_ISO_ITF_5(_itfnum, _ep_in, _ep_out, ...) TUD_BTH_ISO_ITF(_itfnum, (CFG_TUD_BTH_ISO_ALT_COUNT) - 5, _ep_in, _ep_out, _FIRST(__VA_ARGS__)) \
+  TUD_BTH_ISO_ITF_4(_itfnum, _ep_in, _ep_out, _REST(__VA_ARGS__))
+#define TUD_BTH_ISO_ITF_6(_itfnum, _ep_in, _ep_out, ...) TUD_BTH_ISO_ITF(_itfnum, (CFG_TUD_BTH_ISO_ALT_COUNT) - 6, _ep_in, _ep_out, _FIRST(__VA_ARGS__)) \
+  TUD_BTH_ISO_ITF_5(_itfnum, _ep_in, _ep_out, _REST(__VA_ARGS__))
+
+#define TUD_BTH_ISO_ITFS(_itfnum, _ep_in, _ep_out, ...) \
+  TU_XSTRCAT(TUD_BTH_ISO_ITF_, CFG_TUD_BTH_ISO_ALT_COUNT)(_itfnum, _ep_in, _ep_out, __VA_ARGS__)
+
+// BT Primary controller descriptor
+// Interface number, string index, attributes, event endpoint, event endpoint size, interval, data in, data out, data endpoint size, iso endpoint sizes
+// TODO BTH should also use IAD like CDC for composite device
+#define TUD_BTH_DESCRIPTOR(_itfnum, _stridx, _ep_evt, _ep_evt_size, _ep_evt_interval, _ep_in, _ep_out, _ep_size,...) \
+  /* Interface Associate */\
+  8, TUSB_DESC_INTERFACE_ASSOCIATION, _itfnum, 2, TUD_BT_APP_CLASS, TUD_BT_APP_SUBCLASS, TUD_BT_PROTOCOL_PRIMARY_CONTROLLER, 0,\
+  TUD_BTH_PRI_ITF(_itfnum, _stridx, _ep_evt, _ep_evt_size, _ep_evt_interval, _ep_in, _ep_out, _ep_size) \
+  TUD_BTH_ISO_ITFS(_itfnum + 1, _ep_in + 1, _ep_out + 1, __VA_ARGS__)
+
+//--------------------------------------------------------------------+
+// CDC-NCM Descriptor Templates
+//--------------------------------------------------------------------+
+
+// Length of template descriptor
+#define TUD_CDC_NCM_DESC_LEN  (8+9+5+5+13+6+7+9+9+7+7)
+
+// CDC-ECM Descriptor Template
+// Interface number, description string index, MAC address string index, EP notification address and size, EP data address (out, in), and size, max segment size.
+#define TUD_CDC_NCM_DESCRIPTOR(_itfnum, _desc_stridx, _mac_stridx, _ep_notif, _ep_notif_size, _epout, _epin, _epsize, _maxsegmentsize) \
+  /* Interface Association */\
+  8, TUSB_DESC_INTERFACE_ASSOCIATION, _itfnum, 2, TUSB_CLASS_CDC, CDC_COMM_SUBCLASS_NETWORK_CONTROL_MODEL, 0, 0,\
+  /* CDC Control Interface */\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 1, TUSB_CLASS_CDC, CDC_COMM_SUBCLASS_NETWORK_CONTROL_MODEL, 0, _desc_stridx,\
+  /* CDC-NCM Header */\
+  5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_HEADER, U16_TO_U8S_LE(0x0110),\
+  /* CDC-NCM Union */\
+  5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_UNION, _itfnum, (uint8_t)((_itfnum) + 1),\
+  /* CDC-NCM Functional Descriptor */\
+  13, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_ETHERNET_NETWORKING, _mac_stridx, 0, 0, 0, 0, U16_TO_U8S_LE(_maxsegmentsize), U16_TO_U8S_LE(0), 0, \
+  /* CDC-NCM Functional Descriptor */\
+  6, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_NCM, U16_TO_U8S_LE(0x0100), 0, \
+  /* Endpoint Notification */\
+  7, TUSB_DESC_ENDPOINT, _ep_notif, TUSB_XFER_INTERRUPT, U16_TO_U8S_LE(_ep_notif_size), 50,\
+  /* CDC Data Interface (default inactive) */\
+  9, TUSB_DESC_INTERFACE, (uint8_t)((_itfnum)+1), 0, 0, TUSB_CLASS_CDC_DATA, 0, NCM_DATA_PROTOCOL_NETWORK_TRANSFER_BLOCK, 0,\
+  /* CDC Data Interface (alternative active) */\
+  9, TUSB_DESC_INTERFACE, (uint8_t)((_itfnum)+1), 1, 2, TUSB_CLASS_CDC_DATA, 0, NCM_DATA_PROTOCOL_NETWORK_TRANSFER_BLOCK, 0,\
+  /* Endpoint In */\
+  7, TUSB_DESC_ENDPOINT, _epin, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0,\
+  /* Endpoint Out */\
+  7, TUSB_DESC_ENDPOINT, _epout, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TUSB_USBD_H_ */
+
+/** @} */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h
new file mode 100644
index 00000000000..29753451ebc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h
@@ -0,0 +1,117 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef USBD_PVT_H_
+#define USBD_PVT_H_
+
+#include "osal/osal.h"
+#include "common/tusb_fifo.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver API
+//--------------------------------------------------------------------+
+
+typedef struct
+{
+  #if CFG_TUSB_DEBUG >= 2
+  char const* name;
+  #endif
+
+  void     (* init             ) (void);
+  void     (* reset            ) (uint8_t rhport);
+  uint16_t (* open             ) (uint8_t rhport, tusb_desc_interface_t const * desc_intf, uint16_t max_len);
+  bool     (* control_xfer_cb  ) (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+  bool     (* xfer_cb          ) (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+  void     (* sof              ) (uint8_t rhport); /* optional */
+} usbd_class_driver_t;
+
+// Invoked when initializing device stack to get additional class drivers.
+// Can optionally implemented by application to extend/overwrite class driver support.
+// Note: The drivers array must be accessible at all time when stack is active
+usbd_class_driver_t const* usbd_app_driver_get_cb(uint8_t* driver_count) TU_ATTR_WEAK;
+
+typedef bool (*usbd_control_xfer_cb_t)(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+
+void usbd_int_set(bool enabled);
+
+//--------------------------------------------------------------------+
+// USBD Endpoint API
+//--------------------------------------------------------------------+
+
+// Open an endpoint
+bool usbd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep);
+
+// Close an endpoint
+void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr);
+
+// Submit a usb transfer
+bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes);
+
+// Submit a usb ISO transfer by use of a FIFO (ring buffer) - all bytes in FIFO get transmitted
+bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes);
+
+// Claim an endpoint before submitting a transfer.
+// If caller does not make any transfer, it must release endpoint for others.
+bool usbd_edpt_claim(uint8_t rhport, uint8_t ep_addr);
+
+// Release claimed endpoint without submitting a transfer
+bool usbd_edpt_release(uint8_t rhport, uint8_t ep_addr);
+
+// Check if endpoint is busy transferring
+bool usbd_edpt_busy(uint8_t rhport, uint8_t ep_addr);
+
+// Stall endpoint
+void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr);
+
+// Clear stalled endpoint
+void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr);
+
+// Check if endpoint is stalled
+bool usbd_edpt_stalled(uint8_t rhport, uint8_t ep_addr);
+
+// Check if endpoint is ready (not busy and not stalled)
+TU_ATTR_ALWAYS_INLINE static inline
+bool usbd_edpt_ready(uint8_t rhport, uint8_t ep_addr)
+{
+  return !usbd_edpt_busy(rhport, ep_addr) && !usbd_edpt_stalled(rhport, ep_addr);
+}
+
+/*------------------------------------------------------------------*/
+/* Helper
+ *------------------------------------------------------------------*/
+
+bool usbd_open_edpt_pair(uint8_t rhport, uint8_t const* p_desc, uint8_t ep_count, uint8_t xfer_type, uint8_t* ep_out, uint8_t* ep_in);
+void usbd_defer_func( osal_task_func_t func, void* param, bool in_isr );
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* USBD_PVT_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/hcd.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/hcd.h
new file mode 100644
index 00000000000..c40bea64cec
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/hcd.h
@@ -0,0 +1,179 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_HCD_H_
+#define _TUSB_HCD_H_
+
+#include "common/tusb_common.h"
+#include "osal/osal.h"
+#include "common/tusb_fifo.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+
+#ifndef CFG_TUH_ENDPOINT_MAX
+  #define CFG_TUH_ENDPOINT_MAX   (CFG_TUH_HUB + CFG_TUH_HID*2 + CFG_TUH_MSC*2 + CFG_TUH_CDC*3)
+//  #ifdef TUP_HCD_ENDPOINT_MAX
+//    #define CFG_TUH_ENDPPOINT_MAX   TUP_HCD_ENDPOINT_MAX
+//  #else
+//    #define
+//  #endif
+#endif
+
+ //--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF
+//--------------------------------------------------------------------+
+typedef enum
+{
+  HCD_EVENT_DEVICE_ATTACH,
+  HCD_EVENT_DEVICE_REMOVE,
+  HCD_EVENT_XFER_COMPLETE,
+
+  // Not an HCD event, just a convenient way to defer ISR function
+  USBH_EVENT_FUNC_CALL,
+
+  HCD_EVENT_COUNT
+} hcd_eventid_t;
+
+typedef struct
+{
+  uint8_t rhport;
+  uint8_t event_id;
+  uint8_t dev_addr;
+
+  union
+  {
+    // Attach, Remove
+    struct {
+      uint8_t hub_addr;
+      uint8_t hub_port;
+      uint8_t speed;
+    } connection;
+
+    // XFER_COMPLETE
+    struct {
+      uint8_t ep_addr;
+      uint8_t result;
+      uint32_t len;
+    } xfer_complete;
+
+    // FUNC_CALL
+    struct {
+      void (*func) (void*);
+      void* param;
+    }func_call;
+  };
+
+} hcd_event_t;
+
+typedef struct
+{
+  uint8_t rhport;
+  uint8_t hub_addr;
+  uint8_t hub_port;
+  uint8_t speed;
+} hcd_devtree_info_t;
+
+//--------------------------------------------------------------------+
+// Controller API
+//--------------------------------------------------------------------+
+
+// Initialize controller to host mode
+bool hcd_init(uint8_t rhport);
+
+// Interrupt Handler
+void hcd_int_handler(uint8_t rhport);
+
+// Enable USB interrupt
+void hcd_int_enable (uint8_t rhport);
+
+// Disable USB interrupt
+void hcd_int_disable(uint8_t rhport);
+
+// Get frame number (1ms)
+uint32_t hcd_frame_number(uint8_t rhport);
+
+//--------------------------------------------------------------------+
+// Port API
+//--------------------------------------------------------------------+
+
+// Get the current connect status of roothub port
+bool hcd_port_connect_status(uint8_t rhport);
+
+// Reset USB bus on the port
+void hcd_port_reset(uint8_t rhport);
+
+// TODO implement later
+void hcd_port_reset_end(uint8_t rhport);
+
+// Get port link speed
+tusb_speed_t hcd_port_speed_get(uint8_t rhport);
+
+// HCD closes all opened endpoints belong to this device
+void hcd_device_close(uint8_t rhport, uint8_t dev_addr);
+
+//--------------------------------------------------------------------+
+// Endpoints API
+//--------------------------------------------------------------------+
+
+bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]);
+bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
+bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
+bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr);
+
+//--------------------------------------------------------------------+
+// USBH implemented API
+//--------------------------------------------------------------------+
+
+// Get device tree information of a device
+// USB device tree can be complicated and manged by USBH, this help HCD to retrieve
+// needed topology info to carry out its work
+extern void hcd_devtree_get_info(uint8_t dev_addr, hcd_devtree_info_t* devtree_info);
+
+//------------- Event API -------------//
+
+// Called by HCD to notify stack
+extern void hcd_event_handler(hcd_event_t const* event, bool in_isr);
+
+// Helper to send device attach event
+extern void hcd_event_device_attach(uint8_t rhport, bool in_isr);
+
+// Helper to send device removal event
+extern void hcd_event_device_remove(uint8_t rhport, bool in_isr);
+
+// Helper to send USB transfer event
+extern void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, uint32_t xferred_bytes, xfer_result_t result, bool in_isr);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_HCD_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/hub.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/hub.h
new file mode 100644
index 00000000000..390740e1fcb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/hub.h
@@ -0,0 +1,219 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/** \ingroup group_class
+ *  \defgroup ClassDriver_Hub Hub (Host only)
+ *  \details  Like most PC's OS, Hub support is completely hidden from Application. In fact, application cannot determine whether
+ *            a device is mounted directly via roothub or via a hub's port. All Hub-related procedures are performed and managed
+ *            by tinyusb stack. Unless you are trying to develop the stack itself, there are nothing else can be used by Application.
+ *  \note     Due to my laziness, only 1-level of Hub is supported. In other way, the stack cannot mount a hub via another hub.
+ *  @{
+ */
+
+#ifndef _TUSB_HUB_H_
+#define _TUSB_HUB_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//D1...D0: Logical Power Switching Mode
+//00:  Ganged power switching (all ports’power at
+//once)
+//01:  Individual port power switching
+//1X:  Reserved. Used only on 1.0 compliant hubs
+//that implement no power switching
+//D2:  Identifies a Compound Device
+//0: Hub is not part of a compound device.
+//1: Hub is part of a compound device.
+//D4...D3: Over-current Protection Mode
+//00: Global Over-current Protection. The hub
+//reports over-current as a summation of all
+//ports’current draw, without a breakdown of
+//individual port over-current status.
+//01: Individual Port Over-current Protection. The
+//hub reports over-current on a per-port basis.
+//Each port has an over-current status.
+//1X: No Over-current Protection. This option is
+//allowed only for bus-powered hubs that do not
+//implement over-current protection.
+//
+//D6...D5: TT Think TIme
+//00:  TT requires at most 8 FS bit times of inter
+//transaction gap on a full-/low-speed
+//downstream bus.
+//01:  TT requires at most 16 FS bit times.
+//10:  TT requires at most 24 FS bit times.
+//11:  TT requires at most 32 FS bit times.
+//D7: Port Indicators Supported
+//0:  Port Indicators are not supported on its
+//downstream facing ports and the
+//PORT_INDICATOR request has no effect.
+//1:  Port Indicators are supported on its
+//downstream facing ports and the
+//PORT_INDICATOR request controls the
+//indicators. See Section 11.5.3.
+//D15...D8: Reserved
+
+typedef struct TU_ATTR_PACKED{
+  uint8_t  bLength           ; ///< Size of descriptor
+  uint8_t  bDescriptorType   ; ///< Other_speed_Configuration Type
+  uint8_t  bNbrPorts;
+  uint16_t wHubCharacteristics;
+  uint8_t  bPwrOn2PwrGood;
+  uint8_t  bHubContrCurrent;
+  uint8_t  DeviceRemovable; // bitmap each bit for a port (from bit1)
+  uint8_t  PortPwrCtrlMask; // just for compatibility, should be 0xff
+} descriptor_hub_desc_t;
+
+TU_VERIFY_STATIC( sizeof(descriptor_hub_desc_t) == 9, "size is not correct");
+
+enum {
+  HUB_REQUEST_GET_STATUS      = 0  ,
+  HUB_REQUEST_CLEAR_FEATURE   = 1  ,
+
+  HUB_REQUEST_SET_FEATURE     = 3  ,
+
+  HUB_REQUEST_GET_DESCRIPTOR  = 6  ,
+  HUB_REQUEST_SET_DESCRIPTOR  = 7  ,
+  HUB_REQUEST_CLEAR_TT_BUFFER = 8  ,
+  HUB_REQUEST_RESET_TT        = 9  ,
+  HUB_REQUEST_GET_TT_STATE    = 10 ,
+  HUB_REQUEST_STOP_TT         = 11
+};
+
+enum {
+  HUB_FEATURE_HUB_LOCAL_POWER_CHANGE = 0,
+  HUB_FEATURE_HUB_OVER_CURRENT_CHANGE
+};
+
+enum{
+  HUB_FEATURE_PORT_CONNECTION          = 0,
+  HUB_FEATURE_PORT_ENABLE              = 1,
+  HUB_FEATURE_PORT_SUSPEND             = 2,
+  HUB_FEATURE_PORT_OVER_CURRENT        = 3,
+  HUB_FEATURE_PORT_RESET               = 4,
+
+  HUB_FEATURE_PORT_POWER               = 8,
+  HUB_FEATURE_PORT_LOW_SPEED           = 9,
+
+  HUB_FEATURE_PORT_CONNECTION_CHANGE   = 16,
+  HUB_FEATURE_PORT_ENABLE_CHANGE       = 17,
+  HUB_FEATURE_PORT_SUSPEND_CHANGE      = 18,
+  HUB_FEATURE_PORT_OVER_CURRENT_CHANGE = 19,
+  HUB_FEATURE_PORT_RESET_CHANGE        = 20,
+  HUB_FEATURE_PORT_TEST                = 21,
+  HUB_FEATURE_PORT_INDICATOR           = 22
+};
+
+// data in response of HUB_REQUEST_GET_STATUS, wIndex = 0 (hub)
+typedef struct {
+  union{
+    struct TU_ATTR_PACKED {
+      uint16_t local_power_source : 1;
+      uint16_t over_current       : 1;
+      uint16_t : 14;
+    };
+
+    uint16_t value;
+  } status, change;
+} hub_status_response_t;
+
+TU_VERIFY_STATIC( sizeof(hub_status_response_t) == 4, "size is not correct");
+
+// data in response of HUB_REQUEST_GET_STATUS, wIndex = Port num
+typedef struct {
+  union {
+    struct TU_ATTR_PACKED {
+      uint16_t connection             : 1;
+      uint16_t port_enable            : 1;
+      uint16_t suspend                : 1;
+      uint16_t over_current           : 1;
+      uint16_t reset                  : 1;
+
+      uint16_t                        : 3;
+      uint16_t port_power             : 1;
+      uint16_t low_speed              : 1;
+      uint16_t high_speed             : 1;
+      uint16_t port_test_mode         : 1;
+      uint16_t port_indicator_control : 1;
+      uint16_t TU_RESERVED            : 3;
+    };
+
+    uint16_t value;
+  } status, change;
+} hub_port_status_response_t;
+
+TU_VERIFY_STATIC( sizeof(hub_port_status_response_t) == 4, "size is not correct");
+
+// Clear feature
+bool hub_port_clear_feature (uint8_t hub_addr, uint8_t hub_port, uint8_t feature,
+                             tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Set feature
+bool hub_port_set_feature   (uint8_t hub_addr, uint8_t hub_port, uint8_t feature,
+                             tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get port status
+bool hub_port_get_status    (uint8_t hub_addr, uint8_t hub_port, void* resp,
+                             tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get status from Interrupt endpoint
+bool hub_edpt_status_xfer(uint8_t dev_addr);
+
+// Reset a port
+static inline bool hub_port_reset(uint8_t hub_addr, uint8_t hub_port,
+                                  tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  return hub_port_set_feature(hub_addr, hub_port, HUB_FEATURE_PORT_RESET, complete_cb, user_data);
+}
+
+// Clear Reset Change
+static inline bool hub_port_clear_reset_change(uint8_t hub_addr, uint8_t hub_port,
+                                               tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  return hub_port_clear_feature(hub_addr, hub_port, HUB_FEATURE_PORT_RESET_CHANGE, complete_cb, user_data);
+}
+
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void hub_init       (void);
+bool hub_open       (uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
+bool hub_set_config (uint8_t dev_addr, uint8_t itf_num);
+bool hub_xfer_cb    (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+void hub_close      (uint8_t dev_addr);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_HUB_H_ */
+
+/** @} */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/usbh.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/usbh.h
new file mode 100644
index 00000000000..e883ac90bc7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/usbh.h
@@ -0,0 +1,232 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_USBH_H_
+#define _TUSB_USBH_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "common/tusb_common.h"
+#include "hcd.h"
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF
+//--------------------------------------------------------------------+
+
+// forward declaration
+struct tuh_xfer_s;
+typedef struct tuh_xfer_s tuh_xfer_t;
+
+typedef void (*tuh_xfer_cb_t)(tuh_xfer_t* xfer);
+
+// Note1: layout and order of this will be changed in near future
+// it is advised to initialize it using member name
+// Note2: not all field is available/meaningful in callback, some info is not saved by
+// usbh to save SRAM
+struct tuh_xfer_s
+{
+  uint8_t daddr;
+  uint8_t ep_addr;
+
+  xfer_result_t result;
+  uint32_t actual_len;      // excluding setup packet
+
+  union
+  {
+    tusb_control_request_t const* setup; // setup packet pointer if control transfer
+    uint32_t buflen;        // expected length if not control transfer (not available in callback)
+  };
+
+  uint8_t* buffer;           // not available in callback if not control transfer
+  tuh_xfer_cb_t complete_cb;
+  uintptr_t user_data;
+
+  // uint32_t timeout_ms;    // place holder, not supported yet
+};
+
+//--------------------------------------------------------------------+
+// APPLICATION CALLBACK
+//--------------------------------------------------------------------+
+
+//TU_ATTR_WEAK uint8_t tuh_attach_cb (tusb_desc_device_t const *desc_device);
+
+// Invoked when device is mounted (configured)
+TU_ATTR_WEAK void tuh_mount_cb (uint8_t daddr);
+
+/// Invoked when device is unmounted (bus reset/unplugged)
+TU_ATTR_WEAK void tuh_umount_cb(uint8_t daddr);
+
+//--------------------------------------------------------------------+
+// APPLICATION API
+//--------------------------------------------------------------------+
+
+// Init host stack
+bool tuh_init(uint8_t rhport);
+
+// Check if host stack is already initialized
+bool tuh_inited(void);
+
+// Task function should be called in main/rtos loop
+void tuh_task(void);
+
+// Interrupt handler, name alias to HCD
+extern void hcd_int_handler(uint8_t rhport);
+#define tuh_int_handler   hcd_int_handler
+
+bool tuh_vid_pid_get(uint8_t daddr, uint16_t* vid, uint16_t* pid);
+
+tusb_speed_t tuh_speed_get(uint8_t daddr);
+
+// Check if device is connected and configured
+bool tuh_mounted(uint8_t daddr);
+
+// Check if device is suspended
+TU_ATTR_ALWAYS_INLINE
+static inline bool tuh_suspended(uint8_t daddr)
+{
+  // TODO implement suspend & resume on host
+  (void) daddr;
+  return false;
+}
+
+// Check if device is ready to communicate with
+TU_ATTR_ALWAYS_INLINE
+static inline bool tuh_ready(uint8_t daddr)
+{
+  return tuh_mounted(daddr) && !tuh_suspended(daddr);
+}
+
+//--------------------------------------------------------------------+
+// Transfer API
+//--------------------------------------------------------------------+
+
+// Submit a control transfer
+//  - async: complete callback invoked when finished.
+//  - sync : blocking if complete callback is NULL.
+bool tuh_control_xfer(tuh_xfer_t* xfer);
+
+// Submit a bulk/interrupt transfer
+//  - async: complete callback invoked when finished.
+//  - sync : blocking if complete callback is NULL.
+bool tuh_edpt_xfer(tuh_xfer_t* xfer);
+
+// Open an non-control endpoint
+bool tuh_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep);
+
+// Set Configuration (control transfer)
+// config_num = 0 will un-configure device. Note: config_num = config_descriptor_index + 1
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_configuration_set(uint8_t daddr, uint8_t config_num,
+                           tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+//--------------------------------------------------------------------+
+// Descriptors Asynchronous (non-blocking)
+//--------------------------------------------------------------------+
+
+// Get an descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len,
+                        tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get device descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_device(uint8_t daddr, void* buffer, uint16_t len,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get configuration descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_configuration(uint8_t daddr, uint8_t index, void* buffer, uint16_t len,
+                                      tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get HID report descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len,
+                                   tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+// Blocking if complete callback is NULL, in this case 'user_data' must contain xfer_result_t variable
+bool tuh_descriptor_get_string(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get manufacturer string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_manufacturer_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len,
+                                            tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get product string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_product_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len,
+                                       tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get serial string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_serial_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len,
+                                      tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+//--------------------------------------------------------------------+
+// Descriptors Synchronous (blocking)
+//--------------------------------------------------------------------+
+
+// Sync (blocking) version of tuh_descriptor_get()
+// return transfer result
+uint8_t tuh_descriptor_get_sync(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_device()
+// return transfer result
+uint8_t tuh_descriptor_get_device_sync(uint8_t daddr, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_configuration()
+// return transfer result
+uint8_t tuh_descriptor_get_configuration_sync(uint8_t daddr, uint8_t index, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_hid_report()
+// return transfer result
+uint8_t tuh_descriptor_get_hid_report_sync(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_string()
+// return transfer result
+uint8_t tuh_descriptor_get_string_sync(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_manufacturer_string()
+// return transfer result
+uint8_t tuh_descriptor_get_manufacturer_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_product_string()
+// return transfer result
+uint8_t tuh_descriptor_get_product_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len);
+
+// Sync (blocking) version of tuh_descriptor_get_serial_string()
+// return transfer result
+uint8_t tuh_descriptor_get_serial_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/usbh_classdriver.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/usbh_classdriver.h
new file mode 100644
index 00000000000..c156afea048
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/host/usbh_classdriver.h
@@ -0,0 +1,91 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_USBH_CLASSDRIVER_H_
+#define _TUSB_USBH_CLASSDRIVER_H_
+
+#include "osal/osal.h"
+#include "common/tusb_fifo.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver API
+//--------------------------------------------------------------------+
+
+typedef struct {
+  #if CFG_TUSB_DEBUG >= 2
+  char const* name;
+  #endif
+
+  void (* const init       )(void);
+  bool (* const open       )(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+  bool (* const set_config )(uint8_t dev_addr, uint8_t itf_num);
+  bool (* const xfer_cb    )(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+  void (* const close      )(uint8_t dev_addr);
+} usbh_class_driver_t;
+
+// Call by class driver to tell USBH that it has complete the enumeration
+void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num);
+
+uint8_t usbh_get_rhport(uint8_t dev_addr);
+
+uint8_t* usbh_get_enum_buf(void);
+
+void usbh_int_set(bool enabled);
+
+//--------------------------------------------------------------------+
+// USBH Endpoint API
+//--------------------------------------------------------------------+
+
+// Submit a usb transfer with callback support, require CFG_TUH_API_EDPT_XFER
+bool usbh_edpt_xfer_with_callback(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes,
+                                  tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+TU_ATTR_ALWAYS_INLINE
+static inline bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
+{
+  return usbh_edpt_xfer_with_callback(dev_addr, ep_addr, buffer, total_bytes, NULL, 0);
+}
+
+
+// Claim an endpoint before submitting a transfer.
+// If caller does not make any transfer, it must release endpoint for others.
+bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr);
+
+// Release claimed endpoint without submitting a transfer
+bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr);
+
+// Check if endpoint transferring is complete
+bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal.h
new file mode 100644
index 00000000000..7111bbdb2a1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal.h
@@ -0,0 +1,89 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_OSAL_H_
+#define _TUSB_OSAL_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "common/tusb_common.h"
+
+// Return immediately
+#define OSAL_TIMEOUT_NOTIMEOUT     (0)
+// Default timeout
+#define OSAL_TIMEOUT_NORMAL        (10)
+// Wait forever
+#define OSAL_TIMEOUT_WAIT_FOREVER  (UINT32_MAX)
+
+#define OSAL_TIMEOUT_CONTROL_XFER  OSAL_TIMEOUT_WAIT_FOREVER
+
+typedef void (*osal_task_func_t)( void * );
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  #include "osal_none.h"
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  #include "osal_freertos.h"
+#elif CFG_TUSB_OS == OPT_OS_MYNEWT
+  #include "osal_mynewt.h"
+#elif CFG_TUSB_OS == OPT_OS_PICO
+  #include "osal_pico.h"
+#elif CFG_TUSB_OS == OPT_OS_RTTHREAD
+  #include "osal_rtthread.h"
+#elif CFG_TUSB_OS == OPT_OS_RTX4
+  #include "osal_rtx4.h"
+#elif CFG_TUSB_OS == OPT_OS_CUSTOM
+  #include "tusb_os_custom.h" // implemented by application
+#else
+  #error OS is not supported yet
+#endif
+
+//--------------------------------------------------------------------+
+// OSAL Porting API
+// Should be implemented as static inline function in osal_port.h header
+/*
+    static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef);
+    static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr);
+    static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec);
+    static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl); // TODO removed
+
+    static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef);
+    static inline bool osal_mutex_lock (osal_mutex_t sem_hdl, uint32_t msec);
+    static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl);
+
+    static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef);
+    static inline bool osal_queue_receive(osal_queue_t qhdl, void* data);
+    static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr);
+    static inline bool osal_queue_empty(osal_queue_t qhdl);
+*/
+//--------------------------------------------------------------------+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_OSAL_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_freertos.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_freertos.h
new file mode 100644
index 00000000000..69a026df5b5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_freertos.h
@@ -0,0 +1,174 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_OSAL_FREERTOS_H_
+#define _TUSB_OSAL_FREERTOS_H_
+
+// FreeRTOS Headers
+#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,FreeRTOS.h)
+#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,semphr.h)
+#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,queue.h)
+#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,task.h)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+static inline void osal_task_delay(uint32_t msec)
+{
+  vTaskDelay( pdMS_TO_TICKS(msec) );
+}
+
+//--------------------------------------------------------------------+
+// Semaphore API
+//--------------------------------------------------------------------+
+typedef StaticSemaphore_t osal_semaphore_def_t;
+typedef SemaphoreHandle_t osal_semaphore_t;
+
+static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef)
+{
+  return xSemaphoreCreateBinaryStatic(semdef);
+}
+
+static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr)
+{
+  if ( !in_isr )
+  {
+    return xSemaphoreGive(sem_hdl) != 0;
+  }
+  else
+  {
+    BaseType_t xHigherPriorityTaskWoken;
+    BaseType_t res = xSemaphoreGiveFromISR(sem_hdl, &xHigherPriorityTaskWoken);
+
+#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
+    // not needed after https://github.com/espressif/esp-idf/commit/c5fd79547ac9b7bae06fa660e9f814d18d3390b7
+    if ( xHigherPriorityTaskWoken ) portYIELD_FROM_ISR();
+#else
+    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+#endif
+
+    return res != 0;
+  }
+}
+
+static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec)
+{
+  uint32_t const ticks = (msec == OSAL_TIMEOUT_WAIT_FOREVER) ? portMAX_DELAY : pdMS_TO_TICKS(msec);
+  return xSemaphoreTake(sem_hdl, ticks);
+}
+
+static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl)
+{
+  xQueueReset(sem_hdl);
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API (priority inheritance)
+//--------------------------------------------------------------------+
+typedef StaticSemaphore_t osal_mutex_def_t;
+typedef SemaphoreHandle_t osal_mutex_t;
+
+static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef)
+{
+  return xSemaphoreCreateMutexStatic(mdef);
+}
+
+static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec)
+{
+  return osal_semaphore_wait(mutex_hdl, msec);
+}
+
+static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
+{
+  return xSemaphoreGive(mutex_hdl);
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+
+// role device/host is used by OS NONE for mutex (disable usb isr) only
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
+  static _type _name##_##buf[_depth];\
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf };
+
+typedef struct
+{
+  uint16_t depth;
+  uint16_t item_sz;
+  void*    buf;
+
+  StaticQueue_t sq;
+}osal_queue_def_t;
+
+typedef QueueHandle_t osal_queue_t;
+
+static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
+{
+  return xQueueCreateStatic(qdef->depth, qdef->item_sz, (uint8_t*) qdef->buf, &qdef->sq);
+}
+
+static inline bool osal_queue_receive(osal_queue_t qhdl, void* data)
+{
+  return xQueueReceive(qhdl, data, portMAX_DELAY);
+}
+
+static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
+{
+  if ( !in_isr )
+  {
+    return xQueueSendToBack(qhdl, data, OSAL_TIMEOUT_WAIT_FOREVER) != 0;
+  }
+  else
+  {
+    BaseType_t xHigherPriorityTaskWoken;
+    BaseType_t res = xQueueSendToBackFromISR(qhdl, data, &xHigherPriorityTaskWoken);
+
+#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
+    // not needed after https://github.com/espressif/esp-idf/commit/c5fd79547ac9b7bae06fa660e9f814d18d3390b7
+    if ( xHigherPriorityTaskWoken ) portYIELD_FROM_ISR();
+#else
+    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+#endif
+
+    return res != 0;
+  }
+}
+
+static inline bool osal_queue_empty(osal_queue_t qhdl)
+{
+  return uxQueueMessagesWaiting(qhdl) == 0;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_mynewt.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_mynewt.h
new file mode 100644
index 00000000000..78a257cd69f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_mynewt.h
@@ -0,0 +1,174 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef OSAL_MYNEWT_H_
+#define OSAL_MYNEWT_H_
+
+#include "os/os.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+static inline void osal_task_delay(uint32_t msec)
+{
+  os_time_delay( os_time_ms_to_ticks32(msec) );
+}
+
+//--------------------------------------------------------------------+
+// Semaphore API
+//--------------------------------------------------------------------+
+typedef struct os_sem  osal_semaphore_def_t;
+typedef struct os_sem* osal_semaphore_t;
+
+static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef)
+{
+  return (os_sem_init(semdef, 0) == OS_OK) ? (osal_semaphore_t) semdef : NULL;
+}
+
+static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr)
+{
+  (void) in_isr;
+  return os_sem_release(sem_hdl) == OS_OK;
+}
+
+static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec)
+{
+  uint32_t const ticks = (msec == OSAL_TIMEOUT_WAIT_FOREVER) ? OS_TIMEOUT_NEVER : os_time_ms_to_ticks32(msec);
+  return os_sem_pend(sem_hdl, ticks) == OS_OK;
+}
+
+static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl)
+{
+  // TODO implement later
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API (priority inheritance)
+//--------------------------------------------------------------------+
+typedef struct os_mutex osal_mutex_def_t;
+typedef struct os_mutex* osal_mutex_t;
+
+static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef)
+{
+  return (os_mutex_init(mdef) == OS_OK) ? (osal_mutex_t) mdef : NULL;
+}
+
+static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec)
+{
+  uint32_t const ticks = (msec == OSAL_TIMEOUT_WAIT_FOREVER) ? OS_TIMEOUT_NEVER : os_time_ms_to_ticks32(msec);
+  return os_mutex_pend(mutex_hdl, ticks) == OS_OK;
+}
+
+static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
+{
+  return os_mutex_release(mutex_hdl) == OS_OK;
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+
+// role device/host is used by OS NONE for mutex (disable usb isr) only
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
+  static _type _name##_##buf[_depth];\
+  static struct os_event _name##_##evbuf[_depth];\
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, .evbuf =  _name##_##evbuf};\
+
+typedef struct
+{
+  uint16_t depth;
+  uint16_t item_sz;
+  void*    buf;
+  void*    evbuf;
+
+  struct os_mempool mpool;
+  struct os_mempool epool;
+
+  struct os_eventq  evq;
+}osal_queue_def_t;
+
+typedef osal_queue_def_t* osal_queue_t;
+
+static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
+{
+  if ( OS_OK != os_mempool_init(&qdef->mpool, qdef->depth, qdef->item_sz, qdef->buf, "usbd queue") ) return NULL;
+  if ( OS_OK != os_mempool_init(&qdef->epool, qdef->depth, sizeof(struct os_event), qdef->evbuf, "usbd evqueue") ) return NULL;
+
+  os_eventq_init(&qdef->evq);
+  return (osal_queue_t) qdef;
+}
+
+static inline bool osal_queue_receive(osal_queue_t qhdl, void* data)
+{
+  struct os_event* ev;
+  ev = os_eventq_get(&qhdl->evq);
+
+  memcpy(data, ev->ev_arg, qhdl->item_sz); // copy message
+  os_memblock_put(&qhdl->mpool, ev->ev_arg); // put back mem block
+  os_memblock_put(&qhdl->epool, ev);         // put back ev block
+
+  return true;
+}
+
+static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
+{
+  (void) in_isr;
+
+  // get a block from mem pool for data
+  void* ptr = os_memblock_get(&qhdl->mpool);
+  if (!ptr) return false;
+  memcpy(ptr, data, qhdl->item_sz);
+
+  // get a block from event pool to put into queue
+  struct os_event* ev = (struct os_event*) os_memblock_get(&qhdl->epool);
+  if (!ev)
+  {
+    os_memblock_put(&qhdl->mpool, ptr);
+    return false;
+  }
+  tu_memclr(ev, sizeof(struct os_event));
+  ev->ev_arg = ptr;
+
+  os_eventq_put(&qhdl->evq, ev);
+
+  return true;
+}
+
+static inline bool osal_queue_empty(osal_queue_t qhdl)
+{
+  return STAILQ_EMPTY(&qhdl->evq.evq_list);
+}
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* OSAL_MYNEWT_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_none.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_none.h
new file mode 100644
index 00000000000..4217f042225
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_none.h
@@ -0,0 +1,179 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_OSAL_NONE_H_
+#define _TUSB_OSAL_NONE_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+
+
+//--------------------------------------------------------------------+
+// Binary Semaphore API
+//--------------------------------------------------------------------+
+typedef struct
+{
+  volatile uint16_t count;
+}osal_semaphore_def_t;
+
+typedef osal_semaphore_def_t* osal_semaphore_t;
+
+static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef)
+{
+  semdef->count = 0;
+  return semdef;
+}
+
+static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr)
+{
+  (void) in_isr;
+  sem_hdl->count++;
+  return true;
+}
+
+// TODO blocking for now
+static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec)
+{
+  (void) msec;
+
+  while (sem_hdl->count == 0) { }
+  sem_hdl->count--;
+
+  return true;
+}
+
+static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl)
+{
+  sem_hdl->count = 0;
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API
+// Within tinyusb, mutex is never used in ISR context
+//--------------------------------------------------------------------+
+typedef osal_semaphore_def_t osal_mutex_def_t;
+typedef osal_semaphore_t osal_mutex_t;
+
+static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef)
+{
+  mdef->count = 1;
+  return mdef;
+}
+
+static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec)
+{
+  return osal_semaphore_wait(mutex_hdl, msec);
+}
+
+static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
+{
+  return osal_semaphore_post(mutex_hdl, false);
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+#include "common/tusb_fifo.h"
+
+typedef struct
+{
+  void (*interrupt_set)(bool);
+  tu_fifo_t ff;
+}osal_queue_def_t;
+
+typedef osal_queue_def_t* osal_queue_t;
+
+// _int_set is used as mutex in OS NONE (disable/enable USB ISR)
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type)    \
+  uint8_t _name##_buf[_depth*sizeof(_type)];              \
+  osal_queue_def_t _name = {                              \
+    .interrupt_set = _int_set,                            \
+    .ff = TU_FIFO_INIT(_name##_buf, _depth, _type, false) \
+  }
+
+// lock queue by disable USB interrupt
+static inline void _osal_q_lock(osal_queue_t qhdl)
+{
+  // disable dcd/hcd interrupt
+  qhdl->interrupt_set(false);
+}
+
+// unlock queue
+static inline void _osal_q_unlock(osal_queue_t qhdl)
+{
+  // enable dcd/hcd interrupt
+  qhdl->interrupt_set(true);
+}
+
+static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
+{
+  tu_fifo_clear(&qdef->ff);
+  return (osal_queue_t) qdef;
+}
+
+static inline bool osal_queue_receive(osal_queue_t qhdl, void* data)
+{
+  _osal_q_lock(qhdl);
+  bool success = tu_fifo_read(&qhdl->ff, data);
+  _osal_q_unlock(qhdl);
+
+  return success;
+}
+
+static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
+{
+  if (!in_isr) {
+    _osal_q_lock(qhdl);
+  }
+
+  bool success = tu_fifo_write(&qhdl->ff, data);
+
+  if (!in_isr) {
+    _osal_q_unlock(qhdl);
+  }
+
+  TU_ASSERT(success);
+
+  return success;
+}
+
+static inline bool osal_queue_empty(osal_queue_t qhdl)
+{
+  // Skip queue lock/unlock since this function is primarily called
+  // with interrupt disabled before going into low power mode
+  return tu_fifo_empty(&qhdl->ff);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_OSAL_NONE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_pico.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_pico.h
new file mode 100644
index 00000000000..70432d22b5f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_pico.h
@@ -0,0 +1,187 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_OSAL_PICO_H_
+#define _TUSB_OSAL_PICO_H_
+
+#include "pico/time.h"
+#include "pico/sem.h"
+#include "pico/mutex.h"
+#include "pico/critical_section.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+static inline void osal_task_delay(uint32_t msec)
+{
+  sleep_ms(msec);
+}
+
+//--------------------------------------------------------------------+
+// Binary Semaphore API
+//--------------------------------------------------------------------+
+typedef struct semaphore osal_semaphore_def_t, *osal_semaphore_t;
+
+static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef)
+{
+  sem_init(semdef, 0, 255);
+  return semdef;
+}
+
+static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr)
+{
+  (void) in_isr;
+  sem_release(sem_hdl);
+  return true;
+}
+
+static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec)
+{
+  return sem_acquire_timeout_ms(sem_hdl, msec);
+}
+
+static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl)
+{
+  sem_reset(sem_hdl, 0);
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API
+// Within tinyusb, mutex is never used in ISR context
+//--------------------------------------------------------------------+
+typedef struct mutex osal_mutex_def_t, *osal_mutex_t;
+
+static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef)
+{
+    mutex_init(mdef);
+    return mdef;
+}
+
+static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec)
+{
+    return mutex_enter_timeout_ms(mutex_hdl, msec);
+}
+
+static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
+{
+    mutex_exit(mutex_hdl);
+    return true;
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+#include "common/tusb_fifo.h"
+
+#if CFG_TUH_ENABLED
+extern void hcd_int_disable(uint8_t rhport);
+extern void hcd_int_enable(uint8_t rhport);
+#endif
+
+typedef struct
+{
+    tu_fifo_t ff;
+    struct critical_section critsec; // osal_queue may be used in IRQs, so need critical section
+} osal_queue_def_t;
+
+typedef osal_queue_def_t* osal_queue_t;
+
+// role device/host is used by OS NONE for mutex (disable usb isr) only
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type)       \
+  uint8_t _name##_buf[_depth*sizeof(_type)];              \
+  osal_queue_def_t _name = {                              \
+    .ff = TU_FIFO_INIT(_name##_buf, _depth, _type, false) \
+  }
+
+// lock queue by disable USB interrupt
+static inline void _osal_q_lock(osal_queue_t qhdl)
+{
+    critical_section_enter_blocking(&qhdl->critsec);
+}
+
+// unlock queue
+static inline void _osal_q_unlock(osal_queue_t qhdl)
+{
+    critical_section_exit(&qhdl->critsec);
+}
+
+static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
+{
+  critical_section_init(&qdef->critsec);
+  tu_fifo_clear(&qdef->ff);
+  return (osal_queue_t) qdef;
+}
+
+static inline bool osal_queue_receive(osal_queue_t qhdl, void* data)
+{
+  // TODO: revisit... docs say that mutexes are never used from IRQ context,
+  //  however osal_queue_recieve may be. therefore my assumption is that
+  //  the fifo mutex is not populated for queues used from an IRQ context
+  //assert(!qhdl->ff.mutex);
+
+  _osal_q_lock(qhdl);
+  bool success = tu_fifo_read(&qhdl->ff, data);
+  _osal_q_unlock(qhdl);
+
+  return success;
+}
+
+static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
+{
+  // TODO: revisit... docs say that mutexes are never used from IRQ context,
+  //  however osal_queue_recieve may be. therefore my assumption is that
+  //  the fifo mutex is not populated for queues used from an IRQ context
+  //assert(!qhdl->ff.mutex);
+  (void) in_isr;
+
+  _osal_q_lock(qhdl);
+  bool success = tu_fifo_write(&qhdl->ff, data);
+  _osal_q_unlock(qhdl);
+
+  TU_ASSERT(success);
+
+  return success;
+}
+
+static inline bool osal_queue_empty(osal_queue_t qhdl)
+{
+  // TODO: revisit; whether this is true or not currently, tu_fifo_empty is a single
+  //  volatile read.
+
+  // Skip queue lock/unlock since this function is primarily called
+  // with interrupt disabled before going into low power mode
+  return tu_fifo_empty(&qhdl->ff);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_OSAL_PICO_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_rtthread.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_rtthread.h
new file mode 100644
index 00000000000..0845175b852
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_rtthread.h
@@ -0,0 +1,130 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 tfx2001 (2479727366@qq.com)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_OSAL_RTTHREAD_H_
+#define _TUSB_OSAL_RTTHREAD_H_
+
+// RT-Thread Headers
+#include "rtthread.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+static inline void osal_task_delay(uint32_t msec) {
+  rt_thread_mdelay(msec);
+}
+
+//--------------------------------------------------------------------+
+// Semaphore API
+//--------------------------------------------------------------------+
+typedef struct rt_semaphore osal_semaphore_def_t;
+typedef rt_sem_t osal_semaphore_t;
+
+static inline osal_semaphore_t
+osal_semaphore_create(osal_semaphore_def_t *semdef) {
+    rt_sem_init(semdef, "tusb", 0, RT_IPC_FLAG_FIFO);
+    return semdef;
+}
+
+static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
+    (void) in_isr;
+    return rt_sem_release(sem_hdl) == RT_EOK;
+}
+
+static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
+    return rt_sem_take(sem_hdl, rt_tick_from_millisecond(msec)) == RT_EOK;
+}
+
+static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) {
+    // TODO: implement
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API (priority inheritance)
+//--------------------------------------------------------------------+
+typedef struct rt_mutex osal_mutex_def_t;
+typedef rt_mutex_t osal_mutex_t;
+
+static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t *mdef) {
+    rt_mutex_init(mdef, "tusb", RT_IPC_FLAG_FIFO);
+    return mdef;
+}
+
+static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) {
+    return rt_mutex_take(mutex_hdl, rt_tick_from_millisecond(msec)) == RT_EOK;
+}
+
+static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) {
+    return rt_mutex_release(mutex_hdl) == RT_EOK;
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+
+// role device/host is used by OS NONE for mutex (disable usb isr) only
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
+    static _type _name##_##buf[_depth]; \
+    osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf };
+
+typedef struct {
+    uint16_t depth;
+    uint16_t item_sz;
+    void *buf;
+
+    struct rt_messagequeue sq;
+} osal_queue_def_t;
+
+typedef rt_mq_t osal_queue_t;
+
+static inline osal_queue_t osal_queue_create(osal_queue_def_t *qdef) {
+    rt_mq_init(&(qdef->sq), "tusb", qdef->buf, qdef->item_sz,
+               qdef->item_sz * qdef->depth, RT_IPC_FLAG_FIFO);
+    return &(qdef->sq);
+}
+
+static inline bool osal_queue_receive(osal_queue_t qhdl, void *data) {
+    return rt_mq_recv(qhdl, data, qhdl->msg_size, RT_WAITING_FOREVER) == RT_EOK;
+}
+
+static inline bool osal_queue_send(osal_queue_t qhdl, void const *data, bool in_isr) {
+    (void) in_isr;
+    return rt_mq_send(qhdl, (void *)data, qhdl->msg_size) == RT_EOK;
+}
+
+static inline bool osal_queue_empty(osal_queue_t qhdl) {
+    return (qhdl->entry) == 0;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TUSB_OSAL_RTTHREAD_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_rtx4.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_rtx4.h
new file mode 100644
index 00000000000..1856a5d9a68
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/osal/osal_rtx4.h
@@ -0,0 +1,170 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Tian Yunhao (t123yh)
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_OSAL_RTX4_H_
+#define _TUSB_OSAL_RTX4_H_
+
+#include <rtl.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+static inline void osal_task_delay(uint32_t msec)
+{
+  uint16_t hi = msec >> 16;
+  uint16_t lo = msec;
+  while (hi--) {
+    os_dly_wait(0xFFFE);
+  }
+  os_dly_wait(lo);
+}
+
+static inline uint16_t msec2wait(uint32_t msec) {
+  if (msec == OSAL_TIMEOUT_WAIT_FOREVER)
+    return 0xFFFF;
+  else if (msec >= 0xFFFE)
+    return 0xFFFE;
+  else
+    return msec;
+}
+
+//--------------------------------------------------------------------+
+// Semaphore API
+//--------------------------------------------------------------------+
+typedef OS_SEM osal_semaphore_def_t;
+typedef OS_ID osal_semaphore_t;
+
+static inline OS_ID osal_semaphore_create(osal_semaphore_def_t* semdef) {
+  os_sem_init(semdef, 0);
+  return semdef;
+}
+
+static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
+  if ( !in_isr ) {
+    os_sem_send(sem_hdl);
+  } else {
+    isr_sem_send(sem_hdl);
+  }
+	return true;
+}
+
+static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) {
+  return os_sem_wait(sem_hdl, msec2wait(msec)) != OS_R_TMO;
+}
+
+static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) {
+  // TODO: implement
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API (priority inheritance)
+//--------------------------------------------------------------------+
+typedef OS_MUT osal_mutex_def_t;
+typedef OS_ID osal_mutex_t;
+
+static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef)
+{
+  os_mut_init(mdef);
+  return mdef;
+}
+
+static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec)
+{
+  return os_mut_wait(mutex_hdl, msec2wait(msec)) != OS_R_TMO;
+}
+
+static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
+{
+  return os_mut_release(mutex_hdl) == OS_R_OK;
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+
+// role device/host is used by OS NONE for mutex (disable usb isr) only
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type)   \
+  os_mbx_declare(_name##__mbox, _depth);              \
+  _declare_box(_name##__pool, sizeof(_type), _depth); \
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .pool = _name##__pool, .mbox = _name##__mbox };
+  
+
+typedef struct
+{
+  uint16_t depth;
+  uint16_t item_sz;
+  U32* pool;
+  U32* mbox;
+}osal_queue_def_t;
+
+typedef osal_queue_def_t* osal_queue_t;
+
+static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
+{
+  os_mbx_init(qdef->mbox, (qdef->depth + 4) * 4);
+  _init_box(qdef->pool, ((qdef->item_sz+3)/4)*(qdef->depth) + 3, qdef->item_sz);
+  return qdef;
+}
+
+static inline bool osal_queue_receive(osal_queue_t qhdl, void* data)
+{
+  void* buf;
+  os_mbx_wait(qhdl->mbox, &buf, 0xFFFF);
+  memcpy(data, buf, qhdl->item_sz);
+  _free_box(qhdl->pool, buf);
+  return true;
+}
+
+static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
+{
+  void* buf = _alloc_box(qhdl->pool);
+  memcpy(buf, data, qhdl->item_sz);
+  if ( !in_isr )
+  {
+    os_mbx_send(qhdl->mbox, buf, 0xFFFF);
+  }
+  else
+  {
+    isr_mbx_send(qhdl->mbox, buf);
+  }
+  return true;
+}
+
+static inline bool osal_queue_empty(osal_queue_t qhdl)
+{
+  return os_mbx_check(qhdl->mbox) == qhdl->depth;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/broadcom/synopsys/synopsys_common.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/broadcom/synopsys/synopsys_common.h
new file mode 100644
index 00000000000..81ce3b4a945
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/broadcom/synopsys/synopsys_common.h
@@ -0,0 +1,1476 @@
+/**
+  ******************************************************************************
+  * @file    synopsys_common.h
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M3 Device USB OTG peripheral Header File. 
+  *          This file contains the USB OTG peripheral register's definitions, bits 
+  *          definitions and memory mapping for STM32F1xx devices.
+  *            
+  *          This file contains:
+  *           - Data structures and the address mapping for the USB OTG peripheral
+  *           - The Peripheral's registers declarations and bits definition
+  *           - Macros to access the peripheral's registers hardware
+  *  
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+#include "stdint.h"
+
+#pragma once
+
+#ifdef __cplusplus
+  #define   __I   volatile
+#else
+  #define   __I   volatile const
+#endif
+#define     __O   volatile
+#define     __IO  volatile
+#define     __IM  volatile const
+#define     __OM  volatile
+#define     __IOM volatile
+
+/** 
+  * @brief __USB_OTG_Core_register
+  */
+
+typedef struct
+{
+  __IO uint32_t GOTGCTL;              /*!<  USB_OTG Control and Status Register       Address offset: 000h */
+  __IO uint32_t GOTGINT;              /*!<  USB_OTG Interrupt Register                Address offset: 004h */
+  __IO uint32_t GAHBCFG;              /*!<  Core AHB Configuration Register           Address offset: 008h */
+  __IO uint32_t GUSBCFG;              /*!<  Core USB Configuration Register           Address offset: 00Ch */
+  __IO uint32_t GRSTCTL;              /*!<  Core Reset Register                       Address offset: 010h */
+  __IO uint32_t GINTSTS;              /*!<  Core Interrupt Register                   Address offset: 014h */
+  __IO uint32_t GINTMSK;              /*!<  Core Interrupt Mask Register              Address offset: 018h */
+  __IO uint32_t GRXSTSR;              /*!<  Receive Sts Q Read Register               Address offset: 01Ch */
+  __IO uint32_t GRXSTSP;              /*!<  Receive Sts Q Read & POP Register         Address offset: 020h */
+  __IO uint32_t GRXFSIZ;              /*!< Receive FIFO Size Register                 Address offset: 024h */
+  __IO uint32_t DIEPTXF0_HNPTXFSIZ;   /*!<  EP0 / Non Periodic Tx FIFO Size Register  Address offset: 028h */
+  __IO uint32_t HNPTXSTS;             /*!<  Non Periodic Tx FIFO/Queue Sts reg        Address offset: 02Ch */
+  uint32_t Reserved30[2];             /*!< Reserved 030h*/
+  __IO uint32_t GCCFG;                /*!< General Purpose IO Register                Address offset: 038h */
+  __IO uint32_t CID;                  /*!< User ID Register                             03Ch */
+  __IO uint32_t GSNPSID;              /* USB_OTG core ID                                040h*/
+  __IO uint32_t GHWCFG1;              /* User HW config1                                044h*/
+  __IO uint32_t GHWCFG2;              /* User HW config2                                048h*/
+  __IO uint32_t GHWCFG3;              /*!< User HW config3                              04Ch */
+  uint32_t  Reserved6;                /*!< Reserved                                     050h */
+  __IO uint32_t GLPMCFG;              /*!< LPM Register                                 054h */
+  __IO uint32_t GPWRDN;               /*!< Power Down Register                          058h */
+  __IO uint32_t GDFIFOCFG;            /*!< DFIFO Software Config Register               05Ch */
+   __IO uint32_t GADPCTL;             /*!< ADP Timer, Control and Status Register       60Ch */
+    uint32_t  Reserved43[39];         /*!< Reserved                                058h-0FFh */
+  __IO uint32_t HPTXFSIZ;             /*!< Host Periodic Tx FIFO Size Reg             Address offset: 100h */
+  __IO uint32_t DIEPTXF[0x0F];        /*!< dev Periodic Transmit FIFO                 Address offset: 0x104 */
+} USB_OTG_GlobalTypeDef;
+
+
+
+/** 
+  * @brief __device_Registers
+  */
+
+typedef struct 
+{
+  __IO uint32_t DCFG;                 /*!< dev Configuration Register                 Address offset: 800h*/
+  __IO uint32_t DCTL;                 /*!< dev Control Register                       Address offset: 804h*/
+  __IO uint32_t DSTS;                 /*!< dev Status Register (RO)                   Address offset: 808h*/
+  uint32_t Reserved0C;                /*!< Reserved 80Ch*/
+  __IO uint32_t DIEPMSK;              /*!< dev IN Endpoint Mask                       Address offset: 810h*/
+  __IO uint32_t DOEPMSK;              /*!< dev OUT Endpoint Mask                      Address offset: 814h*/
+  __IO uint32_t DAINT;                /*!< dev All Endpoints Itr Reg                  Address offset: 818h*/
+  __IO uint32_t DAINTMSK;             /*!< dev All Endpoints Itr Mask                 Address offset: 81Ch*/
+  uint32_t  Reserved20;               /*!< Reserved 820h*/
+  uint32_t Reserved9;                 /*!< Reserved 824h*/
+  __IO uint32_t DVBUSDIS;             /*!< dev VBUS discharge Register                Address offset: 828h*/
+  __IO uint32_t DVBUSPULSE;           /*!< dev VBUS Pulse Register                    Address offset: 82Ch*/
+  __IO uint32_t DTHRCTL;              /*!< dev thr                                    Address offset: 830h*/
+  __IO uint32_t DIEPEMPMSK;           /*!< dev empty msk                              Address offset: 834h*/
+  __IO uint32_t DEACHINT;             /*!< dedicated EP interrupt                     Address offset: 838h*/
+  __IO uint32_t DEACHMSK;             /*!< dedicated EP msk                           Address offset: 83Ch*/  
+  uint32_t Reserved40;                /*!< dedicated EP mask                          Address offset: 840h*/
+  __IO uint32_t DINEP1MSK;            /*!< dedicated EP mask                          Address offset: 844h*/
+  uint32_t  Reserved44[15];           /*!< Reserved 844-87Ch*/
+  __IO uint32_t DOUTEP1MSK;           /*!< dedicated EP msk                           Address offset: 884h*/
+} USB_OTG_DeviceTypeDef;
+
+/** 
+  * @brief __IN_Endpoint-Specific_Register
+  */
+
+typedef struct 
+{
+  __IO uint32_t DIEPCTL;              /*!< dev IN Endpoint Control Reg                900h + (ep_num * 20h) + 00h*/
+  uint32_t Reserved04;                /*!< Reserved                                   900h + (ep_num * 20h) + 04h*/
+  __IO uint32_t DIEPINT;              /*!< dev IN Endpoint Itr Reg                    900h + (ep_num * 20h) + 08h*/
+  uint32_t Reserved0C;                /*!< Reserved                                   900h + (ep_num * 20h) + 0Ch*/
+  __IO uint32_t DIEPTSIZ;             /*!< IN Endpoint Txfer Size                     900h + (ep_num * 20h) + 10h*/
+  __IO uint32_t DIEPDMA;              /*!< IN Endpoint DMA Address Reg                900h + (ep_num * 20h) + 14h*/
+  __IO uint32_t DTXFSTS;              /*!< IN Endpoint Tx FIFO Status Reg             900h + (ep_num * 20h) + 18h*/
+  uint32_t Reserved18;                /*!< Reserved                                   900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/
+} USB_OTG_INEndpointTypeDef;
+
+/** 
+  * @brief __OUT_Endpoint-Specific_Registers
+  */
+
+typedef struct 
+{
+  __IO uint32_t DOEPCTL;              /*!< dev OUT Endpoint Control Reg               B00h + (ep_num * 20h) + 00h*/
+  uint32_t Reserved04;                /*!< Reserved                                   B00h + (ep_num * 20h) + 04h*/
+  __IO uint32_t DOEPINT;              /*!< dev OUT Endpoint Itr Reg                   B00h + (ep_num * 20h) + 08h*/
+  uint32_t Reserved0C;                /*!< Reserved                                   B00h + (ep_num * 20h) + 0Ch*/
+  __IO uint32_t DOEPTSIZ;             /*!< dev OUT Endpoint Txfer Size                B00h + (ep_num * 20h) + 10h*/
+  __IO uint32_t DOEPDMA;              /*!< dev OUT Endpoint DMA Address               B00h + (ep_num * 20h) + 14h*/
+  uint32_t Reserved18[2];             /*!< Reserved                                   B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/
+} USB_OTG_OUTEndpointTypeDef;
+
+/** 
+  * @brief __Host_Mode_Register_Structures
+  */
+
+typedef struct 
+{
+  __IO uint32_t HCFG;                 /*!< Host Configuration Register    400h*/
+  __IO uint32_t HFIR;                 /*!< Host Frame Interval Register   404h*/
+  __IO uint32_t HFNUM;                /*!< Host Frame Nbr/Frame Remaining 408h*/
+  uint32_t Reserved40C;               /*!< Reserved                       40Ch*/
+  __IO uint32_t HPTXSTS;              /*!< Host Periodic Tx FIFO/ Queue Status 410h*/
+  __IO uint32_t HAINT;                /*!< Host All Channels Interrupt Register 414h*/
+  __IO uint32_t HAINTMSK;             /*!< Host All Channels Interrupt Mask 418h*/
+} USB_OTG_HostTypeDef;
+
+/** 
+  * @brief __Host_Channel_Specific_Registers
+  */
+
+typedef struct
+{
+  __IO uint32_t HCCHAR;
+  __IO uint32_t HCSPLT;
+  __IO uint32_t HCINT;
+  __IO uint32_t HCINTMSK;
+  __IO uint32_t HCTSIZ;
+  __IO uint32_t HCDMA;
+  uint32_t Reserved[2];
+} USB_OTG_HostChannelTypeDef;
+
+/*!< USB registers base address */
+#define USB_OTG_FS_PERIPH_BASE               0x50000000UL
+
+// #define USB_OTG_GLOBAL_BASE                  0x00000000UL
+// #define USB_OTG_DEVICE_BASE                  0x00000800UL
+#define USB_OTG_IN_ENDPOINT_BASE             0x00000900UL
+#define USB_OTG_OUT_ENDPOINT_BASE            0x00000B00UL
+#define USB_OTG_EP_REG_SIZE                  0x00000020UL
+// #define USB_OTG_HOST_BASE                    0x00000400UL
+#define USB_OTG_HOST_PORT_BASE               0x00000440UL
+#define USB_OTG_HOST_CHANNEL_BASE            0x00000500UL
+#define USB_OTG_HOST_CHANNEL_SIZE            0x00000020UL
+#define USB_OTG_PCGCCTL_BASE                 0x00000E00UL
+#define USB_OTG_FIFO_BASE                    0x00001000UL
+#define USB_OTG_FIFO_SIZE                    0x00001000UL
+
+/******************************************************************************/
+/*                                                                            */
+/*                                 USB_OTG                                    */
+/*                                                                            */
+/******************************************************************************/
+/********************  Bit definition for USB_OTG_GOTGCTL register  ***********/
+#define USB_OTG_GOTGCTL_SRQSCS_Pos              (0U)                           
+#define USB_OTG_GOTGCTL_SRQSCS_Msk              (0x1UL << USB_OTG_GOTGCTL_SRQSCS_Pos) /*!< 0x00000001 */
+#define USB_OTG_GOTGCTL_SRQSCS                  USB_OTG_GOTGCTL_SRQSCS_Msk     /*!< Session request success */
+#define USB_OTG_GOTGCTL_SRQ_Pos                 (1U)                           
+#define USB_OTG_GOTGCTL_SRQ_Msk                 (0x1UL << USB_OTG_GOTGCTL_SRQ_Pos) /*!< 0x00000002 */
+#define USB_OTG_GOTGCTL_SRQ                     USB_OTG_GOTGCTL_SRQ_Msk        /*!< Session request */
+#define USB_OTG_GOTGCTL_HNGSCS_Pos              (8U)                           
+#define USB_OTG_GOTGCTL_HNGSCS_Msk              (0x1UL << USB_OTG_GOTGCTL_HNGSCS_Pos) /*!< 0x00000100 */
+#define USB_OTG_GOTGCTL_HNGSCS                   USB_OTG_GOTGCTL_HNGSCS_Msk    /*!< Host set HNP enable */
+#define USB_OTG_GOTGCTL_HNPRQ_Pos               (9U)                           
+#define USB_OTG_GOTGCTL_HNPRQ_Msk               (0x1UL << USB_OTG_GOTGCTL_HNPRQ_Pos) /*!< 0x00000200 */
+#define USB_OTG_GOTGCTL_HNPRQ                   USB_OTG_GOTGCTL_HNPRQ_Msk      /*!< HNP request */
+#define USB_OTG_GOTGCTL_HSHNPEN_Pos             (10U)                          
+#define USB_OTG_GOTGCTL_HSHNPEN_Msk             (0x1UL << USB_OTG_GOTGCTL_HSHNPEN_Pos) /*!< 0x00000400 */
+#define USB_OTG_GOTGCTL_HSHNPEN                 USB_OTG_GOTGCTL_HSHNPEN_Msk    /*!< Host set HNP enable */
+#define USB_OTG_GOTGCTL_DHNPEN_Pos              (11U)                          
+#define USB_OTG_GOTGCTL_DHNPEN_Msk              (0x1UL << USB_OTG_GOTGCTL_DHNPEN_Pos) /*!< 0x00000800 */
+#define USB_OTG_GOTGCTL_DHNPEN                  USB_OTG_GOTGCTL_DHNPEN_Msk     /*!< Device HNP enabled */
+#define USB_OTG_GOTGCTL_CIDSTS_Pos              (16U)                          
+#define USB_OTG_GOTGCTL_CIDSTS_Msk              (0x1UL << USB_OTG_GOTGCTL_CIDSTS_Pos) /*!< 0x00010000 */
+#define USB_OTG_GOTGCTL_CIDSTS                  USB_OTG_GOTGCTL_CIDSTS_Msk     /*!< Connector ID status */
+#define USB_OTG_GOTGCTL_DBCT_Pos                (17U)                          
+#define USB_OTG_GOTGCTL_DBCT_Msk                (0x1UL << USB_OTG_GOTGCTL_DBCT_Pos) /*!< 0x00020000 */
+#define USB_OTG_GOTGCTL_DBCT                    USB_OTG_GOTGCTL_DBCT_Msk       /*!< Long/short debounce time */
+#define USB_OTG_GOTGCTL_ASVLD_Pos               (18U)                          
+#define USB_OTG_GOTGCTL_ASVLD_Msk               (0x1UL << USB_OTG_GOTGCTL_ASVLD_Pos) /*!< 0x00040000 */
+#define USB_OTG_GOTGCTL_ASVLD                   USB_OTG_GOTGCTL_ASVLD_Msk      /*!< A-session valid */
+#define USB_OTG_GOTGCTL_BSVLD_Pos               (19U)                          
+#define USB_OTG_GOTGCTL_BSVLD_Msk               (0x1UL << USB_OTG_GOTGCTL_BSVLD_Pos) /*!< 0x00080000 */
+#define USB_OTG_GOTGCTL_BSVLD                   USB_OTG_GOTGCTL_BSVLD_Msk      /*!< B-session valid */
+
+/********************  Bit definition for USB_OTG_HCFG register  ********************/
+
+#define USB_OTG_HCFG_FSLSPCS_Pos                (0U)                           
+#define USB_OTG_HCFG_FSLSPCS_Msk                (0x3UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000003 */
+#define USB_OTG_HCFG_FSLSPCS                    USB_OTG_HCFG_FSLSPCS_Msk       /*!< FS/LS PHY clock select */
+#define USB_OTG_HCFG_FSLSPCS_0                  (0x1UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000001 */
+#define USB_OTG_HCFG_FSLSPCS_1                  (0x2UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000002 */
+#define USB_OTG_HCFG_FSLSS_Pos                  (2U)                           
+#define USB_OTG_HCFG_FSLSS_Msk                  (0x1UL << USB_OTG_HCFG_FSLSS_Pos) /*!< 0x00000004 */
+#define USB_OTG_HCFG_FSLSS                      USB_OTG_HCFG_FSLSS_Msk         /*!< FS- and LS-only support */
+
+/********************  Bit definition for USB_OTG_DCFG register  ********************/
+
+#define USB_OTG_DCFG_DSPD_Pos                   (0U)                           
+#define USB_OTG_DCFG_DSPD_Msk                   (0x3UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000003 */
+#define USB_OTG_DCFG_DSPD                       USB_OTG_DCFG_DSPD_Msk          /*!< Device speed */
+#define USB_OTG_DCFG_DSPD_0                     (0x1UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000001 */
+#define USB_OTG_DCFG_DSPD_1                     (0x2UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000002 */
+#define USB_OTG_DCFG_NZLSOHSK_Pos               (2U)                           
+#define USB_OTG_DCFG_NZLSOHSK_Msk               (0x1UL << USB_OTG_DCFG_NZLSOHSK_Pos) /*!< 0x00000004 */
+#define USB_OTG_DCFG_NZLSOHSK                   USB_OTG_DCFG_NZLSOHSK_Msk      /*!< Nonzero-length status OUT handshake */
+
+#define USB_OTG_DCFG_DAD_Pos                    (4U)                           
+#define USB_OTG_DCFG_DAD_Msk                    (0x7FUL << USB_OTG_DCFG_DAD_Pos) /*!< 0x000007F0 */
+#define USB_OTG_DCFG_DAD                        USB_OTG_DCFG_DAD_Msk           /*!< Device address */
+#define USB_OTG_DCFG_DAD_0                      (0x01UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000010 */
+#define USB_OTG_DCFG_DAD_1                      (0x02UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000020 */
+#define USB_OTG_DCFG_DAD_2                      (0x04UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000040 */
+#define USB_OTG_DCFG_DAD_3                      (0x08UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000080 */
+#define USB_OTG_DCFG_DAD_4                      (0x10UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000100 */
+#define USB_OTG_DCFG_DAD_5                      (0x20UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000200 */
+#define USB_OTG_DCFG_DAD_6                      (0x40UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000400 */
+
+#define USB_OTG_DCFG_PFIVL_Pos                  (11U)                          
+#define USB_OTG_DCFG_PFIVL_Msk                  (0x3UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001800 */
+#define USB_OTG_DCFG_PFIVL                      USB_OTG_DCFG_PFIVL_Msk         /*!< Periodic (micro)frame interval */
+#define USB_OTG_DCFG_PFIVL_0                    (0x1UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00000800 */
+#define USB_OTG_DCFG_PFIVL_1                    (0x2UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001000 */
+
+#define USB_OTG_DCFG_PERSCHIVL_Pos              (24U)                          
+#define USB_OTG_DCFG_PERSCHIVL_Msk              (0x3UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x03000000 */
+#define USB_OTG_DCFG_PERSCHIVL                  USB_OTG_DCFG_PERSCHIVL_Msk     /*!< Periodic scheduling interval */
+#define USB_OTG_DCFG_PERSCHIVL_0                (0x1UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x01000000 */
+#define USB_OTG_DCFG_PERSCHIVL_1                (0x2UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x02000000 */
+
+/********************  Bit definition for USB_OTG_PCGCR register  ********************/
+#define USB_OTG_PCGCR_STPPCLK_Pos               (0U)                           
+#define USB_OTG_PCGCR_STPPCLK_Msk               (0x1UL << USB_OTG_PCGCR_STPPCLK_Pos) /*!< 0x00000001 */
+#define USB_OTG_PCGCR_STPPCLK                   USB_OTG_PCGCR_STPPCLK_Msk      /*!< Stop PHY clock */
+#define USB_OTG_PCGCR_GATEHCLK_Pos              (1U)                           
+#define USB_OTG_PCGCR_GATEHCLK_Msk              (0x1UL << USB_OTG_PCGCR_GATEHCLK_Pos) /*!< 0x00000002 */
+#define USB_OTG_PCGCR_GATEHCLK                  USB_OTG_PCGCR_GATEHCLK_Msk     /*!< Gate HCLK */
+#define USB_OTG_PCGCR_PHYSUSP_Pos               (4U)                           
+#define USB_OTG_PCGCR_PHYSUSP_Msk               (0x1UL << USB_OTG_PCGCR_PHYSUSP_Pos) /*!< 0x00000010 */
+#define USB_OTG_PCGCR_PHYSUSP                   USB_OTG_PCGCR_PHYSUSP_Msk      /*!< PHY suspended */
+
+/********************  Bit definition for USB_OTG_GOTGINT register  ********************/
+#define USB_OTG_GOTGINT_SEDET_Pos               (2U)                           
+#define USB_OTG_GOTGINT_SEDET_Msk               (0x1UL << USB_OTG_GOTGINT_SEDET_Pos) /*!< 0x00000004 */
+#define USB_OTG_GOTGINT_SEDET                   USB_OTG_GOTGINT_SEDET_Msk      /*!< Session end detected */
+#define USB_OTG_GOTGINT_SRSSCHG_Pos             (8U)                           
+#define USB_OTG_GOTGINT_SRSSCHG_Msk             (0x1UL << USB_OTG_GOTGINT_SRSSCHG_Pos) /*!< 0x00000100 */
+#define USB_OTG_GOTGINT_SRSSCHG                 USB_OTG_GOTGINT_SRSSCHG_Msk    /*!< Session request success status change */
+#define USB_OTG_GOTGINT_HNSSCHG_Pos             (9U)                           
+#define USB_OTG_GOTGINT_HNSSCHG_Msk             (0x1UL << USB_OTG_GOTGINT_HNSSCHG_Pos) /*!< 0x00000200 */
+#define USB_OTG_GOTGINT_HNSSCHG                 USB_OTG_GOTGINT_HNSSCHG_Msk    /*!< Host negotiation success status change */
+#define USB_OTG_GOTGINT_HNGDET_Pos              (17U)                          
+#define USB_OTG_GOTGINT_HNGDET_Msk              (0x1UL << USB_OTG_GOTGINT_HNGDET_Pos) /*!< 0x00020000 */
+#define USB_OTG_GOTGINT_HNGDET                  USB_OTG_GOTGINT_HNGDET_Msk     /*!< Host negotiation detected */
+#define USB_OTG_GOTGINT_ADTOCHG_Pos             (18U)                          
+#define USB_OTG_GOTGINT_ADTOCHG_Msk             (0x1UL << USB_OTG_GOTGINT_ADTOCHG_Pos) /*!< 0x00040000 */
+#define USB_OTG_GOTGINT_ADTOCHG                 USB_OTG_GOTGINT_ADTOCHG_Msk    /*!< A-device timeout change */
+#define USB_OTG_GOTGINT_DBCDNE_Pos              (19U)                          
+#define USB_OTG_GOTGINT_DBCDNE_Msk              (0x1UL << USB_OTG_GOTGINT_DBCDNE_Pos) /*!< 0x00080000 */
+#define USB_OTG_GOTGINT_DBCDNE                  USB_OTG_GOTGINT_DBCDNE_Msk     /*!< Debounce done */
+
+/********************  Bit definition for USB_OTG_DCTL register  ********************/
+#define USB_OTG_DCTL_RWUSIG_Pos                 (0U)                           
+#define USB_OTG_DCTL_RWUSIG_Msk                 (0x1UL << USB_OTG_DCTL_RWUSIG_Pos) /*!< 0x00000001 */
+#define USB_OTG_DCTL_RWUSIG                     USB_OTG_DCTL_RWUSIG_Msk        /*!< Remote wakeup signaling */
+#define USB_OTG_DCTL_SDIS_Pos                   (1U)                           
+#define USB_OTG_DCTL_SDIS_Msk                   (0x1UL << USB_OTG_DCTL_SDIS_Pos) /*!< 0x00000002 */
+#define USB_OTG_DCTL_SDIS                       USB_OTG_DCTL_SDIS_Msk          /*!< Soft disconnect */
+#define USB_OTG_DCTL_GINSTS_Pos                 (2U)                           
+#define USB_OTG_DCTL_GINSTS_Msk                 (0x1UL << USB_OTG_DCTL_GINSTS_Pos) /*!< 0x00000004 */
+#define USB_OTG_DCTL_GINSTS                     USB_OTG_DCTL_GINSTS_Msk        /*!< Global IN NAK status */
+#define USB_OTG_DCTL_GONSTS_Pos                 (3U)                           
+#define USB_OTG_DCTL_GONSTS_Msk                 (0x1UL << USB_OTG_DCTL_GONSTS_Pos) /*!< 0x00000008 */
+#define USB_OTG_DCTL_GONSTS                     USB_OTG_DCTL_GONSTS_Msk        /*!< Global OUT NAK status */
+
+#define USB_OTG_DCTL_TCTL_Pos                   (4U)                           
+#define USB_OTG_DCTL_TCTL_Msk                   (0x7UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000070 */
+#define USB_OTG_DCTL_TCTL                       USB_OTG_DCTL_TCTL_Msk          /*!< Test control */
+#define USB_OTG_DCTL_TCTL_0                     (0x1UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000010 */
+#define USB_OTG_DCTL_TCTL_1                     (0x2UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000020 */
+#define USB_OTG_DCTL_TCTL_2                     (0x4UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000040 */
+#define USB_OTG_DCTL_SGINAK_Pos                 (7U)                           
+#define USB_OTG_DCTL_SGINAK_Msk                 (0x1UL << USB_OTG_DCTL_SGINAK_Pos) /*!< 0x00000080 */
+#define USB_OTG_DCTL_SGINAK                     USB_OTG_DCTL_SGINAK_Msk        /*!< Set global IN NAK */
+#define USB_OTG_DCTL_CGINAK_Pos                 (8U)                           
+#define USB_OTG_DCTL_CGINAK_Msk                 (0x1UL << USB_OTG_DCTL_CGINAK_Pos) /*!< 0x00000100 */
+#define USB_OTG_DCTL_CGINAK                     USB_OTG_DCTL_CGINAK_Msk        /*!< Clear global IN NAK */
+#define USB_OTG_DCTL_SGONAK_Pos                 (9U)                           
+#define USB_OTG_DCTL_SGONAK_Msk                 (0x1UL << USB_OTG_DCTL_SGONAK_Pos) /*!< 0x00000200 */
+#define USB_OTG_DCTL_SGONAK                     USB_OTG_DCTL_SGONAK_Msk        /*!< Set global OUT NAK */
+#define USB_OTG_DCTL_CGONAK_Pos                 (10U)                          
+#define USB_OTG_DCTL_CGONAK_Msk                 (0x1UL << USB_OTG_DCTL_CGONAK_Pos) /*!< 0x00000400 */
+#define USB_OTG_DCTL_CGONAK                     USB_OTG_DCTL_CGONAK_Msk        /*!< Clear global OUT NAK */
+#define USB_OTG_DCTL_POPRGDNE_Pos               (11U)                          
+#define USB_OTG_DCTL_POPRGDNE_Msk               (0x1UL << USB_OTG_DCTL_POPRGDNE_Pos) /*!< 0x00000800 */
+#define USB_OTG_DCTL_POPRGDNE                   USB_OTG_DCTL_POPRGDNE_Msk      /*!< Power-on programming done */
+
+/********************  Bit definition for USB_OTG_HFIR register  ********************/
+#define USB_OTG_HFIR_FRIVL_Pos                  (0U)                           
+#define USB_OTG_HFIR_FRIVL_Msk                  (0xFFFFUL << USB_OTG_HFIR_FRIVL_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HFIR_FRIVL                      USB_OTG_HFIR_FRIVL_Msk         /*!< Frame interval */
+
+/********************  Bit definition for USB_OTG_HFNUM register  ********************/
+#define USB_OTG_HFNUM_FRNUM_Pos                 (0U)                           
+#define USB_OTG_HFNUM_FRNUM_Msk                 (0xFFFFUL << USB_OTG_HFNUM_FRNUM_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HFNUM_FRNUM                     USB_OTG_HFNUM_FRNUM_Msk        /*!< Frame number */
+#define USB_OTG_HFNUM_FTREM_Pos                 (16U)                          
+#define USB_OTG_HFNUM_FTREM_Msk                 (0xFFFFUL << USB_OTG_HFNUM_FTREM_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_HFNUM_FTREM                     USB_OTG_HFNUM_FTREM_Msk        /*!< Frame time remaining */
+
+/********************  Bit definition for USB_OTG_DSTS register  ********************/
+#define USB_OTG_DSTS_SUSPSTS_Pos                (0U)                           
+#define USB_OTG_DSTS_SUSPSTS_Msk                (0x1UL << USB_OTG_DSTS_SUSPSTS_Pos) /*!< 0x00000001 */
+#define USB_OTG_DSTS_SUSPSTS                    USB_OTG_DSTS_SUSPSTS_Msk       /*!< Suspend status */
+
+#define USB_OTG_DSTS_ENUMSPD_Pos                (1U)                           
+#define USB_OTG_DSTS_ENUMSPD_Msk                (0x3UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000006 */
+#define USB_OTG_DSTS_ENUMSPD                    USB_OTG_DSTS_ENUMSPD_Msk       /*!< Enumerated speed */
+#define USB_OTG_DSTS_ENUMSPD_0                  (0x1UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000002 */
+#define USB_OTG_DSTS_ENUMSPD_1                  (0x2UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000004 */
+#define USB_OTG_DSTS_EERR_Pos                   (3U)                           
+#define USB_OTG_DSTS_EERR_Msk                   (0x1UL << USB_OTG_DSTS_EERR_Pos) /*!< 0x00000008 */
+#define USB_OTG_DSTS_EERR                       USB_OTG_DSTS_EERR_Msk          /*!< Erratic error */
+#define USB_OTG_DSTS_FNSOF_Pos                  (8U)                           
+#define USB_OTG_DSTS_FNSOF_Msk                  (0x3FFFUL << USB_OTG_DSTS_FNSOF_Pos) /*!< 0x003FFF00 */
+#define USB_OTG_DSTS_FNSOF                      USB_OTG_DSTS_FNSOF_Msk         /*!< Frame number of the received SOF */
+
+/********************  Bit definition for USB_OTG_GAHBCFG register  ********************/
+#define USB_OTG_GAHBCFG_GINT_Pos                (0U)                           
+#define USB_OTG_GAHBCFG_GINT_Msk                (0x1UL << USB_OTG_GAHBCFG_GINT_Pos) /*!< 0x00000001 */
+#define USB_OTG_GAHBCFG_GINT                    USB_OTG_GAHBCFG_GINT_Msk       /*!< Global interrupt mask */
+#define USB_OTG_GAHBCFG_HBSTLEN_Pos             (1U)                           
+#define USB_OTG_GAHBCFG_HBSTLEN_Msk             (0xFUL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< 0x0000001E */
+#define USB_OTG_GAHBCFG_HBSTLEN                 USB_OTG_GAHBCFG_HBSTLEN_Msk    /*!< Burst length/type */
+#define USB_OTG_GAHBCFG_HBSTLEN_0                (0x0UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< Single */
+#define USB_OTG_GAHBCFG_HBSTLEN_1                (0x1UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR */
+#define USB_OTG_GAHBCFG_HBSTLEN_2                (0x3UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR4 */
+#define USB_OTG_GAHBCFG_HBSTLEN_3                (0x5UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR8 */
+#define USB_OTG_GAHBCFG_HBSTLEN_4                (0x7UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR16 */
+#define USB_OTG_GAHBCFG_DMAEN_Pos               (5U)                           
+#define USB_OTG_GAHBCFG_DMAEN_Msk               (0x1UL << USB_OTG_GAHBCFG_DMAEN_Pos) /*!< 0x00000020 */
+#define USB_OTG_GAHBCFG_DMAEN                   USB_OTG_GAHBCFG_DMAEN_Msk      /*!< DMA enable */
+#define USB_OTG_GAHBCFG_TXFELVL_Pos             (7U)                           
+#define USB_OTG_GAHBCFG_TXFELVL_Msk             (0x1UL << USB_OTG_GAHBCFG_TXFELVL_Pos) /*!< 0x00000080 */
+#define USB_OTG_GAHBCFG_TXFELVL                 USB_OTG_GAHBCFG_TXFELVL_Msk    /*!< TxFIFO empty level */
+#define USB_OTG_GAHBCFG_PTXFELVL_Pos            (8U)                           
+#define USB_OTG_GAHBCFG_PTXFELVL_Msk            (0x1UL << USB_OTG_GAHBCFG_PTXFELVL_Pos) /*!< 0x00000100 */
+#define USB_OTG_GAHBCFG_PTXFELVL                USB_OTG_GAHBCFG_PTXFELVL_Msk   /*!< Periodic TxFIFO empty level */
+
+/********************  Bit definition for USB_OTG_GUSBCFG register  ********************/
+
+#define USB_OTG_GUSBCFG_TOCAL_Pos               (0U)                           
+#define USB_OTG_GUSBCFG_TOCAL_Msk               (0x7UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000007 */
+#define USB_OTG_GUSBCFG_TOCAL                   USB_OTG_GUSBCFG_TOCAL_Msk      /*!< FS timeout calibration */
+#define USB_OTG_GUSBCFG_TOCAL_0                 (0x1UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000001 */
+#define USB_OTG_GUSBCFG_TOCAL_1                 (0x2UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000002 */
+#define USB_OTG_GUSBCFG_TOCAL_2                 (0x4UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000004 */
+#define USB_OTG_GUSBCFG_PHYSEL_Pos              (6U)                           
+#define USB_OTG_GUSBCFG_PHYSEL_Msk              (0x1UL << USB_OTG_GUSBCFG_PHYSEL_Pos) /*!< 0x00000040 */
+#define USB_OTG_GUSBCFG_PHYSEL                  USB_OTG_GUSBCFG_PHYSEL_Msk     /*!< USB 2.0 high-speed ULPI PHY or USB 1.1 full-speed serial transceiver select */
+#define USB_OTG_GUSBCFG_SRPCAP_Pos              (8U)                           
+#define USB_OTG_GUSBCFG_SRPCAP_Msk              (0x1UL << USB_OTG_GUSBCFG_SRPCAP_Pos) /*!< 0x00000100 */
+#define USB_OTG_GUSBCFG_SRPCAP                  USB_OTG_GUSBCFG_SRPCAP_Msk     /*!< SRP-capable */
+#define USB_OTG_GUSBCFG_HNPCAP_Pos              (9U)                           
+#define USB_OTG_GUSBCFG_HNPCAP_Msk              (0x1UL << USB_OTG_GUSBCFG_HNPCAP_Pos) /*!< 0x00000200 */
+#define USB_OTG_GUSBCFG_HNPCAP                  USB_OTG_GUSBCFG_HNPCAP_Msk     /*!< HNP-capable */
+#define USB_OTG_GUSBCFG_TRDT_Pos                (10U)                          
+#define USB_OTG_GUSBCFG_TRDT_Msk                (0xFUL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00003C00 */
+#define USB_OTG_GUSBCFG_TRDT                    USB_OTG_GUSBCFG_TRDT_Msk       /*!< USB turnaround time */
+#define USB_OTG_GUSBCFG_TRDT_0                  (0x1UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000400 */
+#define USB_OTG_GUSBCFG_TRDT_1                  (0x2UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000800 */
+#define USB_OTG_GUSBCFG_TRDT_2                  (0x4UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00001000 */
+#define USB_OTG_GUSBCFG_TRDT_3                  (0x8UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00002000 */
+#define USB_OTG_GUSBCFG_PHYLPCS_Pos             (15U)                          
+#define USB_OTG_GUSBCFG_PHYLPCS_Msk             (0x1UL << USB_OTG_GUSBCFG_PHYLPCS_Pos) /*!< 0x00008000 */
+#define USB_OTG_GUSBCFG_PHYLPCS                 USB_OTG_GUSBCFG_PHYLPCS_Msk    /*!< PHY Low-power clock select */
+#define USB_OTG_GUSBCFG_ULPIFSLS_Pos            (17U)                          
+#define USB_OTG_GUSBCFG_ULPIFSLS_Msk            (0x1UL << USB_OTG_GUSBCFG_ULPIFSLS_Pos) /*!< 0x00020000 */
+#define USB_OTG_GUSBCFG_ULPIFSLS                USB_OTG_GUSBCFG_ULPIFSLS_Msk   /*!< ULPI FS/LS select */
+#define USB_OTG_GUSBCFG_ULPIAR_Pos              (18U)                          
+#define USB_OTG_GUSBCFG_ULPIAR_Msk              (0x1UL << USB_OTG_GUSBCFG_ULPIAR_Pos) /*!< 0x00040000 */
+#define USB_OTG_GUSBCFG_ULPIAR                  USB_OTG_GUSBCFG_ULPIAR_Msk     /*!< ULPI Auto-resume */
+#define USB_OTG_GUSBCFG_ULPICSM_Pos             (19U)                          
+#define USB_OTG_GUSBCFG_ULPICSM_Msk             (0x1UL << USB_OTG_GUSBCFG_ULPICSM_Pos) /*!< 0x00080000 */
+#define USB_OTG_GUSBCFG_ULPICSM                 USB_OTG_GUSBCFG_ULPICSM_Msk    /*!< ULPI Clock SuspendM */
+#define USB_OTG_GUSBCFG_ULPIEVBUSD_Pos          (20U)                          
+#define USB_OTG_GUSBCFG_ULPIEVBUSD_Msk          (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSD_Pos) /*!< 0x00100000 */
+#define USB_OTG_GUSBCFG_ULPIEVBUSD              USB_OTG_GUSBCFG_ULPIEVBUSD_Msk /*!< ULPI External VBUS Drive */
+#define USB_OTG_GUSBCFG_ULPIEVBUSI_Pos          (21U)                          
+#define USB_OTG_GUSBCFG_ULPIEVBUSI_Msk          (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSI_Pos) /*!< 0x00200000 */
+#define USB_OTG_GUSBCFG_ULPIEVBUSI              USB_OTG_GUSBCFG_ULPIEVBUSI_Msk /*!< ULPI external VBUS indicator */
+#define USB_OTG_GUSBCFG_TSDPS_Pos               (22U)                          
+#define USB_OTG_GUSBCFG_TSDPS_Msk               (0x1UL << USB_OTG_GUSBCFG_TSDPS_Pos) /*!< 0x00400000 */
+#define USB_OTG_GUSBCFG_TSDPS                   USB_OTG_GUSBCFG_TSDPS_Msk      /*!< TermSel DLine pulsing selection */
+#define USB_OTG_GUSBCFG_PCCI_Pos                (23U)                          
+#define USB_OTG_GUSBCFG_PCCI_Msk                (0x1UL << USB_OTG_GUSBCFG_PCCI_Pos) /*!< 0x00800000 */
+#define USB_OTG_GUSBCFG_PCCI                    USB_OTG_GUSBCFG_PCCI_Msk       /*!< Indicator complement */
+#define USB_OTG_GUSBCFG_PTCI_Pos                (24U)                          
+#define USB_OTG_GUSBCFG_PTCI_Msk                (0x1UL << USB_OTG_GUSBCFG_PTCI_Pos) /*!< 0x01000000 */
+#define USB_OTG_GUSBCFG_PTCI                    USB_OTG_GUSBCFG_PTCI_Msk       /*!< Indicator pass through */
+#define USB_OTG_GUSBCFG_ULPIIPD_Pos             (25U)                          
+#define USB_OTG_GUSBCFG_ULPIIPD_Msk             (0x1UL << USB_OTG_GUSBCFG_ULPIIPD_Pos) /*!< 0x02000000 */
+#define USB_OTG_GUSBCFG_ULPIIPD                 USB_OTG_GUSBCFG_ULPIIPD_Msk    /*!< ULPI interface protect disable */
+#define USB_OTG_GUSBCFG_FHMOD_Pos               (29U)                          
+#define USB_OTG_GUSBCFG_FHMOD_Msk               (0x1UL << USB_OTG_GUSBCFG_FHMOD_Pos) /*!< 0x20000000 */
+#define USB_OTG_GUSBCFG_FHMOD                   USB_OTG_GUSBCFG_FHMOD_Msk      /*!< Forced host mode */
+#define USB_OTG_GUSBCFG_FDMOD_Pos               (30U)                          
+#define USB_OTG_GUSBCFG_FDMOD_Msk               (0x1UL << USB_OTG_GUSBCFG_FDMOD_Pos) /*!< 0x40000000 */
+#define USB_OTG_GUSBCFG_FDMOD                   USB_OTG_GUSBCFG_FDMOD_Msk      /*!< Forced peripheral mode */
+#define USB_OTG_GUSBCFG_CTXPKT_Pos              (31U)                          
+#define USB_OTG_GUSBCFG_CTXPKT_Msk              (0x1UL << USB_OTG_GUSBCFG_CTXPKT_Pos) /*!< 0x80000000 */
+#define USB_OTG_GUSBCFG_CTXPKT                  USB_OTG_GUSBCFG_CTXPKT_Msk     /*!< Corrupt Tx packet */
+
+/********************  Bit definition for USB_OTG_GRSTCTL register  ********************/
+#define USB_OTG_GRSTCTL_CSRST_Pos               (0U)                           
+#define USB_OTG_GRSTCTL_CSRST_Msk               (0x1UL << USB_OTG_GRSTCTL_CSRST_Pos) /*!< 0x00000001 */
+#define USB_OTG_GRSTCTL_CSRST                   USB_OTG_GRSTCTL_CSRST_Msk      /*!< Core soft reset */
+#define USB_OTG_GRSTCTL_HSRST_Pos               (1U)                           
+#define USB_OTG_GRSTCTL_HSRST_Msk               (0x1UL << USB_OTG_GRSTCTL_HSRST_Pos) /*!< 0x00000002 */
+#define USB_OTG_GRSTCTL_HSRST                   USB_OTG_GRSTCTL_HSRST_Msk      /*!< HCLK soft reset */
+#define USB_OTG_GRSTCTL_FCRST_Pos               (2U)                           
+#define USB_OTG_GRSTCTL_FCRST_Msk               (0x1UL << USB_OTG_GRSTCTL_FCRST_Pos) /*!< 0x00000004 */
+#define USB_OTG_GRSTCTL_FCRST                   USB_OTG_GRSTCTL_FCRST_Msk      /*!< Host frame counter reset */
+#define USB_OTG_GRSTCTL_RXFFLSH_Pos             (4U)                           
+#define USB_OTG_GRSTCTL_RXFFLSH_Msk             (0x1UL << USB_OTG_GRSTCTL_RXFFLSH_Pos) /*!< 0x00000010 */
+#define USB_OTG_GRSTCTL_RXFFLSH                 USB_OTG_GRSTCTL_RXFFLSH_Msk    /*!< RxFIFO flush */
+#define USB_OTG_GRSTCTL_TXFFLSH_Pos             (5U)                           
+#define USB_OTG_GRSTCTL_TXFFLSH_Msk             (0x1UL << USB_OTG_GRSTCTL_TXFFLSH_Pos) /*!< 0x00000020 */
+#define USB_OTG_GRSTCTL_TXFFLSH                 USB_OTG_GRSTCTL_TXFFLSH_Msk    /*!< TxFIFO flush */
+
+
+#define USB_OTG_GRSTCTL_TXFNUM_Pos              (6U)                           
+#define USB_OTG_GRSTCTL_TXFNUM_Msk              (0x1FUL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x000007C0 */
+#define USB_OTG_GRSTCTL_TXFNUM                  USB_OTG_GRSTCTL_TXFNUM_Msk     /*!< TxFIFO number */
+#define USB_OTG_GRSTCTL_TXFNUM_0                (0x01UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000040 */
+#define USB_OTG_GRSTCTL_TXFNUM_1                (0x02UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000080 */
+#define USB_OTG_GRSTCTL_TXFNUM_2                (0x04UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000100 */
+#define USB_OTG_GRSTCTL_TXFNUM_3                (0x08UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000200 */
+#define USB_OTG_GRSTCTL_TXFNUM_4                (0x10UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000400 */
+#define USB_OTG_GRSTCTL_DMAREQ_Pos              (30U)                          
+#define USB_OTG_GRSTCTL_DMAREQ_Msk              (0x1UL << USB_OTG_GRSTCTL_DMAREQ_Pos) /*!< 0x40000000 */
+#define USB_OTG_GRSTCTL_DMAREQ                  USB_OTG_GRSTCTL_DMAREQ_Msk     /*!< DMA request signal */
+#define USB_OTG_GRSTCTL_AHBIDL_Pos              (31U)                          
+#define USB_OTG_GRSTCTL_AHBIDL_Msk              (0x1UL << USB_OTG_GRSTCTL_AHBIDL_Pos) /*!< 0x80000000 */
+#define USB_OTG_GRSTCTL_AHBIDL                  USB_OTG_GRSTCTL_AHBIDL_Msk     /*!< AHB master idle */
+
+/********************  Bit definition for USB_OTG_DIEPMSK register  ********************/
+#define USB_OTG_DIEPMSK_XFRCM_Pos               (0U)                           
+#define USB_OTG_DIEPMSK_XFRCM_Msk               (0x1UL << USB_OTG_DIEPMSK_XFRCM_Pos) /*!< 0x00000001 */
+#define USB_OTG_DIEPMSK_XFRCM                   USB_OTG_DIEPMSK_XFRCM_Msk      /*!< Transfer completed interrupt mask */
+#define USB_OTG_DIEPMSK_EPDM_Pos                (1U)                           
+#define USB_OTG_DIEPMSK_EPDM_Msk                (0x1UL << USB_OTG_DIEPMSK_EPDM_Pos) /*!< 0x00000002 */
+#define USB_OTG_DIEPMSK_EPDM                    USB_OTG_DIEPMSK_EPDM_Msk       /*!< Endpoint disabled interrupt mask */
+#define USB_OTG_DIEPMSK_TOM_Pos                 (3U)                           
+#define USB_OTG_DIEPMSK_TOM_Msk                 (0x1UL << USB_OTG_DIEPMSK_TOM_Pos) /*!< 0x00000008 */
+#define USB_OTG_DIEPMSK_TOM                     USB_OTG_DIEPMSK_TOM_Msk        /*!< Timeout condition mask (nonisochronous endpoints) */
+#define USB_OTG_DIEPMSK_ITTXFEMSK_Pos           (4U)                           
+#define USB_OTG_DIEPMSK_ITTXFEMSK_Msk           (0x1UL << USB_OTG_DIEPMSK_ITTXFEMSK_Pos) /*!< 0x00000010 */
+#define USB_OTG_DIEPMSK_ITTXFEMSK               USB_OTG_DIEPMSK_ITTXFEMSK_Msk  /*!< IN token received when TxFIFO empty mask */
+#define USB_OTG_DIEPMSK_INEPNMM_Pos             (5U)                           
+#define USB_OTG_DIEPMSK_INEPNMM_Msk             (0x1UL << USB_OTG_DIEPMSK_INEPNMM_Pos) /*!< 0x00000020 */
+#define USB_OTG_DIEPMSK_INEPNMM                 USB_OTG_DIEPMSK_INEPNMM_Msk    /*!< IN token received with EP mismatch mask */
+#define USB_OTG_DIEPMSK_INEPNEM_Pos             (6U)                           
+#define USB_OTG_DIEPMSK_INEPNEM_Msk             (0x1UL << USB_OTG_DIEPMSK_INEPNEM_Pos) /*!< 0x00000040 */
+#define USB_OTG_DIEPMSK_INEPNEM                 USB_OTG_DIEPMSK_INEPNEM_Msk    /*!< IN endpoint NAK effective mask */
+#define USB_OTG_DIEPMSK_TXFURM_Pos              (8U)                           
+#define USB_OTG_DIEPMSK_TXFURM_Msk              (0x1UL << USB_OTG_DIEPMSK_TXFURM_Pos) /*!< 0x00000100 */
+#define USB_OTG_DIEPMSK_TXFURM                  USB_OTG_DIEPMSK_TXFURM_Msk     /*!< FIFO underrun mask */
+#define USB_OTG_DIEPMSK_BIM_Pos                 (9U)                           
+#define USB_OTG_DIEPMSK_BIM_Msk                 (0x1UL << USB_OTG_DIEPMSK_BIM_Pos) /*!< 0x00000200 */
+#define USB_OTG_DIEPMSK_BIM                     USB_OTG_DIEPMSK_BIM_Msk        /*!< BNA interrupt mask */
+
+/********************  Bit definition for USB_OTG_HPTXSTS register  ********************/
+#define USB_OTG_HPTXSTS_PTXFSAVL_Pos            (0U)                           
+#define USB_OTG_HPTXSTS_PTXFSAVL_Msk            (0xFFFFUL << USB_OTG_HPTXSTS_PTXFSAVL_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HPTXSTS_PTXFSAVL                USB_OTG_HPTXSTS_PTXFSAVL_Msk   /*!< Periodic transmit data FIFO space available */
+#define USB_OTG_HPTXSTS_PTXQSAV_Pos             (16U)                          
+#define USB_OTG_HPTXSTS_PTXQSAV_Msk             (0xFFUL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00FF0000 */
+#define USB_OTG_HPTXSTS_PTXQSAV                 USB_OTG_HPTXSTS_PTXQSAV_Msk    /*!< Periodic transmit request queue space available */
+#define USB_OTG_HPTXSTS_PTXQSAV_0               (0x01UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00010000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_1               (0x02UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00020000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_2               (0x04UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00040000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_3               (0x08UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00080000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_4               (0x10UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00100000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_5               (0x20UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00200000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_6               (0x40UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00400000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_7               (0x80UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00800000 */
+
+#define USB_OTG_HPTXSTS_PTXQTOP_Pos             (24U)                          
+#define USB_OTG_HPTXSTS_PTXQTOP_Msk             (0xFFUL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0xFF000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP                 USB_OTG_HPTXSTS_PTXQTOP_Msk    /*!< Top of the periodic transmit request queue */
+#define USB_OTG_HPTXSTS_PTXQTOP_0               (0x01UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x01000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_1               (0x02UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x02000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_2               (0x04UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x04000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_3               (0x08UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x08000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_4               (0x10UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x10000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_5               (0x20UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x20000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_6               (0x40UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x40000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_7               (0x80UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x80000000 */
+
+/********************  Bit definition for USB_OTG_HAINT register  ********************/
+#define USB_OTG_HAINT_HAINT_Pos                 (0U)                           
+#define USB_OTG_HAINT_HAINT_Msk                 (0xFFFFUL << USB_OTG_HAINT_HAINT_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HAINT_HAINT                     USB_OTG_HAINT_HAINT_Msk        /*!< Channel interrupts */
+
+/********************  Bit definition for USB_OTG_DOEPMSK register  ********************/
+#define USB_OTG_DOEPMSK_XFRCM_Pos               (0U)                           
+#define USB_OTG_DOEPMSK_XFRCM_Msk               (0x1UL << USB_OTG_DOEPMSK_XFRCM_Pos) /*!< 0x00000001 */
+#define USB_OTG_DOEPMSK_XFRCM                   USB_OTG_DOEPMSK_XFRCM_Msk      /*!< Transfer completed interrupt mask */
+#define USB_OTG_DOEPMSK_EPDM_Pos                (1U)                           
+#define USB_OTG_DOEPMSK_EPDM_Msk                (0x1UL << USB_OTG_DOEPMSK_EPDM_Pos) /*!< 0x00000002 */
+#define USB_OTG_DOEPMSK_EPDM                    USB_OTG_DOEPMSK_EPDM_Msk       /*!< Endpoint disabled interrupt mask */
+#define USB_OTG_DOEPMSK_AHBERRM_Pos              (2U)
+#define USB_OTG_DOEPMSK_AHBERRM_Msk              (0x1UL << USB_OTG_DOEPMSK_AHBERRM_Pos) /*!< 0x00000004 */
+#define USB_OTG_DOEPMSK_AHBERRM                  USB_OTG_DOEPMSK_AHBERRM_Msk   /*!< OUT transaction AHB Error interrupt mask       */
+#define USB_OTG_DOEPMSK_STUPM_Pos               (3U)                           
+#define USB_OTG_DOEPMSK_STUPM_Msk               (0x1UL << USB_OTG_DOEPMSK_STUPM_Pos) /*!< 0x00000008 */
+#define USB_OTG_DOEPMSK_STUPM                   USB_OTG_DOEPMSK_STUPM_Msk      /*!< SETUP phase done mask */
+#define USB_OTG_DOEPMSK_OTEPDM_Pos              (4U)                           
+#define USB_OTG_DOEPMSK_OTEPDM_Msk              (0x1UL << USB_OTG_DOEPMSK_OTEPDM_Pos) /*!< 0x00000010 */
+#define USB_OTG_DOEPMSK_OTEPDM                  USB_OTG_DOEPMSK_OTEPDM_Msk     /*!< OUT token received when endpoint disabled mask */
+#define USB_OTG_DOEPMSK_OTEPSPRM_Pos             (5U)                          
+#define USB_OTG_DOEPMSK_OTEPSPRM_Msk             (0x1UL << USB_OTG_DOEPMSK_OTEPSPRM_Pos) /*!< 0x00000020 */
+#define USB_OTG_DOEPMSK_OTEPSPRM                 USB_OTG_DOEPMSK_OTEPSPRM_Msk  /*!< Status Phase Received mask                     */
+#define USB_OTG_DOEPMSK_B2BSTUP_Pos             (6U)                           
+#define USB_OTG_DOEPMSK_B2BSTUP_Msk             (0x1UL << USB_OTG_DOEPMSK_B2BSTUP_Pos) /*!< 0x00000040 */
+#define USB_OTG_DOEPMSK_B2BSTUP                 USB_OTG_DOEPMSK_B2BSTUP_Msk    /*!< Back-to-back SETUP packets received mask */
+#define USB_OTG_DOEPMSK_OPEM_Pos                (8U)                           
+#define USB_OTG_DOEPMSK_OPEM_Msk                (0x1UL << USB_OTG_DOEPMSK_OPEM_Pos) /*!< 0x00000100 */
+#define USB_OTG_DOEPMSK_OPEM                    USB_OTG_DOEPMSK_OPEM_Msk       /*!< OUT packet error mask */
+#define USB_OTG_DOEPMSK_BOIM_Pos                (9U)                           
+#define USB_OTG_DOEPMSK_BOIM_Msk                (0x1UL << USB_OTG_DOEPMSK_BOIM_Pos) /*!< 0x00000200 */
+#define USB_OTG_DOEPMSK_BOIM                    USB_OTG_DOEPMSK_BOIM_Msk       /*!< BNA interrupt mask */
+#define USB_OTG_DOEPMSK_BERRM_Pos                (12U)
+#define USB_OTG_DOEPMSK_BERRM_Msk                (0x1UL << USB_OTG_DOEPMSK_BERRM_Pos) /*!< 0x00001000 */
+#define USB_OTG_DOEPMSK_BERRM                    USB_OTG_DOEPMSK_BERRM_Msk      /*!< Babble error interrupt mask                   */
+#define USB_OTG_DOEPMSK_NAKM_Pos                 (13U)
+#define USB_OTG_DOEPMSK_NAKM_Msk                 (0x1UL << USB_OTG_DOEPMSK_NAKM_Pos) /*!< 0x00002000 */
+#define USB_OTG_DOEPMSK_NAKM                     USB_OTG_DOEPMSK_NAKM_Msk      /*!< OUT Packet NAK interrupt mask                  */
+#define USB_OTG_DOEPMSK_NYETM_Pos                (14U)
+#define USB_OTG_DOEPMSK_NYETM_Msk                (0x1UL << USB_OTG_DOEPMSK_NYETM_Pos) /*!< 0x00004000 */
+#define USB_OTG_DOEPMSK_NYETM                    USB_OTG_DOEPMSK_NYETM_Msk     /*!< NYET interrupt mask                            */
+/********************  Bit definition for USB_OTG_GINTSTS register  ********************/
+#define USB_OTG_GINTSTS_CMOD_Pos                (0U)                           
+#define USB_OTG_GINTSTS_CMOD_Msk                (0x1UL << USB_OTG_GINTSTS_CMOD_Pos) /*!< 0x00000001 */
+#define USB_OTG_GINTSTS_CMOD                    USB_OTG_GINTSTS_CMOD_Msk       /*!< Current mode of operation */
+#define USB_OTG_GINTSTS_MMIS_Pos                (1U)                           
+#define USB_OTG_GINTSTS_MMIS_Msk                (0x1UL << USB_OTG_GINTSTS_MMIS_Pos) /*!< 0x00000002 */
+#define USB_OTG_GINTSTS_MMIS                    USB_OTG_GINTSTS_MMIS_Msk       /*!< Mode mismatch interrupt */
+#define USB_OTG_GINTSTS_OTGINT_Pos              (2U)                           
+#define USB_OTG_GINTSTS_OTGINT_Msk              (0x1UL << USB_OTG_GINTSTS_OTGINT_Pos) /*!< 0x00000004 */
+#define USB_OTG_GINTSTS_OTGINT                  USB_OTG_GINTSTS_OTGINT_Msk     /*!< OTG interrupt */
+#define USB_OTG_GINTSTS_SOF_Pos                 (3U)                           
+#define USB_OTG_GINTSTS_SOF_Msk                 (0x1UL << USB_OTG_GINTSTS_SOF_Pos) /*!< 0x00000008 */
+#define USB_OTG_GINTSTS_SOF                     USB_OTG_GINTSTS_SOF_Msk        /*!< Start of frame */
+#define USB_OTG_GINTSTS_RXFLVL_Pos              (4U)                           
+#define USB_OTG_GINTSTS_RXFLVL_Msk              (0x1UL << USB_OTG_GINTSTS_RXFLVL_Pos) /*!< 0x00000010 */
+#define USB_OTG_GINTSTS_RXFLVL                  USB_OTG_GINTSTS_RXFLVL_Msk     /*!< RxFIFO nonempty */
+#define USB_OTG_GINTSTS_NPTXFE_Pos              (5U)                           
+#define USB_OTG_GINTSTS_NPTXFE_Msk              (0x1UL << USB_OTG_GINTSTS_NPTXFE_Pos) /*!< 0x00000020 */
+#define USB_OTG_GINTSTS_NPTXFE                  USB_OTG_GINTSTS_NPTXFE_Msk     /*!< Nonperiodic TxFIFO empty */
+#define USB_OTG_GINTSTS_GINAKEFF_Pos            (6U)                           
+#define USB_OTG_GINTSTS_GINAKEFF_Msk            (0x1UL << USB_OTG_GINTSTS_GINAKEFF_Pos) /*!< 0x00000040 */
+#define USB_OTG_GINTSTS_GINAKEFF                USB_OTG_GINTSTS_GINAKEFF_Msk   /*!< Global IN nonperiodic NAK effective */
+#define USB_OTG_GINTSTS_BOUTNAKEFF_Pos          (7U)                           
+#define USB_OTG_GINTSTS_BOUTNAKEFF_Msk          (0x1UL << USB_OTG_GINTSTS_BOUTNAKEFF_Pos) /*!< 0x00000080 */
+#define USB_OTG_GINTSTS_BOUTNAKEFF              USB_OTG_GINTSTS_BOUTNAKEFF_Msk /*!< Global OUT NAK effective */
+#define USB_OTG_GINTSTS_ESUSP_Pos               (10U)                          
+#define USB_OTG_GINTSTS_ESUSP_Msk               (0x1UL << USB_OTG_GINTSTS_ESUSP_Pos) /*!< 0x00000400 */
+#define USB_OTG_GINTSTS_ESUSP                   USB_OTG_GINTSTS_ESUSP_Msk      /*!< Early suspend */
+#define USB_OTG_GINTSTS_USBSUSP_Pos             (11U)                          
+#define USB_OTG_GINTSTS_USBSUSP_Msk             (0x1UL << USB_OTG_GINTSTS_USBSUSP_Pos) /*!< 0x00000800 */
+#define USB_OTG_GINTSTS_USBSUSP                 USB_OTG_GINTSTS_USBSUSP_Msk    /*!< USB suspend */
+#define USB_OTG_GINTSTS_USBRST_Pos              (12U)                          
+#define USB_OTG_GINTSTS_USBRST_Msk              (0x1UL << USB_OTG_GINTSTS_USBRST_Pos) /*!< 0x00001000 */
+#define USB_OTG_GINTSTS_USBRST                  USB_OTG_GINTSTS_USBRST_Msk     /*!< USB reset */
+#define USB_OTG_GINTSTS_ENUMDNE_Pos             (13U)                          
+#define USB_OTG_GINTSTS_ENUMDNE_Msk             (0x1UL << USB_OTG_GINTSTS_ENUMDNE_Pos) /*!< 0x00002000 */
+#define USB_OTG_GINTSTS_ENUMDNE                 USB_OTG_GINTSTS_ENUMDNE_Msk    /*!< Enumeration done */
+#define USB_OTG_GINTSTS_ISOODRP_Pos             (14U)                          
+#define USB_OTG_GINTSTS_ISOODRP_Msk             (0x1UL << USB_OTG_GINTSTS_ISOODRP_Pos) /*!< 0x00004000 */
+#define USB_OTG_GINTSTS_ISOODRP                 USB_OTG_GINTSTS_ISOODRP_Msk    /*!< Isochronous OUT packet dropped interrupt */
+#define USB_OTG_GINTSTS_EOPF_Pos                (15U)                          
+#define USB_OTG_GINTSTS_EOPF_Msk                (0x1UL << USB_OTG_GINTSTS_EOPF_Pos) /*!< 0x00008000 */
+#define USB_OTG_GINTSTS_EOPF                    USB_OTG_GINTSTS_EOPF_Msk       /*!< End of periodic frame interrupt */
+#define USB_OTG_GINTSTS_IEPINT_Pos              (18U)                          
+#define USB_OTG_GINTSTS_IEPINT_Msk              (0x1UL << USB_OTG_GINTSTS_IEPINT_Pos) /*!< 0x00040000 */
+#define USB_OTG_GINTSTS_IEPINT                  USB_OTG_GINTSTS_IEPINT_Msk     /*!< IN endpoint interrupt */
+#define USB_OTG_GINTSTS_OEPINT_Pos              (19U)                          
+#define USB_OTG_GINTSTS_OEPINT_Msk              (0x1UL << USB_OTG_GINTSTS_OEPINT_Pos) /*!< 0x00080000 */
+#define USB_OTG_GINTSTS_OEPINT                  USB_OTG_GINTSTS_OEPINT_Msk     /*!< OUT endpoint interrupt */
+#define USB_OTG_GINTSTS_IISOIXFR_Pos            (20U)                          
+#define USB_OTG_GINTSTS_IISOIXFR_Msk            (0x1UL << USB_OTG_GINTSTS_IISOIXFR_Pos) /*!< 0x00100000 */
+#define USB_OTG_GINTSTS_IISOIXFR                USB_OTG_GINTSTS_IISOIXFR_Msk   /*!< Incomplete isochronous IN transfer */
+#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos   (21U)                          
+#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk   (0x1UL << USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos) /*!< 0x00200000 */
+#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT       USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk /*!< Incomplete periodic transfer */
+#define USB_OTG_GINTSTS_DATAFSUSP_Pos           (22U)                          
+#define USB_OTG_GINTSTS_DATAFSUSP_Msk           (0x1UL << USB_OTG_GINTSTS_DATAFSUSP_Pos) /*!< 0x00400000 */
+#define USB_OTG_GINTSTS_DATAFSUSP               USB_OTG_GINTSTS_DATAFSUSP_Msk  /*!< Data fetch suspended */
+#define USB_OTG_GINTSTS_HPRTINT_Pos             (24U)                          
+#define USB_OTG_GINTSTS_HPRTINT_Msk             (0x1UL << USB_OTG_GINTSTS_HPRTINT_Pos) /*!< 0x01000000 */
+#define USB_OTG_GINTSTS_HPRTINT                 USB_OTG_GINTSTS_HPRTINT_Msk    /*!< Host port interrupt */
+#define USB_OTG_GINTSTS_HCINT_Pos               (25U)                          
+#define USB_OTG_GINTSTS_HCINT_Msk               (0x1UL << USB_OTG_GINTSTS_HCINT_Pos) /*!< 0x02000000 */
+#define USB_OTG_GINTSTS_HCINT                   USB_OTG_GINTSTS_HCINT_Msk      /*!< Host channels interrupt */
+#define USB_OTG_GINTSTS_PTXFE_Pos               (26U)                          
+#define USB_OTG_GINTSTS_PTXFE_Msk               (0x1UL << USB_OTG_GINTSTS_PTXFE_Pos) /*!< 0x04000000 */
+#define USB_OTG_GINTSTS_PTXFE                   USB_OTG_GINTSTS_PTXFE_Msk      /*!< Periodic TxFIFO empty */
+#define USB_OTG_GINTSTS_CIDSCHG_Pos             (28U)                          
+#define USB_OTG_GINTSTS_CIDSCHG_Msk             (0x1UL << USB_OTG_GINTSTS_CIDSCHG_Pos) /*!< 0x10000000 */
+#define USB_OTG_GINTSTS_CIDSCHG                 USB_OTG_GINTSTS_CIDSCHG_Msk    /*!< Connector ID status change */
+#define USB_OTG_GINTSTS_DISCINT_Pos             (29U)                          
+#define USB_OTG_GINTSTS_DISCINT_Msk             (0x1UL << USB_OTG_GINTSTS_DISCINT_Pos) /*!< 0x20000000 */
+#define USB_OTG_GINTSTS_DISCINT                 USB_OTG_GINTSTS_DISCINT_Msk    /*!< Disconnect detected interrupt */
+#define USB_OTG_GINTSTS_SRQINT_Pos              (30U)                          
+#define USB_OTG_GINTSTS_SRQINT_Msk              (0x1UL << USB_OTG_GINTSTS_SRQINT_Pos) /*!< 0x40000000 */
+#define USB_OTG_GINTSTS_SRQINT                  USB_OTG_GINTSTS_SRQINT_Msk     /*!< Session request/new session detected interrupt */
+#define USB_OTG_GINTSTS_WKUINT_Pos              (31U)                          
+#define USB_OTG_GINTSTS_WKUINT_Msk              (0x1UL << USB_OTG_GINTSTS_WKUINT_Pos) /*!< 0x80000000 */
+#define USB_OTG_GINTSTS_WKUINT                  USB_OTG_GINTSTS_WKUINT_Msk     /*!< Resume/remote wakeup detected interrupt */
+
+/********************  Bit definition for USB_OTG_GINTMSK register  ********************/
+#define USB_OTG_GINTMSK_MMISM_Pos               (1U)                           
+#define USB_OTG_GINTMSK_MMISM_Msk               (0x1UL << USB_OTG_GINTMSK_MMISM_Pos) /*!< 0x00000002 */
+#define USB_OTG_GINTMSK_MMISM                   USB_OTG_GINTMSK_MMISM_Msk      /*!< Mode mismatch interrupt mask */
+#define USB_OTG_GINTMSK_OTGINT_Pos              (2U)                           
+#define USB_OTG_GINTMSK_OTGINT_Msk              (0x1UL << USB_OTG_GINTMSK_OTGINT_Pos) /*!< 0x00000004 */
+#define USB_OTG_GINTMSK_OTGINT                  USB_OTG_GINTMSK_OTGINT_Msk     /*!< OTG interrupt mask */
+#define USB_OTG_GINTMSK_SOFM_Pos                (3U)                           
+#define USB_OTG_GINTMSK_SOFM_Msk                (0x1UL << USB_OTG_GINTMSK_SOFM_Pos) /*!< 0x00000008 */
+#define USB_OTG_GINTMSK_SOFM                    USB_OTG_GINTMSK_SOFM_Msk       /*!< Start of frame mask */
+#define USB_OTG_GINTMSK_RXFLVLM_Pos             (4U)                           
+#define USB_OTG_GINTMSK_RXFLVLM_Msk             (0x1UL << USB_OTG_GINTMSK_RXFLVLM_Pos) /*!< 0x00000010 */
+#define USB_OTG_GINTMSK_RXFLVLM                 USB_OTG_GINTMSK_RXFLVLM_Msk    /*!< Receive FIFO nonempty mask */
+#define USB_OTG_GINTMSK_NPTXFEM_Pos             (5U)                           
+#define USB_OTG_GINTMSK_NPTXFEM_Msk             (0x1UL << USB_OTG_GINTMSK_NPTXFEM_Pos) /*!< 0x00000020 */
+#define USB_OTG_GINTMSK_NPTXFEM                 USB_OTG_GINTMSK_NPTXFEM_Msk    /*!< Nonperiodic TxFIFO empty mask */
+#define USB_OTG_GINTMSK_GINAKEFFM_Pos           (6U)                           
+#define USB_OTG_GINTMSK_GINAKEFFM_Msk           (0x1UL << USB_OTG_GINTMSK_GINAKEFFM_Pos) /*!< 0x00000040 */
+#define USB_OTG_GINTMSK_GINAKEFFM               USB_OTG_GINTMSK_GINAKEFFM_Msk  /*!< Global nonperiodic IN NAK effective mask */
+#define USB_OTG_GINTMSK_GONAKEFFM_Pos           (7U)                           
+#define USB_OTG_GINTMSK_GONAKEFFM_Msk           (0x1UL << USB_OTG_GINTMSK_GONAKEFFM_Pos) /*!< 0x00000080 */
+#define USB_OTG_GINTMSK_GONAKEFFM               USB_OTG_GINTMSK_GONAKEFFM_Msk  /*!< Global OUT NAK effective mask */
+#define USB_OTG_GINTMSK_ESUSPM_Pos              (10U)                          
+#define USB_OTG_GINTMSK_ESUSPM_Msk              (0x1UL << USB_OTG_GINTMSK_ESUSPM_Pos) /*!< 0x00000400 */
+#define USB_OTG_GINTMSK_ESUSPM                  USB_OTG_GINTMSK_ESUSPM_Msk     /*!< Early suspend mask */
+#define USB_OTG_GINTMSK_USBSUSPM_Pos            (11U)                          
+#define USB_OTG_GINTMSK_USBSUSPM_Msk            (0x1UL << USB_OTG_GINTMSK_USBSUSPM_Pos) /*!< 0x00000800 */
+#define USB_OTG_GINTMSK_USBSUSPM                USB_OTG_GINTMSK_USBSUSPM_Msk   /*!< USB suspend mask */
+#define USB_OTG_GINTMSK_USBRST_Pos              (12U)                          
+#define USB_OTG_GINTMSK_USBRST_Msk              (0x1UL << USB_OTG_GINTMSK_USBRST_Pos) /*!< 0x00001000 */
+#define USB_OTG_GINTMSK_USBRST                  USB_OTG_GINTMSK_USBRST_Msk     /*!< USB reset mask */
+#define USB_OTG_GINTMSK_ENUMDNEM_Pos            (13U)                          
+#define USB_OTG_GINTMSK_ENUMDNEM_Msk            (0x1UL << USB_OTG_GINTMSK_ENUMDNEM_Pos) /*!< 0x00002000 */
+#define USB_OTG_GINTMSK_ENUMDNEM                USB_OTG_GINTMSK_ENUMDNEM_Msk   /*!< Enumeration done mask */
+#define USB_OTG_GINTMSK_ISOODRPM_Pos            (14U)                          
+#define USB_OTG_GINTMSK_ISOODRPM_Msk            (0x1UL << USB_OTG_GINTMSK_ISOODRPM_Pos) /*!< 0x00004000 */
+#define USB_OTG_GINTMSK_ISOODRPM                USB_OTG_GINTMSK_ISOODRPM_Msk   /*!< Isochronous OUT packet dropped interrupt mask */
+#define USB_OTG_GINTMSK_EOPFM_Pos               (15U)                          
+#define USB_OTG_GINTMSK_EOPFM_Msk               (0x1UL << USB_OTG_GINTMSK_EOPFM_Pos) /*!< 0x00008000 */
+#define USB_OTG_GINTMSK_EOPFM                   USB_OTG_GINTMSK_EOPFM_Msk      /*!< End of periodic frame interrupt mask */
+#define USB_OTG_GINTMSK_EPMISM_Pos              (17U)                          
+#define USB_OTG_GINTMSK_EPMISM_Msk              (0x1UL << USB_OTG_GINTMSK_EPMISM_Pos) /*!< 0x00020000 */
+#define USB_OTG_GINTMSK_EPMISM                  USB_OTG_GINTMSK_EPMISM_Msk     /*!< Endpoint mismatch interrupt mask */
+#define USB_OTG_GINTMSK_IEPINT_Pos              (18U)                          
+#define USB_OTG_GINTMSK_IEPINT_Msk              (0x1UL << USB_OTG_GINTMSK_IEPINT_Pos) /*!< 0x00040000 */
+#define USB_OTG_GINTMSK_IEPINT                  USB_OTG_GINTMSK_IEPINT_Msk     /*!< IN endpoints interrupt mask */
+#define USB_OTG_GINTMSK_OEPINT_Pos              (19U)                          
+#define USB_OTG_GINTMSK_OEPINT_Msk              (0x1UL << USB_OTG_GINTMSK_OEPINT_Pos) /*!< 0x00080000 */
+#define USB_OTG_GINTMSK_OEPINT                  USB_OTG_GINTMSK_OEPINT_Msk     /*!< OUT endpoints interrupt mask */
+#define USB_OTG_GINTMSK_IISOIXFRM_Pos           (20U)                          
+#define USB_OTG_GINTMSK_IISOIXFRM_Msk           (0x1UL << USB_OTG_GINTMSK_IISOIXFRM_Pos) /*!< 0x00100000 */
+#define USB_OTG_GINTMSK_IISOIXFRM               USB_OTG_GINTMSK_IISOIXFRM_Msk  /*!< Incomplete isochronous IN transfer mask */
+#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos     (21U)                          
+#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk     (0x1UL << USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos) /*!< 0x00200000 */
+#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM         USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk /*!< Incomplete periodic transfer mask */
+#define USB_OTG_GINTMSK_FSUSPM_Pos              (22U)                          
+#define USB_OTG_GINTMSK_FSUSPM_Msk              (0x1UL << USB_OTG_GINTMSK_FSUSPM_Pos) /*!< 0x00400000 */
+#define USB_OTG_GINTMSK_FSUSPM                  USB_OTG_GINTMSK_FSUSPM_Msk     /*!< Data fetch suspended mask */
+#define USB_OTG_GINTMSK_PRTIM_Pos               (24U)                          
+#define USB_OTG_GINTMSK_PRTIM_Msk               (0x1UL << USB_OTG_GINTMSK_PRTIM_Pos) /*!< 0x01000000 */
+#define USB_OTG_GINTMSK_PRTIM                   USB_OTG_GINTMSK_PRTIM_Msk      /*!< Host port interrupt mask */
+#define USB_OTG_GINTMSK_HCIM_Pos                (25U)                          
+#define USB_OTG_GINTMSK_HCIM_Msk                (0x1UL << USB_OTG_GINTMSK_HCIM_Pos) /*!< 0x02000000 */
+#define USB_OTG_GINTMSK_HCIM                    USB_OTG_GINTMSK_HCIM_Msk       /*!< Host channels interrupt mask */
+#define USB_OTG_GINTMSK_PTXFEM_Pos              (26U)                          
+#define USB_OTG_GINTMSK_PTXFEM_Msk              (0x1UL << USB_OTG_GINTMSK_PTXFEM_Pos) /*!< 0x04000000 */
+#define USB_OTG_GINTMSK_PTXFEM                  USB_OTG_GINTMSK_PTXFEM_Msk     /*!< Periodic TxFIFO empty mask */
+#define USB_OTG_GINTMSK_CIDSCHGM_Pos            (28U)                          
+#define USB_OTG_GINTMSK_CIDSCHGM_Msk            (0x1UL << USB_OTG_GINTMSK_CIDSCHGM_Pos) /*!< 0x10000000 */
+#define USB_OTG_GINTMSK_CIDSCHGM                USB_OTG_GINTMSK_CIDSCHGM_Msk   /*!< Connector ID status change mask */
+#define USB_OTG_GINTMSK_DISCINT_Pos             (29U)                          
+#define USB_OTG_GINTMSK_DISCINT_Msk             (0x1UL << USB_OTG_GINTMSK_DISCINT_Pos) /*!< 0x20000000 */
+#define USB_OTG_GINTMSK_DISCINT                 USB_OTG_GINTMSK_DISCINT_Msk    /*!< Disconnect detected interrupt mask */
+#define USB_OTG_GINTMSK_SRQIM_Pos               (30U)                          
+#define USB_OTG_GINTMSK_SRQIM_Msk               (0x1UL << USB_OTG_GINTMSK_SRQIM_Pos) /*!< 0x40000000 */
+#define USB_OTG_GINTMSK_SRQIM                   USB_OTG_GINTMSK_SRQIM_Msk      /*!< Session request/new session detected interrupt mask */
+#define USB_OTG_GINTMSK_WUIM_Pos                (31U)                          
+#define USB_OTG_GINTMSK_WUIM_Msk                (0x1UL << USB_OTG_GINTMSK_WUIM_Pos) /*!< 0x80000000 */
+#define USB_OTG_GINTMSK_WUIM                    USB_OTG_GINTMSK_WUIM_Msk       /*!< Resume/remote wakeup detected interrupt mask */
+
+/********************  Bit definition for USB_OTG_DAINT register  ********************/
+#define USB_OTG_DAINT_IEPINT_Pos                (0U)                           
+#define USB_OTG_DAINT_IEPINT_Msk                (0xFFFFUL << USB_OTG_DAINT_IEPINT_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DAINT_IEPINT                    USB_OTG_DAINT_IEPINT_Msk       /*!< IN endpoint interrupt bits */
+#define USB_OTG_DAINT_OEPINT_Pos                (16U)                          
+#define USB_OTG_DAINT_OEPINT_Msk                (0xFFFFUL << USB_OTG_DAINT_OEPINT_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_DAINT_OEPINT                    USB_OTG_DAINT_OEPINT_Msk       /*!< OUT endpoint interrupt bits */
+
+/********************  Bit definition for USB_OTG_HAINTMSK register  ********************/
+#define USB_OTG_HAINTMSK_HAINTM_Pos             (0U)                           
+#define USB_OTG_HAINTMSK_HAINTM_Msk             (0xFFFFUL << USB_OTG_HAINTMSK_HAINTM_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HAINTMSK_HAINTM                 USB_OTG_HAINTMSK_HAINTM_Msk    /*!< Channel interrupt mask */
+
+/********************  Bit definition for USB_OTG_GRXSTSP register  ********************/
+#define USB_OTG_GRXSTSP_EPNUM_Pos               (0U)                           
+#define USB_OTG_GRXSTSP_EPNUM_Msk               (0xFUL << USB_OTG_GRXSTSP_EPNUM_Pos) /*!< 0x0000000F */
+#define USB_OTG_GRXSTSP_EPNUM                   USB_OTG_GRXSTSP_EPNUM_Msk      /*!< IN EP interrupt mask bits */
+#define USB_OTG_GRXSTSP_BCNT_Pos                (4U)                           
+#define USB_OTG_GRXSTSP_BCNT_Msk                (0x7FFUL << USB_OTG_GRXSTSP_BCNT_Pos) /*!< 0x00007FF0 */
+#define USB_OTG_GRXSTSP_BCNT                    USB_OTG_GRXSTSP_BCNT_Msk       /*!< OUT EP interrupt mask bits */
+#define USB_OTG_GRXSTSP_DPID_Pos                (15U)                          
+#define USB_OTG_GRXSTSP_DPID_Msk                (0x3UL << USB_OTG_GRXSTSP_DPID_Pos) /*!< 0x00018000 */
+#define USB_OTG_GRXSTSP_DPID                    USB_OTG_GRXSTSP_DPID_Msk       /*!< OUT EP interrupt mask bits */
+#define USB_OTG_GRXSTSP_PKTSTS_Pos              (17U)                          
+#define USB_OTG_GRXSTSP_PKTSTS_Msk              (0xFUL << USB_OTG_GRXSTSP_PKTSTS_Pos) /*!< 0x001E0000 */
+#define USB_OTG_GRXSTSP_PKTSTS                  USB_OTG_GRXSTSP_PKTSTS_Msk     /*!< OUT EP interrupt mask bits */
+
+/********************  Bit definition for USB_OTG_DAINTMSK register  ********************/
+#define USB_OTG_DAINTMSK_IEPM_Pos               (0U)                           
+#define USB_OTG_DAINTMSK_IEPM_Msk               (0xFFFFUL << USB_OTG_DAINTMSK_IEPM_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DAINTMSK_IEPM                   USB_OTG_DAINTMSK_IEPM_Msk      /*!< IN EP interrupt mask bits */
+#define USB_OTG_DAINTMSK_OEPM_Pos               (16U)                          
+#define USB_OTG_DAINTMSK_OEPM_Msk               (0xFFFFUL << USB_OTG_DAINTMSK_OEPM_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_DAINTMSK_OEPM                   USB_OTG_DAINTMSK_OEPM_Msk      /*!< OUT EP interrupt mask bits */
+
+/********************  Bit definition for USB_OTG_GRXFSIZ register  ********************/
+#define USB_OTG_GRXFSIZ_RXFD_Pos                (0U)                           
+#define USB_OTG_GRXFSIZ_RXFD_Msk                (0xFFFFUL << USB_OTG_GRXFSIZ_RXFD_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_GRXFSIZ_RXFD                    USB_OTG_GRXFSIZ_RXFD_Msk       /*!< RxFIFO depth */
+
+/********************  Bit definition for USB_OTG_DVBUSDIS register  ********************/
+#define USB_OTG_DVBUSDIS_VBUSDT_Pos             (0U)                           
+#define USB_OTG_DVBUSDIS_VBUSDT_Msk             (0xFFFFUL << USB_OTG_DVBUSDIS_VBUSDT_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DVBUSDIS_VBUSDT                 USB_OTG_DVBUSDIS_VBUSDT_Msk    /*!< Device VBUS discharge time */
+
+/********************  Bit definition for OTG register  ********************/
+#define USB_OTG_NPTXFSA_Pos                     (0U)                           
+#define USB_OTG_NPTXFSA_Msk                     (0xFFFFUL << USB_OTG_NPTXFSA_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_NPTXFSA                         USB_OTG_NPTXFSA_Msk            /*!< Nonperiodic transmit RAM start address */
+#define USB_OTG_NPTXFD_Pos                      (16U)                          
+#define USB_OTG_NPTXFD_Msk                      (0xFFFFUL << USB_OTG_NPTXFD_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_NPTXFD                          USB_OTG_NPTXFD_Msk             /*!< Nonperiodic TxFIFO depth */
+#define USB_OTG_TX0FSA_Pos                      (0U)                           
+#define USB_OTG_TX0FSA_Msk                      (0xFFFFUL << USB_OTG_TX0FSA_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_TX0FSA                          USB_OTG_TX0FSA_Msk             /*!< Endpoint 0 transmit RAM start address */
+#define USB_OTG_TX0FD_Pos                       (16U)                          
+#define USB_OTG_TX0FD_Msk                       (0xFFFFUL << USB_OTG_TX0FD_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_TX0FD                           USB_OTG_TX0FD_Msk              /*!< Endpoint 0 TxFIFO depth */
+
+/********************  Bit definition for USB_OTG_DVBUSPULSE register  ********************/
+#define USB_OTG_DVBUSPULSE_DVBUSP_Pos           (0U)                           
+#define USB_OTG_DVBUSPULSE_DVBUSP_Msk           (0xFFFUL << USB_OTG_DVBUSPULSE_DVBUSP_Pos) /*!< 0x00000FFF */
+#define USB_OTG_DVBUSPULSE_DVBUSP               USB_OTG_DVBUSPULSE_DVBUSP_Msk  /*!< Device VBUS pulsing time */
+
+/********************  Bit definition for USB_OTG_GNPTXSTS register  ********************/
+#define USB_OTG_GNPTXSTS_NPTXFSAV_Pos           (0U)                           
+#define USB_OTG_GNPTXSTS_NPTXFSAV_Msk           (0xFFFFUL << USB_OTG_GNPTXSTS_NPTXFSAV_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_GNPTXSTS_NPTXFSAV               USB_OTG_GNPTXSTS_NPTXFSAV_Msk  /*!< Nonperiodic TxFIFO space available */
+
+#define USB_OTG_GNPTXSTS_NPTQXSAV_Pos           (16U)                          
+#define USB_OTG_GNPTXSTS_NPTQXSAV_Msk           (0xFFUL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00FF0000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV               USB_OTG_GNPTXSTS_NPTQXSAV_Msk  /*!< Nonperiodic transmit request queue space available */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_0             (0x01UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00010000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_1             (0x02UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00020000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_2             (0x04UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00040000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_3             (0x08UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00080000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_4             (0x10UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00100000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_5             (0x20UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00200000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_6             (0x40UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00400000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_7             (0x80UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00800000 */
+
+#define USB_OTG_GNPTXSTS_NPTXQTOP_Pos           (24U)                          
+#define USB_OTG_GNPTXSTS_NPTXQTOP_Msk           (0x7FUL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x7F000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP               USB_OTG_GNPTXSTS_NPTXQTOP_Msk  /*!< Top of the nonperiodic transmit request queue */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_0             (0x01UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x01000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_1             (0x02UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x02000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_2             (0x04UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x04000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_3             (0x08UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x08000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_4             (0x10UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x10000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_5             (0x20UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x20000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_6             (0x40UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x40000000 */
+
+/********************  Bit definition for USB_OTG_DTHRCTL register  ********************/
+#define USB_OTG_DTHRCTL_NONISOTHREN_Pos         (0U)                           
+#define USB_OTG_DTHRCTL_NONISOTHREN_Msk         (0x1UL << USB_OTG_DTHRCTL_NONISOTHREN_Pos) /*!< 0x00000001 */
+#define USB_OTG_DTHRCTL_NONISOTHREN             USB_OTG_DTHRCTL_NONISOTHREN_Msk /*!< Nonisochronous IN endpoints threshold enable */
+#define USB_OTG_DTHRCTL_ISOTHREN_Pos            (1U)                           
+#define USB_OTG_DTHRCTL_ISOTHREN_Msk            (0x1UL << USB_OTG_DTHRCTL_ISOTHREN_Pos) /*!< 0x00000002 */
+#define USB_OTG_DTHRCTL_ISOTHREN                USB_OTG_DTHRCTL_ISOTHREN_Msk   /*!< ISO IN endpoint threshold enable */
+
+#define USB_OTG_DTHRCTL_TXTHRLEN_Pos            (2U)                           
+#define USB_OTG_DTHRCTL_TXTHRLEN_Msk            (0x1FFUL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x000007FC */
+#define USB_OTG_DTHRCTL_TXTHRLEN                USB_OTG_DTHRCTL_TXTHRLEN_Msk   /*!< Transmit threshold length */
+#define USB_OTG_DTHRCTL_TXTHRLEN_0              (0x001UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000004 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_1              (0x002UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000008 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_2              (0x004UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000010 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_3              (0x008UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000020 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_4              (0x010UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000040 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_5              (0x020UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000080 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_6              (0x040UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000100 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_7              (0x080UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000200 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_8              (0x100UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000400 */
+#define USB_OTG_DTHRCTL_RXTHREN_Pos             (16U)                          
+#define USB_OTG_DTHRCTL_RXTHREN_Msk             (0x1UL << USB_OTG_DTHRCTL_RXTHREN_Pos) /*!< 0x00010000 */
+#define USB_OTG_DTHRCTL_RXTHREN                 USB_OTG_DTHRCTL_RXTHREN_Msk    /*!< Receive threshold enable */
+
+#define USB_OTG_DTHRCTL_RXTHRLEN_Pos            (17U)                          
+#define USB_OTG_DTHRCTL_RXTHRLEN_Msk            (0x1FFUL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x03FE0000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN                USB_OTG_DTHRCTL_RXTHRLEN_Msk   /*!< Receive threshold length */
+#define USB_OTG_DTHRCTL_RXTHRLEN_0              (0x001UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00020000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_1              (0x002UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00040000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_2              (0x004UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00080000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_3              (0x008UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00100000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_4              (0x010UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00200000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_5              (0x020UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00400000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_6              (0x040UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00800000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_7              (0x080UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x01000000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_8              (0x100UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x02000000 */
+#define USB_OTG_DTHRCTL_ARPEN_Pos               (27U)                          
+#define USB_OTG_DTHRCTL_ARPEN_Msk               (0x1UL << USB_OTG_DTHRCTL_ARPEN_Pos) /*!< 0x08000000 */
+#define USB_OTG_DTHRCTL_ARPEN                   USB_OTG_DTHRCTL_ARPEN_Msk      /*!< Arbiter parking enable */
+
+/********************  Bit definition for USB_OTG_DIEPEMPMSK register  ********************/
+#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos        (0U)                           
+#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk        (0xFFFFUL << USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DIEPEMPMSK_INEPTXFEM            USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk /*!< IN EP Tx FIFO empty interrupt mask bits */
+
+/********************  Bit definition for USB_OTG_DEACHINT register  ********************/
+#define USB_OTG_DEACHINT_IEP1INT_Pos            (1U)                           
+#define USB_OTG_DEACHINT_IEP1INT_Msk            (0x1UL << USB_OTG_DEACHINT_IEP1INT_Pos) /*!< 0x00000002 */
+#define USB_OTG_DEACHINT_IEP1INT                USB_OTG_DEACHINT_IEP1INT_Msk   /*!< IN endpoint 1interrupt bit */
+#define USB_OTG_DEACHINT_OEP1INT_Pos            (17U)                          
+#define USB_OTG_DEACHINT_OEP1INT_Msk            (0x1UL << USB_OTG_DEACHINT_OEP1INT_Pos) /*!< 0x00020000 */
+#define USB_OTG_DEACHINT_OEP1INT                USB_OTG_DEACHINT_OEP1INT_Msk   /*!< OUT endpoint 1 interrupt bit */
+
+/********************  Bit definition for USB_OTG_GCCFG register  ********************/
+#define USB_OTG_GCCFG_PWRDWN_Pos                (16U)                          
+#define USB_OTG_GCCFG_PWRDWN_Msk                (0x1UL << USB_OTG_GCCFG_PWRDWN_Pos) /*!< 0x00010000 */
+#define USB_OTG_GCCFG_PWRDWN                    USB_OTG_GCCFG_PWRDWN_Msk       /*!< Power down */
+#define USB_OTG_GCCFG_VBUSASEN_Pos              (18U)                          
+#define USB_OTG_GCCFG_VBUSASEN_Msk              (0x1UL << USB_OTG_GCCFG_VBUSASEN_Pos) /*!< 0x00040000 */
+#define USB_OTG_GCCFG_VBUSASEN                  USB_OTG_GCCFG_VBUSASEN_Msk     /*!< Enable the VBUS sensing device */
+#define USB_OTG_GCCFG_VBUSBSEN_Pos              (19U)                          
+#define USB_OTG_GCCFG_VBUSBSEN_Msk              (0x1UL << USB_OTG_GCCFG_VBUSBSEN_Pos) /*!< 0x00080000 */
+#define USB_OTG_GCCFG_VBUSBSEN                  USB_OTG_GCCFG_VBUSBSEN_Msk     /*!< Enable the VBUS sensing device */
+#define USB_OTG_GCCFG_SOFOUTEN_Pos              (20U)                          
+#define USB_OTG_GCCFG_SOFOUTEN_Msk              (0x1UL << USB_OTG_GCCFG_SOFOUTEN_Pos) /*!< 0x00100000 */
+#define USB_OTG_GCCFG_SOFOUTEN                  USB_OTG_GCCFG_SOFOUTEN_Msk     /*!< SOF output enable */
+
+/********************  Bit definition for USB_OTG_DEACHINTMSK register  ********************/
+#define USB_OTG_DEACHINTMSK_IEP1INTM_Pos        (1U)                           
+#define USB_OTG_DEACHINTMSK_IEP1INTM_Msk        (0x1UL << USB_OTG_DEACHINTMSK_IEP1INTM_Pos) /*!< 0x00000002 */
+#define USB_OTG_DEACHINTMSK_IEP1INTM            USB_OTG_DEACHINTMSK_IEP1INTM_Msk /*!< IN Endpoint 1 interrupt mask bit */
+#define USB_OTG_DEACHINTMSK_OEP1INTM_Pos        (17U)                          
+#define USB_OTG_DEACHINTMSK_OEP1INTM_Msk        (0x1UL << USB_OTG_DEACHINTMSK_OEP1INTM_Pos) /*!< 0x00020000 */
+#define USB_OTG_DEACHINTMSK_OEP1INTM            USB_OTG_DEACHINTMSK_OEP1INTM_Msk /*!< OUT Endpoint 1 interrupt mask bit */
+
+/********************  Bit definition for USB_OTG_CID register  ********************/
+#define USB_OTG_CID_PRODUCT_ID_Pos              (0U)                           
+#define USB_OTG_CID_PRODUCT_ID_Msk              (0xFFFFFFFFUL << USB_OTG_CID_PRODUCT_ID_Pos) /*!< 0xFFFFFFFF */
+#define USB_OTG_CID_PRODUCT_ID                  USB_OTG_CID_PRODUCT_ID_Msk     /*!< Product ID field */
+
+/********************  Bit definition for USB_OTG_DIEPEACHMSK1 register  ********************/
+#define USB_OTG_DIEPEACHMSK1_XFRCM_Pos          (0U)                           
+#define USB_OTG_DIEPEACHMSK1_XFRCM_Msk          (0x1UL << USB_OTG_DIEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */
+#define USB_OTG_DIEPEACHMSK1_XFRCM              USB_OTG_DIEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */
+#define USB_OTG_DIEPEACHMSK1_EPDM_Pos           (1U)                           
+#define USB_OTG_DIEPEACHMSK1_EPDM_Msk           (0x1UL << USB_OTG_DIEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */
+#define USB_OTG_DIEPEACHMSK1_EPDM               USB_OTG_DIEPEACHMSK1_EPDM_Msk  /*!< Endpoint disabled interrupt mask */
+#define USB_OTG_DIEPEACHMSK1_TOM_Pos            (3U)                           
+#define USB_OTG_DIEPEACHMSK1_TOM_Msk            (0x1UL << USB_OTG_DIEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */
+#define USB_OTG_DIEPEACHMSK1_TOM                USB_OTG_DIEPEACHMSK1_TOM_Msk   /*!< Timeout condition mask (nonisochronous endpoints) */
+#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos      (4U)                           
+#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk      (0x1UL << USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */
+#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK          USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */
+#define USB_OTG_DIEPEACHMSK1_INEPNMM_Pos        (5U)                           
+#define USB_OTG_DIEPEACHMSK1_INEPNMM_Msk        (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */
+#define USB_OTG_DIEPEACHMSK1_INEPNMM            USB_OTG_DIEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */
+#define USB_OTG_DIEPEACHMSK1_INEPNEM_Pos        (6U)                           
+#define USB_OTG_DIEPEACHMSK1_INEPNEM_Msk        (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */
+#define USB_OTG_DIEPEACHMSK1_INEPNEM            USB_OTG_DIEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */
+#define USB_OTG_DIEPEACHMSK1_TXFURM_Pos         (8U)                           
+#define USB_OTG_DIEPEACHMSK1_TXFURM_Msk         (0x1UL << USB_OTG_DIEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */
+#define USB_OTG_DIEPEACHMSK1_TXFURM             USB_OTG_DIEPEACHMSK1_TXFURM_Msk /*!< FIFO underrun mask */
+#define USB_OTG_DIEPEACHMSK1_BIM_Pos            (9U)                           
+#define USB_OTG_DIEPEACHMSK1_BIM_Msk            (0x1UL << USB_OTG_DIEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */
+#define USB_OTG_DIEPEACHMSK1_BIM                USB_OTG_DIEPEACHMSK1_BIM_Msk   /*!< BNA interrupt mask */
+#define USB_OTG_DIEPEACHMSK1_NAKM_Pos           (13U)                          
+#define USB_OTG_DIEPEACHMSK1_NAKM_Msk           (0x1UL << USB_OTG_DIEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */
+#define USB_OTG_DIEPEACHMSK1_NAKM               USB_OTG_DIEPEACHMSK1_NAKM_Msk  /*!< NAK interrupt mask */
+
+/********************  Bit definition for USB_OTG_HPRT register  ********************/
+#define USB_OTG_HPRT_PCSTS_Pos                  (0U)                           
+#define USB_OTG_HPRT_PCSTS_Msk                  (0x1UL << USB_OTG_HPRT_PCSTS_Pos) /*!< 0x00000001 */
+#define USB_OTG_HPRT_PCSTS                      USB_OTG_HPRT_PCSTS_Msk         /*!< Port connect status */
+#define USB_OTG_HPRT_PCDET_Pos                  (1U)                           
+#define USB_OTG_HPRT_PCDET_Msk                  (0x1UL << USB_OTG_HPRT_PCDET_Pos) /*!< 0x00000002 */
+#define USB_OTG_HPRT_PCDET                      USB_OTG_HPRT_PCDET_Msk         /*!< Port connect detected */
+#define USB_OTG_HPRT_PENA_Pos                   (2U)                           
+#define USB_OTG_HPRT_PENA_Msk                   (0x1UL << USB_OTG_HPRT_PENA_Pos) /*!< 0x00000004 */
+#define USB_OTG_HPRT_PENA                       USB_OTG_HPRT_PENA_Msk          /*!< Port enable */
+#define USB_OTG_HPRT_PENCHNG_Pos                (3U)                           
+#define USB_OTG_HPRT_PENCHNG_Msk                (0x1UL << USB_OTG_HPRT_PENCHNG_Pos) /*!< 0x00000008 */
+#define USB_OTG_HPRT_PENCHNG                    USB_OTG_HPRT_PENCHNG_Msk       /*!< Port enable/disable change */
+#define USB_OTG_HPRT_POCA_Pos                   (4U)                           
+#define USB_OTG_HPRT_POCA_Msk                   (0x1UL << USB_OTG_HPRT_POCA_Pos) /*!< 0x00000010 */
+#define USB_OTG_HPRT_POCA                       USB_OTG_HPRT_POCA_Msk          /*!< Port overcurrent active */
+#define USB_OTG_HPRT_POCCHNG_Pos                (5U)                           
+#define USB_OTG_HPRT_POCCHNG_Msk                (0x1UL << USB_OTG_HPRT_POCCHNG_Pos) /*!< 0x00000020 */
+#define USB_OTG_HPRT_POCCHNG                    USB_OTG_HPRT_POCCHNG_Msk       /*!< Port overcurrent change */
+#define USB_OTG_HPRT_PRES_Pos                   (6U)                           
+#define USB_OTG_HPRT_PRES_Msk                   (0x1UL << USB_OTG_HPRT_PRES_Pos) /*!< 0x00000040 */
+#define USB_OTG_HPRT_PRES                       USB_OTG_HPRT_PRES_Msk          /*!< Port resume */
+#define USB_OTG_HPRT_PSUSP_Pos                  (7U)                           
+#define USB_OTG_HPRT_PSUSP_Msk                  (0x1UL << USB_OTG_HPRT_PSUSP_Pos) /*!< 0x00000080 */
+#define USB_OTG_HPRT_PSUSP                      USB_OTG_HPRT_PSUSP_Msk         /*!< Port suspend */
+#define USB_OTG_HPRT_PRST_Pos                   (8U)                           
+#define USB_OTG_HPRT_PRST_Msk                   (0x1UL << USB_OTG_HPRT_PRST_Pos) /*!< 0x00000100 */
+#define USB_OTG_HPRT_PRST                       USB_OTG_HPRT_PRST_Msk          /*!< Port reset */
+
+#define USB_OTG_HPRT_PLSTS_Pos                  (10U)                          
+#define USB_OTG_HPRT_PLSTS_Msk                  (0x3UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000C00 */
+#define USB_OTG_HPRT_PLSTS                      USB_OTG_HPRT_PLSTS_Msk         /*!< Port line status */
+#define USB_OTG_HPRT_PLSTS_0                    (0x1UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000400 */
+#define USB_OTG_HPRT_PLSTS_1                    (0x2UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000800 */
+#define USB_OTG_HPRT_PPWR_Pos                   (12U)                          
+#define USB_OTG_HPRT_PPWR_Msk                   (0x1UL << USB_OTG_HPRT_PPWR_Pos) /*!< 0x00001000 */
+#define USB_OTG_HPRT_PPWR                       USB_OTG_HPRT_PPWR_Msk          /*!< Port power */
+
+#define USB_OTG_HPRT_PTCTL_Pos                  (13U)                          
+#define USB_OTG_HPRT_PTCTL_Msk                  (0xFUL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x0001E000 */
+#define USB_OTG_HPRT_PTCTL                      USB_OTG_HPRT_PTCTL_Msk         /*!< Port test control */
+#define USB_OTG_HPRT_PTCTL_0                    (0x1UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00002000 */
+#define USB_OTG_HPRT_PTCTL_1                    (0x2UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00004000 */
+#define USB_OTG_HPRT_PTCTL_2                    (0x4UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00008000 */
+#define USB_OTG_HPRT_PTCTL_3                    (0x8UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00010000 */
+
+#define USB_OTG_HPRT_PSPD_Pos                   (17U)                          
+#define USB_OTG_HPRT_PSPD_Msk                   (0x3UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00060000 */
+#define USB_OTG_HPRT_PSPD                       USB_OTG_HPRT_PSPD_Msk          /*!< Port speed */
+#define USB_OTG_HPRT_PSPD_0                     (0x1UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00020000 */
+#define USB_OTG_HPRT_PSPD_1                     (0x2UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00040000 */
+
+/********************  Bit definition for USB_OTG_DOEPEACHMSK1 register  ********************/
+#define USB_OTG_DOEPEACHMSK1_XFRCM_Pos          (0U)                           
+#define USB_OTG_DOEPEACHMSK1_XFRCM_Msk          (0x1UL << USB_OTG_DOEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */
+#define USB_OTG_DOEPEACHMSK1_XFRCM              USB_OTG_DOEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */
+#define USB_OTG_DOEPEACHMSK1_EPDM_Pos           (1U)                           
+#define USB_OTG_DOEPEACHMSK1_EPDM_Msk           (0x1UL << USB_OTG_DOEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */
+#define USB_OTG_DOEPEACHMSK1_EPDM               USB_OTG_DOEPEACHMSK1_EPDM_Msk  /*!< Endpoint disabled interrupt mask */
+#define USB_OTG_DOEPEACHMSK1_TOM_Pos            (3U)                           
+#define USB_OTG_DOEPEACHMSK1_TOM_Msk            (0x1UL << USB_OTG_DOEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */
+#define USB_OTG_DOEPEACHMSK1_TOM                USB_OTG_DOEPEACHMSK1_TOM_Msk   /*!< Timeout condition mask */
+#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos      (4U)                           
+#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk      (0x1UL << USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */
+#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK          USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */
+#define USB_OTG_DOEPEACHMSK1_INEPNMM_Pos        (5U)                           
+#define USB_OTG_DOEPEACHMSK1_INEPNMM_Msk        (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */
+#define USB_OTG_DOEPEACHMSK1_INEPNMM            USB_OTG_DOEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */
+#define USB_OTG_DOEPEACHMSK1_INEPNEM_Pos        (6U)                           
+#define USB_OTG_DOEPEACHMSK1_INEPNEM_Msk        (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */
+#define USB_OTG_DOEPEACHMSK1_INEPNEM            USB_OTG_DOEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */
+#define USB_OTG_DOEPEACHMSK1_TXFURM_Pos         (8U)                           
+#define USB_OTG_DOEPEACHMSK1_TXFURM_Msk         (0x1UL << USB_OTG_DOEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */
+#define USB_OTG_DOEPEACHMSK1_TXFURM             USB_OTG_DOEPEACHMSK1_TXFURM_Msk /*!< OUT packet error mask */
+#define USB_OTG_DOEPEACHMSK1_BIM_Pos            (9U)                           
+#define USB_OTG_DOEPEACHMSK1_BIM_Msk            (0x1UL << USB_OTG_DOEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */
+#define USB_OTG_DOEPEACHMSK1_BIM                USB_OTG_DOEPEACHMSK1_BIM_Msk   /*!< BNA interrupt mask */
+#define USB_OTG_DOEPEACHMSK1_BERRM_Pos          (12U)                          
+#define USB_OTG_DOEPEACHMSK1_BERRM_Msk          (0x1UL << USB_OTG_DOEPEACHMSK1_BERRM_Pos) /*!< 0x00001000 */
+#define USB_OTG_DOEPEACHMSK1_BERRM              USB_OTG_DOEPEACHMSK1_BERRM_Msk /*!< Bubble error interrupt mask */
+#define USB_OTG_DOEPEACHMSK1_NAKM_Pos           (13U)                          
+#define USB_OTG_DOEPEACHMSK1_NAKM_Msk           (0x1UL << USB_OTG_DOEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */
+#define USB_OTG_DOEPEACHMSK1_NAKM               USB_OTG_DOEPEACHMSK1_NAKM_Msk  /*!< NAK interrupt mask */
+#define USB_OTG_DOEPEACHMSK1_NYETM_Pos          (14U)                          
+#define USB_OTG_DOEPEACHMSK1_NYETM_Msk          (0x1UL << USB_OTG_DOEPEACHMSK1_NYETM_Pos) /*!< 0x00004000 */
+#define USB_OTG_DOEPEACHMSK1_NYETM              USB_OTG_DOEPEACHMSK1_NYETM_Msk /*!< NYET interrupt mask */
+
+/********************  Bit definition for USB_OTG_HPTXFSIZ register  ********************/
+#define USB_OTG_HPTXFSIZ_PTXSA_Pos              (0U)                           
+#define USB_OTG_HPTXFSIZ_PTXSA_Msk              (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXSA_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HPTXFSIZ_PTXSA                  USB_OTG_HPTXFSIZ_PTXSA_Msk     /*!< Host periodic TxFIFO start address */
+#define USB_OTG_HPTXFSIZ_PTXFD_Pos              (16U)                          
+#define USB_OTG_HPTXFSIZ_PTXFD_Msk              (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXFD_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_HPTXFSIZ_PTXFD                  USB_OTG_HPTXFSIZ_PTXFD_Msk     /*!< Host periodic TxFIFO depth */
+
+/********************  Bit definition for USB_OTG_DIEPCTL register  ********************/
+#define USB_OTG_DIEPCTL_MPSIZ_Pos               (0U)                           
+#define USB_OTG_DIEPCTL_MPSIZ_Msk               (0x7FFUL << USB_OTG_DIEPCTL_MPSIZ_Pos) /*!< 0x000007FF */
+#define USB_OTG_DIEPCTL_MPSIZ                   USB_OTG_DIEPCTL_MPSIZ_Msk      /*!< Maximum packet size */
+#define USB_OTG_DIEPCTL_USBAEP_Pos              (15U)                          
+#define USB_OTG_DIEPCTL_USBAEP_Msk              (0x1UL << USB_OTG_DIEPCTL_USBAEP_Pos) /*!< 0x00008000 */
+#define USB_OTG_DIEPCTL_USBAEP                  USB_OTG_DIEPCTL_USBAEP_Msk     /*!< USB active endpoint */
+#define USB_OTG_DIEPCTL_EONUM_DPID_Pos          (16U)                          
+#define USB_OTG_DIEPCTL_EONUM_DPID_Msk          (0x1UL << USB_OTG_DIEPCTL_EONUM_DPID_Pos) /*!< 0x00010000 */
+#define USB_OTG_DIEPCTL_EONUM_DPID              USB_OTG_DIEPCTL_EONUM_DPID_Msk /*!< Even/odd frame */
+#define USB_OTG_DIEPCTL_NAKSTS_Pos              (17U)                          
+#define USB_OTG_DIEPCTL_NAKSTS_Msk              (0x1UL << USB_OTG_DIEPCTL_NAKSTS_Pos) /*!< 0x00020000 */
+#define USB_OTG_DIEPCTL_NAKSTS                  USB_OTG_DIEPCTL_NAKSTS_Msk     /*!< NAK status */
+
+#define USB_OTG_DIEPCTL_EPTYP_Pos               (18U)                          
+#define USB_OTG_DIEPCTL_EPTYP_Msk               (0x3UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x000C0000 */
+#define USB_OTG_DIEPCTL_EPTYP                   USB_OTG_DIEPCTL_EPTYP_Msk      /*!< Endpoint type */
+#define USB_OTG_DIEPCTL_EPTYP_0                 (0x1UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00040000 */
+#define USB_OTG_DIEPCTL_EPTYP_1                 (0x2UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00080000 */
+#define USB_OTG_DIEPCTL_STALL_Pos               (21U)                          
+#define USB_OTG_DIEPCTL_STALL_Msk               (0x1UL << USB_OTG_DIEPCTL_STALL_Pos) /*!< 0x00200000 */
+#define USB_OTG_DIEPCTL_STALL                   USB_OTG_DIEPCTL_STALL_Msk      /*!< STALL handshake */
+
+#define USB_OTG_DIEPCTL_TXFNUM_Pos              (22U)                          
+#define USB_OTG_DIEPCTL_TXFNUM_Msk              (0xFUL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x03C00000 */
+#define USB_OTG_DIEPCTL_TXFNUM                  USB_OTG_DIEPCTL_TXFNUM_Msk     /*!< TxFIFO number */
+#define USB_OTG_DIEPCTL_TXFNUM_0                (0x1UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00400000 */
+#define USB_OTG_DIEPCTL_TXFNUM_1                (0x2UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00800000 */
+#define USB_OTG_DIEPCTL_TXFNUM_2                (0x4UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x01000000 */
+#define USB_OTG_DIEPCTL_TXFNUM_3                (0x8UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x02000000 */
+#define USB_OTG_DIEPCTL_CNAK_Pos                (26U)                          
+#define USB_OTG_DIEPCTL_CNAK_Msk                (0x1UL << USB_OTG_DIEPCTL_CNAK_Pos) /*!< 0x04000000 */
+#define USB_OTG_DIEPCTL_CNAK                    USB_OTG_DIEPCTL_CNAK_Msk       /*!< Clear NAK */
+#define USB_OTG_DIEPCTL_SNAK_Pos                (27U)                          
+#define USB_OTG_DIEPCTL_SNAK_Msk                (0x1UL << USB_OTG_DIEPCTL_SNAK_Pos) /*!< 0x08000000 */
+#define USB_OTG_DIEPCTL_SNAK                    USB_OTG_DIEPCTL_SNAK_Msk       /*!< Set NAK */
+#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos      (28U)                          
+#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk      (0x1UL << USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos) /*!< 0x10000000 */
+#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM          USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk /*!< Set DATA0 PID */
+#define USB_OTG_DIEPCTL_SODDFRM_Pos             (29U)                          
+#define USB_OTG_DIEPCTL_SODDFRM_Msk             (0x1UL << USB_OTG_DIEPCTL_SODDFRM_Pos) /*!< 0x20000000 */
+#define USB_OTG_DIEPCTL_SODDFRM                 USB_OTG_DIEPCTL_SODDFRM_Msk    /*!< Set odd frame */
+#define USB_OTG_DIEPCTL_EPDIS_Pos               (30U)                          
+#define USB_OTG_DIEPCTL_EPDIS_Msk               (0x1UL << USB_OTG_DIEPCTL_EPDIS_Pos) /*!< 0x40000000 */
+#define USB_OTG_DIEPCTL_EPDIS                   USB_OTG_DIEPCTL_EPDIS_Msk      /*!< Endpoint disable */
+#define USB_OTG_DIEPCTL_EPENA_Pos               (31U)                          
+#define USB_OTG_DIEPCTL_EPENA_Msk               (0x1UL << USB_OTG_DIEPCTL_EPENA_Pos) /*!< 0x80000000 */
+#define USB_OTG_DIEPCTL_EPENA                   USB_OTG_DIEPCTL_EPENA_Msk      /*!< Endpoint enable */
+
+/********************  Bit definition for USB_OTG_HCCHAR register  ********************/
+#define USB_OTG_HCCHAR_MPSIZ_Pos                (0U)                           
+#define USB_OTG_HCCHAR_MPSIZ_Msk                (0x7FFUL << USB_OTG_HCCHAR_MPSIZ_Pos) /*!< 0x000007FF */
+#define USB_OTG_HCCHAR_MPSIZ                    USB_OTG_HCCHAR_MPSIZ_Msk       /*!< Maximum packet size */
+
+#define USB_OTG_HCCHAR_EPNUM_Pos                (11U)                          
+#define USB_OTG_HCCHAR_EPNUM_Msk                (0xFUL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00007800 */
+#define USB_OTG_HCCHAR_EPNUM                    USB_OTG_HCCHAR_EPNUM_Msk       /*!< Endpoint number */
+#define USB_OTG_HCCHAR_EPNUM_0                  (0x1UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00000800 */
+#define USB_OTG_HCCHAR_EPNUM_1                  (0x2UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00001000 */
+#define USB_OTG_HCCHAR_EPNUM_2                  (0x4UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00002000 */
+#define USB_OTG_HCCHAR_EPNUM_3                  (0x8UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00004000 */
+#define USB_OTG_HCCHAR_EPDIR_Pos                (15U)                          
+#define USB_OTG_HCCHAR_EPDIR_Msk                (0x1UL << USB_OTG_HCCHAR_EPDIR_Pos) /*!< 0x00008000 */
+#define USB_OTG_HCCHAR_EPDIR                    USB_OTG_HCCHAR_EPDIR_Msk       /*!< Endpoint direction */
+#define USB_OTG_HCCHAR_LSDEV_Pos                (17U)                          
+#define USB_OTG_HCCHAR_LSDEV_Msk                (0x1UL << USB_OTG_HCCHAR_LSDEV_Pos) /*!< 0x00020000 */
+#define USB_OTG_HCCHAR_LSDEV                    USB_OTG_HCCHAR_LSDEV_Msk       /*!< Low-speed device */
+
+#define USB_OTG_HCCHAR_EPTYP_Pos                (18U)                          
+#define USB_OTG_HCCHAR_EPTYP_Msk                (0x3UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x000C0000 */
+#define USB_OTG_HCCHAR_EPTYP                    USB_OTG_HCCHAR_EPTYP_Msk       /*!< Endpoint type */
+#define USB_OTG_HCCHAR_EPTYP_0                  (0x1UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00040000 */
+#define USB_OTG_HCCHAR_EPTYP_1                  (0x2UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00080000 */
+                                      
+#define USB_OTG_HCCHAR_MC_Pos                   (20U)                          
+#define USB_OTG_HCCHAR_MC_Msk                   (0x3UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00300000 */
+#define USB_OTG_HCCHAR_MC                       USB_OTG_HCCHAR_MC_Msk          /*!< Multi Count (MC) / Error Count (EC) */
+#define USB_OTG_HCCHAR_MC_0                     (0x1UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00100000 */
+#define USB_OTG_HCCHAR_MC_1                     (0x2UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00200000 */
+
+#define USB_OTG_HCCHAR_DAD_Pos                  (22U)                          
+#define USB_OTG_HCCHAR_DAD_Msk                  (0x7FUL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x1FC00000 */
+#define USB_OTG_HCCHAR_DAD                      USB_OTG_HCCHAR_DAD_Msk         /*!< Device address */
+#define USB_OTG_HCCHAR_DAD_0                    (0x01UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x00400000 */
+#define USB_OTG_HCCHAR_DAD_1                    (0x02UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x00800000 */
+#define USB_OTG_HCCHAR_DAD_2                    (0x04UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x01000000 */
+#define USB_OTG_HCCHAR_DAD_3                    (0x08UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x02000000 */
+#define USB_OTG_HCCHAR_DAD_4                    (0x10UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x04000000 */
+#define USB_OTG_HCCHAR_DAD_5                    (0x20UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x08000000 */
+#define USB_OTG_HCCHAR_DAD_6                    (0x40UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x10000000 */
+#define USB_OTG_HCCHAR_ODDFRM_Pos               (29U)                          
+#define USB_OTG_HCCHAR_ODDFRM_Msk               (0x1UL << USB_OTG_HCCHAR_ODDFRM_Pos) /*!< 0x20000000 */
+#define USB_OTG_HCCHAR_ODDFRM                   USB_OTG_HCCHAR_ODDFRM_Msk      /*!< Odd frame */
+#define USB_OTG_HCCHAR_CHDIS_Pos                (30U)                          
+#define USB_OTG_HCCHAR_CHDIS_Msk                (0x1UL << USB_OTG_HCCHAR_CHDIS_Pos) /*!< 0x40000000 */
+#define USB_OTG_HCCHAR_CHDIS                    USB_OTG_HCCHAR_CHDIS_Msk       /*!< Channel disable */
+#define USB_OTG_HCCHAR_CHENA_Pos                (31U)                          
+#define USB_OTG_HCCHAR_CHENA_Msk                (0x1UL << USB_OTG_HCCHAR_CHENA_Pos) /*!< 0x80000000 */
+#define USB_OTG_HCCHAR_CHENA                    USB_OTG_HCCHAR_CHENA_Msk       /*!< Channel enable */
+
+/********************  Bit definition for USB_OTG_HCSPLT register  ********************/
+
+#define USB_OTG_HCSPLT_PRTADDR_Pos              (0U)                           
+#define USB_OTG_HCSPLT_PRTADDR_Msk              (0x7FUL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x0000007F */
+#define USB_OTG_HCSPLT_PRTADDR                  USB_OTG_HCSPLT_PRTADDR_Msk     /*!< Port address */
+#define USB_OTG_HCSPLT_PRTADDR_0                (0x01UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000001 */
+#define USB_OTG_HCSPLT_PRTADDR_1                (0x02UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000002 */
+#define USB_OTG_HCSPLT_PRTADDR_2                (0x04UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000004 */
+#define USB_OTG_HCSPLT_PRTADDR_3                (0x08UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000008 */
+#define USB_OTG_HCSPLT_PRTADDR_4                (0x10UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000010 */
+#define USB_OTG_HCSPLT_PRTADDR_5                (0x20UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000020 */
+#define USB_OTG_HCSPLT_PRTADDR_6                (0x40UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000040 */
+
+#define USB_OTG_HCSPLT_HUBADDR_Pos              (7U)                           
+#define USB_OTG_HCSPLT_HUBADDR_Msk              (0x7FUL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00003F80 */
+#define USB_OTG_HCSPLT_HUBADDR                  USB_OTG_HCSPLT_HUBADDR_Msk     /*!< Hub address */
+#define USB_OTG_HCSPLT_HUBADDR_0                (0x01UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000080 */
+#define USB_OTG_HCSPLT_HUBADDR_1                (0x02UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000100 */
+#define USB_OTG_HCSPLT_HUBADDR_2                (0x04UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000200 */
+#define USB_OTG_HCSPLT_HUBADDR_3                (0x08UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000400 */
+#define USB_OTG_HCSPLT_HUBADDR_4                (0x10UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000800 */
+#define USB_OTG_HCSPLT_HUBADDR_5                (0x20UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00001000 */
+#define USB_OTG_HCSPLT_HUBADDR_6                (0x40UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00002000 */
+
+#define USB_OTG_HCSPLT_XACTPOS_Pos              (14U)                          
+#define USB_OTG_HCSPLT_XACTPOS_Msk              (0x3UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x0000C000 */
+#define USB_OTG_HCSPLT_XACTPOS                  USB_OTG_HCSPLT_XACTPOS_Msk     /*!< XACTPOS */
+#define USB_OTG_HCSPLT_XACTPOS_0                (0x1UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00004000 */
+#define USB_OTG_HCSPLT_XACTPOS_1                (0x2UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00008000 */
+#define USB_OTG_HCSPLT_COMPLSPLT_Pos            (16U)                          
+#define USB_OTG_HCSPLT_COMPLSPLT_Msk            (0x1UL << USB_OTG_HCSPLT_COMPLSPLT_Pos) /*!< 0x00010000 */
+#define USB_OTG_HCSPLT_COMPLSPLT                USB_OTG_HCSPLT_COMPLSPLT_Msk   /*!< Do complete split */
+#define USB_OTG_HCSPLT_SPLITEN_Pos              (31U)                          
+#define USB_OTG_HCSPLT_SPLITEN_Msk              (0x1UL << USB_OTG_HCSPLT_SPLITEN_Pos) /*!< 0x80000000 */
+#define USB_OTG_HCSPLT_SPLITEN                  USB_OTG_HCSPLT_SPLITEN_Msk     /*!< Split enable */
+
+/********************  Bit definition for USB_OTG_HCINT register  ********************/
+#define USB_OTG_HCINT_XFRC_Pos                  (0U)                           
+#define USB_OTG_HCINT_XFRC_Msk                  (0x1UL << USB_OTG_HCINT_XFRC_Pos) /*!< 0x00000001 */
+#define USB_OTG_HCINT_XFRC                      USB_OTG_HCINT_XFRC_Msk         /*!< Transfer completed */
+#define USB_OTG_HCINT_CHH_Pos                   (1U)                           
+#define USB_OTG_HCINT_CHH_Msk                   (0x1UL << USB_OTG_HCINT_CHH_Pos) /*!< 0x00000002 */
+#define USB_OTG_HCINT_CHH                       USB_OTG_HCINT_CHH_Msk          /*!< Channel halted */
+#define USB_OTG_HCINT_AHBERR_Pos                (2U)                           
+#define USB_OTG_HCINT_AHBERR_Msk                (0x1UL << USB_OTG_HCINT_AHBERR_Pos) /*!< 0x00000004 */
+#define USB_OTG_HCINT_AHBERR                    USB_OTG_HCINT_AHBERR_Msk       /*!< AHB error */
+#define USB_OTG_HCINT_STALL_Pos                 (3U)                           
+#define USB_OTG_HCINT_STALL_Msk                 (0x1UL << USB_OTG_HCINT_STALL_Pos) /*!< 0x00000008 */
+#define USB_OTG_HCINT_STALL                     USB_OTG_HCINT_STALL_Msk        /*!< STALL response received interrupt */
+#define USB_OTG_HCINT_NAK_Pos                   (4U)                           
+#define USB_OTG_HCINT_NAK_Msk                   (0x1UL << USB_OTG_HCINT_NAK_Pos) /*!< 0x00000010 */
+#define USB_OTG_HCINT_NAK                       USB_OTG_HCINT_NAK_Msk          /*!< NAK response received interrupt */
+#define USB_OTG_HCINT_ACK_Pos                   (5U)                           
+#define USB_OTG_HCINT_ACK_Msk                   (0x1UL << USB_OTG_HCINT_ACK_Pos) /*!< 0x00000020 */
+#define USB_OTG_HCINT_ACK                       USB_OTG_HCINT_ACK_Msk          /*!< ACK response received/transmitted interrupt */
+#define USB_OTG_HCINT_NYET_Pos                  (6U)                           
+#define USB_OTG_HCINT_NYET_Msk                  (0x1UL << USB_OTG_HCINT_NYET_Pos) /*!< 0x00000040 */
+#define USB_OTG_HCINT_NYET                      USB_OTG_HCINT_NYET_Msk         /*!< Response received interrupt */
+#define USB_OTG_HCINT_TXERR_Pos                 (7U)                           
+#define USB_OTG_HCINT_TXERR_Msk                 (0x1UL << USB_OTG_HCINT_TXERR_Pos) /*!< 0x00000080 */
+#define USB_OTG_HCINT_TXERR                     USB_OTG_HCINT_TXERR_Msk        /*!< Transaction error */
+#define USB_OTG_HCINT_BBERR_Pos                 (8U)                           
+#define USB_OTG_HCINT_BBERR_Msk                 (0x1UL << USB_OTG_HCINT_BBERR_Pos) /*!< 0x00000100 */
+#define USB_OTG_HCINT_BBERR                     USB_OTG_HCINT_BBERR_Msk        /*!< Babble error */
+#define USB_OTG_HCINT_FRMOR_Pos                 (9U)                           
+#define USB_OTG_HCINT_FRMOR_Msk                 (0x1UL << USB_OTG_HCINT_FRMOR_Pos) /*!< 0x00000200 */
+#define USB_OTG_HCINT_FRMOR                     USB_OTG_HCINT_FRMOR_Msk        /*!< Frame overrun */
+#define USB_OTG_HCINT_DTERR_Pos                 (10U)                          
+#define USB_OTG_HCINT_DTERR_Msk                 (0x1UL << USB_OTG_HCINT_DTERR_Pos) /*!< 0x00000400 */
+#define USB_OTG_HCINT_DTERR                     USB_OTG_HCINT_DTERR_Msk        /*!< Data toggle error */
+
+/********************  Bit definition for USB_OTG_DIEPINT register  ********************/
+#define USB_OTG_DIEPINT_XFRC_Pos                (0U)                           
+#define USB_OTG_DIEPINT_XFRC_Msk                (0x1UL << USB_OTG_DIEPINT_XFRC_Pos) /*!< 0x00000001 */
+#define USB_OTG_DIEPINT_XFRC                    USB_OTG_DIEPINT_XFRC_Msk       /*!< Transfer completed interrupt */
+#define USB_OTG_DIEPINT_EPDISD_Pos              (1U)                           
+#define USB_OTG_DIEPINT_EPDISD_Msk              (0x1UL << USB_OTG_DIEPINT_EPDISD_Pos) /*!< 0x00000002 */
+#define USB_OTG_DIEPINT_EPDISD                  USB_OTG_DIEPINT_EPDISD_Msk     /*!< Endpoint disabled interrupt */
+#define USB_OTG_DIEPINT_AHBERR_Pos               (2U)
+#define USB_OTG_DIEPINT_AHBERR_Msk               (0x1UL << USB_OTG_DIEPINT_AHBERR_Pos) /*!< 0x00000004 */
+#define USB_OTG_DIEPINT_AHBERR                   USB_OTG_DIEPINT_AHBERR_Msk   /*!< AHB Error (AHBErr) during an IN transaction */
+#define USB_OTG_DIEPINT_TOC_Pos                 (3U)                           
+#define USB_OTG_DIEPINT_TOC_Msk                 (0x1UL << USB_OTG_DIEPINT_TOC_Pos) /*!< 0x00000008 */
+#define USB_OTG_DIEPINT_TOC                     USB_OTG_DIEPINT_TOC_Msk        /*!< Timeout condition */
+#define USB_OTG_DIEPINT_ITTXFE_Pos              (4U)                           
+#define USB_OTG_DIEPINT_ITTXFE_Msk              (0x1UL << USB_OTG_DIEPINT_ITTXFE_Pos) /*!< 0x00000010 */
+#define USB_OTG_DIEPINT_ITTXFE                  USB_OTG_DIEPINT_ITTXFE_Msk     /*!< IN token received when TxFIFO is empty */
+#define USB_OTG_DIEPINT_INEPNM_Pos               (5U)
+#define USB_OTG_DIEPINT_INEPNM_Msk               (0x1UL << USB_OTG_DIEPINT_INEPNM_Pos) /*!< 0x00000004 */
+#define USB_OTG_DIEPINT_INEPNM                   USB_OTG_DIEPINT_INEPNM_Msk   /*!< IN token received with EP mismatch */
+#define USB_OTG_DIEPINT_INEPNE_Pos              (6U)                           
+#define USB_OTG_DIEPINT_INEPNE_Msk              (0x1UL << USB_OTG_DIEPINT_INEPNE_Pos) /*!< 0x00000040 */
+#define USB_OTG_DIEPINT_INEPNE                  USB_OTG_DIEPINT_INEPNE_Msk     /*!< IN endpoint NAK effective */
+#define USB_OTG_DIEPINT_TXFE_Pos                (7U)                           
+#define USB_OTG_DIEPINT_TXFE_Msk                (0x1UL << USB_OTG_DIEPINT_TXFE_Pos) /*!< 0x00000080 */
+#define USB_OTG_DIEPINT_TXFE                    USB_OTG_DIEPINT_TXFE_Msk       /*!< Transmit FIFO empty */
+#define USB_OTG_DIEPINT_TXFIFOUDRN_Pos          (8U)                           
+#define USB_OTG_DIEPINT_TXFIFOUDRN_Msk          (0x1UL << USB_OTG_DIEPINT_TXFIFOUDRN_Pos) /*!< 0x00000100 */
+#define USB_OTG_DIEPINT_TXFIFOUDRN              USB_OTG_DIEPINT_TXFIFOUDRN_Msk /*!< Transmit Fifo Underrun */
+#define USB_OTG_DIEPINT_BNA_Pos                 (9U)                           
+#define USB_OTG_DIEPINT_BNA_Msk                 (0x1UL << USB_OTG_DIEPINT_BNA_Pos) /*!< 0x00000200 */
+#define USB_OTG_DIEPINT_BNA                     USB_OTG_DIEPINT_BNA_Msk        /*!< Buffer not available interrupt */
+#define USB_OTG_DIEPINT_PKTDRPSTS_Pos           (11U)                          
+#define USB_OTG_DIEPINT_PKTDRPSTS_Msk           (0x1UL << USB_OTG_DIEPINT_PKTDRPSTS_Pos) /*!< 0x00000800 */
+#define USB_OTG_DIEPINT_PKTDRPSTS               USB_OTG_DIEPINT_PKTDRPSTS_Msk  /*!< Packet dropped status */
+#define USB_OTG_DIEPINT_BERR_Pos                (12U)                          
+#define USB_OTG_DIEPINT_BERR_Msk                (0x1UL << USB_OTG_DIEPINT_BERR_Pos) /*!< 0x00001000 */
+#define USB_OTG_DIEPINT_BERR                    USB_OTG_DIEPINT_BERR_Msk       /*!< Babble error interrupt */
+#define USB_OTG_DIEPINT_NAK_Pos                 (13U)                          
+#define USB_OTG_DIEPINT_NAK_Msk                 (0x1UL << USB_OTG_DIEPINT_NAK_Pos) /*!< 0x00002000 */
+#define USB_OTG_DIEPINT_NAK                     USB_OTG_DIEPINT_NAK_Msk        /*!< NAK interrupt */
+
+/********************  Bit definition for USB_OTG_HCINTMSK register  ********************/
+#define USB_OTG_HCINTMSK_XFRCM_Pos              (0U)                           
+#define USB_OTG_HCINTMSK_XFRCM_Msk              (0x1UL << USB_OTG_HCINTMSK_XFRCM_Pos) /*!< 0x00000001 */
+#define USB_OTG_HCINTMSK_XFRCM                  USB_OTG_HCINTMSK_XFRCM_Msk     /*!< Transfer completed mask */
+#define USB_OTG_HCINTMSK_CHHM_Pos               (1U)                           
+#define USB_OTG_HCINTMSK_CHHM_Msk               (0x1UL << USB_OTG_HCINTMSK_CHHM_Pos) /*!< 0x00000002 */
+#define USB_OTG_HCINTMSK_CHHM                   USB_OTG_HCINTMSK_CHHM_Msk      /*!< Channel halted mask */
+#define USB_OTG_HCINTMSK_AHBERR_Pos             (2U)                           
+#define USB_OTG_HCINTMSK_AHBERR_Msk             (0x1UL << USB_OTG_HCINTMSK_AHBERR_Pos) /*!< 0x00000004 */
+#define USB_OTG_HCINTMSK_AHBERR                 USB_OTG_HCINTMSK_AHBERR_Msk    /*!< AHB error */
+#define USB_OTG_HCINTMSK_STALLM_Pos             (3U)                           
+#define USB_OTG_HCINTMSK_STALLM_Msk             (0x1UL << USB_OTG_HCINTMSK_STALLM_Pos) /*!< 0x00000008 */
+#define USB_OTG_HCINTMSK_STALLM                 USB_OTG_HCINTMSK_STALLM_Msk    /*!< STALL response received interrupt mask */
+#define USB_OTG_HCINTMSK_NAKM_Pos               (4U)                           
+#define USB_OTG_HCINTMSK_NAKM_Msk               (0x1UL << USB_OTG_HCINTMSK_NAKM_Pos) /*!< 0x00000010 */
+#define USB_OTG_HCINTMSK_NAKM                   USB_OTG_HCINTMSK_NAKM_Msk      /*!< NAK response received interrupt mask */
+#define USB_OTG_HCINTMSK_ACKM_Pos               (5U)                           
+#define USB_OTG_HCINTMSK_ACKM_Msk               (0x1UL << USB_OTG_HCINTMSK_ACKM_Pos) /*!< 0x00000020 */
+#define USB_OTG_HCINTMSK_ACKM                   USB_OTG_HCINTMSK_ACKM_Msk      /*!< ACK response received/transmitted interrupt mask */
+#define USB_OTG_HCINTMSK_NYET_Pos               (6U)                           
+#define USB_OTG_HCINTMSK_NYET_Msk               (0x1UL << USB_OTG_HCINTMSK_NYET_Pos) /*!< 0x00000040 */
+#define USB_OTG_HCINTMSK_NYET                   USB_OTG_HCINTMSK_NYET_Msk      /*!< response received interrupt mask */
+#define USB_OTG_HCINTMSK_TXERRM_Pos             (7U)                           
+#define USB_OTG_HCINTMSK_TXERRM_Msk             (0x1UL << USB_OTG_HCINTMSK_TXERRM_Pos) /*!< 0x00000080 */
+#define USB_OTG_HCINTMSK_TXERRM                 USB_OTG_HCINTMSK_TXERRM_Msk    /*!< Transaction error mask */
+#define USB_OTG_HCINTMSK_BBERRM_Pos             (8U)                           
+#define USB_OTG_HCINTMSK_BBERRM_Msk             (0x1UL << USB_OTG_HCINTMSK_BBERRM_Pos) /*!< 0x00000100 */
+#define USB_OTG_HCINTMSK_BBERRM                 USB_OTG_HCINTMSK_BBERRM_Msk    /*!< Babble error mask */
+#define USB_OTG_HCINTMSK_FRMORM_Pos             (9U)                           
+#define USB_OTG_HCINTMSK_FRMORM_Msk             (0x1UL << USB_OTG_HCINTMSK_FRMORM_Pos) /*!< 0x00000200 */
+#define USB_OTG_HCINTMSK_FRMORM                 USB_OTG_HCINTMSK_FRMORM_Msk    /*!< Frame overrun mask */
+#define USB_OTG_HCINTMSK_DTERRM_Pos             (10U)                          
+#define USB_OTG_HCINTMSK_DTERRM_Msk             (0x1UL << USB_OTG_HCINTMSK_DTERRM_Pos) /*!< 0x00000400 */
+#define USB_OTG_HCINTMSK_DTERRM                 USB_OTG_HCINTMSK_DTERRM_Msk    /*!< Data toggle error mask */
+
+/********************  Bit definition for USB_OTG_DIEPTSIZ register  ********************/
+
+#define USB_OTG_DIEPTSIZ_XFRSIZ_Pos             (0U)                           
+#define USB_OTG_DIEPTSIZ_XFRSIZ_Msk             (0x7FFFFUL << USB_OTG_DIEPTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
+#define USB_OTG_DIEPTSIZ_XFRSIZ                 USB_OTG_DIEPTSIZ_XFRSIZ_Msk    /*!< Transfer size */
+#define USB_OTG_DIEPTSIZ_PKTCNT_Pos             (19U)                          
+#define USB_OTG_DIEPTSIZ_PKTCNT_Msk             (0x3FFUL << USB_OTG_DIEPTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
+#define USB_OTG_DIEPTSIZ_PKTCNT                 USB_OTG_DIEPTSIZ_PKTCNT_Msk    /*!< Packet count */
+#define USB_OTG_DIEPTSIZ_MULCNT_Pos             (29U)                          
+#define USB_OTG_DIEPTSIZ_MULCNT_Msk             (0x3UL << USB_OTG_DIEPTSIZ_MULCNT_Pos) /*!< 0x60000000 */
+#define USB_OTG_DIEPTSIZ_MULCNT                 USB_OTG_DIEPTSIZ_MULCNT_Msk    /*!< Packet count */
+/********************  Bit definition for USB_OTG_HCTSIZ register  ********************/
+#define USB_OTG_HCTSIZ_XFRSIZ_Pos               (0U)                           
+#define USB_OTG_HCTSIZ_XFRSIZ_Msk               (0x7FFFFUL << USB_OTG_HCTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
+#define USB_OTG_HCTSIZ_XFRSIZ                   USB_OTG_HCTSIZ_XFRSIZ_Msk      /*!< Transfer size */
+#define USB_OTG_HCTSIZ_PKTCNT_Pos               (19U)                          
+#define USB_OTG_HCTSIZ_PKTCNT_Msk               (0x3FFUL << USB_OTG_HCTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
+#define USB_OTG_HCTSIZ_PKTCNT                   USB_OTG_HCTSIZ_PKTCNT_Msk      /*!< Packet count */
+#define USB_OTG_HCTSIZ_DOPING_Pos               (31U)                          
+#define USB_OTG_HCTSIZ_DOPING_Msk               (0x1UL << USB_OTG_HCTSIZ_DOPING_Pos) /*!< 0x80000000 */
+#define USB_OTG_HCTSIZ_DOPING                   USB_OTG_HCTSIZ_DOPING_Msk      /*!< Do PING */
+#define USB_OTG_HCTSIZ_DPID_Pos                 (29U)                          
+#define USB_OTG_HCTSIZ_DPID_Msk                 (0x3UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x60000000 */
+#define USB_OTG_HCTSIZ_DPID                     USB_OTG_HCTSIZ_DPID_Msk        /*!< Data PID */
+#define USB_OTG_HCTSIZ_DPID_0                   (0x1UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x20000000 */
+#define USB_OTG_HCTSIZ_DPID_1                   (0x2UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x40000000 */
+
+/********************  Bit definition for USB_OTG_DIEPDMA register  ********************/
+#define USB_OTG_DIEPDMA_DMAADDR_Pos             (0U)                           
+#define USB_OTG_DIEPDMA_DMAADDR_Msk             (0xFFFFFFFFUL << USB_OTG_DIEPDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */
+#define USB_OTG_DIEPDMA_DMAADDR                 USB_OTG_DIEPDMA_DMAADDR_Msk    /*!< DMA address */
+
+/********************  Bit definition for USB_OTG_HCDMA register  ********************/
+#define USB_OTG_HCDMA_DMAADDR_Pos               (0U)                           
+#define USB_OTG_HCDMA_DMAADDR_Msk               (0xFFFFFFFFUL << USB_OTG_HCDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */
+#define USB_OTG_HCDMA_DMAADDR                   USB_OTG_HCDMA_DMAADDR_Msk      /*!< DMA address */
+
+/********************  Bit definition for USB_OTG_DTXFSTS register  ********************/
+#define USB_OTG_DTXFSTS_INEPTFSAV_Pos           (0U)                           
+#define USB_OTG_DTXFSTS_INEPTFSAV_Msk           (0xFFFFUL << USB_OTG_DTXFSTS_INEPTFSAV_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DTXFSTS_INEPTFSAV                USB_OTG_DTXFSTS_INEPTFSAV_Msk /*!< IN endpoint TxFIFO space available */
+
+/********************  Bit definition for USB_OTG_DIEPTXF register  ********************/
+#define USB_OTG_DIEPTXF_INEPTXSA_Pos            (0U)                           
+#define USB_OTG_DIEPTXF_INEPTXSA_Msk            (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXSA_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DIEPTXF_INEPTXSA                USB_OTG_DIEPTXF_INEPTXSA_Msk   /*!< IN endpoint FIFOx transmit RAM start address */
+#define USB_OTG_DIEPTXF_INEPTXFD_Pos            (16U)                          
+#define USB_OTG_DIEPTXF_INEPTXFD_Msk            (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXFD_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_DIEPTXF_INEPTXFD                USB_OTG_DIEPTXF_INEPTXFD_Msk   /*!< IN endpoint TxFIFO depth */
+
+/********************  Bit definition for USB_OTG_DOEPCTL register  ********************/
+
+#define USB_OTG_DOEPCTL_MPSIZ_Pos               (0U)                           
+#define USB_OTG_DOEPCTL_MPSIZ_Msk               (0x7FFUL << USB_OTG_DOEPCTL_MPSIZ_Pos) /*!< 0x000007FF */
+#define USB_OTG_DOEPCTL_MPSIZ                    USB_OTG_DOEPCTL_MPSIZ_Msk     /*!< Maximum packet size */          /*!<Bit 1 */
+#define USB_OTG_DOEPCTL_USBAEP_Pos              (15U)                          
+#define USB_OTG_DOEPCTL_USBAEP_Msk              (0x1UL << USB_OTG_DOEPCTL_USBAEP_Pos) /*!< 0x00008000 */
+#define USB_OTG_DOEPCTL_USBAEP                  USB_OTG_DOEPCTL_USBAEP_Msk     /*!< USB active endpoint */
+#define USB_OTG_DOEPCTL_NAKSTS_Pos              (17U)                          
+#define USB_OTG_DOEPCTL_NAKSTS_Msk              (0x1UL << USB_OTG_DOEPCTL_NAKSTS_Pos) /*!< 0x00020000 */
+#define USB_OTG_DOEPCTL_NAKSTS                  USB_OTG_DOEPCTL_NAKSTS_Msk     /*!< NAK status */
+#define USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Pos      (28U)                          
+#define USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Msk      (0x1UL << USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Pos) /*!< 0x10000000 */
+#define USB_OTG_DOEPCTL_SD0PID_SEVNFRM          USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Msk /*!< Set DATA0 PID */
+#define USB_OTG_DOEPCTL_SODDFRM_Pos             (29U)                          
+#define USB_OTG_DOEPCTL_SODDFRM_Msk             (0x1UL << USB_OTG_DOEPCTL_SODDFRM_Pos) /*!< 0x20000000 */
+#define USB_OTG_DOEPCTL_SODDFRM                 USB_OTG_DOEPCTL_SODDFRM_Msk    /*!< Set odd frame */
+#define USB_OTG_DOEPCTL_EPTYP_Pos               (18U)                          
+#define USB_OTG_DOEPCTL_EPTYP_Msk               (0x3UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x000C0000 */
+#define USB_OTG_DOEPCTL_EPTYP                   USB_OTG_DOEPCTL_EPTYP_Msk      /*!< Endpoint type */
+#define USB_OTG_DOEPCTL_EPTYP_0                 (0x1UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x00040000 */
+#define USB_OTG_DOEPCTL_EPTYP_1                 (0x2UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x00080000 */
+#define USB_OTG_DOEPCTL_SNPM_Pos                (20U)                          
+#define USB_OTG_DOEPCTL_SNPM_Msk                (0x1UL << USB_OTG_DOEPCTL_SNPM_Pos) /*!< 0x00100000 */
+#define USB_OTG_DOEPCTL_SNPM                    USB_OTG_DOEPCTL_SNPM_Msk       /*!< Snoop mode */
+#define USB_OTG_DOEPCTL_STALL_Pos               (21U)                          
+#define USB_OTG_DOEPCTL_STALL_Msk               (0x1UL << USB_OTG_DOEPCTL_STALL_Pos) /*!< 0x00200000 */
+#define USB_OTG_DOEPCTL_STALL                   USB_OTG_DOEPCTL_STALL_Msk      /*!< STALL handshake */
+#define USB_OTG_DOEPCTL_CNAK_Pos                (26U)                          
+#define USB_OTG_DOEPCTL_CNAK_Msk                (0x1UL << USB_OTG_DOEPCTL_CNAK_Pos) /*!< 0x04000000 */
+#define USB_OTG_DOEPCTL_CNAK                    USB_OTG_DOEPCTL_CNAK_Msk       /*!< Clear NAK */
+#define USB_OTG_DOEPCTL_SNAK_Pos                (27U)                          
+#define USB_OTG_DOEPCTL_SNAK_Msk                (0x1UL << USB_OTG_DOEPCTL_SNAK_Pos) /*!< 0x08000000 */
+#define USB_OTG_DOEPCTL_SNAK                    USB_OTG_DOEPCTL_SNAK_Msk       /*!< Set NAK */
+#define USB_OTG_DOEPCTL_EPDIS_Pos               (30U)                          
+#define USB_OTG_DOEPCTL_EPDIS_Msk               (0x1UL << USB_OTG_DOEPCTL_EPDIS_Pos) /*!< 0x40000000 */
+#define USB_OTG_DOEPCTL_EPDIS                   USB_OTG_DOEPCTL_EPDIS_Msk      /*!< Endpoint disable */
+#define USB_OTG_DOEPCTL_EPENA_Pos               (31U)                          
+#define USB_OTG_DOEPCTL_EPENA_Msk               (0x1UL << USB_OTG_DOEPCTL_EPENA_Pos) /*!< 0x80000000 */
+#define USB_OTG_DOEPCTL_EPENA                   USB_OTG_DOEPCTL_EPENA_Msk      /*!< Endpoint enable */
+
+/********************  Bit definition for USB_OTG_DOEPINT register  ********************/
+#define USB_OTG_DOEPINT_XFRC_Pos                (0U)                           
+#define USB_OTG_DOEPINT_XFRC_Msk                (0x1UL << USB_OTG_DOEPINT_XFRC_Pos) /*!< 0x00000001 */
+#define USB_OTG_DOEPINT_XFRC                    USB_OTG_DOEPINT_XFRC_Msk       /*!< Transfer completed interrupt */
+#define USB_OTG_DOEPINT_EPDISD_Pos              (1U)                           
+#define USB_OTG_DOEPINT_EPDISD_Msk              (0x1UL << USB_OTG_DOEPINT_EPDISD_Pos) /*!< 0x00000002 */
+#define USB_OTG_DOEPINT_EPDISD                  USB_OTG_DOEPINT_EPDISD_Msk     /*!< Endpoint disabled interrupt */
+#define USB_OTG_DOEPINT_AHBERR_Pos               (2U)
+#define USB_OTG_DOEPINT_AHBERR_Msk               (0x1UL << USB_OTG_DOEPINT_AHBERR_Pos) /*!< 0x00000004 */
+#define USB_OTG_DOEPINT_AHBERR                   USB_OTG_DOEPINT_AHBERR_Msk   /*!< AHB Error (AHBErr) during an OUT transaction */
+#define USB_OTG_DOEPINT_STUP_Pos                (3U)                           
+#define USB_OTG_DOEPINT_STUP_Msk                (0x1UL << USB_OTG_DOEPINT_STUP_Pos) /*!< 0x00000008 */
+#define USB_OTG_DOEPINT_STUP                    USB_OTG_DOEPINT_STUP_Msk       /*!< SETUP phase done */
+#define USB_OTG_DOEPINT_OTEPDIS_Pos             (4U)                           
+#define USB_OTG_DOEPINT_OTEPDIS_Msk             (0x1UL << USB_OTG_DOEPINT_OTEPDIS_Pos) /*!< 0x00000010 */
+#define USB_OTG_DOEPINT_OTEPDIS                 USB_OTG_DOEPINT_OTEPDIS_Msk    /*!< OUT token received when endpoint disabled */
+#define USB_OTG_DOEPINT_OTEPSPR_Pos              (5U)                          
+#define USB_OTG_DOEPINT_OTEPSPR_Msk              (0x1UL << USB_OTG_DOEPINT_OTEPSPR_Pos) /*!< 0x00000020 */
+#define USB_OTG_DOEPINT_OTEPSPR                  USB_OTG_DOEPINT_OTEPSPR_Msk   /*!< Status Phase Received For Control Write */
+#define USB_OTG_DOEPINT_B2BSTUP_Pos             (6U)                           
+#define USB_OTG_DOEPINT_B2BSTUP_Msk             (0x1UL << USB_OTG_DOEPINT_B2BSTUP_Pos) /*!< 0x00000040 */
+#define USB_OTG_DOEPINT_B2BSTUP                 USB_OTG_DOEPINT_B2BSTUP_Msk    /*!< Back-to-back SETUP packets received */
+#define USB_OTG_DOEPINT_OUTPKTERR_Pos            (8U)
+#define USB_OTG_DOEPINT_OUTPKTERR_Msk            (0x1UL << USB_OTG_DOEPINT_OUTPKTERR_Pos) /*!< 0x00000100 */
+#define USB_OTG_DOEPINT_OUTPKTERR                USB_OTG_DOEPINT_OUTPKTERR_Msk   /*!< OUT packet error */
+#define USB_OTG_DOEPINT_NAK_Pos                  (13U)
+#define USB_OTG_DOEPINT_NAK_Msk                  (0x1UL << USB_OTG_DOEPINT_NAK_Pos) /*!< 0x00002000 */
+#define USB_OTG_DOEPINT_NAK                      USB_OTG_DOEPINT_NAK_Msk   /*!< NAK Packet is transmitted by the device */
+#define USB_OTG_DOEPINT_NYET_Pos                (14U)                          
+#define USB_OTG_DOEPINT_NYET_Msk                (0x1UL << USB_OTG_DOEPINT_NYET_Pos) /*!< 0x00004000 */
+#define USB_OTG_DOEPINT_NYET                    USB_OTG_DOEPINT_NYET_Msk       /*!< NYET interrupt */
+#define USB_OTG_DOEPINT_STPKTRX_Pos              (15U)
+#define USB_OTG_DOEPINT_STPKTRX_Msk              (0x1UL << USB_OTG_DOEPINT_STPKTRX_Pos) /*!< 0x00008000 */
+#define USB_OTG_DOEPINT_STPKTRX                  USB_OTG_DOEPINT_STPKTRX_Msk   /*!< Setup Packet Received */
+/********************  Bit definition for USB_OTG_DOEPTSIZ register  ********************/
+
+#define USB_OTG_DOEPTSIZ_XFRSIZ_Pos             (0U)                           
+#define USB_OTG_DOEPTSIZ_XFRSIZ_Msk             (0x7FFFFUL << USB_OTG_DOEPTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
+#define USB_OTG_DOEPTSIZ_XFRSIZ                 USB_OTG_DOEPTSIZ_XFRSIZ_Msk    /*!< Transfer size */
+#define USB_OTG_DOEPTSIZ_PKTCNT_Pos             (19U)                          
+#define USB_OTG_DOEPTSIZ_PKTCNT_Msk             (0x3FFUL << USB_OTG_DOEPTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
+#define USB_OTG_DOEPTSIZ_PKTCNT                 USB_OTG_DOEPTSIZ_PKTCNT_Msk    /*!< Packet count */
+
+#define USB_OTG_DOEPTSIZ_STUPCNT_Pos            (29U)                          
+#define USB_OTG_DOEPTSIZ_STUPCNT_Msk            (0x3UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x60000000 */
+#define USB_OTG_DOEPTSIZ_STUPCNT                USB_OTG_DOEPTSIZ_STUPCNT_Msk   /*!< SETUP packet count */
+#define USB_OTG_DOEPTSIZ_STUPCNT_0              (0x1UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x20000000 */
+#define USB_OTG_DOEPTSIZ_STUPCNT_1              (0x2UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x40000000 */
+
+/********************  Bit definition for PCGCCTL register  ********************/
+#define USB_OTG_PCGCCTL_STOPCLK_Pos             (0U)                           
+#define USB_OTG_PCGCCTL_STOPCLK_Msk             (0x1UL << USB_OTG_PCGCCTL_STOPCLK_Pos) /*!< 0x00000001 */
+#define USB_OTG_PCGCCTL_STOPCLK                 USB_OTG_PCGCCTL_STOPCLK_Msk    /*!< SETUP packet count */
+#define USB_OTG_PCGCCTL_GATECLK_Pos             (1U)                           
+#define USB_OTG_PCGCCTL_GATECLK_Msk             (0x1UL << USB_OTG_PCGCCTL_GATECLK_Pos) /*!< 0x00000002 */
+#define USB_OTG_PCGCCTL_GATECLK                 USB_OTG_PCGCCTL_GATECLK_Msk    /*!<Bit 0 */
+#define USB_OTG_PCGCCTL_PHYSUSP_Pos             (4U)                           
+#define USB_OTG_PCGCCTL_PHYSUSP_Msk             (0x1UL << USB_OTG_PCGCCTL_PHYSUSP_Pos) /*!< 0x00000010 */
+#define USB_OTG_PCGCCTL_PHYSUSP                 USB_OTG_PCGCCTL_PHYSUSP_Msk    /*!<Bit 1 */
+
+/* Legacy define */
+/********************  Bit definition for OTG register  ********************/
+#define USB_OTG_CHNUM_Pos                       (0U)                           
+#define USB_OTG_CHNUM_Msk                       (0xFUL << USB_OTG_CHNUM_Pos)    /*!< 0x0000000F */
+#define USB_OTG_CHNUM                           USB_OTG_CHNUM_Msk              /*!< Channel number */
+#define USB_OTG_CHNUM_0                         (0x1UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000001 */
+#define USB_OTG_CHNUM_1                         (0x2UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000002 */
+#define USB_OTG_CHNUM_2                         (0x4UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000004 */
+#define USB_OTG_CHNUM_3                         (0x8UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000008 */
+#define USB_OTG_BCNT_Pos                        (4U)                           
+#define USB_OTG_BCNT_Msk                        (0x7FFUL << USB_OTG_BCNT_Pos)   /*!< 0x00007FF0 */
+#define USB_OTG_BCNT                            USB_OTG_BCNT_Msk               /*!< Byte count */
+
+#define USB_OTG_DPID_Pos                        (15U)                          
+#define USB_OTG_DPID_Msk                        (0x3UL << USB_OTG_DPID_Pos)     /*!< 0x00018000 */
+#define USB_OTG_DPID                            USB_OTG_DPID_Msk               /*!< Data PID */
+#define USB_OTG_DPID_0                          (0x1UL << USB_OTG_DPID_Pos)     /*!< 0x00008000 */
+#define USB_OTG_DPID_1                          (0x2UL << USB_OTG_DPID_Pos)     /*!< 0x00010000 */
+
+#define USB_OTG_PKTSTS_Pos                      (17U)                          
+#define USB_OTG_PKTSTS_Msk                      (0xFUL << USB_OTG_PKTSTS_Pos)   /*!< 0x001E0000 */
+#define USB_OTG_PKTSTS                          USB_OTG_PKTSTS_Msk             /*!< Packet status */
+#define USB_OTG_PKTSTS_0                        (0x1UL << USB_OTG_PKTSTS_Pos)   /*!< 0x00020000 */
+#define USB_OTG_PKTSTS_1                        (0x2UL << USB_OTG_PKTSTS_Pos)   /*!< 0x00040000 */
+#define USB_OTG_PKTSTS_2                        (0x4UL << USB_OTG_PKTSTS_Pos)   /*!< 0x00080000 */
+#define USB_OTG_PKTSTS_3                        (0x8UL << USB_OTG_PKTSTS_Pos)   /*!< 0x00100000 */
+
+#define USB_OTG_EPNUM_Pos                       (0U)                           
+#define USB_OTG_EPNUM_Msk                       (0xFUL << USB_OTG_EPNUM_Pos)    /*!< 0x0000000F */
+#define USB_OTG_EPNUM                           USB_OTG_EPNUM_Msk              /*!< Endpoint number */
+#define USB_OTG_EPNUM_0                         (0x1UL << USB_OTG_EPNUM_Pos)    /*!< 0x00000001 */
+#define USB_OTG_EPNUM_1                         (0x2UL << USB_OTG_EPNUM_Pos)    /*!< 0x00000002 */
+#define USB_OTG_EPNUM_2                         (0x4UL << USB_OTG_EPNUM_Pos)    /*!< 0x00000004 */
+#define USB_OTG_EPNUM_3                         (0x8UL << USB_OTG_EPNUM_Pos)    /*!< 0x00000008 */
+
+#define USB_OTG_FRMNUM_Pos                      (21U)                          
+#define USB_OTG_FRMNUM_Msk                      (0xFUL << USB_OTG_FRMNUM_Pos)   /*!< 0x01E00000 */
+#define USB_OTG_FRMNUM                          USB_OTG_FRMNUM_Msk             /*!< Frame number */
+#define USB_OTG_FRMNUM_0                        (0x1UL << USB_OTG_FRMNUM_Pos)   /*!< 0x00200000 */
+#define USB_OTG_FRMNUM_1                        (0x2UL << USB_OTG_FRMNUM_Pos)   /*!< 0x00400000 */
+#define USB_OTG_FRMNUM_2                        (0x4UL << USB_OTG_FRMNUM_Pos)   /*!< 0x00800000 */
+#define USB_OTG_FRMNUM_3                        (0x8UL << USB_OTG_FRMNUM_Pos)   /*!< 0x01000000 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
new file mode 100644
index 00000000000..78ca5a5a236
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
@@ -0,0 +1,50 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_HS_IMXRT_H_
+#define _CI_HS_IMXRT_H_
+
+#include "fsl_device_registers.h"
+
+static const ci_hs_controller_t _ci_controller[] =
+{
+  // RT1010 and RT1020 only has 1 USB controller
+  #if FSL_FEATURE_SOC_USBHS_COUNT == 1
+    { .reg_base = USB_BASE , .irqnum = USB_OTG1_IRQn, .ep_count = 8 }
+  #else
+    { .reg_base = USB1_BASE, .irqnum = USB_OTG1_IRQn, .ep_count = 8 },
+    { .reg_base = USB2_BASE, .irqnum = USB_OTG2_IRQn, .ep_count = 8 }
+  #endif
+};
+
+#define CI_DCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_DCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
+
+#define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
+
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
new file mode 100644
index 00000000000..8c2e7dfa65c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
@@ -0,0 +1,45 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_HS_LPC18_43_H_
+#define _CI_HS_LPC18_43_H_
+
+// LPCOpen for 18xx & 43xx
+#include "chip.h"
+
+static const ci_hs_controller_t _ci_controller[] =
+{
+  { .reg_base = LPC_USB0_BASE, .irqnum = USB0_IRQn, .ep_count = 6 },
+  { .reg_base = LPC_USB1_BASE, .irqnum = USB1_IRQn, .ep_count = 4 }
+};
+
+#define CI_DCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_DCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
+
+#define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/chipidea/ci_hs/ci_hs_type.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/chipidea/ci_hs/ci_hs_type.h
new file mode 100644
index 00000000000..728a86b8664
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/chipidea/ci_hs/ci_hs_type.h
@@ -0,0 +1,144 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef CI_HS_TYPE_H_
+#define CI_HS_TYPE_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// USBCMD
+enum {
+  USBCMD_RUN_STOP         = TU_BIT(0),
+  USBCMD_RESET            = TU_BIT(1),
+  USBCMD_SETUP_TRIPWIRE   = TU_BIT(13),
+  USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14)  ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD
+// Interrupt Threshold bit 23:16
+};
+
+// PORTSC1
+#define PORTSC1_PORT_SPEED_POS    26
+
+enum {
+  PORTSC1_CURRENT_CONNECT_STATUS = TU_BIT(0),
+  PORTSC1_FORCE_PORT_RESUME      = TU_BIT(6),
+  PORTSC1_SUSPEND                = TU_BIT(7),
+  PORTSC1_FORCE_FULL_SPEED       = TU_BIT(24),
+  PORTSC1_PORT_SPEED             = TU_BIT(26) | TU_BIT(27)
+};
+
+// OTGSC
+enum {
+  OTGSC_VBUS_DISCHARGE          = TU_BIT(0),
+  OTGSC_VBUS_CHARGE             = TU_BIT(1),
+//  OTGSC_HWASSIST_AUTORESET    = TU_BIT(2),
+  OTGSC_OTG_TERMINATION         = TU_BIT(3), ///< Must set to 1 when OTG go to device mode
+  OTGSC_DATA_PULSING            = TU_BIT(4),
+  OTGSC_ID_PULLUP               = TU_BIT(5),
+//  OTGSC_HWASSIT_DATA_PULSE    = TU_BIT(6),
+//  OTGSC_HWASSIT_BDIS_ACONN    = TU_BIT(7),
+  OTGSC_ID                      = TU_BIT(8), ///< 0 = A device, 1 = B Device
+  OTGSC_A_VBUS_VALID            = TU_BIT(9),
+  OTGSC_A_SESSION_VALID         = TU_BIT(10),
+  OTGSC_B_SESSION_VALID         = TU_BIT(11),
+  OTGSC_B_SESSION_END           = TU_BIT(12),
+  OTGSC_1MS_TOGGLE              = TU_BIT(13),
+  OTGSC_DATA_BUS_PULSING_STATUS = TU_BIT(14),
+};
+
+// USBMode
+enum {
+  USBMODE_CM_DEVICE = 2,
+  USBMODE_CM_HOST   = 3,
+
+  USBMODE_SLOM = TU_BIT(3),
+  USBMODE_SDIS = TU_BIT(4),
+
+  USBMODE_VBUS_POWER_SELECT = TU_BIT(5), // Need to be enabled for LPC18XX/43XX in host mode
+};
+
+// Device Registers
+typedef struct
+{
+  //------------- ID + HW Parameter Registers-------------//
+  volatile uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX
+
+  //------------- Capability Registers-------------//
+  volatile uint8_t  CAPLENGTH;       ///< Capability Registers Length
+  volatile uint8_t  TU_RESERVED[1];
+  volatile uint16_t HCIVERSION;      ///< Host Controller Interface Version
+
+  volatile uint32_t HCSPARAMS;       ///< Host Controller Structural Parameters
+  volatile uint32_t HCCPARAMS;       ///< Host Controller Capability Parameters
+  volatile uint32_t TU_RESERVED[5];
+
+  volatile uint16_t DCIVERSION;      ///< Device Controller Interface Version
+  volatile uint8_t  TU_RESERVED[2];
+
+  volatile uint32_t DCCPARAMS;       ///< Device Controller Capability Parameters
+  volatile uint32_t TU_RESERVED[6];
+
+  //------------- Operational Registers -------------//
+  volatile uint32_t USBCMD;          ///< USB Command Register
+  volatile uint32_t USBSTS;          ///< USB Status Register
+  volatile uint32_t USBINTR;         ///< Interrupt Enable Register
+  volatile uint32_t FRINDEX;         ///< USB Frame Index
+  volatile uint32_t TU_RESERVED;
+  volatile uint32_t DEVICEADDR;      ///< Device Address
+  volatile uint32_t ENDPTLISTADDR;   ///< Endpoint List Address
+  volatile uint32_t TU_RESERVED;
+  volatile uint32_t BURSTSIZE;       ///< Programmable Burst Size
+  volatile uint32_t TXFILLTUNING;    ///< TX FIFO Fill Tuning
+           uint32_t TU_RESERVED[4];
+  volatile uint32_t ENDPTNAK;        ///< Endpoint NAK
+  volatile uint32_t ENDPTNAKEN;      ///< Endpoint NAK Enable
+  volatile uint32_t TU_RESERVED;
+  volatile uint32_t PORTSC1;         ///< Port Status & Control
+  volatile uint32_t TU_RESERVED[7];
+  volatile uint32_t OTGSC;           ///< On-The-Go Status & control
+  volatile uint32_t USBMODE;         ///< USB Device Mode
+  volatile uint32_t ENDPTSETUPSTAT;  ///< Endpoint Setup Status
+  volatile uint32_t ENDPTPRIME;      ///< Endpoint Prime
+  volatile uint32_t ENDPTFLUSH;      ///< Endpoint Flush
+  volatile uint32_t ENDPTSTAT;       ///< Endpoint Status
+  volatile uint32_t ENDPTCOMPLETE;   ///< Endpoint Complete
+  volatile uint32_t ENDPTCTRL[8];    ///< Endpoint Control 0 - 7
+} ci_hs_regs_t;
+
+
+typedef struct
+{
+  uint32_t reg_base;
+  uint32_t irqnum;
+  uint8_t  ep_count; // Max bi-directional Endpoints
+}ci_hs_controller_t;
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* CI_HS_TYPE_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/ehci/ehci.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/ehci/ehci.h
new file mode 100644
index 00000000000..ff9ae12e755
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/ehci/ehci.h
@@ -0,0 +1,420 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_EHCI_H_
+#define _TUSB_EHCI_H_
+
+
+/* Abbreviation
+ * HC: Host Controller
+ * HCD: Host Controller Driver
+ * QHD: Queue Head for non-ISO transfer
+ * QTD: Queue Transfer Descriptor for non-ISO transfer
+ * ITD: Iso Transfer Descriptor for highspeed
+ * SITD: Split ISO Transfer Descriptor for full-speed
+ * SMASK: Start Split mask for Slipt Transaction
+ * CMASK: Complete Split mask for Slipt Transaction
+*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// EHCI CONFIGURATION & CONSTANTS
+//--------------------------------------------------------------------+
+
+// TODO merge OHCI with EHCI
+enum {
+  EHCI_MAX_ITD  = 4,
+  EHCI_MAX_SITD = 16
+};
+
+//--------------------------------------------------------------------+
+// EHCI Data Structure
+//--------------------------------------------------------------------+
+enum
+{
+  EHCI_QTYPE_ITD = 0 ,
+  EHCI_QTYPE_QHD     ,
+  EHCI_QTYPE_SITD    ,
+  EHCI_QTYPE_FSTN
+};
+
+/// EHCI PID
+enum
+{
+  EHCI_PID_OUT = 0 ,
+  EHCI_PID_IN      ,
+  EHCI_PID_SETUP
+};
+
+/// Link pointer
+typedef union {
+	uint32_t address;
+	struct  {
+		uint32_t terminate : 1;
+		uint32_t type      : 2;
+	};
+}ehci_link_t;
+
+/// Queue Element Transfer Descriptor
+/// Qtd is used to declare overlay in ehci_qhd_t -> cannot be declared with TU_ATTR_ALIGNED(32)
+typedef struct
+{
+	// Word 0: Next QTD Pointer
+	ehci_link_t next;
+
+	// Word 1: Alternate Next QTD Pointer (not used)
+	union{
+	  ehci_link_t alternate;
+	  struct {
+	    uint32_t                : 5;
+	    uint32_t used           : 1;
+	    uint32_t                : 10;
+	    uint32_t expected_bytes : 16;
+	  };
+	};
+
+	// Word 2: qTQ Token
+	volatile uint32_t ping_err             : 1  ; ///< For Highspeed: 0 Out, 1 Ping. Full/Slow used as error indicator
+	volatile uint32_t non_hs_split_state   : 1  ; ///< Used by HC to track the state of split transaction
+	volatile uint32_t non_hs_missed_uframe : 1  ; ///< HC misses a complete split transaction
+	volatile uint32_t xact_err             : 1  ; ///< Error (Timeout, CRC, Bad PID ... )
+	volatile uint32_t babble_err           : 1  ; ///< Babble detected, also set Halted bit to 1
+	volatile uint32_t buffer_err           : 1  ; ///< Data overrun/underrun error
+	volatile uint32_t halted               : 1  ; ///< Serious error or STALL received
+	volatile uint32_t active               : 1  ; ///< Start transfer, clear by HC when complete
+
+	uint32_t pid                           : 2  ; ///< 0: OUT, 1: IN, 2 Setup
+	volatile uint32_t err_count            : 2  ; ///< Error Counter of consecutive errors
+	volatile uint32_t current_page         : 3  ; ///< Index into the qTD buffer pointer list
+	uint32_t int_on_complete               : 1  ; ///< Interrupt on complete
+	volatile uint32_t total_bytes          : 15 ; ///< Transfer bytes, decreased during transaction
+	volatile uint32_t data_toggle          : 1  ; ///< Data Toogle bit
+
+
+	/// Buffer Page Pointer List, Each element in the list is a 4K page aligned, physical memory address. The lower 12 bits in each pointer are reserved (except for the first one) as each memory pointer must reference the start of a 4K page
+	uint32_t buffer[5];
+} ehci_qtd_t;
+
+TU_VERIFY_STATIC( sizeof(ehci_qtd_t) == 32, "size is not correct" );
+
+/// Queue Head
+typedef struct TU_ATTR_ALIGNED(32)
+{
+  // Word 0: Next QHD
+	ehci_link_t next;
+
+	// Word 1: Endpoint Characteristics
+	uint32_t dev_addr              : 7  ; ///< device address
+	uint32_t fl_inactive_next_xact : 1  ; ///< Only valid for Periodic with Full/Slow speed
+	uint32_t ep_number             : 4  ; ///< EP number
+	uint32_t ep_speed              : 2  ; ///< 0: Full, 1: Low, 2: High
+	uint32_t data_toggle_control   : 1  ; ///< 0: use DT in qHD, 1: use DT in qTD
+	uint32_t head_list_flag        : 1  ; ///< Head of the queue
+	uint32_t max_packet_size       : 11 ; ///< Max packet size
+	uint32_t fl_ctrl_ep_flag       : 1  ; ///< 1 if is Full/Low speed control endpoint
+	uint32_t nak_reload            : 4  ; ///< Used by HC
+
+	// Word 2: Endpoint Capabilities
+	uint32_t int_smask             : 8  ; ///< Interrupt Schedule Mask
+	uint32_t fl_int_cmask          : 8  ; ///< Split Completion Mask for Full/Slow speed
+	uint32_t fl_hub_addr           : 7  ; ///< Hub Address for Full/Slow speed
+	uint32_t fl_hub_port           : 7  ; ///< Hub Port for Full/Slow speed
+	uint32_t mult                  : 2  ; ///< Transaction per micro frame
+
+	// Word 3: Current qTD Pointer
+	volatile uint32_t qtd_addr;
+
+	// Word 4-11: Transfer Overlay
+	volatile ehci_qtd_t qtd_overlay;
+
+	//--------------------------------------------------------------------+
+  /// Due to the fact QHD is 32 bytes aligned but occupies only 48 bytes
+	/// thus there are 16 bytes padding free that we can make use of.
+  //--------------------------------------------------------------------+
+	uint8_t used;
+	uint8_t removing; // removed from asyn list, waiting for async advance
+	uint8_t pid;
+	uint8_t interval_ms; // polling interval in frames (or milisecond)
+
+	uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set
+	uint8_t reserved2[2];
+
+	ehci_qtd_t * volatile p_qtd_list_head;	// head of the scheduled TD list
+	ehci_qtd_t * volatile p_qtd_list_tail;	// tail of the scheduled TD list
+} ehci_qhd_t;
+
+TU_VERIFY_STATIC( sizeof(ehci_qhd_t) == 64, "size is not correct" );
+
+/// Highspeed Isochronous Transfer Descriptor (section 3.3)
+typedef struct TU_ATTR_ALIGNED(32) {
+	// Word 0: Next Link Pointer
+	ehci_link_t next;
+
+	// Word 1-8: iTD Transaction Status and Control List
+	struct  {
+	  // iTD Control
+		volatile uint32_t offset          : 12 ; ///< This field is a value that is an offset, expressed in bytes, from the beginning of a buffer.
+		volatile uint32_t page_select     : 3  ; ///< These bits are set by software to indicate which of the buffer page pointers the offset field in this slot should be concatenated to produce the starting memory address for this transaction. The valid range of values for this field is 0 to 6
+             uint32_t int_on_complete : 1  ; ///< If this bit is set to a one, it specifies that when this transaction completes, the Host Controller should issue an interrupt at the next interrupt threshold
+		volatile uint32_t length          : 12 ; ///< For an OUT, this field is the number of data bytes the host controller will send during the transaction. The host controller is not required to update this field to reflect the actual number of bytes transferred during the transfer
+																						 ///< For an IN, the initial value of the field is the number of bytes the host expects the endpoint to deliver. During the status update, the host controller writes back the number of bytes successfully received. The value in this register is the actual byte count
+		// iTD Status
+		volatile uint32_t error           : 1  ; ///< Set to a one by the Host Controller during status update in the case where the host did not receive a valid response from the device (Timeout, CRC, Bad PID, etc.). This bit may only be set for isochronous IN transactions.
+		volatile uint32_t babble_err      : 1  ; ///< Set to a 1 by the Host Controller during status update when a babble is detected during the transaction
+		volatile uint32_t buffer_err      : 1  ; ///< Set to a 1 by the Host Controller during status update to indicate that the Host Controller is unable to keep up with the reception of incoming data (overrun) or is unable to supply data fast enough during transmission (underrun).
+		volatile uint32_t active          : 1  ; ///< Set to 1 by software to enable the execution of an isochronous transaction by the Host Controller
+	} xact[8];
+
+	// Word 9-15  Buffer Page Pointer List (Plus)
+	uint32_t BufferPointer[7];
+
+//	// FIXME: Store meta data into buffer pointer reserved for saving memory
+//	/*---------- HCD Area ----------*/
+//	uint32_t used;
+//	uint32_t IhdIdx;
+//	uint32_t reserved[6];
+} ehci_itd_t;
+
+TU_VERIFY_STATIC( sizeof(ehci_itd_t) == 64, "size is not correct" );
+
+/// Split (Full-Speed) Isochronous Transfer Descriptor
+typedef struct TU_ATTR_ALIGNED(32)
+{
+  // Word 0: Next Link Pointer
+	ehci_link_t next;
+
+	// Word 1: siTD Endpoint Characteristics
+	uint32_t dev_addr    : 7; ///< This field selects the specific device serving as the data source or sink.
+	uint32_t             : 1; ///< reserved
+	uint32_t ep_number   : 4; ///< This 4-bit field selects the particular endpoint number on the device serving as the data source or sink.
+	uint32_t             : 4; ///< This field is reserved and should be set to zero.
+	uint32_t hub_addr    : 7; ///< This field holds the device address of the transaction translators’ hub.
+	uint32_t             : 1; ///< reserved
+	uint32_t port_number : 7; ///< This field is the port number of the recipient transaction translator.
+	uint32_t direction   : 1; ///<  0 = OUT; 1 = IN. This field encodes whether the full-speed transaction should be an IN or OUT.
+
+	// Word 2: Micro-frame Schedule Control
+	uint8_t int_smask   ; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute complete-split transactions
+	uint8_t fl_int_cmask; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute start-split transactions.
+	uint16_t reserved ; ///< reserved
+
+	// Word 3: siTD Transfer Status and Control
+	// Status [7:0] TODO indentical to qTD Token'status --> refractor later
+	volatile uint32_t                 : 1  ; // reserved
+	volatile uint32_t split_state     : 1  ;
+	volatile uint32_t missed_uframe   : 1  ;
+	volatile uint32_t xact_err        : 1  ;
+	volatile uint32_t babble_err      : 1  ;
+	volatile uint32_t buffer_err      : 1  ;
+	volatile uint32_t error           : 1  ;
+	volatile uint32_t active          : 1  ;
+	// Micro-frame Schedule Control
+	volatile uint32_t cmask_progress  : 8  ; ///< This field is used by the host controller to record which split-completes have been executed. See Section 4.12.3.3.2 for behavioral requirements.
+	volatile uint32_t total_bytes     : 10 ; ///< This field is initialized by software to the total number of bytes expected in this transfer. Maximum value is 1023
+	volatile uint32_t                 : 4  ; ///< reserved
+	volatile uint32_t page_select     : 1  ; ///< Used to indicate which data page pointer should be concatenated with the CurrentOffsetfield to construct a data buffer pointer
+					 uint32_t int_on_complete : 1  ; ///< Do not interrupt when transaction is complete. 1 = Do interrupt when transaction is complete
+					 uint32_t                 : 0  ; // padding to the end of current storage unit
+
+	/// Word 4-5: Buffer Pointer List
+	uint32_t buffer[2];		// buffer[1] TP: Transaction Position - T-Count: Transaction Count
+
+// 	union{
+// 		uint32_t BufferPointer1;
+// 		struct  {
+// 			volatile uint32_t TCount : 3;
+// 			volatile uint32_t TPosition : 2;
+// 		};
+// 	};
+
+	/*---------- Word 6 ----------*/
+	ehci_link_t back;
+
+	/// SITD is 32-byte aligned but occupies only 28 --> 4 bytes for storing extra data
+	uint8_t used;
+	uint8_t ihd_idx;
+	uint8_t reserved2[2];
+} ehci_sitd_t;
+
+TU_VERIFY_STATIC( sizeof(ehci_sitd_t) == 32, "size is not correct" );
+
+//--------------------------------------------------------------------+
+// EHCI Operational Register
+//--------------------------------------------------------------------+
+enum ehci_interrupt_mask_{
+  EHCI_INT_MASK_USB                   = TU_BIT(0),
+  EHCI_INT_MASK_ERROR                 = TU_BIT(1),
+  EHCI_INT_MASK_PORT_CHANGE           = TU_BIT(2),
+
+  EHCI_INT_MASK_FRAMELIST_ROLLOVER    = TU_BIT(3),
+  EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR = TU_BIT(4),
+  EHCI_INT_MASK_ASYNC_ADVANCE         = TU_BIT(5),
+  EHCI_INT_MASK_NXP_SOF               = TU_BIT(7),
+
+  EHCI_INT_MASK_NXP_ASYNC             = TU_BIT(18),
+  EHCI_INT_MASK_NXP_PERIODIC          = TU_BIT(19),
+
+  EHCI_INT_MASK_ALL                   =
+      EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE |
+      EHCI_INT_MASK_FRAMELIST_ROLLOVER | EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR |
+      EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_NXP_SOF |
+      EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC
+};
+
+enum ehci_usbcmd_pos_ {
+  EHCI_USBCMD_POS_RUN_STOP               = 0,
+  EHCI_USBCMD_POS_FRAMELIST_SIZE         = 2,
+  EHCI_USBCMD_POS_PERIOD_ENABLE          = 4,
+  EHCI_USBCMD_POS_ASYNC_ENABLE           = 5,
+  EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB = 15,
+  EHCI_USBCMD_POS_INTERRUPT_THRESHOLD    = 16
+};
+
+enum ehci_portsc_change_mask_{
+  EHCI_PORTSC_MASK_CURRENT_CONNECT_STATUS = TU_BIT(0),
+  EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE  = TU_BIT(1),
+  EHCI_PORTSC_MASK_PORT_EANBLED           = TU_BIT(2),
+  EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE     = TU_BIT(3),
+  EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE    = TU_BIT(5),
+  EHCI_PORTSC_MASK_PORT_RESET             = TU_BIT(8),
+
+  EHCI_PORTSC_MASK_ALL =
+      EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE |
+      EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE |
+      EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE
+};
+
+typedef volatile struct
+{
+  union {
+    uint32_t command;
+
+    struct {
+      uint32_t run_stop               : 1 ; ///< 1=Run. 0=Stop
+      uint32_t reset                  : 1 ; ///< SW write 1 to reset HC, clear by HC when complete
+      uint32_t framelist_size         : 2 ; ///< Frame List size 0: 1024, 1: 512, 2: 256
+      uint32_t periodic_enable        : 1 ; ///< This bit controls whether the host controller skips processing the Periodic Schedule. Values mean: 0b Do not process the Periodic Schedule 1b Use the PERIODICLISTBASE register to access the Periodic Schedule.
+      uint32_t async_enable           : 1 ; ///< This bit controls whether the host controller skips processing the Asynchronous Schedule. Values mean: 0b Do not process the Asynchronous Schedule 1b Use the ASYNCLISTADDR register to access the Asynchronous Schedule.
+      uint32_t async_adv_doorbell     : 1 ; ///< Tell HC to interrupt next time it advances async list. Clear by HC
+      uint32_t light_reset            : 1 ; ///< Reset HC without affecting ports state
+      uint32_t async_park_count       : 2 ; ///< not used by tinyusb
+      uint32_t                        : 1 ;
+      uint32_t async_park_enable      : 1 ; ///< Enable park mode, not used by tinyusb
+      uint32_t                        : 3 ;
+      uint32_t nxp_framelist_size_msb : 1 ; ///< NXP customized : Bit 2 of the Frame List Size bits \n 011b: 128 elements \n 100b: 64 elements \n 101b: 32 elements \n 110b: 16 elements \n 111b: 8 elements
+      uint32_t int_threshold          : 8 ; ///< Default 08h. Interrupt rate in unit of micro frame
+    }command_bm;
+  };
+
+  union {
+    uint32_t status;
+
+    struct {
+      uint32_t usb                   : 1  ; ///< qTD with IOC is retired
+      uint32_t usb_error             : 1  ; ///< qTD retired due to error
+      uint32_t port_change_detect    : 1  ; ///< Set when PortOwner or ForcePortResume change from 0 -> 1
+      uint32_t framelist_rollover    : 1  ; ///< R/WC The Host Controller sets this bit to a one when the Frame List Index(see Section 2.3.4) rolls over from its maximum value to zero. The exact value at which the rollover occurs depends on the frame list size. For example, if the frame list size (as programmed in the Frame List Sizefield of the USBCMD register) is 1024, the Frame Index Registerrolls over every time FRINDEX[13] toggles. Similarly, if the size is 512, the Host Controller sets this bit to a one every time FRINDEX[12] toggles.
+      uint32_t pci_host_system_error : 1  ; ///< R/WC (not used by NXP) The Host Controller sets this bit to 1 when a serious error occurs during a host system access involving the Host Controller module. In a PCI system, conditions that set this bit to 1 include PCI Parity error, PCI Master Abort, and PCI Target Abort. When this error occurs, the Host Controller clears the Run/Stop bit in the Command register to prevent further execution of the scheduled TDs.
+      uint32_t async_adv             : 1  ; ///< Async Advance interrupt
+      uint32_t                       : 1  ;
+      uint32_t nxp_int_sof           : 1  ; ///< NXP customized:  this bit will be set every 125us and can be used by host controller driver as a time base.
+      uint32_t                       : 4  ;
+      uint32_t hc_halted             : 1  ; ///< Opposite value to run_stop bit.
+      uint32_t reclamation           : 1  ; ///< Used to detect empty async shecudle
+      uint32_t periodic_status       : 1  ; ///< Periodic schedule status
+      uint32_t async_status          : 1  ; ///< Async schedule status
+      uint32_t                       : 2  ;
+      uint32_t nxp_int_async         : 1  ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the asynchronous schedule. This bit is also set by the Host when a short packet is detected andthe packet is on the asynchronous schedule.
+      uint32_t nxp_int_period        : 1  ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the periodic schedule.
+      uint32_t                       : 12 ;
+    }status_bm;
+  };
+
+  union{
+    uint32_t inten;
+
+    struct {
+      uint32_t usb                   : 1  ;
+      uint32_t usb_error             : 1  ;
+      uint32_t port_change_detect    : 1  ;
+      uint32_t framelist_rollover    : 1  ;
+      uint32_t pci_host_system_error : 1  ;
+      uint32_t async_adv             : 1  ;
+      uint32_t                       : 1  ;
+      uint32_t nxp_int_sof           : 1  ;
+      uint32_t                       : 10 ;
+      uint32_t nxp_int_async         : 1  ;
+      uint32_t nxp_int_period        : 1  ;
+      uint32_t                       : 12 ;
+    }inten_bm;
+  };
+
+  uint32_t frame_index        ; ///< Micro frame counter
+  uint32_t ctrl_ds_seg        ; ///< Control Data Structure Segment
+  uint32_t periodic_list_base ; ///< Beginning address of perodic frame list
+  uint32_t async_list_addr    ; ///< Address of next async QHD to be executed
+  uint32_t nxp_tt_control     ; ///< nxp embedded transaction translator (reserved by EHCI specs)
+  uint32_t reserved[8]        ;
+  uint32_t config_flag        ; ///< not used by NXP
+
+  union {
+    uint32_t portsc             ; ///< port status and control
+    struct {
+      uint32_t current_connect_status      : 1; ///< 0: No device, 1: Device is present on port
+      uint32_t connect_status_change       : 1; ///< Change in Current Connect Status
+      uint32_t port_enabled                : 1; ///< Ports can only be enabled by HC as a part of the reset and enable. SW can write 0 to disable
+      uint32_t port_enable_change          : 1; ///< Port Enabled has changed
+      uint32_t over_current_active         : 1; ///< Port has an over-current condition
+      uint32_t over_current_change         : 1; ///< Change to Over-current Active
+      uint32_t force_port_resume           : 1; ///< Resume detected/driven on port. This functionality defined for manipulating this bit depends on the value of the Suspend bit.
+      uint32_t suspend                     : 1; ///< Port in suspend state
+      uint32_t port_reset                  : 1; ///< 1=Port is in Reset. 0=Port is not in Reset
+      uint32_t nxp_highspeed_status        : 1; ///< NXP customized: 0=connected to the port is not in High-speed mode, 1=connected to the port is in High-speed mode
+      uint32_t line_status                 : 2; ///< D+/D- state: 00: SE0, 10: J-state, 01: K-state
+      uint32_t port_power                  : 1; ///< 0= power off, 1= power on
+      uint32_t port_owner                  : 1; ///< not used by NXP
+      uint32_t port_indicator_control      : 2; ///< 00b: off, 01b: Amber, 10b: green, 11b: undefined
+      uint32_t port_test_control           : 4; ///< Port test mode, not used by tinyusb
+      uint32_t wake_on_connect_enable      : 1; ///< Enables device connects as wake-up events
+      uint32_t wake_on_disconnect_enable   : 1; ///< Enables device disconnects as wake-up events
+      uint32_t wake_on_over_current_enable : 1; ///< Enables over-current conditions as wake-up events
+      uint32_t nxp_phy_clock_disable       : 1; ///< NXP customized: the PHY can be put into Low Power Suspend – Clock Disable when the downstream device has been put into suspend mode or when no downstream device is connected. Low power suspend is completely under the control of software. 0: enable PHY clock, 1: disable PHY clock
+      uint32_t nxp_port_force_fullspeed    : 1; ///< NXP customized: Writing this bit to a 1 will force the port to only connect at Full Speed. It disables the chirp sequence that allowsthe port to identify itself as High Speed. This is useful for testing FS configurations with a HS host, hub or device.
+      uint32_t TU_RESERVED                 : 1;
+      uint32_t nxp_port_speed              : 2; ///< NXP customized: This register field indicates the speed atwhich the port is operating. For HS mode operation in the host controllerand HS/FS operation in the device controller the port routing steers data to the Protocol engine. For FS and LS mode operation in the host controller, the port routing steers data to the Protocol Engine w/ Embedded Transaction Translator. 0x0: Fullspeed, 0x1: Lowspeed, 0x2: Highspeed
+      uint32_t TU_RESERVED                 : 4;
+    }portsc_bm;
+  };
+}ehci_registers_t;
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_EHCI_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/ehci/ehci_api.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/ehci/ehci_api.h
new file mode 100644
index 00000000000..12e0a73d79d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/ehci/ehci_api.h
@@ -0,0 +1,45 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_EHCI_API_H_
+#define _TUSB_EHCI_API_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// API Implemented by EHCI
+//--------------------------------------------------------------------+
+
+// Initialize EHCI driver
+bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/mentor/musb/musb_msp432e.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/mentor/musb/musb_msp432e.h
new file mode 100644
index 00000000000..fce21de8890
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/mentor/musb/musb_msp432e.h
@@ -0,0 +1,40 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_MUSB_MSP432E_H_
+#define _TUSB_MUSB_MSP432E_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "msp.h"
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/mentor/musb/musb_tm4c.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/mentor/musb/musb_tm4c.h
new file mode 100644
index 00000000000..65a1751b0f1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/mentor/musb/musb_tm4c.h
@@ -0,0 +1,45 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_MUSB_TM4C_H_
+#define _TUSB_MUSB_TM4C_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if CFG_TUSB_MCU == OPT_MCU_TM4C123
+  #include "TM4C123.h"
+//#elif CFG_TUSB_MCU == OPT_MCU_TM4C129
+#else
+  #error "Unsupported MCUs"
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/mentor/musb/musb_type.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/mentor/musb/musb_type.h
new file mode 100644
index 00000000000..8f83305a526
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/mentor/musb/musb_type.h
@@ -0,0 +1,2624 @@
+/******************************************************************************
+*
+* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+*  Redistributions of source code must retain the above copyright
+*  notice, this list of conditions and the following disclaimer.
+*
+*  Redistributions in binary form must reproduce the above copyright
+*  notice, this list of conditions and the following disclaimer in the
+*  documentation and/or other materials provided with the
+*  distribution.
+*
+*  Neither the name of Texas Instruments Incorporated nor the names of
+*  its contributors may be used to endorse or promote products derived
+*  from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+*******************************************************************************/
+
+#ifndef _TUSB_MUSB_TYPE_H_
+#define _TUSB_MUSB_TYPE_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_FADDR register.
+//
+//*****************************************************************************
+#define USB_FADDR_M             0x0000007F  // Function Address
+#define USB_FADDR_S             0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_POWER register.
+//
+//*****************************************************************************
+#define USB_POWER_ISOUP         0x00000080  // Isochronous Update
+#define USB_POWER_SOFTCONN      0x00000040  // Soft Connect/Disconnect
+#define USB_POWER_HSENAB        0x00000020  // High Speed Enable
+#define USB_POWER_HSMODE        0x00000010  // High Speed Enable
+#define USB_POWER_RESET         0x00000008  // RESET Signaling
+#define USB_POWER_RESUME        0x00000004  // RESUME Signaling
+#define USB_POWER_SUSPEND       0x00000002  // SUSPEND Mode
+#define USB_POWER_PWRDNPHY      0x00000001  // Power Down PHY
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXIS register.
+//
+//*****************************************************************************
+#define USB_TXIS_EP7            0x00000080  // TX Endpoint 7 Interrupt
+#define USB_TXIS_EP6            0x00000040  // TX Endpoint 6 Interrupt
+#define USB_TXIS_EP5            0x00000020  // TX Endpoint 5 Interrupt
+#define USB_TXIS_EP4            0x00000010  // TX Endpoint 4 Interrupt
+#define USB_TXIS_EP3            0x00000008  // TX Endpoint 3 Interrupt
+#define USB_TXIS_EP2            0x00000004  // TX Endpoint 2 Interrupt
+#define USB_TXIS_EP1            0x00000002  // TX Endpoint 1 Interrupt
+#define USB_TXIS_EP0            0x00000001  // TX and RX Endpoint 0 Interrupt
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXIS register.
+//
+//*****************************************************************************
+#define USB_RXIS_EP7            0x00000080  // RX Endpoint 7 Interrupt
+#define USB_RXIS_EP6            0x00000040  // RX Endpoint 6 Interrupt
+#define USB_RXIS_EP5            0x00000020  // RX Endpoint 5 Interrupt
+#define USB_RXIS_EP4            0x00000010  // RX Endpoint 4 Interrupt
+#define USB_RXIS_EP3            0x00000008  // RX Endpoint 3 Interrupt
+#define USB_RXIS_EP2            0x00000004  // RX Endpoint 2 Interrupt
+#define USB_RXIS_EP1            0x00000002  // RX Endpoint 1 Interrupt
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXIE register.
+//
+//*****************************************************************************
+#define USB_TXIE_EP7            0x00000080  // TX Endpoint 7 Interrupt Enable
+#define USB_TXIE_EP6            0x00000040  // TX Endpoint 6 Interrupt Enable
+#define USB_TXIE_EP5            0x00000020  // TX Endpoint 5 Interrupt Enable
+#define USB_TXIE_EP4            0x00000010  // TX Endpoint 4 Interrupt Enable
+#define USB_TXIE_EP3            0x00000008  // TX Endpoint 3 Interrupt Enable
+#define USB_TXIE_EP2            0x00000004  // TX Endpoint 2 Interrupt Enable
+#define USB_TXIE_EP1            0x00000002  // TX Endpoint 1 Interrupt Enable
+#define USB_TXIE_EP0            0x00000001  // TX and RX Endpoint 0 Interrupt
+                                            // Enable
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXIE register.
+//
+//*****************************************************************************
+#define USB_RXIE_EP7            0x00000080  // RX Endpoint 7 Interrupt Enable
+#define USB_RXIE_EP6            0x00000040  // RX Endpoint 6 Interrupt Enable
+#define USB_RXIE_EP5            0x00000020  // RX Endpoint 5 Interrupt Enable
+#define USB_RXIE_EP4            0x00000010  // RX Endpoint 4 Interrupt Enable
+#define USB_RXIE_EP3            0x00000008  // RX Endpoint 3 Interrupt Enable
+#define USB_RXIE_EP2            0x00000004  // RX Endpoint 2 Interrupt Enable
+#define USB_RXIE_EP1            0x00000002  // RX Endpoint 1 Interrupt Enable
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_IS register.
+//
+//*****************************************************************************
+#define USB_IS_VBUSERR          0x00000080  // VBUS Error (OTG only)
+#define USB_IS_SESREQ           0x00000040  // SESSION REQUEST (OTG only)
+#define USB_IS_DISCON           0x00000020  // Session Disconnect (OTG only)
+#define USB_IS_CONN             0x00000010  // Session Connect
+#define USB_IS_SOF              0x00000008  // Start of Frame
+#define USB_IS_BABBLE           0x00000004  // Babble Detected
+#define USB_IS_RESET            0x00000004  // RESET Signaling Detected
+#define USB_IS_RESUME           0x00000002  // RESUME Signaling Detected
+#define USB_IS_SUSPEND          0x00000001  // SUSPEND Signaling Detected
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_IE register.
+//
+//*****************************************************************************
+#define USB_IE_VBUSERR          0x00000080  // Enable VBUS Error Interrupt (OTG
+                                            // only)
+#define USB_IE_SESREQ           0x00000040  // Enable Session Request (OTG
+                                            // only)
+#define USB_IE_DISCON           0x00000020  // Enable Disconnect Interrupt
+#define USB_IE_CONN             0x00000010  // Enable Connect Interrupt
+#define USB_IE_SOF              0x00000008  // Enable Start-of-Frame Interrupt
+#define USB_IE_BABBLE           0x00000004  // Enable Babble Interrupt
+#define USB_IE_RESET            0x00000004  // Enable RESET Interrupt
+#define USB_IE_RESUME           0x00000002  // Enable RESUME Interrupt
+#define USB_IE_SUSPND           0x00000001  // Enable SUSPEND Interrupt
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_FRAME register.
+//
+//*****************************************************************************
+#define USB_FRAME_M             0x000007FF  // Frame Number
+#define USB_FRAME_S             0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_EPIDX register.
+//
+//*****************************************************************************
+#define USB_EPIDX_EPIDX_M       0x0000000F  // Endpoint Index
+#define USB_EPIDX_EPIDX_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TEST register.
+//
+//*****************************************************************************
+#define USB_TEST_FORCEH         0x00000080  // Force Host Mode
+#define USB_TEST_FIFOACC        0x00000040  // FIFO Access
+#define USB_TEST_FORCEFS        0x00000020  // Force Full-Speed Mode
+#define USB_TEST_FORCEHS        0x00000010  // Force High-Speed Mode
+#define USB_TEST_TESTPKT        0x00000008  // Test Packet Mode Enable
+#define USB_TEST_TESTK          0x00000004  // Test_K Mode Enable
+#define USB_TEST_TESTJ          0x00000002  // Test_J Mode Enable
+#define USB_TEST_TESTSE0NAK     0x00000001  // Test_SE0_NAK Test Mode Enable
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_FIFO0 register.
+//
+//*****************************************************************************
+#define USB_FIFO0_EPDATA_M      0xFFFFFFFF  // Endpoint Data
+#define USB_FIFO0_EPDATA_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_FIFO1 register.
+//
+//*****************************************************************************
+#define USB_FIFO1_EPDATA_M      0xFFFFFFFF  // Endpoint Data
+#define USB_FIFO1_EPDATA_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_FIFO2 register.
+//
+//*****************************************************************************
+#define USB_FIFO2_EPDATA_M      0xFFFFFFFF  // Endpoint Data
+#define USB_FIFO2_EPDATA_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_FIFO3 register.
+//
+//*****************************************************************************
+#define USB_FIFO3_EPDATA_M      0xFFFFFFFF  // Endpoint Data
+#define USB_FIFO3_EPDATA_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_FIFO4 register.
+//
+//*****************************************************************************
+#define USB_FIFO4_EPDATA_M      0xFFFFFFFF  // Endpoint Data
+#define USB_FIFO4_EPDATA_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_FIFO5 register.
+//
+//*****************************************************************************
+#define USB_FIFO5_EPDATA_M      0xFFFFFFFF  // Endpoint Data
+#define USB_FIFO5_EPDATA_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_FIFO6 register.
+//
+//*****************************************************************************
+#define USB_FIFO6_EPDATA_M      0xFFFFFFFF  // Endpoint Data
+#define USB_FIFO6_EPDATA_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_FIFO7 register.
+//
+//*****************************************************************************
+#define USB_FIFO7_EPDATA_M      0xFFFFFFFF  // Endpoint Data
+#define USB_FIFO7_EPDATA_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DEVCTL register.
+//
+//*****************************************************************************
+#define USB_DEVCTL_DEV          0x00000080  // Device Mode (OTG only)
+#define USB_DEVCTL_FSDEV        0x00000040  // Full-Speed Device Detected
+#define USB_DEVCTL_LSDEV        0x00000020  // Low-Speed Device Detected
+#define USB_DEVCTL_VBUS_M       0x00000018  // VBUS Level (OTG only)
+#define USB_DEVCTL_VBUS_NONE    0x00000000  // Below SessionEnd
+#define USB_DEVCTL_VBUS_SEND    0x00000008  // Above SessionEnd, below AValid
+#define USB_DEVCTL_VBUS_AVALID  0x00000010  // Above AValid, below VBUSValid
+#define USB_DEVCTL_VBUS_VALID   0x00000018  // Above VBUSValid
+#define USB_DEVCTL_HOST         0x00000004  // Host Mode
+#define USB_DEVCTL_HOSTREQ      0x00000002  // Host Request (OTG only)
+#define USB_DEVCTL_SESSION      0x00000001  // Session Start/End (OTG only)
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_CCONF register.
+//
+//*****************************************************************************
+#define USB_CCONF_TXEDMA        0x00000002  // TX Early DMA Enable
+#define USB_CCONF_RXEDMA        0x00000001  // TX Early DMA Enable
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXFIFOSZ register.
+//
+//*****************************************************************************
+#define USB_TXFIFOSZ_DPB        0x00000010  // Double Packet Buffer Support
+#define USB_TXFIFOSZ_SIZE_M     0x0000000F  // Max Packet Size
+#define USB_TXFIFOSZ_SIZE_8     0x00000000  // 8
+#define USB_TXFIFOSZ_SIZE_16    0x00000001  // 16
+#define USB_TXFIFOSZ_SIZE_32    0x00000002  // 32
+#define USB_TXFIFOSZ_SIZE_64    0x00000003  // 64
+#define USB_TXFIFOSZ_SIZE_128   0x00000004  // 128
+#define USB_TXFIFOSZ_SIZE_256   0x00000005  // 256
+#define USB_TXFIFOSZ_SIZE_512   0x00000006  // 512
+#define USB_TXFIFOSZ_SIZE_1024  0x00000007  // 1024
+#define USB_TXFIFOSZ_SIZE_2048  0x00000008  // 2048
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXFIFOSZ register.
+//
+//*****************************************************************************
+#define USB_RXFIFOSZ_DPB        0x00000010  // Double Packet Buffer Support
+#define USB_RXFIFOSZ_SIZE_M     0x0000000F  // Max Packet Size
+#define USB_RXFIFOSZ_SIZE_8     0x00000000  // 8
+#define USB_RXFIFOSZ_SIZE_16    0x00000001  // 16
+#define USB_RXFIFOSZ_SIZE_32    0x00000002  // 32
+#define USB_RXFIFOSZ_SIZE_64    0x00000003  // 64
+#define USB_RXFIFOSZ_SIZE_128   0x00000004  // 128
+#define USB_RXFIFOSZ_SIZE_256   0x00000005  // 256
+#define USB_RXFIFOSZ_SIZE_512   0x00000006  // 512
+#define USB_RXFIFOSZ_SIZE_1024  0x00000007  // 1024
+#define USB_RXFIFOSZ_SIZE_2048  0x00000008  // 2048
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXFIFOADD
+// register.
+//
+//*****************************************************************************
+#define USB_TXFIFOADD_ADDR_M    0x000001FF  // Transmit/Receive Start Address
+#define USB_TXFIFOADD_ADDR_S    0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXFIFOADD
+// register.
+//
+//*****************************************************************************
+#define USB_RXFIFOADD_ADDR_M    0x000001FF  // Transmit/Receive Start Address
+#define USB_RXFIFOADD_ADDR_S    0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_ULPIVBUSCTL
+// register.
+//
+//*****************************************************************************
+#define USB_ULPIVBUSCTL_USEEXTVBUSIND                                         \
+                                0x00000002  // Use External VBUS Indicator
+#define USB_ULPIVBUSCTL_USEEXTVBUS                                            \
+                                0x00000001  // Use External VBUS
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_ULPIREGDATA
+// register.
+//
+//*****************************************************************************
+#define USB_ULPIREGDATA_REGDATA_M                                             \
+                                0x000000FF  // Register Data
+#define USB_ULPIREGDATA_REGDATA_S                                             \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_ULPIREGADDR
+// register.
+//
+//*****************************************************************************
+#define USB_ULPIREGADDR_ADDR_M  0x000000FF  // Register Address
+#define USB_ULPIREGADDR_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_ULPIREGCTL
+// register.
+//
+//*****************************************************************************
+#define USB_ULPIREGCTL_RDWR     0x00000004  // Read/Write Control
+#define USB_ULPIREGCTL_REGCMPLT 0x00000002  // Register Access Complete
+#define USB_ULPIREGCTL_REGACC   0x00000001  // Initiate Register Access
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_EPINFO register.
+//
+//*****************************************************************************
+#define USB_EPINFO_RXEP_M       0x000000F0  // RX Endpoints
+#define USB_EPINFO_TXEP_M       0x0000000F  // TX Endpoints
+#define USB_EPINFO_RXEP_S       4
+#define USB_EPINFO_TXEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RAMINFO register.
+//
+//*****************************************************************************
+#define USB_RAMINFO_DMACHAN_M   0x000000F0  // DMA Channels
+#define USB_RAMINFO_RAMBITS_M   0x0000000F  // RAM Address Bus Width
+#define USB_RAMINFO_DMACHAN_S   4
+#define USB_RAMINFO_RAMBITS_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_CONTIM register.
+//
+//*****************************************************************************
+#define USB_CONTIM_WTCON_M      0x000000F0  // Connect Wait
+#define USB_CONTIM_WTID_M       0x0000000F  // Wait ID
+#define USB_CONTIM_WTCON_S      4
+#define USB_CONTIM_WTID_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_VPLEN register.
+//
+//*****************************************************************************
+#define USB_VPLEN_VPLEN_M       0x000000FF  // VBUS Pulse Length
+#define USB_VPLEN_VPLEN_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_HSEOF register.
+//
+//*****************************************************************************
+#define USB_HSEOF_HSEOFG_M      0x000000FF  // HIgh-Speed End-of-Frame Gap
+#define USB_HSEOF_HSEOFG_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_FSEOF register.
+//
+//*****************************************************************************
+#define USB_FSEOF_FSEOFG_M      0x000000FF  // Full-Speed End-of-Frame Gap
+#define USB_FSEOF_FSEOFG_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_LSEOF register.
+//
+//*****************************************************************************
+#define USB_LSEOF_LSEOFG_M      0x000000FF  // Low-Speed End-of-Frame Gap
+#define USB_LSEOF_LSEOFG_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXFUNCADDR0
+// register.
+//
+//*****************************************************************************
+#define USB_TXFUNCADDR0_ADDR_M  0x0000007F  // Device Address
+#define USB_TXFUNCADDR0_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBADDR0
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBADDR0_ADDR_M   0x0000007F  // Hub Address
+#define USB_TXHUBADDR0_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBPORT0
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBPORT0_PORT_M   0x0000007F  // Hub Port
+#define USB_TXHUBPORT0_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXFUNCADDR1
+// register.
+//
+//*****************************************************************************
+#define USB_TXFUNCADDR1_ADDR_M  0x0000007F  // Device Address
+#define USB_TXFUNCADDR1_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBADDR1
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBADDR1_ADDR_M   0x0000007F  // Hub Address
+#define USB_TXHUBADDR1_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBPORT1
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBPORT1_PORT_M   0x0000007F  // Hub Port
+#define USB_TXHUBPORT1_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXFUNCADDR1
+// register.
+//
+//*****************************************************************************
+#define USB_RXFUNCADDR1_ADDR_M  0x0000007F  // Device Address
+#define USB_RXFUNCADDR1_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBADDR1
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBADDR1_ADDR_M   0x0000007F  // Hub Address
+#define USB_RXHUBADDR1_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBPORT1
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBPORT1_PORT_M   0x0000007F  // Hub Port
+#define USB_RXHUBPORT1_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXFUNCADDR2
+// register.
+//
+//*****************************************************************************
+#define USB_TXFUNCADDR2_ADDR_M  0x0000007F  // Device Address
+#define USB_TXFUNCADDR2_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBADDR2
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBADDR2_ADDR_M   0x0000007F  // Hub Address
+#define USB_TXHUBADDR2_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBPORT2
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBPORT2_PORT_M   0x0000007F  // Hub Port
+#define USB_TXHUBPORT2_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXFUNCADDR2
+// register.
+//
+//*****************************************************************************
+#define USB_RXFUNCADDR2_ADDR_M  0x0000007F  // Device Address
+#define USB_RXFUNCADDR2_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBADDR2
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBADDR2_ADDR_M   0x0000007F  // Hub Address
+#define USB_RXHUBADDR2_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBPORT2
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBPORT2_PORT_M   0x0000007F  // Hub Port
+#define USB_RXHUBPORT2_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXFUNCADDR3
+// register.
+//
+//*****************************************************************************
+#define USB_TXFUNCADDR3_ADDR_M  0x0000007F  // Device Address
+#define USB_TXFUNCADDR3_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBADDR3
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBADDR3_ADDR_M   0x0000007F  // Hub Address
+#define USB_TXHUBADDR3_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBPORT3
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBPORT3_PORT_M   0x0000007F  // Hub Port
+#define USB_TXHUBPORT3_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXFUNCADDR3
+// register.
+//
+//*****************************************************************************
+#define USB_RXFUNCADDR3_ADDR_M  0x0000007F  // Device Address
+#define USB_RXFUNCADDR3_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBADDR3
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBADDR3_ADDR_M   0x0000007F  // Hub Address
+#define USB_RXHUBADDR3_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBPORT3
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBPORT3_PORT_M   0x0000007F  // Hub Port
+#define USB_RXHUBPORT3_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXFUNCADDR4
+// register.
+//
+//*****************************************************************************
+#define USB_TXFUNCADDR4_ADDR_M  0x0000007F  // Device Address
+#define USB_TXFUNCADDR4_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBADDR4
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBADDR4_ADDR_M   0x0000007F  // Hub Address
+#define USB_TXHUBADDR4_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBPORT4
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBPORT4_PORT_M   0x0000007F  // Hub Port
+#define USB_TXHUBPORT4_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXFUNCADDR4
+// register.
+//
+//*****************************************************************************
+#define USB_RXFUNCADDR4_ADDR_M  0x0000007F  // Device Address
+#define USB_RXFUNCADDR4_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBADDR4
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBADDR4_ADDR_M   0x0000007F  // Hub Address
+#define USB_RXHUBADDR4_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBPORT4
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBPORT4_PORT_M   0x0000007F  // Hub Port
+#define USB_RXHUBPORT4_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXFUNCADDR5
+// register.
+//
+//*****************************************************************************
+#define USB_TXFUNCADDR5_ADDR_M  0x0000007F  // Device Address
+#define USB_TXFUNCADDR5_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBADDR5
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBADDR5_ADDR_M   0x0000007F  // Hub Address
+#define USB_TXHUBADDR5_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBPORT5
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBPORT5_PORT_M   0x0000007F  // Hub Port
+#define USB_TXHUBPORT5_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXFUNCADDR5
+// register.
+//
+//*****************************************************************************
+#define USB_RXFUNCADDR5_ADDR_M  0x0000007F  // Device Address
+#define USB_RXFUNCADDR5_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBADDR5
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBADDR5_ADDR_M   0x0000007F  // Hub Address
+#define USB_RXHUBADDR5_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBPORT5
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBPORT5_PORT_M   0x0000007F  // Hub Port
+#define USB_RXHUBPORT5_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXFUNCADDR6
+// register.
+//
+//*****************************************************************************
+#define USB_TXFUNCADDR6_ADDR_M  0x0000007F  // Device Address
+#define USB_TXFUNCADDR6_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBADDR6
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBADDR6_ADDR_M   0x0000007F  // Hub Address
+#define USB_TXHUBADDR6_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBPORT6
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBPORT6_PORT_M   0x0000007F  // Hub Port
+#define USB_TXHUBPORT6_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXFUNCADDR6
+// register.
+//
+//*****************************************************************************
+#define USB_RXFUNCADDR6_ADDR_M  0x0000007F  // Device Address
+#define USB_RXFUNCADDR6_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBADDR6
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBADDR6_ADDR_M   0x0000007F  // Hub Address
+#define USB_RXHUBADDR6_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBPORT6
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBPORT6_PORT_M   0x0000007F  // Hub Port
+#define USB_RXHUBPORT6_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXFUNCADDR7
+// register.
+//
+//*****************************************************************************
+#define USB_TXFUNCADDR7_ADDR_M  0x0000007F  // Device Address
+#define USB_TXFUNCADDR7_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBADDR7
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBADDR7_ADDR_M   0x0000007F  // Hub Address
+#define USB_TXHUBADDR7_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXHUBPORT7
+// register.
+//
+//*****************************************************************************
+#define USB_TXHUBPORT7_PORT_M   0x0000007F  // Hub Port
+#define USB_TXHUBPORT7_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXFUNCADDR7
+// register.
+//
+//*****************************************************************************
+#define USB_RXFUNCADDR7_ADDR_M  0x0000007F  // Device Address
+#define USB_RXFUNCADDR7_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBADDR7
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBADDR7_ADDR_M   0x0000007F  // Hub Address
+#define USB_RXHUBADDR7_ADDR_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXHUBPORT7
+// register.
+//
+//*****************************************************************************
+#define USB_RXHUBPORT7_PORT_M   0x0000007F  // Hub Port
+#define USB_RXHUBPORT7_PORT_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_CSRL0 register.
+//
+//*****************************************************************************
+#define USB_CSRL0_NAKTO         0x00000080  // NAK Timeout
+#define USB_CSRL0_SETENDC       0x00000080  // Setup End Clear
+#define USB_CSRL0_STATUS        0x00000040  // STATUS Packet
+#define USB_CSRL0_RXRDYC        0x00000040  // RXRDY Clear
+#define USB_CSRL0_REQPKT        0x00000020  // Request Packet
+#define USB_CSRL0_STALL         0x00000020  // Send Stall
+#define USB_CSRL0_SETEND        0x00000010  // Setup End
+#define USB_CSRL0_ERROR         0x00000010  // Error
+#define USB_CSRL0_DATAEND       0x00000008  // Data End
+#define USB_CSRL0_SETUP         0x00000008  // Setup Packet
+#define USB_CSRL0_STALLED       0x00000004  // Endpoint Stalled
+#define USB_CSRL0_TXRDY         0x00000002  // Transmit Packet Ready
+#define USB_CSRL0_RXRDY         0x00000001  // Receive Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_CSRH0 register.
+//
+//*****************************************************************************
+#define USB_CSRH0_DISPING       0x00000008  // PING Disable
+#define USB_CSRH0_DTWE          0x00000004  // Data Toggle Write Enable
+#define USB_CSRH0_DT            0x00000002  // Data Toggle
+#define USB_CSRH0_FLUSH         0x00000001  // Flush FIFO
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_COUNT0 register.
+//
+//*****************************************************************************
+#define USB_COUNT0_COUNT_M      0x0000007F  // FIFO Count
+#define USB_COUNT0_COUNT_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TYPE0 register.
+//
+//*****************************************************************************
+#define USB_TYPE0_SPEED_M       0x000000C0  // Operating Speed
+#define USB_TYPE0_SPEED_HIGH    0x00000040  // High
+#define USB_TYPE0_SPEED_FULL    0x00000080  // Full
+#define USB_TYPE0_SPEED_LOW     0x000000C0  // Low
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_NAKLMT register.
+//
+//*****************************************************************************
+#define USB_NAKLMT_NAKLMT_M     0x0000001F  // EP0 NAK Limit
+#define USB_NAKLMT_NAKLMT_S     0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXMAXP1 register.
+//
+//*****************************************************************************
+#define USB_TXMAXP1_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP1_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRL1 register.
+//
+//*****************************************************************************
+#define USB_TXCSRL1_NAKTO       0x00000080  // NAK Timeout
+#define USB_TXCSRL1_CLRDT       0x00000040  // Clear Data Toggle
+#define USB_TXCSRL1_STALLED     0x00000020  // Endpoint Stalled
+#define USB_TXCSRL1_STALL       0x00000010  // Send STALL
+#define USB_TXCSRL1_SETUP       0x00000010  // Setup Packet
+#define USB_TXCSRL1_FLUSH       0x00000008  // Flush FIFO
+#define USB_TXCSRL1_ERROR       0x00000004  // Error
+#define USB_TXCSRL1_UNDRN       0x00000004  // Underrun
+#define USB_TXCSRL1_FIFONE      0x00000002  // FIFO Not Empty
+#define USB_TXCSRL1_TXRDY       0x00000001  // Transmit Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRH1 register.
+//
+//*****************************************************************************
+#define USB_TXCSRH1_AUTOSET     0x00000080  // Auto Set
+#define USB_TXCSRH1_ISO         0x00000040  // Isochronous Transfers
+#define USB_TXCSRH1_MODE        0x00000020  // Mode
+#define USB_TXCSRH1_DMAEN       0x00000010  // DMA Request Enable
+#define USB_TXCSRH1_FDT         0x00000008  // Force Data Toggle
+#define USB_TXCSRH1_DMAMOD      0x00000004  // DMA Request Mode
+#define USB_TXCSRH1_DTWE        0x00000002  // Data Toggle Write Enable
+#define USB_TXCSRH1_DT          0x00000001  // Data Toggle
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXMAXP1 register.
+//
+//*****************************************************************************
+#define USB_RXMAXP1_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP1_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRL1 register.
+//
+//*****************************************************************************
+#define USB_RXCSRL1_CLRDT       0x00000080  // Clear Data Toggle
+#define USB_RXCSRL1_STALLED     0x00000040  // Endpoint Stalled
+#define USB_RXCSRL1_STALL       0x00000020  // Send STALL
+#define USB_RXCSRL1_REQPKT      0x00000020  // Request Packet
+#define USB_RXCSRL1_FLUSH       0x00000010  // Flush FIFO
+#define USB_RXCSRL1_DATAERR     0x00000008  // Data Error
+#define USB_RXCSRL1_NAKTO       0x00000008  // NAK Timeout
+#define USB_RXCSRL1_OVER        0x00000004  // Overrun
+#define USB_RXCSRL1_ERROR       0x00000004  // Error
+#define USB_RXCSRL1_FULL        0x00000002  // FIFO Full
+#define USB_RXCSRL1_RXRDY       0x00000001  // Receive Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRH1 register.
+//
+//*****************************************************************************
+#define USB_RXCSRH1_AUTOCL      0x00000080  // Auto Clear
+#define USB_RXCSRH1_AUTORQ      0x00000040  // Auto Request
+#define USB_RXCSRH1_ISO         0x00000040  // Isochronous Transfers
+#define USB_RXCSRH1_DMAEN       0x00000020  // DMA Request Enable
+#define USB_RXCSRH1_DISNYET     0x00000010  // Disable NYET
+#define USB_RXCSRH1_PIDERR      0x00000010  // PID Error
+#define USB_RXCSRH1_DMAMOD      0x00000008  // DMA Request Mode
+#define USB_RXCSRH1_DTWE        0x00000004  // Data Toggle Write Enable
+#define USB_RXCSRH1_DT          0x00000002  // Data Toggle
+#define USB_RXCSRH1_INCOMPRX    0x00000001  // Incomplete RX Transmission
+                                            // Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCOUNT1 register.
+//
+//*****************************************************************************
+#define USB_RXCOUNT1_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT1_COUNT_S    0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXTYPE1 register.
+//
+//*****************************************************************************
+#define USB_TXTYPE1_SPEED_M     0x000000C0  // Operating Speed
+#define USB_TXTYPE1_SPEED_DFLT  0x00000000  // Default
+#define USB_TXTYPE1_SPEED_HIGH  0x00000040  // High
+#define USB_TXTYPE1_SPEED_FULL  0x00000080  // Full
+#define USB_TXTYPE1_SPEED_LOW   0x000000C0  // Low
+#define USB_TXTYPE1_PROTO_M     0x00000030  // Protocol
+#define USB_TXTYPE1_PROTO_CTRL  0x00000000  // Control
+#define USB_TXTYPE1_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_TXTYPE1_PROTO_BULK  0x00000020  // Bulk
+#define USB_TXTYPE1_PROTO_INT   0x00000030  // Interrupt
+#define USB_TXTYPE1_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE1_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXINTERVAL1
+// register.
+//
+//*****************************************************************************
+#define USB_TXINTERVAL1_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_TXINTERVAL1_TXPOLL_M                                              \
+                                0x000000FF  // TX Polling
+#define USB_TXINTERVAL1_TXPOLL_S                                              \
+                                0
+#define USB_TXINTERVAL1_NAKLMT_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXTYPE1 register.
+//
+//*****************************************************************************
+#define USB_RXTYPE1_SPEED_M     0x000000C0  // Operating Speed
+#define USB_RXTYPE1_SPEED_DFLT  0x00000000  // Default
+#define USB_RXTYPE1_SPEED_HIGH  0x00000040  // High
+#define USB_RXTYPE1_SPEED_FULL  0x00000080  // Full
+#define USB_RXTYPE1_SPEED_LOW   0x000000C0  // Low
+#define USB_RXTYPE1_PROTO_M     0x00000030  // Protocol
+#define USB_RXTYPE1_PROTO_CTRL  0x00000000  // Control
+#define USB_RXTYPE1_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_RXTYPE1_PROTO_BULK  0x00000020  // Bulk
+#define USB_RXTYPE1_PROTO_INT   0x00000030  // Interrupt
+#define USB_RXTYPE1_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE1_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXINTERVAL1
+// register.
+//
+//*****************************************************************************
+#define USB_RXINTERVAL1_TXPOLL_M                                              \
+                                0x000000FF  // RX Polling
+#define USB_RXINTERVAL1_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_RXINTERVAL1_TXPOLL_S                                              \
+                                0
+#define USB_RXINTERVAL1_NAKLMT_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXMAXP2 register.
+//
+//*****************************************************************************
+#define USB_TXMAXP2_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP2_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRL2 register.
+//
+//*****************************************************************************
+#define USB_TXCSRL2_NAKTO       0x00000080  // NAK Timeout
+#define USB_TXCSRL2_CLRDT       0x00000040  // Clear Data Toggle
+#define USB_TXCSRL2_STALLED     0x00000020  // Endpoint Stalled
+#define USB_TXCSRL2_SETUP       0x00000010  // Setup Packet
+#define USB_TXCSRL2_STALL       0x00000010  // Send STALL
+#define USB_TXCSRL2_FLUSH       0x00000008  // Flush FIFO
+#define USB_TXCSRL2_ERROR       0x00000004  // Error
+#define USB_TXCSRL2_UNDRN       0x00000004  // Underrun
+#define USB_TXCSRL2_FIFONE      0x00000002  // FIFO Not Empty
+#define USB_TXCSRL2_TXRDY       0x00000001  // Transmit Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRH2 register.
+//
+//*****************************************************************************
+#define USB_TXCSRH2_AUTOSET     0x00000080  // Auto Set
+#define USB_TXCSRH2_ISO         0x00000040  // Isochronous Transfers
+#define USB_TXCSRH2_MODE        0x00000020  // Mode
+#define USB_TXCSRH2_DMAEN       0x00000010  // DMA Request Enable
+#define USB_TXCSRH2_FDT         0x00000008  // Force Data Toggle
+#define USB_TXCSRH2_DMAMOD      0x00000004  // DMA Request Mode
+#define USB_TXCSRH2_DTWE        0x00000002  // Data Toggle Write Enable
+#define USB_TXCSRH2_DT          0x00000001  // Data Toggle
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXMAXP2 register.
+//
+//*****************************************************************************
+#define USB_RXMAXP2_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP2_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRL2 register.
+//
+//*****************************************************************************
+#define USB_RXCSRL2_CLRDT       0x00000080  // Clear Data Toggle
+#define USB_RXCSRL2_STALLED     0x00000040  // Endpoint Stalled
+#define USB_RXCSRL2_REQPKT      0x00000020  // Request Packet
+#define USB_RXCSRL2_STALL       0x00000020  // Send STALL
+#define USB_RXCSRL2_FLUSH       0x00000010  // Flush FIFO
+#define USB_RXCSRL2_DATAERR     0x00000008  // Data Error
+#define USB_RXCSRL2_NAKTO       0x00000008  // NAK Timeout
+#define USB_RXCSRL2_ERROR       0x00000004  // Error
+#define USB_RXCSRL2_OVER        0x00000004  // Overrun
+#define USB_RXCSRL2_FULL        0x00000002  // FIFO Full
+#define USB_RXCSRL2_RXRDY       0x00000001  // Receive Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRH2 register.
+//
+//*****************************************************************************
+#define USB_RXCSRH2_AUTOCL      0x00000080  // Auto Clear
+#define USB_RXCSRH2_AUTORQ      0x00000040  // Auto Request
+#define USB_RXCSRH2_ISO         0x00000040  // Isochronous Transfers
+#define USB_RXCSRH2_DMAEN       0x00000020  // DMA Request Enable
+#define USB_RXCSRH2_DISNYET     0x00000010  // Disable NYET
+#define USB_RXCSRH2_PIDERR      0x00000010  // PID Error
+#define USB_RXCSRH2_DMAMOD      0x00000008  // DMA Request Mode
+#define USB_RXCSRH2_DTWE        0x00000004  // Data Toggle Write Enable
+#define USB_RXCSRH2_DT          0x00000002  // Data Toggle
+#define USB_RXCSRH2_INCOMPRX    0x00000001  // Incomplete RX Transmission
+                                            // Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCOUNT2 register.
+//
+//*****************************************************************************
+#define USB_RXCOUNT2_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT2_COUNT_S    0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXTYPE2 register.
+//
+//*****************************************************************************
+#define USB_TXTYPE2_SPEED_M     0x000000C0  // Operating Speed
+#define USB_TXTYPE2_SPEED_DFLT  0x00000000  // Default
+#define USB_TXTYPE2_SPEED_HIGH  0x00000040  // High
+#define USB_TXTYPE2_SPEED_FULL  0x00000080  // Full
+#define USB_TXTYPE2_SPEED_LOW   0x000000C0  // Low
+#define USB_TXTYPE2_PROTO_M     0x00000030  // Protocol
+#define USB_TXTYPE2_PROTO_CTRL  0x00000000  // Control
+#define USB_TXTYPE2_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_TXTYPE2_PROTO_BULK  0x00000020  // Bulk
+#define USB_TXTYPE2_PROTO_INT   0x00000030  // Interrupt
+#define USB_TXTYPE2_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE2_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXINTERVAL2
+// register.
+//
+//*****************************************************************************
+#define USB_TXINTERVAL2_TXPOLL_M                                              \
+                                0x000000FF  // TX Polling
+#define USB_TXINTERVAL2_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_TXINTERVAL2_NAKLMT_S                                              \
+                                0
+#define USB_TXINTERVAL2_TXPOLL_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXTYPE2 register.
+//
+//*****************************************************************************
+#define USB_RXTYPE2_SPEED_M     0x000000C0  // Operating Speed
+#define USB_RXTYPE2_SPEED_DFLT  0x00000000  // Default
+#define USB_RXTYPE2_SPEED_HIGH  0x00000040  // High
+#define USB_RXTYPE2_SPEED_FULL  0x00000080  // Full
+#define USB_RXTYPE2_SPEED_LOW   0x000000C0  // Low
+#define USB_RXTYPE2_PROTO_M     0x00000030  // Protocol
+#define USB_RXTYPE2_PROTO_CTRL  0x00000000  // Control
+#define USB_RXTYPE2_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_RXTYPE2_PROTO_BULK  0x00000020  // Bulk
+#define USB_RXTYPE2_PROTO_INT   0x00000030  // Interrupt
+#define USB_RXTYPE2_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE2_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXINTERVAL2
+// register.
+//
+//*****************************************************************************
+#define USB_RXINTERVAL2_TXPOLL_M                                              \
+                                0x000000FF  // RX Polling
+#define USB_RXINTERVAL2_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_RXINTERVAL2_TXPOLL_S                                              \
+                                0
+#define USB_RXINTERVAL2_NAKLMT_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXMAXP3 register.
+//
+//*****************************************************************************
+#define USB_TXMAXP3_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP3_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRL3 register.
+//
+//*****************************************************************************
+#define USB_TXCSRL3_NAKTO       0x00000080  // NAK Timeout
+#define USB_TXCSRL3_CLRDT       0x00000040  // Clear Data Toggle
+#define USB_TXCSRL3_STALLED     0x00000020  // Endpoint Stalled
+#define USB_TXCSRL3_SETUP       0x00000010  // Setup Packet
+#define USB_TXCSRL3_STALL       0x00000010  // Send STALL
+#define USB_TXCSRL3_FLUSH       0x00000008  // Flush FIFO
+#define USB_TXCSRL3_ERROR       0x00000004  // Error
+#define USB_TXCSRL3_UNDRN       0x00000004  // Underrun
+#define USB_TXCSRL3_FIFONE      0x00000002  // FIFO Not Empty
+#define USB_TXCSRL3_TXRDY       0x00000001  // Transmit Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRH3 register.
+//
+//*****************************************************************************
+#define USB_TXCSRH3_AUTOSET     0x00000080  // Auto Set
+#define USB_TXCSRH3_ISO         0x00000040  // Isochronous Transfers
+#define USB_TXCSRH3_MODE        0x00000020  // Mode
+#define USB_TXCSRH3_DMAEN       0x00000010  // DMA Request Enable
+#define USB_TXCSRH3_FDT         0x00000008  // Force Data Toggle
+#define USB_TXCSRH3_DMAMOD      0x00000004  // DMA Request Mode
+#define USB_TXCSRH3_DTWE        0x00000002  // Data Toggle Write Enable
+#define USB_TXCSRH3_DT          0x00000001  // Data Toggle
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXMAXP3 register.
+//
+//*****************************************************************************
+#define USB_RXMAXP3_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP3_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRL3 register.
+//
+//*****************************************************************************
+#define USB_RXCSRL3_CLRDT       0x00000080  // Clear Data Toggle
+#define USB_RXCSRL3_STALLED     0x00000040  // Endpoint Stalled
+#define USB_RXCSRL3_STALL       0x00000020  // Send STALL
+#define USB_RXCSRL3_REQPKT      0x00000020  // Request Packet
+#define USB_RXCSRL3_FLUSH       0x00000010  // Flush FIFO
+#define USB_RXCSRL3_DATAERR     0x00000008  // Data Error
+#define USB_RXCSRL3_NAKTO       0x00000008  // NAK Timeout
+#define USB_RXCSRL3_ERROR       0x00000004  // Error
+#define USB_RXCSRL3_OVER        0x00000004  // Overrun
+#define USB_RXCSRL3_FULL        0x00000002  // FIFO Full
+#define USB_RXCSRL3_RXRDY       0x00000001  // Receive Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRH3 register.
+//
+//*****************************************************************************
+#define USB_RXCSRH3_AUTOCL      0x00000080  // Auto Clear
+#define USB_RXCSRH3_AUTORQ      0x00000040  // Auto Request
+#define USB_RXCSRH3_ISO         0x00000040  // Isochronous Transfers
+#define USB_RXCSRH3_DMAEN       0x00000020  // DMA Request Enable
+#define USB_RXCSRH3_DISNYET     0x00000010  // Disable NYET
+#define USB_RXCSRH3_PIDERR      0x00000010  // PID Error
+#define USB_RXCSRH3_DMAMOD      0x00000008  // DMA Request Mode
+#define USB_RXCSRH3_DTWE        0x00000004  // Data Toggle Write Enable
+#define USB_RXCSRH3_DT          0x00000002  // Data Toggle
+#define USB_RXCSRH3_INCOMPRX    0x00000001  // Incomplete RX Transmission
+                                            // Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCOUNT3 register.
+//
+//*****************************************************************************
+#define USB_RXCOUNT3_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT3_COUNT_S    0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXTYPE3 register.
+//
+//*****************************************************************************
+#define USB_TXTYPE3_SPEED_M     0x000000C0  // Operating Speed
+#define USB_TXTYPE3_SPEED_DFLT  0x00000000  // Default
+#define USB_TXTYPE3_SPEED_HIGH  0x00000040  // High
+#define USB_TXTYPE3_SPEED_FULL  0x00000080  // Full
+#define USB_TXTYPE3_SPEED_LOW   0x000000C0  // Low
+#define USB_TXTYPE3_PROTO_M     0x00000030  // Protocol
+#define USB_TXTYPE3_PROTO_CTRL  0x00000000  // Control
+#define USB_TXTYPE3_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_TXTYPE3_PROTO_BULK  0x00000020  // Bulk
+#define USB_TXTYPE3_PROTO_INT   0x00000030  // Interrupt
+#define USB_TXTYPE3_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE3_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXINTERVAL3
+// register.
+//
+//*****************************************************************************
+#define USB_TXINTERVAL3_TXPOLL_M                                              \
+                                0x000000FF  // TX Polling
+#define USB_TXINTERVAL3_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_TXINTERVAL3_TXPOLL_S                                              \
+                                0
+#define USB_TXINTERVAL3_NAKLMT_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXTYPE3 register.
+//
+//*****************************************************************************
+#define USB_RXTYPE3_SPEED_M     0x000000C0  // Operating Speed
+#define USB_RXTYPE3_SPEED_DFLT  0x00000000  // Default
+#define USB_RXTYPE3_SPEED_HIGH  0x00000040  // High
+#define USB_RXTYPE3_SPEED_FULL  0x00000080  // Full
+#define USB_RXTYPE3_SPEED_LOW   0x000000C0  // Low
+#define USB_RXTYPE3_PROTO_M     0x00000030  // Protocol
+#define USB_RXTYPE3_PROTO_CTRL  0x00000000  // Control
+#define USB_RXTYPE3_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_RXTYPE3_PROTO_BULK  0x00000020  // Bulk
+#define USB_RXTYPE3_PROTO_INT   0x00000030  // Interrupt
+#define USB_RXTYPE3_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE3_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXINTERVAL3
+// register.
+//
+//*****************************************************************************
+#define USB_RXINTERVAL3_TXPOLL_M                                              \
+                                0x000000FF  // RX Polling
+#define USB_RXINTERVAL3_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_RXINTERVAL3_TXPOLL_S                                              \
+                                0
+#define USB_RXINTERVAL3_NAKLMT_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXMAXP4 register.
+//
+//*****************************************************************************
+#define USB_TXMAXP4_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP4_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRL4 register.
+//
+//*****************************************************************************
+#define USB_TXCSRL4_NAKTO       0x00000080  // NAK Timeout
+#define USB_TXCSRL4_CLRDT       0x00000040  // Clear Data Toggle
+#define USB_TXCSRL4_STALLED     0x00000020  // Endpoint Stalled
+#define USB_TXCSRL4_SETUP       0x00000010  // Setup Packet
+#define USB_TXCSRL4_STALL       0x00000010  // Send STALL
+#define USB_TXCSRL4_FLUSH       0x00000008  // Flush FIFO
+#define USB_TXCSRL4_ERROR       0x00000004  // Error
+#define USB_TXCSRL4_UNDRN       0x00000004  // Underrun
+#define USB_TXCSRL4_FIFONE      0x00000002  // FIFO Not Empty
+#define USB_TXCSRL4_TXRDY       0x00000001  // Transmit Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRH4 register.
+//
+//*****************************************************************************
+#define USB_TXCSRH4_AUTOSET     0x00000080  // Auto Set
+#define USB_TXCSRH4_ISO         0x00000040  // Isochronous Transfers
+#define USB_TXCSRH4_MODE        0x00000020  // Mode
+#define USB_TXCSRH4_DMAEN       0x00000010  // DMA Request Enable
+#define USB_TXCSRH4_FDT         0x00000008  // Force Data Toggle
+#define USB_TXCSRH4_DMAMOD      0x00000004  // DMA Request Mode
+#define USB_TXCSRH4_DTWE        0x00000002  // Data Toggle Write Enable
+#define USB_TXCSRH4_DT          0x00000001  // Data Toggle
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXMAXP4 register.
+//
+//*****************************************************************************
+#define USB_RXMAXP4_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP4_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRL4 register.
+//
+//*****************************************************************************
+#define USB_RXCSRL4_CLRDT       0x00000080  // Clear Data Toggle
+#define USB_RXCSRL4_STALLED     0x00000040  // Endpoint Stalled
+#define USB_RXCSRL4_STALL       0x00000020  // Send STALL
+#define USB_RXCSRL4_REQPKT      0x00000020  // Request Packet
+#define USB_RXCSRL4_FLUSH       0x00000010  // Flush FIFO
+#define USB_RXCSRL4_NAKTO       0x00000008  // NAK Timeout
+#define USB_RXCSRL4_DATAERR     0x00000008  // Data Error
+#define USB_RXCSRL4_OVER        0x00000004  // Overrun
+#define USB_RXCSRL4_ERROR       0x00000004  // Error
+#define USB_RXCSRL4_FULL        0x00000002  // FIFO Full
+#define USB_RXCSRL4_RXRDY       0x00000001  // Receive Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRH4 register.
+//
+//*****************************************************************************
+#define USB_RXCSRH4_AUTOCL      0x00000080  // Auto Clear
+#define USB_RXCSRH4_AUTORQ      0x00000040  // Auto Request
+#define USB_RXCSRH4_ISO         0x00000040  // Isochronous Transfers
+#define USB_RXCSRH4_DMAEN       0x00000020  // DMA Request Enable
+#define USB_RXCSRH4_DISNYET     0x00000010  // Disable NYET
+#define USB_RXCSRH4_PIDERR      0x00000010  // PID Error
+#define USB_RXCSRH4_DMAMOD      0x00000008  // DMA Request Mode
+#define USB_RXCSRH4_DTWE        0x00000004  // Data Toggle Write Enable
+#define USB_RXCSRH4_DT          0x00000002  // Data Toggle
+#define USB_RXCSRH4_INCOMPRX    0x00000001  // Incomplete RX Transmission
+                                            // Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCOUNT4 register.
+//
+//*****************************************************************************
+#define USB_RXCOUNT4_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT4_COUNT_S    0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXTYPE4 register.
+//
+//*****************************************************************************
+#define USB_TXTYPE4_SPEED_M     0x000000C0  // Operating Speed
+#define USB_TXTYPE4_SPEED_DFLT  0x00000000  // Default
+#define USB_TXTYPE4_SPEED_HIGH  0x00000040  // High
+#define USB_TXTYPE4_SPEED_FULL  0x00000080  // Full
+#define USB_TXTYPE4_SPEED_LOW   0x000000C0  // Low
+#define USB_TXTYPE4_PROTO_M     0x00000030  // Protocol
+#define USB_TXTYPE4_PROTO_CTRL  0x00000000  // Control
+#define USB_TXTYPE4_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_TXTYPE4_PROTO_BULK  0x00000020  // Bulk
+#define USB_TXTYPE4_PROTO_INT   0x00000030  // Interrupt
+#define USB_TXTYPE4_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE4_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXINTERVAL4
+// register.
+//
+//*****************************************************************************
+#define USB_TXINTERVAL4_TXPOLL_M                                              \
+                                0x000000FF  // TX Polling
+#define USB_TXINTERVAL4_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_TXINTERVAL4_NAKLMT_S                                              \
+                                0
+#define USB_TXINTERVAL4_TXPOLL_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXTYPE4 register.
+//
+//*****************************************************************************
+#define USB_RXTYPE4_SPEED_M     0x000000C0  // Operating Speed
+#define USB_RXTYPE4_SPEED_DFLT  0x00000000  // Default
+#define USB_RXTYPE4_SPEED_HIGH  0x00000040  // High
+#define USB_RXTYPE4_SPEED_FULL  0x00000080  // Full
+#define USB_RXTYPE4_SPEED_LOW   0x000000C0  // Low
+#define USB_RXTYPE4_PROTO_M     0x00000030  // Protocol
+#define USB_RXTYPE4_PROTO_CTRL  0x00000000  // Control
+#define USB_RXTYPE4_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_RXTYPE4_PROTO_BULK  0x00000020  // Bulk
+#define USB_RXTYPE4_PROTO_INT   0x00000030  // Interrupt
+#define USB_RXTYPE4_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE4_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXINTERVAL4
+// register.
+//
+//*****************************************************************************
+#define USB_RXINTERVAL4_TXPOLL_M                                              \
+                                0x000000FF  // RX Polling
+#define USB_RXINTERVAL4_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_RXINTERVAL4_NAKLMT_S                                              \
+                                0
+#define USB_RXINTERVAL4_TXPOLL_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXMAXP5 register.
+//
+//*****************************************************************************
+#define USB_TXMAXP5_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP5_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRL5 register.
+//
+//*****************************************************************************
+#define USB_TXCSRL5_NAKTO       0x00000080  // NAK Timeout
+#define USB_TXCSRL5_CLRDT       0x00000040  // Clear Data Toggle
+#define USB_TXCSRL5_STALLED     0x00000020  // Endpoint Stalled
+#define USB_TXCSRL5_SETUP       0x00000010  // Setup Packet
+#define USB_TXCSRL5_STALL       0x00000010  // Send STALL
+#define USB_TXCSRL5_FLUSH       0x00000008  // Flush FIFO
+#define USB_TXCSRL5_ERROR       0x00000004  // Error
+#define USB_TXCSRL5_UNDRN       0x00000004  // Underrun
+#define USB_TXCSRL5_FIFONE      0x00000002  // FIFO Not Empty
+#define USB_TXCSRL5_TXRDY       0x00000001  // Transmit Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRH5 register.
+//
+//*****************************************************************************
+#define USB_TXCSRH5_AUTOSET     0x00000080  // Auto Set
+#define USB_TXCSRH5_ISO         0x00000040  // Isochronous Transfers
+#define USB_TXCSRH5_MODE        0x00000020  // Mode
+#define USB_TXCSRH5_DMAEN       0x00000010  // DMA Request Enable
+#define USB_TXCSRH5_FDT         0x00000008  // Force Data Toggle
+#define USB_TXCSRH5_DMAMOD      0x00000004  // DMA Request Mode
+#define USB_TXCSRH5_DTWE        0x00000002  // Data Toggle Write Enable
+#define USB_TXCSRH5_DT          0x00000001  // Data Toggle
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXMAXP5 register.
+//
+//*****************************************************************************
+#define USB_RXMAXP5_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP5_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRL5 register.
+//
+//*****************************************************************************
+#define USB_RXCSRL5_CLRDT       0x00000080  // Clear Data Toggle
+#define USB_RXCSRL5_STALLED     0x00000040  // Endpoint Stalled
+#define USB_RXCSRL5_STALL       0x00000020  // Send STALL
+#define USB_RXCSRL5_REQPKT      0x00000020  // Request Packet
+#define USB_RXCSRL5_FLUSH       0x00000010  // Flush FIFO
+#define USB_RXCSRL5_NAKTO       0x00000008  // NAK Timeout
+#define USB_RXCSRL5_DATAERR     0x00000008  // Data Error
+#define USB_RXCSRL5_ERROR       0x00000004  // Error
+#define USB_RXCSRL5_OVER        0x00000004  // Overrun
+#define USB_RXCSRL5_FULL        0x00000002  // FIFO Full
+#define USB_RXCSRL5_RXRDY       0x00000001  // Receive Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRH5 register.
+//
+//*****************************************************************************
+#define USB_RXCSRH5_AUTOCL      0x00000080  // Auto Clear
+#define USB_RXCSRH5_AUTORQ      0x00000040  // Auto Request
+#define USB_RXCSRH5_ISO         0x00000040  // Isochronous Transfers
+#define USB_RXCSRH5_DMAEN       0x00000020  // DMA Request Enable
+#define USB_RXCSRH5_DISNYET     0x00000010  // Disable NYET
+#define USB_RXCSRH5_PIDERR      0x00000010  // PID Error
+#define USB_RXCSRH5_DMAMOD      0x00000008  // DMA Request Mode
+#define USB_RXCSRH5_DTWE        0x00000004  // Data Toggle Write Enable
+#define USB_RXCSRH5_DT          0x00000002  // Data Toggle
+#define USB_RXCSRH5_INCOMPRX    0x00000001  // Incomplete RX Transmission
+                                            // Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCOUNT5 register.
+//
+//*****************************************************************************
+#define USB_RXCOUNT5_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT5_COUNT_S    0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXTYPE5 register.
+//
+//*****************************************************************************
+#define USB_TXTYPE5_SPEED_M     0x000000C0  // Operating Speed
+#define USB_TXTYPE5_SPEED_DFLT  0x00000000  // Default
+#define USB_TXTYPE5_SPEED_HIGH  0x00000040  // High
+#define USB_TXTYPE5_SPEED_FULL  0x00000080  // Full
+#define USB_TXTYPE5_SPEED_LOW   0x000000C0  // Low
+#define USB_TXTYPE5_PROTO_M     0x00000030  // Protocol
+#define USB_TXTYPE5_PROTO_CTRL  0x00000000  // Control
+#define USB_TXTYPE5_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_TXTYPE5_PROTO_BULK  0x00000020  // Bulk
+#define USB_TXTYPE5_PROTO_INT   0x00000030  // Interrupt
+#define USB_TXTYPE5_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE5_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXINTERVAL5
+// register.
+//
+//*****************************************************************************
+#define USB_TXINTERVAL5_TXPOLL_M                                              \
+                                0x000000FF  // TX Polling
+#define USB_TXINTERVAL5_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_TXINTERVAL5_NAKLMT_S                                              \
+                                0
+#define USB_TXINTERVAL5_TXPOLL_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXTYPE5 register.
+//
+//*****************************************************************************
+#define USB_RXTYPE5_SPEED_M     0x000000C0  // Operating Speed
+#define USB_RXTYPE5_SPEED_DFLT  0x00000000  // Default
+#define USB_RXTYPE5_SPEED_HIGH  0x00000040  // High
+#define USB_RXTYPE5_SPEED_FULL  0x00000080  // Full
+#define USB_RXTYPE5_SPEED_LOW   0x000000C0  // Low
+#define USB_RXTYPE5_PROTO_M     0x00000030  // Protocol
+#define USB_RXTYPE5_PROTO_CTRL  0x00000000  // Control
+#define USB_RXTYPE5_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_RXTYPE5_PROTO_BULK  0x00000020  // Bulk
+#define USB_RXTYPE5_PROTO_INT   0x00000030  // Interrupt
+#define USB_RXTYPE5_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE5_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXINTERVAL5
+// register.
+//
+//*****************************************************************************
+#define USB_RXINTERVAL5_TXPOLL_M                                              \
+                                0x000000FF  // RX Polling
+#define USB_RXINTERVAL5_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_RXINTERVAL5_TXPOLL_S                                              \
+                                0
+#define USB_RXINTERVAL5_NAKLMT_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXMAXP6 register.
+//
+//*****************************************************************************
+#define USB_TXMAXP6_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP6_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRL6 register.
+//
+//*****************************************************************************
+#define USB_TXCSRL6_NAKTO       0x00000080  // NAK Timeout
+#define USB_TXCSRL6_CLRDT       0x00000040  // Clear Data Toggle
+#define USB_TXCSRL6_STALLED     0x00000020  // Endpoint Stalled
+#define USB_TXCSRL6_STALL       0x00000010  // Send STALL
+#define USB_TXCSRL6_SETUP       0x00000010  // Setup Packet
+#define USB_TXCSRL6_FLUSH       0x00000008  // Flush FIFO
+#define USB_TXCSRL6_ERROR       0x00000004  // Error
+#define USB_TXCSRL6_UNDRN       0x00000004  // Underrun
+#define USB_TXCSRL6_FIFONE      0x00000002  // FIFO Not Empty
+#define USB_TXCSRL6_TXRDY       0x00000001  // Transmit Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRH6 register.
+//
+//*****************************************************************************
+#define USB_TXCSRH6_AUTOSET     0x00000080  // Auto Set
+#define USB_TXCSRH6_ISO         0x00000040  // Isochronous Transfers
+#define USB_TXCSRH6_MODE        0x00000020  // Mode
+#define USB_TXCSRH6_DMAEN       0x00000010  // DMA Request Enable
+#define USB_TXCSRH6_FDT         0x00000008  // Force Data Toggle
+#define USB_TXCSRH6_DMAMOD      0x00000004  // DMA Request Mode
+#define USB_TXCSRH6_DTWE        0x00000002  // Data Toggle Write Enable
+#define USB_TXCSRH6_DT          0x00000001  // Data Toggle
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXMAXP6 register.
+//
+//*****************************************************************************
+#define USB_RXMAXP6_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP6_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRL6 register.
+//
+//*****************************************************************************
+#define USB_RXCSRL6_CLRDT       0x00000080  // Clear Data Toggle
+#define USB_RXCSRL6_STALLED     0x00000040  // Endpoint Stalled
+#define USB_RXCSRL6_REQPKT      0x00000020  // Request Packet
+#define USB_RXCSRL6_STALL       0x00000020  // Send STALL
+#define USB_RXCSRL6_FLUSH       0x00000010  // Flush FIFO
+#define USB_RXCSRL6_NAKTO       0x00000008  // NAK Timeout
+#define USB_RXCSRL6_DATAERR     0x00000008  // Data Error
+#define USB_RXCSRL6_ERROR       0x00000004  // Error
+#define USB_RXCSRL6_OVER        0x00000004  // Overrun
+#define USB_RXCSRL6_FULL        0x00000002  // FIFO Full
+#define USB_RXCSRL6_RXRDY       0x00000001  // Receive Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRH6 register.
+//
+//*****************************************************************************
+#define USB_RXCSRH6_AUTOCL      0x00000080  // Auto Clear
+#define USB_RXCSRH6_AUTORQ      0x00000040  // Auto Request
+#define USB_RXCSRH6_ISO         0x00000040  // Isochronous Transfers
+#define USB_RXCSRH6_DMAEN       0x00000020  // DMA Request Enable
+#define USB_RXCSRH6_DISNYET     0x00000010  // Disable NYET
+#define USB_RXCSRH6_PIDERR      0x00000010  // PID Error
+#define USB_RXCSRH6_DMAMOD      0x00000008  // DMA Request Mode
+#define USB_RXCSRH6_DTWE        0x00000004  // Data Toggle Write Enable
+#define USB_RXCSRH6_DT          0x00000002  // Data Toggle
+#define USB_RXCSRH6_INCOMPRX    0x00000001  // Incomplete RX Transmission
+                                            // Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCOUNT6 register.
+//
+//*****************************************************************************
+#define USB_RXCOUNT6_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT6_COUNT_S    0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXTYPE6 register.
+//
+//*****************************************************************************
+#define USB_TXTYPE6_SPEED_M     0x000000C0  // Operating Speed
+#define USB_TXTYPE6_SPEED_DFLT  0x00000000  // Default
+#define USB_TXTYPE6_SPEED_HIGH  0x00000040  // High
+#define USB_TXTYPE6_SPEED_FULL  0x00000080  // Full
+#define USB_TXTYPE6_SPEED_LOW   0x000000C0  // Low
+#define USB_TXTYPE6_PROTO_M     0x00000030  // Protocol
+#define USB_TXTYPE6_PROTO_CTRL  0x00000000  // Control
+#define USB_TXTYPE6_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_TXTYPE6_PROTO_BULK  0x00000020  // Bulk
+#define USB_TXTYPE6_PROTO_INT   0x00000030  // Interrupt
+#define USB_TXTYPE6_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE6_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXINTERVAL6
+// register.
+//
+//*****************************************************************************
+#define USB_TXINTERVAL6_TXPOLL_M                                              \
+                                0x000000FF  // TX Polling
+#define USB_TXINTERVAL6_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_TXINTERVAL6_TXPOLL_S                                              \
+                                0
+#define USB_TXINTERVAL6_NAKLMT_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXTYPE6 register.
+//
+//*****************************************************************************
+#define USB_RXTYPE6_SPEED_M     0x000000C0  // Operating Speed
+#define USB_RXTYPE6_SPEED_DFLT  0x00000000  // Default
+#define USB_RXTYPE6_SPEED_HIGH  0x00000040  // High
+#define USB_RXTYPE6_SPEED_FULL  0x00000080  // Full
+#define USB_RXTYPE6_SPEED_LOW   0x000000C0  // Low
+#define USB_RXTYPE6_PROTO_M     0x00000030  // Protocol
+#define USB_RXTYPE6_PROTO_CTRL  0x00000000  // Control
+#define USB_RXTYPE6_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_RXTYPE6_PROTO_BULK  0x00000020  // Bulk
+#define USB_RXTYPE6_PROTO_INT   0x00000030  // Interrupt
+#define USB_RXTYPE6_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE6_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXINTERVAL6
+// register.
+//
+//*****************************************************************************
+#define USB_RXINTERVAL6_TXPOLL_M                                              \
+                                0x000000FF  // RX Polling
+#define USB_RXINTERVAL6_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_RXINTERVAL6_NAKLMT_S                                              \
+                                0
+#define USB_RXINTERVAL6_TXPOLL_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXMAXP7 register.
+//
+//*****************************************************************************
+#define USB_TXMAXP7_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP7_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRL7 register.
+//
+//*****************************************************************************
+#define USB_TXCSRL7_NAKTO       0x00000080  // NAK Timeout
+#define USB_TXCSRL7_CLRDT       0x00000040  // Clear Data Toggle
+#define USB_TXCSRL7_STALLED     0x00000020  // Endpoint Stalled
+#define USB_TXCSRL7_STALL       0x00000010  // Send STALL
+#define USB_TXCSRL7_SETUP       0x00000010  // Setup Packet
+#define USB_TXCSRL7_FLUSH       0x00000008  // Flush FIFO
+#define USB_TXCSRL7_ERROR       0x00000004  // Error
+#define USB_TXCSRL7_UNDRN       0x00000004  // Underrun
+#define USB_TXCSRL7_FIFONE      0x00000002  // FIFO Not Empty
+#define USB_TXCSRL7_TXRDY       0x00000001  // Transmit Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXCSRH7 register.
+//
+//*****************************************************************************
+#define USB_TXCSRH7_AUTOSET     0x00000080  // Auto Set
+#define USB_TXCSRH7_ISO         0x00000040  // Isochronous Transfers
+#define USB_TXCSRH7_MODE        0x00000020  // Mode
+#define USB_TXCSRH7_DMAEN       0x00000010  // DMA Request Enable
+#define USB_TXCSRH7_FDT         0x00000008  // Force Data Toggle
+#define USB_TXCSRH7_DMAMOD      0x00000004  // DMA Request Mode
+#define USB_TXCSRH7_DTWE        0x00000002  // Data Toggle Write Enable
+#define USB_TXCSRH7_DT          0x00000001  // Data Toggle
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXMAXP7 register.
+//
+//*****************************************************************************
+#define USB_RXMAXP7_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP7_MAXLOAD_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRL7 register.
+//
+//*****************************************************************************
+#define USB_RXCSRL7_CLRDT       0x00000080  // Clear Data Toggle
+#define USB_RXCSRL7_STALLED     0x00000040  // Endpoint Stalled
+#define USB_RXCSRL7_REQPKT      0x00000020  // Request Packet
+#define USB_RXCSRL7_STALL       0x00000020  // Send STALL
+#define USB_RXCSRL7_FLUSH       0x00000010  // Flush FIFO
+#define USB_RXCSRL7_DATAERR     0x00000008  // Data Error
+#define USB_RXCSRL7_NAKTO       0x00000008  // NAK Timeout
+#define USB_RXCSRL7_ERROR       0x00000004  // Error
+#define USB_RXCSRL7_OVER        0x00000004  // Overrun
+#define USB_RXCSRL7_FULL        0x00000002  // FIFO Full
+#define USB_RXCSRL7_RXRDY       0x00000001  // Receive Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCSRH7 register.
+//
+//*****************************************************************************
+#define USB_RXCSRH7_AUTOCL      0x00000080  // Auto Clear
+#define USB_RXCSRH7_ISO         0x00000040  // Isochronous Transfers
+#define USB_RXCSRH7_AUTORQ      0x00000040  // Auto Request
+#define USB_RXCSRH7_DMAEN       0x00000020  // DMA Request Enable
+#define USB_RXCSRH7_PIDERR      0x00000010  // PID Error
+#define USB_RXCSRH7_DISNYET     0x00000010  // Disable NYET
+#define USB_RXCSRH7_DMAMOD      0x00000008  // DMA Request Mode
+#define USB_RXCSRH7_DTWE        0x00000004  // Data Toggle Write Enable
+#define USB_RXCSRH7_DT          0x00000002  // Data Toggle
+#define USB_RXCSRH7_INCOMPRX    0x00000001  // Incomplete RX Transmission
+                                            // Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXCOUNT7 register.
+//
+//*****************************************************************************
+#define USB_RXCOUNT7_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT7_COUNT_S    0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXTYPE7 register.
+//
+//*****************************************************************************
+#define USB_TXTYPE7_SPEED_M     0x000000C0  // Operating Speed
+#define USB_TXTYPE7_SPEED_DFLT  0x00000000  // Default
+#define USB_TXTYPE7_SPEED_HIGH  0x00000040  // High
+#define USB_TXTYPE7_SPEED_FULL  0x00000080  // Full
+#define USB_TXTYPE7_SPEED_LOW   0x000000C0  // Low
+#define USB_TXTYPE7_PROTO_M     0x00000030  // Protocol
+#define USB_TXTYPE7_PROTO_CTRL  0x00000000  // Control
+#define USB_TXTYPE7_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_TXTYPE7_PROTO_BULK  0x00000020  // Bulk
+#define USB_TXTYPE7_PROTO_INT   0x00000030  // Interrupt
+#define USB_TXTYPE7_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE7_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXINTERVAL7
+// register.
+//
+//*****************************************************************************
+#define USB_TXINTERVAL7_TXPOLL_M                                              \
+                                0x000000FF  // TX Polling
+#define USB_TXINTERVAL7_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_TXINTERVAL7_NAKLMT_S                                              \
+                                0
+#define USB_TXINTERVAL7_TXPOLL_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXTYPE7 register.
+//
+//*****************************************************************************
+#define USB_RXTYPE7_SPEED_M     0x000000C0  // Operating Speed
+#define USB_RXTYPE7_SPEED_DFLT  0x00000000  // Default
+#define USB_RXTYPE7_SPEED_HIGH  0x00000040  // High
+#define USB_RXTYPE7_SPEED_FULL  0x00000080  // Full
+#define USB_RXTYPE7_SPEED_LOW   0x000000C0  // Low
+#define USB_RXTYPE7_PROTO_M     0x00000030  // Protocol
+#define USB_RXTYPE7_PROTO_CTRL  0x00000000  // Control
+#define USB_RXTYPE7_PROTO_ISOC  0x00000010  // Isochronous
+#define USB_RXTYPE7_PROTO_BULK  0x00000020  // Bulk
+#define USB_RXTYPE7_PROTO_INT   0x00000030  // Interrupt
+#define USB_RXTYPE7_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE7_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXINTERVAL7
+// register.
+//
+//*****************************************************************************
+#define USB_RXINTERVAL7_TXPOLL_M                                              \
+                                0x000000FF  // RX Polling
+#define USB_RXINTERVAL7_NAKLMT_M                                              \
+                                0x000000FF  // NAK Limit
+#define USB_RXINTERVAL7_NAKLMT_S                                              \
+                                0
+#define USB_RXINTERVAL7_TXPOLL_S                                              \
+                                0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMAINTR register.
+//
+//*****************************************************************************
+#define USB_DMAINTR_CH7         0x00000080  // Channel 7 DMA Interrupt
+#define USB_DMAINTR_CH6         0x00000040  // Channel 6 DMA Interrupt
+#define USB_DMAINTR_CH5         0x00000020  // Channel 5 DMA Interrupt
+#define USB_DMAINTR_CH4         0x00000010  // Channel 4 DMA Interrupt
+#define USB_DMAINTR_CH3         0x00000008  // Channel 3 DMA Interrupt
+#define USB_DMAINTR_CH2         0x00000004  // Channel 2 DMA Interrupt
+#define USB_DMAINTR_CH1         0x00000002  // Channel 1 DMA Interrupt
+#define USB_DMAINTR_CH0         0x00000001  // Channel 0 DMA Interrupt
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACTL0 register.
+//
+//*****************************************************************************
+#define USB_DMACTL0_BRSTM_M     0x00000600  // Burst Mode
+#define USB_DMACTL0_BRSTM_ANY   0x00000000  // Bursts of unspecified length
+#define USB_DMACTL0_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
+#define USB_DMACTL0_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+                                            // length
+#define USB_DMACTL0_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+                                            // unspecified length
+#define USB_DMACTL0_ERR         0x00000100  // Bus Error Bit
+#define USB_DMACTL0_EP_M        0x000000F0  // Endpoint number
+#define USB_DMACTL0_IE          0x00000008  // DMA Interrupt Enable
+#define USB_DMACTL0_MODE        0x00000004  // DMA Transfer Mode
+#define USB_DMACTL0_DIR         0x00000002  // DMA Direction
+#define USB_DMACTL0_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL0_EP_S        4
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMAADDR0 register.
+//
+//*****************************************************************************
+#define USB_DMAADDR0_ADDR_M     0xFFFFFFFC  // DMA Address
+#define USB_DMAADDR0_ADDR_S     2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACOUNT0
+// register.
+//
+//*****************************************************************************
+#define USB_DMACOUNT0_COUNT_M   0xFFFFFFFC  // DMA Count
+#define USB_DMACOUNT0_COUNT_S   2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACTL1 register.
+//
+//*****************************************************************************
+#define USB_DMACTL1_BRSTM_M     0x00000600  // Burst Mode
+#define USB_DMACTL1_BRSTM_ANY   0x00000000  // Bursts of unspecified length
+#define USB_DMACTL1_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
+#define USB_DMACTL1_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+                                            // length
+#define USB_DMACTL1_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+                                            // unspecified length
+#define USB_DMACTL1_ERR         0x00000100  // Bus Error Bit
+#define USB_DMACTL1_EP_M        0x000000F0  // Endpoint number
+#define USB_DMACTL1_IE          0x00000008  // DMA Interrupt Enable
+#define USB_DMACTL1_MODE        0x00000004  // DMA Transfer Mode
+#define USB_DMACTL1_DIR         0x00000002  // DMA Direction
+#define USB_DMACTL1_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL1_EP_S        4
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMAADDR1 register.
+//
+//*****************************************************************************
+#define USB_DMAADDR1_ADDR_M     0xFFFFFFFC  // DMA Address
+#define USB_DMAADDR1_ADDR_S     2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACOUNT1
+// register.
+//
+//*****************************************************************************
+#define USB_DMACOUNT1_COUNT_M   0xFFFFFFFC  // DMA Count
+#define USB_DMACOUNT1_COUNT_S   2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACTL2 register.
+//
+//*****************************************************************************
+#define USB_DMACTL2_BRSTM_M     0x00000600  // Burst Mode
+#define USB_DMACTL2_BRSTM_ANY   0x00000000  // Bursts of unspecified length
+#define USB_DMACTL2_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
+#define USB_DMACTL2_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+                                            // length
+#define USB_DMACTL2_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+                                            // unspecified length
+#define USB_DMACTL2_ERR         0x00000100  // Bus Error Bit
+#define USB_DMACTL2_EP_M        0x000000F0  // Endpoint number
+#define USB_DMACTL2_IE          0x00000008  // DMA Interrupt Enable
+#define USB_DMACTL2_MODE        0x00000004  // DMA Transfer Mode
+#define USB_DMACTL2_DIR         0x00000002  // DMA Direction
+#define USB_DMACTL2_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL2_EP_S        4
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMAADDR2 register.
+//
+//*****************************************************************************
+#define USB_DMAADDR2_ADDR_M     0xFFFFFFFC  // DMA Address
+#define USB_DMAADDR2_ADDR_S     2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACOUNT2
+// register.
+//
+//*****************************************************************************
+#define USB_DMACOUNT2_COUNT_M   0xFFFFFFFC  // DMA Count
+#define USB_DMACOUNT2_COUNT_S   2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACTL3 register.
+//
+//*****************************************************************************
+#define USB_DMACTL3_BRSTM_M     0x00000600  // Burst Mode
+#define USB_DMACTL3_BRSTM_ANY   0x00000000  // Bursts of unspecified length
+#define USB_DMACTL3_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
+#define USB_DMACTL3_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+                                            // length
+#define USB_DMACTL3_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+                                            // unspecified length
+#define USB_DMACTL3_ERR         0x00000100  // Bus Error Bit
+#define USB_DMACTL3_EP_M        0x000000F0  // Endpoint number
+#define USB_DMACTL3_IE          0x00000008  // DMA Interrupt Enable
+#define USB_DMACTL3_MODE        0x00000004  // DMA Transfer Mode
+#define USB_DMACTL3_DIR         0x00000002  // DMA Direction
+#define USB_DMACTL3_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL3_EP_S        4
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMAADDR3 register.
+//
+//*****************************************************************************
+#define USB_DMAADDR3_ADDR_M     0xFFFFFFFC  // DMA Address
+#define USB_DMAADDR3_ADDR_S     2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACOUNT3
+// register.
+//
+//*****************************************************************************
+#define USB_DMACOUNT3_COUNT_M   0xFFFFFFFC  // DMA Count
+#define USB_DMACOUNT3_COUNT_S   2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACTL4 register.
+//
+//*****************************************************************************
+#define USB_DMACTL4_BRSTM_M     0x00000600  // Burst Mode
+#define USB_DMACTL4_BRSTM_ANY   0x00000000  // Bursts of unspecified length
+#define USB_DMACTL4_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
+#define USB_DMACTL4_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+                                            // length
+#define USB_DMACTL4_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+                                            // unspecified length
+#define USB_DMACTL4_ERR         0x00000100  // Bus Error Bit
+#define USB_DMACTL4_EP_M        0x000000F0  // Endpoint number
+#define USB_DMACTL4_IE          0x00000008  // DMA Interrupt Enable
+#define USB_DMACTL4_MODE        0x00000004  // DMA Transfer Mode
+#define USB_DMACTL4_DIR         0x00000002  // DMA Direction
+#define USB_DMACTL4_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL4_EP_S        4
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMAADDR4 register.
+//
+//*****************************************************************************
+#define USB_DMAADDR4_ADDR_M     0xFFFFFFFC  // DMA Address
+#define USB_DMAADDR4_ADDR_S     2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACOUNT4
+// register.
+//
+//*****************************************************************************
+#define USB_DMACOUNT4_COUNT_M   0xFFFFFFFC  // DMA Count
+#define USB_DMACOUNT4_COUNT_S   2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACTL5 register.
+//
+//*****************************************************************************
+#define USB_DMACTL5_BRSTM_M     0x00000600  // Burst Mode
+#define USB_DMACTL5_BRSTM_ANY   0x00000000  // Bursts of unspecified length
+#define USB_DMACTL5_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
+#define USB_DMACTL5_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+                                            // length
+#define USB_DMACTL5_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+                                            // unspecified length
+#define USB_DMACTL5_ERR         0x00000100  // Bus Error Bit
+#define USB_DMACTL5_EP_M        0x000000F0  // Endpoint number
+#define USB_DMACTL5_IE          0x00000008  // DMA Interrupt Enable
+#define USB_DMACTL5_MODE        0x00000004  // DMA Transfer Mode
+#define USB_DMACTL5_DIR         0x00000002  // DMA Direction
+#define USB_DMACTL5_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL5_EP_S        4
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMAADDR5 register.
+//
+//*****************************************************************************
+#define USB_DMAADDR5_ADDR_M     0xFFFFFFFC  // DMA Address
+#define USB_DMAADDR5_ADDR_S     2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACOUNT5
+// register.
+//
+//*****************************************************************************
+#define USB_DMACOUNT5_COUNT_M   0xFFFFFFFC  // DMA Count
+#define USB_DMACOUNT5_COUNT_S   2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACTL6 register.
+//
+//*****************************************************************************
+#define USB_DMACTL6_BRSTM_M     0x00000600  // Burst Mode
+#define USB_DMACTL6_BRSTM_ANY   0x00000000  // Bursts of unspecified length
+#define USB_DMACTL6_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
+#define USB_DMACTL6_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+                                            // length
+#define USB_DMACTL6_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+                                            // unspecified length
+#define USB_DMACTL6_ERR         0x00000100  // Bus Error Bit
+#define USB_DMACTL6_EP_M        0x000000F0  // Endpoint number
+#define USB_DMACTL6_IE          0x00000008  // DMA Interrupt Enable
+#define USB_DMACTL6_MODE        0x00000004  // DMA Transfer Mode
+#define USB_DMACTL6_DIR         0x00000002  // DMA Direction
+#define USB_DMACTL6_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL6_EP_S        4
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMAADDR6 register.
+//
+//*****************************************************************************
+#define USB_DMAADDR6_ADDR_M     0xFFFFFFFC  // DMA Address
+#define USB_DMAADDR6_ADDR_S     2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACOUNT6
+// register.
+//
+//*****************************************************************************
+#define USB_DMACOUNT6_COUNT_M   0xFFFFFFFC  // DMA Count
+#define USB_DMACOUNT6_COUNT_S   2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACTL7 register.
+//
+//*****************************************************************************
+#define USB_DMACTL7_BRSTM_M     0x00000600  // Burst Mode
+#define USB_DMACTL7_BRSTM_ANY   0x00000000  // Bursts of unspecified length
+#define USB_DMACTL7_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
+#define USB_DMACTL7_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+                                            // length
+#define USB_DMACTL7_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+                                            // unspecified length
+#define USB_DMACTL7_ERR         0x00000100  // Bus Error Bit
+#define USB_DMACTL7_EP_M        0x000000F0  // Endpoint number
+#define USB_DMACTL7_IE          0x00000008  // DMA Interrupt Enable
+#define USB_DMACTL7_MODE        0x00000004  // DMA Transfer Mode
+#define USB_DMACTL7_DIR         0x00000002  // DMA Direction
+#define USB_DMACTL7_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL7_EP_S        4
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMAADDR7 register.
+//
+//*****************************************************************************
+#define USB_DMAADDR7_ADDR_M     0xFFFFFFFC  // DMA Address
+#define USB_DMAADDR7_ADDR_S     2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DMACOUNT7
+// register.
+//
+//*****************************************************************************
+#define USB_DMACOUNT7_COUNT_M   0xFFFFFFFC  // DMA Count
+#define USB_DMACOUNT7_COUNT_S   2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RQPKTCOUNT1
+// register.
+//
+//*****************************************************************************
+#define USB_RQPKTCOUNT1_M       0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT1_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RQPKTCOUNT2
+// register.
+//
+//*****************************************************************************
+#define USB_RQPKTCOUNT2_M       0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT2_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RQPKTCOUNT3
+// register.
+//
+//*****************************************************************************
+#define USB_RQPKTCOUNT3_M       0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT3_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RQPKTCOUNT4
+// register.
+//
+//*****************************************************************************
+#define USB_RQPKTCOUNT4_COUNT_M 0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT4_COUNT_S 0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RQPKTCOUNT5
+// register.
+//
+//*****************************************************************************
+#define USB_RQPKTCOUNT5_COUNT_M 0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT5_COUNT_S 0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RQPKTCOUNT6
+// register.
+//
+//*****************************************************************************
+#define USB_RQPKTCOUNT6_COUNT_M 0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT6_COUNT_S 0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RQPKTCOUNT7
+// register.
+//
+//*****************************************************************************
+#define USB_RQPKTCOUNT7_COUNT_M 0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT7_COUNT_S 0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_RXDPKTBUFDIS
+// register.
+//
+//*****************************************************************************
+#define USB_RXDPKTBUFDIS_EP7    0x00000080  // EP7 RX Double-Packet Buffer
+                                            // Disable
+#define USB_RXDPKTBUFDIS_EP6    0x00000040  // EP6 RX Double-Packet Buffer
+                                            // Disable
+#define USB_RXDPKTBUFDIS_EP5    0x00000020  // EP5 RX Double-Packet Buffer
+                                            // Disable
+#define USB_RXDPKTBUFDIS_EP4    0x00000010  // EP4 RX Double-Packet Buffer
+                                            // Disable
+#define USB_RXDPKTBUFDIS_EP3    0x00000008  // EP3 RX Double-Packet Buffer
+                                            // Disable
+#define USB_RXDPKTBUFDIS_EP2    0x00000004  // EP2 RX Double-Packet Buffer
+                                            // Disable
+#define USB_RXDPKTBUFDIS_EP1    0x00000002  // EP1 RX Double-Packet Buffer
+                                            // Disable
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_TXDPKTBUFDIS
+// register.
+//
+//*****************************************************************************
+#define USB_TXDPKTBUFDIS_EP7    0x00000080  // EP7 TX Double-Packet Buffer
+                                            // Disable
+#define USB_TXDPKTBUFDIS_EP6    0x00000040  // EP6 TX Double-Packet Buffer
+                                            // Disable
+#define USB_TXDPKTBUFDIS_EP5    0x00000020  // EP5 TX Double-Packet Buffer
+                                            // Disable
+#define USB_TXDPKTBUFDIS_EP4    0x00000010  // EP4 TX Double-Packet Buffer
+                                            // Disable
+#define USB_TXDPKTBUFDIS_EP3    0x00000008  // EP3 TX Double-Packet Buffer
+                                            // Disable
+#define USB_TXDPKTBUFDIS_EP2    0x00000004  // EP2 TX Double-Packet Buffer
+                                            // Disable
+#define USB_TXDPKTBUFDIS_EP1    0x00000002  // EP1 TX Double-Packet Buffer
+                                            // Disable
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_CTO register.
+//
+//*****************************************************************************
+#define USB_CTO_CCTV_M          0x0000FFFF  // Configurable Chirp Timeout Value
+#define USB_CTO_CCTV_S          0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_HHSRTN register.
+//
+//*****************************************************************************
+#define USB_HHSRTN_HHSRTN_M     0x0000FFFF  // HIgh Speed to UTM Operating
+                                            // Delay
+#define USB_HHSRTN_HHSRTN_S     0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_HSBT register.
+//
+//*****************************************************************************
+#define USB_HSBT_HSBT_M         0x0000000F  // High Speed Timeout Adder
+#define USB_HSBT_HSBT_S         0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_LPMATTR register.
+//
+//*****************************************************************************
+#define USB_LPMATTR_ENDPT_M     0x0000F000  // Endpoint
+#define USB_LPMATTR_RMTWAK      0x00000100  // Remote Wake
+#define USB_LPMATTR_HIRD_M      0x000000F0  // Host Initiated Resume Duration
+#define USB_LPMATTR_LS_M        0x0000000F  // Link State
+#define USB_LPMATTR_LS_L1       0x00000001  // Sleep State (L1)
+#define USB_LPMATTR_ENDPT_S     12
+#define USB_LPMATTR_HIRD_S      4
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_LPMCNTRL register.
+//
+//*****************************************************************************
+#define USB_LPMCNTRL_NAK        0x00000010  // LPM NAK
+#define USB_LPMCNTRL_EN_M       0x0000000C  // LPM Enable
+#define USB_LPMCNTRL_EN_NONE    0x00000000  // LPM and Extended transactions
+                                            // are not supported. In this case,
+                                            // the USB does not respond to LPM
+                                            // transactions and LPM
+                                            // transactions cause a timeout
+#define USB_LPMCNTRL_EN_EXT     0x00000004  // LPM is not supported but
+                                            // extended transactions are
+                                            // supported. In this case, the USB
+                                            // does respond to an LPM
+                                            // transaction with a STALL
+#define USB_LPMCNTRL_EN_LPMEXT  0x0000000C  // The USB supports LPM extended
+                                            // transactions. In this case, the
+                                            // USB responds with a NYET or an
+                                            // ACK as determined by the value
+                                            // of TXLPM and other conditions
+#define USB_LPMCNTRL_RES        0x00000002  // LPM Resume
+#define USB_LPMCNTRL_TXLPM      0x00000001  // Transmit LPM Transaction Enable
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_LPMIM register.
+//
+//*****************************************************************************
+#define USB_LPMIM_ERR           0x00000020  // LPM Error Interrupt Mask
+#define USB_LPMIM_RES           0x00000010  // LPM Resume Interrupt Mask
+#define USB_LPMIM_NC            0x00000008  // LPM NC Interrupt Mask
+#define USB_LPMIM_ACK           0x00000004  // LPM ACK Interrupt Mask
+#define USB_LPMIM_NY            0x00000002  // LPM NY Interrupt Mask
+#define USB_LPMIM_STALL         0x00000001  // LPM STALL Interrupt Mask
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_LPMRIS register.
+//
+//*****************************************************************************
+#define USB_LPMRIS_ERR          0x00000020  // LPM Interrupt Status
+#define USB_LPMRIS_RES          0x00000010  // LPM Resume Interrupt Status
+#define USB_LPMRIS_NC           0x00000008  // LPM NC Interrupt Status
+#define USB_LPMRIS_ACK          0x00000004  // LPM ACK Interrupt Status
+#define USB_LPMRIS_NY           0x00000002  // LPM NY Interrupt Status
+#define USB_LPMRIS_LPMST        0x00000001  // LPM STALL Interrupt Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_LPMFADDR register.
+//
+//*****************************************************************************
+#define USB_LPMFADDR_ADDR_M     0x0000007F  // LPM Function Address
+#define USB_LPMFADDR_ADDR_S     0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_EPC register.
+//
+//*****************************************************************************
+#define USB_EPC_PFLTACT_M       0x00000300  // Power Fault Action
+#define USB_EPC_PFLTACT_UNCHG   0x00000000  // Unchanged
+#define USB_EPC_PFLTACT_TRIS    0x00000100  // Tristate
+#define USB_EPC_PFLTACT_LOW     0x00000200  // Low
+#define USB_EPC_PFLTACT_HIGH    0x00000300  // High
+#define USB_EPC_PFLTAEN         0x00000040  // Power Fault Action Enable
+#define USB_EPC_PFLTSEN_HIGH    0x00000020  // Power Fault Sense
+#define USB_EPC_PFLTEN          0x00000010  // Power Fault Input Enable
+#define USB_EPC_EPENDE          0x00000004  // EPEN Drive Enable
+#define USB_EPC_EPEN_M          0x00000003  // External Power Supply Enable
+                                            // Configuration
+#define USB_EPC_EPEN_LOW        0x00000000  // Power Enable Active Low
+#define USB_EPC_EPEN_HIGH       0x00000001  // Power Enable Active High
+#define USB_EPC_EPEN_VBLOW      0x00000002  // Power Enable High if VBUS Low
+                                            // (OTG only)
+#define USB_EPC_EPEN_VBHIGH     0x00000003  // Power Enable High if VBUS High
+                                            // (OTG only)
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_EPCRIS register.
+//
+//*****************************************************************************
+#define USB_EPCRIS_PF           0x00000001  // USB Power Fault Interrupt Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_EPCIM register.
+//
+//*****************************************************************************
+#define USB_EPCIM_PF            0x00000001  // USB Power Fault Interrupt Mask
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_EPCISC register.
+//
+//*****************************************************************************
+#define USB_EPCISC_PF           0x00000001  // USB Power Fault Interrupt Status
+                                            // and Clear
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DRRIS register.
+//
+//*****************************************************************************
+#define USB_DRRIS_RESUME        0x00000001  // RESUME Interrupt Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DRIM register.
+//
+//*****************************************************************************
+#define USB_DRIM_RESUME         0x00000001  // RESUME Interrupt Mask
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_DRISC register.
+//
+//*****************************************************************************
+#define USB_DRISC_RESUME        0x00000001  // RESUME Interrupt Status and
+                                            // Clear
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_GPCS register.
+//
+//*****************************************************************************
+#define USB_GPCS_DEVMOD_M       0x00000007  // Device Mode
+#define USB_GPCS_DEVMOD_OTG     0x00000000  // Use USB0VBUS and USB0ID pin
+#define USB_GPCS_DEVMOD_HOST    0x00000002  // Force USB0VBUS and USB0ID low
+#define USB_GPCS_DEVMOD_DEV     0x00000003  // Force USB0VBUS and USB0ID high
+#define USB_GPCS_DEVMOD_HOSTVBUS                                              \
+                                0x00000004  // Use USB0VBUS and force USB0ID
+                                            // low
+#define USB_GPCS_DEVMOD_DEVVBUS 0x00000005  // Use USB0VBUS and force USB0ID
+                                            // high
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_VDC register.
+//
+//*****************************************************************************
+#define USB_VDC_VBDEN           0x00000001  // VBUS Droop Enable
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_VDCRIS register.
+//
+//*****************************************************************************
+#define USB_VDCRIS_VD           0x00000001  // VBUS Droop Raw Interrupt Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_VDCIM register.
+//
+//*****************************************************************************
+#define USB_VDCIM_VD            0x00000001  // VBUS Droop Interrupt Mask
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_VDCISC register.
+//
+//*****************************************************************************
+#define USB_VDCISC_VD           0x00000001  // VBUS Droop Interrupt Status and
+                                            // Clear
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_PP register.
+//
+//*****************************************************************************
+#define USB_PP_ECNT_M           0x0000FF00  // Endpoint Count
+#define USB_PP_USB_M            0x000000C0  // USB Capability
+#define USB_PP_USB_DEVICE       0x00000040  // DEVICE
+#define USB_PP_USB_HOSTDEVICE   0x00000080  // HOST
+#define USB_PP_USB_OTG          0x000000C0  // OTG
+#define USB_PP_ULPI             0x00000020  // ULPI Present
+#define USB_PP_PHY              0x00000010  // PHY Present
+#define USB_PP_TYPE_M           0x0000000F  // Controller Type
+#define USB_PP_TYPE_0           0x00000000  // The first-generation USB
+                                            // controller
+#define USB_PP_TYPE_1           0x00000001  // The second-generation USB
+                                            // controller revision
+#define USB_PP_ECNT_S           8
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_PC register.
+//
+//*****************************************************************************
+#define USB_PC_ULPIEN           0x00010000  // ULPI Enable
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the USB_O_CC register.
+//
+//*****************************************************************************
+#define USB_CC_CLKEN            0x00000200  // USB Clock Enable
+#define USB_CC_CSD              0x00000100  // Clock Source/Direction
+#define USB_CC_CLKDIV_M         0x0000000F  // PLL Clock Divisor
+#define USB_CC_CLKDIV_S         0
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/microchip/pic32mz/usbhs_registers.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/microchip/pic32mz/usbhs_registers.h
new file mode 100644
index 00000000000..757e3f08308
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/microchip/pic32mz/usbhs_registers.h
@@ -0,0 +1,931 @@
+/*******************************************************************************
+* Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries.
+*
+* Subject to your compliance with these terms, you may use Microchip software
+* and any derivatives exclusively with Microchip products. It is your
+* responsibility to comply with third party license terms applicable to your
+* use of third party software (including open source software) that may
+* accompany Microchip software.
+*
+* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER
+* EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED
+* WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A
+* PARTICULAR PURPOSE.
+*
+* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
+* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
+* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE
+* FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN
+* ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+*******************************************************************************/
+/*******************************************************************************
+  USBHS Peripheral Library Register Defintions 
+
+  File Name:
+    usbhs_registers.h
+
+  Summary:
+    USBHS PLIB Register Defintions
+
+  Description:
+    This file contains the constants and defintions which are required by the
+    the USBHS library.
+*******************************************************************************/
+
+#ifndef __USBHS_REGISTERS_H__
+#define __USBHS_REGISTERS_H__
+
+#include <p32xxxx.h>
+#include <stdint.h>
+
+/*****************************************
+ * Module Register Offsets.
+ *****************************************/
+
+#define USBHS_REG_FADDR         0x000
+#define USBHS_REG_POWER         0x001
+#define USBHS_REG_INTRTX        0x002
+#define USBHS_REG_INTRRX        0x004
+#define USBHS_REG_INTRTXE       0x006
+#define USBHS_REG_INTRRXE       0x008
+#define USBHS_REG_INTRUSB       0x00A 
+#define USBHS_REG_INTRUSBE      0x00B 
+#define USBHS_REG_FRAME         0x00C
+#define USBHS_REG_INDEX         0x00E
+#define USBHS_REG_TESTMODE      0x00F
+
+/*******************************************************
+ * Endpoint Control Status Registers (CSR). These values 
+ * should be added to either the 0x10 to access the
+ * register through Indexed CSR. To access the actual 
+ * CSR, see ahead in this header file.
+ ******************************************************/
+
+#define USBHS_REG_EP_TXMAXP     0x000
+#define USBHS_REG_EP_CSR0L      0x002
+#define USBHS_REG_EP_CSR0H      0x003
+#define USBHS_REG_EP_TXCSRL     0x002
+#define USBHS_REG_EP_TXCSRH     0x003
+#define USBHS_REG_EP_RXMAXP     0x004
+#define USBHS_REG_EP_RXCSRL     0x006
+#define USBHS_REG_EP_RXCSRH     0x007
+#define USBHS_REG_EP_COUNT0     0x008
+#define USBHS_REG_EP_RXCOUNT    0x008
+#define USBHS_REG_EP_TYPE0      0x01A
+#define USBHS_REG_EP_TXTYPE     0x01A
+#define USBHS_REG_EP_NAKLIMIT0  0x01B
+#define USBHS_REG_EP_TXINTERVAL 0x01B
+#define USBHS_REG_EP_RXTYPE     0x01C
+#define USBHS_REG_EP_RXINTERVAL 0x01D
+#define USBHS_REG_EP_CONFIGDATA 0x01F
+#define USBHS_REG_EP_FIFOSIZE   0x01F
+
+#define USBHS_HOST_EP0_SETUPKT_SET 0x8
+#define USBHS_HOST_EP0_TXPKTRDY_SET 0x2
+#define USBHS_SOFT_RST_NRST_SET 0x1
+#define USBHS_SOFT_RST_NRSTX_SET 0x2
+#define USBHS_EP0_DEVICE_SERVICED_RXPKTRDY 0x40
+#define USBHS_EP0_DEVICE_DATAEND 0x08
+#define USBHS_EP0_DEVICE_TXPKTRDY 0x02
+#define USBHS_EP0_HOST_STATUS_STAGE_START 0x40
+#define USBHS_EP0_HOST_REQPKT 0x20
+#define USBHS_EP0_HOST_TXPKTRDY 0x02
+#define USBHS_EP0_HOST_RXPKTRDY 0x01
+#define USBHS_EP_DEVICE_TX_SENT_STALL 0x20
+#define USBHS_EP_DEVICE_TX_SEND_STALL 0x10
+#define USBHS_EP_DEVICE_RX_SENT_STALL 0x40
+#define USBHS_EP_DEVICE_RX_SEND_STALL 0x20
+
+/* FADDR - Device Function Address */
+typedef union 
+{
+    struct __attribute__((packed)) 
+    {
+        unsigned FUNC:7;
+        unsigned :1;
+    };
+
+    uint8_t w;  
+
+} __USBHS_FADDR_t;
+
+/* POWER - Control Resume and Suspend signalling */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned SUSPEN:1;
+        unsigned SUSPMODE:1;
+        unsigned RESUME:1;
+        unsigned RESET:1;
+        unsigned HSMODE:1;
+        unsigned HSEN:1;
+        unsigned SOFTCONN:1;
+        unsigned ISOUPD:1;
+    };
+    struct
+    {   
+        uint8_t w;
+    };
+
+} __USBHS_POWER_t;
+
+/* INTRTXE - Transmit endpoint interrupt enable */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned EP0IE:1;
+        unsigned EP1TXIE:1;
+        unsigned EP2TXIE:1;
+        unsigned EP3TXIE:1;
+        unsigned EP4TXIE:1;
+        unsigned EP5TXIE:1;
+        unsigned EP6TXIE:1;
+        unsigned EP7TXIE:1;
+        unsigned :8;
+    };
+    struct
+    {
+        uint16_t    w;
+    };
+
+} __USBHS_INTRTXE_t;
+
+/* INTRRXE - Receive endpoint interrupt enable */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned :1;
+        unsigned EP1RXIE:1;
+        unsigned EP2RXIE:1;
+        unsigned EP3RXIE:1;
+        unsigned EP4RXIE:1;
+        unsigned EP5RXIE:1;
+        unsigned EP6RXIE:1;
+        unsigned EP7RXIE:1;
+        unsigned :8;
+    };
+    struct
+    {
+        uint16_t    w;
+    };
+
+} __USBHS_INTRRXE_t;
+
+/* INTRUSBE - General USB Interrupt enable */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned SUSPIE:1;
+        unsigned RESUMEIE:1;
+        unsigned RESETIE:1;
+        unsigned SOFIE:1;
+        unsigned CONNIE:1;
+        unsigned DISCONIE:1;
+        unsigned SESSRQIE:1;
+        unsigned VBUSERRIE:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_INTRUSBE_t;
+
+/* FRAME - Frame number */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned RFRMNUM:11;
+        unsigned :5;
+    };
+    struct
+    {
+        uint16_t w;
+    };
+
+} __USBHS_FRAME_t;
+
+/* INDEX - Endpoint index */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned ENDPOINT:4;
+        unsigned :4;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_INDEX_t;
+
+/* TESTMODE - Test mode register */
+typedef union 
+{
+    struct __attribute__((packed))
+    {
+        unsigned NAK:1;
+        unsigned TESTJ:1;
+        unsigned TESTK:1;
+        unsigned PACKET:1;
+        unsigned FORCEHS:1;
+        unsigned FORCEFS:1;
+        unsigned FIFOACC:1;
+        unsigned FORCEHST:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TESTMODE_t;
+
+/* COUNT0 - Indicates the amount of data received in endpoint 0 */ 
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXCNT:7;
+        unsigned :1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_COUNT0_t;
+
+/* TYPE0 - Operating speed of target device */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned :6;
+        unsigned SPEED:2;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TYPE0_t;
+
+/* DEVCTL - Module control register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned SESSION:1;
+        unsigned HOSTREQ:1;
+        unsigned HOSTMODE:1;
+        unsigned VBUS:2;
+        unsigned LSDEV:1;
+        unsigned FSDEV:1;
+        unsigned BDEV:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_DEVCTL_t;
+
+/* CSR0L Device - Endpoint Device Mode Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned TXPKTRDY:1;
+        unsigned SENTSTALL:1;
+        unsigned DATAEND:1;
+        unsigned SETUPEND:1;
+        unsigned SENDSTALL:1;
+        unsigned SVCRPR:1;
+        unsigned SVSSETEND:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0L_DEVICE_t;
+
+/* CSR0L Host - Endpoint Host Mode Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned TXPKTRDY:1;
+        unsigned RXSTALL:1;
+        unsigned SETUPPKT:1;
+        unsigned ERROR:1;
+        unsigned REQPKT:1;
+        unsigned STATPKT:1;
+        unsigned NAKTMOUT:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0L_HOST_t;
+
+/* TXCSRL Device - Endpoint Transmit Control Status Register Low */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXPKTRDY:1;
+        unsigned FIFOONE:1;
+        unsigned UNDERRUN:1;
+        unsigned FLUSH:1;
+        unsigned SENDSTALL:1;
+        unsigned SENTSTALL:1;
+        unsigned CLRDT:1;
+        unsigned INCOMPTX:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRL_DEVICE_t;
+
+/* TXCSRL Host - Endpoint Transmit Control Status Register Low */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXPKTRDY:1;
+        unsigned FIFONE:1;
+        unsigned ERROR:1;
+        unsigned FLUSH:1;
+        unsigned SETUPPKT:1;
+        unsigned RXSTALL:1;
+        unsigned CLRDT:1;
+        unsigned INCOMPTX:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRL_HOST_t;
+
+/* TXCSRH Device - Endpoint Transmit Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned :2;
+        unsigned DMAREQMD:1;
+        unsigned FRCDATTG:1;
+        unsigned DMAREQENL:1;
+        unsigned MODE:1;
+        unsigned ISO:1;
+        unsigned AUTOSET:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRH_DEVICE_t;
+
+/* TXCSRH Host - Endpoint Transmit Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned DATATGGL:1;
+        unsigned DTWREN:1;
+        unsigned DMAREQMD:1;
+        unsigned FRCDATTG:1;
+        unsigned DMAREQEN:1;
+        unsigned MODE:1;
+        unsigned :1;
+        unsigned AUOTSET:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRH_HOST_t;
+
+/* CSR0H Device - Endpoint 0 Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned FLSHFIFO:1;
+        unsigned :7;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0H_DEVICE_t;
+
+/* CSR0H Host - Endpoint 0 Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned FLSHFIFO:1;
+        unsigned DATATGGL:1;
+        unsigned DTWREN:1;
+        unsigned DISPING:1;
+        unsigned :4;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0H_HOST_t;
+
+/* RXMAXP - Receive Endpoint Max packet size. */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXMAXP:11;
+        unsigned MULT:5;
+    };
+    struct
+    {
+        uint16_t w;
+    };
+
+} __USBHS_RXMAXP_t;
+
+/* RXCSRL Device - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned FIFOFULL:1;
+        unsigned OVERRUN:1;
+        unsigned DATAERR:1;
+        unsigned FLUSH:1;
+        unsigned SENDSTALL:1;
+        unsigned SENTSTALL:1;
+        unsigned CLRDT:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRL_DEVICE_t;
+
+/* RXCSRL Host - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned FIFOFULL:1;
+        unsigned ERROR:1;
+        unsigned DERRNAKT:1;
+        unsigned FLUSH:1;
+        unsigned REQPKT:1;
+        unsigned RXSTALL:1;
+        unsigned CLRDT:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRL_HOST_t;
+
+/* RXCSRH Device - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned INCOMPRX:1;
+        unsigned :2;
+        unsigned DMAREQMODE:1;
+        unsigned DISNYET:1;
+        unsigned DMAREQEN:1;
+        unsigned ISO:1;
+        unsigned AUTOCLR:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRH_DEVICE_t;
+
+/* RXCSRH Host - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned INCOMPRX:1;
+        unsigned DATATGGL:1;
+        unsigned DATATWEN:1;
+        unsigned DMAREQMD:1;
+        unsigned PIDERR:1;
+        unsigned DMAREQEN:1;
+        unsigned AUTORQ:1;
+        unsigned AUOTCLR:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRH_HOST_t;
+
+/* RXCOUNT - Amount of data pending in RX FIFO */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXCNT:14;
+        unsigned :2;
+    };
+    struct
+    {
+        uint16_t w;
+    };
+
+} __USBHS_RXCOUNT_t;
+
+/* TXTYPE - Specifies the target transmit endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TEP:4;
+        unsigned PROTOCOL:2;
+        unsigned SPEED:2;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXTYPE_t;
+
+/* RXTYPE - Specifies the target receive endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TEP:4;
+        unsigned PROTOCOL:2;
+        unsigned SPEED:2;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXTYPE_t;
+
+/* TXINTERVAL - Defines the polling interval */
+typedef struct
+{
+    uint8_t TXINTERV;
+
+} __USBHS_TXINTERVAL_t;
+
+/* RXINTERVAL - Defines the polling interval */
+typedef struct
+{
+    uint8_t RXINTERV;
+
+} __USBHS_RXINTERVAL_t;
+
+/* TXMAXP - Maximum amount of data that can be transferred through a TX endpoint
+ * */
+
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXMAXP:11;
+        unsigned MULT:5;
+    };
+    uint16_t w;
+
+} __USBHS_TXMAXP_t;  
+
+/* TXFIFOSZ - Size of the transmit endpoint FIFO */
+typedef struct __attribute__((packed))
+{
+    unsigned TXFIFOSZ:4;
+    unsigned TXDPB:1;
+    unsigned :3;
+
+} __USBHS_TXFIFOSZ_t;
+
+/* RXFIFOSZ - Size of the receive endpoint FIFO */
+typedef struct __attribute__((packed))
+{
+    unsigned RXFIFOSZ:4;
+    unsigned RXDPB:1;
+    unsigned :3;
+
+} __USBHS_RXFIFOSZ_t;
+
+/* TXFIFOADD - Start address of the transmit endpoint FIFO */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXFIFOAD:13;
+        unsigned :3;
+    };
+    uint16_t w;
+
+} __USBHS_TXFIFOADD_t;
+
+/* RXFIFOADD - Start address of the receive endpoint FIFO */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXFIFOAD:13;
+        unsigned :3;
+    };
+    uint16_t w;
+
+} __USBHS_RXFIFOADD_t;
+
+/* SOFTRST - Asserts NRSTO and NRSTOX */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned NRST:1;
+        unsigned NRSTX:1;
+        unsigned :6;
+    };
+    uint8_t w;
+
+} __USBHS_SOFTRST_t;
+
+/* TXFUNCADDR - Target address of transmit endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXFADDR:7;
+        unsigned :1;
+    };
+    uint8_t w;
+
+} __USBHS_TXFUNCADDR_t;
+
+/* RXFUNCADDR - Target address of receive endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXFADDR:7;
+        unsigned :1;
+    };
+    uint8_t w;
+
+} __USBHS_RXFUNCADDR_t;
+
+/* TXHUBADDR - Address of the hub to which the target transmit device endpoint
+ * is connected */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXHUBADDR:7;
+        unsigned MULTTRAN:1;
+    };
+    uint8_t w;
+
+} __USBHS_TXHUBADDR_t;
+
+/* RXHUBADDR - Address of the hub to which the target receive device endpoint is
+ * connected */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXHUBADDR:7;
+        unsigned MULTTRAN:1;
+    };
+    uint8_t w;
+
+} __USBHS_RXHUBADDR_t;
+
+/* TXHUBPORT - Address of the hub to which the target transmit device endpoint
+ * is connected. */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXHUBPRT:7;
+        unsigned :1;
+    };
+
+    uint8_t w;
+
+} __USBHS_TXHUBPORT_t;
+
+/* RXHUBPORT - Address of the hub to which the target receive device endpoint
+ * is connected. */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXHUBPRT:7;
+        unsigned :1;
+    };
+
+    uint8_t w;
+
+} __USBHS_RXHUBPORT_t;
+
+/* DMACONTROL - Configures a DMA channel */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned DMAEN:1;
+        unsigned DMADIR:1;
+        unsigned DMAMODE:1;
+        unsigned DMAIE:1;
+        unsigned DMAEP:4;
+        unsigned DMAERR:1;
+        unsigned DMABRSTM:2;
+        unsigned:21;
+    };
+
+    uint32_t w;
+
+} __USBHS_DMACNTL_t;
+
+/* Endpoint Control and Status Register Set */    
+typedef struct __attribute__((packed))
+{
+    volatile __USBHS_TXMAXP_t TXMAXPbits;
+    union
+    {
+        struct
+        {
+            union
+            {
+                volatile __USBHS_CSR0L_DEVICE_t CSR0L_DEVICEbits;
+                volatile __USBHS_CSR0L_HOST_t CSR0L_HOSTbits;
+            };
+            union
+            {
+                volatile __USBHS_CSR0H_DEVICE_t CSR0H_DEVICEbits;
+                volatile __USBHS_CSR0H_HOST_t CSR0H_HOSTbits;
+            };
+        };
+
+        struct
+        {
+            union
+            {
+                volatile __USBHS_TXCSRL_DEVICE_t TXCSRL_DEVICEbits;
+                volatile __USBHS_TXCSRL_HOST_t TXCSRL_HOSTbits;
+            };
+
+            union
+            {
+                volatile __USBHS_TXCSRH_DEVICE_t TXCSRH_DEVICEbits;
+                volatile __USBHS_TXCSRH_HOST_t TXCSRH_HOSTbits;
+            };
+        };
+    };
+
+    volatile __USBHS_RXMAXP_t RXMAXPbits;
+
+    union
+    {
+        volatile __USBHS_RXCSRL_DEVICE_t RXCSRL_DEVICEbits;
+        volatile __USBHS_RXCSRL_HOST_t RXCSRL_HOSTbits;
+    };
+
+    union
+    {
+        volatile __USBHS_RXCSRH_DEVICE_t RXCSRH_DEVICEbits;
+        volatile __USBHS_RXCSRH_HOST_t RXCSRH_HOSTbits;
+    };
+
+    union
+    {
+        volatile __USBHS_COUNT0_t COUNT0bits;
+        volatile __USBHS_RXCOUNT_t RXCOUNTbits;
+    };
+
+    union
+    {
+        volatile __USBHS_TYPE0_t TYPE0bits;
+        volatile __USBHS_TXTYPE_t TXTYPEbits;
+    };
+
+    union
+    {
+        volatile uint8_t NAKLIMIT0;
+        volatile __USBHS_TXINTERVAL_t TXINTERVALbits;
+    };
+
+    volatile __USBHS_RXTYPE_t RXTYPEbits;
+    volatile __USBHS_RXINTERVAL_t RXINTERVALbits;
+    unsigned :8;
+    union
+    {
+        volatile uint8_t CONFIGDATA;
+        volatile uint8_t FIFOSIZE;
+    };
+
+} __USBHS_EPCSR_t;
+
+/* Set of registers that configure the multi-point option */
+typedef struct __attribute__((packed))
+{
+    volatile __USBHS_TXFUNCADDR_t TXFUNCADDRbits;
+    unsigned :8;
+    volatile __USBHS_TXHUBADDR_t TXHUBADDRbits;
+    volatile __USBHS_TXHUBPORT_t TXHUBPORTbits;
+    volatile __USBHS_RXFUNCADDR_t RXFUNCADDRbits;
+    unsigned :8;
+    volatile __USBHS_RXHUBADDR_t RXHUBADDRbits;
+    volatile __USBHS_RXHUBPORT_t RXHUBPORTbits;
+
+} __USBHS_TARGET_ADDR_t;
+
+/* Set of registers that configure the DMA channel */
+typedef struct __attribute__((packed))
+{
+    volatile __USBHS_DMACNTL_t DMACNTLbits;
+    volatile uint32_t DMAADDR;
+    volatile uint32_t DMACOUNT;
+    volatile uint32_t pad;
+} __USBHS_DMA_CHANNEL_t;
+
+/* USBHS module register set */
+typedef struct __attribute__((aligned(4),packed))
+{
+    volatile __USBHS_FADDR_t    FADDRbits;
+    volatile __USBHS_POWER_t    POWERbits;
+    volatile uint16_t           INTRTX;
+    volatile uint16_t           INTRRX;
+    volatile __USBHS_INTRTXE_t  INTRTXEbits;
+    volatile __USBHS_INTRRXE_t  INTRRXEbits;
+    volatile uint8_t            INTRUSB;
+    volatile __USBHS_INTRUSBE_t INTRUSBEbits;
+    volatile __USBHS_FRAME_t    FRAMEbits;
+    volatile __USBHS_INDEX_t    INDEXbits;
+    volatile __USBHS_TESTMODE_t TESTMODEbits;
+    volatile __USBHS_EPCSR_t    INDEXED_EPCSR;
+    volatile uint32_t           FIFO[16];
+    volatile __USBHS_DEVCTL_t   DEVCTLbits;
+    volatile uint8_t            MISC;
+    volatile __USBHS_TXFIFOSZ_t TXFIFOSZbits;
+    volatile __USBHS_RXFIFOSZ_t RXFIFOSZbits;
+
+    volatile __USBHS_TXFIFOADD_t   TXFIFOADDbits;
+    volatile __USBHS_RXFIFOADD_t   RXFIFOADDbits;
+    
+    volatile uint32_t   VCONTROL;
+    volatile uint16_t   HWVERS;
+    volatile uint8_t    padding1[10];
+    volatile uint8_t    EPINFO;
+    volatile uint8_t    RAMINFO;
+    volatile uint8_t    LINKINFO;
+    volatile uint8_t    VPLEN;
+    volatile uint8_t    HS_EOF1;
+    volatile uint8_t    FS_EOF1;
+    volatile uint8_t    LS_EOF1;
+
+    volatile __USBHS_SOFTRST_t    SOFTRSTbits;
+
+    volatile __USBHS_TARGET_ADDR_t  TADDR[16];
+    volatile __USBHS_EPCSR_t        EPCSR[16];
+    volatile uint32_t               DMA_INTR;
+    volatile __USBHS_DMA_CHANNEL_t  DMA_CHANNEL[8]; 
+    volatile uint32_t               RQPKTXOUNT[16];
+
+} usbhs_registers_t;
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/microchip/samx7x/common_usb_regs.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/microchip/samx7x/common_usb_regs.h
new file mode 100644
index 00000000000..d232f0bcba9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/microchip/samx7x/common_usb_regs.h
@@ -0,0 +1,2108 @@
+ /*
+* The MIT License (MIT)
+*
+* Copyright (c) 2019 Microchip Technology Inc.
+* Copyright (c) 2018, hathach (tinyusb.org)
+* Copyright (c) 2021, HiFiPhile
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+* THE SOFTWARE.
+*
+* This file is part of the TinyUSB stack.
+*/
+
+#ifndef _COMMON_USB_REGS_H_
+#define _COMMON_USB_REGS_H_
+
+#if CFG_TUSB_MCU == OPT_MCU_SAMX7X
+
+/* -------- DEVDMANXTDSC : (USBHS Offset: 0x00) (R/W 32) Device DMA Channel Next Descriptor Address Register -------- */
+
+#define DEVDMANXTDSC_OFFSET           (0x00)                                        /**<  (DEVDMANXTDSC) Device DMA Channel Next Descriptor Address Register  Offset */
+
+#define DEVDMANXTDSC_NXT_DSC_ADD_Pos  0                                              /**< (DEVDMANXTDSC) Next Descriptor Address Position */
+#define DEVDMANXTDSC_NXT_DSC_ADD      (_U_(0xFFFFFFFF) << DEVDMANXTDSC_NXT_DSC_ADD_Pos)  /**< (DEVDMANXTDSC) Next Descriptor Address Mask */
+#define DEVDMANXTDSC_Msk              _U_(0xFFFFFFFF)                                /**< (DEVDMANXTDSC) Register Mask  */
+
+
+/* -------- DEVDMAADDRESS : (USBHS Offset: 0x04) (R/W 32) Device DMA Channel Address Register -------- */
+
+#define DEVDMAADDRESS_OFFSET          (0x04)                                        /**<  (DEVDMAADDRESS) Device DMA Channel Address Register  Offset */
+
+#define DEVDMAADDRESS_BUFF_ADD_Pos    0                                              /**< (DEVDMAADDRESS) Buffer Address Position */
+#define DEVDMAADDRESS_BUFF_ADD        (_U_(0xFFFFFFFF) << DEVDMAADDRESS_BUFF_ADD_Pos)  /**< (DEVDMAADDRESS) Buffer Address Mask */
+#define DEVDMAADDRESS_Msk             _U_(0xFFFFFFFF)                                /**< (DEVDMAADDRESS) Register Mask  */
+
+
+/* -------- DEVDMACONTROL : (USBHS Offset: 0x08) (R/W 32) Device DMA Channel Control Register -------- */
+
+#define DEVDMACONTROL_OFFSET          (0x08)                                        /**<  (DEVDMACONTROL) Device DMA Channel Control Register  Offset */
+
+#define DEVDMACONTROL_CHANN_ENB_Pos   0                                              /**< (DEVDMACONTROL) Channel Enable Command Position */
+#define DEVDMACONTROL_CHANN_ENB       (_U_(0x1) << DEVDMACONTROL_CHANN_ENB_Pos)  /**< (DEVDMACONTROL) Channel Enable Command Mask */
+#define DEVDMACONTROL_LDNXT_DSC_Pos   1                                              /**< (DEVDMACONTROL) Load Next Channel Transfer Descriptor Enable Command Position */
+#define DEVDMACONTROL_LDNXT_DSC       (_U_(0x1) << DEVDMACONTROL_LDNXT_DSC_Pos)  /**< (DEVDMACONTROL) Load Next Channel Transfer Descriptor Enable Command Mask */
+#define DEVDMACONTROL_END_TR_EN_Pos   2                                              /**< (DEVDMACONTROL) End of Transfer Enable Control (OUT transfers only) Position */
+#define DEVDMACONTROL_END_TR_EN       (_U_(0x1) << DEVDMACONTROL_END_TR_EN_Pos)  /**< (DEVDMACONTROL) End of Transfer Enable Control (OUT transfers only) Mask */
+#define DEVDMACONTROL_END_B_EN_Pos    3                                              /**< (DEVDMACONTROL) End of Buffer Enable Control Position */
+#define DEVDMACONTROL_END_B_EN        (_U_(0x1) << DEVDMACONTROL_END_B_EN_Pos)  /**< (DEVDMACONTROL) End of Buffer Enable Control Mask */
+#define DEVDMACONTROL_END_TR_IT_Pos   4                                              /**< (DEVDMACONTROL) End of Transfer Interrupt Enable Position */
+#define DEVDMACONTROL_END_TR_IT       (_U_(0x1) << DEVDMACONTROL_END_TR_IT_Pos)  /**< (DEVDMACONTROL) End of Transfer Interrupt Enable Mask */
+#define DEVDMACONTROL_END_BUFFIT_Pos  5                                              /**< (DEVDMACONTROL) End of Buffer Interrupt Enable Position */
+#define DEVDMACONTROL_END_BUFFIT      (_U_(0x1) << DEVDMACONTROL_END_BUFFIT_Pos)  /**< (DEVDMACONTROL) End of Buffer Interrupt Enable Mask */
+#define DEVDMACONTROL_DESC_LD_IT_Pos  6                                              /**< (DEVDMACONTROL) Descriptor Loaded Interrupt Enable Position */
+#define DEVDMACONTROL_DESC_LD_IT      (_U_(0x1) << DEVDMACONTROL_DESC_LD_IT_Pos)  /**< (DEVDMACONTROL) Descriptor Loaded Interrupt Enable Mask */
+#define DEVDMACONTROL_BURST_LCK_Pos   7                                              /**< (DEVDMACONTROL) Burst Lock Enable Position */
+#define DEVDMACONTROL_BURST_LCK       (_U_(0x1) << DEVDMACONTROL_BURST_LCK_Pos)  /**< (DEVDMACONTROL) Burst Lock Enable Mask */
+#define DEVDMACONTROL_BUFF_LENGTH_Pos 16                                             /**< (DEVDMACONTROL) Buffer Byte Length (Write-only) Position */
+#define DEVDMACONTROL_BUFF_LENGTH     (_U_(0xFFFF) << DEVDMACONTROL_BUFF_LENGTH_Pos)  /**< (DEVDMACONTROL) Buffer Byte Length (Write-only) Mask */
+#define DEVDMACONTROL_Msk             _U_(0xFFFF00FF)                                /**< (DEVDMACONTROL) Register Mask  */
+
+
+/* -------- DEVDMASTATUS : (USBHS Offset: 0x0c) (R/W 32) Device DMA Channel Status Register -------- */
+
+#define DEVDMASTATUS_OFFSET           (0x0C)                                        /**<  (DEVDMASTATUS) Device DMA Channel Status Register  Offset */
+
+#define DEVDMASTATUS_CHANN_ENB_Pos    0                                              /**< (DEVDMASTATUS) Channel Enable Status Position */
+#define DEVDMASTATUS_CHANN_ENB        (_U_(0x1) << DEVDMASTATUS_CHANN_ENB_Pos)  /**< (DEVDMASTATUS) Channel Enable Status Mask */
+#define DEVDMASTATUS_CHANN_ACT_Pos    1                                              /**< (DEVDMASTATUS) Channel Active Status Position */
+#define DEVDMASTATUS_CHANN_ACT        (_U_(0x1) << DEVDMASTATUS_CHANN_ACT_Pos)  /**< (DEVDMASTATUS) Channel Active Status Mask */
+#define DEVDMASTATUS_END_TR_ST_Pos    4                                              /**< (DEVDMASTATUS) End of Channel Transfer Status Position */
+#define DEVDMASTATUS_END_TR_ST        (_U_(0x1) << DEVDMASTATUS_END_TR_ST_Pos)  /**< (DEVDMASTATUS) End of Channel Transfer Status Mask */
+#define DEVDMASTATUS_END_BF_ST_Pos    5                                              /**< (DEVDMASTATUS) End of Channel Buffer Status Position */
+#define DEVDMASTATUS_END_BF_ST        (_U_(0x1) << DEVDMASTATUS_END_BF_ST_Pos)  /**< (DEVDMASTATUS) End of Channel Buffer Status Mask */
+#define DEVDMASTATUS_DESC_LDST_Pos    6                                              /**< (DEVDMASTATUS) Descriptor Loaded Status Position */
+#define DEVDMASTATUS_DESC_LDST        (_U_(0x1) << DEVDMASTATUS_DESC_LDST_Pos)  /**< (DEVDMASTATUS) Descriptor Loaded Status Mask */
+#define DEVDMASTATUS_BUFF_COUNT_Pos   16                                             /**< (DEVDMASTATUS) Buffer Byte Count Position */
+#define DEVDMASTATUS_BUFF_COUNT       (_U_(0xFFFF) << DEVDMASTATUS_BUFF_COUNT_Pos)  /**< (DEVDMASTATUS) Buffer Byte Count Mask */
+#define DEVDMASTATUS_Msk              _U_(0xFFFF0073)                                /**< (DEVDMASTATUS) Register Mask  */
+
+
+/* -------- HSTDMANXTDSC : (USBHS Offset: 0x00) (R/W 32) Host DMA Channel Next Descriptor Address Register -------- */
+
+#define HSTDMANXTDSC_OFFSET           (0x00)                                        /**<  (HSTDMANXTDSC) Host DMA Channel Next Descriptor Address Register  Offset */
+
+#define HSTDMANXTDSC_NXT_DSC_ADD_Pos  0                                              /**< (HSTDMANXTDSC) Next Descriptor Address Position */
+#define HSTDMANXTDSC_NXT_DSC_ADD      (_U_(0xFFFFFFFF) << HSTDMANXTDSC_NXT_DSC_ADD_Pos)  /**< (HSTDMANXTDSC) Next Descriptor Address Mask */
+#define HSTDMANXTDSC_Msk              _U_(0xFFFFFFFF)                                /**< (HSTDMANXTDSC) Register Mask  */
+
+
+/* -------- HSTDMAADDRESS : (USBHS Offset: 0x04) (R/W 32) Host DMA Channel Address Register -------- */
+
+#define HSTDMAADDRESS_OFFSET          (0x04)                                        /**<  (HSTDMAADDRESS) Host DMA Channel Address Register  Offset */
+
+#define HSTDMAADDRESS_BUFF_ADD_Pos    0                                              /**< (HSTDMAADDRESS) Buffer Address Position */
+#define HSTDMAADDRESS_BUFF_ADD        (_U_(0xFFFFFFFF) << HSTDMAADDRESS_BUFF_ADD_Pos)  /**< (HSTDMAADDRESS) Buffer Address Mask */
+#define HSTDMAADDRESS_Msk             _U_(0xFFFFFFFF)                                /**< (HSTDMAADDRESS) Register Mask  */
+
+
+/* -------- HSTDMACONTROL : (USBHS Offset: 0x08) (R/W 32) Host DMA Channel Control Register -------- */
+
+#define HSTDMACONTROL_OFFSET          (0x08)                                        /**<  (HSTDMACONTROL) Host DMA Channel Control Register  Offset */
+
+#define HSTDMACONTROL_CHANN_ENB_Pos   0                                              /**< (HSTDMACONTROL) Channel Enable Command Position */
+#define HSTDMACONTROL_CHANN_ENB       (_U_(0x1) << HSTDMACONTROL_CHANN_ENB_Pos)  /**< (HSTDMACONTROL) Channel Enable Command Mask */
+#define HSTDMACONTROL_LDNXT_DSC_Pos   1                                              /**< (HSTDMACONTROL) Load Next Channel Transfer Descriptor Enable Command Position */
+#define HSTDMACONTROL_LDNXT_DSC       (_U_(0x1) << HSTDMACONTROL_LDNXT_DSC_Pos)  /**< (HSTDMACONTROL) Load Next Channel Transfer Descriptor Enable Command Mask */
+#define HSTDMACONTROL_END_TR_EN_Pos   2                                              /**< (HSTDMACONTROL) End of Transfer Enable Control (OUT transfers only) Position */
+#define HSTDMACONTROL_END_TR_EN       (_U_(0x1) << HSTDMACONTROL_END_TR_EN_Pos)  /**< (HSTDMACONTROL) End of Transfer Enable Control (OUT transfers only) Mask */
+#define HSTDMACONTROL_END_B_EN_Pos    3                                              /**< (HSTDMACONTROL) End of Buffer Enable Control Position */
+#define HSTDMACONTROL_END_B_EN        (_U_(0x1) << HSTDMACONTROL_END_B_EN_Pos)  /**< (HSTDMACONTROL) End of Buffer Enable Control Mask */
+#define HSTDMACONTROL_END_TR_IT_Pos   4                                              /**< (HSTDMACONTROL) End of Transfer Interrupt Enable Position */
+#define HSTDMACONTROL_END_TR_IT       (_U_(0x1) << HSTDMACONTROL_END_TR_IT_Pos)  /**< (HSTDMACONTROL) End of Transfer Interrupt Enable Mask */
+#define HSTDMACONTROL_END_BUFFIT_Pos  5                                              /**< (HSTDMACONTROL) End of Buffer Interrupt Enable Position */
+#define HSTDMACONTROL_END_BUFFIT      (_U_(0x1) << HSTDMACONTROL_END_BUFFIT_Pos)  /**< (HSTDMACONTROL) End of Buffer Interrupt Enable Mask */
+#define HSTDMACONTROL_DESC_LD_IT_Pos  6                                              /**< (HSTDMACONTROL) Descriptor Loaded Interrupt Enable Position */
+#define HSTDMACONTROL_DESC_LD_IT      (_U_(0x1) << HSTDMACONTROL_DESC_LD_IT_Pos)  /**< (HSTDMACONTROL) Descriptor Loaded Interrupt Enable Mask */
+#define HSTDMACONTROL_BURST_LCK_Pos   7                                              /**< (HSTDMACONTROL) Burst Lock Enable Position */
+#define HSTDMACONTROL_BURST_LCK       (_U_(0x1) << HSTDMACONTROL_BURST_LCK_Pos)  /**< (HSTDMACONTROL) Burst Lock Enable Mask */
+#define HSTDMACONTROL_BUFF_LENGTH_Pos 16                                             /**< (HSTDMACONTROL) Buffer Byte Length (Write-only) Position */
+#define HSTDMACONTROL_BUFF_LENGTH     (_U_(0xFFFF) << HSTDMACONTROL_BUFF_LENGTH_Pos)  /**< (HSTDMACONTROL) Buffer Byte Length (Write-only) Mask */
+#define HSTDMACONTROL_Msk             _U_(0xFFFF00FF)                                /**< (HSTDMACONTROL) Register Mask  */
+
+
+/* -------- HSTDMASTATUS : (USBHS Offset: 0x0c) (R/W 32) Host DMA Channel Status Register -------- */
+
+#define HSTDMASTATUS_OFFSET           (0x0C)                                        /**<  (HSTDMASTATUS) Host DMA Channel Status Register  Offset */
+
+#define HSTDMASTATUS_CHANN_ENB_Pos    0                                              /**< (HSTDMASTATUS) Channel Enable Status Position */
+#define HSTDMASTATUS_CHANN_ENB        (_U_(0x1) << HSTDMASTATUS_CHANN_ENB_Pos)  /**< (HSTDMASTATUS) Channel Enable Status Mask */
+#define HSTDMASTATUS_CHANN_ACT_Pos    1                                              /**< (HSTDMASTATUS) Channel Active Status Position */
+#define HSTDMASTATUS_CHANN_ACT        (_U_(0x1) << HSTDMASTATUS_CHANN_ACT_Pos)  /**< (HSTDMASTATUS) Channel Active Status Mask */
+#define HSTDMASTATUS_END_TR_ST_Pos    4                                              /**< (HSTDMASTATUS) End of Channel Transfer Status Position */
+#define HSTDMASTATUS_END_TR_ST        (_U_(0x1) << HSTDMASTATUS_END_TR_ST_Pos)  /**< (HSTDMASTATUS) End of Channel Transfer Status Mask */
+#define HSTDMASTATUS_END_BF_ST_Pos    5                                              /**< (HSTDMASTATUS) End of Channel Buffer Status Position */
+#define HSTDMASTATUS_END_BF_ST        (_U_(0x1) << HSTDMASTATUS_END_BF_ST_Pos)  /**< (HSTDMASTATUS) End of Channel Buffer Status Mask */
+#define HSTDMASTATUS_DESC_LDST_Pos    6                                              /**< (HSTDMASTATUS) Descriptor Loaded Status Position */
+#define HSTDMASTATUS_DESC_LDST        (_U_(0x1) << HSTDMASTATUS_DESC_LDST_Pos)  /**< (HSTDMASTATUS) Descriptor Loaded Status Mask */
+#define HSTDMASTATUS_BUFF_COUNT_Pos   16                                             /**< (HSTDMASTATUS) Buffer Byte Count Position */
+#define HSTDMASTATUS_BUFF_COUNT       (_U_(0xFFFF) << HSTDMASTATUS_BUFF_COUNT_Pos)  /**< (HSTDMASTATUS) Buffer Byte Count Mask */
+#define HSTDMASTATUS_Msk              _U_(0xFFFF0073)                                /**< (HSTDMASTATUS) Register Mask  */
+
+
+/* -------- DEVCTRL : (USBHS Offset: 0x00) (R/W 32) Device General Control Register -------- */
+
+#define DEVCTRL_OFFSET                (0x00)                                        /**<  (DEVCTRL) Device General Control Register  Offset */
+
+#define DEVCTRL_UADD_Pos              0                                              /**< (DEVCTRL) USB Address Position */
+#define DEVCTRL_UADD                  (_U_(0x7F) << DEVCTRL_UADD_Pos)          /**< (DEVCTRL) USB Address Mask */
+#define DEVCTRL_ADDEN_Pos             7                                              /**< (DEVCTRL) Address Enable Position */
+#define DEVCTRL_ADDEN                 (_U_(0x1) << DEVCTRL_ADDEN_Pos)          /**< (DEVCTRL) Address Enable Mask */
+#define DEVCTRL_DETACH_Pos            8                                              /**< (DEVCTRL) Detach Position */
+#define DEVCTRL_DETACH                (_U_(0x1) << DEVCTRL_DETACH_Pos)         /**< (DEVCTRL) Detach Mask */
+#define DEVCTRL_RMWKUP_Pos            9                                              /**< (DEVCTRL) Remote Wake-Up Position */
+#define DEVCTRL_RMWKUP                (_U_(0x1) << DEVCTRL_RMWKUP_Pos)         /**< (DEVCTRL) Remote Wake-Up Mask */
+#define DEVCTRL_SPDCONF_Pos           10                                             /**< (DEVCTRL) Mode Configuration Position */
+#define DEVCTRL_SPDCONF               (_U_(0x3) << DEVCTRL_SPDCONF_Pos)        /**< (DEVCTRL) Mode Configuration Mask */
+#define   DEVCTRL_SPDCONF_NORMAL_Val  _U_(0x0)                                       /**< (DEVCTRL) The peripheral starts in Full-speed mode and performs a high-speed reset to switch to High-speed mode if the host is high-speed-capable.  */
+#define   DEVCTRL_SPDCONF_LOW_POWER_Val _U_(0x1)                                       /**< (DEVCTRL) For a better consumption, if high speed is not needed.  */
+#define   DEVCTRL_SPDCONF_HIGH_SPEED_Val _U_(0x2)                                       /**< (DEVCTRL) Forced high speed.  */
+#define   DEVCTRL_SPDCONF_FORCED_FS_Val _U_(0x3)                                       /**< (DEVCTRL) The peripheral remains in Full-speed mode whatever the host speed capability.  */
+#define DEVCTRL_SPDCONF_NORMAL        (DEVCTRL_SPDCONF_NORMAL_Val << DEVCTRL_SPDCONF_Pos)  /**< (DEVCTRL) The peripheral starts in Full-speed mode and performs a high-speed reset to switch to High-speed mode if the host is high-speed-capable. Position  */
+#define DEVCTRL_SPDCONF_LOW_POWER     (DEVCTRL_SPDCONF_LOW_POWER_Val << DEVCTRL_SPDCONF_Pos)  /**< (DEVCTRL) For a better consumption, if high speed is not needed. Position  */
+#define DEVCTRL_SPDCONF_HIGH_SPEED    (DEVCTRL_SPDCONF_HIGH_SPEED_Val << DEVCTRL_SPDCONF_Pos)  /**< (DEVCTRL) Forced high speed. Position  */
+#define DEVCTRL_SPDCONF_FORCED_FS     (DEVCTRL_SPDCONF_FORCED_FS_Val << DEVCTRL_SPDCONF_Pos)  /**< (DEVCTRL) The peripheral remains in Full-speed mode whatever the host speed capability. Position  */
+#define DEVCTRL_LS_Pos                12                                             /**< (DEVCTRL) Low-Speed Mode Force Position */
+#define DEVCTRL_LS                    (_U_(0x1) << DEVCTRL_LS_Pos)             /**< (DEVCTRL) Low-Speed Mode Force Mask */
+#define DEVCTRL_TSTJ_Pos              13                                             /**< (DEVCTRL) Test mode J Position */
+#define DEVCTRL_TSTJ                  (_U_(0x1) << DEVCTRL_TSTJ_Pos)           /**< (DEVCTRL) Test mode J Mask */
+#define DEVCTRL_TSTK_Pos              14                                             /**< (DEVCTRL) Test mode K Position */
+#define DEVCTRL_TSTK                  (_U_(0x1) << DEVCTRL_TSTK_Pos)           /**< (DEVCTRL) Test mode K Mask */
+#define DEVCTRL_TSTPCKT_Pos           15                                             /**< (DEVCTRL) Test packet mode Position */
+#define DEVCTRL_TSTPCKT               (_U_(0x1) << DEVCTRL_TSTPCKT_Pos)        /**< (DEVCTRL) Test packet mode Mask */
+#define DEVCTRL_OPMODE2_Pos           16                                             /**< (DEVCTRL) Specific Operational mode Position */
+#define DEVCTRL_OPMODE2               (_U_(0x1) << DEVCTRL_OPMODE2_Pos)        /**< (DEVCTRL) Specific Operational mode Mask */
+#define DEVCTRL_Msk                   _U_(0x1FFFF)                                   /**< (DEVCTRL) Register Mask  */
+
+#define DEVCTRL_OPMODE_Pos            16                                             /**< (DEVCTRL Position) Specific Operational mode */
+#define DEVCTRL_OPMODE                (_U_(0x1) << DEVCTRL_OPMODE_Pos)         /**< (DEVCTRL Mask) OPMODE */
+
+/* -------- DEVISR : (USBHS Offset: 0x04) (R/ 32) Device Global Interrupt Status Register -------- */
+
+#define DEVISR_OFFSET                 (0x04)                                        /**<  (DEVISR) Device Global Interrupt Status Register  Offset */
+
+#define DEVISR_SUSP_Pos               0                                              /**< (DEVISR) Suspend Interrupt Position */
+#define DEVISR_SUSP                   (_U_(0x1) << DEVISR_SUSP_Pos)            /**< (DEVISR) Suspend Interrupt Mask */
+#define DEVISR_MSOF_Pos               1                                              /**< (DEVISR) Micro Start of Frame Interrupt Position */
+#define DEVISR_MSOF                   (_U_(0x1) << DEVISR_MSOF_Pos)            /**< (DEVISR) Micro Start of Frame Interrupt Mask */
+#define DEVISR_SOF_Pos                2                                              /**< (DEVISR) Start of Frame Interrupt Position */
+#define DEVISR_SOF                    (_U_(0x1) << DEVISR_SOF_Pos)             /**< (DEVISR) Start of Frame Interrupt Mask */
+#define DEVISR_EORST_Pos              3                                              /**< (DEVISR) End of Reset Interrupt Position */
+#define DEVISR_EORST                  (_U_(0x1) << DEVISR_EORST_Pos)           /**< (DEVISR) End of Reset Interrupt Mask */
+#define DEVISR_WAKEUP_Pos             4                                              /**< (DEVISR) Wake-Up Interrupt Position */
+#define DEVISR_WAKEUP                 (_U_(0x1) << DEVISR_WAKEUP_Pos)          /**< (DEVISR) Wake-Up Interrupt Mask */
+#define DEVISR_EORSM_Pos              5                                              /**< (DEVISR) End of Resume Interrupt Position */
+#define DEVISR_EORSM                  (_U_(0x1) << DEVISR_EORSM_Pos)           /**< (DEVISR) End of Resume Interrupt Mask */
+#define DEVISR_UPRSM_Pos              6                                              /**< (DEVISR) Upstream Resume Interrupt Position */
+#define DEVISR_UPRSM                  (_U_(0x1) << DEVISR_UPRSM_Pos)           /**< (DEVISR) Upstream Resume Interrupt Mask */
+#define DEVISR_PEP_0_Pos              12                                             /**< (DEVISR) Endpoint 0 Interrupt Position */
+#define DEVISR_PEP_0                  (_U_(0x1) << DEVISR_PEP_0_Pos)           /**< (DEVISR) Endpoint 0 Interrupt Mask */
+#define DEVISR_PEP_1_Pos              13                                             /**< (DEVISR) Endpoint 1 Interrupt Position */
+#define DEVISR_PEP_1                  (_U_(0x1) << DEVISR_PEP_1_Pos)           /**< (DEVISR) Endpoint 1 Interrupt Mask */
+#define DEVISR_PEP_2_Pos              14                                             /**< (DEVISR) Endpoint 2 Interrupt Position */
+#define DEVISR_PEP_2                  (_U_(0x1) << DEVISR_PEP_2_Pos)           /**< (DEVISR) Endpoint 2 Interrupt Mask */
+#define DEVISR_PEP_3_Pos              15                                             /**< (DEVISR) Endpoint 3 Interrupt Position */
+#define DEVISR_PEP_3                  (_U_(0x1) << DEVISR_PEP_3_Pos)           /**< (DEVISR) Endpoint 3 Interrupt Mask */
+#define DEVISR_PEP_4_Pos              16                                             /**< (DEVISR) Endpoint 4 Interrupt Position */
+#define DEVISR_PEP_4                  (_U_(0x1) << DEVISR_PEP_4_Pos)           /**< (DEVISR) Endpoint 4 Interrupt Mask */
+#define DEVISR_PEP_5_Pos              17                                             /**< (DEVISR) Endpoint 5 Interrupt Position */
+#define DEVISR_PEP_5                  (_U_(0x1) << DEVISR_PEP_5_Pos)           /**< (DEVISR) Endpoint 5 Interrupt Mask */
+#define DEVISR_PEP_6_Pos              18                                             /**< (DEVISR) Endpoint 6 Interrupt Position */
+#define DEVISR_PEP_6                  (_U_(0x1) << DEVISR_PEP_6_Pos)           /**< (DEVISR) Endpoint 6 Interrupt Mask */
+#define DEVISR_PEP_7_Pos              19                                             /**< (DEVISR) Endpoint 7 Interrupt Position */
+#define DEVISR_PEP_7                  (_U_(0x1) << DEVISR_PEP_7_Pos)           /**< (DEVISR) Endpoint 7 Interrupt Mask */
+#define DEVISR_PEP_8_Pos              20                                             /**< (DEVISR) Endpoint 8 Interrupt Position */
+#define DEVISR_PEP_8                  (_U_(0x1) << DEVISR_PEP_8_Pos)           /**< (DEVISR) Endpoint 8 Interrupt Mask */
+#define DEVISR_PEP_9_Pos              21                                             /**< (DEVISR) Endpoint 9 Interrupt Position */
+#define DEVISR_PEP_9                  (_U_(0x1) << DEVISR_PEP_9_Pos)           /**< (DEVISR) Endpoint 9 Interrupt Mask */
+#define DEVISR_DMA_1_Pos              25                                             /**< (DEVISR) DMA Channel 1 Interrupt Position */
+#define DEVISR_DMA_1                  (_U_(0x1) << DEVISR_DMA_1_Pos)           /**< (DEVISR) DMA Channel 1 Interrupt Mask */
+#define DEVISR_DMA_2_Pos              26                                             /**< (DEVISR) DMA Channel 2 Interrupt Position */
+#define DEVISR_DMA_2                  (_U_(0x1) << DEVISR_DMA_2_Pos)           /**< (DEVISR) DMA Channel 2 Interrupt Mask */
+#define DEVISR_DMA_3_Pos              27                                             /**< (DEVISR) DMA Channel 3 Interrupt Position */
+#define DEVISR_DMA_3                  (_U_(0x1) << DEVISR_DMA_3_Pos)           /**< (DEVISR) DMA Channel 3 Interrupt Mask */
+#define DEVISR_DMA_4_Pos              28                                             /**< (DEVISR) DMA Channel 4 Interrupt Position */
+#define DEVISR_DMA_4                  (_U_(0x1) << DEVISR_DMA_4_Pos)           /**< (DEVISR) DMA Channel 4 Interrupt Mask */
+#define DEVISR_DMA_5_Pos              29                                             /**< (DEVISR) DMA Channel 5 Interrupt Position */
+#define DEVISR_DMA_5                  (_U_(0x1) << DEVISR_DMA_5_Pos)           /**< (DEVISR) DMA Channel 5 Interrupt Mask */
+#define DEVISR_DMA_6_Pos              30                                             /**< (DEVISR) DMA Channel 6 Interrupt Position */
+#define DEVISR_DMA_6                  (_U_(0x1) << DEVISR_DMA_6_Pos)           /**< (DEVISR) DMA Channel 6 Interrupt Mask */
+#define DEVISR_DMA_7_Pos              31                                             /**< (DEVISR) DMA Channel 7 Interrupt Position */
+#define DEVISR_DMA_7                  (_U_(0x1) << DEVISR_DMA_7_Pos)           /**< (DEVISR) DMA Channel 7 Interrupt Mask */
+#define DEVISR_Msk                    _U_(0xFE3FF07F)                                /**< (DEVISR) Register Mask  */
+
+#define DEVISR_PEP__Pos               12                                             /**< (DEVISR Position) Endpoint x Interrupt */
+#define DEVISR_PEP_                   (_U_(0x3FF) << DEVISR_PEP__Pos)          /**< (DEVISR Mask) PEP_ */
+#define DEVISR_DMA__Pos               25                                             /**< (DEVISR Position) DMA Channel 7 Interrupt */
+#define DEVISR_DMA_                   (_U_(0x7F) << DEVISR_DMA__Pos)           /**< (DEVISR Mask) DMA_ */
+
+/* -------- DEVICR : (USBHS Offset: 0x08) (/W 32) Device Global Interrupt Clear Register -------- */
+
+#define DEVICR_OFFSET                 (0x08)                                        /**<  (DEVICR) Device Global Interrupt Clear Register  Offset */
+
+#define DEVICR_SUSPC_Pos              0                                              /**< (DEVICR) Suspend Interrupt Clear Position */
+#define DEVICR_SUSPC                  (_U_(0x1) << DEVICR_SUSPC_Pos)           /**< (DEVICR) Suspend Interrupt Clear Mask */
+#define DEVICR_MSOFC_Pos              1                                              /**< (DEVICR) Micro Start of Frame Interrupt Clear Position */
+#define DEVICR_MSOFC                  (_U_(0x1) << DEVICR_MSOFC_Pos)           /**< (DEVICR) Micro Start of Frame Interrupt Clear Mask */
+#define DEVICR_SOFC_Pos               2                                              /**< (DEVICR) Start of Frame Interrupt Clear Position */
+#define DEVICR_SOFC                   (_U_(0x1) << DEVICR_SOFC_Pos)            /**< (DEVICR) Start of Frame Interrupt Clear Mask */
+#define DEVICR_EORSTC_Pos             3                                              /**< (DEVICR) End of Reset Interrupt Clear Position */
+#define DEVICR_EORSTC                 (_U_(0x1) << DEVICR_EORSTC_Pos)          /**< (DEVICR) End of Reset Interrupt Clear Mask */
+#define DEVICR_WAKEUPC_Pos            4                                              /**< (DEVICR) Wake-Up Interrupt Clear Position */
+#define DEVICR_WAKEUPC                (_U_(0x1) << DEVICR_WAKEUPC_Pos)         /**< (DEVICR) Wake-Up Interrupt Clear Mask */
+#define DEVICR_EORSMC_Pos             5                                              /**< (DEVICR) End of Resume Interrupt Clear Position */
+#define DEVICR_EORSMC                 (_U_(0x1) << DEVICR_EORSMC_Pos)          /**< (DEVICR) End of Resume Interrupt Clear Mask */
+#define DEVICR_UPRSMC_Pos             6                                              /**< (DEVICR) Upstream Resume Interrupt Clear Position */
+#define DEVICR_UPRSMC                 (_U_(0x1) << DEVICR_UPRSMC_Pos)          /**< (DEVICR) Upstream Resume Interrupt Clear Mask */
+#define DEVICR_Msk                    _U_(0x7F)                                      /**< (DEVICR) Register Mask  */
+
+
+/* -------- DEVIFR : (USBHS Offset: 0x0c) (/W 32) Device Global Interrupt Set Register -------- */
+
+#define DEVIFR_OFFSET                 (0x0C)                                        /**<  (DEVIFR) Device Global Interrupt Set Register  Offset */
+
+#define DEVIFR_SUSPS_Pos              0                                              /**< (DEVIFR) Suspend Interrupt Set Position */
+#define DEVIFR_SUSPS                  (_U_(0x1) << DEVIFR_SUSPS_Pos)           /**< (DEVIFR) Suspend Interrupt Set Mask */
+#define DEVIFR_MSOFS_Pos              1                                              /**< (DEVIFR) Micro Start of Frame Interrupt Set Position */
+#define DEVIFR_MSOFS                  (_U_(0x1) << DEVIFR_MSOFS_Pos)           /**< (DEVIFR) Micro Start of Frame Interrupt Set Mask */
+#define DEVIFR_SOFS_Pos               2                                              /**< (DEVIFR) Start of Frame Interrupt Set Position */
+#define DEVIFR_SOFS                   (_U_(0x1) << DEVIFR_SOFS_Pos)            /**< (DEVIFR) Start of Frame Interrupt Set Mask */
+#define DEVIFR_EORSTS_Pos             3                                              /**< (DEVIFR) End of Reset Interrupt Set Position */
+#define DEVIFR_EORSTS                 (_U_(0x1) << DEVIFR_EORSTS_Pos)          /**< (DEVIFR) End of Reset Interrupt Set Mask */
+#define DEVIFR_WAKEUPS_Pos            4                                              /**< (DEVIFR) Wake-Up Interrupt Set Position */
+#define DEVIFR_WAKEUPS                (_U_(0x1) << DEVIFR_WAKEUPS_Pos)         /**< (DEVIFR) Wake-Up Interrupt Set Mask */
+#define DEVIFR_EORSMS_Pos             5                                              /**< (DEVIFR) End of Resume Interrupt Set Position */
+#define DEVIFR_EORSMS                 (_U_(0x1) << DEVIFR_EORSMS_Pos)          /**< (DEVIFR) End of Resume Interrupt Set Mask */
+#define DEVIFR_UPRSMS_Pos             6                                              /**< (DEVIFR) Upstream Resume Interrupt Set Position */
+#define DEVIFR_UPRSMS                 (_U_(0x1) << DEVIFR_UPRSMS_Pos)          /**< (DEVIFR) Upstream Resume Interrupt Set Mask */
+#define DEVIFR_DMA_1_Pos              25                                             /**< (DEVIFR) DMA Channel 1 Interrupt Set Position */
+#define DEVIFR_DMA_1                  (_U_(0x1) << DEVIFR_DMA_1_Pos)           /**< (DEVIFR) DMA Channel 1 Interrupt Set Mask */
+#define DEVIFR_DMA_2_Pos              26                                             /**< (DEVIFR) DMA Channel 2 Interrupt Set Position */
+#define DEVIFR_DMA_2                  (_U_(0x1) << DEVIFR_DMA_2_Pos)           /**< (DEVIFR) DMA Channel 2 Interrupt Set Mask */
+#define DEVIFR_DMA_3_Pos              27                                             /**< (DEVIFR) DMA Channel 3 Interrupt Set Position */
+#define DEVIFR_DMA_3                  (_U_(0x1) << DEVIFR_DMA_3_Pos)           /**< (DEVIFR) DMA Channel 3 Interrupt Set Mask */
+#define DEVIFR_DMA_4_Pos              28                                             /**< (DEVIFR) DMA Channel 4 Interrupt Set Position */
+#define DEVIFR_DMA_4                  (_U_(0x1) << DEVIFR_DMA_4_Pos)           /**< (DEVIFR) DMA Channel 4 Interrupt Set Mask */
+#define DEVIFR_DMA_5_Pos              29                                             /**< (DEVIFR) DMA Channel 5 Interrupt Set Position */
+#define DEVIFR_DMA_5                  (_U_(0x1) << DEVIFR_DMA_5_Pos)           /**< (DEVIFR) DMA Channel 5 Interrupt Set Mask */
+#define DEVIFR_DMA_6_Pos              30                                             /**< (DEVIFR) DMA Channel 6 Interrupt Set Position */
+#define DEVIFR_DMA_6                  (_U_(0x1) << DEVIFR_DMA_6_Pos)           /**< (DEVIFR) DMA Channel 6 Interrupt Set Mask */
+#define DEVIFR_DMA_7_Pos              31                                             /**< (DEVIFR) DMA Channel 7 Interrupt Set Position */
+#define DEVIFR_DMA_7                  (_U_(0x1) << DEVIFR_DMA_7_Pos)           /**< (DEVIFR) DMA Channel 7 Interrupt Set Mask */
+#define DEVIFR_Msk                    _U_(0xFE00007F)                                /**< (DEVIFR) Register Mask  */
+
+#define DEVIFR_DMA__Pos               25                                             /**< (DEVIFR Position) DMA Channel 7 Interrupt Set */
+#define DEVIFR_DMA_                   (_U_(0x7F) << DEVIFR_DMA__Pos)           /**< (DEVIFR Mask) DMA_ */
+
+/* -------- DEVIMR : (USBHS Offset: 0x10) (R/ 32) Device Global Interrupt Mask Register -------- */
+
+#define DEVIMR_OFFSET                 (0x10)                                        /**<  (DEVIMR) Device Global Interrupt Mask Register  Offset */
+
+#define DEVIMR_SUSPE_Pos              0                                              /**< (DEVIMR) Suspend Interrupt Mask Position */
+#define DEVIMR_SUSPE                  (_U_(0x1) << DEVIMR_SUSPE_Pos)           /**< (DEVIMR) Suspend Interrupt Mask Mask */
+#define DEVIMR_MSOFE_Pos              1                                              /**< (DEVIMR) Micro Start of Frame Interrupt Mask Position */
+#define DEVIMR_MSOFE                  (_U_(0x1) << DEVIMR_MSOFE_Pos)           /**< (DEVIMR) Micro Start of Frame Interrupt Mask Mask */
+#define DEVIMR_SOFE_Pos               2                                              /**< (DEVIMR) Start of Frame Interrupt Mask Position */
+#define DEVIMR_SOFE                   (_U_(0x1) << DEVIMR_SOFE_Pos)            /**< (DEVIMR) Start of Frame Interrupt Mask Mask */
+#define DEVIMR_EORSTE_Pos             3                                              /**< (DEVIMR) End of Reset Interrupt Mask Position */
+#define DEVIMR_EORSTE                 (_U_(0x1) << DEVIMR_EORSTE_Pos)          /**< (DEVIMR) End of Reset Interrupt Mask Mask */
+#define DEVIMR_WAKEUPE_Pos            4                                              /**< (DEVIMR) Wake-Up Interrupt Mask Position */
+#define DEVIMR_WAKEUPE                (_U_(0x1) << DEVIMR_WAKEUPE_Pos)         /**< (DEVIMR) Wake-Up Interrupt Mask Mask */
+#define DEVIMR_EORSME_Pos             5                                              /**< (DEVIMR) End of Resume Interrupt Mask Position */
+#define DEVIMR_EORSME                 (_U_(0x1) << DEVIMR_EORSME_Pos)          /**< (DEVIMR) End of Resume Interrupt Mask Mask */
+#define DEVIMR_UPRSME_Pos             6                                              /**< (DEVIMR) Upstream Resume Interrupt Mask Position */
+#define DEVIMR_UPRSME                 (_U_(0x1) << DEVIMR_UPRSME_Pos)          /**< (DEVIMR) Upstream Resume Interrupt Mask Mask */
+#define DEVIMR_PEP_0_Pos              12                                             /**< (DEVIMR) Endpoint 0 Interrupt Mask Position */
+#define DEVIMR_PEP_0                  (_U_(0x1) << DEVIMR_PEP_0_Pos)           /**< (DEVIMR) Endpoint 0 Interrupt Mask Mask */
+#define DEVIMR_PEP_1_Pos              13                                             /**< (DEVIMR) Endpoint 1 Interrupt Mask Position */
+#define DEVIMR_PEP_1                  (_U_(0x1) << DEVIMR_PEP_1_Pos)           /**< (DEVIMR) Endpoint 1 Interrupt Mask Mask */
+#define DEVIMR_PEP_2_Pos              14                                             /**< (DEVIMR) Endpoint 2 Interrupt Mask Position */
+#define DEVIMR_PEP_2                  (_U_(0x1) << DEVIMR_PEP_2_Pos)           /**< (DEVIMR) Endpoint 2 Interrupt Mask Mask */
+#define DEVIMR_PEP_3_Pos              15                                             /**< (DEVIMR) Endpoint 3 Interrupt Mask Position */
+#define DEVIMR_PEP_3                  (_U_(0x1) << DEVIMR_PEP_3_Pos)           /**< (DEVIMR) Endpoint 3 Interrupt Mask Mask */
+#define DEVIMR_PEP_4_Pos              16                                             /**< (DEVIMR) Endpoint 4 Interrupt Mask Position */
+#define DEVIMR_PEP_4                  (_U_(0x1) << DEVIMR_PEP_4_Pos)           /**< (DEVIMR) Endpoint 4 Interrupt Mask Mask */
+#define DEVIMR_PEP_5_Pos              17                                             /**< (DEVIMR) Endpoint 5 Interrupt Mask Position */
+#define DEVIMR_PEP_5                  (_U_(0x1) << DEVIMR_PEP_5_Pos)           /**< (DEVIMR) Endpoint 5 Interrupt Mask Mask */
+#define DEVIMR_PEP_6_Pos              18                                             /**< (DEVIMR) Endpoint 6 Interrupt Mask Position */
+#define DEVIMR_PEP_6                  (_U_(0x1) << DEVIMR_PEP_6_Pos)           /**< (DEVIMR) Endpoint 6 Interrupt Mask Mask */
+#define DEVIMR_PEP_7_Pos              19                                             /**< (DEVIMR) Endpoint 7 Interrupt Mask Position */
+#define DEVIMR_PEP_7                  (_U_(0x1) << DEVIMR_PEP_7_Pos)           /**< (DEVIMR) Endpoint 7 Interrupt Mask Mask */
+#define DEVIMR_PEP_8_Pos              20                                             /**< (DEVIMR) Endpoint 8 Interrupt Mask Position */
+#define DEVIMR_PEP_8                  (_U_(0x1) << DEVIMR_PEP_8_Pos)           /**< (DEVIMR) Endpoint 8 Interrupt Mask Mask */
+#define DEVIMR_PEP_9_Pos              21                                             /**< (DEVIMR) Endpoint 9 Interrupt Mask Position */
+#define DEVIMR_PEP_9                  (_U_(0x1) << DEVIMR_PEP_9_Pos)           /**< (DEVIMR) Endpoint 9 Interrupt Mask Mask */
+#define DEVIMR_DMA_1_Pos              25                                             /**< (DEVIMR) DMA Channel 1 Interrupt Mask Position */
+#define DEVIMR_DMA_1                  (_U_(0x1) << DEVIMR_DMA_1_Pos)           /**< (DEVIMR) DMA Channel 1 Interrupt Mask Mask */
+#define DEVIMR_DMA_2_Pos              26                                             /**< (DEVIMR) DMA Channel 2 Interrupt Mask Position */
+#define DEVIMR_DMA_2                  (_U_(0x1) << DEVIMR_DMA_2_Pos)           /**< (DEVIMR) DMA Channel 2 Interrupt Mask Mask */
+#define DEVIMR_DMA_3_Pos              27                                             /**< (DEVIMR) DMA Channel 3 Interrupt Mask Position */
+#define DEVIMR_DMA_3                  (_U_(0x1) << DEVIMR_DMA_3_Pos)           /**< (DEVIMR) DMA Channel 3 Interrupt Mask Mask */
+#define DEVIMR_DMA_4_Pos              28                                             /**< (DEVIMR) DMA Channel 4 Interrupt Mask Position */
+#define DEVIMR_DMA_4                  (_U_(0x1) << DEVIMR_DMA_4_Pos)           /**< (DEVIMR) DMA Channel 4 Interrupt Mask Mask */
+#define DEVIMR_DMA_5_Pos              29                                             /**< (DEVIMR) DMA Channel 5 Interrupt Mask Position */
+#define DEVIMR_DMA_5                  (_U_(0x1) << DEVIMR_DMA_5_Pos)           /**< (DEVIMR) DMA Channel 5 Interrupt Mask Mask */
+#define DEVIMR_DMA_6_Pos              30                                             /**< (DEVIMR) DMA Channel 6 Interrupt Mask Position */
+#define DEVIMR_DMA_6                  (_U_(0x1) << DEVIMR_DMA_6_Pos)           /**< (DEVIMR) DMA Channel 6 Interrupt Mask Mask */
+#define DEVIMR_DMA_7_Pos              31                                             /**< (DEVIMR) DMA Channel 7 Interrupt Mask Position */
+#define DEVIMR_DMA_7                  (_U_(0x1) << DEVIMR_DMA_7_Pos)           /**< (DEVIMR) DMA Channel 7 Interrupt Mask Mask */
+#define DEVIMR_Msk                    _U_(0xFE3FF07F)                                /**< (DEVIMR) Register Mask  */
+
+#define DEVIMR_PEP__Pos               12                                             /**< (DEVIMR Position) Endpoint x Interrupt Mask */
+#define DEVIMR_PEP_                   (_U_(0x3FF) << DEVIMR_PEP__Pos)          /**< (DEVIMR Mask) PEP_ */
+#define DEVIMR_DMA__Pos               25                                             /**< (DEVIMR Position) DMA Channel 7 Interrupt Mask */
+#define DEVIMR_DMA_                   (_U_(0x7F) << DEVIMR_DMA__Pos)           /**< (DEVIMR Mask) DMA_ */
+
+/* -------- DEVIDR : (USBHS Offset: 0x14) (/W 32) Device Global Interrupt Disable Register -------- */
+
+#define DEVIDR_OFFSET                 (0x14)                                        /**<  (DEVIDR) Device Global Interrupt Disable Register  Offset */
+
+#define DEVIDR_SUSPEC_Pos             0                                              /**< (DEVIDR) Suspend Interrupt Disable Position */
+#define DEVIDR_SUSPEC                 (_U_(0x1) << DEVIDR_SUSPEC_Pos)          /**< (DEVIDR) Suspend Interrupt Disable Mask */
+#define DEVIDR_MSOFEC_Pos             1                                              /**< (DEVIDR) Micro Start of Frame Interrupt Disable Position */
+#define DEVIDR_MSOFEC                 (_U_(0x1) << DEVIDR_MSOFEC_Pos)          /**< (DEVIDR) Micro Start of Frame Interrupt Disable Mask */
+#define DEVIDR_SOFEC_Pos              2                                              /**< (DEVIDR) Start of Frame Interrupt Disable Position */
+#define DEVIDR_SOFEC                  (_U_(0x1) << DEVIDR_SOFEC_Pos)           /**< (DEVIDR) Start of Frame Interrupt Disable Mask */
+#define DEVIDR_EORSTEC_Pos            3                                              /**< (DEVIDR) End of Reset Interrupt Disable Position */
+#define DEVIDR_EORSTEC                (_U_(0x1) << DEVIDR_EORSTEC_Pos)         /**< (DEVIDR) End of Reset Interrupt Disable Mask */
+#define DEVIDR_WAKEUPEC_Pos           4                                              /**< (DEVIDR) Wake-Up Interrupt Disable Position */
+#define DEVIDR_WAKEUPEC               (_U_(0x1) << DEVIDR_WAKEUPEC_Pos)        /**< (DEVIDR) Wake-Up Interrupt Disable Mask */
+#define DEVIDR_EORSMEC_Pos            5                                              /**< (DEVIDR) End of Resume Interrupt Disable Position */
+#define DEVIDR_EORSMEC                (_U_(0x1) << DEVIDR_EORSMEC_Pos)         /**< (DEVIDR) End of Resume Interrupt Disable Mask */
+#define DEVIDR_UPRSMEC_Pos            6                                              /**< (DEVIDR) Upstream Resume Interrupt Disable Position */
+#define DEVIDR_UPRSMEC                (_U_(0x1) << DEVIDR_UPRSMEC_Pos)         /**< (DEVIDR) Upstream Resume Interrupt Disable Mask */
+#define DEVIDR_PEP_0_Pos              12                                             /**< (DEVIDR) Endpoint 0 Interrupt Disable Position */
+#define DEVIDR_PEP_0                  (_U_(0x1) << DEVIDR_PEP_0_Pos)           /**< (DEVIDR) Endpoint 0 Interrupt Disable Mask */
+#define DEVIDR_PEP_1_Pos              13                                             /**< (DEVIDR) Endpoint 1 Interrupt Disable Position */
+#define DEVIDR_PEP_1                  (_U_(0x1) << DEVIDR_PEP_1_Pos)           /**< (DEVIDR) Endpoint 1 Interrupt Disable Mask */
+#define DEVIDR_PEP_2_Pos              14                                             /**< (DEVIDR) Endpoint 2 Interrupt Disable Position */
+#define DEVIDR_PEP_2                  (_U_(0x1) << DEVIDR_PEP_2_Pos)           /**< (DEVIDR) Endpoint 2 Interrupt Disable Mask */
+#define DEVIDR_PEP_3_Pos              15                                             /**< (DEVIDR) Endpoint 3 Interrupt Disable Position */
+#define DEVIDR_PEP_3                  (_U_(0x1) << DEVIDR_PEP_3_Pos)           /**< (DEVIDR) Endpoint 3 Interrupt Disable Mask */
+#define DEVIDR_PEP_4_Pos              16                                             /**< (DEVIDR) Endpoint 4 Interrupt Disable Position */
+#define DEVIDR_PEP_4                  (_U_(0x1) << DEVIDR_PEP_4_Pos)           /**< (DEVIDR) Endpoint 4 Interrupt Disable Mask */
+#define DEVIDR_PEP_5_Pos              17                                             /**< (DEVIDR) Endpoint 5 Interrupt Disable Position */
+#define DEVIDR_PEP_5                  (_U_(0x1) << DEVIDR_PEP_5_Pos)           /**< (DEVIDR) Endpoint 5 Interrupt Disable Mask */
+#define DEVIDR_PEP_6_Pos              18                                             /**< (DEVIDR) Endpoint 6 Interrupt Disable Position */
+#define DEVIDR_PEP_6                  (_U_(0x1) << DEVIDR_PEP_6_Pos)           /**< (DEVIDR) Endpoint 6 Interrupt Disable Mask */
+#define DEVIDR_PEP_7_Pos              19                                             /**< (DEVIDR) Endpoint 7 Interrupt Disable Position */
+#define DEVIDR_PEP_7                  (_U_(0x1) << DEVIDR_PEP_7_Pos)           /**< (DEVIDR) Endpoint 7 Interrupt Disable Mask */
+#define DEVIDR_PEP_8_Pos              20                                             /**< (DEVIDR) Endpoint 8 Interrupt Disable Position */
+#define DEVIDR_PEP_8                  (_U_(0x1) << DEVIDR_PEP_8_Pos)           /**< (DEVIDR) Endpoint 8 Interrupt Disable Mask */
+#define DEVIDR_PEP_9_Pos              21                                             /**< (DEVIDR) Endpoint 9 Interrupt Disable Position */
+#define DEVIDR_PEP_9                  (_U_(0x1) << DEVIDR_PEP_9_Pos)           /**< (DEVIDR) Endpoint 9 Interrupt Disable Mask */
+#define DEVIDR_DMA_1_Pos              25                                             /**< (DEVIDR) DMA Channel 1 Interrupt Disable Position */
+#define DEVIDR_DMA_1                  (_U_(0x1) << DEVIDR_DMA_1_Pos)           /**< (DEVIDR) DMA Channel 1 Interrupt Disable Mask */
+#define DEVIDR_DMA_2_Pos              26                                             /**< (DEVIDR) DMA Channel 2 Interrupt Disable Position */
+#define DEVIDR_DMA_2                  (_U_(0x1) << DEVIDR_DMA_2_Pos)           /**< (DEVIDR) DMA Channel 2 Interrupt Disable Mask */
+#define DEVIDR_DMA_3_Pos              27                                             /**< (DEVIDR) DMA Channel 3 Interrupt Disable Position */
+#define DEVIDR_DMA_3                  (_U_(0x1) << DEVIDR_DMA_3_Pos)           /**< (DEVIDR) DMA Channel 3 Interrupt Disable Mask */
+#define DEVIDR_DMA_4_Pos              28                                             /**< (DEVIDR) DMA Channel 4 Interrupt Disable Position */
+#define DEVIDR_DMA_4                  (_U_(0x1) << DEVIDR_DMA_4_Pos)           /**< (DEVIDR) DMA Channel 4 Interrupt Disable Mask */
+#define DEVIDR_DMA_5_Pos              29                                             /**< (DEVIDR) DMA Channel 5 Interrupt Disable Position */
+#define DEVIDR_DMA_5                  (_U_(0x1) << DEVIDR_DMA_5_Pos)           /**< (DEVIDR) DMA Channel 5 Interrupt Disable Mask */
+#define DEVIDR_DMA_6_Pos              30                                             /**< (DEVIDR) DMA Channel 6 Interrupt Disable Position */
+#define DEVIDR_DMA_6                  (_U_(0x1) << DEVIDR_DMA_6_Pos)           /**< (DEVIDR) DMA Channel 6 Interrupt Disable Mask */
+#define DEVIDR_DMA_7_Pos              31                                             /**< (DEVIDR) DMA Channel 7 Interrupt Disable Position */
+#define DEVIDR_DMA_7                  (_U_(0x1) << DEVIDR_DMA_7_Pos)           /**< (DEVIDR) DMA Channel 7 Interrupt Disable Mask */
+#define DEVIDR_Msk                    _U_(0xFE3FF07F)                                /**< (DEVIDR) Register Mask  */
+
+#define DEVIDR_PEP__Pos               12                                             /**< (DEVIDR Position) Endpoint x Interrupt Disable */
+#define DEVIDR_PEP_                   (_U_(0x3FF) << DEVIDR_PEP__Pos)          /**< (DEVIDR Mask) PEP_ */
+#define DEVIDR_DMA__Pos               25                                             /**< (DEVIDR Position) DMA Channel 7 Interrupt Disable */
+#define DEVIDR_DMA_                   (_U_(0x7F) << DEVIDR_DMA__Pos)           /**< (DEVIDR Mask) DMA_ */
+
+/* -------- DEVIER : (USBHS Offset: 0x18) (/W 32) Device Global Interrupt Enable Register -------- */
+
+#define DEVIER_OFFSET                 (0x18)                                        /**<  (DEVIER) Device Global Interrupt Enable Register  Offset */
+
+#define DEVIER_SUSPES_Pos             0                                              /**< (DEVIER) Suspend Interrupt Enable Position */
+#define DEVIER_SUSPES                 (_U_(0x1) << DEVIER_SUSPES_Pos)          /**< (DEVIER) Suspend Interrupt Enable Mask */
+#define DEVIER_MSOFES_Pos             1                                              /**< (DEVIER) Micro Start of Frame Interrupt Enable Position */
+#define DEVIER_MSOFES                 (_U_(0x1) << DEVIER_MSOFES_Pos)          /**< (DEVIER) Micro Start of Frame Interrupt Enable Mask */
+#define DEVIER_SOFES_Pos              2                                              /**< (DEVIER) Start of Frame Interrupt Enable Position */
+#define DEVIER_SOFES                  (_U_(0x1) << DEVIER_SOFES_Pos)           /**< (DEVIER) Start of Frame Interrupt Enable Mask */
+#define DEVIER_EORSTES_Pos            3                                              /**< (DEVIER) End of Reset Interrupt Enable Position */
+#define DEVIER_EORSTES                (_U_(0x1) << DEVIER_EORSTES_Pos)         /**< (DEVIER) End of Reset Interrupt Enable Mask */
+#define DEVIER_WAKEUPES_Pos           4                                              /**< (DEVIER) Wake-Up Interrupt Enable Position */
+#define DEVIER_WAKEUPES               (_U_(0x1) << DEVIER_WAKEUPES_Pos)        /**< (DEVIER) Wake-Up Interrupt Enable Mask */
+#define DEVIER_EORSMES_Pos            5                                              /**< (DEVIER) End of Resume Interrupt Enable Position */
+#define DEVIER_EORSMES                (_U_(0x1) << DEVIER_EORSMES_Pos)         /**< (DEVIER) End of Resume Interrupt Enable Mask */
+#define DEVIER_UPRSMES_Pos            6                                              /**< (DEVIER) Upstream Resume Interrupt Enable Position */
+#define DEVIER_UPRSMES                (_U_(0x1) << DEVIER_UPRSMES_Pos)         /**< (DEVIER) Upstream Resume Interrupt Enable Mask */
+#define DEVIER_PEP_0_Pos              12                                             /**< (DEVIER) Endpoint 0 Interrupt Enable Position */
+#define DEVIER_PEP_0                  (_U_(0x1) << DEVIER_PEP_0_Pos)           /**< (DEVIER) Endpoint 0 Interrupt Enable Mask */
+#define DEVIER_PEP_1_Pos              13                                             /**< (DEVIER) Endpoint 1 Interrupt Enable Position */
+#define DEVIER_PEP_1                  (_U_(0x1) << DEVIER_PEP_1_Pos)           /**< (DEVIER) Endpoint 1 Interrupt Enable Mask */
+#define DEVIER_PEP_2_Pos              14                                             /**< (DEVIER) Endpoint 2 Interrupt Enable Position */
+#define DEVIER_PEP_2                  (_U_(0x1) << DEVIER_PEP_2_Pos)           /**< (DEVIER) Endpoint 2 Interrupt Enable Mask */
+#define DEVIER_PEP_3_Pos              15                                             /**< (DEVIER) Endpoint 3 Interrupt Enable Position */
+#define DEVIER_PEP_3                  (_U_(0x1) << DEVIER_PEP_3_Pos)           /**< (DEVIER) Endpoint 3 Interrupt Enable Mask */
+#define DEVIER_PEP_4_Pos              16                                             /**< (DEVIER) Endpoint 4 Interrupt Enable Position */
+#define DEVIER_PEP_4                  (_U_(0x1) << DEVIER_PEP_4_Pos)           /**< (DEVIER) Endpoint 4 Interrupt Enable Mask */
+#define DEVIER_PEP_5_Pos              17                                             /**< (DEVIER) Endpoint 5 Interrupt Enable Position */
+#define DEVIER_PEP_5                  (_U_(0x1) << DEVIER_PEP_5_Pos)           /**< (DEVIER) Endpoint 5 Interrupt Enable Mask */
+#define DEVIER_PEP_6_Pos              18                                             /**< (DEVIER) Endpoint 6 Interrupt Enable Position */
+#define DEVIER_PEP_6                  (_U_(0x1) << DEVIER_PEP_6_Pos)           /**< (DEVIER) Endpoint 6 Interrupt Enable Mask */
+#define DEVIER_PEP_7_Pos              19                                             /**< (DEVIER) Endpoint 7 Interrupt Enable Position */
+#define DEVIER_PEP_7                  (_U_(0x1) << DEVIER_PEP_7_Pos)           /**< (DEVIER) Endpoint 7 Interrupt Enable Mask */
+#define DEVIER_PEP_8_Pos              20                                             /**< (DEVIER) Endpoint 8 Interrupt Enable Position */
+#define DEVIER_PEP_8                  (_U_(0x1) << DEVIER_PEP_8_Pos)           /**< (DEVIER) Endpoint 8 Interrupt Enable Mask */
+#define DEVIER_PEP_9_Pos              21                                             /**< (DEVIER) Endpoint 9 Interrupt Enable Position */
+#define DEVIER_PEP_9                  (_U_(0x1) << DEVIER_PEP_9_Pos)           /**< (DEVIER) Endpoint 9 Interrupt Enable Mask */
+#define DEVIER_DMA_1_Pos              25                                             /**< (DEVIER) DMA Channel 1 Interrupt Enable Position */
+#define DEVIER_DMA_1                  (_U_(0x1) << DEVIER_DMA_1_Pos)           /**< (DEVIER) DMA Channel 1 Interrupt Enable Mask */
+#define DEVIER_DMA_2_Pos              26                                             /**< (DEVIER) DMA Channel 2 Interrupt Enable Position */
+#define DEVIER_DMA_2                  (_U_(0x1) << DEVIER_DMA_2_Pos)           /**< (DEVIER) DMA Channel 2 Interrupt Enable Mask */
+#define DEVIER_DMA_3_Pos              27                                             /**< (DEVIER) DMA Channel 3 Interrupt Enable Position */
+#define DEVIER_DMA_3                  (_U_(0x1) << DEVIER_DMA_3_Pos)           /**< (DEVIER) DMA Channel 3 Interrupt Enable Mask */
+#define DEVIER_DMA_4_Pos              28                                             /**< (DEVIER) DMA Channel 4 Interrupt Enable Position */
+#define DEVIER_DMA_4                  (_U_(0x1) << DEVIER_DMA_4_Pos)           /**< (DEVIER) DMA Channel 4 Interrupt Enable Mask */
+#define DEVIER_DMA_5_Pos              29                                             /**< (DEVIER) DMA Channel 5 Interrupt Enable Position */
+#define DEVIER_DMA_5                  (_U_(0x1) << DEVIER_DMA_5_Pos)           /**< (DEVIER) DMA Channel 5 Interrupt Enable Mask */
+#define DEVIER_DMA_6_Pos              30                                             /**< (DEVIER) DMA Channel 6 Interrupt Enable Position */
+#define DEVIER_DMA_6                  (_U_(0x1) << DEVIER_DMA_6_Pos)           /**< (DEVIER) DMA Channel 6 Interrupt Enable Mask */
+#define DEVIER_DMA_7_Pos              31                                             /**< (DEVIER) DMA Channel 7 Interrupt Enable Position */
+#define DEVIER_DMA_7                  (_U_(0x1) << DEVIER_DMA_7_Pos)           /**< (DEVIER) DMA Channel 7 Interrupt Enable Mask */
+#define DEVIER_Msk                    _U_(0xFE3FF07F)                                /**< (DEVIER) Register Mask  */
+
+#define DEVIER_PEP__Pos               12                                             /**< (DEVIER Position) Endpoint x Interrupt Enable */
+#define DEVIER_PEP_                   (_U_(0x3FF) << DEVIER_PEP__Pos)          /**< (DEVIER Mask) PEP_ */
+#define DEVIER_DMA__Pos               25                                             /**< (DEVIER Position) DMA Channel 7 Interrupt Enable */
+#define DEVIER_DMA_                   (_U_(0x7F) << DEVIER_DMA__Pos)           /**< (DEVIER Mask) DMA_ */
+
+/* -------- DEVEPT : (USBHS Offset: 0x1c) (R/W 32) Device Endpoint Register -------- */
+
+#define DEVEPT_OFFSET                 (0x1C)                                        /**<  (DEVEPT) Device Endpoint Register  Offset */
+
+#define DEVEPT_EPEN0_Pos              0                                              /**< (DEVEPT) Endpoint 0 Enable Position */
+#define DEVEPT_EPEN0                  (_U_(0x1) << DEVEPT_EPEN0_Pos)           /**< (DEVEPT) Endpoint 0 Enable Mask */
+#define DEVEPT_EPEN1_Pos              1                                              /**< (DEVEPT) Endpoint 1 Enable Position */
+#define DEVEPT_EPEN1                  (_U_(0x1) << DEVEPT_EPEN1_Pos)           /**< (DEVEPT) Endpoint 1 Enable Mask */
+#define DEVEPT_EPEN2_Pos              2                                              /**< (DEVEPT) Endpoint 2 Enable Position */
+#define DEVEPT_EPEN2                  (_U_(0x1) << DEVEPT_EPEN2_Pos)           /**< (DEVEPT) Endpoint 2 Enable Mask */
+#define DEVEPT_EPEN3_Pos              3                                              /**< (DEVEPT) Endpoint 3 Enable Position */
+#define DEVEPT_EPEN3                  (_U_(0x1) << DEVEPT_EPEN3_Pos)           /**< (DEVEPT) Endpoint 3 Enable Mask */
+#define DEVEPT_EPEN4_Pos              4                                              /**< (DEVEPT) Endpoint 4 Enable Position */
+#define DEVEPT_EPEN4                  (_U_(0x1) << DEVEPT_EPEN4_Pos)           /**< (DEVEPT) Endpoint 4 Enable Mask */
+#define DEVEPT_EPEN5_Pos              5                                              /**< (DEVEPT) Endpoint 5 Enable Position */
+#define DEVEPT_EPEN5                  (_U_(0x1) << DEVEPT_EPEN5_Pos)           /**< (DEVEPT) Endpoint 5 Enable Mask */
+#define DEVEPT_EPEN6_Pos              6                                              /**< (DEVEPT) Endpoint 6 Enable Position */
+#define DEVEPT_EPEN6                  (_U_(0x1) << DEVEPT_EPEN6_Pos)           /**< (DEVEPT) Endpoint 6 Enable Mask */
+#define DEVEPT_EPEN7_Pos              7                                              /**< (DEVEPT) Endpoint 7 Enable Position */
+#define DEVEPT_EPEN7                  (_U_(0x1) << DEVEPT_EPEN7_Pos)           /**< (DEVEPT) Endpoint 7 Enable Mask */
+#define DEVEPT_EPEN8_Pos              8                                              /**< (DEVEPT) Endpoint 8 Enable Position */
+#define DEVEPT_EPEN8                  (_U_(0x1) << DEVEPT_EPEN8_Pos)           /**< (DEVEPT) Endpoint 8 Enable Mask */
+#define DEVEPT_EPEN9_Pos              9                                              /**< (DEVEPT) Endpoint 9 Enable Position */
+#define DEVEPT_EPEN9                  (_U_(0x1) << DEVEPT_EPEN9_Pos)           /**< (DEVEPT) Endpoint 9 Enable Mask */
+#define DEVEPT_EPRST0_Pos             16                                             /**< (DEVEPT) Endpoint 0 Reset Position */
+#define DEVEPT_EPRST0                 (_U_(0x1) << DEVEPT_EPRST0_Pos)          /**< (DEVEPT) Endpoint 0 Reset Mask */
+#define DEVEPT_EPRST1_Pos             17                                             /**< (DEVEPT) Endpoint 1 Reset Position */
+#define DEVEPT_EPRST1                 (_U_(0x1) << DEVEPT_EPRST1_Pos)          /**< (DEVEPT) Endpoint 1 Reset Mask */
+#define DEVEPT_EPRST2_Pos             18                                             /**< (DEVEPT) Endpoint 2 Reset Position */
+#define DEVEPT_EPRST2                 (_U_(0x1) << DEVEPT_EPRST2_Pos)          /**< (DEVEPT) Endpoint 2 Reset Mask */
+#define DEVEPT_EPRST3_Pos             19                                             /**< (DEVEPT) Endpoint 3 Reset Position */
+#define DEVEPT_EPRST3                 (_U_(0x1) << DEVEPT_EPRST3_Pos)          /**< (DEVEPT) Endpoint 3 Reset Mask */
+#define DEVEPT_EPRST4_Pos             20                                             /**< (DEVEPT) Endpoint 4 Reset Position */
+#define DEVEPT_EPRST4                 (_U_(0x1) << DEVEPT_EPRST4_Pos)          /**< (DEVEPT) Endpoint 4 Reset Mask */
+#define DEVEPT_EPRST5_Pos             21                                             /**< (DEVEPT) Endpoint 5 Reset Position */
+#define DEVEPT_EPRST5                 (_U_(0x1) << DEVEPT_EPRST5_Pos)          /**< (DEVEPT) Endpoint 5 Reset Mask */
+#define DEVEPT_EPRST6_Pos             22                                             /**< (DEVEPT) Endpoint 6 Reset Position */
+#define DEVEPT_EPRST6                 (_U_(0x1) << DEVEPT_EPRST6_Pos)          /**< (DEVEPT) Endpoint 6 Reset Mask */
+#define DEVEPT_EPRST7_Pos             23                                             /**< (DEVEPT) Endpoint 7 Reset Position */
+#define DEVEPT_EPRST7                 (_U_(0x1) << DEVEPT_EPRST7_Pos)          /**< (DEVEPT) Endpoint 7 Reset Mask */
+#define DEVEPT_EPRST8_Pos             24                                             /**< (DEVEPT) Endpoint 8 Reset Position */
+#define DEVEPT_EPRST8                 (_U_(0x1) << DEVEPT_EPRST8_Pos)          /**< (DEVEPT) Endpoint 8 Reset Mask */
+#define DEVEPT_EPRST9_Pos             25                                             /**< (DEVEPT) Endpoint 9 Reset Position */
+#define DEVEPT_EPRST9                 (_U_(0x1) << DEVEPT_EPRST9_Pos)          /**< (DEVEPT) Endpoint 9 Reset Mask */
+#define DEVEPT_Msk                    _U_(0x3FF03FF)                                 /**< (DEVEPT) Register Mask  */
+
+#define DEVEPT_EPEN_Pos               0                                              /**< (DEVEPT Position) Endpoint x Enable */
+#define DEVEPT_EPEN                   (_U_(0x3FF) << DEVEPT_EPEN_Pos)          /**< (DEVEPT Mask) EPEN */
+#define DEVEPT_EPRST_Pos              16                                             /**< (DEVEPT Position) Endpoint 9 Reset */
+#define DEVEPT_EPRST                  (_U_(0x3FF) << DEVEPT_EPRST_Pos)         /**< (DEVEPT Mask) EPRST */
+
+/* -------- DEVFNUM : (USBHS Offset: 0x20) (R/ 32) Device Frame Number Register -------- */
+
+#define DEVFNUM_OFFSET                (0x20)                                        /**<  (DEVFNUM) Device Frame Number Register  Offset */
+
+#define DEVFNUM_MFNUM_Pos             0                                              /**< (DEVFNUM) Micro Frame Number Position */
+#define DEVFNUM_MFNUM                 (_U_(0x7) << DEVFNUM_MFNUM_Pos)          /**< (DEVFNUM) Micro Frame Number Mask */
+#define DEVFNUM_FNUM_Pos              3                                              /**< (DEVFNUM) Frame Number Position */
+#define DEVFNUM_FNUM                  (_U_(0x7FF) << DEVFNUM_FNUM_Pos)         /**< (DEVFNUM) Frame Number Mask */
+#define DEVFNUM_FNCERR_Pos            15                                             /**< (DEVFNUM) Frame Number CRC Error Position */
+#define DEVFNUM_FNCERR                (_U_(0x1) << DEVFNUM_FNCERR_Pos)         /**< (DEVFNUM) Frame Number CRC Error Mask */
+#define DEVFNUM_Msk                   _U_(0xBFFF)                                    /**< (DEVFNUM) Register Mask  */
+
+
+/* -------- DEVEPTCFG : (USBHS Offset: 0x100) (R/W 32) Device Endpoint Configuration Register -------- */
+
+#define DEVEPTCFG_OFFSET              (0x100)                                       /**<  (DEVEPTCFG) Device Endpoint Configuration Register  Offset */
+
+#define DEVEPTCFG_ALLOC_Pos           1                                              /**< (DEVEPTCFG) Endpoint Memory Allocate Position */
+#define DEVEPTCFG_ALLOC               (_U_(0x1) << DEVEPTCFG_ALLOC_Pos)        /**< (DEVEPTCFG) Endpoint Memory Allocate Mask */
+#define DEVEPTCFG_EPBK_Pos            2                                              /**< (DEVEPTCFG) Endpoint Banks Position */
+#define DEVEPTCFG_EPBK                (_U_(0x3) << DEVEPTCFG_EPBK_Pos)         /**< (DEVEPTCFG) Endpoint Banks Mask */
+#define   DEVEPTCFG_EPBK_1_BANK_Val   _U_(0x0)                                       /**< (DEVEPTCFG) Single-bank endpoint  */
+#define   DEVEPTCFG_EPBK_2_BANK_Val   _U_(0x1)                                       /**< (DEVEPTCFG) Double-bank endpoint  */
+#define   DEVEPTCFG_EPBK_3_BANK_Val   _U_(0x2)                                       /**< (DEVEPTCFG) Triple-bank endpoint  */
+#define DEVEPTCFG_EPBK_1_BANK         (DEVEPTCFG_EPBK_1_BANK_Val << DEVEPTCFG_EPBK_Pos)  /**< (DEVEPTCFG) Single-bank endpoint Position  */
+#define DEVEPTCFG_EPBK_2_BANK         (DEVEPTCFG_EPBK_2_BANK_Val << DEVEPTCFG_EPBK_Pos)  /**< (DEVEPTCFG) Double-bank endpoint Position  */
+#define DEVEPTCFG_EPBK_3_BANK         (DEVEPTCFG_EPBK_3_BANK_Val << DEVEPTCFG_EPBK_Pos)  /**< (DEVEPTCFG) Triple-bank endpoint Position  */
+#define DEVEPTCFG_EPSIZE_Pos          4                                              /**< (DEVEPTCFG) Endpoint Size Position */
+#define DEVEPTCFG_EPSIZE              (_U_(0x7) << DEVEPTCFG_EPSIZE_Pos)       /**< (DEVEPTCFG) Endpoint Size Mask */
+#define   DEVEPTCFG_EPSIZE_8_BYTE_Val _U_(0x0)                                       /**< (DEVEPTCFG) 8 bytes  */
+#define   DEVEPTCFG_EPSIZE_16_BYTE_Val _U_(0x1)                                       /**< (DEVEPTCFG) 16 bytes  */
+#define   DEVEPTCFG_EPSIZE_32_BYTE_Val _U_(0x2)                                       /**< (DEVEPTCFG) 32 bytes  */
+#define   DEVEPTCFG_EPSIZE_64_BYTE_Val _U_(0x3)                                       /**< (DEVEPTCFG) 64 bytes  */
+#define   DEVEPTCFG_EPSIZE_128_BYTE_Val _U_(0x4)                                       /**< (DEVEPTCFG) 128 bytes  */
+#define   DEVEPTCFG_EPSIZE_256_BYTE_Val _U_(0x5)                                       /**< (DEVEPTCFG) 256 bytes  */
+#define   DEVEPTCFG_EPSIZE_512_BYTE_Val _U_(0x6)                                       /**< (DEVEPTCFG) 512 bytes  */
+#define   DEVEPTCFG_EPSIZE_1024_BYTE_Val _U_(0x7)                                       /**< (DEVEPTCFG) 1024 bytes  */
+#define DEVEPTCFG_EPSIZE_8_BYTE       (DEVEPTCFG_EPSIZE_8_BYTE_Val << DEVEPTCFG_EPSIZE_Pos)  /**< (DEVEPTCFG) 8 bytes Position  */
+#define DEVEPTCFG_EPSIZE_16_BYTE      (DEVEPTCFG_EPSIZE_16_BYTE_Val << DEVEPTCFG_EPSIZE_Pos)  /**< (DEVEPTCFG) 16 bytes Position  */
+#define DEVEPTCFG_EPSIZE_32_BYTE      (DEVEPTCFG_EPSIZE_32_BYTE_Val << DEVEPTCFG_EPSIZE_Pos)  /**< (DEVEPTCFG) 32 bytes Position  */
+#define DEVEPTCFG_EPSIZE_64_BYTE      (DEVEPTCFG_EPSIZE_64_BYTE_Val << DEVEPTCFG_EPSIZE_Pos)  /**< (DEVEPTCFG) 64 bytes Position  */
+#define DEVEPTCFG_EPSIZE_128_BYTE     (DEVEPTCFG_EPSIZE_128_BYTE_Val << DEVEPTCFG_EPSIZE_Pos)  /**< (DEVEPTCFG) 128 bytes Position  */
+#define DEVEPTCFG_EPSIZE_256_BYTE     (DEVEPTCFG_EPSIZE_256_BYTE_Val << DEVEPTCFG_EPSIZE_Pos)  /**< (DEVEPTCFG) 256 bytes Position  */
+#define DEVEPTCFG_EPSIZE_512_BYTE     (DEVEPTCFG_EPSIZE_512_BYTE_Val << DEVEPTCFG_EPSIZE_Pos)  /**< (DEVEPTCFG) 512 bytes Position  */
+#define DEVEPTCFG_EPSIZE_1024_BYTE    (DEVEPTCFG_EPSIZE_1024_BYTE_Val << DEVEPTCFG_EPSIZE_Pos)  /**< (DEVEPTCFG) 1024 bytes Position  */
+#define DEVEPTCFG_EPDIR_Pos           8                                              /**< (DEVEPTCFG) Endpoint Direction Position */
+#define DEVEPTCFG_EPDIR               (_U_(0x1) << DEVEPTCFG_EPDIR_Pos)        /**< (DEVEPTCFG) Endpoint Direction Mask */
+#define   DEVEPTCFG_EPDIR_OUT_Val     _U_(0x0)                                       /**< (DEVEPTCFG) The endpoint direction is OUT.  */
+#define   DEVEPTCFG_EPDIR_IN_Val      _U_(0x1)                                       /**< (DEVEPTCFG) The endpoint direction is IN (nor for control endpoints).  */
+#define DEVEPTCFG_EPDIR_OUT           (DEVEPTCFG_EPDIR_OUT_Val << DEVEPTCFG_EPDIR_Pos)  /**< (DEVEPTCFG) The endpoint direction is OUT. Position  */
+#define DEVEPTCFG_EPDIR_IN            (DEVEPTCFG_EPDIR_IN_Val << DEVEPTCFG_EPDIR_Pos)  /**< (DEVEPTCFG) The endpoint direction is IN (nor for control endpoints). Position  */
+#define DEVEPTCFG_AUTOSW_Pos          9                                              /**< (DEVEPTCFG) Automatic Switch Position */
+#define DEVEPTCFG_AUTOSW              (_U_(0x1) << DEVEPTCFG_AUTOSW_Pos)       /**< (DEVEPTCFG) Automatic Switch Mask */
+#define DEVEPTCFG_EPTYPE_Pos          11                                             /**< (DEVEPTCFG) Endpoint Type Position */
+#define DEVEPTCFG_EPTYPE              (_U_(0x3) << DEVEPTCFG_EPTYPE_Pos)       /**< (DEVEPTCFG) Endpoint Type Mask */
+#define   DEVEPTCFG_EPTYPE_CTRL_Val   _U_(0x0)                                       /**< (DEVEPTCFG) Control  */
+#define   DEVEPTCFG_EPTYPE_ISO_Val    _U_(0x1)                                       /**< (DEVEPTCFG) Isochronous  */
+#define   DEVEPTCFG_EPTYPE_BLK_Val    _U_(0x2)                                       /**< (DEVEPTCFG) Bulk  */
+#define   DEVEPTCFG_EPTYPE_INTRPT_Val _U_(0x3)                                       /**< (DEVEPTCFG) Interrupt  */
+#define DEVEPTCFG_EPTYPE_CTRL         (DEVEPTCFG_EPTYPE_CTRL_Val << DEVEPTCFG_EPTYPE_Pos)  /**< (DEVEPTCFG) Control Position  */
+#define DEVEPTCFG_EPTYPE_ISO          (DEVEPTCFG_EPTYPE_ISO_Val << DEVEPTCFG_EPTYPE_Pos)  /**< (DEVEPTCFG) Isochronous Position  */
+#define DEVEPTCFG_EPTYPE_BLK          (DEVEPTCFG_EPTYPE_BLK_Val << DEVEPTCFG_EPTYPE_Pos)  /**< (DEVEPTCFG) Bulk Position  */
+#define DEVEPTCFG_EPTYPE_INTRPT       (DEVEPTCFG_EPTYPE_INTRPT_Val << DEVEPTCFG_EPTYPE_Pos)  /**< (DEVEPTCFG) Interrupt Position  */
+#define DEVEPTCFG_NBTRANS_Pos         13                                             /**< (DEVEPTCFG) Number of transactions per microframe for isochronous endpoint Position */
+#define DEVEPTCFG_NBTRANS             (_U_(0x3) << DEVEPTCFG_NBTRANS_Pos)      /**< (DEVEPTCFG) Number of transactions per microframe for isochronous endpoint Mask */
+#define   DEVEPTCFG_NBTRANS_0_TRANS_Val _U_(0x0)                                       /**< (DEVEPTCFG) Reserved to endpoint that does not have the high-bandwidth isochronous capability.  */
+#define   DEVEPTCFG_NBTRANS_1_TRANS_Val _U_(0x1)                                       /**< (DEVEPTCFG) Default value: one transaction per microframe.  */
+#define   DEVEPTCFG_NBTRANS_2_TRANS_Val _U_(0x2)                                       /**< (DEVEPTCFG) Two transactions per microframe. This endpoint should be configured as double-bank.  */
+#define   DEVEPTCFG_NBTRANS_3_TRANS_Val _U_(0x3)                                       /**< (DEVEPTCFG) Three transactions per microframe. This endpoint should be configured as triple-bank.  */
+#define DEVEPTCFG_NBTRANS_0_TRANS     (DEVEPTCFG_NBTRANS_0_TRANS_Val << DEVEPTCFG_NBTRANS_Pos)  /**< (DEVEPTCFG) Reserved to endpoint that does not have the high-bandwidth isochronous capability. Position  */
+#define DEVEPTCFG_NBTRANS_1_TRANS     (DEVEPTCFG_NBTRANS_1_TRANS_Val << DEVEPTCFG_NBTRANS_Pos)  /**< (DEVEPTCFG) Default value: one transaction per microframe. Position  */
+#define DEVEPTCFG_NBTRANS_2_TRANS     (DEVEPTCFG_NBTRANS_2_TRANS_Val << DEVEPTCFG_NBTRANS_Pos)  /**< (DEVEPTCFG) Two transactions per microframe. This endpoint should be configured as double-bank. Position  */
+#define DEVEPTCFG_NBTRANS_3_TRANS     (DEVEPTCFG_NBTRANS_3_TRANS_Val << DEVEPTCFG_NBTRANS_Pos)  /**< (DEVEPTCFG) Three transactions per microframe. This endpoint should be configured as triple-bank. Position  */
+#define DEVEPTCFG_Msk                 _U_(0x7B7E)                                    /**< (DEVEPTCFG) Register Mask  */
+
+
+/* -------- DEVEPTISR : (USBHS Offset: 0x130) (R/ 32) Device Endpoint Interrupt Status Register -------- */
+
+#define DEVEPTISR_OFFSET              (0x130)                                       /**<  (DEVEPTISR) Device Endpoint Interrupt Status Register  Offset */
+
+#define DEVEPTISR_TXINI_Pos           0                                              /**< (DEVEPTISR) Transmitted IN Data Interrupt Position */
+#define DEVEPTISR_TXINI               (_U_(0x1) << DEVEPTISR_TXINI_Pos)        /**< (DEVEPTISR) Transmitted IN Data Interrupt Mask */
+#define DEVEPTISR_RXOUTI_Pos          1                                              /**< (DEVEPTISR) Received OUT Data Interrupt Position */
+#define DEVEPTISR_RXOUTI              (_U_(0x1) << DEVEPTISR_RXOUTI_Pos)       /**< (DEVEPTISR) Received OUT Data Interrupt Mask */
+#define DEVEPTISR_OVERFI_Pos          5                                              /**< (DEVEPTISR) Overflow Interrupt Position */
+#define DEVEPTISR_OVERFI              (_U_(0x1) << DEVEPTISR_OVERFI_Pos)       /**< (DEVEPTISR) Overflow Interrupt Mask */
+#define DEVEPTISR_SHORTPACKET_Pos     7                                              /**< (DEVEPTISR) Short Packet Interrupt Position */
+#define DEVEPTISR_SHORTPACKET         (_U_(0x1) << DEVEPTISR_SHORTPACKET_Pos)  /**< (DEVEPTISR) Short Packet Interrupt Mask */
+#define DEVEPTISR_DTSEQ_Pos           8                                              /**< (DEVEPTISR) Data Toggle Sequence Position */
+#define DEVEPTISR_DTSEQ               (_U_(0x3) << DEVEPTISR_DTSEQ_Pos)        /**< (DEVEPTISR) Data Toggle Sequence Mask */
+#define   DEVEPTISR_DTSEQ_DATA0_Val   _U_(0x0)                                       /**< (DEVEPTISR) Data0 toggle sequence  */
+#define   DEVEPTISR_DTSEQ_DATA1_Val   _U_(0x1)                                       /**< (DEVEPTISR) Data1 toggle sequence  */
+#define   DEVEPTISR_DTSEQ_DATA2_Val   _U_(0x2)                                       /**< (DEVEPTISR) Reserved for high-bandwidth isochronous endpoint  */
+#define   DEVEPTISR_DTSEQ_MDATA_Val   _U_(0x3)                                       /**< (DEVEPTISR) Reserved for high-bandwidth isochronous endpoint  */
+#define DEVEPTISR_DTSEQ_DATA0         (DEVEPTISR_DTSEQ_DATA0_Val << DEVEPTISR_DTSEQ_Pos)  /**< (DEVEPTISR) Data0 toggle sequence Position  */
+#define DEVEPTISR_DTSEQ_DATA1         (DEVEPTISR_DTSEQ_DATA1_Val << DEVEPTISR_DTSEQ_Pos)  /**< (DEVEPTISR) Data1 toggle sequence Position  */
+#define DEVEPTISR_DTSEQ_DATA2         (DEVEPTISR_DTSEQ_DATA2_Val << DEVEPTISR_DTSEQ_Pos)  /**< (DEVEPTISR) Reserved for high-bandwidth isochronous endpoint Position  */
+#define DEVEPTISR_DTSEQ_MDATA         (DEVEPTISR_DTSEQ_MDATA_Val << DEVEPTISR_DTSEQ_Pos)  /**< (DEVEPTISR) Reserved for high-bandwidth isochronous endpoint Position  */
+#define DEVEPTISR_NBUSYBK_Pos         12                                             /**< (DEVEPTISR) Number of Busy Banks Position */
+#define DEVEPTISR_NBUSYBK             (_U_(0x3) << DEVEPTISR_NBUSYBK_Pos)      /**< (DEVEPTISR) Number of Busy Banks Mask */
+#define   DEVEPTISR_NBUSYBK_0_BUSY_Val _U_(0x0)                                       /**< (DEVEPTISR) 0 busy bank (all banks free)  */
+#define   DEVEPTISR_NBUSYBK_1_BUSY_Val _U_(0x1)                                       /**< (DEVEPTISR) 1 busy bank  */
+#define   DEVEPTISR_NBUSYBK_2_BUSY_Val _U_(0x2)                                       /**< (DEVEPTISR) 2 busy banks  */
+#define   DEVEPTISR_NBUSYBK_3_BUSY_Val _U_(0x3)                                       /**< (DEVEPTISR) 3 busy banks  */
+#define DEVEPTISR_NBUSYBK_0_BUSY      (DEVEPTISR_NBUSYBK_0_BUSY_Val << DEVEPTISR_NBUSYBK_Pos)  /**< (DEVEPTISR) 0 busy bank (all banks free) Position  */
+#define DEVEPTISR_NBUSYBK_1_BUSY      (DEVEPTISR_NBUSYBK_1_BUSY_Val << DEVEPTISR_NBUSYBK_Pos)  /**< (DEVEPTISR) 1 busy bank Position  */
+#define DEVEPTISR_NBUSYBK_2_BUSY      (DEVEPTISR_NBUSYBK_2_BUSY_Val << DEVEPTISR_NBUSYBK_Pos)  /**< (DEVEPTISR) 2 busy banks Position  */
+#define DEVEPTISR_NBUSYBK_3_BUSY      (DEVEPTISR_NBUSYBK_3_BUSY_Val << DEVEPTISR_NBUSYBK_Pos)  /**< (DEVEPTISR) 3 busy banks Position  */
+#define DEVEPTISR_CURRBK_Pos          14                                             /**< (DEVEPTISR) Current Bank Position */
+#define DEVEPTISR_CURRBK              (_U_(0x3) << DEVEPTISR_CURRBK_Pos)       /**< (DEVEPTISR) Current Bank Mask */
+#define   DEVEPTISR_CURRBK_BANK0_Val  _U_(0x0)                                       /**< (DEVEPTISR) Current bank is bank0  */
+#define   DEVEPTISR_CURRBK_BANK1_Val  _U_(0x1)                                       /**< (DEVEPTISR) Current bank is bank1  */
+#define   DEVEPTISR_CURRBK_BANK2_Val  _U_(0x2)                                       /**< (DEVEPTISR) Current bank is bank2  */
+#define DEVEPTISR_CURRBK_BANK0        (DEVEPTISR_CURRBK_BANK0_Val << DEVEPTISR_CURRBK_Pos)  /**< (DEVEPTISR) Current bank is bank0 Position  */
+#define DEVEPTISR_CURRBK_BANK1        (DEVEPTISR_CURRBK_BANK1_Val << DEVEPTISR_CURRBK_Pos)  /**< (DEVEPTISR) Current bank is bank1 Position  */
+#define DEVEPTISR_CURRBK_BANK2        (DEVEPTISR_CURRBK_BANK2_Val << DEVEPTISR_CURRBK_Pos)  /**< (DEVEPTISR) Current bank is bank2 Position  */
+#define DEVEPTISR_RWALL_Pos           16                                             /**< (DEVEPTISR) Read/Write Allowed Position */
+#define DEVEPTISR_RWALL               (_U_(0x1) << DEVEPTISR_RWALL_Pos)        /**< (DEVEPTISR) Read/Write Allowed Mask */
+#define DEVEPTISR_CFGOK_Pos           18                                             /**< (DEVEPTISR) Configuration OK Status Position */
+#define DEVEPTISR_CFGOK               (_U_(0x1) << DEVEPTISR_CFGOK_Pos)        /**< (DEVEPTISR) Configuration OK Status Mask */
+#define DEVEPTISR_BYCT_Pos            20                                             /**< (DEVEPTISR) Byte Count Position */
+#define DEVEPTISR_BYCT                (_U_(0x7FF) << DEVEPTISR_BYCT_Pos)       /**< (DEVEPTISR) Byte Count Mask */
+#define DEVEPTISR_Msk                 _U_(0x7FF5F3A3)                                /**< (DEVEPTISR) Register Mask  */
+
+/* CTRL mode */
+#define DEVEPTISR_CTRL_RXSTPI_Pos     2                                              /**< (DEVEPTISR) Received SETUP Interrupt Position */
+#define DEVEPTISR_CTRL_RXSTPI         (_U_(0x1) << DEVEPTISR_CTRL_RXSTPI_Pos)  /**< (DEVEPTISR) Received SETUP Interrupt Mask */
+#define DEVEPTISR_CTRL_NAKOUTI_Pos    3                                              /**< (DEVEPTISR) NAKed OUT Interrupt Position */
+#define DEVEPTISR_CTRL_NAKOUTI        (_U_(0x1) << DEVEPTISR_CTRL_NAKOUTI_Pos)  /**< (DEVEPTISR) NAKed OUT Interrupt Mask */
+#define DEVEPTISR_CTRL_NAKINI_Pos     4                                              /**< (DEVEPTISR) NAKed IN Interrupt Position */
+#define DEVEPTISR_CTRL_NAKINI         (_U_(0x1) << DEVEPTISR_CTRL_NAKINI_Pos)  /**< (DEVEPTISR) NAKed IN Interrupt Mask */
+#define DEVEPTISR_CTRL_STALLEDI_Pos   6                                              /**< (DEVEPTISR) STALLed Interrupt Position */
+#define DEVEPTISR_CTRL_STALLEDI       (_U_(0x1) << DEVEPTISR_CTRL_STALLEDI_Pos)  /**< (DEVEPTISR) STALLed Interrupt Mask */
+#define DEVEPTISR_CTRL_CTRLDIR_Pos    17                                             /**< (DEVEPTISR) Control Direction Position */
+#define DEVEPTISR_CTRL_CTRLDIR        (_U_(0x1) << DEVEPTISR_CTRL_CTRLDIR_Pos)  /**< (DEVEPTISR) Control Direction Mask */
+#define DEVEPTISR_CTRL_Msk            _U_(0x2005C)                                   /**< (DEVEPTISR_CTRL) Register Mask  */
+
+/* ISO mode */
+#define DEVEPTISR_ISO_UNDERFI_Pos     2                                              /**< (DEVEPTISR) Underflow Interrupt Position */
+#define DEVEPTISR_ISO_UNDERFI         (_U_(0x1) << DEVEPTISR_ISO_UNDERFI_Pos)  /**< (DEVEPTISR) Underflow Interrupt Mask */
+#define DEVEPTISR_ISO_HBISOINERRI_Pos 3                                              /**< (DEVEPTISR) High Bandwidth Isochronous IN Underflow Error Interrupt Position */
+#define DEVEPTISR_ISO_HBISOINERRI     (_U_(0x1) << DEVEPTISR_ISO_HBISOINERRI_Pos)  /**< (DEVEPTISR) High Bandwidth Isochronous IN Underflow Error Interrupt Mask */
+#define DEVEPTISR_ISO_HBISOFLUSHI_Pos 4                                              /**< (DEVEPTISR) High Bandwidth Isochronous IN Flush Interrupt Position */
+#define DEVEPTISR_ISO_HBISOFLUSHI     (_U_(0x1) << DEVEPTISR_ISO_HBISOFLUSHI_Pos)  /**< (DEVEPTISR) High Bandwidth Isochronous IN Flush Interrupt Mask */
+#define DEVEPTISR_ISO_CRCERRI_Pos     6                                              /**< (DEVEPTISR) CRC Error Interrupt Position */
+#define DEVEPTISR_ISO_CRCERRI         (_U_(0x1) << DEVEPTISR_ISO_CRCERRI_Pos)  /**< (DEVEPTISR) CRC Error Interrupt Mask */
+#define DEVEPTISR_ISO_ERRORTRANS_Pos  10                                             /**< (DEVEPTISR) High-bandwidth Isochronous OUT Endpoint Transaction Error Interrupt Position */
+#define DEVEPTISR_ISO_ERRORTRANS      (_U_(0x1) << DEVEPTISR_ISO_ERRORTRANS_Pos)  /**< (DEVEPTISR) High-bandwidth Isochronous OUT Endpoint Transaction Error Interrupt Mask */
+#define DEVEPTISR_ISO_Msk             _U_(0x45C)                                     /**< (DEVEPTISR_ISO) Register Mask  */
+
+/* BLK mode */
+#define DEVEPTISR_BLK_RXSTPI_Pos      2                                              /**< (DEVEPTISR) Received SETUP Interrupt Position */
+#define DEVEPTISR_BLK_RXSTPI          (_U_(0x1) << DEVEPTISR_BLK_RXSTPI_Pos)   /**< (DEVEPTISR) Received SETUP Interrupt Mask */
+#define DEVEPTISR_BLK_NAKOUTI_Pos     3                                              /**< (DEVEPTISR) NAKed OUT Interrupt Position */
+#define DEVEPTISR_BLK_NAKOUTI         (_U_(0x1) << DEVEPTISR_BLK_NAKOUTI_Pos)  /**< (DEVEPTISR) NAKed OUT Interrupt Mask */
+#define DEVEPTISR_BLK_NAKINI_Pos      4                                              /**< (DEVEPTISR) NAKed IN Interrupt Position */
+#define DEVEPTISR_BLK_NAKINI          (_U_(0x1) << DEVEPTISR_BLK_NAKINI_Pos)   /**< (DEVEPTISR) NAKed IN Interrupt Mask */
+#define DEVEPTISR_BLK_STALLEDI_Pos    6                                              /**< (DEVEPTISR) STALLed Interrupt Position */
+#define DEVEPTISR_BLK_STALLEDI        (_U_(0x1) << DEVEPTISR_BLK_STALLEDI_Pos)  /**< (DEVEPTISR) STALLed Interrupt Mask */
+#define DEVEPTISR_BLK_CTRLDIR_Pos     17                                             /**< (DEVEPTISR) Control Direction Position */
+#define DEVEPTISR_BLK_CTRLDIR         (_U_(0x1) << DEVEPTISR_BLK_CTRLDIR_Pos)  /**< (DEVEPTISR) Control Direction Mask */
+#define DEVEPTISR_BLK_Msk             _U_(0x2005C)                                   /**< (DEVEPTISR_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define DEVEPTISR_INTRPT_RXSTPI_Pos   2                                              /**< (DEVEPTISR) Received SETUP Interrupt Position */
+#define DEVEPTISR_INTRPT_RXSTPI       (_U_(0x1) << DEVEPTISR_INTRPT_RXSTPI_Pos)  /**< (DEVEPTISR) Received SETUP Interrupt Mask */
+#define DEVEPTISR_INTRPT_NAKOUTI_Pos  3                                              /**< (DEVEPTISR) NAKed OUT Interrupt Position */
+#define DEVEPTISR_INTRPT_NAKOUTI      (_U_(0x1) << DEVEPTISR_INTRPT_NAKOUTI_Pos)  /**< (DEVEPTISR) NAKed OUT Interrupt Mask */
+#define DEVEPTISR_INTRPT_NAKINI_Pos   4                                              /**< (DEVEPTISR) NAKed IN Interrupt Position */
+#define DEVEPTISR_INTRPT_NAKINI       (_U_(0x1) << DEVEPTISR_INTRPT_NAKINI_Pos)  /**< (DEVEPTISR) NAKed IN Interrupt Mask */
+#define DEVEPTISR_INTRPT_STALLEDI_Pos 6                                              /**< (DEVEPTISR) STALLed Interrupt Position */
+#define DEVEPTISR_INTRPT_STALLEDI     (_U_(0x1) << DEVEPTISR_INTRPT_STALLEDI_Pos)  /**< (DEVEPTISR) STALLed Interrupt Mask */
+#define DEVEPTISR_INTRPT_CTRLDIR_Pos  17                                             /**< (DEVEPTISR) Control Direction Position */
+#define DEVEPTISR_INTRPT_CTRLDIR      (_U_(0x1) << DEVEPTISR_INTRPT_CTRLDIR_Pos)  /**< (DEVEPTISR) Control Direction Mask */
+#define DEVEPTISR_INTRPT_Msk          _U_(0x2005C)                                   /**< (DEVEPTISR_INTRPT) Register Mask  */
+
+
+/* -------- DEVEPTICR : (USBHS Offset: 0x160) (/W 32) Device Endpoint Interrupt Clear Register -------- */
+
+#define DEVEPTICR_OFFSET              (0x160)                                       /**<  (DEVEPTICR) Device Endpoint Interrupt Clear Register  Offset */
+
+#define DEVEPTICR_TXINIC_Pos          0                                              /**< (DEVEPTICR) Transmitted IN Data Interrupt Clear Position */
+#define DEVEPTICR_TXINIC              (_U_(0x1) << DEVEPTICR_TXINIC_Pos)       /**< (DEVEPTICR) Transmitted IN Data Interrupt Clear Mask */
+#define DEVEPTICR_RXOUTIC_Pos         1                                              /**< (DEVEPTICR) Received OUT Data Interrupt Clear Position */
+#define DEVEPTICR_RXOUTIC             (_U_(0x1) << DEVEPTICR_RXOUTIC_Pos)      /**< (DEVEPTICR) Received OUT Data Interrupt Clear Mask */
+#define DEVEPTICR_OVERFIC_Pos         5                                              /**< (DEVEPTICR) Overflow Interrupt Clear Position */
+#define DEVEPTICR_OVERFIC             (_U_(0x1) << DEVEPTICR_OVERFIC_Pos)      /**< (DEVEPTICR) Overflow Interrupt Clear Mask */
+#define DEVEPTICR_SHORTPACKETC_Pos    7                                              /**< (DEVEPTICR) Short Packet Interrupt Clear Position */
+#define DEVEPTICR_SHORTPACKETC        (_U_(0x1) << DEVEPTICR_SHORTPACKETC_Pos)  /**< (DEVEPTICR) Short Packet Interrupt Clear Mask */
+#define DEVEPTICR_Msk                 _U_(0xA3)                                      /**< (DEVEPTICR) Register Mask  */
+
+/* CTRL mode */
+#define DEVEPTICR_CTRL_RXSTPIC_Pos    2                                              /**< (DEVEPTICR) Received SETUP Interrupt Clear Position */
+#define DEVEPTICR_CTRL_RXSTPIC        (_U_(0x1) << DEVEPTICR_CTRL_RXSTPIC_Pos)  /**< (DEVEPTICR) Received SETUP Interrupt Clear Mask */
+#define DEVEPTICR_CTRL_NAKOUTIC_Pos   3                                              /**< (DEVEPTICR) NAKed OUT Interrupt Clear Position */
+#define DEVEPTICR_CTRL_NAKOUTIC       (_U_(0x1) << DEVEPTICR_CTRL_NAKOUTIC_Pos)  /**< (DEVEPTICR) NAKed OUT Interrupt Clear Mask */
+#define DEVEPTICR_CTRL_NAKINIC_Pos    4                                              /**< (DEVEPTICR) NAKed IN Interrupt Clear Position */
+#define DEVEPTICR_CTRL_NAKINIC        (_U_(0x1) << DEVEPTICR_CTRL_NAKINIC_Pos)  /**< (DEVEPTICR) NAKed IN Interrupt Clear Mask */
+#define DEVEPTICR_CTRL_STALLEDIC_Pos  6                                              /**< (DEVEPTICR) STALLed Interrupt Clear Position */
+#define DEVEPTICR_CTRL_STALLEDIC      (_U_(0x1) << DEVEPTICR_CTRL_STALLEDIC_Pos)  /**< (DEVEPTICR) STALLed Interrupt Clear Mask */
+#define DEVEPTICR_CTRL_Msk            _U_(0x5C)                                      /**< (DEVEPTICR_CTRL) Register Mask  */
+
+/* ISO mode */
+#define DEVEPTICR_ISO_UNDERFIC_Pos    2                                              /**< (DEVEPTICR) Underflow Interrupt Clear Position */
+#define DEVEPTICR_ISO_UNDERFIC        (_U_(0x1) << DEVEPTICR_ISO_UNDERFIC_Pos)  /**< (DEVEPTICR) Underflow Interrupt Clear Mask */
+#define DEVEPTICR_ISO_HBISOINERRIC_Pos 3                                              /**< (DEVEPTICR) High Bandwidth Isochronous IN Underflow Error Interrupt Clear Position */
+#define DEVEPTICR_ISO_HBISOINERRIC     (_U_(0x1) << DEVEPTICR_ISO_HBISOINERRIC_Pos)  /**< (DEVEPTICR) High Bandwidth Isochronous IN Underflow Error Interrupt Clear Mask */
+#define DEVEPTICR_ISO_HBISOFLUSHIC_Pos 4                                              /**< (DEVEPTICR) High Bandwidth Isochronous IN Flush Interrupt Clear Position */
+#define DEVEPTICR_ISO_HBISOFLUSHIC     (_U_(0x1) << DEVEPTICR_ISO_HBISOFLUSHIC_Pos)  /**< (DEVEPTICR) High Bandwidth Isochronous IN Flush Interrupt Clear Mask */
+#define DEVEPTICR_ISO_CRCERRIC_Pos    6                                              /**< (DEVEPTICR) CRC Error Interrupt Clear Position */
+#define DEVEPTICR_ISO_CRCERRIC        (_U_(0x1) << DEVEPTICR_ISO_CRCERRIC_Pos)  /**< (DEVEPTICR) CRC Error Interrupt Clear Mask */
+#define DEVEPTICR_ISO_Msk             _U_(0x5C)                                      /**< (DEVEPTICR_ISO) Register Mask  */
+
+/* BLK mode */
+#define DEVEPTICR_BLK_RXSTPIC_Pos     2                                              /**< (DEVEPTICR) Received SETUP Interrupt Clear Position */
+#define DEVEPTICR_BLK_RXSTPIC         (_U_(0x1) << DEVEPTICR_BLK_RXSTPIC_Pos)  /**< (DEVEPTICR) Received SETUP Interrupt Clear Mask */
+#define DEVEPTICR_BLK_NAKOUTIC_Pos    3                                              /**< (DEVEPTICR) NAKed OUT Interrupt Clear Position */
+#define DEVEPTICR_BLK_NAKOUTIC        (_U_(0x1) << DEVEPTICR_BLK_NAKOUTIC_Pos)  /**< (DEVEPTICR) NAKed OUT Interrupt Clear Mask */
+#define DEVEPTICR_BLK_NAKINIC_Pos     4                                              /**< (DEVEPTICR) NAKed IN Interrupt Clear Position */
+#define DEVEPTICR_BLK_NAKINIC         (_U_(0x1) << DEVEPTICR_BLK_NAKINIC_Pos)  /**< (DEVEPTICR) NAKed IN Interrupt Clear Mask */
+#define DEVEPTICR_BLK_STALLEDIC_Pos   6                                              /**< (DEVEPTICR) STALLed Interrupt Clear Position */
+#define DEVEPTICR_BLK_STALLEDIC       (_U_(0x1) << DEVEPTICR_BLK_STALLEDIC_Pos)  /**< (DEVEPTICR) STALLed Interrupt Clear Mask */
+#define DEVEPTICR_BLK_Msk             _U_(0x5C)                                      /**< (DEVEPTICR_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define DEVEPTICR_INTRPT_RXSTPIC_Pos  2                                              /**< (DEVEPTICR) Received SETUP Interrupt Clear Position */
+#define DEVEPTICR_INTRPT_RXSTPIC      (_U_(0x1) << DEVEPTICR_INTRPT_RXSTPIC_Pos)  /**< (DEVEPTICR) Received SETUP Interrupt Clear Mask */
+#define DEVEPTICR_INTRPT_NAKOUTIC_Pos 3                                              /**< (DEVEPTICR) NAKed OUT Interrupt Clear Position */
+#define DEVEPTICR_INTRPT_NAKOUTIC     (_U_(0x1) << DEVEPTICR_INTRPT_NAKOUTIC_Pos)  /**< (DEVEPTICR) NAKed OUT Interrupt Clear Mask */
+#define DEVEPTICR_INTRPT_NAKINIC_Pos  4                                              /**< (DEVEPTICR) NAKed IN Interrupt Clear Position */
+#define DEVEPTICR_INTRPT_NAKINIC      (_U_(0x1) << DEVEPTICR_INTRPT_NAKINIC_Pos)  /**< (DEVEPTICR) NAKed IN Interrupt Clear Mask */
+#define DEVEPTICR_INTRPT_STALLEDIC_Pos 6                                              /**< (DEVEPTICR) STALLed Interrupt Clear Position */
+#define DEVEPTICR_INTRPT_STALLEDIC     (_U_(0x1) << DEVEPTICR_INTRPT_STALLEDIC_Pos)  /**< (DEVEPTICR) STALLed Interrupt Clear Mask */
+#define DEVEPTICR_INTRPT_Msk          _U_(0x5C)                                      /**< (DEVEPTICR_INTRPT) Register Mask  */
+
+
+/* -------- DEVEPTIFR : (USBHS Offset: 0x190) (/W 32) Device Endpoint Interrupt Set Register -------- */
+
+#define DEVEPTIFR_OFFSET              (0x190)                                       /**<  (DEVEPTIFR) Device Endpoint Interrupt Set Register  Offset */
+
+#define DEVEPTIFR_TXINIS_Pos          0                                              /**< (DEVEPTIFR) Transmitted IN Data Interrupt Set Position */
+#define DEVEPTIFR_TXINIS              (_U_(0x1) << DEVEPTIFR_TXINIS_Pos)       /**< (DEVEPTIFR) Transmitted IN Data Interrupt Set Mask */
+#define DEVEPTIFR_RXOUTIS_Pos         1                                              /**< (DEVEPTIFR) Received OUT Data Interrupt Set Position */
+#define DEVEPTIFR_RXOUTIS             (_U_(0x1) << DEVEPTIFR_RXOUTIS_Pos)      /**< (DEVEPTIFR) Received OUT Data Interrupt Set Mask */
+#define DEVEPTIFR_OVERFIS_Pos         5                                              /**< (DEVEPTIFR) Overflow Interrupt Set Position */
+#define DEVEPTIFR_OVERFIS             (_U_(0x1) << DEVEPTIFR_OVERFIS_Pos)      /**< (DEVEPTIFR) Overflow Interrupt Set Mask */
+#define DEVEPTIFR_SHORTPACKETS_Pos    7                                              /**< (DEVEPTIFR) Short Packet Interrupt Set Position */
+#define DEVEPTIFR_SHORTPACKETS        (_U_(0x1) << DEVEPTIFR_SHORTPACKETS_Pos)  /**< (DEVEPTIFR) Short Packet Interrupt Set Mask */
+#define DEVEPTIFR_NBUSYBKS_Pos        12                                             /**< (DEVEPTIFR) Number of Busy Banks Interrupt Set Position */
+#define DEVEPTIFR_NBUSYBKS            (_U_(0x1) << DEVEPTIFR_NBUSYBKS_Pos)     /**< (DEVEPTIFR) Number of Busy Banks Interrupt Set Mask */
+#define DEVEPTIFR_Msk                 _U_(0x10A3)                                    /**< (DEVEPTIFR) Register Mask  */
+
+/* CTRL mode */
+#define DEVEPTIFR_CTRL_RXSTPIS_Pos    2                                              /**< (DEVEPTIFR) Received SETUP Interrupt Set Position */
+#define DEVEPTIFR_CTRL_RXSTPIS        (_U_(0x1) << DEVEPTIFR_CTRL_RXSTPIS_Pos)  /**< (DEVEPTIFR) Received SETUP Interrupt Set Mask */
+#define DEVEPTIFR_CTRL_NAKOUTIS_Pos   3                                              /**< (DEVEPTIFR) NAKed OUT Interrupt Set Position */
+#define DEVEPTIFR_CTRL_NAKOUTIS       (_U_(0x1) << DEVEPTIFR_CTRL_NAKOUTIS_Pos)  /**< (DEVEPTIFR) NAKed OUT Interrupt Set Mask */
+#define DEVEPTIFR_CTRL_NAKINIS_Pos    4                                              /**< (DEVEPTIFR) NAKed IN Interrupt Set Position */
+#define DEVEPTIFR_CTRL_NAKINIS        (_U_(0x1) << DEVEPTIFR_CTRL_NAKINIS_Pos)  /**< (DEVEPTIFR) NAKed IN Interrupt Set Mask */
+#define DEVEPTIFR_CTRL_STALLEDIS_Pos  6                                              /**< (DEVEPTIFR) STALLed Interrupt Set Position */
+#define DEVEPTIFR_CTRL_STALLEDIS      (_U_(0x1) << DEVEPTIFR_CTRL_STALLEDIS_Pos)  /**< (DEVEPTIFR) STALLed Interrupt Set Mask */
+#define DEVEPTIFR_CTRL_Msk            _U_(0x5C)                                      /**< (DEVEPTIFR_CTRL) Register Mask  */
+
+/* ISO mode */
+#define DEVEPTIFR_ISO_UNDERFIS_Pos    2                                              /**< (DEVEPTIFR) Underflow Interrupt Set Position */
+#define DEVEPTIFR_ISO_UNDERFIS        (_U_(0x1) << DEVEPTIFR_ISO_UNDERFIS_Pos)  /**< (DEVEPTIFR) Underflow Interrupt Set Mask */
+#define DEVEPTIFR_ISO_HBISOINERRIS_Pos 3                                              /**< (DEVEPTIFR) High Bandwidth Isochronous IN Underflow Error Interrupt Set Position */
+#define DEVEPTIFR_ISO_HBISOINERRIS     (_U_(0x1) << DEVEPTIFR_ISO_HBISOINERRIS_Pos)  /**< (DEVEPTIFR) High Bandwidth Isochronous IN Underflow Error Interrupt Set Mask */
+#define DEVEPTIFR_ISO_HBISOFLUSHIS_Pos 4                                              /**< (DEVEPTIFR) High Bandwidth Isochronous IN Flush Interrupt Set Position */
+#define DEVEPTIFR_ISO_HBISOFLUSHIS     (_U_(0x1) << DEVEPTIFR_ISO_HBISOFLUSHIS_Pos)  /**< (DEVEPTIFR) High Bandwidth Isochronous IN Flush Interrupt Set Mask */
+#define DEVEPTIFR_ISO_CRCERRIS_Pos    6                                              /**< (DEVEPTIFR) CRC Error Interrupt Set Position */
+#define DEVEPTIFR_ISO_CRCERRIS        (_U_(0x1) << DEVEPTIFR_ISO_CRCERRIS_Pos)  /**< (DEVEPTIFR) CRC Error Interrupt Set Mask */
+#define DEVEPTIFR_ISO_Msk             _U_(0x5C)                                      /**< (DEVEPTIFR_ISO) Register Mask  */
+
+/* BLK mode */
+#define DEVEPTIFR_BLK_RXSTPIS_Pos     2                                              /**< (DEVEPTIFR) Received SETUP Interrupt Set Position */
+#define DEVEPTIFR_BLK_RXSTPIS         (_U_(0x1) << DEVEPTIFR_BLK_RXSTPIS_Pos)  /**< (DEVEPTIFR) Received SETUP Interrupt Set Mask */
+#define DEVEPTIFR_BLK_NAKOUTIS_Pos    3                                              /**< (DEVEPTIFR) NAKed OUT Interrupt Set Position */
+#define DEVEPTIFR_BLK_NAKOUTIS        (_U_(0x1) << DEVEPTIFR_BLK_NAKOUTIS_Pos)  /**< (DEVEPTIFR) NAKed OUT Interrupt Set Mask */
+#define DEVEPTIFR_BLK_NAKINIS_Pos     4                                              /**< (DEVEPTIFR) NAKed IN Interrupt Set Position */
+#define DEVEPTIFR_BLK_NAKINIS         (_U_(0x1) << DEVEPTIFR_BLK_NAKINIS_Pos)  /**< (DEVEPTIFR) NAKed IN Interrupt Set Mask */
+#define DEVEPTIFR_BLK_STALLEDIS_Pos   6                                              /**< (DEVEPTIFR) STALLed Interrupt Set Position */
+#define DEVEPTIFR_BLK_STALLEDIS       (_U_(0x1) << DEVEPTIFR_BLK_STALLEDIS_Pos)  /**< (DEVEPTIFR) STALLed Interrupt Set Mask */
+#define DEVEPTIFR_BLK_Msk             _U_(0x5C)                                      /**< (DEVEPTIFR_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define DEVEPTIFR_INTRPT_RXSTPIS_Pos  2                                              /**< (DEVEPTIFR) Received SETUP Interrupt Set Position */
+#define DEVEPTIFR_INTRPT_RXSTPIS      (_U_(0x1) << DEVEPTIFR_INTRPT_RXSTPIS_Pos)  /**< (DEVEPTIFR) Received SETUP Interrupt Set Mask */
+#define DEVEPTIFR_INTRPT_NAKOUTIS_Pos 3                                              /**< (DEVEPTIFR) NAKed OUT Interrupt Set Position */
+#define DEVEPTIFR_INTRPT_NAKOUTIS     (_U_(0x1) << DEVEPTIFR_INTRPT_NAKOUTIS_Pos)  /**< (DEVEPTIFR) NAKed OUT Interrupt Set Mask */
+#define DEVEPTIFR_INTRPT_NAKINIS_Pos  4                                              /**< (DEVEPTIFR) NAKed IN Interrupt Set Position */
+#define DEVEPTIFR_INTRPT_NAKINIS      (_U_(0x1) << DEVEPTIFR_INTRPT_NAKINIS_Pos)  /**< (DEVEPTIFR) NAKed IN Interrupt Set Mask */
+#define DEVEPTIFR_INTRPT_STALLEDIS_Pos 6                                              /**< (DEVEPTIFR) STALLed Interrupt Set Position */
+#define DEVEPTIFR_INTRPT_STALLEDIS     (_U_(0x1) << DEVEPTIFR_INTRPT_STALLEDIS_Pos)  /**< (DEVEPTIFR) STALLed Interrupt Set Mask */
+#define DEVEPTIFR_INTRPT_Msk          _U_(0x5C)                                      /**< (DEVEPTIFR_INTRPT) Register Mask  */
+
+
+/* -------- DEVEPTIMR : (USBHS Offset: 0x1c0) (R/ 32) Device Endpoint Interrupt Mask Register -------- */
+
+#define DEVEPTIMR_OFFSET              (0x1C0)                                       /**<  (DEVEPTIMR) Device Endpoint Interrupt Mask Register  Offset */
+
+#define DEVEPTIMR_TXINE_Pos           0                                              /**< (DEVEPTIMR) Transmitted IN Data Interrupt Position */
+#define DEVEPTIMR_TXINE               (_U_(0x1) << DEVEPTIMR_TXINE_Pos)        /**< (DEVEPTIMR) Transmitted IN Data Interrupt Mask */
+#define DEVEPTIMR_RXOUTE_Pos          1                                              /**< (DEVEPTIMR) Received OUT Data Interrupt Position */
+#define DEVEPTIMR_RXOUTE              (_U_(0x1) << DEVEPTIMR_RXOUTE_Pos)       /**< (DEVEPTIMR) Received OUT Data Interrupt Mask */
+#define DEVEPTIMR_OVERFE_Pos          5                                              /**< (DEVEPTIMR) Overflow Interrupt Position */
+#define DEVEPTIMR_OVERFE              (_U_(0x1) << DEVEPTIMR_OVERFE_Pos)       /**< (DEVEPTIMR) Overflow Interrupt Mask */
+#define DEVEPTIMR_SHORTPACKETE_Pos    7                                              /**< (DEVEPTIMR) Short Packet Interrupt Position */
+#define DEVEPTIMR_SHORTPACKETE        (_U_(0x1) << DEVEPTIMR_SHORTPACKETE_Pos)  /**< (DEVEPTIMR) Short Packet Interrupt Mask */
+#define DEVEPTIMR_NBUSYBKE_Pos        12                                             /**< (DEVEPTIMR) Number of Busy Banks Interrupt Position */
+#define DEVEPTIMR_NBUSYBKE            (_U_(0x1) << DEVEPTIMR_NBUSYBKE_Pos)     /**< (DEVEPTIMR) Number of Busy Banks Interrupt Mask */
+#define DEVEPTIMR_KILLBK_Pos          13                                             /**< (DEVEPTIMR) Kill IN Bank Position */
+#define DEVEPTIMR_KILLBK              (_U_(0x1) << DEVEPTIMR_KILLBK_Pos)       /**< (DEVEPTIMR) Kill IN Bank Mask */
+#define DEVEPTIMR_FIFOCON_Pos         14                                             /**< (DEVEPTIMR) FIFO Control Position */
+#define DEVEPTIMR_FIFOCON             (_U_(0x1) << DEVEPTIMR_FIFOCON_Pos)      /**< (DEVEPTIMR) FIFO Control Mask */
+#define DEVEPTIMR_EPDISHDMA_Pos       16                                             /**< (DEVEPTIMR) Endpoint Interrupts Disable HDMA Request Position */
+#define DEVEPTIMR_EPDISHDMA           (_U_(0x1) << DEVEPTIMR_EPDISHDMA_Pos)    /**< (DEVEPTIMR) Endpoint Interrupts Disable HDMA Request Mask */
+#define DEVEPTIMR_RSTDT_Pos           18                                             /**< (DEVEPTIMR) Reset Data Toggle Position */
+#define DEVEPTIMR_RSTDT               (_U_(0x1) << DEVEPTIMR_RSTDT_Pos)        /**< (DEVEPTIMR) Reset Data Toggle Mask */
+#define DEVEPTIMR_Msk                 _U_(0x570A3)                                   /**< (DEVEPTIMR) Register Mask  */
+
+/* CTRL mode */
+#define DEVEPTIMR_CTRL_RXSTPE_Pos     2                                              /**< (DEVEPTIMR) Received SETUP Interrupt Position */
+#define DEVEPTIMR_CTRL_RXSTPE         (_U_(0x1) << DEVEPTIMR_CTRL_RXSTPE_Pos)  /**< (DEVEPTIMR) Received SETUP Interrupt Mask */
+#define DEVEPTIMR_CTRL_NAKOUTE_Pos    3                                              /**< (DEVEPTIMR) NAKed OUT Interrupt Position */
+#define DEVEPTIMR_CTRL_NAKOUTE        (_U_(0x1) << DEVEPTIMR_CTRL_NAKOUTE_Pos)  /**< (DEVEPTIMR) NAKed OUT Interrupt Mask */
+#define DEVEPTIMR_CTRL_NAKINE_Pos     4                                              /**< (DEVEPTIMR) NAKed IN Interrupt Position */
+#define DEVEPTIMR_CTRL_NAKINE         (_U_(0x1) << DEVEPTIMR_CTRL_NAKINE_Pos)  /**< (DEVEPTIMR) NAKed IN Interrupt Mask */
+#define DEVEPTIMR_CTRL_STALLEDE_Pos   6                                              /**< (DEVEPTIMR) STALLed Interrupt Position */
+#define DEVEPTIMR_CTRL_STALLEDE       (_U_(0x1) << DEVEPTIMR_CTRL_STALLEDE_Pos)  /**< (DEVEPTIMR) STALLed Interrupt Mask */
+#define DEVEPTIMR_CTRL_NYETDIS_Pos    17                                             /**< (DEVEPTIMR) NYET Token Disable Position */
+#define DEVEPTIMR_CTRL_NYETDIS        (_U_(0x1) << DEVEPTIMR_CTRL_NYETDIS_Pos)  /**< (DEVEPTIMR) NYET Token Disable Mask */
+#define DEVEPTIMR_CTRL_STALLRQ_Pos    19                                             /**< (DEVEPTIMR) STALL Request Position */
+#define DEVEPTIMR_CTRL_STALLRQ        (_U_(0x1) << DEVEPTIMR_CTRL_STALLRQ_Pos)  /**< (DEVEPTIMR) STALL Request Mask */
+#define DEVEPTIMR_CTRL_Msk            _U_(0xA005C)                                   /**< (DEVEPTIMR_CTRL) Register Mask  */
+
+/* ISO mode */
+#define DEVEPTIMR_ISO_UNDERFE_Pos     2                                              /**< (DEVEPTIMR) Underflow Interrupt Position */
+#define DEVEPTIMR_ISO_UNDERFE         (_U_(0x1) << DEVEPTIMR_ISO_UNDERFE_Pos)  /**< (DEVEPTIMR) Underflow Interrupt Mask */
+#define DEVEPTIMR_ISO_HBISOINERRE_Pos 3                                              /**< (DEVEPTIMR) High Bandwidth Isochronous IN Underflow Error Interrupt Position */
+#define DEVEPTIMR_ISO_HBISOINERRE     (_U_(0x1) << DEVEPTIMR_ISO_HBISOINERRE_Pos)  /**< (DEVEPTIMR) High Bandwidth Isochronous IN Underflow Error Interrupt Mask */
+#define DEVEPTIMR_ISO_HBISOFLUSHE_Pos 4                                              /**< (DEVEPTIMR) High Bandwidth Isochronous IN Flush Interrupt Position */
+#define DEVEPTIMR_ISO_HBISOFLUSHE     (_U_(0x1) << DEVEPTIMR_ISO_HBISOFLUSHE_Pos)  /**< (DEVEPTIMR) High Bandwidth Isochronous IN Flush Interrupt Mask */
+#define DEVEPTIMR_ISO_CRCERRE_Pos     6                                              /**< (DEVEPTIMR) CRC Error Interrupt Position */
+#define DEVEPTIMR_ISO_CRCERRE         (_U_(0x1) << DEVEPTIMR_ISO_CRCERRE_Pos)  /**< (DEVEPTIMR) CRC Error Interrupt Mask */
+#define DEVEPTIMR_ISO_MDATAE_Pos      8                                              /**< (DEVEPTIMR) MData Interrupt Position */
+#define DEVEPTIMR_ISO_MDATAE          (_U_(0x1) << DEVEPTIMR_ISO_MDATAE_Pos)   /**< (DEVEPTIMR) MData Interrupt Mask */
+#define DEVEPTIMR_ISO_DATAXE_Pos      9                                              /**< (DEVEPTIMR) DataX Interrupt Position */
+#define DEVEPTIMR_ISO_DATAXE          (_U_(0x1) << DEVEPTIMR_ISO_DATAXE_Pos)   /**< (DEVEPTIMR) DataX Interrupt Mask */
+#define DEVEPTIMR_ISO_ERRORTRANSE_Pos 10                                             /**< (DEVEPTIMR) Transaction Error Interrupt Position */
+#define DEVEPTIMR_ISO_ERRORTRANSE     (_U_(0x1) << DEVEPTIMR_ISO_ERRORTRANSE_Pos)  /**< (DEVEPTIMR) Transaction Error Interrupt Mask */
+#define DEVEPTIMR_ISO_Msk             _U_(0x75C)                                     /**< (DEVEPTIMR_ISO) Register Mask  */
+
+/* BLK mode */
+#define DEVEPTIMR_BLK_RXSTPE_Pos      2                                              /**< (DEVEPTIMR) Received SETUP Interrupt Position */
+#define DEVEPTIMR_BLK_RXSTPE          (_U_(0x1) << DEVEPTIMR_BLK_RXSTPE_Pos)   /**< (DEVEPTIMR) Received SETUP Interrupt Mask */
+#define DEVEPTIMR_BLK_NAKOUTE_Pos     3                                              /**< (DEVEPTIMR) NAKed OUT Interrupt Position */
+#define DEVEPTIMR_BLK_NAKOUTE         (_U_(0x1) << DEVEPTIMR_BLK_NAKOUTE_Pos)  /**< (DEVEPTIMR) NAKed OUT Interrupt Mask */
+#define DEVEPTIMR_BLK_NAKINE_Pos      4                                              /**< (DEVEPTIMR) NAKed IN Interrupt Position */
+#define DEVEPTIMR_BLK_NAKINE          (_U_(0x1) << DEVEPTIMR_BLK_NAKINE_Pos)   /**< (DEVEPTIMR) NAKed IN Interrupt Mask */
+#define DEVEPTIMR_BLK_STALLEDE_Pos    6                                              /**< (DEVEPTIMR) STALLed Interrupt Position */
+#define DEVEPTIMR_BLK_STALLEDE        (_U_(0x1) << DEVEPTIMR_BLK_STALLEDE_Pos)  /**< (DEVEPTIMR) STALLed Interrupt Mask */
+#define DEVEPTIMR_BLK_NYETDIS_Pos     17                                             /**< (DEVEPTIMR) NYET Token Disable Position */
+#define DEVEPTIMR_BLK_NYETDIS         (_U_(0x1) << DEVEPTIMR_BLK_NYETDIS_Pos)  /**< (DEVEPTIMR) NYET Token Disable Mask */
+#define DEVEPTIMR_BLK_STALLRQ_Pos     19                                             /**< (DEVEPTIMR) STALL Request Position */
+#define DEVEPTIMR_BLK_STALLRQ         (_U_(0x1) << DEVEPTIMR_BLK_STALLRQ_Pos)  /**< (DEVEPTIMR) STALL Request Mask */
+#define DEVEPTIMR_BLK_Msk             _U_(0xA005C)                                   /**< (DEVEPTIMR_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define DEVEPTIMR_INTRPT_RXSTPE_Pos   2                                              /**< (DEVEPTIMR) Received SETUP Interrupt Position */
+#define DEVEPTIMR_INTRPT_RXSTPE       (_U_(0x1) << DEVEPTIMR_INTRPT_RXSTPE_Pos)  /**< (DEVEPTIMR) Received SETUP Interrupt Mask */
+#define DEVEPTIMR_INTRPT_NAKOUTE_Pos  3                                              /**< (DEVEPTIMR) NAKed OUT Interrupt Position */
+#define DEVEPTIMR_INTRPT_NAKOUTE      (_U_(0x1) << DEVEPTIMR_INTRPT_NAKOUTE_Pos)  /**< (DEVEPTIMR) NAKed OUT Interrupt Mask */
+#define DEVEPTIMR_INTRPT_NAKINE_Pos   4                                              /**< (DEVEPTIMR) NAKed IN Interrupt Position */
+#define DEVEPTIMR_INTRPT_NAKINE       (_U_(0x1) << DEVEPTIMR_INTRPT_NAKINE_Pos)  /**< (DEVEPTIMR) NAKed IN Interrupt Mask */
+#define DEVEPTIMR_INTRPT_STALLEDE_Pos 6                                              /**< (DEVEPTIMR) STALLed Interrupt Position */
+#define DEVEPTIMR_INTRPT_STALLEDE     (_U_(0x1) << DEVEPTIMR_INTRPT_STALLEDE_Pos)  /**< (DEVEPTIMR) STALLed Interrupt Mask */
+#define DEVEPTIMR_INTRPT_NYETDIS_Pos  17                                             /**< (DEVEPTIMR) NYET Token Disable Position */
+#define DEVEPTIMR_INTRPT_NYETDIS      (_U_(0x1) << DEVEPTIMR_INTRPT_NYETDIS_Pos)  /**< (DEVEPTIMR) NYET Token Disable Mask */
+#define DEVEPTIMR_INTRPT_STALLRQ_Pos  19                                             /**< (DEVEPTIMR) STALL Request Position */
+#define DEVEPTIMR_INTRPT_STALLRQ      (_U_(0x1) << DEVEPTIMR_INTRPT_STALLRQ_Pos)  /**< (DEVEPTIMR) STALL Request Mask */
+#define DEVEPTIMR_INTRPT_Msk          _U_(0xA005C)                                   /**< (DEVEPTIMR_INTRPT) Register Mask  */
+
+
+/* -------- DEVEPTIER : (USBHS Offset: 0x1f0) (/W 32) Device Endpoint Interrupt Enable Register -------- */
+
+#define DEVEPTIER_OFFSET              (0x1F0)                                       /**<  (DEVEPTIER) Device Endpoint Interrupt Enable Register  Offset */
+
+#define DEVEPTIER_TXINES_Pos          0                                              /**< (DEVEPTIER) Transmitted IN Data Interrupt Enable Position */
+#define DEVEPTIER_TXINES              (_U_(0x1) << DEVEPTIER_TXINES_Pos)       /**< (DEVEPTIER) Transmitted IN Data Interrupt Enable Mask */
+#define DEVEPTIER_RXOUTES_Pos         1                                              /**< (DEVEPTIER) Received OUT Data Interrupt Enable Position */
+#define DEVEPTIER_RXOUTES             (_U_(0x1) << DEVEPTIER_RXOUTES_Pos)      /**< (DEVEPTIER) Received OUT Data Interrupt Enable Mask */
+#define DEVEPTIER_OVERFES_Pos         5                                              /**< (DEVEPTIER) Overflow Interrupt Enable Position */
+#define DEVEPTIER_OVERFES             (_U_(0x1) << DEVEPTIER_OVERFES_Pos)      /**< (DEVEPTIER) Overflow Interrupt Enable Mask */
+#define DEVEPTIER_SHORTPACKETES_Pos   7                                              /**< (DEVEPTIER) Short Packet Interrupt Enable Position */
+#define DEVEPTIER_SHORTPACKETES       (_U_(0x1) << DEVEPTIER_SHORTPACKETES_Pos)  /**< (DEVEPTIER) Short Packet Interrupt Enable Mask */
+#define DEVEPTIER_NBUSYBKES_Pos       12                                             /**< (DEVEPTIER) Number of Busy Banks Interrupt Enable Position */
+#define DEVEPTIER_NBUSYBKES           (_U_(0x1) << DEVEPTIER_NBUSYBKES_Pos)    /**< (DEVEPTIER) Number of Busy Banks Interrupt Enable Mask */
+#define DEVEPTIER_KILLBKS_Pos         13                                             /**< (DEVEPTIER) Kill IN Bank Position */
+#define DEVEPTIER_KILLBKS             (_U_(0x1) << DEVEPTIER_KILLBKS_Pos)      /**< (DEVEPTIER) Kill IN Bank Mask */
+#define DEVEPTIER_FIFOCONS_Pos        14                                             /**< (DEVEPTIER) FIFO Control Position */
+#define DEVEPTIER_FIFOCONS            (_U_(0x1) << DEVEPTIER_FIFOCONS_Pos)     /**< (DEVEPTIER) FIFO Control Mask */
+#define DEVEPTIER_EPDISHDMAS_Pos      16                                             /**< (DEVEPTIER) Endpoint Interrupts Disable HDMA Request Enable Position */
+#define DEVEPTIER_EPDISHDMAS          (_U_(0x1) << DEVEPTIER_EPDISHDMAS_Pos)   /**< (DEVEPTIER) Endpoint Interrupts Disable HDMA Request Enable Mask */
+#define DEVEPTIER_RSTDTS_Pos          18                                             /**< (DEVEPTIER) Reset Data Toggle Enable Position */
+#define DEVEPTIER_RSTDTS              (_U_(0x1) << DEVEPTIER_RSTDTS_Pos)       /**< (DEVEPTIER) Reset Data Toggle Enable Mask */
+#define DEVEPTIER_Msk                 _U_(0x570A3)                                   /**< (DEVEPTIER) Register Mask  */
+
+/* CTRL mode */
+#define DEVEPTIER_CTRL_RXSTPES_Pos    2                                              /**< (DEVEPTIER) Received SETUP Interrupt Enable Position */
+#define DEVEPTIER_CTRL_RXSTPES        (_U_(0x1) << DEVEPTIER_CTRL_RXSTPES_Pos)  /**< (DEVEPTIER) Received SETUP Interrupt Enable Mask */
+#define DEVEPTIER_CTRL_NAKOUTES_Pos   3                                              /**< (DEVEPTIER) NAKed OUT Interrupt Enable Position */
+#define DEVEPTIER_CTRL_NAKOUTES       (_U_(0x1) << DEVEPTIER_CTRL_NAKOUTES_Pos)  /**< (DEVEPTIER) NAKed OUT Interrupt Enable Mask */
+#define DEVEPTIER_CTRL_NAKINES_Pos    4                                              /**< (DEVEPTIER) NAKed IN Interrupt Enable Position */
+#define DEVEPTIER_CTRL_NAKINES        (_U_(0x1) << DEVEPTIER_CTRL_NAKINES_Pos)  /**< (DEVEPTIER) NAKed IN Interrupt Enable Mask */
+#define DEVEPTIER_CTRL_STALLEDES_Pos  6                                              /**< (DEVEPTIER) STALLed Interrupt Enable Position */
+#define DEVEPTIER_CTRL_STALLEDES      (_U_(0x1) << DEVEPTIER_CTRL_STALLEDES_Pos)  /**< (DEVEPTIER) STALLed Interrupt Enable Mask */
+#define DEVEPTIER_CTRL_NYETDISS_Pos   17                                             /**< (DEVEPTIER) NYET Token Disable Enable Position */
+#define DEVEPTIER_CTRL_NYETDISS       (_U_(0x1) << DEVEPTIER_CTRL_NYETDISS_Pos)  /**< (DEVEPTIER) NYET Token Disable Enable Mask */
+#define DEVEPTIER_CTRL_STALLRQS_Pos   19                                             /**< (DEVEPTIER) STALL Request Enable Position */
+#define DEVEPTIER_CTRL_STALLRQS       (_U_(0x1) << DEVEPTIER_CTRL_STALLRQS_Pos)  /**< (DEVEPTIER) STALL Request Enable Mask */
+#define DEVEPTIER_CTRL_Msk            _U_(0xA005C)                                   /**< (DEVEPTIER_CTRL) Register Mask  */
+
+/* ISO mode */
+#define DEVEPTIER_ISO_UNDERFES_Pos    2                                              /**< (DEVEPTIER) Underflow Interrupt Enable Position */
+#define DEVEPTIER_ISO_UNDERFES        (_U_(0x1) << DEVEPTIER_ISO_UNDERFES_Pos)  /**< (DEVEPTIER) Underflow Interrupt Enable Mask */
+#define DEVEPTIER_ISO_HBISOINERRES_Pos 3                                              /**< (DEVEPTIER) High Bandwidth Isochronous IN Underflow Error Interrupt Enable Position */
+#define DEVEPTIER_ISO_HBISOINERRES     (_U_(0x1) << DEVEPTIER_ISO_HBISOINERRES_Pos)  /**< (DEVEPTIER) High Bandwidth Isochronous IN Underflow Error Interrupt Enable Mask */
+#define DEVEPTIER_ISO_HBISOFLUSHES_Pos 4                                              /**< (DEVEPTIER) High Bandwidth Isochronous IN Flush Interrupt Enable Position */
+#define DEVEPTIER_ISO_HBISOFLUSHES     (_U_(0x1) << DEVEPTIER_ISO_HBISOFLUSHES_Pos)  /**< (DEVEPTIER) High Bandwidth Isochronous IN Flush Interrupt Enable Mask */
+#define DEVEPTIER_ISO_CRCERRES_Pos    6                                              /**< (DEVEPTIER) CRC Error Interrupt Enable Position */
+#define DEVEPTIER_ISO_CRCERRES        (_U_(0x1) << DEVEPTIER_ISO_CRCERRES_Pos)  /**< (DEVEPTIER) CRC Error Interrupt Enable Mask */
+#define DEVEPTIER_ISO_MDATAES_Pos     8                                              /**< (DEVEPTIER) MData Interrupt Enable Position */
+#define DEVEPTIER_ISO_MDATAES         (_U_(0x1) << DEVEPTIER_ISO_MDATAES_Pos)  /**< (DEVEPTIER) MData Interrupt Enable Mask */
+#define DEVEPTIER_ISO_DATAXES_Pos     9                                              /**< (DEVEPTIER) DataX Interrupt Enable Position */
+#define DEVEPTIER_ISO_DATAXES         (_U_(0x1) << DEVEPTIER_ISO_DATAXES_Pos)  /**< (DEVEPTIER) DataX Interrupt Enable Mask */
+#define DEVEPTIER_ISO_ERRORTRANSES_Pos 10                                             /**< (DEVEPTIER) Transaction Error Interrupt Enable Position */
+#define DEVEPTIER_ISO_ERRORTRANSES     (_U_(0x1) << DEVEPTIER_ISO_ERRORTRANSES_Pos)  /**< (DEVEPTIER) Transaction Error Interrupt Enable Mask */
+#define DEVEPTIER_ISO_Msk             _U_(0x75C)                                     /**< (DEVEPTIER_ISO) Register Mask  */
+
+/* BLK mode */
+#define DEVEPTIER_BLK_RXSTPES_Pos     2                                              /**< (DEVEPTIER) Received SETUP Interrupt Enable Position */
+#define DEVEPTIER_BLK_RXSTPES         (_U_(0x1) << DEVEPTIER_BLK_RXSTPES_Pos)  /**< (DEVEPTIER) Received SETUP Interrupt Enable Mask */
+#define DEVEPTIER_BLK_NAKOUTES_Pos    3                                              /**< (DEVEPTIER) NAKed OUT Interrupt Enable Position */
+#define DEVEPTIER_BLK_NAKOUTES        (_U_(0x1) << DEVEPTIER_BLK_NAKOUTES_Pos)  /**< (DEVEPTIER) NAKed OUT Interrupt Enable Mask */
+#define DEVEPTIER_BLK_NAKINES_Pos     4                                              /**< (DEVEPTIER) NAKed IN Interrupt Enable Position */
+#define DEVEPTIER_BLK_NAKINES         (_U_(0x1) << DEVEPTIER_BLK_NAKINES_Pos)  /**< (DEVEPTIER) NAKed IN Interrupt Enable Mask */
+#define DEVEPTIER_BLK_STALLEDES_Pos   6                                              /**< (DEVEPTIER) STALLed Interrupt Enable Position */
+#define DEVEPTIER_BLK_STALLEDES       (_U_(0x1) << DEVEPTIER_BLK_STALLEDES_Pos)  /**< (DEVEPTIER) STALLed Interrupt Enable Mask */
+#define DEVEPTIER_BLK_NYETDISS_Pos    17                                             /**< (DEVEPTIER) NYET Token Disable Enable Position */
+#define DEVEPTIER_BLK_NYETDISS        (_U_(0x1) << DEVEPTIER_BLK_NYETDISS_Pos)  /**< (DEVEPTIER) NYET Token Disable Enable Mask */
+#define DEVEPTIER_BLK_STALLRQS_Pos    19                                             /**< (DEVEPTIER) STALL Request Enable Position */
+#define DEVEPTIER_BLK_STALLRQS        (_U_(0x1) << DEVEPTIER_BLK_STALLRQS_Pos)  /**< (DEVEPTIER) STALL Request Enable Mask */
+#define DEVEPTIER_BLK_Msk             _U_(0xA005C)                                   /**< (DEVEPTIER_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define DEVEPTIER_INTRPT_RXSTPES_Pos  2                                              /**< (DEVEPTIER) Received SETUP Interrupt Enable Position */
+#define DEVEPTIER_INTRPT_RXSTPES      (_U_(0x1) << DEVEPTIER_INTRPT_RXSTPES_Pos)  /**< (DEVEPTIER) Received SETUP Interrupt Enable Mask */
+#define DEVEPTIER_INTRPT_NAKOUTES_Pos 3                                              /**< (DEVEPTIER) NAKed OUT Interrupt Enable Position */
+#define DEVEPTIER_INTRPT_NAKOUTES     (_U_(0x1) << DEVEPTIER_INTRPT_NAKOUTES_Pos)  /**< (DEVEPTIER) NAKed OUT Interrupt Enable Mask */
+#define DEVEPTIER_INTRPT_NAKINES_Pos  4                                              /**< (DEVEPTIER) NAKed IN Interrupt Enable Position */
+#define DEVEPTIER_INTRPT_NAKINES      (_U_(0x1) << DEVEPTIER_INTRPT_NAKINES_Pos)  /**< (DEVEPTIER) NAKed IN Interrupt Enable Mask */
+#define DEVEPTIER_INTRPT_STALLEDES_Pos 6                                              /**< (DEVEPTIER) STALLed Interrupt Enable Position */
+#define DEVEPTIER_INTRPT_STALLEDES     (_U_(0x1) << DEVEPTIER_INTRPT_STALLEDES_Pos)  /**< (DEVEPTIER) STALLed Interrupt Enable Mask */
+#define DEVEPTIER_INTRPT_NYETDISS_Pos 17                                             /**< (DEVEPTIER) NYET Token Disable Enable Position */
+#define DEVEPTIER_INTRPT_NYETDISS     (_U_(0x1) << DEVEPTIER_INTRPT_NYETDISS_Pos)  /**< (DEVEPTIER) NYET Token Disable Enable Mask */
+#define DEVEPTIER_INTRPT_STALLRQS_Pos 19                                             /**< (DEVEPTIER) STALL Request Enable Position */
+#define DEVEPTIER_INTRPT_STALLRQS     (_U_(0x1) << DEVEPTIER_INTRPT_STALLRQS_Pos)  /**< (DEVEPTIER) STALL Request Enable Mask */
+#define DEVEPTIER_INTRPT_Msk          _U_(0xA005C)                                   /**< (DEVEPTIER_INTRPT) Register Mask  */
+
+
+/* -------- DEVEPTIDR : (USBHS Offset: 0x220) (/W 32) Device Endpoint Interrupt Disable Register -------- */
+
+#define DEVEPTIDR_OFFSET              (0x220)                                       /**<  (DEVEPTIDR) Device Endpoint Interrupt Disable Register  Offset */
+
+#define DEVEPTIDR_TXINEC_Pos          0                                              /**< (DEVEPTIDR) Transmitted IN Interrupt Clear Position */
+#define DEVEPTIDR_TXINEC              (_U_(0x1) << DEVEPTIDR_TXINEC_Pos)       /**< (DEVEPTIDR) Transmitted IN Interrupt Clear Mask */
+#define DEVEPTIDR_RXOUTEC_Pos         1                                              /**< (DEVEPTIDR) Received OUT Data Interrupt Clear Position */
+#define DEVEPTIDR_RXOUTEC             (_U_(0x1) << DEVEPTIDR_RXOUTEC_Pos)      /**< (DEVEPTIDR) Received OUT Data Interrupt Clear Mask */
+#define DEVEPTIDR_OVERFEC_Pos         5                                              /**< (DEVEPTIDR) Overflow Interrupt Clear Position */
+#define DEVEPTIDR_OVERFEC             (_U_(0x1) << DEVEPTIDR_OVERFEC_Pos)      /**< (DEVEPTIDR) Overflow Interrupt Clear Mask */
+#define DEVEPTIDR_SHORTPACKETEC_Pos   7                                              /**< (DEVEPTIDR) Shortpacket Interrupt Clear Position */
+#define DEVEPTIDR_SHORTPACKETEC       (_U_(0x1) << DEVEPTIDR_SHORTPACKETEC_Pos)  /**< (DEVEPTIDR) Shortpacket Interrupt Clear Mask */
+#define DEVEPTIDR_NBUSYBKEC_Pos       12                                             /**< (DEVEPTIDR) Number of Busy Banks Interrupt Clear Position */
+#define DEVEPTIDR_NBUSYBKEC           (_U_(0x1) << DEVEPTIDR_NBUSYBKEC_Pos)    /**< (DEVEPTIDR) Number of Busy Banks Interrupt Clear Mask */
+#define DEVEPTIDR_FIFOCONC_Pos        14                                             /**< (DEVEPTIDR) FIFO Control Clear Position */
+#define DEVEPTIDR_FIFOCONC            (_U_(0x1) << DEVEPTIDR_FIFOCONC_Pos)     /**< (DEVEPTIDR) FIFO Control Clear Mask */
+#define DEVEPTIDR_EPDISHDMAC_Pos      16                                             /**< (DEVEPTIDR) Endpoint Interrupts Disable HDMA Request Clear Position */
+#define DEVEPTIDR_EPDISHDMAC          (_U_(0x1) << DEVEPTIDR_EPDISHDMAC_Pos)   /**< (DEVEPTIDR) Endpoint Interrupts Disable HDMA Request Clear Mask */
+#define DEVEPTIDR_Msk                 _U_(0x150A3)                                   /**< (DEVEPTIDR) Register Mask  */
+
+/* CTRL mode */
+#define DEVEPTIDR_CTRL_RXSTPEC_Pos    2                                              /**< (DEVEPTIDR) Received SETUP Interrupt Clear Position */
+#define DEVEPTIDR_CTRL_RXSTPEC        (_U_(0x1) << DEVEPTIDR_CTRL_RXSTPEC_Pos)  /**< (DEVEPTIDR) Received SETUP Interrupt Clear Mask */
+#define DEVEPTIDR_CTRL_NAKOUTEC_Pos   3                                              /**< (DEVEPTIDR) NAKed OUT Interrupt Clear Position */
+#define DEVEPTIDR_CTRL_NAKOUTEC       (_U_(0x1) << DEVEPTIDR_CTRL_NAKOUTEC_Pos)  /**< (DEVEPTIDR) NAKed OUT Interrupt Clear Mask */
+#define DEVEPTIDR_CTRL_NAKINEC_Pos    4                                              /**< (DEVEPTIDR) NAKed IN Interrupt Clear Position */
+#define DEVEPTIDR_CTRL_NAKINEC        (_U_(0x1) << DEVEPTIDR_CTRL_NAKINEC_Pos)  /**< (DEVEPTIDR) NAKed IN Interrupt Clear Mask */
+#define DEVEPTIDR_CTRL_STALLEDEC_Pos  6                                              /**< (DEVEPTIDR) STALLed Interrupt Clear Position */
+#define DEVEPTIDR_CTRL_STALLEDEC      (_U_(0x1) << DEVEPTIDR_CTRL_STALLEDEC_Pos)  /**< (DEVEPTIDR) STALLed Interrupt Clear Mask */
+#define DEVEPTIDR_CTRL_NYETDISC_Pos   17                                             /**< (DEVEPTIDR) NYET Token Disable Clear Position */
+#define DEVEPTIDR_CTRL_NYETDISC       (_U_(0x1) << DEVEPTIDR_CTRL_NYETDISC_Pos)  /**< (DEVEPTIDR) NYET Token Disable Clear Mask */
+#define DEVEPTIDR_CTRL_STALLRQC_Pos   19                                             /**< (DEVEPTIDR) STALL Request Clear Position */
+#define DEVEPTIDR_CTRL_STALLRQC       (_U_(0x1) << DEVEPTIDR_CTRL_STALLRQC_Pos)  /**< (DEVEPTIDR) STALL Request Clear Mask */
+#define DEVEPTIDR_CTRL_Msk            _U_(0xA005C)                                   /**< (DEVEPTIDR_CTRL) Register Mask  */
+
+/* ISO mode */
+#define DEVEPTIDR_ISO_UNDERFEC_Pos    2                                              /**< (DEVEPTIDR) Underflow Interrupt Clear Position */
+#define DEVEPTIDR_ISO_UNDERFEC        (_U_(0x1) << DEVEPTIDR_ISO_UNDERFEC_Pos)  /**< (DEVEPTIDR) Underflow Interrupt Clear Mask */
+#define DEVEPTIDR_ISO_HBISOINERREC_Pos 3                                              /**< (DEVEPTIDR) High Bandwidth Isochronous IN Underflow Error Interrupt Clear Position */
+#define DEVEPTIDR_ISO_HBISOINERREC     (_U_(0x1) << DEVEPTIDR_ISO_HBISOINERREC_Pos)  /**< (DEVEPTIDR) High Bandwidth Isochronous IN Underflow Error Interrupt Clear Mask */
+#define DEVEPTIDR_ISO_HBISOFLUSHEC_Pos 4                                              /**< (DEVEPTIDR) High Bandwidth Isochronous IN Flush Interrupt Clear Position */
+#define DEVEPTIDR_ISO_HBISOFLUSHEC     (_U_(0x1) << DEVEPTIDR_ISO_HBISOFLUSHEC_Pos)  /**< (DEVEPTIDR) High Bandwidth Isochronous IN Flush Interrupt Clear Mask */
+#define DEVEPTIDR_ISO_MDATAEC_Pos     8                                              /**< (DEVEPTIDR) MData Interrupt Clear Position */
+#define DEVEPTIDR_ISO_MDATAEC         (_U_(0x1) << DEVEPTIDR_ISO_MDATAEC_Pos)  /**< (DEVEPTIDR) MData Interrupt Clear Mask */
+#define DEVEPTIDR_ISO_DATAXEC_Pos     9                                              /**< (DEVEPTIDR) DataX Interrupt Clear Position */
+#define DEVEPTIDR_ISO_DATAXEC         (_U_(0x1) << DEVEPTIDR_ISO_DATAXEC_Pos)  /**< (DEVEPTIDR) DataX Interrupt Clear Mask */
+#define DEVEPTIDR_ISO_ERRORTRANSEC_Pos 10                                             /**< (DEVEPTIDR) Transaction Error Interrupt Clear Position */
+#define DEVEPTIDR_ISO_ERRORTRANSEC     (_U_(0x1) << DEVEPTIDR_ISO_ERRORTRANSEC_Pos)  /**< (DEVEPTIDR) Transaction Error Interrupt Clear Mask */
+#define DEVEPTIDR_ISO_Msk             _U_(0x71C)                                     /**< (DEVEPTIDR_ISO) Register Mask  */
+
+/* BLK mode */
+#define DEVEPTIDR_BLK_RXSTPEC_Pos     2                                              /**< (DEVEPTIDR) Received SETUP Interrupt Clear Position */
+#define DEVEPTIDR_BLK_RXSTPEC         (_U_(0x1) << DEVEPTIDR_BLK_RXSTPEC_Pos)  /**< (DEVEPTIDR) Received SETUP Interrupt Clear Mask */
+#define DEVEPTIDR_BLK_NAKOUTEC_Pos    3                                              /**< (DEVEPTIDR) NAKed OUT Interrupt Clear Position */
+#define DEVEPTIDR_BLK_NAKOUTEC        (_U_(0x1) << DEVEPTIDR_BLK_NAKOUTEC_Pos)  /**< (DEVEPTIDR) NAKed OUT Interrupt Clear Mask */
+#define DEVEPTIDR_BLK_NAKINEC_Pos     4                                              /**< (DEVEPTIDR) NAKed IN Interrupt Clear Position */
+#define DEVEPTIDR_BLK_NAKINEC         (_U_(0x1) << DEVEPTIDR_BLK_NAKINEC_Pos)  /**< (DEVEPTIDR) NAKed IN Interrupt Clear Mask */
+#define DEVEPTIDR_BLK_STALLEDEC_Pos   6                                              /**< (DEVEPTIDR) STALLed Interrupt Clear Position */
+#define DEVEPTIDR_BLK_STALLEDEC       (_U_(0x1) << DEVEPTIDR_BLK_STALLEDEC_Pos)  /**< (DEVEPTIDR) STALLed Interrupt Clear Mask */
+#define DEVEPTIDR_BLK_NYETDISC_Pos    17                                             /**< (DEVEPTIDR) NYET Token Disable Clear Position */
+#define DEVEPTIDR_BLK_NYETDISC        (_U_(0x1) << DEVEPTIDR_BLK_NYETDISC_Pos)  /**< (DEVEPTIDR) NYET Token Disable Clear Mask */
+#define DEVEPTIDR_BLK_STALLRQC_Pos    19                                             /**< (DEVEPTIDR) STALL Request Clear Position */
+#define DEVEPTIDR_BLK_STALLRQC        (_U_(0x1) << DEVEPTIDR_BLK_STALLRQC_Pos)  /**< (DEVEPTIDR) STALL Request Clear Mask */
+#define DEVEPTIDR_BLK_Msk             _U_(0xA005C)                                   /**< (DEVEPTIDR_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define DEVEPTIDR_INTRPT_RXSTPEC_Pos  2                                              /**< (DEVEPTIDR) Received SETUP Interrupt Clear Position */
+#define DEVEPTIDR_INTRPT_RXSTPEC      (_U_(0x1) << DEVEPTIDR_INTRPT_RXSTPEC_Pos)  /**< (DEVEPTIDR) Received SETUP Interrupt Clear Mask */
+#define DEVEPTIDR_INTRPT_NAKOUTEC_Pos 3                                              /**< (DEVEPTIDR) NAKed OUT Interrupt Clear Position */
+#define DEVEPTIDR_INTRPT_NAKOUTEC     (_U_(0x1) << DEVEPTIDR_INTRPT_NAKOUTEC_Pos)  /**< (DEVEPTIDR) NAKed OUT Interrupt Clear Mask */
+#define DEVEPTIDR_INTRPT_NAKINEC_Pos  4                                              /**< (DEVEPTIDR) NAKed IN Interrupt Clear Position */
+#define DEVEPTIDR_INTRPT_NAKINEC      (_U_(0x1) << DEVEPTIDR_INTRPT_NAKINEC_Pos)  /**< (DEVEPTIDR) NAKed IN Interrupt Clear Mask */
+#define DEVEPTIDR_INTRPT_STALLEDEC_Pos 6                                              /**< (DEVEPTIDR) STALLed Interrupt Clear Position */
+#define DEVEPTIDR_INTRPT_STALLEDEC     (_U_(0x1) << DEVEPTIDR_INTRPT_STALLEDEC_Pos)  /**< (DEVEPTIDR) STALLed Interrupt Clear Mask */
+#define DEVEPTIDR_INTRPT_NYETDISC_Pos 17                                             /**< (DEVEPTIDR) NYET Token Disable Clear Position */
+#define DEVEPTIDR_INTRPT_NYETDISC     (_U_(0x1) << DEVEPTIDR_INTRPT_NYETDISC_Pos)  /**< (DEVEPTIDR) NYET Token Disable Clear Mask */
+#define DEVEPTIDR_INTRPT_STALLRQC_Pos 19                                             /**< (DEVEPTIDR) STALL Request Clear Position */
+#define DEVEPTIDR_INTRPT_STALLRQC     (_U_(0x1) << DEVEPTIDR_INTRPT_STALLRQC_Pos)  /**< (DEVEPTIDR) STALL Request Clear Mask */
+#define DEVEPTIDR_INTRPT_Msk          _U_(0xA005C)                                   /**< (DEVEPTIDR_INTRPT) Register Mask  */
+
+
+/* -------- HSTCTRL : (USBHS Offset: 0x400) (R/W 32) Host General Control Register -------- */
+
+#define HSTCTRL_OFFSET                (0x400)                                       /**<  (HSTCTRL) Host General Control Register  Offset */
+
+#define HSTCTRL_SOFE_Pos              8                                              /**< (HSTCTRL) Start of Frame Generation Enable Position */
+#define HSTCTRL_SOFE                  (_U_(0x1) << HSTCTRL_SOFE_Pos)           /**< (HSTCTRL) Start of Frame Generation Enable Mask */
+#define HSTCTRL_RESET_Pos             9                                              /**< (HSTCTRL) Send USB Reset Position */
+#define HSTCTRL_RESET                 (_U_(0x1) << HSTCTRL_RESET_Pos)          /**< (HSTCTRL) Send USB Reset Mask */
+#define HSTCTRL_RESUME_Pos            10                                             /**< (HSTCTRL) Send USB Resume Position */
+#define HSTCTRL_RESUME                (_U_(0x1) << HSTCTRL_RESUME_Pos)         /**< (HSTCTRL) Send USB Resume Mask */
+#define HSTCTRL_SPDCONF_Pos           12                                             /**< (HSTCTRL) Mode Configuration Position */
+#define HSTCTRL_SPDCONF               (_U_(0x3) << HSTCTRL_SPDCONF_Pos)        /**< (HSTCTRL) Mode Configuration Mask */
+#define   HSTCTRL_SPDCONF_NORMAL_Val  _U_(0x0)                                       /**< (HSTCTRL) The host starts in Full-speed mode and performs a high-speed reset to switch to High-speed mode if the downstream peripheral is high-speed capable.  */
+#define   HSTCTRL_SPDCONF_LOW_POWER_Val _U_(0x1)                                       /**< (HSTCTRL) For a better consumption, if high speed is not needed.  */
+#define   HSTCTRL_SPDCONF_HIGH_SPEED_Val _U_(0x2)                                       /**< (HSTCTRL) Forced high speed.  */
+#define   HSTCTRL_SPDCONF_FORCED_FS_Val _U_(0x3)                                       /**< (HSTCTRL) The host remains in Full-speed mode whatever the peripheral speed capability.  */
+#define HSTCTRL_SPDCONF_NORMAL        (HSTCTRL_SPDCONF_NORMAL_Val << HSTCTRL_SPDCONF_Pos)  /**< (HSTCTRL) The host starts in Full-speed mode and performs a high-speed reset to switch to High-speed mode if the downstream peripheral is high-speed capable. Position  */
+#define HSTCTRL_SPDCONF_LOW_POWER     (HSTCTRL_SPDCONF_LOW_POWER_Val << HSTCTRL_SPDCONF_Pos)  /**< (HSTCTRL) For a better consumption, if high speed is not needed. Position  */
+#define HSTCTRL_SPDCONF_HIGH_SPEED    (HSTCTRL_SPDCONF_HIGH_SPEED_Val << HSTCTRL_SPDCONF_Pos)  /**< (HSTCTRL) Forced high speed. Position  */
+#define HSTCTRL_SPDCONF_FORCED_FS     (HSTCTRL_SPDCONF_FORCED_FS_Val << HSTCTRL_SPDCONF_Pos)  /**< (HSTCTRL) The host remains in Full-speed mode whatever the peripheral speed capability. Position  */
+#define HSTCTRL_Msk                   _U_(0x3700)                                    /**< (HSTCTRL) Register Mask  */
+
+
+/* -------- HSTISR : (USBHS Offset: 0x404) (R/ 32) Host Global Interrupt Status Register -------- */
+
+#define HSTISR_OFFSET                 (0x404)                                       /**<  (HSTISR) Host Global Interrupt Status Register  Offset */
+
+#define HSTISR_DCONNI_Pos             0                                              /**< (HSTISR) Device Connection Interrupt Position */
+#define HSTISR_DCONNI                 (_U_(0x1) << HSTISR_DCONNI_Pos)          /**< (HSTISR) Device Connection Interrupt Mask */
+#define HSTISR_DDISCI_Pos             1                                              /**< (HSTISR) Device Disconnection Interrupt Position */
+#define HSTISR_DDISCI                 (_U_(0x1) << HSTISR_DDISCI_Pos)          /**< (HSTISR) Device Disconnection Interrupt Mask */
+#define HSTISR_RSTI_Pos               2                                              /**< (HSTISR) USB Reset Sent Interrupt Position */
+#define HSTISR_RSTI                   (_U_(0x1) << HSTISR_RSTI_Pos)            /**< (HSTISR) USB Reset Sent Interrupt Mask */
+#define HSTISR_RSMEDI_Pos             3                                              /**< (HSTISR) Downstream Resume Sent Interrupt Position */
+#define HSTISR_RSMEDI                 (_U_(0x1) << HSTISR_RSMEDI_Pos)          /**< (HSTISR) Downstream Resume Sent Interrupt Mask */
+#define HSTISR_RXRSMI_Pos             4                                              /**< (HSTISR) Upstream Resume Received Interrupt Position */
+#define HSTISR_RXRSMI                 (_U_(0x1) << HSTISR_RXRSMI_Pos)          /**< (HSTISR) Upstream Resume Received Interrupt Mask */
+#define HSTISR_HSOFI_Pos              5                                              /**< (HSTISR) Host Start of Frame Interrupt Position */
+#define HSTISR_HSOFI                  (_U_(0x1) << HSTISR_HSOFI_Pos)           /**< (HSTISR) Host Start of Frame Interrupt Mask */
+#define HSTISR_HWUPI_Pos              6                                              /**< (HSTISR) Host Wake-Up Interrupt Position */
+#define HSTISR_HWUPI                  (_U_(0x1) << HSTISR_HWUPI_Pos)           /**< (HSTISR) Host Wake-Up Interrupt Mask */
+#define HSTISR_PEP_0_Pos              8                                              /**< (HSTISR) Pipe 0 Interrupt Position */
+#define HSTISR_PEP_0                  (_U_(0x1) << HSTISR_PEP_0_Pos)           /**< (HSTISR) Pipe 0 Interrupt Mask */
+#define HSTISR_PEP_1_Pos              9                                              /**< (HSTISR) Pipe 1 Interrupt Position */
+#define HSTISR_PEP_1                  (_U_(0x1) << HSTISR_PEP_1_Pos)           /**< (HSTISR) Pipe 1 Interrupt Mask */
+#define HSTISR_PEP_2_Pos              10                                             /**< (HSTISR) Pipe 2 Interrupt Position */
+#define HSTISR_PEP_2                  (_U_(0x1) << HSTISR_PEP_2_Pos)           /**< (HSTISR) Pipe 2 Interrupt Mask */
+#define HSTISR_PEP_3_Pos              11                                             /**< (HSTISR) Pipe 3 Interrupt Position */
+#define HSTISR_PEP_3                  (_U_(0x1) << HSTISR_PEP_3_Pos)           /**< (HSTISR) Pipe 3 Interrupt Mask */
+#define HSTISR_PEP_4_Pos              12                                             /**< (HSTISR) Pipe 4 Interrupt Position */
+#define HSTISR_PEP_4                  (_U_(0x1) << HSTISR_PEP_4_Pos)           /**< (HSTISR) Pipe 4 Interrupt Mask */
+#define HSTISR_PEP_5_Pos              13                                             /**< (HSTISR) Pipe 5 Interrupt Position */
+#define HSTISR_PEP_5                  (_U_(0x1) << HSTISR_PEP_5_Pos)           /**< (HSTISR) Pipe 5 Interrupt Mask */
+#define HSTISR_PEP_6_Pos              14                                             /**< (HSTISR) Pipe 6 Interrupt Position */
+#define HSTISR_PEP_6                  (_U_(0x1) << HSTISR_PEP_6_Pos)           /**< (HSTISR) Pipe 6 Interrupt Mask */
+#define HSTISR_PEP_7_Pos              15                                             /**< (HSTISR) Pipe 7 Interrupt Position */
+#define HSTISR_PEP_7                  (_U_(0x1) << HSTISR_PEP_7_Pos)           /**< (HSTISR) Pipe 7 Interrupt Mask */
+#define HSTISR_PEP_8_Pos              16                                             /**< (HSTISR) Pipe 8 Interrupt Position */
+#define HSTISR_PEP_8                  (_U_(0x1) << HSTISR_PEP_8_Pos)           /**< (HSTISR) Pipe 8 Interrupt Mask */
+#define HSTISR_PEP_9_Pos              17                                             /**< (HSTISR) Pipe 9 Interrupt Position */
+#define HSTISR_PEP_9                  (_U_(0x1) << HSTISR_PEP_9_Pos)           /**< (HSTISR) Pipe 9 Interrupt Mask */
+#define HSTISR_DMA_0_Pos              25                                             /**< (HSTISR) DMA Channel 0 Interrupt Position */
+#define HSTISR_DMA_0                  (_U_(0x1) << HSTISR_DMA_0_Pos)           /**< (HSTISR) DMA Channel 0 Interrupt Mask */
+#define HSTISR_DMA_1_Pos              26                                             /**< (HSTISR) DMA Channel 1 Interrupt Position */
+#define HSTISR_DMA_1                  (_U_(0x1) << HSTISR_DMA_1_Pos)           /**< (HSTISR) DMA Channel 1 Interrupt Mask */
+#define HSTISR_DMA_2_Pos              27                                             /**< (HSTISR) DMA Channel 2 Interrupt Position */
+#define HSTISR_DMA_2                  (_U_(0x1) << HSTISR_DMA_2_Pos)           /**< (HSTISR) DMA Channel 2 Interrupt Mask */
+#define HSTISR_DMA_3_Pos              28                                             /**< (HSTISR) DMA Channel 3 Interrupt Position */
+#define HSTISR_DMA_3                  (_U_(0x1) << HSTISR_DMA_3_Pos)           /**< (HSTISR) DMA Channel 3 Interrupt Mask */
+#define HSTISR_DMA_4_Pos              29                                             /**< (HSTISR) DMA Channel 4 Interrupt Position */
+#define HSTISR_DMA_4                  (_U_(0x1) << HSTISR_DMA_4_Pos)           /**< (HSTISR) DMA Channel 4 Interrupt Mask */
+#define HSTISR_DMA_5_Pos              30                                             /**< (HSTISR) DMA Channel 5 Interrupt Position */
+#define HSTISR_DMA_5                  (_U_(0x1) << HSTISR_DMA_5_Pos)           /**< (HSTISR) DMA Channel 5 Interrupt Mask */
+#define HSTISR_DMA_6_Pos              31                                             /**< (HSTISR) DMA Channel 6 Interrupt Position */
+#define HSTISR_DMA_6                  (_U_(0x1) << HSTISR_DMA_6_Pos)           /**< (HSTISR) DMA Channel 6 Interrupt Mask */
+#define HSTISR_Msk                    _U_(0xFE03FF7F)                                /**< (HSTISR) Register Mask  */
+
+#define HSTISR_PEP__Pos               8                                              /**< (HSTISR Position) Pipe x Interrupt */
+#define HSTISR_PEP_                   (_U_(0x3FF) << HSTISR_PEP__Pos)          /**< (HSTISR Mask) PEP_ */
+#define HSTISR_DMA__Pos               25                                             /**< (HSTISR Position) DMA Channel 6 Interrupt */
+#define HSTISR_DMA_                   (_U_(0x7F) << HSTISR_DMA__Pos)           /**< (HSTISR Mask) DMA_ */
+
+/* -------- HSTICR : (USBHS Offset: 0x408) (/W 32) Host Global Interrupt Clear Register -------- */
+
+#define HSTICR_OFFSET                 (0x408)                                       /**<  (HSTICR) Host Global Interrupt Clear Register  Offset */
+
+#define HSTICR_DCONNIC_Pos            0                                              /**< (HSTICR) Device Connection Interrupt Clear Position */
+#define HSTICR_DCONNIC                (_U_(0x1) << HSTICR_DCONNIC_Pos)         /**< (HSTICR) Device Connection Interrupt Clear Mask */
+#define HSTICR_DDISCIC_Pos            1                                              /**< (HSTICR) Device Disconnection Interrupt Clear Position */
+#define HSTICR_DDISCIC                (_U_(0x1) << HSTICR_DDISCIC_Pos)         /**< (HSTICR) Device Disconnection Interrupt Clear Mask */
+#define HSTICR_RSTIC_Pos              2                                              /**< (HSTICR) USB Reset Sent Interrupt Clear Position */
+#define HSTICR_RSTIC                  (_U_(0x1) << HSTICR_RSTIC_Pos)           /**< (HSTICR) USB Reset Sent Interrupt Clear Mask */
+#define HSTICR_RSMEDIC_Pos            3                                              /**< (HSTICR) Downstream Resume Sent Interrupt Clear Position */
+#define HSTICR_RSMEDIC                (_U_(0x1) << HSTICR_RSMEDIC_Pos)         /**< (HSTICR) Downstream Resume Sent Interrupt Clear Mask */
+#define HSTICR_RXRSMIC_Pos            4                                              /**< (HSTICR) Upstream Resume Received Interrupt Clear Position */
+#define HSTICR_RXRSMIC                (_U_(0x1) << HSTICR_RXRSMIC_Pos)         /**< (HSTICR) Upstream Resume Received Interrupt Clear Mask */
+#define HSTICR_HSOFIC_Pos             5                                              /**< (HSTICR) Host Start of Frame Interrupt Clear Position */
+#define HSTICR_HSOFIC                 (_U_(0x1) << HSTICR_HSOFIC_Pos)          /**< (HSTICR) Host Start of Frame Interrupt Clear Mask */
+#define HSTICR_HWUPIC_Pos             6                                              /**< (HSTICR) Host Wake-Up Interrupt Clear Position */
+#define HSTICR_HWUPIC                 (_U_(0x1) << HSTICR_HWUPIC_Pos)          /**< (HSTICR) Host Wake-Up Interrupt Clear Mask */
+#define HSTICR_Msk                    _U_(0x7F)                                      /**< (HSTICR) Register Mask  */
+
+
+/* -------- HSTIFR : (USBHS Offset: 0x40c) (/W 32) Host Global Interrupt Set Register -------- */
+
+#define HSTIFR_OFFSET                 (0x40C)                                       /**<  (HSTIFR) Host Global Interrupt Set Register  Offset */
+
+#define HSTIFR_DCONNIS_Pos            0                                              /**< (HSTIFR) Device Connection Interrupt Set Position */
+#define HSTIFR_DCONNIS                (_U_(0x1) << HSTIFR_DCONNIS_Pos)         /**< (HSTIFR) Device Connection Interrupt Set Mask */
+#define HSTIFR_DDISCIS_Pos            1                                              /**< (HSTIFR) Device Disconnection Interrupt Set Position */
+#define HSTIFR_DDISCIS                (_U_(0x1) << HSTIFR_DDISCIS_Pos)         /**< (HSTIFR) Device Disconnection Interrupt Set Mask */
+#define HSTIFR_RSTIS_Pos              2                                              /**< (HSTIFR) USB Reset Sent Interrupt Set Position */
+#define HSTIFR_RSTIS                  (_U_(0x1) << HSTIFR_RSTIS_Pos)           /**< (HSTIFR) USB Reset Sent Interrupt Set Mask */
+#define HSTIFR_RSMEDIS_Pos            3                                              /**< (HSTIFR) Downstream Resume Sent Interrupt Set Position */
+#define HSTIFR_RSMEDIS                (_U_(0x1) << HSTIFR_RSMEDIS_Pos)         /**< (HSTIFR) Downstream Resume Sent Interrupt Set Mask */
+#define HSTIFR_RXRSMIS_Pos            4                                              /**< (HSTIFR) Upstream Resume Received Interrupt Set Position */
+#define HSTIFR_RXRSMIS                (_U_(0x1) << HSTIFR_RXRSMIS_Pos)         /**< (HSTIFR) Upstream Resume Received Interrupt Set Mask */
+#define HSTIFR_HSOFIS_Pos             5                                              /**< (HSTIFR) Host Start of Frame Interrupt Set Position */
+#define HSTIFR_HSOFIS                 (_U_(0x1) << HSTIFR_HSOFIS_Pos)          /**< (HSTIFR) Host Start of Frame Interrupt Set Mask */
+#define HSTIFR_HWUPIS_Pos             6                                              /**< (HSTIFR) Host Wake-Up Interrupt Set Position */
+#define HSTIFR_HWUPIS                 (_U_(0x1) << HSTIFR_HWUPIS_Pos)          /**< (HSTIFR) Host Wake-Up Interrupt Set Mask */
+#define HSTIFR_DMA_0_Pos              25                                             /**< (HSTIFR) DMA Channel 0 Interrupt Set Position */
+#define HSTIFR_DMA_0                  (_U_(0x1) << HSTIFR_DMA_0_Pos)           /**< (HSTIFR) DMA Channel 0 Interrupt Set Mask */
+#define HSTIFR_DMA_1_Pos              26                                             /**< (HSTIFR) DMA Channel 1 Interrupt Set Position */
+#define HSTIFR_DMA_1                  (_U_(0x1) << HSTIFR_DMA_1_Pos)           /**< (HSTIFR) DMA Channel 1 Interrupt Set Mask */
+#define HSTIFR_DMA_2_Pos              27                                             /**< (HSTIFR) DMA Channel 2 Interrupt Set Position */
+#define HSTIFR_DMA_2                  (_U_(0x1) << HSTIFR_DMA_2_Pos)           /**< (HSTIFR) DMA Channel 2 Interrupt Set Mask */
+#define HSTIFR_DMA_3_Pos              28                                             /**< (HSTIFR) DMA Channel 3 Interrupt Set Position */
+#define HSTIFR_DMA_3                  (_U_(0x1) << HSTIFR_DMA_3_Pos)           /**< (HSTIFR) DMA Channel 3 Interrupt Set Mask */
+#define HSTIFR_DMA_4_Pos              29                                             /**< (HSTIFR) DMA Channel 4 Interrupt Set Position */
+#define HSTIFR_DMA_4                  (_U_(0x1) << HSTIFR_DMA_4_Pos)           /**< (HSTIFR) DMA Channel 4 Interrupt Set Mask */
+#define HSTIFR_DMA_5_Pos              30                                             /**< (HSTIFR) DMA Channel 5 Interrupt Set Position */
+#define HSTIFR_DMA_5                  (_U_(0x1) << HSTIFR_DMA_5_Pos)           /**< (HSTIFR) DMA Channel 5 Interrupt Set Mask */
+#define HSTIFR_DMA_6_Pos              31                                             /**< (HSTIFR) DMA Channel 6 Interrupt Set Position */
+#define HSTIFR_DMA_6                  (_U_(0x1) << HSTIFR_DMA_6_Pos)           /**< (HSTIFR) DMA Channel 6 Interrupt Set Mask */
+#define HSTIFR_Msk                    _U_(0xFE00007F)                                /**< (HSTIFR) Register Mask  */
+
+#define HSTIFR_DMA__Pos               25                                             /**< (HSTIFR Position) DMA Channel 6 Interrupt Set */
+#define HSTIFR_DMA_                   (_U_(0x7F) << HSTIFR_DMA__Pos)           /**< (HSTIFR Mask) DMA_ */
+
+/* -------- HSTIMR : (USBHS Offset: 0x410) (R/ 32) Host Global Interrupt Mask Register -------- */
+
+#define HSTIMR_OFFSET                 (0x410)                                       /**<  (HSTIMR) Host Global Interrupt Mask Register  Offset */
+
+#define HSTIMR_DCONNIE_Pos            0                                              /**< (HSTIMR) Device Connection Interrupt Enable Position */
+#define HSTIMR_DCONNIE                (_U_(0x1) << HSTIMR_DCONNIE_Pos)         /**< (HSTIMR) Device Connection Interrupt Enable Mask */
+#define HSTIMR_DDISCIE_Pos            1                                              /**< (HSTIMR) Device Disconnection Interrupt Enable Position */
+#define HSTIMR_DDISCIE                (_U_(0x1) << HSTIMR_DDISCIE_Pos)         /**< (HSTIMR) Device Disconnection Interrupt Enable Mask */
+#define HSTIMR_RSTIE_Pos              2                                              /**< (HSTIMR) USB Reset Sent Interrupt Enable Position */
+#define HSTIMR_RSTIE                  (_U_(0x1) << HSTIMR_RSTIE_Pos)           /**< (HSTIMR) USB Reset Sent Interrupt Enable Mask */
+#define HSTIMR_RSMEDIE_Pos            3                                              /**< (HSTIMR) Downstream Resume Sent Interrupt Enable Position */
+#define HSTIMR_RSMEDIE                (_U_(0x1) << HSTIMR_RSMEDIE_Pos)         /**< (HSTIMR) Downstream Resume Sent Interrupt Enable Mask */
+#define HSTIMR_RXRSMIE_Pos            4                                              /**< (HSTIMR) Upstream Resume Received Interrupt Enable Position */
+#define HSTIMR_RXRSMIE                (_U_(0x1) << HSTIMR_RXRSMIE_Pos)         /**< (HSTIMR) Upstream Resume Received Interrupt Enable Mask */
+#define HSTIMR_HSOFIE_Pos             5                                              /**< (HSTIMR) Host Start of Frame Interrupt Enable Position */
+#define HSTIMR_HSOFIE                 (_U_(0x1) << HSTIMR_HSOFIE_Pos)          /**< (HSTIMR) Host Start of Frame Interrupt Enable Mask */
+#define HSTIMR_HWUPIE_Pos             6                                              /**< (HSTIMR) Host Wake-Up Interrupt Enable Position */
+#define HSTIMR_HWUPIE                 (_U_(0x1) << HSTIMR_HWUPIE_Pos)          /**< (HSTIMR) Host Wake-Up Interrupt Enable Mask */
+#define HSTIMR_PEP_0_Pos              8                                              /**< (HSTIMR) Pipe 0 Interrupt Enable Position */
+#define HSTIMR_PEP_0                  (_U_(0x1) << HSTIMR_PEP_0_Pos)           /**< (HSTIMR) Pipe 0 Interrupt Enable Mask */
+#define HSTIMR_PEP_1_Pos              9                                              /**< (HSTIMR) Pipe 1 Interrupt Enable Position */
+#define HSTIMR_PEP_1                  (_U_(0x1) << HSTIMR_PEP_1_Pos)           /**< (HSTIMR) Pipe 1 Interrupt Enable Mask */
+#define HSTIMR_PEP_2_Pos              10                                             /**< (HSTIMR) Pipe 2 Interrupt Enable Position */
+#define HSTIMR_PEP_2                  (_U_(0x1) << HSTIMR_PEP_2_Pos)           /**< (HSTIMR) Pipe 2 Interrupt Enable Mask */
+#define HSTIMR_PEP_3_Pos              11                                             /**< (HSTIMR) Pipe 3 Interrupt Enable Position */
+#define HSTIMR_PEP_3                  (_U_(0x1) << HSTIMR_PEP_3_Pos)           /**< (HSTIMR) Pipe 3 Interrupt Enable Mask */
+#define HSTIMR_PEP_4_Pos              12                                             /**< (HSTIMR) Pipe 4 Interrupt Enable Position */
+#define HSTIMR_PEP_4                  (_U_(0x1) << HSTIMR_PEP_4_Pos)           /**< (HSTIMR) Pipe 4 Interrupt Enable Mask */
+#define HSTIMR_PEP_5_Pos              13                                             /**< (HSTIMR) Pipe 5 Interrupt Enable Position */
+#define HSTIMR_PEP_5                  (_U_(0x1) << HSTIMR_PEP_5_Pos)           /**< (HSTIMR) Pipe 5 Interrupt Enable Mask */
+#define HSTIMR_PEP_6_Pos              14                                             /**< (HSTIMR) Pipe 6 Interrupt Enable Position */
+#define HSTIMR_PEP_6                  (_U_(0x1) << HSTIMR_PEP_6_Pos)           /**< (HSTIMR) Pipe 6 Interrupt Enable Mask */
+#define HSTIMR_PEP_7_Pos              15                                             /**< (HSTIMR) Pipe 7 Interrupt Enable Position */
+#define HSTIMR_PEP_7                  (_U_(0x1) << HSTIMR_PEP_7_Pos)           /**< (HSTIMR) Pipe 7 Interrupt Enable Mask */
+#define HSTIMR_PEP_8_Pos              16                                             /**< (HSTIMR) Pipe 8 Interrupt Enable Position */
+#define HSTIMR_PEP_8                  (_U_(0x1) << HSTIMR_PEP_8_Pos)           /**< (HSTIMR) Pipe 8 Interrupt Enable Mask */
+#define HSTIMR_PEP_9_Pos              17                                             /**< (HSTIMR) Pipe 9 Interrupt Enable Position */
+#define HSTIMR_PEP_9                  (_U_(0x1) << HSTIMR_PEP_9_Pos)           /**< (HSTIMR) Pipe 9 Interrupt Enable Mask */
+#define HSTIMR_DMA_0_Pos              25                                             /**< (HSTIMR) DMA Channel 0 Interrupt Enable Position */
+#define HSTIMR_DMA_0                  (_U_(0x1) << HSTIMR_DMA_0_Pos)           /**< (HSTIMR) DMA Channel 0 Interrupt Enable Mask */
+#define HSTIMR_DMA_1_Pos              26                                             /**< (HSTIMR) DMA Channel 1 Interrupt Enable Position */
+#define HSTIMR_DMA_1                  (_U_(0x1) << HSTIMR_DMA_1_Pos)           /**< (HSTIMR) DMA Channel 1 Interrupt Enable Mask */
+#define HSTIMR_DMA_2_Pos              27                                             /**< (HSTIMR) DMA Channel 2 Interrupt Enable Position */
+#define HSTIMR_DMA_2                  (_U_(0x1) << HSTIMR_DMA_2_Pos)           /**< (HSTIMR) DMA Channel 2 Interrupt Enable Mask */
+#define HSTIMR_DMA_3_Pos              28                                             /**< (HSTIMR) DMA Channel 3 Interrupt Enable Position */
+#define HSTIMR_DMA_3                  (_U_(0x1) << HSTIMR_DMA_3_Pos)           /**< (HSTIMR) DMA Channel 3 Interrupt Enable Mask */
+#define HSTIMR_DMA_4_Pos              29                                             /**< (HSTIMR) DMA Channel 4 Interrupt Enable Position */
+#define HSTIMR_DMA_4                  (_U_(0x1) << HSTIMR_DMA_4_Pos)           /**< (HSTIMR) DMA Channel 4 Interrupt Enable Mask */
+#define HSTIMR_DMA_5_Pos              30                                             /**< (HSTIMR) DMA Channel 5 Interrupt Enable Position */
+#define HSTIMR_DMA_5                  (_U_(0x1) << HSTIMR_DMA_5_Pos)           /**< (HSTIMR) DMA Channel 5 Interrupt Enable Mask */
+#define HSTIMR_DMA_6_Pos              31                                             /**< (HSTIMR) DMA Channel 6 Interrupt Enable Position */
+#define HSTIMR_DMA_6                  (_U_(0x1) << HSTIMR_DMA_6_Pos)           /**< (HSTIMR) DMA Channel 6 Interrupt Enable Mask */
+#define HSTIMR_Msk                    _U_(0xFE03FF7F)                                /**< (HSTIMR) Register Mask  */
+
+#define HSTIMR_PEP__Pos               8                                              /**< (HSTIMR Position) Pipe x Interrupt Enable */
+#define HSTIMR_PEP_                   (_U_(0x3FF) << HSTIMR_PEP__Pos)          /**< (HSTIMR Mask) PEP_ */
+#define HSTIMR_DMA__Pos               25                                             /**< (HSTIMR Position) DMA Channel 6 Interrupt Enable */
+#define HSTIMR_DMA_                   (_U_(0x7F) << HSTIMR_DMA__Pos)           /**< (HSTIMR Mask) DMA_ */
+
+/* -------- HSTIDR : (USBHS Offset: 0x414) (/W 32) Host Global Interrupt Disable Register -------- */
+
+#define HSTIDR_OFFSET                 (0x414)                                       /**<  (HSTIDR) Host Global Interrupt Disable Register  Offset */
+
+#define HSTIDR_DCONNIEC_Pos           0                                              /**< (HSTIDR) Device Connection Interrupt Disable Position */
+#define HSTIDR_DCONNIEC               (_U_(0x1) << HSTIDR_DCONNIEC_Pos)        /**< (HSTIDR) Device Connection Interrupt Disable Mask */
+#define HSTIDR_DDISCIEC_Pos           1                                              /**< (HSTIDR) Device Disconnection Interrupt Disable Position */
+#define HSTIDR_DDISCIEC               (_U_(0x1) << HSTIDR_DDISCIEC_Pos)        /**< (HSTIDR) Device Disconnection Interrupt Disable Mask */
+#define HSTIDR_RSTIEC_Pos             2                                              /**< (HSTIDR) USB Reset Sent Interrupt Disable Position */
+#define HSTIDR_RSTIEC                 (_U_(0x1) << HSTIDR_RSTIEC_Pos)          /**< (HSTIDR) USB Reset Sent Interrupt Disable Mask */
+#define HSTIDR_RSMEDIEC_Pos           3                                              /**< (HSTIDR) Downstream Resume Sent Interrupt Disable Position */
+#define HSTIDR_RSMEDIEC               (_U_(0x1) << HSTIDR_RSMEDIEC_Pos)        /**< (HSTIDR) Downstream Resume Sent Interrupt Disable Mask */
+#define HSTIDR_RXRSMIEC_Pos           4                                              /**< (HSTIDR) Upstream Resume Received Interrupt Disable Position */
+#define HSTIDR_RXRSMIEC               (_U_(0x1) << HSTIDR_RXRSMIEC_Pos)        /**< (HSTIDR) Upstream Resume Received Interrupt Disable Mask */
+#define HSTIDR_HSOFIEC_Pos            5                                              /**< (HSTIDR) Host Start of Frame Interrupt Disable Position */
+#define HSTIDR_HSOFIEC                (_U_(0x1) << HSTIDR_HSOFIEC_Pos)         /**< (HSTIDR) Host Start of Frame Interrupt Disable Mask */
+#define HSTIDR_HWUPIEC_Pos            6                                              /**< (HSTIDR) Host Wake-Up Interrupt Disable Position */
+#define HSTIDR_HWUPIEC                (_U_(0x1) << HSTIDR_HWUPIEC_Pos)         /**< (HSTIDR) Host Wake-Up Interrupt Disable Mask */
+#define HSTIDR_PEP_0_Pos              8                                              /**< (HSTIDR) Pipe 0 Interrupt Disable Position */
+#define HSTIDR_PEP_0                  (_U_(0x1) << HSTIDR_PEP_0_Pos)           /**< (HSTIDR) Pipe 0 Interrupt Disable Mask */
+#define HSTIDR_PEP_1_Pos              9                                              /**< (HSTIDR) Pipe 1 Interrupt Disable Position */
+#define HSTIDR_PEP_1                  (_U_(0x1) << HSTIDR_PEP_1_Pos)           /**< (HSTIDR) Pipe 1 Interrupt Disable Mask */
+#define HSTIDR_PEP_2_Pos              10                                             /**< (HSTIDR) Pipe 2 Interrupt Disable Position */
+#define HSTIDR_PEP_2                  (_U_(0x1) << HSTIDR_PEP_2_Pos)           /**< (HSTIDR) Pipe 2 Interrupt Disable Mask */
+#define HSTIDR_PEP_3_Pos              11                                             /**< (HSTIDR) Pipe 3 Interrupt Disable Position */
+#define HSTIDR_PEP_3                  (_U_(0x1) << HSTIDR_PEP_3_Pos)           /**< (HSTIDR) Pipe 3 Interrupt Disable Mask */
+#define HSTIDR_PEP_4_Pos              12                                             /**< (HSTIDR) Pipe 4 Interrupt Disable Position */
+#define HSTIDR_PEP_4                  (_U_(0x1) << HSTIDR_PEP_4_Pos)           /**< (HSTIDR) Pipe 4 Interrupt Disable Mask */
+#define HSTIDR_PEP_5_Pos              13                                             /**< (HSTIDR) Pipe 5 Interrupt Disable Position */
+#define HSTIDR_PEP_5                  (_U_(0x1) << HSTIDR_PEP_5_Pos)           /**< (HSTIDR) Pipe 5 Interrupt Disable Mask */
+#define HSTIDR_PEP_6_Pos              14                                             /**< (HSTIDR) Pipe 6 Interrupt Disable Position */
+#define HSTIDR_PEP_6                  (_U_(0x1) << HSTIDR_PEP_6_Pos)           /**< (HSTIDR) Pipe 6 Interrupt Disable Mask */
+#define HSTIDR_PEP_7_Pos              15                                             /**< (HSTIDR) Pipe 7 Interrupt Disable Position */
+#define HSTIDR_PEP_7                  (_U_(0x1) << HSTIDR_PEP_7_Pos)           /**< (HSTIDR) Pipe 7 Interrupt Disable Mask */
+#define HSTIDR_PEP_8_Pos              16                                             /**< (HSTIDR) Pipe 8 Interrupt Disable Position */
+#define HSTIDR_PEP_8                  (_U_(0x1) << HSTIDR_PEP_8_Pos)           /**< (HSTIDR) Pipe 8 Interrupt Disable Mask */
+#define HSTIDR_PEP_9_Pos              17                                             /**< (HSTIDR) Pipe 9 Interrupt Disable Position */
+#define HSTIDR_PEP_9                  (_U_(0x1) << HSTIDR_PEP_9_Pos)           /**< (HSTIDR) Pipe 9 Interrupt Disable Mask */
+#define HSTIDR_DMA_0_Pos              25                                             /**< (HSTIDR) DMA Channel 0 Interrupt Disable Position */
+#define HSTIDR_DMA_0                  (_U_(0x1) << HSTIDR_DMA_0_Pos)           /**< (HSTIDR) DMA Channel 0 Interrupt Disable Mask */
+#define HSTIDR_DMA_1_Pos              26                                             /**< (HSTIDR) DMA Channel 1 Interrupt Disable Position */
+#define HSTIDR_DMA_1                  (_U_(0x1) << HSTIDR_DMA_1_Pos)           /**< (HSTIDR) DMA Channel 1 Interrupt Disable Mask */
+#define HSTIDR_DMA_2_Pos              27                                             /**< (HSTIDR) DMA Channel 2 Interrupt Disable Position */
+#define HSTIDR_DMA_2                  (_U_(0x1) << HSTIDR_DMA_2_Pos)           /**< (HSTIDR) DMA Channel 2 Interrupt Disable Mask */
+#define HSTIDR_DMA_3_Pos              28                                             /**< (HSTIDR) DMA Channel 3 Interrupt Disable Position */
+#define HSTIDR_DMA_3                  (_U_(0x1) << HSTIDR_DMA_3_Pos)           /**< (HSTIDR) DMA Channel 3 Interrupt Disable Mask */
+#define HSTIDR_DMA_4_Pos              29                                             /**< (HSTIDR) DMA Channel 4 Interrupt Disable Position */
+#define HSTIDR_DMA_4                  (_U_(0x1) << HSTIDR_DMA_4_Pos)           /**< (HSTIDR) DMA Channel 4 Interrupt Disable Mask */
+#define HSTIDR_DMA_5_Pos              30                                             /**< (HSTIDR) DMA Channel 5 Interrupt Disable Position */
+#define HSTIDR_DMA_5                  (_U_(0x1) << HSTIDR_DMA_5_Pos)           /**< (HSTIDR) DMA Channel 5 Interrupt Disable Mask */
+#define HSTIDR_DMA_6_Pos              31                                             /**< (HSTIDR) DMA Channel 6 Interrupt Disable Position */
+#define HSTIDR_DMA_6                  (_U_(0x1) << HSTIDR_DMA_6_Pos)           /**< (HSTIDR) DMA Channel 6 Interrupt Disable Mask */
+#define HSTIDR_Msk                    _U_(0xFE03FF7F)                                /**< (HSTIDR) Register Mask  */
+
+#define HSTIDR_PEP__Pos               8                                              /**< (HSTIDR Position) Pipe x Interrupt Disable */
+#define HSTIDR_PEP_                   (_U_(0x3FF) << HSTIDR_PEP__Pos)          /**< (HSTIDR Mask) PEP_ */
+#define HSTIDR_DMA__Pos               25                                             /**< (HSTIDR Position) DMA Channel 6 Interrupt Disable */
+#define HSTIDR_DMA_                   (_U_(0x7F) << HSTIDR_DMA__Pos)           /**< (HSTIDR Mask) DMA_ */
+
+/* -------- HSTIER : (USBHS Offset: 0x418) (/W 32) Host Global Interrupt Enable Register -------- */
+
+#define HSTIER_OFFSET                 (0x418)                                       /**<  (HSTIER) Host Global Interrupt Enable Register  Offset */
+
+#define HSTIER_DCONNIES_Pos           0                                              /**< (HSTIER) Device Connection Interrupt Enable Position */
+#define HSTIER_DCONNIES               (_U_(0x1) << HSTIER_DCONNIES_Pos)        /**< (HSTIER) Device Connection Interrupt Enable Mask */
+#define HSTIER_DDISCIES_Pos           1                                              /**< (HSTIER) Device Disconnection Interrupt Enable Position */
+#define HSTIER_DDISCIES               (_U_(0x1) << HSTIER_DDISCIES_Pos)        /**< (HSTIER) Device Disconnection Interrupt Enable Mask */
+#define HSTIER_RSTIES_Pos             2                                              /**< (HSTIER) USB Reset Sent Interrupt Enable Position */
+#define HSTIER_RSTIES                 (_U_(0x1) << HSTIER_RSTIES_Pos)          /**< (HSTIER) USB Reset Sent Interrupt Enable Mask */
+#define HSTIER_RSMEDIES_Pos           3                                              /**< (HSTIER) Downstream Resume Sent Interrupt Enable Position */
+#define HSTIER_RSMEDIES               (_U_(0x1) << HSTIER_RSMEDIES_Pos)        /**< (HSTIER) Downstream Resume Sent Interrupt Enable Mask */
+#define HSTIER_RXRSMIES_Pos           4                                              /**< (HSTIER) Upstream Resume Received Interrupt Enable Position */
+#define HSTIER_RXRSMIES               (_U_(0x1) << HSTIER_RXRSMIES_Pos)        /**< (HSTIER) Upstream Resume Received Interrupt Enable Mask */
+#define HSTIER_HSOFIES_Pos            5                                              /**< (HSTIER) Host Start of Frame Interrupt Enable Position */
+#define HSTIER_HSOFIES                (_U_(0x1) << HSTIER_HSOFIES_Pos)         /**< (HSTIER) Host Start of Frame Interrupt Enable Mask */
+#define HSTIER_HWUPIES_Pos            6                                              /**< (HSTIER) Host Wake-Up Interrupt Enable Position */
+#define HSTIER_HWUPIES                (_U_(0x1) << HSTIER_HWUPIES_Pos)         /**< (HSTIER) Host Wake-Up Interrupt Enable Mask */
+#define HSTIER_PEP_0_Pos              8                                              /**< (HSTIER) Pipe 0 Interrupt Enable Position */
+#define HSTIER_PEP_0                  (_U_(0x1) << HSTIER_PEP_0_Pos)           /**< (HSTIER) Pipe 0 Interrupt Enable Mask */
+#define HSTIER_PEP_1_Pos              9                                              /**< (HSTIER) Pipe 1 Interrupt Enable Position */
+#define HSTIER_PEP_1                  (_U_(0x1) << HSTIER_PEP_1_Pos)           /**< (HSTIER) Pipe 1 Interrupt Enable Mask */
+#define HSTIER_PEP_2_Pos              10                                             /**< (HSTIER) Pipe 2 Interrupt Enable Position */
+#define HSTIER_PEP_2                  (_U_(0x1) << HSTIER_PEP_2_Pos)           /**< (HSTIER) Pipe 2 Interrupt Enable Mask */
+#define HSTIER_PEP_3_Pos              11                                             /**< (HSTIER) Pipe 3 Interrupt Enable Position */
+#define HSTIER_PEP_3                  (_U_(0x1) << HSTIER_PEP_3_Pos)           /**< (HSTIER) Pipe 3 Interrupt Enable Mask */
+#define HSTIER_PEP_4_Pos              12                                             /**< (HSTIER) Pipe 4 Interrupt Enable Position */
+#define HSTIER_PEP_4                  (_U_(0x1) << HSTIER_PEP_4_Pos)           /**< (HSTIER) Pipe 4 Interrupt Enable Mask */
+#define HSTIER_PEP_5_Pos              13                                             /**< (HSTIER) Pipe 5 Interrupt Enable Position */
+#define HSTIER_PEP_5                  (_U_(0x1) << HSTIER_PEP_5_Pos)           /**< (HSTIER) Pipe 5 Interrupt Enable Mask */
+#define HSTIER_PEP_6_Pos              14                                             /**< (HSTIER) Pipe 6 Interrupt Enable Position */
+#define HSTIER_PEP_6                  (_U_(0x1) << HSTIER_PEP_6_Pos)           /**< (HSTIER) Pipe 6 Interrupt Enable Mask */
+#define HSTIER_PEP_7_Pos              15                                             /**< (HSTIER) Pipe 7 Interrupt Enable Position */
+#define HSTIER_PEP_7                  (_U_(0x1) << HSTIER_PEP_7_Pos)           /**< (HSTIER) Pipe 7 Interrupt Enable Mask */
+#define HSTIER_PEP_8_Pos              16                                             /**< (HSTIER) Pipe 8 Interrupt Enable Position */
+#define HSTIER_PEP_8                  (_U_(0x1) << HSTIER_PEP_8_Pos)           /**< (HSTIER) Pipe 8 Interrupt Enable Mask */
+#define HSTIER_PEP_9_Pos              17                                             /**< (HSTIER) Pipe 9 Interrupt Enable Position */
+#define HSTIER_PEP_9                  (_U_(0x1) << HSTIER_PEP_9_Pos)           /**< (HSTIER) Pipe 9 Interrupt Enable Mask */
+#define HSTIER_DMA_0_Pos              25                                             /**< (HSTIER) DMA Channel 0 Interrupt Enable Position */
+#define HSTIER_DMA_0                  (_U_(0x1) << HSTIER_DMA_0_Pos)           /**< (HSTIER) DMA Channel 0 Interrupt Enable Mask */
+#define HSTIER_DMA_1_Pos              26                                             /**< (HSTIER) DMA Channel 1 Interrupt Enable Position */
+#define HSTIER_DMA_1                  (_U_(0x1) << HSTIER_DMA_1_Pos)           /**< (HSTIER) DMA Channel 1 Interrupt Enable Mask */
+#define HSTIER_DMA_2_Pos              27                                             /**< (HSTIER) DMA Channel 2 Interrupt Enable Position */
+#define HSTIER_DMA_2                  (_U_(0x1) << HSTIER_DMA_2_Pos)           /**< (HSTIER) DMA Channel 2 Interrupt Enable Mask */
+#define HSTIER_DMA_3_Pos              28                                             /**< (HSTIER) DMA Channel 3 Interrupt Enable Position */
+#define HSTIER_DMA_3                  (_U_(0x1) << HSTIER_DMA_3_Pos)           /**< (HSTIER) DMA Channel 3 Interrupt Enable Mask */
+#define HSTIER_DMA_4_Pos              29                                             /**< (HSTIER) DMA Channel 4 Interrupt Enable Position */
+#define HSTIER_DMA_4                  (_U_(0x1) << HSTIER_DMA_4_Pos)           /**< (HSTIER) DMA Channel 4 Interrupt Enable Mask */
+#define HSTIER_DMA_5_Pos              30                                             /**< (HSTIER) DMA Channel 5 Interrupt Enable Position */
+#define HSTIER_DMA_5                  (_U_(0x1) << HSTIER_DMA_5_Pos)           /**< (HSTIER) DMA Channel 5 Interrupt Enable Mask */
+#define HSTIER_DMA_6_Pos              31                                             /**< (HSTIER) DMA Channel 6 Interrupt Enable Position */
+#define HSTIER_DMA_6                  (_U_(0x1) << HSTIER_DMA_6_Pos)           /**< (HSTIER) DMA Channel 6 Interrupt Enable Mask */
+#define HSTIER_Msk                    _U_(0xFE03FF7F)                                /**< (HSTIER) Register Mask  */
+
+#define HSTIER_PEP__Pos               8                                              /**< (HSTIER Position) Pipe x Interrupt Enable */
+#define HSTIER_PEP_                   (_U_(0x3FF) << HSTIER_PEP__Pos)          /**< (HSTIER Mask) PEP_ */
+#define HSTIER_DMA__Pos               25                                             /**< (HSTIER Position) DMA Channel 6 Interrupt Enable */
+#define HSTIER_DMA_                   (_U_(0x7F) << HSTIER_DMA__Pos)           /**< (HSTIER Mask) DMA_ */
+
+/* -------- HSTPIP : (USBHS Offset: 0x41c) (R/W 32) Host Pipe Register -------- */
+
+#define HSTPIP_OFFSET                 (0x41C)                                       /**<  (HSTPIP) Host Pipe Register  Offset */
+
+#define HSTPIP_PEN0_Pos               0                                              /**< (HSTPIP) Pipe 0 Enable Position */
+#define HSTPIP_PEN0                   (_U_(0x1) << HSTPIP_PEN0_Pos)            /**< (HSTPIP) Pipe 0 Enable Mask */
+#define HSTPIP_PEN1_Pos               1                                              /**< (HSTPIP) Pipe 1 Enable Position */
+#define HSTPIP_PEN1                   (_U_(0x1) << HSTPIP_PEN1_Pos)            /**< (HSTPIP) Pipe 1 Enable Mask */
+#define HSTPIP_PEN2_Pos               2                                              /**< (HSTPIP) Pipe 2 Enable Position */
+#define HSTPIP_PEN2                   (_U_(0x1) << HSTPIP_PEN2_Pos)            /**< (HSTPIP) Pipe 2 Enable Mask */
+#define HSTPIP_PEN3_Pos               3                                              /**< (HSTPIP) Pipe 3 Enable Position */
+#define HSTPIP_PEN3                   (_U_(0x1) << HSTPIP_PEN3_Pos)            /**< (HSTPIP) Pipe 3 Enable Mask */
+#define HSTPIP_PEN4_Pos               4                                              /**< (HSTPIP) Pipe 4 Enable Position */
+#define HSTPIP_PEN4                   (_U_(0x1) << HSTPIP_PEN4_Pos)            /**< (HSTPIP) Pipe 4 Enable Mask */
+#define HSTPIP_PEN5_Pos               5                                              /**< (HSTPIP) Pipe 5 Enable Position */
+#define HSTPIP_PEN5                   (_U_(0x1) << HSTPIP_PEN5_Pos)            /**< (HSTPIP) Pipe 5 Enable Mask */
+#define HSTPIP_PEN6_Pos               6                                              /**< (HSTPIP) Pipe 6 Enable Position */
+#define HSTPIP_PEN6                   (_U_(0x1) << HSTPIP_PEN6_Pos)            /**< (HSTPIP) Pipe 6 Enable Mask */
+#define HSTPIP_PEN7_Pos               7                                              /**< (HSTPIP) Pipe 7 Enable Position */
+#define HSTPIP_PEN7                   (_U_(0x1) << HSTPIP_PEN7_Pos)            /**< (HSTPIP) Pipe 7 Enable Mask */
+#define HSTPIP_PEN8_Pos               8                                              /**< (HSTPIP) Pipe 8 Enable Position */
+#define HSTPIP_PEN8                   (_U_(0x1) << HSTPIP_PEN8_Pos)            /**< (HSTPIP) Pipe 8 Enable Mask */
+#define HSTPIP_PRST0_Pos              16                                             /**< (HSTPIP) Pipe 0 Reset Position */
+#define HSTPIP_PRST0                  (_U_(0x1) << HSTPIP_PRST0_Pos)           /**< (HSTPIP) Pipe 0 Reset Mask */
+#define HSTPIP_PRST1_Pos              17                                             /**< (HSTPIP) Pipe 1 Reset Position */
+#define HSTPIP_PRST1                  (_U_(0x1) << HSTPIP_PRST1_Pos)           /**< (HSTPIP) Pipe 1 Reset Mask */
+#define HSTPIP_PRST2_Pos              18                                             /**< (HSTPIP) Pipe 2 Reset Position */
+#define HSTPIP_PRST2                  (_U_(0x1) << HSTPIP_PRST2_Pos)           /**< (HSTPIP) Pipe 2 Reset Mask */
+#define HSTPIP_PRST3_Pos              19                                             /**< (HSTPIP) Pipe 3 Reset Position */
+#define HSTPIP_PRST3                  (_U_(0x1) << HSTPIP_PRST3_Pos)           /**< (HSTPIP) Pipe 3 Reset Mask */
+#define HSTPIP_PRST4_Pos              20                                             /**< (HSTPIP) Pipe 4 Reset Position */
+#define HSTPIP_PRST4                  (_U_(0x1) << HSTPIP_PRST4_Pos)           /**< (HSTPIP) Pipe 4 Reset Mask */
+#define HSTPIP_PRST5_Pos              21                                             /**< (HSTPIP) Pipe 5 Reset Position */
+#define HSTPIP_PRST5                  (_U_(0x1) << HSTPIP_PRST5_Pos)           /**< (HSTPIP) Pipe 5 Reset Mask */
+#define HSTPIP_PRST6_Pos              22                                             /**< (HSTPIP) Pipe 6 Reset Position */
+#define HSTPIP_PRST6                  (_U_(0x1) << HSTPIP_PRST6_Pos)           /**< (HSTPIP) Pipe 6 Reset Mask */
+#define HSTPIP_PRST7_Pos              23                                             /**< (HSTPIP) Pipe 7 Reset Position */
+#define HSTPIP_PRST7                  (_U_(0x1) << HSTPIP_PRST7_Pos)           /**< (HSTPIP) Pipe 7 Reset Mask */
+#define HSTPIP_PRST8_Pos              24                                             /**< (HSTPIP) Pipe 8 Reset Position */
+#define HSTPIP_PRST8                  (_U_(0x1) << HSTPIP_PRST8_Pos)           /**< (HSTPIP) Pipe 8 Reset Mask */
+#define HSTPIP_Msk                    _U_(0x1FF01FF)                                 /**< (HSTPIP) Register Mask  */
+
+#define HSTPIP_PEN_Pos                0                                              /**< (HSTPIP Position) Pipe x Enable */
+#define HSTPIP_PEN                    (_U_(0x1FF) << HSTPIP_PEN_Pos)           /**< (HSTPIP Mask) PEN */
+#define HSTPIP_PRST_Pos               16                                             /**< (HSTPIP Position) Pipe 8 Reset */
+#define HSTPIP_PRST                   (_U_(0x1FF) << HSTPIP_PRST_Pos)          /**< (HSTPIP Mask) PRST */
+
+/* -------- HSTFNUM : (USBHS Offset: 0x420) (R/W 32) Host Frame Number Register -------- */
+
+#define HSTFNUM_OFFSET                (0x420)                                       /**<  (HSTFNUM) Host Frame Number Register  Offset */
+
+#define HSTFNUM_MFNUM_Pos             0                                              /**< (HSTFNUM) Micro Frame Number Position */
+#define HSTFNUM_MFNUM                 (_U_(0x7) << HSTFNUM_MFNUM_Pos)          /**< (HSTFNUM) Micro Frame Number Mask */
+#define HSTFNUM_FNUM_Pos              3                                              /**< (HSTFNUM) Frame Number Position */
+#define HSTFNUM_FNUM                  (_U_(0x7FF) << HSTFNUM_FNUM_Pos)         /**< (HSTFNUM) Frame Number Mask */
+#define HSTFNUM_FLENHIGH_Pos          16                                             /**< (HSTFNUM) Frame Length Position */
+#define HSTFNUM_FLENHIGH              (_U_(0xFF) << HSTFNUM_FLENHIGH_Pos)      /**< (HSTFNUM) Frame Length Mask */
+#define HSTFNUM_Msk                   _U_(0xFF3FFF)                                  /**< (HSTFNUM) Register Mask  */
+
+
+/* -------- HSTADDR1 : (USBHS Offset: 0x424) (R/W 32) Host Address 1 Register -------- */
+
+#define HSTADDR1_OFFSET               (0x424)                                       /**<  (HSTADDR1) Host Address 1 Register  Offset */
+
+#define HSTADDR1_HSTADDRP0_Pos        0                                              /**< (HSTADDR1) USB Host Address Position */
+#define HSTADDR1_HSTADDRP0            (_U_(0x7F) << HSTADDR1_HSTADDRP0_Pos)    /**< (HSTADDR1) USB Host Address Mask */
+#define HSTADDR1_HSTADDRP1_Pos        8                                              /**< (HSTADDR1) USB Host Address Position */
+#define HSTADDR1_HSTADDRP1            (_U_(0x7F) << HSTADDR1_HSTADDRP1_Pos)    /**< (HSTADDR1) USB Host Address Mask */
+#define HSTADDR1_HSTADDRP2_Pos        16                                             /**< (HSTADDR1) USB Host Address Position */
+#define HSTADDR1_HSTADDRP2            (_U_(0x7F) << HSTADDR1_HSTADDRP2_Pos)    /**< (HSTADDR1) USB Host Address Mask */
+#define HSTADDR1_HSTADDRP3_Pos        24                                             /**< (HSTADDR1) USB Host Address Position */
+#define HSTADDR1_HSTADDRP3            (_U_(0x7F) << HSTADDR1_HSTADDRP3_Pos)    /**< (HSTADDR1) USB Host Address Mask */
+#define HSTADDR1_Msk                  _U_(0x7F7F7F7F)                                /**< (HSTADDR1) Register Mask  */
+
+
+/* -------- HSTADDR2 : (USBHS Offset: 0x428) (R/W 32) Host Address 2 Register -------- */
+
+#define HSTADDR2_OFFSET               (0x428)                                       /**<  (HSTADDR2) Host Address 2 Register  Offset */
+
+#define HSTADDR2_HSTADDRP4_Pos        0                                              /**< (HSTADDR2) USB Host Address Position */
+#define HSTADDR2_HSTADDRP4            (_U_(0x7F) << HSTADDR2_HSTADDRP4_Pos)    /**< (HSTADDR2) USB Host Address Mask */
+#define HSTADDR2_HSTADDRP5_Pos        8                                              /**< (HSTADDR2) USB Host Address Position */
+#define HSTADDR2_HSTADDRP5            (_U_(0x7F) << HSTADDR2_HSTADDRP5_Pos)    /**< (HSTADDR2) USB Host Address Mask */
+#define HSTADDR2_HSTADDRP6_Pos        16                                             /**< (HSTADDR2) USB Host Address Position */
+#define HSTADDR2_HSTADDRP6            (_U_(0x7F) << HSTADDR2_HSTADDRP6_Pos)    /**< (HSTADDR2) USB Host Address Mask */
+#define HSTADDR2_HSTADDRP7_Pos        24                                             /**< (HSTADDR2) USB Host Address Position */
+#define HSTADDR2_HSTADDRP7            (_U_(0x7F) << HSTADDR2_HSTADDRP7_Pos)    /**< (HSTADDR2) USB Host Address Mask */
+#define HSTADDR2_Msk                  _U_(0x7F7F7F7F)                                /**< (HSTADDR2) Register Mask  */
+
+
+/* -------- HSTADDR3 : (USBHS Offset: 0x42c) (R/W 32) Host Address 3 Register -------- */
+
+#define HSTADDR3_OFFSET               (0x42C)                                       /**<  (HSTADDR3) Host Address 3 Register  Offset */
+
+#define HSTADDR3_HSTADDRP8_Pos        0                                              /**< (HSTADDR3) USB Host Address Position */
+#define HSTADDR3_HSTADDRP8            (_U_(0x7F) << HSTADDR3_HSTADDRP8_Pos)    /**< (HSTADDR3) USB Host Address Mask */
+#define HSTADDR3_HSTADDRP9_Pos        8                                              /**< (HSTADDR3) USB Host Address Position */
+#define HSTADDR3_HSTADDRP9            (_U_(0x7F) << HSTADDR3_HSTADDRP9_Pos)    /**< (HSTADDR3) USB Host Address Mask */
+#define HSTADDR3_Msk                  _U_(0x7F7F)                                    /**< (HSTADDR3) Register Mask  */
+
+
+/* -------- HSTPIPCFG : (USBHS Offset: 0x500) (R/W 32) Host Pipe Configuration Register -------- */
+
+#define HSTPIPCFG_OFFSET              (0x500)                                       /**<  (HSTPIPCFG) Host Pipe Configuration Register  Offset */
+
+#define HSTPIPCFG_ALLOC_Pos           1                                              /**< (HSTPIPCFG) Pipe Memory Allocate Position */
+#define HSTPIPCFG_ALLOC               (_U_(0x1) << HSTPIPCFG_ALLOC_Pos)        /**< (HSTPIPCFG) Pipe Memory Allocate Mask */
+#define HSTPIPCFG_PBK_Pos             2                                              /**< (HSTPIPCFG) Pipe Banks Position */
+#define HSTPIPCFG_PBK                 (_U_(0x3) << HSTPIPCFG_PBK_Pos)          /**< (HSTPIPCFG) Pipe Banks Mask */
+#define   HSTPIPCFG_PBK_1_BANK_Val    _U_(0x0)                                       /**< (HSTPIPCFG) Single-bank pipe  */
+#define   HSTPIPCFG_PBK_2_BANK_Val    _U_(0x1)                                       /**< (HSTPIPCFG) Double-bank pipe  */
+#define   HSTPIPCFG_PBK_3_BANK_Val    _U_(0x2)                                       /**< (HSTPIPCFG) Triple-bank pipe  */
+#define HSTPIPCFG_PBK_1_BANK          (HSTPIPCFG_PBK_1_BANK_Val << HSTPIPCFG_PBK_Pos)  /**< (HSTPIPCFG) Single-bank pipe Position  */
+#define HSTPIPCFG_PBK_2_BANK          (HSTPIPCFG_PBK_2_BANK_Val << HSTPIPCFG_PBK_Pos)  /**< (HSTPIPCFG) Double-bank pipe Position  */
+#define HSTPIPCFG_PBK_3_BANK          (HSTPIPCFG_PBK_3_BANK_Val << HSTPIPCFG_PBK_Pos)  /**< (HSTPIPCFG) Triple-bank pipe Position  */
+#define HSTPIPCFG_PSIZE_Pos           4                                              /**< (HSTPIPCFG) Pipe Size Position */
+#define HSTPIPCFG_PSIZE               (_U_(0x7) << HSTPIPCFG_PSIZE_Pos)        /**< (HSTPIPCFG) Pipe Size Mask */
+#define   HSTPIPCFG_PSIZE_8_BYTE_Val  _U_(0x0)                                       /**< (HSTPIPCFG) 8 bytes  */
+#define   HSTPIPCFG_PSIZE_16_BYTE_Val _U_(0x1)                                       /**< (HSTPIPCFG) 16 bytes  */
+#define   HSTPIPCFG_PSIZE_32_BYTE_Val _U_(0x2)                                       /**< (HSTPIPCFG) 32 bytes  */
+#define   HSTPIPCFG_PSIZE_64_BYTE_Val _U_(0x3)                                       /**< (HSTPIPCFG) 64 bytes  */
+#define   HSTPIPCFG_PSIZE_128_BYTE_Val _U_(0x4)                                       /**< (HSTPIPCFG) 128 bytes  */
+#define   HSTPIPCFG_PSIZE_256_BYTE_Val _U_(0x5)                                       /**< (HSTPIPCFG) 256 bytes  */
+#define   HSTPIPCFG_PSIZE_512_BYTE_Val _U_(0x6)                                       /**< (HSTPIPCFG) 512 bytes  */
+#define   HSTPIPCFG_PSIZE_1024_BYTE_Val _U_(0x7)                                       /**< (HSTPIPCFG) 1024 bytes  */
+#define HSTPIPCFG_PSIZE_8_BYTE        (HSTPIPCFG_PSIZE_8_BYTE_Val << HSTPIPCFG_PSIZE_Pos)  /**< (HSTPIPCFG) 8 bytes Position  */
+#define HSTPIPCFG_PSIZE_16_BYTE       (HSTPIPCFG_PSIZE_16_BYTE_Val << HSTPIPCFG_PSIZE_Pos)  /**< (HSTPIPCFG) 16 bytes Position  */
+#define HSTPIPCFG_PSIZE_32_BYTE       (HSTPIPCFG_PSIZE_32_BYTE_Val << HSTPIPCFG_PSIZE_Pos)  /**< (HSTPIPCFG) 32 bytes Position  */
+#define HSTPIPCFG_PSIZE_64_BYTE       (HSTPIPCFG_PSIZE_64_BYTE_Val << HSTPIPCFG_PSIZE_Pos)  /**< (HSTPIPCFG) 64 bytes Position  */
+#define HSTPIPCFG_PSIZE_128_BYTE      (HSTPIPCFG_PSIZE_128_BYTE_Val << HSTPIPCFG_PSIZE_Pos)  /**< (HSTPIPCFG) 128 bytes Position  */
+#define HSTPIPCFG_PSIZE_256_BYTE      (HSTPIPCFG_PSIZE_256_BYTE_Val << HSTPIPCFG_PSIZE_Pos)  /**< (HSTPIPCFG) 256 bytes Position  */
+#define HSTPIPCFG_PSIZE_512_BYTE      (HSTPIPCFG_PSIZE_512_BYTE_Val << HSTPIPCFG_PSIZE_Pos)  /**< (HSTPIPCFG) 512 bytes Position  */
+#define HSTPIPCFG_PSIZE_1024_BYTE     (HSTPIPCFG_PSIZE_1024_BYTE_Val << HSTPIPCFG_PSIZE_Pos)  /**< (HSTPIPCFG) 1024 bytes Position  */
+#define HSTPIPCFG_PTOKEN_Pos          8                                              /**< (HSTPIPCFG) Pipe Token Position */
+#define HSTPIPCFG_PTOKEN              (_U_(0x3) << HSTPIPCFG_PTOKEN_Pos)       /**< (HSTPIPCFG) Pipe Token Mask */
+#define   HSTPIPCFG_PTOKEN_SETUP_Val  _U_(0x0)                                       /**< (HSTPIPCFG) SETUP  */
+#define   HSTPIPCFG_PTOKEN_IN_Val     _U_(0x1)                                       /**< (HSTPIPCFG) IN  */
+#define   HSTPIPCFG_PTOKEN_OUT_Val    _U_(0x2)                                       /**< (HSTPIPCFG) OUT  */
+#define HSTPIPCFG_PTOKEN_SETUP        (HSTPIPCFG_PTOKEN_SETUP_Val << HSTPIPCFG_PTOKEN_Pos)  /**< (HSTPIPCFG) SETUP Position  */
+#define HSTPIPCFG_PTOKEN_IN           (HSTPIPCFG_PTOKEN_IN_Val << HSTPIPCFG_PTOKEN_Pos)  /**< (HSTPIPCFG) IN Position  */
+#define HSTPIPCFG_PTOKEN_OUT          (HSTPIPCFG_PTOKEN_OUT_Val << HSTPIPCFG_PTOKEN_Pos)  /**< (HSTPIPCFG) OUT Position  */
+#define HSTPIPCFG_AUTOSW_Pos          10                                             /**< (HSTPIPCFG) Automatic Switch Position */
+#define HSTPIPCFG_AUTOSW              (_U_(0x1) << HSTPIPCFG_AUTOSW_Pos)       /**< (HSTPIPCFG) Automatic Switch Mask */
+#define HSTPIPCFG_PTYPE_Pos           12                                             /**< (HSTPIPCFG) Pipe Type Position */
+#define HSTPIPCFG_PTYPE               (_U_(0x3) << HSTPIPCFG_PTYPE_Pos)        /**< (HSTPIPCFG) Pipe Type Mask */
+#define   HSTPIPCFG_PTYPE_CTRL_Val    _U_(0x0)                                       /**< (HSTPIPCFG) Control  */
+#define   HSTPIPCFG_PTYPE_ISO_Val     _U_(0x1)                                       /**< (HSTPIPCFG) Isochronous  */
+#define   HSTPIPCFG_PTYPE_BLK_Val     _U_(0x2)                                       /**< (HSTPIPCFG) Bulk  */
+#define   HSTPIPCFG_PTYPE_INTRPT_Val  _U_(0x3)                                       /**< (HSTPIPCFG) Interrupt  */
+#define HSTPIPCFG_PTYPE_CTRL          (HSTPIPCFG_PTYPE_CTRL_Val << HSTPIPCFG_PTYPE_Pos)  /**< (HSTPIPCFG) Control Position  */
+#define HSTPIPCFG_PTYPE_ISO           (HSTPIPCFG_PTYPE_ISO_Val << HSTPIPCFG_PTYPE_Pos)  /**< (HSTPIPCFG) Isochronous Position  */
+#define HSTPIPCFG_PTYPE_BLK           (HSTPIPCFG_PTYPE_BLK_Val << HSTPIPCFG_PTYPE_Pos)  /**< (HSTPIPCFG) Bulk Position  */
+#define HSTPIPCFG_PTYPE_INTRPT        (HSTPIPCFG_PTYPE_INTRPT_Val << HSTPIPCFG_PTYPE_Pos)  /**< (HSTPIPCFG) Interrupt Position  */
+#define HSTPIPCFG_PEPNUM_Pos          16                                             /**< (HSTPIPCFG) Pipe Endpoint Number Position */
+#define HSTPIPCFG_PEPNUM              (_U_(0xF) << HSTPIPCFG_PEPNUM_Pos)       /**< (HSTPIPCFG) Pipe Endpoint Number Mask */
+#define HSTPIPCFG_INTFRQ_Pos          24                                             /**< (HSTPIPCFG) Pipe Interrupt Request Frequency Position */
+#define HSTPIPCFG_INTFRQ              (_U_(0xFF) << HSTPIPCFG_INTFRQ_Pos)      /**< (HSTPIPCFG) Pipe Interrupt Request Frequency Mask */
+#define HSTPIPCFG_Msk                 _U_(0xFF0F377E)                                /**< (HSTPIPCFG) Register Mask  */
+
+/* CTRL_BULK mode */
+#define HSTPIPCFG_CTRL_BULK_PINGEN_Pos 20                                             /**< (HSTPIPCFG) Ping Enable Position */
+#define HSTPIPCFG_CTRL_BULK_PINGEN     (_U_(0x1) << HSTPIPCFG_CTRL_BULK_PINGEN_Pos)  /**< (HSTPIPCFG) Ping Enable Mask */
+#define HSTPIPCFG_CTRL_BULK_BINTERVAL_Pos 24                                             /**< (HSTPIPCFG) bInterval Parameter for the Bulk-Out/Ping Transaction Position */
+#define HSTPIPCFG_CTRL_BULK_BINTERVAL     (_U_(0xFF) << HSTPIPCFG_CTRL_BULK_BINTERVAL_Pos)  /**< (HSTPIPCFG) bInterval Parameter for the Bulk-Out/Ping Transaction Mask */
+#define HSTPIPCFG_CTRL_BULK_Msk       _U_(0xFF100000)                                /**< (HSTPIPCFG_CTRL_BULK) Register Mask  */
+
+
+/* -------- HSTPIPISR : (USBHS Offset: 0x530) (R/ 32) Host Pipe Status Register -------- */
+
+#define HSTPIPISR_OFFSET              (0x530)                                       /**<  (HSTPIPISR) Host Pipe Status Register  Offset */
+
+#define HSTPIPISR_RXINI_Pos           0                                              /**< (HSTPIPISR) Received IN Data Interrupt Position */
+#define HSTPIPISR_RXINI               (_U_(0x1) << HSTPIPISR_RXINI_Pos)        /**< (HSTPIPISR) Received IN Data Interrupt Mask */
+#define HSTPIPISR_TXOUTI_Pos          1                                              /**< (HSTPIPISR) Transmitted OUT Data Interrupt Position */
+#define HSTPIPISR_TXOUTI              (_U_(0x1) << HSTPIPISR_TXOUTI_Pos)       /**< (HSTPIPISR) Transmitted OUT Data Interrupt Mask */
+#define HSTPIPISR_PERRI_Pos           3                                              /**< (HSTPIPISR) Pipe Error Interrupt Position */
+#define HSTPIPISR_PERRI               (_U_(0x1) << HSTPIPISR_PERRI_Pos)        /**< (HSTPIPISR) Pipe Error Interrupt Mask */
+#define HSTPIPISR_NAKEDI_Pos          4                                              /**< (HSTPIPISR) NAKed Interrupt Position */
+#define HSTPIPISR_NAKEDI              (_U_(0x1) << HSTPIPISR_NAKEDI_Pos)       /**< (HSTPIPISR) NAKed Interrupt Mask */
+#define HSTPIPISR_OVERFI_Pos          5                                              /**< (HSTPIPISR) Overflow Interrupt Position */
+#define HSTPIPISR_OVERFI              (_U_(0x1) << HSTPIPISR_OVERFI_Pos)       /**< (HSTPIPISR) Overflow Interrupt Mask */
+#define HSTPIPISR_SHORTPACKETI_Pos    7                                              /**< (HSTPIPISR) Short Packet Interrupt Position */
+#define HSTPIPISR_SHORTPACKETI        (_U_(0x1) << HSTPIPISR_SHORTPACKETI_Pos)  /**< (HSTPIPISR) Short Packet Interrupt Mask */
+#define HSTPIPISR_DTSEQ_Pos           8                                              /**< (HSTPIPISR) Data Toggle Sequence Position */
+#define HSTPIPISR_DTSEQ               (_U_(0x3) << HSTPIPISR_DTSEQ_Pos)        /**< (HSTPIPISR) Data Toggle Sequence Mask */
+#define   HSTPIPISR_DTSEQ_DATA0_Val   _U_(0x0)                                       /**< (HSTPIPISR) Data0 toggle sequence  */
+#define   HSTPIPISR_DTSEQ_DATA1_Val   _U_(0x1)                                       /**< (HSTPIPISR) Data1 toggle sequence  */
+#define HSTPIPISR_DTSEQ_DATA0         (HSTPIPISR_DTSEQ_DATA0_Val << HSTPIPISR_DTSEQ_Pos)  /**< (HSTPIPISR) Data0 toggle sequence Position  */
+#define HSTPIPISR_DTSEQ_DATA1         (HSTPIPISR_DTSEQ_DATA1_Val << HSTPIPISR_DTSEQ_Pos)  /**< (HSTPIPISR) Data1 toggle sequence Position  */
+#define HSTPIPISR_NBUSYBK_Pos         12                                             /**< (HSTPIPISR) Number of Busy Banks Position */
+#define HSTPIPISR_NBUSYBK             (_U_(0x3) << HSTPIPISR_NBUSYBK_Pos)      /**< (HSTPIPISR) Number of Busy Banks Mask */
+#define   HSTPIPISR_NBUSYBK_0_BUSY_Val _U_(0x0)                                       /**< (HSTPIPISR) 0 busy bank (all banks free)  */
+#define   HSTPIPISR_NBUSYBK_1_BUSY_Val _U_(0x1)                                       /**< (HSTPIPISR) 1 busy bank  */
+#define   HSTPIPISR_NBUSYBK_2_BUSY_Val _U_(0x2)                                       /**< (HSTPIPISR) 2 busy banks  */
+#define   HSTPIPISR_NBUSYBK_3_BUSY_Val _U_(0x3)                                       /**< (HSTPIPISR) 3 busy banks  */
+#define HSTPIPISR_NBUSYBK_0_BUSY      (HSTPIPISR_NBUSYBK_0_BUSY_Val << HSTPIPISR_NBUSYBK_Pos)  /**< (HSTPIPISR) 0 busy bank (all banks free) Position  */
+#define HSTPIPISR_NBUSYBK_1_BUSY      (HSTPIPISR_NBUSYBK_1_BUSY_Val << HSTPIPISR_NBUSYBK_Pos)  /**< (HSTPIPISR) 1 busy bank Position  */
+#define HSTPIPISR_NBUSYBK_2_BUSY      (HSTPIPISR_NBUSYBK_2_BUSY_Val << HSTPIPISR_NBUSYBK_Pos)  /**< (HSTPIPISR) 2 busy banks Position  */
+#define HSTPIPISR_NBUSYBK_3_BUSY      (HSTPIPISR_NBUSYBK_3_BUSY_Val << HSTPIPISR_NBUSYBK_Pos)  /**< (HSTPIPISR) 3 busy banks Position  */
+#define HSTPIPISR_CURRBK_Pos          14                                             /**< (HSTPIPISR) Current Bank Position */
+#define HSTPIPISR_CURRBK              (_U_(0x3) << HSTPIPISR_CURRBK_Pos)       /**< (HSTPIPISR) Current Bank Mask */
+#define   HSTPIPISR_CURRBK_BANK0_Val  _U_(0x0)                                       /**< (HSTPIPISR) Current bank is bank0  */
+#define   HSTPIPISR_CURRBK_BANK1_Val  _U_(0x1)                                       /**< (HSTPIPISR) Current bank is bank1  */
+#define   HSTPIPISR_CURRBK_BANK2_Val  _U_(0x2)                                       /**< (HSTPIPISR) Current bank is bank2  */
+#define HSTPIPISR_CURRBK_BANK0        (HSTPIPISR_CURRBK_BANK0_Val << HSTPIPISR_CURRBK_Pos)  /**< (HSTPIPISR) Current bank is bank0 Position  */
+#define HSTPIPISR_CURRBK_BANK1        (HSTPIPISR_CURRBK_BANK1_Val << HSTPIPISR_CURRBK_Pos)  /**< (HSTPIPISR) Current bank is bank1 Position  */
+#define HSTPIPISR_CURRBK_BANK2        (HSTPIPISR_CURRBK_BANK2_Val << HSTPIPISR_CURRBK_Pos)  /**< (HSTPIPISR) Current bank is bank2 Position  */
+#define HSTPIPISR_RWALL_Pos           16                                             /**< (HSTPIPISR) Read/Write Allowed Position */
+#define HSTPIPISR_RWALL               (_U_(0x1) << HSTPIPISR_RWALL_Pos)        /**< (HSTPIPISR) Read/Write Allowed Mask */
+#define HSTPIPISR_CFGOK_Pos           18                                             /**< (HSTPIPISR) Configuration OK Status Position */
+#define HSTPIPISR_CFGOK               (_U_(0x1) << HSTPIPISR_CFGOK_Pos)        /**< (HSTPIPISR) Configuration OK Status Mask */
+#define HSTPIPISR_PBYCT_Pos           20                                             /**< (HSTPIPISR) Pipe Byte Count Position */
+#define HSTPIPISR_PBYCT               (_U_(0x7FF) << HSTPIPISR_PBYCT_Pos)      /**< (HSTPIPISR) Pipe Byte Count Mask */
+#define HSTPIPISR_Msk                 _U_(0x7FF5F3BB)                                /**< (HSTPIPISR) Register Mask  */
+
+/* CTRL mode */
+#define HSTPIPISR_CTRL_TXSTPI_Pos     2                                              /**< (HSTPIPISR) Transmitted SETUP Interrupt Position */
+#define HSTPIPISR_CTRL_TXSTPI         (_U_(0x1) << HSTPIPISR_CTRL_TXSTPI_Pos)  /**< (HSTPIPISR) Transmitted SETUP Interrupt Mask */
+#define HSTPIPISR_CTRL_RXSTALLDI_Pos  6                                              /**< (HSTPIPISR) Received STALLed Interrupt Position */
+#define HSTPIPISR_CTRL_RXSTALLDI      (_U_(0x1) << HSTPIPISR_CTRL_RXSTALLDI_Pos)  /**< (HSTPIPISR) Received STALLed Interrupt Mask */
+#define HSTPIPISR_CTRL_Msk            _U_(0x44)                                      /**< (HSTPIPISR_CTRL) Register Mask  */
+
+/* ISO mode */
+#define HSTPIPISR_ISO_UNDERFI_Pos     2                                              /**< (HSTPIPISR) Underflow Interrupt Position */
+#define HSTPIPISR_ISO_UNDERFI         (_U_(0x1) << HSTPIPISR_ISO_UNDERFI_Pos)  /**< (HSTPIPISR) Underflow Interrupt Mask */
+#define HSTPIPISR_ISO_CRCERRI_Pos     6                                              /**< (HSTPIPISR) CRC Error Interrupt Position */
+#define HSTPIPISR_ISO_CRCERRI         (_U_(0x1) << HSTPIPISR_ISO_CRCERRI_Pos)  /**< (HSTPIPISR) CRC Error Interrupt Mask */
+#define HSTPIPISR_ISO_Msk             _U_(0x44)                                      /**< (HSTPIPISR_ISO) Register Mask  */
+
+/* BLK mode */
+#define HSTPIPISR_BLK_TXSTPI_Pos      2                                              /**< (HSTPIPISR) Transmitted SETUP Interrupt Position */
+#define HSTPIPISR_BLK_TXSTPI          (_U_(0x1) << HSTPIPISR_BLK_TXSTPI_Pos)   /**< (HSTPIPISR) Transmitted SETUP Interrupt Mask */
+#define HSTPIPISR_BLK_RXSTALLDI_Pos   6                                              /**< (HSTPIPISR) Received STALLed Interrupt Position */
+#define HSTPIPISR_BLK_RXSTALLDI       (_U_(0x1) << HSTPIPISR_BLK_RXSTALLDI_Pos)  /**< (HSTPIPISR) Received STALLed Interrupt Mask */
+#define HSTPIPISR_BLK_Msk             _U_(0x44)                                      /**< (HSTPIPISR_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define HSTPIPISR_INTRPT_UNDERFI_Pos  2                                              /**< (HSTPIPISR) Underflow Interrupt Position */
+#define HSTPIPISR_INTRPT_UNDERFI      (_U_(0x1) << HSTPIPISR_INTRPT_UNDERFI_Pos)  /**< (HSTPIPISR) Underflow Interrupt Mask */
+#define HSTPIPISR_INTRPT_RXSTALLDI_Pos 6                                              /**< (HSTPIPISR) Received STALLed Interrupt Position */
+#define HSTPIPISR_INTRPT_RXSTALLDI     (_U_(0x1) << HSTPIPISR_INTRPT_RXSTALLDI_Pos)  /**< (HSTPIPISR) Received STALLed Interrupt Mask */
+#define HSTPIPISR_INTRPT_Msk          _U_(0x44)                                      /**< (HSTPIPISR_INTRPT) Register Mask  */
+
+
+/* -------- HSTPIPICR : (USBHS Offset: 0x560) (/W 32) Host Pipe Clear Register -------- */
+
+#define HSTPIPICR_OFFSET              (0x560)                                       /**<  (HSTPIPICR) Host Pipe Clear Register  Offset */
+
+#define HSTPIPICR_RXINIC_Pos          0                                              /**< (HSTPIPICR) Received IN Data Interrupt Clear Position */
+#define HSTPIPICR_RXINIC              (_U_(0x1) << HSTPIPICR_RXINIC_Pos)       /**< (HSTPIPICR) Received IN Data Interrupt Clear Mask */
+#define HSTPIPICR_TXOUTIC_Pos         1                                              /**< (HSTPIPICR) Transmitted OUT Data Interrupt Clear Position */
+#define HSTPIPICR_TXOUTIC             (_U_(0x1) << HSTPIPICR_TXOUTIC_Pos)      /**< (HSTPIPICR) Transmitted OUT Data Interrupt Clear Mask */
+#define HSTPIPICR_NAKEDIC_Pos         4                                              /**< (HSTPIPICR) NAKed Interrupt Clear Position */
+#define HSTPIPICR_NAKEDIC             (_U_(0x1) << HSTPIPICR_NAKEDIC_Pos)      /**< (HSTPIPICR) NAKed Interrupt Clear Mask */
+#define HSTPIPICR_OVERFIC_Pos         5                                              /**< (HSTPIPICR) Overflow Interrupt Clear Position */
+#define HSTPIPICR_OVERFIC             (_U_(0x1) << HSTPIPICR_OVERFIC_Pos)      /**< (HSTPIPICR) Overflow Interrupt Clear Mask */
+#define HSTPIPICR_SHORTPACKETIC_Pos   7                                              /**< (HSTPIPICR) Short Packet Interrupt Clear Position */
+#define HSTPIPICR_SHORTPACKETIC       (_U_(0x1) << HSTPIPICR_SHORTPACKETIC_Pos)  /**< (HSTPIPICR) Short Packet Interrupt Clear Mask */
+#define HSTPIPICR_Msk                 _U_(0xB3)                                      /**< (HSTPIPICR) Register Mask  */
+
+/* CTRL mode */
+#define HSTPIPICR_CTRL_TXSTPIC_Pos    2                                              /**< (HSTPIPICR) Transmitted SETUP Interrupt Clear Position */
+#define HSTPIPICR_CTRL_TXSTPIC        (_U_(0x1) << HSTPIPICR_CTRL_TXSTPIC_Pos)  /**< (HSTPIPICR) Transmitted SETUP Interrupt Clear Mask */
+#define HSTPIPICR_CTRL_RXSTALLDIC_Pos 6                                              /**< (HSTPIPICR) Received STALLed Interrupt Clear Position */
+#define HSTPIPICR_CTRL_RXSTALLDIC     (_U_(0x1) << HSTPIPICR_CTRL_RXSTALLDIC_Pos)  /**< (HSTPIPICR) Received STALLed Interrupt Clear Mask */
+#define HSTPIPICR_CTRL_Msk            _U_(0x44)                                      /**< (HSTPIPICR_CTRL) Register Mask  */
+
+/* ISO mode */
+#define HSTPIPICR_ISO_UNDERFIC_Pos    2                                              /**< (HSTPIPICR) Underflow Interrupt Clear Position */
+#define HSTPIPICR_ISO_UNDERFIC        (_U_(0x1) << HSTPIPICR_ISO_UNDERFIC_Pos)  /**< (HSTPIPICR) Underflow Interrupt Clear Mask */
+#define HSTPIPICR_ISO_CRCERRIC_Pos    6                                              /**< (HSTPIPICR) CRC Error Interrupt Clear Position */
+#define HSTPIPICR_ISO_CRCERRIC        (_U_(0x1) << HSTPIPICR_ISO_CRCERRIC_Pos)  /**< (HSTPIPICR) CRC Error Interrupt Clear Mask */
+#define HSTPIPICR_ISO_Msk             _U_(0x44)                                      /**< (HSTPIPICR_ISO) Register Mask  */
+
+/* BLK mode */
+#define HSTPIPICR_BLK_TXSTPIC_Pos     2                                              /**< (HSTPIPICR) Transmitted SETUP Interrupt Clear Position */
+#define HSTPIPICR_BLK_TXSTPIC         (_U_(0x1) << HSTPIPICR_BLK_TXSTPIC_Pos)  /**< (HSTPIPICR) Transmitted SETUP Interrupt Clear Mask */
+#define HSTPIPICR_BLK_RXSTALLDIC_Pos  6                                              /**< (HSTPIPICR) Received STALLed Interrupt Clear Position */
+#define HSTPIPICR_BLK_RXSTALLDIC      (_U_(0x1) << HSTPIPICR_BLK_RXSTALLDIC_Pos)  /**< (HSTPIPICR) Received STALLed Interrupt Clear Mask */
+#define HSTPIPICR_BLK_Msk             _U_(0x44)                                      /**< (HSTPIPICR_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define HSTPIPICR_INTRPT_UNDERFIC_Pos 2                                              /**< (HSTPIPICR) Underflow Interrupt Clear Position */
+#define HSTPIPICR_INTRPT_UNDERFIC     (_U_(0x1) << HSTPIPICR_INTRPT_UNDERFIC_Pos)  /**< (HSTPIPICR) Underflow Interrupt Clear Mask */
+#define HSTPIPICR_INTRPT_RXSTALLDIC_Pos 6                                              /**< (HSTPIPICR) Received STALLed Interrupt Clear Position */
+#define HSTPIPICR_INTRPT_RXSTALLDIC     (_U_(0x1) << HSTPIPICR_INTRPT_RXSTALLDIC_Pos)  /**< (HSTPIPICR) Received STALLed Interrupt Clear Mask */
+#define HSTPIPICR_INTRPT_Msk          _U_(0x44)                                      /**< (HSTPIPICR_INTRPT) Register Mask  */
+
+
+/* -------- HSTPIPIFR : (USBHS Offset: 0x590) (/W 32) Host Pipe Set Register -------- */
+
+#define HSTPIPIFR_OFFSET              (0x590)                                       /**<  (HSTPIPIFR) Host Pipe Set Register  Offset */
+
+#define HSTPIPIFR_RXINIS_Pos          0                                              /**< (HSTPIPIFR) Received IN Data Interrupt Set Position */
+#define HSTPIPIFR_RXINIS              (_U_(0x1) << HSTPIPIFR_RXINIS_Pos)       /**< (HSTPIPIFR) Received IN Data Interrupt Set Mask */
+#define HSTPIPIFR_TXOUTIS_Pos         1                                              /**< (HSTPIPIFR) Transmitted OUT Data Interrupt Set Position */
+#define HSTPIPIFR_TXOUTIS             (_U_(0x1) << HSTPIPIFR_TXOUTIS_Pos)      /**< (HSTPIPIFR) Transmitted OUT Data Interrupt Set Mask */
+#define HSTPIPIFR_PERRIS_Pos          3                                              /**< (HSTPIPIFR) Pipe Error Interrupt Set Position */
+#define HSTPIPIFR_PERRIS              (_U_(0x1) << HSTPIPIFR_PERRIS_Pos)       /**< (HSTPIPIFR) Pipe Error Interrupt Set Mask */
+#define HSTPIPIFR_NAKEDIS_Pos         4                                              /**< (HSTPIPIFR) NAKed Interrupt Set Position */
+#define HSTPIPIFR_NAKEDIS             (_U_(0x1) << HSTPIPIFR_NAKEDIS_Pos)      /**< (HSTPIPIFR) NAKed Interrupt Set Mask */
+#define HSTPIPIFR_OVERFIS_Pos         5                                              /**< (HSTPIPIFR) Overflow Interrupt Set Position */
+#define HSTPIPIFR_OVERFIS             (_U_(0x1) << HSTPIPIFR_OVERFIS_Pos)      /**< (HSTPIPIFR) Overflow Interrupt Set Mask */
+#define HSTPIPIFR_SHORTPACKETIS_Pos   7                                              /**< (HSTPIPIFR) Short Packet Interrupt Set Position */
+#define HSTPIPIFR_SHORTPACKETIS       (_U_(0x1) << HSTPIPIFR_SHORTPACKETIS_Pos)  /**< (HSTPIPIFR) Short Packet Interrupt Set Mask */
+#define HSTPIPIFR_NBUSYBKS_Pos        12                                             /**< (HSTPIPIFR) Number of Busy Banks Set Position */
+#define HSTPIPIFR_NBUSYBKS            (_U_(0x1) << HSTPIPIFR_NBUSYBKS_Pos)     /**< (HSTPIPIFR) Number of Busy Banks Set Mask */
+#define HSTPIPIFR_Msk                 _U_(0x10BB)                                    /**< (HSTPIPIFR) Register Mask  */
+
+/* CTRL mode */
+#define HSTPIPIFR_CTRL_TXSTPIS_Pos    2                                              /**< (HSTPIPIFR) Transmitted SETUP Interrupt Set Position */
+#define HSTPIPIFR_CTRL_TXSTPIS        (_U_(0x1) << HSTPIPIFR_CTRL_TXSTPIS_Pos)  /**< (HSTPIPIFR) Transmitted SETUP Interrupt Set Mask */
+#define HSTPIPIFR_CTRL_RXSTALLDIS_Pos 6                                              /**< (HSTPIPIFR) Received STALLed Interrupt Set Position */
+#define HSTPIPIFR_CTRL_RXSTALLDIS     (_U_(0x1) << HSTPIPIFR_CTRL_RXSTALLDIS_Pos)  /**< (HSTPIPIFR) Received STALLed Interrupt Set Mask */
+#define HSTPIPIFR_CTRL_Msk            _U_(0x44)                                      /**< (HSTPIPIFR_CTRL) Register Mask  */
+
+/* ISO mode */
+#define HSTPIPIFR_ISO_UNDERFIS_Pos    2                                              /**< (HSTPIPIFR) Underflow Interrupt Set Position */
+#define HSTPIPIFR_ISO_UNDERFIS        (_U_(0x1) << HSTPIPIFR_ISO_UNDERFIS_Pos)  /**< (HSTPIPIFR) Underflow Interrupt Set Mask */
+#define HSTPIPIFR_ISO_CRCERRIS_Pos    6                                              /**< (HSTPIPIFR) CRC Error Interrupt Set Position */
+#define HSTPIPIFR_ISO_CRCERRIS        (_U_(0x1) << HSTPIPIFR_ISO_CRCERRIS_Pos)  /**< (HSTPIPIFR) CRC Error Interrupt Set Mask */
+#define HSTPIPIFR_ISO_Msk             _U_(0x44)                                      /**< (HSTPIPIFR_ISO) Register Mask  */
+
+/* BLK mode */
+#define HSTPIPIFR_BLK_TXSTPIS_Pos     2                                              /**< (HSTPIPIFR) Transmitted SETUP Interrupt Set Position */
+#define HSTPIPIFR_BLK_TXSTPIS         (_U_(0x1) << HSTPIPIFR_BLK_TXSTPIS_Pos)  /**< (HSTPIPIFR) Transmitted SETUP Interrupt Set Mask */
+#define HSTPIPIFR_BLK_RXSTALLDIS_Pos  6                                              /**< (HSTPIPIFR) Received STALLed Interrupt Set Position */
+#define HSTPIPIFR_BLK_RXSTALLDIS      (_U_(0x1) << HSTPIPIFR_BLK_RXSTALLDIS_Pos)  /**< (HSTPIPIFR) Received STALLed Interrupt Set Mask */
+#define HSTPIPIFR_BLK_Msk             _U_(0x44)                                      /**< (HSTPIPIFR_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define HSTPIPIFR_INTRPT_UNDERFIS_Pos 2                                              /**< (HSTPIPIFR) Underflow Interrupt Set Position */
+#define HSTPIPIFR_INTRPT_UNDERFIS     (_U_(0x1) << HSTPIPIFR_INTRPT_UNDERFIS_Pos)  /**< (HSTPIPIFR) Underflow Interrupt Set Mask */
+#define HSTPIPIFR_INTRPT_RXSTALLDIS_Pos 6                                              /**< (HSTPIPIFR) Received STALLed Interrupt Set Position */
+#define HSTPIPIFR_INTRPT_RXSTALLDIS     (_U_(0x1) << HSTPIPIFR_INTRPT_RXSTALLDIS_Pos)  /**< (HSTPIPIFR) Received STALLed Interrupt Set Mask */
+#define HSTPIPIFR_INTRPT_Msk          _U_(0x44)                                      /**< (HSTPIPIFR_INTRPT) Register Mask  */
+
+
+/* -------- HSTPIPIMR : (USBHS Offset: 0x5c0) (R/ 32) Host Pipe Mask Register -------- */
+
+#define HSTPIPIMR_OFFSET              (0x5C0)                                       /**<  (HSTPIPIMR) Host Pipe Mask Register  Offset */
+
+#define HSTPIPIMR_RXINE_Pos           0                                              /**< (HSTPIPIMR) Received IN Data Interrupt Enable Position */
+#define HSTPIPIMR_RXINE               (_U_(0x1) << HSTPIPIMR_RXINE_Pos)        /**< (HSTPIPIMR) Received IN Data Interrupt Enable Mask */
+#define HSTPIPIMR_TXOUTE_Pos          1                                              /**< (HSTPIPIMR) Transmitted OUT Data Interrupt Enable Position */
+#define HSTPIPIMR_TXOUTE              (_U_(0x1) << HSTPIPIMR_TXOUTE_Pos)       /**< (HSTPIPIMR) Transmitted OUT Data Interrupt Enable Mask */
+#define HSTPIPIMR_PERRE_Pos           3                                              /**< (HSTPIPIMR) Pipe Error Interrupt Enable Position */
+#define HSTPIPIMR_PERRE               (_U_(0x1) << HSTPIPIMR_PERRE_Pos)        /**< (HSTPIPIMR) Pipe Error Interrupt Enable Mask */
+#define HSTPIPIMR_NAKEDE_Pos          4                                              /**< (HSTPIPIMR) NAKed Interrupt Enable Position */
+#define HSTPIPIMR_NAKEDE              (_U_(0x1) << HSTPIPIMR_NAKEDE_Pos)       /**< (HSTPIPIMR) NAKed Interrupt Enable Mask */
+#define HSTPIPIMR_OVERFIE_Pos         5                                              /**< (HSTPIPIMR) Overflow Interrupt Enable Position */
+#define HSTPIPIMR_OVERFIE             (_U_(0x1) << HSTPIPIMR_OVERFIE_Pos)      /**< (HSTPIPIMR) Overflow Interrupt Enable Mask */
+#define HSTPIPIMR_SHORTPACKETIE_Pos   7                                              /**< (HSTPIPIMR) Short Packet Interrupt Enable Position */
+#define HSTPIPIMR_SHORTPACKETIE       (_U_(0x1) << HSTPIPIMR_SHORTPACKETIE_Pos)  /**< (HSTPIPIMR) Short Packet Interrupt Enable Mask */
+#define HSTPIPIMR_NBUSYBKE_Pos        12                                             /**< (HSTPIPIMR) Number of Busy Banks Interrupt Enable Position */
+#define HSTPIPIMR_NBUSYBKE            (_U_(0x1) << HSTPIPIMR_NBUSYBKE_Pos)     /**< (HSTPIPIMR) Number of Busy Banks Interrupt Enable Mask */
+#define HSTPIPIMR_FIFOCON_Pos         14                                             /**< (HSTPIPIMR) FIFO Control Position */
+#define HSTPIPIMR_FIFOCON             (_U_(0x1) << HSTPIPIMR_FIFOCON_Pos)      /**< (HSTPIPIMR) FIFO Control Mask */
+#define HSTPIPIMR_PDISHDMA_Pos        16                                             /**< (HSTPIPIMR) Pipe Interrupts Disable HDMA Request Enable Position */
+#define HSTPIPIMR_PDISHDMA            (_U_(0x1) << HSTPIPIMR_PDISHDMA_Pos)     /**< (HSTPIPIMR) Pipe Interrupts Disable HDMA Request Enable Mask */
+#define HSTPIPIMR_PFREEZE_Pos         17                                             /**< (HSTPIPIMR) Pipe Freeze Position */
+#define HSTPIPIMR_PFREEZE             (_U_(0x1) << HSTPIPIMR_PFREEZE_Pos)      /**< (HSTPIPIMR) Pipe Freeze Mask */
+#define HSTPIPIMR_RSTDT_Pos           18                                             /**< (HSTPIPIMR) Reset Data Toggle Position */
+#define HSTPIPIMR_RSTDT               (_U_(0x1) << HSTPIPIMR_RSTDT_Pos)        /**< (HSTPIPIMR) Reset Data Toggle Mask */
+#define HSTPIPIMR_Msk                 _U_(0x750BB)                                   /**< (HSTPIPIMR) Register Mask  */
+
+/* CTRL mode */
+#define HSTPIPIMR_CTRL_TXSTPE_Pos     2                                              /**< (HSTPIPIMR) Transmitted SETUP Interrupt Enable Position */
+#define HSTPIPIMR_CTRL_TXSTPE         (_U_(0x1) << HSTPIPIMR_CTRL_TXSTPE_Pos)  /**< (HSTPIPIMR) Transmitted SETUP Interrupt Enable Mask */
+#define HSTPIPIMR_CTRL_RXSTALLDE_Pos  6                                              /**< (HSTPIPIMR) Received STALLed Interrupt Enable Position */
+#define HSTPIPIMR_CTRL_RXSTALLDE      (_U_(0x1) << HSTPIPIMR_CTRL_RXSTALLDE_Pos)  /**< (HSTPIPIMR) Received STALLed Interrupt Enable Mask */
+#define HSTPIPIMR_CTRL_Msk            _U_(0x44)                                      /**< (HSTPIPIMR_CTRL) Register Mask  */
+
+/* ISO mode */
+#define HSTPIPIMR_ISO_UNDERFIE_Pos    2                                              /**< (HSTPIPIMR) Underflow Interrupt Enable Position */
+#define HSTPIPIMR_ISO_UNDERFIE        (_U_(0x1) << HSTPIPIMR_ISO_UNDERFIE_Pos)  /**< (HSTPIPIMR) Underflow Interrupt Enable Mask */
+#define HSTPIPIMR_ISO_CRCERRE_Pos     6                                              /**< (HSTPIPIMR) CRC Error Interrupt Enable Position */
+#define HSTPIPIMR_ISO_CRCERRE         (_U_(0x1) << HSTPIPIMR_ISO_CRCERRE_Pos)  /**< (HSTPIPIMR) CRC Error Interrupt Enable Mask */
+#define HSTPIPIMR_ISO_Msk             _U_(0x44)                                      /**< (HSTPIPIMR_ISO) Register Mask  */
+
+/* BLK mode */
+#define HSTPIPIMR_BLK_TXSTPE_Pos      2                                              /**< (HSTPIPIMR) Transmitted SETUP Interrupt Enable Position */
+#define HSTPIPIMR_BLK_TXSTPE          (_U_(0x1) << HSTPIPIMR_BLK_TXSTPE_Pos)   /**< (HSTPIPIMR) Transmitted SETUP Interrupt Enable Mask */
+#define HSTPIPIMR_BLK_RXSTALLDE_Pos   6                                              /**< (HSTPIPIMR) Received STALLed Interrupt Enable Position */
+#define HSTPIPIMR_BLK_RXSTALLDE       (_U_(0x1) << HSTPIPIMR_BLK_RXSTALLDE_Pos)  /**< (HSTPIPIMR) Received STALLed Interrupt Enable Mask */
+#define HSTPIPIMR_BLK_Msk             _U_(0x44)                                      /**< (HSTPIPIMR_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define HSTPIPIMR_INTRPT_UNDERFIE_Pos 2                                              /**< (HSTPIPIMR) Underflow Interrupt Enable Position */
+#define HSTPIPIMR_INTRPT_UNDERFIE     (_U_(0x1) << HSTPIPIMR_INTRPT_UNDERFIE_Pos)  /**< (HSTPIPIMR) Underflow Interrupt Enable Mask */
+#define HSTPIPIMR_INTRPT_RXSTALLDE_Pos 6                                              /**< (HSTPIPIMR) Received STALLed Interrupt Enable Position */
+#define HSTPIPIMR_INTRPT_RXSTALLDE     (_U_(0x1) << HSTPIPIMR_INTRPT_RXSTALLDE_Pos)  /**< (HSTPIPIMR) Received STALLed Interrupt Enable Mask */
+#define HSTPIPIMR_INTRPT_Msk          _U_(0x44)                                      /**< (HSTPIPIMR_INTRPT) Register Mask  */
+
+
+/* -------- HSTPIPIER : (USBHS Offset: 0x5f0) (/W 32) Host Pipe Enable Register -------- */
+
+#define HSTPIPIER_OFFSET              (0x5F0)                                       /**<  (HSTPIPIER) Host Pipe Enable Register  Offset */
+
+#define HSTPIPIER_RXINES_Pos          0                                              /**< (HSTPIPIER) Received IN Data Interrupt Enable Position */
+#define HSTPIPIER_RXINES              (_U_(0x1) << HSTPIPIER_RXINES_Pos)       /**< (HSTPIPIER) Received IN Data Interrupt Enable Mask */
+#define HSTPIPIER_TXOUTES_Pos         1                                              /**< (HSTPIPIER) Transmitted OUT Data Interrupt Enable Position */
+#define HSTPIPIER_TXOUTES             (_U_(0x1) << HSTPIPIER_TXOUTES_Pos)      /**< (HSTPIPIER) Transmitted OUT Data Interrupt Enable Mask */
+#define HSTPIPIER_PERRES_Pos          3                                              /**< (HSTPIPIER) Pipe Error Interrupt Enable Position */
+#define HSTPIPIER_PERRES              (_U_(0x1) << HSTPIPIER_PERRES_Pos)       /**< (HSTPIPIER) Pipe Error Interrupt Enable Mask */
+#define HSTPIPIER_NAKEDES_Pos         4                                              /**< (HSTPIPIER) NAKed Interrupt Enable Position */
+#define HSTPIPIER_NAKEDES             (_U_(0x1) << HSTPIPIER_NAKEDES_Pos)      /**< (HSTPIPIER) NAKed Interrupt Enable Mask */
+#define HSTPIPIER_OVERFIES_Pos        5                                              /**< (HSTPIPIER) Overflow Interrupt Enable Position */
+#define HSTPIPIER_OVERFIES            (_U_(0x1) << HSTPIPIER_OVERFIES_Pos)     /**< (HSTPIPIER) Overflow Interrupt Enable Mask */
+#define HSTPIPIER_SHORTPACKETIES_Pos  7                                              /**< (HSTPIPIER) Short Packet Interrupt Enable Position */
+#define HSTPIPIER_SHORTPACKETIES      (_U_(0x1) << HSTPIPIER_SHORTPACKETIES_Pos)  /**< (HSTPIPIER) Short Packet Interrupt Enable Mask */
+#define HSTPIPIER_NBUSYBKES_Pos       12                                             /**< (HSTPIPIER) Number of Busy Banks Enable Position */
+#define HSTPIPIER_NBUSYBKES           (_U_(0x1) << HSTPIPIER_NBUSYBKES_Pos)    /**< (HSTPIPIER) Number of Busy Banks Enable Mask */
+#define HSTPIPIER_PDISHDMAS_Pos       16                                             /**< (HSTPIPIER) Pipe Interrupts Disable HDMA Request Enable Position */
+#define HSTPIPIER_PDISHDMAS           (_U_(0x1) << HSTPIPIER_PDISHDMAS_Pos)    /**< (HSTPIPIER) Pipe Interrupts Disable HDMA Request Enable Mask */
+#define HSTPIPIER_PFREEZES_Pos        17                                             /**< (HSTPIPIER) Pipe Freeze Enable Position */
+#define HSTPIPIER_PFREEZES            (_U_(0x1) << HSTPIPIER_PFREEZES_Pos)     /**< (HSTPIPIER) Pipe Freeze Enable Mask */
+#define HSTPIPIER_RSTDTS_Pos          18                                             /**< (HSTPIPIER) Reset Data Toggle Enable Position */
+#define HSTPIPIER_RSTDTS              (_U_(0x1) << HSTPIPIER_RSTDTS_Pos)       /**< (HSTPIPIER) Reset Data Toggle Enable Mask */
+#define HSTPIPIER_Msk                 _U_(0x710BB)                                   /**< (HSTPIPIER) Register Mask  */
+
+/* CTRL mode */
+#define HSTPIPIER_CTRL_TXSTPES_Pos    2                                              /**< (HSTPIPIER) Transmitted SETUP Interrupt Enable Position */
+#define HSTPIPIER_CTRL_TXSTPES        (_U_(0x1) << HSTPIPIER_CTRL_TXSTPES_Pos)  /**< (HSTPIPIER) Transmitted SETUP Interrupt Enable Mask */
+#define HSTPIPIER_CTRL_RXSTALLDES_Pos 6                                              /**< (HSTPIPIER) Received STALLed Interrupt Enable Position */
+#define HSTPIPIER_CTRL_RXSTALLDES     (_U_(0x1) << HSTPIPIER_CTRL_RXSTALLDES_Pos)  /**< (HSTPIPIER) Received STALLed Interrupt Enable Mask */
+#define HSTPIPIER_CTRL_Msk            _U_(0x44)                                      /**< (HSTPIPIER_CTRL) Register Mask  */
+
+/* ISO mode */
+#define HSTPIPIER_ISO_UNDERFIES_Pos   2                                              /**< (HSTPIPIER) Underflow Interrupt Enable Position */
+#define HSTPIPIER_ISO_UNDERFIES       (_U_(0x1) << HSTPIPIER_ISO_UNDERFIES_Pos)  /**< (HSTPIPIER) Underflow Interrupt Enable Mask */
+#define HSTPIPIER_ISO_CRCERRES_Pos    6                                              /**< (HSTPIPIER) CRC Error Interrupt Enable Position */
+#define HSTPIPIER_ISO_CRCERRES        (_U_(0x1) << HSTPIPIER_ISO_CRCERRES_Pos)  /**< (HSTPIPIER) CRC Error Interrupt Enable Mask */
+#define HSTPIPIER_ISO_Msk             _U_(0x44)                                      /**< (HSTPIPIER_ISO) Register Mask  */
+
+/* BLK mode */
+#define HSTPIPIER_BLK_TXSTPES_Pos     2                                              /**< (HSTPIPIER) Transmitted SETUP Interrupt Enable Position */
+#define HSTPIPIER_BLK_TXSTPES         (_U_(0x1) << HSTPIPIER_BLK_TXSTPES_Pos)  /**< (HSTPIPIER) Transmitted SETUP Interrupt Enable Mask */
+#define HSTPIPIER_BLK_RXSTALLDES_Pos  6                                              /**< (HSTPIPIER) Received STALLed Interrupt Enable Position */
+#define HSTPIPIER_BLK_RXSTALLDES      (_U_(0x1) << HSTPIPIER_BLK_RXSTALLDES_Pos)  /**< (HSTPIPIER) Received STALLed Interrupt Enable Mask */
+#define HSTPIPIER_BLK_Msk             _U_(0x44)                                      /**< (HSTPIPIER_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define HSTPIPIER_INTRPT_UNDERFIES_Pos 2                                              /**< (HSTPIPIER) Underflow Interrupt Enable Position */
+#define HSTPIPIER_INTRPT_UNDERFIES     (_U_(0x1) << HSTPIPIER_INTRPT_UNDERFIES_Pos)  /**< (HSTPIPIER) Underflow Interrupt Enable Mask */
+#define HSTPIPIER_INTRPT_RXSTALLDES_Pos 6                                              /**< (HSTPIPIER) Received STALLed Interrupt Enable Position */
+#define HSTPIPIER_INTRPT_RXSTALLDES     (_U_(0x1) << HSTPIPIER_INTRPT_RXSTALLDES_Pos)  /**< (HSTPIPIER) Received STALLed Interrupt Enable Mask */
+#define HSTPIPIER_INTRPT_Msk          _U_(0x44)                                      /**< (HSTPIPIER_INTRPT) Register Mask  */
+
+
+/* -------- HSTPIPIDR : (USBHS Offset: 0x620) (/W 32) Host Pipe Disable Register -------- */
+
+#define HSTPIPIDR_OFFSET              (0x620)                                       /**<  (HSTPIPIDR) Host Pipe Disable Register  Offset */
+
+#define HSTPIPIDR_RXINEC_Pos          0                                              /**< (HSTPIPIDR) Received IN Data Interrupt Disable Position */
+#define HSTPIPIDR_RXINEC              (_U_(0x1) << HSTPIPIDR_RXINEC_Pos)       /**< (HSTPIPIDR) Received IN Data Interrupt Disable Mask */
+#define HSTPIPIDR_TXOUTEC_Pos         1                                              /**< (HSTPIPIDR) Transmitted OUT Data Interrupt Disable Position */
+#define HSTPIPIDR_TXOUTEC             (_U_(0x1) << HSTPIPIDR_TXOUTEC_Pos)      /**< (HSTPIPIDR) Transmitted OUT Data Interrupt Disable Mask */
+#define HSTPIPIDR_PERREC_Pos          3                                              /**< (HSTPIPIDR) Pipe Error Interrupt Disable Position */
+#define HSTPIPIDR_PERREC              (_U_(0x1) << HSTPIPIDR_PERREC_Pos)       /**< (HSTPIPIDR) Pipe Error Interrupt Disable Mask */
+#define HSTPIPIDR_NAKEDEC_Pos         4                                              /**< (HSTPIPIDR) NAKed Interrupt Disable Position */
+#define HSTPIPIDR_NAKEDEC             (_U_(0x1) << HSTPIPIDR_NAKEDEC_Pos)      /**< (HSTPIPIDR) NAKed Interrupt Disable Mask */
+#define HSTPIPIDR_OVERFIEC_Pos        5                                              /**< (HSTPIPIDR) Overflow Interrupt Disable Position */
+#define HSTPIPIDR_OVERFIEC            (_U_(0x1) << HSTPIPIDR_OVERFIEC_Pos)     /**< (HSTPIPIDR) Overflow Interrupt Disable Mask */
+#define HSTPIPIDR_SHORTPACKETIEC_Pos  7                                              /**< (HSTPIPIDR) Short Packet Interrupt Disable Position */
+#define HSTPIPIDR_SHORTPACKETIEC      (_U_(0x1) << HSTPIPIDR_SHORTPACKETIEC_Pos)  /**< (HSTPIPIDR) Short Packet Interrupt Disable Mask */
+#define HSTPIPIDR_NBUSYBKEC_Pos       12                                             /**< (HSTPIPIDR) Number of Busy Banks Disable Position */
+#define HSTPIPIDR_NBUSYBKEC           (_U_(0x1) << HSTPIPIDR_NBUSYBKEC_Pos)    /**< (HSTPIPIDR) Number of Busy Banks Disable Mask */
+#define HSTPIPIDR_FIFOCONC_Pos        14                                             /**< (HSTPIPIDR) FIFO Control Disable Position */
+#define HSTPIPIDR_FIFOCONC            (_U_(0x1) << HSTPIPIDR_FIFOCONC_Pos)     /**< (HSTPIPIDR) FIFO Control Disable Mask */
+#define HSTPIPIDR_PDISHDMAC_Pos       16                                             /**< (HSTPIPIDR) Pipe Interrupts Disable HDMA Request Disable Position */
+#define HSTPIPIDR_PDISHDMAC           (_U_(0x1) << HSTPIPIDR_PDISHDMAC_Pos)    /**< (HSTPIPIDR) Pipe Interrupts Disable HDMA Request Disable Mask */
+#define HSTPIPIDR_PFREEZEC_Pos        17                                             /**< (HSTPIPIDR) Pipe Freeze Disable Position */
+#define HSTPIPIDR_PFREEZEC            (_U_(0x1) << HSTPIPIDR_PFREEZEC_Pos)     /**< (HSTPIPIDR) Pipe Freeze Disable Mask */
+#define HSTPIPIDR_Msk                 _U_(0x350BB)                                   /**< (HSTPIPIDR) Register Mask  */
+
+/* CTRL mode */
+#define HSTPIPIDR_CTRL_TXSTPEC_Pos    2                                              /**< (HSTPIPIDR) Transmitted SETUP Interrupt Disable Position */
+#define HSTPIPIDR_CTRL_TXSTPEC        (_U_(0x1) << HSTPIPIDR_CTRL_TXSTPEC_Pos)  /**< (HSTPIPIDR) Transmitted SETUP Interrupt Disable Mask */
+#define HSTPIPIDR_CTRL_RXSTALLDEC_Pos 6                                              /**< (HSTPIPIDR) Received STALLed Interrupt Disable Position */
+#define HSTPIPIDR_CTRL_RXSTALLDEC     (_U_(0x1) << HSTPIPIDR_CTRL_RXSTALLDEC_Pos)  /**< (HSTPIPIDR) Received STALLed Interrupt Disable Mask */
+#define HSTPIPIDR_CTRL_Msk            _U_(0x44)                                      /**< (HSTPIPIDR_CTRL) Register Mask  */
+
+/* ISO mode */
+#define HSTPIPIDR_ISO_UNDERFIEC_Pos   2                                              /**< (HSTPIPIDR) Underflow Interrupt Disable Position */
+#define HSTPIPIDR_ISO_UNDERFIEC       (_U_(0x1) << HSTPIPIDR_ISO_UNDERFIEC_Pos)  /**< (HSTPIPIDR) Underflow Interrupt Disable Mask */
+#define HSTPIPIDR_ISO_CRCERREC_Pos    6                                              /**< (HSTPIPIDR) CRC Error Interrupt Disable Position */
+#define HSTPIPIDR_ISO_CRCERREC        (_U_(0x1) << HSTPIPIDR_ISO_CRCERREC_Pos)  /**< (HSTPIPIDR) CRC Error Interrupt Disable Mask */
+#define HSTPIPIDR_ISO_Msk             _U_(0x44)                                      /**< (HSTPIPIDR_ISO) Register Mask  */
+
+/* BLK mode */
+#define HSTPIPIDR_BLK_TXSTPEC_Pos     2                                              /**< (HSTPIPIDR) Transmitted SETUP Interrupt Disable Position */
+#define HSTPIPIDR_BLK_TXSTPEC         (_U_(0x1) << HSTPIPIDR_BLK_TXSTPEC_Pos)  /**< (HSTPIPIDR) Transmitted SETUP Interrupt Disable Mask */
+#define HSTPIPIDR_BLK_RXSTALLDEC_Pos  6                                              /**< (HSTPIPIDR) Received STALLed Interrupt Disable Position */
+#define HSTPIPIDR_BLK_RXSTALLDEC      (_U_(0x1) << HSTPIPIDR_BLK_RXSTALLDEC_Pos)  /**< (HSTPIPIDR) Received STALLed Interrupt Disable Mask */
+#define HSTPIPIDR_BLK_Msk             _U_(0x44)                                      /**< (HSTPIPIDR_BLK) Register Mask  */
+
+/* INTRPT mode */
+#define HSTPIPIDR_INTRPT_UNDERFIEC_Pos 2                                              /**< (HSTPIPIDR) Underflow Interrupt Disable Position */
+#define HSTPIPIDR_INTRPT_UNDERFIEC     (_U_(0x1) << HSTPIPIDR_INTRPT_UNDERFIEC_Pos)  /**< (HSTPIPIDR) Underflow Interrupt Disable Mask */
+#define HSTPIPIDR_INTRPT_RXSTALLDEC_Pos 6                                              /**< (HSTPIPIDR) Received STALLed Interrupt Disable Position */
+#define HSTPIPIDR_INTRPT_RXSTALLDEC     (_U_(0x1) << HSTPIPIDR_INTRPT_RXSTALLDEC_Pos)  /**< (HSTPIPIDR) Received STALLed Interrupt Disable Mask */
+#define HSTPIPIDR_INTRPT_Msk          _U_(0x44)                                      /**< (HSTPIPIDR_INTRPT) Register Mask  */
+
+
+/* -------- HSTPIPINRQ : (USBHS Offset: 0x650) (R/W 32) Host Pipe IN Request Register -------- */
+
+#define HSTPIPINRQ_OFFSET             (0x650)                                       /**<  (HSTPIPINRQ) Host Pipe IN Request Register  Offset */
+
+#define HSTPIPINRQ_INRQ_Pos           0                                              /**< (HSTPIPINRQ) IN Request Number before Freeze Position */
+#define HSTPIPINRQ_INRQ               (_U_(0xFF) << HSTPIPINRQ_INRQ_Pos)       /**< (HSTPIPINRQ) IN Request Number before Freeze Mask */
+#define HSTPIPINRQ_INMODE_Pos         8                                              /**< (HSTPIPINRQ) IN Request Mode Position */
+#define HSTPIPINRQ_INMODE             (_U_(0x1) << HSTPIPINRQ_INMODE_Pos)      /**< (HSTPIPINRQ) IN Request Mode Mask */
+#define HSTPIPINRQ_Msk                _U_(0x1FF)                                     /**< (HSTPIPINRQ) Register Mask  */
+
+
+/* -------- HSTPIPERR : (USBHS Offset: 0x680) (R/W 32) Host Pipe Error Register -------- */
+
+#define HSTPIPERR_OFFSET              (0x680)                                       /**<  (HSTPIPERR) Host Pipe Error Register  Offset */
+
+#define HSTPIPERR_DATATGL_Pos         0                                              /**< (HSTPIPERR) Data Toggle Error Position */
+#define HSTPIPERR_DATATGL             (_U_(0x1) << HSTPIPERR_DATATGL_Pos)      /**< (HSTPIPERR) Data Toggle Error Mask */
+#define HSTPIPERR_DATAPID_Pos         1                                              /**< (HSTPIPERR) Data PID Error Position */
+#define HSTPIPERR_DATAPID             (_U_(0x1) << HSTPIPERR_DATAPID_Pos)      /**< (HSTPIPERR) Data PID Error Mask */
+#define HSTPIPERR_PID_Pos             2                                              /**< (HSTPIPERR) Data PID Error Position */
+#define HSTPIPERR_PID                 (_U_(0x1) << HSTPIPERR_PID_Pos)          /**< (HSTPIPERR) Data PID Error Mask */
+#define HSTPIPERR_TIMEOUT_Pos         3                                              /**< (HSTPIPERR) Time-Out Error Position */
+#define HSTPIPERR_TIMEOUT             (_U_(0x1) << HSTPIPERR_TIMEOUT_Pos)      /**< (HSTPIPERR) Time-Out Error Mask */
+#define HSTPIPERR_CRC16_Pos           4                                              /**< (HSTPIPERR) CRC16 Error Position */
+#define HSTPIPERR_CRC16               (_U_(0x1) << HSTPIPERR_CRC16_Pos)        /**< (HSTPIPERR) CRC16 Error Mask */
+#define HSTPIPERR_COUNTER_Pos         5                                              /**< (HSTPIPERR) Error Counter Position */
+#define HSTPIPERR_COUNTER             (_U_(0x3) << HSTPIPERR_COUNTER_Pos)      /**< (HSTPIPERR) Error Counter Mask */
+#define HSTPIPERR_Msk                 _U_(0x7F)                                      /**< (HSTPIPERR) Register Mask  */
+
+#define HSTPIPERR_CRC_Pos             4                                              /**< (HSTPIPERR Position) CRCx6 Error */
+#define HSTPIPERR_CRC                 (_U_(0x1) << HSTPIPERR_CRC_Pos)          /**< (HSTPIPERR Mask) CRC */
+
+/* -------- CTRL : (USBHS Offset: 0x800) (R/W 32) General Control Register -------- */
+
+#define CTRL_OFFSET                   (0x800)                                       /**<  (CTRL) General Control Register  Offset */
+
+#define CTRL_RDERRE_Pos               4                                              /**< (CTRL) Remote Device Connection Error Interrupt Enable Position */
+#define CTRL_RDERRE                   (_U_(0x1) << CTRL_RDERRE_Pos)            /**< (CTRL) Remote Device Connection Error Interrupt Enable Mask */
+#define CTRL_VBUSHWC_Pos              8                                              /**< (CTRL) VBUS Hardware Control Position */
+#define CTRL_VBUSHWC                  (_U_(0x1) << CTRL_VBUSHWC_Pos)           /**< (CTRL) VBUS Hardware Control Mask */
+#define CTRL_FRZCLK_Pos               14                                             /**< (CTRL) Freeze USB Clock Position */
+#define CTRL_FRZCLK                   (_U_(0x1) << CTRL_FRZCLK_Pos)            /**< (CTRL) Freeze USB Clock Mask */
+#define CTRL_USBE_Pos                 15                                             /**< (CTRL) USBHS Enable Position */
+#define CTRL_USBE                     (_U_(0x1) << CTRL_USBE_Pos)              /**< (CTRL) USBHS Enable Mask */
+#define CTRL_UID_Pos                  24                                             /**< (CTRL) UID Pin Enable Position */
+#define CTRL_UID                      (_U_(0x1) << CTRL_UID_Pos)               /**< (CTRL) UID Pin Enable Mask */
+#define CTRL_UIMOD_Pos                25                                             /**< (CTRL) USBHS Mode Position */
+#define CTRL_UIMOD                    (_U_(0x1) << CTRL_UIMOD_Pos)             /**< (CTRL) USBHS Mode Mask */
+#define   CTRL_UIMOD_HOST_Val         _U_(0x0)                                       /**< (CTRL) The module is in USB Host mode.  */
+#define   CTRL_UIMOD_DEVICE_Val       _U_(0x1)                                       /**< (CTRL) The module is in USB Device mode.  */
+#define CTRL_UIMOD_HOST               (CTRL_UIMOD_HOST_Val << CTRL_UIMOD_Pos)  /**< (CTRL) The module is in USB Host mode. Position  */
+#define CTRL_UIMOD_DEVICE             (CTRL_UIMOD_DEVICE_Val << CTRL_UIMOD_Pos)  /**< (CTRL) The module is in USB Device mode. Position  */
+#define CTRL_Msk                      _U_(0x300C110)                                 /**< (CTRL) Register Mask  */
+
+
+/* -------- SR : (USBHS Offset: 0x804) (R/ 32) General Status Register -------- */
+
+#define SR_OFFSET                     (0x804)                                       /**<  (SR) General Status Register  Offset */
+
+#define SR_RDERRI_Pos                 4                                              /**< (SR) Remote Device Connection Error Interrupt (Host mode only) Position */
+#define SR_RDERRI                     (_U_(0x1) << SR_RDERRI_Pos)              /**< (SR) Remote Device Connection Error Interrupt (Host mode only) Mask */
+#define SR_SPEED_Pos                  12                                             /**< (SR) Speed Status (Device mode only) Position */
+#define SR_SPEED                      (_U_(0x3) << SR_SPEED_Pos)               /**< (SR) Speed Status (Device mode only) Mask */
+#define   SR_SPEED_FULL_SPEED_Val     _U_(0x0)                                       /**< (SR) Full-Speed mode  */
+#define   SR_SPEED_HIGH_SPEED_Val     _U_(0x1)                                       /**< (SR) High-Speed mode  */
+#define   SR_SPEED_LOW_SPEED_Val      _U_(0x2)                                       /**< (SR) Low-Speed mode  */
+#define SR_SPEED_FULL_SPEED           (SR_SPEED_FULL_SPEED_Val << SR_SPEED_Pos)  /**< (SR) Full-Speed mode Position  */
+#define SR_SPEED_HIGH_SPEED           (SR_SPEED_HIGH_SPEED_Val << SR_SPEED_Pos)  /**< (SR) High-Speed mode Position  */
+#define SR_SPEED_LOW_SPEED            (SR_SPEED_LOW_SPEED_Val << SR_SPEED_Pos)  /**< (SR) Low-Speed mode Position  */
+#define SR_CLKUSABLE_Pos              14                                             /**< (SR) UTMI Clock Usable Position */
+#define SR_CLKUSABLE                  (_U_(0x1) << SR_CLKUSABLE_Pos)           /**< (SR) UTMI Clock Usable Mask */
+#define SR_Msk                        _U_(0x7010)                                    /**< (SR) Register Mask  */
+
+
+/* -------- SCR : (USBHS Offset: 0x808) (/W 32) General Status Clear Register -------- */
+
+#define SCR_OFFSET                    (0x808)                                       /**<  (SCR) General Status Clear Register  Offset */
+
+#define SCR_RDERRIC_Pos               4                                              /**< (SCR) Remote Device Connection Error Interrupt Clear Position */
+#define SCR_RDERRIC                   (_U_(0x1) << SCR_RDERRIC_Pos)            /**< (SCR) Remote Device Connection Error Interrupt Clear Mask */
+#define SCR_Msk                       _U_(0x10)                                      /**< (SCR) Register Mask  */
+
+
+/* -------- SFR : (USBHS Offset: 0x80c) (/W 32) General Status Set Register -------- */
+
+#define SFR_OFFSET                    (0x80C)                                       /**<  (SFR) General Status Set Register  Offset */
+
+#define SFR_RDERRIS_Pos               4                                              /**< (SFR) Remote Device Connection Error Interrupt Set Position */
+#define SFR_RDERRIS                   (_U_(0x1) << SFR_RDERRIS_Pos)            /**< (SFR) Remote Device Connection Error Interrupt Set Mask */
+#define SFR_VBUSRQS_Pos               9                                              /**< (SFR) VBUS Request Set Position */
+#define SFR_VBUSRQS                   (_U_(0x1) << SFR_VBUSRQS_Pos)            /**< (SFR) VBUS Request Set Mask */
+#define SFR_Msk                       _U_(0x210)                                     /**< (SFR) Register Mask  */
+
+
+/** \brief DEVDMA hardware registers */
+typedef struct
+{  
+  __IO uint32_t DEVDMANXTDSC; /**< (DEVDMA Offset: 0x00) Device DMA Channel Next Descriptor Address Register */
+  __IO uint32_t DEVDMAADDRESS; /**< (DEVDMA Offset: 0x04) Device DMA Channel Address Register */
+  __IO uint32_t DEVDMACONTROL; /**< (DEVDMA Offset: 0x08) Device DMA Channel Control Register */
+  __IO uint32_t DEVDMASTATUS; /**< (DEVDMA Offset: 0x0C) Device DMA Channel Status Register */
+} devdma_t;
+
+/** \brief HSTDMA hardware registers */
+typedef struct
+{  
+  __IO uint32_t HSTDMANXTDSC; /**< (HSTDMA Offset: 0x00) Host DMA Channel Next Descriptor Address Register */
+  __IO uint32_t HSTDMAADDRESS; /**< (HSTDMA Offset: 0x04) Host DMA Channel Address Register */
+  __IO uint32_t HSTDMACONTROL; /**< (HSTDMA Offset: 0x08) Host DMA Channel Control Register */
+  __IO uint32_t HSTDMASTATUS; /**< (HSTDMA Offset: 0x0C) Host DMA Channel Status Register */
+} hstdma_t;
+
+/** \brief USBHS hardware registers */
+typedef struct
+{  
+  __IO uint32_t DEVCTRL;  /**< (USBHS Offset: 0x00) Device General Control Register */
+  __I  uint32_t DEVISR;   /**< (USBHS Offset: 0x04) Device Global Interrupt Status Register */
+  __O  uint32_t DEVICR;   /**< (USBHS Offset: 0x08) Device Global Interrupt Clear Register */
+  __O  uint32_t DEVIFR;   /**< (USBHS Offset: 0x0C) Device Global Interrupt Set Register */
+  __I  uint32_t DEVIMR;   /**< (USBHS Offset: 0x10) Device Global Interrupt Mask Register */
+  __O  uint32_t DEVIDR;   /**< (USBHS Offset: 0x14) Device Global Interrupt Disable Register */
+  __O  uint32_t DEVIER;   /**< (USBHS Offset: 0x18) Device Global Interrupt Enable Register */
+  __IO uint32_t DEVEPT;   /**< (USBHS Offset: 0x1C) Device Endpoint Register */
+  __I  uint32_t DEVFNUM;  /**< (USBHS Offset: 0x20) Device Frame Number Register */
+  __I  uint8_t                        Reserved1[220];
+  __IO uint32_t DEVEPTCFG[10]; /**< (USBHS Offset: 0x100) Device Endpoint Configuration Register */
+  __I  uint8_t                        Reserved2[8];
+  __I  uint32_t DEVEPTISR[10]; /**< (USBHS Offset: 0x130) Device Endpoint Interrupt Status Register */
+  __I  uint8_t                        Reserved3[8];
+  __O  uint32_t DEVEPTICR[10]; /**< (USBHS Offset: 0x160) Device Endpoint Interrupt Clear Register */
+  __I  uint8_t                        Reserved4[8];
+  __O  uint32_t DEVEPTIFR[10]; /**< (USBHS Offset: 0x190) Device Endpoint Interrupt Set Register */
+  __I  uint8_t                        Reserved5[8];
+  __I  uint32_t DEVEPTIMR[10]; /**< (USBHS Offset: 0x1C0) Device Endpoint Interrupt Mask Register */
+  __I  uint8_t                        Reserved6[8];
+  __O  uint32_t DEVEPTIER[10]; /**< (USBHS Offset: 0x1F0) Device Endpoint Interrupt Enable Register */
+  __I  uint8_t                        Reserved7[8];
+  __O  uint32_t DEVEPTIDR[10]; /**< (USBHS Offset: 0x220) Device Endpoint Interrupt Disable Register */
+  __I  uint8_t                        Reserved8[200];
+       devdma_t DEVDMA[7]; /**< Offset: 0x310 Device DMA Channel Next Descriptor Address Register */
+  __I  uint8_t                        Reserved9[128];
+  __IO uint32_t HSTCTRL;  /**< (USBHS Offset: 0x400) Host General Control Register */
+  __I  uint32_t HSTISR;   /**< (USBHS Offset: 0x404) Host Global Interrupt Status Register */
+  __O  uint32_t HSTICR;   /**< (USBHS Offset: 0x408) Host Global Interrupt Clear Register */
+  __O  uint32_t HSTIFR;   /**< (USBHS Offset: 0x40C) Host Global Interrupt Set Register */
+  __I  uint32_t HSTIMR;   /**< (USBHS Offset: 0x410) Host Global Interrupt Mask Register */
+  __O  uint32_t HSTIDR;   /**< (USBHS Offset: 0x414) Host Global Interrupt Disable Register */
+  __O  uint32_t HSTIER;   /**< (USBHS Offset: 0x418) Host Global Interrupt Enable Register */
+  __IO uint32_t HSTPIP;   /**< (USBHS Offset: 0x41C) Host Pipe Register */
+  __IO uint32_t HSTFNUM;  /**< (USBHS Offset: 0x420) Host Frame Number Register */
+  __IO uint32_t HSTADDR1; /**< (USBHS Offset: 0x424) Host Address 1 Register */
+  __IO uint32_t HSTADDR2; /**< (USBHS Offset: 0x428) Host Address 2 Register */
+  __IO uint32_t HSTADDR3; /**< (USBHS Offset: 0x42C) Host Address 3 Register */
+  __I  uint8_t                        Reserved10[208];
+  __IO uint32_t HSTPIPCFG[10]; /**< (USBHS Offset: 0x500) Host Pipe Configuration Register */
+  __I  uint8_t                        Reserved11[8];
+  __I  uint32_t HSTPIPISR[10]; /**< (USBHS Offset: 0x530) Host Pipe Status Register */
+  __I  uint8_t                        Reserved12[8];
+  __O  uint32_t HSTPIPICR[10]; /**< (USBHS Offset: 0x560) Host Pipe Clear Register */
+  __I  uint8_t                        Reserved13[8];
+  __O  uint32_t HSTPIPIFR[10]; /**< (USBHS Offset: 0x590) Host Pipe Set Register */
+  __I  uint8_t                        Reserved14[8];
+  __I  uint32_t HSTPIPIMR[10]; /**< (USBHS Offset: 0x5C0) Host Pipe Mask Register */
+  __I  uint8_t                        Reserved15[8];
+  __O  uint32_t HSTPIPIER[10]; /**< (USBHS Offset: 0x5F0) Host Pipe Enable Register */
+  __I  uint8_t                        Reserved16[8];
+  __O  uint32_t HSTPIPIDR[10]; /**< (USBHS Offset: 0x620) Host Pipe Disable Register */
+  __I  uint8_t                        Reserved17[8];
+  __IO uint32_t HSTPIPINRQ[10]; /**< (USBHS Offset: 0x650) Host Pipe IN Request Register */
+  __I  uint8_t                        Reserved18[8];
+  __IO uint32_t HSTPIPERR[10]; /**< (USBHS Offset: 0x680) Host Pipe Error Register */
+  __I  uint8_t                        Reserved19[104];
+       hstdma_t HSTDMA[7]; /**< Offset: 0x710 Host DMA Channel Next Descriptor Address Register */
+  __I  uint8_t                        Reserved20[128];
+  __IO uint32_t CTRL;     /**< (USBHS Offset: 0x800) General Control Register */
+  __I  uint32_t SR;       /**< (USBHS Offset: 0x804) General Status Register */
+  __O  uint32_t SCR;      /**< (USBHS Offset: 0x808) General Status Clear Register */
+  __O  uint32_t SFR;      /**< (USBHS Offset: 0x80C) General Status Set Register */
+} dcd_registers_t;
+
+#define USB_REG           ((dcd_registers_t *)0x40038000U)         /**< \brief (USBHS) Base Address */
+
+#define EP_MAX            10
+
+#define FIFO_RAM_ADDR     0xA0100000u
+
+// Errata: The DMA feature is not available for Pipe/Endpoint 7
+#define EP_DMA_SUPPORT(epnum) (epnum >= 1 && epnum <= 6)
+
+#else // TODO : SAM3U
+
+
+#endif
+
+#endif /* _COMMON_USB_REGS_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/nxp/lpc17_40/dcd_lpc17_40.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
new file mode 100644
index 00000000000..07daa32e42b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
@@ -0,0 +1,152 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_DCD_LPC17_40_H_
+#define _TUSB_DCD_LPC17_40_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Register Interface
+//--------------------------------------------------------------------+
+
+//------------- USB Interrupt USBIntSt -------------//
+//enum {
+//  DCD_USB_REQ_LOW_PRIO_MASK   = TU_BIT(0),
+//  DCD_USB_REQ_HIGH_PRIO_MASK  = TU_BIT(1),
+//  DCD_USB_REQ_DMA_MASK        = TU_BIT(2),
+//  DCD_USB_REQ_NEED_CLOCK_MASK = TU_BIT(8),
+//  DCD_USB_REQ_ENABLE_MASK     = TU_BIT(31)
+//};
+
+//------------- Device Interrupt USBDevInt -------------//
+enum {
+  DEV_INT_FRAME_MASK              = TU_BIT(0),
+  DEV_INT_ENDPOINT_FAST_MASK      = TU_BIT(1),
+  DEV_INT_ENDPOINT_SLOW_MASK      = TU_BIT(2),
+  DEV_INT_DEVICE_STATUS_MASK      = TU_BIT(3),
+  DEV_INT_COMMAND_CODE_EMPTY_MASK = TU_BIT(4),
+  DEV_INT_COMMAND_DATA_FULL_MASK  = TU_BIT(5),
+  DEV_INT_RX_ENDPOINT_PACKET_MASK = TU_BIT(6),
+  DEV_INT_TX_ENDPOINT_PACKET_MASK = TU_BIT(7),
+  DEV_INT_ENDPOINT_REALIZED_MASK  = TU_BIT(8),
+  DEV_INT_ERROR_MASK              = TU_BIT(9)
+};
+
+//------------- DMA Interrupt USBDMAInt-------------//
+enum {
+  DMA_INT_END_OF_XFER_MASK    = TU_BIT(0),
+  DMA_INT_NEW_DD_REQUEST_MASK = TU_BIT(1),
+  DMA_INT_ERROR_MASK          = TU_BIT(2)
+};
+
+//------------- USBCtrl -------------//
+enum {
+  USBCTRL_READ_ENABLE_MASK  = TU_BIT(0),
+  USBCTRL_WRITE_ENABLE_MASK = TU_BIT(1),
+};
+
+//------------- USBRxPLen -------------//
+enum {
+  USBRXPLEN_PACKET_LENGTH_MASK = (TU_BIT(10)-1),
+  USBRXPLEN_DATA_VALID_MASK    = TU_BIT(10),
+  USBRXPLEN_PACKET_READY_MASK  = TU_BIT(11),
+};
+
+//------------- SIE Command Code -------------//
+typedef enum
+{
+  SIE_CMDPHASE_WRITE   = 1,
+  SIE_CMDPHASE_READ    = 2,
+  SIE_CMDPHASE_COMMAND = 5
+} sie_cmdphase_t;
+
+enum {
+  // device commands
+  SIE_CMDCODE_SET_ADDRESS                     = 0xd0,
+  SIE_CMDCODE_CONFIGURE_DEVICE                = 0xd8,
+  SIE_CMDCODE_SET_MODE                        = 0xf3,
+  SIE_CMDCODE_READ_FRAME_NUMBER               = 0xf5,
+  SIE_CMDCODE_READ_TEST_REGISTER              = 0xfd,
+  SIE_CMDCODE_DEVICE_STATUS                   = 0xfe,
+  SIE_CMDCODE_GET_ERROR                       = 0xff,
+  SIE_CMDCODE_READ_ERROR_STATUS               = 0xfb,
+
+  // endpoint commands
+  SIE_CMDCODE_ENDPOINT_SELECT                 = 0x00, // + endpoint index
+  SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT = 0x40, // + endpoint index, should use USBEpIntClr instead
+  SIE_CMDCODE_ENDPOINT_SET_STATUS             = 0x40, // + endpoint index
+  SIE_CMDCODE_BUFFER_CLEAR                    = 0xf2,
+  SIE_CMDCODE_BUFFER_VALIDATE                 = 0xfa
+};
+
+//------------- SIE Device Status (get/set from SIE_CMDCODE_DEVICE_STATUS) -------------//
+enum {
+  SIE_DEV_STATUS_CONNECT_STATUS_MASK = TU_BIT(0),
+  SIE_DEV_STATUS_CONNECT_CHANGE_MASK = TU_BIT(1),
+  SIE_DEV_STATUS_SUSPEND_MASK        = TU_BIT(2),
+  SIE_DEV_STATUS_SUSPEND_CHANGE_MASK = TU_BIT(3),
+  SIE_DEV_STATUS_RESET_MASK          = TU_BIT(4)
+};
+
+//------------- SIE Select Endpoint Command -------------//
+enum {
+  SIE_SELECT_ENDPOINT_FULL_EMPTY_MASK         = TU_BIT(0), // 0: empty, 1 full. IN endpoint checks empty, OUT endpoint check full
+  SIE_SELECT_ENDPOINT_STALL_MASK              = TU_BIT(1),
+  SIE_SELECT_ENDPOINT_SETUP_RECEIVED_MASK     = TU_BIT(2), // clear by SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT
+  SIE_SELECT_ENDPOINT_PACKET_OVERWRITTEN_MASK = TU_BIT(3), // previous packet is overwritten by a SETUP packet
+  SIE_SELECT_ENDPOINT_NAK_MASK                = TU_BIT(4), // last packet response is NAK (auto clear by an ACK)
+  SIE_SELECT_ENDPOINT_BUFFER1_FULL_MASK       = TU_BIT(5),
+  SIE_SELECT_ENDPOINT_BUFFER2_FULL_MASK       = TU_BIT(6)
+};
+
+typedef enum
+{
+  SIE_SET_ENDPOINT_STALLED_MASK           = TU_BIT(0),
+  SIE_SET_ENDPOINT_DISABLED_MASK          = TU_BIT(5),
+  SIE_SET_ENDPOINT_RATE_FEEDBACK_MASK     = TU_BIT(6),
+  SIE_SET_ENDPOINT_CONDITION_STALLED_MASK = TU_BIT(7),
+}sie_endpoint_set_status_mask_t;
+
+//------------- DMA Descriptor Status -------------//
+enum {
+  DD_STATUS_NOT_SERVICED = 0,
+  DD_STATUS_BEING_SERVICED,
+  DD_STATUS_NORMAL,
+  DD_STATUS_DATA_UNDERUN, // short packet
+  DD_STATUS_DATA_OVERRUN,
+  DD_STATUS_SYSTEM_ERROR
+};
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/nxp/transdimension/common_transdimension.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/nxp/transdimension/common_transdimension.h
new file mode 100644
index 00000000000..69074de418e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/nxp/transdimension/common_transdimension.h
@@ -0,0 +1,136 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef COMMON_TRANSDIMENSION_H_
+#define COMMON_TRANSDIMENSION_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// USBCMD
+enum {
+  USBCMD_RUN_STOP         = TU_BIT(0),
+  USBCMD_RESET            = TU_BIT(1),
+  USBCMD_SETUP_TRIPWIRE   = TU_BIT(13),
+  USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14)  ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD
+// Interrupt Threshold bit 23:16
+};
+
+// PORTSC1
+#define PORTSC1_PORT_SPEED_POS    26
+
+enum {
+  PORTSC1_CURRENT_CONNECT_STATUS = TU_BIT(0),
+  PORTSC1_FORCE_PORT_RESUME      = TU_BIT(6),
+  PORTSC1_SUSPEND                = TU_BIT(7),
+  PORTSC1_FORCE_FULL_SPEED       = TU_BIT(24),
+  PORTSC1_PORT_SPEED             = TU_BIT(26) | TU_BIT(27)
+};
+
+// OTGSC
+enum {
+  OTGSC_VBUS_DISCHARGE          = TU_BIT(0),
+  OTGSC_VBUS_CHARGE             = TU_BIT(1),
+//  OTGSC_HWASSIST_AUTORESET    = TU_BIT(2),
+  OTGSC_OTG_TERMINATION         = TU_BIT(3), ///< Must set to 1 when OTG go to device mode
+  OTGSC_DATA_PULSING            = TU_BIT(4),
+  OTGSC_ID_PULLUP               = TU_BIT(5),
+//  OTGSC_HWASSIT_DATA_PULSE    = TU_BIT(6),
+//  OTGSC_HWASSIT_BDIS_ACONN    = TU_BIT(7),
+  OTGSC_ID                      = TU_BIT(8), ///< 0 = A device, 1 = B Device
+  OTGSC_A_VBUS_VALID            = TU_BIT(9),
+  OTGSC_A_SESSION_VALID         = TU_BIT(10),
+  OTGSC_B_SESSION_VALID         = TU_BIT(11),
+  OTGSC_B_SESSION_END           = TU_BIT(12),
+  OTGSC_1MS_TOGGLE              = TU_BIT(13),
+  OTGSC_DATA_BUS_PULSING_STATUS = TU_BIT(14),
+};
+
+// USBMode
+enum {
+  USBMODE_CM_DEVICE = 2,
+  USBMODE_CM_HOST   = 3,
+
+  USBMODE_SLOM = TU_BIT(3),
+  USBMODE_SDIS = TU_BIT(4),
+
+  USBMODE_VBUS_POWER_SELECT = TU_BIT(5), // Need to be enabled for LPC18XX/43XX in host mode
+};
+
+// Device Registers
+typedef struct
+{
+  //------------- ID + HW Parameter Registers-------------//
+  __I  uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX
+
+  //------------- Capability Registers-------------//
+  __I  uint8_t  CAPLENGTH;       ///< Capability Registers Length
+  __I  uint8_t  TU_RESERVED[1];
+  __I  uint16_t HCIVERSION;      ///< Host Controller Interface Version
+
+  __I  uint32_t HCSPARAMS;       ///< Host Controller Structural Parameters
+  __I  uint32_t HCCPARAMS;       ///< Host Controller Capability Parameters
+  __I  uint32_t TU_RESERVED[5];
+
+  __I  uint16_t DCIVERSION;      ///< Device Controller Interface Version
+  __I  uint8_t  TU_RESERVED[2];
+
+  __I  uint32_t DCCPARAMS;       ///< Device Controller Capability Parameters
+  __I  uint32_t TU_RESERVED[6];
+
+  //------------- Operational Registers -------------//
+  __IO uint32_t USBCMD;          ///< USB Command Register
+  __IO uint32_t USBSTS;          ///< USB Status Register
+  __IO uint32_t USBINTR;         ///< Interrupt Enable Register
+  __IO uint32_t FRINDEX;         ///< USB Frame Index
+  __I  uint32_t TU_RESERVED;
+  __IO uint32_t DEVICEADDR;      ///< Device Address
+  __IO uint32_t ENDPTLISTADDR;   ///< Endpoint List Address
+  __I  uint32_t TU_RESERVED;
+  __IO uint32_t BURSTSIZE;       ///< Programmable Burst Size
+  __IO uint32_t TXFILLTUNING;    ///< TX FIFO Fill Tuning
+       uint32_t TU_RESERVED[4];
+  __IO uint32_t ENDPTNAK;        ///< Endpoint NAK
+  __IO uint32_t ENDPTNAKEN;      ///< Endpoint NAK Enable
+  __I  uint32_t TU_RESERVED;
+  __IO uint32_t PORTSC1;         ///< Port Status & Control
+  __I  uint32_t TU_RESERVED[7];
+  __IO uint32_t OTGSC;           ///< On-The-Go Status & control
+  __IO uint32_t USBMODE;         ///< USB Device Mode
+  __IO uint32_t ENDPTSETUPSTAT;  ///< Endpoint Setup Status
+  __IO uint32_t ENDPTPRIME;      ///< Endpoint Prime
+  __IO uint32_t ENDPTFLUSH;      ///< Endpoint Flush
+  __I  uint32_t ENDPTSTAT;       ///< Endpoint Status
+  __IO uint32_t ENDPTCOMPLETE;   ///< Endpoint Complete
+  __IO uint32_t ENDPTCTRL[8];    ///< Endpoint Control 0 - 7
+} dcd_registers_t, hcd_registers_t;
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* COMMON_TRANSDIMENSION_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/ohci/ohci.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/ohci/ohci.h
new file mode 100644
index 00000000000..9fc954c8f07
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/ohci/ohci.h
@@ -0,0 +1,278 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_OHCI_H_
+#define _TUSB_OHCI_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// OHCI CONFIGURATION & CONSTANTS
+//--------------------------------------------------------------------+
+#define HOST_HCD_XFER_INTERRUPT // TODO interrupt is used widely, should always be enalbed
+#define OHCI_PERIODIC_LIST (defined HOST_HCD_XFER_INTERRUPT || defined HOST_HCD_XFER_ISOCHRONOUS)
+
+// TODO merge OHCI with EHCI
+enum {
+  OHCI_MAX_ITD = 4
+};
+
+#define ED_MAX       (CFG_TUH_DEVICE_MAX*CFG_TUH_ENDPOINT_MAX)
+#define GTD_MAX      ED_MAX
+
+//--------------------------------------------------------------------+
+// OHCI Data Structure
+//--------------------------------------------------------------------+
+typedef struct {
+  uint32_t interrupt_table[32];
+  volatile uint16_t frame_number;
+  volatile uint16_t frame_pad;
+  volatile uint32_t done_head;
+  uint8_t reserved[116+4];  // TODO try to make use of this area if possible, extra 4 byte to make the whole struct size = 256
+}ohci_hcca_t; // TU_ATTR_ALIGNED(256)
+
+TU_VERIFY_STATIC( sizeof(ohci_hcca_t) == 256, "size is not correct" );
+
+typedef struct {
+  uint32_t reserved[2];
+  volatile uint32_t next;
+  uint32_t reserved2;
+}ohci_td_item_t;
+
+typedef struct TU_ATTR_ALIGNED(16)
+{
+	// Word 0
+	uint32_t used                    : 1;
+	uint32_t index                   : 4;  // endpoint index the td belongs to, or device address in case of control xfer
+  uint32_t expected_bytes          : 13; // TODO available for hcd
+
+  uint32_t buffer_rounding         : 1;
+  uint32_t pid                     : 2;
+  uint32_t delay_interrupt         : 3;
+  volatile uint32_t data_toggle    : 2;
+  volatile uint32_t error_count    : 2;
+  volatile uint32_t condition_code : 4;
+
+	// Word 1
+	volatile uint8_t* current_buffer_pointer;
+
+	// Word 2 : next TD
+	volatile uint32_t next;
+
+	// Word 3
+	uint8_t* buffer_end;
+} ohci_gtd_t;
+
+TU_VERIFY_STATIC( sizeof(ohci_gtd_t) == 16, "size is not correct" );
+
+typedef struct TU_ATTR_ALIGNED(16)
+{
+  // Word 0
+	uint32_t dev_addr          : 7;
+	uint32_t ep_number         : 4;
+	uint32_t pid               : 2;
+	uint32_t speed             : 1;
+	uint32_t skip              : 1;
+	uint32_t is_iso            : 1;
+	uint32_t max_packet_size   : 11;
+	      // HCD: make use of 5 reserved bits
+	uint32_t used              : 1;
+	uint32_t is_interrupt_xfer : 1;
+	uint32_t is_stalled        : 1;
+	uint32_t                   : 2;
+
+	// Word 1
+	uint32_t td_tail;
+
+	// Word 2
+	volatile union {
+		uint32_t address;
+		struct {
+			uint32_t halted : 1;
+			uint32_t toggle : 1;
+			uint32_t : 30;
+		};
+	}td_head;
+
+	// Word 3: next ED
+	uint32_t next;
+} ohci_ed_t;
+
+TU_VERIFY_STATIC( sizeof(ohci_ed_t) == 16, "size is not correct" );
+
+typedef struct TU_ATTR_ALIGNED(32)
+{
+	/*---------- Word 1 ----------*/
+  uint32_t starting_frame          : 16;
+  uint32_t                         : 5; // can be used
+  uint32_t delay_interrupt         : 3;
+  uint32_t frame_count             : 3;
+  uint32_t                         : 1; // can be used
+  volatile uint32_t condition_code : 4;
+
+	/*---------- Word 2 ----------*/
+	uint32_t buffer_page0;	// 12 lsb bits can be used
+
+	/*---------- Word 3 ----------*/
+	volatile uint32_t next;
+
+	/*---------- Word 4 ----------*/
+	uint32_t buffer_end;
+
+	/*---------- Word 5-8 ----------*/
+	volatile uint16_t offset_packetstatus[8];
+} ochi_itd_t;
+
+TU_VERIFY_STATIC( sizeof(ochi_itd_t) == 32, "size is not correct" );
+
+// structure with member alignment required from large to small
+typedef struct TU_ATTR_ALIGNED(256)
+{
+  ohci_hcca_t hcca;
+
+  ohci_ed_t bulk_head_ed; // static bulk head (dummy)
+  ohci_ed_t period_head_ed; // static periodic list head (dummy)
+
+  // control endpoints has reserved resources
+  struct {
+    ohci_ed_t ed;
+    ohci_gtd_t gtd;
+  }control[CFG_TUH_DEVICE_MAX+CFG_TUH_HUB+1];
+
+  //  ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32
+  ohci_ed_t ed_pool[ED_MAX];
+  ohci_gtd_t gtd_pool[GTD_MAX];
+
+  volatile uint16_t frame_number_hi;
+
+} ohci_data_t;
+
+//--------------------------------------------------------------------+
+// OHCI Operational Register
+//--------------------------------------------------------------------+
+
+
+//--------------------------------------------------------------------+
+// OHCI Data Organization
+//--------------------------------------------------------------------+
+typedef volatile struct
+{
+  uint32_t revision;
+
+  union {
+    uint32_t control;
+    struct {
+      uint32_t control_bulk_service_ratio : 2;
+      uint32_t periodic_list_enable       : 1;
+      uint32_t isochronous_enable         : 1;
+      uint32_t control_list_enable        : 1;
+      uint32_t bulk_list_enable           : 1;
+      uint32_t hc_functional_state        : 2;
+      uint32_t interrupt_routing          : 1;
+      uint32_t remote_wakeup_connected    : 1;
+      uint32_t remote_wakeup_enale        : 1;
+      uint32_t TU_RESERVED                : 21;
+    }control_bit;
+  };
+
+  union {
+    uint32_t command_status;
+    struct {
+      uint32_t controller_reset         : 1;
+      uint32_t control_list_filled      : 1;
+      uint32_t bulk_list_filled         : 1;
+      uint32_t ownership_change_request : 1;
+      uint32_t                          : 12;
+      uint32_t scheduling_overrun_count : 2;
+    }command_status_bit;
+  };
+
+  uint32_t interrupt_status;
+  uint32_t interrupt_enable;
+  uint32_t interrupt_disable;
+
+  uint32_t hcca;
+  uint32_t period_current_ed;
+  uint32_t control_head_ed;
+  uint32_t control_current_ed;
+  uint32_t bulk_head_ed;
+  uint32_t bulk_current_ed;
+  uint32_t done_head;
+
+  uint32_t frame_interval;
+  uint32_t frame_remaining;
+  uint32_t frame_number;
+  uint32_t periodic_start;
+  uint32_t lowspeed_threshold;
+
+  uint32_t rh_descriptorA;
+  uint32_t rh_descriptorB;
+
+  union {
+    uint32_t rh_status;
+    struct {
+      uint32_t local_power_status            : 1; // read Local Power Status; write: Clear Global Power
+      uint32_t over_current_indicator        : 1;
+      uint32_t                               : 13;
+      uint32_t device_remote_wakeup_enable   : 1;
+      uint32_t local_power_status_change     : 1;
+      uint32_t over_current_indicator_change : 1;
+      uint32_t                               : 13;
+      uint32_t clear_remote_wakeup_enable    : 1;
+    }rh_status_bit;
+  };
+
+  union {
+    uint32_t rhport_status[2]; // TODO NXP OHCI controller only has 2 ports
+    struct {
+      uint32_t current_connect_status             : 1;
+      uint32_t port_enable_status                 : 1;
+      uint32_t port_suspend_status                : 1;
+      uint32_t port_over_current_indicator        : 1;
+      uint32_t port_reset_status                  : 1;
+      uint32_t                                    : 3;
+      uint32_t port_power_status                  : 1;
+      uint32_t low_speed_device_attached          : 1;
+      uint32_t                                    : 6;
+      uint32_t connect_status_change              : 1;
+      uint32_t port_enable_status_change          : 1;
+      uint32_t port_suspend_status_change         : 1;
+      uint32_t port_over_current_indicator_change : 1;
+      uint32_t port_reset_status_change           : 1;
+      uint32_t TU_RESERVED                        : 11;
+    }rhport_status_bit[2];
+  };
+}ohci_registers_t;
+
+TU_VERIFY_STATIC( sizeof(ohci_registers_t) == 0x5c, "size is not correct");
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_OHCI_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/raspberrypi/rp2040/rp2040_usb.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/raspberrypi/rp2040/rp2040_usb.h
new file mode 100644
index 00000000000..da1933ddd4b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/raspberrypi/rp2040/rp2040_usb.h
@@ -0,0 +1,96 @@
+#ifndef RP2040_COMMON_H_
+#define RP2040_COMMON_H_
+
+#if defined(RP2040_USB_HOST_MODE) && defined(RP2040_USB_DEVICE_MODE)
+#error TinyUSB device and host mode not supported at the same time
+#endif
+
+#include "common/tusb_common.h"
+
+#include "pico.h"
+#include "hardware/structs/usb.h"
+#include "hardware/irq.h"
+#include "hardware/resets.h"
+
+#if defined(PICO_RP2040_USB_DEVICE_ENUMERATION_FIX) && !defined(TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX)
+#define TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX PICO_RP2040_USB_DEVICE_ENUMERATION_FIX
+#endif
+
+
+#define pico_info(...)  TU_LOG(2, __VA_ARGS__)
+#define pico_trace(...) TU_LOG(3, __VA_ARGS__)
+
+// Hardware information per endpoint
+typedef struct hw_endpoint
+{
+    // Is this a valid struct
+    bool configured;
+    
+    // Transfer direction (i.e. IN is rx for host but tx for device)
+    // allows us to common up transfer functions
+    bool rx;
+    
+    uint8_t ep_addr;
+    uint8_t next_pid;
+
+    // Endpoint control register
+    io_rw_32 *endpoint_control;
+
+    // Buffer control register
+    io_rw_32 *buffer_control;
+
+    // Buffer pointer in usb dpram
+    uint8_t *hw_data_buf;
+
+    // Current transfer information
+    bool active;
+    uint16_t remaining_len;
+    uint16_t xferred_len;
+
+    // User buffer in main memory
+    uint8_t *user_buf;
+
+    // Data needed from EP descriptor
+    uint16_t wMaxPacketSize;
+
+    // Interrupt, bulk, etc
+    uint8_t transfer_type;
+    
+#if CFG_TUH_ENABLED
+    // Only needed for host
+    uint8_t dev_addr;
+
+    // If interrupt endpoint
+    uint8_t interrupt_num;
+#endif
+} hw_endpoint_t;
+
+void rp2040_usb_init(void);
+
+void hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len);
+bool hw_endpoint_xfer_continue(struct hw_endpoint *ep);
+void hw_endpoint_reset_transfer(struct hw_endpoint *ep);
+
+void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask);
+static inline uint32_t _hw_endpoint_buffer_control_get_value32(struct hw_endpoint *ep) {
+    return *ep->buffer_control;
+}
+static inline void _hw_endpoint_buffer_control_set_value32(struct hw_endpoint *ep, uint32_t value) {
+    return _hw_endpoint_buffer_control_update32(ep, 0, value);
+}
+static inline void _hw_endpoint_buffer_control_set_mask32(struct hw_endpoint *ep, uint32_t value) {
+    return _hw_endpoint_buffer_control_update32(ep, ~value, value);
+}
+static inline void _hw_endpoint_buffer_control_clear_mask32(struct hw_endpoint *ep, uint32_t value) {
+    return _hw_endpoint_buffer_control_update32(ep, ~value, 0);
+}
+
+static inline uintptr_t hw_data_offset(uint8_t *buf)
+{
+    // Remove usb base from buffer pointer
+    return (uintptr_t)buf ^ (uintptr_t)usb_dpram;
+}
+
+extern const char *ep_dir_string[];
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
new file mode 100644
index 00000000000..bffae450001
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -0,0 +1,422 @@
+/**
+  ******************************************************************************
+  * @file    dcd_stm32f0_pvt_st.h
+  * @brief   DCD utilities from ST code
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  * <h2><center>&copy; parts COPYRIGHT(c) N Conrad</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  **********/
+
+// This file contains source copied from ST's HAL, and thus should have their copyright statement.
+
+// PMA_LENGTH is PMA buffer size in bytes.
+// On 512-byte devices, access with a stride of two words (use every other 16-bit address)
+// On 1024-byte devices, access with a stride of one word (use every 16-bit address)
+
+#ifndef PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
+#define PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
+
+#if defined(STM32F042x6) || \
+    defined(STM32F070x6) || defined(STM32F070xB) || \
+    defined(STM32F072xB) || \
+    defined(STM32F078xx)
+  #include "stm32f0xx.h"
+  #define PMA_LENGTH (1024u)
+  // F0x2 models are crystal-less
+  // All have internal D+ pull-up
+  // 070RB:    2 x 16 bits/word memory     LPM Support, BCD Support
+  // PMA dedicated to USB (no sharing with CAN)
+
+#elif defined(STM32F1_FSDEV)
+  #include "stm32f1xx.h"
+  #define PMA_LENGTH (512u)
+  // NO internal Pull-ups
+  //         *B, and *C:    2 x 16 bits/word
+
+  // F1 names this differently from the rest
+  #define USB_CNTR_LPMODE   USB_CNTR_LP_MODE
+
+#elif defined(STM32F302xB) || defined(STM32F302xC) || \
+      defined(STM32F303xB) || defined(STM32F303xC) || \
+      defined(STM32F373xC)
+  #include "stm32f3xx.h"
+  #define PMA_LENGTH (512u)
+  // NO internal Pull-ups
+  //         *B, and *C:    1 x 16 bits/word
+  // PMA dedicated to USB (no sharing with CAN)
+
+#elif defined(STM32F302x6) || defined(STM32F302x8) || \
+      defined(STM32F302xD) || defined(STM32F302xE) || \
+      defined(STM32F303xD) || defined(STM32F303xE)
+  #include "stm32f3xx.h"
+  #define PMA_LENGTH (1024u)
+  // NO internal Pull-ups
+  // *6, *8, *D, and *E:    2 x 16 bits/word     LPM Support
+  // When CAN clock is enabled, USB can use first 768 bytes ONLY.
+
+#elif CFG_TUSB_MCU == OPT_MCU_STM32L0
+  #include "stm32l0xx.h"
+  #define PMA_LENGTH (1024u)
+
+#elif CFG_TUSB_MCU == OPT_MCU_STM32L1
+  #include "stm32l1xx.h"
+  #define PMA_LENGTH (512u)
+
+#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
+  #include "stm32g4xx.h"
+  #define PMA_LENGTH (1024u)
+
+#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
+  #include "stm32wbxx.h"
+  #define PMA_LENGTH (1024u)
+  /* ST provided header has incorrect value */
+  #undef USB_PMAADDR
+  #define USB_PMAADDR USB1_PMAADDR
+
+#else
+  #error You are using an untested or unimplemented STM32 variant. Please update the driver.
+  // This includes L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4
+#endif
+
+// For purposes of accessing the packet
+#if ((PMA_LENGTH) == 512u)
+  #define PMA_STRIDE  (2u)
+#elif ((PMA_LENGTH) == 1024u)
+  #define PMA_STRIDE  (1u)
+#endif
+
+// And for type-safety create a new macro for the volatile address of PMAADDR
+// The compiler should warn us if we cast it to a non-volatile type?
+// Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
+static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
+
+// prototypes
+static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
+static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
+static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wRegValue);
+
+
+/* SetENDPOINT */
+static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wRegValue)
+{
+  __O uint16_t *reg = (__O uint16_t *)((&USBx->EP0R) + bEpNum*2u);
+  *reg = (uint16_t)wRegValue;
+}
+
+/* GetENDPOINT */
+static inline uint16_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpNum) {
+  __I uint16_t *reg = (__I uint16_t *)((&USBx->EP0R) + bEpNum*2u);
+  return *reg;
+}
+
+static inline void pcd_set_eptype(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wType)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  regVal &= (uint32_t)USB_EP_T_MASK;
+  regVal |= wType;
+  regVal |= USB_EP_CTR_RX | USB_EP_CTR_TX; // These clear on write0, so must set high
+  pcd_set_endpoint(USBx, bEpNum, regVal);
+}
+
+static inline uint32_t pcd_get_eptype(USB_TypeDef * USBx, uint32_t bEpNum)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  regVal &= USB_EP_T_FIELD;
+  return regVal;
+}
+/**
+  * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+static inline void pcd_clear_rx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpNum)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  regVal &= USB_EPREG_MASK;
+  regVal &= ~USB_EP_CTR_RX;
+  regVal |= USB_EP_CTR_TX; // preserve CTR_TX (clears on writing 0)
+  pcd_set_endpoint(USBx, bEpNum, regVal);
+}
+static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpNum)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  regVal &= USB_EPREG_MASK;
+  regVal &= ~USB_EP_CTR_TX;
+  regVal |= USB_EP_CTR_RX; // preserve CTR_RX (clears on writing 0)
+  pcd_set_endpoint(USBx, bEpNum,regVal);
+}
+/**
+  * @brief  gets counter of the tx buffer.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval Counter value
+  */
+static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpNum)
+{
+  __I uint16_t *regPtr = pcd_ep_tx_cnt_ptr(USBx, bEpNum);
+  return *regPtr & 0x3ffU;
+}
+
+static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpNum)
+{
+  __I uint16_t *regPtr = pcd_ep_rx_cnt_ptr(USBx, bEpNum);
+  return *regPtr & 0x3ffU;
+}
+
+/**
+  * @brief  Sets counter of rx buffer with no. of blocks.
+  * @param  dwReg Register
+  * @param  wCount Counter.
+  * @param  wNBlocks no. of Blocks.
+  * @retval None
+  */
+
+static inline void pcd_set_ep_cnt_rx_reg(__O uint16_t * pdwReg, size_t wCount)  {
+  uint32_t wNBlocks;
+  if(wCount > 62u)
+  {
+    wNBlocks = wCount >> 5u;
+    if((wCount & 0x1fU) == 0u)
+    {
+      wNBlocks--;
+    }
+    wNBlocks = wNBlocks << 10u;
+    wNBlocks |= 0x8000u; // Mark block size as 32byte
+    *pdwReg = (uint16_t)wNBlocks;
+  }
+  else
+  {
+    wNBlocks = wCount >> 1u;
+    if((wCount & 0x1U) != 0u)
+    {
+      wNBlocks++;
+    }
+    *pdwReg = (uint16_t)((wNBlocks) << 10u);
+  }
+}
+
+
+/**
+  * @brief  Sets address in an endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  bAddr Address.
+  * @retval None
+  */
+static inline void pcd_set_ep_address(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t bAddr)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  regVal &= USB_EPREG_MASK;
+  regVal |= bAddr;
+  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
+  pcd_set_endpoint(USBx, bEpNum,regVal);
+}
+
+static inline __IO uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x)
+{
+  size_t total_word_offset = (((USBx)->BTABLE)>>1) + x;
+  total_word_offset *= PMA_STRIDE;
+  return &(pma[total_word_offset]);
+}
+
+// Pointers to the PMA table entries (using the ARM address space)
+static inline __IO uint16_t* pcd_ep_tx_address_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+{
+  return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 0u);
+}
+static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+{
+  return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 1u);
+}
+
+static inline __IO uint16_t* pcd_ep_rx_address_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+{
+  return  pcd_btable_word_ptr(USBx,(bEpNum)*4u + 2u);
+}
+
+static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+{
+  return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 3u);
+}
+
+static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
+{
+  *pcd_ep_tx_cnt_ptr(USBx, bEpNum) = (uint16_t)wCount;
+}
+
+static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
+{
+  __IO uint16_t *pdwReg = pcd_ep_rx_cnt_ptr((USBx),(bEpNum));
+  pcd_set_ep_cnt_rx_reg(pdwReg, wCount);
+}
+
+/**
+  * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  wState new state
+  * @retval None
+  */
+static inline void pcd_set_ep_tx_status(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wState)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  regVal &= USB_EPTX_DTOGMASK;
+
+  /* toggle first bit ? */
+  if((USB_EPTX_DTOG1 & (wState))!= 0U)
+  {
+    regVal ^= USB_EPTX_DTOG1;
+  }
+  /* toggle second bit ?  */
+  if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U)
+  {
+    regVal ^= USB_EPTX_DTOG2;
+  }
+  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
+  pcd_set_endpoint(USBx, bEpNum, regVal);
+} /* pcd_set_ep_tx_status */
+
+/**
+  * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  wState new state
+  * @retval None
+  */
+
+static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wState)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  regVal &= USB_EPRX_DTOGMASK;
+
+  /* toggle first bit ? */
+  if((USB_EPRX_DTOG1 & wState)!= 0U)
+  {
+    regVal ^= USB_EPRX_DTOG1;
+  }
+  /* toggle second bit ? */
+  if((USB_EPRX_DTOG2 & wState)!= 0U)
+  {
+    regVal ^= USB_EPRX_DTOG2;
+  }
+  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
+  pcd_set_endpoint(USBx, bEpNum, regVal);
+} /* pcd_set_ep_rx_status */
+
+static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpNum)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  return (regVal & USB_EPRX_STAT) >> (12u);
+} /* pcd_get_ep_rx_status */
+
+
+/**
+  * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+static inline void pcd_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  regVal &= USB_EPREG_MASK;
+  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX;
+  pcd_set_endpoint(USBx, bEpNum, regVal);
+}
+
+static inline void pcd_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  regVal &= USB_EPREG_MASK;
+  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX;
+  pcd_set_endpoint(USBx, bEpNum, regVal);
+}
+
+/**
+  * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+
+static inline void pcd_clear_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  if((regVal & USB_EP_DTOG_RX) != 0)
+  {
+    pcd_rx_dtog(USBx,bEpNum);
+  }
+}
+
+static inline void pcd_clear_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  if((regVal & USB_EP_DTOG_TX) != 0)
+  {
+    pcd_tx_dtog(USBx,bEpNum);
+  }
+}
+
+/**
+  * @brief  set & clear EP_KIND bit.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+
+static inline void pcd_set_ep_kind(USB_TypeDef * USBx,  uint32_t bEpNum)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  regVal |= USB_EP_KIND;
+  regVal &= USB_EPREG_MASK;
+  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
+  pcd_set_endpoint(USBx, bEpNum, regVal);
+}
+static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, uint32_t bEpNum)
+{
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  regVal &= USB_EPKIND_MASK;
+  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
+  pcd_set_endpoint(USBx, bEpNum, regVal);
+}
+
+// This checks if the device has "LPM"
+#if defined(USB_ISTR_L1REQ)
+#define USB_ISTR_L1REQ_FORCED (USB_ISTR_L1REQ)
+#else
+#define USB_ISTR_L1REQ_FORCED ((uint16_t)0x0000U)
+#endif
+
+#define USB_ISTR_ALL_EVENTS (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | \
+     USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ_FORCED )
+
+// Number of endpoints in hardware
+#define STFSDEV_EP_COUNT (8u)
+
+#endif /* PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/st/synopsys/synopsys_common.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/st/synopsys/synopsys_common.h
new file mode 100644
index 00000000000..6f0602fe9c8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/st/synopsys/synopsys_common.h
@@ -0,0 +1,1465 @@
+/**
+  ******************************************************************************
+  * @file    synopsys_common.h
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M3 Device USB OTG peripheral Header File. 
+  *          This file contains the USB OTG peripheral register's definitions, bits 
+  *          definitions and memory mapping for STM32F1xx devices.
+  *            
+  *          This file contains:
+  *           - Data structures and the address mapping for the USB OTG peripheral
+  *           - The Peripheral's registers declarations and bits definition
+  *           - Macros to access the peripheral's registers hardware
+  *  
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+#include "stdint.h"
+
+#pragma once
+
+#ifdef __cplusplus
+  #define   __I   volatile
+#else
+  #define   __I   volatile const
+#endif
+#define     __O   volatile
+#define     __IO  volatile
+#define     __IM  volatile const
+#define     __OM  volatile
+#define     __IOM volatile
+
+/** 
+  * @brief __USB_OTG_Core_register
+  */
+
+typedef struct
+{
+  __IO uint32_t GOTGCTL;              /*!<  USB_OTG Control and Status Register       Address offset: 000h */
+  __IO uint32_t GOTGINT;              /*!<  USB_OTG Interrupt Register                Address offset: 004h */
+  __IO uint32_t GAHBCFG;              /*!<  Core AHB Configuration Register           Address offset: 008h */
+  __IO uint32_t GUSBCFG;              /*!<  Core USB Configuration Register           Address offset: 00Ch */
+  __IO uint32_t GRSTCTL;              /*!<  Core Reset Register                       Address offset: 010h */
+  __IO uint32_t GINTSTS;              /*!<  Core Interrupt Register                   Address offset: 014h */
+  __IO uint32_t GINTMSK;              /*!<  Core Interrupt Mask Register              Address offset: 018h */
+  __IO uint32_t GRXSTSR;              /*!<  Receive Sts Q Read Register               Address offset: 01Ch */
+  __IO uint32_t GRXSTSP;              /*!<  Receive Sts Q Read & POP Register         Address offset: 020h */
+  __IO uint32_t GRXFSIZ;              /*!< Receive FIFO Size Register                 Address offset: 024h */
+  __IO uint32_t DIEPTXF0_HNPTXFSIZ;   /*!<  EP0 / Non Periodic Tx FIFO Size Register  Address offset: 028h */
+  __IO uint32_t HNPTXSTS;             /*!<  Non Periodic Tx FIFO/Queue Sts reg        Address offset: 02Ch */
+  uint32_t Reserved30[2];             /*!< Reserved 030h*/
+  __IO uint32_t GCCFG;                /*!< General Purpose IO Register                Address offset: 038h */
+  __IO uint32_t CID;                  /*!< User ID Register                           Address offset: 03Ch */
+  uint32_t  Reserved40[48];           /*!< Reserved 040h-0FFh */
+  __IO uint32_t HPTXFSIZ;             /*!< Host Periodic Tx FIFO Size Reg             Address offset: 100h */
+  __IO uint32_t DIEPTXF[0x0F];        /*!< dev Periodic Transmit FIFO                 Address offset: 0x104 */
+} USB_OTG_GlobalTypeDef;
+
+/** 
+  * @brief __device_Registers
+  */
+
+typedef struct 
+{
+  __IO uint32_t DCFG;                 /*!< dev Configuration Register                 Address offset: 800h*/
+  __IO uint32_t DCTL;                 /*!< dev Control Register                       Address offset: 804h*/
+  __IO uint32_t DSTS;                 /*!< dev Status Register (RO)                   Address offset: 808h*/
+  uint32_t Reserved0C;                /*!< Reserved 80Ch*/
+  __IO uint32_t DIEPMSK;              /*!< dev IN Endpoint Mask                       Address offset: 810h*/
+  __IO uint32_t DOEPMSK;              /*!< dev OUT Endpoint Mask                      Address offset: 814h*/
+  __IO uint32_t DAINT;                /*!< dev All Endpoints Itr Reg                  Address offset: 818h*/
+  __IO uint32_t DAINTMSK;             /*!< dev All Endpoints Itr Mask                 Address offset: 81Ch*/
+  uint32_t  Reserved20;               /*!< Reserved 820h*/
+  uint32_t Reserved9;                 /*!< Reserved 824h*/
+  __IO uint32_t DVBUSDIS;             /*!< dev VBUS discharge Register                Address offset: 828h*/
+  __IO uint32_t DVBUSPULSE;           /*!< dev VBUS Pulse Register                    Address offset: 82Ch*/
+  __IO uint32_t DTHRCTL;              /*!< dev thr                                    Address offset: 830h*/
+  __IO uint32_t DIEPEMPMSK;           /*!< dev empty msk                              Address offset: 834h*/
+  __IO uint32_t DEACHINT;             /*!< dedicated EP interrupt                     Address offset: 838h*/
+  __IO uint32_t DEACHMSK;             /*!< dedicated EP msk                           Address offset: 83Ch*/  
+  uint32_t Reserved40;                /*!< dedicated EP mask                          Address offset: 840h*/
+  __IO uint32_t DINEP1MSK;            /*!< dedicated EP mask                          Address offset: 844h*/
+  uint32_t  Reserved44[15];           /*!< Reserved 844-87Ch*/
+  __IO uint32_t DOUTEP1MSK;           /*!< dedicated EP msk                           Address offset: 884h*/
+} USB_OTG_DeviceTypeDef;
+
+/** 
+  * @brief __IN_Endpoint-Specific_Register
+  */
+
+typedef struct 
+{
+  __IO uint32_t DIEPCTL;              /*!< dev IN Endpoint Control Reg                900h + (ep_num * 20h) + 00h*/
+  uint32_t Reserved04;                /*!< Reserved                                   900h + (ep_num * 20h) + 04h*/
+  __IO uint32_t DIEPINT;              /*!< dev IN Endpoint Itr Reg                    900h + (ep_num * 20h) + 08h*/
+  uint32_t Reserved0C;                /*!< Reserved                                   900h + (ep_num * 20h) + 0Ch*/
+  __IO uint32_t DIEPTSIZ;             /*!< IN Endpoint Txfer Size                     900h + (ep_num * 20h) + 10h*/
+  __IO uint32_t DIEPDMA;              /*!< IN Endpoint DMA Address Reg                900h + (ep_num * 20h) + 14h*/
+  __IO uint32_t DTXFSTS;              /*!< IN Endpoint Tx FIFO Status Reg             900h + (ep_num * 20h) + 18h*/
+  uint32_t Reserved18;                /*!< Reserved                                   900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/
+} USB_OTG_INEndpointTypeDef;
+
+/** 
+  * @brief __OUT_Endpoint-Specific_Registers
+  */
+
+typedef struct 
+{
+  __IO uint32_t DOEPCTL;              /*!< dev OUT Endpoint Control Reg               B00h + (ep_num * 20h) + 00h*/
+  uint32_t Reserved04;                /*!< Reserved                                   B00h + (ep_num * 20h) + 04h*/
+  __IO uint32_t DOEPINT;              /*!< dev OUT Endpoint Itr Reg                   B00h + (ep_num * 20h) + 08h*/
+  uint32_t Reserved0C;                /*!< Reserved                                   B00h + (ep_num * 20h) + 0Ch*/
+  __IO uint32_t DOEPTSIZ;             /*!< dev OUT Endpoint Txfer Size                B00h + (ep_num * 20h) + 10h*/
+  __IO uint32_t DOEPDMA;              /*!< dev OUT Endpoint DMA Address               B00h + (ep_num * 20h) + 14h*/
+  uint32_t Reserved18[2];             /*!< Reserved                                   B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/
+} USB_OTG_OUTEndpointTypeDef;
+
+/** 
+  * @brief __Host_Mode_Register_Structures
+  */
+
+typedef struct 
+{
+  __IO uint32_t HCFG;                 /*!< Host Configuration Register    400h*/
+  __IO uint32_t HFIR;                 /*!< Host Frame Interval Register   404h*/
+  __IO uint32_t HFNUM;                /*!< Host Frame Nbr/Frame Remaining 408h*/
+  uint32_t Reserved40C;               /*!< Reserved                       40Ch*/
+  __IO uint32_t HPTXSTS;              /*!< Host Periodic Tx FIFO/ Queue Status 410h*/
+  __IO uint32_t HAINT;                /*!< Host All Channels Interrupt Register 414h*/
+  __IO uint32_t HAINTMSK;             /*!< Host All Channels Interrupt Mask 418h*/
+} USB_OTG_HostTypeDef;
+
+/** 
+  * @brief __Host_Channel_Specific_Registers
+  */
+
+typedef struct
+{
+  __IO uint32_t HCCHAR;
+  __IO uint32_t HCSPLT;
+  __IO uint32_t HCINT;
+  __IO uint32_t HCINTMSK;
+  __IO uint32_t HCTSIZ;
+  __IO uint32_t HCDMA;
+  uint32_t Reserved[2];
+} USB_OTG_HostChannelTypeDef;
+
+/*!< USB registers base address */
+#define USB_OTG_FS_PERIPH_BASE               0x50000000UL
+
+#define USB_OTG_GLOBAL_BASE                  0x00000000UL
+#define USB_OTG_DEVICE_BASE                  0x00000800UL
+#define USB_OTG_IN_ENDPOINT_BASE             0x00000900UL
+#define USB_OTG_OUT_ENDPOINT_BASE            0x00000B00UL
+#define USB_OTG_EP_REG_SIZE                  0x00000020UL
+#define USB_OTG_HOST_BASE                    0x00000400UL
+#define USB_OTG_HOST_PORT_BASE               0x00000440UL
+#define USB_OTG_HOST_CHANNEL_BASE            0x00000500UL
+#define USB_OTG_HOST_CHANNEL_SIZE            0x00000020UL
+#define USB_OTG_PCGCCTL_BASE                 0x00000E00UL
+#define USB_OTG_FIFO_BASE                    0x00001000UL
+#define USB_OTG_FIFO_SIZE                    0x00001000UL
+
+/******************************************************************************/
+/*                                                                            */
+/*                                 USB_OTG                                    */
+/*                                                                            */
+/******************************************************************************/
+/********************  Bit definition for USB_OTG_GOTGCTL register  ***********/
+#define USB_OTG_GOTGCTL_SRQSCS_Pos              (0U)                           
+#define USB_OTG_GOTGCTL_SRQSCS_Msk              (0x1UL << USB_OTG_GOTGCTL_SRQSCS_Pos) /*!< 0x00000001 */
+#define USB_OTG_GOTGCTL_SRQSCS                  USB_OTG_GOTGCTL_SRQSCS_Msk     /*!< Session request success */
+#define USB_OTG_GOTGCTL_SRQ_Pos                 (1U)                           
+#define USB_OTG_GOTGCTL_SRQ_Msk                 (0x1UL << USB_OTG_GOTGCTL_SRQ_Pos) /*!< 0x00000002 */
+#define USB_OTG_GOTGCTL_SRQ                     USB_OTG_GOTGCTL_SRQ_Msk        /*!< Session request */
+#define USB_OTG_GOTGCTL_HNGSCS_Pos              (8U)                           
+#define USB_OTG_GOTGCTL_HNGSCS_Msk              (0x1UL << USB_OTG_GOTGCTL_HNGSCS_Pos) /*!< 0x00000100 */
+#define USB_OTG_GOTGCTL_HNGSCS                   USB_OTG_GOTGCTL_HNGSCS_Msk    /*!< Host set HNP enable */
+#define USB_OTG_GOTGCTL_HNPRQ_Pos               (9U)                           
+#define USB_OTG_GOTGCTL_HNPRQ_Msk               (0x1UL << USB_OTG_GOTGCTL_HNPRQ_Pos) /*!< 0x00000200 */
+#define USB_OTG_GOTGCTL_HNPRQ                   USB_OTG_GOTGCTL_HNPRQ_Msk      /*!< HNP request */
+#define USB_OTG_GOTGCTL_HSHNPEN_Pos             (10U)                          
+#define USB_OTG_GOTGCTL_HSHNPEN_Msk             (0x1UL << USB_OTG_GOTGCTL_HSHNPEN_Pos) /*!< 0x00000400 */
+#define USB_OTG_GOTGCTL_HSHNPEN                 USB_OTG_GOTGCTL_HSHNPEN_Msk    /*!< Host set HNP enable */
+#define USB_OTG_GOTGCTL_DHNPEN_Pos              (11U)                          
+#define USB_OTG_GOTGCTL_DHNPEN_Msk              (0x1UL << USB_OTG_GOTGCTL_DHNPEN_Pos) /*!< 0x00000800 */
+#define USB_OTG_GOTGCTL_DHNPEN                  USB_OTG_GOTGCTL_DHNPEN_Msk     /*!< Device HNP enabled */
+#define USB_OTG_GOTGCTL_CIDSTS_Pos              (16U)                          
+#define USB_OTG_GOTGCTL_CIDSTS_Msk              (0x1UL << USB_OTG_GOTGCTL_CIDSTS_Pos) /*!< 0x00010000 */
+#define USB_OTG_GOTGCTL_CIDSTS                  USB_OTG_GOTGCTL_CIDSTS_Msk     /*!< Connector ID status */
+#define USB_OTG_GOTGCTL_DBCT_Pos                (17U)                          
+#define USB_OTG_GOTGCTL_DBCT_Msk                (0x1UL << USB_OTG_GOTGCTL_DBCT_Pos) /*!< 0x00020000 */
+#define USB_OTG_GOTGCTL_DBCT                    USB_OTG_GOTGCTL_DBCT_Msk       /*!< Long/short debounce time */
+#define USB_OTG_GOTGCTL_ASVLD_Pos               (18U)                          
+#define USB_OTG_GOTGCTL_ASVLD_Msk               (0x1UL << USB_OTG_GOTGCTL_ASVLD_Pos) /*!< 0x00040000 */
+#define USB_OTG_GOTGCTL_ASVLD                   USB_OTG_GOTGCTL_ASVLD_Msk      /*!< A-session valid */
+#define USB_OTG_GOTGCTL_BSVLD_Pos               (19U)                          
+#define USB_OTG_GOTGCTL_BSVLD_Msk               (0x1UL << USB_OTG_GOTGCTL_BSVLD_Pos) /*!< 0x00080000 */
+#define USB_OTG_GOTGCTL_BSVLD                   USB_OTG_GOTGCTL_BSVLD_Msk      /*!< B-session valid */
+
+/********************  Bit definition for USB_OTG_HCFG register  ********************/
+
+#define USB_OTG_HCFG_FSLSPCS_Pos                (0U)                           
+#define USB_OTG_HCFG_FSLSPCS_Msk                (0x3UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000003 */
+#define USB_OTG_HCFG_FSLSPCS                    USB_OTG_HCFG_FSLSPCS_Msk       /*!< FS/LS PHY clock select */
+#define USB_OTG_HCFG_FSLSPCS_0                  (0x1UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000001 */
+#define USB_OTG_HCFG_FSLSPCS_1                  (0x2UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000002 */
+#define USB_OTG_HCFG_FSLSS_Pos                  (2U)                           
+#define USB_OTG_HCFG_FSLSS_Msk                  (0x1UL << USB_OTG_HCFG_FSLSS_Pos) /*!< 0x00000004 */
+#define USB_OTG_HCFG_FSLSS                      USB_OTG_HCFG_FSLSS_Msk         /*!< FS- and LS-only support */
+
+/********************  Bit definition for USB_OTG_DCFG register  ********************/
+
+#define USB_OTG_DCFG_DSPD_Pos                   (0U)                           
+#define USB_OTG_DCFG_DSPD_Msk                   (0x3UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000003 */
+#define USB_OTG_DCFG_DSPD                       USB_OTG_DCFG_DSPD_Msk          /*!< Device speed */
+#define USB_OTG_DCFG_DSPD_0                     (0x1UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000001 */
+#define USB_OTG_DCFG_DSPD_1                     (0x2UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000002 */
+#define USB_OTG_DCFG_NZLSOHSK_Pos               (2U)                           
+#define USB_OTG_DCFG_NZLSOHSK_Msk               (0x1UL << USB_OTG_DCFG_NZLSOHSK_Pos) /*!< 0x00000004 */
+#define USB_OTG_DCFG_NZLSOHSK                   USB_OTG_DCFG_NZLSOHSK_Msk      /*!< Nonzero-length status OUT handshake */
+
+#define USB_OTG_DCFG_DAD_Pos                    (4U)                           
+#define USB_OTG_DCFG_DAD_Msk                    (0x7FUL << USB_OTG_DCFG_DAD_Pos) /*!< 0x000007F0 */
+#define USB_OTG_DCFG_DAD                        USB_OTG_DCFG_DAD_Msk           /*!< Device address */
+#define USB_OTG_DCFG_DAD_0                      (0x01UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000010 */
+#define USB_OTG_DCFG_DAD_1                      (0x02UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000020 */
+#define USB_OTG_DCFG_DAD_2                      (0x04UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000040 */
+#define USB_OTG_DCFG_DAD_3                      (0x08UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000080 */
+#define USB_OTG_DCFG_DAD_4                      (0x10UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000100 */
+#define USB_OTG_DCFG_DAD_5                      (0x20UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000200 */
+#define USB_OTG_DCFG_DAD_6                      (0x40UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000400 */
+
+#define USB_OTG_DCFG_PFIVL_Pos                  (11U)                          
+#define USB_OTG_DCFG_PFIVL_Msk                  (0x3UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001800 */
+#define USB_OTG_DCFG_PFIVL                      USB_OTG_DCFG_PFIVL_Msk         /*!< Periodic (micro)frame interval */
+#define USB_OTG_DCFG_PFIVL_0                    (0x1UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00000800 */
+#define USB_OTG_DCFG_PFIVL_1                    (0x2UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001000 */
+
+#define USB_OTG_DCFG_PERSCHIVL_Pos              (24U)                          
+#define USB_OTG_DCFG_PERSCHIVL_Msk              (0x3UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x03000000 */
+#define USB_OTG_DCFG_PERSCHIVL                  USB_OTG_DCFG_PERSCHIVL_Msk     /*!< Periodic scheduling interval */
+#define USB_OTG_DCFG_PERSCHIVL_0                (0x1UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x01000000 */
+#define USB_OTG_DCFG_PERSCHIVL_1                (0x2UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x02000000 */
+
+/********************  Bit definition for USB_OTG_PCGCR register  ********************/
+#define USB_OTG_PCGCR_STPPCLK_Pos               (0U)                           
+#define USB_OTG_PCGCR_STPPCLK_Msk               (0x1UL << USB_OTG_PCGCR_STPPCLK_Pos) /*!< 0x00000001 */
+#define USB_OTG_PCGCR_STPPCLK                   USB_OTG_PCGCR_STPPCLK_Msk      /*!< Stop PHY clock */
+#define USB_OTG_PCGCR_GATEHCLK_Pos              (1U)                           
+#define USB_OTG_PCGCR_GATEHCLK_Msk              (0x1UL << USB_OTG_PCGCR_GATEHCLK_Pos) /*!< 0x00000002 */
+#define USB_OTG_PCGCR_GATEHCLK                  USB_OTG_PCGCR_GATEHCLK_Msk     /*!< Gate HCLK */
+#define USB_OTG_PCGCR_PHYSUSP_Pos               (4U)                           
+#define USB_OTG_PCGCR_PHYSUSP_Msk               (0x1UL << USB_OTG_PCGCR_PHYSUSP_Pos) /*!< 0x00000010 */
+#define USB_OTG_PCGCR_PHYSUSP                   USB_OTG_PCGCR_PHYSUSP_Msk      /*!< PHY suspended */
+
+/********************  Bit definition for USB_OTG_GOTGINT register  ********************/
+#define USB_OTG_GOTGINT_SEDET_Pos               (2U)                           
+#define USB_OTG_GOTGINT_SEDET_Msk               (0x1UL << USB_OTG_GOTGINT_SEDET_Pos) /*!< 0x00000004 */
+#define USB_OTG_GOTGINT_SEDET                   USB_OTG_GOTGINT_SEDET_Msk      /*!< Session end detected */
+#define USB_OTG_GOTGINT_SRSSCHG_Pos             (8U)                           
+#define USB_OTG_GOTGINT_SRSSCHG_Msk             (0x1UL << USB_OTG_GOTGINT_SRSSCHG_Pos) /*!< 0x00000100 */
+#define USB_OTG_GOTGINT_SRSSCHG                 USB_OTG_GOTGINT_SRSSCHG_Msk    /*!< Session request success status change */
+#define USB_OTG_GOTGINT_HNSSCHG_Pos             (9U)                           
+#define USB_OTG_GOTGINT_HNSSCHG_Msk             (0x1UL << USB_OTG_GOTGINT_HNSSCHG_Pos) /*!< 0x00000200 */
+#define USB_OTG_GOTGINT_HNSSCHG                 USB_OTG_GOTGINT_HNSSCHG_Msk    /*!< Host negotiation success status change */
+#define USB_OTG_GOTGINT_HNGDET_Pos              (17U)                          
+#define USB_OTG_GOTGINT_HNGDET_Msk              (0x1UL << USB_OTG_GOTGINT_HNGDET_Pos) /*!< 0x00020000 */
+#define USB_OTG_GOTGINT_HNGDET                  USB_OTG_GOTGINT_HNGDET_Msk     /*!< Host negotiation detected */
+#define USB_OTG_GOTGINT_ADTOCHG_Pos             (18U)                          
+#define USB_OTG_GOTGINT_ADTOCHG_Msk             (0x1UL << USB_OTG_GOTGINT_ADTOCHG_Pos) /*!< 0x00040000 */
+#define USB_OTG_GOTGINT_ADTOCHG                 USB_OTG_GOTGINT_ADTOCHG_Msk    /*!< A-device timeout change */
+#define USB_OTG_GOTGINT_DBCDNE_Pos              (19U)                          
+#define USB_OTG_GOTGINT_DBCDNE_Msk              (0x1UL << USB_OTG_GOTGINT_DBCDNE_Pos) /*!< 0x00080000 */
+#define USB_OTG_GOTGINT_DBCDNE                  USB_OTG_GOTGINT_DBCDNE_Msk     /*!< Debounce done */
+
+/********************  Bit definition for USB_OTG_DCTL register  ********************/
+#define USB_OTG_DCTL_RWUSIG_Pos                 (0U)                           
+#define USB_OTG_DCTL_RWUSIG_Msk                 (0x1UL << USB_OTG_DCTL_RWUSIG_Pos) /*!< 0x00000001 */
+#define USB_OTG_DCTL_RWUSIG                     USB_OTG_DCTL_RWUSIG_Msk        /*!< Remote wakeup signaling */
+#define USB_OTG_DCTL_SDIS_Pos                   (1U)                           
+#define USB_OTG_DCTL_SDIS_Msk                   (0x1UL << USB_OTG_DCTL_SDIS_Pos) /*!< 0x00000002 */
+#define USB_OTG_DCTL_SDIS                       USB_OTG_DCTL_SDIS_Msk          /*!< Soft disconnect */
+#define USB_OTG_DCTL_GINSTS_Pos                 (2U)                           
+#define USB_OTG_DCTL_GINSTS_Msk                 (0x1UL << USB_OTG_DCTL_GINSTS_Pos) /*!< 0x00000004 */
+#define USB_OTG_DCTL_GINSTS                     USB_OTG_DCTL_GINSTS_Msk        /*!< Global IN NAK status */
+#define USB_OTG_DCTL_GONSTS_Pos                 (3U)                           
+#define USB_OTG_DCTL_GONSTS_Msk                 (0x1UL << USB_OTG_DCTL_GONSTS_Pos) /*!< 0x00000008 */
+#define USB_OTG_DCTL_GONSTS                     USB_OTG_DCTL_GONSTS_Msk        /*!< Global OUT NAK status */
+
+#define USB_OTG_DCTL_TCTL_Pos                   (4U)                           
+#define USB_OTG_DCTL_TCTL_Msk                   (0x7UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000070 */
+#define USB_OTG_DCTL_TCTL                       USB_OTG_DCTL_TCTL_Msk          /*!< Test control */
+#define USB_OTG_DCTL_TCTL_0                     (0x1UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000010 */
+#define USB_OTG_DCTL_TCTL_1                     (0x2UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000020 */
+#define USB_OTG_DCTL_TCTL_2                     (0x4UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000040 */
+#define USB_OTG_DCTL_SGINAK_Pos                 (7U)                           
+#define USB_OTG_DCTL_SGINAK_Msk                 (0x1UL << USB_OTG_DCTL_SGINAK_Pos) /*!< 0x00000080 */
+#define USB_OTG_DCTL_SGINAK                     USB_OTG_DCTL_SGINAK_Msk        /*!< Set global IN NAK */
+#define USB_OTG_DCTL_CGINAK_Pos                 (8U)                           
+#define USB_OTG_DCTL_CGINAK_Msk                 (0x1UL << USB_OTG_DCTL_CGINAK_Pos) /*!< 0x00000100 */
+#define USB_OTG_DCTL_CGINAK                     USB_OTG_DCTL_CGINAK_Msk        /*!< Clear global IN NAK */
+#define USB_OTG_DCTL_SGONAK_Pos                 (9U)                           
+#define USB_OTG_DCTL_SGONAK_Msk                 (0x1UL << USB_OTG_DCTL_SGONAK_Pos) /*!< 0x00000200 */
+#define USB_OTG_DCTL_SGONAK                     USB_OTG_DCTL_SGONAK_Msk        /*!< Set global OUT NAK */
+#define USB_OTG_DCTL_CGONAK_Pos                 (10U)                          
+#define USB_OTG_DCTL_CGONAK_Msk                 (0x1UL << USB_OTG_DCTL_CGONAK_Pos) /*!< 0x00000400 */
+#define USB_OTG_DCTL_CGONAK                     USB_OTG_DCTL_CGONAK_Msk        /*!< Clear global OUT NAK */
+#define USB_OTG_DCTL_POPRGDNE_Pos               (11U)                          
+#define USB_OTG_DCTL_POPRGDNE_Msk               (0x1UL << USB_OTG_DCTL_POPRGDNE_Pos) /*!< 0x00000800 */
+#define USB_OTG_DCTL_POPRGDNE                   USB_OTG_DCTL_POPRGDNE_Msk      /*!< Power-on programming done */
+
+/********************  Bit definition for USB_OTG_HFIR register  ********************/
+#define USB_OTG_HFIR_FRIVL_Pos                  (0U)                           
+#define USB_OTG_HFIR_FRIVL_Msk                  (0xFFFFUL << USB_OTG_HFIR_FRIVL_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HFIR_FRIVL                      USB_OTG_HFIR_FRIVL_Msk         /*!< Frame interval */
+
+/********************  Bit definition for USB_OTG_HFNUM register  ********************/
+#define USB_OTG_HFNUM_FRNUM_Pos                 (0U)                           
+#define USB_OTG_HFNUM_FRNUM_Msk                 (0xFFFFUL << USB_OTG_HFNUM_FRNUM_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HFNUM_FRNUM                     USB_OTG_HFNUM_FRNUM_Msk        /*!< Frame number */
+#define USB_OTG_HFNUM_FTREM_Pos                 (16U)                          
+#define USB_OTG_HFNUM_FTREM_Msk                 (0xFFFFUL << USB_OTG_HFNUM_FTREM_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_HFNUM_FTREM                     USB_OTG_HFNUM_FTREM_Msk        /*!< Frame time remaining */
+
+/********************  Bit definition for USB_OTG_DSTS register  ********************/
+#define USB_OTG_DSTS_SUSPSTS_Pos                (0U)                           
+#define USB_OTG_DSTS_SUSPSTS_Msk                (0x1UL << USB_OTG_DSTS_SUSPSTS_Pos) /*!< 0x00000001 */
+#define USB_OTG_DSTS_SUSPSTS                    USB_OTG_DSTS_SUSPSTS_Msk       /*!< Suspend status */
+
+#define USB_OTG_DSTS_ENUMSPD_Pos                (1U)                           
+#define USB_OTG_DSTS_ENUMSPD_Msk                (0x3UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000006 */
+#define USB_OTG_DSTS_ENUMSPD                    USB_OTG_DSTS_ENUMSPD_Msk       /*!< Enumerated speed */
+#define USB_OTG_DSTS_ENUMSPD_0                  (0x1UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000002 */
+#define USB_OTG_DSTS_ENUMSPD_1                  (0x2UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000004 */
+#define USB_OTG_DSTS_EERR_Pos                   (3U)                           
+#define USB_OTG_DSTS_EERR_Msk                   (0x1UL << USB_OTG_DSTS_EERR_Pos) /*!< 0x00000008 */
+#define USB_OTG_DSTS_EERR                       USB_OTG_DSTS_EERR_Msk          /*!< Erratic error */
+#define USB_OTG_DSTS_FNSOF_Pos                  (8U)                           
+#define USB_OTG_DSTS_FNSOF_Msk                  (0x3FFFUL << USB_OTG_DSTS_FNSOF_Pos) /*!< 0x003FFF00 */
+#define USB_OTG_DSTS_FNSOF                      USB_OTG_DSTS_FNSOF_Msk         /*!< Frame number of the received SOF */
+
+/********************  Bit definition for USB_OTG_GAHBCFG register  ********************/
+#define USB_OTG_GAHBCFG_GINT_Pos                (0U)                           
+#define USB_OTG_GAHBCFG_GINT_Msk                (0x1UL << USB_OTG_GAHBCFG_GINT_Pos) /*!< 0x00000001 */
+#define USB_OTG_GAHBCFG_GINT                    USB_OTG_GAHBCFG_GINT_Msk       /*!< Global interrupt mask */
+#define USB_OTG_GAHBCFG_HBSTLEN_Pos             (1U)                           
+#define USB_OTG_GAHBCFG_HBSTLEN_Msk             (0xFUL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< 0x0000001E */
+#define USB_OTG_GAHBCFG_HBSTLEN                 USB_OTG_GAHBCFG_HBSTLEN_Msk    /*!< Burst length/type */
+#define USB_OTG_GAHBCFG_HBSTLEN_0                (0x0UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< Single */
+#define USB_OTG_GAHBCFG_HBSTLEN_1                (0x1UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR */
+#define USB_OTG_GAHBCFG_HBSTLEN_2                (0x3UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR4 */
+#define USB_OTG_GAHBCFG_HBSTLEN_3                (0x5UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR8 */
+#define USB_OTG_GAHBCFG_HBSTLEN_4                (0x7UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR16 */
+#define USB_OTG_GAHBCFG_DMAEN_Pos               (5U)                           
+#define USB_OTG_GAHBCFG_DMAEN_Msk               (0x1UL << USB_OTG_GAHBCFG_DMAEN_Pos) /*!< 0x00000020 */
+#define USB_OTG_GAHBCFG_DMAEN                   USB_OTG_GAHBCFG_DMAEN_Msk      /*!< DMA enable */
+#define USB_OTG_GAHBCFG_TXFELVL_Pos             (7U)                           
+#define USB_OTG_GAHBCFG_TXFELVL_Msk             (0x1UL << USB_OTG_GAHBCFG_TXFELVL_Pos) /*!< 0x00000080 */
+#define USB_OTG_GAHBCFG_TXFELVL                 USB_OTG_GAHBCFG_TXFELVL_Msk    /*!< TxFIFO empty level */
+#define USB_OTG_GAHBCFG_PTXFELVL_Pos            (8U)                           
+#define USB_OTG_GAHBCFG_PTXFELVL_Msk            (0x1UL << USB_OTG_GAHBCFG_PTXFELVL_Pos) /*!< 0x00000100 */
+#define USB_OTG_GAHBCFG_PTXFELVL                USB_OTG_GAHBCFG_PTXFELVL_Msk   /*!< Periodic TxFIFO empty level */
+
+/********************  Bit definition for USB_OTG_GUSBCFG register  ********************/
+
+#define USB_OTG_GUSBCFG_TOCAL_Pos               (0U)                           
+#define USB_OTG_GUSBCFG_TOCAL_Msk               (0x7UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000007 */
+#define USB_OTG_GUSBCFG_TOCAL                   USB_OTG_GUSBCFG_TOCAL_Msk      /*!< FS timeout calibration */
+#define USB_OTG_GUSBCFG_TOCAL_0                 (0x1UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000001 */
+#define USB_OTG_GUSBCFG_TOCAL_1                 (0x2UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000002 */
+#define USB_OTG_GUSBCFG_TOCAL_2                 (0x4UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000004 */
+#define USB_OTG_GUSBCFG_PHYSEL_Pos              (6U)                           
+#define USB_OTG_GUSBCFG_PHYSEL_Msk              (0x1UL << USB_OTG_GUSBCFG_PHYSEL_Pos) /*!< 0x00000040 */
+#define USB_OTG_GUSBCFG_PHYSEL                  USB_OTG_GUSBCFG_PHYSEL_Msk     /*!< USB 2.0 high-speed ULPI PHY or USB 1.1 full-speed serial transceiver select */
+#define USB_OTG_GUSBCFG_SRPCAP_Pos              (8U)                           
+#define USB_OTG_GUSBCFG_SRPCAP_Msk              (0x1UL << USB_OTG_GUSBCFG_SRPCAP_Pos) /*!< 0x00000100 */
+#define USB_OTG_GUSBCFG_SRPCAP                  USB_OTG_GUSBCFG_SRPCAP_Msk     /*!< SRP-capable */
+#define USB_OTG_GUSBCFG_HNPCAP_Pos              (9U)                           
+#define USB_OTG_GUSBCFG_HNPCAP_Msk              (0x1UL << USB_OTG_GUSBCFG_HNPCAP_Pos) /*!< 0x00000200 */
+#define USB_OTG_GUSBCFG_HNPCAP                  USB_OTG_GUSBCFG_HNPCAP_Msk     /*!< HNP-capable */
+#define USB_OTG_GUSBCFG_TRDT_Pos                (10U)                          
+#define USB_OTG_GUSBCFG_TRDT_Msk                (0xFUL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00003C00 */
+#define USB_OTG_GUSBCFG_TRDT                    USB_OTG_GUSBCFG_TRDT_Msk       /*!< USB turnaround time */
+#define USB_OTG_GUSBCFG_TRDT_0                  (0x1UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000400 */
+#define USB_OTG_GUSBCFG_TRDT_1                  (0x2UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000800 */
+#define USB_OTG_GUSBCFG_TRDT_2                  (0x4UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00001000 */
+#define USB_OTG_GUSBCFG_TRDT_3                  (0x8UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00002000 */
+#define USB_OTG_GUSBCFG_PHYLPCS_Pos             (15U)                          
+#define USB_OTG_GUSBCFG_PHYLPCS_Msk             (0x1UL << USB_OTG_GUSBCFG_PHYLPCS_Pos) /*!< 0x00008000 */
+#define USB_OTG_GUSBCFG_PHYLPCS                 USB_OTG_GUSBCFG_PHYLPCS_Msk    /*!< PHY Low-power clock select */
+#define USB_OTG_GUSBCFG_ULPIFSLS_Pos            (17U)                          
+#define USB_OTG_GUSBCFG_ULPIFSLS_Msk            (0x1UL << USB_OTG_GUSBCFG_ULPIFSLS_Pos) /*!< 0x00020000 */
+#define USB_OTG_GUSBCFG_ULPIFSLS                USB_OTG_GUSBCFG_ULPIFSLS_Msk   /*!< ULPI FS/LS select */
+#define USB_OTG_GUSBCFG_ULPIAR_Pos              (18U)                          
+#define USB_OTG_GUSBCFG_ULPIAR_Msk              (0x1UL << USB_OTG_GUSBCFG_ULPIAR_Pos) /*!< 0x00040000 */
+#define USB_OTG_GUSBCFG_ULPIAR                  USB_OTG_GUSBCFG_ULPIAR_Msk     /*!< ULPI Auto-resume */
+#define USB_OTG_GUSBCFG_ULPICSM_Pos             (19U)                          
+#define USB_OTG_GUSBCFG_ULPICSM_Msk             (0x1UL << USB_OTG_GUSBCFG_ULPICSM_Pos) /*!< 0x00080000 */
+#define USB_OTG_GUSBCFG_ULPICSM                 USB_OTG_GUSBCFG_ULPICSM_Msk    /*!< ULPI Clock SuspendM */
+#define USB_OTG_GUSBCFG_ULPIEVBUSD_Pos          (20U)                          
+#define USB_OTG_GUSBCFG_ULPIEVBUSD_Msk          (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSD_Pos) /*!< 0x00100000 */
+#define USB_OTG_GUSBCFG_ULPIEVBUSD              USB_OTG_GUSBCFG_ULPIEVBUSD_Msk /*!< ULPI External VBUS Drive */
+#define USB_OTG_GUSBCFG_ULPIEVBUSI_Pos          (21U)                          
+#define USB_OTG_GUSBCFG_ULPIEVBUSI_Msk          (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSI_Pos) /*!< 0x00200000 */
+#define USB_OTG_GUSBCFG_ULPIEVBUSI              USB_OTG_GUSBCFG_ULPIEVBUSI_Msk /*!< ULPI external VBUS indicator */
+#define USB_OTG_GUSBCFG_TSDPS_Pos               (22U)                          
+#define USB_OTG_GUSBCFG_TSDPS_Msk               (0x1UL << USB_OTG_GUSBCFG_TSDPS_Pos) /*!< 0x00400000 */
+#define USB_OTG_GUSBCFG_TSDPS                   USB_OTG_GUSBCFG_TSDPS_Msk      /*!< TermSel DLine pulsing selection */
+#define USB_OTG_GUSBCFG_PCCI_Pos                (23U)                          
+#define USB_OTG_GUSBCFG_PCCI_Msk                (0x1UL << USB_OTG_GUSBCFG_PCCI_Pos) /*!< 0x00800000 */
+#define USB_OTG_GUSBCFG_PCCI                    USB_OTG_GUSBCFG_PCCI_Msk       /*!< Indicator complement */
+#define USB_OTG_GUSBCFG_PTCI_Pos                (24U)                          
+#define USB_OTG_GUSBCFG_PTCI_Msk                (0x1UL << USB_OTG_GUSBCFG_PTCI_Pos) /*!< 0x01000000 */
+#define USB_OTG_GUSBCFG_PTCI                    USB_OTG_GUSBCFG_PTCI_Msk       /*!< Indicator pass through */
+#define USB_OTG_GUSBCFG_ULPIIPD_Pos             (25U)                          
+#define USB_OTG_GUSBCFG_ULPIIPD_Msk             (0x1UL << USB_OTG_GUSBCFG_ULPIIPD_Pos) /*!< 0x02000000 */
+#define USB_OTG_GUSBCFG_ULPIIPD                 USB_OTG_GUSBCFG_ULPIIPD_Msk    /*!< ULPI interface protect disable */
+#define USB_OTG_GUSBCFG_FHMOD_Pos               (29U)                          
+#define USB_OTG_GUSBCFG_FHMOD_Msk               (0x1UL << USB_OTG_GUSBCFG_FHMOD_Pos) /*!< 0x20000000 */
+#define USB_OTG_GUSBCFG_FHMOD                   USB_OTG_GUSBCFG_FHMOD_Msk      /*!< Forced host mode */
+#define USB_OTG_GUSBCFG_FDMOD_Pos               (30U)                          
+#define USB_OTG_GUSBCFG_FDMOD_Msk               (0x1UL << USB_OTG_GUSBCFG_FDMOD_Pos) /*!< 0x40000000 */
+#define USB_OTG_GUSBCFG_FDMOD                   USB_OTG_GUSBCFG_FDMOD_Msk      /*!< Forced peripheral mode */
+#define USB_OTG_GUSBCFG_CTXPKT_Pos              (31U)                          
+#define USB_OTG_GUSBCFG_CTXPKT_Msk              (0x1UL << USB_OTG_GUSBCFG_CTXPKT_Pos) /*!< 0x80000000 */
+#define USB_OTG_GUSBCFG_CTXPKT                  USB_OTG_GUSBCFG_CTXPKT_Msk     /*!< Corrupt Tx packet */
+
+/********************  Bit definition for USB_OTG_GRSTCTL register  ********************/
+#define USB_OTG_GRSTCTL_CSRST_Pos               (0U)                           
+#define USB_OTG_GRSTCTL_CSRST_Msk               (0x1UL << USB_OTG_GRSTCTL_CSRST_Pos) /*!< 0x00000001 */
+#define USB_OTG_GRSTCTL_CSRST                   USB_OTG_GRSTCTL_CSRST_Msk      /*!< Core soft reset */
+#define USB_OTG_GRSTCTL_HSRST_Pos               (1U)                           
+#define USB_OTG_GRSTCTL_HSRST_Msk               (0x1UL << USB_OTG_GRSTCTL_HSRST_Pos) /*!< 0x00000002 */
+#define USB_OTG_GRSTCTL_HSRST                   USB_OTG_GRSTCTL_HSRST_Msk      /*!< HCLK soft reset */
+#define USB_OTG_GRSTCTL_FCRST_Pos               (2U)                           
+#define USB_OTG_GRSTCTL_FCRST_Msk               (0x1UL << USB_OTG_GRSTCTL_FCRST_Pos) /*!< 0x00000004 */
+#define USB_OTG_GRSTCTL_FCRST                   USB_OTG_GRSTCTL_FCRST_Msk      /*!< Host frame counter reset */
+#define USB_OTG_GRSTCTL_RXFFLSH_Pos             (4U)                           
+#define USB_OTG_GRSTCTL_RXFFLSH_Msk             (0x1UL << USB_OTG_GRSTCTL_RXFFLSH_Pos) /*!< 0x00000010 */
+#define USB_OTG_GRSTCTL_RXFFLSH                 USB_OTG_GRSTCTL_RXFFLSH_Msk    /*!< RxFIFO flush */
+#define USB_OTG_GRSTCTL_TXFFLSH_Pos             (5U)                           
+#define USB_OTG_GRSTCTL_TXFFLSH_Msk             (0x1UL << USB_OTG_GRSTCTL_TXFFLSH_Pos) /*!< 0x00000020 */
+#define USB_OTG_GRSTCTL_TXFFLSH                 USB_OTG_GRSTCTL_TXFFLSH_Msk    /*!< TxFIFO flush */
+
+
+#define USB_OTG_GRSTCTL_TXFNUM_Pos              (6U)                           
+#define USB_OTG_GRSTCTL_TXFNUM_Msk              (0x1FUL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x000007C0 */
+#define USB_OTG_GRSTCTL_TXFNUM                  USB_OTG_GRSTCTL_TXFNUM_Msk     /*!< TxFIFO number */
+#define USB_OTG_GRSTCTL_TXFNUM_0                (0x01UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000040 */
+#define USB_OTG_GRSTCTL_TXFNUM_1                (0x02UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000080 */
+#define USB_OTG_GRSTCTL_TXFNUM_2                (0x04UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000100 */
+#define USB_OTG_GRSTCTL_TXFNUM_3                (0x08UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000200 */
+#define USB_OTG_GRSTCTL_TXFNUM_4                (0x10UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000400 */
+#define USB_OTG_GRSTCTL_DMAREQ_Pos              (30U)                          
+#define USB_OTG_GRSTCTL_DMAREQ_Msk              (0x1UL << USB_OTG_GRSTCTL_DMAREQ_Pos) /*!< 0x40000000 */
+#define USB_OTG_GRSTCTL_DMAREQ                  USB_OTG_GRSTCTL_DMAREQ_Msk     /*!< DMA request signal */
+#define USB_OTG_GRSTCTL_AHBIDL_Pos              (31U)                          
+#define USB_OTG_GRSTCTL_AHBIDL_Msk              (0x1UL << USB_OTG_GRSTCTL_AHBIDL_Pos) /*!< 0x80000000 */
+#define USB_OTG_GRSTCTL_AHBIDL                  USB_OTG_GRSTCTL_AHBIDL_Msk     /*!< AHB master idle */
+
+/********************  Bit definition for USB_OTG_DIEPMSK register  ********************/
+#define USB_OTG_DIEPMSK_XFRCM_Pos               (0U)                           
+#define USB_OTG_DIEPMSK_XFRCM_Msk               (0x1UL << USB_OTG_DIEPMSK_XFRCM_Pos) /*!< 0x00000001 */
+#define USB_OTG_DIEPMSK_XFRCM                   USB_OTG_DIEPMSK_XFRCM_Msk      /*!< Transfer completed interrupt mask */
+#define USB_OTG_DIEPMSK_EPDM_Pos                (1U)                           
+#define USB_OTG_DIEPMSK_EPDM_Msk                (0x1UL << USB_OTG_DIEPMSK_EPDM_Pos) /*!< 0x00000002 */
+#define USB_OTG_DIEPMSK_EPDM                    USB_OTG_DIEPMSK_EPDM_Msk       /*!< Endpoint disabled interrupt mask */
+#define USB_OTG_DIEPMSK_TOM_Pos                 (3U)                           
+#define USB_OTG_DIEPMSK_TOM_Msk                 (0x1UL << USB_OTG_DIEPMSK_TOM_Pos) /*!< 0x00000008 */
+#define USB_OTG_DIEPMSK_TOM                     USB_OTG_DIEPMSK_TOM_Msk        /*!< Timeout condition mask (nonisochronous endpoints) */
+#define USB_OTG_DIEPMSK_ITTXFEMSK_Pos           (4U)                           
+#define USB_OTG_DIEPMSK_ITTXFEMSK_Msk           (0x1UL << USB_OTG_DIEPMSK_ITTXFEMSK_Pos) /*!< 0x00000010 */
+#define USB_OTG_DIEPMSK_ITTXFEMSK               USB_OTG_DIEPMSK_ITTXFEMSK_Msk  /*!< IN token received when TxFIFO empty mask */
+#define USB_OTG_DIEPMSK_INEPNMM_Pos             (5U)                           
+#define USB_OTG_DIEPMSK_INEPNMM_Msk             (0x1UL << USB_OTG_DIEPMSK_INEPNMM_Pos) /*!< 0x00000020 */
+#define USB_OTG_DIEPMSK_INEPNMM                 USB_OTG_DIEPMSK_INEPNMM_Msk    /*!< IN token received with EP mismatch mask */
+#define USB_OTG_DIEPMSK_INEPNEM_Pos             (6U)                           
+#define USB_OTG_DIEPMSK_INEPNEM_Msk             (0x1UL << USB_OTG_DIEPMSK_INEPNEM_Pos) /*!< 0x00000040 */
+#define USB_OTG_DIEPMSK_INEPNEM                 USB_OTG_DIEPMSK_INEPNEM_Msk    /*!< IN endpoint NAK effective mask */
+#define USB_OTG_DIEPMSK_TXFURM_Pos              (8U)                           
+#define USB_OTG_DIEPMSK_TXFURM_Msk              (0x1UL << USB_OTG_DIEPMSK_TXFURM_Pos) /*!< 0x00000100 */
+#define USB_OTG_DIEPMSK_TXFURM                  USB_OTG_DIEPMSK_TXFURM_Msk     /*!< FIFO underrun mask */
+#define USB_OTG_DIEPMSK_BIM_Pos                 (9U)                           
+#define USB_OTG_DIEPMSK_BIM_Msk                 (0x1UL << USB_OTG_DIEPMSK_BIM_Pos) /*!< 0x00000200 */
+#define USB_OTG_DIEPMSK_BIM                     USB_OTG_DIEPMSK_BIM_Msk        /*!< BNA interrupt mask */
+
+/********************  Bit definition for USB_OTG_HPTXSTS register  ********************/
+#define USB_OTG_HPTXSTS_PTXFSAVL_Pos            (0U)                           
+#define USB_OTG_HPTXSTS_PTXFSAVL_Msk            (0xFFFFUL << USB_OTG_HPTXSTS_PTXFSAVL_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HPTXSTS_PTXFSAVL                USB_OTG_HPTXSTS_PTXFSAVL_Msk   /*!< Periodic transmit data FIFO space available */
+#define USB_OTG_HPTXSTS_PTXQSAV_Pos             (16U)                          
+#define USB_OTG_HPTXSTS_PTXQSAV_Msk             (0xFFUL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00FF0000 */
+#define USB_OTG_HPTXSTS_PTXQSAV                 USB_OTG_HPTXSTS_PTXQSAV_Msk    /*!< Periodic transmit request queue space available */
+#define USB_OTG_HPTXSTS_PTXQSAV_0               (0x01UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00010000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_1               (0x02UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00020000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_2               (0x04UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00040000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_3               (0x08UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00080000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_4               (0x10UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00100000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_5               (0x20UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00200000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_6               (0x40UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00400000 */
+#define USB_OTG_HPTXSTS_PTXQSAV_7               (0x80UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00800000 */
+
+#define USB_OTG_HPTXSTS_PTXQTOP_Pos             (24U)                          
+#define USB_OTG_HPTXSTS_PTXQTOP_Msk             (0xFFUL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0xFF000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP                 USB_OTG_HPTXSTS_PTXQTOP_Msk    /*!< Top of the periodic transmit request queue */
+#define USB_OTG_HPTXSTS_PTXQTOP_0               (0x01UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x01000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_1               (0x02UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x02000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_2               (0x04UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x04000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_3               (0x08UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x08000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_4               (0x10UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x10000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_5               (0x20UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x20000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_6               (0x40UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x40000000 */
+#define USB_OTG_HPTXSTS_PTXQTOP_7               (0x80UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x80000000 */
+
+/********************  Bit definition for USB_OTG_HAINT register  ********************/
+#define USB_OTG_HAINT_HAINT_Pos                 (0U)                           
+#define USB_OTG_HAINT_HAINT_Msk                 (0xFFFFUL << USB_OTG_HAINT_HAINT_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HAINT_HAINT                     USB_OTG_HAINT_HAINT_Msk        /*!< Channel interrupts */
+
+/********************  Bit definition for USB_OTG_DOEPMSK register  ********************/
+#define USB_OTG_DOEPMSK_XFRCM_Pos               (0U)                           
+#define USB_OTG_DOEPMSK_XFRCM_Msk               (0x1UL << USB_OTG_DOEPMSK_XFRCM_Pos) /*!< 0x00000001 */
+#define USB_OTG_DOEPMSK_XFRCM                   USB_OTG_DOEPMSK_XFRCM_Msk      /*!< Transfer completed interrupt mask */
+#define USB_OTG_DOEPMSK_EPDM_Pos                (1U)                           
+#define USB_OTG_DOEPMSK_EPDM_Msk                (0x1UL << USB_OTG_DOEPMSK_EPDM_Pos) /*!< 0x00000002 */
+#define USB_OTG_DOEPMSK_EPDM                    USB_OTG_DOEPMSK_EPDM_Msk       /*!< Endpoint disabled interrupt mask */
+#define USB_OTG_DOEPMSK_AHBERRM_Pos              (2U)
+#define USB_OTG_DOEPMSK_AHBERRM_Msk              (0x1UL << USB_OTG_DOEPMSK_AHBERRM_Pos) /*!< 0x00000004 */
+#define USB_OTG_DOEPMSK_AHBERRM                  USB_OTG_DOEPMSK_AHBERRM_Msk   /*!< OUT transaction AHB Error interrupt mask       */
+#define USB_OTG_DOEPMSK_STUPM_Pos               (3U)                           
+#define USB_OTG_DOEPMSK_STUPM_Msk               (0x1UL << USB_OTG_DOEPMSK_STUPM_Pos) /*!< 0x00000008 */
+#define USB_OTG_DOEPMSK_STUPM                   USB_OTG_DOEPMSK_STUPM_Msk      /*!< SETUP phase done mask */
+#define USB_OTG_DOEPMSK_OTEPDM_Pos              (4U)                           
+#define USB_OTG_DOEPMSK_OTEPDM_Msk              (0x1UL << USB_OTG_DOEPMSK_OTEPDM_Pos) /*!< 0x00000010 */
+#define USB_OTG_DOEPMSK_OTEPDM                  USB_OTG_DOEPMSK_OTEPDM_Msk     /*!< OUT token received when endpoint disabled mask */
+#define USB_OTG_DOEPMSK_OTEPSPRM_Pos             (5U)                          
+#define USB_OTG_DOEPMSK_OTEPSPRM_Msk             (0x1UL << USB_OTG_DOEPMSK_OTEPSPRM_Pos) /*!< 0x00000020 */
+#define USB_OTG_DOEPMSK_OTEPSPRM                 USB_OTG_DOEPMSK_OTEPSPRM_Msk  /*!< Status Phase Received mask                     */
+#define USB_OTG_DOEPMSK_B2BSTUP_Pos             (6U)                           
+#define USB_OTG_DOEPMSK_B2BSTUP_Msk             (0x1UL << USB_OTG_DOEPMSK_B2BSTUP_Pos) /*!< 0x00000040 */
+#define USB_OTG_DOEPMSK_B2BSTUP                 USB_OTG_DOEPMSK_B2BSTUP_Msk    /*!< Back-to-back SETUP packets received mask */
+#define USB_OTG_DOEPMSK_OPEM_Pos                (8U)                           
+#define USB_OTG_DOEPMSK_OPEM_Msk                (0x1UL << USB_OTG_DOEPMSK_OPEM_Pos) /*!< 0x00000100 */
+#define USB_OTG_DOEPMSK_OPEM                    USB_OTG_DOEPMSK_OPEM_Msk       /*!< OUT packet error mask */
+#define USB_OTG_DOEPMSK_BOIM_Pos                (9U)                           
+#define USB_OTG_DOEPMSK_BOIM_Msk                (0x1UL << USB_OTG_DOEPMSK_BOIM_Pos) /*!< 0x00000200 */
+#define USB_OTG_DOEPMSK_BOIM                    USB_OTG_DOEPMSK_BOIM_Msk       /*!< BNA interrupt mask */
+#define USB_OTG_DOEPMSK_BERRM_Pos                (12U)
+#define USB_OTG_DOEPMSK_BERRM_Msk                (0x1UL << USB_OTG_DOEPMSK_BERRM_Pos) /*!< 0x00001000 */
+#define USB_OTG_DOEPMSK_BERRM                    USB_OTG_DOEPMSK_BERRM_Msk      /*!< Babble error interrupt mask                   */
+#define USB_OTG_DOEPMSK_NAKM_Pos                 (13U)
+#define USB_OTG_DOEPMSK_NAKM_Msk                 (0x1UL << USB_OTG_DOEPMSK_NAKM_Pos) /*!< 0x00002000 */
+#define USB_OTG_DOEPMSK_NAKM                     USB_OTG_DOEPMSK_NAKM_Msk      /*!< OUT Packet NAK interrupt mask                  */
+#define USB_OTG_DOEPMSK_NYETM_Pos                (14U)
+#define USB_OTG_DOEPMSK_NYETM_Msk                (0x1UL << USB_OTG_DOEPMSK_NYETM_Pos) /*!< 0x00004000 */
+#define USB_OTG_DOEPMSK_NYETM                    USB_OTG_DOEPMSK_NYETM_Msk     /*!< NYET interrupt mask                            */
+/********************  Bit definition for USB_OTG_GINTSTS register  ********************/
+#define USB_OTG_GINTSTS_CMOD_Pos                (0U)                           
+#define USB_OTG_GINTSTS_CMOD_Msk                (0x1UL << USB_OTG_GINTSTS_CMOD_Pos) /*!< 0x00000001 */
+#define USB_OTG_GINTSTS_CMOD                    USB_OTG_GINTSTS_CMOD_Msk       /*!< Current mode of operation */
+#define USB_OTG_GINTSTS_MMIS_Pos                (1U)                           
+#define USB_OTG_GINTSTS_MMIS_Msk                (0x1UL << USB_OTG_GINTSTS_MMIS_Pos) /*!< 0x00000002 */
+#define USB_OTG_GINTSTS_MMIS                    USB_OTG_GINTSTS_MMIS_Msk       /*!< Mode mismatch interrupt */
+#define USB_OTG_GINTSTS_OTGINT_Pos              (2U)                           
+#define USB_OTG_GINTSTS_OTGINT_Msk              (0x1UL << USB_OTG_GINTSTS_OTGINT_Pos) /*!< 0x00000004 */
+#define USB_OTG_GINTSTS_OTGINT                  USB_OTG_GINTSTS_OTGINT_Msk     /*!< OTG interrupt */
+#define USB_OTG_GINTSTS_SOF_Pos                 (3U)                           
+#define USB_OTG_GINTSTS_SOF_Msk                 (0x1UL << USB_OTG_GINTSTS_SOF_Pos) /*!< 0x00000008 */
+#define USB_OTG_GINTSTS_SOF                     USB_OTG_GINTSTS_SOF_Msk        /*!< Start of frame */
+#define USB_OTG_GINTSTS_RXFLVL_Pos              (4U)                           
+#define USB_OTG_GINTSTS_RXFLVL_Msk              (0x1UL << USB_OTG_GINTSTS_RXFLVL_Pos) /*!< 0x00000010 */
+#define USB_OTG_GINTSTS_RXFLVL                  USB_OTG_GINTSTS_RXFLVL_Msk     /*!< RxFIFO nonempty */
+#define USB_OTG_GINTSTS_NPTXFE_Pos              (5U)                           
+#define USB_OTG_GINTSTS_NPTXFE_Msk              (0x1UL << USB_OTG_GINTSTS_NPTXFE_Pos) /*!< 0x00000020 */
+#define USB_OTG_GINTSTS_NPTXFE                  USB_OTG_GINTSTS_NPTXFE_Msk     /*!< Nonperiodic TxFIFO empty */
+#define USB_OTG_GINTSTS_GINAKEFF_Pos            (6U)                           
+#define USB_OTG_GINTSTS_GINAKEFF_Msk            (0x1UL << USB_OTG_GINTSTS_GINAKEFF_Pos) /*!< 0x00000040 */
+#define USB_OTG_GINTSTS_GINAKEFF                USB_OTG_GINTSTS_GINAKEFF_Msk   /*!< Global IN nonperiodic NAK effective */
+#define USB_OTG_GINTSTS_BOUTNAKEFF_Pos          (7U)                           
+#define USB_OTG_GINTSTS_BOUTNAKEFF_Msk          (0x1UL << USB_OTG_GINTSTS_BOUTNAKEFF_Pos) /*!< 0x00000080 */
+#define USB_OTG_GINTSTS_BOUTNAKEFF              USB_OTG_GINTSTS_BOUTNAKEFF_Msk /*!< Global OUT NAK effective */
+#define USB_OTG_GINTSTS_ESUSP_Pos               (10U)                          
+#define USB_OTG_GINTSTS_ESUSP_Msk               (0x1UL << USB_OTG_GINTSTS_ESUSP_Pos) /*!< 0x00000400 */
+#define USB_OTG_GINTSTS_ESUSP                   USB_OTG_GINTSTS_ESUSP_Msk      /*!< Early suspend */
+#define USB_OTG_GINTSTS_USBSUSP_Pos             (11U)                          
+#define USB_OTG_GINTSTS_USBSUSP_Msk             (0x1UL << USB_OTG_GINTSTS_USBSUSP_Pos) /*!< 0x00000800 */
+#define USB_OTG_GINTSTS_USBSUSP                 USB_OTG_GINTSTS_USBSUSP_Msk    /*!< USB suspend */
+#define USB_OTG_GINTSTS_USBRST_Pos              (12U)                          
+#define USB_OTG_GINTSTS_USBRST_Msk              (0x1UL << USB_OTG_GINTSTS_USBRST_Pos) /*!< 0x00001000 */
+#define USB_OTG_GINTSTS_USBRST                  USB_OTG_GINTSTS_USBRST_Msk     /*!< USB reset */
+#define USB_OTG_GINTSTS_ENUMDNE_Pos             (13U)                          
+#define USB_OTG_GINTSTS_ENUMDNE_Msk             (0x1UL << USB_OTG_GINTSTS_ENUMDNE_Pos) /*!< 0x00002000 */
+#define USB_OTG_GINTSTS_ENUMDNE                 USB_OTG_GINTSTS_ENUMDNE_Msk    /*!< Enumeration done */
+#define USB_OTG_GINTSTS_ISOODRP_Pos             (14U)                          
+#define USB_OTG_GINTSTS_ISOODRP_Msk             (0x1UL << USB_OTG_GINTSTS_ISOODRP_Pos) /*!< 0x00004000 */
+#define USB_OTG_GINTSTS_ISOODRP                 USB_OTG_GINTSTS_ISOODRP_Msk    /*!< Isochronous OUT packet dropped interrupt */
+#define USB_OTG_GINTSTS_EOPF_Pos                (15U)                          
+#define USB_OTG_GINTSTS_EOPF_Msk                (0x1UL << USB_OTG_GINTSTS_EOPF_Pos) /*!< 0x00008000 */
+#define USB_OTG_GINTSTS_EOPF                    USB_OTG_GINTSTS_EOPF_Msk       /*!< End of periodic frame interrupt */
+#define USB_OTG_GINTSTS_IEPINT_Pos              (18U)                          
+#define USB_OTG_GINTSTS_IEPINT_Msk              (0x1UL << USB_OTG_GINTSTS_IEPINT_Pos) /*!< 0x00040000 */
+#define USB_OTG_GINTSTS_IEPINT                  USB_OTG_GINTSTS_IEPINT_Msk     /*!< IN endpoint interrupt */
+#define USB_OTG_GINTSTS_OEPINT_Pos              (19U)                          
+#define USB_OTG_GINTSTS_OEPINT_Msk              (0x1UL << USB_OTG_GINTSTS_OEPINT_Pos) /*!< 0x00080000 */
+#define USB_OTG_GINTSTS_OEPINT                  USB_OTG_GINTSTS_OEPINT_Msk     /*!< OUT endpoint interrupt */
+#define USB_OTG_GINTSTS_IISOIXFR_Pos            (20U)                          
+#define USB_OTG_GINTSTS_IISOIXFR_Msk            (0x1UL << USB_OTG_GINTSTS_IISOIXFR_Pos) /*!< 0x00100000 */
+#define USB_OTG_GINTSTS_IISOIXFR                USB_OTG_GINTSTS_IISOIXFR_Msk   /*!< Incomplete isochronous IN transfer */
+#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos   (21U)                          
+#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk   (0x1UL << USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos) /*!< 0x00200000 */
+#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT       USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk /*!< Incomplete periodic transfer */
+#define USB_OTG_GINTSTS_DATAFSUSP_Pos           (22U)                          
+#define USB_OTG_GINTSTS_DATAFSUSP_Msk           (0x1UL << USB_OTG_GINTSTS_DATAFSUSP_Pos) /*!< 0x00400000 */
+#define USB_OTG_GINTSTS_DATAFSUSP               USB_OTG_GINTSTS_DATAFSUSP_Msk  /*!< Data fetch suspended */
+#define USB_OTG_GINTSTS_HPRTINT_Pos             (24U)                          
+#define USB_OTG_GINTSTS_HPRTINT_Msk             (0x1UL << USB_OTG_GINTSTS_HPRTINT_Pos) /*!< 0x01000000 */
+#define USB_OTG_GINTSTS_HPRTINT                 USB_OTG_GINTSTS_HPRTINT_Msk    /*!< Host port interrupt */
+#define USB_OTG_GINTSTS_HCINT_Pos               (25U)                          
+#define USB_OTG_GINTSTS_HCINT_Msk               (0x1UL << USB_OTG_GINTSTS_HCINT_Pos) /*!< 0x02000000 */
+#define USB_OTG_GINTSTS_HCINT                   USB_OTG_GINTSTS_HCINT_Msk      /*!< Host channels interrupt */
+#define USB_OTG_GINTSTS_PTXFE_Pos               (26U)                          
+#define USB_OTG_GINTSTS_PTXFE_Msk               (0x1UL << USB_OTG_GINTSTS_PTXFE_Pos) /*!< 0x04000000 */
+#define USB_OTG_GINTSTS_PTXFE                   USB_OTG_GINTSTS_PTXFE_Msk      /*!< Periodic TxFIFO empty */
+#define USB_OTG_GINTSTS_CIDSCHG_Pos             (28U)                          
+#define USB_OTG_GINTSTS_CIDSCHG_Msk             (0x1UL << USB_OTG_GINTSTS_CIDSCHG_Pos) /*!< 0x10000000 */
+#define USB_OTG_GINTSTS_CIDSCHG                 USB_OTG_GINTSTS_CIDSCHG_Msk    /*!< Connector ID status change */
+#define USB_OTG_GINTSTS_DISCINT_Pos             (29U)                          
+#define USB_OTG_GINTSTS_DISCINT_Msk             (0x1UL << USB_OTG_GINTSTS_DISCINT_Pos) /*!< 0x20000000 */
+#define USB_OTG_GINTSTS_DISCINT                 USB_OTG_GINTSTS_DISCINT_Msk    /*!< Disconnect detected interrupt */
+#define USB_OTG_GINTSTS_SRQINT_Pos              (30U)                          
+#define USB_OTG_GINTSTS_SRQINT_Msk              (0x1UL << USB_OTG_GINTSTS_SRQINT_Pos) /*!< 0x40000000 */
+#define USB_OTG_GINTSTS_SRQINT                  USB_OTG_GINTSTS_SRQINT_Msk     /*!< Session request/new session detected interrupt */
+#define USB_OTG_GINTSTS_WKUINT_Pos              (31U)                          
+#define USB_OTG_GINTSTS_WKUINT_Msk              (0x1UL << USB_OTG_GINTSTS_WKUINT_Pos) /*!< 0x80000000 */
+#define USB_OTG_GINTSTS_WKUINT                  USB_OTG_GINTSTS_WKUINT_Msk     /*!< Resume/remote wakeup detected interrupt */
+
+/********************  Bit definition for USB_OTG_GINTMSK register  ********************/
+#define USB_OTG_GINTMSK_MMISM_Pos               (1U)                           
+#define USB_OTG_GINTMSK_MMISM_Msk               (0x1UL << USB_OTG_GINTMSK_MMISM_Pos) /*!< 0x00000002 */
+#define USB_OTG_GINTMSK_MMISM                   USB_OTG_GINTMSK_MMISM_Msk      /*!< Mode mismatch interrupt mask */
+#define USB_OTG_GINTMSK_OTGINT_Pos              (2U)                           
+#define USB_OTG_GINTMSK_OTGINT_Msk              (0x1UL << USB_OTG_GINTMSK_OTGINT_Pos) /*!< 0x00000004 */
+#define USB_OTG_GINTMSK_OTGINT                  USB_OTG_GINTMSK_OTGINT_Msk     /*!< OTG interrupt mask */
+#define USB_OTG_GINTMSK_SOFM_Pos                (3U)                           
+#define USB_OTG_GINTMSK_SOFM_Msk                (0x1UL << USB_OTG_GINTMSK_SOFM_Pos) /*!< 0x00000008 */
+#define USB_OTG_GINTMSK_SOFM                    USB_OTG_GINTMSK_SOFM_Msk       /*!< Start of frame mask */
+#define USB_OTG_GINTMSK_RXFLVLM_Pos             (4U)                           
+#define USB_OTG_GINTMSK_RXFLVLM_Msk             (0x1UL << USB_OTG_GINTMSK_RXFLVLM_Pos) /*!< 0x00000010 */
+#define USB_OTG_GINTMSK_RXFLVLM                 USB_OTG_GINTMSK_RXFLVLM_Msk    /*!< Receive FIFO nonempty mask */
+#define USB_OTG_GINTMSK_NPTXFEM_Pos             (5U)                           
+#define USB_OTG_GINTMSK_NPTXFEM_Msk             (0x1UL << USB_OTG_GINTMSK_NPTXFEM_Pos) /*!< 0x00000020 */
+#define USB_OTG_GINTMSK_NPTXFEM                 USB_OTG_GINTMSK_NPTXFEM_Msk    /*!< Nonperiodic TxFIFO empty mask */
+#define USB_OTG_GINTMSK_GINAKEFFM_Pos           (6U)                           
+#define USB_OTG_GINTMSK_GINAKEFFM_Msk           (0x1UL << USB_OTG_GINTMSK_GINAKEFFM_Pos) /*!< 0x00000040 */
+#define USB_OTG_GINTMSK_GINAKEFFM               USB_OTG_GINTMSK_GINAKEFFM_Msk  /*!< Global nonperiodic IN NAK effective mask */
+#define USB_OTG_GINTMSK_GONAKEFFM_Pos           (7U)                           
+#define USB_OTG_GINTMSK_GONAKEFFM_Msk           (0x1UL << USB_OTG_GINTMSK_GONAKEFFM_Pos) /*!< 0x00000080 */
+#define USB_OTG_GINTMSK_GONAKEFFM               USB_OTG_GINTMSK_GONAKEFFM_Msk  /*!< Global OUT NAK effective mask */
+#define USB_OTG_GINTMSK_ESUSPM_Pos              (10U)                          
+#define USB_OTG_GINTMSK_ESUSPM_Msk              (0x1UL << USB_OTG_GINTMSK_ESUSPM_Pos) /*!< 0x00000400 */
+#define USB_OTG_GINTMSK_ESUSPM                  USB_OTG_GINTMSK_ESUSPM_Msk     /*!< Early suspend mask */
+#define USB_OTG_GINTMSK_USBSUSPM_Pos            (11U)                          
+#define USB_OTG_GINTMSK_USBSUSPM_Msk            (0x1UL << USB_OTG_GINTMSK_USBSUSPM_Pos) /*!< 0x00000800 */
+#define USB_OTG_GINTMSK_USBSUSPM                USB_OTG_GINTMSK_USBSUSPM_Msk   /*!< USB suspend mask */
+#define USB_OTG_GINTMSK_USBRST_Pos              (12U)                          
+#define USB_OTG_GINTMSK_USBRST_Msk              (0x1UL << USB_OTG_GINTMSK_USBRST_Pos) /*!< 0x00001000 */
+#define USB_OTG_GINTMSK_USBRST                  USB_OTG_GINTMSK_USBRST_Msk     /*!< USB reset mask */
+#define USB_OTG_GINTMSK_ENUMDNEM_Pos            (13U)                          
+#define USB_OTG_GINTMSK_ENUMDNEM_Msk            (0x1UL << USB_OTG_GINTMSK_ENUMDNEM_Pos) /*!< 0x00002000 */
+#define USB_OTG_GINTMSK_ENUMDNEM                USB_OTG_GINTMSK_ENUMDNEM_Msk   /*!< Enumeration done mask */
+#define USB_OTG_GINTMSK_ISOODRPM_Pos            (14U)                          
+#define USB_OTG_GINTMSK_ISOODRPM_Msk            (0x1UL << USB_OTG_GINTMSK_ISOODRPM_Pos) /*!< 0x00004000 */
+#define USB_OTG_GINTMSK_ISOODRPM                USB_OTG_GINTMSK_ISOODRPM_Msk   /*!< Isochronous OUT packet dropped interrupt mask */
+#define USB_OTG_GINTMSK_EOPFM_Pos               (15U)                          
+#define USB_OTG_GINTMSK_EOPFM_Msk               (0x1UL << USB_OTG_GINTMSK_EOPFM_Pos) /*!< 0x00008000 */
+#define USB_OTG_GINTMSK_EOPFM                   USB_OTG_GINTMSK_EOPFM_Msk      /*!< End of periodic frame interrupt mask */
+#define USB_OTG_GINTMSK_EPMISM_Pos              (17U)                          
+#define USB_OTG_GINTMSK_EPMISM_Msk              (0x1UL << USB_OTG_GINTMSK_EPMISM_Pos) /*!< 0x00020000 */
+#define USB_OTG_GINTMSK_EPMISM                  USB_OTG_GINTMSK_EPMISM_Msk     /*!< Endpoint mismatch interrupt mask */
+#define USB_OTG_GINTMSK_IEPINT_Pos              (18U)                          
+#define USB_OTG_GINTMSK_IEPINT_Msk              (0x1UL << USB_OTG_GINTMSK_IEPINT_Pos) /*!< 0x00040000 */
+#define USB_OTG_GINTMSK_IEPINT                  USB_OTG_GINTMSK_IEPINT_Msk     /*!< IN endpoints interrupt mask */
+#define USB_OTG_GINTMSK_OEPINT_Pos              (19U)                          
+#define USB_OTG_GINTMSK_OEPINT_Msk              (0x1UL << USB_OTG_GINTMSK_OEPINT_Pos) /*!< 0x00080000 */
+#define USB_OTG_GINTMSK_OEPINT                  USB_OTG_GINTMSK_OEPINT_Msk     /*!< OUT endpoints interrupt mask */
+#define USB_OTG_GINTMSK_IISOIXFRM_Pos           (20U)                          
+#define USB_OTG_GINTMSK_IISOIXFRM_Msk           (0x1UL << USB_OTG_GINTMSK_IISOIXFRM_Pos) /*!< 0x00100000 */
+#define USB_OTG_GINTMSK_IISOIXFRM               USB_OTG_GINTMSK_IISOIXFRM_Msk  /*!< Incomplete isochronous IN transfer mask */
+#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos     (21U)                          
+#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk     (0x1UL << USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos) /*!< 0x00200000 */
+#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM         USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk /*!< Incomplete periodic transfer mask */
+#define USB_OTG_GINTMSK_FSUSPM_Pos              (22U)                          
+#define USB_OTG_GINTMSK_FSUSPM_Msk              (0x1UL << USB_OTG_GINTMSK_FSUSPM_Pos) /*!< 0x00400000 */
+#define USB_OTG_GINTMSK_FSUSPM                  USB_OTG_GINTMSK_FSUSPM_Msk     /*!< Data fetch suspended mask */
+#define USB_OTG_GINTMSK_PRTIM_Pos               (24U)                          
+#define USB_OTG_GINTMSK_PRTIM_Msk               (0x1UL << USB_OTG_GINTMSK_PRTIM_Pos) /*!< 0x01000000 */
+#define USB_OTG_GINTMSK_PRTIM                   USB_OTG_GINTMSK_PRTIM_Msk      /*!< Host port interrupt mask */
+#define USB_OTG_GINTMSK_HCIM_Pos                (25U)                          
+#define USB_OTG_GINTMSK_HCIM_Msk                (0x1UL << USB_OTG_GINTMSK_HCIM_Pos) /*!< 0x02000000 */
+#define USB_OTG_GINTMSK_HCIM                    USB_OTG_GINTMSK_HCIM_Msk       /*!< Host channels interrupt mask */
+#define USB_OTG_GINTMSK_PTXFEM_Pos              (26U)                          
+#define USB_OTG_GINTMSK_PTXFEM_Msk              (0x1UL << USB_OTG_GINTMSK_PTXFEM_Pos) /*!< 0x04000000 */
+#define USB_OTG_GINTMSK_PTXFEM                  USB_OTG_GINTMSK_PTXFEM_Msk     /*!< Periodic TxFIFO empty mask */
+#define USB_OTG_GINTMSK_CIDSCHGM_Pos            (28U)                          
+#define USB_OTG_GINTMSK_CIDSCHGM_Msk            (0x1UL << USB_OTG_GINTMSK_CIDSCHGM_Pos) /*!< 0x10000000 */
+#define USB_OTG_GINTMSK_CIDSCHGM                USB_OTG_GINTMSK_CIDSCHGM_Msk   /*!< Connector ID status change mask */
+#define USB_OTG_GINTMSK_DISCINT_Pos             (29U)                          
+#define USB_OTG_GINTMSK_DISCINT_Msk             (0x1UL << USB_OTG_GINTMSK_DISCINT_Pos) /*!< 0x20000000 */
+#define USB_OTG_GINTMSK_DISCINT                 USB_OTG_GINTMSK_DISCINT_Msk    /*!< Disconnect detected interrupt mask */
+#define USB_OTG_GINTMSK_SRQIM_Pos               (30U)                          
+#define USB_OTG_GINTMSK_SRQIM_Msk               (0x1UL << USB_OTG_GINTMSK_SRQIM_Pos) /*!< 0x40000000 */
+#define USB_OTG_GINTMSK_SRQIM                   USB_OTG_GINTMSK_SRQIM_Msk      /*!< Session request/new session detected interrupt mask */
+#define USB_OTG_GINTMSK_WUIM_Pos                (31U)                          
+#define USB_OTG_GINTMSK_WUIM_Msk                (0x1UL << USB_OTG_GINTMSK_WUIM_Pos) /*!< 0x80000000 */
+#define USB_OTG_GINTMSK_WUIM                    USB_OTG_GINTMSK_WUIM_Msk       /*!< Resume/remote wakeup detected interrupt mask */
+
+/********************  Bit definition for USB_OTG_DAINT register  ********************/
+#define USB_OTG_DAINT_IEPINT_Pos                (0U)                           
+#define USB_OTG_DAINT_IEPINT_Msk                (0xFFFFUL << USB_OTG_DAINT_IEPINT_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DAINT_IEPINT                    USB_OTG_DAINT_IEPINT_Msk       /*!< IN endpoint interrupt bits */
+#define USB_OTG_DAINT_OEPINT_Pos                (16U)                          
+#define USB_OTG_DAINT_OEPINT_Msk                (0xFFFFUL << USB_OTG_DAINT_OEPINT_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_DAINT_OEPINT                    USB_OTG_DAINT_OEPINT_Msk       /*!< OUT endpoint interrupt bits */
+
+/********************  Bit definition for USB_OTG_HAINTMSK register  ********************/
+#define USB_OTG_HAINTMSK_HAINTM_Pos             (0U)                           
+#define USB_OTG_HAINTMSK_HAINTM_Msk             (0xFFFFUL << USB_OTG_HAINTMSK_HAINTM_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HAINTMSK_HAINTM                 USB_OTG_HAINTMSK_HAINTM_Msk    /*!< Channel interrupt mask */
+
+/********************  Bit definition for USB_OTG_GRXSTSP register  ********************/
+#define USB_OTG_GRXSTSP_EPNUM_Pos               (0U)                           
+#define USB_OTG_GRXSTSP_EPNUM_Msk               (0xFUL << USB_OTG_GRXSTSP_EPNUM_Pos) /*!< 0x0000000F */
+#define USB_OTG_GRXSTSP_EPNUM                   USB_OTG_GRXSTSP_EPNUM_Msk      /*!< IN EP interrupt mask bits */
+#define USB_OTG_GRXSTSP_BCNT_Pos                (4U)                           
+#define USB_OTG_GRXSTSP_BCNT_Msk                (0x7FFUL << USB_OTG_GRXSTSP_BCNT_Pos) /*!< 0x00007FF0 */
+#define USB_OTG_GRXSTSP_BCNT                    USB_OTG_GRXSTSP_BCNT_Msk       /*!< OUT EP interrupt mask bits */
+#define USB_OTG_GRXSTSP_DPID_Pos                (15U)                          
+#define USB_OTG_GRXSTSP_DPID_Msk                (0x3UL << USB_OTG_GRXSTSP_DPID_Pos) /*!< 0x00018000 */
+#define USB_OTG_GRXSTSP_DPID                    USB_OTG_GRXSTSP_DPID_Msk       /*!< OUT EP interrupt mask bits */
+#define USB_OTG_GRXSTSP_PKTSTS_Pos              (17U)                          
+#define USB_OTG_GRXSTSP_PKTSTS_Msk              (0xFUL << USB_OTG_GRXSTSP_PKTSTS_Pos) /*!< 0x001E0000 */
+#define USB_OTG_GRXSTSP_PKTSTS                  USB_OTG_GRXSTSP_PKTSTS_Msk     /*!< OUT EP interrupt mask bits */
+
+/********************  Bit definition for USB_OTG_DAINTMSK register  ********************/
+#define USB_OTG_DAINTMSK_IEPM_Pos               (0U)                           
+#define USB_OTG_DAINTMSK_IEPM_Msk               (0xFFFFUL << USB_OTG_DAINTMSK_IEPM_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DAINTMSK_IEPM                   USB_OTG_DAINTMSK_IEPM_Msk      /*!< IN EP interrupt mask bits */
+#define USB_OTG_DAINTMSK_OEPM_Pos               (16U)                          
+#define USB_OTG_DAINTMSK_OEPM_Msk               (0xFFFFUL << USB_OTG_DAINTMSK_OEPM_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_DAINTMSK_OEPM                   USB_OTG_DAINTMSK_OEPM_Msk      /*!< OUT EP interrupt mask bits */
+
+/********************  Bit definition for USB_OTG_GRXFSIZ register  ********************/
+#define USB_OTG_GRXFSIZ_RXFD_Pos                (0U)                           
+#define USB_OTG_GRXFSIZ_RXFD_Msk                (0xFFFFUL << USB_OTG_GRXFSIZ_RXFD_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_GRXFSIZ_RXFD                    USB_OTG_GRXFSIZ_RXFD_Msk       /*!< RxFIFO depth */
+
+/********************  Bit definition for USB_OTG_DVBUSDIS register  ********************/
+#define USB_OTG_DVBUSDIS_VBUSDT_Pos             (0U)                           
+#define USB_OTG_DVBUSDIS_VBUSDT_Msk             (0xFFFFUL << USB_OTG_DVBUSDIS_VBUSDT_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DVBUSDIS_VBUSDT                 USB_OTG_DVBUSDIS_VBUSDT_Msk    /*!< Device VBUS discharge time */
+
+/********************  Bit definition for OTG register  ********************/
+#define USB_OTG_NPTXFSA_Pos                     (0U)                           
+#define USB_OTG_NPTXFSA_Msk                     (0xFFFFUL << USB_OTG_NPTXFSA_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_NPTXFSA                         USB_OTG_NPTXFSA_Msk            /*!< Nonperiodic transmit RAM start address */
+#define USB_OTG_NPTXFD_Pos                      (16U)                          
+#define USB_OTG_NPTXFD_Msk                      (0xFFFFUL << USB_OTG_NPTXFD_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_NPTXFD                          USB_OTG_NPTXFD_Msk             /*!< Nonperiodic TxFIFO depth */
+#define USB_OTG_TX0FSA_Pos                      (0U)                           
+#define USB_OTG_TX0FSA_Msk                      (0xFFFFUL << USB_OTG_TX0FSA_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_TX0FSA                          USB_OTG_TX0FSA_Msk             /*!< Endpoint 0 transmit RAM start address */
+#define USB_OTG_TX0FD_Pos                       (16U)                          
+#define USB_OTG_TX0FD_Msk                       (0xFFFFUL << USB_OTG_TX0FD_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_TX0FD                           USB_OTG_TX0FD_Msk              /*!< Endpoint 0 TxFIFO depth */
+
+/********************  Bit definition for USB_OTG_DVBUSPULSE register  ********************/
+#define USB_OTG_DVBUSPULSE_DVBUSP_Pos           (0U)                           
+#define USB_OTG_DVBUSPULSE_DVBUSP_Msk           (0xFFFUL << USB_OTG_DVBUSPULSE_DVBUSP_Pos) /*!< 0x00000FFF */
+#define USB_OTG_DVBUSPULSE_DVBUSP               USB_OTG_DVBUSPULSE_DVBUSP_Msk  /*!< Device VBUS pulsing time */
+
+/********************  Bit definition for USB_OTG_GNPTXSTS register  ********************/
+#define USB_OTG_GNPTXSTS_NPTXFSAV_Pos           (0U)                           
+#define USB_OTG_GNPTXSTS_NPTXFSAV_Msk           (0xFFFFUL << USB_OTG_GNPTXSTS_NPTXFSAV_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_GNPTXSTS_NPTXFSAV               USB_OTG_GNPTXSTS_NPTXFSAV_Msk  /*!< Nonperiodic TxFIFO space available */
+
+#define USB_OTG_GNPTXSTS_NPTQXSAV_Pos           (16U)                          
+#define USB_OTG_GNPTXSTS_NPTQXSAV_Msk           (0xFFUL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00FF0000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV               USB_OTG_GNPTXSTS_NPTQXSAV_Msk  /*!< Nonperiodic transmit request queue space available */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_0             (0x01UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00010000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_1             (0x02UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00020000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_2             (0x04UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00040000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_3             (0x08UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00080000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_4             (0x10UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00100000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_5             (0x20UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00200000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_6             (0x40UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00400000 */
+#define USB_OTG_GNPTXSTS_NPTQXSAV_7             (0x80UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00800000 */
+
+#define USB_OTG_GNPTXSTS_NPTXQTOP_Pos           (24U)                          
+#define USB_OTG_GNPTXSTS_NPTXQTOP_Msk           (0x7FUL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x7F000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP               USB_OTG_GNPTXSTS_NPTXQTOP_Msk  /*!< Top of the nonperiodic transmit request queue */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_0             (0x01UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x01000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_1             (0x02UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x02000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_2             (0x04UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x04000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_3             (0x08UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x08000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_4             (0x10UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x10000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_5             (0x20UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x20000000 */
+#define USB_OTG_GNPTXSTS_NPTXQTOP_6             (0x40UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x40000000 */
+
+/********************  Bit definition for USB_OTG_DTHRCTL register  ********************/
+#define USB_OTG_DTHRCTL_NONISOTHREN_Pos         (0U)                           
+#define USB_OTG_DTHRCTL_NONISOTHREN_Msk         (0x1UL << USB_OTG_DTHRCTL_NONISOTHREN_Pos) /*!< 0x00000001 */
+#define USB_OTG_DTHRCTL_NONISOTHREN             USB_OTG_DTHRCTL_NONISOTHREN_Msk /*!< Nonisochronous IN endpoints threshold enable */
+#define USB_OTG_DTHRCTL_ISOTHREN_Pos            (1U)                           
+#define USB_OTG_DTHRCTL_ISOTHREN_Msk            (0x1UL << USB_OTG_DTHRCTL_ISOTHREN_Pos) /*!< 0x00000002 */
+#define USB_OTG_DTHRCTL_ISOTHREN                USB_OTG_DTHRCTL_ISOTHREN_Msk   /*!< ISO IN endpoint threshold enable */
+
+#define USB_OTG_DTHRCTL_TXTHRLEN_Pos            (2U)                           
+#define USB_OTG_DTHRCTL_TXTHRLEN_Msk            (0x1FFUL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x000007FC */
+#define USB_OTG_DTHRCTL_TXTHRLEN                USB_OTG_DTHRCTL_TXTHRLEN_Msk   /*!< Transmit threshold length */
+#define USB_OTG_DTHRCTL_TXTHRLEN_0              (0x001UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000004 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_1              (0x002UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000008 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_2              (0x004UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000010 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_3              (0x008UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000020 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_4              (0x010UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000040 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_5              (0x020UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000080 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_6              (0x040UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000100 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_7              (0x080UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000200 */
+#define USB_OTG_DTHRCTL_TXTHRLEN_8              (0x100UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000400 */
+#define USB_OTG_DTHRCTL_RXTHREN_Pos             (16U)                          
+#define USB_OTG_DTHRCTL_RXTHREN_Msk             (0x1UL << USB_OTG_DTHRCTL_RXTHREN_Pos) /*!< 0x00010000 */
+#define USB_OTG_DTHRCTL_RXTHREN                 USB_OTG_DTHRCTL_RXTHREN_Msk    /*!< Receive threshold enable */
+
+#define USB_OTG_DTHRCTL_RXTHRLEN_Pos            (17U)                          
+#define USB_OTG_DTHRCTL_RXTHRLEN_Msk            (0x1FFUL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x03FE0000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN                USB_OTG_DTHRCTL_RXTHRLEN_Msk   /*!< Receive threshold length */
+#define USB_OTG_DTHRCTL_RXTHRLEN_0              (0x001UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00020000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_1              (0x002UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00040000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_2              (0x004UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00080000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_3              (0x008UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00100000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_4              (0x010UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00200000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_5              (0x020UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00400000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_6              (0x040UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00800000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_7              (0x080UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x01000000 */
+#define USB_OTG_DTHRCTL_RXTHRLEN_8              (0x100UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x02000000 */
+#define USB_OTG_DTHRCTL_ARPEN_Pos               (27U)                          
+#define USB_OTG_DTHRCTL_ARPEN_Msk               (0x1UL << USB_OTG_DTHRCTL_ARPEN_Pos) /*!< 0x08000000 */
+#define USB_OTG_DTHRCTL_ARPEN                   USB_OTG_DTHRCTL_ARPEN_Msk      /*!< Arbiter parking enable */
+
+/********************  Bit definition for USB_OTG_DIEPEMPMSK register  ********************/
+#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos        (0U)                           
+#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk        (0xFFFFUL << USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DIEPEMPMSK_INEPTXFEM            USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk /*!< IN EP Tx FIFO empty interrupt mask bits */
+
+/********************  Bit definition for USB_OTG_DEACHINT register  ********************/
+#define USB_OTG_DEACHINT_IEP1INT_Pos            (1U)                           
+#define USB_OTG_DEACHINT_IEP1INT_Msk            (0x1UL << USB_OTG_DEACHINT_IEP1INT_Pos) /*!< 0x00000002 */
+#define USB_OTG_DEACHINT_IEP1INT                USB_OTG_DEACHINT_IEP1INT_Msk   /*!< IN endpoint 1interrupt bit */
+#define USB_OTG_DEACHINT_OEP1INT_Pos            (17U)                          
+#define USB_OTG_DEACHINT_OEP1INT_Msk            (0x1UL << USB_OTG_DEACHINT_OEP1INT_Pos) /*!< 0x00020000 */
+#define USB_OTG_DEACHINT_OEP1INT                USB_OTG_DEACHINT_OEP1INT_Msk   /*!< OUT endpoint 1 interrupt bit */
+
+/********************  Bit definition for USB_OTG_GCCFG register  ********************/
+#define USB_OTG_GCCFG_PWRDWN_Pos                (16U)                          
+#define USB_OTG_GCCFG_PWRDWN_Msk                (0x1UL << USB_OTG_GCCFG_PWRDWN_Pos) /*!< 0x00010000 */
+#define USB_OTG_GCCFG_PWRDWN                    USB_OTG_GCCFG_PWRDWN_Msk       /*!< Power down */
+#define USB_OTG_GCCFG_VBUSASEN_Pos              (18U)                          
+#define USB_OTG_GCCFG_VBUSASEN_Msk              (0x1UL << USB_OTG_GCCFG_VBUSASEN_Pos) /*!< 0x00040000 */
+#define USB_OTG_GCCFG_VBUSASEN                  USB_OTG_GCCFG_VBUSASEN_Msk     /*!< Enable the VBUS sensing device */
+#define USB_OTG_GCCFG_VBUSBSEN_Pos              (19U)                          
+#define USB_OTG_GCCFG_VBUSBSEN_Msk              (0x1UL << USB_OTG_GCCFG_VBUSBSEN_Pos) /*!< 0x00080000 */
+#define USB_OTG_GCCFG_VBUSBSEN                  USB_OTG_GCCFG_VBUSBSEN_Msk     /*!< Enable the VBUS sensing device */
+#define USB_OTG_GCCFG_SOFOUTEN_Pos              (20U)                          
+#define USB_OTG_GCCFG_SOFOUTEN_Msk              (0x1UL << USB_OTG_GCCFG_SOFOUTEN_Pos) /*!< 0x00100000 */
+#define USB_OTG_GCCFG_SOFOUTEN                  USB_OTG_GCCFG_SOFOUTEN_Msk     /*!< SOF output enable */
+
+/********************  Bit definition for USB_OTG_DEACHINTMSK register  ********************/
+#define USB_OTG_DEACHINTMSK_IEP1INTM_Pos        (1U)                           
+#define USB_OTG_DEACHINTMSK_IEP1INTM_Msk        (0x1UL << USB_OTG_DEACHINTMSK_IEP1INTM_Pos) /*!< 0x00000002 */
+#define USB_OTG_DEACHINTMSK_IEP1INTM            USB_OTG_DEACHINTMSK_IEP1INTM_Msk /*!< IN Endpoint 1 interrupt mask bit */
+#define USB_OTG_DEACHINTMSK_OEP1INTM_Pos        (17U)                          
+#define USB_OTG_DEACHINTMSK_OEP1INTM_Msk        (0x1UL << USB_OTG_DEACHINTMSK_OEP1INTM_Pos) /*!< 0x00020000 */
+#define USB_OTG_DEACHINTMSK_OEP1INTM            USB_OTG_DEACHINTMSK_OEP1INTM_Msk /*!< OUT Endpoint 1 interrupt mask bit */
+
+/********************  Bit definition for USB_OTG_CID register  ********************/
+#define USB_OTG_CID_PRODUCT_ID_Pos              (0U)                           
+#define USB_OTG_CID_PRODUCT_ID_Msk              (0xFFFFFFFFUL << USB_OTG_CID_PRODUCT_ID_Pos) /*!< 0xFFFFFFFF */
+#define USB_OTG_CID_PRODUCT_ID                  USB_OTG_CID_PRODUCT_ID_Msk     /*!< Product ID field */
+
+/********************  Bit definition for USB_OTG_DIEPEACHMSK1 register  ********************/
+#define USB_OTG_DIEPEACHMSK1_XFRCM_Pos          (0U)                           
+#define USB_OTG_DIEPEACHMSK1_XFRCM_Msk          (0x1UL << USB_OTG_DIEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */
+#define USB_OTG_DIEPEACHMSK1_XFRCM              USB_OTG_DIEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */
+#define USB_OTG_DIEPEACHMSK1_EPDM_Pos           (1U)                           
+#define USB_OTG_DIEPEACHMSK1_EPDM_Msk           (0x1UL << USB_OTG_DIEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */
+#define USB_OTG_DIEPEACHMSK1_EPDM               USB_OTG_DIEPEACHMSK1_EPDM_Msk  /*!< Endpoint disabled interrupt mask */
+#define USB_OTG_DIEPEACHMSK1_TOM_Pos            (3U)                           
+#define USB_OTG_DIEPEACHMSK1_TOM_Msk            (0x1UL << USB_OTG_DIEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */
+#define USB_OTG_DIEPEACHMSK1_TOM                USB_OTG_DIEPEACHMSK1_TOM_Msk   /*!< Timeout condition mask (nonisochronous endpoints) */
+#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos      (4U)                           
+#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk      (0x1UL << USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */
+#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK          USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */
+#define USB_OTG_DIEPEACHMSK1_INEPNMM_Pos        (5U)                           
+#define USB_OTG_DIEPEACHMSK1_INEPNMM_Msk        (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */
+#define USB_OTG_DIEPEACHMSK1_INEPNMM            USB_OTG_DIEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */
+#define USB_OTG_DIEPEACHMSK1_INEPNEM_Pos        (6U)                           
+#define USB_OTG_DIEPEACHMSK1_INEPNEM_Msk        (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */
+#define USB_OTG_DIEPEACHMSK1_INEPNEM            USB_OTG_DIEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */
+#define USB_OTG_DIEPEACHMSK1_TXFURM_Pos         (8U)                           
+#define USB_OTG_DIEPEACHMSK1_TXFURM_Msk         (0x1UL << USB_OTG_DIEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */
+#define USB_OTG_DIEPEACHMSK1_TXFURM             USB_OTG_DIEPEACHMSK1_TXFURM_Msk /*!< FIFO underrun mask */
+#define USB_OTG_DIEPEACHMSK1_BIM_Pos            (9U)                           
+#define USB_OTG_DIEPEACHMSK1_BIM_Msk            (0x1UL << USB_OTG_DIEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */
+#define USB_OTG_DIEPEACHMSK1_BIM                USB_OTG_DIEPEACHMSK1_BIM_Msk   /*!< BNA interrupt mask */
+#define USB_OTG_DIEPEACHMSK1_NAKM_Pos           (13U)                          
+#define USB_OTG_DIEPEACHMSK1_NAKM_Msk           (0x1UL << USB_OTG_DIEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */
+#define USB_OTG_DIEPEACHMSK1_NAKM               USB_OTG_DIEPEACHMSK1_NAKM_Msk  /*!< NAK interrupt mask */
+
+/********************  Bit definition for USB_OTG_HPRT register  ********************/
+#define USB_OTG_HPRT_PCSTS_Pos                  (0U)                           
+#define USB_OTG_HPRT_PCSTS_Msk                  (0x1UL << USB_OTG_HPRT_PCSTS_Pos) /*!< 0x00000001 */
+#define USB_OTG_HPRT_PCSTS                      USB_OTG_HPRT_PCSTS_Msk         /*!< Port connect status */
+#define USB_OTG_HPRT_PCDET_Pos                  (1U)                           
+#define USB_OTG_HPRT_PCDET_Msk                  (0x1UL << USB_OTG_HPRT_PCDET_Pos) /*!< 0x00000002 */
+#define USB_OTG_HPRT_PCDET                      USB_OTG_HPRT_PCDET_Msk         /*!< Port connect detected */
+#define USB_OTG_HPRT_PENA_Pos                   (2U)                           
+#define USB_OTG_HPRT_PENA_Msk                   (0x1UL << USB_OTG_HPRT_PENA_Pos) /*!< 0x00000004 */
+#define USB_OTG_HPRT_PENA                       USB_OTG_HPRT_PENA_Msk          /*!< Port enable */
+#define USB_OTG_HPRT_PENCHNG_Pos                (3U)                           
+#define USB_OTG_HPRT_PENCHNG_Msk                (0x1UL << USB_OTG_HPRT_PENCHNG_Pos) /*!< 0x00000008 */
+#define USB_OTG_HPRT_PENCHNG                    USB_OTG_HPRT_PENCHNG_Msk       /*!< Port enable/disable change */
+#define USB_OTG_HPRT_POCA_Pos                   (4U)                           
+#define USB_OTG_HPRT_POCA_Msk                   (0x1UL << USB_OTG_HPRT_POCA_Pos) /*!< 0x00000010 */
+#define USB_OTG_HPRT_POCA                       USB_OTG_HPRT_POCA_Msk          /*!< Port overcurrent active */
+#define USB_OTG_HPRT_POCCHNG_Pos                (5U)                           
+#define USB_OTG_HPRT_POCCHNG_Msk                (0x1UL << USB_OTG_HPRT_POCCHNG_Pos) /*!< 0x00000020 */
+#define USB_OTG_HPRT_POCCHNG                    USB_OTG_HPRT_POCCHNG_Msk       /*!< Port overcurrent change */
+#define USB_OTG_HPRT_PRES_Pos                   (6U)                           
+#define USB_OTG_HPRT_PRES_Msk                   (0x1UL << USB_OTG_HPRT_PRES_Pos) /*!< 0x00000040 */
+#define USB_OTG_HPRT_PRES                       USB_OTG_HPRT_PRES_Msk          /*!< Port resume */
+#define USB_OTG_HPRT_PSUSP_Pos                  (7U)                           
+#define USB_OTG_HPRT_PSUSP_Msk                  (0x1UL << USB_OTG_HPRT_PSUSP_Pos) /*!< 0x00000080 */
+#define USB_OTG_HPRT_PSUSP                      USB_OTG_HPRT_PSUSP_Msk         /*!< Port suspend */
+#define USB_OTG_HPRT_PRST_Pos                   (8U)                           
+#define USB_OTG_HPRT_PRST_Msk                   (0x1UL << USB_OTG_HPRT_PRST_Pos) /*!< 0x00000100 */
+#define USB_OTG_HPRT_PRST                       USB_OTG_HPRT_PRST_Msk          /*!< Port reset */
+
+#define USB_OTG_HPRT_PLSTS_Pos                  (10U)                          
+#define USB_OTG_HPRT_PLSTS_Msk                  (0x3UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000C00 */
+#define USB_OTG_HPRT_PLSTS                      USB_OTG_HPRT_PLSTS_Msk         /*!< Port line status */
+#define USB_OTG_HPRT_PLSTS_0                    (0x1UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000400 */
+#define USB_OTG_HPRT_PLSTS_1                    (0x2UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000800 */
+#define USB_OTG_HPRT_PPWR_Pos                   (12U)                          
+#define USB_OTG_HPRT_PPWR_Msk                   (0x1UL << USB_OTG_HPRT_PPWR_Pos) /*!< 0x00001000 */
+#define USB_OTG_HPRT_PPWR                       USB_OTG_HPRT_PPWR_Msk          /*!< Port power */
+
+#define USB_OTG_HPRT_PTCTL_Pos                  (13U)                          
+#define USB_OTG_HPRT_PTCTL_Msk                  (0xFUL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x0001E000 */
+#define USB_OTG_HPRT_PTCTL                      USB_OTG_HPRT_PTCTL_Msk         /*!< Port test control */
+#define USB_OTG_HPRT_PTCTL_0                    (0x1UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00002000 */
+#define USB_OTG_HPRT_PTCTL_1                    (0x2UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00004000 */
+#define USB_OTG_HPRT_PTCTL_2                    (0x4UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00008000 */
+#define USB_OTG_HPRT_PTCTL_3                    (0x8UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00010000 */
+
+#define USB_OTG_HPRT_PSPD_Pos                   (17U)                          
+#define USB_OTG_HPRT_PSPD_Msk                   (0x3UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00060000 */
+#define USB_OTG_HPRT_PSPD                       USB_OTG_HPRT_PSPD_Msk          /*!< Port speed */
+#define USB_OTG_HPRT_PSPD_0                     (0x1UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00020000 */
+#define USB_OTG_HPRT_PSPD_1                     (0x2UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00040000 */
+
+/********************  Bit definition for USB_OTG_DOEPEACHMSK1 register  ********************/
+#define USB_OTG_DOEPEACHMSK1_XFRCM_Pos          (0U)                           
+#define USB_OTG_DOEPEACHMSK1_XFRCM_Msk          (0x1UL << USB_OTG_DOEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */
+#define USB_OTG_DOEPEACHMSK1_XFRCM              USB_OTG_DOEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */
+#define USB_OTG_DOEPEACHMSK1_EPDM_Pos           (1U)                           
+#define USB_OTG_DOEPEACHMSK1_EPDM_Msk           (0x1UL << USB_OTG_DOEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */
+#define USB_OTG_DOEPEACHMSK1_EPDM               USB_OTG_DOEPEACHMSK1_EPDM_Msk  /*!< Endpoint disabled interrupt mask */
+#define USB_OTG_DOEPEACHMSK1_TOM_Pos            (3U)                           
+#define USB_OTG_DOEPEACHMSK1_TOM_Msk            (0x1UL << USB_OTG_DOEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */
+#define USB_OTG_DOEPEACHMSK1_TOM                USB_OTG_DOEPEACHMSK1_TOM_Msk   /*!< Timeout condition mask */
+#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos      (4U)                           
+#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk      (0x1UL << USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */
+#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK          USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */
+#define USB_OTG_DOEPEACHMSK1_INEPNMM_Pos        (5U)                           
+#define USB_OTG_DOEPEACHMSK1_INEPNMM_Msk        (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */
+#define USB_OTG_DOEPEACHMSK1_INEPNMM            USB_OTG_DOEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */
+#define USB_OTG_DOEPEACHMSK1_INEPNEM_Pos        (6U)                           
+#define USB_OTG_DOEPEACHMSK1_INEPNEM_Msk        (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */
+#define USB_OTG_DOEPEACHMSK1_INEPNEM            USB_OTG_DOEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */
+#define USB_OTG_DOEPEACHMSK1_TXFURM_Pos         (8U)                           
+#define USB_OTG_DOEPEACHMSK1_TXFURM_Msk         (0x1UL << USB_OTG_DOEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */
+#define USB_OTG_DOEPEACHMSK1_TXFURM             USB_OTG_DOEPEACHMSK1_TXFURM_Msk /*!< OUT packet error mask */
+#define USB_OTG_DOEPEACHMSK1_BIM_Pos            (9U)                           
+#define USB_OTG_DOEPEACHMSK1_BIM_Msk            (0x1UL << USB_OTG_DOEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */
+#define USB_OTG_DOEPEACHMSK1_BIM                USB_OTG_DOEPEACHMSK1_BIM_Msk   /*!< BNA interrupt mask */
+#define USB_OTG_DOEPEACHMSK1_BERRM_Pos          (12U)                          
+#define USB_OTG_DOEPEACHMSK1_BERRM_Msk          (0x1UL << USB_OTG_DOEPEACHMSK1_BERRM_Pos) /*!< 0x00001000 */
+#define USB_OTG_DOEPEACHMSK1_BERRM              USB_OTG_DOEPEACHMSK1_BERRM_Msk /*!< Bubble error interrupt mask */
+#define USB_OTG_DOEPEACHMSK1_NAKM_Pos           (13U)                          
+#define USB_OTG_DOEPEACHMSK1_NAKM_Msk           (0x1UL << USB_OTG_DOEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */
+#define USB_OTG_DOEPEACHMSK1_NAKM               USB_OTG_DOEPEACHMSK1_NAKM_Msk  /*!< NAK interrupt mask */
+#define USB_OTG_DOEPEACHMSK1_NYETM_Pos          (14U)                          
+#define USB_OTG_DOEPEACHMSK1_NYETM_Msk          (0x1UL << USB_OTG_DOEPEACHMSK1_NYETM_Pos) /*!< 0x00004000 */
+#define USB_OTG_DOEPEACHMSK1_NYETM              USB_OTG_DOEPEACHMSK1_NYETM_Msk /*!< NYET interrupt mask */
+
+/********************  Bit definition for USB_OTG_HPTXFSIZ register  ********************/
+#define USB_OTG_HPTXFSIZ_PTXSA_Pos              (0U)                           
+#define USB_OTG_HPTXFSIZ_PTXSA_Msk              (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXSA_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_HPTXFSIZ_PTXSA                  USB_OTG_HPTXFSIZ_PTXSA_Msk     /*!< Host periodic TxFIFO start address */
+#define USB_OTG_HPTXFSIZ_PTXFD_Pos              (16U)                          
+#define USB_OTG_HPTXFSIZ_PTXFD_Msk              (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXFD_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_HPTXFSIZ_PTXFD                  USB_OTG_HPTXFSIZ_PTXFD_Msk     /*!< Host periodic TxFIFO depth */
+
+/********************  Bit definition for USB_OTG_DIEPCTL register  ********************/
+#define USB_OTG_DIEPCTL_MPSIZ_Pos               (0U)                           
+#define USB_OTG_DIEPCTL_MPSIZ_Msk               (0x7FFUL << USB_OTG_DIEPCTL_MPSIZ_Pos) /*!< 0x000007FF */
+#define USB_OTG_DIEPCTL_MPSIZ                   USB_OTG_DIEPCTL_MPSIZ_Msk      /*!< Maximum packet size */
+#define USB_OTG_DIEPCTL_USBAEP_Pos              (15U)                          
+#define USB_OTG_DIEPCTL_USBAEP_Msk              (0x1UL << USB_OTG_DIEPCTL_USBAEP_Pos) /*!< 0x00008000 */
+#define USB_OTG_DIEPCTL_USBAEP                  USB_OTG_DIEPCTL_USBAEP_Msk     /*!< USB active endpoint */
+#define USB_OTG_DIEPCTL_EONUM_DPID_Pos          (16U)                          
+#define USB_OTG_DIEPCTL_EONUM_DPID_Msk          (0x1UL << USB_OTG_DIEPCTL_EONUM_DPID_Pos) /*!< 0x00010000 */
+#define USB_OTG_DIEPCTL_EONUM_DPID              USB_OTG_DIEPCTL_EONUM_DPID_Msk /*!< Even/odd frame */
+#define USB_OTG_DIEPCTL_NAKSTS_Pos              (17U)                          
+#define USB_OTG_DIEPCTL_NAKSTS_Msk              (0x1UL << USB_OTG_DIEPCTL_NAKSTS_Pos) /*!< 0x00020000 */
+#define USB_OTG_DIEPCTL_NAKSTS                  USB_OTG_DIEPCTL_NAKSTS_Msk     /*!< NAK status */
+
+#define USB_OTG_DIEPCTL_EPTYP_Pos               (18U)                          
+#define USB_OTG_DIEPCTL_EPTYP_Msk               (0x3UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x000C0000 */
+#define USB_OTG_DIEPCTL_EPTYP                   USB_OTG_DIEPCTL_EPTYP_Msk      /*!< Endpoint type */
+#define USB_OTG_DIEPCTL_EPTYP_0                 (0x1UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00040000 */
+#define USB_OTG_DIEPCTL_EPTYP_1                 (0x2UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00080000 */
+#define USB_OTG_DIEPCTL_STALL_Pos               (21U)                          
+#define USB_OTG_DIEPCTL_STALL_Msk               (0x1UL << USB_OTG_DIEPCTL_STALL_Pos) /*!< 0x00200000 */
+#define USB_OTG_DIEPCTL_STALL                   USB_OTG_DIEPCTL_STALL_Msk      /*!< STALL handshake */
+
+#define USB_OTG_DIEPCTL_TXFNUM_Pos              (22U)                          
+#define USB_OTG_DIEPCTL_TXFNUM_Msk              (0xFUL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x03C00000 */
+#define USB_OTG_DIEPCTL_TXFNUM                  USB_OTG_DIEPCTL_TXFNUM_Msk     /*!< TxFIFO number */
+#define USB_OTG_DIEPCTL_TXFNUM_0                (0x1UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00400000 */
+#define USB_OTG_DIEPCTL_TXFNUM_1                (0x2UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00800000 */
+#define USB_OTG_DIEPCTL_TXFNUM_2                (0x4UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x01000000 */
+#define USB_OTG_DIEPCTL_TXFNUM_3                (0x8UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x02000000 */
+#define USB_OTG_DIEPCTL_CNAK_Pos                (26U)                          
+#define USB_OTG_DIEPCTL_CNAK_Msk                (0x1UL << USB_OTG_DIEPCTL_CNAK_Pos) /*!< 0x04000000 */
+#define USB_OTG_DIEPCTL_CNAK                    USB_OTG_DIEPCTL_CNAK_Msk       /*!< Clear NAK */
+#define USB_OTG_DIEPCTL_SNAK_Pos                (27U)                          
+#define USB_OTG_DIEPCTL_SNAK_Msk                (0x1UL << USB_OTG_DIEPCTL_SNAK_Pos) /*!< 0x08000000 */
+#define USB_OTG_DIEPCTL_SNAK                    USB_OTG_DIEPCTL_SNAK_Msk       /*!< Set NAK */
+#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos      (28U)                          
+#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk      (0x1UL << USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos) /*!< 0x10000000 */
+#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM          USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk /*!< Set DATA0 PID */
+#define USB_OTG_DIEPCTL_SODDFRM_Pos             (29U)                          
+#define USB_OTG_DIEPCTL_SODDFRM_Msk             (0x1UL << USB_OTG_DIEPCTL_SODDFRM_Pos) /*!< 0x20000000 */
+#define USB_OTG_DIEPCTL_SODDFRM                 USB_OTG_DIEPCTL_SODDFRM_Msk    /*!< Set odd frame */
+#define USB_OTG_DIEPCTL_EPDIS_Pos               (30U)                          
+#define USB_OTG_DIEPCTL_EPDIS_Msk               (0x1UL << USB_OTG_DIEPCTL_EPDIS_Pos) /*!< 0x40000000 */
+#define USB_OTG_DIEPCTL_EPDIS                   USB_OTG_DIEPCTL_EPDIS_Msk      /*!< Endpoint disable */
+#define USB_OTG_DIEPCTL_EPENA_Pos               (31U)                          
+#define USB_OTG_DIEPCTL_EPENA_Msk               (0x1UL << USB_OTG_DIEPCTL_EPENA_Pos) /*!< 0x80000000 */
+#define USB_OTG_DIEPCTL_EPENA                   USB_OTG_DIEPCTL_EPENA_Msk      /*!< Endpoint enable */
+
+/********************  Bit definition for USB_OTG_HCCHAR register  ********************/
+#define USB_OTG_HCCHAR_MPSIZ_Pos                (0U)                           
+#define USB_OTG_HCCHAR_MPSIZ_Msk                (0x7FFUL << USB_OTG_HCCHAR_MPSIZ_Pos) /*!< 0x000007FF */
+#define USB_OTG_HCCHAR_MPSIZ                    USB_OTG_HCCHAR_MPSIZ_Msk       /*!< Maximum packet size */
+
+#define USB_OTG_HCCHAR_EPNUM_Pos                (11U)                          
+#define USB_OTG_HCCHAR_EPNUM_Msk                (0xFUL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00007800 */
+#define USB_OTG_HCCHAR_EPNUM                    USB_OTG_HCCHAR_EPNUM_Msk       /*!< Endpoint number */
+#define USB_OTG_HCCHAR_EPNUM_0                  (0x1UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00000800 */
+#define USB_OTG_HCCHAR_EPNUM_1                  (0x2UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00001000 */
+#define USB_OTG_HCCHAR_EPNUM_2                  (0x4UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00002000 */
+#define USB_OTG_HCCHAR_EPNUM_3                  (0x8UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00004000 */
+#define USB_OTG_HCCHAR_EPDIR_Pos                (15U)                          
+#define USB_OTG_HCCHAR_EPDIR_Msk                (0x1UL << USB_OTG_HCCHAR_EPDIR_Pos) /*!< 0x00008000 */
+#define USB_OTG_HCCHAR_EPDIR                    USB_OTG_HCCHAR_EPDIR_Msk       /*!< Endpoint direction */
+#define USB_OTG_HCCHAR_LSDEV_Pos                (17U)                          
+#define USB_OTG_HCCHAR_LSDEV_Msk                (0x1UL << USB_OTG_HCCHAR_LSDEV_Pos) /*!< 0x00020000 */
+#define USB_OTG_HCCHAR_LSDEV                    USB_OTG_HCCHAR_LSDEV_Msk       /*!< Low-speed device */
+
+#define USB_OTG_HCCHAR_EPTYP_Pos                (18U)                          
+#define USB_OTG_HCCHAR_EPTYP_Msk                (0x3UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x000C0000 */
+#define USB_OTG_HCCHAR_EPTYP                    USB_OTG_HCCHAR_EPTYP_Msk       /*!< Endpoint type */
+#define USB_OTG_HCCHAR_EPTYP_0                  (0x1UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00040000 */
+#define USB_OTG_HCCHAR_EPTYP_1                  (0x2UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00080000 */
+                                      
+#define USB_OTG_HCCHAR_MC_Pos                   (20U)                          
+#define USB_OTG_HCCHAR_MC_Msk                   (0x3UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00300000 */
+#define USB_OTG_HCCHAR_MC                       USB_OTG_HCCHAR_MC_Msk          /*!< Multi Count (MC) / Error Count (EC) */
+#define USB_OTG_HCCHAR_MC_0                     (0x1UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00100000 */
+#define USB_OTG_HCCHAR_MC_1                     (0x2UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00200000 */
+
+#define USB_OTG_HCCHAR_DAD_Pos                  (22U)                          
+#define USB_OTG_HCCHAR_DAD_Msk                  (0x7FUL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x1FC00000 */
+#define USB_OTG_HCCHAR_DAD                      USB_OTG_HCCHAR_DAD_Msk         /*!< Device address */
+#define USB_OTG_HCCHAR_DAD_0                    (0x01UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x00400000 */
+#define USB_OTG_HCCHAR_DAD_1                    (0x02UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x00800000 */
+#define USB_OTG_HCCHAR_DAD_2                    (0x04UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x01000000 */
+#define USB_OTG_HCCHAR_DAD_3                    (0x08UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x02000000 */
+#define USB_OTG_HCCHAR_DAD_4                    (0x10UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x04000000 */
+#define USB_OTG_HCCHAR_DAD_5                    (0x20UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x08000000 */
+#define USB_OTG_HCCHAR_DAD_6                    (0x40UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x10000000 */
+#define USB_OTG_HCCHAR_ODDFRM_Pos               (29U)                          
+#define USB_OTG_HCCHAR_ODDFRM_Msk               (0x1UL << USB_OTG_HCCHAR_ODDFRM_Pos) /*!< 0x20000000 */
+#define USB_OTG_HCCHAR_ODDFRM                   USB_OTG_HCCHAR_ODDFRM_Msk      /*!< Odd frame */
+#define USB_OTG_HCCHAR_CHDIS_Pos                (30U)                          
+#define USB_OTG_HCCHAR_CHDIS_Msk                (0x1UL << USB_OTG_HCCHAR_CHDIS_Pos) /*!< 0x40000000 */
+#define USB_OTG_HCCHAR_CHDIS                    USB_OTG_HCCHAR_CHDIS_Msk       /*!< Channel disable */
+#define USB_OTG_HCCHAR_CHENA_Pos                (31U)                          
+#define USB_OTG_HCCHAR_CHENA_Msk                (0x1UL << USB_OTG_HCCHAR_CHENA_Pos) /*!< 0x80000000 */
+#define USB_OTG_HCCHAR_CHENA                    USB_OTG_HCCHAR_CHENA_Msk       /*!< Channel enable */
+
+/********************  Bit definition for USB_OTG_HCSPLT register  ********************/
+
+#define USB_OTG_HCSPLT_PRTADDR_Pos              (0U)                           
+#define USB_OTG_HCSPLT_PRTADDR_Msk              (0x7FUL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x0000007F */
+#define USB_OTG_HCSPLT_PRTADDR                  USB_OTG_HCSPLT_PRTADDR_Msk     /*!< Port address */
+#define USB_OTG_HCSPLT_PRTADDR_0                (0x01UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000001 */
+#define USB_OTG_HCSPLT_PRTADDR_1                (0x02UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000002 */
+#define USB_OTG_HCSPLT_PRTADDR_2                (0x04UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000004 */
+#define USB_OTG_HCSPLT_PRTADDR_3                (0x08UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000008 */
+#define USB_OTG_HCSPLT_PRTADDR_4                (0x10UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000010 */
+#define USB_OTG_HCSPLT_PRTADDR_5                (0x20UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000020 */
+#define USB_OTG_HCSPLT_PRTADDR_6                (0x40UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000040 */
+
+#define USB_OTG_HCSPLT_HUBADDR_Pos              (7U)                           
+#define USB_OTG_HCSPLT_HUBADDR_Msk              (0x7FUL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00003F80 */
+#define USB_OTG_HCSPLT_HUBADDR                  USB_OTG_HCSPLT_HUBADDR_Msk     /*!< Hub address */
+#define USB_OTG_HCSPLT_HUBADDR_0                (0x01UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000080 */
+#define USB_OTG_HCSPLT_HUBADDR_1                (0x02UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000100 */
+#define USB_OTG_HCSPLT_HUBADDR_2                (0x04UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000200 */
+#define USB_OTG_HCSPLT_HUBADDR_3                (0x08UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000400 */
+#define USB_OTG_HCSPLT_HUBADDR_4                (0x10UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000800 */
+#define USB_OTG_HCSPLT_HUBADDR_5                (0x20UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00001000 */
+#define USB_OTG_HCSPLT_HUBADDR_6                (0x40UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00002000 */
+
+#define USB_OTG_HCSPLT_XACTPOS_Pos              (14U)                          
+#define USB_OTG_HCSPLT_XACTPOS_Msk              (0x3UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x0000C000 */
+#define USB_OTG_HCSPLT_XACTPOS                  USB_OTG_HCSPLT_XACTPOS_Msk     /*!< XACTPOS */
+#define USB_OTG_HCSPLT_XACTPOS_0                (0x1UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00004000 */
+#define USB_OTG_HCSPLT_XACTPOS_1                (0x2UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00008000 */
+#define USB_OTG_HCSPLT_COMPLSPLT_Pos            (16U)                          
+#define USB_OTG_HCSPLT_COMPLSPLT_Msk            (0x1UL << USB_OTG_HCSPLT_COMPLSPLT_Pos) /*!< 0x00010000 */
+#define USB_OTG_HCSPLT_COMPLSPLT                USB_OTG_HCSPLT_COMPLSPLT_Msk   /*!< Do complete split */
+#define USB_OTG_HCSPLT_SPLITEN_Pos              (31U)                          
+#define USB_OTG_HCSPLT_SPLITEN_Msk              (0x1UL << USB_OTG_HCSPLT_SPLITEN_Pos) /*!< 0x80000000 */
+#define USB_OTG_HCSPLT_SPLITEN                  USB_OTG_HCSPLT_SPLITEN_Msk     /*!< Split enable */
+
+/********************  Bit definition for USB_OTG_HCINT register  ********************/
+#define USB_OTG_HCINT_XFRC_Pos                  (0U)                           
+#define USB_OTG_HCINT_XFRC_Msk                  (0x1UL << USB_OTG_HCINT_XFRC_Pos) /*!< 0x00000001 */
+#define USB_OTG_HCINT_XFRC                      USB_OTG_HCINT_XFRC_Msk         /*!< Transfer completed */
+#define USB_OTG_HCINT_CHH_Pos                   (1U)                           
+#define USB_OTG_HCINT_CHH_Msk                   (0x1UL << USB_OTG_HCINT_CHH_Pos) /*!< 0x00000002 */
+#define USB_OTG_HCINT_CHH                       USB_OTG_HCINT_CHH_Msk          /*!< Channel halted */
+#define USB_OTG_HCINT_AHBERR_Pos                (2U)                           
+#define USB_OTG_HCINT_AHBERR_Msk                (0x1UL << USB_OTG_HCINT_AHBERR_Pos) /*!< 0x00000004 */
+#define USB_OTG_HCINT_AHBERR                    USB_OTG_HCINT_AHBERR_Msk       /*!< AHB error */
+#define USB_OTG_HCINT_STALL_Pos                 (3U)                           
+#define USB_OTG_HCINT_STALL_Msk                 (0x1UL << USB_OTG_HCINT_STALL_Pos) /*!< 0x00000008 */
+#define USB_OTG_HCINT_STALL                     USB_OTG_HCINT_STALL_Msk        /*!< STALL response received interrupt */
+#define USB_OTG_HCINT_NAK_Pos                   (4U)                           
+#define USB_OTG_HCINT_NAK_Msk                   (0x1UL << USB_OTG_HCINT_NAK_Pos) /*!< 0x00000010 */
+#define USB_OTG_HCINT_NAK                       USB_OTG_HCINT_NAK_Msk          /*!< NAK response received interrupt */
+#define USB_OTG_HCINT_ACK_Pos                   (5U)                           
+#define USB_OTG_HCINT_ACK_Msk                   (0x1UL << USB_OTG_HCINT_ACK_Pos) /*!< 0x00000020 */
+#define USB_OTG_HCINT_ACK                       USB_OTG_HCINT_ACK_Msk          /*!< ACK response received/transmitted interrupt */
+#define USB_OTG_HCINT_NYET_Pos                  (6U)                           
+#define USB_OTG_HCINT_NYET_Msk                  (0x1UL << USB_OTG_HCINT_NYET_Pos) /*!< 0x00000040 */
+#define USB_OTG_HCINT_NYET                      USB_OTG_HCINT_NYET_Msk         /*!< Response received interrupt */
+#define USB_OTG_HCINT_TXERR_Pos                 (7U)                           
+#define USB_OTG_HCINT_TXERR_Msk                 (0x1UL << USB_OTG_HCINT_TXERR_Pos) /*!< 0x00000080 */
+#define USB_OTG_HCINT_TXERR                     USB_OTG_HCINT_TXERR_Msk        /*!< Transaction error */
+#define USB_OTG_HCINT_BBERR_Pos                 (8U)                           
+#define USB_OTG_HCINT_BBERR_Msk                 (0x1UL << USB_OTG_HCINT_BBERR_Pos) /*!< 0x00000100 */
+#define USB_OTG_HCINT_BBERR                     USB_OTG_HCINT_BBERR_Msk        /*!< Babble error */
+#define USB_OTG_HCINT_FRMOR_Pos                 (9U)                           
+#define USB_OTG_HCINT_FRMOR_Msk                 (0x1UL << USB_OTG_HCINT_FRMOR_Pos) /*!< 0x00000200 */
+#define USB_OTG_HCINT_FRMOR                     USB_OTG_HCINT_FRMOR_Msk        /*!< Frame overrun */
+#define USB_OTG_HCINT_DTERR_Pos                 (10U)                          
+#define USB_OTG_HCINT_DTERR_Msk                 (0x1UL << USB_OTG_HCINT_DTERR_Pos) /*!< 0x00000400 */
+#define USB_OTG_HCINT_DTERR                     USB_OTG_HCINT_DTERR_Msk        /*!< Data toggle error */
+
+/********************  Bit definition for USB_OTG_DIEPINT register  ********************/
+#define USB_OTG_DIEPINT_XFRC_Pos                (0U)                           
+#define USB_OTG_DIEPINT_XFRC_Msk                (0x1UL << USB_OTG_DIEPINT_XFRC_Pos) /*!< 0x00000001 */
+#define USB_OTG_DIEPINT_XFRC                    USB_OTG_DIEPINT_XFRC_Msk       /*!< Transfer completed interrupt */
+#define USB_OTG_DIEPINT_EPDISD_Pos              (1U)                           
+#define USB_OTG_DIEPINT_EPDISD_Msk              (0x1UL << USB_OTG_DIEPINT_EPDISD_Pos) /*!< 0x00000002 */
+#define USB_OTG_DIEPINT_EPDISD                  USB_OTG_DIEPINT_EPDISD_Msk     /*!< Endpoint disabled interrupt */
+#define USB_OTG_DIEPINT_AHBERR_Pos               (2U)
+#define USB_OTG_DIEPINT_AHBERR_Msk               (0x1UL << USB_OTG_DIEPINT_AHBERR_Pos) /*!< 0x00000004 */
+#define USB_OTG_DIEPINT_AHBERR                   USB_OTG_DIEPINT_AHBERR_Msk   /*!< AHB Error (AHBErr) during an IN transaction */
+#define USB_OTG_DIEPINT_TOC_Pos                 (3U)                           
+#define USB_OTG_DIEPINT_TOC_Msk                 (0x1UL << USB_OTG_DIEPINT_TOC_Pos) /*!< 0x00000008 */
+#define USB_OTG_DIEPINT_TOC                     USB_OTG_DIEPINT_TOC_Msk        /*!< Timeout condition */
+#define USB_OTG_DIEPINT_ITTXFE_Pos              (4U)                           
+#define USB_OTG_DIEPINT_ITTXFE_Msk              (0x1UL << USB_OTG_DIEPINT_ITTXFE_Pos) /*!< 0x00000010 */
+#define USB_OTG_DIEPINT_ITTXFE                  USB_OTG_DIEPINT_ITTXFE_Msk     /*!< IN token received when TxFIFO is empty */
+#define USB_OTG_DIEPINT_INEPNM_Pos               (5U)
+#define USB_OTG_DIEPINT_INEPNM_Msk               (0x1UL << USB_OTG_DIEPINT_INEPNM_Pos) /*!< 0x00000004 */
+#define USB_OTG_DIEPINT_INEPNM                   USB_OTG_DIEPINT_INEPNM_Msk   /*!< IN token received with EP mismatch */
+#define USB_OTG_DIEPINT_INEPNE_Pos              (6U)                           
+#define USB_OTG_DIEPINT_INEPNE_Msk              (0x1UL << USB_OTG_DIEPINT_INEPNE_Pos) /*!< 0x00000040 */
+#define USB_OTG_DIEPINT_INEPNE                  USB_OTG_DIEPINT_INEPNE_Msk     /*!< IN endpoint NAK effective */
+#define USB_OTG_DIEPINT_TXFE_Pos                (7U)                           
+#define USB_OTG_DIEPINT_TXFE_Msk                (0x1UL << USB_OTG_DIEPINT_TXFE_Pos) /*!< 0x00000080 */
+#define USB_OTG_DIEPINT_TXFE                    USB_OTG_DIEPINT_TXFE_Msk       /*!< Transmit FIFO empty */
+#define USB_OTG_DIEPINT_TXFIFOUDRN_Pos          (8U)                           
+#define USB_OTG_DIEPINT_TXFIFOUDRN_Msk          (0x1UL << USB_OTG_DIEPINT_TXFIFOUDRN_Pos) /*!< 0x00000100 */
+#define USB_OTG_DIEPINT_TXFIFOUDRN              USB_OTG_DIEPINT_TXFIFOUDRN_Msk /*!< Transmit Fifo Underrun */
+#define USB_OTG_DIEPINT_BNA_Pos                 (9U)                           
+#define USB_OTG_DIEPINT_BNA_Msk                 (0x1UL << USB_OTG_DIEPINT_BNA_Pos) /*!< 0x00000200 */
+#define USB_OTG_DIEPINT_BNA                     USB_OTG_DIEPINT_BNA_Msk        /*!< Buffer not available interrupt */
+#define USB_OTG_DIEPINT_PKTDRPSTS_Pos           (11U)                          
+#define USB_OTG_DIEPINT_PKTDRPSTS_Msk           (0x1UL << USB_OTG_DIEPINT_PKTDRPSTS_Pos) /*!< 0x00000800 */
+#define USB_OTG_DIEPINT_PKTDRPSTS               USB_OTG_DIEPINT_PKTDRPSTS_Msk  /*!< Packet dropped status */
+#define USB_OTG_DIEPINT_BERR_Pos                (12U)                          
+#define USB_OTG_DIEPINT_BERR_Msk                (0x1UL << USB_OTG_DIEPINT_BERR_Pos) /*!< 0x00001000 */
+#define USB_OTG_DIEPINT_BERR                    USB_OTG_DIEPINT_BERR_Msk       /*!< Babble error interrupt */
+#define USB_OTG_DIEPINT_NAK_Pos                 (13U)                          
+#define USB_OTG_DIEPINT_NAK_Msk                 (0x1UL << USB_OTG_DIEPINT_NAK_Pos) /*!< 0x00002000 */
+#define USB_OTG_DIEPINT_NAK                     USB_OTG_DIEPINT_NAK_Msk        /*!< NAK interrupt */
+
+/********************  Bit definition for USB_OTG_HCINTMSK register  ********************/
+#define USB_OTG_HCINTMSK_XFRCM_Pos              (0U)                           
+#define USB_OTG_HCINTMSK_XFRCM_Msk              (0x1UL << USB_OTG_HCINTMSK_XFRCM_Pos) /*!< 0x00000001 */
+#define USB_OTG_HCINTMSK_XFRCM                  USB_OTG_HCINTMSK_XFRCM_Msk     /*!< Transfer completed mask */
+#define USB_OTG_HCINTMSK_CHHM_Pos               (1U)                           
+#define USB_OTG_HCINTMSK_CHHM_Msk               (0x1UL << USB_OTG_HCINTMSK_CHHM_Pos) /*!< 0x00000002 */
+#define USB_OTG_HCINTMSK_CHHM                   USB_OTG_HCINTMSK_CHHM_Msk      /*!< Channel halted mask */
+#define USB_OTG_HCINTMSK_AHBERR_Pos             (2U)                           
+#define USB_OTG_HCINTMSK_AHBERR_Msk             (0x1UL << USB_OTG_HCINTMSK_AHBERR_Pos) /*!< 0x00000004 */
+#define USB_OTG_HCINTMSK_AHBERR                 USB_OTG_HCINTMSK_AHBERR_Msk    /*!< AHB error */
+#define USB_OTG_HCINTMSK_STALLM_Pos             (3U)                           
+#define USB_OTG_HCINTMSK_STALLM_Msk             (0x1UL << USB_OTG_HCINTMSK_STALLM_Pos) /*!< 0x00000008 */
+#define USB_OTG_HCINTMSK_STALLM                 USB_OTG_HCINTMSK_STALLM_Msk    /*!< STALL response received interrupt mask */
+#define USB_OTG_HCINTMSK_NAKM_Pos               (4U)                           
+#define USB_OTG_HCINTMSK_NAKM_Msk               (0x1UL << USB_OTG_HCINTMSK_NAKM_Pos) /*!< 0x00000010 */
+#define USB_OTG_HCINTMSK_NAKM                   USB_OTG_HCINTMSK_NAKM_Msk      /*!< NAK response received interrupt mask */
+#define USB_OTG_HCINTMSK_ACKM_Pos               (5U)                           
+#define USB_OTG_HCINTMSK_ACKM_Msk               (0x1UL << USB_OTG_HCINTMSK_ACKM_Pos) /*!< 0x00000020 */
+#define USB_OTG_HCINTMSK_ACKM                   USB_OTG_HCINTMSK_ACKM_Msk      /*!< ACK response received/transmitted interrupt mask */
+#define USB_OTG_HCINTMSK_NYET_Pos               (6U)                           
+#define USB_OTG_HCINTMSK_NYET_Msk               (0x1UL << USB_OTG_HCINTMSK_NYET_Pos) /*!< 0x00000040 */
+#define USB_OTG_HCINTMSK_NYET                   USB_OTG_HCINTMSK_NYET_Msk      /*!< response received interrupt mask */
+#define USB_OTG_HCINTMSK_TXERRM_Pos             (7U)                           
+#define USB_OTG_HCINTMSK_TXERRM_Msk             (0x1UL << USB_OTG_HCINTMSK_TXERRM_Pos) /*!< 0x00000080 */
+#define USB_OTG_HCINTMSK_TXERRM                 USB_OTG_HCINTMSK_TXERRM_Msk    /*!< Transaction error mask */
+#define USB_OTG_HCINTMSK_BBERRM_Pos             (8U)                           
+#define USB_OTG_HCINTMSK_BBERRM_Msk             (0x1UL << USB_OTG_HCINTMSK_BBERRM_Pos) /*!< 0x00000100 */
+#define USB_OTG_HCINTMSK_BBERRM                 USB_OTG_HCINTMSK_BBERRM_Msk    /*!< Babble error mask */
+#define USB_OTG_HCINTMSK_FRMORM_Pos             (9U)                           
+#define USB_OTG_HCINTMSK_FRMORM_Msk             (0x1UL << USB_OTG_HCINTMSK_FRMORM_Pos) /*!< 0x00000200 */
+#define USB_OTG_HCINTMSK_FRMORM                 USB_OTG_HCINTMSK_FRMORM_Msk    /*!< Frame overrun mask */
+#define USB_OTG_HCINTMSK_DTERRM_Pos             (10U)                          
+#define USB_OTG_HCINTMSK_DTERRM_Msk             (0x1UL << USB_OTG_HCINTMSK_DTERRM_Pos) /*!< 0x00000400 */
+#define USB_OTG_HCINTMSK_DTERRM                 USB_OTG_HCINTMSK_DTERRM_Msk    /*!< Data toggle error mask */
+
+/********************  Bit definition for USB_OTG_DIEPTSIZ register  ********************/
+
+#define USB_OTG_DIEPTSIZ_XFRSIZ_Pos             (0U)                           
+#define USB_OTG_DIEPTSIZ_XFRSIZ_Msk             (0x7FFFFUL << USB_OTG_DIEPTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
+#define USB_OTG_DIEPTSIZ_XFRSIZ                 USB_OTG_DIEPTSIZ_XFRSIZ_Msk    /*!< Transfer size */
+#define USB_OTG_DIEPTSIZ_PKTCNT_Pos             (19U)                          
+#define USB_OTG_DIEPTSIZ_PKTCNT_Msk             (0x3FFUL << USB_OTG_DIEPTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
+#define USB_OTG_DIEPTSIZ_PKTCNT                 USB_OTG_DIEPTSIZ_PKTCNT_Msk    /*!< Packet count */
+#define USB_OTG_DIEPTSIZ_MULCNT_Pos             (29U)                          
+#define USB_OTG_DIEPTSIZ_MULCNT_Msk             (0x3UL << USB_OTG_DIEPTSIZ_MULCNT_Pos) /*!< 0x60000000 */
+#define USB_OTG_DIEPTSIZ_MULCNT                 USB_OTG_DIEPTSIZ_MULCNT_Msk    /*!< Packet count */
+/********************  Bit definition for USB_OTG_HCTSIZ register  ********************/
+#define USB_OTG_HCTSIZ_XFRSIZ_Pos               (0U)                           
+#define USB_OTG_HCTSIZ_XFRSIZ_Msk               (0x7FFFFUL << USB_OTG_HCTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
+#define USB_OTG_HCTSIZ_XFRSIZ                   USB_OTG_HCTSIZ_XFRSIZ_Msk      /*!< Transfer size */
+#define USB_OTG_HCTSIZ_PKTCNT_Pos               (19U)                          
+#define USB_OTG_HCTSIZ_PKTCNT_Msk               (0x3FFUL << USB_OTG_HCTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
+#define USB_OTG_HCTSIZ_PKTCNT                   USB_OTG_HCTSIZ_PKTCNT_Msk      /*!< Packet count */
+#define USB_OTG_HCTSIZ_DOPING_Pos               (31U)                          
+#define USB_OTG_HCTSIZ_DOPING_Msk               (0x1UL << USB_OTG_HCTSIZ_DOPING_Pos) /*!< 0x80000000 */
+#define USB_OTG_HCTSIZ_DOPING                   USB_OTG_HCTSIZ_DOPING_Msk      /*!< Do PING */
+#define USB_OTG_HCTSIZ_DPID_Pos                 (29U)                          
+#define USB_OTG_HCTSIZ_DPID_Msk                 (0x3UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x60000000 */
+#define USB_OTG_HCTSIZ_DPID                     USB_OTG_HCTSIZ_DPID_Msk        /*!< Data PID */
+#define USB_OTG_HCTSIZ_DPID_0                   (0x1UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x20000000 */
+#define USB_OTG_HCTSIZ_DPID_1                   (0x2UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x40000000 */
+
+/********************  Bit definition for USB_OTG_DIEPDMA register  ********************/
+#define USB_OTG_DIEPDMA_DMAADDR_Pos             (0U)                           
+#define USB_OTG_DIEPDMA_DMAADDR_Msk             (0xFFFFFFFFUL << USB_OTG_DIEPDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */
+#define USB_OTG_DIEPDMA_DMAADDR                 USB_OTG_DIEPDMA_DMAADDR_Msk    /*!< DMA address */
+
+/********************  Bit definition for USB_OTG_HCDMA register  ********************/
+#define USB_OTG_HCDMA_DMAADDR_Pos               (0U)                           
+#define USB_OTG_HCDMA_DMAADDR_Msk               (0xFFFFFFFFUL << USB_OTG_HCDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */
+#define USB_OTG_HCDMA_DMAADDR                   USB_OTG_HCDMA_DMAADDR_Msk      /*!< DMA address */
+
+/********************  Bit definition for USB_OTG_DTXFSTS register  ********************/
+#define USB_OTG_DTXFSTS_INEPTFSAV_Pos           (0U)                           
+#define USB_OTG_DTXFSTS_INEPTFSAV_Msk           (0xFFFFUL << USB_OTG_DTXFSTS_INEPTFSAV_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DTXFSTS_INEPTFSAV                USB_OTG_DTXFSTS_INEPTFSAV_Msk /*!< IN endpoint TxFIFO space available */
+
+/********************  Bit definition for USB_OTG_DIEPTXF register  ********************/
+#define USB_OTG_DIEPTXF_INEPTXSA_Pos            (0U)                           
+#define USB_OTG_DIEPTXF_INEPTXSA_Msk            (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXSA_Pos) /*!< 0x0000FFFF */
+#define USB_OTG_DIEPTXF_INEPTXSA                USB_OTG_DIEPTXF_INEPTXSA_Msk   /*!< IN endpoint FIFOx transmit RAM start address */
+#define USB_OTG_DIEPTXF_INEPTXFD_Pos            (16U)                          
+#define USB_OTG_DIEPTXF_INEPTXFD_Msk            (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXFD_Pos) /*!< 0xFFFF0000 */
+#define USB_OTG_DIEPTXF_INEPTXFD                USB_OTG_DIEPTXF_INEPTXFD_Msk   /*!< IN endpoint TxFIFO depth */
+
+/********************  Bit definition for USB_OTG_DOEPCTL register  ********************/
+
+#define USB_OTG_DOEPCTL_MPSIZ_Pos               (0U)                           
+#define USB_OTG_DOEPCTL_MPSIZ_Msk               (0x7FFUL << USB_OTG_DOEPCTL_MPSIZ_Pos) /*!< 0x000007FF */
+#define USB_OTG_DOEPCTL_MPSIZ                    USB_OTG_DOEPCTL_MPSIZ_Msk     /*!< Maximum packet size */          /*!<Bit 1 */
+#define USB_OTG_DOEPCTL_USBAEP_Pos              (15U)                          
+#define USB_OTG_DOEPCTL_USBAEP_Msk              (0x1UL << USB_OTG_DOEPCTL_USBAEP_Pos) /*!< 0x00008000 */
+#define USB_OTG_DOEPCTL_USBAEP                  USB_OTG_DOEPCTL_USBAEP_Msk     /*!< USB active endpoint */
+#define USB_OTG_DOEPCTL_NAKSTS_Pos              (17U)                          
+#define USB_OTG_DOEPCTL_NAKSTS_Msk              (0x1UL << USB_OTG_DOEPCTL_NAKSTS_Pos) /*!< 0x00020000 */
+#define USB_OTG_DOEPCTL_NAKSTS                  USB_OTG_DOEPCTL_NAKSTS_Msk     /*!< NAK status */
+#define USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Pos      (28U)                          
+#define USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Msk      (0x1UL << USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Pos) /*!< 0x10000000 */
+#define USB_OTG_DOEPCTL_SD0PID_SEVNFRM          USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Msk /*!< Set DATA0 PID */
+#define USB_OTG_DOEPCTL_SODDFRM_Pos             (29U)                          
+#define USB_OTG_DOEPCTL_SODDFRM_Msk             (0x1UL << USB_OTG_DOEPCTL_SODDFRM_Pos) /*!< 0x20000000 */
+#define USB_OTG_DOEPCTL_SODDFRM                 USB_OTG_DOEPCTL_SODDFRM_Msk    /*!< Set odd frame */
+#define USB_OTG_DOEPCTL_EPTYP_Pos               (18U)                          
+#define USB_OTG_DOEPCTL_EPTYP_Msk               (0x3UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x000C0000 */
+#define USB_OTG_DOEPCTL_EPTYP                   USB_OTG_DOEPCTL_EPTYP_Msk      /*!< Endpoint type */
+#define USB_OTG_DOEPCTL_EPTYP_0                 (0x1UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x00040000 */
+#define USB_OTG_DOEPCTL_EPTYP_1                 (0x2UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x00080000 */
+#define USB_OTG_DOEPCTL_SNPM_Pos                (20U)                          
+#define USB_OTG_DOEPCTL_SNPM_Msk                (0x1UL << USB_OTG_DOEPCTL_SNPM_Pos) /*!< 0x00100000 */
+#define USB_OTG_DOEPCTL_SNPM                    USB_OTG_DOEPCTL_SNPM_Msk       /*!< Snoop mode */
+#define USB_OTG_DOEPCTL_STALL_Pos               (21U)                          
+#define USB_OTG_DOEPCTL_STALL_Msk               (0x1UL << USB_OTG_DOEPCTL_STALL_Pos) /*!< 0x00200000 */
+#define USB_OTG_DOEPCTL_STALL                   USB_OTG_DOEPCTL_STALL_Msk      /*!< STALL handshake */
+#define USB_OTG_DOEPCTL_CNAK_Pos                (26U)                          
+#define USB_OTG_DOEPCTL_CNAK_Msk                (0x1UL << USB_OTG_DOEPCTL_CNAK_Pos) /*!< 0x04000000 */
+#define USB_OTG_DOEPCTL_CNAK                    USB_OTG_DOEPCTL_CNAK_Msk       /*!< Clear NAK */
+#define USB_OTG_DOEPCTL_SNAK_Pos                (27U)                          
+#define USB_OTG_DOEPCTL_SNAK_Msk                (0x1UL << USB_OTG_DOEPCTL_SNAK_Pos) /*!< 0x08000000 */
+#define USB_OTG_DOEPCTL_SNAK                    USB_OTG_DOEPCTL_SNAK_Msk       /*!< Set NAK */
+#define USB_OTG_DOEPCTL_EPDIS_Pos               (30U)                          
+#define USB_OTG_DOEPCTL_EPDIS_Msk               (0x1UL << USB_OTG_DOEPCTL_EPDIS_Pos) /*!< 0x40000000 */
+#define USB_OTG_DOEPCTL_EPDIS                   USB_OTG_DOEPCTL_EPDIS_Msk      /*!< Endpoint disable */
+#define USB_OTG_DOEPCTL_EPENA_Pos               (31U)                          
+#define USB_OTG_DOEPCTL_EPENA_Msk               (0x1UL << USB_OTG_DOEPCTL_EPENA_Pos) /*!< 0x80000000 */
+#define USB_OTG_DOEPCTL_EPENA                   USB_OTG_DOEPCTL_EPENA_Msk      /*!< Endpoint enable */
+
+/********************  Bit definition for USB_OTG_DOEPINT register  ********************/
+#define USB_OTG_DOEPINT_XFRC_Pos                (0U)                           
+#define USB_OTG_DOEPINT_XFRC_Msk                (0x1UL << USB_OTG_DOEPINT_XFRC_Pos) /*!< 0x00000001 */
+#define USB_OTG_DOEPINT_XFRC                    USB_OTG_DOEPINT_XFRC_Msk       /*!< Transfer completed interrupt */
+#define USB_OTG_DOEPINT_EPDISD_Pos              (1U)                           
+#define USB_OTG_DOEPINT_EPDISD_Msk              (0x1UL << USB_OTG_DOEPINT_EPDISD_Pos) /*!< 0x00000002 */
+#define USB_OTG_DOEPINT_EPDISD                  USB_OTG_DOEPINT_EPDISD_Msk     /*!< Endpoint disabled interrupt */
+#define USB_OTG_DOEPINT_AHBERR_Pos               (2U)
+#define USB_OTG_DOEPINT_AHBERR_Msk               (0x1UL << USB_OTG_DOEPINT_AHBERR_Pos) /*!< 0x00000004 */
+#define USB_OTG_DOEPINT_AHBERR                   USB_OTG_DOEPINT_AHBERR_Msk   /*!< AHB Error (AHBErr) during an OUT transaction */
+#define USB_OTG_DOEPINT_STUP_Pos                (3U)                           
+#define USB_OTG_DOEPINT_STUP_Msk                (0x1UL << USB_OTG_DOEPINT_STUP_Pos) /*!< 0x00000008 */
+#define USB_OTG_DOEPINT_STUP                    USB_OTG_DOEPINT_STUP_Msk       /*!< SETUP phase done */
+#define USB_OTG_DOEPINT_OTEPDIS_Pos             (4U)                           
+#define USB_OTG_DOEPINT_OTEPDIS_Msk             (0x1UL << USB_OTG_DOEPINT_OTEPDIS_Pos) /*!< 0x00000010 */
+#define USB_OTG_DOEPINT_OTEPDIS                 USB_OTG_DOEPINT_OTEPDIS_Msk    /*!< OUT token received when endpoint disabled */
+#define USB_OTG_DOEPINT_OTEPSPR_Pos              (5U)                          
+#define USB_OTG_DOEPINT_OTEPSPR_Msk              (0x1UL << USB_OTG_DOEPINT_OTEPSPR_Pos) /*!< 0x00000020 */
+#define USB_OTG_DOEPINT_OTEPSPR                  USB_OTG_DOEPINT_OTEPSPR_Msk   /*!< Status Phase Received For Control Write */
+#define USB_OTG_DOEPINT_B2BSTUP_Pos             (6U)                           
+#define USB_OTG_DOEPINT_B2BSTUP_Msk             (0x1UL << USB_OTG_DOEPINT_B2BSTUP_Pos) /*!< 0x00000040 */
+#define USB_OTG_DOEPINT_B2BSTUP                 USB_OTG_DOEPINT_B2BSTUP_Msk    /*!< Back-to-back SETUP packets received */
+#define USB_OTG_DOEPINT_OUTPKTERR_Pos            (8U)
+#define USB_OTG_DOEPINT_OUTPKTERR_Msk            (0x1UL << USB_OTG_DOEPINT_OUTPKTERR_Pos) /*!< 0x00000100 */
+#define USB_OTG_DOEPINT_OUTPKTERR                USB_OTG_DOEPINT_OUTPKTERR_Msk   /*!< OUT packet error */
+#define USB_OTG_DOEPINT_NAK_Pos                  (13U)
+#define USB_OTG_DOEPINT_NAK_Msk                  (0x1UL << USB_OTG_DOEPINT_NAK_Pos) /*!< 0x00002000 */
+#define USB_OTG_DOEPINT_NAK                      USB_OTG_DOEPINT_NAK_Msk   /*!< NAK Packet is transmitted by the device */
+#define USB_OTG_DOEPINT_NYET_Pos                (14U)                          
+#define USB_OTG_DOEPINT_NYET_Msk                (0x1UL << USB_OTG_DOEPINT_NYET_Pos) /*!< 0x00004000 */
+#define USB_OTG_DOEPINT_NYET                    USB_OTG_DOEPINT_NYET_Msk       /*!< NYET interrupt */
+#define USB_OTG_DOEPINT_STPKTRX_Pos              (15U)
+#define USB_OTG_DOEPINT_STPKTRX_Msk              (0x1UL << USB_OTG_DOEPINT_STPKTRX_Pos) /*!< 0x00008000 */
+#define USB_OTG_DOEPINT_STPKTRX                  USB_OTG_DOEPINT_STPKTRX_Msk   /*!< Setup Packet Received */
+/********************  Bit definition for USB_OTG_DOEPTSIZ register  ********************/
+
+#define USB_OTG_DOEPTSIZ_XFRSIZ_Pos             (0U)                           
+#define USB_OTG_DOEPTSIZ_XFRSIZ_Msk             (0x7FFFFUL << USB_OTG_DOEPTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
+#define USB_OTG_DOEPTSIZ_XFRSIZ                 USB_OTG_DOEPTSIZ_XFRSIZ_Msk    /*!< Transfer size */
+#define USB_OTG_DOEPTSIZ_PKTCNT_Pos             (19U)                          
+#define USB_OTG_DOEPTSIZ_PKTCNT_Msk             (0x3FFUL << USB_OTG_DOEPTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
+#define USB_OTG_DOEPTSIZ_PKTCNT                 USB_OTG_DOEPTSIZ_PKTCNT_Msk    /*!< Packet count */
+
+#define USB_OTG_DOEPTSIZ_STUPCNT_Pos            (29U)                          
+#define USB_OTG_DOEPTSIZ_STUPCNT_Msk            (0x3UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x60000000 */
+#define USB_OTG_DOEPTSIZ_STUPCNT                USB_OTG_DOEPTSIZ_STUPCNT_Msk   /*!< SETUP packet count */
+#define USB_OTG_DOEPTSIZ_STUPCNT_0              (0x1UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x20000000 */
+#define USB_OTG_DOEPTSIZ_STUPCNT_1              (0x2UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x40000000 */
+
+/********************  Bit definition for PCGCCTL register  ********************/
+#define USB_OTG_PCGCCTL_STOPCLK_Pos             (0U)                           
+#define USB_OTG_PCGCCTL_STOPCLK_Msk             (0x1UL << USB_OTG_PCGCCTL_STOPCLK_Pos) /*!< 0x00000001 */
+#define USB_OTG_PCGCCTL_STOPCLK                 USB_OTG_PCGCCTL_STOPCLK_Msk    /*!< SETUP packet count */
+#define USB_OTG_PCGCCTL_GATECLK_Pos             (1U)                           
+#define USB_OTG_PCGCCTL_GATECLK_Msk             (0x1UL << USB_OTG_PCGCCTL_GATECLK_Pos) /*!< 0x00000002 */
+#define USB_OTG_PCGCCTL_GATECLK                 USB_OTG_PCGCCTL_GATECLK_Msk    /*!<Bit 0 */
+#define USB_OTG_PCGCCTL_PHYSUSP_Pos             (4U)                           
+#define USB_OTG_PCGCCTL_PHYSUSP_Msk             (0x1UL << USB_OTG_PCGCCTL_PHYSUSP_Pos) /*!< 0x00000010 */
+#define USB_OTG_PCGCCTL_PHYSUSP                 USB_OTG_PCGCCTL_PHYSUSP_Msk    /*!<Bit 1 */
+
+/* Legacy define */
+/********************  Bit definition for OTG register  ********************/
+#define USB_OTG_CHNUM_Pos                       (0U)                           
+#define USB_OTG_CHNUM_Msk                       (0xFUL << USB_OTG_CHNUM_Pos)    /*!< 0x0000000F */
+#define USB_OTG_CHNUM                           USB_OTG_CHNUM_Msk              /*!< Channel number */
+#define USB_OTG_CHNUM_0                         (0x1UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000001 */
+#define USB_OTG_CHNUM_1                         (0x2UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000002 */
+#define USB_OTG_CHNUM_2                         (0x4UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000004 */
+#define USB_OTG_CHNUM_3                         (0x8UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000008 */
+#define USB_OTG_BCNT_Pos                        (4U)                           
+#define USB_OTG_BCNT_Msk                        (0x7FFUL << USB_OTG_BCNT_Pos)   /*!< 0x00007FF0 */
+#define USB_OTG_BCNT                            USB_OTG_BCNT_Msk               /*!< Byte count */
+
+#define USB_OTG_DPID_Pos                        (15U)                          
+#define USB_OTG_DPID_Msk                        (0x3UL << USB_OTG_DPID_Pos)     /*!< 0x00018000 */
+#define USB_OTG_DPID                            USB_OTG_DPID_Msk               /*!< Data PID */
+#define USB_OTG_DPID_0                          (0x1UL << USB_OTG_DPID_Pos)     /*!< 0x00008000 */
+#define USB_OTG_DPID_1                          (0x2UL << USB_OTG_DPID_Pos)     /*!< 0x00010000 */
+
+#define USB_OTG_PKTSTS_Pos                      (17U)                          
+#define USB_OTG_PKTSTS_Msk                      (0xFUL << USB_OTG_PKTSTS_Pos)   /*!< 0x001E0000 */
+#define USB_OTG_PKTSTS                          USB_OTG_PKTSTS_Msk             /*!< Packet status */
+#define USB_OTG_PKTSTS_0                        (0x1UL << USB_OTG_PKTSTS_Pos)   /*!< 0x00020000 */
+#define USB_OTG_PKTSTS_1                        (0x2UL << USB_OTG_PKTSTS_Pos)   /*!< 0x00040000 */
+#define USB_OTG_PKTSTS_2                        (0x4UL << USB_OTG_PKTSTS_Pos)   /*!< 0x00080000 */
+#define USB_OTG_PKTSTS_3                        (0x8UL << USB_OTG_PKTSTS_Pos)   /*!< 0x00100000 */
+
+#define USB_OTG_EPNUM_Pos                       (0U)                           
+#define USB_OTG_EPNUM_Msk                       (0xFUL << USB_OTG_EPNUM_Pos)    /*!< 0x0000000F */
+#define USB_OTG_EPNUM                           USB_OTG_EPNUM_Msk              /*!< Endpoint number */
+#define USB_OTG_EPNUM_0                         (0x1UL << USB_OTG_EPNUM_Pos)    /*!< 0x00000001 */
+#define USB_OTG_EPNUM_1                         (0x2UL << USB_OTG_EPNUM_Pos)    /*!< 0x00000002 */
+#define USB_OTG_EPNUM_2                         (0x4UL << USB_OTG_EPNUM_Pos)    /*!< 0x00000004 */
+#define USB_OTG_EPNUM_3                         (0x8UL << USB_OTG_EPNUM_Pos)    /*!< 0x00000008 */
+
+#define USB_OTG_FRMNUM_Pos                      (21U)                          
+#define USB_OTG_FRMNUM_Msk                      (0xFUL << USB_OTG_FRMNUM_Pos)   /*!< 0x01E00000 */
+#define USB_OTG_FRMNUM                          USB_OTG_FRMNUM_Msk             /*!< Frame number */
+#define USB_OTG_FRMNUM_0                        (0x1UL << USB_OTG_FRMNUM_Pos)   /*!< 0x00200000 */
+#define USB_OTG_FRMNUM_1                        (0x2UL << USB_OTG_FRMNUM_Pos)   /*!< 0x00400000 */
+#define USB_OTG_FRMNUM_2                        (0x4UL << USB_OTG_FRMNUM_Pos)   /*!< 0x00800000 */
+#define USB_OTG_FRMNUM_3                        (0x8UL << USB_OTG_FRMNUM_Pos)   /*!< 0x01000000 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/sunxi/musb_def.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/sunxi/musb_def.h
new file mode 100644
index 00000000000..602b4f1136f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/sunxi/musb_def.h
@@ -0,0 +1,643 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Koji KITAYAMA
+ * Copyright (c) 2021 Tian Yunhao (t123yh)
+ * Copyright (c) 2021 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_MUSB_DEF
+#define _TUSB_MUSB_DEF
+
+
+#define  USBC_Readb(reg)	                    (*(volatile unsigned char *)(reg))
+#define  USBC_Readw(reg)	                    (*(volatile unsigned short *)(reg))
+#define  USBC_Readl(reg)	                    (*(volatile unsigned long *)(reg))
+
+#define  USBC_Writeb(value, reg)                (*(volatile unsigned char *)(reg) = (value))
+#define  USBC_Writew(value, reg)	            (*(volatile unsigned short *)(reg) = (value))
+#define  USBC_Writel(value, reg)	            (*(volatile unsigned long *)(reg) = (value))
+
+
+#define USBC_SetBit_Mask_b(reg,mask)	do {																		\
+																				unsigned char _r = USBC_Readb(reg);	\
+																			   _r  |=  (unsigned char)(mask);				\
+																				USBC_Writeb(_r,reg); 								\
+																		}while(0)
+#define USBC_SetBit_Mask_w(reg,mask)	do {																		\
+																				unsigned short _r = USBC_Readw(reg);	\
+																			   _r  |=  (unsigned short)(mask);				\
+																				USBC_Writew(_r,reg); 								\
+																		}while(0)
+#define USBC_SetBit_Mask_l(reg,mask)	do {																		\
+																				unsigned int _r = USBC_Readl(reg);	\
+																			   _r  |=  (unsigned int)(mask);				\
+																				USBC_Writel(_r,reg); 								\
+																		}while(0)
+
+
+#define USBC_ClrBit_Mask_b(reg,mask)	do {																		\
+																				unsigned char _r = USBC_Readb(reg);	\
+																			   _r  &=  (~(unsigned char)(mask));			\
+																				USBC_Writeb(_r,reg); 								\
+																		}while(0);
+#define USBC_ClrBit_Mask_w(reg,mask)	do {																		\
+																				unsigned short _r = USBC_Readw(reg);	\
+																			   _r  &=  (~(unsigned short)(mask));				\
+																				USBC_Writew(_r,reg); 								\
+																		}while(0)
+#define USBC_ClrBit_Mask_l(reg,mask)	do {																		\
+																				unsigned int _r = USBC_Readl(reg);	\
+																			   _r  &=  (~(unsigned int)(mask));				\
+																				USBC_Writel(_r,reg); 								\
+																		}while(0)
+#define  USBC_REG_test_bit_b(bp, reg)         	(USBC_Readb(reg) & (1 << (bp)))
+#define  USBC_REG_test_bit_w(bp, reg)   	    (USBC_Readw(reg) & (1 << (bp)))
+#define  USBC_REG_test_bit_l(bp, reg)   	    (USBC_Readl(reg) & (1 << (bp)))
+
+#define  USBC_REG_set_bit_b(bp, reg) 			(USBC_Writeb((USBC_Readb(reg) | (1 << (bp))) , (reg)))
+#define  USBC_REG_set_bit_w(bp, reg) 	 		(USBC_Writew((USBC_Readw(reg) | (1 << (bp))) , (reg)))
+#define  USBC_REG_set_bit_l(bp, reg) 	 		(USBC_Writel((USBC_Readl(reg) | (1 << (bp))) , (reg)))
+
+#define  USBC_REG_clear_bit_b(bp, reg)	 	 	(USBC_Writeb((USBC_Readb(reg) & (~ (1 << (bp)))) , (reg)))
+#define  USBC_REG_clear_bit_w(bp, reg)	 	 	(USBC_Writew((USBC_Readw(reg) & (~ (1 << (bp)))) , (reg)))
+#define  USBC_REG_clear_bit_l(bp, reg)	 	 	(USBC_Writel((USBC_Readl(reg) & (~ (1 << (bp)))) , (reg)))
+
+#define SW_UDC_EPNUMS 3
+
+#define SUNXI_SRAMC_BASE 0x01c00000
+//---------------------------------------------------------------
+//   reg base
+//---------------------------------------------------------------
+#define  USBC0_BASE                 0x01c13000
+#define  USBC1_BASE                 0x01c14000
+#define  USBC2_BASE                 0x01c1E000
+
+//Some reg whithin musb
+#define USBPHY_CLK_REG 		0x01c200CC
+#define USBPHY_CLK_RST_BIT 0
+#define USBPHY_CLK_GAT_BIT 1
+
+#define BUS_CLK_RST_REG	0x01c202c0 //Bus Clock Reset Register Bit24 : USB CLK RST
+#define BUS_RST_USB_BIT	24
+
+#define BUS_CLK_GATE0_REG	0x01c20060 //Bus Clock Gating Register Bit24 : USB CLK GATE 0: Mask 1 : Pass
+#define BUS_CLK_USB_BIT	24
+
+//#define USB_INTR
+
+#define NDMA_CFG_REG
+//-----------------------------------------------------------------------
+//   musb reg offset
+//-----------------------------------------------------------------------
+
+#define  USBC_REG_o_FADDR		    0x0098
+#define  USBC_REG_o_PCTL		    0x0040
+#define  USBC_REG_o_INTTx		    0x0044
+#define  USBC_REG_o_INTRx		    0x0046
+#define  USBC_REG_o_INTTxE		    0x0048
+#define  USBC_REG_o_INTRxE		    0x004A
+#define  USBC_REG_o_INTUSB		    0x004C
+#define  USBC_REG_o_INTUSBE         0x0050
+#define  USBC_REG_o_FRNUM		    0x0054
+#define  USBC_REG_o_EPIND		    0x0042
+#define  USBC_REG_o_TMCTL		    0x007C
+
+#define  USBC_REG_o_TXMAXP		    0x0080
+#define  USBC_REG_o_CSR0		    0x0082
+#define  USBC_REG_o_TXCSR		    0x0082
+#define  USBC_REG_o_RXMAXP		    0x0084
+#define  USBC_REG_o_RXCSR		    0x0086
+#define  USBC_REG_o_COUNT0		    0x0088
+#define  USBC_REG_o_RXCOUNT		    0x0088
+#define  USBC_REG_o_EP0TYPE		    0x008C
+#define  USBC_REG_o_TXTYPE		    0x008C
+#define  USBC_REG_o_NAKLIMIT0	    0x008D
+#define  USBC_REG_o_TXINTERVAL      0x008D
+#define  USBC_REG_o_RXTYPE		    0x008E
+#define  USBC_REG_o_RXINTERVAL	    0x008F
+
+//#define  USBC_REG_o_CONFIGDATA	0x001F   //
+
+#define  USBC_REG_o_EPFIFO0		    0x0000
+#define  USBC_REG_o_EPFIFO1		    0x0004
+#define  USBC_REG_o_EPFIFO2		    0x0008
+#define  USBC_REG_o_EPFIFO3		    0x000C
+#define  USBC_REG_o_EPFIFO4		    0x0010
+#define  USBC_REG_o_EPFIFO5		    0x0014
+#define  USBC_REG_o_EPFIFOx(n)	    (0x0000 + (n<<2))
+
+#define  USBC_REG_o_DEVCTL		    0x0041
+
+#define  USBC_REG_o_TXFIFOSZ	    0x0090
+#define  USBC_REG_o_RXFIFOSZ	    0x0094
+#define  USBC_REG_o_TXFIFOAD	    0x0092
+#define  USBC_REG_o_RXFIFOAD	    0x0096
+
+#define  USBC_REG_o_VEND0		    0x0043
+#define  USBC_REG_o_VEND1		    0x007D
+#define  USBC_REG_o_VEND3		    0x007E
+
+//#define  USBC_REG_o_PHYCTL		0x006C
+#define  USBC_REG_o_EPINFO		    0x0078
+#define  USBC_REG_o_RAMINFO		    0x0079
+#define  USBC_REG_o_LINKINFO	    0x007A
+#define  USBC_REG_o_VPLEN		    0x007B
+#define  USBC_REG_o_HSEOF		    0x007C
+#define  USBC_REG_o_FSEOF		    0x007D
+#define  USBC_REG_o_LSEOF		    0x007E
+
+//new
+#define  USBC_REG_o_FADDR0          0x0098
+#define  USBC_REG_o_HADDR0          0x009A
+#define  USBC_REG_o_HPORT0          0x009B
+#define  USBC_REG_o_TXFADDRx 		0x0098
+#define  USBC_REG_o_TXHADDRx		0x009A
+#define  USBC_REG_o_TXHPORTx		0x009B
+#define  USBC_REG_o_RXFADDRx		0x009C
+#define  USBC_REG_o_RXHADDRx		0x009E
+#define  USBC_REG_o_RXHPORTx		0x009F
+
+
+#define  USBC_REG_o_RPCOUNT			0x008A
+
+//new
+#define  USBC_REG_o_ISCR            0x0400
+#define  USBC_REG_o_PHYCTL          0x0404
+#define  USBC_REG_o_PHYBIST         0x0408
+#define  USBC_REG_o_PHYTUNE         0x040c
+
+#define  USBC_REG_o_CSR			0x0410
+
+#define USBC_REG_o_PMU_IRQ	 0x0800
+
+//-----------------------------------------------------------------------
+//   registers
+//-----------------------------------------------------------------------
+
+#define  USBC_REG_FADDR(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_FADDR		)
+#define  USBC_REG_PCTL(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_PCTL			)
+#define  USBC_REG_INTTx(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_INTTx		)
+#define  USBC_REG_INTRx(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_INTRx		)
+#define  USBC_REG_INTTxE(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_INTTxE     	)
+#define  USBC_REG_INTRxE(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_INTRxE     	)
+#define  USBC_REG_INTUSB(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_INTUSB     	)
+#define  USBC_REG_INTUSBE(usbc_base_addr)           ((usbc_base_addr) + USBC_REG_o_INTUSBE    	)
+#define  USBC_REG_FRNUM(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_FRNUM      	)
+#define  USBC_REG_EPIND(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_EPIND      	)
+#define  USBC_REG_TMCTL(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_TMCTL      	)
+#define  USBC_REG_TXMAXP(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_TXMAXP     	)
+
+#define  USBC_REG_CSR0(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_CSR0       	)
+#define  USBC_REG_TXCSR(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_TXCSR      	)
+
+#define  USBC_REG_RXMAXP(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_RXMAXP     	)
+#define  USBC_REG_RXCSR(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_RXCSR      	)
+
+#define  USBC_REG_COUNT0(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_COUNT0     	)
+#define  USBC_REG_RXCOUNT(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_RXCOUNT    	)
+
+#define  USBC_REG_EP0TYPE(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EP0TYPE		)
+#define  USBC_REG_TXTYPE(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_TXTYPE     	)
+
+#define  USBC_REG_NAKLIMIT0(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_NAKLIMIT0  	)
+#define  USBC_REG_TXINTERVAL(usbc_base_addr)        ((usbc_base_addr) + USBC_REG_o_TXINTERVAL	)
+
+#define  USBC_REG_RXTYPE(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_RXTYPE		)
+#define  USBC_REG_RXINTERVAL(usbc_base_addr)	    ((usbc_base_addr) + USBC_REG_o_RXINTERVAL	)
+//#define  USBC_REG_CONFIGDATA(usbc_base_addr)	    ((usbc_base_addr) + USBC_REG_o_CONFIGDATA	)
+#define  USBC_REG_EPFIFO0(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO0		)
+#define  USBC_REG_EPFIFO1(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO1		)
+#define  USBC_REG_EPFIFO2(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO2		)
+#define  USBC_REG_EPFIFO3(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO3		)
+#define  USBC_REG_EPFIFO4(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO4		)
+#define  USBC_REG_EPFIFO5(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPFIFO5		)
+#define  USBC_REG_EPFIFOx(usbc_base_addr, n)	    ((usbc_base_addr) + USBC_REG_o_EPFIFOx(n)	)
+#define  USBC_REG_DEVCTL(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_DEVCTL		)
+#define  USBC_REG_TXFIFOSZ(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_TXFIFOSZ		)
+#define  USBC_REG_RXFIFOSZ(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_RXFIFOSZ		)
+#define  USBC_REG_TXFIFOAD(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_TXFIFOAD		)
+#define  USBC_REG_RXFIFOAD(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_RXFIFOAD		)
+#define  USBC_REG_VEND0(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_VEND0		)
+#define  USBC_REG_VEND1(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_VEND1		)
+#define  USBC_REG_EPINFO(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_EPINFO		)
+#define  USBC_REG_RAMINFO(usbc_base_addr)		    ((usbc_base_addr) + USBC_REG_o_RAMINFO		)
+#define  USBC_REG_LINKINFO(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_LINKINFO		)
+#define  USBC_REG_VPLEN(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_VPLEN		)
+#define  USBC_REG_HSEOF(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_HSEOF		)
+#define  USBC_REG_FSEOF(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_FSEOF		)
+#define  USBC_REG_LSEOF(usbc_base_addr)		        ((usbc_base_addr) + USBC_REG_o_LSEOF		)
+
+#define  USBC_REG_FADDR0(usbc_base_addr)            ((usbc_base_addr) + USBC_REG_o_FADDR0		)
+#define  USBC_REG_HADDR0(usbc_base_addr)            ((usbc_base_addr) + USBC_REG_o_HADDR0		)
+#define  USBC_REG_HPORT0(usbc_base_addr)            ((usbc_base_addr) + USBC_REG_o_HPORT0		)
+
+#define  USBC_REG_TXFADDRx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_TXFADDRx		)
+#define  USBC_REG_TXHADDRx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_TXHADDRx		)
+#define  USBC_REG_TXHPORTx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_TXHPORTx		)
+#define  USBC_REG_RXFADDRx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_RXFADDRx		)
+#define  USBC_REG_RXHADDRx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_RXHADDRx		)
+#define  USBC_REG_RXHPORTx(usbc_base_addr, n)		((usbc_base_addr) + USBC_REG_o_RXHPORTx		)
+
+#define  USBC_REG_RPCOUNTx(usbc_base_addr, n)	    ((usbc_base_addr) + USBC_REG_o_RPCOUNT		)
+
+#define  USBC_REG_ISCR(usbc_base_addr)	    	    ((usbc_base_addr) + USBC_REG_o_ISCR			)
+#define  USBC_REG_PHYCTL(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_PHYCTL		)
+#define  USBC_REG_PHYBIST(usbc_base_addr)	        ((usbc_base_addr) + USBC_REG_o_PHYBIST		)
+#define  USBC_REG_PHYTUNE(usbc_base_addr)           ((usbc_base_addr) + USBC_REG_o_PHYTUNE		)
+#define  USBC_REG_PMU_IRQ(usbc_base_addr)           ((usbc_base_addr) + USBC_REG_o_PMU_IRQ		)
+#define  USBC_REG_CSR(usbc_base_addr)           ((usbc_base_addr) + USBC_REG_o_CSR)
+//-----------------------------------------------------------------------
+//   bit position
+//-----------------------------------------------------------------------
+
+/* USB Power Control for Host only  */
+#define  USBC_BP_POWER_H_HIGH_SPEED_EN			5
+#define  USBC_BP_POWER_H_HIGH_SPEED_FLAG		4
+#define  USBC_BP_POWER_H_RESET					3
+#define  USBC_BP_POWER_H_RESUME					2
+#define  USBC_BP_POWER_H_SUSPEND				1
+#define  USBC_BP_POWER_H_SUEPEND_EN				0
+
+/* USB Power Control for device only  */
+#define  USBC_BP_POWER_D_ISO_UPDATE_EN			7
+#define  USBC_BP_POWER_D_SOFT_CONNECT			6
+#define  USBC_BP_POWER_D_HIGH_SPEED_EN			5
+#define  USBC_BP_POWER_D_HIGH_SPEED_FLAG		4
+#define  USBC_BP_POWER_D_RESET_FLAG				3
+#define  USBC_BP_POWER_D_RESUME					2
+#define  USBC_BP_POWER_D_SUSPEND				1
+#define  USBC_BP_POWER_D_ENABLE_SUSPENDM		0
+
+/* interrupt flags for ep0 and the Tx ep1~4 */
+#define  USBC_BP_INTTx_FLAG_EP5				    5
+#define  USBC_BP_INTTx_FLAG_EP4				    4
+#define  USBC_BP_INTTx_FLAG_EP3				    3
+#define  USBC_BP_INTTx_FLAG_EP2		    		2
+#define  USBC_BP_INTTx_FLAG_EP1  				1
+#define  USBC_BP_INTTx_FLAG_EP0					0
+
+/* interrupt flags for Rx ep1~4 */
+#define  USBC_BP_INTRx_FLAG_EP5				    5
+#define  USBC_BP_INTRx_FLAG_EP4				    4
+#define  USBC_BP_INTRx_FLAG_EP3				    3
+#define  USBC_BP_INTRx_FLAG_EP2				    2
+#define  USBC_BP_INTRx_FLAG_EP1				    1
+
+/* interrupt enable for Tx ep0~4 */
+#define  USBC_BP_INTTxE_EN_EP5				    5
+#define  USBC_BP_INTTxE_EN_EP4				    4
+#define  USBC_BP_INTTxE_EN_EP3				    3
+#define  USBC_BP_INTTxE_EN_EP2				    2
+#define  USBC_BP_INTTxE_EN_EP1				    1
+#define  USBC_BP_INTTxE_EN_EP0					0
+
+/* interrupt enable for Rx ep1~4 */
+#define  USBC_BP_INTRxE_EN_EP5				    5
+#define  USBC_BP_INTRxE_EN_EP4				    4
+#define  USBC_BP_INTRxE_EN_EP3				    3
+#define  USBC_BP_INTRxE_EN_EP2			    	2
+#define  USBC_BP_INTRxE_EN_EP1  		    	1
+
+/* USB interrupt */
+#define  USBC_BP_INTUSB_VBUS_ERROR				7
+#define  USBC_BP_INTUSB_SESSION_REQ				6
+#define  USBC_BP_INTUSB_DISCONNECT				5
+#define  USBC_BP_INTUSB_CONNECT					4
+#define  USBC_BP_INTUSB_SOF						3
+#define  USBC_BP_INTUSB_RESET					2
+#define  USBC_BP_INTUSB_RESUME					1
+#define  USBC_BP_INTUSB_SUSPEND					0
+
+/* USB interrupt enable */
+#define  USBC_BP_INTUSBE_EN_VBUS_ERROR			7
+#define  USBC_BP_INTUSBE_EN_SESSION_REQ			6
+#define  USBC_BP_INTUSBE_EN_DISCONNECT			5
+#define  USBC_BP_INTUSBE_EN_CONNECT				4
+#define  USBC_BP_INTUSBE_EN_SOF					3
+#define  USBC_BP_INTUSBE_EN_RESET				2
+#define  USBC_BP_INTUSBE_EN_RESUME				1
+#define  USBC_BP_INTUSBE_EN_SUSPEND				0
+
+/* Test Mode Control */
+#define  USBC_BP_TMCTL_FORCE_HOST               7
+#define  USBC_BP_TMCTL_FIFO_ACCESS              6
+#define  USBC_BP_TMCTL_FORCE_FS                 5
+#define  USBC_BP_TMCTL_FORCE_HS                 4
+#define  USBC_BP_TMCTL_TEST_PACKET              3
+#define  USBC_BP_TMCTL_TEST_K                   2
+#define  USBC_BP_TMCTL_TEST_J                   1
+#define  USBC_BP_TMCTL_TEST_SE0_NAK             0
+
+/* Tx Max packet */
+#define  USBC_BP_TXMAXP_PACKET_COUNT            11
+#define  USBC_BP_TXMAXP_MAXIMUM_PAYLOAD         0
+
+/* Control and Status Register for ep0 for Host only */
+#define  USBC_BP_CSR0_H_DisPing 				11
+#define  USBC_BP_CSR0_H_FlushFIFO				8
+#define  USBC_BP_CSR0_H_NAK_Timeout				7
+#define  USBC_BP_CSR0_H_StatusPkt				6
+#define  USBC_BP_CSR0_H_ReqPkt					5
+#define  USBC_BP_CSR0_H_Error					4
+#define  USBC_BP_CSR0_H_SetupPkt				3
+#define  USBC_BP_CSR0_H_RxStall					2
+#define  USBC_BP_CSR0_H_TxPkRdy					1
+#define  USBC_BP_CSR0_H_RxPkRdy					0
+
+/* Control and Status Register for ep0 for device only */
+#define  USBC_BP_CSR0_D_FLUSH_FIFO				8
+#define  USBC_BP_CSR0_D_SERVICED_SETUP_END		7
+#define  USBC_BP_CSR0_D_SERVICED_RX_PKT_READY   6
+#define  USBC_BP_CSR0_D_SEND_STALL				5
+#define  USBC_BP_CSR0_D_SETUP_END				4
+#define  USBC_BP_CSR0_D_DATA_END				3
+#define  USBC_BP_CSR0_D_SENT_STALL				2
+#define  USBC_BP_CSR0_D_TX_PKT_READY			1
+#define  USBC_BP_CSR0_D_RX_PKT_READY			0
+
+/* Tx ep Control and Status Register for Host only */
+#define  USBC_BP_TXCSR_H_AUTOSET				15
+#define  USBC_BP_TXCSR_H_RESERVED				14
+#define  USBC_BP_TXCSR_H_MODE				    13
+#define  USBC_BP_TXCSR_H_DMA_REQ_EN			 	12
+#define  USBC_BP_TXCSR_H_FORCE_DATA_TOGGLE		11
+#define  USBC_BP_TXCSR_H_DMA_REQ_MODE			10
+#define  USBC_BP_TXCSR_H_NAK_TIMEOUT			7
+#define  USBC_BP_TXCSR_H_CLEAR_DATA_TOGGLE		6
+#define  USBC_BP_TXCSR_H_TX_STALL				5
+#define  USBC_BP_TXCSR_H_FLUSH_FIFO				3
+#define  USBC_BP_TXCSR_H_ERROR					2
+#define  USBC_BP_TXCSR_H_FIFO_NOT_EMPTY 		1
+#define  USBC_BP_TXCSR_H_TX_READY				0
+
+/* Tx ep Control and Status Register for Device only */
+#define  USBC_BP_TXCSR_D_AUTOSET				15
+#define  USBC_BP_TXCSR_D_ISO					14
+#define  USBC_BP_TXCSR_D_MODE					13
+#define  USBC_BP_TXCSR_D_DMA_REQ_EN				12
+#define  USBC_BP_TXCSR_D_FORCE_DATA_TOGGLE		11
+#define  USBC_BP_TXCSR_D_DMA_REQ_MODE			10
+#define  USBC_BP_TXCSR_D_INCOMPLETE				7
+#define  USBC_BP_TXCSR_D_CLEAR_DATA_TOGGLE		6
+#define  USBC_BP_TXCSR_D_SENT_STALL				5
+#define  USBC_BP_TXCSR_D_SEND_STALL				4
+#define  USBC_BP_TXCSR_D_FLUSH_FIFO				3
+#define  USBC_BP_TXCSR_D_UNDER_RUN				2
+#define  USBC_BP_TXCSR_D_FIFO_NOT_EMPTY 		1
+#define  USBC_BP_TXCSR_D_TX_READY				0
+
+/* Rx Max Packet */
+#define  USBC_BP_RXMAXP_PACKET_COUNT            11
+#define  USBC_BP_RXMAXP_MAXIMUM_PAYLOAD         0
+
+/* Rx ep Control and Status Register for Host only */
+#define  USBC_BP_RXCSR_H_AUTO_CLEAR			    15
+#define  USBC_BP_RXCSR_H_AUTO_REQ			    14
+#define  USBC_BP_RXCSR_H_DMA_REQ_EN			    13
+#define  USBC_BP_RXCSR_H_PID_ERROR			    12
+#define  USBC_BP_RXCSR_H_DMA_REQ_MODE		    11
+
+#define  USBC_BP_RXCSR_H_INCOMPLETE			    8
+#define  USBC_BP_RXCSR_H_CLEAR_DATA_TOGGLE	    7
+#define  USBC_BP_RXCSR_H_RX_STALL			    6
+#define  USBC_BP_RXCSR_H_REQ_PACKET			    5
+#define  USBC_BP_RXCSR_H_FLUSH_FIFO			    4
+#define  USBC_BP_RXCSR_H_NAK_TIMEOUT		    3
+#define  USBC_BP_RXCSR_H_ERROR				    2
+#define  USBC_BP_RXCSR_H_FIFO_FULL			    1
+#define  USBC_BP_RXCSR_H_RX_PKT_READY		    0
+
+/* Rx ep Control and Status Register for Device only */
+#define  USBC_BP_RXCSR_D_AUTO_CLEAR			    15
+#define  USBC_BP_RXCSR_D_ISO				    14
+#define  USBC_BP_RXCSR_D_DMA_REQ_EN			    13
+#define  USBC_BP_RXCSR_D_DISABLE_NYET		    12
+#define  USBC_BP_RXCSR_D_DMA_REQ_MODE		    11
+
+#define  USBC_BP_RXCSR_D_INCOMPLETE			    8
+#define  USBC_BP_RXCSR_D_CLEAR_DATA_TOGGLE	    7
+#define  USBC_BP_RXCSR_D_SENT_STALL			    6
+#define  USBC_BP_RXCSR_D_SEND_STALL			    5
+#define  USBC_BP_RXCSR_D_FLUSH_FIFO			    4
+#define  USBC_BP_RXCSR_D_DATA_ERROR			    3
+#define  USBC_BP_RXCSR_D_OVERRUN			    2
+#define  USBC_BP_RXCSR_D_FIFO_FULL			    1
+#define  USBC_BP_RXCSR_D_RX_PKT_READY		    0
+
+/* Tx Type Register for host only */
+#define  USBC_BP_TXTYPE_SPEED	                6              //new
+#define  USBC_BP_TXTYPE_PROROCOL	            4
+#define  USBC_BP_TXTYPE_TARGET_EP_NUM           0
+
+/* Rx Type Register for host only */
+#define  USBC_BP_RXTYPE_SPEED		            6              //new
+#define  USBC_BP_RXTYPE_PROROCOL	            4
+#define  USBC_BP_RXTYPE_TARGET_EP_NUM           0
+
+/* Core Configueation */
+#define  USBC_BP_CONFIGDATA_MPRXE               7
+#define  USBC_BP_CONFIGDATA_MPTXE               6
+#define  USBC_BP_CONFIGDATA_BIGENDIAN		    5
+#define  USBC_BP_CONFIGDATA_HBRXE			    4
+#define  USBC_BP_CONFIGDATA_HBTXE			    3
+#define  USBC_BP_CONFIGDATA_DYNFIFO_SIZING	    2
+#define  USBC_BP_CONFIGDATA_SOFTCONE		    1
+#define  USBC_BP_CONFIGDATA_UTMI_DATAWIDTH	    0
+
+/* OTG Device Control */
+#define  USBC_BP_DEVCTL_B_DEVICE			    7
+#define  USBC_BP_DEVCTL_FS_DEV				    6
+#define  USBC_BP_DEVCTL_LS_DEV				    5
+
+#define  USBC_BP_DEVCTL_VBUS				    3
+#define  USBC_BP_DEVCTL_HOST_MODE			    2
+#define  USBC_BP_DEVCTL_HOST_REQ			    1
+#define  USBC_BP_DEVCTL_SESSION				    0
+
+/* Tx EP FIFO size control */
+#define  USBC_BP_TXFIFOSZ_DPB				    4
+#define  USBC_BP_TXFIFOSZ_SZ				    0
+
+/* Rx EP FIFO size control */
+#define  USBC_BP_RXFIFOSZ_DPB				    4
+#define  USBC_BP_RXFIFOSZ_SZ				    0
+
+/* vendor0 */
+#define  USBC_BP_VEND0_DRQ_SEL				    1
+#define  USBC_BP_VEND0_BUS_SEL				    0
+
+/* hub address */
+#define  USBC_BP_HADDR_MULTI_TT					7
+
+/* Interface Status and Control */
+#define  USBC_BP_ISCR_VBUS_VALID_FROM_DATA		30
+#define  USBC_BP_ISCR_VBUS_VALID_FROM_VBUS		29
+#define  USBC_BP_ISCR_EXT_ID_STATUS				28
+#define  USBC_BP_ISCR_EXT_DM_STATUS				27
+#define  USBC_BP_ISCR_EXT_DP_STATUS				26
+#define  USBC_BP_ISCR_MERGED_VBUS_STATUS		25
+#define  USBC_BP_ISCR_MERGED_ID_STATUS			24
+
+#define  USBC_BP_ISCR_ID_PULLUP_EN				17
+#define  USBC_BP_ISCR_DPDM_PULLUP_EN			16
+#define  USBC_BP_ISCR_FORCE_ID					14
+#define  USBC_BP_ISCR_FORCE_VBUS_VALID			12
+#define  USBC_BP_ISCR_VBUS_VALID_SRC			10
+
+#define  USBC_BP_ISCR_HOSC_EN                 	7
+#define  USBC_BP_ISCR_VBUS_CHANGE_DETECT      	6
+#define  USBC_BP_ISCR_ID_CHANGE_DETECT        	5
+#define  USBC_BP_ISCR_DPDM_CHANGE_DETECT      	4
+#define  USBC_BP_ISCR_IRQ_ENABLE              	3
+#define  USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN   	2
+#define  USBC_BP_ISCR_ID_CHANGE_DETECT_EN     	1
+#define  USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN   	0
+
+
+#define SUNXI_EHCI_AHB_ICHR8_EN		(1 << 10)
+#define SUNXI_EHCI_AHB_INCR4_BURST_EN	(1 << 9)
+#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN	(1 << 8)
+#define SUNXI_EHCI_ULPI_BYPASS_EN	(1 << 0)
+//-----------------------------------------------------------------------
+//   �Զ���
+//-----------------------------------------------------------------------
+
+/* usb��Դ���� */
+#define  USBC_MAX_CTL_NUM                   1
+#define  USBC_MAX_EP_NUM                    3   //ep0~2, ep�ĸ���
+#define  USBC_MAX_FIFO_SIZE                 (2 * 1024)
+
+/* usb OTG mode */
+#define  USBC_OTG_HOST                      0
+#define  USBC_OTG_DEVICE                    1
+
+/* usb device type */
+#define  USBC_DEVICE_HSDEV                  0
+#define  USBC_DEVICE_FSDEV                  1
+#define  USBC_DEVICE_LSDEV                  2
+
+/*  usb transfer type  */
+#define  USBC_TS_TYPE_IDLE                  0
+#define  USBC_TS_TYPE_CTRL                  1
+#define  USBC_TS_TYPE_ISO                   2
+#define  USBC_TS_TYPE_INT                   3
+#define  USBC_TS_TYPE_BULK                  4
+
+/*  usb transfer mode  */
+#define  USBC_TS_MODE_UNKOWN                0
+#define  USBC_TS_MODE_LS                    1
+#define  USBC_TS_MODE_FS                    2
+#define  USBC_TS_MODE_HS                    3
+
+/* usb Vbus status */
+#define  USBC_VBUS_STATUS_BELOW_SESSIONEND                 0
+#define  USBC_VBUS_STATUS_ABOVE_SESSIONEND_BELOW_AVALID    1
+#define  USBC_VBUS_STATUS_ABOVE_AVALID_BELOW_VBUSVALID     2
+#define  USBC_VBUS_STATUS_ABOVE_VBUSVALID                  3
+
+/* usb io type */
+#define  USBC_IO_TYPE_PIO    		        0
+#define  USBC_IO_TYPE_DMA    		        1
+
+/* usb ep type */
+#define  USBC_EP_TYPE_IDLE    		        0
+#define  USBC_EP_TYPE_EP0    		        1
+#define  USBC_EP_TYPE_TX     		        2
+#define  USBC_EP_TYPE_RX     		        3
+
+/* usb id type */
+#define  USBC_ID_TYPE_DISABLE      	        0
+#define  USBC_ID_TYPE_HOST         	        1
+#define  USBC_ID_TYPE_DEVICE       	        2
+
+/* usb vbus valid type */
+#define  USBC_VBUS_TYPE_DISABLE    	        0
+#define  USBC_VBUS_TYPE_LOW       	        1
+#define  USBC_VBUS_TYPE_HIGH       	        2
+
+/* usb a valid source */
+#define  USBC_A_VALID_SOURCE_UTMI_AVALID	0
+#define  USBC_A_VALID_SOURCE_UTMI_VBUS    	1
+
+/* usb device switch */
+#define  USBC_DEVICE_SWITCH_OFF             0
+#define  USBC_DEVICE_SWITCH_ON              1
+
+/* usb fifo config mode */
+#define  USBC_FIFO_MODE_4K                  0
+#define  USBC_FIFO_MODE_8K                  1
+
+/*
+ **************************************************
+ *  usb interrupt mask
+ *
+ **************************************************
+ */
+
+/* interrupt flags for ep0 and the Tx ep1~4 */
+#define  USBC_INTTx_FLAG_EP5				    (1 << USBC_BP_INTTx_FLAG_EP5)
+#define  USBC_INTTx_FLAG_EP4				    (1 << USBC_BP_INTTx_FLAG_EP4)
+#define  USBC_INTTx_FLAG_EP3				    (1 << USBC_BP_INTTx_FLAG_EP3)
+#define  USBC_INTTx_FLAG_EP2		    		(1 << USBC_BP_INTTx_FLAG_EP2)
+#define  USBC_INTTx_FLAG_EP1  				    (1 << USBC_BP_INTTx_FLAG_EP1)
+#define  USBC_INTTx_FLAG_EP0					(1 << USBC_BP_INTTx_FLAG_EP0)
+
+/* interrupt flags for Rx ep1~4 */
+#define  USBC_INTRx_FLAG_EP5				    (1 << USBC_BP_INTRx_FLAG_EP5)
+#define  USBC_INTRx_FLAG_EP4				    (1 << USBC_BP_INTRx_FLAG_EP4)
+#define  USBC_INTRx_FLAG_EP3				    (1 << USBC_BP_INTRx_FLAG_EP3)
+#define  USBC_INTRx_FLAG_EP2				    (1 << USBC_BP_INTRx_FLAG_EP2)
+#define  USBC_INTRx_FLAG_EP1				    (1 << USBC_BP_INTRx_FLAG_EP1)
+
+/* USB interrupt */
+#define  USBC_INTUSB_VBUS_ERROR				    (1 << USBC_BP_INTUSB_VBUS_ERROR)
+#define  USBC_INTUSB_SESSION_REQ				(1 << USBC_BP_INTUSB_SESSION_REQ)
+#define  USBC_INTUSB_DISCONNECT				    (1 << USBC_BP_INTUSB_DISCONNECT)
+#define  USBC_INTUSB_CONNECT					(1 << USBC_BP_INTUSB_CONNECT)
+#define  USBC_INTUSB_SOF						(1 << USBC_BP_INTUSB_SOF)
+#define  USBC_INTUSB_RESET					    (1 << USBC_BP_INTUSB_RESET)
+#define  USBC_INTUSB_RESUME					    (1 << USBC_BP_INTUSB_RESUME)
+#define  USBC_INTUSB_SUSPEND					(1 << USBC_BP_INTUSB_SUSPEND)
+
+#define USB_CSRL0_NAKTO         0x00000080  // NAK Timeout
+#define USB_CSRL0_SETENDC       0x00000080  // Setup End Clear
+#define USB_CSRL0_STATUS        0x00000040  // STATUS Packet
+#define USB_CSRL0_RXRDYC        0x00000040  // RXRDY Clear
+#define USB_CSRL0_REQPKT        0x00000020  // Request Packet
+#define USB_CSRL0_STALL         0x00000020  // Send Stall
+#define USB_CSRL0_SETEND        0x00000010  // Setup End
+#define USB_CSRL0_ERROR         0x00000010  // Error
+#define USB_CSRL0_DATAEND       0x00000008  // Data End
+#define USB_CSRL0_SETUP         0x00000008  // Setup Packet
+#define USB_CSRL0_STALLED       0x00000004  // Endpoint Stalled
+#define USB_CSRL0_TXRDY         0x00000002  // Transmit Packet Ready
+#define USB_CSRL0_RXRDY         0x00000001  // Receive Packet Ready
+
+#define USB_RXFIFOSZ_DPB        0x00000010  // Double Packet Buffer Support
+#define USB_RXFIFOSZ_SIZE_M     0x0000000F  // Max Packet Size
+
+#define USB_TXFIFOSZ_DPB        0x00000010  // Double Packet Buffer Support
+#define USB_TXFIFOSZ_SIZE_M     0x0000000F  // Max Packet Size
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_bcm.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_bcm.h
new file mode 100644
index 00000000000..14194e7548f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_bcm.h
@@ -0,0 +1,88 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_DWC2_BCM_H_
+#define _TUSB_DWC2_BCM_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "broadcom/defines.h"
+#include "broadcom/interrupts.h"
+#include "broadcom/caches.h"
+
+#define DWC2_REG_BASE       USB_OTG_GLOBAL_BASE
+#define DWC2_EP_MAX         8
+#define DWC2_EP_FIFO_SIZE   4096
+
+#define dcache_clean(_addr, _size)              data_clean(_addr, _size)
+#define dcache_invalidate(_addr, _size)         data_invalidate(_addr, _size)
+#define dcache_clean_invalidate(_addr, _size)   data_clean_and_invalidate(_addr, _size)
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_enable(uint8_t rhport)
+{
+  (void) rhport;
+  BP_EnableIRQ(USB_IRQn);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_disable (uint8_t rhport)
+{
+  (void) rhport;
+  BP_DisableIRQ(USB_IRQn);
+}
+
+static inline void dwc2_remote_wakeup_delay(void)
+{
+  // try to delay for 1 ms
+  // TODO implement later
+}
+
+// MCU specific PHY init, called BEFORE core reset
+static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // nothing to do
+}
+
+// MCU specific PHY update, it is called AFTER init() and core reset
+static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // nothing to do
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_efm32.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_efm32.h
new file mode 100644
index 00000000000..ee4c3c71565
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_efm32.h
@@ -0,0 +1,87 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Rafael Silva (@perigoso)
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _DWC2_EFM32_H_
+#define _DWC2_EFM32_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "em_device.h"
+
+// EFM32 has custom control register before DWC registers
+#define DWC2_REG_BASE       (USB_BASE + offsetof(USB_TypeDef, GOTGCTL))
+#define DWC2_EP_MAX         7
+#define DWC2_EP_FIFO_SIZE   2048
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_enable(uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_EnableIRQ(USB_IRQn);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_disable (uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_DisableIRQ(USB_IRQn);
+}
+
+static inline void dwc2_remote_wakeup_delay(void)
+{
+  // try to delay for 1 ms
+//  uint32_t count = SystemCoreClock / 1000;
+//  while ( count-- ) __NOP();
+}
+
+// MCU specific PHY init, called BEFORE core reset
+static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // Enable PHY
+  USB->ROUTE = USB_ROUTE_PHYPEN;
+}
+
+// MCU specific PHY update, it is called AFTER init() and core reset
+static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // EFM32 Manual: turn around must be 5 (reset & default value)
+  // dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_TRDT_Msk) | (5u << GUSBCFG_TRDT_Pos);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_esp32.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_esp32.h
new file mode 100644
index 00000000000..78da277d5fc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_esp32.h
@@ -0,0 +1,94 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+
+#ifndef _DWC2_ESP32_H_
+#define _DWC2_ESP32_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "esp_intr_alloc.h"
+#include "soc/periph_defs.h"
+//#include "soc/usb_periph.h"
+
+#define DWC2_REG_BASE       0x60080000UL
+#define DWC2_EP_MAX         5             // USB_OUT_EP_NUM
+#define DWC2_EP_FIFO_SIZE   1024
+
+// #define EP_FIFO_NUM 5
+
+static intr_handle_t usb_ih;
+
+static void dcd_int_handler_wrap(void* arg)
+{
+  (void) arg;
+  dcd_int_handler(0);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_enable (uint8_t rhport)
+{
+  (void) rhport;
+  esp_intr_alloc(ETS_USB_INTR_SOURCE, ESP_INTR_FLAG_LOWMED, dcd_int_handler_wrap, NULL, &usb_ih);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_disable (uint8_t rhport)
+{
+  (void) rhport;
+  esp_intr_free(usb_ih);
+}
+
+static inline void dwc2_remote_wakeup_delay(void)
+{
+  vTaskDelay(pdMS_TO_TICKS(1));
+}
+
+// MCU specific PHY init, called BEFORE core reset
+static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // nothing to do
+}
+
+// MCU specific PHY update, it is called AFTER init() and core reset
+static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // nothing to do
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DWC2_ESP32_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_gd32.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_gd32.h
new file mode 100644
index 00000000000..f8fa01ee0ad
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_gd32.h
@@ -0,0 +1,100 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+
+#ifndef DWC2_GD32_H_
+#define DWC2_GD32_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define DWC2_REG_BASE       0x50000000UL
+#define DWC2_EP_MAX         4
+#define DWC2_EP_FIFO_SIZE   1280
+#define RHPORT_IRQn         86
+
+extern uint32_t SystemCoreClock;
+
+// The GD32VF103 is a RISC-V MCU, which implements the ECLIC Core-Local
+// Interrupt Controller by Nuclei. It is nearly API compatible to the
+// NVIC used by ARM MCUs.
+#define ECLIC_INTERRUPT_ENABLE_BASE 0xD2001001UL
+
+TU_ATTR_ALWAYS_INLINE
+static inline void __eclic_enable_interrupt (uint32_t irq) {
+  *(volatile uint8_t*)(ECLIC_INTERRUPT_ENABLE_BASE + (irq * 4)) = 1;
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void __eclic_disable_interrupt (uint32_t irq){
+  *(volatile uint8_t*)(ECLIC_INTERRUPT_ENABLE_BASE + (irq * 4)) = 0;
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_enable(uint8_t rhport)
+{
+  (void) rhport;
+  __eclic_enable_interrupt(RHPORT_IRQn);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_disable (uint8_t rhport)
+{
+  (void) rhport;
+  __eclic_disable_interrupt(RHPORT_IRQn);
+}
+
+static inline void dwc2_remote_wakeup_delay(void)
+{
+  // try to delay for 1 ms
+  uint32_t count = SystemCoreClock / 1000;
+  while ( count-- ) __asm volatile ("nop");
+}
+
+// MCU specific PHY init, called BEFORE core reset
+static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // nothing to do
+}
+
+// MCU specific PHY update, it is called AFTER init() and core reset
+static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // nothing to do
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* DWC2_GD32_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_stm32.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_stm32.h
new file mode 100644
index 00000000000..469045ac46e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -0,0 +1,205 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _DWC2_STM32_H_
+#define _DWC2_STM32_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// EP_MAX       : Max number of bi-directional endpoints including EP0
+// EP_FIFO_SIZE : Size of dedicated USB SRAM
+#if CFG_TUSB_MCU == OPT_MCU_STM32F1
+  #include "stm32f1xx.h"
+  #define EP_MAX_FS       4
+  #define EP_FIFO_SIZE_FS 1280
+
+#elif CFG_TUSB_MCU == OPT_MCU_STM32F2
+  #include "stm32f2xx.h"
+  #define EP_MAX_FS       USB_OTG_FS_MAX_IN_ENDPOINTS
+  #define EP_FIFO_SIZE_FS USB_OTG_FS_TOTAL_FIFO_SIZE
+
+#elif CFG_TUSB_MCU == OPT_MCU_STM32F4
+  #include "stm32f4xx.h"
+  #define EP_MAX_FS       USB_OTG_FS_MAX_IN_ENDPOINTS
+  #define EP_FIFO_SIZE_FS USB_OTG_FS_TOTAL_FIFO_SIZE
+  #define EP_MAX_HS       USB_OTG_HS_MAX_IN_ENDPOINTS
+  #define EP_FIFO_SIZE_HS USB_OTG_HS_TOTAL_FIFO_SIZE
+
+#elif CFG_TUSB_MCU == OPT_MCU_STM32H7
+  #include "stm32h7xx.h"
+  #define EP_MAX_FS       9
+  #define EP_FIFO_SIZE_FS 4096
+  #define EP_MAX_HS       9
+  #define EP_FIFO_SIZE_HS 4096
+
+#elif CFG_TUSB_MCU == OPT_MCU_STM32F7
+  #include "stm32f7xx.h"
+  #define EP_MAX_FS       6
+  #define EP_FIFO_SIZE_FS 1280
+  #define EP_MAX_HS       9
+  #define EP_FIFO_SIZE_HS 4096
+
+#elif CFG_TUSB_MCU == OPT_MCU_STM32L4
+  #include "stm32l4xx.h"
+  #define EP_MAX_FS       6
+  #define EP_FIFO_SIZE_FS 1280
+
+#else
+  #error "Unsupported MCUs"
+#endif
+
+// On STM32 we associate Port0 to OTG_FS, and Port1 to OTG_HS
+#if TUD_OPT_RHPORT == 0
+  #define DWC2_REG_BASE       USB_OTG_FS_PERIPH_BASE
+  #define DWC2_EP_MAX         EP_MAX_FS
+  #define DWC2_EP_FIFO_SIZE   EP_FIFO_SIZE_FS
+  #define RHPORT_IRQn         OTG_FS_IRQn
+
+#else
+  #define DWC2_REG_BASE       USB_OTG_HS_PERIPH_BASE
+  #define DWC2_EP_MAX         EP_MAX_HS
+  #define DWC2_EP_FIFO_SIZE   EP_FIFO_SIZE_HS
+  #define RHPORT_IRQn         OTG_HS_IRQn
+
+#endif
+
+extern uint32_t SystemCoreClock;
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_enable(uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_EnableIRQ(RHPORT_IRQn);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_disable (uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_DisableIRQ(RHPORT_IRQn);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_remote_wakeup_delay(void)
+{
+  // try to delay for 1 ms
+  uint32_t count = SystemCoreClock / 1000;
+  while ( count-- ) __NOP();
+}
+
+// MCU specific PHY init, called BEFORE core reset
+static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  if ( hs_phy_type == HS_PHY_TYPE_NONE )
+  {
+    // Enable on-chip FS PHY
+    dwc2->stm32_gccfg |= STM32_GCCFG_PWRDWN;
+  }else
+  {
+    // Disable FS PHY
+    dwc2->stm32_gccfg &= ~STM32_GCCFG_PWRDWN;
+
+    // Enable on-chip HS PHY
+    if (hs_phy_type == HS_PHY_TYPE_UTMI || hs_phy_type == HS_PHY_TYPE_UTMI_ULPI)
+    {
+#ifdef USB_HS_PHYC
+      // Enable UTMI HS PHY
+      dwc2->stm32_gccfg |= STM32_GCCFG_PHYHSEN;
+
+      // Enable LDO
+      USB_HS_PHYC->USB_HS_PHYC_LDO |= USB_HS_PHYC_LDO_ENABLE;
+
+      // Wait until LDO ready
+      while ( 0 == (USB_HS_PHYC->USB_HS_PHYC_LDO & USB_HS_PHYC_LDO_STATUS) ) {}
+
+      uint32_t phyc_pll = 0;
+
+      // TODO Try to get HSE_VALUE from registers instead of depending CFLAGS
+      switch ( HSE_VALUE )
+      {
+        case 12000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_12MHZ   ; break;
+        case 12500000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_12_5MHZ ; break;
+        case 16000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_16MHZ   ; break;
+        case 24000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_24MHZ   ; break;
+        case 25000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_25MHZ   ; break;
+        case 32000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_Msk     ; break; // Value not defined in header
+        default:
+          TU_ASSERT(false, );
+      }
+      USB_HS_PHYC->USB_HS_PHYC_PLL = phyc_pll;
+
+      // Control the tuning interface of the High Speed PHY
+      // Use magic value (USB_HS_PHYC_TUNE_VALUE) from ST driver for F7
+      USB_HS_PHYC->USB_HS_PHYC_TUNE |= 0x00000F13U;
+
+      // Enable PLL internal PHY
+      USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL_PLLEN;
+#endif
+    }
+  }
+}
+
+// MCU specific PHY update, it is called AFTER init() and core reset
+static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  // used to set turnaround time for fullspeed, nothing to do in highspeed mode
+  if ( hs_phy_type == HS_PHY_TYPE_NONE )
+  {
+    // Turnaround timeout depends on the AHB clock dictated by STM32 Reference Manual
+    uint32_t turnaround;
+
+    if ( SystemCoreClock >= 32000000u )
+      turnaround = 0x6u;
+    else if ( SystemCoreClock >= 27500000u )
+      turnaround = 0x7u;
+    else if ( SystemCoreClock >= 24000000u )
+      turnaround = 0x8u;
+    else if ( SystemCoreClock >= 21800000u )
+      turnaround = 0x9u;
+    else if ( SystemCoreClock >= 20000000u )
+      turnaround = 0xAu;
+    else if ( SystemCoreClock >= 18500000u )
+      turnaround = 0xBu;
+    else if ( SystemCoreClock >= 17200000u )
+      turnaround = 0xCu;
+    else if ( SystemCoreClock >= 16000000u )
+      turnaround = 0xDu;
+    else if ( SystemCoreClock >= 15000000u )
+      turnaround = 0xEu;
+    else
+      turnaround = 0xFu;
+
+    dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_TRDT_Msk) | (turnaround << GUSBCFG_TRDT_Pos);
+  }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DWC2_STM32_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_type.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_type.h
new file mode 100644
index 00000000000..7fa2028eb93
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_type.h
@@ -0,0 +1,1730 @@
+/**
+  * @author  MCD Application Team
+  *          Ha Thach (tinyusb.org)
+  *
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  */
+
+#ifndef _TUSB_DWC2_TYPES_H_
+#define _TUSB_DWC2_TYPES_H_
+
+#include "stdint.h"
+
+/* DWC OTG HW Release versions */
+#define DWC2_CORE_REV_2_71a   0x4f54271a
+#define DWC2_CORE_REV_2_72a   0x4f54272a
+#define DWC2_CORE_REV_2_80a   0x4f54280a
+#define DWC2_CORE_REV_2_90a   0x4f54290a
+#define DWC2_CORE_REV_2_91a   0x4f54291a
+#define DWC2_CORE_REV_2_92a   0x4f54292a
+#define DWC2_CORE_REV_2_94a   0x4f54294a
+#define DWC2_CORE_REV_3_00a   0x4f54300a
+#define DWC2_CORE_REV_3_10a   0x4f54310a
+#define DWC2_CORE_REV_4_00a   0x4f54400a
+#define DWC2_CORE_REV_4_20a   0x4f54420a
+#define DWC2_FS_IOT_REV_1_00a 0x5531100a
+#define DWC2_HS_IOT_REV_1_00a 0x5532100a
+#define DWC2_CORE_REV_MASK    0x0000ffff
+
+/* DWC OTG HW Core ID */
+#define DWC2_OTG_ID           0x4f540000
+#define DWC2_FS_IOT_ID        0x55310000
+#define DWC2_HS_IOT_ID        0x55320000
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if 0
+// HS PHY
+typedef struct
+{
+  volatile uint32_t HS_PHYC_PLL;         // This register is used to control the PLL of the HS PHY.                       000h */
+  volatile uint32_t Reserved04;          // Reserved                                                                      004h */
+  volatile uint32_t Reserved08;          // Reserved                                                                      008h */
+  volatile uint32_t HS_PHYC_TUNE;        // This register is used to control the tuning interface of the High Speed PHY.  00Ch */
+  volatile uint32_t Reserved10;          // Reserved                                                                      010h */
+  volatile uint32_t Reserved14;          // Reserved                                                                      014h */
+  volatile uint32_t HS_PHYC_LDO;         // This register is used to control the regulator (LDO).                         018h */
+} HS_PHYC_GlobalTypeDef;
+#endif
+
+enum {
+  HS_PHY_TYPE_NONE = 0  , // not supported
+  HS_PHY_TYPE_UTMI      , // internal PHY (mostly)
+  HS_PHY_TYPE_ULPI      , // external PHY
+  HS_PHY_TYPE_UTMI_ULPI ,
+};
+
+enum {
+  FS_PHY_TYPE_NONE = 0,  // not supported
+  FS_PHY_TYPE_DEDICATED,
+  FS_PHY_TYPE_UTMI,
+  FS_PHY_TYPE_ULPI,
+};
+
+typedef struct TU_ATTR_PACKED
+{
+  uint32_t op_mode                  : 3; // 0: HNP and SRP | 1: SRP | 2: non-HNP, non-SRP
+  uint32_t arch                     : 2; // 0: slave-only | 1: External DMA | 2: Internal DMA | 3: others
+  uint32_t point2point              : 1; // 0: support hub and split | 1: no hub, no split
+  uint32_t hs_phy_type              : 2; // 0: not supported | 1: UTMI+ | 2: ULPI | 3: UTMI+ and ULPI
+  uint32_t fs_phy_type              : 2; // 0: not supported | 1: dedicated | 2: UTMI+ | 3: ULPI
+  uint32_t num_dev_ep               : 4; // Number of device endpoints (not including EP0)
+  uint32_t num_host_ch              : 4; // Number of host channel
+  uint32_t period_channel_support   : 1; // Support Periodic OUT Host Channel
+  uint32_t enable_dynamic_fifo      : 1; // Dynamic FIFO Sizing Enabled
+  uint32_t mul_cpu_int              : 1; // Multi-Processor Interrupt Enabled
+  uint32_t reserved21               : 1;
+  uint32_t nperiod_tx_q_depth       : 2; // Non-periodic request queue depth: 0 = 2.  1 = 4, 2 = 8
+  uint32_t host_period_tx_q_depth   : 2; // Host periodic request queue depth: 0 = 2.  1 = 4, 2 = 8
+  uint32_t dev_token_q_depth        : 5; // Device IN token sequence learning queue depth: 0-30
+  uint32_t otg_enable_ic_usb        : 1; // IC_USB mode specified for mode of operation
+} dwc2_ghwcfg2_t;
+
+TU_VERIFY_STATIC(sizeof(dwc2_ghwcfg2_t) == 4, "incorrect size");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint32_t xfer_size_width          : 4;  // Transfer size counter in bits = 11 + n (max 19 bits)
+  uint32_t packet_size_width        : 3;  // Packet size counter in bits = 4 + n (max 10 bits)
+  uint32_t otg_enable               : 1;  // 1 is OTG capable
+  uint32_t i2c_enable               : 1;  // I2C interface is available
+  uint32_t vendor_ctrl_itf          : 1;  // Vendor control interface is available
+  uint32_t optional_feature_removed : 1;  // remove User ID, GPIO, SOF toggle & counter
+  uint32_t synch_reset              : 1;  // 0: async reset | 1: synch reset
+  uint32_t otg_adp_support          : 1;  // ADP logic is present along with HSOTG controller
+  uint32_t otg_enable_hsic          : 1;  // 1: HSIC-capable with shared UTMI PHY interface | 0: non-HSIC
+  uint32_t battery_charger_support  : 1;  // support battery charger
+  uint32_t lpm_mode                 : 1;  // LPC mode
+  uint32_t total_fifo_size          : 16; // DFIFO depth value in terms of 32-bit words
+}dwc2_ghwcfg3_t;
+
+TU_VERIFY_STATIC(sizeof(dwc2_ghwcfg3_t) == 4, "incorrect size");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint32_t num_dev_period_in_ep       : 4; // Number of Device Periodic IN Endpoints
+  uint32_t power_optimized            : 1; // Partial Power Down Enabled
+  uint32_t ahb_freq_min               : 1; // 1: minimum of AHB frequency is less than 60 MHz
+  uint32_t hibernation                : 1; // Hibernation feature is enabled
+  uint32_t reserved7                  : 3;
+  uint32_t service_interval_mode      : 1; // Service Interval supported
+  uint32_t ipg_isoc_en                : 1; // IPG ISOC supported
+  uint32_t acg_enable                 : 1; // ACG enabled
+  uint32_t reserved13                 : 1;
+  uint32_t utmi_phy_data_width        : 2; // 0: 8 bits | 1: 16 bits | 2: 8/16 software selectable
+  uint32_t dev_ctrl_ep_num            : 4; // Number of Device control endpoints in addition to EP0
+  uint32_t iddg_filter_enabled        : 1;
+  uint32_t vbus_valid_filter_enabled  : 1;
+  uint32_t a_valid_filter_enabled     : 1;
+  uint32_t b_valid_filter_enabled     : 1;
+  uint32_t dedicated_fifos            : 1; // Dedicated tx fifo for device IN Endpoint is enabled
+  uint32_t num_dev_in_eps             : 4; // Number of Device IN Endpoints including EP0
+  uint32_t dma_desc_enable            : 1; // scatter/gather DMA configuration
+  uint32_t dma_dynamic                : 1; // Dynamic scatter/gather DMA
+}dwc2_ghwcfg4_t;
+
+TU_VERIFY_STATIC(sizeof(dwc2_ghwcfg4_t) == 4, "incorrect size");
+
+// Host Channel
+typedef struct
+{
+  volatile uint32_t hcchar;           // 500 + 20*ch Host Channel Characteristics
+  volatile uint32_t hcsplt;           // 504 + 20*ch Host Channel Split Control
+  volatile uint32_t hcint;            // 508 + 20*ch Host Channel Interrupt
+  volatile uint32_t hcintmsk;         // 50C + 20*ch Host Channel Interrupt Mask
+  volatile uint32_t hctsiz;           // 510 + 20*ch Host Channel Transfer Size
+  volatile uint32_t hcdma;            // 514 + 20*ch Host Channel DMA Address
+           uint32_t reserved518;      // 518 + 20*ch
+  volatile uint32_t hcdmab;           // 51C + 20*ch Host Channel DMA Address
+} dwc2_channel_t;
+
+// Endpoint IN
+typedef struct
+{
+  volatile uint32_t diepctl;          // 900 + 20*ep Device IN Endpoint Control
+           uint32_t reserved04;       // 904
+  volatile uint32_t diepint;          // 908 + 20*ep Device IN Endpoint Interrupt
+           uint32_t reserved0c;       // 90C
+  volatile uint32_t dieptsiz;         // 910 + 20*ep Device IN Endpoint Transfer Size
+  volatile uint32_t diepdma;          // 914 + 20*ep Device IN Endpoint DMA Address
+  volatile uint32_t dtxfsts;          // 918 + 20*ep Device IN Endpoint Tx FIFO Status
+           uint32_t reserved1c;       // 91C
+} dwc2_epin_t;
+
+// Endpoint OUT
+typedef struct
+{
+  volatile uint32_t doepctl;          // B00 + 20*ep Device OUT Endpoint Control
+           uint32_t reserved04;       // B04
+  volatile uint32_t doepint;          // B08 + 20*ep Device OUT Endpoint Interrupt
+           uint32_t reserved0c;       // B0C
+  volatile uint32_t doeptsiz;         // B10 + 20*ep Device OUT Endpoint Transfer Size
+  volatile uint32_t doepdma;          // B14 + 20*ep Device OUT Endpoint DMA Address
+           uint32_t reserved18[2];    // B18..B1C
+} dwc2_epout_t;
+
+typedef struct
+{
+  //------------- Core Global -------------//
+  volatile uint32_t gotgctl;          // 000 OTG Control and Status
+  volatile uint32_t gotgint;          // 004 OTG Interrupt
+  volatile uint32_t gahbcfg;          // 008 AHB Configuration
+  volatile uint32_t gusbcfg;          // 00c USB Configuration
+  volatile uint32_t grstctl;          // 010 Reset
+  volatile uint32_t gintsts;          // 014 Interrupt
+  volatile uint32_t gintmsk;          // 018 Interrupt Mask
+  volatile uint32_t grxstsr;          // 01c Receive Status Debug Read
+  volatile uint32_t grxstsp;          // 020 Receive Status Read/Pop
+  volatile uint32_t grxfsiz;          // 024 Receive FIFO Size
+union {
+  volatile uint32_t dieptxf0;         // 028 EP0 Tx FIFO Size
+  volatile uint32_t gnptxfsiz;        // 028 Non-periodic Transmit FIFO Size
+};
+  volatile uint32_t gnptxsts;         // 02c Non-periodic Transmit FIFO/Queue Status
+  volatile uint32_t gi2cctl;          // 030 I2C Address
+  volatile uint32_t gpvndctl;         // 034 PHY Vendor Control
+union {
+  volatile uint32_t ggpio;            // 038 General Purpose IO
+  volatile uint32_t stm32_gccfg;      // 038 STM32 General Core Configuration
+};
+  volatile uint32_t guid;             // 03C User (Application programmable) ID
+  volatile uint32_t gsnpsid;          // 040 Synopsys ID + Release version
+  volatile uint32_t ghwcfg1;          // 044 User Hardware Configuration1: endpoint dir (2 bit per ep)
+union {
+  volatile uint32_t ghwcfg2;          // 048 User Hardware Configuration2
+  dwc2_ghwcfg2_t    ghwcfg2_bm;
+};
+union {
+  volatile uint32_t ghwcfg3;          // 04C User Hardware Configuration3
+  dwc2_ghwcfg3_t    ghwcfg3_bm;
+};
+union {
+  volatile uint32_t ghwcfg4;          // 050 User Hardware Configuration4
+  dwc2_ghwcfg4_t    ghwcfg4_bm;
+};
+  volatile uint32_t glpmcfg;          // 054 Core LPM Configuration
+  volatile uint32_t gpwrdn;           // 058 Power Down
+  volatile uint32_t gdfifocfg;        // 05C DFIFO Software Configuration
+  volatile uint32_t gadpctl;          // 060 ADP Timer, Control and Status
+           uint32_t reserved64[39];   // 064..0FF
+  volatile uint32_t hptxfsiz;         // 100 Host Periodic Tx FIFO Size
+  volatile uint32_t dieptxf[15];      // 104..13C Device Periodic Transmit FIFO Size
+           uint32_t reserved140[176]; // 140..3FF
+
+  //------------- Host -------------//
+  volatile uint32_t hcfg;             // 400 Host Configuration
+  volatile uint32_t hfir;             // 404 Host Frame Interval
+  volatile uint32_t hfnum;            // 408 Host Frame Number / Frame Remaining
+           uint32_t reserved40c;      // 40C
+  volatile uint32_t hptxsts;          // 410 Host Periodic TX FIFO / Queue Status
+  volatile uint32_t haint;            // 414 Host All Channels Interrupt
+  volatile uint32_t haintmsk;         // 418 Host All Channels Interrupt Mask
+  volatile uint32_t hflbaddr;         // 41C Host Frame List Base Address
+           uint32_t reserved420[8];   // 420..43F
+  volatile uint32_t hprt;             // 440 Host Port Control and Status
+           uint32_t reserved444[47];  // 444..4FF
+
+  //------------- Host Channel -------------//
+  dwc2_channel_t    channel[16];      // 500..6FF Host Channels 0-15
+           uint32_t reserved700[64];  // 700..7FF
+
+ //------------- Device -------------//
+  volatile uint32_t dcfg;             // 800 Device Configuration
+  volatile uint32_t dctl;             // 804 Device Control
+  volatile uint32_t dsts;             // 808 Device Status (RO)
+           uint32_t reserved80c;      // 80C
+  volatile uint32_t diepmsk;          // 810 Device IN Endpoint Interrupt Mask
+  volatile uint32_t doepmsk;          // 814 Device OUT Endpoint Interrupt Mask
+  volatile uint32_t daint;            // 818 Device All Endpoints Interrupt
+  volatile uint32_t daintmsk;         // 81C Device All Endpoints Interrupt Mask
+  volatile uint32_t dtknqr1;          // 820 Device IN token sequence learning queue read1
+  volatile uint32_t dtknqr2;          // 824 Device IN token sequence learning queue read2
+  volatile uint32_t dvbusdis;         // 828 Device VBUS Discharge Time
+  volatile uint32_t dvbuspulse;       // 82C Device VBUS Pulsing Time
+  volatile uint32_t dthrctl;          // 830 Device threshold Control
+  volatile uint32_t diepempmsk;       // 834 Device IN Endpoint FIFO Empty Interrupt Mask
+  volatile uint32_t deachint;         // 838 Device Each Endpoint Interrupt
+  volatile uint32_t deachmsk;         // 83C Device Each Endpoint Interrupt msk
+  volatile uint32_t diepeachmsk[16];  // 840..87C Device Each IN Endpoint mask
+  volatile uint32_t doepeachmsk[16];  // 880..8BF Device Each OUT Endpoint mask
+           uint32_t reserved8c0[16];  // 8C0..8FF
+
+  //------------- Device Endpoint -------------//
+  dwc2_epin_t       epin[16];         // 900..AFF  IN Endpoints
+  dwc2_epout_t      epout[16];        // B00..CFF  OUT Endpoints
+           uint32_t reservedd00[64];  // D00..DFF
+
+  //------------- Power Clock -------------//
+  volatile uint32_t pcgctl;           // E00 Power and Clock Gating Control
+  volatile uint32_t pcgctl1;          // E04
+           uint32_t reservede08[126]; // E08..FFF
+
+  //------------- FIFOs -------------//
+  // Word-accessed only using first pointer since it auto shift
+  volatile uint32_t fifo[16][0x400];  // 1000..FFFF Endpoint FIFO
+} dwc2_regs_t;
+
+TU_VERIFY_STATIC(offsetof(dwc2_regs_t, hcfg   ) == 0x0400, "incorrect size");
+TU_VERIFY_STATIC(offsetof(dwc2_regs_t, channel) == 0x0500, "incorrect size");
+TU_VERIFY_STATIC(offsetof(dwc2_regs_t, dcfg   ) == 0x0800, "incorrect size");
+TU_VERIFY_STATIC(offsetof(dwc2_regs_t, epin   ) == 0x0900, "incorrect size");
+TU_VERIFY_STATIC(offsetof(dwc2_regs_t, epout  ) == 0x0B00, "incorrect size");
+TU_VERIFY_STATIC(offsetof(dwc2_regs_t, pcgctl ) == 0x0E00, "incorrect size");
+TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo   ) == 0x1000, "incorrect size");
+
+//--------------------------------------------------------------------+
+// Register Bit Definitions
+//--------------------------------------------------------------------+
+
+/********************  Bit definition for GOTGCTL register  ********************/
+#define GOTGCTL_SRQSCS_Pos               (0U)
+#define GOTGCTL_SRQSCS_Msk               (0x1UL << GOTGCTL_SRQSCS_Pos)            // 0x00000001 */
+#define GOTGCTL_SRQSCS                   GOTGCTL_SRQSCS_Msk                       // Session request success */
+#define GOTGCTL_SRQ_Pos                  (1U)
+#define GOTGCTL_SRQ_Msk                  (0x1UL << GOTGCTL_SRQ_Pos)               // 0x00000002 */
+#define GOTGCTL_SRQ                      GOTGCTL_SRQ_Msk                          // Session request */
+#define GOTGCTL_VBVALOEN_Pos             (2U)
+#define GOTGCTL_VBVALOEN_Msk             (0x1UL << GOTGCTL_VBVALOEN_Pos)          // 0x00000004 */
+#define GOTGCTL_VBVALOEN                 GOTGCTL_VBVALOEN_Msk                     // VBUS valid override enable */
+#define GOTGCTL_VBVALOVAL_Pos            (3U)
+#define GOTGCTL_VBVALOVAL_Msk            (0x1UL << GOTGCTL_VBVALOVAL_Pos)         // 0x00000008 */
+#define GOTGCTL_VBVALOVAL                GOTGCTL_VBVALOVAL_Msk                    // VBUS valid override value */
+#define GOTGCTL_AVALOEN_Pos              (4U)
+#define GOTGCTL_AVALOEN_Msk              (0x1UL << GOTGCTL_AVALOEN_Pos)           // 0x00000010 */
+#define GOTGCTL_AVALOEN                  GOTGCTL_AVALOEN_Msk                      // A-peripheral session valid override enable */
+#define GOTGCTL_AVALOVAL_Pos             (5U)
+#define GOTGCTL_AVALOVAL_Msk             (0x1UL << GOTGCTL_AVALOVAL_Pos)          // 0x00000020 */
+#define GOTGCTL_AVALOVAL                 GOTGCTL_AVALOVAL_Msk                     // A-peripheral session valid override value */
+#define GOTGCTL_BVALOEN_Pos              (6U)
+#define GOTGCTL_BVALOEN_Msk              (0x1UL << GOTGCTL_BVALOEN_Pos)           // 0x00000040 */
+#define GOTGCTL_BVALOEN                  GOTGCTL_BVALOEN_Msk                      // B-peripheral session valid override enable */
+#define GOTGCTL_BVALOVAL_Pos             (7U)
+#define GOTGCTL_BVALOVAL_Msk             (0x1UL << GOTGCTL_BVALOVAL_Pos)          // 0x00000080 */
+#define GOTGCTL_BVALOVAL                 GOTGCTL_BVALOVAL_Msk                     // B-peripheral session valid override value  */
+#define GOTGCTL_HNGSCS_Pos               (8U)
+#define GOTGCTL_HNGSCS_Msk               (0x1UL << GOTGCTL_HNGSCS_Pos)            // 0x00000100 */
+#define GOTGCTL_HNGSCS                   GOTGCTL_HNGSCS_Msk                       // Host set HNP enable */
+#define GOTGCTL_HNPRQ_Pos                (9U)
+#define GOTGCTL_HNPRQ_Msk                (0x1UL << GOTGCTL_HNPRQ_Pos)             // 0x00000200 */
+#define GOTGCTL_HNPRQ                    GOTGCTL_HNPRQ_Msk                        // HNP request */
+#define GOTGCTL_HSHNPEN_Pos              (10U)
+#define GOTGCTL_HSHNPEN_Msk              (0x1UL << GOTGCTL_HSHNPEN_Pos)           // 0x00000400 */
+#define GOTGCTL_HSHNPEN                  GOTGCTL_HSHNPEN_Msk                      // Host set HNP enable */
+#define GOTGCTL_DHNPEN_Pos               (11U)
+#define GOTGCTL_DHNPEN_Msk               (0x1UL << GOTGCTL_DHNPEN_Pos)            // 0x00000800 */
+#define GOTGCTL_DHNPEN                   GOTGCTL_DHNPEN_Msk                       // Device HNP enabled */
+#define GOTGCTL_EHEN_Pos                 (12U)
+#define GOTGCTL_EHEN_Msk                 (0x1UL << GOTGCTL_EHEN_Pos)              // 0x00001000 */
+#define GOTGCTL_EHEN                     GOTGCTL_EHEN_Msk                         // Embedded host enable */
+#define GOTGCTL_CIDSTS_Pos               (16U)
+#define GOTGCTL_CIDSTS_Msk               (0x1UL << GOTGCTL_CIDSTS_Pos)            // 0x00010000 */
+#define GOTGCTL_CIDSTS                   GOTGCTL_CIDSTS_Msk                       // Connector ID status */
+#define GOTGCTL_DBCT_Pos                 (17U)
+#define GOTGCTL_DBCT_Msk                 (0x1UL << GOTGCTL_DBCT_Pos)              // 0x00020000 */
+#define GOTGCTL_DBCT                     GOTGCTL_DBCT_Msk                         // Long/short debounce time */
+#define GOTGCTL_ASVLD_Pos                (18U)
+#define GOTGCTL_ASVLD_Msk                (0x1UL << GOTGCTL_ASVLD_Pos)             // 0x00040000 */
+#define GOTGCTL_ASVLD                    GOTGCTL_ASVLD_Msk                        // A-session valid  */
+#define GOTGCTL_BSESVLD_Pos              (19U)
+#define GOTGCTL_BSESVLD_Msk              (0x1UL << GOTGCTL_BSESVLD_Pos)           // 0x00080000 */
+#define GOTGCTL_BSESVLD                  GOTGCTL_BSESVLD_Msk                      // B-session valid */
+#define GOTGCTL_OTGVER_Pos               (20U)
+#define GOTGCTL_OTGVER_Msk               (0x1UL << GOTGCTL_OTGVER_Pos)            // 0x00100000 */
+#define GOTGCTL_OTGVER                   GOTGCTL_OTGVER_Msk                       // OTG version  */
+
+/********************  Bit definition for HCFG register  ********************/
+#define HCFG_FSLSPCS_Pos                 (0U)
+#define HCFG_FSLSPCS_Msk                 (0x3UL << HCFG_FSLSPCS_Pos)              // 0x00000003 */
+#define HCFG_FSLSPCS                     HCFG_FSLSPCS_Msk                         // FS/LS PHY clock select  */
+#define HCFG_FSLSPCS_0                   (0x1UL << HCFG_FSLSPCS_Pos)              // 0x00000001 */
+#define HCFG_FSLSPCS_1                   (0x2UL << HCFG_FSLSPCS_Pos)              // 0x00000002 */
+#define HCFG_FSLSS_Pos                   (2U)
+#define HCFG_FSLSS_Msk                   (0x1UL << HCFG_FSLSS_Pos)                // 0x00000004 */
+#define HCFG_FSLSS                       HCFG_FSLSS_Msk                           // FS- and LS-only support */
+
+/********************  Bit definition for PCGCR register  ********************/
+#define PCGCR_STPPCLK_Pos                (0U)
+#define PCGCR_STPPCLK_Msk                (0x1UL << PCGCR_STPPCLK_Pos)             // 0x00000001 */
+#define PCGCR_STPPCLK                    PCGCR_STPPCLK_Msk                        // Stop PHY clock */
+#define PCGCR_GATEHCLK_Pos               (1U)
+#define PCGCR_GATEHCLK_Msk               (0x1UL << PCGCR_GATEHCLK_Pos)            // 0x00000002 */
+#define PCGCR_GATEHCLK                   PCGCR_GATEHCLK_Msk                       // Gate HCLK */
+#define PCGCR_PHYSUSP_Pos                (4U)
+#define PCGCR_PHYSUSP_Msk                (0x1UL << PCGCR_PHYSUSP_Pos)             // 0x00000010 */
+#define PCGCR_PHYSUSP                    PCGCR_PHYSUSP_Msk                        // PHY suspended */
+
+/********************  Bit definition for GOTGINT register  ********************/
+#define GOTGINT_SEDET_Pos                (2U)
+#define GOTGINT_SEDET_Msk                (0x1UL << GOTGINT_SEDET_Pos)             // 0x00000004 */
+#define GOTGINT_SEDET                    GOTGINT_SEDET_Msk                        // Session end detected                   */
+#define GOTGINT_SRSSCHG_Pos              (8U)
+#define GOTGINT_SRSSCHG_Msk              (0x1UL << GOTGINT_SRSSCHG_Pos)           // 0x00000100 */
+#define GOTGINT_SRSSCHG                  GOTGINT_SRSSCHG_Msk                      // Session request success status change  */
+#define GOTGINT_HNSSCHG_Pos              (9U)
+#define GOTGINT_HNSSCHG_Msk              (0x1UL << GOTGINT_HNSSCHG_Pos)           // 0x00000200 */
+#define GOTGINT_HNSSCHG                  GOTGINT_HNSSCHG_Msk                      // Host negotiation success status change */
+#define GOTGINT_HNGDET_Pos               (17U)
+#define GOTGINT_HNGDET_Msk               (0x1UL << GOTGINT_HNGDET_Pos)            // 0x00020000 */
+#define GOTGINT_HNGDET                   GOTGINT_HNGDET_Msk                       // Host negotiation detected              */
+#define GOTGINT_ADTOCHG_Pos              (18U)
+#define GOTGINT_ADTOCHG_Msk              (0x1UL << GOTGINT_ADTOCHG_Pos)           // 0x00040000 */
+#define GOTGINT_ADTOCHG                  GOTGINT_ADTOCHG_Msk                      // A-device timeout change                */
+#define GOTGINT_DBCDNE_Pos               (19U)
+#define GOTGINT_DBCDNE_Msk               (0x1UL << GOTGINT_DBCDNE_Pos)            // 0x00080000 */
+#define GOTGINT_DBCDNE                   GOTGINT_DBCDNE_Msk                       // Debounce done                          */
+#define GOTGINT_IDCHNG_Pos               (20U)
+#define GOTGINT_IDCHNG_Msk               (0x1UL << GOTGINT_IDCHNG_Pos)            // 0x00100000 */
+#define GOTGINT_IDCHNG                   GOTGINT_IDCHNG_Msk                       // Change in ID pin input value           */
+
+/********************  Bit definition for DCFG register  ********************/
+#define DCFG_DSPD_Pos                    (0U)
+#define DCFG_DSPD_Msk                    (0x3UL << DCFG_DSPD_Pos)                 // 0x00000003
+#define DCFG_DSPD_HS                     0    // Highspeed
+#define DCFG_DSPD_FS_HSPHY               1    // Fullspeed on HS PHY
+#define DCFG_DSPD_LS                     2    // Lowspeed
+#define DCFG_DSPD_FS                     3    // Fullspeed on FS PHY
+
+#define DCFG_NZLSOHSK_Pos                (2U)
+#define DCFG_NZLSOHSK_Msk                (0x1UL << DCFG_NZLSOHSK_Pos)             // 0x00000004 */
+#define DCFG_NZLSOHSK                    DCFG_NZLSOHSK_Msk                        // Nonzero-length status OUT handshake */
+
+#define DCFG_DAD_Pos                     (4U)
+#define DCFG_DAD_Msk                     (0x7FUL << DCFG_DAD_Pos)                 // 0x000007F0 */
+#define DCFG_DAD                         DCFG_DAD_Msk                             // Device address */
+#define DCFG_DAD_0                       (0x01UL << DCFG_DAD_Pos)                 // 0x00000010 */
+#define DCFG_DAD_1                       (0x02UL << DCFG_DAD_Pos)                 // 0x00000020 */
+#define DCFG_DAD_2                       (0x04UL << DCFG_DAD_Pos)                 // 0x00000040 */
+#define DCFG_DAD_3                       (0x08UL << DCFG_DAD_Pos)                 // 0x00000080 */
+#define DCFG_DAD_4                       (0x10UL << DCFG_DAD_Pos)                 // 0x00000100 */
+#define DCFG_DAD_5                       (0x20UL << DCFG_DAD_Pos)                 // 0x00000200 */
+#define DCFG_DAD_6                       (0x40UL << DCFG_DAD_Pos)                 // 0x00000400 */
+
+#define DCFG_PFIVL_Pos                   (11U)
+#define DCFG_PFIVL_Msk                   (0x3UL << DCFG_PFIVL_Pos)                // 0x00001800 */
+#define DCFG_PFIVL                       DCFG_PFIVL_Msk                           // Periodic (micro)frame interval */
+#define DCFG_PFIVL_0                     (0x1UL << DCFG_PFIVL_Pos)                // 0x00000800 */
+#define DCFG_PFIVL_1                     (0x2UL << DCFG_PFIVL_Pos)                // 0x00001000 */
+
+#define DCFG_XCVRDLY_Pos                 (14U)
+#define DCFG_XCVRDLY_Msk                 (0x1UL << DCFG_XCVRDLY_Pos)             /*!< 0x00004000 */
+#define DCFG_XCVRDLY                     DCFG_XCVRDLY_Msk                        // Enables delay between xcvr_sel and txvalid during device chirp
+
+#define DCFG_PERSCHIVL_Pos               (24U)
+#define DCFG_PERSCHIVL_Msk               (0x3UL << DCFG_PERSCHIVL_Pos)            // 0x03000000 */
+#define DCFG_PERSCHIVL                   DCFG_PERSCHIVL_Msk                       // Periodic scheduling interval */
+#define DCFG_PERSCHIVL_0                 (0x1UL << DCFG_PERSCHIVL_Pos)            // 0x01000000 */
+#define DCFG_PERSCHIVL_1                 (0x2UL << DCFG_PERSCHIVL_Pos)            // 0x02000000 */
+
+/********************  Bit definition for DCTL register  ********************/
+#define DCTL_RWUSIG_Pos                  (0U)
+#define DCTL_RWUSIG_Msk                  (0x1UL << DCTL_RWUSIG_Pos)               // 0x00000001 */
+#define DCTL_RWUSIG                      DCTL_RWUSIG_Msk                          // Remote wakeup signaling */
+#define DCTL_SDIS_Pos                    (1U)
+#define DCTL_SDIS_Msk                    (0x1UL << DCTL_SDIS_Pos)                 // 0x00000002 */
+#define DCTL_SDIS                        DCTL_SDIS_Msk                            // Soft disconnect         */
+#define DCTL_GINSTS_Pos                  (2U)
+#define DCTL_GINSTS_Msk                  (0x1UL << DCTL_GINSTS_Pos)               // 0x00000004 */
+#define DCTL_GINSTS                      DCTL_GINSTS_Msk                          // Global IN NAK status    */
+#define DCTL_GONSTS_Pos                  (3U)
+#define DCTL_GONSTS_Msk                  (0x1UL << DCTL_GONSTS_Pos)               // 0x00000008 */
+#define DCTL_GONSTS                      DCTL_GONSTS_Msk                          // Global OUT NAK status   */
+
+#define DCTL_TCTL_Pos                    (4U)
+#define DCTL_TCTL_Msk                    (0x7UL << DCTL_TCTL_Pos)                 // 0x00000070 */
+#define DCTL_TCTL                        DCTL_TCTL_Msk                            // Test control */
+#define DCTL_TCTL_0                      (0x1UL << DCTL_TCTL_Pos)                 // 0x00000010 */
+#define DCTL_TCTL_1                      (0x2UL << DCTL_TCTL_Pos)                 // 0x00000020 */
+#define DCTL_TCTL_2                      (0x4UL << DCTL_TCTL_Pos)                 // 0x00000040 */
+#define DCTL_SGINAK_Pos                  (7U)
+#define DCTL_SGINAK_Msk                  (0x1UL << DCTL_SGINAK_Pos)               // 0x00000080 */
+#define DCTL_SGINAK                      DCTL_SGINAK_Msk                          // Set global IN NAK         */
+#define DCTL_CGINAK_Pos                  (8U)
+#define DCTL_CGINAK_Msk                  (0x1UL << DCTL_CGINAK_Pos)               // 0x00000100 */
+#define DCTL_CGINAK                      DCTL_CGINAK_Msk                          // Clear global IN NAK       */
+#define DCTL_SGONAK_Pos                  (9U)
+#define DCTL_SGONAK_Msk                  (0x1UL << DCTL_SGONAK_Pos)               // 0x00000200 */
+#define DCTL_SGONAK                      DCTL_SGONAK_Msk                          // Set global OUT NAK        */
+#define DCTL_CGONAK_Pos                  (10U)
+#define DCTL_CGONAK_Msk                  (0x1UL << DCTL_CGONAK_Pos)               // 0x00000400 */
+#define DCTL_CGONAK                      DCTL_CGONAK_Msk                          // Clear global OUT NAK      */
+#define DCTL_POPRGDNE_Pos                (11U)
+#define DCTL_POPRGDNE_Msk                (0x1UL << DCTL_POPRGDNE_Pos)             // 0x00000800 */
+#define DCTL_POPRGDNE                    DCTL_POPRGDNE_Msk                        // Power-on programming done */
+
+/********************  Bit definition for HFIR register  ********************/
+#define HFIR_FRIVL_Pos                   (0U)
+#define HFIR_FRIVL_Msk                   (0xFFFFUL << HFIR_FRIVL_Pos)             // 0x0000FFFF */
+#define HFIR_FRIVL                       HFIR_FRIVL_Msk                           // Frame interval */
+
+/********************  Bit definition for HFNUM register  ********************/
+#define HFNUM_FRNUM_Pos                  (0U)
+#define HFNUM_FRNUM_Msk                  (0xFFFFUL << HFNUM_FRNUM_Pos)            // 0x0000FFFF */
+#define HFNUM_FRNUM                      HFNUM_FRNUM_Msk                          // Frame number         */
+#define HFNUM_FTREM_Pos                  (16U)
+#define HFNUM_FTREM_Msk                  (0xFFFFUL << HFNUM_FTREM_Pos)            // 0xFFFF0000 */
+#define HFNUM_FTREM                      HFNUM_FTREM_Msk                          // Frame time remaining */
+
+/********************  Bit definition for DSTS register  ********************/
+#define DSTS_SUSPSTS_Pos                 (0U)
+#define DSTS_SUSPSTS_Msk                 (0x1UL << DSTS_SUSPSTS_Pos)              // 0x00000001 */
+#define DSTS_SUSPSTS                     DSTS_SUSPSTS_Msk                         // Suspend status   */
+#define DSTS_ENUMSPD_Pos                 (1U)
+#define DSTS_ENUMSPD_Msk                 (0x3UL << DSTS_ENUMSPD_Pos)              // 0x00000006 */
+#define DSTS_ENUMSPD                     DSTS_ENUMSPD_Msk                         // Enumerated speed */
+#define DSTS_ENUMSPD_HS                  0    // Highspeed
+#define DSTS_ENUMSPD_FS_HSPHY            1    // Fullspeed on HS PHY
+#define DSTS_ENUMSPD_LS                  2    // Lowspeed
+#define DSTS_ENUMSPD_FS                  3    // Fullspeed on FS PHY
+
+
+#define DSTS_EERR_Pos                    (3U)
+#define DSTS_EERR_Msk                    (0x1UL << DSTS_EERR_Pos)                 // 0x00000008 */
+#define DSTS_EERR                        DSTS_EERR_Msk                            // Erratic error     */
+#define DSTS_FNSOF_Pos                   (8U)
+#define DSTS_FNSOF_Msk                   (0x3FFFUL << DSTS_FNSOF_Pos)             // 0x003FFF00 */
+#define DSTS_FNSOF                       DSTS_FNSOF_Msk                           // Frame number of the received SOF */
+
+/********************  Bit definition for GAHBCFG register  ********************/
+#define GAHBCFG_GINT_Pos                 (0U)
+#define GAHBCFG_GINT_Msk                 (0x1UL << GAHBCFG_GINT_Pos)              // 0x00000001 */
+#define GAHBCFG_GINT                     GAHBCFG_GINT_Msk                         // Global interrupt mask */
+#define GAHBCFG_HBSTLEN_Pos              (1U)
+#define GAHBCFG_HBSTLEN_Msk              (0xFUL << GAHBCFG_HBSTLEN_Pos)           // 0x0000001E */
+#define GAHBCFG_HBSTLEN                  GAHBCFG_HBSTLEN_Msk                      // Burst length/type */
+#define GAHBCFG_HBSTLEN_0                (0x0UL << GAHBCFG_HBSTLEN_Pos)           // Single */
+#define GAHBCFG_HBSTLEN_1                (0x1UL << GAHBCFG_HBSTLEN_Pos)           // INCR */
+#define GAHBCFG_HBSTLEN_2                (0x3UL << GAHBCFG_HBSTLEN_Pos)           // INCR4 */
+#define GAHBCFG_HBSTLEN_3                (0x5UL << GAHBCFG_HBSTLEN_Pos)           // INCR8 */
+#define GAHBCFG_HBSTLEN_4                (0x7UL << GAHBCFG_HBSTLEN_Pos)           // INCR16 */
+#define GAHBCFG_DMAEN_Pos                (5U)
+#define GAHBCFG_DMAEN_Msk                (0x1UL << GAHBCFG_DMAEN_Pos)             // 0x00000020 */
+#define GAHBCFG_DMAEN                    GAHBCFG_DMAEN_Msk                        // DMA enable */
+#define GAHBCFG_TXFELVL_Pos              (7U)
+#define GAHBCFG_TXFELVL_Msk              (0x1UL << GAHBCFG_TXFELVL_Pos)           // 0x00000080 */
+#define GAHBCFG_TXFELVL                  GAHBCFG_TXFELVL_Msk                      // TxFIFO empty level */
+#define GAHBCFG_PTXFELVL_Pos             (8U)
+#define GAHBCFG_PTXFELVL_Msk             (0x1UL << GAHBCFG_PTXFELVL_Pos)          // 0x00000100 */
+#define GAHBCFG_PTXFELVL                 GAHBCFG_PTXFELVL_Msk                     // Periodic TxFIFO empty level */
+
+#define GSNPSID_ID_MASK                 TU_GENMASK(31, 16)
+
+/********************  Bit definition for GUSBCFG register  ********************/
+#define GUSBCFG_TOCAL_Pos                (0U)
+#define GUSBCFG_TOCAL_Msk                (0x7UL << GUSBCFG_TOCAL_Pos)             // 0x00000007 */
+#define GUSBCFG_TOCAL                    GUSBCFG_TOCAL_Msk                        // FS timeout calibration */
+#define GUSBCFG_PHYIF16_Pos              (3U)
+#define GUSBCFG_PHYIF16_Msk              (0x1UL << GUSBCFG_PHYIF16_Pos)             // 0x00000008 */
+#define GUSBCFG_PHYIF16                  GUSBCFG_PHYIF16_Msk                        // PHY Interface (PHYIf) */
+#define GUSBCFG_ULPI_UTMI_SEL_Pos        (4U)
+#define GUSBCFG_ULPI_UTMI_SEL_Msk        (0x1UL << GUSBCFG_ULPI_UTMI_SEL_Pos)     // 0x00000010 */
+#define GUSBCFG_ULPI_UTMI_SEL            GUSBCFG_ULPI_UTMI_SEL_Msk                // ULPI or UTMI+ Select (ULPI_UTMI_Sel) */
+#define GUSBCFG_PHYSEL_Pos               (6U)
+#define GUSBCFG_PHYSEL_Msk               (0x1UL << GUSBCFG_PHYSEL_Pos)            // 0x00000040 */
+#define GUSBCFG_PHYSEL                   GUSBCFG_PHYSEL_Msk                       // USB 2.0 high-speed ULPI PHY or USB 1.1 full-speed serial transceiver select */
+#define GUSBCFG_DDRSEL                   TU_BIT(7)                                // Single Data Rate (SDR) or Double Data Rate (DDR) or ULPI interface.
+#define GUSBCFG_SRPCAP_Pos               (8U)
+#define GUSBCFG_SRPCAP_Msk               (0x1UL << GUSBCFG_SRPCAP_Pos)            // 0x00000100 */
+#define GUSBCFG_SRPCAP                   GUSBCFG_SRPCAP_Msk                       // SRP-capable */
+#define GUSBCFG_HNPCAP_Pos               (9U)
+#define GUSBCFG_HNPCAP_Msk               (0x1UL << GUSBCFG_HNPCAP_Pos)            // 0x00000200 */
+#define GUSBCFG_HNPCAP                   GUSBCFG_HNPCAP_Msk                       // HNP-capable */
+#define GUSBCFG_TRDT_Pos                 (10U)
+#define GUSBCFG_TRDT_Msk                 (0xFUL << GUSBCFG_TRDT_Pos)              // 0x00003C00 */
+#define GUSBCFG_TRDT                     GUSBCFG_TRDT_Msk                         // USB turnaround time */
+#define GUSBCFG_PHYLPCS_Pos              (15U)
+#define GUSBCFG_PHYLPCS_Msk              (0x1UL << GUSBCFG_PHYLPCS_Pos)           // 0x00008000 */
+#define GUSBCFG_PHYLPCS                  GUSBCFG_PHYLPCS_Msk                      // PHY Low-power clock select */
+#define GUSBCFG_ULPIFSLS_Pos             (17U)
+#define GUSBCFG_ULPIFSLS_Msk             (0x1UL << GUSBCFG_ULPIFSLS_Pos)          // 0x00020000 */
+#define GUSBCFG_ULPIFSLS                 GUSBCFG_ULPIFSLS_Msk                     // ULPI FS/LS select               */
+#define GUSBCFG_ULPIAR_Pos               (18U)
+#define GUSBCFG_ULPIAR_Msk               (0x1UL << GUSBCFG_ULPIAR_Pos)            // 0x00040000 */
+#define GUSBCFG_ULPIAR                   GUSBCFG_ULPIAR_Msk                       // ULPI Auto-resume                */
+#define GUSBCFG_ULPICSM_Pos              (19U)
+#define GUSBCFG_ULPICSM_Msk              (0x1UL << GUSBCFG_ULPICSM_Pos)           // 0x00080000 */
+#define GUSBCFG_ULPICSM                  GUSBCFG_ULPICSM_Msk                      // ULPI Clock SuspendM             */
+#define GUSBCFG_ULPIEVBUSD_Pos           (20U)
+#define GUSBCFG_ULPIEVBUSD_Msk           (0x1UL << GUSBCFG_ULPIEVBUSD_Pos)        // 0x00100000 */
+#define GUSBCFG_ULPIEVBUSD               GUSBCFG_ULPIEVBUSD_Msk                   // ULPI External VBUS Drive        */
+#define GUSBCFG_ULPIEVBUSI_Pos           (21U)
+#define GUSBCFG_ULPIEVBUSI_Msk           (0x1UL << GUSBCFG_ULPIEVBUSI_Pos)        // 0x00200000 */
+#define GUSBCFG_ULPIEVBUSI               GUSBCFG_ULPIEVBUSI_Msk                   // ULPI external VBUS indicator    */
+#define GUSBCFG_TSDPS_Pos                (22U)
+#define GUSBCFG_TSDPS_Msk                (0x1UL << GUSBCFG_TSDPS_Pos)             // 0x00400000 */
+#define GUSBCFG_TSDPS                    GUSBCFG_TSDPS_Msk                        // TermSel DLine pulsing selection */
+#define GUSBCFG_PCCI_Pos                 (23U)
+#define GUSBCFG_PCCI_Msk                 (0x1UL << GUSBCFG_PCCI_Pos)              // 0x00800000 */
+#define GUSBCFG_PCCI                     GUSBCFG_PCCI_Msk                         // Indicator complement            */
+#define GUSBCFG_PTCI_Pos                 (24U)
+#define GUSBCFG_PTCI_Msk                 (0x1UL << GUSBCFG_PTCI_Pos)              // 0x01000000 */
+#define GUSBCFG_PTCI                     GUSBCFG_PTCI_Msk                         // Indicator pass through          */
+#define GUSBCFG_ULPIIPD_Pos              (25U)
+#define GUSBCFG_ULPIIPD_Msk              (0x1UL << GUSBCFG_ULPIIPD_Pos)           // 0x02000000 */
+#define GUSBCFG_ULPIIPD                  GUSBCFG_ULPIIPD_Msk                      // ULPI interface protect disable  */
+#define GUSBCFG_FHMOD_Pos                (29U)
+#define GUSBCFG_FHMOD_Msk                (0x1UL << GUSBCFG_FHMOD_Pos)             // 0x20000000 */
+#define GUSBCFG_FHMOD                    GUSBCFG_FHMOD_Msk                        // Forced host mode                */
+#define GUSBCFG_FDMOD_Pos                (30U)
+#define GUSBCFG_FDMOD_Msk                (0x1UL << GUSBCFG_FDMOD_Pos)             // 0x40000000 */
+#define GUSBCFG_FDMOD                    GUSBCFG_FDMOD_Msk                        // Forced peripheral mode          */
+#define GUSBCFG_CTXPKT_Pos               (31U)
+#define GUSBCFG_CTXPKT_Msk               (0x1UL << GUSBCFG_CTXPKT_Pos)            // 0x80000000 */
+#define GUSBCFG_CTXPKT                   GUSBCFG_CTXPKT_Msk                       // Corrupt Tx packet               */
+
+/********************  Bit definition for GRSTCTL register  ********************/
+#define GRSTCTL_CSRST_Pos                (0U)
+#define GRSTCTL_CSRST_Msk                (0x1UL << GRSTCTL_CSRST_Pos)             // 0x00000001 */
+#define GRSTCTL_CSRST                    GRSTCTL_CSRST_Msk                        // Core soft reset          */
+#define GRSTCTL_HSRST_Pos                (1U)
+#define GRSTCTL_HSRST_Msk                (0x1UL << GRSTCTL_HSRST_Pos)             // 0x00000002 */
+#define GRSTCTL_HSRST                    GRSTCTL_HSRST_Msk                        // HCLK soft reset          */
+#define GRSTCTL_FCRST_Pos                (2U)
+#define GRSTCTL_FCRST_Msk                (0x1UL << GRSTCTL_FCRST_Pos)             // 0x00000004 */
+#define GRSTCTL_FCRST                    GRSTCTL_FCRST_Msk                        // Host frame counter reset */
+#define GRSTCTL_RXFFLSH_Pos              (4U)
+#define GRSTCTL_RXFFLSH_Msk              (0x1UL << GRSTCTL_RXFFLSH_Pos)           // 0x00000010 */
+#define GRSTCTL_RXFFLSH                  GRSTCTL_RXFFLSH_Msk                      // RxFIFO flush             */
+#define GRSTCTL_TXFFLSH_Pos              (5U)
+#define GRSTCTL_TXFFLSH_Msk              (0x1UL << GRSTCTL_TXFFLSH_Pos)           // 0x00000020 */
+#define GRSTCTL_TXFFLSH                  GRSTCTL_TXFFLSH_Msk                      // TxFIFO flush             */
+#define GRSTCTL_TXFNUM_Pos               (6U)
+#define GRSTCTL_TXFNUM_Msk               (0x1FUL << GRSTCTL_TXFNUM_Pos)           // 0x000007C0 */
+#define GRSTCTL_TXFNUM                   GRSTCTL_TXFNUM_Msk                       // TxFIFO number */
+#define GRSTCTL_TXFNUM_0                 (0x01UL << GRSTCTL_TXFNUM_Pos)           // 0x00000040 */
+#define GRSTCTL_TXFNUM_1                 (0x02UL << GRSTCTL_TXFNUM_Pos)           // 0x00000080 */
+#define GRSTCTL_TXFNUM_2                 (0x04UL << GRSTCTL_TXFNUM_Pos)           // 0x00000100 */
+#define GRSTCTL_TXFNUM_3                 (0x08UL << GRSTCTL_TXFNUM_Pos)           // 0x00000200 */
+#define GRSTCTL_TXFNUM_4                 (0x10UL << GRSTCTL_TXFNUM_Pos)           // 0x00000400 */
+#define GRSTCTL_CSFTRST_DONE_Pos       (29)
+#define GRSTCTL_CSFTRST_DONE           (1u << GRSTCTL_CSFTRST_DONE_Pos)         // Reset Done, only available from v4.20a
+#define GRSTCTL_DMAREQ_Pos               (30U)
+#define GRSTCTL_DMAREQ_Msk               (0x1UL << GRSTCTL_DMAREQ_Pos)            // 0x40000000 */
+#define GRSTCTL_DMAREQ                   GRSTCTL_DMAREQ_Msk                       // DMA request signal */
+#define GRSTCTL_AHBIDL_Pos               (31U)
+#define GRSTCTL_AHBIDL_Msk               (0x1UL << GRSTCTL_AHBIDL_Pos)            // 0x80000000 */
+#define GRSTCTL_AHBIDL                   GRSTCTL_AHBIDL_Msk                       // AHB master idle */
+
+/********************  Bit definition for DIEPMSK register  ********************/
+#define DIEPMSK_XFRCM_Pos                (0U)
+#define DIEPMSK_XFRCM_Msk                (0x1UL << DIEPMSK_XFRCM_Pos)             // 0x00000001 */
+#define DIEPMSK_XFRCM                    DIEPMSK_XFRCM_Msk                        // Transfer completed interrupt mask                 */
+#define DIEPMSK_EPDM_Pos                 (1U)
+#define DIEPMSK_EPDM_Msk                 (0x1UL << DIEPMSK_EPDM_Pos)              // 0x00000002 */
+#define DIEPMSK_EPDM                     DIEPMSK_EPDM_Msk                         // Endpoint disabled interrupt mask                  */
+#define DIEPMSK_TOM_Pos                  (3U)
+#define DIEPMSK_TOM_Msk                  (0x1UL << DIEPMSK_TOM_Pos)               // 0x00000008 */
+#define DIEPMSK_TOM                      DIEPMSK_TOM_Msk                          // Timeout condition mask (nonisochronous endpoints) */
+#define DIEPMSK_ITTXFEMSK_Pos            (4U)
+#define DIEPMSK_ITTXFEMSK_Msk            (0x1UL << DIEPMSK_ITTXFEMSK_Pos)         // 0x00000010 */
+#define DIEPMSK_ITTXFEMSK                DIEPMSK_ITTXFEMSK_Msk                    // IN token received when TxFIFO empty mask          */
+#define DIEPMSK_INEPNMM_Pos              (5U)
+#define DIEPMSK_INEPNMM_Msk              (0x1UL << DIEPMSK_INEPNMM_Pos)           // 0x00000020 */
+#define DIEPMSK_INEPNMM                  DIEPMSK_INEPNMM_Msk                      // IN token received with EP mismatch mask           */
+#define DIEPMSK_INEPNEM_Pos              (6U)
+#define DIEPMSK_INEPNEM_Msk              (0x1UL << DIEPMSK_INEPNEM_Pos)           // 0x00000040 */
+#define DIEPMSK_INEPNEM                  DIEPMSK_INEPNEM_Msk                      // IN endpoint NAK effective mask                    */
+#define DIEPMSK_TXFURM_Pos               (8U)
+#define DIEPMSK_TXFURM_Msk               (0x1UL << DIEPMSK_TXFURM_Pos)            // 0x00000100 */
+#define DIEPMSK_TXFURM                   DIEPMSK_TXFURM_Msk                       // FIFO underrun mask                                */
+#define DIEPMSK_BIM_Pos                  (9U)
+#define DIEPMSK_BIM_Msk                  (0x1UL << DIEPMSK_BIM_Pos)               // 0x00000200 */
+#define DIEPMSK_BIM                      DIEPMSK_BIM_Msk                          // BNA interrupt mask                                */
+
+/********************  Bit definition for HPTXSTS register  ********************/
+#define HPTXSTS_PTXFSAVL_Pos             (0U)
+#define HPTXSTS_PTXFSAVL_Msk             (0xFFFFUL << HPTXSTS_PTXFSAVL_Pos)       // 0x0000FFFF */
+#define HPTXSTS_PTXFSAVL                 HPTXSTS_PTXFSAVL_Msk                     // Periodic transmit data FIFO space available     */
+#define HPTXSTS_PTXQSAV_Pos              (16U)
+#define HPTXSTS_PTXQSAV_Msk              (0xFFUL << HPTXSTS_PTXQSAV_Pos)          // 0x00FF0000 */
+#define HPTXSTS_PTXQSAV                  HPTXSTS_PTXQSAV_Msk                      // Periodic transmit request queue space available */
+#define HPTXSTS_PTXQSAV_0                (0x01UL << HPTXSTS_PTXQSAV_Pos)          // 0x00010000 */
+#define HPTXSTS_PTXQSAV_1                (0x02UL << HPTXSTS_PTXQSAV_Pos)          // 0x00020000 */
+#define HPTXSTS_PTXQSAV_2                (0x04UL << HPTXSTS_PTXQSAV_Pos)          // 0x00040000 */
+#define HPTXSTS_PTXQSAV_3                (0x08UL << HPTXSTS_PTXQSAV_Pos)          // 0x00080000 */
+#define HPTXSTS_PTXQSAV_4                (0x10UL << HPTXSTS_PTXQSAV_Pos)          // 0x00100000 */
+#define HPTXSTS_PTXQSAV_5                (0x20UL << HPTXSTS_PTXQSAV_Pos)          // 0x00200000 */
+#define HPTXSTS_PTXQSAV_6                (0x40UL << HPTXSTS_PTXQSAV_Pos)          // 0x00400000 */
+#define HPTXSTS_PTXQSAV_7                (0x80UL << HPTXSTS_PTXQSAV_Pos)          // 0x00800000 */
+
+#define HPTXSTS_PTXQTOP_Pos              (24U)
+#define HPTXSTS_PTXQTOP_Msk              (0xFFUL << HPTXSTS_PTXQTOP_Pos)          // 0xFF000000 */
+#define HPTXSTS_PTXQTOP                  HPTXSTS_PTXQTOP_Msk                      // Top of the periodic transmit request queue */
+#define HPTXSTS_PTXQTOP_0                (0x01UL << HPTXSTS_PTXQTOP_Pos)          // 0x01000000 */
+#define HPTXSTS_PTXQTOP_1                (0x02UL << HPTXSTS_PTXQTOP_Pos)          // 0x02000000 */
+#define HPTXSTS_PTXQTOP_2                (0x04UL << HPTXSTS_PTXQTOP_Pos)          // 0x04000000 */
+#define HPTXSTS_PTXQTOP_3                (0x08UL << HPTXSTS_PTXQTOP_Pos)          // 0x08000000 */
+#define HPTXSTS_PTXQTOP_4                (0x10UL << HPTXSTS_PTXQTOP_Pos)          // 0x10000000 */
+#define HPTXSTS_PTXQTOP_5                (0x20UL << HPTXSTS_PTXQTOP_Pos)          // 0x20000000 */
+#define HPTXSTS_PTXQTOP_6                (0x40UL << HPTXSTS_PTXQTOP_Pos)          // 0x40000000 */
+#define HPTXSTS_PTXQTOP_7                (0x80UL << HPTXSTS_PTXQTOP_Pos)          // 0x80000000 */
+
+/********************  Bit definition for HAINT register  ********************/
+#define HAINT_HAINT_Pos                  (0U)
+#define HAINT_HAINT_Msk                  (0xFFFFUL << HAINT_HAINT_Pos)            // 0x0000FFFF */
+#define HAINT_HAINT                      HAINT_HAINT_Msk                          // Channel interrupts */
+
+/********************  Bit definition for DOEPMSK register  ********************/
+#define DOEPMSK_XFRCM_Pos                (0U)
+#define DOEPMSK_XFRCM_Msk                (0x1UL << DOEPMSK_XFRCM_Pos)             // 0x00000001 */
+#define DOEPMSK_XFRCM                    DOEPMSK_XFRCM_Msk                        // Transfer completed interrupt mask */
+#define DOEPMSK_EPDM_Pos                 (1U)
+#define DOEPMSK_EPDM_Msk                 (0x1UL << DOEPMSK_EPDM_Pos)              // 0x00000002 */
+#define DOEPMSK_EPDM                     DOEPMSK_EPDM_Msk                         // Endpoint disabled interrupt mask               */
+#define DOEPMSK_AHBERRM_Pos              (2U)
+#define DOEPMSK_AHBERRM_Msk              (0x1UL << DOEPMSK_AHBERRM_Pos)           // 0x00000004 */
+#define DOEPMSK_AHBERRM                  DOEPMSK_AHBERRM_Msk                      // OUT transaction AHB Error interrupt mask    */
+#define DOEPMSK_STUPM_Pos                (3U)
+#define DOEPMSK_STUPM_Msk                (0x1UL << DOEPMSK_STUPM_Pos)             // 0x00000008 */
+#define DOEPMSK_STUPM                    DOEPMSK_STUPM_Msk                        // SETUP phase done mask                          */
+#define DOEPMSK_OTEPDM_Pos               (4U)
+#define DOEPMSK_OTEPDM_Msk               (0x1UL << DOEPMSK_OTEPDM_Pos)            // 0x00000010 */
+#define DOEPMSK_OTEPDM                   DOEPMSK_OTEPDM_Msk                       // OUT token received when endpoint disabled mask */
+#define DOEPMSK_OTEPSPRM_Pos             (5U)
+#define DOEPMSK_OTEPSPRM_Msk             (0x1UL << DOEPMSK_OTEPSPRM_Pos)          // 0x00000020 */
+#define DOEPMSK_OTEPSPRM                 DOEPMSK_OTEPSPRM_Msk                     // Status Phase Received mask                     */
+#define DOEPMSK_B2BSTUP_Pos              (6U)
+#define DOEPMSK_B2BSTUP_Msk              (0x1UL << DOEPMSK_B2BSTUP_Pos)           // 0x00000040 */
+#define DOEPMSK_B2BSTUP                  DOEPMSK_B2BSTUP_Msk                      // Back-to-back SETUP packets received mask       */
+#define DOEPMSK_OPEM_Pos                 (8U)
+#define DOEPMSK_OPEM_Msk                 (0x1UL << DOEPMSK_OPEM_Pos)              // 0x00000100 */
+#define DOEPMSK_OPEM                     DOEPMSK_OPEM_Msk                         // OUT packet error mask                          */
+#define DOEPMSK_BOIM_Pos                 (9U)
+#define DOEPMSK_BOIM_Msk                 (0x1UL << DOEPMSK_BOIM_Pos)              // 0x00000200 */
+#define DOEPMSK_BOIM                     DOEPMSK_BOIM_Msk                         // BNA interrupt mask                             */
+#define DOEPMSK_BERRM_Pos                (12U)
+#define DOEPMSK_BERRM_Msk                (0x1UL << DOEPMSK_BERRM_Pos)             // 0x00001000 */
+#define DOEPMSK_BERRM                    DOEPMSK_BERRM_Msk                        // Babble error interrupt mask                   */
+#define DOEPMSK_NAKM_Pos                 (13U)
+#define DOEPMSK_NAKM_Msk                 (0x1UL << DOEPMSK_NAKM_Pos)              // 0x00002000 */
+#define DOEPMSK_NAKM                     DOEPMSK_NAKM_Msk                         // OUT Packet NAK interrupt mask                  */
+#define DOEPMSK_NYETM_Pos                (14U)
+#define DOEPMSK_NYETM_Msk                (0x1UL << DOEPMSK_NYETM_Pos)             // 0x00004000 */
+#define DOEPMSK_NYETM                    DOEPMSK_NYETM_Msk                        // NYET interrupt mask                           */
+
+/********************  Bit definition for GINTSTS register  ********************/
+#define GINTSTS_CMOD_Pos                 (0U)
+#define GINTSTS_CMOD_Msk                 (0x1UL << GINTSTS_CMOD_Pos)              // 0x00000001 */
+#define GINTSTS_CMOD                     GINTSTS_CMOD_Msk                         // Current mode of operation                      */
+#define GINTSTS_MMIS_Pos                 (1U)
+#define GINTSTS_MMIS_Msk                 (0x1UL << GINTSTS_MMIS_Pos)              // 0x00000002 */
+#define GINTSTS_MMIS                     GINTSTS_MMIS_Msk                         // Mode mismatch interrupt                        */
+#define GINTSTS_OTGINT_Pos               (2U)
+#define GINTSTS_OTGINT_Msk               (0x1UL << GINTSTS_OTGINT_Pos)            // 0x00000004 */
+#define GINTSTS_OTGINT                   GINTSTS_OTGINT_Msk                       // OTG interrupt                                  */
+#define GINTSTS_SOF_Pos                  (3U)
+#define GINTSTS_SOF_Msk                  (0x1UL << GINTSTS_SOF_Pos)               // 0x00000008 */
+#define GINTSTS_SOF                      GINTSTS_SOF_Msk                          // Start of frame                                 */
+#define GINTSTS_RXFLVL_Pos               (4U)
+#define GINTSTS_RXFLVL_Msk               (0x1UL << GINTSTS_RXFLVL_Pos)            // 0x00000010 */
+#define GINTSTS_RXFLVL                   GINTSTS_RXFLVL_Msk                       // RxFIFO nonempty                                */
+#define GINTSTS_NPTXFE_Pos               (5U)
+#define GINTSTS_NPTXFE_Msk               (0x1UL << GINTSTS_NPTXFE_Pos)            // 0x00000020 */
+#define GINTSTS_NPTXFE                   GINTSTS_NPTXFE_Msk                       // Nonperiodic TxFIFO empty                       */
+#define GINTSTS_GINAKEFF_Pos             (6U)
+#define GINTSTS_GINAKEFF_Msk             (0x1UL << GINTSTS_GINAKEFF_Pos)          // 0x00000040 */
+#define GINTSTS_GINAKEFF                 GINTSTS_GINAKEFF_Msk                     // Global IN nonperiodic NAK effective            */
+#define GINTSTS_BOUTNAKEFF_Pos           (7U)
+#define GINTSTS_BOUTNAKEFF_Msk           (0x1UL << GINTSTS_BOUTNAKEFF_Pos)        // 0x00000080 */
+#define GINTSTS_BOUTNAKEFF               GINTSTS_BOUTNAKEFF_Msk                   // Global OUT NAK effective                       */
+#define GINTSTS_ESUSP_Pos                (10U)
+#define GINTSTS_ESUSP_Msk                (0x1UL << GINTSTS_ESUSP_Pos)             // 0x00000400 */
+#define GINTSTS_ESUSP                    GINTSTS_ESUSP_Msk                        // Early suspend                                  */
+#define GINTSTS_USBSUSP_Pos              (11U)
+#define GINTSTS_USBSUSP_Msk              (0x1UL << GINTSTS_USBSUSP_Pos)           // 0x00000800 */
+#define GINTSTS_USBSUSP                  GINTSTS_USBSUSP_Msk                      // USB suspend                                    */
+#define GINTSTS_USBRST_Pos               (12U)
+#define GINTSTS_USBRST_Msk               (0x1UL << GINTSTS_USBRST_Pos)            // 0x00001000 */
+#define GINTSTS_USBRST                   GINTSTS_USBRST_Msk                       // USB reset                                      */
+#define GINTSTS_ENUMDNE_Pos              (13U)
+#define GINTSTS_ENUMDNE_Msk              (0x1UL << GINTSTS_ENUMDNE_Pos)           // 0x00002000 */
+#define GINTSTS_ENUMDNE                  GINTSTS_ENUMDNE_Msk                      // Enumeration done                               */
+#define GINTSTS_ISOODRP_Pos              (14U)
+#define GINTSTS_ISOODRP_Msk              (0x1UL << GINTSTS_ISOODRP_Pos)           // 0x00004000 */
+#define GINTSTS_ISOODRP                  GINTSTS_ISOODRP_Msk                      // Isochronous OUT packet dropped interrupt       */
+#define GINTSTS_EOPF_Pos                 (15U)
+#define GINTSTS_EOPF_Msk                 (0x1UL << GINTSTS_EOPF_Pos)              // 0x00008000 */
+#define GINTSTS_EOPF                     GINTSTS_EOPF_Msk                         // End of periodic frame interrupt                */
+#define GINTSTS_IEPINT_Pos               (18U)
+#define GINTSTS_IEPINT_Msk               (0x1UL << GINTSTS_IEPINT_Pos)            // 0x00040000 */
+#define GINTSTS_IEPINT                   GINTSTS_IEPINT_Msk                       // IN endpoint interrupt                          */
+#define GINTSTS_OEPINT_Pos               (19U)
+#define GINTSTS_OEPINT_Msk               (0x1UL << GINTSTS_OEPINT_Pos)            // 0x00080000 */
+#define GINTSTS_OEPINT                   GINTSTS_OEPINT_Msk                       // OUT endpoint interrupt                         */
+#define GINTSTS_IISOIXFR_Pos             (20U)
+#define GINTSTS_IISOIXFR_Msk             (0x1UL << GINTSTS_IISOIXFR_Pos)          // 0x00100000 */
+#define GINTSTS_IISOIXFR                 GINTSTS_IISOIXFR_Msk                     // Incomplete isochronous IN transfer             */
+#define GINTSTS_PXFR_INCOMPISOOUT_Pos    (21U)
+#define GINTSTS_PXFR_INCOMPISOOUT_Msk    (0x1UL << GINTSTS_PXFR_INCOMPISOOUT_Pos) // 0x00200000 */
+#define GINTSTS_PXFR_INCOMPISOOUT        GINTSTS_PXFR_INCOMPISOOUT_Msk            // Incomplete periodic transfer                   */
+#define GINTSTS_DATAFSUSP_Pos            (22U)
+#define GINTSTS_DATAFSUSP_Msk            (0x1UL << GINTSTS_DATAFSUSP_Pos)         // 0x00400000 */
+#define GINTSTS_DATAFSUSP                GINTSTS_DATAFSUSP_Msk                    // Data fetch suspended                           */
+#define GINTSTS_RSTDET_Pos               (23U)
+#define GINTSTS_RSTDET_Msk               (0x1UL << GINTSTS_RSTDET_Pos)            // 0x00800000 */
+#define GINTSTS_RSTDET                   GINTSTS_RSTDET_Msk                       // Reset detected interrupt                       */
+#define GINTSTS_HPRTINT_Pos              (24U)
+#define GINTSTS_HPRTINT_Msk              (0x1UL << GINTSTS_HPRTINT_Pos)           // 0x01000000 */
+#define GINTSTS_HPRTINT                  GINTSTS_HPRTINT_Msk                      // Host port interrupt                            */
+#define GINTSTS_HCINT_Pos                (25U)
+#define GINTSTS_HCINT_Msk                (0x1UL << GINTSTS_HCINT_Pos)             // 0x02000000 */
+#define GINTSTS_HCINT                    GINTSTS_HCINT_Msk                        // Host channels interrupt                        */
+#define GINTSTS_PTXFE_Pos                (26U)
+#define GINTSTS_PTXFE_Msk                (0x1UL << GINTSTS_PTXFE_Pos)             // 0x04000000 */
+#define GINTSTS_PTXFE                    GINTSTS_PTXFE_Msk                        // Periodic TxFIFO empty                          */
+#define GINTSTS_LPMINT_Pos               (27U)
+#define GINTSTS_LPMINT_Msk               (0x1UL << GINTSTS_LPMINT_Pos)            // 0x08000000 */
+#define GINTSTS_LPMINT                   GINTSTS_LPMINT_Msk                       // LPM interrupt                                  */
+#define GINTSTS_CIDSCHG_Pos              (28U)
+#define GINTSTS_CIDSCHG_Msk              (0x1UL << GINTSTS_CIDSCHG_Pos)           // 0x10000000 */
+#define GINTSTS_CIDSCHG                  GINTSTS_CIDSCHG_Msk                      // Connector ID status change                     */
+#define GINTSTS_DISCINT_Pos              (29U)
+#define GINTSTS_DISCINT_Msk              (0x1UL << GINTSTS_DISCINT_Pos)           // 0x20000000 */
+#define GINTSTS_DISCINT                  GINTSTS_DISCINT_Msk                      // Disconnect detected interrupt                  */
+#define GINTSTS_SRQINT_Pos               (30U)
+#define GINTSTS_SRQINT_Msk               (0x1UL << GINTSTS_SRQINT_Pos)            // 0x40000000 */
+#define GINTSTS_SRQINT                   GINTSTS_SRQINT_Msk                       // Session request/new session detected interrupt */
+#define GINTSTS_WKUINT_Pos               (31U)
+#define GINTSTS_WKUINT_Msk               (0x1UL << GINTSTS_WKUINT_Pos)            // 0x80000000 */
+#define GINTSTS_WKUINT                   GINTSTS_WKUINT_Msk                       // Resume/remote wakeup detected interrupt        */
+
+/********************  Bit definition for GINTMSK register  ********************/
+#define GINTMSK_MMISM_Pos                (1U)
+#define GINTMSK_MMISM_Msk                (0x1UL << GINTMSK_MMISM_Pos)             // 0x00000002 */
+#define GINTMSK_MMISM                    GINTMSK_MMISM_Msk                        // Mode mismatch interrupt mask                        */
+#define GINTMSK_OTGINT_Pos               (2U)
+#define GINTMSK_OTGINT_Msk               (0x1UL << GINTMSK_OTGINT_Pos)            // 0x00000004 */
+#define GINTMSK_OTGINT                   GINTMSK_OTGINT_Msk                       // OTG interrupt mask                                  */
+#define GINTMSK_SOFM_Pos                 (3U)
+#define GINTMSK_SOFM_Msk                 (0x1UL << GINTMSK_SOFM_Pos)              // 0x00000008 */
+#define GINTMSK_SOFM                     GINTMSK_SOFM_Msk                         // Start of frame mask                                 */
+#define GINTMSK_RXFLVLM_Pos              (4U)
+#define GINTMSK_RXFLVLM_Msk              (0x1UL << GINTMSK_RXFLVLM_Pos)           // 0x00000010 */
+#define GINTMSK_RXFLVLM                  GINTMSK_RXFLVLM_Msk                      // Receive FIFO nonempty mask                          */
+#define GINTMSK_NPTXFEM_Pos              (5U)
+#define GINTMSK_NPTXFEM_Msk              (0x1UL << GINTMSK_NPTXFEM_Pos)           // 0x00000020 */
+#define GINTMSK_NPTXFEM                  GINTMSK_NPTXFEM_Msk                      // Nonperiodic TxFIFO empty mask                       */
+#define GINTMSK_GINAKEFFM_Pos            (6U)
+#define GINTMSK_GINAKEFFM_Msk            (0x1UL << GINTMSK_GINAKEFFM_Pos)         // 0x00000040 */
+#define GINTMSK_GINAKEFFM                GINTMSK_GINAKEFFM_Msk                    // Global nonperiodic IN NAK effective mask            */
+#define GINTMSK_GONAKEFFM_Pos            (7U)
+#define GINTMSK_GONAKEFFM_Msk            (0x1UL << GINTMSK_GONAKEFFM_Pos)         // 0x00000080 */
+#define GINTMSK_GONAKEFFM                GINTMSK_GONAKEFFM_Msk                    // Global OUT NAK effective mask                       */
+#define GINTMSK_ESUSPM_Pos               (10U)
+#define GINTMSK_ESUSPM_Msk               (0x1UL << GINTMSK_ESUSPM_Pos)            // 0x00000400 */
+#define GINTMSK_ESUSPM                   GINTMSK_ESUSPM_Msk                       // Early suspend mask                                  */
+#define GINTMSK_USBSUSPM_Pos             (11U)
+#define GINTMSK_USBSUSPM_Msk             (0x1UL << GINTMSK_USBSUSPM_Pos)          // 0x00000800 */
+#define GINTMSK_USBSUSPM                 GINTMSK_USBSUSPM_Msk                     // USB suspend mask                                    */
+#define GINTMSK_USBRST_Pos               (12U)
+#define GINTMSK_USBRST_Msk               (0x1UL << GINTMSK_USBRST_Pos)            // 0x00001000 */
+#define GINTMSK_USBRST                   GINTMSK_USBRST_Msk                       // USB reset mask                                      */
+#define GINTMSK_ENUMDNEM_Pos             (13U)
+#define GINTMSK_ENUMDNEM_Msk             (0x1UL << GINTMSK_ENUMDNEM_Pos)          // 0x00002000 */
+#define GINTMSK_ENUMDNEM                 GINTMSK_ENUMDNEM_Msk                     // Enumeration done mask                               */
+#define GINTMSK_ISOODRPM_Pos             (14U)
+#define GINTMSK_ISOODRPM_Msk             (0x1UL << GINTMSK_ISOODRPM_Pos)          // 0x00004000 */
+#define GINTMSK_ISOODRPM                 GINTMSK_ISOODRPM_Msk                     // Isochronous OUT packet dropped interrupt mask       */
+#define GINTMSK_EOPFM_Pos                (15U)
+#define GINTMSK_EOPFM_Msk                (0x1UL << GINTMSK_EOPFM_Pos)             // 0x00008000 */
+#define GINTMSK_EOPFM                    GINTMSK_EOPFM_Msk                        // End of periodic frame interrupt mask                */
+#define GINTMSK_EPMISM_Pos               (17U)
+#define GINTMSK_EPMISM_Msk               (0x1UL << GINTMSK_EPMISM_Pos)            // 0x00020000 */
+#define GINTMSK_EPMISM                   GINTMSK_EPMISM_Msk                       // Endpoint mismatch interrupt mask                    */
+#define GINTMSK_IEPINT_Pos               (18U)
+#define GINTMSK_IEPINT_Msk               (0x1UL << GINTMSK_IEPINT_Pos)            // 0x00040000 */
+#define GINTMSK_IEPINT                   GINTMSK_IEPINT_Msk                       // IN endpoints interrupt mask                         */
+#define GINTMSK_OEPINT_Pos               (19U)
+#define GINTMSK_OEPINT_Msk               (0x1UL << GINTMSK_OEPINT_Pos)            // 0x00080000 */
+#define GINTMSK_OEPINT                   GINTMSK_OEPINT_Msk                       // OUT endpoints interrupt mask                        */
+#define GINTMSK_IISOIXFRM_Pos            (20U)
+#define GINTMSK_IISOIXFRM_Msk            (0x1UL << GINTMSK_IISOIXFRM_Pos)         // 0x00100000 */
+#define GINTMSK_IISOIXFRM                GINTMSK_IISOIXFRM_Msk                    // Incomplete isochronous IN transfer mask             */
+#define GINTMSK_PXFRM_IISOOXFRM_Pos      (21U)
+#define GINTMSK_PXFRM_IISOOXFRM_Msk      (0x1UL << GINTMSK_PXFRM_IISOOXFRM_Pos)   // 0x00200000 */
+#define GINTMSK_PXFRM_IISOOXFRM          GINTMSK_PXFRM_IISOOXFRM_Msk              // Incomplete periodic transfer mask                   */
+#define GINTMSK_FSUSPM_Pos               (22U)
+#define GINTMSK_FSUSPM_Msk               (0x1UL << GINTMSK_FSUSPM_Pos)            // 0x00400000 */
+#define GINTMSK_FSUSPM                   GINTMSK_FSUSPM_Msk                       // Data fetch suspended mask                           */
+#define GINTMSK_RSTDEM_Pos               (23U)
+#define GINTMSK_RSTDEM_Msk               (0x1UL << GINTMSK_RSTDEM_Pos)            // 0x00800000 */
+#define GINTMSK_RSTDEM                   GINTMSK_RSTDEM_Msk                       // Reset detected interrupt mask                       */
+#define GINTMSK_PRTIM_Pos                (24U)
+#define GINTMSK_PRTIM_Msk                (0x1UL << GINTMSK_PRTIM_Pos)             // 0x01000000 */
+#define GINTMSK_PRTIM                    GINTMSK_PRTIM_Msk                        // Host port interrupt mask                            */
+#define GINTMSK_HCIM_Pos                 (25U)
+#define GINTMSK_HCIM_Msk                 (0x1UL << GINTMSK_HCIM_Pos)              // 0x02000000 */
+#define GINTMSK_HCIM                     GINTMSK_HCIM_Msk                         // Host channels interrupt mask                        */
+#define GINTMSK_PTXFEM_Pos               (26U)
+#define GINTMSK_PTXFEM_Msk               (0x1UL << GINTMSK_PTXFEM_Pos)            // 0x04000000 */
+#define GINTMSK_PTXFEM                   GINTMSK_PTXFEM_Msk                       // Periodic TxFIFO empty mask                          */
+#define GINTMSK_LPMINTM_Pos              (27U)
+#define GINTMSK_LPMINTM_Msk              (0x1UL << GINTMSK_LPMINTM_Pos)           // 0x08000000 */
+#define GINTMSK_LPMINTM                  GINTMSK_LPMINTM_Msk                      // LPM interrupt Mask                                  */
+#define GINTMSK_CIDSCHGM_Pos             (28U)
+#define GINTMSK_CIDSCHGM_Msk             (0x1UL << GINTMSK_CIDSCHGM_Pos)          // 0x10000000 */
+#define GINTMSK_CIDSCHGM                 GINTMSK_CIDSCHGM_Msk                     // Connector ID status change mask                     */
+#define GINTMSK_DISCINT_Pos              (29U)
+#define GINTMSK_DISCINT_Msk              (0x1UL << GINTMSK_DISCINT_Pos)           // 0x20000000 */
+#define GINTMSK_DISCINT                  GINTMSK_DISCINT_Msk                      // Disconnect detected interrupt mask                  */
+#define GINTMSK_SRQIM_Pos                (30U)
+#define GINTMSK_SRQIM_Msk                (0x1UL << GINTMSK_SRQIM_Pos)             // 0x40000000 */
+#define GINTMSK_SRQIM                    GINTMSK_SRQIM_Msk                        // Session request/new session detected interrupt mask */
+#define GINTMSK_WUIM_Pos                 (31U)
+#define GINTMSK_WUIM_Msk                 (0x1UL << GINTMSK_WUIM_Pos)              // 0x80000000 */
+#define GINTMSK_WUIM                     GINTMSK_WUIM_Msk                         // Resume/remote wakeup detected interrupt mask        */
+
+/********************  Bit definition for DAINT register  ********************/
+#define DAINT_IEPINT_Pos                 (0U)
+#define DAINT_IEPINT_Msk                 (0xFFFFUL << DAINT_IEPINT_Pos)           // 0x0000FFFF */
+#define DAINT_IEPINT                     DAINT_IEPINT_Msk                         // IN endpoint interrupt bits  */
+#define DAINT_OEPINT_Pos                 (16U)
+#define DAINT_OEPINT_Msk                 (0xFFFFUL << DAINT_OEPINT_Pos)           // 0xFFFF0000 */
+#define DAINT_OEPINT                     DAINT_OEPINT_Msk                         // OUT endpoint interrupt bits */
+
+/********************  Bit definition for HAINTMSK register  ********************/
+#define HAINTMSK_HAINTM_Pos              (0U)
+#define HAINTMSK_HAINTM_Msk              (0xFFFFUL << HAINTMSK_HAINTM_Pos)        // 0x0000FFFF */
+#define HAINTMSK_HAINTM                  HAINTMSK_HAINTM_Msk                      // Channel interrupt mask */
+
+/********************  Bit definition for GRXSTSP register  ********************/
+#define GRXSTSP_EPNUM_Pos                (0U)
+#define GRXSTSP_EPNUM_Msk                (0xFUL << GRXSTSP_EPNUM_Pos)             // 0x0000000F */
+#define GRXSTSP_EPNUM                    GRXSTSP_EPNUM_Msk                        // IN EP interrupt mask bits  */
+#define GRXSTSP_BCNT_Pos                 (4U)
+#define GRXSTSP_BCNT_Msk                 (0x7FFUL << GRXSTSP_BCNT_Pos)            // 0x00007FF0 */
+#define GRXSTSP_BCNT                     GRXSTSP_BCNT_Msk                         // OUT EP interrupt mask bits */
+#define GRXSTSP_DPID_Pos                 (15U)
+#define GRXSTSP_DPID_Msk                 (0x3UL << GRXSTSP_DPID_Pos)              // 0x00018000 */
+#define GRXSTSP_DPID                     GRXSTSP_DPID_Msk                         // OUT EP interrupt mask bits */
+#define GRXSTSP_PKTSTS_Pos               (17U)
+#define GRXSTSP_PKTSTS_Msk               (0xFUL << GRXSTSP_PKTSTS_Pos)            // 0x001E0000 */
+#define GRXSTSP_PKTSTS                   GRXSTSP_PKTSTS_Msk                       // OUT EP interrupt mask bits */
+
+#define GRXSTS_PKTSTS_GLOBALOUTNAK       1
+#define GRXSTS_PKTSTS_OUTRX              2
+#define GRXSTS_PKTSTS_HCHIN              2
+#define GRXSTS_PKTSTS_OUTDONE            3
+#define GRXSTS_PKTSTS_HCHIN_XFER_COMP    3
+#define GRXSTS_PKTSTS_SETUPDONE          4
+#define GRXSTS_PKTSTS_DATATOGGLEERR      5
+#define GRXSTS_PKTSTS_SETUPRX            6
+#define GRXSTS_PKTSTS_HCHHALTED          7
+
+
+/********************  Bit definition for DAINTMSK register  ********************/
+#define DAINTMSK_IEPM_Pos                (0U)
+#define DAINTMSK_IEPM_Msk                (0xFFFFUL << DAINTMSK_IEPM_Pos)          // 0x0000FFFF */
+#define DAINTMSK_IEPM                    DAINTMSK_IEPM_Msk                        // IN EP interrupt mask bits */
+#define DAINTMSK_OEPM_Pos                (16U)
+#define DAINTMSK_OEPM_Msk                (0xFFFFUL << DAINTMSK_OEPM_Pos)          // 0xFFFF0000 */
+#define DAINTMSK_OEPM                    DAINTMSK_OEPM_Msk                        // OUT EP interrupt mask bits */
+
+#if 0
+/********************  Bit definition for OTG register  ********************/
+#define CHNUM_Pos                        (0U)
+#define CHNUM_Msk                        (0xFUL << CHNUM_Pos)                     // 0x0000000F */
+#define CHNUM                            CHNUM_Msk                                // Channel number */
+#define CHNUM_0                          (0x1UL << CHNUM_Pos)                     // 0x00000001 */
+#define CHNUM_1                          (0x2UL << CHNUM_Pos)                     // 0x00000002 */
+#define CHNUM_2                          (0x4UL << CHNUM_Pos)                     // 0x00000004 */
+#define CHNUM_3                          (0x8UL << CHNUM_Pos)                     // 0x00000008 */
+#define BCNT_Pos                         (4U)
+#define BCNT_Msk                         (0x7FFUL << BCNT_Pos)                    // 0x00007FF0 */
+#define BCNT                             BCNT_Msk                                 // Byte count */
+
+#define DPID_Pos                         (15U)
+#define DPID_Msk                         (0x3UL << DPID_Pos)                      // 0x00018000 */
+#define DPID                             DPID_Msk                                 // Data PID */
+#define DPID_0                           (0x1UL << DPID_Pos)                      // 0x00008000 */
+#define DPID_1                           (0x2UL << DPID_Pos)                      // 0x00010000 */
+
+#define PKTSTS_Pos                       (17U)
+#define PKTSTS_Msk                       (0xFUL << PKTSTS_Pos)                    // 0x001E0000 */
+#define PKTSTS                           PKTSTS_Msk                               // Packet status */
+#define PKTSTS_0                         (0x1UL << PKTSTS_Pos)                    // 0x00020000 */
+#define PKTSTS_1                         (0x2UL << PKTSTS_Pos)                    // 0x00040000 */
+#define PKTSTS_2                         (0x4UL << PKTSTS_Pos)                    // 0x00080000 */
+#define PKTSTS_3                         (0x8UL << PKTSTS_Pos)                    // 0x00100000 */
+
+#define EPNUM_Pos                        (0U)
+#define EPNUM_Msk                        (0xFUL << EPNUM_Pos)                     // 0x0000000F */
+#define EPNUM                            EPNUM_Msk                                // Endpoint number */
+#define EPNUM_0                          (0x1UL << EPNUM_Pos)                     // 0x00000001 */
+#define EPNUM_1                          (0x2UL << EPNUM_Pos)                     // 0x00000002 */
+#define EPNUM_2                          (0x4UL << EPNUM_Pos)                     // 0x00000004 */
+#define EPNUM_3                          (0x8UL << EPNUM_Pos)                     // 0x00000008 */
+
+#define FRMNUM_Pos                       (21U)
+#define FRMNUM_Msk                       (0xFUL << FRMNUM_Pos)                    // 0x01E00000 */
+#define FRMNUM                           FRMNUM_Msk                               // Frame number */
+#define FRMNUM_0                         (0x1UL << FRMNUM_Pos)                    // 0x00200000 */
+#define FRMNUM_1                         (0x2UL << FRMNUM_Pos)                    // 0x00400000 */
+#define FRMNUM_2                         (0x4UL << FRMNUM_Pos)                    // 0x00800000 */
+#define FRMNUM_3                         (0x8UL << FRMNUM_Pos)                    // 0x01000000 */
+#endif
+
+/********************  Bit definition for GRXFSIZ register  ********************/
+#define GRXFSIZ_RXFD_Pos                 (0U)
+#define GRXFSIZ_RXFD_Msk                 (0xFFFFUL << GRXFSIZ_RXFD_Pos)           // 0x0000FFFF */
+#define GRXFSIZ_RXFD                     GRXFSIZ_RXFD_Msk                         // RxFIFO depth */
+
+/********************  Bit definition for DVBUSDIS register  ********************/
+#define DVBUSDIS_VBUSDT_Pos              (0U)
+#define DVBUSDIS_VBUSDT_Msk              (0xFFFFUL << DVBUSDIS_VBUSDT_Pos)        // 0x0000FFFF */
+#define DVBUSDIS_VBUSDT                  DVBUSDIS_VBUSDT_Msk                      // Device VBUS discharge time */
+
+/********************  Bit definition for OTG register  ********************/
+#define GNPTXFSIZ_NPTXFSA_Pos            (0U)
+#define GNPTXFSIZ_NPTXFSA_Msk            (0xFFFFUL << GNPTXFSIZ_NPTXFSA_Pos)                // 0x0000FFFF */
+#define GNPTXFSIZ_NPTXFSA                GNPTXFSIZ_NPTXFSA_Msk                    // Nonperiodic transmit RAM start address */
+#define GNPTXFSIZ_NPTXFD_Pos             (16U)
+#define GNPTXFSIZ_NPTXFD_Msk             (0xFFFFUL << GNPTXFSIZ_NPTXFD_Pos)                 // 0xFFFF0000 */
+#define GNPTXFSIZ_NPTXFD                 GNPTXFSIZ_NPTXFD_Msk                     // Nonperiodic TxFIFO depth               */
+#define DIEPTXF0_TX0FSA_Pos              (0U)
+#define DIEPTXF0_TX0FSA_Msk              (0xFFFFUL << DIEPTXF0_TX0FSA_Pos)                 // 0x0000FFFF */
+#define DIEPTXF0_TX0FSA                  DIEPTXF0_TX0FSA_Msk                      // Endpoint 0 transmit RAM start address  */
+#define DIEPTXF0_TX0FD_Pos               (16U)
+#define DIEPTXF0_TX0FD_Msk               (0xFFFFUL << DIEPTXF0_TX0FD_Pos)                  // 0xFFFF0000 */
+#define DIEPTXF0_TX0FD                   DIEPTXF0_TX0FD_Msk                       // Endpoint 0 TxFIFO depth                */
+
+/********************  Bit definition for DVBUSPULSE register  ********************/
+#define DVBUSPULSE_DVBUSP_Pos            (0U)
+#define DVBUSPULSE_DVBUSP_Msk            (0xFFFUL << DVBUSPULSE_DVBUSP_Pos)       // 0x00000FFF */
+#define DVBUSPULSE_DVBUSP                DVBUSPULSE_DVBUSP_Msk                    // Device VBUS pulsing time */
+
+/********************  Bit definition for GNPTXSTS register  ********************/
+#define GNPTXSTS_NPTXFSAV_Pos            (0U)
+#define GNPTXSTS_NPTXFSAV_Msk            (0xFFFFUL << GNPTXSTS_NPTXFSAV_Pos)      // 0x0000FFFF */
+#define GNPTXSTS_NPTXFSAV                GNPTXSTS_NPTXFSAV_Msk                    // Nonperiodic TxFIFO space available */
+
+#define GNPTXSTS_NPTQXSAV_Pos            (16U)
+#define GNPTXSTS_NPTQXSAV_Msk            (0xFFUL << GNPTXSTS_NPTQXSAV_Pos)        // 0x00FF0000 */
+#define GNPTXSTS_NPTQXSAV                GNPTXSTS_NPTQXSAV_Msk                    // Nonperiodic transmit request queue space available */
+#define GNPTXSTS_NPTQXSAV_0              (0x01UL << GNPTXSTS_NPTQXSAV_Pos)        // 0x00010000 */
+#define GNPTXSTS_NPTQXSAV_1              (0x02UL << GNPTXSTS_NPTQXSAV_Pos)        // 0x00020000 */
+#define GNPTXSTS_NPTQXSAV_2              (0x04UL << GNPTXSTS_NPTQXSAV_Pos)        // 0x00040000 */
+#define GNPTXSTS_NPTQXSAV_3              (0x08UL << GNPTXSTS_NPTQXSAV_Pos)        // 0x00080000 */
+#define GNPTXSTS_NPTQXSAV_4              (0x10UL << GNPTXSTS_NPTQXSAV_Pos)        // 0x00100000 */
+#define GNPTXSTS_NPTQXSAV_5              (0x20UL << GNPTXSTS_NPTQXSAV_Pos)        // 0x00200000 */
+#define GNPTXSTS_NPTQXSAV_6              (0x40UL << GNPTXSTS_NPTQXSAV_Pos)        // 0x00400000 */
+#define GNPTXSTS_NPTQXSAV_7              (0x80UL << GNPTXSTS_NPTQXSAV_Pos)        // 0x00800000 */
+
+#define GNPTXSTS_NPTXQTOP_Pos            (24U)
+#define GNPTXSTS_NPTXQTOP_Msk            (0x7FUL << GNPTXSTS_NPTXQTOP_Pos)        // 0x7F000000 */
+#define GNPTXSTS_NPTXQTOP                GNPTXSTS_NPTXQTOP_Msk                    // Top of the nonperiodic transmit request queue */
+#define GNPTXSTS_NPTXQTOP_0              (0x01UL << GNPTXSTS_NPTXQTOP_Pos)        // 0x01000000 */
+#define GNPTXSTS_NPTXQTOP_1              (0x02UL << GNPTXSTS_NPTXQTOP_Pos)        // 0x02000000 */
+#define GNPTXSTS_NPTXQTOP_2              (0x04UL << GNPTXSTS_NPTXQTOP_Pos)        // 0x04000000 */
+#define GNPTXSTS_NPTXQTOP_3              (0x08UL << GNPTXSTS_NPTXQTOP_Pos)        // 0x08000000 */
+#define GNPTXSTS_NPTXQTOP_4              (0x10UL << GNPTXSTS_NPTXQTOP_Pos)        // 0x10000000 */
+#define GNPTXSTS_NPTXQTOP_5              (0x20UL << GNPTXSTS_NPTXQTOP_Pos)        // 0x20000000 */
+#define GNPTXSTS_NPTXQTOP_6              (0x40UL << GNPTXSTS_NPTXQTOP_Pos)        // 0x40000000 */
+
+/********************  Bit definition for DTHRCTL register  ********************/
+#define DTHRCTL_NONISOTHREN_Pos          (0U)
+#define DTHRCTL_NONISOTHREN_Msk          (0x1UL << DTHRCTL_NONISOTHREN_Pos)       // 0x00000001 */
+#define DTHRCTL_NONISOTHREN              DTHRCTL_NONISOTHREN_Msk                  // Nonisochronous IN endpoints threshold enable */
+#define DTHRCTL_ISOTHREN_Pos             (1U)
+#define DTHRCTL_ISOTHREN_Msk             (0x1UL << DTHRCTL_ISOTHREN_Pos)          // 0x00000002 */
+#define DTHRCTL_ISOTHREN                 DTHRCTL_ISOTHREN_Msk                     // ISO IN endpoint threshold enable */
+
+#define DTHRCTL_TXTHRLEN_Pos             (2U)
+#define DTHRCTL_TXTHRLEN_Msk             (0x1FFUL << DTHRCTL_TXTHRLEN_Pos)        // 0x000007FC */
+#define DTHRCTL_TXTHRLEN                 DTHRCTL_TXTHRLEN_Msk                     // Transmit threshold length */
+#define DTHRCTL_TXTHRLEN_0               (0x001UL << DTHRCTL_TXTHRLEN_Pos)        // 0x00000004 */
+#define DTHRCTL_TXTHRLEN_1               (0x002UL << DTHRCTL_TXTHRLEN_Pos)        // 0x00000008 */
+#define DTHRCTL_TXTHRLEN_2               (0x004UL << DTHRCTL_TXTHRLEN_Pos)        // 0x00000010 */
+#define DTHRCTL_TXTHRLEN_3               (0x008UL << DTHRCTL_TXTHRLEN_Pos)        // 0x00000020 */
+#define DTHRCTL_TXTHRLEN_4               (0x010UL << DTHRCTL_TXTHRLEN_Pos)        // 0x00000040 */
+#define DTHRCTL_TXTHRLEN_5               (0x020UL << DTHRCTL_TXTHRLEN_Pos)        // 0x00000080 */
+#define DTHRCTL_TXTHRLEN_6               (0x040UL << DTHRCTL_TXTHRLEN_Pos)        // 0x00000100 */
+#define DTHRCTL_TXTHRLEN_7               (0x080UL << DTHRCTL_TXTHRLEN_Pos)        // 0x00000200 */
+#define DTHRCTL_TXTHRLEN_8               (0x100UL << DTHRCTL_TXTHRLEN_Pos)        // 0x00000400 */
+#define DTHRCTL_RXTHREN_Pos              (16U)
+#define DTHRCTL_RXTHREN_Msk              (0x1UL << DTHRCTL_RXTHREN_Pos)           // 0x00010000 */
+#define DTHRCTL_RXTHREN                  DTHRCTL_RXTHREN_Msk                      // Receive threshold enable */
+
+#define DTHRCTL_RXTHRLEN_Pos             (17U)
+#define DTHRCTL_RXTHRLEN_Msk             (0x1FFUL << DTHRCTL_RXTHRLEN_Pos)        // 0x03FE0000 */
+#define DTHRCTL_RXTHRLEN                 DTHRCTL_RXTHRLEN_Msk                     // Receive threshold length */
+#define DTHRCTL_RXTHRLEN_0               (0x001UL << DTHRCTL_RXTHRLEN_Pos)        // 0x00020000 */
+#define DTHRCTL_RXTHRLEN_1               (0x002UL << DTHRCTL_RXTHRLEN_Pos)        // 0x00040000 */
+#define DTHRCTL_RXTHRLEN_2               (0x004UL << DTHRCTL_RXTHRLEN_Pos)        // 0x00080000 */
+#define DTHRCTL_RXTHRLEN_3               (0x008UL << DTHRCTL_RXTHRLEN_Pos)        // 0x00100000 */
+#define DTHRCTL_RXTHRLEN_4               (0x010UL << DTHRCTL_RXTHRLEN_Pos)        // 0x00200000 */
+#define DTHRCTL_RXTHRLEN_5               (0x020UL << DTHRCTL_RXTHRLEN_Pos)        // 0x00400000 */
+#define DTHRCTL_RXTHRLEN_6               (0x040UL << DTHRCTL_RXTHRLEN_Pos)        // 0x00800000 */
+#define DTHRCTL_RXTHRLEN_7               (0x080UL << DTHRCTL_RXTHRLEN_Pos)        // 0x01000000 */
+#define DTHRCTL_RXTHRLEN_8               (0x100UL << DTHRCTL_RXTHRLEN_Pos)        // 0x02000000 */
+#define DTHRCTL_ARPEN_Pos                (27U)
+#define DTHRCTL_ARPEN_Msk                (0x1UL << DTHRCTL_ARPEN_Pos)             // 0x08000000 */
+#define DTHRCTL_ARPEN                    DTHRCTL_ARPEN_Msk                        // Arbiter parking enable */
+
+/********************  Bit definition for DIEPEMPMSK register  ********************/
+#define DIEPEMPMSK_INEPTXFEM_Pos         (0U)
+#define DIEPEMPMSK_INEPTXFEM_Msk         (0xFFFFUL << DIEPEMPMSK_INEPTXFEM_Pos)   // 0x0000FFFF */
+#define DIEPEMPMSK_INEPTXFEM             DIEPEMPMSK_INEPTXFEM_Msk                 // IN EP Tx FIFO empty interrupt mask bits */
+
+/********************  Bit definition for DEACHINT register  ********************/
+#define DEACHINT_IEP1INT_Pos             (1U)
+#define DEACHINT_IEP1INT_Msk             (0x1UL << DEACHINT_IEP1INT_Pos)          // 0x00000002 */
+#define DEACHINT_IEP1INT                 DEACHINT_IEP1INT_Msk                     // IN endpoint 1interrupt bit   */
+#define DEACHINT_OEP1INT_Pos             (17U)
+#define DEACHINT_OEP1INT_Msk             (0x1UL << DEACHINT_OEP1INT_Pos)          // 0x00020000 */
+#define DEACHINT_OEP1INT                 DEACHINT_OEP1INT_Msk                     // OUT endpoint 1 interrupt bit */
+
+/********************  Bit definition for GCCFG register  ********************/
+#define STM32_GCCFG_DCDET_Pos            (0U)
+#define STM32_GCCFG_DCDET_Msk            (0x1UL << STM32_GCCFG_DCDET_Pos)         // 0x00000001 */
+#define STM32_GCCFG_DCDET                STM32_GCCFG_DCDET_Msk                    // Data contact detection (DCD) status */
+#define STM32_GCCFG_PDET_Pos             (1U)
+#define STM32_GCCFG_PDET_Msk             (0x1UL << STM32_GCCFG_PDET_Pos)          // 0x00000002 */
+#define STM32_GCCFG_PDET                 STM32_GCCFG_PDET_Msk                     // Primary detection (PD) status */
+#define STM32_GCCFG_SDET_Pos             (2U)
+#define STM32_GCCFG_SDET_Msk             (0x1UL << STM32_GCCFG_SDET_Pos)          // 0x00000004 */
+#define STM32_GCCFG_SDET                 STM32_GCCFG_SDET_Msk                     // Secondary detection (SD) status */
+#define STM32_GCCFG_PS2DET_Pos           (3U)
+#define STM32_GCCFG_PS2DET_Msk           (0x1UL << STM32_GCCFG_PS2DET_Pos)        // 0x00000008 */
+#define STM32_GCCFG_PS2DET               STM32_GCCFG_PS2DET_Msk                   // DM pull-up detection status */
+#define STM32_GCCFG_PWRDWN_Pos           (16U)
+#define STM32_GCCFG_PWRDWN_Msk           (0x1UL << STM32_GCCFG_PWRDWN_Pos)        // 0x00010000 */
+#define STM32_GCCFG_PWRDWN               STM32_GCCFG_PWRDWN_Msk                   // Power down */
+#define STM32_GCCFG_BCDEN_Pos            (17U)
+#define STM32_GCCFG_BCDEN_Msk            (0x1UL << STM32_GCCFG_BCDEN_Pos)         // 0x00020000 */
+#define STM32_GCCFG_BCDEN                STM32_GCCFG_BCDEN_Msk                    // Battery charging detector (BCD) enable */
+#define STM32_GCCFG_DCDEN_Pos            (18U)
+#define STM32_GCCFG_DCDEN_Msk            (0x1UL << STM32_GCCFG_DCDEN_Pos)         // 0x00040000 */
+#define STM32_GCCFG_DCDEN                STM32_GCCFG_DCDEN_Msk                    // Data contact detection (DCD) mode enable*/
+#define STM32_GCCFG_PDEN_Pos             (19U)
+#define STM32_GCCFG_PDEN_Msk             (0x1UL << STM32_GCCFG_PDEN_Pos)          // 0x00080000 */
+#define STM32_GCCFG_PDEN                 STM32_GCCFG_PDEN_Msk                     // Primary detection (PD) mode enable*/
+#define STM32_GCCFG_SDEN_Pos             (20U)
+#define STM32_GCCFG_SDEN_Msk             (0x1UL << STM32_GCCFG_SDEN_Pos)          // 0x00100000 */
+#define STM32_GCCFG_SDEN                 STM32_GCCFG_SDEN_Msk                     // Secondary detection (SD) mode enable */
+#define STM32_GCCFG_VBDEN_Pos            (21U)
+#define STM32_GCCFG_VBDEN_Msk            (0x1UL << STM32_GCCFG_VBDEN_Pos)         // 0x00200000 */
+#define STM32_GCCFG_VBDEN                STM32_GCCFG_VBDEN_Msk                    // VBUS mode enable */
+#define STM32_GCCFG_OTGIDEN_Pos          (22U)
+#define STM32_GCCFG_OTGIDEN_Msk          (0x1UL << STM32_GCCFG_OTGIDEN_Pos)       // 0x00400000 */
+#define STM32_GCCFG_OTGIDEN              STM32_GCCFG_OTGIDEN_Msk                  // OTG Id enable */
+#define STM32_GCCFG_PHYHSEN_Pos          (23U)
+#define STM32_GCCFG_PHYHSEN_Msk          (0x1UL << STM32_GCCFG_PHYHSEN_Pos)       // 0x00800000 */
+#define STM32_GCCFG_PHYHSEN              STM32_GCCFG_PHYHSEN_Msk                  // HS PHY enable */
+
+/********************  Bit definition for DEACHINTMSK register  ********************/
+#define DEACHINTMSK_IEP1INTM_Pos         (1U)
+#define DEACHINTMSK_IEP1INTM_Msk         (0x1UL << DEACHINTMSK_IEP1INTM_Pos)      // 0x00000002 */
+#define DEACHINTMSK_IEP1INTM             DEACHINTMSK_IEP1INTM_Msk                 // IN Endpoint 1 interrupt mask bit  */
+#define DEACHINTMSK_OEP1INTM_Pos         (17U)
+#define DEACHINTMSK_OEP1INTM_Msk         (0x1UL << DEACHINTMSK_OEP1INTM_Pos)      // 0x00020000 */
+#define DEACHINTMSK_OEP1INTM             DEACHINTMSK_OEP1INTM_Msk                 // OUT Endpoint 1 interrupt mask bit */
+
+/********************  Bit definition for CID register  ********************/
+#define CID_PRODUCT_ID_Pos               (0U)
+#define CID_PRODUCT_ID_Msk               (0xFFFFFFFFUL << CID_PRODUCT_ID_Pos)     // 0xFFFFFFFF */
+#define CID_PRODUCT_ID                   CID_PRODUCT_ID_Msk                       // Product ID field */
+
+/********************  Bit definition for GLPMCFG register  ********************/
+#define GLPMCFG_LPMEN_Pos                (0U)
+#define GLPMCFG_LPMEN_Msk                (0x1UL << GLPMCFG_LPMEN_Pos)             // 0x00000001 */
+#define GLPMCFG_LPMEN                    GLPMCFG_LPMEN_Msk                        // LPM support enable                                     */
+#define GLPMCFG_LPMACK_Pos               (1U)
+#define GLPMCFG_LPMACK_Msk               (0x1UL << GLPMCFG_LPMACK_Pos)            // 0x00000002 */
+#define GLPMCFG_LPMACK                   GLPMCFG_LPMACK_Msk                       // LPM Token acknowledge enable                           */
+#define GLPMCFG_BESL_Pos                 (2U)
+#define GLPMCFG_BESL_Msk                 (0xFUL << GLPMCFG_BESL_Pos)              // 0x0000003C */
+#define GLPMCFG_BESL                     GLPMCFG_BESL_Msk                         // BESL value received with last ACKed LPM Token          */
+#define GLPMCFG_REMWAKE_Pos              (6U)
+#define GLPMCFG_REMWAKE_Msk              (0x1UL << GLPMCFG_REMWAKE_Pos)           // 0x00000040 */
+#define GLPMCFG_REMWAKE                  GLPMCFG_REMWAKE_Msk                      // bRemoteWake value received with last ACKed LPM Token   */
+#define GLPMCFG_L1SSEN_Pos               (7U)
+#define GLPMCFG_L1SSEN_Msk               (0x1UL << GLPMCFG_L1SSEN_Pos)            // 0x00000080 */
+#define GLPMCFG_L1SSEN                   GLPMCFG_L1SSEN_Msk                       // L1 shallow sleep enable                                */
+#define GLPMCFG_BESLTHRS_Pos             (8U)
+#define GLPMCFG_BESLTHRS_Msk             (0xFUL << GLPMCFG_BESLTHRS_Pos)          // 0x00000F00 */
+#define GLPMCFG_BESLTHRS                 GLPMCFG_BESLTHRS_Msk                     // BESL threshold                                         */
+#define GLPMCFG_L1DSEN_Pos               (12U)
+#define GLPMCFG_L1DSEN_Msk               (0x1UL << GLPMCFG_L1DSEN_Pos)            // 0x00001000 */
+#define GLPMCFG_L1DSEN                   GLPMCFG_L1DSEN_Msk                       // L1 deep sleep enable                                   */
+#define GLPMCFG_LPMRSP_Pos               (13U)
+#define GLPMCFG_LPMRSP_Msk               (0x3UL << GLPMCFG_LPMRSP_Pos)            // 0x00006000 */
+#define GLPMCFG_LPMRSP                   GLPMCFG_LPMRSP_Msk                       // LPM response                                           */
+#define GLPMCFG_SLPSTS_Pos               (15U)
+#define GLPMCFG_SLPSTS_Msk               (0x1UL << GLPMCFG_SLPSTS_Pos)            // 0x00008000 */
+#define GLPMCFG_SLPSTS                   GLPMCFG_SLPSTS_Msk                       // Port sleep status                                      */
+#define GLPMCFG_L1RSMOK_Pos              (16U)
+#define GLPMCFG_L1RSMOK_Msk              (0x1UL << GLPMCFG_L1RSMOK_Pos)           // 0x00010000 */
+#define GLPMCFG_L1RSMOK                  GLPMCFG_L1RSMOK_Msk                      // Sleep State Resume OK                                  */
+#define GLPMCFG_LPMCHIDX_Pos             (17U)
+#define GLPMCFG_LPMCHIDX_Msk             (0xFUL << GLPMCFG_LPMCHIDX_Pos)          // 0x001E0000 */
+#define GLPMCFG_LPMCHIDX                 GLPMCFG_LPMCHIDX_Msk                     // LPM Channel Index                                      */
+#define GLPMCFG_LPMRCNT_Pos              (21U)
+#define GLPMCFG_LPMRCNT_Msk              (0x7UL << GLPMCFG_LPMRCNT_Pos)           // 0x00E00000 */
+#define GLPMCFG_LPMRCNT                  GLPMCFG_LPMRCNT_Msk                      // LPM retry count                                        */
+#define GLPMCFG_SNDLPM_Pos               (24U)
+#define GLPMCFG_SNDLPM_Msk               (0x1UL << GLPMCFG_SNDLPM_Pos)            // 0x01000000 */
+#define GLPMCFG_SNDLPM                   GLPMCFG_SNDLPM_Msk                       // Send LPM transaction                                   */
+#define GLPMCFG_LPMRCNTSTS_Pos           (25U)
+#define GLPMCFG_LPMRCNTSTS_Msk           (0x7UL << GLPMCFG_LPMRCNTSTS_Pos)        // 0x0E000000 */
+#define GLPMCFG_LPMRCNTSTS               GLPMCFG_LPMRCNTSTS_Msk                   // LPM retry count status                                 */
+#define GLPMCFG_ENBESL_Pos               (28U)
+#define GLPMCFG_ENBESL_Msk               (0x1UL << GLPMCFG_ENBESL_Pos)            // 0x10000000 */
+#define GLPMCFG_ENBESL                   GLPMCFG_ENBESL_Msk                       // Enable best effort service latency                     */
+
+/********************  Bit definition for DIEPEACHMSK1 register  ********************/
+#define DIEPEACHMSK1_XFRCM_Pos           (0U)
+#define DIEPEACHMSK1_XFRCM_Msk           (0x1UL << DIEPEACHMSK1_XFRCM_Pos)        // 0x00000001 */
+#define DIEPEACHMSK1_XFRCM               DIEPEACHMSK1_XFRCM_Msk                   // Transfer completed interrupt mask                 */
+#define DIEPEACHMSK1_EPDM_Pos            (1U)
+#define DIEPEACHMSK1_EPDM_Msk            (0x1UL << DIEPEACHMSK1_EPDM_Pos)         // 0x00000002 */
+#define DIEPEACHMSK1_EPDM                DIEPEACHMSK1_EPDM_Msk                    // Endpoint disabled interrupt mask                  */
+#define DIEPEACHMSK1_TOM_Pos             (3U)
+#define DIEPEACHMSK1_TOM_Msk             (0x1UL << DIEPEACHMSK1_TOM_Pos)          // 0x00000008 */
+#define DIEPEACHMSK1_TOM                 DIEPEACHMSK1_TOM_Msk                     // Timeout condition mask (nonisochronous endpoints) */
+#define DIEPEACHMSK1_ITTXFEMSK_Pos       (4U)
+#define DIEPEACHMSK1_ITTXFEMSK_Msk       (0x1UL << DIEPEACHMSK1_ITTXFEMSK_Pos)    // 0x00000010 */
+#define DIEPEACHMSK1_ITTXFEMSK           DIEPEACHMSK1_ITTXFEMSK_Msk               // IN token received when TxFIFO empty mask          */
+#define DIEPEACHMSK1_INEPNMM_Pos         (5U)
+#define DIEPEACHMSK1_INEPNMM_Msk         (0x1UL << DIEPEACHMSK1_INEPNMM_Pos)      // 0x00000020 */
+#define DIEPEACHMSK1_INEPNMM             DIEPEACHMSK1_INEPNMM_Msk                 // IN token received with EP mismatch mask           */
+#define DIEPEACHMSK1_INEPNEM_Pos         (6U)
+#define DIEPEACHMSK1_INEPNEM_Msk         (0x1UL << DIEPEACHMSK1_INEPNEM_Pos)      // 0x00000040 */
+#define DIEPEACHMSK1_INEPNEM             DIEPEACHMSK1_INEPNEM_Msk                 // IN endpoint NAK effective mask                    */
+#define DIEPEACHMSK1_TXFURM_Pos          (8U)
+#define DIEPEACHMSK1_TXFURM_Msk          (0x1UL << DIEPEACHMSK1_TXFURM_Pos)       // 0x00000100 */
+#define DIEPEACHMSK1_TXFURM              DIEPEACHMSK1_TXFURM_Msk                  // FIFO underrun mask                                */
+#define DIEPEACHMSK1_BIM_Pos             (9U)
+#define DIEPEACHMSK1_BIM_Msk             (0x1UL << DIEPEACHMSK1_BIM_Pos)          // 0x00000200 */
+#define DIEPEACHMSK1_BIM                 DIEPEACHMSK1_BIM_Msk                     // BNA interrupt mask                                */
+#define DIEPEACHMSK1_NAKM_Pos            (13U)
+#define DIEPEACHMSK1_NAKM_Msk            (0x1UL << DIEPEACHMSK1_NAKM_Pos)         // 0x00002000 */
+#define DIEPEACHMSK1_NAKM                DIEPEACHMSK1_NAKM_Msk                    // NAK interrupt mask                                */
+
+/********************  Bit definition for HPRT register  ********************/
+#define HPRT_PCSTS_Pos                   (0U)
+#define HPRT_PCSTS_Msk                   (0x1UL << HPRT_PCSTS_Pos)                // 0x00000001 */
+#define HPRT_PCSTS                       HPRT_PCSTS_Msk                           // Port connect status        */
+#define HPRT_PCDET_Pos                   (1U)
+#define HPRT_PCDET_Msk                   (0x1UL << HPRT_PCDET_Pos)                // 0x00000002 */
+#define HPRT_PCDET                       HPRT_PCDET_Msk                           // Port connect detected      */
+#define HPRT_PENA_Pos                    (2U)
+#define HPRT_PENA_Msk                    (0x1UL << HPRT_PENA_Pos)                 // 0x00000004 */
+#define HPRT_PENA                        HPRT_PENA_Msk                            // Port enable                */
+#define HPRT_PENCHNG_Pos                 (3U)
+#define HPRT_PENCHNG_Msk                 (0x1UL << HPRT_PENCHNG_Pos)              // 0x00000008 */
+#define HPRT_PENCHNG                     HPRT_PENCHNG_Msk                         // Port enable/disable change */
+#define HPRT_POCA_Pos                    (4U)
+#define HPRT_POCA_Msk                    (0x1UL << HPRT_POCA_Pos)                 // 0x00000010 */
+#define HPRT_POCA                        HPRT_POCA_Msk                            // Port overcurrent active    */
+#define HPRT_POCCHNG_Pos                 (5U)
+#define HPRT_POCCHNG_Msk                 (0x1UL << HPRT_POCCHNG_Pos)              // 0x00000020 */
+#define HPRT_POCCHNG                     HPRT_POCCHNG_Msk                         // Port overcurrent change    */
+#define HPRT_PRES_Pos                    (6U)
+#define HPRT_PRES_Msk                    (0x1UL << HPRT_PRES_Pos)                 // 0x00000040 */
+#define HPRT_PRES                        HPRT_PRES_Msk                            // Port resume                */
+#define HPRT_PSUSP_Pos                   (7U)
+#define HPRT_PSUSP_Msk                   (0x1UL << HPRT_PSUSP_Pos)                // 0x00000080 */
+#define HPRT_PSUSP                       HPRT_PSUSP_Msk                           // Port suspend               */
+#define HPRT_PRST_Pos                    (8U)
+#define HPRT_PRST_Msk                    (0x1UL << HPRT_PRST_Pos)                 // 0x00000100 */
+#define HPRT_PRST                        HPRT_PRST_Msk                            // Port reset                 */
+
+#define HPRT_PLSTS_Pos                   (10U)
+#define HPRT_PLSTS_Msk                   (0x3UL << HPRT_PLSTS_Pos)                // 0x00000C00 */
+#define HPRT_PLSTS                       HPRT_PLSTS_Msk                           // Port line status           */
+#define HPRT_PLSTS_0                     (0x1UL << HPRT_PLSTS_Pos)                // 0x00000400 */
+#define HPRT_PLSTS_1                     (0x2UL << HPRT_PLSTS_Pos)                // 0x00000800 */
+#define HPRT_PPWR_Pos                    (12U)
+#define HPRT_PPWR_Msk                    (0x1UL << HPRT_PPWR_Pos)                 // 0x00001000 */
+#define HPRT_PPWR                        HPRT_PPWR_Msk                            // Port power                 */
+
+#define HPRT_PTCTL_Pos                   (13U)
+#define HPRT_PTCTL_Msk                   (0xFUL << HPRT_PTCTL_Pos)                // 0x0001E000 */
+#define HPRT_PTCTL                       HPRT_PTCTL_Msk                           // Port test control          */
+#define HPRT_PTCTL_0                     (0x1UL << HPRT_PTCTL_Pos)                // 0x00002000 */
+#define HPRT_PTCTL_1                     (0x2UL << HPRT_PTCTL_Pos)                // 0x00004000 */
+#define HPRT_PTCTL_2                     (0x4UL << HPRT_PTCTL_Pos)                // 0x00008000 */
+#define HPRT_PTCTL_3                     (0x8UL << HPRT_PTCTL_Pos)                // 0x00010000 */
+
+#define HPRT_PSPD_Pos                    (17U)
+#define HPRT_PSPD_Msk                    (0x3UL << HPRT_PSPD_Pos)                 // 0x00060000 */
+#define HPRT_PSPD                        HPRT_PSPD_Msk                            // Port speed                 */
+#define HPRT_PSPD_0                      (0x1UL << HPRT_PSPD_Pos)                 // 0x00020000 */
+#define HPRT_PSPD_1                      (0x2UL << HPRT_PSPD_Pos)                 // 0x00040000 */
+
+/********************  Bit definition for DOEPEACHMSK1 register  ********************/
+#define DOEPEACHMSK1_XFRCM_Pos           (0U)
+#define DOEPEACHMSK1_XFRCM_Msk           (0x1UL << DOEPEACHMSK1_XFRCM_Pos)        // 0x00000001 */
+#define DOEPEACHMSK1_XFRCM               DOEPEACHMSK1_XFRCM_Msk                   // Transfer completed interrupt mask         */
+#define DOEPEACHMSK1_EPDM_Pos            (1U)
+#define DOEPEACHMSK1_EPDM_Msk            (0x1UL << DOEPEACHMSK1_EPDM_Pos)         // 0x00000002 */
+#define DOEPEACHMSK1_EPDM                DOEPEACHMSK1_EPDM_Msk                    // Endpoint disabled interrupt mask          */
+#define DOEPEACHMSK1_TOM_Pos             (3U)
+#define DOEPEACHMSK1_TOM_Msk             (0x1UL << DOEPEACHMSK1_TOM_Pos)          // 0x00000008 */
+#define DOEPEACHMSK1_TOM                 DOEPEACHMSK1_TOM_Msk                     // Timeout condition mask                    */
+#define DOEPEACHMSK1_ITTXFEMSK_Pos       (4U)
+#define DOEPEACHMSK1_ITTXFEMSK_Msk       (0x1UL << DOEPEACHMSK1_ITTXFEMSK_Pos)    // 0x00000010 */
+#define DOEPEACHMSK1_ITTXFEMSK           DOEPEACHMSK1_ITTXFEMSK_Msk               // IN token received when TxFIFO empty mask  */
+#define DOEPEACHMSK1_INEPNMM_Pos         (5U)
+#define DOEPEACHMSK1_INEPNMM_Msk         (0x1UL << DOEPEACHMSK1_INEPNMM_Pos)      // 0x00000020 */
+#define DOEPEACHMSK1_INEPNMM             DOEPEACHMSK1_INEPNMM_Msk                 // IN token received with EP mismatch mask   */
+#define DOEPEACHMSK1_INEPNEM_Pos         (6U)
+#define DOEPEACHMSK1_INEPNEM_Msk         (0x1UL << DOEPEACHMSK1_INEPNEM_Pos)      // 0x00000040 */
+#define DOEPEACHMSK1_INEPNEM             DOEPEACHMSK1_INEPNEM_Msk                 // IN endpoint NAK effective mask            */
+#define DOEPEACHMSK1_TXFURM_Pos          (8U)
+#define DOEPEACHMSK1_TXFURM_Msk          (0x1UL << DOEPEACHMSK1_TXFURM_Pos)       // 0x00000100 */
+#define DOEPEACHMSK1_TXFURM              DOEPEACHMSK1_TXFURM_Msk                  // OUT packet error mask                     */
+#define DOEPEACHMSK1_BIM_Pos             (9U)
+#define DOEPEACHMSK1_BIM_Msk             (0x1UL << DOEPEACHMSK1_BIM_Pos)          // 0x00000200 */
+#define DOEPEACHMSK1_BIM                 DOEPEACHMSK1_BIM_Msk                     // BNA interrupt mask                        */
+#define DOEPEACHMSK1_BERRM_Pos           (12U)
+#define DOEPEACHMSK1_BERRM_Msk           (0x1UL << DOEPEACHMSK1_BERRM_Pos)        // 0x00001000 */
+#define DOEPEACHMSK1_BERRM               DOEPEACHMSK1_BERRM_Msk                   // Bubble error interrupt mask               */
+#define DOEPEACHMSK1_NAKM_Pos            (13U)
+#define DOEPEACHMSK1_NAKM_Msk            (0x1UL << DOEPEACHMSK1_NAKM_Pos)         // 0x00002000 */
+#define DOEPEACHMSK1_NAKM                DOEPEACHMSK1_NAKM_Msk                    // NAK interrupt mask                        */
+#define DOEPEACHMSK1_NYETM_Pos           (14U)
+#define DOEPEACHMSK1_NYETM_Msk           (0x1UL << DOEPEACHMSK1_NYETM_Pos)        // 0x00004000 */
+#define DOEPEACHMSK1_NYETM               DOEPEACHMSK1_NYETM_Msk                   // NYET interrupt mask                       */
+
+/********************  Bit definition for HPTXFSIZ register  ********************/
+#define HPTXFSIZ_PTXSA_Pos               (0U)
+#define HPTXFSIZ_PTXSA_Msk               (0xFFFFUL << HPTXFSIZ_PTXSA_Pos)         // 0x0000FFFF */
+#define HPTXFSIZ_PTXSA                   HPTXFSIZ_PTXSA_Msk                       // Host periodic TxFIFO start address            */
+#define HPTXFSIZ_PTXFD_Pos               (16U)
+#define HPTXFSIZ_PTXFD_Msk               (0xFFFFUL << HPTXFSIZ_PTXFD_Pos)         // 0xFFFF0000 */
+#define HPTXFSIZ_PTXFD                   HPTXFSIZ_PTXFD_Msk                       // Host periodic TxFIFO depth                    */
+
+/********************  Bit definition for DIEPCTL register  ********************/
+#define DIEPCTL_MPSIZ_Pos                (0U)
+#define DIEPCTL_MPSIZ_Msk                (0x7FFUL << DIEPCTL_MPSIZ_Pos)           // 0x000007FF */
+#define DIEPCTL_MPSIZ                    DIEPCTL_MPSIZ_Msk                        // Maximum packet size              */
+#define DIEPCTL_USBAEP_Pos               (15U)
+#define DIEPCTL_USBAEP_Msk               (0x1UL << DIEPCTL_USBAEP_Pos)            // 0x00008000 */
+#define DIEPCTL_USBAEP                   DIEPCTL_USBAEP_Msk                       // USB active endpoint              */
+#define DIEPCTL_EONUM_DPID_Pos           (16U)
+#define DIEPCTL_EONUM_DPID_Msk           (0x1UL << DIEPCTL_EONUM_DPID_Pos)        // 0x00010000 */
+#define DIEPCTL_EONUM_DPID               DIEPCTL_EONUM_DPID_Msk                   // Even/odd frame                   */
+#define DIEPCTL_NAKSTS_Pos               (17U)
+#define DIEPCTL_NAKSTS_Msk               (0x1UL << DIEPCTL_NAKSTS_Pos)            // 0x00020000 */
+#define DIEPCTL_NAKSTS                   DIEPCTL_NAKSTS_Msk                       // NAK status                       */
+
+#define DIEPCTL_EPTYP_Pos                (18U)
+#define DIEPCTL_EPTYP_Msk                (0x3UL << DIEPCTL_EPTYP_Pos)             // 0x000C0000 */
+#define DIEPCTL_EPTYP                    DIEPCTL_EPTYP_Msk                        // Endpoint type                    */
+#define DIEPCTL_EPTYP_0                  (0x1UL << DIEPCTL_EPTYP_Pos)             // 0x00040000 */
+#define DIEPCTL_EPTYP_1                  (0x2UL << DIEPCTL_EPTYP_Pos)             // 0x00080000 */
+#define DIEPCTL_STALL_Pos                (21U)
+#define DIEPCTL_STALL_Msk                (0x1UL << DIEPCTL_STALL_Pos)             // 0x00200000 */
+#define DIEPCTL_STALL                    DIEPCTL_STALL_Msk                        // STALL handshake                  */
+
+#define DIEPCTL_TXFNUM_Pos               (22U)
+#define DIEPCTL_TXFNUM_Msk               (0xFUL << DIEPCTL_TXFNUM_Pos)            // 0x03C00000 */
+#define DIEPCTL_TXFNUM                   DIEPCTL_TXFNUM_Msk                       // TxFIFO number                    */
+#define DIEPCTL_TXFNUM_0                 (0x1UL << DIEPCTL_TXFNUM_Pos)            // 0x00400000 */
+#define DIEPCTL_TXFNUM_1                 (0x2UL << DIEPCTL_TXFNUM_Pos)            // 0x00800000 */
+#define DIEPCTL_TXFNUM_2                 (0x4UL << DIEPCTL_TXFNUM_Pos)            // 0x01000000 */
+#define DIEPCTL_TXFNUM_3                 (0x8UL << DIEPCTL_TXFNUM_Pos)            // 0x02000000 */
+#define DIEPCTL_CNAK_Pos                 (26U)
+#define DIEPCTL_CNAK_Msk                 (0x1UL << DIEPCTL_CNAK_Pos)              // 0x04000000 */
+#define DIEPCTL_CNAK                     DIEPCTL_CNAK_Msk                         // Clear NAK                        */
+#define DIEPCTL_SNAK_Pos                 (27U)
+#define DIEPCTL_SNAK_Msk                 (0x1UL << DIEPCTL_SNAK_Pos)              // 0x08000000 */
+#define DIEPCTL_SNAK                     DIEPCTL_SNAK_Msk                         // Set NAK */
+#define DIEPCTL_SD0PID_SEVNFRM_Pos       (28U)
+#define DIEPCTL_SD0PID_SEVNFRM_Msk       (0x1UL << DIEPCTL_SD0PID_SEVNFRM_Pos)    // 0x10000000 */
+#define DIEPCTL_SD0PID_SEVNFRM           DIEPCTL_SD0PID_SEVNFRM_Msk               // Set DATA0 PID                    */
+#define DIEPCTL_SODDFRM_Pos              (29U)
+#define DIEPCTL_SODDFRM_Msk              (0x1UL << DIEPCTL_SODDFRM_Pos)           // 0x20000000 */
+#define DIEPCTL_SODDFRM                  DIEPCTL_SODDFRM_Msk                      // Set odd frame                    */
+#define DIEPCTL_EPDIS_Pos                (30U)
+#define DIEPCTL_EPDIS_Msk                (0x1UL << DIEPCTL_EPDIS_Pos)             // 0x40000000 */
+#define DIEPCTL_EPDIS                    DIEPCTL_EPDIS_Msk                        // Endpoint disable                 */
+#define DIEPCTL_EPENA_Pos                (31U)
+#define DIEPCTL_EPENA_Msk                (0x1UL << DIEPCTL_EPENA_Pos)             // 0x80000000 */
+#define DIEPCTL_EPENA                    DIEPCTL_EPENA_Msk                        // Endpoint enable                  */
+
+/********************  Bit definition for HCCHAR register  ********************/
+#define HCCHAR_MPSIZ_Pos                 (0U)
+#define HCCHAR_MPSIZ_Msk                 (0x7FFUL << HCCHAR_MPSIZ_Pos)            // 0x000007FF */
+#define HCCHAR_MPSIZ                     HCCHAR_MPSIZ_Msk                         // Maximum packet size */
+
+#define HCCHAR_EPNUM_Pos                 (11U)
+#define HCCHAR_EPNUM_Msk                 (0xFUL << HCCHAR_EPNUM_Pos)              // 0x00007800 */
+#define HCCHAR_EPNUM                     HCCHAR_EPNUM_Msk                         // Endpoint number */
+#define HCCHAR_EPNUM_0                   (0x1UL << HCCHAR_EPNUM_Pos)              // 0x00000800 */
+#define HCCHAR_EPNUM_1                   (0x2UL << HCCHAR_EPNUM_Pos)              // 0x00001000 */
+#define HCCHAR_EPNUM_2                   (0x4UL << HCCHAR_EPNUM_Pos)              // 0x00002000 */
+#define HCCHAR_EPNUM_3                   (0x8UL << HCCHAR_EPNUM_Pos)              // 0x00004000 */
+#define HCCHAR_EPDIR_Pos                 (15U)
+#define HCCHAR_EPDIR_Msk                 (0x1UL << HCCHAR_EPDIR_Pos)              // 0x00008000 */
+#define HCCHAR_EPDIR                     HCCHAR_EPDIR_Msk                         // Endpoint direction */
+#define HCCHAR_LSDEV_Pos                 (17U)
+#define HCCHAR_LSDEV_Msk                 (0x1UL << HCCHAR_LSDEV_Pos)              // 0x00020000 */
+#define HCCHAR_LSDEV                     HCCHAR_LSDEV_Msk                         // Low-speed device */
+
+#define HCCHAR_EPTYP_Pos                 (18U)
+#define HCCHAR_EPTYP_Msk                 (0x3UL << HCCHAR_EPTYP_Pos)              // 0x000C0000 */
+#define HCCHAR_EPTYP                     HCCHAR_EPTYP_Msk                         // Endpoint type */
+#define HCCHAR_EPTYP_0                   (0x1UL << HCCHAR_EPTYP_Pos)              // 0x00040000 */
+#define HCCHAR_EPTYP_1                   (0x2UL << HCCHAR_EPTYP_Pos)              // 0x00080000 */
+
+#define HCCHAR_MC_Pos                    (20U)
+#define HCCHAR_MC_Msk                    (0x3UL << HCCHAR_MC_Pos)                 // 0x00300000 */
+#define HCCHAR_MC                        HCCHAR_MC_Msk                            // Multi Count (MC) / Error Count (EC) */
+#define HCCHAR_MC_0                      (0x1UL << HCCHAR_MC_Pos)                 // 0x00100000 */
+#define HCCHAR_MC_1                      (0x2UL << HCCHAR_MC_Pos)                 // 0x00200000 */
+
+#define HCCHAR_DAD_Pos                   (22U)
+#define HCCHAR_DAD_Msk                   (0x7FUL << HCCHAR_DAD_Pos)               // 0x1FC00000 */
+#define HCCHAR_DAD                       HCCHAR_DAD_Msk                           // Device address */
+#define HCCHAR_DAD_0                     (0x01UL << HCCHAR_DAD_Pos)               // 0x00400000 */
+#define HCCHAR_DAD_1                     (0x02UL << HCCHAR_DAD_Pos)               // 0x00800000 */
+#define HCCHAR_DAD_2                     (0x04UL << HCCHAR_DAD_Pos)               // 0x01000000 */
+#define HCCHAR_DAD_3                     (0x08UL << HCCHAR_DAD_Pos)               // 0x02000000 */
+#define HCCHAR_DAD_4                     (0x10UL << HCCHAR_DAD_Pos)               // 0x04000000 */
+#define HCCHAR_DAD_5                     (0x20UL << HCCHAR_DAD_Pos)               // 0x08000000 */
+#define HCCHAR_DAD_6                     (0x40UL << HCCHAR_DAD_Pos)               // 0x10000000 */
+#define HCCHAR_ODDFRM_Pos                (29U)
+#define HCCHAR_ODDFRM_Msk                (0x1UL << HCCHAR_ODDFRM_Pos)             // 0x20000000 */
+#define HCCHAR_ODDFRM                    HCCHAR_ODDFRM_Msk                        // Odd frame */
+#define HCCHAR_CHDIS_Pos                 (30U)
+#define HCCHAR_CHDIS_Msk                 (0x1UL << HCCHAR_CHDIS_Pos)              // 0x40000000 */
+#define HCCHAR_CHDIS                     HCCHAR_CHDIS_Msk                         // Channel disable */
+#define HCCHAR_CHENA_Pos                 (31U)
+#define HCCHAR_CHENA_Msk                 (0x1UL << HCCHAR_CHENA_Pos)              // 0x80000000 */
+#define HCCHAR_CHENA                     HCCHAR_CHENA_Msk                         // Channel enable */
+
+/********************  Bit definition for HCSPLT register  ********************/
+
+#define HCSPLT_PRTADDR_Pos               (0U)
+#define HCSPLT_PRTADDR_Msk               (0x7FUL << HCSPLT_PRTADDR_Pos)           // 0x0000007F */
+#define HCSPLT_PRTADDR                   HCSPLT_PRTADDR_Msk                       // Port address */
+#define HCSPLT_PRTADDR_0                 (0x01UL << HCSPLT_PRTADDR_Pos)           // 0x00000001 */
+#define HCSPLT_PRTADDR_1                 (0x02UL << HCSPLT_PRTADDR_Pos)           // 0x00000002 */
+#define HCSPLT_PRTADDR_2                 (0x04UL << HCSPLT_PRTADDR_Pos)           // 0x00000004 */
+#define HCSPLT_PRTADDR_3                 (0x08UL << HCSPLT_PRTADDR_Pos)           // 0x00000008 */
+#define HCSPLT_PRTADDR_4                 (0x10UL << HCSPLT_PRTADDR_Pos)           // 0x00000010 */
+#define HCSPLT_PRTADDR_5                 (0x20UL << HCSPLT_PRTADDR_Pos)           // 0x00000020 */
+#define HCSPLT_PRTADDR_6                 (0x40UL << HCSPLT_PRTADDR_Pos)           // 0x00000040 */
+
+#define HCSPLT_HUBADDR_Pos               (7U)
+#define HCSPLT_HUBADDR_Msk               (0x7FUL << HCSPLT_HUBADDR_Pos)           // 0x00003F80 */
+#define HCSPLT_HUBADDR                   HCSPLT_HUBADDR_Msk                       // Hub address */
+#define HCSPLT_HUBADDR_0                 (0x01UL << HCSPLT_HUBADDR_Pos)           // 0x00000080 */
+#define HCSPLT_HUBADDR_1                 (0x02UL << HCSPLT_HUBADDR_Pos)           // 0x00000100 */
+#define HCSPLT_HUBADDR_2                 (0x04UL << HCSPLT_HUBADDR_Pos)           // 0x00000200 */
+#define HCSPLT_HUBADDR_3                 (0x08UL << HCSPLT_HUBADDR_Pos)           // 0x00000400 */
+#define HCSPLT_HUBADDR_4                 (0x10UL << HCSPLT_HUBADDR_Pos)           // 0x00000800 */
+#define HCSPLT_HUBADDR_5                 (0x20UL << HCSPLT_HUBADDR_Pos)           // 0x00001000 */
+#define HCSPLT_HUBADDR_6                 (0x40UL << HCSPLT_HUBADDR_Pos)           // 0x00002000 */
+
+#define HCSPLT_XACTPOS_Pos               (14U)
+#define HCSPLT_XACTPOS_Msk               (0x3UL << HCSPLT_XACTPOS_Pos)            // 0x0000C000 */
+#define HCSPLT_XACTPOS                   HCSPLT_XACTPOS_Msk                       // XACTPOS */
+#define HCSPLT_XACTPOS_0                 (0x1UL << HCSPLT_XACTPOS_Pos)            // 0x00004000 */
+#define HCSPLT_XACTPOS_1                 (0x2UL << HCSPLT_XACTPOS_Pos)            // 0x00008000 */
+#define HCSPLT_COMPLSPLT_Pos             (16U)
+#define HCSPLT_COMPLSPLT_Msk             (0x1UL << HCSPLT_COMPLSPLT_Pos)          // 0x00010000 */
+#define HCSPLT_COMPLSPLT                 HCSPLT_COMPLSPLT_Msk                     // Do complete split */
+#define HCSPLT_SPLITEN_Pos               (31U)
+#define HCSPLT_SPLITEN_Msk               (0x1UL << HCSPLT_SPLITEN_Pos)            // 0x80000000 */
+#define HCSPLT_SPLITEN                   HCSPLT_SPLITEN_Msk                       // Split enable */
+
+/********************  Bit definition for HCINT register  ********************/
+#define HCINT_XFRC_Pos                   (0U)
+#define HCINT_XFRC_Msk                   (0x1UL << HCINT_XFRC_Pos)                // 0x00000001 */
+#define HCINT_XFRC                       HCINT_XFRC_Msk                           // Transfer completed */
+#define HCINT_CHH_Pos                    (1U)
+#define HCINT_CHH_Msk                    (0x1UL << HCINT_CHH_Pos)                 // 0x00000002 */
+#define HCINT_CHH                        HCINT_CHH_Msk                            // Channel halted */
+#define HCINT_AHBERR_Pos                 (2U)
+#define HCINT_AHBERR_Msk                 (0x1UL << HCINT_AHBERR_Pos)              // 0x00000004 */
+#define HCINT_AHBERR                     HCINT_AHBERR_Msk                         // AHB error */
+#define HCINT_STALL_Pos                  (3U)
+#define HCINT_STALL_Msk                  (0x1UL << HCINT_STALL_Pos)               // 0x00000008 */
+#define HCINT_STALL                      HCINT_STALL_Msk                          // STALL response received interrupt */
+#define HCINT_NAK_Pos                    (4U)
+#define HCINT_NAK_Msk                    (0x1UL << HCINT_NAK_Pos)                 // 0x00000010 */
+#define HCINT_NAK                        HCINT_NAK_Msk                            // NAK response received interrupt */
+#define HCINT_ACK_Pos                    (5U)
+#define HCINT_ACK_Msk                    (0x1UL << HCINT_ACK_Pos)                 // 0x00000020 */
+#define HCINT_ACK                        HCINT_ACK_Msk                            // ACK response received/transmitted interrupt */
+#define HCINT_NYET_Pos                   (6U)
+#define HCINT_NYET_Msk                   (0x1UL << HCINT_NYET_Pos)                // 0x00000040 */
+#define HCINT_NYET                       HCINT_NYET_Msk                           // Response received interrupt */
+#define HCINT_TXERR_Pos                  (7U)
+#define HCINT_TXERR_Msk                  (0x1UL << HCINT_TXERR_Pos)               // 0x00000080 */
+#define HCINT_TXERR                      HCINT_TXERR_Msk                          // Transaction error */
+#define HCINT_BBERR_Pos                  (8U)
+#define HCINT_BBERR_Msk                  (0x1UL << HCINT_BBERR_Pos)               // 0x00000100 */
+#define HCINT_BBERR                      HCINT_BBERR_Msk                          // Babble error */
+#define HCINT_FRMOR_Pos                  (9U)
+#define HCINT_FRMOR_Msk                  (0x1UL << HCINT_FRMOR_Pos)               // 0x00000200 */
+#define HCINT_FRMOR                      HCINT_FRMOR_Msk                          // Frame overrun */
+#define HCINT_DTERR_Pos                  (10U)
+#define HCINT_DTERR_Msk                  (0x1UL << HCINT_DTERR_Pos)               // 0x00000400 */
+#define HCINT_DTERR                      HCINT_DTERR_Msk                          // Data toggle error */
+
+/********************  Bit definition for DIEPINT register  ********************/
+#define DIEPINT_XFRC_Pos                 (0U)
+#define DIEPINT_XFRC_Msk                 (0x1UL << DIEPINT_XFRC_Pos)              // 0x00000001 */
+#define DIEPINT_XFRC                     DIEPINT_XFRC_Msk                         // Transfer completed interrupt */
+#define DIEPINT_EPDISD_Pos               (1U)
+#define DIEPINT_EPDISD_Msk               (0x1UL << DIEPINT_EPDISD_Pos)            // 0x00000002 */
+#define DIEPINT_EPDISD                   DIEPINT_EPDISD_Msk                       // Endpoint disabled interrupt */
+#define DIEPINT_AHBERR_Pos               (2U)
+#define DIEPINT_AHBERR_Msk               (0x1UL << DIEPINT_AHBERR_Pos)            // 0x00000004 */
+#define DIEPINT_AHBERR                   DIEPINT_AHBERR_Msk                       // AHB Error (AHBErr) during an IN transaction */
+#define DIEPINT_TOC_Pos                  (3U)
+#define DIEPINT_TOC_Msk                  (0x1UL << DIEPINT_TOC_Pos)               // 0x00000008 */
+#define DIEPINT_TOC                      DIEPINT_TOC_Msk                          // Timeout condition */
+#define DIEPINT_ITTXFE_Pos               (4U)
+#define DIEPINT_ITTXFE_Msk               (0x1UL << DIEPINT_ITTXFE_Pos)            // 0x00000010 */
+#define DIEPINT_ITTXFE                   DIEPINT_ITTXFE_Msk                       // IN token received when TxFIFO is empty */
+#define DIEPINT_INEPNM_Pos               (5U)
+#define DIEPINT_INEPNM_Msk               (0x1UL << DIEPINT_INEPNM_Pos)            // 0x00000020 */
+#define DIEPINT_INEPNM                   DIEPINT_INEPNM_Msk                       // IN token received with EP mismatch */
+#define DIEPINT_INEPNE_Pos               (6U)
+#define DIEPINT_INEPNE_Msk               (0x1UL << DIEPINT_INEPNE_Pos)            // 0x00000040 */
+#define DIEPINT_INEPNE                   DIEPINT_INEPNE_Msk                       // IN endpoint NAK effective */
+#define DIEPINT_TXFE_Pos                 (7U)
+#define DIEPINT_TXFE_Msk                 (0x1UL << DIEPINT_TXFE_Pos)              // 0x00000080 */
+#define DIEPINT_TXFE                     DIEPINT_TXFE_Msk                         // Transmit FIFO empty */
+#define DIEPINT_TXFIFOUDRN_Pos           (8U)
+#define DIEPINT_TXFIFOUDRN_Msk           (0x1UL << DIEPINT_TXFIFOUDRN_Pos)        // 0x00000100 */
+#define DIEPINT_TXFIFOUDRN               DIEPINT_TXFIFOUDRN_Msk                   // Transmit Fifo Underrun */
+#define DIEPINT_BNA_Pos                  (9U)
+#define DIEPINT_BNA_Msk                  (0x1UL << DIEPINT_BNA_Pos)               // 0x00000200 */
+#define DIEPINT_BNA                      DIEPINT_BNA_Msk                          // Buffer not available interrupt */
+#define DIEPINT_PKTDRPSTS_Pos            (11U)
+#define DIEPINT_PKTDRPSTS_Msk            (0x1UL << DIEPINT_PKTDRPSTS_Pos)         // 0x00000800 */
+#define DIEPINT_PKTDRPSTS                DIEPINT_PKTDRPSTS_Msk                    // Packet dropped status */
+#define DIEPINT_BERR_Pos                 (12U)
+#define DIEPINT_BERR_Msk                 (0x1UL << DIEPINT_BERR_Pos)              // 0x00001000 */
+#define DIEPINT_BERR                     DIEPINT_BERR_Msk                         // Babble error interrupt */
+#define DIEPINT_NAK_Pos                  (13U)
+#define DIEPINT_NAK_Msk                  (0x1UL << DIEPINT_NAK_Pos)               // 0x00002000 */
+#define DIEPINT_NAK                      DIEPINT_NAK_Msk                          // NAK interrupt */
+
+/********************  Bit definition for HCINTMSK register  ********************/
+#define HCINTMSK_XFRCM_Pos               (0U)
+#define HCINTMSK_XFRCM_Msk               (0x1UL << HCINTMSK_XFRCM_Pos)            // 0x00000001 */
+#define HCINTMSK_XFRCM                   HCINTMSK_XFRCM_Msk                       // Transfer completed mask */
+#define HCINTMSK_CHHM_Pos                (1U)
+#define HCINTMSK_CHHM_Msk                (0x1UL << HCINTMSK_CHHM_Pos)             // 0x00000002 */
+#define HCINTMSK_CHHM                    HCINTMSK_CHHM_Msk                        // Channel halted mask */
+#define HCINTMSK_AHBERR_Pos              (2U)
+#define HCINTMSK_AHBERR_Msk              (0x1UL << HCINTMSK_AHBERR_Pos)           // 0x00000004 */
+#define HCINTMSK_AHBERR                  HCINTMSK_AHBERR_Msk                      // AHB error */
+#define HCINTMSK_STALLM_Pos              (3U)
+#define HCINTMSK_STALLM_Msk              (0x1UL << HCINTMSK_STALLM_Pos)           // 0x00000008 */
+#define HCINTMSK_STALLM                  HCINTMSK_STALLM_Msk                      // STALL response received interrupt mask */
+#define HCINTMSK_NAKM_Pos                (4U)
+#define HCINTMSK_NAKM_Msk                (0x1UL << HCINTMSK_NAKM_Pos)             // 0x00000010 */
+#define HCINTMSK_NAKM                    HCINTMSK_NAKM_Msk                        // NAK response received interrupt mask */
+#define HCINTMSK_ACKM_Pos                (5U)
+#define HCINTMSK_ACKM_Msk                (0x1UL << HCINTMSK_ACKM_Pos)             // 0x00000020 */
+#define HCINTMSK_ACKM                    HCINTMSK_ACKM_Msk                        // ACK response received/transmitted interrupt mask */
+#define HCINTMSK_NYET_Pos                (6U)
+#define HCINTMSK_NYET_Msk                (0x1UL << HCINTMSK_NYET_Pos)             // 0x00000040 */
+#define HCINTMSK_NYET                    HCINTMSK_NYET_Msk                        // response received interrupt mask */
+#define HCINTMSK_TXERRM_Pos              (7U)
+#define HCINTMSK_TXERRM_Msk              (0x1UL << HCINTMSK_TXERRM_Pos)           // 0x00000080 */
+#define HCINTMSK_TXERRM                  HCINTMSK_TXERRM_Msk                      // Transaction error mask */
+#define HCINTMSK_BBERRM_Pos              (8U)
+#define HCINTMSK_BBERRM_Msk              (0x1UL << HCINTMSK_BBERRM_Pos)           // 0x00000100 */
+#define HCINTMSK_BBERRM                  HCINTMSK_BBERRM_Msk                      // Babble error mask */
+#define HCINTMSK_FRMORM_Pos              (9U)
+#define HCINTMSK_FRMORM_Msk              (0x1UL << HCINTMSK_FRMORM_Pos)           // 0x00000200 */
+#define HCINTMSK_FRMORM                  HCINTMSK_FRMORM_Msk                      // Frame overrun mask */
+#define HCINTMSK_DTERRM_Pos              (10U)
+#define HCINTMSK_DTERRM_Msk              (0x1UL << HCINTMSK_DTERRM_Pos)           // 0x00000400 */
+#define HCINTMSK_DTERRM                  HCINTMSK_DTERRM_Msk                      // Data toggle error mask */
+
+/********************  Bit definition for DIEPTSIZ register  ********************/
+
+#define DIEPTSIZ_XFRSIZ_Pos              (0U)
+#define DIEPTSIZ_XFRSIZ_Msk              (0x7FFFFUL << DIEPTSIZ_XFRSIZ_Pos)       // 0x0007FFFF */
+#define DIEPTSIZ_XFRSIZ                  DIEPTSIZ_XFRSIZ_Msk                      // Transfer size */
+#define DIEPTSIZ_PKTCNT_Pos              (19U)
+#define DIEPTSIZ_PKTCNT_Msk              (0x3FFUL << DIEPTSIZ_PKTCNT_Pos)         // 0x1FF80000 */
+#define DIEPTSIZ_PKTCNT                  DIEPTSIZ_PKTCNT_Msk                      // Packet count */
+#define DIEPTSIZ_MULCNT_Pos              (29U)
+#define DIEPTSIZ_MULCNT_Msk              (0x3UL << DIEPTSIZ_MULCNT_Pos)           // 0x60000000 */
+#define DIEPTSIZ_MULCNT                  DIEPTSIZ_MULCNT_Msk                      // Packet count */
+                                                                                  /********************  Bit definition for HCTSIZ register  ********************/
+#define HCTSIZ_XFRSIZ_Pos                (0U)
+#define HCTSIZ_XFRSIZ_Msk                (0x7FFFFUL << HCTSIZ_XFRSIZ_Pos)         // 0x0007FFFF */
+#define HCTSIZ_XFRSIZ                    HCTSIZ_XFRSIZ_Msk                        // Transfer size */
+#define HCTSIZ_PKTCNT_Pos                (19U)
+#define HCTSIZ_PKTCNT_Msk                (0x3FFUL << HCTSIZ_PKTCNT_Pos)           // 0x1FF80000 */
+#define HCTSIZ_PKTCNT                    HCTSIZ_PKTCNT_Msk                        // Packet count */
+#define HCTSIZ_DOPING_Pos                (31U)
+#define HCTSIZ_DOPING_Msk                (0x1UL << HCTSIZ_DOPING_Pos)             // 0x80000000 */
+#define HCTSIZ_DOPING                    HCTSIZ_DOPING_Msk                        // Do PING */
+#define HCTSIZ_DPID_Pos                  (29U)
+#define HCTSIZ_DPID_Msk                  (0x3UL << HCTSIZ_DPID_Pos)               // 0x60000000 */
+#define HCTSIZ_DPID                      HCTSIZ_DPID_Msk                          // Data PID */
+#define HCTSIZ_DPID_0                    (0x1UL << HCTSIZ_DPID_Pos)               // 0x20000000 */
+#define HCTSIZ_DPID_1                    (0x2UL << HCTSIZ_DPID_Pos)               // 0x40000000 */
+
+/********************  Bit definition for DIEPDMA register  ********************/
+#define DIEPDMA_DMAADDR_Pos              (0U)
+#define DIEPDMA_DMAADDR_Msk              (0xFFFFFFFFUL << DIEPDMA_DMAADDR_Pos)    // 0xFFFFFFFF */
+#define DIEPDMA_DMAADDR                  DIEPDMA_DMAADDR_Msk                      // DMA address */
+
+/********************  Bit definition for HCDMA register  ********************/
+#define HCDMA_DMAADDR_Pos                (0U)
+#define HCDMA_DMAADDR_Msk                (0xFFFFFFFFUL << HCDMA_DMAADDR_Pos)      // 0xFFFFFFFF */
+#define HCDMA_DMAADDR                    HCDMA_DMAADDR_Msk                        // DMA address */
+
+                                                                                  /********************  Bit definition for DTXFSTS register  ********************/
+#define DTXFSTS_INEPTFSAV_Pos            (0U)
+#define DTXFSTS_INEPTFSAV_Msk            (0xFFFFUL << DTXFSTS_INEPTFSAV_Pos)      // 0x0000FFFF */
+#define DTXFSTS_INEPTFSAV                DTXFSTS_INEPTFSAV_Msk                    // IN endpoint TxFIFO space available */
+
+                                                                                  /********************  Bit definition for DIEPTXF register  ********************/
+#define DIEPTXF_INEPTXSA_Pos             (0U)
+#define DIEPTXF_INEPTXSA_Msk             (0xFFFFUL << DIEPTXF_INEPTXSA_Pos)       // 0x0000FFFF */
+#define DIEPTXF_INEPTXSA                 DIEPTXF_INEPTXSA_Msk                     // IN endpoint FIFOx transmit RAM start address */
+#define DIEPTXF_INEPTXFD_Pos             (16U)
+#define DIEPTXF_INEPTXFD_Msk             (0xFFFFUL << DIEPTXF_INEPTXFD_Pos)       // 0xFFFF0000 */
+#define DIEPTXF_INEPTXFD                 DIEPTXF_INEPTXFD_Msk                     // IN endpoint TxFIFO depth */
+
+/********************  Bit definition for DOEPCTL register  ********************/
+#define DOEPCTL_MPSIZ_Pos                (0U)
+#define DOEPCTL_MPSIZ_Msk                (0x7FFUL << DOEPCTL_MPSIZ_Pos)           // 0x000007FF */
+#define DOEPCTL_MPSIZ                    DOEPCTL_MPSIZ_Msk                        // Maximum packet size */          //Bit 1 */
+#define DOEPCTL_USBAEP_Pos               (15U)
+#define DOEPCTL_USBAEP_Msk               (0x1UL << DOEPCTL_USBAEP_Pos)            // 0x00008000 */
+#define DOEPCTL_USBAEP                   DOEPCTL_USBAEP_Msk                       // USB active endpoint */
+#define DOEPCTL_NAKSTS_Pos               (17U)
+#define DOEPCTL_NAKSTS_Msk               (0x1UL << DOEPCTL_NAKSTS_Pos)            // 0x00020000 */
+#define DOEPCTL_NAKSTS                   DOEPCTL_NAKSTS_Msk                       // NAK status */
+#define DOEPCTL_SD0PID_SEVNFRM_Pos       (28U)
+#define DOEPCTL_SD0PID_SEVNFRM_Msk       (0x1UL << DOEPCTL_SD0PID_SEVNFRM_Pos)    // 0x10000000 */
+#define DOEPCTL_SD0PID_SEVNFRM           DOEPCTL_SD0PID_SEVNFRM_Msk               // Set DATA0 PID */
+#define DOEPCTL_SODDFRM_Pos              (29U)
+#define DOEPCTL_SODDFRM_Msk              (0x1UL << DOEPCTL_SODDFRM_Pos)           // 0x20000000 */
+#define DOEPCTL_SODDFRM                  DOEPCTL_SODDFRM_Msk                      // Set odd frame */
+#define DOEPCTL_EPTYP_Pos                (18U)
+#define DOEPCTL_EPTYP_Msk                (0x3UL << DOEPCTL_EPTYP_Pos)             // 0x000C0000 */
+#define DOEPCTL_EPTYP                    DOEPCTL_EPTYP_Msk                        // Endpoint type */
+#define DOEPCTL_EPTYP_0                  (0x1UL << DOEPCTL_EPTYP_Pos)             // 0x00040000 */
+#define DOEPCTL_EPTYP_1                  (0x2UL << DOEPCTL_EPTYP_Pos)             // 0x00080000 */
+#define DOEPCTL_SNPM_Pos                 (20U)
+#define DOEPCTL_SNPM_Msk                 (0x1UL << DOEPCTL_SNPM_Pos)              // 0x00100000 */
+#define DOEPCTL_SNPM                     DOEPCTL_SNPM_Msk                         // Snoop mode */
+#define DOEPCTL_STALL_Pos                (21U)
+#define DOEPCTL_STALL_Msk                (0x1UL << DOEPCTL_STALL_Pos)             // 0x00200000 */
+#define DOEPCTL_STALL                    DOEPCTL_STALL_Msk                        // STALL handshake */
+#define DOEPCTL_CNAK_Pos                 (26U)
+#define DOEPCTL_CNAK_Msk                 (0x1UL << DOEPCTL_CNAK_Pos)              // 0x04000000 */
+#define DOEPCTL_CNAK                     DOEPCTL_CNAK_Msk                         // Clear NAK */
+#define DOEPCTL_SNAK_Pos                 (27U)
+#define DOEPCTL_SNAK_Msk                 (0x1UL << DOEPCTL_SNAK_Pos)              // 0x08000000 */
+#define DOEPCTL_SNAK                     DOEPCTL_SNAK_Msk                         // Set NAK */
+#define DOEPCTL_EPDIS_Pos                (30U)
+#define DOEPCTL_EPDIS_Msk                (0x1UL << DOEPCTL_EPDIS_Pos)             // 0x40000000 */
+#define DOEPCTL_EPDIS                    DOEPCTL_EPDIS_Msk                        // Endpoint disable */
+#define DOEPCTL_EPENA_Pos                (31U)
+#define DOEPCTL_EPENA_Msk                (0x1UL << DOEPCTL_EPENA_Pos)             // 0x80000000 */
+#define DOEPCTL_EPENA                    DOEPCTL_EPENA_Msk                        // Endpoint enable */
+
+/********************  Bit definition for DOEPINT register  ********************/
+#define DOEPINT_XFRC_Pos                 (0U)
+#define DOEPINT_XFRC_Msk                 (0x1UL << DOEPINT_XFRC_Pos)              // 0x00000001 */
+#define DOEPINT_XFRC                     DOEPINT_XFRC_Msk                         // Transfer completed interrupt */
+#define DOEPINT_EPDISD_Pos               (1U)
+#define DOEPINT_EPDISD_Msk               (0x1UL << DOEPINT_EPDISD_Pos)            // 0x00000002 */
+#define DOEPINT_EPDISD                   DOEPINT_EPDISD_Msk                       // Endpoint disabled interrupt */
+#define DOEPINT_AHBERR_Pos               (2U)
+#define DOEPINT_AHBERR_Msk               (0x1UL << DOEPINT_AHBERR_Pos)            // 0x00000004 */
+#define DOEPINT_AHBERR                   DOEPINT_AHBERR_Msk                       // AHB Error (AHBErr) during an OUT transaction */
+#define DOEPINT_STUP_Pos                 (3U)
+#define DOEPINT_STUP_Msk                 (0x1UL << DOEPINT_STUP_Pos)              // 0x00000008 */
+#define DOEPINT_STUP                     DOEPINT_STUP_Msk                         // SETUP phase done */
+#define DOEPINT_OTEPDIS_Pos              (4U)
+#define DOEPINT_OTEPDIS_Msk              (0x1UL << DOEPINT_OTEPDIS_Pos)           // 0x00000010 */
+#define DOEPINT_OTEPDIS                  DOEPINT_OTEPDIS_Msk                      // OUT token received when endpoint disabled */
+#define DOEPINT_OTEPSPR_Pos              (5U)
+#define DOEPINT_OTEPSPR_Msk              (0x1UL << DOEPINT_OTEPSPR_Pos)           // 0x00000020 */
+#define DOEPINT_OTEPSPR                  DOEPINT_OTEPSPR_Msk                      // Status Phase Received For Control Write */
+#define DOEPINT_B2BSTUP_Pos              (6U)
+#define DOEPINT_B2BSTUP_Msk              (0x1UL << DOEPINT_B2BSTUP_Pos)           // 0x00000040 */
+#define DOEPINT_B2BSTUP                  DOEPINT_B2BSTUP_Msk                      // Back-to-back SETUP packets received */
+#define DOEPINT_OUTPKTERR_Pos            (8U)
+#define DOEPINT_OUTPKTERR_Msk            (0x1UL << DOEPINT_OUTPKTERR_Pos)         // 0x00000100 */
+#define DOEPINT_OUTPKTERR                DOEPINT_OUTPKTERR_Msk                    // OUT packet error */
+#define DOEPINT_NAK_Pos                  (13U)
+#define DOEPINT_NAK_Msk                  (0x1UL << DOEPINT_NAK_Pos)               // 0x00002000 */
+#define DOEPINT_NAK                      DOEPINT_NAK_Msk                          // NAK Packet is transmitted by the device */
+#define DOEPINT_NYET_Pos                 (14U)
+#define DOEPINT_NYET_Msk                 (0x1UL << DOEPINT_NYET_Pos)              // 0x00004000 */
+#define DOEPINT_NYET                     DOEPINT_NYET_Msk                         // NYET interrupt */
+#define DOEPINT_STPKTRX_Pos              (15U)
+#define DOEPINT_STPKTRX_Msk              (0x1UL << DOEPINT_STPKTRX_Pos)           // 0x00008000 */
+#define DOEPINT_STPKTRX                  DOEPINT_STPKTRX_Msk                      // Setup Packet Received */
+
+/********************  Bit definition for DOEPTSIZ register  ********************/
+#define DOEPTSIZ_XFRSIZ_Pos              (0U)
+#define DOEPTSIZ_XFRSIZ_Msk              (0x7FFFFUL << DOEPTSIZ_XFRSIZ_Pos)       // 0x0007FFFF */
+#define DOEPTSIZ_XFRSIZ                  DOEPTSIZ_XFRSIZ_Msk                      // Transfer size */
+#define DOEPTSIZ_PKTCNT_Pos              (19U)
+#define DOEPTSIZ_PKTCNT_Msk              (0x3FFUL << DOEPTSIZ_PKTCNT_Pos)         // 0x1FF80000 */
+#define DOEPTSIZ_PKTCNT                  DOEPTSIZ_PKTCNT_Msk                      // Packet count */
+
+#define DOEPTSIZ_STUPCNT_Pos             (29U)
+#define DOEPTSIZ_STUPCNT_Msk             (0x3UL << DOEPTSIZ_STUPCNT_Pos)          // 0x60000000 */
+#define DOEPTSIZ_STUPCNT                 DOEPTSIZ_STUPCNT_Msk                     // SETUP packet count */
+#define DOEPTSIZ_STUPCNT_0               (0x1UL << DOEPTSIZ_STUPCNT_Pos)          // 0x20000000 */
+#define DOEPTSIZ_STUPCNT_1               (0x2UL << DOEPTSIZ_STUPCNT_Pos)          // 0x40000000 */
+
+/********************  Bit definition for PCGCTL register  ********************/
+#define PCGCTL_IF_DEV_MODE              TU_BIT(31)
+#define PCGCTL_P2HD_PRT_SPD_MASK        (0x3ul << 29)
+#define PCGCTL_P2HD_PRT_SPD_SHIFT       29
+#define PCGCTL_P2HD_DEV_ENUM_SPD_MASK   (0x3ul << 27)
+#define PCGCTL_P2HD_DEV_ENUM_SPD_SHIFT  27
+#define PCGCTL_MAC_DEV_ADDR_MASK        (0x7ful << 20)
+#define PCGCTL_MAC_DEV_ADDR_SHIFT       20
+#define PCGCTL_MAX_TERMSEL              TU_BIT(19)
+#define PCGCTL_MAX_XCVRSELECT_MASK      (0x3ul << 17)
+#define PCGCTL_MAX_XCVRSELECT_SHIFT     17
+#define PCGCTL_PORT_POWER               TU_BIT(16)
+#define PCGCTL_PRT_CLK_SEL_MASK         (0x3ul << 14)
+#define PCGCTL_PRT_CLK_SEL_SHIFT        14
+#define PCGCTL_ESS_REG_RESTORED         TU_BIT(13)
+#define PCGCTL_EXTND_HIBER_SWITCH       TU_BIT(12)
+#define PCGCTL_EXTND_HIBER_PWRCLMP      TU_BIT(11)
+#define PCGCTL_ENBL_EXTND_HIBER         TU_BIT(10)
+#define PCGCTL_RESTOREMODE              TU_BIT(9)
+#define PCGCTL_RESETAFTSUSP             TU_BIT(8)
+#define PCGCTL_DEEP_SLEEP               TU_BIT(7)
+#define PCGCTL_PHY_IN_SLEEP             TU_BIT(6)
+#define PCGCTL_ENBL_SLEEP_GATING        TU_BIT(5)
+#define PCGCTL_RSTPDWNMODULE            TU_BIT(3)
+#define PCGCTL_PWRCLMP                  TU_BIT(2)
+#define PCGCTL_GATEHCLK                 TU_BIT(1)
+#define PCGCTL_STOPPCLK                 TU_BIT(0)
+
+#define PCGCTL1_TIMER                   (0x3ul << 1)
+#define PCGCTL1_GATEEN                  TU_BIT(0)
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_xmc.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_xmc.h
new file mode 100644
index 00000000000..4e6bebb0167
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/synopsys/dwc2/dwc2_xmc.h
@@ -0,0 +1,87 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Rafael Silva (@perigoso)
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _DWC2_XMC_H_
+#define _DWC2_XMC_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "xmc_device.h"
+
+// XMC has custom control register before DWC registers
+#define DWC2_REG_BASE       USB0_BASE
+#define DWC2_EP_MAX         7
+#define DWC2_EP_FIFO_SIZE   2048
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_enable(uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_EnableIRQ(USB0_0_IRQn);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_dcd_int_disable (uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_DisableIRQ(USB0_0_IRQn);
+}
+
+static inline void dwc2_remote_wakeup_delay(void)
+{
+  // try to delay for 1 ms
+//  uint32_t count = SystemCoreClock / 1000;
+//  while ( count-- ) __NOP();
+}
+
+// MCU specific PHY init, called BEFORE core reset
+static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // Enable PHY
+  //USB->ROUTE = USB_ROUTE_PHYPEN;
+}
+
+// MCU specific PHY update, it is called AFTER init() and core reset
+static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // XMC Manual: turn around must be 5 (reset & default value)
+  // dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_TRDT_Msk) | (5u << GUSBCFG_TRDT_Pos);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/valentyusb/eptri/dcd_eptri.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/valentyusb/eptri/dcd_eptri.h
new file mode 100644
index 00000000000..0fa6ecc64c5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/portable/valentyusb/eptri/dcd_eptri.h
@@ -0,0 +1,39 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_DCD_VALENTYUSB_EPTRI_H_
+#define _TUSB_DCD_VALENTYUSB_EPTRI_H_
+
+#include "common/tusb_common.h"
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_DCD_VALENTYUSB_EPTRI_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/tusb.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/tusb.h
new file mode 100644
index 00000000000..b776d7d010f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/tusb.h
@@ -0,0 +1,138 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_H_
+#define _TUSB_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// INCLUDE
+//--------------------------------------------------------------------+
+#include "common/tusb_common.h"
+#include "osal/osal.h"
+#include "common/tusb_fifo.h"
+
+#include "class/hid/hid.h"
+
+//------------- HOST -------------//
+#if CFG_TUH_ENABLED
+  #include "host/usbh.h"
+
+  #if CFG_TUH_HID
+    #include "class/hid/hid_host.h"
+  #endif
+
+  #if CFG_TUH_MSC
+    #include "class/msc/msc_host.h"
+  #endif
+
+  #if CFG_TUH_CDC
+    #include "class/cdc/cdc_host.h"
+  #endif
+
+  #if CFG_TUH_VENDOR
+    #include "class/vendor/vendor_host.h"
+  #endif
+
+#endif
+
+//------------- DEVICE -------------//
+#if CFG_TUD_ENABLED
+  #include "device/usbd.h"
+
+  #if CFG_TUD_HID
+    #include "class/hid/hid_device.h"
+  #endif
+
+  #if CFG_TUD_CDC
+    #include "class/cdc/cdc_device.h"
+  #endif
+
+  #if CFG_TUD_MSC
+    #include "class/msc/msc_device.h"
+  #endif
+
+  #if CFG_TUD_AUDIO
+    #include "class/audio/audio_device.h"
+  #endif
+
+  #if CFG_TUD_VIDEO
+    #include "class/video/video_device.h"
+  #endif
+
+  #if CFG_TUD_MIDI
+    #include "class/midi/midi_device.h"
+  #endif
+
+  #if CFG_TUD_VENDOR
+    #include "class/vendor/vendor_device.h"
+  #endif
+
+  #if CFG_TUD_USBTMC
+    #include "class/usbtmc/usbtmc_device.h"
+  #endif
+
+  #if CFG_TUD_DFU_RUNTIME
+    #include "class/dfu/dfu_rt_device.h"
+  #endif
+
+  #if CFG_TUD_DFU
+    #include "class/dfu/dfu_device.h"
+  #endif
+
+  #if CFG_TUD_ECM_RNDIS || CFG_TUD_NCM
+    #include "class/net/net_device.h"
+  #endif
+
+  #if CFG_TUD_BTH
+    #include "class/bth/bth_device.h"
+  #endif
+#endif
+
+
+//--------------------------------------------------------------------+
+// APPLICATION API
+//--------------------------------------------------------------------+
+
+// Initialize device/host stack
+// Note: when using with RTOS, this should be called after scheduler/kernel is started.
+// Otherwise it could cause kernel issue since USB IRQ handler does use RTOS queue API.
+bool tusb_init(void);
+
+// Check if stack is initialized
+bool tusb_inited(void);
+
+// TODO
+// bool tusb_teardown(void);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_H_ */
diff --git a/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/tusb_option.h b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/tusb_option.h
new file mode 100644
index 00000000000..bd87a953c47
--- /dev/null
+++ b/tools/sdk/esp32s3/include/arduino_tinyusb/tinyusb/src/tusb_option.h
@@ -0,0 +1,408 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_OPTION_H_
+#define _TUSB_OPTION_H_
+
+#include "common/tusb_compiler.h"
+
+#define TUSB_VERSION_MAJOR     0
+#define TUSB_VERSION_MINOR     13
+#define TUSB_VERSION_REVISION  0
+#define TUSB_VERSION_STRING    TU_STRING(TUSB_VERSION_MAJOR) "." TU_STRING(TUSB_VERSION_MINOR) "." TU_STRING(TUSB_VERSION_REVISION)
+
+//--------------------------------------------------------------------+
+// Supported MCUs
+// CFG_TUSB_MCU must be defined to one of following value
+//--------------------------------------------------------------------+
+
+#define OPT_MCU_NONE                0
+
+// LPC
+#define OPT_MCU_LPC11UXX            1 ///< NXP LPC11Uxx
+#define OPT_MCU_LPC13XX             2 ///< NXP LPC13xx
+#define OPT_MCU_LPC15XX             3 ///< NXP LPC15xx
+#define OPT_MCU_LPC175X_6X          4 ///< NXP LPC175x, LPC176x
+#define OPT_MCU_LPC177X_8X          5 ///< NXP LPC177x, LPC178x
+#define OPT_MCU_LPC18XX             6 ///< NXP LPC18xx
+#define OPT_MCU_LPC40XX             7 ///< NXP LPC40xx
+#define OPT_MCU_LPC43XX             8 ///< NXP LPC43xx
+#define OPT_MCU_LPC51UXX            9 ///< NXP LPC51U6x
+#define OPT_MCU_LPC54XXX           10 ///< NXP LPC54xxx
+#define OPT_MCU_LPC55XX            11 ///< NXP LPC55xx
+
+// NRF
+#define OPT_MCU_NRF5X             100 ///< Nordic nRF5x series
+
+// SAM
+#define OPT_MCU_SAMD21            200 ///< MicroChip SAMD21
+#define OPT_MCU_SAMD51            201 ///< MicroChip SAMD51
+#define OPT_MCU_SAMG              202 ///< MicroChip SAMDG series
+#define OPT_MCU_SAME5X            203 ///< MicroChip SAM E5x
+#define OPT_MCU_SAMD11            204 ///< MicroChip SAMD11
+#define OPT_MCU_SAML22            205 ///< MicroChip SAML22
+#define OPT_MCU_SAML21            206 ///< MicroChip SAML21
+#define OPT_MCU_SAMX7X            207 ///< MicroChip SAME70, S70, V70, V71 family
+
+// STM32
+#define OPT_MCU_STM32F0           300 ///< ST F0
+#define OPT_MCU_STM32F1           301 ///< ST F1
+#define OPT_MCU_STM32F2           302 ///< ST F2
+#define OPT_MCU_STM32F3           303 ///< ST F3
+#define OPT_MCU_STM32F4           304 ///< ST F4
+#define OPT_MCU_STM32F7           305 ///< ST F7
+#define OPT_MCU_STM32H7           306 ///< ST H7
+#define OPT_MCU_STM32L1           308 ///< ST L1
+#define OPT_MCU_STM32L0           307 ///< ST L0
+#define OPT_MCU_STM32L4           309 ///< ST L4
+#define OPT_MCU_STM32G0           310 ///< ST G0
+#define OPT_MCU_STM32G4           311 ///< ST G4
+#define OPT_MCU_STM32WB           312 ///< ST WB
+
+// Sony
+#define OPT_MCU_CXD56             400 ///< SONY CXD56
+
+// TI
+#define OPT_MCU_MSP430x5xx        500 ///< TI MSP430x5xx
+#define OPT_MCU_MSP432E4          510 ///< TI MSP432E4xx
+#define OPT_MCU_TM4C123           511 ///< TI Tiva-C 123x
+#define OPT_MCU_TM4C129           512 ///< TI Tiva-C 129x
+
+// ValentyUSB eptri
+#define OPT_MCU_VALENTYUSB_EPTRI  600 ///< Fomu eptri config
+
+// NXP iMX RT
+#define OPT_MCU_MIMXRT10XX        700 ///< NXP iMX RT10xx
+
+// Nuvoton
+#define OPT_MCU_NUC121            800
+#define OPT_MCU_NUC126            801
+#define OPT_MCU_NUC120            802
+#define OPT_MCU_NUC505            803
+
+// Espressif
+#define OPT_MCU_ESP32S2           900 ///< Espressif ESP32-S2
+#define OPT_MCU_ESP32S3           901 ///< Espressif ESP32-S3
+
+// Dialog
+#define OPT_MCU_DA1469X          1000 ///< Dialog Semiconductor DA1469x
+
+// Raspberry Pi
+#define OPT_MCU_RP2040           1100 ///< Raspberry Pi RP2040
+
+// NXP Kinetis
+#define OPT_MCU_MKL25ZXX         1200 ///< NXP MKL25Zxx
+#define OPT_MCU_K32L2BXX         1201 ///< NXP K32L2Bxx
+
+// Silabs
+#define OPT_MCU_EFM32GG          1300 ///< Silabs EFM32GG
+
+// Renesas RX
+#define OPT_MCU_RX63X            1400 ///< Renesas RX63N/631
+#define OPT_MCU_RX65X            1401 ///< Renesas RX65N/RX651
+#define OPT_MCU_RX72N            1402 ///< Renesas RX72N
+
+// Mind Motion
+#define OPT_MCU_MM32F327X        1500 ///< Mind Motion MM32F327
+
+// GigaDevice
+#define OPT_MCU_GD32VF103        1600 ///< GigaDevice GD32VF103
+
+// Broadcom
+#define OPT_MCU_BCM2711          1700 ///< Broadcom BCM2711
+#define OPT_MCU_BCM2835          1701 ///< Broadcom BCM2835
+#define OPT_MCU_BCM2837          1702 ///< Broadcom BCM2837
+
+// Infineon
+#define OPT_MCU_XMC4000          1800 ///< Infineon XMC4000
+
+// PIC
+#define OPT_MCU_PIC32MZ          1900 ///< MicroChip PIC32MZ family
+
+// BridgeTek
+#define OPT_MCU_FT90X            2000 ///< BridgeTek FT90x
+#define OPT_MCU_FT93X            2001 ///< BridgeTek FT93x
+
+// Allwinner
+#define OPT_MCU_F1C100S          2100 ///< Allwinner F1C100s family
+
+// Helper to check if configured MCU is one of listed
+// Apply _TU_CHECK_MCU with || as separator to list of input
+#define _TU_CHECK_MCU(_m)   (CFG_TUSB_MCU == _m)
+#define TU_CHECK_MCU(...)   (TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__))
+
+//--------------------------------------------------------------------+
+// Supported OS
+//--------------------------------------------------------------------+
+
+#define OPT_OS_NONE       1  ///< No RTOS
+#define OPT_OS_FREERTOS   2  ///< FreeRTOS
+#define OPT_OS_MYNEWT     3  ///< Mynewt OS
+#define OPT_OS_CUSTOM     4  ///< Custom OS is implemented by application
+#define OPT_OS_PICO       5  ///< Raspberry Pi Pico SDK
+#define OPT_OS_RTTHREAD   6  ///< RT-Thread
+#define OPT_OS_RTX4       7  ///< Keil RTX 4
+
+// Allow to use command line to change the config name/location
+#ifdef CFG_TUSB_CONFIG_FILE
+  #include CFG_TUSB_CONFIG_FILE
+#else
+  #include "tusb_config.h"
+#endif
+
+#include "common/tusb_mcu.h"
+
+//--------------------------------------------------------------------
+// RootHub Mode Configuration
+// CFG_TUSB_RHPORTx_MODE contains operation mode and speed for that port
+//--------------------------------------------------------------------
+
+// Low byte is operational mode
+#define OPT_MODE_NONE           0x0000 ///< Disabled
+#define OPT_MODE_DEVICE         0x0001 ///< Device Mode
+#define OPT_MODE_HOST           0x0002 ///< Host Mode
+
+// High byte is max operational speed (corresponding to tusb_speed_t)
+#define OPT_MODE_DEFAULT_SPEED  0x0000 ///< Default (max) speed supported by MCU
+#define OPT_MODE_LOW_SPEED      0x0100 ///< Low Speed
+#define OPT_MODE_FULL_SPEED     0x0200 ///< Full Speed
+#define OPT_MODE_HIGH_SPEED     0x0400 ///< High Speed
+#define OPT_MODE_SPEED_MASK     0xff00
+
+#ifndef CFG_TUSB_RHPORT0_MODE
+  #define CFG_TUSB_RHPORT0_MODE OPT_MODE_NONE
+#endif
+
+#ifndef CFG_TUSB_RHPORT1_MODE
+  #define CFG_TUSB_RHPORT1_MODE OPT_MODE_NONE
+#endif
+
+#if (((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST  ) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST  )) || \
+    (((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE))
+  #error "TinyUSB currently does not support same modes on more than 1 roothub port"
+#endif
+
+//------------- Roothub as Device -------------//
+
+#if (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE
+  #define TUD_RHPORT_MODE     (CFG_TUSB_RHPORT0_MODE)
+  #define TUD_OPT_RHPORT      0
+#elif (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE
+  #define TUD_RHPORT_MODE     (CFG_TUSB_RHPORT1_MODE)
+  #define TUD_OPT_RHPORT      1
+#else
+  #define TUD_RHPORT_MODE     OPT_MODE_NONE
+  #define TUD_OPT_RHPORT      -1
+#endif
+
+#define CFG_TUD_ENABLED       (TUD_RHPORT_MODE & OPT_MODE_DEVICE)
+
+#if CFG_TUD_ENABLED
+  #define TUD_OPT_HIGH_SPEED  ((TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) ? (TUD_RHPORT_MODE & OPT_MODE_HIGH_SPEED) : (TUP_RHPORT_HIGHSPEED & (1 << TUD_OPT_RHPORT)))
+#else
+  #define TUD_OPT_HIGH_SPEED  0
+#endif
+
+//------------- Roothub as Host -------------//
+
+#if (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST
+  #define TUH_RHPORT_MODE  (CFG_TUSB_RHPORT0_MODE)
+  #define TUH_OPT_RHPORT   0
+#elif (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST
+  #define TUH_RHPORT_MODE  (CFG_TUSB_RHPORT1_MODE)
+  #define TUH_OPT_RHPORT   1
+#else
+  #define TUH_RHPORT_MODE   OPT_MODE_NONE
+  #define TUH_OPT_RHPORT   -1
+#endif
+
+#define CFG_TUH_ENABLED     ( TUH_RHPORT_MODE & OPT_MODE_HOST )
+
+// For backward compatible
+#define TUSB_OPT_DEVICE_ENABLED CFG_TUD_ENABLED
+#define TUSB_OPT_HOST_ENABLED   CFG_TUH_ENABLED
+
+// TODO move later
+// TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN.
+// In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler
+// to generate unaligned access code.
+// LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM
+#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX)
+  #define TUP_MCU_STRICT_ALIGN   1
+#else
+  #define TUP_MCU_STRICT_ALIGN   0
+#endif
+
+
+//--------------------------------------------------------------------+
+// COMMON OPTIONS
+//--------------------------------------------------------------------+
+
+// Debug enable to print out error message
+#ifndef CFG_TUSB_DEBUG
+  #define CFG_TUSB_DEBUG 0
+#endif
+
+// place data in accessible RAM for usb controller
+#ifndef CFG_TUSB_MEM_SECTION
+  #define CFG_TUSB_MEM_SECTION
+#endif
+
+// alignment requirement of buffer used for endpoint transferring
+#ifndef CFG_TUSB_MEM_ALIGN
+  #define CFG_TUSB_MEM_ALIGN      TU_ATTR_ALIGNED(4)
+#endif
+
+// OS selection
+#ifndef CFG_TUSB_OS
+  #define CFG_TUSB_OS             OPT_OS_NONE
+#endif
+
+#ifndef CFG_TUSB_OS_INC_PATH
+  #define CFG_TUSB_OS_INC_PATH
+#endif
+
+// mutex is only needed for RTOS TODO also required with multiple core MCUs
+#define TUSB_OPT_MUTEX    (CFG_TUSB_OS != OPT_OS_NONE)
+
+//--------------------------------------------------------------------
+// DEVICE OPTIONS
+//--------------------------------------------------------------------
+
+#ifndef CFG_TUD_ENDPOINT0_SIZE
+  #define CFG_TUD_ENDPOINT0_SIZE  64
+#endif
+
+#ifndef CFG_TUD_CDC
+  #define CFG_TUD_CDC             0
+#endif
+
+#ifndef CFG_TUD_MSC
+  #define CFG_TUD_MSC             0
+#endif
+
+#ifndef CFG_TUD_HID
+  #define CFG_TUD_HID             0
+#endif
+
+#ifndef CFG_TUD_AUDIO
+  #define CFG_TUD_AUDIO           0
+#endif
+
+#ifndef CFG_TUD_VIDEO
+  #define CFG_TUD_VIDEO           0
+#endif
+
+#ifndef CFG_TUD_MIDI
+  #define CFG_TUD_MIDI            0
+#endif
+
+#ifndef CFG_TUD_VENDOR
+  #define CFG_TUD_VENDOR          0
+#endif
+
+#ifndef CFG_TUD_USBTMC
+  #define CFG_TUD_USBTMC          0
+#endif
+
+#ifndef CFG_TUD_DFU_RUNTIME
+  #define CFG_TUD_DFU_RUNTIME     0
+#endif
+
+#ifndef CFG_TUD_DFU
+  #define CFG_TUD_DFU             0
+#endif
+
+#ifndef CFG_TUD_BTH
+  #define CFG_TUD_BTH             0
+#endif
+
+#ifndef CFG_TUD_ECM_RNDIS
+  #ifdef CFG_TUD_NET
+    #warning "CFG_TUD_NET is renamed to CFG_TUD_ECM_RNDIS"
+    #define CFG_TUD_ECM_RNDIS   CFG_TUD_NET
+  #else
+    #define CFG_TUD_ECM_RNDIS   0
+  #endif
+#endif
+
+#ifndef CFG_TUD_NCM
+  #define CFG_TUD_NCM         0
+#endif
+
+//--------------------------------------------------------------------
+// HOST OPTIONS
+//--------------------------------------------------------------------
+#if CFG_TUH_ENABLED
+  #ifndef CFG_TUH_DEVICE_MAX
+    #define CFG_TUH_DEVICE_MAX 1
+  #endif
+
+  #ifndef CFG_TUH_ENUMERATION_BUFSIZE
+    #define CFG_TUH_ENUMERATION_BUFSIZE 256
+  #endif
+#endif // CFG_TUH_ENABLED
+
+//------------- CLASS -------------//
+
+#ifndef CFG_TUH_HUB
+#define CFG_TUH_HUB    0
+#endif
+
+#ifndef CFG_TUH_CDC
+#define CFG_TUH_CDC    0
+#endif
+
+#ifndef CFG_TUH_HID
+#define CFG_TUH_HID    0
+#endif
+
+#ifndef CFG_TUH_MIDI
+#define CFG_TUH_MIDI   0
+#endif
+
+#ifndef CFG_TUH_MSC
+#define CFG_TUH_MSC    0
+#endif
+
+#ifndef CFG_TUH_VENDOR
+#define CFG_TUH_VENDOR 0
+#endif
+
+#ifndef CFG_TUH_API_EDPT_XFER
+#define CFG_TUH_API_EDPT_XFER 0
+#endif
+
+//------------------------------------------------------------------
+// Configuration Validation
+//------------------------------------------------------------------
+#if CFG_TUD_ENDPOINT0_SIZE > 64
+  #error Control Endpoint Max Packet Size cannot be larger than 64
+#endif
+
+#endif /* _TUSB_OPTION_H_ */
+
+/** @} */
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio.hpp
new file mode 100644
index 00000000000..4d0ea107fb0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio.hpp
@@ -0,0 +1,151 @@
+//
+// asio.hpp
+// ~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_HPP
+#define ASIO_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#if defined(ESP_PLATFORM)
+# include "esp_asio_config.h"
+#endif // defined(ESP_PLATFORM)
+
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/async_result.hpp"
+#include "asio/awaitable.hpp"
+#include "asio/basic_datagram_socket.hpp"
+#include "asio/basic_deadline_timer.hpp"
+#include "asio/basic_io_object.hpp"
+#include "asio/basic_raw_socket.hpp"
+#include "asio/basic_seq_packet_socket.hpp"
+#include "asio/basic_serial_port.hpp"
+#include "asio/basic_signal_set.hpp"
+#include "asio/basic_socket.hpp"
+#include "asio/basic_socket_acceptor.hpp"
+#include "asio/basic_socket_iostream.hpp"
+#include "asio/basic_socket_streambuf.hpp"
+#include "asio/basic_stream_socket.hpp"
+#include "asio/basic_streambuf.hpp"
+#include "asio/basic_waitable_timer.hpp"
+#include "asio/bind_executor.hpp"
+#include "asio/buffer.hpp"
+#include "asio/buffered_read_stream_fwd.hpp"
+#include "asio/buffered_read_stream.hpp"
+#include "asio/buffered_stream_fwd.hpp"
+#include "asio/buffered_stream.hpp"
+#include "asio/buffered_write_stream_fwd.hpp"
+#include "asio/buffered_write_stream.hpp"
+#include "asio/buffers_iterator.hpp"
+#include "asio/co_spawn.hpp"
+#include "asio/completion_condition.hpp"
+#include "asio/compose.hpp"
+#include "asio/connect.hpp"
+#include "asio/coroutine.hpp"
+#include "asio/deadline_timer.hpp"
+#include "asio/defer.hpp"
+#include "asio/detached.hpp"
+#include "asio/dispatch.hpp"
+#include "asio/error.hpp"
+#include "asio/error_code.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/executor.hpp"
+#include "asio/executor_work_guard.hpp"
+#include "asio/generic/basic_endpoint.hpp"
+#include "asio/generic/datagram_protocol.hpp"
+#include "asio/generic/raw_protocol.hpp"
+#include "asio/generic/seq_packet_protocol.hpp"
+#include "asio/generic/stream_protocol.hpp"
+#include "asio/handler_alloc_hook.hpp"
+#include "asio/handler_continuation_hook.hpp"
+#include "asio/handler_invoke_hook.hpp"
+#include "asio/high_resolution_timer.hpp"
+#include "asio/io_context.hpp"
+#include "asio/io_context_strand.hpp"
+#include "asio/io_service.hpp"
+#include "asio/io_service_strand.hpp"
+#include "asio/ip/address.hpp"
+#include "asio/ip/address_v4.hpp"
+#include "asio/ip/address_v4_iterator.hpp"
+#include "asio/ip/address_v4_range.hpp"
+#include "asio/ip/address_v6.hpp"
+#include "asio/ip/address_v6_iterator.hpp"
+#include "asio/ip/address_v6_range.hpp"
+#include "asio/ip/network_v4.hpp"
+#include "asio/ip/network_v6.hpp"
+#include "asio/ip/bad_address_cast.hpp"
+#include "asio/ip/basic_endpoint.hpp"
+#include "asio/ip/basic_resolver.hpp"
+#include "asio/ip/basic_resolver_entry.hpp"
+#include "asio/ip/basic_resolver_iterator.hpp"
+#include "asio/ip/basic_resolver_query.hpp"
+#include "asio/ip/host_name.hpp"
+#include "asio/ip/icmp.hpp"
+#include "asio/ip/multicast.hpp"
+#include "asio/ip/resolver_base.hpp"
+#include "asio/ip/resolver_query_base.hpp"
+#include "asio/ip/tcp.hpp"
+#include "asio/ip/udp.hpp"
+#include "asio/ip/unicast.hpp"
+#include "asio/ip/v6_only.hpp"
+#include "asio/is_executor.hpp"
+#include "asio/is_read_buffered.hpp"
+#include "asio/is_write_buffered.hpp"
+#include "asio/local/basic_endpoint.hpp"
+#include "asio/local/connect_pair.hpp"
+#include "asio/local/datagram_protocol.hpp"
+#include "asio/local/stream_protocol.hpp"
+#include "asio/packaged_task.hpp"
+#include "asio/placeholders.hpp"
+#include "asio/posix/basic_descriptor.hpp"
+#include "asio/posix/basic_stream_descriptor.hpp"
+#include "asio/posix/descriptor.hpp"
+#include "asio/posix/descriptor_base.hpp"
+#include "asio/posix/stream_descriptor.hpp"
+#include "asio/post.hpp"
+#include "asio/read.hpp"
+#include "asio/read_at.hpp"
+#include "asio/read_until.hpp"
+#include "asio/redirect_error.hpp"
+#include "asio/serial_port.hpp"
+#include "asio/serial_port_base.hpp"
+#include "asio/signal_set.hpp"
+#include "asio/socket_base.hpp"
+#include "asio/steady_timer.hpp"
+#include "asio/strand.hpp"
+#include "asio/streambuf.hpp"
+#include "asio/system_context.hpp"
+#include "asio/system_error.hpp"
+#include "asio/system_executor.hpp"
+#include "asio/system_timer.hpp"
+#include "asio/this_coro.hpp"
+#include "asio/thread.hpp"
+#include "asio/thread_pool.hpp"
+#include "asio/time_traits.hpp"
+#include "asio/use_awaitable.hpp"
+#include "asio/use_future.hpp"
+#include "asio/uses_executor.hpp"
+#include "asio/version.hpp"
+#include "asio/wait_traits.hpp"
+#include "asio/windows/basic_object_handle.hpp"
+#include "asio/windows/basic_overlapped_handle.hpp"
+#include "asio/windows/basic_random_access_handle.hpp"
+#include "asio/windows/basic_stream_handle.hpp"
+#include "asio/windows/object_handle.hpp"
+#include "asio/windows/overlapped_handle.hpp"
+#include "asio/windows/overlapped_ptr.hpp"
+#include "asio/windows/random_access_handle.hpp"
+#include "asio/windows/stream_handle.hpp"
+#include "asio/write.hpp"
+#include "asio/write_at.hpp"
+
+#endif // ASIO_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/associated_allocator.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/associated_allocator.hpp
new file mode 100644
index 00000000000..02d6538e501
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/associated_allocator.hpp
@@ -0,0 +1,131 @@
+//
+// associated_allocator.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_ASSOCIATED_ALLOCATOR_HPP
+#define ASIO_ASSOCIATED_ALLOCATOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <memory>
+#include "asio/detail/type_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename>
+struct associated_allocator_check
+{
+  typedef void type;
+};
+
+template <typename T, typename E, typename = void>
+struct associated_allocator_impl
+{
+  typedef E type;
+
+  static type get(const T&, const E& e) ASIO_NOEXCEPT
+  {
+    return e;
+  }
+};
+
+template <typename T, typename E>
+struct associated_allocator_impl<T, E,
+  typename associated_allocator_check<typename T::allocator_type>::type>
+{
+  typedef typename T::allocator_type type;
+
+  static type get(const T& t, const E&) ASIO_NOEXCEPT
+  {
+    return t.get_allocator();
+  }
+};
+
+} // namespace detail
+
+/// Traits type used to obtain the allocator associated with an object.
+/**
+ * A program may specialise this traits type if the @c T template parameter in
+ * the specialisation is a user-defined type. The template parameter @c
+ * Allocator shall be a type meeting the Allocator requirements.
+ *
+ * Specialisations shall meet the following requirements, where @c t is a const
+ * reference to an object of type @c T, and @c a is an object of type @c
+ * Allocator.
+ *
+ * @li Provide a nested typedef @c type that identifies a type meeting the
+ * Allocator requirements.
+ *
+ * @li Provide a noexcept static member function named @c get, callable as @c
+ * get(t) and with return type @c type.
+ *
+ * @li Provide a noexcept static member function named @c get, callable as @c
+ * get(t,a) and with return type @c type.
+ */
+template <typename T, typename Allocator = std::allocator<void> >
+struct associated_allocator
+{
+  /// If @c T has a nested type @c allocator_type, <tt>T::allocator_type</tt>.
+  /// Otherwise @c Allocator.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef see_below type;
+#else // defined(GENERATING_DOCUMENTATION)
+  typedef typename detail::associated_allocator_impl<T, Allocator>::type type;
+#endif // defined(GENERATING_DOCUMENTATION)
+
+  /// If @c T has a nested type @c allocator_type, returns
+  /// <tt>t.get_allocator()</tt>. Otherwise returns @c a.
+  static type get(const T& t,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return detail::associated_allocator_impl<T, Allocator>::get(t, a);
+  }
+};
+
+/// Helper function to obtain an object's associated allocator.
+/**
+ * @returns <tt>associated_allocator<T>::get(t)</tt>
+ */
+template <typename T>
+inline typename associated_allocator<T>::type
+get_associated_allocator(const T& t) ASIO_NOEXCEPT
+{
+  return associated_allocator<T>::get(t);
+}
+
+/// Helper function to obtain an object's associated allocator.
+/**
+ * @returns <tt>associated_allocator<T, Allocator>::get(t, a)</tt>
+ */
+template <typename T, typename Allocator>
+inline typename associated_allocator<T, Allocator>::type
+get_associated_allocator(const T& t, const Allocator& a) ASIO_NOEXCEPT
+{
+  return associated_allocator<T, Allocator>::get(t, a);
+}
+
+#if defined(ASIO_HAS_ALIAS_TEMPLATES)
+
+template <typename T, typename Allocator = std::allocator<void> >
+using associated_allocator_t
+  = typename associated_allocator<T, Allocator>::type;
+
+#endif // defined(ASIO_HAS_ALIAS_TEMPLATES)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_ASSOCIATED_ALLOCATOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/associated_executor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/associated_executor.hpp
new file mode 100644
index 00000000000..7fe6af5b02e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/associated_executor.hpp
@@ -0,0 +1,149 @@
+//
+// associated_executor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_ASSOCIATED_EXECUTOR_HPP
+#define ASIO_ASSOCIATED_EXECUTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/is_executor.hpp"
+#include "asio/system_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename>
+struct associated_executor_check
+{
+  typedef void type;
+};
+
+template <typename T, typename E, typename = void>
+struct associated_executor_impl
+{
+  typedef E type;
+
+  static type get(const T&, const E& e) ASIO_NOEXCEPT
+  {
+    return e;
+  }
+};
+
+template <typename T, typename E>
+struct associated_executor_impl<T, E,
+  typename associated_executor_check<typename T::executor_type>::type>
+{
+  typedef typename T::executor_type type;
+
+  static type get(const T& t, const E&) ASIO_NOEXCEPT
+  {
+    return t.get_executor();
+  }
+};
+
+} // namespace detail
+
+/// Traits type used to obtain the executor associated with an object.
+/**
+ * A program may specialise this traits type if the @c T template parameter in
+ * the specialisation is a user-defined type. The template parameter @c
+ * Executor shall be a type meeting the Executor requirements.
+ *
+ * Specialisations shall meet the following requirements, where @c t is a const
+ * reference to an object of type @c T, and @c e is an object of type @c
+ * Executor.
+ *
+ * @li Provide a nested typedef @c type that identifies a type meeting the
+ * Executor requirements.
+ *
+ * @li Provide a noexcept static member function named @c get, callable as @c
+ * get(t) and with return type @c type.
+ *
+ * @li Provide a noexcept static member function named @c get, callable as @c
+ * get(t,e) and with return type @c type.
+ */
+template <typename T, typename Executor = system_executor>
+struct associated_executor
+{
+  /// If @c T has a nested type @c executor_type, <tt>T::executor_type</tt>.
+  /// Otherwise @c Executor.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef see_below type;
+#else // defined(GENERATING_DOCUMENTATION)
+  typedef typename detail::associated_executor_impl<T, Executor>::type type;
+#endif // defined(GENERATING_DOCUMENTATION)
+
+  /// If @c T has a nested type @c executor_type, returns
+  /// <tt>t.get_executor()</tt>. Otherwise returns @c ex.
+  static type get(const T& t,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return detail::associated_executor_impl<T, Executor>::get(t, ex);
+  }
+};
+
+/// Helper function to obtain an object's associated executor.
+/**
+ * @returns <tt>associated_executor<T>::get(t)</tt>
+ */
+template <typename T>
+inline typename associated_executor<T>::type
+get_associated_executor(const T& t) ASIO_NOEXCEPT
+{
+  return associated_executor<T>::get(t);
+}
+
+/// Helper function to obtain an object's associated executor.
+/**
+ * @returns <tt>associated_executor<T, Executor>::get(t, ex)</tt>
+ */
+template <typename T, typename Executor>
+inline typename associated_executor<T, Executor>::type
+get_associated_executor(const T& t, const Executor& ex,
+    typename enable_if<is_executor<
+      Executor>::value>::type* = 0) ASIO_NOEXCEPT
+{
+  return associated_executor<T, Executor>::get(t, ex);
+}
+
+/// Helper function to obtain an object's associated executor.
+/**
+ * @returns <tt>associated_executor<T, typename
+ * ExecutionContext::executor_type>::get(t, ctx.get_executor())</tt>
+ */
+template <typename T, typename ExecutionContext>
+inline typename associated_executor<T,
+  typename ExecutionContext::executor_type>::type
+get_associated_executor(const T& t, ExecutionContext& ctx,
+    typename enable_if<is_convertible<ExecutionContext&,
+      execution_context&>::value>::type* = 0) ASIO_NOEXCEPT
+{
+  return associated_executor<T,
+    typename ExecutionContext::executor_type>::get(t, ctx.get_executor());
+}
+
+#if defined(ASIO_HAS_ALIAS_TEMPLATES)
+
+template <typename T, typename Executor = system_executor>
+using associated_executor_t = typename associated_executor<T, Executor>::type;
+
+#endif // defined(ASIO_HAS_ALIAS_TEMPLATES)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_ASSOCIATED_EXECUTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/async_result.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/async_result.hpp
new file mode 100644
index 00000000000..a75f9e4a348
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/async_result.hpp
@@ -0,0 +1,585 @@
+//
+// async_result.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_ASYNC_RESULT_HPP
+#define ASIO_ASYNC_RESULT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/detail/variadic_templates.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if defined(ASIO_HAS_CONCEPTS) \
+  && defined(ASIO_HAS_VARIADIC_TEMPLATES) \
+  && defined(ASIO_HAS_DECLTYPE)
+
+namespace detail {
+
+template <typename T>
+struct is_completion_signature : false_type
+{
+};
+
+template <typename R, typename... Args>
+struct is_completion_signature<R(Args...)> : true_type
+{
+};
+
+template <typename T, typename... Args>
+ASIO_CONCEPT callable_with = requires(T t, Args&&... args)
+{
+  t(static_cast<Args&&>(args)...);
+};
+
+template <typename T, typename Signature>
+struct is_completion_handler_for : false_type
+{
+};
+
+template <typename T, typename R, typename... Args>
+struct is_completion_handler_for<T, R(Args...)>
+  : integral_constant<bool, (callable_with<T, Args...>)>
+{
+};
+
+} // namespace detail
+
+template <typename T>
+ASIO_CONCEPT completion_signature =
+  detail::is_completion_signature<T>::value;
+
+#define ASIO_COMPLETION_SIGNATURE \
+  ::asio::completion_signature
+
+template <typename T, completion_signature Signature>
+ASIO_CONCEPT completion_handler_for =
+  detail::is_completion_handler_for<T, Signature>::value;
+
+#define ASIO_COMPLETION_HANDLER_FOR(s) \
+  ::asio::completion_handler_for<s>
+
+#else // defined(ASIO_HAS_CONCEPTS)
+      //   && defined(ASIO_HAS_VARIADIC_TEMPLATES)
+      //   && defined(ASIO_HAS_DECLTYPE)
+
+#define ASIO_COMPLETION_SIGNATURE typename
+#define ASIO_COMPLETION_HANDLER_FOR(s) typename
+
+#endif // defined(ASIO_HAS_CONCEPTS)
+       //   && defined(ASIO_HAS_VARIADIC_TEMPLATES)
+       //   && defined(ASIO_HAS_DECLTYPE)
+
+/// An interface for customising the behaviour of an initiating function.
+/**
+ * The async_result traits class is used for determining:
+ *
+ * @li the concrete completion handler type to be called at the end of the
+ * asynchronous operation;
+ *
+ * @li the initiating function return type; and
+ *
+ * @li how the return value of the initiating function is obtained.
+ *
+ * The trait allows the handler and return types to be determined at the point
+ * where the specific completion handler signature is known.
+ *
+ * This template may be specialised for user-defined completion token types.
+ * The primary template assumes that the CompletionToken is the completion
+ * handler.
+ */
+template <typename CompletionToken, ASIO_COMPLETION_SIGNATURE Signature>
+class async_result
+{
+public:
+  /// The concrete completion handler type for the specific signature.
+  typedef CompletionToken completion_handler_type;
+
+  /// The return type of the initiating function.
+  typedef void return_type;
+
+  /// Construct an async result from a given handler.
+  /**
+   * When using a specalised async_result, the constructor has an opportunity
+   * to initialise some state associated with the completion handler, which is
+   * then returned from the initiating function.
+   */
+  explicit async_result(completion_handler_type& h)
+  {
+    (void)h;
+  }
+
+  /// Obtain the value to be returned from the initiating function.
+  return_type get()
+  {
+  }
+
+#if defined(GENERATING_DOCUMENTATION)
+
+  /// Initiate the asynchronous operation that will produce the result, and
+  /// obtain the value to be returned from the initiating function.
+  template <typename Initiation, typename RawCompletionToken, typename... Args>
+  static return_type initiate(
+      ASIO_MOVE_ARG(Initiation) initiation,
+      ASIO_MOVE_ARG(RawCompletionToken) token,
+      ASIO_MOVE_ARG(Args)... args);
+
+#elif defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Initiation,
+      ASIO_COMPLETION_HANDLER_FOR(Signature) RawCompletionToken,
+      typename... Args>
+  static return_type initiate(
+      ASIO_MOVE_ARG(Initiation) initiation,
+      ASIO_MOVE_ARG(RawCompletionToken) token,
+      ASIO_MOVE_ARG(Args)... args)
+  {
+    ASIO_MOVE_CAST(Initiation)(initiation)(
+        ASIO_MOVE_CAST(RawCompletionToken)(token),
+        ASIO_MOVE_CAST(Args)(args)...);
+  }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Initiation,
+      ASIO_COMPLETION_HANDLER_FOR(Signature) RawCompletionToken>
+  static return_type initiate(
+      ASIO_MOVE_ARG(Initiation) initiation,
+      ASIO_MOVE_ARG(RawCompletionToken) token)
+  {
+    ASIO_MOVE_CAST(Initiation)(initiation)(
+        ASIO_MOVE_CAST(RawCompletionToken)(token));
+  }
+
+#define ASIO_PRIVATE_INITIATE_DEF(n) \
+  template <typename Initiation, \
+      ASIO_COMPLETION_HANDLER_FOR(Signature) RawCompletionToken, \
+      ASIO_VARIADIC_TPARAMS(n)> \
+  static return_type initiate( \
+      ASIO_MOVE_ARG(Initiation) initiation, \
+      ASIO_MOVE_ARG(RawCompletionToken) token, \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    ASIO_MOVE_CAST(Initiation)(initiation)( \
+        ASIO_MOVE_CAST(RawCompletionToken)(token), \
+        ASIO_VARIADIC_MOVE_ARGS(n)); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_INITIATE_DEF)
+#undef ASIO_PRIVATE_INITIATE_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+private:
+  async_result(const async_result&) ASIO_DELETED;
+  async_result& operator=(const async_result&) ASIO_DELETED;
+};
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <ASIO_COMPLETION_SIGNATURE Signature>
+class async_result<void, Signature>
+{
+  // Empty.
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+/// Helper template to deduce the handler type from a CompletionToken, capture
+/// a local copy of the handler, and then create an async_result for the
+/// handler.
+template <typename CompletionToken, ASIO_COMPLETION_SIGNATURE Signature>
+struct async_completion
+{
+  /// The real handler type to be used for the asynchronous operation.
+  typedef typename asio::async_result<
+    typename decay<CompletionToken>::type,
+      Signature>::completion_handler_type completion_handler_type;
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Constructor.
+  /**
+   * The constructor creates the concrete completion handler and makes the link
+   * between the handler and the asynchronous result.
+   */
+  explicit async_completion(CompletionToken& token)
+    : completion_handler(static_cast<typename conditional<
+        is_same<CompletionToken, completion_handler_type>::value,
+        completion_handler_type&, CompletionToken&&>::type>(token)),
+      result(completion_handler)
+  {
+  }
+#else // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  explicit async_completion(typename decay<CompletionToken>::type& token)
+    : completion_handler(token),
+      result(completion_handler)
+  {
+  }
+
+  explicit async_completion(const typename decay<CompletionToken>::type& token)
+    : completion_handler(token),
+      result(completion_handler)
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// A copy of, or reference to, a real handler object.
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  typename conditional<
+    is_same<CompletionToken, completion_handler_type>::value,
+    completion_handler_type&, completion_handler_type>::type completion_handler;
+#else // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  completion_handler_type completion_handler;
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// The result of the asynchronous operation's initiating function.
+  async_result<typename decay<CompletionToken>::type, Signature> result;
+};
+
+namespace detail {
+
+template <typename CompletionToken, typename Signature>
+struct async_result_helper
+  : async_result<typename decay<CompletionToken>::type, Signature>
+{
+};
+
+struct async_result_memfns_base
+{
+  void initiate();
+};
+
+template <typename T>
+struct async_result_memfns_derived
+  : T, async_result_memfns_base
+{
+};
+
+template <typename T, T>
+struct async_result_memfns_check
+{
+};
+
+template <typename>
+char (&async_result_initiate_memfn_helper(...))[2];
+
+template <typename T>
+char async_result_initiate_memfn_helper(
+    async_result_memfns_check<
+      void (async_result_memfns_base::*)(),
+      &async_result_memfns_derived<T>::initiate>*);
+
+template <typename CompletionToken, typename Signature>
+struct async_result_has_initiate_memfn
+  : integral_constant<bool, sizeof(async_result_initiate_memfn_helper<
+      async_result<typename decay<CompletionToken>::type, Signature>
+    >(0)) != 1>
+{
+};
+
+} // namespace detail
+
+#if defined(GENERATING_DOCUMENTATION)
+# define ASIO_INITFN_RESULT_TYPE(ct, sig) \
+  void_or_deduced
+#elif defined(_MSC_VER) && (_MSC_VER < 1500)
+# define ASIO_INITFN_RESULT_TYPE(ct, sig) \
+  typename ::asio::detail::async_result_helper< \
+    ct, sig>::return_type
+#define ASIO_HANDLER_TYPE(ct, sig) \
+  typename ::asio::detail::async_result_helper< \
+    ct, sig>::completion_handler_type
+#else
+# define ASIO_INITFN_RESULT_TYPE(ct, sig) \
+  typename ::asio::async_result< \
+    typename ::asio::decay<ct>::type, sig>::return_type
+#define ASIO_HANDLER_TYPE(ct, sig) \
+  typename ::asio::async_result< \
+    typename ::asio::decay<ct>::type, sig>::completion_handler_type
+#endif
+
+#if defined(GENERATION_DOCUMENTATION)
+# define ASIO_INITFN_AUTO_RESULT_TYPE(ct, sig) \
+  auto
+#elif defined(ASIO_HAS_RETURN_TYPE_DEDUCTION)
+# define ASIO_INITFN_AUTO_RESULT_TYPE(ct, sig) \
+  auto
+#else
+# define ASIO_INITFN_AUTO_RESULT_TYPE(ct, sig) \
+  ASIO_INITFN_RESULT_TYPE(ct, sig)
+#endif
+
+#if defined(GENERATION_DOCUMENTATION)
+# define ASIO_INITFN_DEDUCED_RESULT_TYPE(ct, sig, expr) \
+  void_or_deduced
+#elif defined(ASIO_HAS_DECLTYPE)
+# define ASIO_INITFN_DEDUCED_RESULT_TYPE(ct, sig, expr) \
+  decltype expr
+#else
+# define ASIO_INITFN_DEDUCED_RESULT_TYPE(ct, sig, expr) \
+  ASIO_INITFN_RESULT_TYPE(ct, sig)
+#endif
+
+#if defined(GENERATING_DOCUMENTATION)
+
+template <typename CompletionToken,
+    completion_signature Signature,
+    typename Initiation, typename... Args>
+void_or_deduced async_initiate(
+    ASIO_MOVE_ARG(Initiation) initiation,
+    ASIO_NONDEDUCED_MOVE_ARG(CompletionToken),
+    ASIO_MOVE_ARG(Args)... args);
+
+#elif defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename CompletionToken,
+    ASIO_COMPLETION_SIGNATURE Signature,
+    typename Initiation, typename... Args>
+inline typename enable_if<
+    detail::async_result_has_initiate_memfn<CompletionToken, Signature>::value,
+    ASIO_INITFN_DEDUCED_RESULT_TYPE(CompletionToken, Signature,
+      (async_result<typename decay<CompletionToken>::type,
+        Signature>::initiate(declval<ASIO_MOVE_ARG(Initiation)>(),
+          declval<ASIO_MOVE_ARG(CompletionToken)>(),
+          declval<ASIO_MOVE_ARG(Args)>()...)))>::type
+async_initiate(ASIO_MOVE_ARG(Initiation) initiation,
+    ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token,
+    ASIO_MOVE_ARG(Args)... args)
+{
+  return async_result<typename decay<CompletionToken>::type,
+    Signature>::initiate(ASIO_MOVE_CAST(Initiation)(initiation),
+      ASIO_MOVE_CAST(CompletionToken)(token),
+      ASIO_MOVE_CAST(Args)(args)...);
+}
+
+template <typename CompletionToken,
+    ASIO_COMPLETION_SIGNATURE Signature,
+    typename Initiation, typename... Args>
+inline typename enable_if<
+    !detail::async_result_has_initiate_memfn<CompletionToken, Signature>::value,
+    ASIO_INITFN_RESULT_TYPE(CompletionToken, Signature)>::type
+async_initiate(ASIO_MOVE_ARG(Initiation) initiation,
+    ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token,
+    ASIO_MOVE_ARG(Args)... args)
+{
+  async_completion<CompletionToken, Signature> completion(token);
+
+  ASIO_MOVE_CAST(Initiation)(initiation)(
+      ASIO_MOVE_CAST(ASIO_HANDLER_TYPE(CompletionToken,
+        Signature))(completion.completion_handler),
+      ASIO_MOVE_CAST(Args)(args)...);
+
+  return completion.result.get();
+}
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename CompletionToken,
+    ASIO_COMPLETION_SIGNATURE Signature,
+    typename Initiation>
+inline typename enable_if<
+    detail::async_result_has_initiate_memfn<CompletionToken, Signature>::value,
+    ASIO_INITFN_DEDUCED_RESULT_TYPE(CompletionToken, Signature,
+      (async_result<typename decay<CompletionToken>::type,
+        Signature>::initiate(declval<ASIO_MOVE_ARG(Initiation)>(),
+          declval<ASIO_MOVE_ARG(CompletionToken)>())))>::type
+async_initiate(ASIO_MOVE_ARG(Initiation) initiation,
+    ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token)
+{
+  return async_result<typename decay<CompletionToken>::type,
+    Signature>::initiate(ASIO_MOVE_CAST(Initiation)(initiation),
+      ASIO_MOVE_CAST(CompletionToken)(token));
+}
+
+template <typename CompletionToken,
+    ASIO_COMPLETION_SIGNATURE Signature,
+    typename Initiation>
+inline typename enable_if<
+    !detail::async_result_has_initiate_memfn<CompletionToken, Signature>::value,
+    ASIO_INITFN_RESULT_TYPE(CompletionToken, Signature)>::type
+async_initiate(ASIO_MOVE_ARG(Initiation) initiation,
+    ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token)
+{
+  async_completion<CompletionToken, Signature> completion(token);
+
+  ASIO_MOVE_CAST(Initiation)(initiation)(
+      ASIO_MOVE_CAST(ASIO_HANDLER_TYPE(CompletionToken,
+        Signature))(completion.completion_handler));
+
+  return completion.result.get();
+}
+
+#define ASIO_PRIVATE_INITIATE_DEF(n) \
+  template <typename CompletionToken, \
+      ASIO_COMPLETION_SIGNATURE Signature, \
+      typename Initiation, ASIO_VARIADIC_TPARAMS(n)> \
+  inline typename enable_if< \
+      detail::async_result_has_initiate_memfn< \
+        CompletionToken, Signature>::value, \
+      ASIO_INITFN_DEDUCED_RESULT_TYPE(CompletionToken, Signature, \
+        (async_result<typename decay<CompletionToken>::type, \
+          Signature>::initiate(declval<ASIO_MOVE_ARG(Initiation)>(), \
+            declval<ASIO_MOVE_ARG(CompletionToken)>(), \
+            ASIO_VARIADIC_MOVE_DECLVAL(n))))>::type \
+  async_initiate(ASIO_MOVE_ARG(Initiation) initiation, \
+      ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token, \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    return async_result<typename decay<CompletionToken>::type, \
+      Signature>::initiate(ASIO_MOVE_CAST(Initiation)(initiation), \
+        ASIO_MOVE_CAST(CompletionToken)(token), \
+        ASIO_VARIADIC_MOVE_ARGS(n)); \
+  } \
+  \
+  template <typename CompletionToken, \
+      ASIO_COMPLETION_SIGNATURE Signature, \
+      typename Initiation, ASIO_VARIADIC_TPARAMS(n)> \
+  inline typename enable_if< \
+      !detail::async_result_has_initiate_memfn< \
+        CompletionToken, Signature>::value, \
+      ASIO_INITFN_RESULT_TYPE(CompletionToken, Signature)>::type \
+  async_initiate(ASIO_MOVE_ARG(Initiation) initiation, \
+      ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token, \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    async_completion<CompletionToken, Signature> completion(token); \
+  \
+    ASIO_MOVE_CAST(Initiation)(initiation)( \
+        ASIO_MOVE_CAST(ASIO_HANDLER_TYPE(CompletionToken, \
+          Signature))(completion.completion_handler), \
+        ASIO_VARIADIC_MOVE_ARGS(n)); \
+  \
+    return completion.result.get(); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_INITIATE_DEF)
+#undef ASIO_PRIVATE_INITIATE_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#if defined(ASIO_HAS_CONCEPTS) \
+  && defined(ASIO_HAS_VARIADIC_TEMPLATES) \
+  && defined(ASIO_HAS_DECLTYPE)
+
+namespace detail {
+
+template <typename Signature>
+struct initiation_archetype
+{
+  template <completion_handler_for<Signature> CompletionHandler>
+  void operator()(CompletionHandler&&) const
+  {
+  }
+};
+
+} // namespace detail
+
+template <typename T, completion_signature Signature>
+ASIO_CONCEPT completion_token_for = requires(T&& t)
+{
+  async_initiate<T, Signature>(detail::initiation_archetype<Signature>{}, t);
+};
+
+#define ASIO_COMPLETION_TOKEN_FOR(s) \
+  ::asio::completion_token_for<s>
+
+#else // defined(ASIO_HAS_CONCEPTS)
+      //   && defined(ASIO_HAS_VARIADIC_TEMPLATES)
+      //   && defined(ASIO_HAS_DECLTYPE)
+
+#define ASIO_COMPLETION_TOKEN_FOR(s) typename
+
+#endif // defined(ASIO_HAS_CONCEPTS)
+       //   && defined(ASIO_HAS_VARIADIC_TEMPLATES)
+       //   && defined(ASIO_HAS_DECLTYPE)
+
+namespace detail {
+
+template <typename>
+struct default_completion_token_check
+{
+  typedef void type;
+};
+
+template <typename T, typename = void>
+struct default_completion_token_impl
+{
+  typedef void type;
+};
+
+template <typename T>
+struct default_completion_token_impl<T,
+  typename default_completion_token_check<
+    typename T::default_completion_token_type>::type>
+{
+  typedef typename T::default_completion_token_type type;
+};
+
+} // namespace detail
+
+#if defined(GENERATING_DOCUMENTATION)
+
+/// Traits type used to determine the default completion token type associated
+/// with a type (such as an executor).
+/**
+ * A program may specialise this traits type if the @c T template parameter in
+ * the specialisation is a user-defined type.
+ *
+ * Specialisations of this trait may provide a nested typedef @c type, which is
+ * a default-constructible completion token type.
+ */
+template <typename T>
+struct default_completion_token
+{
+  /// If @c T has a nested type @c default_completion_token_type,
+  /// <tt>T::default_completion_token_type</tt>. Otherwise the typedef @c type
+  /// is not defined.
+  typedef see_below type;
+};
+#else
+template <typename T>
+struct default_completion_token
+  : detail::default_completion_token_impl<T>
+{
+};
+#endif
+
+#if defined(ASIO_HAS_ALIAS_TEMPLATES)
+
+template <typename T>
+using default_completion_token_t = typename default_completion_token<T>::type;
+
+#endif // defined(ASIO_HAS_ALIAS_TEMPLATES)
+
+#if defined(ASIO_HAS_DEFAULT_FUNCTION_TEMPLATE_ARGUMENTS)
+
+#define ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(e) \
+  = typename ::asio::default_completion_token<e>::type
+#define ASIO_DEFAULT_COMPLETION_TOKEN(e) \
+  = typename ::asio::default_completion_token<e>::type()
+
+#else // defined(ASIO_HAS_DEFAULT_FUNCTION_TEMPLATE_ARGUMENTS)
+
+#define ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(e)
+#define ASIO_DEFAULT_COMPLETION_TOKEN(e)
+
+#endif // defined(ASIO_HAS_DEFAULT_FUNCTION_TEMPLATE_ARGUMENTS)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_ASYNC_RESULT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/awaitable.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/awaitable.hpp
new file mode 100644
index 00000000000..890fb67e407
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/awaitable.hpp
@@ -0,0 +1,123 @@
+//
+// awaitable.hpp
+// ~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_AWAITABLE_HPP
+#define ASIO_AWAITABLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_CO_AWAIT) || defined(GENERATING_DOCUMENTATION)
+
+#include <experimental/coroutine>
+#include "asio/executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+using std::experimental::coroutine_handle;
+using std::experimental::suspend_always;
+
+template <typename> class awaitable_thread;
+template <typename, typename> class awaitable_frame;
+
+} // namespace detail
+
+/// The return type of a coroutine or asynchronous operation.
+template <typename T, typename Executor = executor>
+class awaitable
+{
+public:
+  /// The type of the awaited value.
+  typedef T value_type;
+
+  /// The executor type that will be used for the coroutine.
+  typedef Executor executor_type;
+
+  /// Default constructor.
+  constexpr awaitable() noexcept
+    : frame_(nullptr)
+  {
+  }
+
+  /// Move constructor.
+  awaitable(awaitable&& other) noexcept
+    : frame_(std::exchange(other.frame_, nullptr))
+  {
+  }
+
+  /// Destructor
+  ~awaitable()
+  {
+    if (frame_)
+      frame_->destroy();
+  }
+
+  /// Checks if the awaitable refers to a future result.
+  bool valid() const noexcept
+  {
+    return !!frame_;
+  }
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+  // Support for co_await keyword.
+  bool await_ready() const noexcept
+  {
+    return false;
+  }
+
+  // Support for co_await keyword.
+  template <class U>
+  void await_suspend(
+      detail::coroutine_handle<detail::awaitable_frame<U, Executor>> h)
+  {
+    frame_->push_frame(&h.promise());
+  }
+
+  // Support for co_await keyword.
+  T await_resume()
+  {
+    return frame_->get();
+  }
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+private:
+  template <typename> friend class detail::awaitable_thread;
+  template <typename, typename> friend class detail::awaitable_frame;
+
+  // Not copy constructible or copy assignable.
+  awaitable(const awaitable&) = delete;
+  awaitable& operator=(const awaitable&) = delete;
+
+  // Construct the awaitable from a coroutine's frame object.
+  explicit awaitable(detail::awaitable_frame<T, Executor>* a)
+    : frame_(a)
+  {
+  }
+
+  detail::awaitable_frame<T, Executor>* frame_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/awaitable.hpp"
+
+#endif // defined(ASIO_HAS_CO_AWAIT) || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_AWAITABLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_datagram_socket.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_datagram_socket.hpp
new file mode 100644
index 00000000000..2d5cba39ccb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_datagram_socket.hpp
@@ -0,0 +1,1210 @@
+//
+// basic_datagram_socket.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_DATAGRAM_SOCKET_HPP
+#define ASIO_BASIC_DATAGRAM_SOCKET_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/basic_socket.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if !defined(ASIO_BASIC_DATAGRAM_SOCKET_FWD_DECL)
+#define ASIO_BASIC_DATAGRAM_SOCKET_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Protocol, typename Executor = executor>
+class basic_datagram_socket;
+
+#endif // !defined(ASIO_BASIC_DATAGRAM_SOCKET_FWD_DECL)
+
+/// Provides datagram-oriented socket functionality.
+/**
+ * The basic_datagram_socket class template provides asynchronous and blocking
+ * datagram-oriented socket functionality.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename Protocol, typename Executor>
+class basic_datagram_socket
+  : public basic_socket<Protocol, Executor>
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the socket type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The socket type when rebound to the specified executor.
+    typedef basic_datagram_socket<Protocol, Executor1> other;
+  };
+
+  /// The native representation of a socket.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#else
+  typedef typename basic_socket<Protocol,
+    Executor>::native_handle_type native_handle_type;
+#endif
+
+  /// The protocol type.
+  typedef Protocol protocol_type;
+
+  /// The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  /// Construct a basic_datagram_socket without opening it.
+  /**
+   * This constructor creates a datagram socket without opening it. The open()
+   * function must be called before data can be sent or received on the socket.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   */
+  explicit basic_datagram_socket(const executor_type& ex)
+    : basic_socket<Protocol, Executor>(ex)
+  {
+  }
+
+  /// Construct a basic_datagram_socket without opening it.
+  /**
+   * This constructor creates a datagram socket without opening it. The open()
+   * function must be called before data can be sent or received on the socket.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   */
+  template <typename ExecutionContext>
+  explicit basic_datagram_socket(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context)
+  {
+  }
+
+  /// Construct and open a basic_datagram_socket.
+  /**
+   * This constructor creates and opens a datagram socket.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_datagram_socket(const executor_type& ex, const protocol_type& protocol)
+    : basic_socket<Protocol, Executor>(ex, protocol)
+  {
+  }
+
+  /// Construct and open a basic_datagram_socket.
+  /**
+   * This constructor creates and opens a datagram socket.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_datagram_socket(ExecutionContext& context,
+      const protocol_type& protocol,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, protocol)
+  {
+  }
+
+  /// Construct a basic_datagram_socket, opening it and binding it to the given
+  /// local endpoint.
+  /**
+   * This constructor creates a datagram socket and automatically opens it bound
+   * to the specified endpoint on the local machine. The protocol used is the
+   * protocol associated with the given endpoint.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param endpoint An endpoint on the local machine to which the datagram
+   * socket will be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_datagram_socket(const executor_type& ex, const endpoint_type& endpoint)
+    : basic_socket<Protocol, Executor>(ex, endpoint)
+  {
+  }
+
+  /// Construct a basic_datagram_socket, opening it and binding it to the given
+  /// local endpoint.
+  /**
+   * This constructor creates a datagram socket and automatically opens it bound
+   * to the specified endpoint on the local machine. The protocol used is the
+   * protocol associated with the given endpoint.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param endpoint An endpoint on the local machine to which the datagram
+   * socket will be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_datagram_socket(ExecutionContext& context,
+      const endpoint_type& endpoint,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, endpoint)
+  {
+  }
+
+  /// Construct a basic_datagram_socket on an existing native socket.
+  /**
+   * This constructor creates a datagram socket object to hold an existing
+   * native socket.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_socket The new underlying socket implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_datagram_socket(const executor_type& ex,
+      const protocol_type& protocol, const native_handle_type& native_socket)
+    : basic_socket<Protocol, Executor>(ex, protocol, native_socket)
+  {
+  }
+
+  /// Construct a basic_datagram_socket on an existing native socket.
+  /**
+   * This constructor creates a datagram socket object to hold an existing
+   * native socket.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_socket The new underlying socket implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_datagram_socket(ExecutionContext& context,
+      const protocol_type& protocol, const native_handle_type& native_socket,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, protocol, native_socket)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_datagram_socket from another.
+  /**
+   * This constructor moves a datagram socket from one object to another.
+   *
+   * @param other The other basic_datagram_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_datagram_socket(const executor_type&)
+   * constructor.
+   */
+  basic_datagram_socket(basic_datagram_socket&& other) ASIO_NOEXCEPT
+    : basic_socket<Protocol, Executor>(std::move(other))
+  {
+  }
+
+  /// Move-assign a basic_datagram_socket from another.
+  /**
+   * This assignment operator moves a datagram socket from one object to
+   * another.
+   *
+   * @param other The other basic_datagram_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_datagram_socket(const executor_type&)
+   * constructor.
+   */
+  basic_datagram_socket& operator=(basic_datagram_socket&& other)
+  {
+    basic_socket<Protocol, Executor>::operator=(std::move(other));
+    return *this;
+  }
+
+  /// Move-construct a basic_datagram_socket from a socket of another protocol
+  /// type.
+  /**
+   * This constructor moves a datagram socket from one object to another.
+   *
+   * @param other The other basic_datagram_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_datagram_socket(const executor_type&)
+   * constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  basic_datagram_socket(basic_datagram_socket<Protocol1, Executor1>&& other,
+      typename enable_if<
+        is_convertible<Protocol1, Protocol>::value
+          && is_convertible<Executor1, Executor>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(std::move(other))
+  {
+  }
+
+  /// Move-assign a basic_datagram_socket from a socket of another protocol
+  /// type.
+  /**
+   * This assignment operator moves a datagram socket from one object to
+   * another.
+   *
+   * @param other The other basic_datagram_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_datagram_socket(const executor_type&)
+   * constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  typename enable_if<
+    is_convertible<Protocol1, Protocol>::value
+      && is_convertible<Executor1, Executor>::value,
+    basic_datagram_socket&
+  >::type operator=(basic_datagram_socket<Protocol1, Executor1>&& other)
+  {
+    basic_socket<Protocol, Executor>::operator=(std::move(other));
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destroys the socket.
+  /**
+   * This function destroys the socket, cancelling any outstanding asynchronous
+   * operations associated with the socket as if by calling @c cancel.
+   */
+  ~basic_datagram_socket()
+  {
+  }
+
+  /// Send some data on a connected socket.
+  /**
+   * This function is used to send data on the datagram socket. The function
+   * call will block until the data has been sent successfully or an error
+   * occurs.
+   *
+   * @param buffers One ore more data buffers to be sent on the socket.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The send operation can only be used with a connected socket. Use
+   * the send_to function to send data on an unconnected datagram socket.
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code socket.send(asio::buffer(data, size)); @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send(const ConstBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, 0, ec);
+    asio::detail::throw_error(ec, "send");
+    return s;
+  }
+
+  /// Send some data on a connected socket.
+  /**
+   * This function is used to send data on the datagram socket. The function
+   * call will block until the data has been sent successfully or an error
+   * occurs.
+   *
+   * @param buffers One ore more data buffers to be sent on the socket.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The send operation can only be used with a connected socket. Use
+   * the send_to function to send data on an unconnected datagram socket.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, flags, ec);
+    asio::detail::throw_error(ec, "send");
+    return s;
+  }
+
+  /// Send some data on a connected socket.
+  /**
+   * This function is used to send data on the datagram socket. The function
+   * call will block until the data has been sent successfully or an error
+   * occurs.
+   *
+   * @param buffers One or more data buffers to be sent on the socket.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @note The send operation can only be used with a connected socket. Use
+   * the send_to function to send data on an unconnected datagram socket.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    return this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, flags, ec);
+  }
+
+  /// Start an asynchronous send on a connected socket.
+  /**
+   * This function is used to asynchronously send data on the datagram socket.
+   * The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be sent on the socket. Although
+   * the buffers object may be copied as necessary, ownership of the underlying
+   * memory blocks is retained by the caller, which must guarantee that they
+   * remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the send operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes sent.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The async_send operation can only be used with a connected socket.
+   * Use the async_send_to function to send data on an unconnected datagram
+   * socket.
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.async_send(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_send(const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send(this), handler,
+        buffers, socket_base::message_flags(0));
+  }
+
+  /// Start an asynchronous send on a connected socket.
+  /**
+   * This function is used to asynchronously send data on the datagram socket.
+   * The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be sent on the socket. Although
+   * the buffers object may be copied as necessary, ownership of the underlying
+   * memory blocks is retained by the caller, which must guarantee that they
+   * remain valid until the handler is called.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param handler The handler to be called when the send operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes sent.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The async_send operation can only be used with a connected socket.
+   * Use the async_send_to function to send data on an unconnected datagram
+   * socket.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send(this), handler, buffers, flags);
+  }
+
+  /// Send a datagram to the specified endpoint.
+  /**
+   * This function is used to send a datagram to the specified remote endpoint.
+   * The function call will block until the data has been sent successfully or
+   * an error occurs.
+   *
+   * @param buffers One or more data buffers to be sent to the remote endpoint.
+   *
+   * @param destination The remote endpoint to which the data will be sent.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * asio::ip::udp::endpoint destination(
+   *     asio::ip::address::from_string("1.2.3.4"), 12345);
+   * socket.send_to(asio::buffer(data, size), destination);
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send_to(const ConstBufferSequence& buffers,
+      const endpoint_type& destination)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send_to(
+        this->impl_.get_implementation(), buffers, destination, 0, ec);
+    asio::detail::throw_error(ec, "send_to");
+    return s;
+  }
+
+  /// Send a datagram to the specified endpoint.
+  /**
+   * This function is used to send a datagram to the specified remote endpoint.
+   * The function call will block until the data has been sent successfully or
+   * an error occurs.
+   *
+   * @param buffers One or more data buffers to be sent to the remote endpoint.
+   *
+   * @param destination The remote endpoint to which the data will be sent.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send_to(const ConstBufferSequence& buffers,
+      const endpoint_type& destination, socket_base::message_flags flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send_to(
+        this->impl_.get_implementation(), buffers, destination, flags, ec);
+    asio::detail::throw_error(ec, "send_to");
+    return s;
+  }
+
+  /// Send a datagram to the specified endpoint.
+  /**
+   * This function is used to send a datagram to the specified remote endpoint.
+   * The function call will block until the data has been sent successfully or
+   * an error occurs.
+   *
+   * @param buffers One or more data buffers to be sent to the remote endpoint.
+   *
+   * @param destination The remote endpoint to which the data will be sent.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes sent.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send_to(const ConstBufferSequence& buffers,
+      const endpoint_type& destination, socket_base::message_flags flags,
+      asio::error_code& ec)
+  {
+    return this->impl_.get_service().send_to(this->impl_.get_implementation(),
+        buffers, destination, flags, ec);
+  }
+
+  /// Start an asynchronous send.
+  /**
+   * This function is used to asynchronously send a datagram to the specified
+   * remote endpoint. The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be sent to the remote endpoint.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param destination The remote endpoint to which the data will be sent.
+   * Copies will be made of the endpoint as required.
+   *
+   * @param handler The handler to be called when the send operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes sent.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * asio::ip::udp::endpoint destination(
+   *     asio::ip::address::from_string("1.2.3.4"), 12345);
+   * socket.async_send_to(
+   *     asio::buffer(data, size), destination, handler);
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_send_to(const ConstBufferSequence& buffers,
+      const endpoint_type& destination,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send_to(this), handler, buffers,
+        destination, socket_base::message_flags(0));
+  }
+
+  /// Start an asynchronous send.
+  /**
+   * This function is used to asynchronously send a datagram to the specified
+   * remote endpoint. The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be sent to the remote endpoint.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param destination The remote endpoint to which the data will be sent.
+   * Copies will be made of the endpoint as required.
+   *
+   * @param handler The handler to be called when the send operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes sent.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_send_to(const ConstBufferSequence& buffers,
+      const endpoint_type& destination, socket_base::message_flags flags,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send_to(this), handler, buffers, destination, flags);
+  }
+
+  /// Receive some data on a connected socket.
+  /**
+   * This function is used to receive data on the datagram socket. The function
+   * call will block until data has been received successfully or an error
+   * occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The receive operation can only be used with a connected socket. Use
+   * the receive_from function to receive data on an unconnected datagram
+   * socket.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code socket.receive(asio::buffer(data, size)); @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive(
+        this->impl_.get_implementation(), buffers, 0, ec);
+    asio::detail::throw_error(ec, "receive");
+    return s;
+  }
+
+  /// Receive some data on a connected socket.
+  /**
+   * This function is used to receive data on the datagram socket. The function
+   * call will block until data has been received successfully or an error
+   * occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The receive operation can only be used with a connected socket. Use
+   * the receive_from function to receive data on an unconnected datagram
+   * socket.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive(
+        this->impl_.get_implementation(), buffers, flags, ec);
+    asio::detail::throw_error(ec, "receive");
+    return s;
+  }
+
+  /// Receive some data on a connected socket.
+  /**
+   * This function is used to receive data on the datagram socket. The function
+   * call will block until data has been received successfully or an error
+   * occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes received.
+   *
+   * @note The receive operation can only be used with a connected socket. Use
+   * the receive_from function to receive data on an unconnected datagram
+   * socket.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    return this->impl_.get_service().receive(
+        this->impl_.get_implementation(), buffers, flags, ec);
+  }
+
+  /// Start an asynchronous receive on a connected socket.
+  /**
+   * This function is used to asynchronously receive data from the datagram
+   * socket. The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The async_receive operation can only be used with a connected socket.
+   * Use the async_receive_from function to receive data on an unconnected
+   * datagram socket.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * socket.async_receive(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive(const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive(this), handler,
+        buffers, socket_base::message_flags(0));
+  }
+
+  /// Start an asynchronous receive on a connected socket.
+  /**
+   * This function is used to asynchronously receive data from the datagram
+   * socket. The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The async_receive operation can only be used with a connected socket.
+   * Use the async_receive_from function to receive data on an unconnected
+   * datagram socket.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags flags,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive(this), handler, buffers, flags);
+  }
+
+  /// Receive a datagram with the endpoint of the sender.
+  /**
+   * This function is used to receive a datagram. The function call will block
+   * until data has been received successfully or an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param sender_endpoint An endpoint object that receives the endpoint of
+   * the remote sender of the datagram.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * asio::ip::udp::endpoint sender_endpoint;
+   * socket.receive_from(
+   *     asio::buffer(data, size), sender_endpoint);
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive_from(const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive_from(
+        this->impl_.get_implementation(), buffers, sender_endpoint, 0, ec);
+    asio::detail::throw_error(ec, "receive_from");
+    return s;
+  }
+  
+  /// Receive a datagram with the endpoint of the sender.
+  /**
+   * This function is used to receive a datagram. The function call will block
+   * until data has been received successfully or an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param sender_endpoint An endpoint object that receives the endpoint of
+   * the remote sender of the datagram.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive_from(const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint, socket_base::message_flags flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive_from(
+        this->impl_.get_implementation(), buffers, sender_endpoint, flags, ec);
+    asio::detail::throw_error(ec, "receive_from");
+    return s;
+  }
+  
+  /// Receive a datagram with the endpoint of the sender.
+  /**
+   * This function is used to receive a datagram. The function call will block
+   * until data has been received successfully or an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param sender_endpoint An endpoint object that receives the endpoint of
+   * the remote sender of the datagram.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes received.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive_from(const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint, socket_base::message_flags flags,
+      asio::error_code& ec)
+  {
+    return this->impl_.get_service().receive_from(
+        this->impl_.get_implementation(), buffers, sender_endpoint, flags, ec);
+  }
+
+  /// Start an asynchronous receive.
+  /**
+   * This function is used to asynchronously receive a datagram. The function
+   * call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param sender_endpoint An endpoint object that receives the endpoint of
+   * the remote sender of the datagram. Ownership of the sender_endpoint object
+   * is retained by the caller, which must guarantee that it is valid until the
+   * handler is called.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code socket.async_receive_from(
+   *     asio::buffer(data, size), sender_endpoint, handler); @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive_from(const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive_from(this), handler, buffers,
+        &sender_endpoint, socket_base::message_flags(0));
+  }
+
+  /// Start an asynchronous receive.
+  /**
+   * This function is used to asynchronously receive a datagram. The function
+   * call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param sender_endpoint An endpoint object that receives the endpoint of
+   * the remote sender of the datagram. Ownership of the sender_endpoint object
+   * is retained by the caller, which must guarantee that it is valid until the
+   * handler is called.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive_from(const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint, socket_base::message_flags flags,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive_from(this), handler,
+        buffers, &sender_endpoint, flags);
+  }
+
+private:
+  class initiate_async_send
+  { 
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_send(basic_datagram_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        const ConstBufferSequence& buffers,
+        socket_base::message_flags flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      detail::non_const_lvalue<WriteHandler> handler2(handler);
+      self_->impl_.get_service().async_send(
+          self_->impl_.get_implementation(), buffers, flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_datagram_socket* self_;
+  };
+
+  class initiate_async_send_to
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_send_to(basic_datagram_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        const ConstBufferSequence& buffers, const endpoint_type& destination,
+        socket_base::message_flags flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      detail::non_const_lvalue<WriteHandler> handler2(handler);
+      self_->impl_.get_service().async_send_to(
+          self_->impl_.get_implementation(), buffers, destination, flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_datagram_socket* self_;
+  };
+
+  class initiate_async_receive
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_receive(basic_datagram_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        const MutableBufferSequence& buffers,
+        socket_base::message_flags flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      detail::non_const_lvalue<ReadHandler> handler2(handler);
+      self_->impl_.get_service().async_receive(
+          self_->impl_.get_implementation(), buffers, flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_datagram_socket* self_;
+  };
+
+  class initiate_async_receive_from
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_receive_from(basic_datagram_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        const MutableBufferSequence& buffers, endpoint_type* sender_endpoint,
+        socket_base::message_flags flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      detail::non_const_lvalue<ReadHandler> handler2(handler);
+      self_->impl_.get_service().async_receive_from(
+          self_->impl_.get_implementation(), buffers, *sender_endpoint, flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_datagram_socket* self_;
+  };
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BASIC_DATAGRAM_SOCKET_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_deadline_timer.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_deadline_timer.hpp
new file mode 100644
index 00000000000..01adaf51727
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_deadline_timer.hpp
@@ -0,0 +1,693 @@
+//
+// basic_deadline_timer.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_DEADLINE_TIMER_HPP
+#define ASIO_BASIC_DEADLINE_TIMER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_BOOST_DATE_TIME) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include <cstddef>
+#include "asio/detail/deadline_timer_service.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/io_object_impl.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/executor.hpp"
+#include "asio/time_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Provides waitable timer functionality.
+/**
+ * The basic_deadline_timer class template provides the ability to perform a
+ * blocking or asynchronous wait for a timer to expire.
+ *
+ * A deadline timer is always in one of two states: "expired" or "not expired".
+ * If the wait() or async_wait() function is called on an expired timer, the
+ * wait operation will complete immediately.
+ *
+ * Most applications will use the asio::deadline_timer typedef.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Examples
+ * Performing a blocking wait:
+ * @code
+ * // Construct a timer without setting an expiry time.
+ * asio::deadline_timer timer(my_context);
+ *
+ * // Set an expiry time relative to now.
+ * timer.expires_from_now(boost::posix_time::seconds(5));
+ *
+ * // Wait for the timer to expire.
+ * timer.wait();
+ * @endcode
+ *
+ * @par 
+ * Performing an asynchronous wait:
+ * @code
+ * void handler(const asio::error_code& error)
+ * {
+ *   if (!error)
+ *   {
+ *     // Timer expired.
+ *   }
+ * }
+ *
+ * ...
+ *
+ * // Construct a timer with an absolute expiry time.
+ * asio::deadline_timer timer(my_context,
+ *     boost::posix_time::time_from_string("2005-12-07 23:59:59.000"));
+ *
+ * // Start an asynchronous wait.
+ * timer.async_wait(handler);
+ * @endcode
+ *
+ * @par Changing an active deadline_timer's expiry time
+ *
+ * Changing the expiry time of a timer while there are pending asynchronous
+ * waits causes those wait operations to be cancelled. To ensure that the action
+ * associated with the timer is performed only once, use something like this:
+ * used:
+ *
+ * @code
+ * void on_some_event()
+ * {
+ *   if (my_timer.expires_from_now(seconds(5)) > 0)
+ *   {
+ *     // We managed to cancel the timer. Start new asynchronous wait.
+ *     my_timer.async_wait(on_timeout);
+ *   }
+ *   else
+ *   {
+ *     // Too late, timer has already expired!
+ *   }
+ * }
+ *
+ * void on_timeout(const asio::error_code& e)
+ * {
+ *   if (e != asio::error::operation_aborted)
+ *   {
+ *     // Timer was not cancelled, take necessary action.
+ *   }
+ * }
+ * @endcode
+ *
+ * @li The asio::basic_deadline_timer::expires_from_now() function
+ * cancels any pending asynchronous waits, and returns the number of
+ * asynchronous waits that were cancelled. If it returns 0 then you were too
+ * late and the wait handler has already been executed, or will soon be
+ * executed. If it returns 1 then the wait handler was successfully cancelled.
+ *
+ * @li If a wait handler is cancelled, the asio::error_code passed to
+ * it contains the value asio::error::operation_aborted.
+ */
+template <typename Time,
+    typename TimeTraits = asio::time_traits<Time>,
+    typename Executor = executor>
+class basic_deadline_timer
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the timer type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The timer type when rebound to the specified executor.
+    typedef basic_deadline_timer<Time, TimeTraits, Executor1> other;
+  };
+
+  /// The time traits type.
+  typedef TimeTraits traits_type;
+
+  /// The time type.
+  typedef typename traits_type::time_type time_type;
+
+  /// The duration type.
+  typedef typename traits_type::duration_type duration_type;
+
+  /// Constructor.
+  /**
+   * This constructor creates a timer without setting an expiry time. The
+   * expires_at() or expires_from_now() functions must be called to set an
+   * expiry time before the timer can be waited on.
+   *
+   * @param ex The I/O executor that the timer will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the timer.
+   */
+  explicit basic_deadline_timer(const executor_type& ex)
+    : impl_(ex)
+  {
+  }
+
+  /// Constructor.
+  /**
+   * This constructor creates a timer without setting an expiry time. The
+   * expires_at() or expires_from_now() functions must be called to set an
+   * expiry time before the timer can be waited on.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the timer will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the timer.
+   */
+  template <typename ExecutionContext>
+  explicit basic_deadline_timer(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+  }
+
+  /// Constructor to set a particular expiry time as an absolute time.
+  /**
+   * This constructor creates a timer and sets the expiry time.
+   *
+   * @param ex The I/O executor that the timer will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the timer.
+   *
+   * @param expiry_time The expiry time to be used for the timer, expressed
+   * as an absolute time.
+   */
+  basic_deadline_timer(const executor_type& ex, const time_type& expiry_time)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().expires_at(impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_at");
+  }
+
+  /// Constructor to set a particular expiry time as an absolute time.
+  /**
+   * This constructor creates a timer and sets the expiry time.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the timer will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the timer.
+   *
+   * @param expiry_time The expiry time to be used for the timer, expressed
+   * as an absolute time.
+   */
+  template <typename ExecutionContext>
+  basic_deadline_timer(ExecutionContext& context, const time_type& expiry_time,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().expires_at(impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_at");
+  }
+
+  /// Constructor to set a particular expiry time relative to now.
+  /**
+   * This constructor creates a timer and sets the expiry time.
+   *
+   * @param ex The I/O executor that the timer will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the timer.
+   *
+   * @param expiry_time The expiry time to be used for the timer, relative to
+   * now.
+   */
+  basic_deadline_timer(const executor_type& ex,
+      const duration_type& expiry_time)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().expires_from_now(
+        impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_from_now");
+  }
+
+  /// Constructor to set a particular expiry time relative to now.
+  /**
+   * This constructor creates a timer and sets the expiry time.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the timer will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the timer.
+   *
+   * @param expiry_time The expiry time to be used for the timer, relative to
+   * now.
+   */
+  template <typename ExecutionContext>
+  basic_deadline_timer(ExecutionContext& context,
+      const duration_type& expiry_time,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().expires_from_now(
+        impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_from_now");
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_deadline_timer from another.
+  /**
+   * This constructor moves a timer from one object to another.
+   *
+   * @param other The other basic_deadline_timer object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_deadline_timer(const executor_type&)
+   * constructor.
+   */
+  basic_deadline_timer(basic_deadline_timer&& other)
+    : impl_(std::move(other.impl_))
+  {
+  }
+
+  /// Move-assign a basic_deadline_timer from another.
+  /**
+   * This assignment operator moves a timer from one object to another. Cancels
+   * any outstanding asynchronous operations associated with the target object.
+   *
+   * @param other The other basic_deadline_timer object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_deadline_timer(const executor_type&)
+   * constructor.
+   */
+  basic_deadline_timer& operator=(basic_deadline_timer&& other)
+  {
+    impl_ = std::move(other.impl_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destroys the timer.
+  /**
+   * This function destroys the timer, cancelling any outstanding asynchronous
+   * wait operations associated with the timer as if by calling @c cancel.
+   */
+  ~basic_deadline_timer()
+  {
+  }
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return impl_.get_executor();
+  }
+
+  /// Cancel any asynchronous operations that are waiting on the timer.
+  /**
+   * This function forces the completion of any pending asynchronous wait
+   * operations against the timer. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * Cancelling the timer does not change the expiry time.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note If the timer has already expired when cancel() is called, then the
+   * handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t cancel()
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().cancel(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "cancel");
+    return s;
+  }
+
+  /// Cancel any asynchronous operations that are waiting on the timer.
+  /**
+   * This function forces the completion of any pending asynchronous wait
+   * operations against the timer. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * Cancelling the timer does not change the expiry time.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @note If the timer has already expired when cancel() is called, then the
+   * handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t cancel(asio::error_code& ec)
+  {
+    return impl_.get_service().cancel(impl_.get_implementation(), ec);
+  }
+
+  /// Cancels one asynchronous operation that is waiting on the timer.
+  /**
+   * This function forces the completion of one pending asynchronous wait
+   * operation against the timer. Handlers are cancelled in FIFO order. The
+   * handler for the cancelled operation will be invoked with the
+   * asio::error::operation_aborted error code.
+   *
+   * Cancelling the timer does not change the expiry time.
+   *
+   * @return The number of asynchronous operations that were cancelled. That is,
+   * either 0 or 1.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note If the timer has already expired when cancel_one() is called, then
+   * the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t cancel_one()
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().cancel_one(
+        impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "cancel_one");
+    return s;
+  }
+
+  /// Cancels one asynchronous operation that is waiting on the timer.
+  /**
+   * This function forces the completion of one pending asynchronous wait
+   * operation against the timer. Handlers are cancelled in FIFO order. The
+   * handler for the cancelled operation will be invoked with the
+   * asio::error::operation_aborted error code.
+   *
+   * Cancelling the timer does not change the expiry time.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of asynchronous operations that were cancelled. That is,
+   * either 0 or 1.
+   *
+   * @note If the timer has already expired when cancel_one() is called, then
+   * the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t cancel_one(asio::error_code& ec)
+  {
+    return impl_.get_service().cancel_one(impl_.get_implementation(), ec);
+  }
+
+  /// Get the timer's expiry time as an absolute time.
+  /**
+   * This function may be used to obtain the timer's current expiry time.
+   * Whether the timer has expired or not does not affect this value.
+   */
+  time_type expires_at() const
+  {
+    return impl_.get_service().expires_at(impl_.get_implementation());
+  }
+
+  /// Set the timer's expiry time as an absolute time.
+  /**
+   * This function sets the expiry time. Any pending asynchronous wait
+   * operations will be cancelled. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note If the timer has already expired when expires_at() is called, then
+   * the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t expires_at(const time_type& expiry_time)
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().expires_at(
+        impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_at");
+    return s;
+  }
+
+  /// Set the timer's expiry time as an absolute time.
+  /**
+   * This function sets the expiry time. Any pending asynchronous wait
+   * operations will be cancelled. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @note If the timer has already expired when expires_at() is called, then
+   * the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t expires_at(const time_type& expiry_time,
+      asio::error_code& ec)
+  {
+    return impl_.get_service().expires_at(
+        impl_.get_implementation(), expiry_time, ec);
+  }
+
+  /// Get the timer's expiry time relative to now.
+  /**
+   * This function may be used to obtain the timer's current expiry time.
+   * Whether the timer has expired or not does not affect this value.
+   */
+  duration_type expires_from_now() const
+  {
+    return impl_.get_service().expires_from_now(impl_.get_implementation());
+  }
+
+  /// Set the timer's expiry time relative to now.
+  /**
+   * This function sets the expiry time. Any pending asynchronous wait
+   * operations will be cancelled. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note If the timer has already expired when expires_from_now() is called,
+   * then the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t expires_from_now(const duration_type& expiry_time)
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().expires_from_now(
+        impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_from_now");
+    return s;
+  }
+
+  /// Set the timer's expiry time relative to now.
+  /**
+   * This function sets the expiry time. Any pending asynchronous wait
+   * operations will be cancelled. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @note If the timer has already expired when expires_from_now() is called,
+   * then the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t expires_from_now(const duration_type& expiry_time,
+      asio::error_code& ec)
+  {
+    return impl_.get_service().expires_from_now(
+        impl_.get_implementation(), expiry_time, ec);
+  }
+
+  /// Perform a blocking wait on the timer.
+  /**
+   * This function is used to wait for the timer to expire. This function
+   * blocks and does not return until the timer has expired.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void wait()
+  {
+    asio::error_code ec;
+    impl_.get_service().wait(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "wait");
+  }
+
+  /// Perform a blocking wait on the timer.
+  /**
+   * This function is used to wait for the timer to expire. This function
+   * blocks and does not return until the timer has expired.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  void wait(asio::error_code& ec)
+  {
+    impl_.get_service().wait(impl_.get_implementation(), ec);
+  }
+
+  /// Start an asynchronous wait on the timer.
+  /**
+   * This function may be used to initiate an asynchronous wait against the
+   * timer. It always returns immediately.
+   *
+   * For each call to async_wait(), the supplied handler will be called exactly
+   * once. The handler will be called when:
+   *
+   * @li The timer has expired.
+   *
+   * @li The timer was cancelled, in which case the handler is passed the error
+   * code asio::error::operation_aborted.
+   *
+   * @param handler The handler to be called when the timer expires. Copies
+   * will be made of the handler as required. The function signature of the
+   * handler must be:
+   * @code void handler(
+   *   const asio::error_code& error // Result of operation.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code))
+        WaitHandler ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WaitHandler,
+      void (asio::error_code))
+  async_wait(
+      ASIO_MOVE_ARG(WaitHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WaitHandler, void (asio::error_code)>(
+        initiate_async_wait(this), handler);
+  }
+
+private:
+  // Disallow copying and assignment.
+  basic_deadline_timer(const basic_deadline_timer&) ASIO_DELETED;
+  basic_deadline_timer& operator=(
+      const basic_deadline_timer&) ASIO_DELETED;
+
+  class initiate_async_wait
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_wait(basic_deadline_timer* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WaitHandler>
+    void operator()(ASIO_MOVE_ARG(WaitHandler) handler) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WaitHandler.
+      ASIO_WAIT_HANDLER_CHECK(WaitHandler, handler) type_check;
+
+      detail::non_const_lvalue<WaitHandler> handler2(handler);
+      self_->impl_.get_service().async_wait(
+          self_->impl_.get_implementation(), handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_deadline_timer* self_;
+  };
+
+  detail::io_object_impl<
+    detail::deadline_timer_service<TimeTraits>, Executor> impl_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+       // || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_BASIC_DEADLINE_TIMER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_io_object.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_io_object.hpp
new file mode 100644
index 00000000000..faf20034422
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_io_object.hpp
@@ -0,0 +1,290 @@
+//
+// basic_io_object.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_IO_OBJECT_HPP
+#define ASIO_BASIC_IO_OBJECT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/io_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if defined(ASIO_HAS_MOVE)
+namespace detail
+{
+  // Type trait used to determine whether a service supports move.
+  template <typename IoObjectService>
+  class service_has_move
+  {
+  private:
+    typedef IoObjectService service_type;
+    typedef typename service_type::implementation_type implementation_type;
+
+    template <typename T, typename U>
+    static auto asio_service_has_move_eval(T* t, U* u)
+      -> decltype(t->move_construct(*u, *u), char());
+    static char (&asio_service_has_move_eval(...))[2];
+
+  public:
+    static const bool value =
+      sizeof(asio_service_has_move_eval(
+        static_cast<service_type*>(0),
+        static_cast<implementation_type*>(0))) == 1;
+  };
+}
+#endif // defined(ASIO_HAS_MOVE)
+
+/// Base class for all I/O objects.
+/**
+ * @note All I/O objects are non-copyable. However, when using C++0x, certain
+ * I/O objects do support move construction and move assignment.
+ */
+#if !defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+template <typename IoObjectService>
+#else
+template <typename IoObjectService,
+    bool Movable = detail::service_has_move<IoObjectService>::value>
+#endif
+class basic_io_object
+{
+public:
+  /// The type of the service that will be used to provide I/O operations.
+  typedef IoObjectService service_type;
+
+  /// The underlying implementation type of I/O object.
+  typedef typename service_type::implementation_type implementation_type;
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use get_executor().) Get the io_context associated with the
+  /// object.
+  /**
+   * This function may be used to obtain the io_context object that the I/O
+   * object uses to dispatch handlers for asynchronous operations.
+   *
+   * @return A reference to the io_context object that the I/O object will use
+   * to dispatch handlers. Ownership is not transferred to the caller.
+   */
+  asio::io_context& get_io_context()
+  {
+    return service_.get_io_context();
+  }
+
+  /// (Deprecated: Use get_executor().) Get the io_context associated with the
+  /// object.
+  /**
+   * This function may be used to obtain the io_context object that the I/O
+   * object uses to dispatch handlers for asynchronous operations.
+   *
+   * @return A reference to the io_context object that the I/O object will use
+   * to dispatch handlers. Ownership is not transferred to the caller.
+   */
+  asio::io_context& get_io_service()
+  {
+    return service_.get_io_context();
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// The type of the executor associated with the object.
+  typedef asio::io_context::executor_type executor_type;
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return service_.get_io_context().get_executor();
+  }
+
+protected:
+  /// Construct a basic_io_object.
+  /**
+   * Performs:
+   * @code get_service().construct(get_implementation()); @endcode
+   */
+  explicit basic_io_object(asio::io_context& io_context)
+    : service_(asio::use_service<IoObjectService>(io_context))
+  {
+    service_.construct(implementation_);
+  }
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_io_object.
+  /**
+   * Performs:
+   * @code get_service().move_construct(
+   *     get_implementation(), other.get_implementation()); @endcode
+   *
+   * @note Available only for services that support movability,
+   */
+  basic_io_object(basic_io_object&& other);
+
+  /// Move-assign a basic_io_object.
+  /**
+   * Performs:
+   * @code get_service().move_assign(get_implementation(),
+   *     other.get_service(), other.get_implementation()); @endcode
+   *
+   * @note Available only for services that support movability,
+   */
+  basic_io_object& operator=(basic_io_object&& other);
+
+  /// Perform a converting move-construction of a basic_io_object.
+  template <typename IoObjectService1>
+  basic_io_object(IoObjectService1& other_service,
+      typename IoObjectService1::implementation_type& other_implementation);
+#endif // defined(GENERATING_DOCUMENTATION)
+
+  /// Protected destructor to prevent deletion through this type.
+  /**
+   * Performs:
+   * @code get_service().destroy(get_implementation()); @endcode
+   */
+  ~basic_io_object()
+  {
+    service_.destroy(implementation_);
+  }
+
+  /// Get the service associated with the I/O object.
+  service_type& get_service()
+  {
+    return service_;
+  }
+
+  /// Get the service associated with the I/O object.
+  const service_type& get_service() const
+  {
+    return service_;
+  }
+
+  /// Get the underlying implementation of the I/O object.
+  implementation_type& get_implementation()
+  {
+    return implementation_;
+  }
+
+  /// Get the underlying implementation of the I/O object.
+  const implementation_type& get_implementation() const
+  {
+    return implementation_;
+  }
+
+private:
+  basic_io_object(const basic_io_object&);
+  basic_io_object& operator=(const basic_io_object&);
+
+  // The service associated with the I/O object.
+  service_type& service_;
+
+  /// The underlying implementation of the I/O object.
+  implementation_type implementation_;
+};
+
+#if defined(ASIO_HAS_MOVE)
+// Specialisation for movable objects.
+template <typename IoObjectService>
+class basic_io_object<IoObjectService, true>
+{
+public:
+  typedef IoObjectService service_type;
+  typedef typename service_type::implementation_type implementation_type;
+
+#if !defined(ASIO_NO_DEPRECATED)
+  asio::io_context& get_io_context()
+  {
+    return service_->get_io_context();
+  }
+
+  asio::io_context& get_io_service()
+  {
+    return service_->get_io_context();
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  typedef asio::io_context::executor_type executor_type;
+
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return service_->get_io_context().get_executor();
+  }
+
+protected:
+  explicit basic_io_object(asio::io_context& io_context)
+    : service_(&asio::use_service<IoObjectService>(io_context))
+  {
+    service_->construct(implementation_);
+  }
+
+  basic_io_object(basic_io_object&& other)
+    : service_(&other.get_service())
+  {
+    service_->move_construct(implementation_, other.implementation_);
+  }
+
+  template <typename IoObjectService1>
+  basic_io_object(IoObjectService1& other_service,
+      typename IoObjectService1::implementation_type& other_implementation)
+    : service_(&asio::use_service<IoObjectService>(
+          other_service.get_io_context()))
+  {
+    service_->converting_move_construct(implementation_,
+        other_service, other_implementation);
+  }
+
+  ~basic_io_object()
+  {
+    service_->destroy(implementation_);
+  }
+
+  basic_io_object& operator=(basic_io_object&& other)
+  {
+    service_->move_assign(implementation_,
+        *other.service_, other.implementation_);
+    service_ = other.service_;
+    return *this;
+  }
+
+  service_type& get_service()
+  {
+    return *service_;
+  }
+
+  const service_type& get_service() const
+  {
+    return *service_;
+  }
+
+  implementation_type& get_implementation()
+  {
+    return implementation_;
+  }
+
+  const implementation_type& get_implementation() const
+  {
+    return implementation_;
+  }
+
+private:
+  basic_io_object(const basic_io_object&);
+  void operator=(const basic_io_object&);
+
+  IoObjectService* service_;
+  implementation_type implementation_;
+};
+#endif // defined(ASIO_HAS_MOVE)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BASIC_IO_OBJECT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_raw_socket.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_raw_socket.hpp
new file mode 100644
index 00000000000..64ee351cf6b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_raw_socket.hpp
@@ -0,0 +1,1202 @@
+//
+// basic_raw_socket.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_RAW_SOCKET_HPP
+#define ASIO_BASIC_RAW_SOCKET_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/basic_socket.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if !defined(ASIO_BASIC_RAW_SOCKET_FWD_DECL)
+#define ASIO_BASIC_RAW_SOCKET_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Protocol, typename Executor = executor>
+class basic_raw_socket;
+
+#endif // !defined(ASIO_BASIC_RAW_SOCKET_FWD_DECL)
+
+/// Provides raw-oriented socket functionality.
+/**
+ * The basic_raw_socket class template provides asynchronous and blocking
+ * raw-oriented socket functionality.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename Protocol, typename Executor>
+class basic_raw_socket
+  : public basic_socket<Protocol, Executor>
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the socket type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The socket type when rebound to the specified executor.
+    typedef basic_raw_socket<Protocol, Executor1> other;
+  };
+
+  /// The native representation of a socket.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#else
+  typedef typename basic_socket<Protocol,
+    Executor>::native_handle_type native_handle_type;
+#endif
+
+  /// The protocol type.
+  typedef Protocol protocol_type;
+
+  /// The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  /// Construct a basic_raw_socket without opening it.
+  /**
+   * This constructor creates a raw socket without opening it. The open()
+   * function must be called before data can be sent or received on the socket.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   */
+  explicit basic_raw_socket(const executor_type& ex)
+    : basic_socket<Protocol, Executor>(ex)
+  {
+  }
+
+  /// Construct a basic_raw_socket without opening it.
+  /**
+   * This constructor creates a raw socket without opening it. The open()
+   * function must be called before data can be sent or received on the socket.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   */
+  template <typename ExecutionContext>
+  explicit basic_raw_socket(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context)
+  {
+  }
+
+  /// Construct and open a basic_raw_socket.
+  /**
+   * This constructor creates and opens a raw socket.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_raw_socket(const executor_type& ex, const protocol_type& protocol)
+    : basic_socket<Protocol, Executor>(ex, protocol)
+  {
+  }
+
+  /// Construct and open a basic_raw_socket.
+  /**
+   * This constructor creates and opens a raw socket.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_raw_socket(ExecutionContext& context, const protocol_type& protocol,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, protocol)
+  {
+  }
+
+  /// Construct a basic_raw_socket, opening it and binding it to the given
+  /// local endpoint.
+  /**
+   * This constructor creates a raw socket and automatically opens it bound
+   * to the specified endpoint on the local machine. The protocol used is the
+   * protocol associated with the given endpoint.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param endpoint An endpoint on the local machine to which the raw
+   * socket will be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_raw_socket(const executor_type& ex, const endpoint_type& endpoint)
+    : basic_socket<Protocol, Executor>(ex, endpoint)
+  {
+  }
+
+  /// Construct a basic_raw_socket, opening it and binding it to the given
+  /// local endpoint.
+  /**
+   * This constructor creates a raw socket and automatically opens it bound
+   * to the specified endpoint on the local machine. The protocol used is the
+   * protocol associated with the given endpoint.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param endpoint An endpoint on the local machine to which the raw
+   * socket will be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_raw_socket(ExecutionContext& context, const endpoint_type& endpoint,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, endpoint)
+  {
+  }
+
+  /// Construct a basic_raw_socket on an existing native socket.
+  /**
+   * This constructor creates a raw socket object to hold an existing
+   * native socket.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_socket The new underlying socket implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_raw_socket(const executor_type& ex,
+      const protocol_type& protocol, const native_handle_type& native_socket)
+    : basic_socket<Protocol, Executor>(ex, protocol, native_socket)
+  {
+  }
+
+  /// Construct a basic_raw_socket on an existing native socket.
+  /**
+   * This constructor creates a raw socket object to hold an existing
+   * native socket.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_socket The new underlying socket implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_raw_socket(ExecutionContext& context,
+      const protocol_type& protocol, const native_handle_type& native_socket,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, protocol, native_socket)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_raw_socket from another.
+  /**
+   * This constructor moves a raw socket from one object to another.
+   *
+   * @param other The other basic_raw_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_raw_socket(const executor_type&)
+   * constructor.
+   */
+  basic_raw_socket(basic_raw_socket&& other) ASIO_NOEXCEPT
+    : basic_socket<Protocol, Executor>(std::move(other))
+  {
+  }
+
+  /// Move-assign a basic_raw_socket from another.
+  /**
+   * This assignment operator moves a raw socket from one object to another.
+   *
+   * @param other The other basic_raw_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_raw_socket(const executor_type&)
+   * constructor.
+   */
+  basic_raw_socket& operator=(basic_raw_socket&& other)
+  {
+    basic_socket<Protocol, Executor>::operator=(std::move(other));
+    return *this;
+  }
+
+  /// Move-construct a basic_raw_socket from a socket of another protocol
+  /// type.
+  /**
+   * This constructor moves a raw socket from one object to another.
+   *
+   * @param other The other basic_raw_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_raw_socket(const executor_type&)
+   * constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  basic_raw_socket(basic_raw_socket<Protocol1, Executor1>&& other,
+      typename enable_if<
+        is_convertible<Protocol1, Protocol>::value
+          && is_convertible<Executor1, Executor>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(std::move(other))
+  {
+  }
+
+  /// Move-assign a basic_raw_socket from a socket of another protocol type.
+  /**
+   * This assignment operator moves a raw socket from one object to another.
+   *
+   * @param other The other basic_raw_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_raw_socket(const executor_type&)
+   * constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  typename enable_if<
+    is_convertible<Protocol1, Protocol>::value
+      && is_convertible<Executor1, Executor>::value,
+    basic_raw_socket&
+  >::type operator=(basic_raw_socket<Protocol1, Executor1>&& other)
+  {
+    basic_socket<Protocol, Executor>::operator=(std::move(other));
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destroys the socket.
+  /**
+   * This function destroys the socket, cancelling any outstanding asynchronous
+   * operations associated with the socket as if by calling @c cancel.
+   */
+  ~basic_raw_socket()
+  {
+  }
+
+  /// Send some data on a connected socket.
+  /**
+   * This function is used to send data on the raw socket. The function call
+   * will block until the data has been sent successfully or an error occurs.
+   *
+   * @param buffers One ore more data buffers to be sent on the socket.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The send operation can only be used with a connected socket. Use
+   * the send_to function to send data on an unconnected raw socket.
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code socket.send(asio::buffer(data, size)); @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send(const ConstBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, 0, ec);
+    asio::detail::throw_error(ec, "send");
+    return s;
+  }
+
+  /// Send some data on a connected socket.
+  /**
+   * This function is used to send data on the raw socket. The function call
+   * will block until the data has been sent successfully or an error occurs.
+   *
+   * @param buffers One ore more data buffers to be sent on the socket.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The send operation can only be used with a connected socket. Use
+   * the send_to function to send data on an unconnected raw socket.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, flags, ec);
+    asio::detail::throw_error(ec, "send");
+    return s;
+  }
+
+  /// Send some data on a connected socket.
+  /**
+   * This function is used to send data on the raw socket. The function call
+   * will block until the data has been sent successfully or an error occurs.
+   *
+   * @param buffers One or more data buffers to be sent on the socket.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @note The send operation can only be used with a connected socket. Use
+   * the send_to function to send data on an unconnected raw socket.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    return this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, flags, ec);
+  }
+
+  /// Start an asynchronous send on a connected socket.
+  /**
+   * This function is used to send data on the raw socket. The function call
+   * will block until the data has been sent successfully or an error occurs.
+   *
+   * @param buffers One or more data buffers to be sent on the socket. Although
+   * the buffers object may be copied as necessary, ownership of the underlying
+   * memory blocks is retained by the caller, which must guarantee that they
+   * remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the send operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes sent.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The async_send operation can only be used with a connected socket.
+   * Use the async_send_to function to send data on an unconnected raw
+   * socket.
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.async_send(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_send(const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send(this), handler,
+        buffers, socket_base::message_flags(0));
+  }
+
+  /// Start an asynchronous send on a connected socket.
+  /**
+   * This function is used to send data on the raw socket. The function call
+   * will block until the data has been sent successfully or an error occurs.
+   *
+   * @param buffers One or more data buffers to be sent on the socket. Although
+   * the buffers object may be copied as necessary, ownership of the underlying
+   * memory blocks is retained by the caller, which must guarantee that they
+   * remain valid until the handler is called.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param handler The handler to be called when the send operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes sent.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The async_send operation can only be used with a connected socket.
+   * Use the async_send_to function to send data on an unconnected raw
+   * socket.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send(this), handler, buffers, flags);
+  }
+
+  /// Send raw data to the specified endpoint.
+  /**
+   * This function is used to send raw data to the specified remote endpoint.
+   * The function call will block until the data has been sent successfully or
+   * an error occurs.
+   *
+   * @param buffers One or more data buffers to be sent to the remote endpoint.
+   *
+   * @param destination The remote endpoint to which the data will be sent.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * asio::ip::udp::endpoint destination(
+   *     asio::ip::address::from_string("1.2.3.4"), 12345);
+   * socket.send_to(asio::buffer(data, size), destination);
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send_to(const ConstBufferSequence& buffers,
+      const endpoint_type& destination)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send_to(
+        this->impl_.get_implementation(), buffers, destination, 0, ec);
+    asio::detail::throw_error(ec, "send_to");
+    return s;
+  }
+
+  /// Send raw data to the specified endpoint.
+  /**
+   * This function is used to send raw data to the specified remote endpoint.
+   * The function call will block until the data has been sent successfully or
+   * an error occurs.
+   *
+   * @param buffers One or more data buffers to be sent to the remote endpoint.
+   *
+   * @param destination The remote endpoint to which the data will be sent.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send_to(const ConstBufferSequence& buffers,
+      const endpoint_type& destination, socket_base::message_flags flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send_to(
+        this->impl_.get_implementation(), buffers, destination, flags, ec);
+    asio::detail::throw_error(ec, "send_to");
+    return s;
+  }
+
+  /// Send raw data to the specified endpoint.
+  /**
+   * This function is used to send raw data to the specified remote endpoint.
+   * The function call will block until the data has been sent successfully or
+   * an error occurs.
+   *
+   * @param buffers One or more data buffers to be sent to the remote endpoint.
+   *
+   * @param destination The remote endpoint to which the data will be sent.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes sent.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send_to(const ConstBufferSequence& buffers,
+      const endpoint_type& destination, socket_base::message_flags flags,
+      asio::error_code& ec)
+  {
+    return this->impl_.get_service().send_to(this->impl_.get_implementation(),
+        buffers, destination, flags, ec);
+  }
+
+  /// Start an asynchronous send.
+  /**
+   * This function is used to asynchronously send raw data to the specified
+   * remote endpoint. The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be sent to the remote endpoint.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param destination The remote endpoint to which the data will be sent.
+   * Copies will be made of the endpoint as required.
+   *
+   * @param handler The handler to be called when the send operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes sent.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * asio::ip::udp::endpoint destination(
+   *     asio::ip::address::from_string("1.2.3.4"), 12345);
+   * socket.async_send_to(
+   *     asio::buffer(data, size), destination, handler);
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_send_to(const ConstBufferSequence& buffers,
+      const endpoint_type& destination,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send_to(this), handler, buffers,
+        destination, socket_base::message_flags(0));
+  }
+
+  /// Start an asynchronous send.
+  /**
+   * This function is used to asynchronously send raw data to the specified
+   * remote endpoint. The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be sent to the remote endpoint.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param destination The remote endpoint to which the data will be sent.
+   * Copies will be made of the endpoint as required.
+   *
+   * @param handler The handler to be called when the send operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes sent.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_send_to(const ConstBufferSequence& buffers,
+      const endpoint_type& destination, socket_base::message_flags flags,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send_to(this), handler, buffers, destination, flags);
+  }
+
+  /// Receive some data on a connected socket.
+  /**
+   * This function is used to receive data on the raw socket. The function
+   * call will block until data has been received successfully or an error
+   * occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The receive operation can only be used with a connected socket. Use
+   * the receive_from function to receive data on an unconnected raw
+   * socket.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code socket.receive(asio::buffer(data, size)); @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive(
+        this->impl_.get_implementation(), buffers, 0, ec);
+    asio::detail::throw_error(ec, "receive");
+    return s;
+  }
+
+  /// Receive some data on a connected socket.
+  /**
+   * This function is used to receive data on the raw socket. The function
+   * call will block until data has been received successfully or an error
+   * occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The receive operation can only be used with a connected socket. Use
+   * the receive_from function to receive data on an unconnected raw
+   * socket.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive(
+        this->impl_.get_implementation(), buffers, flags, ec);
+    asio::detail::throw_error(ec, "receive");
+    return s;
+  }
+
+  /// Receive some data on a connected socket.
+  /**
+   * This function is used to receive data on the raw socket. The function
+   * call will block until data has been received successfully or an error
+   * occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes received.
+   *
+   * @note The receive operation can only be used with a connected socket. Use
+   * the receive_from function to receive data on an unconnected raw
+   * socket.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    return this->impl_.get_service().receive(
+        this->impl_.get_implementation(), buffers, flags, ec);
+  }
+
+  /// Start an asynchronous receive on a connected socket.
+  /**
+   * This function is used to asynchronously receive data from the raw
+   * socket. The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The async_receive operation can only be used with a connected socket.
+   * Use the async_receive_from function to receive data on an unconnected
+   * raw socket.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * socket.async_receive(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive(const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive(this), handler,
+        buffers, socket_base::message_flags(0));
+  }
+
+  /// Start an asynchronous receive on a connected socket.
+  /**
+   * This function is used to asynchronously receive data from the raw
+   * socket. The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The async_receive operation can only be used with a connected socket.
+   * Use the async_receive_from function to receive data on an unconnected
+   * raw socket.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags flags,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive(this), handler, buffers, flags);
+  }
+
+  /// Receive raw data with the endpoint of the sender.
+  /**
+   * This function is used to receive raw data. The function call will block
+   * until data has been received successfully or an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param sender_endpoint An endpoint object that receives the endpoint of
+   * the remote sender of the data.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * asio::ip::udp::endpoint sender_endpoint;
+   * socket.receive_from(
+   *     asio::buffer(data, size), sender_endpoint);
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive_from(const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive_from(
+        this->impl_.get_implementation(), buffers, sender_endpoint, 0, ec);
+    asio::detail::throw_error(ec, "receive_from");
+    return s;
+  }
+  
+  /// Receive raw data with the endpoint of the sender.
+  /**
+   * This function is used to receive raw data. The function call will block
+   * until data has been received successfully or an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param sender_endpoint An endpoint object that receives the endpoint of
+   * the remote sender of the data.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive_from(const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint, socket_base::message_flags flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive_from(
+        this->impl_.get_implementation(), buffers, sender_endpoint, flags, ec);
+    asio::detail::throw_error(ec, "receive_from");
+    return s;
+  }
+  
+  /// Receive raw data with the endpoint of the sender.
+  /**
+   * This function is used to receive raw data. The function call will block
+   * until data has been received successfully or an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param sender_endpoint An endpoint object that receives the endpoint of
+   * the remote sender of the data.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes received.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive_from(const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint, socket_base::message_flags flags,
+      asio::error_code& ec)
+  {
+    return this->impl_.get_service().receive_from(
+        this->impl_.get_implementation(), buffers, sender_endpoint, flags, ec);
+  }
+
+  /// Start an asynchronous receive.
+  /**
+   * This function is used to asynchronously receive raw data. The function
+   * call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param sender_endpoint An endpoint object that receives the endpoint of
+   * the remote sender of the data. Ownership of the sender_endpoint object
+   * is retained by the caller, which must guarantee that it is valid until the
+   * handler is called.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code socket.async_receive_from(
+   *     asio::buffer(data, size), 0, sender_endpoint, handler); @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive_from(const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive_from(this), handler, buffers,
+        &sender_endpoint, socket_base::message_flags(0));
+  }
+
+  /// Start an asynchronous receive.
+  /**
+   * This function is used to asynchronously receive raw data. The function
+   * call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param sender_endpoint An endpoint object that receives the endpoint of
+   * the remote sender of the data. Ownership of the sender_endpoint object
+   * is retained by the caller, which must guarantee that it is valid until the
+   * handler is called.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive_from(const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint, socket_base::message_flags flags,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive_from(this), handler,
+        buffers, &sender_endpoint, flags);
+  }
+
+private:
+  class initiate_async_send
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_send(basic_raw_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        const ConstBufferSequence& buffers,
+        socket_base::message_flags flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      detail::non_const_lvalue<WriteHandler> handler2(handler);
+      self_->impl_.get_service().async_send(
+          self_->impl_.get_implementation(), buffers, flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_raw_socket* self_;
+  };
+
+  class initiate_async_send_to
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_send_to(basic_raw_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        const ConstBufferSequence& buffers, const endpoint_type& destination,
+        socket_base::message_flags flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      detail::non_const_lvalue<WriteHandler> handler2(handler);
+      self_->impl_.get_service().async_send_to(
+          self_->impl_.get_implementation(), buffers, destination, flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_raw_socket* self_;
+  };
+
+  class initiate_async_receive
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_receive(basic_raw_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        const MutableBufferSequence& buffers,
+        socket_base::message_flags flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      detail::non_const_lvalue<ReadHandler> handler2(handler);
+      self_->impl_.get_service().async_receive(
+          self_->impl_.get_implementation(), buffers, flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_raw_socket* self_;
+  };
+
+  class initiate_async_receive_from
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_receive_from(basic_raw_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        const MutableBufferSequence& buffers, endpoint_type* sender_endpoint,
+        socket_base::message_flags flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      detail::non_const_lvalue<ReadHandler> handler2(handler);
+      self_->impl_.get_service().async_receive_from(
+          self_->impl_.get_implementation(), buffers, *sender_endpoint, flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_raw_socket* self_;
+  };
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BASIC_RAW_SOCKET_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_seq_packet_socket.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_seq_packet_socket.hpp
new file mode 100644
index 00000000000..11ec3542c03
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_seq_packet_socket.hpp
@@ -0,0 +1,756 @@
+//
+// basic_seq_packet_socket.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_SEQ_PACKET_SOCKET_HPP
+#define ASIO_BASIC_SEQ_PACKET_SOCKET_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/basic_socket.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if !defined(ASIO_BASIC_SEQ_PACKET_SOCKET_FWD_DECL)
+#define ASIO_BASIC_SEQ_PACKET_SOCKET_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Protocol, typename Executor = executor>
+class basic_seq_packet_socket;
+
+#endif // !defined(ASIO_BASIC_SEQ_PACKET_SOCKET_FWD_DECL)
+
+/// Provides sequenced packet socket functionality.
+/**
+ * The basic_seq_packet_socket class template provides asynchronous and blocking
+ * sequenced packet socket functionality.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename Protocol, typename Executor>
+class basic_seq_packet_socket
+  : public basic_socket<Protocol, Executor>
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the socket type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The socket type when rebound to the specified executor.
+    typedef basic_seq_packet_socket<Protocol, Executor1> other;
+  };
+
+  /// The native representation of a socket.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#else
+  typedef typename basic_socket<Protocol,
+    Executor>::native_handle_type native_handle_type;
+#endif
+
+  /// The protocol type.
+  typedef Protocol protocol_type;
+
+  /// The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  /// Construct a basic_seq_packet_socket without opening it.
+  /**
+   * This constructor creates a sequenced packet socket without opening it. The
+   * socket needs to be opened and then connected or accepted before data can
+   * be sent or received on it.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   */
+  explicit basic_seq_packet_socket(const executor_type& ex)
+    : basic_socket<Protocol, Executor>(ex)
+  {
+  }
+
+  /// Construct a basic_seq_packet_socket without opening it.
+  /**
+   * This constructor creates a sequenced packet socket without opening it. The
+   * socket needs to be opened and then connected or accepted before data can
+   * be sent or received on it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   */
+  template <typename ExecutionContext>
+  explicit basic_seq_packet_socket(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context)
+  {
+  }
+
+  /// Construct and open a basic_seq_packet_socket.
+  /**
+   * This constructor creates and opens a sequenced_packet socket. The socket
+   * needs to be connected or accepted before data can be sent or received on
+   * it.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_seq_packet_socket(const executor_type& ex,
+      const protocol_type& protocol)
+    : basic_socket<Protocol, Executor>(ex, protocol)
+  {
+  }
+
+  /// Construct and open a basic_seq_packet_socket.
+  /**
+   * This constructor creates and opens a sequenced_packet socket. The socket
+   * needs to be connected or accepted before data can be sent or received on
+   * it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_seq_packet_socket(ExecutionContext& context,
+      const protocol_type& protocol,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, protocol)
+  {
+  }
+
+  /// Construct a basic_seq_packet_socket, opening it and binding it to the
+  /// given local endpoint.
+  /**
+   * This constructor creates a sequenced packet socket and automatically opens
+   * it bound to the specified endpoint on the local machine. The protocol used
+   * is the protocol associated with the given endpoint.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param endpoint An endpoint on the local machine to which the sequenced
+   * packet socket will be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_seq_packet_socket(const executor_type& ex,
+      const endpoint_type& endpoint)
+    : basic_socket<Protocol, Executor>(ex, endpoint)
+  {
+  }
+
+  /// Construct a basic_seq_packet_socket, opening it and binding it to the
+  /// given local endpoint.
+  /**
+   * This constructor creates a sequenced packet socket and automatically opens
+   * it bound to the specified endpoint on the local machine. The protocol used
+   * is the protocol associated with the given endpoint.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param endpoint An endpoint on the local machine to which the sequenced
+   * packet socket will be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_seq_packet_socket(ExecutionContext& context,
+      const endpoint_type& endpoint,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, endpoint)
+  {
+  }
+
+  /// Construct a basic_seq_packet_socket on an existing native socket.
+  /**
+   * This constructor creates a sequenced packet socket object to hold an
+   * existing native socket.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_socket The new underlying socket implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_seq_packet_socket(const executor_type& ex,
+      const protocol_type& protocol, const native_handle_type& native_socket)
+    : basic_socket<Protocol, Executor>(ex, protocol, native_socket)
+  {
+  }
+
+  /// Construct a basic_seq_packet_socket on an existing native socket.
+  /**
+   * This constructor creates a sequenced packet socket object to hold an
+   * existing native socket.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_socket The new underlying socket implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_seq_packet_socket(ExecutionContext& context,
+      const protocol_type& protocol, const native_handle_type& native_socket,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, protocol, native_socket)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_seq_packet_socket from another.
+  /**
+   * This constructor moves a sequenced packet socket from one object to
+   * another.
+   *
+   * @param other The other basic_seq_packet_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_seq_packet_socket(const executor_type&)
+   * constructor.
+   */
+  basic_seq_packet_socket(basic_seq_packet_socket&& other) ASIO_NOEXCEPT
+    : basic_socket<Protocol, Executor>(std::move(other))
+  {
+  }
+
+  /// Move-assign a basic_seq_packet_socket from another.
+  /**
+   * This assignment operator moves a sequenced packet socket from one object to
+   * another.
+   *
+   * @param other The other basic_seq_packet_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_seq_packet_socket(const executor_type&)
+   * constructor.
+   */
+  basic_seq_packet_socket& operator=(basic_seq_packet_socket&& other)
+  {
+    basic_socket<Protocol, Executor>::operator=(std::move(other));
+    return *this;
+  }
+
+  /// Move-construct a basic_seq_packet_socket from a socket of another protocol
+  /// type.
+  /**
+   * This constructor moves a sequenced packet socket from one object to
+   * another.
+   *
+   * @param other The other basic_seq_packet_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_seq_packet_socket(const executor_type&)
+   * constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  basic_seq_packet_socket(basic_seq_packet_socket<Protocol1, Executor1>&& other,
+      typename enable_if<
+        is_convertible<Protocol1, Protocol>::value
+          && is_convertible<Executor1, Executor>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(std::move(other))
+  {
+  }
+
+  /// Move-assign a basic_seq_packet_socket from a socket of another protocol
+  /// type.
+  /**
+   * This assignment operator moves a sequenced packet socket from one object to
+   * another.
+   *
+   * @param other The other basic_seq_packet_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_seq_packet_socket(const executor_type&)
+   * constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  typename enable_if<
+    is_convertible<Protocol1, Protocol>::value
+      && is_convertible<Executor1, Executor>::value,
+    basic_seq_packet_socket&
+  >::type operator=(basic_seq_packet_socket<Protocol1, Executor1>&& other)
+  {
+    basic_socket<Protocol, Executor>::operator=(std::move(other));
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destroys the socket.
+  /**
+   * This function destroys the socket, cancelling any outstanding asynchronous
+   * operations associated with the socket as if by calling @c cancel.
+   */
+  ~basic_seq_packet_socket()
+  {
+  }
+
+  /// Send some data on the socket.
+  /**
+   * This function is used to send data on the sequenced packet socket. The
+   * function call will block until the data has been sent successfully, or an
+   * until error occurs.
+   *
+   * @param buffers One or more data buffers to be sent on the socket.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.send(asio::buffer(data, size), 0);
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, flags, ec);
+    asio::detail::throw_error(ec, "send");
+    return s;
+  }
+
+  /// Send some data on the socket.
+  /**
+   * This function is used to send data on the sequenced packet socket. The
+   * function call will block the data has been sent successfully, or an until
+   * error occurs.
+   *
+   * @param buffers One or more data buffers to be sent on the socket.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes sent. Returns 0 if an error occurred.
+   *
+   * @note The send operation may not transmit all of the data to the peer.
+   * Consider using the @ref write function if you need to ensure that all data
+   * is written before the blocking operation completes.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    return this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, flags, ec);
+  }
+
+  /// Start an asynchronous send.
+  /**
+   * This function is used to asynchronously send data on the sequenced packet
+   * socket. The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be sent on the socket. Although
+   * the buffers object may be copied as necessary, ownership of the underlying
+   * memory blocks is retained by the caller, which must guarantee that they
+   * remain valid until the handler is called.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param handler The handler to be called when the send operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes sent.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.async_send(asio::buffer(data, size), 0, handler);
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send(this), handler, buffers, flags);
+  }
+
+  /// Receive some data on the socket.
+  /**
+   * This function is used to receive data on the sequenced packet socket. The
+   * function call will block until data has been received successfully, or
+   * until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param out_flags After the receive call completes, contains flags
+   * associated with the received data. For example, if the
+   * socket_base::message_end_of_record bit is set then the received data marks
+   * the end of a record.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * socket.receive(asio::buffer(data, size), out_flags);
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags& out_flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive_with_flags(
+        this->impl_.get_implementation(), buffers, 0, out_flags, ec);
+    asio::detail::throw_error(ec, "receive");
+    return s;
+  }
+
+  /// Receive some data on the socket.
+  /**
+   * This function is used to receive data on the sequenced packet socket. The
+   * function call will block until data has been received successfully, or
+   * until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param in_flags Flags specifying how the receive call is to be made.
+   *
+   * @param out_flags After the receive call completes, contains flags
+   * associated with the received data. For example, if the
+   * socket_base::message_end_of_record bit is set then the received data marks
+   * the end of a record.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The receive operation may not receive all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that the
+   * requested amount of data is read before the blocking operation completes.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * socket.receive(asio::buffer(data, size), 0, out_flags);
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags in_flags,
+      socket_base::message_flags& out_flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive_with_flags(
+        this->impl_.get_implementation(), buffers, in_flags, out_flags, ec);
+    asio::detail::throw_error(ec, "receive");
+    return s;
+  }
+
+  /// Receive some data on a connected socket.
+  /**
+   * This function is used to receive data on the sequenced packet socket. The
+   * function call will block until data has been received successfully, or
+   * until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param in_flags Flags specifying how the receive call is to be made.
+   *
+   * @param out_flags After the receive call completes, contains flags
+   * associated with the received data. For example, if the
+   * socket_base::message_end_of_record bit is set then the received data marks
+   * the end of a record.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes received. Returns 0 if an error occurred.
+   *
+   * @note The receive operation may not receive all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that the
+   * requested amount of data is read before the blocking operation completes.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags in_flags,
+      socket_base::message_flags& out_flags, asio::error_code& ec)
+  {
+    return this->impl_.get_service().receive_with_flags(
+        this->impl_.get_implementation(), buffers, in_flags, out_flags, ec);
+  }
+
+  /// Start an asynchronous receive.
+  /**
+   * This function is used to asynchronously receive data from the sequenced
+   * packet socket. The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param out_flags Once the asynchronous operation completes, contains flags
+   * associated with the received data. For example, if the
+   * socket_base::message_end_of_record bit is set then the received data marks
+   * the end of a record. The caller must guarantee that the referenced
+   * variable remains valid until the handler is called.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * socket.async_receive(asio::buffer(data, size), out_flags, handler);
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags& out_flags,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive_with_flags(this), handler,
+        buffers, socket_base::message_flags(0), &out_flags);
+  }
+
+  /// Start an asynchronous receive.
+  /**
+   * This function is used to asynchronously receive data from the sequenced
+   * data socket. The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param in_flags Flags specifying how the receive call is to be made.
+   *
+   * @param out_flags Once the asynchronous operation completes, contains flags
+   * associated with the received data. For example, if the
+   * socket_base::message_end_of_record bit is set then the received data marks
+   * the end of a record. The caller must guarantee that the referenced
+   * variable remains valid until the handler is called.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * socket.async_receive(
+   *     asio::buffer(data, size),
+   *     0, out_flags, handler);
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags in_flags,
+      socket_base::message_flags& out_flags,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive_with_flags(this),
+        handler, buffers, in_flags, &out_flags);
+  }
+
+private:
+  class initiate_async_send
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_send(basic_seq_packet_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        const ConstBufferSequence& buffers,
+        socket_base::message_flags flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      detail::non_const_lvalue<WriteHandler> handler2(handler);
+      self_->impl_.get_service().async_send(
+          self_->impl_.get_implementation(), buffers, flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_seq_packet_socket* self_;
+  };
+
+  class initiate_async_receive_with_flags
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_receive_with_flags(basic_seq_packet_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        const MutableBufferSequence& buffers,
+        socket_base::message_flags in_flags,
+        socket_base::message_flags* out_flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      detail::non_const_lvalue<ReadHandler> handler2(handler);
+      self_->impl_.get_service().async_receive_with_flags(
+          self_->impl_.get_implementation(), buffers, in_flags, *out_flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_seq_packet_socket* self_;
+  };
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BASIC_SEQ_PACKET_SOCKET_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_serial_port.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_serial_port.hpp
new file mode 100644
index 00000000000..b1d9c4a2de3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_serial_port.hpp
@@ -0,0 +1,907 @@
+//
+// basic_serial_port.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2008 Rep Invariant Systems, Inc. (info@repinvariant.com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_SERIAL_PORT_HPP
+#define ASIO_BASIC_SERIAL_PORT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_SERIAL_PORT) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include <string>
+#include "asio/async_result.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/io_object_impl.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/executor.hpp"
+#include "asio/serial_port_base.hpp"
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_serial_port_service.hpp"
+#else
+# include "asio/detail/reactive_serial_port_service.hpp"
+#endif
+
+#if defined(ASIO_HAS_MOVE)
+# include <utility>
+#endif // defined(ASIO_HAS_MOVE)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Provides serial port functionality.
+/**
+ * The basic_serial_port class provides a wrapper over serial port
+ * functionality.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename Executor = executor>
+class basic_serial_port
+  : public serial_port_base
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the serial port type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The serial port type when rebound to the specified executor.
+    typedef basic_serial_port<Executor1> other;
+  };
+
+  /// The native representation of a serial port.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#elif defined(ASIO_HAS_IOCP)
+  typedef detail::win_iocp_serial_port_service::native_handle_type
+    native_handle_type;
+#else
+  typedef detail::reactive_serial_port_service::native_handle_type
+    native_handle_type;
+#endif
+
+  /// A basic_basic_serial_port is always the lowest layer.
+  typedef basic_serial_port lowest_layer_type;
+
+  /// Construct a basic_serial_port without opening it.
+  /**
+   * This constructor creates a serial port without opening it.
+   *
+   * @param ex The I/O executor that the serial port will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * serial port.
+   */
+  explicit basic_serial_port(const executor_type& ex)
+    : impl_(ex)
+  {
+  }
+
+  /// Construct a basic_serial_port without opening it.
+  /**
+   * This constructor creates a serial port without opening it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the serial port will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the serial port.
+   */
+  template <typename ExecutionContext>
+  explicit basic_serial_port(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value,
+        basic_serial_port
+      >::type* = 0)
+    : impl_(context)
+  {
+  }
+
+  /// Construct and open a basic_serial_port.
+  /**
+   * This constructor creates and opens a serial port for the specified device
+   * name.
+   *
+   * @param ex The I/O executor that the serial port will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * serial port.
+   *
+   * @param device The platform-specific device name for this serial
+   * port.
+   */
+  basic_serial_port(const executor_type& ex, const char* device)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().open(impl_.get_implementation(), device, ec);
+    asio::detail::throw_error(ec, "open");
+  }
+
+  /// Construct and open a basic_serial_port.
+  /**
+   * This constructor creates and opens a serial port for the specified device
+   * name.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the serial port will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the serial port.
+   *
+   * @param device The platform-specific device name for this serial
+   * port.
+   */
+  template <typename ExecutionContext>
+  basic_serial_port(ExecutionContext& context, const char* device,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().open(impl_.get_implementation(), device, ec);
+    asio::detail::throw_error(ec, "open");
+  }
+
+  /// Construct and open a basic_serial_port.
+  /**
+   * This constructor creates and opens a serial port for the specified device
+   * name.
+   *
+   * @param ex The I/O executor that the serial port will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * serial port.
+   *
+   * @param device The platform-specific device name for this serial
+   * port.
+   */
+  basic_serial_port(const executor_type& ex, const std::string& device)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().open(impl_.get_implementation(), device, ec);
+    asio::detail::throw_error(ec, "open");
+  }
+
+  /// Construct and open a basic_serial_port.
+  /**
+   * This constructor creates and opens a serial port for the specified device
+   * name.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the serial port will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the serial port.
+   *
+   * @param device The platform-specific device name for this serial
+   * port.
+   */
+  template <typename ExecutionContext>
+  basic_serial_port(ExecutionContext& context, const std::string& device,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().open(impl_.get_implementation(), device, ec);
+    asio::detail::throw_error(ec, "open");
+  }
+
+  /// Construct a basic_serial_port on an existing native serial port.
+  /**
+   * This constructor creates a serial port object to hold an existing native
+   * serial port.
+   *
+   * @param ex The I/O executor that the serial port will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * serial port.
+   *
+   * @param native_serial_port A native serial port.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_serial_port(const executor_type& ex,
+      const native_handle_type& native_serial_port)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        native_serial_port, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Construct a basic_serial_port on an existing native serial port.
+  /**
+   * This constructor creates a serial port object to hold an existing native
+   * serial port.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the serial port will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the serial port.
+   *
+   * @param native_serial_port A native serial port.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_serial_port(ExecutionContext& context,
+      const native_handle_type& native_serial_port,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        native_serial_port, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_serial_port from another.
+  /**
+   * This constructor moves a serial port from one object to another.
+   *
+   * @param other The other basic_serial_port object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_serial_port(const executor_type&)
+   * constructor.
+   */
+  basic_serial_port(basic_serial_port&& other)
+    : impl_(std::move(other.impl_))
+  {
+  }
+
+  /// Move-assign a basic_serial_port from another.
+  /**
+   * This assignment operator moves a serial port from one object to another.
+   *
+   * @param other The other basic_serial_port object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_serial_port(const executor_type&)
+   * constructor.
+   */
+  basic_serial_port& operator=(basic_serial_port&& other)
+  {
+    impl_ = std::move(other.impl_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destroys the serial port.
+  /**
+   * This function destroys the serial port, cancelling any outstanding
+   * asynchronous wait operations associated with the serial port as if by
+   * calling @c cancel.
+   */
+  ~basic_serial_port()
+  {
+  }
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return impl_.get_executor();
+  }
+
+  /// Get a reference to the lowest layer.
+  /**
+   * This function returns a reference to the lowest layer in a stack of
+   * layers. Since a basic_serial_port cannot contain any further layers, it
+   * simply returns a reference to itself.
+   *
+   * @return A reference to the lowest layer in the stack of layers. Ownership
+   * is not transferred to the caller.
+   */
+  lowest_layer_type& lowest_layer()
+  {
+    return *this;
+  }
+
+  /// Get a const reference to the lowest layer.
+  /**
+   * This function returns a const reference to the lowest layer in a stack of
+   * layers. Since a basic_serial_port cannot contain any further layers, it
+   * simply returns a reference to itself.
+   *
+   * @return A const reference to the lowest layer in the stack of layers.
+   * Ownership is not transferred to the caller.
+   */
+  const lowest_layer_type& lowest_layer() const
+  {
+    return *this;
+  }
+
+  /// Open the serial port using the specified device name.
+  /**
+   * This function opens the serial port for the specified device name.
+   *
+   * @param device The platform-specific device name.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void open(const std::string& device)
+  {
+    asio::error_code ec;
+    impl_.get_service().open(impl_.get_implementation(), device, ec);
+    asio::detail::throw_error(ec, "open");
+  }
+
+  /// Open the serial port using the specified device name.
+  /**
+   * This function opens the serial port using the given platform-specific
+   * device name.
+   *
+   * @param device The platform-specific device name.
+   *
+   * @param ec Set the indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID open(const std::string& device,
+      asio::error_code& ec)
+  {
+    impl_.get_service().open(impl_.get_implementation(), device, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Assign an existing native serial port to the serial port.
+  /*
+   * This function opens the serial port to hold an existing native serial port.
+   *
+   * @param native_serial_port A native serial port.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void assign(const native_handle_type& native_serial_port)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        native_serial_port, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Assign an existing native serial port to the serial port.
+  /*
+   * This function opens the serial port to hold an existing native serial port.
+   *
+   * @param native_serial_port A native serial port.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID assign(const native_handle_type& native_serial_port,
+      asio::error_code& ec)
+  {
+    impl_.get_service().assign(impl_.get_implementation(),
+        native_serial_port, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Determine whether the serial port is open.
+  bool is_open() const
+  {
+    return impl_.get_service().is_open(impl_.get_implementation());
+  }
+
+  /// Close the serial port.
+  /**
+   * This function is used to close the serial port. Any asynchronous read or
+   * write operations will be cancelled immediately, and will complete with the
+   * asio::error::operation_aborted error.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void close()
+  {
+    asio::error_code ec;
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "close");
+  }
+
+  /// Close the serial port.
+  /**
+   * This function is used to close the serial port. Any asynchronous read or
+   * write operations will be cancelled immediately, and will complete with the
+   * asio::error::operation_aborted error.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID close(asio::error_code& ec)
+  {
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Get the native serial port representation.
+  /**
+   * This function may be used to obtain the underlying representation of the
+   * serial port. This is intended to allow access to native serial port
+   * functionality that is not otherwise provided.
+   */
+  native_handle_type native_handle()
+  {
+    return impl_.get_service().native_handle(impl_.get_implementation());
+  }
+
+  /// Cancel all asynchronous operations associated with the serial port.
+  /**
+   * This function causes all outstanding asynchronous read or write operations
+   * to finish immediately, and the handlers for cancelled operations will be
+   * passed the asio::error::operation_aborted error.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void cancel()
+  {
+    asio::error_code ec;
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "cancel");
+  }
+
+  /// Cancel all asynchronous operations associated with the serial port.
+  /**
+   * This function causes all outstanding asynchronous read or write operations
+   * to finish immediately, and the handlers for cancelled operations will be
+   * passed the asio::error::operation_aborted error.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID cancel(asio::error_code& ec)
+  {
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Send a break sequence to the serial port.
+  /**
+   * This function causes a break sequence of platform-specific duration to be
+   * sent out the serial port.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void send_break()
+  {
+    asio::error_code ec;
+    impl_.get_service().send_break(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "send_break");
+  }
+
+  /// Send a break sequence to the serial port.
+  /**
+   * This function causes a break sequence of platform-specific duration to be
+   * sent out the serial port.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID send_break(asio::error_code& ec)
+  {
+    impl_.get_service().send_break(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Set an option on the serial port.
+  /**
+   * This function is used to set an option on the serial port.
+   *
+   * @param option The option value to be set on the serial port.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @sa SettableSerialPortOption @n
+   * asio::serial_port_base::baud_rate @n
+   * asio::serial_port_base::flow_control @n
+   * asio::serial_port_base::parity @n
+   * asio::serial_port_base::stop_bits @n
+   * asio::serial_port_base::character_size
+   */
+  template <typename SettableSerialPortOption>
+  void set_option(const SettableSerialPortOption& option)
+  {
+    asio::error_code ec;
+    impl_.get_service().set_option(impl_.get_implementation(), option, ec);
+    asio::detail::throw_error(ec, "set_option");
+  }
+
+  /// Set an option on the serial port.
+  /**
+   * This function is used to set an option on the serial port.
+   *
+   * @param option The option value to be set on the serial port.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @sa SettableSerialPortOption @n
+   * asio::serial_port_base::baud_rate @n
+   * asio::serial_port_base::flow_control @n
+   * asio::serial_port_base::parity @n
+   * asio::serial_port_base::stop_bits @n
+   * asio::serial_port_base::character_size
+   */
+  template <typename SettableSerialPortOption>
+  ASIO_SYNC_OP_VOID set_option(const SettableSerialPortOption& option,
+      asio::error_code& ec)
+  {
+    impl_.get_service().set_option(impl_.get_implementation(), option, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Get an option from the serial port.
+  /**
+   * This function is used to get the current value of an option on the serial
+   * port.
+   *
+   * @param option The option value to be obtained from the serial port.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @sa GettableSerialPortOption @n
+   * asio::serial_port_base::baud_rate @n
+   * asio::serial_port_base::flow_control @n
+   * asio::serial_port_base::parity @n
+   * asio::serial_port_base::stop_bits @n
+   * asio::serial_port_base::character_size
+   */
+  template <typename GettableSerialPortOption>
+  void get_option(GettableSerialPortOption& option) const
+  {
+    asio::error_code ec;
+    impl_.get_service().get_option(impl_.get_implementation(), option, ec);
+    asio::detail::throw_error(ec, "get_option");
+  }
+
+  /// Get an option from the serial port.
+  /**
+   * This function is used to get the current value of an option on the serial
+   * port.
+   *
+   * @param option The option value to be obtained from the serial port.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @sa GettableSerialPortOption @n
+   * asio::serial_port_base::baud_rate @n
+   * asio::serial_port_base::flow_control @n
+   * asio::serial_port_base::parity @n
+   * asio::serial_port_base::stop_bits @n
+   * asio::serial_port_base::character_size
+   */
+  template <typename GettableSerialPortOption>
+  ASIO_SYNC_OP_VOID get_option(GettableSerialPortOption& option,
+      asio::error_code& ec) const
+  {
+    impl_.get_service().get_option(impl_.get_implementation(), option, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Write some data to the serial port.
+  /**
+   * This function is used to write data to the serial port. The function call
+   * will block until one or more bytes of the data has been written
+   * successfully, or until an error occurs.
+   *
+   * @param buffers One or more data buffers to be written to the serial port.
+   *
+   * @returns The number of bytes written.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The write_some operation may not transmit all of the data to the
+   * peer. Consider using the @ref write function if you need to ensure that
+   * all data is written before the blocking operation completes.
+   *
+   * @par Example
+   * To write a single data buffer use the @ref buffer function as follows:
+   * @code
+   * basic_serial_port.write_some(asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on writing multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().write_some(
+        impl_.get_implementation(), buffers, ec);
+    asio::detail::throw_error(ec, "write_some");
+    return s;
+  }
+
+  /// Write some data to the serial port.
+  /**
+   * This function is used to write data to the serial port. The function call
+   * will block until one or more bytes of the data has been written
+   * successfully, or until an error occurs.
+   *
+   * @param buffers One or more data buffers to be written to the serial port.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes written. Returns 0 if an error occurred.
+   *
+   * @note The write_some operation may not transmit all of the data to the
+   * peer. Consider using the @ref write function if you need to ensure that
+   * all data is written before the blocking operation completes.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return impl_.get_service().write_some(
+        impl_.get_implementation(), buffers, ec);
+  }
+
+  /// Start an asynchronous write.
+  /**
+   * This function is used to asynchronously write data to the serial port.
+   * The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be written to the serial port.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the write operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes written.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The write operation may not transmit all of the data to the peer.
+   * Consider using the @ref async_write function if you need to ensure that all
+   * data is written before the asynchronous operation completes.
+   *
+   * @par Example
+   * To write a single data buffer use the @ref buffer function as follows:
+   * @code
+   * basic_serial_port.async_write_some(
+   *     asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on writing multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_write_some(const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_write_some(this), handler, buffers);
+  }
+
+  /// Read some data from the serial port.
+  /**
+   * This function is used to read data from the serial port. The function
+   * call will block until one or more bytes of data has been read successfully,
+   * or until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   *
+   * @returns The number of bytes read.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that
+   * the requested amount of data is read before the blocking operation
+   * completes.
+   *
+   * @par Example
+   * To read into a single data buffer use the @ref buffer function as follows:
+   * @code
+   * basic_serial_port.read_some(asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on reading into multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().read_some(
+        impl_.get_implementation(), buffers, ec);
+    asio::detail::throw_error(ec, "read_some");
+    return s;
+  }
+
+  /// Read some data from the serial port.
+  /**
+   * This function is used to read data from the serial port. The function
+   * call will block until one or more bytes of data has been read successfully,
+   * or until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes read. Returns 0 if an error occurred.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that
+   * the requested amount of data is read before the blocking operation
+   * completes.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return impl_.get_service().read_some(
+        impl_.get_implementation(), buffers, ec);
+  }
+
+  /// Start an asynchronous read.
+  /**
+   * This function is used to asynchronously read data from the serial port.
+   * The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the read operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes read.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The read operation may not read all of the requested number of bytes.
+   * Consider using the @ref async_read function if you need to ensure that the
+   * requested amount of data is read before the asynchronous operation
+   * completes.
+   *
+   * @par Example
+   * To read into a single data buffer use the @ref buffer function as follows:
+   * @code
+   * basic_serial_port.async_read_some(
+   *     asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on reading into multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_read_some(const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_read_some(this), handler, buffers);
+  }
+
+private:
+  // Disallow copying and assignment.
+  basic_serial_port(const basic_serial_port&) ASIO_DELETED;
+  basic_serial_port& operator=(const basic_serial_port&) ASIO_DELETED;
+
+  class initiate_async_write_some
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_write_some(basic_serial_port* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        const ConstBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      detail::non_const_lvalue<WriteHandler> handler2(handler);
+      self_->impl_.get_service().async_write_some(
+          self_->impl_.get_implementation(), buffers, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_serial_port* self_;
+  };
+
+  class initiate_async_read_some
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_read_some(basic_serial_port* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        const MutableBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      detail::non_const_lvalue<ReadHandler> handler2(handler);
+      self_->impl_.get_service().async_read_some(
+          self_->impl_.get_implementation(), buffers, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_serial_port* self_;
+  };
+
+#if defined(ASIO_HAS_IOCP)
+  detail::io_object_impl<detail::win_iocp_serial_port_service, Executor> impl_;
+#else
+  detail::io_object_impl<detail::reactive_serial_port_service, Executor> impl_;
+#endif
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_SERIAL_PORT)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_BASIC_SERIAL_PORT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_signal_set.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_signal_set.hpp
new file mode 100644
index 00000000000..63515ae5afb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_signal_set.hpp
@@ -0,0 +1,568 @@
+//
+// basic_signal_set.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_SIGNAL_SET_HPP
+#define ASIO_BASIC_SIGNAL_SET_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/async_result.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/io_object_impl.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/signal_set_service.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/executor.hpp"
+
+namespace asio {
+
+/// Provides signal functionality.
+/**
+ * The basic_signal_set class provides the ability to perform an asynchronous
+ * wait for one or more signals to occur.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Example
+ * Performing an asynchronous wait:
+ * @code
+ * void handler(
+ *     const asio::error_code& error,
+ *     int signal_number)
+ * {
+ *   if (!error)
+ *   {
+ *     // A signal occurred.
+ *   }
+ * }
+ *
+ * ...
+ *
+ * // Construct a signal set registered for process termination.
+ * asio::signal_set signals(my_context, SIGINT, SIGTERM);
+ *
+ * // Start an asynchronous wait for one of the signals to occur.
+ * signals.async_wait(handler);
+ * @endcode
+ *
+ * @par Queueing of signal notifications
+ *
+ * If a signal is registered with a signal_set, and the signal occurs when
+ * there are no waiting handlers, then the signal notification is queued. The
+ * next async_wait operation on that signal_set will dequeue the notification.
+ * If multiple notifications are queued, subsequent async_wait operations
+ * dequeue them one at a time. Signal notifications are dequeued in order of
+ * ascending signal number.
+ *
+ * If a signal number is removed from a signal_set (using the @c remove or @c
+ * erase member functions) then any queued notifications for that signal are
+ * discarded.
+ *
+ * @par Multiple registration of signals
+ *
+ * The same signal number may be registered with different signal_set objects.
+ * When the signal occurs, one handler is called for each signal_set object.
+ *
+ * Note that multiple registration only works for signals that are registered
+ * using Asio. The application must not also register a signal handler using
+ * functions such as @c signal() or @c sigaction().
+ *
+ * @par Signal masking on POSIX platforms
+ *
+ * POSIX allows signals to be blocked using functions such as @c sigprocmask()
+ * and @c pthread_sigmask(). For signals to be delivered, programs must ensure
+ * that any signals registered using signal_set objects are unblocked in at
+ * least one thread.
+ */
+template <typename Executor = executor>
+class basic_signal_set
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the signal set type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The signal set type when rebound to the specified executor.
+    typedef basic_signal_set<Executor1> other;
+  };
+
+  /// Construct a signal set without adding any signals.
+  /**
+   * This constructor creates a signal set without registering for any signals.
+   *
+   * @param ex The I/O executor that the signal set will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * signal set.
+   */
+  explicit basic_signal_set(const executor_type& ex)
+    : impl_(ex)
+  {
+  }
+
+  /// Construct a signal set without adding any signals.
+  /**
+   * This constructor creates a signal set without registering for any signals.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the signal set will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the signal set.
+   */
+  template <typename ExecutionContext>
+  explicit basic_signal_set(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+  }
+
+  /// Construct a signal set and add one signal.
+  /**
+   * This constructor creates a signal set and registers for one signal.
+   *
+   * @param ex The I/O executor that the signal set will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * signal set.
+   *
+   * @param signal_number_1 The signal number to be added.
+   *
+   * @note This constructor is equivalent to performing:
+   * @code asio::signal_set signals(ex);
+   * signals.add(signal_number_1); @endcode
+   */
+  basic_signal_set(const executor_type& ex, int signal_number_1)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().add(impl_.get_implementation(), signal_number_1, ec);
+    asio::detail::throw_error(ec, "add");
+  }
+
+  /// Construct a signal set and add one signal.
+  /**
+   * This constructor creates a signal set and registers for one signal.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the signal set will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the signal set.
+   *
+   * @param signal_number_1 The signal number to be added.
+   *
+   * @note This constructor is equivalent to performing:
+   * @code asio::signal_set signals(context);
+   * signals.add(signal_number_1); @endcode
+   */
+  template <typename ExecutionContext>
+  basic_signal_set(ExecutionContext& context, int signal_number_1,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().add(impl_.get_implementation(), signal_number_1, ec);
+    asio::detail::throw_error(ec, "add");
+  }
+
+  /// Construct a signal set and add two signals.
+  /**
+   * This constructor creates a signal set and registers for two signals.
+   *
+   * @param ex The I/O executor that the signal set will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * signal set.
+   *
+   * @param signal_number_1 The first signal number to be added.
+   *
+   * @param signal_number_2 The second signal number to be added.
+   *
+   * @note This constructor is equivalent to performing:
+   * @code asio::signal_set signals(ex);
+   * signals.add(signal_number_1);
+   * signals.add(signal_number_2); @endcode
+   */
+  basic_signal_set(const executor_type& ex, int signal_number_1,
+      int signal_number_2)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().add(impl_.get_implementation(), signal_number_1, ec);
+    asio::detail::throw_error(ec, "add");
+    impl_.get_service().add(impl_.get_implementation(), signal_number_2, ec);
+    asio::detail::throw_error(ec, "add");
+  }
+
+  /// Construct a signal set and add two signals.
+  /**
+   * This constructor creates a signal set and registers for two signals.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the signal set will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the signal set.
+   *
+   * @param signal_number_1 The first signal number to be added.
+   *
+   * @param signal_number_2 The second signal number to be added.
+   *
+   * @note This constructor is equivalent to performing:
+   * @code asio::signal_set signals(context);
+   * signals.add(signal_number_1);
+   * signals.add(signal_number_2); @endcode
+   */
+  template <typename ExecutionContext>
+  basic_signal_set(ExecutionContext& context, int signal_number_1,
+      int signal_number_2,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().add(impl_.get_implementation(), signal_number_1, ec);
+    asio::detail::throw_error(ec, "add");
+    impl_.get_service().add(impl_.get_implementation(), signal_number_2, ec);
+    asio::detail::throw_error(ec, "add");
+  }
+
+  /// Construct a signal set and add three signals.
+  /**
+   * This constructor creates a signal set and registers for three signals.
+   *
+   * @param ex The I/O executor that the signal set will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * signal set.
+   *
+   * @param signal_number_1 The first signal number to be added.
+   *
+   * @param signal_number_2 The second signal number to be added.
+   *
+   * @param signal_number_3 The third signal number to be added.
+   *
+   * @note This constructor is equivalent to performing:
+   * @code asio::signal_set signals(ex);
+   * signals.add(signal_number_1);
+   * signals.add(signal_number_2);
+   * signals.add(signal_number_3); @endcode
+   */
+  basic_signal_set(const executor_type& ex, int signal_number_1,
+      int signal_number_2, int signal_number_3)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().add(impl_.get_implementation(), signal_number_1, ec);
+    asio::detail::throw_error(ec, "add");
+    impl_.get_service().add(impl_.get_implementation(), signal_number_2, ec);
+    asio::detail::throw_error(ec, "add");
+    impl_.get_service().add(impl_.get_implementation(), signal_number_3, ec);
+    asio::detail::throw_error(ec, "add");
+  }
+
+  /// Construct a signal set and add three signals.
+  /**
+   * This constructor creates a signal set and registers for three signals.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the signal set will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the signal set.
+   *
+   * @param signal_number_1 The first signal number to be added.
+   *
+   * @param signal_number_2 The second signal number to be added.
+   *
+   * @param signal_number_3 The third signal number to be added.
+   *
+   * @note This constructor is equivalent to performing:
+   * @code asio::signal_set signals(context);
+   * signals.add(signal_number_1);
+   * signals.add(signal_number_2);
+   * signals.add(signal_number_3); @endcode
+   */
+  template <typename ExecutionContext>
+  basic_signal_set(ExecutionContext& context, int signal_number_1,
+      int signal_number_2, int signal_number_3,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().add(impl_.get_implementation(), signal_number_1, ec);
+    asio::detail::throw_error(ec, "add");
+    impl_.get_service().add(impl_.get_implementation(), signal_number_2, ec);
+    asio::detail::throw_error(ec, "add");
+    impl_.get_service().add(impl_.get_implementation(), signal_number_3, ec);
+    asio::detail::throw_error(ec, "add");
+  }
+
+  /// Destroys the signal set.
+  /**
+   * This function destroys the signal set, cancelling any outstanding
+   * asynchronous wait operations associated with the signal set as if by
+   * calling @c cancel.
+   */
+  ~basic_signal_set()
+  {
+  }
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return impl_.get_executor();
+  }
+
+  /// Add a signal to a signal_set.
+  /**
+   * This function adds the specified signal to the set. It has no effect if the
+   * signal is already in the set.
+   *
+   * @param signal_number The signal to be added to the set.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void add(int signal_number)
+  {
+    asio::error_code ec;
+    impl_.get_service().add(impl_.get_implementation(), signal_number, ec);
+    asio::detail::throw_error(ec, "add");
+  }
+
+  /// Add a signal to a signal_set.
+  /**
+   * This function adds the specified signal to the set. It has no effect if the
+   * signal is already in the set.
+   *
+   * @param signal_number The signal to be added to the set.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID add(int signal_number,
+      asio::error_code& ec)
+  {
+    impl_.get_service().add(impl_.get_implementation(), signal_number, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Remove a signal from a signal_set.
+  /**
+   * This function removes the specified signal from the set. It has no effect
+   * if the signal is not in the set.
+   *
+   * @param signal_number The signal to be removed from the set.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Removes any notifications that have been queued for the specified
+   * signal number.
+   */
+  void remove(int signal_number)
+  {
+    asio::error_code ec;
+    impl_.get_service().remove(impl_.get_implementation(), signal_number, ec);
+    asio::detail::throw_error(ec, "remove");
+  }
+
+  /// Remove a signal from a signal_set.
+  /**
+   * This function removes the specified signal from the set. It has no effect
+   * if the signal is not in the set.
+   *
+   * @param signal_number The signal to be removed from the set.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Removes any notifications that have been queued for the specified
+   * signal number.
+   */
+  ASIO_SYNC_OP_VOID remove(int signal_number,
+      asio::error_code& ec)
+  {
+    impl_.get_service().remove(impl_.get_implementation(), signal_number, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Remove all signals from a signal_set.
+  /**
+   * This function removes all signals from the set. It has no effect if the set
+   * is already empty.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Removes all queued notifications.
+   */
+  void clear()
+  {
+    asio::error_code ec;
+    impl_.get_service().clear(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "clear");
+  }
+
+  /// Remove all signals from a signal_set.
+  /**
+   * This function removes all signals from the set. It has no effect if the set
+   * is already empty.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Removes all queued notifications.
+   */
+  ASIO_SYNC_OP_VOID clear(asio::error_code& ec)
+  {
+    impl_.get_service().clear(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Cancel all operations associated with the signal set.
+  /**
+   * This function forces the completion of any pending asynchronous wait
+   * operations against the signal set. The handler for each cancelled
+   * operation will be invoked with the asio::error::operation_aborted
+   * error code.
+   *
+   * Cancellation does not alter the set of registered signals.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note If a registered signal occurred before cancel() is called, then the
+   * handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  void cancel()
+  {
+    asio::error_code ec;
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "cancel");
+  }
+
+  /// Cancel all operations associated with the signal set.
+  /**
+   * This function forces the completion of any pending asynchronous wait
+   * operations against the signal set. The handler for each cancelled
+   * operation will be invoked with the asio::error::operation_aborted
+   * error code.
+   *
+   * Cancellation does not alter the set of registered signals.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note If a registered signal occurred before cancel() is called, then the
+   * handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  ASIO_SYNC_OP_VOID cancel(asio::error_code& ec)
+  {
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Start an asynchronous operation to wait for a signal to be delivered.
+  /**
+   * This function may be used to initiate an asynchronous wait against the
+   * signal set. It always returns immediately.
+   *
+   * For each call to async_wait(), the supplied handler will be called exactly
+   * once. The handler will be called when:
+   *
+   * @li One of the registered signals in the signal set occurs; or
+   *
+   * @li The signal set was cancelled, in which case the handler is passed the
+   * error code asio::error::operation_aborted.
+   *
+   * @param handler The handler to be called when the signal occurs. Copies
+   * will be made of the handler as required. The function signature of the
+   * handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   int signal_number // Indicates which signal occurred.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   */
+  template <
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code, int))
+      SignalHandler ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(SignalHandler,
+      void (asio::error_code, int))
+  async_wait(
+      ASIO_MOVE_ARG(SignalHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<SignalHandler, void (asio::error_code, int)>(
+        initiate_async_wait(this), handler);
+  }
+
+private:
+  // Disallow copying and assignment.
+  basic_signal_set(const basic_signal_set&) ASIO_DELETED;
+  basic_signal_set& operator=(const basic_signal_set&) ASIO_DELETED;
+
+  class initiate_async_wait
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_wait(basic_signal_set* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename SignalHandler>
+    void operator()(ASIO_MOVE_ARG(SignalHandler) handler) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a SignalHandler.
+      ASIO_SIGNAL_HANDLER_CHECK(SignalHandler, handler) type_check;
+
+      detail::non_const_lvalue<SignalHandler> handler2(handler);
+      self_->impl_.get_service().async_wait(
+          self_->impl_.get_implementation(), handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_signal_set* self_;
+  };
+
+  detail::io_object_impl<detail::signal_set_service, Executor> impl_;
+};
+
+} // namespace asio
+
+#endif // ASIO_BASIC_SIGNAL_SET_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket.hpp
new file mode 100644
index 00000000000..665ba29fbff
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket.hpp
@@ -0,0 +1,1894 @@
+//
+// basic_socket.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_SOCKET_HPP
+#define ASIO_BASIC_SOCKET_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/async_result.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/io_object_impl.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/executor.hpp"
+#include "asio/post.hpp"
+#include "asio/socket_base.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+# include "asio/detail/null_socket_service.hpp"
+#elif defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_socket_service.hpp"
+#else
+# include "asio/detail/reactive_socket_service.hpp"
+#endif
+
+#if defined(ASIO_HAS_MOVE)
+# include <utility>
+#endif // defined(ASIO_HAS_MOVE)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if !defined(ASIO_BASIC_SOCKET_FWD_DECL)
+#define ASIO_BASIC_SOCKET_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Protocol, typename Executor = executor>
+class basic_socket;
+
+#endif // !defined(ASIO_BASIC_SOCKET_FWD_DECL)
+
+/// Provides socket functionality.
+/**
+ * The basic_socket class template provides functionality that is common to both
+ * stream-oriented and datagram-oriented sockets.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename Protocol, typename Executor>
+class basic_socket
+  : public socket_base
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the socket type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The socket type when rebound to the specified executor.
+    typedef basic_socket<Protocol, Executor1> other;
+  };
+
+  /// The native representation of a socket.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#elif defined(ASIO_WINDOWS_RUNTIME)
+  typedef typename detail::null_socket_service<
+    Protocol>::native_handle_type native_handle_type;
+#elif defined(ASIO_HAS_IOCP)
+  typedef typename detail::win_iocp_socket_service<
+    Protocol>::native_handle_type native_handle_type;
+#else
+  typedef typename detail::reactive_socket_service<
+    Protocol>::native_handle_type native_handle_type;
+#endif
+
+  /// The protocol type.
+  typedef Protocol protocol_type;
+
+  /// The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+#if !defined(ASIO_NO_EXTENSIONS)
+  /// A basic_socket is always the lowest layer.
+  typedef basic_socket<Protocol, Executor> lowest_layer_type;
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+  /// Construct a basic_socket without opening it.
+  /**
+   * This constructor creates a socket without opening it.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   */
+  explicit basic_socket(const executor_type& ex)
+    : impl_(ex)
+  {
+  }
+
+  /// Construct a basic_socket without opening it.
+  /**
+   * This constructor creates a socket without opening it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   */
+  template <typename ExecutionContext>
+  explicit basic_socket(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+  }
+
+  /// Construct and open a basic_socket.
+  /**
+   * This constructor creates and opens a socket.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_socket(const executor_type& ex, const protocol_type& protocol)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    asio::detail::throw_error(ec, "open");
+  }
+
+  /// Construct and open a basic_socket.
+  /**
+   * This constructor creates and opens a socket.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_socket(ExecutionContext& context, const protocol_type& protocol,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    asio::detail::throw_error(ec, "open");
+  }
+
+  /// Construct a basic_socket, opening it and binding it to the given local
+  /// endpoint.
+  /**
+   * This constructor creates a socket and automatically opens it bound to the
+   * specified endpoint on the local machine. The protocol used is the protocol
+   * associated with the given endpoint.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param endpoint An endpoint on the local machine to which the socket will
+   * be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_socket(const executor_type& ex, const endpoint_type& endpoint)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    const protocol_type protocol = endpoint.protocol();
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    asio::detail::throw_error(ec, "open");
+    impl_.get_service().bind(impl_.get_implementation(), endpoint, ec);
+    asio::detail::throw_error(ec, "bind");
+  }
+
+  /// Construct a basic_socket, opening it and binding it to the given local
+  /// endpoint.
+  /**
+   * This constructor creates a socket and automatically opens it bound to the
+   * specified endpoint on the local machine. The protocol used is the protocol
+   * associated with the given endpoint.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param endpoint An endpoint on the local machine to which the socket will
+   * be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_socket(ExecutionContext& context, const endpoint_type& endpoint,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    const protocol_type protocol = endpoint.protocol();
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    asio::detail::throw_error(ec, "open");
+    impl_.get_service().bind(impl_.get_implementation(), endpoint, ec);
+    asio::detail::throw_error(ec, "bind");
+  }
+
+  /// Construct a basic_socket on an existing native socket.
+  /**
+   * This constructor creates a socket object to hold an existing native socket.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_socket A native socket.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_socket(const executor_type& ex, const protocol_type& protocol,
+      const native_handle_type& native_socket)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        protocol, native_socket, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Construct a basic_socket on an existing native socket.
+  /**
+   * This constructor creates a socket object to hold an existing native socket.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_socket A native socket.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_socket(ExecutionContext& context, const protocol_type& protocol,
+      const native_handle_type& native_socket,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        protocol, native_socket, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_socket from another.
+  /**
+   * This constructor moves a socket from one object to another.
+   *
+   * @param other The other basic_socket object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_socket(const executor_type&) constructor.
+   */
+  basic_socket(basic_socket&& other) ASIO_NOEXCEPT
+    : impl_(std::move(other.impl_))
+  {
+  }
+
+  /// Move-assign a basic_socket from another.
+  /**
+   * This assignment operator moves a socket from one object to another.
+   *
+   * @param other The other basic_socket object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_socket(const executor_type&) constructor.
+   */
+  basic_socket& operator=(basic_socket&& other)
+  {
+    impl_ = std::move(other.impl_);
+    return *this;
+  }
+
+  // All sockets have access to each other's implementations.
+  template <typename Protocol1, typename Executor1>
+  friend class basic_socket;
+
+  /// Move-construct a basic_socket from a socket of another protocol type.
+  /**
+   * This constructor moves a socket from one object to another.
+   *
+   * @param other The other basic_socket object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_socket(const executor_type&) constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  basic_socket(basic_socket<Protocol1, Executor1>&& other,
+      typename enable_if<
+        is_convertible<Protocol1, Protocol>::value
+          && is_convertible<Executor1, Executor>::value
+      >::type* = 0)
+    : impl_(std::move(other.impl_))
+  {
+  }
+
+  /// Move-assign a basic_socket from a socket of another protocol type.
+  /**
+   * This assignment operator moves a socket from one object to another.
+   *
+   * @param other The other basic_socket object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_socket(const executor_type&) constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  typename enable_if<
+    is_convertible<Protocol1, Protocol>::value
+      && is_convertible<Executor1, Executor>::value,
+    basic_socket&
+  >::type operator=(basic_socket<Protocol1, Executor1> && other)
+  {
+    basic_socket tmp(std::move(other));
+    impl_ = std::move(tmp.impl_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return impl_.get_executor();
+  }
+
+#if !defined(ASIO_NO_EXTENSIONS)
+  /// Get a reference to the lowest layer.
+  /**
+   * This function returns a reference to the lowest layer in a stack of
+   * layers. Since a basic_socket cannot contain any further layers, it simply
+   * returns a reference to itself.
+   *
+   * @return A reference to the lowest layer in the stack of layers. Ownership
+   * is not transferred to the caller.
+   */
+  lowest_layer_type& lowest_layer()
+  {
+    return *this;
+  }
+
+  /// Get a const reference to the lowest layer.
+  /**
+   * This function returns a const reference to the lowest layer in a stack of
+   * layers. Since a basic_socket cannot contain any further layers, it simply
+   * returns a reference to itself.
+   *
+   * @return A const reference to the lowest layer in the stack of layers.
+   * Ownership is not transferred to the caller.
+   */
+  const lowest_layer_type& lowest_layer() const
+  {
+    return *this;
+  }
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+  /// Open the socket using the specified protocol.
+  /**
+   * This function opens the socket so that it will use the specified protocol.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * socket.open(asio::ip::tcp::v4());
+   * @endcode
+   */
+  void open(const protocol_type& protocol = protocol_type())
+  {
+    asio::error_code ec;
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    asio::detail::throw_error(ec, "open");
+  }
+
+  /// Open the socket using the specified protocol.
+  /**
+   * This function opens the socket so that it will use the specified protocol.
+   *
+   * @param protocol An object specifying which protocol is to be used.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * asio::error_code ec;
+   * socket.open(asio::ip::tcp::v4(), ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  ASIO_SYNC_OP_VOID open(const protocol_type& protocol,
+      asio::error_code& ec)
+  {
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Assign an existing native socket to the socket.
+  /*
+   * This function opens the socket to hold an existing native socket.
+   *
+   * @param protocol An object specifying which protocol is to be used.
+   *
+   * @param native_socket A native socket.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void assign(const protocol_type& protocol,
+      const native_handle_type& native_socket)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        protocol, native_socket, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Assign an existing native socket to the socket.
+  /*
+   * This function opens the socket to hold an existing native socket.
+   *
+   * @param protocol An object specifying which protocol is to be used.
+   *
+   * @param native_socket A native socket.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID assign(const protocol_type& protocol,
+      const native_handle_type& native_socket, asio::error_code& ec)
+  {
+    impl_.get_service().assign(impl_.get_implementation(),
+        protocol, native_socket, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Determine whether the socket is open.
+  bool is_open() const
+  {
+    return impl_.get_service().is_open(impl_.get_implementation());
+  }
+
+  /// Close the socket.
+  /**
+   * This function is used to close the socket. Any asynchronous send, receive
+   * or connect operations will be cancelled immediately, and will complete
+   * with the asio::error::operation_aborted error.
+   *
+   * @throws asio::system_error Thrown on failure. Note that, even if
+   * the function indicates an error, the underlying descriptor is closed.
+   *
+   * @note For portable behaviour with respect to graceful closure of a
+   * connected socket, call shutdown() before closing the socket.
+   */
+  void close()
+  {
+    asio::error_code ec;
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "close");
+  }
+
+  /// Close the socket.
+  /**
+   * This function is used to close the socket. Any asynchronous send, receive
+   * or connect operations will be cancelled immediately, and will complete
+   * with the asio::error::operation_aborted error.
+   *
+   * @param ec Set to indicate what error occurred, if any. Note that, even if
+   * the function indicates an error, the underlying descriptor is closed.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::error_code ec;
+   * socket.close(ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   *
+   * @note For portable behaviour with respect to graceful closure of a
+   * connected socket, call shutdown() before closing the socket.
+   */
+  ASIO_SYNC_OP_VOID close(asio::error_code& ec)
+  {
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Release ownership of the underlying native socket.
+  /**
+   * This function causes all outstanding asynchronous connect, send and receive
+   * operations to finish immediately, and the handlers for cancelled operations
+   * will be passed the asio::error::operation_aborted error. Ownership
+   * of the native socket is then transferred to the caller.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note This function is unsupported on Windows versions prior to Windows
+   * 8.1, and will fail with asio::error::operation_not_supported on
+   * these platforms.
+   */
+#if defined(ASIO_MSVC) && (ASIO_MSVC >= 1400) \
+  && (!defined(_WIN32_WINNT) || _WIN32_WINNT < 0x0603)
+  __declspec(deprecated("This function always fails with "
+        "operation_not_supported when used on Windows versions "
+        "prior to Windows 8.1."))
+#endif
+  native_handle_type release()
+  {
+    asio::error_code ec;
+    native_handle_type s = impl_.get_service().release(
+        impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "release");
+    return s;
+  }
+
+  /// Release ownership of the underlying native socket.
+  /**
+   * This function causes all outstanding asynchronous connect, send and receive
+   * operations to finish immediately, and the handlers for cancelled operations
+   * will be passed the asio::error::operation_aborted error. Ownership
+   * of the native socket is then transferred to the caller.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note This function is unsupported on Windows versions prior to Windows
+   * 8.1, and will fail with asio::error::operation_not_supported on
+   * these platforms.
+   */
+#if defined(ASIO_MSVC) && (ASIO_MSVC >= 1400) \
+  && (!defined(_WIN32_WINNT) || _WIN32_WINNT < 0x0603)
+  __declspec(deprecated("This function always fails with "
+        "operation_not_supported when used on Windows versions "
+        "prior to Windows 8.1."))
+#endif
+  native_handle_type release(asio::error_code& ec)
+  {
+    return impl_.get_service().release(impl_.get_implementation(), ec);
+  }
+
+  /// Get the native socket representation.
+  /**
+   * This function may be used to obtain the underlying representation of the
+   * socket. This is intended to allow access to native socket functionality
+   * that is not otherwise provided.
+   */
+  native_handle_type native_handle()
+  {
+    return impl_.get_service().native_handle(impl_.get_implementation());
+  }
+
+  /// Cancel all asynchronous operations associated with the socket.
+  /**
+   * This function causes all outstanding asynchronous connect, send and receive
+   * operations to finish immediately, and the handlers for cancelled operations
+   * will be passed the asio::error::operation_aborted error.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls to cancel() will always fail with
+   * asio::error::operation_not_supported when run on Windows XP, Windows
+   * Server 2003, and earlier versions of Windows, unless
+   * ASIO_ENABLE_CANCELIO is defined. However, the CancelIo function has
+   * two issues that should be considered before enabling its use:
+   *
+   * @li It will only cancel asynchronous operations that were initiated in the
+   * current thread.
+   *
+   * @li It can appear to complete without error, but the request to cancel the
+   * unfinished operations may be silently ignored by the operating system.
+   * Whether it works or not seems to depend on the drivers that are installed.
+   *
+   * For portable cancellation, consider using one of the following
+   * alternatives:
+   *
+   * @li Disable asio's I/O completion port backend by defining
+   * ASIO_DISABLE_IOCP.
+   *
+   * @li Use the close() function to simultaneously cancel the outstanding
+   * operations and close the socket.
+   *
+   * When running on Windows Vista, Windows Server 2008, and later, the
+   * CancelIoEx function is always used. This function does not have the
+   * problems described above.
+   */
+#if defined(ASIO_MSVC) && (ASIO_MSVC >= 1400) \
+  && (!defined(_WIN32_WINNT) || _WIN32_WINNT < 0x0600) \
+  && !defined(ASIO_ENABLE_CANCELIO)
+  __declspec(deprecated("By default, this function always fails with "
+        "operation_not_supported when used on Windows XP, Windows Server 2003, "
+        "or earlier. Consult documentation for details."))
+#endif
+  void cancel()
+  {
+    asio::error_code ec;
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "cancel");
+  }
+
+  /// Cancel all asynchronous operations associated with the socket.
+  /**
+   * This function causes all outstanding asynchronous connect, send and receive
+   * operations to finish immediately, and the handlers for cancelled operations
+   * will be passed the asio::error::operation_aborted error.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls to cancel() will always fail with
+   * asio::error::operation_not_supported when run on Windows XP, Windows
+   * Server 2003, and earlier versions of Windows, unless
+   * ASIO_ENABLE_CANCELIO is defined. However, the CancelIo function has
+   * two issues that should be considered before enabling its use:
+   *
+   * @li It will only cancel asynchronous operations that were initiated in the
+   * current thread.
+   *
+   * @li It can appear to complete without error, but the request to cancel the
+   * unfinished operations may be silently ignored by the operating system.
+   * Whether it works or not seems to depend on the drivers that are installed.
+   *
+   * For portable cancellation, consider using one of the following
+   * alternatives:
+   *
+   * @li Disable asio's I/O completion port backend by defining
+   * ASIO_DISABLE_IOCP.
+   *
+   * @li Use the close() function to simultaneously cancel the outstanding
+   * operations and close the socket.
+   *
+   * When running on Windows Vista, Windows Server 2008, and later, the
+   * CancelIoEx function is always used. This function does not have the
+   * problems described above.
+   */
+#if defined(ASIO_MSVC) && (ASIO_MSVC >= 1400) \
+  && (!defined(_WIN32_WINNT) || _WIN32_WINNT < 0x0600) \
+  && !defined(ASIO_ENABLE_CANCELIO)
+  __declspec(deprecated("By default, this function always fails with "
+        "operation_not_supported when used on Windows XP, Windows Server 2003, "
+        "or earlier. Consult documentation for details."))
+#endif
+  ASIO_SYNC_OP_VOID cancel(asio::error_code& ec)
+  {
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Determine whether the socket is at the out-of-band data mark.
+  /**
+   * This function is used to check whether the socket input is currently
+   * positioned at the out-of-band data mark.
+   *
+   * @return A bool indicating whether the socket is at the out-of-band data
+   * mark.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  bool at_mark() const
+  {
+    asio::error_code ec;
+    bool b = impl_.get_service().at_mark(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "at_mark");
+    return b;
+  }
+
+  /// Determine whether the socket is at the out-of-band data mark.
+  /**
+   * This function is used to check whether the socket input is currently
+   * positioned at the out-of-band data mark.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return A bool indicating whether the socket is at the out-of-band data
+   * mark.
+   */
+  bool at_mark(asio::error_code& ec) const
+  {
+    return impl_.get_service().at_mark(impl_.get_implementation(), ec);
+  }
+
+  /// Determine the number of bytes available for reading.
+  /**
+   * This function is used to determine the number of bytes that may be read
+   * without blocking.
+   *
+   * @return The number of bytes that may be read without blocking, or 0 if an
+   * error occurs.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  std::size_t available() const
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().available(
+        impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "available");
+    return s;
+  }
+
+  /// Determine the number of bytes available for reading.
+  /**
+   * This function is used to determine the number of bytes that may be read
+   * without blocking.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of bytes that may be read without blocking, or 0 if an
+   * error occurs.
+   */
+  std::size_t available(asio::error_code& ec) const
+  {
+    return impl_.get_service().available(impl_.get_implementation(), ec);
+  }
+
+  /// Bind the socket to the given local endpoint.
+  /**
+   * This function binds the socket to the specified endpoint on the local
+   * machine.
+   *
+   * @param endpoint An endpoint on the local machine to which the socket will
+   * be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * socket.open(asio::ip::tcp::v4());
+   * socket.bind(asio::ip::tcp::endpoint(
+   *       asio::ip::tcp::v4(), 12345));
+   * @endcode
+   */
+  void bind(const endpoint_type& endpoint)
+  {
+    asio::error_code ec;
+    impl_.get_service().bind(impl_.get_implementation(), endpoint, ec);
+    asio::detail::throw_error(ec, "bind");
+  }
+
+  /// Bind the socket to the given local endpoint.
+  /**
+   * This function binds the socket to the specified endpoint on the local
+   * machine.
+   *
+   * @param endpoint An endpoint on the local machine to which the socket will
+   * be bound.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * socket.open(asio::ip::tcp::v4());
+   * asio::error_code ec;
+   * socket.bind(asio::ip::tcp::endpoint(
+   *       asio::ip::tcp::v4(), 12345), ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  ASIO_SYNC_OP_VOID bind(const endpoint_type& endpoint,
+      asio::error_code& ec)
+  {
+    impl_.get_service().bind(impl_.get_implementation(), endpoint, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Connect the socket to the specified endpoint.
+  /**
+   * This function is used to connect a socket to the specified remote endpoint.
+   * The function call will block until the connection is successfully made or
+   * an error occurs.
+   *
+   * The socket is automatically opened if it is not already open. If the
+   * connect fails, and the socket was automatically opened, the socket is
+   * not returned to the closed state.
+   *
+   * @param peer_endpoint The remote endpoint to which the socket will be
+   * connected.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * asio::ip::tcp::endpoint endpoint(
+   *     asio::ip::address::from_string("1.2.3.4"), 12345);
+   * socket.connect(endpoint);
+   * @endcode
+   */
+  void connect(const endpoint_type& peer_endpoint)
+  {
+    asio::error_code ec;
+    if (!is_open())
+    {
+      impl_.get_service().open(impl_.get_implementation(),
+          peer_endpoint.protocol(), ec);
+      asio::detail::throw_error(ec, "connect");
+    }
+    impl_.get_service().connect(impl_.get_implementation(), peer_endpoint, ec);
+    asio::detail::throw_error(ec, "connect");
+  }
+
+  /// Connect the socket to the specified endpoint.
+  /**
+   * This function is used to connect a socket to the specified remote endpoint.
+   * The function call will block until the connection is successfully made or
+   * an error occurs.
+   *
+   * The socket is automatically opened if it is not already open. If the
+   * connect fails, and the socket was automatically opened, the socket is
+   * not returned to the closed state.
+   *
+   * @param peer_endpoint The remote endpoint to which the socket will be
+   * connected.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * asio::ip::tcp::endpoint endpoint(
+   *     asio::ip::address::from_string("1.2.3.4"), 12345);
+   * asio::error_code ec;
+   * socket.connect(endpoint, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  ASIO_SYNC_OP_VOID connect(const endpoint_type& peer_endpoint,
+      asio::error_code& ec)
+  {
+    if (!is_open())
+    {
+      impl_.get_service().open(impl_.get_implementation(),
+            peer_endpoint.protocol(), ec);
+      if (ec)
+      {
+        ASIO_SYNC_OP_VOID_RETURN(ec);
+      }
+    }
+
+    impl_.get_service().connect(impl_.get_implementation(), peer_endpoint, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Start an asynchronous connect.
+  /**
+   * This function is used to asynchronously connect a socket to the specified
+   * remote endpoint. The function call always returns immediately.
+   *
+   * The socket is automatically opened if it is not already open. If the
+   * connect fails, and the socket was automatically opened, the socket is
+   * not returned to the closed state.
+   *
+   * @param peer_endpoint The remote endpoint to which the socket will be
+   * connected. Copies will be made of the endpoint object as required.
+   *
+   * @param handler The handler to be called when the connection operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error // Result of operation
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * @code
+   * void connect_handler(const asio::error_code& error)
+   * {
+   *   if (!error)
+   *   {
+   *     // Connect succeeded.
+   *   }
+   * }
+   *
+   * ...
+   *
+   * asio::ip::tcp::socket socket(my_context);
+   * asio::ip::tcp::endpoint endpoint(
+   *     asio::ip::address::from_string("1.2.3.4"), 12345);
+   * socket.async_connect(endpoint, connect_handler);
+   * @endcode
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code))
+        ConnectHandler ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ConnectHandler,
+      void (asio::error_code))
+  async_connect(const endpoint_type& peer_endpoint,
+      ASIO_MOVE_ARG(ConnectHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    asio::error_code open_ec;
+    if (!is_open())
+    {
+      const protocol_type protocol = peer_endpoint.protocol();
+      impl_.get_service().open(impl_.get_implementation(), protocol, open_ec);
+    }
+
+    return async_initiate<ConnectHandler, void (asio::error_code)>(
+        initiate_async_connect(this), handler, peer_endpoint, open_ec);
+  }
+
+  /// Set an option on the socket.
+  /**
+   * This function is used to set an option on the socket.
+   *
+   * @param option The new option value to be set on the socket.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @sa SettableSocketOption @n
+   * asio::socket_base::broadcast @n
+   * asio::socket_base::do_not_route @n
+   * asio::socket_base::keep_alive @n
+   * asio::socket_base::linger @n
+   * asio::socket_base::receive_buffer_size @n
+   * asio::socket_base::receive_low_watermark @n
+   * asio::socket_base::reuse_address @n
+   * asio::socket_base::send_buffer_size @n
+   * asio::socket_base::send_low_watermark @n
+   * asio::ip::multicast::join_group @n
+   * asio::ip::multicast::leave_group @n
+   * asio::ip::multicast::enable_loopback @n
+   * asio::ip::multicast::outbound_interface @n
+   * asio::ip::multicast::hops @n
+   * asio::ip::tcp::no_delay
+   *
+   * @par Example
+   * Setting the IPPROTO_TCP/TCP_NODELAY option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::ip::tcp::no_delay option(true);
+   * socket.set_option(option);
+   * @endcode
+   */
+  template <typename SettableSocketOption>
+  void set_option(const SettableSocketOption& option)
+  {
+    asio::error_code ec;
+    impl_.get_service().set_option(impl_.get_implementation(), option, ec);
+    asio::detail::throw_error(ec, "set_option");
+  }
+
+  /// Set an option on the socket.
+  /**
+   * This function is used to set an option on the socket.
+   *
+   * @param option The new option value to be set on the socket.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @sa SettableSocketOption @n
+   * asio::socket_base::broadcast @n
+   * asio::socket_base::do_not_route @n
+   * asio::socket_base::keep_alive @n
+   * asio::socket_base::linger @n
+   * asio::socket_base::receive_buffer_size @n
+   * asio::socket_base::receive_low_watermark @n
+   * asio::socket_base::reuse_address @n
+   * asio::socket_base::send_buffer_size @n
+   * asio::socket_base::send_low_watermark @n
+   * asio::ip::multicast::join_group @n
+   * asio::ip::multicast::leave_group @n
+   * asio::ip::multicast::enable_loopback @n
+   * asio::ip::multicast::outbound_interface @n
+   * asio::ip::multicast::hops @n
+   * asio::ip::tcp::no_delay
+   *
+   * @par Example
+   * Setting the IPPROTO_TCP/TCP_NODELAY option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::ip::tcp::no_delay option(true);
+   * asio::error_code ec;
+   * socket.set_option(option, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  template <typename SettableSocketOption>
+  ASIO_SYNC_OP_VOID set_option(const SettableSocketOption& option,
+      asio::error_code& ec)
+  {
+    impl_.get_service().set_option(impl_.get_implementation(), option, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Get an option from the socket.
+  /**
+   * This function is used to get the current value of an option on the socket.
+   *
+   * @param option The option value to be obtained from the socket.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @sa GettableSocketOption @n
+   * asio::socket_base::broadcast @n
+   * asio::socket_base::do_not_route @n
+   * asio::socket_base::keep_alive @n
+   * asio::socket_base::linger @n
+   * asio::socket_base::receive_buffer_size @n
+   * asio::socket_base::receive_low_watermark @n
+   * asio::socket_base::reuse_address @n
+   * asio::socket_base::send_buffer_size @n
+   * asio::socket_base::send_low_watermark @n
+   * asio::ip::multicast::join_group @n
+   * asio::ip::multicast::leave_group @n
+   * asio::ip::multicast::enable_loopback @n
+   * asio::ip::multicast::outbound_interface @n
+   * asio::ip::multicast::hops @n
+   * asio::ip::tcp::no_delay
+   *
+   * @par Example
+   * Getting the value of the SOL_SOCKET/SO_KEEPALIVE option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::ip::tcp::socket::keep_alive option;
+   * socket.get_option(option);
+   * bool is_set = option.value();
+   * @endcode
+   */
+  template <typename GettableSocketOption>
+  void get_option(GettableSocketOption& option) const
+  {
+    asio::error_code ec;
+    impl_.get_service().get_option(impl_.get_implementation(), option, ec);
+    asio::detail::throw_error(ec, "get_option");
+  }
+
+  /// Get an option from the socket.
+  /**
+   * This function is used to get the current value of an option on the socket.
+   *
+   * @param option The option value to be obtained from the socket.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @sa GettableSocketOption @n
+   * asio::socket_base::broadcast @n
+   * asio::socket_base::do_not_route @n
+   * asio::socket_base::keep_alive @n
+   * asio::socket_base::linger @n
+   * asio::socket_base::receive_buffer_size @n
+   * asio::socket_base::receive_low_watermark @n
+   * asio::socket_base::reuse_address @n
+   * asio::socket_base::send_buffer_size @n
+   * asio::socket_base::send_low_watermark @n
+   * asio::ip::multicast::join_group @n
+   * asio::ip::multicast::leave_group @n
+   * asio::ip::multicast::enable_loopback @n
+   * asio::ip::multicast::outbound_interface @n
+   * asio::ip::multicast::hops @n
+   * asio::ip::tcp::no_delay
+   *
+   * @par Example
+   * Getting the value of the SOL_SOCKET/SO_KEEPALIVE option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::ip::tcp::socket::keep_alive option;
+   * asio::error_code ec;
+   * socket.get_option(option, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * bool is_set = option.value();
+   * @endcode
+   */
+  template <typename GettableSocketOption>
+  ASIO_SYNC_OP_VOID get_option(GettableSocketOption& option,
+      asio::error_code& ec) const
+  {
+    impl_.get_service().get_option(impl_.get_implementation(), option, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Perform an IO control command on the socket.
+  /**
+   * This function is used to execute an IO control command on the socket.
+   *
+   * @param command The IO control command to be performed on the socket.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @sa IoControlCommand @n
+   * asio::socket_base::bytes_readable @n
+   * asio::socket_base::non_blocking_io
+   *
+   * @par Example
+   * Getting the number of bytes ready to read:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::ip::tcp::socket::bytes_readable command;
+   * socket.io_control(command);
+   * std::size_t bytes_readable = command.get();
+   * @endcode
+   */
+  template <typename IoControlCommand>
+  void io_control(IoControlCommand& command)
+  {
+    asio::error_code ec;
+    impl_.get_service().io_control(impl_.get_implementation(), command, ec);
+    asio::detail::throw_error(ec, "io_control");
+  }
+
+  /// Perform an IO control command on the socket.
+  /**
+   * This function is used to execute an IO control command on the socket.
+   *
+   * @param command The IO control command to be performed on the socket.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @sa IoControlCommand @n
+   * asio::socket_base::bytes_readable @n
+   * asio::socket_base::non_blocking_io
+   *
+   * @par Example
+   * Getting the number of bytes ready to read:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::ip::tcp::socket::bytes_readable command;
+   * asio::error_code ec;
+   * socket.io_control(command, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * std::size_t bytes_readable = command.get();
+   * @endcode
+   */
+  template <typename IoControlCommand>
+  ASIO_SYNC_OP_VOID io_control(IoControlCommand& command,
+      asio::error_code& ec)
+  {
+    impl_.get_service().io_control(impl_.get_implementation(), command, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Gets the non-blocking mode of the socket.
+  /**
+   * @returns @c true if the socket's synchronous operations will fail with
+   * asio::error::would_block if they are unable to perform the requested
+   * operation immediately. If @c false, synchronous operations will block
+   * until complete.
+   *
+   * @note The non-blocking mode has no effect on the behaviour of asynchronous
+   * operations. Asynchronous operations will never fail with the error
+   * asio::error::would_block.
+   */
+  bool non_blocking() const
+  {
+    return impl_.get_service().non_blocking(impl_.get_implementation());
+  }
+
+  /// Sets the non-blocking mode of the socket.
+  /**
+   * @param mode If @c true, the socket's synchronous operations will fail with
+   * asio::error::would_block if they are unable to perform the requested
+   * operation immediately. If @c false, synchronous operations will block
+   * until complete.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The non-blocking mode has no effect on the behaviour of asynchronous
+   * operations. Asynchronous operations will never fail with the error
+   * asio::error::would_block.
+   */
+  void non_blocking(bool mode)
+  {
+    asio::error_code ec;
+    impl_.get_service().non_blocking(impl_.get_implementation(), mode, ec);
+    asio::detail::throw_error(ec, "non_blocking");
+  }
+
+  /// Sets the non-blocking mode of the socket.
+  /**
+   * @param mode If @c true, the socket's synchronous operations will fail with
+   * asio::error::would_block if they are unable to perform the requested
+   * operation immediately. If @c false, synchronous operations will block
+   * until complete.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note The non-blocking mode has no effect on the behaviour of asynchronous
+   * operations. Asynchronous operations will never fail with the error
+   * asio::error::would_block.
+   */
+  ASIO_SYNC_OP_VOID non_blocking(
+      bool mode, asio::error_code& ec)
+  {
+    impl_.get_service().non_blocking(impl_.get_implementation(), mode, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Gets the non-blocking mode of the native socket implementation.
+  /**
+   * This function is used to retrieve the non-blocking mode of the underlying
+   * native socket. This mode has no effect on the behaviour of the socket
+   * object's synchronous operations.
+   *
+   * @returns @c true if the underlying socket is in non-blocking mode and
+   * direct system calls may fail with asio::error::would_block (or the
+   * equivalent system error).
+   *
+   * @note The current non-blocking mode is cached by the socket object.
+   * Consequently, the return value may be incorrect if the non-blocking mode
+   * was set directly on the native socket.
+   *
+   * @par Example
+   * This function is intended to allow the encapsulation of arbitrary
+   * non-blocking system calls as asynchronous operations, in a way that is
+   * transparent to the user of the socket object. The following example
+   * illustrates how Linux's @c sendfile system call might be encapsulated:
+   * @code template <typename Handler>
+   * struct sendfile_op
+   * {
+   *   tcp::socket& sock_;
+   *   int fd_;
+   *   Handler handler_;
+   *   off_t offset_;
+   *   std::size_t total_bytes_transferred_;
+   *
+   *   // Function call operator meeting WriteHandler requirements.
+   *   // Used as the handler for the async_write_some operation.
+   *   void operator()(asio::error_code ec, std::size_t)
+   *   {
+   *     // Put the underlying socket into non-blocking mode.
+   *     if (!ec)
+   *       if (!sock_.native_non_blocking())
+   *         sock_.native_non_blocking(true, ec);
+   *
+   *     if (!ec)
+   *     {
+   *       for (;;)
+   *       {
+   *         // Try the system call.
+   *         errno = 0;
+   *         int n = ::sendfile(sock_.native_handle(), fd_, &offset_, 65536);
+   *         ec = asio::error_code(n < 0 ? errno : 0,
+   *             asio::error::get_system_category());
+   *         total_bytes_transferred_ += ec ? 0 : n;
+   *
+   *         // Retry operation immediately if interrupted by signal.
+   *         if (ec == asio::error::interrupted)
+   *           continue;
+   *
+   *         // Check if we need to run the operation again.
+   *         if (ec == asio::error::would_block
+   *             || ec == asio::error::try_again)
+   *         {
+   *           // We have to wait for the socket to become ready again.
+   *           sock_.async_wait(tcp::socket::wait_write, *this);
+   *           return;
+   *         }
+   *
+   *         if (ec || n == 0)
+   *         {
+   *           // An error occurred, or we have reached the end of the file.
+   *           // Either way we must exit the loop so we can call the handler.
+   *           break;
+   *         }
+   *
+   *         // Loop around to try calling sendfile again.
+   *       }
+   *     }
+   *
+   *     // Pass result back to user's handler.
+   *     handler_(ec, total_bytes_transferred_);
+   *   }
+   * };
+   *
+   * template <typename Handler>
+   * void async_sendfile(tcp::socket& sock, int fd, Handler h)
+   * {
+   *   sendfile_op<Handler> op = { sock, fd, h, 0, 0 };
+   *   sock.async_wait(tcp::socket::wait_write, op);
+   * } @endcode
+   */
+  bool native_non_blocking() const
+  {
+    return impl_.get_service().native_non_blocking(impl_.get_implementation());
+  }
+
+  /// Sets the non-blocking mode of the native socket implementation.
+  /**
+   * This function is used to modify the non-blocking mode of the underlying
+   * native socket. It has no effect on the behaviour of the socket object's
+   * synchronous operations.
+   *
+   * @param mode If @c true, the underlying socket is put into non-blocking
+   * mode and direct system calls may fail with asio::error::would_block
+   * (or the equivalent system error).
+   *
+   * @throws asio::system_error Thrown on failure. If the @c mode is
+   * @c false, but the current value of @c non_blocking() is @c true, this
+   * function fails with asio::error::invalid_argument, as the
+   * combination does not make sense.
+   *
+   * @par Example
+   * This function is intended to allow the encapsulation of arbitrary
+   * non-blocking system calls as asynchronous operations, in a way that is
+   * transparent to the user of the socket object. The following example
+   * illustrates how Linux's @c sendfile system call might be encapsulated:
+   * @code template <typename Handler>
+   * struct sendfile_op
+   * {
+   *   tcp::socket& sock_;
+   *   int fd_;
+   *   Handler handler_;
+   *   off_t offset_;
+   *   std::size_t total_bytes_transferred_;
+   *
+   *   // Function call operator meeting WriteHandler requirements.
+   *   // Used as the handler for the async_write_some operation.
+   *   void operator()(asio::error_code ec, std::size_t)
+   *   {
+   *     // Put the underlying socket into non-blocking mode.
+   *     if (!ec)
+   *       if (!sock_.native_non_blocking())
+   *         sock_.native_non_blocking(true, ec);
+   *
+   *     if (!ec)
+   *     {
+   *       for (;;)
+   *       {
+   *         // Try the system call.
+   *         errno = 0;
+   *         int n = ::sendfile(sock_.native_handle(), fd_, &offset_, 65536);
+   *         ec = asio::error_code(n < 0 ? errno : 0,
+   *             asio::error::get_system_category());
+   *         total_bytes_transferred_ += ec ? 0 : n;
+   *
+   *         // Retry operation immediately if interrupted by signal.
+   *         if (ec == asio::error::interrupted)
+   *           continue;
+   *
+   *         // Check if we need to run the operation again.
+   *         if (ec == asio::error::would_block
+   *             || ec == asio::error::try_again)
+   *         {
+   *           // We have to wait for the socket to become ready again.
+   *           sock_.async_wait(tcp::socket::wait_write, *this);
+   *           return;
+   *         }
+   *
+   *         if (ec || n == 0)
+   *         {
+   *           // An error occurred, or we have reached the end of the file.
+   *           // Either way we must exit the loop so we can call the handler.
+   *           break;
+   *         }
+   *
+   *         // Loop around to try calling sendfile again.
+   *       }
+   *     }
+   *
+   *     // Pass result back to user's handler.
+   *     handler_(ec, total_bytes_transferred_);
+   *   }
+   * };
+   *
+   * template <typename Handler>
+   * void async_sendfile(tcp::socket& sock, int fd, Handler h)
+   * {
+   *   sendfile_op<Handler> op = { sock, fd, h, 0, 0 };
+   *   sock.async_wait(tcp::socket::wait_write, op);
+   * } @endcode
+   */
+  void native_non_blocking(bool mode)
+  {
+    asio::error_code ec;
+    impl_.get_service().native_non_blocking(
+        impl_.get_implementation(), mode, ec);
+    asio::detail::throw_error(ec, "native_non_blocking");
+  }
+
+  /// Sets the non-blocking mode of the native socket implementation.
+  /**
+   * This function is used to modify the non-blocking mode of the underlying
+   * native socket. It has no effect on the behaviour of the socket object's
+   * synchronous operations.
+   *
+   * @param mode If @c true, the underlying socket is put into non-blocking
+   * mode and direct system calls may fail with asio::error::would_block
+   * (or the equivalent system error).
+   *
+   * @param ec Set to indicate what error occurred, if any. If the @c mode is
+   * @c false, but the current value of @c non_blocking() is @c true, this
+   * function fails with asio::error::invalid_argument, as the
+   * combination does not make sense.
+   *
+   * @par Example
+   * This function is intended to allow the encapsulation of arbitrary
+   * non-blocking system calls as asynchronous operations, in a way that is
+   * transparent to the user of the socket object. The following example
+   * illustrates how Linux's @c sendfile system call might be encapsulated:
+   * @code template <typename Handler>
+   * struct sendfile_op
+   * {
+   *   tcp::socket& sock_;
+   *   int fd_;
+   *   Handler handler_;
+   *   off_t offset_;
+   *   std::size_t total_bytes_transferred_;
+   *
+   *   // Function call operator meeting WriteHandler requirements.
+   *   // Used as the handler for the async_write_some operation.
+   *   void operator()(asio::error_code ec, std::size_t)
+   *   {
+   *     // Put the underlying socket into non-blocking mode.
+   *     if (!ec)
+   *       if (!sock_.native_non_blocking())
+   *         sock_.native_non_blocking(true, ec);
+   *
+   *     if (!ec)
+   *     {
+   *       for (;;)
+   *       {
+   *         // Try the system call.
+   *         errno = 0;
+   *         int n = ::sendfile(sock_.native_handle(), fd_, &offset_, 65536);
+   *         ec = asio::error_code(n < 0 ? errno : 0,
+   *             asio::error::get_system_category());
+   *         total_bytes_transferred_ += ec ? 0 : n;
+   *
+   *         // Retry operation immediately if interrupted by signal.
+   *         if (ec == asio::error::interrupted)
+   *           continue;
+   *
+   *         // Check if we need to run the operation again.
+   *         if (ec == asio::error::would_block
+   *             || ec == asio::error::try_again)
+   *         {
+   *           // We have to wait for the socket to become ready again.
+   *           sock_.async_wait(tcp::socket::wait_write, *this);
+   *           return;
+   *         }
+   *
+   *         if (ec || n == 0)
+   *         {
+   *           // An error occurred, or we have reached the end of the file.
+   *           // Either way we must exit the loop so we can call the handler.
+   *           break;
+   *         }
+   *
+   *         // Loop around to try calling sendfile again.
+   *       }
+   *     }
+   *
+   *     // Pass result back to user's handler.
+   *     handler_(ec, total_bytes_transferred_);
+   *   }
+   * };
+   *
+   * template <typename Handler>
+   * void async_sendfile(tcp::socket& sock, int fd, Handler h)
+   * {
+   *   sendfile_op<Handler> op = { sock, fd, h, 0, 0 };
+   *   sock.async_wait(tcp::socket::wait_write, op);
+   * } @endcode
+   */
+  ASIO_SYNC_OP_VOID native_non_blocking(
+      bool mode, asio::error_code& ec)
+  {
+    impl_.get_service().native_non_blocking(
+        impl_.get_implementation(), mode, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Get the local endpoint of the socket.
+  /**
+   * This function is used to obtain the locally bound endpoint of the socket.
+   *
+   * @returns An object that represents the local endpoint of the socket.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint = socket.local_endpoint();
+   * @endcode
+   */
+  endpoint_type local_endpoint() const
+  {
+    asio::error_code ec;
+    endpoint_type ep = impl_.get_service().local_endpoint(
+        impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "local_endpoint");
+    return ep;
+  }
+
+  /// Get the local endpoint of the socket.
+  /**
+   * This function is used to obtain the locally bound endpoint of the socket.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns An object that represents the local endpoint of the socket.
+   * Returns a default-constructed endpoint object if an error occurred.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::error_code ec;
+   * asio::ip::tcp::endpoint endpoint = socket.local_endpoint(ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  endpoint_type local_endpoint(asio::error_code& ec) const
+  {
+    return impl_.get_service().local_endpoint(impl_.get_implementation(), ec);
+  }
+
+  /// Get the remote endpoint of the socket.
+  /**
+   * This function is used to obtain the remote endpoint of the socket.
+   *
+   * @returns An object that represents the remote endpoint of the socket.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint = socket.remote_endpoint();
+   * @endcode
+   */
+  endpoint_type remote_endpoint() const
+  {
+    asio::error_code ec;
+    endpoint_type ep = impl_.get_service().remote_endpoint(
+        impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "remote_endpoint");
+    return ep;
+  }
+
+  /// Get the remote endpoint of the socket.
+  /**
+   * This function is used to obtain the remote endpoint of the socket.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns An object that represents the remote endpoint of the socket.
+   * Returns a default-constructed endpoint object if an error occurred.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::error_code ec;
+   * asio::ip::tcp::endpoint endpoint = socket.remote_endpoint(ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  endpoint_type remote_endpoint(asio::error_code& ec) const
+  {
+    return impl_.get_service().remote_endpoint(impl_.get_implementation(), ec);
+  }
+
+  /// Disable sends or receives on the socket.
+  /**
+   * This function is used to disable send operations, receive operations, or
+   * both.
+   *
+   * @param what Determines what types of operation will no longer be allowed.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * Shutting down the send side of the socket:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * socket.shutdown(asio::ip::tcp::socket::shutdown_send);
+   * @endcode
+   */
+  void shutdown(shutdown_type what)
+  {
+    asio::error_code ec;
+    impl_.get_service().shutdown(impl_.get_implementation(), what, ec);
+    asio::detail::throw_error(ec, "shutdown");
+  }
+
+  /// Disable sends or receives on the socket.
+  /**
+   * This function is used to disable send operations, receive operations, or
+   * both.
+   *
+   * @param what Determines what types of operation will no longer be allowed.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * Shutting down the send side of the socket:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::error_code ec;
+   * socket.shutdown(asio::ip::tcp::socket::shutdown_send, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  ASIO_SYNC_OP_VOID shutdown(shutdown_type what,
+      asio::error_code& ec)
+  {
+    impl_.get_service().shutdown(impl_.get_implementation(), what, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Wait for the socket to become ready to read, ready to write, or to have
+  /// pending error conditions.
+  /**
+   * This function is used to perform a blocking wait for a socket to enter
+   * a ready to read, write or error condition state.
+   *
+   * @param w Specifies the desired socket state.
+   *
+   * @par Example
+   * Waiting for a socket to become readable.
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * socket.wait(asio::ip::tcp::socket::wait_read);
+   * @endcode
+   */
+  void wait(wait_type w)
+  {
+    asio::error_code ec;
+    impl_.get_service().wait(impl_.get_implementation(), w, ec);
+    asio::detail::throw_error(ec, "wait");
+  }
+
+  /// Wait for the socket to become ready to read, ready to write, or to have
+  /// pending error conditions.
+  /**
+   * This function is used to perform a blocking wait for a socket to enter
+   * a ready to read, write or error condition state.
+   *
+   * @param w Specifies the desired socket state.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * Waiting for a socket to become readable.
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::error_code ec;
+   * socket.wait(asio::ip::tcp::socket::wait_read, ec);
+   * @endcode
+   */
+  ASIO_SYNC_OP_VOID wait(wait_type w, asio::error_code& ec)
+  {
+    impl_.get_service().wait(impl_.get_implementation(), w, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Asynchronously wait for the socket to become ready to read, ready to
+  /// write, or to have pending error conditions.
+  /**
+   * This function is used to perform an asynchronous wait for a socket to enter
+   * a ready to read, write or error condition state.
+   *
+   * @param w Specifies the desired socket state.
+   *
+   * @param handler The handler to be called when the wait operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error // Result of operation
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * @code
+   * void wait_handler(const asio::error_code& error)
+   * {
+   *   if (!error)
+   *   {
+   *     // Wait succeeded.
+   *   }
+   * }
+   *
+   * ...
+   *
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * socket.async_wait(asio::ip::tcp::socket::wait_read, wait_handler);
+   * @endcode
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code))
+        WaitHandler ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WaitHandler,
+      void (asio::error_code))
+  async_wait(wait_type w,
+      ASIO_MOVE_ARG(WaitHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WaitHandler, void (asio::error_code)>(
+        initiate_async_wait(this), handler, w);
+  }
+
+protected:
+  /// Protected destructor to prevent deletion through this type.
+  /**
+   * This function destroys the socket, cancelling any outstanding asynchronous
+   * operations associated with the socket as if by calling @c cancel.
+   */
+  ~basic_socket()
+  {
+  }
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+  detail::io_object_impl<
+    detail::null_socket_service<Protocol>, Executor> impl_;
+#elif defined(ASIO_HAS_IOCP)
+  detail::io_object_impl<
+    detail::win_iocp_socket_service<Protocol>, Executor> impl_;
+#else
+  detail::io_object_impl<
+    detail::reactive_socket_service<Protocol>, Executor> impl_;
+#endif
+
+private:
+  // Disallow copying and assignment.
+  basic_socket(const basic_socket&) ASIO_DELETED;
+  basic_socket& operator=(const basic_socket&) ASIO_DELETED;
+
+  class initiate_async_connect
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_connect(basic_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ConnectHandler>
+    void operator()(ASIO_MOVE_ARG(ConnectHandler) handler,
+        const endpoint_type& peer_endpoint,
+        const asio::error_code& open_ec) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ConnectHandler.
+      ASIO_CONNECT_HANDLER_CHECK(ConnectHandler, handler) type_check;
+
+      if (open_ec)
+      {
+          asio::post(self_->impl_.get_executor(),
+              asio::detail::bind_handler(
+                ASIO_MOVE_CAST(ConnectHandler)(handler), open_ec));
+      }
+      else
+      {
+        detail::non_const_lvalue<ConnectHandler> handler2(handler);
+        self_->impl_.get_service().async_connect(
+            self_->impl_.get_implementation(), peer_endpoint,
+            handler2.value, self_->impl_.get_implementation_executor());
+      }
+    }
+
+  private:
+    basic_socket* self_;
+  };
+
+  class initiate_async_wait
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_wait(basic_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WaitHandler>
+    void operator()(ASIO_MOVE_ARG(WaitHandler) handler, wait_type w) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WaitHandler.
+      ASIO_WAIT_HANDLER_CHECK(WaitHandler, handler) type_check;
+
+      detail::non_const_lvalue<WaitHandler> handler2(handler);
+      self_->impl_.get_service().async_wait(
+          self_->impl_.get_implementation(), w, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_socket* self_;
+  };
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BASIC_SOCKET_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket_acceptor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket_acceptor.hpp
new file mode 100644
index 00000000000..06af2619d0b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket_acceptor.hpp
@@ -0,0 +1,2495 @@
+//
+// basic_socket_acceptor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_SOCKET_ACCEPTOR_HPP
+#define ASIO_BASIC_SOCKET_ACCEPTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/basic_socket.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/io_object_impl.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/executor.hpp"
+#include "asio/socket_base.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+# include "asio/detail/null_socket_service.hpp"
+#elif defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_socket_service.hpp"
+#else
+# include "asio/detail/reactive_socket_service.hpp"
+#endif
+
+#if defined(ASIO_HAS_MOVE)
+# include <utility>
+#endif // defined(ASIO_HAS_MOVE)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if !defined(ASIO_BASIC_SOCKET_ACCEPTOR_FWD_DECL)
+#define ASIO_BASIC_SOCKET_ACCEPTOR_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Protocol, typename Executor = executor>
+class basic_socket_acceptor;
+
+#endif // !defined(ASIO_BASIC_SOCKET_ACCEPTOR_FWD_DECL)
+
+/// Provides the ability to accept new connections.
+/**
+ * The basic_socket_acceptor class template is used for accepting new socket
+ * connections.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Example
+ * Opening a socket acceptor with the SO_REUSEADDR option enabled:
+ * @code
+ * asio::ip::tcp::acceptor acceptor(my_context);
+ * asio::ip::tcp::endpoint endpoint(asio::ip::tcp::v4(), port);
+ * acceptor.open(endpoint.protocol());
+ * acceptor.set_option(asio::ip::tcp::acceptor::reuse_address(true));
+ * acceptor.bind(endpoint);
+ * acceptor.listen();
+ * @endcode
+ */
+template <typename Protocol, typename Executor>
+class basic_socket_acceptor
+  : public socket_base
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the acceptor type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The socket type when rebound to the specified executor.
+    typedef basic_socket_acceptor<Protocol, Executor1> other;
+  };
+
+  /// The native representation of an acceptor.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#elif defined(ASIO_WINDOWS_RUNTIME)
+  typedef typename detail::null_socket_service<
+    Protocol>::native_handle_type native_handle_type;
+#elif defined(ASIO_HAS_IOCP)
+  typedef typename detail::win_iocp_socket_service<
+    Protocol>::native_handle_type native_handle_type;
+#else
+  typedef typename detail::reactive_socket_service<
+    Protocol>::native_handle_type native_handle_type;
+#endif
+
+  /// The protocol type.
+  typedef Protocol protocol_type;
+
+  /// The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  /// Construct an acceptor without opening it.
+  /**
+   * This constructor creates an acceptor without opening it to listen for new
+   * connections. The open() function must be called before the acceptor can
+   * accept new socket connections.
+   *
+   * @param ex The I/O executor that the acceptor will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * acceptor.
+   */
+  explicit basic_socket_acceptor(const executor_type& ex)
+    : impl_(ex)
+  {
+  }
+
+  /// Construct an acceptor without opening it.
+  /**
+   * This constructor creates an acceptor without opening it to listen for new
+   * connections. The open() function must be called before the acceptor can
+   * accept new socket connections.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the acceptor will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the acceptor.
+   */
+  template <typename ExecutionContext>
+  explicit basic_socket_acceptor(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+  }
+
+  /// Construct an open acceptor.
+  /**
+   * This constructor creates an acceptor and automatically opens it.
+   *
+   * @param ex The I/O executor that the acceptor will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * acceptor.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_socket_acceptor(const executor_type& ex, const protocol_type& protocol)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    asio::detail::throw_error(ec, "open");
+  }
+
+  /// Construct an open acceptor.
+  /**
+   * This constructor creates an acceptor and automatically opens it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the acceptor will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the acceptor.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_socket_acceptor(ExecutionContext& context,
+      const protocol_type& protocol,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    asio::detail::throw_error(ec, "open");
+  }
+
+  /// Construct an acceptor opened on the given endpoint.
+  /**
+   * This constructor creates an acceptor and automatically opens it to listen
+   * for new connections on the specified endpoint.
+   *
+   * @param ex The I/O executor that the acceptor will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * acceptor.
+   *
+   * @param endpoint An endpoint on the local machine on which the acceptor
+   * will listen for new connections.
+   *
+   * @param reuse_addr Whether the constructor should set the socket option
+   * socket_base::reuse_address.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note This constructor is equivalent to the following code:
+   * @code
+   * basic_socket_acceptor<Protocol> acceptor(my_context);
+   * acceptor.open(endpoint.protocol());
+   * if (reuse_addr)
+   *   acceptor.set_option(socket_base::reuse_address(true));
+   * acceptor.bind(endpoint);
+   * acceptor.listen();
+   * @endcode
+   */
+  basic_socket_acceptor(const executor_type& ex,
+      const endpoint_type& endpoint, bool reuse_addr = true)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    const protocol_type protocol = endpoint.protocol();
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    asio::detail::throw_error(ec, "open");
+    if (reuse_addr)
+    {
+      impl_.get_service().set_option(impl_.get_implementation(),
+          socket_base::reuse_address(true), ec);
+      asio::detail::throw_error(ec, "set_option");
+    }
+    impl_.get_service().bind(impl_.get_implementation(), endpoint, ec);
+    asio::detail::throw_error(ec, "bind");
+    impl_.get_service().listen(impl_.get_implementation(),
+        socket_base::max_listen_connections, ec);
+    asio::detail::throw_error(ec, "listen");
+  }
+
+  /// Construct an acceptor opened on the given endpoint.
+  /**
+   * This constructor creates an acceptor and automatically opens it to listen
+   * for new connections on the specified endpoint.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the acceptor will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the acceptor.
+   *
+   * @param endpoint An endpoint on the local machine on which the acceptor
+   * will listen for new connections.
+   *
+   * @param reuse_addr Whether the constructor should set the socket option
+   * socket_base::reuse_address.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note This constructor is equivalent to the following code:
+   * @code
+   * basic_socket_acceptor<Protocol> acceptor(my_context);
+   * acceptor.open(endpoint.protocol());
+   * if (reuse_addr)
+   *   acceptor.set_option(socket_base::reuse_address(true));
+   * acceptor.bind(endpoint);
+   * acceptor.listen();
+   * @endcode
+   */
+  template <typename ExecutionContext>
+  basic_socket_acceptor(ExecutionContext& context,
+      const endpoint_type& endpoint, bool reuse_addr = true,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    const protocol_type protocol = endpoint.protocol();
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    asio::detail::throw_error(ec, "open");
+    if (reuse_addr)
+    {
+      impl_.get_service().set_option(impl_.get_implementation(),
+          socket_base::reuse_address(true), ec);
+      asio::detail::throw_error(ec, "set_option");
+    }
+    impl_.get_service().bind(impl_.get_implementation(), endpoint, ec);
+    asio::detail::throw_error(ec, "bind");
+    impl_.get_service().listen(impl_.get_implementation(),
+        socket_base::max_listen_connections, ec);
+    asio::detail::throw_error(ec, "listen");
+  }
+
+  /// Construct a basic_socket_acceptor on an existing native acceptor.
+  /**
+   * This constructor creates an acceptor object to hold an existing native
+   * acceptor.
+   *
+   * @param ex The I/O executor that the acceptor will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * acceptor.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_acceptor A native acceptor.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_socket_acceptor(const executor_type& ex,
+      const protocol_type& protocol, const native_handle_type& native_acceptor)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        protocol, native_acceptor, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Construct a basic_socket_acceptor on an existing native acceptor.
+  /**
+   * This constructor creates an acceptor object to hold an existing native
+   * acceptor.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the acceptor will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the acceptor.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_acceptor A native acceptor.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_socket_acceptor(ExecutionContext& context,
+      const protocol_type& protocol, const native_handle_type& native_acceptor,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        protocol, native_acceptor, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_socket_acceptor from another.
+  /**
+   * This constructor moves an acceptor from one object to another.
+   *
+   * @param other The other basic_socket_acceptor object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_socket_acceptor(const executor_type&)
+   * constructor.
+   */
+  basic_socket_acceptor(basic_socket_acceptor&& other)
+    : impl_(std::move(other.impl_))
+  {
+  }
+
+  /// Move-assign a basic_socket_acceptor from another.
+  /**
+   * This assignment operator moves an acceptor from one object to another.
+   *
+   * @param other The other basic_socket_acceptor object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_socket_acceptor(const executor_type&)
+   * constructor.
+   */
+  basic_socket_acceptor& operator=(basic_socket_acceptor&& other)
+  {
+    impl_ = std::move(other.impl_);
+    return *this;
+  }
+
+  // All socket acceptors have access to each other's implementations.
+  template <typename Protocol1, typename Executor1>
+  friend class basic_socket_acceptor;
+
+  /// Move-construct a basic_socket_acceptor from an acceptor of another
+  /// protocol type.
+  /**
+   * This constructor moves an acceptor from one object to another.
+   *
+   * @param other The other basic_socket_acceptor object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_socket_acceptor(const executor_type&)
+   * constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  basic_socket_acceptor(basic_socket_acceptor<Protocol1, Executor1>&& other,
+      typename enable_if<
+        is_convertible<Protocol1, Protocol>::value
+          && is_convertible<Executor1, Executor>::value
+      >::type* = 0)
+    : impl_(std::move(other.impl_))
+  {
+  }
+
+  /// Move-assign a basic_socket_acceptor from an acceptor of another protocol
+  /// type.
+  /**
+   * This assignment operator moves an acceptor from one object to another.
+   *
+   * @param other The other basic_socket_acceptor object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_socket_acceptor(const executor_type&)
+   * constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  typename enable_if<
+    is_convertible<Protocol1, Protocol>::value
+      && is_convertible<Executor1, Executor>::value,
+    basic_socket_acceptor&
+  >::type operator=(basic_socket_acceptor<Protocol1, Executor1>&& other)
+  {
+    basic_socket_acceptor tmp(std::move(other));
+    impl_ = std::move(tmp.impl_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destroys the acceptor.
+  /**
+   * This function destroys the acceptor, cancelling any outstanding
+   * asynchronous operations associated with the acceptor as if by calling
+   * @c cancel.
+   */
+  ~basic_socket_acceptor()
+  {
+  }
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return impl_.get_executor();
+  }
+
+  /// Open the acceptor using the specified protocol.
+  /**
+   * This function opens the socket acceptor so that it will use the specified
+   * protocol.
+   *
+   * @param protocol An object specifying which protocol is to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * acceptor.open(asio::ip::tcp::v4());
+   * @endcode
+   */
+  void open(const protocol_type& protocol = protocol_type())
+  {
+    asio::error_code ec;
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    asio::detail::throw_error(ec, "open");
+  }
+
+  /// Open the acceptor using the specified protocol.
+  /**
+   * This function opens the socket acceptor so that it will use the specified
+   * protocol.
+   *
+   * @param protocol An object specifying which protocol is to be used.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * asio::error_code ec;
+   * acceptor.open(asio::ip::tcp::v4(), ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  ASIO_SYNC_OP_VOID open(const protocol_type& protocol,
+      asio::error_code& ec)
+  {
+    impl_.get_service().open(impl_.get_implementation(), protocol, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Assigns an existing native acceptor to the acceptor.
+  /*
+   * This function opens the acceptor to hold an existing native acceptor.
+   *
+   * @param protocol An object specifying which protocol is to be used.
+   *
+   * @param native_acceptor A native acceptor.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void assign(const protocol_type& protocol,
+      const native_handle_type& native_acceptor)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        protocol, native_acceptor, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Assigns an existing native acceptor to the acceptor.
+  /*
+   * This function opens the acceptor to hold an existing native acceptor.
+   *
+   * @param protocol An object specifying which protocol is to be used.
+   *
+   * @param native_acceptor A native acceptor.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID assign(const protocol_type& protocol,
+      const native_handle_type& native_acceptor, asio::error_code& ec)
+  {
+    impl_.get_service().assign(impl_.get_implementation(),
+        protocol, native_acceptor, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Determine whether the acceptor is open.
+  bool is_open() const
+  {
+    return impl_.get_service().is_open(impl_.get_implementation());
+  }
+
+  /// Bind the acceptor to the given local endpoint.
+  /**
+   * This function binds the socket acceptor to the specified endpoint on the
+   * local machine.
+   *
+   * @param endpoint An endpoint on the local machine to which the socket
+   * acceptor will be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * asio::ip::tcp::endpoint endpoint(asio::ip::tcp::v4(), 12345);
+   * acceptor.open(endpoint.protocol());
+   * acceptor.bind(endpoint);
+   * @endcode
+   */
+  void bind(const endpoint_type& endpoint)
+  {
+    asio::error_code ec;
+    impl_.get_service().bind(impl_.get_implementation(), endpoint, ec);
+    asio::detail::throw_error(ec, "bind");
+  }
+
+  /// Bind the acceptor to the given local endpoint.
+  /**
+   * This function binds the socket acceptor to the specified endpoint on the
+   * local machine.
+   *
+   * @param endpoint An endpoint on the local machine to which the socket
+   * acceptor will be bound.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * asio::ip::tcp::endpoint endpoint(asio::ip::tcp::v4(), 12345);
+   * acceptor.open(endpoint.protocol());
+   * asio::error_code ec;
+   * acceptor.bind(endpoint, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  ASIO_SYNC_OP_VOID bind(const endpoint_type& endpoint,
+      asio::error_code& ec)
+  {
+    impl_.get_service().bind(impl_.get_implementation(), endpoint, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Place the acceptor into the state where it will listen for new
+  /// connections.
+  /**
+   * This function puts the socket acceptor into the state where it may accept
+   * new connections.
+   *
+   * @param backlog The maximum length of the queue of pending connections.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void listen(int backlog = socket_base::max_listen_connections)
+  {
+    asio::error_code ec;
+    impl_.get_service().listen(impl_.get_implementation(), backlog, ec);
+    asio::detail::throw_error(ec, "listen");
+  }
+
+  /// Place the acceptor into the state where it will listen for new
+  /// connections.
+  /**
+   * This function puts the socket acceptor into the state where it may accept
+   * new connections.
+   *
+   * @param backlog The maximum length of the queue of pending connections.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::error_code ec;
+   * acceptor.listen(asio::socket_base::max_listen_connections, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  ASIO_SYNC_OP_VOID listen(int backlog, asio::error_code& ec)
+  {
+    impl_.get_service().listen(impl_.get_implementation(), backlog, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Close the acceptor.
+  /**
+   * This function is used to close the acceptor. Any asynchronous accept
+   * operations will be cancelled immediately.
+   *
+   * A subsequent call to open() is required before the acceptor can again be
+   * used to again perform socket accept operations.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void close()
+  {
+    asio::error_code ec;
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "close");
+  }
+
+  /// Close the acceptor.
+  /**
+   * This function is used to close the acceptor. Any asynchronous accept
+   * operations will be cancelled immediately.
+   *
+   * A subsequent call to open() is required before the acceptor can again be
+   * used to again perform socket accept operations.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::error_code ec;
+   * acceptor.close(ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  ASIO_SYNC_OP_VOID close(asio::error_code& ec)
+  {
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Release ownership of the underlying native acceptor.
+  /**
+   * This function causes all outstanding asynchronous accept operations to
+   * finish immediately, and the handlers for cancelled operations will be
+   * passed the asio::error::operation_aborted error. Ownership of the
+   * native acceptor is then transferred to the caller.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note This function is unsupported on Windows versions prior to Windows
+   * 8.1, and will fail with asio::error::operation_not_supported on
+   * these platforms.
+   */
+#if defined(ASIO_MSVC) && (ASIO_MSVC >= 1400) \
+  && (!defined(_WIN32_WINNT) || _WIN32_WINNT < 0x0603)
+  __declspec(deprecated("This function always fails with "
+        "operation_not_supported when used on Windows versions "
+        "prior to Windows 8.1."))
+#endif
+  native_handle_type release()
+  {
+    asio::error_code ec;
+    native_handle_type s = impl_.get_service().release(
+        impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "release");
+    return s;
+  }
+
+  /// Release ownership of the underlying native acceptor.
+  /**
+   * This function causes all outstanding asynchronous accept operations to
+   * finish immediately, and the handlers for cancelled operations will be
+   * passed the asio::error::operation_aborted error. Ownership of the
+   * native acceptor is then transferred to the caller.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note This function is unsupported on Windows versions prior to Windows
+   * 8.1, and will fail with asio::error::operation_not_supported on
+   * these platforms.
+   */
+#if defined(ASIO_MSVC) && (ASIO_MSVC >= 1400) \
+  && (!defined(_WIN32_WINNT) || _WIN32_WINNT < 0x0603)
+  __declspec(deprecated("This function always fails with "
+        "operation_not_supported when used on Windows versions "
+        "prior to Windows 8.1."))
+#endif
+  native_handle_type release(asio::error_code& ec)
+  {
+    return impl_.get_service().release(impl_.get_implementation(), ec);
+  }
+
+  /// Get the native acceptor representation.
+  /**
+   * This function may be used to obtain the underlying representation of the
+   * acceptor. This is intended to allow access to native acceptor functionality
+   * that is not otherwise provided.
+   */
+  native_handle_type native_handle()
+  {
+    return impl_.get_service().native_handle(impl_.get_implementation());
+  }
+
+  /// Cancel all asynchronous operations associated with the acceptor.
+  /**
+   * This function causes all outstanding asynchronous connect, send and receive
+   * operations to finish immediately, and the handlers for cancelled operations
+   * will be passed the asio::error::operation_aborted error.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void cancel()
+  {
+    asio::error_code ec;
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "cancel");
+  }
+
+  /// Cancel all asynchronous operations associated with the acceptor.
+  /**
+   * This function causes all outstanding asynchronous connect, send and receive
+   * operations to finish immediately, and the handlers for cancelled operations
+   * will be passed the asio::error::operation_aborted error.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID cancel(asio::error_code& ec)
+  {
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Set an option on the acceptor.
+  /**
+   * This function is used to set an option on the acceptor.
+   *
+   * @param option The new option value to be set on the acceptor.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @sa SettableSocketOption @n
+   * asio::socket_base::reuse_address
+   * asio::socket_base::enable_connection_aborted
+   *
+   * @par Example
+   * Setting the SOL_SOCKET/SO_REUSEADDR option:
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::acceptor::reuse_address option(true);
+   * acceptor.set_option(option);
+   * @endcode
+   */
+  template <typename SettableSocketOption>
+  void set_option(const SettableSocketOption& option)
+  {
+    asio::error_code ec;
+    impl_.get_service().set_option(impl_.get_implementation(), option, ec);
+    asio::detail::throw_error(ec, "set_option");
+  }
+
+  /// Set an option on the acceptor.
+  /**
+   * This function is used to set an option on the acceptor.
+   *
+   * @param option The new option value to be set on the acceptor.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @sa SettableSocketOption @n
+   * asio::socket_base::reuse_address
+   * asio::socket_base::enable_connection_aborted
+   *
+   * @par Example
+   * Setting the SOL_SOCKET/SO_REUSEADDR option:
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::acceptor::reuse_address option(true);
+   * asio::error_code ec;
+   * acceptor.set_option(option, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  template <typename SettableSocketOption>
+  ASIO_SYNC_OP_VOID set_option(const SettableSocketOption& option,
+      asio::error_code& ec)
+  {
+    impl_.get_service().set_option(impl_.get_implementation(), option, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Get an option from the acceptor.
+  /**
+   * This function is used to get the current value of an option on the
+   * acceptor.
+   *
+   * @param option The option value to be obtained from the acceptor.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @sa GettableSocketOption @n
+   * asio::socket_base::reuse_address
+   *
+   * @par Example
+   * Getting the value of the SOL_SOCKET/SO_REUSEADDR option:
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::acceptor::reuse_address option;
+   * acceptor.get_option(option);
+   * bool is_set = option.get();
+   * @endcode
+   */
+  template <typename GettableSocketOption>
+  void get_option(GettableSocketOption& option) const
+  {
+    asio::error_code ec;
+    impl_.get_service().get_option(impl_.get_implementation(), option, ec);
+    asio::detail::throw_error(ec, "get_option");
+  }
+
+  /// Get an option from the acceptor.
+  /**
+   * This function is used to get the current value of an option on the
+   * acceptor.
+   *
+   * @param option The option value to be obtained from the acceptor.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @sa GettableSocketOption @n
+   * asio::socket_base::reuse_address
+   *
+   * @par Example
+   * Getting the value of the SOL_SOCKET/SO_REUSEADDR option:
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::acceptor::reuse_address option;
+   * asio::error_code ec;
+   * acceptor.get_option(option, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * bool is_set = option.get();
+   * @endcode
+   */
+  template <typename GettableSocketOption>
+  ASIO_SYNC_OP_VOID get_option(GettableSocketOption& option,
+      asio::error_code& ec) const
+  {
+    impl_.get_service().get_option(impl_.get_implementation(), option, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Perform an IO control command on the acceptor.
+  /**
+   * This function is used to execute an IO control command on the acceptor.
+   *
+   * @param command The IO control command to be performed on the acceptor.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @sa IoControlCommand @n
+   * asio::socket_base::non_blocking_io
+   *
+   * @par Example
+   * Getting the number of bytes ready to read:
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::acceptor::non_blocking_io command(true);
+   * socket.io_control(command);
+   * @endcode
+   */
+  template <typename IoControlCommand>
+  void io_control(IoControlCommand& command)
+  {
+    asio::error_code ec;
+    impl_.get_service().io_control(impl_.get_implementation(), command, ec);
+    asio::detail::throw_error(ec, "io_control");
+  }
+
+  /// Perform an IO control command on the acceptor.
+  /**
+   * This function is used to execute an IO control command on the acceptor.
+   *
+   * @param command The IO control command to be performed on the acceptor.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @sa IoControlCommand @n
+   * asio::socket_base::non_blocking_io
+   *
+   * @par Example
+   * Getting the number of bytes ready to read:
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::acceptor::non_blocking_io command(true);
+   * asio::error_code ec;
+   * socket.io_control(command, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  template <typename IoControlCommand>
+  ASIO_SYNC_OP_VOID io_control(IoControlCommand& command,
+      asio::error_code& ec)
+  {
+    impl_.get_service().io_control(impl_.get_implementation(), command, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Gets the non-blocking mode of the acceptor.
+  /**
+   * @returns @c true if the acceptor's synchronous operations will fail with
+   * asio::error::would_block if they are unable to perform the requested
+   * operation immediately. If @c false, synchronous operations will block
+   * until complete.
+   *
+   * @note The non-blocking mode has no effect on the behaviour of asynchronous
+   * operations. Asynchronous operations will never fail with the error
+   * asio::error::would_block.
+   */
+  bool non_blocking() const
+  {
+    return impl_.get_service().non_blocking(impl_.get_implementation());
+  }
+
+  /// Sets the non-blocking mode of the acceptor.
+  /**
+   * @param mode If @c true, the acceptor's synchronous operations will fail
+   * with asio::error::would_block if they are unable to perform the
+   * requested operation immediately. If @c false, synchronous operations will
+   * block until complete.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The non-blocking mode has no effect on the behaviour of asynchronous
+   * operations. Asynchronous operations will never fail with the error
+   * asio::error::would_block.
+   */
+  void non_blocking(bool mode)
+  {
+    asio::error_code ec;
+    impl_.get_service().non_blocking(impl_.get_implementation(), mode, ec);
+    asio::detail::throw_error(ec, "non_blocking");
+  }
+
+  /// Sets the non-blocking mode of the acceptor.
+  /**
+   * @param mode If @c true, the acceptor's synchronous operations will fail
+   * with asio::error::would_block if they are unable to perform the
+   * requested operation immediately. If @c false, synchronous operations will
+   * block until complete.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note The non-blocking mode has no effect on the behaviour of asynchronous
+   * operations. Asynchronous operations will never fail with the error
+   * asio::error::would_block.
+   */
+  ASIO_SYNC_OP_VOID non_blocking(
+      bool mode, asio::error_code& ec)
+  {
+    impl_.get_service().non_blocking(impl_.get_implementation(), mode, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Gets the non-blocking mode of the native acceptor implementation.
+  /**
+   * This function is used to retrieve the non-blocking mode of the underlying
+   * native acceptor. This mode has no effect on the behaviour of the acceptor
+   * object's synchronous operations.
+   *
+   * @returns @c true if the underlying acceptor is in non-blocking mode and
+   * direct system calls may fail with asio::error::would_block (or the
+   * equivalent system error).
+   *
+   * @note The current non-blocking mode is cached by the acceptor object.
+   * Consequently, the return value may be incorrect if the non-blocking mode
+   * was set directly on the native acceptor.
+   */
+  bool native_non_blocking() const
+  {
+    return impl_.get_service().native_non_blocking(impl_.get_implementation());
+  }
+
+  /// Sets the non-blocking mode of the native acceptor implementation.
+  /**
+   * This function is used to modify the non-blocking mode of the underlying
+   * native acceptor. It has no effect on the behaviour of the acceptor object's
+   * synchronous operations.
+   *
+   * @param mode If @c true, the underlying acceptor is put into non-blocking
+   * mode and direct system calls may fail with asio::error::would_block
+   * (or the equivalent system error).
+   *
+   * @throws asio::system_error Thrown on failure. If the @c mode is
+   * @c false, but the current value of @c non_blocking() is @c true, this
+   * function fails with asio::error::invalid_argument, as the
+   * combination does not make sense.
+   */
+  void native_non_blocking(bool mode)
+  {
+    asio::error_code ec;
+    impl_.get_service().native_non_blocking(
+        impl_.get_implementation(), mode, ec);
+    asio::detail::throw_error(ec, "native_non_blocking");
+  }
+
+  /// Sets the non-blocking mode of the native acceptor implementation.
+  /**
+   * This function is used to modify the non-blocking mode of the underlying
+   * native acceptor. It has no effect on the behaviour of the acceptor object's
+   * synchronous operations.
+   *
+   * @param mode If @c true, the underlying acceptor is put into non-blocking
+   * mode and direct system calls may fail with asio::error::would_block
+   * (or the equivalent system error).
+   *
+   * @param ec Set to indicate what error occurred, if any. If the @c mode is
+   * @c false, but the current value of @c non_blocking() is @c true, this
+   * function fails with asio::error::invalid_argument, as the
+   * combination does not make sense.
+   */
+  ASIO_SYNC_OP_VOID native_non_blocking(
+      bool mode, asio::error_code& ec)
+  {
+    impl_.get_service().native_non_blocking(
+        impl_.get_implementation(), mode, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Get the local endpoint of the acceptor.
+  /**
+   * This function is used to obtain the locally bound endpoint of the acceptor.
+   *
+   * @returns An object that represents the local endpoint of the acceptor.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint = acceptor.local_endpoint();
+   * @endcode
+   */
+  endpoint_type local_endpoint() const
+  {
+    asio::error_code ec;
+    endpoint_type ep = impl_.get_service().local_endpoint(
+        impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "local_endpoint");
+    return ep;
+  }
+
+  /// Get the local endpoint of the acceptor.
+  /**
+   * This function is used to obtain the locally bound endpoint of the acceptor.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns An object that represents the local endpoint of the acceptor.
+   * Returns a default-constructed endpoint object if an error occurred and the
+   * error handler did not throw an exception.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::error_code ec;
+   * asio::ip::tcp::endpoint endpoint = acceptor.local_endpoint(ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  endpoint_type local_endpoint(asio::error_code& ec) const
+  {
+    return impl_.get_service().local_endpoint(impl_.get_implementation(), ec);
+  }
+
+  /// Wait for the acceptor to become ready to read, ready to write, or to have
+  /// pending error conditions.
+  /**
+   * This function is used to perform a blocking wait for an acceptor to enter
+   * a ready to read, write or error condition state.
+   *
+   * @param w Specifies the desired acceptor state.
+   *
+   * @par Example
+   * Waiting for an acceptor to become readable.
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * acceptor.wait(asio::ip::tcp::acceptor::wait_read);
+   * @endcode
+   */
+  void wait(wait_type w)
+  {
+    asio::error_code ec;
+    impl_.get_service().wait(impl_.get_implementation(), w, ec);
+    asio::detail::throw_error(ec, "wait");
+  }
+
+  /// Wait for the acceptor to become ready to read, ready to write, or to have
+  /// pending error conditions.
+  /**
+   * This function is used to perform a blocking wait for an acceptor to enter
+   * a ready to read, write or error condition state.
+   *
+   * @param w Specifies the desired acceptor state.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * Waiting for an acceptor to become readable.
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::error_code ec;
+   * acceptor.wait(asio::ip::tcp::acceptor::wait_read, ec);
+   * @endcode
+   */
+  ASIO_SYNC_OP_VOID wait(wait_type w, asio::error_code& ec)
+  {
+    impl_.get_service().wait(impl_.get_implementation(), w, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Asynchronously wait for the acceptor to become ready to read, ready to
+  /// write, or to have pending error conditions.
+  /**
+   * This function is used to perform an asynchronous wait for an acceptor to
+   * enter a ready to read, write or error condition state.
+   *
+   * @param w Specifies the desired acceptor state.
+   *
+   * @param handler The handler to be called when the wait operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error // Result of operation
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * @code
+   * void wait_handler(const asio::error_code& error)
+   * {
+   *   if (!error)
+   *   {
+   *     // Wait succeeded.
+   *   }
+   * }
+   *
+   * ...
+   *
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * acceptor.async_wait(
+   *     asio::ip::tcp::acceptor::wait_read,
+   *     wait_handler);
+   * @endcode
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code))
+        WaitHandler ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WaitHandler,
+      void (asio::error_code))
+  async_wait(wait_type w,
+      ASIO_MOVE_ARG(WaitHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WaitHandler, void (asio::error_code)>(
+        initiate_async_wait(this), handler, w);
+  }
+
+#if !defined(ASIO_NO_EXTENSIONS)
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer into the
+   * given socket. The function call will block until a new connection has been
+   * accepted successfully or an error occurs.
+   *
+   * @param peer The socket into which the new connection will be accepted.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::socket socket(my_context);
+   * acceptor.accept(socket);
+   * @endcode
+   */
+  template <typename Protocol1, typename Executor1>
+  void accept(basic_socket<Protocol1, Executor1>& peer,
+      typename enable_if<
+        is_convertible<Protocol, Protocol1>::value
+      >::type* = 0)
+  {
+    asio::error_code ec;
+    impl_.get_service().accept(impl_.get_implementation(),
+        peer, static_cast<endpoint_type*>(0), ec);
+    asio::detail::throw_error(ec, "accept");
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer into the
+   * given socket. The function call will block until a new connection has been
+   * accepted successfully or an error occurs.
+   *
+   * @param peer The socket into which the new connection will be accepted.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::socket socket(my_context);
+   * asio::error_code ec;
+   * acceptor.accept(socket, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  template <typename Protocol1, typename Executor1>
+  ASIO_SYNC_OP_VOID accept(
+      basic_socket<Protocol1, Executor1>& peer, asio::error_code& ec,
+      typename enable_if<
+        is_convertible<Protocol, Protocol1>::value
+      >::type* = 0)
+  {
+    impl_.get_service().accept(impl_.get_implementation(),
+        peer, static_cast<endpoint_type*>(0), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Start an asynchronous accept.
+  /**
+   * This function is used to asynchronously accept a new connection into a
+   * socket. The function call always returns immediately.
+   *
+   * @param peer The socket into which the new connection will be accepted.
+   * Ownership of the peer object is retained by the caller, which must
+   * guarantee that it is valid until the handler is called.
+   *
+   * @param handler The handler to be called when the accept operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error // Result of operation.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * @code
+   * void accept_handler(const asio::error_code& error)
+   * {
+   *   if (!error)
+   *   {
+   *     // Accept succeeded.
+   *   }
+   * }
+   *
+   * ...
+   *
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::socket socket(my_context);
+   * acceptor.async_accept(socket, accept_handler);
+   * @endcode
+   */
+  template <typename Protocol1, typename Executor1,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code))
+        AcceptHandler ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(AcceptHandler,
+      void (asio::error_code))
+  async_accept(basic_socket<Protocol1, Executor1>& peer,
+      ASIO_MOVE_ARG(AcceptHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type),
+      typename enable_if<
+        is_convertible<Protocol, Protocol1>::value
+      >::type* = 0)
+  {
+    return async_initiate<AcceptHandler, void (asio::error_code)>(
+        initiate_async_accept(this), handler,
+        &peer, static_cast<endpoint_type*>(0));
+  }
+
+  /// Accept a new connection and obtain the endpoint of the peer
+  /**
+   * This function is used to accept a new connection from a peer into the
+   * given socket, and additionally provide the endpoint of the remote peer.
+   * The function call will block until a new connection has been accepted
+   * successfully or an error occurs.
+   *
+   * @param peer The socket into which the new connection will be accepted.
+   *
+   * @param peer_endpoint An endpoint object which will receive the endpoint of
+   * the remote peer.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::socket socket(my_context);
+   * asio::ip::tcp::endpoint endpoint;
+   * acceptor.accept(socket, endpoint);
+   * @endcode
+   */
+  template <typename Executor1>
+  void accept(basic_socket<protocol_type, Executor1>& peer,
+      endpoint_type& peer_endpoint)
+  {
+    asio::error_code ec;
+    impl_.get_service().accept(impl_.get_implementation(),
+        peer, &peer_endpoint, ec);
+    asio::detail::throw_error(ec, "accept");
+  }
+
+  /// Accept a new connection and obtain the endpoint of the peer
+  /**
+   * This function is used to accept a new connection from a peer into the
+   * given socket, and additionally provide the endpoint of the remote peer.
+   * The function call will block until a new connection has been accepted
+   * successfully or an error occurs.
+   *
+   * @param peer The socket into which the new connection will be accepted.
+   *
+   * @param peer_endpoint An endpoint object which will receive the endpoint of
+   * the remote peer.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::socket socket(my_context);
+   * asio::ip::tcp::endpoint endpoint;
+   * asio::error_code ec;
+   * acceptor.accept(socket, endpoint, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  template <typename Executor1>
+  ASIO_SYNC_OP_VOID accept(basic_socket<protocol_type, Executor1>& peer,
+      endpoint_type& peer_endpoint, asio::error_code& ec)
+  {
+    impl_.get_service().accept(
+        impl_.get_implementation(), peer, &peer_endpoint, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Start an asynchronous accept.
+  /**
+   * This function is used to asynchronously accept a new connection into a
+   * socket, and additionally obtain the endpoint of the remote peer. The
+   * function call always returns immediately.
+   *
+   * @param peer The socket into which the new connection will be accepted.
+   * Ownership of the peer object is retained by the caller, which must
+   * guarantee that it is valid until the handler is called.
+   *
+   * @param peer_endpoint An endpoint object into which the endpoint of the
+   * remote peer will be written. Ownership of the peer_endpoint object is
+   * retained by the caller, which must guarantee that it is valid until the
+   * handler is called.
+   *
+   * @param handler The handler to be called when the accept operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error // Result of operation.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   */
+  template <typename Executor1,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code))
+        AcceptHandler ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(AcceptHandler,
+      void (asio::error_code))
+  async_accept(basic_socket<protocol_type, Executor1>& peer,
+      endpoint_type& peer_endpoint,
+      ASIO_MOVE_ARG(AcceptHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<AcceptHandler, void (asio::error_code)>(
+        initiate_async_accept(this), handler, &peer, &peer_endpoint);
+  }
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @returns A socket object representing the newly accepted connection.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::socket socket(acceptor.accept());
+   * @endcode
+   */
+  typename Protocol::socket::template rebind_executor<executor_type>::other
+  accept()
+  {
+    asio::error_code ec;
+    typename Protocol::socket::template rebind_executor<
+      executor_type>::other peer(impl_.get_executor());
+    impl_.get_service().accept(impl_.get_implementation(), peer, 0, ec);
+    asio::detail::throw_error(ec, "accept");
+    return peer;
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns On success, a socket object representing the newly accepted
+   * connection. On error, a socket object where is_open() is false.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::socket socket(acceptor.accept(ec));
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  typename Protocol::socket::template rebind_executor<executor_type>::other
+  accept(asio::error_code& ec)
+  {
+    typename Protocol::socket::template rebind_executor<
+      executor_type>::other peer(impl_.get_executor());
+    impl_.get_service().accept(impl_.get_implementation(), peer, 0, ec);
+    return peer;
+  }
+
+  /// Start an asynchronous accept.
+  /**
+   * This function is used to asynchronously accept a new connection. The
+   * function call always returns immediately.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param handler The handler to be called when the accept operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   // Result of operation.
+   *   const asio::error_code& error,
+   *   // On success, the newly accepted socket.
+   *   typename Protocol::socket::template
+   *     rebind_executor<executor_type>::other peer
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * @code
+   * void accept_handler(const asio::error_code& error,
+   *     asio::ip::tcp::socket peer)
+   * {
+   *   if (!error)
+   *   {
+   *     // Accept succeeded.
+   *   }
+   * }
+   *
+   * ...
+   *
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * acceptor.async_accept(accept_handler);
+   * @endcode
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        typename Protocol::socket::template rebind_executor<
+          executor_type>::other)) MoveAcceptHandler
+            ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(MoveAcceptHandler,
+      void (asio::error_code,
+        typename Protocol::socket::template
+          rebind_executor<executor_type>::other))
+  async_accept(
+      ASIO_MOVE_ARG(MoveAcceptHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<MoveAcceptHandler,
+      void (asio::error_code, typename Protocol::socket::template
+        rebind_executor<executor_type>::other)>(
+          initiate_async_move_accept(this), handler,
+          impl_.get_executor(), static_cast<endpoint_type*>(0),
+          static_cast<typename Protocol::socket::template
+            rebind_executor<executor_type>::other*>(0));
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param ex The I/O executor object to be used for the newly
+   * accepted socket.
+   *
+   * @returns A socket object representing the newly accepted connection.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::socket socket(acceptor.accept());
+   * @endcode
+   */
+  template <typename Executor1>
+  typename Protocol::socket::template rebind_executor<Executor1>::other
+  accept(const Executor1& ex,
+      typename enable_if<
+        is_executor<Executor1>::value
+      >::type* = 0)
+  {
+    asio::error_code ec;
+    typename Protocol::socket::template
+      rebind_executor<Executor1>::other peer(ex);
+    impl_.get_service().accept(impl_.get_implementation(), peer, 0, ec);
+    asio::detail::throw_error(ec, "accept");
+    return peer;
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param context The I/O execution context object to be used for the newly
+   * accepted socket.
+   *
+   * @returns A socket object representing the newly accepted connection.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::socket socket(acceptor.accept());
+   * @endcode
+   */
+  template <typename ExecutionContext>
+  typename Protocol::socket::template rebind_executor<
+      typename ExecutionContext::executor_type>::other
+  accept(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+  {
+    asio::error_code ec;
+    typename Protocol::socket::template rebind_executor<
+        typename ExecutionContext::executor_type>::other peer(context);
+    impl_.get_service().accept(impl_.get_implementation(), peer, 0, ec);
+    asio::detail::throw_error(ec, "accept");
+    return peer;
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param ex The I/O executor object to be used for the newly accepted
+   * socket.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns On success, a socket object representing the newly accepted
+   * connection. On error, a socket object where is_open() is false.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::socket socket(acceptor.accept(my_context2, ec));
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  template <typename Executor1>
+  typename Protocol::socket::template rebind_executor<Executor1>::other
+  accept(const Executor1& ex, asio::error_code& ec,
+      typename enable_if<
+        is_executor<Executor1>::value
+      >::type* = 0)
+  {
+    typename Protocol::socket::template
+      rebind_executor<Executor1>::other peer(ex);
+    impl_.get_service().accept(impl_.get_implementation(), peer, 0, ec);
+    return peer;
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param context The I/O execution context object to be used for the newly
+   * accepted socket.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns On success, a socket object representing the newly accepted
+   * connection. On error, a socket object where is_open() is false.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::socket socket(acceptor.accept(my_context2, ec));
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  template <typename ExecutionContext>
+  typename Protocol::socket::template rebind_executor<
+      typename ExecutionContext::executor_type>::other
+  accept(ExecutionContext& context, asio::error_code& ec,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+  {
+    typename Protocol::socket::template rebind_executor<
+        typename ExecutionContext::executor_type>::other peer(context);
+    impl_.get_service().accept(impl_.get_implementation(), peer, 0, ec);
+    return peer;
+  }
+
+  /// Start an asynchronous accept.
+  /**
+   * This function is used to asynchronously accept a new connection. The
+   * function call always returns immediately.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param ex The I/O executor object to be used for the newly accepted
+   * socket.
+   *
+   * @param handler The handler to be called when the accept operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   typename Protocol::socket::template rebind_executor<
+   *     Executor1>::other peer // On success, the newly accepted socket.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * @code
+   * void accept_handler(const asio::error_code& error,
+   *     asio::ip::tcp::socket peer)
+   * {
+   *   if (!error)
+   *   {
+   *     // Accept succeeded.
+   *   }
+   * }
+   *
+   * ...
+   *
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * acceptor.async_accept(my_context2, accept_handler);
+   * @endcode
+   */
+  template <typename Executor1,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        typename Protocol::socket::template rebind_executor<
+          Executor1>::other)) MoveAcceptHandler
+            ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(MoveAcceptHandler,
+      void (asio::error_code,
+        typename Protocol::socket::template rebind_executor<
+          Executor1>::other))
+  async_accept(const Executor1& ex,
+      ASIO_MOVE_ARG(MoveAcceptHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type),
+      typename enable_if<
+        is_executor<Executor1>::value
+      >::type* = 0)
+  {
+    typedef typename Protocol::socket::template rebind_executor<
+      Executor1>::other other_socket_type;
+
+    return async_initiate<MoveAcceptHandler,
+      void (asio::error_code, other_socket_type)>(
+        initiate_async_move_accept(this), handler,
+        ex, static_cast<endpoint_type*>(0),
+        static_cast<other_socket_type*>(0));
+  }
+
+  /// Start an asynchronous accept.
+  /**
+   * This function is used to asynchronously accept a new connection. The
+   * function call always returns immediately.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param context The I/O execution context object to be used for the newly
+   * accepted socket.
+   *
+   * @param handler The handler to be called when the accept operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   typename Protocol::socket::template rebind_executor<
+   *     typename ExecutionContext::executor_type>::other peer
+   *       // On success, the newly accepted socket.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * @code
+   * void accept_handler(const asio::error_code& error,
+   *     asio::ip::tcp::socket peer)
+   * {
+   *   if (!error)
+   *   {
+   *     // Accept succeeded.
+   *   }
+   * }
+   *
+   * ...
+   *
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * acceptor.async_accept(my_context2, accept_handler);
+   * @endcode
+   */
+  template <typename ExecutionContext,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        typename Protocol::socket::template rebind_executor<
+          typename ExecutionContext::executor_type>::other)) MoveAcceptHandler
+            ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(MoveAcceptHandler,
+      void (asio::error_code,
+        typename Protocol::socket::template rebind_executor<
+          typename ExecutionContext::executor_type>::other))
+  async_accept(ExecutionContext& context,
+      ASIO_MOVE_ARG(MoveAcceptHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type),
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+  {
+    typedef typename Protocol::socket::template rebind_executor<
+      typename ExecutionContext::executor_type>::other other_socket_type;
+
+    return async_initiate<MoveAcceptHandler,
+      void (asio::error_code, other_socket_type)>(
+        initiate_async_move_accept(this), handler,
+        context.get_executor(), static_cast<endpoint_type*>(0),
+        static_cast<other_socket_type*>(0));
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param peer_endpoint An endpoint object into which the endpoint of the
+   * remote peer will be written.
+   *
+   * @returns A socket object representing the newly accepted connection.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint;
+   * asio::ip::tcp::socket socket(acceptor.accept(endpoint));
+   * @endcode
+   */
+  typename Protocol::socket::template rebind_executor<executor_type>::other
+  accept(endpoint_type& peer_endpoint)
+  {
+    asio::error_code ec;
+    typename Protocol::socket::template rebind_executor<
+      executor_type>::other peer(impl_.get_executor());
+    impl_.get_service().accept(impl_.get_implementation(),
+        peer, &peer_endpoint, ec);
+    asio::detail::throw_error(ec, "accept");
+    return peer;
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param peer_endpoint An endpoint object into which the endpoint of the
+   * remote peer will be written.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns On success, a socket object representing the newly accepted
+   * connection. On error, a socket object where is_open() is false.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint;
+   * asio::ip::tcp::socket socket(acceptor.accept(endpoint, ec));
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  typename Protocol::socket::template rebind_executor<executor_type>::other
+  accept(endpoint_type& peer_endpoint, asio::error_code& ec)
+  {
+    typename Protocol::socket::template rebind_executor<
+      executor_type>::other peer(impl_.get_executor());
+    impl_.get_service().accept(impl_.get_implementation(),
+        peer, &peer_endpoint, ec);
+    return peer;
+  }
+
+  /// Start an asynchronous accept.
+  /**
+   * This function is used to asynchronously accept a new connection. The
+   * function call always returns immediately.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param peer_endpoint An endpoint object into which the endpoint of the
+   * remote peer will be written. Ownership of the peer_endpoint object is
+   * retained by the caller, which must guarantee that it is valid until the
+   * handler is called.
+   *
+   * @param handler The handler to be called when the accept operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   // Result of operation.
+   *   const asio::error_code& error,
+   *   // On success, the newly accepted socket.
+   *   typename Protocol::socket::template
+   *     rebind_executor<executor_type>::other peer
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * @code
+   * void accept_handler(const asio::error_code& error,
+   *     asio::ip::tcp::socket peer)
+   * {
+   *   if (!error)
+   *   {
+   *     // Accept succeeded.
+   *   }
+   * }
+   *
+   * ...
+   *
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint;
+   * acceptor.async_accept(endpoint, accept_handler);
+   * @endcode
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        typename Protocol::socket::template rebind_executor<
+          executor_type>::other)) MoveAcceptHandler
+            ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(MoveAcceptHandler,
+      void (asio::error_code,
+        typename Protocol::socket::template
+          rebind_executor<executor_type>::other))
+  async_accept(endpoint_type& peer_endpoint,
+      ASIO_MOVE_ARG(MoveAcceptHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<MoveAcceptHandler,
+      void (asio::error_code, typename Protocol::socket::template
+        rebind_executor<executor_type>::other)>(
+          initiate_async_move_accept(this), handler,
+          impl_.get_executor(), &peer_endpoint,
+          static_cast<typename Protocol::socket::template
+            rebind_executor<executor_type>::other*>(0));
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param ex The I/O executor object to be used for the newly accepted
+   * socket.
+   *
+   * @param peer_endpoint An endpoint object into which the endpoint of the
+   * remote peer will be written.
+   *
+   * @returns A socket object representing the newly accepted connection.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint;
+   * asio::ip::tcp::socket socket(
+   *     acceptor.accept(my_context2, endpoint));
+   * @endcode
+   */
+  template <typename Executor1>
+  typename Protocol::socket::template rebind_executor<Executor1>::other
+  accept(const Executor1& ex, endpoint_type& peer_endpoint,
+      typename enable_if<
+        is_executor<Executor1>::value
+      >::type* = 0)
+  {
+    asio::error_code ec;
+    typename Protocol::socket::template
+        rebind_executor<Executor1>::other peer(ex);
+    impl_.get_service().accept(impl_.get_implementation(),
+        peer, &peer_endpoint, ec);
+    asio::detail::throw_error(ec, "accept");
+    return peer;
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param context The I/O execution context object to be used for the newly
+   * accepted socket.
+   *
+   * @param peer_endpoint An endpoint object into which the endpoint of the
+   * remote peer will be written.
+   *
+   * @returns A socket object representing the newly accepted connection.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint;
+   * asio::ip::tcp::socket socket(
+   *     acceptor.accept(my_context2, endpoint));
+   * @endcode
+   */
+  template <typename ExecutionContext>
+  typename Protocol::socket::template rebind_executor<
+      typename ExecutionContext::executor_type>::other
+  accept(ExecutionContext& context, endpoint_type& peer_endpoint,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+  {
+    asio::error_code ec;
+    typename Protocol::socket::template rebind_executor<
+        typename ExecutionContext::executor_type>::other peer(context);
+    impl_.get_service().accept(impl_.get_implementation(),
+        peer, &peer_endpoint, ec);
+    asio::detail::throw_error(ec, "accept");
+    return peer;
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param ex The I/O executor object to be used for the newly accepted
+   * socket.
+   *
+   * @param peer_endpoint An endpoint object into which the endpoint of the
+   * remote peer will be written.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns On success, a socket object representing the newly accepted
+   * connection. On error, a socket object where is_open() is false.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint;
+   * asio::ip::tcp::socket socket(
+   *     acceptor.accept(my_context2, endpoint, ec));
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  template <typename Executor1>
+  typename Protocol::socket::template rebind_executor<Executor1>::other
+  accept(const executor_type& ex,
+      endpoint_type& peer_endpoint, asio::error_code& ec,
+      typename enable_if<
+        is_executor<Executor1>::value
+      >::type* = 0)
+  {
+    typename Protocol::socket::template
+      rebind_executor<Executor1>::other peer(ex);
+    impl_.get_service().accept(impl_.get_implementation(),
+        peer, &peer_endpoint, ec);
+    return peer;
+  }
+
+  /// Accept a new connection.
+  /**
+   * This function is used to accept a new connection from a peer. The function
+   * call will block until a new connection has been accepted successfully or
+   * an error occurs.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param context The I/O execution context object to be used for the newly
+   * accepted socket.
+   *
+   * @param peer_endpoint An endpoint object into which the endpoint of the
+   * remote peer will be written.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns On success, a socket object representing the newly accepted
+   * connection. On error, a socket object where is_open() is false.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint;
+   * asio::ip::tcp::socket socket(
+   *     acceptor.accept(my_context2, endpoint, ec));
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * @endcode
+   */
+  template <typename ExecutionContext>
+  typename Protocol::socket::template rebind_executor<
+      typename ExecutionContext::executor_type>::other
+  accept(ExecutionContext& context,
+      endpoint_type& peer_endpoint, asio::error_code& ec,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+  {
+    typename Protocol::socket::template rebind_executor<
+        typename ExecutionContext::executor_type>::other peer(context);
+    impl_.get_service().accept(impl_.get_implementation(),
+        peer, &peer_endpoint, ec);
+    return peer;
+  }
+
+  /// Start an asynchronous accept.
+  /**
+   * This function is used to asynchronously accept a new connection. The
+   * function call always returns immediately.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param ex The I/O executor object to be used for the newly accepted
+   * socket.
+   *
+   * @param peer_endpoint An endpoint object into which the endpoint of the
+   * remote peer will be written. Ownership of the peer_endpoint object is
+   * retained by the caller, which must guarantee that it is valid until the
+   * handler is called.
+   *
+   * @param handler The handler to be called when the accept operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   typename Protocol::socket::template rebind_executor<
+   *     Executor1>::other peer // On success, the newly accepted socket.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * @code
+   * void accept_handler(const asio::error_code& error,
+   *     asio::ip::tcp::socket peer)
+   * {
+   *   if (!error)
+   *   {
+   *     // Accept succeeded.
+   *   }
+   * }
+   *
+   * ...
+   *
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint;
+   * acceptor.async_accept(my_context2, endpoint, accept_handler);
+   * @endcode
+   */
+  template <typename Executor1,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        typename Protocol::socket::template rebind_executor<
+          Executor1>::other)) MoveAcceptHandler
+            ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(MoveAcceptHandler,
+      void (asio::error_code,
+        typename Protocol::socket::template rebind_executor<
+          Executor1>::other))
+  async_accept(const Executor1& ex, endpoint_type& peer_endpoint,
+      ASIO_MOVE_ARG(MoveAcceptHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type),
+      typename enable_if<
+        is_executor<Executor1>::value
+      >::type* = 0)
+  {
+    typedef typename Protocol::socket::template rebind_executor<
+      Executor1>::other other_socket_type;
+
+    return async_initiate<MoveAcceptHandler,
+      void (asio::error_code, other_socket_type)>(
+        initiate_async_move_accept(this), handler,
+        ex, &peer_endpoint,
+        static_cast<other_socket_type*>(0));
+  }
+
+  /// Start an asynchronous accept.
+  /**
+   * This function is used to asynchronously accept a new connection. The
+   * function call always returns immediately.
+   *
+   * This overload requires that the Protocol template parameter satisfy the
+   * AcceptableProtocol type requirements.
+   *
+   * @param context The I/O execution context object to be used for the newly
+   * accepted socket.
+   *
+   * @param peer_endpoint An endpoint object into which the endpoint of the
+   * remote peer will be written. Ownership of the peer_endpoint object is
+   * retained by the caller, which must guarantee that it is valid until the
+   * handler is called.
+   *
+   * @param handler The handler to be called when the accept operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   typename Protocol::socket::template rebind_executor<
+   *     typename ExecutionContext::executor_type>::other peer
+   *       // On success, the newly accepted socket.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * @code
+   * void accept_handler(const asio::error_code& error,
+   *     asio::ip::tcp::socket peer)
+   * {
+   *   if (!error)
+   *   {
+   *     // Accept succeeded.
+   *   }
+   * }
+   *
+   * ...
+   *
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::ip::tcp::endpoint endpoint;
+   * acceptor.async_accept(my_context2, endpoint, accept_handler);
+   * @endcode
+   */
+  template <typename ExecutionContext,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        typename Protocol::socket::template rebind_executor<
+          typename ExecutionContext::executor_type>::other)) MoveAcceptHandler
+            ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(MoveAcceptHandler,
+      void (asio::error_code,
+        typename Protocol::socket::template rebind_executor<
+          typename ExecutionContext::executor_type>::other))
+  async_accept(ExecutionContext& context,
+      endpoint_type& peer_endpoint,
+      ASIO_MOVE_ARG(MoveAcceptHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type),
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+  {
+    typedef typename Protocol::socket::template rebind_executor<
+      typename ExecutionContext::executor_type>::other other_socket_type;
+
+    return async_initiate<MoveAcceptHandler,
+      void (asio::error_code, other_socket_type)>(
+        initiate_async_move_accept(this), handler,
+        context.get_executor(), &peer_endpoint,
+        static_cast<other_socket_type*>(0));
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+private:
+  // Disallow copying and assignment.
+  basic_socket_acceptor(const basic_socket_acceptor&) ASIO_DELETED;
+  basic_socket_acceptor& operator=(
+      const basic_socket_acceptor&) ASIO_DELETED;
+
+  class initiate_async_wait
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_wait(basic_socket_acceptor* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WaitHandler>
+    void operator()(ASIO_MOVE_ARG(WaitHandler) handler, wait_type w) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WaitHandler.
+      ASIO_WAIT_HANDLER_CHECK(WaitHandler, handler) type_check;
+
+      detail::non_const_lvalue<WaitHandler> handler2(handler);
+      self_->impl_.get_service().async_wait(
+          self_->impl_.get_implementation(), w, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_socket_acceptor* self_;
+  };
+
+  class initiate_async_accept
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_accept(basic_socket_acceptor* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename AcceptHandler, typename Protocol1, typename Executor1>
+    void operator()(ASIO_MOVE_ARG(AcceptHandler) handler,
+        basic_socket<Protocol1, Executor1>* peer,
+        endpoint_type* peer_endpoint) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a AcceptHandler.
+      ASIO_ACCEPT_HANDLER_CHECK(AcceptHandler, handler) type_check;
+
+      detail::non_const_lvalue<AcceptHandler> handler2(handler);
+      self_->impl_.get_service().async_accept(
+          self_->impl_.get_implementation(), *peer, peer_endpoint,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_socket_acceptor* self_;
+  };
+
+  class initiate_async_move_accept
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_move_accept(basic_socket_acceptor* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename MoveAcceptHandler, typename Executor1, typename Socket>
+    void operator()(ASIO_MOVE_ARG(MoveAcceptHandler) handler,
+        const Executor1& peer_ex, endpoint_type* peer_endpoint, Socket*) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a MoveAcceptHandler.
+      ASIO_MOVE_ACCEPT_HANDLER_CHECK(
+          MoveAcceptHandler, handler, Socket) type_check;
+
+      detail::non_const_lvalue<MoveAcceptHandler> handler2(handler);
+      self_->impl_.get_service().async_move_accept(
+          self_->impl_.get_implementation(), peer_ex, peer_endpoint,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_socket_acceptor* self_;
+  };
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+  detail::io_object_impl<
+    detail::null_socket_service<Protocol>, Executor> impl_;
+#elif defined(ASIO_HAS_IOCP)
+  detail::io_object_impl<
+    detail::win_iocp_socket_service<Protocol>, Executor> impl_;
+#else
+  detail::io_object_impl<
+    detail::reactive_socket_service<Protocol>, Executor> impl_;
+#endif
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BASIC_SOCKET_ACCEPTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket_iostream.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket_iostream.hpp
new file mode 100644
index 00000000000..135f23d7ce5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket_iostream.hpp
@@ -0,0 +1,407 @@
+//
+// basic_socket_iostream.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_SOCKET_IOSTREAM_HPP
+#define ASIO_BASIC_SOCKET_IOSTREAM_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+#include <istream>
+#include <ostream>
+#include "asio/basic_socket_streambuf.hpp"
+
+#if !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+# include "asio/detail/variadic_templates.hpp"
+
+// A macro that should expand to:
+//   template <typename T1, ..., typename Tn>
+//   explicit basic_socket_iostream(T1 x1, ..., Tn xn)
+//     : std::basic_iostream<char>(
+//         &this->detail::socket_iostream_base<
+//           Protocol, Clock, WaitTraits>::streambuf_)
+//   {
+//     if (rdbuf()->connect(x1, ..., xn) == 0)
+//       this->setstate(std::ios_base::failbit);
+//   }
+// This macro should only persist within this file.
+
+# define ASIO_PRIVATE_CTR_DEF(n) \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  explicit basic_socket_iostream(ASIO_VARIADIC_BYVAL_PARAMS(n)) \
+    : std::basic_iostream<char>( \
+        &this->detail::socket_iostream_base< \
+          Protocol, Clock, WaitTraits>::streambuf_) \
+  { \
+    this->setf(std::ios_base::unitbuf); \
+    if (rdbuf()->connect(ASIO_VARIADIC_BYVAL_ARGS(n)) == 0) \
+      this->setstate(std::ios_base::failbit); \
+  } \
+  /**/
+
+// A macro that should expand to:
+//   template <typename T1, ..., typename Tn>
+//   void connect(T1 x1, ..., Tn xn)
+//   {
+//     if (rdbuf()->connect(x1, ..., xn) == 0)
+//       this->setstate(std::ios_base::failbit);
+//   }
+// This macro should only persist within this file.
+
+# define ASIO_PRIVATE_CONNECT_DEF(n) \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  void connect(ASIO_VARIADIC_BYVAL_PARAMS(n)) \
+  { \
+    if (rdbuf()->connect(ASIO_VARIADIC_BYVAL_ARGS(n)) == 0) \
+      this->setstate(std::ios_base::failbit); \
+  } \
+  /**/
+
+#endif // !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// A separate base class is used to ensure that the streambuf is initialised
+// prior to the basic_socket_iostream's basic_iostream base class.
+template <typename Protocol, typename Clock, typename WaitTraits>
+class socket_iostream_base
+{
+protected:
+  socket_iostream_base()
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  socket_iostream_base(socket_iostream_base&& other)
+    : streambuf_(std::move(other.streambuf_))
+  {
+  }
+
+  socket_iostream_base(basic_stream_socket<Protocol> s)
+    : streambuf_(std::move(s))
+  {
+  }
+
+  socket_iostream_base& operator=(socket_iostream_base&& other)
+  {
+    streambuf_ = std::move(other.streambuf_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  basic_socket_streambuf<Protocol, Clock, WaitTraits> streambuf_;
+};
+
+} // namespace detail
+
+#if !defined(ASIO_BASIC_SOCKET_IOSTREAM_FWD_DECL)
+#define ASIO_BASIC_SOCKET_IOSTREAM_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Protocol,
+#if defined(ASIO_HAS_BOOST_DATE_TIME) \
+  && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+    typename Clock = boost::posix_time::ptime,
+    typename WaitTraits = time_traits<Clock> >
+#else // defined(ASIO_HAS_BOOST_DATE_TIME)
+      // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+    typename Clock = chrono::steady_clock,
+    typename WaitTraits = wait_traits<Clock> >
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+       // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+class basic_socket_iostream;
+
+#endif // !defined(ASIO_BASIC_SOCKET_IOSTREAM_FWD_DECL)
+
+/// Iostream interface for a socket.
+#if defined(GENERATING_DOCUMENTATION)
+template <typename Protocol,
+    typename Clock = chrono::steady_clock,
+    typename WaitTraits = wait_traits<Clock> >
+#else // defined(GENERATING_DOCUMENTATION)
+template <typename Protocol, typename Clock, typename WaitTraits>
+#endif // defined(GENERATING_DOCUMENTATION)
+class basic_socket_iostream
+  : private detail::socket_iostream_base<Protocol, Clock, WaitTraits>,
+    public std::basic_iostream<char>
+{
+private:
+  // These typedefs are intended keep this class's implementation independent
+  // of whether it's using Boost.DateClock, Boost.Chrono or std::chrono.
+#if defined(ASIO_HAS_BOOST_DATE_TIME) \
+  && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+  typedef WaitTraits traits_helper;
+#else // defined(ASIO_HAS_BOOST_DATE_TIME)
+      // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+  typedef detail::chrono_time_traits<Clock, WaitTraits> traits_helper;
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+       // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+
+public:
+  /// The protocol type.
+  typedef Protocol protocol_type;
+
+  /// The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  /// The clock type.
+  typedef Clock clock_type;
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// (Deprecated: Use time_point.) The time type.
+  typedef typename WaitTraits::time_type time_type;
+
+  /// The time type.
+  typedef typename WaitTraits::time_point time_point;
+
+  /// (Deprecated: Use duration.) The duration type.
+  typedef typename WaitTraits::duration_type duration_type;
+
+  /// The duration type.
+  typedef typename WaitTraits::duration duration;
+#else
+# if !defined(ASIO_NO_DEPRECATED)
+  typedef typename traits_helper::time_type time_type;
+  typedef typename traits_helper::duration_type duration_type;
+# endif // !defined(ASIO_NO_DEPRECATED)
+  typedef typename traits_helper::time_type time_point;
+  typedef typename traits_helper::duration_type duration;
+#endif
+
+  /// Construct a basic_socket_iostream without establishing a connection.
+  basic_socket_iostream()
+    : std::basic_iostream<char>(
+        &this->detail::socket_iostream_base<
+          Protocol, Clock, WaitTraits>::streambuf_)
+  {
+    this->setf(std::ios_base::unitbuf);
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Construct a basic_socket_iostream from the supplied socket.
+  explicit basic_socket_iostream(basic_stream_socket<protocol_type> s)
+    : detail::socket_iostream_base<
+        Protocol, Clock, WaitTraits>(std::move(s)),
+      std::basic_iostream<char>(
+        &this->detail::socket_iostream_base<
+          Protocol, Clock, WaitTraits>::streambuf_)
+  {
+    this->setf(std::ios_base::unitbuf);
+  }
+
+#if defined(ASIO_HAS_STD_IOSTREAM_MOVE) \
+  || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_socket_iostream from another.
+  basic_socket_iostream(basic_socket_iostream&& other)
+    : detail::socket_iostream_base<
+        Protocol, Clock, WaitTraits>(std::move(other)),
+      std::basic_iostream<char>(std::move(other))
+  {
+    this->set_rdbuf(&this->detail::socket_iostream_base<
+          Protocol, Clock, WaitTraits>::streambuf_);
+  }
+
+  /// Move-assign a basic_socket_iostream from another.
+  basic_socket_iostream& operator=(basic_socket_iostream&& other)
+  {
+    std::basic_iostream<char>::operator=(std::move(other));
+    detail::socket_iostream_base<
+        Protocol, Clock, WaitTraits>::operator=(std::move(other));
+    return *this;
+  }
+#endif // defined(ASIO_HAS_STD_IOSTREAM_MOVE)
+       //   || defined(GENERATING_DOCUMENTATION)
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// Establish a connection to an endpoint corresponding to a resolver query.
+  /**
+   * This constructor automatically establishes a connection based on the
+   * supplied resolver query parameters. The arguments are used to construct
+   * a resolver query object.
+   */
+  template <typename T1, ..., typename TN>
+  explicit basic_socket_iostream(T1 t1, ..., TN tn);
+#elif defined(ASIO_HAS_VARIADIC_TEMPLATES)
+  template <typename... T>
+  explicit basic_socket_iostream(T... x)
+    : std::basic_iostream<char>(
+        &this->detail::socket_iostream_base<
+          Protocol, Clock, WaitTraits>::streambuf_)
+  {
+    this->setf(std::ios_base::unitbuf);
+    if (rdbuf()->connect(x...) == 0)
+      this->setstate(std::ios_base::failbit);
+  }
+#else
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_CTR_DEF)
+#endif
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// Establish a connection to an endpoint corresponding to a resolver query.
+  /**
+   * This function automatically establishes a connection based on the supplied
+   * resolver query parameters. The arguments are used to construct a resolver
+   * query object.
+   */
+  template <typename T1, ..., typename TN>
+  void connect(T1 t1, ..., TN tn);
+#elif defined(ASIO_HAS_VARIADIC_TEMPLATES)
+  template <typename... T>
+  void connect(T... x)
+  {
+    if (rdbuf()->connect(x...) == 0)
+      this->setstate(std::ios_base::failbit);
+  }
+#else
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_CONNECT_DEF)
+#endif
+
+  /// Close the connection.
+  void close()
+  {
+    if (rdbuf()->close() == 0)
+      this->setstate(std::ios_base::failbit);
+  }
+
+  /// Return a pointer to the underlying streambuf.
+  basic_socket_streambuf<Protocol, Clock, WaitTraits>* rdbuf() const
+  {
+    return const_cast<basic_socket_streambuf<Protocol, Clock, WaitTraits>*>(
+        &this->detail::socket_iostream_base<
+          Protocol, Clock, WaitTraits>::streambuf_);
+  }
+
+  /// Get a reference to the underlying socket.
+  basic_socket<Protocol>& socket()
+  {
+    return rdbuf()->socket();
+  }
+
+  /// Get the last error associated with the stream.
+  /**
+   * @return An \c error_code corresponding to the last error from the stream.
+   *
+   * @par Example
+   * To print the error associated with a failure to establish a connection:
+   * @code tcp::iostream s("www.boost.org", "http");
+   * if (!s)
+   * {
+   *   std::cout << "Error: " << s.error().message() << std::endl;
+   * } @endcode
+   */
+  const asio::error_code& error() const
+  {
+    return rdbuf()->error();
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use expiry().) Get the stream's expiry time as an absolute
+  /// time.
+  /**
+   * @return An absolute time value representing the stream's expiry time.
+   */
+  time_point expires_at() const
+  {
+    return rdbuf()->expires_at();
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Get the stream's expiry time as an absolute time.
+  /**
+   * @return An absolute time value representing the stream's expiry time.
+   */
+  time_point expiry() const
+  {
+    return rdbuf()->expiry();
+  }
+
+  /// Set the stream's expiry time as an absolute time.
+  /**
+   * This function sets the expiry time associated with the stream. Stream
+   * operations performed after this time (where the operations cannot be
+   * completed using the internal buffers) will fail with the error
+   * asio::error::operation_aborted.
+   *
+   * @param expiry_time The expiry time to be used for the stream.
+   */
+  void expires_at(const time_point& expiry_time)
+  {
+    rdbuf()->expires_at(expiry_time);
+  }
+
+  /// Set the stream's expiry time relative to now.
+  /**
+   * This function sets the expiry time associated with the stream. Stream
+   * operations performed after this time (where the operations cannot be
+   * completed using the internal buffers) will fail with the error
+   * asio::error::operation_aborted.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   */
+  void expires_after(const duration& expiry_time)
+  {
+    rdbuf()->expires_after(expiry_time);
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use expiry().) Get the stream's expiry time relative to now.
+  /**
+   * @return A relative time value representing the stream's expiry time.
+   */
+  duration expires_from_now() const
+  {
+    return rdbuf()->expires_from_now();
+  }
+
+  /// (Deprecated: Use expires_after().) Set the stream's expiry time relative
+  /// to now.
+  /**
+   * This function sets the expiry time associated with the stream. Stream
+   * operations performed after this time (where the operations cannot be
+   * completed using the internal buffers) will fail with the error
+   * asio::error::operation_aborted.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   */
+  void expires_from_now(const duration& expiry_time)
+  {
+    rdbuf()->expires_from_now(expiry_time);
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+private:
+  // Disallow copying and assignment.
+  basic_socket_iostream(const basic_socket_iostream&) ASIO_DELETED;
+  basic_socket_iostream& operator=(
+      const basic_socket_iostream&) ASIO_DELETED;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+# undef ASIO_PRIVATE_CTR_DEF
+# undef ASIO_PRIVATE_CONNECT_DEF
+#endif // !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // ASIO_BASIC_SOCKET_IOSTREAM_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket_streambuf.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket_streambuf.hpp
new file mode 100644
index 00000000000..bf36bac111c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_socket_streambuf.hpp
@@ -0,0 +1,687 @@
+//
+// basic_socket_streambuf.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_SOCKET_STREAMBUF_HPP
+#define ASIO_BASIC_SOCKET_STREAMBUF_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+#include <streambuf>
+#include <vector>
+#include "asio/basic_socket.hpp"
+#include "asio/basic_stream_socket.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/io_context.hpp"
+
+#if defined(ASIO_HAS_BOOST_DATE_TIME) \
+  && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+# include "asio/detail/deadline_timer_service.hpp"
+#else // defined(ASIO_HAS_BOOST_DATE_TIME)
+      // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+# include "asio/steady_timer.hpp"
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+       // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+
+#if !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+# include "asio/detail/variadic_templates.hpp"
+
+// A macro that should expand to:
+//   template <typename T1, ..., typename Tn>
+//   basic_socket_streambuf* connect(T1 x1, ..., Tn xn)
+//   {
+//     init_buffers();
+//     typedef typename Protocol::resolver resolver_type;
+//     resolver_type resolver(socket().get_executor());
+//     connect_to_endpoints(
+//         resolver.resolve(x1, ..., xn, ec_));
+//     return !ec_ ? this : 0;
+//   }
+// This macro should only persist within this file.
+
+# define ASIO_PRIVATE_CONNECT_DEF(n) \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  basic_socket_streambuf* connect(ASIO_VARIADIC_BYVAL_PARAMS(n)) \
+  { \
+    init_buffers(); \
+    typedef typename Protocol::resolver resolver_type; \
+    resolver_type resolver(socket().get_executor()); \
+    connect_to_endpoints( \
+        resolver.resolve(ASIO_VARIADIC_BYVAL_ARGS(n), ec_)); \
+    return !ec_ ? this : 0; \
+  } \
+  /**/
+
+#endif // !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// A separate base class is used to ensure that the io_context member is
+// initialised prior to the basic_socket_streambuf's basic_socket base class.
+class socket_streambuf_io_context
+{
+protected:
+  socket_streambuf_io_context(io_context* ctx)
+    : default_io_context_(ctx)
+  {
+  }
+
+  shared_ptr<io_context> default_io_context_;
+};
+
+// A separate base class is used to ensure that the dynamically allocated
+// buffers are constructed prior to the basic_socket_streambuf's basic_socket
+// base class. This makes moving the socket is the last potentially throwing
+// step in the streambuf's move constructor, giving the constructor a strong
+// exception safety guarantee.
+class socket_streambuf_buffers
+{
+protected:
+  socket_streambuf_buffers()
+    : get_buffer_(buffer_size),
+      put_buffer_(buffer_size)
+  {
+  }
+
+  enum { buffer_size = 512 };
+  std::vector<char> get_buffer_;
+  std::vector<char> put_buffer_;
+};
+
+} // namespace detail
+
+#if !defined(ASIO_BASIC_SOCKET_STREAMBUF_FWD_DECL)
+#define ASIO_BASIC_SOCKET_STREAMBUF_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Protocol,
+#if defined(ASIO_HAS_BOOST_DATE_TIME) \
+  && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+    typename Clock = boost::posix_time::ptime,
+    typename WaitTraits = time_traits<Clock> >
+#else // defined(ASIO_HAS_BOOST_DATE_TIME)
+      // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+    typename Clock = chrono::steady_clock,
+    typename WaitTraits = wait_traits<Clock> >
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+       // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+class basic_socket_streambuf;
+
+#endif // !defined(ASIO_BASIC_SOCKET_STREAMBUF_FWD_DECL)
+
+/// Iostream streambuf for a socket.
+#if defined(GENERATING_DOCUMENTATION)
+template <typename Protocol,
+    typename Clock = chrono::steady_clock,
+    typename WaitTraits = wait_traits<Clock> >
+#else // defined(GENERATING_DOCUMENTATION)
+template <typename Protocol, typename Clock, typename WaitTraits>
+#endif // defined(GENERATING_DOCUMENTATION)
+class basic_socket_streambuf
+  : public std::streambuf,
+    private detail::socket_streambuf_io_context,
+    private detail::socket_streambuf_buffers,
+#if defined(ASIO_NO_DEPRECATED) || defined(GENERATING_DOCUMENTATION)
+    private basic_socket<Protocol>
+#else // defined(ASIO_NO_DEPRECATED) || defined(GENERATING_DOCUMENTATION)
+    public basic_socket<Protocol>
+#endif // defined(ASIO_NO_DEPRECATED) || defined(GENERATING_DOCUMENTATION)
+{
+private:
+  // These typedefs are intended keep this class's implementation independent
+  // of whether it's using Boost.DateClock, Boost.Chrono or std::chrono.
+#if defined(ASIO_HAS_BOOST_DATE_TIME) \
+  && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+  typedef WaitTraits traits_helper;
+#else // defined(ASIO_HAS_BOOST_DATE_TIME)
+      // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+  typedef detail::chrono_time_traits<Clock, WaitTraits> traits_helper;
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+       // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+
+public:
+  /// The protocol type.
+  typedef Protocol protocol_type;
+
+  /// The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  /// The clock type.
+  typedef Clock clock_type;
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// (Deprecated: Use time_point.) The time type.
+  typedef typename WaitTraits::time_type time_type;
+
+  /// The time type.
+  typedef typename WaitTraits::time_point time_point;
+
+  /// (Deprecated: Use duration.) The duration type.
+  typedef typename WaitTraits::duration_type duration_type;
+
+  /// The duration type.
+  typedef typename WaitTraits::duration duration;
+#else
+# if !defined(ASIO_NO_DEPRECATED)
+  typedef typename traits_helper::time_type time_type;
+  typedef typename traits_helper::duration_type duration_type;
+# endif // !defined(ASIO_NO_DEPRECATED)
+  typedef typename traits_helper::time_type time_point;
+  typedef typename traits_helper::duration_type duration;
+#endif
+
+  /// Construct a basic_socket_streambuf without establishing a connection.
+  basic_socket_streambuf()
+    : detail::socket_streambuf_io_context(new io_context),
+      basic_socket<Protocol>(*default_io_context_),
+      expiry_time_(max_expiry_time())
+  {
+    init_buffers();
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Construct a basic_socket_streambuf from the supplied socket.
+  explicit basic_socket_streambuf(basic_stream_socket<protocol_type> s)
+    : detail::socket_streambuf_io_context(0),
+      basic_socket<Protocol>(std::move(s)),
+      expiry_time_(max_expiry_time())
+  {
+    init_buffers();
+  }
+
+  /// Move-construct a basic_socket_streambuf from another.
+  basic_socket_streambuf(basic_socket_streambuf&& other)
+    : detail::socket_streambuf_io_context(other),
+      basic_socket<Protocol>(std::move(other.socket())),
+      ec_(other.ec_),
+      expiry_time_(other.expiry_time_)
+  {
+    get_buffer_.swap(other.get_buffer_);
+    put_buffer_.swap(other.put_buffer_);
+    setg(other.eback(), other.gptr(), other.egptr());
+    setp(other.pptr(), other.epptr());
+    other.ec_ = asio::error_code();
+    other.expiry_time_ = max_expiry_time();
+    other.init_buffers();
+  }
+
+  /// Move-assign a basic_socket_streambuf from another.
+  basic_socket_streambuf& operator=(basic_socket_streambuf&& other)
+  {
+    this->close();
+    socket() = std::move(other.socket());
+    detail::socket_streambuf_io_context::operator=(other);
+    ec_ = other.ec_;
+    expiry_time_ = other.expiry_time_;
+    get_buffer_.swap(other.get_buffer_);
+    put_buffer_.swap(other.put_buffer_);
+    setg(other.eback(), other.gptr(), other.egptr());
+    setp(other.pptr(), other.epptr());
+    other.ec_ = asio::error_code();
+    other.expiry_time_ = max_expiry_time();
+    other.put_buffer_.resize(buffer_size);
+    other.init_buffers();
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destructor flushes buffered data.
+  virtual ~basic_socket_streambuf()
+  {
+    if (pptr() != pbase())
+      overflow(traits_type::eof());
+  }
+
+  /// Establish a connection.
+  /**
+   * This function establishes a connection to the specified endpoint.
+   *
+   * @return \c this if a connection was successfully established, a null
+   * pointer otherwise.
+   */
+  basic_socket_streambuf* connect(const endpoint_type& endpoint)
+  {
+    init_buffers();
+    ec_ = asio::error_code();
+    this->connect_to_endpoints(&endpoint, &endpoint + 1);
+    return !ec_ ? this : 0;
+  }
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// Establish a connection.
+  /**
+   * This function automatically establishes a connection based on the supplied
+   * resolver query parameters. The arguments are used to construct a resolver
+   * query object.
+   *
+   * @return \c this if a connection was successfully established, a null
+   * pointer otherwise.
+   */
+  template <typename T1, ..., typename TN>
+  basic_socket_streambuf* connect(T1 t1, ..., TN tn);
+#elif defined(ASIO_HAS_VARIADIC_TEMPLATES)
+  template <typename... T>
+  basic_socket_streambuf* connect(T... x)
+  {
+    init_buffers();
+    typedef typename Protocol::resolver resolver_type;
+    resolver_type resolver(socket().get_executor());
+    connect_to_endpoints(resolver.resolve(x..., ec_));
+    return !ec_ ? this : 0;
+  }
+#else
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_CONNECT_DEF)
+#endif
+
+  /// Close the connection.
+  /**
+   * @return \c this if a connection was successfully established, a null
+   * pointer otherwise.
+   */
+  basic_socket_streambuf* close()
+  {
+    sync();
+    socket().close(ec_);
+    if (!ec_)
+      init_buffers();
+    return !ec_ ? this : 0;
+  }
+
+  /// Get a reference to the underlying socket.
+  basic_socket<Protocol>& socket()
+  {
+    return *this;
+  }
+
+  /// Get the last error associated with the stream buffer.
+  /**
+   * @return An \c error_code corresponding to the last error from the stream
+   * buffer.
+   */
+  const asio::error_code& error() const
+  {
+    return ec_;
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use error().) Get the last error associated with the stream
+  /// buffer.
+  /**
+   * @return An \c error_code corresponding to the last error from the stream
+   * buffer.
+   */
+  const asio::error_code& puberror() const
+  {
+    return error();
+  }
+
+  /// (Deprecated: Use expiry().) Get the stream buffer's expiry time as an
+  /// absolute time.
+  /**
+   * @return An absolute time value representing the stream buffer's expiry
+   * time.
+   */
+  time_point expires_at() const
+  {
+    return expiry_time_;
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Get the stream buffer's expiry time as an absolute time.
+  /**
+   * @return An absolute time value representing the stream buffer's expiry
+   * time.
+   */
+  time_point expiry() const
+  {
+    return expiry_time_;
+  }
+
+  /// Set the stream buffer's expiry time as an absolute time.
+  /**
+   * This function sets the expiry time associated with the stream. Stream
+   * operations performed after this time (where the operations cannot be
+   * completed using the internal buffers) will fail with the error
+   * asio::error::operation_aborted.
+   *
+   * @param expiry_time The expiry time to be used for the stream.
+   */
+  void expires_at(const time_point& expiry_time)
+  {
+    expiry_time_ = expiry_time;
+  }
+
+  /// Set the stream buffer's expiry time relative to now.
+  /**
+   * This function sets the expiry time associated with the stream. Stream
+   * operations performed after this time (where the operations cannot be
+   * completed using the internal buffers) will fail with the error
+   * asio::error::operation_aborted.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   */
+  void expires_after(const duration& expiry_time)
+  {
+    expiry_time_ = traits_helper::add(traits_helper::now(), expiry_time);
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use expiry().) Get the stream buffer's expiry time relative
+  /// to now.
+  /**
+   * @return A relative time value representing the stream buffer's expiry time.
+   */
+  duration expires_from_now() const
+  {
+    return traits_helper::subtract(expires_at(), traits_helper::now());
+  }
+
+  /// (Deprecated: Use expires_after().) Set the stream buffer's expiry time
+  /// relative to now.
+  /**
+   * This function sets the expiry time associated with the stream. Stream
+   * operations performed after this time (where the operations cannot be
+   * completed using the internal buffers) will fail with the error
+   * asio::error::operation_aborted.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   */
+  void expires_from_now(const duration& expiry_time)
+  {
+    expiry_time_ = traits_helper::add(traits_helper::now(), expiry_time);
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+protected:
+  int_type underflow()
+  {
+#if defined(ASIO_WINDOWS_RUNTIME)
+    ec_ = asio::error::operation_not_supported;
+    return traits_type::eof();
+#else // defined(ASIO_WINDOWS_RUNTIME)
+    if (gptr() != egptr())
+      return traits_type::eof();
+
+    for (;;)
+    {
+      // Check if we are past the expiry time.
+      if (traits_helper::less_than(expiry_time_, traits_helper::now()))
+      {
+        ec_ = asio::error::timed_out;
+        return traits_type::eof();
+      }
+
+      // Try to complete the operation without blocking.
+      if (!socket().native_non_blocking())
+        socket().native_non_blocking(true, ec_);
+      detail::buffer_sequence_adapter<mutable_buffer, mutable_buffer>
+        bufs(asio::buffer(get_buffer_) + putback_max);
+      detail::signed_size_type bytes = detail::socket_ops::recv(
+          socket().native_handle(), bufs.buffers(), bufs.count(), 0, ec_);
+
+      // Check if operation succeeded.
+      if (bytes > 0)
+      {
+        setg(&get_buffer_[0], &get_buffer_[0] + putback_max,
+            &get_buffer_[0] + putback_max + bytes);
+        return traits_type::to_int_type(*gptr());
+      }
+
+      // Check for EOF.
+      if (bytes == 0)
+      {
+        ec_ = asio::error::eof;
+        return traits_type::eof();
+      }
+
+      // Operation failed.
+      if (ec_ != asio::error::would_block
+          && ec_ != asio::error::try_again)
+        return traits_type::eof();
+
+      // Wait for socket to become ready.
+      if (detail::socket_ops::poll_read(
+            socket().native_handle(), 0, timeout(), ec_) < 0)
+        return traits_type::eof();
+    }
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+  }
+
+  int_type overflow(int_type c)
+  {
+#if defined(ASIO_WINDOWS_RUNTIME)
+    ec_ = asio::error::operation_not_supported;
+    return traits_type::eof();
+#else // defined(ASIO_WINDOWS_RUNTIME)
+    char_type ch = traits_type::to_char_type(c);
+
+    // Determine what needs to be sent.
+    const_buffer output_buffer;
+    if (put_buffer_.empty())
+    {
+      if (traits_type::eq_int_type(c, traits_type::eof()))
+        return traits_type::not_eof(c); // Nothing to do.
+      output_buffer = asio::buffer(&ch, sizeof(char_type));
+    }
+    else
+    {
+      output_buffer = asio::buffer(pbase(),
+          (pptr() - pbase()) * sizeof(char_type));
+    }
+
+    while (output_buffer.size() > 0)
+    {
+      // Check if we are past the expiry time.
+      if (traits_helper::less_than(expiry_time_, traits_helper::now()))
+      {
+        ec_ = asio::error::timed_out;
+        return traits_type::eof();
+      }
+
+      // Try to complete the operation without blocking.
+      if (!socket().native_non_blocking())
+        socket().native_non_blocking(true, ec_);
+      detail::buffer_sequence_adapter<
+        const_buffer, const_buffer> bufs(output_buffer);
+      detail::signed_size_type bytes = detail::socket_ops::send(
+          socket().native_handle(), bufs.buffers(), bufs.count(), 0, ec_);
+
+      // Check if operation succeeded.
+      if (bytes > 0)
+      {
+        output_buffer += static_cast<std::size_t>(bytes);
+        continue;
+      }
+
+      // Operation failed.
+      if (ec_ != asio::error::would_block
+          && ec_ != asio::error::try_again)
+        return traits_type::eof();
+
+      // Wait for socket to become ready.
+      if (detail::socket_ops::poll_write(
+            socket().native_handle(), 0, timeout(), ec_) < 0)
+        return traits_type::eof();
+    }
+
+    if (!put_buffer_.empty())
+    {
+      setp(&put_buffer_[0], &put_buffer_[0] + put_buffer_.size());
+
+      // If the new character is eof then our work here is done.
+      if (traits_type::eq_int_type(c, traits_type::eof()))
+        return traits_type::not_eof(c);
+
+      // Add the new character to the output buffer.
+      *pptr() = ch;
+      pbump(1);
+    }
+
+    return c;
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+  }
+
+  int sync()
+  {
+    return overflow(traits_type::eof());
+  }
+
+  std::streambuf* setbuf(char_type* s, std::streamsize n)
+  {
+    if (pptr() == pbase() && s == 0 && n == 0)
+    {
+      put_buffer_.clear();
+      setp(0, 0);
+      sync();
+      return this;
+    }
+
+    return 0;
+  }
+
+private:
+  // Disallow copying and assignment.
+  basic_socket_streambuf(const basic_socket_streambuf&) ASIO_DELETED;
+  basic_socket_streambuf& operator=(
+      const basic_socket_streambuf&) ASIO_DELETED;
+
+  void init_buffers()
+  {
+    setg(&get_buffer_[0],
+        &get_buffer_[0] + putback_max,
+        &get_buffer_[0] + putback_max);
+
+    if (put_buffer_.empty())
+      setp(0, 0);
+    else
+      setp(&put_buffer_[0], &put_buffer_[0] + put_buffer_.size());
+  }
+
+  int timeout() const
+  {
+    int64_t msec = traits_helper::to_posix_duration(
+        traits_helper::subtract(expiry_time_,
+          traits_helper::now())).total_milliseconds();
+    if (msec > (std::numeric_limits<int>::max)())
+      msec = (std::numeric_limits<int>::max)();
+    else if (msec < 0)
+      msec = 0;
+    return static_cast<int>(msec);
+  }
+
+  template <typename EndpointSequence>
+  void connect_to_endpoints(const EndpointSequence& endpoints)
+  {
+    this->connect_to_endpoints(endpoints.begin(), endpoints.end());
+  }
+
+  template <typename EndpointIterator>
+  void connect_to_endpoints(EndpointIterator begin, EndpointIterator end)
+  {
+#if defined(ASIO_WINDOWS_RUNTIME)
+    ec_ = asio::error::operation_not_supported;
+#else // defined(ASIO_WINDOWS_RUNTIME)
+    if (ec_)
+      return;
+
+    ec_ = asio::error::not_found;
+    for (EndpointIterator i = begin; i != end; ++i)
+    {
+      // Check if we are past the expiry time.
+      if (traits_helper::less_than(expiry_time_, traits_helper::now()))
+      {
+        ec_ = asio::error::timed_out;
+        return;
+      }
+
+      // Close and reopen the socket.
+      typename Protocol::endpoint ep(*i);
+      socket().close(ec_);
+      socket().open(ep.protocol(), ec_);
+      if (ec_)
+        continue;
+
+      // Try to complete the operation without blocking.
+      if (!socket().native_non_blocking())
+        socket().native_non_blocking(true, ec_);
+      detail::socket_ops::connect(socket().native_handle(),
+          ep.data(), ep.size(), ec_);
+
+      // Check if operation succeeded.
+      if (!ec_)
+        return;
+
+      // Operation failed.
+      if (ec_ != asio::error::in_progress
+          && ec_ != asio::error::would_block)
+        continue;
+
+      // Wait for socket to become ready.
+      if (detail::socket_ops::poll_connect(
+            socket().native_handle(), timeout(), ec_) < 0)
+        continue;
+
+      // Get the error code from the connect operation.
+      int connect_error = 0;
+      size_t connect_error_len = sizeof(connect_error);
+      if (detail::socket_ops::getsockopt(socket().native_handle(), 0,
+            SOL_SOCKET, SO_ERROR, &connect_error, &connect_error_len, ec_)
+          == detail::socket_error_retval)
+        return;
+
+      // Check the result of the connect operation.
+      ec_ = asio::error_code(connect_error,
+          asio::error::get_system_category());
+      if (!ec_)
+        return;
+    }
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+  }
+
+  // Helper function to get the maximum expiry time.
+  static time_point max_expiry_time()
+  {
+#if defined(ASIO_HAS_BOOST_DATE_TIME) \
+  && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+    return boost::posix_time::pos_infin;
+#else // defined(ASIO_HAS_BOOST_DATE_TIME)
+      // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+    return (time_point::max)();
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+       // && defined(ASIO_USE_BOOST_DATE_TIME_FOR_SOCKET_IOSTREAM)
+  }
+
+  enum { putback_max = 8 };
+  asio::error_code ec_;
+  time_point expiry_time_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+# undef ASIO_PRIVATE_CONNECT_DEF
+#endif // !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // ASIO_BASIC_SOCKET_STREAMBUF_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_stream_socket.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_stream_socket.hpp
new file mode 100644
index 00000000000..f7b03c23956
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_stream_socket.hpp
@@ -0,0 +1,1049 @@
+//
+// basic_stream_socket.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_STREAM_SOCKET_HPP
+#define ASIO_BASIC_STREAM_SOCKET_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/async_result.hpp"
+#include "asio/basic_socket.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if !defined(ASIO_BASIC_STREAM_SOCKET_FWD_DECL)
+#define ASIO_BASIC_STREAM_SOCKET_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Protocol, typename Executor = executor>
+class basic_stream_socket;
+
+#endif // !defined(ASIO_BASIC_STREAM_SOCKET_FWD_DECL)
+
+/// Provides stream-oriented socket functionality.
+/**
+ * The basic_stream_socket class template provides asynchronous and blocking
+ * stream-oriented socket functionality.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Concepts:
+ * AsyncReadStream, AsyncWriteStream, Stream, SyncReadStream, SyncWriteStream.
+ */
+template <typename Protocol, typename Executor>
+class basic_stream_socket
+  : public basic_socket<Protocol, Executor>
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the socket type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The socket type when rebound to the specified executor.
+    typedef basic_stream_socket<Protocol, Executor1> other;
+  };
+
+  /// The native representation of a socket.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#else
+  typedef typename basic_socket<Protocol,
+    Executor>::native_handle_type native_handle_type;
+#endif
+
+  /// The protocol type.
+  typedef Protocol protocol_type;
+
+  /// The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  /// Construct a basic_stream_socket without opening it.
+  /**
+   * This constructor creates a stream socket without opening it. The socket
+   * needs to be opened and then connected or accepted before data can be sent
+   * or received on it.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   */
+  explicit basic_stream_socket(const executor_type& ex)
+    : basic_socket<Protocol, Executor>(ex)
+  {
+  }
+
+  /// Construct a basic_stream_socket without opening it.
+  /**
+   * This constructor creates a stream socket without opening it. The socket
+   * needs to be opened and then connected or accepted before data can be sent
+   * or received on it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   */
+  template <typename ExecutionContext>
+  explicit basic_stream_socket(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context)
+  {
+  }
+
+  /// Construct and open a basic_stream_socket.
+  /**
+   * This constructor creates and opens a stream socket. The socket needs to be
+   * connected or accepted before data can be sent or received on it.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_stream_socket(const executor_type& ex, const protocol_type& protocol)
+    : basic_socket<Protocol, Executor>(ex, protocol)
+  {
+  }
+
+  /// Construct and open a basic_stream_socket.
+  /**
+   * This constructor creates and opens a stream socket. The socket needs to be
+   * connected or accepted before data can be sent or received on it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_stream_socket(ExecutionContext& context, const protocol_type& protocol,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, protocol)
+  {
+  }
+
+  /// Construct a basic_stream_socket, opening it and binding it to the given
+  /// local endpoint.
+  /**
+   * This constructor creates a stream socket and automatically opens it bound
+   * to the specified endpoint on the local machine. The protocol used is the
+   * protocol associated with the given endpoint.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param endpoint An endpoint on the local machine to which the stream
+   * socket will be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_stream_socket(const executor_type& ex, const endpoint_type& endpoint)
+    : basic_socket<Protocol, Executor>(ex, endpoint)
+  {
+  }
+
+  /// Construct a basic_stream_socket, opening it and binding it to the given
+  /// local endpoint.
+  /**
+   * This constructor creates a stream socket and automatically opens it bound
+   * to the specified endpoint on the local machine. The protocol used is the
+   * protocol associated with the given endpoint.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param endpoint An endpoint on the local machine to which the stream
+   * socket will be bound.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_stream_socket(ExecutionContext& context, const endpoint_type& endpoint,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, endpoint)
+  {
+  }
+
+  /// Construct a basic_stream_socket on an existing native socket.
+  /**
+   * This constructor creates a stream socket object to hold an existing native
+   * socket.
+   *
+   * @param ex The I/O executor that the socket will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_socket The new underlying socket implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_stream_socket(const executor_type& ex,
+      const protocol_type& protocol, const native_handle_type& native_socket)
+    : basic_socket<Protocol, Executor>(ex, protocol, native_socket)
+  {
+  }
+
+  /// Construct a basic_stream_socket on an existing native socket.
+  /**
+   * This constructor creates a stream socket object to hold an existing native
+   * socket.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the socket will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the socket.
+   *
+   * @param protocol An object specifying protocol parameters to be used.
+   *
+   * @param native_socket The new underlying socket implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_stream_socket(ExecutionContext& context,
+      const protocol_type& protocol, const native_handle_type& native_socket,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(context, protocol, native_socket)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_stream_socket from another.
+  /**
+   * This constructor moves a stream socket from one object to another.
+   *
+   * @param other The other basic_stream_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_stream_socket(const executor_type&)
+   * constructor.
+   */
+  basic_stream_socket(basic_stream_socket&& other) ASIO_NOEXCEPT
+    : basic_socket<Protocol, Executor>(std::move(other))
+  {
+  }
+
+  /// Move-assign a basic_stream_socket from another.
+  /**
+   * This assignment operator moves a stream socket from one object to another.
+   *
+   * @param other The other basic_stream_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_stream_socket(const executor_type&)
+   * constructor.
+   */
+  basic_stream_socket& operator=(basic_stream_socket&& other)
+  {
+    basic_socket<Protocol, Executor>::operator=(std::move(other));
+    return *this;
+  }
+
+  /// Move-construct a basic_stream_socket from a socket of another protocol
+  /// type.
+  /**
+   * This constructor moves a stream socket from one object to another.
+   *
+   * @param other The other basic_stream_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_stream_socket(const executor_type&)
+   * constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  basic_stream_socket(basic_stream_socket<Protocol1, Executor1>&& other,
+      typename enable_if<
+        is_convertible<Protocol1, Protocol>::value
+          && is_convertible<Executor1, Executor>::value
+      >::type* = 0)
+    : basic_socket<Protocol, Executor>(std::move(other))
+  {
+  }
+
+  /// Move-assign a basic_stream_socket from a socket of another protocol type.
+  /**
+   * This assignment operator moves a stream socket from one object to another.
+   *
+   * @param other The other basic_stream_socket object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_stream_socket(const executor_type&)
+   * constructor.
+   */
+  template <typename Protocol1, typename Executor1>
+  typename enable_if<
+    is_convertible<Protocol1, Protocol>::value
+      && is_convertible<Executor1, Executor>::value,
+    basic_stream_socket&
+  >::type operator=(basic_stream_socket<Protocol1, Executor1>&& other)
+  {
+    basic_socket<Protocol, Executor>::operator=(std::move(other));
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destroys the socket.
+  /**
+   * This function destroys the socket, cancelling any outstanding asynchronous
+   * operations associated with the socket as if by calling @c cancel.
+   */
+  ~basic_stream_socket()
+  {
+  }
+
+  /// Send some data on the socket.
+  /**
+   * This function is used to send data on the stream socket. The function
+   * call will block until one or more bytes of the data has been sent
+   * successfully, or an until error occurs.
+   *
+   * @param buffers One or more data buffers to be sent on the socket.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The send operation may not transmit all of the data to the peer.
+   * Consider using the @ref write function if you need to ensure that all data
+   * is written before the blocking operation completes.
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.send(asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send(const ConstBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, 0, ec);
+    asio::detail::throw_error(ec, "send");
+    return s;
+  }
+
+  /// Send some data on the socket.
+  /**
+   * This function is used to send data on the stream socket. The function
+   * call will block until one or more bytes of the data has been sent
+   * successfully, or an until error occurs.
+   *
+   * @param buffers One or more data buffers to be sent on the socket.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @returns The number of bytes sent.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The send operation may not transmit all of the data to the peer.
+   * Consider using the @ref write function if you need to ensure that all data
+   * is written before the blocking operation completes.
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.send(asio::buffer(data, size), 0);
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, flags, ec);
+    asio::detail::throw_error(ec, "send");
+    return s;
+  }
+
+  /// Send some data on the socket.
+  /**
+   * This function is used to send data on the stream socket. The function
+   * call will block until one or more bytes of the data has been sent
+   * successfully, or an until error occurs.
+   *
+   * @param buffers One or more data buffers to be sent on the socket.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes sent. Returns 0 if an error occurred.
+   *
+   * @note The send operation may not transmit all of the data to the peer.
+   * Consider using the @ref write function if you need to ensure that all data
+   * is written before the blocking operation completes.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    return this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, flags, ec);
+  }
+
+  /// Start an asynchronous send.
+  /**
+   * This function is used to asynchronously send data on the stream socket.
+   * The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be sent on the socket. Although
+   * the buffers object may be copied as necessary, ownership of the underlying
+   * memory blocks is retained by the caller, which must guarantee that they
+   * remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the send operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes sent.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The send operation may not transmit all of the data to the peer.
+   * Consider using the @ref async_write function if you need to ensure that all
+   * data is written before the asynchronous operation completes.
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.async_send(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_send(const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send(this), handler,
+        buffers, socket_base::message_flags(0));
+  }
+
+  /// Start an asynchronous send.
+  /**
+   * This function is used to asynchronously send data on the stream socket.
+   * The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be sent on the socket. Although
+   * the buffers object may be copied as necessary, ownership of the underlying
+   * memory blocks is retained by the caller, which must guarantee that they
+   * remain valid until the handler is called.
+   *
+   * @param flags Flags specifying how the send call is to be made.
+   *
+   * @param handler The handler to be called when the send operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes sent.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The send operation may not transmit all of the data to the peer.
+   * Consider using the @ref async_write function if you need to ensure that all
+   * data is written before the asynchronous operation completes.
+   *
+   * @par Example
+   * To send a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.async_send(asio::buffer(data, size), 0, handler);
+   * @endcode
+   * See the @ref buffer documentation for information on sending multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_send(const ConstBufferSequence& buffers,
+      socket_base::message_flags flags,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send(this), handler, buffers, flags);
+  }
+
+  /// Receive some data on the socket.
+  /**
+   * This function is used to receive data on the stream socket. The function
+   * call will block until one or more bytes of data has been received
+   * successfully, or until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The receive operation may not receive all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that the
+   * requested amount of data is read before the blocking operation completes.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * socket.receive(asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive(
+        this->impl_.get_implementation(), buffers, 0, ec);
+    asio::detail::throw_error(ec, "receive");
+    return s;
+  }
+
+  /// Receive some data on the socket.
+  /**
+   * This function is used to receive data on the stream socket. The function
+   * call will block until one or more bytes of data has been received
+   * successfully, or until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @returns The number of bytes received.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The receive operation may not receive all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that the
+   * requested amount of data is read before the blocking operation completes.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * socket.receive(asio::buffer(data, size), 0);
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags flags)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive(
+        this->impl_.get_implementation(), buffers, flags, ec);
+    asio::detail::throw_error(ec, "receive");
+    return s;
+  }
+
+  /// Receive some data on a connected socket.
+  /**
+   * This function is used to receive data on the stream socket. The function
+   * call will block until one or more bytes of data has been received
+   * successfully, or until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes received. Returns 0 if an error occurred.
+   *
+   * @note The receive operation may not receive all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that the
+   * requested amount of data is read before the blocking operation completes.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    return this->impl_.get_service().receive(
+        this->impl_.get_implementation(), buffers, flags, ec);
+  }
+
+  /// Start an asynchronous receive.
+  /**
+   * This function is used to asynchronously receive data from the stream
+   * socket. The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The receive operation may not receive all of the requested number of
+   * bytes. Consider using the @ref async_read function if you need to ensure
+   * that the requested amount of data is received before the asynchronous
+   * operation completes.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * socket.async_receive(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive(const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive(this), handler,
+        buffers, socket_base::message_flags(0));
+  }
+
+  /// Start an asynchronous receive.
+  /**
+   * This function is used to asynchronously receive data from the stream
+   * socket. The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be received.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param flags Flags specifying how the receive call is to be made.
+   *
+   * @param handler The handler to be called when the receive operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes received.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The receive operation may not receive all of the requested number of
+   * bytes. Consider using the @ref async_read function if you need to ensure
+   * that the requested amount of data is received before the asynchronous
+   * operation completes.
+   *
+   * @par Example
+   * To receive into a single data buffer use the @ref buffer function as
+   * follows:
+   * @code
+   * socket.async_receive(asio::buffer(data, size), 0, handler);
+   * @endcode
+   * See the @ref buffer documentation for information on receiving into
+   * multiple buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_receive(const MutableBufferSequence& buffers,
+      socket_base::message_flags flags,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive(this), handler, buffers, flags);
+  }
+
+  /// Write some data to the socket.
+  /**
+   * This function is used to write data to the stream socket. The function call
+   * will block until one or more bytes of the data has been written
+   * successfully, or until an error occurs.
+   *
+   * @param buffers One or more data buffers to be written to the socket.
+   *
+   * @returns The number of bytes written.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The write_some operation may not transmit all of the data to the
+   * peer. Consider using the @ref write function if you need to ensure that
+   * all data is written before the blocking operation completes.
+   *
+   * @par Example
+   * To write a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.write_some(asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on writing multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, 0, ec);
+    asio::detail::throw_error(ec, "write_some");
+    return s;
+  }
+
+  /// Write some data to the socket.
+  /**
+   * This function is used to write data to the stream socket. The function call
+   * will block until one or more bytes of the data has been written
+   * successfully, or until an error occurs.
+   *
+   * @param buffers One or more data buffers to be written to the socket.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes written. Returns 0 if an error occurred.
+   *
+   * @note The write_some operation may not transmit all of the data to the
+   * peer. Consider using the @ref write function if you need to ensure that
+   * all data is written before the blocking operation completes.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return this->impl_.get_service().send(
+        this->impl_.get_implementation(), buffers, 0, ec);
+  }
+
+  /// Start an asynchronous write.
+  /**
+   * This function is used to asynchronously write data to the stream socket.
+   * The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be written to the socket.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the write operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes written.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The write operation may not transmit all of the data to the peer.
+   * Consider using the @ref async_write function if you need to ensure that all
+   * data is written before the asynchronous operation completes.
+   *
+   * @par Example
+   * To write a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.async_write_some(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on writing multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_write_some(const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_send(this), handler,
+        buffers, socket_base::message_flags(0));
+  }
+
+  /// Read some data from the socket.
+  /**
+   * This function is used to read data from the stream socket. The function
+   * call will block until one or more bytes of data has been read successfully,
+   * or until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   *
+   * @returns The number of bytes read.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that
+   * the requested amount of data is read before the blocking operation
+   * completes.
+   *
+   * @par Example
+   * To read into a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.read_some(asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on reading into multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().receive(
+        this->impl_.get_implementation(), buffers, 0, ec);
+    asio::detail::throw_error(ec, "read_some");
+    return s;
+  }
+
+  /// Read some data from the socket.
+  /**
+   * This function is used to read data from the stream socket. The function
+   * call will block until one or more bytes of data has been read successfully,
+   * or until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes read. Returns 0 if an error occurred.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that
+   * the requested amount of data is read before the blocking operation
+   * completes.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return this->impl_.get_service().receive(
+        this->impl_.get_implementation(), buffers, 0, ec);
+  }
+
+  /// Start an asynchronous read.
+  /**
+   * This function is used to asynchronously read data from the stream socket.
+   * The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the read operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes read.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The read operation may not read all of the requested number of bytes.
+   * Consider using the @ref async_read function if you need to ensure that the
+   * requested amount of data is read before the asynchronous operation
+   * completes.
+   *
+   * @par Example
+   * To read into a single data buffer use the @ref buffer function as follows:
+   * @code
+   * socket.async_read_some(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on reading into multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_read_some(const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_receive(this), handler,
+        buffers, socket_base::message_flags(0));
+  }
+
+private:
+  class initiate_async_send
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_send(basic_stream_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        const ConstBufferSequence& buffers,
+        socket_base::message_flags flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      detail::non_const_lvalue<WriteHandler> handler2(handler);
+      self_->impl_.get_service().async_send(
+          self_->impl_.get_implementation(), buffers, flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_stream_socket* self_;
+  };
+
+  class initiate_async_receive
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_receive(basic_stream_socket* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        const MutableBufferSequence& buffers,
+        socket_base::message_flags flags) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      detail::non_const_lvalue<ReadHandler> handler2(handler);
+      self_->impl_.get_service().async_receive(
+          self_->impl_.get_implementation(), buffers, flags,
+          handler2.value, self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_stream_socket* self_;
+  };
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BASIC_STREAM_SOCKET_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_streambuf.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_streambuf.hpp
new file mode 100644
index 00000000000..7a106721bf7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_streambuf.hpp
@@ -0,0 +1,452 @@
+//
+// basic_streambuf.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_STREAMBUF_HPP
+#define ASIO_BASIC_STREAMBUF_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+#include <algorithm>
+#include <cstring>
+#include <stdexcept>
+#include <streambuf>
+#include <vector>
+#include "asio/basic_streambuf_fwd.hpp"
+#include "asio/buffer.hpp"
+#include "asio/detail/limits.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/throw_exception.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Automatically resizable buffer class based on std::streambuf.
+/**
+ * The @c basic_streambuf class is derived from @c std::streambuf to associate
+ * the streambuf's input and output sequences with one or more character
+ * arrays. These character arrays are internal to the @c basic_streambuf
+ * object, but direct access to the array elements is provided to permit them
+ * to be used efficiently with I/O operations. Characters written to the output
+ * sequence of a @c basic_streambuf object are appended to the input sequence
+ * of the same object.
+ *
+ * The @c basic_streambuf class's public interface is intended to permit the
+ * following implementation strategies:
+ *
+ * @li A single contiguous character array, which is reallocated as necessary
+ * to accommodate changes in the size of the character sequence. This is the
+ * implementation approach currently used in Asio.
+ *
+ * @li A sequence of one or more character arrays, where each array is of the
+ * same size. Additional character array objects are appended to the sequence
+ * to accommodate changes in the size of the character sequence.
+ *
+ * @li A sequence of one or more character arrays of varying sizes. Additional
+ * character array objects are appended to the sequence to accommodate changes
+ * in the size of the character sequence.
+ *
+ * The constructor for basic_streambuf accepts a @c size_t argument specifying
+ * the maximum of the sum of the sizes of the input sequence and output
+ * sequence. During the lifetime of the @c basic_streambuf object, the following
+ * invariant holds:
+ * @code size() <= max_size()@endcode
+ * Any member function that would, if successful, cause the invariant to be
+ * violated shall throw an exception of class @c std::length_error.
+ *
+ * The constructor for @c basic_streambuf takes an Allocator argument. A copy
+ * of this argument is used for any memory allocation performed, by the
+ * constructor and by all member functions, during the lifetime of each @c
+ * basic_streambuf object.
+ *
+ * @par Examples
+ * Writing directly from an streambuf to a socket:
+ * @code
+ * asio::streambuf b;
+ * std::ostream os(&b);
+ * os << "Hello, World!\n";
+ *
+ * // try sending some data in input sequence
+ * size_t n = sock.send(b.data());
+ *
+ * b.consume(n); // sent data is removed from input sequence
+ * @endcode
+ *
+ * Reading from a socket directly into a streambuf:
+ * @code
+ * asio::streambuf b;
+ *
+ * // reserve 512 bytes in output sequence
+ * asio::streambuf::mutable_buffers_type bufs = b.prepare(512);
+ *
+ * size_t n = sock.receive(bufs);
+ *
+ * // received data is "committed" from output sequence to input sequence
+ * b.commit(n);
+ *
+ * std::istream is(&b);
+ * std::string s;
+ * is >> s;
+ * @endcode
+ */
+#if defined(GENERATING_DOCUMENTATION)
+template <typename Allocator = std::allocator<char> >
+#else
+template <typename Allocator>
+#endif
+class basic_streambuf
+  : public std::streambuf,
+    private noncopyable
+{
+public:
+#if defined(GENERATING_DOCUMENTATION)
+  /// The type used to represent the input sequence as a list of buffers.
+  typedef implementation_defined const_buffers_type;
+
+  /// The type used to represent the output sequence as a list of buffers.
+  typedef implementation_defined mutable_buffers_type;
+#else
+  typedef ASIO_CONST_BUFFER const_buffers_type;
+  typedef ASIO_MUTABLE_BUFFER mutable_buffers_type;
+#endif
+
+  /// Construct a basic_streambuf object.
+  /**
+   * Constructs a streambuf with the specified maximum size. The initial size
+   * of the streambuf's input sequence is 0.
+   */
+  explicit basic_streambuf(
+      std::size_t maximum_size = (std::numeric_limits<std::size_t>::max)(),
+      const Allocator& allocator = Allocator())
+    : max_size_(maximum_size),
+      buffer_(allocator)
+  {
+    std::size_t pend = (std::min<std::size_t>)(max_size_, buffer_delta);
+    buffer_.resize((std::max<std::size_t>)(pend, 1));
+    setg(&buffer_[0], &buffer_[0], &buffer_[0]);
+    setp(&buffer_[0], &buffer_[0] + pend);
+  }
+
+  /// Get the size of the input sequence.
+  /**
+   * @returns The size of the input sequence. The value is equal to that
+   * calculated for @c s in the following code:
+   * @code
+   * size_t s = 0;
+   * const_buffers_type bufs = data();
+   * const_buffers_type::const_iterator i = bufs.begin();
+   * while (i != bufs.end())
+   * {
+   *   const_buffer buf(*i++);
+   *   s += buf.size();
+   * }
+   * @endcode
+   */
+  std::size_t size() const ASIO_NOEXCEPT
+  {
+    return pptr() - gptr();
+  }
+
+  /// Get the maximum size of the basic_streambuf.
+  /**
+   * @returns The allowed maximum of the sum of the sizes of the input sequence
+   * and output sequence.
+   */
+  std::size_t max_size() const ASIO_NOEXCEPT
+  {
+    return max_size_;
+  }
+
+  /// Get the current capacity of the basic_streambuf.
+  /**
+   * @returns The current total capacity of the streambuf, i.e. for both the
+   * input sequence and output sequence.
+   */
+  std::size_t capacity() const ASIO_NOEXCEPT
+  {
+    return buffer_.capacity();
+  }
+
+  /// Get a list of buffers that represents the input sequence.
+  /**
+   * @returns An object of type @c const_buffers_type that satisfies
+   * ConstBufferSequence requirements, representing all character arrays in the
+   * input sequence.
+   *
+   * @note The returned object is invalidated by any @c basic_streambuf member
+   * function that modifies the input sequence or output sequence.
+   */
+  const_buffers_type data() const ASIO_NOEXCEPT
+  {
+    return asio::buffer(asio::const_buffer(gptr(),
+          (pptr() - gptr()) * sizeof(char_type)));
+  }
+
+  /// Get a list of buffers that represents the output sequence, with the given
+  /// size.
+  /**
+   * Ensures that the output sequence can accommodate @c n characters,
+   * reallocating character array objects as necessary.
+   *
+   * @returns An object of type @c mutable_buffers_type that satisfies
+   * MutableBufferSequence requirements, representing character array objects
+   * at the start of the output sequence such that the sum of the buffer sizes
+   * is @c n.
+   *
+   * @throws std::length_error If <tt>size() + n > max_size()</tt>.
+   *
+   * @note The returned object is invalidated by any @c basic_streambuf member
+   * function that modifies the input sequence or output sequence.
+   */
+  mutable_buffers_type prepare(std::size_t n)
+  {
+    reserve(n);
+    return asio::buffer(asio::mutable_buffer(
+          pptr(), n * sizeof(char_type)));
+  }
+
+  /// Move characters from the output sequence to the input sequence.
+  /**
+   * Appends @c n characters from the start of the output sequence to the input
+   * sequence. The beginning of the output sequence is advanced by @c n
+   * characters.
+   *
+   * Requires a preceding call <tt>prepare(x)</tt> where <tt>x >= n</tt>, and
+   * no intervening operations that modify the input or output sequence.
+   *
+   * @note If @c n is greater than the size of the output sequence, the entire
+   * output sequence is moved to the input sequence and no error is issued.
+   */
+  void commit(std::size_t n)
+  {
+    n = std::min<std::size_t>(n, epptr() - pptr());
+    pbump(static_cast<int>(n));
+    setg(eback(), gptr(), pptr());
+  }
+
+  /// Remove characters from the input sequence.
+  /**
+   * Removes @c n characters from the beginning of the input sequence.
+   *
+   * @note If @c n is greater than the size of the input sequence, the entire
+   * input sequence is consumed and no error is issued.
+   */
+  void consume(std::size_t n)
+  {
+    if (egptr() < pptr())
+      setg(&buffer_[0], gptr(), pptr());
+    if (gptr() + n > pptr())
+      n = pptr() - gptr();
+    gbump(static_cast<int>(n));
+  }
+
+protected:
+  enum { buffer_delta = 128 };
+
+  /// Override std::streambuf behaviour.
+  /**
+   * Behaves according to the specification of @c std::streambuf::underflow().
+   */
+  int_type underflow()
+  {
+    if (gptr() < pptr())
+    {
+      setg(&buffer_[0], gptr(), pptr());
+      return traits_type::to_int_type(*gptr());
+    }
+    else
+    {
+      return traits_type::eof();
+    }
+  }
+
+  /// Override std::streambuf behaviour.
+  /**
+   * Behaves according to the specification of @c std::streambuf::overflow(),
+   * with the specialisation that @c std::length_error is thrown if appending
+   * the character to the input sequence would require the condition
+   * <tt>size() > max_size()</tt> to be true.
+   */
+  int_type overflow(int_type c)
+  {
+    if (!traits_type::eq_int_type(c, traits_type::eof()))
+    {
+      if (pptr() == epptr())
+      {
+        std::size_t buffer_size = pptr() - gptr();
+        if (buffer_size < max_size_ && max_size_ - buffer_size < buffer_delta)
+        {
+          reserve(max_size_ - buffer_size);
+        }
+        else
+        {
+          reserve(buffer_delta);
+        }
+      }
+
+      *pptr() = traits_type::to_char_type(c);
+      pbump(1);
+      return c;
+    }
+
+    return traits_type::not_eof(c);
+  }
+
+  void reserve(std::size_t n)
+  {
+    // Get current stream positions as offsets.
+    std::size_t gnext = gptr() - &buffer_[0];
+    std::size_t pnext = pptr() - &buffer_[0];
+    std::size_t pend = epptr() - &buffer_[0];
+
+    // Check if there is already enough space in the put area.
+    if (n <= pend - pnext)
+    {
+      return;
+    }
+
+    // Shift existing contents of get area to start of buffer.
+    if (gnext > 0)
+    {
+      pnext -= gnext;
+      std::memmove(&buffer_[0], &buffer_[0] + gnext, pnext);
+    }
+
+    // Ensure buffer is large enough to hold at least the specified size.
+    if (n > pend - pnext)
+    {
+      if (n <= max_size_ && pnext <= max_size_ - n)
+      {
+        pend = pnext + n;
+        buffer_.resize((std::max<std::size_t>)(pend, 1));
+      }
+      else
+      {
+        std::length_error ex("asio::streambuf too long");
+        asio::detail::throw_exception(ex);
+      }
+    }
+
+    // Update stream positions.
+    setg(&buffer_[0], &buffer_[0], &buffer_[0] + pnext);
+    setp(&buffer_[0] + pnext, &buffer_[0] + pend);
+  }
+
+private:
+  std::size_t max_size_;
+  std::vector<char_type, Allocator> buffer_;
+
+  // Helper function to get the preferred size for reading data.
+  friend std::size_t read_size_helper(
+      basic_streambuf& sb, std::size_t max_size)
+  {
+    return std::min<std::size_t>(
+        std::max<std::size_t>(512, sb.buffer_.capacity() - sb.size()),
+        std::min<std::size_t>(max_size, sb.max_size() - sb.size()));
+  }
+};
+
+/// Adapts basic_streambuf to the dynamic buffer sequence type requirements.
+#if defined(GENERATING_DOCUMENTATION)
+template <typename Allocator = std::allocator<char> >
+#else
+template <typename Allocator>
+#endif
+class basic_streambuf_ref
+{
+public:
+  /// The type used to represent the input sequence as a list of buffers.
+  typedef typename basic_streambuf<Allocator>::const_buffers_type
+    const_buffers_type;
+
+  /// The type used to represent the output sequence as a list of buffers.
+  typedef typename basic_streambuf<Allocator>::mutable_buffers_type
+    mutable_buffers_type;
+
+  /// Construct a basic_streambuf_ref for the given basic_streambuf object.
+  explicit basic_streambuf_ref(basic_streambuf<Allocator>& sb)
+    : sb_(sb)
+  {
+  }
+
+  /// Copy construct a basic_streambuf_ref.
+  basic_streambuf_ref(const basic_streambuf_ref& other) ASIO_NOEXCEPT
+    : sb_(other.sb_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move construct a basic_streambuf_ref.
+  basic_streambuf_ref(basic_streambuf_ref&& other) ASIO_NOEXCEPT
+    : sb_(other.sb_)
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Get the size of the input sequence.
+  std::size_t size() const ASIO_NOEXCEPT
+  {
+    return sb_.size();
+  }
+
+  /// Get the maximum size of the dynamic buffer.
+  std::size_t max_size() const ASIO_NOEXCEPT
+  {
+    return sb_.max_size();
+  }
+
+  /// Get the current capacity of the dynamic buffer.
+  std::size_t capacity() const ASIO_NOEXCEPT
+  {
+    return sb_.capacity();
+  }
+
+  /// Get a list of buffers that represents the input sequence.
+  const_buffers_type data() const ASIO_NOEXCEPT
+  {
+    return sb_.data();
+  }
+
+  /// Get a list of buffers that represents the output sequence, with the given
+  /// size.
+  mutable_buffers_type prepare(std::size_t n)
+  {
+    return sb_.prepare(n);
+  }
+
+  /// Move bytes from the output sequence to the input sequence.
+  void commit(std::size_t n)
+  {
+    return sb_.commit(n);
+  }
+
+  /// Remove characters from the input sequence.
+  void consume(std::size_t n)
+  {
+    return sb_.consume(n);
+  }
+
+private:
+  basic_streambuf<Allocator>& sb_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // ASIO_BASIC_STREAMBUF_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_streambuf_fwd.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_streambuf_fwd.hpp
new file mode 100644
index 00000000000..31a4303df6c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_streambuf_fwd.hpp
@@ -0,0 +1,36 @@
+//
+// basic_streambuf_fwd.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_STREAMBUF_FWD_HPP
+#define ASIO_BASIC_STREAMBUF_FWD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+#include <memory>
+
+namespace asio {
+
+template <typename Allocator = std::allocator<char> >
+class basic_streambuf;
+
+template <typename Allocator = std::allocator<char> >
+class basic_streambuf_ref;
+
+} // namespace asio
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // ASIO_BASIC_STREAMBUF_FWD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_waitable_timer.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_waitable_timer.hpp
new file mode 100644
index 00000000000..635b6687ffa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/basic_waitable_timer.hpp
@@ -0,0 +1,763 @@
+//
+// basic_waitable_timer.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BASIC_WAITABLE_TIMER_HPP
+#define ASIO_BASIC_WAITABLE_TIMER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/detail/chrono_time_traits.hpp"
+#include "asio/detail/deadline_timer_service.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/io_object_impl.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+#include "asio/executor.hpp"
+#include "asio/wait_traits.hpp"
+
+#if defined(ASIO_HAS_MOVE)
+# include <utility>
+#endif // defined(ASIO_HAS_MOVE)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if !defined(ASIO_BASIC_WAITABLE_TIMER_FWD_DECL)
+#define ASIO_BASIC_WAITABLE_TIMER_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Clock,
+    typename WaitTraits = asio::wait_traits<Clock>,
+    typename Executor = executor>
+class basic_waitable_timer;
+
+#endif // !defined(ASIO_BASIC_WAITABLE_TIMER_FWD_DECL)
+
+/// Provides waitable timer functionality.
+/**
+ * The basic_waitable_timer class template provides the ability to perform a
+ * blocking or asynchronous wait for a timer to expire.
+ *
+ * A waitable timer is always in one of two states: "expired" or "not expired".
+ * If the wait() or async_wait() function is called on an expired timer, the
+ * wait operation will complete immediately.
+ *
+ * Most applications will use one of the asio::steady_timer,
+ * asio::system_timer or asio::high_resolution_timer typedefs.
+ *
+ * @note This waitable timer functionality is for use with the C++11 standard
+ * library's @c &lt;chrono&gt; facility, or with the Boost.Chrono library.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Examples
+ * Performing a blocking wait (C++11):
+ * @code
+ * // Construct a timer without setting an expiry time.
+ * asio::steady_timer timer(my_context);
+ *
+ * // Set an expiry time relative to now.
+ * timer.expires_after(std::chrono::seconds(5));
+ *
+ * // Wait for the timer to expire.
+ * timer.wait();
+ * @endcode
+ *
+ * @par 
+ * Performing an asynchronous wait (C++11):
+ * @code
+ * void handler(const asio::error_code& error)
+ * {
+ *   if (!error)
+ *   {
+ *     // Timer expired.
+ *   }
+ * }
+ *
+ * ...
+ *
+ * // Construct a timer with an absolute expiry time.
+ * asio::steady_timer timer(my_context,
+ *     std::chrono::steady_clock::now() + std::chrono::seconds(60));
+ *
+ * // Start an asynchronous wait.
+ * timer.async_wait(handler);
+ * @endcode
+ *
+ * @par Changing an active waitable timer's expiry time
+ *
+ * Changing the expiry time of a timer while there are pending asynchronous
+ * waits causes those wait operations to be cancelled. To ensure that the action
+ * associated with the timer is performed only once, use something like this:
+ * used:
+ *
+ * @code
+ * void on_some_event()
+ * {
+ *   if (my_timer.expires_after(seconds(5)) > 0)
+ *   {
+ *     // We managed to cancel the timer. Start new asynchronous wait.
+ *     my_timer.async_wait(on_timeout);
+ *   }
+ *   else
+ *   {
+ *     // Too late, timer has already expired!
+ *   }
+ * }
+ *
+ * void on_timeout(const asio::error_code& e)
+ * {
+ *   if (e != asio::error::operation_aborted)
+ *   {
+ *     // Timer was not cancelled, take necessary action.
+ *   }
+ * }
+ * @endcode
+ *
+ * @li The asio::basic_waitable_timer::expires_after() function
+ * cancels any pending asynchronous waits, and returns the number of
+ * asynchronous waits that were cancelled. If it returns 0 then you were too
+ * late and the wait handler has already been executed, or will soon be
+ * executed. If it returns 1 then the wait handler was successfully cancelled.
+ *
+ * @li If a wait handler is cancelled, the asio::error_code passed to
+ * it contains the value asio::error::operation_aborted.
+ */
+template <typename Clock, typename WaitTraits, typename Executor>
+class basic_waitable_timer
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the timer type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The timer type when rebound to the specified executor.
+    typedef basic_waitable_timer<Clock, WaitTraits, Executor1> other;
+  };
+
+  /// The clock type.
+  typedef Clock clock_type;
+
+  /// The duration type of the clock.
+  typedef typename clock_type::duration duration;
+
+  /// The time point type of the clock.
+  typedef typename clock_type::time_point time_point;
+
+  /// The wait traits type.
+  typedef WaitTraits traits_type;
+
+  /// Constructor.
+  /**
+   * This constructor creates a timer without setting an expiry time. The
+   * expires_at() or expires_after() functions must be called to set an expiry
+   * time before the timer can be waited on.
+   *
+   * @param ex The I/O executor that the timer will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the timer.
+   */
+  explicit basic_waitable_timer(const executor_type& ex)
+    : impl_(ex)
+  {
+  }
+
+  /// Constructor.
+  /**
+   * This constructor creates a timer without setting an expiry time. The
+   * expires_at() or expires_after() functions must be called to set an expiry
+   * time before the timer can be waited on.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the timer will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the timer.
+   */
+  template <typename ExecutionContext>
+  explicit basic_waitable_timer(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+  }
+
+  /// Constructor to set a particular expiry time as an absolute time.
+  /**
+   * This constructor creates a timer and sets the expiry time.
+   *
+   * @param ex The I/O executor object that the timer will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the timer.
+   *
+   * @param expiry_time The expiry time to be used for the timer, expressed
+   * as an absolute time.
+   */
+  basic_waitable_timer(const executor_type& ex, const time_point& expiry_time)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().expires_at(impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_at");
+  }
+
+  /// Constructor to set a particular expiry time as an absolute time.
+  /**
+   * This constructor creates a timer and sets the expiry time.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the timer will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the timer.
+   *
+   * @param expiry_time The expiry time to be used for the timer, expressed
+   * as an absolute time.
+   */
+  template <typename ExecutionContext>
+  explicit basic_waitable_timer(ExecutionContext& context,
+      const time_point& expiry_time,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().expires_at(impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_at");
+  }
+
+  /// Constructor to set a particular expiry time relative to now.
+  /**
+   * This constructor creates a timer and sets the expiry time.
+   *
+   * @param ex The I/O executor that the timer will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the timer.
+   *
+   * @param expiry_time The expiry time to be used for the timer, relative to
+   * now.
+   */
+  basic_waitable_timer(const executor_type& ex, const duration& expiry_time)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().expires_after(
+        impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_after");
+  }
+
+  /// Constructor to set a particular expiry time relative to now.
+  /**
+   * This constructor creates a timer and sets the expiry time.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the timer will use, by default, to dispatch handlers for any asynchronous
+   * operations performed on the timer.
+   *
+   * @param expiry_time The expiry time to be used for the timer, relative to
+   * now.
+   */
+  template <typename ExecutionContext>
+  explicit basic_waitable_timer(ExecutionContext& context,
+      const duration& expiry_time,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().expires_after(
+        impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_after");
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_waitable_timer from another.
+  /**
+   * This constructor moves a timer from one object to another.
+   *
+   * @param other The other basic_waitable_timer object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_waitable_timer(const executor_type&)
+   * constructor.
+   */
+  basic_waitable_timer(basic_waitable_timer&& other)
+    : impl_(std::move(other.impl_))
+  {
+  }
+
+  /// Move-assign a basic_waitable_timer from another.
+  /**
+   * This assignment operator moves a timer from one object to another. Cancels
+   * any outstanding asynchronous operations associated with the target object.
+   *
+   * @param other The other basic_waitable_timer object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_waitable_timer(const executor_type&)
+   * constructor.
+   */
+  basic_waitable_timer& operator=(basic_waitable_timer&& other)
+  {
+    impl_ = std::move(other.impl_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destroys the timer.
+  /**
+   * This function destroys the timer, cancelling any outstanding asynchronous
+   * wait operations associated with the timer as if by calling @c cancel.
+   */
+  ~basic_waitable_timer()
+  {
+  }
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return impl_.get_executor();
+  }
+
+  /// Cancel any asynchronous operations that are waiting on the timer.
+  /**
+   * This function forces the completion of any pending asynchronous wait
+   * operations against the timer. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * Cancelling the timer does not change the expiry time.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note If the timer has already expired when cancel() is called, then the
+   * handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t cancel()
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().cancel(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "cancel");
+    return s;
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use non-error_code overload.) Cancel any asynchronous
+  /// operations that are waiting on the timer.
+  /**
+   * This function forces the completion of any pending asynchronous wait
+   * operations against the timer. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * Cancelling the timer does not change the expiry time.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @note If the timer has already expired when cancel() is called, then the
+   * handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t cancel(asio::error_code& ec)
+  {
+    return impl_.get_service().cancel(impl_.get_implementation(), ec);
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Cancels one asynchronous operation that is waiting on the timer.
+  /**
+   * This function forces the completion of one pending asynchronous wait
+   * operation against the timer. Handlers are cancelled in FIFO order. The
+   * handler for the cancelled operation will be invoked with the
+   * asio::error::operation_aborted error code.
+   *
+   * Cancelling the timer does not change the expiry time.
+   *
+   * @return The number of asynchronous operations that were cancelled. That is,
+   * either 0 or 1.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note If the timer has already expired when cancel_one() is called, then
+   * the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t cancel_one()
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().cancel_one(
+        impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "cancel_one");
+    return s;
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use non-error_code overload.) Cancels one asynchronous
+  /// operation that is waiting on the timer.
+  /**
+   * This function forces the completion of one pending asynchronous wait
+   * operation against the timer. Handlers are cancelled in FIFO order. The
+   * handler for the cancelled operation will be invoked with the
+   * asio::error::operation_aborted error code.
+   *
+   * Cancelling the timer does not change the expiry time.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of asynchronous operations that were cancelled. That is,
+   * either 0 or 1.
+   *
+   * @note If the timer has already expired when cancel_one() is called, then
+   * the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t cancel_one(asio::error_code& ec)
+  {
+    return impl_.get_service().cancel_one(impl_.get_implementation(), ec);
+  }
+
+  /// (Deprecated: Use expiry().) Get the timer's expiry time as an absolute
+  /// time.
+  /**
+   * This function may be used to obtain the timer's current expiry time.
+   * Whether the timer has expired or not does not affect this value.
+   */
+  time_point expires_at() const
+  {
+    return impl_.get_service().expires_at(impl_.get_implementation());
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Get the timer's expiry time as an absolute time.
+  /**
+   * This function may be used to obtain the timer's current expiry time.
+   * Whether the timer has expired or not does not affect this value.
+   */
+  time_point expiry() const
+  {
+    return impl_.get_service().expiry(impl_.get_implementation());
+  }
+
+  /// Set the timer's expiry time as an absolute time.
+  /**
+   * This function sets the expiry time. Any pending asynchronous wait
+   * operations will be cancelled. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note If the timer has already expired when expires_at() is called, then
+   * the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t expires_at(const time_point& expiry_time)
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().expires_at(
+        impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_at");
+    return s;
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use non-error_code overload.) Set the timer's expiry time as
+  /// an absolute time.
+  /**
+   * This function sets the expiry time. Any pending asynchronous wait
+   * operations will be cancelled. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @note If the timer has already expired when expires_at() is called, then
+   * the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t expires_at(const time_point& expiry_time,
+      asio::error_code& ec)
+  {
+    return impl_.get_service().expires_at(
+        impl_.get_implementation(), expiry_time, ec);
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Set the timer's expiry time relative to now.
+  /**
+   * This function sets the expiry time. Any pending asynchronous wait
+   * operations will be cancelled. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note If the timer has already expired when expires_after() is called,
+   * then the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t expires_after(const duration& expiry_time)
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().expires_after(
+        impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_after");
+    return s;
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use expiry().) Get the timer's expiry time relative to now.
+  /**
+   * This function may be used to obtain the timer's current expiry time.
+   * Whether the timer has expired or not does not affect this value.
+   */
+  duration expires_from_now() const
+  {
+    return impl_.get_service().expires_from_now(impl_.get_implementation());
+  }
+
+  /// (Deprecated: Use expires_after().) Set the timer's expiry time relative
+  /// to now.
+  /**
+   * This function sets the expiry time. Any pending asynchronous wait
+   * operations will be cancelled. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note If the timer has already expired when expires_from_now() is called,
+   * then the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t expires_from_now(const duration& expiry_time)
+  {
+    asio::error_code ec;
+    std::size_t s = impl_.get_service().expires_from_now(
+        impl_.get_implementation(), expiry_time, ec);
+    asio::detail::throw_error(ec, "expires_from_now");
+    return s;
+  }
+
+  /// (Deprecated: Use expires_after().) Set the timer's expiry time relative
+  /// to now.
+  /**
+   * This function sets the expiry time. Any pending asynchronous wait
+   * operations will be cancelled. The handler for each cancelled operation will
+   * be invoked with the asio::error::operation_aborted error code.
+   *
+   * @param expiry_time The expiry time to be used for the timer.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of asynchronous operations that were cancelled.
+   *
+   * @note If the timer has already expired when expires_from_now() is called,
+   * then the handlers for asynchronous wait operations will:
+   *
+   * @li have already been invoked; or
+   *
+   * @li have been queued for invocation in the near future.
+   *
+   * These handlers can no longer be cancelled, and therefore are passed an
+   * error code that indicates the successful completion of the wait operation.
+   */
+  std::size_t expires_from_now(const duration& expiry_time,
+      asio::error_code& ec)
+  {
+    return impl_.get_service().expires_from_now(
+        impl_.get_implementation(), expiry_time, ec);
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Perform a blocking wait on the timer.
+  /**
+   * This function is used to wait for the timer to expire. This function
+   * blocks and does not return until the timer has expired.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void wait()
+  {
+    asio::error_code ec;
+    impl_.get_service().wait(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "wait");
+  }
+
+  /// Perform a blocking wait on the timer.
+  /**
+   * This function is used to wait for the timer to expire. This function
+   * blocks and does not return until the timer has expired.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  void wait(asio::error_code& ec)
+  {
+    impl_.get_service().wait(impl_.get_implementation(), ec);
+  }
+
+  /// Start an asynchronous wait on the timer.
+  /**
+   * This function may be used to initiate an asynchronous wait against the
+   * timer. It always returns immediately.
+   *
+   * For each call to async_wait(), the supplied handler will be called exactly
+   * once. The handler will be called when:
+   *
+   * @li The timer has expired.
+   *
+   * @li The timer was cancelled, in which case the handler is passed the error
+   * code asio::error::operation_aborted.
+   *
+   * @param handler The handler to be called when the timer expires. Copies
+   * will be made of the handler as required. The function signature of the
+   * handler must be:
+   * @code void handler(
+   *   const asio::error_code& error // Result of operation.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code))
+        WaitHandler ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WaitHandler,
+      void (asio::error_code))
+  async_wait(
+      ASIO_MOVE_ARG(WaitHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WaitHandler, void (asio::error_code)>(
+        initiate_async_wait(this), handler);
+  }
+
+private:
+  // Disallow copying and assignment.
+  basic_waitable_timer(const basic_waitable_timer&) ASIO_DELETED;
+  basic_waitable_timer& operator=(
+      const basic_waitable_timer&) ASIO_DELETED;
+
+  class initiate_async_wait
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_wait(basic_waitable_timer* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WaitHandler>
+    void operator()(ASIO_MOVE_ARG(WaitHandler) handler) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WaitHandler.
+      ASIO_WAIT_HANDLER_CHECK(WaitHandler, handler) type_check;
+
+      detail::non_const_lvalue<WaitHandler> handler2(handler);
+      self_->impl_.get_service().async_wait(
+          self_->impl_.get_implementation(), handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_waitable_timer* self_;
+  };
+
+  detail::io_object_impl<
+    detail::deadline_timer_service<
+      detail::chrono_time_traits<Clock, WaitTraits> >,
+    executor_type > impl_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BASIC_WAITABLE_TIMER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/bind_executor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/bind_executor.hpp
new file mode 100644
index 00000000000..fbcf6588df9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/bind_executor.hpp
@@ -0,0 +1,580 @@
+//
+// bind_executor.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BIND_EXECUTOR_HPP
+#define ASIO_BIND_EXECUTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/detail/variadic_templates.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/associated_allocator.hpp"
+#include "asio/async_result.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/is_executor.hpp"
+#include "asio/uses_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+struct executor_binder_check
+{
+  typedef void type;
+};
+
+// Helper to automatically define nested typedef result_type.
+
+template <typename T, typename = void>
+struct executor_binder_result_type
+{
+protected:
+  typedef void result_type_or_void;
+};
+
+template <typename T>
+struct executor_binder_result_type<T,
+  typename executor_binder_check<typename T::result_type>::type>
+{
+  typedef typename T::result_type result_type;
+protected:
+  typedef result_type result_type_or_void;
+};
+
+template <typename R>
+struct executor_binder_result_type<R(*)()>
+{
+  typedef R result_type;
+protected:
+  typedef result_type result_type_or_void;
+};
+
+template <typename R>
+struct executor_binder_result_type<R(&)()>
+{
+  typedef R result_type;
+protected:
+  typedef result_type result_type_or_void;
+};
+
+template <typename R, typename A1>
+struct executor_binder_result_type<R(*)(A1)>
+{
+  typedef R result_type;
+protected:
+  typedef result_type result_type_or_void;
+};
+
+template <typename R, typename A1>
+struct executor_binder_result_type<R(&)(A1)>
+{
+  typedef R result_type;
+protected:
+  typedef result_type result_type_or_void;
+};
+
+template <typename R, typename A1, typename A2>
+struct executor_binder_result_type<R(*)(A1, A2)>
+{
+  typedef R result_type;
+protected:
+  typedef result_type result_type_or_void;
+};
+
+template <typename R, typename A1, typename A2>
+struct executor_binder_result_type<R(&)(A1, A2)>
+{
+  typedef R result_type;
+protected:
+  typedef result_type result_type_or_void;
+};
+
+// Helper to automatically define nested typedef argument_type.
+
+template <typename T, typename = void>
+struct executor_binder_argument_type {};
+
+template <typename T>
+struct executor_binder_argument_type<T,
+  typename executor_binder_check<typename T::argument_type>::type>
+{
+  typedef typename T::argument_type argument_type;
+};
+
+template <typename R, typename A1>
+struct executor_binder_argument_type<R(*)(A1)>
+{
+  typedef A1 argument_type;
+};
+
+template <typename R, typename A1>
+struct executor_binder_argument_type<R(&)(A1)>
+{
+  typedef A1 argument_type;
+};
+
+// Helper to automatically define nested typedefs first_argument_type and
+// second_argument_type.
+
+template <typename T, typename = void>
+struct executor_binder_argument_types {};
+
+template <typename T>
+struct executor_binder_argument_types<T,
+  typename executor_binder_check<typename T::first_argument_type>::type>
+{
+  typedef typename T::first_argument_type first_argument_type;
+  typedef typename T::second_argument_type second_argument_type;
+};
+
+template <typename R, typename A1, typename A2>
+struct executor_binder_argument_type<R(*)(A1, A2)>
+{
+  typedef A1 first_argument_type;
+  typedef A2 second_argument_type;
+};
+
+template <typename R, typename A1, typename A2>
+struct executor_binder_argument_type<R(&)(A1, A2)>
+{
+  typedef A1 first_argument_type;
+  typedef A2 second_argument_type;
+};
+
+// Helper to:
+// - Apply the empty base optimisation to the executor.
+// - Perform uses_executor construction of the target type, if required.
+
+template <typename T, typename Executor, bool UsesExecutor>
+class executor_binder_base;
+
+template <typename T, typename Executor>
+class executor_binder_base<T, Executor, true>
+  : protected Executor
+{
+protected:
+  template <typename E, typename U>
+  executor_binder_base(ASIO_MOVE_ARG(E) e, ASIO_MOVE_ARG(U) u)
+    : executor_(ASIO_MOVE_CAST(E)(e)),
+      target_(executor_arg_t(), executor_, ASIO_MOVE_CAST(U)(u))
+  {
+  }
+
+  Executor executor_;
+  T target_;
+};
+
+template <typename T, typename Executor>
+class executor_binder_base<T, Executor, false>
+{
+protected:
+  template <typename E, typename U>
+  executor_binder_base(ASIO_MOVE_ARG(E) e, ASIO_MOVE_ARG(U) u)
+    : executor_(ASIO_MOVE_CAST(E)(e)),
+      target_(ASIO_MOVE_CAST(U)(u))
+  {
+  }
+
+  Executor executor_;
+  T target_;
+};
+
+// Helper to enable SFINAE on zero-argument operator() below.
+
+template <typename T, typename = void>
+struct executor_binder_result_of0
+{
+  typedef void type;
+};
+
+template <typename T>
+struct executor_binder_result_of0<T,
+  typename executor_binder_check<typename result_of<T()>::type>::type>
+{
+  typedef typename result_of<T()>::type type;
+};
+
+} // namespace detail
+
+/// A call wrapper type to bind an executor of type @c Executor to an object of
+/// type @c T.
+template <typename T, typename Executor>
+class executor_binder
+#if !defined(GENERATING_DOCUMENTATION)
+  : public detail::executor_binder_result_type<T>,
+    public detail::executor_binder_argument_type<T>,
+    public detail::executor_binder_argument_types<T>,
+    private detail::executor_binder_base<
+      T, Executor, uses_executor<T, Executor>::value>
+#endif // !defined(GENERATING_DOCUMENTATION)
+{
+public:
+  /// The type of the target object.
+  typedef T target_type;
+
+  /// The type of the associated executor.
+  typedef Executor executor_type;
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// The return type if a function.
+  /**
+   * The type of @c result_type is based on the type @c T of the wrapper's
+   * target object:
+   *
+   * @li if @c T is a pointer to function type, @c result_type is a synonym for
+   * the return type of @c T;
+   *
+   * @li if @c T is a class type with a member type @c result_type, then @c
+   * result_type is a synonym for @c T::result_type;
+   *
+   * @li otherwise @c result_type is not defined.
+   */
+  typedef see_below result_type;
+
+  /// The type of the function's argument.
+  /**
+   * The type of @c argument_type is based on the type @c T of the wrapper's
+   * target object:
+   *
+   * @li if @c T is a pointer to a function type accepting a single argument,
+   * @c argument_type is a synonym for the return type of @c T;
+   *
+   * @li if @c T is a class type with a member type @c argument_type, then @c
+   * argument_type is a synonym for @c T::argument_type;
+   *
+   * @li otherwise @c argument_type is not defined.
+   */
+  typedef see_below argument_type;
+
+  /// The type of the function's first argument.
+  /**
+   * The type of @c first_argument_type is based on the type @c T of the
+   * wrapper's target object:
+   *
+   * @li if @c T is a pointer to a function type accepting two arguments, @c
+   * first_argument_type is a synonym for the return type of @c T;
+   *
+   * @li if @c T is a class type with a member type @c first_argument_type,
+   * then @c first_argument_type is a synonym for @c T::first_argument_type;
+   *
+   * @li otherwise @c first_argument_type is not defined.
+   */
+  typedef see_below first_argument_type;
+
+  /// The type of the function's second argument.
+  /**
+   * The type of @c second_argument_type is based on the type @c T of the
+   * wrapper's target object:
+   *
+   * @li if @c T is a pointer to a function type accepting two arguments, @c
+   * second_argument_type is a synonym for the return type of @c T;
+   *
+   * @li if @c T is a class type with a member type @c first_argument_type,
+   * then @c second_argument_type is a synonym for @c T::second_argument_type;
+   *
+   * @li otherwise @c second_argument_type is not defined.
+   */
+  typedef see_below second_argument_type;
+#endif // defined(GENERATING_DOCUMENTATION)
+
+  /// Construct an executor wrapper for the specified object.
+  /**
+   * This constructor is only valid if the type @c T is constructible from type
+   * @c U.
+   */
+  template <typename U>
+  executor_binder(executor_arg_t, const executor_type& e,
+      ASIO_MOVE_ARG(U) u)
+    : base_type(e, ASIO_MOVE_CAST(U)(u))
+  {
+  }
+
+  /// Copy constructor.
+  executor_binder(const executor_binder& other)
+    : base_type(other.get_executor(), other.get())
+  {
+  }
+
+  /// Construct a copy, but specify a different executor.
+  executor_binder(executor_arg_t, const executor_type& e,
+      const executor_binder& other)
+    : base_type(e, other.get())
+  {
+  }
+
+  /// Construct a copy of a different executor wrapper type.
+  /**
+   * This constructor is only valid if the @c Executor type is constructible
+   * from type @c OtherExecutor, and the type @c T is constructible from type
+   * @c U.
+   */
+  template <typename U, typename OtherExecutor>
+  executor_binder(const executor_binder<U, OtherExecutor>& other)
+    : base_type(other.get_executor(), other.get())
+  {
+  }
+
+  /// Construct a copy of a different executor wrapper type, but specify a
+  /// different executor.
+  /**
+   * This constructor is only valid if the type @c T is constructible from type
+   * @c U.
+   */
+  template <typename U, typename OtherExecutor>
+  executor_binder(executor_arg_t, const executor_type& e,
+      const executor_binder<U, OtherExecutor>& other)
+    : base_type(e, other.get())
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Move constructor.
+  executor_binder(executor_binder&& other)
+    : base_type(ASIO_MOVE_CAST(executor_type)(other.get_executor()),
+        ASIO_MOVE_CAST(T)(other.get()))
+  {
+  }
+
+  /// Move construct the target object, but specify a different executor.
+  executor_binder(executor_arg_t, const executor_type& e,
+      executor_binder&& other)
+    : base_type(e, ASIO_MOVE_CAST(T)(other.get()))
+  {
+  }
+
+  /// Move construct from a different executor wrapper type.
+  template <typename U, typename OtherExecutor>
+  executor_binder(executor_binder<U, OtherExecutor>&& other)
+    : base_type(ASIO_MOVE_CAST(OtherExecutor)(other.get_executor()),
+        ASIO_MOVE_CAST(U)(other.get()))
+  {
+  }
+
+  /// Move construct from a different executor wrapper type, but specify a
+  /// different executor.
+  template <typename U, typename OtherExecutor>
+  executor_binder(executor_arg_t, const executor_type& e,
+      executor_binder<U, OtherExecutor>&& other)
+    : base_type(e, ASIO_MOVE_CAST(U)(other.get()))
+  {
+  }
+
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destructor.
+  ~executor_binder()
+  {
+  }
+
+  /// Obtain a reference to the target object.
+  target_type& get() ASIO_NOEXCEPT
+  {
+    return this->target_;
+  }
+
+  /// Obtain a reference to the target object.
+  const target_type& get() const ASIO_NOEXCEPT
+  {
+    return this->target_;
+  }
+
+  /// Obtain the associated executor.
+  executor_type get_executor() const ASIO_NOEXCEPT
+  {
+    return this->executor_;
+  }
+
+#if defined(GENERATING_DOCUMENTATION)
+
+  template <typename... Args> auto operator()(Args&& ...);
+  template <typename... Args> auto operator()(Args&& ...) const;
+
+#elif defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  /// Forwarding function call operator.
+  template <typename... Args>
+  typename result_of<T(Args...)>::type operator()(
+      ASIO_MOVE_ARG(Args)... args)
+  {
+    return this->target_(ASIO_MOVE_CAST(Args)(args)...);
+  }
+
+  /// Forwarding function call operator.
+  template <typename... Args>
+  typename result_of<T(Args...)>::type operator()(
+      ASIO_MOVE_ARG(Args)... args) const
+  {
+    return this->target_(ASIO_MOVE_CAST(Args)(args)...);
+  }
+
+#elif defined(ASIO_HAS_STD_TYPE_TRAITS) && !defined(_MSC_VER)
+
+  typename detail::executor_binder_result_of0<T>::type operator()()
+  {
+    return this->target_();
+  }
+
+  typename detail::executor_binder_result_of0<T>::type operator()() const
+  {
+    return this->target_();
+  }
+
+#define ASIO_PRIVATE_BIND_EXECUTOR_CALL_DEF(n) \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  typename result_of<T(ASIO_VARIADIC_TARGS(n))>::type operator()( \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    return this->target_(ASIO_VARIADIC_MOVE_ARGS(n)); \
+  } \
+  \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  typename result_of<T(ASIO_VARIADIC_TARGS(n))>::type operator()( \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) const \
+  { \
+    return this->target_(ASIO_VARIADIC_MOVE_ARGS(n)); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_BIND_EXECUTOR_CALL_DEF)
+#undef ASIO_PRIVATE_BIND_EXECUTOR_CALL_DEF
+
+#else // defined(ASIO_HAS_STD_TYPE_TRAITS) && !defined(_MSC_VER)
+
+  typedef typename detail::executor_binder_result_type<T>::result_type_or_void
+    result_type_or_void;
+
+  result_type_or_void operator()()
+  {
+    return this->target_();
+  }
+
+  result_type_or_void operator()() const
+  {
+    return this->target_();
+  }
+
+#define ASIO_PRIVATE_BIND_EXECUTOR_CALL_DEF(n) \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  result_type_or_void operator()( \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    return this->target_(ASIO_VARIADIC_MOVE_ARGS(n)); \
+  } \
+  \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  result_type_or_void operator()( \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) const \
+  { \
+    return this->target_(ASIO_VARIADIC_MOVE_ARGS(n)); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_BIND_EXECUTOR_CALL_DEF)
+#undef ASIO_PRIVATE_BIND_EXECUTOR_CALL_DEF
+
+#endif // defined(ASIO_HAS_STD_TYPE_TRAITS) && !defined(_MSC_VER)
+
+private:
+  typedef detail::executor_binder_base<T, Executor,
+    uses_executor<T, Executor>::value> base_type;
+};
+
+/// Associate an object of type @c T with an executor of type @c Executor.
+template <typename Executor, typename T>
+inline executor_binder<typename decay<T>::type, Executor>
+bind_executor(const Executor& ex, ASIO_MOVE_ARG(T) t,
+    typename enable_if<is_executor<Executor>::value>::type* = 0)
+{
+  return executor_binder<typename decay<T>::type, Executor>(
+      executor_arg_t(), ex, ASIO_MOVE_CAST(T)(t));
+}
+
+/// Associate an object of type @c T with an execution context's executor.
+template <typename ExecutionContext, typename T>
+inline executor_binder<typename decay<T>::type,
+  typename ExecutionContext::executor_type>
+bind_executor(ExecutionContext& ctx, ASIO_MOVE_ARG(T) t,
+    typename enable_if<is_convertible<
+      ExecutionContext&, execution_context&>::value>::type* = 0)
+{
+  return executor_binder<typename decay<T>::type,
+    typename ExecutionContext::executor_type>(
+      executor_arg_t(), ctx.get_executor(), ASIO_MOVE_CAST(T)(t));
+}
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename T, typename Executor>
+struct uses_executor<executor_binder<T, Executor>, Executor>
+  : true_type {};
+
+template <typename T, typename Executor, typename Signature>
+class async_result<executor_binder<T, Executor>, Signature>
+{
+public:
+  typedef executor_binder<
+    typename async_result<T, Signature>::completion_handler_type, Executor>
+      completion_handler_type;
+
+  typedef typename async_result<T, Signature>::return_type return_type;
+
+  explicit async_result(executor_binder<T, Executor>& b)
+    : target_(b.get())
+  {
+  }
+
+  return_type get()
+  {
+    return target_.get();
+  }
+
+private:
+  async_result(const async_result&) ASIO_DELETED;
+  async_result& operator=(const async_result&) ASIO_DELETED;
+
+  async_result<T, Signature> target_;
+};
+
+template <typename T, typename Executor, typename Allocator>
+struct associated_allocator<executor_binder<T, Executor>, Allocator>
+{
+  typedef typename associated_allocator<T, Allocator>::type type;
+
+  static type get(const executor_binder<T, Executor>& b,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<T, Allocator>::get(b.get(), a);
+  }
+};
+
+template <typename T, typename Executor, typename Executor1>
+struct associated_executor<executor_binder<T, Executor>, Executor1>
+{
+  typedef Executor type;
+
+  static type get(const executor_binder<T, Executor>& b,
+      const Executor1& = Executor1()) ASIO_NOEXCEPT
+  {
+    return b.get_executor();
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BIND_EXECUTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffer.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffer.hpp
new file mode 100644
index 00000000000..b8a36750385
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffer.hpp
@@ -0,0 +1,2494 @@
+//
+// buffer.hpp
+// ~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BUFFER_HPP
+#define ASIO_BUFFER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include <cstring>
+#include <limits>
+#include <stdexcept>
+#include <string>
+#include <vector>
+#include "asio/detail/array_fwd.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/string_view.hpp"
+#include "asio/detail/throw_exception.hpp"
+#include "asio/detail/type_traits.hpp"
+
+#if defined(ASIO_MSVC) && (ASIO_MSVC >= 1700)
+# if defined(_HAS_ITERATOR_DEBUGGING) && (_HAS_ITERATOR_DEBUGGING != 0)
+#  if !defined(ASIO_DISABLE_BUFFER_DEBUGGING)
+#   define ASIO_ENABLE_BUFFER_DEBUGGING
+#  endif // !defined(ASIO_DISABLE_BUFFER_DEBUGGING)
+# endif // defined(_HAS_ITERATOR_DEBUGGING)
+#endif // defined(ASIO_MSVC) && (ASIO_MSVC >= 1700)
+
+#if defined(__GNUC__)
+# if defined(_GLIBCXX_DEBUG)
+#  if !defined(ASIO_DISABLE_BUFFER_DEBUGGING)
+#   define ASIO_ENABLE_BUFFER_DEBUGGING
+#  endif // !defined(ASIO_DISABLE_BUFFER_DEBUGGING)
+# endif // defined(_GLIBCXX_DEBUG)
+#endif // defined(__GNUC__)
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+# include "asio/detail/functional.hpp"
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+
+#if defined(ASIO_HAS_BOOST_WORKAROUND)
+# include <boost/detail/workaround.hpp>
+# if BOOST_WORKAROUND(__BORLANDC__, BOOST_TESTED_AT(0x582)) \
+    || BOOST_WORKAROUND(__SUNPRO_CC, BOOST_TESTED_AT(0x590))
+#  define ASIO_ENABLE_ARRAY_BUFFER_WORKAROUND
+# endif // BOOST_WORKAROUND(__BORLANDC__, BOOST_TESTED_AT(0x582))
+        // || BOOST_WORKAROUND(__SUNPRO_CC, BOOST_TESTED_AT(0x590))
+#endif // defined(ASIO_HAS_BOOST_WORKAROUND)
+
+#if defined(ASIO_ENABLE_ARRAY_BUFFER_WORKAROUND)
+# include "asio/detail/type_traits.hpp"
+#endif // defined(ASIO_ENABLE_ARRAY_BUFFER_WORKAROUND)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+class mutable_buffer;
+class const_buffer;
+
+/// Holds a buffer that can be modified.
+/**
+ * The mutable_buffer class provides a safe representation of a buffer that can
+ * be modified. It does not own the underlying data, and so is cheap to copy or
+ * assign.
+ *
+ * @par Accessing Buffer Contents
+ *
+ * The contents of a buffer may be accessed using the @c data() and @c size()
+ * member functions:
+ *
+ * @code asio::mutable_buffer b1 = ...;
+ * std::size_t s1 = b1.size();
+ * unsigned char* p1 = static_cast<unsigned char*>(b1.data());
+ * @endcode
+ *
+ * The @c data() member function permits violations of type safety, so uses of
+ * it in application code should be carefully considered.
+ */
+class mutable_buffer
+{
+public:
+  /// Construct an empty buffer.
+  mutable_buffer() ASIO_NOEXCEPT
+    : data_(0),
+      size_(0)
+  {
+  }
+
+  /// Construct a buffer to represent a given memory range.
+  mutable_buffer(void* data, std::size_t size) ASIO_NOEXCEPT
+    : data_(data),
+      size_(size)
+  {
+  }
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+  mutable_buffer(void* data, std::size_t size,
+      asio::detail::function<void()> debug_check)
+    : data_(data),
+      size_(size),
+      debug_check_(debug_check)
+  {
+  }
+
+  const asio::detail::function<void()>& get_debug_check() const
+  {
+    return debug_check_;
+  }
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+
+  /// Get a pointer to the beginning of the memory range.
+  void* data() const ASIO_NOEXCEPT
+  {
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+    if (size_ && debug_check_)
+      debug_check_();
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+    return data_;
+  }
+
+  /// Get the size of the memory range.
+  std::size_t size() const ASIO_NOEXCEPT
+  {
+    return size_;
+  }
+
+  /// Move the start of the buffer by the specified number of bytes.
+  mutable_buffer& operator+=(std::size_t n) ASIO_NOEXCEPT
+  {
+    std::size_t offset = n < size_ ? n : size_;
+    data_ = static_cast<char*>(data_) + offset;
+    size_ -= offset;
+    return *this;
+  }
+
+private:
+  void* data_;
+  std::size_t size_;
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+  asio::detail::function<void()> debug_check_;
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+};
+
+#if !defined(ASIO_NO_DEPRECATED)
+
+/// (Deprecated: Use mutable_buffer.) Adapts a single modifiable buffer so that
+/// it meets the requirements of the MutableBufferSequence concept.
+class mutable_buffers_1
+  : public mutable_buffer
+{
+public:
+  /// The type for each element in the list of buffers.
+  typedef mutable_buffer value_type;
+
+  /// A random-access iterator type that may be used to read elements.
+  typedef const mutable_buffer* const_iterator;
+
+  /// Construct to represent a given memory range.
+  mutable_buffers_1(void* data, std::size_t size) ASIO_NOEXCEPT
+    : mutable_buffer(data, size)
+  {
+  }
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+  mutable_buffers_1(void* data, std::size_t size,
+      asio::detail::function<void()> debug_check)
+    : mutable_buffer(data, size, debug_check)
+  {
+  }
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+
+  /// Construct to represent a single modifiable buffer.
+  explicit mutable_buffers_1(const mutable_buffer& b) ASIO_NOEXCEPT
+    : mutable_buffer(b)
+  {
+  }
+
+  /// Get a random-access iterator to the first element.
+  const_iterator begin() const ASIO_NOEXCEPT
+  {
+    return this;
+  }
+
+  /// Get a random-access iterator for one past the last element.
+  const_iterator end() const ASIO_NOEXCEPT
+  {
+    return begin() + 1;
+  }
+};
+
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+/// Holds a buffer that cannot be modified.
+/**
+ * The const_buffer class provides a safe representation of a buffer that cannot
+ * be modified. It does not own the underlying data, and so is cheap to copy or
+ * assign.
+ *
+ * @par Accessing Buffer Contents
+ *
+ * The contents of a buffer may be accessed using the @c data() and @c size()
+ * member functions:
+ *
+ * @code asio::const_buffer b1 = ...;
+ * std::size_t s1 = b1.size();
+ * const unsigned char* p1 = static_cast<const unsigned char*>(b1.data());
+ * @endcode
+ *
+ * The @c data() member function permits violations of type safety, so uses of
+ * it in application code should be carefully considered.
+ */
+class const_buffer
+{
+public:
+  /// Construct an empty buffer.
+  const_buffer() ASIO_NOEXCEPT
+    : data_(0),
+      size_(0)
+  {
+  }
+
+  /// Construct a buffer to represent a given memory range.
+  const_buffer(const void* data, std::size_t size) ASIO_NOEXCEPT
+    : data_(data),
+      size_(size)
+  {
+  }
+
+  /// Construct a non-modifiable buffer from a modifiable one.
+  const_buffer(const mutable_buffer& b) ASIO_NOEXCEPT
+    : data_(b.data()),
+      size_(b.size())
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , debug_check_(b.get_debug_check())
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+  {
+  }
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+  const_buffer(const void* data, std::size_t size,
+      asio::detail::function<void()> debug_check)
+    : data_(data),
+      size_(size),
+      debug_check_(debug_check)
+  {
+  }
+
+  const asio::detail::function<void()>& get_debug_check() const
+  {
+    return debug_check_;
+  }
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+
+  /// Get a pointer to the beginning of the memory range.
+  const void* data() const ASIO_NOEXCEPT
+  {
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+    if (size_ && debug_check_)
+      debug_check_();
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+    return data_;
+  }
+
+  /// Get the size of the memory range.
+  std::size_t size() const ASIO_NOEXCEPT
+  {
+    return size_;
+  }
+
+  /// Move the start of the buffer by the specified number of bytes.
+  const_buffer& operator+=(std::size_t n) ASIO_NOEXCEPT
+  {
+    std::size_t offset = n < size_ ? n : size_;
+    data_ = static_cast<const char*>(data_) + offset;
+    size_ -= offset;
+    return *this;
+  }
+
+private:
+  const void* data_;
+  std::size_t size_;
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+  asio::detail::function<void()> debug_check_;
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+};
+
+#if !defined(ASIO_NO_DEPRECATED)
+
+/// (Deprecated: Use const_buffer.) Adapts a single non-modifiable buffer so
+/// that it meets the requirements of the ConstBufferSequence concept.
+class const_buffers_1
+  : public const_buffer
+{
+public:
+  /// The type for each element in the list of buffers.
+  typedef const_buffer value_type;
+
+  /// A random-access iterator type that may be used to read elements.
+  typedef const const_buffer* const_iterator;
+
+  /// Construct to represent a given memory range.
+  const_buffers_1(const void* data, std::size_t size) ASIO_NOEXCEPT
+    : const_buffer(data, size)
+  {
+  }
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+  const_buffers_1(const void* data, std::size_t size,
+      asio::detail::function<void()> debug_check)
+    : const_buffer(data, size, debug_check)
+  {
+  }
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+
+  /// Construct to represent a single non-modifiable buffer.
+  explicit const_buffers_1(const const_buffer& b) ASIO_NOEXCEPT
+    : const_buffer(b)
+  {
+  }
+
+  /// Get a random-access iterator to the first element.
+  const_iterator begin() const ASIO_NOEXCEPT
+  {
+    return this;
+  }
+
+  /// Get a random-access iterator for one past the last element.
+  const_iterator end() const ASIO_NOEXCEPT
+  {
+    return begin() + 1;
+  }
+};
+
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+/// (Deprecated: Use the socket/descriptor wait() and async_wait() member
+/// functions.) An implementation of both the ConstBufferSequence and
+/// MutableBufferSequence concepts to represent a null buffer sequence.
+class null_buffers
+{
+public:
+  /// The type for each element in the list of buffers.
+  typedef mutable_buffer value_type;
+
+  /// A random-access iterator type that may be used to read elements.
+  typedef const mutable_buffer* const_iterator;
+
+  /// Get a random-access iterator to the first element.
+  const_iterator begin() const ASIO_NOEXCEPT
+  {
+    return &buf_;
+  }
+
+  /// Get a random-access iterator for one past the last element.
+  const_iterator end() const ASIO_NOEXCEPT
+  {
+    return &buf_;
+  }
+
+private:
+  mutable_buffer buf_;
+};
+
+/** @defgroup buffer_sequence_begin asio::buffer_sequence_begin
+ *
+ * @brief The asio::buffer_sequence_begin function returns an iterator
+ * pointing to the first element in a buffer sequence.
+ */
+/*@{*/
+
+/// Get an iterator to the first element in a buffer sequence.
+template <typename MutableBuffer>
+inline const mutable_buffer* buffer_sequence_begin(const MutableBuffer& b,
+    typename enable_if<
+      is_convertible<const MutableBuffer*, const mutable_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT
+{
+  return static_cast<const mutable_buffer*>(detail::addressof(b));
+}
+
+/// Get an iterator to the first element in a buffer sequence.
+template <typename ConstBuffer>
+inline const const_buffer* buffer_sequence_begin(const ConstBuffer& b,
+    typename enable_if<
+      is_convertible<const ConstBuffer*, const const_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT
+{
+  return static_cast<const const_buffer*>(detail::addressof(b));
+}
+
+#if defined(ASIO_HAS_DECLTYPE) || defined(GENERATING_DOCUMENTATION)
+
+/// Get an iterator to the first element in a buffer sequence.
+template <typename C>
+inline auto buffer_sequence_begin(C& c,
+    typename enable_if<
+      !is_convertible<const C*, const mutable_buffer*>::value
+        && !is_convertible<const C*, const const_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT -> decltype(c.begin())
+{
+  return c.begin();
+}
+
+/// Get an iterator to the first element in a buffer sequence.
+template <typename C>
+inline auto buffer_sequence_begin(const C& c,
+    typename enable_if<
+      !is_convertible<const C*, const mutable_buffer*>::value
+        && !is_convertible<const C*, const const_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT -> decltype(c.begin())
+{
+  return c.begin();
+}
+
+#else // defined(ASIO_HAS_DECLTYPE) || defined(GENERATING_DOCUMENTATION)
+
+template <typename C>
+inline typename C::iterator buffer_sequence_begin(C& c,
+    typename enable_if<
+      !is_convertible<const C*, const mutable_buffer*>::value
+        && !is_convertible<const C*, const const_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT
+{
+  return c.begin();
+}
+
+template <typename C>
+inline typename C::const_iterator buffer_sequence_begin(const C& c,
+    typename enable_if<
+      !is_convertible<const C*, const mutable_buffer*>::value
+        && !is_convertible<const C*, const const_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT
+{
+  return c.begin();
+}
+
+#endif // defined(ASIO_HAS_DECLTYPE) || defined(GENERATING_DOCUMENTATION)
+
+/*@}*/
+
+/** @defgroup buffer_sequence_end asio::buffer_sequence_end
+ *
+ * @brief The asio::buffer_sequence_end function returns an iterator
+ * pointing to one past the end element in a buffer sequence.
+ */
+/*@{*/
+
+/// Get an iterator to one past the end element in a buffer sequence.
+template <typename MutableBuffer>
+inline const mutable_buffer* buffer_sequence_end(const MutableBuffer& b,
+    typename enable_if<
+      is_convertible<const MutableBuffer*, const mutable_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT
+{
+  return static_cast<const mutable_buffer*>(detail::addressof(b)) + 1;
+}
+
+/// Get an iterator to one past the end element in a buffer sequence.
+template <typename ConstBuffer>
+inline const const_buffer* buffer_sequence_end(const ConstBuffer& b,
+    typename enable_if<
+      is_convertible<const ConstBuffer*, const const_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT
+{
+  return static_cast<const const_buffer*>(detail::addressof(b)) + 1;
+}
+
+#if defined(ASIO_HAS_DECLTYPE) || defined(GENERATING_DOCUMENTATION)
+
+/// Get an iterator to one past the end element in a buffer sequence.
+template <typename C>
+inline auto buffer_sequence_end(C& c,
+    typename enable_if<
+      !is_convertible<const C*, const mutable_buffer*>::value
+        && !is_convertible<const C*, const const_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT -> decltype(c.end())
+{
+  return c.end();
+}
+
+/// Get an iterator to one past the end element in a buffer sequence.
+template <typename C>
+inline auto buffer_sequence_end(const C& c,
+    typename enable_if<
+      !is_convertible<const C*, const mutable_buffer*>::value
+        && !is_convertible<const C*, const const_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT -> decltype(c.end())
+{
+  return c.end();
+}
+
+#else // defined(ASIO_HAS_DECLTYPE) || defined(GENERATING_DOCUMENTATION)
+
+template <typename C>
+inline typename C::iterator buffer_sequence_end(C& c,
+    typename enable_if<
+      !is_convertible<const C*, const mutable_buffer*>::value
+        && !is_convertible<const C*, const const_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT
+{
+  return c.end();
+}
+
+template <typename C>
+inline typename C::const_iterator buffer_sequence_end(const C& c,
+    typename enable_if<
+      !is_convertible<const C*, const mutable_buffer*>::value
+        && !is_convertible<const C*, const const_buffer*>::value
+    >::type* = 0) ASIO_NOEXCEPT
+{
+  return c.end();
+}
+
+#endif // defined(ASIO_HAS_DECLTYPE) || defined(GENERATING_DOCUMENTATION)
+
+/*@}*/
+
+namespace detail {
+
+// Tag types used to select appropriately optimised overloads.
+struct one_buffer {};
+struct multiple_buffers {};
+
+// Helper trait to detect single buffers.
+template <typename BufferSequence>
+struct buffer_sequence_cardinality :
+  conditional<
+    is_same<BufferSequence, mutable_buffer>::value
+#if !defined(ASIO_NO_DEPRECATED)
+      || is_same<BufferSequence, mutable_buffers_1>::value
+      || is_same<BufferSequence, const_buffers_1>::value
+#endif // !defined(ASIO_NO_DEPRECATED)
+      || is_same<BufferSequence, const_buffer>::value,
+    one_buffer, multiple_buffers>::type {};
+
+template <typename Iterator>
+inline std::size_t buffer_size(one_buffer,
+    Iterator begin, Iterator) ASIO_NOEXCEPT
+{
+  return const_buffer(*begin).size();
+}
+
+template <typename Iterator>
+inline std::size_t buffer_size(multiple_buffers,
+    Iterator begin, Iterator end) ASIO_NOEXCEPT
+{
+  std::size_t total_buffer_size = 0;
+
+  Iterator iter = begin;
+  for (; iter != end; ++iter)
+  {
+    const_buffer b(*iter);
+    total_buffer_size += b.size();
+  }
+
+  return total_buffer_size;
+}
+
+} // namespace detail
+
+/// Get the total number of bytes in a buffer sequence.
+/**
+ * The @c buffer_size function determines the total size of all buffers in the
+ * buffer sequence, as if computed as follows:
+ *
+ * @code size_t total_size = 0;
+ * auto i = asio::buffer_sequence_begin(buffers);
+ * auto end = asio::buffer_sequence_end(buffers);
+ * for (; i != end; ++i)
+ * {
+ *   const_buffer b(*i);
+ *   total_size += b.size();
+ * }
+ * return total_size; @endcode
+ *
+ * The @c BufferSequence template parameter may meet either of the @c
+ * ConstBufferSequence or @c MutableBufferSequence type requirements.
+ */
+template <typename BufferSequence>
+inline std::size_t buffer_size(const BufferSequence& b) ASIO_NOEXCEPT
+{
+  return detail::buffer_size(
+      detail::buffer_sequence_cardinality<BufferSequence>(),
+      asio::buffer_sequence_begin(b),
+      asio::buffer_sequence_end(b));
+}
+
+#if !defined(ASIO_NO_DEPRECATED)
+
+/** @defgroup buffer_cast asio::buffer_cast
+ *
+ * @brief (Deprecated: Use the @c data() member function.) The
+ * asio::buffer_cast function is used to obtain a pointer to the
+ * underlying memory region associated with a buffer.
+ *
+ * @par Examples:
+ *
+ * To access the memory of a non-modifiable buffer, use:
+ * @code asio::const_buffer b1 = ...;
+ * const unsigned char* p1 = asio::buffer_cast<const unsigned char*>(b1);
+ * @endcode
+ *
+ * To access the memory of a modifiable buffer, use:
+ * @code asio::mutable_buffer b2 = ...;
+ * unsigned char* p2 = asio::buffer_cast<unsigned char*>(b2);
+ * @endcode
+ *
+ * The asio::buffer_cast function permits violations of type safety, so
+ * uses of it in application code should be carefully considered.
+ */
+/*@{*/
+
+/// Cast a non-modifiable buffer to a specified pointer to POD type.
+template <typename PointerToPodType>
+inline PointerToPodType buffer_cast(const mutable_buffer& b) ASIO_NOEXCEPT
+{
+  return static_cast<PointerToPodType>(b.data());
+}
+
+/// Cast a non-modifiable buffer to a specified pointer to POD type.
+template <typename PointerToPodType>
+inline PointerToPodType buffer_cast(const const_buffer& b) ASIO_NOEXCEPT
+{
+  return static_cast<PointerToPodType>(b.data());
+}
+
+/*@}*/
+
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+/// Create a new modifiable buffer that is offset from the start of another.
+/**
+ * @relates mutable_buffer
+ */
+inline mutable_buffer operator+(const mutable_buffer& b,
+    std::size_t n) ASIO_NOEXCEPT
+{
+  std::size_t offset = n < b.size() ? n : b.size();
+  char* new_data = static_cast<char*>(b.data()) + offset;
+  std::size_t new_size = b.size() - offset;
+  return mutable_buffer(new_data, new_size
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , b.get_debug_check()
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+/// Create a new modifiable buffer that is offset from the start of another.
+/**
+ * @relates mutable_buffer
+ */
+inline mutable_buffer operator+(std::size_t n,
+    const mutable_buffer& b) ASIO_NOEXCEPT
+{
+  return b + n;
+}
+
+/// Create a new non-modifiable buffer that is offset from the start of another.
+/**
+ * @relates const_buffer
+ */
+inline const_buffer operator+(const const_buffer& b,
+    std::size_t n) ASIO_NOEXCEPT
+{
+  std::size_t offset = n < b.size() ? n : b.size();
+  const char* new_data = static_cast<const char*>(b.data()) + offset;
+  std::size_t new_size = b.size() - offset;
+  return const_buffer(new_data, new_size
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , b.get_debug_check()
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+/// Create a new non-modifiable buffer that is offset from the start of another.
+/**
+ * @relates const_buffer
+ */
+inline const_buffer operator+(std::size_t n,
+    const const_buffer& b) ASIO_NOEXCEPT
+{
+  return b + n;
+}
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+namespace detail {
+
+template <typename Iterator>
+class buffer_debug_check
+{
+public:
+  buffer_debug_check(Iterator iter)
+    : iter_(iter)
+  {
+  }
+
+  ~buffer_debug_check()
+  {
+#if defined(ASIO_MSVC) && (ASIO_MSVC == 1400)
+    // MSVC 8's string iterator checking may crash in a std::string::iterator
+    // object's destructor when the iterator points to an already-destroyed
+    // std::string object, unless the iterator is cleared first.
+    iter_ = Iterator();
+#endif // defined(ASIO_MSVC) && (ASIO_MSVC == 1400)
+  }
+
+  void operator()()
+  {
+    (void)*iter_;
+  }
+
+private:
+  Iterator iter_;
+};
+
+} // namespace detail
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+
+/** @defgroup buffer asio::buffer
+ *
+ * @brief The asio::buffer function is used to create a buffer object to
+ * represent raw memory, an array of POD elements, a vector of POD elements,
+ * or a std::string.
+ *
+ * A buffer object represents a contiguous region of memory as a 2-tuple
+ * consisting of a pointer and size in bytes. A tuple of the form <tt>{void*,
+ * size_t}</tt> specifies a mutable (modifiable) region of memory. Similarly, a
+ * tuple of the form <tt>{const void*, size_t}</tt> specifies a const
+ * (non-modifiable) region of memory. These two forms correspond to the classes
+ * mutable_buffer and const_buffer, respectively. To mirror C++'s conversion
+ * rules, a mutable_buffer is implicitly convertible to a const_buffer, and the
+ * opposite conversion is not permitted.
+ *
+ * The simplest use case involves reading or writing a single buffer of a
+ * specified size:
+ *
+ * @code sock.send(asio::buffer(data, size)); @endcode
+ *
+ * In the above example, the return value of asio::buffer meets the
+ * requirements of the ConstBufferSequence concept so that it may be directly
+ * passed to the socket's write function. A buffer created for modifiable
+ * memory also meets the requirements of the MutableBufferSequence concept.
+ *
+ * An individual buffer may be created from a builtin array, std::vector,
+ * std::array or boost::array of POD elements. This helps prevent buffer
+ * overruns by automatically determining the size of the buffer:
+ *
+ * @code char d1[128];
+ * size_t bytes_transferred = sock.receive(asio::buffer(d1));
+ *
+ * std::vector<char> d2(128);
+ * bytes_transferred = sock.receive(asio::buffer(d2));
+ *
+ * std::array<char, 128> d3;
+ * bytes_transferred = sock.receive(asio::buffer(d3));
+ *
+ * boost::array<char, 128> d4;
+ * bytes_transferred = sock.receive(asio::buffer(d4)); @endcode
+ *
+ * In all three cases above, the buffers created are exactly 128 bytes long.
+ * Note that a vector is @e never automatically resized when creating or using
+ * a buffer. The buffer size is determined using the vector's <tt>size()</tt>
+ * member function, and not its capacity.
+ *
+ * @par Accessing Buffer Contents
+ *
+ * The contents of a buffer may be accessed using the @c data() and @c size()
+ * member functions:
+ *
+ * @code asio::mutable_buffer b1 = ...;
+ * std::size_t s1 = b1.size();
+ * unsigned char* p1 = static_cast<unsigned char*>(b1.data());
+ *
+ * asio::const_buffer b2 = ...;
+ * std::size_t s2 = b2.size();
+ * const void* p2 = b2.data(); @endcode
+ *
+ * The @c data() member function permits violations of type safety, so
+ * uses of it in application code should be carefully considered.
+ *
+ * For convenience, a @ref buffer_size function is provided that works with
+ * both buffers and buffer sequences (that is, types meeting the
+ * ConstBufferSequence or MutableBufferSequence type requirements). In this
+ * case, the function returns the total size of all buffers in the sequence.
+ *
+ * @par Buffer Copying
+ *
+ * The @ref buffer_copy function may be used to copy raw bytes between
+ * individual buffers and buffer sequences.
+*
+ * In particular, when used with the @ref buffer_size function, the @ref
+ * buffer_copy function can be used to linearise a sequence of buffers. For
+ * example:
+ *
+ * @code vector<const_buffer> buffers = ...;
+ *
+ * vector<unsigned char> data(asio::buffer_size(buffers));
+ * asio::buffer_copy(asio::buffer(data), buffers); @endcode
+ *
+ * Note that @ref buffer_copy is implemented in terms of @c memcpy, and
+ * consequently it cannot be used to copy between overlapping memory regions.
+ *
+ * @par Buffer Invalidation
+ *
+ * A buffer object does not have any ownership of the memory it refers to. It
+ * is the responsibility of the application to ensure the memory region remains
+ * valid until it is no longer required for an I/O operation. When the memory
+ * is no longer available, the buffer is said to have been invalidated.
+ *
+ * For the asio::buffer overloads that accept an argument of type
+ * std::vector, the buffer objects returned are invalidated by any vector
+ * operation that also invalidates all references, pointers and iterators
+ * referring to the elements in the sequence (C++ Std, 23.2.4)
+ *
+ * For the asio::buffer overloads that accept an argument of type
+ * std::basic_string, the buffer objects returned are invalidated according to
+ * the rules defined for invalidation of references, pointers and iterators
+ * referring to elements of the sequence (C++ Std, 21.3).
+ *
+ * @par Buffer Arithmetic
+ *
+ * Buffer objects may be manipulated using simple arithmetic in a safe way
+ * which helps prevent buffer overruns. Consider an array initialised as
+ * follows:
+ *
+ * @code boost::array<char, 6> a = { 'a', 'b', 'c', 'd', 'e' }; @endcode
+ *
+ * A buffer object @c b1 created using:
+ *
+ * @code b1 = asio::buffer(a); @endcode
+ *
+ * represents the entire array, <tt>{ 'a', 'b', 'c', 'd', 'e' }</tt>. An
+ * optional second argument to the asio::buffer function may be used to
+ * limit the size, in bytes, of the buffer:
+ *
+ * @code b2 = asio::buffer(a, 3); @endcode
+ *
+ * such that @c b2 represents the data <tt>{ 'a', 'b', 'c' }</tt>. Even if the
+ * size argument exceeds the actual size of the array, the size of the buffer
+ * object created will be limited to the array size.
+ *
+ * An offset may be applied to an existing buffer to create a new one:
+ *
+ * @code b3 = b1 + 2; @endcode
+ *
+ * where @c b3 will set to represent <tt>{ 'c', 'd', 'e' }</tt>. If the offset
+ * exceeds the size of the existing buffer, the newly created buffer will be
+ * empty.
+ *
+ * Both an offset and size may be specified to create a buffer that corresponds
+ * to a specific range of bytes within an existing buffer:
+ *
+ * @code b4 = asio::buffer(b1 + 1, 3); @endcode
+ *
+ * so that @c b4 will refer to the bytes <tt>{ 'b', 'c', 'd' }</tt>.
+ *
+ * @par Buffers and Scatter-Gather I/O
+ *
+ * To read or write using multiple buffers (i.e. scatter-gather I/O), multiple
+ * buffer objects may be assigned into a container that supports the
+ * MutableBufferSequence (for read) or ConstBufferSequence (for write) concepts:
+ *
+ * @code
+ * char d1[128];
+ * std::vector<char> d2(128);
+ * boost::array<char, 128> d3;
+ *
+ * boost::array<mutable_buffer, 3> bufs1 = {
+ *   asio::buffer(d1),
+ *   asio::buffer(d2),
+ *   asio::buffer(d3) };
+ * bytes_transferred = sock.receive(bufs1);
+ *
+ * std::vector<const_buffer> bufs2;
+ * bufs2.push_back(asio::buffer(d1));
+ * bufs2.push_back(asio::buffer(d2));
+ * bufs2.push_back(asio::buffer(d3));
+ * bytes_transferred = sock.send(bufs2); @endcode
+ */
+/*@{*/
+
+#if defined(ASIO_NO_DEPRECATED) || defined(GENERATING_DOCUMENTATION)
+# define ASIO_MUTABLE_BUFFER mutable_buffer
+# define ASIO_CONST_BUFFER const_buffer
+#else // defined(ASIO_NO_DEPRECATED) || defined(GENERATING_DOCUMENTATION)
+# define ASIO_MUTABLE_BUFFER mutable_buffers_1
+# define ASIO_CONST_BUFFER const_buffers_1
+#endif // defined(ASIO_NO_DEPRECATED) || defined(GENERATING_DOCUMENTATION)
+
+/// Create a new modifiable buffer from an existing buffer.
+/**
+ * @returns <tt>mutable_buffer(b)</tt>.
+ */
+inline ASIO_MUTABLE_BUFFER buffer(
+    const mutable_buffer& b) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(b);
+}
+
+/// Create a new modifiable buffer from an existing buffer.
+/**
+ * @returns A mutable_buffer value equivalent to:
+ * @code mutable_buffer(
+ *     b.data(),
+ *     min(b.size(), max_size_in_bytes)); @endcode
+ */
+inline ASIO_MUTABLE_BUFFER buffer(const mutable_buffer& b,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(
+      mutable_buffer(b.data(),
+        b.size() < max_size_in_bytes
+        ? b.size() : max_size_in_bytes
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+        , b.get_debug_check()
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+        ));
+}
+
+/// Create a new non-modifiable buffer from an existing buffer.
+/**
+ * @returns <tt>const_buffer(b)</tt>.
+ */
+inline ASIO_CONST_BUFFER buffer(
+    const const_buffer& b) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(b);
+}
+
+/// Create a new non-modifiable buffer from an existing buffer.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     b.data(),
+ *     min(b.size(), max_size_in_bytes)); @endcode
+ */
+inline ASIO_CONST_BUFFER buffer(const const_buffer& b,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(b.data(),
+      b.size() < max_size_in_bytes
+      ? b.size() : max_size_in_bytes
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , b.get_debug_check()
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+/// Create a new modifiable buffer that represents the given memory range.
+/**
+ * @returns <tt>mutable_buffer(data, size_in_bytes)</tt>.
+ */
+inline ASIO_MUTABLE_BUFFER buffer(void* data,
+    std::size_t size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(data, size_in_bytes);
+}
+
+/// Create a new non-modifiable buffer that represents the given memory range.
+/**
+ * @returns <tt>const_buffer(data, size_in_bytes)</tt>.
+ */
+inline ASIO_CONST_BUFFER buffer(const void* data,
+    std::size_t size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data, size_in_bytes);
+}
+
+/// Create a new modifiable buffer that represents the given POD array.
+/**
+ * @returns A mutable_buffer value equivalent to:
+ * @code mutable_buffer(
+ *     static_cast<void*>(data),
+ *     N * sizeof(PodType)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_MUTABLE_BUFFER buffer(PodType (&data)[N]) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(data, N * sizeof(PodType));
+}
+ 
+/// Create a new modifiable buffer that represents the given POD array.
+/**
+ * @returns A mutable_buffer value equivalent to:
+ * @code mutable_buffer(
+ *     static_cast<void*>(data),
+ *     min(N * sizeof(PodType), max_size_in_bytes)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_MUTABLE_BUFFER buffer(PodType (&data)[N],
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(data,
+      N * sizeof(PodType) < max_size_in_bytes
+      ? N * sizeof(PodType) : max_size_in_bytes);
+}
+ 
+/// Create a new non-modifiable buffer that represents the given POD array.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     static_cast<const void*>(data),
+ *     N * sizeof(PodType)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_CONST_BUFFER buffer(
+    const PodType (&data)[N]) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data, N * sizeof(PodType));
+}
+
+/// Create a new non-modifiable buffer that represents the given POD array.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     static_cast<const void*>(data),
+ *     min(N * sizeof(PodType), max_size_in_bytes)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_CONST_BUFFER buffer(const PodType (&data)[N],
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data,
+      N * sizeof(PodType) < max_size_in_bytes
+      ? N * sizeof(PodType) : max_size_in_bytes);
+}
+
+#if defined(ASIO_ENABLE_ARRAY_BUFFER_WORKAROUND)
+
+// Borland C++ and Sun Studio think the overloads:
+//
+//   unspecified buffer(boost::array<PodType, N>& array ...);
+//
+// and
+//
+//   unspecified buffer(boost::array<const PodType, N>& array ...);
+//
+// are ambiguous. This will be worked around by using a buffer_types traits
+// class that contains typedefs for the appropriate buffer and container
+// classes, based on whether PodType is const or non-const.
+
+namespace detail {
+
+template <bool IsConst>
+struct buffer_types_base;
+
+template <>
+struct buffer_types_base<false>
+{
+  typedef mutable_buffer buffer_type;
+  typedef ASIO_MUTABLE_BUFFER container_type;
+};
+
+template <>
+struct buffer_types_base<true>
+{
+  typedef const_buffer buffer_type;
+  typedef ASIO_CONST_BUFFER container_type;
+};
+
+template <typename PodType>
+struct buffer_types
+  : public buffer_types_base<is_const<PodType>::value>
+{
+};
+
+} // namespace detail
+
+template <typename PodType, std::size_t N>
+inline typename detail::buffer_types<PodType>::container_type
+buffer(boost::array<PodType, N>& data) ASIO_NOEXCEPT
+{
+  typedef typename asio::detail::buffer_types<PodType>::buffer_type
+    buffer_type;
+  typedef typename asio::detail::buffer_types<PodType>::container_type
+    container_type;
+  return container_type(
+      buffer_type(data.c_array(), data.size() * sizeof(PodType)));
+}
+
+template <typename PodType, std::size_t N>
+inline typename detail::buffer_types<PodType>::container_type
+buffer(boost::array<PodType, N>& data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  typedef typename asio::detail::buffer_types<PodType>::buffer_type
+    buffer_type;
+  typedef typename asio::detail::buffer_types<PodType>::container_type
+    container_type;
+  return container_type(
+      buffer_type(data.c_array(),
+        data.size() * sizeof(PodType) < max_size_in_bytes
+        ? data.size() * sizeof(PodType) : max_size_in_bytes));
+}
+
+#else // defined(ASIO_ENABLE_ARRAY_BUFFER_WORKAROUND)
+
+/// Create a new modifiable buffer that represents the given POD array.
+/**
+ * @returns A mutable_buffer value equivalent to:
+ * @code mutable_buffer(
+ *     data.data(),
+ *     data.size() * sizeof(PodType)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_MUTABLE_BUFFER buffer(
+    boost::array<PodType, N>& data) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(
+      data.c_array(), data.size() * sizeof(PodType));
+}
+
+/// Create a new modifiable buffer that represents the given POD array.
+/**
+ * @returns A mutable_buffer value equivalent to:
+ * @code mutable_buffer(
+ *     data.data(),
+ *     min(data.size() * sizeof(PodType), max_size_in_bytes)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_MUTABLE_BUFFER buffer(boost::array<PodType, N>& data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(data.c_array(),
+      data.size() * sizeof(PodType) < max_size_in_bytes
+      ? data.size() * sizeof(PodType) : max_size_in_bytes);
+}
+
+/// Create a new non-modifiable buffer that represents the given POD array.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     data.data(),
+ *     data.size() * sizeof(PodType)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_CONST_BUFFER buffer(
+    boost::array<const PodType, N>& data) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.data(), data.size() * sizeof(PodType));
+}
+
+/// Create a new non-modifiable buffer that represents the given POD array.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     data.data(),
+ *     min(data.size() * sizeof(PodType), max_size_in_bytes)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_CONST_BUFFER buffer(boost::array<const PodType, N>& data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.data(),
+      data.size() * sizeof(PodType) < max_size_in_bytes
+      ? data.size() * sizeof(PodType) : max_size_in_bytes);
+}
+
+#endif // defined(ASIO_ENABLE_ARRAY_BUFFER_WORKAROUND)
+
+/// Create a new non-modifiable buffer that represents the given POD array.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     data.data(),
+ *     data.size() * sizeof(PodType)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_CONST_BUFFER buffer(
+    const boost::array<PodType, N>& data) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.data(), data.size() * sizeof(PodType));
+}
+
+/// Create a new non-modifiable buffer that represents the given POD array.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     data.data(),
+ *     min(data.size() * sizeof(PodType), max_size_in_bytes)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_CONST_BUFFER buffer(const boost::array<PodType, N>& data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.data(),
+      data.size() * sizeof(PodType) < max_size_in_bytes
+      ? data.size() * sizeof(PodType) : max_size_in_bytes);
+}
+
+#if defined(ASIO_HAS_STD_ARRAY) || defined(GENERATING_DOCUMENTATION)
+
+/// Create a new modifiable buffer that represents the given POD array.
+/**
+ * @returns A mutable_buffer value equivalent to:
+ * @code mutable_buffer(
+ *     data.data(),
+ *     data.size() * sizeof(PodType)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_MUTABLE_BUFFER buffer(
+    std::array<PodType, N>& data) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(data.data(), data.size() * sizeof(PodType));
+}
+
+/// Create a new modifiable buffer that represents the given POD array.
+/**
+ * @returns A mutable_buffer value equivalent to:
+ * @code mutable_buffer(
+ *     data.data(),
+ *     min(data.size() * sizeof(PodType), max_size_in_bytes)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_MUTABLE_BUFFER buffer(std::array<PodType, N>& data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(data.data(),
+      data.size() * sizeof(PodType) < max_size_in_bytes
+      ? data.size() * sizeof(PodType) : max_size_in_bytes);
+}
+
+/// Create a new non-modifiable buffer that represents the given POD array.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     data.data(),
+ *     data.size() * sizeof(PodType)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_CONST_BUFFER buffer(
+    std::array<const PodType, N>& data) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.data(), data.size() * sizeof(PodType));
+}
+
+/// Create a new non-modifiable buffer that represents the given POD array.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     data.data(),
+ *     min(data.size() * sizeof(PodType), max_size_in_bytes)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_CONST_BUFFER buffer(std::array<const PodType, N>& data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.data(),
+      data.size() * sizeof(PodType) < max_size_in_bytes
+      ? data.size() * sizeof(PodType) : max_size_in_bytes);
+}
+
+/// Create a new non-modifiable buffer that represents the given POD array.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     data.data(),
+ *     data.size() * sizeof(PodType)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_CONST_BUFFER buffer(
+    const std::array<PodType, N>& data) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.data(), data.size() * sizeof(PodType));
+}
+
+/// Create a new non-modifiable buffer that represents the given POD array.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     data.data(),
+ *     min(data.size() * sizeof(PodType), max_size_in_bytes)); @endcode
+ */
+template <typename PodType, std::size_t N>
+inline ASIO_CONST_BUFFER buffer(const std::array<PodType, N>& data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.data(),
+      data.size() * sizeof(PodType) < max_size_in_bytes
+      ? data.size() * sizeof(PodType) : max_size_in_bytes);
+}
+
+#endif // defined(ASIO_HAS_STD_ARRAY) || defined(GENERATING_DOCUMENTATION)
+
+/// Create a new modifiable buffer that represents the given POD vector.
+/**
+ * @returns A mutable_buffer value equivalent to:
+ * @code mutable_buffer(
+ *     data.size() ? &data[0] : 0,
+ *     data.size() * sizeof(PodType)); @endcode
+ *
+ * @note The buffer is invalidated by any vector operation that would also
+ * invalidate iterators.
+ */
+template <typename PodType, typename Allocator>
+inline ASIO_MUTABLE_BUFFER buffer(
+    std::vector<PodType, Allocator>& data) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(
+      data.size() ? &data[0] : 0, data.size() * sizeof(PodType)
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , detail::buffer_debug_check<
+          typename std::vector<PodType, Allocator>::iterator
+        >(data.begin())
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+/// Create a new modifiable buffer that represents the given POD vector.
+/**
+ * @returns A mutable_buffer value equivalent to:
+ * @code mutable_buffer(
+ *     data.size() ? &data[0] : 0,
+ *     min(data.size() * sizeof(PodType), max_size_in_bytes)); @endcode
+ *
+ * @note The buffer is invalidated by any vector operation that would also
+ * invalidate iterators.
+ */
+template <typename PodType, typename Allocator>
+inline ASIO_MUTABLE_BUFFER buffer(std::vector<PodType, Allocator>& data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(data.size() ? &data[0] : 0,
+      data.size() * sizeof(PodType) < max_size_in_bytes
+      ? data.size() * sizeof(PodType) : max_size_in_bytes
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , detail::buffer_debug_check<
+          typename std::vector<PodType, Allocator>::iterator
+        >(data.begin())
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+/// Create a new non-modifiable buffer that represents the given POD vector.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     data.size() ? &data[0] : 0,
+ *     data.size() * sizeof(PodType)); @endcode
+ *
+ * @note The buffer is invalidated by any vector operation that would also
+ * invalidate iterators.
+ */
+template <typename PodType, typename Allocator>
+inline ASIO_CONST_BUFFER buffer(
+    const std::vector<PodType, Allocator>& data) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(
+      data.size() ? &data[0] : 0, data.size() * sizeof(PodType)
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , detail::buffer_debug_check<
+          typename std::vector<PodType, Allocator>::const_iterator
+        >(data.begin())
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+/// Create a new non-modifiable buffer that represents the given POD vector.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     data.size() ? &data[0] : 0,
+ *     min(data.size() * sizeof(PodType), max_size_in_bytes)); @endcode
+ *
+ * @note The buffer is invalidated by any vector operation that would also
+ * invalidate iterators.
+ */
+template <typename PodType, typename Allocator>
+inline ASIO_CONST_BUFFER buffer(
+    const std::vector<PodType, Allocator>& data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.size() ? &data[0] : 0,
+      data.size() * sizeof(PodType) < max_size_in_bytes
+      ? data.size() * sizeof(PodType) : max_size_in_bytes
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , detail::buffer_debug_check<
+          typename std::vector<PodType, Allocator>::const_iterator
+        >(data.begin())
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+/// Create a new modifiable buffer that represents the given string.
+/**
+ * @returns <tt>mutable_buffer(data.size() ? &data[0] : 0,
+ * data.size() * sizeof(Elem))</tt>.
+ *
+ * @note The buffer is invalidated by any non-const operation called on the
+ * given string object.
+ */
+template <typename Elem, typename Traits, typename Allocator>
+inline ASIO_MUTABLE_BUFFER buffer(
+    std::basic_string<Elem, Traits, Allocator>& data) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(data.size() ? &data[0] : 0,
+      data.size() * sizeof(Elem)
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , detail::buffer_debug_check<
+          typename std::basic_string<Elem, Traits, Allocator>::iterator
+        >(data.begin())
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+/// Create a new modifiable buffer that represents the given string.
+/**
+ * @returns A mutable_buffer value equivalent to:
+ * @code mutable_buffer(
+ *     data.size() ? &data[0] : 0,
+ *     min(data.size() * sizeof(Elem), max_size_in_bytes)); @endcode
+ *
+ * @note The buffer is invalidated by any non-const operation called on the
+ * given string object.
+ */
+template <typename Elem, typename Traits, typename Allocator>
+inline ASIO_MUTABLE_BUFFER buffer(
+    std::basic_string<Elem, Traits, Allocator>& data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_MUTABLE_BUFFER(data.size() ? &data[0] : 0,
+      data.size() * sizeof(Elem) < max_size_in_bytes
+      ? data.size() * sizeof(Elem) : max_size_in_bytes
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , detail::buffer_debug_check<
+          typename std::basic_string<Elem, Traits, Allocator>::iterator
+        >(data.begin())
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+/// Create a new non-modifiable buffer that represents the given string.
+/**
+ * @returns <tt>const_buffer(data.data(), data.size() * sizeof(Elem))</tt>.
+ *
+ * @note The buffer is invalidated by any non-const operation called on the
+ * given string object.
+ */
+template <typename Elem, typename Traits, typename Allocator>
+inline ASIO_CONST_BUFFER buffer(
+    const std::basic_string<Elem, Traits, Allocator>& data) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.data(), data.size() * sizeof(Elem)
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , detail::buffer_debug_check<
+          typename std::basic_string<Elem, Traits, Allocator>::const_iterator
+        >(data.begin())
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+/// Create a new non-modifiable buffer that represents the given string.
+/**
+ * @returns A const_buffer value equivalent to:
+ * @code const_buffer(
+ *     data.data(),
+ *     min(data.size() * sizeof(Elem), max_size_in_bytes)); @endcode
+ *
+ * @note The buffer is invalidated by any non-const operation called on the
+ * given string object.
+ */
+template <typename Elem, typename Traits, typename Allocator>
+inline ASIO_CONST_BUFFER buffer(
+    const std::basic_string<Elem, Traits, Allocator>& data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.data(),
+      data.size() * sizeof(Elem) < max_size_in_bytes
+      ? data.size() * sizeof(Elem) : max_size_in_bytes
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , detail::buffer_debug_check<
+          typename std::basic_string<Elem, Traits, Allocator>::const_iterator
+        >(data.begin())
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+#if defined(ASIO_HAS_STRING_VIEW) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Create a new modifiable buffer that represents the given string_view.
+/**
+ * @returns <tt>mutable_buffer(data.size() ? &data[0] : 0,
+ * data.size() * sizeof(Elem))</tt>.
+ */
+template <typename Elem, typename Traits>
+inline ASIO_CONST_BUFFER buffer(
+    basic_string_view<Elem, Traits> data) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.size() ? &data[0] : 0,
+      data.size() * sizeof(Elem)
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , detail::buffer_debug_check<
+          typename basic_string_view<Elem, Traits>::iterator
+        >(data.begin())
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+/// Create a new non-modifiable buffer that represents the given string.
+/**
+ * @returns A mutable_buffer value equivalent to:
+ * @code mutable_buffer(
+ *     data.size() ? &data[0] : 0,
+ *     min(data.size() * sizeof(Elem), max_size_in_bytes)); @endcode
+ */
+template <typename Elem, typename Traits>
+inline ASIO_CONST_BUFFER buffer(
+    basic_string_view<Elem, Traits> data,
+    std::size_t max_size_in_bytes) ASIO_NOEXCEPT
+{
+  return ASIO_CONST_BUFFER(data.size() ? &data[0] : 0,
+      data.size() * sizeof(Elem) < max_size_in_bytes
+      ? data.size() * sizeof(Elem) : max_size_in_bytes
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+      , detail::buffer_debug_check<
+          typename basic_string_view<Elem, Traits>::iterator
+        >(data.begin())
+#endif // ASIO_ENABLE_BUFFER_DEBUGGING
+      );
+}
+
+#endif // defined(ASIO_HAS_STRING_VIEW)
+       //  || defined(GENERATING_DOCUMENTATION)
+
+/*@}*/
+
+/// Adapt a basic_string to the DynamicBuffer requirements.
+/**
+ * Requires that <tt>sizeof(Elem) == 1</tt>.
+ */
+template <typename Elem, typename Traits, typename Allocator>
+class dynamic_string_buffer
+{
+public:
+  /// The type used to represent a sequence of constant buffers that refers to
+  /// the underlying memory.
+  typedef ASIO_CONST_BUFFER const_buffers_type;
+
+  /// The type used to represent a sequence of mutable buffers that refers to
+  /// the underlying memory.
+  typedef ASIO_MUTABLE_BUFFER mutable_buffers_type;
+
+  /// Construct a dynamic buffer from a string.
+  /**
+   * @param s The string to be used as backing storage for the dynamic buffer.
+   * The object stores a reference to the string and the user is responsible
+   * for ensuring that the string object remains valid while the
+   * dynamic_string_buffer object, and copies of the object, are in use.
+   *
+   * @b DynamicBuffer_v1: Any existing data in the string is treated as the
+   * dynamic buffer's input sequence.
+   *
+   * @param maximum_size Specifies a maximum size for the buffer, in bytes.
+   */
+  explicit dynamic_string_buffer(std::basic_string<Elem, Traits, Allocator>& s,
+      std::size_t maximum_size =
+        (std::numeric_limits<std::size_t>::max)()) ASIO_NOEXCEPT
+    : string_(s),
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      size_((std::numeric_limits<std::size_t>::max)()),
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      max_size_(maximum_size)
+  {
+  }
+
+  /// @b DynamicBuffer_v2: Copy construct a dynamic buffer.
+  dynamic_string_buffer(const dynamic_string_buffer& other) ASIO_NOEXCEPT
+    : string_(other.string_),
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      size_(other.size_),
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      max_size_(other.max_size_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move construct a dynamic buffer.
+  dynamic_string_buffer(dynamic_string_buffer&& other) ASIO_NOEXCEPT
+    : string_(other.string_),
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      size_(other.size_),
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      max_size_(other.max_size_)
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// @b DynamicBuffer_v1: Get the size of the input sequence.
+  /// @b DynamicBuffer_v2: Get the current size of the underlying memory.
+  /**
+   * @returns @b DynamicBuffer_v1 The current size of the input sequence.
+   * @b DynamicBuffer_v2: The current size of the underlying string if less than
+   * max_size(). Otherwise returns max_size().
+   */
+  std::size_t size() const ASIO_NOEXCEPT
+  {
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+    if (size_ != (std::numeric_limits<std::size_t>::max)())
+      return size_;
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+    return (std::min)(string_.size(), max_size());
+  }
+
+  /// Get the maximum size of the dynamic buffer.
+  /**
+   * @returns The allowed maximum size of the underlying memory.
+   */
+  std::size_t max_size() const ASIO_NOEXCEPT
+  {
+    return max_size_;
+  }
+
+  /// Get the maximum size that the buffer may grow to without triggering
+  /// reallocation.
+  /**
+   * @returns The current capacity of the underlying string if less than
+   * max_size(). Otherwise returns max_size().
+   */
+  std::size_t capacity() const ASIO_NOEXCEPT
+  {
+    return (std::min)(string_.capacity(), max_size());
+  }
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+  /// @b DynamicBuffer_v1: Get a list of buffers that represents the input
+  /// sequence.
+  /**
+   * @returns An object of type @c const_buffers_type that satisfies
+   * ConstBufferSequence requirements, representing the basic_string memory in
+   * the input sequence.
+   *
+   * @note The returned object is invalidated by any @c dynamic_string_buffer
+   * or @c basic_string member function that resizes or erases the string.
+   */
+  const_buffers_type data() const ASIO_NOEXCEPT
+  {
+    return const_buffers_type(asio::buffer(string_, size_));
+  }
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+  /// @b DynamicBuffer_v2: Get a sequence of buffers that represents the
+  /// underlying memory.
+  /**
+   * @param pos Position of the first byte to represent in the buffer sequence
+   *
+   * @param n The number of bytes to return in the buffer sequence. If the
+   * underlying memory is shorter, the buffer sequence represents as many bytes
+   * as are available.
+   *
+   * @returns An object of type @c mutable_buffers_type that satisfies
+   * MutableBufferSequence requirements, representing the basic_string memory.
+   *
+   * @note The returned object is invalidated by any @c dynamic_string_buffer
+   * or @c basic_string member function that resizes or erases the string.
+   */
+  mutable_buffers_type data(std::size_t pos, std::size_t n) ASIO_NOEXCEPT
+  {
+    return mutable_buffers_type(asio::buffer(
+          asio::buffer(string_, max_size_) + pos, n));
+  }
+
+  /// @b DynamicBuffer_v2: Get a sequence of buffers that represents the
+  /// underlying memory.
+  /**
+   * @param pos Position of the first byte to represent in the buffer sequence
+   *
+   * @param n The number of bytes to return in the buffer sequence. If the
+   * underlying memory is shorter, the buffer sequence represents as many bytes
+   * as are available.
+   *
+   * @note The returned object is invalidated by any @c dynamic_string_buffer
+   * or @c basic_string member function that resizes or erases the string.
+   */
+  const_buffers_type data(std::size_t pos,
+      std::size_t n) const ASIO_NOEXCEPT
+  {
+    return const_buffers_type(asio::buffer(
+          asio::buffer(string_, max_size_) + pos, n));
+  }
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+  /// @b DynamicBuffer_v1: Get a list of buffers that represents the output
+  /// sequence, with the given size.
+  /**
+   * Ensures that the output sequence can accommodate @c n bytes, resizing the
+   * basic_string object as necessary.
+   *
+   * @returns An object of type @c mutable_buffers_type that satisfies
+   * MutableBufferSequence requirements, representing basic_string memory
+   * at the start of the output sequence of size @c n.
+   *
+   * @throws std::length_error If <tt>size() + n > max_size()</tt>.
+   *
+   * @note The returned object is invalidated by any @c dynamic_string_buffer
+   * or @c basic_string member function that modifies the input sequence or
+   * output sequence.
+   */
+  mutable_buffers_type prepare(std::size_t n)
+  {
+    if (size() > max_size() || max_size() - size() < n)
+    {
+      std::length_error ex("dynamic_string_buffer too long");
+      asio::detail::throw_exception(ex);
+    }
+
+    if (size_ == (std::numeric_limits<std::size_t>::max)())
+      size_ = string_.size(); // Enable v1 behaviour.
+
+    string_.resize(size_ + n);
+
+    return asio::buffer(asio::buffer(string_) + size_, n);
+  }
+
+  /// @b DynamicBuffer_v1: Move bytes from the output sequence to the input
+  /// sequence.
+  /**
+   * @param n The number of bytes to append from the start of the output
+   * sequence to the end of the input sequence. The remainder of the output
+   * sequence is discarded.
+   *
+   * Requires a preceding call <tt>prepare(x)</tt> where <tt>x >= n</tt>, and
+   * no intervening operations that modify the input or output sequence.
+   *
+   * @note If @c n is greater than the size of the output sequence, the entire
+   * output sequence is moved to the input sequence and no error is issued.
+   */
+  void commit(std::size_t n)
+  {
+    size_ += (std::min)(n, string_.size() - size_);
+    string_.resize(size_);
+  }
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+  /// @b DynamicBuffer_v2: Grow the underlying memory by the specified number of
+  /// bytes.
+  /**
+   * Resizes the string to accommodate an additional @c n bytes at the end.
+   *
+   * @throws std::length_error If <tt>size() + n > max_size()</tt>.
+   */
+  void grow(std::size_t n)
+  {
+    if (size() > max_size() || max_size() - size() < n)
+    {
+      std::length_error ex("dynamic_string_buffer too long");
+      asio::detail::throw_exception(ex);
+    }
+
+    string_.resize(size() + n);
+  }
+
+  /// @b DynamicBuffer_v2: Shrink the underlying memory by the specified number
+  /// of bytes.
+  /**
+   * Erases @c n bytes from the end of the string by resizing the basic_string
+   * object. If @c n is greater than the current size of the string, the string
+   * is emptied.
+   */
+  void shrink(std::size_t n)
+  {
+    string_.resize(n > size() ? 0 : size() - n);
+  }
+
+  /// @b DynamicBuffer_v1: Remove characters from the input sequence.
+  /// @b DynamicBuffer_v2: Consume the specified number of bytes from the
+  /// beginning of the underlying memory.
+  /**
+   * @b DynamicBuffer_v1: Removes @c n characters from the beginning of the
+   * input sequence. @note If @c n is greater than the size of the input
+   * sequence, the entire input sequence is consumed and no error is issued.
+   *
+   * @b DynamicBuffer_v2: Erases @c n bytes from the beginning of the string.
+   * If @c n is greater than the current size of the string, the string is
+   * emptied.
+   */
+  void consume(std::size_t n)
+  {
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+    if (size_ != (std::numeric_limits<std::size_t>::max)())
+    {
+      std::size_t consume_length = (std::min)(n, size_);
+      string_.erase(0, consume_length);
+      size_ -= consume_length;
+      return;
+    }
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+    string_.erase(0, n);
+  }
+
+private:
+  std::basic_string<Elem, Traits, Allocator>& string_;
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+  std::size_t size_;
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+  const std::size_t max_size_;
+};
+
+/// Adapt a vector to the DynamicBuffer requirements.
+/**
+ * Requires that <tt>sizeof(Elem) == 1</tt>.
+ */
+template <typename Elem, typename Allocator>
+class dynamic_vector_buffer
+{
+public:
+  /// The type used to represent a sequence of constant buffers that refers to
+  /// the underlying memory.
+  typedef ASIO_CONST_BUFFER const_buffers_type;
+
+  /// The type used to represent a sequence of mutable buffers that refers to
+  /// the underlying memory.
+  typedef ASIO_MUTABLE_BUFFER mutable_buffers_type;
+
+  /// Construct a dynamic buffer from a vector.
+  /**
+   * @param v The vector to be used as backing storage for the dynamic buffer.
+   * The object stores a reference to the vector and the user is responsible
+   * for ensuring that the vector object remains valid while the
+   * dynamic_vector_buffer object, and copies of the object, are in use.
+   *
+   * @param maximum_size Specifies a maximum size for the buffer, in bytes.
+   */
+  explicit dynamic_vector_buffer(std::vector<Elem, Allocator>& v,
+      std::size_t maximum_size =
+        (std::numeric_limits<std::size_t>::max)()) ASIO_NOEXCEPT
+    : vector_(v),
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      size_((std::numeric_limits<std::size_t>::max)()),
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      max_size_(maximum_size)
+  {
+  }
+
+  /// @b DynamicBuffer_v2: Copy construct a dynamic buffer.
+  dynamic_vector_buffer(const dynamic_vector_buffer& other) ASIO_NOEXCEPT
+    : vector_(other.vector_),
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      size_(other.size_),
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      max_size_(other.max_size_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move construct a dynamic buffer.
+  dynamic_vector_buffer(dynamic_vector_buffer&& other) ASIO_NOEXCEPT
+    : vector_(other.vector_),
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      size_(other.size_),
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+      max_size_(other.max_size_)
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// @b DynamicBuffer_v1: Get the size of the input sequence.
+  /// @b DynamicBuffer_v2: Get the current size of the underlying memory.
+  /**
+   * @returns @b DynamicBuffer_v1 The current size of the input sequence.
+   * @b DynamicBuffer_v2: The current size of the underlying vector if less than
+   * max_size(). Otherwise returns max_size().
+   */
+  std::size_t size() const ASIO_NOEXCEPT
+  {
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+    if (size_ != (std::numeric_limits<std::size_t>::max)())
+      return size_;
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+    return (std::min)(vector_.size(), max_size());
+  }
+
+  /// Get the maximum size of the dynamic buffer.
+  /**
+   * @returns @b DynamicBuffer_v1: The allowed maximum of the sum of the sizes
+   * of the input sequence and output sequence. @b DynamicBuffer_v2: The allowed
+   * maximum size of the underlying memory.
+   */
+  std::size_t max_size() const ASIO_NOEXCEPT
+  {
+    return max_size_;
+  }
+
+  /// Get the maximum size that the buffer may grow to without triggering
+  /// reallocation.
+  /**
+   * @returns @b DynamicBuffer_v1: The current total capacity of the buffer,
+   * i.e. for both the input sequence and output sequence. @b DynamicBuffer_v2:
+   * The current capacity of the underlying vector if less than max_size().
+   * Otherwise returns max_size().
+   */
+  std::size_t capacity() const ASIO_NOEXCEPT
+  {
+    return (std::min)(vector_.capacity(), max_size());
+  }
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+  /// @b DynamicBuffer_v1: Get a list of buffers that represents the input
+  /// sequence.
+  /**
+   * @returns An object of type @c const_buffers_type that satisfies
+   * ConstBufferSequence requirements, representing the vector memory in the
+   * input sequence.
+   *
+   * @note The returned object is invalidated by any @c dynamic_vector_buffer
+   * or @c vector member function that modifies the input sequence or output
+   * sequence.
+   */
+  const_buffers_type data() const ASIO_NOEXCEPT
+  {
+    return const_buffers_type(asio::buffer(vector_, size_));
+  }
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+  /// @b DynamicBuffer_v2: Get a sequence of buffers that represents the
+  /// underlying memory.
+  /**
+   * @param pos Position of the first byte to represent in the buffer sequence
+   *
+   * @param n The number of bytes to return in the buffer sequence. If the
+   * underlying memory is shorter, the buffer sequence represents as many bytes
+   * as are available.
+   *
+   * @returns An object of type @c mutable_buffers_type that satisfies
+   * MutableBufferSequence requirements, representing the vector memory.
+   *
+   * @note The returned object is invalidated by any @c dynamic_vector_buffer
+   * or @c vector member function that resizes or erases the vector.
+   */
+  mutable_buffers_type data(std::size_t pos, std::size_t n) ASIO_NOEXCEPT
+  {
+    return mutable_buffers_type(asio::buffer(
+          asio::buffer(vector_, max_size_) + pos, n));
+  }
+
+  /// @b DynamicBuffer_v2: Get a sequence of buffers that represents the
+  /// underlying memory.
+  /**
+   * @param pos Position of the first byte to represent in the buffer sequence
+   *
+   * @param n The number of bytes to return in the buffer sequence. If the
+   * underlying memory is shorter, the buffer sequence represents as many bytes
+   * as are available.
+   *
+   * @note The returned object is invalidated by any @c dynamic_vector_buffer
+   * or @c vector member function that resizes or erases the vector.
+   */
+  const_buffers_type data(std::size_t pos,
+      std::size_t n) const ASIO_NOEXCEPT
+  {
+    return const_buffers_type(asio::buffer(
+          asio::buffer(vector_, max_size_) + pos, n));
+  }
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+  /// @b DynamicBuffer_v1: Get a list of buffers that represents the output
+  /// sequence, with the given size.
+  /**
+   * Ensures that the output sequence can accommodate @c n bytes, resizing the
+   * vector object as necessary.
+   *
+   * @returns An object of type @c mutable_buffers_type that satisfies
+   * MutableBufferSequence requirements, representing vector memory at the
+   * start of the output sequence of size @c n.
+   *
+   * @throws std::length_error If <tt>size() + n > max_size()</tt>.
+   *
+   * @note The returned object is invalidated by any @c dynamic_vector_buffer
+   * or @c vector member function that modifies the input sequence or output
+   * sequence.
+   */
+  mutable_buffers_type prepare(std::size_t n)
+  {
+    if (size () > max_size() || max_size() - size() < n)
+    {
+      std::length_error ex("dynamic_vector_buffer too long");
+      asio::detail::throw_exception(ex);
+    }
+
+    if (size_ == (std::numeric_limits<std::size_t>::max)())
+      size_ = vector_.size(); // Enable v1 behaviour.
+
+    vector_.resize(size_ + n);
+
+    return asio::buffer(asio::buffer(vector_) + size_, n);
+  }
+
+  /// @b DynamicBuffer_v1: Move bytes from the output sequence to the input
+  /// sequence.
+  /**
+   * @param n The number of bytes to append from the start of the output
+   * sequence to the end of the input sequence. The remainder of the output
+   * sequence is discarded.
+   *
+   * Requires a preceding call <tt>prepare(x)</tt> where <tt>x >= n</tt>, and
+   * no intervening operations that modify the input or output sequence.
+   *
+   * @note If @c n is greater than the size of the output sequence, the entire
+   * output sequence is moved to the input sequence and no error is issued.
+   */
+  void commit(std::size_t n)
+  {
+    size_ += (std::min)(n, vector_.size() - size_);
+    vector_.resize(size_);
+  }
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+  /// @b DynamicBuffer_v2: Grow the underlying memory by the specified number of
+  /// bytes.
+  /**
+   * Resizes the vector to accommodate an additional @c n bytes at the end.
+   *
+   * @throws std::length_error If <tt>size() + n > max_size()</tt>.
+   */
+  void grow(std::size_t n)
+  {
+    if (size() > max_size() || max_size() - size() < n)
+    {
+      std::length_error ex("dynamic_vector_buffer too long");
+      asio::detail::throw_exception(ex);
+    }
+
+    vector_.resize(size() + n);
+  }
+
+  /// @b DynamicBuffer_v2: Shrink the underlying memory by the specified number
+  /// of bytes.
+  /**
+   * Erases @c n bytes from the end of the vector by resizing the vector
+   * object. If @c n is greater than the current size of the vector, the vector
+   * is emptied.
+   */
+  void shrink(std::size_t n)
+  {
+    vector_.resize(n > size() ? 0 : size() - n);
+  }
+
+  /// @b DynamicBuffer_v1: Remove characters from the input sequence.
+  /// @b DynamicBuffer_v2: Consume the specified number of bytes from the
+  /// beginning of the underlying memory.
+  /**
+   * @b DynamicBuffer_v1: Removes @c n characters from the beginning of the
+   * input sequence. @note If @c n is greater than the size of the input
+   * sequence, the entire input sequence is consumed and no error is issued.
+   *
+   * @b DynamicBuffer_v2: Erases @c n bytes from the beginning of the vector.
+   * If @c n is greater than the current size of the vector, the vector is
+   * emptied.
+   */
+  void consume(std::size_t n)
+  {
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+    if (size_ != (std::numeric_limits<std::size_t>::max)())
+    {
+      std::size_t consume_length = (std::min)(n, size_);
+      vector_.erase(vector_.begin(), vector_.begin() + consume_length);
+      size_ -= consume_length;
+      return;
+    }
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+    vector_.erase(vector_.begin(), vector_.begin() + (std::min)(size(), n));
+  }
+
+private:
+  std::vector<Elem, Allocator>& vector_;
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+  std::size_t size_;
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+  const std::size_t max_size_;
+};
+
+/** @defgroup dynamic_buffer asio::dynamic_buffer
+ *
+ * @brief The asio::dynamic_buffer function is used to create a
+ * dynamically resized buffer from a @c std::basic_string or @c std::vector.
+ */
+/*@{*/
+
+/// Create a new dynamic buffer that represents the given string.
+/**
+ * @returns <tt>dynamic_string_buffer<Elem, Traits, Allocator>(data)</tt>.
+ */
+template <typename Elem, typename Traits, typename Allocator>
+inline dynamic_string_buffer<Elem, Traits, Allocator> dynamic_buffer(
+    std::basic_string<Elem, Traits, Allocator>& data) ASIO_NOEXCEPT
+{
+  return dynamic_string_buffer<Elem, Traits, Allocator>(data);
+}
+
+/// Create a new dynamic buffer that represents the given string.
+/**
+ * @returns <tt>dynamic_string_buffer<Elem, Traits, Allocator>(data,
+ * max_size)</tt>.
+ */
+template <typename Elem, typename Traits, typename Allocator>
+inline dynamic_string_buffer<Elem, Traits, Allocator> dynamic_buffer(
+    std::basic_string<Elem, Traits, Allocator>& data,
+    std::size_t max_size) ASIO_NOEXCEPT
+{
+  return dynamic_string_buffer<Elem, Traits, Allocator>(data, max_size);
+}
+
+/// Create a new dynamic buffer that represents the given vector.
+/**
+ * @returns <tt>dynamic_vector_buffer<Elem, Allocator>(data)</tt>.
+ */
+template <typename Elem, typename Allocator>
+inline dynamic_vector_buffer<Elem, Allocator> dynamic_buffer(
+    std::vector<Elem, Allocator>& data) ASIO_NOEXCEPT
+{
+  return dynamic_vector_buffer<Elem, Allocator>(data);
+}
+
+/// Create a new dynamic buffer that represents the given vector.
+/**
+ * @returns <tt>dynamic_vector_buffer<Elem, Allocator>(data, max_size)</tt>.
+ */
+template <typename Elem, typename Allocator>
+inline dynamic_vector_buffer<Elem, Allocator> dynamic_buffer(
+    std::vector<Elem, Allocator>& data,
+    std::size_t max_size) ASIO_NOEXCEPT
+{
+  return dynamic_vector_buffer<Elem, Allocator>(data, max_size);
+}
+
+/*@}*/
+
+/** @defgroup buffer_copy asio::buffer_copy
+ *
+ * @brief The asio::buffer_copy function is used to copy bytes from a
+ * source buffer (or buffer sequence) to a target buffer (or buffer sequence).
+ *
+ * The @c buffer_copy function is available in two forms:
+ *
+ * @li A 2-argument form: @c buffer_copy(target, source)
+ *
+ * @li A 3-argument form: @c buffer_copy(target, source, max_bytes_to_copy)
+ *
+ * Both forms return the number of bytes actually copied. The number of bytes
+ * copied is the lesser of:
+ *
+ * @li @c buffer_size(target)
+ *
+ * @li @c buffer_size(source)
+ *
+ * @li @c If specified, @c max_bytes_to_copy.
+ *
+ * This prevents buffer overflow, regardless of the buffer sizes used in the
+ * copy operation.
+ *
+ * Note that @ref buffer_copy is implemented in terms of @c memcpy, and
+ * consequently it cannot be used to copy between overlapping memory regions.
+ */
+/*@{*/
+
+namespace detail {
+
+inline std::size_t buffer_copy_1(const mutable_buffer& target,
+    const const_buffer& source)
+{
+  using namespace std; // For memcpy.
+  std::size_t target_size = target.size();
+  std::size_t source_size = source.size();
+  std::size_t n = target_size < source_size ? target_size : source_size;
+  if (n > 0)
+    memcpy(target.data(), source.data(), n);
+  return n;
+}
+
+template <typename TargetIterator, typename SourceIterator>
+inline std::size_t buffer_copy(one_buffer, one_buffer,
+    TargetIterator target_begin, TargetIterator,
+    SourceIterator source_begin, SourceIterator) ASIO_NOEXCEPT
+{
+  return (buffer_copy_1)(*target_begin, *source_begin);
+}
+
+template <typename TargetIterator, typename SourceIterator>
+inline std::size_t buffer_copy(one_buffer, one_buffer,
+    TargetIterator target_begin, TargetIterator,
+    SourceIterator source_begin, SourceIterator,
+    std::size_t max_bytes_to_copy) ASIO_NOEXCEPT
+{
+  return (buffer_copy_1)(*target_begin,
+      asio::buffer(*source_begin, max_bytes_to_copy));
+}
+
+template <typename TargetIterator, typename SourceIterator>
+std::size_t buffer_copy(one_buffer, multiple_buffers,
+    TargetIterator target_begin, TargetIterator,
+    SourceIterator source_begin, SourceIterator source_end,
+    std::size_t max_bytes_to_copy
+      = (std::numeric_limits<std::size_t>::max)()) ASIO_NOEXCEPT
+{
+  std::size_t total_bytes_copied = 0;
+  SourceIterator source_iter = source_begin;
+
+  for (mutable_buffer target_buffer(
+        asio::buffer(*target_begin, max_bytes_to_copy));
+      target_buffer.size() && source_iter != source_end; ++source_iter)
+  {
+    const_buffer source_buffer(*source_iter);
+    std::size_t bytes_copied = (buffer_copy_1)(target_buffer, source_buffer);
+    total_bytes_copied += bytes_copied;
+    target_buffer += bytes_copied;
+  }
+
+  return total_bytes_copied;
+}
+
+template <typename TargetIterator, typename SourceIterator>
+std::size_t buffer_copy(multiple_buffers, one_buffer,
+    TargetIterator target_begin, TargetIterator target_end,
+    SourceIterator source_begin, SourceIterator,
+    std::size_t max_bytes_to_copy
+      = (std::numeric_limits<std::size_t>::max)()) ASIO_NOEXCEPT
+{
+  std::size_t total_bytes_copied = 0;
+  TargetIterator target_iter = target_begin;
+
+  for (const_buffer source_buffer(
+        asio::buffer(*source_begin, max_bytes_to_copy));
+      source_buffer.size() && target_iter != target_end; ++target_iter)
+  {
+    mutable_buffer target_buffer(*target_iter);
+    std::size_t bytes_copied = (buffer_copy_1)(target_buffer, source_buffer);
+    total_bytes_copied += bytes_copied;
+    source_buffer += bytes_copied;
+  }
+
+  return total_bytes_copied;
+}
+
+template <typename TargetIterator, typename SourceIterator>
+std::size_t buffer_copy(multiple_buffers, multiple_buffers,
+    TargetIterator target_begin, TargetIterator target_end,
+    SourceIterator source_begin, SourceIterator source_end) ASIO_NOEXCEPT
+{
+  std::size_t total_bytes_copied = 0;
+
+  TargetIterator target_iter = target_begin;
+  std::size_t target_buffer_offset = 0;
+
+  SourceIterator source_iter = source_begin;
+  std::size_t source_buffer_offset = 0;
+
+  while (target_iter != target_end && source_iter != source_end)
+  {
+    mutable_buffer target_buffer =
+      mutable_buffer(*target_iter) + target_buffer_offset;
+
+    const_buffer source_buffer =
+      const_buffer(*source_iter) + source_buffer_offset;
+
+    std::size_t bytes_copied = (buffer_copy_1)(target_buffer, source_buffer);
+    total_bytes_copied += bytes_copied;
+
+    if (bytes_copied == target_buffer.size())
+    {
+      ++target_iter;
+      target_buffer_offset = 0;
+    }
+    else
+      target_buffer_offset += bytes_copied;
+
+    if (bytes_copied == source_buffer.size())
+    {
+      ++source_iter;
+      source_buffer_offset = 0;
+    }
+    else
+      source_buffer_offset += bytes_copied;
+  }
+
+  return total_bytes_copied;
+}
+
+template <typename TargetIterator, typename SourceIterator>
+std::size_t buffer_copy(multiple_buffers, multiple_buffers,
+    TargetIterator target_begin, TargetIterator target_end,
+    SourceIterator source_begin, SourceIterator source_end,
+    std::size_t max_bytes_to_copy) ASIO_NOEXCEPT
+{
+  std::size_t total_bytes_copied = 0;
+
+  TargetIterator target_iter = target_begin;
+  std::size_t target_buffer_offset = 0;
+
+  SourceIterator source_iter = source_begin;
+  std::size_t source_buffer_offset = 0;
+
+  while (total_bytes_copied != max_bytes_to_copy
+      && target_iter != target_end && source_iter != source_end)
+  {
+    mutable_buffer target_buffer =
+      mutable_buffer(*target_iter) + target_buffer_offset;
+
+    const_buffer source_buffer =
+      const_buffer(*source_iter) + source_buffer_offset;
+
+    std::size_t bytes_copied = (buffer_copy_1)(
+        target_buffer, asio::buffer(source_buffer,
+          max_bytes_to_copy - total_bytes_copied));
+    total_bytes_copied += bytes_copied;
+
+    if (bytes_copied == target_buffer.size())
+    {
+      ++target_iter;
+      target_buffer_offset = 0;
+    }
+    else
+      target_buffer_offset += bytes_copied;
+
+    if (bytes_copied == source_buffer.size())
+    {
+      ++source_iter;
+      source_buffer_offset = 0;
+    }
+    else
+      source_buffer_offset += bytes_copied;
+  }
+
+  return total_bytes_copied;
+}
+
+} // namespace detail
+
+/// Copies bytes from a source buffer sequence to a target buffer sequence.
+/**
+ * @param target A modifiable buffer sequence representing the memory regions to
+ * which the bytes will be copied.
+ *
+ * @param source A non-modifiable buffer sequence representing the memory
+ * regions from which the bytes will be copied.
+ *
+ * @returns The number of bytes copied.
+ *
+ * @note The number of bytes copied is the lesser of:
+ *
+ * @li @c buffer_size(target)
+ *
+ * @li @c buffer_size(source)
+ *
+ * This function is implemented in terms of @c memcpy, and consequently it
+ * cannot be used to copy between overlapping memory regions.
+ */
+template <typename MutableBufferSequence, typename ConstBufferSequence>
+inline std::size_t buffer_copy(const MutableBufferSequence& target,
+    const ConstBufferSequence& source) ASIO_NOEXCEPT
+{
+  return detail::buffer_copy(
+      detail::buffer_sequence_cardinality<MutableBufferSequence>(),
+      detail::buffer_sequence_cardinality<ConstBufferSequence>(),
+      asio::buffer_sequence_begin(target),
+      asio::buffer_sequence_end(target),
+      asio::buffer_sequence_begin(source),
+      asio::buffer_sequence_end(source));
+}
+
+/// Copies a limited number of bytes from a source buffer sequence to a target
+/// buffer sequence.
+/**
+ * @param target A modifiable buffer sequence representing the memory regions to
+ * which the bytes will be copied.
+ *
+ * @param source A non-modifiable buffer sequence representing the memory
+ * regions from which the bytes will be copied.
+ *
+ * @param max_bytes_to_copy The maximum number of bytes to be copied.
+ *
+ * @returns The number of bytes copied.
+ *
+ * @note The number of bytes copied is the lesser of:
+ *
+ * @li @c buffer_size(target)
+ *
+ * @li @c buffer_size(source)
+ *
+ * @li @c max_bytes_to_copy
+ *
+ * This function is implemented in terms of @c memcpy, and consequently it
+ * cannot be used to copy between overlapping memory regions.
+ */
+template <typename MutableBufferSequence, typename ConstBufferSequence>
+inline std::size_t buffer_copy(const MutableBufferSequence& target,
+    const ConstBufferSequence& source,
+    std::size_t max_bytes_to_copy) ASIO_NOEXCEPT
+{
+  return detail::buffer_copy(
+      detail::buffer_sequence_cardinality<MutableBufferSequence>(),
+      detail::buffer_sequence_cardinality<ConstBufferSequence>(),
+      asio::buffer_sequence_begin(target),
+      asio::buffer_sequence_end(target),
+      asio::buffer_sequence_begin(source),
+      asio::buffer_sequence_end(source), max_bytes_to_copy);
+}
+
+/*@}*/
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+#include "asio/detail/is_buffer_sequence.hpp"
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Trait to determine whether a type satisfies the MutableBufferSequence
+/// requirements.
+template <typename T>
+struct is_mutable_buffer_sequence
+#if defined(GENERATING_DOCUMENTATION)
+  : integral_constant<bool, automatically_determined>
+#else // defined(GENERATING_DOCUMENTATION)
+  : asio::detail::is_buffer_sequence<T, mutable_buffer>
+#endif // defined(GENERATING_DOCUMENTATION)
+{
+};
+
+/// Trait to determine whether a type satisfies the ConstBufferSequence
+/// requirements.
+template <typename T>
+struct is_const_buffer_sequence
+#if defined(GENERATING_DOCUMENTATION)
+  : integral_constant<bool, automatically_determined>
+#else // defined(GENERATING_DOCUMENTATION)
+  : asio::detail::is_buffer_sequence<T, const_buffer>
+#endif // defined(GENERATING_DOCUMENTATION)
+{
+};
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+/// Trait to determine whether a type satisfies the DynamicBuffer_v1
+/// requirements.
+template <typename T>
+struct is_dynamic_buffer_v1
+#if defined(GENERATING_DOCUMENTATION)
+  : integral_constant<bool, automatically_determined>
+#else // defined(GENERATING_DOCUMENTATION)
+  : asio::detail::is_dynamic_buffer_v1<T>
+#endif // defined(GENERATING_DOCUMENTATION)
+{
+};
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Trait to determine whether a type satisfies the DynamicBuffer_v2
+/// requirements.
+template <typename T>
+struct is_dynamic_buffer_v2
+#if defined(GENERATING_DOCUMENTATION)
+  : integral_constant<bool, automatically_determined>
+#else // defined(GENERATING_DOCUMENTATION)
+  : asio::detail::is_dynamic_buffer_v2<T>
+#endif // defined(GENERATING_DOCUMENTATION)
+{
+};
+
+/// Trait to determine whether a type satisfies the DynamicBuffer requirements.
+/**
+ * If @c ASIO_NO_DYNAMIC_BUFFER_V1 is not defined, determines whether the
+ * type satisfies the DynamicBuffer_v1 requirements. Otherwise, if @c
+ * ASIO_NO_DYNAMIC_BUFFER_V1 is defined, determines whether the type
+ * satisfies the DynamicBuffer_v2 requirements.
+ */
+template <typename T>
+struct is_dynamic_buffer
+#if defined(GENERATING_DOCUMENTATION)
+  : integral_constant<bool, automatically_determined>
+#elif defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+  : asio::is_dynamic_buffer_v2<T>
+#else // defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+  : asio::is_dynamic_buffer_v1<T>
+#endif // defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+{
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BUFFER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_read_stream.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_read_stream.hpp
new file mode 100644
index 00000000000..a1cece6236d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_read_stream.hpp
@@ -0,0 +1,253 @@
+//
+// buffered_read_stream.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BUFFERED_READ_STREAM_HPP
+#define ASIO_BUFFERED_READ_STREAM_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/async_result.hpp"
+#include "asio/buffered_read_stream_fwd.hpp"
+#include "asio/buffer.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_resize_guard.hpp"
+#include "asio/detail/buffered_stream_storage.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Adds buffering to the read-related operations of a stream.
+/**
+ * The buffered_read_stream class template can be used to add buffering to the
+ * synchronous and asynchronous read operations of a stream.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Concepts:
+ * AsyncReadStream, AsyncWriteStream, Stream, SyncReadStream, SyncWriteStream.
+ */
+template <typename Stream>
+class buffered_read_stream
+  : private noncopyable
+{
+public:
+  /// The type of the next layer.
+  typedef typename remove_reference<Stream>::type next_layer_type;
+
+  /// The type of the lowest layer.
+  typedef typename next_layer_type::lowest_layer_type lowest_layer_type;
+
+  /// The type of the executor associated with the object.
+  typedef typename lowest_layer_type::executor_type executor_type;
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// The default buffer size.
+  static const std::size_t default_buffer_size = implementation_defined;
+#else
+  ASIO_STATIC_CONSTANT(std::size_t, default_buffer_size = 1024);
+#endif
+
+  /// Construct, passing the specified argument to initialise the next layer.
+  template <typename Arg>
+  explicit buffered_read_stream(Arg& a)
+    : next_layer_(a),
+      storage_(default_buffer_size)
+  {
+  }
+
+  /// Construct, passing the specified argument to initialise the next layer.
+  template <typename Arg>
+  buffered_read_stream(Arg& a, std::size_t buffer_size)
+    : next_layer_(a),
+      storage_(buffer_size)
+  {
+  }
+
+  /// Get a reference to the next layer.
+  next_layer_type& next_layer()
+  {
+    return next_layer_;
+  }
+
+  /// Get a reference to the lowest layer.
+  lowest_layer_type& lowest_layer()
+  {
+    return next_layer_.lowest_layer();
+  }
+
+  /// Get a const reference to the lowest layer.
+  const lowest_layer_type& lowest_layer() const
+  {
+    return next_layer_.lowest_layer();
+  }
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return next_layer_.lowest_layer().get_executor();
+  }
+
+  /// Close the stream.
+  void close()
+  {
+    next_layer_.close();
+  }
+
+  /// Close the stream.
+  ASIO_SYNC_OP_VOID close(asio::error_code& ec)
+  {
+    next_layer_.close(ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Write the given data to the stream. Returns the number of bytes written.
+  /// Throws an exception on failure.
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers)
+  {
+    return next_layer_.write_some(buffers);
+  }
+
+  /// Write the given data to the stream. Returns the number of bytes written,
+  /// or 0 if an error occurred.
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return next_layer_.write_some(buffers, ec);
+  }
+
+  /// Start an asynchronous write. The data being written must be valid for the
+  /// lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_write_some(const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return next_layer_.async_write_some(buffers,
+        ASIO_MOVE_CAST(WriteHandler)(handler));
+  }
+
+  /// Fill the buffer with some data. Returns the number of bytes placed in the
+  /// buffer as a result of the operation. Throws an exception on failure.
+  std::size_t fill();
+
+  /// Fill the buffer with some data. Returns the number of bytes placed in the
+  /// buffer as a result of the operation, or 0 if an error occurred.
+  std::size_t fill(asio::error_code& ec);
+
+  /// Start an asynchronous fill.
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_fill(
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type));
+
+  /// Read some data from the stream. Returns the number of bytes read. Throws
+  /// an exception on failure.
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers);
+
+  /// Read some data from the stream. Returns the number of bytes read or 0 if
+  /// an error occurred.
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers,
+      asio::error_code& ec);
+
+  /// Start an asynchronous read. The buffer into which the data will be read
+  /// must be valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_read_some(const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type));
+
+  /// Peek at the incoming data on the stream. Returns the number of bytes read.
+  /// Throws an exception on failure.
+  template <typename MutableBufferSequence>
+  std::size_t peek(const MutableBufferSequence& buffers);
+
+  /// Peek at the incoming data on the stream. Returns the number of bytes read,
+  /// or 0 if an error occurred.
+  template <typename MutableBufferSequence>
+  std::size_t peek(const MutableBufferSequence& buffers,
+      asio::error_code& ec);
+
+  /// Determine the amount of data that may be read without blocking.
+  std::size_t in_avail()
+  {
+    return storage_.size();
+  }
+
+  /// Determine the amount of data that may be read without blocking.
+  std::size_t in_avail(asio::error_code& ec)
+  {
+    ec = asio::error_code();
+    return storage_.size();
+  }
+
+private:
+  /// Copy data out of the internal buffer to the specified target buffer.
+  /// Returns the number of bytes copied.
+  template <typename MutableBufferSequence>
+  std::size_t copy(const MutableBufferSequence& buffers)
+  {
+    std::size_t bytes_copied = asio::buffer_copy(
+        buffers, storage_.data(), storage_.size());
+    storage_.consume(bytes_copied);
+    return bytes_copied;
+  }
+
+  /// Copy data from the internal buffer to the specified target buffer, without
+  /// removing the data from the internal buffer. Returns the number of bytes
+  /// copied.
+  template <typename MutableBufferSequence>
+  std::size_t peek_copy(const MutableBufferSequence& buffers)
+  {
+    return asio::buffer_copy(buffers, storage_.data(), storage_.size());
+  }
+
+  /// The next layer.
+  Stream next_layer_;
+
+  // The data in the buffer.
+  detail::buffered_stream_storage storage_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/buffered_read_stream.hpp"
+
+#endif // ASIO_BUFFERED_READ_STREAM_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_read_stream_fwd.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_read_stream_fwd.hpp
new file mode 100644
index 00000000000..666c18fa43e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_read_stream_fwd.hpp
@@ -0,0 +1,25 @@
+//
+// buffered_read_stream_fwd.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BUFFERED_READ_STREAM_FWD_HPP
+#define ASIO_BUFFERED_READ_STREAM_FWD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+namespace asio {
+
+template <typename Stream>
+class buffered_read_stream;
+
+} // namespace asio
+
+#endif // ASIO_BUFFERED_READ_STREAM_FWD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_stream.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_stream.hpp
new file mode 100644
index 00000000000..6643ff83bee
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_stream.hpp
@@ -0,0 +1,279 @@
+//
+// buffered_stream.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BUFFERED_STREAM_HPP
+#define ASIO_BUFFERED_STREAM_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/async_result.hpp"
+#include "asio/buffered_read_stream.hpp"
+#include "asio/buffered_write_stream.hpp"
+#include "asio/buffered_stream_fwd.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Adds buffering to the read- and write-related operations of a stream.
+/**
+ * The buffered_stream class template can be used to add buffering to the
+ * synchronous and asynchronous read and write operations of a stream.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Concepts:
+ * AsyncReadStream, AsyncWriteStream, Stream, SyncReadStream, SyncWriteStream.
+ */
+template <typename Stream>
+class buffered_stream
+  : private noncopyable
+{
+public:
+  /// The type of the next layer.
+  typedef typename remove_reference<Stream>::type next_layer_type;
+
+  /// The type of the lowest layer.
+  typedef typename next_layer_type::lowest_layer_type lowest_layer_type;
+
+  /// The type of the executor associated with the object.
+  typedef typename lowest_layer_type::executor_type executor_type;
+
+  /// Construct, passing the specified argument to initialise the next layer.
+  template <typename Arg>
+  explicit buffered_stream(Arg& a)
+    : inner_stream_impl_(a),
+      stream_impl_(inner_stream_impl_)
+  {
+  }
+
+  /// Construct, passing the specified argument to initialise the next layer.
+  template <typename Arg>
+  explicit buffered_stream(Arg& a, std::size_t read_buffer_size,
+      std::size_t write_buffer_size)
+    : inner_stream_impl_(a, write_buffer_size),
+      stream_impl_(inner_stream_impl_, read_buffer_size)
+  {
+  }
+
+  /// Get a reference to the next layer.
+  next_layer_type& next_layer()
+  {
+    return stream_impl_.next_layer().next_layer();
+  }
+
+  /// Get a reference to the lowest layer.
+  lowest_layer_type& lowest_layer()
+  {
+    return stream_impl_.lowest_layer();
+  }
+
+  /// Get a const reference to the lowest layer.
+  const lowest_layer_type& lowest_layer() const
+  {
+    return stream_impl_.lowest_layer();
+  }
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return stream_impl_.lowest_layer().get_executor();
+  }
+
+  /// Close the stream.
+  void close()
+  {
+    stream_impl_.close();
+  }
+
+  /// Close the stream.
+  ASIO_SYNC_OP_VOID close(asio::error_code& ec)
+  {
+    stream_impl_.close(ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Flush all data from the buffer to the next layer. Returns the number of
+  /// bytes written to the next layer on the last write operation. Throws an
+  /// exception on failure.
+  std::size_t flush()
+  {
+    return stream_impl_.next_layer().flush();
+  }
+
+  /// Flush all data from the buffer to the next layer. Returns the number of
+  /// bytes written to the next layer on the last write operation, or 0 if an
+  /// error occurred.
+  std::size_t flush(asio::error_code& ec)
+  {
+    return stream_impl_.next_layer().flush(ec);
+  }
+
+  /// Start an asynchronous flush.
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_flush(
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return stream_impl_.next_layer().async_flush(
+        ASIO_MOVE_CAST(WriteHandler)(handler));
+  }
+
+  /// Write the given data to the stream. Returns the number of bytes written.
+  /// Throws an exception on failure.
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers)
+  {
+    return stream_impl_.write_some(buffers);
+  }
+
+  /// Write the given data to the stream. Returns the number of bytes written,
+  /// or 0 if an error occurred.
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return stream_impl_.write_some(buffers, ec);
+  }
+
+  /// Start an asynchronous write. The data being written must be valid for the
+  /// lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_write_some(const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return stream_impl_.async_write_some(buffers,
+        ASIO_MOVE_CAST(WriteHandler)(handler));
+  }
+
+  /// Fill the buffer with some data. Returns the number of bytes placed in the
+  /// buffer as a result of the operation. Throws an exception on failure.
+  std::size_t fill()
+  {
+    return stream_impl_.fill();
+  }
+
+  /// Fill the buffer with some data. Returns the number of bytes placed in the
+  /// buffer as a result of the operation, or 0 if an error occurred.
+  std::size_t fill(asio::error_code& ec)
+  {
+    return stream_impl_.fill(ec);
+  }
+
+  /// Start an asynchronous fill.
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_fill(
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return stream_impl_.async_fill(ASIO_MOVE_CAST(ReadHandler)(handler));
+  }
+
+  /// Read some data from the stream. Returns the number of bytes read. Throws
+  /// an exception on failure.
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers)
+  {
+    return stream_impl_.read_some(buffers);
+  }
+
+  /// Read some data from the stream. Returns the number of bytes read or 0 if
+  /// an error occurred.
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return stream_impl_.read_some(buffers, ec);
+  }
+
+  /// Start an asynchronous read. The buffer into which the data will be read
+  /// must be valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_read_some(const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return stream_impl_.async_read_some(buffers,
+        ASIO_MOVE_CAST(ReadHandler)(handler));
+  }
+
+  /// Peek at the incoming data on the stream. Returns the number of bytes read.
+  /// Throws an exception on failure.
+  template <typename MutableBufferSequence>
+  std::size_t peek(const MutableBufferSequence& buffers)
+  {
+    return stream_impl_.peek(buffers);
+  }
+
+  /// Peek at the incoming data on the stream. Returns the number of bytes read,
+  /// or 0 if an error occurred.
+  template <typename MutableBufferSequence>
+  std::size_t peek(const MutableBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return stream_impl_.peek(buffers, ec);
+  }
+
+  /// Determine the amount of data that may be read without blocking.
+  std::size_t in_avail()
+  {
+    return stream_impl_.in_avail();
+  }
+
+  /// Determine the amount of data that may be read without blocking.
+  std::size_t in_avail(asio::error_code& ec)
+  {
+    return stream_impl_.in_avail(ec);
+  }
+
+private:
+  // The buffered write stream.
+  typedef buffered_write_stream<Stream> write_stream_type;
+  write_stream_type inner_stream_impl_;
+
+  // The buffered read stream.
+  typedef buffered_read_stream<write_stream_type&> read_stream_type;
+  read_stream_type stream_impl_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BUFFERED_STREAM_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_stream_fwd.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_stream_fwd.hpp
new file mode 100644
index 00000000000..86dfcbc1497
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_stream_fwd.hpp
@@ -0,0 +1,25 @@
+//
+// buffered_stream_fwd.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BUFFERED_STREAM_FWD_HPP
+#define ASIO_BUFFERED_STREAM_FWD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+namespace asio {
+
+template <typename Stream>
+class buffered_stream;
+
+} // namespace asio
+
+#endif // ASIO_BUFFERED_STREAM_FWD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_write_stream.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_write_stream.hpp
new file mode 100644
index 00000000000..66401b443c9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_write_stream.hpp
@@ -0,0 +1,245 @@
+//
+// buffered_write_stream.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BUFFERED_WRITE_STREAM_HPP
+#define ASIO_BUFFERED_WRITE_STREAM_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/buffered_write_stream_fwd.hpp"
+#include "asio/buffer.hpp"
+#include "asio/completion_condition.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffered_stream_storage.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error.hpp"
+#include "asio/write.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Adds buffering to the write-related operations of a stream.
+/**
+ * The buffered_write_stream class template can be used to add buffering to the
+ * synchronous and asynchronous write operations of a stream.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Concepts:
+ * AsyncReadStream, AsyncWriteStream, Stream, SyncReadStream, SyncWriteStream.
+ */
+template <typename Stream>
+class buffered_write_stream
+  : private noncopyable
+{
+public:
+  /// The type of the next layer.
+  typedef typename remove_reference<Stream>::type next_layer_type;
+
+  /// The type of the lowest layer.
+  typedef typename next_layer_type::lowest_layer_type lowest_layer_type;
+
+  /// The type of the executor associated with the object.
+  typedef typename lowest_layer_type::executor_type executor_type;
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// The default buffer size.
+  static const std::size_t default_buffer_size = implementation_defined;
+#else
+  ASIO_STATIC_CONSTANT(std::size_t, default_buffer_size = 1024);
+#endif
+
+  /// Construct, passing the specified argument to initialise the next layer.
+  template <typename Arg>
+  explicit buffered_write_stream(Arg& a)
+    : next_layer_(a),
+      storage_(default_buffer_size)
+  {
+  }
+
+  /// Construct, passing the specified argument to initialise the next layer.
+  template <typename Arg>
+  buffered_write_stream(Arg& a, std::size_t buffer_size)
+    : next_layer_(a),
+      storage_(buffer_size)
+  {
+  }
+
+  /// Get a reference to the next layer.
+  next_layer_type& next_layer()
+  {
+    return next_layer_;
+  }
+
+  /// Get a reference to the lowest layer.
+  lowest_layer_type& lowest_layer()
+  {
+    return next_layer_.lowest_layer();
+  }
+
+  /// Get a const reference to the lowest layer.
+  const lowest_layer_type& lowest_layer() const
+  {
+    return next_layer_.lowest_layer();
+  }
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return next_layer_.lowest_layer().get_executor();
+  }
+
+  /// Close the stream.
+  void close()
+  {
+    next_layer_.close();
+  }
+
+  /// Close the stream.
+  ASIO_SYNC_OP_VOID close(asio::error_code& ec)
+  {
+    next_layer_.close(ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Flush all data from the buffer to the next layer. Returns the number of
+  /// bytes written to the next layer on the last write operation. Throws an
+  /// exception on failure.
+  std::size_t flush();
+
+  /// Flush all data from the buffer to the next layer. Returns the number of
+  /// bytes written to the next layer on the last write operation, or 0 if an
+  /// error occurred.
+  std::size_t flush(asio::error_code& ec);
+
+  /// Start an asynchronous flush.
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_flush(
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type));
+
+  /// Write the given data to the stream. Returns the number of bytes written.
+  /// Throws an exception on failure.
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers);
+
+  /// Write the given data to the stream. Returns the number of bytes written,
+  /// or 0 if an error occurred and the error handler did not throw.
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers,
+      asio::error_code& ec);
+
+  /// Start an asynchronous write. The data being written must be valid for the
+  /// lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_write_some(const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type));
+
+  /// Read some data from the stream. Returns the number of bytes read. Throws
+  /// an exception on failure.
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers)
+  {
+    return next_layer_.read_some(buffers);
+  }
+
+  /// Read some data from the stream. Returns the number of bytes read or 0 if
+  /// an error occurred.
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return next_layer_.read_some(buffers, ec);
+  }
+
+  /// Start an asynchronous read. The buffer into which the data will be read
+  /// must be valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_read_some(const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return next_layer_.async_read_some(buffers,
+        ASIO_MOVE_CAST(ReadHandler)(handler));
+  }
+
+  /// Peek at the incoming data on the stream. Returns the number of bytes read.
+  /// Throws an exception on failure.
+  template <typename MutableBufferSequence>
+  std::size_t peek(const MutableBufferSequence& buffers)
+  {
+    return next_layer_.peek(buffers);
+  }
+
+  /// Peek at the incoming data on the stream. Returns the number of bytes read,
+  /// or 0 if an error occurred.
+  template <typename MutableBufferSequence>
+  std::size_t peek(const MutableBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return next_layer_.peek(buffers, ec);
+  }
+
+  /// Determine the amount of data that may be read without blocking.
+  std::size_t in_avail()
+  {
+    return next_layer_.in_avail();
+  }
+
+  /// Determine the amount of data that may be read without blocking.
+  std::size_t in_avail(asio::error_code& ec)
+  {
+    return next_layer_.in_avail(ec);
+  }
+
+private:
+  /// Copy data into the internal buffer from the specified source buffer.
+  /// Returns the number of bytes copied.
+  template <typename ConstBufferSequence>
+  std::size_t copy(const ConstBufferSequence& buffers);
+
+  /// The next layer.
+  Stream next_layer_;
+
+  // The data in the buffer.
+  detail::buffered_stream_storage storage_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/buffered_write_stream.hpp"
+
+#endif // ASIO_BUFFERED_WRITE_STREAM_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_write_stream_fwd.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_write_stream_fwd.hpp
new file mode 100644
index 00000000000..370273ce1ab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffered_write_stream_fwd.hpp
@@ -0,0 +1,25 @@
+//
+// buffered_write_stream_fwd.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BUFFERED_WRITE_STREAM_FWD_HPP
+#define ASIO_BUFFERED_WRITE_STREAM_FWD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+namespace asio {
+
+template <typename Stream>
+class buffered_write_stream;
+
+} // namespace asio
+
+#endif // ASIO_BUFFERED_WRITE_STREAM_FWD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffers_iterator.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffers_iterator.hpp
new file mode 100644
index 00000000000..57aeadd683d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/buffers_iterator.hpp
@@ -0,0 +1,521 @@
+//
+// buffers_iterator.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_BUFFERS_ITERATOR_HPP
+#define ASIO_BUFFERS_ITERATOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include <iterator>
+#include "asio/buffer.hpp"
+#include "asio/detail/assert.hpp"
+#include "asio/detail/type_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail
+{
+  template <bool IsMutable>
+  struct buffers_iterator_types_helper;
+
+  template <>
+  struct buffers_iterator_types_helper<false>
+  {
+    typedef const_buffer buffer_type;
+    template <typename ByteType>
+    struct byte_type
+    {
+      typedef typename add_const<ByteType>::type type;
+    };
+  };
+
+  template <>
+  struct buffers_iterator_types_helper<true>
+  {
+    typedef mutable_buffer buffer_type;
+    template <typename ByteType>
+    struct byte_type
+    {
+      typedef ByteType type;
+    };
+  };
+
+  template <typename BufferSequence, typename ByteType>
+  struct buffers_iterator_types
+  {
+    enum
+    {
+      is_mutable = is_convertible<
+          typename BufferSequence::value_type,
+          mutable_buffer>::value
+    };
+    typedef buffers_iterator_types_helper<is_mutable> helper;
+    typedef typename helper::buffer_type buffer_type;
+    typedef typename helper::template byte_type<ByteType>::type byte_type;
+    typedef typename BufferSequence::const_iterator const_iterator;
+  };
+
+  template <typename ByteType>
+  struct buffers_iterator_types<mutable_buffer, ByteType>
+  {
+    typedef mutable_buffer buffer_type;
+    typedef ByteType byte_type;
+    typedef const mutable_buffer* const_iterator;
+  };
+
+  template <typename ByteType>
+  struct buffers_iterator_types<const_buffer, ByteType>
+  {
+    typedef const_buffer buffer_type;
+    typedef typename add_const<ByteType>::type byte_type;
+    typedef const const_buffer* const_iterator;
+  };
+
+#if !defined(ASIO_NO_DEPRECATED)
+
+  template <typename ByteType>
+  struct buffers_iterator_types<mutable_buffers_1, ByteType>
+  {
+    typedef mutable_buffer buffer_type;
+    typedef ByteType byte_type;
+    typedef const mutable_buffer* const_iterator;
+  };
+
+  template <typename ByteType>
+  struct buffers_iterator_types<const_buffers_1, ByteType>
+  {
+    typedef const_buffer buffer_type;
+    typedef typename add_const<ByteType>::type byte_type;
+    typedef const const_buffer* const_iterator;
+  };
+
+#endif // !defined(ASIO_NO_DEPRECATED)
+}
+
+/// A random access iterator over the bytes in a buffer sequence.
+template <typename BufferSequence, typename ByteType = char>
+class buffers_iterator
+{
+private:
+  typedef typename detail::buffers_iterator_types<
+      BufferSequence, ByteType>::buffer_type buffer_type;
+
+  typedef typename detail::buffers_iterator_types<BufferSequence,
+          ByteType>::const_iterator buffer_sequence_iterator_type;
+
+public:
+  /// The type used for the distance between two iterators.
+  typedef std::ptrdiff_t difference_type;
+
+  /// The type of the value pointed to by the iterator.
+  typedef ByteType value_type;
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// The type of the result of applying operator->() to the iterator.
+  /**
+   * If the buffer sequence stores buffer objects that are convertible to
+   * mutable_buffer, this is a pointer to a non-const ByteType. Otherwise, a
+   * pointer to a const ByteType.
+   */
+  typedef const_or_non_const_ByteType* pointer;
+#else // defined(GENERATING_DOCUMENTATION)
+  typedef typename detail::buffers_iterator_types<
+      BufferSequence, ByteType>::byte_type* pointer;
+#endif // defined(GENERATING_DOCUMENTATION)
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// The type of the result of applying operator*() to the iterator.
+  /**
+   * If the buffer sequence stores buffer objects that are convertible to
+   * mutable_buffer, this is a reference to a non-const ByteType. Otherwise, a
+   * reference to a const ByteType.
+   */
+  typedef const_or_non_const_ByteType& reference;
+#else // defined(GENERATING_DOCUMENTATION)
+  typedef typename detail::buffers_iterator_types<
+      BufferSequence, ByteType>::byte_type& reference;
+#endif // defined(GENERATING_DOCUMENTATION)
+
+  /// The iterator category.
+  typedef std::random_access_iterator_tag iterator_category;
+
+  /// Default constructor. Creates an iterator in an undefined state.
+  buffers_iterator()
+    : current_buffer_(),
+      current_buffer_position_(0),
+      begin_(),
+      current_(),
+      end_(),
+      position_(0)
+  {
+  }
+
+  /// Construct an iterator representing the beginning of the buffers' data.
+  static buffers_iterator begin(const BufferSequence& buffers)
+#if defined(__GNUC__) && (__GNUC__ == 4) && (__GNUC_MINOR__ == 3)
+    __attribute__ ((__noinline__))
+#endif // defined(__GNUC__) && (__GNUC__ == 4) && (__GNUC_MINOR__ == 3)
+  {
+    buffers_iterator new_iter;
+    new_iter.begin_ = asio::buffer_sequence_begin(buffers);
+    new_iter.current_ = asio::buffer_sequence_begin(buffers);
+    new_iter.end_ = asio::buffer_sequence_end(buffers);
+    while (new_iter.current_ != new_iter.end_)
+    {
+      new_iter.current_buffer_ = *new_iter.current_;
+      if (new_iter.current_buffer_.size() > 0)
+        break;
+      ++new_iter.current_;
+    }
+    return new_iter;
+  }
+
+  /// Construct an iterator representing the end of the buffers' data.
+  static buffers_iterator end(const BufferSequence& buffers)
+#if defined(__GNUC__) && (__GNUC__ == 4) && (__GNUC_MINOR__ == 3)
+    __attribute__ ((__noinline__))
+#endif // defined(__GNUC__) && (__GNUC__ == 4) && (__GNUC_MINOR__ == 3)
+  {
+    buffers_iterator new_iter;
+    new_iter.begin_ = asio::buffer_sequence_begin(buffers);
+    new_iter.current_ = asio::buffer_sequence_begin(buffers);
+    new_iter.end_ = asio::buffer_sequence_end(buffers);
+    while (new_iter.current_ != new_iter.end_)
+    {
+      buffer_type buffer = *new_iter.current_;
+      new_iter.position_ += buffer.size();
+      ++new_iter.current_;
+    }
+    return new_iter;
+  }
+
+  /// Dereference an iterator.
+  reference operator*() const
+  {
+    return dereference();
+  }
+
+  /// Dereference an iterator.
+  pointer operator->() const
+  {
+    return &dereference();
+  }
+
+  /// Access an individual element.
+  reference operator[](std::ptrdiff_t difference) const
+  {
+    buffers_iterator tmp(*this);
+    tmp.advance(difference);
+    return *tmp;
+  }
+
+  /// Increment operator (prefix).
+  buffers_iterator& operator++()
+  {
+    increment();
+    return *this;
+  }
+
+  /// Increment operator (postfix).
+  buffers_iterator operator++(int)
+  {
+    buffers_iterator tmp(*this);
+    ++*this;
+    return tmp;
+  }
+
+  /// Decrement operator (prefix).
+  buffers_iterator& operator--()
+  {
+    decrement();
+    return *this;
+  }
+
+  /// Decrement operator (postfix).
+  buffers_iterator operator--(int)
+  {
+    buffers_iterator tmp(*this);
+    --*this;
+    return tmp;
+  }
+
+  /// Addition operator.
+  buffers_iterator& operator+=(std::ptrdiff_t difference)
+  {
+    advance(difference);
+    return *this;
+  }
+
+  /// Subtraction operator.
+  buffers_iterator& operator-=(std::ptrdiff_t difference)
+  {
+    advance(-difference);
+    return *this;
+  }
+
+  /// Addition operator.
+  friend buffers_iterator operator+(const buffers_iterator& iter,
+      std::ptrdiff_t difference)
+  {
+    buffers_iterator tmp(iter);
+    tmp.advance(difference);
+    return tmp;
+  }
+
+  /// Addition operator.
+  friend buffers_iterator operator+(std::ptrdiff_t difference,
+      const buffers_iterator& iter)
+  {
+    buffers_iterator tmp(iter);
+    tmp.advance(difference);
+    return tmp;
+  }
+
+  /// Subtraction operator.
+  friend buffers_iterator operator-(const buffers_iterator& iter,
+      std::ptrdiff_t difference)
+  {
+    buffers_iterator tmp(iter);
+    tmp.advance(-difference);
+    return tmp;
+  }
+
+  /// Subtraction operator.
+  friend std::ptrdiff_t operator-(const buffers_iterator& a,
+      const buffers_iterator& b)
+  {
+    return b.distance_to(a);
+  }
+
+  /// Test two iterators for equality.
+  friend bool operator==(const buffers_iterator& a, const buffers_iterator& b)
+  {
+    return a.equal(b);
+  }
+
+  /// Test two iterators for inequality.
+  friend bool operator!=(const buffers_iterator& a, const buffers_iterator& b)
+  {
+    return !a.equal(b);
+  }
+
+  /// Compare two iterators.
+  friend bool operator<(const buffers_iterator& a, const buffers_iterator& b)
+  {
+    return a.distance_to(b) > 0;
+  }
+
+  /// Compare two iterators.
+  friend bool operator<=(const buffers_iterator& a, const buffers_iterator& b)
+  {
+    return !(b < a);
+  }
+
+  /// Compare two iterators.
+  friend bool operator>(const buffers_iterator& a, const buffers_iterator& b)
+  {
+    return b < a;
+  }
+
+  /// Compare two iterators.
+  friend bool operator>=(const buffers_iterator& a, const buffers_iterator& b)
+  {
+    return !(a < b);
+  }
+
+private:
+  // Dereference the iterator.
+  reference dereference() const
+  {
+    return static_cast<pointer>(
+        current_buffer_.data())[current_buffer_position_];
+  }
+
+  // Compare two iterators for equality.
+  bool equal(const buffers_iterator& other) const
+  {
+    return position_ == other.position_;
+  }
+
+  // Increment the iterator.
+  void increment()
+  {
+    ASIO_ASSERT(current_ != end_ && "iterator out of bounds");
+    ++position_;
+
+    // Check if the increment can be satisfied by the current buffer.
+    ++current_buffer_position_;
+    if (current_buffer_position_ != current_buffer_.size())
+      return;
+
+    // Find the next non-empty buffer.
+    ++current_;
+    current_buffer_position_ = 0;
+    while (current_ != end_)
+    {
+      current_buffer_ = *current_;
+      if (current_buffer_.size() > 0)
+        return;
+      ++current_;
+    }
+  }
+
+  // Decrement the iterator.
+  void decrement()
+  {
+    ASIO_ASSERT(position_ > 0 && "iterator out of bounds");
+    --position_;
+
+    // Check if the decrement can be satisfied by the current buffer.
+    if (current_buffer_position_ != 0)
+    {
+      --current_buffer_position_;
+      return;
+    }
+
+    // Find the previous non-empty buffer.
+    buffer_sequence_iterator_type iter = current_;
+    while (iter != begin_)
+    {
+      --iter;
+      buffer_type buffer = *iter;
+      std::size_t buffer_size = buffer.size();
+      if (buffer_size > 0)
+      {
+        current_ = iter;
+        current_buffer_ = buffer;
+        current_buffer_position_ = buffer_size - 1;
+        return;
+      }
+    }
+  }
+
+  // Advance the iterator by the specified distance.
+  void advance(std::ptrdiff_t n)
+  {
+    if (n > 0)
+    {
+      ASIO_ASSERT(current_ != end_ && "iterator out of bounds");
+      for (;;)
+      {
+        std::ptrdiff_t current_buffer_balance
+          = current_buffer_.size() - current_buffer_position_;
+
+        // Check if the advance can be satisfied by the current buffer.
+        if (current_buffer_balance > n)
+        {
+          position_ += n;
+          current_buffer_position_ += n;
+          return;
+        }
+
+        // Update position.
+        n -= current_buffer_balance;
+        position_ += current_buffer_balance;
+
+        // Move to next buffer. If it is empty then it will be skipped on the
+        // next iteration of this loop.
+        if (++current_ == end_)
+        {
+          ASIO_ASSERT(n == 0 && "iterator out of bounds");
+          current_buffer_ = buffer_type();
+          current_buffer_position_ = 0;
+          return;
+        }
+        current_buffer_ = *current_;
+        current_buffer_position_ = 0;
+      }
+    }
+    else if (n < 0)
+    {
+      std::size_t abs_n = -n;
+      ASIO_ASSERT(position_ >= abs_n && "iterator out of bounds");
+      for (;;)
+      {
+        // Check if the advance can be satisfied by the current buffer.
+        if (current_buffer_position_ >= abs_n)
+        {
+          position_ -= abs_n;
+          current_buffer_position_ -= abs_n;
+          return;
+        }
+
+        // Update position.
+        abs_n -= current_buffer_position_;
+        position_ -= current_buffer_position_;
+
+        // Check if we've reached the beginning of the buffers.
+        if (current_ == begin_)
+        {
+          ASIO_ASSERT(abs_n == 0 && "iterator out of bounds");
+          current_buffer_position_ = 0;
+          return;
+        }
+
+        // Find the previous non-empty buffer.
+        buffer_sequence_iterator_type iter = current_;
+        while (iter != begin_)
+        {
+          --iter;
+          buffer_type buffer = *iter;
+          std::size_t buffer_size = buffer.size();
+          if (buffer_size > 0)
+          {
+            current_ = iter;
+            current_buffer_ = buffer;
+            current_buffer_position_ = buffer_size;
+            break;
+          }
+        }
+      }
+    }
+  }
+
+  // Determine the distance between two iterators.
+  std::ptrdiff_t distance_to(const buffers_iterator& other) const
+  {
+    return other.position_ - position_;
+  }
+
+  buffer_type current_buffer_;
+  std::size_t current_buffer_position_;
+  buffer_sequence_iterator_type begin_;
+  buffer_sequence_iterator_type current_;
+  buffer_sequence_iterator_type end_;
+  std::size_t position_;
+};
+
+/// Construct an iterator representing the beginning of the buffers' data.
+template <typename BufferSequence>
+inline buffers_iterator<BufferSequence> buffers_begin(
+    const BufferSequence& buffers)
+{
+  return buffers_iterator<BufferSequence>::begin(buffers);
+}
+
+/// Construct an iterator representing the end of the buffers' data.
+template <typename BufferSequence>
+inline buffers_iterator<BufferSequence> buffers_end(
+    const BufferSequence& buffers)
+{
+  return buffers_iterator<BufferSequence>::end(buffers);
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_BUFFERS_ITERATOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/co_spawn.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/co_spawn.hpp
new file mode 100644
index 00000000000..7afd8ea88bd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/co_spawn.hpp
@@ -0,0 +1,100 @@
+//
+// co_spawn.hpp
+// ~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_CO_SPAWN_HPP
+#define ASIO_CO_SPAWN_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_CO_AWAIT) || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/awaitable.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/is_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+struct awaitable_signature;
+
+template <typename T, typename Executor>
+struct awaitable_signature<awaitable<T, Executor>>
+{
+  typedef void type(std::exception_ptr, T);
+};
+
+template <typename Executor>
+struct awaitable_signature<awaitable<void, Executor>>
+{
+  typedef void type(std::exception_ptr);
+};
+
+} // namespace detail
+
+/// Spawn a new thread of execution.
+/**
+ * The entry point function object @c f must have the signature:
+ *
+ * @code awaitable<void, E> f(); @endcode
+ *
+ * where @c E is convertible from @c Executor.
+ */
+template <typename Executor, typename F,
+    ASIO_COMPLETION_TOKEN_FOR(typename detail::awaitable_signature<
+      typename result_of<F()>::type>::type) CompletionToken
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(Executor)>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken,
+    typename detail::awaitable_signature<typename result_of<F()>::type>::type)
+co_spawn(const Executor& ex, F&& f,
+    CompletionToken&& token
+      ASIO_DEFAULT_COMPLETION_TOKEN(Executor),
+    typename enable_if<
+      is_executor<Executor>::value
+    >::type* = 0);
+
+/// Spawn a new thread of execution.
+/**
+ * The entry point function object @c f must have the signature:
+ *
+ * @code awaitable<void, E> f(); @endcode
+ *
+ * where @c E is convertible from @c ExecutionContext::executor_type.
+ */
+template <typename ExecutionContext, typename F,
+    ASIO_COMPLETION_TOKEN_FOR(typename detail::awaitable_signature<
+      typename result_of<F()>::type>::type) CompletionToken
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename ExecutionContext::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken,
+    typename detail::awaitable_signature<typename result_of<F()>::type>::type)
+co_spawn(ExecutionContext& ctx, F&& f,
+    CompletionToken&& token
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename ExecutionContext::executor_type),
+    typename enable_if<
+      is_convertible<ExecutionContext&, execution_context&>::value
+    >::type* = 0);
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/co_spawn.hpp"
+
+#endif // defined(ASIO_HAS_CO_AWAIT) || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_CO_SPAWN_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/completion_condition.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/completion_condition.hpp
new file mode 100644
index 00000000000..526c034f40c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/completion_condition.hpp
@@ -0,0 +1,218 @@
+//
+// completion_condition.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_COMPLETION_CONDITION_HPP
+#define ASIO_COMPLETION_CONDITION_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail {
+
+// The default maximum number of bytes to transfer in a single operation.
+enum default_max_transfer_size_t { default_max_transfer_size = 65536 };
+
+// Adapt result of old-style completion conditions (which had a bool result
+// where true indicated that the operation was complete).
+inline std::size_t adapt_completion_condition_result(bool result)
+{
+  return result ? 0 : default_max_transfer_size;
+}
+
+// Adapt result of current completion conditions (which have a size_t result
+// where 0 means the operation is complete, and otherwise the result is the
+// maximum number of bytes to transfer on the next underlying operation).
+inline std::size_t adapt_completion_condition_result(std::size_t result)
+{
+  return result;
+}
+
+class transfer_all_t
+{
+public:
+  typedef std::size_t result_type;
+
+  template <typename Error>
+  std::size_t operator()(const Error& err, std::size_t)
+  {
+    return !!err ? 0 : default_max_transfer_size;
+  }
+};
+
+class transfer_at_least_t
+{
+public:
+  typedef std::size_t result_type;
+
+  explicit transfer_at_least_t(std::size_t minimum)
+    : minimum_(minimum)
+  {
+  }
+
+  template <typename Error>
+  std::size_t operator()(const Error& err, std::size_t bytes_transferred)
+  {
+    return (!!err || bytes_transferred >= minimum_)
+      ? 0 : default_max_transfer_size;
+  }
+
+private:
+  std::size_t minimum_;
+};
+
+class transfer_exactly_t
+{
+public:
+  typedef std::size_t result_type;
+
+  explicit transfer_exactly_t(std::size_t size)
+    : size_(size)
+  {
+  }
+
+  template <typename Error>
+  std::size_t operator()(const Error& err, std::size_t bytes_transferred)
+  {
+    return (!!err || bytes_transferred >= size_) ? 0 :
+      (size_ - bytes_transferred < default_max_transfer_size
+        ? size_ - bytes_transferred : std::size_t(default_max_transfer_size));
+  }
+
+private:
+  std::size_t size_;
+};
+
+} // namespace detail
+
+/**
+ * @defgroup completion_condition Completion Condition Function Objects
+ *
+ * Function objects used for determining when a read or write operation should
+ * complete.
+ */
+/*@{*/
+
+/// Return a completion condition function object that indicates that a read or
+/// write operation should continue until all of the data has been transferred,
+/// or until an error occurs.
+/**
+ * This function is used to create an object, of unspecified type, that meets
+ * CompletionCondition requirements.
+ *
+ * @par Example
+ * Reading until a buffer is full:
+ * @code
+ * boost::array<char, 128> buf;
+ * asio::error_code ec;
+ * std::size_t n = asio::read(
+ *     sock, asio::buffer(buf),
+ *     asio::transfer_all(), ec);
+ * if (ec)
+ * {
+ *   // An error occurred.
+ * }
+ * else
+ * {
+ *   // n == 128
+ * }
+ * @endcode
+ */
+#if defined(GENERATING_DOCUMENTATION)
+unspecified transfer_all();
+#else
+inline detail::transfer_all_t transfer_all()
+{
+  return detail::transfer_all_t();
+}
+#endif
+
+/// Return a completion condition function object that indicates that a read or
+/// write operation should continue until a minimum number of bytes has been
+/// transferred, or until an error occurs.
+/**
+ * This function is used to create an object, of unspecified type, that meets
+ * CompletionCondition requirements.
+ *
+ * @par Example
+ * Reading until a buffer is full or contains at least 64 bytes:
+ * @code
+ * boost::array<char, 128> buf;
+ * asio::error_code ec;
+ * std::size_t n = asio::read(
+ *     sock, asio::buffer(buf),
+ *     asio::transfer_at_least(64), ec);
+ * if (ec)
+ * {
+ *   // An error occurred.
+ * }
+ * else
+ * {
+ *   // n >= 64 && n <= 128
+ * }
+ * @endcode
+ */
+#if defined(GENERATING_DOCUMENTATION)
+unspecified transfer_at_least(std::size_t minimum);
+#else
+inline detail::transfer_at_least_t transfer_at_least(std::size_t minimum)
+{
+  return detail::transfer_at_least_t(minimum);
+}
+#endif
+
+/// Return a completion condition function object that indicates that a read or
+/// write operation should continue until an exact number of bytes has been
+/// transferred, or until an error occurs.
+/**
+ * This function is used to create an object, of unspecified type, that meets
+ * CompletionCondition requirements.
+ *
+ * @par Example
+ * Reading until a buffer is full or contains exactly 64 bytes:
+ * @code
+ * boost::array<char, 128> buf;
+ * asio::error_code ec;
+ * std::size_t n = asio::read(
+ *     sock, asio::buffer(buf),
+ *     asio::transfer_exactly(64), ec);
+ * if (ec)
+ * {
+ *   // An error occurred.
+ * }
+ * else
+ * {
+ *   // n == 64
+ * }
+ * @endcode
+ */
+#if defined(GENERATING_DOCUMENTATION)
+unspecified transfer_exactly(std::size_t size);
+#else
+inline detail::transfer_exactly_t transfer_exactly(std::size_t size)
+{
+  return detail::transfer_exactly_t(size);
+}
+#endif
+
+/*@}*/
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_COMPLETION_CONDITION_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/compose.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/compose.hpp
new file mode 100644
index 00000000000..9d7b67224c4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/compose.hpp
@@ -0,0 +1,136 @@
+//
+// compose.hpp
+// ~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_COMPOSE_HPP
+#define ASIO_COMPOSE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/async_result.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Launch an asynchronous operation with a stateful implementation.
+/**
+ * The async_compose function simplifies the implementation of composed
+ * asynchronous operations automatically wrapping a stateful function object
+ * with a conforming intermediate completion handler.
+ *
+ * @param implementation A function object that contains the implementation of
+ * the composed asynchronous operation. The first argument to the function
+ * object is a non-const reference to the enclosing intermediate completion
+ * handler. The remaining arguments are any arguments that originate from the
+ * completion handlers of any asynchronous operations performed by the
+ * implementation.
+
+ * @param token The completion token.
+ *
+ * @param io_objects_or_executors Zero or more I/O objects or I/O executors for
+ * which outstanding work must be maintained.
+ *
+ * @par Example:
+ *
+ * @code struct async_echo_implementation
+ * {
+ *   tcp::socket& socket_;
+ *   asio::mutable_buffer buffer_;
+ *   enum { starting, reading, writing } state_;
+ *
+ *   template <typename Self>
+ *   void operator()(Self& self,
+ *       asio::error_code error = {},
+ *       std::size_t n = 0)
+ *   {
+ *     switch (state_)
+ *     {
+ *     case starting:
+ *       state_ = reading;
+ *       socket_.async_read_some(
+ *           buffer_, std::move(self));
+ *       break;
+ *     case reading:
+ *       if (error)
+ *       {
+ *         self.complete(error, 0);
+ *       }
+ *       else
+ *       {
+ *         state_ = writing;
+ *         asio::async_write(socket_, buffer_,
+ *             asio::transfer_exactly(n),
+ *             std::move(self));
+ *       }
+ *       break;
+ *     case writing:
+ *       self.complete(error, n);
+ *       break;
+ *     }
+ *   }
+ * };
+ *
+ * template <typename CompletionToken>
+ * auto async_echo(tcp::socket& socket,
+ *     asio::mutable_buffer buffer,
+ *     CompletionToken&& token) ->
+ *   typename asio::async_result<
+ *     typename std::decay<CompletionToken>::type,
+ *       void(asio::error_code, std::size_t)>::return_type
+ * {
+ *   return asio::async_compose<CompletionToken,
+ *     void(asio::error_code, std::size_t)>(
+ *       async_echo_implementation{socket, buffer,
+ *         async_echo_implementation::starting},
+ *       token, socket);
+ * } @endcode
+ */
+template <typename CompletionToken, typename Signature,
+    typename Implementation, typename... IoObjectsOrExecutors>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, Signature)
+async_compose(ASIO_MOVE_ARG(Implementation) implementation,
+    ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token,
+    ASIO_MOVE_ARG(IoObjectsOrExecutors)... io_objects_or_executors);
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+      //   || defined(GENERATING_DOCUMENTATION)
+
+template <typename CompletionToken, typename Signature, typename Implementation>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, Signature)
+async_compose(ASIO_MOVE_ARG(Implementation) implementation,
+    ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token);
+
+#define ASIO_PRIVATE_ASYNC_COMPOSE_DEF(n) \
+  template <typename CompletionToken, typename Signature, \
+      typename Implementation, ASIO_VARIADIC_TPARAMS(n)> \
+  ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, Signature) \
+  async_compose(ASIO_MOVE_ARG(Implementation) implementation, \
+      ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token, \
+      ASIO_VARIADIC_MOVE_PARAMS(n));
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_ASYNC_COMPOSE_DEF)
+#undef ASIO_PRIVATE_ASYNC_COMPOSE_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/compose.hpp"
+
+#endif // ASIO_COMPOSE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/connect.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/connect.hpp
new file mode 100644
index 00000000000..7175f4b5f22
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/connect.hpp
@@ -0,0 +1,1076 @@
+//
+// connect.hpp
+// ~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_CONNECT_HPP
+#define ASIO_CONNECT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/async_result.hpp"
+#include "asio/basic_socket.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail
+{
+  char (&has_iterator_helper(...))[2];
+
+  template <typename T>
+  char has_iterator_helper(T*, typename T::iterator* = 0);
+
+  template <typename T>
+  struct has_iterator_typedef
+  {
+    enum { value = (sizeof((has_iterator_helper)((T*)(0))) == 1) };
+  };
+} // namespace detail
+
+/// Type trait used to determine whether a type is an endpoint sequence that can
+/// be used with with @c connect and @c async_connect.
+template <typename T>
+struct is_endpoint_sequence
+{
+#if defined(GENERATING_DOCUMENTATION)
+  /// The value member is true if the type may be used as an endpoint sequence.
+  static const bool value;
+#else
+  enum
+  {
+    value = detail::has_iterator_typedef<T>::value
+  };
+#endif
+};
+
+/**
+ * @defgroup connect asio::connect
+ *
+ * @brief The @c connect function is a composed operation that establishes a
+ * socket connection by trying each endpoint in a sequence.
+ */
+/*@{*/
+
+/// Establishes a socket connection by trying each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param endpoints A sequence of endpoints.
+ *
+ * @returns The successfully connected endpoint.
+ *
+ * @throws asio::system_error Thrown on failure. If the sequence is
+ * empty, the associated @c error_code is asio::error::not_found.
+ * Otherwise, contains the error from the last connection attempt.
+ *
+ * @par Example
+ * @code tcp::resolver r(my_context);
+ * tcp::resolver::query q("host", "service");
+ * tcp::socket s(my_context);
+ * asio::connect(s, r.resolve(q)); @endcode
+ */
+template <typename Protocol, typename Executor, typename EndpointSequence>
+typename Protocol::endpoint connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints,
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type* = 0);
+
+/// Establishes a socket connection by trying each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param endpoints A sequence of endpoints.
+ *
+ * @param ec Set to indicate what error occurred, if any. If the sequence is
+ * empty, set to asio::error::not_found. Otherwise, contains the error
+ * from the last connection attempt.
+ *
+ * @returns On success, the successfully connected endpoint. Otherwise, a
+ * default-constructed endpoint.
+ *
+ * @par Example
+ * @code tcp::resolver r(my_context);
+ * tcp::resolver::query q("host", "service");
+ * tcp::socket s(my_context);
+ * asio::error_code ec;
+ * asio::connect(s, r.resolve(q), ec);
+ * if (ec)
+ * {
+ *   // An error occurred.
+ * } @endcode
+ */
+template <typename Protocol, typename Executor, typename EndpointSequence>
+typename Protocol::endpoint connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints, asio::error_code& ec,
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type* = 0);
+
+#if !defined(ASIO_NO_DEPRECATED)
+/// (Deprecated: Use range overload.) Establishes a socket connection by trying
+/// each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @returns On success, an iterator denoting the successfully connected
+ * endpoint. Otherwise, the end iterator.
+ *
+ * @throws asio::system_error Thrown on failure. If the sequence is
+ * empty, the associated @c error_code is asio::error::not_found.
+ * Otherwise, contains the error from the last connection attempt.
+ *
+ * @note This overload assumes that a default constructed object of type @c
+ * Iterator represents the end of the sequence. This is a valid assumption for
+ * iterator types such as @c asio::ip::tcp::resolver::iterator.
+ */
+template <typename Protocol, typename Executor, typename Iterator>
+Iterator connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type* = 0);
+
+/// (Deprecated: Use range overload.) Establishes a socket connection by trying
+/// each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @param ec Set to indicate what error occurred, if any. If the sequence is
+ * empty, set to asio::error::not_found. Otherwise, contains the error
+ * from the last connection attempt.
+ *
+ * @returns On success, an iterator denoting the successfully connected
+ * endpoint. Otherwise, the end iterator.
+ *
+ * @note This overload assumes that a default constructed object of type @c
+ * Iterator represents the end of the sequence. This is a valid assumption for
+ * iterator types such as @c asio::ip::tcp::resolver::iterator.
+ */
+template <typename Protocol, typename Executor, typename Iterator>
+Iterator connect(basic_socket<Protocol, Executor>& s,
+    Iterator begin, asio::error_code& ec,
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type* = 0);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+/// Establishes a socket connection by trying each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @param end An iterator pointing to the end of a sequence of endpoints.
+ *
+ * @returns An iterator denoting the successfully connected endpoint.
+ *
+ * @throws asio::system_error Thrown on failure. If the sequence is
+ * empty, the associated @c error_code is asio::error::not_found.
+ * Otherwise, contains the error from the last connection attempt.
+ *
+ * @par Example
+ * @code tcp::resolver r(my_context);
+ * tcp::resolver::query q("host", "service");
+ * tcp::resolver::results_type e = r.resolve(q);
+ * tcp::socket s(my_context);
+ * asio::connect(s, e.begin(), e.end()); @endcode
+ */
+template <typename Protocol, typename Executor, typename Iterator>
+Iterator connect(basic_socket<Protocol, Executor>& s,
+    Iterator begin, Iterator end);
+
+/// Establishes a socket connection by trying each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @param end An iterator pointing to the end of a sequence of endpoints.
+ *
+ * @param ec Set to indicate what error occurred, if any. If the sequence is
+ * empty, set to asio::error::not_found. Otherwise, contains the error
+ * from the last connection attempt.
+ *
+ * @returns On success, an iterator denoting the successfully connected
+ * endpoint. Otherwise, the end iterator.
+ *
+ * @par Example
+ * @code tcp::resolver r(my_context);
+ * tcp::resolver::query q("host", "service");
+ * tcp::resolver::results_type e = r.resolve(q);
+ * tcp::socket s(my_context);
+ * asio::error_code ec;
+ * asio::connect(s, e.begin(), e.end(), ec);
+ * if (ec)
+ * {
+ *   // An error occurred.
+ * } @endcode
+ */
+template <typename Protocol, typename Executor, typename Iterator>
+Iterator connect(basic_socket<Protocol, Executor>& s,
+    Iterator begin, Iterator end, asio::error_code& ec);
+
+/// Establishes a socket connection by trying each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param endpoints A sequence of endpoints.
+ *
+ * @param connect_condition A function object that is called prior to each
+ * connection attempt. The signature of the function object must be:
+ * @code bool connect_condition(
+ *     const asio::error_code& ec,
+ *     const typename Protocol::endpoint& next); @endcode
+ * The @c ec parameter contains the result from the most recent connect
+ * operation. Before the first connection attempt, @c ec is always set to
+ * indicate success. The @c next parameter is the next endpoint to be tried.
+ * The function object should return true if the next endpoint should be tried,
+ * and false if it should be skipped.
+ *
+ * @returns The successfully connected endpoint.
+ *
+ * @throws asio::system_error Thrown on failure. If the sequence is
+ * empty, the associated @c error_code is asio::error::not_found.
+ * Otherwise, contains the error from the last connection attempt.
+ *
+ * @par Example
+ * The following connect condition function object can be used to output
+ * information about the individual connection attempts:
+ * @code struct my_connect_condition
+ * {
+ *   bool operator()(
+ *       const asio::error_code& ec,
+ *       const::tcp::endpoint& next)
+ *   {
+ *     if (ec) std::cout << "Error: " << ec.message() << std::endl;
+ *     std::cout << "Trying: " << next << std::endl;
+ *     return true;
+ *   }
+ * }; @endcode
+ * It would be used with the asio::connect function as follows:
+ * @code tcp::resolver r(my_context);
+ * tcp::resolver::query q("host", "service");
+ * tcp::socket s(my_context);
+ * tcp::endpoint e = asio::connect(s,
+ *     r.resolve(q), my_connect_condition());
+ * std::cout << "Connected to: " << e << std::endl; @endcode
+ */
+template <typename Protocol, typename Executor,
+    typename EndpointSequence, typename ConnectCondition>
+typename Protocol::endpoint connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints, ConnectCondition connect_condition,
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type* = 0);
+
+/// Establishes a socket connection by trying each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param endpoints A sequence of endpoints.
+ *
+ * @param connect_condition A function object that is called prior to each
+ * connection attempt. The signature of the function object must be:
+ * @code bool connect_condition(
+ *     const asio::error_code& ec,
+ *     const typename Protocol::endpoint& next); @endcode
+ * The @c ec parameter contains the result from the most recent connect
+ * operation. Before the first connection attempt, @c ec is always set to
+ * indicate success. The @c next parameter is the next endpoint to be tried.
+ * The function object should return true if the next endpoint should be tried,
+ * and false if it should be skipped.
+ *
+ * @param ec Set to indicate what error occurred, if any. If the sequence is
+ * empty, set to asio::error::not_found. Otherwise, contains the error
+ * from the last connection attempt.
+ *
+ * @returns On success, the successfully connected endpoint. Otherwise, a
+ * default-constructed endpoint.
+ *
+ * @par Example
+ * The following connect condition function object can be used to output
+ * information about the individual connection attempts:
+ * @code struct my_connect_condition
+ * {
+ *   bool operator()(
+ *       const asio::error_code& ec,
+ *       const::tcp::endpoint& next)
+ *   {
+ *     if (ec) std::cout << "Error: " << ec.message() << std::endl;
+ *     std::cout << "Trying: " << next << std::endl;
+ *     return true;
+ *   }
+ * }; @endcode
+ * It would be used with the asio::connect function as follows:
+ * @code tcp::resolver r(my_context);
+ * tcp::resolver::query q("host", "service");
+ * tcp::socket s(my_context);
+ * asio::error_code ec;
+ * tcp::endpoint e = asio::connect(s,
+ *     r.resolve(q), my_connect_condition(), ec);
+ * if (ec)
+ * {
+ *   // An error occurred.
+ * }
+ * else
+ * {
+ *   std::cout << "Connected to: " << e << std::endl;
+ * } @endcode
+ */
+template <typename Protocol, typename Executor,
+    typename EndpointSequence, typename ConnectCondition>
+typename Protocol::endpoint connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints, ConnectCondition connect_condition,
+    asio::error_code& ec,
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type* = 0);
+
+#if !defined(ASIO_NO_DEPRECATED)
+/// (Deprecated: Use range overload.) Establishes a socket connection by trying
+/// each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @param connect_condition A function object that is called prior to each
+ * connection attempt. The signature of the function object must be:
+ * @code bool connect_condition(
+ *     const asio::error_code& ec,
+ *     const typename Protocol::endpoint& next); @endcode
+ * The @c ec parameter contains the result from the most recent connect
+ * operation. Before the first connection attempt, @c ec is always set to
+ * indicate success. The @c next parameter is the next endpoint to be tried.
+ * The function object should return true if the next endpoint should be tried,
+ * and false if it should be skipped.
+ *
+ * @returns On success, an iterator denoting the successfully connected
+ * endpoint. Otherwise, the end iterator.
+ *
+ * @throws asio::system_error Thrown on failure. If the sequence is
+ * empty, the associated @c error_code is asio::error::not_found.
+ * Otherwise, contains the error from the last connection attempt.
+ *
+ * @note This overload assumes that a default constructed object of type @c
+ * Iterator represents the end of the sequence. This is a valid assumption for
+ * iterator types such as @c asio::ip::tcp::resolver::iterator.
+ */
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition>
+Iterator connect(basic_socket<Protocol, Executor>& s,
+    Iterator begin, ConnectCondition connect_condition,
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type* = 0);
+
+/// (Deprecated: Use range overload.) Establishes a socket connection by trying
+/// each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @param connect_condition A function object that is called prior to each
+ * connection attempt. The signature of the function object must be:
+ * @code bool connect_condition(
+ *     const asio::error_code& ec,
+ *     const typename Protocol::endpoint& next); @endcode
+ * The @c ec parameter contains the result from the most recent connect
+ * operation. Before the first connection attempt, @c ec is always set to
+ * indicate success. The @c next parameter is the next endpoint to be tried.
+ * The function object should return true if the next endpoint should be tried,
+ * and false if it should be skipped.
+ *
+ * @param ec Set to indicate what error occurred, if any. If the sequence is
+ * empty, set to asio::error::not_found. Otherwise, contains the error
+ * from the last connection attempt.
+ *
+ * @returns On success, an iterator denoting the successfully connected
+ * endpoint. Otherwise, the end iterator.
+ *
+ * @note This overload assumes that a default constructed object of type @c
+ * Iterator represents the end of the sequence. This is a valid assumption for
+ * iterator types such as @c asio::ip::tcp::resolver::iterator.
+ */
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition>
+Iterator connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    ConnectCondition connect_condition, asio::error_code& ec,
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type* = 0);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+/// Establishes a socket connection by trying each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @param end An iterator pointing to the end of a sequence of endpoints.
+ *
+ * @param connect_condition A function object that is called prior to each
+ * connection attempt. The signature of the function object must be:
+ * @code bool connect_condition(
+ *     const asio::error_code& ec,
+ *     const typename Protocol::endpoint& next); @endcode
+ * The @c ec parameter contains the result from the most recent connect
+ * operation. Before the first connection attempt, @c ec is always set to
+ * indicate success. The @c next parameter is the next endpoint to be tried.
+ * The function object should return true if the next endpoint should be tried,
+ * and false if it should be skipped.
+ *
+ * @returns An iterator denoting the successfully connected endpoint.
+ *
+ * @throws asio::system_error Thrown on failure. If the sequence is
+ * empty, the associated @c error_code is asio::error::not_found.
+ * Otherwise, contains the error from the last connection attempt.
+ *
+ * @par Example
+ * The following connect condition function object can be used to output
+ * information about the individual connection attempts:
+ * @code struct my_connect_condition
+ * {
+ *   bool operator()(
+ *       const asio::error_code& ec,
+ *       const::tcp::endpoint& next)
+ *   {
+ *     if (ec) std::cout << "Error: " << ec.message() << std::endl;
+ *     std::cout << "Trying: " << next << std::endl;
+ *     return true;
+ *   }
+ * }; @endcode
+ * It would be used with the asio::connect function as follows:
+ * @code tcp::resolver r(my_context);
+ * tcp::resolver::query q("host", "service");
+ * tcp::resolver::results_type e = r.resolve(q);
+ * tcp::socket s(my_context);
+ * tcp::resolver::results_type::iterator i = asio::connect(
+ *     s, e.begin(), e.end(), my_connect_condition());
+ * std::cout << "Connected to: " << i->endpoint() << std::endl; @endcode
+ */
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition>
+Iterator connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    Iterator end, ConnectCondition connect_condition);
+
+/// Establishes a socket connection by trying each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c connect member
+ * function, once for each endpoint in the sequence, until a connection is
+ * successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @param end An iterator pointing to the end of a sequence of endpoints.
+ *
+ * @param connect_condition A function object that is called prior to each
+ * connection attempt. The signature of the function object must be:
+ * @code bool connect_condition(
+ *     const asio::error_code& ec,
+ *     const typename Protocol::endpoint& next); @endcode
+ * The @c ec parameter contains the result from the most recent connect
+ * operation. Before the first connection attempt, @c ec is always set to
+ * indicate success. The @c next parameter is the next endpoint to be tried.
+ * The function object should return true if the next endpoint should be tried,
+ * and false if it should be skipped.
+ *
+ * @param ec Set to indicate what error occurred, if any. If the sequence is
+ * empty, set to asio::error::not_found. Otherwise, contains the error
+ * from the last connection attempt.
+ *
+ * @returns On success, an iterator denoting the successfully connected
+ * endpoint. Otherwise, the end iterator.
+ *
+ * @par Example
+ * The following connect condition function object can be used to output
+ * information about the individual connection attempts:
+ * @code struct my_connect_condition
+ * {
+ *   bool operator()(
+ *       const asio::error_code& ec,
+ *       const::tcp::endpoint& next)
+ *   {
+ *     if (ec) std::cout << "Error: " << ec.message() << std::endl;
+ *     std::cout << "Trying: " << next << std::endl;
+ *     return true;
+ *   }
+ * }; @endcode
+ * It would be used with the asio::connect function as follows:
+ * @code tcp::resolver r(my_context);
+ * tcp::resolver::query q("host", "service");
+ * tcp::resolver::results_type e = r.resolve(q);
+ * tcp::socket s(my_context);
+ * asio::error_code ec;
+ * tcp::resolver::results_type::iterator i = asio::connect(
+ *     s, e.begin(), e.end(), my_connect_condition());
+ * if (ec)
+ * {
+ *   // An error occurred.
+ * }
+ * else
+ * {
+ *   std::cout << "Connected to: " << i->endpoint() << std::endl;
+ * } @endcode
+ */
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition>
+Iterator connect(basic_socket<Protocol, Executor>& s,
+    Iterator begin, Iterator end, ConnectCondition connect_condition,
+    asio::error_code& ec);
+
+/*@}*/
+
+/**
+ * @defgroup async_connect asio::async_connect
+ *
+ * @brief The @c async_connect function is a composed asynchronous operation
+ * that establishes a socket connection by trying each endpoint in a sequence.
+ */
+/*@{*/
+
+/// Asynchronously establishes a socket connection by trying each endpoint in a
+/// sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c async_connect
+ * member function, once for each endpoint in the sequence, until a connection
+ * is successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param endpoints A sequence of endpoints.
+ *
+ * @param handler The handler to be called when the connect operation
+ * completes. Copies will be made of the handler as required. The function
+ * signature of the handler must be:
+ * @code void handler(
+ *   // Result of operation. if the sequence is empty, set to
+ *   // asio::error::not_found. Otherwise, contains the
+ *   // error from the last connection attempt.
+ *   const asio::error_code& error,
+ *
+ *   // On success, the successfully connected endpoint.
+ *   // Otherwise, a default-constructed endpoint.
+ *   const typename Protocol::endpoint& endpoint
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * @code tcp::resolver r(my_context);
+ * tcp::resolver::query q("host", "service");
+ * tcp::socket s(my_context);
+ *
+ * // ...
+ *
+ * r.async_resolve(q, resolve_handler);
+ *
+ * // ...
+ *
+ * void resolve_handler(
+ *     const asio::error_code& ec,
+ *     tcp::resolver::results_type results)
+ * {
+ *   if (!ec)
+ *   {
+ *     asio::async_connect(s, results, connect_handler);
+ *   }
+ * }
+ *
+ * // ...
+ *
+ * void connect_handler(
+ *     const asio::error_code& ec,
+ *     const tcp::endpoint& endpoint)
+ * {
+ *   // ...
+ * } @endcode
+ */
+template <typename Protocol, typename Executor, typename EndpointSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      typename Protocol::endpoint)) RangeConnectHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(Executor)>
+ASIO_INITFN_AUTO_RESULT_TYPE(RangeConnectHandler,
+    void (asio::error_code, typename Protocol::endpoint))
+async_connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints,
+    ASIO_MOVE_ARG(RangeConnectHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(Executor),
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type* = 0);
+
+#if !defined(ASIO_NO_DEPRECATED)
+/// (Deprecated: Use range overload.) Asynchronously establishes a socket
+/// connection by trying each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c async_connect
+ * member function, once for each endpoint in the sequence, until a connection
+ * is successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @param handler The handler to be called when the connect operation
+ * completes. Copies will be made of the handler as required. The function
+ * signature of the handler must be:
+ * @code void handler(
+ *   // Result of operation. if the sequence is empty, set to
+ *   // asio::error::not_found. Otherwise, contains the
+ *   // error from the last connection attempt.
+ *   const asio::error_code& error,
+ *
+ *   // On success, an iterator denoting the successfully
+ *   // connected endpoint. Otherwise, the end iterator.
+ *   Iterator iterator
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note This overload assumes that a default constructed object of type @c
+ * Iterator represents the end of the sequence. This is a valid assumption for
+ * iterator types such as @c asio::ip::tcp::resolver::iterator.
+ */
+template <typename Protocol, typename Executor, typename Iterator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      Iterator)) IteratorConnectHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(Executor)>
+ASIO_INITFN_AUTO_RESULT_TYPE(IteratorConnectHandler,
+    void (asio::error_code, Iterator))
+async_connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    ASIO_MOVE_ARG(IteratorConnectHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(Executor),
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type* = 0);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+/// Asynchronously establishes a socket connection by trying each endpoint in a
+/// sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c async_connect
+ * member function, once for each endpoint in the sequence, until a connection
+ * is successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @param end An iterator pointing to the end of a sequence of endpoints.
+ *
+ * @param handler The handler to be called when the connect operation
+ * completes. Copies will be made of the handler as required. The function
+ * signature of the handler must be:
+ * @code void handler(
+ *   // Result of operation. if the sequence is empty, set to
+ *   // asio::error::not_found. Otherwise, contains the
+ *   // error from the last connection attempt.
+ *   const asio::error_code& error,
+ *
+ *   // On success, an iterator denoting the successfully
+ *   // connected endpoint. Otherwise, the end iterator.
+ *   Iterator iterator
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * @code std::vector<tcp::endpoint> endpoints = ...;
+ * tcp::socket s(my_context);
+ * asio::async_connect(s,
+ *     endpoints.begin(), endpoints.end(),
+ *     connect_handler);
+ *
+ * // ...
+ *
+ * void connect_handler(
+ *     const asio::error_code& ec,
+ *     std::vector<tcp::endpoint>::iterator i)
+ * {
+ *   // ...
+ * } @endcode
+ */
+template <typename Protocol, typename Executor, typename Iterator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      Iterator)) IteratorConnectHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(Executor)>
+ASIO_INITFN_AUTO_RESULT_TYPE(IteratorConnectHandler,
+    void (asio::error_code, Iterator))
+async_connect(basic_socket<Protocol, Executor>& s, Iterator begin, Iterator end,
+    ASIO_MOVE_ARG(IteratorConnectHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(Executor));
+
+/// Asynchronously establishes a socket connection by trying each endpoint in a
+/// sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c async_connect
+ * member function, once for each endpoint in the sequence, until a connection
+ * is successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param endpoints A sequence of endpoints.
+ *
+ * @param connect_condition A function object that is called prior to each
+ * connection attempt. The signature of the function object must be:
+ * @code bool connect_condition(
+ *     const asio::error_code& ec,
+ *     const typename Protocol::endpoint& next); @endcode
+ * The @c ec parameter contains the result from the most recent connect
+ * operation. Before the first connection attempt, @c ec is always set to
+ * indicate success. The @c next parameter is the next endpoint to be tried.
+ * The function object should return true if the next endpoint should be tried,
+ * and false if it should be skipped.
+ *
+ * @param handler The handler to be called when the connect operation
+ * completes. Copies will be made of the handler as required. The function
+ * signature of the handler must be:
+ * @code void handler(
+ *   // Result of operation. if the sequence is empty, set to
+ *   // asio::error::not_found. Otherwise, contains the
+ *   // error from the last connection attempt.
+ *   const asio::error_code& error,
+ *
+ *   // On success, an iterator denoting the successfully
+ *   // connected endpoint. Otherwise, the end iterator.
+ *   Iterator iterator
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * The following connect condition function object can be used to output
+ * information about the individual connection attempts:
+ * @code struct my_connect_condition
+ * {
+ *   bool operator()(
+ *       const asio::error_code& ec,
+ *       const::tcp::endpoint& next)
+ *   {
+ *     if (ec) std::cout << "Error: " << ec.message() << std::endl;
+ *     std::cout << "Trying: " << next << std::endl;
+ *     return true;
+ *   }
+ * }; @endcode
+ * It would be used with the asio::connect function as follows:
+ * @code tcp::resolver r(my_context);
+ * tcp::resolver::query q("host", "service");
+ * tcp::socket s(my_context);
+ *
+ * // ...
+ *
+ * r.async_resolve(q, resolve_handler);
+ *
+ * // ...
+ *
+ * void resolve_handler(
+ *     const asio::error_code& ec,
+ *     tcp::resolver::results_type results)
+ * {
+ *   if (!ec)
+ *   {
+ *     asio::async_connect(s, results,
+ *         my_connect_condition(),
+ *         connect_handler);
+ *   }
+ * }
+ *
+ * // ...
+ *
+ * void connect_handler(
+ *     const asio::error_code& ec,
+ *     const tcp::endpoint& endpoint)
+ * {
+ *   if (ec)
+ *   {
+ *     // An error occurred.
+ *   }
+ *   else
+ *   {
+ *     std::cout << "Connected to: " << endpoint << std::endl;
+ *   }
+ * } @endcode
+ */
+template <typename Protocol, typename Executor,
+    typename EndpointSequence, typename ConnectCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      typename Protocol::endpoint)) RangeConnectHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(Executor)>
+ASIO_INITFN_AUTO_RESULT_TYPE(RangeConnectHandler,
+    void (asio::error_code, typename Protocol::endpoint))
+async_connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints, ConnectCondition connect_condition,
+    ASIO_MOVE_ARG(RangeConnectHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(Executor),
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type* = 0);
+
+#if !defined(ASIO_NO_DEPRECATED)
+/// (Deprecated: Use range overload.) Asynchronously establishes a socket
+/// connection by trying each endpoint in a sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c async_connect
+ * member function, once for each endpoint in the sequence, until a connection
+ * is successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @param connect_condition A function object that is called prior to each
+ * connection attempt. The signature of the function object must be:
+ * @code bool connect_condition(
+ *     const asio::error_code& ec,
+ *     const typename Protocol::endpoint& next); @endcode
+ * The @c ec parameter contains the result from the most recent connect
+ * operation. Before the first connection attempt, @c ec is always set to
+ * indicate success. The @c next parameter is the next endpoint to be tried.
+ * The function object should return true if the next endpoint should be tried,
+ * and false if it should be skipped.
+ *
+ * @param handler The handler to be called when the connect operation
+ * completes. Copies will be made of the handler as required. The function
+ * signature of the handler must be:
+ * @code void handler(
+ *   // Result of operation. if the sequence is empty, set to
+ *   // asio::error::not_found. Otherwise, contains the
+ *   // error from the last connection attempt.
+ *   const asio::error_code& error,
+ *
+ *   // On success, an iterator denoting the successfully
+ *   // connected endpoint. Otherwise, the end iterator.
+ *   Iterator iterator
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note This overload assumes that a default constructed object of type @c
+ * Iterator represents the end of the sequence. This is a valid assumption for
+ * iterator types such as @c asio::ip::tcp::resolver::iterator.
+ */
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      Iterator)) IteratorConnectHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(Executor)>
+ASIO_INITFN_AUTO_RESULT_TYPE(IteratorConnectHandler,
+    void (asio::error_code, Iterator))
+async_connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    ConnectCondition connect_condition,
+    ASIO_MOVE_ARG(IteratorConnectHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(Executor),
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type* = 0);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+/// Asynchronously establishes a socket connection by trying each endpoint in a
+/// sequence.
+/**
+ * This function attempts to connect a socket to one of a sequence of
+ * endpoints. It does this by repeated calls to the socket's @c async_connect
+ * member function, once for each endpoint in the sequence, until a connection
+ * is successfully established.
+ *
+ * @param s The socket to be connected. If the socket is already open, it will
+ * be closed.
+ *
+ * @param begin An iterator pointing to the start of a sequence of endpoints.
+ *
+ * @param end An iterator pointing to the end of a sequence of endpoints.
+ *
+ * @param connect_condition A function object that is called prior to each
+ * connection attempt. The signature of the function object must be:
+ * @code bool connect_condition(
+ *     const asio::error_code& ec,
+ *     const typename Protocol::endpoint& next); @endcode
+ * The @c ec parameter contains the result from the most recent connect
+ * operation. Before the first connection attempt, @c ec is always set to
+ * indicate success. The @c next parameter is the next endpoint to be tried.
+ * The function object should return true if the next endpoint should be tried,
+ * and false if it should be skipped.
+ *
+ * @param handler The handler to be called when the connect operation
+ * completes. Copies will be made of the handler as required. The function
+ * signature of the handler must be:
+ * @code void handler(
+ *   // Result of operation. if the sequence is empty, set to
+ *   // asio::error::not_found. Otherwise, contains the
+ *   // error from the last connection attempt.
+ *   const asio::error_code& error,
+ *
+ *   // On success, an iterator denoting the successfully
+ *   // connected endpoint. Otherwise, the end iterator.
+ *   Iterator iterator
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * The following connect condition function object can be used to output
+ * information about the individual connection attempts:
+ * @code struct my_connect_condition
+ * {
+ *   bool operator()(
+ *       const asio::error_code& ec,
+ *       const::tcp::endpoint& next)
+ *   {
+ *     if (ec) std::cout << "Error: " << ec.message() << std::endl;
+ *     std::cout << "Trying: " << next << std::endl;
+ *     return true;
+ *   }
+ * }; @endcode
+ * It would be used with the asio::connect function as follows:
+ * @code tcp::resolver r(my_context);
+ * tcp::resolver::query q("host", "service");
+ * tcp::socket s(my_context);
+ *
+ * // ...
+ *
+ * r.async_resolve(q, resolve_handler);
+ *
+ * // ...
+ *
+ * void resolve_handler(
+ *     const asio::error_code& ec,
+ *     tcp::resolver::iterator i)
+ * {
+ *   if (!ec)
+ *   {
+ *     tcp::resolver::iterator end;
+ *     asio::async_connect(s, i, end,
+ *         my_connect_condition(),
+ *         connect_handler);
+ *   }
+ * }
+ *
+ * // ...
+ *
+ * void connect_handler(
+ *     const asio::error_code& ec,
+ *     tcp::resolver::iterator i)
+ * {
+ *   if (ec)
+ *   {
+ *     // An error occurred.
+ *   }
+ *   else
+ *   {
+ *     std::cout << "Connected to: " << i->endpoint() << std::endl;
+ *   }
+ * } @endcode
+ */
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      Iterator)) IteratorConnectHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(Executor)>
+ASIO_INITFN_AUTO_RESULT_TYPE(IteratorConnectHandler,
+    void (asio::error_code, Iterator))
+async_connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    Iterator end, ConnectCondition connect_condition,
+    ASIO_MOVE_ARG(IteratorConnectHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(Executor));
+
+/*@}*/
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/connect.hpp"
+
+#endif
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/coroutine.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/coroutine.hpp
new file mode 100644
index 00000000000..7c8e5799aa2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/coroutine.hpp
@@ -0,0 +1,328 @@
+//
+// coroutine.hpp
+// ~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_COROUTINE_HPP
+#define ASIO_COROUTINE_HPP
+
+namespace asio {
+namespace detail {
+
+class coroutine_ref;
+
+} // namespace detail
+
+/// Provides support for implementing stackless coroutines.
+/**
+ * The @c coroutine class may be used to implement stackless coroutines. The
+ * class itself is used to store the current state of the coroutine.
+ *
+ * Coroutines are copy-constructible and assignable, and the space overhead is
+ * a single int. They can be used as a base class:
+ *
+ * @code class session : coroutine
+ * {
+ *   ...
+ * }; @endcode
+ *
+ * or as a data member:
+ *
+ * @code class session
+ * {
+ *   ...
+ *   coroutine coro_;
+ * }; @endcode
+ *
+ * or even bound in as a function argument using lambdas or @c bind(). The
+ * important thing is that as the application maintains a copy of the object
+ * for as long as the coroutine must be kept alive.
+ *
+ * @par Pseudo-keywords
+ *
+ * A coroutine is used in conjunction with certain "pseudo-keywords", which
+ * are implemented as macros. These macros are defined by a header file:
+ *
+ * @code #include <asio/yield.hpp>@endcode
+ *
+ * and may conversely be undefined as follows:
+ *
+ * @code #include <asio/unyield.hpp>@endcode
+ *
+ * <b>reenter</b>
+ *
+ * The @c reenter macro is used to define the body of a coroutine. It takes a
+ * single argument: a pointer or reference to a coroutine object. For example,
+ * if the base class is a coroutine object you may write:
+ *
+ * @code reenter (this)
+ * {
+ *   ... coroutine body ...
+ * } @endcode
+ *
+ * and if a data member or other variable you can write:
+ *
+ * @code reenter (coro_)
+ * {
+ *   ... coroutine body ...
+ * } @endcode
+ *
+ * When @c reenter is executed at runtime, control jumps to the location of the
+ * last @c yield or @c fork.
+ *
+ * The coroutine body may also be a single statement, such as:
+ *
+ * @code reenter (this) for (;;)
+ * {
+ *   ...
+ * } @endcode
+ *
+ * @b Limitation: The @c reenter macro is implemented using a switch. This
+ * means that you must take care when using local variables within the
+ * coroutine body. The local variable is not allowed in a position where
+ * reentering the coroutine could bypass the variable definition.
+ *
+ * <b>yield <em>statement</em></b>
+ *
+ * This form of the @c yield keyword is often used with asynchronous operations:
+ *
+ * @code yield socket_->async_read_some(buffer(*buffer_), *this); @endcode
+ *
+ * This divides into four logical steps:
+ *
+ * @li @c yield saves the current state of the coroutine.
+ * @li The statement initiates the asynchronous operation.
+ * @li The resume point is defined immediately following the statement.
+ * @li Control is transferred to the end of the coroutine body.
+ *
+ * When the asynchronous operation completes, the function object is invoked
+ * and @c reenter causes control to transfer to the resume point. It is
+ * important to remember to carry the coroutine state forward with the
+ * asynchronous operation. In the above snippet, the current class is a
+ * function object object with a coroutine object as base class or data member.
+ *
+ * The statement may also be a compound statement, and this permits us to
+ * define local variables with limited scope:
+ *
+ * @code yield
+ * {
+ *   mutable_buffers_1 b = buffer(*buffer_);
+ *   socket_->async_read_some(b, *this);
+ * } @endcode
+ *
+ * <b>yield return <em>expression</em> ;</b>
+ *
+ * This form of @c yield is often used in generators or coroutine-based parsers.
+ * For example, the function object:
+ *
+ * @code struct interleave : coroutine
+ * {
+ *   istream& is1;
+ *   istream& is2;
+ *   char operator()(char c)
+ *   {
+ *     reenter (this) for (;;)
+ *     {
+ *       yield return is1.get();
+ *       yield return is2.get();
+ *     }
+ *   }
+ * }; @endcode
+ *
+ * defines a trivial coroutine that interleaves the characters from two input
+ * streams.
+ *
+ * This type of @c yield divides into three logical steps:
+ *
+ * @li @c yield saves the current state of the coroutine.
+ * @li The resume point is defined immediately following the semicolon.
+ * @li The value of the expression is returned from the function.
+ *
+ * <b>yield ;</b>
+ *
+ * This form of @c yield is equivalent to the following steps:
+ *
+ * @li @c yield saves the current state of the coroutine.
+ * @li The resume point is defined immediately following the semicolon.
+ * @li Control is transferred to the end of the coroutine body.
+ *
+ * This form might be applied when coroutines are used for cooperative
+ * threading and scheduling is explicitly managed. For example:
+ *
+ * @code struct task : coroutine
+ * {
+ *   ...
+ *   void operator()()
+ *   {
+ *     reenter (this)
+ *     {
+ *       while (... not finished ...)
+ *       {
+ *         ... do something ...
+ *         yield;
+ *         ... do some more ...
+ *         yield;
+ *       }
+ *     }
+ *   }
+ *   ...
+ * };
+ * ...
+ * task t1, t2;
+ * for (;;)
+ * {
+ *   t1();
+ *   t2();
+ * } @endcode
+ *
+ * <b>yield break ;</b>
+ *
+ * The final form of @c yield is used to explicitly terminate the coroutine.
+ * This form is comprised of two steps:
+ *
+ * @li @c yield sets the coroutine state to indicate termination.
+ * @li Control is transferred to the end of the coroutine body.
+ *
+ * Once terminated, calls to is_complete() return true and the coroutine cannot
+ * be reentered.
+ *
+ * Note that a coroutine may also be implicitly terminated if the coroutine
+ * body is exited without a yield, e.g. by return, throw or by running to the
+ * end of the body.
+ *
+ * <b>fork <em>statement</em></b>
+ *
+ * The @c fork pseudo-keyword is used when "forking" a coroutine, i.e. splitting
+ * it into two (or more) copies. One use of @c fork is in a server, where a new
+ * coroutine is created to handle each client connection:
+ * 
+ * @code reenter (this)
+ * {
+ *   do
+ *   {
+ *     socket_.reset(new tcp::socket(my_context_));
+ *     yield acceptor->async_accept(*socket_, *this);
+ *     fork server(*this)();
+ *   } while (is_parent());
+ *   ... client-specific handling follows ...
+ * } @endcode
+ * 
+ * The logical steps involved in a @c fork are:
+ * 
+ * @li @c fork saves the current state of the coroutine.
+ * @li The statement creates a copy of the coroutine and either executes it
+ *     immediately or schedules it for later execution.
+ * @li The resume point is defined immediately following the semicolon.
+ * @li For the "parent", control immediately continues from the next line.
+ *
+ * The functions is_parent() and is_child() can be used to differentiate
+ * between parent and child. You would use these functions to alter subsequent
+ * control flow.
+ *
+ * Note that @c fork doesn't do the actual forking by itself. It is the
+ * application's responsibility to create a clone of the coroutine and call it.
+ * The clone can be called immediately, as above, or scheduled for delayed
+ * execution using something like asio::post().
+ *
+ * @par Alternate macro names
+ *
+ * If preferred, an application can use macro names that follow a more typical
+ * naming convention, rather than the pseudo-keywords. These are:
+ *
+ * @li @c ASIO_CORO_REENTER instead of @c reenter
+ * @li @c ASIO_CORO_YIELD instead of @c yield
+ * @li @c ASIO_CORO_FORK instead of @c fork
+ */
+class coroutine
+{
+public:
+  /// Constructs a coroutine in its initial state.
+  coroutine() : value_(0) {}
+
+  /// Returns true if the coroutine is the child of a fork.
+  bool is_child() const { return value_ < 0; }
+
+  /// Returns true if the coroutine is the parent of a fork.
+  bool is_parent() const { return !is_child(); }
+
+  /// Returns true if the coroutine has reached its terminal state.
+  bool is_complete() const { return value_ == -1; }
+
+private:
+  friend class detail::coroutine_ref;
+  int value_;
+};
+
+
+namespace detail {
+
+class coroutine_ref
+{
+public:
+  coroutine_ref(coroutine& c) : value_(c.value_), modified_(false) {}
+  coroutine_ref(coroutine* c) : value_(c->value_), modified_(false) {}
+  ~coroutine_ref() { if (!modified_) value_ = -1; }
+  operator int() const { return value_; }
+  int& operator=(int v) { modified_ = true; return value_ = v; }
+private:
+  void operator=(const coroutine_ref&);
+  int& value_;
+  bool modified_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#define ASIO_CORO_REENTER(c) \
+  switch (::asio::detail::coroutine_ref _coro_value = c) \
+    case -1: if (_coro_value) \
+    { \
+      goto terminate_coroutine; \
+      terminate_coroutine: \
+      _coro_value = -1; \
+      goto bail_out_of_coroutine; \
+      bail_out_of_coroutine: \
+      break; \
+    } \
+    else /* fall-through */ case 0:
+
+#define ASIO_CORO_YIELD_IMPL(n) \
+  for (_coro_value = (n);;) \
+    if (_coro_value == 0) \
+    { \
+      case (n): ; \
+      break; \
+    } \
+    else \
+      switch (_coro_value ? 0 : 1) \
+        for (;;) \
+          /* fall-through */ case -1: if (_coro_value) \
+            goto terminate_coroutine; \
+          else for (;;) \
+            /* fall-through */ case 1: if (_coro_value) \
+              goto bail_out_of_coroutine; \
+            else /* fall-through */ case 0:
+
+#define ASIO_CORO_FORK_IMPL(n) \
+  for (_coro_value = -(n);; _coro_value = (n)) \
+    if (_coro_value == (n)) \
+    { \
+      case -(n): ; \
+      break; \
+    } \
+    else
+
+#if defined(_MSC_VER)
+# define ASIO_CORO_YIELD ASIO_CORO_YIELD_IMPL(__COUNTER__ + 1)
+# define ASIO_CORO_FORK ASIO_CORO_FORK_IMPL(__COUNTER__ + 1)
+#else // defined(_MSC_VER)
+# define ASIO_CORO_YIELD ASIO_CORO_YIELD_IMPL(__LINE__)
+# define ASIO_CORO_FORK ASIO_CORO_FORK_IMPL(__LINE__)
+#endif // defined(_MSC_VER)
+
+#endif // ASIO_COROUTINE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/deadline_timer.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/deadline_timer.hpp
new file mode 100644
index 00000000000..3f837da471a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/deadline_timer.hpp
@@ -0,0 +1,38 @@
+//
+// deadline_timer.hpp
+// ~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DEADLINE_TIMER_HPP
+#define ASIO_DEADLINE_TIMER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_BOOST_DATE_TIME) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/detail/socket_types.hpp" // Must come before posix_time.
+#include "asio/basic_deadline_timer.hpp"
+
+#include <boost/date_time/posix_time/posix_time_types.hpp>
+
+namespace asio {
+
+/// Typedef for the typical usage of timer. Uses a UTC clock.
+typedef basic_deadline_timer<boost::posix_time::ptime> deadline_timer;
+
+} // namespace asio
+
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+       // || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_DEADLINE_TIMER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/defer.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/defer.hpp
new file mode 100644
index 00000000000..dd5275e40d5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/defer.hpp
@@ -0,0 +1,127 @@
+//
+// defer.hpp
+// ~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DEFER_HPP
+#define ASIO_DEFER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/async_result.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/is_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Submits a completion token or function object for execution.
+/**
+ * This function submits an object for execution using the object's associated
+ * executor. The function object is queued for execution, and is never called
+ * from the current thread prior to returning from <tt>defer()</tt>.
+ *
+ * The use of @c defer(), rather than @ref post(), indicates the caller's
+ * preference that the executor defer the queueing of the function object. This
+ * may allow the executor to optimise queueing for cases when the function
+ * object represents a continuation of the current call context.
+ *
+ * This function has the following effects:
+ *
+ * @li Constructs a function object handler of type @c Handler, initialized
+ * with <tt>handler(forward<CompletionToken>(token))</tt>.
+ *
+ * @li Constructs an object @c result of type <tt>async_result<Handler></tt>,
+ * initializing the object as <tt>result(handler)</tt>.
+ *
+ * @li Obtains the handler's associated executor object @c ex by performing
+ * <tt>get_associated_executor(handler)</tt>.
+ *
+ * @li Obtains the handler's associated allocator object @c alloc by performing
+ * <tt>get_associated_allocator(handler)</tt>.
+ *
+ * @li Performs <tt>ex.defer(std::move(handler), alloc)</tt>.
+ *
+ * @li Returns <tt>result.get()</tt>.
+ */
+template <ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) defer(
+    ASIO_MOVE_ARG(CompletionToken) token);
+
+/// Submits a completion token or function object for execution.
+/**
+ * This function submits an object for execution using the specified executor.
+ * The function object is queued for execution, and is never called from the
+ * current thread prior to returning from <tt>defer()</tt>.
+ *
+ * The use of @c defer(), rather than @ref post(), indicates the caller's
+ * preference that the executor defer the queueing of the function object. This
+ * may allow the executor to optimise queueing for cases when the function
+ * object represents a continuation of the current call context.
+ *
+ * This function has the following effects:
+ *
+ * @li Constructs a function object handler of type @c Handler, initialized
+ * with <tt>handler(forward<CompletionToken>(token))</tt>.
+ *
+ * @li Constructs an object @c result of type <tt>async_result<Handler></tt>,
+ * initializing the object as <tt>result(handler)</tt>.
+ *
+ * @li Obtains the handler's associated executor object @c ex1 by performing
+ * <tt>get_associated_executor(handler)</tt>.
+ *
+ * @li Creates a work object @c w by performing <tt>make_work(ex1)</tt>.
+ *
+ * @li Obtains the handler's associated allocator object @c alloc by performing
+ * <tt>get_associated_allocator(handler)</tt>.
+ *
+ * @li Constructs a function object @c f with a function call operator that
+ * performs <tt>ex1.dispatch(std::move(handler), alloc)</tt> followed by
+ * <tt>w.reset()</tt>.
+ *
+ * @li Performs <tt>Executor(ex).defer(std::move(f), alloc)</tt>.
+ *
+ * @li Returns <tt>result.get()</tt>.
+ */
+template <typename Executor,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken
+      ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(Executor)>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) defer(
+    const Executor& ex,
+    ASIO_MOVE_ARG(CompletionToken) token
+      ASIO_DEFAULT_COMPLETION_TOKEN(Executor),
+    typename enable_if<is_executor<Executor>::value>::type* = 0);
+
+/// Submits a completion token or function object for execution.
+/**
+ * @returns <tt>defer(ctx.get_executor(), forward<CompletionToken>(token))</tt>.
+ */
+template <typename ExecutionContext,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken
+      ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+        typename ExecutionContext::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) defer(
+    ExecutionContext& ctx,
+    ASIO_MOVE_ARG(CompletionToken) token
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename ExecutionContext::executor_type),
+    typename enable_if<is_convertible<
+      ExecutionContext&, execution_context&>::value>::type* = 0);
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/defer.hpp"
+
+#endif // ASIO_DEFER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detached.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detached.hpp
new file mode 100644
index 00000000000..332ed24ff29
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detached.hpp
@@ -0,0 +1,62 @@
+//
+// detached.hpp
+// ~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETACHED_HPP
+#define ASIO_DETACHED_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <memory>
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Class used to specify that an asynchronous operation is detached.
+/**
+
+ * The detached_t class is used to indicate that an asynchronous operation is
+ * detached. That is, there is no completion handler waiting for the
+ * operation's result. A detached_t object may be passed as a handler to an
+ * asynchronous operation, typically using the special value
+ * @c asio::detached. For example:
+
+ * @code my_socket.async_send(my_buffer, asio::detached);
+ * @endcode
+ */
+class detached_t
+{
+public:
+  /// Constructor. 
+  ASIO_CONSTEXPR detached_t()
+  {
+  }
+};
+
+/// A special value, similar to std::nothrow.
+/**
+ * See the documentation for asio::detached_t for a usage example.
+ */
+#if defined(ASIO_HAS_CONSTEXPR) || defined(GENERATING_DOCUMENTATION)
+constexpr detached_t detached;
+#elif defined(ASIO_MSVC)
+__declspec(selectany) detached_t detached;
+#endif
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/detached.hpp"
+
+#endif // ASIO_DETACHED_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/array.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/array.hpp
new file mode 100644
index 00000000000..4c63f9814a9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/array.hpp
@@ -0,0 +1,38 @@
+//
+// detail/array.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_ARRAY_HPP
+#define ASIO_DETAIL_ARRAY_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_STD_ARRAY)
+# include <array>
+#else // defined(ASIO_HAS_STD_ARRAY)
+# include <boost/array.hpp>
+#endif // defined(ASIO_HAS_STD_ARRAY)
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_HAS_STD_ARRAY)
+using std::array;
+#else // defined(ASIO_HAS_STD_ARRAY)
+using boost::array;
+#endif // defined(ASIO_HAS_STD_ARRAY)
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_ARRAY_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/array_fwd.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/array_fwd.hpp
new file mode 100644
index 00000000000..e44b001df7a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/array_fwd.hpp
@@ -0,0 +1,34 @@
+//
+// detail/array_fwd.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_ARRAY_FWD_HPP
+#define ASIO_DETAIL_ARRAY_FWD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+namespace boost {
+
+template<class T, std::size_t N>
+class array;
+
+} // namespace boost
+
+// Standard library components can't be forward declared, so we'll have to
+// include the array header. Fortunately, it's fairly lightweight and doesn't
+// add significantly to the compile time.
+#if defined(ASIO_HAS_STD_ARRAY)
+# include <array>
+#endif // defined(ASIO_HAS_STD_ARRAY)
+
+#endif // ASIO_DETAIL_ARRAY_FWD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/assert.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/assert.hpp
new file mode 100644
index 00000000000..72a96bb9664
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/assert.hpp
@@ -0,0 +1,32 @@
+//
+// detail/assert.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_ASSERT_HPP
+#define ASIO_DETAIL_ASSERT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_BOOST_ASSERT)
+# include <boost/assert.hpp>
+#else // defined(ASIO_HAS_BOOST_ASSERT)
+# include <cassert>
+#endif // defined(ASIO_HAS_BOOST_ASSERT)
+
+#if defined(ASIO_HAS_BOOST_ASSERT)
+# define ASIO_ASSERT(expr) BOOST_ASSERT(expr)
+#else // defined(ASIO_HAS_BOOST_ASSERT)
+# define ASIO_ASSERT(expr) assert(expr)
+#endif // defined(ASIO_HAS_BOOST_ASSERT)
+
+#endif // ASIO_DETAIL_ASSERT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/atomic_count.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/atomic_count.hpp
new file mode 100644
index 00000000000..be7b151a381
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/atomic_count.hpp
@@ -0,0 +1,45 @@
+//
+// detail/atomic_count.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_ATOMIC_COUNT_HPP
+#define ASIO_DETAIL_ATOMIC_COUNT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS)
+// Nothing to include.
+#elif defined(ASIO_HAS_STD_ATOMIC)
+# include <atomic>
+#else // defined(ASIO_HAS_STD_ATOMIC)
+# include <boost/detail/atomic_count.hpp>
+#endif // defined(ASIO_HAS_STD_ATOMIC)
+
+namespace asio {
+namespace detail {
+
+#if !defined(ASIO_HAS_THREADS)
+typedef long atomic_count;
+inline void increment(atomic_count& a, long b) { a += b; }
+#elif defined(ASIO_HAS_STD_ATOMIC)
+typedef std::atomic<long> atomic_count;
+inline void increment(atomic_count& a, long b) { a += b; }
+#else // defined(ASIO_HAS_STD_ATOMIC)
+typedef boost::detail::atomic_count atomic_count;
+inline void increment(atomic_count& a, long b) { while (b > 0) ++a, --b; }
+#endif // defined(ASIO_HAS_STD_ATOMIC)
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_ATOMIC_COUNT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/base_from_completion_cond.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/base_from_completion_cond.hpp
new file mode 100644
index 00000000000..9f695f10791
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/base_from_completion_cond.hpp
@@ -0,0 +1,69 @@
+//
+// detail/base_from_completion_cond.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_BASE_FROM_COMPLETION_COND_HPP
+#define ASIO_DETAIL_BASE_FROM_COMPLETION_COND_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/completion_condition.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename CompletionCondition>
+class base_from_completion_cond
+{
+protected:
+  explicit base_from_completion_cond(CompletionCondition& completion_condition)
+    : completion_condition_(
+        ASIO_MOVE_CAST(CompletionCondition)(completion_condition))
+  {
+  }
+
+  std::size_t check_for_completion(
+      const asio::error_code& ec,
+      std::size_t total_transferred)
+  {
+    return detail::adapt_completion_condition_result(
+        completion_condition_(ec, total_transferred));
+  }
+
+private:
+  CompletionCondition completion_condition_;
+};
+
+template <>
+class base_from_completion_cond<transfer_all_t>
+{
+protected:
+  explicit base_from_completion_cond(transfer_all_t)
+  {
+  }
+
+  static std::size_t check_for_completion(
+      const asio::error_code& ec,
+      std::size_t total_transferred)
+  {
+    return transfer_all_t()(ec, total_transferred);
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_BASE_FROM_COMPLETION_COND_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/bind_handler.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/bind_handler.hpp
new file mode 100644
index 00000000000..feb333c2b3b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/bind_handler.hpp
@@ -0,0 +1,816 @@
+//
+// detail/bind_handler.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_BIND_HANDLER_HPP
+#define ASIO_DETAIL_BIND_HANDLER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/type_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler, typename Arg1>
+class binder1
+{
+public:
+  template <typename T>
+  binder1(int, ASIO_MOVE_ARG(T) handler, const Arg1& arg1)
+    : handler_(ASIO_MOVE_CAST(T)(handler)),
+      arg1_(arg1)
+  {
+  }
+
+  binder1(Handler& handler, const Arg1& arg1)
+    : handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      arg1_(arg1)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  binder1(const binder1& other)
+    : handler_(other.handler_),
+      arg1_(other.arg1_)
+  {
+  }
+
+  binder1(binder1&& other)
+    : handler_(ASIO_MOVE_CAST(Handler)(other.handler_)),
+      arg1_(ASIO_MOVE_CAST(Arg1)(other.arg1_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  void operator()()
+  {
+    handler_(static_cast<const Arg1&>(arg1_));
+  }
+
+  void operator()() const
+  {
+    handler_(arg1_);
+  }
+
+//private:
+  Handler handler_;
+  Arg1 arg1_;
+};
+
+template <typename Handler, typename Arg1>
+inline void* asio_handler_allocate(std::size_t size,
+    binder1<Handler, Arg1>* this_handler)
+{
+  return asio_handler_alloc_helpers::allocate(
+      size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1>
+inline void asio_handler_deallocate(void* pointer, std::size_t size,
+    binder1<Handler, Arg1>* this_handler)
+{
+  asio_handler_alloc_helpers::deallocate(
+      pointer, size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1>
+inline bool asio_handler_is_continuation(
+    binder1<Handler, Arg1>* this_handler)
+{
+  return asio_handler_cont_helpers::is_continuation(
+      this_handler->handler_);
+}
+
+template <typename Function, typename Handler, typename Arg1>
+inline void asio_handler_invoke(Function& function,
+    binder1<Handler, Arg1>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Function, typename Handler, typename Arg1>
+inline void asio_handler_invoke(const Function& function,
+    binder1<Handler, Arg1>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1>
+inline binder1<typename decay<Handler>::type, Arg1> bind_handler(
+    ASIO_MOVE_ARG(Handler) handler, const Arg1& arg1)
+{
+  return binder1<typename decay<Handler>::type, Arg1>(0,
+      ASIO_MOVE_CAST(Handler)(handler), arg1);
+}
+
+template <typename Handler, typename Arg1, typename Arg2>
+class binder2
+{
+public:
+  template <typename T>
+  binder2(int, ASIO_MOVE_ARG(T) handler,
+      const Arg1& arg1, const Arg2& arg2)
+    : handler_(ASIO_MOVE_CAST(T)(handler)),
+      arg1_(arg1),
+      arg2_(arg2)
+  {
+  }
+
+  binder2(Handler& handler, const Arg1& arg1, const Arg2& arg2)
+    : handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      arg1_(arg1),
+      arg2_(arg2)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  binder2(const binder2& other)
+    : handler_(other.handler_),
+      arg1_(other.arg1_),
+      arg2_(other.arg2_)
+  {
+  }
+
+  binder2(binder2&& other)
+    : handler_(ASIO_MOVE_CAST(Handler)(other.handler_)),
+      arg1_(ASIO_MOVE_CAST(Arg1)(other.arg1_)),
+      arg2_(ASIO_MOVE_CAST(Arg2)(other.arg2_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  void operator()()
+  {
+    handler_(static_cast<const Arg1&>(arg1_),
+        static_cast<const Arg2&>(arg2_));
+  }
+
+  void operator()() const
+  {
+    handler_(arg1_, arg2_);
+  }
+
+//private:
+  Handler handler_;
+  Arg1 arg1_;
+  Arg2 arg2_;
+};
+
+template <typename Handler, typename Arg1, typename Arg2>
+inline void* asio_handler_allocate(std::size_t size,
+    binder2<Handler, Arg1, Arg2>* this_handler)
+{
+  return asio_handler_alloc_helpers::allocate(
+      size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2>
+inline void asio_handler_deallocate(void* pointer, std::size_t size,
+    binder2<Handler, Arg1, Arg2>* this_handler)
+{
+  asio_handler_alloc_helpers::deallocate(
+      pointer, size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2>
+inline bool asio_handler_is_continuation(
+    binder2<Handler, Arg1, Arg2>* this_handler)
+{
+  return asio_handler_cont_helpers::is_continuation(
+      this_handler->handler_);
+}
+
+template <typename Function, typename Handler, typename Arg1, typename Arg2>
+inline void asio_handler_invoke(Function& function,
+    binder2<Handler, Arg1, Arg2>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Function, typename Handler, typename Arg1, typename Arg2>
+inline void asio_handler_invoke(const Function& function,
+    binder2<Handler, Arg1, Arg2>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2>
+inline binder2<typename decay<Handler>::type, Arg1, Arg2> bind_handler(
+    ASIO_MOVE_ARG(Handler) handler, const Arg1& arg1, const Arg2& arg2)
+{
+  return binder2<typename decay<Handler>::type, Arg1, Arg2>(0,
+      ASIO_MOVE_CAST(Handler)(handler), arg1, arg2);
+}
+
+template <typename Handler, typename Arg1, typename Arg2, typename Arg3>
+class binder3
+{
+public:
+  template <typename T>
+  binder3(int, ASIO_MOVE_ARG(T) handler, const Arg1& arg1,
+      const Arg2& arg2, const Arg3& arg3)
+    : handler_(ASIO_MOVE_CAST(T)(handler)),
+      arg1_(arg1),
+      arg2_(arg2),
+      arg3_(arg3)
+  {
+  }
+
+  binder3(Handler& handler, const Arg1& arg1,
+      const Arg2& arg2, const Arg3& arg3)
+    : handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      arg1_(arg1),
+      arg2_(arg2),
+      arg3_(arg3)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  binder3(const binder3& other)
+    : handler_(other.handler_),
+      arg1_(other.arg1_),
+      arg2_(other.arg2_),
+      arg3_(other.arg3_)
+  {
+  }
+
+  binder3(binder3&& other)
+    : handler_(ASIO_MOVE_CAST(Handler)(other.handler_)),
+      arg1_(ASIO_MOVE_CAST(Arg1)(other.arg1_)),
+      arg2_(ASIO_MOVE_CAST(Arg2)(other.arg2_)),
+      arg3_(ASIO_MOVE_CAST(Arg3)(other.arg3_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  void operator()()
+  {
+    handler_(static_cast<const Arg1&>(arg1_),
+        static_cast<const Arg2&>(arg2_), static_cast<const Arg3&>(arg3_));
+  }
+
+  void operator()() const
+  {
+    handler_(arg1_, arg2_, arg3_);
+  }
+
+//private:
+  Handler handler_;
+  Arg1 arg1_;
+  Arg2 arg2_;
+  Arg3 arg3_;
+};
+
+template <typename Handler, typename Arg1, typename Arg2, typename Arg3>
+inline void* asio_handler_allocate(std::size_t size,
+    binder3<Handler, Arg1, Arg2, Arg3>* this_handler)
+{
+  return asio_handler_alloc_helpers::allocate(
+      size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2, typename Arg3>
+inline void asio_handler_deallocate(void* pointer, std::size_t size,
+    binder3<Handler, Arg1, Arg2, Arg3>* this_handler)
+{
+  asio_handler_alloc_helpers::deallocate(
+      pointer, size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2, typename Arg3>
+inline bool asio_handler_is_continuation(
+    binder3<Handler, Arg1, Arg2, Arg3>* this_handler)
+{
+  return asio_handler_cont_helpers::is_continuation(
+      this_handler->handler_);
+}
+
+template <typename Function, typename Handler,
+    typename Arg1, typename Arg2, typename Arg3>
+inline void asio_handler_invoke(Function& function,
+    binder3<Handler, Arg1, Arg2, Arg3>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Function, typename Handler,
+    typename Arg1, typename Arg2, typename Arg3>
+inline void asio_handler_invoke(const Function& function,
+    binder3<Handler, Arg1, Arg2, Arg3>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2, typename Arg3>
+inline binder3<typename decay<Handler>::type, Arg1, Arg2, Arg3> bind_handler(
+    ASIO_MOVE_ARG(Handler) handler, const Arg1& arg1, const Arg2& arg2,
+    const Arg3& arg3)
+{
+  return binder3<typename decay<Handler>::type, Arg1, Arg2, Arg3>(0,
+      ASIO_MOVE_CAST(Handler)(handler), arg1, arg2, arg3);
+}
+
+template <typename Handler, typename Arg1,
+    typename Arg2, typename Arg3, typename Arg4>
+class binder4
+{
+public:
+  template <typename T>
+  binder4(int, ASIO_MOVE_ARG(T) handler, const Arg1& arg1,
+      const Arg2& arg2, const Arg3& arg3, const Arg4& arg4)
+    : handler_(ASIO_MOVE_CAST(T)(handler)),
+      arg1_(arg1),
+      arg2_(arg2),
+      arg3_(arg3),
+      arg4_(arg4)
+  {
+  }
+
+  binder4(Handler& handler, const Arg1& arg1,
+      const Arg2& arg2, const Arg3& arg3, const Arg4& arg4)
+    : handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      arg1_(arg1),
+      arg2_(arg2),
+      arg3_(arg3),
+      arg4_(arg4)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  binder4(const binder4& other)
+    : handler_(other.handler_),
+      arg1_(other.arg1_),
+      arg2_(other.arg2_),
+      arg3_(other.arg3_),
+      arg4_(other.arg4_)
+  {
+  }
+
+  binder4(binder4&& other)
+    : handler_(ASIO_MOVE_CAST(Handler)(other.handler_)),
+      arg1_(ASIO_MOVE_CAST(Arg1)(other.arg1_)),
+      arg2_(ASIO_MOVE_CAST(Arg2)(other.arg2_)),
+      arg3_(ASIO_MOVE_CAST(Arg3)(other.arg3_)),
+      arg4_(ASIO_MOVE_CAST(Arg4)(other.arg4_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  void operator()()
+  {
+    handler_(static_cast<const Arg1&>(arg1_),
+        static_cast<const Arg2&>(arg2_), static_cast<const Arg3&>(arg3_),
+        static_cast<const Arg4&>(arg4_));
+  }
+
+  void operator()() const
+  {
+    handler_(arg1_, arg2_, arg3_, arg4_);
+  }
+
+//private:
+  Handler handler_;
+  Arg1 arg1_;
+  Arg2 arg2_;
+  Arg3 arg3_;
+  Arg4 arg4_;
+};
+
+template <typename Handler, typename Arg1,
+    typename Arg2, typename Arg3, typename Arg4>
+inline void* asio_handler_allocate(std::size_t size,
+    binder4<Handler, Arg1, Arg2, Arg3, Arg4>* this_handler)
+{
+  return asio_handler_alloc_helpers::allocate(
+      size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1,
+    typename Arg2, typename Arg3, typename Arg4>
+inline void asio_handler_deallocate(void* pointer, std::size_t size,
+    binder4<Handler, Arg1, Arg2, Arg3, Arg4>* this_handler)
+{
+  asio_handler_alloc_helpers::deallocate(
+      pointer, size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1,
+    typename Arg2, typename Arg3, typename Arg4>
+inline bool asio_handler_is_continuation(
+    binder4<Handler, Arg1, Arg2, Arg3, Arg4>* this_handler)
+{
+  return asio_handler_cont_helpers::is_continuation(
+      this_handler->handler_);
+}
+
+template <typename Function, typename Handler, typename Arg1,
+    typename Arg2, typename Arg3, typename Arg4>
+inline void asio_handler_invoke(Function& function,
+    binder4<Handler, Arg1, Arg2, Arg3, Arg4>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Function, typename Handler, typename Arg1,
+    typename Arg2, typename Arg3, typename Arg4>
+inline void asio_handler_invoke(const Function& function,
+    binder4<Handler, Arg1, Arg2, Arg3, Arg4>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1,
+    typename Arg2, typename Arg3, typename Arg4>
+inline binder4<typename decay<Handler>::type, Arg1, Arg2, Arg3, Arg4>
+bind_handler(ASIO_MOVE_ARG(Handler) handler, const Arg1& arg1,
+    const Arg2& arg2, const Arg3& arg3, const Arg4& arg4)
+{
+  return binder4<typename decay<Handler>::type, Arg1, Arg2, Arg3, Arg4>(0,
+      ASIO_MOVE_CAST(Handler)(handler), arg1, arg2, arg3, arg4);
+}
+
+template <typename Handler, typename Arg1, typename Arg2,
+    typename Arg3, typename Arg4, typename Arg5>
+class binder5
+{
+public:
+  template <typename T>
+  binder5(int, ASIO_MOVE_ARG(T) handler, const Arg1& arg1,
+      const Arg2& arg2, const Arg3& arg3, const Arg4& arg4, const Arg5& arg5)
+    : handler_(ASIO_MOVE_CAST(T)(handler)),
+      arg1_(arg1),
+      arg2_(arg2),
+      arg3_(arg3),
+      arg4_(arg4),
+      arg5_(arg5)
+  {
+  }
+
+  binder5(Handler& handler, const Arg1& arg1, const Arg2& arg2,
+      const Arg3& arg3, const Arg4& arg4, const Arg5& arg5)
+    : handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      arg1_(arg1),
+      arg2_(arg2),
+      arg3_(arg3),
+      arg4_(arg4),
+      arg5_(arg5)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  binder5(const binder5& other)
+    : handler_(other.handler_),
+      arg1_(other.arg1_),
+      arg2_(other.arg2_),
+      arg3_(other.arg3_),
+      arg4_(other.arg4_),
+      arg5_(other.arg5_)
+  {
+  }
+
+  binder5(binder5&& other)
+    : handler_(ASIO_MOVE_CAST(Handler)(other.handler_)),
+      arg1_(ASIO_MOVE_CAST(Arg1)(other.arg1_)),
+      arg2_(ASIO_MOVE_CAST(Arg2)(other.arg2_)),
+      arg3_(ASIO_MOVE_CAST(Arg3)(other.arg3_)),
+      arg4_(ASIO_MOVE_CAST(Arg4)(other.arg4_)),
+      arg5_(ASIO_MOVE_CAST(Arg5)(other.arg5_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  void operator()()
+  {
+    handler_(static_cast<const Arg1&>(arg1_),
+        static_cast<const Arg2&>(arg2_), static_cast<const Arg3&>(arg3_),
+        static_cast<const Arg4&>(arg4_), static_cast<const Arg5&>(arg5_));
+  }
+
+  void operator()() const
+  {
+    handler_(arg1_, arg2_, arg3_, arg4_, arg5_);
+  }
+
+//private:
+  Handler handler_;
+  Arg1 arg1_;
+  Arg2 arg2_;
+  Arg3 arg3_;
+  Arg4 arg4_;
+  Arg5 arg5_;
+};
+
+template <typename Handler, typename Arg1, typename Arg2,
+    typename Arg3, typename Arg4, typename Arg5>
+inline void* asio_handler_allocate(std::size_t size,
+    binder5<Handler, Arg1, Arg2, Arg3, Arg4, Arg5>* this_handler)
+{
+  return asio_handler_alloc_helpers::allocate(
+      size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2,
+    typename Arg3, typename Arg4, typename Arg5>
+inline void asio_handler_deallocate(void* pointer, std::size_t size,
+    binder5<Handler, Arg1, Arg2, Arg3, Arg4, Arg5>* this_handler)
+{
+  asio_handler_alloc_helpers::deallocate(
+      pointer, size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2,
+    typename Arg3, typename Arg4, typename Arg5>
+inline bool asio_handler_is_continuation(
+    binder5<Handler, Arg1, Arg2, Arg3, Arg4, Arg5>* this_handler)
+{
+  return asio_handler_cont_helpers::is_continuation(
+      this_handler->handler_);
+}
+
+template <typename Function, typename Handler, typename Arg1,
+    typename Arg2, typename Arg3, typename Arg4, typename Arg5>
+inline void asio_handler_invoke(Function& function,
+    binder5<Handler, Arg1, Arg2, Arg3, Arg4, Arg5>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Function, typename Handler, typename Arg1,
+    typename Arg2, typename Arg3, typename Arg4, typename Arg5>
+inline void asio_handler_invoke(const Function& function,
+    binder5<Handler, Arg1, Arg2, Arg3, Arg4, Arg5>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2,
+    typename Arg3, typename Arg4, typename Arg5>
+inline binder5<typename decay<Handler>::type, Arg1, Arg2, Arg3, Arg4, Arg5>
+bind_handler(ASIO_MOVE_ARG(Handler) handler, const Arg1& arg1,
+    const Arg2& arg2, const Arg3& arg3, const Arg4& arg4, const Arg5& arg5)
+{
+  return binder5<typename decay<Handler>::type, Arg1, Arg2, Arg3, Arg4, Arg5>(0,
+      ASIO_MOVE_CAST(Handler)(handler), arg1, arg2, arg3, arg4, arg5);
+}
+
+#if defined(ASIO_HAS_MOVE)
+
+template <typename Handler, typename Arg1>
+class move_binder1
+{
+public:
+  move_binder1(int, ASIO_MOVE_ARG(Handler) handler,
+      ASIO_MOVE_ARG(Arg1) arg1)
+    : handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      arg1_(ASIO_MOVE_CAST(Arg1)(arg1))
+  {
+  }
+
+  move_binder1(move_binder1&& other)
+    : handler_(ASIO_MOVE_CAST(Handler)(other.handler_)),
+      arg1_(ASIO_MOVE_CAST(Arg1)(other.arg1_))
+  {
+  }
+
+  void operator()()
+  {
+    handler_(ASIO_MOVE_CAST(Arg1)(arg1_));
+  }
+
+//private:
+  Handler handler_;
+  Arg1 arg1_;
+};
+
+template <typename Handler, typename Arg1>
+inline void* asio_handler_allocate(std::size_t size,
+    move_binder1<Handler, Arg1>* this_handler)
+{
+  return asio_handler_alloc_helpers::allocate(
+      size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1>
+inline void asio_handler_deallocate(void* pointer, std::size_t size,
+    move_binder1<Handler, Arg1>* this_handler)
+{
+  asio_handler_alloc_helpers::deallocate(
+      pointer, size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1>
+inline bool asio_handler_is_continuation(
+    move_binder1<Handler, Arg1>* this_handler)
+{
+  return asio_handler_cont_helpers::is_continuation(
+      this_handler->handler_);
+}
+
+template <typename Function, typename Handler, typename Arg1>
+inline void asio_handler_invoke(ASIO_MOVE_ARG(Function) function,
+    move_binder1<Handler, Arg1>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      ASIO_MOVE_CAST(Function)(function), this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2>
+class move_binder2
+{
+public:
+  move_binder2(int, ASIO_MOVE_ARG(Handler) handler,
+      const Arg1& arg1, ASIO_MOVE_ARG(Arg2) arg2)
+    : handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      arg1_(arg1),
+      arg2_(ASIO_MOVE_CAST(Arg2)(arg2))
+  {
+  }
+
+  move_binder2(move_binder2&& other)
+    : handler_(ASIO_MOVE_CAST(Handler)(other.handler_)),
+      arg1_(ASIO_MOVE_CAST(Arg1)(other.arg1_)),
+      arg2_(ASIO_MOVE_CAST(Arg2)(other.arg2_))
+  {
+  }
+
+  void operator()()
+  {
+    handler_(static_cast<const Arg1&>(arg1_),
+        ASIO_MOVE_CAST(Arg2)(arg2_));
+  }
+
+//private:
+  Handler handler_;
+  Arg1 arg1_;
+  Arg2 arg2_;
+};
+
+template <typename Handler, typename Arg1, typename Arg2>
+inline void* asio_handler_allocate(std::size_t size,
+    move_binder2<Handler, Arg1, Arg2>* this_handler)
+{
+  return asio_handler_alloc_helpers::allocate(
+      size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2>
+inline void asio_handler_deallocate(void* pointer, std::size_t size,
+    move_binder2<Handler, Arg1, Arg2>* this_handler)
+{
+  asio_handler_alloc_helpers::deallocate(
+      pointer, size, this_handler->handler_);
+}
+
+template <typename Handler, typename Arg1, typename Arg2>
+inline bool asio_handler_is_continuation(
+    move_binder2<Handler, Arg1, Arg2>* this_handler)
+{
+  return asio_handler_cont_helpers::is_continuation(
+      this_handler->handler_);
+}
+
+template <typename Function, typename Handler, typename Arg1, typename Arg2>
+inline void asio_handler_invoke(ASIO_MOVE_ARG(Function) function,
+    move_binder2<Handler, Arg1, Arg2>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      ASIO_MOVE_CAST(Function)(function), this_handler->handler_);
+}
+
+#endif // defined(ASIO_HAS_MOVE)
+
+} // namespace detail
+
+template <typename Handler, typename Arg1, typename Allocator>
+struct associated_allocator<detail::binder1<Handler, Arg1>, Allocator>
+{
+  typedef typename associated_allocator<Handler, Allocator>::type type;
+
+  static type get(const detail::binder1<Handler, Arg1>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<Handler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename Handler, typename Arg1, typename Arg2, typename Allocator>
+struct associated_allocator<detail::binder2<Handler, Arg1, Arg2>, Allocator>
+{
+  typedef typename associated_allocator<Handler, Allocator>::type type;
+
+  static type get(const detail::binder2<Handler, Arg1, Arg2>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<Handler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename Handler, typename Arg1, typename Executor>
+struct associated_executor<detail::binder1<Handler, Arg1>, Executor>
+{
+  typedef typename associated_executor<Handler, Executor>::type type;
+
+  static type get(const detail::binder1<Handler, Arg1>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<Handler, Executor>::get(h.handler_, ex);
+  }
+};
+
+template <typename Handler, typename Arg1, typename Arg2, typename Executor>
+struct associated_executor<detail::binder2<Handler, Arg1, Arg2>, Executor>
+{
+  typedef typename associated_executor<Handler, Executor>::type type;
+
+  static type get(const detail::binder2<Handler, Arg1, Arg2>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<Handler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#if defined(ASIO_HAS_MOVE)
+
+template <typename Handler, typename Arg1, typename Allocator>
+struct associated_allocator<detail::move_binder1<Handler, Arg1>, Allocator>
+{
+  typedef typename associated_allocator<Handler, Allocator>::type type;
+
+  static type get(const detail::move_binder1<Handler, Arg1>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<Handler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename Handler, typename Arg1, typename Arg2, typename Allocator>
+struct associated_allocator<
+    detail::move_binder2<Handler, Arg1, Arg2>, Allocator>
+{
+  typedef typename associated_allocator<Handler, Allocator>::type type;
+
+  static type get(const detail::move_binder2<Handler, Arg1, Arg2>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<Handler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename Handler, typename Arg1, typename Executor>
+struct associated_executor<detail::move_binder1<Handler, Arg1>, Executor>
+{
+  typedef typename associated_executor<Handler, Executor>::type type;
+
+  static type get(const detail::move_binder1<Handler, Arg1>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<Handler, Executor>::get(h.handler_, ex);
+  }
+};
+
+template <typename Handler, typename Arg1, typename Arg2, typename Executor>
+struct associated_executor<detail::move_binder2<Handler, Arg1, Arg2>, Executor>
+{
+  typedef typename associated_executor<Handler, Executor>::type type;
+
+  static type get(const detail::move_binder2<Handler, Arg1, Arg2>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<Handler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // defined(ASIO_HAS_MOVE)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_BIND_HANDLER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/buffer_resize_guard.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/buffer_resize_guard.hpp
new file mode 100644
index 00000000000..c0bb949deee
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/buffer_resize_guard.hpp
@@ -0,0 +1,66 @@
+//
+// detail/buffer_resize_guard.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_BUFFER_RESIZE_GUARD_HPP
+#define ASIO_DETAIL_BUFFER_RESIZE_GUARD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/limits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Helper class to manage buffer resizing in an exception safe way.
+template <typename Buffer>
+class buffer_resize_guard
+{
+public:
+  // Constructor.
+  buffer_resize_guard(Buffer& buffer)
+    : buffer_(buffer),
+      old_size_(buffer.size())
+  {
+  }
+
+  // Destructor rolls back the buffer resize unless commit was called.
+  ~buffer_resize_guard()
+  {
+    if (old_size_ != (std::numeric_limits<size_t>::max)())
+    {
+      buffer_.resize(old_size_);
+    }
+  }
+
+  // Commit the resize transaction.
+  void commit()
+  {
+    old_size_ = (std::numeric_limits<size_t>::max)();
+  }
+
+private:
+  // The buffer being managed.
+  Buffer& buffer_;
+
+  // The size of the buffer at the time the guard was constructed.
+  size_t old_size_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_BUFFER_RESIZE_GUARD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/buffer_sequence_adapter.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/buffer_sequence_adapter.hpp
new file mode 100644
index 00000000000..d979726a31d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/buffer_sequence_adapter.hpp
@@ -0,0 +1,544 @@
+//
+// detail/buffer_sequence_adapter.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_BUFFER_SEQUENCE_ADAPTER_HPP
+#define ASIO_DETAIL_BUFFER_SEQUENCE_ADAPTER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/buffer.hpp"
+#include "asio/detail/array_fwd.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class buffer_sequence_adapter_base
+{
+#if defined(ASIO_WINDOWS_RUNTIME)
+public:
+  // The maximum number of buffers to support in a single operation.
+  enum { max_buffers = 1 };
+
+protected:
+  typedef Windows::Storage::Streams::IBuffer^ native_buffer_type;
+
+  ASIO_DECL static void init_native_buffer(
+      native_buffer_type& buf,
+      const asio::mutable_buffer& buffer);
+
+  ASIO_DECL static void init_native_buffer(
+      native_buffer_type& buf,
+      const asio::const_buffer& buffer);
+#elif defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+public:
+  // The maximum number of buffers to support in a single operation.
+  enum { max_buffers = 64 < max_iov_len ? 64 : max_iov_len };
+
+protected:
+  typedef WSABUF native_buffer_type;
+
+  static void init_native_buffer(WSABUF& buf,
+      const asio::mutable_buffer& buffer)
+  {
+    buf.buf = static_cast<char*>(buffer.data());
+    buf.len = static_cast<ULONG>(buffer.size());
+  }
+
+  static void init_native_buffer(WSABUF& buf,
+      const asio::const_buffer& buffer)
+  {
+    buf.buf = const_cast<char*>(static_cast<const char*>(buffer.data()));
+    buf.len = static_cast<ULONG>(buffer.size());
+  }
+#else // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+public:
+  // The maximum number of buffers to support in a single operation.
+  enum { max_buffers = 64 < max_iov_len ? 64 : max_iov_len };
+
+protected:
+  typedef iovec native_buffer_type;
+
+  static void init_iov_base(void*& base, void* addr)
+  {
+    base = addr;
+  }
+
+  template <typename T>
+  static void init_iov_base(T& base, void* addr)
+  {
+    base = static_cast<T>(addr);
+  }
+
+  static void init_native_buffer(iovec& iov,
+      const asio::mutable_buffer& buffer)
+  {
+    init_iov_base(iov.iov_base, buffer.data());
+    iov.iov_len = buffer.size();
+  }
+
+  static void init_native_buffer(iovec& iov,
+      const asio::const_buffer& buffer)
+  {
+    init_iov_base(iov.iov_base, const_cast<void*>(buffer.data()));
+    iov.iov_len = buffer.size();
+  }
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+};
+
+// Helper class to translate buffers into the native buffer representation.
+template <typename Buffer, typename Buffers>
+class buffer_sequence_adapter
+  : buffer_sequence_adapter_base
+{
+public:
+  explicit buffer_sequence_adapter(const Buffers& buffer_sequence)
+    : count_(0), total_buffer_size_(0)
+  {
+    buffer_sequence_adapter::init(
+        asio::buffer_sequence_begin(buffer_sequence),
+        asio::buffer_sequence_end(buffer_sequence));
+  }
+
+  native_buffer_type* buffers()
+  {
+    return buffers_;
+  }
+
+  std::size_t count() const
+  {
+    return count_;
+  }
+
+  std::size_t total_size() const
+  {
+    return total_buffer_size_;
+  }
+
+  bool all_empty() const
+  {
+    return total_buffer_size_ == 0;
+  }
+
+  static bool all_empty(const Buffers& buffer_sequence)
+  {
+    return buffer_sequence_adapter::all_empty(
+        asio::buffer_sequence_begin(buffer_sequence),
+        asio::buffer_sequence_end(buffer_sequence));
+  }
+
+  static void validate(const Buffers& buffer_sequence)
+  {
+    buffer_sequence_adapter::validate(
+        asio::buffer_sequence_begin(buffer_sequence),
+        asio::buffer_sequence_end(buffer_sequence));
+  }
+
+  static Buffer first(const Buffers& buffer_sequence)
+  {
+    return buffer_sequence_adapter::first(
+        asio::buffer_sequence_begin(buffer_sequence),
+        asio::buffer_sequence_end(buffer_sequence));
+  }
+
+private:
+  template <typename Iterator>
+  void init(Iterator begin, Iterator end)
+  {
+    Iterator iter = begin;
+    for (; iter != end && count_ < max_buffers; ++iter, ++count_)
+    {
+      Buffer buffer(*iter);
+      init_native_buffer(buffers_[count_], buffer);
+      total_buffer_size_ += buffer.size();
+    }
+  }
+
+  template <typename Iterator>
+  static bool all_empty(Iterator begin, Iterator end)
+  {
+    Iterator iter = begin;
+    std::size_t i = 0;
+    for (; iter != end && i < max_buffers; ++iter, ++i)
+      if (Buffer(*iter).size() > 0)
+        return false;
+    return true;
+  }
+
+  template <typename Iterator>
+  static void validate(Iterator begin, Iterator end)
+  {
+    Iterator iter = begin;
+    for (; iter != end; ++iter)
+    {
+      Buffer buffer(*iter);
+      buffer.data();
+    }
+  }
+
+  template <typename Iterator>
+  static Buffer first(Iterator begin, Iterator end)
+  {
+    Iterator iter = begin;
+    for (; iter != end; ++iter)
+    {
+      Buffer buffer(*iter);
+      if (buffer.size() != 0)
+        return buffer;
+    }
+    return Buffer();
+  }
+
+  native_buffer_type buffers_[max_buffers];
+  std::size_t count_;
+  std::size_t total_buffer_size_;
+};
+
+template <typename Buffer>
+class buffer_sequence_adapter<Buffer, asio::mutable_buffer>
+  : buffer_sequence_adapter_base
+{
+public:
+  explicit buffer_sequence_adapter(
+      const asio::mutable_buffer& buffer_sequence)
+  {
+    init_native_buffer(buffer_, Buffer(buffer_sequence));
+    total_buffer_size_ = buffer_sequence.size();
+  }
+
+  native_buffer_type* buffers()
+  {
+    return &buffer_;
+  }
+
+  std::size_t count() const
+  {
+    return 1;
+  }
+
+  std::size_t total_size() const
+  {
+    return total_buffer_size_;
+  }
+
+  bool all_empty() const
+  {
+    return total_buffer_size_ == 0;
+  }
+
+  static bool all_empty(const asio::mutable_buffer& buffer_sequence)
+  {
+    return buffer_sequence.size() == 0;
+  }
+
+  static void validate(const asio::mutable_buffer& buffer_sequence)
+  {
+    buffer_sequence.data();
+  }
+
+  static Buffer first(const asio::mutable_buffer& buffer_sequence)
+  {
+    return Buffer(buffer_sequence);
+  }
+
+private:
+  native_buffer_type buffer_;
+  std::size_t total_buffer_size_;
+};
+
+template <typename Buffer>
+class buffer_sequence_adapter<Buffer, asio::const_buffer>
+  : buffer_sequence_adapter_base
+{
+public:
+  explicit buffer_sequence_adapter(
+      const asio::const_buffer& buffer_sequence)
+  {
+    init_native_buffer(buffer_, Buffer(buffer_sequence));
+    total_buffer_size_ = buffer_sequence.size();
+  }
+
+  native_buffer_type* buffers()
+  {
+    return &buffer_;
+  }
+
+  std::size_t count() const
+  {
+    return 1;
+  }
+
+  std::size_t total_size() const
+  {
+    return total_buffer_size_;
+  }
+
+  bool all_empty() const
+  {
+    return total_buffer_size_ == 0;
+  }
+
+  static bool all_empty(const asio::const_buffer& buffer_sequence)
+  {
+    return buffer_sequence.size() == 0;
+  }
+
+  static void validate(const asio::const_buffer& buffer_sequence)
+  {
+    buffer_sequence.data();
+  }
+
+  static Buffer first(const asio::const_buffer& buffer_sequence)
+  {
+    return Buffer(buffer_sequence);
+  }
+
+private:
+  native_buffer_type buffer_;
+  std::size_t total_buffer_size_;
+};
+
+#if !defined(ASIO_NO_DEPRECATED)
+
+template <typename Buffer>
+class buffer_sequence_adapter<Buffer, asio::mutable_buffers_1>
+  : buffer_sequence_adapter_base
+{
+public:
+  explicit buffer_sequence_adapter(
+      const asio::mutable_buffers_1& buffer_sequence)
+  {
+    init_native_buffer(buffer_, Buffer(buffer_sequence));
+    total_buffer_size_ = buffer_sequence.size();
+  }
+
+  native_buffer_type* buffers()
+  {
+    return &buffer_;
+  }
+
+  std::size_t count() const
+  {
+    return 1;
+  }
+
+  std::size_t total_size() const
+  {
+    return total_buffer_size_;
+  }
+
+  bool all_empty() const
+  {
+    return total_buffer_size_ == 0;
+  }
+
+  static bool all_empty(const asio::mutable_buffers_1& buffer_sequence)
+  {
+    return buffer_sequence.size() == 0;
+  }
+
+  static void validate(const asio::mutable_buffers_1& buffer_sequence)
+  {
+    buffer_sequence.data();
+  }
+
+  static Buffer first(const asio::mutable_buffers_1& buffer_sequence)
+  {
+    return Buffer(buffer_sequence);
+  }
+
+private:
+  native_buffer_type buffer_;
+  std::size_t total_buffer_size_;
+};
+
+template <typename Buffer>
+class buffer_sequence_adapter<Buffer, asio::const_buffers_1>
+  : buffer_sequence_adapter_base
+{
+public:
+  explicit buffer_sequence_adapter(
+      const asio::const_buffers_1& buffer_sequence)
+  {
+    init_native_buffer(buffer_, Buffer(buffer_sequence));
+    total_buffer_size_ = buffer_sequence.size();
+  }
+
+  native_buffer_type* buffers()
+  {
+    return &buffer_;
+  }
+
+  std::size_t count() const
+  {
+    return 1;
+  }
+
+  std::size_t total_size() const
+  {
+    return total_buffer_size_;
+  }
+
+  bool all_empty() const
+  {
+    return total_buffer_size_ == 0;
+  }
+
+  static bool all_empty(const asio::const_buffers_1& buffer_sequence)
+  {
+    return buffer_sequence.size() == 0;
+  }
+
+  static void validate(const asio::const_buffers_1& buffer_sequence)
+  {
+    buffer_sequence.data();
+  }
+
+  static Buffer first(const asio::const_buffers_1& buffer_sequence)
+  {
+    return Buffer(buffer_sequence);
+  }
+
+private:
+  native_buffer_type buffer_;
+  std::size_t total_buffer_size_;
+};
+
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+template <typename Buffer, typename Elem>
+class buffer_sequence_adapter<Buffer, boost::array<Elem, 2> >
+  : buffer_sequence_adapter_base
+{
+public:
+  explicit buffer_sequence_adapter(
+      const boost::array<Elem, 2>& buffer_sequence)
+  {
+    init_native_buffer(buffers_[0], Buffer(buffer_sequence[0]));
+    init_native_buffer(buffers_[1], Buffer(buffer_sequence[1]));
+    total_buffer_size_ = buffer_sequence[0].size() + buffer_sequence[1].size();
+  }
+
+  native_buffer_type* buffers()
+  {
+    return buffers_;
+  }
+
+  std::size_t count() const
+  {
+    return 2;
+  }
+
+  std::size_t total_size() const
+  {
+    return total_buffer_size_;
+  }
+
+  bool all_empty() const
+  {
+    return total_buffer_size_ == 0;
+  }
+
+  static bool all_empty(const boost::array<Elem, 2>& buffer_sequence)
+  {
+    return buffer_sequence[0].size() == 0 && buffer_sequence[1].size() == 0;
+  }
+
+  static void validate(const boost::array<Elem, 2>& buffer_sequence)
+  {
+    buffer_sequence[0].data();
+    buffer_sequence[1].data();
+  }
+
+  static Buffer first(const boost::array<Elem, 2>& buffer_sequence)
+  {
+    return Buffer(buffer_sequence[0].size() != 0
+        ? buffer_sequence[0] : buffer_sequence[1]);
+  }
+
+private:
+  native_buffer_type buffers_[2];
+  std::size_t total_buffer_size_;
+};
+
+#if defined(ASIO_HAS_STD_ARRAY)
+
+template <typename Buffer, typename Elem>
+class buffer_sequence_adapter<Buffer, std::array<Elem, 2> >
+  : buffer_sequence_adapter_base
+{
+public:
+  explicit buffer_sequence_adapter(
+      const std::array<Elem, 2>& buffer_sequence)
+  {
+    init_native_buffer(buffers_[0], Buffer(buffer_sequence[0]));
+    init_native_buffer(buffers_[1], Buffer(buffer_sequence[1]));
+    total_buffer_size_ = buffer_sequence[0].size() + buffer_sequence[1].size();
+  }
+
+  native_buffer_type* buffers()
+  {
+    return buffers_;
+  }
+
+  std::size_t count() const
+  {
+    return 2;
+  }
+
+  std::size_t total_size() const
+  {
+    return total_buffer_size_;
+  }
+
+  bool all_empty() const
+  {
+    return total_buffer_size_ == 0;
+  }
+
+  static bool all_empty(const std::array<Elem, 2>& buffer_sequence)
+  {
+    return buffer_sequence[0].size() == 0 && buffer_sequence[1].size() == 0;
+  }
+
+  static void validate(const std::array<Elem, 2>& buffer_sequence)
+  {
+    buffer_sequence[0].data();
+    buffer_sequence[1].data();
+  }
+
+  static Buffer first(const std::array<Elem, 2>& buffer_sequence)
+  {
+    return Buffer(buffer_sequence[0].size() != 0
+        ? buffer_sequence[0] : buffer_sequence[1]);
+  }
+
+private:
+  native_buffer_type buffers_[2];
+  std::size_t total_buffer_size_;
+};
+
+#endif // defined(ASIO_HAS_STD_ARRAY)
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/buffer_sequence_adapter.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_BUFFER_SEQUENCE_ADAPTER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/buffered_stream_storage.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/buffered_stream_storage.hpp
new file mode 100644
index 00000000000..9223434dbc9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/buffered_stream_storage.hpp
@@ -0,0 +1,126 @@
+//
+// detail/buffered_stream_storage.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_BUFFERED_STREAM_STORAGE_HPP
+#define ASIO_DETAIL_BUFFERED_STREAM_STORAGE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/buffer.hpp"
+#include "asio/detail/assert.hpp"
+#include <cstddef>
+#include <cstring>
+#include <vector>
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class buffered_stream_storage
+{
+public:
+  // The type of the bytes stored in the buffer.
+  typedef unsigned char byte_type;
+
+  // The type used for offsets into the buffer.
+  typedef std::size_t size_type;
+
+  // Constructor.
+  explicit buffered_stream_storage(std::size_t buffer_capacity)
+    : begin_offset_(0),
+      end_offset_(0),
+      buffer_(buffer_capacity)
+  {
+  }
+
+  /// Clear the buffer.
+  void clear()
+  {
+    begin_offset_ = 0;
+    end_offset_ = 0;
+  }
+
+  // Return a pointer to the beginning of the unread data.
+  mutable_buffer data()
+  {
+    return asio::buffer(buffer_) + begin_offset_;
+  }
+
+  // Return a pointer to the beginning of the unread data.
+  const_buffer data() const
+  {
+    return asio::buffer(buffer_) + begin_offset_;
+  }
+
+  // Is there no unread data in the buffer.
+  bool empty() const
+  {
+    return begin_offset_ == end_offset_;
+  }
+
+  // Return the amount of unread data the is in the buffer.
+  size_type size() const
+  {
+    return end_offset_ - begin_offset_;
+  }
+
+  // Resize the buffer to the specified length.
+  void resize(size_type length)
+  {
+    ASIO_ASSERT(length <= capacity());
+    if (begin_offset_ + length <= capacity())
+    {
+      end_offset_ = begin_offset_ + length;
+    }
+    else
+    {
+      using namespace std; // For memmove.
+      memmove(&buffer_[0], &buffer_[0] + begin_offset_, size());
+      end_offset_ = length;
+      begin_offset_ = 0;
+    }
+  }
+
+  // Return the maximum size for data in the buffer.
+  size_type capacity() const
+  {
+    return buffer_.size();
+  }
+
+  // Consume multiple bytes from the beginning of the buffer.
+  void consume(size_type count)
+  {
+    ASIO_ASSERT(begin_offset_ + count <= end_offset_);
+    begin_offset_ += count;
+    if (empty())
+      clear();
+  }
+
+private:
+  // The offset to the beginning of the unread data.
+  size_type begin_offset_;
+
+  // The offset to the end of the unread data.
+  size_type end_offset_;
+  
+  // The data in the buffer.
+  std::vector<byte_type> buffer_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_BUFFERED_STREAM_STORAGE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/call_stack.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/call_stack.hpp
new file mode 100644
index 00000000000..fae9ce64757
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/call_stack.hpp
@@ -0,0 +1,125 @@
+//
+// detail/call_stack.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_CALL_STACK_HPP
+#define ASIO_DETAIL_CALL_STACK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/tss_ptr.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Helper class to determine whether or not the current thread is inside an
+// invocation of io_context::run() for a specified io_context object.
+template <typename Key, typename Value = unsigned char>
+class call_stack
+{
+public:
+  // Context class automatically pushes the key/value pair on to the stack.
+  class context
+    : private noncopyable
+  {
+  public:
+    // Push the key on to the stack.
+    explicit context(Key* k)
+      : key_(k),
+        next_(call_stack<Key, Value>::top_)
+    {
+      value_ = reinterpret_cast<unsigned char*>(this);
+      call_stack<Key, Value>::top_ = this;
+    }
+
+    // Push the key/value pair on to the stack.
+    context(Key* k, Value& v)
+      : key_(k),
+        value_(&v),
+        next_(call_stack<Key, Value>::top_)
+    {
+      call_stack<Key, Value>::top_ = this;
+    }
+
+    // Pop the key/value pair from the stack.
+    ~context()
+    {
+      call_stack<Key, Value>::top_ = next_;
+    }
+
+    // Find the next context with the same key.
+    Value* next_by_key() const
+    {
+      context* elem = next_;
+      while (elem)
+      {
+        if (elem->key_ == key_)
+          return elem->value_;
+        elem = elem->next_;
+      }
+      return 0;
+    }
+
+  private:
+    friend class call_stack<Key, Value>;
+
+    // The key associated with the context.
+    Key* key_;
+
+    // The value associated with the context.
+    Value* value_;
+
+    // The next element in the stack.
+    context* next_;
+  };
+
+  friend class context;
+
+  // Determine whether the specified owner is on the stack. Returns address of
+  // key if present, 0 otherwise.
+  static Value* contains(Key* k)
+  {
+    context* elem = top_;
+    while (elem)
+    {
+      if (elem->key_ == k)
+        return elem->value_;
+      elem = elem->next_;
+    }
+    return 0;
+  }
+
+  // Obtain the value at the top of the stack.
+  static Value* top()
+  {
+    context* elem = top_;
+    return elem ? elem->value_ : 0;
+  }
+
+private:
+  // The top of the stack of calls for the current thread.
+  static tss_ptr<context> top_;
+};
+
+template <typename Key, typename Value>
+tss_ptr<typename call_stack<Key, Value>::context>
+call_stack<Key, Value>::top_;
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_CALL_STACK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/chrono.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/chrono.hpp
new file mode 100644
index 00000000000..7e30b0dab88
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/chrono.hpp
@@ -0,0 +1,66 @@
+//
+// detail/chrono.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_CHRONO_HPP
+#define ASIO_DETAIL_CHRONO_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_STD_CHRONO)
+# include <chrono>
+#elif defined(ASIO_HAS_BOOST_CHRONO)
+# include <boost/chrono/system_clocks.hpp>
+#endif // defined(ASIO_HAS_BOOST_CHRONO)
+
+namespace asio {
+namespace chrono {
+
+#if defined(ASIO_HAS_STD_CHRONO)
+using std::chrono::duration;
+using std::chrono::time_point;
+using std::chrono::duration_cast;
+using std::chrono::nanoseconds;
+using std::chrono::microseconds;
+using std::chrono::milliseconds;
+using std::chrono::seconds;
+using std::chrono::minutes;
+using std::chrono::hours;
+using std::chrono::time_point_cast;
+#if defined(ASIO_HAS_STD_CHRONO_MONOTONIC_CLOCK)
+typedef std::chrono::monotonic_clock steady_clock;
+#else // defined(ASIO_HAS_STD_CHRONO_MONOTONIC_CLOCK)
+using std::chrono::steady_clock;
+#endif // defined(ASIO_HAS_STD_CHRONO_MONOTONIC_CLOCK)
+using std::chrono::system_clock;
+using std::chrono::high_resolution_clock;
+#elif defined(ASIO_HAS_BOOST_CHRONO)
+using boost::chrono::duration;
+using boost::chrono::time_point;
+using boost::chrono::duration_cast;
+using boost::chrono::nanoseconds;
+using boost::chrono::microseconds;
+using boost::chrono::milliseconds;
+using boost::chrono::seconds;
+using boost::chrono::minutes;
+using boost::chrono::hours;
+using boost::chrono::time_point_cast;
+using boost::chrono::system_clock;
+using boost::chrono::steady_clock;
+using boost::chrono::high_resolution_clock;
+#endif // defined(ASIO_HAS_BOOST_CHRONO)
+
+} // namespace chrono
+} // namespace asio
+
+#endif // ASIO_DETAIL_CHRONO_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/chrono_time_traits.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/chrono_time_traits.hpp
new file mode 100644
index 00000000000..bd421a476f0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/chrono_time_traits.hpp
@@ -0,0 +1,190 @@
+//
+// detail/chrono_time_traits.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_CHRONO_TIME_TRAITS_HPP
+#define ASIO_DETAIL_CHRONO_TIME_TRAITS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/cstdint.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Helper template to compute the greatest common divisor.
+template <int64_t v1, int64_t v2>
+struct gcd { enum { value = gcd<v2, v1 % v2>::value }; };
+
+template <int64_t v1>
+struct gcd<v1, 0> { enum { value = v1 }; };
+
+// Adapts std::chrono clocks for use with a deadline timer.
+template <typename Clock, typename WaitTraits>
+struct chrono_time_traits
+{
+  // The clock type.
+  typedef Clock clock_type;
+
+  // The duration type of the clock.
+  typedef typename clock_type::duration duration_type;
+
+  // The time point type of the clock.
+  typedef typename clock_type::time_point time_type;
+
+  // The period of the clock.
+  typedef typename duration_type::period period_type;
+
+  // Get the current time.
+  static time_type now()
+  {
+    return clock_type::now();
+  }
+
+  // Add a duration to a time.
+  static time_type add(const time_type& t, const duration_type& d)
+  {
+    const time_type epoch;
+    if (t >= epoch)
+    {
+      if ((time_type::max)() - t < d)
+        return (time_type::max)();
+    }
+    else // t < epoch
+    {
+      if (-(t - (time_type::min)()) > d)
+        return (time_type::min)();
+    }
+
+    return t + d;
+  }
+
+  // Subtract one time from another.
+  static duration_type subtract(const time_type& t1, const time_type& t2)
+  {
+    const time_type epoch;
+    if (t1 >= epoch)
+    {
+      if (t2 >= epoch)
+      {
+        return t1 - t2;
+      }
+      else if (t2 == (time_type::min)())
+      {
+        return (duration_type::max)();
+      }
+      else if ((time_type::max)() - t1 < epoch - t2)
+      {
+        return (duration_type::max)();
+      }
+      else
+      {
+        return t1 - t2;
+      }
+    }
+    else // t1 < epoch
+    {
+      if (t2 < epoch)
+      {
+        return t1 - t2;
+      }
+      else if (t1 == (time_type::min)())
+      {
+        return (duration_type::min)();
+      }
+      else if ((time_type::max)() - t2 < epoch - t1)
+      {
+        return (duration_type::min)();
+      }
+      else
+      {
+        return -(t2 - t1);
+      }
+    }
+  }
+
+  // Test whether one time is less than another.
+  static bool less_than(const time_type& t1, const time_type& t2)
+  {
+    return t1 < t2;
+  }
+
+  // Implement just enough of the posix_time::time_duration interface to supply
+  // what the timer_queue requires.
+  class posix_time_duration
+  {
+  public:
+    explicit posix_time_duration(const duration_type& d)
+      : d_(d)
+    {
+    }
+
+    int64_t ticks() const
+    {
+      return d_.count();
+    }
+
+    int64_t total_seconds() const
+    {
+      return duration_cast<1, 1>();
+    }
+
+    int64_t total_milliseconds() const
+    {
+      return duration_cast<1, 1000>();
+    }
+
+    int64_t total_microseconds() const
+    {
+      return duration_cast<1, 1000000>();
+    }
+
+  private:
+    template <int64_t Num, int64_t Den>
+    int64_t duration_cast() const
+    {
+      const int64_t num1 = period_type::num / gcd<period_type::num, Num>::value;
+      const int64_t num2 = Num / gcd<period_type::num, Num>::value;
+
+      const int64_t den1 = period_type::den / gcd<period_type::den, Den>::value;
+      const int64_t den2 = Den / gcd<period_type::den, Den>::value;
+
+      const int64_t num = num1 * den2;
+      const int64_t den = num2 * den1;
+
+      if (num == 1 && den == 1)
+        return ticks();
+      else if (num != 1 && den == 1)
+        return ticks() * num;
+      else if (num == 1 && period_type::den != 1)
+        return ticks() / den;
+      else
+        return ticks() * num / den;
+    }
+
+    duration_type d_;
+  };
+
+  // Convert to POSIX duration type.
+  static posix_time_duration to_posix_duration(const duration_type& d)
+  {
+    return posix_time_duration(WaitTraits::to_wait_duration(d));
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_CHRONO_TIME_TRAITS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/completion_handler.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/completion_handler.hpp
new file mode 100644
index 00000000000..fef3e767c50
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/completion_handler.hpp
@@ -0,0 +1,83 @@
+//
+// detail/completion_handler.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_COMPLETION_HANDLER_HPP
+#define ASIO_DETAIL_COMPLETION_HANDLER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_work.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/operation.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler>
+class completion_handler : public operation
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(completion_handler);
+
+  completion_handler(Handler& h)
+    : operation(&completion_handler::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(h))
+  {
+    handler_work<Handler>::start(handler_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    completion_handler* h(static_cast<completion_handler*>(base));
+    ptr p = { asio::detail::addressof(h->handler_), h, h };
+    handler_work<Handler> w(h->handler_);
+
+    ASIO_HANDLER_COMPLETION((*h));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    Handler handler(ASIO_MOVE_CAST(Handler)(h->handler_));
+    p.h = asio::detail::addressof(handler);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN(());
+      w.complete(handler, handler);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_COMPLETION_HANDLER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/concurrency_hint.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/concurrency_hint.hpp
new file mode 100644
index 00000000000..31cfeb07289
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/concurrency_hint.hpp
@@ -0,0 +1,94 @@
+//
+// detail/concurrency_hint.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_CONCURRENCY_HINT_HPP
+#define ASIO_DETAIL_CONCURRENCY_HINT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/noncopyable.hpp"
+
+// The concurrency hint ID and mask are used to identify when a "well-known"
+// concurrency hint value has been passed to the io_context.
+#define ASIO_CONCURRENCY_HINT_ID 0xA5100000u
+#define ASIO_CONCURRENCY_HINT_ID_MASK 0xFFFF0000u
+
+// If set, this bit indicates that the scheduler should perform locking.
+#define ASIO_CONCURRENCY_HINT_LOCKING_SCHEDULER 0x1u
+
+// If set, this bit indicates that the reactor should perform locking when
+// managing descriptor registrations.
+#define ASIO_CONCURRENCY_HINT_LOCKING_REACTOR_REGISTRATION 0x2u
+
+// If set, this bit indicates that the reactor should perform locking for I/O.
+#define ASIO_CONCURRENCY_HINT_LOCKING_REACTOR_IO 0x4u
+
+// Helper macro to determine if we have a special concurrency hint.
+#define ASIO_CONCURRENCY_HINT_IS_SPECIAL(hint) \
+  ((static_cast<unsigned>(hint) \
+    & ASIO_CONCURRENCY_HINT_ID_MASK) \
+      == ASIO_CONCURRENCY_HINT_ID)
+
+// Helper macro to determine if locking is enabled for a given facility.
+#define ASIO_CONCURRENCY_HINT_IS_LOCKING(facility, hint) \
+  (((static_cast<unsigned>(hint) \
+    & (ASIO_CONCURRENCY_HINT_ID_MASK \
+      | ASIO_CONCURRENCY_HINT_LOCKING_ ## facility)) \
+        ^ ASIO_CONCURRENCY_HINT_ID) != 0)
+
+// This special concurrency hint disables locking in both the scheduler and
+// reactor I/O. This hint has the following restrictions:
+//
+// - Care must be taken to ensure that all operations on the io_context and any
+//   of its associated I/O objects (such as sockets and timers) occur in only
+//   one thread at a time.
+//
+// - Asynchronous resolve operations fail with operation_not_supported.
+//
+// - If a signal_set is used with the io_context, signal_set objects cannot be
+//   used with any other io_context in the program.
+#define ASIO_CONCURRENCY_HINT_UNSAFE \
+  static_cast<int>(ASIO_CONCURRENCY_HINT_ID)
+
+// This special concurrency hint disables locking in the reactor I/O. This hint
+// has the following restrictions:
+//
+// - Care must be taken to ensure that run functions on the io_context, and all
+//   operations on the io_context's associated I/O objects (such as sockets and
+//   timers), occur in only one thread at a time.
+#define ASIO_CONCURRENCY_HINT_UNSAFE_IO \
+  static_cast<int>(ASIO_CONCURRENCY_HINT_ID \
+      | ASIO_CONCURRENCY_HINT_LOCKING_SCHEDULER \
+      | ASIO_CONCURRENCY_HINT_LOCKING_REACTOR_REGISTRATION)
+
+// The special concurrency hint provides full thread safety.
+#define ASIO_CONCURRENCY_HINT_SAFE \
+  static_cast<int>(ASIO_CONCURRENCY_HINT_ID \
+      | ASIO_CONCURRENCY_HINT_LOCKING_SCHEDULER \
+      | ASIO_CONCURRENCY_HINT_LOCKING_REACTOR_REGISTRATION \
+      | ASIO_CONCURRENCY_HINT_LOCKING_REACTOR_IO)
+
+// This #define may be overridden at compile time to specify a program-wide
+// default concurrency hint, used by the zero-argument io_context constructor.
+#if !defined(ASIO_CONCURRENCY_HINT_DEFAULT)
+# define ASIO_CONCURRENCY_HINT_DEFAULT -1
+#endif // !defined(ASIO_CONCURRENCY_HINT_DEFAULT)
+
+// This #define may be overridden at compile time to specify a program-wide
+// concurrency hint, used by the one-argument io_context constructor when
+// passed a value of 1.
+#if !defined(ASIO_CONCURRENCY_HINT_1)
+# define ASIO_CONCURRENCY_HINT_1 1
+#endif // !defined(ASIO_CONCURRENCY_HINT_DEFAULT)
+
+#endif // ASIO_DETAIL_CONCURRENCY_HINT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/conditionally_enabled_event.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/conditionally_enabled_event.hpp
new file mode 100644
index 00000000000..7b9c924abd6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/conditionally_enabled_event.hpp
@@ -0,0 +1,112 @@
+//
+// detail/conditionally_enabled_event.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_CONDITIONALLY_ENABLED_EVENT_HPP
+#define ASIO_DETAIL_CONDITIONALLY_ENABLED_EVENT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/conditionally_enabled_mutex.hpp"
+#include "asio/detail/event.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/null_event.hpp"
+#include "asio/detail/scoped_lock.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Mutex adapter used to conditionally enable or disable locking.
+class conditionally_enabled_event
+  : private noncopyable
+{
+public:
+  // Constructor.
+  conditionally_enabled_event()
+  {
+  }
+
+  // Destructor.
+  ~conditionally_enabled_event()
+  {
+  }
+
+  // Signal the event. (Retained for backward compatibility.)
+  void signal(conditionally_enabled_mutex::scoped_lock& lock)
+  {
+    if (lock.mutex_.enabled_)
+      event_.signal(lock);
+  }
+
+  // Signal all waiters.
+  void signal_all(conditionally_enabled_mutex::scoped_lock& lock)
+  {
+    if (lock.mutex_.enabled_)
+      event_.signal_all(lock);
+  }
+
+  // Unlock the mutex and signal one waiter.
+  void unlock_and_signal_one(
+      conditionally_enabled_mutex::scoped_lock& lock)
+  {
+    if (lock.mutex_.enabled_)
+      event_.unlock_and_signal_one(lock);
+  }
+
+  // If there's a waiter, unlock the mutex and signal it.
+  bool maybe_unlock_and_signal_one(
+      conditionally_enabled_mutex::scoped_lock& lock)
+  {
+    if (lock.mutex_.enabled_)
+      return event_.maybe_unlock_and_signal_one(lock);
+    else
+      return false;
+  }
+
+  // Reset the event.
+  void clear(conditionally_enabled_mutex::scoped_lock& lock)
+  {
+    if (lock.mutex_.enabled_)
+      event_.clear(lock);
+  }
+
+  // Wait for the event to become signalled.
+  void wait(conditionally_enabled_mutex::scoped_lock& lock)
+  {
+    if (lock.mutex_.enabled_)
+      event_.wait(lock);
+    else
+      null_event().wait(lock);
+  }
+
+  // Timed wait for the event to become signalled.
+  bool wait_for_usec(
+      conditionally_enabled_mutex::scoped_lock& lock, long usec)
+  {
+    if (lock.mutex_.enabled_)
+      return event_.wait_for_usec(lock, usec);
+    else
+      return null_event().wait_for_usec(lock, usec);
+  }
+
+private:
+  asio::detail::event event_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_CONDITIONALLY_ENABLED_EVENT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/conditionally_enabled_mutex.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/conditionally_enabled_mutex.hpp
new file mode 100644
index 00000000000..a3c3ee74228
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/conditionally_enabled_mutex.hpp
@@ -0,0 +1,149 @@
+//
+// detail/conditionally_enabled_mutex.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_CONDITIONALLY_ENABLED_MUTEX_HPP
+#define ASIO_DETAIL_CONDITIONALLY_ENABLED_MUTEX_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/scoped_lock.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Mutex adapter used to conditionally enable or disable locking.
+class conditionally_enabled_mutex
+  : private noncopyable
+{
+public:
+  // Helper class to lock and unlock a mutex automatically.
+  class scoped_lock
+    : private noncopyable
+  {
+  public:
+    // Tag type used to distinguish constructors.
+    enum adopt_lock_t { adopt_lock };
+
+    // Constructor adopts a lock that is already held.
+    scoped_lock(conditionally_enabled_mutex& m, adopt_lock_t)
+      : mutex_(m),
+        locked_(m.enabled_)
+    {
+    }
+
+    // Constructor acquires the lock.
+    explicit scoped_lock(conditionally_enabled_mutex& m)
+      : mutex_(m)
+    {
+      if (m.enabled_)
+      {
+        mutex_.mutex_.lock();
+        locked_ = true;
+      }
+      else
+        locked_ = false;
+    }
+
+    // Destructor releases the lock.
+    ~scoped_lock()
+    {
+      if (locked_)
+        mutex_.mutex_.unlock();
+    }
+
+    // Explicitly acquire the lock.
+    void lock()
+    {
+      if (mutex_.enabled_ && !locked_)
+      {
+        mutex_.mutex_.lock();
+        locked_ = true;
+      }
+    }
+
+    // Explicitly release the lock.
+    void unlock()
+    {
+      if (locked_)
+      {
+        mutex_.unlock();
+        locked_ = false;
+      }
+    }
+
+    // Test whether the lock is held.
+    bool locked() const
+    {
+      return locked_;
+    }
+
+    // Get the underlying mutex.
+    asio::detail::mutex& mutex()
+    {
+      return mutex_.mutex_;
+    }
+
+  private:
+    friend class conditionally_enabled_event;
+    conditionally_enabled_mutex& mutex_;
+    bool locked_;
+  };
+
+  // Constructor.
+  explicit conditionally_enabled_mutex(bool enabled)
+    : enabled_(enabled)
+  {
+  }
+
+  // Destructor.
+  ~conditionally_enabled_mutex()
+  {
+  }
+
+  // Determine whether locking is enabled.
+  bool enabled() const
+  {
+    return enabled_;
+  }
+
+  // Lock the mutex.
+  void lock()
+  {
+    if (enabled_)
+      mutex_.lock();
+  }
+
+  // Unlock the mutex.
+  void unlock()
+  {
+    if (enabled_)
+      mutex_.unlock();
+  }
+
+private:
+  friend class scoped_lock;
+  friend class conditionally_enabled_event;
+  asio::detail::mutex mutex_;
+  const bool enabled_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_CONDITIONALLY_ENABLED_MUTEX_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/config.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/config.hpp
new file mode 100644
index 00000000000..530e7666be8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/config.hpp
@@ -0,0 +1,1495 @@
+//
+// detail/config.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_CONFIG_HPP
+#define ASIO_DETAIL_CONFIG_HPP
+
+#if defined(ESP_PLATFORM)
+# include "esp_asio_config.h"
+#endif // defined(ESP_PLATFORM)
+
+// boostify: non-boost code starts here
+#if !defined(ASIO_STANDALONE)
+# if !defined(ASIO_ENABLE_BOOST)
+#  if (__cplusplus >= 201103)
+#   define ASIO_STANDALONE 1
+#  elif defined(_MSC_VER) && defined(_MSVC_LANG)
+#   if (_MSC_VER >= 1900) && (_MSVC_LANG >= 201103)
+#    define ASIO_STANDALONE 1
+#   endif // (_MSC_VER >= 1900) && (_MSVC_LANG >= 201103)
+#  endif // defined(_MSC_VER) && defined(_MSVC_LANG)
+# endif // !defined(ASIO_ENABLE_BOOST)
+#endif // !defined(ASIO_STANDALONE)
+
+// boostify: non-boost code ends here
+
+#if defined(ASIO_STANDALONE)
+# define ASIO_DISABLE_BOOST_ARRAY 1
+# define ASIO_DISABLE_BOOST_ASSERT 1
+# define ASIO_DISABLE_BOOST_BIND 1
+# define ASIO_DISABLE_BOOST_CHRONO 1
+# define ASIO_DISABLE_BOOST_DATE_TIME 1
+# define ASIO_DISABLE_BOOST_LIMITS 1
+# define ASIO_DISABLE_BOOST_REGEX 1
+# define ASIO_DISABLE_BOOST_STATIC_CONSTANT 1
+# define ASIO_DISABLE_BOOST_THROW_EXCEPTION 1
+# define ASIO_DISABLE_BOOST_WORKAROUND 1
+#else // defined(ASIO_STANDALONE)
+# include <boost/config.hpp>
+# include <boost/version.hpp>
+# define ASIO_HAS_BOOST_CONFIG 1
+#endif // defined(ASIO_STANDALONE)
+
+// Default to a header-only implementation. The user must specifically request
+// separate compilation by defining either ASIO_SEPARATE_COMPILATION or
+// ASIO_DYN_LINK (as a DLL/shared library implies separate compilation).
+#if !defined(ASIO_HEADER_ONLY)
+# if !defined(ASIO_SEPARATE_COMPILATION)
+#  if !defined(ASIO_DYN_LINK)
+#   define ASIO_HEADER_ONLY 1
+#  endif // !defined(ASIO_DYN_LINK)
+# endif // !defined(ASIO_SEPARATE_COMPILATION)
+#endif // !defined(ASIO_HEADER_ONLY)
+
+#if defined(ASIO_HEADER_ONLY)
+# define ASIO_DECL inline
+#else // defined(ASIO_HEADER_ONLY)
+# if defined(_MSC_VER) || defined(__BORLANDC__) || defined(__CODEGEARC__)
+// We need to import/export our code only if the user has specifically asked
+// for it by defining ASIO_DYN_LINK.
+#  if defined(ASIO_DYN_LINK)
+// Export if this is our own source, otherwise import.
+#   if defined(ASIO_SOURCE)
+#    define ASIO_DECL __declspec(dllexport)
+#   else // defined(ASIO_SOURCE)
+#    define ASIO_DECL __declspec(dllimport)
+#   endif // defined(ASIO_SOURCE)
+#  endif // defined(ASIO_DYN_LINK)
+# endif // defined(_MSC_VER) || defined(__BORLANDC__) || defined(__CODEGEARC__)
+#endif // defined(ASIO_HEADER_ONLY)
+
+// If ASIO_DECL isn't defined yet define it now.
+#if !defined(ASIO_DECL)
+# define ASIO_DECL
+#endif // !defined(ASIO_DECL)
+
+// Microsoft Visual C++ detection.
+#if !defined(ASIO_MSVC)
+# if defined(ASIO_HAS_BOOST_CONFIG) && defined(BOOST_MSVC)
+#  define ASIO_MSVC BOOST_MSVC
+# elif defined(_MSC_VER) && (defined(__INTELLISENSE__) \
+      || (!defined(__MWERKS__) && !defined(__EDG_VERSION__)))
+#  define ASIO_MSVC _MSC_VER
+# endif // defined(ASIO_HAS_BOOST_CONFIG) && defined(BOOST_MSVC)
+#endif // !defined(ASIO_MSVC)
+
+// Clang / libc++ detection.
+#if defined(__clang__)
+# if (__cplusplus >= 201103)
+#  if __has_include(<__config>)
+#   include <__config>
+#   if defined(_LIBCPP_VERSION)
+#    define ASIO_HAS_CLANG_LIBCXX 1
+#   endif // defined(_LIBCPP_VERSION)
+#  endif // __has_include(<__config>)
+# endif // (__cplusplus >= 201103)
+#endif // defined(__clang__)
+
+// Android platform detection.
+#if defined(__ANDROID__)
+# include <android/api-level.h>
+#endif // defined(__ANDROID__)
+
+// Support move construction and assignment on compilers known to allow it.
+#if !defined(ASIO_HAS_MOVE)
+# if !defined(ASIO_DISABLE_MOVE)
+#  if defined(__clang__)
+#   if __has_feature(__cxx_rvalue_references__)
+#    define ASIO_HAS_MOVE 1
+#   endif // __has_feature(__cxx_rvalue_references__)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 5)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_MOVE 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 5)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_MOVE 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+#  if defined(__INTEL_CXX11_MODE__)
+#    if defined(__INTEL_COMPILER) && (__INTEL_COMPILER >= 1500)
+#      define BOOST_ASIO_HAS_MOVE 1
+#    endif // defined(__INTEL_COMPILER) && (__INTEL_COMPILER >= 1500)
+#    if defined(__ICL) && (__ICL >= 1500)
+#      define BOOST_ASIO_HAS_MOVE 1
+#    endif // defined(__ICL) && (__ICL >= 1500)
+#  endif // defined(__INTEL_CXX11_MODE__)
+# endif // !defined(ASIO_DISABLE_MOVE)
+#endif // !defined(ASIO_HAS_MOVE)
+
+// If ASIO_MOVE_CAST isn't defined, and move support is available, define
+// * ASIO_MOVE_ARG,
+// * ASIO_NONDEDUCED_MOVE_ARG, and
+// * ASIO_MOVE_CAST
+// to take advantage of rvalue references and perfect forwarding.
+#if defined(ASIO_HAS_MOVE) && !defined(ASIO_MOVE_CAST)
+# define ASIO_MOVE_ARG(type) type&&
+# define ASIO_MOVE_ARG2(type1, type2) type1, type2&&
+# define ASIO_NONDEDUCED_MOVE_ARG(type) type&
+# define ASIO_MOVE_CAST(type) static_cast<type&&>
+# define ASIO_MOVE_CAST2(type1, type2) static_cast<type1, type2&&>
+#endif // defined(ASIO_HAS_MOVE) && !defined(ASIO_MOVE_CAST)
+
+// If ASIO_MOVE_CAST still isn't defined, default to a C++03-compatible
+// implementation. Note that older g++ and MSVC versions don't like it when you
+// pass a non-member function through a const reference, so for most compilers
+// we'll play it safe and stick with the old approach of passing the handler by
+// value.
+#if !defined(ASIO_MOVE_CAST)
+# if defined(__GNUC__)
+#  if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)) || (__GNUC__ > 4)
+#   define ASIO_MOVE_ARG(type) const type&
+#  else // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)) || (__GNUC__ > 4)
+#   define ASIO_MOVE_ARG(type) type
+#  endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)) || (__GNUC__ > 4)
+# elif defined(ASIO_MSVC)
+#  if (_MSC_VER >= 1400)
+#   define ASIO_MOVE_ARG(type) const type&
+#  else // (_MSC_VER >= 1400)
+#   define ASIO_MOVE_ARG(type) type
+#  endif // (_MSC_VER >= 1400)
+# else
+#  define ASIO_MOVE_ARG(type) type
+# endif
+# define ASIO_NONDEDUCED_MOVE_ARG(type) const type&
+# define ASIO_MOVE_CAST(type) static_cast<const type&>
+# define ASIO_MOVE_CAST2(type1, type2) static_cast<const type1, type2&>
+#endif // !defined(ASIO_MOVE_CAST)
+
+// Support variadic templates on compilers known to allow it.
+#if !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+# if !defined(ASIO_DISABLE_VARIADIC_TEMPLATES)
+#  if defined(__clang__)
+#   if __has_feature(__cxx_variadic_templates__)
+#    define ASIO_HAS_VARIADIC_TEMPLATES 1
+#   endif // __has_feature(__cxx_variadic_templates__)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_VARIADIC_TEMPLATES 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1900)
+#    define ASIO_HAS_VARIADIC_TEMPLATES 1
+#   endif // (_MSC_VER >= 1900)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_VARIADIC_TEMPLATES)
+#endif // !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+// Support deleted functions on compilers known to allow it.
+#if !defined(ASIO_DELETED)
+# if defined(__GNUC__)
+#  if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#   if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#    define ASIO_DELETED = delete
+#   endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#  endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+# endif // defined(__GNUC__)
+# if defined(__clang__)
+#  if __has_feature(__cxx_deleted_functions__)
+#   define ASIO_DELETED = delete
+#  endif // __has_feature(__cxx_deleted_functions__)
+# endif // defined(__clang__)
+# if defined(ASIO_MSVC)
+#  if (_MSC_VER >= 1900)
+#   define ASIO_DELETED = delete
+#  endif // (_MSC_VER >= 1900)
+# endif // defined(ASIO_MSVC)
+# if !defined(ASIO_DELETED)
+#  define ASIO_DELETED
+# endif // !defined(ASIO_DELETED)
+#endif // !defined(ASIO_DELETED)
+
+// Support constexpr on compilers known to allow it.
+#if !defined(ASIO_HAS_CONSTEXPR)
+# if !defined(ASIO_DISABLE_CONSTEXPR)
+#  if defined(__clang__)
+#   if __has_feature(__cxx_constexpr__)
+#    define ASIO_HAS_CONSTEXPR 1
+#   endif // __has_feature(__cxx_constexr__)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_CONSTEXPR 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1900)
+#    define ASIO_HAS_CONSTEXPR 1
+#   endif // (_MSC_VER >= 1900)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_CONSTEXPR)
+#endif // !defined(ASIO_HAS_CONSTEXPR)
+#if !defined(ASIO_CONSTEXPR)
+# if defined(ASIO_HAS_CONSTEXPR)
+#  define ASIO_CONSTEXPR constexpr
+# else // defined(ASIO_HAS_CONSTEXPR)
+#  define ASIO_CONSTEXPR
+# endif // defined(ASIO_HAS_CONSTEXPR)
+#endif // !defined(ASIO_CONSTEXPR)
+
+// Support noexcept on compilers known to allow it.
+#if !defined(ASIO_NOEXCEPT)
+# if !defined(ASIO_DISABLE_NOEXCEPT)
+#  if defined(ASIO_HAS_BOOST_CONFIG) && (BOOST_VERSION >= 105300)
+#   define ASIO_NOEXCEPT BOOST_NOEXCEPT
+#   define ASIO_NOEXCEPT_OR_NOTHROW BOOST_NOEXCEPT_OR_NOTHROW
+#  elif defined(__clang__)
+#   if __has_feature(__cxx_noexcept__)
+#    define ASIO_NOEXCEPT noexcept(true)
+#    define ASIO_NOEXCEPT_OR_NOTHROW noexcept(true)
+#   endif // __has_feature(__cxx_noexcept__)
+#  elif defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#      define ASIO_NOEXCEPT noexcept(true)
+#      define ASIO_NOEXCEPT_OR_NOTHROW noexcept(true)
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#  elif defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1900)
+#    define ASIO_NOEXCEPT noexcept(true)
+#    define ASIO_NOEXCEPT_OR_NOTHROW noexcept(true)
+#   endif // (_MSC_VER >= 1900)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_NOEXCEPT)
+# if !defined(ASIO_NOEXCEPT)
+#  define ASIO_NOEXCEPT
+# endif // !defined(ASIO_NOEXCEPT)
+# if !defined(ASIO_NOEXCEPT_OR_NOTHROW)
+#  define ASIO_NOEXCEPT_OR_NOTHROW throw()
+# endif // !defined(ASIO_NOEXCEPT_OR_NOTHROW)
+#endif // !defined(ASIO_NOEXCEPT)
+
+// Support automatic type deduction on compilers known to support it.
+#if !defined(ASIO_HAS_DECLTYPE)
+# if !defined(ASIO_DISABLE_DECLTYPE)
+#  if defined(__clang__)
+#   if __has_feature(__cxx_decltype__)
+#    define ASIO_HAS_DECLTYPE 1
+#   endif // __has_feature(__cxx_decltype__)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_DECLTYPE 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1800)
+#    define ASIO_HAS_DECLTYPE 1
+#   endif // (_MSC_VER >= 1800)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_DECLTYPE)
+#endif // !defined(ASIO_HAS_DECLTYPE)
+
+// Support alias templates on compilers known to allow it.
+#if !defined(ASIO_HAS_ALIAS_TEMPLATES)
+# if !defined(ASIO_DISABLE_ALIAS_TEMPLATES)
+#  if defined(__clang__)
+#   if __has_feature(__cxx_alias_templates__)
+#    define ASIO_HAS_ALIAS_TEMPLATES 1
+#   endif // __has_feature(__cxx_alias_templates__)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_ALIAS_TEMPLATES 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1900)
+#    define ASIO_HAS_ALIAS_TEMPLATES 1
+#   endif // (_MSC_VER >= 1900)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_ALIAS_TEMPLATES)
+#endif // !defined(ASIO_HAS_ALIAS_TEMPLATES)
+
+// Support return type deduction on compilers known to allow it.
+#if !defined(ASIO_HAS_RETURN_TYPE_DEDUCTION)
+# if !defined(ASIO_DISABLE_RETURN_TYPE_DEDUCTION)
+#  if defined(__clang__)
+#   if __has_feature(__cxx_return_type_deduction__)
+#    define ASIO_HAS_RETURN_TYPE_DEDUCTION 1
+#   endif // __has_feature(__cxx_alias_templates__)
+#  elif (__cplusplus >= 201402)
+#   define ASIO_HAS_RETURN_TYPE_DEDUCTION 1
+#  endif // (__cplusplus >= 201402)
+# endif // !defined(ASIO_DISABLE_RETURN_TYPE_DEDUCTION)
+#endif // !defined(ASIO_HAS_RETURN_TYPE_DEDUCTION)
+
+// Support default function template arguments on compilers known to allow it.
+#if !defined(ASIO_HAS_DEFAULT_FUNCTION_TEMPLATE_ARGUMENTS)
+# if !defined(ASIO_DISABLE_DEFAULT_FUNCTION_TEMPLATE_ARGUMENTS)
+#  if (__cplusplus >= 201103)
+#   define ASIO_HAS_DEFAULT_FUNCTION_TEMPLATE_ARGUMENTS 1
+#  endif // (__cplusplus >= 201103)
+# endif // !defined(ASIO_DISABLE_DEFAULT_FUNCTION_TEMPLATE_ARGUMENTS)
+#endif // !defined(ASIO_HAS_DEFAULT_FUNCTION_TEMPLATE_ARGUMENTS)
+
+// Support concepts on compilers known to allow them.
+#if !defined(ASIO_HAS_CONCEPTS)
+# if !defined(ASIO_DISABLE_CONCEPTS)
+#  if __cpp_concepts
+#   define ASIO_HAS_CONCEPTS 1
+#   define ASIO_CONCEPT concept bool
+#  endif // __cpp_concepts
+# endif // !defined(ASIO_DISABLE_CONCEPTS)
+#endif // !defined(ASIO_HAS_CONCEPTS)
+
+// Standard library support for system errors.
+#if !defined(ASIO_HAS_STD_SYSTEM_ERROR)
+# if !defined(ASIO_DISABLE_STD_SYSTEM_ERROR)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_SYSTEM_ERROR 1
+#   elif (__cplusplus >= 201103)
+#    if __has_include(<system_error>)
+#     define ASIO_HAS_STD_SYSTEM_ERROR 1
+#    endif // __has_include(<system_error>)
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_SYSTEM_ERROR 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_STD_SYSTEM_ERROR 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_SYSTEM_ERROR)
+#endif // !defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+// Compliant C++11 compilers put noexcept specifiers on error_category members.
+#if !defined(ASIO_ERROR_CATEGORY_NOEXCEPT)
+# if defined(ASIO_HAS_BOOST_CONFIG) && (BOOST_VERSION >= 105300)
+#  define ASIO_ERROR_CATEGORY_NOEXCEPT BOOST_NOEXCEPT
+# elif defined(__clang__)
+#  if __has_feature(__cxx_noexcept__)
+#   define ASIO_ERROR_CATEGORY_NOEXCEPT noexcept(true)
+#  endif // __has_feature(__cxx_noexcept__)
+# elif defined(__GNUC__)
+#  if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#   if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_ERROR_CATEGORY_NOEXCEPT noexcept(true)
+#   endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#  endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+# elif defined(ASIO_MSVC)
+#  if (_MSC_VER >= 1900)
+#   define ASIO_ERROR_CATEGORY_NOEXCEPT noexcept(true)
+#  endif // (_MSC_VER >= 1900)
+# endif // defined(ASIO_MSVC)
+# if !defined(ASIO_ERROR_CATEGORY_NOEXCEPT)
+#  define ASIO_ERROR_CATEGORY_NOEXCEPT
+# endif // !defined(ASIO_ERROR_CATEGORY_NOEXCEPT)
+#endif // !defined(ASIO_ERROR_CATEGORY_NOEXCEPT)
+
+// Standard library support for arrays.
+#if !defined(ASIO_HAS_STD_ARRAY)
+# if !defined(ASIO_DISABLE_STD_ARRAY)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_ARRAY 1
+#   elif (__cplusplus >= 201103)
+#    if __has_include(<array>)
+#     define ASIO_HAS_STD_ARRAY 1
+#    endif // __has_include(<array>)
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_ARRAY 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1600)
+#    define ASIO_HAS_STD_ARRAY 1
+#   endif // (_MSC_VER >= 1600)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_ARRAY)
+#endif // !defined(ASIO_HAS_STD_ARRAY)
+
+// Standard library support for shared_ptr and weak_ptr.
+#if !defined(ASIO_HAS_STD_SHARED_PTR)
+# if !defined(ASIO_DISABLE_STD_SHARED_PTR)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_SHARED_PTR 1
+#   elif (__cplusplus >= 201103)
+#    define ASIO_HAS_STD_SHARED_PTR 1
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_SHARED_PTR 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1600)
+#    define ASIO_HAS_STD_SHARED_PTR 1
+#   endif // (_MSC_VER >= 1600)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_SHARED_PTR)
+#endif // !defined(ASIO_HAS_STD_SHARED_PTR)
+
+// Standard library support for allocator_arg_t.
+#if !defined(ASIO_HAS_STD_ALLOCATOR_ARG)
+# if !defined(ASIO_DISABLE_STD_ALLOCATOR_ARG)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_ALLOCATOR_ARG 1
+#   elif (__cplusplus >= 201103)
+#    define ASIO_HAS_STD_ALLOCATOR_ARG 1
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_ALLOCATOR_ARG 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1600)
+#    define ASIO_HAS_STD_ALLOCATOR_ARG 1
+#   endif // (_MSC_VER >= 1600)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_ALLOCATOR_ARG)
+#endif // !defined(ASIO_HAS_STD_ALLOCATOR_ARG)
+
+// Standard library support for atomic operations.
+#if !defined(ASIO_HAS_STD_ATOMIC)
+# if !defined(ASIO_DISABLE_STD_ATOMIC)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_ATOMIC 1
+#   elif (__cplusplus >= 201103)
+#    if __has_include(<atomic>)
+#     define ASIO_HAS_STD_ATOMIC 1
+#    endif // __has_include(<atomic>)
+#   elif defined(__apple_build_version__) && defined(_LIBCPP_VERSION)
+#    if (__clang_major__ >= 10)
+#     if __has_include(<atomic>)
+#      define ASIO_HAS_STD_ATOMIC 1
+#     endif // __has_include(<atomic>)
+#    endif // (__clang_major__ >= 10)
+#   endif /// defined(__apple_build_version__) && defined(_LIBCPP_VERSION)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_ATOMIC 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_STD_ATOMIC 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_ATOMIC)
+#endif // !defined(ASIO_HAS_STD_ATOMIC)
+
+// Standard library support for chrono. Some standard libraries (such as the
+// libstdc++ shipped with gcc 4.6) provide monotonic_clock as per early C++0x
+// drafts, rather than the eventually standardised name of steady_clock.
+#if !defined(ASIO_HAS_STD_CHRONO)
+# if !defined(ASIO_DISABLE_STD_CHRONO)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_CHRONO 1
+#   elif (__cplusplus >= 201103)
+#    if __has_include(<chrono>)
+#     define ASIO_HAS_STD_CHRONO 1
+#    endif // __has_include(<chrono>)
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_CHRONO 1
+#     if ((__GNUC__ == 4) && (__GNUC_MINOR__ == 6))
+#      define ASIO_HAS_STD_CHRONO_MONOTONIC_CLOCK 1
+#     endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ == 6))
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_STD_CHRONO 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_CHRONO)
+#endif // !defined(ASIO_HAS_STD_CHRONO)
+
+// Boost support for chrono.
+#if !defined(ASIO_HAS_BOOST_CHRONO)
+# if !defined(ASIO_DISABLE_BOOST_CHRONO)
+#  if defined(ASIO_HAS_BOOST_CONFIG) && (BOOST_VERSION >= 104700)
+#   define ASIO_HAS_BOOST_CHRONO 1
+#  endif // defined(ASIO_HAS_BOOST_CONFIG) && (BOOST_VERSION >= 104700)
+# endif // !defined(ASIO_DISABLE_BOOST_CHRONO)
+#endif // !defined(ASIO_HAS_BOOST_CHRONO)
+
+// Some form of chrono library is available.
+#if !defined(ASIO_HAS_CHRONO)
+# if defined(ASIO_HAS_STD_CHRONO) \
+    || defined(ASIO_HAS_BOOST_CHRONO)
+#  define ASIO_HAS_CHRONO 1
+# endif // defined(ASIO_HAS_STD_CHRONO)
+        // || defined(ASIO_HAS_BOOST_CHRONO)
+#endif // !defined(ASIO_HAS_CHRONO)
+
+// Boost support for the DateTime library.
+#if !defined(ASIO_HAS_BOOST_DATE_TIME)
+# if !defined(ASIO_DISABLE_BOOST_DATE_TIME)
+#  define ASIO_HAS_BOOST_DATE_TIME 1
+# endif // !defined(ASIO_DISABLE_BOOST_DATE_TIME)
+#endif // !defined(ASIO_HAS_BOOST_DATE_TIME)
+
+// Standard library support for addressof.
+#if !defined(ASIO_HAS_STD_ADDRESSOF)
+# if !defined(ASIO_DISABLE_STD_ADDRESSOF)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_ADDRESSOF 1
+#   elif (__cplusplus >= 201103)
+#    define ASIO_HAS_STD_ADDRESSOF 1
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_ADDRESSOF 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_STD_ADDRESSOF 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_ADDRESSOF)
+#endif // !defined(ASIO_HAS_STD_ADDRESSOF)
+
+// Standard library support for the function class.
+#if !defined(ASIO_HAS_STD_FUNCTION)
+# if !defined(ASIO_DISABLE_STD_FUNCTION)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_FUNCTION 1
+#   elif (__cplusplus >= 201103)
+#    define ASIO_HAS_STD_FUNCTION 1
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 5)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_FUNCTION 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 5)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_STD_FUNCTION 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_FUNCTION)
+#endif // !defined(ASIO_HAS_STD_FUNCTION)
+
+// Standard library support for type traits.
+#if !defined(ASIO_HAS_STD_TYPE_TRAITS)
+# if !defined(ASIO_DISABLE_STD_TYPE_TRAITS)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_TYPE_TRAITS 1
+#   elif (__cplusplus >= 201103)
+#    if __has_include(<type_traits>)
+#     define ASIO_HAS_STD_TYPE_TRAITS 1
+#    endif // __has_include(<type_traits>)
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 5)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_TYPE_TRAITS 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 5)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_STD_TYPE_TRAITS 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_TYPE_TRAITS)
+#endif // !defined(ASIO_HAS_STD_TYPE_TRAITS)
+
+// Standard library support for the nullptr_t type.
+#if !defined(ASIO_HAS_NULLPTR)
+# if !defined(ASIO_DISABLE_NULLPTR)
+#  if defined(__clang__)
+#   if __has_feature(__cxx_nullptr__)
+#    define ASIO_HAS_NULLPTR 1
+#   endif // __has_feature(__cxx_rvalue_references__)
+#  elif defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_NULLPTR 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 6)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_NULLPTR 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_NULLPTR)
+#endif // !defined(ASIO_HAS_NULLPTR)
+
+// Standard library support for the C++11 allocator additions.
+#if !defined(ASIO_HAS_CXX11_ALLOCATORS)
+# if !defined(ASIO_DISABLE_CXX11_ALLOCATORS)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_CXX11_ALLOCATORS 1
+#   elif (__cplusplus >= 201103)
+#    define ASIO_HAS_CXX11_ALLOCATORS 1
+#   endif // (__cplusplus >= 201103)
+#  elif defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_CXX11_ALLOCATORS 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1800)
+#    define ASIO_HAS_CXX11_ALLOCATORS 1
+#   endif // (_MSC_VER >= 1800)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_CXX11_ALLOCATORS)
+#endif // !defined(ASIO_HAS_CXX11_ALLOCATORS)
+
+// Standard library support for the cstdint header.
+#if !defined(ASIO_HAS_CSTDINT)
+# if !defined(ASIO_DISABLE_CSTDINT)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_CSTDINT 1
+#   elif (__cplusplus >= 201103)
+#    define ASIO_HAS_CSTDINT 1
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 5)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_CSTDINT 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 5)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_CSTDINT 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_CSTDINT)
+#endif // !defined(ASIO_HAS_CSTDINT)
+
+// Standard library support for the thread class.
+#if !defined(ASIO_HAS_STD_THREAD)
+# if !defined(ASIO_DISABLE_STD_THREAD)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_THREAD 1
+#   elif (__cplusplus >= 201103)
+#    if __has_include(<thread>)
+#     define ASIO_HAS_STD_THREAD 1
+#    endif // __has_include(<thread>)
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_THREAD 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_STD_THREAD 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_THREAD)
+#endif // !defined(ASIO_HAS_STD_THREAD)
+
+// Standard library support for the mutex and condition variable classes.
+#if !defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+# if !defined(ASIO_DISABLE_STD_MUTEX_AND_CONDVAR)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_MUTEX_AND_CONDVAR 1
+#   elif (__cplusplus >= 201103)
+#    if __has_include(<mutex>)
+#     define ASIO_HAS_STD_MUTEX_AND_CONDVAR 1
+#    endif // __has_include(<mutex>)
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_MUTEX_AND_CONDVAR 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_STD_MUTEX_AND_CONDVAR 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_MUTEX_AND_CONDVAR)
+#endif // !defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+
+// Standard library support for the call_once function.
+#if !defined(ASIO_HAS_STD_CALL_ONCE)
+# if !defined(ASIO_DISABLE_STD_CALL_ONCE)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_CALL_ONCE 1
+#   elif (__cplusplus >= 201103)
+#    if __has_include(<mutex>)
+#     define ASIO_HAS_STD_CALL_ONCE 1
+#    endif // __has_include(<mutex>)
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_CALL_ONCE 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_STD_CALL_ONCE 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_CALL_ONCE)
+#endif // !defined(ASIO_HAS_STD_CALL_ONCE)
+
+// Standard library support for futures.
+#if !defined(ASIO_HAS_STD_FUTURE)
+# if !defined(ASIO_DISABLE_STD_FUTURE)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    define ASIO_HAS_STD_FUTURE 1
+#   elif (__cplusplus >= 201103)
+#    if __has_include(<future>)
+#     define ASIO_HAS_STD_FUTURE 1
+#    endif // __has_include(<mutex>)
+#   endif // (__cplusplus >= 201103)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_FUTURE 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 7)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_STD_FUTURE 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_FUTURE)
+#endif // !defined(ASIO_HAS_STD_FUTURE)
+
+// Standard library support for std::string_view.
+#if !defined(ASIO_HAS_STD_STRING_VIEW)
+# if !defined(ASIO_DISABLE_STD_STRING_VIEW)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    if (__cplusplus >= 201402)
+#     if __has_include(<string_view>)
+#      define ASIO_HAS_STD_STRING_VIEW 1
+#     endif // __has_include(<string_view>)
+#    endif // (__cplusplus >= 201402)
+#   else // defined(ASIO_HAS_CLANG_LIBCXX)
+#    if (__cplusplus >= 201703)
+#     if __has_include(<string_view>)
+#      define ASIO_HAS_STD_STRING_VIEW 1
+#     endif // __has_include(<string_view>)
+#    endif // (__cplusplus >= 201703)
+#   endif // defined(ASIO_HAS_CLANG_LIBCXX)
+#  elif defined(__GNUC__)
+#   if (__GNUC__ >= 7)
+#    if (__cplusplus >= 201703)
+#     define ASIO_HAS_STD_STRING_VIEW 1
+#    endif // (__cplusplus >= 201703)
+#   endif // (__GNUC__ >= 7)
+#  elif defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1910 && _MSVC_LANG >= 201703)
+#    define ASIO_HAS_STD_STRING_VIEW 1
+#   endif // (_MSC_VER >= 1910 && _MSVC_LANG >= 201703)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_STRING_VIEW)
+#endif // !defined(ASIO_HAS_STD_STRING_VIEW)
+
+// Standard library support for std::experimental::string_view.
+#if !defined(ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW)
+# if !defined(ASIO_DISABLE_STD_EXPERIMENTAL_STRING_VIEW)
+#  if defined(__clang__)
+#   if defined(ASIO_HAS_CLANG_LIBCXX)
+#    if (_LIBCPP_VERSION < 7000)
+#     if (__cplusplus >= 201402)
+#      if __has_include(<experimental/string_view>)
+#       define ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW 1
+#      endif // __has_include(<experimental/string_view>)
+#     endif // (__cplusplus >= 201402)
+#    endif // (_LIBCPP_VERSION < 7000)
+#   else // defined(ASIO_HAS_CLANG_LIBCXX)
+#    if (__cplusplus >= 201402)
+#     if __has_include(<experimental/string_view>)
+#      define ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW 1
+#     endif // __has_include(<experimental/string_view>)
+#    endif // (__cplusplus >= 201402)
+#   endif // // defined(ASIO_HAS_CLANG_LIBCXX)
+#  endif // defined(__clang__)
+#  if defined(__GNUC__)
+#   if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 9)) || (__GNUC__ > 4)
+#    if (__cplusplus >= 201402)
+#     define ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW 1
+#    endif // (__cplusplus >= 201402)
+#   endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 9)) || (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+# endif // !defined(ASIO_DISABLE_STD_EXPERIMENTAL_STRING_VIEW)
+#endif // !defined(ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW)
+
+// Standard library has a string_view that we can use.
+#if !defined(ASIO_HAS_STRING_VIEW)
+# if !defined(ASIO_DISABLE_STRING_VIEW)
+#  if defined(ASIO_HAS_STD_STRING_VIEW)
+#   define ASIO_HAS_STRING_VIEW 1
+#  elif defined(ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW)
+#   define ASIO_HAS_STRING_VIEW 1
+#  endif // defined(ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW)
+# endif // !defined(ASIO_DISABLE_STRING_VIEW)
+#endif // !defined(ASIO_HAS_STRING_VIEW)
+
+// Standard library support for iostream move construction and assignment.
+#if !defined(ASIO_HAS_STD_IOSTREAM_MOVE)
+# if !defined(ASIO_DISABLE_STD_IOSTREAM_MOVE)
+#  if defined(__GNUC__)
+#   if (__GNUC__ > 4)
+#    if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#     define ASIO_HAS_STD_IOSTREAM_MOVE 1
+#    endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#   endif // (__GNUC__ > 4)
+#  endif // defined(__GNUC__)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1700)
+#    define ASIO_HAS_STD_IOSTREAM_MOVE 1
+#   endif // (_MSC_VER >= 1700)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_IOSTREAM_MOVE)
+#endif // !defined(ASIO_HAS_STD_IOSTREAM_MOVE)
+
+// Standard library has invoke_result (which supersedes result_of).
+#if !defined(ASIO_HAS_STD_INVOKE_RESULT)
+# if !defined(ASIO_DISABLE_STD_INVOKE_RESULT)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_VER >= 1911 && _MSVC_LANG >= 201703)
+#    define ASIO_HAS_STD_INVOKE_RESULT 1
+#   endif // (_MSC_VER >= 1911 && _MSVC_LANG >= 201703)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_STD_INVOKE_RESULT)
+#endif // !defined(ASIO_HAS_STD_INVOKE_RESULT)
+
+// Windows App target. Windows but with a limited API.
+#if !defined(ASIO_WINDOWS_APP)
+# if defined(_WIN32_WINNT) && (_WIN32_WINNT >= 0x0603)
+#  include <winapifamily.h>
+#  if WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_APP) \
+   && !WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_DESKTOP)
+#   define ASIO_WINDOWS_APP 1
+#  endif // WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_APP)
+         // && !WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_DESKTOP)
+# endif // defined(_WIN32_WINNT) && (_WIN32_WINNT >= 0x0603)
+#endif // !defined(ASIO_WINDOWS_APP)
+
+// Legacy WinRT target. Windows App is preferred.
+#if !defined(ASIO_WINDOWS_RUNTIME)
+# if !defined(ASIO_WINDOWS_APP)
+#  if defined(__cplusplus_winrt)
+#   include <winapifamily.h>
+#   if WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_APP) \
+    && !WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_DESKTOP)
+#    define ASIO_WINDOWS_RUNTIME 1
+#   endif // WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_APP)
+          // && !WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_DESKTOP)
+#  endif // defined(__cplusplus_winrt)
+# endif // !defined(ASIO_WINDOWS_APP)
+#endif // !defined(ASIO_WINDOWS_RUNTIME)
+
+// Windows target. Excludes WinRT but includes Windows App targets.
+#if !defined(ASIO_WINDOWS)
+# if !defined(ASIO_WINDOWS_RUNTIME)
+#  if defined(ASIO_HAS_BOOST_CONFIG) && defined(BOOST_WINDOWS)
+#   define ASIO_WINDOWS 1
+#  elif defined(WIN32) || defined(_WIN32) || defined(__WIN32__)
+#   define ASIO_WINDOWS 1
+#  elif defined(ASIO_WINDOWS_APP)
+#   define ASIO_WINDOWS 1
+#  endif // defined(ASIO_HAS_BOOST_CONFIG) && defined(BOOST_WINDOWS)
+# endif // !defined(ASIO_WINDOWS_RUNTIME)
+#endif // !defined(ASIO_WINDOWS)
+
+// Windows: target OS version.
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+# if !defined(_WIN32_WINNT) && !defined(_WIN32_WINDOWS)
+#  if defined(_MSC_VER) || defined(__BORLANDC__)
+#   pragma message( \
+  "Please define _WIN32_WINNT or _WIN32_WINDOWS appropriately. For example:\n"\
+  "- add -D_WIN32_WINNT=0x0601 to the compiler command line; or\n"\
+  "- add _WIN32_WINNT=0x0601 to your project's Preprocessor Definitions.\n"\
+  "Assuming _WIN32_WINNT=0x0601 (i.e. Windows 7 target).")
+#  else // defined(_MSC_VER) || defined(__BORLANDC__)
+#   warning Please define _WIN32_WINNT or _WIN32_WINDOWS appropriately.
+#   warning For example, add -D_WIN32_WINNT=0x0601 to the compiler command line.
+#   warning Assuming _WIN32_WINNT=0x0601 (i.e. Windows 7 target).
+#  endif // defined(_MSC_VER) || defined(__BORLANDC__)
+#  define _WIN32_WINNT 0x0601
+# endif // !defined(_WIN32_WINNT) && !defined(_WIN32_WINDOWS)
+# if defined(_MSC_VER)
+#  if defined(_WIN32) && !defined(WIN32)
+#   if !defined(_WINSOCK2API_)
+#    define WIN32 // Needed for correct types in winsock2.h
+#   else // !defined(_WINSOCK2API_)
+#    error Please define the macro WIN32 in your compiler options
+#   endif // !defined(_WINSOCK2API_)
+#  endif // defined(_WIN32) && !defined(WIN32)
+# endif // defined(_MSC_VER)
+# if defined(__BORLANDC__)
+#  if defined(__WIN32__) && !defined(WIN32)
+#   if !defined(_WINSOCK2API_)
+#    define WIN32 // Needed for correct types in winsock2.h
+#   else // !defined(_WINSOCK2API_)
+#    error Please define the macro WIN32 in your compiler options
+#   endif // !defined(_WINSOCK2API_)
+#  endif // defined(__WIN32__) && !defined(WIN32)
+# endif // defined(__BORLANDC__)
+# if defined(__CYGWIN__)
+#  if !defined(__USE_W32_SOCKETS)
+#   error You must add -D__USE_W32_SOCKETS to your compiler options.
+#  endif // !defined(__USE_W32_SOCKETS)
+# endif // defined(__CYGWIN__)
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+// Windows: minimise header inclusion.
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+# if !defined(ASIO_NO_WIN32_LEAN_AND_MEAN)
+#  if !defined(WIN32_LEAN_AND_MEAN)
+#   define WIN32_LEAN_AND_MEAN
+#  endif // !defined(WIN32_LEAN_AND_MEAN)
+# endif // !defined(ASIO_NO_WIN32_LEAN_AND_MEAN)
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+// Windows: suppress definition of "min" and "max" macros.
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+# if !defined(ASIO_NO_NOMINMAX)
+#  if !defined(NOMINMAX)
+#   define NOMINMAX 1
+#  endif // !defined(NOMINMAX)
+# endif // !defined(ASIO_NO_NOMINMAX)
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+// Windows: IO Completion Ports.
+#if !defined(ASIO_HAS_IOCP)
+# if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+#  if defined(_WIN32_WINNT) && (_WIN32_WINNT >= 0x0400)
+#   if !defined(UNDER_CE) && !defined(ASIO_WINDOWS_APP)
+#    if !defined(ASIO_DISABLE_IOCP)
+#     define ASIO_HAS_IOCP 1
+#    endif // !defined(ASIO_DISABLE_IOCP)
+#   endif // !defined(UNDER_CE) && !defined(ASIO_WINDOWS_APP)
+#  endif // defined(_WIN32_WINNT) && (_WIN32_WINNT >= 0x0400)
+# endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+#endif // !defined(ASIO_HAS_IOCP)
+
+// On POSIX (and POSIX-like) platforms we need to include unistd.h in order to
+// get access to the various platform feature macros, e.g. to be able to test
+// for threads support.
+#if !defined(ASIO_HAS_UNISTD_H)
+# if !defined(ASIO_HAS_BOOST_CONFIG)
+#  if defined(unix) \
+   || defined(__unix) \
+   || defined(_XOPEN_SOURCE) \
+   || defined(_POSIX_SOURCE) \
+   || (defined(__MACH__) && defined(__APPLE__)) \
+   || defined(__FreeBSD__) \
+   || defined(__NetBSD__) \
+   || defined(__OpenBSD__) \
+   || defined(__linux__) \
+   || defined(__HAIKU__)
+#   define ASIO_HAS_UNISTD_H 1
+#  endif
+# endif // !defined(ASIO_HAS_BOOST_CONFIG)
+#endif // !defined(ASIO_HAS_UNISTD_H)
+#if defined(ASIO_HAS_UNISTD_H)
+# include <unistd.h>
+#endif // defined(ASIO_HAS_UNISTD_H)
+
+// Linux: epoll, eventfd and timerfd.
+#if defined(__linux__)
+# include <linux/version.h>
+# if !defined(ASIO_HAS_EPOLL)
+#  if !defined(ASIO_DISABLE_EPOLL)
+#   if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,45)
+#    define ASIO_HAS_EPOLL 1
+#   endif // LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,45)
+#  endif // !defined(ASIO_DISABLE_EPOLL)
+# endif // !defined(ASIO_HAS_EPOLL)
+# if !defined(ASIO_HAS_EVENTFD)
+#  if !defined(ASIO_DISABLE_EVENTFD)
+#   if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+#    define ASIO_HAS_EVENTFD 1
+#   endif // LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+#  endif // !defined(ASIO_DISABLE_EVENTFD)
+# endif // !defined(ASIO_HAS_EVENTFD)
+# if !defined(ASIO_HAS_TIMERFD)
+#  if defined(ASIO_HAS_EPOLL)
+#   if (__GLIBC__ > 2) || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 8)
+#    define ASIO_HAS_TIMERFD 1
+#   endif // (__GLIBC__ > 2) || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 8)
+#  endif // defined(ASIO_HAS_EPOLL)
+# endif // !defined(ASIO_HAS_TIMERFD)
+#endif // defined(__linux__)
+
+// Mac OS X, FreeBSD, NetBSD, OpenBSD: kqueue.
+#if (defined(__MACH__) && defined(__APPLE__)) \
+  || defined(__FreeBSD__) \
+  || defined(__NetBSD__) \
+  || defined(__OpenBSD__)
+# if !defined(ASIO_HAS_KQUEUE)
+#  if !defined(ASIO_DISABLE_KQUEUE)
+#   define ASIO_HAS_KQUEUE 1
+#  endif // !defined(ASIO_DISABLE_KQUEUE)
+# endif // !defined(ASIO_HAS_KQUEUE)
+#endif // (defined(__MACH__) && defined(__APPLE__))
+       //   || defined(__FreeBSD__)
+       //   || defined(__NetBSD__)
+       //   || defined(__OpenBSD__)
+
+// Solaris: /dev/poll.
+#if defined(__sun)
+# if !defined(ASIO_HAS_DEV_POLL)
+#  if !defined(ASIO_DISABLE_DEV_POLL)
+#   define ASIO_HAS_DEV_POLL 1
+#  endif // !defined(ASIO_DISABLE_DEV_POLL)
+# endif // !defined(ASIO_HAS_DEV_POLL)
+#endif // defined(__sun)
+
+// Serial ports.
+#if !defined(ASIO_HAS_SERIAL_PORT)
+# if defined(ASIO_HAS_IOCP) \
+  || !defined(ASIO_WINDOWS) \
+  && !defined(ASIO_WINDOWS_RUNTIME) \
+  && !defined(__CYGWIN__)
+#  if !defined(__SYMBIAN32__)
+#   if !defined(ASIO_DISABLE_SERIAL_PORT)
+#    define ASIO_HAS_SERIAL_PORT 1
+#   endif // !defined(ASIO_DISABLE_SERIAL_PORT)
+#  endif // !defined(__SYMBIAN32__)
+# endif // defined(ASIO_HAS_IOCP)
+        //   || !defined(ASIO_WINDOWS)
+        //   && !defined(ASIO_WINDOWS_RUNTIME)
+        //   && !defined(__CYGWIN__)
+#endif // !defined(ASIO_HAS_SERIAL_PORT)
+
+// Windows: stream handles.
+#if !defined(ASIO_HAS_WINDOWS_STREAM_HANDLE)
+# if !defined(ASIO_DISABLE_WINDOWS_STREAM_HANDLE)
+#  if defined(ASIO_HAS_IOCP)
+#   define ASIO_HAS_WINDOWS_STREAM_HANDLE 1
+#  endif // defined(ASIO_HAS_IOCP)
+# endif // !defined(ASIO_DISABLE_WINDOWS_STREAM_HANDLE)
+#endif // !defined(ASIO_HAS_WINDOWS_STREAM_HANDLE)
+
+// Windows: random access handles.
+#if !defined(ASIO_HAS_WINDOWS_RANDOM_ACCESS_HANDLE)
+# if !defined(ASIO_DISABLE_WINDOWS_RANDOM_ACCESS_HANDLE)
+#  if defined(ASIO_HAS_IOCP)
+#   define ASIO_HAS_WINDOWS_RANDOM_ACCESS_HANDLE 1
+#  endif // defined(ASIO_HAS_IOCP)
+# endif // !defined(ASIO_DISABLE_WINDOWS_RANDOM_ACCESS_HANDLE)
+#endif // !defined(ASIO_HAS_WINDOWS_RANDOM_ACCESS_HANDLE)
+
+// Windows: object handles.
+#if !defined(ASIO_HAS_WINDOWS_OBJECT_HANDLE)
+# if !defined(ASIO_DISABLE_WINDOWS_OBJECT_HANDLE)
+#  if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+#   if !defined(UNDER_CE) && !defined(ASIO_WINDOWS_APP)
+#    define ASIO_HAS_WINDOWS_OBJECT_HANDLE 1
+#   endif // !defined(UNDER_CE) && !defined(ASIO_WINDOWS_APP)
+#  endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+# endif // !defined(ASIO_DISABLE_WINDOWS_OBJECT_HANDLE)
+#endif // !defined(ASIO_HAS_WINDOWS_OBJECT_HANDLE)
+
+// Windows: OVERLAPPED wrapper.
+#if !defined(ASIO_HAS_WINDOWS_OVERLAPPED_PTR)
+# if !defined(ASIO_DISABLE_WINDOWS_OVERLAPPED_PTR)
+#  if defined(ASIO_HAS_IOCP)
+#   define ASIO_HAS_WINDOWS_OVERLAPPED_PTR 1
+#  endif // defined(ASIO_HAS_IOCP)
+# endif // !defined(ASIO_DISABLE_WINDOWS_OVERLAPPED_PTR)
+#endif // !defined(ASIO_HAS_WINDOWS_OVERLAPPED_PTR)
+
+// POSIX: stream-oriented file descriptors.
+#if !defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR)
+# if !defined(ASIO_DISABLE_POSIX_STREAM_DESCRIPTOR)
+#  if !defined(ASIO_WINDOWS) \
+  && !defined(ASIO_WINDOWS_RUNTIME) \
+  && !defined(__CYGWIN__)
+#   define ASIO_HAS_POSIX_STREAM_DESCRIPTOR 1
+#  endif // !defined(ASIO_WINDOWS)
+         //   && !defined(ASIO_WINDOWS_RUNTIME)
+         //   && !defined(__CYGWIN__)
+# endif // !defined(ASIO_DISABLE_POSIX_STREAM_DESCRIPTOR)
+#endif // !defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR)
+
+// UNIX domain sockets.
+#if !defined(ASIO_HAS_LOCAL_SOCKETS)
+# if !defined(ASIO_DISABLE_LOCAL_SOCKETS)
+#  if !defined(ASIO_WINDOWS) \
+  && !defined(ASIO_WINDOWS_RUNTIME) \
+  && !defined(__CYGWIN__)
+#   define ASIO_HAS_LOCAL_SOCKETS 1
+#  endif // !defined(ASIO_WINDOWS)
+         //   && !defined(ASIO_WINDOWS_RUNTIME)
+         //   && !defined(__CYGWIN__)
+# endif // !defined(ASIO_DISABLE_LOCAL_SOCKETS)
+#endif // !defined(ASIO_HAS_LOCAL_SOCKETS)
+
+// Can use sigaction() instead of signal().
+#if !defined(ASIO_HAS_SIGACTION)
+# if !defined(ASIO_DISABLE_SIGACTION)
+#  if !defined(ASIO_WINDOWS) \
+  && !defined(ASIO_WINDOWS_RUNTIME) \
+  && !defined(__CYGWIN__)
+#   define ASIO_HAS_SIGACTION 1
+#  endif // !defined(ASIO_WINDOWS)
+         //   && !defined(ASIO_WINDOWS_RUNTIME)
+         //   && !defined(__CYGWIN__)
+# endif // !defined(ASIO_DISABLE_SIGACTION)
+#endif // !defined(ASIO_HAS_SIGACTION)
+
+// Can use signal().
+#if !defined(ASIO_HAS_SIGNAL)
+# if !defined(ASIO_DISABLE_SIGNAL)
+#  if !defined(UNDER_CE)
+#   define ASIO_HAS_SIGNAL 1
+#  endif // !defined(UNDER_CE)
+# endif // !defined(ASIO_DISABLE_SIGNAL)
+#endif // !defined(ASIO_HAS_SIGNAL)
+
+// Can use getaddrinfo() and getnameinfo().
+#if !defined(ASIO_HAS_GETADDRINFO)
+# if !defined(ASIO_DISABLE_GETADDRINFO)
+#  if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+#   if defined(_WIN32_WINNT) && (_WIN32_WINNT >= 0x0501)
+#    define ASIO_HAS_GETADDRINFO 1
+#   elif defined(UNDER_CE)
+#    define ASIO_HAS_GETADDRINFO 1
+#   endif // defined(UNDER_CE)
+#  elif defined(__MACH__) && defined(__APPLE__)
+#   if defined(__MAC_OS_X_VERSION_MIN_REQUIRED)
+#    if (__MAC_OS_X_VERSION_MIN_REQUIRED >= 1050)
+#     define ASIO_HAS_GETADDRINFO 1
+#    endif // (__MAC_OS_X_VERSION_MIN_REQUIRED >= 1050)
+#   else // defined(__MAC_OS_X_VERSION_MIN_REQUIRED)
+#    define ASIO_HAS_GETADDRINFO 1
+#   endif // defined(__MAC_OS_X_VERSION_MIN_REQUIRED)
+#  else // defined(__MACH__) && defined(__APPLE__)
+#   define ASIO_HAS_GETADDRINFO 1
+#  endif // defined(__MACH__) && defined(__APPLE__)
+# endif // !defined(ASIO_DISABLE_GETADDRINFO)
+#endif // !defined(ASIO_HAS_GETADDRINFO)
+
+// Whether standard iostreams are disabled.
+#if !defined(ASIO_NO_IOSTREAM)
+# if defined(ASIO_HAS_BOOST_CONFIG) && defined(BOOST_NO_IOSTREAM)
+#  define ASIO_NO_IOSTREAM 1
+# endif // !defined(BOOST_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+// Whether exception handling is disabled.
+#if !defined(ASIO_NO_EXCEPTIONS)
+# if defined(ASIO_HAS_BOOST_CONFIG) && defined(BOOST_NO_EXCEPTIONS)
+#  define ASIO_NO_EXCEPTIONS 1
+# endif // !defined(BOOST_NO_EXCEPTIONS)
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+
+// Whether the typeid operator is supported.
+#if !defined(ASIO_NO_TYPEID)
+# if defined(ASIO_HAS_BOOST_CONFIG) && defined(BOOST_NO_TYPEID)
+#  define ASIO_NO_TYPEID 1
+# endif // !defined(BOOST_NO_TYPEID)
+#endif // !defined(ASIO_NO_TYPEID)
+
+// Threads.
+#if !defined(ASIO_HAS_THREADS)
+# if !defined(ASIO_DISABLE_THREADS)
+#  if defined(ASIO_HAS_BOOST_CONFIG) && defined(BOOST_HAS_THREADS)
+#   define ASIO_HAS_THREADS 1
+#  elif defined(__GNUC__) && !defined(__MINGW32__) \
+     && !defined(linux) && !defined(__linux) && !defined(__linux__)
+#   define ASIO_HAS_THREADS 1
+#  elif defined(_MT) || defined(__MT__)
+#   define ASIO_HAS_THREADS 1
+#  elif defined(_REENTRANT)
+#   define ASIO_HAS_THREADS 1
+#  elif defined(__APPLE__)
+#   define ASIO_HAS_THREADS 1
+#  elif defined(__HAIKU__)
+#   define ASIO_HAS_THREADS 1
+#  elif defined(_POSIX_THREADS) && (_POSIX_THREADS + 0 >= 0)
+#   define ASIO_HAS_THREADS 1
+#  elif defined(_PTHREADS)
+#   define ASIO_HAS_THREADS 1
+#  endif // defined(ASIO_HAS_BOOST_CONFIG) && defined(BOOST_HAS_THREADS)
+# endif // !defined(ASIO_DISABLE_THREADS)
+#endif // !defined(ASIO_HAS_THREADS)
+
+// POSIX threads.
+#if !defined(ASIO_HAS_PTHREADS)
+# if defined(ASIO_HAS_THREADS)
+#  if defined(ASIO_HAS_BOOST_CONFIG) && defined(BOOST_HAS_PTHREADS)
+#   define ASIO_HAS_PTHREADS 1
+#  elif defined(_POSIX_THREADS) && (_POSIX_THREADS + 0 >= 0)
+#   define ASIO_HAS_PTHREADS 1
+#  elif defined(__HAIKU__)
+#   define ASIO_HAS_PTHREADS 1
+#  endif // defined(ASIO_HAS_BOOST_CONFIG) && defined(BOOST_HAS_PTHREADS)
+# endif // defined(ASIO_HAS_THREADS)
+#endif // !defined(ASIO_HAS_PTHREADS)
+
+// Helper to prevent macro expansion.
+#define ASIO_PREVENT_MACRO_SUBSTITUTION
+
+// Helper to define in-class constants.
+#if !defined(ASIO_STATIC_CONSTANT)
+# if !defined(ASIO_DISABLE_BOOST_STATIC_CONSTANT)
+#  define ASIO_STATIC_CONSTANT(type, assignment) \
+    BOOST_STATIC_CONSTANT(type, assignment)
+# else // !defined(ASIO_DISABLE_BOOST_STATIC_CONSTANT)
+#  define ASIO_STATIC_CONSTANT(type, assignment) \
+    static const type assignment
+# endif // !defined(ASIO_DISABLE_BOOST_STATIC_CONSTANT)
+#endif // !defined(ASIO_STATIC_CONSTANT)
+
+// Boost array library.
+#if !defined(ASIO_HAS_BOOST_ARRAY)
+# if !defined(ASIO_DISABLE_BOOST_ARRAY)
+#  define ASIO_HAS_BOOST_ARRAY 1
+# endif // !defined(ASIO_DISABLE_BOOST_ARRAY)
+#endif // !defined(ASIO_HAS_BOOST_ARRAY)
+
+// Boost assert macro.
+#if !defined(ASIO_HAS_BOOST_ASSERT)
+# if !defined(ASIO_DISABLE_BOOST_ASSERT)
+#  define ASIO_HAS_BOOST_ASSERT 1
+# endif // !defined(ASIO_DISABLE_BOOST_ASSERT)
+#endif // !defined(ASIO_HAS_BOOST_ASSERT)
+
+// Boost limits header.
+#if !defined(ASIO_HAS_BOOST_LIMITS)
+# if !defined(ASIO_DISABLE_BOOST_LIMITS)
+#  define ASIO_HAS_BOOST_LIMITS 1
+# endif // !defined(ASIO_DISABLE_BOOST_LIMITS)
+#endif // !defined(ASIO_HAS_BOOST_LIMITS)
+
+// Boost throw_exception function.
+#if !defined(ASIO_HAS_BOOST_THROW_EXCEPTION)
+# if !defined(ASIO_DISABLE_BOOST_THROW_EXCEPTION)
+#  define ASIO_HAS_BOOST_THROW_EXCEPTION 1
+# endif // !defined(ASIO_DISABLE_BOOST_THROW_EXCEPTION)
+#endif // !defined(ASIO_HAS_BOOST_THROW_EXCEPTION)
+
+// Boost regex library.
+#if !defined(ASIO_HAS_BOOST_REGEX)
+# if !defined(ASIO_DISABLE_BOOST_REGEX)
+#  define ASIO_HAS_BOOST_REGEX 1
+# endif // !defined(ASIO_DISABLE_BOOST_REGEX)
+#endif // !defined(ASIO_HAS_BOOST_REGEX)
+
+// Boost bind function.
+#if !defined(ASIO_HAS_BOOST_BIND)
+# if !defined(ASIO_DISABLE_BOOST_BIND)
+#  define ASIO_HAS_BOOST_BIND 1
+# endif // !defined(ASIO_DISABLE_BOOST_BIND)
+#endif // !defined(ASIO_HAS_BOOST_BIND)
+
+// Boost's BOOST_WORKAROUND macro.
+#if !defined(ASIO_HAS_BOOST_WORKAROUND)
+# if !defined(ASIO_DISABLE_BOOST_WORKAROUND)
+#  define ASIO_HAS_BOOST_WORKAROUND 1
+# endif // !defined(ASIO_DISABLE_BOOST_WORKAROUND)
+#endif // !defined(ASIO_HAS_BOOST_WORKAROUND)
+
+// Microsoft Visual C++'s secure C runtime library.
+#if !defined(ASIO_HAS_SECURE_RTL)
+# if !defined(ASIO_DISABLE_SECURE_RTL)
+#  if defined(ASIO_MSVC) \
+    && (ASIO_MSVC >= 1400) \
+    && !defined(UNDER_CE)
+#   define ASIO_HAS_SECURE_RTL 1
+#  endif // defined(ASIO_MSVC)
+         // && (ASIO_MSVC >= 1400)
+         // && !defined(UNDER_CE)
+# endif // !defined(ASIO_DISABLE_SECURE_RTL)
+#endif // !defined(ASIO_HAS_SECURE_RTL)
+
+// Handler hooking. Disabled for ancient Borland C++ and gcc compilers.
+#if !defined(ASIO_HAS_HANDLER_HOOKS)
+# if !defined(ASIO_DISABLE_HANDLER_HOOKS)
+#  if defined(__GNUC__)
+#   if (__GNUC__ >= 3)
+#    define ASIO_HAS_HANDLER_HOOKS 1
+#   endif // (__GNUC__ >= 3)
+#  elif !defined(__BORLANDC__)
+#   define ASIO_HAS_HANDLER_HOOKS 1
+#  endif // !defined(__BORLANDC__)
+# endif // !defined(ASIO_DISABLE_HANDLER_HOOKS)
+#endif // !defined(ASIO_HAS_HANDLER_HOOKS)
+
+// Support for the __thread keyword extension.
+#if !defined(ASIO_DISABLE_THREAD_KEYWORD_EXTENSION)
+# if defined(__linux__)
+#  if defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
+#   if ((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3)
+#    if !defined(__INTEL_COMPILER) && !defined(__ICL) \
+       && !(defined(__clang__) && defined(__ANDROID__))
+#     define ASIO_HAS_THREAD_KEYWORD_EXTENSION 1
+#     define ASIO_THREAD_KEYWORD __thread
+#    elif defined(__INTEL_COMPILER) && (__INTEL_COMPILER >= 1100)
+#     define ASIO_HAS_THREAD_KEYWORD_EXTENSION 1
+#    endif // defined(__INTEL_COMPILER) && (__INTEL_COMPILER >= 1100)
+           // && !(defined(__clang__) && defined(__ANDROID__))
+#   endif // ((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3)
+#  endif // defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
+# endif // defined(__linux__)
+# if defined(ASIO_MSVC) && defined(ASIO_WINDOWS_RUNTIME)
+#  if (_MSC_VER >= 1700)
+#   define ASIO_HAS_THREAD_KEYWORD_EXTENSION 1
+#   define ASIO_THREAD_KEYWORD __declspec(thread)
+#  endif // (_MSC_VER >= 1700)
+# endif // defined(ASIO_MSVC) && defined(ASIO_WINDOWS_RUNTIME)
+#endif // !defined(ASIO_DISABLE_THREAD_KEYWORD_EXTENSION)
+#if !defined(ASIO_THREAD_KEYWORD)
+# define ASIO_THREAD_KEYWORD __thread
+#endif // !defined(ASIO_THREAD_KEYWORD)
+
+// Support for POSIX ssize_t typedef.
+#if !defined(ASIO_DISABLE_SSIZE_T)
+# if defined(__linux__) \
+   || (defined(__MACH__) && defined(__APPLE__))
+#  define ASIO_HAS_SSIZE_T 1
+# endif // defined(__linux__)
+        //   || (defined(__MACH__) && defined(__APPLE__))
+#endif // !defined(ASIO_DISABLE_SSIZE_T)
+
+// Helper macros to manage transition away from error_code return values.
+#if defined(ASIO_NO_DEPRECATED)
+# define ASIO_SYNC_OP_VOID void
+# define ASIO_SYNC_OP_VOID_RETURN(e) return
+#else // defined(ASIO_NO_DEPRECATED)
+# define ASIO_SYNC_OP_VOID asio::error_code
+# define ASIO_SYNC_OP_VOID_RETURN(e) return e
+#endif // defined(ASIO_NO_DEPRECATED)
+
+// Newer gcc, clang need special treatment to suppress unused typedef warnings.
+#if defined(__clang__)
+# if defined(__apple_build_version__)
+#  if (__clang_major__ >= 7)
+#   define ASIO_UNUSED_TYPEDEF __attribute__((__unused__))
+#  endif // (__clang_major__ >= 7)
+# elif ((__clang_major__ == 3) && (__clang_minor__ >= 6)) \
+    || (__clang_major__ > 3)
+#  define ASIO_UNUSED_TYPEDEF __attribute__((__unused__))
+# endif // ((__clang_major__ == 3) && (__clang_minor__ >= 6))
+        //   || (__clang_major__ > 3)
+#elif defined(__GNUC__)
+# if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 8)) || (__GNUC__ > 4)
+#  define ASIO_UNUSED_TYPEDEF __attribute__((__unused__))
+# endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 8)) || (__GNUC__ > 4)
+#endif // defined(__GNUC__)
+#if !defined(ASIO_UNUSED_TYPEDEF)
+# define ASIO_UNUSED_TYPEDEF
+#endif // !defined(ASIO_UNUSED_TYPEDEF)
+
+// Some versions of gcc generate spurious warnings about unused variables.
+#if defined(__GNUC__)
+# if (__GNUC__ >= 4)
+#  define ASIO_UNUSED_VARIABLE __attribute__((__unused__))
+# endif // (__GNUC__ >= 4)
+#endif // defined(__GNUC__)
+#if !defined(ASIO_UNUSED_VARIABLE)
+# define ASIO_UNUSED_VARIABLE
+#endif // !defined(ASIO_UNUSED_VARIABLE)
+
+// Support co_await on compilers known to allow it.
+#if !defined(ASIO_HAS_CO_AWAIT)
+# if !defined(ASIO_DISABLE_CO_AWAIT)
+#  if defined(ASIO_MSVC)
+#   if (_MSC_FULL_VER >= 190023506)
+#    if defined(_RESUMABLE_FUNCTIONS_SUPPORTED)
+#     define ASIO_HAS_CO_AWAIT 1
+#    endif // defined(_RESUMABLE_FUNCTIONS_SUPPORTED)
+#   endif // (_MSC_FULL_VER >= 190023506)
+#  endif // defined(ASIO_MSVC)
+# endif // !defined(ASIO_DISABLE_CO_AWAIT)
+# if defined(__clang__)
+#  if (__cplusplus >= 201703) && (__cpp_coroutines >= 201703)
+#   if __has_include(<experimental/coroutine>)
+#    define ASIO_HAS_CO_AWAIT 1
+#   endif // __has_include(<experimental/coroutine>)
+#  endif // (__cplusplus >= 201703) && (__cpp_coroutines >= 201703)
+# endif // defined(__clang__)
+#endif // !defined(ASIO_HAS_CO_AWAIT)
+
+#endif // ASIO_DETAIL_CONFIG_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/consuming_buffers.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/consuming_buffers.hpp
new file mode 100644
index 00000000000..1f604019298
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/consuming_buffers.hpp
@@ -0,0 +1,414 @@
+//
+// detail/consuming_buffers.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_CONSUMING_BUFFERS_HPP
+#define ASIO_DETAIL_CONSUMING_BUFFERS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/buffer.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/limits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Helper template to determine the maximum number of prepared buffers.
+template <typename Buffers>
+struct prepared_buffers_max
+{
+  enum { value = buffer_sequence_adapter_base::max_buffers };
+};
+
+template <typename Elem, std::size_t N>
+struct prepared_buffers_max<boost::array<Elem, N> >
+{
+  enum { value = N };
+};
+
+#if defined(ASIO_HAS_STD_ARRAY)
+
+template <typename Elem, std::size_t N>
+struct prepared_buffers_max<std::array<Elem, N> >
+{
+  enum { value = N };
+};
+
+#endif // defined(ASIO_HAS_STD_ARRAY)
+
+// A buffer sequence used to represent a subsequence of the buffers.
+template <typename Buffer, std::size_t MaxBuffers>
+struct prepared_buffers
+{
+  typedef Buffer value_type;
+  typedef const Buffer* const_iterator;
+
+  enum { max_buffers = MaxBuffers < 16 ? MaxBuffers : 16 };
+
+  prepared_buffers() : count(0) {}
+  const_iterator begin() const { return elems; }
+  const_iterator end() const { return elems + count; }
+
+  Buffer elems[max_buffers];
+  std::size_t count;
+};
+
+// A proxy for a sub-range in a list of buffers.
+template <typename Buffer, typename Buffers, typename Buffer_Iterator>
+class consuming_buffers
+{
+public:
+  typedef prepared_buffers<Buffer, prepared_buffers_max<Buffers>::value>
+    prepared_buffers_type;
+
+  // Construct to represent the entire list of buffers.
+  explicit consuming_buffers(const Buffers& buffers)
+    : buffers_(buffers),
+      total_consumed_(0),
+      next_elem_(0),
+      next_elem_offset_(0)
+  {
+    using asio::buffer_size;
+    total_size_ = buffer_size(buffers);
+  }
+
+  // Determine if we are at the end of the buffers.
+  bool empty() const
+  {
+    return total_consumed_ >= total_size_;
+  }
+
+  // Get the buffer for a single transfer, with a size.
+  prepared_buffers_type prepare(std::size_t max_size)
+  {
+    prepared_buffers_type result;
+
+    Buffer_Iterator next = asio::buffer_sequence_begin(buffers_);
+    Buffer_Iterator end = asio::buffer_sequence_end(buffers_);
+
+    std::advance(next, next_elem_);
+    std::size_t elem_offset = next_elem_offset_;
+    while (next != end && max_size > 0 && (result.count) < result.max_buffers)
+    {
+      Buffer next_buf = Buffer(*next) + elem_offset;
+      result.elems[result.count] = asio::buffer(next_buf, max_size);
+      max_size -= result.elems[result.count].size();
+      elem_offset = 0;
+      if (result.elems[result.count].size() > 0)
+        ++result.count;
+      ++next;
+    }
+
+    return result;
+  }
+
+  // Consume the specified number of bytes from the buffers.
+  void consume(std::size_t size)
+  {
+    total_consumed_ += size;
+
+    Buffer_Iterator next = asio::buffer_sequence_begin(buffers_);
+    Buffer_Iterator end = asio::buffer_sequence_end(buffers_);
+
+    std::advance(next, next_elem_);
+    while (next != end && size > 0)
+    {
+      Buffer next_buf = Buffer(*next) + next_elem_offset_;
+      if (size < next_buf.size())
+      {
+        next_elem_offset_ += size;
+        size = 0;
+      }
+      else
+      {
+        size -= next_buf.size();
+        next_elem_offset_ = 0;
+        ++next_elem_;
+        ++next;
+      }
+    }
+  }
+
+  // Get the total number of bytes consumed from the buffers.
+  std::size_t total_consumed() const
+  {
+    return total_consumed_;
+  }
+
+private:
+  Buffers buffers_;
+  std::size_t total_size_;
+  std::size_t total_consumed_;
+  std::size_t next_elem_;
+  std::size_t next_elem_offset_;
+};
+
+// Base class of all consuming_buffers specialisations for single buffers.
+template <typename Buffer>
+class consuming_single_buffer
+{
+public:
+  // Construct to represent the entire list of buffers.
+  template <typename Buffer1>
+  explicit consuming_single_buffer(const Buffer1& buffer)
+    : buffer_(buffer),
+      total_consumed_(0)
+  {
+  }
+
+  // Determine if we are at the end of the buffers.
+  bool empty() const
+  {
+    return total_consumed_ >= buffer_.size();
+  }
+
+  // Get the buffer for a single transfer, with a size.
+  Buffer prepare(std::size_t max_size)
+  {
+    return asio::buffer(buffer_ + total_consumed_, max_size);
+  }
+
+  // Consume the specified number of bytes from the buffers.
+  void consume(std::size_t size)
+  {
+    total_consumed_ += size;
+  }
+
+  // Get the total number of bytes consumed from the buffers.
+  std::size_t total_consumed() const
+  {
+    return total_consumed_;
+  }
+
+private:
+  Buffer buffer_;
+  std::size_t total_consumed_;
+};
+
+template <>
+class consuming_buffers<mutable_buffer, mutable_buffer, const mutable_buffer*>
+  : public consuming_single_buffer<ASIO_MUTABLE_BUFFER>
+{
+public:
+  explicit consuming_buffers(const mutable_buffer& buffer)
+    : consuming_single_buffer<ASIO_MUTABLE_BUFFER>(buffer)
+  {
+  }
+};
+
+template <>
+class consuming_buffers<const_buffer, mutable_buffer, const mutable_buffer*>
+  : public consuming_single_buffer<ASIO_CONST_BUFFER>
+{
+public:
+  explicit consuming_buffers(const mutable_buffer& buffer)
+    : consuming_single_buffer<ASIO_CONST_BUFFER>(buffer)
+  {
+  }
+};
+
+template <>
+class consuming_buffers<const_buffer, const_buffer, const const_buffer*>
+  : public consuming_single_buffer<ASIO_CONST_BUFFER>
+{
+public:
+  explicit consuming_buffers(const const_buffer& buffer)
+    : consuming_single_buffer<ASIO_CONST_BUFFER>(buffer)
+  {
+  }
+};
+
+#if !defined(ASIO_NO_DEPRECATED)
+
+template <>
+class consuming_buffers<mutable_buffer,
+    mutable_buffers_1, const mutable_buffer*>
+  : public consuming_single_buffer<ASIO_MUTABLE_BUFFER>
+{
+public:
+  explicit consuming_buffers(const mutable_buffers_1& buffer)
+    : consuming_single_buffer<ASIO_MUTABLE_BUFFER>(buffer)
+  {
+  }
+};
+
+template <>
+class consuming_buffers<const_buffer, mutable_buffers_1, const mutable_buffer*>
+  : public consuming_single_buffer<ASIO_CONST_BUFFER>
+{
+public:
+  explicit consuming_buffers(const mutable_buffers_1& buffer)
+    : consuming_single_buffer<ASIO_CONST_BUFFER>(buffer)
+  {
+  }
+};
+
+template <>
+class consuming_buffers<const_buffer, const_buffers_1, const const_buffer*>
+  : public consuming_single_buffer<ASIO_CONST_BUFFER>
+{
+public:
+  explicit consuming_buffers(const const_buffers_1& buffer)
+    : consuming_single_buffer<ASIO_CONST_BUFFER>(buffer)
+  {
+  }
+};
+
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+template <typename Buffer, typename Elem>
+class consuming_buffers<Buffer, boost::array<Elem, 2>,
+    typename boost::array<Elem, 2>::const_iterator>
+{
+public:
+  // Construct to represent the entire list of buffers.
+  explicit consuming_buffers(const boost::array<Elem, 2>& buffers)
+    : buffers_(buffers),
+      total_consumed_(0)
+  {
+  }
+
+  // Determine if we are at the end of the buffers.
+  bool empty() const
+  {
+    return total_consumed_ >=
+      Buffer(buffers_[0]).size() + Buffer(buffers_[1]).size();
+  }
+
+  // Get the buffer for a single transfer, with a size.
+  boost::array<Buffer, 2> prepare(std::size_t max_size)
+  {
+    boost::array<Buffer, 2> result = {{
+      Buffer(buffers_[0]), Buffer(buffers_[1]) }};
+    std::size_t buffer0_size = result[0].size();
+    result[0] = asio::buffer(result[0] + total_consumed_, max_size);
+    result[1] = asio::buffer(
+        result[1] + (total_consumed_ < buffer0_size
+          ? 0 : total_consumed_ - buffer0_size),
+        max_size - result[0].size());
+    return result;
+  }
+
+  // Consume the specified number of bytes from the buffers.
+  void consume(std::size_t size)
+  {
+    total_consumed_ += size;
+  }
+
+  // Get the total number of bytes consumed from the buffers.
+  std::size_t total_consumed() const
+  {
+    return total_consumed_;
+  }
+
+private:
+  boost::array<Elem, 2> buffers_;
+  std::size_t total_consumed_;
+};
+
+#if defined(ASIO_HAS_STD_ARRAY)
+
+template <typename Buffer, typename Elem>
+class consuming_buffers<Buffer, std::array<Elem, 2>,
+    typename std::array<Elem, 2>::const_iterator>
+{
+public:
+  // Construct to represent the entire list of buffers.
+  explicit consuming_buffers(const std::array<Elem, 2>& buffers)
+    : buffers_(buffers),
+      total_consumed_(0)
+  {
+  }
+
+  // Determine if we are at the end of the buffers.
+  bool empty() const
+  {
+    return total_consumed_ >=
+      Buffer(buffers_[0]).size() + Buffer(buffers_[1]).size();
+  }
+
+  // Get the buffer for a single transfer, with a size.
+  std::array<Buffer, 2> prepare(std::size_t max_size)
+  {
+    std::array<Buffer, 2> result = {{
+      Buffer(buffers_[0]), Buffer(buffers_[1]) }};
+    std::size_t buffer0_size = result[0].size();
+    result[0] = asio::buffer(result[0] + total_consumed_, max_size);
+    result[1] = asio::buffer(
+        result[1] + (total_consumed_ < buffer0_size
+          ? 0 : total_consumed_ - buffer0_size),
+        max_size - result[0].size());
+    return result;
+  }
+
+  // Consume the specified number of bytes from the buffers.
+  void consume(std::size_t size)
+  {
+    total_consumed_ += size;
+  }
+
+  // Get the total number of bytes consumed from the buffers.
+  std::size_t total_consumed() const
+  {
+    return total_consumed_;
+  }
+
+private:
+  std::array<Elem, 2> buffers_;
+  std::size_t total_consumed_;
+};
+
+#endif // defined(ASIO_HAS_STD_ARRAY)
+
+// Specialisation for null_buffers to ensure that the null_buffers type is
+// always passed through to the underlying read or write operation.
+template <typename Buffer>
+class consuming_buffers<Buffer, null_buffers, const mutable_buffer*>
+  : public asio::null_buffers
+{
+public:
+  consuming_buffers(const null_buffers&)
+  {
+    // No-op.
+  }
+
+  bool empty()
+  {
+    return false;
+  }
+
+  null_buffers prepare(std::size_t)
+  {
+    return null_buffers();
+  }
+
+  void consume(std::size_t)
+  {
+    // No-op.
+  }
+
+  std::size_t total_consumed() const
+  {
+    return 0;
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_CONSUMING_BUFFERS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/cstddef.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/cstddef.hpp
new file mode 100644
index 00000000000..b34dae50c8d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/cstddef.hpp
@@ -0,0 +1,31 @@
+//
+// detail/cstddef.hpp
+// ~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_CSTDDEF_HPP
+#define ASIO_DETAIL_CSTDDEF_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+
+namespace asio {
+
+#if defined(ASIO_HAS_NULLPTR)
+using std::nullptr_t;
+#else // defined(ASIO_HAS_NULLPTR)
+struct nullptr_t {};
+#endif // defined(ASIO_HAS_NULLPTR)
+
+} // namespace asio
+
+#endif // ASIO_DETAIL_CSTDDEF_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/cstdint.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/cstdint.hpp
new file mode 100644
index 00000000000..1f6ac447c52
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/cstdint.hpp
@@ -0,0 +1,60 @@
+//
+// detail/cstdint.hpp
+// ~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_CSTDINT_HPP
+#define ASIO_DETAIL_CSTDINT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_CSTDINT)
+# include <cstdint>
+#else // defined(ASIO_HAS_CSTDINT)
+# include <boost/cstdint.hpp>
+#endif // defined(ASIO_HAS_CSTDINT)
+
+namespace asio {
+
+#if defined(ASIO_HAS_CSTDINT)
+using std::int16_t;
+using std::int_least16_t;
+using std::uint16_t;
+using std::uint_least16_t;
+using std::int32_t;
+using std::int_least32_t;
+using std::uint32_t;
+using std::uint_least32_t;
+using std::int64_t;
+using std::int_least64_t;
+using std::uint64_t;
+using std::uint_least64_t;
+using std::uintmax_t;
+#else // defined(ASIO_HAS_CSTDINT)
+using boost::int16_t;
+using boost::int_least16_t;
+using boost::uint16_t;
+using boost::uint_least16_t;
+using boost::int32_t;
+using boost::int_least32_t;
+using boost::uint32_t;
+using boost::uint_least32_t;
+using boost::int64_t;
+using boost::int_least64_t;
+using boost::uint64_t;
+using boost::uint_least64_t;
+using boost::uintmax_t;
+#endif // defined(ASIO_HAS_CSTDINT)
+
+} // namespace asio
+
+#endif // ASIO_DETAIL_CSTDINT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/date_time_fwd.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/date_time_fwd.hpp
new file mode 100644
index 00000000000..3a2af4d8052
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/date_time_fwd.hpp
@@ -0,0 +1,34 @@
+//
+// detail/date_time_fwd.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_DATE_TIME_FWD_HPP
+#define ASIO_DETAIL_DATE_TIME_FWD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+namespace boost {
+namespace date_time {
+
+template<class T, class TimeSystem>
+class base_time;
+
+} // namespace date_time
+namespace posix_time {
+
+class ptime;
+
+} // namespace posix_time
+} // namespace boost
+
+#endif // ASIO_DETAIL_DATE_TIME_FWD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/deadline_timer_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/deadline_timer_service.hpp
new file mode 100644
index 00000000000..28ee3e49826
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/deadline_timer_service.hpp
@@ -0,0 +1,280 @@
+//
+// detail/deadline_timer_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_DEADLINE_TIMER_SERVICE_HPP
+#define ASIO_DETAIL_DEADLINE_TIMER_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/timer_queue.hpp"
+#include "asio/detail/timer_queue_ptime.hpp"
+#include "asio/detail/timer_scheduler.hpp"
+#include "asio/detail/wait_handler.hpp"
+#include "asio/detail/wait_op.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+# include <chrono>
+# include <thread>
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Time_Traits>
+class deadline_timer_service
+  : public execution_context_service_base<deadline_timer_service<Time_Traits> >
+{
+public:
+  // The time type.
+  typedef typename Time_Traits::time_type time_type;
+
+  // The duration type.
+  typedef typename Time_Traits::duration_type duration_type;
+
+  // The implementation type of the timer. This type is dependent on the
+  // underlying implementation of the timer service.
+  struct implementation_type
+    : private asio::detail::noncopyable
+  {
+    time_type expiry;
+    bool might_have_pending_waits;
+    typename timer_queue<Time_Traits>::per_timer_data timer_data;
+  };
+
+  // Constructor.
+  deadline_timer_service(execution_context& context)
+    : execution_context_service_base<
+        deadline_timer_service<Time_Traits> >(context),
+      scheduler_(asio::use_service<timer_scheduler>(context))
+  {
+    scheduler_.init_task();
+    scheduler_.add_timer_queue(timer_queue_);
+  }
+
+  // Destructor.
+  ~deadline_timer_service()
+  {
+    scheduler_.remove_timer_queue(timer_queue_);
+  }
+
+  // Destroy all user-defined handler objects owned by the service.
+  void shutdown()
+  {
+  }
+
+  // Construct a new timer implementation.
+  void construct(implementation_type& impl)
+  {
+    impl.expiry = time_type();
+    impl.might_have_pending_waits = false;
+  }
+
+  // Destroy a timer implementation.
+  void destroy(implementation_type& impl)
+  {
+    asio::error_code ec;
+    cancel(impl, ec);
+  }
+
+  // Move-construct a new serial port implementation.
+  void move_construct(implementation_type& impl,
+      implementation_type& other_impl)
+  {
+    scheduler_.move_timer(timer_queue_, impl.timer_data, other_impl.timer_data);
+
+    impl.expiry = other_impl.expiry;
+    other_impl.expiry = time_type();
+
+    impl.might_have_pending_waits = other_impl.might_have_pending_waits;
+    other_impl.might_have_pending_waits = false;
+  }
+
+  // Move-assign from another serial port implementation.
+  void move_assign(implementation_type& impl,
+      deadline_timer_service& other_service,
+      implementation_type& other_impl)
+  {
+    if (this != &other_service)
+      if (impl.might_have_pending_waits)
+        scheduler_.cancel_timer(timer_queue_, impl.timer_data);
+
+    other_service.scheduler_.move_timer(other_service.timer_queue_,
+        impl.timer_data, other_impl.timer_data);
+
+    impl.expiry = other_impl.expiry;
+    other_impl.expiry = time_type();
+
+    impl.might_have_pending_waits = other_impl.might_have_pending_waits;
+    other_impl.might_have_pending_waits = false;
+  }
+
+  // Cancel any asynchronous wait operations associated with the timer.
+  std::size_t cancel(implementation_type& impl, asio::error_code& ec)
+  {
+    if (!impl.might_have_pending_waits)
+    {
+      ec = asio::error_code();
+      return 0;
+    }
+
+    ASIO_HANDLER_OPERATION((scheduler_.context(),
+          "deadline_timer", &impl, 0, "cancel"));
+
+    std::size_t count = scheduler_.cancel_timer(timer_queue_, impl.timer_data);
+    impl.might_have_pending_waits = false;
+    ec = asio::error_code();
+    return count;
+  }
+
+  // Cancels one asynchronous wait operation associated with the timer.
+  std::size_t cancel_one(implementation_type& impl,
+      asio::error_code& ec)
+  {
+    if (!impl.might_have_pending_waits)
+    {
+      ec = asio::error_code();
+      return 0;
+    }
+
+    ASIO_HANDLER_OPERATION((scheduler_.context(),
+          "deadline_timer", &impl, 0, "cancel_one"));
+
+    std::size_t count = scheduler_.cancel_timer(
+        timer_queue_, impl.timer_data, 1);
+    if (count == 0)
+      impl.might_have_pending_waits = false;
+    ec = asio::error_code();
+    return count;
+  }
+
+  // Get the expiry time for the timer as an absolute time.
+  time_type expiry(const implementation_type& impl) const
+  {
+    return impl.expiry;
+  }
+
+  // Get the expiry time for the timer as an absolute time.
+  time_type expires_at(const implementation_type& impl) const
+  {
+    return impl.expiry;
+  }
+
+  // Get the expiry time for the timer relative to now.
+  duration_type expires_from_now(const implementation_type& impl) const
+  {
+    return Time_Traits::subtract(this->expiry(impl), Time_Traits::now());
+  }
+
+  // Set the expiry time for the timer as an absolute time.
+  std::size_t expires_at(implementation_type& impl,
+      const time_type& expiry_time, asio::error_code& ec)
+  {
+    std::size_t count = cancel(impl, ec);
+    impl.expiry = expiry_time;
+    ec = asio::error_code();
+    return count;
+  }
+
+  // Set the expiry time for the timer relative to now.
+  std::size_t expires_after(implementation_type& impl,
+      const duration_type& expiry_time, asio::error_code& ec)
+  {
+    return expires_at(impl,
+        Time_Traits::add(Time_Traits::now(), expiry_time), ec);
+  }
+
+  // Set the expiry time for the timer relative to now.
+  std::size_t expires_from_now(implementation_type& impl,
+      const duration_type& expiry_time, asio::error_code& ec)
+  {
+    return expires_at(impl,
+        Time_Traits::add(Time_Traits::now(), expiry_time), ec);
+  }
+
+  // Perform a blocking wait on the timer.
+  void wait(implementation_type& impl, asio::error_code& ec)
+  {
+    time_type now = Time_Traits::now();
+    ec = asio::error_code();
+    while (Time_Traits::less_than(now, impl.expiry) && !ec)
+    {
+      this->do_wait(Time_Traits::to_posix_duration(
+            Time_Traits::subtract(impl.expiry, now)), ec);
+      now = Time_Traits::now();
+    }
+  }
+
+  // Start an asynchronous wait on the timer.
+  template <typename Handler, typename IoExecutor>
+  void async_wait(implementation_type& impl,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef wait_handler<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    impl.might_have_pending_waits = true;
+
+    ASIO_HANDLER_CREATION((scheduler_.context(),
+          *p.p, "deadline_timer", &impl, 0, "async_wait"));
+
+    scheduler_.schedule_timer(timer_queue_, impl.expiry, impl.timer_data, p.p);
+    p.v = p.p = 0;
+  }
+
+private:
+  // Helper function to wait given a duration type. The duration type should
+  // either be of type boost::posix_time::time_duration, or implement the
+  // required subset of its interface.
+  template <typename Duration>
+  void do_wait(const Duration& timeout, asio::error_code& ec)
+  {
+#if defined(ASIO_WINDOWS_RUNTIME)
+    std::this_thread::sleep_for(
+        std::chrono::seconds(timeout.total_seconds())
+        + std::chrono::microseconds(timeout.total_microseconds()));
+    ec = asio::error_code();
+#else // defined(ASIO_WINDOWS_RUNTIME)
+    ::timeval tv;
+    tv.tv_sec = timeout.total_seconds();
+    tv.tv_usec = timeout.total_microseconds() % 1000000;
+    socket_ops::select(0, 0, 0, 0, &tv, ec);
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+  }
+
+  // The queue of timers.
+  timer_queue<Time_Traits> timer_queue_;
+
+  // The object that schedules and executes timers. Usually a reactor.
+  timer_scheduler& scheduler_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_DEADLINE_TIMER_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/dependent_type.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/dependent_type.hpp
new file mode 100644
index 00000000000..c7b4866f1e6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/dependent_type.hpp
@@ -0,0 +1,36 @@
+//
+// detail/dependent_type.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_DEPENDENT_TYPE_HPP
+#define ASIO_DETAIL_DEPENDENT_TYPE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename DependsOn, typename T>
+struct dependent_type
+{
+  typedef T type;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_DEPENDENT_TYPE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/descriptor_ops.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/descriptor_ops.hpp
new file mode 100644
index 00000000000..3a14288254a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/descriptor_ops.hpp
@@ -0,0 +1,121 @@
+//
+// detail/descriptor_ops.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_DESCRIPTOR_OPS_HPP
+#define ASIO_DETAIL_DESCRIPTOR_OPS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_WINDOWS) \
+  && !defined(ASIO_WINDOWS_RUNTIME) \
+  && !defined(__CYGWIN__)
+
+#include <cstddef>
+#include "asio/error.hpp"
+#include "asio/error_code.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+namespace descriptor_ops {
+
+// Descriptor state bits.
+enum
+{
+  // The user wants a non-blocking descriptor.
+  user_set_non_blocking = 1,
+
+  // The descriptor has been set non-blocking.
+  internal_non_blocking = 2,
+
+  // Helper "state" used to determine whether the descriptor is non-blocking.
+  non_blocking = user_set_non_blocking | internal_non_blocking,
+
+  // The descriptor may have been dup()-ed.
+  possible_dup = 4
+};
+
+typedef unsigned char state_type;
+
+template <typename ReturnType>
+inline ReturnType error_wrapper(ReturnType return_value,
+    asio::error_code& ec)
+{
+  ec = asio::error_code(errno,
+      asio::error::get_system_category());
+  return return_value;
+}
+
+ASIO_DECL int open(const char* path, int flags,
+    asio::error_code& ec);
+
+ASIO_DECL int close(int d, state_type& state,
+    asio::error_code& ec);
+
+ASIO_DECL bool set_user_non_blocking(int d,
+    state_type& state, bool value, asio::error_code& ec);
+
+ASIO_DECL bool set_internal_non_blocking(int d,
+    state_type& state, bool value, asio::error_code& ec);
+
+typedef iovec buf;
+
+ASIO_DECL std::size_t sync_read(int d, state_type state, buf* bufs,
+    std::size_t count, bool all_empty, asio::error_code& ec);
+
+ASIO_DECL bool non_blocking_read(int d, buf* bufs, std::size_t count,
+    asio::error_code& ec, std::size_t& bytes_transferred);
+
+ASIO_DECL std::size_t sync_write(int d, state_type state,
+    const buf* bufs, std::size_t count, bool all_empty,
+    asio::error_code& ec);
+
+ASIO_DECL bool non_blocking_write(int d,
+    const buf* bufs, std::size_t count,
+    asio::error_code& ec, std::size_t& bytes_transferred);
+
+ASIO_DECL int ioctl(int d, state_type& state, long cmd,
+    ioctl_arg_type* arg, asio::error_code& ec);
+
+ASIO_DECL int fcntl(int d, int cmd, asio::error_code& ec);
+
+ASIO_DECL int fcntl(int d, int cmd,
+    long arg, asio::error_code& ec);
+
+ASIO_DECL int poll_read(int d,
+    state_type state, asio::error_code& ec);
+
+ASIO_DECL int poll_write(int d,
+    state_type state, asio::error_code& ec);
+
+ASIO_DECL int poll_error(int d,
+    state_type state, asio::error_code& ec);
+
+} // namespace descriptor_ops
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/descriptor_ops.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // !defined(ASIO_WINDOWS)
+       //   && !defined(ASIO_WINDOWS_RUNTIME)
+       //   && !defined(__CYGWIN__)
+
+#endif // ASIO_DETAIL_DESCRIPTOR_OPS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/descriptor_read_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/descriptor_read_op.hpp
new file mode 100644
index 00000000000..c14362e5bc4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/descriptor_read_op.hpp
@@ -0,0 +1,130 @@
+//
+// detail/descriptor_read_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_DESCRIPTOR_READ_OP_HPP
+#define ASIO_DETAIL_DESCRIPTOR_READ_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/descriptor_ops.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_work.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename MutableBufferSequence>
+class descriptor_read_op_base : public reactor_op
+{
+public:
+  descriptor_read_op_base(int descriptor,
+      const MutableBufferSequence& buffers, func_type complete_func)
+    : reactor_op(&descriptor_read_op_base::do_perform, complete_func),
+      descriptor_(descriptor),
+      buffers_(buffers)
+  {
+  }
+
+  static status do_perform(reactor_op* base)
+  {
+    descriptor_read_op_base* o(static_cast<descriptor_read_op_base*>(base));
+
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(o->buffers_);
+
+    status result = descriptor_ops::non_blocking_read(o->descriptor_,
+        bufs.buffers(), bufs.count(), o->ec_, o->bytes_transferred_)
+      ? done : not_done;
+
+    ASIO_HANDLER_REACTOR_OPERATION((*o, "non_blocking_read",
+          o->ec_, o->bytes_transferred_));
+
+    return result;
+  }
+
+private:
+  int descriptor_;
+  MutableBufferSequence buffers_;
+};
+
+template <typename MutableBufferSequence, typename Handler, typename IoExecutor>
+class descriptor_read_op
+  : public descriptor_read_op_base<MutableBufferSequence>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(descriptor_read_op);
+
+  descriptor_read_op(int descriptor, const MutableBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+    : descriptor_read_op_base<MutableBufferSequence>(
+        descriptor, buffers, &descriptor_read_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    descriptor_read_op* o(static_cast<descriptor_read_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, o->ec_, o->bytes_transferred_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+#endif // ASIO_DETAIL_DESCRIPTOR_READ_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/descriptor_write_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/descriptor_write_op.hpp
new file mode 100644
index 00000000000..0ba32822737
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/descriptor_write_op.hpp
@@ -0,0 +1,130 @@
+//
+// detail/descriptor_write_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_DESCRIPTOR_WRITE_OP_HPP
+#define ASIO_DETAIL_DESCRIPTOR_WRITE_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/descriptor_ops.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_work.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename ConstBufferSequence>
+class descriptor_write_op_base : public reactor_op
+{
+public:
+  descriptor_write_op_base(int descriptor,
+      const ConstBufferSequence& buffers, func_type complete_func)
+    : reactor_op(&descriptor_write_op_base::do_perform, complete_func),
+      descriptor_(descriptor),
+      buffers_(buffers)
+  {
+  }
+
+  static status do_perform(reactor_op* base)
+  {
+    descriptor_write_op_base* o(static_cast<descriptor_write_op_base*>(base));
+
+    buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence> bufs(o->buffers_);
+
+    status result = descriptor_ops::non_blocking_write(o->descriptor_,
+        bufs.buffers(), bufs.count(), o->ec_, o->bytes_transferred_)
+      ? done : not_done;
+
+    ASIO_HANDLER_REACTOR_OPERATION((*o, "non_blocking_write",
+          o->ec_, o->bytes_transferred_));
+
+    return result;
+  }
+
+private:
+  int descriptor_;
+  ConstBufferSequence buffers_;
+};
+
+template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+class descriptor_write_op
+  : public descriptor_write_op_base<ConstBufferSequence>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(descriptor_write_op);
+
+  descriptor_write_op(int descriptor, const ConstBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+    : descriptor_write_op_base<ConstBufferSequence>(
+        descriptor, buffers, &descriptor_write_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    descriptor_write_op* o(static_cast<descriptor_write_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, o->ec_, o->bytes_transferred_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+#endif // ASIO_DETAIL_DESCRIPTOR_WRITE_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/dev_poll_reactor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/dev_poll_reactor.hpp
new file mode 100644
index 00000000000..41c2330b198
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/dev_poll_reactor.hpp
@@ -0,0 +1,218 @@
+//
+// detail/dev_poll_reactor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_DEV_POLL_REACTOR_HPP
+#define ASIO_DETAIL_DEV_POLL_REACTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_DEV_POLL)
+
+#include <cstddef>
+#include <vector>
+#include <sys/devpoll.h>
+#include "asio/detail/hash_map.hpp"
+#include "asio/detail/limits.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/reactor_op_queue.hpp"
+#include "asio/detail/select_interrupter.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/timer_queue_base.hpp"
+#include "asio/detail/timer_queue_set.hpp"
+#include "asio/detail/wait_op.hpp"
+#include "asio/execution_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class dev_poll_reactor
+  : public execution_context_service_base<dev_poll_reactor>
+{
+public:
+  enum op_types { read_op = 0, write_op = 1,
+    connect_op = 1, except_op = 2, max_ops = 3 };
+
+  // Per-descriptor data.
+  struct per_descriptor_data
+  {
+  };
+
+  // Constructor.
+  ASIO_DECL dev_poll_reactor(asio::execution_context& ctx);
+
+  // Destructor.
+  ASIO_DECL ~dev_poll_reactor();
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Recreate internal descriptors following a fork.
+  ASIO_DECL void notify_fork(
+      asio::execution_context::fork_event fork_ev);
+
+  // Initialise the task.
+  ASIO_DECL void init_task();
+
+  // Register a socket with the reactor. Returns 0 on success, system error
+  // code on failure.
+  ASIO_DECL int register_descriptor(socket_type, per_descriptor_data&);
+
+  // Register a descriptor with an associated single operation. Returns 0 on
+  // success, system error code on failure.
+  ASIO_DECL int register_internal_descriptor(
+      int op_type, socket_type descriptor,
+      per_descriptor_data& descriptor_data, reactor_op* op);
+
+  // Move descriptor registration from one descriptor_data object to another.
+  ASIO_DECL void move_descriptor(socket_type descriptor,
+      per_descriptor_data& target_descriptor_data,
+      per_descriptor_data& source_descriptor_data);
+
+  // Post a reactor operation for immediate completion.
+  void post_immediate_completion(reactor_op* op, bool is_continuation)
+  {
+    scheduler_.post_immediate_completion(op, is_continuation);
+  }
+
+  // Start a new operation. The reactor operation will be performed when the
+  // given descriptor is flagged as ready, or an error has occurred.
+  ASIO_DECL void start_op(int op_type, socket_type descriptor,
+      per_descriptor_data&, reactor_op* op,
+      bool is_continuation, bool allow_speculative);
+
+  // Cancel all operations associated with the given descriptor. The
+  // handlers associated with the descriptor will be invoked with the
+  // operation_aborted error.
+  ASIO_DECL void cancel_ops(socket_type descriptor, per_descriptor_data&);
+
+  // Cancel any operations that are running against the descriptor and remove
+  // its registration from the reactor. The reactor resources associated with
+  // the descriptor must be released by calling cleanup_descriptor_data.
+  ASIO_DECL void deregister_descriptor(socket_type descriptor,
+      per_descriptor_data&, bool closing);
+
+  // Remove the descriptor's registration from the reactor. The reactor
+  // resources associated with the descriptor must be released by calling
+  // cleanup_descriptor_data.
+  ASIO_DECL void deregister_internal_descriptor(
+      socket_type descriptor, per_descriptor_data&);
+
+  // Perform any post-deregistration cleanup tasks associated with the
+  // descriptor data.
+  ASIO_DECL void cleanup_descriptor_data(per_descriptor_data&);
+
+  // Add a new timer queue to the reactor.
+  template <typename Time_Traits>
+  void add_timer_queue(timer_queue<Time_Traits>& queue);
+
+  // Remove a timer queue from the reactor.
+  template <typename Time_Traits>
+  void remove_timer_queue(timer_queue<Time_Traits>& queue);
+
+  // Schedule a new operation in the given timer queue to expire at the
+  // specified absolute time.
+  template <typename Time_Traits>
+  void schedule_timer(timer_queue<Time_Traits>& queue,
+      const typename Time_Traits::time_type& time,
+      typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op);
+
+  // Cancel the timer operations associated with the given token. Returns the
+  // number of operations that have been posted or dispatched.
+  template <typename Time_Traits>
+  std::size_t cancel_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& timer,
+      std::size_t max_cancelled = (std::numeric_limits<std::size_t>::max)());
+
+  // Move the timer operations associated with the given timer.
+  template <typename Time_Traits>
+  void move_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& target,
+      typename timer_queue<Time_Traits>::per_timer_data& source);
+
+  // Run /dev/poll once until interrupted or events are ready to be dispatched.
+  ASIO_DECL void run(long usec, op_queue<operation>& ops);
+
+  // Interrupt the select loop.
+  ASIO_DECL void interrupt();
+
+private:
+  // Create the /dev/poll file descriptor. Throws an exception if the descriptor
+  // cannot be created.
+  ASIO_DECL static int do_dev_poll_create();
+
+  // Helper function to add a new timer queue.
+  ASIO_DECL void do_add_timer_queue(timer_queue_base& queue);
+
+  // Helper function to remove a timer queue.
+  ASIO_DECL void do_remove_timer_queue(timer_queue_base& queue);
+
+  // Get the timeout value for the /dev/poll DP_POLL operation. The timeout
+  // value is returned as a number of milliseconds. A return value of -1
+  // indicates that the poll should block indefinitely.
+  ASIO_DECL int get_timeout(int msec);
+
+  // Cancel all operations associated with the given descriptor. The do_cancel
+  // function of the handler objects will be invoked. This function does not
+  // acquire the dev_poll_reactor's mutex.
+  ASIO_DECL void cancel_ops_unlocked(socket_type descriptor,
+      const asio::error_code& ec);
+
+  // Add a pending event entry for the given descriptor.
+  ASIO_DECL ::pollfd& add_pending_event_change(int descriptor);
+
+  // The scheduler implementation used to post completions.
+  scheduler& scheduler_;
+
+  // Mutex to protect access to internal data.
+  asio::detail::mutex mutex_;
+
+  // The /dev/poll file descriptor.
+  int dev_poll_fd_;
+
+  // Vector of /dev/poll events waiting to be written to the descriptor.
+  std::vector< ::pollfd> pending_event_changes_;
+
+  // Hash map to associate a descriptor with a pending event change index.
+  hash_map<int, std::size_t> pending_event_change_index_;
+
+  // The interrupter is used to break a blocking DP_POLL operation.
+  select_interrupter interrupter_;
+
+  // The queues of read, write and except operations.
+  reactor_op_queue<socket_type> op_queue_[max_ops];
+
+  // The timer queues.
+  timer_queue_set timer_queues_;
+
+  // Whether the service has been shut down.
+  bool shutdown_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/detail/impl/dev_poll_reactor.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/dev_poll_reactor.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_DEV_POLL)
+
+#endif // ASIO_DETAIL_DEV_POLL_REACTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/epoll_reactor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/epoll_reactor.hpp
new file mode 100644
index 00000000000..248eb8a31d5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/epoll_reactor.hpp
@@ -0,0 +1,266 @@
+//
+// detail/epoll_reactor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_EPOLL_REACTOR_HPP
+#define ASIO_DETAIL_EPOLL_REACTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_EPOLL)
+
+#include "asio/detail/atomic_count.hpp"
+#include "asio/detail/conditionally_enabled_mutex.hpp"
+#include "asio/detail/limits.hpp"
+#include "asio/detail/object_pool.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/select_interrupter.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/timer_queue_base.hpp"
+#include "asio/detail/timer_queue_set.hpp"
+#include "asio/detail/wait_op.hpp"
+#include "asio/execution_context.hpp"
+
+#if defined(ASIO_HAS_TIMERFD)
+# include <sys/timerfd.h>
+#endif // defined(ASIO_HAS_TIMERFD)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class epoll_reactor
+  : public execution_context_service_base<epoll_reactor>
+{
+private:
+  // The mutex type used by this reactor.
+  typedef conditionally_enabled_mutex mutex;
+
+public:
+  enum op_types { read_op = 0, write_op = 1,
+    connect_op = 1, except_op = 2, max_ops = 3 };
+
+  // Per-descriptor queues.
+  class descriptor_state : operation
+  {
+    friend class epoll_reactor;
+    friend class object_pool_access;
+
+    descriptor_state* next_;
+    descriptor_state* prev_;
+
+    mutex mutex_;
+    epoll_reactor* reactor_;
+    int descriptor_;
+    uint32_t registered_events_;
+    op_queue<reactor_op> op_queue_[max_ops];
+    bool try_speculative_[max_ops];
+    bool shutdown_;
+
+    ASIO_DECL descriptor_state(bool locking);
+    void set_ready_events(uint32_t events) { task_result_ = events; }
+    void add_ready_events(uint32_t events) { task_result_ |= events; }
+    ASIO_DECL operation* perform_io(uint32_t events);
+    ASIO_DECL static void do_complete(
+        void* owner, operation* base,
+        const asio::error_code& ec, std::size_t bytes_transferred);
+  };
+
+  // Per-descriptor data.
+  typedef descriptor_state* per_descriptor_data;
+
+  // Constructor.
+  ASIO_DECL epoll_reactor(asio::execution_context& ctx);
+
+  // Destructor.
+  ASIO_DECL ~epoll_reactor();
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Recreate internal descriptors following a fork.
+  ASIO_DECL void notify_fork(
+      asio::execution_context::fork_event fork_ev);
+
+  // Initialise the task.
+  ASIO_DECL void init_task();
+
+  // Register a socket with the reactor. Returns 0 on success, system error
+  // code on failure.
+  ASIO_DECL int register_descriptor(socket_type descriptor,
+      per_descriptor_data& descriptor_data);
+
+  // Register a descriptor with an associated single operation. Returns 0 on
+  // success, system error code on failure.
+  ASIO_DECL int register_internal_descriptor(
+      int op_type, socket_type descriptor,
+      per_descriptor_data& descriptor_data, reactor_op* op);
+
+  // Move descriptor registration from one descriptor_data object to another.
+  ASIO_DECL void move_descriptor(socket_type descriptor,
+      per_descriptor_data& target_descriptor_data,
+      per_descriptor_data& source_descriptor_data);
+
+  // Post a reactor operation for immediate completion.
+  void post_immediate_completion(reactor_op* op, bool is_continuation)
+  {
+    scheduler_.post_immediate_completion(op, is_continuation);
+  }
+
+  // Start a new operation. The reactor operation will be performed when the
+  // given descriptor is flagged as ready, or an error has occurred.
+  ASIO_DECL void start_op(int op_type, socket_type descriptor,
+      per_descriptor_data& descriptor_data, reactor_op* op,
+      bool is_continuation, bool allow_speculative);
+
+  // Cancel all operations associated with the given descriptor. The
+  // handlers associated with the descriptor will be invoked with the
+  // operation_aborted error.
+  ASIO_DECL void cancel_ops(socket_type descriptor,
+      per_descriptor_data& descriptor_data);
+
+  // Cancel any operations that are running against the descriptor and remove
+  // its registration from the reactor. The reactor resources associated with
+  // the descriptor must be released by calling cleanup_descriptor_data.
+  ASIO_DECL void deregister_descriptor(socket_type descriptor,
+      per_descriptor_data& descriptor_data, bool closing);
+
+  // Remove the descriptor's registration from the reactor. The reactor
+  // resources associated with the descriptor must be released by calling
+  // cleanup_descriptor_data.
+  ASIO_DECL void deregister_internal_descriptor(
+      socket_type descriptor, per_descriptor_data& descriptor_data);
+
+  // Perform any post-deregistration cleanup tasks associated with the
+  // descriptor data.
+  ASIO_DECL void cleanup_descriptor_data(
+      per_descriptor_data& descriptor_data);
+
+  // Add a new timer queue to the reactor.
+  template <typename Time_Traits>
+  void add_timer_queue(timer_queue<Time_Traits>& timer_queue);
+
+  // Remove a timer queue from the reactor.
+  template <typename Time_Traits>
+  void remove_timer_queue(timer_queue<Time_Traits>& timer_queue);
+
+  // Schedule a new operation in the given timer queue to expire at the
+  // specified absolute time.
+  template <typename Time_Traits>
+  void schedule_timer(timer_queue<Time_Traits>& queue,
+      const typename Time_Traits::time_type& time,
+      typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op);
+
+  // Cancel the timer operations associated with the given token. Returns the
+  // number of operations that have been posted or dispatched.
+  template <typename Time_Traits>
+  std::size_t cancel_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& timer,
+      std::size_t max_cancelled = (std::numeric_limits<std::size_t>::max)());
+
+  // Move the timer operations associated with the given timer.
+  template <typename Time_Traits>
+  void move_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& target,
+      typename timer_queue<Time_Traits>::per_timer_data& source);
+
+  // Run epoll once until interrupted or events are ready to be dispatched.
+  ASIO_DECL void run(long usec, op_queue<operation>& ops);
+
+  // Interrupt the select loop.
+  ASIO_DECL void interrupt();
+
+private:
+  // The hint to pass to epoll_create to size its data structures.
+  enum { epoll_size = 20000 };
+
+  // Create the epoll file descriptor. Throws an exception if the descriptor
+  // cannot be created.
+  ASIO_DECL static int do_epoll_create();
+
+  // Create the timerfd file descriptor. Does not throw.
+  ASIO_DECL static int do_timerfd_create();
+
+  // Allocate a new descriptor state object.
+  ASIO_DECL descriptor_state* allocate_descriptor_state();
+
+  // Free an existing descriptor state object.
+  ASIO_DECL void free_descriptor_state(descriptor_state* s);
+
+  // Helper function to add a new timer queue.
+  ASIO_DECL void do_add_timer_queue(timer_queue_base& queue);
+
+  // Helper function to remove a timer queue.
+  ASIO_DECL void do_remove_timer_queue(timer_queue_base& queue);
+
+  // Called to recalculate and update the timeout.
+  ASIO_DECL void update_timeout();
+
+  // Get the timeout value for the epoll_wait call. The timeout value is
+  // returned as a number of milliseconds. A return value of -1 indicates
+  // that epoll_wait should block indefinitely.
+  ASIO_DECL int get_timeout(int msec);
+
+#if defined(ASIO_HAS_TIMERFD)
+  // Get the timeout value for the timer descriptor. The return value is the
+  // flag argument to be used when calling timerfd_settime.
+  ASIO_DECL int get_timeout(itimerspec& ts);
+#endif // defined(ASIO_HAS_TIMERFD)
+
+  // The scheduler implementation used to post completions.
+  scheduler& scheduler_;
+
+  // Mutex to protect access to internal data.
+  mutex mutex_;
+
+  // The interrupter is used to break a blocking epoll_wait call.
+  select_interrupter interrupter_;
+
+  // The epoll file descriptor.
+  int epoll_fd_;
+
+  // The timer file descriptor.
+  int timer_fd_;
+
+  // The timer queues.
+  timer_queue_set timer_queues_;
+
+  // Whether the service has been shut down.
+  bool shutdown_;
+
+  // Mutex to protect access to the registered descriptors.
+  mutex registered_descriptors_mutex_;
+
+  // Keep track of all registered descriptors.
+  object_pool<descriptor_state> registered_descriptors_;
+
+  // Helper class to do post-perform_io cleanup.
+  struct perform_io_cleanup_on_block_exit;
+  friend struct perform_io_cleanup_on_block_exit;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/detail/impl/epoll_reactor.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/epoll_reactor.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_EPOLL)
+
+#endif // ASIO_DETAIL_EPOLL_REACTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/event.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/event.hpp
new file mode 100644
index 00000000000..d1c7a575055
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/event.hpp
@@ -0,0 +1,48 @@
+//
+// detail/event.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_EVENT_HPP
+#define ASIO_DETAIL_EVENT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS)
+# include "asio/detail/null_event.hpp"
+#elif defined(ASIO_WINDOWS)
+# include "asio/detail/win_event.hpp"
+#elif defined(ASIO_HAS_PTHREADS)
+# include "asio/detail/posix_event.hpp"
+#elif defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+# include "asio/detail/std_event.hpp"
+#else
+# error Only Windows, POSIX and std::condition_variable are supported!
+#endif
+
+namespace asio {
+namespace detail {
+
+#if !defined(ASIO_HAS_THREADS)
+typedef null_event event;
+#elif defined(ASIO_WINDOWS)
+typedef win_event event;
+#elif defined(ASIO_HAS_PTHREADS)
+typedef posix_event event;
+#elif defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+typedef std_event event;
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_EVENT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/eventfd_select_interrupter.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/eventfd_select_interrupter.hpp
new file mode 100644
index 00000000000..4dcf6981776
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/eventfd_select_interrupter.hpp
@@ -0,0 +1,83 @@
+//
+// detail/eventfd_select_interrupter.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2008 Roelof Naude (roelof.naude at gmail dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_EVENTFD_SELECT_INTERRUPTER_HPP
+#define ASIO_DETAIL_EVENTFD_SELECT_INTERRUPTER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_EVENTFD)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class eventfd_select_interrupter
+{
+public:
+  // Constructor.
+  ASIO_DECL eventfd_select_interrupter();
+
+  // Destructor.
+  ASIO_DECL ~eventfd_select_interrupter();
+
+  // Recreate the interrupter's descriptors. Used after a fork.
+  ASIO_DECL void recreate();
+
+  // Interrupt the select call.
+  ASIO_DECL void interrupt();
+
+  // Reset the select interrupt. Returns true if the call was interrupted.
+  ASIO_DECL bool reset();
+
+  // Get the read descriptor to be passed to select.
+  int read_descriptor() const
+  {
+    return read_descriptor_;
+  }
+
+private:
+  // Open the descriptors. Throws on error.
+  ASIO_DECL void open_descriptors();
+
+  // Close the descriptors.
+  ASIO_DECL void close_descriptors();
+
+  // The read end of a connection used to interrupt the select call. This file
+  // descriptor is passed to select such that when it is time to stop, a single
+  // 64bit value will be written on the other end of the connection and this
+  // descriptor will become readable.
+  int read_descriptor_;
+
+  // The write end of a connection used to interrupt the select call. A single
+  // 64bit non-zero value may be written to this to wake up the select which is
+  // waiting for the other end to become readable. This descriptor will only
+  // differ from the read descriptor when a pipe is used.
+  int write_descriptor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/eventfd_select_interrupter.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_EVENTFD)
+
+#endif // ASIO_DETAIL_EVENTFD_SELECT_INTERRUPTER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/executor_function.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/executor_function.hpp
new file mode 100644
index 00000000000..9b3f581d67a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/executor_function.hpp
@@ -0,0 +1,104 @@
+//
+// detail/executor_function.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_EXECUTOR_FUNCTION_HPP
+#define ASIO_DETAIL_EXECUTOR_FUNCTION_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class executor_function_base
+{
+public:
+  void complete()
+  {
+    func_(this, true);
+  }
+
+  void destroy()
+  {
+    func_(this, false);
+  }
+
+protected:
+  typedef void (*func_type)(executor_function_base*, bool);
+
+  executor_function_base(func_type func)
+    : func_(func)
+  {
+  }
+
+  // Prevents deletion through this type.
+  ~executor_function_base()
+  {
+  }
+
+private:
+  func_type func_;
+};
+
+template <typename Function, typename Alloc>
+class executor_function : public executor_function_base
+{
+public:
+  ASIO_DEFINE_TAGGED_HANDLER_ALLOCATOR_PTR(
+      thread_info_base::executor_function_tag, executor_function);
+
+  template <typename F>
+  executor_function(ASIO_MOVE_ARG(F) f, const Alloc& allocator)
+    : executor_function_base(&executor_function::do_complete),
+      function_(ASIO_MOVE_CAST(F)(f)),
+      allocator_(allocator)
+  {
+  }
+
+  static void do_complete(executor_function_base* base, bool call)
+  {
+    // Take ownership of the function object.
+    executor_function* o(static_cast<executor_function*>(base));
+    Alloc allocator(o->allocator_);
+    ptr p = { detail::addressof(allocator), o, o };
+
+    // Make a copy of the function so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the function may be the true owner of the memory
+    // associated with the function. Consequently, a local copy of the function
+    // is required to ensure that any owning sub-object remains valid until
+    // after we have deallocated the memory here.
+    Function function(ASIO_MOVE_CAST(Function)(o->function_));
+    p.reset();
+
+    // Make the upcall if required.
+    if (call)
+    {
+      function();
+    }
+  }
+
+private:
+  Function function_;
+  Alloc allocator_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_EXECUTOR_FUNCTION_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/executor_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/executor_op.hpp
new file mode 100644
index 00000000000..7c7b253fcb9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/executor_op.hpp
@@ -0,0 +1,84 @@
+//
+// detail/executor_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_EXECUTOR_OP_HPP
+#define ASIO_DETAIL_EXECUTOR_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/scheduler_operation.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler, typename Alloc,
+    typename Operation = scheduler_operation>
+class executor_op : public Operation
+{
+public:
+  ASIO_DEFINE_HANDLER_ALLOCATOR_PTR(executor_op);
+
+  template <typename H>
+  executor_op(ASIO_MOVE_ARG(H) h, const Alloc& allocator)
+    : Operation(&executor_op::do_complete),
+      handler_(ASIO_MOVE_CAST(H)(h)),
+      allocator_(allocator)
+  {
+  }
+
+  static void do_complete(void* owner, Operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    executor_op* o(static_cast<executor_op*>(base));
+    Alloc allocator(o->allocator_);
+    ptr p = { detail::addressof(allocator), o, o };
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    Handler handler(ASIO_MOVE_CAST(Handler)(o->handler_));
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN(());
+      asio_handler_invoke_helpers::invoke(handler, handler);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  Alloc allocator_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_EXECUTOR_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/fd_set_adapter.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/fd_set_adapter.hpp
new file mode 100644
index 00000000000..a239ec70a39
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/fd_set_adapter.hpp
@@ -0,0 +1,39 @@
+//
+// detail/fd_set_adapter.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_FD_SET_ADAPTER_HPP
+#define ASIO_DETAIL_FD_SET_ADAPTER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/detail/posix_fd_set_adapter.hpp"
+#include "asio/detail/win_fd_set_adapter.hpp"
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+typedef win_fd_set_adapter fd_set_adapter;
+#else
+typedef posix_fd_set_adapter fd_set_adapter;
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#endif // !defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_FD_SET_ADAPTER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/fenced_block.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/fenced_block.hpp
new file mode 100644
index 00000000000..1404837f8a7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/fenced_block.hpp
@@ -0,0 +1,80 @@
+//
+// detail/fenced_block.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_FENCED_BLOCK_HPP
+#define ASIO_DETAIL_FENCED_BLOCK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS) \
+  || defined(ASIO_DISABLE_FENCED_BLOCK)
+# include "asio/detail/null_fenced_block.hpp"
+#elif defined(ASIO_HAS_STD_ATOMIC)
+# include "asio/detail/std_fenced_block.hpp"
+#elif defined(__MACH__) && defined(__APPLE__)
+# include "asio/detail/macos_fenced_block.hpp"
+#elif defined(__sun)
+# include "asio/detail/solaris_fenced_block.hpp"
+#elif defined(__GNUC__) && defined(__arm__) \
+  && !defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
+# include "asio/detail/gcc_arm_fenced_block.hpp"
+#elif defined(__GNUC__) && (defined(__hppa) || defined(__hppa__))
+# include "asio/detail/gcc_hppa_fenced_block.hpp"
+#elif defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
+# include "asio/detail/gcc_x86_fenced_block.hpp"
+#elif defined(__GNUC__) \
+  && ((__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)) \
+  && !defined(__INTEL_COMPILER) && !defined(__ICL) \
+  && !defined(__ICC) && !defined(__ECC) && !defined(__PATHSCALE__)
+# include "asio/detail/gcc_sync_fenced_block.hpp"
+#elif defined(ASIO_WINDOWS) && !defined(UNDER_CE)
+# include "asio/detail/win_fenced_block.hpp"
+#else
+# include "asio/detail/null_fenced_block.hpp"
+#endif
+
+namespace asio {
+namespace detail {
+
+#if !defined(ASIO_HAS_THREADS) \
+  || defined(ASIO_DISABLE_FENCED_BLOCK)
+typedef null_fenced_block fenced_block;
+#elif defined(ASIO_HAS_STD_ATOMIC)
+typedef std_fenced_block fenced_block;
+#elif defined(__MACH__) && defined(__APPLE__)
+typedef macos_fenced_block fenced_block;
+#elif defined(__sun)
+typedef solaris_fenced_block fenced_block;
+#elif defined(__GNUC__) && defined(__arm__) \
+  && !defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
+typedef gcc_arm_fenced_block fenced_block;
+#elif defined(__GNUC__) && (defined(__hppa) || defined(__hppa__))
+typedef gcc_hppa_fenced_block fenced_block;
+#elif defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
+typedef gcc_x86_fenced_block fenced_block;
+#elif defined(__GNUC__) \
+  && ((__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)) \
+  && !defined(__INTEL_COMPILER) && !defined(__ICL) \
+  && !defined(__ICC) && !defined(__ECC) && !defined(__PATHSCALE__)
+typedef gcc_sync_fenced_block fenced_block;
+#elif defined(ASIO_WINDOWS) && !defined(UNDER_CE)
+typedef win_fenced_block fenced_block;
+#else
+typedef null_fenced_block fenced_block;
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_FENCED_BLOCK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/functional.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/functional.hpp
new file mode 100644
index 00000000000..ef2e4e435cc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/functional.hpp
@@ -0,0 +1,38 @@
+//
+// detail/functional.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_FUNCTIONAL_HPP
+#define ASIO_DETAIL_FUNCTIONAL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include <functional>
+
+#if !defined(ASIO_HAS_STD_FUNCTION)
+# include <boost/function.hpp>
+#endif // !defined(ASIO_HAS_STD_FUNCTION)
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_HAS_STD_FUNCTION)
+using std::function;
+#else // defined(ASIO_HAS_STD_FUNCTION)
+using boost::function;
+#endif // defined(ASIO_HAS_STD_FUNCTION)
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_FUNCTIONAL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/future.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/future.hpp
new file mode 100644
index 00000000000..00c22d1fd7b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/future.hpp
@@ -0,0 +1,33 @@
+//
+// detail/future.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_FUTURE_HPP
+#define ASIO_DETAIL_FUTURE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#if defined(ASIO_HAS_STD_FUTURE)
+# include <future>
+// Even though the future header is available, libstdc++ may not implement the
+// std::future class itself. However, we need to have already included the
+// future header to reliably test for _GLIBCXX_HAS_GTHREADS.
+# if defined(__GNUC__) && !defined(ASIO_HAS_CLANG_LIBCXX)
+#  if defined(_GLIBCXX_HAS_GTHREADS)
+#   define ASIO_HAS_STD_FUTURE_CLASS 1
+#  endif // defined(_GLIBCXX_HAS_GTHREADS)
+# else // defined(__GNUC__) && !defined(ASIO_HAS_CLANG_LIBCXX)
+#  define ASIO_HAS_STD_FUTURE_CLASS 1
+# endif // defined(__GNUC__) && !defined(ASIO_HAS_CLANG_LIBCXX)
+#endif // defined(ASIO_HAS_STD_FUTURE)
+
+#endif // ASIO_DETAIL_FUTURE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_arm_fenced_block.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_arm_fenced_block.hpp
new file mode 100644
index 00000000000..a8911315898
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_arm_fenced_block.hpp
@@ -0,0 +1,91 @@
+//
+// detail/gcc_arm_fenced_block.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_GCC_ARM_FENCED_BLOCK_HPP
+#define ASIO_DETAIL_GCC_ARM_FENCED_BLOCK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(__GNUC__) && defined(__arm__)
+
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class gcc_arm_fenced_block
+  : private noncopyable
+{
+public:
+  enum half_t { half };
+  enum full_t { full };
+
+  // Constructor for a half fenced block.
+  explicit gcc_arm_fenced_block(half_t)
+  {
+  }
+
+  // Constructor for a full fenced block.
+  explicit gcc_arm_fenced_block(full_t)
+  {
+    barrier();
+  }
+
+  // Destructor.
+  ~gcc_arm_fenced_block()
+  {
+    barrier();
+  }
+
+private:
+  static void barrier()
+  {
+#if defined(__ARM_ARCH_4__) \
+    || defined(__ARM_ARCH_4T__) \
+    || defined(__ARM_ARCH_5__) \
+    || defined(__ARM_ARCH_5E__) \
+    || defined(__ARM_ARCH_5T__) \
+    || defined(__ARM_ARCH_5TE__) \
+    || defined(__ARM_ARCH_5TEJ__) \
+    || defined(__ARM_ARCH_6__) \
+    || defined(__ARM_ARCH_6J__) \
+    || defined(__ARM_ARCH_6K__) \
+    || defined(__ARM_ARCH_6Z__) \
+    || defined(__ARM_ARCH_6ZK__) \
+    || defined(__ARM_ARCH_6T2__)
+# if defined(__thumb__)
+    // This is just a placeholder and almost certainly not sufficient.
+    __asm__ __volatile__ ("" : : : "memory");
+# else // defined(__thumb__)
+    int a = 0, b = 0;
+    __asm__ __volatile__ ("swp %0, %1, [%2]"
+        : "=&r"(a) : "r"(1), "r"(&b) : "memory", "cc");
+# endif // defined(__thumb__)
+#else
+    // ARMv7 and later.
+    __asm__ __volatile__ ("dmb" : : : "memory");
+#endif
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(__GNUC__) && defined(__arm__)
+
+#endif // ASIO_DETAIL_GCC_ARM_FENCED_BLOCK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_hppa_fenced_block.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_hppa_fenced_block.hpp
new file mode 100644
index 00000000000..30376712655
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_hppa_fenced_block.hpp
@@ -0,0 +1,68 @@
+//
+// detail/gcc_hppa_fenced_block.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_GCC_HPPA_FENCED_BLOCK_HPP
+#define ASIO_DETAIL_GCC_HPPA_FENCED_BLOCK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(__GNUC__) && (defined(__hppa) || defined(__hppa__))
+
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class gcc_hppa_fenced_block
+  : private noncopyable
+{
+public:
+  enum half_t { half };
+  enum full_t { full };
+
+  // Constructor for a half fenced block.
+  explicit gcc_hppa_fenced_block(half_t)
+  {
+  }
+
+  // Constructor for a full fenced block.
+  explicit gcc_hppa_fenced_block(full_t)
+  {
+    barrier();
+  }
+
+  // Destructor.
+  ~gcc_hppa_fenced_block()
+  {
+    barrier();
+  }
+
+private:
+  static void barrier()
+  {
+    // This is just a placeholder and almost certainly not sufficient.
+    __asm__ __volatile__ ("" : : : "memory");
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(__GNUC__) && (defined(__hppa) || defined(__hppa__))
+
+#endif // ASIO_DETAIL_GCC_HPPA_FENCED_BLOCK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_sync_fenced_block.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_sync_fenced_block.hpp
new file mode 100644
index 00000000000..340db21d48d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_sync_fenced_block.hpp
@@ -0,0 +1,65 @@
+//
+// detail/gcc_sync_fenced_block.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_GCC_SYNC_FENCED_BLOCK_HPP
+#define ASIO_DETAIL_GCC_SYNC_FENCED_BLOCK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(__GNUC__) \
+  && ((__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)) \
+  && !defined(__INTEL_COMPILER) && !defined(__ICL) \
+  && !defined(__ICC) && !defined(__ECC) && !defined(__PATHSCALE__)
+
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class gcc_sync_fenced_block
+  : private noncopyable
+{
+public:
+  enum half_or_full_t { half, full };
+
+  // Constructor.
+  explicit gcc_sync_fenced_block(half_or_full_t)
+    : value_(0)
+  {
+    __sync_lock_test_and_set(&value_, 1);
+  }
+
+  // Destructor.
+  ~gcc_sync_fenced_block()
+  {
+    __sync_lock_release(&value_);
+  }
+
+private:
+  int value_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(__GNUC__)
+       // && ((__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4))
+       // && !defined(__INTEL_COMPILER) && !defined(__ICL)
+       // && !defined(__ICC) && !defined(__ECC) && !defined(__PATHSCALE__)
+
+#endif // ASIO_DETAIL_GCC_SYNC_FENCED_BLOCK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_x86_fenced_block.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_x86_fenced_block.hpp
new file mode 100644
index 00000000000..1398b2a0642
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/gcc_x86_fenced_block.hpp
@@ -0,0 +1,99 @@
+//
+// detail/gcc_x86_fenced_block.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_GCC_X86_FENCED_BLOCK_HPP
+#define ASIO_DETAIL_GCC_X86_FENCED_BLOCK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
+
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class gcc_x86_fenced_block
+  : private noncopyable
+{
+public:
+  enum half_t { half };
+  enum full_t { full };
+
+  // Constructor for a half fenced block.
+  explicit gcc_x86_fenced_block(half_t)
+  {
+  }
+
+  // Constructor for a full fenced block.
+  explicit gcc_x86_fenced_block(full_t)
+  {
+    lbarrier();
+  }
+
+  // Destructor.
+  ~gcc_x86_fenced_block()
+  {
+    sbarrier();
+  }
+
+private:
+  static int barrier()
+  {
+    int r = 0, m = 1;
+    __asm__ __volatile__ (
+        "xchgl %0, %1" :
+        "=r"(r), "=m"(m) :
+        "0"(1), "m"(m) :
+        "memory", "cc");
+    return r;
+  }
+
+  static void lbarrier()
+  {
+#if defined(__SSE2__)
+# if (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
+    __builtin_ia32_lfence();
+# else // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
+    __asm__ __volatile__ ("lfence" ::: "memory");
+# endif // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
+#else // defined(__SSE2__)
+    barrier();
+#endif // defined(__SSE2__)
+  }
+
+  static void sbarrier()
+  {
+#if defined(__SSE2__)
+# if (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
+    __builtin_ia32_sfence();
+# else // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
+    __asm__ __volatile__ ("sfence" ::: "memory");
+# endif // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
+#else // defined(__SSE2__)
+    barrier();
+#endif // defined(__SSE2__)
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
+
+#endif // ASIO_DETAIL_GCC_X86_FENCED_BLOCK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/global.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/global.hpp
new file mode 100644
index 00000000000..9d1b58dbdfa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/global.hpp
@@ -0,0 +1,52 @@
+//
+// detail/global.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_GLOBAL_HPP
+#define ASIO_DETAIL_GLOBAL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS)
+# include "asio/detail/null_global.hpp"
+#elif defined(ASIO_WINDOWS)
+# include "asio/detail/win_global.hpp"
+#elif defined(ASIO_HAS_PTHREADS)
+# include "asio/detail/posix_global.hpp"
+#elif defined(ASIO_HAS_STD_CALL_ONCE)
+# include "asio/detail/std_global.hpp"
+#else
+# error Only Windows, POSIX and std::call_once are supported!
+#endif
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+inline T& global()
+{
+#if !defined(ASIO_HAS_THREADS)
+  return null_global<T>();
+#elif defined(ASIO_WINDOWS)
+  return win_global<T>();
+#elif defined(ASIO_HAS_PTHREADS)
+  return posix_global<T>();
+#elif defined(ASIO_HAS_STD_CALL_ONCE)
+  return std_global<T>();
+#endif
+}
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_GLOBAL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_alloc_helpers.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_alloc_helpers.hpp
new file mode 100644
index 00000000000..ef3ff87ffae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_alloc_helpers.hpp
@@ -0,0 +1,242 @@
+//
+// detail/handler_alloc_helpers.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_HANDLER_ALLOC_HELPERS_HPP
+#define ASIO_DETAIL_HANDLER_ALLOC_HELPERS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/recycling_allocator.hpp"
+#include "asio/associated_allocator.hpp"
+#include "asio/handler_alloc_hook.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+// Calls to asio_handler_allocate and asio_handler_deallocate must be made from
+// a namespace that does not contain any overloads of these functions. The
+// asio_handler_alloc_helpers namespace is defined here for that purpose.
+namespace asio_handler_alloc_helpers {
+
+template <typename Handler>
+inline void* allocate(std::size_t s, Handler& h)
+{
+#if !defined(ASIO_HAS_HANDLER_HOOKS)
+  return ::operator new(s);
+#else
+  using asio::asio_handler_allocate;
+  return asio_handler_allocate(s, asio::detail::addressof(h));
+#endif
+}
+
+template <typename Handler>
+inline void deallocate(void* p, std::size_t s, Handler& h)
+{
+#if !defined(ASIO_HAS_HANDLER_HOOKS)
+  ::operator delete(p);
+#else
+  using asio::asio_handler_deallocate;
+  asio_handler_deallocate(p, s, asio::detail::addressof(h));
+#endif
+}
+
+} // namespace asio_handler_alloc_helpers
+
+namespace asio {
+namespace detail {
+
+template <typename Handler, typename T>
+class hook_allocator
+{
+public:
+  typedef T value_type;
+
+  template <typename U>
+  struct rebind
+  {
+    typedef hook_allocator<Handler, U> other;
+  };
+
+  explicit hook_allocator(Handler& h)
+    : handler_(h)
+  {
+  }
+
+  template <typename U>
+  hook_allocator(const hook_allocator<Handler, U>& a)
+    : handler_(a.handler_)
+  {
+  }
+
+  T* allocate(std::size_t n)
+  {
+    return static_cast<T*>(
+        asio_handler_alloc_helpers::allocate(sizeof(T) * n, handler_));
+  }
+
+  void deallocate(T* p, std::size_t n)
+  {
+    asio_handler_alloc_helpers::deallocate(p, sizeof(T) * n, handler_);
+  }
+
+//private:
+  Handler& handler_;
+};
+
+template <typename Handler>
+class hook_allocator<Handler, void>
+{
+public:
+  typedef void value_type;
+
+  template <typename U>
+  struct rebind
+  {
+    typedef hook_allocator<Handler, U> other;
+  };
+
+  explicit hook_allocator(Handler& h)
+    : handler_(h)
+  {
+  }
+
+  template <typename U>
+  hook_allocator(const hook_allocator<Handler, U>& a)
+    : handler_(a.handler_)
+  {
+  }
+
+//private:
+  Handler& handler_;
+};
+
+template <typename Handler, typename Allocator>
+struct get_hook_allocator
+{
+  typedef Allocator type;
+
+  static type get(Handler&, const Allocator& a)
+  {
+    return a;
+  }
+};
+
+template <typename Handler, typename T>
+struct get_hook_allocator<Handler, std::allocator<T> >
+{
+  typedef hook_allocator<Handler, T> type;
+
+  static type get(Handler& handler, const std::allocator<T>&)
+  {
+    return type(handler);
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#define ASIO_DEFINE_HANDLER_PTR(op) \
+  struct ptr \
+  { \
+    Handler* h; \
+    op* v; \
+    op* p; \
+    ~ptr() \
+    { \
+      reset(); \
+    } \
+    static op* allocate(Handler& handler) \
+    { \
+      typedef typename ::asio::associated_allocator< \
+        Handler>::type associated_allocator_type; \
+      typedef typename ::asio::detail::get_hook_allocator< \
+        Handler, associated_allocator_type>::type hook_allocator_type; \
+      ASIO_REBIND_ALLOC(hook_allocator_type, op) a( \
+            ::asio::detail::get_hook_allocator< \
+              Handler, associated_allocator_type>::get( \
+                handler, ::asio::get_associated_allocator(handler))); \
+      return a.allocate(1); \
+    } \
+    void reset() \
+    { \
+      if (p) \
+      { \
+        p->~op(); \
+        p = 0; \
+      } \
+      if (v) \
+      { \
+        typedef typename ::asio::associated_allocator< \
+          Handler>::type associated_allocator_type; \
+        typedef typename ::asio::detail::get_hook_allocator< \
+          Handler, associated_allocator_type>::type hook_allocator_type; \
+        ASIO_REBIND_ALLOC(hook_allocator_type, op) a( \
+              ::asio::detail::get_hook_allocator< \
+                Handler, associated_allocator_type>::get( \
+                  *h, ::asio::get_associated_allocator(*h))); \
+        a.deallocate(static_cast<op*>(v), 1); \
+        v = 0; \
+      } \
+    } \
+  } \
+  /**/
+
+#define ASIO_DEFINE_TAGGED_HANDLER_ALLOCATOR_PTR(purpose, op) \
+  struct ptr \
+  { \
+    const Alloc* a; \
+    void* v; \
+    op* p; \
+    ~ptr() \
+    { \
+      reset(); \
+    } \
+    static op* allocate(const Alloc& a) \
+    { \
+      typedef typename ::asio::detail::get_recycling_allocator< \
+        Alloc, purpose>::type recycling_allocator_type; \
+      ASIO_REBIND_ALLOC(recycling_allocator_type, op) a1( \
+            ::asio::detail::get_recycling_allocator< \
+              Alloc, purpose>::get(a)); \
+      return a1.allocate(1); \
+    } \
+    void reset() \
+    { \
+      if (p) \
+      { \
+        p->~op(); \
+        p = 0; \
+      } \
+      if (v) \
+      { \
+        typedef typename ::asio::detail::get_recycling_allocator< \
+          Alloc, purpose>::type recycling_allocator_type; \
+        ASIO_REBIND_ALLOC(recycling_allocator_type, op) a1( \
+              ::asio::detail::get_recycling_allocator< \
+                Alloc, purpose>::get(*a)); \
+        a1.deallocate(static_cast<op*>(v), 1); \
+        v = 0; \
+      } \
+    } \
+  } \
+  /**/
+
+#define ASIO_DEFINE_HANDLER_ALLOCATOR_PTR(op) \
+  ASIO_DEFINE_TAGGED_HANDLER_ALLOCATOR_PTR( \
+      ::asio::detail::thread_info_base::default_tag, op ) \
+  /**/
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_HANDLER_ALLOC_HELPERS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_cont_helpers.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_cont_helpers.hpp
new file mode 100644
index 00000000000..0abefbe5a2c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_cont_helpers.hpp
@@ -0,0 +1,45 @@
+//
+// detail/handler_cont_helpers.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_HANDLER_CONT_HELPERS_HPP
+#define ASIO_DETAIL_HANDLER_CONT_HELPERS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/handler_continuation_hook.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+// Calls to asio_handler_is_continuation must be made from a namespace that
+// does not contain overloads of this function. This namespace is defined here
+// for that purpose.
+namespace asio_handler_cont_helpers {
+
+template <typename Context>
+inline bool is_continuation(Context& context)
+{
+#if !defined(ASIO_HAS_HANDLER_HOOKS)
+  return false;
+#else
+  using asio::asio_handler_is_continuation;
+  return asio_handler_is_continuation(
+      asio::detail::addressof(context));
+#endif
+}
+
+} // namespace asio_handler_cont_helpers
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_HANDLER_CONT_HELPERS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_invoke_helpers.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_invoke_helpers.hpp
new file mode 100644
index 00000000000..5bab1b0824c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_invoke_helpers.hpp
@@ -0,0 +1,57 @@
+//
+// detail/handler_invoke_helpers.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_HANDLER_INVOKE_HELPERS_HPP
+#define ASIO_DETAIL_HANDLER_INVOKE_HELPERS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/handler_invoke_hook.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+// Calls to asio_handler_invoke must be made from a namespace that does not
+// contain overloads of this function. The asio_handler_invoke_helpers
+// namespace is defined here for that purpose.
+namespace asio_handler_invoke_helpers {
+
+template <typename Function, typename Context>
+inline void invoke(Function& function, Context& context)
+{
+#if !defined(ASIO_HAS_HANDLER_HOOKS)
+  Function tmp(function);
+  tmp();
+#else
+  using asio::asio_handler_invoke;
+  asio_handler_invoke(function, asio::detail::addressof(context));
+#endif
+}
+
+template <typename Function, typename Context>
+inline void invoke(const Function& function, Context& context)
+{
+#if !defined(ASIO_HAS_HANDLER_HOOKS)
+  Function tmp(function);
+  tmp();
+#else
+  using asio::asio_handler_invoke;
+  asio_handler_invoke(function, asio::detail::addressof(context));
+#endif
+}
+
+} // namespace asio_handler_invoke_helpers
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_HANDLER_INVOKE_HELPERS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_tracking.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_tracking.hpp
new file mode 100644
index 00000000000..d8276de2751
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_tracking.hpp
@@ -0,0 +1,238 @@
+//
+// detail/handler_tracking.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_HANDLER_TRACKING_HPP
+#define ASIO_DETAIL_HANDLER_TRACKING_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+namespace asio {
+
+class execution_context;
+
+} // namespace asio
+
+#if defined(ASIO_CUSTOM_HANDLER_TRACKING)
+# include ASIO_CUSTOM_HANDLER_TRACKING
+#elif defined(ASIO_ENABLE_HANDLER_TRACKING)
+# include "asio/error_code.hpp"
+# include "asio/detail/cstdint.hpp"
+# include "asio/detail/static_mutex.hpp"
+# include "asio/detail/tss_ptr.hpp"
+#endif // defined(ASIO_ENABLE_HANDLER_TRACKING)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_CUSTOM_HANDLER_TRACKING)
+
+// The user-specified header must define the following macros:
+// - ASIO_INHERIT_TRACKED_HANDLER
+// - ASIO_ALSO_INHERIT_TRACKED_HANDLER
+// - ASIO_HANDLER_TRACKING_INIT
+// - ASIO_HANDLER_CREATION(args)
+// - ASIO_HANDLER_COMPLETION(args)
+// - ASIO_HANDLER_INVOCATION_BEGIN(args)
+// - ASIO_HANDLER_INVOCATION_END
+// - ASIO_HANDLER_OPERATION(args)
+// - ASIO_HANDLER_REACTOR_REGISTRATION(args)
+// - ASIO_HANDLER_REACTOR_DEREGISTRATION(args)
+// - ASIO_HANDLER_REACTOR_READ_EVENT
+// - ASIO_HANDLER_REACTOR_WRITE_EVENT
+// - ASIO_HANDLER_REACTOR_ERROR_EVENT
+// - ASIO_HANDLER_REACTOR_EVENTS(args)
+// - ASIO_HANDLER_REACTOR_OPERATION(args)
+
+# if !defined(ASIO_ENABLE_HANDLER_TRACKING)
+#  define ASIO_ENABLE_HANDLER_TRACKING 1
+# endif /// !defined(ASIO_ENABLE_HANDLER_TRACKING)
+
+#elif defined(ASIO_ENABLE_HANDLER_TRACKING)
+
+class handler_tracking
+{
+public:
+  class completion;
+
+  // Base class for objects containing tracked handlers.
+  class tracked_handler
+  {
+  private:
+    // Only the handler_tracking class will have access to the id.
+    friend class handler_tracking;
+    friend class completion;
+    uint64_t id_;
+
+  protected:
+    // Constructor initialises with no id.
+    tracked_handler() : id_(0) {}
+
+    // Prevent deletion through this type.
+    ~tracked_handler() {}
+  };
+
+  // Initialise the tracking system.
+  ASIO_DECL static void init();
+
+  // Record the creation of a tracked handler.
+  ASIO_DECL static void creation(
+      execution_context& context, tracked_handler& h,
+      const char* object_type, void* object,
+      uintmax_t native_handle, const char* op_name);
+
+  class completion
+  {
+  public:
+    // Constructor records that handler is to be invoked with no arguments.
+    ASIO_DECL explicit completion(const tracked_handler& h);
+
+    // Destructor records only when an exception is thrown from the handler, or
+    // if the memory is being freed without the handler having been invoked.
+    ASIO_DECL ~completion();
+
+    // Records that handler is to be invoked with no arguments.
+    ASIO_DECL void invocation_begin();
+
+    // Records that handler is to be invoked with one arguments.
+    ASIO_DECL void invocation_begin(const asio::error_code& ec);
+
+    // Constructor records that handler is to be invoked with two arguments.
+    ASIO_DECL void invocation_begin(
+        const asio::error_code& ec, std::size_t bytes_transferred);
+
+    // Constructor records that handler is to be invoked with two arguments.
+    ASIO_DECL void invocation_begin(
+        const asio::error_code& ec, int signal_number);
+
+    // Constructor records that handler is to be invoked with two arguments.
+    ASIO_DECL void invocation_begin(
+        const asio::error_code& ec, const char* arg);
+
+    // Record that handler invocation has ended.
+    ASIO_DECL void invocation_end();
+
+  private:
+    friend class handler_tracking;
+    uint64_t id_;
+    bool invoked_;
+    completion* next_;
+  };
+
+  // Record an operation that is not directly associated with a handler.
+  ASIO_DECL static void operation(execution_context& context,
+      const char* object_type, void* object,
+      uintmax_t native_handle, const char* op_name);
+
+  // Record that a descriptor has been registered with the reactor.
+  ASIO_DECL static void reactor_registration(execution_context& context,
+      uintmax_t native_handle, uintmax_t registration);
+
+  // Record that a descriptor has been deregistered from the reactor.
+  ASIO_DECL static void reactor_deregistration(execution_context& context,
+      uintmax_t native_handle, uintmax_t registration);
+
+  // Record a reactor-based operation that is associated with a handler.
+  ASIO_DECL static void reactor_events(execution_context& context,
+      uintmax_t registration, unsigned events);
+
+  // Record a reactor-based operation that is associated with a handler.
+  ASIO_DECL static void reactor_operation(
+      const tracked_handler& h, const char* op_name,
+      const asio::error_code& ec);
+
+  // Record a reactor-based operation that is associated with a handler.
+  ASIO_DECL static void reactor_operation(
+      const tracked_handler& h, const char* op_name,
+      const asio::error_code& ec, std::size_t bytes_transferred);
+
+  // Write a line of output.
+  ASIO_DECL static void write_line(const char* format, ...);
+
+private:
+  struct tracking_state;
+  ASIO_DECL static tracking_state* get_state();
+};
+
+# define ASIO_INHERIT_TRACKED_HANDLER \
+  : public asio::detail::handler_tracking::tracked_handler
+
+# define ASIO_ALSO_INHERIT_TRACKED_HANDLER \
+  , public asio::detail::handler_tracking::tracked_handler
+
+# define ASIO_HANDLER_TRACKING_INIT \
+  asio::detail::handler_tracking::init()
+
+# define ASIO_HANDLER_CREATION(args) \
+  asio::detail::handler_tracking::creation args
+
+# define ASIO_HANDLER_COMPLETION(args) \
+  asio::detail::handler_tracking::completion tracked_completion args
+
+# define ASIO_HANDLER_INVOCATION_BEGIN(args) \
+  tracked_completion.invocation_begin args
+
+# define ASIO_HANDLER_INVOCATION_END \
+  tracked_completion.invocation_end()
+
+# define ASIO_HANDLER_OPERATION(args) \
+  asio::detail::handler_tracking::operation args
+
+# define ASIO_HANDLER_REACTOR_REGISTRATION(args) \
+  asio::detail::handler_tracking::reactor_registration args
+
+# define ASIO_HANDLER_REACTOR_DEREGISTRATION(args) \
+  asio::detail::handler_tracking::reactor_deregistration args
+
+# define ASIO_HANDLER_REACTOR_READ_EVENT 1
+# define ASIO_HANDLER_REACTOR_WRITE_EVENT 2
+# define ASIO_HANDLER_REACTOR_ERROR_EVENT 4
+
+# define ASIO_HANDLER_REACTOR_EVENTS(args) \
+  asio::detail::handler_tracking::reactor_events args
+
+# define ASIO_HANDLER_REACTOR_OPERATION(args) \
+  asio::detail::handler_tracking::reactor_operation args
+
+#else // defined(ASIO_ENABLE_HANDLER_TRACKING)
+
+# define ASIO_INHERIT_TRACKED_HANDLER
+# define ASIO_ALSO_INHERIT_TRACKED_HANDLER
+# define ASIO_HANDLER_TRACKING_INIT (void)0
+# define ASIO_HANDLER_CREATION(args) (void)0
+# define ASIO_HANDLER_COMPLETION(args) (void)0
+# define ASIO_HANDLER_INVOCATION_BEGIN(args) (void)0
+# define ASIO_HANDLER_INVOCATION_END (void)0
+# define ASIO_HANDLER_OPERATION(args) (void)0
+# define ASIO_HANDLER_REACTOR_REGISTRATION(args) (void)0
+# define ASIO_HANDLER_REACTOR_DEREGISTRATION(args) (void)0
+# define ASIO_HANDLER_REACTOR_READ_EVENT 0
+# define ASIO_HANDLER_REACTOR_WRITE_EVENT 0
+# define ASIO_HANDLER_REACTOR_ERROR_EVENT 0
+# define ASIO_HANDLER_REACTOR_EVENTS(args) (void)0
+# define ASIO_HANDLER_REACTOR_OPERATION(args) (void)0
+
+#endif // defined(ASIO_ENABLE_HANDLER_TRACKING)
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/handler_tracking.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_HANDLER_TRACKING_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_type_requirements.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_type_requirements.hpp
new file mode 100644
index 00000000000..1b941ff3982
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_type_requirements.hpp
@@ -0,0 +1,556 @@
+//
+// detail/handler_type_requirements.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_HANDLER_TYPE_REQUIREMENTS_HPP
+#define ASIO_DETAIL_HANDLER_TYPE_REQUIREMENTS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+// Older versions of gcc have difficulty compiling the sizeof expressions where
+// we test the handler type requirements. We'll disable checking of handler type
+// requirements for those compilers, but otherwise enable it by default.
+#if !defined(ASIO_DISABLE_HANDLER_TYPE_REQUIREMENTS)
+# if !defined(__GNUC__) || (__GNUC__ >= 4)
+#  define ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS 1
+# endif // !defined(__GNUC__) || (__GNUC__ >= 4)
+#endif // !defined(ASIO_DISABLE_HANDLER_TYPE_REQUIREMENTS)
+
+// With C++0x we can use a combination of enhanced SFINAE and static_assert to
+// generate better template error messages. As this technique is not yet widely
+// portable, we'll only enable it for tested compilers.
+#if !defined(ASIO_DISABLE_HANDLER_TYPE_REQUIREMENTS_ASSERT)
+# if defined(__GNUC__)
+#  if ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 5)) || (__GNUC__ > 4)
+#   if defined(__GXX_EXPERIMENTAL_CXX0X__)
+#    define ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS_ASSERT 1
+#   endif // defined(__GXX_EXPERIMENTAL_CXX0X__)
+#  endif // ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 5)) || (__GNUC__ > 4)
+# endif // defined(__GNUC__)
+# if defined(ASIO_MSVC)
+#  if (_MSC_VER >= 1600)
+#   define ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS_ASSERT 1
+#  endif // (_MSC_VER >= 1600)
+# endif // defined(ASIO_MSVC)
+# if defined(__clang__)
+#  if __has_feature(__cxx_static_assert__)
+#   define ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS_ASSERT 1
+#  endif // __has_feature(cxx_static_assert)
+# endif // defined(__clang__)
+#endif // !defined(ASIO_DISABLE_HANDLER_TYPE_REQUIREMENTS)
+
+#if defined(ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS)
+# include "asio/async_result.hpp"
+#endif // defined(ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS)
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS)
+
+# if defined(ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS_ASSERT)
+
+template <typename Handler>
+auto zero_arg_copyable_handler_test(Handler h, void*)
+  -> decltype(
+    sizeof(Handler(static_cast<const Handler&>(h))),
+    ((h)()),
+    char(0));
+
+template <typename Handler>
+char (&zero_arg_copyable_handler_test(Handler, ...))[2];
+
+template <typename Handler, typename Arg1>
+auto one_arg_handler_test(Handler h, Arg1* a1)
+  -> decltype(
+    sizeof(Handler(ASIO_MOVE_CAST(Handler)(h))),
+    ((h)(*a1)),
+    char(0));
+
+template <typename Handler>
+char (&one_arg_handler_test(Handler h, ...))[2];
+
+template <typename Handler, typename Arg1, typename Arg2>
+auto two_arg_handler_test(Handler h, Arg1* a1, Arg2* a2)
+  -> decltype(
+    sizeof(Handler(ASIO_MOVE_CAST(Handler)(h))),
+    ((h)(*a1, *a2)),
+    char(0));
+
+template <typename Handler>
+char (&two_arg_handler_test(Handler, ...))[2];
+
+template <typename Handler, typename Arg1, typename Arg2>
+auto two_arg_move_handler_test(Handler h, Arg1* a1, Arg2* a2)
+  -> decltype(
+    sizeof(Handler(ASIO_MOVE_CAST(Handler)(h))),
+    ((h)(*a1, ASIO_MOVE_CAST(Arg2)(*a2))),
+    char(0));
+
+template <typename Handler>
+char (&two_arg_move_handler_test(Handler, ...))[2];
+
+#  define ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT(expr, msg) \
+     static_assert(expr, msg);
+
+# else // defined(ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS_ASSERT)
+
+#  define ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT(expr, msg)
+
+# endif // defined(ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS_ASSERT)
+
+template <typename T> T& lvref();
+template <typename T> T& lvref(T);
+template <typename T> const T& clvref();
+template <typename T> const T& clvref(T);
+#if defined(ASIO_HAS_MOVE)
+template <typename T> T rvref();
+template <typename T> T rvref(T);
+#else // defined(ASIO_HAS_MOVE)
+template <typename T> const T& rvref();
+template <typename T> const T& rvref(T);
+#endif // defined(ASIO_HAS_MOVE)
+template <typename T> char argbyv(T);
+
+template <int>
+struct handler_type_requirements
+{
+};
+
+#define ASIO_LEGACY_COMPLETION_HANDLER_CHECK( \
+    handler_type, handler) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void()) asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::zero_arg_copyable_handler_test( \
+          asio::detail::clvref< \
+            asio_true_handler_type>(), 0)) == 1, \
+      "CompletionHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::clvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()(), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_READ_HANDLER_CHECK( \
+    handler_type, handler) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code, std::size_t)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::two_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0), \
+          static_cast<const std::size_t*>(0))) == 1, \
+      "ReadHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>(), \
+            asio::detail::lvref<const std::size_t>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_WRITE_HANDLER_CHECK( \
+    handler_type, handler) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code, std::size_t)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::two_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0), \
+          static_cast<const std::size_t*>(0))) == 1, \
+      "WriteHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>(), \
+            asio::detail::lvref<const std::size_t>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_ACCEPT_HANDLER_CHECK( \
+    handler_type, handler) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::one_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0))) == 1, \
+      "AcceptHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_MOVE_ACCEPT_HANDLER_CHECK( \
+    handler_type, handler, socket_type) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code, socket_type)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::two_arg_move_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0), \
+          static_cast<socket_type*>(0))) == 1, \
+      "MoveAcceptHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>(), \
+            asio::detail::rvref<socket_type>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_CONNECT_HANDLER_CHECK( \
+    handler_type, handler) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::one_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0))) == 1, \
+      "ConnectHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_RANGE_CONNECT_HANDLER_CHECK( \
+    handler_type, handler, endpoint_type) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code, endpoint_type)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::two_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0), \
+          static_cast<const endpoint_type*>(0))) == 1, \
+      "RangeConnectHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>(), \
+            asio::detail::lvref<const endpoint_type>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_ITERATOR_CONNECT_HANDLER_CHECK( \
+    handler_type, handler, iter_type) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code, iter_type)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::two_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0), \
+          static_cast<const iter_type*>(0))) == 1, \
+      "IteratorConnectHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>(), \
+            asio::detail::lvref<const iter_type>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_RESOLVE_HANDLER_CHECK( \
+    handler_type, handler, range_type) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code, range_type)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::two_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0), \
+          static_cast<const range_type*>(0))) == 1, \
+      "ResolveHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>(), \
+            asio::detail::lvref<const range_type>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_WAIT_HANDLER_CHECK( \
+    handler_type, handler) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::one_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0))) == 1, \
+      "WaitHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_SIGNAL_HANDLER_CHECK( \
+    handler_type, handler) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code, int)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::two_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0), \
+          static_cast<const int*>(0))) == 1, \
+      "SignalHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>(), \
+            asio::detail::lvref<const int>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_HANDSHAKE_HANDLER_CHECK( \
+    handler_type, handler) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::one_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0))) == 1, \
+      "HandshakeHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_BUFFERED_HANDSHAKE_HANDLER_CHECK( \
+    handler_type, handler) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code, std::size_t)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::two_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0), \
+          static_cast<const std::size_t*>(0))) == 1, \
+      "BufferedHandshakeHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+          asio::detail::lvref<const asio::error_code>(), \
+          asio::detail::lvref<const std::size_t>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#define ASIO_SHUTDOWN_HANDLER_CHECK( \
+    handler_type, handler) \
+  \
+  typedef ASIO_HANDLER_TYPE(handler_type, \
+      void(asio::error_code)) \
+    asio_true_handler_type; \
+  \
+  ASIO_HANDLER_TYPE_REQUIREMENTS_ASSERT( \
+      sizeof(asio::detail::one_arg_handler_test( \
+          asio::detail::rvref< \
+            asio_true_handler_type>(), \
+          static_cast<const asio::error_code*>(0))) == 1, \
+      "ShutdownHandler type requirements not met") \
+  \
+  typedef asio::detail::handler_type_requirements< \
+      sizeof( \
+        asio::detail::argbyv( \
+          asio::detail::rvref< \
+            asio_true_handler_type>())) + \
+      sizeof( \
+        asio::detail::lvref< \
+          asio_true_handler_type>()( \
+            asio::detail::lvref<const asio::error_code>()), \
+        char(0))> ASIO_UNUSED_TYPEDEF
+
+#else // !defined(ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS)
+
+#define ASIO_LEGACY_COMPLETION_HANDLER_CHECK( \
+    handler_type, handler) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_READ_HANDLER_CHECK( \
+    handler_type, handler) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_WRITE_HANDLER_CHECK( \
+    handler_type, handler) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_ACCEPT_HANDLER_CHECK( \
+    handler_type, handler) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_MOVE_ACCEPT_HANDLER_CHECK( \
+    handler_type, handler, socket_type) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_CONNECT_HANDLER_CHECK( \
+    handler_type, handler) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_RANGE_CONNECT_HANDLER_CHECK( \
+    handler_type, handler, iter_type) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_ITERATOR_CONNECT_HANDLER_CHECK( \
+    handler_type, handler, iter_type) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_RESOLVE_HANDLER_CHECK( \
+    handler_type, handler, iter_type) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_WAIT_HANDLER_CHECK( \
+    handler_type, handler) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_SIGNAL_HANDLER_CHECK( \
+    handler_type, handler) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_HANDSHAKE_HANDLER_CHECK( \
+    handler_type, handler) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_BUFFERED_HANDSHAKE_HANDLER_CHECK( \
+    handler_type, handler) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#define ASIO_SHUTDOWN_HANDLER_CHECK( \
+    handler_type, handler) \
+  typedef int ASIO_UNUSED_TYPEDEF
+
+#endif // !defined(ASIO_ENABLE_HANDLER_TYPE_REQUIREMENTS)
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_HANDLER_TYPE_REQUIREMENTS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_work.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_work.hpp
new file mode 100644
index 00000000000..02528a71fb2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/handler_work.hpp
@@ -0,0 +1,113 @@
+//
+// detail/handler_work.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_HANDLER_WORK_HPP
+#define ASIO_DETAIL_HANDLER_WORK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// A helper class template to allow completion handlers to be dispatched
+// through either the new executors framework or the old invocaton hook. The
+// primary template uses the new executors framework.
+template <typename Handler,
+    typename IoExecutor = system_executor, typename HandlerExecutor
+      = typename associated_executor<Handler, IoExecutor>::type>
+class handler_work
+{
+public:
+  explicit handler_work(Handler& handler) ASIO_NOEXCEPT
+    : io_executor_(),
+      executor_(asio::get_associated_executor(handler, io_executor_))
+  {
+  }
+
+  handler_work(Handler& handler, const IoExecutor& io_ex) ASIO_NOEXCEPT
+    : io_executor_(io_ex),
+      executor_(asio::get_associated_executor(handler, io_executor_))
+  {
+  }
+
+  static void start(Handler& handler) ASIO_NOEXCEPT
+  {
+    HandlerExecutor ex(asio::get_associated_executor(handler));
+    ex.on_work_started();
+  }
+
+  static void start(Handler& handler,
+      const IoExecutor& io_ex) ASIO_NOEXCEPT
+  {
+    HandlerExecutor ex(asio::get_associated_executor(handler, io_ex));
+    ex.on_work_started();
+    io_ex.on_work_started();
+  }
+
+  ~handler_work()
+  {
+    io_executor_.on_work_finished();
+    executor_.on_work_finished();
+  }
+
+  template <typename Function>
+  void complete(Function& function, Handler& handler)
+  {
+    executor_.dispatch(ASIO_MOVE_CAST(Function)(function),
+        asio::get_associated_allocator(handler));
+  }
+
+private:
+  // Disallow copying and assignment.
+  handler_work(const handler_work&);
+  handler_work& operator=(const handler_work&);
+
+  IoExecutor io_executor_;
+  HandlerExecutor executor_;
+};
+
+// This specialisation dispatches a handler through the old invocation hook.
+// The specialisation is not strictly required for correctness, as the
+// system_executor will dispatch through the hook anyway. However, by doing
+// this we avoid an extra copy of the handler.
+template <typename Handler>
+class handler_work<Handler, system_executor, system_executor>
+{
+public:
+  explicit handler_work(Handler&) ASIO_NOEXCEPT {}
+  static void start(Handler&) ASIO_NOEXCEPT {}
+  ~handler_work() {}
+
+  template <typename Function>
+  void complete(Function& function, Handler& handler)
+  {
+    asio_handler_invoke_helpers::invoke(function, handler);
+  }
+
+private:
+  // Disallow copying and assignment.
+  handler_work(const handler_work&);
+  handler_work& operator=(const handler_work&);
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_HANDLER_WORK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/hash_map.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/hash_map.hpp
new file mode 100644
index 00000000000..b9f9325a7b9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/hash_map.hpp
@@ -0,0 +1,331 @@
+//
+// detail/hash_map.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_HASH_MAP_HPP
+#define ASIO_DETAIL_HASH_MAP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <list>
+#include <utility>
+#include "asio/detail/assert.hpp"
+#include "asio/detail/noncopyable.hpp"
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+# include "asio/detail/socket_types.hpp"
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+inline std::size_t calculate_hash_value(int i)
+{
+  return static_cast<std::size_t>(i);
+}
+
+inline std::size_t calculate_hash_value(void* p)
+{
+  return reinterpret_cast<std::size_t>(p)
+    + (reinterpret_cast<std::size_t>(p) >> 3);
+}
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+inline std::size_t calculate_hash_value(SOCKET s)
+{
+  return static_cast<std::size_t>(s);
+}
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+// Note: assumes K and V are POD types.
+template <typename K, typename V>
+class hash_map
+  : private noncopyable
+{
+public:
+  // The type of a value in the map.
+  typedef std::pair<K, V> value_type;
+
+  // The type of a non-const iterator over the hash map.
+  typedef typename std::list<value_type>::iterator iterator;
+
+  // The type of a const iterator over the hash map.
+  typedef typename std::list<value_type>::const_iterator const_iterator;
+
+  // Constructor.
+  hash_map()
+    : size_(0),
+      buckets_(0),
+      num_buckets_(0)
+  {
+  }
+
+  // Destructor.
+  ~hash_map()
+  {
+    delete[] buckets_;
+  }
+
+  // Get an iterator for the beginning of the map.
+  iterator begin()
+  {
+    return values_.begin();
+  }
+
+  // Get an iterator for the beginning of the map.
+  const_iterator begin() const
+  {
+    return values_.begin();
+  }
+
+  // Get an iterator for the end of the map.
+  iterator end()
+  {
+    return values_.end();
+  }
+
+  // Get an iterator for the end of the map.
+  const_iterator end() const
+  {
+    return values_.end();
+  }
+
+  // Check whether the map is empty.
+  bool empty() const
+  {
+    return values_.empty();
+  }
+
+  // Find an entry in the map.
+  iterator find(const K& k)
+  {
+    if (num_buckets_)
+    {
+      size_t bucket = calculate_hash_value(k) % num_buckets_;
+      iterator it = buckets_[bucket].first;
+      if (it == values_.end())
+        return values_.end();
+      iterator end_it = buckets_[bucket].last;
+      ++end_it;
+      while (it != end_it)
+      {
+        if (it->first == k)
+          return it;
+        ++it;
+      }
+    }
+    return values_.end();
+  }
+
+  // Find an entry in the map.
+  const_iterator find(const K& k) const
+  {
+    if (num_buckets_)
+    {
+      size_t bucket = calculate_hash_value(k) % num_buckets_;
+      const_iterator it = buckets_[bucket].first;
+      if (it == values_.end())
+        return it;
+      const_iterator end_it = buckets_[bucket].last;
+      ++end_it;
+      while (it != end_it)
+      {
+        if (it->first == k)
+          return it;
+        ++it;
+      }
+    }
+    return values_.end();
+  }
+
+  // Insert a new entry into the map.
+  std::pair<iterator, bool> insert(const value_type& v)
+  {
+    if (size_ + 1 >= num_buckets_)
+      rehash(hash_size(size_ + 1));
+    size_t bucket = calculate_hash_value(v.first) % num_buckets_;
+    iterator it = buckets_[bucket].first;
+    if (it == values_.end())
+    {
+      buckets_[bucket].first = buckets_[bucket].last =
+        values_insert(values_.end(), v);
+      ++size_;
+      return std::pair<iterator, bool>(buckets_[bucket].last, true);
+    }
+    iterator end_it = buckets_[bucket].last;
+    ++end_it;
+    while (it != end_it)
+    {
+      if (it->first == v.first)
+        return std::pair<iterator, bool>(it, false);
+      ++it;
+    }
+    buckets_[bucket].last = values_insert(end_it, v);
+    ++size_;
+    return std::pair<iterator, bool>(buckets_[bucket].last, true);
+  }
+
+  // Erase an entry from the map.
+  void erase(iterator it)
+  {
+    ASIO_ASSERT(it != values_.end());
+    ASIO_ASSERT(num_buckets_ != 0);
+
+    size_t bucket = calculate_hash_value(it->first) % num_buckets_;
+    bool is_first = (it == buckets_[bucket].first);
+    bool is_last = (it == buckets_[bucket].last);
+    if (is_first && is_last)
+      buckets_[bucket].first = buckets_[bucket].last = values_.end();
+    else if (is_first)
+      ++buckets_[bucket].first;
+    else if (is_last)
+      --buckets_[bucket].last;
+
+    values_erase(it);
+    --size_;
+  }
+
+  // Erase a key from the map.
+  void erase(const K& k)
+  {
+    iterator it = find(k);
+    if (it != values_.end())
+      erase(it);
+  }
+
+  // Remove all entries from the map.
+  void clear()
+  {
+    // Clear the values.
+    values_.clear();
+    size_ = 0;
+
+    // Initialise all buckets to empty.
+    iterator end_it = values_.end();
+    for (size_t i = 0; i < num_buckets_; ++i)
+      buckets_[i].first = buckets_[i].last = end_it;
+  }
+
+private:
+  // Calculate the hash size for the specified number of elements.
+  static std::size_t hash_size(std::size_t num_elems)
+  {
+    static std::size_t sizes[] =
+    {
+#if defined(ASIO_HASH_MAP_BUCKETS)
+      ASIO_HASH_MAP_BUCKETS
+#else // ASIO_HASH_MAP_BUCKETS
+      3, 13, 23, 53, 97, 193, 389, 769, 1543, 3079, 6151, 12289, 24593,
+      49157, 98317, 196613, 393241, 786433, 1572869, 3145739, 6291469,
+      12582917, 25165843
+#endif // ASIO_HASH_MAP_BUCKETS
+    };
+    const std::size_t nth_size = sizeof(sizes) / sizeof(std::size_t) - 1;
+    for (std::size_t i = 0; i < nth_size; ++i)
+      if (num_elems < sizes[i])
+        return sizes[i];
+    return sizes[nth_size];
+  }
+
+  // Re-initialise the hash from the values already contained in the list.
+  void rehash(std::size_t num_buckets)
+  {
+    if (num_buckets == num_buckets_)
+      return;
+    ASIO_ASSERT(num_buckets != 0);
+
+    iterator end_iter = values_.end();
+
+    // Update number of buckets and initialise all buckets to empty.
+    bucket_type* tmp = new bucket_type[num_buckets];
+    delete[] buckets_;
+    buckets_ = tmp;
+    num_buckets_ = num_buckets;
+    for (std::size_t i = 0; i < num_buckets_; ++i)
+      buckets_[i].first = buckets_[i].last = end_iter;
+
+    // Put all values back into the hash.
+    iterator iter = values_.begin();
+    while (iter != end_iter)
+    {
+      std::size_t bucket = calculate_hash_value(iter->first) % num_buckets_;
+      if (buckets_[bucket].last == end_iter)
+      {
+        buckets_[bucket].first = buckets_[bucket].last = iter++;
+      }
+      else if (++buckets_[bucket].last == iter)
+      {
+        ++iter;
+      }
+      else
+      {
+        values_.splice(buckets_[bucket].last, values_, iter++);
+        --buckets_[bucket].last;
+      }
+    }
+  }
+
+  // Insert an element into the values list by splicing from the spares list,
+  // if a spare is available, and otherwise by inserting a new element.
+  iterator values_insert(iterator it, const value_type& v)
+  {
+    if (spares_.empty())
+    {
+      return values_.insert(it, v);
+    }
+    else
+    {
+      spares_.front() = v;
+      values_.splice(it, spares_, spares_.begin());
+      return --it;
+    }
+  }
+
+  // Erase an element from the values list by splicing it to the spares list.
+  void values_erase(iterator it)
+  {
+    *it = value_type();
+    spares_.splice(spares_.begin(), values_, it);
+  }
+
+  // The number of elements in the hash.
+  std::size_t size_;
+
+  // The list of all values in the hash map.
+  std::list<value_type> values_;
+
+  // The list of spare nodes waiting to be recycled. Assumes that POD types only
+  // are stored in the hash map.
+  std::list<value_type> spares_;
+
+  // The type for a bucket in the hash table.
+  struct bucket_type
+  {
+    iterator first;
+    iterator last;
+  };
+
+  // The buckets in the hash.
+  bucket_type* buckets_;
+
+  // The number of buckets in the hash.
+  std::size_t num_buckets_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_HASH_MAP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/dev_poll_reactor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/dev_poll_reactor.hpp
new file mode 100644
index 00000000000..6cee8e21994
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/dev_poll_reactor.hpp
@@ -0,0 +1,91 @@
+//
+// detail/impl/dev_poll_reactor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IMPL_DEV_POLL_REACTOR_HPP
+#define ASIO_DETAIL_IMPL_DEV_POLL_REACTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_DEV_POLL)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Time_Traits>
+void dev_poll_reactor::add_timer_queue(timer_queue<Time_Traits>& queue)
+{
+  do_add_timer_queue(queue);
+}
+
+template <typename Time_Traits>
+void dev_poll_reactor::remove_timer_queue(timer_queue<Time_Traits>& queue)
+{
+  do_remove_timer_queue(queue);
+}
+
+template <typename Time_Traits>
+void dev_poll_reactor::schedule_timer(timer_queue<Time_Traits>& queue,
+    const typename Time_Traits::time_type& time,
+    typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op)
+{
+  asio::detail::mutex::scoped_lock lock(mutex_);
+
+  if (shutdown_)
+  {
+    scheduler_.post_immediate_completion(op, false);
+    return;
+  }
+
+  bool earliest = queue.enqueue_timer(time, timer, op);
+  scheduler_.work_started();
+  if (earliest)
+    interrupter_.interrupt();
+}
+
+template <typename Time_Traits>
+std::size_t dev_poll_reactor::cancel_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& timer,
+    std::size_t max_cancelled)
+{
+  asio::detail::mutex::scoped_lock lock(mutex_);
+  op_queue<operation> ops;
+  std::size_t n = queue.cancel_timer(timer, ops, max_cancelled);
+  lock.unlock();
+  scheduler_.post_deferred_completions(ops);
+  return n;
+}
+
+template <typename Time_Traits>
+void dev_poll_reactor::move_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& target,
+    typename timer_queue<Time_Traits>::per_timer_data& source)
+{
+  asio::detail::mutex::scoped_lock lock(mutex_);
+  op_queue<operation> ops;
+  queue.cancel_timer(target, ops);
+  queue.move_timer(target, source);
+  lock.unlock();
+  scheduler_.post_deferred_completions(ops);
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_DEV_POLL)
+
+#endif // ASIO_DETAIL_IMPL_DEV_POLL_REACTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/epoll_reactor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/epoll_reactor.hpp
new file mode 100644
index 00000000000..ddfcb5e2b34
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/epoll_reactor.hpp
@@ -0,0 +1,89 @@
+//
+// detail/impl/epoll_reactor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IMPL_EPOLL_REACTOR_HPP
+#define ASIO_DETAIL_IMPL_EPOLL_REACTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#if defined(ASIO_HAS_EPOLL)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Time_Traits>
+void epoll_reactor::add_timer_queue(timer_queue<Time_Traits>& queue)
+{
+  do_add_timer_queue(queue);
+}
+
+template <typename Time_Traits>
+void epoll_reactor::remove_timer_queue(timer_queue<Time_Traits>& queue)
+{
+  do_remove_timer_queue(queue);
+}
+
+template <typename Time_Traits>
+void epoll_reactor::schedule_timer(timer_queue<Time_Traits>& queue,
+    const typename Time_Traits::time_type& time,
+    typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op)
+{
+  mutex::scoped_lock lock(mutex_);
+
+  if (shutdown_)
+  {
+    scheduler_.post_immediate_completion(op, false);
+    return;
+  }
+
+  bool earliest = queue.enqueue_timer(time, timer, op);
+  scheduler_.work_started();
+  if (earliest)
+    update_timeout();
+}
+
+template <typename Time_Traits>
+std::size_t epoll_reactor::cancel_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& timer,
+    std::size_t max_cancelled)
+{
+  mutex::scoped_lock lock(mutex_);
+  op_queue<operation> ops;
+  std::size_t n = queue.cancel_timer(timer, ops, max_cancelled);
+  lock.unlock();
+  scheduler_.post_deferred_completions(ops);
+  return n;
+}
+
+template <typename Time_Traits>
+void epoll_reactor::move_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& target,
+    typename timer_queue<Time_Traits>::per_timer_data& source)
+{
+  mutex::scoped_lock lock(mutex_);
+  op_queue<operation> ops;
+  queue.cancel_timer(target, ops);
+  queue.move_timer(target, source);
+  lock.unlock();
+  scheduler_.post_deferred_completions(ops);
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_EPOLL)
+
+#endif // ASIO_DETAIL_IMPL_EPOLL_REACTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/kqueue_reactor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/kqueue_reactor.hpp
new file mode 100644
index 00000000000..3028ebb22d0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/kqueue_reactor.hpp
@@ -0,0 +1,93 @@
+//
+// detail/impl/kqueue_reactor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2005 Stefan Arentz (stefan at soze dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IMPL_KQUEUE_REACTOR_HPP
+#define ASIO_DETAIL_IMPL_KQUEUE_REACTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_KQUEUE)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Time_Traits>
+void kqueue_reactor::add_timer_queue(timer_queue<Time_Traits>& queue)
+{
+  do_add_timer_queue(queue);
+}
+
+// Remove a timer queue from the reactor.
+template <typename Time_Traits>
+void kqueue_reactor::remove_timer_queue(timer_queue<Time_Traits>& queue)
+{
+  do_remove_timer_queue(queue);
+}
+
+template <typename Time_Traits>
+void kqueue_reactor::schedule_timer(timer_queue<Time_Traits>& queue,
+    const typename Time_Traits::time_type& time,
+    typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op)
+{
+  mutex::scoped_lock lock(mutex_);
+
+  if (shutdown_)
+  {
+    scheduler_.post_immediate_completion(op, false);
+    return;
+  }
+
+  bool earliest = queue.enqueue_timer(time, timer, op);
+  scheduler_.work_started();
+  if (earliest)
+    interrupt();
+}
+
+template <typename Time_Traits>
+std::size_t kqueue_reactor::cancel_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& timer,
+    std::size_t max_cancelled)
+{
+  mutex::scoped_lock lock(mutex_);
+  op_queue<operation> ops;
+  std::size_t n = queue.cancel_timer(timer, ops, max_cancelled);
+  lock.unlock();
+  scheduler_.post_deferred_completions(ops);
+  return n;
+}
+
+template <typename Time_Traits>
+void kqueue_reactor::move_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& target,
+    typename timer_queue<Time_Traits>::per_timer_data& source)
+{
+  mutex::scoped_lock lock(mutex_);
+  op_queue<operation> ops;
+  queue.cancel_timer(target, ops);
+  queue.move_timer(target, source);
+  lock.unlock();
+  scheduler_.post_deferred_completions(ops);
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_KQUEUE)
+
+#endif // ASIO_DETAIL_IMPL_KQUEUE_REACTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/select_reactor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/select_reactor.hpp
new file mode 100644
index 00000000000..46f9cef5a06
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/select_reactor.hpp
@@ -0,0 +1,100 @@
+//
+// detail/impl/select_reactor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IMPL_SELECT_REACTOR_HPP
+#define ASIO_DETAIL_IMPL_SELECT_REACTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP) \
+  || (!defined(ASIO_HAS_DEV_POLL) \
+      && !defined(ASIO_HAS_EPOLL) \
+      && !defined(ASIO_HAS_KQUEUE) \
+      && !defined(ASIO_WINDOWS_RUNTIME))
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Time_Traits>
+void select_reactor::add_timer_queue(timer_queue<Time_Traits>& queue)
+{
+  do_add_timer_queue(queue);
+}
+
+// Remove a timer queue from the reactor.
+template <typename Time_Traits>
+void select_reactor::remove_timer_queue(timer_queue<Time_Traits>& queue)
+{
+  do_remove_timer_queue(queue);
+}
+
+template <typename Time_Traits>
+void select_reactor::schedule_timer(timer_queue<Time_Traits>& queue,
+    const typename Time_Traits::time_type& time,
+    typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op)
+{
+  asio::detail::mutex::scoped_lock lock(mutex_);
+
+  if (shutdown_)
+  {
+    scheduler_.post_immediate_completion(op, false);
+    return;
+  }
+
+  bool earliest = queue.enqueue_timer(time, timer, op);
+  scheduler_.work_started();
+  if (earliest)
+    interrupter_.interrupt();
+}
+
+template <typename Time_Traits>
+std::size_t select_reactor::cancel_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& timer,
+    std::size_t max_cancelled)
+{
+  asio::detail::mutex::scoped_lock lock(mutex_);
+  op_queue<operation> ops;
+  std::size_t n = queue.cancel_timer(timer, ops, max_cancelled);
+  lock.unlock();
+  scheduler_.post_deferred_completions(ops);
+  return n;
+}
+
+template <typename Time_Traits>
+void select_reactor::move_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& target,
+    typename timer_queue<Time_Traits>::per_timer_data& source)
+{
+  asio::detail::mutex::scoped_lock lock(mutex_);
+  op_queue<operation> ops;
+  queue.cancel_timer(target, ops);
+  queue.move_timer(target, source);
+  lock.unlock();
+  scheduler_.post_deferred_completions(ops);
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+       //   || (!defined(ASIO_HAS_DEV_POLL)
+       //       && !defined(ASIO_HAS_EPOLL)
+       //       && !defined(ASIO_HAS_KQUEUE)
+       //       && !defined(ASIO_WINDOWS_RUNTIME))
+
+#endif // ASIO_DETAIL_IMPL_SELECT_REACTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/service_registry.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/service_registry.hpp
new file mode 100644
index 00000000000..2fac89dd9df
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/service_registry.hpp
@@ -0,0 +1,94 @@
+//
+// detail/impl/service_registry.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IMPL_SERVICE_REGISTRY_HPP
+#define ASIO_DETAIL_IMPL_SERVICE_REGISTRY_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Service>
+Service& service_registry::use_service()
+{
+  execution_context::service::key key;
+  init_key<Service>(key, 0);
+  factory_type factory = &service_registry::create<Service, execution_context>;
+  return *static_cast<Service*>(do_use_service(key, factory, &owner_));
+}
+
+template <typename Service>
+Service& service_registry::use_service(io_context& owner)
+{
+  execution_context::service::key key;
+  init_key<Service>(key, 0);
+  factory_type factory = &service_registry::create<Service, io_context>;
+  return *static_cast<Service*>(do_use_service(key, factory, &owner));
+}
+
+template <typename Service>
+void service_registry::add_service(Service* new_service)
+{
+  execution_context::service::key key;
+  init_key<Service>(key, 0);
+  return do_add_service(key, new_service);
+}
+
+template <typename Service>
+bool service_registry::has_service() const
+{
+  execution_context::service::key key;
+  init_key<Service>(key, 0);
+  return do_has_service(key);
+}
+
+template <typename Service>
+inline void service_registry::init_key(
+    execution_context::service::key& key, ...)
+{
+  init_key_from_id(key, Service::id);
+}
+
+#if !defined(ASIO_NO_TYPEID)
+template <typename Service>
+void service_registry::init_key(execution_context::service::key& key,
+    typename enable_if<
+      is_base_of<typename Service::key_type, Service>::value>::type*)
+{
+  key.type_info_ = &typeid(typeid_wrapper<Service>);
+  key.id_ = 0;
+}
+
+template <typename Service>
+void service_registry::init_key_from_id(execution_context::service::key& key,
+    const service_id<Service>& /*id*/)
+{
+  key.type_info_ = &typeid(typeid_wrapper<Service>);
+  key.id_ = 0;
+}
+#endif // !defined(ASIO_NO_TYPEID)
+
+template <typename Service, typename Owner>
+execution_context::service* service_registry::create(void* owner)
+{
+  return new Service(*static_cast<Owner*>(owner));
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_IMPL_SERVICE_REGISTRY_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/strand_executor_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/strand_executor_service.hpp
new file mode 100644
index 00000000000..3282f201581
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/strand_executor_service.hpp
@@ -0,0 +1,179 @@
+//
+// detail/impl/strand_executor_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IMPL_STRAND_EXECUTOR_SERVICE_HPP
+#define ASIO_DETAIL_IMPL_STRAND_EXECUTOR_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/call_stack.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/recycling_allocator.hpp"
+#include "asio/executor_work_guard.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Executor>
+class strand_executor_service::invoker
+{
+public:
+  invoker(const implementation_type& impl, Executor& ex)
+    : impl_(impl),
+      work_(ex)
+  {
+  }
+
+  invoker(const invoker& other)
+    : impl_(other.impl_),
+      work_(other.work_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  invoker(invoker&& other)
+    : impl_(ASIO_MOVE_CAST(implementation_type)(other.impl_)),
+      work_(ASIO_MOVE_CAST(executor_work_guard<Executor>)(other.work_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  struct on_invoker_exit
+  {
+    invoker* this_;
+
+    ~on_invoker_exit()
+    {
+      this_->impl_->mutex_->lock();
+      this_->impl_->ready_queue_.push(this_->impl_->waiting_queue_);
+      bool more_handlers = this_->impl_->locked_ =
+        !this_->impl_->ready_queue_.empty();
+      this_->impl_->mutex_->unlock();
+
+      if (more_handlers)
+      {
+        Executor ex(this_->work_.get_executor());
+        recycling_allocator<void> allocator;
+        ex.post(ASIO_MOVE_CAST(invoker)(*this_), allocator);
+      }
+    }
+  };
+
+  void operator()()
+  {
+    // Indicate that this strand is executing on the current thread.
+    call_stack<strand_impl>::context ctx(impl_.get());
+
+    // Ensure the next handler, if any, is scheduled on block exit.
+    on_invoker_exit on_exit = { this };
+    (void)on_exit;
+
+    // Run all ready handlers. No lock is required since the ready queue is
+    // accessed only within the strand.
+    asio::error_code ec;
+    while (scheduler_operation* o = impl_->ready_queue_.front())
+    {
+      impl_->ready_queue_.pop();
+      o->complete(impl_.get(), ec, 0);
+    }
+  }
+
+private:
+  implementation_type impl_;
+  executor_work_guard<Executor> work_;
+};
+
+template <typename Executor, typename Function, typename Allocator>
+void strand_executor_service::dispatch(const implementation_type& impl,
+    Executor& ex, ASIO_MOVE_ARG(Function) function, const Allocator& a)
+{
+  typedef typename decay<Function>::type function_type;
+
+  // If we are already in the strand then the function can run immediately.
+  if (call_stack<strand_impl>::contains(impl.get()))
+  {
+    // Make a local, non-const copy of the function.
+    function_type tmp(ASIO_MOVE_CAST(Function)(function));
+
+    fenced_block b(fenced_block::full);
+    asio_handler_invoke_helpers::invoke(tmp, tmp);
+    return;
+  }
+
+  // Allocate and construct an operation to wrap the function.
+  typedef executor_op<function_type, Allocator> op;
+  typename op::ptr p = { detail::addressof(a), op::ptr::allocate(a), 0 };
+  p.p = new (p.v) op(ASIO_MOVE_CAST(Function)(function), a);
+
+  ASIO_HANDLER_CREATION((impl->service_->context(), *p.p,
+        "strand_executor", impl.get(), 0, "dispatch"));
+
+  // Add the function to the strand and schedule the strand if required.
+  bool first = enqueue(impl, p.p);
+  p.v = p.p = 0;
+  if (first)
+    ex.dispatch(invoker<Executor>(impl, ex), a);
+}
+
+// Request invocation of the given function and return immediately.
+template <typename Executor, typename Function, typename Allocator>
+void strand_executor_service::post(const implementation_type& impl,
+    Executor& ex, ASIO_MOVE_ARG(Function) function, const Allocator& a)
+{
+  typedef typename decay<Function>::type function_type;
+
+  // Allocate and construct an operation to wrap the function.
+  typedef executor_op<function_type, Allocator> op;
+  typename op::ptr p = { detail::addressof(a), op::ptr::allocate(a), 0 };
+  p.p = new (p.v) op(ASIO_MOVE_CAST(Function)(function), a);
+
+  ASIO_HANDLER_CREATION((impl->service_->context(), *p.p,
+        "strand_executor", impl.get(), 0, "post"));
+
+  // Add the function to the strand and schedule the strand if required.
+  bool first = enqueue(impl, p.p);
+  p.v = p.p = 0;
+  if (first)
+    ex.post(invoker<Executor>(impl, ex), a);
+}
+
+// Request invocation of the given function and return immediately.
+template <typename Executor, typename Function, typename Allocator>
+void strand_executor_service::defer(const implementation_type& impl,
+    Executor& ex, ASIO_MOVE_ARG(Function) function, const Allocator& a)
+{
+  typedef typename decay<Function>::type function_type;
+
+  // Allocate and construct an operation to wrap the function.
+  typedef executor_op<function_type, Allocator> op;
+  typename op::ptr p = { detail::addressof(a), op::ptr::allocate(a), 0 };
+  p.p = new (p.v) op(ASIO_MOVE_CAST(Function)(function), a);
+
+  ASIO_HANDLER_CREATION((impl->service_->context(), *p.p,
+        "strand_executor", impl.get(), 0, "defer"));
+
+  // Add the function to the strand and schedule the strand if required.
+  bool first = enqueue(impl, p.p);
+  p.v = p.p = 0;
+  if (first)
+    ex.defer(invoker<Executor>(impl, ex), a);
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_IMPL_STRAND_EXECUTOR_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/strand_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/strand_service.hpp
new file mode 100644
index 00000000000..e873698bbe9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/strand_service.hpp
@@ -0,0 +1,118 @@
+//
+// detail/impl/strand_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IMPL_STRAND_SERVICE_HPP
+#define ASIO_DETAIL_IMPL_STRAND_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/call_stack.hpp"
+#include "asio/detail/completion_handler.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+inline strand_service::strand_impl::strand_impl()
+  : operation(&strand_service::do_complete),
+    locked_(false)
+{
+}
+
+struct strand_service::on_dispatch_exit
+{
+  io_context_impl* io_context_;
+  strand_impl* impl_;
+
+  ~on_dispatch_exit()
+  {
+    impl_->mutex_.lock();
+    impl_->ready_queue_.push(impl_->waiting_queue_);
+    bool more_handlers = impl_->locked_ = !impl_->ready_queue_.empty();
+    impl_->mutex_.unlock();
+
+    if (more_handlers)
+      io_context_->post_immediate_completion(impl_, false);
+  }
+};
+
+template <typename Handler>
+void strand_service::dispatch(strand_service::implementation_type& impl,
+    Handler& handler)
+{
+  // If we are already in the strand then the handler can run immediately.
+  if (call_stack<strand_impl>::contains(impl))
+  {
+    fenced_block b(fenced_block::full);
+    asio_handler_invoke_helpers::invoke(handler, handler);
+    return;
+  }
+
+  // Allocate and construct an operation to wrap the handler.
+  typedef completion_handler<Handler> op;
+  typename op::ptr p = { asio::detail::addressof(handler),
+    op::ptr::allocate(handler), 0 };
+  p.p = new (p.v) op(handler);
+
+  ASIO_HANDLER_CREATION((this->context(),
+        *p.p, "strand", impl, 0, "dispatch"));
+
+  bool dispatch_immediately = do_dispatch(impl, p.p);
+  operation* o = p.p;
+  p.v = p.p = 0;
+
+  if (dispatch_immediately)
+  {
+    // Indicate that this strand is executing on the current thread.
+    call_stack<strand_impl>::context ctx(impl);
+
+    // Ensure the next handler, if any, is scheduled on block exit.
+    on_dispatch_exit on_exit = { &io_context_, impl };
+    (void)on_exit;
+
+    completion_handler<Handler>::do_complete(
+        &io_context_, o, asio::error_code(), 0);
+  }
+}
+
+// Request the io_context to invoke the given handler and return immediately.
+template <typename Handler>
+void strand_service::post(strand_service::implementation_type& impl,
+    Handler& handler)
+{
+  bool is_continuation =
+    asio_handler_cont_helpers::is_continuation(handler);
+
+  // Allocate and construct an operation to wrap the handler.
+  typedef completion_handler<Handler> op;
+  typename op::ptr p = { asio::detail::addressof(handler),
+    op::ptr::allocate(handler), 0 };
+  p.p = new (p.v) op(handler);
+
+  ASIO_HANDLER_CREATION((this->context(),
+        *p.p, "strand", impl, 0, "post"));
+
+  do_post(impl, p.p, is_continuation);
+  p.v = p.p = 0;
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_IMPL_STRAND_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/win_iocp_io_context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/win_iocp_io_context.hpp
new file mode 100644
index 00000000000..1a60c6c4677
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/win_iocp_io_context.hpp
@@ -0,0 +1,103 @@
+//
+// detail/impl/win_iocp_io_context.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IMPL_WIN_IOCP_IO_CONTEXT_HPP
+#define ASIO_DETAIL_IMPL_WIN_IOCP_IO_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/completion_handler.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Time_Traits>
+void win_iocp_io_context::add_timer_queue(
+    timer_queue<Time_Traits>& queue)
+{
+  do_add_timer_queue(queue);
+}
+
+template <typename Time_Traits>
+void win_iocp_io_context::remove_timer_queue(
+    timer_queue<Time_Traits>& queue)
+{
+  do_remove_timer_queue(queue);
+}
+
+template <typename Time_Traits>
+void win_iocp_io_context::schedule_timer(timer_queue<Time_Traits>& queue,
+    const typename Time_Traits::time_type& time,
+    typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op)
+{
+  // If the service has been shut down we silently discard the timer.
+  if (::InterlockedExchangeAdd(&shutdown_, 0) != 0)
+  {
+    post_immediate_completion(op, false);
+    return;
+  }
+
+  mutex::scoped_lock lock(dispatch_mutex_);
+
+  bool earliest = queue.enqueue_timer(time, timer, op);
+  work_started();
+  if (earliest)
+    update_timeout();
+}
+
+template <typename Time_Traits>
+std::size_t win_iocp_io_context::cancel_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& timer,
+    std::size_t max_cancelled)
+{
+  // If the service has been shut down we silently ignore the cancellation.
+  if (::InterlockedExchangeAdd(&shutdown_, 0) != 0)
+    return 0;
+
+  mutex::scoped_lock lock(dispatch_mutex_);
+  op_queue<win_iocp_operation> ops;
+  std::size_t n = queue.cancel_timer(timer, ops, max_cancelled);
+  post_deferred_completions(ops);
+  return n;
+}
+
+template <typename Time_Traits>
+void win_iocp_io_context::move_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& to,
+    typename timer_queue<Time_Traits>::per_timer_data& from)
+{
+  asio::detail::mutex::scoped_lock lock(dispatch_mutex_);
+  op_queue<operation> ops;
+  queue.cancel_timer(to, ops);
+  queue.move_timer(to, from);
+  lock.unlock();
+  post_deferred_completions(ops);
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_IMPL_WIN_IOCP_IO_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/winrt_timer_scheduler.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/winrt_timer_scheduler.hpp
new file mode 100644
index 00000000000..9805e2fd446
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/impl/winrt_timer_scheduler.hpp
@@ -0,0 +1,92 @@
+//
+// detail/impl/winrt_timer_scheduler.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IMPL_WINRT_TIMER_SCHEDULER_HPP
+#define ASIO_DETAIL_IMPL_WINRT_TIMER_SCHEDULER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Time_Traits>
+void winrt_timer_scheduler::add_timer_queue(timer_queue<Time_Traits>& queue)
+{
+  do_add_timer_queue(queue);
+}
+
+// Remove a timer queue from the reactor.
+template <typename Time_Traits>
+void winrt_timer_scheduler::remove_timer_queue(timer_queue<Time_Traits>& queue)
+{
+  do_remove_timer_queue(queue);
+}
+
+template <typename Time_Traits>
+void winrt_timer_scheduler::schedule_timer(timer_queue<Time_Traits>& queue,
+    const typename Time_Traits::time_type& time,
+    typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op)
+{
+  asio::detail::mutex::scoped_lock lock(mutex_);
+
+  if (shutdown_)
+  {
+    scheduler_.post_immediate_completion(op, false);
+    return;
+  }
+
+  bool earliest = queue.enqueue_timer(time, timer, op);
+  scheduler_.work_started();
+  if (earliest)
+    event_.signal(lock);
+}
+
+template <typename Time_Traits>
+std::size_t winrt_timer_scheduler::cancel_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& timer,
+    std::size_t max_cancelled)
+{
+  asio::detail::mutex::scoped_lock lock(mutex_);
+  op_queue<operation> ops;
+  std::size_t n = queue.cancel_timer(timer, ops, max_cancelled);
+  lock.unlock();
+  scheduler_.post_deferred_completions(ops);
+  return n;
+}
+
+template <typename Time_Traits>
+void winrt_timer_scheduler::move_timer(timer_queue<Time_Traits>& queue,
+    typename timer_queue<Time_Traits>::per_timer_data& to,
+    typename timer_queue<Time_Traits>::per_timer_data& from)
+{
+  asio::detail::mutex::scoped_lock lock(mutex_);
+  op_queue<operation> ops;
+  queue.cancel_timer(to, ops);
+  queue.move_timer(to, from);
+  lock.unlock();
+  scheduler_.post_deferred_completions(ops);
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_IMPL_WINRT_TIMER_SCHEDULER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/io_control.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/io_control.hpp
new file mode 100644
index 00000000000..95b5fedab6a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/io_control.hpp
@@ -0,0 +1,84 @@
+//
+// detail/io_control.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IO_CONTROL_HPP
+#define ASIO_DETAIL_IO_CONTROL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+namespace io_control {
+
+// I/O control command for getting number of bytes available.
+class bytes_readable
+{
+public:
+  // Default constructor.
+  bytes_readable()
+    : value_(0)
+  {
+  }
+
+  // Construct with a specific command value.
+  bytes_readable(std::size_t value)
+    : value_(static_cast<detail::ioctl_arg_type>(value))
+  {
+  }
+
+  // Get the name of the IO control command.
+  int name() const
+  {
+    return static_cast<int>(ASIO_OS_DEF(FIONREAD));
+  }
+
+  // Set the value of the I/O control command.
+  void set(std::size_t value)
+  {
+    value_ = static_cast<detail::ioctl_arg_type>(value);
+  }
+
+  // Get the current value of the I/O control command.
+  std::size_t get() const
+  {
+    return static_cast<std::size_t>(value_);
+  }
+
+  // Get the address of the command data.
+  detail::ioctl_arg_type* data()
+  {
+    return &value_;
+  }
+
+  // Get the address of the command data.
+  const detail::ioctl_arg_type* data() const
+  {
+    return &value_;
+  }
+
+private:
+  detail::ioctl_arg_type value_;
+};
+
+} // namespace io_control
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_IO_CONTROL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/io_object_executor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/io_object_executor.hpp
new file mode 100644
index 00000000000..6ddadf23c97
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/io_object_executor.hpp
@@ -0,0 +1,167 @@
+//
+// io_object_executor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IO_OBJECT_EXECUTOR_HPP
+#define ASIO_DETAIL_IO_OBJECT_EXECUTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/io_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Wrap the (potentially polymorphic) executor so that we can bypass it when
+// dispatching on a target executor that has a native I/O implementation.
+template <typename Executor>
+class io_object_executor
+{
+public:
+  io_object_executor(const Executor& ex,
+      bool native_implementation) ASIO_NOEXCEPT
+    : executor_(ex),
+      has_native_impl_(native_implementation)
+  {
+  }
+
+  io_object_executor(const io_object_executor& other) ASIO_NOEXCEPT
+    : executor_(other.executor_),
+      has_native_impl_(other.has_native_impl_)
+  {
+  }
+
+  template <typename Executor1>
+  io_object_executor(
+      const io_object_executor<Executor1>& other) ASIO_NOEXCEPT
+    : executor_(other.inner_executor()),
+      has_native_impl_(other.has_native_implementation())
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  io_object_executor(io_object_executor&& other) ASIO_NOEXCEPT
+    : executor_(ASIO_MOVE_CAST(Executor)(other.executor_)),
+      has_native_impl_(other.has_native_impl_)
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  const Executor& inner_executor() const ASIO_NOEXCEPT
+  {
+    return executor_;
+  }
+
+  bool has_native_implementation() const ASIO_NOEXCEPT
+  {
+    return has_native_impl_;
+  }
+
+  execution_context& context() const ASIO_NOEXCEPT
+  {
+    return executor_.context();
+  }
+
+  void on_work_started() const ASIO_NOEXCEPT
+  {
+    if (is_same<Executor, io_context::executor_type>::value
+        || has_native_impl_)
+    {
+      // When using a native implementation, work is already counted by the
+      // execution context.
+    }
+    else
+    {
+      executor_.on_work_started();
+    }
+  }
+
+  void on_work_finished() const ASIO_NOEXCEPT
+  {
+    if (is_same<Executor, io_context::executor_type>::value
+        || has_native_impl_)
+    {
+      // When using a native implementation, work is already counted by the
+      // execution context.
+    }
+    else
+    {
+      executor_.on_work_finished();
+    }
+  }
+
+  template <typename F, typename A>
+  void dispatch(ASIO_MOVE_ARG(F) f, const A& a) const
+  {
+    if (is_same<Executor, io_context::executor_type>::value
+        || has_native_impl_)
+    {
+      // When using a native implementation, I/O completion handlers are
+      // already dispatched according to the execution context's executor's
+      // rules. We can call the function directly.
+#if defined(ASIO_HAS_MOVE)
+      if (is_same<F, typename decay<F>::type>::value)
+      {
+        asio_handler_invoke_helpers::invoke(f, f);
+        return;
+      }
+#endif // defined(ASIO_HAS_MOVE)
+      typename decay<F>::type function(ASIO_MOVE_CAST(F)(f));
+      asio_handler_invoke_helpers::invoke(function, function);
+    }
+    else
+    {
+      executor_.dispatch(ASIO_MOVE_CAST(F)(f), a);
+    }
+  }
+
+  template <typename F, typename A>
+  void post(ASIO_MOVE_ARG(F) f, const A& a) const
+  {
+    executor_.post(ASIO_MOVE_CAST(F)(f), a);
+  }
+
+  template <typename F, typename A>
+  void defer(ASIO_MOVE_ARG(F) f, const A& a) const
+  {
+    executor_.defer(ASIO_MOVE_CAST(F)(f), a);
+  }
+
+  friend bool operator==(const io_object_executor& a,
+      const io_object_executor& b) ASIO_NOEXCEPT
+  {
+    return a.executor_ == b.executor_
+      && a.has_native_impl_ == b.has_native_impl_;
+  }
+
+  friend bool operator!=(const io_object_executor& a,
+      const io_object_executor& b) ASIO_NOEXCEPT
+  {
+    return a.executor_ != b.executor_
+      || a.has_native_impl_ != b.has_native_impl_;
+  }
+
+private:
+  Executor executor_;
+  const bool has_native_impl_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_IO_OBJECT_EXECUTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/io_object_impl.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/io_object_impl.hpp
new file mode 100644
index 00000000000..6f57b669fb5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/io_object_impl.hpp
@@ -0,0 +1,193 @@
+//
+// io_object_impl.hpp
+// ~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IO_OBJECT_IMPL_HPP
+#define ASIO_DETAIL_IO_OBJECT_IMPL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include <new>
+#include "asio/detail/config.hpp"
+#include "asio/detail/io_object_executor.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/io_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+class executor;
+
+namespace detail {
+
+inline bool is_native_io_executor(const io_context::executor_type&)
+{
+  return true;
+}
+
+template <typename Executor>
+inline bool is_native_io_executor(const Executor&,
+    typename enable_if<!is_same<Executor, executor>::value>::type* = 0)
+{
+  return false;
+}
+
+template <typename Executor>
+inline bool is_native_io_executor(const Executor& ex,
+    typename enable_if<is_same<Executor, executor>::value>::type* = 0)
+{
+#if !defined (ASIO_NO_TYPEID)
+  return ex.target_type() == typeid(io_context::executor_type);
+#else // !defined (ASIO_NO_TYPEID)
+  return false;
+#endif // !defined (ASIO_NO_TYPEID)
+}
+
+template <typename IoObjectService,
+    typename Executor = io_context::executor_type>
+class io_object_impl
+{
+public:
+  // The type of the service that will be used to provide I/O operations.
+  typedef IoObjectService service_type;
+
+  // The underlying implementation type of I/O object.
+  typedef typename service_type::implementation_type implementation_type;
+
+  // The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  // The type of executor to be used when implementing asynchronous operations.
+  typedef io_object_executor<Executor> implementation_executor_type;
+
+  // Construct an I/O object using an executor.
+  explicit io_object_impl(const executor_type& ex)
+    : service_(&asio::use_service<IoObjectService>(ex.context())),
+      implementation_executor_(ex, (is_native_io_executor)(ex))
+  {
+    service_->construct(implementation_);
+  }
+
+  // Construct an I/O object using an execution context.
+  template <typename ExecutionContext>
+  explicit io_object_impl(ExecutionContext& context,
+      typename enable_if<is_convertible<
+        ExecutionContext&, execution_context&>::value>::type* = 0)
+    : service_(&asio::use_service<IoObjectService>(context)),
+      implementation_executor_(context.get_executor(),
+        is_same<ExecutionContext, io_context>::value)
+  {
+    service_->construct(implementation_);
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  // Move-construct an I/O object.
+  io_object_impl(io_object_impl&& other)
+    : service_(&other.get_service()),
+      implementation_executor_(other.get_implementation_executor())
+  {
+    service_->move_construct(implementation_, other.implementation_);
+  }
+
+  // Perform a converting move-construction of an I/O object.
+  template <typename IoObjectService1, typename Executor1>
+  io_object_impl(io_object_impl<IoObjectService1, Executor1>&& other)
+    : service_(&asio::use_service<IoObjectService>(
+            other.get_implementation_executor().context())),
+      implementation_executor_(other.get_implementation_executor())
+  {
+    service_->converting_move_construct(implementation_,
+        other.get_service(), other.get_implementation());
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  // Destructor.
+  ~io_object_impl()
+  {
+    service_->destroy(implementation_);
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  // Move-assign an I/O object.
+  io_object_impl& operator=(io_object_impl&& other)
+  {
+    if (this != &other)
+    {
+      service_->move_assign(implementation_,
+          *other.service_, other.implementation_);
+      implementation_executor_.~implementation_executor_type();
+      new (&implementation_executor_) implementation_executor_type(
+          std::move(other.implementation_executor_));
+      service_ = other.service_;
+    }
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  // Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return implementation_executor_.inner_executor();
+  }
+
+  // Get the executor to be used when implementing asynchronous operations.
+  const implementation_executor_type& get_implementation_executor()
+    ASIO_NOEXCEPT
+  {
+    return implementation_executor_;
+  }
+
+  // Get the service associated with the I/O object.
+  service_type& get_service()
+  {
+    return *service_;
+  }
+
+  // Get the service associated with the I/O object.
+  const service_type& get_service() const
+  {
+    return *service_;
+  }
+
+  // Get the underlying implementation of the I/O object.
+  implementation_type& get_implementation()
+  {
+    return implementation_;
+  }
+
+  // Get the underlying implementation of the I/O object.
+  const implementation_type& get_implementation() const
+  {
+    return implementation_;
+  }
+
+private:
+  // Disallow copying and copy assignment.
+  io_object_impl(const io_object_impl&);
+  io_object_impl& operator=(const io_object_impl&);
+
+  // The service associated with the I/O object.
+  service_type* service_;
+
+  // The underlying implementation of the I/O object.
+  implementation_type implementation_;
+
+  // The associated executor.
+  implementation_executor_type implementation_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_IO_OBJECT_IMPL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/is_buffer_sequence.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/is_buffer_sequence.hpp
new file mode 100644
index 00000000000..330137676b3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/is_buffer_sequence.hpp
@@ -0,0 +1,312 @@
+//
+// detail/is_buffer_sequence.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IS_BUFFER_SEQUENCE_HPP
+#define ASIO_DETAIL_IS_BUFFER_SEQUENCE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/type_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+class mutable_buffer;
+class const_buffer;
+
+namespace detail {
+
+struct buffer_sequence_memfns_base
+{
+  void begin();
+  void end();
+  void size();
+  void max_size();
+  void capacity();
+  void data();
+  void prepare();
+  void commit();
+  void consume();
+  void grow();
+  void shrink();
+};
+
+template <typename T>
+struct buffer_sequence_memfns_derived
+  : T, buffer_sequence_memfns_base
+{
+};
+
+template <typename T, T>
+struct buffer_sequence_memfns_check
+{
+};
+
+#if defined(ASIO_HAS_DECLTYPE)
+
+template <typename>
+char buffer_sequence_begin_helper(...);
+
+template <typename T>
+char (&buffer_sequence_begin_helper(T* t,
+    typename enable_if<!is_same<
+      decltype(asio::buffer_sequence_begin(*t)),
+        void>::value>::type*))[2];
+
+#else // defined(ASIO_HAS_DECLTYPE)
+
+template <typename>
+char (&buffer_sequence_begin_helper(...))[2];
+
+template <typename T>
+char buffer_sequence_begin_helper(T* t,
+    buffer_sequence_memfns_check<
+      void (buffer_sequence_memfns_base::*)(),
+      &buffer_sequence_memfns_derived<T>::begin>*);
+
+#endif // defined(ASIO_HAS_DECLTYPE)
+
+#if defined(ASIO_HAS_DECLTYPE)
+
+template <typename>
+char buffer_sequence_end_helper(...);
+
+template <typename T>
+char (&buffer_sequence_end_helper(T* t,
+    typename enable_if<!is_same<
+      decltype(asio::buffer_sequence_end(*t)),
+        void>::value>::type*))[2];
+
+#else // defined(ASIO_HAS_DECLTYPE)
+
+template <typename>
+char (&buffer_sequence_end_helper(...))[2];
+
+template <typename T>
+char buffer_sequence_end_helper(T* t,
+    buffer_sequence_memfns_check<
+      void (buffer_sequence_memfns_base::*)(),
+      &buffer_sequence_memfns_derived<T>::end>*);
+
+#endif // defined(ASIO_HAS_DECLTYPE)
+
+template <typename>
+char (&size_memfn_helper(...))[2];
+
+template <typename T>
+char size_memfn_helper(
+    buffer_sequence_memfns_check<
+      void (buffer_sequence_memfns_base::*)(),
+      &buffer_sequence_memfns_derived<T>::size>*);
+
+template <typename>
+char (&max_size_memfn_helper(...))[2];
+
+template <typename T>
+char max_size_memfn_helper(
+    buffer_sequence_memfns_check<
+      void (buffer_sequence_memfns_base::*)(),
+      &buffer_sequence_memfns_derived<T>::max_size>*);
+
+template <typename>
+char (&capacity_memfn_helper(...))[2];
+
+template <typename T>
+char capacity_memfn_helper(
+    buffer_sequence_memfns_check<
+      void (buffer_sequence_memfns_base::*)(),
+      &buffer_sequence_memfns_derived<T>::capacity>*);
+
+template <typename>
+char (&data_memfn_helper(...))[2];
+
+template <typename T>
+char data_memfn_helper(
+    buffer_sequence_memfns_check<
+      void (buffer_sequence_memfns_base::*)(),
+      &buffer_sequence_memfns_derived<T>::data>*);
+
+template <typename>
+char (&prepare_memfn_helper(...))[2];
+
+template <typename T>
+char prepare_memfn_helper(
+    buffer_sequence_memfns_check<
+      void (buffer_sequence_memfns_base::*)(),
+      &buffer_sequence_memfns_derived<T>::prepare>*);
+
+template <typename>
+char (&commit_memfn_helper(...))[2];
+
+template <typename T>
+char commit_memfn_helper(
+    buffer_sequence_memfns_check<
+      void (buffer_sequence_memfns_base::*)(),
+      &buffer_sequence_memfns_derived<T>::commit>*);
+
+template <typename>
+char (&consume_memfn_helper(...))[2];
+
+template <typename T>
+char consume_memfn_helper(
+    buffer_sequence_memfns_check<
+      void (buffer_sequence_memfns_base::*)(),
+      &buffer_sequence_memfns_derived<T>::consume>*);
+
+template <typename>
+char (&grow_memfn_helper(...))[2];
+
+template <typename T>
+char grow_memfn_helper(
+    buffer_sequence_memfns_check<
+      void (buffer_sequence_memfns_base::*)(),
+      &buffer_sequence_memfns_derived<T>::grow>*);
+
+template <typename>
+char (&shrink_memfn_helper(...))[2];
+
+template <typename T>
+char shrink_memfn_helper(
+    buffer_sequence_memfns_check<
+      void (buffer_sequence_memfns_base::*)(),
+      &buffer_sequence_memfns_derived<T>::shrink>*);
+
+template <typename, typename>
+char (&buffer_sequence_element_type_helper(...))[2];
+
+#if defined(ASIO_HAS_DECLTYPE)
+
+template <typename T, typename Buffer>
+char buffer_sequence_element_type_helper(T* t,
+    typename enable_if<is_convertible<
+      decltype(*asio::buffer_sequence_begin(*t)),
+        Buffer>::value>::type*);
+
+#else // defined(ASIO_HAS_DECLTYPE)
+
+template <typename T, typename Buffer>
+char buffer_sequence_element_type_helper(
+    typename T::const_iterator*,
+    typename enable_if<is_convertible<
+      typename T::value_type, Buffer>::value>::type*);
+
+#endif // defined(ASIO_HAS_DECLTYPE)
+
+template <typename>
+char (&const_buffers_type_typedef_helper(...))[2];
+
+template <typename T>
+char const_buffers_type_typedef_helper(
+    typename T::const_buffers_type*);
+
+template <typename>
+char (&mutable_buffers_type_typedef_helper(...))[2];
+
+template <typename T>
+char mutable_buffers_type_typedef_helper(
+    typename T::mutable_buffers_type*);
+
+template <typename T, typename Buffer>
+struct is_buffer_sequence_class
+  : integral_constant<bool,
+      sizeof(buffer_sequence_begin_helper<T>(0, 0)) != 1 &&
+      sizeof(buffer_sequence_end_helper<T>(0, 0)) != 1 &&
+      sizeof(buffer_sequence_element_type_helper<T, Buffer>(0, 0)) == 1>
+{
+};
+
+template <typename T, typename Buffer>
+struct is_buffer_sequence
+  : conditional<is_class<T>::value,
+      is_buffer_sequence_class<T, Buffer>,
+      false_type>::type
+{
+};
+
+template <>
+struct is_buffer_sequence<mutable_buffer, mutable_buffer>
+  : true_type
+{
+};
+
+template <>
+struct is_buffer_sequence<mutable_buffer, const_buffer>
+  : true_type
+{
+};
+
+template <>
+struct is_buffer_sequence<const_buffer, const_buffer>
+  : true_type
+{
+};
+
+template <>
+struct is_buffer_sequence<const_buffer, mutable_buffer>
+  : false_type
+{
+};
+
+template <typename T>
+struct is_dynamic_buffer_class_v1
+  : integral_constant<bool,
+      sizeof(size_memfn_helper<T>(0)) != 1 &&
+      sizeof(max_size_memfn_helper<T>(0)) != 1 &&
+      sizeof(capacity_memfn_helper<T>(0)) != 1 &&
+      sizeof(data_memfn_helper<T>(0)) != 1 &&
+      sizeof(consume_memfn_helper<T>(0)) != 1 &&
+      sizeof(prepare_memfn_helper<T>(0)) != 1 &&
+      sizeof(commit_memfn_helper<T>(0)) != 1 &&
+      sizeof(const_buffers_type_typedef_helper<T>(0)) == 1 &&
+      sizeof(mutable_buffers_type_typedef_helper<T>(0)) == 1>
+{
+};
+
+template <typename T>
+struct is_dynamic_buffer_v1
+  : conditional<is_class<T>::value,
+      is_dynamic_buffer_class_v1<T>,
+      false_type>::type
+{
+};
+
+template <typename T>
+struct is_dynamic_buffer_class_v2
+  : integral_constant<bool,
+      sizeof(size_memfn_helper<T>(0)) != 1 &&
+      sizeof(max_size_memfn_helper<T>(0)) != 1 &&
+      sizeof(capacity_memfn_helper<T>(0)) != 1 &&
+      sizeof(data_memfn_helper<T>(0)) != 1 &&
+      sizeof(consume_memfn_helper<T>(0)) != 1 &&
+      sizeof(grow_memfn_helper<T>(0)) != 1 &&
+      sizeof(shrink_memfn_helper<T>(0)) != 1 &&
+      sizeof(const_buffers_type_typedef_helper<T>(0)) == 1 &&
+      sizeof(mutable_buffers_type_typedef_helper<T>(0)) == 1>
+{
+};
+
+template <typename T>
+struct is_dynamic_buffer_v2
+  : conditional<is_class<T>::value,
+      is_dynamic_buffer_class_v2<T>,
+      false_type>::type
+{
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_IS_BUFFER_SEQUENCE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/is_executor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/is_executor.hpp
new file mode 100644
index 00000000000..ee11b37c6b7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/is_executor.hpp
@@ -0,0 +1,126 @@
+//
+// detail/is_executor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_IS_EXECUTOR_HPP
+#define ASIO_DETAIL_IS_EXECUTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/type_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+struct executor_memfns_base
+{
+  void context();
+  void on_work_started();
+  void on_work_finished();
+  void dispatch();
+  void post();
+  void defer();
+};
+
+template <typename T>
+struct executor_memfns_derived
+  : T, executor_memfns_base
+{
+};
+
+template <typename T, T>
+struct executor_memfns_check
+{
+};
+
+template <typename>
+char (&context_memfn_helper(...))[2];
+
+template <typename T>
+char context_memfn_helper(
+    executor_memfns_check<
+      void (executor_memfns_base::*)(),
+      &executor_memfns_derived<T>::context>*);
+
+template <typename>
+char (&on_work_started_memfn_helper(...))[2];
+
+template <typename T>
+char on_work_started_memfn_helper(
+    executor_memfns_check<
+      void (executor_memfns_base::*)(),
+      &executor_memfns_derived<T>::on_work_started>*);
+
+template <typename>
+char (&on_work_finished_memfn_helper(...))[2];
+
+template <typename T>
+char on_work_finished_memfn_helper(
+    executor_memfns_check<
+      void (executor_memfns_base::*)(),
+      &executor_memfns_derived<T>::on_work_finished>*);
+
+template <typename>
+char (&dispatch_memfn_helper(...))[2];
+
+template <typename T>
+char dispatch_memfn_helper(
+    executor_memfns_check<
+      void (executor_memfns_base::*)(),
+      &executor_memfns_derived<T>::dispatch>*);
+
+template <typename>
+char (&post_memfn_helper(...))[2];
+
+template <typename T>
+char post_memfn_helper(
+    executor_memfns_check<
+      void (executor_memfns_base::*)(),
+      &executor_memfns_derived<T>::post>*);
+
+template <typename>
+char (&defer_memfn_helper(...))[2];
+
+template <typename T>
+char defer_memfn_helper(
+    executor_memfns_check<
+      void (executor_memfns_base::*)(),
+      &executor_memfns_derived<T>::defer>*);
+
+template <typename T>
+struct is_executor_class
+  : integral_constant<bool,
+      sizeof(context_memfn_helper<T>(0)) != 1 &&
+      sizeof(on_work_started_memfn_helper<T>(0)) != 1 &&
+      sizeof(on_work_finished_memfn_helper<T>(0)) != 1 &&
+      sizeof(dispatch_memfn_helper<T>(0)) != 1 &&
+      sizeof(post_memfn_helper<T>(0)) != 1 &&
+      sizeof(defer_memfn_helper<T>(0)) != 1>
+{
+};
+
+template <typename T>
+struct is_executor
+  : conditional<is_class<T>::value,
+      is_executor_class<T>,
+      false_type>::type
+{
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_IS_EXECUTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/keyword_tss_ptr.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/keyword_tss_ptr.hpp
new file mode 100644
index 00000000000..8812e602c1b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/keyword_tss_ptr.hpp
@@ -0,0 +1,70 @@
+//
+// detail/keyword_tss_ptr.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_KEYWORD_TSS_PTR_HPP
+#define ASIO_DETAIL_KEYWORD_TSS_PTR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_THREAD_KEYWORD_EXTENSION)
+
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+class keyword_tss_ptr
+  : private noncopyable
+{
+public:
+  // Constructor.
+  keyword_tss_ptr()
+  {
+  }
+
+  // Destructor.
+  ~keyword_tss_ptr()
+  {
+  }
+
+  // Get the value.
+  operator T*() const
+  {
+    return value_;
+  }
+
+  // Set the value.
+  void operator=(T* value)
+  {
+    value_ = value;
+  }
+
+private:
+  static ASIO_THREAD_KEYWORD T* value_;
+};
+
+template <typename T>
+ASIO_THREAD_KEYWORD T* keyword_tss_ptr<T>::value_;
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_THREAD_KEYWORD_EXTENSION)
+
+#endif // ASIO_DETAIL_KEYWORD_TSS_PTR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/kqueue_reactor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/kqueue_reactor.hpp
new file mode 100644
index 00000000000..fb3811549b2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/kqueue_reactor.hpp
@@ -0,0 +1,242 @@
+//
+// detail/kqueue_reactor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2005 Stefan Arentz (stefan at soze dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_KQUEUE_REACTOR_HPP
+#define ASIO_DETAIL_KQUEUE_REACTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_KQUEUE)
+
+#include <cstddef>
+#include <sys/types.h>
+#include <sys/event.h>
+#include <sys/time.h>
+#include "asio/detail/limits.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/object_pool.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/select_interrupter.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/timer_queue_base.hpp"
+#include "asio/detail/timer_queue_set.hpp"
+#include "asio/detail/wait_op.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+
+// Older versions of Mac OS X may not define EV_OOBAND.
+#if !defined(EV_OOBAND)
+# define EV_OOBAND EV_FLAG1
+#endif // !defined(EV_OOBAND)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class scheduler;
+
+class kqueue_reactor
+  : public execution_context_service_base<kqueue_reactor>
+{
+private:
+  // The mutex type used by this reactor.
+  typedef conditionally_enabled_mutex mutex;
+
+public:
+  enum op_types { read_op = 0, write_op = 1,
+    connect_op = 1, except_op = 2, max_ops = 3 };
+
+  // Per-descriptor queues.
+  struct descriptor_state
+  {
+    descriptor_state(bool locking) : mutex_(locking) {}
+
+    friend class kqueue_reactor;
+    friend class object_pool_access;
+
+    descriptor_state* next_;
+    descriptor_state* prev_;
+
+    mutex mutex_;
+    int descriptor_;
+    int num_kevents_; // 1 == read only, 2 == read and write
+    op_queue<reactor_op> op_queue_[max_ops];
+    bool shutdown_;
+  };
+
+  // Per-descriptor data.
+  typedef descriptor_state* per_descriptor_data;
+
+  // Constructor.
+  ASIO_DECL kqueue_reactor(asio::execution_context& ctx);
+
+  // Destructor.
+  ASIO_DECL ~kqueue_reactor();
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Recreate internal descriptors following a fork.
+  ASIO_DECL void notify_fork(
+      asio::execution_context::fork_event fork_ev);
+
+  // Initialise the task.
+  ASIO_DECL void init_task();
+
+  // Register a socket with the reactor. Returns 0 on success, system error
+  // code on failure.
+  ASIO_DECL int register_descriptor(socket_type descriptor,
+      per_descriptor_data& descriptor_data);
+
+  // Register a descriptor with an associated single operation. Returns 0 on
+  // success, system error code on failure.
+  ASIO_DECL int register_internal_descriptor(
+      int op_type, socket_type descriptor,
+      per_descriptor_data& descriptor_data, reactor_op* op);
+
+  // Move descriptor registration from one descriptor_data object to another.
+  ASIO_DECL void move_descriptor(socket_type descriptor,
+      per_descriptor_data& target_descriptor_data,
+      per_descriptor_data& source_descriptor_data);
+
+  // Post a reactor operation for immediate completion.
+  void post_immediate_completion(reactor_op* op, bool is_continuation)
+  {
+    scheduler_.post_immediate_completion(op, is_continuation);
+  }
+
+  // Start a new operation. The reactor operation will be performed when the
+  // given descriptor is flagged as ready, or an error has occurred.
+  ASIO_DECL void start_op(int op_type, socket_type descriptor,
+      per_descriptor_data& descriptor_data, reactor_op* op,
+      bool is_continuation, bool allow_speculative);
+
+  // Cancel all operations associated with the given descriptor. The
+  // handlers associated with the descriptor will be invoked with the
+  // operation_aborted error.
+  ASIO_DECL void cancel_ops(socket_type descriptor,
+      per_descriptor_data& descriptor_data);
+
+  // Cancel any operations that are running against the descriptor and remove
+  // its registration from the reactor. The reactor resources associated with
+  // the descriptor must be released by calling cleanup_descriptor_data.
+  ASIO_DECL void deregister_descriptor(socket_type descriptor,
+      per_descriptor_data& descriptor_data, bool closing);
+
+  // Remove the descriptor's registration from the reactor. The reactor
+  // resources associated with the descriptor must be released by calling
+  // cleanup_descriptor_data.
+  ASIO_DECL void deregister_internal_descriptor(
+      socket_type descriptor, per_descriptor_data& descriptor_data);
+
+  // Perform any post-deregistration cleanup tasks associated with the
+  // descriptor data.
+  ASIO_DECL void cleanup_descriptor_data(
+      per_descriptor_data& descriptor_data);
+
+  // Add a new timer queue to the reactor.
+  template <typename Time_Traits>
+  void add_timer_queue(timer_queue<Time_Traits>& queue);
+
+  // Remove a timer queue from the reactor.
+  template <typename Time_Traits>
+  void remove_timer_queue(timer_queue<Time_Traits>& queue);
+
+  // Schedule a new operation in the given timer queue to expire at the
+  // specified absolute time.
+  template <typename Time_Traits>
+  void schedule_timer(timer_queue<Time_Traits>& queue,
+      const typename Time_Traits::time_type& time,
+      typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op);
+
+  // Cancel the timer operations associated with the given token. Returns the
+  // number of operations that have been posted or dispatched.
+  template <typename Time_Traits>
+  std::size_t cancel_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& timer,
+      std::size_t max_cancelled = (std::numeric_limits<std::size_t>::max)());
+
+  // Move the timer operations associated with the given timer.
+  template <typename Time_Traits>
+  void move_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& target,
+      typename timer_queue<Time_Traits>::per_timer_data& source);
+
+  // Run the kqueue loop.
+  ASIO_DECL void run(long usec, op_queue<operation>& ops);
+
+  // Interrupt the kqueue loop.
+  ASIO_DECL void interrupt();
+
+private:
+  // Create the kqueue file descriptor. Throws an exception if the descriptor
+  // cannot be created.
+  ASIO_DECL static int do_kqueue_create();
+
+  // Allocate a new descriptor state object.
+  ASIO_DECL descriptor_state* allocate_descriptor_state();
+
+  // Free an existing descriptor state object.
+  ASIO_DECL void free_descriptor_state(descriptor_state* s);
+
+  // Helper function to add a new timer queue.
+  ASIO_DECL void do_add_timer_queue(timer_queue_base& queue);
+
+  // Helper function to remove a timer queue.
+  ASIO_DECL void do_remove_timer_queue(timer_queue_base& queue);
+
+  // Get the timeout value for the kevent call.
+  ASIO_DECL timespec* get_timeout(long usec, timespec& ts);
+
+  // The scheduler used to post completions.
+  scheduler& scheduler_;
+
+  // Mutex to protect access to internal data.
+  mutex mutex_;
+
+  // The kqueue file descriptor.
+  int kqueue_fd_;
+
+  // The interrupter is used to break a blocking kevent call.
+  select_interrupter interrupter_;
+
+  // The timer queues.
+  timer_queue_set timer_queues_;
+
+  // Whether the service has been shut down.
+  bool shutdown_;
+
+  // Mutex to protect access to the registered descriptors.
+  mutex registered_descriptors_mutex_;
+
+  // Keep track of all registered descriptors.
+  object_pool<descriptor_state> registered_descriptors_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/detail/impl/kqueue_reactor.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/kqueue_reactor.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_KQUEUE)
+
+#endif // ASIO_DETAIL_KQUEUE_REACTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/limits.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/limits.hpp
new file mode 100644
index 00000000000..d32470d2d35
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/limits.hpp
@@ -0,0 +1,26 @@
+//
+// detail/limits.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2011 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_LIMITS_HPP
+#define ASIO_DETAIL_LIMITS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_BOOST_LIMITS)
+# include <boost/limits.hpp>
+#else // defined(ASIO_HAS_BOOST_LIMITS)
+# include <limits>
+#endif // defined(ASIO_HAS_BOOST_LIMITS)
+
+#endif // ASIO_DETAIL_LIMITS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/local_free_on_block_exit.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/local_free_on_block_exit.hpp
new file mode 100644
index 00000000000..2b601b96d9b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/local_free_on_block_exit.hpp
@@ -0,0 +1,59 @@
+//
+// detail/local_free_on_block_exit.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_LOCAL_FREE_ON_BLOCK_EXIT_HPP
+#define ASIO_DETAIL_LOCAL_FREE_ON_BLOCK_EXIT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+#if !defined(ASIO_WINDOWS_APP)
+
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class local_free_on_block_exit
+  : private noncopyable
+{
+public:
+  // Constructor blocks all signals for the calling thread.
+  explicit local_free_on_block_exit(void* p)
+    : p_(p)
+  {
+  }
+
+  // Destructor restores the previous signal mask.
+  ~local_free_on_block_exit()
+  {
+    ::LocalFree(p_);
+  }
+
+private:
+  void* p_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_WINDOWS_APP)
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+#endif // ASIO_DETAIL_LOCAL_FREE_ON_BLOCK_EXIT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/macos_fenced_block.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/macos_fenced_block.hpp
new file mode 100644
index 00000000000..f123384bc37
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/macos_fenced_block.hpp
@@ -0,0 +1,62 @@
+//
+// detail/macos_fenced_block.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_MACOS_FENCED_BLOCK_HPP
+#define ASIO_DETAIL_MACOS_FENCED_BLOCK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(__MACH__) && defined(__APPLE__)
+
+#include <libkern/OSAtomic.h>
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class macos_fenced_block
+  : private noncopyable
+{
+public:
+  enum half_t { half };
+  enum full_t { full };
+
+  // Constructor for a half fenced block.
+  explicit macos_fenced_block(half_t)
+  {
+  }
+
+  // Constructor for a full fenced block.
+  explicit macos_fenced_block(full_t)
+  {
+    OSMemoryBarrier();
+  }
+
+  // Destructor.
+  ~macos_fenced_block()
+  {
+    OSMemoryBarrier();
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(__MACH__) && defined(__APPLE__)
+
+#endif // ASIO_DETAIL_MACOS_FENCED_BLOCK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/memory.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/memory.hpp
new file mode 100644
index 00000000000..a11ceb9b831
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/memory.hpp
@@ -0,0 +1,70 @@
+//
+// detail/memory.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_MEMORY_HPP
+#define ASIO_DETAIL_MEMORY_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <memory>
+
+#if !defined(ASIO_HAS_STD_SHARED_PTR)
+# include <boost/shared_ptr.hpp>
+# include <boost/weak_ptr.hpp>
+#endif // !defined(ASIO_HAS_STD_SHARED_PTR)
+
+#if !defined(ASIO_HAS_STD_ADDRESSOF)
+# include <boost/utility/addressof.hpp>
+#endif // !defined(ASIO_HAS_STD_ADDRESSOF)
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_HAS_STD_SHARED_PTR)
+using std::shared_ptr;
+using std::weak_ptr;
+#else // defined(ASIO_HAS_STD_SHARED_PTR)
+using boost::shared_ptr;
+using boost::weak_ptr;
+#endif // defined(ASIO_HAS_STD_SHARED_PTR)
+
+#if defined(ASIO_HAS_STD_ADDRESSOF)
+using std::addressof;
+#else // defined(ASIO_HAS_STD_ADDRESSOF)
+using boost::addressof;
+#endif // defined(ASIO_HAS_STD_ADDRESSOF)
+
+} // namespace detail
+
+#if defined(ASIO_HAS_CXX11_ALLOCATORS)
+using std::allocator_arg_t;
+# define ASIO_USES_ALLOCATOR(t) \
+  namespace std { \
+    template <typename Allocator> \
+    struct uses_allocator<t, Allocator> : true_type {}; \
+  } \
+  /**/
+# define ASIO_REBIND_ALLOC(alloc, t) \
+  typename std::allocator_traits<alloc>::template rebind_alloc<t>
+  /**/
+#else // defined(ASIO_HAS_CXX11_ALLOCATORS)
+struct allocator_arg_t {};
+# define ASIO_USES_ALLOCATOR(t)
+# define ASIO_REBIND_ALLOC(alloc, t) \
+  typename alloc::template rebind<t>::other
+  /**/
+#endif // defined(ASIO_HAS_CXX11_ALLOCATORS)
+
+} // namespace asio
+
+#endif // ASIO_DETAIL_MEMORY_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/mutex.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/mutex.hpp
new file mode 100644
index 00000000000..4e01cca2578
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/mutex.hpp
@@ -0,0 +1,48 @@
+//
+// detail/mutex.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_MUTEX_HPP
+#define ASIO_DETAIL_MUTEX_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS)
+# include "asio/detail/null_mutex.hpp"
+#elif defined(ASIO_WINDOWS)
+# include "asio/detail/win_mutex.hpp"
+#elif defined(ASIO_HAS_PTHREADS)
+# include "asio/detail/posix_mutex.hpp"
+#elif defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+# include "asio/detail/std_mutex.hpp"
+#else
+# error Only Windows, POSIX and std::mutex are supported!
+#endif
+
+namespace asio {
+namespace detail {
+
+#if !defined(ASIO_HAS_THREADS)
+typedef null_mutex mutex;
+#elif defined(ASIO_WINDOWS)
+typedef win_mutex mutex;
+#elif defined(ASIO_HAS_PTHREADS)
+typedef posix_mutex mutex;
+#elif defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+typedef std_mutex mutex;
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_MUTEX_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/non_const_lvalue.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/non_const_lvalue.hpp
new file mode 100644
index 00000000000..6d9afc88cb7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/non_const_lvalue.hpp
@@ -0,0 +1,54 @@
+//
+// detail/non_const_lvalue.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NON_CONST_LVALUE_HPP
+#define ASIO_DETAIL_NON_CONST_LVALUE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/type_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+struct non_const_lvalue
+{
+#if defined(ASIO_HAS_MOVE)
+  explicit non_const_lvalue(T& t)
+    : value(static_cast<typename conditional<
+        is_same<T, typename decay<T>::type>::value,
+          typename decay<T>::type&, T&&>::type>(t))
+  {
+  }
+
+  typename conditional<is_same<T, typename decay<T>::type>::value,
+      typename decay<T>::type&, typename decay<T>::type>::type value;
+#else // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  explicit non_const_lvalue(const typename decay<T>::type& t)
+    : value(t)
+  {
+  }
+
+  typename decay<T>::type value;
+#endif // defined(ASIO_HAS_MOVE)
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_NON_CONST_LVALUE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/noncopyable.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/noncopyable.hpp
new file mode 100644
index 00000000000..2266e6717dc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/noncopyable.hpp
@@ -0,0 +1,43 @@
+//
+// detail/noncopyable.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NONCOPYABLE_HPP
+#define ASIO_DETAIL_NONCOPYABLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class noncopyable
+{
+protected:
+  noncopyable() {}
+  ~noncopyable() {}
+private:
+  noncopyable(const noncopyable&);
+  const noncopyable& operator=(const noncopyable&);
+};
+
+} // namespace detail
+
+using asio::detail::noncopyable;
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_NONCOPYABLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_event.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_event.hpp
new file mode 100644
index 00000000000..507de9483d1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_event.hpp
@@ -0,0 +1,100 @@
+//
+// detail/null_event.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NULL_EVENT_HPP
+#define ASIO_DETAIL_NULL_EVENT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class null_event
+  : private noncopyable
+{
+public:
+  // Constructor.
+  null_event()
+  {
+  }
+
+  // Destructor.
+  ~null_event()
+  {
+  }
+
+  // Signal the event. (Retained for backward compatibility.)
+  template <typename Lock>
+  void signal(Lock&)
+  {
+  }
+
+  // Signal all waiters.
+  template <typename Lock>
+  void signal_all(Lock&)
+  {
+  }
+
+  // Unlock the mutex and signal one waiter.
+  template <typename Lock>
+  void unlock_and_signal_one(Lock&)
+  {
+  }
+
+  // If there's a waiter, unlock the mutex and signal it.
+  template <typename Lock>
+  bool maybe_unlock_and_signal_one(Lock&)
+  {
+    return false;
+  }
+
+  // Reset the event.
+  template <typename Lock>
+  void clear(Lock&)
+  {
+  }
+
+  // Wait for the event to become signalled.
+  template <typename Lock>
+  void wait(Lock&)
+  {
+    do_wait();
+  }
+
+  // Timed wait for the event to become signalled.
+  template <typename Lock>
+  bool wait_for_usec(Lock&, long usec)
+  {
+    do_wait_for_usec(usec);
+    return true;
+  }
+
+private:
+  ASIO_DECL static void do_wait();
+  ASIO_DECL static void do_wait_for_usec(long usec);
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/null_event.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_NULL_EVENT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_fenced_block.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_fenced_block.hpp
new file mode 100644
index 00000000000..b136ea37925
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_fenced_block.hpp
@@ -0,0 +1,47 @@
+//
+// detail/null_fenced_block.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NULL_FENCED_BLOCK_HPP
+#define ASIO_DETAIL_NULL_FENCED_BLOCK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class null_fenced_block
+  : private noncopyable
+{
+public:
+  enum half_or_full_t { half, full };
+
+  // Constructor.
+  explicit null_fenced_block(half_or_full_t)
+  {
+  }
+
+  // Destructor.
+  ~null_fenced_block()
+  {
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_NULL_FENCED_BLOCK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_global.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_global.hpp
new file mode 100644
index 00000000000..1d70bea355d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_global.hpp
@@ -0,0 +1,59 @@
+//
+// detail/null_global.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NULL_GLOBAL_HPP
+#define ASIO_DETAIL_NULL_GLOBAL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+struct null_global_impl
+{
+  null_global_impl()
+    : ptr_(0)
+  {
+  }
+
+  // Destructor automatically cleans up the global.
+  ~null_global_impl()
+  {
+    delete ptr_;
+  }
+
+  static null_global_impl instance_;
+  T* ptr_;
+};
+
+template <typename T>
+null_global_impl<T> null_global_impl<T>::instance_;
+
+template <typename T>
+T& null_global()
+{
+  if (null_global_impl<T>::instance_.ptr_ == 0)
+    null_global_impl<T>::instance_.ptr_ = new T;
+  return *null_global_impl<T>::instance_.ptr_;
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_NULL_GLOBAL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_mutex.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_mutex.hpp
new file mode 100644
index 00000000000..8f9666b6ab0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_mutex.hpp
@@ -0,0 +1,64 @@
+//
+// detail/null_mutex.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NULL_MUTEX_HPP
+#define ASIO_DETAIL_NULL_MUTEX_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS)
+
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/scoped_lock.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class null_mutex
+  : private noncopyable
+{
+public:
+  typedef asio::detail::scoped_lock<null_mutex> scoped_lock;
+
+  // Constructor.
+  null_mutex()
+  {
+  }
+
+  // Destructor.
+  ~null_mutex()
+  {
+  }
+
+  // Lock the mutex.
+  void lock()
+  {
+  }
+
+  // Unlock the mutex.
+  void unlock()
+  {
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_HAS_THREADS)
+
+#endif // ASIO_DETAIL_NULL_MUTEX_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_reactor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_reactor.hpp
new file mode 100644
index 00000000000..07b2b96ecb6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_reactor.hpp
@@ -0,0 +1,68 @@
+//
+// detail/null_reactor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NULL_REACTOR_HPP
+#define ASIO_DETAIL_NULL_REACTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP) || defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/detail/scheduler_operation.hpp"
+#include "asio/execution_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class null_reactor
+  : public execution_context_service_base<null_reactor>
+{
+public:
+  // Constructor.
+  null_reactor(asio::execution_context& ctx)
+    : execution_context_service_base<null_reactor>(ctx)
+  {
+  }
+
+  // Destructor.
+  ~null_reactor()
+  {
+  }
+
+  // Destroy all user-defined handler objects owned by the service.
+  void shutdown()
+  {
+  }
+
+  // No-op because should never be called.
+  void run(long /*usec*/, op_queue<scheduler_operation>& /*ops*/)
+  {
+  }
+
+  // No-op.
+  void interrupt()
+  {
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP) || defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_NULL_REACTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_signal_blocker.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_signal_blocker.hpp
new file mode 100644
index 00000000000..f2f2ff2bdde
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_signal_blocker.hpp
@@ -0,0 +1,69 @@
+//
+// detail/null_signal_blocker.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NULL_SIGNAL_BLOCKER_HPP
+#define ASIO_DETAIL_NULL_SIGNAL_BLOCKER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS) \
+  || defined(ASIO_WINDOWS) \
+  || defined(ASIO_WINDOWS_RUNTIME) \
+  || defined(__CYGWIN__) \
+  || defined(__SYMBIAN32__)
+
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class null_signal_blocker
+  : private noncopyable
+{
+public:
+  // Constructor blocks all signals for the calling thread.
+  null_signal_blocker()
+  {
+  }
+
+  // Destructor restores the previous signal mask.
+  ~null_signal_blocker()
+  {
+  }
+
+  // Block all signals for the calling thread.
+  void block()
+  {
+  }
+
+  // Restore the previous signal mask.
+  void unblock()
+  {
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_HAS_THREADS)
+       // || defined(ASIO_WINDOWS)
+       // || defined(ASIO_WINDOWS_RUNTIME)
+       // || defined(__CYGWIN__)
+       // || defined(__SYMBIAN32__)
+
+#endif // ASIO_DETAIL_NULL_SIGNAL_BLOCKER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_socket_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_socket_service.hpp
new file mode 100644
index 00000000000..752819f846b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_socket_service.hpp
@@ -0,0 +1,519 @@
+//
+// detail/null_socket_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NULL_SOCKET_SERVICE_HPP
+#define ASIO_DETAIL_NULL_SOCKET_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/buffer.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/post.hpp"
+#include "asio/socket_base.hpp"
+#include "asio/detail/bind_handler.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Protocol>
+class null_socket_service :
+  public execution_context_service_base<null_socket_service<Protocol> >
+{
+public:
+  // The protocol type.
+  typedef Protocol protocol_type;
+
+  // The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  // The native type of a socket.
+  typedef int native_handle_type;
+
+  // The implementation type of the socket.
+  struct implementation_type
+  {
+  };
+
+  // Constructor.
+  null_socket_service(execution_context& context)
+    : execution_context_service_base<null_socket_service<Protocol> >(context)
+  {
+  }
+
+  // Destroy all user-defined handler objects owned by the service.
+  void shutdown()
+  {
+  }
+
+  // Construct a new socket implementation.
+  void construct(implementation_type&)
+  {
+  }
+
+  // Move-construct a new socket implementation.
+  void move_construct(implementation_type&, implementation_type&)
+  {
+  }
+
+  // Move-assign from another socket implementation.
+  void move_assign(implementation_type&,
+      null_socket_service&, implementation_type&)
+  {
+  }
+
+  // Move-construct a new socket implementation from another protocol type.
+  template <typename Protocol1>
+  void converting_move_construct(implementation_type&,
+      null_socket_service<Protocol1>&,
+      typename null_socket_service<Protocol1>::implementation_type&)
+  {
+  }
+
+  // Destroy a socket implementation.
+  void destroy(implementation_type&)
+  {
+  }
+
+  // Open a new socket implementation.
+  asio::error_code open(implementation_type&,
+      const protocol_type&, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Assign a native socket to a socket implementation.
+  asio::error_code assign(implementation_type&, const protocol_type&,
+      const native_handle_type&, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Determine whether the socket is open.
+  bool is_open(const implementation_type&) const
+  {
+    return false;
+  }
+
+  // Destroy a socket implementation.
+  asio::error_code close(implementation_type&,
+      asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Release ownership of the socket.
+  native_handle_type release(implementation_type&,
+      asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Get the native socket representation.
+  native_handle_type native_handle(implementation_type&)
+  {
+    return 0;
+  }
+
+  // Cancel all operations associated with the socket.
+  asio::error_code cancel(implementation_type&,
+      asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Determine whether the socket is at the out-of-band data mark.
+  bool at_mark(const implementation_type&,
+      asio::error_code& ec) const
+  {
+    ec = asio::error::operation_not_supported;
+    return false;
+  }
+
+  // Determine the number of bytes available for reading.
+  std::size_t available(const implementation_type&,
+      asio::error_code& ec) const
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Place the socket into the state where it will listen for new connections.
+  asio::error_code listen(implementation_type&,
+      int, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Perform an IO control command on the socket.
+  template <typename IO_Control_Command>
+  asio::error_code io_control(implementation_type&,
+      IO_Control_Command&, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Gets the non-blocking mode of the socket.
+  bool non_blocking(const implementation_type&) const
+  {
+    return false;
+  }
+
+  // Sets the non-blocking mode of the socket.
+  asio::error_code non_blocking(implementation_type&,
+      bool, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Gets the non-blocking mode of the native socket implementation.
+  bool native_non_blocking(const implementation_type&) const
+  {
+    return false;
+  }
+
+  // Sets the non-blocking mode of the native socket implementation.
+  asio::error_code native_non_blocking(implementation_type&,
+      bool, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Disable sends or receives on the socket.
+  asio::error_code shutdown(implementation_type&,
+      socket_base::shutdown_type, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Bind the socket to the specified local endpoint.
+  asio::error_code bind(implementation_type&,
+      const endpoint_type&, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Set a socket option.
+  template <typename Option>
+  asio::error_code set_option(implementation_type&,
+      const Option&, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Set a socket option.
+  template <typename Option>
+  asio::error_code get_option(const implementation_type&,
+      Option&, asio::error_code& ec) const
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Get the local endpoint.
+  endpoint_type local_endpoint(const implementation_type&,
+      asio::error_code& ec) const
+  {
+    ec = asio::error::operation_not_supported;
+    return endpoint_type();
+  }
+
+  // Get the remote endpoint.
+  endpoint_type remote_endpoint(const implementation_type&,
+      asio::error_code& ec) const
+  {
+    ec = asio::error::operation_not_supported;
+    return endpoint_type();
+  }
+
+  // Send the given data to the peer.
+  template <typename ConstBufferSequence>
+  std::size_t send(implementation_type&, const ConstBufferSequence&,
+      socket_base::message_flags, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Wait until data can be sent without blocking.
+  std::size_t send(implementation_type&, const null_buffers&,
+      socket_base::message_flags, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Start an asynchronous send. The data being sent must be valid for the
+  // lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_send(implementation_type&, const ConstBufferSequence&,
+      socket_base::message_flags, Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex, detail::bind_handler(
+          handler, ec, bytes_transferred));
+  }
+
+  // Start an asynchronous wait until data can be sent without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_send(implementation_type&, const null_buffers&,
+      socket_base::message_flags, Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex, detail::bind_handler(
+          handler, ec, bytes_transferred));
+  }
+
+  // Receive some data from the peer. Returns the number of bytes received.
+  template <typename MutableBufferSequence>
+  std::size_t receive(implementation_type&, const MutableBufferSequence&,
+      socket_base::message_flags, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Wait until data can be received without blocking.
+  std::size_t receive(implementation_type&, const null_buffers&,
+      socket_base::message_flags, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Start an asynchronous receive. The buffer for the data being received
+  // must be valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_receive(implementation_type&, const MutableBufferSequence&,
+      socket_base::message_flags, Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex, detail::bind_handler(
+          handler, ec, bytes_transferred));
+  }
+
+  // Wait until data can be received without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_receive(implementation_type&, const null_buffers&,
+      socket_base::message_flags, Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex, detail::bind_handler(
+          handler, ec, bytes_transferred));
+  }
+
+  // Receive some data with associated flags. Returns the number of bytes
+  // received.
+  template <typename MutableBufferSequence>
+  std::size_t receive_with_flags(implementation_type&,
+      const MutableBufferSequence&, socket_base::message_flags,
+      socket_base::message_flags&, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Wait until data can be received without blocking.
+  std::size_t receive_with_flags(implementation_type&,
+      const null_buffers&, socket_base::message_flags,
+      socket_base::message_flags&, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Start an asynchronous receive. The buffer for the data being received
+  // must be valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_receive_with_flags(implementation_type&,
+      const MutableBufferSequence&, socket_base::message_flags,
+      socket_base::message_flags&, Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex, detail::bind_handler(
+          handler, ec, bytes_transferred));
+  }
+
+  // Wait until data can be received without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_receive_with_flags(implementation_type&, const null_buffers&,
+      socket_base::message_flags, socket_base::message_flags&,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex, detail::bind_handler(
+          handler, ec, bytes_transferred));
+  }
+
+  // Send a datagram to the specified endpoint. Returns the number of bytes
+  // sent.
+  template <typename ConstBufferSequence>
+  std::size_t send_to(implementation_type&, const ConstBufferSequence&,
+      const endpoint_type&, socket_base::message_flags,
+      asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Wait until data can be sent without blocking.
+  std::size_t send_to(implementation_type&, const null_buffers&,
+      const endpoint_type&, socket_base::message_flags,
+      asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Start an asynchronous send. The data being sent must be valid for the
+  // lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_send_to(implementation_type&, const ConstBufferSequence&,
+      const endpoint_type&, socket_base::message_flags,
+      Handler& handler)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex, detail::bind_handler(
+          handler, ec, bytes_transferred));
+  }
+
+  // Start an asynchronous wait until data can be sent without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_send_to(implementation_type&, const null_buffers&,
+      const endpoint_type&, socket_base::message_flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex, detail::bind_handler(
+          handler, ec, bytes_transferred));
+  }
+
+  // Receive a datagram with the endpoint of the sender. Returns the number of
+  // bytes received.
+  template <typename MutableBufferSequence>
+  std::size_t receive_from(implementation_type&, const MutableBufferSequence&,
+      endpoint_type&, socket_base::message_flags,
+      asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Wait until data can be received without blocking.
+  std::size_t receive_from(implementation_type&, const null_buffers&,
+      endpoint_type&, socket_base::message_flags,
+      asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Start an asynchronous receive. The buffer for the data being received and
+  // the sender_endpoint object must both be valid for the lifetime of the
+  // asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_receive_from(implementation_type&, const MutableBufferSequence&,
+      endpoint_type&, socket_base::message_flags, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex, detail::bind_handler(
+          handler, ec, bytes_transferred));
+  }
+
+  // Wait until data can be received without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_receive_from(implementation_type&, const null_buffers&,
+      endpoint_type&, socket_base::message_flags, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex, detail::bind_handler(
+          handler, ec, bytes_transferred));
+  }
+
+  // Accept a new connection.
+  template <typename Socket>
+  asio::error_code accept(implementation_type&,
+      Socket&, endpoint_type*, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Start an asynchronous accept. The peer and peer_endpoint objects
+  // must be valid until the accept's handler is invoked.
+  template <typename Socket, typename Handler, typename IoExecutor>
+  void async_accept(implementation_type&, Socket&, endpoint_type*,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    asio::post(io_ex, detail::bind_handler(handler, ec));
+  }
+
+  // Connect the socket to the specified endpoint.
+  asio::error_code connect(implementation_type&,
+      const endpoint_type&, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Start an asynchronous connect.
+  template <typename Handler, typename IoExecutor>
+  void async_connect(implementation_type&, const endpoint_type&,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    asio::post(io_ex, detail::bind_handler(handler, ec));
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_NULL_SOCKET_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_static_mutex.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_static_mutex.hpp
new file mode 100644
index 00000000000..231cce38ea3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_static_mutex.hpp
@@ -0,0 +1,60 @@
+//
+// detail/null_static_mutex.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NULL_STATIC_MUTEX_HPP
+#define ASIO_DETAIL_NULL_STATIC_MUTEX_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS)
+
+#include "asio/detail/scoped_lock.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+struct null_static_mutex
+{
+  typedef asio::detail::scoped_lock<null_static_mutex> scoped_lock;
+
+  // Initialise the mutex.
+  void init()
+  {
+  }
+
+  // Lock the mutex.
+  void lock()
+  {
+  }
+
+  // Unlock the mutex.
+  void unlock()
+  {
+  }
+
+  int unused_;
+};
+
+#define ASIO_NULL_STATIC_MUTEX_INIT { 0 }
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_HAS_THREADS)
+
+#endif // ASIO_DETAIL_NULL_STATIC_MUTEX_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_thread.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_thread.hpp
new file mode 100644
index 00000000000..3a4e2c0f227
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_thread.hpp
@@ -0,0 +1,67 @@
+//
+// detail/null_thread.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NULL_THREAD_HPP
+#define ASIO_DETAIL_NULL_THREAD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS)
+
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class null_thread
+  : private noncopyable
+{
+public:
+  // Constructor.
+  template <typename Function>
+  null_thread(Function, unsigned int = 0)
+  {
+    asio::detail::throw_error(
+        asio::error::operation_not_supported, "thread");
+  }
+
+  // Destructor.
+  ~null_thread()
+  {
+  }
+
+  // Wait for the thread to exit.
+  void join()
+  {
+  }
+
+  // Get number of CPUs.
+  static std::size_t hardware_concurrency()
+  {
+    return 1;
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_HAS_THREADS)
+
+#endif // ASIO_DETAIL_NULL_THREAD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_tss_ptr.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_tss_ptr.hpp
new file mode 100644
index 00000000000..9257c3c9d3c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/null_tss_ptr.hpp
@@ -0,0 +1,68 @@
+//
+// detail/null_tss_ptr.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_NULL_TSS_PTR_HPP
+#define ASIO_DETAIL_NULL_TSS_PTR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS)
+
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+class null_tss_ptr
+  : private noncopyable
+{
+public:
+  // Constructor.
+  null_tss_ptr()
+    : value_(0)
+  {
+  }
+
+  // Destructor.
+  ~null_tss_ptr()
+  {
+  }
+
+  // Get the value.
+  operator T*() const
+  {
+    return value_;
+  }
+
+  // Set the value.
+  void operator=(T* value)
+  {
+    value_ = value;
+  }
+
+private:
+  T* value_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_HAS_THREADS)
+
+#endif // ASIO_DETAIL_NULL_TSS_PTR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/object_pool.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/object_pool.hpp
new file mode 100644
index 00000000000..3fc9cafde52
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/object_pool.hpp
@@ -0,0 +1,171 @@
+//
+// detail/object_pool.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_OBJECT_POOL_HPP
+#define ASIO_DETAIL_OBJECT_POOL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Object>
+class object_pool;
+
+class object_pool_access
+{
+public:
+  template <typename Object>
+  static Object* create()
+  {
+    return new Object;
+  }
+
+  template <typename Object, typename Arg>
+  static Object* create(Arg arg)
+  {
+    return new Object(arg);
+  }
+
+  template <typename Object>
+  static void destroy(Object* o)
+  {
+    delete o;
+  }
+
+  template <typename Object>
+  static Object*& next(Object* o)
+  {
+    return o->next_;
+  }
+
+  template <typename Object>
+  static Object*& prev(Object* o)
+  {
+    return o->prev_;
+  }
+};
+
+template <typename Object>
+class object_pool
+  : private noncopyable
+{
+public:
+  // Constructor.
+  object_pool()
+    : live_list_(0),
+      free_list_(0)
+  {
+  }
+
+  // Destructor destroys all objects.
+  ~object_pool()
+  {
+    destroy_list(live_list_);
+    destroy_list(free_list_);
+  }
+
+  // Get the object at the start of the live list.
+  Object* first()
+  {
+    return live_list_;
+  }
+
+  // Allocate a new object.
+  Object* alloc()
+  {
+    Object* o = free_list_;
+    if (o)
+      free_list_ = object_pool_access::next(free_list_);
+    else
+      o = object_pool_access::create<Object>();
+
+    object_pool_access::next(o) = live_list_;
+    object_pool_access::prev(o) = 0;
+    if (live_list_)
+      object_pool_access::prev(live_list_) = o;
+    live_list_ = o;
+
+    return o;
+  }
+
+  // Allocate a new object with an argument.
+  template <typename Arg>
+  Object* alloc(Arg arg)
+  {
+    Object* o = free_list_;
+    if (o)
+      free_list_ = object_pool_access::next(free_list_);
+    else
+      o = object_pool_access::create<Object>(arg);
+
+    object_pool_access::next(o) = live_list_;
+    object_pool_access::prev(o) = 0;
+    if (live_list_)
+      object_pool_access::prev(live_list_) = o;
+    live_list_ = o;
+
+    return o;
+  }
+
+  // Free an object. Moves it to the free list. No destructors are run.
+  void free(Object* o)
+  {
+    if (live_list_ == o)
+      live_list_ = object_pool_access::next(o);
+
+    if (object_pool_access::prev(o))
+    {
+      object_pool_access::next(object_pool_access::prev(o))
+        = object_pool_access::next(o);
+    }
+
+    if (object_pool_access::next(o))
+    {
+      object_pool_access::prev(object_pool_access::next(o))
+        = object_pool_access::prev(o);
+    }
+
+    object_pool_access::next(o) = free_list_;
+    object_pool_access::prev(o) = 0;
+    free_list_ = o;
+  }
+
+private:
+  // Helper function to destroy all elements in a list.
+  void destroy_list(Object* list)
+  {
+    while (list)
+    {
+      Object* o = list;
+      list = object_pool_access::next(o);
+      object_pool_access::destroy(o);
+    }
+  }
+
+  // The list of live objects.
+  Object* live_list_;
+
+  // The free list.
+  Object* free_list_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_OBJECT_POOL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/old_win_sdk_compat.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/old_win_sdk_compat.hpp
new file mode 100644
index 00000000000..b0cd2cb11b1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/old_win_sdk_compat.hpp
@@ -0,0 +1,214 @@
+//
+// detail/old_win_sdk_compat.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_OLD_WIN_SDK_COMPAT_HPP
+#define ASIO_DETAIL_OLD_WIN_SDK_COMPAT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+// Guess whether we are building against on old Platform SDK.
+#if !defined(IN6ADDR_ANY_INIT)
+#define ASIO_HAS_OLD_WIN_SDK 1
+#endif // !defined(IN6ADDR_ANY_INIT)
+
+#if defined(ASIO_HAS_OLD_WIN_SDK)
+
+// Emulation of types that are missing from old Platform SDKs.
+//
+// N.B. this emulation is also used if building for a Windows 2000 target with
+// a recent (i.e. Vista or later) SDK, as the SDK does not provide IPv6 support
+// in that case.
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+enum
+{
+  sockaddr_storage_maxsize = 128, // Maximum size.
+  sockaddr_storage_alignsize = (sizeof(__int64)), // Desired alignment.
+  sockaddr_storage_pad1size = (sockaddr_storage_alignsize - sizeof(short)),
+  sockaddr_storage_pad2size = (sockaddr_storage_maxsize -
+      (sizeof(short) + sockaddr_storage_pad1size + sockaddr_storage_alignsize))
+};
+
+struct sockaddr_storage_emulation
+{
+  short ss_family;
+  char __ss_pad1[sockaddr_storage_pad1size];
+  __int64 __ss_align;
+  char __ss_pad2[sockaddr_storage_pad2size];
+};
+
+struct in6_addr_emulation
+{
+  union
+  {
+    u_char Byte[16];
+    u_short Word[8];
+  } u;
+};
+
+#if !defined(s6_addr)
+# define _S6_un u
+# define _S6_u8 Byte
+# define s6_addr _S6_un._S6_u8
+#endif // !defined(s6_addr)
+
+struct sockaddr_in6_emulation
+{
+  short sin6_family;
+  u_short sin6_port;
+  u_long sin6_flowinfo;
+  in6_addr_emulation sin6_addr;
+  u_long sin6_scope_id;
+};
+
+struct ipv6_mreq_emulation
+{
+  in6_addr_emulation ipv6mr_multiaddr;
+  unsigned int ipv6mr_interface;
+};
+
+struct addrinfo_emulation
+{
+  int ai_flags;
+  int ai_family;
+  int ai_socktype;
+  int ai_protocol;
+  size_t ai_addrlen;
+  char* ai_canonname;
+  sockaddr* ai_addr;
+  addrinfo_emulation* ai_next;
+};
+
+#if !defined(AI_PASSIVE)
+# define AI_PASSIVE 0x1
+#endif
+
+#if !defined(AI_CANONNAME)
+# define AI_CANONNAME 0x2
+#endif
+
+#if !defined(AI_NUMERICHOST)
+# define AI_NUMERICHOST 0x4
+#endif
+
+#if !defined(EAI_AGAIN)
+# define EAI_AGAIN WSATRY_AGAIN
+#endif
+
+#if !defined(EAI_BADFLAGS)
+# define EAI_BADFLAGS WSAEINVAL
+#endif
+
+#if !defined(EAI_FAIL)
+# define EAI_FAIL WSANO_RECOVERY
+#endif
+
+#if !defined(EAI_FAMILY)
+# define EAI_FAMILY WSAEAFNOSUPPORT
+#endif
+
+#if !defined(EAI_MEMORY)
+# define EAI_MEMORY WSA_NOT_ENOUGH_MEMORY
+#endif
+
+#if !defined(EAI_NODATA)
+# define EAI_NODATA WSANO_DATA
+#endif
+
+#if !defined(EAI_NONAME)
+# define EAI_NONAME WSAHOST_NOT_FOUND
+#endif
+
+#if !defined(EAI_SERVICE)
+# define EAI_SERVICE WSATYPE_NOT_FOUND
+#endif
+
+#if !defined(EAI_SOCKTYPE)
+# define EAI_SOCKTYPE WSAESOCKTNOSUPPORT
+#endif
+
+#if !defined(NI_NOFQDN)
+# define NI_NOFQDN 0x01
+#endif
+
+#if !defined(NI_NUMERICHOST)
+# define NI_NUMERICHOST 0x02
+#endif
+
+#if !defined(NI_NAMEREQD)
+# define NI_NAMEREQD 0x04
+#endif
+
+#if !defined(NI_NUMERICSERV)
+# define NI_NUMERICSERV 0x08
+#endif
+
+#if !defined(NI_DGRAM)
+# define NI_DGRAM 0x10
+#endif
+
+#if !defined(IPPROTO_IPV6)
+# define IPPROTO_IPV6 41
+#endif
+
+#if !defined(IPV6_UNICAST_HOPS)
+# define IPV6_UNICAST_HOPS 4
+#endif
+
+#if !defined(IPV6_MULTICAST_IF)
+# define IPV6_MULTICAST_IF 9
+#endif
+
+#if !defined(IPV6_MULTICAST_HOPS)
+# define IPV6_MULTICAST_HOPS 10
+#endif
+
+#if !defined(IPV6_MULTICAST_LOOP)
+# define IPV6_MULTICAST_LOOP 11
+#endif
+
+#if !defined(IPV6_JOIN_GROUP)
+# define IPV6_JOIN_GROUP 12
+#endif
+
+#if !defined(IPV6_LEAVE_GROUP)
+# define IPV6_LEAVE_GROUP 13
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_OLD_WIN_SDK)
+
+// Even newer Platform SDKs that support IPv6 may not define IPV6_V6ONLY.
+#if !defined(IPV6_V6ONLY)
+# define IPV6_V6ONLY 27
+#endif
+
+// Some SDKs (e.g. Windows CE) don't define IPPROTO_ICMPV6.
+#if !defined(IPPROTO_ICMPV6)
+# define IPPROTO_ICMPV6 58
+#endif
+
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+#endif // ASIO_DETAIL_OLD_WIN_SDK_COMPAT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/op_queue.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/op_queue.hpp
new file mode 100644
index 00000000000..de059ebef31
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/op_queue.hpp
@@ -0,0 +1,162 @@
+//
+// detail/op_queue.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_OP_QUEUE_HPP
+#define ASIO_DETAIL_OP_QUEUE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Operation>
+class op_queue;
+
+class op_queue_access
+{
+public:
+  template <typename Operation>
+  static Operation* next(Operation* o)
+  {
+    return static_cast<Operation*>(o->next_);
+  }
+
+  template <typename Operation1, typename Operation2>
+  static void next(Operation1*& o1, Operation2* o2)
+  {
+    o1->next_ = o2;
+  }
+
+  template <typename Operation>
+  static void destroy(Operation* o)
+  {
+    o->destroy();
+  }
+
+  template <typename Operation>
+  static Operation*& front(op_queue<Operation>& q)
+  {
+    return q.front_;
+  }
+
+  template <typename Operation>
+  static Operation*& back(op_queue<Operation>& q)
+  {
+    return q.back_;
+  }
+};
+
+template <typename Operation>
+class op_queue
+  : private noncopyable
+{
+public:
+  // Constructor.
+  op_queue()
+    : front_(0),
+      back_(0)
+  {
+  }
+
+  // Destructor destroys all operations.
+  ~op_queue()
+  {
+    while (Operation* op = front_)
+    {
+      pop();
+      op_queue_access::destroy(op);
+    }
+  }
+
+  // Get the operation at the front of the queue.
+  Operation* front()
+  {
+    return front_;
+  }
+
+  // Pop an operation from the front of the queue.
+  void pop()
+  {
+    if (front_)
+    {
+      Operation* tmp = front_;
+      front_ = op_queue_access::next(front_);
+      if (front_ == 0)
+        back_ = 0;
+      op_queue_access::next(tmp, static_cast<Operation*>(0));
+    }
+  }
+
+  // Push an operation on to the back of the queue.
+  void push(Operation* h)
+  {
+    op_queue_access::next(h, static_cast<Operation*>(0));
+    if (back_)
+    {
+      op_queue_access::next(back_, h);
+      back_ = h;
+    }
+    else
+    {
+      front_ = back_ = h;
+    }
+  }
+
+  // Push all operations from another queue on to the back of the queue. The
+  // source queue may contain operations of a derived type.
+  template <typename OtherOperation>
+  void push(op_queue<OtherOperation>& q)
+  {
+    if (Operation* other_front = op_queue_access::front(q))
+    {
+      if (back_)
+        op_queue_access::next(back_, other_front);
+      else
+        front_ = other_front;
+      back_ = op_queue_access::back(q);
+      op_queue_access::front(q) = 0;
+      op_queue_access::back(q) = 0;
+    }
+  }
+
+  // Whether the queue is empty.
+  bool empty() const
+  {
+    return front_ == 0;
+  }
+
+  // Test whether an operation is already enqueued.
+  bool is_enqueued(Operation* o) const
+  {
+    return op_queue_access::next(o) != 0 || back_ == o;
+  }
+
+private:
+  friend class op_queue_access;
+
+  // The front of the queue.
+  Operation* front_;
+
+  // The back of the queue.
+  Operation* back_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_OP_QUEUE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/operation.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/operation.hpp
new file mode 100644
index 00000000000..aa4064b8b95
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/operation.hpp
@@ -0,0 +1,38 @@
+//
+// detail/operation.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_OPERATION_HPP
+#define ASIO_DETAIL_OPERATION_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_operation.hpp"
+#else
+# include "asio/detail/scheduler_operation.hpp"
+#endif
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_HAS_IOCP)
+typedef win_iocp_operation operation;
+#else
+typedef scheduler_operation operation;
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_OPERATION_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/pipe_select_interrupter.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/pipe_select_interrupter.hpp
new file mode 100644
index 00000000000..40173ba1b90
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/pipe_select_interrupter.hpp
@@ -0,0 +1,89 @@
+//
+// detail/pipe_select_interrupter.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_PIPE_SELECT_INTERRUPTER_HPP
+#define ASIO_DETAIL_PIPE_SELECT_INTERRUPTER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_WINDOWS)
+#if !defined(ASIO_WINDOWS_RUNTIME)
+#if !defined(__CYGWIN__)
+#if !defined(__SYMBIAN32__)
+#if !defined(ASIO_HAS_EVENTFD)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class pipe_select_interrupter
+{
+public:
+  // Constructor.
+  ASIO_DECL pipe_select_interrupter();
+
+  // Destructor.
+  ASIO_DECL ~pipe_select_interrupter();
+
+  // Recreate the interrupter's descriptors. Used after a fork.
+  ASIO_DECL void recreate();
+
+  // Interrupt the select call.
+  ASIO_DECL void interrupt();
+
+  // Reset the select interrupt. Returns true if the call was interrupted.
+  ASIO_DECL bool reset();
+
+  // Get the read descriptor to be passed to select.
+  int read_descriptor() const
+  {
+    return read_descriptor_;
+  }
+
+private:
+  // Open the descriptors. Throws on error.
+  ASIO_DECL void open_descriptors();
+
+  // Close the descriptors.
+  ASIO_DECL void close_descriptors();
+
+  // The read end of a connection used to interrupt the select call. This file
+  // descriptor is passed to select such that when it is time to stop, a single
+  // byte will be written on the other end of the connection and this
+  // descriptor will become readable.
+  int read_descriptor_;
+
+  // The write end of a connection used to interrupt the select call. A single
+  // byte may be written to this to wake up the select which is waiting for the
+  // other end to become readable.
+  int write_descriptor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/pipe_select_interrupter.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // !defined(ASIO_HAS_EVENTFD)
+#endif // !defined(__SYMBIAN32__)
+#endif // !defined(__CYGWIN__)
+#endif // !defined(ASIO_WINDOWS_RUNTIME)
+#endif // !defined(ASIO_WINDOWS)
+
+#endif // ASIO_DETAIL_PIPE_SELECT_INTERRUPTER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/pop_options.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/pop_options.hpp
new file mode 100644
index 00000000000..7df258d4f29
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/pop_options.hpp
@@ -0,0 +1,141 @@
+//
+// detail/pop_options.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+// No header guard
+
+#if defined(__COMO__)
+
+// Comeau C++
+
+#elif defined(__DMC__)
+
+// Digital Mars C++
+
+#elif defined(__INTEL_COMPILER) || defined(__ICL) \
+  || defined(__ICC) || defined(__ECC)
+
+// Intel C++
+
+# if (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)
+#  if !defined(ASIO_DISABLE_VISIBILITY)
+#   pragma GCC visibility pop
+#  endif // !defined(ASIO_DISABLE_VISIBILITY)
+# endif // (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)
+
+#elif defined(__clang__)
+
+// Clang
+
+# if defined(__OBJC__)
+#  if !defined(__APPLE_CC__) || (__APPLE_CC__ <= 1)
+#   if defined(ASIO_OBJC_WORKAROUND)
+#    undef Protocol
+#    undef id
+#    undef ASIO_OBJC_WORKAROUND
+#   endif
+#  endif
+# endif
+
+# if !defined(_WIN32) && !defined(__WIN32__) && !defined(WIN32)
+#  if !defined(ASIO_DISABLE_VISIBILITY)
+#   pragma GCC visibility pop
+#  endif // !defined(ASIO_DISABLE_VISIBILITY)
+# endif // !defined(_WIN32) && !defined(__WIN32__) && !defined(WIN32)
+
+#elif defined(__GNUC__)
+
+// GNU C++
+
+# if defined(__MINGW32__) || defined(__CYGWIN__)
+#  pragma pack (pop)
+# endif
+
+# if defined(__OBJC__)
+#  if !defined(__APPLE_CC__) || (__APPLE_CC__ <= 1)
+#   if defined(ASIO_OBJC_WORKAROUND)
+#    undef Protocol
+#    undef id
+#    undef ASIO_OBJC_WORKAROUND
+#   endif
+#  endif
+# endif
+
+# if (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)
+#  if !defined(ASIO_DISABLE_VISIBILITY)
+#   pragma GCC visibility pop
+#  endif // !defined(ASIO_DISABLE_VISIBILITY)
+# endif // (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)
+
+# if (__GNUC__ >= 7)
+#  pragma GCC diagnostic pop
+# endif // (__GNUC__ >= 7)
+
+#elif defined(__KCC)
+
+// Kai C++
+
+#elif defined(__sgi)
+
+// SGI MIPSpro C++
+
+#elif defined(__DECCXX)
+
+// Compaq Tru64 Unix cxx
+
+#elif defined(__ghs)
+
+// Greenhills C++
+
+#elif defined(__BORLANDC__)
+
+// Borland C++
+
+# pragma option pop
+# pragma nopushoptwarn
+# pragma nopackwarning
+
+#elif defined(__MWERKS__)
+
+// Metrowerks CodeWarrior
+
+#elif defined(__SUNPRO_CC)
+
+// Sun Workshop Compiler C++
+
+#elif defined(__HP_aCC)
+
+// HP aCC
+
+#elif defined(__MRC__) || defined(__SC__)
+
+// MPW MrCpp or SCpp
+
+#elif defined(__IBMCPP__)
+
+// IBM Visual Age
+
+#elif defined(_MSC_VER)
+
+// Microsoft Visual C++
+//
+// Must remain the last #elif since some other vendors (Metrowerks, for example)
+// also #define _MSC_VER
+
+# pragma warning (pop)
+# pragma pack (pop)
+
+# if defined(__cplusplus_cli) || defined(__cplusplus_winrt)
+#  if defined(ASIO_CLR_WORKAROUND)
+#   undef generic
+#   undef ASIO_CLR_WORKAROUND
+#  endif
+# endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_event.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_event.hpp
new file mode 100644
index 00000000000..ea4132e5a98
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_event.hpp
@@ -0,0 +1,162 @@
+//
+// detail/posix_event.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_POSIX_EVENT_HPP
+#define ASIO_DETAIL_POSIX_EVENT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_PTHREADS)
+
+#include <pthread.h>
+#include "asio/detail/assert.hpp"
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class posix_event
+  : private noncopyable
+{
+public:
+  // Constructor.
+  ASIO_DECL posix_event();
+
+  // Destructor.
+  ~posix_event()
+  {
+    ::pthread_cond_destroy(&cond_);
+  }
+
+  // Signal the event. (Retained for backward compatibility.)
+  template <typename Lock>
+  void signal(Lock& lock)
+  {
+    this->signal_all(lock);
+  }
+
+  // Signal all waiters.
+  template <typename Lock>
+  void signal_all(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    (void)lock;
+    state_ |= 1;
+    ::pthread_cond_broadcast(&cond_); // Ignore EINVAL.
+  }
+
+  // Unlock the mutex and signal one waiter.
+  template <typename Lock>
+  void unlock_and_signal_one(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    state_ |= 1;
+    bool have_waiters = (state_ > 1);
+    lock.unlock();
+    if (have_waiters)
+      ::pthread_cond_signal(&cond_); // Ignore EINVAL.
+  }
+
+  // If there's a waiter, unlock the mutex and signal it.
+  template <typename Lock>
+  bool maybe_unlock_and_signal_one(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    state_ |= 1;
+    if (state_ > 1)
+    {
+      lock.unlock();
+      ::pthread_cond_signal(&cond_); // Ignore EINVAL.
+      return true;
+    }
+    return false;
+  }
+
+  // Reset the event.
+  template <typename Lock>
+  void clear(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    (void)lock;
+    state_ &= ~std::size_t(1);
+  }
+
+  // Wait for the event to become signalled.
+  template <typename Lock>
+  void wait(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    while ((state_ & 1) == 0)
+    {
+      state_ += 2;
+      ::pthread_cond_wait(&cond_, &lock.mutex().mutex_); // Ignore EINVAL.
+      state_ -= 2;
+    }
+  }
+
+  // Timed wait for the event to become signalled.
+  template <typename Lock>
+  bool wait_for_usec(Lock& lock, long usec)
+  {
+    ASIO_ASSERT(lock.locked());
+    if ((state_ & 1) == 0)
+    {
+      state_ += 2;
+      timespec ts;
+#if (defined(__MACH__) && defined(__APPLE__)) \
+      || (defined(__ANDROID__) && (__ANDROID_API__ < 21) \
+          && defined(HAVE_PTHREAD_COND_TIMEDWAIT_RELATIVE))
+      ts.tv_sec = usec / 1000000;
+      ts.tv_nsec = (usec % 1000000) * 1000;
+      ::pthread_cond_timedwait_relative_np(
+          &cond_, &lock.mutex().mutex_, &ts); // Ignore EINVAL.
+#else // (defined(__MACH__) && defined(__APPLE__))
+      // || (defined(__ANDROID__) && (__ANDROID_API__ < 21)
+      //     && defined(HAVE_PTHREAD_COND_TIMEDWAIT_RELATIVE))
+      if (::clock_gettime(CLOCK_MONOTONIC, &ts) == 0)
+      {
+        ts.tv_sec += usec / 1000000;
+        ts.tv_nsec += (usec % 1000000) * 1000;
+        ts.tv_sec += ts.tv_nsec / 1000000000;
+        ts.tv_nsec = ts.tv_nsec % 1000000000;
+        ::pthread_cond_timedwait(&cond_,
+            &lock.mutex().mutex_, &ts); // Ignore EINVAL.
+      }
+#endif // (defined(__MACH__) && defined(__APPLE__))
+       // || (defined(__ANDROID__) && (__ANDROID_API__ < 21)
+       //     && defined(HAVE_PTHREAD_COND_TIMEDWAIT_RELATIVE))
+      state_ -= 2;
+    }
+    return (state_ & 1) != 0;
+  }
+
+private:
+  ::pthread_cond_t cond_;
+  std::size_t state_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/posix_event.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_PTHREADS)
+
+#endif // ASIO_DETAIL_POSIX_EVENT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_fd_set_adapter.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_fd_set_adapter.hpp
new file mode 100644
index 00000000000..6ce97c0d30c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_fd_set_adapter.hpp
@@ -0,0 +1,118 @@
+//
+// detail/posix_fd_set_adapter.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_POSIX_FD_SET_ADAPTER_HPP
+#define ASIO_DETAIL_POSIX_FD_SET_ADAPTER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_WINDOWS) \
+  && !defined(__CYGWIN__) \
+  && !defined(ASIO_WINDOWS_RUNTIME)
+
+#include <cstring>
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/reactor_op_queue.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Adapts the FD_SET type to meet the Descriptor_Set concept's requirements.
+class posix_fd_set_adapter : noncopyable
+{
+public:
+  posix_fd_set_adapter()
+    : max_descriptor_(invalid_socket)
+  {
+    using namespace std; // Needed for memset on Solaris.
+    FD_ZERO(&fd_set_);
+  }
+
+  void reset()
+  {
+    using namespace std; // Needed for memset on Solaris.
+    FD_ZERO(&fd_set_);
+  }
+
+  bool set(socket_type descriptor)
+  {
+    if (descriptor < (socket_type)FD_SETSIZE)
+    {
+      if (max_descriptor_ == invalid_socket || descriptor > max_descriptor_)
+        max_descriptor_ = descriptor;
+      FD_SET(descriptor, &fd_set_);
+      return true;
+    }
+    return false;
+  }
+
+  void set(reactor_op_queue<socket_type>& operations, op_queue<operation>& ops)
+  {
+    reactor_op_queue<socket_type>::iterator i = operations.begin();
+    while (i != operations.end())
+    {
+      reactor_op_queue<socket_type>::iterator op_iter = i++;
+      if (!set(op_iter->first))
+      {
+        asio::error_code ec(error::fd_set_failure);
+        operations.cancel_operations(op_iter, ops, ec);
+      }
+    }
+  }
+
+  bool is_set(socket_type descriptor) const
+  {
+    return FD_ISSET(descriptor, &fd_set_) != 0;
+  }
+
+  operator fd_set*()
+  {
+    return &fd_set_;
+  }
+
+  socket_type max_descriptor() const
+  {
+    return max_descriptor_;
+  }
+
+  void perform(reactor_op_queue<socket_type>& operations,
+      op_queue<operation>& ops) const
+  {
+    reactor_op_queue<socket_type>::iterator i = operations.begin();
+    while (i != operations.end())
+    {
+      reactor_op_queue<socket_type>::iterator op_iter = i++;
+      if (is_set(op_iter->first))
+        operations.perform_operations(op_iter, ops);
+    }
+  }
+
+private:
+  mutable fd_set fd_set_;
+  socket_type max_descriptor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_WINDOWS)
+       // && !defined(__CYGWIN__)
+       // && !defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_POSIX_FD_SET_ADAPTER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_global.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_global.hpp
new file mode 100644
index 00000000000..352eb228d3b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_global.hpp
@@ -0,0 +1,80 @@
+//
+// detail/posix_global.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_POSIX_GLOBAL_HPP
+#define ASIO_DETAIL_POSIX_GLOBAL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_PTHREADS)
+
+#include <exception>
+#include <pthread.h>
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+struct posix_global_impl
+{
+  // Helper function to perform initialisation.
+  static void do_init()
+  {
+    instance_.static_ptr_ = instance_.ptr_ = new T;
+  }
+
+  // Destructor automatically cleans up the global.
+  ~posix_global_impl()
+  {
+    delete static_ptr_;
+  }
+
+  static ::pthread_once_t init_once_;
+  static T* static_ptr_;
+  static posix_global_impl instance_;
+  T* ptr_;
+};
+
+template <typename T>
+::pthread_once_t posix_global_impl<T>::init_once_ = PTHREAD_ONCE_INIT;
+
+template <typename T>
+T* posix_global_impl<T>::static_ptr_ = 0;
+
+template <typename T>
+posix_global_impl<T> posix_global_impl<T>::instance_;
+
+template <typename T>
+T& posix_global()
+{
+  int result = ::pthread_once(
+      &posix_global_impl<T>::init_once_,
+      &posix_global_impl<T>::do_init);
+
+  if (result != 0)
+    std::terminate();
+
+  return *posix_global_impl<T>::instance_.ptr_;
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_PTHREADS)
+
+#endif // ASIO_DETAIL_POSIX_GLOBAL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_mutex.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_mutex.hpp
new file mode 100644
index 00000000000..9849408d842
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_mutex.hpp
@@ -0,0 +1,76 @@
+//
+// detail/posix_mutex.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_POSIX_MUTEX_HPP
+#define ASIO_DETAIL_POSIX_MUTEX_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_PTHREADS)
+
+#include <pthread.h>
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/scoped_lock.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class posix_event;
+
+class posix_mutex
+  : private noncopyable
+{
+public:
+  typedef asio::detail::scoped_lock<posix_mutex> scoped_lock;
+
+  // Constructor.
+  ASIO_DECL posix_mutex();
+
+  // Destructor.
+  ~posix_mutex()
+  {
+    ::pthread_mutex_destroy(&mutex_); // Ignore EBUSY.
+  }
+
+  // Lock the mutex.
+  void lock()
+  {
+    (void)::pthread_mutex_lock(&mutex_); // Ignore EINVAL.
+  }
+
+  // Unlock the mutex.
+  void unlock()
+  {
+    (void)::pthread_mutex_unlock(&mutex_); // Ignore EINVAL.
+  }
+
+private:
+  friend class posix_event;
+  ::pthread_mutex_t mutex_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/posix_mutex.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_PTHREADS)
+
+#endif // ASIO_DETAIL_POSIX_MUTEX_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_signal_blocker.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_signal_blocker.hpp
new file mode 100644
index 00000000000..6a947639148
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_signal_blocker.hpp
@@ -0,0 +1,85 @@
+//
+// detail/posix_signal_blocker.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_POSIX_SIGNAL_BLOCKER_HPP
+#define ASIO_DETAIL_POSIX_SIGNAL_BLOCKER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_PTHREADS)
+
+#include <csignal>
+#include <pthread.h>
+#include <signal.h>
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class posix_signal_blocker
+  : private noncopyable
+{
+public:
+  // Constructor blocks all signals for the calling thread.
+  posix_signal_blocker()
+    : blocked_(false)
+  {
+    sigset_t new_mask;
+    sigfillset(&new_mask);
+    blocked_ = (pthread_sigmask(SIG_BLOCK, &new_mask, &old_mask_) == 0);
+  }
+
+  // Destructor restores the previous signal mask.
+  ~posix_signal_blocker()
+  {
+    if (blocked_)
+      pthread_sigmask(SIG_SETMASK, &old_mask_, 0);
+  }
+
+  // Block all signals for the calling thread.
+  void block()
+  {
+    if (!blocked_)
+    {
+      sigset_t new_mask;
+      sigfillset(&new_mask);
+      blocked_ = (pthread_sigmask(SIG_BLOCK, &new_mask, &old_mask_) == 0);
+    }
+  }
+
+  // Restore the previous signal mask.
+  void unblock()
+  {
+    if (blocked_)
+      blocked_ = (pthread_sigmask(SIG_SETMASK, &old_mask_, 0) != 0);
+  }
+
+private:
+  // Have signals been blocked.
+  bool blocked_;
+
+  // The previous signal mask.
+  sigset_t old_mask_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_PTHREADS)
+
+#endif // ASIO_DETAIL_POSIX_SIGNAL_BLOCKER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_static_mutex.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_static_mutex.hpp
new file mode 100644
index 00000000000..7ac67ad92c0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_static_mutex.hpp
@@ -0,0 +1,64 @@
+//
+// detail/posix_static_mutex.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_POSIX_STATIC_MUTEX_HPP
+#define ASIO_DETAIL_POSIX_STATIC_MUTEX_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_PTHREADS)
+
+#include <pthread.h>
+#include "asio/detail/scoped_lock.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+struct posix_static_mutex
+{
+  typedef asio::detail::scoped_lock<posix_static_mutex> scoped_lock;
+
+  // Initialise the mutex.
+  void init()
+  {
+    // Nothing to do.
+  }
+
+  // Lock the mutex.
+  void lock()
+  {
+    (void)::pthread_mutex_lock(&mutex_); // Ignore EINVAL.
+  }
+
+  // Unlock the mutex.
+  void unlock()
+  {
+    (void)::pthread_mutex_unlock(&mutex_); // Ignore EINVAL.
+  }
+
+  ::pthread_mutex_t mutex_;
+};
+
+#define ASIO_POSIX_STATIC_MUTEX_INIT { PTHREAD_MUTEX_INITIALIZER }
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_PTHREADS)
+
+#endif // ASIO_DETAIL_POSIX_STATIC_MUTEX_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_thread.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_thread.hpp
new file mode 100644
index 00000000000..02d01b3aac8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_thread.hpp
@@ -0,0 +1,109 @@
+//
+// detail/posix_thread.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_POSIX_THREAD_HPP
+#define ASIO_DETAIL_POSIX_THREAD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_PTHREADS)
+
+#include <cstddef>
+#include <pthread.h>
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+extern "C"
+{
+  ASIO_DECL void* asio_detail_posix_thread_function(void* arg);
+}
+
+class posix_thread
+  : private noncopyable
+{
+public:
+  // Constructor.
+  template <typename Function>
+  posix_thread(Function f, unsigned int = 0)
+    : joined_(false)
+  {
+    start_thread(new func<Function>(f));
+  }
+
+  // Destructor.
+  ASIO_DECL ~posix_thread();
+
+  // Wait for the thread to exit.
+  ASIO_DECL void join();
+
+  // Get number of CPUs.
+  ASIO_DECL static std::size_t hardware_concurrency();
+
+private:
+  friend void* asio_detail_posix_thread_function(void* arg);
+
+  class func_base
+  {
+  public:
+    virtual ~func_base() {}
+    virtual void run() = 0;
+  };
+
+  struct auto_func_base_ptr
+  {
+    func_base* ptr;
+    ~auto_func_base_ptr() { delete ptr; }
+  };
+
+  template <typename Function>
+  class func
+    : public func_base
+  {
+  public:
+    func(Function f)
+      : f_(f)
+    {
+    }
+
+    virtual void run()
+    {
+      f_();
+    }
+
+  private:
+    Function f_;
+  };
+
+  ASIO_DECL void start_thread(func_base* arg);
+
+  ::pthread_t thread_;
+  bool joined_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/posix_thread.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_PTHREADS)
+
+#endif // ASIO_DETAIL_POSIX_THREAD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_tss_ptr.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_tss_ptr.hpp
new file mode 100644
index 00000000000..f760c59ca92
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/posix_tss_ptr.hpp
@@ -0,0 +1,79 @@
+//
+// detail/posix_tss_ptr.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_POSIX_TSS_PTR_HPP
+#define ASIO_DETAIL_POSIX_TSS_PTR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_PTHREADS)
+
+#include <pthread.h>
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Helper function to create thread-specific storage.
+ASIO_DECL void posix_tss_ptr_create(pthread_key_t& key);
+
+template <typename T>
+class posix_tss_ptr
+  : private noncopyable
+{
+public:
+  // Constructor.
+  posix_tss_ptr()
+  {
+    posix_tss_ptr_create(tss_key_);
+  }
+
+  // Destructor.
+  ~posix_tss_ptr()
+  {
+    ::pthread_key_delete(tss_key_);
+  }
+
+  // Get the value.
+  operator T*() const
+  {
+    return static_cast<T*>(::pthread_getspecific(tss_key_));
+  }
+
+  // Set the value.
+  void operator=(T* value)
+  {
+    ::pthread_setspecific(tss_key_, value);
+  }
+
+private:
+  // Thread-specific storage to allow unlocked access to determine whether a
+  // thread is a member of the pool.
+  pthread_key_t tss_key_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/posix_tss_ptr.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_PTHREADS)
+
+#endif // ASIO_DETAIL_POSIX_TSS_PTR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/push_options.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/push_options.hpp
new file mode 100644
index 00000000000..fa8725d4a34
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/push_options.hpp
@@ -0,0 +1,181 @@
+//
+// detail/push_options.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+// No header guard
+
+#if defined(__COMO__)
+
+// Comeau C++
+
+#elif defined(__DMC__)
+
+// Digital Mars C++
+
+#elif defined(__INTEL_COMPILER) || defined(__ICL) \
+  || defined(__ICC) || defined(__ECC)
+
+// Intel C++
+
+# if (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)
+#  if !defined(ASIO_DISABLE_VISIBILITY)
+#   pragma GCC visibility push (default)
+#  endif // !defined(ASIO_DISABLE_VISIBILITY)
+# endif // (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)
+
+#elif defined(__clang__)
+
+// Clang
+
+# if defined(__OBJC__)
+#  if !defined(__APPLE_CC__) || (__APPLE_CC__ <= 1)
+#   if !defined(ASIO_DISABLE_OBJC_WORKAROUND)
+#    if !defined(Protocol) && !defined(id)
+#     define Protocol cpp_Protocol
+#     define id cpp_id
+#     define ASIO_OBJC_WORKAROUND
+#    endif
+#   endif
+#  endif
+# endif
+
+# if !defined(_WIN32) && !defined(__WIN32__) && !defined(WIN32)
+#  if !defined(ASIO_DISABLE_VISIBILITY)
+#   pragma GCC visibility push (default)
+#  endif // !defined(ASIO_DISABLE_VISIBILITY)
+# endif // !defined(_WIN32) && !defined(__WIN32__) && !defined(WIN32)
+
+#elif defined(__GNUC__)
+
+// GNU C++
+
+# if defined(__MINGW32__) || defined(__CYGWIN__)
+#  pragma pack (push, 8)
+# endif
+
+# if defined(__OBJC__)
+#  if !defined(__APPLE_CC__) || (__APPLE_CC__ <= 1)
+#   if !defined(ASIO_DISABLE_OBJC_WORKAROUND)
+#    if !defined(Protocol) && !defined(id)
+#     define Protocol cpp_Protocol
+#     define id cpp_id
+#     define ASIO_OBJC_WORKAROUND
+#    endif
+#   endif
+#  endif
+# endif
+
+# if (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)
+#  if !defined(ASIO_DISABLE_VISIBILITY)
+#   pragma GCC visibility push (default)
+#  endif // !defined(ASIO_DISABLE_VISIBILITY)
+# endif // (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)
+
+# if (__GNUC__ >= 7)
+#  pragma GCC diagnostic push
+#  pragma GCC diagnostic ignored "-Wimplicit-fallthrough"
+# endif // (__GNUC__ >= 7)
+
+#elif defined(__KCC)
+
+// Kai C++
+
+#elif defined(__sgi)
+
+// SGI MIPSpro C++
+
+#elif defined(__DECCXX)
+
+// Compaq Tru64 Unix cxx
+
+#elif defined(__ghs)
+
+// Greenhills C++
+
+#elif defined(__BORLANDC__)
+
+// Borland C++
+
+# pragma option push -a8 -b -Ve- -Vx- -w-inl -vi-
+# pragma nopushoptwarn
+# pragma nopackwarning
+# if !defined(__MT__)
+#  error Multithreaded RTL must be selected.
+# endif // !defined(__MT__)
+
+#elif defined(__MWERKS__)
+
+// Metrowerks CodeWarrior
+
+#elif defined(__SUNPRO_CC)
+
+// Sun Workshop Compiler C++
+
+#elif defined(__HP_aCC)
+
+// HP aCC
+
+#elif defined(__MRC__) || defined(__SC__)
+
+// MPW MrCpp or SCpp
+
+#elif defined(__IBMCPP__)
+
+// IBM Visual Age
+
+#elif defined(_MSC_VER)
+
+// Microsoft Visual C++
+//
+// Must remain the last #elif since some other vendors (Metrowerks, for example)
+// also #define _MSC_VER
+
+# pragma warning (disable:4103)
+# pragma warning (push)
+# pragma warning (disable:4127)
+# pragma warning (disable:4180)
+# pragma warning (disable:4244)
+# pragma warning (disable:4355)
+# pragma warning (disable:4510)
+# pragma warning (disable:4512)
+# pragma warning (disable:4610)
+# pragma warning (disable:4675)
+# if (_MSC_VER < 1600)
+// Visual Studio 2008 generates spurious warnings about unused parameters.
+#  pragma warning (disable:4100)
+# endif // (_MSC_VER < 1600)
+# if defined(_M_IX86) && defined(_Wp64)
+// The /Wp64 option is broken. If you want to check 64 bit portability, use a
+// 64 bit compiler!
+#  pragma warning (disable:4311)
+#  pragma warning (disable:4312)
+# endif // defined(_M_IX86) && defined(_Wp64)
+# pragma pack (push, 8)
+// Note that if the /Og optimisation flag is enabled with MSVC6, the compiler
+// has a tendency to incorrectly optimise away some calls to member template
+// functions, even though those functions contain code that should not be
+// optimised away! Therefore we will always disable this optimisation option
+// for the MSVC6 compiler.
+# if (_MSC_VER < 1300)
+#  pragma optimize ("g", off)
+# endif
+# if !defined(_MT)
+#  error Multithreaded RTL must be selected.
+# endif // !defined(_MT)
+
+# if defined(__cplusplus_cli) || defined(__cplusplus_winrt)
+#  if !defined(ASIO_DISABLE_CLR_WORKAROUND)
+#   if !defined(generic)
+#    define generic cpp_generic
+#    define ASIO_CLR_WORKAROUND
+#   endif
+#  endif
+# endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_descriptor_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_descriptor_service.hpp
new file mode 100644
index 00000000000..7894dc7aee7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_descriptor_service.hpp
@@ -0,0 +1,391 @@
+//
+// detail/reactive_descriptor_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_DESCRIPTOR_SERVICE_HPP
+#define ASIO_DETAIL_REACTIVE_DESCRIPTOR_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_WINDOWS) \
+  && !defined(ASIO_WINDOWS_RUNTIME) \
+  && !defined(__CYGWIN__)
+
+#include "asio/buffer.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/descriptor_ops.hpp"
+#include "asio/detail/descriptor_read_op.hpp"
+#include "asio/detail/descriptor_write_op.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/reactive_null_buffers_op.hpp"
+#include "asio/detail/reactive_wait_op.hpp"
+#include "asio/detail/reactor.hpp"
+#include "asio/posix/descriptor_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class reactive_descriptor_service :
+  public execution_context_service_base<reactive_descriptor_service>
+{
+public:
+  // The native type of a descriptor.
+  typedef int native_handle_type;
+
+  // The implementation type of the descriptor.
+  class implementation_type
+    : private asio::detail::noncopyable
+  {
+  public:
+    // Default constructor.
+    implementation_type()
+      : descriptor_(-1),
+        state_(0)
+    {
+    }
+
+  private:
+    // Only this service will have access to the internal values.
+    friend class reactive_descriptor_service;
+
+    // The native descriptor representation.
+    int descriptor_;
+
+    // The current state of the descriptor.
+    descriptor_ops::state_type state_;
+
+    // Per-descriptor data used by the reactor.
+    reactor::per_descriptor_data reactor_data_;
+  };
+
+  // Constructor.
+  ASIO_DECL reactive_descriptor_service(execution_context& context);
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Construct a new descriptor implementation.
+  ASIO_DECL void construct(implementation_type& impl);
+
+  // Move-construct a new descriptor implementation.
+  ASIO_DECL void move_construct(implementation_type& impl,
+      implementation_type& other_impl);
+
+  // Move-assign from another descriptor implementation.
+  ASIO_DECL void move_assign(implementation_type& impl,
+      reactive_descriptor_service& other_service,
+      implementation_type& other_impl);
+
+  // Destroy a descriptor implementation.
+  ASIO_DECL void destroy(implementation_type& impl);
+
+  // Assign a native descriptor to a descriptor implementation.
+  ASIO_DECL asio::error_code assign(implementation_type& impl,
+      const native_handle_type& native_descriptor,
+      asio::error_code& ec);
+
+  // Determine whether the descriptor is open.
+  bool is_open(const implementation_type& impl) const
+  {
+    return impl.descriptor_ != -1;
+  }
+
+  // Destroy a descriptor implementation.
+  ASIO_DECL asio::error_code close(implementation_type& impl,
+      asio::error_code& ec);
+
+  // Get the native descriptor representation.
+  native_handle_type native_handle(const implementation_type& impl) const
+  {
+    return impl.descriptor_;
+  }
+
+  // Release ownership of the native descriptor representation.
+  ASIO_DECL native_handle_type release(implementation_type& impl);
+
+  // Cancel all operations associated with the descriptor.
+  ASIO_DECL asio::error_code cancel(implementation_type& impl,
+      asio::error_code& ec);
+
+  // Perform an IO control command on the descriptor.
+  template <typename IO_Control_Command>
+  asio::error_code io_control(implementation_type& impl,
+      IO_Control_Command& command, asio::error_code& ec)
+  {
+    descriptor_ops::ioctl(impl.descriptor_, impl.state_,
+        command.name(), static_cast<ioctl_arg_type*>(command.data()), ec);
+    return ec;
+  }
+
+  // Gets the non-blocking mode of the descriptor.
+  bool non_blocking(const implementation_type& impl) const
+  {
+    return (impl.state_ & descriptor_ops::user_set_non_blocking) != 0;
+  }
+
+  // Sets the non-blocking mode of the descriptor.
+  asio::error_code non_blocking(implementation_type& impl,
+      bool mode, asio::error_code& ec)
+  {
+    descriptor_ops::set_user_non_blocking(
+        impl.descriptor_, impl.state_, mode, ec);
+    return ec;
+  }
+
+  // Gets the non-blocking mode of the native descriptor implementation.
+  bool native_non_blocking(const implementation_type& impl) const
+  {
+    return (impl.state_ & descriptor_ops::internal_non_blocking) != 0;
+  }
+
+  // Sets the non-blocking mode of the native descriptor implementation.
+  asio::error_code native_non_blocking(implementation_type& impl,
+      bool mode, asio::error_code& ec)
+  {
+    descriptor_ops::set_internal_non_blocking(
+        impl.descriptor_, impl.state_, mode, ec);
+    return ec;
+  }
+
+  // Wait for the descriptor to become ready to read, ready to write, or to have
+  // pending error conditions.
+  asio::error_code wait(implementation_type& impl,
+      posix::descriptor_base::wait_type w, asio::error_code& ec)
+  {
+    switch (w)
+    {
+    case posix::descriptor_base::wait_read:
+      descriptor_ops::poll_read(impl.descriptor_, impl.state_, ec);
+      break;
+    case posix::descriptor_base::wait_write:
+      descriptor_ops::poll_write(impl.descriptor_, impl.state_, ec);
+      break;
+    case posix::descriptor_base::wait_error:
+      descriptor_ops::poll_error(impl.descriptor_, impl.state_, ec);
+      break;
+    default:
+      ec = asio::error::invalid_argument;
+      break;
+    }
+
+    return ec;
+  }
+
+  // Asynchronously wait for the descriptor to become ready to read, ready to
+  // write, or to have pending error conditions.
+  template <typename Handler, typename IoExecutor>
+  void async_wait(implementation_type& impl,
+      posix::descriptor_base::wait_type w,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_wait_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "descriptor",
+          &impl, impl.descriptor_, "async_wait"));
+
+    int op_type;
+    switch (w)
+    {
+    case posix::descriptor_base::wait_read:
+        op_type = reactor::read_op;
+        break;
+    case posix::descriptor_base::wait_write:
+        op_type = reactor::write_op;
+        break;
+    case posix::descriptor_base::wait_error:
+        op_type = reactor::except_op;
+        break;
+      default:
+        p.p->ec_ = asio::error::invalid_argument;
+        reactor_.post_immediate_completion(p.p, is_continuation);
+        p.v = p.p = 0;
+        return;
+    }
+
+    start_op(impl, op_type, p.p, is_continuation, false, false);
+    p.v = p.p = 0;
+  }
+
+  // Write some data to the descriptor.
+  template <typename ConstBufferSequence>
+  size_t write_some(implementation_type& impl,
+      const ConstBufferSequence& buffers, asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence> bufs(buffers);
+
+    return descriptor_ops::sync_write(impl.descriptor_, impl.state_,
+        bufs.buffers(), bufs.count(), bufs.all_empty(), ec);
+  }
+
+  // Wait until data can be written without blocking.
+  size_t write_some(implementation_type& impl,
+      const null_buffers&, asio::error_code& ec)
+  {
+    // Wait for descriptor to become ready.
+    descriptor_ops::poll_write(impl.descriptor_, impl.state_, ec);
+
+    return 0;
+  }
+
+  // Start an asynchronous write. The data being sent must be valid for the
+  // lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_write_some(implementation_type& impl,
+      const ConstBufferSequence& buffers, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef descriptor_write_op<ConstBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.descriptor_, buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "descriptor",
+          &impl, impl.descriptor_, "async_write_some"));
+
+    start_op(impl, reactor::write_op, p.p, is_continuation, true,
+        buffer_sequence_adapter<asio::const_buffer,
+          ConstBufferSequence>::all_empty(buffers));
+    p.v = p.p = 0;
+  }
+
+  // Start an asynchronous wait until data can be written without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_write_some(implementation_type& impl,
+      const null_buffers&, Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "descriptor",
+          &impl, impl.descriptor_, "async_write_some(null_buffers)"));
+
+    start_op(impl, reactor::write_op, p.p, is_continuation, false, false);
+    p.v = p.p = 0;
+  }
+
+  // Read some data from the stream. Returns the number of bytes read.
+  template <typename MutableBufferSequence>
+  size_t read_some(implementation_type& impl,
+      const MutableBufferSequence& buffers, asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(buffers);
+
+    return descriptor_ops::sync_read(impl.descriptor_, impl.state_,
+        bufs.buffers(), bufs.count(), bufs.all_empty(), ec);
+  }
+
+  // Wait until data can be read without blocking.
+  size_t read_some(implementation_type& impl,
+      const null_buffers&, asio::error_code& ec)
+  {
+    // Wait for descriptor to become ready.
+    descriptor_ops::poll_read(impl.descriptor_, impl.state_, ec);
+
+    return 0;
+  }
+
+  // Start an asynchronous read. The buffer for the data being read must be
+  // valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_read_some(implementation_type& impl,
+      const MutableBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef descriptor_read_op<MutableBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.descriptor_, buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "descriptor",
+          &impl, impl.descriptor_, "async_read_some"));
+
+    start_op(impl, reactor::read_op, p.p, is_continuation, true,
+        buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::all_empty(buffers));
+    p.v = p.p = 0;
+  }
+
+  // Wait until data can be read without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_read_some(implementation_type& impl,
+      const null_buffers&, Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "descriptor",
+          &impl, impl.descriptor_, "async_read_some(null_buffers)"));
+
+    start_op(impl, reactor::read_op, p.p, is_continuation, false, false);
+    p.v = p.p = 0;
+  }
+
+private:
+  // Start the asynchronous operation.
+  ASIO_DECL void start_op(implementation_type& impl, int op_type,
+      reactor_op* op, bool is_continuation, bool is_non_blocking, bool noop);
+
+  // The selector that performs event demultiplexing for the service.
+  reactor& reactor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/reactive_descriptor_service.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // !defined(ASIO_WINDOWS)
+       //   && !defined(ASIO_WINDOWS_RUNTIME)
+       //   && !defined(__CYGWIN__)
+
+#endif // ASIO_DETAIL_REACTIVE_DESCRIPTOR_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_null_buffers_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_null_buffers_op.hpp
new file mode 100644
index 00000000000..9013f5766eb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_null_buffers_op.hpp
@@ -0,0 +1,92 @@
+//
+// detail/reactive_null_buffers_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_NULL_BUFFERS_OP_HPP
+#define ASIO_DETAIL_REACTIVE_NULL_BUFFERS_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler, typename IoExecutor>
+class reactive_null_buffers_op : public reactor_op
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(reactive_null_buffers_op);
+
+  reactive_null_buffers_op(Handler& handler, const IoExecutor& io_ex)
+    : reactor_op(&reactive_null_buffers_op::do_perform,
+        &reactive_null_buffers_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static status do_perform(reactor_op*)
+  {
+    return done;
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    reactive_null_buffers_op* o(static_cast<reactive_null_buffers_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, o->ec_, o->bytes_transferred_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_REACTIVE_NULL_BUFFERS_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_serial_port_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_serial_port_service.hpp
new file mode 100644
index 00000000000..10d80738c9d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_serial_port_service.hpp
@@ -0,0 +1,238 @@
+//
+// detail/reactive_serial_port_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2008 Rep Invariant Systems, Inc. (info@repinvariant.com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_SERIAL_PORT_SERVICE_HPP
+#define ASIO_DETAIL_REACTIVE_SERIAL_PORT_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_SERIAL_PORT)
+#if !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+#include <string>
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/serial_port_base.hpp"
+#include "asio/detail/descriptor_ops.hpp"
+#include "asio/detail/reactive_descriptor_service.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Extend reactive_descriptor_service to provide serial port support.
+class reactive_serial_port_service :
+  public execution_context_service_base<reactive_serial_port_service>
+{
+public:
+  // The native type of a serial port.
+  typedef reactive_descriptor_service::native_handle_type native_handle_type;
+
+  // The implementation type of the serial port.
+  typedef reactive_descriptor_service::implementation_type implementation_type;
+
+  ASIO_DECL reactive_serial_port_service(execution_context& context);
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Construct a new serial port implementation.
+  void construct(implementation_type& impl)
+  {
+    descriptor_service_.construct(impl);
+  }
+
+  // Move-construct a new serial port implementation.
+  void move_construct(implementation_type& impl,
+      implementation_type& other_impl)
+  {
+    descriptor_service_.move_construct(impl, other_impl);
+  }
+
+  // Move-assign from another serial port implementation.
+  void move_assign(implementation_type& impl,
+      reactive_serial_port_service& other_service,
+      implementation_type& other_impl)
+  {
+    descriptor_service_.move_assign(impl,
+        other_service.descriptor_service_, other_impl);
+  }
+
+  // Destroy a serial port implementation.
+  void destroy(implementation_type& impl)
+  {
+    descriptor_service_.destroy(impl);
+  }
+
+  // Open the serial port using the specified device name.
+  ASIO_DECL asio::error_code open(implementation_type& impl,
+      const std::string& device, asio::error_code& ec);
+
+  // Assign a native descriptor to a serial port implementation.
+  asio::error_code assign(implementation_type& impl,
+      const native_handle_type& native_descriptor,
+      asio::error_code& ec)
+  {
+    return descriptor_service_.assign(impl, native_descriptor, ec);
+  }
+
+  // Determine whether the serial port is open.
+  bool is_open(const implementation_type& impl) const
+  {
+    return descriptor_service_.is_open(impl);
+  }
+
+  // Destroy a serial port implementation.
+  asio::error_code close(implementation_type& impl,
+      asio::error_code& ec)
+  {
+    return descriptor_service_.close(impl, ec);
+  }
+
+  // Get the native serial port representation.
+  native_handle_type native_handle(implementation_type& impl)
+  {
+    return descriptor_service_.native_handle(impl);
+  }
+
+  // Cancel all operations associated with the serial port.
+  asio::error_code cancel(implementation_type& impl,
+      asio::error_code& ec)
+  {
+    return descriptor_service_.cancel(impl, ec);
+  }
+
+  // Set an option on the serial port.
+  template <typename SettableSerialPortOption>
+  asio::error_code set_option(implementation_type& impl,
+      const SettableSerialPortOption& option, asio::error_code& ec)
+  {
+    return do_set_option(impl,
+        &reactive_serial_port_service::store_option<SettableSerialPortOption>,
+        &option, ec);
+  }
+
+  // Get an option from the serial port.
+  template <typename GettableSerialPortOption>
+  asio::error_code get_option(const implementation_type& impl,
+      GettableSerialPortOption& option, asio::error_code& ec) const
+  {
+    return do_get_option(impl,
+        &reactive_serial_port_service::load_option<GettableSerialPortOption>,
+        &option, ec);
+  }
+
+  // Send a break sequence to the serial port.
+  asio::error_code send_break(implementation_type& impl,
+      asio::error_code& ec)
+  {
+    errno = 0;
+    descriptor_ops::error_wrapper(::tcsendbreak(
+          descriptor_service_.native_handle(impl), 0), ec);
+    return ec;
+  }
+
+  // Write the given data. Returns the number of bytes sent.
+  template <typename ConstBufferSequence>
+  size_t write_some(implementation_type& impl,
+      const ConstBufferSequence& buffers, asio::error_code& ec)
+  {
+    return descriptor_service_.write_some(impl, buffers, ec);
+  }
+
+  // Start an asynchronous write. The data being written must be valid for the
+  // lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_write_some(implementation_type& impl,
+      const ConstBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    descriptor_service_.async_write_some(impl, buffers, handler, io_ex);
+  }
+
+  // Read some data. Returns the number of bytes received.
+  template <typename MutableBufferSequence>
+  size_t read_some(implementation_type& impl,
+      const MutableBufferSequence& buffers, asio::error_code& ec)
+  {
+    return descriptor_service_.read_some(impl, buffers, ec);
+  }
+
+  // Start an asynchronous read. The buffer for the data being received must be
+  // valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_read_some(implementation_type& impl,
+      const MutableBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    descriptor_service_.async_read_some(impl, buffers, handler, io_ex);
+  }
+
+private:
+  // Function pointer type for storing a serial port option.
+  typedef asio::error_code (*store_function_type)(
+      const void*, termios&, asio::error_code&);
+
+  // Helper function template to store a serial port option.
+  template <typename SettableSerialPortOption>
+  static asio::error_code store_option(const void* option,
+      termios& storage, asio::error_code& ec)
+  {
+    static_cast<const SettableSerialPortOption*>(option)->store(storage, ec);
+    return ec;
+  }
+
+  // Helper function to set a serial port option.
+  ASIO_DECL asio::error_code do_set_option(
+      implementation_type& impl, store_function_type store,
+      const void* option, asio::error_code& ec);
+
+  // Function pointer type for loading a serial port option.
+  typedef asio::error_code (*load_function_type)(
+      void*, const termios&, asio::error_code&);
+
+  // Helper function template to load a serial port option.
+  template <typename GettableSerialPortOption>
+  static asio::error_code load_option(void* option,
+      const termios& storage, asio::error_code& ec)
+  {
+    static_cast<GettableSerialPortOption*>(option)->load(storage, ec);
+    return ec;
+  }
+
+  // Helper function to get a serial port option.
+  ASIO_DECL asio::error_code do_get_option(
+      const implementation_type& impl, load_function_type load,
+      void* option, asio::error_code& ec) const;
+
+  // The implementation used for initiating asynchronous operations.
+  reactive_descriptor_service descriptor_service_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/reactive_serial_port_service.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+#endif // defined(ASIO_HAS_SERIAL_PORT)
+
+#endif // ASIO_DETAIL_REACTIVE_SERIAL_PORT_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_accept_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_accept_op.hpp
new file mode 100644
index 00000000000..e4e5fd77bd6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_accept_op.hpp
@@ -0,0 +1,230 @@
+//
+// detail/reactive_socket_accept_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_SOCKET_ACCEPT_OP_HPP
+#define ASIO_DETAIL_REACTIVE_SOCKET_ACCEPT_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_holder.hpp"
+#include "asio/detail/socket_ops.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Socket, typename Protocol>
+class reactive_socket_accept_op_base : public reactor_op
+{
+public:
+  reactive_socket_accept_op_base(socket_type socket,
+      socket_ops::state_type state, Socket& peer, const Protocol& protocol,
+      typename Protocol::endpoint* peer_endpoint, func_type complete_func)
+    : reactor_op(&reactive_socket_accept_op_base::do_perform, complete_func),
+      socket_(socket),
+      state_(state),
+      peer_(peer),
+      protocol_(protocol),
+      peer_endpoint_(peer_endpoint),
+      addrlen_(peer_endpoint ? peer_endpoint->capacity() : 0)
+  {
+  }
+
+  static status do_perform(reactor_op* base)
+  {
+    reactive_socket_accept_op_base* o(
+        static_cast<reactive_socket_accept_op_base*>(base));
+
+    socket_type new_socket = invalid_socket;
+    status result = socket_ops::non_blocking_accept(o->socket_,
+        o->state_, o->peer_endpoint_ ? o->peer_endpoint_->data() : 0,
+        o->peer_endpoint_ ? &o->addrlen_ : 0, o->ec_, new_socket)
+    ? done : not_done;
+    o->new_socket_.reset(new_socket);
+
+    ASIO_HANDLER_REACTOR_OPERATION((*o, "non_blocking_accept", o->ec_));
+
+    return result;
+  }
+
+  void do_assign()
+  {
+    if (new_socket_.get() != invalid_socket)
+    {
+      if (peer_endpoint_)
+        peer_endpoint_->resize(addrlen_);
+      peer_.assign(protocol_, new_socket_.get(), ec_);
+      if (!ec_)
+        new_socket_.release();
+    }
+  }
+
+private:
+  socket_type socket_;
+  socket_ops::state_type state_;
+  socket_holder new_socket_;
+  Socket& peer_;
+  Protocol protocol_;
+  typename Protocol::endpoint* peer_endpoint_;
+  std::size_t addrlen_;
+};
+
+template <typename Socket, typename Protocol,
+    typename Handler, typename IoExecutor>
+class reactive_socket_accept_op :
+  public reactive_socket_accept_op_base<Socket, Protocol>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(reactive_socket_accept_op);
+
+  reactive_socket_accept_op(socket_type socket,
+      socket_ops::state_type state, Socket& peer, const Protocol& protocol,
+      typename Protocol::endpoint* peer_endpoint, Handler& handler,
+      const IoExecutor& io_ex)
+    : reactive_socket_accept_op_base<Socket, Protocol>(socket, state, peer,
+        protocol, peer_endpoint, &reactive_socket_accept_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    reactive_socket_accept_op* o(static_cast<reactive_socket_accept_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    // On success, assign new connection to peer socket object.
+    if (owner)
+      o->do_assign();
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder1<Handler, asio::error_code>
+      handler(o->handler_, o->ec_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+#if defined(ASIO_HAS_MOVE)
+
+template <typename Protocol, typename PeerIoExecutor,
+    typename Handler, typename IoExecutor>
+class reactive_socket_move_accept_op :
+  private Protocol::socket::template rebind_executor<PeerIoExecutor>::other,
+  public reactive_socket_accept_op_base<
+    typename Protocol::socket::template rebind_executor<PeerIoExecutor>::other,
+    Protocol>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(reactive_socket_move_accept_op);
+
+  reactive_socket_move_accept_op(const PeerIoExecutor& peer_io_ex,
+      socket_type socket, socket_ops::state_type state,
+      const Protocol& protocol, typename Protocol::endpoint* peer_endpoint,
+      Handler& handler, const IoExecutor& io_ex)
+    : peer_socket_type(peer_io_ex),
+      reactive_socket_accept_op_base<peer_socket_type, Protocol>(
+        socket, state, *this, protocol, peer_endpoint,
+        &reactive_socket_move_accept_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    reactive_socket_move_accept_op* o(
+        static_cast<reactive_socket_move_accept_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    // On success, assign new connection to peer socket object.
+    if (owner)
+      o->do_assign();
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::move_binder2<Handler,
+      asio::error_code, peer_socket_type>
+        handler(0, ASIO_MOVE_CAST(Handler)(o->handler_), o->ec_,
+          ASIO_MOVE_CAST(peer_socket_type)(*o));
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, "..."));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  typedef typename Protocol::socket::template
+    rebind_executor<PeerIoExecutor>::other peer_socket_type;
+
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+#endif // defined(ASIO_HAS_MOVE)
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_REACTIVE_SOCKET_ACCEPT_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_connect_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_connect_op.hpp
new file mode 100644
index 00000000000..59c0fdc584d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_connect_op.hpp
@@ -0,0 +1,116 @@
+//
+// detail/reactive_socket_connect_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_SOCKET_CONNECT_OP_HPP
+#define ASIO_DETAIL_REACTIVE_SOCKET_CONNECT_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class reactive_socket_connect_op_base : public reactor_op
+{
+public:
+  reactive_socket_connect_op_base(socket_type socket, func_type complete_func)
+    : reactor_op(&reactive_socket_connect_op_base::do_perform, complete_func),
+      socket_(socket)
+  {
+  }
+
+  static status do_perform(reactor_op* base)
+  {
+    reactive_socket_connect_op_base* o(
+        static_cast<reactive_socket_connect_op_base*>(base));
+
+    status result = socket_ops::non_blocking_connect(
+        o->socket_, o->ec_) ? done : not_done;
+
+    ASIO_HANDLER_REACTOR_OPERATION((*o, "non_blocking_connect", o->ec_));
+
+    return result;
+  }
+
+private:
+  socket_type socket_;
+};
+
+template <typename Handler, typename IoExecutor>
+class reactive_socket_connect_op : public reactive_socket_connect_op_base
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(reactive_socket_connect_op);
+
+  reactive_socket_connect_op(socket_type socket,
+      Handler& handler, const IoExecutor& io_ex)
+    : reactive_socket_connect_op_base(socket,
+        &reactive_socket_connect_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    reactive_socket_connect_op* o
+      (static_cast<reactive_socket_connect_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder1<Handler, asio::error_code>
+      handler(o->handler_, o->ec_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_REACTIVE_SOCKET_CONNECT_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_recv_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_recv_op.hpp
new file mode 100644
index 00000000000..02e566ee3ab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_recv_op.hpp
@@ -0,0 +1,137 @@
+//
+// detail/reactive_socket_recv_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_SOCKET_RECV_OP_HPP
+#define ASIO_DETAIL_REACTIVE_SOCKET_RECV_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename MutableBufferSequence>
+class reactive_socket_recv_op_base : public reactor_op
+{
+public:
+  reactive_socket_recv_op_base(socket_type socket,
+      socket_ops::state_type state, const MutableBufferSequence& buffers,
+      socket_base::message_flags flags, func_type complete_func)
+    : reactor_op(&reactive_socket_recv_op_base::do_perform, complete_func),
+      socket_(socket),
+      state_(state),
+      buffers_(buffers),
+      flags_(flags)
+  {
+  }
+
+  static status do_perform(reactor_op* base)
+  {
+    reactive_socket_recv_op_base* o(
+        static_cast<reactive_socket_recv_op_base*>(base));
+
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(o->buffers_);
+
+    status result = socket_ops::non_blocking_recv(o->socket_,
+        bufs.buffers(), bufs.count(), o->flags_,
+        (o->state_ & socket_ops::stream_oriented) != 0,
+        o->ec_, o->bytes_transferred_) ? done : not_done;
+
+    if (result == done)
+      if ((o->state_ & socket_ops::stream_oriented) != 0)
+        if (o->bytes_transferred_ == 0)
+          result = done_and_exhausted;
+
+    ASIO_HANDLER_REACTOR_OPERATION((*o, "non_blocking_recv",
+          o->ec_, o->bytes_transferred_));
+
+    return result;
+  }
+
+private:
+  socket_type socket_;
+  socket_ops::state_type state_;
+  MutableBufferSequence buffers_;
+  socket_base::message_flags flags_;
+};
+
+template <typename MutableBufferSequence, typename Handler, typename IoExecutor>
+class reactive_socket_recv_op :
+  public reactive_socket_recv_op_base<MutableBufferSequence>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(reactive_socket_recv_op);
+
+  reactive_socket_recv_op(socket_type socket, socket_ops::state_type state,
+      const MutableBufferSequence& buffers, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+    : reactive_socket_recv_op_base<MutableBufferSequence>(socket, state,
+        buffers, flags, &reactive_socket_recv_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    reactive_socket_recv_op* o(static_cast<reactive_socket_recv_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, o->ec_, o->bytes_transferred_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_REACTIVE_SOCKET_RECV_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_recvfrom_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_recvfrom_op.hpp
new file mode 100644
index 00000000000..2e584681c4f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_recvfrom_op.hpp
@@ -0,0 +1,142 @@
+//
+// detail/reactive_socket_recvfrom_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_SOCKET_RECVFROM_OP_HPP
+#define ASIO_DETAIL_REACTIVE_SOCKET_RECVFROM_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename MutableBufferSequence, typename Endpoint>
+class reactive_socket_recvfrom_op_base : public reactor_op
+{
+public:
+  reactive_socket_recvfrom_op_base(socket_type socket, int protocol_type,
+      const MutableBufferSequence& buffers, Endpoint& endpoint,
+      socket_base::message_flags flags, func_type complete_func)
+    : reactor_op(&reactive_socket_recvfrom_op_base::do_perform, complete_func),
+      socket_(socket),
+      protocol_type_(protocol_type),
+      buffers_(buffers),
+      sender_endpoint_(endpoint),
+      flags_(flags)
+  {
+  }
+
+  static status do_perform(reactor_op* base)
+  {
+    reactive_socket_recvfrom_op_base* o(
+        static_cast<reactive_socket_recvfrom_op_base*>(base));
+
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(o->buffers_);
+
+    std::size_t addr_len = o->sender_endpoint_.capacity();
+    status result = socket_ops::non_blocking_recvfrom(o->socket_,
+        bufs.buffers(), bufs.count(), o->flags_,
+        o->sender_endpoint_.data(), &addr_len,
+        o->ec_, o->bytes_transferred_) ? done : not_done;
+
+    if (result && !o->ec_)
+      o->sender_endpoint_.resize(addr_len);
+
+    ASIO_HANDLER_REACTOR_OPERATION((*o, "non_blocking_recvfrom",
+          o->ec_, o->bytes_transferred_));
+
+    return result;
+  }
+
+private:
+  socket_type socket_;
+  int protocol_type_;
+  MutableBufferSequence buffers_;
+  Endpoint& sender_endpoint_;
+  socket_base::message_flags flags_;
+};
+
+template <typename MutableBufferSequence, typename Endpoint,
+    typename Handler, typename IoExecutor>
+class reactive_socket_recvfrom_op :
+  public reactive_socket_recvfrom_op_base<MutableBufferSequence, Endpoint>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(reactive_socket_recvfrom_op);
+
+  reactive_socket_recvfrom_op(socket_type socket, int protocol_type,
+      const MutableBufferSequence& buffers, Endpoint& endpoint,
+      socket_base::message_flags flags, Handler& handler,
+      const IoExecutor& io_ex)
+    : reactive_socket_recvfrom_op_base<MutableBufferSequence, Endpoint>(
+        socket, protocol_type, buffers, endpoint, flags,
+        &reactive_socket_recvfrom_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    reactive_socket_recvfrom_op* o(
+        static_cast<reactive_socket_recvfrom_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, o->ec_, o->bytes_transferred_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_REACTIVE_SOCKET_RECVFROM_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_recvmsg_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_recvmsg_op.hpp
new file mode 100644
index 00000000000..0a703b3b055
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_recvmsg_op.hpp
@@ -0,0 +1,135 @@
+//
+// detail/reactive_socket_recvmsg_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_SOCKET_RECVMSG_OP_HPP
+#define ASIO_DETAIL_REACTIVE_SOCKET_RECVMSG_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/socket_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename MutableBufferSequence>
+class reactive_socket_recvmsg_op_base : public reactor_op
+{
+public:
+  reactive_socket_recvmsg_op_base(socket_type socket,
+      const MutableBufferSequence& buffers, socket_base::message_flags in_flags,
+      socket_base::message_flags& out_flags, func_type complete_func)
+    : reactor_op(&reactive_socket_recvmsg_op_base::do_perform, complete_func),
+      socket_(socket),
+      buffers_(buffers),
+      in_flags_(in_flags),
+      out_flags_(out_flags)
+  {
+  }
+
+  static status do_perform(reactor_op* base)
+  {
+    reactive_socket_recvmsg_op_base* o(
+        static_cast<reactive_socket_recvmsg_op_base*>(base));
+
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(o->buffers_);
+
+    status result = socket_ops::non_blocking_recvmsg(o->socket_,
+        bufs.buffers(), bufs.count(),
+        o->in_flags_, o->out_flags_,
+        o->ec_, o->bytes_transferred_) ? done : not_done;
+
+    ASIO_HANDLER_REACTOR_OPERATION((*o, "non_blocking_recvmsg",
+          o->ec_, o->bytes_transferred_));
+
+    return result;
+  }
+
+private:
+  socket_type socket_;
+  MutableBufferSequence buffers_;
+  socket_base::message_flags in_flags_;
+  socket_base::message_flags& out_flags_;
+};
+
+template <typename MutableBufferSequence, typename Handler, typename IoExecutor>
+class reactive_socket_recvmsg_op :
+  public reactive_socket_recvmsg_op_base<MutableBufferSequence>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(reactive_socket_recvmsg_op);
+
+  reactive_socket_recvmsg_op(socket_type socket,
+      const MutableBufferSequence& buffers, socket_base::message_flags in_flags,
+      socket_base::message_flags& out_flags, Handler& handler,
+      const IoExecutor& io_ex)
+    : reactive_socket_recvmsg_op_base<MutableBufferSequence>(socket, buffers,
+        in_flags, out_flags, &reactive_socket_recvmsg_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    reactive_socket_recvmsg_op* o(
+        static_cast<reactive_socket_recvmsg_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, o->ec_, o->bytes_transferred_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_REACTIVE_SOCKET_RECVMSG_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_send_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_send_op.hpp
new file mode 100644
index 00000000000..4eab8165ad7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_send_op.hpp
@@ -0,0 +1,136 @@
+//
+// detail/reactive_socket_send_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_SOCKET_SEND_OP_HPP
+#define ASIO_DETAIL_REACTIVE_SOCKET_SEND_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename ConstBufferSequence>
+class reactive_socket_send_op_base : public reactor_op
+{
+public:
+  reactive_socket_send_op_base(socket_type socket,
+      socket_ops::state_type state, const ConstBufferSequence& buffers,
+      socket_base::message_flags flags, func_type complete_func)
+    : reactor_op(&reactive_socket_send_op_base::do_perform, complete_func),
+      socket_(socket),
+      state_(state),
+      buffers_(buffers),
+      flags_(flags)
+  {
+  }
+
+  static status do_perform(reactor_op* base)
+  {
+    reactive_socket_send_op_base* o(
+        static_cast<reactive_socket_send_op_base*>(base));
+
+    buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence> bufs(o->buffers_);
+
+    status result = socket_ops::non_blocking_send(o->socket_,
+          bufs.buffers(), bufs.count(), o->flags_,
+          o->ec_, o->bytes_transferred_) ? done : not_done;
+
+    if (result == done)
+      if ((o->state_ & socket_ops::stream_oriented) != 0)
+        if (o->bytes_transferred_ < bufs.total_size())
+          result = done_and_exhausted;
+
+    ASIO_HANDLER_REACTOR_OPERATION((*o, "non_blocking_send",
+          o->ec_, o->bytes_transferred_));
+
+    return result;
+  }
+
+private:
+  socket_type socket_;
+  socket_ops::state_type state_;
+  ConstBufferSequence buffers_;
+  socket_base::message_flags flags_;
+};
+
+template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+class reactive_socket_send_op :
+  public reactive_socket_send_op_base<ConstBufferSequence>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(reactive_socket_send_op);
+
+  reactive_socket_send_op(socket_type socket, socket_ops::state_type state,
+      const ConstBufferSequence& buffers, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+    : reactive_socket_send_op_base<ConstBufferSequence>(socket,
+        state, buffers, flags, &reactive_socket_send_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    reactive_socket_send_op* o(static_cast<reactive_socket_send_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, o->ec_, o->bytes_transferred_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_REACTIVE_SOCKET_SEND_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_sendto_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_sendto_op.hpp
new file mode 100644
index 00000000000..55fd1c817bd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_sendto_op.hpp
@@ -0,0 +1,134 @@
+//
+// detail/reactive_socket_sendto_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_SOCKET_SENDTO_OP_HPP
+#define ASIO_DETAIL_REACTIVE_SOCKET_SENDTO_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename ConstBufferSequence, typename Endpoint>
+class reactive_socket_sendto_op_base : public reactor_op
+{
+public:
+  reactive_socket_sendto_op_base(socket_type socket,
+      const ConstBufferSequence& buffers, const Endpoint& endpoint,
+      socket_base::message_flags flags, func_type complete_func)
+    : reactor_op(&reactive_socket_sendto_op_base::do_perform, complete_func),
+      socket_(socket),
+      buffers_(buffers),
+      destination_(endpoint),
+      flags_(flags)
+  {
+  }
+
+  static status do_perform(reactor_op* base)
+  {
+    reactive_socket_sendto_op_base* o(
+        static_cast<reactive_socket_sendto_op_base*>(base));
+
+    buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence> bufs(o->buffers_);
+
+    status result = socket_ops::non_blocking_sendto(o->socket_,
+          bufs.buffers(), bufs.count(), o->flags_,
+          o->destination_.data(), o->destination_.size(),
+          o->ec_, o->bytes_transferred_) ? done : not_done;
+
+    ASIO_HANDLER_REACTOR_OPERATION((*o, "non_blocking_sendto",
+          o->ec_, o->bytes_transferred_));
+
+    return result;
+  }
+
+private:
+  socket_type socket_;
+  ConstBufferSequence buffers_;
+  Endpoint destination_;
+  socket_base::message_flags flags_;
+};
+
+template <typename ConstBufferSequence, typename Endpoint,
+    typename Handler, typename IoExecutor>
+class reactive_socket_sendto_op :
+  public reactive_socket_sendto_op_base<ConstBufferSequence, Endpoint>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(reactive_socket_sendto_op);
+
+  reactive_socket_sendto_op(socket_type socket,
+      const ConstBufferSequence& buffers, const Endpoint& endpoint,
+      socket_base::message_flags flags, Handler& handler,
+      const IoExecutor& io_ex)
+    : reactive_socket_sendto_op_base<ConstBufferSequence, Endpoint>(socket,
+        buffers, endpoint, flags, &reactive_socket_sendto_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    reactive_socket_sendto_op* o(static_cast<reactive_socket_sendto_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, o->ec_, o->bytes_transferred_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_REACTIVE_SOCKET_SENDTO_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_service.hpp
new file mode 100644
index 00000000000..52029674d32
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_service.hpp
@@ -0,0 +1,505 @@
+//
+// detail/reactive_socket_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_SOCKET_SERVICE_HPP
+#define ASIO_DETAIL_REACTIVE_SOCKET_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_IOCP)
+
+#include "asio/buffer.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/socket_base.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/reactive_null_buffers_op.hpp"
+#include "asio/detail/reactive_socket_accept_op.hpp"
+#include "asio/detail/reactive_socket_connect_op.hpp"
+#include "asio/detail/reactive_socket_recvfrom_op.hpp"
+#include "asio/detail/reactive_socket_sendto_op.hpp"
+#include "asio/detail/reactive_socket_service_base.hpp"
+#include "asio/detail/reactor.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_holder.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Protocol>
+class reactive_socket_service :
+  public execution_context_service_base<reactive_socket_service<Protocol> >,
+  public reactive_socket_service_base
+{
+public:
+  // The protocol type.
+  typedef Protocol protocol_type;
+
+  // The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  // The native type of a socket.
+  typedef socket_type native_handle_type;
+
+  // The implementation type of the socket.
+  struct implementation_type :
+    reactive_socket_service_base::base_implementation_type
+  {
+    // Default constructor.
+    implementation_type()
+      : protocol_(endpoint_type().protocol())
+    {
+    }
+
+    // The protocol associated with the socket.
+    protocol_type protocol_;
+  };
+
+  // Constructor.
+  reactive_socket_service(execution_context& context)
+    : execution_context_service_base<
+        reactive_socket_service<Protocol> >(context),
+      reactive_socket_service_base(context)
+  {
+  }
+
+  // Destroy all user-defined handler objects owned by the service.
+  void shutdown()
+  {
+    this->base_shutdown();
+  }
+
+  // Move-construct a new socket implementation.
+  void move_construct(implementation_type& impl,
+      implementation_type& other_impl) ASIO_NOEXCEPT
+  {
+    this->base_move_construct(impl, other_impl);
+
+    impl.protocol_ = other_impl.protocol_;
+    other_impl.protocol_ = endpoint_type().protocol();
+  }
+
+  // Move-assign from another socket implementation.
+  void move_assign(implementation_type& impl,
+      reactive_socket_service_base& other_service,
+      implementation_type& other_impl)
+  {
+    this->base_move_assign(impl, other_service, other_impl);
+
+    impl.protocol_ = other_impl.protocol_;
+    other_impl.protocol_ = endpoint_type().protocol();
+  }
+
+  // Move-construct a new socket implementation from another protocol type.
+  template <typename Protocol1>
+  void converting_move_construct(implementation_type& impl,
+      reactive_socket_service<Protocol1>&,
+      typename reactive_socket_service<
+        Protocol1>::implementation_type& other_impl)
+  {
+    this->base_move_construct(impl, other_impl);
+
+    impl.protocol_ = protocol_type(other_impl.protocol_);
+    other_impl.protocol_ = typename Protocol1::endpoint().protocol();
+  }
+
+  // Open a new socket implementation.
+  asio::error_code open(implementation_type& impl,
+      const protocol_type& protocol, asio::error_code& ec)
+  {
+    if (!do_open(impl, protocol.family(),
+          protocol.type(), protocol.protocol(), ec))
+      impl.protocol_ = protocol;
+    return ec;
+  }
+
+  // Assign a native socket to a socket implementation.
+  asio::error_code assign(implementation_type& impl,
+      const protocol_type& protocol, const native_handle_type& native_socket,
+      asio::error_code& ec)
+  {
+    if (!do_assign(impl, protocol.type(), native_socket, ec))
+      impl.protocol_ = protocol;
+    return ec;
+  }
+
+  // Get the native socket representation.
+  native_handle_type native_handle(implementation_type& impl)
+  {
+    return impl.socket_;
+  }
+
+  // Bind the socket to the specified local endpoint.
+  asio::error_code bind(implementation_type& impl,
+      const endpoint_type& endpoint, asio::error_code& ec)
+  {
+    socket_ops::bind(impl.socket_, endpoint.data(), endpoint.size(), ec);
+    return ec;
+  }
+
+  // Set a socket option.
+  template <typename Option>
+  asio::error_code set_option(implementation_type& impl,
+      const Option& option, asio::error_code& ec)
+  {
+    socket_ops::setsockopt(impl.socket_, impl.state_,
+        option.level(impl.protocol_), option.name(impl.protocol_),
+        option.data(impl.protocol_), option.size(impl.protocol_), ec);
+    return ec;
+  }
+
+  // Set a socket option.
+  template <typename Option>
+  asio::error_code get_option(const implementation_type& impl,
+      Option& option, asio::error_code& ec) const
+  {
+    std::size_t size = option.size(impl.protocol_);
+    socket_ops::getsockopt(impl.socket_, impl.state_,
+        option.level(impl.protocol_), option.name(impl.protocol_),
+        option.data(impl.protocol_), &size, ec);
+    if (!ec)
+      option.resize(impl.protocol_, size);
+    return ec;
+  }
+
+  // Get the local endpoint.
+  endpoint_type local_endpoint(const implementation_type& impl,
+      asio::error_code& ec) const
+  {
+    endpoint_type endpoint;
+    std::size_t addr_len = endpoint.capacity();
+    if (socket_ops::getsockname(impl.socket_, endpoint.data(), &addr_len, ec))
+      return endpoint_type();
+    endpoint.resize(addr_len);
+    return endpoint;
+  }
+
+  // Get the remote endpoint.
+  endpoint_type remote_endpoint(const implementation_type& impl,
+      asio::error_code& ec) const
+  {
+    endpoint_type endpoint;
+    std::size_t addr_len = endpoint.capacity();
+    if (socket_ops::getpeername(impl.socket_,
+          endpoint.data(), &addr_len, false, ec))
+      return endpoint_type();
+    endpoint.resize(addr_len);
+    return endpoint;
+  }
+
+  // Disable sends or receives on the socket.
+  asio::error_code shutdown(base_implementation_type& impl,
+      socket_base::shutdown_type what, asio::error_code& ec)
+  {
+    socket_ops::shutdown(impl.socket_, what, ec);
+    return ec;
+  }
+
+  // Send a datagram to the specified endpoint. Returns the number of bytes
+  // sent.
+  template <typename ConstBufferSequence>
+  size_t send_to(implementation_type& impl, const ConstBufferSequence& buffers,
+      const endpoint_type& destination, socket_base::message_flags flags,
+      asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence> bufs(buffers);
+
+    return socket_ops::sync_sendto(impl.socket_, impl.state_,
+        bufs.buffers(), bufs.count(), flags,
+        destination.data(), destination.size(), ec);
+  }
+
+  // Wait until data can be sent without blocking.
+  size_t send_to(implementation_type& impl, const null_buffers&,
+      const endpoint_type&, socket_base::message_flags,
+      asio::error_code& ec)
+  {
+    // Wait for socket to become ready.
+    socket_ops::poll_write(impl.socket_, impl.state_, -1, ec);
+
+    return 0;
+  }
+
+  // Start an asynchronous send. The data being sent must be valid for the
+  // lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_send_to(implementation_type& impl,
+      const ConstBufferSequence& buffers,
+      const endpoint_type& destination, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_socket_sendto_op<ConstBufferSequence,
+        endpoint_type, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.socket_, buffers,
+        destination, flags, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_send_to"));
+
+    start_op(impl, reactor::write_op, p.p, is_continuation, true, false);
+    p.v = p.p = 0;
+  }
+
+  // Start an asynchronous wait until data can be sent without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_send_to(implementation_type& impl, const null_buffers&,
+      const endpoint_type&, socket_base::message_flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_send_to(null_buffers)"));
+
+    start_op(impl, reactor::write_op, p.p, is_continuation, false, false);
+    p.v = p.p = 0;
+  }
+
+  // Receive a datagram with the endpoint of the sender. Returns the number of
+  // bytes received.
+  template <typename MutableBufferSequence>
+  size_t receive_from(implementation_type& impl,
+      const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint, socket_base::message_flags flags,
+      asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(buffers);
+
+    std::size_t addr_len = sender_endpoint.capacity();
+    std::size_t bytes_recvd = socket_ops::sync_recvfrom(
+        impl.socket_, impl.state_, bufs.buffers(), bufs.count(),
+        flags, sender_endpoint.data(), &addr_len, ec);
+
+    if (!ec)
+      sender_endpoint.resize(addr_len);
+
+    return bytes_recvd;
+  }
+
+  // Wait until data can be received without blocking.
+  size_t receive_from(implementation_type& impl, const null_buffers&,
+      endpoint_type& sender_endpoint, socket_base::message_flags,
+      asio::error_code& ec)
+  {
+    // Wait for socket to become ready.
+    socket_ops::poll_read(impl.socket_, impl.state_, -1, ec);
+
+    // Reset endpoint since it can be given no sensible value at this time.
+    sender_endpoint = endpoint_type();
+
+    return 0;
+  }
+
+  // Start an asynchronous receive. The buffer for the data being received and
+  // the sender_endpoint object must both be valid for the lifetime of the
+  // asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_receive_from(implementation_type& impl,
+      const MutableBufferSequence& buffers, endpoint_type& sender_endpoint,
+      socket_base::message_flags flags, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_socket_recvfrom_op<MutableBufferSequence,
+        endpoint_type, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    int protocol = impl.protocol_.type();
+    p.p = new (p.v) op(impl.socket_, protocol, buffers,
+        sender_endpoint, flags, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_receive_from"));
+
+    start_op(impl,
+        (flags & socket_base::message_out_of_band)
+          ? reactor::except_op : reactor::read_op,
+        p.p, is_continuation, true, false);
+    p.v = p.p = 0;
+  }
+
+  // Wait until data can be received without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_receive_from(implementation_type& impl, const null_buffers&,
+      endpoint_type& sender_endpoint, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_receive_from(null_buffers)"));
+
+    // Reset endpoint since it can be given no sensible value at this time.
+    sender_endpoint = endpoint_type();
+
+    start_op(impl,
+        (flags & socket_base::message_out_of_band)
+          ? reactor::except_op : reactor::read_op,
+        p.p, is_continuation, false, false);
+    p.v = p.p = 0;
+  }
+
+  // Accept a new connection.
+  template <typename Socket>
+  asio::error_code accept(implementation_type& impl,
+      Socket& peer, endpoint_type* peer_endpoint, asio::error_code& ec)
+  {
+    // We cannot accept a socket that is already open.
+    if (peer.is_open())
+    {
+      ec = asio::error::already_open;
+      return ec;
+    }
+
+    std::size_t addr_len = peer_endpoint ? peer_endpoint->capacity() : 0;
+    socket_holder new_socket(socket_ops::sync_accept(impl.socket_,
+          impl.state_, peer_endpoint ? peer_endpoint->data() : 0,
+          peer_endpoint ? &addr_len : 0, ec));
+
+    // On success, assign new connection to peer socket object.
+    if (new_socket.get() != invalid_socket)
+    {
+      if (peer_endpoint)
+        peer_endpoint->resize(addr_len);
+      peer.assign(impl.protocol_, new_socket.get(), ec);
+      if (!ec)
+        new_socket.release();
+    }
+
+    return ec;
+  }
+
+  // Start an asynchronous accept. The peer and peer_endpoint objects must be
+  // valid until the accept's handler is invoked.
+  template <typename Socket, typename Handler, typename IoExecutor>
+  void async_accept(implementation_type& impl, Socket& peer,
+      endpoint_type* peer_endpoint, Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_socket_accept_op<Socket, Protocol, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.socket_, impl.state_, peer,
+        impl.protocol_, peer_endpoint, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_accept"));
+
+    start_accept_op(impl, p.p, is_continuation, peer.is_open());
+    p.v = p.p = 0;
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  // Start an asynchronous accept. The peer_endpoint object must be valid until
+  // the accept's handler is invoked.
+  template <typename PeerIoExecutor, typename Handler, typename IoExecutor>
+  void async_move_accept(implementation_type& impl,
+      const PeerIoExecutor& peer_io_ex, endpoint_type* peer_endpoint,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_socket_move_accept_op<Protocol,
+        PeerIoExecutor, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(peer_io_ex, impl.socket_, impl.state_,
+        impl.protocol_, peer_endpoint, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_accept"));
+
+    start_accept_op(impl, p.p, is_continuation, false);
+    p.v = p.p = 0;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  // Connect the socket to the specified endpoint.
+  asio::error_code connect(implementation_type& impl,
+      const endpoint_type& peer_endpoint, asio::error_code& ec)
+  {
+    socket_ops::sync_connect(impl.socket_,
+        peer_endpoint.data(), peer_endpoint.size(), ec);
+    return ec;
+  }
+
+  // Start an asynchronous connect.
+  template <typename Handler, typename IoExecutor>
+  void async_connect(implementation_type& impl,
+      const endpoint_type& peer_endpoint,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_socket_connect_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.socket_, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_connect"));
+
+    start_connect_op(impl, p.p, is_continuation,
+        peer_endpoint.data(), peer_endpoint.size());
+    p.v = p.p = 0;
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_REACTIVE_SOCKET_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_service_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_service_base.hpp
new file mode 100644
index 00000000000..f9683283105
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_socket_service_base.hpp
@@ -0,0 +1,518 @@
+//
+// detail/reactive_socket_service_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_SOCKET_SERVICE_BASE_HPP
+#define ASIO_DETAIL_REACTIVE_SOCKET_SERVICE_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_IOCP) \
+  && !defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/buffer.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/socket_base.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactive_null_buffers_op.hpp"
+#include "asio/detail/reactive_socket_recv_op.hpp"
+#include "asio/detail/reactive_socket_recvmsg_op.hpp"
+#include "asio/detail/reactive_socket_send_op.hpp"
+#include "asio/detail/reactive_wait_op.hpp"
+#include "asio/detail/reactor.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_holder.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class reactive_socket_service_base
+{
+public:
+  // The native type of a socket.
+  typedef socket_type native_handle_type;
+
+  // The implementation type of the socket.
+  struct base_implementation_type
+  {
+    // The native socket representation.
+    socket_type socket_;
+
+    // The current state of the socket.
+    socket_ops::state_type state_;
+
+    // Per-descriptor data used by the reactor.
+    reactor::per_descriptor_data reactor_data_;
+  };
+
+  // Constructor.
+  ASIO_DECL reactive_socket_service_base(execution_context& context);
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void base_shutdown();
+
+  // Construct a new socket implementation.
+  ASIO_DECL void construct(base_implementation_type& impl);
+
+  // Move-construct a new socket implementation.
+  ASIO_DECL void base_move_construct(base_implementation_type& impl,
+      base_implementation_type& other_impl) ASIO_NOEXCEPT;
+
+  // Move-assign from another socket implementation.
+  ASIO_DECL void base_move_assign(base_implementation_type& impl,
+      reactive_socket_service_base& other_service,
+      base_implementation_type& other_impl);
+
+  // Destroy a socket implementation.
+  ASIO_DECL void destroy(base_implementation_type& impl);
+
+  // Determine whether the socket is open.
+  bool is_open(const base_implementation_type& impl) const
+  {
+    return impl.socket_ != invalid_socket;
+  }
+
+  // Destroy a socket implementation.
+  ASIO_DECL asio::error_code close(
+      base_implementation_type& impl, asio::error_code& ec);
+
+  // Release ownership of the socket.
+  ASIO_DECL socket_type release(
+      base_implementation_type& impl, asio::error_code& ec);
+
+  // Get the native socket representation.
+  native_handle_type native_handle(base_implementation_type& impl)
+  {
+    return impl.socket_;
+  }
+
+  // Cancel all operations associated with the socket.
+  ASIO_DECL asio::error_code cancel(
+      base_implementation_type& impl, asio::error_code& ec);
+
+  // Determine whether the socket is at the out-of-band data mark.
+  bool at_mark(const base_implementation_type& impl,
+      asio::error_code& ec) const
+  {
+    return socket_ops::sockatmark(impl.socket_, ec);
+  }
+
+  // Determine the number of bytes available for reading.
+  std::size_t available(const base_implementation_type& impl,
+      asio::error_code& ec) const
+  {
+    return socket_ops::available(impl.socket_, ec);
+  }
+
+  // Place the socket into the state where it will listen for new connections.
+  asio::error_code listen(base_implementation_type& impl,
+      int backlog, asio::error_code& ec)
+  {
+    socket_ops::listen(impl.socket_, backlog, ec);
+    return ec;
+  }
+
+  // Perform an IO control command on the socket.
+  template <typename IO_Control_Command>
+  asio::error_code io_control(base_implementation_type& impl,
+      IO_Control_Command& command, asio::error_code& ec)
+  {
+    socket_ops::ioctl(impl.socket_, impl.state_, command.name(),
+        static_cast<ioctl_arg_type*>(command.data()), ec);
+    return ec;
+  }
+
+  // Gets the non-blocking mode of the socket.
+  bool non_blocking(const base_implementation_type& impl) const
+  {
+    return (impl.state_ & socket_ops::user_set_non_blocking) != 0;
+  }
+
+  // Sets the non-blocking mode of the socket.
+  asio::error_code non_blocking(base_implementation_type& impl,
+      bool mode, asio::error_code& ec)
+  {
+    socket_ops::set_user_non_blocking(impl.socket_, impl.state_, mode, ec);
+    return ec;
+  }
+
+  // Gets the non-blocking mode of the native socket implementation.
+  bool native_non_blocking(const base_implementation_type& impl) const
+  {
+    return (impl.state_ & socket_ops::internal_non_blocking) != 0;
+  }
+
+  // Sets the non-blocking mode of the native socket implementation.
+  asio::error_code native_non_blocking(base_implementation_type& impl,
+      bool mode, asio::error_code& ec)
+  {
+    socket_ops::set_internal_non_blocking(impl.socket_, impl.state_, mode, ec);
+    return ec;
+  }
+
+  // Wait for the socket to become ready to read, ready to write, or to have
+  // pending error conditions.
+  asio::error_code wait(base_implementation_type& impl,
+      socket_base::wait_type w, asio::error_code& ec)
+  {
+    switch (w)
+    {
+    case socket_base::wait_read:
+      socket_ops::poll_read(impl.socket_, impl.state_, -1, ec);
+      break;
+    case socket_base::wait_write:
+      socket_ops::poll_write(impl.socket_, impl.state_, -1, ec);
+      break;
+    case socket_base::wait_error:
+      socket_ops::poll_error(impl.socket_, impl.state_, -1, ec);
+      break;
+    default:
+      ec = asio::error::invalid_argument;
+      break;
+    }
+
+    return ec;
+  }
+
+  // Asynchronously wait for the socket to become ready to read, ready to
+  // write, or to have pending error conditions.
+  template <typename Handler, typename IoExecutor>
+  void async_wait(base_implementation_type& impl,
+      socket_base::wait_type w, Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_wait_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_wait"));
+
+    int op_type;
+    switch (w)
+    {
+      case socket_base::wait_read:
+        op_type = reactor::read_op;
+        break;
+      case socket_base::wait_write:
+        op_type = reactor::write_op;
+        break;
+      case socket_base::wait_error:
+        op_type = reactor::except_op;
+        break;
+      default:
+        p.p->ec_ = asio::error::invalid_argument;
+        reactor_.post_immediate_completion(p.p, is_continuation);
+        p.v = p.p = 0;
+        return;
+    }
+
+    start_op(impl, op_type, p.p, is_continuation, false, false);
+    p.v = p.p = 0;
+  }
+
+  // Send the given data to the peer.
+  template <typename ConstBufferSequence>
+  size_t send(base_implementation_type& impl,
+      const ConstBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence> bufs(buffers);
+
+    return socket_ops::sync_send(impl.socket_, impl.state_,
+        bufs.buffers(), bufs.count(), flags, bufs.all_empty(), ec);
+  }
+
+  // Wait until data can be sent without blocking.
+  size_t send(base_implementation_type& impl, const null_buffers&,
+      socket_base::message_flags, asio::error_code& ec)
+  {
+    // Wait for socket to become ready.
+    socket_ops::poll_write(impl.socket_, impl.state_, -1, ec);
+
+    return 0;
+  }
+
+  // Start an asynchronous send. The data being sent must be valid for the
+  // lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_send(base_implementation_type& impl,
+      const ConstBufferSequence& buffers, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_socket_send_op<
+        ConstBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.socket_, impl.state_,
+        buffers, flags, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_send"));
+
+    start_op(impl, reactor::write_op, p.p, is_continuation, true,
+        ((impl.state_ & socket_ops::stream_oriented)
+          && buffer_sequence_adapter<asio::const_buffer,
+            ConstBufferSequence>::all_empty(buffers)));
+    p.v = p.p = 0;
+  }
+
+  // Start an asynchronous wait until data can be sent without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_send(base_implementation_type& impl, const null_buffers&,
+      socket_base::message_flags, Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_send(null_buffers)"));
+
+    start_op(impl, reactor::write_op, p.p, is_continuation, false, false);
+    p.v = p.p = 0;
+  }
+
+  // Receive some data from the peer. Returns the number of bytes received.
+  template <typename MutableBufferSequence>
+  size_t receive(base_implementation_type& impl,
+      const MutableBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(buffers);
+
+    return socket_ops::sync_recv(impl.socket_, impl.state_,
+        bufs.buffers(), bufs.count(), flags, bufs.all_empty(), ec);
+  }
+
+  // Wait until data can be received without blocking.
+  size_t receive(base_implementation_type& impl, const null_buffers&,
+      socket_base::message_flags, asio::error_code& ec)
+  {
+    // Wait for socket to become ready.
+    socket_ops::poll_read(impl.socket_, impl.state_, -1, ec);
+
+    return 0;
+  }
+
+  // Start an asynchronous receive. The buffer for the data being received
+  // must be valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_receive(base_implementation_type& impl,
+      const MutableBufferSequence& buffers, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_socket_recv_op<
+        MutableBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.socket_, impl.state_,
+        buffers, flags, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_receive"));
+
+    start_op(impl,
+        (flags & socket_base::message_out_of_band)
+          ? reactor::except_op : reactor::read_op,
+        p.p, is_continuation,
+        (flags & socket_base::message_out_of_band) == 0,
+        ((impl.state_ & socket_ops::stream_oriented)
+          && buffer_sequence_adapter<asio::mutable_buffer,
+            MutableBufferSequence>::all_empty(buffers)));
+    p.v = p.p = 0;
+  }
+
+  // Wait until data can be received without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_receive(base_implementation_type& impl,
+      const null_buffers&, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_receive(null_buffers)"));
+
+    start_op(impl,
+        (flags & socket_base::message_out_of_band)
+          ? reactor::except_op : reactor::read_op,
+        p.p, is_continuation, false, false);
+    p.v = p.p = 0;
+  }
+
+  // Receive some data with associated flags. Returns the number of bytes
+  // received.
+  template <typename MutableBufferSequence>
+  size_t receive_with_flags(base_implementation_type& impl,
+      const MutableBufferSequence& buffers,
+      socket_base::message_flags in_flags,
+      socket_base::message_flags& out_flags, asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(buffers);
+
+    return socket_ops::sync_recvmsg(impl.socket_, impl.state_,
+        bufs.buffers(), bufs.count(), in_flags, out_flags, ec);
+  }
+
+  // Wait until data can be received without blocking.
+  size_t receive_with_flags(base_implementation_type& impl,
+      const null_buffers&, socket_base::message_flags,
+      socket_base::message_flags& out_flags, asio::error_code& ec)
+  {
+    // Wait for socket to become ready.
+    socket_ops::poll_read(impl.socket_, impl.state_, -1, ec);
+
+    // Clear out_flags, since we cannot give it any other sensible value when
+    // performing a null_buffers operation.
+    out_flags = 0;
+
+    return 0;
+  }
+
+  // Start an asynchronous receive. The buffer for the data being received
+  // must be valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_receive_with_flags(base_implementation_type& impl,
+      const MutableBufferSequence& buffers, socket_base::message_flags in_flags,
+      socket_base::message_flags& out_flags, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_socket_recvmsg_op<
+        MutableBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.socket_, buffers,
+        in_flags, out_flags, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_receive_with_flags"));
+
+    start_op(impl,
+        (in_flags & socket_base::message_out_of_band)
+          ? reactor::except_op : reactor::read_op,
+        p.p, is_continuation,
+        (in_flags & socket_base::message_out_of_band) == 0, false);
+    p.v = p.p = 0;
+  }
+
+  // Wait until data can be received without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_receive_with_flags(base_implementation_type& impl,
+      const null_buffers&, socket_base::message_flags in_flags,
+      socket_base::message_flags& out_flags, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef reactive_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((reactor_.context(), *p.p, "socket",
+          &impl, impl.socket_, "async_receive_with_flags(null_buffers)"));
+
+    // Clear out_flags, since we cannot give it any other sensible value when
+    // performing a null_buffers operation.
+    out_flags = 0;
+
+    start_op(impl,
+        (in_flags & socket_base::message_out_of_band)
+          ? reactor::except_op : reactor::read_op,
+        p.p, is_continuation, false, false);
+    p.v = p.p = 0;
+  }
+
+protected:
+  // Open a new socket implementation.
+  ASIO_DECL asio::error_code do_open(
+      base_implementation_type& impl, int af,
+      int type, int protocol, asio::error_code& ec);
+
+  // Assign a native socket to a socket implementation.
+  ASIO_DECL asio::error_code do_assign(
+      base_implementation_type& impl, int type,
+      const native_handle_type& native_socket, asio::error_code& ec);
+
+  // Start the asynchronous read or write operation.
+  ASIO_DECL void start_op(base_implementation_type& impl, int op_type,
+      reactor_op* op, bool is_continuation, bool is_non_blocking, bool noop);
+
+  // Start the asynchronous accept operation.
+  ASIO_DECL void start_accept_op(base_implementation_type& impl,
+      reactor_op* op, bool is_continuation, bool peer_is_open);
+
+  // Start the asynchronous connect operation.
+  ASIO_DECL void start_connect_op(base_implementation_type& impl,
+      reactor_op* op, bool is_continuation,
+      const socket_addr_type* addr, size_t addrlen);
+
+  // The selector that performs event demultiplexing for the service.
+  reactor& reactor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/reactive_socket_service_base.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // !defined(ASIO_HAS_IOCP)
+       //   && !defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_REACTIVE_SOCKET_SERVICE_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_wait_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_wait_op.hpp
new file mode 100644
index 00000000000..eebcfd1da6d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactive_wait_op.hpp
@@ -0,0 +1,92 @@
+//
+// detail/reactive_wait_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTIVE_WAIT_OP_HPP
+#define ASIO_DETAIL_REACTIVE_WAIT_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler, typename IoExecutor>
+class reactive_wait_op : public reactor_op
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(reactive_wait_op);
+
+  reactive_wait_op(Handler& handler, const IoExecutor& io_ex)
+    : reactor_op(&reactive_wait_op::do_perform,
+        &reactive_wait_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static status do_perform(reactor_op*)
+  {
+    return done;
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    reactive_wait_op* o(static_cast<reactive_wait_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder1<Handler, asio::error_code>
+      handler(o->handler_, o->ec_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_REACTIVE_WAIT_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor.hpp
new file mode 100644
index 00000000000..441fc473f06
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor.hpp
@@ -0,0 +1,32 @@
+//
+// detail/reactor.hpp
+// ~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTOR_HPP
+#define ASIO_DETAIL_REACTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/reactor_fwd.hpp"
+
+#if defined(ASIO_HAS_EPOLL)
+# include "asio/detail/epoll_reactor.hpp"
+#elif defined(ASIO_HAS_KQUEUE)
+# include "asio/detail/kqueue_reactor.hpp"
+#elif defined(ASIO_HAS_DEV_POLL)
+# include "asio/detail/dev_poll_reactor.hpp"
+#elif defined(ASIO_HAS_IOCP) || defined(ASIO_WINDOWS_RUNTIME)
+# include "asio/detail/null_reactor.hpp"
+#else
+# include "asio/detail/select_reactor.hpp"
+#endif
+
+#endif // ASIO_DETAIL_REACTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor_fwd.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor_fwd.hpp
new file mode 100644
index 00000000000..ac678294f61
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor_fwd.hpp
@@ -0,0 +1,40 @@
+//
+// detail/reactor_fwd.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTOR_FWD_HPP
+#define ASIO_DETAIL_REACTOR_FWD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_HAS_IOCP) || defined(ASIO_WINDOWS_RUNTIME)
+typedef class null_reactor reactor;
+#elif defined(ASIO_HAS_IOCP)
+typedef class select_reactor reactor;
+#elif defined(ASIO_HAS_EPOLL)
+typedef class epoll_reactor reactor;
+#elif defined(ASIO_HAS_KQUEUE)
+typedef class kqueue_reactor reactor;
+#elif defined(ASIO_HAS_DEV_POLL)
+typedef class dev_poll_reactor reactor;
+#else
+typedef class select_reactor reactor;
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_REACTOR_FWD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor_op.hpp
new file mode 100644
index 00000000000..d2442481fbe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor_op.hpp
@@ -0,0 +1,65 @@
+//
+// detail/reactor_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTOR_OP_HPP
+#define ASIO_DETAIL_REACTOR_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/operation.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class reactor_op
+  : public operation
+{
+public:
+  // The error code to be passed to the completion handler.
+  asio::error_code ec_;
+
+  // The number of bytes transferred, to be passed to the completion handler.
+  std::size_t bytes_transferred_;
+
+  // Status returned by perform function. May be used to decide whether it is
+  // worth performing more operations on the descriptor immediately.
+  enum status { not_done, done, done_and_exhausted };
+
+  // Perform the operation. Returns true if it is finished.
+  status perform()
+  {
+    return perform_func_(this);
+  }
+
+protected:
+  typedef status (*perform_func_type)(reactor_op*);
+
+  reactor_op(perform_func_type perform_func, func_type complete_func)
+    : operation(complete_func),
+      bytes_transferred_(0),
+      perform_func_(perform_func)
+  {
+  }
+
+private:
+  perform_func_type perform_func_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_REACTOR_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor_op_queue.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor_op_queue.hpp
new file mode 100644
index 00000000000..2ecc3809d32
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/reactor_op_queue.hpp
@@ -0,0 +1,168 @@
+//
+// detail/reactor_op_queue.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REACTOR_OP_QUEUE_HPP
+#define ASIO_DETAIL_REACTOR_OP_QUEUE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/hash_map.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Descriptor>
+class reactor_op_queue
+  : private noncopyable
+{
+public:
+  typedef Descriptor key_type;
+
+  struct mapped_type : op_queue<reactor_op>
+  {
+    mapped_type() {}
+    mapped_type(const mapped_type&) {}
+    void operator=(const mapped_type&) {}
+  };
+
+  typedef typename hash_map<key_type, mapped_type>::value_type value_type;
+  typedef typename hash_map<key_type, mapped_type>::iterator iterator;
+
+  // Constructor.
+  reactor_op_queue()
+    : operations_()
+  {
+  }
+
+  // Obtain iterators to all registered descriptors.
+  iterator begin() { return operations_.begin(); }
+  iterator end() { return operations_.end(); }
+
+  // Add a new operation to the queue. Returns true if this is the only
+  // operation for the given descriptor, in which case the reactor's event
+  // demultiplexing function call may need to be interrupted and restarted.
+  bool enqueue_operation(Descriptor descriptor, reactor_op* op)
+  {
+    std::pair<iterator, bool> entry =
+      operations_.insert(value_type(descriptor, mapped_type()));
+    entry.first->second.push(op);
+    return entry.second;
+  }
+
+  // Cancel all operations associated with the descriptor identified by the
+  // supplied iterator. Any operations pending for the descriptor will be
+  // cancelled. Returns true if any operations were cancelled, in which case
+  // the reactor's event demultiplexing function may need to be interrupted and
+  // restarted.
+  bool cancel_operations(iterator i, op_queue<operation>& ops,
+      const asio::error_code& ec =
+        asio::error::operation_aborted)
+  {
+    if (i != operations_.end())
+    {
+      while (reactor_op* op = i->second.front())
+      {
+        op->ec_ = ec;
+        i->second.pop();
+        ops.push(op);
+      }
+      operations_.erase(i);
+      return true;
+    }
+
+    return false;
+  }
+
+  // Cancel all operations associated with the descriptor. Any operations
+  // pending for the descriptor will be cancelled. Returns true if any
+  // operations were cancelled, in which case the reactor's event
+  // demultiplexing function may need to be interrupted and restarted.
+  bool cancel_operations(Descriptor descriptor, op_queue<operation>& ops,
+      const asio::error_code& ec =
+        asio::error::operation_aborted)
+  {
+    return this->cancel_operations(operations_.find(descriptor), ops, ec);
+  }
+
+  // Whether there are no operations in the queue.
+  bool empty() const
+  {
+    return operations_.empty();
+  }
+
+  // Determine whether there are any operations associated with the descriptor.
+  bool has_operation(Descriptor descriptor) const
+  {
+    return operations_.find(descriptor) != operations_.end();
+  }
+
+  // Perform the operations corresponding to the descriptor identified by the
+  // supplied iterator. Returns true if there are still unfinished operations
+  // queued for the descriptor.
+  bool perform_operations(iterator i, op_queue<operation>& ops)
+  {
+    if (i != operations_.end())
+    {
+      while (reactor_op* op = i->second.front())
+      {
+        if (op->perform())
+        {
+          i->second.pop();
+          ops.push(op);
+        }
+        else
+        {
+          return true;
+        }
+      }
+      operations_.erase(i);
+    }
+    return false;
+  }
+
+  // Perform the operations corresponding to the descriptor. Returns true if
+  // there are still unfinished operations queued for the descriptor.
+  bool perform_operations(Descriptor descriptor, op_queue<operation>& ops)
+  {
+    return this->perform_operations(operations_.find(descriptor), ops);
+  }
+
+  // Get all operations owned by the queue.
+  void get_all_operations(op_queue<operation>& ops)
+  {
+    iterator i = operations_.begin();
+    while (i != operations_.end())
+    {
+      iterator op_iter = i++;
+      ops.push(op_iter->second);
+      operations_.erase(op_iter);
+    }
+  }
+
+private:
+  // The operations that are currently executing asynchronously.
+  hash_map<key_type, mapped_type> operations_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_REACTOR_OP_QUEUE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/recycling_allocator.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/recycling_allocator.hpp
new file mode 100644
index 00000000000..243dc9bc669
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/recycling_allocator.hpp
@@ -0,0 +1,106 @@
+//
+// detail/recycling_allocator.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_RECYCLING_ALLOCATOR_HPP
+#define ASIO_DETAIL_RECYCLING_ALLOCATOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/thread_context.hpp"
+#include "asio/detail/thread_info_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T, typename Purpose = thread_info_base::default_tag>
+class recycling_allocator
+{
+public:
+  typedef T value_type;
+
+  template <typename U>
+  struct rebind
+  {
+    typedef recycling_allocator<U, Purpose> other;
+  };
+
+  recycling_allocator()
+  {
+  }
+
+  template <typename U>
+  recycling_allocator(const recycling_allocator<U, Purpose>&)
+  {
+  }
+
+  T* allocate(std::size_t n)
+  {
+    typedef thread_context::thread_call_stack call_stack;
+    void* p = thread_info_base::allocate(Purpose(),
+        call_stack::top(), sizeof(T) * n);
+    return static_cast<T*>(p);
+  }
+
+  void deallocate(T* p, std::size_t n)
+  {
+    typedef thread_context::thread_call_stack call_stack;
+    thread_info_base::deallocate(Purpose(),
+        call_stack::top(), p, sizeof(T) * n);
+  }
+};
+
+template <typename Purpose>
+class recycling_allocator<void, Purpose>
+{
+public:
+  typedef void value_type;
+
+  template <typename U>
+  struct rebind
+  {
+    typedef recycling_allocator<U, Purpose> other;
+  };
+
+  recycling_allocator()
+  {
+  }
+
+  template <typename U>
+  recycling_allocator(const recycling_allocator<U, Purpose>&)
+  {
+  }
+};
+
+template <typename Allocator, typename Purpose>
+struct get_recycling_allocator
+{
+  typedef Allocator type;
+  static type get(const Allocator& a) { return a; }
+};
+
+template <typename T, typename Purpose>
+struct get_recycling_allocator<std::allocator<T>, Purpose>
+{
+  typedef recycling_allocator<T, Purpose> type;
+  static type get(const std::allocator<T>&) { return type(); }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_RECYCLING_ALLOCATOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/regex_fwd.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/regex_fwd.hpp
new file mode 100644
index 00000000000..e0d0ce590f8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/regex_fwd.hpp
@@ -0,0 +1,35 @@
+//
+// detail/regex_fwd.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_REGEX_FWD_HPP
+#define ASIO_DETAIL_REGEX_FWD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#if defined(ASIO_HAS_BOOST_REGEX)
+
+#include <boost/regex_fwd.hpp>
+#include <boost/regex/v4/match_flags.hpp>
+
+namespace boost {
+
+template <class BidiIterator>
+struct sub_match;
+
+template <class BidiIterator, class Allocator>
+class match_results;
+
+} // namespace boost
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+
+#endif // ASIO_DETAIL_REGEX_FWD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolve_endpoint_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolve_endpoint_op.hpp
new file mode 100644
index 00000000000..34cb7f7993b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolve_endpoint_op.hpp
@@ -0,0 +1,136 @@
+//
+// detail/resolve_endpoint_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_RESOLVER_ENDPOINT_OP_HPP
+#define ASIO_DETAIL_RESOLVER_ENDPOINT_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/error.hpp"
+#include "asio/ip/basic_resolver_results.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/resolve_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_io_context.hpp"
+#else // defined(ASIO_HAS_IOCP)
+# include "asio/detail/scheduler.hpp"
+#endif // defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Protocol, typename Handler, typename IoExecutor>
+class resolve_endpoint_op : public resolve_op
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(resolve_endpoint_op);
+
+  typedef typename Protocol::endpoint endpoint_type;
+  typedef asio::ip::basic_resolver_results<Protocol> results_type;
+
+#if defined(ASIO_HAS_IOCP)
+  typedef class win_iocp_io_context scheduler_impl;
+#else
+  typedef class scheduler scheduler_impl;
+#endif
+
+  resolve_endpoint_op(socket_ops::weak_cancel_token_type cancel_token,
+      const endpoint_type& endpoint, scheduler_impl& sched,
+      Handler& handler, const IoExecutor& io_ex)
+    : resolve_op(&resolve_endpoint_op::do_complete),
+      cancel_token_(cancel_token),
+      endpoint_(endpoint),
+      scheduler_(sched),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the operation object.
+    resolve_endpoint_op* o(static_cast<resolve_endpoint_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    if (owner && owner != &o->scheduler_)
+    {
+      // The operation is being run on the worker io_context. Time to perform
+      // the resolver operation.
+    
+      // Perform the blocking endpoint resolution operation.
+      char host_name[NI_MAXHOST];
+      char service_name[NI_MAXSERV];
+      socket_ops::background_getnameinfo(o->cancel_token_, o->endpoint_.data(),
+          o->endpoint_.size(), host_name, NI_MAXHOST, service_name, NI_MAXSERV,
+          o->endpoint_.protocol().type(), o->ec_);
+      o->results_ = results_type::create(o->endpoint_, host_name, service_name);
+
+      // Pass operation back to main io_context for completion.
+      o->scheduler_.post_deferred_completion(o);
+      p.v = p.p = 0;
+    }
+    else
+    {
+      // The operation has been returned to the main io_context. The completion
+      // handler is ready to be delivered.
+
+      ASIO_HANDLER_COMPLETION((*o));
+
+      // Make a copy of the handler so that the memory can be deallocated
+      // before the upcall is made. Even if we're not about to make an upcall,
+      // a sub-object of the handler may be the true owner of the memory
+      // associated with the handler. Consequently, a local copy of the handler
+      // is required to ensure that any owning sub-object remains valid until
+      // after we have deallocated the memory here.
+      detail::binder2<Handler, asio::error_code, results_type>
+        handler(o->handler_, o->ec_, o->results_);
+      p.h = asio::detail::addressof(handler.handler_);
+      p.reset();
+
+      if (owner)
+      {
+        fenced_block b(fenced_block::half);
+        ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, "..."));
+        w.complete(handler, handler.handler_);
+        ASIO_HANDLER_INVOCATION_END;
+      }
+    }
+  }
+
+private:
+  socket_ops::weak_cancel_token_type cancel_token_;
+  endpoint_type endpoint_;
+  scheduler_impl& scheduler_;
+  Handler handler_;
+  IoExecutor io_executor_;
+  results_type results_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_RESOLVER_ENDPOINT_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolve_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolve_op.hpp
new file mode 100644
index 00000000000..445cf561fd7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolve_op.hpp
@@ -0,0 +1,45 @@
+//
+// detail/resolve_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_RESOLVE_OP_HPP
+#define ASIO_DETAIL_RESOLVE_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/error.hpp"
+#include "asio/detail/operation.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class resolve_op : public operation
+{
+public:
+  // The error code to be passed to the completion handler.
+  asio::error_code ec_;
+
+protected:
+  resolve_op(func_type complete_func)
+    : operation(complete_func)
+  {
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_RESOLVE_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolve_query_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolve_query_op.hpp
new file mode 100644
index 00000000000..e5f768f4e05
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolve_query_op.hpp
@@ -0,0 +1,148 @@
+//
+// detail/resolve_query_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_RESOLVE_QUERY_OP_HPP
+#define ASIO_DETAIL_RESOLVE_QUERY_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/error.hpp"
+#include "asio/ip/basic_resolver_query.hpp"
+#include "asio/ip/basic_resolver_results.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/resolve_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_io_context.hpp"
+#else // defined(ASIO_HAS_IOCP)
+# include "asio/detail/scheduler.hpp"
+#endif // defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Protocol, typename Handler, typename IoExecutor>
+class resolve_query_op : public resolve_op
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(resolve_query_op);
+
+  typedef asio::ip::basic_resolver_query<Protocol> query_type;
+  typedef asio::ip::basic_resolver_results<Protocol> results_type;
+
+#if defined(ASIO_HAS_IOCP)
+  typedef class win_iocp_io_context scheduler_impl;
+#else
+  typedef class scheduler scheduler_impl;
+#endif
+
+  resolve_query_op(socket_ops::weak_cancel_token_type cancel_token,
+      const query_type& query, scheduler_impl& sched,
+      Handler& handler, const IoExecutor& io_ex)
+    : resolve_op(&resolve_query_op::do_complete),
+      cancel_token_(cancel_token),
+      query_(query),
+      scheduler_(sched),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex),
+      addrinfo_(0)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  ~resolve_query_op()
+  {
+    if (addrinfo_)
+      socket_ops::freeaddrinfo(addrinfo_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the operation object.
+    resolve_query_op* o(static_cast<resolve_query_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+
+    if (owner && owner != &o->scheduler_)
+    {
+      // The operation is being run on the worker io_context. Time to perform
+      // the resolver operation.
+    
+      // Perform the blocking host resolution operation.
+      socket_ops::background_getaddrinfo(o->cancel_token_,
+          o->query_.host_name().c_str(), o->query_.service_name().c_str(),
+          o->query_.hints(), &o->addrinfo_, o->ec_);
+
+      // Pass operation back to main io_context for completion.
+      o->scheduler_.post_deferred_completion(o);
+      p.v = p.p = 0;
+    }
+    else
+    {
+      // The operation has been returned to the main io_context. The completion
+      // handler is ready to be delivered.
+
+      // Take ownership of the operation's outstanding work.
+      handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+      ASIO_HANDLER_COMPLETION((*o));
+
+      // Make a copy of the handler so that the memory can be deallocated
+      // before the upcall is made. Even if we're not about to make an upcall,
+      // a sub-object of the handler may be the true owner of the memory
+      // associated with the handler. Consequently, a local copy of the handler
+      // is required to ensure that any owning sub-object remains valid until
+      // after we have deallocated the memory here.
+      detail::binder2<Handler, asio::error_code, results_type>
+        handler(o->handler_, o->ec_, results_type());
+      p.h = asio::detail::addressof(handler.handler_);
+      if (o->addrinfo_)
+      {
+        handler.arg2_ = results_type::create(o->addrinfo_,
+            o->query_.host_name(), o->query_.service_name());
+      }
+      p.reset();
+
+      if (owner)
+      {
+        fenced_block b(fenced_block::half);
+        ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, "..."));
+        w.complete(handler, handler.handler_);
+        ASIO_HANDLER_INVOCATION_END;
+      }
+    }
+  }
+
+private:
+  socket_ops::weak_cancel_token_type cancel_token_;
+  query_type query_;
+  scheduler_impl& scheduler_;
+  Handler handler_;
+  IoExecutor io_executor_;
+  asio::detail::addrinfo_type* addrinfo_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_RESOLVE_QUERY_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolver_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolver_service.hpp
new file mode 100644
index 00000000000..c856cf89bc6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolver_service.hpp
@@ -0,0 +1,145 @@
+//
+// detail/resolver_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_RESOLVER_SERVICE_HPP
+#define ASIO_DETAIL_RESOLVER_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/ip/basic_resolver_query.hpp"
+#include "asio/ip/basic_resolver_results.hpp"
+#include "asio/detail/concurrency_hint.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/resolve_endpoint_op.hpp"
+#include "asio/detail/resolve_query_op.hpp"
+#include "asio/detail/resolver_service_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Protocol>
+class resolver_service :
+  public execution_context_service_base<resolver_service<Protocol> >,
+  public resolver_service_base
+{
+public:
+  // The implementation type of the resolver. A cancellation token is used to
+  // indicate to the background thread that the operation has been cancelled.
+  typedef socket_ops::shared_cancel_token_type implementation_type;
+
+  // The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  // The query type.
+  typedef asio::ip::basic_resolver_query<Protocol> query_type;
+
+  // The results type.
+  typedef asio::ip::basic_resolver_results<Protocol> results_type;
+
+  // Constructor.
+  resolver_service(execution_context& context)
+    : execution_context_service_base<resolver_service<Protocol> >(context),
+      resolver_service_base(context)
+  {
+  }
+
+  // Destroy all user-defined handler objects owned by the service.
+  void shutdown()
+  {
+    this->base_shutdown();
+  }
+
+  // Perform any fork-related housekeeping.
+  void notify_fork(execution_context::fork_event fork_ev)
+  {
+    this->base_notify_fork(fork_ev);
+  }
+
+  // Resolve a query to a list of entries.
+  results_type resolve(implementation_type&, const query_type& query,
+      asio::error_code& ec)
+  {
+    asio::detail::addrinfo_type* address_info = 0;
+
+    socket_ops::getaddrinfo(query.host_name().c_str(),
+        query.service_name().c_str(), query.hints(), &address_info, ec);
+    auto_addrinfo auto_address_info(address_info);
+
+    return ec ? results_type() : results_type::create(
+        address_info, query.host_name(), query.service_name());
+  }
+
+  // Asynchronously resolve a query to a list of entries.
+  template <typename Handler, typename IoExecutor>
+  void async_resolve(implementation_type& impl, const query_type& query,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef resolve_query_op<Protocol, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl, query, scheduler_, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((scheduler_.context(),
+          *p.p, "resolver", &impl, 0, "async_resolve"));
+
+    start_resolve_op(p.p);
+    p.v = p.p = 0;
+  }
+
+  // Resolve an endpoint to a list of entries.
+  results_type resolve(implementation_type&,
+      const endpoint_type& endpoint, asio::error_code& ec)
+  {
+    char host_name[NI_MAXHOST];
+    char service_name[NI_MAXSERV];
+    socket_ops::sync_getnameinfo(endpoint.data(), endpoint.size(),
+        host_name, NI_MAXHOST, service_name, NI_MAXSERV,
+        endpoint.protocol().type(), ec);
+
+    return ec ? results_type() : results_type::create(
+        endpoint, host_name, service_name);
+  }
+
+  // Asynchronously resolve an endpoint to a list of entries.
+  template <typename Handler, typename IoExecutor>
+  void async_resolve(implementation_type& impl, const endpoint_type& endpoint,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef resolve_endpoint_op<Protocol, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl, endpoint, scheduler_, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((scheduler_.context(),
+          *p.p, "resolver", &impl, 0, "async_resolve"));
+
+    start_resolve_op(p.p);
+    p.v = p.p = 0;
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_RESOLVER_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolver_service_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolver_service_base.hpp
new file mode 100644
index 00000000000..5b1f23c64ee
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/resolver_service_base.hpp
@@ -0,0 +1,143 @@
+//
+// detail/resolver_service_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_RESOLVER_SERVICE_BASE_HPP
+#define ASIO_DETAIL_RESOLVER_SERVICE_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/resolve_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/scoped_ptr.hpp"
+#include "asio/detail/thread.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_io_context.hpp"
+#else // defined(ASIO_HAS_IOCP)
+# include "asio/detail/scheduler.hpp"
+#endif // defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class resolver_service_base
+{
+public:
+  // The implementation type of the resolver. A cancellation token is used to
+  // indicate to the background thread that the operation has been cancelled.
+  typedef socket_ops::shared_cancel_token_type implementation_type;
+
+  // Constructor.
+  ASIO_DECL resolver_service_base(execution_context& context);
+
+  // Destructor.
+  ASIO_DECL ~resolver_service_base();
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void base_shutdown();
+
+  // Perform any fork-related housekeeping.
+  ASIO_DECL void base_notify_fork(
+      execution_context::fork_event fork_ev);
+
+  // Construct a new resolver implementation.
+  ASIO_DECL void construct(implementation_type& impl);
+
+  // Destroy a resolver implementation.
+  ASIO_DECL void destroy(implementation_type&);
+
+  // Move-construct a new resolver implementation.
+  ASIO_DECL void move_construct(implementation_type& impl,
+      implementation_type& other_impl);
+
+  // Move-assign from another resolver implementation.
+  ASIO_DECL void move_assign(implementation_type& impl,
+      resolver_service_base& other_service,
+      implementation_type& other_impl);
+
+  // Cancel pending asynchronous operations.
+  ASIO_DECL void cancel(implementation_type& impl);
+
+protected:
+  // Helper function to start an asynchronous resolve operation.
+  ASIO_DECL void start_resolve_op(resolve_op* op);
+
+#if !defined(ASIO_WINDOWS_RUNTIME)
+  // Helper class to perform exception-safe cleanup of addrinfo objects.
+  class auto_addrinfo
+    : private asio::detail::noncopyable
+  {
+  public:
+    explicit auto_addrinfo(asio::detail::addrinfo_type* ai)
+      : ai_(ai)
+    {
+    }
+
+    ~auto_addrinfo()
+    {
+      if (ai_)
+        socket_ops::freeaddrinfo(ai_);
+    }
+
+    operator asio::detail::addrinfo_type*()
+    {
+      return ai_;
+    }
+
+  private:
+    asio::detail::addrinfo_type* ai_;
+  };
+#endif // !defined(ASIO_WINDOWS_RUNTIME)
+
+  // Helper class to run the work scheduler in a thread.
+  class work_scheduler_runner;
+
+  // Start the work scheduler if it's not already running.
+  ASIO_DECL void start_work_thread();
+
+  // The scheduler implementation used to post completions.
+#if defined(ASIO_HAS_IOCP)
+  typedef class win_iocp_io_context scheduler_impl;
+#else
+  typedef class scheduler scheduler_impl;
+#endif
+  scheduler_impl& scheduler_;
+
+private:
+  // Mutex to protect access to internal data.
+  asio::detail::mutex mutex_;
+
+  // Private scheduler used for performing asynchronous host resolution.
+  asio::detail::scoped_ptr<scheduler_impl> work_scheduler_;
+
+  // Thread used for running the work io_context's run loop.
+  asio::detail::scoped_ptr<asio::detail::thread> work_thread_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/resolver_service_base.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_RESOLVER_SERVICE_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scheduler.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scheduler.hpp
new file mode 100644
index 00000000000..0d721e80762
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scheduler.hpp
@@ -0,0 +1,224 @@
+//
+// detail/scheduler.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SCHEDULER_HPP
+#define ASIO_DETAIL_SCHEDULER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/error_code.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/detail/atomic_count.hpp"
+#include "asio/detail/conditionally_enabled_event.hpp"
+#include "asio/detail/conditionally_enabled_mutex.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/reactor_fwd.hpp"
+#include "asio/detail/scheduler_operation.hpp"
+#include "asio/detail/thread.hpp"
+#include "asio/detail/thread_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+struct scheduler_thread_info;
+
+class scheduler
+  : public execution_context_service_base<scheduler>,
+    public thread_context
+{
+public:
+  typedef scheduler_operation operation;
+
+  // Constructor. Specifies the number of concurrent threads that are likely to
+  // run the scheduler. If set to 1 certain optimisation are performed.
+  ASIO_DECL scheduler(asio::execution_context& ctx,
+      int concurrency_hint = 0, bool own_thread = true);
+
+  // Destructor.
+  ASIO_DECL ~scheduler();
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Initialise the task, if required.
+  ASIO_DECL void init_task();
+
+  // Run the event loop until interrupted or no more work.
+  ASIO_DECL std::size_t run(asio::error_code& ec);
+
+  // Run until interrupted or one operation is performed.
+  ASIO_DECL std::size_t run_one(asio::error_code& ec);
+
+  // Run until timeout, interrupted, or one operation is performed.
+  ASIO_DECL std::size_t wait_one(
+      long usec, asio::error_code& ec);
+
+  // Poll for operations without blocking.
+  ASIO_DECL std::size_t poll(asio::error_code& ec);
+
+  // Poll for one operation without blocking.
+  ASIO_DECL std::size_t poll_one(asio::error_code& ec);
+
+  // Interrupt the event processing loop.
+  ASIO_DECL void stop();
+
+  // Determine whether the scheduler is stopped.
+  ASIO_DECL bool stopped() const;
+
+  // Restart in preparation for a subsequent run invocation.
+  ASIO_DECL void restart();
+
+  // Notify that some work has started.
+  void work_started()
+  {
+    ++outstanding_work_;
+  }
+
+  // Used to compensate for a forthcoming work_finished call. Must be called
+  // from within a scheduler-owned thread.
+  ASIO_DECL void compensating_work_started();
+
+  // Notify that some work has finished.
+  void work_finished()
+  {
+    if (--outstanding_work_ == 0)
+      stop();
+  }
+
+  // Return whether a handler can be dispatched immediately.
+  bool can_dispatch()
+  {
+    return thread_call_stack::contains(this) != 0;
+  }
+
+  // Request invocation of the given operation and return immediately. Assumes
+  // that work_started() has not yet been called for the operation.
+  ASIO_DECL void post_immediate_completion(
+      operation* op, bool is_continuation);
+
+  // Request invocation of the given operation and return immediately. Assumes
+  // that work_started() was previously called for the operation.
+  ASIO_DECL void post_deferred_completion(operation* op);
+
+  // Request invocation of the given operations and return immediately. Assumes
+  // that work_started() was previously called for each operation.
+  ASIO_DECL void post_deferred_completions(op_queue<operation>& ops);
+
+  // Enqueue the given operation following a failed attempt to dispatch the
+  // operation for immediate invocation.
+  ASIO_DECL void do_dispatch(operation* op);
+
+  // Process unfinished operations as part of a shutdownoperation. Assumes that
+  // work_started() was previously called for the operations.
+  ASIO_DECL void abandon_operations(op_queue<operation>& ops);
+
+  // Get the concurrency hint that was used to initialise the scheduler.
+  int concurrency_hint() const
+  {
+    return concurrency_hint_;
+  }
+
+private:
+  // The mutex type used by this scheduler.
+  typedef conditionally_enabled_mutex mutex;
+
+  // The event type used by this scheduler.
+  typedef conditionally_enabled_event event;
+
+  // Structure containing thread-specific data.
+  typedef scheduler_thread_info thread_info;
+
+  // Run at most one operation. May block.
+  ASIO_DECL std::size_t do_run_one(mutex::scoped_lock& lock,
+      thread_info& this_thread, const asio::error_code& ec);
+
+  // Run at most one operation with a timeout. May block.
+  ASIO_DECL std::size_t do_wait_one(mutex::scoped_lock& lock,
+      thread_info& this_thread, long usec, const asio::error_code& ec);
+
+  // Poll for at most one operation.
+  ASIO_DECL std::size_t do_poll_one(mutex::scoped_lock& lock,
+      thread_info& this_thread, const asio::error_code& ec);
+
+  // Stop the task and all idle threads.
+  ASIO_DECL void stop_all_threads(mutex::scoped_lock& lock);
+
+  // Wake a single idle thread, or the task, and always unlock the mutex.
+  ASIO_DECL void wake_one_thread_and_unlock(
+      mutex::scoped_lock& lock);
+
+  // Helper class to run the scheduler in its own thread.
+  class thread_function;
+  friend class thread_function;
+
+  // Helper class to perform task-related operations on block exit.
+  struct task_cleanup;
+  friend struct task_cleanup;
+
+  // Helper class to call work-related operations on block exit.
+  struct work_cleanup;
+  friend struct work_cleanup;
+
+  // Whether to optimise for single-threaded use cases.
+  const bool one_thread_;
+
+  // Mutex to protect access to internal data.
+  mutable mutex mutex_;
+
+  // Event to wake up blocked threads.
+  event wakeup_event_;
+
+  // The task to be run by this service.
+  reactor* task_;
+
+  // Operation object to represent the position of the task in the queue.
+  struct task_operation : operation
+  {
+    task_operation() : operation(0) {}
+  } task_operation_;
+
+  // Whether the task has been interrupted.
+  bool task_interrupted_;
+
+  // The count of unfinished work.
+  atomic_count outstanding_work_;
+
+  // The queue of handlers that are ready to be delivered.
+  op_queue<operation> op_queue_;
+
+  // Flag to indicate that the dispatcher has been stopped.
+  bool stopped_;
+
+  // Flag to indicate that the dispatcher has been shut down.
+  bool shutdown_;
+
+  // The concurrency hint used to initialise the scheduler.
+  const int concurrency_hint_;
+
+  // The thread that is running the scheduler.
+  asio::detail::thread* thread_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/scheduler.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_SCHEDULER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scheduler_operation.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scheduler_operation.hpp
new file mode 100644
index 00000000000..6f4c5df64c2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scheduler_operation.hpp
@@ -0,0 +1,78 @@
+//
+// detail/scheduler_operation.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SCHEDULER_OPERATION_HPP
+#define ASIO_DETAIL_SCHEDULER_OPERATION_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/error_code.hpp"
+#include "asio/detail/handler_tracking.hpp"
+#include "asio/detail/op_queue.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class scheduler;
+
+// Base class for all operations. A function pointer is used instead of virtual
+// functions to avoid the associated overhead.
+class scheduler_operation ASIO_INHERIT_TRACKED_HANDLER
+{
+public:
+  typedef scheduler_operation operation_type;
+
+  void complete(void* owner, const asio::error_code& ec,
+      std::size_t bytes_transferred)
+  {
+    func_(owner, this, ec, bytes_transferred);
+  }
+
+  void destroy()
+  {
+    func_(0, this, asio::error_code(), 0);
+  }
+
+protected:
+  typedef void (*func_type)(void*,
+      scheduler_operation*,
+      const asio::error_code&, std::size_t);
+
+  scheduler_operation(func_type func)
+    : next_(0),
+      func_(func),
+      task_result_(0)
+  {
+  }
+
+  // Prevents deletion through this type.
+  ~scheduler_operation()
+  {
+  }
+
+private:
+  friend class op_queue_access;
+  scheduler_operation* next_;
+  func_type func_;
+protected:
+  friend class scheduler;
+  unsigned int task_result_; // Passed into bytes transferred.
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_SCHEDULER_OPERATION_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scheduler_thread_info.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scheduler_thread_info.hpp
new file mode 100644
index 00000000000..202ac0a77fa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scheduler_thread_info.hpp
@@ -0,0 +1,40 @@
+//
+// detail/scheduler_thread_info.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SCHEDULER_THREAD_INFO_HPP
+#define ASIO_DETAIL_SCHEDULER_THREAD_INFO_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/thread_info_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class scheduler;
+class scheduler_operation;
+
+struct scheduler_thread_info : public thread_info_base
+{
+  op_queue<scheduler_operation> private_op_queue;
+  long private_outstanding_work;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_SCHEDULER_THREAD_INFO_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scoped_lock.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scoped_lock.hpp
new file mode 100644
index 00000000000..94d49666abf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scoped_lock.hpp
@@ -0,0 +1,101 @@
+//
+// detail/scoped_lock.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SCOPED_LOCK_HPP
+#define ASIO_DETAIL_SCOPED_LOCK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Helper class to lock and unlock a mutex automatically.
+template <typename Mutex>
+class scoped_lock
+  : private noncopyable
+{
+public:
+  // Tag type used to distinguish constructors.
+  enum adopt_lock_t { adopt_lock };
+
+  // Constructor adopts a lock that is already held.
+  scoped_lock(Mutex& m, adopt_lock_t)
+    : mutex_(m),
+      locked_(true)
+  {
+  }
+
+  // Constructor acquires the lock.
+  explicit scoped_lock(Mutex& m)
+    : mutex_(m)
+  {
+    mutex_.lock();
+    locked_ = true;
+  }
+
+  // Destructor releases the lock.
+  ~scoped_lock()
+  {
+    if (locked_)
+      mutex_.unlock();
+  }
+
+  // Explicitly acquire the lock.
+  void lock()
+  {
+    if (!locked_)
+    {
+      mutex_.lock();
+      locked_ = true;
+    }
+  }
+
+  // Explicitly release the lock.
+  void unlock()
+  {
+    if (locked_)
+    {
+      mutex_.unlock();
+      locked_ = false;
+    }
+  }
+
+  // Test whether the lock is held.
+  bool locked() const
+  {
+    return locked_;
+  }
+
+  // Get the underlying mutex.
+  Mutex& mutex()
+  {
+    return mutex_;
+  }
+
+private:
+  // The underlying mutex.
+  Mutex& mutex_;
+
+  // Whether the mutex is currently locked or unlocked.
+  bool locked_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_SCOPED_LOCK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scoped_ptr.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scoped_ptr.hpp
new file mode 100644
index 00000000000..1fff74182d2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/scoped_ptr.hpp
@@ -0,0 +1,87 @@
+//
+// detail/scoped_ptr.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SCOPED_PTR_HPP
+#define ASIO_DETAIL_SCOPED_PTR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+class scoped_ptr
+{
+public:
+  // Constructor.
+  explicit scoped_ptr(T* p = 0)
+    : p_(p)
+  {
+  }
+
+  // Destructor.
+  ~scoped_ptr()
+  {
+    delete p_;
+  }
+
+  // Access.
+  T* get()
+  {
+    return p_;
+  }
+
+  // Access.
+  T* operator->()
+  {
+    return p_;
+  }
+
+  // Dereference.
+  T& operator*()
+  {
+    return *p_;
+  }
+
+  // Reset pointer.
+  void reset(T* p = 0)
+  {
+    delete p_;
+    p_ = p;
+  }
+
+  // Release ownership of the pointer.
+  T* release()
+  {
+    T* tmp = p_;
+    p_ = 0;
+    return tmp;
+  }
+
+private:
+  // Disallow copying and assignment.
+  scoped_ptr(const scoped_ptr&);
+  scoped_ptr& operator=(const scoped_ptr&);
+
+  T* p_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_SCOPED_PTR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/select_interrupter.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/select_interrupter.hpp
new file mode 100644
index 00000000000..e77e29726ee
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/select_interrupter.hpp
@@ -0,0 +1,46 @@
+//
+// detail/select_interrupter.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SELECT_INTERRUPTER_HPP
+#define ASIO_DETAIL_SELECT_INTERRUPTER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_WINDOWS_RUNTIME)
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__) || defined(__SYMBIAN32__) || defined (ESP_PLATFORM)
+# include "asio/detail/socket_select_interrupter.hpp"
+#elif defined(ASIO_HAS_EVENTFD)
+# include "asio/detail/eventfd_select_interrupter.hpp"
+#else
+# include "asio/detail/pipe_select_interrupter.hpp"
+#endif
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__) || defined(__SYMBIAN32__) || defined (ESP_PLATFORM)
+typedef socket_select_interrupter select_interrupter;
+#elif defined(ASIO_HAS_EVENTFD)
+typedef eventfd_select_interrupter select_interrupter;
+#else
+typedef pipe_select_interrupter select_interrupter;
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#endif // !defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_SELECT_INTERRUPTER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/select_reactor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/select_reactor.hpp
new file mode 100644
index 00000000000..be4d02cb5b7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/select_reactor.hpp
@@ -0,0 +1,238 @@
+//
+// detail/select_reactor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SELECT_REACTOR_HPP
+#define ASIO_DETAIL_SELECT_REACTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP) \
+  || (!defined(ASIO_HAS_DEV_POLL) \
+      && !defined(ASIO_HAS_EPOLL) \
+      && !defined(ASIO_HAS_KQUEUE) \
+      && !defined(ASIO_WINDOWS_RUNTIME))
+
+#include <cstddef>
+#include "asio/detail/fd_set_adapter.hpp"
+#include "asio/detail/limits.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/reactor_op_queue.hpp"
+#include "asio/detail/select_interrupter.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/timer_queue_base.hpp"
+#include "asio/detail/timer_queue_set.hpp"
+#include "asio/detail/wait_op.hpp"
+#include "asio/execution_context.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/thread.hpp"
+#endif // defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class select_reactor
+  : public execution_context_service_base<select_reactor>
+{
+public:
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+  enum op_types { read_op = 0, write_op = 1, except_op = 2,
+    max_select_ops = 3, connect_op = 3, max_ops = 4 };
+#else // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+  enum op_types { read_op = 0, write_op = 1, except_op = 2,
+    max_select_ops = 3, connect_op = 1, max_ops = 3 };
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+  // Per-descriptor data.
+  struct per_descriptor_data
+  {
+  };
+
+  // Constructor.
+  ASIO_DECL select_reactor(asio::execution_context& ctx);
+
+  // Destructor.
+  ASIO_DECL ~select_reactor();
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Recreate internal descriptors following a fork.
+  ASIO_DECL void notify_fork(
+      asio::execution_context::fork_event fork_ev);
+
+  // Initialise the task, but only if the reactor is not in its own thread.
+  ASIO_DECL void init_task();
+
+  // Register a socket with the reactor. Returns 0 on success, system error
+  // code on failure.
+  ASIO_DECL int register_descriptor(socket_type, per_descriptor_data&);
+
+  // Register a descriptor with an associated single operation. Returns 0 on
+  // success, system error code on failure.
+  ASIO_DECL int register_internal_descriptor(
+      int op_type, socket_type descriptor,
+      per_descriptor_data& descriptor_data, reactor_op* op);
+
+  // Post a reactor operation for immediate completion.
+  void post_immediate_completion(reactor_op* op, bool is_continuation)
+  {
+    scheduler_.post_immediate_completion(op, is_continuation);
+  }
+
+  // Start a new operation. The reactor operation will be performed when the
+  // given descriptor is flagged as ready, or an error has occurred.
+  ASIO_DECL void start_op(int op_type, socket_type descriptor,
+      per_descriptor_data&, reactor_op* op, bool is_continuation, bool);
+
+  // Cancel all operations associated with the given descriptor. The
+  // handlers associated with the descriptor will be invoked with the
+  // operation_aborted error.
+  ASIO_DECL void cancel_ops(socket_type descriptor, per_descriptor_data&);
+
+  // Cancel any operations that are running against the descriptor and remove
+  // its registration from the reactor. The reactor resources associated with
+  // the descriptor must be released by calling cleanup_descriptor_data.
+  ASIO_DECL void deregister_descriptor(socket_type descriptor,
+      per_descriptor_data&, bool closing);
+
+  // Remove the descriptor's registration from the reactor. The reactor
+  // resources associated with the descriptor must be released by calling
+  // cleanup_descriptor_data.
+  ASIO_DECL void deregister_internal_descriptor(
+      socket_type descriptor, per_descriptor_data&);
+
+  // Perform any post-deregistration cleanup tasks associated with the
+  // descriptor data.
+  ASIO_DECL void cleanup_descriptor_data(per_descriptor_data&);
+
+  // Move descriptor registration from one descriptor_data object to another.
+  ASIO_DECL void move_descriptor(socket_type descriptor,
+      per_descriptor_data& target_descriptor_data,
+      per_descriptor_data& source_descriptor_data);
+
+  // Add a new timer queue to the reactor.
+  template <typename Time_Traits>
+  void add_timer_queue(timer_queue<Time_Traits>& queue);
+
+  // Remove a timer queue from the reactor.
+  template <typename Time_Traits>
+  void remove_timer_queue(timer_queue<Time_Traits>& queue);
+
+  // Schedule a new operation in the given timer queue to expire at the
+  // specified absolute time.
+  template <typename Time_Traits>
+  void schedule_timer(timer_queue<Time_Traits>& queue,
+      const typename Time_Traits::time_type& time,
+      typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op);
+
+  // Cancel the timer operations associated with the given token. Returns the
+  // number of operations that have been posted or dispatched.
+  template <typename Time_Traits>
+  std::size_t cancel_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& timer,
+      std::size_t max_cancelled = (std::numeric_limits<std::size_t>::max)());
+
+  // Move the timer operations associated with the given timer.
+  template <typename Time_Traits>
+  void move_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& target,
+      typename timer_queue<Time_Traits>::per_timer_data& source);
+
+  // Run select once until interrupted or events are ready to be dispatched.
+  ASIO_DECL void run(long usec, op_queue<operation>& ops);
+
+  // Interrupt the select loop.
+  ASIO_DECL void interrupt();
+
+private:
+#if defined(ASIO_HAS_IOCP)
+  // Run the select loop in the thread.
+  ASIO_DECL void run_thread();
+#endif // defined(ASIO_HAS_IOCP)
+
+  // Helper function to add a new timer queue.
+  ASIO_DECL void do_add_timer_queue(timer_queue_base& queue);
+
+  // Helper function to remove a timer queue.
+  ASIO_DECL void do_remove_timer_queue(timer_queue_base& queue);
+
+  // Get the timeout value for the select call.
+  ASIO_DECL timeval* get_timeout(long usec, timeval& tv);
+
+  // Cancel all operations associated with the given descriptor. This function
+  // does not acquire the select_reactor's mutex.
+  ASIO_DECL void cancel_ops_unlocked(socket_type descriptor,
+      const asio::error_code& ec);
+
+  // The scheduler implementation used to post completions.
+# if defined(ASIO_HAS_IOCP)
+  typedef class win_iocp_io_context scheduler_type;
+# else // defined(ASIO_HAS_IOCP)
+  typedef class scheduler scheduler_type;
+# endif // defined(ASIO_HAS_IOCP)
+  scheduler_type& scheduler_;
+
+  // Mutex to protect access to internal data.
+  asio::detail::mutex mutex_;
+
+  // The interrupter is used to break a blocking select call.
+  select_interrupter interrupter_;
+
+  // The queues of read, write and except operations.
+  reactor_op_queue<socket_type> op_queue_[max_ops];
+
+  // The file descriptor sets to be passed to the select system call.
+  fd_set_adapter fd_sets_[max_select_ops];
+
+  // The timer queues.
+  timer_queue_set timer_queues_;
+
+#if defined(ASIO_HAS_IOCP)
+  // Helper class to run the reactor loop in a thread.
+  class thread_function;
+  friend class thread_function;
+
+  // Does the reactor loop thread need to stop.
+  bool stop_thread_;
+
+  // The thread that is running the reactor loop.
+  asio::detail::thread* thread_;
+#endif // defined(ASIO_HAS_IOCP)
+
+  // Whether the service has been shut down.
+  bool shutdown_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/detail/impl/select_reactor.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/select_reactor.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_IOCP)
+       //   || (!defined(ASIO_HAS_DEV_POLL)
+       //       && !defined(ASIO_HAS_EPOLL)
+       //       && !defined(ASIO_HAS_KQUEUE)
+       //       && !defined(ASIO_WINDOWS_RUNTIME))
+
+#endif // ASIO_DETAIL_SELECT_REACTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/service_registry.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/service_registry.hpp
new file mode 100644
index 00000000000..edced403948
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/service_registry.hpp
@@ -0,0 +1,164 @@
+//
+// detail/service_registry.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SERVICE_REGISTRY_HPP
+#define ASIO_DETAIL_SERVICE_REGISTRY_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <typeinfo>
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/execution_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+class io_context;
+
+namespace detail {
+
+template <typename T>
+class typeid_wrapper {};
+
+class service_registry
+  : private noncopyable
+{
+public:
+  // Constructor.
+  ASIO_DECL service_registry(execution_context& owner);
+
+  // Destructor.
+  ASIO_DECL ~service_registry();
+
+  // Shutdown all services.
+  ASIO_DECL void shutdown_services();
+
+  // Destroy all services.
+  ASIO_DECL void destroy_services();
+
+  // Notify all services of a fork event.
+  ASIO_DECL void notify_fork(execution_context::fork_event fork_ev);
+
+  // Get the service object corresponding to the specified service type. Will
+  // create a new service object automatically if no such object already
+  // exists. Ownership of the service object is not transferred to the caller.
+  template <typename Service>
+  Service& use_service();
+
+  // Get the service object corresponding to the specified service type. Will
+  // create a new service object automatically if no such object already
+  // exists. Ownership of the service object is not transferred to the caller.
+  // This overload is used for backwards compatibility with services that
+  // inherit from io_context::service.
+  template <typename Service>
+  Service& use_service(io_context& owner);
+
+  // Add a service object. Throws on error, in which case ownership of the
+  // object is retained by the caller.
+  template <typename Service>
+  void add_service(Service* new_service);
+
+  // Check whether a service object of the specified type already exists.
+  template <typename Service>
+  bool has_service() const;
+
+private:
+  // Initalise a service's key when the key_type typedef is not available.
+  template <typename Service>
+  static void init_key(execution_context::service::key& key, ...);
+
+#if !defined(ASIO_NO_TYPEID)
+  // Initalise a service's key when the key_type typedef is available.
+  template <typename Service>
+  static void init_key(execution_context::service::key& key,
+      typename enable_if<
+        is_base_of<typename Service::key_type, Service>::value>::type*);
+#endif // !defined(ASIO_NO_TYPEID)
+
+  // Initialise a service's key based on its id.
+  ASIO_DECL static void init_key_from_id(
+      execution_context::service::key& key,
+      const execution_context::id& id);
+
+#if !defined(ASIO_NO_TYPEID)
+  // Initialise a service's key based on its id.
+  template <typename Service>
+  static void init_key_from_id(execution_context::service::key& key,
+      const service_id<Service>& /*id*/);
+#endif // !defined(ASIO_NO_TYPEID)
+
+  // Check if a service matches the given id.
+  ASIO_DECL static bool keys_match(
+      const execution_context::service::key& key1,
+      const execution_context::service::key& key2);
+
+  // The type of a factory function used for creating a service instance.
+  typedef execution_context::service*(*factory_type)(void*);
+
+  // Factory function for creating a service instance.
+  template <typename Service, typename Owner>
+  static execution_context::service* create(void* owner);
+
+  // Destroy a service instance.
+  ASIO_DECL static void destroy(execution_context::service* service);
+
+  // Helper class to manage service pointers.
+  struct auto_service_ptr;
+  friend struct auto_service_ptr;
+  struct auto_service_ptr
+  {
+    execution_context::service* ptr_;
+    ~auto_service_ptr() { destroy(ptr_); }
+  };
+
+  // Get the service object corresponding to the specified service key. Will
+  // create a new service object automatically if no such object already
+  // exists. Ownership of the service object is not transferred to the caller.
+  ASIO_DECL execution_context::service* do_use_service(
+      const execution_context::service::key& key,
+      factory_type factory, void* owner);
+
+  // Add a service object. Throws on error, in which case ownership of the
+  // object is retained by the caller.
+  ASIO_DECL void do_add_service(
+      const execution_context::service::key& key,
+      execution_context::service* new_service);
+
+  // Check whether a service object with the specified key already exists.
+  ASIO_DECL bool do_has_service(
+      const execution_context::service::key& key) const;
+
+  // Mutex to protect access to internal data.
+  mutable asio::detail::mutex mutex_;
+
+  // The owner of this service registry and the services it contains.
+  execution_context& owner_;
+
+  // The first service in the list of contained services.
+  execution_context::service* first_service_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/detail/impl/service_registry.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/service_registry.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_SERVICE_REGISTRY_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_blocker.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_blocker.hpp
new file mode 100644
index 00000000000..4fdfc6a8a27
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_blocker.hpp
@@ -0,0 +1,44 @@
+//
+// detail/signal_blocker.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SIGNAL_BLOCKER_HPP
+#define ASIO_DETAIL_SIGNAL_BLOCKER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS) || defined(ASIO_WINDOWS) \
+  || defined(ASIO_WINDOWS_RUNTIME) \
+  || defined(__CYGWIN__) || defined(__SYMBIAN32__)
+# include "asio/detail/null_signal_blocker.hpp"
+#elif defined(ASIO_HAS_PTHREADS)
+# include "asio/detail/posix_signal_blocker.hpp"
+#else
+# error Only Windows and POSIX are supported!
+#endif
+
+namespace asio {
+namespace detail {
+
+#if !defined(ASIO_HAS_THREADS) || defined(ASIO_WINDOWS) \
+  || defined(ASIO_WINDOWS_RUNTIME) \
+  || defined(__CYGWIN__) || defined(__SYMBIAN32__)
+typedef null_signal_blocker signal_blocker;
+#elif defined(ASIO_HAS_PTHREADS)
+typedef posix_signal_blocker signal_blocker;
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_SIGNAL_BLOCKER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_handler.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_handler.hpp
new file mode 100644
index 00000000000..e5176f009cc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_handler.hpp
@@ -0,0 +1,88 @@
+//
+// detail/signal_handler.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SIGNAL_HANDLER_HPP
+#define ASIO_DETAIL_SIGNAL_HANDLER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/handler_work.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/signal_op.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler, typename IoExecutor>
+class signal_handler : public signal_op
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(signal_handler);
+
+  signal_handler(Handler& h, const IoExecutor& io_ex)
+    : signal_op(&signal_handler::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(h)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    signal_handler* h(static_cast<signal_handler*>(base));
+    ptr p = { asio::detail::addressof(h->handler_), h, h };
+    handler_work<Handler, IoExecutor> w(h->handler_, h->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*h));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, int>
+      handler(h->handler_, h->ec_, h->signal_number_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_SIGNAL_HANDLER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_init.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_init.hpp
new file mode 100644
index 00000000000..8d99197dcfb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_init.hpp
@@ -0,0 +1,47 @@
+//
+// detail/signal_init.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SIGNAL_INIT_HPP
+#define ASIO_DETAIL_SIGNAL_INIT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+#include <csignal>
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <int Signal = SIGPIPE>
+class signal_init
+{
+public:
+  // Constructor.
+  signal_init()
+  {
+    std::signal(Signal, SIG_IGN);
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+#endif // ASIO_DETAIL_SIGNAL_INIT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_op.hpp
new file mode 100644
index 00000000000..7ca5cbd53b0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_op.hpp
@@ -0,0 +1,49 @@
+//
+// detail/signal_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SIGNAL_OP_HPP
+#define ASIO_DETAIL_SIGNAL_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/operation.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class signal_op
+  : public operation
+{
+public:
+  // The error code to be passed to the completion handler.
+  asio::error_code ec_;
+
+  // The signal number to be passed to the completion handler.
+  int signal_number_;
+
+protected:
+  signal_op(func_type func)
+    : operation(func),
+      signal_number_(0)
+  {
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_SIGNAL_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_set_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_set_service.hpp
new file mode 100644
index 00000000000..d4efe9c5f90
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/signal_set_service.hpp
@@ -0,0 +1,229 @@
+//
+// detail/signal_set_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SIGNAL_SET_SERVICE_HPP
+#define ASIO_DETAIL_SIGNAL_SET_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include <cstddef>
+#include <signal.h>
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/signal_handler.hpp"
+#include "asio/detail/signal_op.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_io_context.hpp"
+#else // defined(ASIO_HAS_IOCP)
+# include "asio/detail/scheduler.hpp"
+#endif // defined(ASIO_HAS_IOCP)
+
+#if !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+# include "asio/detail/reactor.hpp"
+#endif // !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+#if defined(NSIG) && (NSIG > 0)
+enum { max_signal_number = NSIG };
+#else
+enum { max_signal_number = 128 };
+#endif
+
+extern ASIO_DECL struct signal_state* get_signal_state();
+
+extern "C" ASIO_DECL void asio_signal_handler(int signal_number);
+
+class signal_set_service :
+  public execution_context_service_base<signal_set_service>
+{
+public:
+  // Type used for tracking an individual signal registration.
+  class registration
+  {
+  public:
+    // Default constructor.
+    registration()
+      : signal_number_(0),
+        queue_(0),
+        undelivered_(0),
+        next_in_table_(0),
+        prev_in_table_(0),
+        next_in_set_(0)
+    {
+    }
+
+  private:
+    // Only this service will have access to the internal values.
+    friend class signal_set_service;
+
+    // The signal number that is registered.
+    int signal_number_;
+
+    // The waiting signal handlers.
+    op_queue<signal_op>* queue_;
+
+    // The number of undelivered signals.
+    std::size_t undelivered_;
+
+    // Pointers to adjacent registrations in the registrations_ table.
+    registration* next_in_table_;
+    registration* prev_in_table_;
+
+    // Link to next registration in the signal set.
+    registration* next_in_set_;
+  };
+
+  // The implementation type of the signal_set.
+  class implementation_type
+  {
+  public:
+    // Default constructor.
+    implementation_type()
+      : signals_(0)
+    {
+    }
+
+  private:
+    // Only this service will have access to the internal values.
+    friend class signal_set_service;
+
+    // The pending signal handlers.
+    op_queue<signal_op> queue_;
+
+    // Linked list of registered signals.
+    registration* signals_;
+  };
+
+  // Constructor.
+  ASIO_DECL signal_set_service(execution_context& context);
+
+  // Destructor.
+  ASIO_DECL ~signal_set_service();
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Perform fork-related housekeeping.
+  ASIO_DECL void notify_fork(
+      asio::execution_context::fork_event fork_ev);
+
+  // Construct a new signal_set implementation.
+  ASIO_DECL void construct(implementation_type& impl);
+
+  // Destroy a signal_set implementation.
+  ASIO_DECL void destroy(implementation_type& impl);
+
+  // Add a signal to a signal_set.
+  ASIO_DECL asio::error_code add(implementation_type& impl,
+      int signal_number, asio::error_code& ec);
+
+  // Remove a signal to a signal_set.
+  ASIO_DECL asio::error_code remove(implementation_type& impl,
+      int signal_number, asio::error_code& ec);
+
+  // Remove all signals from a signal_set.
+  ASIO_DECL asio::error_code clear(implementation_type& impl,
+      asio::error_code& ec);
+
+  // Cancel all operations associated with the signal set.
+  ASIO_DECL asio::error_code cancel(implementation_type& impl,
+      asio::error_code& ec);
+
+  // Start an asynchronous operation to wait for a signal to be delivered.
+  template <typename Handler, typename IoExecutor>
+  void async_wait(implementation_type& impl,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef signal_handler<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((scheduler_.context(),
+          *p.p, "signal_set", &impl, 0, "async_wait"));
+
+    start_wait_op(impl, p.p);
+    p.v = p.p = 0;
+  }
+
+  // Deliver notification that a particular signal occurred.
+  ASIO_DECL static void deliver_signal(int signal_number);
+
+private:
+  // Helper function to add a service to the global signal state.
+  ASIO_DECL static void add_service(signal_set_service* service);
+
+  // Helper function to remove a service from the global signal state.
+  ASIO_DECL static void remove_service(signal_set_service* service);
+
+  // Helper function to create the pipe descriptors.
+  ASIO_DECL static void open_descriptors();
+
+  // Helper function to close the pipe descriptors.
+  ASIO_DECL static void close_descriptors();
+
+  // Helper function to start a wait operation.
+  ASIO_DECL void start_wait_op(implementation_type& impl, signal_op* op);
+
+  // The scheduler used for dispatching handlers.
+#if defined(ASIO_HAS_IOCP)
+  typedef class win_iocp_io_context scheduler_impl;
+#else
+  typedef class scheduler scheduler_impl;
+#endif
+  scheduler_impl& scheduler_;
+
+#if !defined(ASIO_WINDOWS) \
+  && !defined(ASIO_WINDOWS_RUNTIME) \
+  && !defined(__CYGWIN__)
+  // The type used for registering for pipe reactor notifications.
+  class pipe_read_op;
+
+  // The reactor used for waiting for pipe readiness.
+  reactor& reactor_;
+
+  // The per-descriptor reactor data used for the pipe.
+  reactor::per_descriptor_data reactor_data_;
+#endif // !defined(ASIO_WINDOWS)
+       //   && !defined(ASIO_WINDOWS_RUNTIME)
+       //   && !defined(__CYGWIN__)
+
+  // A mapping from signal number to the registered signal sets.
+  registration* registrations_[max_signal_number];
+
+  // Pointers to adjacent services in linked list.
+  signal_set_service* next_;
+  signal_set_service* prev_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/signal_set_service.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_SIGNAL_SET_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_holder.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_holder.hpp
new file mode 100644
index 00000000000..aaa6e2d605e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_holder.hpp
@@ -0,0 +1,98 @@
+//
+// detail/socket_holder.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SOCKET_HOLDER_HPP
+#define ASIO_DETAIL_SOCKET_HOLDER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/socket_ops.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Implement the resource acquisition is initialisation idiom for sockets.
+class socket_holder
+  : private noncopyable
+{
+public:
+  // Construct as an uninitialised socket.
+  socket_holder()
+    : socket_(invalid_socket)
+  {
+  }
+
+  // Construct to take ownership of the specified socket.
+  explicit socket_holder(socket_type s)
+    : socket_(s)
+  {
+  }
+
+  // Destructor.
+  ~socket_holder()
+  {
+    if (socket_ != invalid_socket)
+    {
+      asio::error_code ec;
+      socket_ops::state_type state = 0;
+      socket_ops::close(socket_, state, true, ec);
+    }
+  }
+
+  // Get the underlying socket.
+  socket_type get() const
+  {
+    return socket_;
+  }
+
+  // Reset to an uninitialised socket.
+  void reset()
+  {
+    if (socket_ != invalid_socket)
+    {
+      asio::error_code ec;
+      socket_ops::state_type state = 0;
+      socket_ops::close(socket_, state, true, ec);
+      socket_ = invalid_socket;
+    }
+  }
+
+  // Reset to take ownership of the specified socket.
+  void reset(socket_type s)
+  {
+    reset();
+    socket_ = s;
+  }
+
+  // Release ownership of the socket.
+  socket_type release()
+  {
+    socket_type tmp = socket_;
+    socket_ = invalid_socket;
+    return tmp;
+  }
+
+private:
+  // The underlying socket.
+  socket_type socket_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_SOCKET_HOLDER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_ops.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_ops.hpp
new file mode 100644
index 00000000000..4b94e1f066f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_ops.hpp
@@ -0,0 +1,337 @@
+//
+// detail/socket_ops.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SOCKET_OPS_HPP
+#define ASIO_DETAIL_SOCKET_OPS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/error_code.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+namespace socket_ops {
+
+// Socket state bits.
+enum
+{
+  // The user wants a non-blocking socket.
+  user_set_non_blocking = 1,
+
+  // The socket has been set non-blocking.
+  internal_non_blocking = 2,
+
+  // Helper "state" used to determine whether the socket is non-blocking.
+  non_blocking = user_set_non_blocking | internal_non_blocking,
+
+  // User wants connection_aborted errors, which are disabled by default.
+  enable_connection_aborted = 4,
+
+  // The user set the linger option. Needs to be checked when closing.
+  user_set_linger = 8,
+
+  // The socket is stream-oriented.
+  stream_oriented = 16,
+
+  // The socket is datagram-oriented.
+  datagram_oriented = 32,
+
+  // The socket may have been dup()-ed.
+  possible_dup = 64
+};
+
+typedef unsigned char state_type;
+
+struct noop_deleter { void operator()(void*) {} };
+typedef shared_ptr<void> shared_cancel_token_type;
+typedef weak_ptr<void> weak_cancel_token_type;
+
+#if !defined(ASIO_WINDOWS_RUNTIME)
+
+ASIO_DECL socket_type accept(socket_type s, socket_addr_type* addr,
+    std::size_t* addrlen, asio::error_code& ec);
+
+ASIO_DECL socket_type sync_accept(socket_type s,
+    state_type state, socket_addr_type* addr,
+    std::size_t* addrlen, asio::error_code& ec);
+
+#if defined(ASIO_HAS_IOCP)
+
+ASIO_DECL void complete_iocp_accept(socket_type s,
+    void* output_buffer, DWORD address_length,
+    socket_addr_type* addr, std::size_t* addrlen,
+    socket_type new_socket, asio::error_code& ec);
+
+#else // defined(ASIO_HAS_IOCP)
+
+ASIO_DECL bool non_blocking_accept(socket_type s,
+    state_type state, socket_addr_type* addr, std::size_t* addrlen,
+    asio::error_code& ec, socket_type& new_socket);
+
+#endif // defined(ASIO_HAS_IOCP)
+
+ASIO_DECL int bind(socket_type s, const socket_addr_type* addr,
+    std::size_t addrlen, asio::error_code& ec);
+
+ASIO_DECL int close(socket_type s, state_type& state,
+    bool destruction, asio::error_code& ec);
+
+ASIO_DECL bool set_user_non_blocking(socket_type s,
+    state_type& state, bool value, asio::error_code& ec);
+
+ASIO_DECL bool set_internal_non_blocking(socket_type s,
+    state_type& state, bool value, asio::error_code& ec);
+
+ASIO_DECL int shutdown(socket_type s,
+    int what, asio::error_code& ec);
+
+ASIO_DECL int connect(socket_type s, const socket_addr_type* addr,
+    std::size_t addrlen, asio::error_code& ec);
+
+ASIO_DECL void sync_connect(socket_type s, const socket_addr_type* addr,
+    std::size_t addrlen, asio::error_code& ec);
+
+#if defined(ASIO_HAS_IOCP)
+
+ASIO_DECL void complete_iocp_connect(socket_type s,
+    asio::error_code& ec);
+
+#endif // defined(ASIO_HAS_IOCP)
+
+ASIO_DECL bool non_blocking_connect(socket_type s,
+    asio::error_code& ec);
+
+ASIO_DECL int socketpair(int af, int type, int protocol,
+    socket_type sv[2], asio::error_code& ec);
+
+ASIO_DECL bool sockatmark(socket_type s, asio::error_code& ec);
+
+ASIO_DECL size_t available(socket_type s, asio::error_code& ec);
+
+ASIO_DECL int listen(socket_type s,
+    int backlog, asio::error_code& ec);
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+typedef WSABUF buf;
+#else // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+typedef iovec buf;
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+ASIO_DECL void init_buf(buf& b, void* data, size_t size);
+
+ASIO_DECL void init_buf(buf& b, const void* data, size_t size);
+
+ASIO_DECL signed_size_type recv(socket_type s, buf* bufs,
+    size_t count, int flags, asio::error_code& ec);
+
+ASIO_DECL size_t sync_recv(socket_type s, state_type state, buf* bufs,
+    size_t count, int flags, bool all_empty, asio::error_code& ec);
+
+#if defined(ASIO_HAS_IOCP)
+
+ASIO_DECL void complete_iocp_recv(state_type state,
+    const weak_cancel_token_type& cancel_token, bool all_empty,
+    asio::error_code& ec, size_t bytes_transferred);
+
+#else // defined(ASIO_HAS_IOCP)
+
+ASIO_DECL bool non_blocking_recv(socket_type s,
+    buf* bufs, size_t count, int flags, bool is_stream,
+    asio::error_code& ec, size_t& bytes_transferred);
+
+#endif // defined(ASIO_HAS_IOCP)
+
+ASIO_DECL signed_size_type recvfrom(socket_type s, buf* bufs,
+    size_t count, int flags, socket_addr_type* addr,
+    std::size_t* addrlen, asio::error_code& ec);
+
+ASIO_DECL size_t sync_recvfrom(socket_type s, state_type state,
+    buf* bufs, size_t count, int flags, socket_addr_type* addr,
+    std::size_t* addrlen, asio::error_code& ec);
+
+#if defined(ASIO_HAS_IOCP)
+
+ASIO_DECL void complete_iocp_recvfrom(
+    const weak_cancel_token_type& cancel_token,
+    asio::error_code& ec);
+
+#else // defined(ASIO_HAS_IOCP)
+
+ASIO_DECL bool non_blocking_recvfrom(socket_type s,
+    buf* bufs, size_t count, int flags,
+    socket_addr_type* addr, std::size_t* addrlen,
+    asio::error_code& ec, size_t& bytes_transferred);
+
+#endif // defined(ASIO_HAS_IOCP)
+
+ASIO_DECL signed_size_type recvmsg(socket_type s, buf* bufs,
+    size_t count, int in_flags, int& out_flags,
+    asio::error_code& ec);
+
+ASIO_DECL size_t sync_recvmsg(socket_type s, state_type state,
+    buf* bufs, size_t count, int in_flags, int& out_flags,
+    asio::error_code& ec);
+
+#if defined(ASIO_HAS_IOCP)
+
+ASIO_DECL void complete_iocp_recvmsg(
+    const weak_cancel_token_type& cancel_token,
+    asio::error_code& ec);
+
+#else // defined(ASIO_HAS_IOCP)
+
+ASIO_DECL bool non_blocking_recvmsg(socket_type s,
+    buf* bufs, size_t count, int in_flags, int& out_flags,
+    asio::error_code& ec, size_t& bytes_transferred);
+
+#endif // defined(ASIO_HAS_IOCP)
+
+ASIO_DECL signed_size_type send(socket_type s, const buf* bufs,
+    size_t count, int flags, asio::error_code& ec);
+
+ASIO_DECL size_t sync_send(socket_type s, state_type state,
+    const buf* bufs, size_t count, int flags,
+    bool all_empty, asio::error_code& ec);
+
+#if defined(ASIO_HAS_IOCP)
+
+ASIO_DECL void complete_iocp_send(
+    const weak_cancel_token_type& cancel_token,
+    asio::error_code& ec);
+
+#else // defined(ASIO_HAS_IOCP)
+
+ASIO_DECL bool non_blocking_send(socket_type s,
+    const buf* bufs, size_t count, int flags,
+    asio::error_code& ec, size_t& bytes_transferred);
+
+#endif // defined(ASIO_HAS_IOCP)
+
+ASIO_DECL signed_size_type sendto(socket_type s, const buf* bufs,
+    size_t count, int flags, const socket_addr_type* addr,
+    std::size_t addrlen, asio::error_code& ec);
+
+ASIO_DECL size_t sync_sendto(socket_type s, state_type state,
+    const buf* bufs, size_t count, int flags, const socket_addr_type* addr,
+    std::size_t addrlen, asio::error_code& ec);
+
+#if !defined(ASIO_HAS_IOCP)
+
+ASIO_DECL bool non_blocking_sendto(socket_type s,
+    const buf* bufs, size_t count, int flags,
+    const socket_addr_type* addr, std::size_t addrlen,
+    asio::error_code& ec, size_t& bytes_transferred);
+
+#endif // !defined(ASIO_HAS_IOCP)
+
+ASIO_DECL socket_type socket(int af, int type, int protocol,
+    asio::error_code& ec);
+
+ASIO_DECL int setsockopt(socket_type s, state_type& state,
+    int level, int optname, const void* optval,
+    std::size_t optlen, asio::error_code& ec);
+
+ASIO_DECL int getsockopt(socket_type s, state_type state,
+    int level, int optname, void* optval,
+    size_t* optlen, asio::error_code& ec);
+
+ASIO_DECL int getpeername(socket_type s, socket_addr_type* addr,
+    std::size_t* addrlen, bool cached, asio::error_code& ec);
+
+ASIO_DECL int getsockname(socket_type s, socket_addr_type* addr,
+    std::size_t* addrlen, asio::error_code& ec);
+
+ASIO_DECL int ioctl(socket_type s, state_type& state,
+    int cmd, ioctl_arg_type* arg, asio::error_code& ec);
+
+ASIO_DECL int select(int nfds, fd_set* readfds, fd_set* writefds,
+    fd_set* exceptfds, timeval* timeout, asio::error_code& ec);
+
+ASIO_DECL int poll_read(socket_type s,
+    state_type state, int msec, asio::error_code& ec);
+
+ASIO_DECL int poll_write(socket_type s,
+    state_type state, int msec, asio::error_code& ec);
+
+ASIO_DECL int poll_error(socket_type s,
+    state_type state, int msec, asio::error_code& ec);
+
+ASIO_DECL int poll_connect(socket_type s,
+    int msec, asio::error_code& ec);
+
+#endif // !defined(ASIO_WINDOWS_RUNTIME)
+
+ASIO_DECL const char* inet_ntop(int af, const void* src, char* dest,
+    size_t length, unsigned long scope_id, asio::error_code& ec);
+
+ASIO_DECL int inet_pton(int af, const char* src, void* dest,
+    unsigned long* scope_id, asio::error_code& ec);
+
+ASIO_DECL int gethostname(char* name,
+    int namelen, asio::error_code& ec);
+
+#if !defined(ASIO_WINDOWS_RUNTIME)
+
+ASIO_DECL asio::error_code getaddrinfo(const char* host,
+    const char* service, const addrinfo_type& hints,
+    addrinfo_type** result, asio::error_code& ec);
+
+ASIO_DECL asio::error_code background_getaddrinfo(
+    const weak_cancel_token_type& cancel_token, const char* host,
+    const char* service, const addrinfo_type& hints,
+    addrinfo_type** result, asio::error_code& ec);
+
+ASIO_DECL void freeaddrinfo(addrinfo_type* ai);
+
+ASIO_DECL asio::error_code getnameinfo(
+    const socket_addr_type* addr, std::size_t addrlen,
+    char* host, std::size_t hostlen, char* serv,
+    std::size_t servlen, int flags, asio::error_code& ec);
+
+ASIO_DECL asio::error_code sync_getnameinfo(
+    const socket_addr_type* addr, std::size_t addrlen,
+    char* host, std::size_t hostlen, char* serv,
+    std::size_t servlen, int sock_type, asio::error_code& ec);
+
+ASIO_DECL asio::error_code background_getnameinfo(
+    const weak_cancel_token_type& cancel_token,
+    const socket_addr_type* addr, std::size_t addrlen,
+    char* host, std::size_t hostlen, char* serv,
+    std::size_t servlen, int sock_type, asio::error_code& ec);
+
+#endif // !defined(ASIO_WINDOWS_RUNTIME)
+
+ASIO_DECL u_long_type network_to_host_long(u_long_type value);
+
+ASIO_DECL u_long_type host_to_network_long(u_long_type value);
+
+ASIO_DECL u_short_type network_to_host_short(u_short_type value);
+
+ASIO_DECL u_short_type host_to_network_short(u_short_type value);
+
+} // namespace socket_ops
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/socket_ops.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_SOCKET_OPS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_option.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_option.hpp
new file mode 100644
index 00000000000..682c9aad460
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_option.hpp
@@ -0,0 +1,316 @@
+//
+// detail/socket_option.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SOCKET_OPTION_HPP
+#define ASIO_DETAIL_SOCKET_OPTION_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include <stdexcept>
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/throw_exception.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+namespace socket_option {
+
+// Helper template for implementing boolean-based options.
+template <int Level, int Name>
+class boolean
+{
+public:
+  // Default constructor.
+  boolean()
+    : value_(0)
+  {
+  }
+
+  // Construct with a specific option value.
+  explicit boolean(bool v)
+    : value_(v ? 1 : 0)
+  {
+  }
+
+  // Set the current value of the boolean.
+  boolean& operator=(bool v)
+  {
+    value_ = v ? 1 : 0;
+    return *this;
+  }
+
+  // Get the current value of the boolean.
+  bool value() const
+  {
+    return !!value_;
+  }
+
+  // Convert to bool.
+  operator bool() const
+  {
+    return !!value_;
+  }
+
+  // Test for false.
+  bool operator!() const
+  {
+    return !value_;
+  }
+
+  // Get the level of the socket option.
+  template <typename Protocol>
+  int level(const Protocol&) const
+  {
+    return Level;
+  }
+
+  // Get the name of the socket option.
+  template <typename Protocol>
+  int name(const Protocol&) const
+  {
+    return Name;
+  }
+
+  // Get the address of the boolean data.
+  template <typename Protocol>
+  int* data(const Protocol&)
+  {
+    return &value_;
+  }
+
+  // Get the address of the boolean data.
+  template <typename Protocol>
+  const int* data(const Protocol&) const
+  {
+    return &value_;
+  }
+
+  // Get the size of the boolean data.
+  template <typename Protocol>
+  std::size_t size(const Protocol&) const
+  {
+    return sizeof(value_);
+  }
+
+  // Set the size of the boolean data.
+  template <typename Protocol>
+  void resize(const Protocol&, std::size_t s)
+  {
+    // On some platforms (e.g. Windows Vista), the getsockopt function will
+    // return the size of a boolean socket option as one byte, even though a
+    // four byte integer was passed in.
+    switch (s)
+    {
+    case sizeof(char):
+      value_ = *reinterpret_cast<char*>(&value_) ? 1 : 0;
+      break;
+    case sizeof(value_):
+      break;
+    default:
+      {
+        std::length_error ex("boolean socket option resize");
+        asio::detail::throw_exception(ex);
+      }
+    }
+  }
+
+private:
+  int value_;
+};
+
+// Helper template for implementing integer options.
+template <int Level, int Name>
+class integer
+{
+public:
+  // Default constructor.
+  integer()
+    : value_(0)
+  {
+  }
+
+  // Construct with a specific option value.
+  explicit integer(int v)
+    : value_(v)
+  {
+  }
+
+  // Set the value of the int option.
+  integer& operator=(int v)
+  {
+    value_ = v;
+    return *this;
+  }
+
+  // Get the current value of the int option.
+  int value() const
+  {
+    return value_;
+  }
+
+  // Get the level of the socket option.
+  template <typename Protocol>
+  int level(const Protocol&) const
+  {
+    return Level;
+  }
+
+  // Get the name of the socket option.
+  template <typename Protocol>
+  int name(const Protocol&) const
+  {
+    return Name;
+  }
+
+  // Get the address of the int data.
+  template <typename Protocol>
+  int* data(const Protocol&)
+  {
+    return &value_;
+  }
+
+  // Get the address of the int data.
+  template <typename Protocol>
+  const int* data(const Protocol&) const
+  {
+    return &value_;
+  }
+
+  // Get the size of the int data.
+  template <typename Protocol>
+  std::size_t size(const Protocol&) const
+  {
+    return sizeof(value_);
+  }
+
+  // Set the size of the int data.
+  template <typename Protocol>
+  void resize(const Protocol&, std::size_t s)
+  {
+    if (s != sizeof(value_))
+    {
+      std::length_error ex("integer socket option resize");
+      asio::detail::throw_exception(ex);
+    }
+  }
+
+private:
+  int value_;
+};
+
+// Helper template for implementing linger options.
+template <int Level, int Name>
+class linger
+{
+public:
+  // Default constructor.
+  linger()
+  {
+    value_.l_onoff = 0;
+    value_.l_linger = 0;
+  }
+
+  // Construct with specific option values.
+  linger(bool e, int t)
+  {
+    enabled(e);
+    timeout ASIO_PREVENT_MACRO_SUBSTITUTION(t);
+  }
+
+  // Set the value for whether linger is enabled.
+  void enabled(bool value)
+  {
+    value_.l_onoff = value ? 1 : 0;
+  }
+
+  // Get the value for whether linger is enabled.
+  bool enabled() const
+  {
+    return value_.l_onoff != 0;
+  }
+
+  // Set the value for the linger timeout.
+  void timeout ASIO_PREVENT_MACRO_SUBSTITUTION(int value)
+  {
+#if defined(WIN32)
+    value_.l_linger = static_cast<u_short>(value);
+#else
+    value_.l_linger = value;
+#endif
+  }
+
+  // Get the value for the linger timeout.
+  int timeout ASIO_PREVENT_MACRO_SUBSTITUTION() const
+  {
+    return static_cast<int>(value_.l_linger);
+  }
+
+  // Get the level of the socket option.
+  template <typename Protocol>
+  int level(const Protocol&) const
+  {
+    return Level;
+  }
+
+  // Get the name of the socket option.
+  template <typename Protocol>
+  int name(const Protocol&) const
+  {
+    return Name;
+  }
+
+  // Get the address of the linger data.
+  template <typename Protocol>
+  detail::linger_type* data(const Protocol&)
+  {
+    return &value_;
+  }
+
+  // Get the address of the linger data.
+  template <typename Protocol>
+  const detail::linger_type* data(const Protocol&) const
+  {
+    return &value_;
+  }
+
+  // Get the size of the linger data.
+  template <typename Protocol>
+  std::size_t size(const Protocol&) const
+  {
+    return sizeof(value_);
+  }
+
+  // Set the size of the int data.
+  template <typename Protocol>
+  void resize(const Protocol&, std::size_t s)
+  {
+    if (s != sizeof(value_))
+    {
+      std::length_error ex("linger socket option resize");
+      asio::detail::throw_exception(ex);
+    }
+  }
+
+private:
+  detail::linger_type value_;
+};
+
+} // namespace socket_option
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_SOCKET_OPTION_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_select_interrupter.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_select_interrupter.hpp
new file mode 100644
index 00000000000..92ad167df55
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_select_interrupter.hpp
@@ -0,0 +1,93 @@
+//
+// detail/socket_select_interrupter.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SOCKET_SELECT_INTERRUPTER_HPP
+#define ASIO_DETAIL_SOCKET_SELECT_INTERRUPTER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_WINDOWS_RUNTIME)
+
+#if defined(ASIO_WINDOWS) \
+  || defined(__CYGWIN__) \
+  || defined(__SYMBIAN32__) \
+  || defined(ESP_PLATFORM)
+
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class socket_select_interrupter
+{
+public:
+  // Constructor.
+  ASIO_DECL socket_select_interrupter();
+
+  // Destructor.
+  ASIO_DECL ~socket_select_interrupter();
+
+  // Recreate the interrupter's descriptors. Used after a fork.
+  ASIO_DECL void recreate();
+
+  // Interrupt the select call.
+  ASIO_DECL void interrupt();
+
+  // Reset the select interrupt. Returns true if the call was interrupted.
+  ASIO_DECL bool reset();
+
+  // Get the read descriptor to be passed to select.
+  socket_type read_descriptor() const
+  {
+    return read_descriptor_;
+  }
+
+private:
+  // Open the descriptors. Throws on error.
+  ASIO_DECL void open_descriptors();
+
+  // Close the descriptors.
+  ASIO_DECL void close_descriptors();
+
+  // The read end of a connection used to interrupt the select call. This file
+  // descriptor is passed to select such that when it is time to stop, a single
+  // byte will be written on the other end of the connection and this
+  // descriptor will become readable.
+  socket_type read_descriptor_;
+
+  // The write end of a connection used to interrupt the select call. A single
+  // byte may be written to this to wake up the select which is waiting for the
+  // other end to become readable.
+  socket_type write_descriptor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/socket_select_interrupter.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_WINDOWS)
+       // || defined(__CYGWIN__)
+       // || defined(__SYMBIAN32__)
+       // || defined(ESP_PLATFORM)
+
+#endif // !defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_SOCKET_SELECT_INTERRUPTER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_types.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_types.hpp
new file mode 100644
index 00000000000..1e387070c9b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/socket_types.hpp
@@ -0,0 +1,419 @@
+//
+// detail/socket_types.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SOCKET_TYPES_HPP
+#define ASIO_DETAIL_SOCKET_TYPES_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+// Empty.
+#elif defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+# if defined(_WINSOCKAPI_) && !defined(_WINSOCK2API_)
+#  error WinSock.h has already been included
+# endif // defined(_WINSOCKAPI_) && !defined(_WINSOCK2API_)
+# if defined(__BORLANDC__)
+#  include <stdlib.h> // Needed for __errno
+#  if !defined(_WSPIAPI_H_)
+#   define _WSPIAPI_H_
+#   define ASIO_WSPIAPI_H_DEFINED
+#  endif // !defined(_WSPIAPI_H_)
+# endif // defined(__BORLANDC__)
+# include <winsock2.h>
+# include <ws2tcpip.h>
+# if defined(WINAPI_FAMILY)
+#  if ((WINAPI_FAMILY & WINAPI_PARTITION_DESKTOP) != 0)
+#   include <windows.h>
+#  endif // ((WINAPI_FAMILY & WINAPI_PARTITION_DESKTOP) != 0)
+# endif // defined(WINAPI_FAMILY)
+# if !defined(ASIO_WINDOWS_APP)
+#  include <mswsock.h>
+# endif // !defined(ASIO_WINDOWS_APP)
+# if defined(ASIO_WSPIAPI_H_DEFINED)
+#  undef _WSPIAPI_H_
+#  undef ASIO_WSPIAPI_H_DEFINED
+# endif // defined(ASIO_WSPIAPI_H_DEFINED)
+# if !defined(ASIO_NO_DEFAULT_LINKED_LIBS)
+#  if defined(UNDER_CE)
+#   pragma comment(lib, "ws2.lib")
+#  elif defined(_MSC_VER) || defined(__BORLANDC__)
+#   pragma comment(lib, "ws2_32.lib")
+#   if !defined(ASIO_WINDOWS_APP)
+#    pragma comment(lib, "mswsock.lib")
+#   endif // !defined(ASIO_WINDOWS_APP)
+#  endif // defined(_MSC_VER) || defined(__BORLANDC__)
+# endif // !defined(ASIO_NO_DEFAULT_LINKED_LIBS)
+# include "asio/detail/old_win_sdk_compat.hpp"
+#else
+# include <sys/ioctl.h>
+# if (defined(__MACH__) && defined(__APPLE__)) \
+   || defined(__FreeBSD__) || defined(__NetBSD__) \
+   || defined(__OpenBSD__) || defined(__linux__) \
+   || defined(__EMSCRIPTEN__)
+#  include <poll.h>
+# elif !defined(__SYMBIAN32__)
+#  include <sys/poll.h>
+# endif
+# include <sys/types.h>
+# include <sys/stat.h>
+# include <fcntl.h>
+# if defined(__hpux)
+#  include <sys/time.h>
+# endif
+# if !defined(__hpux) || defined(__SELECT)
+#  include <sys/select.h>
+# endif
+# include <sys/socket.h>
+# include <sys/uio.h>
+# include <sys/un.h>
+# include <netinet/in.h>
+# if !defined(__SYMBIAN32__) && !defined(ESP_PLATFORM)
+#  include <netinet/tcp.h>
+# endif
+# include <arpa/inet.h>
+# include <netdb.h>
+# include <net/if.h>
+# if defined(ESP_PLATFORM)
+#  include "esp_exception.h"
+# endif
+# include <limits.h>
+# if defined(__sun)
+#  include <sys/filio.h>
+#  include <sys/sockio.h>
+# endif
+#endif
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+const int max_addr_v4_str_len = 256;
+const int max_addr_v6_str_len = 256;
+typedef unsigned __int32 u_long_type;
+typedef unsigned __int16 u_short_type;
+struct in4_addr_type { u_long_type s_addr; };
+struct in4_mreq_type { in4_addr_type imr_multiaddr, imr_interface; };
+struct in6_addr_type { unsigned char s6_addr[16]; };
+struct in6_mreq_type { in6_addr_type ipv6mr_multiaddr;
+  unsigned long ipv6mr_interface; };
+struct socket_addr_type { int sa_family; };
+struct sockaddr_in4_type { int sin_family;
+  in4_addr_type sin_addr; u_short_type sin_port; };
+struct sockaddr_in6_type { int sin6_family;
+  in6_addr_type sin6_addr; u_short_type sin6_port;
+  u_long_type sin6_flowinfo; u_long_type sin6_scope_id; };
+struct sockaddr_storage_type { int ss_family;
+  unsigned char ss_bytes[128 - sizeof(int)]; };
+struct addrinfo_type { int ai_flags;
+  int ai_family, ai_socktype, ai_protocol;
+  int ai_addrlen; const void* ai_addr;
+  const char* ai_canonname; addrinfo_type* ai_next; };
+struct linger_type { u_short_type l_onoff, l_linger; };
+typedef u_long_type ioctl_arg_type;
+typedef int signed_size_type;
+# define ASIO_OS_DEF(c) ASIO_OS_DEF_##c
+# define ASIO_OS_DEF_AF_UNSPEC 0
+# define ASIO_OS_DEF_AF_INET 2
+# define ASIO_OS_DEF_AF_INET6 23
+# define ASIO_OS_DEF_SOCK_STREAM 1
+# define ASIO_OS_DEF_SOCK_DGRAM 2
+# define ASIO_OS_DEF_SOCK_RAW 3
+# define ASIO_OS_DEF_SOCK_SEQPACKET 5
+# define ASIO_OS_DEF_IPPROTO_IP 0
+# define ASIO_OS_DEF_IPPROTO_IPV6 41
+# define ASIO_OS_DEF_IPPROTO_TCP 6
+# define ASIO_OS_DEF_IPPROTO_UDP 17
+# define ASIO_OS_DEF_IPPROTO_ICMP 1
+# define ASIO_OS_DEF_IPPROTO_ICMPV6 58
+# define ASIO_OS_DEF_FIONBIO 1
+# define ASIO_OS_DEF_FIONREAD 2
+# define ASIO_OS_DEF_INADDR_ANY 0
+# define ASIO_OS_DEF_MSG_OOB 0x1
+# define ASIO_OS_DEF_MSG_PEEK 0x2
+# define ASIO_OS_DEF_MSG_DONTROUTE 0x4
+# define ASIO_OS_DEF_MSG_EOR 0 // Not supported.
+# define ASIO_OS_DEF_SHUT_RD 0x0
+# define ASIO_OS_DEF_SHUT_WR 0x1
+# define ASIO_OS_DEF_SHUT_RDWR 0x2
+# define ASIO_OS_DEF_SOMAXCONN 0x7fffffff
+# define ASIO_OS_DEF_SOL_SOCKET 0xffff
+# define ASIO_OS_DEF_SO_BROADCAST 0x20
+# define ASIO_OS_DEF_SO_DEBUG 0x1
+# define ASIO_OS_DEF_SO_DONTROUTE 0x10
+# define ASIO_OS_DEF_SO_KEEPALIVE 0x8
+# define ASIO_OS_DEF_SO_LINGER 0x80
+# define ASIO_OS_DEF_SO_OOBINLINE 0x100
+# define ASIO_OS_DEF_SO_SNDBUF 0x1001
+# define ASIO_OS_DEF_SO_RCVBUF 0x1002
+# define ASIO_OS_DEF_SO_SNDLOWAT 0x1003
+# define ASIO_OS_DEF_SO_RCVLOWAT 0x1004
+# define ASIO_OS_DEF_SO_REUSEADDR 0x4
+# define ASIO_OS_DEF_TCP_NODELAY 0x1
+# define ASIO_OS_DEF_IP_MULTICAST_IF 2
+# define ASIO_OS_DEF_IP_MULTICAST_TTL 3
+# define ASIO_OS_DEF_IP_MULTICAST_LOOP 4
+# define ASIO_OS_DEF_IP_ADD_MEMBERSHIP 5
+# define ASIO_OS_DEF_IP_DROP_MEMBERSHIP 6
+# define ASIO_OS_DEF_IP_TTL 7
+# define ASIO_OS_DEF_IPV6_UNICAST_HOPS 4
+# define ASIO_OS_DEF_IPV6_MULTICAST_IF 9
+# define ASIO_OS_DEF_IPV6_MULTICAST_HOPS 10
+# define ASIO_OS_DEF_IPV6_MULTICAST_LOOP 11
+# define ASIO_OS_DEF_IPV6_JOIN_GROUP 12
+# define ASIO_OS_DEF_IPV6_LEAVE_GROUP 13
+# define ASIO_OS_DEF_AI_CANONNAME 0x2
+# define ASIO_OS_DEF_AI_PASSIVE 0x1
+# define ASIO_OS_DEF_AI_NUMERICHOST 0x4
+# define ASIO_OS_DEF_AI_NUMERICSERV 0x8
+# define ASIO_OS_DEF_AI_V4MAPPED 0x800
+# define ASIO_OS_DEF_AI_ALL 0x100
+# define ASIO_OS_DEF_AI_ADDRCONFIG 0x400
+#elif defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+typedef SOCKET socket_type;
+const SOCKET invalid_socket = INVALID_SOCKET;
+const int socket_error_retval = SOCKET_ERROR;
+const int max_addr_v4_str_len = 256;
+const int max_addr_v6_str_len = 256;
+typedef sockaddr socket_addr_type;
+typedef in_addr in4_addr_type;
+typedef ip_mreq in4_mreq_type;
+typedef sockaddr_in sockaddr_in4_type;
+# if defined(ASIO_HAS_OLD_WIN_SDK)
+typedef in6_addr_emulation in6_addr_type;
+typedef ipv6_mreq_emulation in6_mreq_type;
+typedef sockaddr_in6_emulation sockaddr_in6_type;
+typedef sockaddr_storage_emulation sockaddr_storage_type;
+typedef addrinfo_emulation addrinfo_type;
+# else
+typedef in6_addr in6_addr_type;
+typedef ipv6_mreq in6_mreq_type;
+typedef sockaddr_in6 sockaddr_in6_type;
+typedef sockaddr_storage sockaddr_storage_type;
+typedef addrinfo addrinfo_type;
+# endif
+typedef ::linger linger_type;
+typedef unsigned long ioctl_arg_type;
+typedef u_long u_long_type;
+typedef u_short u_short_type;
+typedef int signed_size_type;
+# define ASIO_OS_DEF(c) ASIO_OS_DEF_##c
+# define ASIO_OS_DEF_AF_UNSPEC AF_UNSPEC
+# define ASIO_OS_DEF_AF_INET AF_INET
+# define ASIO_OS_DEF_AF_INET6 AF_INET6
+# define ASIO_OS_DEF_SOCK_STREAM SOCK_STREAM
+# define ASIO_OS_DEF_SOCK_DGRAM SOCK_DGRAM
+# define ASIO_OS_DEF_SOCK_RAW SOCK_RAW
+# define ASIO_OS_DEF_SOCK_SEQPACKET SOCK_SEQPACKET
+# define ASIO_OS_DEF_IPPROTO_IP IPPROTO_IP
+# define ASIO_OS_DEF_IPPROTO_IPV6 IPPROTO_IPV6
+# define ASIO_OS_DEF_IPPROTO_TCP IPPROTO_TCP
+# define ASIO_OS_DEF_IPPROTO_UDP IPPROTO_UDP
+# define ASIO_OS_DEF_IPPROTO_ICMP IPPROTO_ICMP
+# define ASIO_OS_DEF_IPPROTO_ICMPV6 IPPROTO_ICMPV6
+# define ASIO_OS_DEF_FIONBIO FIONBIO
+# define ASIO_OS_DEF_FIONREAD FIONREAD
+# define ASIO_OS_DEF_INADDR_ANY INADDR_ANY
+# define ASIO_OS_DEF_MSG_OOB MSG_OOB
+# define ASIO_OS_DEF_MSG_PEEK MSG_PEEK
+# define ASIO_OS_DEF_MSG_DONTROUTE MSG_DONTROUTE
+# define ASIO_OS_DEF_MSG_EOR 0 // Not supported on Windows.
+# define ASIO_OS_DEF_SHUT_RD SD_RECEIVE
+# define ASIO_OS_DEF_SHUT_WR SD_SEND
+# define ASIO_OS_DEF_SHUT_RDWR SD_BOTH
+# define ASIO_OS_DEF_SOMAXCONN SOMAXCONN
+# define ASIO_OS_DEF_SOL_SOCKET SOL_SOCKET
+# define ASIO_OS_DEF_SO_BROADCAST SO_BROADCAST
+# define ASIO_OS_DEF_SO_DEBUG SO_DEBUG
+# define ASIO_OS_DEF_SO_DONTROUTE SO_DONTROUTE
+# define ASIO_OS_DEF_SO_KEEPALIVE SO_KEEPALIVE
+# define ASIO_OS_DEF_SO_LINGER SO_LINGER
+# define ASIO_OS_DEF_SO_OOBINLINE SO_OOBINLINE
+# define ASIO_OS_DEF_SO_SNDBUF SO_SNDBUF
+# define ASIO_OS_DEF_SO_RCVBUF SO_RCVBUF
+# define ASIO_OS_DEF_SO_SNDLOWAT SO_SNDLOWAT
+# define ASIO_OS_DEF_SO_RCVLOWAT SO_RCVLOWAT
+# define ASIO_OS_DEF_SO_REUSEADDR SO_REUSEADDR
+# define ASIO_OS_DEF_TCP_NODELAY TCP_NODELAY
+# define ASIO_OS_DEF_IP_MULTICAST_IF IP_MULTICAST_IF
+# define ASIO_OS_DEF_IP_MULTICAST_TTL IP_MULTICAST_TTL
+# define ASIO_OS_DEF_IP_MULTICAST_LOOP IP_MULTICAST_LOOP
+# define ASIO_OS_DEF_IP_ADD_MEMBERSHIP IP_ADD_MEMBERSHIP
+# define ASIO_OS_DEF_IP_DROP_MEMBERSHIP IP_DROP_MEMBERSHIP
+# define ASIO_OS_DEF_IP_TTL IP_TTL
+# define ASIO_OS_DEF_IPV6_UNICAST_HOPS IPV6_UNICAST_HOPS
+# define ASIO_OS_DEF_IPV6_MULTICAST_IF IPV6_MULTICAST_IF
+# define ASIO_OS_DEF_IPV6_MULTICAST_HOPS IPV6_MULTICAST_HOPS
+# define ASIO_OS_DEF_IPV6_MULTICAST_LOOP IPV6_MULTICAST_LOOP
+# define ASIO_OS_DEF_IPV6_JOIN_GROUP IPV6_JOIN_GROUP
+# define ASIO_OS_DEF_IPV6_LEAVE_GROUP IPV6_LEAVE_GROUP
+# define ASIO_OS_DEF_AI_CANONNAME AI_CANONNAME
+# define ASIO_OS_DEF_AI_PASSIVE AI_PASSIVE
+# define ASIO_OS_DEF_AI_NUMERICHOST AI_NUMERICHOST
+# if defined(AI_NUMERICSERV)
+#  define ASIO_OS_DEF_AI_NUMERICSERV AI_NUMERICSERV
+# else
+#  define ASIO_OS_DEF_AI_NUMERICSERV 0
+# endif
+# if defined(AI_V4MAPPED)
+#  define ASIO_OS_DEF_AI_V4MAPPED AI_V4MAPPED
+# else
+#  define ASIO_OS_DEF_AI_V4MAPPED 0
+# endif
+# if defined(AI_ALL)
+#  define ASIO_OS_DEF_AI_ALL AI_ALL
+# else
+#  define ASIO_OS_DEF_AI_ALL 0
+# endif
+# if defined(AI_ADDRCONFIG)
+#  define ASIO_OS_DEF_AI_ADDRCONFIG AI_ADDRCONFIG
+# else
+#  define ASIO_OS_DEF_AI_ADDRCONFIG 0
+# endif
+# if defined (_WIN32_WINNT)
+const int max_iov_len = 64;
+# else
+const int max_iov_len = 16;
+# endif
+#else
+typedef int socket_type;
+const int invalid_socket = -1;
+const int socket_error_retval = -1;
+const int max_addr_v4_str_len = INET_ADDRSTRLEN;
+#if defined(INET6_ADDRSTRLEN)
+const int max_addr_v6_str_len = INET6_ADDRSTRLEN + 1 + IF_NAMESIZE;
+#else // defined(INET6_ADDRSTRLEN)
+const int max_addr_v6_str_len = 256;
+#endif // defined(INET6_ADDRSTRLEN)
+typedef sockaddr socket_addr_type;
+typedef in_addr in4_addr_type;
+# if defined(__hpux)
+// HP-UX doesn't provide ip_mreq when _XOPEN_SOURCE_EXTENDED is defined.
+struct in4_mreq_type
+{
+  struct in_addr imr_multiaddr;
+  struct in_addr imr_interface;
+};
+# else
+typedef ip_mreq in4_mreq_type;
+# endif
+typedef sockaddr_in sockaddr_in4_type;
+typedef in6_addr in6_addr_type;
+typedef ipv6_mreq in6_mreq_type;
+typedef sockaddr_in6 sockaddr_in6_type;
+typedef sockaddr_storage sockaddr_storage_type;
+typedef sockaddr_un sockaddr_un_type;
+typedef addrinfo addrinfo_type;
+typedef ::linger linger_type;
+typedef int ioctl_arg_type;
+typedef uint32_t u_long_type;
+typedef uint16_t u_short_type;
+#if defined(ASIO_HAS_SSIZE_T)
+typedef ssize_t signed_size_type;
+#else // defined(ASIO_HAS_SSIZE_T)
+typedef int signed_size_type;
+#endif // defined(ASIO_HAS_SSIZE_T)
+# define ASIO_OS_DEF(c) ASIO_OS_DEF_##c
+# define ASIO_OS_DEF_AF_UNSPEC AF_UNSPEC
+# define ASIO_OS_DEF_AF_INET AF_INET
+# define ASIO_OS_DEF_AF_INET6 AF_INET6
+# define ASIO_OS_DEF_SOCK_STREAM SOCK_STREAM
+# define ASIO_OS_DEF_SOCK_DGRAM SOCK_DGRAM
+# define ASIO_OS_DEF_SOCK_RAW SOCK_RAW
+# define ASIO_OS_DEF_SOCK_SEQPACKET SOCK_SEQPACKET
+# define ASIO_OS_DEF_IPPROTO_IP IPPROTO_IP
+# define ASIO_OS_DEF_IPPROTO_IPV6 IPPROTO_IPV6
+# define ASIO_OS_DEF_IPPROTO_TCP IPPROTO_TCP
+# define ASIO_OS_DEF_IPPROTO_UDP IPPROTO_UDP
+# define ASIO_OS_DEF_IPPROTO_ICMP IPPROTO_ICMP
+# define ASIO_OS_DEF_IPPROTO_ICMPV6 IPPROTO_ICMPV6
+# define ASIO_OS_DEF_FIONBIO FIONBIO
+# define ASIO_OS_DEF_FIONREAD FIONREAD
+# define ASIO_OS_DEF_INADDR_ANY INADDR_ANY
+# define ASIO_OS_DEF_MSG_OOB MSG_OOB
+# define ASIO_OS_DEF_MSG_PEEK MSG_PEEK
+# define ASIO_OS_DEF_MSG_DONTROUTE MSG_DONTROUTE
+# define ASIO_OS_DEF_MSG_EOR MSG_EOR
+# define ASIO_OS_DEF_SHUT_RD SHUT_RD
+# define ASIO_OS_DEF_SHUT_WR SHUT_WR
+# define ASIO_OS_DEF_SHUT_RDWR SHUT_RDWR
+# define ASIO_OS_DEF_SOMAXCONN SOMAXCONN
+# define ASIO_OS_DEF_SOL_SOCKET SOL_SOCKET
+# define ASIO_OS_DEF_SO_BROADCAST SO_BROADCAST
+# define ASIO_OS_DEF_SO_DEBUG SO_DEBUG
+# define ASIO_OS_DEF_SO_DONTROUTE SO_DONTROUTE
+# define ASIO_OS_DEF_SO_KEEPALIVE SO_KEEPALIVE
+# define ASIO_OS_DEF_SO_LINGER SO_LINGER
+# define ASIO_OS_DEF_SO_OOBINLINE SO_OOBINLINE
+# define ASIO_OS_DEF_SO_SNDBUF SO_SNDBUF
+# define ASIO_OS_DEF_SO_RCVBUF SO_RCVBUF
+# define ASIO_OS_DEF_SO_SNDLOWAT SO_SNDLOWAT
+# define ASIO_OS_DEF_SO_RCVLOWAT SO_RCVLOWAT
+# define ASIO_OS_DEF_SO_REUSEADDR SO_REUSEADDR
+# define ASIO_OS_DEF_TCP_NODELAY TCP_NODELAY
+# define ASIO_OS_DEF_IP_MULTICAST_IF IP_MULTICAST_IF
+# define ASIO_OS_DEF_IP_MULTICAST_TTL IP_MULTICAST_TTL
+# define ASIO_OS_DEF_IP_MULTICAST_LOOP IP_MULTICAST_LOOP
+# define ASIO_OS_DEF_IP_ADD_MEMBERSHIP IP_ADD_MEMBERSHIP
+# define ASIO_OS_DEF_IP_DROP_MEMBERSHIP IP_DROP_MEMBERSHIP
+# define ASIO_OS_DEF_IP_TTL IP_TTL
+# define ASIO_OS_DEF_IPV6_UNICAST_HOPS IPV6_UNICAST_HOPS
+# define ASIO_OS_DEF_IPV6_MULTICAST_IF IPV6_MULTICAST_IF
+# define ASIO_OS_DEF_IPV6_MULTICAST_HOPS IPV6_MULTICAST_HOPS
+# define ASIO_OS_DEF_IPV6_MULTICAST_LOOP IPV6_MULTICAST_LOOP
+# define ASIO_OS_DEF_IPV6_JOIN_GROUP IPV6_JOIN_GROUP
+# define ASIO_OS_DEF_IPV6_LEAVE_GROUP IPV6_LEAVE_GROUP
+# define ASIO_OS_DEF_AI_CANONNAME AI_CANONNAME
+# define ASIO_OS_DEF_AI_PASSIVE AI_PASSIVE
+# define ASIO_OS_DEF_AI_NUMERICHOST AI_NUMERICHOST
+# if defined(AI_NUMERICSERV)
+#  define ASIO_OS_DEF_AI_NUMERICSERV AI_NUMERICSERV
+# else
+#  define ASIO_OS_DEF_AI_NUMERICSERV 0
+# endif
+// Note: QNX Neutrino 6.3 defines AI_V4MAPPED, AI_ALL and AI_ADDRCONFIG but
+// does not implement them. Therefore they are specifically excluded here.
+# if defined(AI_V4MAPPED) && !defined(__QNXNTO__)
+#  define ASIO_OS_DEF_AI_V4MAPPED AI_V4MAPPED
+# else
+#  define ASIO_OS_DEF_AI_V4MAPPED 0
+# endif
+# if defined(AI_ALL) && !defined(__QNXNTO__)
+#  define ASIO_OS_DEF_AI_ALL AI_ALL
+# else
+#  define ASIO_OS_DEF_AI_ALL 0
+# endif
+# if defined(AI_ADDRCONFIG) && !defined(__QNXNTO__)
+#  define ASIO_OS_DEF_AI_ADDRCONFIG AI_ADDRCONFIG
+# else
+#  define ASIO_OS_DEF_AI_ADDRCONFIG 0
+# endif
+# if defined(IOV_MAX)
+const int max_iov_len = IOV_MAX;
+# else
+// POSIX platforms are not required to define IOV_MAX.
+const int max_iov_len = 16;
+# endif
+#endif
+const int custom_socket_option_level = 0xA5100000;
+const int enable_connection_aborted_option = 1;
+const int always_fail_option = 2;
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_SOCKET_TYPES_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/solaris_fenced_block.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/solaris_fenced_block.hpp
new file mode 100644
index 00000000000..f7b9f94fbae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/solaris_fenced_block.hpp
@@ -0,0 +1,62 @@
+//
+// detail/solaris_fenced_block.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_SOLARIS_FENCED_BLOCK_HPP
+#define ASIO_DETAIL_SOLARIS_FENCED_BLOCK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(__sun)
+
+#include <atomic.h>
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class solaris_fenced_block
+  : private noncopyable
+{
+public:
+  enum half_t { half };
+  enum full_t { full };
+
+  // Constructor for a half fenced block.
+  explicit solaris_fenced_block(half_t)
+  {
+  }
+
+  // Constructor for a full fenced block.
+  explicit solaris_fenced_block(full_t)
+  {
+    membar_consumer();
+  }
+
+  // Destructor.
+  ~solaris_fenced_block()
+  {
+    membar_producer();
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(__sun)
+
+#endif // ASIO_DETAIL_SOLARIS_FENCED_BLOCK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/static_mutex.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/static_mutex.hpp
new file mode 100644
index 00000000000..6e598e6b6e3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/static_mutex.hpp
@@ -0,0 +1,52 @@
+//
+// detail/static_mutex.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_STATIC_MUTEX_HPP
+#define ASIO_DETAIL_STATIC_MUTEX_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS)
+# include "asio/detail/null_static_mutex.hpp"
+#elif defined(ASIO_WINDOWS)
+# include "asio/detail/win_static_mutex.hpp"
+#elif defined(ASIO_HAS_PTHREADS)
+# include "asio/detail/posix_static_mutex.hpp"
+#elif defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+# include "asio/detail/std_static_mutex.hpp"
+#else
+# error Only Windows and POSIX are supported!
+#endif
+
+namespace asio {
+namespace detail {
+
+#if !defined(ASIO_HAS_THREADS)
+typedef null_static_mutex static_mutex;
+# define ASIO_STATIC_MUTEX_INIT ASIO_NULL_STATIC_MUTEX_INIT
+#elif defined(ASIO_WINDOWS)
+typedef win_static_mutex static_mutex;
+# define ASIO_STATIC_MUTEX_INIT ASIO_WIN_STATIC_MUTEX_INIT
+#elif defined(ASIO_HAS_PTHREADS)
+typedef posix_static_mutex static_mutex;
+# define ASIO_STATIC_MUTEX_INIT ASIO_POSIX_STATIC_MUTEX_INIT
+#elif defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+typedef std_static_mutex static_mutex;
+# define ASIO_STATIC_MUTEX_INIT ASIO_STD_STATIC_MUTEX_INIT
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_STATIC_MUTEX_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_event.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_event.hpp
new file mode 100644
index 00000000000..4252a9e7c5e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_event.hpp
@@ -0,0 +1,176 @@
+//
+// detail/std_event.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_STD_EVENT_HPP
+#define ASIO_DETAIL_STD_EVENT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+
+#include <chrono>
+#include <condition_variable>
+#include "asio/detail/assert.hpp"
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class std_event
+  : private noncopyable
+{
+public:
+  // Constructor.
+  std_event()
+    : state_(0)
+  {
+  }
+
+  // Destructor.
+  ~std_event()
+  {
+  }
+
+  // Signal the event. (Retained for backward compatibility.)
+  template <typename Lock>
+  void signal(Lock& lock)
+  {
+    this->signal_all(lock);
+  }
+
+  // Signal all waiters.
+  template <typename Lock>
+  void signal_all(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    (void)lock;
+    state_ |= 1;
+    cond_.notify_all();
+  }
+
+  // Unlock the mutex and signal one waiter.
+  template <typename Lock>
+  void unlock_and_signal_one(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    state_ |= 1;
+    bool have_waiters = (state_ > 1);
+    lock.unlock();
+    if (have_waiters)
+      cond_.notify_one();
+  }
+
+  // If there's a waiter, unlock the mutex and signal it.
+  template <typename Lock>
+  bool maybe_unlock_and_signal_one(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    state_ |= 1;
+    if (state_ > 1)
+    {
+      lock.unlock();
+      cond_.notify_one();
+      return true;
+    }
+    return false;
+  }
+
+  // Reset the event.
+  template <typename Lock>
+  void clear(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    (void)lock;
+    state_ &= ~std::size_t(1);
+  }
+
+  // Wait for the event to become signalled.
+  template <typename Lock>
+  void wait(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    unique_lock_adapter u_lock(lock);
+    while ((state_ & 1) == 0)
+    {
+      waiter w(state_);
+      cond_.wait(u_lock.unique_lock_);
+    }
+  }
+
+  // Timed wait for the event to become signalled.
+  template <typename Lock>
+  bool wait_for_usec(Lock& lock, long usec)
+  {
+    ASIO_ASSERT(lock.locked());
+    unique_lock_adapter u_lock(lock);
+    if ((state_ & 1) == 0)
+    {
+      waiter w(state_);
+      cond_.wait_for(u_lock.unique_lock_, std::chrono::microseconds(usec));
+    }
+    return (state_ & 1) != 0;
+  }
+
+private:
+  // Helper class to temporarily adapt a scoped_lock into a unique_lock so that
+  // it can be passed to std::condition_variable::wait().
+  struct unique_lock_adapter
+  {
+    template <typename Lock>
+    explicit unique_lock_adapter(Lock& lock)
+      : unique_lock_(lock.mutex().mutex_, std::adopt_lock)
+    {
+    }
+
+    ~unique_lock_adapter()
+    {
+      unique_lock_.release();
+    }
+
+    std::unique_lock<std::mutex> unique_lock_;
+  };
+
+  // Helper to increment and decrement the state to track outstanding waiters.
+  class waiter
+  {
+  public:
+    explicit waiter(std::size_t& state)
+      : state_(state)
+    {
+      state_ += 2;
+    }
+
+    ~waiter()
+    {
+      state_ -= 2;
+    }
+
+  private:
+    std::size_t& state_;
+  };
+
+  std::condition_variable cond_;
+  std::size_t state_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+
+#endif // ASIO_DETAIL_STD_EVENT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_fenced_block.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_fenced_block.hpp
new file mode 100644
index 00000000000..a6ddbc81f16
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_fenced_block.hpp
@@ -0,0 +1,62 @@
+//
+// detail/std_fenced_block.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_STD_FENCED_BLOCK_HPP
+#define ASIO_DETAIL_STD_FENCED_BLOCK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_STD_ATOMIC)
+
+#include <atomic>
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class std_fenced_block
+  : private noncopyable
+{
+public:
+  enum half_t { half };
+  enum full_t { full };
+
+  // Constructor for a half fenced block.
+  explicit std_fenced_block(half_t)
+  {
+  }
+
+  // Constructor for a full fenced block.
+  explicit std_fenced_block(full_t)
+  {
+    std::atomic_thread_fence(std::memory_order_acquire);
+  }
+
+  // Destructor.
+  ~std_fenced_block()
+  {
+    std::atomic_thread_fence(std::memory_order_release);
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_STD_ATOMIC)
+
+#endif // ASIO_DETAIL_STD_FENCED_BLOCK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_global.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_global.hpp
new file mode 100644
index 00000000000..0b7eec0f014
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_global.hpp
@@ -0,0 +1,70 @@
+//
+// detail/std_global.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_STD_GLOBAL_HPP
+#define ASIO_DETAIL_STD_GLOBAL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_STD_CALL_ONCE)
+
+#include <exception>
+#include <mutex>
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+struct std_global_impl
+{
+  // Helper function to perform initialisation.
+  static void do_init()
+  {
+    instance_.ptr_ = new T;
+  }
+
+  // Destructor automatically cleans up the global.
+  ~std_global_impl()
+  {
+    delete ptr_;
+  }
+
+  static std::once_flag init_once_;
+  static std_global_impl instance_;
+  T* ptr_;
+};
+
+template <typename T>
+std::once_flag std_global_impl<T>::init_once_;
+
+template <typename T>
+std_global_impl<T> std_global_impl<T>::instance_;
+
+template <typename T>
+T& std_global()
+{
+  std::call_once(std_global_impl<T>::init_once_, &std_global_impl<T>::do_init);
+  return *std_global_impl<T>::instance_.ptr_;
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_STD_CALL_ONCE)
+
+#endif // ASIO_DETAIL_STD_GLOBAL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_mutex.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_mutex.hpp
new file mode 100644
index 00000000000..69509a3923f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_mutex.hpp
@@ -0,0 +1,73 @@
+//
+// detail/std_mutex.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_STD_MUTEX_HPP
+#define ASIO_DETAIL_STD_MUTEX_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+
+#include <mutex>
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/scoped_lock.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class std_event;
+
+class std_mutex
+  : private noncopyable
+{
+public:
+  typedef asio::detail::scoped_lock<std_mutex> scoped_lock;
+
+  // Constructor.
+  std_mutex()
+  {
+  }
+
+  // Destructor.
+  ~std_mutex()
+  {
+  }
+
+  // Lock the mutex.
+  void lock()
+  {
+    mutex_.lock();
+  }
+
+  // Unlock the mutex.
+  void unlock()
+  {
+    mutex_.unlock();
+  }
+
+private:
+  friend class std_event;
+  std::mutex mutex_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+
+#endif // ASIO_DETAIL_STD_MUTEX_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_static_mutex.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_static_mutex.hpp
new file mode 100644
index 00000000000..c92acf985e4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_static_mutex.hpp
@@ -0,0 +1,81 @@
+//
+// detail/std_static_mutex.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_STD_STATIC_MUTEX_HPP
+#define ASIO_DETAIL_STD_STATIC_MUTEX_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+
+#include <mutex>
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/scoped_lock.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class std_event;
+
+class std_static_mutex
+  : private noncopyable
+{
+public:
+  typedef asio::detail::scoped_lock<std_static_mutex> scoped_lock;
+
+  // Constructor.
+  std_static_mutex(int)
+  {
+  }
+
+  // Destructor.
+  ~std_static_mutex()
+  {
+  }
+
+  // Initialise the mutex.
+  void init()
+  {
+    // Nothing to do.
+  }
+
+  // Lock the mutex.
+  void lock()
+  {
+    mutex_.lock();
+  }
+
+  // Unlock the mutex.
+  void unlock()
+  {
+    mutex_.unlock();
+  }
+
+private:
+  friend class std_event;
+  std::mutex mutex_;
+};
+
+#define ASIO_STD_STATIC_MUTEX_INIT 0
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_STD_MUTEX_AND_CONDVAR)
+
+#endif // ASIO_DETAIL_STD_STATIC_MUTEX_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_thread.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_thread.hpp
new file mode 100644
index 00000000000..a73a6f924ae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/std_thread.hpp
@@ -0,0 +1,71 @@
+//
+// detail/std_thread.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_STD_THREAD_HPP
+#define ASIO_DETAIL_STD_THREAD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_STD_THREAD)
+
+#include <thread>
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class std_thread
+  : private noncopyable
+{
+public:
+  // Constructor.
+  template <typename Function>
+  std_thread(Function f, unsigned int = 0)
+    : thread_(f)
+  {
+  }
+
+  // Destructor.
+  ~std_thread()
+  {
+    join();
+  }
+
+  // Wait for the thread to exit.
+  void join()
+  {
+    if (thread_.joinable())
+      thread_.join();
+  }
+
+  // Get number of CPUs.
+  static std::size_t hardware_concurrency()
+  {
+    return std::thread::hardware_concurrency();
+  }
+
+private:
+  std::thread thread_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_STD_THREAD)
+
+#endif // ASIO_DETAIL_STD_THREAD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/strand_executor_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/strand_executor_service.hpp
new file mode 100644
index 00000000000..dd513cbe8ec
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/strand_executor_service.hpp
@@ -0,0 +1,142 @@
+//
+// detail/strand_executor_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_STRAND_EXECUTOR_SERVICE_HPP
+#define ASIO_DETAIL_STRAND_EXECUTOR_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/atomic_count.hpp"
+#include "asio/detail/executor_op.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/scheduler_operation.hpp"
+#include "asio/detail/scoped_ptr.hpp"
+#include "asio/execution_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Default service implementation for a strand.
+class strand_executor_service
+  : public execution_context_service_base<strand_executor_service>
+{
+public:
+  // The underlying implementation of a strand.
+  class strand_impl
+  {
+  public:
+    ASIO_DECL ~strand_impl();
+
+  private:
+    friend class strand_executor_service;
+
+    // Mutex to protect access to internal data.
+    mutex* mutex_;
+
+    // Indicates whether the strand is currently "locked" by a handler. This
+    // means that there is a handler upcall in progress, or that the strand
+    // itself has been scheduled in order to invoke some pending handlers.
+    bool locked_;
+
+    // Indicates that the strand has been shut down and will accept no further
+    // handlers.
+    bool shutdown_;
+
+    // The handlers that are waiting on the strand but should not be run until
+    // after the next time the strand is scheduled. This queue must only be
+    // modified while the mutex is locked.
+    op_queue<scheduler_operation> waiting_queue_;
+
+    // The handlers that are ready to be run. Logically speaking, these are the
+    // handlers that hold the strand's lock. The ready queue is only modified
+    // from within the strand and so may be accessed without locking the mutex.
+    op_queue<scheduler_operation> ready_queue_;
+
+    // Pointers to adjacent handle implementations in linked list.
+    strand_impl* next_;
+    strand_impl* prev_;
+
+    // The strand service in where the implementation is held.
+    strand_executor_service* service_;
+  };
+
+  typedef shared_ptr<strand_impl> implementation_type;
+
+  // Construct a new strand service for the specified context.
+  ASIO_DECL explicit strand_executor_service(execution_context& context);
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Create a new strand_executor implementation.
+  ASIO_DECL implementation_type create_implementation();
+
+  // Request invocation of the given function.
+  template <typename Executor, typename Function, typename Allocator>
+  static void dispatch(const implementation_type& impl, Executor& ex,
+      ASIO_MOVE_ARG(Function) function, const Allocator& a);
+
+  // Request invocation of the given function and return immediately.
+  template <typename Executor, typename Function, typename Allocator>
+  static void post(const implementation_type& impl, Executor& ex,
+      ASIO_MOVE_ARG(Function) function, const Allocator& a);
+
+  // Request invocation of the given function and return immediately.
+  template <typename Executor, typename Function, typename Allocator>
+  static void defer(const implementation_type& impl, Executor& ex,
+      ASIO_MOVE_ARG(Function) function, const Allocator& a);
+
+  // Determine whether the strand is running in the current thread.
+  ASIO_DECL static bool running_in_this_thread(
+      const implementation_type& impl);
+
+private:
+  friend class strand_impl;
+  template <typename Executor> class invoker;
+
+  // Adds a function to the strand. Returns true if it acquires the lock.
+  ASIO_DECL static bool enqueue(const implementation_type& impl,
+      scheduler_operation* op);
+
+  // Mutex to protect access to the service-wide state.
+  mutex mutex_;
+
+  // Number of mutexes shared between all strand objects.
+  enum { num_mutexes = 193 };
+
+  // Pool of mutexes.
+  scoped_ptr<mutex> mutexes_[num_mutexes];
+
+  // Extra value used when hashing to prevent recycled memory locations from
+  // getting the same mutex.
+  std::size_t salt_;
+
+  // The head of a linked list of all implementations.
+  strand_impl* impl_list_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/detail/impl/strand_executor_service.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/strand_executor_service.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_STRAND_EXECUTOR_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/strand_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/strand_service.hpp
new file mode 100644
index 00000000000..2c9c7c9d66c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/strand_service.hpp
@@ -0,0 +1,142 @@
+//
+// detail/strand_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_STRAND_SERVICE_HPP
+#define ASIO_DETAIL_STRAND_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/io_context.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/operation.hpp"
+#include "asio/detail/scoped_ptr.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Default service implementation for a strand.
+class strand_service
+  : public asio::detail::service_base<strand_service>
+{
+private:
+  // Helper class to re-post the strand on exit.
+  struct on_do_complete_exit;
+
+  // Helper class to re-post the strand on exit.
+  struct on_dispatch_exit;
+
+public:
+
+  // The underlying implementation of a strand.
+  class strand_impl
+    : public operation
+  {
+  public:
+    strand_impl();
+
+  private:
+    // Only this service will have access to the internal values.
+    friend class strand_service;
+    friend struct on_do_complete_exit;
+    friend struct on_dispatch_exit;
+
+    // Mutex to protect access to internal data.
+    asio::detail::mutex mutex_;
+
+    // Indicates whether the strand is currently "locked" by a handler. This
+    // means that there is a handler upcall in progress, or that the strand
+    // itself has been scheduled in order to invoke some pending handlers.
+    bool locked_;
+
+    // The handlers that are waiting on the strand but should not be run until
+    // after the next time the strand is scheduled. This queue must only be
+    // modified while the mutex is locked.
+    op_queue<operation> waiting_queue_;
+
+    // The handlers that are ready to be run. Logically speaking, these are the
+    // handlers that hold the strand's lock. The ready queue is only modified
+    // from within the strand and so may be accessed without locking the mutex.
+    op_queue<operation> ready_queue_;
+  };
+
+  typedef strand_impl* implementation_type;
+
+  // Construct a new strand service for the specified io_context.
+  ASIO_DECL explicit strand_service(asio::io_context& io_context);
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Construct a new strand implementation.
+  ASIO_DECL void construct(implementation_type& impl);
+
+  // Request the io_context to invoke the given handler.
+  template <typename Handler>
+  void dispatch(implementation_type& impl, Handler& handler);
+
+  // Request the io_context to invoke the given handler and return immediately.
+  template <typename Handler>
+  void post(implementation_type& impl, Handler& handler);
+
+  // Determine whether the strand is running in the current thread.
+  ASIO_DECL bool running_in_this_thread(
+      const implementation_type& impl) const;
+
+private:
+  // Helper function to dispatch a handler. Returns true if the handler should
+  // be dispatched immediately.
+  ASIO_DECL bool do_dispatch(implementation_type& impl, operation* op);
+
+  // Helper fiunction to post a handler.
+  ASIO_DECL void do_post(implementation_type& impl,
+      operation* op, bool is_continuation);
+
+  ASIO_DECL static void do_complete(void* owner,
+      operation* base, const asio::error_code& ec,
+      std::size_t bytes_transferred);
+
+  // The io_context implementation used to post completions.
+  io_context_impl& io_context_;
+
+  // Mutex to protect access to the array of implementations.
+  asio::detail::mutex mutex_;
+
+  // Number of implementations shared between all strand objects.
+#if defined(ASIO_STRAND_IMPLEMENTATIONS)
+  enum { num_implementations = ASIO_STRAND_IMPLEMENTATIONS };
+#else // defined(ASIO_STRAND_IMPLEMENTATIONS)
+  enum { num_implementations = 193 };
+#endif // defined(ASIO_STRAND_IMPLEMENTATIONS)
+
+  // Pool of implementations.
+  scoped_ptr<strand_impl> implementations_[num_implementations];
+
+  // Extra value used when hashing to prevent recycled memory locations from
+  // getting the same strand implementation.
+  std::size_t salt_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/detail/impl/strand_service.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/strand_service.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_STRAND_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/string_view.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/string_view.hpp
new file mode 100644
index 00000000000..d59bf8a63a9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/string_view.hpp
@@ -0,0 +1,47 @@
+//
+// detail/string_view.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_STRING_VIEW_HPP
+#define ASIO_DETAIL_STRING_VIEW_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_STRING_VIEW)
+
+#if defined(ASIO_HAS_STD_STRING_VIEW)
+# include <string_view>
+#elif defined(ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW)
+# include <experimental/string_view>
+#else // defined(ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW)
+# error ASIO_HAS_STRING_VIEW is set but no string_view is available
+#endif // defined(ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW)
+
+namespace asio {
+
+#if defined(ASIO_HAS_STD_STRING_VIEW)
+using std::basic_string_view;
+using std::string_view;
+#elif defined(ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW)
+using std::experimental::basic_string_view;
+using std::experimental::string_view;
+#endif // defined(ASIO_HAS_STD_EXPERIMENTAL_STRING_VIEW)
+
+} // namespace asio
+
+# define ASIO_STRING_VIEW_PARAM asio::string_view
+#else // defined(ASIO_HAS_STRING_VIEW)
+# define ASIO_STRING_VIEW_PARAM const std::string&
+#endif // defined(ASIO_HAS_STRING_VIEW)
+
+#endif // ASIO_DETAIL_STRING_VIEW_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread.hpp
new file mode 100644
index 00000000000..fe0980468f2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread.hpp
@@ -0,0 +1,60 @@
+//
+// detail/thread.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_THREAD_HPP
+#define ASIO_DETAIL_THREAD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS)
+# include "asio/detail/null_thread.hpp"
+#elif defined(ASIO_WINDOWS)
+# if defined(UNDER_CE)
+#  include "asio/detail/wince_thread.hpp"
+# elif defined(ASIO_WINDOWS_APP)
+#  include "asio/detail/winapp_thread.hpp"
+# else
+#  include "asio/detail/win_thread.hpp"
+# endif
+#elif defined(ASIO_HAS_PTHREADS)
+# include "asio/detail/posix_thread.hpp"
+#elif defined(ASIO_HAS_STD_THREAD)
+# include "asio/detail/std_thread.hpp"
+#else
+# error Only Windows, POSIX and std::thread are supported!
+#endif
+
+namespace asio {
+namespace detail {
+
+#if !defined(ASIO_HAS_THREADS)
+typedef null_thread thread;
+#elif defined(ASIO_WINDOWS)
+# if defined(UNDER_CE)
+typedef wince_thread thread;
+# elif defined(ASIO_WINDOWS_APP)
+typedef winapp_thread thread;
+# else
+typedef win_thread thread;
+# endif
+#elif defined(ASIO_HAS_PTHREADS)
+typedef posix_thread thread;
+#elif defined(ASIO_HAS_STD_THREAD)
+typedef std_thread thread;
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_THREAD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread_context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread_context.hpp
new file mode 100644
index 00000000000..be3e8390353
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread_context.hpp
@@ -0,0 +1,42 @@
+//
+// detail/thread_context.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_THREAD_CONTEXT_HPP
+#define ASIO_DETAIL_THREAD_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include <climits>
+#include <cstddef>
+#include "asio/detail/call_stack.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class thread_info_base;
+
+// Base class for things that manage threads (scheduler, win_iocp_io_context).
+class thread_context
+{
+public:
+  // Per-thread call stack to track the state of each thread in the context.
+  typedef call_stack<thread_context, thread_info_base> thread_call_stack;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_THREAD_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread_group.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread_group.hpp
new file mode 100644
index 00000000000..11bc14cd299
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread_group.hpp
@@ -0,0 +1,95 @@
+//
+// detail/thread_group.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_THREAD_GROUP_HPP
+#define ASIO_DETAIL_THREAD_GROUP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/scoped_ptr.hpp"
+#include "asio/detail/thread.hpp"
+
+namespace asio {
+namespace detail {
+
+class thread_group
+{
+public:
+  // Constructor initialises an empty thread group.
+  thread_group()
+    : first_(0)
+  {
+  }
+
+  // Destructor joins any remaining threads in the group.
+  ~thread_group()
+  {
+    join();
+  }
+
+  // Create a new thread in the group.
+  template <typename Function>
+  void create_thread(Function f)
+  {
+    first_ = new item(f, first_);
+  }
+
+  // Create new threads in the group.
+  template <typename Function>
+  void create_threads(Function f, std::size_t num_threads)
+  {
+    for (std::size_t i = 0; i < num_threads; ++i)
+      create_thread(f);
+  }
+
+  // Wait for all threads in the group to exit.
+  void join()
+  {
+    while (first_)
+    {
+      first_->thread_.join();
+      item* tmp = first_;
+      first_ = first_->next_;
+      delete tmp;
+    }
+  }
+
+  // Test whether the group is empty.
+  bool empty() const
+  {
+    return first_ == 0;
+  }
+
+private:
+  // Structure used to track a single thread in the group.
+  struct item
+  {
+    template <typename Function>
+    explicit item(Function f, item* next)
+      : thread_(f),
+        next_(next)
+    {
+    }
+
+    asio::detail::thread thread_;
+    item* next_;
+  };
+
+  // The first thread in the group.
+  item* first_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_THREAD_GROUP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread_info_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread_info_base.hpp
new file mode 100644
index 00000000000..8bc809b6381
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/thread_info_base.hpp
@@ -0,0 +1,126 @@
+//
+// detail/thread_info_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_THREAD_INFO_BASE_HPP
+#define ASIO_DETAIL_THREAD_INFO_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include <climits>
+#include <cstddef>
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class thread_info_base
+  : private noncopyable
+{
+public:
+  struct default_tag
+  {
+    enum { mem_index = 0 };
+  };
+
+  struct awaitable_frame_tag
+  {
+    enum { mem_index = 1 };
+  };
+
+  struct executor_function_tag
+  {
+    enum { mem_index = 2 };
+  };
+
+  thread_info_base()
+  {
+    for (int i = 0; i < max_mem_index; ++i)
+      reusable_memory_[i] = 0;
+  }
+
+  ~thread_info_base()
+  {
+    for (int i = 0; i < max_mem_index; ++i)
+      if (reusable_memory_[i])
+        ::operator delete(reusable_memory_[i]);
+  }
+
+  static void* allocate(thread_info_base* this_thread, std::size_t size)
+  {
+    return allocate(default_tag(), this_thread, size);
+  }
+
+  static void deallocate(thread_info_base* this_thread,
+      void* pointer, std::size_t size)
+  {
+    deallocate(default_tag(), this_thread, pointer, size);
+  }
+
+  template <typename Purpose>
+  static void* allocate(Purpose, thread_info_base* this_thread,
+      std::size_t size)
+  {
+    std::size_t chunks = (size + chunk_size - 1) / chunk_size;
+
+    if (this_thread && this_thread->reusable_memory_[Purpose::mem_index])
+    {
+      void* const pointer = this_thread->reusable_memory_[Purpose::mem_index];
+      this_thread->reusable_memory_[Purpose::mem_index] = 0;
+
+      unsigned char* const mem = static_cast<unsigned char*>(pointer);
+      if (static_cast<std::size_t>(mem[0]) >= chunks)
+      {
+        mem[size] = mem[0];
+        return pointer;
+      }
+
+      ::operator delete(pointer);
+    }
+
+    void* const pointer = ::operator new(chunks * chunk_size + 1);
+    unsigned char* const mem = static_cast<unsigned char*>(pointer);
+    mem[size] = (chunks <= UCHAR_MAX) ? static_cast<unsigned char>(chunks) : 0;
+    return pointer;
+  }
+
+  template <typename Purpose>
+  static void deallocate(Purpose, thread_info_base* this_thread,
+      void* pointer, std::size_t size)
+  {
+    if (size <= chunk_size * UCHAR_MAX)
+    {
+      if (this_thread && this_thread->reusable_memory_[Purpose::mem_index] == 0)
+      {
+        unsigned char* const mem = static_cast<unsigned char*>(pointer);
+        mem[0] = mem[size];
+        this_thread->reusable_memory_[Purpose::mem_index] = pointer;
+        return;
+      }
+    }
+
+    ::operator delete(pointer);
+  }
+
+private:
+  enum { chunk_size = 4 };
+  enum { max_mem_index = 3 };
+  void* reusable_memory_[max_mem_index];
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_THREAD_INFO_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/throw_error.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/throw_error.hpp
new file mode 100644
index 00000000000..cbeb77aee96
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/throw_error.hpp
@@ -0,0 +1,53 @@
+//
+// detail/throw_error.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_THROW_ERROR_HPP
+#define ASIO_DETAIL_THROW_ERROR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/error_code.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+ASIO_DECL void do_throw_error(const asio::error_code& err);
+
+ASIO_DECL void do_throw_error(const asio::error_code& err,
+    const char* location);
+
+inline void throw_error(const asio::error_code& err)
+{
+  if (err)
+    do_throw_error(err);
+}
+
+inline void throw_error(const asio::error_code& err,
+    const char* location)
+{
+  if (err)
+    do_throw_error(err, location);
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/throw_error.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_THROW_ERROR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/throw_exception.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/throw_exception.hpp
new file mode 100644
index 00000000000..1680aeebf7c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/throw_exception.hpp
@@ -0,0 +1,51 @@
+//
+// detail/throw_exception.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_THROW_EXCEPTION_HPP
+#define ASIO_DETAIL_THROW_EXCEPTION_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_BOOST_THROW_EXCEPTION)
+# include <boost/throw_exception.hpp>
+#endif // defined(ASIO_BOOST_THROW_EXCEPTION)
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_HAS_BOOST_THROW_EXCEPTION)
+using boost::throw_exception;
+#else // defined(ASIO_HAS_BOOST_THROW_EXCEPTION)
+
+// Declare the throw_exception function for all targets.
+template <typename Exception>
+void throw_exception(const Exception& e);
+
+// Only define the throw_exception function when exceptions are enabled.
+// Otherwise, it is up to the application to provide a definition of this
+// function.
+# if !defined(ASIO_NO_EXCEPTIONS)
+template <typename Exception>
+void throw_exception(const Exception& e)
+{
+  throw e;
+}
+# endif // !defined(ASIO_NO_EXCEPTIONS)
+
+#endif // defined(ASIO_HAS_BOOST_THROW_EXCEPTION)
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_THROW_EXCEPTION_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue.hpp
new file mode 100644
index 00000000000..015d0cd577f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue.hpp
@@ -0,0 +1,360 @@
+//
+// detail/timer_queue.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_TIMER_QUEUE_HPP
+#define ASIO_DETAIL_TIMER_QUEUE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include <vector>
+#include "asio/detail/cstdint.hpp"
+#include "asio/detail/date_time_fwd.hpp"
+#include "asio/detail/limits.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/timer_queue_base.hpp"
+#include "asio/detail/wait_op.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Time_Traits>
+class timer_queue
+  : public timer_queue_base
+{
+public:
+  // The time type.
+  typedef typename Time_Traits::time_type time_type;
+
+  // The duration type.
+  typedef typename Time_Traits::duration_type duration_type;
+
+  // Per-timer data.
+  class per_timer_data
+  {
+  public:
+    per_timer_data() :
+      heap_index_((std::numeric_limits<std::size_t>::max)()),
+      next_(0), prev_(0)
+    {
+    }
+
+  private:
+    friend class timer_queue;
+
+    // The operations waiting on the timer.
+    op_queue<wait_op> op_queue_;
+
+    // The index of the timer in the heap.
+    std::size_t heap_index_;
+
+    // Pointers to adjacent timers in a linked list.
+    per_timer_data* next_;
+    per_timer_data* prev_;
+  };
+
+  // Constructor.
+  timer_queue()
+    : timers_(),
+      heap_()
+  {
+  }
+
+  // Add a new timer to the queue. Returns true if this is the timer that is
+  // earliest in the queue, in which case the reactor's event demultiplexing
+  // function call may need to be interrupted and restarted.
+  bool enqueue_timer(const time_type& time, per_timer_data& timer, wait_op* op)
+  {
+    // Enqueue the timer object.
+    if (timer.prev_ == 0 && &timer != timers_)
+    {
+      if (this->is_positive_infinity(time))
+      {
+        // No heap entry is required for timers that never expire.
+        timer.heap_index_ = (std::numeric_limits<std::size_t>::max)();
+      }
+      else
+      {
+        // Put the new timer at the correct position in the heap. This is done
+        // first since push_back() can throw due to allocation failure.
+        timer.heap_index_ = heap_.size();
+        heap_entry entry = { time, &timer };
+        heap_.push_back(entry);
+        up_heap(heap_.size() - 1);
+      }
+
+      // Insert the new timer into the linked list of active timers.
+      timer.next_ = timers_;
+      timer.prev_ = 0;
+      if (timers_)
+        timers_->prev_ = &timer;
+      timers_ = &timer;
+    }
+
+    // Enqueue the individual timer operation.
+    timer.op_queue_.push(op);
+
+    // Interrupt reactor only if newly added timer is first to expire.
+    return timer.heap_index_ == 0 && timer.op_queue_.front() == op;
+  }
+
+  // Whether there are no timers in the queue.
+  virtual bool empty() const
+  {
+    return timers_ == 0;
+  }
+
+  // Get the time for the timer that is earliest in the queue.
+  virtual long wait_duration_msec(long max_duration) const
+  {
+    if (heap_.empty())
+      return max_duration;
+
+    return this->to_msec(
+        Time_Traits::to_posix_duration(
+          Time_Traits::subtract(heap_[0].time_, Time_Traits::now())),
+        max_duration);
+  }
+
+  // Get the time for the timer that is earliest in the queue.
+  virtual long wait_duration_usec(long max_duration) const
+  {
+    if (heap_.empty())
+      return max_duration;
+
+    return this->to_usec(
+        Time_Traits::to_posix_duration(
+          Time_Traits::subtract(heap_[0].time_, Time_Traits::now())),
+        max_duration);
+  }
+
+  // Dequeue all timers not later than the current time.
+  virtual void get_ready_timers(op_queue<operation>& ops)
+  {
+    if (!heap_.empty())
+    {
+      const time_type now = Time_Traits::now();
+      while (!heap_.empty() && !Time_Traits::less_than(now, heap_[0].time_))
+      {
+        per_timer_data* timer = heap_[0].timer_;
+        ops.push(timer->op_queue_);
+        remove_timer(*timer);
+      }
+    }
+  }
+
+  // Dequeue all timers.
+  virtual void get_all_timers(op_queue<operation>& ops)
+  {
+    while (timers_)
+    {
+      per_timer_data* timer = timers_;
+      timers_ = timers_->next_;
+      ops.push(timer->op_queue_);
+      timer->next_ = 0;
+      timer->prev_ = 0;
+    }
+
+    heap_.clear();
+  }
+
+  // Cancel and dequeue operations for the given timer.
+  std::size_t cancel_timer(per_timer_data& timer, op_queue<operation>& ops,
+      std::size_t max_cancelled = (std::numeric_limits<std::size_t>::max)())
+  {
+    std::size_t num_cancelled = 0;
+    if (timer.prev_ != 0 || &timer == timers_)
+    {
+      while (wait_op* op = (num_cancelled != max_cancelled)
+          ? timer.op_queue_.front() : 0)
+      {
+        op->ec_ = asio::error::operation_aborted;
+        timer.op_queue_.pop();
+        ops.push(op);
+        ++num_cancelled;
+      }
+      if (timer.op_queue_.empty())
+        remove_timer(timer);
+    }
+    return num_cancelled;
+  }
+
+  // Move operations from one timer to another, empty timer.
+  void move_timer(per_timer_data& target, per_timer_data& source)
+  {
+    target.op_queue_.push(source.op_queue_);
+
+    target.heap_index_ = source.heap_index_;
+    source.heap_index_ = (std::numeric_limits<std::size_t>::max)();
+
+    if (target.heap_index_ < heap_.size())
+      heap_[target.heap_index_].timer_ = &target;
+
+    if (timers_ == &source)
+      timers_ = &target;
+    if (source.prev_)
+      source.prev_->next_ = &target;
+    if (source.next_)
+      source.next_->prev_= &target;
+    target.next_ = source.next_;
+    target.prev_ = source.prev_;
+    source.next_ = 0;
+    source.prev_ = 0;
+  }
+
+private:
+  // Move the item at the given index up the heap to its correct position.
+  void up_heap(std::size_t index)
+  {
+    while (index > 0)
+    {
+      std::size_t parent = (index - 1) / 2;
+      if (!Time_Traits::less_than(heap_[index].time_, heap_[parent].time_))
+        break;
+      swap_heap(index, parent);
+      index = parent;
+    }
+  }
+
+  // Move the item at the given index down the heap to its correct position.
+  void down_heap(std::size_t index)
+  {
+    std::size_t child = index * 2 + 1;
+    while (child < heap_.size())
+    {
+      std::size_t min_child = (child + 1 == heap_.size()
+          || Time_Traits::less_than(
+            heap_[child].time_, heap_[child + 1].time_))
+        ? child : child + 1;
+      if (Time_Traits::less_than(heap_[index].time_, heap_[min_child].time_))
+        break;
+      swap_heap(index, min_child);
+      index = min_child;
+      child = index * 2 + 1;
+    }
+  }
+
+  // Swap two entries in the heap.
+  void swap_heap(std::size_t index1, std::size_t index2)
+  {
+    heap_entry tmp = heap_[index1];
+    heap_[index1] = heap_[index2];
+    heap_[index2] = tmp;
+    heap_[index1].timer_->heap_index_ = index1;
+    heap_[index2].timer_->heap_index_ = index2;
+  }
+
+  // Remove a timer from the heap and list of timers.
+  void remove_timer(per_timer_data& timer)
+  {
+    // Remove the timer from the heap.
+    std::size_t index = timer.heap_index_;
+    if (!heap_.empty() && index < heap_.size())
+    {
+      if (index == heap_.size() - 1)
+      {
+        timer.heap_index_ = (std::numeric_limits<std::size_t>::max)();
+        heap_.pop_back();
+      }
+      else
+      {
+        swap_heap(index, heap_.size() - 1);
+        timer.heap_index_ = (std::numeric_limits<std::size_t>::max)();
+        heap_.pop_back();
+        if (index > 0 && Time_Traits::less_than(
+              heap_[index].time_, heap_[(index - 1) / 2].time_))
+          up_heap(index);
+        else
+          down_heap(index);
+      }
+    }
+
+    // Remove the timer from the linked list of active timers.
+    if (timers_ == &timer)
+      timers_ = timer.next_;
+    if (timer.prev_)
+      timer.prev_->next_ = timer.next_;
+    if (timer.next_)
+      timer.next_->prev_= timer.prev_;
+    timer.next_ = 0;
+    timer.prev_ = 0;
+  }
+
+  // Determine if the specified absolute time is positive infinity.
+  template <typename Time_Type>
+  static bool is_positive_infinity(const Time_Type&)
+  {
+    return false;
+  }
+
+  // Determine if the specified absolute time is positive infinity.
+  template <typename T, typename TimeSystem>
+  static bool is_positive_infinity(
+      const boost::date_time::base_time<T, TimeSystem>& time)
+  {
+    return time.is_pos_infinity();
+  }
+
+  // Helper function to convert a duration into milliseconds.
+  template <typename Duration>
+  long to_msec(const Duration& d, long max_duration) const
+  {
+    if (d.ticks() <= 0)
+      return 0;
+    int64_t msec = d.total_milliseconds();
+    if (msec == 0)
+      return 1;
+    if (msec > max_duration)
+      return max_duration;
+    return static_cast<long>(msec);
+  }
+
+  // Helper function to convert a duration into microseconds.
+  template <typename Duration>
+  long to_usec(const Duration& d, long max_duration) const
+  {
+    if (d.ticks() <= 0)
+      return 0;
+    int64_t usec = d.total_microseconds();
+    if (usec == 0)
+      return 1;
+    if (usec > max_duration)
+      return max_duration;
+    return static_cast<long>(usec);
+  }
+
+  // The head of a linked list of all active timers.
+  per_timer_data* timers_;
+
+  struct heap_entry
+  {
+    // The time when the timer should fire.
+    time_type time_;
+
+    // The associated timer with enqueued operations.
+    per_timer_data* timer_;
+  };
+
+  // The heap of timers, with the earliest timer at the front.
+  std::vector<heap_entry> heap_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_TIMER_QUEUE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue_base.hpp
new file mode 100644
index 00000000000..f0ea3598c00
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue_base.hpp
@@ -0,0 +1,68 @@
+//
+// detail/timer_queue_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_TIMER_QUEUE_BASE_HPP
+#define ASIO_DETAIL_TIMER_QUEUE_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/operation.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class timer_queue_base
+  : private noncopyable
+{
+public:
+  // Constructor.
+  timer_queue_base() : next_(0) {}
+
+  // Destructor.
+  virtual ~timer_queue_base() {}
+
+  // Whether there are no timers in the queue.
+  virtual bool empty() const = 0;
+
+  // Get the time to wait until the next timer.
+  virtual long wait_duration_msec(long max_duration) const = 0;
+
+  // Get the time to wait until the next timer.
+  virtual long wait_duration_usec(long max_duration) const = 0;
+
+  // Dequeue all ready timers.
+  virtual void get_ready_timers(op_queue<operation>& ops) = 0;
+
+  // Dequeue all timers.
+  virtual void get_all_timers(op_queue<operation>& ops) = 0;
+
+private:
+  friend class timer_queue_set;
+
+  // Next timer queue in the set.
+  timer_queue_base* next_;
+};
+
+template <typename Time_Traits>
+class timer_queue;
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_TIMER_QUEUE_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue_ptime.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue_ptime.hpp
new file mode 100644
index 00000000000..a67adeb8e3c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue_ptime.hpp
@@ -0,0 +1,99 @@
+//
+// detail/timer_queue_ptime.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_TIMER_QUEUE_PTIME_HPP
+#define ASIO_DETAIL_TIMER_QUEUE_PTIME_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_BOOST_DATE_TIME)
+
+#include "asio/time_traits.hpp"
+#include "asio/detail/timer_queue.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+struct forwarding_posix_time_traits : time_traits<boost::posix_time::ptime> {};
+
+// Template specialisation for the commonly used instantation.
+template <>
+class timer_queue<time_traits<boost::posix_time::ptime> >
+  : public timer_queue_base
+{
+public:
+  // The time type.
+  typedef boost::posix_time::ptime time_type;
+
+  // The duration type.
+  typedef boost::posix_time::time_duration duration_type;
+
+  // Per-timer data.
+  typedef timer_queue<forwarding_posix_time_traits>::per_timer_data
+    per_timer_data;
+
+  // Constructor.
+  ASIO_DECL timer_queue();
+
+  // Destructor.
+  ASIO_DECL virtual ~timer_queue();
+
+  // Add a new timer to the queue. Returns true if this is the timer that is
+  // earliest in the queue, in which case the reactor's event demultiplexing
+  // function call may need to be interrupted and restarted.
+  ASIO_DECL bool enqueue_timer(const time_type& time,
+      per_timer_data& timer, wait_op* op);
+
+  // Whether there are no timers in the queue.
+  ASIO_DECL virtual bool empty() const;
+
+  // Get the time for the timer that is earliest in the queue.
+  ASIO_DECL virtual long wait_duration_msec(long max_duration) const;
+
+  // Get the time for the timer that is earliest in the queue.
+  ASIO_DECL virtual long wait_duration_usec(long max_duration) const;
+
+  // Dequeue all timers not later than the current time.
+  ASIO_DECL virtual void get_ready_timers(op_queue<operation>& ops);
+
+  // Dequeue all timers.
+  ASIO_DECL virtual void get_all_timers(op_queue<operation>& ops);
+
+  // Cancel and dequeue operations for the given timer.
+  ASIO_DECL std::size_t cancel_timer(
+      per_timer_data& timer, op_queue<operation>& ops,
+      std::size_t max_cancelled = (std::numeric_limits<std::size_t>::max)());
+
+  // Move operations from one timer to another, empty timer.
+  ASIO_DECL void move_timer(per_timer_data& target,
+      per_timer_data& source);
+
+private:
+  timer_queue<forwarding_posix_time_traits> impl_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/timer_queue_ptime.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+
+#endif // ASIO_DETAIL_TIMER_QUEUE_PTIME_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue_set.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue_set.hpp
new file mode 100644
index 00000000000..51a507c8bc7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_queue_set.hpp
@@ -0,0 +1,66 @@
+//
+// detail/timer_queue_set.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_TIMER_QUEUE_SET_HPP
+#define ASIO_DETAIL_TIMER_QUEUE_SET_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/timer_queue_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class timer_queue_set
+{
+public:
+  // Constructor.
+  ASIO_DECL timer_queue_set();
+
+  // Add a timer queue to the set.
+  ASIO_DECL void insert(timer_queue_base* q);
+
+  // Remove a timer queue from the set.
+  ASIO_DECL void erase(timer_queue_base* q);
+
+  // Determine whether all queues are empty.
+  ASIO_DECL bool all_empty() const;
+
+  // Get the wait duration in milliseconds.
+  ASIO_DECL long wait_duration_msec(long max_duration) const;
+
+  // Get the wait duration in microseconds.
+  ASIO_DECL long wait_duration_usec(long max_duration) const;
+
+  // Dequeue all ready timers.
+  ASIO_DECL void get_ready_timers(op_queue<operation>& ops);
+
+  // Dequeue all timers.
+  ASIO_DECL void get_all_timers(op_queue<operation>& ops);
+
+private:
+  timer_queue_base* first_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/timer_queue_set.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_DETAIL_TIMER_QUEUE_SET_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_scheduler.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_scheduler.hpp
new file mode 100644
index 00000000000..471e7386415
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_scheduler.hpp
@@ -0,0 +1,35 @@
+//
+// detail/timer_scheduler.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_TIMER_SCHEDULER_HPP
+#define ASIO_DETAIL_TIMER_SCHEDULER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/timer_scheduler_fwd.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+# include "asio/detail/winrt_timer_scheduler.hpp"
+#elif defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_io_context.hpp"
+#elif defined(ASIO_HAS_EPOLL)
+# include "asio/detail/epoll_reactor.hpp"
+#elif defined(ASIO_HAS_KQUEUE)
+# include "asio/detail/kqueue_reactor.hpp"
+#elif defined(ASIO_HAS_DEV_POLL)
+# include "asio/detail/dev_poll_reactor.hpp"
+#else
+# include "asio/detail/select_reactor.hpp"
+#endif
+
+#endif // ASIO_DETAIL_TIMER_SCHEDULER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_scheduler_fwd.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_scheduler_fwd.hpp
new file mode 100644
index 00000000000..eaf07df9b49
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/timer_scheduler_fwd.hpp
@@ -0,0 +1,40 @@
+//
+// detail/timer_scheduler_fwd.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_TIMER_SCHEDULER_FWD_HPP
+#define ASIO_DETAIL_TIMER_SCHEDULER_FWD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+typedef class winrt_timer_scheduler timer_scheduler;
+#elif defined(ASIO_HAS_IOCP)
+typedef class win_iocp_io_context timer_scheduler;
+#elif defined(ASIO_HAS_EPOLL)
+typedef class epoll_reactor timer_scheduler;
+#elif defined(ASIO_HAS_KQUEUE)
+typedef class kqueue_reactor timer_scheduler;
+#elif defined(ASIO_HAS_DEV_POLL)
+typedef class dev_poll_reactor timer_scheduler;
+#else
+typedef class select_reactor timer_scheduler;
+#endif
+
+} // namespace detail
+} // namespace asio
+
+#endif // ASIO_DETAIL_TIMER_SCHEDULER_FWD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/tss_ptr.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/tss_ptr.hpp
new file mode 100644
index 00000000000..d9903dc5747
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/tss_ptr.hpp
@@ -0,0 +1,69 @@
+//
+// detail/tss_ptr.hpp
+// ~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_TSS_PTR_HPP
+#define ASIO_DETAIL_TSS_PTR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_THREADS)
+# include "asio/detail/null_tss_ptr.hpp"
+#elif defined(ASIO_HAS_THREAD_KEYWORD_EXTENSION)
+# include "asio/detail/keyword_tss_ptr.hpp"
+#elif defined(ASIO_WINDOWS)
+# include "asio/detail/win_tss_ptr.hpp"
+#elif defined(ASIO_HAS_PTHREADS)
+# include "asio/detail/posix_tss_ptr.hpp"
+#else
+# error Only Windows and POSIX are supported!
+#endif
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+class tss_ptr
+#if !defined(ASIO_HAS_THREADS)
+  : public null_tss_ptr<T>
+#elif defined(ASIO_HAS_THREAD_KEYWORD_EXTENSION)
+  : public keyword_tss_ptr<T>
+#elif defined(ASIO_WINDOWS)
+  : public win_tss_ptr<T>
+#elif defined(ASIO_HAS_PTHREADS)
+  : public posix_tss_ptr<T>
+#endif
+{
+public:
+  void operator=(T* value)
+  {
+#if !defined(ASIO_HAS_THREADS)
+    null_tss_ptr<T>::operator=(value);
+#elif defined(ASIO_HAS_THREAD_KEYWORD_EXTENSION)
+    keyword_tss_ptr<T>::operator=(value);
+#elif defined(ASIO_WINDOWS)
+    win_tss_ptr<T>::operator=(value);
+#elif defined(ASIO_HAS_PTHREADS)
+    posix_tss_ptr<T>::operator=(value);
+#endif
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_TSS_PTR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/type_traits.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/type_traits.hpp
new file mode 100644
index 00000000000..0f7ee6e3e73
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/type_traits.hpp
@@ -0,0 +1,89 @@
+//
+// detail/type_traits.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_TYPE_TRAITS_HPP
+#define ASIO_DETAIL_TYPE_TRAITS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_STD_TYPE_TRAITS)
+# include <type_traits>
+#else // defined(ASIO_HAS_TYPE_TRAITS)
+# include <boost/type_traits/add_const.hpp>
+# include <boost/type_traits/conditional.hpp>
+# include <boost/type_traits/decay.hpp>
+# include <boost/type_traits/integral_constant.hpp>
+# include <boost/type_traits/is_base_of.hpp>
+# include <boost/type_traits/is_class.hpp>
+# include <boost/type_traits/is_const.hpp>
+# include <boost/type_traits/is_convertible.hpp>
+# include <boost/type_traits/is_function.hpp>
+# include <boost/type_traits/is_same.hpp>
+# include <boost/type_traits/remove_pointer.hpp>
+# include <boost/type_traits/remove_reference.hpp>
+# include <boost/utility/declval.hpp>
+# include <boost/utility/enable_if.hpp>
+# include <boost/utility/result_of.hpp>
+#endif // defined(ASIO_HAS_TYPE_TRAITS)
+
+namespace asio {
+
+#if defined(ASIO_HAS_STD_TYPE_TRAITS)
+using std::add_const;
+using std::conditional;
+using std::decay;
+using std::declval;
+using std::enable_if;
+using std::false_type;
+using std::integral_constant;
+using std::is_base_of;
+using std::is_class;
+using std::is_const;
+using std::is_convertible;
+using std::is_function;
+using std::is_same;
+using std::remove_pointer;
+using std::remove_reference;
+#if defined(ASIO_HAS_STD_INVOKE_RESULT)
+template <typename> struct result_of;
+template <typename F, typename... Args>
+struct result_of<F(Args...)> : std::invoke_result<F, Args...> {};
+#else // defined(ASIO_HAS_STD_INVOKE_RESULT)
+using std::result_of;
+#endif // defined(ASIO_HAS_STD_INVOKE_RESULT)
+using std::true_type;
+#else // defined(ASIO_HAS_STD_TYPE_TRAITS)
+using boost::add_const;
+template <bool Condition, typename Type = void>
+struct enable_if : boost::enable_if_c<Condition, Type> {};
+using boost::conditional;
+using boost::decay;
+using boost::declval;
+using boost::false_type;
+using boost::integral_constant;
+using boost::is_base_of;
+using boost::is_class;
+using boost::is_const;
+using boost::is_convertible;
+using boost::is_function;
+using boost::is_same;
+using boost::remove_pointer;
+using boost::remove_reference;
+using boost::result_of;
+using boost::true_type;
+#endif // defined(ASIO_HAS_STD_TYPE_TRAITS)
+
+} // namespace asio
+
+#endif // ASIO_DETAIL_TYPE_TRAITS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/variadic_templates.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/variadic_templates.hpp
new file mode 100644
index 00000000000..cd52c04fc6b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/variadic_templates.hpp
@@ -0,0 +1,151 @@
+//
+// detail/variadic_templates.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_VARIADIC_TEMPLATES_HPP
+#define ASIO_DETAIL_VARIADIC_TEMPLATES_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+# define ASIO_VARIADIC_TPARAMS(n) ASIO_VARIADIC_TPARAMS_##n
+
+# define ASIO_VARIADIC_TPARAMS_1 \
+  typename T1
+# define ASIO_VARIADIC_TPARAMS_2 \
+  typename T1, typename T2
+# define ASIO_VARIADIC_TPARAMS_3 \
+  typename T1, typename T2, typename T3
+# define ASIO_VARIADIC_TPARAMS_4 \
+  typename T1, typename T2, typename T3, typename T4
+# define ASIO_VARIADIC_TPARAMS_5 \
+  typename T1, typename T2, typename T3, typename T4, typename T5
+
+# define ASIO_VARIADIC_TARGS(n) ASIO_VARIADIC_TARGS_##n
+
+# define ASIO_VARIADIC_TARGS_1 T1
+# define ASIO_VARIADIC_TARGS_2 T1, T2
+# define ASIO_VARIADIC_TARGS_3 T1, T2, T3
+# define ASIO_VARIADIC_TARGS_4 T1, T2, T3, T4
+# define ASIO_VARIADIC_TARGS_5 T1, T2, T3, T4, T5
+
+# define ASIO_VARIADIC_BYVAL_PARAMS(n) \
+  ASIO_VARIADIC_BYVAL_PARAMS_##n
+
+# define ASIO_VARIADIC_BYVAL_PARAMS_1 T1 x1
+# define ASIO_VARIADIC_BYVAL_PARAMS_2 T1 x1, T2 x2
+# define ASIO_VARIADIC_BYVAL_PARAMS_3 T1 x1, T2 x2, T3 x3
+# define ASIO_VARIADIC_BYVAL_PARAMS_4 T1 x1, T2 x2, T3 x3, T4 x4
+# define ASIO_VARIADIC_BYVAL_PARAMS_5 T1 x1, T2 x2, T3 x3, T4 x4, T5 x5
+
+# define ASIO_VARIADIC_BYVAL_ARGS(n) \
+  ASIO_VARIADIC_BYVAL_ARGS_##n
+
+# define ASIO_VARIADIC_BYVAL_ARGS_1 x1
+# define ASIO_VARIADIC_BYVAL_ARGS_2 x1, x2
+# define ASIO_VARIADIC_BYVAL_ARGS_3 x1, x2, x3
+# define ASIO_VARIADIC_BYVAL_ARGS_4 x1, x2, x3, x4
+# define ASIO_VARIADIC_BYVAL_ARGS_5 x1, x2, x3, x4, x5
+
+# define ASIO_VARIADIC_CONSTREF_PARAMS(n) \
+  ASIO_VARIADIC_CONSTREF_PARAMS_##n
+
+# define ASIO_VARIADIC_CONSTREF_PARAMS_1 \
+  const T1& x1
+# define ASIO_VARIADIC_CONSTREF_PARAMS_2 \
+  const T1& x1, const T2& x2
+# define ASIO_VARIADIC_CONSTREF_PARAMS_3 \
+  const T1& x1, const T2& x2, const T3& x3
+# define ASIO_VARIADIC_CONSTREF_PARAMS_4 \
+  const T1& x1, const T2& x2, const T3& x3, const T4& x4
+# define ASIO_VARIADIC_CONSTREF_PARAMS_5 \
+  const T1& x1, const T2& x2, const T3& x3, const T4& x4, const T5& x5
+
+# define ASIO_VARIADIC_MOVE_PARAMS(n) \
+  ASIO_VARIADIC_MOVE_PARAMS_##n
+
+# define ASIO_VARIADIC_MOVE_PARAMS_1 \
+  ASIO_MOVE_ARG(T1) x1
+# define ASIO_VARIADIC_MOVE_PARAMS_2 \
+  ASIO_MOVE_ARG(T1) x1, ASIO_MOVE_ARG(T2) x2
+# define ASIO_VARIADIC_MOVE_PARAMS_3 \
+  ASIO_MOVE_ARG(T1) x1, ASIO_MOVE_ARG(T2) x2, \
+  ASIO_MOVE_ARG(T3) x3
+# define ASIO_VARIADIC_MOVE_PARAMS_4 \
+  ASIO_MOVE_ARG(T1) x1, ASIO_MOVE_ARG(T2) x2, \
+  ASIO_MOVE_ARG(T3) x3, ASIO_MOVE_ARG(T4) x4
+# define ASIO_VARIADIC_MOVE_PARAMS_5 \
+  ASIO_MOVE_ARG(T1) x1, ASIO_MOVE_ARG(T2) x2, \
+  ASIO_MOVE_ARG(T3) x3, ASIO_MOVE_ARG(T4) x4, \
+  ASIO_MOVE_ARG(T5) x5
+
+# define ASIO_VARIADIC_MOVE_ARGS(n) \
+  ASIO_VARIADIC_MOVE_ARGS_##n
+
+# define ASIO_VARIADIC_MOVE_ARGS_1 \
+  ASIO_MOVE_CAST(T1)(x1)
+# define ASIO_VARIADIC_MOVE_ARGS_2 \
+  ASIO_MOVE_CAST(T1)(x1), ASIO_MOVE_CAST(T2)(x2)
+# define ASIO_VARIADIC_MOVE_ARGS_3 \
+  ASIO_MOVE_CAST(T1)(x1), ASIO_MOVE_CAST(T2)(x2), \
+  ASIO_MOVE_CAST(T3)(x3)
+# define ASIO_VARIADIC_MOVE_ARGS_4 \
+  ASIO_MOVE_CAST(T1)(x1), ASIO_MOVE_CAST(T2)(x2), \
+  ASIO_MOVE_CAST(T3)(x3), ASIO_MOVE_CAST(T4)(x4)
+# define ASIO_VARIADIC_MOVE_ARGS_5 \
+  ASIO_MOVE_CAST(T1)(x1), ASIO_MOVE_CAST(T2)(x2), \
+  ASIO_MOVE_CAST(T3)(x3), ASIO_MOVE_CAST(T4)(x4), \
+  ASIO_MOVE_CAST(T5)(x5)
+
+# define ASIO_VARIADIC_MOVE_DECLVAL(n) \
+  ASIO_VARIADIC_MOVE_DECLVAL_##n
+
+# define ASIO_VARIADIC_MOVE_DECLVAL_1 \
+  declval<ASIO_MOVE_ARG(T1)>()
+# define ASIO_VARIADIC_MOVE_DECLVAL_2 \
+  declval<ASIO_MOVE_ARG(T1)>(), declval<ASIO_MOVE_ARG(T2)>()
+# define ASIO_VARIADIC_MOVE_DECLVAL_3 \
+  declval<ASIO_MOVE_ARG(T1)>(), declval<ASIO_MOVE_ARG(T2)>(), \
+  declval<ASIO_MOVE_ARG(T3)>()
+# define ASIO_VARIADIC_MOVE_DECLVAL_4 \
+  declval<ASIO_MOVE_ARG(T1)>(), declval<ASIO_MOVE_ARG(T2)>(), \
+  declval<ASIO_MOVE_ARG(T3)>(), declval<ASIO_MOVE_ARG(T4)>()
+# define ASIO_VARIADIC_MOVE_DECLVAL_5 \
+  declval<ASIO_MOVE_ARG(T1)>(), declval<ASIO_MOVE_ARG(T2)>(), \
+  declval<ASIO_MOVE_ARG(T3)>(), declval<ASIO_MOVE_ARG(T4)>(), \
+  declval<ASIO_MOVE_ARG(T5)>()
+
+# define ASIO_VARIADIC_DECAY(n) \
+  ASIO_VARIADIC_DECAY_##n
+
+# define ASIO_VARIADIC_DECAY_1 \
+  typename decay<T1>::type
+# define ASIO_VARIADIC_DECAY_2 \
+  typename decay<T1>::type, typename decay<T2>::type
+# define ASIO_VARIADIC_DECAY_3 \
+  typename decay<T1>::type, typename decay<T2>::type, \
+  typename decay<T3>::type
+# define ASIO_VARIADIC_DECAY_4 \
+  typename decay<T1>::type, typename decay<T2>::type, \
+  typename decay<T3>::type, typename decay<T4>::type
+# define ASIO_VARIADIC_DECAY_5 \
+  typename decay<T1>::type, typename decay<T2>::type, \
+  typename decay<T3>::type, typename decay<T4>::type, \
+  typename decay<T5>::type
+
+# define ASIO_VARIADIC_GENERATE(m) m(1) m(2) m(3) m(4) m(5)
+
+#endif // !defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#endif // ASIO_DETAIL_VARIADIC_TEMPLATES_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wait_handler.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wait_handler.hpp
new file mode 100644
index 00000000000..be49a966c29
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wait_handler.hpp
@@ -0,0 +1,87 @@
+//
+// detail/wait_handler.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WAIT_HANDLER_HPP
+#define ASIO_DETAIL_WAIT_HANDLER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/handler_work.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/wait_op.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler, typename IoExecutor>
+class wait_handler : public wait_op
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(wait_handler);
+
+  wait_handler(Handler& h, const IoExecutor& ex)
+    : wait_op(&wait_handler::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(h)),
+      io_executor_(ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& /*ec*/,
+      std::size_t /*bytes_transferred*/)
+  {
+    // Take ownership of the handler object.
+    wait_handler* h(static_cast<wait_handler*>(base));
+    ptr p = { asio::detail::addressof(h->handler_), h, h };
+    handler_work<Handler, IoExecutor> w(h->handler_, h->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*h));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder1<Handler, asio::error_code>
+      handler(h->handler_, h->ec_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_WAIT_HANDLER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wait_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wait_op.hpp
new file mode 100644
index 00000000000..a443cebd2f8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wait_op.hpp
@@ -0,0 +1,45 @@
+//
+// detail/wait_op.hpp
+// ~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WAIT_OP_HPP
+#define ASIO_DETAIL_WAIT_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/operation.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class wait_op
+  : public operation
+{
+public:
+  // The error code to be passed to the completion handler.
+  asio::error_code ec_;
+
+protected:
+  wait_op(func_type func)
+    : operation(func)
+  {
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_WAIT_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_event.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_event.hpp
new file mode 100644
index 00000000000..678b290ffe6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_event.hpp
@@ -0,0 +1,151 @@
+//
+// detail/win_event.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_EVENT_HPP
+#define ASIO_DETAIL_WIN_EVENT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS)
+
+#include "asio/detail/assert.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class win_event
+  : private noncopyable
+{
+public:
+  // Constructor.
+  ASIO_DECL win_event();
+
+  // Destructor.
+  ASIO_DECL ~win_event();
+
+  // Signal the event. (Retained for backward compatibility.)
+  template <typename Lock>
+  void signal(Lock& lock)
+  {
+    this->signal_all(lock);
+  }
+
+  // Signal all waiters.
+  template <typename Lock>
+  void signal_all(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    (void)lock;
+    state_ |= 1;
+    ::SetEvent(events_[0]);
+  }
+
+  // Unlock the mutex and signal one waiter.
+  template <typename Lock>
+  void unlock_and_signal_one(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    state_ |= 1;
+    bool have_waiters = (state_ > 1);
+    lock.unlock();
+    if (have_waiters)
+      ::SetEvent(events_[1]);
+  }
+
+  // If there's a waiter, unlock the mutex and signal it.
+  template <typename Lock>
+  bool maybe_unlock_and_signal_one(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    state_ |= 1;
+    if (state_ > 1)
+    {
+      lock.unlock();
+      ::SetEvent(events_[1]);
+      return true;
+    }
+    return false;
+  }
+
+  // Reset the event.
+  template <typename Lock>
+  void clear(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    (void)lock;
+    ::ResetEvent(events_[0]);
+    state_ &= ~std::size_t(1);
+  }
+
+  // Wait for the event to become signalled.
+  template <typename Lock>
+  void wait(Lock& lock)
+  {
+    ASIO_ASSERT(lock.locked());
+    while ((state_ & 1) == 0)
+    {
+      state_ += 2;
+      lock.unlock();
+#if defined(ASIO_WINDOWS_APP)
+      ::WaitForMultipleObjectsEx(2, events_, false, INFINITE, false);
+#else // defined(ASIO_WINDOWS_APP)
+      ::WaitForMultipleObjects(2, events_, false, INFINITE);
+#endif // defined(ASIO_WINDOWS_APP)
+      lock.lock();
+      state_ -= 2;
+    }
+  }
+
+  // Timed wait for the event to become signalled.
+  template <typename Lock>
+  bool wait_for_usec(Lock& lock, long usec)
+  {
+    ASIO_ASSERT(lock.locked());
+    if ((state_ & 1) == 0)
+    {
+      state_ += 2;
+      lock.unlock();
+      DWORD msec = usec > 0 ? (usec < 1000 ? 1 : usec / 1000) : 0;
+#if defined(ASIO_WINDOWS_APP)
+      ::WaitForMultipleObjectsEx(2, events_, false, msec, false);
+#else // defined(ASIO_WINDOWS_APP)
+      ::WaitForMultipleObjects(2, events_, false, msec);
+#endif // defined(ASIO_WINDOWS_APP)
+      lock.lock();
+      state_ -= 2;
+    }
+    return (state_ & 1) != 0;
+  }
+
+private:
+  HANDLE events_[2];
+  std::size_t state_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/win_event.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_WINDOWS)
+
+#endif // ASIO_DETAIL_WIN_EVENT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_fd_set_adapter.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_fd_set_adapter.hpp
new file mode 100644
index 00000000000..cc8bde9c76c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_fd_set_adapter.hpp
@@ -0,0 +1,149 @@
+//
+// detail/win_fd_set_adapter.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_FD_SET_ADAPTER_HPP
+#define ASIO_DETAIL_WIN_FD_SET_ADAPTER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/reactor_op_queue.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Adapts the FD_SET type to meet the Descriptor_Set concept's requirements.
+class win_fd_set_adapter : noncopyable
+{
+public:
+  enum { default_fd_set_size = 1024 };
+
+  win_fd_set_adapter()
+    : capacity_(default_fd_set_size),
+      max_descriptor_(invalid_socket)
+  {
+    fd_set_ = static_cast<win_fd_set*>(::operator new(
+          sizeof(win_fd_set) - sizeof(SOCKET)
+          + sizeof(SOCKET) * (capacity_)));
+    fd_set_->fd_count = 0;
+  }
+
+  ~win_fd_set_adapter()
+  {
+    ::operator delete(fd_set_);
+  }
+
+  void reset()
+  {
+    fd_set_->fd_count = 0;
+    max_descriptor_ = invalid_socket;
+  }
+
+  bool set(socket_type descriptor)
+  {
+    for (u_int i = 0; i < fd_set_->fd_count; ++i)
+      if (fd_set_->fd_array[i] == descriptor)
+        return true;
+
+    reserve(fd_set_->fd_count + 1);
+    fd_set_->fd_array[fd_set_->fd_count++] = descriptor;
+    return true;
+  }
+
+  void set(reactor_op_queue<socket_type>& operations, op_queue<operation>&)
+  {
+    reactor_op_queue<socket_type>::iterator i = operations.begin();
+    while (i != operations.end())
+    {
+      reactor_op_queue<socket_type>::iterator op_iter = i++;
+      reserve(fd_set_->fd_count + 1);
+      fd_set_->fd_array[fd_set_->fd_count++] = op_iter->first;
+    }
+  }
+
+  bool is_set(socket_type descriptor) const
+  {
+    return !!__WSAFDIsSet(descriptor,
+        const_cast<fd_set*>(reinterpret_cast<const fd_set*>(fd_set_)));
+  }
+
+  operator fd_set*()
+  {
+    return reinterpret_cast<fd_set*>(fd_set_);
+  }
+
+  socket_type max_descriptor() const
+  {
+    return max_descriptor_;
+  }
+
+  void perform(reactor_op_queue<socket_type>& operations,
+      op_queue<operation>& ops) const
+  {
+    for (u_int i = 0; i < fd_set_->fd_count; ++i)
+      operations.perform_operations(fd_set_->fd_array[i], ops);
+  }
+
+private:
+  // This structure is defined to be compatible with the Windows API fd_set
+  // structure, but without being dependent on the value of FD_SETSIZE. We use
+  // the "struct hack" to allow the number of descriptors to be varied at
+  // runtime.
+  struct win_fd_set
+  {
+    u_int fd_count;
+    SOCKET fd_array[1];
+  };
+
+  // Increase the fd_set_ capacity to at least the specified number of elements.
+  void reserve(u_int n)
+  {
+    if (n <= capacity_)
+      return;
+
+    u_int new_capacity = capacity_ + capacity_ / 2;
+    if (new_capacity < n)
+      new_capacity = n;
+
+    win_fd_set* new_fd_set = static_cast<win_fd_set*>(::operator new(
+          sizeof(win_fd_set) - sizeof(SOCKET)
+          + sizeof(SOCKET) * (new_capacity)));
+
+    new_fd_set->fd_count = fd_set_->fd_count;
+    for (u_int i = 0; i < fd_set_->fd_count; ++i)
+      new_fd_set->fd_array[i] = fd_set_->fd_array[i];
+
+    ::operator delete(fd_set_);
+    fd_set_ = new_fd_set;
+    capacity_ = new_capacity;
+  }
+
+  win_fd_set* fd_set_;
+  u_int capacity_;
+  socket_type max_descriptor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+#endif // ASIO_DETAIL_WIN_FD_SET_ADAPTER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_fenced_block.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_fenced_block.hpp
new file mode 100644
index 00000000000..9fa84653f5b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_fenced_block.hpp
@@ -0,0 +1,90 @@
+//
+// detail/win_fenced_block.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_FENCED_BLOCK_HPP
+#define ASIO_DETAIL_WIN_FENCED_BLOCK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS) && !defined(UNDER_CE)
+
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/noncopyable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class win_fenced_block
+  : private noncopyable
+{
+public:
+  enum half_t { half };
+  enum full_t { full };
+
+  // Constructor for a half fenced block.
+  explicit win_fenced_block(half_t)
+  {
+  }
+
+  // Constructor for a full fenced block.
+  explicit win_fenced_block(full_t)
+  {
+#if defined(__BORLANDC__)
+    LONG barrier = 0;
+    ::InterlockedExchange(&barrier, 1);
+#elif defined(ASIO_MSVC) \
+  && ((ASIO_MSVC < 1400) || !defined(MemoryBarrier))
+# if defined(_M_IX86)
+#  pragma warning(push)
+#  pragma warning(disable:4793)
+    LONG barrier;
+    __asm { xchg barrier, eax }
+#  pragma warning(pop)
+# endif // defined(_M_IX86)
+#else
+    MemoryBarrier();
+#endif
+  }
+
+  // Destructor.
+  ~win_fenced_block()
+  {
+#if defined(__BORLANDC__)
+    LONG barrier = 0;
+    ::InterlockedExchange(&barrier, 1);
+#elif defined(ASIO_MSVC) \
+  && ((ASIO_MSVC < 1400) || !defined(MemoryBarrier))
+# if defined(_M_IX86)
+#  pragma warning(push)
+#  pragma warning(disable:4793)
+    LONG barrier;
+    __asm { xchg barrier, eax }
+#  pragma warning(pop)
+# endif // defined(_M_IX86)
+#else
+    MemoryBarrier();
+#endif
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS) && !defined(UNDER_CE)
+
+#endif // ASIO_DETAIL_WIN_FENCED_BLOCK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_global.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_global.hpp
new file mode 100644
index 00000000000..2d5ce754e21
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_global.hpp
@@ -0,0 +1,71 @@
+//
+// detail/win_global.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_GLOBAL_HPP
+#define ASIO_DETAIL_WIN_GLOBAL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/static_mutex.hpp"
+#include "asio/detail/tss_ptr.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T>
+struct win_global_impl
+{
+  // Destructor automatically cleans up the global.
+  ~win_global_impl()
+  {
+    delete ptr_;
+  }
+
+  static win_global_impl instance_;
+  static static_mutex mutex_;
+  T* ptr_;
+  static tss_ptr<T> tss_ptr_;
+};
+
+template <typename T>
+win_global_impl<T> win_global_impl<T>::instance_ = { 0 };
+
+template <typename T>
+static_mutex win_global_impl<T>::mutex_ = ASIO_STATIC_MUTEX_INIT;
+
+template <typename T>
+tss_ptr<T> win_global_impl<T>::tss_ptr_;
+
+template <typename T>
+T& win_global()
+{
+  if (static_cast<T*>(win_global_impl<T>::tss_ptr_) == 0)
+  {
+    win_global_impl<T>::mutex_.init();
+    static_mutex::scoped_lock lock(win_global_impl<T>::mutex_);
+    if (win_global_impl<T>::instance_.ptr_ == 0)
+      win_global_impl<T>::instance_.ptr_ = new T;
+    win_global_impl<T>::tss_ptr_ = win_global_impl<T>::instance_.ptr_;
+  }
+
+  return *win_global_impl<T>::tss_ptr_;
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_WIN_GLOBAL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_handle_read_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_handle_read_op.hpp
new file mode 100644
index 00000000000..a54e360847c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_handle_read_op.hpp
@@ -0,0 +1,113 @@
+//
+// detail/win_iocp_handle_read_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2008 Rep Invariant Systems, Inc. (info@repinvariant.com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_HANDLE_READ_OP_HPP
+#define ASIO_DETAIL_WIN_IOCP_HANDLE_READ_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/error.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/operation.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename MutableBufferSequence, typename Handler, typename IoExecutor>
+class win_iocp_handle_read_op : public operation
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_handle_read_op);
+
+  win_iocp_handle_read_op(const MutableBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+    : operation(&win_iocp_handle_read_op::do_complete),
+      buffers_(buffers),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& result_ec,
+      std::size_t bytes_transferred)
+  {
+    asio::error_code ec(result_ec);
+
+    // Take ownership of the operation object.
+    win_iocp_handle_read_op* o(static_cast<win_iocp_handle_read_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+    if (owner)
+    {
+      // Check whether buffers are still valid.
+      buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::validate(o->buffers_);
+    }
+#endif // defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+
+    // Map non-portable errors to their portable counterparts.
+    if (ec.value() == ERROR_HANDLE_EOF)
+      ec = asio::error::eof;
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, ec, bytes_transferred);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  MutableBufferSequence buffers_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_HANDLE_READ_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_handle_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_handle_service.hpp
new file mode 100644
index 00000000000..63274549295
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_handle_service.hpp
@@ -0,0 +1,335 @@
+//
+// detail/win_iocp_handle_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2008 Rep Invariant Systems, Inc. (info@repinvariant.com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_HANDLE_SERVICE_HPP
+#define ASIO_DETAIL_WIN_IOCP_HANDLE_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/cstdint.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/operation.hpp"
+#include "asio/detail/win_iocp_handle_read_op.hpp"
+#include "asio/detail/win_iocp_handle_write_op.hpp"
+#include "asio/detail/win_iocp_io_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class win_iocp_handle_service :
+  public execution_context_service_base<win_iocp_handle_service>
+{
+public:
+  // The native type of a stream handle.
+  typedef HANDLE native_handle_type;
+
+  // The implementation type of the stream handle.
+  class implementation_type
+  {
+  public:
+    // Default constructor.
+    implementation_type()
+      : handle_(INVALID_HANDLE_VALUE),
+        safe_cancellation_thread_id_(0),
+        next_(0),
+        prev_(0)
+    {
+    }
+
+  private:
+    // Only this service will have access to the internal values.
+    friend class win_iocp_handle_service;
+
+    // The native stream handle representation.
+    native_handle_type handle_;
+
+    // The ID of the thread from which it is safe to cancel asynchronous
+    // operations. 0 means no asynchronous operations have been started yet.
+    // ~0 means asynchronous operations have been started from more than one
+    // thread, and cancellation is not supported for the handle.
+    DWORD safe_cancellation_thread_id_;
+
+    // Pointers to adjacent handle implementations in linked list.
+    implementation_type* next_;
+    implementation_type* prev_;
+  };
+
+  ASIO_DECL win_iocp_handle_service(execution_context& context);
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Construct a new handle implementation.
+  ASIO_DECL void construct(implementation_type& impl);
+
+  // Move-construct a new handle implementation.
+  ASIO_DECL void move_construct(implementation_type& impl,
+      implementation_type& other_impl);
+
+  // Move-assign from another handle implementation.
+  ASIO_DECL void move_assign(implementation_type& impl,
+      win_iocp_handle_service& other_service,
+      implementation_type& other_impl);
+
+  // Destroy a handle implementation.
+  ASIO_DECL void destroy(implementation_type& impl);
+
+  // Assign a native handle to a handle implementation.
+  ASIO_DECL asio::error_code assign(implementation_type& impl,
+      const native_handle_type& handle, asio::error_code& ec);
+
+  // Determine whether the handle is open.
+  bool is_open(const implementation_type& impl) const
+  {
+    return impl.handle_ != INVALID_HANDLE_VALUE;
+  }
+
+  // Destroy a handle implementation.
+  ASIO_DECL asio::error_code close(implementation_type& impl,
+      asio::error_code& ec);
+
+  // Get the native handle representation.
+  native_handle_type native_handle(const implementation_type& impl) const
+  {
+    return impl.handle_;
+  }
+
+  // Cancel all operations associated with the handle.
+  ASIO_DECL asio::error_code cancel(implementation_type& impl,
+      asio::error_code& ec);
+
+  // Write the given data. Returns the number of bytes written.
+  template <typename ConstBufferSequence>
+  size_t write_some(implementation_type& impl,
+      const ConstBufferSequence& buffers, asio::error_code& ec)
+  {
+    return write_some_at(impl, 0, buffers, ec);
+  }
+
+  // Write the given data at the specified offset. Returns the number of bytes
+  // written.
+  template <typename ConstBufferSequence>
+  size_t write_some_at(implementation_type& impl, uint64_t offset,
+      const ConstBufferSequence& buffers, asio::error_code& ec)
+  {
+    asio::const_buffer buffer =
+      buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence>::first(buffers);
+
+    return do_write(impl, offset, buffer, ec);
+  }
+
+  // Start an asynchronous write. The data being written must be valid for the
+  // lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_write_some(implementation_type& impl,
+      const ConstBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_handle_write_op<
+        ConstBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((iocp_service_.context(), *p.p, "handle", &impl,
+          reinterpret_cast<uintmax_t>(impl.handle_), "async_write_some"));
+
+    start_write_op(impl, 0,
+        buffer_sequence_adapter<asio::const_buffer,
+          ConstBufferSequence>::first(buffers), p.p);
+    p.v = p.p = 0;
+  }
+
+  // Start an asynchronous write at a specified offset. The data being written
+  // must be valid for the lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_write_some_at(implementation_type& impl,
+      uint64_t offset, const ConstBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_handle_write_op<
+        ConstBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((iocp_service_.context(), *p.p, "handle", &impl,
+          reinterpret_cast<uintmax_t>(impl.handle_), "async_write_some_at"));
+
+    start_write_op(impl, offset,
+        buffer_sequence_adapter<asio::const_buffer,
+          ConstBufferSequence>::first(buffers), p.p);
+    p.v = p.p = 0;
+  }
+
+  // Read some data. Returns the number of bytes received.
+  template <typename MutableBufferSequence>
+  size_t read_some(implementation_type& impl,
+      const MutableBufferSequence& buffers, asio::error_code& ec)
+  {
+    return read_some_at(impl, 0, buffers, ec);
+  }
+
+  // Read some data at a specified offset. Returns the number of bytes received.
+  template <typename MutableBufferSequence>
+  size_t read_some_at(implementation_type& impl, uint64_t offset,
+      const MutableBufferSequence& buffers, asio::error_code& ec)
+  {
+    asio::mutable_buffer buffer =
+      buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence>::first(buffers);
+
+    return do_read(impl, offset, buffer, ec);
+  }
+
+  // Start an asynchronous read. The buffer for the data being received must be
+  // valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_read_some(implementation_type& impl,
+      const MutableBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_handle_read_op<
+        MutableBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((iocp_service_.context(), *p.p, "handle", &impl,
+          reinterpret_cast<uintmax_t>(impl.handle_), "async_read_some"));
+
+    start_read_op(impl, 0,
+        buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::first(buffers), p.p);
+    p.v = p.p = 0;
+  }
+
+  // Start an asynchronous read at a specified offset. The buffer for the data
+  // being received must be valid for the lifetime of the asynchronous
+  // operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_read_some_at(implementation_type& impl,
+      uint64_t offset, const MutableBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_handle_read_op<
+        MutableBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((iocp_service_.context(), *p.p, "handle", &impl,
+          reinterpret_cast<uintmax_t>(impl.handle_), "async_read_some_at"));
+
+    start_read_op(impl, offset,
+        buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::first(buffers), p.p);
+    p.v = p.p = 0;
+  }
+
+private:
+  // Prevent the use of the null_buffers type with this service.
+  size_t write_some(implementation_type& impl,
+      const null_buffers& buffers, asio::error_code& ec);
+  size_t write_some_at(implementation_type& impl, uint64_t offset,
+      const null_buffers& buffers, asio::error_code& ec);
+  template <typename Handler, typename IoExecutor>
+  void async_write_some(implementation_type& impl,
+      const null_buffers& buffers, Handler& handler,
+      const IoExecutor& io_ex);
+  template <typename Handler, typename IoExecutor>
+  void async_write_some_at(implementation_type& impl, uint64_t offset,
+      const null_buffers& buffers, Handler& handler, const IoExecutor& io_ex);
+  size_t read_some(implementation_type& impl,
+      const null_buffers& buffers, asio::error_code& ec);
+  size_t read_some_at(implementation_type& impl, uint64_t offset,
+      const null_buffers& buffers, asio::error_code& ec);
+  template <typename Handler, typename IoExecutor>
+  void async_read_some(implementation_type& impl,
+      const null_buffers& buffers, Handler& handler,
+      const IoExecutor& io_ex);
+  template <typename Handler, typename IoExecutor>
+  void async_read_some_at(implementation_type& impl, uint64_t offset,
+      const null_buffers& buffers, Handler& handler, const IoExecutor& io_ex);
+
+  // Helper class for waiting for synchronous operations to complete.
+  class overlapped_wrapper;
+
+  // Helper function to perform a synchronous write operation.
+  ASIO_DECL size_t do_write(implementation_type& impl,
+      uint64_t offset, const asio::const_buffer& buffer,
+      asio::error_code& ec);
+
+  // Helper function to start a write operation.
+  ASIO_DECL void start_write_op(implementation_type& impl,
+      uint64_t offset, const asio::const_buffer& buffer,
+      operation* op);
+
+  // Helper function to perform a synchronous write operation.
+  ASIO_DECL size_t do_read(implementation_type& impl,
+      uint64_t offset, const asio::mutable_buffer& buffer,
+      asio::error_code& ec);
+
+  // Helper function to start a read operation.
+  ASIO_DECL void start_read_op(implementation_type& impl,
+      uint64_t offset, const asio::mutable_buffer& buffer,
+      operation* op);
+
+  // Update the ID of the thread from which cancellation is safe.
+  ASIO_DECL void update_cancellation_thread_id(implementation_type& impl);
+
+  // Helper function to close a handle when the associated object is being
+  // destroyed.
+  ASIO_DECL void close_for_destruction(implementation_type& impl);
+
+  // The IOCP service used for running asynchronous operations and dispatching
+  // handlers.
+  win_iocp_io_context& iocp_service_;
+
+  // Mutex to protect access to the linked list of implementations.
+  mutex mutex_;
+
+  // The head of a linked list of all implementations.
+  implementation_type* impl_list_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/win_iocp_handle_service.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_HANDLE_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_handle_write_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_handle_write_op.hpp
new file mode 100644
index 00000000000..9bb88141c33
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_handle_write_op.hpp
@@ -0,0 +1,106 @@
+//
+// detail/win_iocp_handle_write_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2008 Rep Invariant Systems, Inc. (info@repinvariant.com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_HANDLE_WRITE_OP_HPP
+#define ASIO_DETAIL_WIN_IOCP_HANDLE_WRITE_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/error.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/operation.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+class win_iocp_handle_write_op : public operation
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_handle_write_op);
+
+  win_iocp_handle_write_op(const ConstBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+    : operation(&win_iocp_handle_write_op::do_complete),
+      buffers_(buffers),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& ec, std::size_t bytes_transferred)
+  {
+    // Take ownership of the operation object.
+    win_iocp_handle_write_op* o(static_cast<win_iocp_handle_write_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+    if (owner)
+    {
+      // Check whether buffers are still valid.
+      buffer_sequence_adapter<asio::const_buffer,
+          ConstBufferSequence>::validate(o->buffers_);
+    }
+#endif // defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, ec, bytes_transferred);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  ConstBufferSequence buffers_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_HANDLE_WRITE_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_io_context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_io_context.hpp
new file mode 100644
index 00000000000..e2094164803
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_io_context.hpp
@@ -0,0 +1,338 @@
+//
+// detail/win_iocp_io_context.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_IO_CONTEXT_HPP
+#define ASIO_DETAIL_WIN_IOCP_IO_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/limits.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/scoped_ptr.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/thread.hpp"
+#include "asio/detail/thread_context.hpp"
+#include "asio/detail/timer_queue_base.hpp"
+#include "asio/detail/timer_queue_set.hpp"
+#include "asio/detail/wait_op.hpp"
+#include "asio/detail/win_iocp_operation.hpp"
+#include "asio/detail/win_iocp_thread_info.hpp"
+#include "asio/execution_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class wait_op;
+
+class win_iocp_io_context
+  : public execution_context_service_base<win_iocp_io_context>,
+    public thread_context
+{
+public:
+  // Constructor. Specifies a concurrency hint that is passed through to the
+  // underlying I/O completion port.
+  ASIO_DECL win_iocp_io_context(asio::execution_context& ctx,
+      int concurrency_hint = -1, bool own_thread = true);
+
+  // Destructor.
+  ASIO_DECL ~win_iocp_io_context();
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Initialise the task. Nothing to do here.
+  void init_task()
+  {
+  }
+
+  // Register a handle with the IO completion port.
+  ASIO_DECL asio::error_code register_handle(
+      HANDLE handle, asio::error_code& ec);
+
+  // Run the event loop until stopped or no more work.
+  ASIO_DECL size_t run(asio::error_code& ec);
+
+  // Run until stopped or one operation is performed.
+  ASIO_DECL size_t run_one(asio::error_code& ec);
+
+  // Run until timeout, interrupted, or one operation is performed.
+  ASIO_DECL size_t wait_one(long usec, asio::error_code& ec);
+
+  // Poll for operations without blocking.
+  ASIO_DECL size_t poll(asio::error_code& ec);
+
+  // Poll for one operation without blocking.
+  ASIO_DECL size_t poll_one(asio::error_code& ec);
+
+  // Stop the event processing loop.
+  ASIO_DECL void stop();
+
+  // Determine whether the io_context is stopped.
+  bool stopped() const
+  {
+    return ::InterlockedExchangeAdd(&stopped_, 0) != 0;
+  }
+
+  // Restart in preparation for a subsequent run invocation.
+  void restart()
+  {
+    ::InterlockedExchange(&stopped_, 0);
+  }
+
+  // Notify that some work has started.
+  void work_started()
+  {
+    ::InterlockedIncrement(&outstanding_work_);
+  }
+
+  // Notify that some work has finished.
+  void work_finished()
+  {
+    if (::InterlockedDecrement(&outstanding_work_) == 0)
+      stop();
+  }
+
+  // Return whether a handler can be dispatched immediately.
+  bool can_dispatch()
+  {
+    return thread_call_stack::contains(this) != 0;
+  }
+
+  // Request invocation of the given operation and return immediately. Assumes
+  // that work_started() has not yet been called for the operation.
+  void post_immediate_completion(win_iocp_operation* op, bool)
+  {
+    work_started();
+    post_deferred_completion(op);
+  }
+
+  // Request invocation of the given operation and return immediately. Assumes
+  // that work_started() was previously called for the operation.
+  ASIO_DECL void post_deferred_completion(win_iocp_operation* op);
+
+  // Request invocation of the given operation and return immediately. Assumes
+  // that work_started() was previously called for the operations.
+  ASIO_DECL void post_deferred_completions(
+      op_queue<win_iocp_operation>& ops);
+
+  // Request invocation of the given operation using the thread-private queue
+  // and return immediately. Assumes that work_started() has not yet been
+  // called for the operation.
+  void post_private_immediate_completion(win_iocp_operation* op)
+  {
+    post_immediate_completion(op, false);
+  }
+
+  // Request invocation of the given operation using the thread-private queue
+  // and return immediately. Assumes that work_started() was previously called
+  // for the operation.
+  void post_private_deferred_completion(win_iocp_operation* op)
+  {
+    post_deferred_completion(op);
+  }
+
+  // Enqueue the given operation following a failed attempt to dispatch the
+  // operation for immediate invocation.
+  void do_dispatch(operation* op)
+  {
+    post_immediate_completion(op, false);
+  }
+
+  // Process unfinished operations as part of a shutdown operation. Assumes
+  // that work_started() was previously called for the operations.
+  ASIO_DECL void abandon_operations(op_queue<operation>& ops);
+
+  // Called after starting an overlapped I/O operation that did not complete
+  // immediately. The caller must have already called work_started() prior to
+  // starting the operation.
+  ASIO_DECL void on_pending(win_iocp_operation* op);
+
+  // Called after starting an overlapped I/O operation that completed
+  // immediately. The caller must have already called work_started() prior to
+  // starting the operation.
+  ASIO_DECL void on_completion(win_iocp_operation* op,
+      DWORD last_error = 0, DWORD bytes_transferred = 0);
+
+  // Called after starting an overlapped I/O operation that completed
+  // immediately. The caller must have already called work_started() prior to
+  // starting the operation.
+  ASIO_DECL void on_completion(win_iocp_operation* op,
+      const asio::error_code& ec, DWORD bytes_transferred = 0);
+
+  // Add a new timer queue to the service.
+  template <typename Time_Traits>
+  void add_timer_queue(timer_queue<Time_Traits>& timer_queue);
+
+  // Remove a timer queue from the service.
+  template <typename Time_Traits>
+  void remove_timer_queue(timer_queue<Time_Traits>& timer_queue);
+
+  // Schedule a new operation in the given timer queue to expire at the
+  // specified absolute time.
+  template <typename Time_Traits>
+  void schedule_timer(timer_queue<Time_Traits>& queue,
+      const typename Time_Traits::time_type& time,
+      typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op);
+
+  // Cancel the timer associated with the given token. Returns the number of
+  // handlers that have been posted or dispatched.
+  template <typename Time_Traits>
+  std::size_t cancel_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& timer,
+      std::size_t max_cancelled = (std::numeric_limits<std::size_t>::max)());
+
+  // Move the timer operations associated with the given timer.
+  template <typename Time_Traits>
+  void move_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& to,
+      typename timer_queue<Time_Traits>::per_timer_data& from);
+
+  // Get the concurrency hint that was used to initialise the io_context.
+  int concurrency_hint() const
+  {
+    return concurrency_hint_;
+  }
+
+private:
+#if defined(WINVER) && (WINVER < 0x0500)
+  typedef DWORD dword_ptr_t;
+  typedef ULONG ulong_ptr_t;
+#else // defined(WINVER) && (WINVER < 0x0500)
+  typedef DWORD_PTR dword_ptr_t;
+  typedef ULONG_PTR ulong_ptr_t;
+#endif // defined(WINVER) && (WINVER < 0x0500)
+
+  // Dequeues at most one operation from the I/O completion port, and then
+  // executes it. Returns the number of operations that were dequeued (i.e.
+  // either 0 or 1).
+  ASIO_DECL size_t do_one(DWORD msec, asio::error_code& ec);
+
+  // Helper to calculate the GetQueuedCompletionStatus timeout.
+  ASIO_DECL static DWORD get_gqcs_timeout();
+
+  // Helper function to add a new timer queue.
+  ASIO_DECL void do_add_timer_queue(timer_queue_base& queue);
+
+  // Helper function to remove a timer queue.
+  ASIO_DECL void do_remove_timer_queue(timer_queue_base& queue);
+
+  // Called to recalculate and update the timeout.
+  ASIO_DECL void update_timeout();
+
+  // Helper class to call work_finished() on block exit.
+  struct work_finished_on_block_exit;
+
+  // Helper class for managing a HANDLE.
+  struct auto_handle
+  {
+    HANDLE handle;
+    auto_handle() : handle(0) {}
+    ~auto_handle() { if (handle) ::CloseHandle(handle); }
+  };
+
+  // The IO completion port used for queueing operations.
+  auto_handle iocp_;
+
+  // The count of unfinished work.
+  long outstanding_work_;
+
+  // Flag to indicate whether the event loop has been stopped.
+  mutable long stopped_;
+
+  // Flag to indicate whether there is an in-flight stop event. Every event
+  // posted using PostQueuedCompletionStatus consumes non-paged pool, so to
+  // avoid exhausting this resouce we limit the number of outstanding events.
+  long stop_event_posted_;
+
+  // Flag to indicate whether the service has been shut down.
+  long shutdown_;
+
+  enum
+  {
+    // Timeout to use with GetQueuedCompletionStatus on older versions of
+    // Windows. Some versions of windows have a "bug" where a call to
+    // GetQueuedCompletionStatus can appear stuck even though there are events
+    // waiting on the queue. Using a timeout helps to work around the issue.
+    default_gqcs_timeout = 500,
+
+    // Maximum waitable timer timeout, in milliseconds.
+    max_timeout_msec = 5 * 60 * 1000,
+
+    // Maximum waitable timer timeout, in microseconds.
+    max_timeout_usec = max_timeout_msec * 1000,
+
+    // Completion key value used to wake up a thread to dispatch timers or
+    // completed operations.
+    wake_for_dispatch = 1,
+
+    // Completion key value to indicate that an operation has posted with the
+    // original last_error and bytes_transferred values stored in the fields of
+    // the OVERLAPPED structure.
+    overlapped_contains_result = 2
+  };
+
+  // Timeout to use with GetQueuedCompletionStatus.
+  const DWORD gqcs_timeout_;
+
+  // Helper class to run the scheduler in its own thread.
+  struct thread_function;
+  friend struct thread_function;
+
+  // Function object for processing timeouts in a background thread.
+  struct timer_thread_function;
+  friend struct timer_thread_function;
+
+  // Background thread used for processing timeouts.
+  scoped_ptr<thread> timer_thread_;
+
+  // A waitable timer object used for waiting for timeouts.
+  auto_handle waitable_timer_;
+
+  // Non-zero if timers or completed operations need to be dispatched.
+  long dispatch_required_;
+
+  // Mutex for protecting access to the timer queues and completed operations.
+  mutex dispatch_mutex_;
+
+  // The timer queues.
+  timer_queue_set timer_queues_;
+
+  // The operations that are ready to dispatch.
+  op_queue<win_iocp_operation> completed_ops_;
+
+  // The concurrency hint used to initialise the io_context.
+  const int concurrency_hint_;
+
+  // The thread that is running the io_context.
+  scoped_ptr<thread> thread_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/detail/impl/win_iocp_io_context.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/win_iocp_io_context.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_IO_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_null_buffers_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_null_buffers_op.hpp
new file mode 100644
index 00000000000..99a31665732
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_null_buffers_op.hpp
@@ -0,0 +1,123 @@
+//
+// detail/win_iocp_null_buffers_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_NULL_BUFFERS_OP_HPP
+#define ASIO_DETAIL_WIN_IOCP_NULL_BUFFERS_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler, typename IoExecutor>
+class win_iocp_null_buffers_op : public reactor_op
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_null_buffers_op);
+
+  win_iocp_null_buffers_op(socket_ops::weak_cancel_token_type cancel_token,
+      Handler& handler, const IoExecutor& io_ex)
+    : reactor_op(&win_iocp_null_buffers_op::do_perform,
+        &win_iocp_null_buffers_op::do_complete),
+      cancel_token_(cancel_token),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static status do_perform(reactor_op*)
+  {
+    return done;
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& result_ec,
+      std::size_t bytes_transferred)
+  {
+    asio::error_code ec(result_ec);
+
+    // Take ownership of the operation object.
+    win_iocp_null_buffers_op* o(static_cast<win_iocp_null_buffers_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // The reactor may have stored a result in the operation object.
+    if (o->ec_)
+      ec = o->ec_;
+
+    // Map non-portable errors to their portable counterparts.
+    if (ec.value() == ERROR_NETNAME_DELETED)
+    {
+      if (o->cancel_token_.expired())
+        ec = asio::error::operation_aborted;
+      else
+        ec = asio::error::connection_reset;
+    }
+    else if (ec.value() == ERROR_PORT_UNREACHABLE)
+    {
+      ec = asio::error::connection_refused;
+    }
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, ec, bytes_transferred);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  socket_ops::weak_cancel_token_type cancel_token_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_NULL_BUFFERS_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_operation.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_operation.hpp
new file mode 100644
index 00000000000..34d31987f27
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_operation.hpp
@@ -0,0 +1,96 @@
+//
+// detail/win_iocp_operation.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_OPERATION_HPP
+#define ASIO_DETAIL_WIN_IOCP_OPERATION_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/handler_tracking.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/error_code.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class win_iocp_io_context;
+
+// Base class for all operations. A function pointer is used instead of virtual
+// functions to avoid the associated overhead.
+class win_iocp_operation
+  : public OVERLAPPED
+    ASIO_ALSO_INHERIT_TRACKED_HANDLER
+{
+public:
+  typedef win_iocp_operation operation_type;
+
+  void complete(void* owner, const asio::error_code& ec,
+      std::size_t bytes_transferred)
+  {
+    func_(owner, this, ec, bytes_transferred);
+  }
+
+  void destroy()
+  {
+    func_(0, this, asio::error_code(), 0);
+  }
+
+protected:
+  typedef void (*func_type)(
+      void*, win_iocp_operation*,
+      const asio::error_code&, std::size_t);
+
+  win_iocp_operation(func_type func)
+    : next_(0),
+      func_(func)
+  {
+    reset();
+  }
+
+  // Prevents deletion through this type.
+  ~win_iocp_operation()
+  {
+  }
+
+  void reset()
+  {
+    Internal = 0;
+    InternalHigh = 0;
+    Offset = 0;
+    OffsetHigh = 0;
+    hEvent = 0;
+    ready_ = 0;
+  }
+
+private:
+  friend class op_queue_access;
+  friend class win_iocp_io_context;
+  win_iocp_operation* next_;
+  func_type func_;
+  long ready_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_OPERATION_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_overlapped_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_overlapped_op.hpp
new file mode 100644
index 00000000000..5a28acf019c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_overlapped_op.hpp
@@ -0,0 +1,92 @@
+//
+// detail/win_iocp_overlapped_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_OVERLAPPED_OP_HPP
+#define ASIO_DETAIL_WIN_IOCP_OVERLAPPED_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/error.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/operation.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler, typename IoExecutor>
+class win_iocp_overlapped_op : public operation
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_overlapped_op);
+
+  win_iocp_overlapped_op(Handler& handler, const IoExecutor& io_ex)
+    : operation(&win_iocp_overlapped_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& ec, std::size_t bytes_transferred)
+  {
+    // Take ownership of the operation object.
+    win_iocp_overlapped_op* o(static_cast<win_iocp_overlapped_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, ec, bytes_transferred);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_OVERLAPPED_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_overlapped_ptr.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_overlapped_ptr.hpp
new file mode 100644
index 00000000000..e1ee5b02190
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_overlapped_ptr.hpp
@@ -0,0 +1,159 @@
+//
+// detail/win_iocp_overlapped_ptr.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_OVERLAPPED_PTR_HPP
+#define ASIO_DETAIL_WIN_IOCP_OVERLAPPED_PTR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/io_context.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/io_object_executor.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/win_iocp_overlapped_op.hpp"
+#include "asio/detail/win_iocp_io_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Wraps a handler to create an OVERLAPPED object for use with overlapped I/O.
+class win_iocp_overlapped_ptr
+  : private noncopyable
+{
+public:
+  // Construct an empty win_iocp_overlapped_ptr.
+  win_iocp_overlapped_ptr()
+    : ptr_(0),
+      iocp_service_(0)
+  {
+  }
+
+  // Construct an win_iocp_overlapped_ptr to contain the specified handler.
+  template <typename Executor, typename Handler>
+  explicit win_iocp_overlapped_ptr(const Executor& ex,
+      ASIO_MOVE_ARG(Handler) handler)
+    : ptr_(0),
+      iocp_service_(0)
+  {
+    this->reset(ex, ASIO_MOVE_CAST(Handler)(handler));
+  }
+
+  // Destructor automatically frees the OVERLAPPED object unless released.
+  ~win_iocp_overlapped_ptr()
+  {
+    reset();
+  }
+
+  // Reset to empty.
+  void reset()
+  {
+    if (ptr_)
+    {
+      ptr_->destroy();
+      ptr_ = 0;
+      iocp_service_->work_finished();
+      iocp_service_ = 0;
+    }
+  }
+
+  // Reset to contain the specified handler, freeing any current OVERLAPPED
+  // object.
+  template <typename Executor, typename Handler>
+  void reset(const Executor& ex, Handler handler)
+  {
+    const bool native = is_same<Executor, io_context::executor_type>::value;
+    win_iocp_io_context* iocp_service = this->get_iocp_service(ex);
+
+    typedef win_iocp_overlapped_op<Handler, io_object_executor<Executor> > op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_object_executor<Executor>(ex, native));
+
+    ASIO_HANDLER_CREATION((ex.context(), *p.p,
+          "iocp_service", iocp_service, 0, "overlapped"));
+
+    iocp_service->work_started();
+    reset();
+    ptr_ = p.p;
+    p.v = p.p = 0;
+    iocp_service_ = iocp_service;
+  }
+
+  // Get the contained OVERLAPPED object.
+  OVERLAPPED* get()
+  {
+    return ptr_;
+  }
+
+  // Get the contained OVERLAPPED object.
+  const OVERLAPPED* get() const
+  {
+    return ptr_;
+  }
+
+  // Release ownership of the OVERLAPPED object.
+  OVERLAPPED* release()
+  {
+    if (ptr_)
+      iocp_service_->on_pending(ptr_);
+
+    OVERLAPPED* tmp = ptr_;
+    ptr_ = 0;
+    iocp_service_ = 0;
+    return tmp;
+  }
+
+  // Post completion notification for overlapped operation. Releases ownership.
+  void complete(const asio::error_code& ec,
+      std::size_t bytes_transferred)
+  {
+    if (ptr_)
+    {
+      iocp_service_->on_completion(ptr_, ec,
+          static_cast<DWORD>(bytes_transferred));
+      ptr_ = 0;
+      iocp_service_ = 0;
+    }
+  }
+
+private:
+  template <typename Executor>
+  static win_iocp_io_context* get_iocp_service(const Executor& ex)
+  {
+    return &use_service<win_iocp_io_context>(ex.context());
+  }
+
+  static win_iocp_io_context* get_iocp_service(
+      const io_context::executor_type& ex)
+  {
+    return &ex.context().impl_;
+  }
+
+  win_iocp_operation* ptr_;
+  win_iocp_io_context* iocp_service_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_OVERLAPPED_PTR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_serial_port_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_serial_port_service.hpp
new file mode 100644
index 00000000000..06ef407b003
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_serial_port_service.hpp
@@ -0,0 +1,232 @@
+//
+// detail/win_iocp_serial_port_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2008 Rep Invariant Systems, Inc. (info@repinvariant.com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_SERIAL_PORT_SERVICE_HPP
+#define ASIO_DETAIL_WIN_IOCP_SERIAL_PORT_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP) && defined(ASIO_HAS_SERIAL_PORT)
+
+#include <string>
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/detail/win_iocp_handle_service.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Extend win_iocp_handle_service to provide serial port support.
+class win_iocp_serial_port_service :
+  public execution_context_service_base<win_iocp_serial_port_service>
+{
+public:
+  // The native type of a serial port.
+  typedef win_iocp_handle_service::native_handle_type native_handle_type;
+
+  // The implementation type of the serial port.
+  typedef win_iocp_handle_service::implementation_type implementation_type;
+
+  // Constructor.
+  ASIO_DECL win_iocp_serial_port_service(execution_context& context);
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Construct a new serial port implementation.
+  void construct(implementation_type& impl)
+  {
+    handle_service_.construct(impl);
+  }
+
+  // Move-construct a new serial port implementation.
+  void move_construct(implementation_type& impl,
+      implementation_type& other_impl)
+  {
+    handle_service_.move_construct(impl, other_impl);
+  }
+
+  // Move-assign from another serial port implementation.
+  void move_assign(implementation_type& impl,
+      win_iocp_serial_port_service& other_service,
+      implementation_type& other_impl)
+  {
+    handle_service_.move_assign(impl,
+        other_service.handle_service_, other_impl);
+  }
+
+  // Destroy a serial port implementation.
+  void destroy(implementation_type& impl)
+  {
+    handle_service_.destroy(impl);
+  }
+
+  // Open the serial port using the specified device name.
+  ASIO_DECL asio::error_code open(implementation_type& impl,
+      const std::string& device, asio::error_code& ec);
+
+  // Assign a native handle to a serial port implementation.
+  asio::error_code assign(implementation_type& impl,
+      const native_handle_type& handle, asio::error_code& ec)
+  {
+    return handle_service_.assign(impl, handle, ec);
+  }
+
+  // Determine whether the serial port is open.
+  bool is_open(const implementation_type& impl) const
+  {
+    return handle_service_.is_open(impl);
+  }
+
+  // Destroy a serial port implementation.
+  asio::error_code close(implementation_type& impl,
+      asio::error_code& ec)
+  {
+    return handle_service_.close(impl, ec);
+  }
+
+  // Get the native serial port representation.
+  native_handle_type native_handle(implementation_type& impl)
+  {
+    return handle_service_.native_handle(impl);
+  }
+
+  // Cancel all operations associated with the handle.
+  asio::error_code cancel(implementation_type& impl,
+      asio::error_code& ec)
+  {
+    return handle_service_.cancel(impl, ec);
+  }
+
+  // Set an option on the serial port.
+  template <typename SettableSerialPortOption>
+  asio::error_code set_option(implementation_type& impl,
+      const SettableSerialPortOption& option, asio::error_code& ec)
+  {
+    return do_set_option(impl,
+        &win_iocp_serial_port_service::store_option<SettableSerialPortOption>,
+        &option, ec);
+  }
+
+  // Get an option from the serial port.
+  template <typename GettableSerialPortOption>
+  asio::error_code get_option(const implementation_type& impl,
+      GettableSerialPortOption& option, asio::error_code& ec) const
+  {
+    return do_get_option(impl,
+        &win_iocp_serial_port_service::load_option<GettableSerialPortOption>,
+        &option, ec);
+  }
+
+  // Send a break sequence to the serial port.
+  asio::error_code send_break(implementation_type&,
+      asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Write the given data. Returns the number of bytes sent.
+  template <typename ConstBufferSequence>
+  size_t write_some(implementation_type& impl,
+      const ConstBufferSequence& buffers, asio::error_code& ec)
+  {
+    return handle_service_.write_some(impl, buffers, ec);
+  }
+
+  // Start an asynchronous write. The data being written must be valid for the
+  // lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_write_some(implementation_type& impl,
+      const ConstBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    handle_service_.async_write_some(impl, buffers, handler, io_ex);
+  }
+
+  // Read some data. Returns the number of bytes received.
+  template <typename MutableBufferSequence>
+  size_t read_some(implementation_type& impl,
+      const MutableBufferSequence& buffers, asio::error_code& ec)
+  {
+    return handle_service_.read_some(impl, buffers, ec);
+  }
+
+  // Start an asynchronous read. The buffer for the data being received must be
+  // valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_read_some(implementation_type& impl,
+      const MutableBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    handle_service_.async_read_some(impl, buffers, handler, io_ex);
+  }
+
+private:
+  // Function pointer type for storing a serial port option.
+  typedef asio::error_code (*store_function_type)(
+      const void*, ::DCB&, asio::error_code&);
+
+  // Helper function template to store a serial port option.
+  template <typename SettableSerialPortOption>
+  static asio::error_code store_option(const void* option,
+      ::DCB& storage, asio::error_code& ec)
+  {
+    static_cast<const SettableSerialPortOption*>(option)->store(storage, ec);
+    return ec;
+  }
+
+  // Helper function to set a serial port option.
+  ASIO_DECL asio::error_code do_set_option(
+      implementation_type& impl, store_function_type store,
+      const void* option, asio::error_code& ec);
+
+  // Function pointer type for loading a serial port option.
+  typedef asio::error_code (*load_function_type)(
+      void*, const ::DCB&, asio::error_code&);
+
+  // Helper function template to load a serial port option.
+  template <typename GettableSerialPortOption>
+  static asio::error_code load_option(void* option,
+      const ::DCB& storage, asio::error_code& ec)
+  {
+    static_cast<GettableSerialPortOption*>(option)->load(storage, ec);
+    return ec;
+  }
+
+  // Helper function to get a serial port option.
+  ASIO_DECL asio::error_code do_get_option(
+      const implementation_type& impl, load_function_type load,
+      void* option, asio::error_code& ec) const;
+
+  // The implementation used for initiating asynchronous operations.
+  win_iocp_handle_service handle_service_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/win_iocp_serial_port_service.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_IOCP) && defined(ASIO_HAS_SERIAL_PORT)
+
+#endif // ASIO_DETAIL_WIN_IOCP_SERIAL_PORT_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_accept_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_accept_op.hpp
new file mode 100644
index 00000000000..c7da5c1dc01
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_accept_op.hpp
@@ -0,0 +1,306 @@
+//
+// detail/win_iocp_socket_accept_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_SOCKET_ACCEPT_OP_HPP
+#define ASIO_DETAIL_WIN_IOCP_SOCKET_ACCEPT_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/operation.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/win_iocp_socket_service_base.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Socket, typename Protocol,
+    typename Handler, typename IoExecutor>
+class win_iocp_socket_accept_op : public operation
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_socket_accept_op);
+
+  win_iocp_socket_accept_op(win_iocp_socket_service_base& socket_service,
+      socket_type socket, Socket& peer, const Protocol& protocol,
+      typename Protocol::endpoint* peer_endpoint,
+      bool enable_connection_aborted, Handler& handler, const IoExecutor& io_ex)
+    : operation(&win_iocp_socket_accept_op::do_complete),
+      socket_service_(socket_service),
+      socket_(socket),
+      peer_(peer),
+      protocol_(protocol),
+      peer_endpoint_(peer_endpoint),
+      enable_connection_aborted_(enable_connection_aborted),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  socket_holder& new_socket()
+  {
+    return new_socket_;
+  }
+
+  void* output_buffer()
+  {
+    return output_buffer_;
+  }
+
+  DWORD address_length()
+  {
+    return sizeof(sockaddr_storage_type) + 16;
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& result_ec,
+      std::size_t /*bytes_transferred*/)
+  {
+    asio::error_code ec(result_ec);
+
+    // Take ownership of the operation object.
+    win_iocp_socket_accept_op* o(static_cast<win_iocp_socket_accept_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    if (owner)
+    {
+      typename Protocol::endpoint peer_endpoint;
+      std::size_t addr_len = peer_endpoint.capacity();
+      socket_ops::complete_iocp_accept(o->socket_,
+          o->output_buffer(), o->address_length(),
+          peer_endpoint.data(), &addr_len,
+          o->new_socket_.get(), ec);
+
+      // Restart the accept operation if we got the connection_aborted error
+      // and the enable_connection_aborted socket option is not set.
+      if (ec == asio::error::connection_aborted
+          && !o->enable_connection_aborted_)
+      {
+        o->reset();
+        o->socket_service_.restart_accept_op(o->socket_,
+            o->new_socket_, o->protocol_.family(),
+            o->protocol_.type(), o->protocol_.protocol(),
+            o->output_buffer(), o->address_length(), o);
+        p.v = p.p = 0;
+        return;
+      }
+
+      // If the socket was successfully accepted, transfer ownership of the
+      // socket to the peer object.
+      if (!ec)
+      {
+        o->peer_.assign(o->protocol_,
+            typename Socket::native_handle_type(
+              o->new_socket_.get(), peer_endpoint), ec);
+        if (!ec)
+          o->new_socket_.release();
+      }
+
+      // Pass endpoint back to caller.
+      if (o->peer_endpoint_)
+        *o->peer_endpoint_ = peer_endpoint;
+    }
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder1<Handler, asio::error_code>
+      handler(o->handler_, ec);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  win_iocp_socket_service_base& socket_service_;
+  socket_type socket_;
+  socket_holder new_socket_;
+  Socket& peer_;
+  Protocol protocol_;
+  typename Protocol::endpoint* peer_endpoint_;
+  unsigned char output_buffer_[(sizeof(sockaddr_storage_type) + 16) * 2];
+  bool enable_connection_aborted_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+#if defined(ASIO_HAS_MOVE)
+
+template <typename Protocol, typename PeerIoExecutor,
+    typename Handler, typename IoExecutor>
+class win_iocp_socket_move_accept_op : public operation
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_socket_move_accept_op);
+
+  win_iocp_socket_move_accept_op(
+      win_iocp_socket_service_base& socket_service, socket_type socket,
+      const Protocol& protocol, const PeerIoExecutor& peer_io_ex,
+      typename Protocol::endpoint* peer_endpoint,
+      bool enable_connection_aborted, Handler& handler, const IoExecutor& io_ex)
+    : operation(&win_iocp_socket_move_accept_op::do_complete),
+      socket_service_(socket_service),
+      socket_(socket),
+      peer_(peer_io_ex),
+      protocol_(protocol),
+      peer_endpoint_(peer_endpoint),
+      enable_connection_aborted_(enable_connection_aborted),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  socket_holder& new_socket()
+  {
+    return new_socket_;
+  }
+
+  void* output_buffer()
+  {
+    return output_buffer_;
+  }
+
+  DWORD address_length()
+  {
+    return sizeof(sockaddr_storage_type) + 16;
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& result_ec,
+      std::size_t /*bytes_transferred*/)
+  {
+    asio::error_code ec(result_ec);
+
+    // Take ownership of the operation object.
+    win_iocp_socket_move_accept_op* o(
+        static_cast<win_iocp_socket_move_accept_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    if (owner)
+    {
+      typename Protocol::endpoint peer_endpoint;
+      std::size_t addr_len = peer_endpoint.capacity();
+      socket_ops::complete_iocp_accept(o->socket_,
+          o->output_buffer(), o->address_length(),
+          peer_endpoint.data(), &addr_len,
+          o->new_socket_.get(), ec);
+
+      // Restart the accept operation if we got the connection_aborted error
+      // and the enable_connection_aborted socket option is not set.
+      if (ec == asio::error::connection_aborted
+          && !o->enable_connection_aborted_)
+      {
+        o->reset();
+        o->socket_service_.restart_accept_op(o->socket_,
+            o->new_socket_, o->protocol_.family(),
+            o->protocol_.type(), o->protocol_.protocol(),
+            o->output_buffer(), o->address_length(), o);
+        p.v = p.p = 0;
+        return;
+      }
+
+      // If the socket was successfully accepted, transfer ownership of the
+      // socket to the peer object.
+      if (!ec)
+      {
+        o->peer_.assign(o->protocol_,
+            typename Protocol::socket::native_handle_type(
+              o->new_socket_.get(), peer_endpoint), ec);
+        if (!ec)
+          o->new_socket_.release();
+      }
+
+      // Pass endpoint back to caller.
+      if (o->peer_endpoint_)
+        *o->peer_endpoint_ = peer_endpoint;
+    }
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::move_binder2<Handler,
+      asio::error_code, peer_socket_type>
+        handler(0, ASIO_MOVE_CAST(Handler)(o->handler_), ec,
+          ASIO_MOVE_CAST(peer_socket_type)(o->peer_));
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, "..."));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  typedef typename Protocol::socket::template
+    rebind_executor<PeerIoExecutor>::other peer_socket_type;
+
+  win_iocp_socket_service_base& socket_service_;
+  socket_type socket_;
+  socket_holder new_socket_;
+  peer_socket_type peer_;
+  Protocol protocol_;
+  typename Protocol::endpoint* peer_endpoint_;
+  unsigned char output_buffer_[(sizeof(sockaddr_storage_type) + 16) * 2];
+  bool enable_connection_aborted_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+#endif // defined(ASIO_HAS_MOVE)
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_SOCKET_ACCEPT_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_connect_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_connect_op.hpp
new file mode 100644
index 00000000000..a836351d3e9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_connect_op.hpp
@@ -0,0 +1,130 @@
+//
+// detail/win_iocp_socket_connect_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_SOCKET_CONNECT_OP_HPP
+#define ASIO_DETAIL_WIN_IOCP_SOCKET_CONNECT_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class win_iocp_socket_connect_op_base : public reactor_op
+{
+public:
+  win_iocp_socket_connect_op_base(socket_type socket, func_type complete_func)
+    : reactor_op(&win_iocp_socket_connect_op_base::do_perform, complete_func),
+      socket_(socket),
+      connect_ex_(false)
+  {
+  }
+
+  static status do_perform(reactor_op* base)
+  {
+    win_iocp_socket_connect_op_base* o(
+        static_cast<win_iocp_socket_connect_op_base*>(base));
+
+    return socket_ops::non_blocking_connect(
+        o->socket_, o->ec_) ? done : not_done;
+  }
+
+  socket_type socket_;
+  bool connect_ex_;
+};
+
+template <typename Handler, typename IoExecutor>
+class win_iocp_socket_connect_op : public win_iocp_socket_connect_op_base
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_socket_connect_op);
+
+  win_iocp_socket_connect_op(socket_type socket,
+      Handler& handler, const IoExecutor& io_ex)
+    : win_iocp_socket_connect_op_base(socket,
+        &win_iocp_socket_connect_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& result_ec,
+      std::size_t /*bytes_transferred*/)
+  {
+    asio::error_code ec(result_ec);
+
+    // Take ownership of the operation object.
+    win_iocp_socket_connect_op* o(
+        static_cast<win_iocp_socket_connect_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    if (owner)
+    {
+      if (o->connect_ex_)
+        socket_ops::complete_iocp_connect(o->socket_, ec);
+      else
+        ec = o->ec_;
+    }
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder1<Handler, asio::error_code>
+      handler(o->handler_, ec);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_SOCKET_CONNECT_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_recv_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_recv_op.hpp
new file mode 100644
index 00000000000..72817052e4b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_recv_op.hpp
@@ -0,0 +1,120 @@
+//
+// detail/win_iocp_socket_recv_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_SOCKET_RECV_OP_HPP
+#define ASIO_DETAIL_WIN_IOCP_SOCKET_RECV_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/operation.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename MutableBufferSequence, typename Handler, typename IoExecutor>
+class win_iocp_socket_recv_op : public operation
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_socket_recv_op);
+
+  win_iocp_socket_recv_op(socket_ops::state_type state,
+      socket_ops::weak_cancel_token_type cancel_token,
+      const MutableBufferSequence& buffers, Handler& handler,
+      const IoExecutor& io_ex)
+    : operation(&win_iocp_socket_recv_op::do_complete),
+      state_(state),
+      cancel_token_(cancel_token),
+      buffers_(buffers),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& result_ec,
+      std::size_t bytes_transferred)
+  {
+    asio::error_code ec(result_ec);
+
+    // Take ownership of the operation object.
+    win_iocp_socket_recv_op* o(static_cast<win_iocp_socket_recv_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+    // Check whether buffers are still valid.
+    if (owner)
+    {
+      buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::validate(o->buffers_);
+    }
+#endif // defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+
+    socket_ops::complete_iocp_recv(o->state_, o->cancel_token_,
+        buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::all_empty(o->buffers_),
+        ec, bytes_transferred);
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, ec, bytes_transferred);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  socket_ops::state_type state_;
+  socket_ops::weak_cancel_token_type cancel_token_;
+  MutableBufferSequence buffers_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_SOCKET_RECV_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_recvfrom_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_recvfrom_op.hpp
new file mode 100644
index 00000000000..551a8825c5d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_recvfrom_op.hpp
@@ -0,0 +1,129 @@
+//
+// detail/win_iocp_socket_recvfrom_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_SOCKET_RECVFROM_OP_HPP
+#define ASIO_DETAIL_WIN_IOCP_SOCKET_RECVFROM_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/operation.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename MutableBufferSequence, typename Endpoint,
+    typename Handler, typename IoExecutor>
+class win_iocp_socket_recvfrom_op : public operation
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_socket_recvfrom_op);
+
+  win_iocp_socket_recvfrom_op(Endpoint& endpoint,
+      socket_ops::weak_cancel_token_type cancel_token,
+      const MutableBufferSequence& buffers, Handler& handler,
+      const IoExecutor& io_ex)
+    : operation(&win_iocp_socket_recvfrom_op::do_complete),
+      endpoint_(endpoint),
+      endpoint_size_(static_cast<int>(endpoint.capacity())),
+      cancel_token_(cancel_token),
+      buffers_(buffers),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  int& endpoint_size()
+  {
+    return endpoint_size_;
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& result_ec,
+      std::size_t bytes_transferred)
+  {
+    asio::error_code ec(result_ec);
+
+    // Take ownership of the operation object.
+    win_iocp_socket_recvfrom_op* o(
+        static_cast<win_iocp_socket_recvfrom_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+    // Check whether buffers are still valid.
+    if (owner)
+    {
+      buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::validate(o->buffers_);
+    }
+#endif // defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+
+    socket_ops::complete_iocp_recvfrom(o->cancel_token_, ec);
+
+    // Record the size of the endpoint returned by the operation.
+    o->endpoint_.resize(o->endpoint_size_);
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, ec, bytes_transferred);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Endpoint& endpoint_;
+  int endpoint_size_;
+  socket_ops::weak_cancel_token_type cancel_token_;
+  MutableBufferSequence buffers_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_SOCKET_RECVFROM_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_recvmsg_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_recvmsg_op.hpp
new file mode 100644
index 00000000000..8fb5d14c3b9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_recvmsg_op.hpp
@@ -0,0 +1,121 @@
+//
+// detail/win_iocp_socket_recvmsg_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_SOCKET_RECVMSG_OP_HPP
+#define ASIO_DETAIL_WIN_IOCP_SOCKET_RECVMSG_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/operation.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/error.hpp"
+#include "asio/socket_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename MutableBufferSequence, typename Handler, typename IoExecutor>
+class win_iocp_socket_recvmsg_op : public operation
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_socket_recvmsg_op);
+
+  win_iocp_socket_recvmsg_op(
+      socket_ops::weak_cancel_token_type cancel_token,
+      const MutableBufferSequence& buffers,
+      socket_base::message_flags& out_flags,
+      Handler& handler, const IoExecutor& io_ex)
+    : operation(&win_iocp_socket_recvmsg_op::do_complete),
+      cancel_token_(cancel_token),
+      buffers_(buffers),
+      out_flags_(out_flags),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& result_ec,
+      std::size_t bytes_transferred)
+  {
+    asio::error_code ec(result_ec);
+
+    // Take ownership of the operation object.
+    win_iocp_socket_recvmsg_op* o(
+        static_cast<win_iocp_socket_recvmsg_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+    // Check whether buffers are still valid.
+    if (owner)
+    {
+      buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::validate(o->buffers_);
+    }
+#endif // defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+
+    socket_ops::complete_iocp_recvmsg(o->cancel_token_, ec);
+    o->out_flags_ = 0;
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, ec, bytes_transferred);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  socket_ops::weak_cancel_token_type cancel_token_;
+  MutableBufferSequence buffers_;
+  socket_base::message_flags& out_flags_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_SOCKET_RECVMSG_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_send_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_send_op.hpp
new file mode 100644
index 00000000000..45d7117c874
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_send_op.hpp
@@ -0,0 +1,114 @@
+//
+// detail/win_iocp_socket_send_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_SOCKET_SEND_OP_HPP
+#define ASIO_DETAIL_WIN_IOCP_SOCKET_SEND_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/operation.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+class win_iocp_socket_send_op : public operation
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_socket_send_op);
+
+  win_iocp_socket_send_op(socket_ops::weak_cancel_token_type cancel_token,
+      const ConstBufferSequence& buffers, Handler& handler,
+      const IoExecutor& io_ex)
+    : operation(&win_iocp_socket_send_op::do_complete),
+      cancel_token_(cancel_token),
+      buffers_(buffers),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& result_ec,
+      std::size_t bytes_transferred)
+  {
+    asio::error_code ec(result_ec);
+
+    // Take ownership of the operation object.
+    win_iocp_socket_send_op* o(static_cast<win_iocp_socket_send_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+    // Check whether buffers are still valid.
+    if (owner)
+    {
+      buffer_sequence_adapter<asio::const_buffer,
+          ConstBufferSequence>::validate(o->buffers_);
+    }
+#endif // defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+
+    socket_ops::complete_iocp_send(o->cancel_token_, ec);
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, ec, bytes_transferred);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  socket_ops::weak_cancel_token_type cancel_token_;
+  ConstBufferSequence buffers_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_SOCKET_SEND_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_service.hpp
new file mode 100644
index 00000000000..efbad6f6805
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_service.hpp
@@ -0,0 +1,581 @@
+//
+// detail/win_iocp_socket_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_SOCKET_SERVICE_HPP
+#define ASIO_DETAIL_WIN_IOCP_SOCKET_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include <cstring>
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/socket_base.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/operation.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/select_reactor.hpp"
+#include "asio/detail/socket_holder.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/win_iocp_io_context.hpp"
+#include "asio/detail/win_iocp_null_buffers_op.hpp"
+#include "asio/detail/win_iocp_socket_accept_op.hpp"
+#include "asio/detail/win_iocp_socket_connect_op.hpp"
+#include "asio/detail/win_iocp_socket_recvfrom_op.hpp"
+#include "asio/detail/win_iocp_socket_send_op.hpp"
+#include "asio/detail/win_iocp_socket_service_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Protocol>
+class win_iocp_socket_service :
+  public execution_context_service_base<win_iocp_socket_service<Protocol> >,
+  public win_iocp_socket_service_base
+{
+public:
+  // The protocol type.
+  typedef Protocol protocol_type;
+
+  // The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  // The native type of a socket.
+  class native_handle_type
+  {
+  public:
+    native_handle_type(socket_type s)
+      : socket_(s),
+        have_remote_endpoint_(false)
+    {
+    }
+
+    native_handle_type(socket_type s, const endpoint_type& ep)
+      : socket_(s),
+        have_remote_endpoint_(true),
+        remote_endpoint_(ep)
+    {
+    }
+
+    void operator=(socket_type s)
+    {
+      socket_ = s;
+      have_remote_endpoint_ = false;
+      remote_endpoint_ = endpoint_type();
+    }
+
+    operator socket_type() const
+    {
+      return socket_;
+    }
+
+    bool have_remote_endpoint() const
+    {
+      return have_remote_endpoint_;
+    }
+
+    endpoint_type remote_endpoint() const
+    {
+      return remote_endpoint_;
+    }
+
+  private:
+    socket_type socket_;
+    bool have_remote_endpoint_;
+    endpoint_type remote_endpoint_;
+  };
+
+  // The implementation type of the socket.
+  struct implementation_type :
+    win_iocp_socket_service_base::base_implementation_type
+  {
+    // Default constructor.
+    implementation_type()
+      : protocol_(endpoint_type().protocol()),
+        have_remote_endpoint_(false),
+        remote_endpoint_()
+    {
+    }
+
+    // The protocol associated with the socket.
+    protocol_type protocol_;
+
+    // Whether we have a cached remote endpoint.
+    bool have_remote_endpoint_;
+
+    // A cached remote endpoint.
+    endpoint_type remote_endpoint_;
+  };
+
+  // Constructor.
+  win_iocp_socket_service(execution_context& context)
+    : execution_context_service_base<
+        win_iocp_socket_service<Protocol> >(context),
+      win_iocp_socket_service_base(context)
+  {
+  }
+
+  // Destroy all user-defined handler objects owned by the service.
+  void shutdown()
+  {
+    this->base_shutdown();
+  }
+
+  // Move-construct a new socket implementation.
+  void move_construct(implementation_type& impl,
+      implementation_type& other_impl) ASIO_NOEXCEPT
+  {
+    this->base_move_construct(impl, other_impl);
+
+    impl.protocol_ = other_impl.protocol_;
+    other_impl.protocol_ = endpoint_type().protocol();
+
+    impl.have_remote_endpoint_ = other_impl.have_remote_endpoint_;
+    other_impl.have_remote_endpoint_ = false;
+
+    impl.remote_endpoint_ = other_impl.remote_endpoint_;
+    other_impl.remote_endpoint_ = endpoint_type();
+  }
+
+  // Move-assign from another socket implementation.
+  void move_assign(implementation_type& impl,
+      win_iocp_socket_service_base& other_service,
+      implementation_type& other_impl)
+  {
+    this->base_move_assign(impl, other_service, other_impl);
+
+    impl.protocol_ = other_impl.protocol_;
+    other_impl.protocol_ = endpoint_type().protocol();
+
+    impl.have_remote_endpoint_ = other_impl.have_remote_endpoint_;
+    other_impl.have_remote_endpoint_ = false;
+
+    impl.remote_endpoint_ = other_impl.remote_endpoint_;
+    other_impl.remote_endpoint_ = endpoint_type();
+  }
+
+  // Move-construct a new socket implementation from another protocol type.
+  template <typename Protocol1>
+  void converting_move_construct(implementation_type& impl,
+      win_iocp_socket_service<Protocol1>&,
+      typename win_iocp_socket_service<
+        Protocol1>::implementation_type& other_impl)
+  {
+    this->base_move_construct(impl, other_impl);
+
+    impl.protocol_ = protocol_type(other_impl.protocol_);
+    other_impl.protocol_ = typename Protocol1::endpoint().protocol();
+
+    impl.have_remote_endpoint_ = other_impl.have_remote_endpoint_;
+    other_impl.have_remote_endpoint_ = false;
+
+    impl.remote_endpoint_ = other_impl.remote_endpoint_;
+    other_impl.remote_endpoint_ = typename Protocol1::endpoint();
+  }
+
+  // Open a new socket implementation.
+  asio::error_code open(implementation_type& impl,
+      const protocol_type& protocol, asio::error_code& ec)
+  {
+    if (!do_open(impl, protocol.family(),
+          protocol.type(), protocol.protocol(), ec))
+    {
+      impl.protocol_ = protocol;
+      impl.have_remote_endpoint_ = false;
+      impl.remote_endpoint_ = endpoint_type();
+    }
+    return ec;
+  }
+
+  // Assign a native socket to a socket implementation.
+  asio::error_code assign(implementation_type& impl,
+      const protocol_type& protocol, const native_handle_type& native_socket,
+      asio::error_code& ec)
+  {
+    if (!do_assign(impl, protocol.type(), native_socket, ec))
+    {
+      impl.protocol_ = protocol;
+      impl.have_remote_endpoint_ = native_socket.have_remote_endpoint();
+      impl.remote_endpoint_ = native_socket.remote_endpoint();
+    }
+    return ec;
+  }
+
+  // Get the native socket representation.
+  native_handle_type native_handle(implementation_type& impl)
+  {
+    if (impl.have_remote_endpoint_)
+      return native_handle_type(impl.socket_, impl.remote_endpoint_);
+    return native_handle_type(impl.socket_);
+  }
+
+  // Bind the socket to the specified local endpoint.
+  asio::error_code bind(implementation_type& impl,
+      const endpoint_type& endpoint, asio::error_code& ec)
+  {
+    socket_ops::bind(impl.socket_, endpoint.data(), endpoint.size(), ec);
+    return ec;
+  }
+
+  // Set a socket option.
+  template <typename Option>
+  asio::error_code set_option(implementation_type& impl,
+      const Option& option, asio::error_code& ec)
+  {
+    socket_ops::setsockopt(impl.socket_, impl.state_,
+        option.level(impl.protocol_), option.name(impl.protocol_),
+        option.data(impl.protocol_), option.size(impl.protocol_), ec);
+    return ec;
+  }
+
+  // Set a socket option.
+  template <typename Option>
+  asio::error_code get_option(const implementation_type& impl,
+      Option& option, asio::error_code& ec) const
+  {
+    std::size_t size = option.size(impl.protocol_);
+    socket_ops::getsockopt(impl.socket_, impl.state_,
+        option.level(impl.protocol_), option.name(impl.protocol_),
+        option.data(impl.protocol_), &size, ec);
+    if (!ec)
+      option.resize(impl.protocol_, size);
+    return ec;
+  }
+
+  // Get the local endpoint.
+  endpoint_type local_endpoint(const implementation_type& impl,
+      asio::error_code& ec) const
+  {
+    endpoint_type endpoint;
+    std::size_t addr_len = endpoint.capacity();
+    if (socket_ops::getsockname(impl.socket_, endpoint.data(), &addr_len, ec))
+      return endpoint_type();
+    endpoint.resize(addr_len);
+    return endpoint;
+  }
+
+  // Get the remote endpoint.
+  endpoint_type remote_endpoint(const implementation_type& impl,
+      asio::error_code& ec) const
+  {
+    endpoint_type endpoint = impl.remote_endpoint_;
+    std::size_t addr_len = endpoint.capacity();
+    if (socket_ops::getpeername(impl.socket_, endpoint.data(),
+          &addr_len, impl.have_remote_endpoint_, ec))
+      return endpoint_type();
+    endpoint.resize(addr_len);
+    return endpoint;
+  }
+
+  // Disable sends or receives on the socket.
+  asio::error_code shutdown(base_implementation_type& impl,
+      socket_base::shutdown_type what, asio::error_code& ec)
+  {
+    socket_ops::shutdown(impl.socket_, what, ec);
+    return ec;
+  }
+
+  // Send a datagram to the specified endpoint. Returns the number of bytes
+  // sent.
+  template <typename ConstBufferSequence>
+  size_t send_to(implementation_type& impl, const ConstBufferSequence& buffers,
+      const endpoint_type& destination, socket_base::message_flags flags,
+      asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence> bufs(buffers);
+
+    return socket_ops::sync_sendto(impl.socket_, impl.state_,
+        bufs.buffers(), bufs.count(), flags,
+        destination.data(), destination.size(), ec);
+  }
+
+  // Wait until data can be sent without blocking.
+  size_t send_to(implementation_type& impl, const null_buffers&,
+      const endpoint_type&, socket_base::message_flags,
+      asio::error_code& ec)
+  {
+    // Wait for socket to become ready.
+    socket_ops::poll_write(impl.socket_, impl.state_, -1, ec);
+
+    return 0;
+  }
+
+  // Start an asynchronous send. The data being sent must be valid for the
+  // lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_send_to(implementation_type& impl,
+      const ConstBufferSequence& buffers, const endpoint_type& destination,
+      socket_base::message_flags flags, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_socket_send_op<
+        ConstBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.cancel_token_, buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_send_to"));
+
+    buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence> bufs(buffers);
+
+    start_send_to_op(impl, bufs.buffers(), bufs.count(),
+        destination.data(), static_cast<int>(destination.size()),
+        flags, p.p);
+    p.v = p.p = 0;
+  }
+
+  // Start an asynchronous wait until data can be sent without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_send_to(implementation_type& impl, const null_buffers&,
+      const endpoint_type&, socket_base::message_flags, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.cancel_token_, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_send_to(null_buffers)"));
+
+    start_reactor_op(impl, select_reactor::write_op, p.p);
+    p.v = p.p = 0;
+  }
+
+  // Receive a datagram with the endpoint of the sender. Returns the number of
+  // bytes received.
+  template <typename MutableBufferSequence>
+  size_t receive_from(implementation_type& impl,
+      const MutableBufferSequence& buffers,
+      endpoint_type& sender_endpoint, socket_base::message_flags flags,
+      asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(buffers);
+
+    std::size_t addr_len = sender_endpoint.capacity();
+    std::size_t bytes_recvd = socket_ops::sync_recvfrom(
+        impl.socket_, impl.state_, bufs.buffers(), bufs.count(),
+        flags, sender_endpoint.data(), &addr_len, ec);
+
+    if (!ec)
+      sender_endpoint.resize(addr_len);
+
+    return bytes_recvd;
+  }
+
+  // Wait until data can be received without blocking.
+  size_t receive_from(implementation_type& impl,
+      const null_buffers&, endpoint_type& sender_endpoint,
+      socket_base::message_flags, asio::error_code& ec)
+  {
+    // Wait for socket to become ready.
+    socket_ops::poll_read(impl.socket_, impl.state_, -1, ec);
+
+    // Reset endpoint since it can be given no sensible value at this time.
+    sender_endpoint = endpoint_type();
+
+    return 0;
+  }
+
+  // Start an asynchronous receive. The buffer for the data being received and
+  // the sender_endpoint object must both be valid for the lifetime of the
+  // asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_receive_from(implementation_type& impl,
+      const MutableBufferSequence& buffers, endpoint_type& sender_endp,
+      socket_base::message_flags flags, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_socket_recvfrom_op<MutableBufferSequence,
+        endpoint_type, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(sender_endp, impl.cancel_token_,
+        buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_receive_from"));
+
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(buffers);
+
+    start_receive_from_op(impl, bufs.buffers(), bufs.count(),
+        sender_endp.data(), flags, &p.p->endpoint_size(), p.p);
+    p.v = p.p = 0;
+  }
+
+  // Wait until data can be received without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_receive_from(implementation_type& impl, const null_buffers&,
+      endpoint_type& sender_endpoint, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.cancel_token_, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_receive_from(null_buffers)"));
+
+    // Reset endpoint since it can be given no sensible value at this time.
+    sender_endpoint = endpoint_type();
+
+    start_null_buffers_receive_op(impl, flags, p.p);
+    p.v = p.p = 0;
+  }
+
+  // Accept a new connection.
+  template <typename Socket>
+  asio::error_code accept(implementation_type& impl, Socket& peer,
+      endpoint_type* peer_endpoint, asio::error_code& ec)
+  {
+    // We cannot accept a socket that is already open.
+    if (peer.is_open())
+    {
+      ec = asio::error::already_open;
+      return ec;
+    }
+
+    std::size_t addr_len = peer_endpoint ? peer_endpoint->capacity() : 0;
+    socket_holder new_socket(socket_ops::sync_accept(impl.socket_,
+          impl.state_, peer_endpoint ? peer_endpoint->data() : 0,
+          peer_endpoint ? &addr_len : 0, ec));
+
+    // On success, assign new connection to peer socket object.
+    if (new_socket.get() != invalid_socket)
+    {
+      if (peer_endpoint)
+        peer_endpoint->resize(addr_len);
+      peer.assign(impl.protocol_, new_socket.get(), ec);
+      if (!ec)
+        new_socket.release();
+    }
+
+    return ec;
+  }
+
+  // Start an asynchronous accept. The peer and peer_endpoint objects
+  // must be valid until the accept's handler is invoked.
+  template <typename Socket, typename Handler, typename IoExecutor>
+  void async_accept(implementation_type& impl, Socket& peer,
+      endpoint_type* peer_endpoint, Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_socket_accept_op<Socket,
+        protocol_type, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    bool enable_connection_aborted =
+      (impl.state_ & socket_ops::enable_connection_aborted) != 0;
+    p.p = new (p.v) op(*this, impl.socket_, peer, impl.protocol_,
+        peer_endpoint, enable_connection_aborted, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_accept"));
+
+    start_accept_op(impl, peer.is_open(), p.p->new_socket(),
+        impl.protocol_.family(), impl.protocol_.type(),
+        impl.protocol_.protocol(), p.p->output_buffer(),
+        p.p->address_length(), p.p);
+    p.v = p.p = 0;
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  // Start an asynchronous accept. The peer and peer_endpoint objects
+  // must be valid until the accept's handler is invoked.
+  template <typename PeerIoExecutor, typename Handler, typename IoExecutor>
+  void async_move_accept(implementation_type& impl,
+      const PeerIoExecutor& peer_io_ex, endpoint_type* peer_endpoint,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_socket_move_accept_op<
+        protocol_type, PeerIoExecutor, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    bool enable_connection_aborted =
+      (impl.state_ & socket_ops::enable_connection_aborted) != 0;
+    p.p = new (p.v) op(*this, impl.socket_, impl.protocol_,
+        peer_io_ex, peer_endpoint, enable_connection_aborted,
+        handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_accept"));
+
+    start_accept_op(impl, false, p.p->new_socket(),
+        impl.protocol_.family(), impl.protocol_.type(),
+        impl.protocol_.protocol(), p.p->output_buffer(),
+        p.p->address_length(), p.p);
+    p.v = p.p = 0;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  // Connect the socket to the specified endpoint.
+  asio::error_code connect(implementation_type& impl,
+      const endpoint_type& peer_endpoint, asio::error_code& ec)
+  {
+    socket_ops::sync_connect(impl.socket_,
+        peer_endpoint.data(), peer_endpoint.size(), ec);
+    return ec;
+  }
+
+  // Start an asynchronous connect.
+  template <typename Handler, typename IoExecutor>
+  void async_connect(implementation_type& impl,
+      const endpoint_type& peer_endpoint, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_socket_connect_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.socket_, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_connect"));
+
+    start_connect_op(impl, impl.protocol_.family(), impl.protocol_.type(),
+        peer_endpoint.data(), static_cast<int>(peer_endpoint.size()), p.p);
+    p.v = p.p = 0;
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_SOCKET_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_service_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_service_base.hpp
new file mode 100644
index 00000000000..0f35c81fa4f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_socket_service_base.hpp
@@ -0,0 +1,600 @@
+//
+// detail/win_iocp_socket_service_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_SOCKET_SERVICE_BASE_HPP
+#define ASIO_DETAIL_WIN_IOCP_SOCKET_SERVICE_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/socket_base.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/operation.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/select_reactor.hpp"
+#include "asio/detail/socket_holder.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/win_iocp_io_context.hpp"
+#include "asio/detail/win_iocp_null_buffers_op.hpp"
+#include "asio/detail/win_iocp_socket_connect_op.hpp"
+#include "asio/detail/win_iocp_socket_send_op.hpp"
+#include "asio/detail/win_iocp_socket_recv_op.hpp"
+#include "asio/detail/win_iocp_socket_recvmsg_op.hpp"
+#include "asio/detail/win_iocp_wait_op.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class win_iocp_socket_service_base
+{
+public:
+  // The implementation type of the socket.
+  struct base_implementation_type
+  {
+    // The native socket representation.
+    socket_type socket_;
+
+    // The current state of the socket.
+    socket_ops::state_type state_;
+
+    // We use a shared pointer as a cancellation token here to work around the
+    // broken Windows support for cancellation. MSDN says that when you call
+    // closesocket any outstanding WSARecv or WSASend operations will complete
+    // with the error ERROR_OPERATION_ABORTED. In practice they complete with
+    // ERROR_NETNAME_DELETED, which means you can't tell the difference between
+    // a local cancellation and the socket being hard-closed by the peer.
+    socket_ops::shared_cancel_token_type cancel_token_;
+
+    // Per-descriptor data used by the reactor.
+    select_reactor::per_descriptor_data reactor_data_;
+
+#if defined(ASIO_ENABLE_CANCELIO)
+    // The ID of the thread from which it is safe to cancel asynchronous
+    // operations. 0 means no asynchronous operations have been started yet.
+    // ~0 means asynchronous operations have been started from more than one
+    // thread, and cancellation is not supported for the socket.
+    DWORD safe_cancellation_thread_id_;
+#endif // defined(ASIO_ENABLE_CANCELIO)
+
+    // Pointers to adjacent socket implementations in linked list.
+    base_implementation_type* next_;
+    base_implementation_type* prev_;
+  };
+
+  // Constructor.
+  ASIO_DECL win_iocp_socket_service_base(execution_context& context);
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void base_shutdown();
+
+  // Construct a new socket implementation.
+  ASIO_DECL void construct(base_implementation_type& impl);
+
+  // Move-construct a new socket implementation.
+  ASIO_DECL void base_move_construct(base_implementation_type& impl,
+      base_implementation_type& other_impl) ASIO_NOEXCEPT;
+
+  // Move-assign from another socket implementation.
+  ASIO_DECL void base_move_assign(base_implementation_type& impl,
+      win_iocp_socket_service_base& other_service,
+      base_implementation_type& other_impl);
+
+  // Destroy a socket implementation.
+  ASIO_DECL void destroy(base_implementation_type& impl);
+
+  // Determine whether the socket is open.
+  bool is_open(const base_implementation_type& impl) const
+  {
+    return impl.socket_ != invalid_socket;
+  }
+
+  // Destroy a socket implementation.
+  ASIO_DECL asio::error_code close(
+      base_implementation_type& impl, asio::error_code& ec);
+
+  // Release ownership of the socket.
+  ASIO_DECL socket_type release(
+      base_implementation_type& impl, asio::error_code& ec);
+
+  // Cancel all operations associated with the socket.
+  ASIO_DECL asio::error_code cancel(
+      base_implementation_type& impl, asio::error_code& ec);
+
+  // Determine whether the socket is at the out-of-band data mark.
+  bool at_mark(const base_implementation_type& impl,
+      asio::error_code& ec) const
+  {
+    return socket_ops::sockatmark(impl.socket_, ec);
+  }
+
+  // Determine the number of bytes available for reading.
+  std::size_t available(const base_implementation_type& impl,
+      asio::error_code& ec) const
+  {
+    return socket_ops::available(impl.socket_, ec);
+  }
+
+  // Place the socket into the state where it will listen for new connections.
+  asio::error_code listen(base_implementation_type& impl,
+      int backlog, asio::error_code& ec)
+  {
+    socket_ops::listen(impl.socket_, backlog, ec);
+    return ec;
+  }
+
+  // Perform an IO control command on the socket.
+  template <typename IO_Control_Command>
+  asio::error_code io_control(base_implementation_type& impl,
+      IO_Control_Command& command, asio::error_code& ec)
+  {
+    socket_ops::ioctl(impl.socket_, impl.state_, command.name(),
+        static_cast<ioctl_arg_type*>(command.data()), ec);
+    return ec;
+  }
+
+  // Gets the non-blocking mode of the socket.
+  bool non_blocking(const base_implementation_type& impl) const
+  {
+    return (impl.state_ & socket_ops::user_set_non_blocking) != 0;
+  }
+
+  // Sets the non-blocking mode of the socket.
+  asio::error_code non_blocking(base_implementation_type& impl,
+      bool mode, asio::error_code& ec)
+  {
+    socket_ops::set_user_non_blocking(impl.socket_, impl.state_, mode, ec);
+    return ec;
+  }
+
+  // Gets the non-blocking mode of the native socket implementation.
+  bool native_non_blocking(const base_implementation_type& impl) const
+  {
+    return (impl.state_ & socket_ops::internal_non_blocking) != 0;
+  }
+
+  // Sets the non-blocking mode of the native socket implementation.
+  asio::error_code native_non_blocking(base_implementation_type& impl,
+      bool mode, asio::error_code& ec)
+  {
+    socket_ops::set_internal_non_blocking(impl.socket_, impl.state_, mode, ec);
+    return ec;
+  }
+
+  // Wait for the socket to become ready to read, ready to write, or to have
+  // pending error conditions.
+  asio::error_code wait(base_implementation_type& impl,
+      socket_base::wait_type w, asio::error_code& ec)
+  {
+    switch (w)
+    {
+    case socket_base::wait_read:
+      socket_ops::poll_read(impl.socket_, impl.state_, -1, ec);
+      break;
+    case socket_base::wait_write:
+      socket_ops::poll_write(impl.socket_, impl.state_, -1, ec);
+      break;
+    case socket_base::wait_error:
+      socket_ops::poll_error(impl.socket_, impl.state_, -1, ec);
+      break;
+    default:
+      ec = asio::error::invalid_argument;
+      break;
+    }
+
+    return ec;
+  }
+
+  // Asynchronously wait for the socket to become ready to read, ready to
+  // write, or to have pending error conditions.
+  template <typename Handler, typename IoExecutor>
+  void async_wait(base_implementation_type& impl,
+      socket_base::wait_type w, Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_wait_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.cancel_token_, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_wait"));
+
+    switch (w)
+    {
+      case socket_base::wait_read:
+        start_null_buffers_receive_op(impl, 0, p.p);
+        break;
+      case socket_base::wait_write:
+        start_reactor_op(impl, select_reactor::write_op, p.p);
+        break;
+      case socket_base::wait_error:
+        start_reactor_op(impl, select_reactor::except_op, p.p);
+        break;
+      default:
+        p.p->ec_ = asio::error::invalid_argument;
+        iocp_service_.post_immediate_completion(p.p, is_continuation);
+        break;
+    }
+
+    p.v = p.p = 0;
+  }
+
+  // Send the given data to the peer. Returns the number of bytes sent.
+  template <typename ConstBufferSequence>
+  size_t send(base_implementation_type& impl,
+      const ConstBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence> bufs(buffers);
+
+    return socket_ops::sync_send(impl.socket_, impl.state_,
+        bufs.buffers(), bufs.count(), flags, bufs.all_empty(), ec);
+  }
+
+  // Wait until data can be sent without blocking.
+  size_t send(base_implementation_type& impl, const null_buffers&,
+      socket_base::message_flags, asio::error_code& ec)
+  {
+    // Wait for socket to become ready.
+    socket_ops::poll_write(impl.socket_, impl.state_, -1, ec);
+
+    return 0;
+  }
+
+  // Start an asynchronous send. The data being sent must be valid for the
+  // lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_send(base_implementation_type& impl,
+      const ConstBufferSequence& buffers, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_socket_send_op<
+        ConstBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.cancel_token_, buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_send"));
+
+    buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence> bufs(buffers);
+
+    start_send_op(impl, bufs.buffers(), bufs.count(), flags,
+        (impl.state_ & socket_ops::stream_oriented) != 0 && bufs.all_empty(),
+        p.p);
+    p.v = p.p = 0;
+  }
+
+  // Start an asynchronous wait until data can be sent without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_send(base_implementation_type& impl, const null_buffers&,
+      socket_base::message_flags, Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.cancel_token_, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_send(null_buffers)"));
+
+    start_reactor_op(impl, select_reactor::write_op, p.p);
+    p.v = p.p = 0;
+  }
+
+  // Receive some data from the peer. Returns the number of bytes received.
+  template <typename MutableBufferSequence>
+  size_t receive(base_implementation_type& impl,
+      const MutableBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(buffers);
+
+    return socket_ops::sync_recv(impl.socket_, impl.state_,
+        bufs.buffers(), bufs.count(), flags, bufs.all_empty(), ec);
+  }
+
+  // Wait until data can be received without blocking.
+  size_t receive(base_implementation_type& impl, const null_buffers&,
+      socket_base::message_flags, asio::error_code& ec)
+  {
+    // Wait for socket to become ready.
+    socket_ops::poll_read(impl.socket_, impl.state_, -1, ec);
+
+    return 0;
+  }
+
+  // Start an asynchronous receive. The buffer for the data being received
+  // must be valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_receive(base_implementation_type& impl,
+      const MutableBufferSequence& buffers, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_socket_recv_op<
+        MutableBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.state_, impl.cancel_token_,
+        buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_receive"));
+
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(buffers);
+
+    start_receive_op(impl, bufs.buffers(), bufs.count(), flags,
+        (impl.state_ & socket_ops::stream_oriented) != 0 && bufs.all_empty(),
+        p.p);
+    p.v = p.p = 0;
+  }
+
+  // Wait until data can be received without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_receive(base_implementation_type& impl,
+      const null_buffers&, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.cancel_token_, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_receive(null_buffers)"));
+
+    start_null_buffers_receive_op(impl, flags, p.p);
+    p.v = p.p = 0;
+  }
+
+  // Receive some data with associated flags. Returns the number of bytes
+  // received.
+  template <typename MutableBufferSequence>
+  size_t receive_with_flags(base_implementation_type& impl,
+      const MutableBufferSequence& buffers,
+      socket_base::message_flags in_flags,
+      socket_base::message_flags& out_flags, asio::error_code& ec)
+  {
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(buffers);
+
+    return socket_ops::sync_recvmsg(impl.socket_, impl.state_,
+        bufs.buffers(), bufs.count(), in_flags, out_flags, ec);
+  }
+
+  // Wait until data can be received without blocking.
+  size_t receive_with_flags(base_implementation_type& impl,
+      const null_buffers&, socket_base::message_flags,
+      socket_base::message_flags& out_flags, asio::error_code& ec)
+  {
+    // Wait for socket to become ready.
+    socket_ops::poll_read(impl.socket_, impl.state_, -1, ec);
+
+    // Clear out_flags, since we cannot give it any other sensible value when
+    // performing a null_buffers operation.
+    out_flags = 0;
+
+    return 0;
+  }
+
+  // Start an asynchronous receive. The buffer for the data being received
+  // must be valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_receive_with_flags(base_implementation_type& impl,
+      const MutableBufferSequence& buffers, socket_base::message_flags in_flags,
+      socket_base::message_flags& out_flags, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_socket_recvmsg_op<
+        MutableBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.cancel_token_,
+        buffers, out_flags, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_receive_with_flags"));
+
+    buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence> bufs(buffers);
+
+    start_receive_op(impl, bufs.buffers(), bufs.count(), in_flags, false, p.p);
+    p.v = p.p = 0;
+  }
+
+  // Wait until data can be received without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_receive_with_flags(base_implementation_type& impl,
+      const null_buffers&, socket_base::message_flags in_flags,
+      socket_base::message_flags& out_flags, Handler& handler,
+      const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef win_iocp_null_buffers_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(impl.cancel_token_, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((context_, *p.p, "socket",
+          &impl, impl.socket_, "async_receive_with_flags(null_buffers)"));
+
+    // Reset out_flags since it can be given no sensible value at this time.
+    out_flags = 0;
+
+    start_null_buffers_receive_op(impl, in_flags, p.p);
+    p.v = p.p = 0;
+  }
+
+  // Helper function to restart an asynchronous accept operation.
+  ASIO_DECL void restart_accept_op(socket_type s,
+      socket_holder& new_socket, int family, int type, int protocol,
+      void* output_buffer, DWORD address_length, operation* op);
+
+protected:
+  // Open a new socket implementation.
+  ASIO_DECL asio::error_code do_open(
+      base_implementation_type& impl, int family, int type,
+      int protocol, asio::error_code& ec);
+
+  // Assign a native socket to a socket implementation.
+  ASIO_DECL asio::error_code do_assign(
+      base_implementation_type& impl, int type,
+      socket_type native_socket, asio::error_code& ec);
+
+  // Helper function to start an asynchronous send operation.
+  ASIO_DECL void start_send_op(base_implementation_type& impl,
+      WSABUF* buffers, std::size_t buffer_count,
+      socket_base::message_flags flags, bool noop, operation* op);
+
+  // Helper function to start an asynchronous send_to operation.
+  ASIO_DECL void start_send_to_op(base_implementation_type& impl,
+      WSABUF* buffers, std::size_t buffer_count,
+      const socket_addr_type* addr, int addrlen,
+      socket_base::message_flags flags, operation* op);
+
+  // Helper function to start an asynchronous receive operation.
+  ASIO_DECL void start_receive_op(base_implementation_type& impl,
+      WSABUF* buffers, std::size_t buffer_count,
+      socket_base::message_flags flags, bool noop, operation* op);
+
+  // Helper function to start an asynchronous null_buffers receive operation.
+  ASIO_DECL void start_null_buffers_receive_op(
+      base_implementation_type& impl,
+      socket_base::message_flags flags, reactor_op* op);
+
+  // Helper function to start an asynchronous receive_from operation.
+  ASIO_DECL void start_receive_from_op(base_implementation_type& impl,
+      WSABUF* buffers, std::size_t buffer_count, socket_addr_type* addr,
+      socket_base::message_flags flags, int* addrlen, operation* op);
+
+  // Helper function to start an asynchronous accept operation.
+  ASIO_DECL void start_accept_op(base_implementation_type& impl,
+      bool peer_is_open, socket_holder& new_socket, int family, int type,
+      int protocol, void* output_buffer, DWORD address_length, operation* op);
+
+  // Start an asynchronous read or write operation using the reactor.
+  ASIO_DECL void start_reactor_op(base_implementation_type& impl,
+      int op_type, reactor_op* op);
+
+  // Start the asynchronous connect operation using the reactor.
+  ASIO_DECL void start_connect_op(base_implementation_type& impl,
+      int family, int type, const socket_addr_type* remote_addr,
+      std::size_t remote_addrlen, win_iocp_socket_connect_op_base* op);
+
+  // Helper function to close a socket when the associated object is being
+  // destroyed.
+  ASIO_DECL void close_for_destruction(base_implementation_type& impl);
+
+  // Update the ID of the thread from which cancellation is safe.
+  ASIO_DECL void update_cancellation_thread_id(
+      base_implementation_type& impl);
+
+  // Helper function to get the reactor. If no reactor has been created yet, a
+  // new one is obtained from the execution context and a pointer to it is
+  // cached in this service.
+  ASIO_DECL select_reactor& get_reactor();
+
+  // The type of a ConnectEx function pointer, as old SDKs may not provide it.
+  typedef BOOL (PASCAL *connect_ex_fn)(SOCKET,
+      const socket_addr_type*, int, void*, DWORD, DWORD*, OVERLAPPED*);
+
+  // Helper function to get the ConnectEx pointer. If no ConnectEx pointer has
+  // been obtained yet, one is obtained using WSAIoctl and the pointer is
+  // cached. Returns a null pointer if ConnectEx is not available.
+  ASIO_DECL connect_ex_fn get_connect_ex(
+      base_implementation_type& impl, int type);
+
+  // The type of a NtSetInformationFile function pointer.
+  typedef LONG (NTAPI *nt_set_info_fn)(HANDLE, ULONG_PTR*, void*, ULONG, ULONG);
+
+  // Helper function to get the NtSetInformationFile function pointer. If no
+  // NtSetInformationFile pointer has been obtained yet, one is obtained using
+  // GetProcAddress and the pointer is cached. Returns a null pointer if
+  // NtSetInformationFile is not available.
+  ASIO_DECL nt_set_info_fn get_nt_set_info();
+
+  // Helper function to emulate InterlockedCompareExchangePointer functionality
+  // for:
+  // - very old Platform SDKs; and
+  // - platform SDKs where MSVC's /Wp64 option causes spurious warnings.
+  ASIO_DECL void* interlocked_compare_exchange_pointer(
+      void** dest, void* exch, void* cmp);
+
+  // Helper function to emulate InterlockedExchangePointer functionality for:
+  // - very old Platform SDKs; and
+  // - platform SDKs where MSVC's /Wp64 option causes spurious warnings.
+  ASIO_DECL void* interlocked_exchange_pointer(void** dest, void* val);
+
+  // The execution context used to obtain the reactor, if required.
+  execution_context& context_;
+
+  // The IOCP service used for running asynchronous operations and dispatching
+  // handlers.
+  win_iocp_io_context& iocp_service_;
+
+  // The reactor used for performing connect operations. This object is created
+  // only if needed.
+  select_reactor* reactor_;
+
+  // Pointer to ConnectEx implementation.
+  void* connect_ex_;
+
+  // Pointer to NtSetInformationFile implementation.
+  void* nt_set_info_;
+
+  // Mutex to protect access to the linked list of implementations. 
+  asio::detail::mutex mutex_;
+
+  // The head of a linked list of all implementations.
+  base_implementation_type* impl_list_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/win_iocp_socket_service_base.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_SOCKET_SERVICE_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_thread_info.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_thread_info.hpp
new file mode 100644
index 00000000000..ccb63a5525d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_thread_info.hpp
@@ -0,0 +1,34 @@
+//
+// detail/win_iocp_thread_info.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_THREAD_INFO_HPP
+#define ASIO_DETAIL_WIN_IOCP_THREAD_INFO_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/thread_info_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+struct win_iocp_thread_info : public thread_info_base
+{
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_WIN_IOCP_THREAD_INFO_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_wait_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_wait_op.hpp
new file mode 100644
index 00000000000..528dc3c058d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_iocp_wait_op.hpp
@@ -0,0 +1,123 @@
+//
+// detail/win_iocp_wait_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_IOCP_WAIT_OP_HPP
+#define ASIO_DETAIL_WIN_IOCP_WAIT_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/reactor_op.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler, typename IoExecutor>
+class win_iocp_wait_op : public reactor_op
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(win_iocp_wait_op);
+
+  win_iocp_wait_op(socket_ops::weak_cancel_token_type cancel_token,
+      Handler& handler, const IoExecutor& io_ex)
+    : reactor_op(&win_iocp_wait_op::do_perform,
+        &win_iocp_wait_op::do_complete),
+      cancel_token_(cancel_token),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static status do_perform(reactor_op*)
+  {
+    return done;
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code& result_ec,
+      std::size_t /*bytes_transferred*/)
+  {
+    asio::error_code ec(result_ec);
+
+    // Take ownership of the operation object.
+    win_iocp_wait_op* o(static_cast<win_iocp_wait_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // The reactor may have stored a result in the operation object.
+    if (o->ec_)
+      ec = o->ec_;
+
+    // Map non-portable errors to their portable counterparts.
+    if (ec.value() == ERROR_NETNAME_DELETED)
+    {
+      if (o->cancel_token_.expired())
+        ec = asio::error::operation_aborted;
+      else
+        ec = asio::error::connection_reset;
+    }
+    else if (ec.value() == ERROR_PORT_UNREACHABLE)
+    {
+      ec = asio::error::connection_refused;
+    }
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder1<Handler, asio::error_code>
+      handler(o->handler_, ec);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  socket_ops::weak_cancel_token_type cancel_token_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_IOCP)
+
+#endif // ASIO_DETAIL_WIN_IOCP_WAIT_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_mutex.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_mutex.hpp
new file mode 100644
index 00000000000..769e60aa8d8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_mutex.hpp
@@ -0,0 +1,78 @@
+//
+// detail/win_mutex.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_MUTEX_HPP
+#define ASIO_DETAIL_WIN_MUTEX_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS)
+
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/scoped_lock.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class win_mutex
+  : private noncopyable
+{
+public:
+  typedef asio::detail::scoped_lock<win_mutex> scoped_lock;
+
+  // Constructor.
+  ASIO_DECL win_mutex();
+
+  // Destructor.
+  ~win_mutex()
+  {
+    ::DeleteCriticalSection(&crit_section_);
+  }
+
+  // Lock the mutex.
+  void lock()
+  {
+    ::EnterCriticalSection(&crit_section_);
+  }
+
+  // Unlock the mutex.
+  void unlock()
+  {
+    ::LeaveCriticalSection(&crit_section_);
+  }
+
+private:
+  // Initialisation must be performed in a separate function to the constructor
+  // since the compiler does not support the use of structured exceptions and
+  // C++ exceptions in the same function.
+  ASIO_DECL int do_init();
+
+  ::CRITICAL_SECTION crit_section_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/win_mutex.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_WINDOWS)
+
+#endif // ASIO_DETAIL_WIN_MUTEX_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_object_handle_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_object_handle_service.hpp
new file mode 100644
index 00000000000..3decb0dbc2b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_object_handle_service.hpp
@@ -0,0 +1,195 @@
+//
+// detail/win_object_handle_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2011 Boris Schaeling (boris@highscore.de)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_OBJECT_HANDLE_SERVICE_HPP
+#define ASIO_DETAIL_WIN_OBJECT_HANDLE_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_WINDOWS_OBJECT_HANDLE)
+
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/wait_handler.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_io_context.hpp"
+#else // defined(ASIO_HAS_IOCP)
+# include "asio/detail/scheduler.hpp"
+#endif // defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class win_object_handle_service :
+  public execution_context_service_base<win_object_handle_service>
+{
+public:
+  // The native type of an object handle.
+  typedef HANDLE native_handle_type;
+
+  // The implementation type of the object handle.
+  class implementation_type
+  {
+   public:
+    // Default constructor.
+    implementation_type()
+      : handle_(INVALID_HANDLE_VALUE),
+        wait_handle_(INVALID_HANDLE_VALUE),
+        owner_(0),
+        next_(0),
+        prev_(0)
+    {
+    }
+
+  private:
+    // Only this service will have access to the internal values.
+    friend class win_object_handle_service;
+
+    // The native object handle representation. May be accessed or modified
+    // without locking the mutex.
+    native_handle_type handle_;
+
+    // The handle used to unregister the wait operation. The mutex must be
+    // locked when accessing or modifying this member.
+    HANDLE wait_handle_;
+
+    // The operations waiting on the object handle. If there is a registered
+    // wait then the mutex must be locked when accessing or modifying this
+    // member
+    op_queue<wait_op> op_queue_;
+
+    // The service instance that owns the object handle implementation.
+    win_object_handle_service* owner_;
+
+    // Pointers to adjacent handle implementations in linked list. The mutex
+    // must be locked when accessing or modifying these members.
+    implementation_type* next_;
+    implementation_type* prev_;
+  };
+
+  // Constructor.
+  ASIO_DECL win_object_handle_service(execution_context& context);
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Construct a new handle implementation.
+  ASIO_DECL void construct(implementation_type& impl);
+
+  // Move-construct a new handle implementation.
+  ASIO_DECL void move_construct(implementation_type& impl,
+      implementation_type& other_impl);
+
+  // Move-assign from another handle implementation.
+  ASIO_DECL void move_assign(implementation_type& impl,
+      win_object_handle_service& other_service,
+      implementation_type& other_impl);
+
+  // Destroy a handle implementation.
+  ASIO_DECL void destroy(implementation_type& impl);
+
+  // Assign a native handle to a handle implementation.
+  ASIO_DECL asio::error_code assign(implementation_type& impl,
+      const native_handle_type& handle, asio::error_code& ec);
+
+  // Determine whether the handle is open.
+  bool is_open(const implementation_type& impl) const
+  {
+    return impl.handle_ != INVALID_HANDLE_VALUE && impl.handle_ != 0;
+  }
+
+  // Destroy a handle implementation.
+  ASIO_DECL asio::error_code close(implementation_type& impl,
+      asio::error_code& ec);
+
+  // Get the native handle representation.
+  native_handle_type native_handle(const implementation_type& impl) const
+  {
+    return impl.handle_;
+  }
+
+  // Cancel all operations associated with the handle.
+  ASIO_DECL asio::error_code cancel(implementation_type& impl,
+      asio::error_code& ec);
+
+  // Perform a synchronous wait for the object to enter a signalled state.
+  ASIO_DECL void wait(implementation_type& impl,
+      asio::error_code& ec);
+
+  /// Start an asynchronous wait.
+  template <typename Handler, typename IoExecutor>
+  void async_wait(implementation_type& impl,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    // Allocate and construct an operation to wrap the handler.
+    typedef wait_handler<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((scheduler_.context(), *p.p, "object_handle",
+          &impl, reinterpret_cast<uintmax_t>(impl.wait_handle_), "async_wait"));
+
+    start_wait_op(impl, p.p);
+    p.v = p.p = 0;
+  }
+
+private:
+  // Helper function to start an asynchronous wait operation.
+  ASIO_DECL void start_wait_op(implementation_type& impl, wait_op* op);
+
+  // Helper function to register a wait operation.
+  ASIO_DECL void register_wait_callback(
+      implementation_type& impl, mutex::scoped_lock& lock);
+
+  // Callback function invoked when the registered wait completes.
+  static ASIO_DECL VOID CALLBACK wait_callback(
+      PVOID param, BOOLEAN timeout);
+
+  // The scheduler used to post completions.
+#if defined(ASIO_HAS_IOCP)
+  typedef class win_iocp_io_context scheduler_impl;
+#else
+  typedef class scheduler scheduler_impl;
+#endif
+  scheduler_impl& scheduler_;
+
+  // Mutex to protect access to internal state.
+  mutex mutex_;
+
+  // The head of a linked list of all implementations.
+  implementation_type* impl_list_;
+
+  // Flag to indicate that the dispatcher has been shut down.
+  bool shutdown_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/win_object_handle_service.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_WINDOWS_OBJECT_HANDLE)
+
+#endif // ASIO_DETAIL_WIN_OBJECT_HANDLE_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_static_mutex.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_static_mutex.hpp
new file mode 100644
index 00000000000..81eda8224c3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_static_mutex.hpp
@@ -0,0 +1,74 @@
+//
+// detail/win_static_mutex.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_STATIC_MUTEX_HPP
+#define ASIO_DETAIL_WIN_STATIC_MUTEX_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS)
+
+#include "asio/detail/scoped_lock.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+struct win_static_mutex
+{
+  typedef asio::detail::scoped_lock<win_static_mutex> scoped_lock;
+
+  // Initialise the mutex.
+  ASIO_DECL void init();
+
+  // Initialisation must be performed in a separate function to the "public"
+  // init() function since the compiler does not support the use of structured
+  // exceptions and C++ exceptions in the same function.
+  ASIO_DECL int do_init();
+
+  // Lock the mutex.
+  void lock()
+  {
+    ::EnterCriticalSection(&crit_section_);
+  }
+
+  // Unlock the mutex.
+  void unlock()
+  {
+    ::LeaveCriticalSection(&crit_section_);
+  }
+
+  bool initialised_;
+  ::CRITICAL_SECTION crit_section_;
+};
+
+#if defined(UNDER_CE)
+# define ASIO_WIN_STATIC_MUTEX_INIT { false, { 0, 0, 0, 0, 0 } }
+#else // defined(UNDER_CE)
+# define ASIO_WIN_STATIC_MUTEX_INIT { false, { 0, 0, 0, 0, 0, 0 } }
+#endif // defined(UNDER_CE)
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/win_static_mutex.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_WINDOWS)
+
+#endif // ASIO_DETAIL_WIN_STATIC_MUTEX_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_thread.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_thread.hpp
new file mode 100644
index 00000000000..ddba812ccc2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_thread.hpp
@@ -0,0 +1,147 @@
+//
+// detail/win_thread.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_THREAD_HPP
+#define ASIO_DETAIL_WIN_THREAD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS) \
+  && !defined(ASIO_WINDOWS_APP) \
+  && !defined(UNDER_CE)
+
+#include <cstddef>
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+ASIO_DECL unsigned int __stdcall win_thread_function(void* arg);
+
+#if defined(WINVER) && (WINVER < 0x0500)
+ASIO_DECL void __stdcall apc_function(ULONG data);
+#else
+ASIO_DECL void __stdcall apc_function(ULONG_PTR data);
+#endif
+
+template <typename T>
+class win_thread_base
+{
+public:
+  static bool terminate_threads()
+  {
+    return ::InterlockedExchangeAdd(&terminate_threads_, 0) != 0;
+  }
+
+  static void set_terminate_threads(bool b)
+  {
+    ::InterlockedExchange(&terminate_threads_, b ? 1 : 0);
+  }
+
+private:
+  static long terminate_threads_;
+};
+
+template <typename T>
+long win_thread_base<T>::terminate_threads_ = 0;
+
+class win_thread
+  : private noncopyable,
+    public win_thread_base<win_thread>
+{
+public:
+  // Constructor.
+  template <typename Function>
+  win_thread(Function f, unsigned int stack_size = 0)
+    : thread_(0),
+      exit_event_(0)
+  {
+    start_thread(new func<Function>(f), stack_size);
+  }
+
+  // Destructor.
+  ASIO_DECL ~win_thread();
+
+  // Wait for the thread to exit.
+  ASIO_DECL void join();
+
+  // Get number of CPUs.
+  ASIO_DECL static std::size_t hardware_concurrency();
+
+private:
+  friend ASIO_DECL unsigned int __stdcall win_thread_function(void* arg);
+
+#if defined(WINVER) && (WINVER < 0x0500)
+  friend ASIO_DECL void __stdcall apc_function(ULONG);
+#else
+  friend ASIO_DECL void __stdcall apc_function(ULONG_PTR);
+#endif
+
+  class func_base
+  {
+  public:
+    virtual ~func_base() {}
+    virtual void run() = 0;
+    ::HANDLE entry_event_;
+    ::HANDLE exit_event_;
+  };
+
+  struct auto_func_base_ptr
+  {
+    func_base* ptr;
+    ~auto_func_base_ptr() { delete ptr; }
+  };
+
+  template <typename Function>
+  class func
+    : public func_base
+  {
+  public:
+    func(Function f)
+      : f_(f)
+    {
+    }
+
+    virtual void run()
+    {
+      f_();
+    }
+
+  private:
+    Function f_;
+  };
+
+  ASIO_DECL void start_thread(func_base* arg, unsigned int stack_size);
+
+  ::HANDLE thread_;
+  ::HANDLE exit_event_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/win_thread.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_WINDOWS)
+       // && !defined(ASIO_WINDOWS_APP)
+       // && !defined(UNDER_CE)
+
+#endif // ASIO_DETAIL_WIN_THREAD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_tss_ptr.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_tss_ptr.hpp
new file mode 100644
index 00000000000..dbe8b78e9ba
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/win_tss_ptr.hpp
@@ -0,0 +1,79 @@
+//
+// detail/win_tss_ptr.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WIN_TSS_PTR_HPP
+#define ASIO_DETAIL_WIN_TSS_PTR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS)
+
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Helper function to create thread-specific storage.
+ASIO_DECL DWORD win_tss_ptr_create();
+
+template <typename T>
+class win_tss_ptr
+  : private noncopyable
+{
+public:
+  // Constructor.
+  win_tss_ptr()
+    : tss_key_(win_tss_ptr_create())
+  {
+  }
+
+  // Destructor.
+  ~win_tss_ptr()
+  {
+    ::TlsFree(tss_key_);
+  }
+
+  // Get the value.
+  operator T*() const
+  {
+    return static_cast<T*>(::TlsGetValue(tss_key_));
+  }
+
+  // Set the value.
+  void operator=(T* value)
+  {
+    ::TlsSetValue(tss_key_, value);
+  }
+
+private:
+  // Thread-specific storage to allow unlocked access to determine whether a
+  // thread is a member of the pool.
+  DWORD tss_key_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/win_tss_ptr.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_WINDOWS)
+
+#endif // ASIO_DETAIL_WIN_TSS_PTR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winapp_thread.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winapp_thread.hpp
new file mode 100644
index 00000000000..aac44cde971
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winapp_thread.hpp
@@ -0,0 +1,124 @@
+//
+// detail/winapp_thread.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINAPP_THREAD_HPP
+#define ASIO_DETAIL_WINAPP_THREAD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS) && defined(ASIO_WINDOWS_APP)
+
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/scoped_ptr.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+DWORD WINAPI winapp_thread_function(LPVOID arg);
+
+class winapp_thread
+  : private noncopyable
+{
+public:
+  // Constructor.
+  template <typename Function>
+  winapp_thread(Function f, unsigned int = 0)
+  {
+    scoped_ptr<func_base> arg(new func<Function>(f));
+    DWORD thread_id = 0;
+    thread_ = ::CreateThread(0, 0, winapp_thread_function,
+        arg.get(), 0, &thread_id);
+    if (!thread_)
+    {
+      DWORD last_error = ::GetLastError();
+      asio::error_code ec(last_error,
+          asio::error::get_system_category());
+      asio::detail::throw_error(ec, "thread");
+    }
+    arg.release();
+  }
+
+  // Destructor.
+  ~winapp_thread()
+  {
+    ::CloseHandle(thread_);
+  }
+
+  // Wait for the thread to exit.
+  void join()
+  {
+    ::WaitForSingleObjectEx(thread_, INFINITE, false);
+  }
+
+  // Get number of CPUs.
+  static std::size_t hardware_concurrency()
+  {
+    SYSTEM_INFO system_info;
+    ::GetNativeSystemInfo(&system_info);
+    return system_info.dwNumberOfProcessors;
+  }
+
+private:
+  friend DWORD WINAPI winapp_thread_function(LPVOID arg);
+
+  class func_base
+  {
+  public:
+    virtual ~func_base() {}
+    virtual void run() = 0;
+  };
+
+  template <typename Function>
+  class func
+    : public func_base
+  {
+  public:
+    func(Function f)
+      : f_(f)
+    {
+    }
+
+    virtual void run()
+    {
+      f_();
+    }
+
+  private:
+    Function f_;
+  };
+
+  ::HANDLE thread_;
+};
+
+inline DWORD WINAPI winapp_thread_function(LPVOID arg)
+{
+  scoped_ptr<winapp_thread::func_base> func(
+      static_cast<winapp_thread::func_base*>(arg));
+  func->run();
+  return 0;
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS) && defined(ASIO_WINDOWS_APP)
+
+#endif // ASIO_DETAIL_WINAPP_THREAD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wince_thread.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wince_thread.hpp
new file mode 100644
index 00000000000..c23866441a0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wince_thread.hpp
@@ -0,0 +1,124 @@
+//
+// detail/wince_thread.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINCE_THREAD_HPP
+#define ASIO_DETAIL_WINCE_THREAD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS) && defined(UNDER_CE)
+
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/scoped_ptr.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+DWORD WINAPI wince_thread_function(LPVOID arg);
+
+class wince_thread
+  : private noncopyable
+{
+public:
+  // Constructor.
+  template <typename Function>
+  wince_thread(Function f, unsigned int = 0)
+  {
+    scoped_ptr<func_base> arg(new func<Function>(f));
+    DWORD thread_id = 0;
+    thread_ = ::CreateThread(0, 0, wince_thread_function,
+        arg.get(), 0, &thread_id);
+    if (!thread_)
+    {
+      DWORD last_error = ::GetLastError();
+      asio::error_code ec(last_error,
+          asio::error::get_system_category());
+      asio::detail::throw_error(ec, "thread");
+    }
+    arg.release();
+  }
+
+  // Destructor.
+  ~wince_thread()
+  {
+    ::CloseHandle(thread_);
+  }
+
+  // Wait for the thread to exit.
+  void join()
+  {
+    ::WaitForSingleObject(thread_, INFINITE);
+  }
+
+  // Get number of CPUs.
+  static std::size_t hardware_concurrency()
+  {
+    SYSTEM_INFO system_info;
+    ::GetSystemInfo(&system_info);
+    return system_info.dwNumberOfProcessors;
+  }
+
+private:
+  friend DWORD WINAPI wince_thread_function(LPVOID arg);
+
+  class func_base
+  {
+  public:
+    virtual ~func_base() {}
+    virtual void run() = 0;
+  };
+
+  template <typename Function>
+  class func
+    : public func_base
+  {
+  public:
+    func(Function f)
+      : f_(f)
+    {
+    }
+
+    virtual void run()
+    {
+      f_();
+    }
+
+  private:
+    Function f_;
+  };
+
+  ::HANDLE thread_;
+};
+
+inline DWORD WINAPI wince_thread_function(LPVOID arg)
+{
+  scoped_ptr<wince_thread::func_base> func(
+      static_cast<wince_thread::func_base*>(arg));
+  func->run();
+  return 0;
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS) && defined(UNDER_CE)
+
+#endif // ASIO_DETAIL_WINCE_THREAD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_async_manager.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_async_manager.hpp
new file mode 100644
index 00000000000..cf624bafb69
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_async_manager.hpp
@@ -0,0 +1,305 @@
+//
+// detail/winrt_async_manager.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINRT_ASYNC_MANAGER_HPP
+#define ASIO_DETAIL_WINRT_ASYNC_MANAGER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include <future>
+#include "asio/detail/atomic_count.hpp"
+#include "asio/detail/winrt_async_op.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_io_context.hpp"
+#else // defined(ASIO_HAS_IOCP)
+# include "asio/detail/scheduler.hpp"
+#endif // defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class winrt_async_manager
+  : public execution_context_service_base<winrt_async_manager>
+{
+public:
+  // Constructor.
+  winrt_async_manager(execution_context& context)
+    : execution_context_service_base<winrt_async_manager>(context),
+      scheduler_(use_service<scheduler_impl>(context)),
+      outstanding_ops_(1)
+  {
+  }
+
+  // Destructor.
+  ~winrt_async_manager()
+  {
+  }
+
+  // Destroy all user-defined handler objects owned by the service.
+  void shutdown()
+  {
+    if (--outstanding_ops_ > 0)
+    {
+      // Block until last operation is complete.
+      std::future<void> f = promise_.get_future();
+      f.wait();
+    }
+  }
+
+  void sync(Windows::Foundation::IAsyncAction^ action,
+      asio::error_code& ec)
+  {
+    using namespace Windows::Foundation;
+    using Windows::Foundation::AsyncStatus;
+
+    auto promise = std::make_shared<std::promise<asio::error_code>>();
+    auto future = promise->get_future();
+
+    action->Completed = ref new AsyncActionCompletedHandler(
+      [promise](IAsyncAction^ action, AsyncStatus status)
+      {
+        switch (status)
+        {
+        case AsyncStatus::Canceled:
+          promise->set_value(asio::error::operation_aborted);
+          break;
+        case AsyncStatus::Error:
+        case AsyncStatus::Completed:
+        default:
+          asio::error_code ec(
+              action->ErrorCode.Value,
+              asio::system_category());
+          promise->set_value(ec);
+          break;
+        }
+      });
+
+    ec = future.get();
+  }
+
+  template <typename TResult>
+  TResult sync(Windows::Foundation::IAsyncOperation<TResult>^ operation,
+      asio::error_code& ec)
+  {
+    using namespace Windows::Foundation;
+    using Windows::Foundation::AsyncStatus;
+
+    auto promise = std::make_shared<std::promise<asio::error_code>>();
+    auto future = promise->get_future();
+
+    operation->Completed = ref new AsyncOperationCompletedHandler<TResult>(
+      [promise](IAsyncOperation<TResult>^ operation, AsyncStatus status)
+      {
+        switch (status)
+        {
+        case AsyncStatus::Canceled:
+          promise->set_value(asio::error::operation_aborted);
+          break;
+        case AsyncStatus::Error:
+        case AsyncStatus::Completed:
+        default:
+          asio::error_code ec(
+              operation->ErrorCode.Value,
+              asio::system_category());
+          promise->set_value(ec);
+          break;
+        }
+      });
+
+    ec = future.get();
+    return operation->GetResults();
+  }
+
+  template <typename TResult, typename TProgress>
+  TResult sync(
+      Windows::Foundation::IAsyncOperationWithProgress<
+        TResult, TProgress>^ operation,
+      asio::error_code& ec)
+  {
+    using namespace Windows::Foundation;
+    using Windows::Foundation::AsyncStatus;
+
+    auto promise = std::make_shared<std::promise<asio::error_code>>();
+    auto future = promise->get_future();
+
+    operation->Completed
+      = ref new AsyncOperationWithProgressCompletedHandler<TResult, TProgress>(
+        [promise](IAsyncOperationWithProgress<TResult, TProgress>^ operation,
+          AsyncStatus status)
+        {
+          switch (status)
+          {
+          case AsyncStatus::Canceled:
+            promise->set_value(asio::error::operation_aborted);
+            break;
+          case AsyncStatus::Started:
+            break;
+          case AsyncStatus::Error:
+          case AsyncStatus::Completed:
+          default:
+            asio::error_code ec(
+                operation->ErrorCode.Value,
+                asio::system_category());
+            promise->set_value(ec);
+            break;
+          }
+        });
+
+    ec = future.get();
+    return operation->GetResults();
+  }
+
+  void async(Windows::Foundation::IAsyncAction^ action,
+      winrt_async_op<void>* handler)
+  {
+    using namespace Windows::Foundation;
+    using Windows::Foundation::AsyncStatus;
+
+    auto on_completed = ref new AsyncActionCompletedHandler(
+      [this, handler](IAsyncAction^ action, AsyncStatus status)
+      {
+        switch (status)
+        {
+        case AsyncStatus::Canceled:
+          handler->ec_ = asio::error::operation_aborted;
+          break;
+        case AsyncStatus::Started:
+          return;
+        case AsyncStatus::Completed:
+        case AsyncStatus::Error:
+        default:
+          handler->ec_ = asio::error_code(
+              action->ErrorCode.Value,
+              asio::system_category());
+          break;
+        }
+        scheduler_.post_deferred_completion(handler);
+        if (--outstanding_ops_ == 0)
+          promise_.set_value();
+      });
+
+    scheduler_.work_started();
+    ++outstanding_ops_;
+    action->Completed = on_completed;
+  }
+
+  template <typename TResult>
+  void async(Windows::Foundation::IAsyncOperation<TResult>^ operation,
+      winrt_async_op<TResult>* handler)
+  {
+    using namespace Windows::Foundation;
+    using Windows::Foundation::AsyncStatus;
+
+    auto on_completed = ref new AsyncOperationCompletedHandler<TResult>(
+      [this, handler](IAsyncOperation<TResult>^ operation, AsyncStatus status)
+      {
+        switch (status)
+        {
+        case AsyncStatus::Canceled:
+          handler->ec_ = asio::error::operation_aborted;
+          break;
+        case AsyncStatus::Started:
+          return;
+        case AsyncStatus::Completed:
+          handler->result_ = operation->GetResults();
+          // Fall through.
+        case AsyncStatus::Error:
+        default:
+          handler->ec_ = asio::error_code(
+              operation->ErrorCode.Value,
+              asio::system_category());
+          break;
+        }
+        scheduler_.post_deferred_completion(handler);
+        if (--outstanding_ops_ == 0)
+          promise_.set_value();
+      });
+
+    scheduler_.work_started();
+    ++outstanding_ops_;
+    operation->Completed = on_completed;
+  }
+
+  template <typename TResult, typename TProgress>
+  void async(
+      Windows::Foundation::IAsyncOperationWithProgress<
+        TResult, TProgress>^ operation,
+      winrt_async_op<TResult>* handler)
+  {
+    using namespace Windows::Foundation;
+    using Windows::Foundation::AsyncStatus;
+
+    auto on_completed
+      = ref new AsyncOperationWithProgressCompletedHandler<TResult, TProgress>(
+        [this, handler](IAsyncOperationWithProgress<
+          TResult, TProgress>^ operation, AsyncStatus status)
+        {
+          switch (status)
+          {
+          case AsyncStatus::Canceled:
+            handler->ec_ = asio::error::operation_aborted;
+            break;
+          case AsyncStatus::Started:
+            return;
+          case AsyncStatus::Completed:
+            handler->result_ = operation->GetResults();
+            // Fall through.
+          case AsyncStatus::Error:
+          default:
+            handler->ec_ = asio::error_code(
+                operation->ErrorCode.Value,
+                asio::system_category());
+            break;
+          }
+          scheduler_.post_deferred_completion(handler);
+          if (--outstanding_ops_ == 0)
+            promise_.set_value();
+        });
+
+    scheduler_.work_started();
+    ++outstanding_ops_;
+    operation->Completed = on_completed;
+  }
+
+private:
+  // The scheduler implementation used to post completed handlers.
+#if defined(ASIO_HAS_IOCP)
+  typedef class win_iocp_io_context scheduler_impl;
+#else
+  typedef class scheduler scheduler_impl;
+#endif
+  scheduler_impl& scheduler_;
+
+  // Count of outstanding operations.
+  atomic_count outstanding_ops_;
+
+  // Used to keep wait for outstanding operations to complete.
+  std::promise<void> promise_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_WINRT_ASYNC_MANAGER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_async_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_async_op.hpp
new file mode 100644
index 00000000000..f90f26f9f11
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_async_op.hpp
@@ -0,0 +1,65 @@
+//
+// detail/winrt_async_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINRT_ASYNC_OP_HPP
+#define ASIO_DETAIL_WINRT_ASYNC_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/operation.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename TResult>
+class winrt_async_op
+  : public operation
+{
+public:
+  // The error code to be passed to the completion handler.
+  asio::error_code ec_;
+
+  // The result of the operation, to be passed to the completion handler.
+  TResult result_;
+
+protected:
+  winrt_async_op(func_type complete_func)
+    : operation(complete_func),
+      result_()
+  {
+  }
+};
+
+template <>
+class winrt_async_op<void>
+  : public operation
+{
+public:
+  // The error code to be passed to the completion handler.
+  asio::error_code ec_;
+
+protected:
+  winrt_async_op(func_type complete_func)
+    : operation(complete_func)
+  {
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_WINRT_ASYNC_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_resolve_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_resolve_op.hpp
new file mode 100644
index 00000000000..c6e9bc7b3d6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_resolve_op.hpp
@@ -0,0 +1,121 @@
+//
+// detail/winrt_resolve_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINRT_RESOLVE_OP_HPP
+#define ASIO_DETAIL_WINRT_RESOLVE_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/winrt_async_op.hpp"
+#include "asio/ip/basic_resolver_results.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Protocol, typename Handler, typename IoExecutor>
+class winrt_resolve_op :
+  public winrt_async_op<
+    Windows::Foundation::Collections::IVectorView<
+      Windows::Networking::EndpointPair^>^>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(winrt_resolve_op);
+
+  typedef typename Protocol::endpoint endpoint_type;
+  typedef asio::ip::basic_resolver_query<Protocol> query_type;
+  typedef asio::ip::basic_resolver_results<Protocol> results_type;
+
+  winrt_resolve_op(const query_type& query,
+      Handler& handler, const IoExecutor& io_ex)
+    : winrt_async_op<
+        Windows::Foundation::Collections::IVectorView<
+          Windows::Networking::EndpointPair^>^>(
+            &winrt_resolve_op::do_complete),
+      query_(query),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code&, std::size_t)
+  {
+    // Take ownership of the operation object.
+    winrt_resolve_op* o(static_cast<winrt_resolve_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    results_type results = results_type();
+    if (!o->ec_)
+    {
+      try
+      {
+        results = results_type::create(o->result_, o->query_.hints(),
+            o->query_.host_name(), o->query_.service_name());
+      }
+      catch (Platform::Exception^ e)
+      {
+        o->ec_ = asio::error_code(e->HResult,
+            asio::system_category());
+      }
+    }
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, results_type>
+      handler(o->handler_, o->ec_, results);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, "..."));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  query_type query_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_WINRT_RESOLVE_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_resolver_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_resolver_service.hpp
new file mode 100644
index 00000000000..1f4b70a28e1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_resolver_service.hpp
@@ -0,0 +1,212 @@
+//
+// detail/winrt_resolver_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINRT_RESOLVER_SERVICE_HPP
+#define ASIO_DETAIL_WINRT_RESOLVER_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/ip/basic_resolver_query.hpp"
+#include "asio/ip/basic_resolver_results.hpp"
+#include "asio/post.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/winrt_async_manager.hpp"
+#include "asio/detail/winrt_resolve_op.hpp"
+#include "asio/detail/winrt_utils.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_io_context.hpp"
+#else // defined(ASIO_HAS_IOCP)
+# include "asio/detail/scheduler.hpp"
+#endif // defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Protocol>
+class winrt_resolver_service :
+  public execution_context_service_base<winrt_resolver_service<Protocol> >
+{
+public:
+  // The implementation type of the resolver. A cancellation token is used to
+  // indicate to the asynchronous operation that the operation has been
+  // cancelled.
+  typedef socket_ops::shared_cancel_token_type implementation_type;
+
+  // The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  // The query type.
+  typedef asio::ip::basic_resolver_query<Protocol> query_type;
+
+  // The results type.
+  typedef asio::ip::basic_resolver_results<Protocol> results_type;
+
+  // Constructor.
+  winrt_resolver_service(execution_context& context)
+    : execution_context_service_base<
+        winrt_resolver_service<Protocol> >(context),
+      scheduler_(use_service<scheduler_impl>(context)),
+      async_manager_(use_service<winrt_async_manager>(context))
+  {
+  }
+
+  // Destructor.
+  ~winrt_resolver_service()
+  {
+  }
+
+  // Destroy all user-defined handler objects owned by the service.
+  void shutdown()
+  {
+  }
+
+  // Perform any fork-related housekeeping.
+  void notify_fork(execution_context::fork_event)
+  {
+  }
+
+  // Construct a new resolver implementation.
+  void construct(implementation_type&)
+  {
+  }
+
+  // Move-construct a new resolver implementation.
+  void move_construct(implementation_type&,
+      implementation_type&)
+  {
+  }
+
+  // Move-assign from another resolver implementation.
+  void move_assign(implementation_type&,
+      winrt_resolver_service&, implementation_type&)
+  {
+  }
+
+  // Destroy a resolver implementation.
+  void destroy(implementation_type&)
+  {
+  }
+
+  // Cancel pending asynchronous operations.
+  void cancel(implementation_type&)
+  {
+  }
+
+  // Resolve a query to a list of entries.
+  results_type resolve(implementation_type&,
+      const query_type& query, asio::error_code& ec)
+  {
+    try
+    {
+      using namespace Windows::Networking::Sockets;
+      auto endpoint_pairs = async_manager_.sync(
+          DatagramSocket::GetEndpointPairsAsync(
+            winrt_utils::host_name(query.host_name()),
+            winrt_utils::string(query.service_name())), ec);
+
+      if (ec)
+        return results_type();
+
+      return results_type::create(
+          endpoint_pairs, query.hints(),
+          query.host_name(), query.service_name());
+    }
+    catch (Platform::Exception^ e)
+    {
+      ec = asio::error_code(e->HResult,
+          asio::system_category());
+      return results_type();
+    }
+  }
+
+  // Asynchronously resolve a query to a list of entries.
+  template <typename Handler, typename IoExecutor>
+  void async_resolve(implementation_type& impl, const query_type& query,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef winrt_resolve_op<Protocol, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(query, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((scheduler_.context(),
+          *p.p, "resolver", &impl, 0, "async_resolve"));
+    (void)impl;
+
+    try
+    {
+      using namespace Windows::Networking::Sockets;
+      async_manager_.async(DatagramSocket::GetEndpointPairsAsync(
+            winrt_utils::host_name(query.host_name()),
+            winrt_utils::string(query.service_name())), p.p);
+      p.v = p.p = 0;
+    }
+    catch (Platform::Exception^ e)
+    {
+      p.p->ec_ = asio::error_code(
+          e->HResult, asio::system_category());
+      scheduler_.post_immediate_completion(p.p, is_continuation);
+      p.v = p.p = 0;
+    }
+  }
+
+  // Resolve an endpoint to a list of entries.
+  results_type resolve(implementation_type&,
+      const endpoint_type&, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return results_type();
+  }
+
+  // Asynchronously resolve an endpoint to a list of entries.
+  template <typename Handler, typename IoExecutor>
+  void async_resolve(implementation_type&, const endpoint_type&,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const results_type results;
+    asio::post(io_ex, detail::bind_handler(handler, ec, results));
+  }
+
+private:
+  // The scheduler implementation used for delivering completions.
+#if defined(ASIO_HAS_IOCP)
+  typedef class win_iocp_io_context scheduler_impl;
+#else
+  typedef class scheduler scheduler_impl;
+#endif
+  scheduler_impl& scheduler_;
+
+  winrt_async_manager& async_manager_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_WINRT_RESOLVER_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_socket_connect_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_socket_connect_op.hpp
new file mode 100644
index 00000000000..c5ef90f8edc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_socket_connect_op.hpp
@@ -0,0 +1,94 @@
+//
+// detail/winrt_socket_connect_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINRT_SOCKET_CONNECT_OP_HPP
+#define ASIO_DETAIL_WINRT_SOCKET_CONNECT_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/winrt_async_op.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler, typename IoExecutor>
+class winrt_socket_connect_op :
+  public winrt_async_op<void>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(winrt_socket_connect_op);
+
+  winrt_socket_connect_op(Handler& handler, const IoExecutor& io_ex)
+    : winrt_async_op<void>(&winrt_socket_connect_op::do_complete),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code&, std::size_t)
+  {
+    // Take ownership of the operation object.
+    winrt_socket_connect_op* o(static_cast<winrt_socket_connect_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder1<Handler, asio::error_code>
+      handler(o->handler_, o->ec_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_WINRT_SOCKET_CONNECT_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_socket_recv_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_socket_recv_op.hpp
new file mode 100644
index 00000000000..613edab0c6e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_socket_recv_op.hpp
@@ -0,0 +1,115 @@
+//
+// detail/winrt_socket_recv_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINRT_SOCKET_RECV_OP_HPP
+#define ASIO_DETAIL_WINRT_SOCKET_RECV_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/winrt_async_op.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename MutableBufferSequence, typename Handler, typename IoExecutor>
+class winrt_socket_recv_op :
+  public winrt_async_op<Windows::Storage::Streams::IBuffer^>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(winrt_socket_recv_op);
+
+  winrt_socket_recv_op(const MutableBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+    : winrt_async_op<Windows::Storage::Streams::IBuffer^>(
+          &winrt_socket_recv_op::do_complete),
+      buffers_(buffers),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code&, std::size_t)
+  {
+    // Take ownership of the operation object.
+    winrt_socket_recv_op* o(static_cast<winrt_socket_recv_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+    // Check whether buffers are still valid.
+    if (owner)
+    {
+      buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::validate(o->buffers_);
+    }
+#endif // defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+
+    std::size_t bytes_transferred = o->result_ ? o->result_->Length : 0;
+    if (bytes_transferred == 0 && !o->ec_ &&
+        !buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::all_empty(o->buffers_))
+    {
+      o->ec_ = asio::error::eof;
+    }
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, o->ec_, bytes_transferred);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  MutableBufferSequence buffers_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_WINRT_SOCKET_RECV_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_socket_send_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_socket_send_op.hpp
new file mode 100644
index 00000000000..c19254a29a8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_socket_send_op.hpp
@@ -0,0 +1,106 @@
+//
+// detail/winrt_socket_send_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINRT_SOCKET_SEND_OP_HPP
+#define ASIO_DETAIL_WINRT_SOCKET_SEND_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/winrt_async_op.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+class winrt_socket_send_op :
+  public winrt_async_op<unsigned int>
+{
+public:
+  ASIO_DEFINE_HANDLER_PTR(winrt_socket_send_op);
+
+  winrt_socket_send_op(const ConstBufferSequence& buffers,
+      Handler& handler, const IoExecutor& io_ex)
+    : winrt_async_op<unsigned int>(&winrt_socket_send_op::do_complete),
+      buffers_(buffers),
+      handler_(ASIO_MOVE_CAST(Handler)(handler)),
+      io_executor_(io_ex)
+  {
+    handler_work<Handler, IoExecutor>::start(handler_, io_executor_);
+  }
+
+  static void do_complete(void* owner, operation* base,
+      const asio::error_code&, std::size_t)
+  {
+    // Take ownership of the operation object.
+    winrt_socket_send_op* o(static_cast<winrt_socket_send_op*>(base));
+    ptr p = { asio::detail::addressof(o->handler_), o, o };
+    handler_work<Handler, IoExecutor> w(o->handler_, o->io_executor_);
+
+    ASIO_HANDLER_COMPLETION((*o));
+
+#if defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+    // Check whether buffers are still valid.
+    if (owner)
+    {
+      buffer_sequence_adapter<asio::const_buffer,
+          ConstBufferSequence>::validate(o->buffers_);
+    }
+#endif // defined(ASIO_ENABLE_BUFFER_DEBUGGING)
+
+    // Make a copy of the handler so that the memory can be deallocated before
+    // the upcall is made. Even if we're not about to make an upcall, a
+    // sub-object of the handler may be the true owner of the memory associated
+    // with the handler. Consequently, a local copy of the handler is required
+    // to ensure that any owning sub-object remains valid until after we have
+    // deallocated the memory here.
+    detail::binder2<Handler, asio::error_code, std::size_t>
+      handler(o->handler_, o->ec_, o->result_);
+    p.h = asio::detail::addressof(handler.handler_);
+    p.reset();
+
+    // Make the upcall if required.
+    if (owner)
+    {
+      fenced_block b(fenced_block::half);
+      ASIO_HANDLER_INVOCATION_BEGIN((handler.arg1_, handler.arg2_));
+      w.complete(handler, handler.handler_);
+      ASIO_HANDLER_INVOCATION_END;
+    }
+  }
+
+private:
+  ConstBufferSequence buffers_;
+  Handler handler_;
+  IoExecutor io_executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_WINRT_SOCKET_SEND_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_ssocket_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_ssocket_service.hpp
new file mode 100644
index 00000000000..2b3163dc9ee
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_ssocket_service.hpp
@@ -0,0 +1,250 @@
+//
+// detail/winrt_ssocket_service.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINRT_SSOCKET_SERVICE_HPP
+#define ASIO_DETAIL_WINRT_SSOCKET_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/winrt_socket_connect_op.hpp"
+#include "asio/detail/winrt_ssocket_service_base.hpp"
+#include "asio/detail/winrt_utils.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Protocol>
+class winrt_ssocket_service :
+  public execution_context_service_base<winrt_ssocket_service<Protocol> >,
+  public winrt_ssocket_service_base
+{
+public:
+  // The protocol type.
+  typedef Protocol protocol_type;
+
+  // The endpoint type.
+  typedef typename Protocol::endpoint endpoint_type;
+
+  // The native type of a socket.
+  typedef Windows::Networking::Sockets::StreamSocket^ native_handle_type;
+
+  // The implementation type of the socket.
+  struct implementation_type : base_implementation_type
+  {
+    // Default constructor.
+    implementation_type()
+      : base_implementation_type(),
+        protocol_(endpoint_type().protocol())
+    {
+    }
+
+    // The protocol associated with the socket.
+    protocol_type protocol_;
+  };
+
+  // Constructor.
+  winrt_ssocket_service(execution_context& context)
+    : execution_context_service_base<winrt_ssocket_service<Protocol> >(context),
+      winrt_ssocket_service_base(context)
+  {
+  }
+
+  // Destroy all user-defined handler objects owned by the service.
+  void shutdown()
+  {
+    this->base_shutdown();
+  }
+
+  // Move-construct a new socket implementation.
+  void move_construct(implementation_type& impl,
+      implementation_type& other_impl) ASIO_NOEXCEPT
+  {
+    this->base_move_construct(impl, other_impl);
+
+    impl.protocol_ = other_impl.protocol_;
+    other_impl.protocol_ = endpoint_type().protocol();
+  }
+
+  // Move-assign from another socket implementation.
+  void move_assign(implementation_type& impl,
+      winrt_ssocket_service& other_service,
+      implementation_type& other_impl)
+  {
+    this->base_move_assign(impl, other_service, other_impl);
+
+    impl.protocol_ = other_impl.protocol_;
+    other_impl.protocol_ = endpoint_type().protocol();
+  }
+
+  // Move-construct a new socket implementation from another protocol type.
+  template <typename Protocol1>
+  void converting_move_construct(implementation_type& impl,
+      winrt_ssocket_service<Protocol1>&,
+      typename winrt_ssocket_service<
+        Protocol1>::implementation_type& other_impl)
+  {
+    this->base_move_construct(impl, other_impl);
+
+    impl.protocol_ = protocol_type(other_impl.protocol_);
+    other_impl.protocol_ = typename Protocol1::endpoint().protocol();
+  }
+
+  // Open a new socket implementation.
+  asio::error_code open(implementation_type& impl,
+      const protocol_type& protocol, asio::error_code& ec)
+  {
+    if (is_open(impl))
+    {
+      ec = asio::error::already_open;
+      return ec;
+    }
+
+    try
+    {
+      impl.socket_ = ref new Windows::Networking::Sockets::StreamSocket;
+      impl.protocol_ = protocol;
+      ec = asio::error_code();
+    }
+    catch (Platform::Exception^ e)
+    {
+      ec = asio::error_code(e->HResult,
+            asio::system_category());
+    }
+
+    return ec;
+  }
+
+  // Assign a native socket to a socket implementation.
+  asio::error_code assign(implementation_type& impl,
+      const protocol_type& protocol, const native_handle_type& native_socket,
+      asio::error_code& ec)
+  {
+    if (is_open(impl))
+    {
+      ec = asio::error::already_open;
+      return ec;
+    }
+
+    impl.socket_ = native_socket;
+    impl.protocol_ = protocol;
+    ec = asio::error_code();
+
+    return ec;
+  }
+
+  // Bind the socket to the specified local endpoint.
+  asio::error_code bind(implementation_type&,
+      const endpoint_type&, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Get the local endpoint.
+  endpoint_type local_endpoint(const implementation_type& impl,
+      asio::error_code& ec) const
+  {
+    endpoint_type endpoint;
+    endpoint.resize(do_get_endpoint(impl, true,
+          endpoint.data(), endpoint.size(), ec));
+    return endpoint;
+  }
+
+  // Get the remote endpoint.
+  endpoint_type remote_endpoint(const implementation_type& impl,
+      asio::error_code& ec) const
+  {
+    endpoint_type endpoint;
+    endpoint.resize(do_get_endpoint(impl, false,
+          endpoint.data(), endpoint.size(), ec));
+    return endpoint;
+  }
+
+  // Disable sends or receives on the socket.
+  asio::error_code shutdown(implementation_type&,
+      socket_base::shutdown_type, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Set a socket option.
+  template <typename Option>
+  asio::error_code set_option(implementation_type& impl,
+      const Option& option, asio::error_code& ec)
+  {
+    return do_set_option(impl, option.level(impl.protocol_),
+        option.name(impl.protocol_), option.data(impl.protocol_),
+        option.size(impl.protocol_), ec);
+  }
+
+  // Get a socket option.
+  template <typename Option>
+  asio::error_code get_option(const implementation_type& impl,
+      Option& option, asio::error_code& ec) const
+  {
+    std::size_t size = option.size(impl.protocol_);
+    do_get_option(impl, option.level(impl.protocol_),
+        option.name(impl.protocol_),
+        option.data(impl.protocol_), &size, ec);
+    if (!ec)
+      option.resize(impl.protocol_, size);
+    return ec;
+  }
+
+  // Connect the socket to the specified endpoint.
+  asio::error_code connect(implementation_type& impl,
+      const endpoint_type& peer_endpoint, asio::error_code& ec)
+  {
+    return do_connect(impl, peer_endpoint.data(), ec);
+  }
+
+  // Start an asynchronous connect.
+  template <typename Handler, typename IoExecutor>
+  void async_connect(implementation_type& impl,
+      const endpoint_type& peer_endpoint,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef winrt_socket_connect_op<Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(handler, io_ex);
+
+    ASIO_HANDLER_CREATION((scheduler_.context(),
+          *p.p, "socket", &impl, 0, "async_connect"));
+
+    start_connect_op(impl, peer_endpoint.data(), p.p, is_continuation);
+    p.v = p.p = 0;
+  }
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_WINRT_SSOCKET_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_ssocket_service_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_ssocket_service_base.hpp
new file mode 100644
index 00000000000..3c9be6ed000
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_ssocket_service_base.hpp
@@ -0,0 +1,362 @@
+//
+// detail/winrt_ssocket_service_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINRT_SSOCKET_SERVICE_BASE_HPP
+#define ASIO_DETAIL_WINRT_SSOCKET_SERVICE_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/buffer.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/socket_base.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/winrt_async_manager.hpp"
+#include "asio/detail/winrt_socket_recv_op.hpp"
+#include "asio/detail/winrt_socket_send_op.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_io_context.hpp"
+#else // defined(ASIO_HAS_IOCP)
+# include "asio/detail/scheduler.hpp"
+#endif // defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class winrt_ssocket_service_base
+{
+public:
+  // The native type of a socket.
+  typedef Windows::Networking::Sockets::StreamSocket^ native_handle_type;
+
+  // The implementation type of the socket.
+  struct base_implementation_type
+  {
+    // Default constructor.
+    base_implementation_type()
+      : socket_(nullptr),
+        next_(0),
+        prev_(0)
+    {
+    }
+
+    // The underlying native socket.
+    native_handle_type socket_;
+
+    // Pointers to adjacent socket implementations in linked list.
+    base_implementation_type* next_;
+    base_implementation_type* prev_;
+  };
+
+  // Constructor.
+  ASIO_DECL winrt_ssocket_service_base(execution_context& context);
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void base_shutdown();
+
+  // Construct a new socket implementation.
+  ASIO_DECL void construct(base_implementation_type&);
+
+  // Move-construct a new socket implementation.
+  ASIO_DECL void base_move_construct(base_implementation_type& impl,
+      base_implementation_type& other_impl) ASIO_NOEXCEPT;
+
+  // Move-assign from another socket implementation.
+  ASIO_DECL void base_move_assign(base_implementation_type& impl,
+      winrt_ssocket_service_base& other_service,
+      base_implementation_type& other_impl);
+
+  // Destroy a socket implementation.
+  ASIO_DECL void destroy(base_implementation_type& impl);
+
+  // Determine whether the socket is open.
+  bool is_open(const base_implementation_type& impl) const
+  {
+    return impl.socket_ != nullptr;
+  }
+
+  // Destroy a socket implementation.
+  ASIO_DECL asio::error_code close(
+      base_implementation_type& impl, asio::error_code& ec);
+
+  // Release ownership of the socket.
+  ASIO_DECL native_handle_type release(
+      base_implementation_type& impl, asio::error_code& ec);
+
+  // Get the native socket representation.
+  native_handle_type native_handle(base_implementation_type& impl)
+  {
+    return impl.socket_;
+  }
+
+  // Cancel all operations associated with the socket.
+  asio::error_code cancel(base_implementation_type&,
+      asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Determine whether the socket is at the out-of-band data mark.
+  bool at_mark(const base_implementation_type&,
+      asio::error_code& ec) const
+  {
+    ec = asio::error::operation_not_supported;
+    return false;
+  }
+
+  // Determine the number of bytes available for reading.
+  std::size_t available(const base_implementation_type&,
+      asio::error_code& ec) const
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Perform an IO control command on the socket.
+  template <typename IO_Control_Command>
+  asio::error_code io_control(base_implementation_type&,
+      IO_Control_Command&, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Gets the non-blocking mode of the socket.
+  bool non_blocking(const base_implementation_type&) const
+  {
+    return false;
+  }
+
+  // Sets the non-blocking mode of the socket.
+  asio::error_code non_blocking(base_implementation_type&,
+      bool, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Gets the non-blocking mode of the native socket implementation.
+  bool native_non_blocking(const base_implementation_type&) const
+  {
+    return false;
+  }
+
+  // Sets the non-blocking mode of the native socket implementation.
+  asio::error_code native_non_blocking(base_implementation_type&,
+      bool, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return ec;
+  }
+
+  // Send the given data to the peer.
+  template <typename ConstBufferSequence>
+  std::size_t send(base_implementation_type& impl,
+      const ConstBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    return do_send(impl,
+        buffer_sequence_adapter<asio::const_buffer,
+          ConstBufferSequence>::first(buffers), flags, ec);
+  }
+
+  // Wait until data can be sent without blocking.
+  std::size_t send(base_implementation_type&, const null_buffers&,
+      socket_base::message_flags, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Start an asynchronous send. The data being sent must be valid for the
+  // lifetime of the asynchronous operation.
+  template <typename ConstBufferSequence, typename Handler, typename IoExecutor>
+  void async_send(base_implementation_type& impl,
+      const ConstBufferSequence& buffers, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef winrt_socket_send_op<ConstBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((scheduler_.context(),
+          *p.p, "socket", &impl, 0, "async_send"));
+
+    start_send_op(impl,
+        buffer_sequence_adapter<asio::const_buffer,
+          ConstBufferSequence>::first(buffers),
+        flags, p.p, is_continuation);
+    p.v = p.p = 0;
+  }
+
+  // Start an asynchronous wait until data can be sent without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_send(base_implementation_type&, const null_buffers&,
+      socket_base::message_flags, Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex,
+        detail::bind_handler(handler, ec, bytes_transferred));
+  }
+
+  // Receive some data from the peer. Returns the number of bytes received.
+  template <typename MutableBufferSequence>
+  std::size_t receive(base_implementation_type& impl,
+      const MutableBufferSequence& buffers,
+      socket_base::message_flags flags, asio::error_code& ec)
+  {
+    return do_receive(impl,
+        buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::first(buffers), flags, ec);
+  }
+
+  // Wait until data can be received without blocking.
+  std::size_t receive(base_implementation_type&, const null_buffers&,
+      socket_base::message_flags, asio::error_code& ec)
+  {
+    ec = asio::error::operation_not_supported;
+    return 0;
+  }
+
+  // Start an asynchronous receive. The buffer for the data being received
+  // must be valid for the lifetime of the asynchronous operation.
+  template <typename MutableBufferSequence,
+      typename Handler, typename IoExecutor>
+  void async_receive(base_implementation_type& impl,
+      const MutableBufferSequence& buffers, socket_base::message_flags flags,
+      Handler& handler, const IoExecutor& io_ex)
+  {
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef winrt_socket_recv_op<MutableBufferSequence, Handler, IoExecutor> op;
+    typename op::ptr p = { asio::detail::addressof(handler),
+      op::ptr::allocate(handler), 0 };
+    p.p = new (p.v) op(buffers, handler, io_ex);
+
+    ASIO_HANDLER_CREATION((scheduler_.context(),
+          *p.p, "socket", &impl, 0, "async_receive"));
+
+    start_receive_op(impl,
+        buffer_sequence_adapter<asio::mutable_buffer,
+          MutableBufferSequence>::first(buffers),
+        flags, p.p, is_continuation);
+    p.v = p.p = 0;
+  }
+
+  // Wait until data can be received without blocking.
+  template <typename Handler, typename IoExecutor>
+  void async_receive(base_implementation_type&, const null_buffers&,
+      socket_base::message_flags, Handler& handler, const IoExecutor& io_ex)
+  {
+    asio::error_code ec = asio::error::operation_not_supported;
+    const std::size_t bytes_transferred = 0;
+    asio::post(io_ex,
+        detail::bind_handler(handler, ec, bytes_transferred));
+  }
+
+protected:
+  // Helper function to obtain endpoints associated with the connection.
+  ASIO_DECL std::size_t do_get_endpoint(
+      const base_implementation_type& impl, bool local,
+      void* addr, std::size_t addr_len, asio::error_code& ec) const;
+
+  // Helper function to set a socket option.
+  ASIO_DECL asio::error_code do_set_option(
+      base_implementation_type& impl,
+      int level, int optname, const void* optval,
+      std::size_t optlen, asio::error_code& ec);
+
+  // Helper function to get a socket option.
+  ASIO_DECL void do_get_option(
+      const base_implementation_type& impl,
+      int level, int optname, void* optval,
+      std::size_t* optlen, asio::error_code& ec) const;
+
+  // Helper function to perform a synchronous connect.
+  ASIO_DECL asio::error_code do_connect(
+      base_implementation_type& impl,
+      const void* addr, asio::error_code& ec);
+
+  // Helper function to start an asynchronous connect.
+  ASIO_DECL void start_connect_op(
+      base_implementation_type& impl, const void* addr,
+      winrt_async_op<void>* op, bool is_continuation);
+
+  // Helper function to perform a synchronous send.
+  ASIO_DECL std::size_t do_send(
+      base_implementation_type& impl, const asio::const_buffer& data,
+      socket_base::message_flags flags, asio::error_code& ec);
+
+  // Helper function to start an asynchronous send.
+  ASIO_DECL void start_send_op(base_implementation_type& impl,
+      const asio::const_buffer& data, socket_base::message_flags flags,
+      winrt_async_op<unsigned int>* op, bool is_continuation);
+
+  // Helper function to perform a synchronous receive.
+  ASIO_DECL std::size_t do_receive(
+      base_implementation_type& impl, const asio::mutable_buffer& data,
+      socket_base::message_flags flags, asio::error_code& ec);
+
+  // Helper function to start an asynchronous receive.
+  ASIO_DECL void start_receive_op(base_implementation_type& impl,
+      const asio::mutable_buffer& data, socket_base::message_flags flags,
+      winrt_async_op<Windows::Storage::Streams::IBuffer^>* op,
+      bool is_continuation);
+
+  // The scheduler implementation used for delivering completions.
+#if defined(ASIO_HAS_IOCP)
+  typedef class win_iocp_io_context scheduler_impl;
+#else
+  typedef class scheduler scheduler_impl;
+#endif
+  scheduler_impl& scheduler_;
+
+  // The manager that keeps track of outstanding operations.
+  winrt_async_manager& async_manager_;
+
+  // Mutex to protect access to the linked list of implementations. 
+  asio::detail::mutex mutex_;
+
+  // The head of a linked list of all implementations.
+  base_implementation_type* impl_list_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/winrt_ssocket_service_base.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_WINRT_SSOCKET_SERVICE_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_timer_scheduler.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_timer_scheduler.hpp
new file mode 100644
index 00000000000..9f1bb8f3423
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_timer_scheduler.hpp
@@ -0,0 +1,147 @@
+//
+// detail/winrt_timer_scheduler.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINRT_TIMER_SCHEDULER_HPP
+#define ASIO_DETAIL_WINRT_TIMER_SCHEDULER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include <cstddef>
+#include "asio/detail/event.hpp"
+#include "asio/detail/limits.hpp"
+#include "asio/detail/mutex.hpp"
+#include "asio/detail/op_queue.hpp"
+#include "asio/detail/thread.hpp"
+#include "asio/detail/timer_queue_base.hpp"
+#include "asio/detail/timer_queue_set.hpp"
+#include "asio/detail/wait_op.hpp"
+#include "asio/execution_context.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_io_context.hpp"
+#else // defined(ASIO_HAS_IOCP)
+# include "asio/detail/scheduler.hpp"
+#endif // defined(ASIO_HAS_IOCP)
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/thread.hpp"
+#endif // defined(ASIO_HAS_IOCP)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class winrt_timer_scheduler
+  : public execution_context_service_base<winrt_timer_scheduler>
+{
+public:
+  // Constructor.
+  ASIO_DECL winrt_timer_scheduler(execution_context& context);
+
+  // Destructor.
+  ASIO_DECL ~winrt_timer_scheduler();
+
+  // Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL void shutdown();
+
+  // Recreate internal descriptors following a fork.
+  ASIO_DECL void notify_fork(execution_context::fork_event fork_ev);
+
+  // Initialise the task. No effect as this class uses its own thread.
+  ASIO_DECL void init_task();
+
+  // Add a new timer queue to the reactor.
+  template <typename Time_Traits>
+  void add_timer_queue(timer_queue<Time_Traits>& queue);
+
+  // Remove a timer queue from the reactor.
+  template <typename Time_Traits>
+  void remove_timer_queue(timer_queue<Time_Traits>& queue);
+
+  // Schedule a new operation in the given timer queue to expire at the
+  // specified absolute time.
+  template <typename Time_Traits>
+  void schedule_timer(timer_queue<Time_Traits>& queue,
+      const typename Time_Traits::time_type& time,
+      typename timer_queue<Time_Traits>::per_timer_data& timer, wait_op* op);
+
+  // Cancel the timer operations associated with the given token. Returns the
+  // number of operations that have been posted or dispatched.
+  template <typename Time_Traits>
+  std::size_t cancel_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& timer,
+      std::size_t max_cancelled = (std::numeric_limits<std::size_t>::max)());
+
+  // Move the timer operations associated with the given timer.
+  template <typename Time_Traits>
+  void move_timer(timer_queue<Time_Traits>& queue,
+      typename timer_queue<Time_Traits>::per_timer_data& to,
+      typename timer_queue<Time_Traits>::per_timer_data& from);
+
+private:
+  // Run the select loop in the thread.
+  ASIO_DECL void run_thread();
+
+  // Entry point for the select loop thread.
+  ASIO_DECL static void call_run_thread(winrt_timer_scheduler* reactor);
+
+  // Helper function to add a new timer queue.
+  ASIO_DECL void do_add_timer_queue(timer_queue_base& queue);
+
+  // Helper function to remove a timer queue.
+  ASIO_DECL void do_remove_timer_queue(timer_queue_base& queue);
+
+  // The scheduler implementation used to post completions.
+#if defined(ASIO_HAS_IOCP)
+  typedef class win_iocp_io_context scheduler_impl;
+#else
+  typedef class scheduler scheduler_impl;
+#endif
+  scheduler_impl& scheduler_;
+
+  // Mutex used to protect internal variables.
+  asio::detail::mutex mutex_;
+
+  // Event used to wake up background thread.
+  asio::detail::event event_;
+
+  // The timer queues.
+  timer_queue_set timer_queues_;
+
+  // The background thread that is waiting for timers to expire.
+  asio::detail::thread* thread_;
+
+  // Does the background thread need to stop.
+  bool stop_thread_;
+
+  // Whether the service has been shut down.
+  bool shutdown_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/detail/impl/winrt_timer_scheduler.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/winrt_timer_scheduler.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_WINRT_TIMER_SCHEDULER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_utils.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_utils.hpp
new file mode 100644
index 00000000000..bfdccb4dbf9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winrt_utils.hpp
@@ -0,0 +1,106 @@
+//
+// detail/winrt_utils.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINRT_UTILS_HPP
+#define ASIO_DETAIL_WINRT_UTILS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+
+#include <codecvt>
+#include <cstdlib>
+#include <future>
+#include <locale>
+#include <robuffer.h>
+#include <windows.storage.streams.h>
+#include <wrl/implements.h>
+#include "asio/buffer.hpp"
+#include "asio/error_code.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/socket_ops.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+namespace winrt_utils {
+
+inline Platform::String^ string(const char* from)
+{
+  std::wstring tmp(from, from + std::strlen(from));
+  return ref new Platform::String(tmp.c_str());
+}
+
+inline Platform::String^ string(const std::string& from)
+{
+  std::wstring tmp(from.begin(), from.end());
+  return ref new Platform::String(tmp.c_str());
+}
+
+inline std::string string(Platform::String^ from)
+{
+  std::wstring_convert<std::codecvt_utf8<wchar_t>> converter;
+  return converter.to_bytes(from->Data());
+}
+
+inline Platform::String^ string(unsigned short from)
+{
+  return string(std::to_string(from));
+}
+
+template <typename T>
+inline Platform::String^ string(const T& from)
+{
+  return string(from.to_string());
+}
+
+inline int integer(Platform::String^ from)
+{
+  return _wtoi(from->Data());
+}
+
+template <typename T>
+inline Windows::Networking::HostName^ host_name(const T& from)
+{
+  return ref new Windows::Networking::HostName((string)(from));
+}
+
+template <typename ConstBufferSequence>
+inline Windows::Storage::Streams::IBuffer^ buffer_dup(
+    const ConstBufferSequence& buffers)
+{
+  using Microsoft::WRL::ComPtr;
+  using asio::buffer_size;
+  std::size_t size = buffer_size(buffers);
+  auto b = ref new Windows::Storage::Streams::Buffer(size);
+  ComPtr<IInspectable> insp = reinterpret_cast<IInspectable*>(b);
+  ComPtr<Windows::Storage::Streams::IBufferByteAccess> bacc;
+  insp.As(&bacc);
+  byte* bytes = nullptr;
+  bacc->Buffer(&bytes);
+  asio::buffer_copy(asio::buffer(bytes, size), buffers);
+  b->Length = size;
+  return b;
+}
+
+} // namespace winrt_utils
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#endif // ASIO_DETAIL_WINRT_UTILS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winsock_init.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winsock_init.hpp
new file mode 100644
index 00000000000..f95b98435f6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/winsock_init.hpp
@@ -0,0 +1,128 @@
+//
+// detail/winsock_init.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WINSOCK_INIT_HPP
+#define ASIO_DETAIL_WINSOCK_INIT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class winsock_init_base
+{
+protected:
+  // Structure to track result of initialisation and number of uses. POD is used
+  // to ensure that the values are zero-initialised prior to any code being run.
+  struct data
+  {
+    long init_count_;
+    long result_;
+  };
+
+  ASIO_DECL static void startup(data& d,
+      unsigned char major, unsigned char minor);
+
+  ASIO_DECL static void manual_startup(data& d);
+
+  ASIO_DECL static void cleanup(data& d);
+
+  ASIO_DECL static void manual_cleanup(data& d);
+
+  ASIO_DECL static void throw_on_error(data& d);
+};
+
+template <int Major = 2, int Minor = 0>
+class winsock_init : private winsock_init_base
+{
+public:
+  winsock_init(bool allow_throw = true)
+  {
+    startup(data_, Major, Minor);
+    if (allow_throw)
+      throw_on_error(data_);
+  }
+
+  winsock_init(const winsock_init&)
+  {
+    startup(data_, Major, Minor);
+    throw_on_error(data_);
+  }
+
+  ~winsock_init()
+  {
+    cleanup(data_);
+  }
+
+  // This class may be used to indicate that user code will manage Winsock
+  // initialisation and cleanup. This may be required in the case of a DLL, for
+  // example, where it is not safe to initialise Winsock from global object
+  // constructors.
+  //
+  // To prevent asio from initialising Winsock, the object must be constructed
+  // before any Asio's own global objects. With MSVC, this may be accomplished
+  // by adding the following code to the DLL:
+  //
+  //   #pragma warning(push)
+  //   #pragma warning(disable:4073)
+  //   #pragma init_seg(lib)
+  //   asio::detail::winsock_init<>::manual manual_winsock_init;
+  //   #pragma warning(pop)
+  class manual
+  {
+  public:
+    manual()
+    {
+      manual_startup(data_);
+    }
+
+    manual(const manual&)
+    {
+      manual_startup(data_);
+    }
+
+    ~manual()
+    {
+      manual_cleanup(data_);
+    }
+  };
+
+private:
+  friend class manual;
+  static data data_;
+};
+
+template <int Major, int Minor>
+winsock_init_base::data winsock_init<Major, Minor>::data_;
+
+// Static variable to ensure that winsock is initialised before main, and
+// therefore before any other threads can get started.
+static const winsock_init<>& winsock_init_instance = winsock_init<>(false);
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/detail/impl/winsock_init.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+
+#endif // ASIO_DETAIL_WINSOCK_INIT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/work_dispatcher.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/work_dispatcher.hpp
new file mode 100644
index 00000000000..243b8e48327
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/work_dispatcher.hpp
@@ -0,0 +1,73 @@
+//
+// detail/work_dispatcher.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WORK_DISPATCHER_HPP
+#define ASIO_DETAIL_WORK_DISPATCHER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/associated_allocator.hpp"
+#include "asio/executor_work_guard.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Handler>
+class work_dispatcher
+{
+public:
+  template <typename CompletionHandler>
+  explicit work_dispatcher(ASIO_MOVE_ARG(CompletionHandler) handler)
+    : work_((get_associated_executor)(handler)),
+      handler_(ASIO_MOVE_CAST(CompletionHandler)(handler))
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  work_dispatcher(const work_dispatcher& other)
+    : work_(other.work_),
+      handler_(other.handler_)
+  {
+  }
+
+  work_dispatcher(work_dispatcher&& other)
+    : work_(ASIO_MOVE_CAST(executor_work_guard<
+        typename associated_executor<Handler>::type>)(other.work_)),
+      handler_(ASIO_MOVE_CAST(Handler)(other.handler_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  void operator()()
+  {
+    typename associated_allocator<Handler>::type alloc(
+        (get_associated_allocator)(handler_));
+    work_.get_executor().dispatch(
+        ASIO_MOVE_CAST(Handler)(handler_), alloc);
+    work_.reset();
+  }
+
+private:
+  executor_work_guard<typename associated_executor<Handler>::type> work_;
+  Handler handler_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_WORK_DISPATCHER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wrapped_handler.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wrapped_handler.hpp
new file mode 100644
index 00000000000..c9387d244f0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/detail/wrapped_handler.hpp
@@ -0,0 +1,291 @@
+//
+// detail/wrapped_handler.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DETAIL_WRAPPED_HANDLER_HPP
+#define ASIO_DETAIL_WRAPPED_HANDLER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+struct is_continuation_delegated
+{
+  template <typename Dispatcher, typename Handler>
+  bool operator()(Dispatcher&, Handler& handler) const
+  {
+    return asio_handler_cont_helpers::is_continuation(handler);
+  }
+};
+
+struct is_continuation_if_running
+{
+  template <typename Dispatcher, typename Handler>
+  bool operator()(Dispatcher& dispatcher, Handler&) const
+  {
+    return dispatcher.running_in_this_thread();
+  }
+};
+
+template <typename Dispatcher, typename Handler,
+    typename IsContinuation = is_continuation_delegated>
+class wrapped_handler
+{
+public:
+  typedef void result_type;
+
+  wrapped_handler(Dispatcher dispatcher, Handler& handler)
+    : dispatcher_(dispatcher),
+      handler_(ASIO_MOVE_CAST(Handler)(handler))
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  wrapped_handler(const wrapped_handler& other)
+    : dispatcher_(other.dispatcher_),
+      handler_(other.handler_)
+  {
+  }
+
+  wrapped_handler(wrapped_handler&& other)
+    : dispatcher_(other.dispatcher_),
+      handler_(ASIO_MOVE_CAST(Handler)(other.handler_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  void operator()()
+  {
+    dispatcher_.dispatch(ASIO_MOVE_CAST(Handler)(handler_));
+  }
+
+  void operator()() const
+  {
+    dispatcher_.dispatch(handler_);
+  }
+
+  template <typename Arg1>
+  void operator()(const Arg1& arg1)
+  {
+    dispatcher_.dispatch(detail::bind_handler(handler_, arg1));
+  }
+
+  template <typename Arg1>
+  void operator()(const Arg1& arg1) const
+  {
+    dispatcher_.dispatch(detail::bind_handler(handler_, arg1));
+  }
+
+  template <typename Arg1, typename Arg2>
+  void operator()(const Arg1& arg1, const Arg2& arg2)
+  {
+    dispatcher_.dispatch(detail::bind_handler(handler_, arg1, arg2));
+  }
+
+  template <typename Arg1, typename Arg2>
+  void operator()(const Arg1& arg1, const Arg2& arg2) const
+  {
+    dispatcher_.dispatch(detail::bind_handler(handler_, arg1, arg2));
+  }
+
+  template <typename Arg1, typename Arg2, typename Arg3>
+  void operator()(const Arg1& arg1, const Arg2& arg2, const Arg3& arg3)
+  {
+    dispatcher_.dispatch(detail::bind_handler(handler_, arg1, arg2, arg3));
+  }
+
+  template <typename Arg1, typename Arg2, typename Arg3>
+  void operator()(const Arg1& arg1, const Arg2& arg2, const Arg3& arg3) const
+  {
+    dispatcher_.dispatch(detail::bind_handler(handler_, arg1, arg2, arg3));
+  }
+
+  template <typename Arg1, typename Arg2, typename Arg3, typename Arg4>
+  void operator()(const Arg1& arg1, const Arg2& arg2, const Arg3& arg3,
+      const Arg4& arg4)
+  {
+    dispatcher_.dispatch(
+        detail::bind_handler(handler_, arg1, arg2, arg3, arg4));
+  }
+
+  template <typename Arg1, typename Arg2, typename Arg3, typename Arg4>
+  void operator()(const Arg1& arg1, const Arg2& arg2, const Arg3& arg3,
+      const Arg4& arg4) const
+  {
+    dispatcher_.dispatch(
+        detail::bind_handler(handler_, arg1, arg2, arg3, arg4));
+  }
+
+  template <typename Arg1, typename Arg2, typename Arg3, typename Arg4,
+      typename Arg5>
+  void operator()(const Arg1& arg1, const Arg2& arg2, const Arg3& arg3,
+      const Arg4& arg4, const Arg5& arg5)
+  {
+    dispatcher_.dispatch(
+        detail::bind_handler(handler_, arg1, arg2, arg3, arg4, arg5));
+  }
+
+  template <typename Arg1, typename Arg2, typename Arg3, typename Arg4,
+      typename Arg5>
+  void operator()(const Arg1& arg1, const Arg2& arg2, const Arg3& arg3,
+      const Arg4& arg4, const Arg5& arg5) const
+  {
+    dispatcher_.dispatch(
+        detail::bind_handler(handler_, arg1, arg2, arg3, arg4, arg5));
+  }
+
+//private:
+  Dispatcher dispatcher_;
+  Handler handler_;
+};
+
+template <typename Handler, typename Context>
+class rewrapped_handler
+{
+public:
+  explicit rewrapped_handler(Handler& handler, const Context& context)
+    : context_(context),
+      handler_(ASIO_MOVE_CAST(Handler)(handler))
+  {
+  }
+
+  explicit rewrapped_handler(const Handler& handler, const Context& context)
+    : context_(context),
+      handler_(handler)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  rewrapped_handler(const rewrapped_handler& other)
+    : context_(other.context_),
+      handler_(other.handler_)
+  {
+  }
+
+  rewrapped_handler(rewrapped_handler&& other)
+    : context_(ASIO_MOVE_CAST(Context)(other.context_)),
+      handler_(ASIO_MOVE_CAST(Handler)(other.handler_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  void operator()()
+  {
+    handler_();
+  }
+
+  void operator()() const
+  {
+    handler_();
+  }
+
+//private:
+  Context context_;
+  Handler handler_;
+};
+
+template <typename Dispatcher, typename Handler, typename IsContinuation>
+inline void* asio_handler_allocate(std::size_t size,
+    wrapped_handler<Dispatcher, Handler, IsContinuation>* this_handler)
+{
+  return asio_handler_alloc_helpers::allocate(
+      size, this_handler->handler_);
+}
+
+template <typename Dispatcher, typename Handler, typename IsContinuation>
+inline void asio_handler_deallocate(void* pointer, std::size_t size,
+    wrapped_handler<Dispatcher, Handler, IsContinuation>* this_handler)
+{
+  asio_handler_alloc_helpers::deallocate(
+      pointer, size, this_handler->handler_);
+}
+
+template <typename Dispatcher, typename Handler, typename IsContinuation>
+inline bool asio_handler_is_continuation(
+    wrapped_handler<Dispatcher, Handler, IsContinuation>* this_handler)
+{
+  return IsContinuation()(this_handler->dispatcher_, this_handler->handler_);
+}
+
+template <typename Function, typename Dispatcher,
+    typename Handler, typename IsContinuation>
+inline void asio_handler_invoke(Function& function,
+    wrapped_handler<Dispatcher, Handler, IsContinuation>* this_handler)
+{
+  this_handler->dispatcher_.dispatch(
+      rewrapped_handler<Function, Handler>(
+        function, this_handler->handler_));
+}
+
+template <typename Function, typename Dispatcher,
+    typename Handler, typename IsContinuation>
+inline void asio_handler_invoke(const Function& function,
+    wrapped_handler<Dispatcher, Handler, IsContinuation>* this_handler)
+{
+  this_handler->dispatcher_.dispatch(
+      rewrapped_handler<Function, Handler>(
+        function, this_handler->handler_));
+}
+
+template <typename Handler, typename Context>
+inline void* asio_handler_allocate(std::size_t size,
+    rewrapped_handler<Handler, Context>* this_handler)
+{
+  return asio_handler_alloc_helpers::allocate(
+      size, this_handler->context_);
+}
+
+template <typename Handler, typename Context>
+inline void asio_handler_deallocate(void* pointer, std::size_t size,
+    rewrapped_handler<Handler, Context>* this_handler)
+{
+  asio_handler_alloc_helpers::deallocate(
+      pointer, size, this_handler->context_);
+}
+
+template <typename Dispatcher, typename Context>
+inline bool asio_handler_is_continuation(
+    rewrapped_handler<Dispatcher, Context>* this_handler)
+{
+  return asio_handler_cont_helpers::is_continuation(
+      this_handler->context_);
+}
+
+template <typename Function, typename Handler, typename Context>
+inline void asio_handler_invoke(Function& function,
+    rewrapped_handler<Handler, Context>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->context_);
+}
+
+template <typename Function, typename Handler, typename Context>
+inline void asio_handler_invoke(const Function& function,
+    rewrapped_handler<Handler, Context>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->context_);
+}
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_DETAIL_WRAPPED_HANDLER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/dispatch.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/dispatch.hpp
new file mode 100644
index 00000000000..27244ee7323
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/dispatch.hpp
@@ -0,0 +1,118 @@
+//
+// dispatch.hpp
+// ~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_DISPATCH_HPP
+#define ASIO_DISPATCH_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/async_result.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/is_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Submits a completion token or function object for execution.
+/**
+ * This function submits an object for execution using the object's associated
+ * executor. The function object may be called from the current thread prior to
+ * returning from <tt>dispatch()</tt>. Otherwise, it is queued for execution.
+ *
+ * This function has the following effects:
+ *
+ * @li Constructs a function object handler of type @c Handler, initialized
+ * with <tt>handler(forward<CompletionToken>(token))</tt>.
+ *
+ * @li Constructs an object @c result of type <tt>async_result<Handler></tt>,
+ * initializing the object as <tt>result(handler)</tt>.
+ *
+ * @li Obtains the handler's associated executor object @c ex by performing
+ * <tt>get_associated_executor(handler)</tt>.
+ *
+ * @li Obtains the handler's associated allocator object @c alloc by performing
+ * <tt>get_associated_allocator(handler)</tt>.
+ *
+ * @li Performs <tt>ex.dispatch(std::move(handler), alloc)</tt>.
+ *
+ * @li Returns <tt>result.get()</tt>.
+ */
+template <ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) dispatch(
+    ASIO_MOVE_ARG(CompletionToken) token);
+
+/// Submits a completion token or function object for execution.
+/**
+ * This function submits an object for execution using the specified executor.
+ * The function object may be called from the current thread prior to returning
+ * from <tt>dispatch()</tt>. Otherwise, it is queued for execution.
+ *
+ * This function has the following effects:
+ *
+ * @li Constructs a function object handler of type @c Handler, initialized
+ * with <tt>handler(forward<CompletionToken>(token))</tt>.
+ *
+ * @li Constructs an object @c result of type <tt>async_result<Handler></tt>,
+ * initializing the object as <tt>result(handler)</tt>.
+ *
+ * @li Obtains the handler's associated executor object @c ex1 by performing
+ * <tt>get_associated_executor(handler)</tt>.
+ *
+ * @li Creates a work object @c w by performing <tt>make_work(ex1)</tt>.
+ *
+ * @li Obtains the handler's associated allocator object @c alloc by performing
+ * <tt>get_associated_allocator(handler)</tt>.
+ *
+ * @li Constructs a function object @c f with a function call operator that
+ * performs <tt>ex1.dispatch(std::move(handler), alloc)</tt> followed by
+ * <tt>w.reset()</tt>.
+ *
+ * @li Performs <tt>Executor(ex).dispatch(std::move(f), alloc)</tt>.
+ *
+ * @li Returns <tt>result.get()</tt>.
+ */
+template <typename Executor,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken
+      ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(Executor)>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) dispatch(
+    const Executor& ex,
+    ASIO_MOVE_ARG(CompletionToken) token
+      ASIO_DEFAULT_COMPLETION_TOKEN(Executor),
+    typename enable_if<is_executor<Executor>::value>::type* = 0);
+
+/// Submits a completion token or function object for execution.
+/**
+ * @returns <tt>dispatch(ctx.get_executor(),
+ * forward<CompletionToken>(token))</tt>.
+ */
+template <typename ExecutionContext,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken
+      ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+        typename ExecutionContext::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) dispatch(
+    ExecutionContext& ctx,
+    ASIO_MOVE_ARG(CompletionToken) token
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename ExecutionContext::executor_type),
+    typename enable_if<is_convertible<
+      ExecutionContext&, execution_context&>::value>::type* = 0);
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/dispatch.hpp"
+
+#endif // ASIO_DISPATCH_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/error.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/error.hpp
new file mode 100644
index 00000000000..c70c52fe757
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/error.hpp
@@ -0,0 +1,356 @@
+//
+// error.hpp
+// ~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_ERROR_HPP
+#define ASIO_ERROR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/error_code.hpp"
+#include "asio/system_error.hpp"
+#if defined(ASIO_WINDOWS) \
+  || defined(__CYGWIN__) \
+  || defined(ASIO_WINDOWS_RUNTIME)
+# include <winerror.h>
+#else
+# include <cerrno>
+# include <netdb.h>
+#endif
+
+#if defined(GENERATING_DOCUMENTATION)
+/// INTERNAL ONLY.
+# define ASIO_NATIVE_ERROR(e) implementation_defined
+/// INTERNAL ONLY.
+# define ASIO_SOCKET_ERROR(e) implementation_defined
+/// INTERNAL ONLY.
+# define ASIO_NETDB_ERROR(e) implementation_defined
+/// INTERNAL ONLY.
+# define ASIO_GETADDRINFO_ERROR(e) implementation_defined
+/// INTERNAL ONLY.
+# define ASIO_WIN_OR_POSIX(e_win, e_posix) implementation_defined
+#elif defined(ASIO_WINDOWS_RUNTIME)
+# define ASIO_NATIVE_ERROR(e) __HRESULT_FROM_WIN32(e)
+# define ASIO_SOCKET_ERROR(e) __HRESULT_FROM_WIN32(WSA ## e)
+# define ASIO_NETDB_ERROR(e) __HRESULT_FROM_WIN32(WSA ## e)
+# define ASIO_GETADDRINFO_ERROR(e) __HRESULT_FROM_WIN32(WSA ## e)
+# define ASIO_WIN_OR_POSIX(e_win, e_posix) e_win
+#elif defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+# define ASIO_NATIVE_ERROR(e) e
+# define ASIO_SOCKET_ERROR(e) WSA ## e
+# define ASIO_NETDB_ERROR(e) WSA ## e
+# define ASIO_GETADDRINFO_ERROR(e) WSA ## e
+# define ASIO_WIN_OR_POSIX(e_win, e_posix) e_win
+#else
+# define ASIO_NATIVE_ERROR(e) e
+# define ASIO_SOCKET_ERROR(e) e
+# define ASIO_NETDB_ERROR(e) e
+# define ASIO_GETADDRINFO_ERROR(e) e
+# define ASIO_WIN_OR_POSIX(e_win, e_posix) e_posix
+#endif
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace error {
+
+enum basic_errors
+{
+  /// Permission denied.
+  access_denied = ASIO_SOCKET_ERROR(EACCES),
+
+  /// Address family not supported by protocol.
+  address_family_not_supported = ASIO_SOCKET_ERROR(EAFNOSUPPORT),
+
+  /// Address already in use.
+  address_in_use = ASIO_SOCKET_ERROR(EADDRINUSE),
+
+  /// Transport endpoint is already connected.
+  already_connected = ASIO_SOCKET_ERROR(EISCONN),
+
+  /// Operation already in progress.
+  already_started = ASIO_SOCKET_ERROR(EALREADY),
+
+  /// Broken pipe.
+  broken_pipe = ASIO_WIN_OR_POSIX(
+      ASIO_NATIVE_ERROR(ERROR_BROKEN_PIPE),
+      ASIO_NATIVE_ERROR(EPIPE)),
+
+  /// A connection has been aborted.
+  connection_aborted = ASIO_SOCKET_ERROR(ECONNABORTED),
+
+  /// Connection refused.
+  connection_refused = ASIO_SOCKET_ERROR(ECONNREFUSED),
+
+  /// Connection reset by peer.
+  connection_reset = ASIO_SOCKET_ERROR(ECONNRESET),
+
+  /// Bad file descriptor.
+  bad_descriptor = ASIO_SOCKET_ERROR(EBADF),
+
+  /// Bad address.
+  fault = ASIO_SOCKET_ERROR(EFAULT),
+
+  /// No route to host.
+  host_unreachable = ASIO_SOCKET_ERROR(EHOSTUNREACH),
+
+  /// Operation now in progress.
+  in_progress = ASIO_SOCKET_ERROR(EINPROGRESS),
+
+  /// Interrupted system call.
+  interrupted = ASIO_SOCKET_ERROR(EINTR),
+
+  /// Invalid argument.
+  invalid_argument = ASIO_SOCKET_ERROR(EINVAL),
+
+  /// Message too long.
+  message_size = ASIO_SOCKET_ERROR(EMSGSIZE),
+
+  /// The name was too long.
+  name_too_long = ASIO_SOCKET_ERROR(ENAMETOOLONG),
+
+  /// Network is down.
+  network_down = ASIO_SOCKET_ERROR(ENETDOWN),
+
+  /// Network dropped connection on reset.
+  network_reset = ASIO_SOCKET_ERROR(ENETRESET),
+
+  /// Network is unreachable.
+  network_unreachable = ASIO_SOCKET_ERROR(ENETUNREACH),
+
+  /// Too many open files.
+  no_descriptors = ASIO_SOCKET_ERROR(EMFILE),
+
+  /// No buffer space available.
+  no_buffer_space = ASIO_SOCKET_ERROR(ENOBUFS),
+
+  /// Cannot allocate memory.
+  no_memory = ASIO_WIN_OR_POSIX(
+      ASIO_NATIVE_ERROR(ERROR_OUTOFMEMORY),
+      ASIO_NATIVE_ERROR(ENOMEM)),
+
+  /// Operation not permitted.
+  no_permission = ASIO_WIN_OR_POSIX(
+      ASIO_NATIVE_ERROR(ERROR_ACCESS_DENIED),
+      ASIO_NATIVE_ERROR(EPERM)),
+
+  /// Protocol not available.
+  no_protocol_option = ASIO_SOCKET_ERROR(ENOPROTOOPT),
+
+  /// No such device.
+  no_such_device = ASIO_WIN_OR_POSIX(
+      ASIO_NATIVE_ERROR(ERROR_BAD_UNIT),
+      ASIO_NATIVE_ERROR(ENODEV)),
+
+  /// Transport endpoint is not connected.
+  not_connected = ASIO_SOCKET_ERROR(ENOTCONN),
+
+  /// Socket operation on non-socket.
+  not_socket = ASIO_SOCKET_ERROR(ENOTSOCK),
+
+  /// Operation cancelled.
+  operation_aborted = ASIO_WIN_OR_POSIX(
+      ASIO_NATIVE_ERROR(ERROR_OPERATION_ABORTED),
+      ASIO_NATIVE_ERROR(ECANCELED)),
+
+  /// Operation not supported.
+  operation_not_supported = ASIO_SOCKET_ERROR(EOPNOTSUPP),
+
+  /// Cannot send after transport endpoint shutdown.
+  shut_down = ASIO_SOCKET_ERROR(ESHUTDOWN),
+
+  /// Connection timed out.
+  timed_out = ASIO_SOCKET_ERROR(ETIMEDOUT),
+
+  /// Resource temporarily unavailable.
+  try_again = ASIO_WIN_OR_POSIX(
+      ASIO_NATIVE_ERROR(ERROR_RETRY),
+      ASIO_NATIVE_ERROR(EAGAIN)),
+
+  /// The socket is marked non-blocking and the requested operation would block.
+  would_block = ASIO_SOCKET_ERROR(EWOULDBLOCK)
+};
+
+enum netdb_errors
+{
+  /// Host not found (authoritative).
+  host_not_found = ASIO_NETDB_ERROR(HOST_NOT_FOUND),
+
+  /// Host not found (non-authoritative).
+  host_not_found_try_again = ASIO_NETDB_ERROR(TRY_AGAIN),
+
+  /// The query is valid but does not have associated address data.
+  no_data = ASIO_NETDB_ERROR(NO_DATA),
+
+  /// A non-recoverable error occurred.
+  no_recovery = ASIO_NETDB_ERROR(NO_RECOVERY)
+};
+
+enum addrinfo_errors
+{
+  /// The service is not supported for the given socket type.
+  service_not_found = ASIO_WIN_OR_POSIX(
+      ASIO_NATIVE_ERROR(WSATYPE_NOT_FOUND),
+      ASIO_GETADDRINFO_ERROR(EAI_SERVICE)),
+
+  /// The socket type is not supported.
+  socket_type_not_supported = ASIO_WIN_OR_POSIX(
+      ASIO_NATIVE_ERROR(WSAESOCKTNOSUPPORT),
+      ASIO_GETADDRINFO_ERROR(EAI_SOCKTYPE))
+};
+
+enum misc_errors
+{
+  /// Already open.
+  already_open = 1,
+
+  /// End of file or stream.
+  eof,
+
+  /// Element not found.
+  not_found,
+
+  /// The descriptor cannot fit into the select system call's fd_set.
+  fd_set_failure
+};
+
+inline const asio::error_category& get_system_category()
+{
+  return asio::system_category();
+}
+
+#if !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+extern ASIO_DECL
+const asio::error_category& get_netdb_category();
+
+extern ASIO_DECL
+const asio::error_category& get_addrinfo_category();
+
+#else // !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+inline const asio::error_category& get_netdb_category()
+{
+  return get_system_category();
+}
+
+inline const asio::error_category& get_addrinfo_category()
+{
+  return get_system_category();
+}
+
+#endif // !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+extern ASIO_DECL
+const asio::error_category& get_misc_category();
+
+static const asio::error_category&
+  system_category ASIO_UNUSED_VARIABLE
+  = asio::error::get_system_category();
+static const asio::error_category&
+  netdb_category ASIO_UNUSED_VARIABLE
+  = asio::error::get_netdb_category();
+static const asio::error_category&
+  addrinfo_category ASIO_UNUSED_VARIABLE
+  = asio::error::get_addrinfo_category();
+static const asio::error_category&
+  misc_category ASIO_UNUSED_VARIABLE
+  = asio::error::get_misc_category();
+
+} // namespace error
+} // namespace asio
+
+#if defined(ASIO_HAS_STD_SYSTEM_ERROR)
+namespace std {
+
+template<> struct is_error_code_enum<asio::error::basic_errors>
+{
+  static const bool value = true;
+};
+
+template<> struct is_error_code_enum<asio::error::netdb_errors>
+{
+  static const bool value = true;
+};
+
+template<> struct is_error_code_enum<asio::error::addrinfo_errors>
+{
+  static const bool value = true;
+};
+
+template<> struct is_error_code_enum<asio::error::misc_errors>
+{
+  static const bool value = true;
+};
+
+} // namespace std
+#endif // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+namespace asio {
+namespace error {
+
+inline asio::error_code make_error_code(basic_errors e)
+{
+  return asio::error_code(
+      static_cast<int>(e), get_system_category());
+}
+
+inline asio::error_code make_error_code(netdb_errors e)
+{
+  return asio::error_code(
+      static_cast<int>(e), get_netdb_category());
+}
+
+inline asio::error_code make_error_code(addrinfo_errors e)
+{
+  return asio::error_code(
+      static_cast<int>(e), get_addrinfo_category());
+}
+
+inline asio::error_code make_error_code(misc_errors e)
+{
+  return asio::error_code(
+      static_cast<int>(e), get_misc_category());
+}
+
+} // namespace error
+namespace stream_errc {
+  // Simulates the proposed stream_errc scoped enum.
+  using error::eof;
+  using error::not_found;
+} // namespace stream_errc
+namespace socket_errc {
+  // Simulates the proposed socket_errc scoped enum.
+  using error::already_open;
+  using error::not_found;
+} // namespace socket_errc
+namespace resolver_errc {
+  // Simulates the proposed resolver_errc scoped enum.
+  using error::host_not_found;
+  const error::netdb_errors try_again = error::host_not_found_try_again;
+  using error::service_not_found;
+} // namespace resolver_errc
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#undef ASIO_NATIVE_ERROR
+#undef ASIO_SOCKET_ERROR
+#undef ASIO_NETDB_ERROR
+#undef ASIO_GETADDRINFO_ERROR
+#undef ASIO_WIN_OR_POSIX
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/impl/error.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_ERROR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/error_code.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/error_code.hpp
new file mode 100644
index 00000000000..4b22ecb0306
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/error_code.hpp
@@ -0,0 +1,206 @@
+//
+// error_code.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_ERROR_CODE_HPP
+#define ASIO_ERROR_CODE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#ifdef ESP_PLATFORM
+# include "lwip/sockets.h"
+#endif
+
+#if defined(ASIO_HAS_STD_SYSTEM_ERROR)
+# include <system_error>
+#else // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+# include <string>
+# include "asio/detail/noncopyable.hpp"
+# if !defined(ASIO_NO_IOSTREAM)
+#  include <iosfwd>
+# endif // !defined(ASIO_NO_IOSTREAM)
+#endif // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+typedef std::error_category error_category;
+
+#else // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+/// Base class for all error categories.
+class error_category : private noncopyable
+{
+public:
+  /// Destructor.
+  virtual ~error_category()
+  {
+  }
+
+  /// Returns a string naming the error gategory.
+  virtual const char* name() const = 0;
+
+  /// Returns a string describing the error denoted by @c value.
+  virtual std::string message(int value) const = 0;
+
+  /// Equality operator to compare two error categories.
+  bool operator==(const error_category& rhs) const
+  {
+    return this == &rhs;
+  }
+
+  /// Inequality operator to compare two error categories.
+  bool operator!=(const error_category& rhs) const
+  {
+    return !(*this == rhs);
+  }
+};
+
+#endif // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+/// Returns the error category used for the system errors produced by asio.
+extern ASIO_DECL const error_category& system_category();
+
+#if defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+typedef std::error_code error_code;
+
+#else // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+/// Class to represent an error code value.
+class error_code
+{
+public:
+  /// Default constructor.
+  error_code()
+    : value_(0),
+      category_(&system_category())
+  {
+  }
+
+  /// Construct with specific error code and category.
+  error_code(int v, const error_category& c)
+    : value_(v),
+      category_(&c)
+  {
+  }
+
+  /// Construct from an error code enum.
+  template <typename ErrorEnum>
+  error_code(ErrorEnum e)
+  {
+    *this = make_error_code(e);
+  }
+
+  /// Clear the error value to the default.
+  void clear()
+  {
+    value_ = 0;
+    category_ = &system_category();
+  }
+
+  /// Assign a new error value.
+  void assign(int v, const error_category& c)
+  {
+    value_ = v;
+    category_ = &c;
+  }
+
+  /// Get the error value.
+  int value() const
+  {
+    return value_;
+  }
+
+  /// Get the error category.
+  const error_category& category() const
+  {
+    return *category_;
+  }
+
+  /// Get the message associated with the error.
+  std::string message() const
+  {
+    return category_->message(value_);
+  }
+
+  struct unspecified_bool_type_t
+  {
+  };
+
+  typedef void (*unspecified_bool_type)(unspecified_bool_type_t);
+
+  static void unspecified_bool_true(unspecified_bool_type_t) {}
+
+  /// Operator returns non-null if there is a non-success error code.
+  operator unspecified_bool_type() const
+  {
+    if (value_ == 0)
+      return 0;
+    else
+      return &error_code::unspecified_bool_true;
+  }
+
+  /// Operator to test if the error represents success.
+  bool operator!() const
+  {
+    return value_ == 0;
+  }
+
+  /// Equality operator to compare two error objects.
+  friend bool operator==(const error_code& e1, const error_code& e2)
+  {
+    return e1.value_ == e2.value_ && e1.category_ == e2.category_;
+  }
+
+  /// Inequality operator to compare two error objects.
+  friend bool operator!=(const error_code& e1, const error_code& e2)
+  {
+    return e1.value_ != e2.value_ || e1.category_ != e2.category_;
+  }
+
+private:
+  // The value associated with the error code.
+  int value_;
+
+  // The category associated with the error code.
+  const error_category* category_;
+};
+
+# if !defined(ASIO_NO_IOSTREAM)
+
+/// Output an error code.
+template <typename Elem, typename Traits>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os, const error_code& ec)
+{
+  os << ec.category().name() << ':' << ec.value();
+  return os;
+}
+
+# endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/impl/error_code.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_ERROR_CODE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/execution_context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/execution_context.hpp
new file mode 100644
index 00000000000..7e7f70acd83
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/execution_context.hpp
@@ -0,0 +1,412 @@
+//
+// execution_context.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_EXECUTION_CONTEXT_HPP
+#define ASIO_EXECUTION_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include <stdexcept>
+#include <typeinfo>
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/variadic_templates.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+class execution_context;
+class io_context;
+
+#if !defined(GENERATING_DOCUMENTATION)
+template <typename Service> Service& use_service(execution_context&);
+template <typename Service> Service& use_service(io_context&);
+template <typename Service> void add_service(execution_context&, Service*);
+template <typename Service> bool has_service(execution_context&);
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+namespace detail { class service_registry; }
+
+/// A context for function object execution.
+/**
+ * An execution context represents a place where function objects will be
+ * executed. An @c io_context is an example of an execution context.
+ *
+ * @par The execution_context class and services
+ *
+ * Class execution_context implements an extensible, type-safe, polymorphic set
+ * of services, indexed by service type.
+ *
+ * Services exist to manage the resources that are shared across an execution
+ * context. For example, timers may be implemented in terms of a single timer
+ * queue, and this queue would be stored in a service.
+ *
+ * Access to the services of an execution_context is via three function
+ * templates, use_service(), add_service() and has_service().
+ *
+ * In a call to @c use_service<Service>(), the type argument chooses a service,
+ * making available all members of the named type. If @c Service is not present
+ * in an execution_context, an object of type @c Service is created and added
+ * to the execution_context. A C++ program can check if an execution_context
+ * implements a particular service with the function template @c
+ * has_service<Service>().
+ *
+ * Service objects may be explicitly added to an execution_context using the
+ * function template @c add_service<Service>(). If the @c Service is already
+ * present, the service_already_exists exception is thrown. If the owner of the
+ * service is not the same object as the execution_context parameter, the
+ * invalid_service_owner exception is thrown.
+ *
+ * Once a service reference is obtained from an execution_context object by
+ * calling use_service(), that reference remains usable as long as the owning
+ * execution_context object exists.
+ *
+ * All service implementations have execution_context::service as a public base
+ * class. Custom services may be implemented by deriving from this class and
+ * then added to an execution_context using the facilities described above.
+ *
+ * @par The execution_context as a base class
+ *
+ * Class execution_context may be used only as a base class for concrete
+ * execution context types. The @c io_context is an example of such a derived
+ * type.
+ *
+ * On destruction, a class that is derived from execution_context must perform
+ * <tt>execution_context::shutdown()</tt> followed by
+ * <tt>execution_context::destroy()</tt>.
+ *
+ * This destruction sequence permits programs to simplify their resource
+ * management by using @c shared_ptr<>. Where an object's lifetime is tied to
+ * the lifetime of a connection (or some other sequence of asynchronous
+ * operations), a @c shared_ptr to the object would be bound into the handlers
+ * for all asynchronous operations associated with it. This works as follows:
+ *
+ * @li When a single connection ends, all associated asynchronous operations
+ * complete. The corresponding handler objects are destroyed, and all @c
+ * shared_ptr references to the objects are destroyed.
+ *
+ * @li To shut down the whole program, the io_context function stop() is called
+ * to terminate any run() calls as soon as possible. The io_context destructor
+ * calls @c shutdown() and @c destroy() to destroy all pending handlers,
+ * causing all @c shared_ptr references to all connection objects to be
+ * destroyed.
+ */
+class execution_context
+  : private noncopyable
+{
+public:
+  class id;
+  class service;
+
+public:
+  /// Constructor.
+  ASIO_DECL execution_context();
+
+  /// Destructor.
+  ASIO_DECL ~execution_context();
+
+protected:
+  /// Shuts down all services in the context.
+  /**
+   * This function is implemented as follows:
+   *
+   * @li For each service object @c svc in the execution_context set, in
+   * reverse order of the beginning of service object lifetime, performs @c
+   * svc->shutdown().
+   */
+  ASIO_DECL void shutdown();
+
+  /// Destroys all services in the context.
+  /**
+   * This function is implemented as follows:
+   *
+   * @li For each service object @c svc in the execution_context set, in
+   * reverse order * of the beginning of service object lifetime, performs
+   * <tt>delete static_cast<execution_context::service*>(svc)</tt>.
+   */
+  ASIO_DECL void destroy();
+
+public:
+  /// Fork-related event notifications.
+  enum fork_event
+  {
+    /// Notify the context that the process is about to fork.
+    fork_prepare,
+
+    /// Notify the context that the process has forked and is the parent.
+    fork_parent,
+
+    /// Notify the context that the process has forked and is the child.
+    fork_child
+  };
+
+  /// Notify the execution_context of a fork-related event.
+  /**
+   * This function is used to inform the execution_context that the process is
+   * about to fork, or has just forked. This allows the execution_context, and
+   * the services it contains, to perform any necessary housekeeping to ensure
+   * correct operation following a fork.
+   *
+   * This function must not be called while any other execution_context
+   * function, or any function associated with the execution_context's derived
+   * class, is being called in another thread. It is, however, safe to call
+   * this function from within a completion handler, provided no other thread
+   * is accessing the execution_context or its derived class.
+   *
+   * @param event A fork-related event.
+   *
+   * @throws asio::system_error Thrown on failure. If the notification
+   * fails the execution_context object should no longer be used and should be
+   * destroyed.
+   *
+   * @par Example
+   * The following code illustrates how to incorporate the notify_fork()
+   * function:
+   * @code my_execution_context.notify_fork(execution_context::fork_prepare);
+   * if (fork() == 0)
+   * {
+   *   // This is the child process.
+   *   my_execution_context.notify_fork(execution_context::fork_child);
+   * }
+   * else
+   * {
+   *   // This is the parent process.
+   *   my_execution_context.notify_fork(execution_context::fork_parent);
+   * } @endcode
+   *
+   * @note For each service object @c svc in the execution_context set,
+   * performs <tt>svc->notify_fork();</tt>. When processing the fork_prepare
+   * event, services are visited in reverse order of the beginning of service
+   * object lifetime. Otherwise, services are visited in order of the beginning
+   * of service object lifetime.
+   */
+  ASIO_DECL void notify_fork(fork_event event);
+
+  /// Obtain the service object corresponding to the given type.
+  /**
+   * This function is used to locate a service object that corresponds to the
+   * given service type. If there is no existing implementation of the service,
+   * then the execution_context will create a new instance of the service.
+   *
+   * @param e The execution_context object that owns the service.
+   *
+   * @return The service interface implementing the specified service type.
+   * Ownership of the service interface is not transferred to the caller.
+   */
+  template <typename Service>
+  friend Service& use_service(execution_context& e);
+
+  /// Obtain the service object corresponding to the given type.
+  /**
+   * This function is used to locate a service object that corresponds to the
+   * given service type. If there is no existing implementation of the service,
+   * then the io_context will create a new instance of the service.
+   *
+   * @param ioc The io_context object that owns the service.
+   *
+   * @return The service interface implementing the specified service type.
+   * Ownership of the service interface is not transferred to the caller.
+   *
+   * @note This overload is preserved for backwards compatibility with services
+   * that inherit from io_context::service.
+   */
+  template <typename Service>
+  friend Service& use_service(io_context& ioc);
+
+#if defined(GENERATING_DOCUMENTATION)
+
+  /// Creates a service object and adds it to the execution_context.
+  /**
+   * This function is used to add a service to the execution_context.
+   *
+   * @param e The execution_context object that owns the service.
+   *
+   * @param args Zero or more arguments to be passed to the service
+   * constructor.
+   *
+   * @throws asio::service_already_exists Thrown if a service of the
+   * given type is already present in the execution_context.
+   */
+  template <typename Service, typename... Args>
+  friend Service& make_service(execution_context& e, Args&&... args);
+
+#elif defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Service, typename... Args>
+  friend Service& make_service(execution_context& e,
+      ASIO_MOVE_ARG(Args)... args);
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Service>
+  friend Service& make_service(execution_context& e);
+
+#define ASIO_PRIVATE_MAKE_SERVICE_DEF(n) \
+  template <typename Service, ASIO_VARIADIC_TPARAMS(n)> \
+  friend Service& make_service(execution_context& e, \
+      ASIO_VARIADIC_MOVE_PARAMS(n)); \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_MAKE_SERVICE_DEF)
+#undef ASIO_PRIVATE_MAKE_SERVICE_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  /// (Deprecated: Use make_service().) Add a service object to the
+  /// execution_context.
+  /**
+   * This function is used to add a service to the execution_context.
+   *
+   * @param e The execution_context object that owns the service.
+   *
+   * @param svc The service object. On success, ownership of the service object
+   * is transferred to the execution_context. When the execution_context object
+   * is destroyed, it will destroy the service object by performing: @code
+   * delete static_cast<execution_context::service*>(svc) @endcode
+   *
+   * @throws asio::service_already_exists Thrown if a service of the
+   * given type is already present in the execution_context.
+   *
+   * @throws asio::invalid_service_owner Thrown if the service's owning
+   * execution_context is not the execution_context object specified by the
+   * @c e parameter.
+   */
+  template <typename Service>
+  friend void add_service(execution_context& e, Service* svc);
+
+  /// Determine if an execution_context contains a specified service type.
+  /**
+   * This function is used to determine whether the execution_context contains a
+   * service object corresponding to the given service type.
+   *
+   * @param e The execution_context object that owns the service.
+   *
+   * @return A boolean indicating whether the execution_context contains the
+   * service.
+   */
+  template <typename Service>
+  friend bool has_service(execution_context& e);
+
+private:
+  // The service registry.
+  asio::detail::service_registry* service_registry_;
+};
+
+/// Class used to uniquely identify a service.
+class execution_context::id
+  : private noncopyable
+{
+public:
+  /// Constructor.
+  id() {}
+};
+
+/// Base class for all io_context services.
+class execution_context::service
+  : private noncopyable
+{
+public:
+  /// Get the context object that owns the service.
+  execution_context& context();
+
+protected:
+  /// Constructor.
+  /**
+   * @param owner The execution_context object that owns the service.
+   */
+  ASIO_DECL service(execution_context& owner);
+
+  /// Destructor.
+  ASIO_DECL virtual ~service();
+
+private:
+  /// Destroy all user-defined handler objects owned by the service.
+  virtual void shutdown() = 0;
+
+  /// Handle notification of a fork-related event to perform any necessary
+  /// housekeeping.
+  /**
+   * This function is not a pure virtual so that services only have to
+   * implement it if necessary. The default implementation does nothing.
+   */
+  ASIO_DECL virtual void notify_fork(
+      execution_context::fork_event event);
+
+  friend class asio::detail::service_registry;
+  struct key
+  {
+    key() : type_info_(0), id_(0) {}
+    const std::type_info* type_info_;
+    const execution_context::id* id_;
+  } key_;
+
+  execution_context& owner_;
+  service* next_;
+};
+
+/// Exception thrown when trying to add a duplicate service to an
+/// execution_context.
+class service_already_exists
+  : public std::logic_error
+{
+public:
+  ASIO_DECL service_already_exists();
+};
+
+/// Exception thrown when trying to add a service object to an
+/// execution_context where the service has a different owner.
+class invalid_service_owner
+  : public std::logic_error
+{
+public:
+  ASIO_DECL invalid_service_owner();
+};
+
+namespace detail {
+
+// Special derived service id type to keep classes header-file only.
+template <typename Type>
+class service_id
+  : public execution_context::id
+{
+};
+
+// Special service base class to keep classes header-file only.
+template <typename Type>
+class execution_context_service_base
+  : public execution_context::service
+{
+public:
+  static service_id<Type> id;
+
+  // Constructor.
+  execution_context_service_base(execution_context& e)
+    : execution_context::service(e)
+  {
+  }
+};
+
+template <typename Type>
+service_id<Type> execution_context_service_base<Type>::id;
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/execution_context.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/impl/execution_context.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_EXECUTION_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/executor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/executor.hpp
new file mode 100644
index 00000000000..d372c067a86
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/executor.hpp
@@ -0,0 +1,341 @@
+//
+// executor.hpp
+// ~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_EXECUTOR_HPP
+#define ASIO_EXECUTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <typeinfo>
+#include "asio/detail/cstddef.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/throw_exception.hpp"
+#include "asio/execution_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Exception thrown when trying to access an empty polymorphic executor.
+class bad_executor
+  : public std::exception
+{
+public:
+  /// Constructor.
+  ASIO_DECL bad_executor() ASIO_NOEXCEPT;
+
+  /// Obtain message associated with exception.
+  ASIO_DECL virtual const char* what() const
+    ASIO_NOEXCEPT_OR_NOTHROW;
+};
+
+/// Polymorphic wrapper for executors.
+class executor
+{
+public:
+  /// Default constructor.
+  executor() ASIO_NOEXCEPT
+    : impl_(0)
+  {
+  }
+
+  /// Construct from nullptr.
+  executor(nullptr_t) ASIO_NOEXCEPT
+    : impl_(0)
+  {
+  }
+
+  /// Copy constructor.
+  executor(const executor& other) ASIO_NOEXCEPT
+    : impl_(other.clone())
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move constructor.
+  executor(executor&& other) ASIO_NOEXCEPT
+    : impl_(other.impl_)
+  {
+    other.impl_ = 0;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Construct a polymorphic wrapper for the specified executor.
+  template <typename Executor>
+  executor(Executor e);
+
+  /// Allocator-aware constructor to create a polymorphic wrapper for the
+  /// specified executor.
+  template <typename Executor, typename Allocator>
+  executor(allocator_arg_t, const Allocator& a, Executor e);
+
+  /// Destructor.
+  ~executor()
+  {
+    destroy();
+  }
+
+  /// Assignment operator.
+  executor& operator=(const executor& other) ASIO_NOEXCEPT
+  {
+    destroy();
+    impl_ = other.clone();
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  // Move assignment operator.
+  executor& operator=(executor&& other) ASIO_NOEXCEPT
+  {
+    destroy();
+    impl_ = other.impl_;
+    other.impl_ = 0;
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Assignment operator for nullptr_t.
+  executor& operator=(nullptr_t) ASIO_NOEXCEPT
+  {
+    destroy();
+    impl_ = 0;
+    return *this;
+  }
+
+  /// Assignment operator to create a polymorphic wrapper for the specified
+  /// executor.
+  template <typename Executor>
+  executor& operator=(ASIO_MOVE_ARG(Executor) e) ASIO_NOEXCEPT
+  {
+    executor tmp(ASIO_MOVE_CAST(Executor)(e));
+    destroy();
+    impl_ = tmp.impl_;
+    tmp.impl_ = 0;
+    return *this;
+  }
+
+  /// Obtain the underlying execution context.
+  execution_context& context() const ASIO_NOEXCEPT
+  {
+    return get_impl()->context();
+  }
+
+  /// Inform the executor that it has some outstanding work to do.
+  void on_work_started() const ASIO_NOEXCEPT
+  {
+    get_impl()->on_work_started();
+  }
+
+  /// Inform the executor that some work is no longer outstanding.
+  void on_work_finished() const ASIO_NOEXCEPT
+  {
+    get_impl()->on_work_finished();
+  }
+
+  /// Request the executor to invoke the given function object.
+  /**
+   * This function is used to ask the executor to execute the given function
+   * object. The function object is executed according to the rules of the
+   * target executor object.
+   *
+   * @param f The function object to be called. The executor will make a copy
+   * of the handler object as required. The function signature of the function
+   * object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void dispatch(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  /// Request the executor to invoke the given function object.
+  /**
+   * This function is used to ask the executor to execute the given function
+   * object. The function object is executed according to the rules of the
+   * target executor object.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void post(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  /// Request the executor to invoke the given function object.
+  /**
+   * This function is used to ask the executor to execute the given function
+   * object. The function object is executed according to the rules of the
+   * target executor object.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void defer(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  struct unspecified_bool_type_t {};
+  typedef void (*unspecified_bool_type)(unspecified_bool_type_t);
+  static void unspecified_bool_true(unspecified_bool_type_t) {}
+
+  /// Operator to test if the executor contains a valid target.
+  operator unspecified_bool_type() const ASIO_NOEXCEPT
+  {
+    return impl_ ? &executor::unspecified_bool_true : 0;
+  }
+
+  /// Obtain type information for the target executor object.
+  /**
+   * @returns If @c *this has a target type of type @c T, <tt>typeid(T)</tt>;
+   * otherwise, <tt>typeid(void)</tt>.
+   */
+#if !defined(ASIO_NO_TYPEID) || defined(GENERATING_DOCUMENTATION)
+  const std::type_info& target_type() const ASIO_NOEXCEPT
+  {
+    return impl_ ? impl_->target_type() : typeid(void);
+  }
+#else // !defined(ASIO_NO_TYPEID) || defined(GENERATING_DOCUMENTATION)
+  const void* target_type() const ASIO_NOEXCEPT
+  {
+    return impl_ ? impl_->target_type() : 0;
+  }
+#endif // !defined(ASIO_NO_TYPEID) || defined(GENERATING_DOCUMENTATION)
+
+  /// Obtain a pointer to the target executor object.
+  /**
+   * @returns If <tt>target_type() == typeid(T)</tt>, a pointer to the stored
+   * executor target; otherwise, a null pointer.
+   */
+  template <typename Executor>
+  Executor* target() ASIO_NOEXCEPT;
+
+  /// Obtain a pointer to the target executor object.
+  /**
+   * @returns If <tt>target_type() == typeid(T)</tt>, a pointer to the stored
+   * executor target; otherwise, a null pointer.
+   */
+  template <typename Executor>
+  const Executor* target() const ASIO_NOEXCEPT;
+
+  /// Compare two executors for equality.
+  friend bool operator==(const executor& a,
+      const executor& b) ASIO_NOEXCEPT
+  {
+    if (a.impl_ == b.impl_)
+      return true;
+    if (!a.impl_ || !b.impl_)
+      return false;
+    return a.impl_->equals(b.impl_);
+  }
+
+  /// Compare two executors for inequality.
+  friend bool operator!=(const executor& a,
+      const executor& b) ASIO_NOEXCEPT
+  {
+    return !(a == b);
+  }
+
+private:
+#if !defined(GENERATING_DOCUMENTATION)
+  class function;
+  template <typename, typename> class impl;
+
+#if !defined(ASIO_NO_TYPEID)
+  typedef const std::type_info& type_id_result_type;
+#else // !defined(ASIO_NO_TYPEID)
+  typedef const void* type_id_result_type;
+#endif // !defined(ASIO_NO_TYPEID)
+
+  template <typename T>
+  static type_id_result_type type_id()
+  {
+#if !defined(ASIO_NO_TYPEID)
+    return typeid(T);
+#else // !defined(ASIO_NO_TYPEID)
+    static int unique_id;
+    return &unique_id;
+#endif // !defined(ASIO_NO_TYPEID)
+  }
+
+  // Base class for all polymorphic executor implementations.
+  class impl_base
+  {
+  public:
+    virtual impl_base* clone() const ASIO_NOEXCEPT = 0;
+    virtual void destroy() ASIO_NOEXCEPT = 0;
+    virtual execution_context& context() ASIO_NOEXCEPT = 0;
+    virtual void on_work_started() ASIO_NOEXCEPT = 0;
+    virtual void on_work_finished() ASIO_NOEXCEPT = 0;
+    virtual void dispatch(ASIO_MOVE_ARG(function)) = 0;
+    virtual void post(ASIO_MOVE_ARG(function)) = 0;
+    virtual void defer(ASIO_MOVE_ARG(function)) = 0;
+    virtual type_id_result_type target_type() const ASIO_NOEXCEPT = 0;
+    virtual void* target() ASIO_NOEXCEPT = 0;
+    virtual const void* target() const ASIO_NOEXCEPT = 0;
+    virtual bool equals(const impl_base* e) const ASIO_NOEXCEPT = 0;
+
+  protected:
+    impl_base(bool fast_dispatch) : fast_dispatch_(fast_dispatch) {}
+    virtual ~impl_base() {}
+
+  private:
+    friend class executor;
+    const bool fast_dispatch_;
+  };
+
+  // Helper function to check and return the implementation pointer.
+  impl_base* get_impl() const
+  {
+    if (!impl_)
+    {
+      bad_executor ex;
+      asio::detail::throw_exception(ex);
+    }
+    return impl_;
+  }
+
+  // Helper function to clone another implementation.
+  impl_base* clone() const ASIO_NOEXCEPT
+  {
+    return impl_ ? impl_->clone() : 0;
+  }
+
+  // Helper function to destroy an implementation.
+  void destroy() ASIO_NOEXCEPT
+  {
+    if (impl_)
+      impl_->destroy();
+  }
+
+  impl_base* impl_;
+#endif // !defined(GENERATING_DOCUMENTATION)
+};
+
+} // namespace asio
+
+ASIO_USES_ALLOCATOR(asio::executor)
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/executor.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/impl/executor.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_EXECUTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/executor_work_guard.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/executor_work_guard.hpp
new file mode 100644
index 00000000000..3923d28eef8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/executor_work_guard.hpp
@@ -0,0 +1,170 @@
+//
+// executor_work_guard.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_EXECUTOR_WORK_GUARD_HPP
+#define ASIO_EXECUTOR_WORK_GUARD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/is_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// An object of type @c executor_work_guard controls ownership of executor work
+/// within a scope.
+template <typename Executor>
+class executor_work_guard
+{
+public:
+  /// The underlying executor type.
+  typedef Executor executor_type;
+
+  /// Constructs a @c executor_work_guard object for the specified executor.
+  /**
+   * Stores a copy of @c e and calls <tt>on_work_started()</tt> on it.
+   */
+  explicit executor_work_guard(const executor_type& e) ASIO_NOEXCEPT
+    : executor_(e),
+      owns_(true)
+  {
+    executor_.on_work_started();
+  }
+
+  /// Copy constructor.
+  executor_work_guard(const executor_work_guard& other) ASIO_NOEXCEPT
+    : executor_(other.executor_),
+      owns_(other.owns_)
+  {
+    if (owns_)
+      executor_.on_work_started();
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move constructor.
+  executor_work_guard(executor_work_guard&& other) ASIO_NOEXCEPT
+    : executor_(ASIO_MOVE_CAST(Executor)(other.executor_)),
+      owns_(other.owns_)
+  {
+    other.owns_ = false;
+  }
+#endif //  defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destructor.
+  /**
+   * Unless the object has already been reset, or is in a moved-from state,
+   * calls <tt>on_work_finished()</tt> on the stored executor.
+   */
+  ~executor_work_guard()
+  {
+    if (owns_)
+      executor_.on_work_finished();
+  }
+
+  /// Obtain the associated executor.
+  executor_type get_executor() const ASIO_NOEXCEPT
+  {
+    return executor_;
+  }
+
+  /// Whether the executor_work_guard object owns some outstanding work.
+  bool owns_work() const ASIO_NOEXCEPT
+  {
+    return owns_;
+  }
+
+  /// Indicate that the work is no longer outstanding.
+  /*
+   * Unless the object has already been reset, or is in a moved-from state,
+   * calls <tt>on_work_finished()</tt> on the stored executor.
+   */
+  void reset() ASIO_NOEXCEPT
+  {
+    if (owns_)
+    {
+      executor_.on_work_finished();
+      owns_ = false;
+    }
+  }
+
+private:
+  // Disallow assignment.
+  executor_work_guard& operator=(const executor_work_guard&);
+
+  executor_type executor_;
+  bool owns_;
+};
+
+/// Create an @ref executor_work_guard object.
+template <typename Executor>
+inline executor_work_guard<Executor> make_work_guard(const Executor& ex,
+    typename enable_if<is_executor<Executor>::value>::type* = 0)
+{
+  return executor_work_guard<Executor>(ex);
+}
+
+/// Create an @ref executor_work_guard object.
+template <typename ExecutionContext>
+inline executor_work_guard<typename ExecutionContext::executor_type>
+make_work_guard(ExecutionContext& ctx,
+    typename enable_if<
+      is_convertible<ExecutionContext&, execution_context&>::value>::type* = 0)
+{
+  return executor_work_guard<typename ExecutionContext::executor_type>(
+      ctx.get_executor());
+}
+
+/// Create an @ref executor_work_guard object.
+template <typename T>
+inline executor_work_guard<typename associated_executor<T>::type>
+make_work_guard(const T& t,
+    typename enable_if<!is_executor<T>::value &&
+      !is_convertible<T&, execution_context&>::value>::type* = 0)
+{
+  return executor_work_guard<typename associated_executor<T>::type>(
+      associated_executor<T>::get(t));
+}
+
+/// Create an @ref executor_work_guard object.
+template <typename T, typename Executor>
+inline executor_work_guard<typename associated_executor<T, Executor>::type>
+make_work_guard(const T& t, const Executor& ex,
+    typename enable_if<is_executor<Executor>::value>::type* = 0)
+{
+  return executor_work_guard<typename associated_executor<T, Executor>::type>(
+      associated_executor<T, Executor>::get(t, ex));
+}
+
+/// Create an @ref executor_work_guard object.
+template <typename T, typename ExecutionContext>
+inline executor_work_guard<typename associated_executor<T,
+  typename ExecutionContext::executor_type>::type>
+make_work_guard(const T& t, ExecutionContext& ctx,
+    typename enable_if<!is_executor<T>::value &&
+      !is_convertible<T&, execution_context&>::value &&
+      is_convertible<ExecutionContext&, execution_context&>::value>::type* = 0)
+{
+  return executor_work_guard<typename associated_executor<T,
+    typename ExecutionContext::executor_type>::type>(
+      associated_executor<T, typename ExecutionContext::executor_type>::get(
+        t, ctx.get_executor()));
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_EXECUTOR_WORK_GUARD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/basic_endpoint.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/basic_endpoint.hpp
new file mode 100644
index 00000000000..ddedbdee96c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/basic_endpoint.hpp
@@ -0,0 +1,193 @@
+//
+// generic/basic_endpoint.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_GENERIC_BASIC_ENDPOINT_HPP
+#define ASIO_GENERIC_BASIC_ENDPOINT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/generic/detail/endpoint.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace generic {
+
+/// Describes an endpoint for any socket type.
+/**
+ * The asio::generic::basic_endpoint class template describes an endpoint
+ * that may be associated with any socket type.
+ *
+ * @note The socket types sockaddr type must be able to fit into a
+ * @c sockaddr_storage structure.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Concepts:
+ * Endpoint.
+ */
+template <typename Protocol>
+class basic_endpoint
+{
+public:
+  /// The protocol type associated with the endpoint.
+  typedef Protocol protocol_type;
+
+  /// The type of the endpoint structure. This type is dependent on the
+  /// underlying implementation of the socket layer.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined data_type;
+#else
+  typedef asio::detail::socket_addr_type data_type;
+#endif
+
+  /// Default constructor.
+  basic_endpoint() ASIO_NOEXCEPT
+  {
+  }
+
+  /// Construct an endpoint from the specified socket address.
+  basic_endpoint(const void* socket_address,
+      std::size_t socket_address_size, int socket_protocol = 0)
+    : impl_(socket_address, socket_address_size, socket_protocol)
+  {
+  }
+
+  /// Construct an endpoint from the specific endpoint type.
+  template <typename Endpoint>
+  basic_endpoint(const Endpoint& endpoint)
+    : impl_(endpoint.data(), endpoint.size(), endpoint.protocol().protocol())
+  {
+  }
+
+  /// Copy constructor.
+  basic_endpoint(const basic_endpoint& other)
+    : impl_(other.impl_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move constructor.
+  basic_endpoint(basic_endpoint&& other)
+    : impl_(other.impl_)
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assign from another endpoint.
+  basic_endpoint& operator=(const basic_endpoint& other)
+  {
+    impl_ = other.impl_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move-assign from another endpoint.
+  basic_endpoint& operator=(basic_endpoint&& other)
+  {
+    impl_ = other.impl_;
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// The protocol associated with the endpoint.
+  protocol_type protocol() const
+  {
+    return protocol_type(impl_.family(), impl_.protocol());
+  }
+
+  /// Get the underlying endpoint in the native type.
+  data_type* data()
+  {
+    return impl_.data();
+  }
+
+  /// Get the underlying endpoint in the native type.
+  const data_type* data() const
+  {
+    return impl_.data();
+  }
+
+  /// Get the underlying size of the endpoint in the native type.
+  std::size_t size() const
+  {
+    return impl_.size();
+  }
+
+  /// Set the underlying size of the endpoint in the native type.
+  void resize(std::size_t new_size)
+  {
+    impl_.resize(new_size);
+  }
+
+  /// Get the capacity of the endpoint in the native type.
+  std::size_t capacity() const
+  {
+    return impl_.capacity();
+  }
+
+  /// Compare two endpoints for equality.
+  friend bool operator==(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return e1.impl_ == e2.impl_;
+  }
+
+  /// Compare two endpoints for inequality.
+  friend bool operator!=(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return !(e1.impl_ == e2.impl_);
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator<(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return e1.impl_ < e2.impl_;
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator>(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return e2.impl_ < e1.impl_;
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator<=(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return !(e2 < e1);
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator>=(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return !(e1 < e2);
+  }
+
+private:
+  // The underlying generic endpoint.
+  asio::generic::detail::endpoint impl_;
+};
+
+} // namespace generic
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_GENERIC_BASIC_ENDPOINT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/datagram_protocol.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/datagram_protocol.hpp
new file mode 100644
index 00000000000..99cf8472daa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/datagram_protocol.hpp
@@ -0,0 +1,123 @@
+//
+// generic/datagram_protocol.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_GENERIC_DATAGRAM_PROTOCOL_HPP
+#define ASIO_GENERIC_DATAGRAM_PROTOCOL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include <typeinfo>
+#include "asio/basic_datagram_socket.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/throw_exception.hpp"
+#include "asio/generic/basic_endpoint.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace generic {
+
+/// Encapsulates the flags needed for a generic datagram-oriented socket.
+/**
+ * The asio::generic::datagram_protocol class contains flags necessary
+ * for datagram-oriented sockets of any address family and protocol.
+ *
+ * @par Examples
+ * Constructing using a native address family and socket protocol:
+ * @code datagram_protocol p(AF_INET, IPPROTO_UDP); @endcode
+ * Constructing from a specific protocol type:
+ * @code datagram_protocol p(asio::ip::udp::v4()); @endcode
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Safe.
+ *
+ * @par Concepts:
+ * Protocol.
+ */
+class datagram_protocol
+{
+public:
+  /// Construct a protocol object for a specific address family and protocol.
+  datagram_protocol(int address_family, int socket_protocol)
+    : family_(address_family),
+      protocol_(socket_protocol)
+  {
+  }
+
+  /// Construct a generic protocol object from a specific protocol.
+  /**
+   * @throws @c bad_cast Thrown if the source protocol is not datagram-oriented.
+   */
+  template <typename Protocol>
+  datagram_protocol(const Protocol& source_protocol)
+    : family_(source_protocol.family()),
+      protocol_(source_protocol.protocol())
+  {
+    if (source_protocol.type() != type())
+    {
+      std::bad_cast ex;
+      asio::detail::throw_exception(ex);
+    }
+  }
+
+  /// Obtain an identifier for the type of the protocol.
+  int type() const ASIO_NOEXCEPT
+  {
+    return ASIO_OS_DEF(SOCK_DGRAM);
+  }
+
+  /// Obtain an identifier for the protocol.
+  int protocol() const ASIO_NOEXCEPT
+  {
+    return protocol_;
+  }
+
+  /// Obtain an identifier for the protocol family.
+  int family() const ASIO_NOEXCEPT
+  {
+    return family_;
+  }
+
+  /// Compare two protocols for equality.
+  friend bool operator==(const datagram_protocol& p1,
+      const datagram_protocol& p2)
+  {
+    return p1.family_ == p2.family_ && p1.protocol_ == p2.protocol_;
+  }
+
+  /// Compare two protocols for inequality.
+  friend bool operator!=(const datagram_protocol& p1,
+      const datagram_protocol& p2)
+  {
+    return !(p1 == p2);
+  }
+
+  /// The type of an endpoint.
+  typedef basic_endpoint<datagram_protocol> endpoint;
+
+  /// The generic socket type.
+  typedef basic_datagram_socket<datagram_protocol> socket;
+
+private:
+  int family_;
+  int protocol_;
+};
+
+} // namespace generic
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_GENERIC_DATAGRAM_PROTOCOL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/detail/endpoint.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/detail/endpoint.hpp
new file mode 100644
index 00000000000..6556cc37e15
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/detail/endpoint.hpp
@@ -0,0 +1,133 @@
+//
+// generic/detail/endpoint.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_GENERIC_DETAIL_ENDPOINT_HPP
+#define ASIO_GENERIC_DETAIL_ENDPOINT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include <cstddef>
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace generic {
+namespace detail {
+
+// Helper class for implementing a generic socket endpoint.
+class endpoint
+{
+public:
+  // Default constructor.
+  ASIO_DECL endpoint();
+
+  // Construct an endpoint from the specified raw bytes.
+  ASIO_DECL endpoint(const void* sock_addr,
+      std::size_t sock_addr_size, int sock_protocol);
+
+  // Copy constructor.
+  endpoint(const endpoint& other)
+    : data_(other.data_),
+      size_(other.size_),
+      protocol_(other.protocol_)
+  {
+  }
+
+  // Assign from another endpoint.
+  endpoint& operator=(const endpoint& other)
+  {
+    data_ = other.data_;
+    size_ = other.size_;
+    protocol_ = other.protocol_;
+    return *this;
+  }
+
+  // Get the address family associated with the endpoint.
+  int family() const
+  {
+    return data_.base.sa_family;
+  }
+
+  // Get the socket protocol associated with the endpoint.
+  int protocol() const
+  {
+    return protocol_;
+  }
+
+  // Get the underlying endpoint in the native type.
+  asio::detail::socket_addr_type* data()
+  {
+    return &data_.base;
+  }
+
+  // Get the underlying endpoint in the native type.
+  const asio::detail::socket_addr_type* data() const
+  {
+    return &data_.base;
+  }
+
+  // Get the underlying size of the endpoint in the native type.
+  std::size_t size() const
+  {
+    return size_;
+  }
+
+  // Set the underlying size of the endpoint in the native type.
+  ASIO_DECL void resize(std::size_t size);
+
+  // Get the capacity of the endpoint in the native type.
+  std::size_t capacity() const
+  {
+    return sizeof(asio::detail::sockaddr_storage_type);
+  }
+
+  // Compare two endpoints for equality.
+  ASIO_DECL friend bool operator==(
+      const endpoint& e1, const endpoint& e2);
+
+  // Compare endpoints for ordering.
+  ASIO_DECL friend bool operator<(
+      const endpoint& e1, const endpoint& e2);
+
+private:
+  // The underlying socket address.
+  union data_union
+  {
+    asio::detail::socket_addr_type base;
+    asio::detail::sockaddr_storage_type generic;
+  } data_;
+
+  // The length of the socket address stored in the endpoint.
+  std::size_t size_;
+
+  // The socket protocol associated with the endpoint.
+  int protocol_;
+
+  // Initialise with a specified memory.
+  ASIO_DECL void init(const void* sock_addr,
+      std::size_t sock_addr_size, int sock_protocol);
+};
+
+} // namespace detail
+} // namespace generic
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/generic/detail/impl/endpoint.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_GENERIC_DETAIL_ENDPOINT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/raw_protocol.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/raw_protocol.hpp
new file mode 100644
index 00000000000..e94e97a816d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/raw_protocol.hpp
@@ -0,0 +1,121 @@
+//
+// generic/raw_protocol.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_GENERIC_RAW_PROTOCOL_HPP
+#define ASIO_GENERIC_RAW_PROTOCOL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include <typeinfo>
+#include "asio/basic_raw_socket.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/throw_exception.hpp"
+#include "asio/generic/basic_endpoint.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace generic {
+
+/// Encapsulates the flags needed for a generic raw socket.
+/**
+ * The asio::generic::raw_protocol class contains flags necessary for
+ * raw sockets of any address family and protocol.
+ *
+ * @par Examples
+ * Constructing using a native address family and socket protocol:
+ * @code raw_protocol p(AF_INET, IPPROTO_ICMP); @endcode
+ * Constructing from a specific protocol type:
+ * @code raw_protocol p(asio::ip::icmp::v4()); @endcode
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Safe.
+ *
+ * @par Concepts:
+ * Protocol.
+ */
+class raw_protocol
+{
+public:
+  /// Construct a protocol object for a specific address family and protocol.
+  raw_protocol(int address_family, int socket_protocol)
+    : family_(address_family),
+      protocol_(socket_protocol)
+  {
+  }
+
+  /// Construct a generic protocol object from a specific protocol.
+  /**
+   * @throws @c bad_cast Thrown if the source protocol is not raw-oriented.
+   */
+  template <typename Protocol>
+  raw_protocol(const Protocol& source_protocol)
+    : family_(source_protocol.family()),
+      protocol_(source_protocol.protocol())
+  {
+    if (source_protocol.type() != type())
+    {
+      std::bad_cast ex;
+      asio::detail::throw_exception(ex);
+    }
+  }
+
+  /// Obtain an identifier for the type of the protocol.
+  int type() const ASIO_NOEXCEPT
+  {
+    return ASIO_OS_DEF(SOCK_RAW);
+  }
+
+  /// Obtain an identifier for the protocol.
+  int protocol() const ASIO_NOEXCEPT
+  {
+    return protocol_;
+  }
+
+  /// Obtain an identifier for the protocol family.
+  int family() const ASIO_NOEXCEPT
+  {
+    return family_;
+  }
+
+  /// Compare two protocols for equality.
+  friend bool operator==(const raw_protocol& p1, const raw_protocol& p2)
+  {
+    return p1.family_ == p2.family_ && p1.protocol_ == p2.protocol_;
+  }
+
+  /// Compare two protocols for inequality.
+  friend bool operator!=(const raw_protocol& p1, const raw_protocol& p2)
+  {
+    return !(p1 == p2);
+  }
+
+  /// The type of an endpoint.
+  typedef basic_endpoint<raw_protocol> endpoint;
+
+  /// The generic socket type.
+  typedef basic_raw_socket<raw_protocol> socket;
+
+private:
+  int family_;
+  int protocol_;
+};
+
+} // namespace generic
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_GENERIC_RAW_PROTOCOL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/seq_packet_protocol.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/seq_packet_protocol.hpp
new file mode 100644
index 00000000000..8ef566b4994
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/seq_packet_protocol.hpp
@@ -0,0 +1,122 @@
+//
+// generic/seq_packet_protocol.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_GENERIC_SEQ_PACKET_PROTOCOL_HPP
+#define ASIO_GENERIC_SEQ_PACKET_PROTOCOL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include <typeinfo>
+#include "asio/basic_seq_packet_socket.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/throw_exception.hpp"
+#include "asio/generic/basic_endpoint.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace generic {
+
+/// Encapsulates the flags needed for a generic sequenced packet socket.
+/**
+ * The asio::generic::seq_packet_protocol class contains flags necessary
+ * for seq_packet-oriented sockets of any address family and protocol.
+ *
+ * @par Examples
+ * Constructing using a native address family and socket protocol:
+ * @code seq_packet_protocol p(AF_INET, IPPROTO_SCTP); @endcode
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Safe.
+ *
+ * @par Concepts:
+ * Protocol.
+ */
+class seq_packet_protocol
+{
+public:
+  /// Construct a protocol object for a specific address family and protocol.
+  seq_packet_protocol(int address_family, int socket_protocol)
+    : family_(address_family),
+      protocol_(socket_protocol)
+  {
+  }
+
+  /// Construct a generic protocol object from a specific protocol.
+  /**
+   * @throws @c bad_cast Thrown if the source protocol is not based around
+   * sequenced packets.
+   */
+  template <typename Protocol>
+  seq_packet_protocol(const Protocol& source_protocol)
+    : family_(source_protocol.family()),
+      protocol_(source_protocol.protocol())
+  {
+    if (source_protocol.type() != type())
+    {
+      std::bad_cast ex;
+      asio::detail::throw_exception(ex);
+    }
+  }
+
+  /// Obtain an identifier for the type of the protocol.
+  int type() const ASIO_NOEXCEPT
+  {
+    return ASIO_OS_DEF(SOCK_SEQPACKET);
+  }
+
+  /// Obtain an identifier for the protocol.
+  int protocol() const ASIO_NOEXCEPT
+  {
+    return protocol_;
+  }
+
+  /// Obtain an identifier for the protocol family.
+  int family() const ASIO_NOEXCEPT
+  {
+    return family_;
+  }
+
+  /// Compare two protocols for equality.
+  friend bool operator==(const seq_packet_protocol& p1,
+      const seq_packet_protocol& p2)
+  {
+    return p1.family_ == p2.family_ && p1.protocol_ == p2.protocol_;
+  }
+
+  /// Compare two protocols for inequality.
+  friend bool operator!=(const seq_packet_protocol& p1,
+      const seq_packet_protocol& p2)
+  {
+    return !(p1 == p2);
+  }
+
+  /// The type of an endpoint.
+  typedef basic_endpoint<seq_packet_protocol> endpoint;
+
+  /// The generic socket type.
+  typedef basic_seq_packet_socket<seq_packet_protocol> socket;
+
+private:
+  int family_;
+  int protocol_;
+};
+
+} // namespace generic
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_GENERIC_SEQ_PACKET_PROTOCOL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/stream_protocol.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/stream_protocol.hpp
new file mode 100644
index 00000000000..a44afc059a4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/generic/stream_protocol.hpp
@@ -0,0 +1,127 @@
+//
+// generic/stream_protocol.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_GENERIC_STREAM_PROTOCOL_HPP
+#define ASIO_GENERIC_STREAM_PROTOCOL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include <typeinfo>
+#include "asio/basic_socket_iostream.hpp"
+#include "asio/basic_stream_socket.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/throw_exception.hpp"
+#include "asio/generic/basic_endpoint.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace generic {
+
+/// Encapsulates the flags needed for a generic stream-oriented socket.
+/**
+ * The asio::generic::stream_protocol class contains flags necessary for
+ * stream-oriented sockets of any address family and protocol.
+ *
+ * @par Examples
+ * Constructing using a native address family and socket protocol:
+ * @code stream_protocol p(AF_INET, IPPROTO_TCP); @endcode
+ * Constructing from a specific protocol type:
+ * @code stream_protocol p(asio::ip::tcp::v4()); @endcode
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Safe.
+ *
+ * @par Concepts:
+ * Protocol.
+ */
+class stream_protocol
+{
+public:
+  /// Construct a protocol object for a specific address family and protocol.
+  stream_protocol(int address_family, int socket_protocol)
+    : family_(address_family),
+      protocol_(socket_protocol)
+  {
+  }
+
+  /// Construct a generic protocol object from a specific protocol.
+  /**
+   * @throws @c bad_cast Thrown if the source protocol is not stream-oriented.
+   */
+  template <typename Protocol>
+  stream_protocol(const Protocol& source_protocol)
+    : family_(source_protocol.family()),
+      protocol_(source_protocol.protocol())
+  {
+    if (source_protocol.type() != type())
+    {
+      std::bad_cast ex;
+      asio::detail::throw_exception(ex);
+    }
+  }
+
+  /// Obtain an identifier for the type of the protocol.
+  int type() const ASIO_NOEXCEPT
+  {
+    return ASIO_OS_DEF(SOCK_STREAM);
+  }
+
+  /// Obtain an identifier for the protocol.
+  int protocol() const ASIO_NOEXCEPT
+  {
+    return protocol_;
+  }
+
+  /// Obtain an identifier for the protocol family.
+  int family() const ASIO_NOEXCEPT
+  {
+    return family_;
+  }
+
+  /// Compare two protocols for equality.
+  friend bool operator==(const stream_protocol& p1, const stream_protocol& p2)
+  {
+    return p1.family_ == p2.family_ && p1.protocol_ == p2.protocol_;
+  }
+
+  /// Compare two protocols for inequality.
+  friend bool operator!=(const stream_protocol& p1, const stream_protocol& p2)
+  {
+    return !(p1 == p2);
+  }
+
+  /// The type of an endpoint.
+  typedef basic_endpoint<stream_protocol> endpoint;
+
+  /// The generic socket type.
+  typedef basic_stream_socket<stream_protocol> socket;
+
+#if !defined(ASIO_NO_IOSTREAM)
+  /// The generic socket iostream type.
+  typedef basic_socket_iostream<stream_protocol> iostream;
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+private:
+  int family_;
+  int protocol_;
+};
+
+} // namespace generic
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_GENERIC_STREAM_PROTOCOL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/handler_alloc_hook.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/handler_alloc_hook.hpp
new file mode 100644
index 00000000000..68ab9091563
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/handler_alloc_hook.hpp
@@ -0,0 +1,81 @@
+//
+// handler_alloc_hook.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_HANDLER_ALLOC_HOOK_HPP
+#define ASIO_HANDLER_ALLOC_HOOK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Default allocation function for handlers.
+/**
+ * Asynchronous operations may need to allocate temporary objects. Since
+ * asynchronous operations have a handler function object, these temporary
+ * objects can be said to be associated with the handler.
+ *
+ * Implement asio_handler_allocate and asio_handler_deallocate for your own
+ * handlers to provide custom allocation for these temporary objects.
+ *
+ * The default implementation of these allocation hooks uses <tt>::operator
+ * new</tt> and <tt>::operator delete</tt>.
+ *
+ * @note All temporary objects associated with a handler will be deallocated
+ * before the upcall to the handler is performed. This allows the same memory to
+ * be reused for a subsequent asynchronous operation initiated by the handler.
+ *
+ * @par Example
+ * @code
+ * class my_handler;
+ *
+ * void* asio_handler_allocate(std::size_t size, my_handler* context)
+ * {
+ *   return ::operator new(size);
+ * }
+ *
+ * void asio_handler_deallocate(void* pointer, std::size_t size,
+ *     my_handler* context)
+ * {
+ *   ::operator delete(pointer);
+ * }
+ * @endcode
+ */
+ASIO_DECL void* asio_handler_allocate(
+    std::size_t size, ...);
+
+/// Default deallocation function for handlers.
+/**
+ * Implement asio_handler_allocate and asio_handler_deallocate for your own
+ * handlers to provide custom allocation for the associated temporary objects.
+ *
+ * The default implementation of these allocation hooks uses <tt>::operator
+ * new</tt> and <tt>::operator delete</tt>.
+ *
+ * @sa asio_handler_allocate.
+ */
+ASIO_DECL void asio_handler_deallocate(
+    void* pointer, std::size_t size, ...);
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/impl/handler_alloc_hook.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_HANDLER_ALLOC_HOOK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/handler_continuation_hook.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/handler_continuation_hook.hpp
new file mode 100644
index 00000000000..46eccda6248
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/handler_continuation_hook.hpp
@@ -0,0 +1,54 @@
+//
+// handler_continuation_hook.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_HANDLER_CONTINUATION_HOOK_HPP
+#define ASIO_HANDLER_CONTINUATION_HOOK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Default continuation function for handlers.
+/**
+ * Asynchronous operations may represent a continuation of the asynchronous
+ * control flow associated with the current handler. The implementation can use
+ * this knowledge to optimise scheduling of the handler.
+ *
+ * Implement asio_handler_is_continuation for your own handlers to indicate
+ * when a handler represents a continuation.
+ *
+ * The default implementation of the continuation hook returns <tt>false</tt>.
+ *
+ * @par Example
+ * @code
+ * class my_handler;
+ *
+ * bool asio_handler_is_continuation(my_handler* context)
+ * {
+ *   return true;
+ * }
+ * @endcode
+ */
+inline bool asio_handler_is_continuation(...)
+{
+  return false;
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_HANDLER_CONTINUATION_HOOK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/handler_invoke_hook.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/handler_invoke_hook.hpp
new file mode 100644
index 00000000000..013a94f637c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/handler_invoke_hook.hpp
@@ -0,0 +1,85 @@
+//
+// handler_invoke_hook.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_HANDLER_INVOKE_HOOK_HPP
+#define ASIO_HANDLER_INVOKE_HOOK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/** @defgroup asio_handler_invoke asio::asio_handler_invoke
+ *
+ * @brief Default invoke function for handlers.
+ *
+ * Completion handlers for asynchronous operations are invoked by the
+ * io_context associated with the corresponding object (e.g. a socket or
+ * deadline_timer). Certain guarantees are made on when the handler may be
+ * invoked, in particular that a handler can only be invoked from a thread that
+ * is currently calling @c run() on the corresponding io_context object.
+ * Handlers may subsequently be invoked through other objects (such as
+ * io_context::strand objects) that provide additional guarantees.
+ *
+ * When asynchronous operations are composed from other asynchronous
+ * operations, all intermediate handlers should be invoked using the same
+ * method as the final handler. This is required to ensure that user-defined
+ * objects are not accessed in a way that may violate the guarantees. This
+ * hooking function ensures that the invoked method used for the final handler
+ * is accessible at each intermediate step.
+ *
+ * Implement asio_handler_invoke for your own handlers to specify a custom
+ * invocation strategy.
+ *
+ * This default implementation invokes the function object like so:
+ * @code function(); @endcode
+ * If necessary, the default implementation makes a copy of the function object
+ * so that the non-const operator() can be used.
+ *
+ * @par Example
+ * @code
+ * class my_handler;
+ *
+ * template <typename Function>
+ * void asio_handler_invoke(Function function, my_handler* context)
+ * {
+ *   context->strand_.dispatch(function);
+ * }
+ * @endcode
+ */
+/*@{*/
+
+/// Default handler invocation hook used for non-const function objects.
+template <typename Function>
+inline void asio_handler_invoke(Function& function, ...)
+{
+  function();
+}
+
+/// Default handler invocation hook used for const function objects.
+template <typename Function>
+inline void asio_handler_invoke(const Function& function, ...)
+{
+  Function tmp(function);
+  tmp();
+}
+
+/*@}*/
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_HANDLER_INVOKE_HOOK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/high_resolution_timer.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/high_resolution_timer.hpp
new file mode 100644
index 00000000000..bde0ba10ea1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/high_resolution_timer.hpp
@@ -0,0 +1,44 @@
+//
+// high_resolution_timer.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_HIGH_RESOLUTION_TIMER_HPP
+#define ASIO_HIGH_RESOLUTION_TIMER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_CHRONO) || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/basic_waitable_timer.hpp"
+#include "asio/detail/chrono.hpp"
+
+namespace asio {
+
+/// Typedef for a timer based on the high resolution clock.
+/**
+ * This typedef uses the C++11 @c &lt;chrono&gt; standard library facility, if
+ * available. Otherwise, it may use the Boost.Chrono library. To explicitly
+ * utilise Boost.Chrono, use the basic_waitable_timer template directly:
+ * @code
+ * typedef basic_waitable_timer<boost::chrono::high_resolution_clock> timer;
+ * @endcode
+ */
+typedef basic_waitable_timer<
+    chrono::high_resolution_clock>
+  high_resolution_timer;
+
+} // namespace asio
+
+#endif // defined(ASIO_HAS_CHRONO) || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_HIGH_RESOLUTION_TIMER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/awaitable.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/awaitable.hpp
new file mode 100644
index 00000000000..9bd139d1602
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/awaitable.hpp
@@ -0,0 +1,422 @@
+//
+// impl/awaitable.hpp
+// ~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_AWAITABLE_HPP
+#define ASIO_IMPL_AWAITABLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <exception>
+#include <new>
+#include <tuple>
+#include <utility>
+#include "asio/detail/thread_context.hpp"
+#include "asio/detail/thread_info_base.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/post.hpp"
+#include "asio/system_error.hpp"
+#include "asio/this_coro.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// An awaitable_thread represents a thread-of-execution that is composed of one
+// or more "stack frames", with each frame represented by an awaitable_frame.
+// All execution occurs in the context of the awaitable_thread's executor. An
+// awaitable_thread continues to "pump" the stack frames by repeatedly resuming
+// the top stack frame until the stack is empty, or until ownership of the
+// stack is transferred to another awaitable_thread object.
+//
+//                +------------------------------------+
+//                | top_of_stack_                      |
+//                |                                    V
+// +--------------+---+                            +-----------------+
+// |                  |                            |                 |
+// | awaitable_thread |<---------------------------+ awaitable_frame |
+// |                  |           attached_thread_ |                 |
+// +--------------+---+           (Set only when   +---+-------------+
+//                |               frames are being     |
+//                |               actively pumped      | caller_
+//                |               by a thread, and     |
+//                |               then only for        V
+//                |               the top frame.)  +-----------------+
+//                |                                |                 |
+//                |                                | awaitable_frame |
+//                |                                |                 |
+//                |                                +---+-------------+
+//                |                                    |
+//                |                                    | caller_
+//                |                                    :
+//                |                                    :
+//                |                                    |
+//                |                                    V
+//                |                                +-----------------+
+//                | bottom_of_stack_               |                 |
+//                +------------------------------->| awaitable_frame |
+//                                                 |                 |
+//                                                 +-----------------+
+
+template <typename Executor>
+class awaitable_frame_base
+{
+public:
+#if !defined(ASIO_DISABLE_AWAITABLE_FRAME_RECYCLING)
+  void* operator new(std::size_t size)
+  {
+    return asio::detail::thread_info_base::allocate(
+        asio::detail::thread_info_base::awaitable_frame_tag(),
+        asio::detail::thread_context::thread_call_stack::top(),
+        size);
+  }
+
+  void operator delete(void* pointer, std::size_t size)
+  {
+    asio::detail::thread_info_base::deallocate(
+        asio::detail::thread_info_base::awaitable_frame_tag(),
+        asio::detail::thread_context::thread_call_stack::top(),
+        pointer, size);
+  }
+#endif // !defined(ASIO_DISABLE_AWAITABLE_FRAME_RECYCLING)
+
+  // The frame starts in a suspended state until the awaitable_thread object
+  // pumps the stack.
+  auto initial_suspend() noexcept
+  {
+    return suspend_always();
+  }
+
+  // On final suspension the frame is popped from the top of the stack.
+  auto final_suspend() noexcept
+  {
+    struct result
+    {
+      awaitable_frame_base* this_;
+
+      bool await_ready() const noexcept
+      {
+        return false;
+      }
+
+      void await_suspend(coroutine_handle<void>) noexcept
+      {
+        this_->pop_frame();
+      }
+
+      void await_resume() const noexcept
+      {
+      }
+    };
+
+    return result{this};
+  }
+
+  void set_except(std::exception_ptr e) noexcept
+  {
+    pending_exception_ = e;
+  }
+
+  void set_error(const asio::error_code& ec)
+  {
+    this->set_except(std::make_exception_ptr(asio::system_error(ec)));
+  }
+
+  void unhandled_exception()
+  {
+    set_except(std::current_exception());
+  }
+
+  void rethrow_exception()
+  {
+    if (pending_exception_)
+    {
+      std::exception_ptr ex = std::exchange(pending_exception_, nullptr);
+      std::rethrow_exception(ex);
+    }
+  }
+
+  template <typename T>
+  auto await_transform(awaitable<T, Executor> a) const
+  {
+    return a;
+  }
+
+  // This await transformation obtains the associated executor of the thread of
+  // execution.
+  auto await_transform(this_coro::executor_t) noexcept
+  {
+    struct result
+    {
+      awaitable_frame_base* this_;
+
+      bool await_ready() const noexcept
+      {
+        return true;
+      }
+
+      void await_suspend(coroutine_handle<void>) noexcept
+      {
+      }
+
+      auto await_resume() const noexcept
+      {
+        return this_->attached_thread_->get_executor();
+      }
+    };
+
+    return result{this};
+  }
+
+  // This await transformation is used to run an async operation's initiation
+  // function object after the coroutine has been suspended. This ensures that
+  // immediate resumption of the coroutine in another thread does not cause a
+  // race condition.
+  template <typename Function>
+  auto await_transform(Function f,
+      typename enable_if<
+        is_convertible<
+          typename result_of<Function(awaitable_frame_base*)>::type,
+          awaitable_thread<Executor>*
+        >::value
+      >::type* = 0)
+  {
+    struct result
+    {
+      Function function_;
+      awaitable_frame_base* this_;
+
+      bool await_ready() const noexcept
+      {
+        return false;
+      }
+
+      void await_suspend(coroutine_handle<void>) noexcept
+      {
+        function_(this_);
+      }
+
+      void await_resume() const noexcept
+      {
+      }
+    };
+
+    return result{std::move(f), this};
+  }
+
+  void attach_thread(awaitable_thread<Executor>* handler) noexcept
+  {
+    attached_thread_ = handler;
+  }
+
+  awaitable_thread<Executor>* detach_thread() noexcept
+  {
+    return std::exchange(attached_thread_, nullptr);
+  }
+
+  void push_frame(awaitable_frame_base<Executor>* caller) noexcept
+  {
+    caller_ = caller;
+    attached_thread_ = caller_->attached_thread_;
+    attached_thread_->top_of_stack_ = this;
+    caller_->attached_thread_ = nullptr;
+  }
+
+  void pop_frame() noexcept
+  {
+    if (caller_)
+      caller_->attached_thread_ = attached_thread_;
+    attached_thread_->top_of_stack_ = caller_;
+    attached_thread_ = nullptr;
+    caller_ = nullptr;
+  }
+
+  void resume()
+  {
+    coro_.resume();
+  }
+
+  void destroy()
+  {
+    coro_.destroy();
+  }
+
+protected:
+  coroutine_handle<void> coro_ = nullptr;
+  awaitable_thread<Executor>* attached_thread_ = nullptr;
+  awaitable_frame_base<Executor>* caller_ = nullptr;
+  std::exception_ptr pending_exception_ = nullptr;
+};
+
+template <typename T, typename Executor>
+class awaitable_frame
+  : public awaitable_frame_base<Executor>
+{
+public:
+  awaitable_frame() noexcept
+  {
+  }
+
+  awaitable_frame(awaitable_frame&& other) noexcept
+    : awaitable_frame_base<Executor>(std::move(other))
+  {
+  }
+
+  ~awaitable_frame()
+  {
+    if (has_result_)
+      static_cast<T*>(static_cast<void*>(result_))->~T();
+  }
+
+  awaitable<T, Executor> get_return_object() noexcept
+  {
+    this->coro_ = coroutine_handle<awaitable_frame>::from_promise(*this);
+    return awaitable<T, Executor>(this);
+  };
+
+  template <typename U>
+  void return_value(U&& u)
+  {
+    new (&result_) T(std::forward<U>(u));
+    has_result_ = true;
+  }
+
+  template <typename... Us>
+  void return_values(Us&&... us)
+  {
+    this->return_value(std::forward_as_tuple(std::forward<Us>(us)...));
+  }
+
+  T get()
+  {
+    this->caller_ = nullptr;
+    this->rethrow_exception();
+    return std::move(*static_cast<T*>(static_cast<void*>(result_)));
+  }
+
+private:
+  alignas(T) unsigned char result_[sizeof(T)];
+  bool has_result_ = false;
+};
+
+template <typename Executor>
+class awaitable_frame<void, Executor>
+  : public awaitable_frame_base<Executor>
+{
+public:
+  awaitable<void, Executor> get_return_object()
+  {
+    this->coro_ = coroutine_handle<awaitable_frame>::from_promise(*this);
+    return awaitable<void, Executor>(this);
+  };
+
+  void return_void()
+  {
+  }
+
+  void get()
+  {
+    this->caller_ = nullptr;
+    this->rethrow_exception();
+  }
+};
+
+template <typename Executor>
+class awaitable_thread
+{
+public:
+  typedef Executor executor_type;
+
+  // Construct from the entry point of a new thread of execution.
+  awaitable_thread(awaitable<void, Executor> p, const Executor& ex)
+    : bottom_of_stack_(std::move(p)),
+      top_of_stack_(bottom_of_stack_.frame_),
+      executor_(ex)
+  {
+  }
+
+  // Transfer ownership from another awaitable_thread.
+  awaitable_thread(awaitable_thread&& other) noexcept
+    : bottom_of_stack_(std::move(other.bottom_of_stack_)),
+      top_of_stack_(std::exchange(other.top_of_stack_, nullptr)),
+      executor_(std::move(other.executor_))
+  {
+  }
+
+  // Clean up with a last ditch effort to ensure the thread is unwound within
+  // the context of the executor.
+  ~awaitable_thread()
+  {
+    if (bottom_of_stack_.valid())
+    {
+      // Coroutine "stack unwinding" must be performed through the executor.
+      (post)(executor_,
+          [a = std::move(bottom_of_stack_)]() mutable
+          {
+            awaitable<void, Executor>(std::move(a));
+          });
+    }
+  }
+
+  executor_type get_executor() const noexcept
+  {
+    return executor_;
+  }
+
+  // Launch a new thread of execution.
+  void launch()
+  {
+    top_of_stack_->attach_thread(this);
+    pump();
+  }
+
+protected:
+  template <typename> friend class awaitable_frame_base;
+
+  // Repeatedly resume the top stack frame until the stack is empty or until it
+  // has been transferred to another resumable_thread object.
+  void pump()
+  {
+    do top_of_stack_->resume(); while (top_of_stack_);
+    if (bottom_of_stack_.valid())
+    {
+      awaitable<void, Executor> a(std::move(bottom_of_stack_));
+      a.frame_->rethrow_exception();
+    }
+  }
+
+  awaitable<void, Executor> bottom_of_stack_;
+  awaitable_frame_base<Executor>* top_of_stack_;
+  executor_type executor_;
+};
+
+} // namespace detail
+} // namespace asio
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+namespace std { namespace experimental {
+
+template <typename T, typename Executor, typename... Args>
+struct coroutine_traits<asio::awaitable<T, Executor>, Args...>
+{
+  typedef asio::detail::awaitable_frame<T, Executor> promise_type;
+};
+
+}} // namespace std::experimental
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_AWAITABLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/buffered_read_stream.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/buffered_read_stream.hpp
new file mode 100644
index 00000000000..d4e0cacf9de
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/buffered_read_stream.hpp
@@ -0,0 +1,489 @@
+//
+// impl/buffered_read_stream.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_BUFFERED_READ_STREAM_HPP
+#define ASIO_IMPL_BUFFERED_READ_STREAM_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/type_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+template <typename Stream>
+std::size_t buffered_read_stream<Stream>::fill()
+{
+  detail::buffer_resize_guard<detail::buffered_stream_storage>
+    resize_guard(storage_);
+  std::size_t previous_size = storage_.size();
+  storage_.resize(storage_.capacity());
+  storage_.resize(previous_size + next_layer_.read_some(buffer(
+          storage_.data() + previous_size,
+          storage_.size() - previous_size)));
+  resize_guard.commit();
+  return storage_.size() - previous_size;
+}
+
+template <typename Stream>
+std::size_t buffered_read_stream<Stream>::fill(asio::error_code& ec)
+{
+  detail::buffer_resize_guard<detail::buffered_stream_storage>
+    resize_guard(storage_);
+  std::size_t previous_size = storage_.size();
+  storage_.resize(storage_.capacity());
+  storage_.resize(previous_size + next_layer_.read_some(buffer(
+          storage_.data() + previous_size,
+          storage_.size() - previous_size),
+        ec));
+  resize_guard.commit();
+  return storage_.size() - previous_size;
+}
+
+namespace detail
+{
+  template <typename ReadHandler>
+  class buffered_fill_handler
+  {
+  public:
+    buffered_fill_handler(detail::buffered_stream_storage& storage,
+        std::size_t previous_size, ReadHandler& handler)
+      : storage_(storage),
+        previous_size_(previous_size),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    buffered_fill_handler(const buffered_fill_handler& other)
+      : storage_(other.storage_),
+        previous_size_(other.previous_size_),
+        handler_(other.handler_)
+    {
+    }
+
+    buffered_fill_handler(buffered_fill_handler&& other)
+      : storage_(other.storage_),
+        previous_size_(other.previous_size_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        const std::size_t bytes_transferred)
+    {
+      storage_.resize(previous_size_ + bytes_transferred);
+      handler_(ec, bytes_transferred);
+    }
+
+  //private:
+    detail::buffered_stream_storage& storage_;
+    std::size_t previous_size_;
+    ReadHandler handler_;
+  };
+
+  template <typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      buffered_fill_handler<ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      buffered_fill_handler<ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      buffered_fill_handler<ReadHandler>* this_handler)
+  {
+    return asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      buffered_fill_handler<ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      buffered_fill_handler<ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Stream>
+  class initiate_async_buffered_fill
+  {
+  public:
+    typedef typename remove_reference<
+      Stream>::type::lowest_layer_type::executor_type executor_type;
+
+    explicit initiate_async_buffered_fill(Stream& next_layer)
+      : next_layer_(next_layer)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return next_layer_.lowest_layer().get_executor();
+    }
+
+    template <typename ReadHandler>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        buffered_stream_storage* storage) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      std::size_t previous_size = storage->size();
+      storage->resize(storage->capacity());
+      next_layer_.async_read_some(
+          buffer(
+            storage->data() + previous_size,
+            storage->size() - previous_size),
+          buffered_fill_handler<typename decay<ReadHandler>::type>(
+            *storage, previous_size, handler2.value));
+    }
+
+  private:
+    Stream& next_layer_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::buffered_fill_handler<ReadHandler>, Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(const detail::buffered_fill_handler<ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::buffered_fill_handler<ReadHandler>, Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(const detail::buffered_fill_handler<ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename Stream>
+template <
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+buffered_read_stream<Stream>::async_fill(
+    ASIO_MOVE_ARG(ReadHandler) handler)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_buffered_fill<Stream>(next_layer_),
+      handler, &storage_);
+}
+
+template <typename Stream>
+template <typename MutableBufferSequence>
+std::size_t buffered_read_stream<Stream>::read_some(
+    const MutableBufferSequence& buffers)
+{
+  using asio::buffer_size;
+  if (buffer_size(buffers) == 0)
+    return 0;
+
+  if (storage_.empty())
+    this->fill();
+
+  return this->copy(buffers);
+}
+
+template <typename Stream>
+template <typename MutableBufferSequence>
+std::size_t buffered_read_stream<Stream>::read_some(
+    const MutableBufferSequence& buffers, asio::error_code& ec)
+{
+  ec = asio::error_code();
+
+  using asio::buffer_size;
+  if (buffer_size(buffers) == 0)
+    return 0;
+
+  if (storage_.empty() && !this->fill(ec))
+    return 0;
+
+  return this->copy(buffers);
+}
+
+namespace detail
+{
+  template <typename MutableBufferSequence, typename ReadHandler>
+  class buffered_read_some_handler
+  {
+  public:
+    buffered_read_some_handler(detail::buffered_stream_storage& storage,
+        const MutableBufferSequence& buffers, ReadHandler& handler)
+      : storage_(storage),
+        buffers_(buffers),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+      buffered_read_some_handler(const buffered_read_some_handler& other)
+        : storage_(other.storage_),
+          buffers_(other.buffers_),
+          handler_(other.handler_)
+      {
+      }
+
+      buffered_read_some_handler(buffered_read_some_handler&& other)
+        : storage_(other.storage_),
+          buffers_(other.buffers_),
+          handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+      {
+      }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec, std::size_t)
+    {
+      if (ec || storage_.empty())
+      {
+        const std::size_t length = 0;
+        handler_(ec, length);
+      }
+      else
+      {
+        const std::size_t bytes_copied = asio::buffer_copy(
+            buffers_, storage_.data(), storage_.size());
+        storage_.consume(bytes_copied);
+        handler_(ec, bytes_copied);
+      }
+    }
+
+  //private:
+    detail::buffered_stream_storage& storage_;
+    MutableBufferSequence buffers_;
+    ReadHandler handler_;
+  };
+
+  template <typename MutableBufferSequence, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      buffered_read_some_handler<
+        MutableBufferSequence, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename MutableBufferSequence, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      buffered_read_some_handler<
+        MutableBufferSequence, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename MutableBufferSequence, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      buffered_read_some_handler<
+        MutableBufferSequence, ReadHandler>* this_handler)
+  {
+    return asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename MutableBufferSequence,
+      typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      buffered_read_some_handler<
+        MutableBufferSequence, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename MutableBufferSequence,
+      typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      buffered_read_some_handler<
+        MutableBufferSequence, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Stream>
+  class initiate_async_buffered_read_some
+  {
+  public:
+    typedef typename remove_reference<
+      Stream>::type::lowest_layer_type::executor_type executor_type;
+
+    explicit initiate_async_buffered_read_some(Stream& next_layer)
+      : next_layer_(next_layer)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return next_layer_.lowest_layer().get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        buffered_stream_storage* storage,
+        const MutableBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      using asio::buffer_size;
+      non_const_lvalue<ReadHandler> handler2(handler);
+      if (buffer_size(buffers) == 0 || !storage->empty())
+      {
+        next_layer_.async_read_some(ASIO_MUTABLE_BUFFER(0, 0),
+            buffered_read_some_handler<MutableBufferSequence,
+              typename decay<ReadHandler>::type>(
+                *storage, buffers, handler2.value));
+      }
+      else
+      {
+        initiate_async_buffered_fill<Stream>(this->next_layer_)(
+            buffered_read_some_handler<MutableBufferSequence,
+              typename decay<ReadHandler>::type>(
+                *storage, buffers, handler2.value),
+            storage);
+      }
+    }
+
+  private:
+    Stream& next_layer_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename MutableBufferSequence,
+    typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::buffered_read_some_handler<MutableBufferSequence, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::buffered_read_some_handler<
+        MutableBufferSequence, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename MutableBufferSequence,
+    typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::buffered_read_some_handler<MutableBufferSequence, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::buffered_read_some_handler<
+        MutableBufferSequence, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename Stream>
+template <typename MutableBufferSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+buffered_read_stream<Stream>::async_read_some(
+    const MutableBufferSequence& buffers,
+    ASIO_MOVE_ARG(ReadHandler) handler)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_buffered_read_some<Stream>(next_layer_),
+      handler, &storage_, buffers);
+}
+
+template <typename Stream>
+template <typename MutableBufferSequence>
+std::size_t buffered_read_stream<Stream>::peek(
+    const MutableBufferSequence& buffers)
+{
+  if (storage_.empty())
+    this->fill();
+  return this->peek_copy(buffers);
+}
+
+template <typename Stream>
+template <typename MutableBufferSequence>
+std::size_t buffered_read_stream<Stream>::peek(
+    const MutableBufferSequence& buffers, asio::error_code& ec)
+{
+  ec = asio::error_code();
+  if (storage_.empty() && !this->fill(ec))
+    return 0;
+  return this->peek_copy(buffers);
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_BUFFERED_READ_STREAM_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/buffered_write_stream.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/buffered_write_stream.hpp
new file mode 100644
index 00000000000..c2c9755a855
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/buffered_write_stream.hpp
@@ -0,0 +1,469 @@
+//
+// impl/buffered_write_stream.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_BUFFERED_WRITE_STREAM_HPP
+#define ASIO_IMPL_BUFFERED_WRITE_STREAM_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+template <typename Stream>
+std::size_t buffered_write_stream<Stream>::flush()
+{
+  std::size_t bytes_written = write(next_layer_,
+      buffer(storage_.data(), storage_.size()));
+  storage_.consume(bytes_written);
+  return bytes_written;
+}
+
+template <typename Stream>
+std::size_t buffered_write_stream<Stream>::flush(asio::error_code& ec)
+{
+  std::size_t bytes_written = write(next_layer_,
+      buffer(storage_.data(), storage_.size()),
+      transfer_all(), ec);
+  storage_.consume(bytes_written);
+  return bytes_written;
+}
+
+namespace detail
+{
+  template <typename WriteHandler>
+  class buffered_flush_handler
+  {
+  public:
+    buffered_flush_handler(detail::buffered_stream_storage& storage,
+        WriteHandler& handler)
+      : storage_(storage),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    buffered_flush_handler(const buffered_flush_handler& other)
+      : storage_(other.storage_),
+        handler_(other.handler_)
+    {
+    }
+
+    buffered_flush_handler(buffered_flush_handler&& other)
+      : storage_(other.storage_),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        const std::size_t bytes_written)
+    {
+      storage_.consume(bytes_written);
+      handler_(ec, bytes_written);
+    }
+
+  //private:
+    detail::buffered_stream_storage& storage_;
+    WriteHandler handler_;
+  };
+
+  template <typename WriteHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      buffered_flush_handler<WriteHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename WriteHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      buffered_flush_handler<WriteHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename WriteHandler>
+  inline bool asio_handler_is_continuation(
+      buffered_flush_handler<WriteHandler>* this_handler)
+  {
+    return asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename WriteHandler>
+  inline void asio_handler_invoke(Function& function,
+      buffered_flush_handler<WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename WriteHandler>
+  inline void asio_handler_invoke(const Function& function,
+      buffered_flush_handler<WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Stream>
+  class initiate_async_buffered_flush
+  {
+  public:
+    typedef typename remove_reference<
+      Stream>::type::lowest_layer_type::executor_type executor_type;
+
+    explicit initiate_async_buffered_flush(Stream& next_layer)
+      : next_layer_(next_layer)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return next_layer_.lowest_layer().get_executor();
+    }
+
+    template <typename WriteHandler>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        buffered_stream_storage* storage) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      non_const_lvalue<WriteHandler> handler2(handler);
+      async_write(next_layer_, buffer(storage->data(), storage->size()),
+          buffered_flush_handler<typename decay<WriteHandler>::type>(
+            *storage, handler2.value));
+    }
+
+  private:
+    Stream& next_layer_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename WriteHandler, typename Allocator>
+struct associated_allocator<
+    detail::buffered_flush_handler<WriteHandler>, Allocator>
+{
+  typedef typename associated_allocator<WriteHandler, Allocator>::type type;
+
+  static type get(const detail::buffered_flush_handler<WriteHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<WriteHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename WriteHandler, typename Executor>
+struct associated_executor<
+    detail::buffered_flush_handler<WriteHandler>, Executor>
+{
+  typedef typename associated_executor<WriteHandler, Executor>::type type;
+
+  static type get(const detail::buffered_flush_handler<WriteHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<WriteHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename Stream>
+template <
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+buffered_write_stream<Stream>::async_flush(
+    ASIO_MOVE_ARG(WriteHandler) handler)
+{
+  return async_initiate<WriteHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_buffered_flush<Stream>(next_layer_),
+      handler, &storage_);
+}
+
+template <typename Stream>
+template <typename ConstBufferSequence>
+std::size_t buffered_write_stream<Stream>::write_some(
+    const ConstBufferSequence& buffers)
+{
+  using asio::buffer_size;
+  if (buffer_size(buffers) == 0)
+    return 0;
+
+  if (storage_.size() == storage_.capacity())
+    this->flush();
+
+  return this->copy(buffers);
+}
+
+template <typename Stream>
+template <typename ConstBufferSequence>
+std::size_t buffered_write_stream<Stream>::write_some(
+    const ConstBufferSequence& buffers, asio::error_code& ec)
+{
+  ec = asio::error_code();
+
+  using asio::buffer_size;
+  if (buffer_size(buffers) == 0)
+    return 0;
+
+  if (storage_.size() == storage_.capacity() && !flush(ec))
+    return 0;
+
+  return this->copy(buffers);
+}
+
+namespace detail
+{
+  template <typename ConstBufferSequence, typename WriteHandler>
+  class buffered_write_some_handler
+  {
+  public:
+    buffered_write_some_handler(detail::buffered_stream_storage& storage,
+        const ConstBufferSequence& buffers, WriteHandler& handler)
+      : storage_(storage),
+        buffers_(buffers),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+      buffered_write_some_handler(const buffered_write_some_handler& other)
+        : storage_(other.storage_),
+          buffers_(other.buffers_),
+          handler_(other.handler_)
+      {
+      }
+
+      buffered_write_some_handler(buffered_write_some_handler&& other)
+        : storage_(other.storage_),
+          buffers_(other.buffers_),
+          handler_(ASIO_MOVE_CAST(WriteHandler)(other.handler_))
+      {
+      }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec, std::size_t)
+    {
+      if (ec)
+      {
+        const std::size_t length = 0;
+        handler_(ec, length);
+      }
+      else
+      {
+        using asio::buffer_size;
+        std::size_t orig_size = storage_.size();
+        std::size_t space_avail = storage_.capacity() - orig_size;
+        std::size_t bytes_avail = buffer_size(buffers_);
+        std::size_t length = bytes_avail < space_avail
+          ? bytes_avail : space_avail;
+        storage_.resize(orig_size + length);
+        const std::size_t bytes_copied = asio::buffer_copy(
+            storage_.data() + orig_size, buffers_, length);
+        handler_(ec, bytes_copied);
+      }
+    }
+
+  //private:
+    detail::buffered_stream_storage& storage_;
+    ConstBufferSequence buffers_;
+    WriteHandler handler_;
+  };
+
+  template <typename ConstBufferSequence, typename WriteHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      buffered_write_some_handler<
+        ConstBufferSequence, WriteHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename ConstBufferSequence, typename WriteHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      buffered_write_some_handler<
+        ConstBufferSequence, WriteHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename ConstBufferSequence, typename WriteHandler>
+  inline bool asio_handler_is_continuation(
+      buffered_write_some_handler<
+        ConstBufferSequence, WriteHandler>* this_handler)
+  {
+    return asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename ConstBufferSequence,
+      typename WriteHandler>
+  inline void asio_handler_invoke(Function& function,
+      buffered_write_some_handler<
+        ConstBufferSequence, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename ConstBufferSequence,
+      typename WriteHandler>
+  inline void asio_handler_invoke(const Function& function,
+      buffered_write_some_handler<
+        ConstBufferSequence, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Stream>
+  class initiate_async_buffered_write_some
+  {
+  public:
+    typedef typename remove_reference<
+      Stream>::type::lowest_layer_type::executor_type executor_type;
+
+    explicit initiate_async_buffered_write_some(Stream& next_layer)
+      : next_layer_(next_layer)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return next_layer_.lowest_layer().get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        buffered_stream_storage* storage,
+        const ConstBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      using asio::buffer_size;
+      non_const_lvalue<WriteHandler> handler2(handler);
+      if (buffer_size(buffers) == 0 || storage->size() < storage->capacity())
+      {
+        next_layer_.async_write_some(ASIO_CONST_BUFFER(0, 0),
+            buffered_write_some_handler<ConstBufferSequence,
+              typename decay<WriteHandler>::type>(
+                *storage, buffers, handler2.value));
+      }
+      else
+      {
+        initiate_async_buffered_flush<Stream>(this->next_layer_)(
+            buffered_write_some_handler<ConstBufferSequence,
+              typename decay<WriteHandler>::type>(
+                *storage, buffers, handler2.value),
+            storage);
+      }
+    }
+
+  private:
+    Stream& next_layer_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename ConstBufferSequence,
+    typename WriteHandler, typename Allocator>
+struct associated_allocator<
+    detail::buffered_write_some_handler<ConstBufferSequence, WriteHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<WriteHandler, Allocator>::type type;
+
+  static type get(
+      const detail::buffered_write_some_handler<
+        ConstBufferSequence, WriteHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<WriteHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename ConstBufferSequence,
+    typename WriteHandler, typename Executor>
+struct associated_executor<
+    detail::buffered_write_some_handler<ConstBufferSequence, WriteHandler>,
+    Executor>
+{
+  typedef typename associated_executor<WriteHandler, Executor>::type type;
+
+  static type get(
+      const detail::buffered_write_some_handler<
+        ConstBufferSequence, WriteHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<WriteHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename Stream>
+template <typename ConstBufferSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+buffered_write_stream<Stream>::async_write_some(
+    const ConstBufferSequence& buffers,
+    ASIO_MOVE_ARG(WriteHandler) handler)
+{
+  return async_initiate<WriteHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_buffered_write_some<Stream>(next_layer_),
+      handler, &storage_, buffers);
+}
+
+template <typename Stream>
+template <typename ConstBufferSequence>
+std::size_t buffered_write_stream<Stream>::copy(
+    const ConstBufferSequence& buffers)
+{
+  using asio::buffer_size;
+  std::size_t orig_size = storage_.size();
+  std::size_t space_avail = storage_.capacity() - orig_size;
+  std::size_t bytes_avail = buffer_size(buffers);
+  std::size_t length = bytes_avail < space_avail ? bytes_avail : space_avail;
+  storage_.resize(orig_size + length);
+  return asio::buffer_copy(
+      storage_.data() + orig_size, buffers, length);
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_BUFFERED_WRITE_STREAM_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/co_spawn.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/co_spawn.hpp
new file mode 100644
index 00000000000..7360ab0c6c8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/co_spawn.hpp
@@ -0,0 +1,160 @@
+//
+// impl/co_spawn.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_CO_SPAWN_HPP
+#define ASIO_IMPL_CO_SPAWN_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/awaitable.hpp"
+#include "asio/dispatch.hpp"
+#include "asio/post.hpp"
+#include "asio/use_awaitable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename T, typename Executor, typename F, typename Handler>
+awaitable<void, Executor> co_spawn_entry_point(
+    awaitable<T, Executor>*, Executor ex, F f, Handler handler)
+{
+  auto spawn_work = make_work_guard(ex);
+  auto handler_work = make_work_guard(handler, ex);
+
+  (void) co_await (post)(spawn_work.get_executor(),
+      use_awaitable_t<Executor>{});
+
+  bool done = false;
+  try
+  {
+    T t = co_await f();
+
+    done = true;
+
+    (dispatch)(handler_work.get_executor(),
+        [handler = std::move(handler), t = std::move(t)]() mutable
+        {
+          handler(std::exception_ptr(), std::move(t));
+        });
+  }
+  catch (...)
+  {
+    if (done)
+      throw;
+
+    (dispatch)(handler_work.get_executor(),
+        [handler = std::move(handler), e = std::current_exception()]() mutable
+        {
+          handler(e, T());
+        });
+  }
+}
+
+template <typename Executor, typename F, typename Handler>
+awaitable<void, Executor> co_spawn_entry_point(
+    awaitable<void, Executor>*, Executor ex, F f, Handler handler)
+{
+  auto spawn_work = make_work_guard(ex);
+  auto handler_work = make_work_guard(handler, ex);
+
+  (void) co_await (post)(spawn_work.get_executor(),
+      use_awaitable_t<Executor>{});
+
+  std::exception_ptr e = nullptr;
+  try
+  {
+    co_await f();
+  }
+  catch (...)
+  {
+    e = std::current_exception();
+  }
+
+  (dispatch)(handler_work.get_executor(),
+      [handler = std::move(handler), e]() mutable
+      {
+        handler(e);
+      });
+}
+
+template <typename Executor>
+class initiate_co_spawn
+{
+public:
+  typedef Executor executor_type;
+
+  template <typename OtherExecutor>
+  explicit initiate_co_spawn(const OtherExecutor& ex)
+    : ex_(ex)
+  {
+  }
+
+  executor_type get_executor() const ASIO_NOEXCEPT
+  {
+    return ex_;
+  }
+
+  template <typename Handler, typename F>
+  void operator()(Handler&& handler, F&& f) const
+  {
+    typedef typename result_of<F()>::type awaitable_type;
+
+    auto a = (co_spawn_entry_point)(static_cast<awaitable_type*>(nullptr),
+        ex_, std::forward<F>(f), std::forward<Handler>(handler));
+    awaitable_handler<executor_type, void>(std::move(a), ex_).launch();
+  }
+
+private:
+  Executor ex_;
+};
+
+} // namespace detail
+
+template <typename Executor, typename F,
+    ASIO_COMPLETION_TOKEN_FOR(typename detail::awaitable_signature<
+      typename result_of<F()>::type>::type) CompletionToken>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken,
+    typename detail::awaitable_signature<typename result_of<F()>::type>::type)
+co_spawn(const Executor& ex, F&& f, CompletionToken&& token,
+    typename enable_if<
+      is_executor<Executor>::value
+    >::type*)
+{
+  return async_initiate<CompletionToken,
+    typename detail::awaitable_signature<typename result_of<F()>::type>>(
+      detail::initiate_co_spawn<
+        typename result_of<F()>::type::executor_type>(ex),
+      token, std::forward<F>(f));
+}
+
+template <typename ExecutionContext, typename F,
+    ASIO_COMPLETION_TOKEN_FOR(typename detail::awaitable_signature<
+      typename result_of<F()>::type>::type) CompletionToken>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken,
+    typename detail::awaitable_signature<typename result_of<F()>::type>::type)
+co_spawn(ExecutionContext& ctx, F&& f, CompletionToken&& token,
+    typename enable_if<
+      is_convertible<ExecutionContext&, execution_context&>::value
+    >::type*)
+{
+  return (co_spawn)(ctx.get_executor(), std::forward<F>(f),
+      std::forward<CompletionToken>(token));
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_CO_SPAWN_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/compose.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/compose.hpp
new file mode 100644
index 00000000000..0896e9c56a8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/compose.hpp
@@ -0,0 +1,532 @@
+//
+// impl/compose.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_COMPOSE_HPP
+#define ASIO_IMPL_COMPOSE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/detail/variadic_templates.hpp"
+#include "asio/executor_work_guard.hpp"
+#include "asio/is_executor.hpp"
+#include "asio/system_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail
+{
+  template <typename>
+  struct composed_io_executors;
+
+  template <>
+  struct composed_io_executors<void()>
+  {
+    composed_io_executors() ASIO_NOEXCEPT
+      : head_(system_executor())
+    {
+    }
+
+    typedef system_executor head_type;
+    system_executor head_;
+  };
+
+  inline composed_io_executors<void()> make_composed_io_executors()
+  {
+    return composed_io_executors<void()>();
+  }
+
+  template <typename Head>
+  struct composed_io_executors<void(Head)>
+  {
+    explicit composed_io_executors(const Head& ex) ASIO_NOEXCEPT
+      : head_(ex)
+    {
+    }
+
+    typedef Head head_type;
+    Head head_;
+  };
+
+  template <typename Head>
+  inline composed_io_executors<void(Head)>
+  make_composed_io_executors(const Head& head)
+  {
+    return composed_io_executors<void(Head)>(head);
+  }
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Head, typename... Tail>
+  struct composed_io_executors<void(Head, Tail...)>
+  {
+    explicit composed_io_executors(const Head& head,
+        const Tail&... tail) ASIO_NOEXCEPT
+      : head_(head),
+        tail_(tail...)
+    {
+    }
+
+    void reset()
+    {
+      head_.reset();
+      tail_.reset();
+    }
+
+    typedef Head head_type;
+    Head head_;
+    composed_io_executors<void(Tail...)> tail_;
+  };
+
+  template <typename Head, typename... Tail>
+  inline composed_io_executors<void(Head, Tail...)>
+  make_composed_io_executors(const Head& head, const Tail&... tail)
+  {
+    return composed_io_executors<void(Head, Tail...)>(head, tail...);
+  }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#define ASIO_PRIVATE_COMPOSED_IO_EXECUTORS_DEF(n) \
+  template <typename Head, ASIO_VARIADIC_TPARAMS(n)> \
+  struct composed_io_executors<void(Head, ASIO_VARIADIC_TARGS(n))> \
+  { \
+    explicit composed_io_executors(const Head& head, \
+        ASIO_VARIADIC_CONSTREF_PARAMS(n)) ASIO_NOEXCEPT \
+      : head_(head), \
+        tail_(ASIO_VARIADIC_BYVAL_ARGS(n)) \
+    { \
+    } \
+  \
+    void reset() \
+    { \
+      head_.reset(); \
+      tail_.reset(); \
+    } \
+  \
+    typedef Head head_type; \
+    Head head_; \
+    composed_io_executors<void(ASIO_VARIADIC_TARGS(n))> tail_; \
+  }; \
+  \
+  template <typename Head, ASIO_VARIADIC_TPARAMS(n)> \
+  inline composed_io_executors<void(Head, ASIO_VARIADIC_TARGS(n))> \
+  make_composed_io_executors(const Head& head, \
+      ASIO_VARIADIC_CONSTREF_PARAMS(n)) \
+  { \
+    return composed_io_executors< \
+      void(Head, ASIO_VARIADIC_TARGS(n))>( \
+        head, ASIO_VARIADIC_BYVAL_ARGS(n)); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_COMPOSED_IO_EXECUTORS_DEF)
+#undef ASIO_PRIVATE_COMPOSED_IO_EXECUTORS_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename>
+  struct composed_work;
+
+  template <>
+  struct composed_work<void()>
+  {
+    typedef composed_io_executors<void()> executors_type;
+
+    composed_work(const executors_type&) ASIO_NOEXCEPT
+      : head_(system_executor())
+    {
+    }
+
+    void reset()
+    {
+      head_.reset();
+    }
+
+    typedef system_executor head_type;
+    executor_work_guard<system_executor> head_;
+  };
+
+  template <typename Head>
+  struct composed_work<void(Head)>
+  {
+    typedef composed_io_executors<void(Head)> executors_type;
+
+    explicit composed_work(const executors_type& ex) ASIO_NOEXCEPT
+      : head_(ex.head_)
+    {
+    }
+
+    void reset()
+    {
+      head_.reset();
+    }
+
+    typedef Head head_type;
+    executor_work_guard<Head> head_;
+  };
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Head, typename... Tail>
+  struct composed_work<void(Head, Tail...)>
+  {
+    typedef composed_io_executors<void(Head, Tail...)> executors_type;
+
+    explicit composed_work(const executors_type& ex) ASIO_NOEXCEPT
+      : head_(ex.head_),
+        tail_(ex.tail_)
+    {
+    }
+
+    void reset()
+    {
+      head_.reset();
+      tail_.reset();
+    }
+
+    typedef Head head_type;
+    executor_work_guard<Head> head_;
+    composed_work<void(Tail...)> tail_;
+  };
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#define ASIO_PRIVATE_COMPOSED_WORK_DEF(n) \
+  template <typename Head, ASIO_VARIADIC_TPARAMS(n)> \
+  struct composed_work<void(Head, ASIO_VARIADIC_TARGS(n))> \
+  { \
+    typedef composed_io_executors<void(Head, \
+      ASIO_VARIADIC_TARGS(n))> executors_type; \
+  \
+    explicit composed_work(const executors_type& ex) ASIO_NOEXCEPT \
+      : head_(ex.head_), \
+        tail_(ex.tail_) \
+    { \
+    } \
+  \
+    void reset() \
+    { \
+      head_.reset(); \
+      tail_.reset(); \
+    } \
+  \
+    typedef Head head_type; \
+    executor_work_guard<Head> head_; \
+    composed_work<void(ASIO_VARIADIC_TARGS(n))> tail_; \
+  }; \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_COMPOSED_WORK_DEF)
+#undef ASIO_PRIVATE_COMPOSED_WORK_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+  template <typename Impl, typename Work, typename Handler, typename Signature>
+  class composed_op;
+
+  template <typename Impl, typename Work, typename Handler,
+      typename R, typename... Args>
+  class composed_op<Impl, Work, Handler, R(Args...)>
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+  template <typename Impl, typename Work, typename Handler, typename Signature>
+  class composed_op
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+  {
+  public:
+    composed_op(ASIO_MOVE_ARG(Impl) impl,
+        ASIO_MOVE_ARG(Work) work,
+        ASIO_MOVE_ARG(Handler) handler)
+      : impl_(ASIO_MOVE_CAST(Impl)(impl)),
+        work_(ASIO_MOVE_CAST(Work)(work)),
+        handler_(ASIO_MOVE_CAST(Handler)(handler)),
+        invocations_(0)
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    composed_op(composed_op&& other)
+      : impl_(ASIO_MOVE_CAST(Impl)(other.impl_)),
+        work_(ASIO_MOVE_CAST(Work)(other.work_)),
+        handler_(ASIO_MOVE_CAST(Handler)(other.handler_)),
+        invocations_(other.invocations_)
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    typedef typename associated_executor<Handler,
+        typename Work::head_type>::type executor_type;
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return (get_associated_executor)(handler_, work_.head_.get_executor());
+    }
+
+    typedef typename associated_allocator<Handler,
+      std::allocator<void> >::type allocator_type;
+
+    allocator_type get_allocator() const ASIO_NOEXCEPT
+    {
+      return (get_associated_allocator)(handler_, std::allocator<void>());
+    }
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+    template<typename... T>
+    void operator()(ASIO_MOVE_ARG(T)... t)
+    {
+      if (invocations_ < ~unsigned(0))
+        ++invocations_;
+      impl_(*this, ASIO_MOVE_CAST(T)(t)...);
+    }
+
+    void complete(Args... args)
+    {
+      this->work_.reset();
+      this->handler_(ASIO_MOVE_CAST(Args)(args)...);
+    }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+    void operator()()
+    {
+      if (invocations_ < ~unsigned(0))
+        ++invocations_;
+      impl_(*this);
+    }
+
+    void complete()
+    {
+      this->work_.reset();
+      this->handler_();
+    }
+
+#define ASIO_PRIVATE_COMPOSED_OP_DEF(n) \
+    template<ASIO_VARIADIC_TPARAMS(n)> \
+    void operator()(ASIO_VARIADIC_MOVE_PARAMS(n)) \
+    { \
+      if (invocations_ < ~unsigned(0)) \
+        ++invocations_; \
+      impl_(*this, ASIO_VARIADIC_MOVE_ARGS(n)); \
+    } \
+    \
+    template<ASIO_VARIADIC_TPARAMS(n)> \
+    void complete(ASIO_VARIADIC_MOVE_PARAMS(n)) \
+    { \
+      this->work_.reset(); \
+      this->handler_(ASIO_VARIADIC_MOVE_ARGS(n)); \
+    } \
+    /**/
+    ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_COMPOSED_OP_DEF)
+#undef ASIO_PRIVATE_COMPOSED_OP_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  //private:
+    Impl impl_;
+    Work work_;
+    Handler handler_;
+    unsigned invocations_;
+  };
+
+  template <typename Impl, typename Work, typename Handler, typename Signature>
+  inline void* asio_handler_allocate(std::size_t size,
+      composed_op<Impl, Work, Handler, Signature>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename Impl, typename Work, typename Handler, typename Signature>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      composed_op<Impl, Work, Handler, Signature>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename Impl, typename Work, typename Handler, typename Signature>
+  inline bool asio_handler_is_continuation(
+      composed_op<Impl, Work, Handler, Signature>* this_handler)
+  {
+    return this_handler->invocations_ > 1 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename Impl,
+      typename Work, typename Handler, typename Signature>
+  inline void asio_handler_invoke(Function& function,
+      composed_op<Impl, Work, Handler, Signature>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename Impl,
+      typename Work, typename Handler, typename Signature>
+  inline void asio_handler_invoke(const Function& function,
+      composed_op<Impl, Work, Handler, Signature>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Signature, typename Executors>
+  class initiate_composed_op
+  {
+  public:
+    typedef typename composed_io_executors<Executors>::head_type executor_type;
+
+    template <typename T>
+    explicit initiate_composed_op(ASIO_MOVE_ARG(T) executors)
+      : executors_(ASIO_MOVE_CAST(T)(executors))
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return executors_.head_;
+    }
+
+    template <typename Handler, typename Impl>
+    void operator()(ASIO_MOVE_ARG(Handler) handler,
+        ASIO_MOVE_ARG(Impl) impl) const
+    {
+      composed_op<typename decay<Impl>::type, composed_work<Executors>,
+        typename decay<Handler>::type, Signature>(
+          ASIO_MOVE_CAST(Impl)(impl),
+          composed_work<Executors>(executors_),
+          ASIO_MOVE_CAST(Handler)(handler))();
+    }
+
+  private:
+    composed_io_executors<Executors> executors_;
+  };
+
+  template <typename Signature, typename Executors>
+  inline initiate_composed_op<Signature, Executors> make_initiate_composed_op(
+      ASIO_MOVE_ARG(composed_io_executors<Executors>) executors)
+  {
+    return initiate_composed_op<Signature, Executors>(
+        ASIO_MOVE_CAST(composed_io_executors<Executors>)(executors));
+  }
+
+  template <typename IoObject>
+  inline typename IoObject::executor_type
+  get_composed_io_executor(IoObject& io_object)
+  {
+    return io_object.get_executor();
+  }
+
+  template <typename Executor>
+  inline const Executor& get_composed_io_executor(const Executor& ex,
+      typename enable_if<is_executor<Executor>::value>::type* = 0)
+  {
+    return ex;
+  }
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename CompletionToken, typename Signature,
+    typename Implementation, typename... IoObjectsOrExecutors>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, Signature)
+async_compose(ASIO_MOVE_ARG(Implementation) implementation,
+    ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token,
+    ASIO_MOVE_ARG(IoObjectsOrExecutors)... io_objects_or_executors)
+{
+  return async_initiate<CompletionToken, Signature>(
+      detail::make_initiate_composed_op<Signature>(
+        detail::make_composed_io_executors(
+          detail::get_composed_io_executor(
+            ASIO_MOVE_CAST(IoObjectsOrExecutors)(
+              io_objects_or_executors))...)),
+      token, ASIO_MOVE_CAST(Implementation)(implementation));
+}
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename CompletionToken, typename Signature, typename Implementation>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, Signature)
+async_compose(ASIO_MOVE_ARG(Implementation) implementation,
+    ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token)
+{
+  return async_initiate<CompletionToken, Signature>(
+      detail::make_initiate_composed_op<Signature>(
+        detail::make_composed_io_executors()),
+      token, ASIO_MOVE_CAST(Implementation)(implementation));
+}
+
+# define ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR(n) \
+  ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR_##n
+
+# define ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR_1 \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T1)(x1))
+# define ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR_2 \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T1)(x1)), \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T2)(x2))
+# define ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR_3 \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T1)(x1)), \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T2)(x2)), \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T3)(x3))
+# define ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR_4 \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T1)(x1)), \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T2)(x2)), \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T3)(x3)), \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T4)(x4))
+# define ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR_5 \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T1)(x1)), \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T2)(x2)), \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T3)(x3)), \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T4)(x4)), \
+  detail::get_composed_io_executor(ASIO_MOVE_CAST(T5)(x5))
+
+#define ASIO_PRIVATE_ASYNC_COMPOSE_DEF(n) \
+  template <typename CompletionToken, typename Signature, \
+      typename Implementation, ASIO_VARIADIC_TPARAMS(n)> \
+  ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, Signature) \
+  async_compose(ASIO_MOVE_ARG(Implementation) implementation, \
+      ASIO_NONDEDUCED_MOVE_ARG(CompletionToken) token, \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    return async_initiate<CompletionToken, Signature>( \
+        detail::make_initiate_composed_op<Signature>( \
+          detail::make_composed_io_executors( \
+            ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR(n))), \
+        token, ASIO_MOVE_CAST(Implementation)(implementation)); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_ASYNC_COMPOSE_DEF)
+#undef ASIO_PRIVATE_ASYNC_COMPOSE_DEF
+
+#undef ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR
+#undef ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR_1
+#undef ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR_2
+#undef ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR_3
+#undef ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR_4
+#undef ASIO_PRIVATE_GET_COMPOSED_IO_EXECUTOR_5
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_COMPOSE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/connect.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/connect.hpp
new file mode 100644
index 00000000000..34c5e798d42
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/connect.hpp
@@ -0,0 +1,872 @@
+//
+// impl/connect.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_CONNECT_HPP
+#define ASIO_IMPL_CONNECT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include <algorithm>
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+#include "asio/post.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail
+{
+  struct default_connect_condition
+  {
+    template <typename Endpoint>
+    bool operator()(const asio::error_code&, const Endpoint&)
+    {
+      return true;
+    }
+  };
+
+  template <typename Protocol, typename Iterator>
+  inline typename Protocol::endpoint deref_connect_result(
+      Iterator iter, asio::error_code& ec)
+  {
+    return ec ? typename Protocol::endpoint() : *iter;
+  }
+
+  template <typename T, typename Iterator>
+  struct legacy_connect_condition_helper : T
+  {
+    typedef char (*fallback_func_type)(...);
+    operator fallback_func_type() const;
+  };
+
+  template <typename R, typename Arg1, typename Arg2, typename Iterator>
+  struct legacy_connect_condition_helper<R (*)(Arg1, Arg2), Iterator>
+  {
+    R operator()(Arg1, Arg2) const;
+    char operator()(...) const;
+  };
+
+  template <typename T, typename Iterator>
+  struct is_legacy_connect_condition
+  {
+    static char asio_connect_condition_check(char);
+    static char (&asio_connect_condition_check(Iterator))[2];
+
+    static const bool value =
+      sizeof(asio_connect_condition_check(
+        (*static_cast<legacy_connect_condition_helper<T, Iterator>*>(0))(
+          *static_cast<const asio::error_code*>(0),
+          *static_cast<const Iterator*>(0)))) != 1;
+  };
+
+  template <typename ConnectCondition, typename Iterator>
+  inline Iterator call_connect_condition(ConnectCondition& connect_condition,
+      const asio::error_code& ec, Iterator next, Iterator end,
+      typename enable_if<is_legacy_connect_condition<
+        ConnectCondition, Iterator>::value>::type* = 0)
+  {
+    if (next != end)
+      return connect_condition(ec, next);
+    return end;
+  }
+
+  template <typename ConnectCondition, typename Iterator>
+  inline Iterator call_connect_condition(ConnectCondition& connect_condition,
+      const asio::error_code& ec, Iterator next, Iterator end,
+      typename enable_if<!is_legacy_connect_condition<
+        ConnectCondition, Iterator>::value>::type* = 0)
+  {
+    for (;next != end; ++next)
+      if (connect_condition(ec, *next))
+        return next;
+    return end;
+  }
+}
+
+template <typename Protocol, typename Executor, typename EndpointSequence>
+typename Protocol::endpoint connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints,
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type*)
+{
+  asio::error_code ec;
+  typename Protocol::endpoint result = connect(s, endpoints, ec);
+  asio::detail::throw_error(ec, "connect");
+  return result;
+}
+
+template <typename Protocol, typename Executor, typename EndpointSequence>
+typename Protocol::endpoint connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints, asio::error_code& ec,
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type*)
+{
+  return detail::deref_connect_result<Protocol>(
+      connect(s, endpoints.begin(), endpoints.end(),
+        detail::default_connect_condition(), ec), ec);
+}
+
+#if !defined(ASIO_NO_DEPRECATED)
+template <typename Protocol, typename Executor, typename Iterator>
+Iterator connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type*)
+{
+  asio::error_code ec;
+  Iterator result = connect(s, begin, ec);
+  asio::detail::throw_error(ec, "connect");
+  return result;
+}
+
+template <typename Protocol, typename Executor, typename Iterator>
+inline Iterator connect(basic_socket<Protocol, Executor>& s,
+    Iterator begin, asio::error_code& ec,
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type*)
+{
+  return connect(s, begin, Iterator(), detail::default_connect_condition(), ec);
+}
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+template <typename Protocol, typename Executor, typename Iterator>
+Iterator connect(basic_socket<Protocol, Executor>& s,
+    Iterator begin, Iterator end)
+{
+  asio::error_code ec;
+  Iterator result = connect(s, begin, end, ec);
+  asio::detail::throw_error(ec, "connect");
+  return result;
+}
+
+template <typename Protocol, typename Executor, typename Iterator>
+inline Iterator connect(basic_socket<Protocol, Executor>& s,
+    Iterator begin, Iterator end, asio::error_code& ec)
+{
+  return connect(s, begin, end, detail::default_connect_condition(), ec);
+}
+
+template <typename Protocol, typename Executor,
+    typename EndpointSequence, typename ConnectCondition>
+typename Protocol::endpoint connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints, ConnectCondition connect_condition,
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type*)
+{
+  asio::error_code ec;
+  typename Protocol::endpoint result = connect(
+      s, endpoints, connect_condition, ec);
+  asio::detail::throw_error(ec, "connect");
+  return result;
+}
+
+template <typename Protocol, typename Executor,
+    typename EndpointSequence, typename ConnectCondition>
+typename Protocol::endpoint connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints, ConnectCondition connect_condition,
+    asio::error_code& ec,
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type*)
+{
+  return detail::deref_connect_result<Protocol>(
+      connect(s, endpoints.begin(), endpoints.end(),
+        connect_condition, ec), ec);
+}
+
+#if !defined(ASIO_NO_DEPRECATED)
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition>
+Iterator connect(basic_socket<Protocol, Executor>& s,
+    Iterator begin, ConnectCondition connect_condition,
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type*)
+{
+  asio::error_code ec;
+  Iterator result = connect(s, begin, connect_condition, ec);
+  asio::detail::throw_error(ec, "connect");
+  return result;
+}
+
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition>
+inline Iterator connect(basic_socket<Protocol, Executor>& s,
+    Iterator begin, ConnectCondition connect_condition,
+    asio::error_code& ec,
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type*)
+{
+  return connect(s, begin, Iterator(), connect_condition, ec);
+}
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition>
+Iterator connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    Iterator end, ConnectCondition connect_condition)
+{
+  asio::error_code ec;
+  Iterator result = connect(s, begin, end, connect_condition, ec);
+  asio::detail::throw_error(ec, "connect");
+  return result;
+}
+
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition>
+Iterator connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    Iterator end, ConnectCondition connect_condition,
+    asio::error_code& ec)
+{
+  ec = asio::error_code();
+
+  for (Iterator iter = begin; iter != end; ++iter)
+  {
+    iter = (detail::call_connect_condition(connect_condition, ec, iter, end));
+    if (iter != end)
+    {
+      s.close(ec);
+      s.connect(*iter, ec);
+      if (!ec)
+        return iter;
+    }
+    else
+      break;
+  }
+
+  if (!ec)
+    ec = asio::error::not_found;
+
+  return end;
+}
+
+namespace detail
+{
+  // Enable the empty base class optimisation for the connect condition.
+  template <typename ConnectCondition>
+  class base_from_connect_condition
+  {
+  protected:
+    explicit base_from_connect_condition(
+        const ConnectCondition& connect_condition)
+      : connect_condition_(connect_condition)
+    {
+    }
+
+    template <typename Iterator>
+    void check_condition(const asio::error_code& ec,
+        Iterator& iter, Iterator& end)
+    {
+      iter = detail::call_connect_condition(connect_condition_, ec, iter, end);
+    }
+
+  private:
+    ConnectCondition connect_condition_;
+  };
+
+  // The default_connect_condition implementation is essentially a no-op. This
+  // template specialisation lets us eliminate all costs associated with it.
+  template <>
+  class base_from_connect_condition<default_connect_condition>
+  {
+  protected:
+    explicit base_from_connect_condition(const default_connect_condition&)
+    {
+    }
+
+    template <typename Iterator>
+    void check_condition(const asio::error_code&, Iterator&, Iterator&)
+    {
+    }
+  };
+
+  template <typename Protocol, typename Executor, typename EndpointSequence,
+      typename ConnectCondition, typename RangeConnectHandler>
+  class range_connect_op : base_from_connect_condition<ConnectCondition>
+  {
+  public:
+    range_connect_op(basic_socket<Protocol, Executor>& sock,
+        const EndpointSequence& endpoints,
+        const ConnectCondition& connect_condition,
+        RangeConnectHandler& handler)
+      : base_from_connect_condition<ConnectCondition>(connect_condition),
+        socket_(sock),
+        endpoints_(endpoints),
+        index_(0),
+        start_(0),
+        handler_(ASIO_MOVE_CAST(RangeConnectHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    range_connect_op(const range_connect_op& other)
+      : base_from_connect_condition<ConnectCondition>(other),
+        socket_(other.socket_),
+        endpoints_(other.endpoints_),
+        index_(other.index_),
+        start_(other.start_),
+        handler_(other.handler_)
+    {
+    }
+
+    range_connect_op(range_connect_op&& other)
+      : base_from_connect_condition<ConnectCondition>(other),
+        socket_(other.socket_),
+        endpoints_(other.endpoints_),
+        index_(other.index_),
+        start_(other.start_),
+        handler_(ASIO_MOVE_CAST(RangeConnectHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(asio::error_code ec, int start = 0)
+    {
+      this->process(ec, start,
+          const_cast<const EndpointSequence&>(endpoints_).begin(),
+          const_cast<const EndpointSequence&>(endpoints_).end());
+    }
+
+  //private:
+    template <typename Iterator>
+    void process(asio::error_code ec,
+        int start, Iterator begin, Iterator end)
+    {
+      Iterator iter = begin;
+      std::advance(iter, index_);
+
+      switch (start_ = start)
+      {
+        case 1:
+        for (;;)
+        {
+          this->check_condition(ec, iter, end);
+          index_ = std::distance(begin, iter);
+
+          if (iter != end)
+          {
+            socket_.close(ec);
+            socket_.async_connect(*iter,
+                ASIO_MOVE_CAST(range_connect_op)(*this));
+            return;
+          }
+
+          if (start)
+          {
+            ec = asio::error::not_found;
+            asio::post(socket_.get_executor(),
+                detail::bind_handler(
+                  ASIO_MOVE_CAST(range_connect_op)(*this), ec));
+            return;
+          }
+
+          /* fall-through */ default:
+
+          if (iter == end)
+            break;
+
+          if (!socket_.is_open())
+          {
+            ec = asio::error::operation_aborted;
+            break;
+          }
+
+          if (!ec)
+            break;
+
+          ++iter;
+          ++index_;
+        }
+
+        handler_(static_cast<const asio::error_code&>(ec),
+            static_cast<const typename Protocol::endpoint&>(
+              ec || iter == end ? typename Protocol::endpoint() : *iter));
+      }
+    }
+
+    basic_socket<Protocol, Executor>& socket_;
+    EndpointSequence endpoints_;
+    std::size_t index_;
+    int start_;
+    RangeConnectHandler handler_;
+  };
+
+  template <typename Protocol, typename Executor, typename EndpointSequence,
+      typename ConnectCondition, typename RangeConnectHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      range_connect_op<Protocol, Executor, EndpointSequence,
+        ConnectCondition, RangeConnectHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename Protocol, typename Executor, typename EndpointSequence,
+      typename ConnectCondition, typename RangeConnectHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      range_connect_op<Protocol, Executor, EndpointSequence,
+        ConnectCondition, RangeConnectHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename Protocol, typename Executor, typename EndpointSequence,
+      typename ConnectCondition, typename RangeConnectHandler>
+  inline bool asio_handler_is_continuation(
+      range_connect_op<Protocol, Executor, EndpointSequence,
+        ConnectCondition, RangeConnectHandler>* this_handler)
+  {
+    return asio_handler_cont_helpers::is_continuation(
+        this_handler->handler_);
+  }
+
+  template <typename Function, typename Executor, typename Protocol,
+      typename EndpointSequence, typename ConnectCondition,
+      typename RangeConnectHandler>
+  inline void asio_handler_invoke(Function& function,
+      range_connect_op<Protocol, Executor, EndpointSequence,
+        ConnectCondition, RangeConnectHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename Executor, typename Protocol,
+      typename EndpointSequence, typename ConnectCondition,
+      typename RangeConnectHandler>
+  inline void asio_handler_invoke(const Function& function,
+      range_connect_op<Protocol, Executor, EndpointSequence,
+        ConnectCondition, RangeConnectHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Protocol, typename Executor>
+  class initiate_async_range_connect
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_range_connect(basic_socket<Protocol, Executor>& s)
+      : socket_(s)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return socket_.get_executor();
+    }
+
+    template <typename RangeConnectHandler,
+        typename EndpointSequence, typename ConnectCondition>
+    void operator()(ASIO_MOVE_ARG(RangeConnectHandler) handler,
+        const EndpointSequence& endpoints,
+        const ConnectCondition& connect_condition) const
+    {
+      // If you get an error on the following line it means that your
+      // handler does not meet the documented type requirements for an
+      // RangeConnectHandler.
+      ASIO_RANGE_CONNECT_HANDLER_CHECK(RangeConnectHandler,
+          handler, typename Protocol::endpoint) type_check;
+
+      non_const_lvalue<RangeConnectHandler> handler2(handler);
+      range_connect_op<Protocol, Executor, EndpointSequence, ConnectCondition,
+        typename decay<RangeConnectHandler>::type>(socket_, endpoints,
+          connect_condition, handler2.value)(asio::error_code(), 1);
+    }
+
+  private:
+    basic_socket<Protocol, Executor>& socket_;
+  };
+
+  template <typename Protocol, typename Executor, typename Iterator,
+      typename ConnectCondition, typename IteratorConnectHandler>
+  class iterator_connect_op : base_from_connect_condition<ConnectCondition>
+  {
+  public:
+    iterator_connect_op(basic_socket<Protocol, Executor>& sock,
+        const Iterator& begin, const Iterator& end,
+        const ConnectCondition& connect_condition,
+        IteratorConnectHandler& handler)
+      : base_from_connect_condition<ConnectCondition>(connect_condition),
+        socket_(sock),
+        iter_(begin),
+        end_(end),
+        start_(0),
+        handler_(ASIO_MOVE_CAST(IteratorConnectHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    iterator_connect_op(const iterator_connect_op& other)
+      : base_from_connect_condition<ConnectCondition>(other),
+        socket_(other.socket_),
+        iter_(other.iter_),
+        end_(other.end_),
+        start_(other.start_),
+        handler_(other.handler_)
+    {
+    }
+
+    iterator_connect_op(iterator_connect_op&& other)
+      : base_from_connect_condition<ConnectCondition>(other),
+        socket_(other.socket_),
+        iter_(other.iter_),
+        end_(other.end_),
+        start_(other.start_),
+        handler_(ASIO_MOVE_CAST(IteratorConnectHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(asio::error_code ec, int start = 0)
+    {
+      switch (start_ = start)
+      {
+        case 1:
+        for (;;)
+        {
+          this->check_condition(ec, iter_, end_);
+
+          if (iter_ != end_)
+          {
+            socket_.close(ec);
+            socket_.async_connect(*iter_,
+                ASIO_MOVE_CAST(iterator_connect_op)(*this));
+            return;
+          }
+
+          if (start)
+          {
+            ec = asio::error::not_found;
+            asio::post(socket_.get_executor(),
+                detail::bind_handler(
+                  ASIO_MOVE_CAST(iterator_connect_op)(*this), ec));
+            return;
+          }
+
+          /* fall-through */ default:
+
+          if (iter_ == end_)
+            break;
+
+          if (!socket_.is_open())
+          {
+            ec = asio::error::operation_aborted;
+            break;
+          }
+
+          if (!ec)
+            break;
+
+          ++iter_;
+        }
+
+        handler_(static_cast<const asio::error_code&>(ec),
+            static_cast<const Iterator&>(iter_));
+      }
+    }
+
+  //private:
+    basic_socket<Protocol, Executor>& socket_;
+    Iterator iter_;
+    Iterator end_;
+    int start_;
+    IteratorConnectHandler handler_;
+  };
+
+  template <typename Protocol, typename Executor, typename Iterator,
+      typename ConnectCondition, typename IteratorConnectHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      iterator_connect_op<Protocol, Executor, Iterator,
+        ConnectCondition, IteratorConnectHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename Protocol, typename Executor, typename Iterator,
+      typename ConnectCondition, typename IteratorConnectHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      iterator_connect_op<Protocol, Executor, Iterator,
+        ConnectCondition, IteratorConnectHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename Protocol, typename Executor, typename Iterator,
+      typename ConnectCondition, typename IteratorConnectHandler>
+  inline bool asio_handler_is_continuation(
+      iterator_connect_op<Protocol, Executor, Iterator,
+        ConnectCondition, IteratorConnectHandler>* this_handler)
+  {
+    return asio_handler_cont_helpers::is_continuation(
+        this_handler->handler_);
+  }
+
+  template <typename Function, typename Executor, typename Protocol,
+      typename Iterator, typename ConnectCondition,
+      typename IteratorConnectHandler>
+  inline void asio_handler_invoke(Function& function,
+      iterator_connect_op<Protocol, Executor, Iterator,
+        ConnectCondition, IteratorConnectHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename Executor, typename Protocol,
+      typename Iterator, typename ConnectCondition,
+      typename IteratorConnectHandler>
+  inline void asio_handler_invoke(const Function& function,
+      iterator_connect_op<Protocol, Executor, Iterator,
+        ConnectCondition, IteratorConnectHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Protocol, typename Executor>
+  class initiate_async_iterator_connect
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_iterator_connect(
+        basic_socket<Protocol, Executor>& s)
+      : socket_(s)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return socket_.get_executor();
+    }
+
+    template <typename IteratorConnectHandler,
+        typename Iterator, typename ConnectCondition>
+    void operator()(ASIO_MOVE_ARG(IteratorConnectHandler) handler,
+        Iterator begin, Iterator end,
+        const ConnectCondition& connect_condition) const
+    {
+      // If you get an error on the following line it means that your
+      // handler does not meet the documented type requirements for an
+      // IteratorConnectHandler.
+      ASIO_ITERATOR_CONNECT_HANDLER_CHECK(
+          IteratorConnectHandler, handler, Iterator) type_check;
+
+      non_const_lvalue<IteratorConnectHandler> handler2(handler);
+      iterator_connect_op<Protocol, Executor, Iterator, ConnectCondition,
+        typename decay<IteratorConnectHandler>::type>(socket_, begin, end,
+          connect_condition, handler2.value)(asio::error_code(), 1);
+    }
+
+  private:
+    basic_socket<Protocol, Executor>& socket_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename Protocol, typename Executor, typename EndpointSequence,
+    typename ConnectCondition, typename RangeConnectHandler, typename Allocator>
+struct associated_allocator<
+    detail::range_connect_op<Protocol, Executor, EndpointSequence,
+      ConnectCondition, RangeConnectHandler>, Allocator>
+{
+  typedef typename associated_allocator<
+      RangeConnectHandler, Allocator>::type type;
+
+  static type get(
+      const detail::range_connect_op<Protocol, Executor, EndpointSequence,
+        ConnectCondition, RangeConnectHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<RangeConnectHandler,
+        Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename Protocol, typename Executor, typename EndpointSequence,
+    typename ConnectCondition, typename RangeConnectHandler, typename Executor1>
+struct associated_executor<
+    detail::range_connect_op<Protocol, Executor, EndpointSequence,
+      ConnectCondition, RangeConnectHandler>, Executor1>
+{
+  typedef typename associated_executor<
+      RangeConnectHandler, Executor1>::type type;
+
+  static type get(
+      const detail::range_connect_op<Protocol, Executor, EndpointSequence,
+      ConnectCondition, RangeConnectHandler>& h,
+      const Executor1& ex = Executor1()) ASIO_NOEXCEPT
+  {
+    return associated_executor<RangeConnectHandler,
+        Executor1>::get(h.handler_, ex);
+  }
+};
+
+template <typename Protocol, typename Executor, typename Iterator,
+    typename ConnectCondition, typename IteratorConnectHandler,
+    typename Allocator>
+struct associated_allocator<
+    detail::iterator_connect_op<Protocol, Executor,
+      Iterator, ConnectCondition, IteratorConnectHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<
+      IteratorConnectHandler, Allocator>::type type;
+
+  static type get(
+      const detail::iterator_connect_op<Protocol, Executor,
+        Iterator, ConnectCondition, IteratorConnectHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<IteratorConnectHandler,
+        Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename Protocol, typename Executor, typename Iterator,
+    typename ConnectCondition, typename IteratorConnectHandler,
+    typename Executor1>
+struct associated_executor<
+    detail::iterator_connect_op<Protocol, Executor,
+      Iterator, ConnectCondition, IteratorConnectHandler>,
+    Executor1>
+{
+  typedef typename associated_executor<
+      IteratorConnectHandler, Executor1>::type type;
+
+  static type get(
+      const detail::iterator_connect_op<Protocol, Executor,
+        Iterator, ConnectCondition, IteratorConnectHandler>& h,
+      const Executor1& ex = Executor1()) ASIO_NOEXCEPT
+  {
+    return associated_executor<IteratorConnectHandler,
+        Executor1>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename Protocol, typename Executor, typename EndpointSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      typename Protocol::endpoint)) RangeConnectHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(RangeConnectHandler,
+    void (asio::error_code, typename Protocol::endpoint))
+async_connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints,
+    ASIO_MOVE_ARG(RangeConnectHandler) handler,
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type*)
+{
+  return async_initiate<RangeConnectHandler,
+    void (asio::error_code, typename Protocol::endpoint)>(
+      detail::initiate_async_range_connect<Protocol, Executor>(s),
+      handler, endpoints, detail::default_connect_condition());
+}
+
+#if !defined(ASIO_NO_DEPRECATED)
+template <typename Protocol, typename Executor, typename Iterator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      Iterator)) IteratorConnectHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(IteratorConnectHandler,
+    void (asio::error_code, Iterator))
+async_connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    ASIO_MOVE_ARG(IteratorConnectHandler) handler,
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type*)
+{
+  return async_initiate<IteratorConnectHandler,
+    void (asio::error_code, Iterator)>(
+      detail::initiate_async_iterator_connect<Protocol, Executor>(s),
+      handler, begin, Iterator(), detail::default_connect_condition());
+}
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+template <typename Protocol, typename Executor, typename Iterator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      Iterator)) IteratorConnectHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(IteratorConnectHandler,
+    void (asio::error_code, Iterator))
+async_connect(basic_socket<Protocol, Executor>& s, Iterator begin, Iterator end,
+    ASIO_MOVE_ARG(IteratorConnectHandler) handler)
+{
+  return async_initiate<IteratorConnectHandler,
+    void (asio::error_code, Iterator)>(
+      detail::initiate_async_iterator_connect<Protocol, Executor>(s),
+      handler, begin, end, detail::default_connect_condition());
+}
+
+template <typename Protocol, typename Executor,
+    typename EndpointSequence, typename ConnectCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      typename Protocol::endpoint)) RangeConnectHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(RangeConnectHandler,
+    void (asio::error_code, typename Protocol::endpoint))
+async_connect(basic_socket<Protocol, Executor>& s,
+    const EndpointSequence& endpoints, ConnectCondition connect_condition,
+    ASIO_MOVE_ARG(RangeConnectHandler) handler,
+    typename enable_if<is_endpoint_sequence<
+        EndpointSequence>::value>::type*)
+{
+  return async_initiate<RangeConnectHandler,
+    void (asio::error_code, typename Protocol::endpoint)>(
+      detail::initiate_async_range_connect<Protocol, Executor>(s),
+      handler, endpoints, connect_condition);
+}
+
+#if !defined(ASIO_NO_DEPRECATED)
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      Iterator)) IteratorConnectHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(IteratorConnectHandler,
+    void (asio::error_code, Iterator))
+async_connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    ConnectCondition connect_condition,
+    ASIO_MOVE_ARG(IteratorConnectHandler) handler,
+    typename enable_if<!is_endpoint_sequence<Iterator>::value>::type*)
+{
+  return async_initiate<IteratorConnectHandler,
+    void (asio::error_code, Iterator)>(
+      detail::initiate_async_iterator_connect<Protocol, Executor>(s),
+      handler, begin, Iterator(), connect_condition);
+}
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+template <typename Protocol, typename Executor,
+    typename Iterator, typename ConnectCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      Iterator)) IteratorConnectHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(IteratorConnectHandler,
+    void (asio::error_code, Iterator))
+async_connect(basic_socket<Protocol, Executor>& s, Iterator begin,
+    Iterator end, ConnectCondition connect_condition,
+    ASIO_MOVE_ARG(IteratorConnectHandler) handler)
+{
+  return async_initiate<IteratorConnectHandler,
+    void (asio::error_code, Iterator)>(
+      detail::initiate_async_iterator_connect<Protocol, Executor>(s),
+      handler, begin, end, connect_condition);
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_CONNECT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/defer.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/defer.hpp
new file mode 100644
index 00000000000..5676aa7202c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/defer.hpp
@@ -0,0 +1,113 @@
+//
+// impl/defer.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_DEFER_HPP
+#define ASIO_IMPL_DEFER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/detail/work_dispatcher.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class initiate_defer
+{
+public:
+  template <typename CompletionHandler>
+  void operator()(ASIO_MOVE_ARG(CompletionHandler) handler) const
+  {
+    typedef typename decay<CompletionHandler>::type DecayedHandler;
+
+    typename associated_executor<DecayedHandler>::type ex(
+        (get_associated_executor)(handler));
+
+    typename associated_allocator<DecayedHandler>::type alloc(
+        (get_associated_allocator)(handler));
+
+    ex.defer(ASIO_MOVE_CAST(CompletionHandler)(handler), alloc);
+  }
+};
+
+template <typename Executor>
+class initiate_defer_with_executor
+{
+public:
+  typedef Executor executor_type;
+
+  explicit initiate_defer_with_executor(const Executor& ex)
+    : ex_(ex)
+  {
+  }
+
+  executor_type get_executor() const ASIO_NOEXCEPT
+  {
+    return ex_;
+  }
+
+  template <typename CompletionHandler>
+  void operator()(ASIO_MOVE_ARG(CompletionHandler) handler) const
+  {
+    typedef typename decay<CompletionHandler>::type DecayedHandler;
+
+    typename associated_allocator<DecayedHandler>::type alloc(
+        (get_associated_allocator)(handler));
+
+    ex_.defer(detail::work_dispatcher<DecayedHandler>(
+          ASIO_MOVE_CAST(CompletionHandler)(handler)), alloc);
+  }
+
+private:
+  Executor ex_;
+};
+
+} // namespace detail
+
+template <ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) defer(
+    ASIO_MOVE_ARG(CompletionToken) token)
+{
+  return async_initiate<CompletionToken, void()>(
+      detail::initiate_defer(), token);
+}
+
+template <typename Executor,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) defer(
+    const Executor& ex, ASIO_MOVE_ARG(CompletionToken) token,
+    typename enable_if<is_executor<Executor>::value>::type*)
+{
+  return async_initiate<CompletionToken, void()>(
+      detail::initiate_defer_with_executor<Executor>(ex), token);
+}
+
+template <typename ExecutionContext,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) defer(
+    ExecutionContext& ctx, ASIO_MOVE_ARG(CompletionToken) token,
+    typename enable_if<is_convertible<
+      ExecutionContext&, execution_context&>::value>::type*)
+{
+  return (defer)(ctx.get_executor(),
+      ASIO_MOVE_CAST(CompletionToken)(token));
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_DEFER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/detached.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/detached.hpp
new file mode 100644
index 00000000000..8817ba95a93
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/detached.hpp
@@ -0,0 +1,130 @@
+//
+// impl/detached.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_DETACHED_HPP
+#define ASIO_IMPL_DETACHED_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/async_result.hpp"
+#include "asio/detail/variadic_templates.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+  // Class to adapt a detached_t as a completion handler.
+  class detached_handler
+  {
+  public:
+    typedef void result_type;
+
+    detached_handler(detached_t)
+    {
+    }
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+    template <typename... Args>
+    void operator()(Args...)
+    {
+    }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+    void operator()()
+    {
+    }
+
+#define ASIO_PRIVATE_DETACHED_DEF(n) \
+    template <ASIO_VARIADIC_TPARAMS(n)> \
+    void operator()(ASIO_VARIADIC_TARGS(n)) \
+    { \
+    } \
+    /**/
+    ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_DETACHED_DEF)
+#undef ASIO_PRIVATE_DETACHED_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+  };
+
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename Signature>
+struct async_result<detached_t, Signature>
+{
+  typedef asio::detail::detached_handler completion_handler_type;
+
+  typedef void return_type;
+
+  explicit async_result(completion_handler_type&)
+  {
+  }
+
+  void get()
+  {
+  }
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Initiation, typename RawCompletionToken, typename... Args>
+  static return_type initiate(
+      ASIO_MOVE_ARG(Initiation) initiation,
+      ASIO_MOVE_ARG(RawCompletionToken),
+      ASIO_MOVE_ARG(Args)... args)
+  {
+    ASIO_MOVE_CAST(Initiation)(initiation)(
+        detail::detached_handler(detached_t()),
+        ASIO_MOVE_CAST(Args)(args)...);
+  }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Initiation, typename RawCompletionToken>
+  static return_type initiate(
+      ASIO_MOVE_ARG(Initiation) initiation,
+      ASIO_MOVE_ARG(RawCompletionToken))
+  {
+    ASIO_MOVE_CAST(Initiation)(initiation)(
+        detail::detached_handler(detached_t()));
+  }
+
+#define ASIO_PRIVATE_INITIATE_DEF(n) \
+  template <typename Initiation, typename RawCompletionToken, \
+      ASIO_VARIADIC_TPARAMS(n)> \
+  static return_type initiate( \
+      ASIO_MOVE_ARG(Initiation) initiation, \
+      ASIO_MOVE_ARG(RawCompletionToken), \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    ASIO_MOVE_CAST(Initiation)(initiation)( \
+        detail::detached_handler(detached_t()), \
+        ASIO_VARIADIC_MOVE_ARGS(n)); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_INITIATE_DEF)
+#undef ASIO_PRIVATE_INITIATE_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_DETACHED_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/dispatch.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/dispatch.hpp
new file mode 100644
index 00000000000..2242ad71329
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/dispatch.hpp
@@ -0,0 +1,113 @@
+//
+// impl/dispatch.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_DISPATCH_HPP
+#define ASIO_IMPL_DISPATCH_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/detail/work_dispatcher.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class initiate_dispatch
+{
+public:
+  template <typename CompletionHandler>
+  void operator()(ASIO_MOVE_ARG(CompletionHandler) handler) const
+  {
+    typedef typename decay<CompletionHandler>::type DecayedHandler;
+
+    typename associated_executor<DecayedHandler>::type ex(
+        (get_associated_executor)(handler));
+
+    typename associated_allocator<DecayedHandler>::type alloc(
+        (get_associated_allocator)(handler));
+
+    ex.dispatch(ASIO_MOVE_CAST(CompletionHandler)(handler), alloc);
+  }
+};
+
+template <typename Executor>
+class initiate_dispatch_with_executor
+{
+public:
+  typedef Executor executor_type;
+
+  explicit initiate_dispatch_with_executor(const Executor& ex)
+    : ex_(ex)
+  {
+  }
+
+  executor_type get_executor() const ASIO_NOEXCEPT
+  {
+    return ex_;
+  }
+
+  template <typename CompletionHandler>
+  void operator()(ASIO_MOVE_ARG(CompletionHandler) handler) const
+  {
+    typedef typename decay<CompletionHandler>::type DecayedHandler;
+
+    typename associated_allocator<DecayedHandler>::type alloc(
+        (get_associated_allocator)(handler));
+
+    ex_.dispatch(detail::work_dispatcher<DecayedHandler>(
+          ASIO_MOVE_CAST(CompletionHandler)(handler)), alloc);
+  }
+
+private:
+  Executor ex_;
+};
+
+} // namespace detail
+
+template <ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) dispatch(
+    ASIO_MOVE_ARG(CompletionToken) token)
+{
+  return async_initiate<CompletionToken, void()>(
+      detail::initiate_dispatch(), token);
+}
+
+template <typename Executor,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) dispatch(
+    const Executor& ex, ASIO_MOVE_ARG(CompletionToken) token,
+    typename enable_if<is_executor<Executor>::value>::type*)
+{
+  return async_initiate<CompletionToken, void()>(
+      detail::initiate_dispatch_with_executor<Executor>(ex), token);
+}
+
+template <typename ExecutionContext,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) dispatch(
+    ExecutionContext& ctx, ASIO_MOVE_ARG(CompletionToken) token,
+    typename enable_if<is_convertible<
+      ExecutionContext&, execution_context&>::value>::type*)
+{
+  return (dispatch)(ctx.get_executor(),
+      ASIO_MOVE_CAST(CompletionToken)(token));
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_DISPATCH_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/execution_context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/execution_context.hpp
new file mode 100644
index 00000000000..d31e41da13b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/execution_context.hpp
@@ -0,0 +1,109 @@
+//
+// impl/execution_context.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_EXECUTION_CONTEXT_HPP
+#define ASIO_IMPL_EXECUTION_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/scoped_ptr.hpp"
+#include "asio/detail/service_registry.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename Service>
+inline Service& use_service(execution_context& e)
+{
+  // Check that Service meets the necessary type requirements.
+  (void)static_cast<execution_context::service*>(static_cast<Service*>(0));
+
+  return e.service_registry_->template use_service<Service>();
+}
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename Service, typename... Args>
+Service& make_service(execution_context& e, ASIO_MOVE_ARG(Args)... args)
+{
+  detail::scoped_ptr<Service> svc(
+      new Service(e, ASIO_MOVE_CAST(Args)(args)...));
+  e.service_registry_->template add_service<Service>(svc.get());
+  Service& result = *svc;
+  svc.release();
+  return result;
+}
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename Service>
+Service& make_service(execution_context& e)
+{
+  detail::scoped_ptr<Service> svc(new Service(e));
+  e.service_registry_->template add_service<Service>(svc.get());
+  Service& result = *svc;
+  svc.release();
+  return result;
+}
+
+#define ASIO_PRIVATE_MAKE_SERVICE_DEF(n) \
+  template <typename Service, ASIO_VARIADIC_TPARAMS(n)> \
+  Service& make_service(execution_context& e, \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    detail::scoped_ptr<Service> svc( \
+        new Service(e, ASIO_VARIADIC_MOVE_ARGS(n))); \
+    e.service_registry_->template add_service<Service>(svc.get()); \
+    Service& result = *svc; \
+    svc.release(); \
+    return result; \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_MAKE_SERVICE_DEF)
+#undef ASIO_PRIVATE_MAKE_SERVICE_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename Service>
+inline void add_service(execution_context& e, Service* svc)
+{
+  // Check that Service meets the necessary type requirements.
+  (void)static_cast<execution_context::service*>(static_cast<Service*>(0));
+
+  e.service_registry_->template add_service<Service>(svc);
+}
+
+template <typename Service>
+inline bool has_service(execution_context& e)
+{
+  // Check that Service meets the necessary type requirements.
+  (void)static_cast<execution_context::service*>(static_cast<Service*>(0));
+
+  return e.service_registry_->template has_service<Service>();
+}
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+inline execution_context& execution_context::service::context()
+{
+  return owner_;
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_EXECUTION_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/executor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/executor.hpp
new file mode 100644
index 00000000000..43ba5f6d2c6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/executor.hpp
@@ -0,0 +1,387 @@
+//
+// impl/executor.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_EXECUTOR_HPP
+#define ASIO_IMPL_EXECUTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/atomic_count.hpp"
+#include "asio/detail/executor_function.hpp"
+#include "asio/detail/global.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/recycling_allocator.hpp"
+#include "asio/executor.hpp"
+#include "asio/system_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+#if defined(ASIO_HAS_MOVE)
+
+// Lightweight, move-only function object wrapper.
+class executor::function
+{
+public:
+  template <typename F, typename Alloc>
+  explicit function(F f, const Alloc& a)
+  {
+    // Allocate and construct an operation to wrap the function.
+    typedef detail::executor_function<F, Alloc> func_type;
+    typename func_type::ptr p = {
+      detail::addressof(a), func_type::ptr::allocate(a), 0 };
+    func_ = new (p.v) func_type(ASIO_MOVE_CAST(F)(f), a);
+    p.v = 0;
+  }
+
+  function(function&& other) ASIO_NOEXCEPT
+    : func_(other.func_)
+  {
+    other.func_ = 0;
+  }
+
+  ~function()
+  {
+    if (func_)
+      func_->destroy();
+  }
+
+  void operator()()
+  {
+    if (func_)
+    {
+      detail::executor_function_base* func = func_;
+      func_ = 0;
+      func->complete();
+    }
+  }
+
+private:
+  detail::executor_function_base* func_;
+};
+
+#else // defined(ASIO_HAS_MOVE)
+
+// Not so lightweight, copyable function object wrapper.
+class executor::function
+{
+public:
+  template <typename F, typename Alloc>
+  explicit function(const F& f, const Alloc&)
+    : impl_(new impl<F>(f))
+  {
+  }
+
+  void operator()()
+  {
+    impl_->invoke_(impl_.get());
+  }
+
+private:
+  // Base class for polymorphic function implementations.
+  struct impl_base
+  {
+    void (*invoke_)(impl_base*);
+  };
+
+  // Polymorphic function implementation.
+  template <typename F>
+  struct impl : impl_base
+  {
+    impl(const F& f)
+      : function_(f)
+    {
+      invoke_ = &function::invoke<F>;
+    }
+
+    F function_;
+  };
+
+  // Helper to invoke a function.
+  template <typename F>
+  static void invoke(impl_base* i)
+  {
+    static_cast<impl<F>*>(i)->function_();
+  }
+
+  detail::shared_ptr<impl_base> impl_;
+};
+
+#endif // defined(ASIO_HAS_MOVE)
+
+// Default polymorphic allocator implementation.
+template <typename Executor, typename Allocator>
+class executor::impl
+  : public executor::impl_base
+{
+public:
+  typedef ASIO_REBIND_ALLOC(Allocator, impl) allocator_type;
+
+  static impl_base* create(const Executor& e, Allocator a = Allocator())
+  {
+    raw_mem mem(a);
+    impl* p = new (mem.ptr_) impl(e, a);
+    mem.ptr_ = 0;
+    return p;
+  }
+
+  impl(const Executor& e, const Allocator& a) ASIO_NOEXCEPT
+    : impl_base(false),
+      ref_count_(1),
+      executor_(e),
+      allocator_(a)
+  {
+  }
+
+  impl_base* clone() const ASIO_NOEXCEPT
+  {
+    ++ref_count_;
+    return const_cast<impl_base*>(static_cast<const impl_base*>(this));
+  }
+
+  void destroy() ASIO_NOEXCEPT
+  {
+    if (--ref_count_ == 0)
+    {
+      allocator_type alloc(allocator_);
+      impl* p = this;
+      p->~impl();
+      alloc.deallocate(p, 1);
+    }
+  }
+
+  void on_work_started() ASIO_NOEXCEPT
+  {
+    executor_.on_work_started();
+  }
+
+  void on_work_finished() ASIO_NOEXCEPT
+  {
+    executor_.on_work_finished();
+  }
+
+  execution_context& context() ASIO_NOEXCEPT
+  {
+    return executor_.context();
+  }
+
+  void dispatch(ASIO_MOVE_ARG(function) f)
+  {
+    executor_.dispatch(ASIO_MOVE_CAST(function)(f), allocator_);
+  }
+
+  void post(ASIO_MOVE_ARG(function) f)
+  {
+    executor_.post(ASIO_MOVE_CAST(function)(f), allocator_);
+  }
+
+  void defer(ASIO_MOVE_ARG(function) f)
+  {
+    executor_.defer(ASIO_MOVE_CAST(function)(f), allocator_);
+  }
+
+  type_id_result_type target_type() const ASIO_NOEXCEPT
+  {
+    return type_id<Executor>();
+  }
+
+  void* target() ASIO_NOEXCEPT
+  {
+    return &executor_;
+  }
+
+  const void* target() const ASIO_NOEXCEPT
+  {
+    return &executor_;
+  }
+
+  bool equals(const impl_base* e) const ASIO_NOEXCEPT
+  {
+    if (this == e)
+      return true;
+    if (target_type() != e->target_type())
+      return false;
+    return executor_ == *static_cast<const Executor*>(e->target());
+  }
+
+private:
+  mutable detail::atomic_count ref_count_;
+  Executor executor_;
+  Allocator allocator_;
+
+  struct raw_mem
+  {
+    allocator_type allocator_;
+    impl* ptr_;
+
+    explicit raw_mem(const Allocator& a)
+      : allocator_(a),
+        ptr_(allocator_.allocate(1))
+    {
+    }
+
+    ~raw_mem()
+    {
+      if (ptr_)
+        allocator_.deallocate(ptr_, 1);
+    }
+
+  private:
+    // Disallow copying and assignment.
+    raw_mem(const raw_mem&);
+    raw_mem operator=(const raw_mem&);
+  };
+};
+
+// Polymorphic allocator specialisation for system_executor.
+template <typename Allocator>
+class executor::impl<system_executor, Allocator>
+  : public executor::impl_base
+{
+public:
+  static impl_base* create(const system_executor&,
+      const Allocator& = Allocator())
+  {
+    return &detail::global<impl<system_executor, std::allocator<void> > >();
+  }
+
+  impl()
+    : impl_base(true)
+  {
+  }
+
+  impl_base* clone() const ASIO_NOEXCEPT
+  {
+    return const_cast<impl_base*>(static_cast<const impl_base*>(this));
+  }
+
+  void destroy() ASIO_NOEXCEPT
+  {
+  }
+
+  void on_work_started() ASIO_NOEXCEPT
+  {
+    executor_.on_work_started();
+  }
+
+  void on_work_finished() ASIO_NOEXCEPT
+  {
+    executor_.on_work_finished();
+  }
+
+  execution_context& context() ASIO_NOEXCEPT
+  {
+    return executor_.context();
+  }
+
+  void dispatch(ASIO_MOVE_ARG(function) f)
+  {
+    executor_.dispatch(ASIO_MOVE_CAST(function)(f), allocator_);
+  }
+
+  void post(ASIO_MOVE_ARG(function) f)
+  {
+    executor_.post(ASIO_MOVE_CAST(function)(f), allocator_);
+  }
+
+  void defer(ASIO_MOVE_ARG(function) f)
+  {
+    executor_.defer(ASIO_MOVE_CAST(function)(f), allocator_);
+  }
+
+  type_id_result_type target_type() const ASIO_NOEXCEPT
+  {
+    return type_id<system_executor>();
+  }
+
+  void* target() ASIO_NOEXCEPT
+  {
+    return &executor_;
+  }
+
+  const void* target() const ASIO_NOEXCEPT
+  {
+    return &executor_;
+  }
+
+  bool equals(const impl_base* e) const ASIO_NOEXCEPT
+  {
+    return this == e;
+  }
+
+private:
+  system_executor executor_;
+  Allocator allocator_;
+};
+
+template <typename Executor>
+executor::executor(Executor e)
+  : impl_(impl<Executor, std::allocator<void> >::create(e))
+{
+}
+
+template <typename Executor, typename Allocator>
+executor::executor(allocator_arg_t, const Allocator& a, Executor e)
+  : impl_(impl<Executor, Allocator>::create(e, a))
+{
+}
+
+template <typename Function, typename Allocator>
+void executor::dispatch(ASIO_MOVE_ARG(Function) f,
+    const Allocator& a) const
+{
+  impl_base* i = get_impl();
+  if (i->fast_dispatch_)
+    system_executor().dispatch(ASIO_MOVE_CAST(Function)(f), a);
+  else
+    i->dispatch(function(ASIO_MOVE_CAST(Function)(f), a));
+}
+
+template <typename Function, typename Allocator>
+void executor::post(ASIO_MOVE_ARG(Function) f,
+    const Allocator& a) const
+{
+  get_impl()->post(function(ASIO_MOVE_CAST(Function)(f), a));
+}
+
+template <typename Function, typename Allocator>
+void executor::defer(ASIO_MOVE_ARG(Function) f,
+    const Allocator& a) const
+{
+  get_impl()->defer(function(ASIO_MOVE_CAST(Function)(f), a));
+}
+
+template <typename Executor>
+Executor* executor::target() ASIO_NOEXCEPT
+{
+  return impl_ && impl_->target_type() == type_id<Executor>()
+    ? static_cast<Executor*>(impl_->target()) : 0;
+}
+
+template <typename Executor>
+const Executor* executor::target() const ASIO_NOEXCEPT
+{
+  return impl_ && impl_->target_type() == type_id<Executor>()
+    ? static_cast<Executor*>(impl_->target()) : 0;
+}
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_EXECUTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/io_context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/io_context.hpp
new file mode 100644
index 00000000000..2db6f15a10d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/io_context.hpp
@@ -0,0 +1,353 @@
+//
+// impl/io_context.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_IO_CONTEXT_HPP
+#define ASIO_IMPL_IO_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/completion_handler.hpp"
+#include "asio/detail/executor_op.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/recycling_allocator.hpp"
+#include "asio/detail/service_registry.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/detail/type_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+namespace asio {
+
+template <typename Service>
+inline Service& use_service(io_context& ioc)
+{
+  // Check that Service meets the necessary type requirements.
+  (void)static_cast<execution_context::service*>(static_cast<Service*>(0));
+  (void)static_cast<const execution_context::id*>(&Service::id);
+
+  return ioc.service_registry_->template use_service<Service>(ioc);
+}
+
+template <>
+inline detail::io_context_impl& use_service<detail::io_context_impl>(
+    io_context& ioc)
+{
+  return ioc.impl_;
+}
+
+} // namespace asio
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HAS_IOCP)
+# include "asio/detail/win_iocp_io_context.hpp"
+#else
+# include "asio/detail/scheduler.hpp"
+#endif
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+inline io_context::executor_type
+io_context::get_executor() ASIO_NOEXCEPT
+{
+  return executor_type(*this);
+}
+
+#if defined(ASIO_HAS_CHRONO)
+
+template <typename Rep, typename Period>
+std::size_t io_context::run_for(
+    const chrono::duration<Rep, Period>& rel_time)
+{
+  return this->run_until(chrono::steady_clock::now() + rel_time);
+}
+
+template <typename Clock, typename Duration>
+std::size_t io_context::run_until(
+    const chrono::time_point<Clock, Duration>& abs_time)
+{
+  std::size_t n = 0;
+  while (this->run_one_until(abs_time))
+    if (n != (std::numeric_limits<std::size_t>::max)())
+      ++n;
+  return n;
+}
+
+template <typename Rep, typename Period>
+std::size_t io_context::run_one_for(
+    const chrono::duration<Rep, Period>& rel_time)
+{
+  return this->run_one_until(chrono::steady_clock::now() + rel_time);
+}
+
+template <typename Clock, typename Duration>
+std::size_t io_context::run_one_until(
+    const chrono::time_point<Clock, Duration>& abs_time)
+{
+  typename Clock::time_point now = Clock::now();
+  while (now < abs_time)
+  {
+    typename Clock::duration rel_time = abs_time - now;
+    if (rel_time > chrono::seconds(1))
+      rel_time = chrono::seconds(1);
+
+    asio::error_code ec;
+    std::size_t s = impl_.wait_one(
+        static_cast<long>(chrono::duration_cast<
+          chrono::microseconds>(rel_time).count()), ec);
+    asio::detail::throw_error(ec);
+
+    if (s || impl_.stopped())
+      return s;
+
+    now = Clock::now();
+  }
+
+  return 0;
+}
+
+#endif // defined(ASIO_HAS_CHRONO)
+
+#if !defined(ASIO_NO_DEPRECATED)
+
+inline void io_context::reset()
+{
+  restart();
+}
+
+struct io_context::initiate_dispatch
+{
+  template <typename LegacyCompletionHandler>
+  void operator()(ASIO_MOVE_ARG(LegacyCompletionHandler) handler,
+      io_context* self) const
+  {
+    // If you get an error on the following line it means that your handler does
+    // not meet the documented type requirements for a LegacyCompletionHandler.
+    ASIO_LEGACY_COMPLETION_HANDLER_CHECK(
+        LegacyCompletionHandler, handler) type_check;
+
+    detail::non_const_lvalue<LegacyCompletionHandler> handler2(handler);
+    if (self->impl_.can_dispatch())
+    {
+      detail::fenced_block b(detail::fenced_block::full);
+      asio_handler_invoke_helpers::invoke(
+          handler2.value, handler2.value);
+    }
+    else
+    {
+      // Allocate and construct an operation to wrap the handler.
+      typedef detail::completion_handler<
+        typename decay<LegacyCompletionHandler>::type> op;
+      typename op::ptr p = { detail::addressof(handler2.value),
+        op::ptr::allocate(handler2.value), 0 };
+      p.p = new (p.v) op(handler2.value);
+
+      ASIO_HANDLER_CREATION((*self, *p.p,
+            "io_context", self, 0, "dispatch"));
+
+      self->impl_.do_dispatch(p.p);
+      p.v = p.p = 0;
+    }
+  }
+};
+
+template <typename LegacyCompletionHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(LegacyCompletionHandler, void ())
+io_context::dispatch(ASIO_MOVE_ARG(LegacyCompletionHandler) handler)
+{
+  return async_initiate<LegacyCompletionHandler, void ()>(
+      initiate_dispatch(), handler, this);
+}
+
+struct io_context::initiate_post
+{
+  template <typename LegacyCompletionHandler>
+  void operator()(ASIO_MOVE_ARG(LegacyCompletionHandler) handler,
+      io_context* self) const
+  {
+    // If you get an error on the following line it means that your handler does
+    // not meet the documented type requirements for a LegacyCompletionHandler.
+    ASIO_LEGACY_COMPLETION_HANDLER_CHECK(
+        LegacyCompletionHandler, handler) type_check;
+
+    detail::non_const_lvalue<LegacyCompletionHandler> handler2(handler);
+
+    bool is_continuation =
+      asio_handler_cont_helpers::is_continuation(handler2.value);
+
+    // Allocate and construct an operation to wrap the handler.
+    typedef detail::completion_handler<
+      typename decay<LegacyCompletionHandler>::type> op;
+    typename op::ptr p = { detail::addressof(handler2.value),
+        op::ptr::allocate(handler2.value), 0 };
+    p.p = new (p.v) op(handler2.value);
+
+    ASIO_HANDLER_CREATION((*self, *p.p,
+          "io_context", self, 0, "post"));
+
+    self->impl_.post_immediate_completion(p.p, is_continuation);
+    p.v = p.p = 0;
+  }
+};
+
+template <typename LegacyCompletionHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(LegacyCompletionHandler, void ())
+io_context::post(ASIO_MOVE_ARG(LegacyCompletionHandler) handler)
+{
+  return async_initiate<LegacyCompletionHandler, void ()>(
+      initiate_post(), handler, this);
+}
+
+template <typename Handler>
+#if defined(GENERATING_DOCUMENTATION)
+unspecified
+#else
+inline detail::wrapped_handler<io_context&, Handler>
+#endif
+io_context::wrap(Handler handler)
+{
+  return detail::wrapped_handler<io_context&, Handler>(*this, handler);
+}
+
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+inline io_context&
+io_context::executor_type::context() const ASIO_NOEXCEPT
+{
+  return io_context_;
+}
+
+inline void
+io_context::executor_type::on_work_started() const ASIO_NOEXCEPT
+{
+  io_context_.impl_.work_started();
+}
+
+inline void
+io_context::executor_type::on_work_finished() const ASIO_NOEXCEPT
+{
+  io_context_.impl_.work_finished();
+}
+
+template <typename Function, typename Allocator>
+void io_context::executor_type::dispatch(
+    ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+{
+  typedef typename decay<Function>::type function_type;
+
+  // Invoke immediately if we are already inside the thread pool.
+  if (io_context_.impl_.can_dispatch())
+  {
+    // Make a local, non-const copy of the function.
+    function_type tmp(ASIO_MOVE_CAST(Function)(f));
+
+    detail::fenced_block b(detail::fenced_block::full);
+    asio_handler_invoke_helpers::invoke(tmp, tmp);
+    return;
+  }
+
+  // Allocate and construct an operation to wrap the function.
+  typedef detail::executor_op<function_type, Allocator, detail::operation> op;
+  typename op::ptr p = { detail::addressof(a), op::ptr::allocate(a), 0 };
+  p.p = new (p.v) op(ASIO_MOVE_CAST(Function)(f), a);
+
+  ASIO_HANDLER_CREATION((this->context(), *p.p,
+        "io_context", &this->context(), 0, "dispatch"));
+
+  io_context_.impl_.post_immediate_completion(p.p, false);
+  p.v = p.p = 0;
+}
+
+template <typename Function, typename Allocator>
+void io_context::executor_type::post(
+    ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+{
+  typedef typename decay<Function>::type function_type;
+
+  // Allocate and construct an operation to wrap the function.
+  typedef detail::executor_op<function_type, Allocator, detail::operation> op;
+  typename op::ptr p = { detail::addressof(a), op::ptr::allocate(a), 0 };
+  p.p = new (p.v) op(ASIO_MOVE_CAST(Function)(f), a);
+
+  ASIO_HANDLER_CREATION((this->context(), *p.p,
+        "io_context", &this->context(), 0, "post"));
+
+  io_context_.impl_.post_immediate_completion(p.p, false);
+  p.v = p.p = 0;
+}
+
+template <typename Function, typename Allocator>
+void io_context::executor_type::defer(
+    ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+{
+  typedef typename decay<Function>::type function_type;
+
+  // Allocate and construct an operation to wrap the function.
+  typedef detail::executor_op<function_type, Allocator, detail::operation> op;
+  typename op::ptr p = { detail::addressof(a), op::ptr::allocate(a), 0 };
+  p.p = new (p.v) op(ASIO_MOVE_CAST(Function)(f), a);
+
+  ASIO_HANDLER_CREATION((this->context(), *p.p,
+        "io_context", &this->context(), 0, "defer"));
+
+  io_context_.impl_.post_immediate_completion(p.p, true);
+  p.v = p.p = 0;
+}
+
+inline bool
+io_context::executor_type::running_in_this_thread() const ASIO_NOEXCEPT
+{
+  return io_context_.impl_.can_dispatch();
+}
+
+#if !defined(ASIO_NO_DEPRECATED)
+inline io_context::work::work(asio::io_context& io_context)
+  : io_context_impl_(io_context.impl_)
+{
+  io_context_impl_.work_started();
+}
+
+inline io_context::work::work(const work& other)
+  : io_context_impl_(other.io_context_impl_)
+{
+  io_context_impl_.work_started();
+}
+
+inline io_context::work::~work()
+{
+  io_context_impl_.work_finished();
+}
+
+inline asio::io_context& io_context::work::get_io_context()
+{
+  return static_cast<asio::io_context&>(io_context_impl_.context());
+}
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+inline asio::io_context& io_context::service::get_io_context()
+{
+  return static_cast<asio::io_context&>(context());
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_IO_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/post.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/post.hpp
new file mode 100644
index 00000000000..1e7d589a621
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/post.hpp
@@ -0,0 +1,113 @@
+//
+// impl/post.hpp
+// ~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_POST_HPP
+#define ASIO_IMPL_POST_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/detail/work_dispatcher.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+class initiate_post
+{
+public:
+  template <typename CompletionHandler>
+  void operator()(ASIO_MOVE_ARG(CompletionHandler) handler) const
+  {
+    typedef typename decay<CompletionHandler>::type DecayedHandler;
+
+    typename associated_executor<DecayedHandler>::type ex(
+        (get_associated_executor)(handler));
+
+    typename associated_allocator<DecayedHandler>::type alloc(
+        (get_associated_allocator)(handler));
+
+    ex.post(ASIO_MOVE_CAST(CompletionHandler)(handler), alloc);
+  }
+};
+
+template <typename Executor>
+class initiate_post_with_executor
+{
+public:
+  typedef Executor executor_type;
+
+  explicit initiate_post_with_executor(const Executor& ex)
+    : ex_(ex)
+  {
+  }
+
+  executor_type get_executor() const ASIO_NOEXCEPT
+  {
+    return ex_;
+  }
+
+  template <typename CompletionHandler>
+  void operator()(ASIO_MOVE_ARG(CompletionHandler) handler) const
+  {
+    typedef typename decay<CompletionHandler>::type DecayedHandler;
+
+    typename associated_allocator<DecayedHandler>::type alloc(
+        (get_associated_allocator)(handler));
+
+    ex_.post(detail::work_dispatcher<DecayedHandler>(
+          ASIO_MOVE_CAST(CompletionHandler)(handler)), alloc);
+  }
+
+private:
+  Executor ex_;
+};
+
+} // namespace detail
+
+template <ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) post(
+    ASIO_MOVE_ARG(CompletionToken) token)
+{
+  return async_initiate<CompletionToken, void()>(
+      detail::initiate_post(), token);
+}
+
+template <typename Executor,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) post(
+    const Executor& ex, ASIO_MOVE_ARG(CompletionToken) token,
+    typename enable_if<is_executor<Executor>::value>::type*)
+{
+  return async_initiate<CompletionToken, void()>(
+      detail::initiate_post_with_executor<Executor>(ex), token);
+}
+
+template <typename ExecutionContext,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) post(
+    ExecutionContext& ctx, ASIO_MOVE_ARG(CompletionToken) token,
+    typename enable_if<is_convertible<
+      ExecutionContext&, execution_context&>::value>::type*)
+{
+  return (post)(ctx.get_executor(),
+      ASIO_MOVE_CAST(CompletionToken)(token));
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_POST_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/read.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/read.hpp
new file mode 100644
index 00000000000..d349b39b30a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/read.hpp
@@ -0,0 +1,1143 @@
+//
+// impl/read.hpp
+// ~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_READ_HPP
+#define ASIO_IMPL_READ_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include <algorithm>
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/buffer.hpp"
+#include "asio/completion_condition.hpp"
+#include "asio/detail/array_fwd.hpp"
+#include "asio/detail/base_from_completion_cond.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/consuming_buffers.hpp"
+#include "asio/detail/dependent_type.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail
+{
+  template <typename SyncReadStream, typename MutableBufferSequence,
+      typename MutableBufferIterator, typename CompletionCondition>
+  std::size_t read_buffer_sequence(SyncReadStream& s,
+      const MutableBufferSequence& buffers, const MutableBufferIterator&,
+      CompletionCondition completion_condition, asio::error_code& ec)
+  {
+    ec = asio::error_code();
+    asio::detail::consuming_buffers<mutable_buffer,
+        MutableBufferSequence, MutableBufferIterator> tmp(buffers);
+    while (!tmp.empty())
+    {
+      if (std::size_t max_size = detail::adapt_completion_condition_result(
+            completion_condition(ec, tmp.total_consumed())))
+        tmp.consume(s.read_some(tmp.prepare(max_size), ec));
+      else
+        break;
+    }
+    return tmp.total_consumed();;
+  }
+} // namespace detail
+
+template <typename SyncReadStream, typename MutableBufferSequence,
+    typename CompletionCondition>
+std::size_t read(SyncReadStream& s, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type*)
+{
+  return detail::read_buffer_sequence(s, buffers,
+      asio::buffer_sequence_begin(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+}
+
+template <typename SyncReadStream, typename MutableBufferSequence>
+inline std::size_t read(SyncReadStream& s, const MutableBufferSequence& buffers,
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read(s, buffers, transfer_all(), ec);
+  asio::detail::throw_error(ec, "read");
+  return bytes_transferred;
+}
+
+template <typename SyncReadStream, typename MutableBufferSequence>
+inline std::size_t read(SyncReadStream& s, const MutableBufferSequence& buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type*)
+{
+  return read(s, buffers, transfer_all(), ec);
+}
+
+template <typename SyncReadStream, typename MutableBufferSequence,
+    typename CompletionCondition>
+inline std::size_t read(SyncReadStream& s, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read(s, buffers,
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  asio::detail::throw_error(ec, "read");
+  return bytes_transferred;
+}
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+template <typename SyncReadStream, typename DynamicBuffer_v1,
+    typename CompletionCondition>
+std::size_t read(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  typename decay<DynamicBuffer_v1>::type b(
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers));
+
+  ec = asio::error_code();
+  std::size_t total_transferred = 0;
+  std::size_t max_size = detail::adapt_completion_condition_result(
+        completion_condition(ec, total_transferred));
+  std::size_t bytes_available = std::min<std::size_t>(
+        std::max<std::size_t>(512, b.capacity() - b.size()),
+        std::min<std::size_t>(max_size, b.max_size() - b.size()));
+  while (bytes_available > 0)
+  {
+    std::size_t bytes_transferred = s.read_some(b.prepare(bytes_available), ec);
+    b.commit(bytes_transferred);
+    total_transferred += bytes_transferred;
+    max_size = detail::adapt_completion_condition_result(
+          completion_condition(ec, total_transferred));
+    bytes_available = std::min<std::size_t>(
+          std::max<std::size_t>(512, b.capacity() - b.size()),
+          std::min<std::size_t>(max_size, b.max_size() - b.size()));
+  }
+  return total_transferred;
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+inline std::size_t read(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers), transfer_all(), ec);
+  asio::detail::throw_error(ec, "read");
+  return bytes_transferred;
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+inline std::size_t read(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  return read(s, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+      transfer_all(), ec);
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v1,
+    typename CompletionCondition>
+inline std::size_t read(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  asio::detail::throw_error(ec, "read");
+  return bytes_transferred;
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+template <typename SyncReadStream, typename Allocator,
+    typename CompletionCondition>
+inline std::size_t read(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition, asio::error_code& ec)
+{
+  return read(s, basic_streambuf_ref<Allocator>(b),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+}
+
+template <typename SyncReadStream, typename Allocator>
+inline std::size_t read(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b)
+{
+  return read(s, basic_streambuf_ref<Allocator>(b));
+}
+
+template <typename SyncReadStream, typename Allocator>
+inline std::size_t read(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    asio::error_code& ec)
+{
+  return read(s, basic_streambuf_ref<Allocator>(b), ec);
+}
+
+template <typename SyncReadStream, typename Allocator,
+    typename CompletionCondition>
+inline std::size_t read(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition)
+{
+  return read(s, basic_streambuf_ref<Allocator>(b),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+template <typename SyncReadStream, typename DynamicBuffer_v2,
+    typename CompletionCondition>
+std::size_t read(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  DynamicBuffer_v2& b = buffers;
+
+  ec = asio::error_code();
+  std::size_t total_transferred = 0;
+  std::size_t max_size = detail::adapt_completion_condition_result(
+        completion_condition(ec, total_transferred));
+  std::size_t bytes_available = std::min<std::size_t>(
+        std::max<std::size_t>(512, b.capacity() - b.size()),
+        std::min<std::size_t>(max_size, b.max_size() - b.size()));
+  while (bytes_available > 0)
+  {
+    std::size_t pos = b.size();
+    b.grow(bytes_available);
+    std::size_t bytes_transferred = s.read_some(
+        b.data(pos, bytes_available), ec);
+    b.shrink(bytes_available - bytes_transferred);
+    total_transferred += bytes_transferred;
+    max_size = detail::adapt_completion_condition_result(
+          completion_condition(ec, total_transferred));
+    bytes_available = std::min<std::size_t>(
+          std::max<std::size_t>(512, b.capacity() - b.size()),
+          std::min<std::size_t>(max_size, b.max_size() - b.size()));
+  }
+  return total_transferred;
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+inline std::size_t read(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers), transfer_all(), ec);
+  asio::detail::throw_error(ec, "read");
+  return bytes_transferred;
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+inline std::size_t read(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  return read(s, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+      transfer_all(), ec);
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v2,
+    typename CompletionCondition>
+inline std::size_t read(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  asio::detail::throw_error(ec, "read");
+  return bytes_transferred;
+}
+
+namespace detail
+{
+  template <typename AsyncReadStream, typename MutableBufferSequence,
+      typename MutableBufferIterator, typename CompletionCondition,
+      typename ReadHandler>
+  class read_op
+    : detail::base_from_completion_cond<CompletionCondition>
+  {
+  public:
+    read_op(AsyncReadStream& stream, const MutableBufferSequence& buffers,
+        CompletionCondition& completion_condition, ReadHandler& handler)
+      : detail::base_from_completion_cond<
+          CompletionCondition>(completion_condition),
+        stream_(stream),
+        buffers_(buffers),
+        start_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_op(const read_op& other)
+      : detail::base_from_completion_cond<CompletionCondition>(other),
+        stream_(other.stream_),
+        buffers_(other.buffers_),
+        start_(other.start_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_op(read_op&& other)
+      : detail::base_from_completion_cond<CompletionCondition>(
+          ASIO_MOVE_CAST(detail::base_from_completion_cond<
+            CompletionCondition>)(other)),
+        stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(buffers_type)(other.buffers_)),
+        start_(other.start_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      std::size_t max_size;
+      switch (start_ = start)
+      {
+        case 1:
+        max_size = this->check_for_completion(ec, buffers_.total_consumed());
+        do
+        {
+          stream_.async_read_some(buffers_.prepare(max_size),
+              ASIO_MOVE_CAST(read_op)(*this));
+          return; default:
+          buffers_.consume(bytes_transferred);
+          if ((!ec && bytes_transferred == 0) || buffers_.empty())
+            break;
+          max_size = this->check_for_completion(ec, buffers_.total_consumed());
+        } while (max_size > 0);
+
+        handler_(ec, buffers_.total_consumed());
+      }
+    }
+
+  //private:
+    typedef asio::detail::consuming_buffers<mutable_buffer,
+        MutableBufferSequence, MutableBufferIterator> buffers_type;
+
+    AsyncReadStream& stream_;
+    buffers_type buffers_;
+    int start_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncReadStream, typename MutableBufferSequence,
+      typename MutableBufferIterator, typename CompletionCondition,
+      typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_op<AsyncReadStream, MutableBufferSequence, MutableBufferIterator,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename MutableBufferSequence,
+      typename MutableBufferIterator, typename CompletionCondition,
+      typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_op<AsyncReadStream, MutableBufferSequence, MutableBufferIterator,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename MutableBufferSequence,
+      typename MutableBufferIterator, typename CompletionCondition,
+      typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_op<AsyncReadStream, MutableBufferSequence, MutableBufferIterator,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename MutableBufferSequence, typename MutableBufferIterator,
+      typename CompletionCondition, typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_op<AsyncReadStream, MutableBufferSequence, MutableBufferIterator,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename MutableBufferSequence, typename MutableBufferIterator,
+      typename CompletionCondition, typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_op<AsyncReadStream, MutableBufferSequence, MutableBufferIterator,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename MutableBufferSequence,
+      typename MutableBufferIterator, typename CompletionCondition,
+      typename ReadHandler>
+  inline void start_read_buffer_sequence_op(AsyncReadStream& stream,
+      const MutableBufferSequence& buffers, const MutableBufferIterator&,
+      CompletionCondition& completion_condition, ReadHandler& handler)
+  {
+    detail::read_op<AsyncReadStream, MutableBufferSequence,
+      MutableBufferIterator, CompletionCondition, ReadHandler>(
+        stream, buffers, completion_condition, handler)(
+          asio::error_code(), 0, 1);
+  }
+
+  template <typename AsyncReadStream>
+  class initiate_async_read_buffer_sequence
+  {
+  public:
+    typedef typename AsyncReadStream::executor_type executor_type;
+
+    explicit initiate_async_read_buffer_sequence(AsyncReadStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence,
+        typename CompletionCondition>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        const MutableBufferSequence& buffers,
+        ASIO_MOVE_ARG(CompletionCondition) completion_cond) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      non_const_lvalue<CompletionCondition> completion_cond2(completion_cond);
+      start_read_buffer_sequence_op(stream_, buffers,
+          asio::buffer_sequence_begin(buffers),
+          completion_cond2.value, handler2.value);
+    }
+
+  private:
+    AsyncReadStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename MutableBufferSequence,
+    typename MutableBufferIterator, typename CompletionCondition,
+    typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_op<AsyncReadStream, MutableBufferSequence,
+      MutableBufferIterator, CompletionCondition, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_op<AsyncReadStream, MutableBufferSequence,
+        MutableBufferIterator, CompletionCondition, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncReadStream, typename MutableBufferSequence,
+    typename MutableBufferIterator, typename CompletionCondition,
+    typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_op<AsyncReadStream, MutableBufferSequence,
+      MutableBufferIterator, CompletionCondition, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_op<AsyncReadStream, MutableBufferSequence,
+        MutableBufferIterator, CompletionCondition, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream,
+    typename MutableBufferSequence, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type*)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_buffer_sequence<AsyncReadStream>(s), handler,
+      buffers, ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+template <typename AsyncReadStream, typename MutableBufferSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, const MutableBufferSequence& buffers,
+    ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type*)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_buffer_sequence<AsyncReadStream>(s),
+      handler, buffers, transfer_all());
+}
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+namespace detail
+{
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename CompletionCondition, typename ReadHandler>
+  class read_dynbuf_v1_op
+    : detail::base_from_completion_cond<CompletionCondition>
+  {
+  public:
+    template <typename BufferSequence>
+    read_dynbuf_v1_op(AsyncReadStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        CompletionCondition& completion_condition, ReadHandler& handler)
+      : detail::base_from_completion_cond<
+          CompletionCondition>(completion_condition),
+        stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        start_(0),
+        total_transferred_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_dynbuf_v1_op(const read_dynbuf_v1_op& other)
+      : detail::base_from_completion_cond<CompletionCondition>(other),
+        stream_(other.stream_),
+        buffers_(other.buffers_),
+        start_(other.start_),
+        total_transferred_(other.total_transferred_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_dynbuf_v1_op(read_dynbuf_v1_op&& other)
+      : detail::base_from_completion_cond<CompletionCondition>(
+          ASIO_MOVE_CAST(detail::base_from_completion_cond<
+            CompletionCondition>)(other)),
+        stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v1)(other.buffers_)),
+        start_(other.start_),
+        total_transferred_(other.total_transferred_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      std::size_t max_size, bytes_available;
+      switch (start_ = start)
+      {
+        case 1:
+        max_size = this->check_for_completion(ec, total_transferred_);
+        bytes_available = std::min<std::size_t>(
+              std::max<std::size_t>(512,
+                buffers_.capacity() - buffers_.size()),
+              std::min<std::size_t>(max_size,
+                buffers_.max_size() - buffers_.size()));
+        for (;;)
+        {
+          stream_.async_read_some(buffers_.prepare(bytes_available),
+              ASIO_MOVE_CAST(read_dynbuf_v1_op)(*this));
+          return; default:
+          total_transferred_ += bytes_transferred;
+          buffers_.commit(bytes_transferred);
+          max_size = this->check_for_completion(ec, total_transferred_);
+          bytes_available = std::min<std::size_t>(
+                std::max<std::size_t>(512,
+                  buffers_.capacity() - buffers_.size()),
+                std::min<std::size_t>(max_size,
+                  buffers_.max_size() - buffers_.size()));
+          if ((!ec && bytes_transferred == 0) || bytes_available == 0)
+            break;
+        }
+
+        handler_(ec, static_cast<const std::size_t&>(total_transferred_));
+      }
+    }
+
+  //private:
+    AsyncReadStream& stream_;
+    DynamicBuffer_v1 buffers_;
+    int start_;
+    std::size_t total_transferred_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename CompletionCondition, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_dynbuf_v1_op<AsyncReadStream, DynamicBuffer_v1,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename CompletionCondition, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_dynbuf_v1_op<AsyncReadStream, DynamicBuffer_v1,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename CompletionCondition, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_dynbuf_v1_op<AsyncReadStream, DynamicBuffer_v1,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename CompletionCondition,
+      typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_dynbuf_v1_op<AsyncReadStream, DynamicBuffer_v1,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename CompletionCondition,
+      typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_dynbuf_v1_op<AsyncReadStream, DynamicBuffer_v1,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream>
+  class initiate_async_read_dynbuf_v1
+  {
+  public:
+    typedef typename AsyncReadStream::executor_type executor_type;
+
+    explicit initiate_async_read_dynbuf_v1(AsyncReadStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename ReadHandler, typename DynamicBuffer_v1,
+        typename CompletionCondition>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+        ASIO_MOVE_ARG(CompletionCondition) completion_cond) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      non_const_lvalue<CompletionCondition> completion_cond2(completion_cond);
+      read_dynbuf_v1_op<AsyncReadStream, typename decay<DynamicBuffer_v1>::type,
+        CompletionCondition, typename decay<ReadHandler>::type>(
+          stream_, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+            completion_cond2.value, handler2.value)(
+              asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncReadStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    typename CompletionCondition, typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_dynbuf_v1_op<AsyncReadStream,
+      DynamicBuffer_v1, CompletionCondition, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_dynbuf_v1_op<AsyncReadStream,
+        DynamicBuffer_v1, CompletionCondition, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    typename CompletionCondition, typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_dynbuf_v1_op<AsyncReadStream,
+      DynamicBuffer_v1, CompletionCondition, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_dynbuf_v1_op<AsyncReadStream,
+        DynamicBuffer_v1, CompletionCondition, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  return async_read(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+      transfer_all(), ASIO_MOVE_CAST(ReadHandler)(handler));
+}
+
+template <typename AsyncReadStream,
+    typename DynamicBuffer_v1, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  // If you get an error on the following line it means that your handler does
+  // not meet the documented type requirements for a ReadHandler.
+  ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_dynbuf_v1<AsyncReadStream>(s),
+      handler, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+template <typename AsyncReadStream, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, basic_streambuf<Allocator>& b,
+    ASIO_MOVE_ARG(ReadHandler) handler)
+{
+  return async_read(s, basic_streambuf_ref<Allocator>(b),
+      ASIO_MOVE_CAST(ReadHandler)(handler));
+}
+
+template <typename AsyncReadStream,
+    typename Allocator, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler)
+{
+  return async_read(s, basic_streambuf_ref<Allocator>(b),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition),
+      ASIO_MOVE_CAST(ReadHandler)(handler));
+}
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+namespace detail
+{
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename CompletionCondition, typename ReadHandler>
+  class read_dynbuf_v2_op
+    : detail::base_from_completion_cond<CompletionCondition>
+  {
+  public:
+    template <typename BufferSequence>
+    read_dynbuf_v2_op(AsyncReadStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        CompletionCondition& completion_condition, ReadHandler& handler)
+      : detail::base_from_completion_cond<
+          CompletionCondition>(completion_condition),
+        stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        start_(0),
+        total_transferred_(0),
+        bytes_available_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_dynbuf_v2_op(const read_dynbuf_v2_op& other)
+      : detail::base_from_completion_cond<CompletionCondition>(other),
+        stream_(other.stream_),
+        buffers_(other.buffers_),
+        start_(other.start_),
+        total_transferred_(other.total_transferred_),
+        bytes_available_(other.bytes_available_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_dynbuf_v2_op(read_dynbuf_v2_op&& other)
+      : detail::base_from_completion_cond<CompletionCondition>(
+          ASIO_MOVE_CAST(detail::base_from_completion_cond<
+            CompletionCondition>)(other)),
+        stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v2)(other.buffers_)),
+        start_(other.start_),
+        total_transferred_(other.total_transferred_),
+        bytes_available_(other.bytes_available_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      std::size_t max_size, pos;
+      switch (start_ = start)
+      {
+        case 1:
+        max_size = this->check_for_completion(ec, total_transferred_);
+        bytes_available_ = std::min<std::size_t>(
+              std::max<std::size_t>(512,
+                buffers_.capacity() - buffers_.size()),
+              std::min<std::size_t>(max_size,
+                buffers_.max_size() - buffers_.size()));
+        for (;;)
+        {
+          pos = buffers_.size();
+          buffers_.grow(bytes_available_);
+          stream_.async_read_some(buffers_.data(pos, bytes_available_),
+              ASIO_MOVE_CAST(read_dynbuf_v2_op)(*this));
+          return; default:
+          total_transferred_ += bytes_transferred;
+          buffers_.shrink(bytes_available_ - bytes_transferred);
+          max_size = this->check_for_completion(ec, total_transferred_);
+          bytes_available_ = std::min<std::size_t>(
+                std::max<std::size_t>(512,
+                  buffers_.capacity() - buffers_.size()),
+                std::min<std::size_t>(max_size,
+                  buffers_.max_size() - buffers_.size()));
+          if ((!ec && bytes_transferred == 0) || bytes_available_ == 0)
+            break;
+        }
+
+        handler_(ec, static_cast<const std::size_t&>(total_transferred_));
+      }
+    }
+
+  //private:
+    AsyncReadStream& stream_;
+    DynamicBuffer_v2 buffers_;
+    int start_;
+    std::size_t total_transferred_;
+    std::size_t bytes_available_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename CompletionCondition, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_dynbuf_v2_op<AsyncReadStream, DynamicBuffer_v2,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename CompletionCondition, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_dynbuf_v2_op<AsyncReadStream, DynamicBuffer_v2,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename CompletionCondition, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_dynbuf_v2_op<AsyncReadStream, DynamicBuffer_v2,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename CompletionCondition,
+      typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_dynbuf_v2_op<AsyncReadStream, DynamicBuffer_v2,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename CompletionCondition,
+      typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_dynbuf_v2_op<AsyncReadStream, DynamicBuffer_v2,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream>
+  class initiate_async_read_dynbuf_v2
+  {
+  public:
+    typedef typename AsyncReadStream::executor_type executor_type;
+
+    explicit initiate_async_read_dynbuf_v2(AsyncReadStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename ReadHandler, typename DynamicBuffer_v2,
+        typename CompletionCondition>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v2) buffers,
+        ASIO_MOVE_ARG(CompletionCondition) completion_cond) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      non_const_lvalue<CompletionCondition> completion_cond2(completion_cond);
+      read_dynbuf_v2_op<AsyncReadStream, typename decay<DynamicBuffer_v2>::type,
+        CompletionCondition, typename decay<ReadHandler>::type>(
+          stream_, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+            completion_cond2.value, handler2.value)(
+              asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncReadStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    typename CompletionCondition, typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_dynbuf_v2_op<AsyncReadStream,
+      DynamicBuffer_v2, CompletionCondition, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_dynbuf_v2_op<AsyncReadStream,
+        DynamicBuffer_v2, CompletionCondition, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    typename CompletionCondition, typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_dynbuf_v2_op<AsyncReadStream,
+      DynamicBuffer_v2, CompletionCondition, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_dynbuf_v2_op<AsyncReadStream,
+        DynamicBuffer_v2, CompletionCondition, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, DynamicBuffer_v2 buffers,
+    ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  return async_read(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+      transfer_all(), ASIO_MOVE_CAST(ReadHandler)(handler));
+}
+
+template <typename AsyncReadStream,
+    typename DynamicBuffer_v2, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  // If you get an error on the following line it means that your handler does
+  // not meet the documented type requirements for a ReadHandler.
+  ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_dynbuf_v2<AsyncReadStream>(s),
+      handler, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_READ_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/read_at.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/read_at.hpp
new file mode 100644
index 00000000000..bee6be75eac
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/read_at.hpp
@@ -0,0 +1,699 @@
+//
+// impl/read_at.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_READ_AT_HPP
+#define ASIO_IMPL_READ_AT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include <algorithm>
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/buffer.hpp"
+#include "asio/completion_condition.hpp"
+#include "asio/detail/array_fwd.hpp"
+#include "asio/detail/base_from_completion_cond.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/consuming_buffers.hpp"
+#include "asio/detail/dependent_type.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail
+{
+  template <typename SyncRandomAccessReadDevice, typename MutableBufferSequence,
+      typename MutableBufferIterator, typename CompletionCondition>
+  std::size_t read_at_buffer_sequence(SyncRandomAccessReadDevice& d,
+      uint64_t offset, const MutableBufferSequence& buffers,
+      const MutableBufferIterator&, CompletionCondition completion_condition,
+      asio::error_code& ec)
+  {
+    ec = asio::error_code();
+    asio::detail::consuming_buffers<mutable_buffer,
+        MutableBufferSequence, MutableBufferIterator> tmp(buffers);
+    while (!tmp.empty())
+    {
+      if (std::size_t max_size = detail::adapt_completion_condition_result(
+            completion_condition(ec, tmp.total_consumed())))
+      {
+        tmp.consume(d.read_some_at(offset + tmp.total_consumed(),
+              tmp.prepare(max_size), ec));
+      }
+      else
+        break;
+    }
+    return tmp.total_consumed();;
+  }
+} // namespace detail
+
+template <typename SyncRandomAccessReadDevice, typename MutableBufferSequence,
+    typename CompletionCondition>
+std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition, asio::error_code& ec)
+{
+  return detail::read_at_buffer_sequence(d, offset, buffers,
+      asio::buffer_sequence_begin(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+}
+
+template <typename SyncRandomAccessReadDevice, typename MutableBufferSequence>
+inline std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, const MutableBufferSequence& buffers)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_at(
+      d, offset, buffers, transfer_all(), ec);
+  asio::detail::throw_error(ec, "read_at");
+  return bytes_transferred;
+}
+
+template <typename SyncRandomAccessReadDevice, typename MutableBufferSequence>
+inline std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, const MutableBufferSequence& buffers,
+    asio::error_code& ec)
+{
+  return read_at(d, offset, buffers, transfer_all(), ec);
+}
+
+template <typename SyncRandomAccessReadDevice, typename MutableBufferSequence,
+    typename CompletionCondition>
+inline std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_at(d, offset, buffers,
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  asio::detail::throw_error(ec, "read_at");
+  return bytes_transferred;
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+template <typename SyncRandomAccessReadDevice, typename Allocator,
+    typename CompletionCondition>
+std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition, asio::error_code& ec)
+{
+  ec = asio::error_code();
+  std::size_t total_transferred = 0;
+  std::size_t max_size = detail::adapt_completion_condition_result(
+        completion_condition(ec, total_transferred));
+  std::size_t bytes_available = read_size_helper(b, max_size);
+  while (bytes_available > 0)
+  {
+    std::size_t bytes_transferred = d.read_some_at(
+        offset + total_transferred, b.prepare(bytes_available), ec);
+    b.commit(bytes_transferred);
+    total_transferred += bytes_transferred;
+    max_size = detail::adapt_completion_condition_result(
+          completion_condition(ec, total_transferred));
+    bytes_available = read_size_helper(b, max_size);
+  }
+  return total_transferred;
+}
+
+template <typename SyncRandomAccessReadDevice, typename Allocator>
+inline std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_at(
+      d, offset, b, transfer_all(), ec);
+  asio::detail::throw_error(ec, "read_at");
+  return bytes_transferred;
+}
+
+template <typename SyncRandomAccessReadDevice, typename Allocator>
+inline std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b,
+    asio::error_code& ec)
+{
+  return read_at(d, offset, b, transfer_all(), ec);
+}
+
+template <typename SyncRandomAccessReadDevice, typename Allocator,
+    typename CompletionCondition>
+inline std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_at(d, offset, b,
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  asio::detail::throw_error(ec, "read_at");
+  return bytes_transferred;
+}
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+namespace detail
+{
+  template <typename AsyncRandomAccessReadDevice,
+      typename MutableBufferSequence, typename MutableBufferIterator,
+      typename CompletionCondition, typename ReadHandler>
+  class read_at_op
+    : detail::base_from_completion_cond<CompletionCondition>
+  {
+  public:
+    read_at_op(AsyncRandomAccessReadDevice& device,
+        uint64_t offset, const MutableBufferSequence& buffers,
+        CompletionCondition& completion_condition, ReadHandler& handler)
+      : detail::base_from_completion_cond<
+          CompletionCondition>(completion_condition),
+        device_(device),
+        offset_(offset),
+        buffers_(buffers),
+        start_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_at_op(const read_at_op& other)
+      : detail::base_from_completion_cond<CompletionCondition>(other),
+        device_(other.device_),
+        offset_(other.offset_),
+        buffers_(other.buffers_),
+        start_(other.start_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_at_op(read_at_op&& other)
+      : detail::base_from_completion_cond<CompletionCondition>(
+          ASIO_MOVE_CAST(detail::base_from_completion_cond<
+            CompletionCondition>)(other)),
+        device_(other.device_),
+        offset_(other.offset_),
+        buffers_(ASIO_MOVE_CAST(buffers_type)(other.buffers_)),
+        start_(other.start_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      std::size_t max_size;
+      switch (start_ = start)
+      {
+        case 1:
+        max_size = this->check_for_completion(ec, buffers_.total_consumed());
+        do
+        {
+          device_.async_read_some_at(
+              offset_ + buffers_.total_consumed(), buffers_.prepare(max_size),
+              ASIO_MOVE_CAST(read_at_op)(*this));
+          return; default:
+          buffers_.consume(bytes_transferred);
+          if ((!ec && bytes_transferred == 0) || buffers_.empty())
+            break;
+          max_size = this->check_for_completion(ec, buffers_.total_consumed());
+        } while (max_size > 0);
+
+        handler_(ec, buffers_.total_consumed());
+      }
+    }
+
+  //private:
+    typedef asio::detail::consuming_buffers<mutable_buffer,
+        MutableBufferSequence, MutableBufferIterator> buffers_type;
+
+    AsyncRandomAccessReadDevice& device_;
+    uint64_t offset_;
+    buffers_type buffers_;
+    int start_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncRandomAccessReadDevice,
+      typename MutableBufferSequence, typename MutableBufferIterator,
+      typename CompletionCondition, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_at_op<AsyncRandomAccessReadDevice, MutableBufferSequence,
+        MutableBufferIterator, CompletionCondition, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncRandomAccessReadDevice,
+      typename MutableBufferSequence, typename MutableBufferIterator,
+      typename CompletionCondition, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_at_op<AsyncRandomAccessReadDevice, MutableBufferSequence,
+        MutableBufferIterator, CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncRandomAccessReadDevice,
+      typename MutableBufferSequence, typename MutableBufferIterator,
+      typename CompletionCondition, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_at_op<AsyncRandomAccessReadDevice, MutableBufferSequence,
+        MutableBufferIterator, CompletionCondition, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncRandomAccessReadDevice,
+      typename MutableBufferSequence, typename MutableBufferIterator,
+      typename CompletionCondition, typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_at_op<AsyncRandomAccessReadDevice, MutableBufferSequence,
+        MutableBufferIterator, CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncRandomAccessReadDevice,
+      typename MutableBufferSequence, typename MutableBufferIterator,
+      typename CompletionCondition, typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_at_op<AsyncRandomAccessReadDevice, MutableBufferSequence,
+        MutableBufferIterator, CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncRandomAccessReadDevice,
+      typename MutableBufferSequence, typename MutableBufferIterator,
+      typename CompletionCondition, typename ReadHandler>
+  inline void start_read_at_buffer_sequence_op(AsyncRandomAccessReadDevice& d,
+      uint64_t offset, const MutableBufferSequence& buffers,
+      const MutableBufferIterator&, CompletionCondition& completion_condition,
+      ReadHandler& handler)
+  {
+    detail::read_at_op<AsyncRandomAccessReadDevice, MutableBufferSequence,
+      MutableBufferIterator, CompletionCondition, ReadHandler>(
+        d, offset, buffers, completion_condition, handler)(
+          asio::error_code(), 0, 1);
+  }
+
+  template <typename AsyncRandomAccessReadDevice>
+  class initiate_async_read_at_buffer_sequence
+  {
+  public:
+    typedef typename AsyncRandomAccessReadDevice::executor_type executor_type;
+
+    explicit initiate_async_read_at_buffer_sequence(
+        AsyncRandomAccessReadDevice& device)
+      : device_(device)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return device_.get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence,
+        typename CompletionCondition>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        uint64_t offset, const MutableBufferSequence& buffers,
+        ASIO_MOVE_ARG(CompletionCondition) completion_cond) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      non_const_lvalue<CompletionCondition> completion_cond2(completion_cond);
+      start_read_at_buffer_sequence_op(device_, offset, buffers,
+          asio::buffer_sequence_begin(buffers),
+          completion_cond2.value, handler2.value);
+    }
+
+  private:
+    AsyncRandomAccessReadDevice& device_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncRandomAccessReadDevice,
+    typename MutableBufferSequence, typename MutableBufferIterator,
+    typename CompletionCondition, typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_at_op<AsyncRandomAccessReadDevice, MutableBufferSequence,
+    MutableBufferIterator, CompletionCondition, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_at_op<AsyncRandomAccessReadDevice,
+      MutableBufferSequence, MutableBufferIterator,
+      CompletionCondition, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncRandomAccessReadDevice,
+    typename MutableBufferSequence, typename MutableBufferIterator,
+    typename CompletionCondition, typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_at_op<AsyncRandomAccessReadDevice, MutableBufferSequence,
+    MutableBufferIterator, CompletionCondition, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_at_op<AsyncRandomAccessReadDevice,
+      MutableBufferSequence, MutableBufferIterator,
+      CompletionCondition, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncRandomAccessReadDevice,
+    typename MutableBufferSequence, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_at(AsyncRandomAccessReadDevice& d,
+    uint64_t offset, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_at_buffer_sequence<
+        AsyncRandomAccessReadDevice>(d),
+      handler, offset, buffers,
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+template <typename AsyncRandomAccessReadDevice, typename MutableBufferSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_at(AsyncRandomAccessReadDevice& d,
+    uint64_t offset, const MutableBufferSequence& buffers,
+    ASIO_MOVE_ARG(ReadHandler) handler)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_at_buffer_sequence<
+        AsyncRandomAccessReadDevice>(d),
+      handler, offset, buffers, transfer_all());
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+namespace detail
+{
+  template <typename AsyncRandomAccessReadDevice, typename Allocator,
+      typename CompletionCondition, typename ReadHandler>
+  class read_at_streambuf_op
+    : detail::base_from_completion_cond<CompletionCondition>
+  {
+  public:
+    read_at_streambuf_op(AsyncRandomAccessReadDevice& device,
+        uint64_t offset, basic_streambuf<Allocator>& streambuf,
+        CompletionCondition& completion_condition, ReadHandler& handler)
+      : detail::base_from_completion_cond<
+          CompletionCondition>(completion_condition),
+        device_(device),
+        offset_(offset),
+        streambuf_(streambuf),
+        start_(0),
+        total_transferred_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_at_streambuf_op(const read_at_streambuf_op& other)
+      : detail::base_from_completion_cond<CompletionCondition>(other),
+        device_(other.device_),
+        offset_(other.offset_),
+        streambuf_(other.streambuf_),
+        start_(other.start_),
+        total_transferred_(other.total_transferred_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_at_streambuf_op(read_at_streambuf_op&& other)
+      : detail::base_from_completion_cond<CompletionCondition>(
+          ASIO_MOVE_CAST(detail::base_from_completion_cond<
+            CompletionCondition>)(other)),
+        device_(other.device_),
+        offset_(other.offset_),
+        streambuf_(other.streambuf_),
+        start_(other.start_),
+        total_transferred_(other.total_transferred_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      std::size_t max_size, bytes_available;
+      switch (start_ = start)
+      {
+        case 1:
+        max_size = this->check_for_completion(ec, total_transferred_);
+        bytes_available = read_size_helper(streambuf_, max_size);
+        for (;;)
+        {
+          device_.async_read_some_at(offset_ + total_transferred_,
+              streambuf_.prepare(bytes_available),
+              ASIO_MOVE_CAST(read_at_streambuf_op)(*this));
+          return; default:
+          total_transferred_ += bytes_transferred;
+          streambuf_.commit(bytes_transferred);
+          max_size = this->check_for_completion(ec, total_transferred_);
+          bytes_available = read_size_helper(streambuf_, max_size);
+          if ((!ec && bytes_transferred == 0) || bytes_available == 0)
+            break;
+        }
+
+        handler_(ec, static_cast<const std::size_t&>(total_transferred_));
+      }
+    }
+
+  //private:
+    AsyncRandomAccessReadDevice& device_;
+    uint64_t offset_;
+    asio::basic_streambuf<Allocator>& streambuf_;
+    int start_;
+    std::size_t total_transferred_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncRandomAccessReadDevice, typename Allocator,
+      typename CompletionCondition, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_at_streambuf_op<AsyncRandomAccessReadDevice, Allocator,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncRandomAccessReadDevice, typename Allocator,
+      typename CompletionCondition, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_at_streambuf_op<AsyncRandomAccessReadDevice, Allocator,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncRandomAccessReadDevice, typename Allocator,
+      typename CompletionCondition, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_at_streambuf_op<AsyncRandomAccessReadDevice, Allocator,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncRandomAccessReadDevice,
+      typename Allocator, typename CompletionCondition, typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_at_streambuf_op<AsyncRandomAccessReadDevice, Allocator,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncRandomAccessReadDevice,
+      typename Allocator, typename CompletionCondition, typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_at_streambuf_op<AsyncRandomAccessReadDevice, Allocator,
+        CompletionCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncRandomAccessReadDevice>
+  class initiate_async_read_at_streambuf
+  {
+  public:
+    typedef typename AsyncRandomAccessReadDevice::executor_type executor_type;
+
+    explicit initiate_async_read_at_streambuf(
+        AsyncRandomAccessReadDevice& device)
+      : device_(device)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return device_.get_executor();
+    }
+
+    template <typename ReadHandler,
+        typename Allocator, typename CompletionCondition>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        uint64_t offset, basic_streambuf<Allocator>* b,
+        ASIO_MOVE_ARG(CompletionCondition) completion_cond) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      non_const_lvalue<CompletionCondition> completion_cond2(completion_cond);
+      read_at_streambuf_op<AsyncRandomAccessReadDevice, Allocator,
+        CompletionCondition, typename decay<ReadHandler>::type>(
+          device_, offset, *b, completion_cond2.value, handler2.value)(
+            asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncRandomAccessReadDevice& device_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncRandomAccessReadDevice, typename Allocator,
+    typename CompletionCondition, typename ReadHandler, typename Allocator1>
+struct associated_allocator<
+    detail::read_at_streambuf_op<AsyncRandomAccessReadDevice,
+      Allocator, CompletionCondition, ReadHandler>,
+    Allocator1>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator1>::type type;
+
+  static type get(
+      const detail::read_at_streambuf_op<AsyncRandomAccessReadDevice,
+        Allocator, CompletionCondition, ReadHandler>& h,
+      const Allocator1& a = Allocator1()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator1>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncRandomAccessReadDevice, typename Executor,
+    typename CompletionCondition, typename ReadHandler, typename Executor1>
+struct associated_executor<
+    detail::read_at_streambuf_op<AsyncRandomAccessReadDevice,
+      Executor, CompletionCondition, ReadHandler>,
+    Executor1>
+{
+  typedef typename associated_executor<ReadHandler, Executor1>::type type;
+
+  static type get(
+      const detail::read_at_streambuf_op<AsyncRandomAccessReadDevice,
+        Executor, CompletionCondition, ReadHandler>& h,
+      const Executor1& ex = Executor1()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor1>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncRandomAccessReadDevice,
+    typename Allocator, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_at(AsyncRandomAccessReadDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_at_streambuf<AsyncRandomAccessReadDevice>(d),
+      handler, offset, &b,
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+template <typename AsyncRandomAccessReadDevice, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_at(AsyncRandomAccessReadDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b,
+    ASIO_MOVE_ARG(ReadHandler) handler)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_at_streambuf<AsyncRandomAccessReadDevice>(d),
+      handler, offset, &b, transfer_all());
+}
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_READ_AT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/read_until.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/read_until.hpp
new file mode 100644
index 00000000000..08b8677ca5f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/read_until.hpp
@@ -0,0 +1,3150 @@
+//
+// impl/read_until.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_READ_UNTIL_HPP
+#define ASIO_IMPL_READ_UNTIL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include <algorithm>
+#include <string>
+#include <vector>
+#include <utility>
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/buffer.hpp"
+#include "asio/buffers_iterator.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/limits.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail
+{
+  // Algorithm that finds a subsequence of equal values in a sequence. Returns
+  // (iterator,true) if a full match was found, in which case the iterator
+  // points to the beginning of the match. Returns (iterator,false) if a
+  // partial match was found at the end of the first sequence, in which case
+  // the iterator points to the beginning of the partial match. Returns
+  // (last1,false) if no full or partial match was found.
+  template <typename Iterator1, typename Iterator2>
+  std::pair<Iterator1, bool> partial_search(
+      Iterator1 first1, Iterator1 last1, Iterator2 first2, Iterator2 last2)
+  {
+    for (Iterator1 iter1 = first1; iter1 != last1; ++iter1)
+    {
+      Iterator1 test_iter1 = iter1;
+      Iterator2 test_iter2 = first2;
+      for (;; ++test_iter1, ++test_iter2)
+      {
+        if (test_iter2 == last2)
+          return std::make_pair(iter1, true);
+        if (test_iter1 == last1)
+        {
+          if (test_iter2 != first2)
+            return std::make_pair(iter1, false);
+          else
+            break;
+        }
+        if (*test_iter1 != *test_iter2)
+          break;
+      }
+    }
+    return std::make_pair(last1, false);
+  }
+} // namespace detail
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+inline std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers, char delim,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_until(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers), delim, ec);
+  asio::detail::throw_error(ec, "read_until");
+  return bytes_transferred;
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    char delim, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  typename decay<DynamicBuffer_v1>::type b(
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers));
+
+  std::size_t search_position = 0;
+  for (;;)
+  {
+    // Determine the range of the data to be searched.
+    typedef typename DynamicBuffer_v1::const_buffers_type buffers_type;
+    typedef buffers_iterator<buffers_type> iterator;
+    buffers_type data_buffers = b.data();
+    iterator begin = iterator::begin(data_buffers);
+    iterator start_pos = begin + search_position;
+    iterator end = iterator::end(data_buffers);
+
+    // Look for a match.
+    iterator iter = std::find(start_pos, end, delim);
+    if (iter != end)
+    {
+      // Found a match. We're done.
+      ec = asio::error_code();
+      return iter - begin + 1;
+    }
+    else
+    {
+      // No match. Next search can start with the new data.
+      search_position = end - begin;
+    }
+
+    // Check if buffer is full.
+    if (b.size() == b.max_size())
+    {
+      ec = error::not_found;
+      return 0;
+    }
+
+    // Need more data.
+    std::size_t bytes_to_read = std::min<std::size_t>(
+          std::max<std::size_t>(512, b.capacity() - b.size()),
+          std::min<std::size_t>(65536, b.max_size() - b.size()));
+    b.commit(s.read_some(b.prepare(bytes_to_read), ec));
+    if (ec)
+      return 0;
+  }
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+inline std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    ASIO_STRING_VIEW_PARAM delim,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_until(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers), delim, ec);
+  asio::detail::throw_error(ec, "read_until");
+  return bytes_transferred;
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    ASIO_STRING_VIEW_PARAM delim, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  typename decay<DynamicBuffer_v1>::type b(
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers));
+
+  std::size_t search_position = 0;
+  for (;;)
+  {
+    // Determine the range of the data to be searched.
+    typedef typename DynamicBuffer_v1::const_buffers_type buffers_type;
+    typedef buffers_iterator<buffers_type> iterator;
+    buffers_type data_buffers = b.data();
+    iterator begin = iterator::begin(data_buffers);
+    iterator start_pos = begin + search_position;
+    iterator end = iterator::end(data_buffers);
+
+    // Look for a match.
+    std::pair<iterator, bool> result = detail::partial_search(
+        start_pos, end, delim.begin(), delim.end());
+    if (result.first != end)
+    {
+      if (result.second)
+      {
+        // Full match. We're done.
+        ec = asio::error_code();
+        return result.first - begin + delim.length();
+      }
+      else
+      {
+        // Partial match. Next search needs to start from beginning of match.
+        search_position = result.first - begin;
+      }
+    }
+    else
+    {
+      // No match. Next search can start with the new data.
+      search_position = end - begin;
+    }
+
+    // Check if buffer is full.
+    if (b.size() == b.max_size())
+    {
+      ec = error::not_found;
+      return 0;
+    }
+
+    // Need more data.
+    std::size_t bytes_to_read = std::min<std::size_t>(
+          std::max<std::size_t>(512, b.capacity() - b.size()),
+          std::min<std::size_t>(65536, b.max_size() - b.size()));
+    b.commit(s.read_some(b.prepare(bytes_to_read), ec));
+    if (ec)
+      return 0;
+  }
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if defined(ASIO_HAS_BOOST_REGEX)
+
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+inline std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    const boost::regex& expr,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_until(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers), expr, ec);
+  asio::detail::throw_error(ec, "read_until");
+  return bytes_transferred;
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    const boost::regex& expr, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  typename decay<DynamicBuffer_v1>::type b(
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers));
+
+  std::size_t search_position = 0;
+  for (;;)
+  {
+    // Determine the range of the data to be searched.
+    typedef typename DynamicBuffer_v1::const_buffers_type buffers_type;
+    typedef buffers_iterator<buffers_type> iterator;
+    buffers_type data_buffers = b.data();
+    iterator begin = iterator::begin(data_buffers);
+    iterator start_pos = begin + search_position;
+    iterator end = iterator::end(data_buffers);
+
+    // Look for a match.
+    boost::match_results<iterator,
+      typename std::vector<boost::sub_match<iterator> >::allocator_type>
+        match_results;
+    if (regex_search(start_pos, end, match_results, expr,
+          boost::match_default | boost::match_partial))
+    {
+      if (match_results[0].matched)
+      {
+        // Full match. We're done.
+        ec = asio::error_code();
+        return match_results[0].second - begin;
+      }
+      else
+      {
+        // Partial match. Next search needs to start from beginning of match.
+        search_position = match_results[0].first - begin;
+      }
+    }
+    else
+    {
+      // No match. Next search can start with the new data.
+      search_position = end - begin;
+    }
+
+    // Check if buffer is full.
+    if (b.size() == b.max_size())
+    {
+      ec = error::not_found;
+      return 0;
+    }
+
+    // Need more data.
+    std::size_t bytes_to_read = std::min<std::size_t>(
+          std::max<std::size_t>(512, b.capacity() - b.size()),
+          std::min<std::size_t>(65536, b.max_size() - b.size()));
+    b.commit(s.read_some(b.prepare(bytes_to_read), ec));
+    if (ec)
+      return 0;
+  }
+}
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+
+template <typename SyncReadStream,
+    typename DynamicBuffer_v1, typename MatchCondition>
+inline std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    MatchCondition match_condition,
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_until(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+      match_condition, ec);
+  asio::detail::throw_error(ec, "read_until");
+  return bytes_transferred;
+}
+
+template <typename SyncReadStream,
+    typename DynamicBuffer_v1, typename MatchCondition>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    MatchCondition match_condition, asio::error_code& ec,
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  typename decay<DynamicBuffer_v1>::type b(
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers));
+
+  std::size_t search_position = 0;
+  for (;;)
+  {
+    // Determine the range of the data to be searched.
+    typedef typename DynamicBuffer_v1::const_buffers_type buffers_type;
+    typedef buffers_iterator<buffers_type> iterator;
+    buffers_type data_buffers = b.data();
+    iterator begin = iterator::begin(data_buffers);
+    iterator start_pos = begin + search_position;
+    iterator end = iterator::end(data_buffers);
+
+    // Look for a match.
+    std::pair<iterator, bool> result = match_condition(start_pos, end);
+    if (result.second)
+    {
+      // Full match. We're done.
+      ec = asio::error_code();
+      return result.first - begin;
+    }
+    else if (result.first != end)
+    {
+      // Partial match. Next search needs to start from beginning of match.
+      search_position = result.first - begin;
+    }
+    else
+    {
+      // No match. Next search can start with the new data.
+      search_position = end - begin;
+    }
+
+    // Check if buffer is full.
+    if (b.size() == b.max_size())
+    {
+      ec = error::not_found;
+      return 0;
+    }
+
+    // Need more data.
+    std::size_t bytes_to_read = std::min<std::size_t>(
+          std::max<std::size_t>(512, b.capacity() - b.size()),
+          std::min<std::size_t>(65536, b.max_size() - b.size()));
+    b.commit(s.read_some(b.prepare(bytes_to_read), ec));
+    if (ec)
+      return 0;
+  }
+}
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+template <typename SyncReadStream, typename Allocator>
+inline std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, char delim)
+{
+  return read_until(s, basic_streambuf_ref<Allocator>(b), delim);
+}
+
+template <typename SyncReadStream, typename Allocator>
+inline std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, char delim,
+    asio::error_code& ec)
+{
+  return read_until(s, basic_streambuf_ref<Allocator>(b), delim, ec);
+}
+
+template <typename SyncReadStream, typename Allocator>
+inline std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    ASIO_STRING_VIEW_PARAM delim)
+{
+  return read_until(s, basic_streambuf_ref<Allocator>(b), delim);
+}
+
+template <typename SyncReadStream, typename Allocator>
+inline std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    ASIO_STRING_VIEW_PARAM delim, asio::error_code& ec)
+{
+  return read_until(s, basic_streambuf_ref<Allocator>(b), delim, ec);
+}
+
+#if defined(ASIO_HAS_BOOST_REGEX)
+
+template <typename SyncReadStream, typename Allocator>
+inline std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, const boost::regex& expr)
+{
+  return read_until(s, basic_streambuf_ref<Allocator>(b), expr);
+}
+
+template <typename SyncReadStream, typename Allocator>
+inline std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, const boost::regex& expr,
+    asio::error_code& ec)
+{
+  return read_until(s, basic_streambuf_ref<Allocator>(b), expr, ec);
+}
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+
+template <typename SyncReadStream, typename Allocator, typename MatchCondition>
+inline std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, MatchCondition match_condition,
+    typename enable_if<is_match_condition<MatchCondition>::value>::type*)
+{
+  return read_until(s, basic_streambuf_ref<Allocator>(b), match_condition);
+}
+
+template <typename SyncReadStream, typename Allocator, typename MatchCondition>
+inline std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    MatchCondition match_condition, asio::error_code& ec,
+    typename enable_if<is_match_condition<MatchCondition>::value>::type*)
+{
+  return read_until(s, basic_streambuf_ref<Allocator>(b), match_condition, ec);
+}
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+inline std::size_t read_until(SyncReadStream& s,
+    DynamicBuffer_v2 buffers, char delim,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_until(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers), delim, ec);
+  asio::detail::throw_error(ec, "read_until");
+  return bytes_transferred;
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    char delim, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  DynamicBuffer_v2& b = buffers;
+
+  std::size_t search_position = 0;
+  for (;;)
+  {
+    // Determine the range of the data to be searched.
+    typedef typename DynamicBuffer_v2::const_buffers_type buffers_type;
+    typedef buffers_iterator<buffers_type> iterator;
+    buffers_type data_buffers =
+      const_cast<const DynamicBuffer_v2&>(b).data(0, b.size());
+    iterator begin = iterator::begin(data_buffers);
+    iterator start_pos = begin + search_position;
+    iterator end = iterator::end(data_buffers);
+
+    // Look for a match.
+    iterator iter = std::find(start_pos, end, delim);
+    if (iter != end)
+    {
+      // Found a match. We're done.
+      ec = asio::error_code();
+      return iter - begin + 1;
+    }
+    else
+    {
+      // No match. Next search can start with the new data.
+      search_position = end - begin;
+    }
+
+    // Check if buffer is full.
+    if (b.size() == b.max_size())
+    {
+      ec = error::not_found;
+      return 0;
+    }
+
+    // Need more data.
+    std::size_t bytes_to_read = std::min<std::size_t>(
+          std::max<std::size_t>(512, b.capacity() - b.size()),
+          std::min<std::size_t>(65536, b.max_size() - b.size()));
+    std::size_t pos = b.size();
+    b.grow(bytes_to_read);
+    std::size_t bytes_transferred = s.read_some(b.data(pos, bytes_to_read), ec);
+    b.shrink(bytes_to_read - bytes_transferred);
+    if (ec)
+      return 0;
+  }
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+inline std::size_t read_until(SyncReadStream& s,
+    DynamicBuffer_v2 buffers, ASIO_STRING_VIEW_PARAM delim,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_until(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers), delim, ec);
+  asio::detail::throw_error(ec, "read_until");
+  return bytes_transferred;
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    ASIO_STRING_VIEW_PARAM delim, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  DynamicBuffer_v2& b = buffers;
+
+  std::size_t search_position = 0;
+  for (;;)
+  {
+    // Determine the range of the data to be searched.
+    typedef typename DynamicBuffer_v2::const_buffers_type buffers_type;
+    typedef buffers_iterator<buffers_type> iterator;
+    buffers_type data_buffers =
+      const_cast<const DynamicBuffer_v2&>(b).data(0, b.size());
+    iterator begin = iterator::begin(data_buffers);
+    iterator start_pos = begin + search_position;
+    iterator end = iterator::end(data_buffers);
+
+    // Look for a match.
+    std::pair<iterator, bool> result = detail::partial_search(
+        start_pos, end, delim.begin(), delim.end());
+    if (result.first != end)
+    {
+      if (result.second)
+      {
+        // Full match. We're done.
+        ec = asio::error_code();
+        return result.first - begin + delim.length();
+      }
+      else
+      {
+        // Partial match. Next search needs to start from beginning of match.
+        search_position = result.first - begin;
+      }
+    }
+    else
+    {
+      // No match. Next search can start with the new data.
+      search_position = end - begin;
+    }
+
+    // Check if buffer is full.
+    if (b.size() == b.max_size())
+    {
+      ec = error::not_found;
+      return 0;
+    }
+
+    // Need more data.
+    std::size_t bytes_to_read = std::min<std::size_t>(
+          std::max<std::size_t>(512, b.capacity() - b.size()),
+          std::min<std::size_t>(65536, b.max_size() - b.size()));
+    std::size_t pos = b.size();
+    b.grow(bytes_to_read);
+    std::size_t bytes_transferred = s.read_some(b.data(pos, bytes_to_read), ec);
+    b.shrink(bytes_to_read - bytes_transferred);
+    if (ec)
+      return 0;
+  }
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if defined(ASIO_HAS_BOOST_REGEX)
+
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+inline std::size_t read_until(SyncReadStream& s,
+    DynamicBuffer_v2 buffers, const boost::regex& expr,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_until(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers), expr, ec);
+  asio::detail::throw_error(ec, "read_until");
+  return bytes_transferred;
+}
+
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    const boost::regex& expr, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  DynamicBuffer_v2& b = buffers;
+
+  std::size_t search_position = 0;
+  for (;;)
+  {
+    // Determine the range of the data to be searched.
+    typedef typename DynamicBuffer_v2::const_buffers_type buffers_type;
+    typedef buffers_iterator<buffers_type> iterator;
+    buffers_type data_buffers =
+      const_cast<const DynamicBuffer_v2&>(b).data(0, b.size());
+    iterator begin = iterator::begin(data_buffers);
+    iterator start_pos = begin + search_position;
+    iterator end = iterator::end(data_buffers);
+
+    // Look for a match.
+    boost::match_results<iterator,
+      typename std::vector<boost::sub_match<iterator> >::allocator_type>
+        match_results;
+    if (regex_search(start_pos, end, match_results, expr,
+          boost::match_default | boost::match_partial))
+    {
+      if (match_results[0].matched)
+      {
+        // Full match. We're done.
+        ec = asio::error_code();
+        return match_results[0].second - begin;
+      }
+      else
+      {
+        // Partial match. Next search needs to start from beginning of match.
+        search_position = match_results[0].first - begin;
+      }
+    }
+    else
+    {
+      // No match. Next search can start with the new data.
+      search_position = end - begin;
+    }
+
+    // Check if buffer is full.
+    if (b.size() == b.max_size())
+    {
+      ec = error::not_found;
+      return 0;
+    }
+
+    // Need more data.
+    std::size_t bytes_to_read = std::min<std::size_t>(
+          std::max<std::size_t>(512, b.capacity() - b.size()),
+          std::min<std::size_t>(65536, b.max_size() - b.size()));
+    std::size_t pos = b.size();
+    b.grow(bytes_to_read);
+    std::size_t bytes_transferred = s.read_some(b.data(pos, bytes_to_read), ec);
+    b.shrink(bytes_to_read - bytes_transferred);
+    if (ec)
+      return 0;
+  }
+}
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+
+template <typename SyncReadStream,
+    typename DynamicBuffer_v2, typename MatchCondition>
+inline std::size_t read_until(SyncReadStream& s,
+    DynamicBuffer_v2 buffers, MatchCondition match_condition,
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = read_until(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+      match_condition, ec);
+  asio::detail::throw_error(ec, "read_until");
+  return bytes_transferred;
+}
+
+template <typename SyncReadStream,
+    typename DynamicBuffer_v2, typename MatchCondition>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    MatchCondition match_condition, asio::error_code& ec,
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  DynamicBuffer_v2& b = buffers;
+
+  std::size_t search_position = 0;
+  for (;;)
+  {
+    // Determine the range of the data to be searched.
+    typedef typename DynamicBuffer_v2::const_buffers_type buffers_type;
+    typedef buffers_iterator<buffers_type> iterator;
+    buffers_type data_buffers =
+      const_cast<const DynamicBuffer_v2&>(b).data(0, b.size());
+    iterator begin = iterator::begin(data_buffers);
+    iterator start_pos = begin + search_position;
+    iterator end = iterator::end(data_buffers);
+
+    // Look for a match.
+    std::pair<iterator, bool> result = match_condition(start_pos, end);
+    if (result.second)
+    {
+      // Full match. We're done.
+      ec = asio::error_code();
+      return result.first - begin;
+    }
+    else if (result.first != end)
+    {
+      // Partial match. Next search needs to start from beginning of match.
+      search_position = result.first - begin;
+    }
+    else
+    {
+      // No match. Next search can start with the new data.
+      search_position = end - begin;
+    }
+
+    // Check if buffer is full.
+    if (b.size() == b.max_size())
+    {
+      ec = error::not_found;
+      return 0;
+    }
+
+    // Need more data.
+    std::size_t bytes_to_read = std::min<std::size_t>(
+          std::max<std::size_t>(512, b.capacity() - b.size()),
+          std::min<std::size_t>(65536, b.max_size() - b.size()));
+    std::size_t pos = b.size();
+    b.grow(bytes_to_read);
+    std::size_t bytes_transferred = s.read_some(b.data(pos, bytes_to_read), ec);
+    b.shrink(bytes_to_read - bytes_transferred);
+    if (ec)
+      return 0;
+  }
+}
+
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+namespace detail
+{
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  class read_until_delim_op_v1
+  {
+  public:
+    template <typename BufferSequence>
+    read_until_delim_op_v1(AsyncReadStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        char delim, ReadHandler& handler)
+      : stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        delim_(delim),
+        start_(0),
+        search_position_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_until_delim_op_v1(const read_until_delim_op_v1& other)
+      : stream_(other.stream_),
+        buffers_(other.buffers_),
+        delim_(other.delim_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_until_delim_op_v1(read_until_delim_op_v1&& other)
+      : stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v1)(other.buffers_)),
+        delim_(other.delim_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      const std::size_t not_found = (std::numeric_limits<std::size_t>::max)();
+      std::size_t bytes_to_read;
+      switch (start_ = start)
+      {
+      case 1:
+        for (;;)
+        {
+          {
+            // Determine the range of the data to be searched.
+            typedef typename DynamicBuffer_v1::const_buffers_type
+              buffers_type;
+            typedef buffers_iterator<buffers_type> iterator;
+            buffers_type data_buffers = buffers_.data();
+            iterator begin = iterator::begin(data_buffers);
+            iterator start_pos = begin + search_position_;
+            iterator end = iterator::end(data_buffers);
+
+            // Look for a match.
+            iterator iter = std::find(start_pos, end, delim_);
+            if (iter != end)
+            {
+              // Found a match. We're done.
+              search_position_ = iter - begin + 1;
+              bytes_to_read = 0;
+            }
+
+            // No match yet. Check if buffer is full.
+            else if (buffers_.size() == buffers_.max_size())
+            {
+              search_position_ = not_found;
+              bytes_to_read = 0;
+            }
+
+            // Need to read some more data.
+            else
+            {
+              // Next search can start with the new data.
+              search_position_ = end - begin;
+              bytes_to_read = std::min<std::size_t>(
+                    std::max<std::size_t>(512,
+                      buffers_.capacity() - buffers_.size()),
+                    std::min<std::size_t>(65536,
+                      buffers_.max_size() - buffers_.size()));
+            }
+          }
+
+          // Check if we're done.
+          if (!start && bytes_to_read == 0)
+            break;
+
+          // Start a new asynchronous read op_v1eration to obtain more data.
+          stream_.async_read_some(buffers_.prepare(bytes_to_read),
+              ASIO_MOVE_CAST(read_until_delim_op_v1)(*this));
+          return; default:
+          buffers_.commit(bytes_transferred);
+          if (ec || bytes_transferred == 0)
+            break;
+        }
+
+        const asio::error_code result_ec =
+          (search_position_ == not_found)
+          ? error::not_found : ec;
+
+        const std::size_t result_n =
+          (ec || search_position_ == not_found)
+          ? 0 : search_position_;
+
+        handler_(result_ec, result_n);
+      }
+    }
+
+  //private:
+    AsyncReadStream& stream_;
+    DynamicBuffer_v1 buffers_;
+    char delim_;
+    int start_;
+    std::size_t search_position_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_until_delim_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_until_delim_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_until_delim_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_until_delim_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_until_delim_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream>
+  class initiate_async_read_until_delim_v1
+  {
+  public:
+    typedef typename AsyncReadStream::executor_type executor_type;
+
+    explicit initiate_async_read_until_delim_v1(AsyncReadStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename ReadHandler, typename DynamicBuffer_v1>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+        char delim) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      read_until_delim_op_v1<AsyncReadStream,
+        typename decay<DynamicBuffer_v1>::type,
+          typename decay<ReadHandler>::type>(
+            stream_, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+            delim, handler2.value)(asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncReadStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_until_delim_op_v1<AsyncReadStream,
+      DynamicBuffer_v1, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_until_delim_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_until_delim_op_v1<AsyncReadStream,
+      DynamicBuffer_v1, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_until_delim_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    char delim, ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_until_delim_v1<AsyncReadStream>(s),
+      handler, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers), delim);
+}
+
+namespace detail
+{
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  class read_until_delim_string_op_v1
+  {
+  public:
+    template <typename BufferSequence>
+    read_until_delim_string_op_v1(AsyncReadStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        const std::string& delim, ReadHandler& handler)
+      : stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        delim_(delim),
+        start_(0),
+        search_position_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_until_delim_string_op_v1(const read_until_delim_string_op_v1& other)
+      : stream_(other.stream_),
+        buffers_(other.buffers_),
+        delim_(other.delim_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_until_delim_string_op_v1(read_until_delim_string_op_v1&& other)
+      : stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v1)(other.buffers_)),
+        delim_(ASIO_MOVE_CAST(std::string)(other.delim_)),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      const std::size_t not_found = (std::numeric_limits<std::size_t>::max)();
+      std::size_t bytes_to_read;
+      switch (start_ = start)
+      {
+      case 1:
+        for (;;)
+        {
+          {
+            // Determine the range of the data to be searched.
+            typedef typename DynamicBuffer_v1::const_buffers_type
+              buffers_type;
+            typedef buffers_iterator<buffers_type> iterator;
+            buffers_type data_buffers = buffers_.data();
+            iterator begin = iterator::begin(data_buffers);
+            iterator start_pos = begin + search_position_;
+            iterator end = iterator::end(data_buffers);
+
+            // Look for a match.
+            std::pair<iterator, bool> result = detail::partial_search(
+                start_pos, end, delim_.begin(), delim_.end());
+            if (result.first != end && result.second)
+            {
+              // Full match. We're done.
+              search_position_ = result.first - begin + delim_.length();
+              bytes_to_read = 0;
+            }
+
+            // No match yet. Check if buffer is full.
+            else if (buffers_.size() == buffers_.max_size())
+            {
+              search_position_ = not_found;
+              bytes_to_read = 0;
+            }
+
+            // Need to read some more data.
+            else
+            {
+              if (result.first != end)
+              {
+                // Partial match. Next search needs to start from beginning of
+                // match.
+                search_position_ = result.first - begin;
+              }
+              else
+              {
+                // Next search can start with the new data.
+                search_position_ = end - begin;
+              }
+
+              bytes_to_read = std::min<std::size_t>(
+                    std::max<std::size_t>(512,
+                      buffers_.capacity() - buffers_.size()),
+                    std::min<std::size_t>(65536,
+                      buffers_.max_size() - buffers_.size()));
+            }
+          }
+
+          // Check if we're done.
+          if (!start && bytes_to_read == 0)
+            break;
+
+          // Start a new asynchronous read op_v1eration to obtain more data.
+          stream_.async_read_some(buffers_.prepare(bytes_to_read),
+              ASIO_MOVE_CAST(read_until_delim_string_op_v1)(*this));
+          return; default:
+          buffers_.commit(bytes_transferred);
+          if (ec || bytes_transferred == 0)
+            break;
+        }
+
+        const asio::error_code result_ec =
+          (search_position_ == not_found)
+          ? error::not_found : ec;
+
+        const std::size_t result_n =
+          (ec || search_position_ == not_found)
+          ? 0 : search_position_;
+
+        handler_(result_ec, result_n);
+      }
+    }
+
+  //private:
+    AsyncReadStream& stream_;
+    DynamicBuffer_v1 buffers_;
+    std::string delim_;
+    int start_;
+    std::size_t search_position_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_until_delim_string_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_until_delim_string_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_until_delim_string_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_until_delim_string_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_until_delim_string_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream>
+  class initiate_async_read_until_delim_string_v1
+  {
+  public:
+    typedef typename AsyncReadStream::executor_type executor_type;
+
+    explicit initiate_async_read_until_delim_string_v1(AsyncReadStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename ReadHandler, typename DynamicBuffer_v1>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+        const std::string& delim) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      read_until_delim_string_op_v1<AsyncReadStream,
+        typename decay<DynamicBuffer_v1>::type,
+          typename decay<ReadHandler>::type>(
+            stream_, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+            delim, handler2.value)(asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncReadStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_until_delim_string_op_v1<AsyncReadStream,
+      DynamicBuffer_v1, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_until_delim_string_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_until_delim_string_op_v1<AsyncReadStream,
+      DynamicBuffer_v1, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_until_delim_string_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    ASIO_STRING_VIEW_PARAM delim,
+    ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_until_delim_string_v1<AsyncReadStream>(s),
+      handler, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+      static_cast<std::string>(delim));
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if defined(ASIO_HAS_BOOST_REGEX)
+
+namespace detail
+{
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename RegEx, typename ReadHandler>
+  class read_until_expr_op_v1
+  {
+  public:
+    template <typename BufferSequence>
+    read_until_expr_op_v1(AsyncReadStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        const boost::regex& expr, ReadHandler& handler)
+      : stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        expr_(expr),
+        start_(0),
+        search_position_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_until_expr_op_v1(const read_until_expr_op_v1& other)
+      : stream_(other.stream_),
+        buffers_(other.buffers_),
+        expr_(other.expr_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_until_expr_op_v1(read_until_expr_op_v1&& other)
+      : stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v1)(other.buffers_)),
+        expr_(other.expr_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      const std::size_t not_found = (std::numeric_limits<std::size_t>::max)();
+      std::size_t bytes_to_read;
+      switch (start_ = start)
+      {
+      case 1:
+        for (;;)
+        {
+          {
+            // Determine the range of the data to be searched.
+            typedef typename DynamicBuffer_v1::const_buffers_type
+              buffers_type;
+            typedef buffers_iterator<buffers_type> iterator;
+            buffers_type data_buffers = buffers_.data();
+            iterator begin = iterator::begin(data_buffers);
+            iterator start_pos = begin + search_position_;
+            iterator end = iterator::end(data_buffers);
+
+            // Look for a match.
+            boost::match_results<iterator,
+              typename std::vector<boost::sub_match<iterator> >::allocator_type>
+                match_results;
+            bool match = regex_search(start_pos, end, match_results, expr_,
+                boost::match_default | boost::match_partial);
+            if (match && match_results[0].matched)
+            {
+              // Full match. We're done.
+              search_position_ = match_results[0].second - begin;
+              bytes_to_read = 0;
+            }
+
+            // No match yet. Check if buffer is full.
+            else if (buffers_.size() == buffers_.max_size())
+            {
+              search_position_ = not_found;
+              bytes_to_read = 0;
+            }
+
+            // Need to read some more data.
+            else
+            {
+              if (match)
+              {
+                // Partial match. Next search needs to start from beginning of
+                // match.
+                search_position_ = match_results[0].first - begin;
+              }
+              else
+              {
+                // Next search can start with the new data.
+                search_position_ = end - begin;
+              }
+
+              bytes_to_read = std::min<std::size_t>(
+                    std::max<std::size_t>(512,
+                      buffers_.capacity() - buffers_.size()),
+                    std::min<std::size_t>(65536,
+                      buffers_.max_size() - buffers_.size()));
+            }
+          }
+
+          // Check if we're done.
+          if (!start && bytes_to_read == 0)
+            break;
+
+          // Start a new asynchronous read op_v1eration to obtain more data.
+          stream_.async_read_some(buffers_.prepare(bytes_to_read),
+              ASIO_MOVE_CAST(read_until_expr_op_v1)(*this));
+          return; default:
+          buffers_.commit(bytes_transferred);
+          if (ec || bytes_transferred == 0)
+            break;
+        }
+
+        const asio::error_code result_ec =
+          (search_position_ == not_found)
+          ? error::not_found : ec;
+
+        const std::size_t result_n =
+          (ec || search_position_ == not_found)
+          ? 0 : search_position_;
+
+        handler_(result_ec, result_n);
+      }
+    }
+
+  //private:
+    AsyncReadStream& stream_;
+    DynamicBuffer_v1 buffers_;
+    RegEx expr_;
+    int start_;
+    std::size_t search_position_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename RegEx, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_until_expr_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, RegEx, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename RegEx, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_until_expr_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, RegEx, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename RegEx, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_until_expr_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, RegEx, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename RegEx, typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_until_expr_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, RegEx, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename RegEx, typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_until_expr_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, RegEx, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream>
+  class initiate_async_read_until_expr_v1
+  {
+  public:
+    typedef typename AsyncReadStream::executor_type executor_type;
+
+    explicit initiate_async_read_until_expr_v1(AsyncReadStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename ReadHandler, typename DynamicBuffer_v1, typename RegEx>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v1) buffers, const RegEx& expr) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      read_until_expr_op_v1<AsyncReadStream,
+        typename decay<DynamicBuffer_v1>::type,
+          RegEx, typename decay<ReadHandler>::type>(
+            stream_, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+            expr, handler2.value)(asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncReadStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    typename RegEx, typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_until_expr_op_v1<AsyncReadStream,
+      DynamicBuffer_v1, RegEx, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_until_expr_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, RegEx, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    typename RegEx, typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_until_expr_op_v1<AsyncReadStream,
+      DynamicBuffer_v1, RegEx, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_until_expr_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, RegEx, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    const boost::regex& expr,
+    ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_until_expr_v1<AsyncReadStream>(s),
+      handler, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers), expr);
+}
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+
+namespace detail
+{
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename MatchCondition, typename ReadHandler>
+  class read_until_match_op_v1
+  {
+  public:
+    template <typename BufferSequence>
+    read_until_match_op_v1(AsyncReadStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        MatchCondition match_condition, ReadHandler& handler)
+      : stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        match_condition_(match_condition),
+        start_(0),
+        search_position_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_until_match_op_v1(const read_until_match_op_v1& other)
+      : stream_(other.stream_),
+        buffers_(other.buffers_),
+        match_condition_(other.match_condition_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_until_match_op_v1(read_until_match_op_v1&& other)
+      : stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v1)(other.buffers_)),
+        match_condition_(other.match_condition_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      const std::size_t not_found = (std::numeric_limits<std::size_t>::max)();
+      std::size_t bytes_to_read;
+      switch (start_ = start)
+      {
+      case 1:
+        for (;;)
+        {
+          {
+            // Determine the range of the data to be searched.
+            typedef typename DynamicBuffer_v1::const_buffers_type
+              buffers_type;
+            typedef buffers_iterator<buffers_type> iterator;
+            buffers_type data_buffers = buffers_.data();
+            iterator begin = iterator::begin(data_buffers);
+            iterator start_pos = begin + search_position_;
+            iterator end = iterator::end(data_buffers);
+
+            // Look for a match.
+            std::pair<iterator, bool> result = match_condition_(start_pos, end);
+            if (result.second)
+            {
+              // Full match. We're done.
+              search_position_ = result.first - begin;
+              bytes_to_read = 0;
+            }
+
+            // No match yet. Check if buffer is full.
+            else if (buffers_.size() == buffers_.max_size())
+            {
+              search_position_ = not_found;
+              bytes_to_read = 0;
+            }
+
+            // Need to read some more data.
+            else
+            {
+              if (result.first != end)
+              {
+                // Partial match. Next search needs to start from beginning of
+                // match.
+                search_position_ = result.first - begin;
+              }
+              else
+              {
+                // Next search can start with the new data.
+                search_position_ = end - begin;
+              }
+
+              bytes_to_read = std::min<std::size_t>(
+                    std::max<std::size_t>(512,
+                      buffers_.capacity() - buffers_.size()),
+                    std::min<std::size_t>(65536,
+                      buffers_.max_size() - buffers_.size()));
+            }
+          }
+
+          // Check if we're done.
+          if (!start && bytes_to_read == 0)
+            break;
+
+          // Start a new asynchronous read op_v1eration to obtain more data.
+          stream_.async_read_some(buffers_.prepare(bytes_to_read),
+              ASIO_MOVE_CAST(read_until_match_op_v1)(*this));
+          return; default:
+          buffers_.commit(bytes_transferred);
+          if (ec || bytes_transferred == 0)
+            break;
+        }
+
+        const asio::error_code result_ec =
+          (search_position_ == not_found)
+          ? error::not_found : ec;
+
+        const std::size_t result_n =
+          (ec || search_position_ == not_found)
+          ? 0 : search_position_;
+
+        handler_(result_ec, result_n);
+      }
+    }
+
+  //private:
+    AsyncReadStream& stream_;
+    DynamicBuffer_v1 buffers_;
+    MatchCondition match_condition_;
+    int start_;
+    std::size_t search_position_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename MatchCondition, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_until_match_op_v1<AsyncReadStream, DynamicBuffer_v1,
+        MatchCondition, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename MatchCondition, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_until_match_op_v1<AsyncReadStream, DynamicBuffer_v1,
+        MatchCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v1,
+      typename MatchCondition, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_until_match_op_v1<AsyncReadStream, DynamicBuffer_v1,
+        MatchCondition, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename MatchCondition,
+      typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_until_match_op_v1<AsyncReadStream, DynamicBuffer_v1,
+        MatchCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v1, typename MatchCondition,
+      typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_until_match_op_v1<AsyncReadStream, DynamicBuffer_v1,
+      MatchCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream>
+  class initiate_async_read_until_match_v1
+  {
+  public:
+    typedef typename AsyncReadStream::executor_type executor_type;
+
+    explicit initiate_async_read_until_match_v1(AsyncReadStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename ReadHandler,
+        typename DynamicBuffer_v1, typename MatchCondition>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+        MatchCondition match_condition) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      read_until_match_op_v1<AsyncReadStream,
+        typename decay<DynamicBuffer_v1>::type,
+          MatchCondition, typename decay<ReadHandler>::type>(
+            stream_, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+            match_condition, handler2.value)(asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncReadStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    typename MatchCondition, typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_until_match_op_v1<AsyncReadStream,
+      DynamicBuffer_v1, MatchCondition, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_until_match_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, MatchCondition, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    typename MatchCondition, typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_until_match_op_v1<AsyncReadStream,
+      DynamicBuffer_v1, MatchCondition, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_until_match_op_v1<AsyncReadStream,
+        DynamicBuffer_v1, MatchCondition, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream,
+    typename DynamicBuffer_v1, typename MatchCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    MatchCondition match_condition, ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_until_match_v1<AsyncReadStream>(s), handler,
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers), match_condition);
+}
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+template <typename AsyncReadStream, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    char delim, ASIO_MOVE_ARG(ReadHandler) handler)
+{
+  return async_read_until(s, basic_streambuf_ref<Allocator>(b),
+      delim, ASIO_MOVE_CAST(ReadHandler)(handler));
+}
+
+template <typename AsyncReadStream, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    ASIO_STRING_VIEW_PARAM delim,
+    ASIO_MOVE_ARG(ReadHandler) handler)
+{
+  return async_read_until(s, basic_streambuf_ref<Allocator>(b),
+      delim, ASIO_MOVE_CAST(ReadHandler)(handler));
+}
+
+#if defined(ASIO_HAS_BOOST_REGEX)
+
+template <typename AsyncReadStream, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, const boost::regex& expr,
+    ASIO_MOVE_ARG(ReadHandler) handler)
+{
+  return async_read_until(s, basic_streambuf_ref<Allocator>(b),
+      expr, ASIO_MOVE_CAST(ReadHandler)(handler));
+}
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+
+template <typename AsyncReadStream, typename Allocator, typename MatchCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    MatchCondition match_condition, ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<is_match_condition<MatchCondition>::value>::type*)
+{
+  return async_read_until(s, basic_streambuf_ref<Allocator>(b),
+      match_condition, ASIO_MOVE_CAST(ReadHandler)(handler));
+}
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+namespace detail
+{
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  class read_until_delim_op_v2
+  {
+  public:
+    template <typename BufferSequence>
+    read_until_delim_op_v2(AsyncReadStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        char delim, ReadHandler& handler)
+      : stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        delim_(delim),
+        start_(0),
+        search_position_(0),
+        bytes_to_read_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_until_delim_op_v2(const read_until_delim_op_v2& other)
+      : stream_(other.stream_),
+        buffers_(other.buffers_),
+        delim_(other.delim_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        bytes_to_read_(other.bytes_to_read_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_until_delim_op_v2(read_until_delim_op_v2&& other)
+      : stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v2)(other.buffers_)),
+        delim_(other.delim_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        bytes_to_read_(other.bytes_to_read_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      const std::size_t not_found = (std::numeric_limits<std::size_t>::max)();
+      std::size_t pos;
+      switch (start_ = start)
+      {
+      case 1:
+        for (;;)
+        {
+          {
+            // Determine the range of the data to be searched.
+            typedef typename DynamicBuffer_v2::const_buffers_type
+              buffers_type;
+            typedef buffers_iterator<buffers_type> iterator;
+            buffers_type data_buffers =
+              const_cast<const DynamicBuffer_v2&>(buffers_).data(
+                  0, buffers_.size());
+            iterator begin = iterator::begin(data_buffers);
+            iterator start_pos = begin + search_position_;
+            iterator end = iterator::end(data_buffers);
+
+            // Look for a match.
+            iterator iter = std::find(start_pos, end, delim_);
+            if (iter != end)
+            {
+              // Found a match. We're done.
+              search_position_ = iter - begin + 1;
+              bytes_to_read_ = 0;
+            }
+
+            // No match yet. Check if buffer is full.
+            else if (buffers_.size() == buffers_.max_size())
+            {
+              search_position_ = not_found;
+              bytes_to_read_ = 0;
+            }
+
+            // Need to read some more data.
+            else
+            {
+              // Next search can start with the new data.
+              search_position_ = end - begin;
+              bytes_to_read_ = std::min<std::size_t>(
+                    std::max<std::size_t>(512,
+                      buffers_.capacity() - buffers_.size()),
+                    std::min<std::size_t>(65536,
+                      buffers_.max_size() - buffers_.size()));
+            }
+          }
+
+          // Check if we're done.
+          if (!start && bytes_to_read_ == 0)
+            break;
+
+          // Start a new asynchronous read op_v2eration to obtain more data.
+          pos = buffers_.size();
+          buffers_.grow(bytes_to_read_);
+          stream_.async_read_some(buffers_.data(pos, bytes_to_read_),
+              ASIO_MOVE_CAST(read_until_delim_op_v2)(*this));
+          return; default:
+          buffers_.shrink(bytes_to_read_ - bytes_transferred);
+          if (ec || bytes_transferred == 0)
+            break;
+        }
+
+        const asio::error_code result_ec =
+          (search_position_ == not_found)
+          ? error::not_found : ec;
+
+        const std::size_t result_n =
+          (ec || search_position_ == not_found)
+          ? 0 : search_position_;
+
+        handler_(result_ec, result_n);
+      }
+    }
+
+  //private:
+    AsyncReadStream& stream_;
+    DynamicBuffer_v2 buffers_;
+    char delim_;
+    int start_;
+    std::size_t search_position_;
+    std::size_t bytes_to_read_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_until_delim_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_until_delim_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_until_delim_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_until_delim_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_until_delim_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream>
+  class initiate_async_read_until_delim_v2
+  {
+  public:
+    typedef typename AsyncReadStream::executor_type executor_type;
+
+    explicit initiate_async_read_until_delim_v2(AsyncReadStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename ReadHandler, typename DynamicBuffer_v2>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v2) buffers, char delim) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      read_until_delim_op_v2<AsyncReadStream,
+        typename decay<DynamicBuffer_v2>::type,
+          typename decay<ReadHandler>::type>(
+            stream_, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+            delim, handler2.value)(asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncReadStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_until_delim_op_v2<AsyncReadStream,
+      DynamicBuffer_v2, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_until_delim_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_until_delim_op_v2<AsyncReadStream,
+      DynamicBuffer_v2, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_until_delim_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s, DynamicBuffer_v2 buffers,
+    char delim, ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_until_delim_v2<AsyncReadStream>(s),
+      handler, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers), delim);
+}
+
+namespace detail
+{
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  class read_until_delim_string_op_v2
+  {
+  public:
+    template <typename BufferSequence>
+    read_until_delim_string_op_v2(AsyncReadStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        const std::string& delim, ReadHandler& handler)
+      : stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        delim_(delim),
+        start_(0),
+        search_position_(0),
+        bytes_to_read_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_until_delim_string_op_v2(const read_until_delim_string_op_v2& other)
+      : stream_(other.stream_),
+        buffers_(other.buffers_),
+        delim_(other.delim_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        bytes_to_read_(other.bytes_to_read_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_until_delim_string_op_v2(read_until_delim_string_op_v2&& other)
+      : stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v2)(other.buffers_)),
+        delim_(ASIO_MOVE_CAST(std::string)(other.delim_)),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        bytes_to_read_(other.bytes_to_read_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      const std::size_t not_found = (std::numeric_limits<std::size_t>::max)();
+      std::size_t pos;
+      switch (start_ = start)
+      {
+      case 1:
+        for (;;)
+        {
+          {
+            // Determine the range of the data to be searched.
+            typedef typename DynamicBuffer_v2::const_buffers_type
+              buffers_type;
+            typedef buffers_iterator<buffers_type> iterator;
+            buffers_type data_buffers =
+              const_cast<const DynamicBuffer_v2&>(buffers_).data(
+                  0, buffers_.size());
+            iterator begin = iterator::begin(data_buffers);
+            iterator start_pos = begin + search_position_;
+            iterator end = iterator::end(data_buffers);
+
+            // Look for a match.
+            std::pair<iterator, bool> result = detail::partial_search(
+                start_pos, end, delim_.begin(), delim_.end());
+            if (result.first != end && result.second)
+            {
+              // Full match. We're done.
+              search_position_ = result.first - begin + delim_.length();
+              bytes_to_read_ = 0;
+            }
+
+            // No match yet. Check if buffer is full.
+            else if (buffers_.size() == buffers_.max_size())
+            {
+              search_position_ = not_found;
+              bytes_to_read_ = 0;
+            }
+
+            // Need to read some more data.
+            else
+            {
+              if (result.first != end)
+              {
+                // Partial match. Next search needs to start from beginning of
+                // match.
+                search_position_ = result.first - begin;
+              }
+              else
+              {
+                // Next search can start with the new data.
+                search_position_ = end - begin;
+              }
+
+              bytes_to_read_ = std::min<std::size_t>(
+                    std::max<std::size_t>(512,
+                      buffers_.capacity() - buffers_.size()),
+                    std::min<std::size_t>(65536,
+                      buffers_.max_size() - buffers_.size()));
+            }
+          }
+
+          // Check if we're done.
+          if (!start && bytes_to_read_ == 0)
+            break;
+
+          // Start a new asynchronous read op_v2eration to obtain more data.
+          pos = buffers_.size();
+          buffers_.grow(bytes_to_read_);
+          stream_.async_read_some(buffers_.data(pos, bytes_to_read_),
+              ASIO_MOVE_CAST(read_until_delim_string_op_v2)(*this));
+          return; default:
+          buffers_.shrink(bytes_to_read_ - bytes_transferred);
+          if (ec || bytes_transferred == 0)
+            break;
+        }
+
+        const asio::error_code result_ec =
+          (search_position_ == not_found)
+          ? error::not_found : ec;
+
+        const std::size_t result_n =
+          (ec || search_position_ == not_found)
+          ? 0 : search_position_;
+
+        handler_(result_ec, result_n);
+      }
+    }
+
+  //private:
+    AsyncReadStream& stream_;
+    DynamicBuffer_v2 buffers_;
+    std::string delim_;
+    int start_;
+    std::size_t search_position_;
+    std::size_t bytes_to_read_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_until_delim_string_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_until_delim_string_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_until_delim_string_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_until_delim_string_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_until_delim_string_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream>
+  class initiate_async_read_until_delim_string_v2
+  {
+  public:
+    typedef typename AsyncReadStream::executor_type executor_type;
+
+    explicit initiate_async_read_until_delim_string_v2(AsyncReadStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename ReadHandler, typename DynamicBuffer_v2>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v2) buffers,
+        const std::string& delim) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      read_until_delim_string_op_v2<AsyncReadStream,
+        typename decay<DynamicBuffer_v2>::type,
+          typename decay<ReadHandler>::type>(
+            stream_, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+            delim, handler2.value)(asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncReadStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_until_delim_string_op_v2<AsyncReadStream,
+      DynamicBuffer_v2, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_until_delim_string_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_until_delim_string_op_v2<AsyncReadStream,
+      DynamicBuffer_v2, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_until_delim_string_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream,
+    typename DynamicBuffer_v2,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    DynamicBuffer_v2 buffers, ASIO_STRING_VIEW_PARAM delim,
+    ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_until_delim_string_v2<AsyncReadStream>(s),
+      handler, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+      static_cast<std::string>(delim));
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if defined(ASIO_HAS_BOOST_REGEX)
+
+namespace detail
+{
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename RegEx, typename ReadHandler>
+  class read_until_expr_op_v2
+  {
+  public:
+    template <typename BufferSequence>
+    read_until_expr_op_v2(AsyncReadStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        const boost::regex& expr, ReadHandler& handler)
+      : stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        expr_(expr),
+        start_(0),
+        search_position_(0),
+        bytes_to_read_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_until_expr_op_v2(const read_until_expr_op_v2& other)
+      : stream_(other.stream_),
+        buffers_(other.buffers_),
+        expr_(other.expr_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        bytes_to_read_(other.bytes_to_read_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_until_expr_op_v2(read_until_expr_op_v2&& other)
+      : stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v2)(other.buffers_)),
+        expr_(other.expr_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        bytes_to_read_(other.bytes_to_read_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      const std::size_t not_found = (std::numeric_limits<std::size_t>::max)();
+      std::size_t pos;
+      switch (start_ = start)
+      {
+      case 1:
+        for (;;)
+        {
+          {
+            // Determine the range of the data to be searched.
+            typedef typename DynamicBuffer_v2::const_buffers_type
+              buffers_type;
+            typedef buffers_iterator<buffers_type> iterator;
+            buffers_type data_buffers =
+              const_cast<const DynamicBuffer_v2&>(buffers_).data(
+                  0, buffers_.size());
+            iterator begin = iterator::begin(data_buffers);
+            iterator start_pos = begin + search_position_;
+            iterator end = iterator::end(data_buffers);
+
+            // Look for a match.
+            boost::match_results<iterator,
+              typename std::vector<boost::sub_match<iterator> >::allocator_type>
+                match_results;
+            bool match = regex_search(start_pos, end, match_results, expr_,
+                boost::match_default | boost::match_partial);
+            if (match && match_results[0].matched)
+            {
+              // Full match. We're done.
+              search_position_ = match_results[0].second - begin;
+              bytes_to_read_ = 0;
+            }
+
+            // No match yet. Check if buffer is full.
+            else if (buffers_.size() == buffers_.max_size())
+            {
+              search_position_ = not_found;
+              bytes_to_read_ = 0;
+            }
+
+            // Need to read some more data.
+            else
+            {
+              if (match)
+              {
+                // Partial match. Next search needs to start from beginning of
+                // match.
+                search_position_ = match_results[0].first - begin;
+              }
+              else
+              {
+                // Next search can start with the new data.
+                search_position_ = end - begin;
+              }
+
+              bytes_to_read_ = std::min<std::size_t>(
+                    std::max<std::size_t>(512,
+                      buffers_.capacity() - buffers_.size()),
+                    std::min<std::size_t>(65536,
+                      buffers_.max_size() - buffers_.size()));
+            }
+          }
+
+          // Check if we're done.
+          if (!start && bytes_to_read_ == 0)
+            break;
+
+          // Start a new asynchronous read op_v2eration to obtain more data.
+          pos = buffers_.size();
+          buffers_.grow(bytes_to_read_);
+          stream_.async_read_some(buffers_.data(pos, bytes_to_read_),
+              ASIO_MOVE_CAST(read_until_expr_op_v2)(*this));
+          return; default:
+          buffers_.shrink(bytes_to_read_ - bytes_transferred);
+          if (ec || bytes_transferred == 0)
+            break;
+        }
+
+        const asio::error_code result_ec =
+          (search_position_ == not_found)
+          ? error::not_found : ec;
+
+        const std::size_t result_n =
+          (ec || search_position_ == not_found)
+          ? 0 : search_position_;
+
+        handler_(result_ec, result_n);
+      }
+    }
+
+  //private:
+    AsyncReadStream& stream_;
+    DynamicBuffer_v2 buffers_;
+    RegEx expr_;
+    int start_;
+    std::size_t search_position_;
+    std::size_t bytes_to_read_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename RegEx, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_until_expr_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, RegEx, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename RegEx, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_until_expr_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, RegEx, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename RegEx, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_until_expr_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, RegEx, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename RegEx, typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_until_expr_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, RegEx, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename RegEx, typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_until_expr_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, RegEx, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream>
+  class initiate_async_read_until_expr_v2
+  {
+  public:
+    typedef typename AsyncReadStream::executor_type executor_type;
+
+    explicit initiate_async_read_until_expr_v2(AsyncReadStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename ReadHandler, typename DynamicBuffer_v2, typename RegEx>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v2) buffers,
+        const RegEx& expr) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      read_until_expr_op_v2<AsyncReadStream,
+        typename decay<DynamicBuffer_v2>::type,
+          RegEx, typename decay<ReadHandler>::type>(
+            stream_, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+            expr, handler2.value)(asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncReadStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    typename RegEx, typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_until_expr_op_v2<AsyncReadStream,
+      DynamicBuffer_v2, RegEx, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_until_expr_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, RegEx, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    typename RegEx, typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_until_expr_op_v2<AsyncReadStream,
+      DynamicBuffer_v2, RegEx, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_until_expr_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, RegEx, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s, DynamicBuffer_v2 buffers,
+    const boost::regex& expr, ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_until_expr_v2<AsyncReadStream>(s),
+      handler, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers), expr);
+}
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+
+namespace detail
+{
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename MatchCondition, typename ReadHandler>
+  class read_until_match_op_v2
+  {
+  public:
+    template <typename BufferSequence>
+    read_until_match_op_v2(AsyncReadStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        MatchCondition match_condition, ReadHandler& handler)
+      : stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        match_condition_(match_condition),
+        start_(0),
+        search_position_(0),
+        bytes_to_read_(0),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    read_until_match_op_v2(const read_until_match_op_v2& other)
+      : stream_(other.stream_),
+        buffers_(other.buffers_),
+        match_condition_(other.match_condition_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        bytes_to_read_(other.bytes_to_read_),
+        handler_(other.handler_)
+    {
+    }
+
+    read_until_match_op_v2(read_until_match_op_v2&& other)
+      : stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v2)(other.buffers_)),
+        match_condition_(other.match_condition_),
+        start_(other.start_),
+        search_position_(other.search_position_),
+        bytes_to_read_(other.bytes_to_read_),
+        handler_(ASIO_MOVE_CAST(ReadHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      const std::size_t not_found = (std::numeric_limits<std::size_t>::max)();
+      std::size_t pos;
+      switch (start_ = start)
+      {
+      case 1:
+        for (;;)
+        {
+          {
+            // Determine the range of the data to be searched.
+            typedef typename DynamicBuffer_v2::const_buffers_type
+              buffers_type;
+            typedef buffers_iterator<buffers_type> iterator;
+            buffers_type data_buffers =
+              const_cast<const DynamicBuffer_v2&>(buffers_).data(
+                  0, buffers_.size());
+            iterator begin = iterator::begin(data_buffers);
+            iterator start_pos = begin + search_position_;
+            iterator end = iterator::end(data_buffers);
+
+            // Look for a match.
+            std::pair<iterator, bool> result = match_condition_(start_pos, end);
+            if (result.second)
+            {
+              // Full match. We're done.
+              search_position_ = result.first - begin;
+              bytes_to_read_ = 0;
+            }
+
+            // No match yet. Check if buffer is full.
+            else if (buffers_.size() == buffers_.max_size())
+            {
+              search_position_ = not_found;
+              bytes_to_read_ = 0;
+            }
+
+            // Need to read some more data.
+            else
+            {
+              if (result.first != end)
+              {
+                // Partial match. Next search needs to start from beginning of
+                // match.
+                search_position_ = result.first - begin;
+              }
+              else
+              {
+                // Next search can start with the new data.
+                search_position_ = end - begin;
+              }
+
+              bytes_to_read_ = std::min<std::size_t>(
+                    std::max<std::size_t>(512,
+                      buffers_.capacity() - buffers_.size()),
+                    std::min<std::size_t>(65536,
+                      buffers_.max_size() - buffers_.size()));
+            }
+          }
+
+          // Check if we're done.
+          if (!start && bytes_to_read_ == 0)
+            break;
+
+          // Start a new asynchronous read op_v2eration to obtain more data.
+          pos = buffers_.size();
+          buffers_.grow(bytes_to_read_);
+          stream_.async_read_some(buffers_.data(pos, bytes_to_read_),
+              ASIO_MOVE_CAST(read_until_match_op_v2)(*this));
+          return; default:
+          buffers_.shrink(bytes_to_read_ - bytes_transferred);
+          if (ec || bytes_transferred == 0)
+            break;
+        }
+
+        const asio::error_code result_ec =
+          (search_position_ == not_found)
+          ? error::not_found : ec;
+
+        const std::size_t result_n =
+          (ec || search_position_ == not_found)
+          ? 0 : search_position_;
+
+        handler_(result_ec, result_n);
+      }
+    }
+
+  //private:
+    AsyncReadStream& stream_;
+    DynamicBuffer_v2 buffers_;
+    MatchCondition match_condition_;
+    int start_;
+    std::size_t search_position_;
+    std::size_t bytes_to_read_;
+    ReadHandler handler_;
+  };
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename MatchCondition, typename ReadHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      read_until_match_op_v2<AsyncReadStream, DynamicBuffer_v2,
+        MatchCondition, ReadHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename MatchCondition, typename ReadHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      read_until_match_op_v2<AsyncReadStream, DynamicBuffer_v2,
+        MatchCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream, typename DynamicBuffer_v2,
+      typename MatchCondition, typename ReadHandler>
+  inline bool asio_handler_is_continuation(
+      read_until_match_op_v2<AsyncReadStream, DynamicBuffer_v2,
+        MatchCondition, ReadHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename MatchCondition,
+      typename ReadHandler>
+  inline void asio_handler_invoke(Function& function,
+      read_until_match_op_v2<AsyncReadStream, DynamicBuffer_v2,
+        MatchCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncReadStream,
+      typename DynamicBuffer_v2, typename MatchCondition,
+      typename ReadHandler>
+  inline void asio_handler_invoke(const Function& function,
+      read_until_match_op_v2<AsyncReadStream, DynamicBuffer_v2,
+      MatchCondition, ReadHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncReadStream>
+  class initiate_async_read_until_match_v2
+  {
+  public:
+    typedef typename AsyncReadStream::executor_type executor_type;
+
+    explicit initiate_async_read_until_match_v2(AsyncReadStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename ReadHandler,
+        typename DynamicBuffer_v2, typename MatchCondition>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v2) buffers,
+        MatchCondition match_condition) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      non_const_lvalue<ReadHandler> handler2(handler);
+      read_until_match_op_v2<AsyncReadStream,
+        typename decay<DynamicBuffer_v2>::type,
+          MatchCondition, typename decay<ReadHandler>::type>(
+            stream_, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+            match_condition, handler2.value)(asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncReadStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    typename MatchCondition, typename ReadHandler, typename Allocator>
+struct associated_allocator<
+    detail::read_until_match_op_v2<AsyncReadStream,
+      DynamicBuffer_v2, MatchCondition, ReadHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<ReadHandler, Allocator>::type type;
+
+  static type get(
+      const detail::read_until_match_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, MatchCondition, ReadHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<ReadHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    typename MatchCondition, typename ReadHandler, typename Executor>
+struct associated_executor<
+    detail::read_until_match_op_v2<AsyncReadStream,
+      DynamicBuffer_v2, MatchCondition, ReadHandler>,
+    Executor>
+{
+  typedef typename associated_executor<ReadHandler, Executor>::type type;
+
+  static type get(
+      const detail::read_until_match_op_v2<AsyncReadStream,
+        DynamicBuffer_v2, MatchCondition, ReadHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<ReadHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncReadStream,
+    typename DynamicBuffer_v2, typename MatchCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s, DynamicBuffer_v2 buffers,
+    MatchCondition match_condition, ASIO_MOVE_ARG(ReadHandler) handler,
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  return async_initiate<ReadHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_read_until_match_v2<AsyncReadStream>(s), handler,
+      ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers), match_condition);
+}
+
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_READ_UNTIL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/redirect_error.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/redirect_error.hpp
new file mode 100644
index 00000000000..ca1e5e5235e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/redirect_error.hpp
@@ -0,0 +1,372 @@
+
+// impl/redirect_error.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_REDIRECT_ERROR_HPP
+#define ASIO_IMPL_REDIRECT_ERROR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/associated_allocator.hpp"
+#include "asio/async_result.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/detail/variadic_templates.hpp"
+#include "asio/system_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+// Class to adapt a redirect_error_t as a completion handler.
+template <typename Handler>
+class redirect_error_handler
+{
+public:
+  typedef void result_type;
+
+  template <typename CompletionToken>
+  redirect_error_handler(redirect_error_t<CompletionToken> e)
+    : ec_(e.ec_),
+      handler_(ASIO_MOVE_CAST(CompletionToken)(e.token_))
+  {
+  }
+
+  template <typename RedirectedHandler>
+  redirect_error_handler(asio::error_code& ec,
+      ASIO_MOVE_ARG(RedirectedHandler) h)
+    : ec_(ec),
+      handler_(ASIO_MOVE_CAST(RedirectedHandler)(h))
+  {
+  }
+
+  void operator()()
+  {
+    handler_();
+  }
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Arg, typename... Args>
+  typename enable_if<
+    !is_same<typename decay<Arg>::type, asio::error_code>::value
+  >::type
+  operator()(ASIO_MOVE_ARG(Arg) arg, ASIO_MOVE_ARG(Args)... args)
+  {
+    handler_(ASIO_MOVE_CAST(Arg)(arg),
+        ASIO_MOVE_CAST(Args)(args)...);
+  }
+
+  template <typename... Args>
+  void operator()(const asio::error_code& ec,
+      ASIO_MOVE_ARG(Args)... args)
+  {
+    ec_ = ec;
+    handler_(ASIO_MOVE_CAST(Args)(args)...);
+  }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Arg>
+  typename enable_if<
+    !is_same<typename decay<Arg>::type, asio::error_code>::value
+  >::type
+  operator()(ASIO_MOVE_ARG(Arg) arg)
+  {
+    handler_(ASIO_MOVE_CAST(Arg)(arg));
+  }
+
+  void operator()(const asio::error_code& ec)
+  {
+    ec_ = ec;
+    handler_();
+  }
+
+#define ASIO_PRIVATE_REDIRECT_ERROR_DEF(n) \
+  template <typename Arg, ASIO_VARIADIC_TPARAMS(n)> \
+  typename enable_if< \
+    !is_same<typename decay<Arg>::type, asio::error_code>::value \
+  >::type \
+  operator()(ASIO_MOVE_ARG(Arg) arg, ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    handler_(ASIO_MOVE_CAST(Arg)(arg), \
+        ASIO_VARIADIC_MOVE_ARGS(n)); \
+  } \
+  \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  void operator()(const asio::error_code& ec, \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    ec_ = ec; \
+    handler_(ASIO_VARIADIC_MOVE_ARGS(n)); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_REDIRECT_ERROR_DEF)
+#undef ASIO_PRIVATE_REDIRECT_ERROR_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+//private:
+  asio::error_code& ec_;
+  Handler handler_;
+};
+
+template <typename Handler>
+inline void* asio_handler_allocate(std::size_t size,
+    redirect_error_handler<Handler>* this_handler)
+{
+  return asio_handler_alloc_helpers::allocate(
+      size, this_handler->handler_);
+}
+
+template <typename Handler>
+inline void asio_handler_deallocate(void* pointer, std::size_t size,
+    redirect_error_handler<Handler>* this_handler)
+{
+  asio_handler_alloc_helpers::deallocate(
+      pointer, size, this_handler->handler_);
+}
+
+template <typename Handler>
+inline bool asio_handler_is_continuation(
+    redirect_error_handler<Handler>* this_handler)
+{
+  return asio_handler_cont_helpers::is_continuation(
+        this_handler->handler_);
+}
+
+template <typename Function, typename Handler>
+inline void asio_handler_invoke(Function& function,
+    redirect_error_handler<Handler>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Function, typename Handler>
+inline void asio_handler_invoke(const Function& function,
+    redirect_error_handler<Handler>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Signature>
+struct redirect_error_signature
+{
+  typedef Signature type;
+};
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename R, typename... Args>
+struct redirect_error_signature<R(asio::error_code, Args...)>
+{
+  typedef R type(Args...);
+};
+
+template <typename R, typename... Args>
+struct redirect_error_signature<R(const asio::error_code&, Args...)>
+{
+  typedef R type(Args...);
+};
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename R>
+struct redirect_error_signature<R(asio::error_code)>
+{
+  typedef R type();
+};
+
+template <typename R>
+struct redirect_error_signature<R(const asio::error_code&)>
+{
+  typedef R type();
+};
+
+#define ASIO_PRIVATE_REDIRECT_ERROR_DEF(n) \
+  template <typename R, ASIO_VARIADIC_TPARAMS(n)> \
+  struct redirect_error_signature< \
+      R(asio::error_code, ASIO_VARIADIC_TARGS(n))> \
+  { \
+    typedef R type(ASIO_VARIADIC_TARGS(n)); \
+  }; \
+  \
+  template <typename R, ASIO_VARIADIC_TPARAMS(n)> \
+  struct redirect_error_signature< \
+      R(const asio::error_code&, ASIO_VARIADIC_TARGS(n))> \
+  { \
+    typedef R type(ASIO_VARIADIC_TARGS(n)); \
+  }; \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_REDIRECT_ERROR_DEF)
+#undef ASIO_PRIVATE_REDIRECT_ERROR_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename CompletionToken, typename Signature>
+struct async_result<redirect_error_t<CompletionToken>, Signature>
+{
+  typedef typename async_result<CompletionToken,
+    typename detail::redirect_error_signature<Signature>::type>
+      ::return_type return_type;
+
+  template <typename Initiation>
+  struct init_wrapper
+  {
+    template <typename Init>
+    init_wrapper(asio::error_code& ec, ASIO_MOVE_ARG(Init) init)
+      : ec_(ec),
+        initiation_(ASIO_MOVE_CAST(Init)(init))
+    {
+    }
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+    template <typename Handler, typename... Args>
+    void operator()(
+        ASIO_MOVE_ARG(Handler) handler,
+        ASIO_MOVE_ARG(Args)... args)
+    {
+      ASIO_MOVE_CAST(Initiation)(initiation_)(
+          detail::redirect_error_handler<
+            typename decay<Handler>::type>(
+              ec_, ASIO_MOVE_CAST(Handler)(handler)),
+          ASIO_MOVE_CAST(Args)(args)...);
+    }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+    template <typename Handler>
+    void operator()(
+        ASIO_MOVE_ARG(Handler) handler)
+    {
+      ASIO_MOVE_CAST(Initiation)(initiation_)(
+          detail::redirect_error_handler<
+            typename decay<Handler>::type>(
+              ec_, ASIO_MOVE_CAST(Handler)(handler)));
+    }
+
+#define ASIO_PRIVATE_INIT_WRAPPER_DEF(n) \
+    template <typename Handler, ASIO_VARIADIC_TPARAMS(n)> \
+    void operator()( \
+        ASIO_MOVE_ARG(Handler) handler, \
+        ASIO_VARIADIC_MOVE_PARAMS(n)) \
+    { \
+      ASIO_MOVE_CAST(Initiation)(initiation_)( \
+          detail::redirect_error_handler< \
+            typename decay<Handler>::type>( \
+              ec_, ASIO_MOVE_CAST(Handler)(handler)), \
+          ASIO_VARIADIC_MOVE_ARGS(n)); \
+    } \
+    /**/
+    ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_INIT_WRAPPER_DEF)
+#undef ASIO_PRIVATE_INIT_WRAPPER_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+    asio::error_code& ec_;
+    Initiation initiation_;
+  };
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Initiation, typename RawCompletionToken, typename... Args>
+  static return_type initiate(
+      ASIO_MOVE_ARG(Initiation) initiation,
+      ASIO_MOVE_ARG(RawCompletionToken) token,
+      ASIO_MOVE_ARG(Args)... args)
+  {
+    return async_initiate<CompletionToken,
+      typename detail::redirect_error_signature<Signature>::type>(
+        init_wrapper<typename decay<Initiation>::type>(
+          token.ec_, ASIO_MOVE_CAST(Initiation)(initiation)),
+        token.token_, ASIO_MOVE_CAST(Args)(args)...);
+  }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename Initiation, typename RawCompletionToken>
+  static return_type initiate(
+      ASIO_MOVE_ARG(Initiation) initiation,
+      ASIO_MOVE_ARG(RawCompletionToken) token)
+  {
+    return async_initiate<CompletionToken,
+      typename detail::redirect_error_signature<Signature>::type>(
+        init_wrapper<typename decay<Initiation>::type>(
+          token.ec_, ASIO_MOVE_CAST(Initiation)(initiation)),
+        token.token_);
+  }
+
+#define ASIO_PRIVATE_INITIATE_DEF(n) \
+  template <typename Initiation, typename RawCompletionToken, \
+      ASIO_VARIADIC_TPARAMS(n)> \
+  static return_type initiate( \
+      ASIO_MOVE_ARG(Initiation) initiation, \
+      ASIO_MOVE_ARG(RawCompletionToken) token, \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    return async_initiate<CompletionToken, \
+      typename detail::redirect_error_signature<Signature>::type>( \
+        init_wrapper<typename decay<Initiation>::type>( \
+          token.ec_, ASIO_MOVE_CAST(Initiation)(initiation)), \
+        token.token_, ASIO_VARIADIC_MOVE_ARGS(n)); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_INITIATE_DEF)
+#undef ASIO_PRIVATE_INITIATE_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+};
+
+template <typename Handler, typename Executor>
+struct associated_executor<detail::redirect_error_handler<Handler>, Executor>
+{
+  typedef typename associated_executor<Handler, Executor>::type type;
+
+  static type get(
+      const detail::redirect_error_handler<Handler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<Handler, Executor>::get(h.handler_, ex);
+  }
+};
+
+template <typename Handler, typename Allocator>
+struct associated_allocator<detail::redirect_error_handler<Handler>, Allocator>
+{
+  typedef typename associated_allocator<Handler, Allocator>::type type;
+
+  static type get(
+      const detail::redirect_error_handler<Handler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<Handler, Allocator>::get(h.handler_, a);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_REDIRECT_ERROR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/serial_port_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/serial_port_base.hpp
new file mode 100644
index 00000000000..d34dd5b1a94
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/serial_port_base.hpp
@@ -0,0 +1,59 @@
+//
+// impl/serial_port_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2008 Rep Invariant Systems, Inc. (info@repinvariant.com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_SERIAL_PORT_BASE_HPP
+#define ASIO_IMPL_SERIAL_PORT_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+inline serial_port_base::baud_rate::baud_rate(unsigned int rate)
+  : value_(rate)
+{
+}
+
+inline unsigned int serial_port_base::baud_rate::value() const
+{
+  return value_;
+}
+
+inline serial_port_base::flow_control::type
+serial_port_base::flow_control::value() const
+{
+  return value_;
+}
+
+inline serial_port_base::parity::type serial_port_base::parity::value() const
+{
+  return value_;
+}
+
+inline serial_port_base::stop_bits::type
+serial_port_base::stop_bits::value() const
+{
+  return value_;
+}
+
+inline unsigned int serial_port_base::character_size::value() const
+{
+  return value_;
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_SERIAL_PORT_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/spawn.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/spawn.hpp
new file mode 100644
index 00000000000..5235d3ff519
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/spawn.hpp
@@ -0,0 +1,490 @@
+//
+// impl/spawn.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_SPAWN_HPP
+#define ASIO_IMPL_SPAWN_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/async_result.hpp"
+#include "asio/bind_executor.hpp"
+#include "asio/detail/atomic_count.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/system_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+  template <typename Handler, typename T>
+  class coro_handler
+  {
+  public:
+    coro_handler(basic_yield_context<Handler> ctx)
+      : coro_(ctx.coro_.lock()),
+        ca_(ctx.ca_),
+        handler_(ctx.handler_),
+        ready_(0),
+        ec_(ctx.ec_),
+        value_(0)
+    {
+    }
+
+    void operator()(T value)
+    {
+      *ec_ = asio::error_code();
+      *value_ = ASIO_MOVE_CAST(T)(value);
+      if (--*ready_ == 0)
+        (*coro_)();
+    }
+
+    void operator()(asio::error_code ec, T value)
+    {
+      *ec_ = ec;
+      *value_ = ASIO_MOVE_CAST(T)(value);
+      if (--*ready_ == 0)
+        (*coro_)();
+    }
+
+  //private:
+    shared_ptr<typename basic_yield_context<Handler>::callee_type> coro_;
+    typename basic_yield_context<Handler>::caller_type& ca_;
+    Handler handler_;
+    atomic_count* ready_;
+    asio::error_code* ec_;
+    T* value_;
+  };
+
+  template <typename Handler>
+  class coro_handler<Handler, void>
+  {
+  public:
+    coro_handler(basic_yield_context<Handler> ctx)
+      : coro_(ctx.coro_.lock()),
+        ca_(ctx.ca_),
+        handler_(ctx.handler_),
+        ready_(0),
+        ec_(ctx.ec_)
+    {
+    }
+
+    void operator()()
+    {
+      *ec_ = asio::error_code();
+      if (--*ready_ == 0)
+        (*coro_)();
+    }
+
+    void operator()(asio::error_code ec)
+    {
+      *ec_ = ec;
+      if (--*ready_ == 0)
+        (*coro_)();
+    }
+
+  //private:
+    shared_ptr<typename basic_yield_context<Handler>::callee_type> coro_;
+    typename basic_yield_context<Handler>::caller_type& ca_;
+    Handler handler_;
+    atomic_count* ready_;
+    asio::error_code* ec_;
+  };
+
+  template <typename Handler, typename T>
+  inline void* asio_handler_allocate(std::size_t size,
+      coro_handler<Handler, T>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename Handler, typename T>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      coro_handler<Handler, T>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename Handler, typename T>
+  inline bool asio_handler_is_continuation(coro_handler<Handler, T>*)
+  {
+    return true;
+  }
+
+  template <typename Function, typename Handler, typename T>
+  inline void asio_handler_invoke(Function& function,
+      coro_handler<Handler, T>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename Handler, typename T>
+  inline void asio_handler_invoke(const Function& function,
+      coro_handler<Handler, T>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Handler, typename T>
+  class coro_async_result
+  {
+  public:
+    typedef coro_handler<Handler, T> completion_handler_type;
+    typedef T return_type;
+
+    explicit coro_async_result(completion_handler_type& h)
+      : handler_(h),
+        ca_(h.ca_),
+        ready_(2)
+    {
+      h.ready_ = &ready_;
+      out_ec_ = h.ec_;
+      if (!out_ec_) h.ec_ = &ec_;
+      h.value_ = &value_;
+    }
+
+    return_type get()
+    {
+      // Must not hold shared_ptr to coro while suspended.
+      handler_.coro_.reset();
+
+      if (--ready_ != 0)
+        ca_();
+      if (!out_ec_ && ec_) throw asio::system_error(ec_);
+      return ASIO_MOVE_CAST(return_type)(value_);
+    }
+
+  private:
+    completion_handler_type& handler_;
+    typename basic_yield_context<Handler>::caller_type& ca_;
+    atomic_count ready_;
+    asio::error_code* out_ec_;
+    asio::error_code ec_;
+    return_type value_;
+  };
+
+  template <typename Handler>
+  class coro_async_result<Handler, void>
+  {
+  public:
+    typedef coro_handler<Handler, void> completion_handler_type;
+    typedef void return_type;
+
+    explicit coro_async_result(completion_handler_type& h)
+      : handler_(h),
+        ca_(h.ca_),
+        ready_(2)
+    {
+      h.ready_ = &ready_;
+      out_ec_ = h.ec_;
+      if (!out_ec_) h.ec_ = &ec_;
+    }
+
+    void get()
+    {
+      // Must not hold shared_ptr to coro while suspended.
+      handler_.coro_.reset();
+
+      if (--ready_ != 0)
+        ca_();
+      if (!out_ec_ && ec_) throw asio::system_error(ec_);
+    }
+
+  private:
+    completion_handler_type& handler_;
+    typename basic_yield_context<Handler>::caller_type& ca_;
+    atomic_count ready_;
+    asio::error_code* out_ec_;
+    asio::error_code ec_;
+  };
+
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename Handler, typename ReturnType>
+class async_result<basic_yield_context<Handler>, ReturnType()>
+  : public detail::coro_async_result<Handler, void>
+{
+public:
+  explicit async_result(
+    typename detail::coro_async_result<Handler,
+      void>::completion_handler_type& h)
+    : detail::coro_async_result<Handler, void>(h)
+  {
+  }
+};
+
+template <typename Handler, typename ReturnType, typename Arg1>
+class async_result<basic_yield_context<Handler>, ReturnType(Arg1)>
+  : public detail::coro_async_result<Handler, typename decay<Arg1>::type>
+{
+public:
+  explicit async_result(
+    typename detail::coro_async_result<Handler,
+      typename decay<Arg1>::type>::completion_handler_type& h)
+    : detail::coro_async_result<Handler, typename decay<Arg1>::type>(h)
+  {
+  }
+};
+
+template <typename Handler, typename ReturnType>
+class async_result<basic_yield_context<Handler>,
+    ReturnType(asio::error_code)>
+  : public detail::coro_async_result<Handler, void>
+{
+public:
+  explicit async_result(
+    typename detail::coro_async_result<Handler,
+      void>::completion_handler_type& h)
+    : detail::coro_async_result<Handler, void>(h)
+  {
+  }
+};
+
+template <typename Handler, typename ReturnType, typename Arg2>
+class async_result<basic_yield_context<Handler>,
+    ReturnType(asio::error_code, Arg2)>
+  : public detail::coro_async_result<Handler, typename decay<Arg2>::type>
+{
+public:
+  explicit async_result(
+    typename detail::coro_async_result<Handler,
+      typename decay<Arg2>::type>::completion_handler_type& h)
+    : detail::coro_async_result<Handler, typename decay<Arg2>::type>(h)
+  {
+  }
+};
+
+template <typename Handler, typename T, typename Allocator>
+struct associated_allocator<detail::coro_handler<Handler, T>, Allocator>
+{
+  typedef typename associated_allocator<Handler, Allocator>::type type;
+
+  static type get(const detail::coro_handler<Handler, T>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<Handler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename Handler, typename T, typename Executor>
+struct associated_executor<detail::coro_handler<Handler, T>, Executor>
+{
+  typedef typename associated_executor<Handler, Executor>::type type;
+
+  static type get(const detail::coro_handler<Handler, T>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<Handler, Executor>::get(h.handler_, ex);
+  }
+};
+
+namespace detail {
+
+  template <typename Handler, typename Function>
+  struct spawn_data : private noncopyable
+  {
+    template <typename Hand, typename Func>
+    spawn_data(ASIO_MOVE_ARG(Hand) handler,
+        bool call_handler, ASIO_MOVE_ARG(Func) function)
+      : handler_(ASIO_MOVE_CAST(Hand)(handler)),
+        call_handler_(call_handler),
+        function_(ASIO_MOVE_CAST(Func)(function))
+    {
+    }
+
+    weak_ptr<typename basic_yield_context<Handler>::callee_type> coro_;
+    Handler handler_;
+    bool call_handler_;
+    Function function_;
+  };
+
+  template <typename Handler, typename Function>
+  struct coro_entry_point
+  {
+    void operator()(typename basic_yield_context<Handler>::caller_type& ca)
+    {
+      shared_ptr<spawn_data<Handler, Function> > data(data_);
+#if !defined(BOOST_COROUTINES_UNIDIRECT) && !defined(BOOST_COROUTINES_V2)
+      ca(); // Yield until coroutine pointer has been initialised.
+#endif // !defined(BOOST_COROUTINES_UNIDIRECT) && !defined(BOOST_COROUTINES_V2)
+      const basic_yield_context<Handler> yield(
+          data->coro_, ca, data->handler_);
+
+      (data->function_)(yield);
+      if (data->call_handler_)
+        (data->handler_)();
+    }
+
+    shared_ptr<spawn_data<Handler, Function> > data_;
+  };
+
+  template <typename Handler, typename Function>
+  struct spawn_helper
+  {
+    void operator()()
+    {
+      typedef typename basic_yield_context<Handler>::callee_type callee_type;
+      coro_entry_point<Handler, Function> entry_point = { data_ };
+      shared_ptr<callee_type> coro(new callee_type(entry_point, attributes_));
+      data_->coro_ = coro;
+      (*coro)();
+    }
+
+    shared_ptr<spawn_data<Handler, Function> > data_;
+    boost::coroutines::attributes attributes_;
+  };
+
+  template <typename Function, typename Handler, typename Function1>
+  inline void asio_handler_invoke(Function& function,
+      spawn_helper<Handler, Function1>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->data_->handler_);
+  }
+
+  template <typename Function, typename Handler, typename Function1>
+  inline void asio_handler_invoke(const Function& function,
+      spawn_helper<Handler, Function1>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->data_->handler_);
+  }
+
+  inline void default_spawn_handler() {}
+
+} // namespace detail
+
+template <typename Function>
+inline void spawn(ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes)
+{
+  typedef typename decay<Function>::type function_type;
+
+  typename associated_executor<function_type>::type ex(
+      (get_associated_executor)(function));
+
+  asio::spawn(ex, ASIO_MOVE_CAST(Function)(function), attributes);
+}
+
+template <typename Handler, typename Function>
+void spawn(ASIO_MOVE_ARG(Handler) handler,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes,
+    typename enable_if<!is_executor<typename decay<Handler>::type>::value &&
+      !is_convertible<Handler&, execution_context&>::value>::type*)
+{
+  typedef typename decay<Handler>::type handler_type;
+  typedef typename decay<Function>::type function_type;
+
+  typename associated_executor<handler_type>::type ex(
+      (get_associated_executor)(handler));
+
+  typename associated_allocator<handler_type>::type a(
+      (get_associated_allocator)(handler));
+
+  detail::spawn_helper<handler_type, function_type> helper;
+  helper.data_.reset(
+      new detail::spawn_data<handler_type, function_type>(
+        ASIO_MOVE_CAST(Handler)(handler), true,
+        ASIO_MOVE_CAST(Function)(function)));
+  helper.attributes_ = attributes;
+
+  ex.dispatch(helper, a);
+}
+
+template <typename Handler, typename Function>
+void spawn(basic_yield_context<Handler> ctx,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes)
+{
+  typedef typename decay<Function>::type function_type;
+
+  Handler handler(ctx.handler_); // Explicit copy that might be moved from.
+
+  typename associated_executor<Handler>::type ex(
+      (get_associated_executor)(handler));
+
+  typename associated_allocator<Handler>::type a(
+      (get_associated_allocator)(handler));
+
+  detail::spawn_helper<Handler, function_type> helper;
+  helper.data_.reset(
+      new detail::spawn_data<Handler, function_type>(
+        ASIO_MOVE_CAST(Handler)(handler), false,
+        ASIO_MOVE_CAST(Function)(function)));
+  helper.attributes_ = attributes;
+
+  ex.dispatch(helper, a);
+}
+
+template <typename Function, typename Executor>
+inline void spawn(const Executor& ex,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes,
+    typename enable_if<is_executor<Executor>::value>::type*)
+{
+  asio::spawn(asio::strand<Executor>(ex),
+      ASIO_MOVE_CAST(Function)(function), attributes);
+}
+
+template <typename Function, typename Executor>
+inline void spawn(const strand<Executor>& ex,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes)
+{
+  asio::spawn(asio::bind_executor(
+        ex, &detail::default_spawn_handler),
+      ASIO_MOVE_CAST(Function)(function), attributes);
+}
+
+template <typename Function>
+inline void spawn(const asio::io_context::strand& s,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes)
+{
+  asio::spawn(asio::bind_executor(
+        s, &detail::default_spawn_handler),
+      ASIO_MOVE_CAST(Function)(function), attributes);
+}
+
+template <typename Function, typename ExecutionContext>
+inline void spawn(ExecutionContext& ctx,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes,
+    typename enable_if<is_convertible<
+      ExecutionContext&, execution_context&>::value>::type*)
+{
+  asio::spawn(ctx.get_executor(),
+      ASIO_MOVE_CAST(Function)(function), attributes);
+}
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_SPAWN_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/src.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/src.hpp
new file mode 100644
index 00000000000..a1ee55d67bb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/src.hpp
@@ -0,0 +1,82 @@
+//
+// impl/src.hpp
+// ~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_SRC_HPP
+#define ASIO_IMPL_SRC_HPP
+
+#define ASIO_SOURCE
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# error Do not compile Asio library source with ASIO_HEADER_ONLY defined
+#endif
+
+#include "asio/impl/error.ipp"
+#include "asio/impl/error_code.ipp"
+#include "asio/impl/execution_context.ipp"
+#include "asio/impl/executor.ipp"
+#include "asio/impl/handler_alloc_hook.ipp"
+#include "asio/impl/io_context.ipp"
+#include "asio/impl/serial_port_base.ipp"
+#include "asio/impl/system_context.ipp"
+#include "asio/impl/thread_pool.ipp"
+#include "asio/detail/impl/buffer_sequence_adapter.ipp"
+#include "asio/detail/impl/descriptor_ops.ipp"
+#include "asio/detail/impl/dev_poll_reactor.ipp"
+#include "asio/detail/impl/epoll_reactor.ipp"
+#include "asio/detail/impl/eventfd_select_interrupter.ipp"
+#include "asio/detail/impl/handler_tracking.ipp"
+#include "asio/detail/impl/kqueue_reactor.ipp"
+#include "asio/detail/impl/null_event.ipp"
+#include "asio/detail/impl/pipe_select_interrupter.ipp"
+#include "asio/detail/impl/posix_event.ipp"
+#include "asio/detail/impl/posix_mutex.ipp"
+#include "asio/detail/impl/posix_thread.ipp"
+#include "asio/detail/impl/posix_tss_ptr.ipp"
+#include "asio/detail/impl/reactive_descriptor_service.ipp"
+#include "asio/detail/impl/reactive_serial_port_service.ipp"
+#include "asio/detail/impl/reactive_socket_service_base.ipp"
+#include "asio/detail/impl/resolver_service_base.ipp"
+#include "asio/detail/impl/scheduler.ipp"
+#include "asio/detail/impl/select_reactor.ipp"
+#include "asio/detail/impl/service_registry.ipp"
+#include "asio/detail/impl/signal_set_service.ipp"
+#include "asio/detail/impl/socket_ops.ipp"
+#include "asio/detail/impl/socket_select_interrupter.ipp"
+#include "asio/detail/impl/strand_executor_service.ipp"
+#include "asio/detail/impl/strand_service.ipp"
+#include "asio/detail/impl/throw_error.ipp"
+#include "asio/detail/impl/timer_queue_ptime.ipp"
+#include "asio/detail/impl/timer_queue_set.ipp"
+#include "asio/detail/impl/win_iocp_handle_service.ipp"
+#include "asio/detail/impl/win_iocp_io_context.ipp"
+#include "asio/detail/impl/win_iocp_serial_port_service.ipp"
+#include "asio/detail/impl/win_iocp_socket_service_base.ipp"
+#include "asio/detail/impl/win_event.ipp"
+#include "asio/detail/impl/win_mutex.ipp"
+#include "asio/detail/impl/win_object_handle_service.ipp"
+#include "asio/detail/impl/win_static_mutex.ipp"
+#include "asio/detail/impl/win_thread.ipp"
+#include "asio/detail/impl/win_tss_ptr.ipp"
+#include "asio/detail/impl/winrt_ssocket_service_base.ipp"
+#include "asio/detail/impl/winrt_timer_scheduler.ipp"
+#include "asio/detail/impl/winsock_init.ipp"
+#include "asio/generic/detail/impl/endpoint.ipp"
+#include "asio/ip/impl/address.ipp"
+#include "asio/ip/impl/address_v4.ipp"
+#include "asio/ip/impl/address_v6.ipp"
+#include "asio/ip/impl/host_name.ipp"
+#include "asio/ip/impl/network_v4.ipp"
+#include "asio/ip/impl/network_v6.ipp"
+#include "asio/ip/detail/impl/endpoint.ipp"
+#include "asio/local/detail/impl/endpoint.ipp"
+
+#endif // ASIO_IMPL_SRC_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/system_context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/system_context.hpp
new file mode 100644
index 00000000000..daffd555bd4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/system_context.hpp
@@ -0,0 +1,34 @@
+//
+// impl/system_context.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_SYSTEM_CONTEXT_HPP
+#define ASIO_IMPL_SYSTEM_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/system_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+inline system_context::executor_type
+system_context::get_executor() ASIO_NOEXCEPT
+{
+  return system_executor();
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_SYSTEM_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/system_executor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/system_executor.hpp
new file mode 100644
index 00000000000..d7dc2c80d77
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/system_executor.hpp
@@ -0,0 +1,85 @@
+//
+// impl/system_executor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_SYSTEM_EXECUTOR_HPP
+#define ASIO_IMPL_SYSTEM_EXECUTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/executor_op.hpp"
+#include "asio/detail/global.hpp"
+#include "asio/detail/recycling_allocator.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/system_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+inline system_context& system_executor::context() const ASIO_NOEXCEPT
+{
+  return detail::global<system_context>();
+}
+
+template <typename Function, typename Allocator>
+void system_executor::dispatch(
+    ASIO_MOVE_ARG(Function) f, const Allocator&) const
+{
+  typename decay<Function>::type tmp(ASIO_MOVE_CAST(Function)(f));
+  asio_handler_invoke_helpers::invoke(tmp, tmp);
+}
+
+template <typename Function, typename Allocator>
+void system_executor::post(
+    ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+{
+  typedef typename decay<Function>::type function_type;
+
+  system_context& ctx = detail::global<system_context>();
+
+  // Allocate and construct an operation to wrap the function.
+  typedef detail::executor_op<function_type, Allocator> op;
+  typename op::ptr p = { detail::addressof(a), op::ptr::allocate(a), 0 };
+  p.p = new (p.v) op(ASIO_MOVE_CAST(Function)(f), a);
+
+  ASIO_HANDLER_CREATION((ctx, *p.p,
+        "system_executor", &this->context(), 0, "post"));
+
+  ctx.scheduler_.post_immediate_completion(p.p, false);
+  p.v = p.p = 0;
+}
+
+template <typename Function, typename Allocator>
+void system_executor::defer(
+    ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+{
+  typedef typename decay<Function>::type function_type;
+
+  system_context& ctx = detail::global<system_context>();
+
+  // Allocate and construct an operation to wrap the function.
+  typedef detail::executor_op<function_type, Allocator> op;
+  typename op::ptr p = { detail::addressof(a), op::ptr::allocate(a), 0 };
+  p.p = new (p.v) op(ASIO_MOVE_CAST(Function)(f), a);
+
+  ASIO_HANDLER_CREATION((ctx, *p.p,
+        "system_executor", &this->context(), 0, "defer"));
+
+  ctx.scheduler_.post_immediate_completion(p.p, true);
+  p.v = p.p = 0;
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_SYSTEM_EXECUTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/thread_pool.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/thread_pool.hpp
new file mode 100644
index 00000000000..033cb76c65a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/thread_pool.hpp
@@ -0,0 +1,127 @@
+//
+// impl/thread_pool.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_THREAD_POOL_HPP
+#define ASIO_IMPL_THREAD_POOL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/executor_op.hpp"
+#include "asio/detail/fenced_block.hpp"
+#include "asio/detail/recycling_allocator.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/execution_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+inline thread_pool::executor_type
+thread_pool::get_executor() ASIO_NOEXCEPT
+{
+  return executor_type(*this);
+}
+
+inline thread_pool&
+thread_pool::executor_type::context() const ASIO_NOEXCEPT
+{
+  return pool_;
+}
+
+inline void
+thread_pool::executor_type::on_work_started() const ASIO_NOEXCEPT
+{
+  pool_.scheduler_.work_started();
+}
+
+inline void thread_pool::executor_type::on_work_finished()
+const ASIO_NOEXCEPT
+{
+  pool_.scheduler_.work_finished();
+}
+
+template <typename Function, typename Allocator>
+void thread_pool::executor_type::dispatch(
+    ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+{
+  typedef typename decay<Function>::type function_type;
+
+  // Invoke immediately if we are already inside the thread pool.
+  if (pool_.scheduler_.can_dispatch())
+  {
+    // Make a local, non-const copy of the function.
+    function_type tmp(ASIO_MOVE_CAST(Function)(f));
+
+    detail::fenced_block b(detail::fenced_block::full);
+    asio_handler_invoke_helpers::invoke(tmp, tmp);
+    return;
+  }
+
+  // Allocate and construct an operation to wrap the function.
+  typedef detail::executor_op<function_type, Allocator> op;
+  typename op::ptr p = { detail::addressof(a), op::ptr::allocate(a), 0 };
+  p.p = new (p.v) op(ASIO_MOVE_CAST(Function)(f), a);
+
+  ASIO_HANDLER_CREATION((pool_, *p.p,
+        "thread_pool", &this->context(), 0, "dispatch"));
+
+  pool_.scheduler_.post_immediate_completion(p.p, false);
+  p.v = p.p = 0;
+}
+
+template <typename Function, typename Allocator>
+void thread_pool::executor_type::post(
+    ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+{
+  typedef typename decay<Function>::type function_type;
+
+  // Allocate and construct an operation to wrap the function.
+  typedef detail::executor_op<function_type, Allocator> op;
+  typename op::ptr p = { detail::addressof(a), op::ptr::allocate(a), 0 };
+  p.p = new (p.v) op(ASIO_MOVE_CAST(Function)(f), a);
+
+  ASIO_HANDLER_CREATION((pool_, *p.p,
+        "thread_pool", &this->context(), 0, "post"));
+
+  pool_.scheduler_.post_immediate_completion(p.p, false);
+  p.v = p.p = 0;
+}
+
+template <typename Function, typename Allocator>
+void thread_pool::executor_type::defer(
+    ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+{
+  typedef typename decay<Function>::type function_type;
+
+  // Allocate and construct an operation to wrap the function.
+  typedef detail::executor_op<function_type, Allocator> op;
+  typename op::ptr p = { detail::addressof(a), op::ptr::allocate(a), 0 };
+  p.p = new (p.v) op(ASIO_MOVE_CAST(Function)(f), a);
+
+  ASIO_HANDLER_CREATION((pool_, *p.p,
+        "thread_pool", &this->context(), 0, "defer"));
+
+  pool_.scheduler_.post_immediate_completion(p.p, true);
+  p.v = p.p = 0;
+}
+
+inline bool
+thread_pool::executor_type::running_in_this_thread() const ASIO_NOEXCEPT
+{
+  return pool_.scheduler_.can_dispatch();
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_THREAD_POOL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/use_awaitable.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/use_awaitable.hpp
new file mode 100644
index 00000000000..c607d10c588
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/use_awaitable.hpp
@@ -0,0 +1,276 @@
+//
+// impl/use_awaitable.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_USE_AWAITABLE_HPP
+#define ASIO_IMPL_USE_AWAITABLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/async_result.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Executor, typename T>
+class awaitable_handler_base
+  : public awaitable_thread<Executor>
+{
+public:
+  typedef void result_type;
+  typedef awaitable<T, Executor> awaitable_type;
+
+  // Construct from the entry point of a new thread of execution.
+  awaitable_handler_base(awaitable<void, Executor> a, const Executor& ex)
+    : awaitable_thread<Executor>(std::move(a), ex)
+  {
+  }
+
+  // Transfer ownership from another awaitable_thread.
+  explicit awaitable_handler_base(awaitable_thread<Executor>* h)
+    : awaitable_thread<Executor>(std::move(*h))
+  {
+  }
+
+protected:
+  awaitable_frame<T, Executor>* frame() noexcept
+  {
+    return static_cast<awaitable_frame<T, Executor>*>(this->top_of_stack_);
+  }
+};
+
+template <typename, typename...>
+class awaitable_handler;
+
+template <typename Executor>
+class awaitable_handler<Executor, void>
+  : public awaitable_handler_base<Executor, void>
+{
+public:
+  using awaitable_handler_base<Executor, void>::awaitable_handler_base;
+
+  void operator()()
+  {
+    this->frame()->attach_thread(this);
+    this->frame()->return_void();
+    this->frame()->pop_frame();
+    this->pump();
+  }
+};
+
+template <typename Executor>
+class awaitable_handler<Executor, asio::error_code>
+  : public awaitable_handler_base<Executor, void>
+{
+public:
+  using awaitable_handler_base<Executor, void>::awaitable_handler_base;
+
+  void operator()(const asio::error_code& ec)
+  {
+    this->frame()->attach_thread(this);
+    if (ec)
+      this->frame()->set_error(ec);
+    else
+      this->frame()->return_void();
+    this->frame()->pop_frame();
+    this->pump();
+  }
+};
+
+template <typename Executor>
+class awaitable_handler<Executor, std::exception_ptr>
+  : public awaitable_handler_base<Executor, void>
+{
+public:
+  using awaitable_handler_base<Executor, void>::awaitable_handler_base;
+
+  void operator()(std::exception_ptr ex)
+  {
+    this->frame()->attach_thread(this);
+    if (ex)
+      this->frame()->set_except(ex);
+    else
+      this->frame()->return_void();
+    this->frame()->pop_frame();
+    this->pump();
+  }
+};
+
+template <typename Executor, typename T>
+class awaitable_handler<Executor, T>
+  : public awaitable_handler_base<Executor, T>
+{
+public:
+  using awaitable_handler_base<Executor, T>::awaitable_handler_base;
+
+  template <typename Arg>
+  void operator()(Arg&& arg)
+  {
+    this->frame()->attach_thread(this);
+    this->frame()->return_value(std::forward<Arg>(arg));
+    this->frame()->pop_frame();
+    this->pump();
+  }
+};
+
+template <typename Executor, typename T>
+class awaitable_handler<Executor, asio::error_code, T>
+  : public awaitable_handler_base<Executor, T>
+{
+public:
+  using awaitable_handler_base<Executor, T>::awaitable_handler_base;
+
+  template <typename Arg>
+  void operator()(const asio::error_code& ec, Arg&& arg)
+  {
+    this->frame()->attach_thread(this);
+    if (ec)
+      this->frame()->set_error(ec);
+    else
+      this->frame()->return_value(std::forward<Arg>(arg));
+    this->frame()->pop_frame();
+    this->pump();
+  }
+};
+
+template <typename Executor, typename T>
+class awaitable_handler<Executor, std::exception_ptr, T>
+  : public awaitable_handler_base<Executor, T>
+{
+public:
+  using awaitable_handler_base<Executor, T>::awaitable_handler_base;
+
+  template <typename Arg>
+  void operator()(std::exception_ptr ex, Arg&& arg)
+  {
+    this->frame()->attach_thread(this);
+    if (ex)
+      this->frame()->set_except(ex);
+    else
+      this->frame()->return_value(std::forward<Arg>(arg));
+    this->frame()->pop_frame();
+    this->pump();
+  }
+};
+
+template <typename Executor, typename... Ts>
+class awaitable_handler
+  : public awaitable_handler_base<Executor, std::tuple<Ts...>>
+{
+public:
+  using awaitable_handler_base<Executor,
+    std::tuple<Ts...>>::awaitable_handler_base;
+
+  template <typename... Args>
+  void operator()(Args&&... args)
+  {
+    this->frame()->attach_thread(this);
+    this->frame()->return_values(std::forward<Args>(args)...);
+    this->frame()->pop_frame();
+    this->pump();
+  }
+};
+
+template <typename Executor, typename... Ts>
+class awaitable_handler<Executor, asio::error_code, Ts...>
+  : public awaitable_handler_base<Executor, std::tuple<Ts...>>
+{
+public:
+  using awaitable_handler_base<Executor,
+    std::tuple<Ts...>>::awaitable_handler_base;
+
+  template <typename... Args>
+  void operator()(const asio::error_code& ec, Args&&... args)
+  {
+    this->frame()->attach_thread(this);
+    if (ec)
+      this->frame()->set_error(ec);
+    else
+      this->frame()->return_values(std::forward<Args>(args)...);
+    this->frame()->pop_frame();
+    this->pump();
+  }
+};
+
+template <typename Executor, typename... Ts>
+class awaitable_handler<Executor, std::exception_ptr, Ts...>
+  : public awaitable_handler_base<Executor, std::tuple<Ts...>>
+{
+public:
+  using awaitable_handler_base<Executor,
+    std::tuple<Ts...>>::awaitable_handler_base;
+
+  template <typename... Args>
+  void operator()(std::exception_ptr ex, Args&&... args)
+  {
+    this->frame()->attach_thread(this);
+    if (ex)
+      this->frame()->set_except(ex);
+    else
+      this->frame()->return_values(std::forward<Args>(args)...);
+    this->frame()->pop_frame();
+    this->pump();
+  }
+};
+
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename Executor, typename R, typename... Args>
+class async_result<use_awaitable_t<Executor>, R(Args...)>
+{
+public:
+  typedef typename detail::awaitable_handler<
+      Executor, typename decay<Args>::type...> handler_type;
+  typedef typename handler_type::awaitable_type return_type;
+
+#if defined(_MSC_VER)
+  template <typename T>
+  static T dummy_return()
+  {
+    return std::move(*static_cast<T*>(nullptr));
+  }
+
+  template <>
+  static void dummy_return()
+  {
+  }
+#endif // defined(_MSC_VER)
+
+  template <typename Initiation, typename... InitArgs>
+  static return_type initiate(Initiation initiation,
+      use_awaitable_t<Executor>, InitArgs... args)
+  {
+    co_await [&](auto* frame)
+      {
+        handler_type handler(frame->detach_thread());
+        std::move(initiation)(std::move(handler), std::move(args)...);
+        return static_cast<handler_type*>(nullptr);
+      };
+
+    for (;;) {} // Never reached.
+#if defined(_MSC_VER)
+    co_return dummy_return<typename return_type::value_type>();
+#endif // defined(_MSC_VER)
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_USE_AWAITABLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/use_future.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/use_future.hpp
new file mode 100644
index 00000000000..64ed4a515d3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/use_future.hpp
@@ -0,0 +1,887 @@
+//
+// impl/use_future.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_USE_FUTURE_HPP
+#define ASIO_IMPL_USE_FUTURE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <tuple>
+#include "asio/async_result.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/error_code.hpp"
+#include "asio/packaged_task.hpp"
+#include "asio/system_error.hpp"
+#include "asio/system_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename T, typename F, typename... Args>
+inline void promise_invoke_and_set(std::promise<T>& p,
+    F& f, ASIO_MOVE_ARG(Args)... args)
+{
+#if !defined(ASIO_NO_EXCEPTIONS)
+  try
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+  {
+    p.set_value(f(ASIO_MOVE_CAST(Args)(args)...));
+  }
+#if !defined(ASIO_NO_EXCEPTIONS)
+  catch (...)
+  {
+    p.set_exception(std::current_exception());
+  }
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+}
+
+template <typename F, typename... Args>
+inline void promise_invoke_and_set(std::promise<void>& p,
+    F& f, ASIO_MOVE_ARG(Args)... args)
+{
+#if !defined(ASIO_NO_EXCEPTIONS)
+  try
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+  {
+    f(ASIO_MOVE_CAST(Args)(args)...);
+    p.set_value();
+  }
+#if !defined(ASIO_NO_EXCEPTIONS)
+  catch (...)
+  {
+    p.set_exception(std::current_exception());
+  }
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+}
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename T, typename F>
+inline void promise_invoke_and_set(std::promise<T>& p, F& f)
+{
+#if !defined(ASIO_NO_EXCEPTIONS)
+  try
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+  {
+    p.set_value(f());
+  }
+#if !defined(ASIO_NO_EXCEPTIONS)
+  catch (...)
+  {
+    p.set_exception(std::current_exception());
+  }
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+}
+
+template <typename F, typename Args>
+inline void promise_invoke_and_set(std::promise<void>& p, F& f)
+{
+#if !defined(ASIO_NO_EXCEPTIONS)
+  try
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+  {
+    f();
+    p.set_value();
+#if !defined(ASIO_NO_EXCEPTIONS)
+  }
+  catch (...)
+  {
+    p.set_exception(std::current_exception());
+  }
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+}
+
+#if defined(ASIO_NO_EXCEPTIONS)
+
+#define ASIO_PRIVATE_PROMISE_INVOKE_DEF(n) \
+  template <typename T, typename F, ASIO_VARIADIC_TPARAMS(n)> \
+  inline void promise_invoke_and_set(std::promise<T>& p, \
+      F& f, ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    p.set_value(f(ASIO_VARIADIC_MOVE_ARGS(n))); \
+  } \
+  \
+  template <typename F, ASIO_VARIADIC_TPARAMS(n)> \
+  inline void promise_invoke_and_set(std::promise<void>& p, \
+      F& f, ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    f(ASIO_VARIADIC_MOVE_ARGS(n)); \
+    p.set_value(); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_PROMISE_INVOKE_DEF)
+#undef ASIO_PRIVATE_PROMISE_INVOKE_DEF
+
+#else // defined(ASIO_NO_EXCEPTIONS)
+
+#define ASIO_PRIVATE_PROMISE_INVOKE_DEF(n) \
+  template <typename T, typename F, ASIO_VARIADIC_TPARAMS(n)> \
+  inline void promise_invoke_and_set(std::promise<T>& p, \
+      F& f, ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    try \
+    { \
+      p.set_value(f(ASIO_VARIADIC_MOVE_ARGS(n))); \
+    } \
+    catch (...) \
+    { \
+      p.set_exception(std::current_exception()); \
+    } \
+  } \
+  \
+  template <typename F, ASIO_VARIADIC_TPARAMS(n)> \
+  inline void promise_invoke_and_set(std::promise<void>& p, \
+      F& f, ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  { \
+    try \
+    { \
+      f(ASIO_VARIADIC_MOVE_ARGS(n)); \
+      p.set_value(); \
+    } \
+    catch (...) \
+    { \
+      p.set_exception(std::current_exception()); \
+    } \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_PROMISE_INVOKE_DEF)
+#undef ASIO_PRIVATE_PROMISE_INVOKE_DEF
+
+#endif // defined(ASIO_NO_EXCEPTIONS)
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+// A function object adapter to invoke a nullary function object and capture
+// any exception thrown into a promise.
+template <typename T, typename F>
+class promise_invoker
+{
+public:
+  promise_invoker(const shared_ptr<std::promise<T> >& p,
+      ASIO_MOVE_ARG(F) f)
+    : p_(p), f_(ASIO_MOVE_CAST(F)(f))
+  {
+  }
+
+  void operator()()
+  {
+#if !defined(ASIO_NO_EXCEPTIONS)
+    try
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+    {
+      f_();
+    }
+#if !defined(ASIO_NO_EXCEPTIONS)
+    catch (...)
+    {
+      p_->set_exception(std::current_exception());
+    }
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+  }
+
+private:
+  shared_ptr<std::promise<T> > p_;
+  typename decay<F>::type f_;
+};
+
+// An executor that adapts the system_executor to capture any exeption thrown
+// by a submitted function object and save it into a promise.
+template <typename T>
+class promise_executor
+{
+public:
+  explicit promise_executor(const shared_ptr<std::promise<T> >& p)
+    : p_(p)
+  {
+  }
+
+  execution_context& context() const ASIO_NOEXCEPT
+  {
+    return system_executor().context();
+  }
+
+  void on_work_started() const ASIO_NOEXCEPT {}
+  void on_work_finished() const ASIO_NOEXCEPT {}
+
+  template <typename F, typename A>
+  void dispatch(ASIO_MOVE_ARG(F) f, const A&) const
+  {
+    promise_invoker<T, F>(p_, ASIO_MOVE_CAST(F)(f))();
+  }
+
+  template <typename F, typename A>
+  void post(ASIO_MOVE_ARG(F) f, const A& a) const
+  {
+    system_executor().post(
+        promise_invoker<T, F>(p_, ASIO_MOVE_CAST(F)(f)), a);
+  }
+
+  template <typename F, typename A>
+  void defer(ASIO_MOVE_ARG(F) f, const A& a) const
+  {
+    system_executor().defer(
+        promise_invoker<T, F>(p_, ASIO_MOVE_CAST(F)(f)), a);
+  }
+
+  friend bool operator==(const promise_executor& a,
+      const promise_executor& b) ASIO_NOEXCEPT
+  {
+    return a.p_ == b.p_;
+  }
+
+  friend bool operator!=(const promise_executor& a,
+      const promise_executor& b) ASIO_NOEXCEPT
+  {
+    return a.p_ != b.p_;
+  }
+
+private:
+  shared_ptr<std::promise<T> > p_;
+};
+
+// The base class for all completion handlers that create promises.
+template <typename T>
+class promise_creator
+{
+public:
+  typedef promise_executor<T> executor_type;
+
+  executor_type get_executor() const ASIO_NOEXCEPT
+  {
+    return executor_type(p_);
+  }
+
+  typedef std::future<T> future_type;
+
+  future_type get_future()
+  {
+    return p_->get_future();
+  }
+
+protected:
+  template <typename Allocator>
+  void create_promise(const Allocator& a)
+  {
+    ASIO_REBIND_ALLOC(Allocator, char) b(a);
+    p_ = std::allocate_shared<std::promise<T>>(b, std::allocator_arg, b);
+  }
+
+  shared_ptr<std::promise<T> > p_;
+};
+
+// For completion signature void().
+class promise_handler_0
+  : public promise_creator<void>
+{
+public:
+  void operator()()
+  {
+    this->p_->set_value();
+  }
+};
+
+// For completion signature void(error_code).
+class promise_handler_ec_0
+  : public promise_creator<void>
+{
+public:
+  void operator()(const asio::error_code& ec)
+  {
+    if (ec)
+    {
+      this->p_->set_exception(
+          std::make_exception_ptr(
+            asio::system_error(ec)));
+    }
+    else
+    {
+      this->p_->set_value();
+    }
+  }
+};
+
+// For completion signature void(exception_ptr).
+class promise_handler_ex_0
+  : public promise_creator<void>
+{
+public:
+  void operator()(const std::exception_ptr& ex)
+  {
+    if (ex)
+    {
+      this->p_->set_exception(ex);
+    }
+    else
+    {
+      this->p_->set_value();
+    }
+  }
+};
+
+// For completion signature void(T).
+template <typename T>
+class promise_handler_1
+  : public promise_creator<T>
+{
+public:
+  template <typename Arg>
+  void operator()(ASIO_MOVE_ARG(Arg) arg)
+  {
+    this->p_->set_value(ASIO_MOVE_CAST(Arg)(arg));
+  }
+};
+
+// For completion signature void(error_code, T).
+template <typename T>
+class promise_handler_ec_1
+  : public promise_creator<T>
+{
+public:
+  template <typename Arg>
+  void operator()(const asio::error_code& ec,
+      ASIO_MOVE_ARG(Arg) arg)
+  {
+    if (ec)
+    {
+      this->p_->set_exception(
+          std::make_exception_ptr(
+            asio::system_error(ec)));
+    }
+    else
+      this->p_->set_value(ASIO_MOVE_CAST(Arg)(arg));
+  }
+};
+
+// For completion signature void(exception_ptr, T).
+template <typename T>
+class promise_handler_ex_1
+  : public promise_creator<T>
+{
+public:
+  template <typename Arg>
+  void operator()(const std::exception_ptr& ex,
+      ASIO_MOVE_ARG(Arg) arg)
+  {
+    if (ex)
+      this->p_->set_exception(ex);
+    else
+      this->p_->set_value(ASIO_MOVE_CAST(Arg)(arg));
+  }
+};
+
+// For completion signature void(T1, ..., Tn);
+template <typename T>
+class promise_handler_n
+  : public promise_creator<T>
+{
+public:
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename... Args>
+  void operator()(ASIO_MOVE_ARG(Args)... args)
+  {
+    this->p_->set_value(
+        std::forward_as_tuple(
+          ASIO_MOVE_CAST(Args)(args)...));
+  }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#define ASIO_PRIVATE_CALL_OP_DEF(n) \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  void operator()(ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  {\
+    this->p_->set_value( \
+        std::forward_as_tuple( \
+          ASIO_VARIADIC_MOVE_ARGS(n))); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_CALL_OP_DEF)
+#undef ASIO_PRIVATE_CALL_OP_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+};
+
+// For completion signature void(error_code, T1, ..., Tn);
+template <typename T>
+class promise_handler_ec_n
+  : public promise_creator<T>
+{
+public:
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename... Args>
+  void operator()(const asio::error_code& ec,
+      ASIO_MOVE_ARG(Args)... args)
+  {
+    if (ec)
+    {
+      this->p_->set_exception(
+          std::make_exception_ptr(
+            asio::system_error(ec)));
+    }
+    else
+    {
+      this->p_->set_value(
+          std::forward_as_tuple(
+            ASIO_MOVE_CAST(Args)(args)...));
+    }
+  }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#define ASIO_PRIVATE_CALL_OP_DEF(n) \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  void operator()(const asio::error_code& ec, \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  {\
+    if (ec) \
+    { \
+      this->p_->set_exception( \
+          std::make_exception_ptr( \
+            asio::system_error(ec))); \
+    } \
+    else \
+    { \
+      this->p_->set_value( \
+          std::forward_as_tuple( \
+            ASIO_VARIADIC_MOVE_ARGS(n))); \
+    } \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_CALL_OP_DEF)
+#undef ASIO_PRIVATE_CALL_OP_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+};
+
+// For completion signature void(exception_ptr, T1, ..., Tn);
+template <typename T>
+class promise_handler_ex_n
+  : public promise_creator<T>
+{
+public:
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename... Args>
+  void operator()(const std::exception_ptr& ex,
+      ASIO_MOVE_ARG(Args)... args)
+  {
+    if (ex)
+      this->p_->set_exception(ex);
+    else
+    {
+      this->p_->set_value(
+          std::forward_as_tuple(
+            ASIO_MOVE_CAST(Args)(args)...));
+    }
+  }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#define ASIO_PRIVATE_CALL_OP_DEF(n) \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  void operator()(const std::exception_ptr& ex, \
+      ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  {\
+    if (ex) \
+      this->p_->set_exception(ex); \
+    else \
+    { \
+      this->p_->set_value( \
+          std::forward_as_tuple( \
+            ASIO_VARIADIC_MOVE_ARGS(n))); \
+    } \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_CALL_OP_DEF)
+#undef ASIO_PRIVATE_CALL_OP_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+};
+
+// Helper template to choose the appropriate concrete promise handler
+// implementation based on the supplied completion signature.
+template <typename> class promise_handler_selector;
+
+template <>
+class promise_handler_selector<void()>
+  : public promise_handler_0 {};
+
+template <>
+class promise_handler_selector<void(asio::error_code)>
+  : public promise_handler_ec_0 {};
+
+template <>
+class promise_handler_selector<void(std::exception_ptr)>
+  : public promise_handler_ex_0 {};
+
+template <typename Arg>
+class promise_handler_selector<void(Arg)>
+  : public promise_handler_1<Arg> {};
+
+template <typename Arg>
+class promise_handler_selector<void(asio::error_code, Arg)>
+  : public promise_handler_ec_1<Arg> {};
+
+template <typename Arg>
+class promise_handler_selector<void(std::exception_ptr, Arg)>
+  : public promise_handler_ex_1<Arg> {};
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename... Arg>
+class promise_handler_selector<void(Arg...)>
+  : public promise_handler_n<std::tuple<Arg...> > {};
+
+template <typename... Arg>
+class promise_handler_selector<void(asio::error_code, Arg...)>
+  : public promise_handler_ec_n<std::tuple<Arg...> > {};
+
+template <typename... Arg>
+class promise_handler_selector<void(std::exception_ptr, Arg...)>
+  : public promise_handler_ex_n<std::tuple<Arg...> > {};
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#define ASIO_PRIVATE_PROMISE_SELECTOR_DEF(n) \
+  template <typename Arg, ASIO_VARIADIC_TPARAMS(n)> \
+  class promise_handler_selector< \
+    void(Arg, ASIO_VARIADIC_TARGS(n))> \
+      : public promise_handler_n< \
+        std::tuple<Arg, ASIO_VARIADIC_TARGS(n)> > {}; \
+  \
+  template <typename Arg, ASIO_VARIADIC_TPARAMS(n)> \
+  class promise_handler_selector< \
+    void(asio::error_code, Arg, ASIO_VARIADIC_TARGS(n))> \
+      : public promise_handler_ec_n< \
+        std::tuple<Arg, ASIO_VARIADIC_TARGS(n)> > {}; \
+  \
+  template <typename Arg, ASIO_VARIADIC_TPARAMS(n)> \
+  class promise_handler_selector< \
+    void(std::exception_ptr, Arg, ASIO_VARIADIC_TARGS(n))> \
+      : public promise_handler_ex_n< \
+        std::tuple<Arg, ASIO_VARIADIC_TARGS(n)> > {}; \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_PROMISE_SELECTOR_DEF)
+#undef ASIO_PRIVATE_PROMISE_SELECTOR_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+// Completion handlers produced from the use_future completion token, when not
+// using use_future::operator().
+template <typename Signature, typename Allocator>
+class promise_handler
+  : public promise_handler_selector<Signature>
+{
+public:
+  typedef Allocator allocator_type;
+  typedef void result_type;
+
+  promise_handler(use_future_t<Allocator> u)
+    : allocator_(u.get_allocator())
+  {
+    this->create_promise(allocator_);
+  }
+
+  allocator_type get_allocator() const ASIO_NOEXCEPT
+  {
+    return allocator_;
+  }
+
+private:
+  Allocator allocator_;
+};
+
+template <typename Function, typename Signature, typename Allocator>
+inline void asio_handler_invoke(Function& f,
+    promise_handler<Signature, Allocator>* h)
+{
+  typename promise_handler<Signature, Allocator>::executor_type
+    ex(h->get_executor());
+  ex.dispatch(ASIO_MOVE_CAST(Function)(f), std::allocator<void>());
+}
+
+template <typename Function, typename Signature, typename Allocator>
+inline void asio_handler_invoke(const Function& f,
+    promise_handler<Signature, Allocator>* h)
+{
+  typename promise_handler<Signature, Allocator>::executor_type
+    ex(h->get_executor());
+  ex.dispatch(f, std::allocator<void>());
+}
+
+// Helper base class for async_result specialisation.
+template <typename Signature, typename Allocator>
+class promise_async_result
+{
+public:
+  typedef promise_handler<Signature, Allocator> completion_handler_type;
+  typedef typename completion_handler_type::future_type return_type;
+
+  explicit promise_async_result(completion_handler_type& h)
+    : future_(h.get_future())
+  {
+  }
+
+  return_type get()
+  {
+    return ASIO_MOVE_CAST(return_type)(future_);
+  }
+
+private:
+  return_type future_;
+};
+
+// Return value from use_future::operator().
+template <typename Function, typename Allocator>
+class packaged_token
+{
+public:
+  packaged_token(Function f, const Allocator& a)
+    : function_(ASIO_MOVE_CAST(Function)(f)),
+      allocator_(a)
+  {
+  }
+
+//private:
+  Function function_;
+  Allocator allocator_;
+};
+
+// Completion handlers produced from the use_future completion token, when
+// using use_future::operator().
+template <typename Function, typename Allocator, typename Result>
+class packaged_handler
+  : public promise_creator<Result>
+{
+public:
+  typedef Allocator allocator_type;
+  typedef void result_type;
+
+  packaged_handler(packaged_token<Function, Allocator> t)
+    : function_(ASIO_MOVE_CAST(Function)(t.function_)),
+      allocator_(t.allocator_)
+  {
+    this->create_promise(allocator_);
+  }
+
+  allocator_type get_allocator() const ASIO_NOEXCEPT
+  {
+    return allocator_;
+  }
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  template <typename... Args>
+  void operator()(ASIO_MOVE_ARG(Args)... args)
+  {
+    (promise_invoke_and_set)(*this->p_,
+        function_, ASIO_MOVE_CAST(Args)(args)...);
+  }
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+  void operator()()
+  {
+    (promise_invoke_and_set)(*this->p_, function_);
+  }
+
+#define ASIO_PRIVATE_CALL_OP_DEF(n) \
+  template <ASIO_VARIADIC_TPARAMS(n)> \
+  void operator()(ASIO_VARIADIC_MOVE_PARAMS(n)) \
+  {\
+    (promise_invoke_and_set)(*this->p_, \
+        function_, ASIO_VARIADIC_MOVE_ARGS(n)); \
+  } \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_CALL_OP_DEF)
+#undef ASIO_PRIVATE_CALL_OP_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+private:
+  Function function_;
+  Allocator allocator_;
+};
+
+template <typename Function,
+    typename Function1, typename Allocator, typename Result>
+inline void asio_handler_invoke(Function& f,
+    packaged_handler<Function1, Allocator, Result>* h)
+{
+  typename packaged_handler<Function1, Allocator, Result>::executor_type
+    ex(h->get_executor());
+  ex.dispatch(ASIO_MOVE_CAST(Function)(f), std::allocator<void>());
+}
+
+template <typename Function,
+    typename Function1, typename Allocator, typename Result>
+inline void asio_handler_invoke(const Function& f,
+    packaged_handler<Function1, Allocator, Result>* h)
+{
+  typename packaged_handler<Function1, Allocator, Result>::executor_type
+    ex(h->get_executor());
+  ex.dispatch(f, std::allocator<void>());
+}
+
+// Helper base class for async_result specialisation.
+template <typename Function, typename Allocator, typename Result>
+class packaged_async_result
+{
+public:
+  typedef packaged_handler<Function, Allocator, Result> completion_handler_type;
+  typedef typename completion_handler_type::future_type return_type;
+
+  explicit packaged_async_result(completion_handler_type& h)
+    : future_(h.get_future())
+  {
+  }
+
+  return_type get()
+  {
+    return ASIO_MOVE_CAST(return_type)(future_);
+  }
+
+private:
+  return_type future_;
+};
+
+} // namespace detail
+
+template <typename Allocator> template <typename Function>
+inline detail::packaged_token<typename decay<Function>::type, Allocator>
+use_future_t<Allocator>::operator()(ASIO_MOVE_ARG(Function) f) const
+{
+  return detail::packaged_token<typename decay<Function>::type, Allocator>(
+      ASIO_MOVE_CAST(Function)(f), allocator_);
+}
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename Allocator, typename Result, typename... Args>
+class async_result<use_future_t<Allocator>, Result(Args...)>
+  : public detail::promise_async_result<
+      void(typename decay<Args>::type...), Allocator>
+{
+public:
+  explicit async_result(
+    typename detail::promise_async_result<void(typename decay<Args>::type...),
+      Allocator>::completion_handler_type& h)
+    : detail::promise_async_result<
+        void(typename decay<Args>::type...), Allocator>(h)
+  {
+  }
+};
+
+template <typename Function, typename Allocator,
+    typename Result, typename... Args>
+class async_result<detail::packaged_token<Function, Allocator>, Result(Args...)>
+  : public detail::packaged_async_result<Function, Allocator,
+      typename result_of<Function(Args...)>::type>
+{
+public:
+  explicit async_result(
+    typename detail::packaged_async_result<Function, Allocator,
+      typename result_of<Function(Args...)>::type>::completion_handler_type& h)
+    : detail::packaged_async_result<Function, Allocator,
+        typename result_of<Function(Args...)>::type>(h)
+  {
+  }
+};
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+template <typename Allocator, typename Result>
+class async_result<use_future_t<Allocator>, Result()>
+  : public detail::promise_async_result<void(), Allocator>
+{
+public:
+  explicit async_result(
+    typename detail::promise_async_result<
+      void(), Allocator>::completion_handler_type& h)
+    : detail::promise_async_result<void(), Allocator>(h)
+  {
+  }
+};
+
+template <typename Function, typename Allocator, typename Result>
+class async_result<detail::packaged_token<Function, Allocator>, Result()>
+  : public detail::packaged_async_result<Function, Allocator,
+      typename result_of<Function()>::type>
+{
+public:
+  explicit async_result(
+    typename detail::packaged_async_result<Function, Allocator,
+      typename result_of<Function()>::type>::completion_handler_type& h)
+    : detail::packaged_async_result<Function, Allocator,
+        typename result_of<Function()>::type>(h)
+  {
+  }
+};
+
+#define ASIO_PRIVATE_ASYNC_RESULT_DEF(n) \
+  template <typename Allocator, \
+      typename Result, ASIO_VARIADIC_TPARAMS(n)> \
+  class async_result<use_future_t<Allocator>, \
+      Result(ASIO_VARIADIC_TARGS(n))> \
+    : public detail::promise_async_result< \
+        void(ASIO_VARIADIC_DECAY(n)), Allocator> \
+  { \
+  public: \
+    explicit async_result( \
+      typename detail::promise_async_result< \
+        void(ASIO_VARIADIC_DECAY(n)), \
+        Allocator>::completion_handler_type& h) \
+      : detail::promise_async_result< \
+          void(ASIO_VARIADIC_DECAY(n)), Allocator>(h) \
+    { \
+    } \
+  }; \
+  \
+  template <typename Function, typename Allocator, \
+      typename Result, ASIO_VARIADIC_TPARAMS(n)> \
+  class async_result<detail::packaged_token<Function, Allocator>, \
+      Result(ASIO_VARIADIC_TARGS(n))> \
+    : public detail::packaged_async_result<Function, Allocator, \
+        typename result_of<Function(ASIO_VARIADIC_TARGS(n))>::type> \
+  { \
+  public: \
+    explicit async_result( \
+      typename detail::packaged_async_result<Function, Allocator, \
+        typename result_of<Function(ASIO_VARIADIC_TARGS(n))>::type \
+        >::completion_handler_type& h) \
+      : detail::packaged_async_result<Function, Allocator, \
+          typename result_of<Function(ASIO_VARIADIC_TARGS(n))>::type>(h) \
+    { \
+    } \
+  }; \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_ASYNC_RESULT_DEF)
+#undef ASIO_PRIVATE_ASYNC_RESULT_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_USE_FUTURE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/write.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/write.hpp
new file mode 100644
index 00000000000..aae18add208
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/write.hpp
@@ -0,0 +1,1043 @@
+//
+// impl/write.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_WRITE_HPP
+#define ASIO_IMPL_WRITE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/buffer.hpp"
+#include "asio/completion_condition.hpp"
+#include "asio/detail/array_fwd.hpp"
+#include "asio/detail/base_from_completion_cond.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/consuming_buffers.hpp"
+#include "asio/detail/dependent_type.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail
+{
+  template <typename SyncWriteStream, typename ConstBufferSequence,
+      typename ConstBufferIterator, typename CompletionCondition>
+  std::size_t write_buffer_sequence(SyncWriteStream& s,
+      const ConstBufferSequence& buffers, const ConstBufferIterator&,
+      CompletionCondition completion_condition, asio::error_code& ec)
+  {
+    ec = asio::error_code();
+    asio::detail::consuming_buffers<const_buffer,
+        ConstBufferSequence, ConstBufferIterator> tmp(buffers);
+    while (!tmp.empty())
+    {
+      if (std::size_t max_size = detail::adapt_completion_condition_result(
+            completion_condition(ec, tmp.total_consumed())))
+        tmp.consume(s.write_some(tmp.prepare(max_size), ec));
+      else
+        break;
+    }
+    return tmp.total_consumed();;
+  }
+} // namespace detail
+
+template <typename SyncWriteStream, typename ConstBufferSequence,
+    typename CompletionCondition>
+inline std::size_t write(SyncWriteStream& s, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type*)
+{
+  return detail::write_buffer_sequence(s, buffers,
+      asio::buffer_sequence_begin(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+}
+
+template <typename SyncWriteStream, typename ConstBufferSequence>
+inline std::size_t write(SyncWriteStream& s, const ConstBufferSequence& buffers,
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = write(s, buffers, transfer_all(), ec);
+  asio::detail::throw_error(ec, "write");
+  return bytes_transferred;
+}
+
+template <typename SyncWriteStream, typename ConstBufferSequence>
+inline std::size_t write(SyncWriteStream& s, const ConstBufferSequence& buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type*)
+{
+  return write(s, buffers, transfer_all(), ec);
+}
+
+template <typename SyncWriteStream, typename ConstBufferSequence,
+    typename CompletionCondition>
+inline std::size_t write(SyncWriteStream& s, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = write(s, buffers,
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  asio::detail::throw_error(ec, "write");
+  return bytes_transferred;
+}
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+template <typename SyncWriteStream, typename DynamicBuffer_v1,
+    typename CompletionCondition>
+std::size_t write(SyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  typename decay<DynamicBuffer_v1>::type b(
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers));
+
+  std::size_t bytes_transferred = write(s, b.data(),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  b.consume(bytes_transferred);
+  return bytes_transferred;
+}
+
+template <typename SyncWriteStream, typename DynamicBuffer_v1>
+inline std::size_t write(SyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = write(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+      transfer_all(), ec);
+  asio::detail::throw_error(ec, "write");
+  return bytes_transferred;
+}
+
+template <typename SyncWriteStream, typename DynamicBuffer_v1>
+inline std::size_t write(SyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  return write(s, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+      transfer_all(), ec);
+}
+
+template <typename SyncWriteStream, typename DynamicBuffer_v1,
+    typename CompletionCondition>
+inline std::size_t write(SyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = write(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  asio::detail::throw_error(ec, "write");
+  return bytes_transferred;
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+template <typename SyncWriteStream, typename Allocator,
+    typename CompletionCondition>
+inline std::size_t write(SyncWriteStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition, asio::error_code& ec)
+{
+  return write(s, basic_streambuf_ref<Allocator>(b),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+}
+
+template <typename SyncWriteStream, typename Allocator>
+inline std::size_t write(SyncWriteStream& s,
+    asio::basic_streambuf<Allocator>& b)
+{
+  return write(s, basic_streambuf_ref<Allocator>(b));
+}
+
+template <typename SyncWriteStream, typename Allocator>
+inline std::size_t write(SyncWriteStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    asio::error_code& ec)
+{
+  return write(s, basic_streambuf_ref<Allocator>(b), ec);
+}
+
+template <typename SyncWriteStream, typename Allocator,
+    typename CompletionCondition>
+inline std::size_t write(SyncWriteStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition)
+{
+  return write(s, basic_streambuf_ref<Allocator>(b),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+template <typename SyncWriteStream, typename DynamicBuffer_v2,
+    typename CompletionCondition>
+std::size_t write(SyncWriteStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  std::size_t bytes_transferred = write(s, buffers.data(0, buffers.size()),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  buffers.consume(bytes_transferred);
+  return bytes_transferred;
+}
+
+template <typename SyncWriteStream, typename DynamicBuffer_v2>
+inline std::size_t write(SyncWriteStream& s, DynamicBuffer_v2 buffers,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = write(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+      transfer_all(), ec);
+  asio::detail::throw_error(ec, "write");
+  return bytes_transferred;
+}
+
+template <typename SyncWriteStream, typename DynamicBuffer_v2>
+inline std::size_t write(SyncWriteStream& s, DynamicBuffer_v2 buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  return write(s, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+      transfer_all(), ec);
+}
+
+template <typename SyncWriteStream, typename DynamicBuffer_v2,
+    typename CompletionCondition>
+inline std::size_t write(SyncWriteStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = write(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  asio::detail::throw_error(ec, "write");
+  return bytes_transferred;
+}
+
+namespace detail
+{
+  template <typename AsyncWriteStream, typename ConstBufferSequence,
+      typename ConstBufferIterator, typename CompletionCondition,
+      typename WriteHandler>
+  class write_op
+    : detail::base_from_completion_cond<CompletionCondition>
+  {
+  public:
+    write_op(AsyncWriteStream& stream, const ConstBufferSequence& buffers,
+        CompletionCondition& completion_condition, WriteHandler& handler)
+      : detail::base_from_completion_cond<
+          CompletionCondition>(completion_condition),
+        stream_(stream),
+        buffers_(buffers),
+        start_(0),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    write_op(const write_op& other)
+      : detail::base_from_completion_cond<CompletionCondition>(other),
+        stream_(other.stream_),
+        buffers_(other.buffers_),
+        start_(other.start_),
+        handler_(other.handler_)
+    {
+    }
+
+    write_op(write_op&& other)
+      : detail::base_from_completion_cond<CompletionCondition>(
+          ASIO_MOVE_CAST(detail::base_from_completion_cond<
+            CompletionCondition>)(other)),
+        stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(buffers_type)(other.buffers_)),
+        start_(other.start_),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      std::size_t max_size;
+      switch (start_ = start)
+      {
+        case 1:
+        max_size = this->check_for_completion(ec, buffers_.total_consumed());
+        do
+        {
+          stream_.async_write_some(buffers_.prepare(max_size),
+              ASIO_MOVE_CAST(write_op)(*this));
+          return; default:
+          buffers_.consume(bytes_transferred);
+          if ((!ec && bytes_transferred == 0) || buffers_.empty())
+            break;
+          max_size = this->check_for_completion(ec, buffers_.total_consumed());
+        } while (max_size > 0);
+
+        handler_(ec, buffers_.total_consumed());
+      }
+    }
+
+  //private:
+    typedef asio::detail::consuming_buffers<const_buffer,
+        ConstBufferSequence, ConstBufferIterator> buffers_type;
+
+    AsyncWriteStream& stream_;
+    buffers_type buffers_;
+    int start_;
+    WriteHandler handler_;
+  };
+
+  template <typename AsyncWriteStream, typename ConstBufferSequence,
+      typename ConstBufferIterator, typename CompletionCondition,
+      typename WriteHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      write_op<AsyncWriteStream, ConstBufferSequence, ConstBufferIterator,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncWriteStream, typename ConstBufferSequence,
+      typename ConstBufferIterator, typename CompletionCondition,
+      typename WriteHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      write_op<AsyncWriteStream, ConstBufferSequence, ConstBufferIterator,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncWriteStream, typename ConstBufferSequence,
+      typename ConstBufferIterator, typename CompletionCondition,
+      typename WriteHandler>
+  inline bool asio_handler_is_continuation(
+      write_op<AsyncWriteStream, ConstBufferSequence, ConstBufferIterator,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncWriteStream,
+      typename ConstBufferSequence, typename ConstBufferIterator,
+      typename CompletionCondition, typename WriteHandler>
+  inline void asio_handler_invoke(Function& function,
+      write_op<AsyncWriteStream, ConstBufferSequence, ConstBufferIterator,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncWriteStream,
+      typename ConstBufferSequence, typename ConstBufferIterator,
+      typename CompletionCondition, typename WriteHandler>
+  inline void asio_handler_invoke(const Function& function,
+      write_op<AsyncWriteStream, ConstBufferSequence, ConstBufferIterator,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncWriteStream, typename ConstBufferSequence,
+      typename ConstBufferIterator, typename CompletionCondition,
+      typename WriteHandler>
+  inline void start_write_buffer_sequence_op(AsyncWriteStream& stream,
+      const ConstBufferSequence& buffers, const ConstBufferIterator&,
+      CompletionCondition& completion_condition, WriteHandler& handler)
+  {
+    detail::write_op<AsyncWriteStream, ConstBufferSequence,
+      ConstBufferIterator, CompletionCondition, WriteHandler>(
+        stream, buffers, completion_condition, handler)(
+          asio::error_code(), 0, 1);
+  }
+
+  template <typename AsyncWriteStream>
+  class initiate_async_write_buffer_sequence
+  {
+  public:
+    typedef typename AsyncWriteStream::executor_type executor_type;
+
+    explicit initiate_async_write_buffer_sequence(AsyncWriteStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence,
+        typename CompletionCondition>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        const ConstBufferSequence& buffers,
+        ASIO_MOVE_ARG(CompletionCondition) completion_cond) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      non_const_lvalue<WriteHandler> handler2(handler);
+      non_const_lvalue<CompletionCondition> completion_cond2(completion_cond);
+      start_write_buffer_sequence_op(stream_, buffers,
+          asio::buffer_sequence_begin(buffers),
+          completion_cond2.value, handler2.value);
+    }
+
+  private:
+    AsyncWriteStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncWriteStream, typename ConstBufferSequence,
+    typename ConstBufferIterator, typename CompletionCondition,
+    typename WriteHandler, typename Allocator>
+struct associated_allocator<
+    detail::write_op<AsyncWriteStream, ConstBufferSequence,
+      ConstBufferIterator, CompletionCondition, WriteHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<WriteHandler, Allocator>::type type;
+
+  static type get(
+      const detail::write_op<AsyncWriteStream, ConstBufferSequence,
+        ConstBufferIterator, CompletionCondition, WriteHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<WriteHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncWriteStream, typename ConstBufferSequence,
+    typename ConstBufferIterator, typename CompletionCondition,
+    typename WriteHandler, typename Executor>
+struct associated_executor<
+    detail::write_op<AsyncWriteStream, ConstBufferSequence,
+      ConstBufferIterator, CompletionCondition, WriteHandler>,
+    Executor>
+{
+  typedef typename associated_executor<WriteHandler, Executor>::type type;
+
+  static type get(
+      const detail::write_op<AsyncWriteStream, ConstBufferSequence,
+        ConstBufferIterator, CompletionCondition, WriteHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<WriteHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncWriteStream,
+    typename ConstBufferSequence, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler,
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type*)
+{
+  return async_initiate<WriteHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_write_buffer_sequence<AsyncWriteStream>(s),
+      handler, buffers,
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+template <typename AsyncWriteStream, typename ConstBufferSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s, const ConstBufferSequence& buffers,
+    ASIO_MOVE_ARG(WriteHandler) handler,
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type*)
+{
+  return async_initiate<WriteHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_write_buffer_sequence<AsyncWriteStream>(s),
+      handler, buffers, transfer_all());
+}
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+namespace detail
+{
+  template <typename AsyncWriteStream, typename DynamicBuffer_v1,
+      typename CompletionCondition, typename WriteHandler>
+  class write_dynbuf_v1_op
+  {
+  public:
+    template <typename BufferSequence>
+    write_dynbuf_v1_op(AsyncWriteStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        CompletionCondition& completion_condition, WriteHandler& handler)
+      : stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        completion_condition_(
+          ASIO_MOVE_CAST(CompletionCondition)(completion_condition)),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    write_dynbuf_v1_op(const write_dynbuf_v1_op& other)
+      : stream_(other.stream_),
+        buffers_(other.buffers_),
+        completion_condition_(other.completion_condition_),
+        handler_(other.handler_)
+    {
+    }
+
+    write_dynbuf_v1_op(write_dynbuf_v1_op&& other)
+      : stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v1)(other.buffers_)),
+        completion_condition_(
+          ASIO_MOVE_CAST(CompletionCondition)(
+            other.completion_condition_)),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      switch (start)
+      {
+        case 1:
+        async_write(stream_, buffers_.data(),
+            ASIO_MOVE_CAST(CompletionCondition)(completion_condition_),
+            ASIO_MOVE_CAST(write_dynbuf_v1_op)(*this));
+        return; default:
+        buffers_.consume(bytes_transferred);
+        handler_(ec, static_cast<const std::size_t&>(bytes_transferred));
+      }
+    }
+
+  //private:
+    AsyncWriteStream& stream_;
+    DynamicBuffer_v1 buffers_;
+    CompletionCondition completion_condition_;
+    WriteHandler handler_;
+  };
+
+  template <typename AsyncWriteStream, typename DynamicBuffer_v1,
+      typename CompletionCondition, typename WriteHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      write_dynbuf_v1_op<AsyncWriteStream, DynamicBuffer_v1,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncWriteStream, typename DynamicBuffer_v1,
+      typename CompletionCondition, typename WriteHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      write_dynbuf_v1_op<AsyncWriteStream, DynamicBuffer_v1,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncWriteStream, typename DynamicBuffer_v1,
+      typename CompletionCondition, typename WriteHandler>
+  inline bool asio_handler_is_continuation(
+      write_dynbuf_v1_op<AsyncWriteStream, DynamicBuffer_v1,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    return asio_handler_cont_helpers::is_continuation(
+        this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncWriteStream,
+      typename DynamicBuffer_v1, typename CompletionCondition,
+      typename WriteHandler>
+  inline void asio_handler_invoke(Function& function,
+      write_dynbuf_v1_op<AsyncWriteStream, DynamicBuffer_v1,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncWriteStream,
+      typename DynamicBuffer_v1, typename CompletionCondition,
+      typename WriteHandler>
+  inline void asio_handler_invoke(const Function& function,
+      write_dynbuf_v1_op<AsyncWriteStream, DynamicBuffer_v1,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncWriteStream>
+  class initiate_async_write_dynbuf_v1
+  {
+  public:
+    typedef typename AsyncWriteStream::executor_type executor_type;
+
+    explicit initiate_async_write_dynbuf_v1(AsyncWriteStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename WriteHandler, typename DynamicBuffer_v1,
+        typename CompletionCondition>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+        ASIO_MOVE_ARG(CompletionCondition) completion_cond) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      non_const_lvalue<WriteHandler> handler2(handler);
+      non_const_lvalue<CompletionCondition> completion_cond2(completion_cond);
+      write_dynbuf_v1_op<AsyncWriteStream,
+        typename decay<DynamicBuffer_v1>::type,
+          CompletionCondition, typename decay<WriteHandler>::type>(
+            stream_, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+              completion_cond2.value, handler2.value)(
+                asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncWriteStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncWriteStream, typename DynamicBuffer_v1,
+    typename CompletionCondition, typename WriteHandler, typename Allocator>
+struct associated_allocator<
+    detail::write_dynbuf_v1_op<AsyncWriteStream,
+      DynamicBuffer_v1, CompletionCondition, WriteHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<WriteHandler, Allocator>::type type;
+
+  static type get(
+      const detail::write_dynbuf_v1_op<AsyncWriteStream,
+        DynamicBuffer_v1, CompletionCondition, WriteHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<WriteHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncWriteStream, typename DynamicBuffer_v1,
+    typename CompletionCondition, typename WriteHandler, typename Executor>
+struct associated_executor<
+    detail::write_dynbuf_v1_op<AsyncWriteStream,
+      DynamicBuffer_v1, CompletionCondition, WriteHandler>,
+    Executor>
+{
+  typedef typename associated_executor<WriteHandler, Executor>::type type;
+
+  static type get(
+      const detail::write_dynbuf_v1_op<AsyncWriteStream,
+        DynamicBuffer_v1, CompletionCondition, WriteHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<WriteHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncWriteStream, typename DynamicBuffer_v1,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    ASIO_MOVE_ARG(WriteHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  return async_write(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+      transfer_all(), ASIO_MOVE_CAST(WriteHandler)(handler));
+}
+
+template <typename AsyncWriteStream,
+    typename DynamicBuffer_v1, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type*)
+{
+  return async_initiate<WriteHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_write_dynbuf_v1<AsyncWriteStream>(s),
+      handler, ASIO_MOVE_CAST(DynamicBuffer_v1)(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+template <typename AsyncWriteStream, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    ASIO_MOVE_ARG(WriteHandler) handler)
+{
+  return async_write(s, basic_streambuf_ref<Allocator>(b),
+      ASIO_MOVE_CAST(WriteHandler)(handler));
+}
+
+template <typename AsyncWriteStream,
+    typename Allocator, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler)
+{
+  return async_write(s, basic_streambuf_ref<Allocator>(b),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition),
+      ASIO_MOVE_CAST(WriteHandler)(handler));
+}
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+namespace detail
+{
+  template <typename AsyncWriteStream, typename DynamicBuffer_v2,
+      typename CompletionCondition, typename WriteHandler>
+  class write_dynbuf_v2_op
+  {
+  public:
+    template <typename BufferSequence>
+    write_dynbuf_v2_op(AsyncWriteStream& stream,
+        ASIO_MOVE_ARG(BufferSequence) buffers,
+        CompletionCondition& completion_condition, WriteHandler& handler)
+      : stream_(stream),
+        buffers_(ASIO_MOVE_CAST(BufferSequence)(buffers)),
+        completion_condition_(
+          ASIO_MOVE_CAST(CompletionCondition)(completion_condition)),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    write_dynbuf_v2_op(const write_dynbuf_v2_op& other)
+      : stream_(other.stream_),
+        buffers_(other.buffers_),
+        completion_condition_(other.completion_condition_),
+        handler_(other.handler_)
+    {
+    }
+
+    write_dynbuf_v2_op(write_dynbuf_v2_op&& other)
+      : stream_(other.stream_),
+        buffers_(ASIO_MOVE_CAST(DynamicBuffer_v2)(other.buffers_)),
+        completion_condition_(
+          ASIO_MOVE_CAST(CompletionCondition)(
+            other.completion_condition_)),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      switch (start)
+      {
+        case 1:
+        async_write(stream_, buffers_.data(0, buffers_.size()),
+            ASIO_MOVE_CAST(CompletionCondition)(completion_condition_),
+            ASIO_MOVE_CAST(write_dynbuf_v2_op)(*this));
+        return; default:
+        buffers_.consume(bytes_transferred);
+        handler_(ec, static_cast<const std::size_t&>(bytes_transferred));
+      }
+    }
+
+  //private:
+    AsyncWriteStream& stream_;
+    DynamicBuffer_v2 buffers_;
+    CompletionCondition completion_condition_;
+    WriteHandler handler_;
+  };
+
+  template <typename AsyncWriteStream, typename DynamicBuffer_v2,
+      typename CompletionCondition, typename WriteHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      write_dynbuf_v2_op<AsyncWriteStream, DynamicBuffer_v2,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncWriteStream, typename DynamicBuffer_v2,
+      typename CompletionCondition, typename WriteHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      write_dynbuf_v2_op<AsyncWriteStream, DynamicBuffer_v2,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncWriteStream, typename DynamicBuffer_v2,
+      typename CompletionCondition, typename WriteHandler>
+  inline bool asio_handler_is_continuation(
+      write_dynbuf_v2_op<AsyncWriteStream, DynamicBuffer_v2,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    return asio_handler_cont_helpers::is_continuation(
+        this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncWriteStream,
+      typename DynamicBuffer_v2, typename CompletionCondition,
+      typename WriteHandler>
+  inline void asio_handler_invoke(Function& function,
+      write_dynbuf_v2_op<AsyncWriteStream, DynamicBuffer_v2,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncWriteStream,
+      typename DynamicBuffer_v2, typename CompletionCondition,
+      typename WriteHandler>
+  inline void asio_handler_invoke(const Function& function,
+      write_dynbuf_v2_op<AsyncWriteStream, DynamicBuffer_v2,
+        CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncWriteStream>
+  class initiate_async_write_dynbuf_v2
+  {
+  public:
+    typedef typename AsyncWriteStream::executor_type executor_type;
+
+    explicit initiate_async_write_dynbuf_v2(AsyncWriteStream& stream)
+      : stream_(stream)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return stream_.get_executor();
+    }
+
+    template <typename WriteHandler, typename DynamicBuffer_v2,
+        typename CompletionCondition>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        ASIO_MOVE_ARG(DynamicBuffer_v2) buffers,
+        ASIO_MOVE_ARG(CompletionCondition) completion_cond) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      non_const_lvalue<WriteHandler> handler2(handler);
+      non_const_lvalue<CompletionCondition> completion_cond2(completion_cond);
+      write_dynbuf_v2_op<AsyncWriteStream,
+        typename decay<DynamicBuffer_v2>::type,
+          CompletionCondition, typename decay<WriteHandler>::type>(
+            stream_, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+              completion_cond2.value, handler2.value)(
+                asio::error_code(), 0, 1);
+    }
+
+  private:
+    AsyncWriteStream& stream_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncWriteStream, typename DynamicBuffer_v2,
+    typename CompletionCondition, typename WriteHandler, typename Allocator>
+struct associated_allocator<
+    detail::write_dynbuf_v2_op<AsyncWriteStream,
+      DynamicBuffer_v2, CompletionCondition, WriteHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<WriteHandler, Allocator>::type type;
+
+  static type get(
+      const detail::write_dynbuf_v2_op<AsyncWriteStream,
+        DynamicBuffer_v2, CompletionCondition, WriteHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<WriteHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncWriteStream, typename DynamicBuffer_v2,
+    typename CompletionCondition, typename WriteHandler, typename Executor>
+struct associated_executor<
+    detail::write_dynbuf_v2_op<AsyncWriteStream,
+      DynamicBuffer_v2, CompletionCondition, WriteHandler>,
+    Executor>
+{
+  typedef typename associated_executor<WriteHandler, Executor>::type type;
+
+  static type get(
+      const detail::write_dynbuf_v2_op<AsyncWriteStream,
+        DynamicBuffer_v2, CompletionCondition, WriteHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<WriteHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncWriteStream, typename DynamicBuffer_v2,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s, DynamicBuffer_v2 buffers,
+    ASIO_MOVE_ARG(WriteHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  return async_write(s,
+      ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+      transfer_all(), ASIO_MOVE_CAST(WriteHandler)(handler));
+}
+
+template <typename AsyncWriteStream,
+    typename DynamicBuffer_v2, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type*)
+{
+  return async_initiate<WriteHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_write_dynbuf_v2<AsyncWriteStream>(s),
+      handler, ASIO_MOVE_CAST(DynamicBuffer_v2)(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_WRITE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/write_at.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/write_at.hpp
new file mode 100644
index 00000000000..4fa9fce09d7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/impl/write_at.hpp
@@ -0,0 +1,624 @@
+//
+// impl/write_at.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IMPL_WRITE_AT_HPP
+#define ASIO_IMPL_WRITE_AT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/associated_allocator.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/buffer.hpp"
+#include "asio/completion_condition.hpp"
+#include "asio/detail/array_fwd.hpp"
+#include "asio/detail/base_from_completion_cond.hpp"
+#include "asio/detail/bind_handler.hpp"
+#include "asio/detail/consuming_buffers.hpp"
+#include "asio/detail/dependent_type.hpp"
+#include "asio/detail/handler_alloc_helpers.hpp"
+#include "asio/detail/handler_cont_helpers.hpp"
+#include "asio/detail/handler_invoke_helpers.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/throw_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail
+{
+  template <typename SyncRandomAccessWriteDevice, typename ConstBufferSequence,
+      typename ConstBufferIterator, typename CompletionCondition>
+  std::size_t write_at_buffer_sequence(SyncRandomAccessWriteDevice& d,
+      uint64_t offset, const ConstBufferSequence& buffers,
+      const ConstBufferIterator&, CompletionCondition completion_condition,
+      asio::error_code& ec)
+  {
+    ec = asio::error_code();
+    asio::detail::consuming_buffers<const_buffer,
+        ConstBufferSequence, ConstBufferIterator> tmp(buffers);
+    while (!tmp.empty())
+    {
+      if (std::size_t max_size = detail::adapt_completion_condition_result(
+            completion_condition(ec, tmp.total_consumed())))
+      {
+        tmp.consume(d.write_some_at(offset + tmp.total_consumed(),
+              tmp.prepare(max_size), ec));
+      }
+      else
+        break;
+    }
+    return tmp.total_consumed();;
+  }
+} // namespace detail
+
+template <typename SyncRandomAccessWriteDevice, typename ConstBufferSequence,
+    typename CompletionCondition>
+std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition, asio::error_code& ec)
+{
+  return detail::write_at_buffer_sequence(d, offset, buffers,
+      asio::buffer_sequence_begin(buffers),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+}
+
+template <typename SyncRandomAccessWriteDevice, typename ConstBufferSequence>
+inline std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, const ConstBufferSequence& buffers)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = write_at(
+      d, offset, buffers, transfer_all(), ec);
+  asio::detail::throw_error(ec, "write_at");
+  return bytes_transferred;
+}
+
+template <typename SyncRandomAccessWriteDevice, typename ConstBufferSequence>
+inline std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, const ConstBufferSequence& buffers,
+    asio::error_code& ec)
+{
+  return write_at(d, offset, buffers, transfer_all(), ec);
+}
+
+template <typename SyncRandomAccessWriteDevice, typename ConstBufferSequence,
+    typename CompletionCondition>
+inline std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = write_at(d, offset, buffers,
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  asio::detail::throw_error(ec, "write_at");
+  return bytes_transferred;
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+template <typename SyncRandomAccessWriteDevice, typename Allocator,
+    typename CompletionCondition>
+std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition, asio::error_code& ec)
+{
+  std::size_t bytes_transferred = write_at(d, offset, b.data(),
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  b.consume(bytes_transferred);
+  return bytes_transferred;
+}
+
+template <typename SyncRandomAccessWriteDevice, typename Allocator>
+inline std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = write_at(d, offset, b, transfer_all(), ec);
+  asio::detail::throw_error(ec, "write_at");
+  return bytes_transferred;
+}
+
+template <typename SyncRandomAccessWriteDevice, typename Allocator>
+inline std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b,
+    asio::error_code& ec)
+{
+  return write_at(d, offset, b, transfer_all(), ec);
+}
+
+template <typename SyncRandomAccessWriteDevice, typename Allocator,
+    typename CompletionCondition>
+inline std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition)
+{
+  asio::error_code ec;
+  std::size_t bytes_transferred = write_at(d, offset, b,
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition), ec);
+  asio::detail::throw_error(ec, "write_at");
+  return bytes_transferred;
+}
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+namespace detail
+{
+  template <typename AsyncRandomAccessWriteDevice,
+      typename ConstBufferSequence, typename ConstBufferIterator,
+      typename CompletionCondition, typename WriteHandler>
+  class write_at_op
+    : detail::base_from_completion_cond<CompletionCondition>
+  {
+  public:
+    write_at_op(AsyncRandomAccessWriteDevice& device,
+        uint64_t offset, const ConstBufferSequence& buffers,
+        CompletionCondition& completion_condition, WriteHandler& handler)
+      : detail::base_from_completion_cond<
+          CompletionCondition>(completion_condition),
+        device_(device),
+        offset_(offset),
+        buffers_(buffers),
+        start_(0),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    write_at_op(const write_at_op& other)
+      : detail::base_from_completion_cond<CompletionCondition>(other),
+        device_(other.device_),
+        offset_(other.offset_),
+        buffers_(other.buffers_),
+        start_(other.start_),
+        handler_(other.handler_)
+    {
+    }
+
+    write_at_op(write_at_op&& other)
+      : detail::base_from_completion_cond<CompletionCondition>(
+          ASIO_MOVE_CAST(detail::base_from_completion_cond<
+            CompletionCondition>)(other)),
+        device_(other.device_),
+        offset_(other.offset_),
+        buffers_(ASIO_MOVE_CAST(buffers_type)(other.buffers_)),
+        start_(other.start_),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        std::size_t bytes_transferred, int start = 0)
+    {
+      std::size_t max_size;
+      switch (start_ = start)
+      {
+        case 1:
+        max_size = this->check_for_completion(ec, buffers_.total_consumed());
+        do
+        {
+          device_.async_write_some_at(
+              offset_ + buffers_.total_consumed(), buffers_.prepare(max_size),
+              ASIO_MOVE_CAST(write_at_op)(*this));
+          return; default:
+          buffers_.consume(bytes_transferred);
+          if ((!ec && bytes_transferred == 0) || buffers_.empty())
+            break;
+          max_size = this->check_for_completion(ec, buffers_.total_consumed());
+        } while (max_size > 0);
+
+        handler_(ec, buffers_.total_consumed());
+      }
+    }
+
+  //private:
+    typedef asio::detail::consuming_buffers<const_buffer,
+        ConstBufferSequence, ConstBufferIterator> buffers_type;
+
+    AsyncRandomAccessWriteDevice& device_;
+    uint64_t offset_;
+    buffers_type buffers_;
+    int start_;
+    WriteHandler handler_;
+  };
+
+  template <typename AsyncRandomAccessWriteDevice,
+      typename ConstBufferSequence, typename ConstBufferIterator,
+      typename CompletionCondition, typename WriteHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      write_at_op<AsyncRandomAccessWriteDevice, ConstBufferSequence,
+        ConstBufferIterator, CompletionCondition, WriteHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename AsyncRandomAccessWriteDevice,
+      typename ConstBufferSequence, typename ConstBufferIterator,
+      typename CompletionCondition, typename WriteHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      write_at_op<AsyncRandomAccessWriteDevice, ConstBufferSequence,
+        ConstBufferIterator, CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename AsyncRandomAccessWriteDevice,
+      typename ConstBufferSequence, typename ConstBufferIterator,
+      typename CompletionCondition, typename WriteHandler>
+  inline bool asio_handler_is_continuation(
+      write_at_op<AsyncRandomAccessWriteDevice, ConstBufferSequence,
+        ConstBufferIterator, CompletionCondition, WriteHandler>* this_handler)
+  {
+    return this_handler->start_ == 0 ? true
+      : asio_handler_cont_helpers::is_continuation(
+          this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncRandomAccessWriteDevice,
+      typename ConstBufferSequence, typename ConstBufferIterator,
+      typename CompletionCondition, typename WriteHandler>
+  inline void asio_handler_invoke(Function& function,
+      write_at_op<AsyncRandomAccessWriteDevice, ConstBufferSequence,
+        ConstBufferIterator, CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename AsyncRandomAccessWriteDevice,
+      typename ConstBufferSequence, typename ConstBufferIterator,
+      typename CompletionCondition, typename WriteHandler>
+  inline void asio_handler_invoke(const Function& function,
+      write_at_op<AsyncRandomAccessWriteDevice, ConstBufferSequence,
+        ConstBufferIterator, CompletionCondition, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncRandomAccessWriteDevice,
+      typename ConstBufferSequence, typename ConstBufferIterator,
+      typename CompletionCondition, typename WriteHandler>
+  inline void start_write_at_buffer_sequence_op(AsyncRandomAccessWriteDevice& d,
+      uint64_t offset, const ConstBufferSequence& buffers,
+      const ConstBufferIterator&, CompletionCondition& completion_condition,
+      WriteHandler& handler)
+  {
+    detail::write_at_op<AsyncRandomAccessWriteDevice, ConstBufferSequence,
+      ConstBufferIterator, CompletionCondition, WriteHandler>(
+        d, offset, buffers, completion_condition, handler)(
+          asio::error_code(), 0, 1);
+  }
+
+  template <typename AsyncRandomAccessWriteDevice>
+  class initiate_async_write_at_buffer_sequence
+  {
+  public:
+    typedef typename AsyncRandomAccessWriteDevice::executor_type executor_type;
+
+    explicit initiate_async_write_at_buffer_sequence(
+        AsyncRandomAccessWriteDevice& device)
+      : device_(device)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return device_.get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence,
+        typename CompletionCondition>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        uint64_t offset, const ConstBufferSequence& buffers,
+        ASIO_MOVE_ARG(CompletionCondition) completion_cond) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      non_const_lvalue<WriteHandler> handler2(handler);
+      non_const_lvalue<CompletionCondition> completion_cond2(completion_cond);
+      start_write_at_buffer_sequence_op(device_, offset, buffers,
+          asio::buffer_sequence_begin(buffers),
+          completion_cond2.value, handler2.value);
+    }
+
+  private:
+    AsyncRandomAccessWriteDevice& device_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncRandomAccessWriteDevice,
+    typename ConstBufferSequence, typename ConstBufferIterator,
+    typename CompletionCondition, typename WriteHandler, typename Allocator>
+struct associated_allocator<
+    detail::write_at_op<AsyncRandomAccessWriteDevice, ConstBufferSequence,
+      ConstBufferIterator, CompletionCondition, WriteHandler>,
+    Allocator>
+{
+  typedef typename associated_allocator<WriteHandler, Allocator>::type type;
+
+  static type get(
+      const detail::write_at_op<AsyncRandomAccessWriteDevice,
+        ConstBufferSequence, ConstBufferIterator,
+        CompletionCondition, WriteHandler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<WriteHandler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename AsyncRandomAccessWriteDevice,
+    typename ConstBufferSequence, typename ConstBufferIterator,
+    typename CompletionCondition, typename WriteHandler, typename Executor>
+struct associated_executor<
+    detail::write_at_op<AsyncRandomAccessWriteDevice, ConstBufferSequence,
+      ConstBufferIterator, CompletionCondition, WriteHandler>,
+    Executor>
+{
+  typedef typename associated_executor<WriteHandler, Executor>::type type;
+
+  static type get(
+      const detail::write_at_op<AsyncRandomAccessWriteDevice,
+        ConstBufferSequence, ConstBufferIterator,
+        CompletionCondition, WriteHandler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<WriteHandler, Executor>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncRandomAccessWriteDevice,
+    typename ConstBufferSequence, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write_at(AsyncRandomAccessWriteDevice& d,
+    uint64_t offset, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler)
+{
+  return async_initiate<WriteHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_write_at_buffer_sequence<
+        AsyncRandomAccessWriteDevice>(d),
+      handler, offset, buffers,
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+template <typename AsyncRandomAccessWriteDevice, typename ConstBufferSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write_at(AsyncRandomAccessWriteDevice& d,
+    uint64_t offset, const ConstBufferSequence& buffers,
+    ASIO_MOVE_ARG(WriteHandler) handler)
+{
+  return async_initiate<WriteHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_write_at_buffer_sequence<
+        AsyncRandomAccessWriteDevice>(d),
+      handler, offset, buffers, transfer_all());
+}
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+namespace detail
+{
+  template <typename Allocator, typename WriteHandler>
+  class write_at_streambuf_op
+  {
+  public:
+    write_at_streambuf_op(
+        asio::basic_streambuf<Allocator>& streambuf,
+        WriteHandler& handler)
+      : streambuf_(streambuf),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(handler))
+    {
+    }
+
+#if defined(ASIO_HAS_MOVE)
+    write_at_streambuf_op(const write_at_streambuf_op& other)
+      : streambuf_(other.streambuf_),
+        handler_(other.handler_)
+    {
+    }
+
+    write_at_streambuf_op(write_at_streambuf_op&& other)
+      : streambuf_(other.streambuf_),
+        handler_(ASIO_MOVE_CAST(WriteHandler)(other.handler_))
+    {
+    }
+#endif // defined(ASIO_HAS_MOVE)
+
+    void operator()(const asio::error_code& ec,
+        const std::size_t bytes_transferred)
+    {
+      streambuf_.consume(bytes_transferred);
+      handler_(ec, bytes_transferred);
+    }
+
+  //private:
+    asio::basic_streambuf<Allocator>& streambuf_;
+    WriteHandler handler_;
+  };
+
+  template <typename Allocator, typename WriteHandler>
+  inline void* asio_handler_allocate(std::size_t size,
+      write_at_streambuf_op<Allocator, WriteHandler>* this_handler)
+  {
+    return asio_handler_alloc_helpers::allocate(
+        size, this_handler->handler_);
+  }
+
+  template <typename Allocator, typename WriteHandler>
+  inline void asio_handler_deallocate(void* pointer, std::size_t size,
+      write_at_streambuf_op<Allocator, WriteHandler>* this_handler)
+  {
+    asio_handler_alloc_helpers::deallocate(
+        pointer, size, this_handler->handler_);
+  }
+
+  template <typename Allocator, typename WriteHandler>
+  inline bool asio_handler_is_continuation(
+      write_at_streambuf_op<Allocator, WriteHandler>* this_handler)
+  {
+    return asio_handler_cont_helpers::is_continuation(
+        this_handler->handler_);
+  }
+
+  template <typename Function, typename Allocator, typename WriteHandler>
+  inline void asio_handler_invoke(Function& function,
+      write_at_streambuf_op<Allocator, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename Function, typename Allocator, typename WriteHandler>
+  inline void asio_handler_invoke(const Function& function,
+      write_at_streambuf_op<Allocator, WriteHandler>* this_handler)
+  {
+    asio_handler_invoke_helpers::invoke(
+        function, this_handler->handler_);
+  }
+
+  template <typename AsyncRandomAccessWriteDevice>
+  class initiate_async_write_at_streambuf
+  {
+  public:
+    typedef typename AsyncRandomAccessWriteDevice::executor_type executor_type;
+
+    explicit initiate_async_write_at_streambuf(
+        AsyncRandomAccessWriteDevice& device)
+      : device_(device)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return device_.get_executor();
+    }
+
+    template <typename WriteHandler,
+        typename Allocator, typename CompletionCondition>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        uint64_t offset, basic_streambuf<Allocator>* b,
+        ASIO_MOVE_ARG(CompletionCondition) completion_condition) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      non_const_lvalue<WriteHandler> handler2(handler);
+      async_write_at(device_, offset, b->data(),
+          ASIO_MOVE_CAST(CompletionCondition)(completion_condition),
+          write_at_streambuf_op<Allocator, typename decay<WriteHandler>::type>(
+            *b, handler2.value));
+    }
+
+  private:
+    AsyncRandomAccessWriteDevice& device_;
+  };
+} // namespace detail
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+template <typename Allocator, typename WriteHandler, typename Allocator1>
+struct associated_allocator<
+    detail::write_at_streambuf_op<Allocator, WriteHandler>,
+    Allocator1>
+{
+  typedef typename associated_allocator<WriteHandler, Allocator1>::type type;
+
+  static type get(
+      const detail::write_at_streambuf_op<Allocator, WriteHandler>& h,
+      const Allocator1& a = Allocator1()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<WriteHandler, Allocator1>::get(h.handler_, a);
+  }
+};
+
+template <typename Executor, typename WriteHandler, typename Executor1>
+struct associated_executor<
+    detail::write_at_streambuf_op<Executor, WriteHandler>,
+    Executor1>
+{
+  typedef typename associated_executor<WriteHandler, Executor1>::type type;
+
+  static type get(
+      const detail::write_at_streambuf_op<Executor, WriteHandler>& h,
+      const Executor1& ex = Executor1()) ASIO_NOEXCEPT
+  {
+    return associated_executor<WriteHandler, Executor1>::get(h.handler_, ex);
+  }
+};
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+template <typename AsyncRandomAccessWriteDevice,
+    typename Allocator, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write_at(AsyncRandomAccessWriteDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler)
+{
+  return async_initiate<WriteHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_write_at_streambuf<
+        AsyncRandomAccessWriteDevice>(d),
+      handler, offset, &b,
+      ASIO_MOVE_CAST(CompletionCondition)(completion_condition));
+}
+
+template <typename AsyncRandomAccessWriteDevice, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler>
+inline ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write_at(AsyncRandomAccessWriteDevice& d,
+    uint64_t offset, asio::basic_streambuf<Allocator>& b,
+    ASIO_MOVE_ARG(WriteHandler) handler)
+{
+  return async_initiate<WriteHandler,
+    void (asio::error_code, std::size_t)>(
+      detail::initiate_async_write_at_streambuf<
+        AsyncRandomAccessWriteDevice>(d),
+      handler, offset, &b, transfer_all());
+}
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IMPL_WRITE_AT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_context.hpp
new file mode 100644
index 00000000000..d9bd4f6c3ac
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_context.hpp
@@ -0,0 +1,872 @@
+//
+// io_context.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IO_CONTEXT_HPP
+#define ASIO_IO_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include <stdexcept>
+#include <typeinfo>
+#include "asio/async_result.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/wrapped_handler.hpp"
+#include "asio/error_code.hpp"
+#include "asio/execution_context.hpp"
+
+#if defined(ASIO_HAS_CHRONO)
+# include "asio/detail/chrono.hpp"
+#endif // defined(ASIO_HAS_CHRONO)
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+# include "asio/detail/winsock_init.hpp"
+#elif defined(__sun) || defined(__QNX__) || defined(__hpux) || defined(_AIX) \
+  || defined(__osf__)
+# include "asio/detail/signal_init.hpp"
+#endif
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail {
+#if defined(ASIO_HAS_IOCP)
+  typedef class win_iocp_io_context io_context_impl;
+  class win_iocp_overlapped_ptr;
+#else
+  typedef class scheduler io_context_impl;
+#endif
+} // namespace detail
+
+/// Provides core I/O functionality.
+/**
+ * The io_context class provides the core I/O functionality for users of the
+ * asynchronous I/O objects, including:
+ *
+ * @li asio::ip::tcp::socket
+ * @li asio::ip::tcp::acceptor
+ * @li asio::ip::udp::socket
+ * @li asio::deadline_timer.
+ *
+ * The io_context class also includes facilities intended for developers of
+ * custom asynchronous services.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Safe, with the specific exceptions of the restart()
+ * and notify_fork() functions. Calling restart() while there are unfinished
+ * run(), run_one(), run_for(), run_until(), poll() or poll_one() calls results
+ * in undefined behaviour. The notify_fork() function should not be called
+ * while any io_context function, or any function on an I/O object that is
+ * associated with the io_context, is being called in another thread.
+ *
+ * @par Concepts:
+ * Dispatcher.
+ *
+ * @par Synchronous and asynchronous operations
+ *
+ * Synchronous operations on I/O objects implicitly run the io_context object
+ * for an individual operation. The io_context functions run(), run_one(),
+ * run_for(), run_until(), poll() or poll_one() must be called for the
+ * io_context to perform asynchronous operations on behalf of a C++ program.
+ * Notification that an asynchronous operation has completed is delivered by
+ * invocation of the associated handler. Handlers are invoked only by a thread
+ * that is currently calling any overload of run(), run_one(), run_for(),
+ * run_until(), poll() or poll_one() for the io_context.
+ *
+ * @par Effect of exceptions thrown from handlers
+ *
+ * If an exception is thrown from a handler, the exception is allowed to
+ * propagate through the throwing thread's invocation of run(), run_one(),
+ * run_for(), run_until(), poll() or poll_one(). No other threads that are
+ * calling any of these functions are affected. It is then the responsibility
+ * of the application to catch the exception.
+ *
+ * After the exception has been caught, the run(), run_one(), run_for(),
+ * run_until(), poll() or poll_one() call may be restarted @em without the need
+ * for an intervening call to restart(). This allows the thread to rejoin the
+ * io_context object's thread pool without impacting any other threads in the
+ * pool.
+ *
+ * For example:
+ *
+ * @code
+ * asio::io_context io_context;
+ * ...
+ * for (;;)
+ * {
+ *   try
+ *   {
+ *     io_context.run();
+ *     break; // run() exited normally
+ *   }
+ *   catch (my_exception& e)
+ *   {
+ *     // Deal with exception as appropriate.
+ *   }
+ * }
+ * @endcode
+ *
+ * @par Submitting arbitrary tasks to the io_context
+ *
+ * To submit functions to the io_context, use the @ref asio::dispatch,
+ * @ref asio::post or @ref asio::defer free functions.
+ *
+ * For example:
+ *
+ * @code void my_task()
+ * {
+ *   ...
+ * }
+ *
+ * ...
+ *
+ * asio::io_context io_context;
+ *
+ * // Submit a function to the io_context.
+ * asio::post(io_context, my_task);
+ *
+ * // Submit a lambda object to the io_context.
+ * asio::post(io_context,
+ *     []()
+ *     {
+ *       ...
+ *     });
+ *
+ * // Run the io_context until it runs out of work.
+ * io_context.run(); @endcode
+ *
+ * @par Stopping the io_context from running out of work
+ *
+ * Some applications may need to prevent an io_context object's run() call from
+ * returning when there is no more work to do. For example, the io_context may
+ * be being run in a background thread that is launched prior to the
+ * application's asynchronous operations. The run() call may be kept running by
+ * creating an object of type
+ * asio::executor_work_guard<io_context::executor_type>:
+ *
+ * @code asio::io_context io_context;
+ * asio::executor_work_guard<asio::io_context::executor_type>
+ *   = asio::make_work_guard(io_context);
+ * ... @endcode
+ *
+ * To effect a shutdown, the application will then need to call the io_context
+ * object's stop() member function. This will cause the io_context run() call
+ * to return as soon as possible, abandoning unfinished operations and without
+ * permitting ready handlers to be dispatched.
+ *
+ * Alternatively, if the application requires that all operations and handlers
+ * be allowed to finish normally, the work object may be explicitly reset.
+ *
+ * @code asio::io_context io_context;
+ * asio::executor_work_guard<asio::io_context::executor_type>
+ *   = asio::make_work_guard(io_context);
+ * ...
+ * work.reset(); // Allow run() to exit. @endcode
+ */
+class io_context
+  : public execution_context
+{
+private:
+  typedef detail::io_context_impl impl_type;
+#if defined(ASIO_HAS_IOCP)
+  friend class detail::win_iocp_overlapped_ptr;
+#endif
+
+public:
+  class executor_type;
+  friend class executor_type;
+
+#if !defined(ASIO_NO_DEPRECATED)
+  class work;
+  friend class work;
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  class service;
+
+#if !defined(ASIO_NO_EXTENSIONS)
+  class strand;
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+  /// The type used to count the number of handlers executed by the context.
+  typedef std::size_t count_type;
+
+  /// Constructor.
+  ASIO_DECL io_context();
+
+  /// Constructor.
+  /**
+   * Construct with a hint about the required level of concurrency.
+   *
+   * @param concurrency_hint A suggestion to the implementation on how many
+   * threads it should allow to run simultaneously.
+   */
+  ASIO_DECL explicit io_context(int concurrency_hint);
+
+  /// Destructor.
+  /**
+   * On destruction, the io_context performs the following sequence of
+   * operations:
+   *
+   * @li For each service object @c svc in the io_context set, in reverse order
+   * of the beginning of service object lifetime, performs
+   * @c svc->shutdown().
+   *
+   * @li Uninvoked handler objects that were scheduled for deferred invocation
+   * on the io_context, or any associated strand, are destroyed.
+   *
+   * @li For each service object @c svc in the io_context set, in reverse order
+   * of the beginning of service object lifetime, performs
+   * <tt>delete static_cast<io_context::service*>(svc)</tt>.
+   *
+   * @note The destruction sequence described above permits programs to
+   * simplify their resource management by using @c shared_ptr<>. Where an
+   * object's lifetime is tied to the lifetime of a connection (or some other
+   * sequence of asynchronous operations), a @c shared_ptr to the object would
+   * be bound into the handlers for all asynchronous operations associated with
+   * it. This works as follows:
+   *
+   * @li When a single connection ends, all associated asynchronous operations
+   * complete. The corresponding handler objects are destroyed, and all
+   * @c shared_ptr references to the objects are destroyed.
+   *
+   * @li To shut down the whole program, the io_context function stop() is
+   * called to terminate any run() calls as soon as possible. The io_context
+   * destructor defined above destroys all handlers, causing all @c shared_ptr
+   * references to all connection objects to be destroyed.
+   */
+  ASIO_DECL ~io_context();
+
+  /// Obtains the executor associated with the io_context.
+  executor_type get_executor() ASIO_NOEXCEPT;
+
+  /// Run the io_context object's event processing loop.
+  /**
+   * The run() function blocks until all work has finished and there are no
+   * more handlers to be dispatched, or until the io_context has been stopped.
+   *
+   * Multiple threads may call the run() function to set up a pool of threads
+   * from which the io_context may execute handlers. All threads that are
+   * waiting in the pool are equivalent and the io_context may choose any one
+   * of them to invoke a handler.
+   *
+   * A normal exit from the run() function implies that the io_context object
+   * is stopped (the stopped() function returns @c true). Subsequent calls to
+   * run(), run_one(), poll() or poll_one() will return immediately unless there
+   * is a prior call to restart().
+   *
+   * @return The number of handlers that were executed.
+   *
+   * @note Calling the run() function from a thread that is currently calling
+   * one of run(), run_one(), run_for(), run_until(), poll() or poll_one() on
+   * the same io_context object may introduce the potential for deadlock. It is
+   * the caller's reponsibility to avoid this.
+   *
+   * The poll() function may also be used to dispatch ready handlers, but
+   * without blocking.
+   */
+  ASIO_DECL count_type run();
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use non-error_code overload.) Run the io_context object's
+  /// event processing loop.
+  /**
+   * The run() function blocks until all work has finished and there are no
+   * more handlers to be dispatched, or until the io_context has been stopped.
+   *
+   * Multiple threads may call the run() function to set up a pool of threads
+   * from which the io_context may execute handlers. All threads that are
+   * waiting in the pool are equivalent and the io_context may choose any one
+   * of them to invoke a handler.
+   *
+   * A normal exit from the run() function implies that the io_context object
+   * is stopped (the stopped() function returns @c true). Subsequent calls to
+   * run(), run_one(), poll() or poll_one() will return immediately unless there
+   * is a prior call to restart().
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of handlers that were executed.
+   *
+   * @note Calling the run() function from a thread that is currently calling
+   * one of run(), run_one(), run_for(), run_until(), poll() or poll_one() on
+   * the same io_context object may introduce the potential for deadlock. It is
+   * the caller's reponsibility to avoid this.
+   *
+   * The poll() function may also be used to dispatch ready handlers, but
+   * without blocking.
+   */
+  ASIO_DECL count_type run(asio::error_code& ec);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+#if defined(ASIO_HAS_CHRONO) || defined(GENERATING_DOCUMENTATION)
+  /// Run the io_context object's event processing loop for a specified
+  /// duration.
+  /**
+   * The run_for() function blocks until all work has finished and there are no
+   * more handlers to be dispatched, until the io_context has been stopped, or
+   * until the specified duration has elapsed.
+   *
+   * @param rel_time The duration for which the call may block.
+   *
+   * @return The number of handlers that were executed.
+   */
+  template <typename Rep, typename Period>
+  std::size_t run_for(const chrono::duration<Rep, Period>& rel_time);
+
+  /// Run the io_context object's event processing loop until a specified time.
+  /**
+   * The run_until() function blocks until all work has finished and there are
+   * no more handlers to be dispatched, until the io_context has been stopped,
+   * or until the specified time has been reached.
+   *
+   * @param abs_time The time point until which the call may block.
+   *
+   * @return The number of handlers that were executed.
+   */
+  template <typename Clock, typename Duration>
+  std::size_t run_until(const chrono::time_point<Clock, Duration>& abs_time);
+#endif // defined(ASIO_HAS_CHRONO) || defined(GENERATING_DOCUMENTATION)
+
+  /// Run the io_context object's event processing loop to execute at most one
+  /// handler.
+  /**
+   * The run_one() function blocks until one handler has been dispatched, or
+   * until the io_context has been stopped.
+   *
+   * @return The number of handlers that were executed. A zero return value
+   * implies that the io_context object is stopped (the stopped() function
+   * returns @c true). Subsequent calls to run(), run_one(), poll() or
+   * poll_one() will return immediately unless there is a prior call to
+   * restart().
+   *
+   * @note Calling the run_one() function from a thread that is currently
+   * calling one of run(), run_one(), run_for(), run_until(), poll() or
+   * poll_one() on the same io_context object may introduce the potential for
+   * deadlock. It is the caller's reponsibility to avoid this.
+   */
+  ASIO_DECL count_type run_one();
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use non-error_code overlaod.) Run the io_context object's
+  /// event processing loop to execute at most one handler.
+  /**
+   * The run_one() function blocks until one handler has been dispatched, or
+   * until the io_context has been stopped.
+   *
+   * @return The number of handlers that were executed. A zero return value
+   * implies that the io_context object is stopped (the stopped() function
+   * returns @c true). Subsequent calls to run(), run_one(), poll() or
+   * poll_one() will return immediately unless there is a prior call to
+   * restart().
+   *
+   * @return The number of handlers that were executed.
+   *
+   * @note Calling the run_one() function from a thread that is currently
+   * calling one of run(), run_one(), run_for(), run_until(), poll() or
+   * poll_one() on the same io_context object may introduce the potential for
+   * deadlock. It is the caller's reponsibility to avoid this.
+   */
+  ASIO_DECL count_type run_one(asio::error_code& ec);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+#if defined(ASIO_HAS_CHRONO) || defined(GENERATING_DOCUMENTATION)
+  /// Run the io_context object's event processing loop for a specified duration
+  /// to execute at most one handler.
+  /**
+   * The run_one_for() function blocks until one handler has been dispatched,
+   * until the io_context has been stopped, or until the specified duration has
+   * elapsed.
+   *
+   * @param rel_time The duration for which the call may block.
+   *
+   * @return The number of handlers that were executed.
+   */
+  template <typename Rep, typename Period>
+  std::size_t run_one_for(const chrono::duration<Rep, Period>& rel_time);
+
+  /// Run the io_context object's event processing loop until a specified time
+  /// to execute at most one handler.
+  /**
+   * The run_one_until() function blocks until one handler has been dispatched,
+   * until the io_context has been stopped, or until the specified time has
+   * been reached.
+   *
+   * @param abs_time The time point until which the call may block.
+   *
+   * @return The number of handlers that were executed.
+   */
+  template <typename Clock, typename Duration>
+  std::size_t run_one_until(
+      const chrono::time_point<Clock, Duration>& abs_time);
+#endif // defined(ASIO_HAS_CHRONO) || defined(GENERATING_DOCUMENTATION)
+
+  /// Run the io_context object's event processing loop to execute ready
+  /// handlers.
+  /**
+   * The poll() function runs handlers that are ready to run, without blocking,
+   * until the io_context has been stopped or there are no more ready handlers.
+   *
+   * @return The number of handlers that were executed.
+   */
+  ASIO_DECL count_type poll();
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use non-error_code overload.) Run the io_context object's
+  /// event processing loop to execute ready handlers.
+  /**
+   * The poll() function runs handlers that are ready to run, without blocking,
+   * until the io_context has been stopped or there are no more ready handlers.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of handlers that were executed.
+   */
+  ASIO_DECL count_type poll(asio::error_code& ec);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Run the io_context object's event processing loop to execute one ready
+  /// handler.
+  /**
+   * The poll_one() function runs at most one handler that is ready to run,
+   * without blocking.
+   *
+   * @return The number of handlers that were executed.
+   */
+  ASIO_DECL count_type poll_one();
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use non-error_code overload.) Run the io_context object's
+  /// event processing loop to execute one ready handler.
+  /**
+   * The poll_one() function runs at most one handler that is ready to run,
+   * without blocking.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @return The number of handlers that were executed.
+   */
+  ASIO_DECL count_type poll_one(asio::error_code& ec);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Stop the io_context object's event processing loop.
+  /**
+   * This function does not block, but instead simply signals the io_context to
+   * stop. All invocations of its run() or run_one() member functions should
+   * return as soon as possible. Subsequent calls to run(), run_one(), poll()
+   * or poll_one() will return immediately until restart() is called.
+   */
+  ASIO_DECL void stop();
+
+  /// Determine whether the io_context object has been stopped.
+  /**
+   * This function is used to determine whether an io_context object has been
+   * stopped, either through an explicit call to stop(), or due to running out
+   * of work. When an io_context object is stopped, calls to run(), run_one(),
+   * poll() or poll_one() will return immediately without invoking any
+   * handlers.
+   *
+   * @return @c true if the io_context object is stopped, otherwise @c false.
+   */
+  ASIO_DECL bool stopped() const;
+
+  /// Restart the io_context in preparation for a subsequent run() invocation.
+  /**
+   * This function must be called prior to any second or later set of
+   * invocations of the run(), run_one(), poll() or poll_one() functions when a
+   * previous invocation of these functions returned due to the io_context
+   * being stopped or running out of work. After a call to restart(), the
+   * io_context object's stopped() function will return @c false.
+   *
+   * This function must not be called while there are any unfinished calls to
+   * the run(), run_one(), poll() or poll_one() functions.
+   */
+  ASIO_DECL void restart();
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use restart().) Reset the io_context in preparation for a
+  /// subsequent run() invocation.
+  /**
+   * This function must be called prior to any second or later set of
+   * invocations of the run(), run_one(), poll() or poll_one() functions when a
+   * previous invocation of these functions returned due to the io_context
+   * being stopped or running out of work. After a call to restart(), the
+   * io_context object's stopped() function will return @c false.
+   *
+   * This function must not be called while there are any unfinished calls to
+   * the run(), run_one(), poll() or poll_one() functions.
+   */
+  void reset();
+
+  /// (Deprecated: Use asio::dispatch().) Request the io_context to
+  /// invoke the given handler.
+  /**
+   * This function is used to ask the io_context to execute the given handler.
+   *
+   * The io_context guarantees that the handler will only be called in a thread
+   * in which the run(), run_one(), poll() or poll_one() member functions is
+   * currently being invoked. The handler may be executed inside this function
+   * if the guarantee can be met.
+   *
+   * @param handler The handler to be called. The io_context will make
+   * a copy of the handler object as required. The function signature of the
+   * handler must be: @code void handler(); @endcode
+   *
+   * @note This function throws an exception only if:
+   *
+   * @li the handler's @c asio_handler_allocate function; or
+   *
+   * @li the handler's copy constructor
+   *
+   * throws an exception.
+   */
+  template <typename LegacyCompletionHandler>
+  ASIO_INITFN_AUTO_RESULT_TYPE(LegacyCompletionHandler, void ())
+  dispatch(ASIO_MOVE_ARG(LegacyCompletionHandler) handler);
+
+  /// (Deprecated: Use asio::post().) Request the io_context to invoke
+  /// the given handler and return immediately.
+  /**
+   * This function is used to ask the io_context to execute the given handler,
+   * but without allowing the io_context to call the handler from inside this
+   * function.
+   *
+   * The io_context guarantees that the handler will only be called in a thread
+   * in which the run(), run_one(), poll() or poll_one() member functions is
+   * currently being invoked.
+   *
+   * @param handler The handler to be called. The io_context will make
+   * a copy of the handler object as required. The function signature of the
+   * handler must be: @code void handler(); @endcode
+   *
+   * @note This function throws an exception only if:
+   *
+   * @li the handler's @c asio_handler_allocate function; or
+   *
+   * @li the handler's copy constructor
+   *
+   * throws an exception.
+   */
+  template <typename LegacyCompletionHandler>
+  ASIO_INITFN_AUTO_RESULT_TYPE(LegacyCompletionHandler, void ())
+  post(ASIO_MOVE_ARG(LegacyCompletionHandler) handler);
+
+  /// (Deprecated: Use asio::bind_executor().) Create a new handler that
+  /// automatically dispatches the wrapped handler on the io_context.
+  /**
+   * This function is used to create a new handler function object that, when
+   * invoked, will automatically pass the wrapped handler to the io_context
+   * object's dispatch function.
+   *
+   * @param handler The handler to be wrapped. The io_context will make a copy
+   * of the handler object as required. The function signature of the handler
+   * must be: @code void handler(A1 a1, ... An an); @endcode
+   *
+   * @return A function object that, when invoked, passes the wrapped handler to
+   * the io_context object's dispatch function. Given a function object with the
+   * signature:
+   * @code R f(A1 a1, ... An an); @endcode
+   * If this function object is passed to the wrap function like so:
+   * @code io_context.wrap(f); @endcode
+   * then the return value is a function object with the signature
+   * @code void g(A1 a1, ... An an); @endcode
+   * that, when invoked, executes code equivalent to:
+   * @code io_context.dispatch(boost::bind(f, a1, ... an)); @endcode
+   */
+  template <typename Handler>
+#if defined(GENERATING_DOCUMENTATION)
+  unspecified
+#else
+  detail::wrapped_handler<io_context&, Handler>
+#endif
+  wrap(Handler handler);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+private:
+#if !defined(ASIO_NO_DEPRECATED)
+  struct initiate_dispatch;
+  struct initiate_post;
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  // Helper function to add the implementation.
+  ASIO_DECL impl_type& add_impl(impl_type* impl);
+
+  // Backwards compatible overload for use with services derived from
+  // io_context::service.
+  template <typename Service>
+  friend Service& use_service(io_context& ioc);
+
+#if defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+  detail::winsock_init<> init_;
+#elif defined(__sun) || defined(__QNX__) || defined(__hpux) || defined(_AIX) \
+  || defined(__osf__)
+  detail::signal_init<> init_;
+#endif
+
+  // The implementation.
+  impl_type& impl_;
+};
+
+/// Executor used to submit functions to an io_context.
+class io_context::executor_type
+{
+public:
+  /// Obtain the underlying execution context.
+  io_context& context() const ASIO_NOEXCEPT;
+
+  /// Inform the io_context that it has some outstanding work to do.
+  /**
+   * This function is used to inform the io_context that some work has begun.
+   * This ensures that the io_context's run() and run_one() functions do not
+   * exit while the work is underway.
+   */
+  void on_work_started() const ASIO_NOEXCEPT;
+
+  /// Inform the io_context that some work is no longer outstanding.
+  /**
+   * This function is used to inform the io_context that some work has
+   * finished. Once the count of unfinished work reaches zero, the io_context
+   * is stopped and the run() and run_one() functions may exit.
+   */
+  void on_work_finished() const ASIO_NOEXCEPT;
+
+  /// Request the io_context to invoke the given function object.
+  /**
+   * This function is used to ask the io_context to execute the given function
+   * object. If the current thread is running the io_context, @c dispatch()
+   * executes the function before returning. Otherwise, the function will be
+   * scheduled to run on the io_context.
+   *
+   * @param f The function object to be called. The executor will make a copy
+   * of the handler object as required. The function signature of the function
+   * object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void dispatch(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  /// Request the io_context to invoke the given function object.
+  /**
+   * This function is used to ask the io_context to execute the given function
+   * object. The function object will never be executed inside @c post().
+   * Instead, it will be scheduled to run on the io_context.
+   *
+   * @param f The function object to be called. The executor will make a copy
+   * of the handler object as required. The function signature of the function
+   * object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void post(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  /// Request the io_context to invoke the given function object.
+  /**
+   * This function is used to ask the io_context to execute the given function
+   * object. The function object will never be executed inside @c defer().
+   * Instead, it will be scheduled to run on the io_context.
+   *
+   * If the current thread belongs to the io_context, @c defer() will delay
+   * scheduling the function object until the current thread returns control to
+   * the pool.
+   *
+   * @param f The function object to be called. The executor will make a copy
+   * of the handler object as required. The function signature of the function
+   * object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void defer(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  /// Determine whether the io_context is running in the current thread.
+  /**
+   * @return @c true if the current thread is running the io_context. Otherwise
+   * returns @c false.
+   */
+  bool running_in_this_thread() const ASIO_NOEXCEPT;
+
+  /// Compare two executors for equality.
+  /**
+   * Two executors are equal if they refer to the same underlying io_context.
+   */
+  friend bool operator==(const executor_type& a,
+      const executor_type& b) ASIO_NOEXCEPT
+  {
+    return &a.io_context_ == &b.io_context_;
+  }
+
+  /// Compare two executors for inequality.
+  /**
+   * Two executors are equal if they refer to the same underlying io_context.
+   */
+  friend bool operator!=(const executor_type& a,
+      const executor_type& b) ASIO_NOEXCEPT
+  {
+    return &a.io_context_ != &b.io_context_;
+  }
+
+private:
+  friend class io_context;
+
+  // Constructor.
+  explicit executor_type(io_context& i) : io_context_(i) {}
+
+  // The underlying io_context.
+  io_context& io_context_;
+};
+
+#if !defined(ASIO_NO_DEPRECATED)
+/// (Deprecated: Use executor_work_guard.) Class to inform the io_context when
+/// it has work to do.
+/**
+ * The work class is used to inform the io_context when work starts and
+ * finishes. This ensures that the io_context object's run() function will not
+ * exit while work is underway, and that it does exit when there is no
+ * unfinished work remaining.
+ *
+ * The work class is copy-constructible so that it may be used as a data member
+ * in a handler class. It is not assignable.
+ */
+class io_context::work
+{
+public:
+  /// Constructor notifies the io_context that work is starting.
+  /**
+   * The constructor is used to inform the io_context that some work has begun.
+   * This ensures that the io_context object's run() function will not exit
+   * while the work is underway.
+   */
+  explicit work(asio::io_context& io_context);
+
+  /// Copy constructor notifies the io_context that work is starting.
+  /**
+   * The constructor is used to inform the io_context that some work has begun.
+   * This ensures that the io_context object's run() function will not exit
+   * while the work is underway.
+   */
+  work(const work& other);
+
+  /// Destructor notifies the io_context that the work is complete.
+  /**
+   * The destructor is used to inform the io_context that some work has
+   * finished. Once the count of unfinished work reaches zero, the io_context
+   * object's run() function is permitted to exit.
+   */
+  ~work();
+
+  /// Get the io_context associated with the work.
+  asio::io_context& get_io_context();
+
+private:
+  // Prevent assignment.
+  void operator=(const work& other);
+
+  // The io_context implementation.
+  detail::io_context_impl& io_context_impl_;
+};
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+/// Base class for all io_context services.
+class io_context::service
+  : public execution_context::service
+{
+public:
+  /// Get the io_context object that owns the service.
+  asio::io_context& get_io_context();
+
+private:
+  /// Destroy all user-defined handler objects owned by the service.
+  ASIO_DECL virtual void shutdown();
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use shutdown().) Destroy all user-defined handler objects
+  /// owned by the service.
+  ASIO_DECL virtual void shutdown_service();
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Handle notification of a fork-related event to perform any necessary
+  /// housekeeping.
+  /**
+   * This function is not a pure virtual so that services only have to
+   * implement it if necessary. The default implementation does nothing.
+   */
+  ASIO_DECL virtual void notify_fork(
+      execution_context::fork_event event);
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use notify_fork().) Handle notification of a fork-related
+  /// event to perform any necessary housekeeping.
+  /**
+   * This function is not a pure virtual so that services only have to
+   * implement it if necessary. The default implementation does nothing.
+   */
+  ASIO_DECL virtual void fork_service(
+      execution_context::fork_event event);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+protected:
+  /// Constructor.
+  /**
+   * @param owner The io_context object that owns the service.
+   */
+  ASIO_DECL service(asio::io_context& owner);
+
+  /// Destructor.
+  ASIO_DECL virtual ~service();
+};
+
+namespace detail {
+
+// Special service base class to keep classes header-file only.
+template <typename Type>
+class service_base
+  : public asio::io_context::service
+{
+public:
+  static asio::detail::service_id<Type> id;
+
+  // Constructor.
+  service_base(asio::io_context& io_context)
+    : asio::io_context::service(io_context)
+  {
+  }
+};
+
+template <typename Type>
+asio::detail::service_id<Type> service_base<Type>::id;
+
+} // namespace detail
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/io_context.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/impl/io_context.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+// If both io_context.hpp and strand.hpp have been included, automatically
+// include the header file needed for the io_context::strand class.
+#if !defined(ASIO_NO_EXTENSIONS)
+# if defined(ASIO_STRAND_HPP)
+#  include "asio/io_context_strand.hpp"
+# endif // defined(ASIO_STRAND_HPP)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+#endif // ASIO_IO_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_context_strand.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_context_strand.hpp
new file mode 100644
index 00000000000..54ad7f5ac0d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_context_strand.hpp
@@ -0,0 +1,374 @@
+//
+// io_context_strand.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IO_CONTEXT_STRAND_HPP
+#define ASIO_IO_CONTEXT_STRAND_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_NO_EXTENSIONS)
+
+#include "asio/async_result.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/strand_service.hpp"
+#include "asio/detail/wrapped_handler.hpp"
+#include "asio/io_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Provides serialised handler execution.
+/**
+ * The io_context::strand class provides the ability to post and dispatch
+ * handlers with the guarantee that none of those handlers will execute
+ * concurrently.
+ *
+ * @par Order of handler invocation
+ * Given:
+ *
+ * @li a strand object @c s
+ *
+ * @li an object @c a meeting completion handler requirements
+ *
+ * @li an object @c a1 which is an arbitrary copy of @c a made by the
+ * implementation
+ *
+ * @li an object @c b meeting completion handler requirements
+ *
+ * @li an object @c b1 which is an arbitrary copy of @c b made by the
+ * implementation
+ *
+ * if any of the following conditions are true:
+ *
+ * @li @c s.post(a) happens-before @c s.post(b)
+ * 
+ * @li @c s.post(a) happens-before @c s.dispatch(b), where the latter is
+ * performed outside the strand
+ * 
+ * @li @c s.dispatch(a) happens-before @c s.post(b), where the former is
+ * performed outside the strand
+ * 
+ * @li @c s.dispatch(a) happens-before @c s.dispatch(b), where both are
+ * performed outside the strand
+ *   
+ * then @c asio_handler_invoke(a1, &a1) happens-before
+ * @c asio_handler_invoke(b1, &b1).
+ * 
+ * Note that in the following case:
+ * @code async_op_1(..., s.wrap(a));
+ * async_op_2(..., s.wrap(b)); @endcode
+ * the completion of the first async operation will perform @c s.dispatch(a),
+ * and the second will perform @c s.dispatch(b), but the order in which those
+ * are performed is unspecified. That is, you cannot state whether one
+ * happens-before the other. Therefore none of the above conditions are met and
+ * no ordering guarantee is made.
+ *
+ * @note The implementation makes no guarantee that handlers posted or
+ * dispatched through different @c strand objects will be invoked concurrently.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Safe.
+ *
+ * @par Concepts:
+ * Dispatcher.
+ */
+class io_context::strand
+{
+public:
+  /// Constructor.
+  /**
+   * Constructs the strand.
+   *
+   * @param io_context The io_context object that the strand will use to
+   * dispatch handlers that are ready to be run.
+   */
+  explicit strand(asio::io_context& io_context)
+    : service_(asio::use_service<
+        asio::detail::strand_service>(io_context))
+  {
+    service_.construct(impl_);
+  }
+
+  /// Destructor.
+  /**
+   * Destroys a strand.
+   *
+   * Handlers posted through the strand that have not yet been invoked will
+   * still be dispatched in a way that meets the guarantee of non-concurrency.
+   */
+  ~strand()
+  {
+  }
+
+  /// Obtain the underlying execution context.
+  asio::io_context& context() const ASIO_NOEXCEPT
+  {
+    return service_.get_io_context();
+  }
+
+  /// Inform the strand that it has some outstanding work to do.
+  /**
+   * The strand delegates this call to its underlying io_context.
+   */
+  void on_work_started() const ASIO_NOEXCEPT
+  {
+    context().get_executor().on_work_started();
+  }
+
+  /// Inform the strand that some work is no longer outstanding.
+  /**
+   * The strand delegates this call to its underlying io_context.
+   */
+  void on_work_finished() const ASIO_NOEXCEPT
+  {
+    context().get_executor().on_work_finished();
+  }
+
+  /// Request the strand to invoke the given function object.
+  /**
+   * This function is used to ask the strand to execute the given function
+   * object on its underlying io_context. The function object will be executed
+   * inside this function if the strand is not otherwise busy and if the
+   * underlying io_context's executor's @c dispatch() function is also able to
+   * execute the function before returning.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void dispatch(ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+  {
+    typename decay<Function>::type tmp(ASIO_MOVE_CAST(Function)(f));
+    service_.dispatch(impl_, tmp);
+    (void)a;
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use asio::dispatch().) Request the strand to invoke
+  /// the given handler.
+  /**
+   * This function is used to ask the strand to execute the given handler.
+   *
+   * The strand object guarantees that handlers posted or dispatched through
+   * the strand will not be executed concurrently. The handler may be executed
+   * inside this function if the guarantee can be met. If this function is
+   * called from within a handler that was posted or dispatched through the same
+   * strand, then the new handler will be executed immediately.
+   *
+   * The strand's guarantee is in addition to the guarantee provided by the
+   * underlying io_context. The io_context guarantees that the handler will only
+   * be called in a thread in which the io_context's run member function is
+   * currently being invoked.
+   *
+   * @param handler The handler to be called. The strand will make a copy of the
+   * handler object as required. The function signature of the handler must be:
+   * @code void handler(); @endcode
+   */
+  template <typename LegacyCompletionHandler>
+  ASIO_INITFN_AUTO_RESULT_TYPE(LegacyCompletionHandler, void ())
+  dispatch(ASIO_MOVE_ARG(LegacyCompletionHandler) handler)
+  {
+    return async_initiate<LegacyCompletionHandler, void ()>(
+        initiate_dispatch(), handler, this);
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Request the strand to invoke the given function object.
+  /**
+   * This function is used to ask the executor to execute the given function
+   * object. The function object will never be executed inside this function.
+   * Instead, it will be scheduled to run by the underlying io_context.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void post(ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+  {
+    typename decay<Function>::type tmp(ASIO_MOVE_CAST(Function)(f));
+    service_.post(impl_, tmp);
+    (void)a;
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use asio::post().) Request the strand to invoke the
+  /// given handler and return immediately.
+  /**
+   * This function is used to ask the strand to execute the given handler, but
+   * without allowing the strand to call the handler from inside this function.
+   *
+   * The strand object guarantees that handlers posted or dispatched through
+   * the strand will not be executed concurrently. The strand's guarantee is in
+   * addition to the guarantee provided by the underlying io_context. The
+   * io_context guarantees that the handler will only be called in a thread in
+   * which the io_context's run member function is currently being invoked.
+   *
+   * @param handler The handler to be called. The strand will make a copy of the
+   * handler object as required. The function signature of the handler must be:
+   * @code void handler(); @endcode
+   */
+  template <typename LegacyCompletionHandler>
+  ASIO_INITFN_AUTO_RESULT_TYPE(LegacyCompletionHandler, void ())
+  post(ASIO_MOVE_ARG(LegacyCompletionHandler) handler)
+  {
+    return async_initiate<LegacyCompletionHandler, void ()>(
+        initiate_post(), handler, this);
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Request the strand to invoke the given function object.
+  /**
+   * This function is used to ask the executor to execute the given function
+   * object. The function object will never be executed inside this function.
+   * Instead, it will be scheduled to run by the underlying io_context.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void defer(ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+  {
+    typename decay<Function>::type tmp(ASIO_MOVE_CAST(Function)(f));
+    service_.post(impl_, tmp);
+    (void)a;
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use asio::bind_executor().) Create a new handler that
+  /// automatically dispatches the wrapped handler on the strand.
+  /**
+   * This function is used to create a new handler function object that, when
+   * invoked, will automatically pass the wrapped handler to the strand's
+   * dispatch function.
+   *
+   * @param handler The handler to be wrapped. The strand will make a copy of
+   * the handler object as required. The function signature of the handler must
+   * be: @code void handler(A1 a1, ... An an); @endcode
+   *
+   * @return A function object that, when invoked, passes the wrapped handler to
+   * the strand's dispatch function. Given a function object with the signature:
+   * @code R f(A1 a1, ... An an); @endcode
+   * If this function object is passed to the wrap function like so:
+   * @code strand.wrap(f); @endcode
+   * then the return value is a function object with the signature
+   * @code void g(A1 a1, ... An an); @endcode
+   * that, when invoked, executes code equivalent to:
+   * @code strand.dispatch(boost::bind(f, a1, ... an)); @endcode
+   */
+  template <typename Handler>
+#if defined(GENERATING_DOCUMENTATION)
+  unspecified
+#else
+  detail::wrapped_handler<strand, Handler, detail::is_continuation_if_running>
+#endif
+  wrap(Handler handler)
+  {
+    return detail::wrapped_handler<io_context::strand, Handler,
+        detail::is_continuation_if_running>(*this, handler);
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Determine whether the strand is running in the current thread.
+  /**
+   * @return @c true if the current thread is executing a handler that was
+   * submitted to the strand using post(), dispatch() or wrap(). Otherwise
+   * returns @c false.
+   */
+  bool running_in_this_thread() const ASIO_NOEXCEPT
+  {
+    return service_.running_in_this_thread(impl_);
+  }
+
+  /// Compare two strands for equality.
+  /**
+   * Two strands are equal if they refer to the same ordered, non-concurrent
+   * state.
+   */
+  friend bool operator==(const strand& a, const strand& b) ASIO_NOEXCEPT
+  {
+    return a.impl_ == b.impl_;
+  }
+
+  /// Compare two strands for inequality.
+  /**
+   * Two strands are equal if they refer to the same ordered, non-concurrent
+   * state.
+   */
+  friend bool operator!=(const strand& a, const strand& b) ASIO_NOEXCEPT
+  {
+    return a.impl_ != b.impl_;
+  }
+
+private:
+#if !defined(ASIO_NO_DEPRECATED)
+  struct initiate_dispatch
+  {
+    template <typename LegacyCompletionHandler>
+    void operator()(ASIO_MOVE_ARG(LegacyCompletionHandler) handler,
+        strand* self) const
+    {
+      // If you get an error on the following line it means that your
+      // handler does not meet the documented type requirements for a
+      // LegacyCompletionHandler.
+      ASIO_LEGACY_COMPLETION_HANDLER_CHECK(
+          LegacyCompletionHandler, handler) type_check;
+
+      detail::non_const_lvalue<LegacyCompletionHandler> handler2(handler);
+      self->service_.dispatch(self->impl_, handler2.value);
+    }
+  };
+
+  struct initiate_post
+  {
+    template <typename LegacyCompletionHandler>
+    void operator()(ASIO_MOVE_ARG(LegacyCompletionHandler) handler,
+        strand* self) const
+    {
+      // If you get an error on the following line it means that your
+      // handler does not meet the documented type requirements for a
+      // LegacyCompletionHandler.
+      ASIO_LEGACY_COMPLETION_HANDLER_CHECK(
+          LegacyCompletionHandler, handler) type_check;
+
+      detail::non_const_lvalue<LegacyCompletionHandler> handler2(handler);
+      self->service_.post(self->impl_, handler2.value);
+    }
+  };
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  asio::detail::strand_service& service_;
+  mutable asio::detail::strand_service::implementation_type impl_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+#endif // ASIO_IO_CONTEXT_STRAND_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_service.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_service.hpp
new file mode 100644
index 00000000000..2916aff1695
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_service.hpp
@@ -0,0 +1,33 @@
+//
+// io_service.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IO_SERVICE_HPP
+#define ASIO_IO_SERVICE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/io_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if !defined(ASIO_NO_DEPRECATED)
+/// Typedef for backwards compatibility.
+typedef io_context io_service;
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IO_SERVICE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_service_strand.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_service_strand.hpp
new file mode 100644
index 00000000000..5d35ee35442
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/io_service_strand.hpp
@@ -0,0 +1,20 @@
+//
+// io_service_strand.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IO_SERVICE_STRAND_HPP
+#define ASIO_IO_SERVICE_STRAND_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/io_context_strand.hpp"
+
+#endif // ASIO_IO_SERVICE_STRAND_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address.hpp
new file mode 100644
index 00000000000..d493981a7e5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address.hpp
@@ -0,0 +1,268 @@
+//
+// ip/address.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_ADDRESS_HPP
+#define ASIO_IP_ADDRESS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <string>
+#include "asio/detail/throw_exception.hpp"
+#include "asio/detail/string_view.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error_code.hpp"
+#include "asio/ip/address_v4.hpp"
+#include "asio/ip/address_v6.hpp"
+#include "asio/ip/bad_address_cast.hpp"
+
+#if !defined(ASIO_NO_IOSTREAM)
+# include <iosfwd>
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// Implements version-independent IP addresses.
+/**
+ * The asio::ip::address class provides the ability to use either IP
+ * version 4 or version 6 addresses.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+class address
+{
+public:
+  /// Default constructor.
+  ASIO_DECL address() ASIO_NOEXCEPT;
+
+  /// Construct an address from an IPv4 address.
+  ASIO_DECL address(
+      const asio::ip::address_v4& ipv4_address) ASIO_NOEXCEPT;
+
+  /// Construct an address from an IPv6 address.
+  ASIO_DECL address(
+      const asio::ip::address_v6& ipv6_address) ASIO_NOEXCEPT;
+
+  /// Copy constructor.
+  ASIO_DECL address(const address& other) ASIO_NOEXCEPT;
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move constructor.
+  ASIO_DECL address(address&& other) ASIO_NOEXCEPT;
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assign from another address.
+  ASIO_DECL address& operator=(const address& other) ASIO_NOEXCEPT;
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move-assign from another address.
+  ASIO_DECL address& operator=(address&& other) ASIO_NOEXCEPT;
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assign from an IPv4 address.
+  ASIO_DECL address& operator=(
+      const asio::ip::address_v4& ipv4_address) ASIO_NOEXCEPT;
+
+  /// Assign from an IPv6 address.
+  ASIO_DECL address& operator=(
+      const asio::ip::address_v6& ipv6_address) ASIO_NOEXCEPT;
+
+  /// Get whether the address is an IP version 4 address.
+  bool is_v4() const ASIO_NOEXCEPT
+  {
+    return type_ == ipv4;
+  }
+
+  /// Get whether the address is an IP version 6 address.
+  bool is_v6() const ASIO_NOEXCEPT
+  {
+    return type_ == ipv6;
+  }
+
+  /// Get the address as an IP version 4 address.
+  ASIO_DECL asio::ip::address_v4 to_v4() const;
+
+  /// Get the address as an IP version 6 address.
+  ASIO_DECL asio::ip::address_v6 to_v6() const;
+
+  /// Get the address as a string.
+  ASIO_DECL std::string to_string() const;
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use other overload.) Get the address as a string.
+  ASIO_DECL std::string to_string(asio::error_code& ec) const;
+
+  /// (Deprecated: Use make_address().) Create an address from an IPv4 address
+  /// string in dotted decimal form, or from an IPv6 address in hexadecimal
+  /// notation.
+  static address from_string(const char* str);
+
+  /// (Deprecated: Use make_address().) Create an address from an IPv4 address
+  /// string in dotted decimal form, or from an IPv6 address in hexadecimal
+  /// notation.
+  static address from_string(const char* str, asio::error_code& ec);
+
+  /// (Deprecated: Use make_address().) Create an address from an IPv4 address
+  /// string in dotted decimal form, or from an IPv6 address in hexadecimal
+  /// notation.
+  static address from_string(const std::string& str);
+
+  /// (Deprecated: Use make_address().) Create an address from an IPv4 address
+  /// string in dotted decimal form, or from an IPv6 address in hexadecimal
+  /// notation.
+  static address from_string(
+      const std::string& str, asio::error_code& ec);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Determine whether the address is a loopback address.
+  ASIO_DECL bool is_loopback() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is unspecified.
+  ASIO_DECL bool is_unspecified() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is a multicast address.
+  ASIO_DECL bool is_multicast() const ASIO_NOEXCEPT;
+
+  /// Compare two addresses for equality.
+  ASIO_DECL friend bool operator==(const address& a1,
+      const address& a2) ASIO_NOEXCEPT;
+
+  /// Compare two addresses for inequality.
+  friend bool operator!=(const address& a1,
+      const address& a2) ASIO_NOEXCEPT
+  {
+    return !(a1 == a2);
+  }
+
+  /// Compare addresses for ordering.
+  ASIO_DECL friend bool operator<(const address& a1,
+      const address& a2) ASIO_NOEXCEPT;
+
+  /// Compare addresses for ordering.
+  friend bool operator>(const address& a1,
+      const address& a2) ASIO_NOEXCEPT
+  {
+    return a2 < a1;
+  }
+
+  /// Compare addresses for ordering.
+  friend bool operator<=(const address& a1,
+      const address& a2) ASIO_NOEXCEPT
+  {
+    return !(a2 < a1);
+  }
+
+  /// Compare addresses for ordering.
+  friend bool operator>=(const address& a1,
+      const address& a2) ASIO_NOEXCEPT
+  {
+    return !(a1 < a2);
+  }
+
+private:
+  // The type of the address.
+  enum { ipv4, ipv6 } type_;
+
+  // The underlying IPv4 address.
+  asio::ip::address_v4 ipv4_address_;
+
+  // The underlying IPv6 address.
+  asio::ip::address_v6 ipv6_address_;
+};
+
+/// Create an address from an IPv4 address string in dotted decimal form,
+/// or from an IPv6 address in hexadecimal notation.
+/**
+ * @relates address
+ */
+ASIO_DECL address make_address(const char* str);
+
+/// Create an address from an IPv4 address string in dotted decimal form,
+/// or from an IPv6 address in hexadecimal notation.
+/**
+ * @relates address
+ */
+ASIO_DECL address make_address(const char* str,
+    asio::error_code& ec) ASIO_NOEXCEPT;
+
+/// Create an address from an IPv4 address string in dotted decimal form,
+/// or from an IPv6 address in hexadecimal notation.
+/**
+ * @relates address
+ */
+ASIO_DECL address make_address(const std::string& str);
+
+/// Create an address from an IPv4 address string in dotted decimal form,
+/// or from an IPv6 address in hexadecimal notation.
+/**
+ * @relates address
+ */
+ASIO_DECL address make_address(const std::string& str,
+    asio::error_code& ec) ASIO_NOEXCEPT;
+
+#if defined(ASIO_HAS_STRING_VIEW) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Create an address from an IPv4 address string in dotted decimal form,
+/// or from an IPv6 address in hexadecimal notation.
+/**
+ * @relates address
+ */
+ASIO_DECL address make_address(string_view str);
+
+/// Create an address from an IPv4 address string in dotted decimal form,
+/// or from an IPv6 address in hexadecimal notation.
+/**
+ * @relates address
+ */
+ASIO_DECL address make_address(string_view str,
+    asio::error_code& ec) ASIO_NOEXCEPT;
+
+#endif // defined(ASIO_HAS_STRING_VIEW)
+       //  || defined(GENERATING_DOCUMENTATION)
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Output an address as a string.
+/**
+ * Used to output a human-readable string for a specified address.
+ *
+ * @param os The output stream to which the string will be written.
+ *
+ * @param addr The address to be written.
+ *
+ * @return The output stream.
+ *
+ * @relates asio::ip::address
+ */
+template <typename Elem, typename Traits>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os, const address& addr);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/ip/impl/address.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ip/impl/address.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_IP_ADDRESS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v4.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v4.hpp
new file mode 100644
index 00000000000..4d6af7fd59a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v4.hpp
@@ -0,0 +1,335 @@
+//
+// ip/address_v4.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_ADDRESS_V4_HPP
+#define ASIO_IP_ADDRESS_V4_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <string>
+#include "asio/detail/array.hpp"
+#include "asio/detail/cstdint.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/string_view.hpp"
+#include "asio/detail/winsock_init.hpp"
+#include "asio/error_code.hpp"
+
+#if !defined(ASIO_NO_IOSTREAM)
+# include <iosfwd>
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// Implements IP version 4 style addresses.
+/**
+ * The asio::ip::address_v4 class provides the ability to use and
+ * manipulate IP version 4 addresses.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+class address_v4
+{
+public:
+  /// The type used to represent an address as an unsigned integer.
+  typedef uint_least32_t uint_type;
+
+  /// The type used to represent an address as an array of bytes.
+  /**
+   * @note This type is defined in terms of the C++0x template @c std::array
+   * when it is available. Otherwise, it uses @c boost:array.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef array<unsigned char, 4> bytes_type;
+#else
+  typedef asio::detail::array<unsigned char, 4> bytes_type;
+#endif
+
+  /// Default constructor.
+  address_v4() ASIO_NOEXCEPT
+  {
+    addr_.s_addr = 0;
+  }
+
+  /// Construct an address from raw bytes.
+  ASIO_DECL explicit address_v4(const bytes_type& bytes);
+
+  /// Construct an address from an unsigned integer in host byte order.
+  ASIO_DECL explicit address_v4(uint_type addr);
+
+  /// Copy constructor.
+  address_v4(const address_v4& other) ASIO_NOEXCEPT
+    : addr_(other.addr_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move constructor.
+  address_v4(address_v4&& other) ASIO_NOEXCEPT
+    : addr_(other.addr_)
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assign from another address.
+  address_v4& operator=(const address_v4& other) ASIO_NOEXCEPT
+  {
+    addr_ = other.addr_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move-assign from another address.
+  address_v4& operator=(address_v4&& other) ASIO_NOEXCEPT
+  {
+    addr_ = other.addr_;
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Get the address in bytes, in network byte order.
+  ASIO_DECL bytes_type to_bytes() const ASIO_NOEXCEPT;
+
+  /// Get the address as an unsigned integer in host byte order
+  ASIO_DECL uint_type to_uint() const ASIO_NOEXCEPT;
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// Get the address as an unsigned long in host byte order
+  ASIO_DECL unsigned long to_ulong() const;
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Get the address as a string in dotted decimal format.
+  ASIO_DECL std::string to_string() const;
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use other overload.) Get the address as a string in dotted
+  /// decimal format.
+  ASIO_DECL std::string to_string(asio::error_code& ec) const;
+
+  /// (Deprecated: Use make_address_v4().) Create an address from an IP address
+  /// string in dotted decimal form.
+  static address_v4 from_string(const char* str);
+
+  /// (Deprecated: Use make_address_v4().) Create an address from an IP address
+  /// string in dotted decimal form.
+  static address_v4 from_string(
+      const char* str, asio::error_code& ec);
+
+  /// (Deprecated: Use make_address_v4().) Create an address from an IP address
+  /// string in dotted decimal form.
+  static address_v4 from_string(const std::string& str);
+
+  /// (Deprecated: Use make_address_v4().) Create an address from an IP address
+  /// string in dotted decimal form.
+  static address_v4 from_string(
+      const std::string& str, asio::error_code& ec);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Determine whether the address is a loopback address.
+  ASIO_DECL bool is_loopback() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is unspecified.
+  ASIO_DECL bool is_unspecified() const ASIO_NOEXCEPT;
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use network_v4 class.) Determine whether the address is a
+  /// class A address.
+  ASIO_DECL bool is_class_a() const;
+
+  /// (Deprecated: Use network_v4 class.) Determine whether the address is a
+  /// class B address.
+  ASIO_DECL bool is_class_b() const;
+
+  /// (Deprecated: Use network_v4 class.) Determine whether the address is a
+  /// class C address.
+  ASIO_DECL bool is_class_c() const;
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Determine whether the address is a multicast address.
+  ASIO_DECL bool is_multicast() const ASIO_NOEXCEPT;
+
+  /// Compare two addresses for equality.
+  friend bool operator==(const address_v4& a1,
+      const address_v4& a2) ASIO_NOEXCEPT
+  {
+    return a1.addr_.s_addr == a2.addr_.s_addr;
+  }
+
+  /// Compare two addresses for inequality.
+  friend bool operator!=(const address_v4& a1,
+      const address_v4& a2) ASIO_NOEXCEPT
+  {
+    return a1.addr_.s_addr != a2.addr_.s_addr;
+  }
+
+  /// Compare addresses for ordering.
+  friend bool operator<(const address_v4& a1,
+      const address_v4& a2) ASIO_NOEXCEPT
+  {
+    return a1.to_uint() < a2.to_uint();
+  }
+
+  /// Compare addresses for ordering.
+  friend bool operator>(const address_v4& a1,
+      const address_v4& a2) ASIO_NOEXCEPT
+  {
+    return a1.to_uint() > a2.to_uint();
+  }
+
+  /// Compare addresses for ordering.
+  friend bool operator<=(const address_v4& a1,
+      const address_v4& a2) ASIO_NOEXCEPT
+  {
+    return a1.to_uint() <= a2.to_uint();
+  }
+
+  /// Compare addresses for ordering.
+  friend bool operator>=(const address_v4& a1,
+      const address_v4& a2) ASIO_NOEXCEPT
+  {
+    return a1.to_uint() >= a2.to_uint();
+  }
+
+  /// Obtain an address object that represents any address.
+  static address_v4 any() ASIO_NOEXCEPT
+  {
+    return address_v4();
+  }
+
+  /// Obtain an address object that represents the loopback address.
+  static address_v4 loopback() ASIO_NOEXCEPT
+  {
+    return address_v4(0x7F000001);
+  }
+
+  /// Obtain an address object that represents the broadcast address.
+  static address_v4 broadcast() ASIO_NOEXCEPT
+  {
+    return address_v4(0xFFFFFFFF);
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use network_v4 class.) Obtain an address object that
+  /// represents the broadcast address that corresponds to the specified
+  /// address and netmask.
+  ASIO_DECL static address_v4 broadcast(
+      const address_v4& addr, const address_v4& mask);
+
+  /// (Deprecated: Use network_v4 class.) Obtain the netmask that corresponds
+  /// to the address, based on its address class.
+  ASIO_DECL static address_v4 netmask(const address_v4& addr);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+private:
+  // The underlying IPv4 address.
+  asio::detail::in4_addr_type addr_;
+};
+
+/// Create an IPv4 address from raw bytes in network order.
+/**
+ * @relates address_v4
+ */
+inline address_v4 make_address_v4(const address_v4::bytes_type& bytes)
+{
+  return address_v4(bytes);
+}
+
+/// Create an IPv4 address from an unsigned integer in host byte order.
+/**
+ * @relates address_v4
+ */
+inline address_v4 make_address_v4(address_v4::uint_type addr)
+{
+  return address_v4(addr);
+}
+
+/// Create an IPv4 address from an IP address string in dotted decimal form.
+/**
+ * @relates address_v4
+ */
+ASIO_DECL address_v4 make_address_v4(const char* str);
+
+/// Create an IPv4 address from an IP address string in dotted decimal form.
+/**
+ * @relates address_v4
+ */
+ASIO_DECL address_v4 make_address_v4(const char* str,
+    asio::error_code& ec) ASIO_NOEXCEPT;
+
+/// Create an IPv4 address from an IP address string in dotted decimal form.
+/**
+ * @relates address_v4
+ */
+ASIO_DECL address_v4 make_address_v4(const std::string& str);
+
+/// Create an IPv4 address from an IP address string in dotted decimal form.
+/**
+ * @relates address_v4
+ */
+ASIO_DECL address_v4 make_address_v4(const std::string& str,
+    asio::error_code& ec) ASIO_NOEXCEPT;
+
+#if defined(ASIO_HAS_STRING_VIEW) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Create an IPv4 address from an IP address string in dotted decimal form.
+/**
+ * @relates address_v4
+ */
+ASIO_DECL address_v4 make_address_v4(string_view str);
+
+/// Create an IPv4 address from an IP address string in dotted decimal form.
+/**
+ * @relates address_v4
+ */
+ASIO_DECL address_v4 make_address_v4(string_view str,
+    asio::error_code& ec) ASIO_NOEXCEPT;
+
+#endif // defined(ASIO_HAS_STRING_VIEW)
+       //  || defined(GENERATING_DOCUMENTATION)
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Output an address as a string.
+/**
+ * Used to output a human-readable string for a specified address.
+ *
+ * @param os The output stream to which the string will be written.
+ *
+ * @param addr The address to be written.
+ *
+ * @return The output stream.
+ *
+ * @relates asio::ip::address_v4
+ */
+template <typename Elem, typename Traits>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os, const address_v4& addr);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/ip/impl/address_v4.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ip/impl/address_v4.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_IP_ADDRESS_V4_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v4_iterator.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v4_iterator.hpp
new file mode 100644
index 00000000000..3702d93eb35
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v4_iterator.hpp
@@ -0,0 +1,162 @@
+//
+// ip/address_v4_iterator.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_ADDRESS_V4_ITERATOR_HPP
+#define ASIO_IP_ADDRESS_V4_ITERATOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/ip/address_v4.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+template <typename> class basic_address_iterator;
+
+/// An input iterator that can be used for traversing IPv4 addresses.
+/**
+ * In addition to satisfying the input iterator requirements, this iterator
+ * also supports decrement.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <> class basic_address_iterator<address_v4>
+{
+public:
+  /// The type of the elements pointed to by the iterator.
+  typedef address_v4 value_type;
+
+  /// Distance between two iterators.
+  typedef std::ptrdiff_t difference_type;
+
+  /// The type of a pointer to an element pointed to by the iterator.
+  typedef const address_v4* pointer;
+
+  /// The type of a reference to an element pointed to by the iterator.
+  typedef const address_v4& reference;
+
+  /// Denotes that the iterator satisfies the input iterator requirements.
+  typedef std::input_iterator_tag iterator_category;
+
+  /// Construct an iterator that points to the specified address.
+  basic_address_iterator(const address_v4& addr) ASIO_NOEXCEPT
+    : address_(addr)
+  {
+  }
+
+  /// Copy constructor.
+  basic_address_iterator(
+      const basic_address_iterator& other) ASIO_NOEXCEPT
+    : address_(other.address_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move constructor.
+  basic_address_iterator(basic_address_iterator&& other) ASIO_NOEXCEPT
+    : address_(ASIO_MOVE_CAST(address_v4)(other.address_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assignment operator.
+  basic_address_iterator& operator=(
+      const basic_address_iterator& other) ASIO_NOEXCEPT
+  {
+    address_ = other.address_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move assignment operator.
+  basic_address_iterator& operator=(
+      basic_address_iterator&& other) ASIO_NOEXCEPT
+  {
+    address_ = ASIO_MOVE_CAST(address_v4)(other.address_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Dereference the iterator.
+  const address_v4& operator*() const ASIO_NOEXCEPT
+  {
+    return address_;
+  }
+
+  /// Dereference the iterator.
+  const address_v4* operator->() const ASIO_NOEXCEPT
+  {
+    return &address_;
+  }
+
+  /// Pre-increment operator.
+  basic_address_iterator& operator++() ASIO_NOEXCEPT
+  {
+    address_ = address_v4((address_.to_uint() + 1) & 0xFFFFFFFF);
+    return *this;
+  }
+
+  /// Post-increment operator.
+  basic_address_iterator operator++(int) ASIO_NOEXCEPT
+  {
+    basic_address_iterator tmp(*this);
+    ++*this;
+    return tmp;
+  }
+
+  /// Pre-decrement operator.
+  basic_address_iterator& operator--() ASIO_NOEXCEPT
+  {
+    address_ = address_v4((address_.to_uint() - 1) & 0xFFFFFFFF);
+    return *this;
+  }
+
+  /// Post-decrement operator.
+  basic_address_iterator operator--(int)
+  {
+    basic_address_iterator tmp(*this);
+    --*this;
+    return tmp;
+  }
+
+  /// Compare two addresses for equality.
+  friend bool operator==(const basic_address_iterator& a,
+      const basic_address_iterator& b)
+  {
+    return a.address_ == b.address_;
+  }
+
+  /// Compare two addresses for inequality.
+  friend bool operator!=(const basic_address_iterator& a,
+      const basic_address_iterator& b)
+  {
+    return a.address_ != b.address_;
+  }
+
+private:
+  address_v4 address_;
+};
+
+/// An input iterator that can be used for traversing IPv4 addresses.
+typedef basic_address_iterator<address_v4> address_v4_iterator;
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_ADDRESS_V4_ITERATOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v4_range.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v4_range.hpp
new file mode 100644
index 00000000000..369e395b16d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v4_range.hpp
@@ -0,0 +1,134 @@
+//
+// ip/address_v4_range.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_ADDRESS_V4_RANGE_HPP
+#define ASIO_IP_ADDRESS_V4_RANGE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/ip/address_v4_iterator.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+template <typename> class basic_address_range;
+
+/// Represents a range of IPv4 addresses.
+/**
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <> class basic_address_range<address_v4>
+{
+public:
+  /// The type of an iterator that points into the range.
+  typedef basic_address_iterator<address_v4> iterator;
+
+  /// Construct an empty range.
+  basic_address_range() ASIO_NOEXCEPT
+    : begin_(address_v4()),
+      end_(address_v4())
+  {
+  }
+
+  /// Construct an range that represents the given range of addresses.
+  explicit basic_address_range(const iterator& first,
+      const iterator& last) ASIO_NOEXCEPT
+    : begin_(first),
+      end_(last)
+  {
+  }
+
+  /// Copy constructor.
+  basic_address_range(const basic_address_range& other) ASIO_NOEXCEPT
+    : begin_(other.begin_),
+      end_(other.end_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move constructor.
+  basic_address_range(basic_address_range&& other) ASIO_NOEXCEPT
+    : begin_(ASIO_MOVE_CAST(iterator)(other.begin_)),
+      end_(ASIO_MOVE_CAST(iterator)(other.end_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assignment operator.
+  basic_address_range& operator=(
+      const basic_address_range& other) ASIO_NOEXCEPT
+  {
+    begin_ = other.begin_;
+    end_ = other.end_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move assignment operator.
+  basic_address_range& operator=(
+      basic_address_range&& other) ASIO_NOEXCEPT
+  {
+    begin_ = ASIO_MOVE_CAST(iterator)(other.begin_);
+    end_ = ASIO_MOVE_CAST(iterator)(other.end_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Obtain an iterator that points to the start of the range.
+  iterator begin() const ASIO_NOEXCEPT
+  {
+    return begin_;
+  }
+
+  /// Obtain an iterator that points to the end of the range.
+  iterator end() const ASIO_NOEXCEPT
+  {
+    return end_;
+  }
+
+  /// Determine whether the range is empty.
+  bool empty() const ASIO_NOEXCEPT
+  {
+    return size() == 0;
+  }
+
+  /// Return the size of the range.
+  std::size_t size() const ASIO_NOEXCEPT
+  {
+    return end_->to_uint() - begin_->to_uint();
+  }
+
+  /// Find an address in the range.
+  iterator find(const address_v4& addr) const ASIO_NOEXCEPT
+  {
+    return addr >= *begin_ && addr < *end_ ? iterator(addr) : end_;
+  }
+
+private:
+  iterator begin_;
+  iterator end_;
+};
+
+/// Represents a range of IPv4 addresses.
+typedef basic_address_range<address_v4> address_v4_range;
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_ADDRESS_V4_RANGE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v6.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v6.hpp
new file mode 100644
index 00000000000..db3af3c4b1a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v6.hpp
@@ -0,0 +1,341 @@
+//
+// ip/address_v6.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_ADDRESS_V6_HPP
+#define ASIO_IP_ADDRESS_V6_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <string>
+#include "asio/detail/array.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/string_view.hpp"
+#include "asio/detail/winsock_init.hpp"
+#include "asio/error_code.hpp"
+#include "asio/ip/address_v4.hpp"
+
+#if !defined(ASIO_NO_IOSTREAM)
+# include <iosfwd>
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+template <typename> class basic_address_iterator;
+
+/// Implements IP version 6 style addresses.
+/**
+ * The asio::ip::address_v6 class provides the ability to use and
+ * manipulate IP version 6 addresses.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+class address_v6
+{
+public:
+  /// The type used to represent an address as an array of bytes.
+  /**
+   * @note This type is defined in terms of the C++0x template @c std::array
+   * when it is available. Otherwise, it uses @c boost:array.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef array<unsigned char, 16> bytes_type;
+#else
+  typedef asio::detail::array<unsigned char, 16> bytes_type;
+#endif
+
+  /// Default constructor.
+  ASIO_DECL address_v6() ASIO_NOEXCEPT;
+
+  /// Construct an address from raw bytes and scope ID.
+  ASIO_DECL explicit address_v6(const bytes_type& bytes,
+      unsigned long scope_id = 0);
+
+  /// Copy constructor.
+  ASIO_DECL address_v6(const address_v6& other) ASIO_NOEXCEPT;
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move constructor.
+  ASIO_DECL address_v6(address_v6&& other) ASIO_NOEXCEPT;
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assign from another address.
+  ASIO_DECL address_v6& operator=(
+      const address_v6& other) ASIO_NOEXCEPT;
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move-assign from another address.
+  ASIO_DECL address_v6& operator=(address_v6&& other) ASIO_NOEXCEPT;
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// The scope ID of the address.
+  /**
+   * Returns the scope ID associated with the IPv6 address.
+   */
+  unsigned long scope_id() const ASIO_NOEXCEPT
+  {
+    return scope_id_;
+  }
+
+  /// The scope ID of the address.
+  /**
+   * Modifies the scope ID associated with the IPv6 address.
+   */
+  void scope_id(unsigned long id) ASIO_NOEXCEPT
+  {
+    scope_id_ = id;
+  }
+
+  /// Get the address in bytes, in network byte order.
+  ASIO_DECL bytes_type to_bytes() const ASIO_NOEXCEPT;
+
+  /// Get the address as a string.
+  ASIO_DECL std::string to_string() const;
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use other overload.) Get the address as a string.
+  ASIO_DECL std::string to_string(asio::error_code& ec) const;
+
+  /// (Deprecated: Use make_address_v6().) Create an IPv6 address from an IP
+  /// address string.
+  static address_v6 from_string(const char* str);
+
+  /// (Deprecated: Use make_address_v6().) Create an IPv6 address from an IP
+  /// address string.
+  static address_v6 from_string(
+      const char* str, asio::error_code& ec);
+
+  /// (Deprecated: Use make_address_v6().) Create an IPv6 address from an IP
+  /// address string.
+  static address_v6 from_string(const std::string& str);
+
+  /// (Deprecated: Use make_address_v6().) Create an IPv6 address from an IP
+  /// address string.
+  static address_v6 from_string(
+      const std::string& str, asio::error_code& ec);
+
+  /// (Deprecated: Use make_address_v4().) Converts an IPv4-mapped or
+  /// IPv4-compatible address to an IPv4 address.
+  ASIO_DECL address_v4 to_v4() const;
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Determine whether the address is a loopback address.
+  ASIO_DECL bool is_loopback() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is unspecified.
+  ASIO_DECL bool is_unspecified() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is link local.
+  ASIO_DECL bool is_link_local() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is site local.
+  ASIO_DECL bool is_site_local() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is a mapped IPv4 address.
+  ASIO_DECL bool is_v4_mapped() const ASIO_NOEXCEPT;
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: No replacement.) Determine whether the address is an
+  /// IPv4-compatible address.
+  ASIO_DECL bool is_v4_compatible() const;
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Determine whether the address is a multicast address.
+  ASIO_DECL bool is_multicast() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is a global multicast address.
+  ASIO_DECL bool is_multicast_global() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is a link-local multicast address.
+  ASIO_DECL bool is_multicast_link_local() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is a node-local multicast address.
+  ASIO_DECL bool is_multicast_node_local() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is a org-local multicast address.
+  ASIO_DECL bool is_multicast_org_local() const ASIO_NOEXCEPT;
+
+  /// Determine whether the address is a site-local multicast address.
+  ASIO_DECL bool is_multicast_site_local() const ASIO_NOEXCEPT;
+
+  /// Compare two addresses for equality.
+  ASIO_DECL friend bool operator==(const address_v6& a1,
+      const address_v6& a2) ASIO_NOEXCEPT;
+
+  /// Compare two addresses for inequality.
+  friend bool operator!=(const address_v6& a1,
+      const address_v6& a2) ASIO_NOEXCEPT
+  {
+    return !(a1 == a2);
+  }
+
+  /// Compare addresses for ordering.
+  ASIO_DECL friend bool operator<(const address_v6& a1,
+      const address_v6& a2) ASIO_NOEXCEPT;
+
+  /// Compare addresses for ordering.
+  friend bool operator>(const address_v6& a1,
+      const address_v6& a2) ASIO_NOEXCEPT
+  {
+    return a2 < a1;
+  }
+
+  /// Compare addresses for ordering.
+  friend bool operator<=(const address_v6& a1,
+      const address_v6& a2) ASIO_NOEXCEPT
+  {
+    return !(a2 < a1);
+  }
+
+  /// Compare addresses for ordering.
+  friend bool operator>=(const address_v6& a1,
+      const address_v6& a2) ASIO_NOEXCEPT
+  {
+    return !(a1 < a2);
+  }
+
+  /// Obtain an address object that represents any address.
+  static address_v6 any() ASIO_NOEXCEPT
+  {
+    return address_v6();
+  }
+
+  /// Obtain an address object that represents the loopback address.
+  ASIO_DECL static address_v6 loopback() ASIO_NOEXCEPT;
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use make_address_v6().) Create an IPv4-mapped IPv6 address.
+  ASIO_DECL static address_v6 v4_mapped(const address_v4& addr);
+
+  /// (Deprecated: No replacement.) Create an IPv4-compatible IPv6 address.
+  ASIO_DECL static address_v6 v4_compatible(const address_v4& addr);
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+private:
+  friend class basic_address_iterator<address_v6>;
+
+  // The underlying IPv6 address.
+  asio::detail::in6_addr_type addr_;
+
+  // The scope ID associated with the address.
+  unsigned long scope_id_;
+};
+
+/// Create an IPv6 address from raw bytes and scope ID.
+/**
+ * @relates address_v6
+ */
+inline address_v6 make_address_v6(const address_v6::bytes_type& bytes,
+    unsigned long scope_id = 0)
+{
+  return address_v6(bytes, scope_id);
+}
+
+/// Create an IPv6 address from an IP address string.
+/**
+ * @relates address_v6
+ */
+ASIO_DECL address_v6 make_address_v6(const char* str);
+
+/// Create an IPv6 address from an IP address string.
+/**
+ * @relates address_v6
+ */
+ASIO_DECL address_v6 make_address_v6(const char* str,
+    asio::error_code& ec) ASIO_NOEXCEPT;
+
+/// Createan IPv6 address from an IP address string.
+/**
+ * @relates address_v6
+ */
+ASIO_DECL address_v6 make_address_v6(const std::string& str);
+
+/// Create an IPv6 address from an IP address string.
+/**
+ * @relates address_v6
+ */
+ASIO_DECL address_v6 make_address_v6(const std::string& str,
+    asio::error_code& ec) ASIO_NOEXCEPT;
+
+#if defined(ASIO_HAS_STRING_VIEW) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Create an IPv6 address from an IP address string.
+/**
+ * @relates address_v6
+ */
+ASIO_DECL address_v6 make_address_v6(string_view str);
+
+/// Create an IPv6 address from an IP address string.
+/**
+ * @relates address_v6
+ */
+ASIO_DECL address_v6 make_address_v6(string_view str,
+    asio::error_code& ec) ASIO_NOEXCEPT;
+
+#endif // defined(ASIO_HAS_STRING_VIEW)
+       //  || defined(GENERATING_DOCUMENTATION)
+
+/// Tag type used for distinguishing overloads that deal in IPv4-mapped IPv6
+/// addresses.
+enum v4_mapped_t { v4_mapped };
+
+/// Create an IPv4 address from a IPv4-mapped IPv6 address.
+/**
+ * @relates address_v4
+ */
+ASIO_DECL address_v4 make_address_v4(
+    v4_mapped_t, const address_v6& v6_addr);
+
+/// Create an IPv4-mapped IPv6 address from an IPv4 address.
+/**
+ * @relates address_v6
+ */
+ASIO_DECL address_v6 make_address_v6(
+    v4_mapped_t, const address_v4& v4_addr);
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Output an address as a string.
+/**
+ * Used to output a human-readable string for a specified address.
+ *
+ * @param os The output stream to which the string will be written.
+ *
+ * @param addr The address to be written.
+ *
+ * @return The output stream.
+ *
+ * @relates asio::ip::address_v6
+ */
+template <typename Elem, typename Traits>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os, const address_v6& addr);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/ip/impl/address_v6.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ip/impl/address_v6.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_IP_ADDRESS_V6_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v6_iterator.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v6_iterator.hpp
new file mode 100644
index 00000000000..ba127961f34
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v6_iterator.hpp
@@ -0,0 +1,183 @@
+//
+// ip/address_v6_iterator.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//                         Oliver Kowalke (oliver dot kowalke at gmail dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_ADDRESS_V6_ITERATOR_HPP
+#define ASIO_IP_ADDRESS_V6_ITERATOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/ip/address_v6.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+template <typename> class basic_address_iterator;
+
+/// An input iterator that can be used for traversing IPv6 addresses.
+/**
+ * In addition to satisfying the input iterator requirements, this iterator
+ * also supports decrement.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <> class basic_address_iterator<address_v6>
+{
+public:
+  /// The type of the elements pointed to by the iterator.
+  typedef address_v6 value_type;
+
+  /// Distance between two iterators.
+  typedef std::ptrdiff_t difference_type;
+
+  /// The type of a pointer to an element pointed to by the iterator.
+  typedef const address_v6* pointer;
+
+  /// The type of a reference to an element pointed to by the iterator.
+  typedef const address_v6& reference;
+
+  /// Denotes that the iterator satisfies the input iterator requirements.
+  typedef std::input_iterator_tag iterator_category;
+
+  /// Construct an iterator that points to the specified address.
+  basic_address_iterator(const address_v6& addr) ASIO_NOEXCEPT
+    : address_(addr)
+  {
+  }
+
+  /// Copy constructor.
+  basic_address_iterator(
+      const basic_address_iterator& other) ASIO_NOEXCEPT
+    : address_(other.address_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move constructor.
+  basic_address_iterator(basic_address_iterator&& other) ASIO_NOEXCEPT
+    : address_(ASIO_MOVE_CAST(address_v6)(other.address_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assignment operator.
+  basic_address_iterator& operator=(
+      const basic_address_iterator& other) ASIO_NOEXCEPT
+  {
+    address_ = other.address_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move assignment operator.
+  basic_address_iterator& operator=(
+      basic_address_iterator&& other) ASIO_NOEXCEPT
+  {
+    address_ = ASIO_MOVE_CAST(address_v6)(other.address_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Dereference the iterator.
+  const address_v6& operator*() const ASIO_NOEXCEPT
+  {
+    return address_;
+  }
+
+  /// Dereference the iterator.
+  const address_v6* operator->() const ASIO_NOEXCEPT
+  {
+    return &address_;
+  }
+
+  /// Pre-increment operator.
+  basic_address_iterator& operator++() ASIO_NOEXCEPT
+  {
+    for (int i = 15; i >= 0; --i)
+    {
+      if (address_.addr_.s6_addr[i] < 0xFF)
+      {
+        ++address_.addr_.s6_addr[i];
+        break;
+      }
+
+      address_.addr_.s6_addr[i] = 0;
+    }
+
+    return *this;
+  }
+
+  /// Post-increment operator.
+  basic_address_iterator operator++(int) ASIO_NOEXCEPT
+  {
+    basic_address_iterator tmp(*this);
+    ++*this;
+    return tmp;
+  }
+
+  /// Pre-decrement operator.
+  basic_address_iterator& operator--() ASIO_NOEXCEPT
+  {
+    for (int i = 15; i >= 0; --i)
+    {
+      if (address_.addr_.s6_addr[i] > 0)
+      {
+        --address_.addr_.s6_addr[i];
+        break;
+      }
+
+      address_.addr_.s6_addr[i] = 0xFF;
+    }
+
+    return *this;
+  }
+
+  /// Post-decrement operator.
+  basic_address_iterator operator--(int)
+  {
+    basic_address_iterator tmp(*this);
+    --*this;
+    return tmp;
+  }
+
+  /// Compare two addresses for equality.
+  friend bool operator==(const basic_address_iterator& a,
+      const basic_address_iterator& b)
+  {
+    return a.address_ == b.address_;
+  }
+
+  /// Compare two addresses for inequality.
+  friend bool operator!=(const basic_address_iterator& a,
+      const basic_address_iterator& b)
+  {
+    return a.address_ != b.address_;
+  }
+
+private:
+  address_v6 address_;
+};
+
+/// An input iterator that can be used for traversing IPv6 addresses.
+typedef basic_address_iterator<address_v6> address_v6_iterator;
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_ADDRESS_V6_ITERATOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v6_range.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v6_range.hpp
new file mode 100644
index 00000000000..7a461dd9a3c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/address_v6_range.hpp
@@ -0,0 +1,129 @@
+//
+// ip/address_v6_range.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//                         Oliver Kowalke (oliver dot kowalke at gmail dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_ADDRESS_V6_RANGE_HPP
+#define ASIO_IP_ADDRESS_V6_RANGE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/ip/address_v6_iterator.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+template <typename> class basic_address_range;
+
+/// Represents a range of IPv6 addresses.
+/**
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <> class basic_address_range<address_v6>
+{
+public:
+  /// The type of an iterator that points into the range.
+  typedef basic_address_iterator<address_v6> iterator;
+
+  /// Construct an empty range.
+  basic_address_range() ASIO_NOEXCEPT
+    : begin_(address_v6()),
+      end_(address_v6())
+  {
+  }
+
+  /// Construct an range that represents the given range of addresses.
+  explicit basic_address_range(const iterator& first,
+      const iterator& last) ASIO_NOEXCEPT
+    : begin_(first),
+      end_(last)
+  {
+  }
+
+  /// Copy constructor.
+  basic_address_range(const basic_address_range& other) ASIO_NOEXCEPT
+    : begin_(other.begin_),
+      end_(other.end_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move constructor.
+  basic_address_range(basic_address_range&& other) ASIO_NOEXCEPT
+    : begin_(ASIO_MOVE_CAST(iterator)(other.begin_)),
+      end_(ASIO_MOVE_CAST(iterator)(other.end_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assignment operator.
+  basic_address_range& operator=(
+      const basic_address_range& other) ASIO_NOEXCEPT
+  {
+    begin_ = other.begin_;
+    end_ = other.end_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move assignment operator.
+  basic_address_range& operator=(
+      basic_address_range&& other) ASIO_NOEXCEPT
+  {
+    begin_ = ASIO_MOVE_CAST(iterator)(other.begin_);
+    end_ = ASIO_MOVE_CAST(iterator)(other.end_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Obtain an iterator that points to the start of the range.
+  iterator begin() const ASIO_NOEXCEPT
+  {
+    return begin_;
+  }
+
+  /// Obtain an iterator that points to the end of the range.
+  iterator end() const ASIO_NOEXCEPT
+  {
+    return end_;
+  }
+
+  /// Determine whether the range is empty.
+  bool empty() const ASIO_NOEXCEPT
+  {
+    return begin_ == end_;
+  }
+
+  /// Find an address in the range.
+  iterator find(const address_v6& addr) const ASIO_NOEXCEPT
+  {
+    return addr >= *begin_ && addr < *end_ ? iterator(addr) : end_;
+  }
+
+private:
+  iterator begin_;
+  iterator end_;
+};
+
+/// Represents a range of IPv6 addresses.
+typedef basic_address_range<address_v6> address_v6_range;
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_ADDRESS_V6_RANGE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/bad_address_cast.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/bad_address_cast.hpp
new file mode 100644
index 00000000000..32fda742ade
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/bad_address_cast.hpp
@@ -0,0 +1,53 @@
+//
+// ip/bad_address_cast.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_BAD_ADDRESS_CAST_HPP
+#define ASIO_IP_BAD_ADDRESS_CAST_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <typeinfo>
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// Thrown to indicate a failed address conversion.
+class bad_address_cast :
+#if defined(ASIO_MSVC) && defined(_HAS_EXCEPTIONS) && !_HAS_EXCEPTIONS
+  public std::exception
+#else
+  public std::bad_cast
+#endif
+{
+public:
+  /// Default constructor.
+  bad_address_cast() {}
+
+  /// Destructor.
+  virtual ~bad_address_cast() ASIO_NOEXCEPT_OR_NOTHROW {}
+
+  /// Get the message associated with the exception.
+  virtual const char* what() const ASIO_NOEXCEPT_OR_NOTHROW
+  {
+    return "bad address cast";
+  }
+};
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_ADDRESS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_endpoint.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_endpoint.hpp
new file mode 100644
index 00000000000..92e02a91ff3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_endpoint.hpp
@@ -0,0 +1,264 @@
+//
+// ip/basic_endpoint.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_BASIC_ENDPOINT_HPP
+#define ASIO_IP_BASIC_ENDPOINT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/ip/address.hpp"
+#include "asio/ip/detail/endpoint.hpp"
+
+#if !defined(ASIO_NO_IOSTREAM)
+# include <iosfwd>
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// Describes an endpoint for a version-independent IP socket.
+/**
+ * The asio::ip::basic_endpoint class template describes an endpoint that
+ * may be associated with a particular socket.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Concepts:
+ * Endpoint.
+ */
+template <typename InternetProtocol>
+class basic_endpoint
+{
+public:
+  /// The protocol type associated with the endpoint.
+  typedef InternetProtocol protocol_type;
+
+  /// The type of the endpoint structure. This type is dependent on the
+  /// underlying implementation of the socket layer.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined data_type;
+#else
+  typedef asio::detail::socket_addr_type data_type;
+#endif
+
+  /// Default constructor.
+  basic_endpoint() ASIO_NOEXCEPT
+    : impl_()
+  {
+  }
+
+  /// Construct an endpoint using a port number, specified in the host's byte
+  /// order. The IP address will be the any address (i.e. INADDR_ANY or
+  /// in6addr_any). This constructor would typically be used for accepting new
+  /// connections.
+  /**
+   * @par Examples
+   * To initialise an IPv4 TCP endpoint for port 1234, use:
+   * @code
+   * asio::ip::tcp::endpoint ep(asio::ip::tcp::v4(), 1234);
+   * @endcode
+   *
+   * To specify an IPv6 UDP endpoint for port 9876, use:
+   * @code
+   * asio::ip::udp::endpoint ep(asio::ip::udp::v6(), 9876);
+   * @endcode
+   */
+  basic_endpoint(const InternetProtocol& internet_protocol,
+      unsigned short port_num) ASIO_NOEXCEPT
+    : impl_(internet_protocol.family(), port_num)
+  {
+  }
+
+  /// Construct an endpoint using a port number and an IP address. This
+  /// constructor may be used for accepting connections on a specific interface
+  /// or for making a connection to a remote endpoint.
+  basic_endpoint(const asio::ip::address& addr,
+      unsigned short port_num) ASIO_NOEXCEPT
+    : impl_(addr, port_num)
+  {
+  }
+
+  /// Copy constructor.
+  basic_endpoint(const basic_endpoint& other) ASIO_NOEXCEPT
+    : impl_(other.impl_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move constructor.
+  basic_endpoint(basic_endpoint&& other) ASIO_NOEXCEPT
+    : impl_(other.impl_)
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Assign from another endpoint.
+  basic_endpoint& operator=(const basic_endpoint& other) ASIO_NOEXCEPT
+  {
+    impl_ = other.impl_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-assign from another endpoint.
+  basic_endpoint& operator=(basic_endpoint&& other) ASIO_NOEXCEPT
+  {
+    impl_ = other.impl_;
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// The protocol associated with the endpoint.
+  protocol_type protocol() const ASIO_NOEXCEPT
+  {
+    if (impl_.is_v4())
+      return InternetProtocol::v4();
+    return InternetProtocol::v6();
+  }
+
+  /// Get the underlying endpoint in the native type.
+  data_type* data() ASIO_NOEXCEPT
+  {
+    return impl_.data();
+  }
+
+  /// Get the underlying endpoint in the native type.
+  const data_type* data() const ASIO_NOEXCEPT
+  {
+    return impl_.data();
+  }
+
+  /// Get the underlying size of the endpoint in the native type.
+  std::size_t size() const ASIO_NOEXCEPT
+  {
+    return impl_.size();
+  }
+
+  /// Set the underlying size of the endpoint in the native type.
+  void resize(std::size_t new_size)
+  {
+    impl_.resize(new_size);
+  }
+
+  /// Get the capacity of the endpoint in the native type.
+  std::size_t capacity() const ASIO_NOEXCEPT
+  {
+    return impl_.capacity();
+  }
+
+  /// Get the port associated with the endpoint. The port number is always in
+  /// the host's byte order.
+  unsigned short port() const ASIO_NOEXCEPT
+  {
+    return impl_.port();
+  }
+
+  /// Set the port associated with the endpoint. The port number is always in
+  /// the host's byte order.
+  void port(unsigned short port_num) ASIO_NOEXCEPT
+  {
+    impl_.port(port_num);
+  }
+
+  /// Get the IP address associated with the endpoint.
+  asio::ip::address address() const ASIO_NOEXCEPT
+  {
+    return impl_.address();
+  }
+
+  /// Set the IP address associated with the endpoint.
+  void address(const asio::ip::address& addr) ASIO_NOEXCEPT
+  {
+    impl_.address(addr);
+  }
+
+  /// Compare two endpoints for equality.
+  friend bool operator==(const basic_endpoint<InternetProtocol>& e1,
+      const basic_endpoint<InternetProtocol>& e2) ASIO_NOEXCEPT
+  {
+    return e1.impl_ == e2.impl_;
+  }
+
+  /// Compare two endpoints for inequality.
+  friend bool operator!=(const basic_endpoint<InternetProtocol>& e1,
+      const basic_endpoint<InternetProtocol>& e2) ASIO_NOEXCEPT
+  {
+    return !(e1 == e2);
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator<(const basic_endpoint<InternetProtocol>& e1,
+      const basic_endpoint<InternetProtocol>& e2) ASIO_NOEXCEPT
+  {
+    return e1.impl_ < e2.impl_;
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator>(const basic_endpoint<InternetProtocol>& e1,
+      const basic_endpoint<InternetProtocol>& e2) ASIO_NOEXCEPT
+  {
+    return e2.impl_ < e1.impl_;
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator<=(const basic_endpoint<InternetProtocol>& e1,
+      const basic_endpoint<InternetProtocol>& e2) ASIO_NOEXCEPT
+  {
+    return !(e2 < e1);
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator>=(const basic_endpoint<InternetProtocol>& e1,
+      const basic_endpoint<InternetProtocol>& e2) ASIO_NOEXCEPT
+  {
+    return !(e1 < e2);
+  }
+
+private:
+  // The underlying IP endpoint.
+  asio::ip::detail::endpoint impl_;
+};
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Output an endpoint as a string.
+/**
+ * Used to output a human-readable string for a specified endpoint.
+ *
+ * @param os The output stream to which the string will be written.
+ *
+ * @param endpoint The endpoint to be written.
+ *
+ * @return The output stream.
+ *
+ * @relates asio::ip::basic_endpoint
+ */
+template <typename Elem, typename Traits, typename InternetProtocol>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os,
+    const basic_endpoint<InternetProtocol>& endpoint);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/ip/impl/basic_endpoint.hpp"
+
+#endif // ASIO_IP_BASIC_ENDPOINT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver.hpp
new file mode 100644
index 00000000000..c5a9229b74a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver.hpp
@@ -0,0 +1,1030 @@
+//
+// ip/basic_resolver.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_BASIC_RESOLVER_HPP
+#define ASIO_IP_BASIC_RESOLVER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <string>
+#include "asio/async_result.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/io_object_impl.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/string_view.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/executor.hpp"
+#include "asio/ip/basic_resolver_iterator.hpp"
+#include "asio/ip/basic_resolver_query.hpp"
+#include "asio/ip/basic_resolver_results.hpp"
+#include "asio/ip/resolver_base.hpp"
+#if defined(ASIO_WINDOWS_RUNTIME)
+# include "asio/detail/winrt_resolver_service.hpp"
+#else
+# include "asio/detail/resolver_service.hpp"
+#endif
+
+#if defined(ASIO_HAS_MOVE)
+# include <utility>
+#endif // defined(ASIO_HAS_MOVE)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+#if !defined(ASIO_IP_BASIC_RESOLVER_FWD_DECL)
+#define ASIO_IP_BASIC_RESOLVER_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename InternetProtocol, typename Executor = executor>
+class basic_resolver;
+
+#endif // !defined(ASIO_IP_BASIC_RESOLVER_FWD_DECL)
+
+/// Provides endpoint resolution functionality.
+/**
+ * The basic_resolver class template provides the ability to resolve a query
+ * to a list of endpoints.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename InternetProtocol, typename Executor>
+class basic_resolver
+  : public resolver_base
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the resolver type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The resolver type when rebound to the specified executor.
+    typedef basic_resolver<InternetProtocol, Executor1> other;
+  };
+
+  /// The protocol type.
+  typedef InternetProtocol protocol_type;
+
+  /// The endpoint type.
+  typedef typename InternetProtocol::endpoint endpoint_type;
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated.) The query type.
+  typedef basic_resolver_query<InternetProtocol> query;
+
+  /// (Deprecated.) The iterator type.
+  typedef basic_resolver_iterator<InternetProtocol> iterator;
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// The results type.
+  typedef basic_resolver_results<InternetProtocol> results_type;
+
+  /// Construct with executor.
+  /**
+   * This constructor creates a basic_resolver.
+   *
+   * @param ex The I/O executor that the resolver will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * resolver.
+   */
+  explicit basic_resolver(const executor_type& ex)
+    : impl_(ex)
+  {
+  }
+
+  /// Construct with execution context.
+  /**
+   * This constructor creates a basic_resolver.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the resolver will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the resolver.
+   */
+  template <typename ExecutionContext>
+  explicit basic_resolver(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a basic_resolver from another.
+  /**
+   * This constructor moves a resolver from one object to another.
+   *
+   * @param other The other basic_resolver object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_resolver(const executor_type&) constructor.
+   */
+  basic_resolver(basic_resolver&& other)
+    : impl_(std::move(other.impl_))
+  {
+  }
+
+  /// Move-assign a basic_resolver from another.
+  /**
+   * This assignment operator moves a resolver from one object to another.
+   * Cancels any outstanding asynchronous operations associated with the target
+   * object.
+   *
+   * @param other The other basic_resolver object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_resolver(const executor_type&) constructor.
+   */
+  basic_resolver& operator=(basic_resolver&& other)
+  {
+    impl_ = std::move(other.impl_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destroys the resolver.
+  /**
+   * This function destroys the resolver, cancelling any outstanding
+   * asynchronous wait operations associated with the resolver as if by calling
+   * @c cancel.
+   */
+  ~basic_resolver()
+  {
+  }
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return impl_.get_executor();
+  }
+
+  /// Cancel any asynchronous operations that are waiting on the resolver.
+  /**
+   * This function forces the completion of any pending asynchronous
+   * operations on the host resolver. The handler for each cancelled operation
+   * will be invoked with the asio::error::operation_aborted error code.
+   */
+  void cancel()
+  {
+    return impl_.get_service().cancel(impl_.get_implementation());
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use overload with separate host and service parameters.)
+  /// Perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve a query into a list of endpoint entries.
+   *
+   * @param q A query object that determines what endpoints will be returned.
+   *
+   * @returns A range object representing the list of endpoint entries. A
+   * successful call to this function is guaranteed to return a non-empty
+   * range.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  results_type resolve(const query& q)
+  {
+    asio::error_code ec;
+    results_type r = impl_.get_service().resolve(
+        impl_.get_implementation(), q, ec);
+    asio::detail::throw_error(ec, "resolve");
+    return r;
+  }
+
+  /// (Deprecated: Use overload with separate host and service parameters.)
+  /// Perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve a query into a list of endpoint entries.
+   *
+   * @param q A query object that determines what endpoints will be returned.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns A range object representing the list of endpoint entries. An
+   * empty range is returned if an error occurs. A successful call to this
+   * function is guaranteed to return a non-empty range.
+   */
+  results_type resolve(const query& q, asio::error_code& ec)
+  {
+    return impl_.get_service().resolve(impl_.get_implementation(), q, ec);
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @returns A range object representing the list of endpoint entries. A
+   * successful call to this function is guaranteed to return a non-empty
+   * range.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  results_type resolve(ASIO_STRING_VIEW_PARAM host,
+      ASIO_STRING_VIEW_PARAM service)
+  {
+    return resolve(host, service, resolver_base::flags());
+  }
+
+  /// Perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns A range object representing the list of endpoint entries. An
+   * empty range is returned if an error occurs. A successful call to this
+   * function is guaranteed to return a non-empty range.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  results_type resolve(ASIO_STRING_VIEW_PARAM host,
+      ASIO_STRING_VIEW_PARAM service, asio::error_code& ec)
+  {
+    return resolve(host, service, resolver_base::flags(), ec);
+  }
+
+  /// Perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param resolve_flags A set of flags that determine how name resolution
+   * should be performed. The default flags are suitable for communication with
+   * remote hosts. See the @ref resolver_base documentation for the set of
+   * available flags.
+   *
+   * @returns A range object representing the list of endpoint entries. A
+   * successful call to this function is guaranteed to return a non-empty
+   * range.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  results_type resolve(ASIO_STRING_VIEW_PARAM host,
+      ASIO_STRING_VIEW_PARAM service, resolver_base::flags resolve_flags)
+  {
+    asio::error_code ec;
+    basic_resolver_query<protocol_type> q(static_cast<std::string>(host),
+        static_cast<std::string>(service), resolve_flags);
+    results_type r = impl_.get_service().resolve(
+        impl_.get_implementation(), q, ec);
+    asio::detail::throw_error(ec, "resolve");
+    return r;
+  }
+
+  /// Perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param resolve_flags A set of flags that determine how name resolution
+   * should be performed. The default flags are suitable for communication with
+   * remote hosts. See the @ref resolver_base documentation for the set of
+   * available flags.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns A range object representing the list of endpoint entries. An
+   * empty range is returned if an error occurs. A successful call to this
+   * function is guaranteed to return a non-empty range.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  results_type resolve(ASIO_STRING_VIEW_PARAM host,
+      ASIO_STRING_VIEW_PARAM service, resolver_base::flags resolve_flags,
+      asio::error_code& ec)
+  {
+    basic_resolver_query<protocol_type> q(static_cast<std::string>(host),
+        static_cast<std::string>(service), resolve_flags);
+    return impl_.get_service().resolve(impl_.get_implementation(), q, ec);
+  }
+
+  /// Perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param protocol A protocol object, normally representing either the IPv4 or
+   * IPv6 version of an internet protocol.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @returns A range object representing the list of endpoint entries. A
+   * successful call to this function is guaranteed to return a non-empty
+   * range.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  results_type resolve(const protocol_type& protocol,
+      ASIO_STRING_VIEW_PARAM host, ASIO_STRING_VIEW_PARAM service)
+  {
+    return resolve(protocol, host, service, resolver_base::flags());
+  }
+
+  /// Perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param protocol A protocol object, normally representing either the IPv4 or
+   * IPv6 version of an internet protocol.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns A range object representing the list of endpoint entries. An
+   * empty range is returned if an error occurs. A successful call to this
+   * function is guaranteed to return a non-empty range.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  results_type resolve(const protocol_type& protocol,
+      ASIO_STRING_VIEW_PARAM host, ASIO_STRING_VIEW_PARAM service,
+      asio::error_code& ec)
+  {
+    return resolve(protocol, host, service, resolver_base::flags(), ec);
+  }
+
+  /// Perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param protocol A protocol object, normally representing either the IPv4 or
+   * IPv6 version of an internet protocol.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param resolve_flags A set of flags that determine how name resolution
+   * should be performed. The default flags are suitable for communication with
+   * remote hosts. See the @ref resolver_base documentation for the set of
+   * available flags.
+   *
+   * @returns A range object representing the list of endpoint entries. A
+   * successful call to this function is guaranteed to return a non-empty
+   * range.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  results_type resolve(const protocol_type& protocol,
+      ASIO_STRING_VIEW_PARAM host, ASIO_STRING_VIEW_PARAM service,
+      resolver_base::flags resolve_flags)
+  {
+    asio::error_code ec;
+    basic_resolver_query<protocol_type> q(
+        protocol, static_cast<std::string>(host),
+        static_cast<std::string>(service), resolve_flags);
+    results_type r = impl_.get_service().resolve(
+        impl_.get_implementation(), q, ec);
+    asio::detail::throw_error(ec, "resolve");
+    return r;
+  }
+
+  /// Perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param protocol A protocol object, normally representing either the IPv4 or
+   * IPv6 version of an internet protocol.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param resolve_flags A set of flags that determine how name resolution
+   * should be performed. The default flags are suitable for communication with
+   * remote hosts. See the @ref resolver_base documentation for the set of
+   * available flags.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns A range object representing the list of endpoint entries. An
+   * empty range is returned if an error occurs. A successful call to this
+   * function is guaranteed to return a non-empty range.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  results_type resolve(const protocol_type& protocol,
+      ASIO_STRING_VIEW_PARAM host, ASIO_STRING_VIEW_PARAM service,
+      resolver_base::flags resolve_flags, asio::error_code& ec)
+  {
+    basic_resolver_query<protocol_type> q(
+        protocol, static_cast<std::string>(host),
+        static_cast<std::string>(service), resolve_flags);
+    return impl_.get_service().resolve(impl_.get_implementation(), q, ec);
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use overload with separate host and service parameters.)
+  /// Asynchronously perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to asynchronously resolve a query into a list of
+   * endpoint entries.
+   *
+   * @param q A query object that determines what endpoints will be returned.
+   *
+   * @param handler The handler to be called when the resolve operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   resolver::results_type results // Resolved endpoints as a range.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * A successful resolve operation is guaranteed to pass a non-empty range to
+   * the handler.
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        results_type)) ResolveHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ResolveHandler,
+      void (asio::error_code, results_type))
+  async_resolve(const query& q,
+      ASIO_MOVE_ARG(ResolveHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return asio::async_initiate<ResolveHandler,
+      void (asio::error_code, results_type)>(
+        initiate_async_resolve(this), handler, q);
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Asynchronously perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param handler The handler to be called when the resolve operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   resolver::results_type results // Resolved endpoints as a range.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * A successful resolve operation is guaranteed to pass a non-empty range to
+   * the handler.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        results_type)) ResolveHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ResolveHandler,
+      void (asio::error_code, results_type))
+  async_resolve(ASIO_STRING_VIEW_PARAM host,
+      ASIO_STRING_VIEW_PARAM service,
+      ASIO_MOVE_ARG(ResolveHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_resolve(host, service, resolver_base::flags(),
+        ASIO_MOVE_CAST(ResolveHandler)(handler));
+  }
+
+  /// Asynchronously perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param resolve_flags A set of flags that determine how name resolution
+   * should be performed. The default flags are suitable for communication with
+   * remote hosts. See the @ref resolver_base documentation for the set of
+   * available flags.
+   *
+   * @param handler The handler to be called when the resolve operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   resolver::results_type results // Resolved endpoints as a range.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * A successful resolve operation is guaranteed to pass a non-empty range to
+   * the handler.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        results_type)) ResolveHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ResolveHandler,
+      void (asio::error_code, results_type))
+  async_resolve(ASIO_STRING_VIEW_PARAM host,
+      ASIO_STRING_VIEW_PARAM service,
+      resolver_base::flags resolve_flags,
+      ASIO_MOVE_ARG(ResolveHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    basic_resolver_query<protocol_type> q(static_cast<std::string>(host),
+        static_cast<std::string>(service), resolve_flags);
+
+    return asio::async_initiate<ResolveHandler,
+      void (asio::error_code, results_type)>(
+        initiate_async_resolve(this), handler, q);
+  }
+
+  /// Asynchronously perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param protocol A protocol object, normally representing either the IPv4 or
+   * IPv6 version of an internet protocol.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param handler The handler to be called when the resolve operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   resolver::results_type results // Resolved endpoints as a range.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * A successful resolve operation is guaranteed to pass a non-empty range to
+   * the handler.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        results_type)) ResolveHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ResolveHandler,
+      void (asio::error_code, results_type))
+  async_resolve(const protocol_type& protocol,
+      ASIO_STRING_VIEW_PARAM host, ASIO_STRING_VIEW_PARAM service,
+      ASIO_MOVE_ARG(ResolveHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_resolve(protocol, host, service, resolver_base::flags(),
+        ASIO_MOVE_CAST(ResolveHandler)(handler));
+  }
+
+  /// Asynchronously perform forward resolution of a query to a list of entries.
+  /**
+   * This function is used to resolve host and service names into a list of
+   * endpoint entries.
+   *
+   * @param protocol A protocol object, normally representing either the IPv4 or
+   * IPv6 version of an internet protocol.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param resolve_flags A set of flags that determine how name resolution
+   * should be performed. The default flags are suitable for communication with
+   * remote hosts. See the @ref resolver_base documentation for the set of
+   * available flags.
+   *
+   * @param handler The handler to be called when the resolve operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   resolver::results_type results // Resolved endpoints as a range.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * A successful resolve operation is guaranteed to pass a non-empty range to
+   * the handler.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        results_type)) ResolveHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ResolveHandler,
+      void (asio::error_code, results_type))
+  async_resolve(const protocol_type& protocol,
+      ASIO_STRING_VIEW_PARAM host, ASIO_STRING_VIEW_PARAM service,
+      resolver_base::flags resolve_flags,
+      ASIO_MOVE_ARG(ResolveHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    basic_resolver_query<protocol_type> q(
+        protocol, static_cast<std::string>(host),
+        static_cast<std::string>(service), resolve_flags);
+
+    return asio::async_initiate<ResolveHandler,
+      void (asio::error_code, results_type)>(
+        initiate_async_resolve(this), handler, q);
+  }
+
+  /// Perform reverse resolution of an endpoint to a list of entries.
+  /**
+   * This function is used to resolve an endpoint into a list of endpoint
+   * entries.
+   *
+   * @param e An endpoint object that determines what endpoints will be
+   * returned.
+   *
+   * @returns A range object representing the list of endpoint entries. A
+   * successful call to this function is guaranteed to return a non-empty
+   * range.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  results_type resolve(const endpoint_type& e)
+  {
+    asio::error_code ec;
+    results_type i = impl_.get_service().resolve(
+        impl_.get_implementation(), e, ec);
+    asio::detail::throw_error(ec, "resolve");
+    return i;
+  }
+
+  /// Perform reverse resolution of an endpoint to a list of entries.
+  /**
+   * This function is used to resolve an endpoint into a list of endpoint
+   * entries.
+   *
+   * @param e An endpoint object that determines what endpoints will be
+   * returned.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns A range object representing the list of endpoint entries. An
+   * empty range is returned if an error occurs. A successful call to this
+   * function is guaranteed to return a non-empty range.
+   */
+  results_type resolve(const endpoint_type& e, asio::error_code& ec)
+  {
+    return impl_.get_service().resolve(impl_.get_implementation(), e, ec);
+  }
+
+  /// Asynchronously perform reverse resolution of an endpoint to a list of
+  /// entries.
+  /**
+   * This function is used to asynchronously resolve an endpoint into a list of
+   * endpoint entries.
+   *
+   * @param e An endpoint object that determines what endpoints will be
+   * returned.
+   *
+   * @param handler The handler to be called when the resolve operation
+   * completes. Copies will be made of the handler as required. The function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   resolver::results_type results // Resolved endpoints as a range.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * A successful resolve operation is guaranteed to pass a non-empty range to
+   * the handler.
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        results_type)) ResolveHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ResolveHandler,
+      void (asio::error_code, results_type))
+  async_resolve(const endpoint_type& e,
+      ASIO_MOVE_ARG(ResolveHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return asio::async_initiate<ResolveHandler,
+      void (asio::error_code, results_type)>(
+        initiate_async_resolve(this), handler, e);
+  }
+
+private:
+  // Disallow copying and assignment.
+  basic_resolver(const basic_resolver&) ASIO_DELETED;
+  basic_resolver& operator=(const basic_resolver&) ASIO_DELETED;
+
+  class initiate_async_resolve
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_resolve(basic_resolver* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ResolveHandler, typename Query>
+    void operator()(ASIO_MOVE_ARG(ResolveHandler) handler,
+        const Query& q) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ResolveHandler.
+      ASIO_RESOLVE_HANDLER_CHECK(
+          ResolveHandler, handler, results_type) type_check;
+
+      asio::detail::non_const_lvalue<ResolveHandler> handler2(handler);
+      self_->impl_.get_service().async_resolve(
+          self_->impl_.get_implementation(), q, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_resolver* self_;
+  };
+
+# if defined(ASIO_WINDOWS_RUNTIME)
+  asio::detail::io_object_impl<
+    asio::detail::winrt_resolver_service<InternetProtocol>,
+    Executor> impl_;
+# else
+  asio::detail::io_object_impl<
+    asio::detail::resolver_service<InternetProtocol>,
+    Executor> impl_;
+# endif
+};
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_BASIC_RESOLVER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_entry.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_entry.hpp
new file mode 100644
index 00000000000..a5a14589048
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_entry.hpp
@@ -0,0 +1,113 @@
+//
+// ip/basic_resolver_entry.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_BASIC_RESOLVER_ENTRY_HPP
+#define ASIO_IP_BASIC_RESOLVER_ENTRY_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <string>
+#include "asio/detail/string_view.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// An entry produced by a resolver.
+/**
+ * The asio::ip::basic_resolver_entry class template describes an entry
+ * as returned by a resolver.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename InternetProtocol>
+class basic_resolver_entry
+{
+public:
+  /// The protocol type associated with the endpoint entry.
+  typedef InternetProtocol protocol_type;
+
+  /// The endpoint type associated with the endpoint entry.
+  typedef typename InternetProtocol::endpoint endpoint_type;
+
+  /// Default constructor.
+  basic_resolver_entry()
+  {
+  }
+
+  /// Construct with specified endpoint, host name and service name.
+  basic_resolver_entry(const endpoint_type& ep,
+      ASIO_STRING_VIEW_PARAM host, ASIO_STRING_VIEW_PARAM service)
+    : endpoint_(ep),
+      host_name_(static_cast<std::string>(host)),
+      service_name_(static_cast<std::string>(service))
+  {
+  }
+
+  /// Get the endpoint associated with the entry.
+  endpoint_type endpoint() const
+  {
+    return endpoint_;
+  }
+
+  /// Convert to the endpoint associated with the entry.
+  operator endpoint_type() const
+  {
+    return endpoint_;
+  }
+
+  /// Get the host name associated with the entry.
+  std::string host_name() const
+  {
+    return host_name_;
+  }
+
+  /// Get the host name associated with the entry.
+  template <class Allocator>
+  std::basic_string<char, std::char_traits<char>, Allocator> host_name(
+      const Allocator& alloc = Allocator()) const
+  {
+    return std::basic_string<char, std::char_traits<char>, Allocator>(
+        host_name_.c_str(), alloc);
+  }
+
+  /// Get the service name associated with the entry.
+  std::string service_name() const
+  {
+    return service_name_;
+  }
+
+  /// Get the service name associated with the entry.
+  template <class Allocator>
+  std::basic_string<char, std::char_traits<char>, Allocator> service_name(
+      const Allocator& alloc = Allocator()) const
+  {
+    return std::basic_string<char, std::char_traits<char>, Allocator>(
+        service_name_.c_str(), alloc);
+  }
+
+private:
+  endpoint_type endpoint_;
+  std::string host_name_;
+  std::string service_name_;
+};
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_BASIC_RESOLVER_ENTRY_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_iterator.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_iterator.hpp
new file mode 100644
index 00000000000..aa9f8fd76c6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_iterator.hpp
@@ -0,0 +1,192 @@
+//
+// ip/basic_resolver_iterator.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_BASIC_RESOLVER_ITERATOR_HPP
+#define ASIO_IP_BASIC_RESOLVER_ITERATOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include <cstring>
+#include <iterator>
+#include <string>
+#include <vector>
+#include "asio/detail/memory.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/ip/basic_resolver_entry.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+# include "asio/detail/winrt_utils.hpp"
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// An iterator over the entries produced by a resolver.
+/**
+ * The asio::ip::basic_resolver_iterator class template is used to define
+ * iterators over the results returned by a resolver.
+ *
+ * The iterator's value_type, obtained when the iterator is dereferenced, is:
+ * @code const basic_resolver_entry<InternetProtocol> @endcode
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename InternetProtocol>
+class basic_resolver_iterator
+{
+public:
+  /// The type used for the distance between two iterators.
+  typedef std::ptrdiff_t difference_type;
+
+  /// The type of the value pointed to by the iterator.
+  typedef basic_resolver_entry<InternetProtocol> value_type;
+
+  /// The type of the result of applying operator->() to the iterator.
+  typedef const basic_resolver_entry<InternetProtocol>* pointer;
+
+  /// The type of the result of applying operator*() to the iterator.
+  typedef const basic_resolver_entry<InternetProtocol>& reference;
+
+  /// The iterator category.
+  typedef std::forward_iterator_tag iterator_category;
+
+  /// Default constructor creates an end iterator.
+  basic_resolver_iterator()
+    : index_(0)
+  {
+  }
+
+  /// Copy constructor.
+  basic_resolver_iterator(const basic_resolver_iterator& other)
+    : values_(other.values_),
+      index_(other.index_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move constructor.
+  basic_resolver_iterator(basic_resolver_iterator&& other)
+    : values_(ASIO_MOVE_CAST(values_ptr_type)(other.values_)),
+      index_(other.index_)
+  {
+    other.index_ = 0;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Assignment operator.
+  basic_resolver_iterator& operator=(const basic_resolver_iterator& other)
+  {
+    values_ = other.values_;
+    index_ = other.index_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-assignment operator.
+  basic_resolver_iterator& operator=(basic_resolver_iterator&& other)
+  {
+    if (this != &other)
+    {
+      values_ = ASIO_MOVE_CAST(values_ptr_type)(other.values_);
+      index_ = other.index_;
+      other.index_ = 0;
+    }
+
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Dereference an iterator.
+  const basic_resolver_entry<InternetProtocol>& operator*() const
+  {
+    return dereference();
+  }
+
+  /// Dereference an iterator.
+  const basic_resolver_entry<InternetProtocol>* operator->() const
+  {
+    return &dereference();
+  }
+
+  /// Increment operator (prefix).
+  basic_resolver_iterator& operator++()
+  {
+    increment();
+    return *this;
+  }
+
+  /// Increment operator (postfix).
+  basic_resolver_iterator operator++(int)
+  {
+    basic_resolver_iterator tmp(*this);
+    ++*this;
+    return tmp;
+  }
+
+  /// Test two iterators for equality.
+  friend bool operator==(const basic_resolver_iterator& a,
+      const basic_resolver_iterator& b)
+  {
+    return a.equal(b);
+  }
+
+  /// Test two iterators for inequality.
+  friend bool operator!=(const basic_resolver_iterator& a,
+      const basic_resolver_iterator& b)
+  {
+    return !a.equal(b);
+  }
+
+protected:
+  void increment()
+  {
+    if (++index_ == values_->size())
+    {
+      // Reset state to match a default constructed end iterator.
+      values_.reset();
+      index_ = 0;
+    }
+  }
+
+  bool equal(const basic_resolver_iterator& other) const
+  {
+    if (!values_ && !other.values_)
+      return true;
+    if (values_ != other.values_)
+      return false;
+    return index_ == other.index_;
+  }
+
+  const basic_resolver_entry<InternetProtocol>& dereference() const
+  {
+    return (*values_)[index_];
+  }
+
+  typedef std::vector<basic_resolver_entry<InternetProtocol> > values_type;
+  typedef asio::detail::shared_ptr<values_type> values_ptr_type;
+  values_ptr_type values_;
+  std::size_t index_;
+};
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_BASIC_RESOLVER_ITERATOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_query.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_query.hpp
new file mode 100644
index 00000000000..c8c49d639af
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_query.hpp
@@ -0,0 +1,244 @@
+//
+// ip/basic_resolver_query.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_BASIC_RESOLVER_QUERY_HPP
+#define ASIO_IP_BASIC_RESOLVER_QUERY_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <string>
+#include "asio/detail/socket_ops.hpp"
+#include "asio/ip/resolver_query_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// An query to be passed to a resolver.
+/**
+ * The asio::ip::basic_resolver_query class template describes a query
+ * that can be passed to a resolver.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename InternetProtocol>
+class basic_resolver_query
+  : public resolver_query_base
+{
+public:
+  /// The protocol type associated with the endpoint query.
+  typedef InternetProtocol protocol_type;
+
+  /// Construct with specified service name for any protocol.
+  /**
+   * This constructor is typically used to perform name resolution for local
+   * service binding.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number.
+   *
+   * @param resolve_flags A set of flags that determine how name resolution
+   * should be performed. The default flags are suitable for local service
+   * binding.
+   *
+   * @note On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  basic_resolver_query(const std::string& service,
+      resolver_query_base::flags resolve_flags = passive | address_configured)
+    : hints_(),
+      host_name_(),
+      service_name_(service)
+  {
+    typename InternetProtocol::endpoint endpoint;
+    hints_.ai_flags = static_cast<int>(resolve_flags);
+    hints_.ai_family = PF_UNSPEC;
+    hints_.ai_socktype = endpoint.protocol().type();
+    hints_.ai_protocol = endpoint.protocol().protocol();
+    hints_.ai_addrlen = 0;
+    hints_.ai_canonname = 0;
+    hints_.ai_addr = 0;
+    hints_.ai_next = 0;
+  }
+
+  /// Construct with specified service name for a given protocol.
+  /**
+   * This constructor is typically used to perform name resolution for local
+   * service binding with a specific protocol version.
+   *
+   * @param protocol A protocol object, normally representing either the IPv4 or
+   * IPv6 version of an internet protocol.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number.
+   *
+   * @param resolve_flags A set of flags that determine how name resolution
+   * should be performed. The default flags are suitable for local service
+   * binding.
+   *
+   * @note On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  basic_resolver_query(const protocol_type& protocol,
+      const std::string& service,
+      resolver_query_base::flags resolve_flags = passive | address_configured)
+    : hints_(),
+      host_name_(),
+      service_name_(service)
+  {
+    hints_.ai_flags = static_cast<int>(resolve_flags);
+    hints_.ai_family = protocol.family();
+    hints_.ai_socktype = protocol.type();
+    hints_.ai_protocol = protocol.protocol();
+    hints_.ai_addrlen = 0;
+    hints_.ai_canonname = 0;
+    hints_.ai_addr = 0;
+    hints_.ai_next = 0;
+  }
+
+  /// Construct with specified host name and service name for any protocol.
+  /**
+   * This constructor is typically used to perform name resolution for
+   * communication with remote hosts.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param resolve_flags A set of flags that determine how name resolution
+   * should be performed. The default flags are suitable for communication with
+   * remote hosts.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  basic_resolver_query(const std::string& host, const std::string& service,
+      resolver_query_base::flags resolve_flags = address_configured)
+    : hints_(),
+      host_name_(host),
+      service_name_(service)
+  {
+    typename InternetProtocol::endpoint endpoint;
+    hints_.ai_flags = static_cast<int>(resolve_flags);
+    hints_.ai_family = ASIO_OS_DEF(AF_UNSPEC);
+    hints_.ai_socktype = endpoint.protocol().type();
+    hints_.ai_protocol = endpoint.protocol().protocol();
+    hints_.ai_addrlen = 0;
+    hints_.ai_canonname = 0;
+    hints_.ai_addr = 0;
+    hints_.ai_next = 0;
+  }
+
+  /// Construct with specified host name and service name for a given protocol.
+  /**
+   * This constructor is typically used to perform name resolution for
+   * communication with remote hosts.
+   *
+   * @param protocol A protocol object, normally representing either the IPv4 or
+   * IPv6 version of an internet protocol.
+   *
+   * @param host A string identifying a location. May be a descriptive name or
+   * a numeric address string. If an empty string and the passive flag has been
+   * specified, the resolved endpoints are suitable for local service binding.
+   * If an empty string and passive is not specified, the resolved endpoints
+   * will use the loopback address.
+   *
+   * @param service A string identifying the requested service. This may be a
+   * descriptive name or a numeric string corresponding to a port number. May
+   * be an empty string, in which case all resolved endpoints will have a port
+   * number of 0.
+   *
+   * @param resolve_flags A set of flags that determine how name resolution
+   * should be performed. The default flags are suitable for communication with
+   * remote hosts.
+   *
+   * @note On POSIX systems, host names may be locally defined in the file
+   * <tt>/etc/hosts</tt>. On Windows, host names may be defined in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\hosts</tt>. Remote host name
+   * resolution is performed using DNS. Operating systems may use additional
+   * locations when resolving host names (such as NETBIOS names on Windows).
+   *
+   * On POSIX systems, service names are typically defined in the file
+   * <tt>/etc/services</tt>. On Windows, service names may be found in the file
+   * <tt>c:\\windows\\system32\\drivers\\etc\\services</tt>. Operating systems
+   * may use additional locations when resolving service names.
+   */
+  basic_resolver_query(const protocol_type& protocol,
+      const std::string& host, const std::string& service,
+      resolver_query_base::flags resolve_flags = address_configured)
+    : hints_(),
+      host_name_(host),
+      service_name_(service)
+  {
+    hints_.ai_flags = static_cast<int>(resolve_flags);
+    hints_.ai_family = protocol.family();
+    hints_.ai_socktype = protocol.type();
+    hints_.ai_protocol = protocol.protocol();
+    hints_.ai_addrlen = 0;
+    hints_.ai_canonname = 0;
+    hints_.ai_addr = 0;
+    hints_.ai_next = 0;
+  }
+
+  /// Get the hints associated with the query.
+  const asio::detail::addrinfo_type& hints() const
+  {
+    return hints_;
+  }
+
+  /// Get the host name associated with the query.
+  std::string host_name() const
+  {
+    return host_name_;
+  }
+
+  /// Get the service name associated with the query.
+  std::string service_name() const
+  {
+    return service_name_;
+  }
+
+private:
+  asio::detail::addrinfo_type hints_;
+  std::string host_name_;
+  std::string service_name_;
+};
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_BASIC_RESOLVER_QUERY_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_results.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_results.hpp
new file mode 100644
index 00000000000..3b3fad49ac5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/basic_resolver_results.hpp
@@ -0,0 +1,311 @@
+//
+// ip/basic_resolver_results.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_BASIC_RESOLVER_RESULTS_HPP
+#define ASIO_IP_BASIC_RESOLVER_RESULTS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include <cstring>
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/ip/basic_resolver_iterator.hpp"
+
+#if defined(ASIO_WINDOWS_RUNTIME)
+# include "asio/detail/winrt_utils.hpp"
+#endif // defined(ASIO_WINDOWS_RUNTIME)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// A range of entries produced by a resolver.
+/**
+ * The asio::ip::basic_resolver_results class template is used to define
+ * a range over the results returned by a resolver.
+ *
+ * The iterator's value_type, obtained when a results iterator is dereferenced,
+ * is: @code const basic_resolver_entry<InternetProtocol> @endcode
+ *
+ * @note For backward compatibility, basic_resolver_results is derived from
+ * basic_resolver_iterator. This derivation is deprecated.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename InternetProtocol>
+class basic_resolver_results
+#if !defined(ASIO_NO_DEPRECATED)
+  : public basic_resolver_iterator<InternetProtocol>
+#else // !defined(ASIO_NO_DEPRECATED)
+  : private basic_resolver_iterator<InternetProtocol>
+#endif // !defined(ASIO_NO_DEPRECATED)
+{
+public:
+  /// The protocol type associated with the results.
+  typedef InternetProtocol protocol_type;
+
+  /// The endpoint type associated with the results.
+  typedef typename protocol_type::endpoint endpoint_type;
+
+  /// The type of a value in the results range.
+  typedef basic_resolver_entry<protocol_type> value_type;
+
+  /// The type of a const reference to a value in the range.
+  typedef const value_type& const_reference;
+
+  /// The type of a non-const reference to a value in the range.
+  typedef value_type& reference;
+
+  /// The type of an iterator into the range.
+  typedef basic_resolver_iterator<protocol_type> const_iterator;
+
+  /// The type of an iterator into the range.
+  typedef const_iterator iterator;
+
+  /// Type used to represent the distance between two iterators in the range.
+  typedef std::ptrdiff_t difference_type;
+
+  /// Type used to represent a count of the elements in the range.
+  typedef std::size_t size_type;
+
+  /// Default constructor creates an empty range.
+  basic_resolver_results()
+  {
+  }
+
+  /// Copy constructor.
+  basic_resolver_results(const basic_resolver_results& other)
+    : basic_resolver_iterator<InternetProtocol>(other)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move constructor.
+  basic_resolver_results(basic_resolver_results&& other)
+    : basic_resolver_iterator<InternetProtocol>(
+        ASIO_MOVE_CAST(basic_resolver_results)(other))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Assignment operator.
+  basic_resolver_results& operator=(const basic_resolver_results& other)
+  {
+    basic_resolver_iterator<InternetProtocol>::operator=(other);
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-assignment operator.
+  basic_resolver_results& operator=(basic_resolver_results&& other)
+  {
+    basic_resolver_iterator<InternetProtocol>::operator=(
+        ASIO_MOVE_CAST(basic_resolver_results)(other));
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+#if !defined(GENERATING_DOCUMENTATION)
+  // Create results from an addrinfo list returned by getaddrinfo.
+  static basic_resolver_results create(
+      asio::detail::addrinfo_type* address_info,
+      const std::string& host_name, const std::string& service_name)
+  {
+    basic_resolver_results results;
+    if (!address_info)
+      return results;
+
+    std::string actual_host_name = host_name;
+    if (address_info->ai_canonname)
+      actual_host_name = address_info->ai_canonname;
+
+    results.values_.reset(new values_type);
+
+    while (address_info)
+    {
+      if (address_info->ai_family == ASIO_OS_DEF(AF_INET)
+          || address_info->ai_family == ASIO_OS_DEF(AF_INET6))
+      {
+        using namespace std; // For memcpy.
+        typename InternetProtocol::endpoint endpoint;
+        endpoint.resize(static_cast<std::size_t>(address_info->ai_addrlen));
+        memcpy(endpoint.data(), address_info->ai_addr,
+            address_info->ai_addrlen);
+        results.values_->push_back(
+            basic_resolver_entry<InternetProtocol>(endpoint,
+              actual_host_name, service_name));
+      }
+      address_info = address_info->ai_next;
+    }
+
+    return results;
+  }
+
+  // Create results from an endpoint, host name and service name.
+  static basic_resolver_results create(const endpoint_type& endpoint,
+      const std::string& host_name, const std::string& service_name)
+  {
+    basic_resolver_results results;
+    results.values_.reset(new values_type);
+    results.values_->push_back(
+        basic_resolver_entry<InternetProtocol>(
+          endpoint, host_name, service_name));
+    return results;
+  }
+
+  // Create results from a sequence of endpoints, host and service name.
+  template <typename EndpointIterator>
+  static basic_resolver_results create(
+      EndpointIterator begin, EndpointIterator end,
+      const std::string& host_name, const std::string& service_name)
+  {
+    basic_resolver_results results;
+    if (begin != end)
+    {
+      results.values_.reset(new values_type);
+      for (EndpointIterator ep_iter = begin; ep_iter != end; ++ep_iter)
+      {
+        results.values_->push_back(
+            basic_resolver_entry<InternetProtocol>(
+              *ep_iter, host_name, service_name));
+      }
+    }
+    return results;
+  }
+
+# if defined(ASIO_WINDOWS_RUNTIME)
+  // Create results from a Windows Runtime list of EndpointPair objects.
+  static basic_resolver_results create(
+      Windows::Foundation::Collections::IVectorView<
+        Windows::Networking::EndpointPair^>^ endpoints,
+      const asio::detail::addrinfo_type& hints,
+      const std::string& host_name, const std::string& service_name)
+  {
+    basic_resolver_results results;
+    if (endpoints->Size)
+    {
+      results.values_.reset(new values_type);
+      for (unsigned int i = 0; i < endpoints->Size; ++i)
+      {
+        auto pair = endpoints->GetAt(i);
+
+        if (hints.ai_family == ASIO_OS_DEF(AF_INET)
+            && pair->RemoteHostName->Type
+              != Windows::Networking::HostNameType::Ipv4)
+          continue;
+
+        if (hints.ai_family == ASIO_OS_DEF(AF_INET6)
+            && pair->RemoteHostName->Type
+              != Windows::Networking::HostNameType::Ipv6)
+          continue;
+
+        results.values_->push_back(
+            basic_resolver_entry<InternetProtocol>(
+              typename InternetProtocol::endpoint(
+                ip::make_address(
+                  asio::detail::winrt_utils::string(
+                    pair->RemoteHostName->CanonicalName)),
+                asio::detail::winrt_utils::integer(
+                  pair->RemoteServiceName)),
+              host_name, service_name));
+      }
+    }
+    return results;
+  }
+# endif // defined(ASIO_WINDOWS_RUNTIME)
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+  /// Get the number of entries in the results range.
+  size_type size() const ASIO_NOEXCEPT
+  {
+    return this->values_ ? this->values_->size() : 0;
+  }
+
+  /// Get the maximum number of entries permitted in a results range.
+  size_type max_size() const ASIO_NOEXCEPT
+  {
+    return this->values_ ? this->values_->max_size() : values_type().max_size();
+  }
+
+  /// Determine whether the results range is empty.
+  bool empty() const ASIO_NOEXCEPT
+  {
+    return this->values_ ? this->values_->empty() : true;
+  }
+
+  /// Obtain a begin iterator for the results range.
+  const_iterator begin() const
+  {
+    basic_resolver_results tmp(*this);
+    tmp.index_ = 0;
+    return ASIO_MOVE_CAST(basic_resolver_results)(tmp);
+  }
+
+  /// Obtain an end iterator for the results range.
+  const_iterator end() const
+  {
+    return const_iterator();
+  }
+
+  /// Obtain a begin iterator for the results range.
+  const_iterator cbegin() const
+  {
+    return begin();
+  }
+
+  /// Obtain an end iterator for the results range.
+  const_iterator cend() const
+  {
+    return end();
+  }
+
+  /// Swap the results range with another.
+  void swap(basic_resolver_results& that) ASIO_NOEXCEPT
+  {
+    if (this != &that)
+    {
+      this->values_.swap(that.values_);
+      std::size_t index = this->index_;
+      this->index_ = that.index_;
+      that.index_ = index;
+    }
+  }
+
+  /// Test two iterators for equality.
+  friend bool operator==(const basic_resolver_results& a,
+      const basic_resolver_results& b)
+  {
+    return a.equal(b);
+  }
+
+  /// Test two iterators for inequality.
+  friend bool operator!=(const basic_resolver_results& a,
+      const basic_resolver_results& b)
+  {
+    return !a.equal(b);
+  }
+
+private:
+  typedef std::vector<basic_resolver_entry<InternetProtocol> > values_type;
+};
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_BASIC_RESOLVER_RESULTS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/detail/endpoint.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/detail/endpoint.hpp
new file mode 100644
index 00000000000..a422373b5c1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/detail/endpoint.hpp
@@ -0,0 +1,141 @@
+//
+// ip/detail/endpoint.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_DETAIL_ENDPOINT_HPP
+#define ASIO_IP_DETAIL_ENDPOINT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <string>
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/winsock_init.hpp"
+#include "asio/error_code.hpp"
+#include "asio/ip/address.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+namespace detail {
+
+// Helper class for implementating an IP endpoint.
+class endpoint
+{
+public:
+  // Default constructor.
+  ASIO_DECL endpoint() ASIO_NOEXCEPT;
+
+  // Construct an endpoint using a family and port number.
+  ASIO_DECL endpoint(int family,
+      unsigned short port_num) ASIO_NOEXCEPT;
+
+  // Construct an endpoint using an address and port number.
+  ASIO_DECL endpoint(const asio::ip::address& addr,
+      unsigned short port_num) ASIO_NOEXCEPT;
+
+  // Copy constructor.
+  endpoint(const endpoint& other) ASIO_NOEXCEPT
+    : data_(other.data_)
+  {
+  }
+
+  // Assign from another endpoint.
+  endpoint& operator=(const endpoint& other) ASIO_NOEXCEPT
+  {
+    data_ = other.data_;
+    return *this;
+  }
+
+  // Get the underlying endpoint in the native type.
+  asio::detail::socket_addr_type* data() ASIO_NOEXCEPT
+  {
+    return &data_.base;
+  }
+
+  // Get the underlying endpoint in the native type.
+  const asio::detail::socket_addr_type* data() const ASIO_NOEXCEPT
+  {
+    return &data_.base;
+  }
+
+  // Get the underlying size of the endpoint in the native type.
+  std::size_t size() const ASIO_NOEXCEPT
+  {
+    if (is_v4())
+      return sizeof(asio::detail::sockaddr_in4_type);
+    else
+      return sizeof(asio::detail::sockaddr_in6_type);
+  }
+
+  // Set the underlying size of the endpoint in the native type.
+  ASIO_DECL void resize(std::size_t new_size);
+
+  // Get the capacity of the endpoint in the native type.
+  std::size_t capacity() const ASIO_NOEXCEPT
+  {
+    return sizeof(data_);
+  }
+
+  // Get the port associated with the endpoint.
+  ASIO_DECL unsigned short port() const ASIO_NOEXCEPT;
+
+  // Set the port associated with the endpoint.
+  ASIO_DECL void port(unsigned short port_num) ASIO_NOEXCEPT;
+
+  // Get the IP address associated with the endpoint.
+  ASIO_DECL asio::ip::address address() const ASIO_NOEXCEPT;
+
+  // Set the IP address associated with the endpoint.
+  ASIO_DECL void address(
+      const asio::ip::address& addr) ASIO_NOEXCEPT;
+
+  // Compare two endpoints for equality.
+  ASIO_DECL friend bool operator==(const endpoint& e1,
+      const endpoint& e2) ASIO_NOEXCEPT;
+
+  // Compare endpoints for ordering.
+  ASIO_DECL friend bool operator<(const endpoint& e1,
+      const endpoint& e2) ASIO_NOEXCEPT;
+
+  // Determine whether the endpoint is IPv4.
+  bool is_v4() const ASIO_NOEXCEPT
+  {
+    return data_.base.sa_family == ASIO_OS_DEF(AF_INET);
+  }
+
+#if !defined(ASIO_NO_IOSTREAM)
+  // Convert to a string.
+  ASIO_DECL std::string to_string() const;
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+private:
+  // The underlying IP socket address.
+  union data_union
+  {
+    asio::detail::socket_addr_type base;
+    asio::detail::sockaddr_in4_type v4;
+    asio::detail::sockaddr_in6_type v6;
+  } data_;
+};
+
+} // namespace detail
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ip/detail/impl/endpoint.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_IP_DETAIL_ENDPOINT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/detail/socket_option.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/detail/socket_option.hpp
new file mode 100644
index 00000000000..e4599660790
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/detail/socket_option.hpp
@@ -0,0 +1,566 @@
+//
+// detail/socket_option.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_DETAIL_SOCKET_OPTION_HPP
+#define ASIO_IP_DETAIL_SOCKET_OPTION_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include <cstring>
+#include <stdexcept>
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/throw_exception.hpp"
+#include "asio/ip/address.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+namespace detail {
+namespace socket_option {
+
+// Helper template for implementing multicast enable loopback options.
+template <int IPv4_Level, int IPv4_Name, int IPv6_Level, int IPv6_Name>
+class multicast_enable_loopback
+{
+public:
+#if defined(__sun) || defined(__osf__)
+  typedef unsigned char ipv4_value_type;
+  typedef unsigned char ipv6_value_type;
+#elif defined(_AIX) || defined(__hpux) || defined(__QNXNTO__) 
+  typedef unsigned char ipv4_value_type;
+  typedef unsigned int ipv6_value_type;
+#else
+  typedef int ipv4_value_type;
+  typedef int ipv6_value_type;
+#endif
+
+  // Default constructor.
+  multicast_enable_loopback()
+    : ipv4_value_(0),
+      ipv6_value_(0)
+  {
+  }
+
+  // Construct with a specific option value.
+  explicit multicast_enable_loopback(bool v)
+    : ipv4_value_(v ? 1 : 0),
+      ipv6_value_(v ? 1 : 0)
+  {
+  }
+
+  // Set the value of the boolean.
+  multicast_enable_loopback& operator=(bool v)
+  {
+    ipv4_value_ = v ? 1 : 0;
+    ipv6_value_ = v ? 1 : 0;
+    return *this;
+  }
+
+  // Get the current value of the boolean.
+  bool value() const
+  {
+    return !!ipv4_value_;
+  }
+
+  // Convert to bool.
+  operator bool() const
+  {
+    return !!ipv4_value_;
+  }
+
+  // Test for false.
+  bool operator!() const
+  {
+    return !ipv4_value_;
+  }
+
+  // Get the level of the socket option.
+  template <typename Protocol>
+  int level(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return IPv6_Level;
+    return IPv4_Level;
+  }
+
+  // Get the name of the socket option.
+  template <typename Protocol>
+  int name(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return IPv6_Name;
+    return IPv4_Name;
+  }
+
+  // Get the address of the boolean data.
+  template <typename Protocol>
+  void* data(const Protocol& protocol)
+  {
+    if (protocol.family() == PF_INET6)
+      return &ipv6_value_;
+    return &ipv4_value_;
+  }
+
+  // Get the address of the boolean data.
+  template <typename Protocol>
+  const void* data(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return &ipv6_value_;
+    return &ipv4_value_;
+  }
+
+  // Get the size of the boolean data.
+  template <typename Protocol>
+  std::size_t size(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return sizeof(ipv6_value_);
+    return sizeof(ipv4_value_);
+  }
+
+  // Set the size of the boolean data.
+  template <typename Protocol>
+  void resize(const Protocol& protocol, std::size_t s)
+  {
+    if (protocol.family() == PF_INET6)
+    {
+      if (s != sizeof(ipv6_value_))
+      {
+        std::length_error ex("multicast_enable_loopback socket option resize");
+        asio::detail::throw_exception(ex);
+      }
+      ipv4_value_ = ipv6_value_ ? 1 : 0;
+    }
+    else
+    {
+      if (s != sizeof(ipv4_value_))
+      {
+        std::length_error ex("multicast_enable_loopback socket option resize");
+        asio::detail::throw_exception(ex);
+      }
+      ipv6_value_ = ipv4_value_ ? 1 : 0;
+    }
+  }
+
+private:
+  ipv4_value_type ipv4_value_;
+  ipv6_value_type ipv6_value_;
+};
+
+// Helper template for implementing unicast hops options.
+template <int IPv4_Level, int IPv4_Name, int IPv6_Level, int IPv6_Name>
+class unicast_hops
+{
+public:
+  // Default constructor.
+  unicast_hops()
+    : value_(0)
+  {
+  }
+
+  // Construct with a specific option value.
+  explicit unicast_hops(int v)
+    : value_(v)
+  {
+  }
+
+  // Set the value of the option.
+  unicast_hops& operator=(int v)
+  {
+    value_ = v;
+    return *this;
+  }
+
+  // Get the current value of the option.
+  int value() const
+  {
+    return value_;
+  }
+
+  // Get the level of the socket option.
+  template <typename Protocol>
+  int level(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return IPv6_Level;
+    return IPv4_Level;
+  }
+
+  // Get the name of the socket option.
+  template <typename Protocol>
+  int name(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return IPv6_Name;
+    return IPv4_Name;
+  }
+
+  // Get the address of the data.
+  template <typename Protocol>
+  int* data(const Protocol&)
+  {
+    return &value_;
+  }
+
+  // Get the address of the data.
+  template <typename Protocol>
+  const int* data(const Protocol&) const
+  {
+    return &value_;
+  }
+
+  // Get the size of the data.
+  template <typename Protocol>
+  std::size_t size(const Protocol&) const
+  {
+    return sizeof(value_);
+  }
+
+  // Set the size of the data.
+  template <typename Protocol>
+  void resize(const Protocol&, std::size_t s)
+  {
+    if (s != sizeof(value_))
+    {
+      std::length_error ex("unicast hops socket option resize");
+      asio::detail::throw_exception(ex);
+    }
+#if defined(__hpux)
+    if (value_ < 0)
+      value_ = value_ & 0xFF;
+#endif
+  }
+
+private:
+  int value_;
+};
+
+// Helper template for implementing multicast hops options.
+template <int IPv4_Level, int IPv4_Name, int IPv6_Level, int IPv6_Name>
+class multicast_hops
+{
+public:
+#if defined(ASIO_WINDOWS) && defined(UNDER_CE)
+  typedef int ipv4_value_type;
+#else
+  typedef unsigned char ipv4_value_type;
+#endif
+  typedef int ipv6_value_type;
+
+  // Default constructor.
+  multicast_hops()
+    : ipv4_value_(0),
+      ipv6_value_(0)
+  {
+  }
+
+  // Construct with a specific option value.
+  explicit multicast_hops(int v)
+  {
+    if (v < 0 || v > 255)
+    {
+      std::out_of_range ex("multicast hops value out of range");
+      asio::detail::throw_exception(ex);
+    }
+    ipv4_value_ = (ipv4_value_type)v;
+    ipv6_value_ = v;
+  }
+
+  // Set the value of the option.
+  multicast_hops& operator=(int v)
+  {
+    if (v < 0 || v > 255)
+    {
+      std::out_of_range ex("multicast hops value out of range");
+      asio::detail::throw_exception(ex);
+    }
+    ipv4_value_ = (ipv4_value_type)v;
+    ipv6_value_ = v;
+    return *this;
+  }
+
+  // Get the current value of the option.
+  int value() const
+  {
+    return ipv6_value_;
+  }
+
+  // Get the level of the socket option.
+  template <typename Protocol>
+  int level(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return IPv6_Level;
+    return IPv4_Level;
+  }
+
+  // Get the name of the socket option.
+  template <typename Protocol>
+  int name(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return IPv6_Name;
+    return IPv4_Name;
+  }
+
+  // Get the address of the data.
+  template <typename Protocol>
+  void* data(const Protocol& protocol)
+  {
+    if (protocol.family() == PF_INET6)
+      return &ipv6_value_;
+    return &ipv4_value_;
+  }
+
+  // Get the address of the data.
+  template <typename Protocol>
+  const void* data(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return &ipv6_value_;
+    return &ipv4_value_;
+  }
+
+  // Get the size of the data.
+  template <typename Protocol>
+  std::size_t size(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return sizeof(ipv6_value_);
+    return sizeof(ipv4_value_);
+  }
+
+  // Set the size of the data.
+  template <typename Protocol>
+  void resize(const Protocol& protocol, std::size_t s)
+  {
+    if (protocol.family() == PF_INET6)
+    {
+      if (s != sizeof(ipv6_value_))
+      {
+        std::length_error ex("multicast hops socket option resize");
+        asio::detail::throw_exception(ex);
+      }
+      if (ipv6_value_ < 0)
+        ipv4_value_ = 0;
+      else if (ipv6_value_ > 255)
+        ipv4_value_ = 255;
+      else
+        ipv4_value_ = (ipv4_value_type)ipv6_value_;
+    }
+    else
+    {
+      if (s != sizeof(ipv4_value_))
+      {
+        std::length_error ex("multicast hops socket option resize");
+        asio::detail::throw_exception(ex);
+      }
+      ipv6_value_ = ipv4_value_;
+    }
+  }
+
+private:
+  ipv4_value_type ipv4_value_;
+  ipv6_value_type ipv6_value_;
+};
+
+// Helper template for implementing ip_mreq-based options.
+template <int IPv4_Level, int IPv4_Name, int IPv6_Level, int IPv6_Name>
+class multicast_request
+{
+public:
+  // Default constructor.
+  multicast_request()
+    : ipv4_value_(), // Zero-initialisation gives the "any" address.
+      ipv6_value_() // Zero-initialisation gives the "any" address.
+  {
+  }
+
+  // Construct with multicast address only.
+  explicit multicast_request(const address& multicast_address)
+    : ipv4_value_(), // Zero-initialisation gives the "any" address.
+      ipv6_value_() // Zero-initialisation gives the "any" address.
+  {
+    if (multicast_address.is_v6())
+    {
+      using namespace std; // For memcpy.
+      address_v6 ipv6_address = multicast_address.to_v6();
+      address_v6::bytes_type bytes = ipv6_address.to_bytes();
+      memcpy(ipv6_value_.ipv6mr_multiaddr.s6_addr, bytes.data(), 16);
+      ipv6_value_.ipv6mr_interface = ipv6_address.scope_id();
+    }
+    else
+    {
+      ipv4_value_.imr_multiaddr.s_addr =
+        asio::detail::socket_ops::host_to_network_long(
+            multicast_address.to_v4().to_uint());
+      ipv4_value_.imr_interface.s_addr =
+        asio::detail::socket_ops::host_to_network_long(
+            address_v4::any().to_uint());
+    }
+  }
+
+  // Construct with multicast address and IPv4 address specifying an interface.
+  explicit multicast_request(const address_v4& multicast_address,
+      const address_v4& network_interface = address_v4::any())
+    : ipv6_value_() // Zero-initialisation gives the "any" address.
+  {
+    ipv4_value_.imr_multiaddr.s_addr =
+      asio::detail::socket_ops::host_to_network_long(
+          multicast_address.to_uint());
+    ipv4_value_.imr_interface.s_addr =
+      asio::detail::socket_ops::host_to_network_long(
+          network_interface.to_uint());
+  }
+
+  // Construct with multicast address and IPv6 network interface index.
+  explicit multicast_request(
+      const address_v6& multicast_address,
+      unsigned long network_interface = 0)
+    : ipv4_value_() // Zero-initialisation gives the "any" address.
+  {
+    using namespace std; // For memcpy.
+    address_v6::bytes_type bytes = multicast_address.to_bytes();
+    memcpy(ipv6_value_.ipv6mr_multiaddr.s6_addr, bytes.data(), 16);
+    if (network_interface)
+      ipv6_value_.ipv6mr_interface = network_interface;
+    else
+      ipv6_value_.ipv6mr_interface = multicast_address.scope_id();
+  }
+
+  // Get the level of the socket option.
+  template <typename Protocol>
+  int level(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return IPv6_Level;
+    return IPv4_Level;
+  }
+
+  // Get the name of the socket option.
+  template <typename Protocol>
+  int name(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return IPv6_Name;
+    return IPv4_Name;
+  }
+
+  // Get the address of the option data.
+  template <typename Protocol>
+  const void* data(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return &ipv6_value_;
+    return &ipv4_value_;
+  }
+
+  // Get the size of the option data.
+  template <typename Protocol>
+  std::size_t size(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return sizeof(ipv6_value_);
+    return sizeof(ipv4_value_);
+  }
+
+private:
+  asio::detail::in4_mreq_type ipv4_value_;
+  asio::detail::in6_mreq_type ipv6_value_;
+};
+
+// Helper template for implementing options that specify a network interface.
+template <int IPv4_Level, int IPv4_Name, int IPv6_Level, int IPv6_Name>
+class network_interface
+{
+public:
+  // Default constructor.
+  network_interface()
+  {
+    ipv4_value_.s_addr =
+      asio::detail::socket_ops::host_to_network_long(
+          address_v4::any().to_uint());
+    ipv6_value_ = 0;
+  }
+
+  // Construct with IPv4 interface.
+  explicit network_interface(const address_v4& ipv4_interface)
+  {
+    ipv4_value_.s_addr =
+      asio::detail::socket_ops::host_to_network_long(
+          ipv4_interface.to_uint());
+    ipv6_value_ = 0;
+  }
+
+  // Construct with IPv6 interface.
+  explicit network_interface(unsigned int ipv6_interface)
+  {
+    ipv4_value_.s_addr =
+      asio::detail::socket_ops::host_to_network_long(
+          address_v4::any().to_uint());
+    ipv6_value_ = ipv6_interface;
+  }
+
+  // Get the level of the socket option.
+  template <typename Protocol>
+  int level(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return IPv6_Level;
+    return IPv4_Level;
+  }
+
+  // Get the name of the socket option.
+  template <typename Protocol>
+  int name(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return IPv6_Name;
+    return IPv4_Name;
+  }
+
+  // Get the address of the option data.
+  template <typename Protocol>
+  const void* data(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return &ipv6_value_;
+    return &ipv4_value_;
+  }
+
+  // Get the size of the option data.
+  template <typename Protocol>
+  std::size_t size(const Protocol& protocol) const
+  {
+    if (protocol.family() == PF_INET6)
+      return sizeof(ipv6_value_);
+    return sizeof(ipv4_value_);
+  }
+
+private:
+  asio::detail::in4_addr_type ipv4_value_;
+  unsigned int ipv6_value_;
+};
+
+} // namespace socket_option
+} // namespace detail
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_DETAIL_SOCKET_OPTION_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/host_name.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/host_name.hpp
new file mode 100644
index 00000000000..2a660a930d4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/host_name.hpp
@@ -0,0 +1,42 @@
+//
+// ip/host_name.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_HOST_NAME_HPP
+#define ASIO_IP_HOST_NAME_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <string>
+#include "asio/error_code.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// Get the current host name.
+ASIO_DECL std::string host_name();
+
+/// Get the current host name.
+ASIO_DECL std::string host_name(asio::error_code& ec);
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ip/impl/host_name.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_IP_HOST_NAME_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/icmp.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/icmp.hpp
new file mode 100644
index 00000000000..fe05141270f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/icmp.hpp
@@ -0,0 +1,115 @@
+//
+// ip/icmp.hpp
+// ~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_ICMP_HPP
+#define ASIO_IP_ICMP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/basic_raw_socket.hpp"
+#include "asio/ip/basic_endpoint.hpp"
+#include "asio/ip/basic_resolver.hpp"
+#include "asio/ip/basic_resolver_iterator.hpp"
+#include "asio/ip/basic_resolver_query.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// Encapsulates the flags needed for ICMP.
+/**
+ * The asio::ip::icmp class contains flags necessary for ICMP sockets.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Safe.
+ *
+ * @par Concepts:
+ * Protocol, InternetProtocol.
+ */
+class icmp
+{
+public:
+  /// The type of a ICMP endpoint.
+  typedef basic_endpoint<icmp> endpoint;
+
+  /// Construct to represent the IPv4 ICMP protocol.
+  static icmp v4() ASIO_NOEXCEPT
+  {
+    return icmp(ASIO_OS_DEF(IPPROTO_ICMP),
+        ASIO_OS_DEF(AF_INET));
+  }
+
+  /// Construct to represent the IPv6 ICMP protocol.
+  static icmp v6() ASIO_NOEXCEPT
+  {
+    return icmp(ASIO_OS_DEF(IPPROTO_ICMPV6),
+        ASIO_OS_DEF(AF_INET6));
+  }
+
+  /// Obtain an identifier for the type of the protocol.
+  int type() const ASIO_NOEXCEPT
+  {
+    return ASIO_OS_DEF(SOCK_RAW);
+  }
+
+  /// Obtain an identifier for the protocol.
+  int protocol() const ASIO_NOEXCEPT
+  {
+    return protocol_;
+  }
+
+  /// Obtain an identifier for the protocol family.
+  int family() const ASIO_NOEXCEPT
+  {
+    return family_;
+  }
+
+  /// The ICMP socket type.
+  typedef basic_raw_socket<icmp> socket;
+
+  /// The ICMP resolver type.
+  typedef basic_resolver<icmp> resolver;
+
+  /// Compare two protocols for equality.
+  friend bool operator==(const icmp& p1, const icmp& p2)
+  {
+    return p1.protocol_ == p2.protocol_ && p1.family_ == p2.family_;
+  }
+
+  /// Compare two protocols for inequality.
+  friend bool operator!=(const icmp& p1, const icmp& p2)
+  {
+    return p1.protocol_ != p2.protocol_ || p1.family_ != p2.family_;
+  }
+
+private:
+  // Construct with a specific family.
+  explicit icmp(int protocol_id, int protocol_family) ASIO_NOEXCEPT
+    : protocol_(protocol_id),
+      family_(protocol_family)
+  {
+  }
+
+  int protocol_;
+  int family_;
+};
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_ICMP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/address.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/address.hpp
new file mode 100644
index 00000000000..8944c507be2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/address.hpp
@@ -0,0 +1,67 @@
+//
+// ip/impl/address.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_IMPL_ADDRESS_HPP
+#define ASIO_IP_IMPL_ADDRESS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/detail/throw_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+#if !defined(ASIO_NO_DEPRECATED)
+
+inline address address::from_string(const char* str)
+{
+  return asio::ip::make_address(str);
+}
+
+inline address address::from_string(
+    const char* str, asio::error_code& ec)
+{
+  return asio::ip::make_address(str, ec);
+}
+
+inline address address::from_string(const std::string& str)
+{
+  return asio::ip::make_address(str);
+}
+
+inline address address::from_string(
+    const std::string& str, asio::error_code& ec)
+{
+  return asio::ip::make_address(str, ec);
+}
+
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+template <typename Elem, typename Traits>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os, const address& addr)
+{
+  return os << addr.to_string().c_str();
+}
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // ASIO_IP_IMPL_ADDRESS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/address_v4.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/address_v4.hpp
new file mode 100644
index 00000000000..f8139b87b00
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/address_v4.hpp
@@ -0,0 +1,67 @@
+//
+// ip/impl/address_v4.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_IMPL_ADDRESS_V4_HPP
+#define ASIO_IP_IMPL_ADDRESS_V4_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/detail/throw_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+#if !defined(ASIO_NO_DEPRECATED)
+
+inline address_v4 address_v4::from_string(const char* str)
+{
+  return asio::ip::make_address_v4(str);
+}
+
+inline address_v4 address_v4::from_string(
+    const char* str, asio::error_code& ec)
+{
+  return asio::ip::make_address_v4(str, ec);
+}
+
+inline address_v4 address_v4::from_string(const std::string& str)
+{
+  return asio::ip::make_address_v4(str);
+}
+
+inline address_v4 address_v4::from_string(
+    const std::string& str, asio::error_code& ec)
+{
+  return asio::ip::make_address_v4(str, ec);
+}
+
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+template <typename Elem, typename Traits>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os, const address_v4& addr)
+{
+  return os << addr.to_string().c_str();
+}
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // ASIO_IP_IMPL_ADDRESS_V4_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/address_v6.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/address_v6.hpp
new file mode 100644
index 00000000000..985203d2cea
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/address_v6.hpp
@@ -0,0 +1,67 @@
+//
+// ip/impl/address_v6.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_IMPL_ADDRESS_V6_HPP
+#define ASIO_IP_IMPL_ADDRESS_V6_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/detail/throw_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+#if !defined(ASIO_NO_DEPRECATED)
+
+inline address_v6 address_v6::from_string(const char* str)
+{
+  return asio::ip::make_address_v6(str);
+}
+
+inline address_v6 address_v6::from_string(
+    const char* str, asio::error_code& ec)
+{
+  return asio::ip::make_address_v6(str, ec);
+}
+
+inline address_v6 address_v6::from_string(const std::string& str)
+{
+  return asio::ip::make_address_v6(str);
+}
+
+inline address_v6 address_v6::from_string(
+    const std::string& str, asio::error_code& ec)
+{
+  return asio::ip::make_address_v6(str, ec);
+}
+
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+template <typename Elem, typename Traits>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os, const address_v6& addr)
+{
+  return os << addr.to_string().c_str();
+}
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // ASIO_IP_IMPL_ADDRESS_V6_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/basic_endpoint.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/basic_endpoint.hpp
new file mode 100644
index 00000000000..f589e511e2d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/basic_endpoint.hpp
@@ -0,0 +1,43 @@
+//
+// ip/impl/basic_endpoint.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_IMPL_BASIC_ENDPOINT_HPP
+#define ASIO_IP_IMPL_BASIC_ENDPOINT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/detail/throw_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+template <typename Elem, typename Traits, typename InternetProtocol>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os,
+    const basic_endpoint<InternetProtocol>& endpoint)
+{
+  asio::ip::detail::endpoint tmp_ep(endpoint.address(), endpoint.port());
+  return os << tmp_ep.to_string().c_str();
+}
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // ASIO_IP_IMPL_BASIC_ENDPOINT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/network_v4.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/network_v4.hpp
new file mode 100644
index 00000000000..8912fa0d7c8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/network_v4.hpp
@@ -0,0 +1,54 @@
+//
+// ip/impl/network_v4.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2014 Oliver Kowalke (oliver dot kowalke at gmail dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_IMPL_NETWORK_V4_HPP
+#define ASIO_IP_IMPL_NETWORK_V4_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/detail/throw_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+template <typename Elem, typename Traits>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os, const network_v4& addr)
+{
+  asio::error_code ec;
+  std::string s = addr.to_string(ec);
+  if (ec)
+  {
+    if (os.exceptions() & std::basic_ostream<Elem, Traits>::failbit)
+      asio::detail::throw_error(ec);
+    else
+      os.setstate(std::basic_ostream<Elem, Traits>::failbit);
+  }
+  else
+    for (std::string::iterator i = s.begin(); i != s.end(); ++i)
+      os << os.widen(*i);
+  return os;
+}
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // ASIO_IP_IMPL_NETWORK_V4_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/network_v6.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/network_v6.hpp
new file mode 100644
index 00000000000..381b838d0f1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/impl/network_v6.hpp
@@ -0,0 +1,53 @@
+//
+// ip/impl/network_v6.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_IMPL_NETWORK_V6_HPP
+#define ASIO_IP_IMPL_NETWORK_V6_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/detail/throw_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+template <typename Elem, typename Traits>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os, const network_v6& addr)
+{
+  asio::error_code ec;
+  std::string s = addr.to_string(ec);
+  if (ec)
+  {
+    if (os.exceptions() & std::basic_ostream<Elem, Traits>::failbit)
+      asio::detail::throw_error(ec);
+    else
+      os.setstate(std::basic_ostream<Elem, Traits>::failbit);
+  }
+  else
+    for (std::string::iterator i = s.begin(); i != s.end(); ++i)
+      os << os.widen(*i);
+  return os;
+}
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // ASIO_IP_IMPL_NETWORK_V6_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/multicast.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/multicast.hpp
new file mode 100644
index 00000000000..0f711fb1021
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/multicast.hpp
@@ -0,0 +1,191 @@
+//
+// ip/multicast.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_MULTICAST_HPP
+#define ASIO_IP_MULTICAST_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/ip/detail/socket_option.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+namespace multicast {
+
+/// Socket option to join a multicast group on a specified interface.
+/**
+ * Implements the IPPROTO_IP/IP_ADD_MEMBERSHIP socket option.
+ *
+ * @par Examples
+ * Setting the option to join a multicast group:
+ * @code
+ * asio::ip::udp::socket socket(my_context);
+ * ...
+ * asio::ip::address multicast_address =
+ *   asio::ip::address::from_string("225.0.0.1");
+ * asio::ip::multicast::join_group option(multicast_address);
+ * socket.set_option(option);
+ * @endcode
+ *
+ * @par Concepts:
+ * SettableSocketOption.
+ */
+#if defined(GENERATING_DOCUMENTATION)
+typedef implementation_defined join_group;
+#else
+typedef asio::ip::detail::socket_option::multicast_request<
+  ASIO_OS_DEF(IPPROTO_IP),
+  ASIO_OS_DEF(IP_ADD_MEMBERSHIP),
+  ASIO_OS_DEF(IPPROTO_IPV6),
+  ASIO_OS_DEF(IPV6_JOIN_GROUP)> join_group;
+#endif
+
+/// Socket option to leave a multicast group on a specified interface.
+/**
+ * Implements the IPPROTO_IP/IP_DROP_MEMBERSHIP socket option.
+ *
+ * @par Examples
+ * Setting the option to leave a multicast group:
+ * @code
+ * asio::ip::udp::socket socket(my_context);
+ * ...
+ * asio::ip::address multicast_address =
+ *   asio::ip::address::from_string("225.0.0.1");
+ * asio::ip::multicast::leave_group option(multicast_address);
+ * socket.set_option(option);
+ * @endcode
+ *
+ * @par Concepts:
+ * SettableSocketOption.
+ */
+#if defined(GENERATING_DOCUMENTATION)
+typedef implementation_defined leave_group;
+#else
+typedef asio::ip::detail::socket_option::multicast_request<
+  ASIO_OS_DEF(IPPROTO_IP),
+  ASIO_OS_DEF(IP_DROP_MEMBERSHIP),
+  ASIO_OS_DEF(IPPROTO_IPV6),
+  ASIO_OS_DEF(IPV6_LEAVE_GROUP)> leave_group;
+#endif
+
+/// Socket option for local interface to use for outgoing multicast packets.
+/**
+ * Implements the IPPROTO_IP/IP_MULTICAST_IF socket option.
+ *
+ * @par Examples
+ * Setting the option:
+ * @code
+ * asio::ip::udp::socket socket(my_context);
+ * ...
+ * asio::ip::address_v4 local_interface =
+ *   asio::ip::address_v4::from_string("1.2.3.4");
+ * asio::ip::multicast::outbound_interface option(local_interface);
+ * socket.set_option(option);
+ * @endcode
+ *
+ * @par Concepts:
+ * SettableSocketOption.
+ */
+#if defined(GENERATING_DOCUMENTATION)
+typedef implementation_defined outbound_interface;
+#else
+typedef asio::ip::detail::socket_option::network_interface<
+  ASIO_OS_DEF(IPPROTO_IP),
+  ASIO_OS_DEF(IP_MULTICAST_IF),
+  ASIO_OS_DEF(IPPROTO_IPV6),
+  ASIO_OS_DEF(IPV6_MULTICAST_IF)> outbound_interface;
+#endif
+
+/// Socket option for time-to-live associated with outgoing multicast packets.
+/**
+ * Implements the IPPROTO_IP/IP_MULTICAST_TTL socket option.
+ *
+ * @par Examples
+ * Setting the option:
+ * @code
+ * asio::ip::udp::socket socket(my_context);
+ * ...
+ * asio::ip::multicast::hops option(4);
+ * socket.set_option(option);
+ * @endcode
+ *
+ * @par
+ * Getting the current option value:
+ * @code
+ * asio::ip::udp::socket socket(my_context);
+ * ...
+ * asio::ip::multicast::hops option;
+ * socket.get_option(option);
+ * int ttl = option.value();
+ * @endcode
+ *
+ * @par Concepts:
+ * GettableSocketOption, SettableSocketOption.
+ */
+#if defined(GENERATING_DOCUMENTATION)
+typedef implementation_defined hops;
+#else
+typedef asio::ip::detail::socket_option::multicast_hops<
+  ASIO_OS_DEF(IPPROTO_IP),
+  ASIO_OS_DEF(IP_MULTICAST_TTL),
+  ASIO_OS_DEF(IPPROTO_IPV6),
+  ASIO_OS_DEF(IPV6_MULTICAST_HOPS)> hops;
+#endif
+
+/// Socket option determining whether outgoing multicast packets will be
+/// received on the same socket if it is a member of the multicast group.
+/**
+ * Implements the IPPROTO_IP/IP_MULTICAST_LOOP socket option.
+ *
+ * @par Examples
+ * Setting the option:
+ * @code
+ * asio::ip::udp::socket socket(my_context);
+ * ...
+ * asio::ip::multicast::enable_loopback option(true);
+ * socket.set_option(option);
+ * @endcode
+ *
+ * @par
+ * Getting the current option value:
+ * @code
+ * asio::ip::udp::socket socket(my_context);
+ * ...
+ * asio::ip::multicast::enable_loopback option;
+ * socket.get_option(option);
+ * bool is_set = option.value();
+ * @endcode
+ *
+ * @par Concepts:
+ * GettableSocketOption, SettableSocketOption.
+ */
+#if defined(GENERATING_DOCUMENTATION)
+typedef implementation_defined enable_loopback;
+#else
+typedef asio::ip::detail::socket_option::multicast_enable_loopback<
+  ASIO_OS_DEF(IPPROTO_IP),
+  ASIO_OS_DEF(IP_MULTICAST_LOOP),
+  ASIO_OS_DEF(IPPROTO_IPV6),
+  ASIO_OS_DEF(IPV6_MULTICAST_LOOP)> enable_loopback;
+#endif
+
+} // namespace multicast
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_MULTICAST_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/network_v4.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/network_v4.hpp
new file mode 100644
index 00000000000..1239b9f70c7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/network_v4.hpp
@@ -0,0 +1,261 @@
+//
+// ip/network_v4.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2014 Oliver Kowalke (oliver dot kowalke at gmail dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_NETWORK_V4_HPP
+#define ASIO_IP_NETWORK_V4_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <string>
+#include "asio/detail/string_view.hpp"
+#include "asio/error_code.hpp"
+#include "asio/ip/address_v4_range.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// Represents an IPv4 network.
+/**
+ * The asio::ip::network_v4 class provides the ability to use and
+ * manipulate IP version 4 networks.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+class network_v4
+{
+public:
+  /// Default constructor.
+  network_v4() ASIO_NOEXCEPT
+    : address_(),
+      prefix_length_(0)
+  {
+  }
+
+  /// Construct a network based on the specified address and prefix length.
+  ASIO_DECL network_v4(const address_v4& addr,
+      unsigned short prefix_len);
+
+  /// Construct network based on the specified address and netmask.
+  ASIO_DECL network_v4(const address_v4& addr,
+      const address_v4& mask);
+
+  /// Copy constructor.
+  network_v4(const network_v4& other) ASIO_NOEXCEPT
+    : address_(other.address_),
+      prefix_length_(other.prefix_length_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move constructor.
+  network_v4(network_v4&& other) ASIO_NOEXCEPT
+    : address_(ASIO_MOVE_CAST(address_v4)(other.address_)),
+      prefix_length_(other.prefix_length_)
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assign from another network.
+  network_v4& operator=(const network_v4& other) ASIO_NOEXCEPT
+  {
+    address_ = other.address_;
+    prefix_length_ = other.prefix_length_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move-assign from another network.
+  network_v4& operator=(network_v4&& other) ASIO_NOEXCEPT
+  {
+    address_ = ASIO_MOVE_CAST(address_v4)(other.address_);
+    prefix_length_ = other.prefix_length_;
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Obtain the address object specified when the network object was created.
+  address_v4 address() const ASIO_NOEXCEPT
+  {
+    return address_;
+  }
+
+  /// Obtain the prefix length that was specified when the network object was
+  /// created.
+  unsigned short prefix_length() const ASIO_NOEXCEPT
+  {
+    return prefix_length_;
+  }
+
+  /// Obtain the netmask that was specified when the network object was created.
+  ASIO_DECL address_v4 netmask() const ASIO_NOEXCEPT;
+
+  /// Obtain an address object that represents the network address.
+  address_v4 network() const ASIO_NOEXCEPT
+  {
+    return address_v4(address_.to_uint() & netmask().to_uint());
+  }
+
+  /// Obtain an address object that represents the network's broadcast address.
+  address_v4 broadcast() const ASIO_NOEXCEPT
+  {
+    return address_v4(network().to_uint() | (netmask().to_uint() ^ 0xFFFFFFFF));
+  }
+
+  /// Obtain an address range corresponding to the hosts in the network.
+  ASIO_DECL address_v4_range hosts() const ASIO_NOEXCEPT;
+
+  /// Obtain the true network address, omitting any host bits.
+  network_v4 canonical() const ASIO_NOEXCEPT
+  {
+    return network_v4(network(), netmask());
+  }
+
+  /// Test if network is a valid host address.
+  bool is_host() const ASIO_NOEXCEPT
+  {
+    return prefix_length_ == 32;
+  }
+
+  /// Test if a network is a real subnet of another network.
+  ASIO_DECL bool is_subnet_of(const network_v4& other) const;
+
+  /// Get the network as an address in dotted decimal format.
+  ASIO_DECL std::string to_string() const;
+
+  /// Get the network as an address in dotted decimal format.
+  ASIO_DECL std::string to_string(asio::error_code& ec) const;
+
+  /// Compare two networks for equality.
+  friend bool operator==(const network_v4& a, const network_v4& b)
+  {
+    return a.address_ == b.address_ && a.prefix_length_ == b.prefix_length_;
+  }
+
+  /// Compare two networks for inequality.
+  friend bool operator!=(const network_v4& a, const network_v4& b)
+  {
+    return !(a == b);
+  }
+
+private:
+  address_v4 address_;
+  unsigned short prefix_length_;
+};
+
+/// Create an IPv4 network from an address and prefix length.
+/**
+ * @relates address_v4
+ */
+inline network_v4 make_network_v4(
+    const address_v4& addr, unsigned short prefix_len)
+{
+  return network_v4(addr, prefix_len);
+}
+
+/// Create an IPv4 network from an address and netmask.
+/**
+ * @relates address_v4
+ */
+inline network_v4 make_network_v4(
+    const address_v4& addr, const address_v4& mask)
+{
+  return network_v4(addr, mask);
+}
+
+/// Create an IPv4 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v4
+ */
+ASIO_DECL network_v4 make_network_v4(const char* str);
+
+/// Create an IPv4 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v4
+ */
+ASIO_DECL network_v4 make_network_v4(
+    const char* str, asio::error_code& ec);
+
+/// Create an IPv4 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v4
+ */
+ASIO_DECL network_v4 make_network_v4(const std::string& str);
+
+/// Create an IPv4 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v4
+ */
+ASIO_DECL network_v4 make_network_v4(
+    const std::string& str, asio::error_code& ec);
+
+#if defined(ASIO_HAS_STRING_VIEW) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Create an IPv4 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v4
+ */
+ASIO_DECL network_v4 make_network_v4(string_view str);
+
+/// Create an IPv4 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v4
+ */
+ASIO_DECL network_v4 make_network_v4(
+    string_view str, asio::error_code& ec);
+
+#endif // defined(ASIO_HAS_STRING_VIEW)
+       //  || defined(GENERATING_DOCUMENTATION)
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Output a network as a string.
+/**
+ * Used to output a human-readable string for a specified network.
+ *
+ * @param os The output stream to which the string will be written.
+ *
+ * @param net The network to be written.
+ *
+ * @return The output stream.
+ *
+ * @relates asio::ip::address_v4
+ */
+template <typename Elem, typename Traits>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os, const network_v4& net);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/ip/impl/network_v4.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ip/impl/network_v4.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_IP_NETWORK_V4_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/network_v6.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/network_v6.hpp
new file mode 100644
index 00000000000..ad5604a5e52
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/network_v6.hpp
@@ -0,0 +1,235 @@
+//
+// ip/network_v6.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2014 Oliver Kowalke (oliver dot kowalke at gmail dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_NETWORK_V6_HPP
+#define ASIO_IP_NETWORK_V6_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <string>
+#include "asio/detail/string_view.hpp"
+#include "asio/error_code.hpp"
+#include "asio/ip/address_v6_range.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// Represents an IPv6 network.
+/**
+ * The asio::ip::network_v6 class provides the ability to use and
+ * manipulate IP version 6 networks.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+class network_v6
+{
+public:
+  /// Default constructor.
+  network_v6() ASIO_NOEXCEPT
+    : address_(),
+      prefix_length_(0)
+  {
+  }
+
+  /// Construct a network based on the specified address and prefix length.
+  ASIO_DECL network_v6(const address_v6& addr,
+      unsigned short prefix_len);
+
+  /// Copy constructor.
+  network_v6(const network_v6& other) ASIO_NOEXCEPT
+    : address_(other.address_),
+      prefix_length_(other.prefix_length_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move constructor.
+  network_v6(network_v6&& other) ASIO_NOEXCEPT
+    : address_(ASIO_MOVE_CAST(address_v6)(other.address_)),
+      prefix_length_(other.prefix_length_)
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assign from another network.
+  network_v6& operator=(const network_v6& other) ASIO_NOEXCEPT
+  {
+    address_ = other.address_;
+    prefix_length_ = other.prefix_length_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move-assign from another network.
+  network_v6& operator=(network_v6&& other) ASIO_NOEXCEPT
+  {
+    address_ = ASIO_MOVE_CAST(address_v6)(other.address_);
+    prefix_length_ = other.prefix_length_;
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Obtain the address object specified when the network object was created.
+  address_v6 address() const ASIO_NOEXCEPT
+  {
+    return address_;
+  }
+
+  /// Obtain the prefix length that was specified when the network object was
+  /// created.
+  unsigned short prefix_length() const ASIO_NOEXCEPT
+  {
+    return prefix_length_;
+  }
+
+  /// Obtain an address object that represents the network address.
+  ASIO_DECL address_v6 network() const ASIO_NOEXCEPT;
+
+  /// Obtain an address range corresponding to the hosts in the network.
+  ASIO_DECL address_v6_range hosts() const ASIO_NOEXCEPT;
+
+  /// Obtain the true network address, omitting any host bits.
+  network_v6 canonical() const ASIO_NOEXCEPT
+  {
+    return network_v6(network(), prefix_length());
+  }
+
+  /// Test if network is a valid host address.
+  bool is_host() const ASIO_NOEXCEPT
+  {
+    return prefix_length_ == 128;
+  }
+
+  /// Test if a network is a real subnet of another network.
+  ASIO_DECL bool is_subnet_of(const network_v6& other) const;
+
+  /// Get the network as an address in dotted decimal format.
+  ASIO_DECL std::string to_string() const;
+
+  /// Get the network as an address in dotted decimal format.
+  ASIO_DECL std::string to_string(asio::error_code& ec) const;
+
+  /// Compare two networks for equality.
+  friend bool operator==(const network_v6& a, const network_v6& b)
+  {
+    return a.address_ == b.address_ && a.prefix_length_ == b.prefix_length_;
+  }
+
+  /// Compare two networks for inequality.
+  friend bool operator!=(const network_v6& a, const network_v6& b)
+  {
+    return !(a == b);
+  }
+
+private:
+  address_v6 address_;
+  unsigned short prefix_length_;
+};
+
+/// Create an IPv6 network from an address and prefix length.
+/**
+ * @relates address_v6
+ */
+inline network_v6 make_network_v6(
+    const address_v6& addr, unsigned short prefix_len)
+{
+  return network_v6(addr, prefix_len);
+}
+
+/// Create an IPv6 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v6
+ */
+ASIO_DECL network_v6 make_network_v6(const char* str);
+
+/// Create an IPv6 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v6
+ */
+ASIO_DECL network_v6 make_network_v6(
+    const char* str, asio::error_code& ec);
+
+/// Create an IPv6 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v6
+ */
+ASIO_DECL network_v6 make_network_v6(const std::string& str);
+
+/// Create an IPv6 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v6
+ */
+ASIO_DECL network_v6 make_network_v6(
+    const std::string& str, asio::error_code& ec);
+
+#if defined(ASIO_HAS_STRING_VIEW) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Create an IPv6 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v6
+ */
+ASIO_DECL network_v6 make_network_v6(string_view str);
+
+/// Create an IPv6 network from a string containing IP address and prefix
+/// length.
+/**
+ * @relates network_v6
+ */
+ASIO_DECL network_v6 make_network_v6(
+    string_view str, asio::error_code& ec);
+
+#endif // defined(ASIO_HAS_STRING_VIEW)
+       //  || defined(GENERATING_DOCUMENTATION)
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Output a network as a string.
+/**
+ * Used to output a human-readable string for a specified network.
+ *
+ * @param os The output stream to which the string will be written.
+ *
+ * @param net The network to be written.
+ *
+ * @return The output stream.
+ *
+ * @relates asio::ip::address_v6
+ */
+template <typename Elem, typename Traits>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os, const network_v6& net);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/ip/impl/network_v6.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ip/impl/network_v6.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_IP_NETWORK_V6_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/resolver_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/resolver_base.hpp
new file mode 100644
index 00000000000..6edd7624af1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/resolver_base.hpp
@@ -0,0 +1,129 @@
+//
+// ip/resolver_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_RESOLVER_BASE_HPP
+#define ASIO_IP_RESOLVER_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// The resolver_base class is used as a base for the basic_resolver class
+/// templates to provide a common place to define the flag constants.
+class resolver_base
+{
+public:
+#if defined(GENERATING_DOCUMENTATION)
+  /// A bitmask type (C++ Std [lib.bitmask.types]).
+  typedef unspecified flags;
+
+  /// Determine the canonical name of the host specified in the query.
+  static const flags canonical_name = implementation_defined;
+
+  /// Indicate that returned endpoint is intended for use as a locally bound
+  /// socket endpoint.
+  static const flags passive = implementation_defined;
+
+  /// Host name should be treated as a numeric string defining an IPv4 or IPv6
+  /// address and no name resolution should be attempted.
+  static const flags numeric_host = implementation_defined;
+
+  /// Service name should be treated as a numeric string defining a port number
+  /// and no name resolution should be attempted.
+  static const flags numeric_service = implementation_defined;
+
+  /// If the query protocol family is specified as IPv6, return IPv4-mapped
+  /// IPv6 addresses on finding no IPv6 addresses.
+  static const flags v4_mapped = implementation_defined;
+
+  /// If used with v4_mapped, return all matching IPv6 and IPv4 addresses.
+  static const flags all_matching = implementation_defined;
+
+  /// Only return IPv4 addresses if a non-loopback IPv4 address is configured
+  /// for the system. Only return IPv6 addresses if a non-loopback IPv6 address
+  /// is configured for the system.
+  static const flags address_configured = implementation_defined;
+#else
+  enum flags
+  {
+    canonical_name = ASIO_OS_DEF(AI_CANONNAME),
+    passive = ASIO_OS_DEF(AI_PASSIVE),
+    numeric_host = ASIO_OS_DEF(AI_NUMERICHOST),
+    numeric_service = ASIO_OS_DEF(AI_NUMERICSERV),
+    v4_mapped = ASIO_OS_DEF(AI_V4MAPPED),
+    all_matching = ASIO_OS_DEF(AI_ALL),
+    address_configured = ASIO_OS_DEF(AI_ADDRCONFIG)
+  };
+
+  // Implement bitmask operations as shown in C++ Std [lib.bitmask.types].
+
+  friend flags operator&(flags x, flags y)
+  {
+    return static_cast<flags>(
+        static_cast<unsigned int>(x) & static_cast<unsigned int>(y));
+  }
+
+  friend flags operator|(flags x, flags y)
+  {
+    return static_cast<flags>(
+        static_cast<unsigned int>(x) | static_cast<unsigned int>(y));
+  }
+
+  friend flags operator^(flags x, flags y)
+  {
+    return static_cast<flags>(
+        static_cast<unsigned int>(x) ^ static_cast<unsigned int>(y));
+  }
+
+  friend flags operator~(flags x)
+  {
+    return static_cast<flags>(~static_cast<unsigned int>(x));
+  }
+
+  friend flags& operator&=(flags& x, flags y)
+  {
+    x = x & y;
+    return x;
+  }
+
+  friend flags& operator|=(flags& x, flags y)
+  {
+    x = x | y;
+    return x;
+  }
+
+  friend flags& operator^=(flags& x, flags y)
+  {
+    x = x ^ y;
+    return x;
+  }
+#endif
+
+protected:
+  /// Protected destructor to prevent deletion through this type.
+  ~resolver_base()
+  {
+  }
+};
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_RESOLVER_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/resolver_query_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/resolver_query_base.hpp
new file mode 100644
index 00000000000..b60ce5aad14
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/resolver_query_base.hpp
@@ -0,0 +1,43 @@
+//
+// ip/resolver_query_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_RESOLVER_QUERY_BASE_HPP
+#define ASIO_IP_RESOLVER_QUERY_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/ip/resolver_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// The resolver_query_base class is used as a base for the
+/// basic_resolver_query class templates to provide a common place to define
+/// the flag constants.
+class resolver_query_base : public resolver_base
+{
+protected:
+  /// Protected destructor to prevent deletion through this type.
+  ~resolver_query_base()
+  {
+  }
+};
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_RESOLVER_QUERY_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/tcp.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/tcp.hpp
new file mode 100644
index 00000000000..9507ba63f73
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/tcp.hpp
@@ -0,0 +1,155 @@
+//
+// ip/tcp.hpp
+// ~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_TCP_HPP
+#define ASIO_IP_TCP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/basic_socket_acceptor.hpp"
+#include "asio/basic_socket_iostream.hpp"
+#include "asio/basic_stream_socket.hpp"
+#include "asio/detail/socket_option.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/ip/basic_endpoint.hpp"
+#include "asio/ip/basic_resolver.hpp"
+#include "asio/ip/basic_resolver_iterator.hpp"
+#include "asio/ip/basic_resolver_query.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// Encapsulates the flags needed for TCP.
+/**
+ * The asio::ip::tcp class contains flags necessary for TCP sockets.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Safe.
+ *
+ * @par Concepts:
+ * Protocol, InternetProtocol.
+ */
+class tcp
+{
+public:
+  /// The type of a TCP endpoint.
+  typedef basic_endpoint<tcp> endpoint;
+
+  /// Construct to represent the IPv4 TCP protocol.
+  static tcp v4() ASIO_NOEXCEPT
+  {
+    return tcp(ASIO_OS_DEF(AF_INET));
+  }
+
+  /// Construct to represent the IPv6 TCP protocol.
+  static tcp v6() ASIO_NOEXCEPT
+  {
+    return tcp(ASIO_OS_DEF(AF_INET6));
+  }
+
+  /// Obtain an identifier for the type of the protocol.
+  int type() const ASIO_NOEXCEPT
+  {
+    return ASIO_OS_DEF(SOCK_STREAM);
+  }
+
+  /// Obtain an identifier for the protocol.
+  int protocol() const ASIO_NOEXCEPT
+  {
+    return ASIO_OS_DEF(IPPROTO_TCP);
+  }
+
+  /// Obtain an identifier for the protocol family.
+  int family() const ASIO_NOEXCEPT
+  {
+    return family_;
+  }
+
+  /// The TCP socket type.
+  typedef basic_stream_socket<tcp> socket;
+
+  /// The TCP acceptor type.
+  typedef basic_socket_acceptor<tcp> acceptor;
+
+  /// The TCP resolver type.
+  typedef basic_resolver<tcp> resolver;
+
+#if !defined(ASIO_NO_IOSTREAM)
+  /// The TCP iostream type.
+  typedef basic_socket_iostream<tcp> iostream;
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+  /// Socket option for disabling the Nagle algorithm.
+  /**
+   * Implements the IPPROTO_TCP/TCP_NODELAY socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::ip::tcp::no_delay option(true);
+   * socket.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::ip::tcp::no_delay option;
+   * socket.get_option(option);
+   * bool is_set = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Boolean_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined no_delay;
+#else
+  typedef asio::detail::socket_option::boolean<
+    ASIO_OS_DEF(IPPROTO_TCP), ASIO_OS_DEF(TCP_NODELAY)> no_delay;
+#endif
+
+  /// Compare two protocols for equality.
+  friend bool operator==(const tcp& p1, const tcp& p2)
+  {
+    return p1.family_ == p2.family_;
+  }
+
+  /// Compare two protocols for inequality.
+  friend bool operator!=(const tcp& p1, const tcp& p2)
+  {
+    return p1.family_ != p2.family_;
+  }
+
+private:
+  // Construct with a specific family.
+  explicit tcp(int protocol_family) ASIO_NOEXCEPT
+    : family_(protocol_family)
+  {
+  }
+
+  int family_;
+};
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_TCP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/udp.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/udp.hpp
new file mode 100644
index 00000000000..379ee59cffb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/udp.hpp
@@ -0,0 +1,111 @@
+//
+// ip/udp.hpp
+// ~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_UDP_HPP
+#define ASIO_IP_UDP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/basic_datagram_socket.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/ip/basic_endpoint.hpp"
+#include "asio/ip/basic_resolver.hpp"
+#include "asio/ip/basic_resolver_iterator.hpp"
+#include "asio/ip/basic_resolver_query.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// Encapsulates the flags needed for UDP.
+/**
+ * The asio::ip::udp class contains flags necessary for UDP sockets.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Safe.
+ *
+ * @par Concepts:
+ * Protocol, InternetProtocol.
+ */
+class udp
+{
+public:
+  /// The type of a UDP endpoint.
+  typedef basic_endpoint<udp> endpoint;
+
+  /// Construct to represent the IPv4 UDP protocol.
+  static udp v4() ASIO_NOEXCEPT
+  {
+    return udp(ASIO_OS_DEF(AF_INET));
+  }
+
+  /// Construct to represent the IPv6 UDP protocol.
+  static udp v6() ASIO_NOEXCEPT
+  {
+    return udp(ASIO_OS_DEF(AF_INET6));
+  }
+
+  /// Obtain an identifier for the type of the protocol.
+  int type() const ASIO_NOEXCEPT
+  {
+    return ASIO_OS_DEF(SOCK_DGRAM);
+  }
+
+  /// Obtain an identifier for the protocol.
+  int protocol() const ASIO_NOEXCEPT
+  {
+    return ASIO_OS_DEF(IPPROTO_UDP);
+  }
+
+  /// Obtain an identifier for the protocol family.
+  int family() const ASIO_NOEXCEPT
+  {
+    return family_;
+  }
+
+  /// The UDP socket type.
+  typedef basic_datagram_socket<udp> socket;
+
+  /// The UDP resolver type.
+  typedef basic_resolver<udp> resolver;
+
+  /// Compare two protocols for equality.
+  friend bool operator==(const udp& p1, const udp& p2)
+  {
+    return p1.family_ == p2.family_;
+  }
+
+  /// Compare two protocols for inequality.
+  friend bool operator!=(const udp& p1, const udp& p2)
+  {
+    return p1.family_ != p2.family_;
+  }
+
+private:
+  // Construct with a specific family.
+  explicit udp(int protocol_family) ASIO_NOEXCEPT
+    : family_(protocol_family)
+  {
+  }
+
+  int family_;
+};
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_UDP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/unicast.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/unicast.hpp
new file mode 100644
index 00000000000..0bc64c8efd4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/unicast.hpp
@@ -0,0 +1,70 @@
+//
+// ip/unicast.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_UNICAST_HPP
+#define ASIO_IP_UNICAST_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/ip/detail/socket_option.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+namespace unicast {
+
+/// Socket option for time-to-live associated with outgoing unicast packets.
+/**
+ * Implements the IPPROTO_IP/IP_UNICAST_TTL socket option.
+ *
+ * @par Examples
+ * Setting the option:
+ * @code
+ * asio::ip::udp::socket socket(my_context);
+ * ...
+ * asio::ip::unicast::hops option(4);
+ * socket.set_option(option);
+ * @endcode
+ *
+ * @par
+ * Getting the current option value:
+ * @code
+ * asio::ip::udp::socket socket(my_context);
+ * ...
+ * asio::ip::unicast::hops option;
+ * socket.get_option(option);
+ * int ttl = option.value();
+ * @endcode
+ *
+ * @par Concepts:
+ * GettableSocketOption, SettableSocketOption.
+ */
+#if defined(GENERATING_DOCUMENTATION)
+typedef implementation_defined hops;
+#else
+typedef asio::ip::detail::socket_option::unicast_hops<
+  ASIO_OS_DEF(IPPROTO_IP),
+  ASIO_OS_DEF(IP_TTL),
+  ASIO_OS_DEF(IPPROTO_IPV6),
+  ASIO_OS_DEF(IPV6_UNICAST_HOPS)> hops;
+#endif
+
+} // namespace unicast
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_UNICAST_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/v6_only.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/v6_only.hpp
new file mode 100644
index 00000000000..ff9dac4d02e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ip/v6_only.hpp
@@ -0,0 +1,69 @@
+//
+// ip/v6_only.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IP_V6_ONLY_HPP
+#define ASIO_IP_V6_ONLY_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/socket_option.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ip {
+
+/// Socket option for determining whether an IPv6 socket supports IPv6
+/// communication only.
+/**
+ * Implements the IPPROTO_IPV6/IP_V6ONLY socket option.
+ *
+ * @par Examples
+ * Setting the option:
+ * @code
+ * asio::ip::tcp::socket socket(my_context);
+ * ...
+ * asio::ip::v6_only option(true);
+ * socket.set_option(option);
+ * @endcode
+ *
+ * @par
+ * Getting the current option value:
+ * @code
+ * asio::ip::tcp::socket socket(my_context);
+ * ...
+ * asio::ip::v6_only option;
+ * socket.get_option(option);
+ * bool v6_only = option.value();
+ * @endcode
+ *
+ * @par Concepts:
+ * GettableSocketOption, SettableSocketOption.
+ */
+#if defined(GENERATING_DOCUMENTATION)
+typedef implementation_defined v6_only;
+#elif defined(IPV6_V6ONLY)
+typedef asio::detail::socket_option::boolean<
+    IPPROTO_IPV6, IPV6_V6ONLY> v6_only;
+#else
+typedef asio::detail::socket_option::boolean<
+    asio::detail::custom_socket_option_level,
+    asio::detail::always_fail_option> v6_only;
+#endif
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IP_V6_ONLY_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/is_executor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/is_executor.hpp
new file mode 100644
index 00000000000..8497da34caf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/is_executor.hpp
@@ -0,0 +1,46 @@
+//
+// is_executor.hpp
+// ~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IS_EXECUTOR_HPP
+#define ASIO_IS_EXECUTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/is_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// The is_executor trait detects whether a type T meets the Executor type
+/// requirements.
+/**
+ * Class template @c is_executor is a UnaryTypeTrait that is derived from @c
+ * true_type if the type @c T meets the syntactic requirements for Executor,
+ * otherwise @c false_type.
+ */
+template <typename T>
+struct is_executor
+#if defined(GENERATING_DOCUMENTATION)
+  : integral_constant<bool, automatically_determined>
+#else // defined(GENERATING_DOCUMENTATION)
+  : asio::detail::is_executor<T>
+#endif // defined(GENERATING_DOCUMENTATION)
+{
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IS_EXECUTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/is_read_buffered.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/is_read_buffered.hpp
new file mode 100644
index 00000000000..c75b4892f9c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/is_read_buffered.hpp
@@ -0,0 +1,59 @@
+//
+// is_read_buffered.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IS_READ_BUFFERED_HPP
+#define ASIO_IS_READ_BUFFERED_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/buffered_read_stream_fwd.hpp"
+#include "asio/buffered_stream_fwd.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail {
+
+template <typename Stream>
+char is_read_buffered_helper(buffered_stream<Stream>* s);
+
+template <typename Stream>
+char is_read_buffered_helper(buffered_read_stream<Stream>* s);
+
+struct is_read_buffered_big_type { char data[10]; };
+is_read_buffered_big_type is_read_buffered_helper(...);
+
+} // namespace detail
+
+/// The is_read_buffered class is a traits class that may be used to determine
+/// whether a stream type supports buffering of read data.
+template <typename Stream>
+class is_read_buffered
+{
+public:
+#if defined(GENERATING_DOCUMENTATION)
+  /// The value member is true only if the Stream type supports buffering of
+  /// read data.
+  static const bool value;
+#else
+  ASIO_STATIC_CONSTANT(bool,
+      value = sizeof(detail::is_read_buffered_helper((Stream*)0)) == 1);
+#endif
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IS_READ_BUFFERED_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/is_write_buffered.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/is_write_buffered.hpp
new file mode 100644
index 00000000000..fd37f3a34fa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/is_write_buffered.hpp
@@ -0,0 +1,59 @@
+//
+// is_write_buffered.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_IS_WRITE_BUFFERED_HPP
+#define ASIO_IS_WRITE_BUFFERED_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/buffered_stream_fwd.hpp"
+#include "asio/buffered_write_stream_fwd.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail {
+
+template <typename Stream>
+char is_write_buffered_helper(buffered_stream<Stream>* s);
+
+template <typename Stream>
+char is_write_buffered_helper(buffered_write_stream<Stream>* s);
+
+struct is_write_buffered_big_type { char data[10]; };
+is_write_buffered_big_type is_write_buffered_helper(...);
+
+} // namespace detail
+
+/// The is_write_buffered class is a traits class that may be used to determine
+/// whether a stream type supports buffering of written data.
+template <typename Stream>
+class is_write_buffered
+{
+public:
+#if defined(GENERATING_DOCUMENTATION)
+  /// The value member is true only if the Stream type supports buffering of
+  /// written data.
+  static const bool value;
+#else
+  ASIO_STATIC_CONSTANT(bool,
+      value = sizeof(detail::is_write_buffered_helper((Stream*)0)) == 1);
+#endif
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_IS_WRITE_BUFFERED_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/basic_endpoint.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/basic_endpoint.hpp
new file mode 100644
index 00000000000..1b1b299f06b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/basic_endpoint.hpp
@@ -0,0 +1,247 @@
+//
+// local/basic_endpoint.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Derived from a public domain implementation written by Daniel Casimiro.
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_LOCAL_BASIC_ENDPOINT_HPP
+#define ASIO_LOCAL_BASIC_ENDPOINT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_LOCAL_SOCKETS) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/local/detail/endpoint.hpp"
+
+#if !defined(ASIO_NO_IOSTREAM)
+# include <iosfwd>
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace local {
+
+/// Describes an endpoint for a UNIX socket.
+/**
+ * The asio::local::basic_endpoint class template describes an endpoint
+ * that may be associated with a particular UNIX socket.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Concepts:
+ * Endpoint.
+ */
+template <typename Protocol>
+class basic_endpoint
+{
+public:
+  /// The protocol type associated with the endpoint.
+  typedef Protocol protocol_type;
+
+  /// The type of the endpoint structure. This type is dependent on the
+  /// underlying implementation of the socket layer.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined data_type;
+#else
+  typedef asio::detail::socket_addr_type data_type;
+#endif
+
+  /// Default constructor.
+  basic_endpoint() ASIO_NOEXCEPT
+  {
+  }
+
+  /// Construct an endpoint using the specified path name.
+  basic_endpoint(const char* path_name)
+    : impl_(path_name)
+  {
+  }
+
+  /// Construct an endpoint using the specified path name.
+  basic_endpoint(const std::string& path_name)
+    : impl_(path_name)
+  {
+  }
+
+  #if defined(ASIO_HAS_STRING_VIEW)
+  /// Construct an endpoint using the specified path name.
+  basic_endpoint(string_view path_name)
+    : impl_(path_name)
+  {
+  }
+  #endif // defined(ASIO_HAS_STRING_VIEW)
+
+  /// Copy constructor.
+  basic_endpoint(const basic_endpoint& other)
+    : impl_(other.impl_)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move constructor.
+  basic_endpoint(basic_endpoint&& other)
+    : impl_(other.impl_)
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// Assign from another endpoint.
+  basic_endpoint& operator=(const basic_endpoint& other)
+  {
+    impl_ = other.impl_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  /// Move-assign from another endpoint.
+  basic_endpoint& operator=(basic_endpoint&& other)
+  {
+    impl_ = other.impl_;
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  /// The protocol associated with the endpoint.
+  protocol_type protocol() const
+  {
+    return protocol_type();
+  }
+
+  /// Get the underlying endpoint in the native type.
+  data_type* data()
+  {
+    return impl_.data();
+  }
+
+  /// Get the underlying endpoint in the native type.
+  const data_type* data() const
+  {
+    return impl_.data();
+  }
+
+  /// Get the underlying size of the endpoint in the native type.
+  std::size_t size() const
+  {
+    return impl_.size();
+  }
+
+  /// Set the underlying size of the endpoint in the native type.
+  void resize(std::size_t new_size)
+  {
+    impl_.resize(new_size);
+  }
+
+  /// Get the capacity of the endpoint in the native type.
+  std::size_t capacity() const
+  {
+    return impl_.capacity();
+  }
+
+  /// Get the path associated with the endpoint.
+  std::string path() const
+  {
+    return impl_.path();
+  }
+
+  /// Set the path associated with the endpoint.
+  void path(const char* p)
+  {
+    impl_.path(p);
+  }
+
+  /// Set the path associated with the endpoint.
+  void path(const std::string& p)
+  {
+    impl_.path(p);
+  }
+
+  /// Compare two endpoints for equality.
+  friend bool operator==(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return e1.impl_ == e2.impl_;
+  }
+
+  /// Compare two endpoints for inequality.
+  friend bool operator!=(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return !(e1.impl_ == e2.impl_);
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator<(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return e1.impl_ < e2.impl_;
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator>(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return e2.impl_ < e1.impl_;
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator<=(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return !(e2 < e1);
+  }
+
+  /// Compare endpoints for ordering.
+  friend bool operator>=(const basic_endpoint<Protocol>& e1,
+      const basic_endpoint<Protocol>& e2)
+  {
+    return !(e1 < e2);
+  }
+
+private:
+  // The underlying UNIX domain endpoint.
+  asio::local::detail::endpoint impl_;
+};
+
+/// Output an endpoint as a string.
+/**
+ * Used to output a human-readable string for a specified endpoint.
+ *
+ * @param os The output stream to which the string will be written.
+ *
+ * @param endpoint The endpoint to be written.
+ *
+ * @return The output stream.
+ *
+ * @relates asio::local::basic_endpoint
+ */
+template <typename Elem, typename Traits, typename Protocol>
+std::basic_ostream<Elem, Traits>& operator<<(
+    std::basic_ostream<Elem, Traits>& os,
+    const basic_endpoint<Protocol>& endpoint)
+{
+  os << endpoint.path();
+  return os;
+}
+
+} // namespace local
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_LOCAL_SOCKETS)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_LOCAL_BASIC_ENDPOINT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/connect_pair.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/connect_pair.hpp
new file mode 100644
index 00000000000..ed48b61b2a3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/connect_pair.hpp
@@ -0,0 +1,101 @@
+//
+// local/connect_pair.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_LOCAL_CONNECT_PAIR_HPP
+#define ASIO_LOCAL_CONNECT_PAIR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_LOCAL_SOCKETS) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/basic_socket.hpp"
+#include "asio/detail/socket_ops.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+#include "asio/local/basic_endpoint.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace local {
+
+/// Create a pair of connected sockets.
+template <typename Protocol, typename Executor1, typename Executor2>
+void connect_pair(basic_socket<Protocol, Executor1>& socket1,
+    basic_socket<Protocol, Executor2>& socket2);
+
+/// Create a pair of connected sockets.
+template <typename Protocol, typename Executor1, typename Executor2>
+ASIO_SYNC_OP_VOID connect_pair(basic_socket<Protocol, Executor1>& socket1,
+    basic_socket<Protocol, Executor2>& socket2, asio::error_code& ec);
+
+template <typename Protocol, typename Executor1, typename Executor2>
+inline void connect_pair(basic_socket<Protocol, Executor1>& socket1,
+    basic_socket<Protocol, Executor2>& socket2)
+{
+  asio::error_code ec;
+  connect_pair(socket1, socket2, ec);
+  asio::detail::throw_error(ec, "connect_pair");
+}
+
+template <typename Protocol, typename Executor1, typename Executor2>
+inline ASIO_SYNC_OP_VOID connect_pair(
+    basic_socket<Protocol, Executor1>& socket1,
+    basic_socket<Protocol, Executor2>& socket2, asio::error_code& ec)
+{
+  // Check that this function is only being used with a UNIX domain socket.
+  asio::local::basic_endpoint<Protocol>* tmp
+    = static_cast<typename Protocol::endpoint*>(0);
+  (void)tmp;
+
+  Protocol protocol;
+  asio::detail::socket_type sv[2];
+  if (asio::detail::socket_ops::socketpair(protocol.family(),
+        protocol.type(), protocol.protocol(), sv, ec)
+      == asio::detail::socket_error_retval)
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+
+  socket1.assign(protocol, sv[0], ec);
+  if (ec)
+  {
+    asio::error_code temp_ec;
+    asio::detail::socket_ops::state_type state[2] = { 0, 0 };
+    asio::detail::socket_ops::close(sv[0], state[0], true, temp_ec);
+    asio::detail::socket_ops::close(sv[1], state[1], true, temp_ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  socket2.assign(protocol, sv[1], ec);
+  if (ec)
+  {
+    asio::error_code temp_ec;
+    socket1.close(temp_ec);
+    asio::detail::socket_ops::state_type state = 0;
+    asio::detail::socket_ops::close(sv[1], state, true, temp_ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  ASIO_SYNC_OP_VOID_RETURN(ec);
+}
+
+} // namespace local
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_LOCAL_SOCKETS)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_LOCAL_CONNECT_PAIR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/datagram_protocol.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/datagram_protocol.hpp
new file mode 100644
index 00000000000..a2bf5149a7e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/datagram_protocol.hpp
@@ -0,0 +1,80 @@
+//
+// local/datagram_protocol.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_LOCAL_DATAGRAM_PROTOCOL_HPP
+#define ASIO_LOCAL_DATAGRAM_PROTOCOL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_LOCAL_SOCKETS) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/basic_datagram_socket.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/local/basic_endpoint.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace local {
+
+/// Encapsulates the flags needed for datagram-oriented UNIX sockets.
+/**
+ * The asio::local::datagram_protocol class contains flags necessary for
+ * datagram-oriented UNIX domain sockets.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Safe.
+ *
+ * @par Concepts:
+ * Protocol.
+ */
+class datagram_protocol
+{
+public:
+  /// Obtain an identifier for the type of the protocol.
+  int type() const ASIO_NOEXCEPT
+  {
+    return SOCK_DGRAM;
+  }
+
+  /// Obtain an identifier for the protocol.
+  int protocol() const ASIO_NOEXCEPT
+  {
+    return 0;
+  }
+
+  /// Obtain an identifier for the protocol family.
+  int family() const ASIO_NOEXCEPT
+  {
+    return AF_UNIX;
+  }
+
+  /// The type of a UNIX domain endpoint.
+  typedef basic_endpoint<datagram_protocol> endpoint;
+
+  /// The UNIX domain socket type.
+  typedef basic_datagram_socket<datagram_protocol> socket;
+};
+
+} // namespace local
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_LOCAL_SOCKETS)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_LOCAL_DATAGRAM_PROTOCOL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/detail/endpoint.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/detail/endpoint.hpp
new file mode 100644
index 00000000000..042b21a97b9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/detail/endpoint.hpp
@@ -0,0 +1,139 @@
+//
+// local/detail/endpoint.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Derived from a public domain implementation written by Daniel Casimiro.
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_LOCAL_DETAIL_ENDPOINT_HPP
+#define ASIO_LOCAL_DETAIL_ENDPOINT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_LOCAL_SOCKETS)
+
+#include <cstddef>
+#include <string>
+#include "asio/detail/socket_types.hpp"
+#include "asio/detail/string_view.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace local {
+namespace detail {
+
+// Helper class for implementing a UNIX domain endpoint.
+class endpoint
+{
+public:
+  // Default constructor.
+  ASIO_DECL endpoint();
+
+  // Construct an endpoint using the specified path name.
+  ASIO_DECL endpoint(const char* path_name);
+
+  // Construct an endpoint using the specified path name.
+  ASIO_DECL endpoint(const std::string& path_name);
+
+  #if defined(ASIO_HAS_STRING_VIEW)
+  // Construct an endpoint using the specified path name.
+  ASIO_DECL endpoint(string_view path_name);
+  #endif // defined(ASIO_HAS_STRING_VIEW)
+
+  // Copy constructor.
+  endpoint(const endpoint& other)
+    : data_(other.data_),
+      path_length_(other.path_length_)
+  {
+  }
+
+  // Assign from another endpoint.
+  endpoint& operator=(const endpoint& other)
+  {
+    data_ = other.data_;
+    path_length_ = other.path_length_;
+    return *this;
+  }
+
+  // Get the underlying endpoint in the native type.
+  asio::detail::socket_addr_type* data()
+  {
+    return &data_.base;
+  }
+
+  // Get the underlying endpoint in the native type.
+  const asio::detail::socket_addr_type* data() const
+  {
+    return &data_.base;
+  }
+
+  // Get the underlying size of the endpoint in the native type.
+  std::size_t size() const
+  {
+    return path_length_
+      + offsetof(asio::detail::sockaddr_un_type, sun_path);
+  }
+
+  // Set the underlying size of the endpoint in the native type.
+  ASIO_DECL void resize(std::size_t size);
+
+  // Get the capacity of the endpoint in the native type.
+  std::size_t capacity() const
+  {
+    return sizeof(asio::detail::sockaddr_un_type);
+  }
+
+  // Get the path associated with the endpoint.
+  ASIO_DECL std::string path() const;
+
+  // Set the path associated with the endpoint.
+  ASIO_DECL void path(const char* p);
+
+  // Set the path associated with the endpoint.
+  ASIO_DECL void path(const std::string& p);
+
+  // Compare two endpoints for equality.
+  ASIO_DECL friend bool operator==(
+      const endpoint& e1, const endpoint& e2);
+
+  // Compare endpoints for ordering.
+  ASIO_DECL friend bool operator<(
+      const endpoint& e1, const endpoint& e2);
+
+private:
+  // The underlying UNIX socket address.
+  union data_union
+  {
+    asio::detail::socket_addr_type base;
+    asio::detail::sockaddr_un_type local;
+  } data_;
+
+  // The length of the path associated with the endpoint.
+  std::size_t path_length_;
+
+  // Initialise with a specified path.
+  ASIO_DECL void init(const char* path, std::size_t path_length);
+};
+
+} // namespace detail
+} // namespace local
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/local/detail/impl/endpoint.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_LOCAL_SOCKETS)
+
+#endif // ASIO_LOCAL_DETAIL_ENDPOINT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/stream_protocol.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/stream_protocol.hpp
new file mode 100644
index 00000000000..276e71d35b8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/local/stream_protocol.hpp
@@ -0,0 +1,90 @@
+//
+// local/stream_protocol.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_LOCAL_STREAM_PROTOCOL_HPP
+#define ASIO_LOCAL_STREAM_PROTOCOL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_LOCAL_SOCKETS) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/basic_socket_acceptor.hpp"
+#include "asio/basic_socket_iostream.hpp"
+#include "asio/basic_stream_socket.hpp"
+#include "asio/detail/socket_types.hpp"
+#include "asio/local/basic_endpoint.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace local {
+
+/// Encapsulates the flags needed for stream-oriented UNIX sockets.
+/**
+ * The asio::local::stream_protocol class contains flags necessary for
+ * stream-oriented UNIX domain sockets.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Safe.
+ *
+ * @par Concepts:
+ * Protocol.
+ */
+class stream_protocol
+{
+public:
+  /// Obtain an identifier for the type of the protocol.
+  int type() const ASIO_NOEXCEPT
+  {
+    return SOCK_STREAM;
+  }
+
+  /// Obtain an identifier for the protocol.
+  int protocol() const ASIO_NOEXCEPT
+  {
+    return 0;
+  }
+
+  /// Obtain an identifier for the protocol family.
+  int family() const ASIO_NOEXCEPT
+  {
+    return AF_UNIX;
+  }
+
+  /// The type of a UNIX domain endpoint.
+  typedef basic_endpoint<stream_protocol> endpoint;
+
+  /// The UNIX domain socket type.
+  typedef basic_stream_socket<stream_protocol> socket;
+
+  /// The UNIX domain acceptor type.
+  typedef basic_socket_acceptor<stream_protocol> acceptor;
+
+#if !defined(ASIO_NO_IOSTREAM)
+  /// The UNIX domain iostream type.
+  typedef basic_socket_iostream<stream_protocol> iostream;
+#endif // !defined(ASIO_NO_IOSTREAM)
+};
+
+} // namespace local
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_LOCAL_SOCKETS)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_LOCAL_STREAM_PROTOCOL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/packaged_task.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/packaged_task.hpp
new file mode 100644
index 00000000000..49e97712e74
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/packaged_task.hpp
@@ -0,0 +1,126 @@
+//
+// packaged_task.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_PACKAGED_TASK_HPP
+#define ASIO_PACKAGED_TASK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/future.hpp"
+
+#if defined(ASIO_HAS_STD_FUTURE_CLASS) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/async_result.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/detail/variadic_templates.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if defined(ASIO_HAS_VARIADIC_TEMPLATES) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Partial specialisation of @c async_result for @c std::packaged_task.
+template <typename Result, typename... Args, typename Signature>
+class async_result<std::packaged_task<Result(Args...)>, Signature>
+{
+public:
+  /// The packaged task is the concrete completion handler type.
+  typedef std::packaged_task<Result(Args...)> completion_handler_type;
+
+  /// The return type of the initiating function is the future obtained from
+  /// the packaged task.
+  typedef std::future<Result> return_type;
+
+  /// The constructor extracts the future from the packaged task.
+  explicit async_result(completion_handler_type& h)
+    : future_(h.get_future())
+  {
+  }
+
+  /// Returns the packaged task's future.
+  return_type get()
+  {
+    return std::move(future_);
+  }
+
+private:
+  return_type future_;
+};
+
+#else // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+      //   || defined(GENERATING_DOCUMENTATION)
+
+template <typename Result, typename Signature>
+struct async_result<std::packaged_task<Result()>, Signature>
+{
+  typedef std::packaged_task<Result()> completion_handler_type;
+  typedef std::future<Result> return_type;
+
+  explicit async_result(completion_handler_type& h)
+    : future_(h.get_future())
+  {
+  }
+
+  return_type get()
+  {
+    return std::move(future_);
+  }
+
+private:
+  return_type future_;
+};
+
+#define ASIO_PRIVATE_ASYNC_RESULT_DEF(n) \
+  template <typename Result, \
+    ASIO_VARIADIC_TPARAMS(n), typename Signature> \
+  class async_result< \
+    std::packaged_task<Result(ASIO_VARIADIC_TARGS(n))>, Signature> \
+  { \
+  public: \
+    typedef std::packaged_task< \
+      Result(ASIO_VARIADIC_TARGS(n))> \
+        completion_handler_type; \
+  \
+    typedef std::future<Result> return_type; \
+  \
+    explicit async_result(completion_handler_type& h) \
+      : future_(h.get_future()) \
+    { \
+    } \
+  \
+    return_type get() \
+    { \
+      return std::move(future_); \
+    } \
+  \
+  private: \
+    return_type future_; \
+  }; \
+  /**/
+  ASIO_VARIADIC_GENERATE(ASIO_PRIVATE_ASYNC_RESULT_DEF)
+#undef ASIO_PRIVATE_ASYNC_RESULT_DEF
+
+#endif // defined(ASIO_HAS_VARIADIC_TEMPLATES)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_STD_FUTURE_CLASS)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_PACKAGED_TASK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/placeholders.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/placeholders.hpp
new file mode 100644
index 00000000000..7c89753c50a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/placeholders.hpp
@@ -0,0 +1,151 @@
+//
+// placeholders.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_PLACEHOLDERS_HPP
+#define ASIO_PLACEHOLDERS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_BOOST_BIND)
+# include <boost/bind/arg.hpp>
+#endif // defined(ASIO_HAS_BOOST_BIND)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace placeholders {
+
+#if defined(GENERATING_DOCUMENTATION)
+
+/// An argument placeholder, for use with boost::bind(), that corresponds to
+/// the error argument of a handler for any of the asynchronous functions.
+unspecified error;
+
+/// An argument placeholder, for use with boost::bind(), that corresponds to
+/// the bytes_transferred argument of a handler for asynchronous functions such
+/// as asio::basic_stream_socket::async_write_some or
+/// asio::async_write.
+unspecified bytes_transferred;
+
+/// An argument placeholder, for use with boost::bind(), that corresponds to
+/// the iterator argument of a handler for asynchronous functions such as
+/// asio::async_connect.
+unspecified iterator;
+
+/// An argument placeholder, for use with boost::bind(), that corresponds to
+/// the results argument of a handler for asynchronous functions such as
+/// asio::basic_resolver::async_resolve.
+unspecified results;
+
+/// An argument placeholder, for use with boost::bind(), that corresponds to
+/// the results argument of a handler for asynchronous functions such as
+/// asio::async_connect.
+unspecified endpoint;
+
+/// An argument placeholder, for use with boost::bind(), that corresponds to
+/// the signal_number argument of a handler for asynchronous functions such as
+/// asio::signal_set::async_wait.
+unspecified signal_number;
+
+#elif defined(ASIO_HAS_BOOST_BIND)
+# if defined(__BORLANDC__) || defined(__GNUC__)
+
+inline boost::arg<1> error()
+{
+  return boost::arg<1>();
+}
+
+inline boost::arg<2> bytes_transferred()
+{
+  return boost::arg<2>();
+}
+
+inline boost::arg<2> iterator()
+{
+  return boost::arg<2>();
+}
+
+inline boost::arg<2> results()
+{
+  return boost::arg<2>();
+}
+
+inline boost::arg<2> endpoint()
+{
+  return boost::arg<2>();
+}
+
+inline boost::arg<2> signal_number()
+{
+  return boost::arg<2>();
+}
+
+# else
+
+namespace detail
+{
+  template <int Number>
+  struct placeholder
+  {
+    static boost::arg<Number>& get()
+    {
+      static boost::arg<Number> result;
+      return result;
+    }
+  };
+}
+
+#  if defined(ASIO_MSVC) && (ASIO_MSVC < 1400)
+
+static boost::arg<1>& error
+  = asio::placeholders::detail::placeholder<1>::get();
+static boost::arg<2>& bytes_transferred
+  = asio::placeholders::detail::placeholder<2>::get();
+static boost::arg<2>& iterator
+  = asio::placeholders::detail::placeholder<2>::get();
+static boost::arg<2>& results
+  = asio::placeholders::detail::placeholder<2>::get();
+static boost::arg<2>& endpoint
+  = asio::placeholders::detail::placeholder<2>::get();
+static boost::arg<2>& signal_number
+  = asio::placeholders::detail::placeholder<2>::get();
+
+#  else
+
+namespace
+{
+  boost::arg<1>& error
+    = asio::placeholders::detail::placeholder<1>::get();
+  boost::arg<2>& bytes_transferred
+    = asio::placeholders::detail::placeholder<2>::get();
+  boost::arg<2>& iterator
+    = asio::placeholders::detail::placeholder<2>::get();
+  boost::arg<2>& results
+    = asio::placeholders::detail::placeholder<2>::get();
+  boost::arg<2>& endpoint
+    = asio::placeholders::detail::placeholder<2>::get();
+  boost::arg<2>& signal_number
+    = asio::placeholders::detail::placeholder<2>::get();
+} // namespace
+
+#  endif
+# endif
+#endif
+
+} // namespace placeholders
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_PLACEHOLDERS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/basic_descriptor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/basic_descriptor.hpp
new file mode 100644
index 00000000000..6164adfd1e3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/basic_descriptor.hpp
@@ -0,0 +1,697 @@
+//
+// posix/basic_descriptor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_POSIX_BASIC_DESCRIPTOR_HPP
+#define ASIO_POSIX_BASIC_DESCRIPTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/async_result.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/io_object_impl.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/reactive_descriptor_service.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/executor.hpp"
+#include "asio/posix/descriptor_base.hpp"
+
+#if defined(ASIO_HAS_MOVE)
+# include <utility>
+#endif // defined(ASIO_HAS_MOVE)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace posix {
+
+/// Provides POSIX descriptor functionality.
+/**
+ * The posix::basic_descriptor class template provides the ability to wrap a
+ * POSIX descriptor.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename Executor = executor>
+class basic_descriptor
+  : public descriptor_base
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the descriptor type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The descriptor type when rebound to the specified executor.
+    typedef basic_descriptor<Executor1> other;
+  };
+
+  /// The native representation of a descriptor.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#else
+  typedef detail::reactive_descriptor_service::native_handle_type
+    native_handle_type;
+#endif
+
+  /// A descriptor is always the lowest layer.
+  typedef basic_descriptor lowest_layer_type;
+
+  /// Construct a descriptor without opening it.
+  /**
+   * This constructor creates a descriptor without opening it.
+   *
+   * @param ex The I/O executor that the descriptor will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * descriptor.
+   */
+  explicit basic_descriptor(const executor_type& ex)
+    : impl_(ex)
+  {
+  }
+
+  /// Construct a descriptor without opening it.
+  /**
+   * This constructor creates a descriptor without opening it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the descriptor will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the descriptor.
+   */
+  template <typename ExecutionContext>
+  explicit basic_descriptor(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+  }
+
+  /// Construct a descriptor on an existing native descriptor.
+  /**
+   * This constructor creates a descriptor object to hold an existing native
+   * descriptor.
+   *
+   * @param ex The I/O executor that the descriptor will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * descriptor.
+   *
+   * @param native_descriptor A native descriptor.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_descriptor(const executor_type& ex,
+      const native_handle_type& native_descriptor)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        native_descriptor, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Construct a descriptor on an existing native descriptor.
+  /**
+   * This constructor creates a descriptor object to hold an existing native
+   * descriptor.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the descriptor will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the descriptor.
+   *
+   * @param native_descriptor A native descriptor.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_descriptor(ExecutionContext& context,
+      const native_handle_type& native_descriptor,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        native_descriptor, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a descriptor from another.
+  /**
+   * This constructor moves a descriptor from one object to another.
+   *
+   * @param other The other descriptor object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_descriptor(const executor_type&)
+   * constructor.
+   */
+  basic_descriptor(basic_descriptor&& other)
+    : impl_(std::move(other.impl_))
+  {
+  }
+
+  /// Move-assign a descriptor from another.
+  /**
+   * This assignment operator moves a descriptor from one object to another.
+   *
+   * @param other The other descriptor object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_descriptor(const executor_type&)
+   * constructor.
+   */
+  basic_descriptor& operator=(basic_descriptor&& other)
+  {
+    impl_ = std::move(other.impl_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return impl_.get_executor();
+  }
+
+  /// Get a reference to the lowest layer.
+  /**
+   * This function returns a reference to the lowest layer in a stack of
+   * layers. Since a descriptor cannot contain any further layers, it
+   * simply returns a reference to itself.
+   *
+   * @return A reference to the lowest layer in the stack of layers. Ownership
+   * is not transferred to the caller.
+   */
+  lowest_layer_type& lowest_layer()
+  {
+    return *this;
+  }
+
+  /// Get a const reference to the lowest layer.
+  /**
+   * This function returns a const reference to the lowest layer in a stack of
+   * layers. Since a descriptor cannot contain any further layers, it
+   * simply returns a reference to itself.
+   *
+   * @return A const reference to the lowest layer in the stack of layers.
+   * Ownership is not transferred to the caller.
+   */
+  const lowest_layer_type& lowest_layer() const
+  {
+    return *this;
+  }
+
+  /// Assign an existing native descriptor to the descriptor.
+  /*
+   * This function opens the descriptor to hold an existing native descriptor.
+   *
+   * @param native_descriptor A native descriptor.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void assign(const native_handle_type& native_descriptor)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(),
+        native_descriptor, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Assign an existing native descriptor to the descriptor.
+  /*
+   * This function opens the descriptor to hold an existing native descriptor.
+   *
+   * @param native_descriptor A native descriptor.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID assign(const native_handle_type& native_descriptor,
+      asio::error_code& ec)
+  {
+    impl_.get_service().assign(
+        impl_.get_implementation(), native_descriptor, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Determine whether the descriptor is open.
+  bool is_open() const
+  {
+    return impl_.get_service().is_open(impl_.get_implementation());
+  }
+
+  /// Close the descriptor.
+  /**
+   * This function is used to close the descriptor. Any asynchronous read or
+   * write operations will be cancelled immediately, and will complete with the
+   * asio::error::operation_aborted error.
+   *
+   * @throws asio::system_error Thrown on failure. Note that, even if
+   * the function indicates an error, the underlying descriptor is closed.
+   */
+  void close()
+  {
+    asio::error_code ec;
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "close");
+  }
+
+  /// Close the descriptor.
+  /**
+   * This function is used to close the descriptor. Any asynchronous read or
+   * write operations will be cancelled immediately, and will complete with the
+   * asio::error::operation_aborted error.
+   *
+   * @param ec Set to indicate what error occurred, if any. Note that, even if
+   * the function indicates an error, the underlying descriptor is closed.
+   */
+  ASIO_SYNC_OP_VOID close(asio::error_code& ec)
+  {
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Get the native descriptor representation.
+  /**
+   * This function may be used to obtain the underlying representation of the
+   * descriptor. This is intended to allow access to native descriptor
+   * functionality that is not otherwise provided.
+   */
+  native_handle_type native_handle()
+  {
+    return impl_.get_service().native_handle(impl_.get_implementation());
+  }
+
+  /// Release ownership of the native descriptor implementation.
+  /**
+   * This function may be used to obtain the underlying representation of the
+   * descriptor. After calling this function, @c is_open() returns false. The
+   * caller is responsible for closing the descriptor.
+   *
+   * All outstanding asynchronous read or write operations will finish
+   * immediately, and the handlers for cancelled operations will be passed the
+   * asio::error::operation_aborted error.
+   */
+  native_handle_type release()
+  {
+    return impl_.get_service().release(impl_.get_implementation());
+  }
+
+  /// Cancel all asynchronous operations associated with the descriptor.
+  /**
+   * This function causes all outstanding asynchronous read or write operations
+   * to finish immediately, and the handlers for cancelled operations will be
+   * passed the asio::error::operation_aborted error.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void cancel()
+  {
+    asio::error_code ec;
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "cancel");
+  }
+
+  /// Cancel all asynchronous operations associated with the descriptor.
+  /**
+   * This function causes all outstanding asynchronous read or write operations
+   * to finish immediately, and the handlers for cancelled operations will be
+   * passed the asio::error::operation_aborted error.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID cancel(asio::error_code& ec)
+  {
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Perform an IO control command on the descriptor.
+  /**
+   * This function is used to execute an IO control command on the descriptor.
+   *
+   * @param command The IO control command to be performed on the descriptor.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @sa IoControlCommand @n
+   * asio::posix::descriptor_base::bytes_readable @n
+   * asio::posix::descriptor_base::non_blocking_io
+   *
+   * @par Example
+   * Getting the number of bytes ready to read:
+   * @code
+   * asio::posix::stream_descriptor descriptor(my_context);
+   * ...
+   * asio::posix::stream_descriptor::bytes_readable command;
+   * descriptor.io_control(command);
+   * std::size_t bytes_readable = command.get();
+   * @endcode
+   */
+  template <typename IoControlCommand>
+  void io_control(IoControlCommand& command)
+  {
+    asio::error_code ec;
+    impl_.get_service().io_control(impl_.get_implementation(), command, ec);
+    asio::detail::throw_error(ec, "io_control");
+  }
+
+  /// Perform an IO control command on the descriptor.
+  /**
+   * This function is used to execute an IO control command on the descriptor.
+   *
+   * @param command The IO control command to be performed on the descriptor.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @sa IoControlCommand @n
+   * asio::posix::descriptor_base::bytes_readable @n
+   * asio::posix::descriptor_base::non_blocking_io
+   *
+   * @par Example
+   * Getting the number of bytes ready to read:
+   * @code
+   * asio::posix::stream_descriptor descriptor(my_context);
+   * ...
+   * asio::posix::stream_descriptor::bytes_readable command;
+   * asio::error_code ec;
+   * descriptor.io_control(command, ec);
+   * if (ec)
+   * {
+   *   // An error occurred.
+   * }
+   * std::size_t bytes_readable = command.get();
+   * @endcode
+   */
+  template <typename IoControlCommand>
+  ASIO_SYNC_OP_VOID io_control(IoControlCommand& command,
+      asio::error_code& ec)
+  {
+    impl_.get_service().io_control(impl_.get_implementation(), command, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Gets the non-blocking mode of the descriptor.
+  /**
+   * @returns @c true if the descriptor's synchronous operations will fail with
+   * asio::error::would_block if they are unable to perform the requested
+   * operation immediately. If @c false, synchronous operations will block
+   * until complete.
+   *
+   * @note The non-blocking mode has no effect on the behaviour of asynchronous
+   * operations. Asynchronous operations will never fail with the error
+   * asio::error::would_block.
+   */
+  bool non_blocking() const
+  {
+    return impl_.get_service().non_blocking(impl_.get_implementation());
+  }
+
+  /// Sets the non-blocking mode of the descriptor.
+  /**
+   * @param mode If @c true, the descriptor's synchronous operations will fail
+   * with asio::error::would_block if they are unable to perform the
+   * requested operation immediately. If @c false, synchronous operations will
+   * block until complete.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The non-blocking mode has no effect on the behaviour of asynchronous
+   * operations. Asynchronous operations will never fail with the error
+   * asio::error::would_block.
+   */
+  void non_blocking(bool mode)
+  {
+    asio::error_code ec;
+    impl_.get_service().non_blocking(impl_.get_implementation(), mode, ec);
+    asio::detail::throw_error(ec, "non_blocking");
+  }
+
+  /// Sets the non-blocking mode of the descriptor.
+  /**
+   * @param mode If @c true, the descriptor's synchronous operations will fail
+   * with asio::error::would_block if they are unable to perform the
+   * requested operation immediately. If @c false, synchronous operations will
+   * block until complete.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note The non-blocking mode has no effect on the behaviour of asynchronous
+   * operations. Asynchronous operations will never fail with the error
+   * asio::error::would_block.
+   */
+  ASIO_SYNC_OP_VOID non_blocking(
+      bool mode, asio::error_code& ec)
+  {
+    impl_.get_service().non_blocking(impl_.get_implementation(), mode, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Gets the non-blocking mode of the native descriptor implementation.
+  /**
+   * This function is used to retrieve the non-blocking mode of the underlying
+   * native descriptor. This mode has no effect on the behaviour of the
+   * descriptor object's synchronous operations.
+   *
+   * @returns @c true if the underlying descriptor is in non-blocking mode and
+   * direct system calls may fail with asio::error::would_block (or the
+   * equivalent system error).
+   *
+   * @note The current non-blocking mode is cached by the descriptor object.
+   * Consequently, the return value may be incorrect if the non-blocking mode
+   * was set directly on the native descriptor.
+   */
+  bool native_non_blocking() const
+  {
+    return impl_.get_service().native_non_blocking(
+        impl_.get_implementation());
+  }
+
+  /// Sets the non-blocking mode of the native descriptor implementation.
+  /**
+   * This function is used to modify the non-blocking mode of the underlying
+   * native descriptor. It has no effect on the behaviour of the descriptor
+   * object's synchronous operations.
+   *
+   * @param mode If @c true, the underlying descriptor is put into non-blocking
+   * mode and direct system calls may fail with asio::error::would_block
+   * (or the equivalent system error).
+   *
+   * @throws asio::system_error Thrown on failure. If the @c mode is
+   * @c false, but the current value of @c non_blocking() is @c true, this
+   * function fails with asio::error::invalid_argument, as the
+   * combination does not make sense.
+   */
+  void native_non_blocking(bool mode)
+  {
+    asio::error_code ec;
+    impl_.get_service().native_non_blocking(
+        impl_.get_implementation(), mode, ec);
+    asio::detail::throw_error(ec, "native_non_blocking");
+  }
+
+  /// Sets the non-blocking mode of the native descriptor implementation.
+  /**
+   * This function is used to modify the non-blocking mode of the underlying
+   * native descriptor. It has no effect on the behaviour of the descriptor
+   * object's synchronous operations.
+   *
+   * @param mode If @c true, the underlying descriptor is put into non-blocking
+   * mode and direct system calls may fail with asio::error::would_block
+   * (or the equivalent system error).
+   *
+   * @param ec Set to indicate what error occurred, if any. If the @c mode is
+   * @c false, but the current value of @c non_blocking() is @c true, this
+   * function fails with asio::error::invalid_argument, as the
+   * combination does not make sense.
+   */
+  ASIO_SYNC_OP_VOID native_non_blocking(
+      bool mode, asio::error_code& ec)
+  {
+    impl_.get_service().native_non_blocking(
+        impl_.get_implementation(), mode, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Wait for the descriptor to become ready to read, ready to write, or to
+  /// have pending error conditions.
+  /**
+   * This function is used to perform a blocking wait for a descriptor to enter
+   * a ready to read, write or error condition state.
+   *
+   * @param w Specifies the desired descriptor state.
+   *
+   * @par Example
+   * Waiting for a descriptor to become readable.
+   * @code
+   * asio::posix::stream_descriptor descriptor(my_context);
+   * ...
+   * descriptor.wait(asio::posix::stream_descriptor::wait_read);
+   * @endcode
+   */
+  void wait(wait_type w)
+  {
+    asio::error_code ec;
+    impl_.get_service().wait(impl_.get_implementation(), w, ec);
+    asio::detail::throw_error(ec, "wait");
+  }
+
+  /// Wait for the descriptor to become ready to read, ready to write, or to
+  /// have pending error conditions.
+  /**
+   * This function is used to perform a blocking wait for a descriptor to enter
+   * a ready to read, write or error condition state.
+   *
+   * @param w Specifies the desired descriptor state.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @par Example
+   * Waiting for a descriptor to become readable.
+   * @code
+   * asio::posix::stream_descriptor descriptor(my_context);
+   * ...
+   * asio::error_code ec;
+   * descriptor.wait(asio::posix::stream_descriptor::wait_read, ec);
+   * @endcode
+   */
+  ASIO_SYNC_OP_VOID wait(wait_type w, asio::error_code& ec)
+  {
+    impl_.get_service().wait(impl_.get_implementation(), w, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Asynchronously wait for the descriptor to become ready to read, ready to
+  /// write, or to have pending error conditions.
+  /**
+   * This function is used to perform an asynchronous wait for a descriptor to
+   * enter a ready to read, write or error condition state.
+   *
+   * @param w Specifies the desired descriptor state.
+   *
+   * @param handler The handler to be called when the wait operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error // Result of operation
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @par Example
+   * @code
+   * void wait_handler(const asio::error_code& error)
+   * {
+   *   if (!error)
+   *   {
+   *     // Wait succeeded.
+   *   }
+   * }
+   *
+   * ...
+   *
+   * asio::posix::stream_descriptor descriptor(my_context);
+   * ...
+   * descriptor.async_wait(
+   *     asio::posix::stream_descriptor::wait_read,
+   *     wait_handler);
+   * @endcode
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code))
+        WaitHandler ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WaitHandler,
+      void (asio::error_code))
+  async_wait(wait_type w,
+      ASIO_MOVE_ARG(WaitHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WaitHandler, void (asio::error_code)>(
+        initiate_async_wait(this), handler, w);
+  }
+
+protected:
+  /// Protected destructor to prevent deletion through this type.
+  /**
+   * This function destroys the descriptor, cancelling any outstanding
+   * asynchronous wait operations associated with the descriptor as if by
+   * calling @c cancel.
+   */
+  ~basic_descriptor()
+  {
+  }
+
+  detail::io_object_impl<detail::reactive_descriptor_service, Executor> impl_;
+
+private:
+  // Disallow copying and assignment.
+  basic_descriptor(const basic_descriptor&) ASIO_DELETED;
+  basic_descriptor& operator=(const basic_descriptor&) ASIO_DELETED;
+
+  class initiate_async_wait
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_wait(basic_descriptor* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WaitHandler>
+    void operator()(ASIO_MOVE_ARG(WaitHandler) handler, wait_type w) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WaitHandler.
+      ASIO_WAIT_HANDLER_CHECK(WaitHandler, handler) type_check;
+
+      detail::non_const_lvalue<WaitHandler> handler2(handler);
+      self_->impl_.get_service().async_wait(
+          self_->impl_.get_implementation(), w, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_descriptor* self_;
+  };
+};
+
+} // namespace posix
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_POSIX_BASIC_DESCRIPTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/basic_stream_descriptor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/basic_stream_descriptor.hpp
new file mode 100644
index 00000000000..95c7f2a58d6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/basic_stream_descriptor.hpp
@@ -0,0 +1,470 @@
+//
+// posix/basic_stream_descriptor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_POSIX_BASIC_STREAM_DESCRIPTOR_HPP
+#define ASIO_POSIX_BASIC_STREAM_DESCRIPTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/posix/descriptor.hpp"
+
+#if defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR) \
+  || defined(GENERATING_DOCUMENTATION)
+
+namespace asio {
+namespace posix {
+
+/// Provides stream-oriented descriptor functionality.
+/**
+ * The posix::basic_stream_descriptor class template provides asynchronous and
+ * blocking stream-oriented descriptor functionality.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Concepts:
+ * AsyncReadStream, AsyncWriteStream, Stream, SyncReadStream, SyncWriteStream.
+ */
+template <typename Executor = executor>
+class basic_stream_descriptor
+  : public basic_descriptor<Executor>
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the descriptor type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The descriptor type when rebound to the specified executor.
+    typedef basic_stream_descriptor<Executor1> other;
+  };
+
+  /// The native representation of a descriptor.
+  typedef typename basic_descriptor<Executor>::native_handle_type
+    native_handle_type;
+
+  /// Construct a stream descriptor without opening it.
+  /**
+   * This constructor creates a stream descriptor without opening it. The
+   * descriptor needs to be opened and then connected or accepted before data
+   * can be sent or received on it.
+   *
+   * @param ex The I/O executor that the descriptor will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * descriptor.
+   */
+  explicit basic_stream_descriptor(const executor_type& ex)
+    : basic_descriptor<Executor>(ex)
+  {
+  }
+
+  /// Construct a stream descriptor without opening it.
+  /**
+   * This constructor creates a stream descriptor without opening it. The
+   * descriptor needs to be opened and then connected or accepted before data
+   * can be sent or received on it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the descriptor will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the descriptor.
+   */
+  template <typename ExecutionContext>
+  explicit basic_stream_descriptor(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_descriptor<Executor>(context)
+  {
+  }
+
+  /// Construct a stream descriptor on an existing native descriptor.
+  /**
+   * This constructor creates a stream descriptor object to hold an existing
+   * native descriptor.
+   *
+   * @param ex The I/O executor that the descriptor will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * descriptor.
+   *
+   * @param native_descriptor The new underlying descriptor implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_stream_descriptor(const executor_type& ex,
+      const native_handle_type& native_descriptor)
+    : basic_descriptor<Executor>(ex, native_descriptor)
+  {
+  }
+
+  /// Construct a stream descriptor on an existing native descriptor.
+  /**
+   * This constructor creates a stream descriptor object to hold an existing
+   * native descriptor.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the descriptor will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the descriptor.
+   *
+   * @param native_descriptor The new underlying descriptor implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_stream_descriptor(ExecutionContext& context,
+      const native_handle_type& native_descriptor,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_descriptor<Executor>(context, native_descriptor)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a stream descriptor from another.
+  /**
+   * This constructor moves a stream descriptor from one object to another.
+   *
+   * @param other The other stream descriptor object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_stream_descriptor(const executor_type&)
+   * constructor.
+   */
+  basic_stream_descriptor(basic_stream_descriptor&& other)
+    : descriptor(std::move(other))
+  {
+  }
+
+  /// Move-assign a stream descriptor from another.
+  /**
+   * This assignment operator moves a stream descriptor from one object to
+   * another.
+   *
+   * @param other The other stream descriptor object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_stream_descriptor(const executor_type&)
+   * constructor.
+   */
+  basic_stream_descriptor& operator=(basic_stream_descriptor&& other)
+  {
+    descriptor::operator=(std::move(other));
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Write some data to the descriptor.
+  /**
+   * This function is used to write data to the stream descriptor. The function
+   * call will block until one or more bytes of the data has been written
+   * successfully, or until an error occurs.
+   *
+   * @param buffers One or more data buffers to be written to the descriptor.
+   *
+   * @returns The number of bytes written.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The write_some operation may not transmit all of the data to the
+   * peer. Consider using the @ref write function if you need to ensure that
+   * all data is written before the blocking operation completes.
+   *
+   * @par Example
+   * To write a single data buffer use the @ref buffer function as follows:
+   * @code
+   * descriptor.write_some(asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on writing multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().write_some(
+        this->impl_.get_implementation(), buffers, ec);
+    asio::detail::throw_error(ec, "write_some");
+    return s;
+  }
+
+  /// Write some data to the descriptor.
+  /**
+   * This function is used to write data to the stream descriptor. The function
+   * call will block until one or more bytes of the data has been written
+   * successfully, or until an error occurs.
+   *
+   * @param buffers One or more data buffers to be written to the descriptor.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes written. Returns 0 if an error occurred.
+   *
+   * @note The write_some operation may not transmit all of the data to the
+   * peer. Consider using the @ref write function if you need to ensure that
+   * all data is written before the blocking operation completes.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return this->impl_.get_service().write_some(
+        this->impl_.get_implementation(), buffers, ec);
+  }
+
+  /// Start an asynchronous write.
+  /**
+   * This function is used to asynchronously write data to the stream
+   * descriptor. The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be written to the descriptor.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the write operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes written.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The write operation may not transmit all of the data to the peer.
+   * Consider using the @ref async_write function if you need to ensure that all
+   * data is written before the asynchronous operation completes.
+   *
+   * @par Example
+   * To write a single data buffer use the @ref buffer function as follows:
+   * @code
+   * descriptor.async_write_some(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on writing multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_write_some(const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_write_some(this), handler, buffers);
+  }
+
+  /// Read some data from the descriptor.
+  /**
+   * This function is used to read data from the stream descriptor. The function
+   * call will block until one or more bytes of data has been read successfully,
+   * or until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   *
+   * @returns The number of bytes read.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that
+   * the requested amount of data is read before the blocking operation
+   * completes.
+   *
+   * @par Example
+   * To read into a single data buffer use the @ref buffer function as follows:
+   * @code
+   * descriptor.read_some(asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on reading into multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().read_some(
+        this->impl_.get_implementation(), buffers, ec);
+    asio::detail::throw_error(ec, "read_some");
+    return s;
+  }
+
+  /// Read some data from the descriptor.
+  /**
+   * This function is used to read data from the stream descriptor. The function
+   * call will block until one or more bytes of data has been read successfully,
+   * or until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes read. Returns 0 if an error occurred.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that
+   * the requested amount of data is read before the blocking operation
+   * completes.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return this->impl_.get_service().read_some(
+        this->impl_.get_implementation(), buffers, ec);
+  }
+
+  /// Start an asynchronous read.
+  /**
+   * This function is used to asynchronously read data from the stream
+   * descriptor. The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the read operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes read.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The read operation may not read all of the requested number of bytes.
+   * Consider using the @ref async_read function if you need to ensure that the
+   * requested amount of data is read before the asynchronous operation
+   * completes.
+   *
+   * @par Example
+   * To read into a single data buffer use the @ref buffer function as follows:
+   * @code
+   * descriptor.async_read_some(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on reading into multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_read_some(const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_read_some(this), handler, buffers);
+  }
+
+private:
+  class initiate_async_write_some
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_write_some(basic_stream_descriptor* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        const ConstBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      detail::non_const_lvalue<WriteHandler> handler2(handler);
+      self_->impl_.get_service().async_write_some(
+          self_->impl_.get_implementation(), buffers, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_stream_descriptor* self_;
+  };
+
+  class initiate_async_read_some
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_read_some(basic_stream_descriptor* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        const MutableBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      detail::non_const_lvalue<ReadHandler> handler2(handler);
+      self_->impl_.get_service().async_read_some(
+          self_->impl_.get_implementation(), buffers, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_stream_descriptor* self_;
+  };
+};
+
+} // namespace posix
+} // namespace asio
+
+#endif // defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_POSIX_BASIC_STREAM_DESCRIPTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/descriptor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/descriptor.hpp
new file mode 100644
index 00000000000..baefa136e8c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/descriptor.hpp
@@ -0,0 +1,37 @@
+//
+// posix/descriptor.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_POSIX_DESCRIPTOR_HPP
+#define ASIO_POSIX_DESCRIPTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/posix/basic_descriptor.hpp"
+
+namespace asio {
+namespace posix {
+
+/// Typedef for the typical usage of basic_descriptor.
+typedef basic_descriptor<> descriptor;
+
+} // namespace posix
+} // namespace asio
+
+#endif // defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR)
+       // || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_POSIX_DESCRIPTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/descriptor_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/descriptor_base.hpp
new file mode 100644
index 00000000000..feb00179758
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/descriptor_base.hpp
@@ -0,0 +1,90 @@
+//
+// posix/descriptor_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_POSIX_DESCRIPTOR_BASE_HPP
+#define ASIO_POSIX_DESCRIPTOR_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/detail/io_control.hpp"
+#include "asio/detail/socket_option.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace posix {
+
+/// The descriptor_base class is used as a base for the descriptor class as a
+/// place to define the associated IO control commands.
+class descriptor_base
+{
+public:
+  /// Wait types.
+  /**
+   * For use with descriptor::wait() and descriptor::async_wait().
+   */
+  enum wait_type
+  {
+    /// Wait for a descriptor to become ready to read.
+    wait_read,
+
+    /// Wait for a descriptor to become ready to write.
+    wait_write,
+
+    /// Wait for a descriptor to have error conditions pending.
+    wait_error
+  };
+
+  /// IO control command to get the amount of data that can be read without
+  /// blocking.
+  /**
+   * Implements the FIONREAD IO control command.
+   *
+   * @par Example
+   * @code
+   * asio::posix::stream_descriptor descriptor(my_context);
+   * ...
+   * asio::descriptor_base::bytes_readable command(true);
+   * descriptor.io_control(command);
+   * std::size_t bytes_readable = command.get();
+   * @endcode
+   *
+   * @par Concepts:
+   * IoControlCommand.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined bytes_readable;
+#else
+  typedef asio::detail::io_control::bytes_readable bytes_readable;
+#endif
+
+protected:
+  /// Protected destructor to prevent deletion through this type.
+  ~descriptor_base()
+  {
+  }
+};
+
+} // namespace posix
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_POSIX_DESCRIPTOR_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/stream_descriptor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/stream_descriptor.hpp
new file mode 100644
index 00000000000..cd68b603f8b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/posix/stream_descriptor.hpp
@@ -0,0 +1,37 @@
+//
+// posix/stream_descriptor.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_POSIX_STREAM_DESCRIPTOR_HPP
+#define ASIO_POSIX_STREAM_DESCRIPTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/posix/basic_stream_descriptor.hpp"
+
+namespace asio {
+namespace posix {
+
+/// Typedef for the typical usage of a stream-oriented descriptor.
+typedef basic_stream_descriptor<> stream_descriptor;
+
+} // namespace posix
+} // namespace asio
+
+#endif // defined(ASIO_HAS_POSIX_STREAM_DESCRIPTOR)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_POSIX_STREAM_DESCRIPTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/post.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/post.hpp
new file mode 100644
index 00000000000..bc19d80820b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/post.hpp
@@ -0,0 +1,123 @@
+//
+// post.hpp
+// ~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_POST_HPP
+#define ASIO_POST_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/async_result.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/is_executor.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Submits a completion token or function object for execution.
+/**
+ * This function submits an object for execution using the object's associated
+ * executor. The function object is queued for execution, and is never called
+ * from the current thread prior to returning from <tt>post()</tt>.
+ *
+ * The use of @c post(), rather than @ref defer(), indicates the caller's
+ * preference that the function object be eagerly queued for execution.
+ *
+ * This function has the following effects:
+ *
+ * @li Constructs a function object handler of type @c Handler, initialized
+ * with <tt>handler(forward<CompletionToken>(token))</tt>.
+ *
+ * @li Constructs an object @c result of type <tt>async_result<Handler></tt>,
+ * initializing the object as <tt>result(handler)</tt>.
+ *
+ * @li Obtains the handler's associated executor object @c ex by performing
+ * <tt>get_associated_executor(handler)</tt>.
+ *
+ * @li Obtains the handler's associated allocator object @c alloc by performing
+ * <tt>get_associated_allocator(handler)</tt>.
+ *
+ * @li Performs <tt>ex.post(std::move(handler), alloc)</tt>.
+ *
+ * @li Returns <tt>result.get()</tt>.
+ */
+template <ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) post(
+    ASIO_MOVE_ARG(CompletionToken) token);
+
+/// Submits a completion token or function object for execution.
+/**
+ * This function submits an object for execution using the specified executor.
+ * The function object is queued for execution, and is never called from the
+ * current thread prior to returning from <tt>post()</tt>.
+ *
+ * The use of @c post(), rather than @ref defer(), indicates the caller's
+ * preference that the function object be eagerly queued for execution.
+ *
+ * This function has the following effects:
+ *
+ * @li Constructs a function object handler of type @c Handler, initialized
+ * with <tt>handler(forward<CompletionToken>(token))</tt>.
+ *
+ * @li Constructs an object @c result of type <tt>async_result<Handler></tt>,
+ * initializing the object as <tt>result(handler)</tt>.
+ *
+ * @li Obtains the handler's associated executor object @c ex1 by performing
+ * <tt>get_associated_executor(handler)</tt>.
+ *
+ * @li Creates a work object @c w by performing <tt>make_work(ex1)</tt>.
+ *
+ * @li Obtains the handler's associated allocator object @c alloc by performing
+ * <tt>get_associated_allocator(handler)</tt>.
+ *
+ * @li Constructs a function object @c f with a function call operator that
+ * performs <tt>ex1.dispatch(std::move(handler), alloc)</tt> followed by
+ * <tt>w.reset()</tt>.
+ *
+ * @li Performs <tt>Executor(ex).post(std::move(f), alloc)</tt>.
+ *
+ * @li Returns <tt>result.get()</tt>.
+ */
+template <typename Executor,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken
+      ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(Executor)>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) post(
+    const Executor& ex,
+    ASIO_MOVE_ARG(CompletionToken) token
+      ASIO_DEFAULT_COMPLETION_TOKEN(Executor),
+    typename enable_if<is_executor<Executor>::value>::type* = 0);
+
+/// Submits a completion token or function object for execution.
+/**
+ * @returns <tt>post(ctx.get_executor(), forward<CompletionToken>(token))</tt>.
+ */
+template <typename ExecutionContext,
+    ASIO_COMPLETION_TOKEN_FOR(void()) CompletionToken
+      ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+        typename ExecutionContext::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(CompletionToken, void()) post(
+    ExecutionContext& ctx,
+    ASIO_MOVE_ARG(CompletionToken) token
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename ExecutionContext::executor_type),
+    typename enable_if<is_convertible<
+      ExecutionContext&, execution_context&>::value>::type* = 0);
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/post.hpp"
+
+#endif // ASIO_POST_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/read.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/read.hpp
new file mode 100644
index 00000000000..f06b01ea8fc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/read.hpp
@@ -0,0 +1,1288 @@
+//
+// read.hpp
+// ~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_READ_HPP
+#define ASIO_READ_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/async_result.hpp"
+#include "asio/buffer.hpp"
+#include "asio/error.hpp"
+
+#if !defined(ASIO_NO_EXTENSIONS)
+# include "asio/basic_streambuf_fwd.hpp"
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/**
+ * @defgroup read asio::read
+ *
+ * @brief The @c read function is a composed operation that reads a certain
+ * amount of data from a stream before returning.
+ */
+/*@{*/
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * stream.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @par Example
+ * To read into a single data buffer use the @ref buffer function as follows:
+ * @code asio::read(s, asio::buffer(data, size)); @endcode
+ * See the @ref buffer documentation for information on reading into multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read(
+ *     s, buffers,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncReadStream, typename MutableBufferSequence>
+std::size_t read(SyncReadStream& s, const MutableBufferSequence& buffers,
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type* = 0);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * stream.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @par Example
+ * To read into a single data buffer use the @ref buffer function as follows:
+ * @code asio::read(s, asio::buffer(data, size), ec); @endcode
+ * See the @ref buffer documentation for information on reading into multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read(
+ *     s, buffers,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncReadStream, typename MutableBufferSequence>
+std::size_t read(SyncReadStream& s, const MutableBufferSequence& buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type* = 0);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * stream.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's read_some function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @par Example
+ * To read into a single data buffer use the @ref buffer function as follows:
+ * @code asio::read(s, asio::buffer(data, size),
+ *     asio::transfer_at_least(32)); @endcode
+ * See the @ref buffer documentation for information on reading into multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ */
+template <typename SyncReadStream, typename MutableBufferSequence,
+  typename CompletionCondition>
+std::size_t read(SyncReadStream& s, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type* = 0);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * stream.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's read_some function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes read. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncReadStream, typename MutableBufferSequence,
+    typename CompletionCondition>
+std::size_t read(SyncReadStream& s, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The specified dynamic buffer sequence is full (that is, it has reached
+ * maximum size).
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read(
+ *     s, buffers,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+std::size_t read(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The supplied buffer is full (that is, it has reached maximum size).
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read(
+ *     s, buffers,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+std::size_t read(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The specified dynamic buffer sequence is full (that is, it has reached
+ * maximum size).
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's read_some function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v1,
+    typename CompletionCondition>
+std::size_t read(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The specified dynamic buffer sequence is full (that is, it has reached
+ * maximum size).
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's read_some function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes read. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v1,
+    typename CompletionCondition>
+std::size_t read(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The supplied buffer is full (that is, it has reached maximum size).
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b The basic_streambuf object into which the data will be read.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read(
+ *     s, b,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncReadStream, typename Allocator>
+std::size_t read(SyncReadStream& s, basic_streambuf<Allocator>& b);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The supplied buffer is full (that is, it has reached maximum size).
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b The basic_streambuf object into which the data will be read.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read(
+ *     s, b,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncReadStream, typename Allocator>
+std::size_t read(SyncReadStream& s, basic_streambuf<Allocator>& b,
+    asio::error_code& ec);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The supplied buffer is full (that is, it has reached maximum size).
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b The basic_streambuf object into which the data will be read.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's read_some function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ */
+template <typename SyncReadStream, typename Allocator,
+    typename CompletionCondition>
+std::size_t read(SyncReadStream& s, basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The supplied buffer is full (that is, it has reached maximum size).
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b The basic_streambuf object into which the data will be read.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's read_some function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes read. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncReadStream, typename Allocator,
+    typename CompletionCondition>
+std::size_t read(SyncReadStream& s, basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition, asio::error_code& ec);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The specified dynamic buffer sequence is full (that is, it has reached
+ * maximum size).
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read(
+ *     s, buffers,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+std::size_t read(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The supplied buffer is full (that is, it has reached maximum size).
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read(
+ *     s, buffers,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+std::size_t read(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The specified dynamic buffer sequence is full (that is, it has reached
+ * maximum size).
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's read_some function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v2,
+    typename CompletionCondition>
+std::size_t read(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Attempt to read a certain amount of data from a stream before returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * stream. The call will block until one of the following conditions is true:
+ *
+ * @li The specified dynamic buffer sequence is full (that is, it has reached
+ * maximum size).
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's read_some function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes read. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v2,
+    typename CompletionCondition>
+std::size_t read(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/*@}*/
+/**
+ * @defgroup async_read asio::async_read
+ *
+ * @brief The @c async_read function is a composed asynchronous operation that
+ * reads a certain amount of data from a stream before completion.
+ */
+/*@{*/
+
+/// Start an asynchronous operation to read a certain amount of data from a
+/// stream.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions is
+ * true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other read operations (such
+ * as async_read, the stream's async_read_some function, or any other composed
+ * operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * stream. Although the buffers object may be copied as necessary, ownership of
+ * the underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes copied into the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be the  number of
+ *                                           // bytes successfully transferred
+ *                                           // prior to the error.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * To read into a single data buffer use the @ref buffer function as follows:
+ * @code
+ * asio::async_read(s, asio::buffer(data, size), handler);
+ * @endcode
+ * See the @ref buffer documentation for information on reading into multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::async_read(
+ *     s, buffers,
+ *     asio::transfer_all(),
+ *     handler); @endcode
+ */
+template <typename AsyncReadStream, typename MutableBufferSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, const MutableBufferSequence& buffers,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type* = 0);
+
+/// Start an asynchronous operation to read a certain amount of data from a
+/// stream.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions is
+ * true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * stream. Although the buffers object may be copied as necessary, ownership of
+ * the underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's async_read_some function.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes copied into the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be the  number of
+ *                                           // bytes successfully transferred
+ *                                           // prior to the error.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * To read into a single data buffer use the @ref buffer function as follows:
+ * @code asio::async_read(s,
+ *     asio::buffer(data, size),
+ *     asio::transfer_at_least(32),
+ *     handler); @endcode
+ * See the @ref buffer documentation for information on reading into multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ */
+template <typename AsyncReadStream,
+    typename MutableBufferSequence, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_mutable_buffer_sequence<MutableBufferSequence>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Start an asynchronous operation to read a certain amount of data from a
+/// stream.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions is
+ * true:
+ *
+ * @li The specified dynamic buffer sequence is full (that is, it has reached
+ * maximum size).
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other read operations (such
+ * as async_read, the stream's async_read_some function, or any other composed
+ * operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes copied into the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be the  number of
+ *                                           // bytes successfully transferred
+ *                                           // prior to the error.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::async_read(
+ *     s, buffers,
+ *     asio::transfer_all(),
+ *     handler); @endcode
+ */
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Start an asynchronous operation to read a certain amount of data from a
+/// stream.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions is
+ * true:
+ *
+ * @li The specified dynamic buffer sequence is full (that is, it has reached
+ * maximum size).
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other read operations (such
+ * as async_read, the stream's async_read_some function, or any other composed
+ * operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's async_read_some function.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes copied into the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be the  number of
+ *                                           // bytes successfully transferred
+ *                                           // prior to the error.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncReadStream,
+    typename DynamicBuffer_v1, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Start an asynchronous operation to read a certain amount of data from a
+/// stream.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions is
+ * true:
+ *
+ * @li The supplied buffer is full (that is, it has reached maximum size).
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other read operations (such
+ * as async_read, the stream's async_read_some function, or any other composed
+ * operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param b A basic_streambuf object into which the data will be read. Ownership
+ * of the streambuf is retained by the caller, which must guarantee that it
+ * remains valid until the handler is called.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes copied into the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be the  number of
+ *                                           // bytes successfully transferred
+ *                                           // prior to the error.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::async_read(
+ *     s, b,
+ *     asio::transfer_all(),
+ *     handler); @endcode
+ */
+template <typename AsyncReadStream, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, basic_streambuf<Allocator>& b,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type));
+
+/// Start an asynchronous operation to read a certain amount of data from a
+/// stream.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions is
+ * true:
+ *
+ * @li The supplied buffer is full (that is, it has reached maximum size).
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other read operations (such
+ * as async_read, the stream's async_read_some function, or any other composed
+ * operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param b A basic_streambuf object into which the data will be read. Ownership
+ * of the streambuf is retained by the caller, which must guarantee that it
+ * remains valid until the handler is called.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's async_read_some function.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes copied into the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be the  number of
+ *                                           // bytes successfully transferred
+ *                                           // prior to the error.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncReadStream,
+    typename Allocator, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type));
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Start an asynchronous operation to read a certain amount of data from a
+/// stream.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions is
+ * true:
+ *
+ * @li The specified dynamic buffer sequence is full (that is, it has reached
+ * maximum size).
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other read operations (such
+ * as async_read, the stream's async_read_some function, or any other composed
+ * operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes copied into the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be the  number of
+ *                                           // bytes successfully transferred
+ *                                           // prior to the error.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::async_read(
+ *     s, buffers,
+ *     asio::transfer_all(),
+ *     handler); @endcode
+ */
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, DynamicBuffer_v2 buffers,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Start an asynchronous operation to read a certain amount of data from a
+/// stream.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions is
+ * true:
+ *
+ * @li The specified dynamic buffer sequence is full (that is, it has reached
+ * maximum size).
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other read operations (such
+ * as async_read, the stream's async_read_some function, or any other composed
+ * operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_read_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the stream's async_read_some function.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes copied into the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be the  number of
+ *                                           // bytes successfully transferred
+ *                                           // prior to the error.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncReadStream,
+    typename DynamicBuffer_v2, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read(AsyncReadStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/*@}*/
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/read.hpp"
+
+#endif // ASIO_READ_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/read_at.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/read_at.hpp
new file mode 100644
index 00000000000..b729d10159e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/read_at.hpp
@@ -0,0 +1,694 @@
+//
+// read_at.hpp
+// ~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_READ_AT_HPP
+#define ASIO_READ_AT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/async_result.hpp"
+#include "asio/detail/cstdint.hpp"
+#include "asio/error.hpp"
+
+#if !defined(ASIO_NO_EXTENSIONS)
+# include "asio/basic_streambuf_fwd.hpp"
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/**
+ * @defgroup read_at asio::read_at
+ *
+ * @brief The @c read_at function is a composed operation that reads a certain
+ * amount of data at the specified offset before returning.
+ */
+/*@{*/
+
+/// Attempt to read a certain amount of data at the specified offset before
+/// returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * random access device at the specified offset. The call will block until one
+ * of the following conditions is true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * read_some_at function.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the SyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * device.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @par Example
+ * To read into a single data buffer use the @ref buffer function as follows:
+ * @code asio::read_at(d, 42, asio::buffer(data, size)); @endcode
+ * See the @ref buffer documentation for information on reading into multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read_at(
+ *     d, 42, buffers,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncRandomAccessReadDevice, typename MutableBufferSequence>
+std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, const MutableBufferSequence& buffers);
+
+/// Attempt to read a certain amount of data at the specified offset before
+/// returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * random access device at the specified offset. The call will block until one
+ * of the following conditions is true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * read_some_at function.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the SyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * device.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @par Example
+ * To read into a single data buffer use the @ref buffer function as follows:
+ * @code asio::read_at(d, 42,
+ *     asio::buffer(data, size), ec); @endcode
+ * See the @ref buffer documentation for information on reading into multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read_at(
+ *     d, 42, buffers,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncRandomAccessReadDevice, typename MutableBufferSequence>
+std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, const MutableBufferSequence& buffers,
+    asio::error_code& ec);
+
+/// Attempt to read a certain amount of data at the specified offset before
+/// returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * random access device at the specified offset. The call will block until one
+ * of the following conditions is true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * read_some_at function.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the SyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * device.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the device's read_some_at function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @par Example
+ * To read into a single data buffer use the @ref buffer function as follows:
+ * @code asio::read_at(d, 42, asio::buffer(data, size),
+ *     asio::transfer_at_least(32)); @endcode
+ * See the @ref buffer documentation for information on reading into multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ */
+template <typename SyncRandomAccessReadDevice, typename MutableBufferSequence,
+    typename CompletionCondition>
+std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition);
+
+/// Attempt to read a certain amount of data at the specified offset before
+/// returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * random access device at the specified offset. The call will block until one
+ * of the following conditions is true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * read_some_at function.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the SyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * device.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the device's read_some_at function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes read. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncRandomAccessReadDevice, typename MutableBufferSequence,
+    typename CompletionCondition>
+std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition, asio::error_code& ec);
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Attempt to read a certain amount of data at the specified offset before
+/// returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * random access device at the specified offset. The call will block until one
+ * of the following conditions is true:
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * read_some_at function.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the SyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param b The basic_streambuf object into which the data will be read.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read_at(
+ *     d, 42, b,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncRandomAccessReadDevice, typename Allocator>
+std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, basic_streambuf<Allocator>& b);
+
+/// Attempt to read a certain amount of data at the specified offset before
+/// returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * random access device at the specified offset. The call will block until one
+ * of the following conditions is true:
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * read_some_at function.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the SyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param b The basic_streambuf object into which the data will be read.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::read_at(
+ *     d, 42, b,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncRandomAccessReadDevice, typename Allocator>
+std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, basic_streambuf<Allocator>& b,
+    asio::error_code& ec);
+
+/// Attempt to read a certain amount of data at the specified offset before
+/// returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * random access device at the specified offset. The call will block until one
+ * of the following conditions is true:
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * read_some_at function.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the SyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param b The basic_streambuf object into which the data will be read.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the device's read_some_at function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ */
+template <typename SyncRandomAccessReadDevice, typename Allocator,
+    typename CompletionCondition>
+std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition);
+
+/// Attempt to read a certain amount of data at the specified offset before
+/// returning.
+/**
+ * This function is used to read a certain number of bytes of data from a
+ * random access device at the specified offset. The call will block until one
+ * of the following conditions is true:
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * read_some_at function.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the SyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param b The basic_streambuf object into which the data will be read.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest read_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the device's read_some_at function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes read. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncRandomAccessReadDevice, typename Allocator,
+    typename CompletionCondition>
+std::size_t read_at(SyncRandomAccessReadDevice& d,
+    uint64_t offset, basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition, asio::error_code& ec);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+/*@}*/
+/**
+ * @defgroup async_read_at asio::async_read_at
+ *
+ * @brief The @c async_read_at function is a composed asynchronous operation
+ * that reads a certain amount of data at the specified offset.
+ */
+/*@{*/
+
+/// Start an asynchronous operation to read a certain amount of data at the
+/// specified offset.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a random access device at the specified offset. The function call
+ * always returns immediately. The asynchronous operation will continue until
+ * one of the following conditions is true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * async_read_some_at function.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the AsyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * device. Although the buffers object may be copied as necessary, ownership of
+ * the underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes copied into the buffers. If an error
+ *   // occurred, this will be the number of bytes successfully
+ *   // transferred prior to the error.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * To read into a single data buffer use the @ref buffer function as follows:
+ * @code
+ * asio::async_read_at(d, 42, asio::buffer(data, size), handler);
+ * @endcode
+ * See the @ref buffer documentation for information on reading into multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::async_read_at(
+ *     d, 42, buffers,
+ *     asio::transfer_all(),
+ *     handler); @endcode
+ */
+template <typename AsyncRandomAccessReadDevice, typename MutableBufferSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncRandomAccessReadDevice::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_at(AsyncRandomAccessReadDevice& d, uint64_t offset,
+    const MutableBufferSequence& buffers,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncRandomAccessReadDevice::executor_type));
+
+/// Start an asynchronous operation to read a certain amount of data at the
+/// specified offset.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a random access device at the specified offset. The function call
+ * always returns immediately. The asynchronous operation will continue until
+ * one of the following conditions is true:
+ *
+ * @li The supplied buffers are full. That is, the bytes transferred is equal to
+ * the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the AsyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param buffers One or more buffers into which the data will be read. The sum
+ * of the buffer sizes indicates the maximum number of bytes to read from the
+ * device. Although the buffers object may be copied as necessary, ownership of
+ * the underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_read_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the device's async_read_some_at function.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes copied into the buffers. If an error
+ *   // occurred, this will be the number of bytes successfully
+ *   // transferred prior to the error.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * To read into a single data buffer use the @ref buffer function as follows:
+ * @code asio::async_read_at(d, 42,
+ *     asio::buffer(data, size),
+ *     asio::transfer_at_least(32),
+ *     handler); @endcode
+ * See the @ref buffer documentation for information on reading into multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ */
+template <typename AsyncRandomAccessReadDevice,
+    typename MutableBufferSequence, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncRandomAccessReadDevice::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_at(AsyncRandomAccessReadDevice& d,
+    uint64_t offset, const MutableBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncRandomAccessReadDevice::executor_type));
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Start an asynchronous operation to read a certain amount of data at the
+/// specified offset.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a random access device at the specified offset. The function call
+ * always returns immediately. The asynchronous operation will continue until
+ * one of the following conditions is true:
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * async_read_some_at function.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the AsyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param b A basic_streambuf object into which the data will be read. Ownership
+ * of the streambuf is retained by the caller, which must guarantee that it
+ * remains valid until the handler is called.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes copied into the buffers. If an error
+ *   // occurred, this will be the number of bytes successfully
+ *   // transferred prior to the error.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::async_read_at(
+ *     d, 42, b,
+ *     asio::transfer_all(),
+ *     handler); @endcode
+ */
+template <typename AsyncRandomAccessReadDevice, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncRandomAccessReadDevice::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_at(AsyncRandomAccessReadDevice& d,
+    uint64_t offset, basic_streambuf<Allocator>& b,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncRandomAccessReadDevice::executor_type));
+
+/// Start an asynchronous operation to read a certain amount of data at the
+/// specified offset.
+/**
+ * This function is used to asynchronously read a certain number of bytes of
+ * data from a random access device at the specified offset. The function call
+ * always returns immediately. The asynchronous operation will continue until
+ * one of the following conditions is true:
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * async_read_some_at function.
+ *
+ * @param d The device from which the data is to be read. The type must support
+ * the AsyncRandomAccessReadDevice concept.
+ *
+ * @param offset The offset at which the data will be read.
+ *
+ * @param b A basic_streambuf object into which the data will be read. Ownership
+ * of the streambuf is retained by the caller, which must guarantee that it
+ * remains valid until the handler is called.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the read operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_read_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the read operation is complete. A non-zero
+ * return value indicates the maximum number of bytes to be read on the next
+ * call to the device's async_read_some_at function.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes copied into the buffers. If an error
+ *   // occurred, this will be the number of bytes successfully
+ *   // transferred prior to the error.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncRandomAccessReadDevice,
+    typename Allocator, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncRandomAccessReadDevice::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_at(AsyncRandomAccessReadDevice& d,
+    uint64_t offset, basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncRandomAccessReadDevice::executor_type));
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+/*@}*/
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/read_at.hpp"
+
+#endif // ASIO_READ_AT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/read_until.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/read_until.hpp
new file mode 100644
index 00000000000..6d09d1ce410
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/read_until.hpp
@@ -0,0 +1,2863 @@
+//
+// read_until.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_READ_UNTIL_HPP
+#define ASIO_READ_UNTIL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include <string>
+#include "asio/async_result.hpp"
+#include "asio/buffer.hpp"
+#include "asio/detail/regex_fwd.hpp"
+#include "asio/detail/string_view.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error.hpp"
+
+#if !defined(ASIO_NO_EXTENSIONS)
+# include "asio/basic_streambuf_fwd.hpp"
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+namespace detail
+{
+  char (&has_result_type_helper(...))[2];
+
+  template <typename T>
+  char has_result_type_helper(T*, typename T::result_type* = 0);
+
+  template <typename T>
+  struct has_result_type
+  {
+    enum { value = (sizeof((has_result_type_helper)((T*)(0))) == 1) };
+  };
+} // namespace detail
+
+/// Type trait used to determine whether a type can be used as a match condition
+/// function with read_until and async_read_until.
+template <typename T>
+struct is_match_condition
+{
+#if defined(GENERATING_DOCUMENTATION)
+  /// The value member is true if the type may be used as a match condition.
+  static const bool value;
+#else
+  enum
+  {
+    value = asio::is_function<
+        typename asio::remove_pointer<T>::type>::value
+      || detail::has_result_type<T>::value
+  };
+#endif
+};
+
+/**
+ * @defgroup read_until asio::read_until
+ *
+ * @brief The @c read_until function is a composed operation that reads data
+ * into a dynamic buffer sequence, or into a streambuf, until it contains a
+ * delimiter, matches a regular expression, or a function object indicates a
+ * match.
+ */
+/*@{*/
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Read data into a dynamic buffer sequence until it contains a specified
+/// delimiter.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains the specified
+ * delimiter. The call will block until one of the following conditions is
+ * true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains the delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param delim The delimiter character.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the delimiter.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond the delimiter. An application will
+ * typically leave that data in the dynamic buffer sequence for a subsequent
+ * read_until operation to examine.
+ *
+ * @par Example
+ * To read data into a @c std::string until a newline is encountered:
+ * @code std::string data;
+ * std::string n = asio::read_until(s,
+ *     asio::dynamic_buffer(data), '\n');
+ * std::string line = data.substr(0, n);
+ * data.erase(0, n); @endcode
+ * After the @c read_until operation completes successfully, the string @c data
+ * contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the
+ * delimiter, so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the buffer @c b as
+ * follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c read_until operation.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers, char delim,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Read data into a dynamic buffer sequence until it contains a specified
+/// delimiter.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains the specified
+ * delimiter. The call will block until one of the following conditions is
+ * true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains the delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param delim The delimiter character.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the delimiter. Returns 0 if an error occurred.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond the delimiter. An application will
+ * typically leave that data in the dynamic buffer sequence for a subsequent
+ * read_until operation to examine.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    char delim, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Read data into a dynamic buffer sequence until it contains a specified
+/// delimiter.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains the specified
+ * delimiter. The call will block until one of the following conditions is
+ * true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains the delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param delim The delimiter string.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the delimiter.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond the delimiter. An application will
+ * typically leave that data in the dynamic buffer sequence for a subsequent
+ * read_until operation to examine.
+ *
+ * @par Example
+ * To read data into a @c std::string until a CR-LF sequence is encountered:
+ * @code std::string data;
+ * std::string n = asio::read_until(s,
+ *     asio::dynamic_buffer(data), "\r\n");
+ * std::string line = data.substr(0, n);
+ * data.erase(0, n); @endcode
+ * After the @c read_until operation completes successfully, the string @c data
+ * contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the
+ * delimiter, so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the buffer @c b as
+ * follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c read_until operation.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    ASIO_STRING_VIEW_PARAM delim,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Read data into a dynamic buffer sequence until it contains a specified
+/// delimiter.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains the specified
+ * delimiter. The call will block until one of the following conditions is
+ * true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains the delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param delim The delimiter string.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the delimiter. Returns 0 if an error occurred.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond the delimiter. An application will
+ * typically leave that data in the dynamic buffer sequence for a subsequent
+ * read_until operation to examine.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    ASIO_STRING_VIEW_PARAM delim,
+    asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if defined(ASIO_HAS_BOOST_REGEX) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Read data into a dynamic buffer sequence until some part of the data it
+/// contains matches a regular expression.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains some data
+ * that matches a regular expression. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li A substring of the dynamic buffer sequence's get area matches the
+ * regular expression.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains data that matches the regular expression, the function returns
+ * immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers A dynamic buffer sequence into which the data will be read.
+ *
+ * @param expr The regular expression.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the substring that matches the regular expression.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond that which matched the regular
+ * expression. An application will typically leave that data in the dynamic
+ * buffer sequence for a subsequent read_until operation to examine.
+ *
+ * @par Example
+ * To read data into a @c std::string until a CR-LF sequence is encountered:
+ * @code std::string data;
+ * std::string n = asio::read_until(s,
+ *     asio::dynamic_buffer(data), boost::regex("\r\n"));
+ * std::string line = data.substr(0, n);
+ * data.erase(0, n); @endcode
+ * After the @c read_until operation completes successfully, the string @c data
+ * contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the
+ * delimiter, so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the buffer @c b as
+ * follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c read_until operation.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    const boost::regex& expr,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Read data into a dynamic buffer sequence until some part of the data it
+/// contains matches a regular expression.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains some data
+ * that matches a regular expression. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li A substring of the dynamic buffer sequence's get area matches the
+ * regular expression.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains data that matches the regular expression, the function returns
+ * immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers A dynamic buffer sequence into which the data will be read.
+ *
+ * @param expr The regular expression.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the substring that matches the regular expression. Returns 0
+ * if an error occurred.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond that which matched the regular
+ * expression. An application will typically leave that data in the dynamic
+ * buffer sequence for a subsequent read_until operation to examine.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v1>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    const boost::regex& expr, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+       // || defined(GENERATING_DOCUMENTATION)
+
+/// Read data into a dynamic buffer sequence until a function object indicates a
+/// match.
+
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until a user-defined match condition function object, when applied
+ * to the data contained in the dynamic buffer sequence, indicates a successful
+ * match. The call will block until one of the following conditions is true:
+ *
+ * @li The match condition function object returns a std::pair where the second
+ * element evaluates to true.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the match condition function object already indicates
+ * a match, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers A dynamic buffer sequence into which the data will be read.
+ *
+ * @param match_condition The function object to be called to determine whether
+ * a match exists. The signature of the function object must be:
+ * @code pair<iterator, bool> match_condition(iterator begin, iterator end);
+ * @endcode
+ * where @c iterator represents the type:
+ * @code buffers_iterator<typename DynamicBuffer_v1::const_buffers_type>
+ * @endcode
+ * The iterator parameters @c begin and @c end define the range of bytes to be
+ * scanned to determine whether there is a match. The @c first member of the
+ * return value is an iterator marking one-past-the-end of the bytes that have
+ * been consumed by the match function. This iterator is used to calculate the
+ * @c begin parameter for any subsequent invocation of the match condition. The
+ * @c second member of the return value is true if a match has been found, false
+ * otherwise.
+ *
+ * @returns The number of bytes in the dynamic_buffer's get area that
+ * have been fully consumed by the match function.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond that which matched the function object.
+ * An application will typically leave that data in the dynamic buffer sequence
+ * for a subsequent read_until operation to examine.
+
+ * @note The default implementation of the @c is_match_condition type trait
+ * evaluates to true for function pointers and function objects with a
+ * @c result_type typedef. It must be specialised for other user-defined
+ * function objects.
+ *
+ * @par Examples
+ * To read data into a dynamic buffer sequence until whitespace is encountered:
+ * @code typedef asio::buffers_iterator<
+ *     asio::const_buffers_1> iterator;
+ *
+ * std::pair<iterator, bool>
+ * match_whitespace(iterator begin, iterator end)
+ * {
+ *   iterator i = begin;
+ *   while (i != end)
+ *     if (std::isspace(*i++))
+ *       return std::make_pair(i, true);
+ *   return std::make_pair(i, false);
+ * }
+ * ...
+ * std::string data;
+ * asio::read_until(s, data, match_whitespace);
+ * @endcode
+ *
+ * To read data into a @c std::string until a matching character is found:
+ * @code class match_char
+ * {
+ * public:
+ *   explicit match_char(char c) : c_(c) {}
+ *
+ *   template <typename Iterator>
+ *   std::pair<Iterator, bool> operator()(
+ *       Iterator begin, Iterator end) const
+ *   {
+ *     Iterator i = begin;
+ *     while (i != end)
+ *       if (c_ == *i++)
+ *         return std::make_pair(i, true);
+ *     return std::make_pair(i, false);
+ *   }
+ *
+ * private:
+ *   char c_;
+ * };
+ *
+ * namespace asio {
+ *   template <> struct is_match_condition<match_char>
+ *     : public boost::true_type {};
+ * } // namespace asio
+ * ...
+ * std::string data;
+ * asio::read_until(s, data, match_char('a'));
+ * @endcode
+ */
+template <typename SyncReadStream,
+    typename DynamicBuffer_v1, typename MatchCondition>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    MatchCondition match_condition,
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Read data into a dynamic buffer sequence until a function object indicates a
+/// match.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until a user-defined match condition function object, when applied
+ * to the data contained in the dynamic buffer sequence, indicates a successful
+ * match. The call will block until one of the following conditions is true:
+ *
+ * @li The match condition function object returns a std::pair where the second
+ * element evaluates to true.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the match condition function object already indicates
+ * a match, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers A dynamic buffer sequence into which the data will be read.
+ *
+ * @param match_condition The function object to be called to determine whether
+ * a match exists. The signature of the function object must be:
+ * @code pair<iterator, bool> match_condition(iterator begin, iterator end);
+ * @endcode
+ * where @c iterator represents the type:
+ * @code buffers_iterator<DynamicBuffer_v1::const_buffers_type>
+ * @endcode
+ * The iterator parameters @c begin and @c end define the range of bytes to be
+ * scanned to determine whether there is a match. The @c first member of the
+ * return value is an iterator marking one-past-the-end of the bytes that have
+ * been consumed by the match function. This iterator is used to calculate the
+ * @c begin parameter for any subsequent invocation of the match condition. The
+ * @c second member of the return value is true if a match has been found, false
+ * otherwise.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area that
+ * have been fully consumed by the match function. Returns 0 if an error
+ * occurred.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond that which matched the function object.
+ * An application will typically leave that data in the dynamic buffer sequence
+ * for a subsequent read_until operation to examine.
+ *
+ * @note The default implementation of the @c is_match_condition type trait
+ * evaluates to true for function pointers and function objects with a
+ * @c result_type typedef. It must be specialised for other user-defined
+ * function objects.
+ */
+template <typename SyncReadStream,
+    typename DynamicBuffer_v1, typename MatchCondition>
+std::size_t read_until(SyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    MatchCondition match_condition, asio::error_code& ec,
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Read data into a streambuf until it contains a specified delimiter.
+/**
+ * This function is used to read data into the specified streambuf until the
+ * streambuf's get area contains the specified delimiter. The call will block
+ * until one of the following conditions is true:
+ *
+ * @li The get area of the streambuf contains the specified delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the streambuf's get area already contains the
+ * delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read.
+ *
+ * @param delim The delimiter character.
+ *
+ * @returns The number of bytes in the streambuf's get area up to and including
+ * the delimiter.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note After a successful read_until operation, the streambuf may contain
+ * additional data beyond the delimiter. An application will typically leave
+ * that data in the streambuf for a subsequent read_until operation to examine.
+ *
+ * @par Example
+ * To read data into a streambuf until a newline is encountered:
+ * @code asio::streambuf b;
+ * asio::read_until(s, b, '\n');
+ * std::istream is(&b);
+ * std::string line;
+ * std::getline(is, line); @endcode
+ * After the @c read_until operation completes successfully, the buffer @c b
+ * contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\n', 'd', 'e', ... } @endcode
+ * The call to @c std::getline then extracts the data up to and including the
+ * newline (which is discarded), so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c' } @endcode
+ * The remaining data is left in the buffer @c b as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c read_until operation.
+ */
+template <typename SyncReadStream, typename Allocator>
+std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, char delim);
+
+/// Read data into a streambuf until it contains a specified delimiter.
+/**
+ * This function is used to read data into the specified streambuf until the
+ * streambuf's get area contains the specified delimiter. The call will block
+ * until one of the following conditions is true:
+ *
+ * @li The get area of the streambuf contains the specified delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the streambuf's get area already contains the
+ * delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read.
+ *
+ * @param delim The delimiter character.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the streambuf's get area up to and including
+ * the delimiter. Returns 0 if an error occurred.
+ *
+ * @note After a successful read_until operation, the streambuf may contain
+ * additional data beyond the delimiter. An application will typically leave
+ * that data in the streambuf for a subsequent read_until operation to examine.
+ */
+template <typename SyncReadStream, typename Allocator>
+std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, char delim,
+    asio::error_code& ec);
+
+/// Read data into a streambuf until it contains a specified delimiter.
+/**
+ * This function is used to read data into the specified streambuf until the
+ * streambuf's get area contains the specified delimiter. The call will block
+ * until one of the following conditions is true:
+ *
+ * @li The get area of the streambuf contains the specified delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the streambuf's get area already contains the
+ * delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read.
+ *
+ * @param delim The delimiter string.
+ *
+ * @returns The number of bytes in the streambuf's get area up to and including
+ * the delimiter.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note After a successful read_until operation, the streambuf may contain
+ * additional data beyond the delimiter. An application will typically leave
+ * that data in the streambuf for a subsequent read_until operation to examine.
+ *
+ * @par Example
+ * To read data into a streambuf until a newline is encountered:
+ * @code asio::streambuf b;
+ * asio::read_until(s, b, "\r\n");
+ * std::istream is(&b);
+ * std::string line;
+ * std::getline(is, line); @endcode
+ * After the @c read_until operation completes successfully, the buffer @c b
+ * contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c std::getline then extracts the data up to and including the
+ * newline (which is discarded), so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r' } @endcode
+ * The remaining data is left in the buffer @c b as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c read_until operation.
+ */
+template <typename SyncReadStream, typename Allocator>
+std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    ASIO_STRING_VIEW_PARAM delim);
+
+/// Read data into a streambuf until it contains a specified delimiter.
+/**
+ * This function is used to read data into the specified streambuf until the
+ * streambuf's get area contains the specified delimiter. The call will block
+ * until one of the following conditions is true:
+ *
+ * @li The get area of the streambuf contains the specified delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the streambuf's get area already contains the
+ * delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read.
+ *
+ * @param delim The delimiter string.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the streambuf's get area up to and including
+ * the delimiter. Returns 0 if an error occurred.
+ *
+ * @note After a successful read_until operation, the streambuf may contain
+ * additional data beyond the delimiter. An application will typically leave
+ * that data in the streambuf for a subsequent read_until operation to examine.
+ */
+template <typename SyncReadStream, typename Allocator>
+std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    ASIO_STRING_VIEW_PARAM delim, asio::error_code& ec);
+
+#if defined(ASIO_HAS_BOOST_REGEX) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Read data into a streambuf until some part of the data it contains matches
+/// a regular expression.
+/**
+ * This function is used to read data into the specified streambuf until the
+ * streambuf's get area contains some data that matches a regular expression.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li A substring of the streambuf's get area matches the regular expression.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the streambuf's get area already contains data that
+ * matches the regular expression, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read.
+ *
+ * @param expr The regular expression.
+ *
+ * @returns The number of bytes in the streambuf's get area up to and including
+ * the substring that matches the regular expression.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note After a successful read_until operation, the streambuf may contain
+ * additional data beyond that which matched the regular expression. An
+ * application will typically leave that data in the streambuf for a subsequent
+ * read_until operation to examine.
+ *
+ * @par Example
+ * To read data into a streambuf until a CR-LF sequence is encountered:
+ * @code asio::streambuf b;
+ * asio::read_until(s, b, boost::regex("\r\n"));
+ * std::istream is(&b);
+ * std::string line;
+ * std::getline(is, line); @endcode
+ * After the @c read_until operation completes successfully, the buffer @c b
+ * contains the data which matched the regular expression:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c std::getline then extracts the data up to and including the
+ * newline (which is discarded), so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r' } @endcode
+ * The remaining data is left in the buffer @c b as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c read_until operation.
+ */
+template <typename SyncReadStream, typename Allocator>
+std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, const boost::regex& expr);
+
+/// Read data into a streambuf until some part of the data it contains matches
+/// a regular expression.
+/**
+ * This function is used to read data into the specified streambuf until the
+ * streambuf's get area contains some data that matches a regular expression.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li A substring of the streambuf's get area matches the regular expression.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the streambuf's get area already contains data that
+ * matches the regular expression, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read.
+ *
+ * @param expr The regular expression.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the streambuf's get area up to and including
+ * the substring that matches the regular expression. Returns 0 if an error
+ * occurred.
+ *
+ * @note After a successful read_until operation, the streambuf may contain
+ * additional data beyond that which matched the regular expression. An
+ * application will typically leave that data in the streambuf for a subsequent
+ * read_until operation to examine.
+ */
+template <typename SyncReadStream, typename Allocator>
+std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, const boost::regex& expr,
+    asio::error_code& ec);
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+       // || defined(GENERATING_DOCUMENTATION)
+
+/// Read data into a streambuf until a function object indicates a match.
+/**
+ * This function is used to read data into the specified streambuf until a
+ * user-defined match condition function object, when applied to the data
+ * contained in the streambuf, indicates a successful match. The call will
+ * block until one of the following conditions is true:
+ *
+ * @li The match condition function object returns a std::pair where the second
+ * element evaluates to true.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the match condition function object already indicates
+ * a match, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read.
+ *
+ * @param match_condition The function object to be called to determine whether
+ * a match exists. The signature of the function object must be:
+ * @code pair<iterator, bool> match_condition(iterator begin, iterator end);
+ * @endcode
+ * where @c iterator represents the type:
+ * @code buffers_iterator<basic_streambuf<Allocator>::const_buffers_type>
+ * @endcode
+ * The iterator parameters @c begin and @c end define the range of bytes to be
+ * scanned to determine whether there is a match. The @c first member of the
+ * return value is an iterator marking one-past-the-end of the bytes that have
+ * been consumed by the match function. This iterator is used to calculate the
+ * @c begin parameter for any subsequent invocation of the match condition. The
+ * @c second member of the return value is true if a match has been found, false
+ * otherwise.
+ *
+ * @returns The number of bytes in the streambuf's get area that have been fully
+ * consumed by the match function.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note After a successful read_until operation, the streambuf may contain
+ * additional data beyond that which matched the function object. An application
+ * will typically leave that data in the streambuf for a subsequent read_until
+ * operation to examine.
+ *
+ * @note The default implementation of the @c is_match_condition type trait
+ * evaluates to true for function pointers and function objects with a
+ * @c result_type typedef. It must be specialised for other user-defined
+ * function objects.
+ *
+ * @par Examples
+ * To read data into a streambuf until whitespace is encountered:
+ * @code typedef asio::buffers_iterator<
+ *     asio::streambuf::const_buffers_type> iterator;
+ *
+ * std::pair<iterator, bool>
+ * match_whitespace(iterator begin, iterator end)
+ * {
+ *   iterator i = begin;
+ *   while (i != end)
+ *     if (std::isspace(*i++))
+ *       return std::make_pair(i, true);
+ *   return std::make_pair(i, false);
+ * }
+ * ...
+ * asio::streambuf b;
+ * asio::read_until(s, b, match_whitespace);
+ * @endcode
+ *
+ * To read data into a streambuf until a matching character is found:
+ * @code class match_char
+ * {
+ * public:
+ *   explicit match_char(char c) : c_(c) {}
+ *
+ *   template <typename Iterator>
+ *   std::pair<Iterator, bool> operator()(
+ *       Iterator begin, Iterator end) const
+ *   {
+ *     Iterator i = begin;
+ *     while (i != end)
+ *       if (c_ == *i++)
+ *         return std::make_pair(i, true);
+ *     return std::make_pair(i, false);
+ *   }
+ *
+ * private:
+ *   char c_;
+ * };
+ *
+ * namespace asio {
+ *   template <> struct is_match_condition<match_char>
+ *     : public boost::true_type {};
+ * } // namespace asio
+ * ...
+ * asio::streambuf b;
+ * asio::read_until(s, b, match_char('a'));
+ * @endcode
+ */
+template <typename SyncReadStream, typename Allocator, typename MatchCondition>
+std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, MatchCondition match_condition,
+    typename enable_if<is_match_condition<MatchCondition>::value>::type* = 0);
+
+/// Read data into a streambuf until a function object indicates a match.
+/**
+ * This function is used to read data into the specified streambuf until a
+ * user-defined match condition function object, when applied to the data
+ * contained in the streambuf, indicates a successful match. The call will
+ * block until one of the following conditions is true:
+ *
+ * @li The match condition function object returns a std::pair where the second
+ * element evaluates to true.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the match condition function object already indicates
+ * a match, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read.
+ *
+ * @param match_condition The function object to be called to determine whether
+ * a match exists. The signature of the function object must be:
+ * @code pair<iterator, bool> match_condition(iterator begin, iterator end);
+ * @endcode
+ * where @c iterator represents the type:
+ * @code buffers_iterator<basic_streambuf<Allocator>::const_buffers_type>
+ * @endcode
+ * The iterator parameters @c begin and @c end define the range of bytes to be
+ * scanned to determine whether there is a match. The @c first member of the
+ * return value is an iterator marking one-past-the-end of the bytes that have
+ * been consumed by the match function. This iterator is used to calculate the
+ * @c begin parameter for any subsequent invocation of the match condition. The
+ * @c second member of the return value is true if a match has been found, false
+ * otherwise.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the streambuf's get area that have been fully
+ * consumed by the match function. Returns 0 if an error occurred.
+ *
+ * @note After a successful read_until operation, the streambuf may contain
+ * additional data beyond that which matched the function object. An application
+ * will typically leave that data in the streambuf for a subsequent read_until
+ * operation to examine.
+ *
+ * @note The default implementation of the @c is_match_condition type trait
+ * evaluates to true for function pointers and function objects with a
+ * @c result_type typedef. It must be specialised for other user-defined
+ * function objects.
+ */
+template <typename SyncReadStream, typename Allocator, typename MatchCondition>
+std::size_t read_until(SyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    MatchCondition match_condition, asio::error_code& ec,
+    typename enable_if<is_match_condition<MatchCondition>::value>::type* = 0);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Read data into a dynamic buffer sequence until it contains a specified
+/// delimiter.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains the specified
+ * delimiter. The call will block until one of the following conditions is
+ * true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains the delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param delim The delimiter character.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the delimiter.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond the delimiter. An application will
+ * typically leave that data in the dynamic buffer sequence for a subsequent
+ * read_until operation to examine.
+ *
+ * @par Example
+ * To read data into a @c std::string until a newline is encountered:
+ * @code std::string data;
+ * std::string n = asio::read_until(s,
+ *     asio::dynamic_buffer(data), '\n');
+ * std::string line = data.substr(0, n);
+ * data.erase(0, n); @endcode
+ * After the @c read_until operation completes successfully, the string @c data
+ * contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the
+ * delimiter, so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the buffer @c b as
+ * follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c read_until operation.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers, char delim,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Read data into a dynamic buffer sequence until it contains a specified
+/// delimiter.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains the specified
+ * delimiter. The call will block until one of the following conditions is
+ * true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains the delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param delim The delimiter character.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the delimiter. Returns 0 if an error occurred.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond the delimiter. An application will
+ * typically leave that data in the dynamic buffer sequence for a subsequent
+ * read_until operation to examine.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    char delim, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Read data into a dynamic buffer sequence until it contains a specified
+/// delimiter.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains the specified
+ * delimiter. The call will block until one of the following conditions is
+ * true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains the delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param delim The delimiter string.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the delimiter.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond the delimiter. An application will
+ * typically leave that data in the dynamic buffer sequence for a subsequent
+ * read_until operation to examine.
+ *
+ * @par Example
+ * To read data into a @c std::string until a CR-LF sequence is encountered:
+ * @code std::string data;
+ * std::string n = asio::read_until(s,
+ *     asio::dynamic_buffer(data), "\r\n");
+ * std::string line = data.substr(0, n);
+ * data.erase(0, n); @endcode
+ * After the @c read_until operation completes successfully, the string @c data
+ * contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the
+ * delimiter, so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the buffer @c b as
+ * follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c read_until operation.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    ASIO_STRING_VIEW_PARAM delim,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Read data into a dynamic buffer sequence until it contains a specified
+/// delimiter.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains the specified
+ * delimiter. The call will block until one of the following conditions is
+ * true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains the delimiter, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ *
+ * @param delim The delimiter string.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the delimiter. Returns 0 if an error occurred.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond the delimiter. An application will
+ * typically leave that data in the dynamic buffer sequence for a subsequent
+ * read_until operation to examine.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    ASIO_STRING_VIEW_PARAM delim, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if defined(ASIO_HAS_BOOST_REGEX) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Read data into a dynamic buffer sequence until some part of the data it
+/// contains matches a regular expression.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains some data
+ * that matches a regular expression. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li A substring of the dynamic buffer sequence's get area matches the
+ * regular expression.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains data that matches the regular expression, the function returns
+ * immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers A dynamic buffer sequence into which the data will be read.
+ *
+ * @param expr The regular expression.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the substring that matches the regular expression.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond that which matched the regular
+ * expression. An application will typically leave that data in the dynamic
+ * buffer sequence for a subsequent read_until operation to examine.
+ *
+ * @par Example
+ * To read data into a @c std::string until a CR-LF sequence is encountered:
+ * @code std::string data;
+ * std::string n = asio::read_until(s,
+ *     asio::dynamic_buffer(data), boost::regex("\r\n"));
+ * std::string line = data.substr(0, n);
+ * data.erase(0, n); @endcode
+ * After the @c read_until operation completes successfully, the string @c data
+ * contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the
+ * delimiter, so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the buffer @c b as
+ * follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c read_until operation.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    const boost::regex& expr,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Read data into a dynamic buffer sequence until some part of the data it
+/// contains matches a regular expression.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until the dynamic buffer sequence's get area contains some data
+ * that matches a regular expression. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li A substring of the dynamic buffer sequence's get area matches the
+ * regular expression.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the dynamic buffer sequence's get area already
+ * contains data that matches the regular expression, the function returns
+ * immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers A dynamic buffer sequence into which the data will be read.
+ *
+ * @param expr The regular expression.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area up to
+ * and including the substring that matches the regular expression. Returns 0
+ * if an error occurred.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond that which matched the regular
+ * expression. An application will typically leave that data in the dynamic
+ * buffer sequence for a subsequent read_until operation to examine.
+ */
+template <typename SyncReadStream, typename DynamicBuffer_v2>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    const boost::regex& expr, asio::error_code& ec,
+    typename enable_if<
+        is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+       // || defined(GENERATING_DOCUMENTATION)
+
+/// Read data into a dynamic buffer sequence until a function object indicates a
+/// match.
+
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until a user-defined match condition function object, when applied
+ * to the data contained in the dynamic buffer sequence, indicates a successful
+ * match. The call will block until one of the following conditions is true:
+ *
+ * @li The match condition function object returns a std::pair where the second
+ * element evaluates to true.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the match condition function object already indicates
+ * a match, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers A dynamic buffer sequence into which the data will be read.
+ *
+ * @param match_condition The function object to be called to determine whether
+ * a match exists. The signature of the function object must be:
+ * @code pair<iterator, bool> match_condition(iterator begin, iterator end);
+ * @endcode
+ * where @c iterator represents the type:
+ * @code buffers_iterator<typename DynamicBuffer_v2::const_buffers_type>
+ * @endcode
+ * The iterator parameters @c begin and @c end define the range of bytes to be
+ * scanned to determine whether there is a match. The @c first member of the
+ * return value is an iterator marking one-past-the-end of the bytes that have
+ * been consumed by the match function. This iterator is used to calculate the
+ * @c begin parameter for any subsequent invocation of the match condition. The
+ * @c second member of the return value is true if a match has been found, false
+ * otherwise.
+ *
+ * @returns The number of bytes in the dynamic_buffer's get area that
+ * have been fully consumed by the match function.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond that which matched the function object.
+ * An application will typically leave that data in the dynamic buffer sequence
+ * for a subsequent read_until operation to examine.
+
+ * @note The default implementation of the @c is_match_condition type trait
+ * evaluates to true for function pointers and function objects with a
+ * @c result_type typedef. It must be specialised for other user-defined
+ * function objects.
+ *
+ * @par Examples
+ * To read data into a dynamic buffer sequence until whitespace is encountered:
+ * @code typedef asio::buffers_iterator<
+ *     asio::const_buffers_1> iterator;
+ *
+ * std::pair<iterator, bool>
+ * match_whitespace(iterator begin, iterator end)
+ * {
+ *   iterator i = begin;
+ *   while (i != end)
+ *     if (std::isspace(*i++))
+ *       return std::make_pair(i, true);
+ *   return std::make_pair(i, false);
+ * }
+ * ...
+ * std::string data;
+ * asio::read_until(s, data, match_whitespace);
+ * @endcode
+ *
+ * To read data into a @c std::string until a matching character is found:
+ * @code class match_char
+ * {
+ * public:
+ *   explicit match_char(char c) : c_(c) {}
+ *
+ *   template <typename Iterator>
+ *   std::pair<Iterator, bool> operator()(
+ *       Iterator begin, Iterator end) const
+ *   {
+ *     Iterator i = begin;
+ *     while (i != end)
+ *       if (c_ == *i++)
+ *         return std::make_pair(i, true);
+ *     return std::make_pair(i, false);
+ *   }
+ *
+ * private:
+ *   char c_;
+ * };
+ *
+ * namespace asio {
+ *   template <> struct is_match_condition<match_char>
+ *     : public boost::true_type {};
+ * } // namespace asio
+ * ...
+ * std::string data;
+ * asio::read_until(s, data, match_char('a'));
+ * @endcode
+ */
+template <typename SyncReadStream,
+    typename DynamicBuffer_v2, typename MatchCondition>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    MatchCondition match_condition,
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Read data into a dynamic buffer sequence until a function object indicates a
+/// match.
+/**
+ * This function is used to read data into the specified dynamic buffer
+ * sequence until a user-defined match condition function object, when applied
+ * to the data contained in the dynamic buffer sequence, indicates a successful
+ * match. The call will block until one of the following conditions is true:
+ *
+ * @li The match condition function object returns a std::pair where the second
+ * element evaluates to true.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * read_some function. If the match condition function object already indicates
+ * a match, the function returns immediately.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the SyncReadStream concept.
+ *
+ * @param buffers A dynamic buffer sequence into which the data will be read.
+ *
+ * @param match_condition The function object to be called to determine whether
+ * a match exists. The signature of the function object must be:
+ * @code pair<iterator, bool> match_condition(iterator begin, iterator end);
+ * @endcode
+ * where @c iterator represents the type:
+ * @code buffers_iterator<DynamicBuffer_v2::const_buffers_type>
+ * @endcode
+ * The iterator parameters @c begin and @c end define the range of bytes to be
+ * scanned to determine whether there is a match. The @c first member of the
+ * return value is an iterator marking one-past-the-end of the bytes that have
+ * been consumed by the match function. This iterator is used to calculate the
+ * @c begin parameter for any subsequent invocation of the match condition. The
+ * @c second member of the return value is true if a match has been found, false
+ * otherwise.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes in the dynamic buffer sequence's get area that
+ * have been fully consumed by the match function. Returns 0 if an error
+ * occurred.
+ *
+ * @note After a successful read_until operation, the dynamic buffer sequence
+ * may contain additional data beyond that which matched the function object.
+ * An application will typically leave that data in the dynamic buffer sequence
+ * for a subsequent read_until operation to examine.
+ *
+ * @note The default implementation of the @c is_match_condition type trait
+ * evaluates to true for function pointers and function objects with a
+ * @c result_type typedef. It must be specialised for other user-defined
+ * function objects.
+ */
+template <typename SyncReadStream,
+    typename DynamicBuffer_v2, typename MatchCondition>
+std::size_t read_until(SyncReadStream& s, DynamicBuffer_v2 buffers,
+    MatchCondition match_condition, asio::error_code& ec,
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+/*@}*/
+/**
+ * @defgroup async_read_until asio::async_read_until
+ *
+ * @brief The @c async_read_until function is a composed asynchronous operation
+ * that reads data into a dynamic buffer sequence, or into a streambuf, until
+ * it contains a delimiter, matches a regular expression, or a function object
+ * indicates a match.
+ */
+/*@{*/
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Start an asynchronous operation to read data into a dynamic buffer sequence
+/// until it contains a specified delimiter.
+/**
+ * This function is used to asynchronously read data into the specified dynamic
+ * buffer sequence until the dynamic buffer sequence's get area contains the
+ * specified delimiter. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the dynamic buffer sequence's get area already contains the delimiter, this
+ * asynchronous operation completes immediately. The program must ensure that
+ * the stream performs no other read operations (such as async_read,
+ * async_read_until, the stream's async_read_some function, or any other
+ * composed operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param delim The delimiter character.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the dynamic buffer sequence's
+ *   // get area up to and including the delimiter.
+ *   // 0 if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the dynamic buffer
+ * sequence may contain additional data beyond the delimiter. An application
+ * will typically leave that data in the dynamic buffer sequence for a
+ * subsequent async_read_until operation to examine.
+ *
+ * @par Example
+ * To asynchronously read data into a @c std::string until a newline is
+ * encountered:
+ * @code std::string data;
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size)
+ * {
+ *   if (!e)
+ *   {
+ *     std::string line = data.substr(0, n);
+ *     data.erase(0, n);
+ *     ...
+ *   }
+ * }
+ * ...
+ * asio::async_read_until(s, data, '\n', handler); @endcode
+ * After the @c async_read_until operation completes successfully, the buffer
+ * @c data contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the
+ * delimiter, so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the buffer @c data
+ * as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c async_read_until operation.
+ */
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers, char delim,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Start an asynchronous operation to read data into a dynamic buffer sequence
+/// until it contains a specified delimiter.
+/**
+ * This function is used to asynchronously read data into the specified dynamic
+ * buffer sequence until the dynamic buffer sequence's get area contains the
+ * specified delimiter. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the dynamic buffer sequence's get area already contains the delimiter, this
+ * asynchronous operation completes immediately. The program must ensure that
+ * the stream performs no other read operations (such as async_read,
+ * async_read_until, the stream's async_read_some function, or any other
+ * composed operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param delim The delimiter string.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the dynamic buffer sequence's
+ *   // get area up to and including the delimiter.
+ *   // 0 if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the dynamic buffer
+ * sequence may contain additional data beyond the delimiter. An application
+ * will typically leave that data in the dynamic buffer sequence for a
+ * subsequent async_read_until operation to examine.
+ *
+ * @par Example
+ * To asynchronously read data into a @c std::string until a CR-LF sequence is
+ * encountered:
+ * @code std::string data;
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size)
+ * {
+ *   if (!e)
+ *   {
+ *     std::string line = data.substr(0, n);
+ *     data.erase(0, n);
+ *     ...
+ *   }
+ * }
+ * ...
+ * asio::async_read_until(s, data, "\r\n", handler); @endcode
+ * After the @c async_read_until operation completes successfully, the string
+ * @c data contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the
+ * delimiter, so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the string @c data
+ * as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c async_read_until operation.
+ */
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    ASIO_STRING_VIEW_PARAM delim,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if defined(ASIO_HAS_BOOST_REGEX) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Start an asynchronous operation to read data into a dynamic buffer sequence
+/// until some part of its data matches a regular expression.
+/**
+ * This function is used to asynchronously read data into the specified dynamic
+ * buffer sequence until the dynamic buffer sequence's get area contains some
+ * data that matches a regular expression. The function call always returns
+ * immediately. The asynchronous operation will continue until one of the
+ * following conditions is true:
+ *
+ * @li A substring of the dynamic buffer sequence's get area matches the regular
+ * expression.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the dynamic buffer sequence's get area already contains data that matches
+ * the regular expression, this asynchronous operation completes immediately.
+ * The program must ensure that the stream performs no other read operations
+ * (such as async_read, async_read_until, the stream's async_read_some
+ * function, or any other composed operations that perform reads) until this
+ * operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param expr The regular expression.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the dynamic buffer
+ *   // sequence's get area up to and including the
+ *   // substring that matches the regular expression.
+ *   // 0 if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the dynamic buffer
+ * sequence may contain additional data beyond that which matched the regular
+ * expression. An application will typically leave that data in the dynamic
+ * buffer sequence for a subsequent async_read_until operation to examine.
+ *
+ * @par Example
+ * To asynchronously read data into a @c std::string until a CR-LF sequence is
+ * encountered:
+ * @code std::string data;
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size)
+ * {
+ *   if (!e)
+ *   {
+ *     std::string line = data.substr(0, n);
+ *     data.erase(0, n);
+ *     ...
+ *   }
+ * }
+ * ...
+ * asio::async_read_until(s, data,
+ *     boost::regex("\r\n"), handler); @endcode
+ * After the @c async_read_until operation completes successfully, the string
+ * @c data contains the data which matched the regular expression:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the match,
+ * so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the string @c data
+ * as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c async_read_until operation.
+ */
+template <typename AsyncReadStream, typename DynamicBuffer_v1,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    const boost::regex& expr,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+       // || defined(GENERATING_DOCUMENTATION)
+
+/// Start an asynchronous operation to read data into a dynamic buffer sequence
+/// until a function object indicates a match.
+/**
+ * This function is used to asynchronously read data into the specified dynamic
+ * buffer sequence until a user-defined match condition function object, when
+ * applied to the data contained in the dynamic buffer sequence, indicates a
+ * successful match. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li The match condition function object returns a std::pair where the second
+ * element evaluates to true.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the match condition function object already indicates a match, this
+ * asynchronous operation completes immediately. The program must ensure that
+ * the stream performs no other read operations (such as async_read,
+ * async_read_until, the stream's async_read_some function, or any other
+ * composed operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param match_condition The function object to be called to determine whether
+ * a match exists. The signature of the function object must be:
+ * @code pair<iterator, bool> match_condition(iterator begin, iterator end);
+ * @endcode
+ * where @c iterator represents the type:
+ * @code buffers_iterator<typename DynamicBuffer_v1::const_buffers_type>
+ * @endcode
+ * The iterator parameters @c begin and @c end define the range of bytes to be
+ * scanned to determine whether there is a match. The @c first member of the
+ * return value is an iterator marking one-past-the-end of the bytes that have
+ * been consumed by the match function. This iterator is used to calculate the
+ * @c begin parameter for any subsequent invocation of the match condition. The
+ * @c second member of the return value is true if a match has been found, false
+ * otherwise.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the dynamic buffer sequence's
+ *   // get area that have been fully consumed by the match
+ *   // function. O if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the dynamic buffer
+ * sequence may contain additional data beyond that which matched the function
+ * object. An application will typically leave that data in the dynamic buffer
+ * sequence for a subsequent async_read_until operation to examine.
+ *
+ * @note The default implementation of the @c is_match_condition type trait
+ * evaluates to true for function pointers and function objects with a
+ * @c result_type typedef. It must be specialised for other user-defined
+ * function objects.
+ *
+ * @par Examples
+ * To asynchronously read data into a @c std::string until whitespace is
+ * encountered:
+ * @code typedef asio::buffers_iterator<
+ *     asio::const_buffers_1> iterator;
+ *
+ * std::pair<iterator, bool>
+ * match_whitespace(iterator begin, iterator end)
+ * {
+ *   iterator i = begin;
+ *   while (i != end)
+ *     if (std::isspace(*i++))
+ *       return std::make_pair(i, true);
+ *   return std::make_pair(i, false);
+ * }
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size);
+ * ...
+ * std::string data;
+ * asio::async_read_until(s, data, match_whitespace, handler);
+ * @endcode
+ *
+ * To asynchronously read data into a @c std::string until a matching character
+ * is found:
+ * @code class match_char
+ * {
+ * public:
+ *   explicit match_char(char c) : c_(c) {}
+ *
+ *   template <typename Iterator>
+ *   std::pair<Iterator, bool> operator()(
+ *       Iterator begin, Iterator end) const
+ *   {
+ *     Iterator i = begin;
+ *     while (i != end)
+ *       if (c_ == *i++)
+ *         return std::make_pair(i, true);
+ *     return std::make_pair(i, false);
+ *   }
+ *
+ * private:
+ *   char c_;
+ * };
+ *
+ * namespace asio {
+ *   template <> struct is_match_condition<match_char>
+ *     : public boost::true_type {};
+ * } // namespace asio
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size);
+ * ...
+ * std::string data;
+ * asio::async_read_until(s, data, match_char('a'), handler);
+ * @endcode
+ */
+template <typename AsyncReadStream,
+    typename DynamicBuffer_v1, typename MatchCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    MatchCondition match_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Start an asynchronous operation to read data into a streambuf until it
+/// contains a specified delimiter.
+/**
+ * This function is used to asynchronously read data into the specified
+ * streambuf until the streambuf's get area contains the specified delimiter.
+ * The function call always returns immediately. The asynchronous operation
+ * will continue until one of the following conditions is true:
+ *
+ * @li The get area of the streambuf contains the specified delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the streambuf's get area already contains the delimiter, this asynchronous
+ * operation completes immediately. The program must ensure that the stream
+ * performs no other read operations (such as async_read, async_read_until, the
+ * stream's async_read_some function, or any other composed operations that
+ * perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read. Ownership of
+ * the streambuf is retained by the caller, which must guarantee that it remains
+ * valid until the handler is called.
+ *
+ * @param delim The delimiter character.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the streambuf's get
+ *   // area up to and including the delimiter.
+ *   // 0 if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the streambuf may
+ * contain additional data beyond the delimiter. An application will typically
+ * leave that data in the streambuf for a subsequent async_read_until operation
+ * to examine.
+ *
+ * @par Example
+ * To asynchronously read data into a streambuf until a newline is encountered:
+ * @code asio::streambuf b;
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size)
+ * {
+ *   if (!e)
+ *   {
+ *     std::istream is(&b);
+ *     std::string line;
+ *     std::getline(is, line);
+ *     ...
+ *   }
+ * }
+ * ...
+ * asio::async_read_until(s, b, '\n', handler); @endcode
+ * After the @c async_read_until operation completes successfully, the buffer
+ * @c b contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\n', 'd', 'e', ... } @endcode
+ * The call to @c std::getline then extracts the data up to and including the
+ * newline (which is discarded), so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c' } @endcode
+ * The remaining data is left in the buffer @c b as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c async_read_until operation.
+ */
+template <typename AsyncReadStream, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, char delim,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type));
+
+/// Start an asynchronous operation to read data into a streambuf until it
+/// contains a specified delimiter.
+/**
+ * This function is used to asynchronously read data into the specified
+ * streambuf until the streambuf's get area contains the specified delimiter.
+ * The function call always returns immediately. The asynchronous operation
+ * will continue until one of the following conditions is true:
+ *
+ * @li The get area of the streambuf contains the specified delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the streambuf's get area already contains the delimiter, this asynchronous
+ * operation completes immediately. The program must ensure that the stream
+ * performs no other read operations (such as async_read, async_read_until, the
+ * stream's async_read_some function, or any other composed operations that
+ * perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read. Ownership of
+ * the streambuf is retained by the caller, which must guarantee that it remains
+ * valid until the handler is called.
+ *
+ * @param delim The delimiter string.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the streambuf's get
+ *   // area up to and including the delimiter.
+ *   // 0 if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the streambuf may
+ * contain additional data beyond the delimiter. An application will typically
+ * leave that data in the streambuf for a subsequent async_read_until operation
+ * to examine.
+ *
+ * @par Example
+ * To asynchronously read data into a streambuf until a newline is encountered:
+ * @code asio::streambuf b;
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size)
+ * {
+ *   if (!e)
+ *   {
+ *     std::istream is(&b);
+ *     std::string line;
+ *     std::getline(is, line);
+ *     ...
+ *   }
+ * }
+ * ...
+ * asio::async_read_until(s, b, "\r\n", handler); @endcode
+ * After the @c async_read_until operation completes successfully, the buffer
+ * @c b contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c std::getline then extracts the data up to and including the
+ * newline (which is discarded), so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r' } @endcode
+ * The remaining data is left in the buffer @c b as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c async_read_until operation.
+ */
+template <typename AsyncReadStream, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    ASIO_STRING_VIEW_PARAM delim,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type));
+
+#if defined(ASIO_HAS_BOOST_REGEX) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Start an asynchronous operation to read data into a streambuf until some
+/// part of its data matches a regular expression.
+/**
+ * This function is used to asynchronously read data into the specified
+ * streambuf until the streambuf's get area contains some data that matches a
+ * regular expression. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li A substring of the streambuf's get area matches the regular expression.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the streambuf's get area already contains data that matches the regular
+ * expression, this asynchronous operation completes immediately. The program
+ * must ensure that the stream performs no other read operations (such as
+ * async_read, async_read_until, the stream's async_read_some function, or any
+ * other composed operations that perform reads) until this operation
+ * completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read. Ownership of
+ * the streambuf is retained by the caller, which must guarantee that it remains
+ * valid until the handler is called.
+ *
+ * @param expr The regular expression.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the streambuf's get
+ *   // area up to and including the substring
+ *   // that matches the regular. expression.
+ *   // 0 if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the streambuf may
+ * contain additional data beyond that which matched the regular expression. An
+ * application will typically leave that data in the streambuf for a subsequent
+ * async_read_until operation to examine.
+ *
+ * @par Example
+ * To asynchronously read data into a streambuf until a CR-LF sequence is
+ * encountered:
+ * @code asio::streambuf b;
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size)
+ * {
+ *   if (!e)
+ *   {
+ *     std::istream is(&b);
+ *     std::string line;
+ *     std::getline(is, line);
+ *     ...
+ *   }
+ * }
+ * ...
+ * asio::async_read_until(s, b, boost::regex("\r\n"), handler); @endcode
+ * After the @c async_read_until operation completes successfully, the buffer
+ * @c b contains the data which matched the regular expression:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c std::getline then extracts the data up to and including the
+ * newline (which is discarded), so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r' } @endcode
+ * The remaining data is left in the buffer @c b as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c async_read_until operation.
+ */
+template <typename AsyncReadStream, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b, const boost::regex& expr,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type));
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+       // || defined(GENERATING_DOCUMENTATION)
+
+/// Start an asynchronous operation to read data into a streambuf until a
+/// function object indicates a match.
+/**
+ * This function is used to asynchronously read data into the specified
+ * streambuf until a user-defined match condition function object, when applied
+ * to the data contained in the streambuf, indicates a successful match. The
+ * function call always returns immediately. The asynchronous operation will
+ * continue until one of the following conditions is true:
+ *
+ * @li The match condition function object returns a std::pair where the second
+ * element evaluates to true.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the match condition function object already indicates a match, this
+ * asynchronous operation completes immediately. The program must ensure that
+ * the stream performs no other read operations (such as async_read,
+ * async_read_until, the stream's async_read_some function, or any other
+ * composed operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param b A streambuf object into which the data will be read.
+ *
+ * @param match_condition The function object to be called to determine whether
+ * a match exists. The signature of the function object must be:
+ * @code pair<iterator, bool> match_condition(iterator begin, iterator end);
+ * @endcode
+ * where @c iterator represents the type:
+ * @code buffers_iterator<basic_streambuf<Allocator>::const_buffers_type>
+ * @endcode
+ * The iterator parameters @c begin and @c end define the range of bytes to be
+ * scanned to determine whether there is a match. The @c first member of the
+ * return value is an iterator marking one-past-the-end of the bytes that have
+ * been consumed by the match function. This iterator is used to calculate the
+ * @c begin parameter for any subsequent invocation of the match condition. The
+ * @c second member of the return value is true if a match has been found, false
+ * otherwise.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the streambuf's get
+ *   // area that have been fully consumed by the
+ *   // match function. O if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the streambuf may
+ * contain additional data beyond that which matched the function object. An
+ * application will typically leave that data in the streambuf for a subsequent
+ * async_read_until operation to examine.
+ *
+ * @note The default implementation of the @c is_match_condition type trait
+ * evaluates to true for function pointers and function objects with a
+ * @c result_type typedef. It must be specialised for other user-defined
+ * function objects.
+ *
+ * @par Examples
+ * To asynchronously read data into a streambuf until whitespace is encountered:
+ * @code typedef asio::buffers_iterator<
+ *     asio::streambuf::const_buffers_type> iterator;
+ *
+ * std::pair<iterator, bool>
+ * match_whitespace(iterator begin, iterator end)
+ * {
+ *   iterator i = begin;
+ *   while (i != end)
+ *     if (std::isspace(*i++))
+ *       return std::make_pair(i, true);
+ *   return std::make_pair(i, false);
+ * }
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size);
+ * ...
+ * asio::streambuf b;
+ * asio::async_read_until(s, b, match_whitespace, handler);
+ * @endcode
+ *
+ * To asynchronously read data into a streambuf until a matching character is
+ * found:
+ * @code class match_char
+ * {
+ * public:
+ *   explicit match_char(char c) : c_(c) {}
+ *
+ *   template <typename Iterator>
+ *   std::pair<Iterator, bool> operator()(
+ *       Iterator begin, Iterator end) const
+ *   {
+ *     Iterator i = begin;
+ *     while (i != end)
+ *       if (c_ == *i++)
+ *         return std::make_pair(i, true);
+ *     return std::make_pair(i, false);
+ *   }
+ *
+ * private:
+ *   char c_;
+ * };
+ *
+ * namespace asio {
+ *   template <> struct is_match_condition<match_char>
+ *     : public boost::true_type {};
+ * } // namespace asio
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size);
+ * ...
+ * asio::streambuf b;
+ * asio::async_read_until(s, b, match_char('a'), handler);
+ * @endcode
+ */
+template <typename AsyncReadStream, typename Allocator, typename MatchCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s,
+    asio::basic_streambuf<Allocator>& b,
+    MatchCondition match_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<is_match_condition<MatchCondition>::value>::type* = 0);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Start an asynchronous operation to read data into a dynamic buffer sequence
+/// until it contains a specified delimiter.
+/**
+ * This function is used to asynchronously read data into the specified dynamic
+ * buffer sequence until the dynamic buffer sequence's get area contains the
+ * specified delimiter. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the dynamic buffer sequence's get area already contains the delimiter, this
+ * asynchronous operation completes immediately. The program must ensure that
+ * the stream performs no other read operations (such as async_read,
+ * async_read_until, the stream's async_read_some function, or any other
+ * composed operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param delim The delimiter character.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the dynamic buffer sequence's
+ *   // get area up to and including the delimiter.
+ *   // 0 if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the dynamic buffer
+ * sequence may contain additional data beyond the delimiter. An application
+ * will typically leave that data in the dynamic buffer sequence for a
+ * subsequent async_read_until operation to examine.
+ *
+ * @par Example
+ * To asynchronously read data into a @c std::string until a newline is
+ * encountered:
+ * @code std::string data;
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size)
+ * {
+ *   if (!e)
+ *   {
+ *     std::string line = data.substr(0, n);
+ *     data.erase(0, n);
+ *     ...
+ *   }
+ * }
+ * ...
+ * asio::async_read_until(s, data, '\n', handler); @endcode
+ * After the @c async_read_until operation completes successfully, the buffer
+ * @c data contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the
+ * delimiter, so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the buffer @c data
+ * as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c async_read_until operation.
+ */
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s, DynamicBuffer_v2 buffers, char delim,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Start an asynchronous operation to read data into a dynamic buffer sequence
+/// until it contains a specified delimiter.
+/**
+ * This function is used to asynchronously read data into the specified dynamic
+ * buffer sequence until the dynamic buffer sequence's get area contains the
+ * specified delimiter. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li The get area of the dynamic buffer sequence contains the specified
+ * delimiter.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the dynamic buffer sequence's get area already contains the delimiter, this
+ * asynchronous operation completes immediately. The program must ensure that
+ * the stream performs no other read operations (such as async_read,
+ * async_read_until, the stream's async_read_some function, or any other
+ * composed operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param delim The delimiter string.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the dynamic buffer sequence's
+ *   // get area up to and including the delimiter.
+ *   // 0 if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the dynamic buffer
+ * sequence may contain additional data beyond the delimiter. An application
+ * will typically leave that data in the dynamic buffer sequence for a
+ * subsequent async_read_until operation to examine.
+ *
+ * @par Example
+ * To asynchronously read data into a @c std::string until a CR-LF sequence is
+ * encountered:
+ * @code std::string data;
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size)
+ * {
+ *   if (!e)
+ *   {
+ *     std::string line = data.substr(0, n);
+ *     data.erase(0, n);
+ *     ...
+ *   }
+ * }
+ * ...
+ * asio::async_read_until(s, data, "\r\n", handler); @endcode
+ * After the @c async_read_until operation completes successfully, the string
+ * @c data contains the delimiter:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the
+ * delimiter, so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the string @c data
+ * as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c async_read_until operation.
+ */
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s, DynamicBuffer_v2 buffers,
+    ASIO_STRING_VIEW_PARAM delim,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if defined(ASIO_HAS_BOOST_REGEX) \
+  || defined(GENERATING_DOCUMENTATION)
+
+/// Start an asynchronous operation to read data into a dynamic buffer sequence
+/// until some part of its data matches a regular expression.
+/**
+ * This function is used to asynchronously read data into the specified dynamic
+ * buffer sequence until the dynamic buffer sequence's get area contains some
+ * data that matches a regular expression. The function call always returns
+ * immediately. The asynchronous operation will continue until one of the
+ * following conditions is true:
+ *
+ * @li A substring of the dynamic buffer sequence's get area matches the regular
+ * expression.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the dynamic buffer sequence's get area already contains data that matches
+ * the regular expression, this asynchronous operation completes immediately.
+ * The program must ensure that the stream performs no other read operations
+ * (such as async_read, async_read_until, the stream's async_read_some
+ * function, or any other composed operations that perform reads) until this
+ * operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param expr The regular expression.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the dynamic buffer
+ *   // sequence's get area up to and including the
+ *   // substring that matches the regular expression.
+ *   // 0 if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the dynamic buffer
+ * sequence may contain additional data beyond that which matched the regular
+ * expression. An application will typically leave that data in the dynamic
+ * buffer sequence for a subsequent async_read_until operation to examine.
+ *
+ * @par Example
+ * To asynchronously read data into a @c std::string until a CR-LF sequence is
+ * encountered:
+ * @code std::string data;
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size)
+ * {
+ *   if (!e)
+ *   {
+ *     std::string line = data.substr(0, n);
+ *     data.erase(0, n);
+ *     ...
+ *   }
+ * }
+ * ...
+ * asio::async_read_until(s, data,
+ *     boost::regex("\r\n"), handler); @endcode
+ * After the @c async_read_until operation completes successfully, the string
+ * @c data contains the data which matched the regular expression:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n', 'd', 'e', ... } @endcode
+ * The call to @c substr then extracts the data up to and including the match,
+ * so that the string @c line contains:
+ * @code { 'a', 'b', ..., 'c', '\r', '\n' } @endcode
+ * After the call to @c erase, the remaining data is left in the string @c data
+ * as follows:
+ * @code { 'd', 'e', ... } @endcode
+ * This data may be the start of a new line, to be extracted by a subsequent
+ * @c async_read_until operation.
+ */
+template <typename AsyncReadStream, typename DynamicBuffer_v2,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s, DynamicBuffer_v2 buffers,
+    const boost::regex& expr,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+#endif // defined(ASIO_HAS_BOOST_REGEX)
+       // || defined(GENERATING_DOCUMENTATION)
+
+/// Start an asynchronous operation to read data into a dynamic buffer sequence
+/// until a function object indicates a match.
+/**
+ * This function is used to asynchronously read data into the specified dynamic
+ * buffer sequence until a user-defined match condition function object, when
+ * applied to the data contained in the dynamic buffer sequence, indicates a
+ * successful match. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li The match condition function object returns a std::pair where the second
+ * element evaluates to true.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_read_some function, and is known as a <em>composed operation</em>. If
+ * the match condition function object already indicates a match, this
+ * asynchronous operation completes immediately. The program must ensure that
+ * the stream performs no other read operations (such as async_read,
+ * async_read_until, the stream's async_read_some function, or any other
+ * composed operations that perform reads) until this operation completes.
+ *
+ * @param s The stream from which the data is to be read. The type must support
+ * the AsyncReadStream concept.
+ *
+ * @param buffers The dynamic buffer sequence into which the data will be read.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param match_condition The function object to be called to determine whether
+ * a match exists. The signature of the function object must be:
+ * @code pair<iterator, bool> match_condition(iterator begin, iterator end);
+ * @endcode
+ * where @c iterator represents the type:
+ * @code buffers_iterator<typename DynamicBuffer_v2::const_buffers_type>
+ * @endcode
+ * The iterator parameters @c begin and @c end define the range of bytes to be
+ * scanned to determine whether there is a match. The @c first member of the
+ * return value is an iterator marking one-past-the-end of the bytes that have
+ * been consumed by the match function. This iterator is used to calculate the
+ * @c begin parameter for any subsequent invocation of the match condition. The
+ * @c second member of the return value is true if a match has been found, false
+ * otherwise.
+ *
+ * @param handler The handler to be called when the read operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // The number of bytes in the dynamic buffer sequence's
+ *   // get area that have been fully consumed by the match
+ *   // function. O if an error occurred.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @note After a successful async_read_until operation, the dynamic buffer
+ * sequence may contain additional data beyond that which matched the function
+ * object. An application will typically leave that data in the dynamic buffer
+ * sequence for a subsequent async_read_until operation to examine.
+ *
+ * @note The default implementation of the @c is_match_condition type trait
+ * evaluates to true for function pointers and function objects with a
+ * @c result_type typedef. It must be specialised for other user-defined
+ * function objects.
+ *
+ * @par Examples
+ * To asynchronously read data into a @c std::string until whitespace is
+ * encountered:
+ * @code typedef asio::buffers_iterator<
+ *     asio::const_buffers_1> iterator;
+ *
+ * std::pair<iterator, bool>
+ * match_whitespace(iterator begin, iterator end)
+ * {
+ *   iterator i = begin;
+ *   while (i != end)
+ *     if (std::isspace(*i++))
+ *       return std::make_pair(i, true);
+ *   return std::make_pair(i, false);
+ * }
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size);
+ * ...
+ * std::string data;
+ * asio::async_read_until(s, data, match_whitespace, handler);
+ * @endcode
+ *
+ * To asynchronously read data into a @c std::string until a matching character
+ * is found:
+ * @code class match_char
+ * {
+ * public:
+ *   explicit match_char(char c) : c_(c) {}
+ *
+ *   template <typename Iterator>
+ *   std::pair<Iterator, bool> operator()(
+ *       Iterator begin, Iterator end) const
+ *   {
+ *     Iterator i = begin;
+ *     while (i != end)
+ *       if (c_ == *i++)
+ *         return std::make_pair(i, true);
+ *     return std::make_pair(i, false);
+ *   }
+ *
+ * private:
+ *   char c_;
+ * };
+ *
+ * namespace asio {
+ *   template <> struct is_match_condition<match_char>
+ *     : public boost::true_type {};
+ * } // namespace asio
+ * ...
+ * void handler(const asio::error_code& e, std::size_t size);
+ * ...
+ * std::string data;
+ * asio::async_read_until(s, data, match_char('a'), handler);
+ * @endcode
+ */
+template <typename AsyncReadStream,
+    typename DynamicBuffer_v2, typename MatchCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) ReadHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncReadStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+    void (asio::error_code, std::size_t))
+async_read_until(AsyncReadStream& s, DynamicBuffer_v2 buffers,
+    MatchCondition match_condition,
+    ASIO_MOVE_ARG(ReadHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncReadStream::executor_type),
+    typename enable_if<
+      is_match_condition<MatchCondition>::value
+        && is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+/*@}*/
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/read_until.hpp"
+
+#endif // ASIO_READ_UNTIL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/redirect_error.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/redirect_error.hpp
new file mode 100644
index 00000000000..d7740b9b1b9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/redirect_error.hpp
@@ -0,0 +1,66 @@
+//
+// redirect_error.hpp
+// ~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_REDIRECT_ERROR_HPP
+#define ASIO_REDIRECT_ERROR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/error_code.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Completion token type used to specify that an error produced by an
+/// asynchronous operation is captured to an error_code variable.
+/**
+ * The redirect_error_t class is used to indicate that any error_code produced
+ * by an asynchronous operation is captured to a specified variable.
+ */
+template <typename CompletionToken>
+class redirect_error_t
+{
+public:
+  /// Constructor. 
+  template <typename T>
+  redirect_error_t(ASIO_MOVE_ARG(T) completion_token,
+      asio::error_code& ec)
+    : token_(ASIO_MOVE_CAST(T)(completion_token)),
+      ec_(ec)
+  {
+  }
+
+//private:
+  CompletionToken token_;
+  asio::error_code& ec_;
+};
+
+/// Create a completion token to capture error_code values to a variable.
+template <typename CompletionToken>
+inline redirect_error_t<typename decay<CompletionToken>::type> redirect_error(
+    ASIO_MOVE_ARG(CompletionToken) completion_token,
+    asio::error_code& ec)
+{
+  return redirect_error_t<typename decay<CompletionToken>::type>(
+      ASIO_MOVE_CAST(CompletionToken)(completion_token), ec);
+}
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/redirect_error.hpp"
+
+#endif // ASIO_REDIRECT_ERROR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/serial_port.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/serial_port.hpp
new file mode 100644
index 00000000000..4551f77d596
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/serial_port.hpp
@@ -0,0 +1,36 @@
+//
+// serial_port.hpp
+// ~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2008 Rep Invariant Systems, Inc. (info@repinvariant.com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SERIAL_PORT_HPP
+#define ASIO_SERIAL_PORT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_SERIAL_PORT) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/basic_serial_port.hpp"
+
+namespace asio {
+
+/// Typedef for the typical usage of a serial port.
+typedef basic_serial_port<> serial_port;
+
+} // namespace asio
+
+#endif // defined(ASIO_HAS_SERIAL_PORT)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_SERIAL_PORT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/serial_port_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/serial_port_base.hpp
new file mode 100644
index 00000000000..f0a9ca6d990
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/serial_port_base.hpp
@@ -0,0 +1,167 @@
+//
+// serial_port_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2008 Rep Invariant Systems, Inc. (info@repinvariant.com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SERIAL_PORT_BASE_HPP
+#define ASIO_SERIAL_PORT_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_SERIAL_PORT) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#if !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+# include <termios.h>
+#endif // !defined(ASIO_WINDOWS) && !defined(__CYGWIN__)
+
+#include "asio/detail/socket_types.hpp"
+#include "asio/error_code.hpp"
+
+#if defined(GENERATING_DOCUMENTATION)
+# define ASIO_OPTION_STORAGE implementation_defined
+#elif defined(ASIO_WINDOWS) || defined(__CYGWIN__)
+# define ASIO_OPTION_STORAGE DCB
+#else
+# define ASIO_OPTION_STORAGE termios
+#endif
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// The serial_port_base class is used as a base for the basic_serial_port class
+/// template so that we have a common place to define the serial port options.
+class serial_port_base
+{
+public:
+  /// Serial port option to permit changing the baud rate.
+  /**
+   * Implements changing the baud rate for a given serial port.
+   */
+  class baud_rate
+  {
+  public:
+    explicit baud_rate(unsigned int rate = 0);
+    unsigned int value() const;
+    ASIO_DECL ASIO_SYNC_OP_VOID store(
+        ASIO_OPTION_STORAGE& storage,
+        asio::error_code& ec) const;
+    ASIO_DECL ASIO_SYNC_OP_VOID load(
+        const ASIO_OPTION_STORAGE& storage,
+        asio::error_code& ec);
+  private:
+    unsigned int value_;
+  };
+
+  /// Serial port option to permit changing the flow control.
+  /**
+   * Implements changing the flow control for a given serial port.
+   */
+  class flow_control
+  {
+  public:
+    enum type { none, software, hardware };
+    ASIO_DECL explicit flow_control(type t = none);
+    type value() const;
+    ASIO_DECL ASIO_SYNC_OP_VOID store(
+        ASIO_OPTION_STORAGE& storage,
+        asio::error_code& ec) const;
+    ASIO_DECL ASIO_SYNC_OP_VOID load(
+        const ASIO_OPTION_STORAGE& storage,
+        asio::error_code& ec);
+  private:
+    type value_;
+  };
+
+  /// Serial port option to permit changing the parity.
+  /**
+   * Implements changing the parity for a given serial port.
+   */
+  class parity
+  {
+  public:
+    enum type { none, odd, even };
+    ASIO_DECL explicit parity(type t = none);
+    type value() const;
+    ASIO_DECL ASIO_SYNC_OP_VOID store(
+        ASIO_OPTION_STORAGE& storage,
+        asio::error_code& ec) const;
+    ASIO_DECL ASIO_SYNC_OP_VOID load(
+        const ASIO_OPTION_STORAGE& storage,
+        asio::error_code& ec);
+  private:
+    type value_;
+  };
+
+  /// Serial port option to permit changing the number of stop bits.
+  /**
+   * Implements changing the number of stop bits for a given serial port.
+   */
+  class stop_bits
+  {
+  public:
+    enum type { one, onepointfive, two };
+    ASIO_DECL explicit stop_bits(type t = one);
+    type value() const;
+    ASIO_DECL ASIO_SYNC_OP_VOID store(
+        ASIO_OPTION_STORAGE& storage,
+        asio::error_code& ec) const;
+    ASIO_DECL ASIO_SYNC_OP_VOID load(
+        const ASIO_OPTION_STORAGE& storage,
+        asio::error_code& ec);
+  private:
+    type value_;
+  };
+
+  /// Serial port option to permit changing the character size.
+  /**
+   * Implements changing the character size for a given serial port.
+   */
+  class character_size
+  {
+  public:
+    ASIO_DECL explicit character_size(unsigned int t = 8);
+    unsigned int value() const;
+    ASIO_DECL ASIO_SYNC_OP_VOID store(
+        ASIO_OPTION_STORAGE& storage,
+        asio::error_code& ec) const;
+    ASIO_DECL ASIO_SYNC_OP_VOID load(
+        const ASIO_OPTION_STORAGE& storage,
+        asio::error_code& ec);
+  private:
+    unsigned int value_;
+  };
+
+protected:
+  /// Protected destructor to prevent deletion through this type.
+  ~serial_port_base()
+  {
+  }
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#undef ASIO_OPTION_STORAGE
+
+#include "asio/impl/serial_port_base.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/impl/serial_port_base.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // defined(ASIO_HAS_SERIAL_PORT)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_SERIAL_PORT_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/signal_set.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/signal_set.hpp
new file mode 100644
index 00000000000..6a27689a969
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/signal_set.hpp
@@ -0,0 +1,28 @@
+//
+// signal_set.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SIGNAL_SET_HPP
+#define ASIO_SIGNAL_SET_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/basic_signal_set.hpp"
+
+namespace asio {
+
+/// Typedef for the typical usage of a signal set.
+typedef basic_signal_set<> signal_set;
+
+} // namespace asio
+
+#endif // ASIO_SIGNAL_SET_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/socket_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/socket_base.hpp
new file mode 100644
index 00000000000..bf06c8c8575
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/socket_base.hpp
@@ -0,0 +1,559 @@
+//
+// socket_base.hpp
+// ~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SOCKET_BASE_HPP
+#define ASIO_SOCKET_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/io_control.hpp"
+#include "asio/detail/socket_option.hpp"
+#include "asio/detail/socket_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// The socket_base class is used as a base for the basic_stream_socket and
+/// basic_datagram_socket class templates so that we have a common place to
+/// define the shutdown_type and enum.
+class socket_base
+{
+public:
+  /// Different ways a socket may be shutdown.
+  enum shutdown_type
+  {
+#if defined(GENERATING_DOCUMENTATION)
+    /// Shutdown the receive side of the socket.
+    shutdown_receive = implementation_defined,
+
+    /// Shutdown the send side of the socket.
+    shutdown_send = implementation_defined,
+
+    /// Shutdown both send and receive on the socket.
+    shutdown_both = implementation_defined
+#else
+    shutdown_receive = ASIO_OS_DEF(SHUT_RD),
+    shutdown_send = ASIO_OS_DEF(SHUT_WR),
+    shutdown_both = ASIO_OS_DEF(SHUT_RDWR)
+#endif
+  };
+
+  /// Bitmask type for flags that can be passed to send and receive operations.
+  typedef int message_flags;
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// Peek at incoming data without removing it from the input queue.
+  static const int message_peek = implementation_defined;
+
+  /// Process out-of-band data.
+  static const int message_out_of_band = implementation_defined;
+
+  /// Specify that the data should not be subject to routing.
+  static const int message_do_not_route = implementation_defined;
+
+  /// Specifies that the data marks the end of a record.
+  static const int message_end_of_record = implementation_defined;
+#else
+  ASIO_STATIC_CONSTANT(int,
+      message_peek = ASIO_OS_DEF(MSG_PEEK));
+  ASIO_STATIC_CONSTANT(int,
+      message_out_of_band = ASIO_OS_DEF(MSG_OOB));
+  ASIO_STATIC_CONSTANT(int,
+      message_do_not_route = ASIO_OS_DEF(MSG_DONTROUTE));
+  ASIO_STATIC_CONSTANT(int,
+      message_end_of_record = ASIO_OS_DEF(MSG_EOR));
+#endif
+
+  /// Wait types.
+  /**
+   * For use with basic_socket::wait() and basic_socket::async_wait().
+   */
+  enum wait_type
+  {
+    /// Wait for a socket to become ready to read.
+    wait_read,
+
+    /// Wait for a socket to become ready to write.
+    wait_write,
+
+    /// Wait for a socket to have error conditions pending.
+    wait_error
+  };
+
+  /// Socket option to permit sending of broadcast messages.
+  /**
+   * Implements the SOL_SOCKET/SO_BROADCAST socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::udp::socket socket(my_context);
+   * ...
+   * asio::socket_base::broadcast option(true);
+   * socket.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::udp::socket socket(my_context);
+   * ...
+   * asio::socket_base::broadcast option;
+   * socket.get_option(option);
+   * bool is_set = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Boolean_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined broadcast;
+#else
+  typedef asio::detail::socket_option::boolean<
+    ASIO_OS_DEF(SOL_SOCKET), ASIO_OS_DEF(SO_BROADCAST)>
+      broadcast;
+#endif
+
+  /// Socket option to enable socket-level debugging.
+  /**
+   * Implements the SOL_SOCKET/SO_DEBUG socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::debug option(true);
+   * socket.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::debug option;
+   * socket.get_option(option);
+   * bool is_set = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Boolean_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined debug;
+#else
+  typedef asio::detail::socket_option::boolean<
+    ASIO_OS_DEF(SOL_SOCKET), ASIO_OS_DEF(SO_DEBUG)> debug;
+#endif
+
+  /// Socket option to prevent routing, use local interfaces only.
+  /**
+   * Implements the SOL_SOCKET/SO_DONTROUTE socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::udp::socket socket(my_context);
+   * ...
+   * asio::socket_base::do_not_route option(true);
+   * socket.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::udp::socket socket(my_context);
+   * ...
+   * asio::socket_base::do_not_route option;
+   * socket.get_option(option);
+   * bool is_set = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Boolean_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined do_not_route;
+#else
+  typedef asio::detail::socket_option::boolean<
+    ASIO_OS_DEF(SOL_SOCKET), ASIO_OS_DEF(SO_DONTROUTE)>
+      do_not_route;
+#endif
+
+  /// Socket option to send keep-alives.
+  /**
+   * Implements the SOL_SOCKET/SO_KEEPALIVE socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::keep_alive option(true);
+   * socket.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::keep_alive option;
+   * socket.get_option(option);
+   * bool is_set = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Boolean_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined keep_alive;
+#else
+  typedef asio::detail::socket_option::boolean<
+    ASIO_OS_DEF(SOL_SOCKET), ASIO_OS_DEF(SO_KEEPALIVE)> keep_alive;
+#endif
+
+  /// Socket option for the send buffer size of a socket.
+  /**
+   * Implements the SOL_SOCKET/SO_SNDBUF socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::send_buffer_size option(8192);
+   * socket.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::send_buffer_size option;
+   * socket.get_option(option);
+   * int size = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Integer_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined send_buffer_size;
+#else
+  typedef asio::detail::socket_option::integer<
+    ASIO_OS_DEF(SOL_SOCKET), ASIO_OS_DEF(SO_SNDBUF)>
+      send_buffer_size;
+#endif
+
+  /// Socket option for the send low watermark.
+  /**
+   * Implements the SOL_SOCKET/SO_SNDLOWAT socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::send_low_watermark option(1024);
+   * socket.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::send_low_watermark option;
+   * socket.get_option(option);
+   * int size = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Integer_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined send_low_watermark;
+#else
+  typedef asio::detail::socket_option::integer<
+    ASIO_OS_DEF(SOL_SOCKET), ASIO_OS_DEF(SO_SNDLOWAT)>
+      send_low_watermark;
+#endif
+
+  /// Socket option for the receive buffer size of a socket.
+  /**
+   * Implements the SOL_SOCKET/SO_RCVBUF socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::receive_buffer_size option(8192);
+   * socket.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::receive_buffer_size option;
+   * socket.get_option(option);
+   * int size = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Integer_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined receive_buffer_size;
+#else
+  typedef asio::detail::socket_option::integer<
+    ASIO_OS_DEF(SOL_SOCKET), ASIO_OS_DEF(SO_RCVBUF)>
+      receive_buffer_size;
+#endif
+
+  /// Socket option for the receive low watermark.
+  /**
+   * Implements the SOL_SOCKET/SO_RCVLOWAT socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::receive_low_watermark option(1024);
+   * socket.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::receive_low_watermark option;
+   * socket.get_option(option);
+   * int size = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Integer_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined receive_low_watermark;
+#else
+  typedef asio::detail::socket_option::integer<
+    ASIO_OS_DEF(SOL_SOCKET), ASIO_OS_DEF(SO_RCVLOWAT)>
+      receive_low_watermark;
+#endif
+
+  /// Socket option to allow the socket to be bound to an address that is
+  /// already in use.
+  /**
+   * Implements the SOL_SOCKET/SO_REUSEADDR socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::socket_base::reuse_address option(true);
+   * acceptor.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::socket_base::reuse_address option;
+   * acceptor.get_option(option);
+   * bool is_set = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Boolean_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined reuse_address;
+#else
+  typedef asio::detail::socket_option::boolean<
+    ASIO_OS_DEF(SOL_SOCKET), ASIO_OS_DEF(SO_REUSEADDR)>
+      reuse_address;
+#endif
+
+  /// Socket option to specify whether the socket lingers on close if unsent
+  /// data is present.
+  /**
+   * Implements the SOL_SOCKET/SO_LINGER socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::linger option(true, 30);
+   * socket.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::linger option;
+   * socket.get_option(option);
+   * bool is_set = option.enabled();
+   * unsigned short timeout = option.timeout();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Linger_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined linger;
+#else
+  typedef asio::detail::socket_option::linger<
+    ASIO_OS_DEF(SOL_SOCKET), ASIO_OS_DEF(SO_LINGER)>
+      linger;
+#endif
+
+  /// Socket option for putting received out-of-band data inline.
+  /**
+   * Implements the SOL_SOCKET/SO_OOBINLINE socket option.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::out_of_band_inline option(true);
+   * socket.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::out_of_band_inline option;
+   * socket.get_option(option);
+   * bool value = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Boolean_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined out_of_band_inline;
+#else
+  typedef asio::detail::socket_option::boolean<
+    ASIO_OS_DEF(SOL_SOCKET), ASIO_OS_DEF(SO_OOBINLINE)>
+      out_of_band_inline;
+#endif
+
+  /// Socket option to report aborted connections on accept.
+  /**
+   * Implements a custom socket option that determines whether or not an accept
+   * operation is permitted to fail with asio::error::connection_aborted.
+   * By default the option is false.
+   *
+   * @par Examples
+   * Setting the option:
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::socket_base::enable_connection_aborted option(true);
+   * acceptor.set_option(option);
+   * @endcode
+   *
+   * @par
+   * Getting the current option value:
+   * @code
+   * asio::ip::tcp::acceptor acceptor(my_context);
+   * ...
+   * asio::socket_base::enable_connection_aborted option;
+   * acceptor.get_option(option);
+   * bool is_set = option.value();
+   * @endcode
+   *
+   * @par Concepts:
+   * Socket_Option, Boolean_Socket_Option.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined enable_connection_aborted;
+#else
+  typedef asio::detail::socket_option::boolean<
+    asio::detail::custom_socket_option_level,
+    asio::detail::enable_connection_aborted_option>
+    enable_connection_aborted;
+#endif
+
+  /// IO control command to get the amount of data that can be read without
+  /// blocking.
+  /**
+   * Implements the FIONREAD IO control command.
+   *
+   * @par Example
+   * @code
+   * asio::ip::tcp::socket socket(my_context);
+   * ...
+   * asio::socket_base::bytes_readable command(true);
+   * socket.io_control(command);
+   * std::size_t bytes_readable = command.get();
+   * @endcode
+   *
+   * @par Concepts:
+   * IO_Control_Command, Size_IO_Control_Command.
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined bytes_readable;
+#else
+  typedef asio::detail::io_control::bytes_readable bytes_readable;
+#endif
+
+  /// The maximum length of the queue of pending incoming connections.
+#if defined(GENERATING_DOCUMENTATION)
+  static const int max_listen_connections = implementation_defined;
+#else
+  ASIO_STATIC_CONSTANT(int, max_listen_connections
+      = ASIO_OS_DEF(SOMAXCONN));
+#endif
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use max_listen_connections.) The maximum length of the queue
+  /// of pending incoming connections.
+#if defined(GENERATING_DOCUMENTATION)
+  static const int max_connections = implementation_defined;
+#else
+  ASIO_STATIC_CONSTANT(int, max_connections
+      = ASIO_OS_DEF(SOMAXCONN));
+#endif
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+protected:
+  /// Protected destructor to prevent deletion through this type.
+  ~socket_base()
+  {
+  }
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SOCKET_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/spawn.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/spawn.hpp
new file mode 100644
index 00000000000..4f8b8905a6c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/spawn.hpp
@@ -0,0 +1,336 @@
+//
+// spawn.hpp
+// ~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SPAWN_HPP
+#define ASIO_SPAWN_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <boost/coroutine/all.hpp>
+#include "asio/bind_executor.hpp"
+#include "asio/detail/memory.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/detail/wrapped_handler.hpp"
+#include "asio/executor.hpp"
+#include "asio/io_context.hpp"
+#include "asio/is_executor.hpp"
+#include "asio/strand.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Context object the represents the currently executing coroutine.
+/**
+ * The basic_yield_context class is used to represent the currently executing
+ * stackful coroutine. A basic_yield_context may be passed as a handler to an
+ * asynchronous operation. For example:
+ *
+ * @code template <typename Handler>
+ * void my_coroutine(basic_yield_context<Handler> yield)
+ * {
+ *   ...
+ *   std::size_t n = my_socket.async_read_some(buffer, yield);
+ *   ...
+ * } @endcode
+ *
+ * The initiating function (async_read_some in the above example) suspends the
+ * current coroutine. The coroutine is resumed when the asynchronous operation
+ * completes, and the result of the operation is returned.
+ */
+template <typename Handler>
+class basic_yield_context
+{
+public:
+  /// The coroutine callee type, used by the implementation.
+  /**
+   * When using Boost.Coroutine v1, this type is:
+   * @code typename coroutine<void()> @endcode
+   * When using Boost.Coroutine v2 (unidirectional coroutines), this type is:
+   * @code push_coroutine<void> @endcode
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined callee_type;
+#elif defined(BOOST_COROUTINES_UNIDIRECT) || defined(BOOST_COROUTINES_V2)
+  typedef boost::coroutines::push_coroutine<void> callee_type;
+#else
+  typedef boost::coroutines::coroutine<void()> callee_type;
+#endif
+  
+  /// The coroutine caller type, used by the implementation.
+  /**
+   * When using Boost.Coroutine v1, this type is:
+   * @code typename coroutine<void()>::caller_type @endcode
+   * When using Boost.Coroutine v2 (unidirectional coroutines), this type is:
+   * @code pull_coroutine<void> @endcode
+   */
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined caller_type;
+#elif defined(BOOST_COROUTINES_UNIDIRECT) || defined(BOOST_COROUTINES_V2)
+  typedef boost::coroutines::pull_coroutine<void> caller_type;
+#else
+  typedef boost::coroutines::coroutine<void()>::caller_type caller_type;
+#endif
+
+  /// Construct a yield context to represent the specified coroutine.
+  /**
+   * Most applications do not need to use this constructor. Instead, the
+   * spawn() function passes a yield context as an argument to the coroutine
+   * function.
+   */
+  basic_yield_context(
+      const detail::weak_ptr<callee_type>& coro,
+      caller_type& ca, Handler& handler)
+    : coro_(coro),
+      ca_(ca),
+      handler_(handler),
+      ec_(0)
+  {
+  }
+
+  /// Construct a yield context from another yield context type.
+  /**
+   * Requires that OtherHandler be convertible to Handler.
+   */
+  template <typename OtherHandler>
+  basic_yield_context(const basic_yield_context<OtherHandler>& other)
+    : coro_(other.coro_),
+      ca_(other.ca_),
+      handler_(other.handler_),
+      ec_(other.ec_)
+  {
+  }
+
+  /// Return a yield context that sets the specified error_code.
+  /**
+   * By default, when a yield context is used with an asynchronous operation, a
+   * non-success error_code is converted to system_error and thrown. This
+   * operator may be used to specify an error_code object that should instead be
+   * set with the asynchronous operation's result. For example:
+   *
+   * @code template <typename Handler>
+   * void my_coroutine(basic_yield_context<Handler> yield)
+   * {
+   *   ...
+   *   std::size_t n = my_socket.async_read_some(buffer, yield[ec]);
+   *   if (ec)
+   *   {
+   *     // An error occurred.
+   *   }
+   *   ...
+   * } @endcode
+   */
+  basic_yield_context operator[](asio::error_code& ec) const
+  {
+    basic_yield_context tmp(*this);
+    tmp.ec_ = &ec;
+    return tmp;
+  }
+
+#if defined(GENERATING_DOCUMENTATION)
+private:
+#endif // defined(GENERATING_DOCUMENTATION)
+  detail::weak_ptr<callee_type> coro_;
+  caller_type& ca_;
+  Handler handler_;
+  asio::error_code* ec_;
+};
+
+#if defined(GENERATING_DOCUMENTATION)
+/// Context object that represents the currently executing coroutine.
+typedef basic_yield_context<unspecified> yield_context;
+#else // defined(GENERATING_DOCUMENTATION)
+typedef basic_yield_context<
+  executor_binder<void(*)(), executor> > yield_context;
+#endif // defined(GENERATING_DOCUMENTATION)
+
+/**
+ * @defgroup spawn asio::spawn
+ *
+ * @brief Start a new stackful coroutine.
+ *
+ * The spawn() function is a high-level wrapper over the Boost.Coroutine
+ * library. This function enables programs to implement asynchronous logic in a
+ * synchronous manner, as illustrated by the following example:
+ *
+ * @code asio::spawn(my_strand, do_echo);
+ *
+ * // ...
+ *
+ * void do_echo(asio::yield_context yield)
+ * {
+ *   try
+ *   {
+ *     char data[128];
+ *     for (;;)
+ *     {
+ *       std::size_t length =
+ *         my_socket.async_read_some(
+ *           asio::buffer(data), yield);
+ *
+ *       asio::async_write(my_socket,
+ *           asio::buffer(data, length), yield);
+ *     }
+ *   }
+ *   catch (std::exception& e)
+ *   {
+ *     // ...
+ *   }
+ * } @endcode
+ */
+/*@{*/
+
+/// Start a new stackful coroutine, calling the specified handler when it
+/// completes.
+/**
+ * This function is used to launch a new coroutine.
+ *
+ * @param function The coroutine function. The function must have the signature:
+ * @code void function(basic_yield_context<Handler> yield); @endcode
+ *
+ * @param attributes Boost.Coroutine attributes used to customise the coroutine.
+ */
+template <typename Function>
+void spawn(ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes
+      = boost::coroutines::attributes());
+
+/// Start a new stackful coroutine, calling the specified handler when it
+/// completes.
+/**
+ * This function is used to launch a new coroutine.
+ *
+ * @param handler A handler to be called when the coroutine exits. More
+ * importantly, the handler provides an execution context (via the the handler
+ * invocation hook) for the coroutine. The handler must have the signature:
+ * @code void handler(); @endcode
+ *
+ * @param function The coroutine function. The function must have the signature:
+ * @code void function(basic_yield_context<Handler> yield); @endcode
+ *
+ * @param attributes Boost.Coroutine attributes used to customise the coroutine.
+ */
+template <typename Handler, typename Function>
+void spawn(ASIO_MOVE_ARG(Handler) handler,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes
+      = boost::coroutines::attributes(),
+    typename enable_if<!is_executor<typename decay<Handler>::type>::value &&
+      !is_convertible<Handler&, execution_context&>::value>::type* = 0);
+
+/// Start a new stackful coroutine, inheriting the execution context of another.
+/**
+ * This function is used to launch a new coroutine.
+ *
+ * @param ctx Identifies the current coroutine as a parent of the new
+ * coroutine. This specifies that the new coroutine should inherit the
+ * execution context of the parent. For example, if the parent coroutine is
+ * executing in a particular strand, then the new coroutine will execute in the
+ * same strand.
+ *
+ * @param function The coroutine function. The function must have the signature:
+ * @code void function(basic_yield_context<Handler> yield); @endcode
+ *
+ * @param attributes Boost.Coroutine attributes used to customise the coroutine.
+ */
+template <typename Handler, typename Function>
+void spawn(basic_yield_context<Handler> ctx,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes
+      = boost::coroutines::attributes());
+
+/// Start a new stackful coroutine that executes on a given executor.
+/**
+ * This function is used to launch a new coroutine.
+ *
+ * @param ex Identifies the executor that will run the coroutine. The new
+ * coroutine is implicitly given its own strand within this executor.
+ *
+ * @param function The coroutine function. The function must have the signature:
+ * @code void function(yield_context yield); @endcode
+ *
+ * @param attributes Boost.Coroutine attributes used to customise the coroutine.
+ */
+template <typename Function, typename Executor>
+void spawn(const Executor& ex,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes
+      = boost::coroutines::attributes(),
+    typename enable_if<is_executor<Executor>::value>::type* = 0);
+
+/// Start a new stackful coroutine that executes on a given strand.
+/**
+ * This function is used to launch a new coroutine.
+ *
+ * @param ex Identifies the strand that will run the coroutine.
+ *
+ * @param function The coroutine function. The function must have the signature:
+ * @code void function(yield_context yield); @endcode
+ *
+ * @param attributes Boost.Coroutine attributes used to customise the coroutine.
+ */
+template <typename Function, typename Executor>
+void spawn(const strand<Executor>& ex,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes
+      = boost::coroutines::attributes());
+
+/// Start a new stackful coroutine that executes in the context of a strand.
+/**
+ * This function is used to launch a new coroutine.
+ *
+ * @param s Identifies a strand. By starting multiple coroutines on the same
+ * strand, the implementation ensures that none of those coroutines can execute
+ * simultaneously.
+ *
+ * @param function The coroutine function. The function must have the signature:
+ * @code void function(yield_context yield); @endcode
+ *
+ * @param attributes Boost.Coroutine attributes used to customise the coroutine.
+ */
+template <typename Function>
+void spawn(const asio::io_context::strand& s,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes
+      = boost::coroutines::attributes());
+
+/// Start a new stackful coroutine that executes on a given execution context.
+/**
+ * This function is used to launch a new coroutine.
+ *
+ * @param ctx Identifies the execution context that will run the coroutine. The
+ * new coroutine is implicitly given its own strand within this execution
+ * context.
+ *
+ * @param function The coroutine function. The function must have the signature:
+ * @code void function(yield_context yield); @endcode
+ *
+ * @param attributes Boost.Coroutine attributes used to customise the coroutine.
+ */
+template <typename Function, typename ExecutionContext>
+void spawn(ExecutionContext& ctx,
+    ASIO_MOVE_ARG(Function) function,
+    const boost::coroutines::attributes& attributes
+      = boost::coroutines::attributes(),
+    typename enable_if<is_convertible<
+      ExecutionContext&, execution_context&>::value>::type* = 0);
+
+/*@}*/
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/spawn.hpp"
+
+#endif // ASIO_SPAWN_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl.hpp
new file mode 100644
index 00000000000..19b1da47642
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl.hpp
@@ -0,0 +1,27 @@
+//
+// ssl.hpp
+// ~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_HPP
+#define ASIO_SSL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/ssl/context.hpp"
+#include "asio/ssl/context_base.hpp"
+#include "asio/ssl/error.hpp"
+#include "asio/ssl/rfc2818_verification.hpp"
+#include "asio/ssl/stream.hpp"
+#include "asio/ssl/stream_base.hpp"
+#include "asio/ssl/verify_context.hpp"
+#include "asio/ssl/verify_mode.hpp"
+
+#endif // ASIO_SSL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/context.hpp
new file mode 100644
index 00000000000..9657d774b7b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/context.hpp
@@ -0,0 +1,758 @@
+//
+// ssl/context.hpp
+// ~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_CONTEXT_HPP
+#define ASIO_SSL_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include <string>
+#include "asio/buffer.hpp"
+#include "asio/io_context.hpp"
+#include "asio/ssl/context_base.hpp"
+#include "asio/ssl/detail/openssl_types.hpp"
+#include "asio/ssl/detail/openssl_init.hpp"
+#include "asio/ssl/detail/password_callback.hpp"
+#include "asio/ssl/detail/verify_callback.hpp"
+#include "asio/ssl/verify_mode.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+
+class context
+  : public context_base,
+    private noncopyable
+{
+public:
+  /// The native handle type of the SSL context.
+  typedef SSL_CTX* native_handle_type;
+
+  /// Constructor.
+  ASIO_DECL explicit context(method m);
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a context from another.
+  /**
+   * This constructor moves an SSL context from one object to another.
+   *
+   * @param other The other context object from which the move will occur.
+   *
+   * @note Following the move, the following operations only are valid for the
+   * moved-from object:
+   * @li Destruction.
+   * @li As a target for move-assignment.
+   */
+  ASIO_DECL context(context&& other);
+
+  /// Move-assign a context from another.
+  /**
+   * This assignment operator moves an SSL context from one object to another.
+   *
+   * @param other The other context object from which the move will occur.
+   *
+   * @note Following the move, the following operations only are valid for the
+   * moved-from object:
+   * @li Destruction.
+   * @li As a target for move-assignment.
+   */
+  ASIO_DECL context& operator=(context&& other);
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destructor.
+  ASIO_DECL ~context();
+
+  /// Get the underlying implementation in the native type.
+  /**
+   * This function may be used to obtain the underlying implementation of the
+   * context. This is intended to allow access to context functionality that is
+   * not otherwise provided.
+   */
+  ASIO_DECL native_handle_type native_handle();
+
+  /// Clear options on the context.
+  /**
+   * This function may be used to configure the SSL options used by the context.
+   *
+   * @param o A bitmask of options. The available option values are defined in
+   * the context_base class. The specified options, if currently enabled on the
+   * context, are cleared.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_clear_options.
+   */
+  ASIO_DECL void clear_options(options o);
+
+  /// Clear options on the context.
+  /**
+   * This function may be used to configure the SSL options used by the context.
+   *
+   * @param o A bitmask of options. The available option values are defined in
+   * the context_base class. The specified options, if currently enabled on the
+   * context, are cleared.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_clear_options.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID clear_options(options o,
+      asio::error_code& ec);
+
+  /// Set options on the context.
+  /**
+   * This function may be used to configure the SSL options used by the context.
+   *
+   * @param o A bitmask of options. The available option values are defined in
+   * the context_base class. The options are bitwise-ored with any existing
+   * value for the options.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_set_options.
+   */
+  ASIO_DECL void set_options(options o);
+
+  /// Set options on the context.
+  /**
+   * This function may be used to configure the SSL options used by the context.
+   *
+   * @param o A bitmask of options. The available option values are defined in
+   * the context_base class. The options are bitwise-ored with any existing
+   * value for the options.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_set_options.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID set_options(options o,
+      asio::error_code& ec);
+
+  /// Set the peer verification mode.
+  /**
+   * This function may be used to configure the peer verification mode used by
+   * the context.
+   *
+   * @param v A bitmask of peer verification modes. See @ref verify_mode for
+   * available values.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_set_verify.
+   */
+  ASIO_DECL void set_verify_mode(verify_mode v);
+
+  /// Set the peer verification mode.
+  /**
+   * This function may be used to configure the peer verification mode used by
+   * the context.
+   *
+   * @param v A bitmask of peer verification modes. See @ref verify_mode for
+   * available values.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_set_verify.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID set_verify_mode(
+      verify_mode v, asio::error_code& ec);
+
+  /// Set the peer verification depth.
+  /**
+   * This function may be used to configure the maximum verification depth
+   * allowed by the context.
+   *
+   * @param depth Maximum depth for the certificate chain verification that
+   * shall be allowed.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_set_verify_depth.
+   */
+  ASIO_DECL void set_verify_depth(int depth);
+
+  /// Set the peer verification depth.
+  /**
+   * This function may be used to configure the maximum verification depth
+   * allowed by the context.
+   *
+   * @param depth Maximum depth for the certificate chain verification that
+   * shall be allowed.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_set_verify_depth.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID set_verify_depth(
+      int depth, asio::error_code& ec);
+
+  /// Set the callback used to verify peer certificates.
+  /**
+   * This function is used to specify a callback function that will be called
+   * by the implementation when it needs to verify a peer certificate.
+   *
+   * @param callback The function object to be used for verifying a certificate.
+   * The function signature of the handler must be:
+   * @code bool verify_callback(
+   *   bool preverified, // True if the certificate passed pre-verification.
+   *   verify_context& ctx // The peer certificate and other context.
+   * ); @endcode
+   * The return value of the callback is true if the certificate has passed
+   * verification, false otherwise.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_set_verify.
+   */
+  template <typename VerifyCallback>
+  void set_verify_callback(VerifyCallback callback);
+
+  /// Set the callback used to verify peer certificates.
+  /**
+   * This function is used to specify a callback function that will be called
+   * by the implementation when it needs to verify a peer certificate.
+   *
+   * @param callback The function object to be used for verifying a certificate.
+   * The function signature of the handler must be:
+   * @code bool verify_callback(
+   *   bool preverified, // True if the certificate passed pre-verification.
+   *   verify_context& ctx // The peer certificate and other context.
+   * ); @endcode
+   * The return value of the callback is true if the certificate has passed
+   * verification, false otherwise.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_set_verify.
+   */
+  template <typename VerifyCallback>
+  ASIO_SYNC_OP_VOID set_verify_callback(VerifyCallback callback,
+      asio::error_code& ec);
+
+  /// Load a certification authority file for performing verification.
+  /**
+   * This function is used to load one or more trusted certification authorities
+   * from a file.
+   *
+   * @param filename The name of a file containing certification authority
+   * certificates in PEM format.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_load_verify_locations.
+   */
+  ASIO_DECL void load_verify_file(const std::string& filename);
+
+  /// Load a certification authority file for performing verification.
+  /**
+   * This function is used to load the certificates for one or more trusted
+   * certification authorities from a file.
+   *
+   * @param filename The name of a file containing certification authority
+   * certificates in PEM format.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_load_verify_locations.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID load_verify_file(
+      const std::string& filename, asio::error_code& ec);
+
+  /// Add certification authority for performing verification.
+  /**
+   * This function is used to add one trusted certification authority
+   * from a memory buffer.
+   *
+   * @param ca The buffer containing the certification authority certificate.
+   * The certificate must use the PEM format.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_get_cert_store and @c X509_STORE_add_cert.
+   */
+  ASIO_DECL void add_certificate_authority(const const_buffer& ca);
+
+  /// Add certification authority for performing verification.
+  /**
+   * This function is used to add one trusted certification authority
+   * from a memory buffer.
+   *
+   * @param ca The buffer containing the certification authority certificate.
+   * The certificate must use the PEM format.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_get_cert_store and @c X509_STORE_add_cert.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID add_certificate_authority(
+      const const_buffer& ca, asio::error_code& ec);
+
+  /// Configures the context to use the default directories for finding
+  /// certification authority certificates.
+  /**
+   * This function specifies that the context should use the default,
+   * system-dependent directories for locating certification authority
+   * certificates.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_set_default_verify_paths.
+   */
+  ASIO_DECL void set_default_verify_paths();
+
+  /// Configures the context to use the default directories for finding
+  /// certification authority certificates.
+  /**
+   * This function specifies that the context should use the default,
+   * system-dependent directories for locating certification authority
+   * certificates.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_set_default_verify_paths.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID set_default_verify_paths(
+      asio::error_code& ec);
+
+  /// Add a directory containing certificate authority files to be used for
+  /// performing verification.
+  /**
+   * This function is used to specify the name of a directory containing
+   * certification authority certificates. Each file in the directory must
+   * contain a single certificate. The files must be named using the subject
+   * name's hash and an extension of ".0".
+   *
+   * @param path The name of a directory containing the certificates.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_load_verify_locations.
+   */
+  ASIO_DECL void add_verify_path(const std::string& path);
+
+  /// Add a directory containing certificate authority files to be used for
+  /// performing verification.
+  /**
+   * This function is used to specify the name of a directory containing
+   * certification authority certificates. Each file in the directory must
+   * contain a single certificate. The files must be named using the subject
+   * name's hash and an extension of ".0".
+   *
+   * @param path The name of a directory containing the certificates.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_load_verify_locations.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID add_verify_path(
+      const std::string& path, asio::error_code& ec);
+
+  /// Use a certificate from a memory buffer.
+  /**
+   * This function is used to load a certificate into the context from a buffer.
+   *
+   * @param certificate The buffer containing the certificate.
+   *
+   * @param format The certificate format (ASN.1 or PEM).
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_use_certificate or SSL_CTX_use_certificate_ASN1.
+   */
+  ASIO_DECL void use_certificate(
+      const const_buffer& certificate, file_format format);
+
+  /// Use a certificate from a memory buffer.
+  /**
+   * This function is used to load a certificate into the context from a buffer.
+   *
+   * @param certificate The buffer containing the certificate.
+   *
+   * @param format The certificate format (ASN.1 or PEM).
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_use_certificate or SSL_CTX_use_certificate_ASN1.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID use_certificate(
+      const const_buffer& certificate, file_format format,
+      asio::error_code& ec);
+
+  /// Use a certificate from a file.
+  /**
+   * This function is used to load a certificate into the context from a file.
+   *
+   * @param filename The name of the file containing the certificate.
+   *
+   * @param format The file format (ASN.1 or PEM).
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_use_certificate_file.
+   */
+  ASIO_DECL void use_certificate_file(
+      const std::string& filename, file_format format);
+
+  /// Use a certificate from a file.
+  /**
+   * This function is used to load a certificate into the context from a file.
+   *
+   * @param filename The name of the file containing the certificate.
+   *
+   * @param format The file format (ASN.1 or PEM).
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_use_certificate_file.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID use_certificate_file(
+      const std::string& filename, file_format format,
+      asio::error_code& ec);
+
+  /// Use a certificate chain from a memory buffer.
+  /**
+   * This function is used to load a certificate chain into the context from a
+   * buffer.
+   *
+   * @param chain The buffer containing the certificate chain. The certificate
+   * chain must use the PEM format.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_use_certificate and SSL_CTX_add_extra_chain_cert.
+   */
+  ASIO_DECL void use_certificate_chain(const const_buffer& chain);
+
+  /// Use a certificate chain from a memory buffer.
+  /**
+   * This function is used to load a certificate chain into the context from a
+   * buffer.
+   *
+   * @param chain The buffer containing the certificate chain. The certificate
+   * chain must use the PEM format.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_use_certificate and SSL_CTX_add_extra_chain_cert.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID use_certificate_chain(
+      const const_buffer& chain, asio::error_code& ec);
+
+  /// Use a certificate chain from a file.
+  /**
+   * This function is used to load a certificate chain into the context from a
+   * file.
+   *
+   * @param filename The name of the file containing the certificate. The file
+   * must use the PEM format.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_use_certificate_chain_file.
+   */
+  ASIO_DECL void use_certificate_chain_file(const std::string& filename);
+
+  /// Use a certificate chain from a file.
+  /**
+   * This function is used to load a certificate chain into the context from a
+   * file.
+   *
+   * @param filename The name of the file containing the certificate. The file
+   * must use the PEM format.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_use_certificate_chain_file.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID use_certificate_chain_file(
+      const std::string& filename, asio::error_code& ec);
+
+  /// Use a private key from a memory buffer.
+  /**
+   * This function is used to load a private key into the context from a buffer.
+   *
+   * @param private_key The buffer containing the private key.
+   *
+   * @param format The private key format (ASN.1 or PEM).
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_use_PrivateKey or SSL_CTX_use_PrivateKey_ASN1.
+   */
+  ASIO_DECL void use_private_key(
+      const const_buffer& private_key, file_format format);
+
+  /// Use a private key from a memory buffer.
+  /**
+   * This function is used to load a private key into the context from a buffer.
+   *
+   * @param private_key The buffer containing the private key.
+   *
+   * @param format The private key format (ASN.1 or PEM).
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_use_PrivateKey or SSL_CTX_use_PrivateKey_ASN1.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID use_private_key(
+      const const_buffer& private_key, file_format format,
+      asio::error_code& ec);
+
+  /// Use a private key from a file.
+  /**
+   * This function is used to load a private key into the context from a file.
+   *
+   * @param filename The name of the file containing the private key.
+   *
+   * @param format The file format (ASN.1 or PEM).
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_use_PrivateKey_file.
+   */
+  ASIO_DECL void use_private_key_file(
+      const std::string& filename, file_format format);
+
+  /// Use a private key from a file.
+  /**
+   * This function is used to load a private key into the context from a file.
+   *
+   * @param filename The name of the file containing the private key.
+   *
+   * @param format The file format (ASN.1 or PEM).
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_use_PrivateKey_file.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID use_private_key_file(
+      const std::string& filename, file_format format,
+      asio::error_code& ec);
+
+  /// Use an RSA private key from a memory buffer.
+  /**
+   * This function is used to load an RSA private key into the context from a
+   * buffer.
+   *
+   * @param private_key The buffer containing the RSA private key.
+   *
+   * @param format The private key format (ASN.1 or PEM).
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_use_RSAPrivateKey or SSL_CTX_use_RSAPrivateKey_ASN1.
+   */
+  ASIO_DECL void use_rsa_private_key(
+      const const_buffer& private_key, file_format format);
+
+  /// Use an RSA private key from a memory buffer.
+  /**
+   * This function is used to load an RSA private key into the context from a
+   * buffer.
+   *
+   * @param private_key The buffer containing the RSA private key.
+   *
+   * @param format The private key format (ASN.1 or PEM).
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_use_RSAPrivateKey or SSL_CTX_use_RSAPrivateKey_ASN1.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID use_rsa_private_key(
+      const const_buffer& private_key, file_format format,
+      asio::error_code& ec);
+
+  /// Use an RSA private key from a file.
+  /**
+   * This function is used to load an RSA private key into the context from a
+   * file.
+   *
+   * @param filename The name of the file containing the RSA private key.
+   *
+   * @param format The file format (ASN.1 or PEM).
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_use_RSAPrivateKey_file.
+   */
+  ASIO_DECL void use_rsa_private_key_file(
+      const std::string& filename, file_format format);
+
+  /// Use an RSA private key from a file.
+  /**
+   * This function is used to load an RSA private key into the context from a
+   * file.
+   *
+   * @param filename The name of the file containing the RSA private key.
+   *
+   * @param format The file format (ASN.1 or PEM).
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_use_RSAPrivateKey_file.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID use_rsa_private_key_file(
+      const std::string& filename, file_format format,
+      asio::error_code& ec);
+
+  /// Use the specified memory buffer to obtain the temporary Diffie-Hellman
+  /// parameters.
+  /**
+   * This function is used to load Diffie-Hellman parameters into the context
+   * from a buffer.
+   *
+   * @param dh The memory buffer containing the Diffie-Hellman parameters. The
+   * buffer must use the PEM format.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_set_tmp_dh.
+   */
+  ASIO_DECL void use_tmp_dh(const const_buffer& dh);
+
+  /// Use the specified memory buffer to obtain the temporary Diffie-Hellman
+  /// parameters.
+  /**
+   * This function is used to load Diffie-Hellman parameters into the context
+   * from a buffer.
+   *
+   * @param dh The memory buffer containing the Diffie-Hellman parameters. The
+   * buffer must use the PEM format.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_set_tmp_dh.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID use_tmp_dh(
+      const const_buffer& dh, asio::error_code& ec);
+
+  /// Use the specified file to obtain the temporary Diffie-Hellman parameters.
+  /**
+   * This function is used to load Diffie-Hellman parameters into the context
+   * from a file.
+   *
+   * @param filename The name of the file containing the Diffie-Hellman
+   * parameters. The file must use the PEM format.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_set_tmp_dh.
+   */
+  ASIO_DECL void use_tmp_dh_file(const std::string& filename);
+
+  /// Use the specified file to obtain the temporary Diffie-Hellman parameters.
+  /**
+   * This function is used to load Diffie-Hellman parameters into the context
+   * from a file.
+   *
+   * @param filename The name of the file containing the Diffie-Hellman
+   * parameters. The file must use the PEM format.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_set_tmp_dh.
+   */
+  ASIO_DECL ASIO_SYNC_OP_VOID use_tmp_dh_file(
+      const std::string& filename, asio::error_code& ec);
+
+  /// Set the password callback.
+  /**
+   * This function is used to specify a callback function to obtain password
+   * information about an encrypted key in PEM format.
+   *
+   * @param callback The function object to be used for obtaining the password.
+   * The function signature of the handler must be:
+   * @code std::string password_callback(
+   *   std::size_t max_length,  // The maximum size for a password.
+   *   password_purpose purpose // Whether password is for reading or writing.
+   * ); @endcode
+   * The return value of the callback is a string containing the password.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_CTX_set_default_passwd_cb.
+   */
+  template <typename PasswordCallback>
+  void set_password_callback(PasswordCallback callback);
+
+  /// Set the password callback.
+  /**
+   * This function is used to specify a callback function to obtain password
+   * information about an encrypted key in PEM format.
+   *
+   * @param callback The function object to be used for obtaining the password.
+   * The function signature of the handler must be:
+   * @code std::string password_callback(
+   *   std::size_t max_length,  // The maximum size for a password.
+   *   password_purpose purpose // Whether password is for reading or writing.
+   * ); @endcode
+   * The return value of the callback is a string containing the password.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_CTX_set_default_passwd_cb.
+   */
+  template <typename PasswordCallback>
+  ASIO_SYNC_OP_VOID set_password_callback(PasswordCallback callback,
+      asio::error_code& ec);
+
+private:
+  struct bio_cleanup;
+  struct x509_cleanup;
+  struct evp_pkey_cleanup;
+  struct rsa_cleanup;
+  struct dh_cleanup;
+
+  // Helper function used to set a peer certificate verification callback.
+  ASIO_DECL ASIO_SYNC_OP_VOID do_set_verify_callback(
+      detail::verify_callback_base* callback, asio::error_code& ec);
+
+  // Callback used when the SSL implementation wants to verify a certificate.
+  ASIO_DECL static int verify_callback_function(
+      int preverified, X509_STORE_CTX* ctx);
+
+  // Helper function used to set a password callback.
+  ASIO_DECL ASIO_SYNC_OP_VOID do_set_password_callback(
+      detail::password_callback_base* callback, asio::error_code& ec);
+
+  // Callback used when the SSL implementation wants a password.
+  ASIO_DECL static int password_callback_function(
+      char* buf, int size, int purpose, void* data);
+
+  // Helper function to set the temporary Diffie-Hellman parameters from a BIO.
+  ASIO_DECL ASIO_SYNC_OP_VOID do_use_tmp_dh(
+      BIO* bio, asio::error_code& ec);
+
+  // Helper function to make a BIO from a memory buffer.
+  ASIO_DECL BIO* make_buffer_bio(const const_buffer& b);
+
+  // The underlying native implementation.
+  native_handle_type handle_;
+
+  // Ensure openssl is initialised.
+  asio::ssl::detail::openssl_init<> init_;
+};
+
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/ssl/impl/context.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ssl/impl/context.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_SSL_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/context_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/context_base.hpp
new file mode 100644
index 00000000000..fd103e7b99a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/context_base.hpp
@@ -0,0 +1,209 @@
+//
+// ssl/context_base.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_CONTEXT_BASE_HPP
+#define ASIO_SSL_CONTEXT_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/ssl/detail/openssl_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+
+/// The context_base class is used as a base for the basic_context class
+/// template so that we have a common place to define various enums.
+class context_base
+{
+public:
+  /// Different methods supported by a context.
+  enum method
+  {
+    /// Generic SSL version 2.
+    sslv2,
+
+    /// SSL version 2 client.
+    sslv2_client,
+
+    /// SSL version 2 server.
+    sslv2_server,
+
+    /// Generic SSL version 3.
+    sslv3,
+
+    /// SSL version 3 client.
+    sslv3_client,
+
+    /// SSL version 3 server.
+    sslv3_server,
+
+    /// Generic TLS version 1.
+    tlsv1,
+
+    /// TLS version 1 client.
+    tlsv1_client,
+
+    /// TLS version 1 server.
+    tlsv1_server,
+
+    /// Generic SSL/TLS.
+    sslv23,
+
+    /// SSL/TLS client.
+    sslv23_client,
+
+    /// SSL/TLS server.
+    sslv23_server,
+
+    /// Generic TLS version 1.1.
+    tlsv11,
+
+    /// TLS version 1.1 client.
+    tlsv11_client,
+
+    /// TLS version 1.1 server.
+    tlsv11_server,
+
+    /// Generic TLS version 1.2.
+    tlsv12,
+
+    /// TLS version 1.2 client.
+    tlsv12_client,
+
+    /// TLS version 1.2 server.
+    tlsv12_server,
+
+    /// Generic TLS version 1.3.
+    tlsv13,
+
+    /// TLS version 1.3 client.
+    tlsv13_client,
+
+    /// TLS version 1.3 server.
+    tlsv13_server,
+
+    /// Generic TLS.
+    tls,
+
+    /// TLS client.
+    tls_client,
+
+    /// TLS server.
+    tls_server
+  };
+
+  /// Bitmask type for SSL options.
+  typedef long options;
+
+#if defined(GENERATING_DOCUMENTATION)
+  /// Implement various bug workarounds.
+  static const long default_workarounds = implementation_defined;
+
+  /// Always create a new key when using tmp_dh parameters.
+  static const long single_dh_use = implementation_defined;
+
+  /// Disable SSL v2.
+  static const long no_sslv2 = implementation_defined;
+
+  /// Disable SSL v3.
+  static const long no_sslv3 = implementation_defined;
+
+  /// Disable TLS v1.
+  static const long no_tlsv1 = implementation_defined;
+
+  /// Disable TLS v1.1.
+  static const long no_tlsv1_1 = implementation_defined;
+
+  /// Disable TLS v1.2.
+  static const long no_tlsv1_2 = implementation_defined;
+
+  /// Disable TLS v1.3.
+  static const long no_tlsv1_3 = implementation_defined;
+
+  /// Disable compression. Compression is disabled by default.
+  static const long no_compression = implementation_defined;
+#else
+  ASIO_STATIC_CONSTANT(long, default_workarounds = SSL_OP_ALL);
+  ASIO_STATIC_CONSTANT(long, single_dh_use = SSL_OP_SINGLE_DH_USE);
+  ASIO_STATIC_CONSTANT(long, no_sslv2 = SSL_OP_NO_SSLv2);
+  ASIO_STATIC_CONSTANT(long, no_sslv3 = SSL_OP_NO_SSLv3);
+  ASIO_STATIC_CONSTANT(long, no_tlsv1 = SSL_OP_NO_TLSv1);
+# if defined(SSL_OP_NO_TLSv1_1)
+  ASIO_STATIC_CONSTANT(long, no_tlsv1_1 = SSL_OP_NO_TLSv1_1);
+# else // defined(SSL_OP_NO_TLSv1_1)
+  ASIO_STATIC_CONSTANT(long, no_tlsv1_1 = 0x10000000L);
+# endif // defined(SSL_OP_NO_TLSv1_1)
+# if defined(SSL_OP_NO_TLSv1_2)
+  ASIO_STATIC_CONSTANT(long, no_tlsv1_2 = SSL_OP_NO_TLSv1_2);
+# else // defined(SSL_OP_NO_TLSv1_2)
+  ASIO_STATIC_CONSTANT(long, no_tlsv1_2 = 0x08000000L);
+# endif // defined(SSL_OP_NO_TLSv1_2)
+# if defined(SSL_OP_NO_TLSv1_3)
+  ASIO_STATIC_CONSTANT(long, no_tlsv1_3 = SSL_OP_NO_TLSv1_3);
+# else // defined(SSL_OP_NO_TLSv1_3)
+  ASIO_STATIC_CONSTANT(long, no_tlsv1_3 = 0x20000000L);
+# endif // defined(SSL_OP_NO_TLSv1_3)
+# if defined(SSL_OP_NO_COMPRESSION)
+  ASIO_STATIC_CONSTANT(long, no_compression = SSL_OP_NO_COMPRESSION);
+# else // defined(SSL_OP_NO_COMPRESSION)
+  ASIO_STATIC_CONSTANT(long, no_compression = 0x20000L);
+# endif // defined(SSL_OP_NO_COMPRESSION)
+#endif
+
+  /// File format types.
+  enum file_format
+  {
+    /// ASN.1 file.
+    asn1,
+
+    /// PEM file.
+    pem
+  };
+
+#if !defined(GENERATING_DOCUMENTATION)
+  // The following types and constants are preserved for backward compatibility.
+  // New programs should use the equivalents of the same names that are defined
+  // in the asio::ssl namespace.
+  typedef int verify_mode;
+  ASIO_STATIC_CONSTANT(int, verify_none = SSL_VERIFY_NONE);
+  ASIO_STATIC_CONSTANT(int, verify_peer = SSL_VERIFY_PEER);
+  ASIO_STATIC_CONSTANT(int,
+      verify_fail_if_no_peer_cert = SSL_VERIFY_FAIL_IF_NO_PEER_CERT);
+  ASIO_STATIC_CONSTANT(int, verify_client_once = SSL_VERIFY_CLIENT_ONCE);
+#endif
+
+  /// Purpose of PEM password.
+  enum password_purpose
+  {
+    /// The password is needed for reading/decryption.
+    for_reading,
+
+    /// The password is needed for writing/encryption.
+    for_writing
+  };
+
+protected:
+  /// Protected destructor to prevent deletion through this type.
+  ~context_base()
+  {
+  }
+};
+
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_CONTEXT_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/buffered_handshake_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/buffered_handshake_op.hpp
new file mode 100644
index 00000000000..97deb1de013
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/buffered_handshake_op.hpp
@@ -0,0 +1,114 @@
+//
+// ssl/detail/buffered_handshake_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_BUFFERED_HANDSHAKE_OP_HPP
+#define ASIO_SSL_DETAIL_BUFFERED_HANDSHAKE_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/ssl/detail/engine.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+namespace detail {
+
+template <typename ConstBufferSequence>
+class buffered_handshake_op
+{
+public:
+  buffered_handshake_op(stream_base::handshake_type type,
+      const ConstBufferSequence& buffers)
+    : type_(type),
+      buffers_(buffers),
+      total_buffer_size_(asio::buffer_size(buffers_))
+  {
+  }
+
+  engine::want operator()(engine& eng,
+      asio::error_code& ec,
+      std::size_t& bytes_transferred) const
+  {
+    return this->process(eng, ec, bytes_transferred,
+        asio::buffer_sequence_begin(buffers_),
+        asio::buffer_sequence_end(buffers_));
+  }
+
+  template <typename Handler>
+  void call_handler(Handler& handler,
+      const asio::error_code& ec,
+      const std::size_t& bytes_transferred) const
+  {
+    handler(ec, bytes_transferred);
+  }
+
+private:
+  template <typename Iterator>
+  engine::want process(engine& eng,
+      asio::error_code& ec,
+      std::size_t& bytes_transferred,
+      Iterator begin, Iterator end) const
+  {
+    Iterator iter = begin;
+    std::size_t accumulated_size = 0;
+
+    for (;;)
+    {
+      engine::want want = eng.handshake(type_, ec);
+      if (want != engine::want_input_and_retry
+          || bytes_transferred == total_buffer_size_)
+        return want;
+
+      // Find the next buffer piece to be fed to the engine.
+      while (iter != end)
+      {
+        const_buffer buffer(*iter);
+
+        // Skip over any buffers which have already been consumed by the engine.
+        if (bytes_transferred >= accumulated_size + buffer.size())
+        {
+          accumulated_size += buffer.size();
+          ++iter;
+          continue;
+        }
+
+        // The current buffer may have been partially consumed by the engine on
+        // a previous iteration. If so, adjust the buffer to point to the
+        // unused portion.
+        if (bytes_transferred > accumulated_size)
+          buffer = buffer + (bytes_transferred - accumulated_size);
+
+        // Pass the buffer to the engine, and update the bytes transferred to
+        // reflect the total number of bytes consumed so far.
+        bytes_transferred += buffer.size();
+        buffer = eng.put_input(buffer);
+        bytes_transferred -= buffer.size();
+        break;
+      }
+    }
+  }
+
+  stream_base::handshake_type type_;
+  ConstBufferSequence buffers_;
+  std::size_t total_buffer_size_;
+};
+
+} // namespace detail
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_DETAIL_BUFFERED_HANDSHAKE_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/engine.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/engine.hpp
new file mode 100644
index 00000000000..8a798c13fdd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/engine.hpp
@@ -0,0 +1,160 @@
+//
+// ssl/detail/engine.hpp
+// ~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_ENGINE_HPP
+#define ASIO_SSL_DETAIL_ENGINE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/buffer.hpp"
+#include "asio/detail/static_mutex.hpp"
+#include "asio/ssl/detail/openssl_types.hpp"
+#include "asio/ssl/detail/verify_callback.hpp"
+#include "asio/ssl/stream_base.hpp"
+#include "asio/ssl/verify_mode.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+namespace detail {
+
+class engine
+{
+public:
+  enum want
+  {
+    // Returned by functions to indicate that the engine wants input. The input
+    // buffer should be updated to point to the data. The engine then needs to
+    // be called again to retry the operation.
+    want_input_and_retry = -2,
+
+    // Returned by functions to indicate that the engine wants to write output.
+    // The output buffer points to the data to be written. The engine then
+    // needs to be called again to retry the operation.
+    want_output_and_retry = -1,
+
+    // Returned by functions to indicate that the engine doesn't need input or
+    // output.
+    want_nothing = 0,
+
+    // Returned by functions to indicate that the engine wants to write output.
+    // The output buffer points to the data to be written. After that the
+    // operation is complete, and the engine does not need to be called again.
+    want_output = 1
+  };
+
+  // Construct a new engine for the specified context.
+  ASIO_DECL explicit engine(SSL_CTX* context);
+
+  // Destructor.
+  ASIO_DECL ~engine();
+
+  // Get the underlying implementation in the native type.
+  ASIO_DECL SSL* native_handle();
+
+  // Set the peer verification mode.
+  ASIO_DECL asio::error_code set_verify_mode(
+      verify_mode v, asio::error_code& ec);
+
+  // Set the peer verification depth.
+  ASIO_DECL asio::error_code set_verify_depth(
+      int depth, asio::error_code& ec);
+
+  // Set a peer certificate verification callback.
+  ASIO_DECL asio::error_code set_verify_callback(
+      verify_callback_base* callback, asio::error_code& ec);
+
+  // Perform an SSL handshake using either SSL_connect (client-side) or
+  // SSL_accept (server-side).
+  ASIO_DECL want handshake(
+      stream_base::handshake_type type, asio::error_code& ec);
+
+  // Perform a graceful shutdown of the SSL session.
+  ASIO_DECL want shutdown(asio::error_code& ec);
+
+  // Write bytes to the SSL session.
+  ASIO_DECL want write(const asio::const_buffer& data,
+      asio::error_code& ec, std::size_t& bytes_transferred);
+
+  // Read bytes from the SSL session.
+  ASIO_DECL want read(const asio::mutable_buffer& data,
+      asio::error_code& ec, std::size_t& bytes_transferred);
+
+  // Get output data to be written to the transport.
+  ASIO_DECL asio::mutable_buffer get_output(
+      const asio::mutable_buffer& data);
+
+  // Put input data that was read from the transport.
+  ASIO_DECL asio::const_buffer put_input(
+      const asio::const_buffer& data);
+
+  // Map an error::eof code returned by the underlying transport according to
+  // the type and state of the SSL session. Returns a const reference to the
+  // error code object, suitable for passing to a completion handler.
+  ASIO_DECL const asio::error_code& map_error_code(
+      asio::error_code& ec) const;
+
+private:
+  // Disallow copying and assignment.
+  engine(const engine&);
+  engine& operator=(const engine&);
+
+  // Callback used when the SSL implementation wants to verify a certificate.
+  ASIO_DECL static int verify_callback_function(
+      int preverified, X509_STORE_CTX* ctx);
+
+#if (OPENSSL_VERSION_NUMBER < 0x10000000L)
+  // The SSL_accept function may not be thread safe. This mutex is used to
+  // protect all calls to the SSL_accept function.
+  ASIO_DECL static asio::detail::static_mutex& accept_mutex();
+#endif // (OPENSSL_VERSION_NUMBER < 0x10000000L)
+
+  // Perform one operation. Returns >= 0 on success or error, want_read if the
+  // operation needs more input, or want_write if it needs to write some output
+  // before the operation can complete.
+  ASIO_DECL want perform(int (engine::* op)(void*, std::size_t),
+      void* data, std::size_t length, asio::error_code& ec,
+      std::size_t* bytes_transferred);
+
+  // Adapt the SSL_accept function to the signature needed for perform().
+  ASIO_DECL int do_accept(void*, std::size_t);
+
+  // Adapt the SSL_connect function to the signature needed for perform().
+  ASIO_DECL int do_connect(void*, std::size_t);
+
+  // Adapt the SSL_shutdown function to the signature needed for perform().
+  ASIO_DECL int do_shutdown(void*, std::size_t);
+
+  // Adapt the SSL_read function to the signature needed for perform().
+  ASIO_DECL int do_read(void* data, std::size_t length);
+
+  // Adapt the SSL_write function to the signature needed for perform().
+  ASIO_DECL int do_write(void* data, std::size_t length);
+
+  SSL* ssl_;
+  BIO* ext_bio_;
+};
+
+} // namespace detail
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ssl/detail/impl/engine.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_SSL_DETAIL_ENGINE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/handshake_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/handshake_op.hpp
new file mode 100644
index 00000000000..d070c066977
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/handshake_op.hpp
@@ -0,0 +1,62 @@
+//
+// ssl/detail/handshake_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_HANDSHAKE_OP_HPP
+#define ASIO_SSL_DETAIL_HANDSHAKE_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/ssl/detail/engine.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+namespace detail {
+
+class handshake_op
+{
+public:
+  handshake_op(stream_base::handshake_type type)
+    : type_(type)
+  {
+  }
+
+  engine::want operator()(engine& eng,
+      asio::error_code& ec,
+      std::size_t& bytes_transferred) const
+  {
+    bytes_transferred = 0;
+    return eng.handshake(type_, ec);
+  }
+
+  template <typename Handler>
+  void call_handler(Handler& handler,
+      const asio::error_code& ec,
+      const std::size_t&) const
+  {
+    handler(ec);
+  }
+
+private:
+  stream_base::handshake_type type_;
+};
+
+} // namespace detail
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_DETAIL_HANDSHAKE_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/io.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/io.hpp
new file mode 100644
index 00000000000..b3848cd9be5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/io.hpp
@@ -0,0 +1,381 @@
+//
+// ssl/detail/io.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_IO_HPP
+#define ASIO_SSL_DETAIL_IO_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/ssl/detail/engine.hpp"
+#include "asio/ssl/detail/stream_core.hpp"
+#include "asio/write.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+namespace detail {
+
+template <typename Stream, typename Operation>
+std::size_t io(Stream& next_layer, stream_core& core,
+    const Operation& op, asio::error_code& ec)
+{
+  asio::error_code io_ec;
+  std::size_t bytes_transferred = 0;
+  do switch (op(core.engine_, ec, bytes_transferred))
+  {
+  case engine::want_input_and_retry:
+
+    // If the input buffer is empty then we need to read some more data from
+    // the underlying transport.
+    if (core.input_.size() == 0)
+    {
+      core.input_ = asio::buffer(core.input_buffer_,
+          next_layer.read_some(core.input_buffer_, io_ec));
+      if (!ec)
+        ec = io_ec;
+    }
+
+    // Pass the new input data to the engine.
+    core.input_ = core.engine_.put_input(core.input_);
+
+    // Try the operation again.
+    continue;
+
+  case engine::want_output_and_retry:
+
+    // Get output data from the engine and write it to the underlying
+    // transport.
+    asio::write(next_layer,
+        core.engine_.get_output(core.output_buffer_), io_ec);
+    if (!ec)
+      ec = io_ec;
+
+    // Try the operation again.
+    continue;
+
+  case engine::want_output:
+
+    // Get output data from the engine and write it to the underlying
+    // transport.
+    asio::write(next_layer,
+        core.engine_.get_output(core.output_buffer_), io_ec);
+    if (!ec)
+      ec = io_ec;
+
+    // Operation is complete. Return result to caller.
+    core.engine_.map_error_code(ec);
+    return bytes_transferred;
+
+  default:
+
+    // Operation is complete. Return result to caller.
+    core.engine_.map_error_code(ec);
+    return bytes_transferred;
+
+  } while (!ec);
+
+  // Operation failed. Return result to caller.
+  core.engine_.map_error_code(ec);
+  return 0;
+}
+
+template <typename Stream, typename Operation, typename Handler>
+class io_op
+{
+public:
+  io_op(Stream& next_layer, stream_core& core,
+      const Operation& op, Handler& handler)
+    : next_layer_(next_layer),
+      core_(core),
+      op_(op),
+      start_(0),
+      want_(engine::want_nothing),
+      bytes_transferred_(0),
+      handler_(ASIO_MOVE_CAST(Handler)(handler))
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE)
+  io_op(const io_op& other)
+    : next_layer_(other.next_layer_),
+      core_(other.core_),
+      op_(other.op_),
+      start_(other.start_),
+      want_(other.want_),
+      ec_(other.ec_),
+      bytes_transferred_(other.bytes_transferred_),
+      handler_(other.handler_)
+  {
+  }
+
+  io_op(io_op&& other)
+    : next_layer_(other.next_layer_),
+      core_(other.core_),
+      op_(ASIO_MOVE_CAST(Operation)(other.op_)),
+      start_(other.start_),
+      want_(other.want_),
+      ec_(other.ec_),
+      bytes_transferred_(other.bytes_transferred_),
+      handler_(ASIO_MOVE_CAST(Handler)(other.handler_))
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE)
+
+  void operator()(asio::error_code ec,
+      std::size_t bytes_transferred = ~std::size_t(0), int start = 0)
+  {
+    switch (start_ = start)
+    {
+    case 1: // Called after at least one async operation.
+      do
+      {
+        switch (want_ = op_(core_.engine_, ec_, bytes_transferred_))
+        {
+        case engine::want_input_and_retry:
+
+          // If the input buffer already has data in it we can pass it to the
+          // engine and then retry the operation immediately.
+          if (core_.input_.size() != 0)
+          {
+            core_.input_ = core_.engine_.put_input(core_.input_);
+            continue;
+          }
+
+          // The engine wants more data to be read from input. However, we
+          // cannot allow more than one read operation at a time on the
+          // underlying transport. The pending_read_ timer's expiry is set to
+          // pos_infin if a read is in progress, and neg_infin otherwise.
+          if (core_.expiry(core_.pending_read_) == core_.neg_infin())
+          {
+            // Prevent other read operations from being started.
+            core_.pending_read_.expires_at(core_.pos_infin());
+
+            // Start reading some data from the underlying transport.
+            next_layer_.async_read_some(
+                asio::buffer(core_.input_buffer_),
+                ASIO_MOVE_CAST(io_op)(*this));
+          }
+          else
+          {
+            // Wait until the current read operation completes.
+            core_.pending_read_.async_wait(ASIO_MOVE_CAST(io_op)(*this));
+          }
+
+          // Yield control until asynchronous operation completes. Control
+          // resumes at the "default:" label below.
+          return;
+
+        case engine::want_output_and_retry:
+        case engine::want_output:
+
+          // The engine wants some data to be written to the output. However, we
+          // cannot allow more than one write operation at a time on the
+          // underlying transport. The pending_write_ timer's expiry is set to
+          // pos_infin if a write is in progress, and neg_infin otherwise.
+          if (core_.expiry(core_.pending_write_) == core_.neg_infin())
+          {
+            // Prevent other write operations from being started.
+            core_.pending_write_.expires_at(core_.pos_infin());
+
+            // Start writing all the data to the underlying transport.
+            asio::async_write(next_layer_,
+                core_.engine_.get_output(core_.output_buffer_),
+                ASIO_MOVE_CAST(io_op)(*this));
+          }
+          else
+          {
+            // Wait until the current write operation completes.
+            core_.pending_write_.async_wait(ASIO_MOVE_CAST(io_op)(*this));
+          }
+
+          // Yield control until asynchronous operation completes. Control
+          // resumes at the "default:" label below.
+          return;
+
+        default:
+
+          // The SSL operation is done and we can invoke the handler, but we
+          // have to keep in mind that this function might be being called from
+          // the async operation's initiating function. In this case we're not
+          // allowed to call the handler directly. Instead, issue a zero-sized
+          // read so the handler runs "as-if" posted using io_context::post().
+          if (start)
+          {
+            next_layer_.async_read_some(
+                asio::buffer(core_.input_buffer_, 0),
+                ASIO_MOVE_CAST(io_op)(*this));
+
+            // Yield control until asynchronous operation completes. Control
+            // resumes at the "default:" label below.
+            return;
+          }
+          else
+          {
+            // Continue on to run handler directly.
+            break;
+          }
+        }
+
+        default:
+        if (bytes_transferred == ~std::size_t(0))
+          bytes_transferred = 0; // Timer cancellation, no data transferred.
+        else if (!ec_)
+          ec_ = ec;
+
+        switch (want_)
+        {
+        case engine::want_input_and_retry:
+
+          // Add received data to the engine's input.
+          core_.input_ = asio::buffer(
+              core_.input_buffer_, bytes_transferred);
+          core_.input_ = core_.engine_.put_input(core_.input_);
+
+          // Release any waiting read operations.
+          core_.pending_read_.expires_at(core_.neg_infin());
+
+          // Try the operation again.
+          continue;
+
+        case engine::want_output_and_retry:
+
+          // Release any waiting write operations.
+          core_.pending_write_.expires_at(core_.neg_infin());
+
+          // Try the operation again.
+          continue;
+
+        case engine::want_output:
+
+          // Release any waiting write operations.
+          core_.pending_write_.expires_at(core_.neg_infin());
+
+          // Fall through to call handler.
+
+        default:
+
+          // Pass the result to the handler.
+          op_.call_handler(handler_,
+              core_.engine_.map_error_code(ec_),
+              ec_ ? 0 : bytes_transferred_);
+
+          // Our work here is done.
+          return;
+        }
+      } while (!ec_);
+
+      // Operation failed. Pass the result to the handler.
+      op_.call_handler(handler_, core_.engine_.map_error_code(ec_), 0);
+    }
+  }
+
+//private:
+  Stream& next_layer_;
+  stream_core& core_;
+  Operation op_;
+  int start_;
+  engine::want want_;
+  asio::error_code ec_;
+  std::size_t bytes_transferred_;
+  Handler handler_;
+};
+
+template <typename Stream, typename Operation, typename Handler>
+inline void* asio_handler_allocate(std::size_t size,
+    io_op<Stream, Operation, Handler>* this_handler)
+{
+  return asio_handler_alloc_helpers::allocate(
+      size, this_handler->handler_);
+}
+
+template <typename Stream, typename Operation, typename Handler>
+inline void asio_handler_deallocate(void* pointer, std::size_t size,
+    io_op<Stream, Operation, Handler>* this_handler)
+{
+  asio_handler_alloc_helpers::deallocate(
+      pointer, size, this_handler->handler_);
+}
+
+template <typename Stream, typename Operation, typename Handler>
+inline bool asio_handler_is_continuation(
+    io_op<Stream, Operation, Handler>* this_handler)
+{
+  return this_handler->start_ == 0 ? true
+    : asio_handler_cont_helpers::is_continuation(this_handler->handler_);
+}
+
+template <typename Function, typename Stream,
+    typename Operation, typename Handler>
+inline void asio_handler_invoke(Function& function,
+    io_op<Stream, Operation, Handler>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Function, typename Stream,
+    typename Operation, typename Handler>
+inline void asio_handler_invoke(const Function& function,
+    io_op<Stream, Operation, Handler>* this_handler)
+{
+  asio_handler_invoke_helpers::invoke(
+      function, this_handler->handler_);
+}
+
+template <typename Stream, typename Operation, typename Handler>
+inline void async_io(Stream& next_layer, stream_core& core,
+    const Operation& op, Handler& handler)
+{
+  io_op<Stream, Operation, Handler>(
+    next_layer, core, op, handler)(
+      asio::error_code(), 0, 1);
+}
+
+} // namespace detail
+} // namespace ssl
+
+template <typename Stream, typename Operation,
+    typename Handler, typename Allocator>
+struct associated_allocator<
+    ssl::detail::io_op<Stream, Operation, Handler>, Allocator>
+{
+  typedef typename associated_allocator<Handler, Allocator>::type type;
+
+  static type get(const ssl::detail::io_op<Stream, Operation, Handler>& h,
+      const Allocator& a = Allocator()) ASIO_NOEXCEPT
+  {
+    return associated_allocator<Handler, Allocator>::get(h.handler_, a);
+  }
+};
+
+template <typename Stream, typename Operation,
+    typename Handler, typename Executor>
+struct associated_executor<
+    ssl::detail::io_op<Stream, Operation, Handler>, Executor>
+{
+  typedef typename associated_executor<Handler, Executor>::type type;
+
+  static type get(const ssl::detail::io_op<Stream, Operation, Handler>& h,
+      const Executor& ex = Executor()) ASIO_NOEXCEPT
+  {
+    return associated_executor<Handler, Executor>::get(h.handler_, ex);
+  }
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_DETAIL_IO_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/openssl_init.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/openssl_init.hpp
new file mode 100644
index 00000000000..1ee3b576acf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/openssl_init.hpp
@@ -0,0 +1,101 @@
+//
+// ssl/detail/openssl_init.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_OPENSSL_INIT_HPP
+#define ASIO_SSL_DETAIL_OPENSSL_INIT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstring>
+#include "asio/detail/memory.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/ssl/detail/openssl_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+namespace detail {
+
+class openssl_init_base
+  : private noncopyable
+{
+protected:
+  // Class that performs the actual initialisation.
+  class do_init;
+
+  // Helper function to manage a do_init singleton. The static instance of the
+  // openssl_init object ensures that this function is always called before
+  // main, and therefore before any other threads can get started. The do_init
+  // instance must be static in this function to ensure that it gets
+  // initialised before any other global objects try to use it.
+  ASIO_DECL static asio::detail::shared_ptr<do_init> instance();
+
+#if !defined(SSL_OP_NO_COMPRESSION) \
+  && (OPENSSL_VERSION_NUMBER >= 0x00908000L)
+  // Get an empty stack of compression methods, to be used when disabling
+  // compression.
+  ASIO_DECL static STACK_OF(SSL_COMP)* get_null_compression_methods();
+#endif // !defined(SSL_OP_NO_COMPRESSION)
+       // && (OPENSSL_VERSION_NUMBER >= 0x00908000L)
+};
+
+template <bool Do_Init = true>
+class openssl_init : private openssl_init_base
+{
+public:
+  // Constructor.
+  openssl_init()
+    : ref_(instance())
+  {
+    using namespace std; // For memmove.
+
+    // Ensure openssl_init::instance_ is linked in.
+    openssl_init* tmp = &instance_;
+    memmove(&tmp, &tmp, sizeof(openssl_init*));
+  }
+
+  // Destructor.
+  ~openssl_init()
+  {
+  }
+
+#if !defined(SSL_OP_NO_COMPRESSION) \
+  && (OPENSSL_VERSION_NUMBER >= 0x00908000L)
+  using openssl_init_base::get_null_compression_methods;
+#endif // !defined(SSL_OP_NO_COMPRESSION)
+       // && (OPENSSL_VERSION_NUMBER >= 0x00908000L)
+
+private:
+  // Instance to force initialisation of openssl at global scope.
+  static openssl_init instance_;
+
+  // Reference to singleton do_init object to ensure that openssl does not get
+  // cleaned up until the last user has finished with it.
+  asio::detail::shared_ptr<do_init> ref_;
+};
+
+template <bool Do_Init>
+openssl_init<Do_Init> openssl_init<Do_Init>::instance_;
+
+} // namespace detail
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ssl/detail/impl/openssl_init.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_SSL_DETAIL_OPENSSL_INIT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/openssl_types.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/openssl_types.hpp
new file mode 100644
index 00000000000..eb3359eec82
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/openssl_types.hpp
@@ -0,0 +1,33 @@
+//
+// ssl/detail/openssl_types.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_OPENSSL_TYPES_HPP
+#define ASIO_SSL_DETAIL_OPENSSL_TYPES_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/socket_types.hpp"
+#if defined(ASIO_USE_WOLFSSL)
+# include <wolfssl/options.h>
+#endif // defined(ASIO_USE_WOLFSSL)
+#include <openssl/conf.h>
+#include <openssl/ssl.h>
+#if !defined(OPENSSL_NO_ENGINE)
+# include <openssl/engine.h>
+#endif // !defined(OPENSSL_NO_ENGINE)
+#include <openssl/dh.h>
+#include <openssl/err.h>
+#include <openssl/rsa.h>
+#include <openssl/x509v3.h>
+
+#endif // ASIO_SSL_DETAIL_OPENSSL_TYPES_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/password_callback.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/password_callback.hpp
new file mode 100644
index 00000000000..82466253c76
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/password_callback.hpp
@@ -0,0 +1,66 @@
+//
+// ssl/detail/password_callback.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_PASSWORD_CALLBACK_HPP
+#define ASIO_SSL_DETAIL_PASSWORD_CALLBACK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include <cstddef>
+#include <string>
+#include "asio/ssl/context_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+namespace detail {
+
+class password_callback_base
+{
+public:
+  virtual ~password_callback_base()
+  {
+  }
+
+  virtual std::string call(std::size_t size,
+      context_base::password_purpose purpose) = 0;
+};
+
+template <typename PasswordCallback>
+class password_callback : public password_callback_base
+{
+public:
+  explicit password_callback(PasswordCallback callback)
+    : callback_(callback)
+  {
+  }
+
+  virtual std::string call(std::size_t size,
+      context_base::password_purpose purpose)
+  {
+    return callback_(size, purpose);
+  }
+
+private:
+  PasswordCallback callback_;
+};
+
+} // namespace detail
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_DETAIL_PASSWORD_CALLBACK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/read_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/read_op.hpp
new file mode 100644
index 00000000000..b73070e2a93
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/read_op.hpp
@@ -0,0 +1,67 @@
+//
+// ssl/detail/read_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_READ_OP_HPP
+#define ASIO_SSL_DETAIL_READ_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/ssl/detail/engine.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+namespace detail {
+
+template <typename MutableBufferSequence>
+class read_op
+{
+public:
+  read_op(const MutableBufferSequence& buffers)
+    : buffers_(buffers)
+  {
+  }
+
+  engine::want operator()(engine& eng,
+      asio::error_code& ec,
+      std::size_t& bytes_transferred) const
+  {
+    asio::mutable_buffer buffer =
+      asio::detail::buffer_sequence_adapter<asio::mutable_buffer,
+        MutableBufferSequence>::first(buffers_);
+
+    return eng.read(buffer, ec, bytes_transferred);
+  }
+
+  template <typename Handler>
+  void call_handler(Handler& handler,
+      const asio::error_code& ec,
+      const std::size_t& bytes_transferred) const
+  {
+    handler(ec, bytes_transferred);
+  }
+
+private:
+  MutableBufferSequence buffers_;
+};
+
+} // namespace detail
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_DETAIL_READ_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/shutdown_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/shutdown_op.hpp
new file mode 100644
index 00000000000..b8c6994887c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/shutdown_op.hpp
@@ -0,0 +1,64 @@
+//
+// ssl/detail/shutdown_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_SHUTDOWN_OP_HPP
+#define ASIO_SSL_DETAIL_SHUTDOWN_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/ssl/detail/engine.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+namespace detail {
+
+class shutdown_op
+{
+public:
+  engine::want operator()(engine& eng,
+      asio::error_code& ec,
+      std::size_t& bytes_transferred) const
+  {
+    bytes_transferred = 0;
+    return eng.shutdown(ec);
+  }
+
+  template <typename Handler>
+  void call_handler(Handler& handler,
+      const asio::error_code& ec,
+      const std::size_t&) const
+  {
+    if (ec == asio::error::eof)
+    {
+      // The engine only generates an eof when the shutdown notification has
+      // been received from the peer. This indicates that the shutdown has
+      // completed successfully, and thus need not be passed on to the handler.
+      handler(asio::error_code());
+    }
+    else
+    {
+      handler(ec);
+    }
+  }
+};
+
+} // namespace detail
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_DETAIL_SHUTDOWN_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/stream_core.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/stream_core.hpp
new file mode 100644
index 00000000000..9533c66fe4f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/stream_core.hpp
@@ -0,0 +1,135 @@
+//
+// ssl/detail/stream_core.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_STREAM_CORE_HPP
+#define ASIO_SSL_DETAIL_STREAM_CORE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_BOOST_DATE_TIME)
+# include "asio/deadline_timer.hpp"
+#else // defined(ASIO_HAS_BOOST_DATE_TIME)
+# include "asio/steady_timer.hpp"
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+#include "asio/ssl/detail/engine.hpp"
+#include "asio/buffer.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+namespace detail {
+
+struct stream_core
+{
+  // According to the OpenSSL documentation, this is the buffer size that is
+  // sufficient to hold the largest possible TLS record.
+  enum { max_tls_record_size = 17 * 1024 };
+
+  template <typename Executor>
+  stream_core(SSL_CTX* context, const Executor& ex)
+    : engine_(context),
+      pending_read_(ex),
+      pending_write_(ex),
+      output_buffer_space_(max_tls_record_size),
+      output_buffer_(asio::buffer(output_buffer_space_)),
+      input_buffer_space_(max_tls_record_size),
+      input_buffer_(asio::buffer(input_buffer_space_))
+  {
+    pending_read_.expires_at(neg_infin());
+    pending_write_.expires_at(neg_infin());
+  }
+
+  ~stream_core()
+  {
+  }
+
+  // The SSL engine.
+  engine engine_;
+
+#if defined(ASIO_HAS_BOOST_DATE_TIME)
+  // Timer used for storing queued read operations.
+  asio::deadline_timer pending_read_;
+
+  // Timer used for storing queued write operations.
+  asio::deadline_timer pending_write_;
+
+  // Helper function for obtaining a time value that always fires.
+  static asio::deadline_timer::time_type neg_infin()
+  {
+    return boost::posix_time::neg_infin;
+  }
+
+  // Helper function for obtaining a time value that never fires.
+  static asio::deadline_timer::time_type pos_infin()
+  {
+    return boost::posix_time::pos_infin;
+  }
+
+  // Helper function to get a timer's expiry time.
+  static asio::deadline_timer::time_type expiry(
+      const asio::deadline_timer& timer)
+  {
+    return timer.expires_at();
+  }
+#else // defined(ASIO_HAS_BOOST_DATE_TIME)
+  // Timer used for storing queued read operations.
+  asio::steady_timer pending_read_;
+
+  // Timer used for storing queued write operations.
+  asio::steady_timer pending_write_;
+
+  // Helper function for obtaining a time value that always fires.
+  static asio::steady_timer::time_point neg_infin()
+  {
+    return (asio::steady_timer::time_point::min)();
+  }
+
+  // Helper function for obtaining a time value that never fires.
+  static asio::steady_timer::time_point pos_infin()
+  {
+    return (asio::steady_timer::time_point::max)();
+  }
+
+  // Helper function to get a timer's expiry time.
+  static asio::steady_timer::time_point expiry(
+      const asio::steady_timer& timer)
+  {
+    return timer.expiry();
+  }
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+
+  // Buffer space used to prepare output intended for the transport.
+  std::vector<unsigned char> output_buffer_space_;
+
+  // A buffer that may be used to prepare output intended for the transport.
+  const asio::mutable_buffer output_buffer_;
+
+  // Buffer space used to read input intended for the engine.
+  std::vector<unsigned char> input_buffer_space_;
+
+  // A buffer that may be used to read input intended for the engine.
+  const asio::mutable_buffer input_buffer_;
+
+  // The buffer pointing to the engine's unconsumed input.
+  asio::const_buffer input_;
+};
+
+} // namespace detail
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_DETAIL_STREAM_CORE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/verify_callback.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/verify_callback.hpp
new file mode 100644
index 00000000000..c26d28c433b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/verify_callback.hpp
@@ -0,0 +1,62 @@
+//
+// ssl/detail/verify_callback.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_VERIFY_CALLBACK_HPP
+#define ASIO_SSL_DETAIL_VERIFY_CALLBACK_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/ssl/verify_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+namespace detail {
+
+class verify_callback_base
+{
+public:
+  virtual ~verify_callback_base()
+  {
+  }
+
+  virtual bool call(bool preverified, verify_context& ctx) = 0;
+};
+
+template <typename VerifyCallback>
+class verify_callback : public verify_callback_base
+{
+public:
+  explicit verify_callback(VerifyCallback callback)
+    : callback_(callback)
+  {
+  }
+
+  virtual bool call(bool preverified, verify_context& ctx)
+  {
+    return callback_(preverified, ctx);
+  }
+
+private:
+  VerifyCallback callback_;
+};
+
+} // namespace detail
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_DETAIL_VERIFY_CALLBACK_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/write_op.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/write_op.hpp
new file mode 100644
index 00000000000..a180014a183
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/detail/write_op.hpp
@@ -0,0 +1,67 @@
+//
+// ssl/detail/write_op.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_DETAIL_WRITE_OP_HPP
+#define ASIO_SSL_DETAIL_WRITE_OP_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/ssl/detail/engine.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+namespace detail {
+
+template <typename ConstBufferSequence>
+class write_op
+{
+public:
+  write_op(const ConstBufferSequence& buffers)
+    : buffers_(buffers)
+  {
+  }
+
+  engine::want operator()(engine& eng,
+      asio::error_code& ec,
+      std::size_t& bytes_transferred) const
+  {
+    asio::const_buffer buffer =
+      asio::detail::buffer_sequence_adapter<asio::const_buffer,
+        ConstBufferSequence>::first(buffers_);
+
+    return eng.write(buffer, ec, bytes_transferred);
+  }
+
+  template <typename Handler>
+  void call_handler(Handler& handler,
+      const asio::error_code& ec,
+      const std::size_t& bytes_transferred) const
+  {
+    handler(ec, bytes_transferred);
+  }
+
+private:
+  ConstBufferSequence buffers_;
+};
+
+} // namespace detail
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_DETAIL_WRITE_OP_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/error.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/error.hpp
new file mode 100644
index 00000000000..71599e7b18d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/error.hpp
@@ -0,0 +1,126 @@
+//
+// ssl/error.hpp
+// ~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_ERROR_HPP
+#define ASIO_SSL_ERROR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/error_code.hpp"
+#include "asio/ssl/detail/openssl_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace error {
+
+enum ssl_errors
+{
+  // Error numbers are those produced by openssl.
+};
+
+extern ASIO_DECL
+const asio::error_category& get_ssl_category();
+
+static const asio::error_category&
+  ssl_category ASIO_UNUSED_VARIABLE
+  = asio::error::get_ssl_category();
+
+} // namespace error
+namespace ssl {
+namespace error {
+
+enum stream_errors
+{
+#if defined(GENERATING_DOCUMENTATION)
+  /// The underlying stream closed before the ssl stream gracefully shut down.
+  stream_truncated,
+
+  /// The underlying SSL library returned a system error without providing
+  /// further information.
+  unspecified_system_error,
+
+  /// The underlying SSL library generated an unexpected result from a function
+  /// call.
+  unexpected_result
+#else // defined(GENERATING_DOCUMENTATION)
+# if (OPENSSL_VERSION_NUMBER < 0x10100000L) \
+    && !defined(OPENSSL_IS_BORINGSSL) \
+    && !defined(ASIO_USE_WOLFSSL) \
+    && !defined(ASIO_USE_ESP_OPENSSL)
+  stream_truncated = ERR_PACK(ERR_LIB_SSL, 0, SSL_R_SHORT_READ),
+# else
+  stream_truncated = 1,
+# endif
+  unspecified_system_error = 2,
+  unexpected_result = 3
+#endif // defined(GENERATING_DOCUMENTATION)
+};
+
+extern ASIO_DECL
+const asio::error_category& get_stream_category();
+
+static const asio::error_category&
+  stream_category ASIO_UNUSED_VARIABLE
+  = asio::ssl::error::get_stream_category();
+
+} // namespace error
+} // namespace ssl
+} // namespace asio
+
+#if defined(ASIO_HAS_STD_SYSTEM_ERROR)
+namespace std {
+
+template<> struct is_error_code_enum<asio::error::ssl_errors>
+{
+  static const bool value = true;
+};
+
+template<> struct is_error_code_enum<asio::ssl::error::stream_errors>
+{
+  static const bool value = true;
+};
+
+} // namespace std
+#endif // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+namespace asio {
+namespace error {
+
+inline asio::error_code make_error_code(ssl_errors e)
+{
+  return asio::error_code(
+      static_cast<int>(e), get_ssl_category());
+}
+
+} // namespace error
+namespace ssl {
+namespace error {
+
+inline asio::error_code make_error_code(stream_errors e)
+{
+  return asio::error_code(
+      static_cast<int>(e), get_stream_category());
+}
+
+} // namespace error
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ssl/impl/error.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_SSL_ERROR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/impl/context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/impl/context.hpp
new file mode 100644
index 00000000000..2831e2b4483
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/impl/context.hpp
@@ -0,0 +1,67 @@
+//
+// ssl/impl/context.hpp
+// ~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2005 Voipster / Indrek dot Juhani at voipster dot com
+// Copyright (c) 2005-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_IMPL_CONTEXT_HPP
+#define ASIO_SSL_IMPL_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/throw_error.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+
+template <typename VerifyCallback>
+void context::set_verify_callback(VerifyCallback callback)
+{
+  asio::error_code ec;
+  this->set_verify_callback(callback, ec);
+  asio::detail::throw_error(ec, "set_verify_callback");
+}
+
+template <typename VerifyCallback>
+ASIO_SYNC_OP_VOID context::set_verify_callback(
+    VerifyCallback callback, asio::error_code& ec)
+{
+  do_set_verify_callback(
+      new detail::verify_callback<VerifyCallback>(callback), ec);
+  ASIO_SYNC_OP_VOID_RETURN(ec);
+}
+
+template <typename PasswordCallback>
+void context::set_password_callback(PasswordCallback callback)
+{
+  asio::error_code ec;
+  this->set_password_callback(callback, ec);
+  asio::detail::throw_error(ec, "set_password_callback");
+}
+
+template <typename PasswordCallback>
+ASIO_SYNC_OP_VOID context::set_password_callback(
+    PasswordCallback callback, asio::error_code& ec)
+{
+  do_set_password_callback(
+      new detail::password_callback<PasswordCallback>(callback), ec);
+  ASIO_SYNC_OP_VOID_RETURN(ec);
+}
+
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_IMPL_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/impl/src.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/impl/src.hpp
new file mode 100644
index 00000000000..0c092cf045b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/impl/src.hpp
@@ -0,0 +1,28 @@
+//
+// impl/ssl/src.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_IMPL_SRC_HPP
+#define ASIO_SSL_IMPL_SRC_HPP
+
+#define ASIO_SOURCE
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# error Do not compile Asio library source with ASIO_HEADER_ONLY defined
+#endif
+
+#include "asio/ssl/impl/context.ipp"
+#include "asio/ssl/impl/error.ipp"
+#include "asio/ssl/detail/impl/engine.ipp"
+#include "asio/ssl/detail/impl/openssl_init.ipp"
+#include "asio/ssl/impl/rfc2818_verification.ipp"
+
+#endif // ASIO_SSL_IMPL_SRC_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/rfc2818_verification.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/rfc2818_verification.hpp
new file mode 100644
index 00000000000..a8bd8d9dc0f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/rfc2818_verification.hpp
@@ -0,0 +1,94 @@
+//
+// ssl/rfc2818_verification.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_RFC2818_VERIFICATION_HPP
+#define ASIO_SSL_RFC2818_VERIFICATION_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include <string>
+#include "asio/ssl/detail/openssl_types.hpp"
+#include "asio/ssl/verify_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+
+/// Verifies a certificate against a hostname according to the rules described
+/// in RFC 2818.
+/**
+ * @par Example
+ * The following example shows how to synchronously open a secure connection to
+ * a given host name:
+ * @code
+ * using asio::ip::tcp;
+ * namespace ssl = asio::ssl;
+ * typedef ssl::stream<tcp::socket> ssl_socket;
+ *
+ * // Create a context that uses the default paths for finding CA certificates.
+ * ssl::context ctx(ssl::context::sslv23);
+ * ctx.set_default_verify_paths();
+ *
+ * // Open a socket and connect it to the remote host.
+ * asio::io_context io_context;
+ * ssl_socket sock(io_context, ctx);
+ * tcp::resolver resolver(io_context);
+ * tcp::resolver::query query("host.name", "https");
+ * asio::connect(sock.lowest_layer(), resolver.resolve(query));
+ * sock.lowest_layer().set_option(tcp::no_delay(true));
+ *
+ * // Perform SSL handshake and verify the remote host's certificate.
+ * sock.set_verify_mode(ssl::verify_peer);
+ * sock.set_verify_callback(ssl::rfc2818_verification("host.name"));
+ * sock.handshake(ssl_socket::client);
+ *
+ * // ... read and write as normal ...
+ * @endcode
+ */
+class rfc2818_verification
+{
+public:
+  /// The type of the function object's result.
+  typedef bool result_type;
+
+  /// Constructor.
+  explicit rfc2818_verification(const std::string& host)
+    : host_(host)
+  {
+  }
+
+  /// Perform certificate verification.
+  ASIO_DECL bool operator()(bool preverified, verify_context& ctx) const;
+
+private:
+  // Helper function to check a host name against a pattern.
+  ASIO_DECL static bool match_pattern(const char* pattern,
+      std::size_t pattern_length, const char* host);
+
+  // Helper function to check a host name against an IPv4 address
+  // The host name to be checked.
+  std::string host_;
+};
+
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/ssl/impl/rfc2818_verification.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_SSL_RFC2818_VERIFICATION_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/stream.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/stream.hpp
new file mode 100644
index 00000000000..6a2a31c84f2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/stream.hpp
@@ -0,0 +1,885 @@
+//
+// ssl/stream.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_STREAM_HPP
+#define ASIO_SSL_STREAM_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/async_result.hpp"
+#include "asio/detail/buffer_sequence_adapter.hpp"
+#include "asio/detail/handler_type_requirements.hpp"
+#include "asio/detail/non_const_lvalue.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/type_traits.hpp"
+#include "asio/ssl/context.hpp"
+#include "asio/ssl/detail/buffered_handshake_op.hpp"
+#include "asio/ssl/detail/handshake_op.hpp"
+#include "asio/ssl/detail/io.hpp"
+#include "asio/ssl/detail/read_op.hpp"
+#include "asio/ssl/detail/shutdown_op.hpp"
+#include "asio/ssl/detail/stream_core.hpp"
+#include "asio/ssl/detail/write_op.hpp"
+#include "asio/ssl/stream_base.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+
+/// Provides stream-oriented functionality using SSL.
+/**
+ * The stream class template provides asynchronous and blocking stream-oriented
+ * functionality using SSL.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe. The application must also ensure that all
+ * asynchronous operations are performed within the same implicit or explicit
+ * strand.
+ *
+ * @par Example
+ * To use the SSL stream template with an ip::tcp::socket, you would write:
+ * @code
+ * asio::io_context my_context;
+ * asio::ssl::context ctx(asio::ssl::context::sslv23);
+ * asio::ssl::stream<asio:ip::tcp::socket> sock(my_context, ctx);
+ * @endcode
+ *
+ * @par Concepts:
+ * AsyncReadStream, AsyncWriteStream, Stream, SyncReadStream, SyncWriteStream.
+ */
+template <typename Stream>
+class stream :
+  public stream_base,
+  private noncopyable
+{
+public:
+  /// The native handle type of the SSL stream.
+  typedef SSL* native_handle_type;
+
+  /// Structure for use with deprecated impl_type.
+  struct impl_struct
+  {
+    SSL* ssl;
+  };
+
+  /// The type of the next layer.
+  typedef typename remove_reference<Stream>::type next_layer_type;
+
+  /// The type of the lowest layer.
+  typedef typename next_layer_type::lowest_layer_type lowest_layer_type;
+
+  /// The type of the executor associated with the object.
+  typedef typename lowest_layer_type::executor_type executor_type;
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Construct a stream.
+  /**
+   * This constructor creates a stream and initialises the underlying stream
+   * object.
+   *
+   * @param arg The argument to be passed to initialise the underlying stream.
+   *
+   * @param ctx The SSL context to be used for the stream.
+   */
+  template <typename Arg>
+  stream(Arg&& arg, context& ctx)
+    : next_layer_(ASIO_MOVE_CAST(Arg)(arg)),
+      core_(ctx.native_handle(), next_layer_.lowest_layer().get_executor())
+  {
+  }
+#else // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  template <typename Arg>
+  stream(Arg& arg, context& ctx)
+    : next_layer_(arg),
+      core_(ctx.native_handle(), next_layer_.lowest_layer().get_executor())
+  {
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destructor.
+  /**
+   * @note A @c stream object must not be destroyed while there are pending
+   * asynchronous operations associated with it.
+   */
+  ~stream()
+  {
+  }
+
+  /// Get the executor associated with the object.
+  /**
+   * This function may be used to obtain the executor object that the stream
+   * uses to dispatch handlers for asynchronous operations.
+   *
+   * @return A copy of the executor that stream will use to dispatch handlers.
+   */
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return next_layer_.lowest_layer().get_executor();
+  }
+
+  /// Get the underlying implementation in the native type.
+  /**
+   * This function may be used to obtain the underlying implementation of the
+   * context. This is intended to allow access to context functionality that is
+   * not otherwise provided.
+   *
+   * @par Example
+   * The native_handle() function returns a pointer of type @c SSL* that is
+   * suitable for passing to functions such as @c SSL_get_verify_result and
+   * @c SSL_get_peer_certificate:
+   * @code
+   * asio::ssl::stream<asio:ip::tcp::socket> sock(my_context, ctx);
+   *
+   * // ... establish connection and perform handshake ...
+   *
+   * if (X509* cert = SSL_get_peer_certificate(sock.native_handle()))
+   * {
+   *   if (SSL_get_verify_result(sock.native_handle()) == X509_V_OK)
+   *   {
+   *     // ...
+   *   }
+   * }
+   * @endcode
+   */
+  native_handle_type native_handle()
+  {
+    return core_.engine_.native_handle();
+  }
+
+  /// Get a reference to the next layer.
+  /**
+   * This function returns a reference to the next layer in a stack of stream
+   * layers.
+   *
+   * @return A reference to the next layer in the stack of stream layers.
+   * Ownership is not transferred to the caller.
+   */
+  const next_layer_type& next_layer() const
+  {
+    return next_layer_;
+  }
+
+  /// Get a reference to the next layer.
+  /**
+   * This function returns a reference to the next layer in a stack of stream
+   * layers.
+   *
+   * @return A reference to the next layer in the stack of stream layers.
+   * Ownership is not transferred to the caller.
+   */
+  next_layer_type& next_layer()
+  {
+    return next_layer_;
+  }
+
+  /// Get a reference to the lowest layer.
+  /**
+   * This function returns a reference to the lowest layer in a stack of
+   * stream layers.
+   *
+   * @return A reference to the lowest layer in the stack of stream layers.
+   * Ownership is not transferred to the caller.
+   */
+  lowest_layer_type& lowest_layer()
+  {
+    return next_layer_.lowest_layer();
+  }
+
+  /// Get a reference to the lowest layer.
+  /**
+   * This function returns a reference to the lowest layer in a stack of
+   * stream layers.
+   *
+   * @return A reference to the lowest layer in the stack of stream layers.
+   * Ownership is not transferred to the caller.
+   */
+  const lowest_layer_type& lowest_layer() const
+  {
+    return next_layer_.lowest_layer();
+  }
+
+  /// Set the peer verification mode.
+  /**
+   * This function may be used to configure the peer verification mode used by
+   * the stream. The new mode will override the mode inherited from the context.
+   *
+   * @param v A bitmask of peer verification modes. See @ref verify_mode for
+   * available values.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_set_verify.
+   */
+  void set_verify_mode(verify_mode v)
+  {
+    asio::error_code ec;
+    set_verify_mode(v, ec);
+    asio::detail::throw_error(ec, "set_verify_mode");
+  }
+
+  /// Set the peer verification mode.
+  /**
+   * This function may be used to configure the peer verification mode used by
+   * the stream. The new mode will override the mode inherited from the context.
+   *
+   * @param v A bitmask of peer verification modes. See @ref verify_mode for
+   * available values.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_set_verify.
+   */
+  ASIO_SYNC_OP_VOID set_verify_mode(
+      verify_mode v, asio::error_code& ec)
+  {
+    core_.engine_.set_verify_mode(v, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Set the peer verification depth.
+  /**
+   * This function may be used to configure the maximum verification depth
+   * allowed by the stream.
+   *
+   * @param depth Maximum depth for the certificate chain verification that
+   * shall be allowed.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_set_verify_depth.
+   */
+  void set_verify_depth(int depth)
+  {
+    asio::error_code ec;
+    set_verify_depth(depth, ec);
+    asio::detail::throw_error(ec, "set_verify_depth");
+  }
+
+  /// Set the peer verification depth.
+  /**
+   * This function may be used to configure the maximum verification depth
+   * allowed by the stream.
+   *
+   * @param depth Maximum depth for the certificate chain verification that
+   * shall be allowed.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_set_verify_depth.
+   */
+  ASIO_SYNC_OP_VOID set_verify_depth(
+      int depth, asio::error_code& ec)
+  {
+    core_.engine_.set_verify_depth(depth, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Set the callback used to verify peer certificates.
+  /**
+   * This function is used to specify a callback function that will be called
+   * by the implementation when it needs to verify a peer certificate.
+   *
+   * @param callback The function object to be used for verifying a certificate.
+   * The function signature of the handler must be:
+   * @code bool verify_callback(
+   *   bool preverified, // True if the certificate passed pre-verification.
+   *   verify_context& ctx // The peer certificate and other context.
+   * ); @endcode
+   * The return value of the callback is true if the certificate has passed
+   * verification, false otherwise.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note Calls @c SSL_set_verify.
+   */
+  template <typename VerifyCallback>
+  void set_verify_callback(VerifyCallback callback)
+  {
+    asio::error_code ec;
+    this->set_verify_callback(callback, ec);
+    asio::detail::throw_error(ec, "set_verify_callback");
+  }
+
+  /// Set the callback used to verify peer certificates.
+  /**
+   * This function is used to specify a callback function that will be called
+   * by the implementation when it needs to verify a peer certificate.
+   *
+   * @param callback The function object to be used for verifying a certificate.
+   * The function signature of the handler must be:
+   * @code bool verify_callback(
+   *   bool preverified, // True if the certificate passed pre-verification.
+   *   verify_context& ctx // The peer certificate and other context.
+   * ); @endcode
+   * The return value of the callback is true if the certificate has passed
+   * verification, false otherwise.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @note Calls @c SSL_set_verify.
+   */
+  template <typename VerifyCallback>
+  ASIO_SYNC_OP_VOID set_verify_callback(VerifyCallback callback,
+      asio::error_code& ec)
+  {
+    core_.engine_.set_verify_callback(
+        new detail::verify_callback<VerifyCallback>(callback), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Perform SSL handshaking.
+  /**
+   * This function is used to perform SSL handshaking on the stream. The
+   * function call will block until handshaking is complete or an error occurs.
+   *
+   * @param type The type of handshaking to be performed, i.e. as a client or as
+   * a server.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void handshake(handshake_type type)
+  {
+    asio::error_code ec;
+    handshake(type, ec);
+    asio::detail::throw_error(ec, "handshake");
+  }
+
+  /// Perform SSL handshaking.
+  /**
+   * This function is used to perform SSL handshaking on the stream. The
+   * function call will block until handshaking is complete or an error occurs.
+   *
+   * @param type The type of handshaking to be performed, i.e. as a client or as
+   * a server.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID handshake(handshake_type type,
+      asio::error_code& ec)
+  {
+    detail::io(next_layer_, core_, detail::handshake_op(type), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Perform SSL handshaking.
+  /**
+   * This function is used to perform SSL handshaking on the stream. The
+   * function call will block until handshaking is complete or an error occurs.
+   *
+   * @param type The type of handshaking to be performed, i.e. as a client or as
+   * a server.
+   *
+   * @param buffers The buffered data to be reused for the handshake.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ConstBufferSequence>
+  void handshake(handshake_type type, const ConstBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    handshake(type, buffers, ec);
+    asio::detail::throw_error(ec, "handshake");
+  }
+
+  /// Perform SSL handshaking.
+  /**
+   * This function is used to perform SSL handshaking on the stream. The
+   * function call will block until handshaking is complete or an error occurs.
+   *
+   * @param type The type of handshaking to be performed, i.e. as a client or as
+   * a server.
+   *
+   * @param buffers The buffered data to be reused for the handshake.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  template <typename ConstBufferSequence>
+  ASIO_SYNC_OP_VOID handshake(handshake_type type,
+      const ConstBufferSequence& buffers, asio::error_code& ec)
+  {
+    detail::io(next_layer_, core_,
+        detail::buffered_handshake_op<ConstBufferSequence>(type, buffers), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Start an asynchronous SSL handshake.
+  /**
+   * This function is used to asynchronously perform an SSL handshake on the
+   * stream. This function call always returns immediately.
+   *
+   * @param type The type of handshaking to be performed, i.e. as a client or as
+   * a server.
+   *
+   * @param handler The handler to be called when the handshake operation
+   * completes. Copies will be made of the handler as required. The equivalent
+   * function signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error // Result of operation.
+   * ); @endcode
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code))
+        HandshakeHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(HandshakeHandler,
+      void (asio::error_code))
+  async_handshake(handshake_type type,
+      ASIO_MOVE_ARG(HandshakeHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<HandshakeHandler,
+      void (asio::error_code)>(
+        initiate_async_handshake(this), handler, type);
+  }
+
+  /// Start an asynchronous SSL handshake.
+  /**
+   * This function is used to asynchronously perform an SSL handshake on the
+   * stream. This function call always returns immediately.
+   *
+   * @param type The type of handshaking to be performed, i.e. as a client or as
+   * a server.
+   *
+   * @param buffers The buffered data to be reused for the handshake. Although
+   * the buffers object may be copied as necessary, ownership of the underlying
+   * buffers is retained by the caller, which must guarantee that they remain
+   * valid until the handler is called.
+   *
+   * @param handler The handler to be called when the handshake operation
+   * completes. Copies will be made of the handler as required. The equivalent
+   * function signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred // Amount of buffers used in handshake.
+   * ); @endcode
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) BufferedHandshakeHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(BufferedHandshakeHandler,
+      void (asio::error_code, std::size_t))
+  async_handshake(handshake_type type, const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(BufferedHandshakeHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<BufferedHandshakeHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_buffered_handshake(this), handler, type, buffers);
+  }
+
+  /// Shut down SSL on the stream.
+  /**
+   * This function is used to shut down SSL on the stream. The function call
+   * will block until SSL has been shut down or an error occurs.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void shutdown()
+  {
+    asio::error_code ec;
+    shutdown(ec);
+    asio::detail::throw_error(ec, "shutdown");
+  }
+
+  /// Shut down SSL on the stream.
+  /**
+   * This function is used to shut down SSL on the stream. The function call
+   * will block until SSL has been shut down or an error occurs.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID shutdown(asio::error_code& ec)
+  {
+    detail::io(next_layer_, core_, detail::shutdown_op(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Asynchronously shut down SSL on the stream.
+  /**
+   * This function is used to asynchronously shut down SSL on the stream. This
+   * function call always returns immediately.
+   *
+   * @param handler The handler to be called when the handshake operation
+   * completes. Copies will be made of the handler as required. The equivalent
+   * function signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error // Result of operation.
+   * ); @endcode
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code))
+        ShutdownHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ShutdownHandler,
+      void (asio::error_code))
+  async_shutdown(
+      ASIO_MOVE_ARG(ShutdownHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ShutdownHandler,
+      void (asio::error_code)>(
+        initiate_async_shutdown(this), handler);
+  }
+
+  /// Write some data to the stream.
+  /**
+   * This function is used to write data on the stream. The function call will
+   * block until one or more bytes of data has been written successfully, or
+   * until an error occurs.
+   *
+   * @param buffers The data to be written.
+   *
+   * @returns The number of bytes written.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The write_some operation may not transmit all of the data to the
+   * peer. Consider using the @ref write function if you need to ensure that all
+   * data is written before the blocking operation completes.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t n = write_some(buffers, ec);
+    asio::detail::throw_error(ec, "write_some");
+    return n;
+  }
+
+  /// Write some data to the stream.
+  /**
+   * This function is used to write data on the stream. The function call will
+   * block until one or more bytes of data has been written successfully, or
+   * until an error occurs.
+   *
+   * @param buffers The data to be written to the stream.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes written. Returns 0 if an error occurred.
+   *
+   * @note The write_some operation may not transmit all of the data to the
+   * peer. Consider using the @ref write function if you need to ensure that all
+   * data is written before the blocking operation completes.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return detail::io(next_layer_, core_,
+        detail::write_op<ConstBufferSequence>(buffers), ec);
+  }
+
+  /// Start an asynchronous write.
+  /**
+   * This function is used to asynchronously write one or more bytes of data to
+   * the stream. The function call always returns immediately.
+   *
+   * @param buffers The data to be written to the stream. Although the buffers
+   * object may be copied as necessary, ownership of the underlying buffers is
+   * retained by the caller, which must guarantee that they remain valid until
+   * the handler is called.
+   *
+   * @param handler The handler to be called when the write operation completes.
+   * Copies will be made of the handler as required. The equivalent function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes written.
+   * ); @endcode
+   *
+   * @note The async_write_some operation may not transmit all of the data to
+   * the peer. Consider using the @ref async_write function if you need to
+   * ensure that all data is written before the asynchronous operation
+   * completes.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_write_some(const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_write_some(this), handler, buffers);
+  }
+
+  /// Read some data from the stream.
+  /**
+   * This function is used to read data from the stream. The function call will
+   * block until one or more bytes of data has been read successfully, or until
+   * an error occurs.
+   *
+   * @param buffers The buffers into which the data will be read.
+   *
+   * @returns The number of bytes read.
+   *
+   * @throws asio::system_error Thrown on failure.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that the
+   * requested amount of data is read before the blocking operation completes.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t n = read_some(buffers, ec);
+    asio::detail::throw_error(ec, "read_some");
+    return n;
+  }
+
+  /// Read some data from the stream.
+  /**
+   * This function is used to read data from the stream. The function call will
+   * block until one or more bytes of data has been read successfully, or until
+   * an error occurs.
+   *
+   * @param buffers The buffers into which the data will be read.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes read. Returns 0 if an error occurred.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that the
+   * requested amount of data is read before the blocking operation completes.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return detail::io(next_layer_, core_,
+        detail::read_op<MutableBufferSequence>(buffers), ec);
+  }
+
+  /// Start an asynchronous read.
+  /**
+   * This function is used to asynchronously read one or more bytes of data from
+   * the stream. The function call always returns immediately.
+   *
+   * @param buffers The buffers into which the data will be read. Although the
+   * buffers object may be copied as necessary, ownership of the underlying
+   * buffers is retained by the caller, which must guarantee that they remain
+   * valid until the handler is called.
+   *
+   * @param handler The handler to be called when the read operation completes.
+   * Copies will be made of the handler as required. The equivalent function
+   * signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes read.
+   * ); @endcode
+   *
+   * @note The async_read_some operation may not read all of the requested
+   * number of bytes. Consider using the @ref async_read function if you need to
+   * ensure that the requested amount of data is read before the asynchronous
+   * operation completes.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_read_some(const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_read_some(this), handler, buffers);
+  }
+
+private:
+  class initiate_async_handshake
+  {
+  public:
+    typedef stream::executor_type executor_type;
+
+    explicit initiate_async_handshake(stream* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename HandshakeHandler>
+    void operator()(ASIO_MOVE_ARG(HandshakeHandler) handler,
+        handshake_type type) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a HandshakeHandler.
+      ASIO_HANDSHAKE_HANDLER_CHECK(HandshakeHandler, handler) type_check;
+
+      asio::detail::non_const_lvalue<HandshakeHandler> handler2(handler);
+      detail::async_io(self_->next_layer_, self_->core_,
+          detail::handshake_op(type), handler2.value);
+    }
+
+  private:
+    stream* self_;
+  };
+
+  class initiate_async_buffered_handshake
+  {
+  public:
+    typedef stream::executor_type executor_type;
+
+    explicit initiate_async_buffered_handshake(stream* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename BufferedHandshakeHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(BufferedHandshakeHandler) handler,
+        handshake_type type, const ConstBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your
+      // handler does not meet the documented type requirements for a
+      // BufferedHandshakeHandler.
+      ASIO_BUFFERED_HANDSHAKE_HANDLER_CHECK(
+          BufferedHandshakeHandler, handler) type_check;
+
+      asio::detail::non_const_lvalue<
+          BufferedHandshakeHandler> handler2(handler);
+      detail::async_io(self_->next_layer_, self_->core_,
+          detail::buffered_handshake_op<ConstBufferSequence>(type, buffers),
+          handler2.value);
+    }
+
+  private:
+    stream* self_;
+  };
+
+  class initiate_async_shutdown
+  {
+  public:
+    typedef typename stream::executor_type executor_type;
+
+    explicit initiate_async_shutdown(stream* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ShutdownHandler>
+    void operator()(ASIO_MOVE_ARG(ShutdownHandler) handler) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ShutdownHandler.
+      ASIO_HANDSHAKE_HANDLER_CHECK(ShutdownHandler, handler) type_check;
+
+      asio::detail::non_const_lvalue<ShutdownHandler> handler2(handler);
+      detail::async_io(self_->next_layer_, self_->core_,
+          detail::shutdown_op(), handler2.value);
+    }
+
+  private:
+    stream* self_;
+  };
+
+  class initiate_async_write_some
+  {
+  public:
+    typedef typename stream::executor_type executor_type;
+
+    explicit initiate_async_write_some(stream* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        const ConstBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      asio::detail::non_const_lvalue<WriteHandler> handler2(handler);
+      detail::async_io(self_->next_layer_, self_->core_,
+          detail::write_op<ConstBufferSequence>(buffers), handler2.value);
+    }
+
+  private:
+    stream* self_;
+  };
+
+  class initiate_async_read_some
+  {
+  public:
+    typedef typename stream::executor_type executor_type;
+
+    explicit initiate_async_read_some(stream* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        const MutableBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      asio::detail::non_const_lvalue<ReadHandler> handler2(handler);
+      detail::async_io(self_->next_layer_, self_->core_,
+          detail::read_op<MutableBufferSequence>(buffers), handler2.value);
+    }
+
+  private:
+    stream* self_;
+  };
+
+  Stream next_layer_;
+  detail::stream_core core_;
+};
+
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_STREAM_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/stream_base.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/stream_base.hpp
new file mode 100644
index 00000000000..7960e99d9ae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/stream_base.hpp
@@ -0,0 +1,52 @@
+//
+// ssl/stream_base.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_STREAM_BASE_HPP
+#define ASIO_SSL_STREAM_BASE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+
+/// The stream_base class is used as a base for the asio::ssl::stream
+/// class template so that we have a common place to define various enums.
+class stream_base
+{
+public:
+  /// Different handshake types.
+  enum handshake_type
+  {
+    /// Perform handshaking as a client.
+    client,
+
+    /// Perform handshaking as a server.
+    server
+  };
+
+protected:
+  /// Protected destructor to prevent deletion through this type.
+  ~stream_base()
+  {
+  }
+};
+
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_STREAM_BASE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/verify_context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/verify_context.hpp
new file mode 100644
index 00000000000..bfb608dbbca
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/verify_context.hpp
@@ -0,0 +1,67 @@
+//
+// ssl/verify_context.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_VERIFY_CONTEXT_HPP
+#define ASIO_SSL_VERIFY_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/noncopyable.hpp"
+#include "asio/ssl/detail/openssl_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+
+/// A simple wrapper around the X509_STORE_CTX type, used during verification of
+/// a peer certificate.
+/**
+ * @note The verify_context does not own the underlying X509_STORE_CTX object.
+ */
+class verify_context
+  : private noncopyable
+{
+public:
+  /// The native handle type of the verification context.
+  typedef X509_STORE_CTX* native_handle_type;
+
+  /// Constructor.
+  explicit verify_context(native_handle_type handle)
+    : handle_(handle)
+  {
+  }
+
+  /// Get the underlying implementation in the native type.
+  /**
+   * This function may be used to obtain the underlying implementation of the
+   * context. This is intended to allow access to context functionality that is
+   * not otherwise provided.
+   */
+  native_handle_type native_handle()
+  {
+    return handle_;
+  }
+
+private:
+  // The underlying native implementation.
+  native_handle_type handle_;
+};
+
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_VERIFY_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/verify_mode.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/verify_mode.hpp
new file mode 100644
index 00000000000..bcd6f8ea633
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ssl/verify_mode.hpp
@@ -0,0 +1,63 @@
+//
+// ssl/verify_mode.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SSL_VERIFY_MODE_HPP
+#define ASIO_SSL_VERIFY_MODE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/ssl/detail/openssl_types.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace ssl {
+
+/// Bitmask type for peer verification.
+/**
+ * Possible values are:
+ *
+ * @li @ref verify_none
+ * @li @ref verify_peer
+ * @li @ref verify_fail_if_no_peer_cert
+ * @li @ref verify_client_once
+ */
+typedef int verify_mode;
+
+#if defined(GENERATING_DOCUMENTATION)
+/// No verification.
+const int verify_none = implementation_defined;
+
+/// Verify the peer.
+const int verify_peer = implementation_defined;
+
+/// Fail verification if the peer has no certificate. Ignored unless
+/// @ref verify_peer is set.
+const int verify_fail_if_no_peer_cert = implementation_defined;
+
+/// Do not request client certificate on renegotiation. Ignored unless
+/// @ref verify_peer is set.
+const int verify_client_once = implementation_defined;
+#else
+const int verify_none = SSL_VERIFY_NONE;
+const int verify_peer = SSL_VERIFY_PEER;
+const int verify_fail_if_no_peer_cert = SSL_VERIFY_FAIL_IF_NO_PEER_CERT;
+const int verify_client_once = SSL_VERIFY_CLIENT_ONCE;
+#endif
+
+} // namespace ssl
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SSL_VERIFY_MODE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/steady_timer.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/steady_timer.hpp
new file mode 100644
index 00000000000..22317405a49
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/steady_timer.hpp
@@ -0,0 +1,42 @@
+//
+// steady_timer.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_STEADY_TIMER_HPP
+#define ASIO_STEADY_TIMER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_CHRONO) || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/basic_waitable_timer.hpp"
+#include "asio/detail/chrono.hpp"
+
+namespace asio {
+
+/// Typedef for a timer based on the steady clock.
+/**
+ * This typedef uses the C++11 @c &lt;chrono&gt; standard library facility, if
+ * available. Otherwise, it may use the Boost.Chrono library. To explicitly
+ * utilise Boost.Chrono, use the basic_waitable_timer template directly:
+ * @code
+ * typedef basic_waitable_timer<boost::chrono::steady_clock> timer;
+ * @endcode
+ */
+typedef basic_waitable_timer<chrono::steady_clock> steady_timer;
+
+} // namespace asio
+
+#endif // defined(ASIO_HAS_CHRONO) || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_STEADY_TIMER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/strand.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/strand.hpp
new file mode 100644
index 00000000000..b807e4bffb1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/strand.hpp
@@ -0,0 +1,313 @@
+//
+// strand.hpp
+// ~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_STRAND_HPP
+#define ASIO_STRAND_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/strand_executor_service.hpp"
+#include "asio/detail/type_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Provides serialised function invocation for any executor type.
+template <typename Executor>
+class strand
+{
+public:
+  /// The type of the underlying executor.
+  typedef Executor inner_executor_type;
+
+  /// Default constructor.
+  /**
+   * This constructor is only valid if the underlying executor type is default
+   * constructible.
+   */
+  strand()
+    : executor_(),
+      impl_(use_service<detail::strand_executor_service>(
+            executor_.context()).create_implementation())
+  {
+  }
+
+  /// Construct a strand for the specified executor.
+  explicit strand(const Executor& e)
+    : executor_(e),
+      impl_(use_service<detail::strand_executor_service>(
+            executor_.context()).create_implementation())
+  {
+  }
+
+  /// Copy constructor.
+  strand(const strand& other) ASIO_NOEXCEPT
+    : executor_(other.executor_),
+      impl_(other.impl_)
+  {
+  }
+
+  /// Converting constructor.
+  /**
+   * This constructor is only valid if the @c OtherExecutor type is convertible
+   * to @c Executor.
+   */
+  template <class OtherExecutor>
+  strand(
+      const strand<OtherExecutor>& other) ASIO_NOEXCEPT
+    : executor_(other.executor_),
+      impl_(other.impl_)
+  {
+  }
+
+  /// Assignment operator.
+  strand& operator=(const strand& other) ASIO_NOEXCEPT
+  {
+    executor_ = other.executor_;
+    impl_ = other.impl_;
+    return *this;
+  }
+
+  /// Converting assignment operator.
+  /**
+   * This assignment operator is only valid if the @c OtherExecutor type is
+   * convertible to @c Executor.
+   */
+  template <class OtherExecutor>
+  strand& operator=(
+      const strand<OtherExecutor>& other) ASIO_NOEXCEPT
+  {
+    executor_ = other.executor_;
+    impl_ = other.impl_;
+    return *this;
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move constructor.
+  strand(strand&& other) ASIO_NOEXCEPT
+    : executor_(ASIO_MOVE_CAST(Executor)(other.executor_)),
+      impl_(ASIO_MOVE_CAST(implementation_type)(other.impl_))
+  {
+  }
+
+  /// Converting move constructor.
+  /**
+   * This constructor is only valid if the @c OtherExecutor type is convertible
+   * to @c Executor.
+   */
+  template <class OtherExecutor>
+  strand(strand<OtherExecutor>&& other) ASIO_NOEXCEPT
+    : executor_(ASIO_MOVE_CAST(OtherExecutor)(other)),
+      impl_(ASIO_MOVE_CAST(implementation_type)(other.impl_))
+  {
+  }
+
+  /// Move assignment operator.
+  strand& operator=(strand&& other) ASIO_NOEXCEPT
+  {
+    executor_ = ASIO_MOVE_CAST(Executor)(other);
+    impl_ = ASIO_MOVE_CAST(implementation_type)(other.impl_);
+    return *this;
+  }
+
+  /// Converting move assignment operator.
+  /**
+   * This assignment operator is only valid if the @c OtherExecutor type is
+   * convertible to @c Executor.
+   */
+  template <class OtherExecutor>
+  strand& operator=(
+      const strand<OtherExecutor>&& other) ASIO_NOEXCEPT
+  {
+    executor_ = ASIO_MOVE_CAST(OtherExecutor)(other);
+    impl_ = ASIO_MOVE_CAST(implementation_type)(other.impl_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Destructor.
+  ~strand()
+  {
+  }
+
+  /// Obtain the underlying executor.
+  inner_executor_type get_inner_executor() const ASIO_NOEXCEPT
+  {
+    return executor_;
+  }
+
+  /// Obtain the underlying execution context.
+  execution_context& context() const ASIO_NOEXCEPT
+  {
+    return executor_.context();
+  }
+
+  /// Inform the strand that it has some outstanding work to do.
+  /**
+   * The strand delegates this call to its underlying executor.
+   */
+  void on_work_started() const ASIO_NOEXCEPT
+  {
+    executor_.on_work_started();
+  }
+
+  /// Inform the strand that some work is no longer outstanding.
+  /**
+   * The strand delegates this call to its underlying executor.
+   */
+  void on_work_finished() const ASIO_NOEXCEPT
+  {
+    executor_.on_work_finished();
+  }
+
+  /// Request the strand to invoke the given function object.
+  /**
+   * This function is used to ask the strand to execute the given function
+   * object on its underlying executor. The function object will be executed
+   * inside this function if the strand is not otherwise busy and if the
+   * underlying executor's @c dispatch() function is also able to execute the
+   * function before returning.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void dispatch(ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+  {
+    detail::strand_executor_service::dispatch(impl_,
+        executor_, ASIO_MOVE_CAST(Function)(f), a);
+  }
+
+  /// Request the strand to invoke the given function object.
+  /**
+   * This function is used to ask the executor to execute the given function
+   * object. The function object will never be executed inside this function.
+   * Instead, it will be scheduled by the underlying executor's defer function.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void post(ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+  {
+    detail::strand_executor_service::post(impl_,
+        executor_, ASIO_MOVE_CAST(Function)(f), a);
+  }
+
+  /// Request the strand to invoke the given function object.
+  /**
+   * This function is used to ask the executor to execute the given function
+   * object. The function object will never be executed inside this function.
+   * Instead, it will be scheduled by the underlying executor's defer function.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void defer(ASIO_MOVE_ARG(Function) f, const Allocator& a) const
+  {
+    detail::strand_executor_service::defer(impl_,
+        executor_, ASIO_MOVE_CAST(Function)(f), a);
+  }
+
+  /// Determine whether the strand is running in the current thread.
+  /**
+   * @return @c true if the current thread is executing a function that was
+   * submitted to the strand using post(), dispatch() or defer(). Otherwise
+   * returns @c false.
+   */
+  bool running_in_this_thread() const ASIO_NOEXCEPT
+  {
+    return detail::strand_executor_service::running_in_this_thread(impl_);
+  }
+
+  /// Compare two strands for equality.
+  /**
+   * Two strands are equal if they refer to the same ordered, non-concurrent
+   * state.
+   */
+  friend bool operator==(const strand& a, const strand& b) ASIO_NOEXCEPT
+  {
+    return a.impl_ == b.impl_;
+  }
+
+  /// Compare two strands for inequality.
+  /**
+   * Two strands are equal if they refer to the same ordered, non-concurrent
+   * state.
+   */
+  friend bool operator!=(const strand& a, const strand& b) ASIO_NOEXCEPT
+  {
+    return a.impl_ != b.impl_;
+  }
+
+private:
+  Executor executor_;
+  typedef detail::strand_executor_service::implementation_type
+    implementation_type;
+  implementation_type impl_;
+};
+
+/** @defgroup make_strand asio::make_strand
+ *
+ * @brief The asio::make_strand function creates a @ref strand object for
+ * an executor or execution context.
+ */
+/*@{*/
+
+/// Create a @ref strand object for an executor.
+template <typename Executor>
+inline strand<Executor> make_strand(const Executor& ex,
+    typename enable_if<is_executor<Executor>::value>::type* = 0)
+{
+  return strand<Executor>(ex);
+}
+
+/// Create a @ref strand object for an execution context.
+template <typename ExecutionContext>
+inline strand<typename ExecutionContext::executor_type>
+make_strand(ExecutionContext& ctx,
+    typename enable_if<
+      is_convertible<ExecutionContext&, execution_context&>::value>::type* = 0)
+{
+  return strand<typename ExecutionContext::executor_type>(ctx.get_executor());
+}
+
+/*@}*/
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+// If both io_context.hpp and strand.hpp have been included, automatically
+// include the header file needed for the io_context::strand class.
+#if !defined(ASIO_NO_EXTENSIONS)
+# if defined(ASIO_IO_CONTEXT_HPP)
+#  include "asio/io_context_strand.hpp"
+# endif // defined(ASIO_IO_CONTEXT_HPP)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+#endif // ASIO_STRAND_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/streambuf.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/streambuf.hpp
new file mode 100644
index 00000000000..0b9bbad3c50
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/streambuf.hpp
@@ -0,0 +1,33 @@
+//
+// streambuf.hpp
+// ~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_STREAMBUF_HPP
+#define ASIO_STREAMBUF_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if !defined(ASIO_NO_IOSTREAM)
+
+#include "asio/basic_streambuf.hpp"
+
+namespace asio {
+
+/// Typedef for the typical usage of basic_streambuf.
+typedef basic_streambuf<> streambuf;
+
+} // namespace asio
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+
+#endif // ASIO_STREAMBUF_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_context.hpp
new file mode 100644
index 00000000000..c6e2d61ad73
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_context.hpp
@@ -0,0 +1,81 @@
+//
+// system_context.hpp
+// ~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SYSTEM_CONTEXT_HPP
+#define ASIO_SYSTEM_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/scheduler.hpp"
+#include "asio/detail/thread_group.hpp"
+#include "asio/execution_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+class system_executor;
+
+/// The executor context for the system executor.
+class system_context : public execution_context
+{
+public:
+  /// The executor type associated with the context.
+  typedef system_executor executor_type;
+
+  /// Destructor shuts down all threads in the system thread pool.
+  ASIO_DECL ~system_context();
+
+  /// Obtain an executor for the context.
+  executor_type get_executor() ASIO_NOEXCEPT;
+
+  /// Signal all threads in the system thread pool to stop.
+  ASIO_DECL void stop();
+
+  /// Determine whether the system thread pool has been stopped.
+  ASIO_DECL bool stopped() const ASIO_NOEXCEPT;
+
+  /// Join all threads in the system thread pool.
+  ASIO_DECL void join();
+
+#if defined(GENERATING_DOCUMENTATION)
+private:
+#endif // defined(GENERATING_DOCUMENTATION)
+  // Constructor creates all threads in the system thread pool.
+  ASIO_DECL system_context();
+
+private:
+  friend class system_executor;
+
+  struct thread_function;
+
+  // Helper function to create the underlying scheduler.
+  ASIO_DECL detail::scheduler& add_scheduler(detail::scheduler* s);
+
+  // The underlying scheduler.
+  detail::scheduler& scheduler_;
+
+  // The threads in the system thread pool.
+  detail::thread_group threads_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/system_context.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/impl/system_context.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_SYSTEM_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_error.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_error.hpp
new file mode 100644
index 00000000000..272fc599312
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_error.hpp
@@ -0,0 +1,131 @@
+//
+// system_error.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SYSTEM_ERROR_HPP
+#define ASIO_SYSTEM_ERROR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_STD_SYSTEM_ERROR)
+# include <system_error>
+#else // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+# include <cerrno>
+# include <exception>
+# include <string>
+# include "asio/error_code.hpp"
+# include "asio/detail/scoped_ptr.hpp"
+#endif // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+#if defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+typedef std::system_error system_error;
+
+#else // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+/// The system_error class is used to represent system conditions that
+/// prevent the library from operating correctly.
+class system_error
+  : public std::exception
+{
+public:
+  /// Construct with an error code.
+  system_error(const error_code& ec)
+    : code_(ec),
+      context_()
+  {
+  }
+
+  /// Construct with an error code and context.
+  system_error(const error_code& ec, const std::string& context)
+    : code_(ec),
+      context_(context)
+  {
+  }
+
+  /// Copy constructor.
+  system_error(const system_error& other)
+    : std::exception(other),
+      code_(other.code_),
+      context_(other.context_),
+      what_()
+  {
+  }
+
+  /// Destructor.
+  virtual ~system_error() throw ()
+  {
+  }
+
+  /// Assignment operator.
+  system_error& operator=(const system_error& e)
+  {
+    context_ = e.context_;
+    code_ = e.code_;
+    what_.reset();
+    return *this;
+  }
+
+  /// Get a string representation of the exception.
+  virtual const char* what() const throw ()
+  {
+#if !defined(ASIO_NO_EXCEPTIONS)
+    try
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+    {
+      if (!what_.get())
+      {
+        std::string tmp(context_);
+        if (tmp.length())
+          tmp += ": ";
+        tmp += code_.message();
+        what_.reset(new std::string(tmp));
+      }
+      return what_->c_str();
+    }
+#if !defined(ASIO_NO_EXCEPTIONS)
+    catch (std::exception&)
+    {
+      return "system_error";
+    }
+#endif // !defined(ASIO_NO_EXCEPTIONS)
+  }
+
+  /// Get the error code associated with the exception.
+  error_code code() const
+  {
+    return code_;
+  }
+
+private:
+  // The code associated with the error.
+  error_code code_;
+
+  // The context associated with the error.
+  std::string context_;
+
+  // The string representation of the error.
+  mutable asio::detail::scoped_ptr<std::string> what_;
+};
+
+#endif // defined(ASIO_HAS_STD_SYSTEM_ERROR)
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_SYSTEM_ERROR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_executor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_executor.hpp
new file mode 100644
index 00000000000..51c61603ca4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_executor.hpp
@@ -0,0 +1,129 @@
+//
+// system_executor.hpp
+// ~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SYSTEM_EXECUTOR_HPP
+#define ASIO_SYSTEM_EXECUTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+class system_context;
+
+/// An executor that uses arbitrary threads.
+/**
+ * The system executor represents an execution context where functions are
+ * permitted to run on arbitrary threads. The post() and defer() functions
+ * schedule the function to run on an unspecified system thread pool, and
+ * dispatch() invokes the function immediately.
+ */
+class system_executor
+{
+public:
+  /// Obtain the underlying execution context.
+  system_context& context() const ASIO_NOEXCEPT;
+
+  /// Inform the executor that it has some outstanding work to do.
+  /**
+   * For the system executor, this is a no-op.
+   */
+  void on_work_started() const ASIO_NOEXCEPT
+  {
+  }
+
+  /// Inform the executor that some work is no longer outstanding.
+  /**
+   * For the system executor, this is a no-op.
+   */
+  void on_work_finished() const ASIO_NOEXCEPT
+  {
+  }
+
+  /// Request the system executor to invoke the given function object.
+  /**
+   * This function is used to ask the executor to execute the given function
+   * object. The function object will always be executed inside this function.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void dispatch(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  /// Request the system executor to invoke the given function object.
+  /**
+   * This function is used to ask the executor to execute the given function
+   * object. The function object will never be executed inside this function.
+   * Instead, it will be scheduled to run on an unspecified system thread pool.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void post(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  /// Request the system executor to invoke the given function object.
+  /**
+   * This function is used to ask the executor to execute the given function
+   * object. The function object will never be executed inside this function.
+   * Instead, it will be scheduled to run on an unspecified system thread pool.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void defer(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  /// Compare two executors for equality.
+  /**
+   * System executors always compare equal.
+   */
+  friend bool operator==(const system_executor&,
+      const system_executor&) ASIO_NOEXCEPT
+  {
+    return true;
+  }
+
+  /// Compare two executors for inequality.
+  /**
+   * System executors always compare equal.
+   */
+  friend bool operator!=(const system_executor&,
+      const system_executor&) ASIO_NOEXCEPT
+  {
+    return false;
+  }
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/system_executor.hpp"
+
+#endif // ASIO_SYSTEM_EXECUTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_timer.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_timer.hpp
new file mode 100644
index 00000000000..5a79bf1761f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/system_timer.hpp
@@ -0,0 +1,42 @@
+//
+// system_timer.hpp
+// ~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_SYSTEM_TIMER_HPP
+#define ASIO_SYSTEM_TIMER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_CHRONO) || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/basic_waitable_timer.hpp"
+#include "asio/detail/chrono.hpp"
+
+namespace asio {
+
+/// Typedef for a timer based on the system clock.
+/**
+ * This typedef uses the C++11 @c &lt;chrono&gt; standard library facility, if
+ * available. Otherwise, it may use the Boost.Chrono library. To explicitly
+ * utilise Boost.Chrono, use the basic_waitable_timer template directly:
+ * @code
+ * typedef basic_waitable_timer<boost::chrono::system_clock> timer;
+ * @endcode
+ */
+typedef basic_waitable_timer<chrono::system_clock> system_timer;
+
+} // namespace asio
+
+#endif // defined(ASIO_HAS_CHRONO) || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_SYSTEM_TIMER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/this_coro.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/this_coro.hpp
new file mode 100644
index 00000000000..02374e1048c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/this_coro.hpp
@@ -0,0 +1,45 @@
+//
+// this_coro.hpp
+// ~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_THIS_CORO_HPP
+#define ASIO_THIS_CORO_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace this_coro {
+
+/// Awaitable type that returns the executor of the current coroutine.
+struct executor_t
+{
+  ASIO_CONSTEXPR executor_t()
+  {
+  }
+};
+
+/// Awaitable object that returns the executor of the current coroutine.
+#if defined(ASIO_HAS_CONSTEXPR) || defined(GENERATING_DOCUMENTATION)
+constexpr executor_t executor;
+#elif defined(ASIO_MSVC)
+__declspec(selectany) executor_t executor;
+#endif
+
+} // namespace this_coro
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_THIS_CORO_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/thread.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/thread.hpp
new file mode 100644
index 00000000000..f4df4129fe9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/thread.hpp
@@ -0,0 +1,92 @@
+//
+// thread.hpp
+// ~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_THREAD_HPP
+#define ASIO_THREAD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/thread.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// A simple abstraction for starting threads.
+/**
+ * The asio::thread class implements the smallest possible subset of the
+ * functionality of boost::thread. It is intended to be used only for starting
+ * a thread and waiting for it to exit. If more extensive threading
+ * capabilities are required, you are strongly advised to use something else.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Example
+ * A typical use of asio::thread would be to launch a thread to run an
+ * io_context's event processing loop:
+ *
+ * @par
+ * @code asio::io_context io_context;
+ * // ...
+ * asio::thread t(boost::bind(&asio::io_context::run, &io_context));
+ * // ...
+ * t.join(); @endcode
+ */
+class thread
+  : private noncopyable
+{
+public:
+  /// Start a new thread that executes the supplied function.
+  /**
+   * This constructor creates a new thread that will execute the given function
+   * or function object.
+   *
+   * @param f The function or function object to be run in the thread. The
+   * function signature must be: @code void f(); @endcode
+   */
+  template <typename Function>
+  explicit thread(Function f)
+    : impl_(f)
+  {
+  }
+
+  /// Destructor.
+  ~thread()
+  {
+  }
+
+  /// Wait for the thread to exit.
+  /**
+   * This function will block until the thread has exited.
+   *
+   * If this function is not called before the thread object is destroyed, the
+   * thread itself will continue to run until completion. You will, however,
+   * no longer have the ability to wait for it to exit.
+   */
+  void join()
+  {
+    impl_.join();
+  }
+
+private:
+  detail::thread impl_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_THREAD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/thread_pool.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/thread_pool.hpp
new file mode 100644
index 00000000000..20abe6782e2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/thread_pool.hpp
@@ -0,0 +1,235 @@
+//
+// thread_pool.hpp
+// ~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_THREAD_POOL_HPP
+#define ASIO_THREAD_POOL_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/scheduler.hpp"
+#include "asio/detail/thread_group.hpp"
+#include "asio/execution_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// A simple fixed-size thread pool.
+/**
+ * The thread pool class is an execution context where functions are permitted
+ * to run on one of a fixed number of threads.
+ *
+ * @par Submitting tasks to the pool
+ *
+ * To submit functions to the thread_pool, use the @ref asio::dispatch,
+ * @ref asio::post or @ref asio::defer free functions.
+ *
+ * For example:
+ *
+ * @code void my_task()
+ * {
+ *   ...
+ * }
+ *
+ * ...
+ *
+ * // Launch the pool with four threads.
+ * asio::thread_pool pool(4);
+ *
+ * // Submit a function to the pool.
+ * asio::post(pool, my_task);
+ *
+ * // Submit a lambda object to the pool.
+ * asio::post(pool,
+ *     []()
+ *     {
+ *       ...
+ *     });
+ *
+ * // Wait for all tasks in the pool to complete.
+ * pool.join(); @endcode
+ */
+class thread_pool
+  : public execution_context
+{
+public:
+  class executor_type;
+
+  /// Constructs a pool with an automatically determined number of threads.
+  ASIO_DECL thread_pool();
+
+  /// Constructs a pool with a specified number of threads.
+  ASIO_DECL thread_pool(std::size_t num_threads);
+
+  /// Destructor.
+  /**
+   * Automatically stops and joins the pool, if not explicitly done beforehand.
+   */
+  ASIO_DECL ~thread_pool();
+
+  /// Obtains the executor associated with the pool.
+  executor_type get_executor() ASIO_NOEXCEPT;
+
+  /// Stops the threads.
+  /**
+   * This function stops the threads as soon as possible. As a result of calling
+   * @c stop(), pending function objects may be never be invoked.
+   */
+  ASIO_DECL void stop();
+
+  /// Joins the threads.
+  /**
+   * This function blocks until the threads in the pool have completed. If @c
+   * stop() is not called prior to @c join(), the @c join() call will wait
+   * until the pool has no more outstanding work.
+   */
+  ASIO_DECL void join();
+
+private:
+  friend class executor_type;
+  struct thread_function;
+
+  // Helper function to create the underlying scheduler.
+  ASIO_DECL detail::scheduler& add_scheduler(detail::scheduler* s);
+
+  // The underlying scheduler.
+  detail::scheduler& scheduler_;
+
+  // The threads in the pool.
+  detail::thread_group threads_;
+};
+
+/// Executor used to submit functions to a thread pool.
+class thread_pool::executor_type
+{
+public:
+  /// Obtain the underlying execution context.
+  thread_pool& context() const ASIO_NOEXCEPT;
+
+  /// Inform the thread pool that it has some outstanding work to do.
+  /**
+   * This function is used to inform the thread pool that some work has begun.
+   * This ensures that the thread pool's join() function will not return while
+   * the work is underway.
+   */
+  void on_work_started() const ASIO_NOEXCEPT;
+
+  /// Inform the thread pool that some work is no longer outstanding.
+  /**
+   * This function is used to inform the thread pool that some work has
+   * finished. Once the count of unfinished work reaches zero, the thread
+   * pool's join() function is permitted to exit.
+   */
+  void on_work_finished() const ASIO_NOEXCEPT;
+
+  /// Request the thread pool to invoke the given function object.
+  /**
+   * This function is used to ask the thread pool to execute the given function
+   * object. If the current thread belongs to the pool, @c dispatch() executes
+   * the function before returning. Otherwise, the function will be scheduled
+   * to run on the thread pool.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void dispatch(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  /// Request the thread pool to invoke the given function object.
+  /**
+   * This function is used to ask the thread pool to execute the given function
+   * object. The function object will never be executed inside @c post().
+   * Instead, it will be scheduled to run on the thread pool.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void post(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  /// Request the thread pool to invoke the given function object.
+  /**
+   * This function is used to ask the thread pool to execute the given function
+   * object. The function object will never be executed inside @c defer().
+   * Instead, it will be scheduled to run on the thread pool.
+   *
+   * If the current thread belongs to the thread pool, @c defer() will delay
+   * scheduling the function object until the current thread returns control to
+   * the pool.
+   *
+   * @param f The function object to be called. The executor will make
+   * a copy of the handler object as required. The function signature of the
+   * function object must be: @code void function(); @endcode
+   *
+   * @param a An allocator that may be used by the executor to allocate the
+   * internal storage needed for function invocation.
+   */
+  template <typename Function, typename Allocator>
+  void defer(ASIO_MOVE_ARG(Function) f, const Allocator& a) const;
+
+  /// Determine whether the thread pool is running in the current thread.
+  /**
+   * @return @c true if the current thread belongs to the pool. Otherwise
+   * returns @c false.
+   */
+  bool running_in_this_thread() const ASIO_NOEXCEPT;
+
+  /// Compare two executors for equality.
+  /**
+   * Two executors are equal if they refer to the same underlying thread pool.
+   */
+  friend bool operator==(const executor_type& a,
+      const executor_type& b) ASIO_NOEXCEPT
+  {
+    return &a.pool_ == &b.pool_;
+  }
+
+  /// Compare two executors for inequality.
+  /**
+   * Two executors are equal if they refer to the same underlying thread pool.
+   */
+  friend bool operator!=(const executor_type& a,
+      const executor_type& b) ASIO_NOEXCEPT
+  {
+    return &a.pool_ != &b.pool_;
+  }
+
+private:
+  friend class thread_pool;
+
+  // Constructor.
+  explicit executor_type(thread_pool& p) : pool_(p) {}
+
+  // The underlying thread pool.
+  thread_pool& pool_;
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/thread_pool.hpp"
+#if defined(ASIO_HEADER_ONLY)
+# include "asio/impl/thread_pool.ipp"
+#endif // defined(ASIO_HEADER_ONLY)
+
+#endif // ASIO_THREAD_POOL_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/time_traits.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/time_traits.hpp
new file mode 100644
index 00000000000..8e475119596
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/time_traits.hpp
@@ -0,0 +1,86 @@
+//
+// time_traits.hpp
+// ~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_TIME_TRAITS_HPP
+#define ASIO_TIME_TRAITS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/socket_types.hpp" // Must come before posix_time.
+
+#if defined(ASIO_HAS_BOOST_DATE_TIME) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include <boost/date_time/posix_time/posix_time_types.hpp>
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Time traits suitable for use with the deadline timer.
+template <typename Time>
+struct time_traits;
+
+/// Time traits specialised for posix_time.
+template <>
+struct time_traits<boost::posix_time::ptime>
+{
+  /// The time type.
+  typedef boost::posix_time::ptime time_type;
+
+  /// The duration type.
+  typedef boost::posix_time::time_duration duration_type;
+
+  /// Get the current time.
+  static time_type now()
+  {
+#if defined(BOOST_DATE_TIME_HAS_HIGH_PRECISION_CLOCK)
+    return boost::posix_time::microsec_clock::universal_time();
+#else // defined(BOOST_DATE_TIME_HAS_HIGH_PRECISION_CLOCK)
+    return boost::posix_time::second_clock::universal_time();
+#endif // defined(BOOST_DATE_TIME_HAS_HIGH_PRECISION_CLOCK)
+  }
+
+  /// Add a duration to a time.
+  static time_type add(const time_type& t, const duration_type& d)
+  {
+    return t + d;
+  }
+
+  /// Subtract one time from another.
+  static duration_type subtract(const time_type& t1, const time_type& t2)
+  {
+    return t1 - t2;
+  }
+
+  /// Test whether one time is less than another.
+  static bool less_than(const time_type& t1, const time_type& t2)
+  {
+    return t1 < t2;
+  }
+
+  /// Convert to POSIX duration type.
+  static boost::posix_time::time_duration to_posix_duration(
+      const duration_type& d)
+  {
+    return d;
+  }
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+       // || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_TIME_TRAITS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/buffer.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/buffer.hpp
new file mode 100644
index 00000000000..465897f7d4c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/buffer.hpp
@@ -0,0 +1,24 @@
+//
+// ts/buffer.hpp
+// ~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_TS_BUFFER_HPP
+#define ASIO_TS_BUFFER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/buffer.hpp"
+#include "asio/completion_condition.hpp"
+#include "asio/read.hpp"
+#include "asio/write.hpp"
+#include "asio/read_until.hpp"
+
+#endif // ASIO_TS_BUFFER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/executor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/executor.hpp
new file mode 100644
index 00000000000..cb4fc715cde
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/executor.hpp
@@ -0,0 +1,34 @@
+//
+// ts/executor.hpp
+// ~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_TS_EXECUTOR_HPP
+#define ASIO_TS_EXECUTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/async_result.hpp"
+#include "asio/associated_allocator.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/is_executor.hpp"
+#include "asio/associated_executor.hpp"
+#include "asio/bind_executor.hpp"
+#include "asio/executor_work_guard.hpp"
+#include "asio/system_executor.hpp"
+#include "asio/executor.hpp"
+#include "asio/dispatch.hpp"
+#include "asio/post.hpp"
+#include "asio/defer.hpp"
+#include "asio/strand.hpp"
+#include "asio/packaged_task.hpp"
+#include "asio/use_future.hpp"
+
+#endif // ASIO_TS_EXECUTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/internet.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/internet.hpp
new file mode 100644
index 00000000000..5b9e231c11e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/internet.hpp
@@ -0,0 +1,40 @@
+//
+// ts/internet.hpp
+// ~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_TS_INTERNET_HPP
+#define ASIO_TS_INTERNET_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/ip/address.hpp"
+#include "asio/ip/address_v4.hpp"
+#include "asio/ip/address_v4_iterator.hpp"
+#include "asio/ip/address_v4_range.hpp"
+#include "asio/ip/address_v6.hpp"
+#include "asio/ip/address_v6_iterator.hpp"
+#include "asio/ip/address_v6_range.hpp"
+#include "asio/ip/bad_address_cast.hpp"
+#include "asio/ip/basic_endpoint.hpp"
+#include "asio/ip/basic_resolver_query.hpp"
+#include "asio/ip/basic_resolver_entry.hpp"
+#include "asio/ip/basic_resolver_iterator.hpp"
+#include "asio/ip/basic_resolver.hpp"
+#include "asio/ip/host_name.hpp"
+#include "asio/ip/network_v4.hpp"
+#include "asio/ip/network_v6.hpp"
+#include "asio/ip/tcp.hpp"
+#include "asio/ip/udp.hpp"
+#include "asio/ip/v6_only.hpp"
+#include "asio/ip/unicast.hpp"
+#include "asio/ip/multicast.hpp"
+
+#endif // ASIO_TS_INTERNET_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/io_context.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/io_context.hpp
new file mode 100644
index 00000000000..f293b63e0ba
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/io_context.hpp
@@ -0,0 +1,20 @@
+//
+// ts/io_context.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_TS_IO_CONTEXT_HPP
+#define ASIO_TS_IO_CONTEXT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/io_context.hpp"
+
+#endif // ASIO_TS_IO_CONTEXT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/net.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/net.hpp
new file mode 100644
index 00000000000..1d0237bbca0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/net.hpp
@@ -0,0 +1,26 @@
+//
+// ts/net.hpp
+// ~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_TS_NET_HPP
+#define ASIO_TS_NET_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/ts/netfwd.hpp"
+#include "asio/ts/executor.hpp"
+#include "asio/ts/io_context.hpp"
+#include "asio/ts/timer.hpp"
+#include "asio/ts/buffer.hpp"
+#include "asio/ts/socket.hpp"
+#include "asio/ts/internet.hpp"
+
+#endif // ASIO_TS_NET_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/netfwd.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/netfwd.hpp
new file mode 100644
index 00000000000..b7482acded8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/netfwd.hpp
@@ -0,0 +1,203 @@
+//
+// ts/netfwd.hpp
+// ~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_TS_NETFWD_HPP
+#define ASIO_TS_NETFWD_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_CHRONO)
+# include "asio/detail/chrono.hpp"
+#endif // defined(ASIO_HAS_CHRONO)
+
+#if defined(ASIO_HAS_BOOST_DATE_TIME)
+# include "asio/detail/date_time_fwd.hpp"
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+
+#if !defined(GENERATING_DOCUMENTATION)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+class execution_context;
+
+template <typename T, typename Executor>
+class executor_binder;
+
+template <typename Executor>
+class executor_work_guard;
+
+class system_executor;
+
+class executor;
+
+template <typename Executor>
+class strand;
+
+class io_context;
+
+template <typename Clock>
+struct wait_traits;
+
+#if defined(ASIO_HAS_BOOST_DATE_TIME)
+
+template <typename Time>
+struct time_traits;
+
+#endif // defined(ASIO_HAS_BOOST_DATE_TIME)
+
+#if !defined(ASIO_BASIC_WAITABLE_TIMER_FWD_DECL)
+#define ASIO_BASIC_WAITABLE_TIMER_FWD_DECL
+
+template <typename Clock,
+    typename WaitTraits = wait_traits<Clock>,
+    typename Executor = executor>
+class basic_waitable_timer;
+
+#endif // !defined(ASIO_BASIC_WAITABLE_TIMER_FWD_DECL)
+
+#if defined(ASIO_HAS_CHRONO)
+
+typedef basic_waitable_timer<chrono::system_clock> system_timer;
+
+typedef basic_waitable_timer<chrono::steady_clock> steady_timer;
+
+typedef basic_waitable_timer<chrono::high_resolution_clock>
+  high_resolution_timer;
+
+#endif // defined(ASIO_HAS_CHRONO)
+
+#if !defined(ASIO_BASIC_SOCKET_FWD_DECL)
+#define ASIO_BASIC_SOCKET_FWD_DECL
+
+template <typename Protocol, typename Executor = executor>
+class basic_socket;
+
+#endif // !defined(ASIO_BASIC_SOCKET_FWD_DECL)
+
+#if !defined(ASIO_BASIC_DATAGRAM_SOCKET_FWD_DECL)
+#define ASIO_BASIC_DATAGRAM_SOCKET_FWD_DECL
+
+template <typename Protocol, typename Executor = executor>
+class basic_datagram_socket;
+
+#endif // !defined(ASIO_BASIC_DATAGRAM_SOCKET_FWD_DECL)
+
+#if !defined(ASIO_BASIC_STREAM_SOCKET_FWD_DECL)
+#define ASIO_BASIC_STREAM_SOCKET_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Protocol, typename Executor = executor>
+class basic_stream_socket;
+
+#endif // !defined(ASIO_BASIC_STREAM_SOCKET_FWD_DECL)
+
+#if !defined(ASIO_BASIC_SOCKET_ACCEPTOR_FWD_DECL)
+#define ASIO_BASIC_SOCKET_ACCEPTOR_FWD_DECL
+
+template <typename Protocol, typename Executor = executor>
+class basic_socket_acceptor;
+
+#endif // !defined(ASIO_BASIC_SOCKET_ACCEPTOR_FWD_DECL)
+
+#if !defined(ASIO_BASIC_SOCKET_STREAMBUF_FWD_DECL)
+#define ASIO_BASIC_SOCKET_STREAMBUF_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Protocol,
+#if defined(ASIO_HAS_BOOST_DATE_TIME) \
+  || defined(GENERATING_DOCUMENTATION)
+    typename Clock = boost::posix_time::ptime,
+    typename WaitTraits = time_traits<Clock> >
+#else
+    typename Clock = chrono::steady_clock,
+    typename WaitTraits = wait_traits<Clock> >
+#endif
+class basic_socket_streambuf;
+
+#endif // !defined(ASIO_BASIC_SOCKET_STREAMBUF_FWD_DECL)
+
+#if !defined(ASIO_BASIC_SOCKET_IOSTREAM_FWD_DECL)
+#define ASIO_BASIC_SOCKET_IOSTREAM_FWD_DECL
+
+// Forward declaration with defaulted arguments.
+template <typename Protocol,
+#if defined(ASIO_HAS_BOOST_DATE_TIME) \
+  || defined(GENERATING_DOCUMENTATION)
+    typename Clock = boost::posix_time::ptime,
+    typename WaitTraits = time_traits<Clock> >
+#else
+    typename Clock = chrono::steady_clock,
+    typename WaitTraits = wait_traits<Clock> >
+#endif
+class basic_socket_iostream;
+
+#endif // !defined(ASIO_BASIC_SOCKET_IOSTREAM_FWD_DECL)
+
+namespace ip {
+
+class address;
+
+class address_v4;
+
+class address_v6;
+
+template <typename Address>
+class basic_address_iterator;
+
+typedef basic_address_iterator<address_v4> address_v4_iterator;
+
+typedef basic_address_iterator<address_v6> address_v6_iterator;
+
+template <typename Address>
+class basic_address_range;
+
+typedef basic_address_range<address_v4> address_v4_range;
+
+typedef basic_address_range<address_v6> address_v6_range;
+
+class network_v4;
+
+class network_v6;
+
+template <typename InternetProtocol>
+class basic_endpoint;
+
+template <typename InternetProtocol>
+class basic_resolver_entry;
+
+template <typename InternetProtocol>
+class basic_resolver_results;
+
+#if !defined(ASIO_IP_BASIC_RESOLVER_FWD_DECL)
+#define ASIO_IP_BASIC_RESOLVER_FWD_DECL
+
+template <typename InternetProtocol, typename Executor = executor>
+class basic_resolver;
+
+#endif // !defined(ASIO_IP_BASIC_RESOLVER_FWD_DECL)
+
+class tcp;
+
+class udp;
+
+} // namespace ip
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // !defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_TS_NETFWD_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/socket.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/socket.hpp
new file mode 100644
index 00000000000..5084eb569f9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/socket.hpp
@@ -0,0 +1,27 @@
+//
+// ts/socket.hpp
+// ~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_TS_SOCKET_HPP
+#define ASIO_TS_SOCKET_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/socket_base.hpp"
+#include "asio/basic_socket.hpp"
+#include "asio/basic_datagram_socket.hpp"
+#include "asio/basic_stream_socket.hpp"
+#include "asio/basic_socket_acceptor.hpp"
+#include "asio/basic_socket_streambuf.hpp"
+#include "asio/basic_socket_iostream.hpp"
+#include "asio/connect.hpp"
+
+#endif // ASIO_TS_SOCKET_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/timer.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/timer.hpp
new file mode 100644
index 00000000000..4567dbf3182
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/ts/timer.hpp
@@ -0,0 +1,26 @@
+//
+// ts/timer.hpp
+// ~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_TS_TIMER_HPP
+#define ASIO_TS_TIMER_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/chrono.hpp"
+
+#include "asio/wait_traits.hpp"
+#include "asio/basic_waitable_timer.hpp"
+#include "asio/system_timer.hpp"
+#include "asio/steady_timer.hpp"
+#include "asio/high_resolution_timer.hpp"
+
+#endif // ASIO_TS_TIMER_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/unyield.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/unyield.hpp
new file mode 100644
index 00000000000..c6874d5cf33
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/unyield.hpp
@@ -0,0 +1,21 @@
+//
+// unyield.hpp
+// ~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifdef reenter
+# undef reenter
+#endif
+
+#ifdef yield
+# undef yield
+#endif
+
+#ifdef fork
+# undef fork
+#endif
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/use_awaitable.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/use_awaitable.hpp
new file mode 100644
index 00000000000..c76913cda93
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/use_awaitable.hpp
@@ -0,0 +1,109 @@
+//
+// use_awaitable.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_USE_AWAITABLE_HPP
+#define ASIO_USE_AWAITABLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_CO_AWAIT) || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/awaitable.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// A completion token that represents the currently executing coroutine.
+/**
+ * The @c use_awaitable_t class, with its value @c use_awaitable, is used to
+ * represent the currently executing coroutine. This completion token may be
+ * passed as a handler to an asynchronous operation. For example:
+ *
+ * @code awaitable<void> my_coroutine()
+ * {
+ *   std::size_t n = co_await my_socket.async_read_some(buffer, use_awaitable);
+ *   ...
+ * } @endcode
+ *
+ * When used with co_await, the initiating function (@c async_read_some in the
+ * above example) suspends the current coroutine. The coroutine is resumed when
+ * the asynchronous operation completes, and the result of the operation is
+ * returned.
+ */
+template <typename Executor = executor>
+struct use_awaitable_t
+{
+  /// Default constructor.
+  ASIO_CONSTEXPR use_awaitable_t()
+  {
+  }
+
+  /// Adapts an executor to add the @c use_awaitable_t completion token as the
+  /// default.
+  template <typename InnerExecutor>
+  struct executor_with_default : InnerExecutor
+  {
+    /// Specify @c use_awaitable_t as the default completion token type.
+    typedef use_awaitable_t default_completion_token_type;
+
+    /// Construct the adapted executor from the inner executor type.
+    executor_with_default(const InnerExecutor& ex) ASIO_NOEXCEPT
+      : InnerExecutor(ex)
+    {
+    }
+  };
+
+  /// Type alias to adapt an I/O object to use @c use_awaitable_t as its
+  /// default completion token type.
+#if defined(ASIO_HAS_ALIAS_TEMPLATES) \
+  || defined(GENERATING_DOCUMENTATION)
+  template <typename T>
+  using as_default_on_t = typename T::template rebind_executor<
+      executor_with_default<typename T::executor_type> >::other;
+#endif // defined(ASIO_HAS_ALIAS_TEMPLATES)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+  /// Function helper to adapt an I/O object to use @c use_awaitable_t as its
+  /// default completion token type.
+  template <typename T>
+  static typename T::template rebind_executor<
+      executor_with_default<typename T::executor_type>
+    >::other
+  as_default_on(ASIO_MOVE_ARG(T) object)
+  {
+    return typename as_default_on_t<typename decay<T>::type>::type(
+        ASIO_MOVE_CAST(T)(object));
+  }
+};
+
+/// A completion token object that represents the currently executing coroutine.
+/**
+ * See the documentation for asio::use_awaitable_t for a usage example.
+ */
+#if defined(ASIO_HAS_CONSTEXPR) || defined(GENERATING_DOCUMENTATION)
+constexpr use_awaitable_t<> use_awaitable;
+#elif defined(ASIO_MSVC)
+__declspec(selectany) use_awaitable_t<> use_awaitable;
+#endif
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/use_awaitable.hpp"
+
+#endif // defined(ASIO_HAS_CO_AWAIT) || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_USE_AWAITABLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/use_future.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/use_future.hpp
new file mode 100644
index 00000000000..79d9c566d95
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/use_future.hpp
@@ -0,0 +1,160 @@
+//
+// use_future.hpp
+// ~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_USE_FUTURE_HPP
+#define ASIO_USE_FUTURE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/future.hpp"
+
+#if defined(ASIO_HAS_STD_FUTURE_CLASS) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include <memory>
+#include "asio/detail/type_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace detail {
+
+template <typename Function, typename Allocator>
+class packaged_token;
+
+template <typename Function, typename Allocator, typename Result>
+class packaged_handler;
+
+} // namespace detail
+
+/// Class used to specify that an asynchronous operation should return a future.
+/**
+ * The use_future_t class is used to indicate that an asynchronous operation
+ * should return a std::future object. A use_future_t object may be passed as a
+ * handler to an asynchronous operation, typically using the special value @c
+ * asio::use_future. For example:
+ *
+ * @code std::future<std::size_t> my_future
+ *   = my_socket.async_read_some(my_buffer, asio::use_future); @endcode
+ *
+ * The initiating function (async_read_some in the above example) returns a
+ * future that will receive the result of the operation. If the operation
+ * completes with an error_code indicating failure, it is converted into a
+ * system_error and passed back to the caller via the future.
+ */
+template <typename Allocator = std::allocator<void> >
+class use_future_t
+{
+public:
+  /// The allocator type. The allocator is used when constructing the
+  /// @c std::promise object for a given asynchronous operation.
+  typedef Allocator allocator_type;
+
+  /// Construct using default-constructed allocator.
+  ASIO_CONSTEXPR use_future_t()
+  {
+  }
+
+  /// Construct using specified allocator.
+  explicit use_future_t(const Allocator& allocator)
+    : allocator_(allocator)
+  {
+  }
+
+#if !defined(ASIO_NO_DEPRECATED)
+  /// (Deprecated: Use rebind().) Specify an alternate allocator.
+  template <typename OtherAllocator>
+  use_future_t<OtherAllocator> operator[](const OtherAllocator& allocator) const
+  {
+    return use_future_t<OtherAllocator>(allocator);
+  }
+#endif // !defined(ASIO_NO_DEPRECATED)
+
+  /// Specify an alternate allocator.
+  template <typename OtherAllocator>
+  use_future_t<OtherAllocator> rebind(const OtherAllocator& allocator) const
+  {
+    return use_future_t<OtherAllocator>(allocator);
+  }
+
+  /// Obtain allocator.
+  allocator_type get_allocator() const
+  {
+    return allocator_;
+  }
+
+  /// Wrap a function object in a packaged task.
+  /**
+   * The @c package function is used to adapt a function object as a packaged
+   * task. When this adapter is passed as a completion token to an asynchronous
+   * operation, the result of the function object is retuned via a std::future.
+   *
+   * @par Example
+   *
+   * @code std::future<std::size_t> fut =
+   *   my_socket.async_read_some(buffer,
+   *     use_future([](asio::error_code ec, std::size_t n)
+   *       {
+   *         return ec ? 0 : n;
+   *       }));
+   * ...
+   * std::size_t n = fut.get(); @endcode
+   */
+  template <typename Function>
+#if defined(GENERATING_DOCUMENTATION)
+  unspecified
+#else // defined(GENERATING_DOCUMENTATION)
+  detail::packaged_token<typename decay<Function>::type, Allocator>
+#endif // defined(GENERATING_DOCUMENTATION)
+  operator()(ASIO_MOVE_ARG(Function) f) const;
+
+private:
+  // Helper type to ensure that use_future can be constexpr default-constructed
+  // even when std::allocator<void> can't be.
+  struct std_allocator_void
+  {
+    ASIO_CONSTEXPR std_allocator_void()
+    {
+    }
+
+    operator std::allocator<void>() const
+    {
+      return std::allocator<void>();
+    }
+  };
+
+  typename conditional<
+    is_same<std::allocator<void>, Allocator>::value,
+    std_allocator_void, Allocator>::type allocator_;
+};
+
+/// A special value, similar to std::nothrow.
+/**
+ * See the documentation for asio::use_future_t for a usage example.
+ */
+#if defined(ASIO_HAS_CONSTEXPR) || defined(GENERATING_DOCUMENTATION)
+constexpr use_future_t<> use_future;
+#elif defined(ASIO_MSVC)
+__declspec(selectany) use_future_t<> use_future;
+#endif
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/use_future.hpp"
+
+#endif // defined(ASIO_HAS_STD_FUTURE_CLASS)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_USE_FUTURE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/uses_executor.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/uses_executor.hpp
new file mode 100644
index 00000000000..9a23a1a441c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/uses_executor.hpp
@@ -0,0 +1,71 @@
+//
+// uses_executor.hpp
+// ~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_USES_EXECUTOR_HPP
+#define ASIO_USES_EXECUTOR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/detail/type_traits.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// A special type, similar to std::nothrow_t, used to disambiguate
+/// constructors that accept executor arguments.
+/**
+ * The executor_arg_t struct is an empty structure type used as a unique type
+ * to disambiguate constructor and function overloading. Specifically, some
+ * types have constructors with executor_arg_t as the first argument,
+ * immediately followed by an argument of a type that satisfies the Executor
+ * type requirements.
+ */
+struct executor_arg_t
+{
+  /// Constructor.
+  ASIO_CONSTEXPR executor_arg_t() ASIO_NOEXCEPT
+  {
+  }
+};
+
+/// A special value, similar to std::nothrow, used to disambiguate constructors
+/// that accept executor arguments.
+/**
+ * See asio::executor_arg_t and asio::uses_executor
+ * for more information.
+ */
+#if defined(ASIO_HAS_CONSTEXPR) || defined(GENERATING_DOCUMENTATION)
+constexpr executor_arg_t executor_arg;
+#elif defined(ASIO_MSVC)
+__declspec(selectany) executor_arg_t executor_arg;
+#endif
+
+/// The uses_executor trait detects whether a type T has an associated executor
+/// that is convertible from type Executor.
+/**
+ * Meets the BinaryTypeTrait requirements. The Asio library provides a
+ * definition that is derived from false_type. A program may specialize this
+ * template to derive from true_type for a user-defined type T that can be
+ * constructed with an executor, where the first argument of a constructor has
+ * type executor_arg_t and the second argument is convertible from type
+ * Executor.
+ */
+template <typename T, typename Executor>
+struct uses_executor : false_type {};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_USES_EXECUTOR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/version.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/version.hpp
new file mode 100644
index 00000000000..f7c25309a1a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/version.hpp
@@ -0,0 +1,23 @@
+//
+// version.hpp
+// ~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_VERSION_HPP
+#define ASIO_VERSION_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+// ASIO_VERSION % 100 is the sub-minor version
+// ASIO_VERSION / 100 % 1000 is the minor version
+// ASIO_VERSION / 100000 is the major version
+#define ASIO_VERSION 101401 // 1.14.1
+
+#endif // ASIO_VERSION_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/wait_traits.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/wait_traits.hpp
new file mode 100644
index 00000000000..5e64abfa222
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/wait_traits.hpp
@@ -0,0 +1,56 @@
+//
+// wait_traits.hpp
+// ~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WAIT_TRAITS_HPP
+#define ASIO_WAIT_TRAITS_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/// Wait traits suitable for use with the basic_waitable_timer class template.
+template <typename Clock>
+struct wait_traits
+{
+  /// Convert a clock duration into a duration used for waiting.
+  /**
+   * @returns @c d.
+   */
+  static typename Clock::duration to_wait_duration(
+      const typename Clock::duration& d)
+  {
+    return d;
+  }
+
+  /// Convert a clock duration into a duration used for waiting.
+  /**
+   * @returns @c d.
+   */
+  static typename Clock::duration to_wait_duration(
+      const typename Clock::time_point& t)
+  {
+    typename Clock::time_point now = Clock::now();
+    if (now + (Clock::duration::max)() < t)
+      return (Clock::duration::max)();
+    if (now + (Clock::duration::min)() > t)
+      return (Clock::duration::min)();
+    return t - now;
+  }
+};
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // ASIO_WAIT_TRAITS_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_object_handle.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_object_handle.hpp
new file mode 100644
index 00000000000..26a03e92085
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_object_handle.hpp
@@ -0,0 +1,435 @@
+//
+// windows/basic_object_handle.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2011 Boris Schaeling (boris@highscore.de)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WINDOWS_BASIC_OBJECT_HANDLE_HPP
+#define ASIO_WINDOWS_BASIC_OBJECT_HANDLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_WINDOWS_OBJECT_HANDLE) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/async_result.hpp"
+#include "asio/detail/io_object_impl.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/detail/win_object_handle_service.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/executor.hpp"
+
+#if defined(ASIO_HAS_MOVE)
+# include <utility>
+#endif // defined(ASIO_HAS_MOVE)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace windows {
+
+/// Provides object-oriented handle functionality.
+/**
+ * The windows::basic_object_handle class provides asynchronous and blocking
+ * object-oriented handle functionality.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename Executor = executor>
+class basic_object_handle
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the handle type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The handle type when rebound to the specified executor.
+    typedef basic_object_handle<Executor1> other;
+  };
+
+  /// The native representation of a handle.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#else
+  typedef asio::detail::win_object_handle_service::native_handle_type
+    native_handle_type;
+#endif
+
+  /// An object handle is always the lowest layer.
+  typedef basic_object_handle lowest_layer_type;
+
+  /// Construct an object handle without opening it.
+  /**
+   * This constructor creates an object handle without opening it.
+   *
+   * @param ex The I/O executor that the object handle will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * object handle.
+   */
+  explicit basic_object_handle(const executor_type& ex)
+    : impl_(ex)
+  {
+  }
+
+  /// Construct an object handle without opening it.
+  /**
+   * This constructor creates an object handle without opening it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the object handle will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the object handle.
+   */
+  template <typename ExecutionContext>
+  explicit basic_object_handle(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value,
+        basic_object_handle
+      >::type* = 0)
+    : impl_(context)
+  {
+  }
+
+  /// Construct an object handle on an existing native handle.
+  /**
+   * This constructor creates an object handle object to hold an existing native
+   * handle.
+   *
+   * @param ex The I/O executor that the object handle will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the
+   * object handle.
+   *
+   * @param native_handle The new underlying handle implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_object_handle(const executor_type& ex,
+      const native_handle_type& native_handle)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(), native_handle, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Construct an object handle on an existing native handle.
+  /**
+   * This constructor creates an object handle object to hold an existing native
+   * handle.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the object handle will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the object handle.
+   *
+   * @param native_handle The new underlying handle implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_object_handle(ExecutionContext& context,
+      const native_handle_type& native_handle,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(), native_handle, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct an object handle from another.
+  /**
+   * This constructor moves an object handle from one object to another.
+   *
+   * @param other The other object handle object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_object_handle(const executor_type&)
+   * constructor.
+   */
+  basic_object_handle(basic_object_handle&& other)
+    : impl_(std::move(other.impl_))
+  {
+  }
+
+  /// Move-assign an object handle from another.
+  /**
+   * This assignment operator moves an object handle from one object to another.
+   *
+   * @param other The other object handle object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_object_handle(const executor_type&)
+   * constructor.
+   */
+  basic_object_handle& operator=(basic_object_handle&& other)
+  {
+    impl_ = std::move(other.impl_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return impl_.get_executor();
+  }
+
+  /// Get a reference to the lowest layer.
+  /**
+   * This function returns a reference to the lowest layer in a stack of
+   * layers. Since an object handle cannot contain any further layers, it simply
+   * returns a reference to itself.
+   *
+   * @return A reference to the lowest layer in the stack of layers. Ownership
+   * is not transferred to the caller.
+   */
+  lowest_layer_type& lowest_layer()
+  {
+    return *this;
+  }
+
+  /// Get a const reference to the lowest layer.
+  /**
+   * This function returns a const reference to the lowest layer in a stack of
+   * layers. Since an object handle cannot contain any further layers, it simply
+   * returns a reference to itself.
+   *
+   * @return A const reference to the lowest layer in the stack of layers.
+   * Ownership is not transferred to the caller.
+   */
+  const lowest_layer_type& lowest_layer() const
+  {
+    return *this;
+  }
+
+  /// Assign an existing native handle to the handle.
+  /*
+   * This function opens the handle to hold an existing native handle.
+   *
+   * @param handle A native handle.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void assign(const native_handle_type& handle)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(), handle, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Assign an existing native handle to the handle.
+  /*
+   * This function opens the handle to hold an existing native handle.
+   *
+   * @param handle A native handle.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID assign(const native_handle_type& handle,
+      asio::error_code& ec)
+  {
+    impl_.get_service().assign(impl_.get_implementation(), handle, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Determine whether the handle is open.
+  bool is_open() const
+  {
+    return impl_.get_service().is_open(impl_.get_implementation());
+  }
+
+  /// Close the handle.
+  /**
+   * This function is used to close the handle. Any asynchronous read or write
+   * operations will be cancelled immediately, and will complete with the
+   * asio::error::operation_aborted error.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void close()
+  {
+    asio::error_code ec;
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "close");
+  }
+
+  /// Close the handle.
+  /**
+   * This function is used to close the handle. Any asynchronous read or write
+   * operations will be cancelled immediately, and will complete with the
+   * asio::error::operation_aborted error.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID close(asio::error_code& ec)
+  {
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Get the native handle representation.
+  /**
+   * This function may be used to obtain the underlying representation of the
+   * handle. This is intended to allow access to native handle functionality
+   * that is not otherwise provided.
+   */
+  native_handle_type native_handle()
+  {
+    return impl_.get_service().native_handle(impl_.get_implementation());
+  }
+
+  /// Cancel all asynchronous operations associated with the handle.
+  /**
+   * This function causes all outstanding asynchronous read or write operations
+   * to finish immediately, and the handlers for cancelled operations will be
+   * passed the asio::error::operation_aborted error.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void cancel()
+  {
+    asio::error_code ec;
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "cancel");
+  }
+
+  /// Cancel all asynchronous operations associated with the handle.
+  /**
+   * This function causes all outstanding asynchronous read or write operations
+   * to finish immediately, and the handlers for cancelled operations will be
+   * passed the asio::error::operation_aborted error.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID cancel(asio::error_code& ec)
+  {
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Perform a blocking wait on the object handle.
+  /**
+   * This function is used to wait for the object handle to be set to the
+   * signalled state. This function blocks and does not return until the object
+   * handle has been set to the signalled state.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void wait()
+  {
+    asio::error_code ec;
+    impl_.get_service().wait(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "wait");
+  }
+
+  /// Perform a blocking wait on the object handle.
+  /**
+   * This function is used to wait for the object handle to be set to the
+   * signalled state. This function blocks and does not return until the object
+   * handle has been set to the signalled state.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  void wait(asio::error_code& ec)
+  {
+    impl_.get_service().wait(impl_.get_implementation(), ec);
+  }
+
+  /// Start an asynchronous wait on the object handle.
+  /**
+   * This function is be used to initiate an asynchronous wait against the
+   * object handle. It always returns immediately.
+   *
+   * @param handler The handler to be called when the object handle is set to
+   * the signalled state. Copies will be made of the handler as required. The
+   * function signature of the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error // Result of operation.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   */
+  template <
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code))
+        WaitHandler ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WaitHandler,
+      void (asio::error_code))
+  async_wait(
+      ASIO_MOVE_ARG(WaitHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WaitHandler, void (asio::error_code)>(
+        initiate_async_wait(this), handler);
+  }
+
+private:
+  // Disallow copying and assignment.
+  basic_object_handle(const basic_object_handle&) ASIO_DELETED;
+  basic_object_handle& operator=(const basic_object_handle&) ASIO_DELETED;
+
+  class initiate_async_wait
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_wait(basic_object_handle* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WaitHandler>
+    void operator()(ASIO_MOVE_ARG(WaitHandler) handler) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WaitHandler.
+      ASIO_WAIT_HANDLER_CHECK(WaitHandler, handler) type_check;
+
+      detail::non_const_lvalue<WaitHandler> handler2(handler);
+      self_->impl_.get_service().async_wait(
+          self_->impl_.get_implementation(), handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_object_handle* self_;
+  };
+
+  asio::detail::io_object_impl<
+    asio::detail::win_object_handle_service, Executor> impl_;
+};
+
+} // namespace windows
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_WINDOWS_OBJECT_HANDLE)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_WINDOWS_BASIC_OBJECT_HANDLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_overlapped_handle.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_overlapped_handle.hpp
new file mode 100644
index 00000000000..69966e97a0d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_overlapped_handle.hpp
@@ -0,0 +1,361 @@
+//
+// windows/basic_overlapped_handle.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WINDOWS_BASIC_OVERLAPPED_HANDLE_HPP
+#define ASIO_WINDOWS_BASIC_OVERLAPPED_HANDLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_WINDOWS_RANDOM_ACCESS_HANDLE) \
+  || defined(ASIO_HAS_WINDOWS_STREAM_HANDLE) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include <cstddef>
+#include "asio/async_result.hpp"
+#include "asio/detail/io_object_impl.hpp"
+#include "asio/detail/throw_error.hpp"
+#include "asio/detail/win_iocp_handle_service.hpp"
+#include "asio/error.hpp"
+#include "asio/execution_context.hpp"
+#include "asio/executor.hpp"
+
+#if defined(ASIO_HAS_MOVE)
+# include <utility>
+#endif // defined(ASIO_HAS_MOVE)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace windows {
+
+/// Provides Windows handle functionality for objects that support
+/// overlapped I/O.
+/**
+ * The windows::overlapped_handle class provides the ability to wrap a Windows
+ * handle. The underlying object referred to by the handle must support
+ * overlapped I/O.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename Executor = executor>
+class basic_overlapped_handle
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the handle type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The handle type when rebound to the specified executor.
+    typedef basic_overlapped_handle<Executor1> other;
+  };
+
+  /// The native representation of a handle.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#else
+  typedef asio::detail::win_iocp_handle_service::native_handle_type
+    native_handle_type;
+#endif
+
+  /// An overlapped_handle is always the lowest layer.
+  typedef basic_overlapped_handle lowest_layer_type;
+
+  /// Construct an overlapped handle without opening it.
+  /**
+   * This constructor creates an overlapped handle without opening it.
+   *
+   * @param ex The I/O executor that the overlapped handle will use, by default,
+   * to dispatch handlers for any asynchronous operations performed on the
+   * overlapped handle.
+   */
+  explicit basic_overlapped_handle(const executor_type& ex)
+    : impl_(ex)
+  {
+  }
+
+  /// Construct an overlapped handle without opening it.
+  /**
+   * This constructor creates an overlapped handle without opening it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the overlapped handle will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the overlapped handle.
+   */
+  template <typename ExecutionContext>
+  explicit basic_overlapped_handle(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value,
+        basic_overlapped_handle
+      >::type* = 0)
+    : impl_(context)
+  {
+  }
+
+  /// Construct an overlapped handle on an existing native handle.
+  /**
+   * This constructor creates an overlapped handle object to hold an existing
+   * native handle.
+   *
+   * @param ex The I/O executor that the overlapped handle will use, by default,
+   * to dispatch handlers for any asynchronous operations performed on the
+   * overlapped handle.
+   *
+   * @param native_handle The new underlying handle implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_overlapped_handle(const executor_type& ex,
+      const native_handle_type& native_handle)
+    : impl_(ex)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(), native_handle, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Construct an overlapped handle on an existing native handle.
+  /**
+   * This constructor creates an overlapped handle object to hold an existing
+   * native handle.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the overlapped handle will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the overlapped handle.
+   *
+   * @param native_handle The new underlying handle implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_overlapped_handle(ExecutionContext& context,
+      const native_handle_type& native_handle,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(), native_handle, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct an overlapped handle from another.
+  /**
+   * This constructor moves a handle from one object to another.
+   *
+   * @param other The other overlapped handle object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c overlapped_handle(const executor_type&)
+   * constructor.
+   */
+  basic_overlapped_handle(basic_overlapped_handle&& other)
+    : impl_(std::move(other.impl_))
+  {
+  }
+
+  /// Move-assign an overlapped handle from another.
+  /**
+   * This assignment operator moves a handle from one object to another.
+   *
+   * @param other The other overlapped handle object from which the move will
+   * occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c overlapped_handle(const executor_type&)
+   * constructor.
+   */
+  basic_overlapped_handle& operator=(basic_overlapped_handle&& other)
+  {
+    impl_ = std::move(other.impl_);
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Get the executor associated with the object.
+  executor_type get_executor() ASIO_NOEXCEPT
+  {
+    return impl_.get_executor();
+  }
+
+  /// Get a reference to the lowest layer.
+  /**
+   * This function returns a reference to the lowest layer in a stack of
+   * layers. Since an overlapped_handle cannot contain any further layers, it
+   * simply returns a reference to itself.
+   *
+   * @return A reference to the lowest layer in the stack of layers. Ownership
+   * is not transferred to the caller.
+   */
+  lowest_layer_type& lowest_layer()
+  {
+    return *this;
+  }
+
+  /// Get a const reference to the lowest layer.
+  /**
+   * This function returns a const reference to the lowest layer in a stack of
+   * layers. Since an overlapped_handle cannot contain any further layers, it
+   * simply returns a reference to itself.
+   *
+   * @return A const reference to the lowest layer in the stack of layers.
+   * Ownership is not transferred to the caller.
+   */
+  const lowest_layer_type& lowest_layer() const
+  {
+    return *this;
+  }
+
+  /// Assign an existing native handle to the handle.
+  /*
+   * This function opens the handle to hold an existing native handle.
+   *
+   * @param handle A native handle.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void assign(const native_handle_type& handle)
+  {
+    asio::error_code ec;
+    impl_.get_service().assign(impl_.get_implementation(), handle, ec);
+    asio::detail::throw_error(ec, "assign");
+  }
+
+  /// Assign an existing native handle to the handle.
+  /*
+   * This function opens the handle to hold an existing native handle.
+   *
+   * @param handle A native handle.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID assign(const native_handle_type& handle,
+      asio::error_code& ec)
+  {
+    impl_.get_service().assign(impl_.get_implementation(), handle, ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Determine whether the handle is open.
+  bool is_open() const
+  {
+    return impl_.get_service().is_open(impl_.get_implementation());
+  }
+
+  /// Close the handle.
+  /**
+   * This function is used to close the handle. Any asynchronous read or write
+   * operations will be cancelled immediately, and will complete with the
+   * asio::error::operation_aborted error.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void close()
+  {
+    asio::error_code ec;
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "close");
+  }
+
+  /// Close the handle.
+  /**
+   * This function is used to close the handle. Any asynchronous read or write
+   * operations will be cancelled immediately, and will complete with the
+   * asio::error::operation_aborted error.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID close(asio::error_code& ec)
+  {
+    impl_.get_service().close(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+  /// Get the native handle representation.
+  /**
+   * This function may be used to obtain the underlying representation of the
+   * handle. This is intended to allow access to native handle functionality
+   * that is not otherwise provided.
+   */
+  native_handle_type native_handle()
+  {
+    return impl_.get_service().native_handle(impl_.get_implementation());
+  }
+
+  /// Cancel all asynchronous operations associated with the handle.
+  /**
+   * This function causes all outstanding asynchronous read or write operations
+   * to finish immediately, and the handlers for cancelled operations will be
+   * passed the asio::error::operation_aborted error.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  void cancel()
+  {
+    asio::error_code ec;
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    asio::detail::throw_error(ec, "cancel");
+  }
+
+  /// Cancel all asynchronous operations associated with the handle.
+  /**
+   * This function causes all outstanding asynchronous read or write operations
+   * to finish immediately, and the handlers for cancelled operations will be
+   * passed the asio::error::operation_aborted error.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   */
+  ASIO_SYNC_OP_VOID cancel(asio::error_code& ec)
+  {
+    impl_.get_service().cancel(impl_.get_implementation(), ec);
+    ASIO_SYNC_OP_VOID_RETURN(ec);
+  }
+
+protected:
+  /// Protected destructor to prevent deletion through this type.
+  /**
+   * This function destroys the handle, cancelling any outstanding asynchronous
+   * wait operations associated with the handle as if by calling @c cancel.
+   */
+  ~basic_overlapped_handle()
+  {
+  }
+
+  asio::detail::io_object_impl<
+    asio::detail::win_iocp_handle_service, Executor> impl_;
+
+private:
+  // Disallow copying and assignment.
+  basic_overlapped_handle(const basic_overlapped_handle&) ASIO_DELETED;
+  basic_overlapped_handle& operator=(
+      const basic_overlapped_handle&) ASIO_DELETED;
+};
+
+} // namespace windows
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_WINDOWS_RANDOM_ACCESS_HANDLE)
+       //   || defined(ASIO_HAS_WINDOWS_STREAM_HANDLE)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_WINDOWS_BASIC_OVERLAPPED_HANDLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_random_access_handle.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_random_access_handle.hpp
new file mode 100644
index 00000000000..ca2d741444f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_random_access_handle.hpp
@@ -0,0 +1,490 @@
+//
+// windows/basic_random_access_handle.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WINDOWS_BASIC_RANDOM_ACCESS_HANDLE_HPP
+#define ASIO_WINDOWS_BASIC_RANDOM_ACCESS_HANDLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/windows/basic_overlapped_handle.hpp"
+
+#if defined(ASIO_HAS_WINDOWS_RANDOM_ACCESS_HANDLE) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace windows {
+
+/// Provides random-access handle functionality.
+/**
+ * The windows::basic_random_access_handle class provides asynchronous and
+ * blocking random-access handle functionality.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+template <typename Executor = executor>
+class basic_random_access_handle
+  : public basic_overlapped_handle<Executor>
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the handle type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The handle type when rebound to the specified executor.
+    typedef basic_random_access_handle<Executor1> other;
+  };
+
+  /// The native representation of a handle.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#else
+  typedef asio::detail::win_iocp_handle_service::native_handle_type
+    native_handle_type;
+#endif
+
+  /// Construct a random-access handle without opening it.
+  /**
+   * This constructor creates a random-access handle without opening it.
+   *
+   * @param ex The I/O executor that the random-access handle will use, by
+   * default, to dispatch handlers for any asynchronous operations performed on
+   * the random-access handle.
+   */
+  explicit basic_random_access_handle(const executor_type& ex)
+    : basic_overlapped_handle<Executor>(ex)
+  {
+  }
+
+  /// Construct a random-access handle without opening it.
+  /**
+   * This constructor creates a random-access handle without opening it. The
+   * handle needs to be opened or assigned before data can be sent or received
+   * on it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the random-access handle will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the random-access handle.
+   */
+  template <typename ExecutionContext>
+  explicit basic_random_access_handle(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value,
+        basic_random_access_handle
+      >::type* = 0)
+    : basic_overlapped_handle<Executor>(context)
+  {
+  }
+
+  /// Construct a random-access handle on an existing native handle.
+  /**
+   * This constructor creates a random-access handle object to hold an existing
+   * native handle.
+   *
+   * @param ex The I/O executor that the random-access handle will use, by
+   * default, to dispatch handlers for any asynchronous operations performed on
+   * the random-access handle.
+   *
+   * @param handle The new underlying handle implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_random_access_handle(const executor_type& ex,
+      const native_handle_type& handle)
+    : basic_overlapped_handle<Executor>(ex, handle)
+  {
+  }
+
+  /// Construct a random-access handle on an existing native handle.
+  /**
+   * This constructor creates a random-access handle object to hold an existing
+   * native handle.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the random-access handle will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the random-access handle.
+   *
+   * @param handle The new underlying handle implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_random_access_handle(ExecutionContext& context,
+      const native_handle_type& handle,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_overlapped_handle<Executor>(context, handle)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a random-access handle from another.
+  /**
+   * This constructor moves a random-access handle from one object to another.
+   *
+   * @param other The other random-access handle object from which the
+   * move will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_random_access_handle(const executor_type&)
+   * constructor.
+   */
+  basic_random_access_handle(basic_random_access_handle&& other)
+    : basic_overlapped_handle<Executor>(std::move(other))
+  {
+  }
+
+  /// Move-assign a random-access handle from another.
+  /**
+   * This assignment operator moves a random-access handle from one object to
+   * another.
+   *
+   * @param other The other random-access handle object from which the
+   * move will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_random_access_handle(const executor_type&)
+   * constructor.
+   */
+  basic_random_access_handle& operator=(basic_random_access_handle&& other)
+  {
+    basic_overlapped_handle<Executor>::operator=(std::move(other));
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Write some data to the handle at the specified offset.
+  /**
+   * This function is used to write data to the random-access handle. The
+   * function call will block until one or more bytes of the data has been
+   * written successfully, or until an error occurs.
+   *
+   * @param offset The offset at which the data will be written.
+   *
+   * @param buffers One or more data buffers to be written to the handle.
+   *
+   * @returns The number of bytes written.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The write_some_at operation may not write all of the data. Consider
+   * using the @ref write_at function if you need to ensure that all data is
+   * written before the blocking operation completes.
+   *
+   * @par Example
+   * To write a single data buffer use the @ref buffer function as follows:
+   * @code
+   * handle.write_some_at(42, asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on writing multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some_at(uint64_t offset,
+      const ConstBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().write_some_at(
+        this->impl_.get_implementation(), offset, buffers, ec);
+    asio::detail::throw_error(ec, "write_some_at");
+    return s;
+  }
+
+  /// Write some data to the handle at the specified offset.
+  /**
+   * This function is used to write data to the random-access handle. The
+   * function call will block until one or more bytes of the data has been
+   * written successfully, or until an error occurs.
+   *
+   * @param offset The offset at which the data will be written.
+   *
+   * @param buffers One or more data buffers to be written to the handle.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes written. Returns 0 if an error occurred.
+   *
+   * @note The write_some operation may not transmit all of the data to the
+   * peer. Consider using the @ref write_at function if you need to ensure that
+   * all data is written before the blocking operation completes.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some_at(uint64_t offset,
+      const ConstBufferSequence& buffers, asio::error_code& ec)
+  {
+    return this->impl_.get_service().write_some_at(
+        this->impl_.get_implementation(), offset, buffers, ec);
+  }
+
+  /// Start an asynchronous write at the specified offset.
+  /**
+   * This function is used to asynchronously write data to the random-access
+   * handle. The function call always returns immediately.
+   *
+   * @param offset The offset at which the data will be written.
+   *
+   * @param buffers One or more data buffers to be written to the handle.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the write operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes written.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The write operation may not transmit all of the data to the peer.
+   * Consider using the @ref async_write_at function if you need to ensure that
+   * all data is written before the asynchronous operation completes.
+   *
+   * @par Example
+   * To write a single data buffer use the @ref buffer function as follows:
+   * @code
+   * handle.async_write_some_at(42, asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on writing multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_write_some_at(uint64_t offset,
+      const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_write_some_at(this), handler, offset, buffers);
+  }
+
+  /// Read some data from the handle at the specified offset.
+  /**
+   * This function is used to read data from the random-access handle. The
+   * function call will block until one or more bytes of data has been read
+   * successfully, or until an error occurs.
+   *
+   * @param offset The offset at which the data will be read.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   *
+   * @returns The number of bytes read.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read_at function if you need to ensure that
+   * the requested amount of data is read before the blocking operation
+   * completes.
+   *
+   * @par Example
+   * To read into a single data buffer use the @ref buffer function as follows:
+   * @code
+   * handle.read_some_at(42, asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on reading into multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some_at(uint64_t offset,
+      const MutableBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().read_some_at(
+        this->impl_.get_implementation(), offset, buffers, ec);
+    asio::detail::throw_error(ec, "read_some_at");
+    return s;
+  }
+
+  /// Read some data from the handle at the specified offset.
+  /**
+   * This function is used to read data from the random-access handle. The
+   * function call will block until one or more bytes of data has been read
+   * successfully, or until an error occurs.
+   *
+   * @param offset The offset at which the data will be read.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes read. Returns 0 if an error occurred.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read_at function if you need to ensure that
+   * the requested amount of data is read before the blocking operation
+   * completes.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some_at(uint64_t offset,
+      const MutableBufferSequence& buffers, asio::error_code& ec)
+  {
+    return this->impl_.get_service().read_some_at(
+        this->impl_.get_implementation(), offset, buffers, ec);
+  }
+
+  /// Start an asynchronous read at the specified offset.
+  /**
+   * This function is used to asynchronously read data from the random-access
+   * handle. The function call always returns immediately.
+   *
+   * @param offset The offset at which the data will be read.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the read operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes read.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The read operation may not read all of the requested number of bytes.
+   * Consider using the @ref async_read_at function if you need to ensure that
+   * the requested amount of data is read before the asynchronous operation
+   * completes.
+   *
+   * @par Example
+   * To read into a single data buffer use the @ref buffer function as follows:
+   * @code
+   * handle.async_read_some_at(42, asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on reading into multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_read_some_at(uint64_t offset,
+      const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_read_some_at(this), handler, offset, buffers);
+  }
+
+private:
+  class initiate_async_write_some_at
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_write_some_at(basic_random_access_handle* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        uint64_t offset, const ConstBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      detail::non_const_lvalue<WriteHandler> handler2(handler);
+      self_->impl_.get_service().async_write_some_at(
+          self_->impl_.get_implementation(), offset, buffers, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_random_access_handle* self_;
+  };
+
+  class initiate_async_read_some_at
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_read_some_at(basic_random_access_handle* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        uint64_t offset, const MutableBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      detail::non_const_lvalue<ReadHandler> handler2(handler);
+      self_->impl_.get_service().async_read_some_at(
+          self_->impl_.get_implementation(), offset, buffers, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_random_access_handle* self_;
+  };
+};
+
+} // namespace windows
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_WINDOWS_RANDOM_ACCESS_HANDLE)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_WINDOWS_BASIC_RANDOM_ACCESS_HANDLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_stream_handle.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_stream_handle.hpp
new file mode 100644
index 00000000000..a335b5b2d9d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/basic_stream_handle.hpp
@@ -0,0 +1,474 @@
+//
+// windows/basic_stream_handle.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WINDOWS_BASIC_STREAM_HANDLE_HPP
+#define ASIO_WINDOWS_BASIC_STREAM_HANDLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include "asio/windows/basic_overlapped_handle.hpp"
+
+#if defined(ASIO_HAS_WINDOWS_STREAM_HANDLE) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace windows {
+
+/// Provides stream-oriented handle functionality.
+/**
+ * The windows::basic_stream_handle class provides asynchronous and blocking
+ * stream-oriented handle functionality.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ *
+ * @par Concepts:
+ * AsyncReadStream, AsyncWriteStream, Stream, SyncReadStream, SyncWriteStream.
+ */
+template <typename Executor = executor>
+class basic_stream_handle
+  : public basic_overlapped_handle<Executor>
+{
+public:
+  /// The type of the executor associated with the object.
+  typedef Executor executor_type;
+
+  /// Rebinds the handle type to another executor.
+  template <typename Executor1>
+  struct rebind_executor
+  {
+    /// The handle type when rebound to the specified executor.
+    typedef basic_stream_handle<Executor1> other;
+  };
+
+  /// The native representation of a handle.
+#if defined(GENERATING_DOCUMENTATION)
+  typedef implementation_defined native_handle_type;
+#else
+  typedef asio::detail::win_iocp_handle_service::native_handle_type
+    native_handle_type;
+#endif
+
+  /// Construct a stream handle without opening it.
+  /**
+   * This constructor creates a stream handle without opening it.
+   *
+   * @param ex The I/O executor that the stream handle will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the stream
+   * handle.
+   */
+  explicit basic_stream_handle(const executor_type& ex)
+    : basic_overlapped_handle<Executor>(ex)
+  {
+  }
+
+  /// Construct a stream handle without opening it.
+  /**
+   * This constructor creates a stream handle without opening it. The handle
+   * needs to be opened or assigned before data can be sent or received on it.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the stream handle will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the stream handle.
+   */
+  template <typename ExecutionContext>
+  explicit basic_stream_handle(ExecutionContext& context,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value,
+        basic_stream_handle
+      >::type* = 0)
+    : basic_overlapped_handle<Executor>(context)
+  {
+  }
+
+  /// Construct a stream handle on an existing native handle.
+  /**
+   * This constructor creates a stream handle object to hold an existing native
+   * handle.
+   *
+   * @param ex The I/O executor that the stream handle will use, by default, to
+   * dispatch handlers for any asynchronous operations performed on the stream
+   * handle.
+   *
+   * @param handle The new underlying handle implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  basic_stream_handle(const executor_type& ex, const native_handle_type& handle)
+    : basic_overlapped_handle<Executor>(ex, handle)
+  {
+  }
+
+  /// Construct a stream handle on an existing native handle.
+  /**
+   * This constructor creates a stream handle object to hold an existing native
+   * handle.
+   *
+   * @param context An execution context which provides the I/O executor that
+   * the stream handle will use, by default, to dispatch handlers for any
+   * asynchronous operations performed on the stream handle.
+   *
+   * @param handle The new underlying handle implementation.
+   *
+   * @throws asio::system_error Thrown on failure.
+   */
+  template <typename ExecutionContext>
+  basic_stream_handle(ExecutionContext& context,
+      const native_handle_type& handle,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : basic_overlapped_handle<Executor>(context, handle)
+  {
+  }
+
+#if defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+  /// Move-construct a stream handle from another.
+  /**
+   * This constructor moves a stream handle from one object to another.
+   *
+   * @param other The other stream handle object from which the move
+   * will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_stream_handle(const executor_type&)
+   * constructor.
+   */
+  basic_stream_handle(basic_stream_handle&& other)
+    : basic_overlapped_handle<Executor>(std::move(other))
+  {
+  }
+
+  /// Move-assign a stream handle from another.
+  /**
+   * This assignment operator moves a stream handle from one object to
+   * another.
+   *
+   * @param other The other stream handle object from which the move will occur.
+   *
+   * @note Following the move, the moved-from object is in the same state as if
+   * constructed using the @c basic_stream_handle(const executor_type&)
+   * constructor.
+   */
+  basic_stream_handle& operator=(basic_stream_handle&& other)
+  {
+    basic_overlapped_handle<Executor>::operator=(std::move(other));
+    return *this;
+  }
+#endif // defined(ASIO_HAS_MOVE) || defined(GENERATING_DOCUMENTATION)
+
+  /// Write some data to the handle.
+  /**
+   * This function is used to write data to the stream handle. The function call
+   * will block until one or more bytes of the data has been written
+   * successfully, or until an error occurs.
+   *
+   * @param buffers One or more data buffers to be written to the handle.
+   *
+   * @returns The number of bytes written.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The write_some operation may not transmit all of the data to the
+   * peer. Consider using the @ref write function if you need to ensure that
+   * all data is written before the blocking operation completes.
+   *
+   * @par Example
+   * To write a single data buffer use the @ref buffer function as follows:
+   * @code
+   * handle.write_some(asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on writing multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().write_some(
+        this->impl_.get_implementation(), buffers, ec);
+    asio::detail::throw_error(ec, "write_some");
+    return s;
+  }
+
+  /// Write some data to the handle.
+  /**
+   * This function is used to write data to the stream handle. The function call
+   * will block until one or more bytes of the data has been written
+   * successfully, or until an error occurs.
+   *
+   * @param buffers One or more data buffers to be written to the handle.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes written. Returns 0 if an error occurred.
+   *
+   * @note The write_some operation may not transmit all of the data to the
+   * peer. Consider using the @ref write function if you need to ensure that
+   * all data is written before the blocking operation completes.
+   */
+  template <typename ConstBufferSequence>
+  std::size_t write_some(const ConstBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return this->impl_.get_service().write_some(
+        this->impl_.get_implementation(), buffers, ec);
+  }
+
+  /// Start an asynchronous write.
+  /**
+   * This function is used to asynchronously write data to the stream handle.
+   * The function call always returns immediately.
+   *
+   * @param buffers One or more data buffers to be written to the handle.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the write operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes written.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The write operation may not transmit all of the data to the peer.
+   * Consider using the @ref async_write function if you need to ensure that all
+   * data is written before the asynchronous operation completes.
+   *
+   * @par Example
+   * To write a single data buffer use the @ref buffer function as follows:
+   * @code
+   * handle.async_write_some(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on writing multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename ConstBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) WriteHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+      void (asio::error_code, std::size_t))
+  async_write_some(const ConstBufferSequence& buffers,
+      ASIO_MOVE_ARG(WriteHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<WriteHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_write_some(this), handler, buffers);
+  }
+
+  /// Read some data from the handle.
+  /**
+   * This function is used to read data from the stream handle. The function
+   * call will block until one or more bytes of data has been read successfully,
+   * or until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   *
+   * @returns The number of bytes read.
+   *
+   * @throws asio::system_error Thrown on failure. An error code of
+   * asio::error::eof indicates that the connection was closed by the
+   * peer.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that
+   * the requested amount of data is read before the blocking operation
+   * completes.
+   *
+   * @par Example
+   * To read into a single data buffer use the @ref buffer function as follows:
+   * @code
+   * handle.read_some(asio::buffer(data, size));
+   * @endcode
+   * See the @ref buffer documentation for information on reading into multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers)
+  {
+    asio::error_code ec;
+    std::size_t s = this->impl_.get_service().read_some(
+        this->impl_.get_implementation(), buffers, ec);
+    asio::detail::throw_error(ec, "read_some");
+    return s;
+  }
+
+  /// Read some data from the handle.
+  /**
+   * This function is used to read data from the stream handle. The function
+   * call will block until one or more bytes of data has been read successfully,
+   * or until an error occurs.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   *
+   * @param ec Set to indicate what error occurred, if any.
+   *
+   * @returns The number of bytes read. Returns 0 if an error occurred.
+   *
+   * @note The read_some operation may not read all of the requested number of
+   * bytes. Consider using the @ref read function if you need to ensure that
+   * the requested amount of data is read before the blocking operation
+   * completes.
+   */
+  template <typename MutableBufferSequence>
+  std::size_t read_some(const MutableBufferSequence& buffers,
+      asio::error_code& ec)
+  {
+    return this->impl_.get_service().read_some(
+        this->impl_.get_implementation(), buffers, ec);
+  }
+
+  /// Start an asynchronous read.
+  /**
+   * This function is used to asynchronously read data from the stream handle.
+   * The function call always returns immediately.
+   *
+   * @param buffers One or more buffers into which the data will be read.
+   * Although the buffers object may be copied as necessary, ownership of the
+   * underlying memory blocks is retained by the caller, which must guarantee
+   * that they remain valid until the handler is called.
+   *
+   * @param handler The handler to be called when the read operation completes.
+   * Copies will be made of the handler as required. The function signature of
+   * the handler must be:
+   * @code void handler(
+   *   const asio::error_code& error, // Result of operation.
+   *   std::size_t bytes_transferred           // Number of bytes read.
+   * ); @endcode
+   * Regardless of whether the asynchronous operation completes immediately or
+   * not, the handler will not be invoked from within this function. On
+   * immediate completion, invocation of the handler will be performed in a
+   * manner equivalent to using asio::post().
+   *
+   * @note The read operation may not read all of the requested number of bytes.
+   * Consider using the @ref async_read function if you need to ensure that the
+   * requested amount of data is read before the asynchronous operation
+   * completes.
+   *
+   * @par Example
+   * To read into a single data buffer use the @ref buffer function as follows:
+   * @code
+   * handle.async_read_some(asio::buffer(data, size), handler);
+   * @endcode
+   * See the @ref buffer documentation for information on reading into multiple
+   * buffers in one go, and how to use it with arrays, boost::array or
+   * std::vector.
+   */
+  template <typename MutableBufferSequence,
+      ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+        std::size_t)) ReadHandler
+          ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(executor_type)>
+  ASIO_INITFN_AUTO_RESULT_TYPE(ReadHandler,
+      void (asio::error_code, std::size_t))
+  async_read_some(const MutableBufferSequence& buffers,
+      ASIO_MOVE_ARG(ReadHandler) handler
+        ASIO_DEFAULT_COMPLETION_TOKEN(executor_type))
+  {
+    return async_initiate<ReadHandler,
+      void (asio::error_code, std::size_t)>(
+        initiate_async_read_some(this), handler, buffers);
+  }
+
+private:
+  class initiate_async_write_some
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_write_some(basic_stream_handle* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename WriteHandler, typename ConstBufferSequence>
+    void operator()(ASIO_MOVE_ARG(WriteHandler) handler,
+        const ConstBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a WriteHandler.
+      ASIO_WRITE_HANDLER_CHECK(WriteHandler, handler) type_check;
+
+      detail::non_const_lvalue<WriteHandler> handler2(handler);
+      self_->impl_.get_service().async_write_some(
+          self_->impl_.get_implementation(), buffers, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_stream_handle* self_;
+  };
+
+  class initiate_async_read_some
+  {
+  public:
+    typedef Executor executor_type;
+
+    explicit initiate_async_read_some(basic_stream_handle* self)
+      : self_(self)
+    {
+    }
+
+    executor_type get_executor() const ASIO_NOEXCEPT
+    {
+      return self_->get_executor();
+    }
+
+    template <typename ReadHandler, typename MutableBufferSequence>
+    void operator()(ASIO_MOVE_ARG(ReadHandler) handler,
+        const MutableBufferSequence& buffers) const
+    {
+      // If you get an error on the following line it means that your handler
+      // does not meet the documented type requirements for a ReadHandler.
+      ASIO_READ_HANDLER_CHECK(ReadHandler, handler) type_check;
+
+      detail::non_const_lvalue<ReadHandler> handler2(handler);
+      self_->impl_.get_service().async_read_some(
+          self_->impl_.get_implementation(), buffers, handler2.value,
+          self_->impl_.get_implementation_executor());
+    }
+
+  private:
+    basic_stream_handle* self_;
+  };
+};
+
+} // namespace windows
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_WINDOWS_STREAM_HANDLE)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_WINDOWS_BASIC_STREAM_HANDLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/object_handle.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/object_handle.hpp
new file mode 100644
index 00000000000..9403ed66d89
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/object_handle.hpp
@@ -0,0 +1,38 @@
+//
+// windows/object_handle.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+// Copyright (c) 2011 Boris Schaeling (boris@highscore.de)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WINDOWS_OBJECT_HANDLE_HPP
+#define ASIO_WINDOWS_OBJECT_HANDLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_WINDOWS_OBJECT_HANDLE) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/windows/basic_object_handle.hpp"
+
+namespace asio {
+namespace windows {
+
+/// Typedef for the typical usage of an object handle.
+typedef basic_object_handle<> object_handle;
+
+} // namespace windows
+} // namespace asio
+
+#endif // defined(ASIO_HAS_WINDOWS_OBJECT_HANDLE)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_WINDOWS_OBJECT_HANDLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/overlapped_handle.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/overlapped_handle.hpp
new file mode 100644
index 00000000000..4819fa2f484
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/overlapped_handle.hpp
@@ -0,0 +1,39 @@
+//
+// windows/overlapped_handle.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WINDOWS_OVERLAPPED_HANDLE_HPP
+#define ASIO_WINDOWS_OVERLAPPED_HANDLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_WINDOWS_RANDOM_ACCESS_HANDLE) \
+  || defined(ASIO_HAS_WINDOWS_STREAM_HANDLE) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/windows/basic_overlapped_handle.hpp"
+
+namespace asio {
+namespace windows {
+
+/// Typedef for the typical usage of an overlapped handle.
+typedef basic_overlapped_handle<> overlapped_handle;
+
+} // namespace windows
+} // namespace asio
+
+#endif // defined(ASIO_HAS_WINDOWS_RANDOM_ACCESS_HANDLE)
+       //   || defined(ASIO_HAS_WINDOWS_STREAM_HANDLE)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_WINDOWS_OVERLAPPED_HANDLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/overlapped_ptr.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/overlapped_ptr.hpp
new file mode 100644
index 00000000000..5dd6f14ee7e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/overlapped_ptr.hpp
@@ -0,0 +1,143 @@
+//
+// windows/overlapped_ptr.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WINDOWS_OVERLAPPED_PTR_HPP
+#define ASIO_WINDOWS_OVERLAPPED_PTR_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_WINDOWS_OVERLAPPED_PTR) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/detail/noncopyable.hpp"
+#include "asio/detail/win_iocp_overlapped_ptr.hpp"
+#include "asio/io_context.hpp"
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+namespace windows {
+
+/// Wraps a handler to create an OVERLAPPED object for use with overlapped I/O.
+/**
+ * A special-purpose smart pointer used to wrap an application handler so that
+ * it can be passed as the LPOVERLAPPED argument to overlapped I/O functions.
+ *
+ * @par Thread Safety
+ * @e Distinct @e objects: Safe.@n
+ * @e Shared @e objects: Unsafe.
+ */
+class overlapped_ptr
+  : private noncopyable
+{
+public:
+  /// Construct an empty overlapped_ptr.
+  overlapped_ptr()
+    : impl_()
+  {
+  }
+
+  /// Construct an overlapped_ptr to contain the specified handler.
+  template <typename ExecutionContext, typename Handler>
+  explicit overlapped_ptr(ExecutionContext& context,
+      ASIO_MOVE_ARG(Handler) handler,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+    : impl_(context.get_executor(), ASIO_MOVE_CAST(Handler)(handler))
+  {
+  }
+
+  /// Construct an overlapped_ptr to contain the specified handler.
+  template <typename Executor, typename Handler>
+  explicit overlapped_ptr(const Executor& ex,
+      ASIO_MOVE_ARG(Handler) handler,
+      typename enable_if<
+        is_executor<Executor>::value
+      >::type* = 0)
+    : impl_(ex, ASIO_MOVE_CAST(Handler)(handler))
+  {
+  }
+
+  /// Destructor automatically frees the OVERLAPPED object unless released.
+  ~overlapped_ptr()
+  {
+  }
+
+  /// Reset to empty.
+  void reset()
+  {
+    impl_.reset();
+  }
+
+  /// Reset to contain the specified handler, freeing any current OVERLAPPED
+  /// object.
+  template <typename ExecutionContext, typename Handler>
+  void reset(ExecutionContext& context, ASIO_MOVE_ARG(Handler) handler,
+      typename enable_if<
+        is_convertible<ExecutionContext&, execution_context&>::value
+      >::type* = 0)
+  {
+    impl_.reset(context.get_executor(), ASIO_MOVE_CAST(Handler)(handler));
+  }
+
+  /// Reset to contain the specified handler, freeing any current OVERLAPPED
+  /// object.
+  template <typename Executor, typename Handler>
+  void reset(const Executor& ex, ASIO_MOVE_ARG(Handler) handler,
+      typename enable_if<
+        is_executor<Executor>::value
+      >::type* = 0)
+  {
+    impl_.reset(ex, ASIO_MOVE_CAST(Handler)(handler));
+  }
+
+  /// Get the contained OVERLAPPED object.
+  OVERLAPPED* get()
+  {
+    return impl_.get();
+  }
+
+  /// Get the contained OVERLAPPED object.
+  const OVERLAPPED* get() const
+  {
+    return impl_.get();
+  }
+
+  /// Release ownership of the OVERLAPPED object.
+  OVERLAPPED* release()
+  {
+    return impl_.release();
+  }
+
+  /// Post completion notification for overlapped operation. Releases ownership.
+  void complete(const asio::error_code& ec,
+      std::size_t bytes_transferred)
+  {
+    impl_.complete(ec, bytes_transferred);
+  }
+
+private:
+  detail::win_iocp_overlapped_ptr impl_;
+};
+
+} // namespace windows
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#endif // defined(ASIO_HAS_WINDOWS_OVERLAPPED_PTR)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_WINDOWS_OVERLAPPED_PTR_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/random_access_handle.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/random_access_handle.hpp
new file mode 100644
index 00000000000..dbfa91fe1ea
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/random_access_handle.hpp
@@ -0,0 +1,37 @@
+//
+// windows/random_access_handle.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WINDOWS_RANDOM_ACCESS_HANDLE_HPP
+#define ASIO_WINDOWS_RANDOM_ACCESS_HANDLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_WINDOWS_RANDOM_ACCESS_HANDLE) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/windows/basic_random_access_handle.hpp"
+
+namespace asio {
+namespace windows {
+
+/// Typedef for the typical usage of a random-access handle.
+typedef basic_random_access_handle<> random_access_handle;
+
+} // namespace windows
+} // namespace asio
+
+#endif // defined(ASIO_HAS_WINDOWS_RANDOM_ACCESS_HANDLE)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_WINDOWS_RANDOM_ACCESS_HANDLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/stream_handle.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/stream_handle.hpp
new file mode 100644
index 00000000000..c597aadd53a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/windows/stream_handle.hpp
@@ -0,0 +1,37 @@
+//
+// windows/stream_handle.hpp
+// ~~~~~~~~~~~~~~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WINDOWS_STREAM_HANDLE_HPP
+#define ASIO_WINDOWS_STREAM_HANDLE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+
+#if defined(ASIO_HAS_WINDOWS_STREAM_HANDLE) \
+  || defined(GENERATING_DOCUMENTATION)
+
+#include "asio/windows/basic_stream_handle.hpp"
+
+namespace asio {
+namespace windows {
+
+/// Typedef for the typical usage of a stream-oriented handle.
+typedef basic_stream_handle<> stream_handle;
+
+} // namespace windows
+} // namespace asio
+
+#endif // defined(ASIO_HAS_WINDOWS_STREAM_HANDLE)
+       //   || defined(GENERATING_DOCUMENTATION)
+
+#endif // ASIO_WINDOWS_STREAM_HANDLE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/write.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/write.hpp
new file mode 100644
index 00000000000..86cf2a2ab2d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/write.hpp
@@ -0,0 +1,1262 @@
+//
+// write.hpp
+// ~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WRITE_HPP
+#define ASIO_WRITE_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/async_result.hpp"
+#include "asio/buffer.hpp"
+#include "asio/error.hpp"
+
+#if !defined(ASIO_NO_EXTENSIONS)
+# include "asio/basic_streambuf_fwd.hpp"
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/**
+ * @defgroup write asio::write
+ *
+ * @brief The @c write function is a composed operation that writes a certain
+ * amount of data to a stream before returning.
+ */
+/*@{*/
+
+/// Write all of the supplied data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers One or more buffers containing the data to be written. The sum
+ * of the buffer sizes indicates the maximum number of bytes to write to the
+ * stream.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @par Example
+ * To write a single data buffer use the @ref buffer function as follows:
+ * @code asio::write(s, asio::buffer(data, size)); @endcode
+ * See the @ref buffer documentation for information on writing multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write(
+ *     s, buffers,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncWriteStream, typename ConstBufferSequence>
+std::size_t write(SyncWriteStream& s, const ConstBufferSequence& buffers,
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type* = 0);
+
+/// Write all of the supplied data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers One or more buffers containing the data to be written. The sum
+ * of the buffer sizes indicates the maximum number of bytes to write to the
+ * stream.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @par Example
+ * To write a single data buffer use the @ref buffer function as follows:
+ * @code asio::write(s, asio::buffer(data, size), ec); @endcode
+ * See the @ref buffer documentation for information on writing multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write(
+ *     s, buffers,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncWriteStream, typename ConstBufferSequence>
+std::size_t write(SyncWriteStream& s, const ConstBufferSequence& buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type* = 0);
+
+/// Write a certain amount of data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers One or more buffers containing the data to be written. The sum
+ * of the buffer sizes indicates the maximum number of bytes to write to the
+ * stream.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's write_some function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @par Example
+ * To write a single data buffer use the @ref buffer function as follows:
+ * @code asio::write(s, asio::buffer(data, size),
+ *     asio::transfer_at_least(32)); @endcode
+ * See the @ref buffer documentation for information on writing multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ */
+template <typename SyncWriteStream, typename ConstBufferSequence,
+    typename CompletionCondition>
+std::size_t write(SyncWriteStream& s, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type* = 0);
+
+/// Write a certain amount of data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers One or more buffers containing the data to be written. The sum
+ * of the buffer sizes indicates the maximum number of bytes to write to the
+ * stream.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's write_some function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes written. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncWriteStream, typename ConstBufferSequence,
+    typename CompletionCondition>
+std::size_t write(SyncWriteStream& s, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Write all of the supplied data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Successfully written data is automatically consumed from the buffers.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write(
+ *     s, buffers,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncWriteStream, typename DynamicBuffer_v1>
+std::size_t write(SyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Write all of the supplied data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Successfully written data is automatically consumed from the buffers.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write(
+ *     s, buffers,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncWriteStream, typename DynamicBuffer_v1>
+std::size_t write(SyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Write a certain amount of data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Successfully written data is automatically consumed from the buffers.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's write_some function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ */
+template <typename SyncWriteStream, typename DynamicBuffer_v1,
+    typename CompletionCondition>
+std::size_t write(SyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Write a certain amount of data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Successfully written data is automatically consumed from the buffers.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's write_some function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes written. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncWriteStream, typename DynamicBuffer_v1,
+    typename CompletionCondition>
+std::size_t write(SyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Write all of the supplied data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param b The basic_streambuf object from which data will be written.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write(
+ *     s, b,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncWriteStream, typename Allocator>
+std::size_t write(SyncWriteStream& s, basic_streambuf<Allocator>& b);
+
+/// Write all of the supplied data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param b The basic_streambuf object from which data will be written.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write(
+ *     s, b,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncWriteStream, typename Allocator>
+std::size_t write(SyncWriteStream& s, basic_streambuf<Allocator>& b,
+    asio::error_code& ec);
+
+/// Write a certain amount of data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param b The basic_streambuf object from which data will be written.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's write_some function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ */
+template <typename SyncWriteStream, typename Allocator,
+    typename CompletionCondition>
+std::size_t write(SyncWriteStream& s, basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition);
+
+/// Write a certain amount of data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param b The basic_streambuf object from which data will be written.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's write_some function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes written. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncWriteStream, typename Allocator,
+    typename CompletionCondition>
+std::size_t write(SyncWriteStream& s, basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition, asio::error_code& ec);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Write all of the supplied data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Successfully written data is automatically consumed from the buffers.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write(
+ *     s, buffers,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncWriteStream, typename DynamicBuffer_v2>
+std::size_t write(SyncWriteStream& s, DynamicBuffer_v2 buffers,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Write all of the supplied data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Successfully written data is automatically consumed from the buffers.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write(
+ *     s, buffers,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncWriteStream, typename DynamicBuffer_v2>
+std::size_t write(SyncWriteStream& s, DynamicBuffer_v2 buffers,
+    asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Write a certain amount of data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Successfully written data is automatically consumed from the buffers.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's write_some function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ */
+template <typename SyncWriteStream, typename DynamicBuffer_v2,
+    typename CompletionCondition>
+std::size_t write(SyncWriteStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Write a certain amount of data to a stream before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a stream.
+ * The call will block until one of the following conditions is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * write_some function.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the SyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Successfully written data is automatically consumed from the buffers.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's write_some function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes written. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncWriteStream, typename DynamicBuffer_v2,
+    typename CompletionCondition>
+std::size_t write(SyncWriteStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition, asio::error_code& ec,
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/*@}*/
+/**
+ * @defgroup async_write asio::async_write
+ *
+ * @brief The @c async_write function is a composed asynchronous operation that
+ * writes a certain amount of data to a stream before completion.
+ */
+/*@{*/
+
+/// Start an asynchronous operation to write all of the supplied data to a
+/// stream.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_write_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other write operations (such
+ * as async_write, the stream's async_write_some function, or any other composed
+ * operations that perform writes) until this operation completes.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the AsyncWriteStream concept.
+ *
+ * @param buffers One or more buffers containing the data to be written.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of
+ * the handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes written from the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be less than the sum
+ *                                           // of the buffer sizes.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * To write a single data buffer use the @ref buffer function as follows:
+ * @code
+ * asio::async_write(s, asio::buffer(data, size), handler);
+ * @endcode
+ * See the @ref buffer documentation for information on writing multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ */
+template <typename AsyncWriteStream, typename ConstBufferSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncWriteStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s, const ConstBufferSequence& buffers,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncWriteStream::executor_type),
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type* = 0);
+
+/// Start an asynchronous operation to write a certain amount of data to a
+/// stream.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_write_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other write operations (such
+ * as async_write, the stream's async_write_some function, or any other composed
+ * operations that perform writes) until this operation completes.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the AsyncWriteStream concept.
+ *
+ * @param buffers One or more buffers containing the data to be written.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's async_write_some function.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes written from the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be less than the sum
+ *                                           // of the buffer sizes.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * To write a single data buffer use the @ref buffer function as follows:
+ * @code asio::async_write(s,
+ *     asio::buffer(data, size),
+ *     asio::transfer_at_least(32),
+ *     handler); @endcode
+ * See the @ref buffer documentation for information on writing multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ */
+template <typename AsyncWriteStream,
+    typename ConstBufferSequence, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncWriteStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncWriteStream::executor_type),
+    typename enable_if<
+      is_const_buffer_sequence<ConstBufferSequence>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Start an asynchronous operation to write all of the supplied data to a
+/// stream.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_write_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other write operations (such
+ * as async_write, the stream's async_write_some function, or any other composed
+ * operations that perform writes) until this operation completes.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the AsyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called. Successfully written
+ * data is automatically consumed from the buffers.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes written from the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be less than the sum
+ *                                           // of the buffer sizes.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncWriteStream, typename DynamicBuffer_v1,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncWriteStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncWriteStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+/// Start an asynchronous operation to write a certain amount of data to a
+/// stream.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_write_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other write operations (such
+ * as async_write, the stream's async_write_some function, or any other composed
+ * operations that perform writes) until this operation completes.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the AsyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called. Successfully written
+ * data is automatically consumed from the buffers.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's async_write_some function.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes written from the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be less than the sum
+ *                                           // of the buffer sizes.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncWriteStream,
+    typename DynamicBuffer_v1, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncWriteStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s,
+    ASIO_MOVE_ARG(DynamicBuffer_v1) buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncWriteStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v1<typename decay<DynamicBuffer_v1>::type>::value
+        && !is_dynamic_buffer_v2<typename decay<DynamicBuffer_v1>::type>::value
+    >::type* = 0);
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Start an asynchronous operation to write all of the supplied data to a
+/// stream.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_write_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other write operations (such
+ * as async_write, the stream's async_write_some function, or any other composed
+ * operations that perform writes) until this operation completes.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the AsyncWriteStream concept.
+ *
+ * @param b A basic_streambuf object from which data will be written. Ownership
+ * of the streambuf is retained by the caller, which must guarantee that it
+ * remains valid until the handler is called.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes written from the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be less than the sum
+ *                                           // of the buffer sizes.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncWriteStream, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncWriteStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s, basic_streambuf<Allocator>& b,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncWriteStream::executor_type));
+
+/// Start an asynchronous operation to write a certain amount of data to a
+/// stream.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_write_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other write operations (such
+ * as async_write, the stream's async_write_some function, or any other composed
+ * operations that perform writes) until this operation completes.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the AsyncWriteStream concept.
+ *
+ * @param b A basic_streambuf object from which data will be written. Ownership
+ * of the streambuf is retained by the caller, which must guarantee that it
+ * remains valid until the handler is called.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's async_write_some function.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes written from the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be less than the sum
+ *                                           // of the buffer sizes.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncWriteStream,
+    typename Allocator, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncWriteStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s, basic_streambuf<Allocator>& b,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncWriteStream::executor_type));
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+#endif // !defined(ASIO_NO_DYNAMIC_BUFFER_V1)
+
+/// Start an asynchronous operation to write all of the supplied data to a
+/// stream.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_write_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other write operations (such
+ * as async_write, the stream's async_write_some function, or any other composed
+ * operations that perform writes) until this operation completes.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the AsyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called. Successfully written
+ * data is automatically consumed from the buffers.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes written from the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be less than the sum
+ *                                           // of the buffer sizes.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncWriteStream, typename DynamicBuffer_v2,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncWriteStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s, DynamicBuffer_v2 buffers,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncWriteStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/// Start an asynchronous operation to write a certain amount of data to a
+/// stream.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a stream. The function call always returns immediately. The
+ * asynchronous operation will continue until one of the following conditions
+ * is true:
+ *
+ * @li All of the data in the supplied dynamic buffer sequence has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the stream's
+ * async_write_some function, and is known as a <em>composed operation</em>. The
+ * program must ensure that the stream performs no other write operations (such
+ * as async_write, the stream's async_write_some function, or any other composed
+ * operations that perform writes) until this operation completes.
+ *
+ * @param s The stream to which the data is to be written. The type must support
+ * the AsyncWriteStream concept.
+ *
+ * @param buffers The dynamic buffer sequence from which data will be written.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called. Successfully written
+ * data is automatically consumed from the buffers.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_write_some operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the stream's async_write_some function.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   const asio::error_code& error, // Result of operation.
+ *
+ *   std::size_t bytes_transferred           // Number of bytes written from the
+ *                                           // buffers. If an error occurred,
+ *                                           // this will be less than the sum
+ *                                           // of the buffer sizes.
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncWriteStream,
+    typename DynamicBuffer_v2, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncWriteStream::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write(AsyncWriteStream& s, DynamicBuffer_v2 buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncWriteStream::executor_type),
+    typename enable_if<
+      is_dynamic_buffer_v2<DynamicBuffer_v2>::value
+    >::type* = 0);
+
+/*@}*/
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/write.hpp"
+
+#endif // ASIO_WRITE_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/write_at.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/write_at.hpp
new file mode 100644
index 00000000000..d7b1858fc30
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/write_at.hpp
@@ -0,0 +1,702 @@
+//
+// write_at.hpp
+// ~~~~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef ASIO_WRITE_AT_HPP
+#define ASIO_WRITE_AT_HPP
+
+#if defined(_MSC_VER) && (_MSC_VER >= 1200)
+# pragma once
+#endif // defined(_MSC_VER) && (_MSC_VER >= 1200)
+
+#include "asio/detail/config.hpp"
+#include <cstddef>
+#include "asio/async_result.hpp"
+#include "asio/detail/cstdint.hpp"
+#include "asio/error.hpp"
+
+#if !defined(ASIO_NO_EXTENSIONS)
+# include "asio/basic_streambuf_fwd.hpp"
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+#include "asio/detail/push_options.hpp"
+
+namespace asio {
+
+/**
+ * @defgroup write_at asio::write_at
+ *
+ * @brief The @c write_at function is a composed operation that writes a
+ * certain amount of data at a specified offset before returning.
+ */
+/*@{*/
+
+/// Write all of the supplied data at the specified offset before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a random
+ * access device at a specified offset. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * write_some_at function.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the SyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param buffers One or more buffers containing the data to be written. The sum
+ * of the buffer sizes indicates the maximum number of bytes to write to the
+ * device.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @par Example
+ * To write a single data buffer use the @ref buffer function as follows:
+ * @code asio::write_at(d, 42, asio::buffer(data, size)); @endcode
+ * See the @ref buffer documentation for information on writing multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write_at(
+ *     d, offset, buffers,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncRandomAccessWriteDevice, typename ConstBufferSequence>
+std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, const ConstBufferSequence& buffers);
+
+/// Write all of the supplied data at the specified offset before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a random
+ * access device at a specified offset. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * write_some_at function.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the SyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param buffers One or more buffers containing the data to be written. The sum
+ * of the buffer sizes indicates the maximum number of bytes to write to the
+ * device.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @par Example
+ * To write a single data buffer use the @ref buffer function as follows:
+ * @code asio::write_at(d, 42,
+ *     asio::buffer(data, size), ec); @endcode
+ * See the @ref buffer documentation for information on writing multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write_at(
+ *     d, offset, buffers,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncRandomAccessWriteDevice, typename ConstBufferSequence>
+std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, const ConstBufferSequence& buffers,
+    asio::error_code& ec);
+
+/// Write a certain amount of data at a specified offset before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a random
+ * access device at a specified offset. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * write_some_at function.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the SyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param buffers One or more buffers containing the data to be written. The sum
+ * of the buffer sizes indicates the maximum number of bytes to write to the
+ * device.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the device's write_some_at function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @par Example
+ * To write a single data buffer use the @ref buffer function as follows:
+ * @code asio::write_at(d, 42, asio::buffer(data, size),
+ *     asio::transfer_at_least(32)); @endcode
+ * See the @ref buffer documentation for information on writing multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ */
+template <typename SyncRandomAccessWriteDevice, typename ConstBufferSequence,
+    typename CompletionCondition>
+std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition);
+
+/// Write a certain amount of data at a specified offset before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a random
+ * access device at a specified offset. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * write_some_at function.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the SyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param buffers One or more buffers containing the data to be written. The sum
+ * of the buffer sizes indicates the maximum number of bytes to write to the
+ * device.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the device's write_some_at function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes written. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncRandomAccessWriteDevice, typename ConstBufferSequence,
+    typename CompletionCondition>
+std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition, asio::error_code& ec);
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Write all of the supplied data at the specified offset before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a random
+ * access device at a specified offset. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * write_some_at function.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the SyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param b The basic_streambuf object from which data will be written.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write_at(
+ *     d, 42, b,
+ *     asio::transfer_all()); @endcode
+ */
+template <typename SyncRandomAccessWriteDevice, typename Allocator>
+std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, basic_streambuf<Allocator>& b);
+
+/// Write all of the supplied data at the specified offset before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a random
+ * access device at a specified offset. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * write_some_at function.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the SyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param b The basic_streambuf object from which data will be written.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @note This overload is equivalent to calling:
+ * @code asio::write_at(
+ *     d, 42, b,
+ *     asio::transfer_all(), ec); @endcode
+ */
+template <typename SyncRandomAccessWriteDevice, typename Allocator>
+std::size_t write_at(SyncRandomAccessWriteDevice& d,
+    uint64_t offset, basic_streambuf<Allocator>& b,
+    asio::error_code& ec);
+
+/// Write a certain amount of data at a specified offset before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a random
+ * access device at a specified offset. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * write_some_at function.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the SyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param b The basic_streambuf object from which data will be written.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the device's write_some_at function.
+ *
+ * @returns The number of bytes transferred.
+ *
+ * @throws asio::system_error Thrown on failure.
+ */
+template <typename SyncRandomAccessWriteDevice, typename Allocator,
+    typename CompletionCondition>
+std::size_t write_at(SyncRandomAccessWriteDevice& d, uint64_t offset,
+    basic_streambuf<Allocator>& b, CompletionCondition completion_condition);
+
+/// Write a certain amount of data at a specified offset before returning.
+/**
+ * This function is used to write a certain number of bytes of data to a random
+ * access device at a specified offset. The call will block until one of the
+ * following conditions is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * write_some_at function.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the SyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param b The basic_streambuf object from which data will be written.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest write_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the device's write_some_at function.
+ *
+ * @param ec Set to indicate what error occurred, if any.
+ *
+ * @returns The number of bytes written. If an error occurs, returns the total
+ * number of bytes successfully transferred prior to the error.
+ */
+template <typename SyncRandomAccessWriteDevice, typename Allocator,
+    typename CompletionCondition>
+std::size_t write_at(SyncRandomAccessWriteDevice& d, uint64_t offset,
+    basic_streambuf<Allocator>& b, CompletionCondition completion_condition,
+    asio::error_code& ec);
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+/*@}*/
+/**
+ * @defgroup async_write_at asio::async_write_at
+ *
+ * @brief The @c async_write_at function is a composed asynchronous operation
+ * that writes a certain amount of data at the specified offset before
+ * completion.
+ */
+/*@{*/
+
+/// Start an asynchronous operation to write all of the supplied data at the
+/// specified offset.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a random access device at a specified offset. The function call
+ * always returns immediately. The asynchronous operation will continue until
+ * one of the following conditions is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * async_write_some_at function, and is known as a <em>composed operation</em>.
+ * The program must ensure that the device performs no <em>overlapping</em>
+ * write operations (such as async_write_at, the device's async_write_some_at
+ * function, or any other composed operations that perform writes) until this
+ * operation completes. Operations are overlapping if the regions defined by
+ * their offsets, and the numbers of bytes to write, intersect.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the AsyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param buffers One or more buffers containing the data to be written.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of
+ * the handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes written from the buffers. If an error
+ *   // occurred, this will be less than the sum of the buffer sizes.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * To write a single data buffer use the @ref buffer function as follows:
+ * @code
+ * asio::async_write_at(d, 42, asio::buffer(data, size), handler);
+ * @endcode
+ * See the @ref buffer documentation for information on writing multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ */
+template <typename AsyncRandomAccessWriteDevice, typename ConstBufferSequence,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncRandomAccessWriteDevice::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write_at(AsyncRandomAccessWriteDevice& d, uint64_t offset,
+    const ConstBufferSequence& buffers,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncRandomAccessWriteDevice::executor_type));
+
+/// Start an asynchronous operation to write a certain amount of data at the
+/// specified offset.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a random access device at a specified offset. The function call
+ * always returns immediately. The asynchronous operation will continue until
+ * one of the following conditions is true:
+ *
+ * @li All of the data in the supplied buffers has been written. That is, the
+ * bytes transferred is equal to the sum of the buffer sizes.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * async_write_some_at function, and is known as a <em>composed operation</em>.
+ * The program must ensure that the device performs no <em>overlapping</em>
+ * write operations (such as async_write_at, the device's async_write_some_at
+ * function, or any other composed operations that perform writes) until this
+ * operation completes. Operations are overlapping if the regions defined by
+ * their offsets, and the numbers of bytes to write, intersect.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the AsyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param buffers One or more buffers containing the data to be written.
+ * Although the buffers object may be copied as necessary, ownership of the
+ * underlying memory blocks is retained by the caller, which must guarantee
+ * that they remain valid until the handler is called.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_write_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the device's async_write_some_at function.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes written from the buffers. If an error
+ *   // occurred, this will be less than the sum of the buffer sizes.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ *
+ * @par Example
+ * To write a single data buffer use the @ref buffer function as follows:
+ * @code asio::async_write_at(d, 42,
+ *     asio::buffer(data, size),
+ *     asio::transfer_at_least(32),
+ *     handler); @endcode
+ * See the @ref buffer documentation for information on writing multiple
+ * buffers in one go, and how to use it with arrays, boost::array or
+ * std::vector.
+ */
+template <typename AsyncRandomAccessWriteDevice,
+    typename ConstBufferSequence, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncRandomAccessWriteDevice::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write_at(AsyncRandomAccessWriteDevice& d,
+    uint64_t offset, const ConstBufferSequence& buffers,
+    CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncRandomAccessWriteDevice::executor_type));
+
+#if !defined(ASIO_NO_EXTENSIONS)
+#if !defined(ASIO_NO_IOSTREAM)
+
+/// Start an asynchronous operation to write all of the supplied data at the
+/// specified offset.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a random access device at a specified offset. The function call
+ * always returns immediately. The asynchronous operation will continue until
+ * one of the following conditions is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li An error occurred.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * async_write_some_at function, and is known as a <em>composed operation</em>.
+ * The program must ensure that the device performs no <em>overlapping</em>
+ * write operations (such as async_write_at, the device's async_write_some_at
+ * function, or any other composed operations that perform writes) until this
+ * operation completes. Operations are overlapping if the regions defined by
+ * their offsets, and the numbers of bytes to write, intersect.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the AsyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param b A basic_streambuf object from which data will be written. Ownership
+ * of the streambuf is retained by the caller, which must guarantee that it
+ * remains valid until the handler is called.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes written from the buffers. If an error
+ *   // occurred, this will be less than the sum of the buffer sizes.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncRandomAccessWriteDevice, typename Allocator,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncRandomAccessWriteDevice::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write_at(AsyncRandomAccessWriteDevice& d,
+    uint64_t offset, basic_streambuf<Allocator>& b,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncRandomAccessWriteDevice::executor_type));
+
+/// Start an asynchronous operation to write a certain amount of data at the
+/// specified offset.
+/**
+ * This function is used to asynchronously write a certain number of bytes of
+ * data to a random access device at a specified offset. The function call
+ * always returns immediately. The asynchronous operation will continue until
+ * one of the following conditions is true:
+ *
+ * @li All of the data in the supplied basic_streambuf has been written.
+ *
+ * @li The completion_condition function object returns 0.
+ *
+ * This operation is implemented in terms of zero or more calls to the device's
+ * async_write_some_at function, and is known as a <em>composed operation</em>.
+ * The program must ensure that the device performs no <em>overlapping</em>
+ * write operations (such as async_write_at, the device's async_write_some_at
+ * function, or any other composed operations that perform writes) until this
+ * operation completes. Operations are overlapping if the regions defined by
+ * their offsets, and the numbers of bytes to write, intersect.
+ *
+ * @param d The device to which the data is to be written. The type must support
+ * the AsyncRandomAccessWriteDevice concept.
+ *
+ * @param offset The offset at which the data will be written.
+ *
+ * @param b A basic_streambuf object from which data will be written. Ownership
+ * of the streambuf is retained by the caller, which must guarantee that it
+ * remains valid until the handler is called.
+ *
+ * @param completion_condition The function object to be called to determine
+ * whether the write operation is complete. The signature of the function object
+ * must be:
+ * @code std::size_t completion_condition(
+ *   // Result of latest async_write_some_at operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes transferred so far.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * A return value of 0 indicates that the write operation is complete. A
+ * non-zero return value indicates the maximum number of bytes to be written on
+ * the next call to the device's async_write_some_at function.
+ *
+ * @param handler The handler to be called when the write operation completes.
+ * Copies will be made of the handler as required. The function signature of the
+ * handler must be:
+ * @code void handler(
+ *   // Result of operation.
+ *   const asio::error_code& error,
+ *
+ *   // Number of bytes written from the buffers. If an error
+ *   // occurred, this will be less than the sum of the buffer sizes.
+ *   std::size_t bytes_transferred
+ * ); @endcode
+ * Regardless of whether the asynchronous operation completes immediately or
+ * not, the handler will not be invoked from within this function. On
+ * immediate completion, invocation of the handler will be performed in a
+ * manner equivalent to using asio::post().
+ */
+template <typename AsyncRandomAccessWriteDevice,
+    typename Allocator, typename CompletionCondition,
+    ASIO_COMPLETION_TOKEN_FOR(void (asio::error_code,
+      std::size_t)) WriteHandler
+        ASIO_DEFAULT_COMPLETION_TOKEN_TYPE(
+          typename AsyncRandomAccessWriteDevice::executor_type)>
+ASIO_INITFN_AUTO_RESULT_TYPE(WriteHandler,
+    void (asio::error_code, std::size_t))
+async_write_at(AsyncRandomAccessWriteDevice& d, uint64_t offset,
+    basic_streambuf<Allocator>& b, CompletionCondition completion_condition,
+    ASIO_MOVE_ARG(WriteHandler) handler
+      ASIO_DEFAULT_COMPLETION_TOKEN(
+        typename AsyncRandomAccessWriteDevice::executor_type));
+
+#endif // !defined(ASIO_NO_IOSTREAM)
+#endif // !defined(ASIO_NO_EXTENSIONS)
+
+/*@}*/
+
+} // namespace asio
+
+#include "asio/detail/pop_options.hpp"
+
+#include "asio/impl/write_at.hpp"
+
+#endif // ASIO_WRITE_AT_HPP
diff --git a/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/yield.hpp b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/yield.hpp
new file mode 100644
index 00000000000..d37d146e937
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/asio/asio/include/asio/yield.hpp
@@ -0,0 +1,23 @@
+//
+// yield.hpp
+// ~~~~~~~~~
+//
+// Copyright (c) 2003-2019 Christopher M. Kohlhoff (chris at kohlhoff dot com)
+//
+// Distributed under the Boost Software License, Version 1.0. (See accompanying
+// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#include "coroutine.hpp"
+
+#ifndef reenter
+# define reenter(c) ASIO_CORO_REENTER(c)
+#endif
+
+#ifndef yield
+# define yield ASIO_CORO_YIELD
+#endif
+
+#ifndef fork
+# define fork ASIO_CORO_FORK
+#endif
diff --git a/tools/sdk/esp32s3/include/asio/port/include/esp_asio_config.h b/tools/sdk/esp32s3/include/asio/port/include/esp_asio_config.h
new file mode 100644
index 00000000000..3f3a9b03ed4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/port/include/esp_asio_config.h
@@ -0,0 +1,47 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _ESP_ASIO_CONFIG_H_
+#define _ESP_ASIO_CONFIG_H_
+
+//
+// Enabling exceptions only when they are enabled in menuconfig
+//
+# include <sdkconfig.h>
+# ifndef CONFIG_COMPILER_CXX_EXCEPTIONS
+#  define ASIO_NO_EXCEPTIONS
+# endif   // CONFIG_COMPILER_CXX_EXCEPTIONS
+
+# ifndef CONFIG_COMPILER_RTTI
+#  define ASIO_NO_TYPEID
+# endif   // CONFIG_COMPILER_RTTI
+
+//
+// Supress OpenSSL deprecation warning, when building ASIO
+//
+#define ESP_OPENSSL_SUPPRESS_LEGACY_WARNING
+
+//
+// LWIP compatibility inet and address macros/functions
+//
+# define LWIP_COMPAT_SOCKET_INET 1
+# define LWIP_COMPAT_SOCKET_ADDR 1
+
+//
+// Specific ASIO feature flags
+//
+# define ASIO_DISABLE_SERIAL_PORT
+# define ASIO_SEPARATE_COMPILATION
+# define ASIO_STANDALONE
+# define ASIO_HAS_PTHREADS
+
+# ifdef CONFIG_ASIO_USE_ESP_OPENSSL
+#  define ASIO_USE_ESP_OPENSSL
+#  define OPENSSL_NO_ENGINE
+# elif CONFIG_ASIO_USE_ESP_WOLFSSL
+#  define ASIO_USE_WOLFSSL
+# endif   // CONFIG_ASIO_USE_ESP_OPENSSL
+
+#endif // _ESP_ASIO_CONFIG_H_
diff --git a/tools/sdk/esp32s3/include/asio/port/include/esp_exception.h b/tools/sdk/esp32s3/include/asio/port/include/esp_exception.h
new file mode 100644
index 00000000000..6f88866a4ea
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/port/include/esp_exception.h
@@ -0,0 +1,31 @@
+
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _ESP_EXCEPTION_H_
+#define _ESP_EXCEPTION_H_
+
+//
+// This exception stub is enabled only if exceptions are disabled in menuconfig
+//
+#if !defined(CONFIG_COMPILER_CXX_EXCEPTIONS) && defined (ASIO_NO_EXCEPTIONS)
+
+#include "esp_log.h"
+
+//
+// asio exception stub
+//
+namespace asio {
+namespace detail {
+template <typename Exception>
+void throw_exception(const Exception& e)
+{
+  ESP_LOGE("esp32_asio_exception", "Caught exception: %s!", e.what());
+  abort();
+}
+}}
+#endif // CONFIG_COMPILER_CXX_EXCEPTIONS==1 && defined (ASIO_NO_EXCEPTIONS)
+
+#endif // _ESP_EXCEPTION_H_
diff --git a/tools/sdk/esp32s3/include/asio/port/include/openssl/conf.h b/tools/sdk/esp32s3/include/asio/port/include/openssl/conf.h
new file mode 100644
index 00000000000..1ed025d93c1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/port/include/openssl/conf.h
@@ -0,0 +1,18 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_ASIO_OPENSSL_CONF_H
+#define _ESP_ASIO_OPENSSL_CONF_H
+#include "esp_asio_config.h"
+#include "openssl/esp_asio_openssl_stubs.h"
+
+#if defined(ASIO_USE_WOLFSSL)
+// SSLv3 Methods not present in current wolfSSL library
+#define OPENSSL_NO_SSL3
+#include_next "openssl/conf.h"
+#endif // ASIO_USE_WOLFSSL
+
+#endif // _ESP_ASIO_OPENSSL_CONF_H
diff --git a/tools/sdk/esp32s3/include/asio/port/include/openssl/dh.h b/tools/sdk/esp32s3/include/asio/port/include/openssl/dh.h
new file mode 100644
index 00000000000..af72e083aa7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/port/include/openssl/dh.h
@@ -0,0 +1,15 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_ASIO_OPENSSL_DH_STUB_H
+#define _ESP_ASIO_OPENSSL_DH_STUB_H
+// Dummy header needed for ASIO compilation with esp-openssl
+
+#if defined(ASIO_USE_WOLFSSL)
+#include_next "openssl/dh.h"
+#endif // ASIO_USE_WOLFSSL
+
+#endif // _ESP_ASIO_OPENSSL_DH_STUB_H
diff --git a/tools/sdk/esp32s3/include/asio/port/include/openssl/esp_asio_openssl_stubs.h b/tools/sdk/esp32s3/include/asio/port/include/openssl/esp_asio_openssl_stubs.h
new file mode 100644
index 00000000000..50627741079
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/port/include/openssl/esp_asio_openssl_stubs.h
@@ -0,0 +1,201 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_ASIO_OPENSSL_STUBS_H
+#define _ESP_ASIO_OPENSSL_STUBS_H
+
+/**
+ * @note This header contains openssl API which are NOT implemented, and are only provided
+ * as stubs or no-operations to get the ASIO library compiled and working with most
+ * practical use cases as an embedded application on ESP platform
+ */
+
+#if defined(ASIO_USE_WOLFSSL)
+
+#include "wolfssl/ssl.h"
+// esp-wolfssl disables filesystem by default, but the ssl filesystem functions are needed for the ASIO to compile
+//  - so we could either configure wolfSSL to use filesystem
+//  - or use the default wolfSSL and declare the filesystem functions -- preferred option, as whenever
+//    the filesystem functions are used from app code (potential security impact if private keys in a filesystem)
+//    compilation fails with linking errors.
+
+#if defined(NO_FILESYSTEM)
+// WolfSSL methods that are not included in standard esp-wolfssl config, must be defined here
+// as function stubs,  so ASIO compiles, but would get link errors, if these functions were used.
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct WOLFSSL_CTX      WOLFSSL_CTX;
+
+void wolfSSL_CTX_set_verify_depth(WOLFSSL_CTX *ctx,int depth);
+int SSL_CTX_load_verify_locations(WOLFSSL_CTX*, const char*, const char*);
+int SSL_CTX_use_certificate_file(WOLFSSL_CTX*, const char*, int);
+int SSL_CTX_use_certificate_chain_file(WOLFSSL_CTX*, const char*);
+int SSL_CTX_use_PrivateKey_file(WOLFSSL_CTX*, const char*, int);
+int SSL_CTX_use_RSAPrivateKey_file(WOLFSSL_CTX*, const char*, int);
+
+#if defined(__cplusplus)
+} /* extern C */
+#endif
+
+#endif // NO_FILESYSTEM
+
+#elif defined(ASIO_USE_ESP_OPENSSL)
+
+#include "internal/ssl_x509.h"
+#include "internal/ssl_pkey.h"
+#include "mbedtls/pem.h"
+#include <stdint.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+// The most applicable OpenSSL version wrtt ASIO usage
+#define OPENSSL_VERSION_NUMBER 0x10100001L
+// SSLv2 methods not supported
+// OpenSSL port supports: TLS_ANY, TLS_1, TLS_1_1, TLS_1_2, SSL_3
+#define OPENSSL_NO_SSL2
+#define SSL2_VERSION 0x0002
+
+#define SSL_R_SHORT_READ 219
+#define SSL_OP_ALL 0
+#define SSL_OP_SINGLE_DH_USE 0
+#define SSL_OP_NO_COMPRESSION 0
+// Translates mbedTLS PEM parse error, used by ASIO
+#define PEM_R_NO_START_LINE -MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT
+
+#define SSL_OP_NO_SSLv2					0x01000000L
+#define SSL_OP_NO_SSLv3					0x02000000L
+#define SSL_OP_NO_TLSv1					0x04000000L
+
+#define X509_FILETYPE_PEM	1
+#define X509_FILETYPE_ASN1	2
+#define SSL_FILETYPE_ASN1	X509_FILETYPE_ASN1
+#define SSL_FILETYPE_PEM	X509_FILETYPE_PEM
+
+#define NID_subject_alt_name 85
+
+
+#define GEN_DNS		2
+#define GEN_IPADD	7
+#define V_ASN1_OCTET_STRING		4
+#define V_ASN1_IA5STRING		22
+#define NID_commonName 13
+
+#define SSL_CTX_get_app_data(ctx) ((void*)SSL_CTX_get_ex_data(ctx, 0))
+
+/**
+* @brief Frees DH object -- not implemented
+*
+* Current implementation calls SSL_ASSERT
+*
+* @param r DH object
+*/
+void DH_free(DH *r);
+
+/**
+ * @brief Frees GENERAL_NAMES -- not implemented
+ *
+ * Current implementation calls SSL_ASSERT
+ *
+ * @param r GENERAL_NAMES object
+ */
+void GENERAL_NAMES_free(GENERAL_NAMES * gens);
+
+/**
+ * @brief Returns subject name from X509 -- not implemented
+ *
+ * Current implementation calls SSL_ASSERT
+ *
+ * @param r X509 object
+ */
+X509_NAME *X509_get_subject_name(X509 *a);
+
+/**
+ * @brief API provaded as declaration only
+ *
+ */
+int	X509_STORE_CTX_get_error_depth(X509_STORE_CTX *ctx);
+
+/**
+ * @brief API provaded as declaration only
+ *
+ */
+int X509_NAME_get_index_by_NID(X509_NAME *name, int nid, int lastpos);
+
+/**
+ * @brief API provaded as declaration only
+ *
+ */
+X509_NAME_ENTRY *X509_NAME_get_entry(X509_NAME *name, int loc);
+
+/**
+ * @brief API provaded as declaration only
+ *
+ */
+ASN1_STRING *X509_NAME_ENTRY_get_data(X509_NAME_ENTRY *ne);
+
+/**
+ * @brief API provaded as declaration only
+ *
+ */
+void *X509_get_ext_d2i(X509 *x, int nid, int *crit, int *idx);
+
+/**
+ * @brief API provaded as declaration only
+ *
+ */
+X509 *	X509_STORE_CTX_get_current_cert(X509_STORE_CTX *ctx);
+
+/**
+ * @brief Reads DH params from a bio object -- not implemented
+ *
+ * Current implementation calls SSL_ASSERT
+ */
+DH *PEM_read_bio_DHparams(BIO *bp, DH **x, pem_password_cb *cb, void *u);
+
+/**
+ * @brief API provaded as declaration only
+ *
+ */
+void *	X509_STORE_CTX_get_ex_data(X509_STORE_CTX *ctx,int idx);
+
+/**
+ * @brief Sets DH params to ssl ctx -- not implemented
+ *
+ * Current implementation calls SSL_ASSERT
+ */
+int SSL_CTX_set_tmp_dh(SSL_CTX *ctx, const DH *dh);
+
+/**
+ * @brief API provaded as declaration only
+ *
+ */
+void SSL_CTX_set_default_passwd_cb_userdata(SSL_CTX *ctx, void *data);
+
+/**
+ * @brief API provaded as declaration only
+ *
+ */
+void SSL_CTX_set_default_passwd_cb(SSL_CTX *ctx, pem_password_cb *cb);
+
+/**
+ * @brief Clears any existing chain associated with the current certificate of ctx.
+ *
+ */
+int SSL_CTX_clear_chain_certs(SSL_CTX *ctx);
+
+#if defined(__cplusplus)
+} /* extern C */
+#endif
+
+#endif /* ASIO_USE_ESP_OPENSSL, ASIO_USE_WOLFSSL */
+#endif /* _ESP_ASIO_OPENSSL_STUBS_H */
diff --git a/tools/sdk/esp32s3/include/asio/port/include/openssl/rsa.h b/tools/sdk/esp32s3/include/asio/port/include/openssl/rsa.h
new file mode 100644
index 00000000000..53018a33a8f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/port/include/openssl/rsa.h
@@ -0,0 +1,15 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_ASIO_OPENSSL_RSA_STUB_H
+#define _ESP_ASIO_OPENSSL_RSA_STUB_H
+// Dummy header needed for ASIO compilation with esp-openssl
+
+#if defined(ASIO_USE_WOLFSSL)
+#include_next "openssl/rsa.h"
+#endif // ASIO_USE_WOLFSSL
+
+#endif // _ESP_ASIO_OPENSSL_RSA_STUB_H
diff --git a/tools/sdk/esp32s3/include/asio/port/include/openssl/x509v3.h b/tools/sdk/esp32s3/include/asio/port/include/openssl/x509v3.h
new file mode 100644
index 00000000000..dad7475424a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/asio/port/include/openssl/x509v3.h
@@ -0,0 +1,15 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_ASIO_OPENSSL_X509V3_STUB_H
+#define _ESP_ASIO_OPENSSL_X509V3_STUB_H
+// Dummy header needed for ASIO compilation with esp-openssl
+
+#if defined(ASIO_USE_WOLFSSL)
+#include_next "openssl/x509v3.h"
+#endif // ASIO_USE_WOLFSSL
+
+#endif // _ESP_ASIO_OPENSSL_X509V3_STUB_H
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_clock.h b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_clock.h
new file mode 100644
index 00000000000..6b71f68f380
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_clock.h
@@ -0,0 +1,25 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @brief Configure clocks for early boot
+ *
+ * Called by bootloader, or by the app if the bootloader version is old (pre v2.1).
+ */
+void bootloader_clock_configure(void);
+
+/** @brief Return the rated maximum frequency of this chip
+ */
+int bootloader_clock_get_rated_freq_mhz(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_common.h b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_common.h
new file mode 100644
index 00000000000..2f4e9062200
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_common.h
@@ -0,0 +1,292 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_flash_partitions.h"
+#include "esp_image_format.h"
+#include "esp_app_format.h"
+// [refactor-todo]: we shouldn't expose ROM header files in a public API header, remove them in v5.0
+// Tracked in IDF-1968
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/rtc.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/rtc.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/rtc.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/rtc.h"
+#elif CONFIG_IDF_TARGET_ESP32H2
+#include "esp32h2/rom/rtc.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Type of hold a GPIO in low state
+typedef enum {
+    GPIO_LONG_HOLD  = 1,    /*!< The long hold GPIO */
+    GPIO_SHORT_HOLD = -1,   /*!< The short hold GPIO */
+    GPIO_NOT_HOLD   = 0     /*!< If the GPIO input is not low */
+} esp_comm_gpio_hold_t;
+
+typedef enum {
+    ESP_IMAGE_BOOTLOADER,
+    ESP_IMAGE_APPLICATION
+} esp_image_type;
+
+/**
+ * @brief Calculate crc for the OTA data select.
+ *
+ * @param[in] s The OTA data select.
+ * @return    Returns crc value.
+ */
+uint32_t bootloader_common_ota_select_crc(const esp_ota_select_entry_t *s);
+
+/**
+ * @brief Verifies the validity of the OTA data select
+ *
+ * @param[in] s The OTA data select.
+ * @return    Returns true on valid, false otherwise.
+ */
+bool bootloader_common_ota_select_valid(const esp_ota_select_entry_t *s);
+
+/**
+ * @brief Returns true if OTADATA is not marked as bootable partition.
+ *
+ * @param[in] s The OTA data select.
+ * @return    Returns true if OTADATA invalid, false otherwise.
+ */
+bool bootloader_common_ota_select_invalid(const esp_ota_select_entry_t *s);
+
+/**
+ * @brief Check if a GPIO input is held low for a long period, short period, or not
+ * at all.
+ *
+ * This function will configure the specified GPIO as an input with internal pull-up enabled.
+ *
+ * If the GPIO input is held low continuously for delay_sec period then it is a long hold.
+ * If the GPIO input is held low for less period then it is a short hold.
+ *
+ * @param[in] num_pin Number of the GPIO input.
+ * @param[in] delay_sec Input must be driven low for at least this long, continuously.
+ * @return esp_comm_gpio_hold_t Type of low level hold detected, if any.
+ */
+esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio(uint32_t num_pin, uint32_t delay_sec);
+
+/**
+ * @brief Check if a GPIO input is held low or high for a long period, short period, or not
+ * at all.
+ *
+ * This function will configure the specified GPIO as an input with internal pull-up enabled.
+ *
+ * If the GPIO input is held at 'level' continuously for delay_sec period then it is a long hold.
+ * If the GPIO input is held at 'level' for less period then it is a short hold.
+ *
+ * @param[in] num_pin Number of the GPIO input.
+ * @param[in] delay_sec Input must be driven to 'level' for at least this long, continuously.
+ * @param[in] level Input pin level to trigger on hold
+ * @return esp_comm_gpio_hold_t Type of hold detected, if any.
+ */
+esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio_level(uint32_t num_pin, uint32_t delay_sec, bool level);
+
+
+/**
+ * @brief Erase the partition data that is specified in the transferred list.
+ *
+ * @param[in] list_erase String containing a list of cleared partitions. Like this "nvs, phy". The string must be null-terminal.
+ * @param[in] ota_data_erase If true then the OTA data partition will be cleared (if there is it in partition table).
+ * @return    Returns true on success, false otherwise.
+ */
+bool bootloader_common_erase_part_type_data(const char *list_erase, bool ota_data_erase);
+
+/**
+ * @brief Determines if the list contains the label
+ *
+ * @param[in] list  A string of names delimited by commas or spaces. Like this "nvs, phy, data". The string must be null-terminated.
+ * @param[in] label The substring that will be searched in the list.
+ * @return    Returns true if the list contains the label, false otherwise.
+ */
+bool bootloader_common_label_search(const char *list, char *label);
+
+/**
+ * @brief Configure default SPI pin modes and drive strengths
+ *
+ * @param drv GPIO drive level (determined by clock frequency)
+ */
+void bootloader_configure_spi_pins(int drv);
+
+/**
+ * @brief Get flash CS IO
+ *
+ * Can be determined by eFuse values, or the default value
+ *
+ * @return Flash CS IO
+ */
+uint8_t bootloader_flash_get_cs_io(void);
+
+/**
+ * @brief Calculates a sha-256 for a given partition or returns a appended digest.
+ *
+ * This function can be used to return the SHA-256 digest of application, bootloader and data partitions.
+ * For apps with SHA-256 appended to the app image, the result is the appended SHA-256 value for the app image content.
+ * The hash is verified before returning, if app content is invalid then the function returns ESP_ERR_IMAGE_INVALID.
+ * For apps without SHA-256 appended to the image, the result is the SHA-256 of all bytes in the app image.
+ * For other partition types, the result is the SHA-256 of the entire partition.
+ *
+ * @param[in]  address      Address of partition.
+ * @param[in]  size         Size of partition.
+ * @param[in]  type         Type of partition. For applications the type is 0, otherwise type is data.
+ * @param[out] out_sha_256  Returned SHA-256 digest for a given partition.
+ *
+ * @return
+ *          - ESP_OK: In case of successful operation.
+ *          - ESP_ERR_INVALID_ARG: The size was 0 or the sha_256 was NULL.
+ *          - ESP_ERR_NO_MEM: Cannot allocate memory for sha256 operation.
+ *          - ESP_ERR_IMAGE_INVALID: App partition doesn't contain a valid app image.
+ *          - ESP_FAIL: An allocation error occurred.
+ */
+esp_err_t bootloader_common_get_sha256_of_partition(uint32_t address, uint32_t size, int type, uint8_t *out_sha_256);
+
+/**
+ * @brief Returns the number of active otadata.
+ *
+ * @param[in] two_otadata Pointer on array from two otadata structures.
+ *
+ * @return The number of active otadata (0 or 1).
+ *        - -1: If it does not have active otadata.
+ */
+int bootloader_common_get_active_otadata(esp_ota_select_entry_t *two_otadata);
+
+/**
+ * @brief Returns the number of active otadata.
+ *
+ * @param[in] two_otadata       Pointer on array from two otadata structures.
+ * @param[in] valid_two_otadata Pointer on array from two bools. True means select.
+ * @param[in] max               True - will select the maximum ota_seq number, otherwise the minimum.
+ *
+ * @return The number of active otadata (0 or 1).
+ *        - -1: If it does not have active otadata.
+ */
+int bootloader_common_select_otadata(const esp_ota_select_entry_t *two_otadata, bool *valid_two_otadata, bool max);
+
+/**
+ * @brief Returns esp_app_desc structure for app partition. This structure includes app version.
+ *
+ * Returns a description for the requested app partition.
+ * @param[in] partition      App partition description.
+ * @param[out] app_desc      Structure of info about app.
+ * @return
+ *  - ESP_OK:                Successful.
+ *  - ESP_ERR_INVALID_ARG:   The arguments passed are not valid.
+ *  - ESP_ERR_NOT_FOUND:     app_desc structure is not found. Magic word is incorrect.
+ *  - ESP_FAIL:              mapping is fail.
+ */
+esp_err_t bootloader_common_get_partition_description(const esp_partition_pos_t *partition, esp_app_desc_t *app_desc);
+
+/**
+ * @brief Get chip revision
+ *
+ * @return Chip revision number
+ */
+uint8_t bootloader_common_get_chip_revision(void);
+
+/**
+ * @brief Get chip package
+ *
+ * @return Chip package number
+ */
+uint32_t bootloader_common_get_chip_ver_pkg(void);
+
+/**
+ * @brief Query reset reason
+ *
+ * @param cpu_no CPU number
+ * @return reset reason enumeration
+ */
+RESET_REASON bootloader_common_get_reset_reason(int cpu_no);
+
+/**
+ * @brief Check if the image (bootloader and application) has valid chip ID and revision
+ *
+ * @param[in] img_hdr: image header
+ * @param[in] type: image type, bootloader or application
+ * @return
+ *      - ESP_OK: image and chip are matched well
+ *      - ESP_FAIL: image doesn't match to the chip
+ */
+esp_err_t bootloader_common_check_chip_validity(const esp_image_header_t* img_hdr, esp_image_type type);
+
+/**
+ * @brief Configure VDDSDIO, call this API to rise VDDSDIO to 1.9V when VDDSDIO regulator is enabled as 1.8V mode.
+ */
+void bootloader_common_vddsdio_configure(void);
+
+#if defined( CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP ) || defined( CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC )
+/**
+ * @brief Returns partition from rtc_retain_mem
+ *
+ * Uses to get the partition of application which was worked before to go to the deep sleep.
+ * This partition was stored in rtc_retain_mem.
+ * Note: This function operates the RTC FAST memory which available only for PRO_CPU.
+ *       Make sure that this function is used only PRO_CPU.
+ *
+ * @return partition: If rtc_retain_mem is valid.
+ *        - NULL: If it is not valid.
+ */
+esp_partition_pos_t* bootloader_common_get_rtc_retain_mem_partition(void);
+
+/**
+ * @brief Update the partition and reboot_counter in rtc_retain_mem.
+ *
+ * This function saves the partition of application for fast booting from the deep sleep.
+ * An algorithm uses this partition to avoid reading the otadata and does not validate an image.
+ * Note: This function operates the RTC FAST memory which available only for PRO_CPU.
+ *       Make sure that this function is used only PRO_CPU.
+ *
+ * @param[in] partition      App partition description. Can be NULL, in this case rtc_retain_mem.partition is not updated.
+ * @param[in] reboot_counter If true then update reboot_counter.
+ *
+ */
+void bootloader_common_update_rtc_retain_mem(esp_partition_pos_t* partition, bool reboot_counter);
+
+/**
+ * @brief Reset entire rtc_retain_mem.
+ *
+ * Note: This function operates the RTC FAST memory which available only for PRO_CPU.
+ *       Make sure that this function is used only PRO_CPU.
+ */
+void bootloader_common_reset_rtc_retain_mem(void);
+
+/**
+ * @brief Returns reboot_counter from rtc_retain_mem
+ *
+ * The reboot_counter counts the number of reboots. Reset only when power is off.
+ * The very first launch of the application will be from 1.
+ * Overflow is not possible, it will stop at the value UINT16_MAX.
+ * Note: This function operates the RTC FAST memory which available only for PRO_CPU.
+ *       Make sure that this function is used only PRO_CPU.
+ *
+ * @return reboot_counter: 1..65535
+ *         - 0: If rtc_retain_mem is not valid.
+ */
+uint16_t bootloader_common_get_rtc_retain_mem_reboot_counter(void);
+
+/**
+ * @brief Returns rtc_retain_mem
+ *
+ * Note: This function operates the RTC FAST memory which available only for PRO_CPU.
+ *       Make sure that this function is used only PRO_CPU.
+ *
+ * @return rtc_retain_mem
+ */
+rtc_retain_mem_t* bootloader_common_get_rtc_retain_mem(void);
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_flash.h b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_flash.h
new file mode 100644
index 00000000000..49e457f372e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_flash.h
@@ -0,0 +1,52 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <esp_err.h>
+#include <esp_spi_flash.h> /* including in bootloader for error values */
+#include "sdkconfig.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read flash ID by sending RDID command (0x9F)
+ * @return flash raw ID
+ *     mfg_id = (ID >> 16) & 0xFF;
+       flash_id = ID & 0xffff;
+ */
+uint32_t bootloader_read_flash_id(void);
+
+#if SOC_CACHE_SUPPORT_WRAP
+/**
+ * @brief Set the burst mode setting command for specified wrap mode.
+ *
+ * @param mode The specified warp mode.
+ * @return always ESP_OK
+ */
+esp_err_t bootloader_flash_wrap_set(spi_flash_wrap_mode_t mode);
+#endif
+
+/**
+  * @brief Unlock Flash write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @note This can be overridden because it's attribute weak.
+  */
+esp_err_t bootloader_flash_unlock(void);
+
+/**
+ * @brief Startup flow recommended by XMC. Call at startup before any erase/write operation.
+ *
+ * @return ESP_OK When startup successfully, otherwise ESP_FAIL (indiciating you should reboot before erase/write).
+ */
+esp_err_t bootloader_flash_xmc_startup(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_flash_config.h b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_flash_config.h
new file mode 100644
index 00000000000..8b802211325
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_flash_config.h
@@ -0,0 +1,88 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+#include "esp_image_format.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Update the flash id in g_rom_flashchip(global esp_rom_spiflash_chip_t structure).
+ *
+ * @return None
+ */
+void bootloader_flash_update_id(void);
+
+/**
+ * @brief Update the flash size in g_rom_flashchip (global esp_rom_spiflash_chip_t structure).
+ *
+ * @param size The size to store, in bytes.
+ * @return None
+ */
+void bootloader_flash_update_size(uint32_t size);
+
+/**
+ * @brief Set the flash CS setup and hold time.
+ *
+ * @note CS setup time is recomemded to be 1.5T, and CS hold time is recommended to be 2.5T.
+ *       cs_setup = 1, cs_setup_time = 0; cs_hold = 1, cs_hold_time = 1.
+ *
+ * @return None
+ */
+void bootloader_flash_cs_timing_config(void);
+
+/**
+ * @brief Configure SPI flash clock.
+ *
+ * @note This function only set clock frequency for SPI0.
+ *
+ * @param pfhdr Pointer to App image header, from where to fetch flash settings.
+ *
+ * @return None
+ */
+void bootloader_flash_clock_config(const esp_image_header_t* pfhdr);
+
+/**
+ * @brief Configure SPI flash gpio, include the IO matrix and drive strength configuration.
+ *
+ * @param pfhdr Pointer to App image header, from where to fetch flash settings.
+ *
+ * @return None
+ */
+void bootloader_flash_gpio_config(const esp_image_header_t* pfhdr);
+
+/**
+ * @brief Configure SPI flash read dummy based on different mode and frequency.
+ *
+ * @param pfhdr Pointer to App image header, from where to fetch flash settings.
+ *
+ * @return None
+ */
+void bootloader_flash_dummy_config(const esp_image_header_t* pfhdr);
+
+#ifdef CONFIG_IDF_TARGET_ESP32
+/**
+ * @brief Return the pin number used for custom SPI flash and/or SPIRAM WP pin
+ *
+ * Can be determined by eFuse values in most cases, or overriden in configuration
+ *
+ * This value is only meaningful if the other SPI flash pins are overriden via eFuse.
+ *
+ * This value is only meaningful if flash is set to QIO or QOUT mode, or if
+ * SPIRAM is enabled.
+ *
+ * @return Pin number to use, or -1 if the default should be kept
+ */
+int bootloader_flash_get_wp_pin(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_mem.h b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_mem.h
new file mode 100644
index 00000000000..21c7114ce4c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_mem.h
@@ -0,0 +1,16 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void bootloader_init_mem(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_random.h b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_random.h
new file mode 100644
index 00000000000..44e988b0b25
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_random.h
@@ -0,0 +1,55 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Enable an entropy source for RNG if RF is disabled
+ *
+ * The exact internal entropy source mechanism depends on the chip in use but
+ * all SoCs use the SAR ADC to continuously mix random bits (an internal
+ * noise reading) into the HWRNG. Consult the SoC Technical Reference
+ * Manual for more information.
+ *
+ * Can also be used from app code early during operation, if true
+ * random numbers are required before RF is initialised. Consult
+ * ESP-IDF Programming Guide "Random Number Generation" section for
+ * details.
+ */
+void bootloader_random_enable(void);
+
+/**
+ * @brief Disable entropy source for RNG
+ *
+ * Disables internal entropy source. Must be called after
+ * bootloader_random_enable() and before RF features, ADC, or
+ * I2S (ESP32 only) are initialized.
+ *
+ * Consult the ESP-IDF Programming Guide "Random Number Generation"
+ * section for details.
+ */
+void bootloader_random_disable(void);
+
+/**
+ * @brief Fill buffer with 'length' random bytes
+ *
+ * @note If this function is being called from app code only, and never
+ * from the bootloader, then it's better to call esp_fill_random().
+ *
+ * @param buffer Pointer to buffer
+ * @param length This many bytes of random data will be copied to buffer
+ */
+void bootloader_fill_random(void *buffer, size_t length);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_util.h b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_util.h
new file mode 100644
index 00000000000..c44c80619c2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/bootloader_util.h
@@ -0,0 +1,35 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Check if half-open intervals overlap
+ *
+ * @param start1  interval 1 start
+ * @param end1    interval 1 end
+ * @param start2  interval 2 start
+ * @param end2    interval 2 end
+ * @return true iff [start1; end1) overlaps [start2; end2)
+ */
+static inline bool bootloader_util_regions_overlap(
+        const intptr_t start1, const intptr_t end1,
+        const intptr_t start2, const intptr_t end2)
+{
+    assert(end1>start1);
+    assert(end2>start2);
+    return (end1 > start2 && end2 > start1);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/esp_app_format.h b/tools/sdk/esp32s3/include/bootloader_support/include/esp_app_format.h
new file mode 100644
index 00000000000..64744fdfe5a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/esp_app_format.h
@@ -0,0 +1,122 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <inttypes.h>
+
+/**
+ * @brief ESP chip ID
+ *
+ */
+typedef enum {
+    ESP_CHIP_ID_ESP32 = 0x0000,  /*!< chip ID: ESP32 */
+    ESP_CHIP_ID_ESP32S2 = 0x0002,  /*!< chip ID: ESP32-S2 */
+    ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */
+    ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */
+    ESP_CHIP_ID_ESP32H2 = 0x000A, /*!< chip ID: ESP32-H2 */  // ESP32H2-TODO: IDF-3475
+    ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
+} __attribute__((packed)) esp_chip_id_t;
+
+/** @cond */
+_Static_assert(sizeof(esp_chip_id_t) == 2, "esp_chip_id_t should be 16 bit");
+/** @endcond */
+
+/**
+ * @brief SPI flash mode, used in esp_image_header_t
+ */
+typedef enum {
+    ESP_IMAGE_SPI_MODE_QIO,         /*!< SPI mode QIO */
+    ESP_IMAGE_SPI_MODE_QOUT,        /*!< SPI mode QOUT */
+    ESP_IMAGE_SPI_MODE_DIO,         /*!< SPI mode DIO */
+    ESP_IMAGE_SPI_MODE_DOUT,        /*!< SPI mode DOUT */
+    ESP_IMAGE_SPI_MODE_FAST_READ,   /*!< SPI mode FAST_READ */
+    ESP_IMAGE_SPI_MODE_SLOW_READ    /*!< SPI mode SLOW_READ */
+} esp_image_spi_mode_t;
+
+/**
+ * @brief SPI flash clock frequency
+ */
+typedef enum {
+    ESP_IMAGE_SPI_SPEED_40M,        /*!< SPI clock frequency 40 MHz */
+    ESP_IMAGE_SPI_SPEED_26M,        /*!< SPI clock frequency 26 MHz */
+    ESP_IMAGE_SPI_SPEED_20M,        /*!< SPI clock frequency 20 MHz */
+    ESP_IMAGE_SPI_SPEED_80M = 0xF   /*!< SPI clock frequency 80 MHz */
+} esp_image_spi_freq_t;
+
+/**
+ * @brief Supported SPI flash sizes
+ */
+typedef enum {
+    ESP_IMAGE_FLASH_SIZE_1MB = 0,   /*!< SPI flash size 1 MB */
+    ESP_IMAGE_FLASH_SIZE_2MB,       /*!< SPI flash size 2 MB */
+    ESP_IMAGE_FLASH_SIZE_4MB,       /*!< SPI flash size 4 MB */
+    ESP_IMAGE_FLASH_SIZE_8MB,       /*!< SPI flash size 8 MB */
+    ESP_IMAGE_FLASH_SIZE_16MB,      /*!< SPI flash size 16 MB */
+    ESP_IMAGE_FLASH_SIZE_MAX        /*!< SPI flash size MAX */
+} esp_image_flash_size_t;
+
+#define ESP_IMAGE_HEADER_MAGIC 0xE9 /*!< The magic word for the esp_image_header_t structure. */
+
+/**
+ * @brief Main header of binary image
+ */
+typedef struct {
+    uint8_t magic;              /*!< Magic word ESP_IMAGE_HEADER_MAGIC */
+    uint8_t segment_count;      /*!< Count of memory segments */
+    uint8_t spi_mode;           /*!< flash read mode (esp_image_spi_mode_t as uint8_t) */
+    uint8_t spi_speed: 4;       /*!< flash frequency (esp_image_spi_freq_t as uint8_t) */
+    uint8_t spi_size: 4;        /*!< flash chip size (esp_image_flash_size_t as uint8_t) */
+    uint32_t entry_addr;        /*!< Entry address */
+    uint8_t wp_pin;            /*!< WP pin when SPI pins set via efuse (read by ROM bootloader,
+                                * the IDF bootloader uses software to configure the WP
+                                * pin and sets this field to 0xEE=disabled) */
+    uint8_t spi_pin_drv[3];     /*!< Drive settings for the SPI flash pins (read by ROM bootloader) */
+    esp_chip_id_t chip_id;      /*!< Chip identification number */
+    uint8_t min_chip_rev;       /*!< Minimum chip revision supported by image */
+    uint8_t reserved[8];       /*!< Reserved bytes in additional header space, currently unused */
+    uint8_t hash_appended;      /*!< If 1, a SHA256 digest "simple hash" (of the entire image) is appended after the checksum.
+                                 * Included in image length. This digest
+                                 * is separate to secure boot and only used for detecting corruption.
+                                 * For secure boot signed images, the signature
+                                 * is appended after this (and the simple hash is included in the signed data). */
+} __attribute__((packed))  esp_image_header_t;
+
+/** @cond */
+_Static_assert(sizeof(esp_image_header_t) == 24, "binary image header should be 24 bytes");
+/** @endcond */
+
+
+/**
+ * @brief Header of binary image segment
+ */
+typedef struct {
+    uint32_t load_addr;     /*!< Address of segment */
+    uint32_t data_len;      /*!< Length of data */
+} esp_image_segment_header_t;
+
+#define ESP_IMAGE_MAX_SEGMENTS 16           /*!< Max count of segments in the image. */
+
+#define ESP_APP_DESC_MAGIC_WORD 0xABCD5432  /*!< The magic word for the esp_app_desc structure that is in DROM. */
+
+/**
+ * @brief Description about application.
+ */
+typedef struct {
+    uint32_t magic_word;        /*!< Magic word ESP_APP_DESC_MAGIC_WORD */
+    uint32_t secure_version;    /*!< Secure version */
+    uint32_t reserv1[2];        /*!< reserv1 */
+    char version[32];           /*!< Application version */
+    char project_name[32];      /*!< Project name */
+    char time[16];              /*!< Compile time */
+    char date[16];              /*!< Compile date*/
+    char idf_ver[32];           /*!< Version IDF */
+    uint8_t app_elf_sha256[32]; /*!< sha256 of elf file */
+    uint32_t reserv2[20];       /*!< reserv2 */
+} esp_app_desc_t;
+
+/** @cond */
+_Static_assert(sizeof(esp_app_desc_t) == 256, "esp_app_desc_t should be 256 bytes");
+/** @endcond */
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/esp_flash_data_types.h b/tools/sdk/esp32s3/include/bootloader_support/include/esp_flash_data_types.h
new file mode 100644
index 00000000000..7b4171fdd32
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/esp_flash_data_types.h
@@ -0,0 +1,7 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#warning esp_flash_data_types.h has been merged into esp_flash_partitions.h, please include esp_flash_partitions.h instead
+#include "esp_flash_partitions.h"
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/esp_flash_encrypt.h b/tools/sdk/esp32s3/include/bootloader_support/include/esp_flash_encrypt.h
new file mode 100644
index 00000000000..efb7eb8bce3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/esp_flash_encrypt.h
@@ -0,0 +1,186 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_attr.h"
+#include "esp_err.h"
+#ifndef BOOTLOADER_BUILD
+#include "esp_spi_flash.h"
+#endif
+#include "soc/efuse_periph.h"
+#include "sdkconfig.h"
+
+#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
+#include "esp_efuse.h"
+#include "esp_efuse_table.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* @brief Flash encryption mode based on efuse values
+*/
+typedef enum {
+    ESP_FLASH_ENC_MODE_DISABLED,          // flash encryption is not enabled (flash crypt cnt=0)
+    ESP_FLASH_ENC_MODE_DEVELOPMENT,       // flash encryption is enabled but for Development (reflash over UART allowed)
+    ESP_FLASH_ENC_MODE_RELEASE            // flash encryption is enabled for Release (reflash over UART disabled)
+} esp_flash_enc_mode_t;
+
+/**
+ * @file esp_partition.h
+ * @brief Support functions for flash encryption features
+ *
+ * Can be compiled as part of app or bootloader code.
+ */
+
+/** @brief Is flash encryption currently enabled in hardware?
+ *
+ * Flash encryption is enabled if the FLASH_CRYPT_CNT efuse has an odd number of bits set.
+ *
+ * @return true if flash encryption is enabled.
+ */
+static inline /** @cond */ IRAM_ATTR /** @endcond */ bool esp_flash_encryption_enabled(void)
+{
+    uint32_t flash_crypt_cnt = 0;
+#if CONFIG_IDF_TARGET_ESP32
+    #ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
+        flash_crypt_cnt = REG_GET_FIELD(EFUSE_BLK0_RDATA0_REG, EFUSE_RD_FLASH_CRYPT_CNT);
+    #else
+        esp_efuse_read_field_blob(ESP_EFUSE_FLASH_CRYPT_CNT, &flash_crypt_cnt, ESP_EFUSE_FLASH_CRYPT_CNT[0]->bit_count);
+    #endif
+#else
+    #ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
+        flash_crypt_cnt = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_SPI_BOOT_CRYPT_CNT);
+    #else
+        esp_efuse_read_field_blob(ESP_EFUSE_SPI_BOOT_CRYPT_CNT, &flash_crypt_cnt, ESP_EFUSE_SPI_BOOT_CRYPT_CNT[0]->bit_count);
+    #endif
+#endif
+    /* __builtin_parity is in flash, so we calculate parity inline */
+    bool enabled = false;
+    while (flash_crypt_cnt) {
+        if (flash_crypt_cnt & 1) {
+            enabled = !enabled;
+        }
+        flash_crypt_cnt >>= 1;
+    }
+    return enabled;
+}
+
+/* @brief Update on-device flash encryption
+ *
+ * Intended to be called as part of the bootloader process if flash
+ * encryption is enabled in device menuconfig.
+ *
+ * If FLASH_CRYPT_CNT efuse parity is 1 (ie odd number of bits set),
+ * then return ESP_OK immediately (indicating flash encryption is enabled
+ * and functional).
+ *
+ * If FLASH_CRYPT_CNT efuse parity is 0 (ie even number of bits set),
+ * assume the flash has just been written with plaintext that needs encrypting.
+ *
+ * The following regions of flash are encrypted in place:
+ *
+ * - The bootloader image, if a valid plaintext image is found.[*]
+ * - The partition table, if a valid plaintext table is found.
+ * - Any app partition that contains a valid plaintext app image.
+ * - Any other partitions with the "encrypt" flag set. [**]
+ *
+ * After the re-encryption process completes, a '1' bit is added to the
+ * FLASH_CRYPT_CNT value (setting the parity to 1) and the EFUSE is re-burned.
+ *
+ * [*] If reflashing bootloader with secure boot enabled, pre-encrypt
+ * the bootloader before writing it to flash or secure boot will fail.
+ *
+ * [**] For this reason, if serial re-flashing a previous flashed
+ * device with secure boot enabled and using FLASH_CRYPT_CNT to
+ * trigger re-encryption, you must simultaneously re-flash plaintext
+ * content to all partitions with the "encrypt" flag set or this
+ * data will be corrupted (encrypted twice).
+ *
+ * @note The post-condition of this function is that all
+ * partitions that should be encrypted are encrypted.
+ *
+ * @note Take care not to power off the device while this function
+ * is running, or the partition currently being encrypted will be lost.
+ *
+ * @note RTC_WDT will reset while encryption operations will be performed (if RTC_WDT is configured).
+ *
+ * @return ESP_OK if all operations succeeded, ESP_ERR_INVALID_STATE
+ * if a fatal error occured during encryption of all partitions.
+ */
+esp_err_t esp_flash_encrypt_check_and_update(void);
+
+
+/** @brief Encrypt-in-place a block of flash sectors
+ *
+ * @note This function resets RTC_WDT between operations with sectors.
+ * @param src_addr Source offset in flash. Should be multiple of 4096 bytes.
+ * @param data_length Length of data to encrypt in bytes. Will be rounded up to next multiple of 4096 bytes.
+ *
+ * @return ESP_OK if all operations succeeded, ESP_ERR_FLASH_OP_FAIL
+ * if SPI flash fails, ESP_ERR_FLASH_OP_TIMEOUT if flash times out.
+ */
+esp_err_t esp_flash_encrypt_region(uint32_t src_addr, size_t data_length);
+
+/** @brief Write protect FLASH_CRYPT_CNT
+ *
+ * Intended to be called as a part of boot process if flash encryption
+ * is enabled but secure boot is not used. This should protect against
+ * serial re-flashing of an unauthorised code in absence of secure boot.
+ *
+ * @note On ESP32 V3 only, write protecting FLASH_CRYPT_CNT will also prevent
+ * disabling UART Download Mode. If both are wanted, call
+ * esp_efuse_disable_rom_download_mode() before calling this function.
+ *
+ */
+void esp_flash_write_protect_crypt_cnt(void);
+
+/** @brief Return the flash encryption mode
+ *
+ * The API is called during boot process but can also be called by
+ * application to check the current flash encryption mode of ESP32
+ *
+ * @return
+ */
+esp_flash_enc_mode_t esp_get_flash_encryption_mode(void);
+
+
+/** @brief Check the flash encryption mode during startup
+ *
+ * @note This function is called automatically during app startup,
+ * it doesn't need to be called from the app.
+ *
+ * Verifies the flash encryption config during startup:
+ *
+ * - Correct any insecure flash encryption settings if hardware
+ *   Secure Boot is enabled.
+ * - Log warnings if the efuse config doesn't match the project
+ *  config in any way
+ */
+void esp_flash_encryption_init_checks(void);
+
+/** @brief Set all secure eFuse features related to flash encryption
+ *
+ * @return
+ *  - ESP_OK - Successfully
+ */
+esp_err_t esp_flash_encryption_enable_secure_features(void);
+
+/** @brief Switches Flash Encryption from "Development" to "Release"
+ *
+ * If already in "Release" mode, the function will do nothing.
+ * If flash encryption efuse is not enabled yet then abort.
+ * It burns:
+ *  - "disable encrypt in dl mode"
+ *  - set FLASH_CRYPT_CNT efuse to max
+ */
+void esp_flash_encryption_set_release_mode(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/esp_flash_partitions.h b/tools/sdk/esp32s3/include/bootloader_support/include/esp_flash_partitions.h
new file mode 100644
index 00000000000..b1a83640ce1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/esp_flash_partitions.h
@@ -0,0 +1,108 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include "esp_err.h"
+#include "esp_types.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_PARTITION_MAGIC 0x50AA
+#define ESP_PARTITION_MAGIC_MD5 0xEBEB
+
+#define PART_TYPE_APP 0x00
+#define PART_SUBTYPE_FACTORY  0x00
+#define PART_SUBTYPE_OTA_FLAG 0x10
+#define PART_SUBTYPE_OTA_MASK 0x0f
+#define PART_SUBTYPE_TEST     0x20
+
+#define PART_TYPE_DATA 0x01
+#define PART_SUBTYPE_DATA_OTA 0x00
+#define PART_SUBTYPE_DATA_RF  0x01
+#define PART_SUBTYPE_DATA_WIFI 0x02
+#define PART_SUBTYPE_DATA_NVS_KEYS 0x04
+#define PART_SUBTYPE_DATA_EFUSE_EM 0x05
+
+#define PART_TYPE_END 0xff
+#define PART_SUBTYPE_END 0xff
+
+#define PART_FLAG_ENCRYPTED (1<<0)
+
+/* The md5sum value is found this many bytes after the ESP_PARTITION_MAGIC_MD5 offset */
+#define ESP_PARTITION_MD5_OFFSET 16
+
+/* Pre-partition table fixed flash offsets */
+#define ESP_BOOTLOADER_DIGEST_OFFSET 0x0
+#define ESP_BOOTLOADER_OFFSET CONFIG_BOOTLOADER_OFFSET_IN_FLASH  /* Offset of bootloader image. Has matching value in bootloader KConfig.projbuild file. */
+#define ESP_PARTITION_TABLE_OFFSET CONFIG_PARTITION_TABLE_OFFSET /* Offset of partition table. Backwards-compatible name.*/
+
+#define ESP_PARTITION_TABLE_MAX_LEN 0xC00 /* Maximum length of partition table data */
+#define ESP_PARTITION_TABLE_MAX_ENTRIES (ESP_PARTITION_TABLE_MAX_LEN / sizeof(esp_partition_info_t)) /* Maximum length of partition table data, including terminating entry */
+
+/// OTA_DATA states for checking operability of the app.
+typedef enum {
+    ESP_OTA_IMG_NEW             = 0x0U,         /*!< Monitor the first boot. In bootloader this state is changed to ESP_OTA_IMG_PENDING_VERIFY. */
+    ESP_OTA_IMG_PENDING_VERIFY  = 0x1U,         /*!< First boot for this app was. If while the second boot this state is then it will be changed to ABORTED. */
+    ESP_OTA_IMG_VALID           = 0x2U,         /*!< App was confirmed as workable. App can boot and work without limits. */
+    ESP_OTA_IMG_INVALID         = 0x3U,         /*!< App was confirmed as non-workable. This app will not selected to boot at all. */
+    ESP_OTA_IMG_ABORTED         = 0x4U,         /*!< App could not confirm the workable or non-workable. In bootloader IMG_PENDING_VERIFY state will be changed to IMG_ABORTED. This app will not selected to boot at all. */
+    ESP_OTA_IMG_UNDEFINED       = 0xFFFFFFFFU,  /*!< Undefined. App can boot and work without limits. */
+} esp_ota_img_states_t;
+
+/* OTA selection structure (two copies in the OTA data partition.)
+   Size of 32 bytes is friendly to flash encryption */
+typedef struct {
+    uint32_t ota_seq;
+    uint8_t  seq_label[20];
+    uint32_t ota_state;
+    uint32_t crc; /* CRC32 of ota_seq field only */
+} esp_ota_select_entry_t;
+
+
+typedef struct {
+    uint32_t offset;
+    uint32_t size;
+} esp_partition_pos_t;
+
+/* Structure which describes the layout of partition table entry.
+ * See docs/partition_tables.rst for more information about individual fields.
+ */
+typedef struct {
+    uint16_t magic;
+    uint8_t  type;
+    uint8_t  subtype;
+    esp_partition_pos_t pos;
+    uint8_t  label[16];
+    uint32_t flags;
+} esp_partition_info_t;
+
+/* @brief Verify the partition table
+ *
+ * @param partition_table Pointer to at least ESP_PARTITION_TABLE_MAX_ENTRIES of potential partition table data. (ESP_PARTITION_TABLE_MAX_LEN bytes.)
+ * @param log_errors Log errors if the partition table is invalid.
+ * @param num_partitions If result is ESP_OK, num_partitions is updated with total number of partitions (not including terminating entry).
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_STATE if partition table is not valid.
+ */
+esp_err_t esp_partition_table_verify(const esp_partition_info_t *partition_table, bool log_errors, int *num_partitions);
+
+
+/**
+ * Check whether the region on the main flash is safe to write.
+ *
+ * @param addr Start address of the region
+ * @param size Size of the region
+ *
+ * @return true if the region is safe to write, otherwise false.
+ */
+bool esp_partition_main_flash_region_safe(size_t addr, size_t size);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/esp_image_format.h b/tools/sdk/esp32s3/include/bootloader_support/include/esp_image_format.h
new file mode 100644
index 00000000000..1db62442537
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/esp_image_format.h
@@ -0,0 +1,198 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include <esp_err.h>
+#include "esp_flash_partitions.h"
+#include "esp_app_format.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_ERR_IMAGE_BASE       0x2000
+#define ESP_ERR_IMAGE_FLASH_FAIL (ESP_ERR_IMAGE_BASE + 1)
+#define ESP_ERR_IMAGE_INVALID    (ESP_ERR_IMAGE_BASE + 2)
+
+/* Support for app/bootloader image parsing
+   Can be compiled as part of app or bootloader code.
+*/
+
+#define ESP_IMAGE_HASH_LEN 32 /* Length of the appended SHA-256 digest */
+
+/* Structure to hold on-flash image metadata */
+typedef struct {
+  uint32_t start_addr;   /* Start address of image */
+  esp_image_header_t image; /* Header for entire image */
+  esp_image_segment_header_t segments[ESP_IMAGE_MAX_SEGMENTS]; /* Per-segment header data */
+  uint32_t segment_data[ESP_IMAGE_MAX_SEGMENTS]; /* Data offsets for each segment */
+  uint32_t image_len; /* Length of image on flash, in bytes */
+  uint8_t image_digest[32]; /* appended SHA-256 digest */
+} esp_image_metadata_t;
+
+typedef enum {
+    ESP_IMAGE_VERIFY,            /* Verify image contents, not load to memory, load metadata. Print errors. */
+    ESP_IMAGE_VERIFY_SILENT,     /* Verify image contents, not load to memory, load metadata. Don't print errors. */
+#ifdef BOOTLOADER_BUILD
+    ESP_IMAGE_LOAD,              /* Verify image contents, load to memory, load metadata. Print errors. */
+    ESP_IMAGE_LOAD_NO_VALIDATE,  /* Not verify image contents, load to memory, load metadata. Print errors. */
+#endif
+} esp_image_load_mode_t;
+
+typedef struct {
+    esp_partition_pos_t partition;  /*!< Partition of application which worked before goes to the deep sleep. */
+    uint16_t reboot_counter;        /*!< Reboot counter. Reset only when power is off. */
+    uint16_t reserve;               /*!< Reserve */
+#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
+    uint8_t custom[CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE]; /*!< Reserve for custom propose */
+#endif
+    uint32_t crc;                   /*!< Check sum crc32 */
+} rtc_retain_mem_t;
+
+#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
+_Static_assert(CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE % 4 == 0, "CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE must be a multiple of 4 bytes");
+#endif
+
+#if defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP) || defined(CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC)
+_Static_assert(CONFIG_BOOTLOADER_RESERVE_RTC_SIZE % 4 == 0, "CONFIG_BOOTLOADER_RESERVE_RTC_SIZE must be a multiple of 4 bytes");
+#endif
+
+#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
+#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
+#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP)
+#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE)
+#endif
+
+#if defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP) || defined(CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC)
+_Static_assert(sizeof(rtc_retain_mem_t) <= ESP_BOOTLOADER_RESERVE_RTC, "Reserved RTC area must exceed size of rtc_retain_mem_t");
+#endif
+
+/**
+ * @brief Verify an app image.
+ *
+ * If encryption is enabled, data will be transparently decrypted.
+ *
+ * @param mode Mode of operation (verify, silent verify, or load).
+ * @param part Partition to load the app from.
+ * @param[inout] data Pointer to the image metadata structure which is be filled in by this function.
+ *                    'start_addr' member should be set (to the start address of the image.)
+ *                    Other fields will all be initialised by this function.
+ *
+ * Image validation checks:
+ * - Magic byte.
+ * - Partition smaller than 16MB.
+ * - All segments & image fit in partition.
+ * - 8 bit image checksum is valid.
+ * - SHA-256 of image is valid (if image has this appended).
+ * - (Signature) if signature verification is enabled.
+ *
+ * @return
+ * - ESP_OK if verify or load was successful
+ * - ESP_ERR_IMAGE_FLASH_FAIL if a SPI flash error occurs
+ * - ESP_ERR_IMAGE_INVALID if the image appears invalid.
+ * - ESP_ERR_INVALID_ARG if the partition or data pointers are invalid.
+ */
+esp_err_t esp_image_verify(esp_image_load_mode_t mode, const esp_partition_pos_t *part, esp_image_metadata_t *data);
+
+/**
+ * @brief Get metadata of app
+ *
+ * If encryption is enabled, data will be transparently decrypted.
+ *
+ * @param part Partition to load the app from.
+ * @param[out] metadata Pointer to the image metadata structure which is be filled in by this function.
+ *                      Fields will all be initialised by this function.
+ *
+ * @return
+ * - ESP_OK if filling of metadata was successful
+ */
+esp_err_t esp_image_get_metadata(const esp_partition_pos_t *part, esp_image_metadata_t *metadata);
+
+/**
+ * @brief Verify and load an app image (available only in space of bootloader).
+ *
+ * If encryption is enabled, data will be transparently decrypted.
+ *
+ * @param part Partition to load the app from.
+ * @param[inout] data Pointer to the image metadata structure which is be filled in by this function.
+ *                    'start_addr' member should be set (to the start address of the image.)
+ *                    Other fields will all be initialised by this function.
+ *
+ * Image validation checks:
+ * - Magic byte.
+ * - Partition smaller than 16MB.
+ * - All segments & image fit in partition.
+ * - 8 bit image checksum is valid.
+ * - SHA-256 of image is valid (if image has this appended).
+ * - (Signature) if signature verification is enabled.
+ *
+ * @return
+ * - ESP_OK if verify or load was successful
+ * - ESP_ERR_IMAGE_FLASH_FAIL if a SPI flash error occurs
+ * - ESP_ERR_IMAGE_INVALID if the image appears invalid.
+ * - ESP_ERR_INVALID_ARG if the partition or data pointers are invalid.
+ */
+esp_err_t bootloader_load_image(const esp_partition_pos_t *part, esp_image_metadata_t *data);
+
+/**
+ * @brief Load an app image without verification (available only in space of bootloader).
+ *
+ * If encryption is enabled, data will be transparently decrypted.
+ *
+ * @param part Partition to load the app from.
+ * @param[inout] data Pointer to the image metadata structure which is be filled in by this function.
+ *                    'start_addr' member should be set (to the start address of the image.)
+ *                    Other fields will all be initialised by this function.
+ *
+ * @return
+ * - ESP_OK if verify or load was successful
+ * - ESP_ERR_IMAGE_FLASH_FAIL if a SPI flash error occurs
+ * - ESP_ERR_IMAGE_INVALID if the image appears invalid.
+ * - ESP_ERR_INVALID_ARG if the partition or data pointers are invalid.
+ */
+esp_err_t bootloader_load_image_no_verify(const esp_partition_pos_t *part, esp_image_metadata_t *data);
+
+/**
+ * @brief Verify the bootloader image.
+ *
+ * @param[out] If result is ESP_OK and this pointer is non-NULL, it
+ * will be set to the length of the bootloader image.
+ *
+ * @return As per esp_image_load_metadata().
+ */
+esp_err_t esp_image_verify_bootloader(uint32_t *length);
+
+/**
+ * @brief Verify the bootloader image.
+ *
+ * @param[out] Metadata for the image. Only valid if result is ESP_OK.
+ *
+ * @return As per esp_image_load_metadata().
+ */
+esp_err_t esp_image_verify_bootloader_data(esp_image_metadata_t *data);
+
+/**
+ * @brief Get the flash size of the image
+ *
+ * @param app_flash_size The value configured in the image header
+ * @return Actual size, in bytes.
+ */
+int esp_image_get_flash_size(esp_image_flash_size_t app_flash_size);
+
+
+typedef struct {
+    uint32_t drom_addr;
+    uint32_t drom_load_addr;
+    uint32_t drom_size;
+    uint32_t irom_addr;
+    uint32_t irom_load_addr;
+    uint32_t irom_size;
+} esp_image_flash_mapping_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/bootloader_support/include/esp_secure_boot.h b/tools/sdk/esp32s3/include/bootloader_support/include/esp_secure_boot.h
new file mode 100644
index 00000000000..9bb8dfec0b7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bootloader_support/include/esp_secure_boot.h
@@ -0,0 +1,295 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include <esp_err.h>
+#include "soc/efuse_periph.h"
+#include "esp_image_format.h"
+#include "esp_rom_efuse.h"
+#include "sdkconfig.h"
+#include "esp_rom_crc.h"
+
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/efuse.h"
+#include "esp32/rom/secure_boot.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/efuse.h"
+#include "esp32s2/rom/secure_boot.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/efuse.h"
+#include "esp32c3/rom/secure_boot.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/efuse.h"
+#include "esp32s3/rom/secure_boot.h"
+#elif CONFIG_IDF_TARGET_ESP32H2
+#include "esp32h2/rom/efuse.h"
+#include "esp32h2/rom/secure_boot.h"
+#endif
+
+#ifdef CONFIG_SECURE_BOOT_V1_ENABLED
+#if !defined(CONFIG_SECURE_SIGNED_ON_BOOT) || !defined(CONFIG_SECURE_SIGNED_ON_UPDATE) || !defined(CONFIG_SECURE_SIGNED_APPS)
+#error "internal sdkconfig error, secure boot should always enable all signature options"
+#endif
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Support functions for secure boot features.
+
+   Can be compiled as part of app or bootloader code.
+*/
+
+#define ESP_SECURE_BOOT_DIGEST_LEN 32
+
+#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
+#include "esp_efuse.h"
+#include "esp_efuse_table.h"
+#endif
+
+/** @brief Is secure boot currently enabled in hardware?
+ *
+ * This means that the ROM bootloader code will only boot
+ * a verified secure bootloader from now on.
+ *
+ * @return true if secure boot is enabled.
+ */
+static inline bool esp_secure_boot_enabled(void)
+{
+#if CONFIG_IDF_TARGET_ESP32
+    #ifdef CONFIG_SECURE_BOOT_V1_ENABLED
+        #ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
+            return REG_READ(EFUSE_BLK0_RDATA6_REG) & EFUSE_RD_ABS_DONE_0;
+        #else
+            return esp_efuse_read_field_bit(ESP_EFUSE_ABS_DONE_0);
+        #endif
+    #elif CONFIG_SECURE_BOOT_V2_ENABLED
+        #ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
+            return ets_use_secure_boot_v2();
+        #else
+            return esp_efuse_read_field_bit(ESP_EFUSE_ABS_DONE_1);
+        #endif
+    #endif
+#else
+    #ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
+        return esp_rom_efuse_is_secure_boot_enabled();
+    #else
+        return esp_efuse_read_field_bit(ESP_EFUSE_SECURE_BOOT_EN);
+    #endif
+#endif
+    return false; /* Secure Boot not enabled in menuconfig */
+}
+
+/** @brief Generate secure digest from bootloader image
+ *
+ * @important This function is intended to be called from bootloader code only.
+ *
+ * This function is only used in the context of the Secure Boot V1 scheme.
+ *
+ * If secure boot is not yet enabled for bootloader, this will:
+ *     1) generate the secure boot key and burn it on EFUSE
+ *        (without enabling R/W protection)
+ *     2) generate the digest from bootloader and save it
+ *        to flash address 0x0
+ *
+ * If first boot gets interrupted after calling this function
+ * but before esp_secure_boot_permanently_enable() is called, then
+ * the key burned on EFUSE will not be regenerated, unless manually
+ * done using espefuse.py tool
+ *
+ * @return ESP_OK if secure boot digest is generated
+ * successfully or found to be already present
+ */
+esp_err_t esp_secure_boot_generate_digest(void);
+
+/** @brief Enable secure boot V1 if it is not already enabled.
+ *
+ * @important If this function succeeds, secure boot V1 is permanently
+ * enabled on the chip via efuse.
+ *
+ * @important This function is intended to be called from bootloader code only.
+ *
+ * @important In case of Secure Boot V1, this will enable r/w protection
+ * of secure boot key on EFUSE, therefore it is to be ensured that
+ * esp_secure_boot_generate_digest() is called before this .If secure boot is not
+ * yet enabled for bootloader, this will
+ *     1) enable R/W protection of secure boot key on EFUSE
+ *     2) enable secure boot by blowing the EFUSE_RD_ABS_DONE_0 efuse.
+ *
+ * This function does not verify secure boot of the bootloader (the
+ * ROM bootloader does this.)
+ *
+ * Will fail if efuses have been part-burned in a way that indicates
+ * secure boot should not or could not be correctly enabled.
+ *
+ * @return ESP_ERR_INVALID_STATE if efuse state doesn't allow
+ * secure boot to be enabled cleanly. ESP_OK if secure boot
+ * is enabled on this chip from now on.
+ */
+esp_err_t esp_secure_boot_permanently_enable(void);
+
+/** @brief Enables secure boot V2 if it is not already enabled.
+ *
+ * @important If this function succeeds, secure boot V2 is permanently
+ * enabled on the chip via efuse.
+ *
+ * @important This function is intended to be called from bootloader code only.
+ *
+ * @important In case of Secure Boot V2, this will enable write protection
+ * of secure boot key on EFUSE in BLK2. .If secure boot is not
+ * yet enabled for bootloader, this will
+ *     1) enable W protection of secure boot key on EFUSE
+ *     2) enable secure boot by blowing the EFUSE_RD_ABS_DONE_1 efuse.
+ *
+ * This function does not verify secure boot of the bootloader (the
+ * ROM bootloader does this.)
+ *
+ * @param image_data Image metadata of the application to be loaded.
+ *
+ * Will fail if efuses have been part-burned in a way that indicates
+ * secure boot should not or could not be correctly enabled.
+ *
+ * @return ESP_ERR_INVALID_STATE if efuse state doesn't allow
+ * secure boot to be enabled cleanly. ESP_OK if secure boot
+ * is enabled on this chip from now on.
+ */
+esp_err_t esp_secure_boot_v2_permanently_enable(const esp_image_metadata_t *image_data);
+
+/** @brief Verify the secure boot signature appended to some binary data in flash.
+ *
+ * For ECDSA Scheme (Secure Boot V1) - deterministic ECDSA w/ SHA256 image
+ * For RSA Scheme (Secure Boot V2) - RSA-PSS Verification of the SHA-256 image
+ *
+ * Public key is compiled into the calling program in the ECDSA Scheme.
+ * See the apt docs/security/secure-boot-v1.rst or docs/security/secure-boot-v2.rst for details.
+ *
+ * @param src_addr Starting offset of the data in flash.
+ * @param length Length of data in bytes. Signature is appended -after- length bytes.
+ *
+ * If flash encryption is enabled, the image will be transparently decrypted while being verified.
+ *
+ * @note This function doesn't have any fault injection resistance so should not be called
+ * during a secure boot itself (but can be called when verifying an update, etc.)
+ *
+ * @return ESP_OK if signature is valid, ESP_ERR_INVALID_STATE if
+ * signature fails, ESP_FAIL for other failures (ie can't read flash).
+ */
+esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length);
+
+/** @brief Secure boot verification block, on-flash data format. */
+typedef struct {
+    uint32_t version;
+    uint8_t signature[64];
+} esp_secure_boot_sig_block_t;
+
+/** @brief Verify the ECDSA secure boot signature block for Secure Boot V1.
+ *
+ *  Calculates Deterministic ECDSA w/ SHA256 based on the SHA256 hash of the image. ECDSA signature
+ *  verification must be enabled in project configuration to use this function.
+ *
+ * Similar to esp_secure_boot_verify_signature(), but can be used when the digest is precalculated.
+ * @param sig_block Pointer to ECDSA signature block data
+ * @param image_digest Pointer to 32 byte buffer holding SHA-256 hash.
+ * @param verified_digest Pointer to 32 byte buffer that will receive verified digest if verification completes. (Used during bootloader implementation only, result is invalid otherwise.)
+ *
+ */
+esp_err_t esp_secure_boot_verify_ecdsa_signature_block(const esp_secure_boot_sig_block_t *sig_block, const uint8_t *image_digest, uint8_t *verified_digest);
+
+#if !CONFIG_IDF_TARGET_ESP32 || CONFIG_ESP32_REV_MIN_3
+/**
+ * @brief Structure to hold public key digests calculated from the signature blocks of a single image.
+ *
+ * Each image can have one or more signature blocks (up to SECURE_BOOT_NUM_BLOCKS). Each signature block includes a public key.
+ */
+typedef struct {
+    uint8_t key_digests[SECURE_BOOT_NUM_BLOCKS][ESP_SECURE_BOOT_DIGEST_LEN];    /* SHA of the public key components in the signature block */
+    unsigned num_digests;                                       /* Number of valid digests, starting at index 0 */
+} esp_image_sig_public_key_digests_t;
+
+/** @brief Verify the RSA secure boot signature block for Secure Boot V2.
+ *
+ *  Performs RSA-PSS Verification of the SHA-256 image based on the public key
+ *  in the signature block, compared against the public key digest stored in efuse.
+ *
+ * Similar to esp_secure_boot_verify_signature(), but can be used when the digest is precalculated.
+ * @param sig_block Pointer to RSA signature block data
+ * @param image_digest Pointer to 32 byte buffer holding SHA-256 hash.
+ * @param verified_digest Pointer to 32 byte buffer that will receive verified digest if verification completes. (Used during bootloader implementation only, result is invalid otherwise.)
+ *
+ */
+esp_err_t esp_secure_boot_verify_rsa_signature_block(const ets_secure_boot_signature_t *sig_block, const uint8_t *image_digest, uint8_t *verified_digest);
+#endif // !CONFIG_IDF_TARGET_ESP32 || CONFIG_ESP32_REV_MIN_3
+
+/** @brief Legacy ECDSA verification function
+ *
+ * @note Deprecated, call either esp_secure_boot_verify_ecdsa_signature_block() or esp_secure_boot_verify_rsa_signature_block() instead.
+ *
+ * @param sig_block Pointer to ECDSA signature block data
+ * @param image_digest Pointer to 32 byte buffer holding SHA-256 hash.
+ */
+esp_err_t esp_secure_boot_verify_signature_block(const esp_secure_boot_sig_block_t *sig_block, const uint8_t *image_digest)
+    __attribute__((deprecated("use esp_secure_boot_verify_ecdsa_signature_block instead")));
+
+
+#define FLASH_OFFS_SECURE_BOOT_IV_DIGEST 0
+
+/** @brief Secure boot IV+digest header */
+typedef struct {
+    uint8_t iv[128];
+    uint8_t digest[64];
+} esp_secure_boot_iv_digest_t;
+
+/** @brief Check the secure boot V2 during startup
+ *
+ * @note This function is called automatically during app startup,
+ * it doesn't need to be called from the app.
+ *
+ * Verifies the secure boot config during startup:
+ *
+ * - Correct any insecure secure boot settings
+ */
+void esp_secure_boot_init_checks(void);
+
+#if !BOOTLOADER_BUILD && CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME
+
+/** @brief Scan the current running app for signature blocks
+ *
+ * @note This function doesn't verify that the signatures are valid or the
+ * corresponding public keys are trusted, it only reads the number of signature
+ * blocks present and optionally calculates the digests of the public keys
+ * provided in the signature blocks.
+ *
+ * @param digest_public_keys If true, the key_digests fields in the
+ * public_key_digests structure will be filled with the digests of the public
+ * key provided in each signature block. Note that if Secure Boot V2 is enabled,
+ * each public key will only be trusted if the same digest is also present in
+ * eFuse (but this is not checked by this function).
+ *
+ * @param public_key_digests[out] Structure is initialized with the num_digests
+ * field set to the number of signatures found. If digest_public_keys is set,
+ * the public key digests are also calculated and stored here.
+ *
+ * @return
+ *  - ESP_OK - At least one signature was found
+ *  - ESP_ERR_NOT_FOUND - No signatures were found, num_digests value will be zero
+ *  - ESP_FAIL - An error occured trying to read the signature blocks from flash
+ */
+esp_err_t esp_secure_boot_get_signature_blocks_for_running_app(bool digest_public_keys, esp_image_sig_public_key_digests_t *public_key_digests);
+
+#endif // !BOOTLOADER_BUILD && CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME
+
+/** @brief Set all secure eFuse features related to secure_boot
+ *
+ * @return
+ *  - ESP_OK - Successfully
+ */
+esp_err_t esp_secure_boot_enable_secure_features(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/bt/common/api/include/api/esp_blufi_api.h b/tools/sdk/esp32s3/include/bt/common/api/include/api/esp_blufi_api.h
new file mode 100644
index 00000000000..7c99f658206
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/api/include/api/esp_blufi_api.h
@@ -0,0 +1,433 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_BLUFI_API_H__
+#define __ESP_BLUFI_API_H__
+
+#include "esp_err.h"
+#include "esp_wifi_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ESP_BLUFI_EVENT_INIT_FINISH = 0,                     /*<! When BLUFI init complete, this event happen */
+    ESP_BLUFI_EVENT_DEINIT_FINISH,                       /*<! When BLUFI deinit complete, this event happen */
+    ESP_BLUFI_EVENT_SET_WIFI_OPMODE,                     /*<! When Phone set ESP32 wifi operation mode(AP/STA/AP_STA), this event happen */
+    ESP_BLUFI_EVENT_BLE_CONNECT,                         /*<! When Phone connect to ESP32 with BLE, this event happen */
+    ESP_BLUFI_EVENT_BLE_DISCONNECT,                      /*<! When Phone disconnect with BLE, this event happen */
+    ESP_BLUFI_EVENT_REQ_CONNECT_TO_AP,                   /*<! When Phone request ESP32's STA connect to AP, this event happen */
+    ESP_BLUFI_EVENT_REQ_DISCONNECT_FROM_AP,              /*<! When Phone request ESP32's STA disconnect from AP, this event happen */
+    ESP_BLUFI_EVENT_GET_WIFI_STATUS,                     /*<! When Phone get ESP32 wifi status, this event happen */
+    ESP_BLUFI_EVENT_DEAUTHENTICATE_STA,                  /*<! When Phone deauthenticate sta from SOFTAP, this event happen */
+    /* recv data */
+    ESP_BLUFI_EVENT_RECV_STA_BSSID,                      /*<! When Phone send STA BSSID to ESP32 to connect, this event happen */
+    ESP_BLUFI_EVENT_RECV_STA_SSID,                       /*<! When Phone send STA SSID to ESP32 to connect, this event happen */
+    ESP_BLUFI_EVENT_RECV_STA_PASSWD,                     /*<! When Phone send STA PASSWORD to ESP32 to connect, this event happen */
+    ESP_BLUFI_EVENT_RECV_SOFTAP_SSID,                    /*<! When Phone send SOFTAP SSID to ESP32 to start SOFTAP, this event happen */
+    ESP_BLUFI_EVENT_RECV_SOFTAP_PASSWD,                  /*<! When Phone send SOFTAP PASSWORD to ESP32 to start SOFTAP, this event happen */
+    ESP_BLUFI_EVENT_RECV_SOFTAP_MAX_CONN_NUM,            /*<! When Phone send SOFTAP max connection number to ESP32 to start SOFTAP, this event happen */
+    ESP_BLUFI_EVENT_RECV_SOFTAP_AUTH_MODE,               /*<! When Phone send SOFTAP authentication mode to ESP32 to start SOFTAP, this event happen */
+    ESP_BLUFI_EVENT_RECV_SOFTAP_CHANNEL,                 /*<! When Phone send SOFTAP channel to ESP32 to start SOFTAP, this event happen */
+    ESP_BLUFI_EVENT_RECV_USERNAME,                       /*<! When Phone send username to ESP32, this event happen */
+    ESP_BLUFI_EVENT_RECV_CA_CERT,                        /*<! When Phone send CA certificate to ESP32, this event happen */
+    ESP_BLUFI_EVENT_RECV_CLIENT_CERT,                    /*<! When Phone send Client certificate to ESP32, this event happen */
+    ESP_BLUFI_EVENT_RECV_SERVER_CERT,                    /*<! When Phone send Server certificate to ESP32, this event happen */
+    ESP_BLUFI_EVENT_RECV_CLIENT_PRIV_KEY,                /*<! When Phone send Client Private key to ESP32, this event happen */
+    ESP_BLUFI_EVENT_RECV_SERVER_PRIV_KEY,                /*<! When Phone send Server Private key to ESP32, this event happen */
+    ESP_BLUFI_EVENT_RECV_SLAVE_DISCONNECT_BLE,           /*<! When Phone send Disconnect key to ESP32, this event happen */
+    ESP_BLUFI_EVENT_GET_WIFI_LIST,                       /*<! When Phone send get wifi list command to ESP32, this event happen */
+    ESP_BLUFI_EVENT_REPORT_ERROR,                        /*<! When Blufi report error, this event happen */
+    ESP_BLUFI_EVENT_RECV_CUSTOM_DATA,                    /*<! When Phone send custom data to ESP32, this event happen */
+} esp_blufi_cb_event_t;
+
+/// BLUFI config status
+typedef enum {
+    ESP_BLUFI_STA_CONN_SUCCESS = 0x00,
+    ESP_BLUFI_STA_CONN_FAIL    = 0x01,
+} esp_blufi_sta_conn_state_t;
+
+/// BLUFI init status
+typedef enum {
+    ESP_BLUFI_INIT_OK = 0,
+    ESP_BLUFI_INIT_FAILED,
+} esp_blufi_init_state_t;
+
+/// BLUFI deinit status
+typedef enum {
+    ESP_BLUFI_DEINIT_OK = 0,
+    ESP_BLUFI_DEINIT_FAILED,
+} esp_blufi_deinit_state_t;
+
+typedef enum {
+    ESP_BLUFI_SEQUENCE_ERROR = 0,
+    ESP_BLUFI_CHECKSUM_ERROR,
+    ESP_BLUFI_DECRYPT_ERROR,
+    ESP_BLUFI_ENCRYPT_ERROR,
+    ESP_BLUFI_INIT_SECURITY_ERROR,
+    ESP_BLUFI_DH_MALLOC_ERROR,
+    ESP_BLUFI_DH_PARAM_ERROR,
+    ESP_BLUFI_READ_PARAM_ERROR,
+    ESP_BLUFI_MAKE_PUBLIC_ERROR,
+    ESP_BLUFI_DATA_FORMAT_ERROR,
+} esp_blufi_error_state_t;
+
+/**
+ * @brief BLUFI  extra information structure
+ */
+typedef struct {
+    //station
+    uint8_t sta_bssid[6];           /*!< BSSID of station interface */
+    bool sta_bssid_set;             /*!< is BSSID of station interface set */
+    uint8_t *sta_ssid;              /*!< SSID of station interface */
+    int sta_ssid_len;               /*!< length of SSID of station interface */
+    uint8_t *sta_passwd;            /*!< password of station interface */
+    int sta_passwd_len;             /*!< length of password of station interface */
+    uint8_t *softap_ssid;           /*!< SSID of softap interface */
+    int softap_ssid_len;            /*!< length of SSID of softap interface */
+    uint8_t *softap_passwd;         /*!< password of station interface */
+    int softap_passwd_len;          /*!< length of password of station interface */
+    uint8_t softap_authmode;        /*!< authentication mode of softap interface */
+    bool softap_authmode_set;       /*!< is authentication mode of softap interface set */
+    uint8_t softap_max_conn_num;    /*!< max connection number of softap interface */
+    bool softap_max_conn_num_set;   /*!< is max connection number of softap interface set */
+    uint8_t softap_channel;         /*!< channel of softap interface */
+    bool softap_channel_set;        /*!< is channel of softap interface set */
+} esp_blufi_extra_info_t;
+
+/** @brief Description of an WiFi AP */
+typedef struct {
+    uint8_t ssid[33];                     /**< SSID of AP */
+    int8_t  rssi;                         /**< signal strength of AP */
+} esp_blufi_ap_record_t;
+
+/// Bluetooth address length
+#define ESP_BD_ADDR_LEN     6
+/// Bluetooth device address
+typedef uint8_t esp_bd_addr_t[ESP_BD_ADDR_LEN];
+
+/**
+ * @brief BLUFI callback parameters union
+ */
+typedef union {
+    /**
+	 * @brief ESP_BLUFI_EVENT_INIT_FINISH
+	 */
+    struct blufi_init_finish_evt_param {
+        esp_blufi_init_state_t state;				/*!< Initial status */
+    } init_finish;									/*!< Blufi callback param of ESP_BLUFI_EVENT_INIT_FINISH */
+
+    /**
+	 * @brief ESP_BLUFI_EVENT_DEINIT_FINISH
+	 */
+    struct blufi_deinit_finish_evt_param {
+        esp_blufi_deinit_state_t state;				/*!< De-initial status */
+    } deinit_finish;								/*!< Blufi callback param of ESP_BLUFI_EVENT_DEINIT_FINISH */
+
+    /**
+     * @brief ESP_BLUFI_EVENT_SET_WIFI_MODE
+     */
+    struct blufi_set_wifi_mode_evt_param {
+        wifi_mode_t op_mode;                        /*!< Wifi operation mode */
+    } wifi_mode;									/*!< Blufi callback param of ESP_BLUFI_EVENT_INIT_FINISH */
+
+    /**
+     * @brief ESP_BLUFI_EVENT_CONNECT
+	 */
+    struct blufi_connect_evt_param {
+        esp_bd_addr_t remote_bda;                   /*!< Blufi Remote bluetooth device address */
+        uint8_t    server_if;                       /*!< server interface */
+        uint16_t   conn_id;                         /*!< Connection id */
+    } connect;									    /*!< Blufi callback param of ESP_BLUFI_EVENT_CONNECT */
+
+    /**
+     * @brief ESP_BLUFI_EVENT_DISCONNECT
+	 */
+    struct blufi_disconnect_evt_param {
+        esp_bd_addr_t remote_bda;                   /*!< Blufi Remote bluetooth device address */
+    } disconnect;									/*!< Blufi callback param of ESP_BLUFI_EVENT_DISCONNECT */
+
+    /* ESP_BLUFI_EVENT_REQ_WIFI_CONNECT */          /* No callback param */
+    /* ESP_BLUFI_EVENT_REQ_WIFI_DISCONNECT */       /* No callback param */
+
+    /**
+     * @brief ESP_BLUFI_EVENT_RECV_STA_BSSID
+     */
+    struct blufi_recv_sta_bssid_evt_param {
+        uint8_t bssid[6];                           /*!< BSSID */
+    } sta_bssid;                                    /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_STA_BSSID */
+
+    /**
+     * @brief ESP_BLUFI_EVENT_RECV_STA_SSID
+     */
+    struct blufi_recv_sta_ssid_evt_param {
+        uint8_t *ssid;                              /*!< SSID */
+        int ssid_len;                               /*!< SSID length */
+    } sta_ssid;                                     /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_STA_SSID */
+
+    /**
+     * @brief
+     * ESP_BLUFI_EVENT_RECV_STA_PASSWD
+     */
+    struct blufi_recv_sta_passwd_evt_param {
+        uint8_t *passwd;                            /*!< Password */
+        int passwd_len;                             /*!< Password Length */
+    } sta_passwd;                                   /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_STA_PASSWD */
+
+    /**
+     * @brief ESP_BLUFI_EVENT_RECV_SOFTAP_SSID
+     */
+    struct blufi_recv_softap_ssid_evt_param {
+        uint8_t *ssid;                              /*!< SSID */
+        int ssid_len;                               /*!< SSID length */
+    } softap_ssid;                                  /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_SOFTAP_SSID */
+
+    /**
+     * @brief
+     * ESP_BLUFI_EVENT_RECV_SOFTAP_PASSWD
+     */
+    struct blufi_recv_softap_passwd_evt_param {
+        uint8_t *passwd;                            /*!< Password */
+        int passwd_len;                             /*!< Password Length */
+    } softap_passwd;                                /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_SOFTAP_PASSWD */
+
+    /**
+     * @brief ESP_BLUFI_EVENT_RECV_SOFTAP_MAX_CONN_NUM
+     */
+    struct blufi_recv_softap_max_conn_num_evt_param {
+        int max_conn_num;                           /*!< SSID */
+    } softap_max_conn_num;                          /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_SOFTAP_MAX_CONN_NUM */
+
+    /**
+     * @brief
+     * ESP_BLUFI_EVENT_RECV_SOFTAP_AUTH_MODE
+     */
+    struct blufi_recv_softap_auth_mode_evt_param {
+        wifi_auth_mode_t auth_mode;                 /*!< Authentication mode */
+    } softap_auth_mode;                             /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_SOFTAP_AUTH_MODE */
+
+    /**
+     * @brief
+     * ESP_BLUFI_EVENT_RECV_SOFTAP_CHANNEL
+     */
+    struct blufi_recv_softap_channel_evt_param {
+        uint8_t channel;                            /*!< Authentication mode */
+    } softap_channel;                             /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_SOFTAP_CHANNEL */
+
+    /**
+     * @brief ESP_BLUFI_EVENT_RECV_USERNAME
+     */
+    struct blufi_recv_username_evt_param {
+        uint8_t *name;                              /*!< Username point */
+        int name_len;                               /*!< Username length */
+    } username;                                     /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_USERNAME*/
+
+    /**
+     * @brief ESP_BLUFI_EVENT_RECV_CA_CERT
+     */
+    struct blufi_recv_ca_evt_param {
+        uint8_t *cert;                              /*!< CA certificate point */
+        int cert_len;                               /*!< CA certificate length */
+    } ca;                                           /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_CA_CERT */
+
+    /**
+     * ESP_BLUFI_EVENT_RECV_CLIENT_CERT
+     */
+    struct blufi_recv_client_cert_evt_param {
+        uint8_t *cert;                              /*!< Client certificate point */
+        int cert_len;                               /*!< Client certificate length */
+    } client_cert;                                  /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_CLIENT_CERT */
+
+    /**
+     * ESP_BLUFI_EVENT_RECV_SERVER_CERT
+     */
+    struct blufi_recv_server_cert_evt_param {
+        uint8_t *cert;                              /*!< Client certificate point */
+        int cert_len;                               /*!< Client certificate length */
+    } server_cert;                                  /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_SERVER_CERT */
+
+    /**
+     * ESP_BLUFI_EVENT_RECV_CLIENT_PRIV_KEY
+     */
+    struct blufi_recv_client_pkey_evt_param {
+        uint8_t *pkey;                              /*!< Client Private Key point, if Client certificate not contain Key */
+        int pkey_len;                               /*!< Client Private key length */
+    } client_pkey;                                  /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_CLIENT_PRIV_KEY */
+    /**
+     * ESP_BLUFI_EVENT_RECV_SERVER_PRIV_KEY
+     */
+    struct blufi_recv_server_pkey_evt_param {
+        uint8_t *pkey;                              /*!< Client Private Key point, if Client certificate not contain Key */
+        int pkey_len;                               /*!< Client Private key length */
+    } server_pkey;                                  /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_SERVER_PRIV_KEY */
+    /**
+     * @brief
+     * ESP_BLUFI_EVENT_REPORT_ERROR
+     */
+    struct blufi_get_error_evt_param {
+        esp_blufi_error_state_t state;              /*!< Blufi error state */
+    } report_error;                                 /*!< Blufi callback param of ESP_BLUFI_EVENT_REPORT_ERROR */
+    /**
+     * @brief
+     * ESP_BLUFI_EVENT_RECV_CUSTOM_DATA
+     */
+    struct blufi_recv_custom_data_evt_param {
+        uint8_t *data;                              /*!< Custom data */
+        uint32_t data_len;                          /*!< Custom data Length */
+    } custom_data;                                  /*!< Blufi callback param of ESP_BLUFI_EVENT_RECV_CUSTOM_DATA */
+} esp_blufi_cb_param_t;
+
+/**
+ * @brief BLUFI event callback function type
+ * @param event : Event type
+ * @param param : Point to callback parameter, currently is union type
+ */
+typedef void (* esp_blufi_event_cb_t)(esp_blufi_cb_event_t event, esp_blufi_cb_param_t *param);
+
+/* security function declare */
+
+/**
+ * @brief BLUFI negotiate data handler
+ * @param data : data from phone
+ * @param len  : length of data from phone
+ * @param output_data : data want to send to phone
+ * @param output_len : length of data want to send to phone
+ * @param need_free : output reporting if memory needs to be freed or not *
+ */
+typedef void (*esp_blufi_negotiate_data_handler_t)(uint8_t *data, int len, uint8_t **output_data, int *output_len, bool *need_free);
+
+/**
+ * @brief BLUFI  encrypt the data after negotiate a share key
+ * @param iv8  : initial vector(8bit), normally, blufi core will input packet sequence number
+ * @param crypt_data : plain text and encrypted data, the encrypt function must support autochthonous encrypt
+ * @param crypt_len  : length of plain text
+ * @return  Nonnegative number is encrypted length, if error, return negative number;
+ */
+typedef int (* esp_blufi_encrypt_func_t)(uint8_t iv8, uint8_t *crypt_data, int crypt_len);
+
+/**
+ * @brief BLUFI  decrypt the data after negotiate a share key
+ * @param iv8  : initial vector(8bit), normally, blufi core will input packet sequence number
+ * @param crypt_data : encrypted data and plain text, the encrypt function must support autochthonous decrypt
+ * @param crypt_len  : length of encrypted text
+ * @return  Nonnegative number is decrypted length, if error, return negative number;
+ */
+typedef int (* esp_blufi_decrypt_func_t)(uint8_t iv8, uint8_t *crypt_data, int crypt_len);
+
+/**
+ * @brief BLUFI  checksum
+ * @param iv8  : initial vector(8bit), normally, blufi core will input packet sequence number
+ * @param data : data need to checksum
+ * @param len  : length of data
+ */
+typedef uint16_t (*esp_blufi_checksum_func_t)(uint8_t iv8, uint8_t *data, int len);
+
+/**
+ * @brief BLUFI  callback functions type
+ */
+typedef struct {
+    esp_blufi_event_cb_t                event_cb;                   /*!< BLUFI event callback */
+    esp_blufi_negotiate_data_handler_t  negotiate_data_handler;     /*!< BLUFI negotiate data function for negotiate share key */
+    esp_blufi_encrypt_func_t            encrypt_func;               /*!< BLUFI encrypt data function with share key generated by negotiate_data_handler */
+    esp_blufi_decrypt_func_t            decrypt_func;               /*!< BLUFI decrypt data function with share key generated by negotiate_data_handler */
+    esp_blufi_checksum_func_t           checksum_func;              /*!< BLUFI check sum function (FCS) */
+} esp_blufi_callbacks_t;
+
+/**
+ *
+ * @brief           This function is called to receive blufi callback event
+ *
+ * @param[in]       callbacks: callback functions
+ *
+ * @return          ESP_OK - success, other - failed
+ *
+ */
+esp_err_t esp_blufi_register_callbacks(esp_blufi_callbacks_t *callbacks);
+
+/**
+ *
+ * @brief           This function is called to initialize blufi_profile
+ *
+ * @return          ESP_OK - success, other - failed
+ *
+ */
+esp_err_t esp_blufi_profile_init(void);
+
+/**
+ *
+ * @brief           This function is called to de-initialize blufi_profile
+ *
+ * @return          ESP_OK - success, other - failed
+ *
+ */
+esp_err_t esp_blufi_profile_deinit(void);
+
+/**
+ *
+ * @brief           This function is called to send wifi connection report
+ * @param opmode :  wifi opmode
+ * @param sta_conn_state   : station is already in connection or not
+ * @param softap_conn_num  : softap connection number
+ * @param extra_info       : extra information, such as sta_ssid, softap_ssid and etc.
+ *
+ * @return          ESP_OK - success, other - failed
+ *
+ */
+esp_err_t esp_blufi_send_wifi_conn_report(wifi_mode_t opmode, esp_blufi_sta_conn_state_t sta_conn_state, uint8_t softap_conn_num, esp_blufi_extra_info_t *extra_info);
+
+/**
+ *
+ * @brief           This function is called to send wifi list
+ * @param apCount :  wifi list count
+ * @param list   : wifi list
+ *
+ * @return          ESP_OK - success, other - failed
+ *
+ */
+esp_err_t esp_blufi_send_wifi_list(uint16_t apCount, esp_blufi_ap_record_t *list);
+
+/**
+ *
+ * @brief           Get BLUFI profile version
+ *
+ * @return          Most 8bit significant is Great version, Least 8bit is Sub version
+ *
+ */
+uint16_t esp_blufi_get_version(void);
+
+/**
+ *
+ * @brief           This function is called to send blufi error information
+ * @param state :  error state
+ *
+ * @return          ESP_OK - success, other - failed
+ *
+ */
+esp_err_t esp_blufi_send_error_info(esp_blufi_error_state_t state);
+/**
+ *
+ * @brief           This function is called to custom data
+ * @param data :  custom data value
+ * @param data_len :  the length of custom data
+ *
+ * @return          ESP_OK - success, other - failed
+ *
+ */
+esp_err_t esp_blufi_send_custom_data(uint8_t *data, uint32_t data_len);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLUFI_API_ */
diff --git a/tools/sdk/esp32s3/include/bt/common/btc/profile/esp/blufi/include/blufi_int.h b/tools/sdk/esp32s3/include/bt/common/btc/profile/esp/blufi/include/blufi_int.h
new file mode 100644
index 00000000000..996621e0488
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/btc/profile/esp/blufi/include/blufi_int.h
@@ -0,0 +1,202 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __BLUFI_INT_H__
+#define __BLUFI_INT_H__
+
+#include "btc/btc_task.h"
+#include "esp_blufi_api.h"
+#if (BLUFI_INCLUDED == TRUE)
+
+#define BTC_BLUFI_GREAT_VER   0x01  //Version + Subversion
+#define BTC_BLUFI_SUB_VER     0x02  //Version + Subversion
+#define BTC_BLUFI_VERSION     ((BTC_BLUFI_GREAT_VER<<8)|BTC_BLUFI_SUB_VER)  //Version + Subversion
+
+typedef UINT8 tGATT_IF;
+/* service engine control block */
+typedef struct {
+    /* Protocol reference */
+    tGATT_IF                gatt_if;
+    UINT8                   srvc_inst;
+    UINT16                  handle_srvc;
+    UINT16                  handle_char_p2e;
+    UINT16                  handle_char_e2p;
+    UINT16                  handle_descr_e2p;
+    UINT16                  conn_id;
+    BOOLEAN                 is_connected;
+    BD_ADDR                 remote_bda;
+    UINT32                  trans_id;
+    UINT8                   congest;
+    UINT16                  frag_size;
+#define BLUFI_PREPAIR_BUF_MAX_SIZE 1024
+    uint8_t                 *prepare_buf;
+    int                     prepare_len;
+    /* Control reference */
+    esp_blufi_callbacks_t   *cbs;
+    BOOLEAN                 enabled;
+    uint8_t                 send_seq;
+    uint8_t                 recv_seq;
+    uint8_t                 sec_mode;
+    uint8_t                 *aggr_buf;
+    uint16_t                 total_len;
+    uint16_t                offset;
+} tBLUFI_ENV;
+
+/* BLUFI protocol */
+struct blufi_hdr{
+    uint8_t type;
+    uint8_t fc;
+    uint8_t seq;
+    uint8_t data_len;
+    uint8_t data[0];
+};
+typedef struct blufi_hdr blufi_hd_t;
+
+struct blufi_frag_hdr {
+    uint8_t type;
+    uint8_t fc;
+    uint8_t seq;
+    uint8_t data_len;
+    uint16_t total_len;
+    uint8_t content[0];
+};
+typedef struct blufi_frag_hdr blufi_frag_hdr_t;
+
+#if GATT_DYNAMIC_MEMORY == FALSE
+extern tBLUFI_ENV blufi_env;
+#else
+extern tBLUFI_ENV *blufi_env_ptr;
+#define blufi_env (*blufi_env_ptr)
+#endif
+
+#define BLUFI_DATA_SEC_MODE_CHECK_MASK  0x01
+#define BLUFI_DATA_SEC_MODE_ENC_MASK    0x02
+#define BLUFI_CTRL_SEC_MODE_CHECK_MASK  0x10
+#define BLUFI_CTRL_SEC_MODE_ENC_MASK    0x20
+#define BLUFI_MAX_DATA_LEN              255
+
+// packet type
+#define BLUFI_TYPE_MASK         0x03
+#define BLUFI_TYPE_SHIFT        0
+#define BLUFI_SUBTYPE_MASK      0xFC
+#define BLUFI_SUBTYPE_SHIFT     2
+
+#define BLUFI_GET_TYPE(type)    ((type) & BLUFI_TYPE_MASK)
+#define BLUFI_GET_SUBTYPE(type) (((type) & BLUFI_SUBTYPE_MASK) >>BLUFI_SUBTYPE_SHIFT)
+#define BLUFI_BUILD_TYPE(type, subtype) (((type) & BLUFI_TYPE_MASK) | ((subtype)<<BLUFI_SUBTYPE_SHIFT))
+
+#define BLUFI_TYPE_CTRL                                 0x0
+#define BLUFI_TYPE_CTRL_SUBTYPE_ACK                     0x00
+#define BLUFI_TYPE_CTRL_SUBTYPE_SET_SEC_MODE            0x01
+#define BLUFI_TYPE_CTRL_SUBTYPE_SET_WIFI_OPMODE         0x02
+#define BLUFI_TYPE_CTRL_SUBTYPE_CONN_TO_AP              0x03
+#define BLUFI_TYPE_CTRL_SUBTYPE_DISCONN_FROM_AP         0x04
+#define BLUFI_TYPE_CTRL_SUBTYPE_GET_WIFI_STATUS         0x05
+#define BLUFI_TYPE_CTRL_SUBTYPE_DEAUTHENTICATE_STA      0x06
+#define BLUFI_TYPE_CTRL_SUBTYPE_GET_VERSION             0x07
+#define BLUFI_TYPE_CTRL_SUBTYPE_DISCONNECT_BLE          0x08
+#define BLUFI_TYPE_CTRL_SUBTYPE_GET_WIFI_LIST           0x09
+
+#define BLUFI_TYPE_DATA                                 0x1
+#define BLUFI_TYPE_DATA_SUBTYPE_NEG                     0x00
+#define BLUFI_TYPE_DATA_SUBTYPE_STA_BSSID               0x01
+#define BLUFI_TYPE_DATA_SUBTYPE_STA_SSID                0x02
+#define BLUFI_TYPE_DATA_SUBTYPE_STA_PASSWD              0x03
+#define BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_SSID             0x04
+#define BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_PASSWD           0x05
+#define BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_MAX_CONN_NUM     0x06
+#define BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_AUTH_MODE        0x07
+#define BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_CHANNEL          0x08
+#define BLUFI_TYPE_DATA_SUBTYPE_USERNAME                0x09
+#define BLUFI_TYPE_DATA_SUBTYPE_CA                      0x0a
+#define BLUFI_TYPE_DATA_SUBTYPE_CLIENT_CERT             0x0b
+#define BLUFI_TYPE_DATA_SUBTYPE_SERVER_CERT             0x0c
+#define BLUFI_TYPE_DATA_SUBTYPE_CLIENT_PRIV_KEY         0x0d
+#define BLUFI_TYPE_DATA_SUBTYPE_SERVER_PRIV_KEY         0x0e
+#define BLUFI_TYPE_DATA_SUBTYPE_WIFI_REP                0x0f
+#define BLUFI_TYPE_DATA_SUBTYPE_REPLY_VERSION           0x10
+#define BLUFI_TYPE_DATA_SUBTYPE_WIFI_LIST               0x11
+#define BLUFI_TYPE_DATA_SUBTYPE_ERROR_INFO              0x12
+#define BLUFI_TYPE_DATA_SUBTYPE_CUSTOM_DATA             0x13
+#define BLUFI_TYPE_IS_CTRL(type)        (BLUFI_GET_TYPE((type)) == BLUFI_TYPE_CTRL)
+#define BLUFI_TYPE_IS_DATA(type)        (BLUFI_GET_TYPE((type)) == BLUFI_TYPE_DATA)
+
+#define BLUFI_TYPE_IS_CTRL_ACK(type)                 (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_ACK)
+#define BLUFI_TYPE_IS_CTRL_START_NEG(type)           (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_START_NEG)
+#define BLUFI_TYPE_IS_CTRL_STOP_NEG(type)            (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_STOP_NEG)
+#define BLUFI_TYPE_IS_CTRL_SET_WIFI_OPMODE(type)     (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_SET_WIFI_OPMODE)
+#define BLUFI_TYPE_IS_CTRL_CONN_WIFI(type)           (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_CONN_TO_AP)
+#define BLUFI_TYPE_IS_CTRL_DISCONN_WIFI(type)        (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_DISCONN_FROM_AP)
+#define BLUFI_TYPE_IS_CTRL_GET_WIFI_STATUS(type)     (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_GET_WIFI_STATUS)
+#define BLUFI_TYPE_IS_CTRL_DEAUTHENTICATE_STA(type)  (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_DEAUTHENTICATE_STA)
+#define BLUFI_TYPE_IS_CTRL_GET_VERSION(type)         (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_GET_VERSION)
+
+#define BLUFI_TYPE_IS_DATA_NEG(type)                 (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_NEG)
+#define BLUFI_TYPE_IS_DATA_STA_BSSID(type)           (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_STA_BSSID)
+#define BLUFI_TYPE_IS_DATA_STA_SSID(type)            (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_STA_SSID)
+#define BLUFI_TYPE_IS_DATA_STA_PASSWD(type)          (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_STA_PASSWD)
+#define BLUFI_TYPE_IS_DATA_SOFTAP_SSID(type)         (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_SSID)
+#define BLUFI_TYPE_IS_DATA_SOFTAP_PASSWD(type)       (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_PASSWD)
+#define BLUFI_TYPE_IS_DATA_SOFTAP_MAX_CONN_NUM(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_MAX_CONN_NUM)
+#define BLUFI_TYPE_IS_DATA_SOFTAP_AUTH_MODE(type)    (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_AUTH_MODE)
+#define BLUFI_TYPE_IS_DATA_SOFTAP_CHANNEL(type)      (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_CHANNEL)
+#define BLUFI_TYPE_IS_DATA_USERNAME(type)            (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_USERNAME)
+#define BLUFI_TYPE_IS_DATA_CA(type)                  (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_CA)
+#define BLUFI_TYPE_IS_DATA_CLEINT_CERT(type)         (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_CLIENT_CERT)
+#define BLUFI_TYPE_IS_DATA_SERVER_CERT(type)         (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SERVER_CERT)
+#define BLUFI_TYPE_IS_DATA_CLIENT_PRIV_KEY(type)     (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_CLIENT_PRIV_KEY)
+#define BLUFI_TYPE_IS_DATA_SERVER_PRIV_KEY(type)     (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SERVER_PRIV_KEY)
+#define BLUFI_TYPE_IS_DATA_ERROR_INFO(type)          (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_ERROR_INFO)
+
+// packet frame control
+#define BLUFI_FC_ENC_MASK       0x01
+#define BLUFI_FC_CHECK_MASK     0x02
+#define BLUFI_FC_DIR_MASK       0x04
+#define BLUFI_FC_REQ_ACK_MASK   0x08
+#define BLUFI_FC_FRAG_MASK      0x10
+
+#define BLUFI_FC_ENC            0x01
+#define BLUFI_FC_CHECK          0x02
+#define BLUFI_FC_DIR_P2E        0x00
+#define BLUFI_FC_DIR_E2P        0x04
+#define BLUFI_FC_REQ_ACK        0x08
+#define BLUFI_FC_FRAG           0x10
+
+#define BLUFI_FC_IS_ENC(fc)       ((fc) & BLUFI_FC_ENC_MASK)
+#define BLUFI_FC_IS_CHECK(fc)     ((fc) & BLUFI_FC_CHECK_MASK)
+#define BLUFI_FC_IS_DIR_P2E(fc)   ((fc) & BLUFI_FC_DIR_P2E_MASK)
+#define BLUFI_FC_IS_DIR_E2P(fc)   (!((fc) & BLUFI_DIR_P2E_MASK))
+#define BLUFI_FC_IS_REQ_ACK(fc)   ((fc) & BLUFI_FC_REQ_ACK_MASK)
+#define BLUFI_FC_IS_FRAG(fc)      ((fc) & BLUFI_FC_FRAG_MASK)
+
+/* default GATT MTU size over LE link
+*/
+#define GATT_DEF_BLE_MTU_SIZE               23
+/* BLUFI HEADER + TOTAL(REMAIN) LENGTH + CRC + L2CAP RESERVED */
+#define BLUFI_MTU_RESERVED_SIZE     (sizeof(struct blufi_hdr) + 2 + 2 + 3)
+#define BLUFI_FRAG_DATA_DEFAULT_LEN (GATT_DEF_BLE_MTU_SIZE - BLUFI_MTU_RESERVED_SIZE)
+
+//function declare
+void btc_blufi_protocol_handler(uint8_t type, uint8_t *data, int len);
+
+void btc_blufi_send_encap(uint8_t type, uint8_t *data, int data_len);
+
+void btc_blufi_set_callbacks(esp_blufi_callbacks_t *callbacks);
+
+void btc_blufi_cb_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
+
+void btc_blufi_cb_deep_free(btc_msg_t *msg);
+
+#endif /* __BLUFI_INT_H__ */
+#endif  ///BLUFI_INCLUDED == TRUE
diff --git a/tools/sdk/esp32s3/include/bt/common/btc/profile/esp/blufi/include/esp_blufi.h b/tools/sdk/esp32s3/include/bt/common/btc/profile/esp/blufi/include/esp_blufi.h
new file mode 100644
index 00000000000..060a364d215
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/btc/profile/esp/blufi/include/esp_blufi.h
@@ -0,0 +1,77 @@
+#ifndef __ESP_BLUFI_H__
+#define __ESP_BLUFI_H__
+
+#include "esp_blufi_api.h"
+#include "esp_err.h"
+
+#ifdef CONFIG_BT_NIMBLE_ENABLED
+#include "nimble/ble.h"
+#include "modlog/modlog.h"
+#endif
+
+#ifdef CONFIG_BT_BLUEDROID_ENABLED
+#include "esp_gap_ble_api.h"
+#endif
+
+#define BLUFI_APP_UUID      0xFFFF
+#define BLUFI_DEVICE_NAME            "BLUFI_DEVICE"
+
+#ifdef CONFIG_BT_NIMBLE_ENABLED
+struct ble_hs_cfg;
+struct ble_gatt_register_ctxt;
+struct gatt_value {
+    struct os_mbuf *buf;
+    uint16_t val_handle;
+    uint8_t type;
+    void *ptr;
+};
+#define SERVER_MAX_VALUES       3
+#define MAX_VAL_SIZE            512
+extern struct gatt_value gatt_values[SERVER_MAX_VALUES];
+/* GATT server callback */
+void esp_blufi_gatt_svr_register_cb(struct ble_gatt_register_ctxt *ctxt, void *arg);
+
+/* Initialise gatt server */
+int esp_blufi_gatt_svr_init(void);
+void esp_blufi_btc_init(void);
+#endif
+
+#ifdef CONFIG_BT_BLUEDROID_ENABLED
+/**
+ * @brief           Close a connection  a remote device.
+ *
+ * @param[in]       gatts_if: GATT server access interface
+ * @param[in]       conn_id: connection ID to be closed.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_blufi_close(uint8_t gatts_if, uint16_t conn_id);
+void esp_blufi_gap_event_handler(esp_gap_ble_cb_event_t event, esp_ble_gap_cb_param_t *param);
+#endif
+
+/* Initialise blufi profile */
+uint8_t esp_blufi_init(void);
+
+/* start advertising */
+void bleprph_advertise(void);
+
+/* send notifications */
+void esp_blufi_send_notify(void *arg);
+
+/* Deinitialise blufi */
+void esp_blufi_deinit(void);
+/* disconnect */
+void esp_blufi_disconnect(void);
+
+/* Stop advertisement */
+void esp_blufi_adv_stop(void);
+
+/* Start advertisement */
+void esp_blufi_adv_start(void);
+
+void esp_blufi_send_encap(void *arg);
+
+#endif/* _ESP_BLUFI_ */
diff --git a/tools/sdk/esp32s3/include/bt/common/btc/profile/esp/include/btc_blufi_prf.h b/tools/sdk/esp32s3/include/bt/common/btc/profile/esp/include/btc_blufi_prf.h
new file mode 100644
index 00000000000..31bbc380d63
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/btc/profile/esp/include/btc_blufi_prf.h
@@ -0,0 +1,111 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __BTC_BLUFI_PRF_H__
+#define __BTC_BLUFI_PRF_H__
+
+#include "blufi_int.h"
+#include "btc/btc_task.h"
+#include "esp_blufi_api.h"
+#include "esp_err.h"
+
+#ifdef CONFIG_BT_BLUEDROID_ENABLED
+#include "stack/gatt_api.h"
+#define ESP_BLUFI_ERROR GATT_ERROR
+#define ESP_BLUFI_SUCCESS GATT_SUCCESS
+#else
+#define ESP_BLUFI_ERROR 0x85
+#define ESP_BLUFI_SUCCESS 0x00
+#endif
+
+#define BT_BD_ADDR_STR         "%02x:%02x:%02x:%02x:%02x:%02x"
+#define BT_BD_ADDR_HEX(addr)   addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]
+
+#define GATT_UUID_CHAR_CLIENT_CONFIG    0x2902      /*  Client Characteristic Configuration */
+//define the blufi serivce uuid
+#define BLUFI_SERVICE_UUID  0xFFFF
+//define the blufi Char uuid (PHONE to ESP32)
+#define BLUFI_CHAR_P2E_UUID 0xFF01
+//define the blufi Char uuid (ESP32 to PHONE)
+#define BLUFI_CHAR_E2P_UUID 0xFF02
+//define the blufi Descriptor uuid (ESP32 to PHONE)
+#define BLUFI_DESCR_E2P_UUID GATT_UUID_CHAR_CLIENT_CONFIG
+//define the blufi APP ID
+#define BLUFI_APP_UUID      0xFFFF
+
+#define BLUFI_HDL_NUM   6
+
+struct pkt_info{
+   uint8_t *pkt;
+   int pkt_len;
+};
+
+static  const  tBT_UUID blufi_srvc_uuid = {LEN_UUID_16, {BLUFI_SERVICE_UUID}};
+static  const  tBT_UUID blufi_char_uuid_p2e = {LEN_UUID_16, {BLUFI_CHAR_P2E_UUID}};
+static  const  tBT_UUID blufi_char_uuid_e2p = {LEN_UUID_16, {BLUFI_CHAR_E2P_UUID}};
+static  const  tBT_UUID blufi_descr_uuid_e2p = {LEN_UUID_16, {BLUFI_DESCR_E2P_UUID}};
+static  const  tBT_UUID blufi_app_uuid = {LEN_UUID_16, {BLUFI_APP_UUID}};
+
+typedef enum {
+    BTC_BLUFI_ACT_INIT = 0,
+    BTC_BLUFI_ACT_DEINIT,
+    BTC_BLUFI_ACT_SEND_CFG_REPORT,
+    BTC_BLUFI_ACT_SEND_WIFI_LIST,
+    BTC_BLUFI_ACT_SEND_ERR_INFO,
+    BTC_BLUFI_ACT_SEND_CUSTOM_DATA,
+} btc_blufi_act_t;
+
+typedef union {
+    struct blufi_cfg_report {
+        wifi_mode_t opmode;
+        esp_blufi_sta_conn_state_t sta_conn_state;
+        uint8_t softap_conn_num;
+        esp_blufi_extra_info_t *extra_info;
+        int extra_info_len;
+    } wifi_conn_report;
+    /*
+        BTC_BLUFI_ACT_SEND_WIFI_LIST
+    */
+    struct blufi_wifi_list {
+        uint16_t apCount;
+        esp_blufi_ap_record_t *list;
+    } wifi_list;
+    /*
+        BTC_BLUFI_ACT_SEND_ERR_INFO
+    */
+    struct blufi_error_infor {
+        esp_blufi_error_state_t state;
+    } blufi_err_infor;
+    /*
+        BTC_BLUFI_ACT_SEND_CUSTOM_DATA
+    */
+    struct blufi_custom_data {
+         uint8_t *data;
+         uint32_t data_len;
+    } custom_data;
+} btc_blufi_args_t;
+
+void btc_blufi_cb_to_app(esp_blufi_cb_event_t event, esp_blufi_cb_param_t *param);
+void btc_blufi_cb_handler(btc_msg_t *msg);
+void btc_blufi_call_handler(btc_msg_t *msg);
+void btc_blufi_set_callbacks(esp_blufi_callbacks_t *callbacks);
+
+void btc_blufi_recv_handler(uint8_t *data, int len);
+void btc_blufi_send_notify(uint8_t *pkt, int pkt_len);
+void btc_blufi_call_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
+void btc_blufi_call_deep_free(btc_msg_t *msg);
+
+uint16_t btc_blufi_get_version(void);
+
+#endif /* __BTC_BLUFI_PRF_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/alarm.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/alarm.h
new file mode 100644
index 00000000000..fe8344cdb9f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/alarm.h
@@ -0,0 +1,84 @@
+/******************************************************************************
+ *
+ *  Copyright (C) 2014 Google, Inc.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at:
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ ******************************************************************************/
+
+#ifndef _ALARM_H_
+#define _ALARM_H_
+
+#include <stdint.h>
+#include "esp_timer.h"
+
+typedef struct alarm_t osi_alarm_t;
+typedef uint64_t period_ms_t;
+typedef esp_timer_cb_t osi_alarm_callback_t;
+
+typedef enum {
+    OSI_ALARM_ERR_PASS = 0,
+    OSI_ALARM_ERR_FAIL = -1,
+    OSI_ALARM_ERR_INVALID_ARG = -2,
+    OSI_ALARM_ERR_INVALID_STATE = -3,
+} osi_alarm_err_t;
+
+#define ALARM_CBS_NUM   50
+#define ALARM_ID_BASE   1000
+
+int osi_alarm_create_mux(void);
+int osi_alarm_delete_mux(void);
+void osi_alarm_init(void);
+void osi_alarm_deinit(void);
+
+// Creates a new alarm object. The returned object must be freed by calling
+// |alarm_free|. Returns NULL on failure.
+osi_alarm_t *osi_alarm_new(const char *alarm_name, osi_alarm_callback_t callback, void *data, period_ms_t timer_expire);
+
+// Frees an alarm object created by |alarm_new|. |alarm| may be NULL. If the
+// alarm is pending, it will be cancelled. It is not safe to call |alarm_free|
+// from inside the callback of |alarm|.
+void osi_alarm_free(osi_alarm_t *alarm);
+
+// Sets an alarm to fire |cb| after the given |deadline|. Note that |deadline| is the
+// number of milliseconds relative to the current time. |data| is a context variable
+// for the callback and may be NULL. |cb| will be called back in the context of an
+// unspecified thread (i.e. it will not be called back in the same thread as the caller).
+// |alarm| and |cb| may not be NULL.
+osi_alarm_err_t osi_alarm_set(osi_alarm_t *alarm, period_ms_t timeout);
+
+// Sets an periodic alarm to fire |cb| each given |period|.
+osi_alarm_err_t osi_alarm_set_periodic(osi_alarm_t *alarm, period_ms_t period);
+
+// This function cancels the |alarm| if it was previously set. When this call
+// returns, the caller has a guarantee that the callback is not in progress and
+// will not be called if it hasn't already been called. This function is idempotent.
+// |alarm| may not be NULL.
+osi_alarm_err_t osi_alarm_cancel(osi_alarm_t *alarm);
+
+// Figure out how much time until next expiration.
+// Returns 0 if not armed. |alarm| may not be NULL.
+// only for oneshot alarm, not for periodic alarm
+// TODO: Remove this function once PM timers can be re-factored
+period_ms_t osi_alarm_get_remaining_ms(const osi_alarm_t *alarm);
+
+// Alarm-related state cleanup
+//void alarm_cleanup(void);
+
+uint32_t osi_time_get_os_boottime_ms(void);
+
+// This function returns whether the given |alarm| is active or not.
+// Return true if active, false otherwise.
+bool osi_alarm_is_active(osi_alarm_t *alarm);
+
+#endif /*_ALARM_H_*/
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/allocator.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/allocator.h
new file mode 100644
index 00000000000..579f2b2bb63
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/allocator.h
@@ -0,0 +1,145 @@
+/******************************************************************************
+ *
+ *  Copyright (C) 2014 Google, Inc.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at:
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ ******************************************************************************/
+
+#ifndef _ALLOCATOR_H_
+#define _ALLOCATOR_H_
+
+#include <stddef.h>
+#include <stdlib.h>
+#include "esp_heap_caps.h"
+
+char *osi_strdup(const char *str);
+
+void *osi_malloc_func(size_t size);
+void *osi_calloc_func(size_t size);
+void osi_free_func(void *ptr);
+
+#if HEAP_MEMORY_DEBUG
+
+void osi_mem_dbg_init(void);
+void osi_mem_dbg_record(void *p, int size, const char *func, int line);
+void osi_mem_dbg_clean(void *p, const char *func, int line);
+void osi_mem_dbg_show(void);
+uint32_t osi_mem_dbg_get_max_size(void);
+uint32_t osi_mem_dbg_get_current_size(void);
+void osi_men_dbg_set_section_start(uint8_t index);
+void osi_men_dbg_set_section_end(uint8_t index);
+uint32_t osi_mem_dbg_get_max_size_section(uint8_t index);
+
+#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
+#define osi_malloc(size)                                \
+({                                                      \
+    void *p;                                            \
+    p = heap_caps_malloc_prefer(size, 2,                \
+        MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM,           \
+        MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL);        \
+    osi_mem_dbg_record(p, size, __func__, __LINE__);    \
+    (void *)p;                                          \
+})
+
+#define osi_calloc(size)                                \
+({                                                      \
+    void *p;                                            \
+    p = heap_caps_calloc_prefer(1, size, 2,             \
+        MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM,           \
+        MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL);        \
+    osi_mem_dbg_record(p, size, __func__, __LINE__);    \
+    (void *)p;                                          \
+})
+
+#else
+
+#define osi_malloc(size)                                \
+({                                                      \
+    void *p;                                            \
+    p = malloc((size));                                 \
+    osi_mem_dbg_record(p, size, __func__, __LINE__);    \
+    (void *)p;                                          \
+})
+
+#define osi_calloc(size)                                \
+({                                                      \
+    void *p;                                            \
+    p = calloc(1, (size));                              \
+    osi_mem_dbg_record(p, size, __func__, __LINE__);    \
+    (void *)p;                                          \
+})
+
+#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
+
+
+#if 0
+#define osi_malloc(size)                                \
+do {                                                    \
+    void *p;                                            \
+                                                        \
+#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST              \
+    p = heap_caps_malloc_prefer(size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL); \
+#else                                                   \
+    p = malloc((size));                                 \
+#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */ \
+    osi_mem_dbg_record(p, size, __func__, __LINE__);    \
+    (void *)p;                                          \
+}while(0)
+
+#define osi_calloc(size)                                \
+do {                                                    \
+    void *p;                                            \
+                                                        \
+#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST              \
+        p = heap_caps_calloc_prefer(1, size, 2,         \
+            MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM,       \
+            MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL);    \
+#else                                                   \
+    p = calloc(1, (size));                              \
+#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */ \
+    osi_mem_dbg_record(p, size, __func__, __LINE__);    \
+    (void *)p;                                          \
+} while(0)
+#endif
+
+#define osi_free(ptr)                                   \
+do {                                                    \
+    void *tmp_point = (void *)(ptr);                    \
+    osi_mem_dbg_clean(tmp_point, __func__, __LINE__);   \
+    free(tmp_point);                                    \
+} while (0)
+
+#else
+
+#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
+#define osi_malloc(size)                  heap_caps_malloc_prefer(size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
+#define osi_calloc(size)                  heap_caps_calloc_prefer(1, size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
+#else
+#define osi_malloc(size)                  malloc((size))
+#define osi_calloc(size)                  calloc(1, (size))
+#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
+#define osi_free(p)                       free((p))
+
+#endif /* HEAP_MEMORY_DEBUG */
+
+#define FREE_AND_RESET(a)   \
+do {                        \
+    if (a) {                \
+        osi_free(a);        \
+        a = NULL;           \
+    }                       \
+}while (0)
+
+
+#endif /* _ALLOCATOR_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/buffer.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/buffer.h
new file mode 100644
index 00000000000..fd1b2fa3732
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/buffer.h
@@ -0,0 +1,59 @@
+/******************************************************************************
+ *
+ *  Copyright (C) 2014 Google, Inc.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at:
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ ******************************************************************************/
+
+#ifndef _BUFFER_H_
+#define _BUFFER_H_
+
+#include <stdbool.h>
+#include <stddef.h>
+
+typedef struct buffer_t buffer_t;
+
+// Returns a new buffer of |size| bytes. Returns NULL if a buffer could not be
+// allocated. |size| must be non-zero. The caller must release this buffer with
+// |buffer_free|.
+buffer_t *buffer_new(size_t size);
+
+// Creates a new reference to the buffer |buf|. A reference is indistinguishable
+// from the original: writes to the original will be reflected in the reference
+// and vice versa. In other words, this function creates an alias to |buf|. The
+// caller must release the returned buffer with |buffer_free|. Note that releasing
+// the returned buffer does not release |buf|. |buf| must not be NULL.
+buffer_t *buffer_new_ref(const buffer_t *buf);
+
+// Creates a new reference to the last |slice_size| bytes of |buf|. See
+// |buffer_new_ref| for a description of references. |slice_size| must be
+// greater than 0 and may be at most |buffer_length|
+// (0 < slice_size <= buffer_length). |buf| must not be NULL.
+buffer_t *buffer_new_slice(const buffer_t *buf, size_t slice_size);
+
+// Frees a buffer object. |buf| may be NULL.
+void buffer_free(buffer_t *buf);
+
+// Returns a pointer to a writeable memory region for |buf|. All references
+// and slices that share overlapping bytes will also be written to when
+// writing to the returned pointer. The caller may safely write up to
+// |buffer_length| consecutive bytes starting at the address returned by
+// this function. |buf| must not be NULL.
+void *buffer_ptr(const buffer_t *buf);
+
+// Returns the length of the writeable memory region referred to by |buf|.
+// |buf| must not be NULL.
+size_t buffer_length(const buffer_t *buf);
+
+#endif /*_BUFFER_H_*/
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/config.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/config.h
new file mode 100644
index 00000000000..c1a2f3d5d67
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/config.h
@@ -0,0 +1,148 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __CONFIG_H__
+#define __CONFIG_H__
+
+// This module implements a configuration parser. Clients can query the
+// contents of a configuration file through the interface provided here.
+// The current implementation is read-only; mutations are only kept in
+// memory. This parser supports the INI file format.
+
+// Implementation notes:
+// - Key/value pairs that are not within a section are assumed to be under
+//   the |CONFIG_DEFAULT_SECTION| section.
+// - Multiple sections with the same name will be merged as if they were in
+//   a single section.
+// - Empty sections with no key/value pairs will be treated as if they do
+//   not exist. In other words, |config_has_section| will return false for
+//   empty sections.
+// - Duplicate keys in a section will overwrite previous values.
+// - All strings are case sensitive.
+
+#include <stdbool.h>
+
+// The default section name to use if a key/value pair is not defined within
+// a section.
+#define CONFIG_DEFAULT_SECTION "Global"
+
+typedef struct config_t config_t;
+typedef struct config_section_node_t config_section_node_t;
+
+// Creates a new config object with no entries (i.e. not backed by a file).
+// This function returns a config object or NULL on error. Clients must call
+// |config_free| on the returned handle when it is no longer required.
+config_t *config_new_empty(void);
+
+// Loads the specified file and returns a handle to the config file. If there
+// was a problem loading the file or allocating memory, this function returns
+// NULL. Clients must call |config_free| on the returned handle when it is no
+// longer required. |filename| must not be NULL and must point to a readable
+// file on the filesystem.
+config_t *config_new(const char *filename);
+
+// Frees resources associated with the config file. No further operations may
+// be performed on the |config| object after calling this function. |config|
+// may be NULL.
+void config_free(config_t *config);
+
+// Returns true if the config file contains a section named |section|. If
+// the section has no key/value pairs in it, this function will return false.
+// |config| and |section| must not be NULL.
+bool config_has_section(const config_t *config, const char *section);
+
+// Returns true if the config file has a key named |key| under |section|.
+// Returns false otherwise. |config|, |section|, and |key| must not be NULL.
+bool config_has_key(const config_t *config, const char *section, const char *key);
+
+// Returns true if the config file has a key named |key| and the key_value.
+// Returns false otherwise. |config|, |key|, and |key_value| must not be NULL.
+bool config_has_key_in_section(config_t *config, const char *key, char *key_value);
+
+// Returns the integral value for a given |key| in |section|. If |section|
+// or |key| do not exist, or the value cannot be fully converted to an integer,
+// this function returns |def_value|. |config|, |section|, and |key| must not
+// be NULL.
+int config_get_int(const config_t *config, const char *section, const char *key, int def_value);
+
+// Returns the boolean value for a given |key| in |section|. If |section|
+// or |key| do not exist, or the value cannot be converted to a boolean, this
+// function returns |def_value|. |config|, |section|, and |key| must not be NULL.
+bool config_get_bool(const config_t *config, const char *section, const char *key, bool def_value);
+
+// Returns the string value for a given |key| in |section|. If |section| or
+// |key| do not exist, this function returns |def_value|. The returned string
+// is owned by the config module and must not be freed. |config|, |section|,
+// and |key| must not be NULL. |def_value| may be NULL.
+const char *config_get_string(const config_t *config, const char *section, const char *key, const char *def_value);
+
+// Sets an integral value for the |key| in |section|. If |key| or |section| do
+// not already exist, this function creates them. |config|, |section|, and |key|
+// must not be NULL.
+void config_set_int(config_t *config, const char *section, const char *key, int value);
+
+// Sets a boolean value for the |key| in |section|. If |key| or |section| do
+// not already exist, this function creates them. |config|, |section|, and |key|
+// must not be NULL.
+void config_set_bool(config_t *config, const char *section, const char *key, bool value);
+
+// Sets a string value for the |key| in |section|. If |key| or |section| do
+// not already exist, this function creates them. |config|, |section|, |key|, and
+// |value| must not be NULL.
+void config_set_string(config_t *config, const char *section, const char *key, const char *value, bool insert_back);
+
+// Removes |section| from the |config| (and, as a result, all keys in the section).
+// Returns true if |section| was found and removed from |config|, false otherwise.
+// Neither |config| nor |section| may be NULL.
+bool config_remove_section(config_t *config, const char *section);
+
+// Removes one specific |key| residing in |section| of the |config|. Returns true
+// if the section and key were found and the key was removed, false otherwise.
+// None of |config|, |section|, or |key| may be NULL.
+bool config_remove_key(config_t *config, const char *section, const char *key);
+
+// Returns an iterator to the first section in the config file. If there are no
+// sections, the iterator will equal the return value of |config_section_end|.
+// The returned pointer must be treated as an opaque handle and must not be freed.
+// The iterator is invalidated on any config mutating operation. |config| may not
+// be NULL.
+const config_section_node_t *config_section_begin(const config_t *config);
+
+// Returns an iterator to one past the last section in the config file. It does not
+// represent a valid section, but can be used to determine if all sections have been
+// iterated over. The returned pointer must be treated as an opaque handle and must
+// not be freed and must not be iterated on (must not call |config_section_next| on
+// it). |config| may not be NULL.
+const config_section_node_t *config_section_end(const config_t *config);
+
+// Moves |iter| to the next section. If there are no more sections, |iter| will
+// equal the value of |config_section_end|. |iter| may not be NULL and must be
+// a pointer returned by either |config_section_begin| or |config_section_next|.
+const config_section_node_t *config_section_next(const config_section_node_t *iter);
+
+// Returns the name of the section referred to by |iter|. The returned pointer is
+// owned by the config module and must not be freed by the caller. The pointer will
+// remain valid until |config_free| is called. |iter| may not be NULL and must not
+// equal the value returned by |config_section_end|.
+const char *config_section_name(const config_section_node_t *iter);
+
+// Saves |config| to a file given by |filename|. Note that this could be a destructive
+// operation: if |filename| already exists, it will be overwritten. The config
+// module does not preserve comments or formatting so if a config file was opened
+// with |config_new| and subsequently overwritten with |config_save|, all comments
+// and special formatting in the original file will be lost. Neither |config| nor
+// |filename| may be NULL.
+bool config_save(const config_t *config, const char *filename);
+
+#endif /* #ifndef __CONFIG_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/fixed_queue.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/fixed_queue.h
new file mode 100644
index 00000000000..a25e60393c8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/fixed_queue.h
@@ -0,0 +1,125 @@
+/******************************************************************************
+ *
+ *  Copyright (C) 2014 Google, Inc.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at:
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ ******************************************************************************/
+
+#ifndef _FIXED_QUEUE_H_
+#define _FIXED_QUEUE_H_
+
+#include <stdbool.h>
+#include "osi/list.h"
+#include "osi/semaphore.h"
+
+#ifndef QUEUE_SIZE_MAX
+#define QUEUE_SIZE_MAX                    254
+#endif
+
+#define FIXED_QUEUE_MAX_TIMEOUT           OSI_SEM_MAX_TIMEOUT
+
+struct fixed_queue_t;
+
+typedef struct fixed_queue_t fixed_queue_t;
+//typedef struct reactor_t reactor_t;
+
+typedef void (*fixed_queue_free_cb)(void *data);
+typedef void (*fixed_queue_cb)(fixed_queue_t *queue);
+
+// Creates a new fixed queue with the given |capacity|. If more elements than
+// |capacity| are added to the queue, the caller is blocked until space is
+// made available in the queue. Returns NULL on failure. The caller must free
+// the returned queue with |fixed_queue_free|.
+fixed_queue_t *fixed_queue_new(size_t capacity);
+
+// Freeing a queue that is currently in use (i.e. has waiters
+// blocked on it) results in undefined behaviour.
+void fixed_queue_free(fixed_queue_t *queue, fixed_queue_free_cb free_cb);
+
+// Returns a value indicating whether the given |queue| is empty. If |queue|
+// is NULL, the return value is true.
+bool fixed_queue_is_empty(fixed_queue_t *queue);
+
+// Returns the length of the |queue|. If |queue| is NULL, the return value
+// is 0.
+size_t fixed_queue_length(fixed_queue_t *queue);
+
+// Returns the maximum number of elements this queue may hold. |queue| may
+// not be NULL.
+size_t fixed_queue_capacity(fixed_queue_t *queue);
+
+// Enqueues the given |data| into the |queue|. The caller will be blocked or immediately return or wait for timeout according to the parameter timeout.
+// If enqueue failed, it will return false, otherwise return true
+bool fixed_queue_enqueue(fixed_queue_t *queue, void *data, uint32_t timeout);
+
+// Dequeues the next element from |queue|. If the queue is currently empty,
+// this function will block the caller until an item is enqueued or immediately return or wait for timeout according to the parameter timeout.
+// If dequeue failed, it will return NULL, otherwise return a point.
+void *fixed_queue_dequeue(fixed_queue_t *queue, uint32_t timeout);
+
+// Returns the first element from |queue|, if present, without dequeuing it.
+// This function will never block the caller. Returns NULL if there are no
+// elements in the queue or |queue| is NULL.
+void *fixed_queue_try_peek_first(fixed_queue_t *queue);
+
+// Returns the last element from |queue|, if present, without dequeuing it.
+// This function will never block the caller. Returns NULL if there are no
+// elements in the queue or |queue| is NULL.
+void *fixed_queue_try_peek_last(fixed_queue_t *queue);
+
+// Tries to remove a |data| element from the middle of the |queue|. This
+// function will never block the caller. If the queue is empty or NULL, this
+// function returns NULL immediately. |data| may not be NULL. If the |data|
+// element is found in the queue, a pointer to the removed data is returned,
+// otherwise NULL.
+void *fixed_queue_try_remove_from_queue(fixed_queue_t *queue, void *data);
+
+// Returns the iterateable list with all entries in the |queue|. This function
+// will never block the caller. |queue| may not be NULL.
+//
+// NOTE: The return result of this function is not thread safe: the list could
+// be modified by another thread, and the result would be unpredictable.
+// TODO: The usage of this function should be refactored, and the function
+// itself should be removed.
+list_t *fixed_queue_get_list(fixed_queue_t *queue);
+
+// This function returns a valid file descriptor. Callers may perform one
+// operation on the fd: select(2). If |select| indicates that the file
+// descriptor is readable, the caller may call |fixed_queue_enqueue| without
+// blocking. The caller must not close the returned file descriptor. |queue|
+// may not be NULL.
+//int fixed_queue_get_enqueue_fd(const fixed_queue_t *queue);
+
+// This function returns a valid file descriptor. Callers may perform one
+// operation on the fd: select(2). If |select| indicates that the file
+// descriptor is readable, the caller may call |fixed_queue_dequeue| without
+// blocking. The caller must not close the returned file descriptor. |queue|
+// may not be NULL.
+//int fixed_queue_get_dequeue_fd(const fixed_queue_t *queue);
+
+// Registers |queue| with |reactor| for dequeue operations. When there is an element
+// in the queue, ready_cb will be called. The |context| parameter is passed, untouched,
+// to the callback routine. Neither |queue|, nor |reactor|, nor |read_cb| may be NULL.
+// |context| may be NULL.
+void fixed_queue_register_dequeue(fixed_queue_t *queue, fixed_queue_cb ready_cb);
+
+// Unregisters the dequeue ready callback for |queue| from whichever reactor
+// it is registered with, if any. This function is idempotent.
+void fixed_queue_unregister_dequeue(fixed_queue_t *queue);
+
+void fixed_queue_process(fixed_queue_t *queue);
+
+list_t *fixed_queue_get_list(fixed_queue_t *queue);
+
+#endif
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/future.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/future.h
new file mode 100644
index 00000000000..9d1cb521dfb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/future.h
@@ -0,0 +1,53 @@
+/******************************************************************************
+ *
+ *  Copyright (C) 2014 Google, Inc.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at:
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ ******************************************************************************/
+
+#ifndef __FUTURE_H__
+#define __FUTURE_H__
+
+#include "osi/semaphore.h"
+
+struct future {
+    bool ready_can_be_called;
+    osi_sem_t semaphore; // NULL semaphore means immediate future
+    void *result;
+};
+typedef struct future future_t;
+
+#define FUTURE_SUCCESS ((void *)1)
+#define FUTURE_FAIL ((void *)0)
+
+// Constructs a new future_t object. Returns NULL on failure.
+future_t *future_new(void);
+
+// Constructs a new future_t object with an immediate |value|. No waiting will
+// occur in the call to |future_await| because the value is already present.
+// Returns NULL on failure.
+future_t *future_new_immediate(void *value);
+
+// Signals that the |future| is ready, passing |value| back to the context
+// waiting for the result. Must only be called once for every future.
+// |future| may not be NULL.
+void future_ready(future_t *future, void *value);
+
+// Waits for the |future| to be ready. Returns the value set in |future_ready|.
+// Frees the future before return. |future| may not be NULL.
+void *future_await(future_t *async_result);
+
+//Free the future if this "future" is not used
+void future_free(future_t *future);
+#endif /* __FUTURE_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/hash_functions.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/hash_functions.h
new file mode 100644
index 00000000000..8102a0c14d3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/hash_functions.h
@@ -0,0 +1,37 @@
+/******************************************************************************
+ *
+ *  Copyright (C) 2014 Google, Inc.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at:
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ ******************************************************************************/
+
+#ifndef _HASH_FUNCTIONS_H_
+#define _HASH_FUNCTIONS_H_
+
+#include "osi/hash_map.h"
+
+typedef unsigned char hash_key_t[4];
+
+hash_index_t hash_function_naive(const void *key);
+
+hash_index_t hash_function_integer(const void *key);
+
+// Hashes a pointer based only on its address value
+hash_index_t hash_function_pointer(const void *key);
+
+hash_index_t hash_function_string(const void *key);
+
+void hash_function_blob(const unsigned char *s, unsigned int len, hash_key_t h);
+
+#endif /* _HASH_FUNCTIONS_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/hash_map.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/hash_map.h
new file mode 100644
index 00000000000..fea1e0212c5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/hash_map.h
@@ -0,0 +1,110 @@
+/******************************************************************************
+ *
+ *  Copyright (C) 2014 Google, Inc.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at:
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ ******************************************************************************/
+
+#ifndef _HASH_MAP_H_
+#define _HASH_MAP_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+
+struct hash_map_t;
+typedef struct hash_map_t hash_map_t;
+
+typedef struct hash_map_entry_t {
+    const void *key;
+    void *data;
+    const hash_map_t *hash_map;
+} hash_map_entry_t;
+
+typedef size_t hash_index_t;
+
+// Takes a key structure and returns a hash value.
+typedef hash_index_t (*hash_index_fn)(const void *key);
+typedef bool (*hash_map_iter_cb)(hash_map_entry_t *hash_entry, void *context);
+
+typedef bool (*key_equality_fn)(const void *x, const void *y);
+
+typedef void (*key_free_fn)(void *data);
+typedef void (*data_free_fn)(void *data);
+
+// Returns a new, empty hash_map. Returns NULL if not enough memory could be allocated
+// for the hash_map structure. The returned hash_map must be freed with |hash_map_free|.
+// The |num_bucket| specifies the number of hashable buckets for the map and must not
+// be zero.  The |hash_fn| specifies a hash function to be used and must not be NULL.
+// The |key_fn| and |data_fn| are called whenever a hash_map element is removed from
+// the hash_map. They can be used to release resources held by the hash_map element,
+// e.g.  memory or file descriptor.  |key_fn| and |data_fn| may be NULL if no cleanup
+// is necessary on element removal. |equality_fn| is used to check for key equality.
+// If |equality_fn| is NULL, default pointer equality is used.
+hash_map_t *hash_map_new(
+    size_t size,
+    hash_index_fn hash_fn,
+    key_free_fn key_fn,
+    data_free_fn data_fn,
+    key_equality_fn equality_fn);
+
+// Frees the hash_map. This function accepts NULL as an argument, in which case it
+// behaves like a no-op.
+void hash_map_free(hash_map_t *hash_map);
+
+// Returns true if the hash_map is empty (has no elements), false otherwise.
+// Note that a NULL |hash_map| is not the same as an empty |hash_map|. This function
+// does not accept a NULL |hash_map|.
+//bool hash_map_is_empty(const hash_map_t *hash_map);
+
+// Returns the number of elements in the hash map.  This function does not accept a
+// NULL |hash_map|.
+//size_t hash_map_size(const hash_map_t *hash_map);
+
+// Returns the number of buckets in the hash map.  This function does not accept a
+// NULL |hash_map|.
+//size_t hash_map_num_buckets(const hash_map_t *hash_map);
+
+// Returns true if the hash_map has a valid entry for the presented key.
+// This function does not accept a NULL |hash_map|.
+bool hash_map_has_key(const hash_map_t *hash_map, const void *key);
+
+// Returns the element indexed by |key| in the hash_map without removing it. |hash_map|
+// may not be NULL.  Returns NULL if no entry indexed by |key|.
+void *hash_map_get(const hash_map_t *hash_map, const void *key);
+
+// Sets the value |data| indexed by |key| into the |hash_map|. Neither |data| nor
+// |hash_map| may be NULL.  This function does not make copies of |data| nor |key|
+// so the pointers must remain valid at least until the element is removed from the
+// hash_map or the hash_map is freed.  Returns true if |data| could be set, false
+// otherwise (e.g. out of memory).
+bool hash_map_set(hash_map_t *hash_map, const void *key, void *data);
+
+// Removes data indexed by |key| from the hash_map. |hash_map| may not be NULL.
+// If |key_fn| or |data_fn| functions were specified in |hash_map_new|, they
+// will be called back with |key| or |data| respectively. This function returns true
+// if |key| was found in the hash_map and removed, false otherwise.
+bool hash_map_erase(hash_map_t *hash_map, const void *key);
+
+// Removes all elements in the hash_map. Calling this function will return the hash_map
+// to the same state it was in after |hash_map_new|. |hash_map| may not be NULL.
+void hash_map_clear(hash_map_t *hash_map);
+
+// Iterates through the entire |hash_map| and calls |callback| for each data
+// element and passes through the |context| argument. If the hash_map is
+// empty, |callback| will never be called. It is not safe to mutate the
+// hash_map inside the callback. Neither |hash_map| nor |callback| may be NULL.
+// If |callback| returns false, the iteration loop will immediately exit.
+void hash_map_foreach(hash_map_t *hash_map, hash_map_iter_cb callback, void *context);
+
+#endif /* _HASH_MAP_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/list.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/list.h
new file mode 100644
index 00000000000..f066a1f2ce7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/list.h
@@ -0,0 +1,121 @@
+#ifndef _LIST_H_
+#define _LIST_H_
+
+#include <stdbool.h>
+#include <stddef.h>
+struct list_node_t;
+typedef struct list_node_t list_node_t;
+
+struct list_t;
+typedef struct list_t list_t;
+
+typedef void (*list_free_cb)(void *data);
+typedef bool (*list_iter_cb)(void *data, void *context);
+
+// Returns a new, empty list. Returns NULL if not enough memory could be allocated
+// for the list structure. The returned list must be freed with |list_free|. The
+// |callback| specifies a function to be called whenever a list element is removed
+// from the list. It can be used to release resources held by the list element, e.g.
+// memory or file descriptor. |callback| may be NULL if no cleanup is necessary on
+// element removal.
+list_t *list_new(list_free_cb callback);
+
+
+list_node_t *list_free_node(list_t *list, list_node_t *node);
+
+// similar with list_free_node, this function doesn't free the node data
+list_node_t *list_delete_node(list_t *list, list_node_t *node);
+
+// Frees the list. This function accepts NULL as an argument, in which case it
+// behaves like a no-op.
+void list_free(list_t *list);
+
+// Returns true if |list| is empty (has no elements), false otherwise.
+// |list| may not be NULL.
+bool list_is_empty(const list_t *list);
+
+// Returns true if the list contains |data|, false otherwise.
+// |list| may not be NULL.
+bool list_contains(const list_t *list, const void *data);
+
+// Returns list_node which contains |data|, NULL otherwise.
+// |list| may not be NULL.
+list_node_t *list_get_node(const list_t *list, const void *data);
+
+// Returns the length of the |list|. |list| may not be NULL.
+size_t list_length(const list_t *list);
+
+// Returns the first element in the list without removing it. |list| may not
+// be NULL or empty.
+void *list_front(const list_t *list);
+
+// Returns the last element in the list without removing it. |list| may not
+// be NULL or empty.
+void *list_back(const list_t *list);
+list_node_t *list_back_node(const list_t *list);
+
+// Inserts |data| after |prev_node| in |list|. |data|, |list|, and |prev_node|
+// may not be NULL. This function does not make a copy of |data| so the pointer
+// must remain valid at least until the element is removed from the list or the
+// list is freed. Returns true if |data| could be inserted, false otherwise
+// (e.g. out of memory).
+bool list_insert_after(list_t *list, list_node_t *prev_node, void *data);
+
+// Inserts |data| at the beginning of |list|. Neither |data| nor |list| may be NULL.
+// This function does not make a copy of |data| so the pointer must remain valid
+// at least until the element is removed from the list or the list is freed.
+// Returns true if |data| could be inserted, false otherwise (e.g. out of memory).
+bool list_prepend(list_t *list, void *data);
+
+// Inserts |data| at the end of |list|. Neither |data| nor |list| may be NULL.
+// This function does not make a copy of |data| so the pointer must remain valid
+// at least until the element is removed from the list or the list is freed.
+// Returns true if |data| could be inserted, false otherwise (e.g. out of memory).
+bool list_append(list_t *list, void *data);
+
+// Removes |data| from the list. Neither |list| nor |data| may be NULL. If |data|
+// is inserted multiple times in the list, this function will only remove the first
+// instance. If a free function was specified in |list_new|, it will be called back
+// with |data|. This function returns true if |data| was found in the list and removed,
+// false otherwise.
+//list_node_t list_remove_node(list_t *list, list_node_t *prev_node, list_node_t *node);
+//list_node_t list_insert_node(list_t *list, list_node_t *prev_node, list_node_t *node);
+
+bool list_remove(list_t *list, void *data);
+
+// similar with list_remove, but do not free the node data
+bool list_delete(list_t *list, void *data);
+
+// Removes all elements in the list. Calling this function will return the list to the
+// same state it was in after |list_new|. |list| may not be NULL.
+void list_clear(list_t *list);
+
+// Iterates through the entire |list| and calls |callback| for each data element.
+// If the list is empty, |callback| will never be called. It is safe to mutate the
+// list inside the callback. If an element is added before the node being visited,
+// there will be no callback for the newly-inserted node. Neither |list| nor
+// |callback| may be NULL.
+list_node_t *list_foreach(const list_t *list, list_iter_cb callback, void *context);
+
+// Returns an iterator to the first element in |list|. |list| may not be NULL.
+// The returned iterator is valid as long as it does not equal the value returned
+// by |list_end|.
+list_node_t *list_begin(const list_t *list);
+
+// Returns an iterator that points past the end of the list. In other words,
+// this function returns the value of an invalid iterator for the given list.
+// When an iterator has the same value as what's returned by this function, you
+// may no longer call |list_next| with the iterator. |list| may not be NULL.
+list_node_t *list_end(const list_t *list);
+
+// Given a valid iterator |node|, this function returns the next value for the
+// iterator. If the returned value equals the value returned by |list_end|, the
+// iterator has reached the end of the list and may no longer be used for any
+// purpose.
+list_node_t *list_next(const list_node_t *node);
+
+// Returns the value stored at the location pointed to by the iterator |node|.
+// |node| must not equal the value returned by |list_end|.
+void *list_node(const list_node_t *node);
+
+#endif /* _LIST_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/mutex.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/mutex.h
new file mode 100644
index 00000000000..2055b2c10fe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/mutex.h
@@ -0,0 +1,52 @@
+/******************************************************************************
+ *
+ *  Copyright (C) 2015 Google, Inc.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at:
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ ******************************************************************************/
+
+#ifndef __MUTEX_H__
+#define __MUTEX_H__
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "freertos/semphr.h"
+#include "osi/semaphore.h"
+
+#define OSI_MUTEX_MAX_TIMEOUT OSI_SEM_MAX_TIMEOUT
+
+#define osi_mutex_valid( x ) ( ( ( *x ) == NULL) ? pdFALSE : pdTRUE )
+#define osi_mutex_set_invalid( x ) ( ( *x ) = NULL )
+
+typedef xSemaphoreHandle osi_mutex_t;
+
+int osi_mutex_new(osi_mutex_t *mutex);
+
+int osi_mutex_lock(osi_mutex_t *mutex, uint32_t timeout);
+
+void osi_mutex_unlock(osi_mutex_t *mutex);
+
+void osi_mutex_free(osi_mutex_t *mutex);
+
+/* Just for a global mutex */
+int osi_mutex_global_init(void);
+
+void osi_mutex_global_deinit(void);
+
+void osi_mutex_global_lock(void);
+
+void osi_mutex_global_unlock(void);
+
+#endif /* __MUTEX_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/osi.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/osi.h
new file mode 100644
index 00000000000..3bd217af3eb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/osi.h
@@ -0,0 +1,16 @@
+
+#ifndef _OSI_H_
+#define _OSI_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#define UNUSED_ATTR __attribute__((unused))
+
+#define CONCAT(a, b) a##b
+#define COMPILE_ASSERT(x)
+
+int osi_init(void);
+void osi_deinit(void);
+
+#endif /*_OSI_H_*/
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/semaphore.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/semaphore.h
new file mode 100644
index 00000000000..621d5a2c1e9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/semaphore.h
@@ -0,0 +1,43 @@
+/******************************************************************************
+ *
+ *  Copyright (C) 2015 Google, Inc.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at:
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ ******************************************************************************/
+
+#ifndef __SEMAPHORE_H__
+#define __SEMAPHORE_H__
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "freertos/semphr.h"
+
+#define OSI_SEM_MAX_TIMEOUT 0xffffffffUL
+
+typedef xSemaphoreHandle osi_sem_t;
+
+#define osi_sem_valid( x ) ( ( ( *x ) == NULL) ? pdFALSE : pdTRUE )
+#define osi_sem_set_invalid( x ) ( ( *x ) = NULL )
+
+int osi_sem_new(osi_sem_t *sem, uint32_t max_count, uint32_t init_count);
+
+void osi_sem_free(osi_sem_t *sem);
+
+int osi_sem_take(osi_sem_t *sem, uint32_t timeout);
+
+void osi_sem_give(osi_sem_t *sem);
+
+
+#endif /* __SEMAPHORE_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/common/osi/include/osi/thread.h b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/thread.h
new file mode 100644
index 00000000000..fdabed1cf68
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/common/osi/include/osi/thread.h
@@ -0,0 +1,91 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __THREAD_H__
+#define __THREAD_H__
+
+#include "freertos/FreeRTOSConfig.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/queue.h"
+#include "freertos/task.h"
+#include "osi/semaphore.h"
+#include "esp_task.h"
+#include "bt_common.h"
+
+#define portBASE_TYPE int
+
+#define OSI_THREAD_MAX_TIMEOUT OSI_SEM_MAX_TIMEOUT
+
+struct osi_thread;
+
+typedef struct osi_thread osi_thread_t;
+
+typedef void (*osi_thread_func_t)(void *context);
+
+typedef enum {
+    OSI_THREAD_CORE_0 = 0,
+    OSI_THREAD_CORE_1,
+    OSI_THREAD_CORE_AFFINITY,
+} osi_thread_core_t;
+
+/*
+ * brief: Create a thread or task
+ * param name: thread name
+ * param stack_size: thread stack size
+ * param priority: thread priority
+ * param core: the CPU core which this thread run, OSI_THREAD_CORE_AFFINITY means unspecific CPU core
+ * param work_queue_num: speicify queue number, the queue[0] has highest priority, and the priority is decrease by index
+ * return : if create successfully, return thread handler; otherwise return NULL.
+ */
+osi_thread_t *osi_thread_create(const char *name, size_t stack_size, int priority, osi_thread_core_t core, uint8_t work_queue_num);
+
+/*
+ * brief: Destroy a thread or task
+ * param thread: point of thread handler
+ */
+void osi_thread_free(osi_thread_t *thread);
+
+/*
+ * brief: Post an msg to a thread and told the thread call the function
+ * param thread: point of thread handler
+ * param func: callback function that called by target thread
+ * param context: argument of callback function
+ * param queue_idx: the queue which the msg send to
+ * param timeout: post timeout, OSI_THREAD_MAX_TIMEOUT means blocking forever, 0 means never blocking, others means block millisecond
+ * return : if post successfully, return true, otherwise return false
+ */
+bool osi_thread_post(osi_thread_t *thread, osi_thread_func_t func, void *context, int queue_idx, uint32_t timeout);
+
+/*
+ * brief: Set the priority of thread
+ * param thread: point of thread handler
+ * param priority: priority
+ * return : if set successfully, return true, otherwise return false
+ */
+bool osi_thread_set_priority(osi_thread_t *thread, int priority);
+
+/* brief: Get thread name
+ * param thread: point of thread handler
+ * return: constant point of thread name
+ */
+const char *osi_thread_name(osi_thread_t *thread);
+
+/* brief: Get the size of the specified queue
+ * param thread: point of thread handler
+ * param wq_idx: the queue index of the thread
+ * return: queue size
+ */
+int osi_thread_queue_wait_size(osi_thread_t *thread, int wq_idx);
+
+#endif /* __THREAD_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_ble_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_ble_api.h
new file mode 100644
index 00000000000..80ab5707dc0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_ble_api.h
@@ -0,0 +1,182 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_BLE_MESH_BLE_API_H_
+#define _ESP_BLE_MESH_BLE_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** This enum value is the event of BLE operations */
+typedef enum {
+    ESP_BLE_MESH_START_BLE_ADVERTISING_COMP_EVT, /*!< Start BLE advertising completion event */
+    ESP_BLE_MESH_STOP_BLE_ADVERTISING_COMP_EVT,  /*!< Stop BLE advertising completion event */
+    ESP_BLE_MESH_START_BLE_SCANNING_COMP_EVT,    /*!< Start BLE scanning completion event */
+    ESP_BLE_MESH_STOP_BLE_SCANNING_COMP_EVT,     /*!< Stop BLE scanning completion event */
+    ESP_BLE_MESH_SCAN_BLE_ADVERTISING_PKT_EVT,   /*!< Scanning BLE advertising packets event */
+    ESP_BLE_MESH_BLE_EVT_MAX,
+} esp_ble_mesh_ble_cb_event_t;
+
+/** BLE operation callback parameters */
+typedef union {
+    /**
+     * @brief ESP_BLE_MESH_START_BLE_ADVERTISING_COMP_EVT
+     */
+    struct {
+        int err_code;             /*!< Indicate the result of starting BLE advertising */
+        uint8_t index;            /*!< Index of the BLE advertising */
+    } start_ble_advertising_comp; /*!< Event parameters of ESP_BLE_MESH_START_BLE_ADVERTISING_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_STOP_BLE_ADVERTISING_COMP_EVT
+     */
+    struct {
+        int err_code;            /*!< Indicate the result of stopping BLE advertising */
+        uint8_t index;           /*!< Index of the BLE advertising */
+    } stop_ble_advertising_comp; /*!< Event parameters of ESP_BLE_MESH_STOP_BLE_ADVERTISING_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_START_BLE_SCANNING_COMP_EVT
+     */
+    struct {
+        int err_code;      /*!< Indicate the result of starting BLE scanning */
+    } start_ble_scan_comp; /*!< Event parameters of ESP_BLE_MESH_START_BLE_SCANNING_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_STOP_BLE_SCANNING_COMP_EVT
+     */
+    struct {
+        int err_code;     /*!< Indicate the result of stopping BLE scanning */
+    } stop_ble_scan_comp; /*!< Event parameters of ESP_BLE_MESH_STOP_BLE_SCANNING_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_SCAN_BLE_ADVERTISING_PKT_EVT
+     */
+    struct {
+        uint8_t  addr[6];   /*!< Device address */
+        uint8_t  addr_type; /*!< Device address type */
+        uint8_t  adv_type;  /*!< Advertising data type */
+        uint8_t *data;      /*!< Advertising data */
+        uint16_t length;    /*!< Advertising data length */
+        int8_t   rssi;      /*!< RSSI of the advertising packet */
+    } scan_ble_adv_pkt;     /*!< Event parameters of ESP_BLE_MESH_SCAN_BLE_ADVERTISING_PKT_EVT */
+} esp_ble_mesh_ble_cb_param_t;
+
+/**
+ * @brief   BLE scanning callback function type
+ *
+ * @param   event: BLE scanning callback event type
+ * @param   param: BLE scanning callback parameter
+ */
+typedef void (* esp_ble_mesh_ble_cb_t)(esp_ble_mesh_ble_cb_event_t event,
+                                       esp_ble_mesh_ble_cb_param_t *param);
+
+/**
+ * @brief       Register BLE scanning callback.
+ *
+ * @param[in]   callback: Pointer to the BLE scaning callback function.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_ble_callback(esp_ble_mesh_ble_cb_t callback);
+
+/** Count for sending BLE advertising packet infinitely */
+#define ESP_BLE_MESH_BLE_ADV_INFINITE   0xFFFF
+
+/*!< This enum value is the priority of BLE advertising packet */
+typedef enum {
+    ESP_BLE_MESH_BLE_ADV_PRIO_LOW,
+    ESP_BLE_MESH_BLE_ADV_PRIO_HIGH,
+} esp_ble_mesh_ble_adv_priority_t;
+
+/** Context of BLE advertising parameters. */
+typedef struct {
+    uint16_t interval;               /*!< BLE advertising interval */
+    uint8_t  adv_type;               /*!< BLE advertising type */
+    uint8_t  own_addr_type;          /*!< Own address type */
+    uint8_t  peer_addr_type;         /*!< Peer address type */
+    uint8_t  peer_addr[BD_ADDR_LEN]; /*!< Peer address */
+    uint16_t duration;               /*!< Duration is milliseconds */
+    uint16_t period;                 /*!< Period in milliseconds */
+    uint16_t count;                  /*!< Number of advertising duration */
+    uint8_t  priority:2;             /*!< Priority of BLE advertising packet */
+} esp_ble_mesh_ble_adv_param_t;
+
+/** Context of BLE advertising data. */
+typedef struct {
+    uint8_t adv_data_len;      /*!< Advertising data length */
+    uint8_t adv_data[31];      /*!< Advertising data */
+    uint8_t scan_rsp_data_len; /*!< Scan response data length */
+    uint8_t scan_rsp_data[31]; /*!< Scan response data */
+} esp_ble_mesh_ble_adv_data_t;
+
+/**
+ * @brief         This function is called to start BLE advertising with the corresponding data
+ *                and parameters while BLE Mesh is working at the same time.
+ *
+ * @note          1. When this function is called, the BLE advertising packet will be posted to
+ *                the BLE mesh adv queue in the mesh stack and waited to be sent.
+ *                2. In the BLE advertising parameters, the "duration" means the time used for
+ *                sending the BLE advertising packet each time, it shall not be smaller than the
+ *                advertising interval. When the packet is sent successfully, it will be posted
+ *                to the adv queue again after the "period" time if the "count" is bigger than 0.
+ *                The "count" means how many durations the packet will be sent after it is sent
+ *                successfully for the first time. And if the "count" is set to 0xFFFF, which
+ *                means the packet will be sent infinitely.
+ *                3. The "priority" means the priority of BLE advertising packet compared with
+ *                BLE Mesh packets. Currently two options (i.e. low/high) are provided. If the
+ *                "priority" is high, the BLE advertising packet will be posted to the front of
+ *                adv queue. Otherwise it will be posted to the back of adv queue.
+ *
+ * @param[in]     param: Pointer to the BLE advertising parameters
+ * @param[in]     data:  Pointer to the BLE advertising data and scan response data
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_start_ble_advertising(const esp_ble_mesh_ble_adv_param_t *param,
+                                             const esp_ble_mesh_ble_adv_data_t *data);
+
+/**
+ * @brief         This function is called to stop BLE advertising with the corresponding index.
+ *
+ * @param[in]     index: Index of BLE advertising
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_stop_ble_advertising(uint8_t index);
+
+/** Context of BLE scanning parameters. */
+typedef struct {
+    uint32_t duration; /*!< Duration used to scan normal BLE advertising packets */
+} esp_ble_mesh_ble_scan_param_t;
+
+/**
+ * @brief         This function is called to start scanning normal BLE advertising packets
+ *                and notifying the packets to the application layer.
+ *
+ * @param[in]     param: Pointer to the BLE scanning parameters
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_start_ble_scanning(esp_ble_mesh_ble_scan_param_t *param);
+
+/**
+ * @brief         This function is called to stop notifying normal BLE advertising packets
+ *                to the application layer.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_stop_ble_scanning(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_BLE_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_common_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_common_api.h
new file mode 100644
index 00000000000..f7209d8e5fe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_common_api.h
@@ -0,0 +1,49 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_BLE_MESH_COMMON_API_H_
+#define _ESP_BLE_MESH_COMMON_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief         Initialize BLE Mesh module.
+ *                This API initializes provisioning capabilities and composition data information.
+ *
+ * @note          After calling this API, the device needs to call esp_ble_mesh_prov_enable()
+ *                to enable provisioning functionality again.
+ *
+ * @param[in]     prov: Pointer to the device provisioning capabilities. This pointer must
+ *                      remain valid during the lifetime of the BLE Mesh device.
+ * @param[in]     comp: Pointer to the device composition data information. This pointer
+ *                      must remain valid during the lifetime of the BLE Mesh device.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_init(esp_ble_mesh_prov_t *prov, esp_ble_mesh_comp_t *comp);
+
+/**
+ * @brief         De-initialize BLE Mesh module.
+ *
+ * @note          This function shall be invoked after esp_ble_mesh_client_model_deinit().
+ *
+ * @param[in]     param: Pointer to the structure of BLE Mesh deinit parameters.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_deinit(esp_ble_mesh_deinit_param_t *param);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_COMMON_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_local_data_operation_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_local_data_operation_api.h
new file mode 100644
index 00000000000..80078681267
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_local_data_operation_api.h
@@ -0,0 +1,207 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_BLE_MESH_LOCAL_DATA_OPERATION_API_H_
+#define _ESP_BLE_MESH_LOCAL_DATA_OPERATION_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief         Get the model publish period, the unit is ms.
+ *
+ * @param[in]     model: Model instance pointer.
+ *
+ * @return        Publish period value on success, 0 or (negative) error code from errno.h on failure.
+ *
+ */
+int32_t esp_ble_mesh_get_model_publish_period(esp_ble_mesh_model_t *model);
+
+/**
+ * @brief         Get the address of the primary element.
+ *
+ * @return        Address of the primary element on success, or
+ *                ESP_BLE_MESH_ADDR_UNASSIGNED on failure which means the device has not been provisioned.
+ *
+ */
+uint16_t esp_ble_mesh_get_primary_element_address(void);
+
+/**
+ * @brief         Check if the model has subscribed to the given group address.
+ *                Note: E.g., once a status message is received and the destination address
+ *                      is a group address, the model uses this API to check if it is successfully subscribed
+ *                      to the given group address.
+ *
+ * @param[in]     model: Pointer to the model.
+ * @param[in]     group_addr: Group address.
+ *
+ * @return        Pointer to the group address within the Subscription List of the model on success, or
+ *                NULL on failure which means the model has not subscribed to the given group address.
+ *                Note: With the pointer to the group address returned, you can reset the group address
+ *                      to 0x0000 in order to unsubscribe the model from the group.
+ *
+ */
+uint16_t *esp_ble_mesh_is_model_subscribed_to_group(esp_ble_mesh_model_t *model,
+                                                    uint16_t group_addr);
+
+/**
+ * @brief         Find the BLE Mesh element pointer via the element address.
+ *
+ * @param[in]     element_addr: Element address.
+ *
+ * @return        Pointer to the element on success, or NULL on failure.
+ *
+ */
+esp_ble_mesh_elem_t *esp_ble_mesh_find_element(uint16_t element_addr);
+
+/**
+ * @brief         Get the number of elements that have been registered.
+ *
+ * @return        Number of elements.
+ *
+ */
+uint8_t esp_ble_mesh_get_element_count(void);
+
+/**
+ * @brief        Find the Vendor specific model with the given element,
+ *               the company ID and the Vendor Model ID.
+ *
+ * @param[in]    element: Element to which the model belongs.
+ * @param[in]    company_id: A 16-bit company identifier assigned by the Bluetooth SIG.
+ * @param[in]    model_id: A 16-bit vendor-assigned model identifier.
+ *
+ * @return       Pointer to the Vendor Model on success, or NULL on failure which means the Vendor Model is not found.
+ *
+ */
+esp_ble_mesh_model_t *esp_ble_mesh_find_vendor_model(const esp_ble_mesh_elem_t *element,
+                                                     uint16_t company_id, uint16_t model_id);
+
+/**
+ * @brief        Find the SIG model with the given element and Model id.
+ *
+ * @param[in]    element: Element to which the model belongs.
+ * @param[in]    model_id: SIG model identifier.
+ *
+ * @return       Pointer to the SIG Model on success, or NULL on failure which means the SIG Model is not found.
+ *
+ */
+esp_ble_mesh_model_t *esp_ble_mesh_find_sig_model(const esp_ble_mesh_elem_t *element,
+                                                  uint16_t model_id);
+
+/**
+ * @brief        Get the Composition data which has been registered.
+ *
+ * @return       Pointer to the Composition data on success, or NULL on failure which means the Composition data is not initialized.
+ *
+ */
+const esp_ble_mesh_comp_t *esp_ble_mesh_get_composition_data(void);
+
+/**
+ * @brief        A local model of node or Provisioner subscribes a group address.
+ *
+ * @note         This function shall not be invoked before node is provisioned or Provisioner is enabled.
+ *
+ * @param[in]    element_addr: Unicast address of the element to which the model belongs.
+ * @param[in]    company_id: A 16-bit company identifier.
+ * @param[in]    model_id: A 16-bit model identifier.
+ * @param[in]    group_addr: The group address to be subscribed.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_model_subscribe_group_addr(uint16_t element_addr, uint16_t company_id,
+                                                  uint16_t model_id, uint16_t group_addr);
+
+/**
+ * @brief        A local model of node or Provisioner unsubscribes a group address.
+ *
+ * @note         This function shall not be invoked before node is provisioned or Provisioner is enabled.
+ *
+ * @param[in]    element_addr: Unicast address of the element to which the model belongs.
+ * @param[in]    company_id: A 16-bit company identifier.
+ * @param[in]    model_id: A 16-bit model identifier.
+ * @param[in]    group_addr: The subscribed group address.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_model_unsubscribe_group_addr(uint16_t element_addr, uint16_t company_id,
+                                                    uint16_t model_id, uint16_t group_addr);
+
+/**
+ * @brief         This function is called by Node to get the local NetKey.
+ *
+ * @param[in]     net_idx: NetKey index.
+ *
+ * @return        NetKey on success, or NULL on failure.
+ *
+ */
+const uint8_t *esp_ble_mesh_node_get_local_net_key(uint16_t net_idx);
+
+/**
+ * @brief         This function is called by Node to get the local AppKey.
+ *
+ * @param[in]     app_idx: AppKey index.
+ *
+ * @return        AppKey on success, or NULL on failure.
+ *
+ */
+const uint8_t *esp_ble_mesh_node_get_local_app_key(uint16_t app_idx);
+
+/**
+ * @brief         This function is called by Node to add a local NetKey.
+ *
+ * @param[in]     net_key: NetKey to be added.
+ * @param[in]     net_idx: NetKey Index.
+ *
+ * @note          This function can only be called after the device is provisioned.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_node_add_local_net_key(const uint8_t net_key[16], uint16_t net_idx);
+
+/**
+ * @brief         This function is called by Node to add a local AppKey.
+ *
+ * @param[in]     app_key: AppKey to be added.
+ * @param[in]     net_idx: NetKey Index.
+ * @param[in]     app_idx: AppKey Index.
+ *
+ * @note          The net_idx must be an existing one.
+ *                This function can only be called after the device is provisioned.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_node_add_local_app_key(const uint8_t app_key[16], uint16_t net_idx, uint16_t app_idx);
+
+/**
+ * @brief         This function is called by Node to bind AppKey to model locally.
+ *
+ * @param[in]     element_addr: Node local element address
+ * @param[in]     company_id: Node local company id
+ * @param[in]     model_id: Node local model id
+ * @param[in]     app_idx: Node local appkey index
+ *
+ * @note          If going to bind app_key with local vendor model, the company_id
+ *                shall be set to 0xFFFF.
+ *                This function can only be called after the device is provisioned.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_node_bind_app_key_to_local_model(uint16_t element_addr, uint16_t company_id,
+                                                        uint16_t model_id, uint16_t app_idx);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_LOCAL_DATA_OPERATION_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_low_power_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_low_power_api.h
new file mode 100644
index 00000000000..e55c6a71788
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_low_power_api.h
@@ -0,0 +1,61 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_BLE_MESH_LOW_POWER_API_H_
+#define _ESP_BLE_MESH_LOW_POWER_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief       Enable BLE Mesh device LPN functionality.
+ *
+ * @note        This API enables LPN functionality. Once called, the proper
+ *              Friend Request will be sent.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_lpn_enable(void);
+
+/**
+ * @brief       Disable BLE Mesh device LPN functionality.
+ *
+ * @param[in]   force: when disabling LPN functionality, use this flag to indicate
+ *                     whether directly clear corresponding information or just
+ *                     send friend clear to disable it if friendship has already
+ *                     been established.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_lpn_disable(bool force);
+
+/**
+ * @brief       LPN tries to poll messages from the Friend Node.
+ *
+ * @note        The Friend Poll message is sent by a Low Power node to ask the Friend
+ *              node to send a message that it has stored for the Low Power node.
+ *              Users can call this API to send Friend Poll message manually. If this
+ *              API is not invoked, the bottom layer of the Low Power node will send
+ *              Friend Poll before the PollTimeout timer expires.
+ *              If the corresponding Friend Update is received and MD is set to 0,
+ *              which means there are no messages for the Low Power node, then the
+ *              Low Power node will stop scanning.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_lpn_poll(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_LOW_POWER_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_networking_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_networking_api.h
new file mode 100644
index 00000000000..01af7951382
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_networking_api.h
@@ -0,0 +1,648 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_BLE_MESH_NETWORKING_API_H_
+#define _ESP_BLE_MESH_NETWORKING_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @brief: event, event code of user-defined model events; param, parameters of user-defined model events */
+typedef void (* esp_ble_mesh_model_cb_t)(esp_ble_mesh_model_cb_event_t event,
+                                         esp_ble_mesh_model_cb_param_t *param);
+
+/**
+ * @brief         Register BLE Mesh callback for user-defined models' operations.
+ *                This callback can report the following events generated for the user-defined models:
+ *                - Call back the messages received by user-defined client and server models to the
+ *                  application layer;
+ *                - If users call esp_ble_mesh_server/client_model_send, this callback notifies the
+ *                  application layer of the send_complete event;
+ *                - If user-defined client model sends a message that requires response, and the response
+ *                  message is received after the timer expires, the response message will be reported
+ *                  to the application layer as published by a peer device;
+ *                - If the user-defined client model fails to receive the response message during a specified
+ *                  period of time, a timeout event will be reported to the application layer.
+ *
+ * @note          The client models (i.e. Config Client model, Health Client model, Generic
+ *                Client models, Sensor Client model, Scene Client model and Lighting Client models)
+ *                that have been realized internally have their specific register functions.
+ *                For example, esp_ble_mesh_register_config_client_callback is the register
+ *                function for Config Client Model.
+ *
+ * @param[in]     callback: Pointer to the callback function.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_custom_model_callback(esp_ble_mesh_model_cb_t callback);
+
+/**
+ * @brief        Add the message opcode to the beginning of the model message
+ *               before sending or publishing the model message.
+ *
+ * @note         This API is only used to set the opcode of the message.
+ *
+ * @param[in]    data: Pointer to the message data.
+ * @param[in]    opcode: The message opcode.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_model_msg_opcode_init(uint8_t *data, uint32_t opcode);
+
+/**
+ * @brief         Initialize the user-defined client model. All user-defined client models
+ *                shall call this function to initialize the client model internal data.
+ *                Node: Before calling this API, the op_pair_size and op_pair variabled within
+ *                      the user_data(defined using esp_ble_mesh_client_t_) of the client model
+ *                      need to be initialized.
+ *
+ * @param[in]     model: BLE Mesh Client model to which the message belongs.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_client_model_init(esp_ble_mesh_model_t *model);
+
+/**
+ * @brief         De-initialize the user-defined client model.
+ *
+ * @note          This function shall be invoked before esp_ble_mesh_deinit() is called.
+ *
+ * @param[in]     model: Pointer of the Client model.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_client_model_deinit(esp_ble_mesh_model_t *model);
+
+/**
+ * @brief         Send server model messages(such as server model status messages).
+ *
+ * @param[in]     model: BLE Mesh Server Model to which the message belongs.
+ * @param[in]     ctx:   Message context, includes keys, TTL, etc.
+ * @param[in]     opcode: Message opcode.
+ * @param[in]     length: Message length (exclude the message opcode).
+ * @param[in]     data: Parameters of Access Payload (exclude the message opcode) to be sent.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_server_model_send_msg(esp_ble_mesh_model_t *model,
+                                             esp_ble_mesh_msg_ctx_t *ctx,
+                                             uint32_t opcode,
+                                             uint16_t length, uint8_t *data);
+
+/**
+ * @brief         Send client model message (such as model get, set, etc).
+ *
+ * @param[in]     model: BLE Mesh Client Model to which the message belongs.
+ * @param[in]     ctx:   Message context, includes keys, TTL, etc.
+ * @param[in]     opcode: Message opcode.
+ * @param[in]     length: Message length (exclude the message opcode).
+ * @param[in]     data: Parameters of the Access Payload (exclude the message opcode) to be sent.
+ * @param[in]     msg_timeout: Time to get response to the message (in milliseconds).
+ * @param[in]     need_rsp: TRUE if the opcode requires the peer device to reply, FALSE otherwise.
+ * @param[in]     device_role: Role of the device (Node/Provisioner) that sends the message.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_client_model_send_msg(esp_ble_mesh_model_t *model,
+                                             esp_ble_mesh_msg_ctx_t *ctx,
+                                             uint32_t opcode,
+                                             uint16_t length, uint8_t *data,
+                                             int32_t msg_timeout, bool need_rsp,
+                                             esp_ble_mesh_dev_role_t device_role);
+
+/**
+ * @brief         Send a model publication message.
+ *
+ * @note          Before calling this function, the user needs to ensure that the model
+ *                publication message (@ref esp_ble_mesh_model_pub_t.msg) contains a valid
+ *                message to be sent. And if users want to update the publishing message,
+ *                this API should be called in ESP_BLE_MESH_MODEL_PUBLISH_UPDATE_EVT
+ *                with the message updated.
+ *
+ *
+ * @param[in]    model: Mesh (client) Model publishing the message.
+ * @param[in]    opcode: Message opcode.
+ * @param[in]    length: Message length (exclude the message opcode).
+ * @param[in]    data: Parameters of the Access Payload (exclude the message opcode) to be sent.
+ * @param[in]    device_role: Role of the device (node/provisioner) publishing the message of the type esp_ble_mesh_dev_role_t.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_model_publish(esp_ble_mesh_model_t *model, uint32_t opcode,
+                                     uint16_t length, uint8_t *data,
+                                     esp_ble_mesh_dev_role_t device_role);
+
+/**
+ * @brief        Update a server model state value. If the model publication
+ *               state is set properly (e.g. publish address is set to a valid
+ *               address), it will publish corresponding status message.
+ *
+ * @note         Currently this API is used to update bound state value, not
+ *               for all server model states.
+ *
+ * @param[in]    model: Server model which is going to update the state.
+ * @param[in]    type:  Server model state type.
+ * @param[in]    value: Server model state value.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_server_model_update_state(esp_ble_mesh_model_t *model,
+                                                 esp_ble_mesh_server_state_type_t type,
+                                                 esp_ble_mesh_server_state_value_t *value);
+
+/**
+ * @brief         Reset the provisioning procedure of the local BLE Mesh node.
+ *
+ * @note          All provisioning information in this node will be deleted and the node
+ *                needs to be reprovisioned. The API function esp_ble_mesh_node_prov_enable()
+ *                needs to be called to start a new provisioning procedure.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_node_local_reset(void);
+
+/**
+ * @brief        This function is called to set the node (provisioned device) name.
+ *
+ * @param[in]    index: Index of the node in the node queue.
+ * @param[in]    name: Name (end by '\0') to be set for the node.
+ *
+ * @note         index is obtained from the parameters of ESP_BLE_MESH_PROVISIONER_PROV_COMPLETE_EVT.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_set_node_name(uint16_t index, const char *name);
+
+/**
+ * @brief        This function is called to get the node (provisioned device) name.
+ *
+ * @param[in]    index: Index of the node in the node queue.
+ *
+ * @note         index is obtained from the parameters of ESP_BLE_MESH_PROVISIONER_PROV_COMPLETE_EVT.
+ *
+ * @return       Node name on success, or NULL on failure.
+ *
+ */
+const char *esp_ble_mesh_provisioner_get_node_name(uint16_t index);
+
+/**
+ * @brief        This function is called to get the node (provisioned device) index.
+ *
+ * @param[in]    name: Name of the node (end by '\0').
+ *
+ * @return       Node index on success, or an invalid value (0xFFFF) on failure.
+ *
+ */
+uint16_t esp_ble_mesh_provisioner_get_node_index(const char *name);
+
+/**
+ * @brief        This function is called to store the Composition Data of the node.
+ *
+ * @param[in]    unicast_addr: Element address of the node
+ * @param[in]    data:         Pointer of Composition Data
+ * @param[in]    length:       Length of Composition Data
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_store_node_comp_data(uint16_t unicast_addr,
+                                                        uint8_t *data, uint16_t length);
+
+/**
+ * @brief        This function is called to get the provisioned node information
+ *               with the node device uuid.
+ *
+ * @param[in]    uuid: Device UUID of the node
+ *
+ * @return       Pointer of the node info struct or NULL on failure.
+ *
+ */
+esp_ble_mesh_node_t *esp_ble_mesh_provisioner_get_node_with_uuid(const uint8_t uuid[16]);
+
+/**
+ * @brief        This function is called to get the provisioned node information
+ *               with the node unicast address.
+ *
+ * @param[in]    unicast_addr: Unicast address of the node
+ *
+ * @return       Pointer of the node info struct or NULL on failure.
+ *
+ */
+esp_ble_mesh_node_t *esp_ble_mesh_provisioner_get_node_with_addr(uint16_t unicast_addr);
+
+/**
+ * @brief        This function is called to get the provisioned node information
+ *               with the node name.
+ *
+ * @param[in]    name: Name of the node (end by '\0').
+ *
+ * @return       Pointer of the node info struct or NULL on failure.
+ *
+ */
+esp_ble_mesh_node_t *esp_ble_mesh_provisioner_get_node_with_name(const char *name);
+
+/**
+ * @brief         This function is called by Provisioner to get provisioned node count.
+ *
+ * @return        Number of the provisioned nodes.
+ *
+ */
+uint16_t esp_ble_mesh_provisioner_get_prov_node_count(void);
+
+/**
+ * @brief         This function is called by Provisioner to get the entry of the node table.
+ *
+ * @note          After invoking the function to get the entry of nodes, users can use the "for"
+ *                loop combined with the macro CONFIG_BLE_MESH_MAX_PROV_NODES to get each node's
+ *                information. Before trying to read the node's information, users need to check
+ *                if the node exists, i.e. if the *(esp_ble_mesh_node_t **node) is NULL.
+ *                For example:
+ *                ```
+ *                const esp_ble_mesh_node_t **entry = esp_ble_mesh_provisioner_get_node_table_entry();
+ *                for (int i = 0; i < CONFIG_BLE_MESH_MAX_PROV_NODES; i++) {
+ *                    const esp_ble_mesh_node_t *node = entry[i];
+ *                    if (node) {
+ *                        ......
+ *                    }
+ *                }
+ *                ```
+ *
+ * @return        Pointer to the start of the node table.
+ *
+ */
+const esp_ble_mesh_node_t **esp_ble_mesh_provisioner_get_node_table_entry(void);
+
+/**
+ * @brief        This function is called to delete the provisioned node information
+ *               with the node device uuid.
+ *
+ * @param[in]    uuid: Device UUID of the node
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_delete_node_with_uuid(const uint8_t uuid[16]);
+
+/**
+ * @brief        This function is called to delete the provisioned node information
+ *               with the node unicast address.
+ *
+ * @param[in]    unicast_addr: Unicast address of the node
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_delete_node_with_addr(uint16_t unicast_addr);
+
+/**
+ * @brief         This function is called to add a local AppKey for Provisioner.
+ *
+ * @param[in]     app_key: The app key to be set for the local BLE Mesh stack.
+ * @param[in]     net_idx: The network key index.
+ * @param[in]     app_idx: The app key index.
+ *
+ * @note          app_key: If set to NULL, app_key will be generated internally.
+ *                net_idx: Should be an existing one.
+ *                app_idx: If it is going to be generated internally, it should be set to
+ *                         0xFFFF, and the new app_idx will be reported via an event.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_add_local_app_key(const uint8_t app_key[16],
+                                                     uint16_t net_idx, uint16_t app_idx);
+
+/**
+ * @brief         This function is used to update a local AppKey for Provisioner.
+ *
+ * @param[in]     app_key: Value of the AppKey.
+ * @param[in]     net_idx: Corresponding NetKey Index.
+ * @param[in]     app_idx: The AppKey Index
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_update_local_app_key(const uint8_t app_key[16],
+                                                        uint16_t net_idx, uint16_t app_idx);
+
+/**
+ * @brief         This function is called by Provisioner to get the local app key value.
+ *
+ * @param[in]     net_idx: Network key index.
+ * @param[in]     app_idx: Application key index.
+ *
+ * @return        App key on success, or NULL on failure.
+ *
+ */
+const uint8_t *esp_ble_mesh_provisioner_get_local_app_key(uint16_t net_idx, uint16_t app_idx);
+
+/**
+ * @brief         This function is called by Provisioner to bind own model with proper app key.
+ *
+ * @param[in]     element_addr: Provisioner local element address
+ * @param[in]     app_idx: Provisioner local appkey index
+ * @param[in]     model_id: Provisioner local model id
+ * @param[in]     company_id: Provisioner local company id
+ *
+ * @note          company_id: If going to bind app_key with local vendor model, company_id
+ *                            should be set to 0xFFFF.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_bind_app_key_to_local_model(uint16_t element_addr, uint16_t app_idx,
+                                                               uint16_t model_id, uint16_t company_id);
+
+/**
+ * @brief         This function is called by Provisioner to add local network key.
+ *
+ * @param[in]     net_key: The network key to be added to the Provisioner local BLE Mesh stack.
+ * @param[in]     net_idx: The network key index.
+ *
+ * @note          net_key: If set to NULL, net_key will be generated internally.
+ *                net_idx: If it is going to be generated internally, it should be set to
+ *                         0xFFFF, and the new net_idx will be reported via an event.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_add_local_net_key(const uint8_t net_key[16], uint16_t net_idx);
+
+/**
+ * @brief         This function is called by Provisioner to update a local network key.
+ *
+ * @param[in]     net_key: Value of the NetKey.
+ * @param[in]     net_idx: The NetKey Index.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_update_local_net_key(const uint8_t net_key[16], uint16_t net_idx);
+
+/**
+ * @brief         This function is called by Provisioner to get the local network key value.
+ *
+ * @param[in]     net_idx: Network key index.
+ *
+ * @return        Network key on success, or NULL on failure.
+ *
+ */
+const uint8_t *esp_ble_mesh_provisioner_get_local_net_key(uint16_t net_idx);
+
+/**
+ * @brief         This function is called by Provisioner to enable or disable receiving
+ *                heartbeat messages.
+ *
+ * @note          If enabling receiving heartbeat message successfully, the filter will
+ *                be an empty rejectlist by default, which means all heartbeat messages
+ *                received by the Provisioner will be reported to the application layer.
+ *
+ * @param[in]     enable: Enable or disable receiving heartbeat messages.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_recv_heartbeat(bool enable);
+
+/**
+ * @brief         This function is called by Provisioner to set the heartbeat filter type.
+ *
+ * @note          1. If the filter type is not the same with the current value, then all the
+ *                   filter entries will be cleaned.
+ *                2. If the previous type is rejectlist, and changed to acceptlist, then the
+ *                   filter will be an empty acceptlist, which means no heartbeat messages
+ *                   will be reported. Users need to add SRC or DST into the filter entry,
+ *                   then heartbeat messages from the SRC or to the DST will be reported.
+ *
+ * @param[in]     type: Heartbeat filter type (acceptlist or rejectlist).
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_set_heartbeat_filter_type(uint8_t type);
+
+/**
+ * @brief         This function is called by Provisioner to add or remove a heartbeat filter entry.
+ *
+ * @note          1. If the operation is "ADD", the "hb_src" can be set to the SRC (can only be a
+ *                   unicast address) of heartbeat messages, and the "hb_dst" can be set to the
+ *                   DST (unicast address or group address), at least one of them needs to be set.
+ *                   - If only one of them is set, the filter entry will only use the configured
+ *                     SRC or DST to filter heartbeat messages.
+ *                   - If both of them are set, the SRC and DST will both be used to decide if a
+ *                     heartbeat message will be handled.
+ *                   - If SRC or DST already exists in some filter entry, then the corresponding
+ *                     entry will be cleaned firstly, then a new entry will be allocated to store
+ *                     the information.
+ *                2. If the operation is "REMOVE", the "hb_src" can be set to the SRC (can only be
+ *                   a unicast address) of heartbeat messages, and the "hb_dst" can be set to the
+ *                   DST (unicast address or group address), at least one of them needs to be set.
+ *                   - The filter entry with the same SRC or DST will be removed.
+ *
+ * @param[in]     op:   Add or REMOVE
+ * @param[in]     info: Heartbeat filter entry information, including:
+ *                      hb_src - Heartbeat source address;
+ *                      hb_dst - Heartbeat destination address;
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_set_heartbeat_filter_info(uint8_t op, esp_ble_mesh_heartbeat_filter_info_t *info);
+
+/**
+ * @brief         This function is called by Provisioner to directly erase the mesh
+ *                information from nvs namespace.
+ *
+ * @note          This function can be invoked when the mesh stack is not initialized
+ *                or has been de-initialized.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_direct_erase_settings(void);
+
+/**
+ * @brief         This function is called by Provisioner to open a nvs namespace
+ *                for storing mesh information.
+ *
+ * @note          Before open another nvs namespace, the previously opened nvs
+ *                namespace must be closed firstly.
+ *
+ * @param[in]     index: Settings index.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_open_settings_with_index(uint8_t index);
+
+/**
+ * @brief         This function is called by Provisioner to open a nvs namespace
+ *                for storing mesh information.
+ *
+ * @note          Before open another nvs namespace, the previously opened nvs
+ *                namespace must be closed firstly.
+ *
+ * @param[in]     uid: Settings user id.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_open_settings_with_uid(const char *uid);
+
+/**
+ * @brief         This function is called by Provisioner to close a nvs namespace
+ *                which is opened previously for storing mesh information.
+ *
+ * @note          1. Before closing the nvs namespace, it must be open.
+ *                2. When the function is invoked, the Provisioner functionality
+ *                   will be disabled firstly, and:
+ *                   a) If the "erase" flag is set to false, the mesh information
+ *                      will be cleaned (e.g. removing NetKey, AppKey, nodes, etc)
+ *                      from the mesh stack.
+ *                   b) If the "erase" flag is set to true, the mesh information
+ *                      stored in the nvs namespace will also be erased besides
+ *                      been cleaned from the mesh stack.
+ *                3. If Provisioner tries to work properly again, we can invoke the
+ *                   open function to open a new nvs namespace or a previously added
+ *                   one, and restore the mesh information from it if not erased.
+ *                4. The working process shall be as following:
+ *                   a) Open settings A
+ *                   b) Start to provision and control nodes
+ *                   c) Close settings A
+ *                   d) Open settings B
+ *                   e) Start to provision and control other nodes
+ *                   f) Close settings B
+ *                   g) ......
+ *
+ * @param[in]     index: Settings index.
+ * @param[in]     erase: Indicate if erasing mesh information.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_close_settings_with_index(uint8_t index, bool erase);
+
+/**
+ * @brief         This function is called by Provisioner to close a nvs namespace
+ *                which is opened previously for storing mesh information.
+ *
+ * @note          1. Before closing the nvs namespace, it must be open.
+ *                2. When the function is invoked, the Provisioner functionality
+ *                   will be disabled firstly, and:
+ *                   a) If the "erase" flag is set to false, the mesh information
+ *                      will be cleaned (e.g. removing NetKey, AppKey, nodes, etc)
+ *                      from the mesh stack.
+ *                   b) If the "erase" flag is set to true, the mesh information
+ *                      stored in the nvs namespace will also be erased besides
+ *                      been cleaned from the mesh stack.
+ *                3. If Provisioner tries to work properly again, we can invoke the
+ *                   open function to open a new nvs namespace or a previously added
+ *                   one, and restore the mesh information from it if not erased.
+ *                4. The working process shall be as following:
+ *                   a) Open settings A
+ *                   b) Start to provision and control nodes
+ *                   c) Close settings A
+ *                   d) Open settings B
+ *                   e) Start to provision and control other nodes
+ *                   f) Close settings B
+ *                   g) ......
+ *
+ * @param[in]     uid: Settings user id.
+ * @param[in]     erase: Indicate if erasing mesh information.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_close_settings_with_uid(const char *uid, bool erase);
+
+/**
+ * @brief         This function is called by Provisioner to erase the mesh information
+ *                and settings user id from a nvs namespace.
+ *
+ * @note          When this function is called, the nvs namespace must not be open.
+ *                This function is used to erase the mesh information and settings
+ *                user id which are not used currently.
+ *
+ * @param[in]     index: Settings index.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_delete_settings_with_index(uint8_t index);
+
+/**
+ * @brief         This function is called by Provisioner to erase the mesh information
+ *                and settings user id from a nvs namespace.
+ *
+ * @note          When this function is called, the nvs namespace must not be open.
+ *                This function is used to erase the mesh information and settings
+ *                user id which are not used currently.
+ *
+ * @param[in]     uid: Settings user id.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_delete_settings_with_uid(const char *uid);
+
+/**
+ * @brief         This function is called by Provisioner to get settings user id.
+ *
+ * @param[in]     index: Settings index.
+ *
+ * @return        Setting user id on success or NULL on failure.
+ *
+ */
+const char *esp_ble_mesh_provisioner_get_settings_uid(uint8_t index);
+
+/**
+ * @brief         This function is called by Provisioner to get settings index.
+ *
+ * @param[in]     uid: Settings user id.
+ *
+ * @return        Settings index.
+ *
+ */
+uint8_t esp_ble_mesh_provisioner_get_settings_index(const char *uid);
+
+/**
+ * @brief         This function is called by Provisioner to get the number of free
+ *                settings user id.
+ *
+ * @return        Number of free settings user id.
+ *
+ */
+uint8_t esp_ble_mesh_provisioner_get_free_settings_count(void);
+
+/**
+ * @brief         This function is called to get fast provisioning application key.
+ *
+ * @param[in]     net_idx: Network key index.
+ * @param[in]     app_idx: Application key index.
+ *
+ * @return        Application key on success, or NULL on failure.
+ *
+ */
+const uint8_t *esp_ble_mesh_get_fast_prov_app_key(uint16_t net_idx, uint16_t app_idx);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_NETWORKING_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_provisioning_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_provisioning_api.h
new file mode 100644
index 00000000000..58ad280468f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_provisioning_api.h
@@ -0,0 +1,394 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_BLE_MESH_PROVISIONING_API_H_
+#define _ESP_BLE_MESH_PROVISIONING_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @brief: event, event code of provisioning events; param, parameters of provisioning events */
+typedef void (* esp_ble_mesh_prov_cb_t)(esp_ble_mesh_prov_cb_event_t event,
+                                        esp_ble_mesh_prov_cb_param_t *param);
+
+/**
+ * @brief         Register BLE Mesh provisioning callback.
+ *
+ * @param[in]     callback: Pointer to the callback function.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_prov_callback(esp_ble_mesh_prov_cb_t callback);
+
+/**
+ * @brief         Check if a device has been provisioned.
+ *
+ * @return        TRUE if the device is provisioned, FALSE if the device is unprovisioned.
+ *
+ */
+bool esp_ble_mesh_node_is_provisioned(void);
+
+/**
+ * @brief         Enable specific provisioning bearers to get the device ready for provisioning.
+ *
+ * @note          PB-ADV: send unprovisioned device beacon.
+ *                PB-GATT: send connectable advertising packets.
+ *
+ * @param         bearers: Bit-wise OR of provisioning bearers.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_node_prov_enable(esp_ble_mesh_prov_bearer_t bearers);
+
+/**
+ * @brief         Disable specific provisioning bearers to make a device inaccessible for provisioning.
+ *
+ * @param         bearers: Bit-wise OR of provisioning bearers.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_node_prov_disable(esp_ble_mesh_prov_bearer_t bearers);
+
+/**
+ * @brief        Unprovisioned device set own oob public key & private key pair.
+ *
+ * @note         In order to avoid suffering brute-forcing attack (CVE-2020-26559).
+ *               The Bluetooth SIG recommends that potentially vulnerable mesh provisioners
+ *               use an out-of-band mechanism to exchange the public keys.
+ *               So as an unprovisioned device, it should use this function to input
+ *               the Public Key exchanged through the out-of-band mechanism.
+ *
+ * @param[in]    pub_key_x:   Unprovisioned device's Public Key X
+ * @param[in]    pub_key_y:   Unprovisioned device's Public Key Y
+ * @param[in]    private_key: Unprovisioned device's Private Key
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ */
+esp_err_t esp_ble_mesh_node_set_oob_pub_key(uint8_t pub_key_x[32], uint8_t pub_key_y[32],
+                                            uint8_t private_key[32]);
+
+/**
+ * @brief        Provide provisioning input OOB number.
+ *
+ * @note         This is intended to be called if the user has received ESP_BLE_MESH_NODE_PROV_INPUT_EVT
+ *               with ESP_BLE_MESH_ENTER_NUMBER as the action.
+ *
+ * @param[in]    number: Number input by device.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_node_input_number(uint32_t number);
+
+/**
+ * @brief        Provide provisioning input OOB string.
+ *
+ * @note         This is intended to be called if the user has received ESP_BLE_MESH_NODE_PROV_INPUT_EVT
+ *               with ESP_BLE_MESH_ENTER_STRING as the action.
+ *
+ * @param[in]    string: String input by device.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_node_input_string(const char *string);
+
+/**
+ * @brief        Using this function, an unprovisioned device can set its own device name,
+ *               which will be broadcasted in its advertising data.
+ *
+ * @param[in]    name: Unprovisioned device name
+ *
+ * @note         This API applicable to PB-GATT mode only by setting the name to the scan response data,
+ *               it doesn't apply to PB-ADV mode.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_set_unprovisioned_device_name(const char *name);
+
+/**
+ * @brief        Provisioner inputs unprovisioned device's oob public key.
+ *
+ * @note         In order to avoid suffering brute-forcing attack (CVE-2020-26559).
+ *               The Bluetooth SIG recommends that potentially vulnerable mesh provisioners
+ *               use an out-of-band mechanism to exchange the public keys.
+ *
+ * @param[in]    link_idx:   The provisioning link index
+ * @param[in]    pub_key_x:  Unprovisioned device's Public Key X
+ * @param[in]    pub_key_y:  Unprovisioned device's Public Key Y
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ */
+esp_err_t esp_ble_mesh_provisioner_read_oob_pub_key(uint8_t link_idx, uint8_t pub_key_x[32],
+                                                    uint8_t pub_key_y[32]);
+
+/**
+ * @brief        Provide provisioning input OOB string.
+ *
+ *               This is intended to be called after the esp_ble_mesh_prov_t prov_input_num
+ *               callback has been called with ESP_BLE_MESH_ENTER_STRING as the action.
+ *
+ * @param[in]    string:   String input by Provisioner.
+ * @param[in]    link_idx: The provisioning link index.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_input_string(const char *string, uint8_t link_idx);
+
+/**
+ * @brief        Provide provisioning input OOB number.
+ *
+ *               This is intended to be called after the esp_ble_mesh_prov_t prov_input_num
+ *               callback has been called with ESP_BLE_MESH_ENTER_NUMBER as the action.
+ *
+ * @param[in]    number:   Number input by Provisioner.
+ * @param[in]    link_idx: The provisioning link index.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_input_number(uint32_t number, uint8_t link_idx);
+
+/**
+ * @brief        Enable one or more provisioning bearers.
+ *
+ * @param[in]    bearers: Bit-wise OR of provisioning bearers.
+ *
+ * @note         PB-ADV: Enable BLE scan.
+ *               PB-GATT: Initialize corresponding BLE Mesh Proxy info.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_prov_enable(esp_ble_mesh_prov_bearer_t bearers);
+
+/**
+ * @brief        Disable one or more provisioning bearers.
+ *
+ * @param[in]    bearers: Bit-wise OR of provisioning bearers.
+ *
+ * @note         PB-ADV: Disable BLE scan.
+ *               PB-GATT: Break any existing BLE Mesh Provisioning connections.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_prov_disable(esp_ble_mesh_prov_bearer_t bearers);
+
+/**
+ * @brief        Add unprovisioned device info to the unprov_dev queue.
+ *
+ * @param[in]    add_dev: Pointer to a struct containing the device information
+ * @param[in]    flags: Flags indicate several operations on the device information
+ *                      - Remove device information from queue after device has been provisioned (BIT0)
+ *                      - Start provisioning immediately after device is added to queue (BIT1)
+ *                      - Device can be removed if device queue is full (BIT2)
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ * @note:        1. Currently address type only supports public address and static random address.
+ *               2. If device UUID and/or device address as well as address type already exist in the
+ *                  device queue, but the bearer is different from the existing one, add operation
+ *                  will also be successful and it will update the provision bearer supported by
+ *                  the device.
+ *               3. For example, if the Provisioner wants to add an unprovisioned device info before
+ *                  receiving its unprovisioned device beacon or Mesh Provisioning advertising packets,
+ *                  the Provisioner can use this API to add the device info with each one or both of
+ *                  device UUID and device address added. When the Provisioner gets the device's
+ *                  advertising packets, it will start provisioning the device internally.
+ *                  - In this situation, the Provisioner can set bearers with each one or both of
+ *                    ESP_BLE_MESH_PROV_ADV and ESP_BLE_MESH_PROV_GATT enabled, and cannot set flags
+ *                    with ADD_DEV_START_PROV_NOW_FLAG enabled.
+ *               4. Another example is when the Provisioner receives the unprovisioned device's beacon or
+ *                  Mesh Provisioning advertising packets, the advertising packets will be reported on to
+ *                  the application layer using the callback registered by the function
+ *                  esp_ble_mesh_register_prov_callback. And in the callback, the Provisioner
+ *                  can call this API to start provisioning the device.
+ *                  - If the Provisioner uses PB-ADV to provision, either one or both of device UUID and
+ *                    device address can be added, bearers shall be set with ESP_BLE_MESH_PROV_ADV
+ *                    enabled and the flags shall be set with ADD_DEV_START_PROV_NOW_FLAG enabled.
+ *                  - If the Provisioner uses PB-GATT to provision, both the device UUID and device
+ *                    address need to be added, bearers shall be set with ESP_BLE_MESH_PROV_GATT enabled,
+ *                    and the flags shall be set with ADD_DEV_START_PROV_NOW_FLAG enabled.
+ *                  - If the Provisioner just wants to store the unprovisioned device info when receiving
+ *                    its advertising packets and start to provision it the next time (e.g. after receiving
+ *                    its advertising packets again), then it can add the device info with either one or both
+ *                    of device UUID and device address included. Bearers can be set with either one or both
+ *                    of ESP_BLE_MESH_PROV_ADV and ESP_BLE_MESH_PROV_GATT enabled (recommend to enable the
+ *                    bearer which will receive its advertising packets, because if the other bearer is
+ *                    enabled, the Provisioner is not aware if the device supports the bearer), and flags
+ *                    cannot be set with ADD_DEV_START_PROV_NOW_FLAG enabled.
+ *                  - Note: ESP_BLE_MESH_PROV_ADV, ESP_BLE_MESH_PROV_GATT and ADD_DEV_START_PROV_NOW_FLAG
+ *                          can not be enabled at the same time.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_add_unprov_dev(esp_ble_mesh_unprov_dev_add_t *add_dev,
+                                                  esp_ble_mesh_dev_add_flag_t flags);
+
+/** @brief Provision an unprovisioned device and assign a fixed unicast address for it in advance.
+ *
+ *  @param[in] uuid:         Device UUID of the unprovisioned device
+ *  @param[in] addr:         Device address of the unprovisioned device
+ *  @param[in] addr_type:    Device address type of the unprovisioned device
+ *  @param[in] bearer:       Provisioning bearer going to be used by Provisioner
+ *  @param[in] oob_info:     OOB info of the unprovisioned device
+ *  @param[in] unicast_addr: Unicast address going to be allocated for the unprovisioned device
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ *
+ *  @note: 1. Currently address type only supports public address and static random address.
+ *         2. Bearer must be equal to ESP_BLE_MESH_PROV_ADV or ESP_BLE_MESH_PROV_GATT, since
+ *            Provisioner will start to provision a device immediately once this function is
+ *            invoked. And the input bearer must be identical with the one within the parameters
+ *            of the ESP_BLE_MESH_PROVISIONER_RECV_UNPROV_ADV_PKT_EVT event.
+ *         3. If this function is used by a Provisioner to provision devices, the application
+ *            should take care of the assigned unicast address and avoid overlap of the unicast
+ *            addresses of different nodes.
+ *         4. Recommend to use only one of the functions "esp_ble_mesh_provisioner_add_unprov_dev"
+ *            and "esp_ble_mesh_provisioner_prov_device_with_addr" by a Provisioner.
+ */
+esp_err_t esp_ble_mesh_provisioner_prov_device_with_addr(const uint8_t uuid[16],
+                                                         esp_ble_mesh_bd_addr_t addr,
+                                                         esp_ble_mesh_addr_type_t addr_type,
+                                                         esp_ble_mesh_prov_bearer_t bearer,
+                                                         uint16_t oob_info, uint16_t unicast_addr);
+
+/**
+ * @brief        Delete device from queue, and reset current provisioning link with the device.
+ *
+ * @note         If the device is in the queue, remove it from the queue; if the device is
+ *               being provisioned, terminate the provisioning procedure. Either one of the
+ *               device address or device UUID can be used as input.
+ *
+ * @param[in]    del_dev: Pointer to a struct containing the device information.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_delete_dev(esp_ble_mesh_device_delete_t *del_dev);
+
+/**
+ * @brief        Callback for Provisioner that received advertising packets from unprovisioned devices which are
+ *               not in the unprovisioned device queue.
+ *
+ *               Report on the unprovisioned device beacon and mesh provisioning service adv data to application.
+ *
+ * @param[in]    addr: Pointer to the unprovisioned device address.
+ * @param[in]    addr_type: Unprovisioned device address type.
+ * @param[in]    adv_type: Adv packet type(ADV_IND or ADV_NONCONN_IND).
+ * @param[in]    dev_uuid: Unprovisioned device UUID pointer.
+ * @param[in]    oob_info: OOB information of the unprovisioned device.
+ * @param[in]    bearer: Adv packet received from PB-GATT or PB-ADV bearer.
+ *
+ */
+typedef void (*esp_ble_mesh_prov_adv_cb_t)(const esp_ble_mesh_bd_addr_t addr, const esp_ble_mesh_addr_type_t addr_type,
+                                           const uint8_t adv_type, const uint8_t *dev_uuid,
+                                           uint16_t oob_info, esp_ble_mesh_prov_bearer_t bearer);
+
+/**
+ * @brief         This function is called by Provisioner to set the part of the device UUID
+ *                to be compared before starting to provision.
+ *
+ * @param[in]     match_val: Value to be compared with the part of the device UUID.
+ * @param[in]     match_len: Length of the compared match value.
+ * @param[in]     offset: Offset of the device UUID to be compared (based on zero).
+ * @param[in]     prov_after_match: Flag used to indicate whether provisioner should start to provision
+ *                                  the device immediately if the part of the UUID matches.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_set_dev_uuid_match(const uint8_t *match_val, uint8_t match_len,
+                                                      uint8_t offset, bool prov_after_match);
+
+/**
+ * @brief         This function is called by Provisioner to set provisioning data information
+ *                before starting to provision.
+ *
+ * @param[in]     prov_data_info: Pointer to a struct containing net_idx or flags or iv_index.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_set_prov_data_info(esp_ble_mesh_prov_data_info_t *prov_data_info);
+
+/**
+ * @brief         This function is called by Provisioner to set static oob value used for provisioning.
+ *
+ * @note          The Bluetooth SIG recommends that mesh implementations enforce a randomly selected
+ *                AuthValue using all of the available bits, where permitted by the implementation.
+ *                A large entropy helps ensure that a brute-force of the AuthValue, even a static
+ *                AuthValue, cannot normally be completed in a reasonable time (CVE-2020-26557).
+ *
+ *                AuthValues selected using a cryptographically secure random or pseudorandom number
+ *                generator and having the maximum permitted entropy (128-bits) will be most difficult
+ *                to brute-force. AuthValues with reduced entropy or generated in a predictable manner
+ *                will not grant the same level of protection against this vulnerability. Selecting a
+ *                new AuthValue with each provisioning attempt can also make it more difficult to launch
+ *                a brute-force attack by requiring the attacker to restart the search with each
+ *                provisioning attempt (CVE-2020-26556).
+ *
+ * @param[in]     value:  Pointer to the static oob value.
+ * @param[in]     length: Length of the static oob value.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_set_static_oob_value(const uint8_t *value, uint8_t length);
+
+/**
+ * @brief         This function is called by Provisioner to set own Primary element address.
+ *
+ * @note          This API must be invoked when BLE Mesh initialization is completed successfully,
+ *                and can be invoked before Provisioner functionality is enabled.
+ *                Once this API is invoked successfully, the prov_unicast_addr value in the struct
+ *                esp_ble_mesh_prov_t will be ignored, and Provisioner will use this address as its
+ *                own primary element address.
+ *                And if the unicast address going to assigned for the next unprovisioned device is
+ *                smaller than the input address + element number of Provisioner, then the address
+ *                for the next unprovisioned device will be recalculated internally.
+ *
+ * @param[in]     addr: Unicast address of the Primary element of Provisioner.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_provisioner_set_primary_elem_addr(uint16_t addr);
+
+/**
+ * @brief         This function is called to set provisioning data information before starting
+ *                fast provisioning.
+ *
+ * @param[in]     fast_prov_info: Pointer to a struct containing unicast address range, net_idx, etc.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_set_fast_prov_info(esp_ble_mesh_fast_prov_info_t *fast_prov_info);
+
+/**
+ * @brief         This function is called to start/suspend/exit fast provisioning.
+ *
+ * @param[in]     action: fast provisioning action (i.e. enter, suspend, exit).
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_set_fast_prov_action(esp_ble_mesh_fast_prov_action_t action);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_PROVISIONING_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_proxy_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_proxy_api.h
new file mode 100644
index 00000000000..c29e284481e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/core/include/esp_ble_mesh_proxy_api.h
@@ -0,0 +1,118 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_BLE_MESH_PROXY_API_H_
+#define _ESP_BLE_MESH_PROXY_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   Enable advertising with Node Identity.
+ *
+ * @note    This API requires that GATT Proxy support be enabled. Once called,
+ *          each subnet starts advertising using Node Identity for the next 60
+ *          seconds, and after 60s Network ID will be advertised.
+ *          Under normal conditions, the BLE Mesh Proxy Node Identity and
+ *          Network ID advertising will be enabled automatically by BLE Mesh
+ *          stack after the device is provisioned.
+ *
+ * @return  ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_proxy_identity_enable(void);
+
+/**
+ * @brief   Enable BLE Mesh GATT Proxy Service.
+ *
+ * @return  ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_proxy_gatt_enable(void);
+
+/**
+ * @brief   Disconnect the BLE Mesh GATT Proxy connection if there is any, and
+ *          disable the BLE Mesh GATT Proxy Service.
+ *
+ * @return  ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_proxy_gatt_disable(void);
+
+/**
+ * @brief        Proxy Client creates a connection with the Proxy Server.
+ *
+ * @param[in]    addr:      Device address of the Proxy Server.
+ * @param[in]    addr_type: Device address type(public or static random).
+ * @param[in]    net_idx:   NetKey Index related with Network ID in the Mesh Proxy
+ *                          advertising packet.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_proxy_client_connect(esp_ble_mesh_bd_addr_t addr,
+                                            esp_ble_mesh_addr_type_t addr_type,
+                                            uint16_t net_idx);
+
+/**
+ * @brief        Proxy Client terminates a connection with the Proxy Server.
+ *
+ * @param[in]    conn_handle: Proxy connection handle.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_proxy_client_disconnect(uint8_t conn_handle);
+
+/**
+ * @brief        Proxy Client sets the filter type of the Proxy Server.
+ *
+ * @param[in]    conn_handle: Proxy connection handle.
+ * @param[in]    net_idx:     Corresponding NetKey Index.
+ * @param[in]    filter_type: whitelist or blacklist.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_proxy_client_set_filter_type(uint8_t conn_handle, uint16_t net_idx,
+                                                    esp_ble_mesh_proxy_filter_type_t filter_type);
+
+/**
+ * @brief        Proxy Client adds address to the Proxy Server filter list.
+ *
+ * @param[in]    conn_handle: Proxy connection handle.
+ * @param[in]    net_idx:     Corresponding NetKey Index.
+ * @param[in]    addr:        Pointer to the filter address.
+ * @param[in]    addr_num:    Number of the filter address.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_proxy_client_add_filter_addr(uint8_t conn_handle, uint16_t net_idx,
+                                                    uint16_t *addr, uint16_t addr_num);
+
+/**
+ * @brief        Proxy Client removes address from the Proxy Server filter list.
+ *
+ * @param[in]    conn_handle: Proxy connection handle.
+ * @param[in]    net_idx:     Corresponding NetKey Index.
+ * @param[in]    addr:        Pointer to the filter address.
+ * @param[in]    addr_num:    Number of the filter address.
+ *
+ * @return       ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_proxy_client_remove_filter_addr(uint8_t conn_handle, uint16_t net_idx,
+                                                       uint16_t *addr, uint16_t addr_num);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_PROXY_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/esp_ble_mesh_defs.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/esp_ble_mesh_defs.h
new file mode 100644
index 00000000000..3fff33363be
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/esp_ble_mesh_defs.h
@@ -0,0 +1,2275 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_BLE_MESH_DEFS_H_
+#define _ESP_BLE_MESH_DEFS_H_
+
+#include <stdint.h>
+
+#include "mesh_config.h"
+#include "mesh_common.h"
+#include "proxy_server.h"
+#include "provisioner_main.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*!< The maximum length of a BLE Mesh message, including Opcode, Payload and TransMIC */
+#define ESP_BLE_MESH_SDU_MAX_LEN            384
+
+/*!< Length of a short Mesh MIC. */
+#define ESP_BLE_MESH_MIC_SHORT              4
+
+/*!< Length of a long Mesh MIC. */
+#define ESP_BLE_MESH_MIC_LONG               8
+
+/*!< The maximum length of a BLE Mesh provisioned node name */
+#define ESP_BLE_MESH_NODE_NAME_MAX_LEN      31
+
+/*!< The maximum length of a BLE Mesh unprovisioned device name */
+#define ESP_BLE_MESH_DEVICE_NAME_MAX_LEN    DEVICE_NAME_SIZE
+
+/*!< The maximum length of settings user id */
+#define ESP_BLE_MESH_SETTINGS_UID_SIZE      20
+
+/*!< Invalid settings index */
+#define ESP_BLE_MESH_INVALID_SETTINGS_IDX   0xFF
+
+/*!< Define the BLE Mesh octet 16 bytes size */
+#define ESP_BLE_MESH_OCTET16_LEN    16
+typedef uint8_t esp_ble_mesh_octet16_t[ESP_BLE_MESH_OCTET16_LEN];
+
+/*!< Define the BLE Mesh octet 8 bytes size */
+#define ESP_BLE_MESH_OCTET8_LEN     8
+typedef uint8_t esp_ble_mesh_octet8_t[ESP_BLE_MESH_OCTET8_LEN];
+
+/*!< Invalid Company ID */
+#define ESP_BLE_MESH_CID_NVAL                     0xFFFF
+
+/*!< Special TTL value to request using configured default TTL */
+#define ESP_BLE_MESH_TTL_DEFAULT                  0xFF
+
+/*!< Maximum allowed TTL value */
+#define ESP_BLE_MESH_TTL_MAX                      0x7F
+
+#define ESP_BLE_MESH_ADDR_UNASSIGNED              0x0000
+#define ESP_BLE_MESH_ADDR_ALL_NODES               0xFFFF
+#define ESP_BLE_MESH_ADDR_PROXIES                 0xFFFC
+#define ESP_BLE_MESH_ADDR_FRIENDS                 0xFFFD
+#define ESP_BLE_MESH_ADDR_RELAYS                  0xFFFE
+
+#define ESP_BLE_MESH_KEY_UNUSED                   0xFFFF
+#define ESP_BLE_MESH_KEY_DEV                      0xFFFE
+
+#define ESP_BLE_MESH_KEY_PRIMARY                  0x0000
+#define ESP_BLE_MESH_KEY_ANY                      0xFFFF
+
+/*!< Primary Network Key index */
+#define ESP_BLE_MESH_NET_PRIMARY                  0x000
+
+/*!< Relay state value */
+#define ESP_BLE_MESH_RELAY_DISABLED               0x00
+#define ESP_BLE_MESH_RELAY_ENABLED                0x01
+#define ESP_BLE_MESH_RELAY_NOT_SUPPORTED          0x02
+
+/*!< Beacon state value */
+#define ESP_BLE_MESH_BEACON_DISABLED              0x00
+#define ESP_BLE_MESH_BEACON_ENABLED               0x01
+
+/*!< GATT Proxy state value */
+#define ESP_BLE_MESH_GATT_PROXY_DISABLED          0x00
+#define ESP_BLE_MESH_GATT_PROXY_ENABLED           0x01
+#define ESP_BLE_MESH_GATT_PROXY_NOT_SUPPORTED     0x02
+
+/*!< Friend state value */
+#define ESP_BLE_MESH_FRIEND_DISABLED              0x00
+#define ESP_BLE_MESH_FRIEND_ENABLED               0x01
+#define ESP_BLE_MESH_FRIEND_NOT_SUPPORTED         0x02
+
+/*!< Node identity state value */
+#define ESP_BLE_MESH_NODE_IDENTITY_STOPPED        0x00
+#define ESP_BLE_MESH_NODE_IDENTITY_RUNNING        0x01
+#define ESP_BLE_MESH_NODE_IDENTITY_NOT_SUPPORTED  0x02
+
+/*!< Supported features */
+#define ESP_BLE_MESH_FEATURE_RELAY                BIT(0)
+#define ESP_BLE_MESH_FEATURE_PROXY                BIT(1)
+#define ESP_BLE_MESH_FEATURE_FRIEND               BIT(2)
+#define ESP_BLE_MESH_FEATURE_LOW_POWER            BIT(3)
+#define ESP_BLE_MESH_FEATURE_ALL_SUPPORTED        (ESP_BLE_MESH_FEATURE_RELAY |     \
+                                                   ESP_BLE_MESH_FEATURE_PROXY |     \
+                                                   ESP_BLE_MESH_FEATURE_FRIEND |    \
+                                                   ESP_BLE_MESH_FEATURE_LOW_POWER)
+
+#define ESP_BLE_MESH_ADDR_IS_UNICAST(addr)        ((addr) && (addr) < 0x8000)
+#define ESP_BLE_MESH_ADDR_IS_GROUP(addr)          ((addr) >= 0xC000 && (addr) <= 0xFF00)
+#define ESP_BLE_MESH_ADDR_IS_VIRTUAL(addr)        ((addr) >= 0x8000 && (addr) < 0xC000)
+#define ESP_BLE_MESH_ADDR_IS_RFU(addr)            ((addr) >= 0xFF00 && (addr) <= 0xFFFB)
+
+#define ESP_BLE_MESH_INVALID_NODE_INDEX           0xFFFF
+
+/** @def    ESP_BLE_MESH_TRANSMIT
+ *
+ *  @brief  Encode transmission count & interval steps.
+ *
+ *  @note   For example, ESP_BLE_MESH_TRANSMIT(2, 20) means that the message
+ *          will be sent about 90ms(count is 3, step is 1, interval is 30 ms
+ *          which includes 10ms of advertising interval random delay).
+ *
+ *  @param  count   Number of retransmissions (first transmission is excluded).
+ *  @param  int_ms  Interval steps in milliseconds. Must be greater than 0
+ *                  and a multiple of 10.
+ *
+ *  @return BLE Mesh transmit value that can be used e.g. for the default
+ *          values of the Configuration Model data.
+ */
+#define ESP_BLE_MESH_TRANSMIT(count, int_ms)    ((count) | (((int_ms / 10) - 1) << 3))
+
+/** @def ESP_BLE_MESH_GET_TRANSMIT_COUNT
+ *
+ *  @brief Decode transmit count from a transmit value.
+ *
+ *  @param transmit Encoded transmit count & interval value.
+ *
+ *  @return Transmission count (actual transmissions equal to N + 1).
+ */
+#define ESP_BLE_MESH_GET_TRANSMIT_COUNT(transmit)   (((transmit) & (uint8_t)BIT_MASK(3)))
+
+/** @def ESP_BLE_MESH_GET_TRANSMIT_INTERVAL
+ *
+ *  @brief Decode transmit interval from a transmit value.
+ *
+ *  @param transmit Encoded transmit count & interval value.
+ *
+ *  @return Transmission interval in milliseconds.
+ */
+#define ESP_BLE_MESH_GET_TRANSMIT_INTERVAL(transmit)    ((((transmit) >> 3) + 1) * 10)
+
+/** @def ESP_BLE_MESH_PUBLISH_TRANSMIT
+ *
+ *  @brief Encode Publish Retransmit count & interval steps.
+ *
+ *  @param count   Number of retransmissions (first transmission is excluded).
+ *  @param int_ms  Interval steps in milliseconds. Must be greater than 0
+ *                 and a multiple of 50.
+ *
+ *  @return BLE Mesh transmit value that can be used e.g. for the default
+ *          values of the Configuration Model data.
+ */
+#define ESP_BLE_MESH_PUBLISH_TRANSMIT(count, int_ms)    ESP_BLE_MESH_TRANSMIT(count, (int_ms) / 5)
+
+/** @def ESP_BLE_MESH_GET_PUBLISH_TRANSMIT_COUNT
+ *
+ *  @brief Decode Publish Retransmit count from a given value.
+ *
+ *  @param transmit Encoded Publish Retransmit count & interval value.
+ *
+ *  @return Retransmission count (actual transmissions equal to N + 1).
+ */
+#define ESP_BLE_MESH_GET_PUBLISH_TRANSMIT_COUNT(transmit)   ESP_BLE_MESH_GET_TRANSMIT_COUNT(transmit)
+
+/** @def ESP_BLE_MESH_GET_PUBLISH_TRANSMIT_INTERVAL
+ *
+ *  @brief Decode Publish Retransmit interval from a given value.
+ *
+ *  @param transmit Encoded Publish Retransmit count & interval value.
+ *
+ *  @return Transmission interval in milliseconds.
+ */
+#define ESP_BLE_MESH_GET_PUBLISH_TRANSMIT_INTERVAL(transmit)    ((((transmit) >> 3) + 1) * 50)
+
+/*!< Callbacks which are not needed to be initialized by users (set with 0 and will be initialized internally) */
+typedef uint32_t esp_ble_mesh_cb_t;
+
+typedef enum {
+    ESP_BLE_MESH_TYPE_PROV_CB,
+    ESP_BLE_MESH_TYPE_OUTPUT_NUM_CB,
+    ESP_BLE_MESH_TYPE_OUTPUT_STR_CB,
+    ESP_BLE_MESH_TYPE_INTPUT_CB,
+    ESP_BLE_MESH_TYPE_LINK_OPEN_CB,
+    ESP_BLE_MESH_TYPE_LINK_CLOSE_CB,
+    ESP_BLE_MESH_TYPE_COMPLETE_CB,
+    ESP_BLE_MESH_TYPE_RESET_CB,
+} esp_ble_mesh_cb_type_t;
+
+/*!< This enum value is provisioning authentication oob method */
+typedef enum {
+    ESP_BLE_MESH_NO_OOB,
+    ESP_BLE_MESH_STATIC_OOB,
+    ESP_BLE_MESH_OUTPUT_OOB,
+    ESP_BLE_MESH_INPUT_OOB,
+} esp_ble_mesh_oob_method_t;
+
+/*!< This enum value is associated with bt_mesh_output_action_t in mesh_main.h */
+typedef enum {
+    ESP_BLE_MESH_NO_OUTPUT       = 0,
+    ESP_BLE_MESH_BLINK           = BIT(0),
+    ESP_BLE_MESH_BEEP            = BIT(1),
+    ESP_BLE_MESH_VIBRATE         = BIT(2),
+    ESP_BLE_MESH_DISPLAY_NUMBER  = BIT(3),
+    ESP_BLE_MESH_DISPLAY_STRING  = BIT(4),
+} esp_ble_mesh_output_action_t;
+
+/*!< This enum value is associated with bt_mesh_input_action_t in mesh_main.h */
+typedef enum {
+    ESP_BLE_MESH_NO_INPUT      = 0,
+    ESP_BLE_MESH_PUSH          = BIT(0),
+    ESP_BLE_MESH_TWIST         = BIT(1),
+    ESP_BLE_MESH_ENTER_NUMBER  = BIT(2),
+    ESP_BLE_MESH_ENTER_STRING  = BIT(3),
+} esp_ble_mesh_input_action_t;
+
+/*!< This enum value is associated with bt_mesh_prov_bearer_t in mesh_main.h */
+typedef enum {
+    ESP_BLE_MESH_PROV_ADV   = BIT(0),
+    ESP_BLE_MESH_PROV_GATT  = BIT(1),
+} esp_ble_mesh_prov_bearer_t;
+
+/*!< This enum value is associated with bt_mesh_prov_oob_info_t in mesh_main.h */
+typedef enum {
+    ESP_BLE_MESH_PROV_OOB_OTHER     = BIT(0),
+    ESP_BLE_MESH_PROV_OOB_URI       = BIT(1),
+    ESP_BLE_MESH_PROV_OOB_2D_CODE   = BIT(2),
+    ESP_BLE_MESH_PROV_OOB_BAR_CODE  = BIT(3),
+    ESP_BLE_MESH_PROV_OOB_NFC       = BIT(4),
+    ESP_BLE_MESH_PROV_OOB_NUMBER    = BIT(5),
+    ESP_BLE_MESH_PROV_OOB_STRING    = BIT(6),
+    /* 7 - 10 are reserved */
+    ESP_BLE_MESH_PROV_OOB_ON_BOX    = BIT(11),
+    ESP_BLE_MESH_PROV_OOB_IN_BOX    = BIT(12),
+    ESP_BLE_MESH_PROV_OOB_ON_PAPER  = BIT(13),
+    ESP_BLE_MESH_PROV_OOB_IN_MANUAL = BIT(14),
+    ESP_BLE_MESH_PROV_OOB_ON_DEV    = BIT(15),
+} esp_ble_mesh_prov_oob_info_t;
+
+/*!< Maximum length of value used by Static OOB authentication */
+#define ESP_BLE_MESH_PROV_STATIC_OOB_MAX_LEN    16
+
+/*!< Maximum length of string used by Output OOB authentication */
+#define ESP_BLE_MESH_PROV_OUTPUT_OOB_MAX_LEN    8
+
+/*!< Maximum length of string used by Output OOB authentication */
+#define ESP_BLE_MESH_PROV_INPUT_OOB_MAX_LEN     8
+
+/*!< Macros used to define message opcode */
+#define ESP_BLE_MESH_MODEL_OP_1(b0)         (b0)
+#define ESP_BLE_MESH_MODEL_OP_2(b0, b1)     (((b0) << 8) | (b1))
+#define ESP_BLE_MESH_MODEL_OP_3(b0, cid)    ((((b0) << 16) | 0xC00000) | (cid))
+
+/*!< This macro is associated with BLE_MESH_MODEL_CB in mesh_access.h */
+#define ESP_BLE_MESH_SIG_MODEL(_id, _op, _pub, _user_data)          \
+{                                                                   \
+    .model_id = (_id),                                              \
+    .op = _op,                                                      \
+    .keys = { [0 ... (CONFIG_BLE_MESH_MODEL_KEY_COUNT - 1)] =       \
+            ESP_BLE_MESH_KEY_UNUSED },                              \
+    .pub = _pub,                                                    \
+    .groups = { [0 ... (CONFIG_BLE_MESH_MODEL_GROUP_COUNT - 1)] =   \
+            ESP_BLE_MESH_ADDR_UNASSIGNED },                         \
+    .user_data = _user_data,                                        \
+}
+
+/*!< This macro is associated with BLE_MESH_MODEL_VND_CB in mesh_access.h */
+#define ESP_BLE_MESH_VENDOR_MODEL(_company, _id, _op, _pub, _user_data) \
+{                                                                       \
+    .vnd.company_id = (_company),                                       \
+    .vnd.model_id = (_id),                                              \
+    .op = _op,                                                          \
+    .pub = _pub,                                                        \
+    .keys = { [0 ... (CONFIG_BLE_MESH_MODEL_KEY_COUNT - 1)] =           \
+            ESP_BLE_MESH_KEY_UNUSED },                                  \
+    .groups = { [0 ... (CONFIG_BLE_MESH_MODEL_GROUP_COUNT - 1)] =       \
+            ESP_BLE_MESH_ADDR_UNASSIGNED },                             \
+    .user_data = _user_data,                                            \
+}
+
+/** @brief Helper to define a BLE Mesh element within an array.
+ *
+ *  In case the element has no SIG or Vendor models, the helper
+ *  macro ESP_BLE_MESH_MODEL_NONE can be given instead.
+ *
+ *  @note This macro is associated with BLE_MESH_ELEM in mesh_access.h
+ *
+ *  @param _loc       Location Descriptor.
+ *  @param _mods      Array of SIG models.
+ *  @param _vnd_mods  Array of vendor models.
+ */
+#define ESP_BLE_MESH_ELEMENT(_loc, _mods, _vnd_mods)    \
+{                                                       \
+    .location         = (_loc),                         \
+    .sig_model_count  = ARRAY_SIZE(_mods),              \
+    .sig_models       = (_mods),                        \
+    .vnd_model_count  = ARRAY_SIZE(_vnd_mods),          \
+    .vnd_models       = (_vnd_mods),                    \
+}
+
+#define ESP_BLE_MESH_PROV(uuid, sta_val, sta_val_len, out_size, out_act, in_size, in_act) { \
+    .uuid           = uuid,         \
+    .static_val     = sta_val,      \
+    .static_val_len = sta_val_len,  \
+    .output_size    = out_size,     \
+    .output_action  = out_act,      \
+    .input_size     = in_size,      \
+    .input_action   = in_act,       \
+}
+
+typedef uint8_t UINT8;
+typedef uint16_t UINT16;
+typedef uint32_t UINT32;
+typedef uint64_t UINT64;
+
+#define BT_OCTET32_LEN    32
+typedef UINT8 BT_OCTET32[BT_OCTET32_LEN];   /* octet array: size 32 */
+
+
+#ifndef BD_ADDR_LEN
+#define BD_ADDR_LEN     6
+typedef uint8_t BD_ADDR[BD_ADDR_LEN];
+#endif
+
+typedef uint8_t esp_ble_mesh_bd_addr_t[BD_ADDR_LEN];
+
+#define ESP_BLE_MESH_ADDR_TYPE_PUBLIC       0x00
+#define ESP_BLE_MESH_ADDR_TYPE_RANDOM       0x01
+#define ESP_BLE_MESH_ADDR_TYPE_RPA_PUBLIC   0x02
+#define ESP_BLE_MESH_ADDR_TYPE_RPA_RANDOM   0x03
+/// BLE device address type
+typedef uint8_t esp_ble_mesh_addr_type_t;
+
+/** BLE Mesh deinit parameters */
+typedef struct {
+    bool erase_flash;   /*!< Indicate if erasing flash when deinit mesh stack */
+} esp_ble_mesh_deinit_param_t;
+
+typedef struct esp_ble_mesh_model esp_ble_mesh_model_t;
+
+/** Abstraction that describes a BLE Mesh Element.
+ *  This structure is associated with struct bt_mesh_elem in mesh_access.h
+ */
+typedef struct {
+    /** Element Address, assigned during provisioning. */
+    uint16_t element_addr;
+
+    /** Location Descriptor (GATT Bluetooth Namespace Descriptors) */
+    const uint16_t location;
+
+    const uint8_t sig_model_count;      /*!< SIG Model count */
+    const uint8_t vnd_model_count;      /*!< Vendor Model count */
+
+    esp_ble_mesh_model_t *sig_models;   /*!< SIG Models */
+    esp_ble_mesh_model_t *vnd_models;   /*!< Vendor Models */
+} esp_ble_mesh_elem_t;
+
+/** Abstraction that describes a model publication context.
+ *  This structure is associated with struct bt_mesh_model_pub in mesh_access.h
+ */
+typedef struct {
+    /** Pointer to the model to which the context belongs. Initialized by the stack. */
+    esp_ble_mesh_model_t *model;
+
+    uint16_t publish_addr;  /*!< Publish Address. */
+    uint16_t app_idx:12,    /*!< Publish AppKey Index. */
+             cred:1,        /*!< Friendship Credentials Flag. */
+             send_rel:1;    /*!< Force reliable sending (segment acks) */
+
+    uint8_t  ttl;           /*!< Publish Time to Live. */
+    uint8_t  retransmit;    /*!< Retransmit Count & Interval Steps. */
+
+    uint8_t  period;        /*!< Publish Period. */
+    uint8_t  period_div:4,  /*!< Divisor for the Period. */
+             fast_period:1, /*!< Use FastPeriodDivisor */
+             count:3;       /*!< Retransmissions left. */
+
+    uint32_t period_start; /*!< Start of the current period. */
+
+    /** @brief Publication buffer, containing the publication message.
+     *
+     *  This will get correctly created when the publication context
+     *  has been defined using the ESP_BLE_MESH_MODEL_PUB_DEFINE macro.
+     *
+     *  ESP_BLE_MESH_MODEL_PUB_DEFINE(name, size);
+     */
+    struct net_buf_simple *msg;
+
+    /** Callback used to update publish message. Initialized by the stack. */
+    esp_ble_mesh_cb_t update;
+
+    /** Publish Period Timer. Initialized by the stack. */
+    struct k_delayed_work timer;
+
+    /** Role of the device that is going to publish messages */
+    uint8_t dev_role;
+} esp_ble_mesh_model_pub_t;
+
+/** @def ESP_BLE_MESH_MODEL_PUB_DEFINE
+ *
+ *  Define a model publication context.
+ *
+ *  @param _name    Variable name given to the context.
+ *  @param _msg_len Length of the publication message.
+ *  @param _role    Role of the device which contains the model.
+ */
+#define ESP_BLE_MESH_MODEL_PUB_DEFINE(_name, _msg_len, _role) \
+    NET_BUF_SIMPLE_DEFINE_STATIC(bt_mesh_pub_msg_##_name, _msg_len); \
+    static esp_ble_mesh_model_pub_t _name = { \
+        .update = (uint32_t)NULL, \
+        .msg = &bt_mesh_pub_msg_##_name, \
+        .dev_role = _role, \
+    }
+
+/** @def ESP_BLE_MESH_MODEL_OP
+ *
+ *  Define a model operation context.
+ *
+ *  @param _opcode  Message opcode.
+ *  @param _min_len Message minimum length.
+ */
+#define ESP_BLE_MESH_MODEL_OP(_opcode, _min_len) \
+{ \
+    .opcode = _opcode, \
+    .min_len = _min_len, \
+    .param_cb = (uint32_t)NULL, \
+}
+
+/** Abstraction that describes a model operation context.
+ *  This structure is associated with struct bt_mesh_model_op in mesh_access.h
+ */
+typedef struct {
+    const uint32_t    opcode;   /*!< Message opcode */
+    const size_t      min_len;  /*!< Message minimum length */
+    esp_ble_mesh_cb_t param_cb; /*!< Callback used to handle message. Initialized by the stack. */
+} esp_ble_mesh_model_op_t;
+
+/** Define the terminator for the model operation table.
+ *  Each model operation struct array must use this terminator as
+ *  the end tag of the operation unit.
+ */
+#define ESP_BLE_MESH_MODEL_OP_END {0, 0, 0}
+
+/** Abstraction that describes a model callback structure.
+ *  This structure is associated with struct bt_mesh_model_cb in mesh_access.h.
+ */
+typedef struct {
+    /** Callback used during model initialization. Initialized by the stack. */
+    esp_ble_mesh_cb_t init_cb;
+
+#if CONFIG_BLE_MESH_DEINIT
+    /** Callback used during model deinitialization. Initialized by the stack. */
+    esp_ble_mesh_cb_t deinit_cb;
+#endif /* CONFIG_BLE_MESH_DEINIT */
+} esp_ble_mesh_model_cbs_t;
+
+/** Abstraction that describes a Mesh Model instance.
+ *  This structure is associated with struct bt_mesh_model in mesh_access.h
+ */
+struct esp_ble_mesh_model {
+    /** Model ID */
+    union {
+        const uint16_t model_id; /*!< 16-bit model identifier */
+        struct {
+            uint16_t company_id; /*!< 16-bit company identifier */
+            uint16_t model_id; /*!< 16-bit model identifier */
+        } vnd; /*!< Structure encapsulating a model ID with a company ID */
+    };
+
+    /** Internal information, mainly for persistent storage */
+    uint8_t  element_idx;   /*!< Belongs to Nth element */
+    uint8_t  model_idx;     /*!< Is the Nth model in the element */
+    uint16_t flags;         /*!< Information about what has changed */
+
+    /** The Element to which this Model belongs */
+    esp_ble_mesh_elem_t *element;
+
+    /** Model Publication */
+    esp_ble_mesh_model_pub_t *const pub;
+
+    /** AppKey List */
+    uint16_t keys[CONFIG_BLE_MESH_MODEL_KEY_COUNT];
+
+    /** Subscription List (group or virtual addresses) */
+    uint16_t groups[CONFIG_BLE_MESH_MODEL_GROUP_COUNT];
+
+    /** Model operation context */
+    esp_ble_mesh_model_op_t *op;
+
+    /** Model callback structure */
+    esp_ble_mesh_model_cbs_t *cb;
+
+    /** Model-specific user data */
+    void *user_data;
+};
+
+/** Helper to define an empty model array.
+ *  This structure is associated with BLE_MESH_MODEL_NONE in mesh_access.h
+ */
+#define ESP_BLE_MESH_MODEL_NONE ((esp_ble_mesh_model_t []){})
+
+/** Message sending context.
+ *  This structure is associated with struct bt_mesh_msg_ctx in mesh_access.h
+ */
+typedef struct {
+    /** NetKey Index of the subnet through which to send the message. */
+    uint16_t net_idx;
+
+    /** AppKey Index for message encryption. */
+    uint16_t app_idx;
+
+    /** Remote address. */
+    uint16_t addr;
+
+    /** Destination address of a received message. Not used for sending. */
+    uint16_t recv_dst;
+
+    /** RSSI of received packet. Not used for sending. */
+    int8_t   recv_rssi;
+
+    /** Received TTL value. Not used for sending. */
+    uint8_t  recv_ttl: 7;
+
+    /** Force sending reliably by using segment acknowledgement */
+    uint8_t  send_rel: 1;
+
+    /** TTL, or ESP_BLE_MESH_TTL_DEFAULT for default TTL. */
+    uint8_t  send_ttl;
+
+    /** Opcode of a received message. Not used for sending message. */
+    uint32_t recv_op;
+
+    /** Model corresponding to the message, no need to be initialized before sending message */
+    esp_ble_mesh_model_t *model;
+
+    /** Indicate if the message is sent by a node server model, no need to be initialized before sending message */
+    bool srv_send;
+} esp_ble_mesh_msg_ctx_t;
+
+/** Provisioning properties & capabilities.
+ *  This structure is associated with struct bt_mesh_prov in mesh_access.h
+ */
+typedef struct {
+#if CONFIG_BLE_MESH_NODE
+    /** The UUID that is used when advertising as an unprovisioned device */
+    const uint8_t *uuid;
+
+    /** Optional URI. This will be advertised separately from the
+     *  unprovisioned beacon, however the unprovisioned beacon will
+     *  contain a hash of it so the two can be associated by the
+     *  provisioner.
+     */
+    const char *uri;
+
+    /** Out of Band information field. */
+    esp_ble_mesh_prov_oob_info_t oob_info;
+
+    /* NOTE: In order to avoid suffering brute-forcing attack (CVE-2020-26559).
+     * The Bluetooth SIG recommends that potentially vulnerable mesh provisioners
+     * support an out-of-band mechanism to exchange the public keys.
+     * So as an unprovisioned device, it should enable this flag to support
+     * using an out-of-band mechanism to exchange Public Key.
+     */
+    /** Flag indicates whether unprovisioned devices support OOB public key */
+    bool oob_pub_key;
+
+    /** Callback used to notify to set OOB Public Key. Initialized by the stack. */
+    esp_ble_mesh_cb_t oob_pub_key_cb;
+
+    /** Static OOB value */
+    const uint8_t *static_val;
+    /** Static OOB value length */
+    uint8_t        static_val_len;
+
+    /** Maximum size of Output OOB supported */
+    uint8_t        output_size;
+    /** Supported Output OOB Actions */
+    uint16_t       output_actions;
+
+    /** Maximum size of Input OOB supported */
+    uint8_t        input_size;
+    /** Supported Input OOB Actions */
+    uint16_t       input_actions;
+
+    /** Callback used to output the number. Initialized by the stack. */
+    esp_ble_mesh_cb_t  output_num_cb;
+    /** Callback used to output the string. Initialized by the stack. */
+    esp_ble_mesh_cb_t  output_str_cb;
+    /** Callback used to notify to input number/string. Initialized by the stack. */
+    esp_ble_mesh_cb_t  input_cb;
+    /** Callback used to indicate that link is opened. Initialized by the stack. */
+    esp_ble_mesh_cb_t  link_open_cb;
+    /** Callback used to indicate that link is closed. Initialized by the stack. */
+    esp_ble_mesh_cb_t  link_close_cb;
+    /** Callback used to indicate that provisioning is completed. Initialized by the stack. */
+    esp_ble_mesh_cb_t  complete_cb;
+    /** Callback used to indicate that node has been reset. Initialized by the stack. */
+    esp_ble_mesh_cb_t  reset_cb;
+#endif /* CONFIG_BLE_MESH_NODE */
+
+#ifdef CONFIG_BLE_MESH_PROVISIONER
+    /** Provisioner device UUID */
+    const uint8_t *prov_uuid;
+
+    /** Primary element address of the provisioner */
+    const uint16_t prov_unicast_addr;
+
+    /** Pre-incremental unicast address value to be assigned to the first device */
+    uint16_t       prov_start_address;
+
+    /** Attention timer contained in Provisioning Invite PDU */
+    uint8_t        prov_attention;
+
+    /** Provisioning Algorithm for the Provisioner */
+    uint8_t        prov_algorithm;
+
+    /* NOTE: In order to avoid suffering brute-forcing attack (CVE-2020-26559).
+     * The Bluetooth SIG recommends that potentially vulnerable mesh provisioners
+     * use an out-of-band mechanism to exchange the public keys.
+     */
+    /** Provisioner public key oob */
+    uint8_t        prov_pub_key_oob;
+
+    /** Callback used to notify to set device OOB Public Key. Initialized by the stack. */
+    esp_ble_mesh_cb_t provisioner_prov_read_oob_pub_key;
+
+    /* NOTE: The Bluetooth SIG recommends that mesh implementations enforce a randomly
+     * selected AuthValue using all of the available bits, where permitted by the
+     * implementation. A large entropy helps ensure that a brute-force of the AuthValue,
+     * even a static AuthValue, cannot normally be completed in a reasonable time (CVE-2020-26557).
+     *
+     * AuthValues selected using a cryptographically secure random or pseudorandom number
+     * generator and having the maximum permitted entropy (128-bits) will be most difficult
+     * to brute-force. AuthValues with reduced entropy or generated in a predictable manner
+     * will not grant the same level of protection against this vulnerability. Selecting a
+     * new AuthValue with each provisioning attempt can also make it more difficult to launch
+     * a brute-force attack by requiring the attacker to restart the search with each
+     * provisioning attempt (CVE-2020-26556).
+     */
+    /** Provisioner static oob value */
+    uint8_t        *prov_static_oob_val;
+    /** Provisioner static oob value length */
+    uint8_t         prov_static_oob_len;
+
+    /** Callback used to notify to input number/string. Initialized by the stack. */
+    esp_ble_mesh_cb_t provisioner_prov_input;
+    /** Callback used to output number/string. Initialized by the stack. */
+    esp_ble_mesh_cb_t provisioner_prov_output;
+
+    /** Key refresh and IV update flag */
+    uint8_t        flags;
+
+    /** IV index */
+    uint32_t       iv_index;
+
+    /** Callback used to indicate that link is opened. Initialized by the stack. */
+    esp_ble_mesh_cb_t  provisioner_link_open;
+    /** Callback used to indicate that link is closed. Initialized by the stack. */
+    esp_ble_mesh_cb_t  provisioner_link_close;
+    /** Callback used to indicate that a device is provisioned. Initialized by the stack. */
+    esp_ble_mesh_cb_t  provisioner_prov_comp;
+#endif /* CONFIG_BLE_MESH_PROVISIONER */
+} esp_ble_mesh_prov_t;
+
+/** Node Composition data context.
+ *  This structure is associated with struct bt_mesh_comp in mesh_access.h
+ */
+typedef struct {
+    uint16_t cid;   /*!< 16-bit SIG-assigned company identifier */
+    uint16_t pid;   /*!< 16-bit vendor-assigned product identifier */
+    uint16_t vid;   /*!< 16-bit vendor-assigned product version identifier */
+
+    size_t element_count;           /*!< Element count */
+    esp_ble_mesh_elem_t *elements;  /*!< A sequence of elements */
+} esp_ble_mesh_comp_t;
+
+/*!< This enum value is the role of the device */
+typedef enum {
+    ROLE_NODE = 0,
+    ROLE_PROVISIONER,
+    ROLE_FAST_PROV,
+} esp_ble_mesh_dev_role_t;
+
+/*!< Flag which will be set when device is going to be added. */
+typedef uint8_t esp_ble_mesh_dev_add_flag_t;
+#define ADD_DEV_RM_AFTER_PROV_FLAG  BIT(0)  /*!< Device will be removed from queue after provisioned successfully */
+#define ADD_DEV_START_PROV_NOW_FLAG BIT(1)  /*!< Start provisioning device immediately */
+#define ADD_DEV_FLUSHABLE_DEV_FLAG  BIT(2)  /*!< Device can be remove when queue is full and new device is going to added */
+
+/** Information of the device which is going to be added for provisioning. */
+typedef struct {
+    esp_ble_mesh_bd_addr_t addr;                 /*!< Device address */
+    esp_ble_mesh_addr_type_t addr_type;      /*!< Device address type */
+    uint8_t  uuid[16];                  /*!< Device UUID */
+    uint16_t oob_info;                  /*!< Device OOB Info */
+    /*!< ADD_DEV_START_PROV_NOW_FLAG shall not be set if the bearer has both PB-ADV and PB-GATT enabled */
+    esp_ble_mesh_prov_bearer_t bearer;  /*!< Provisioning Bearer */
+} esp_ble_mesh_unprov_dev_add_t;
+
+#define DEL_DEV_ADDR_FLAG BIT(0)
+#define DEL_DEV_UUID_FLAG BIT(1)
+/** Information of the device which is going to be deleted. */
+typedef struct {
+    union {
+        struct {
+            esp_ble_mesh_bd_addr_t addr;         /*!< Device address */
+            esp_ble_mesh_addr_type_t addr_type;  /*!< Device address type */
+        };
+        uint8_t uuid[16];                   /*!< Device UUID */
+    };
+    uint8_t flag;                           /*!< BIT0: device address; BIT1: device UUID */
+} esp_ble_mesh_device_delete_t;
+
+#define PROV_DATA_NET_IDX_FLAG  BIT(0)
+#define PROV_DATA_FLAGS_FLAG    BIT(1)
+#define PROV_DATA_IV_INDEX_FLAG BIT(2)
+/** Information of the provisioner which is going to be updated. */
+typedef struct {
+    union {
+        uint16_t net_idx;   /*!< NetKey Index */
+        uint8_t  flags;     /*!< Flags */
+        uint32_t iv_index;  /*!< IV Index */
+    };
+    uint8_t flag;           /*!< BIT0: net_idx; BIT1: flags; BIT2: iv_index */
+} esp_ble_mesh_prov_data_info_t;
+
+/** Information of the provisioned node */
+typedef struct {
+    /* Device information */
+    esp_ble_mesh_bd_addr_t   addr;      /*!< Node device address */
+    esp_ble_mesh_addr_type_t addr_type; /*!< Node device address type */
+    uint8_t  dev_uuid[16];  /*!< Device UUID */
+    uint16_t oob_info;      /*!< Node OOB information */
+
+    /* Provisioning information */
+    uint16_t unicast_addr;  /*!< Node unicast address */
+    uint8_t  element_num;   /*!< Node element number */
+    uint16_t net_idx;       /*!< Node NetKey Index */
+    uint8_t  flags;         /*!< Node key refresh flag and iv update flag */
+    uint32_t iv_index;      /*!< Node IV Index */
+    uint8_t  dev_key[16];   /*!< Node device key */
+
+    /* Additional information */
+    char name[ESP_BLE_MESH_NODE_NAME_MAX_LEN + 1]; /*!< Node name */
+    uint16_t comp_length;  /*!< Length of Composition Data */
+    uint8_t *comp_data;    /*!< Value of Composition Data */
+} __attribute__((packed)) esp_ble_mesh_node_t;
+
+/** Context of fast provisioning which need to be set. */
+typedef struct {
+    uint16_t unicast_min;   /*!< Minimum unicast address used for fast provisioning */
+    uint16_t unicast_max;   /*!< Maximum unicast address used for fast provisioning */
+    uint16_t net_idx;       /*!< Netkey index used for fast provisioning */
+    uint8_t  flags;         /*!< Flags used for fast provisioning */
+    uint32_t iv_index;      /*!< IV Index used for fast provisioning */
+    uint8_t  offset;        /*!< Offset of the UUID to be compared */
+    uint8_t  match_len;     /*!< Length of the UUID to be compared */
+    uint8_t  match_val[16]; /*!< Value of UUID to be compared */
+} esp_ble_mesh_fast_prov_info_t;
+
+/*!< This enum value is the action of fast provisioning */
+typedef enum {
+    FAST_PROV_ACT_NONE,
+    FAST_PROV_ACT_ENTER,
+    FAST_PROV_ACT_SUSPEND,
+    FAST_PROV_ACT_EXIT,
+    FAST_PROV_ACT_MAX,
+} esp_ble_mesh_fast_prov_action_t;
+
+/*!< This enum value is the type of proxy filter */
+typedef enum {
+    PROXY_FILTER_WHITELIST,
+    PROXY_FILTER_BLACKLIST,
+} esp_ble_mesh_proxy_filter_type_t;
+
+/*!< Provisioner heartbeat filter type */
+#define ESP_BLE_MESH_HEARTBEAT_FILTER_ACCEPTLIST    0x00
+#define ESP_BLE_MESH_HEARTBEAT_FILTER_REJECTLIST    0x01
+
+/*!< Provisioner heartbeat filter operation */
+#define ESP_BLE_MESH_HEARTBEAT_FILTER_ADD           0x00
+#define ESP_BLE_MESH_HEARTBEAT_FILTER_REMOVE        0x01
+
+/** Context of Provisioner heartbeat filter information to be set */
+typedef struct {
+    uint16_t hb_src;    /*!< Heartbeat source address (unicast address) */
+    uint16_t hb_dst;    /*!< Heartbeat destination address (unicast address or group address) */
+} esp_ble_mesh_heartbeat_filter_info_t;
+
+/*!< This enum value is the event of node/provisioner/fast provisioning */
+typedef enum {
+    ESP_BLE_MESH_PROV_REGISTER_COMP_EVT,                        /*!< Initialize BLE Mesh provisioning capabilities and internal data information completion event */
+    ESP_BLE_MESH_NODE_SET_UNPROV_DEV_NAME_COMP_EVT,             /*!< Set the unprovisioned device name completion event */
+    ESP_BLE_MESH_NODE_PROV_ENABLE_COMP_EVT,                     /*!< Enable node provisioning functionality completion event */
+    ESP_BLE_MESH_NODE_PROV_DISABLE_COMP_EVT,                    /*!< Disable node provisioning functionality completion event */
+    ESP_BLE_MESH_NODE_PROV_LINK_OPEN_EVT,                       /*!< Establish a BLE Mesh link event */
+    ESP_BLE_MESH_NODE_PROV_LINK_CLOSE_EVT,                      /*!< Close a BLE Mesh link event */
+    ESP_BLE_MESH_NODE_PROV_OOB_PUB_KEY_EVT,                     /*!< Generate Node input OOB public key event */
+    ESP_BLE_MESH_NODE_PROV_OUTPUT_NUMBER_EVT,                   /*!< Generate Node Output Number event */
+    ESP_BLE_MESH_NODE_PROV_OUTPUT_STRING_EVT,                   /*!< Generate Node Output String event */
+    ESP_BLE_MESH_NODE_PROV_INPUT_EVT,                           /*!< Event requiring the user to input a number or string */
+    ESP_BLE_MESH_NODE_PROV_COMPLETE_EVT,                        /*!< Provisioning done event */
+    ESP_BLE_MESH_NODE_PROV_RESET_EVT,                           /*!< Provisioning reset event */
+    ESP_BLE_MESH_NODE_PROV_SET_OOB_PUB_KEY_COMP_EVT,            /*!< Node set oob public key completion event */
+    ESP_BLE_MESH_NODE_PROV_INPUT_NUMBER_COMP_EVT,               /*!< Node input number completion event */
+    ESP_BLE_MESH_NODE_PROV_INPUT_STRING_COMP_EVT,               /*!< Node input string completion event */
+    ESP_BLE_MESH_NODE_PROXY_IDENTITY_ENABLE_COMP_EVT,           /*!< Enable BLE Mesh Proxy Identity advertising completion event */
+    ESP_BLE_MESH_NODE_PROXY_GATT_ENABLE_COMP_EVT,               /*!< Enable BLE Mesh GATT Proxy Service completion event */
+    ESP_BLE_MESH_NODE_PROXY_GATT_DISABLE_COMP_EVT,              /*!< Disable BLE Mesh GATT Proxy Service completion event */
+    ESP_BLE_MESH_NODE_ADD_LOCAL_NET_KEY_COMP_EVT,               /*!< Node add NetKey locally completion event */
+    ESP_BLE_MESH_NODE_ADD_LOCAL_APP_KEY_COMP_EVT,               /*!< Node add AppKey locally completion event */
+    ESP_BLE_MESH_NODE_BIND_APP_KEY_TO_MODEL_COMP_EVT,           /*!< Node bind AppKey to model locally completion event */
+    ESP_BLE_MESH_PROVISIONER_PROV_ENABLE_COMP_EVT,              /*!< Provisioner enable provisioning functionality completion event */
+    ESP_BLE_MESH_PROVISIONER_PROV_DISABLE_COMP_EVT,             /*!< Provisioner disable provisioning functionality completion event */
+    ESP_BLE_MESH_PROVISIONER_RECV_UNPROV_ADV_PKT_EVT,           /*!< Provisioner receives unprovisioned device beacon event */
+    ESP_BLE_MESH_PROVISIONER_PROV_READ_OOB_PUB_KEY_EVT,         /*!< Provisioner read unprovisioned device OOB public key event */
+    ESP_BLE_MESH_PROVISIONER_PROV_INPUT_EVT,                    /*!< Provisioner input value for provisioning procedure event */
+    ESP_BLE_MESH_PROVISIONER_PROV_OUTPUT_EVT,                   /*!< Provisioner output value for provisioning procedure event */
+    ESP_BLE_MESH_PROVISIONER_PROV_LINK_OPEN_EVT,                /*!< Provisioner establish a BLE Mesh link event */
+    ESP_BLE_MESH_PROVISIONER_PROV_LINK_CLOSE_EVT,               /*!< Provisioner close a BLE Mesh link event */
+    ESP_BLE_MESH_PROVISIONER_PROV_COMPLETE_EVT,                 /*!< Provisioner provisioning done event */
+    ESP_BLE_MESH_PROVISIONER_ADD_UNPROV_DEV_COMP_EVT,           /*!< Provisioner add a device to the list which contains devices that are waiting/going to be provisioned completion event */
+    ESP_BLE_MESH_PROVISIONER_PROV_DEV_WITH_ADDR_COMP_EVT,       /*!< Provisioner start to provision an unprovisioned device completion event */
+    ESP_BLE_MESH_PROVISIONER_DELETE_DEV_COMP_EVT,               /*!< Provisioner delete a device from the list, close provisioning link with the device completion event */
+    ESP_BLE_MESH_PROVISIONER_SET_DEV_UUID_MATCH_COMP_EVT,       /*!< Provisioner set the value to be compared with part of the unprovisioned device UUID completion event */
+    ESP_BLE_MESH_PROVISIONER_SET_PROV_DATA_INFO_COMP_EVT,       /*!< Provisioner set net_idx/flags/iv_index used for provisioning completion event */
+    ESP_BLE_MESH_PROVISIONER_SET_STATIC_OOB_VALUE_COMP_EVT,     /*!< Provisioner set static oob value used for provisioning completion event */
+    ESP_BLE_MESH_PROVISIONER_SET_PRIMARY_ELEM_ADDR_COMP_EVT,    /*!< Provisioner set unicast address of primary element completion event */
+    ESP_BLE_MESH_PROVISIONER_PROV_READ_OOB_PUB_KEY_COMP_EVT,    /*!< Provisioner read unprovisioned device OOB public key completion event */
+    ESP_BLE_MESH_PROVISIONER_PROV_INPUT_NUMBER_COMP_EVT,        /*!< Provisioner input number completion event */
+    ESP_BLE_MESH_PROVISIONER_PROV_INPUT_STRING_COMP_EVT,        /*!< Provisioner input string completion event */
+    ESP_BLE_MESH_PROVISIONER_SET_NODE_NAME_COMP_EVT,            /*!< Provisioner set node name completion event */
+    ESP_BLE_MESH_PROVISIONER_ADD_LOCAL_APP_KEY_COMP_EVT,        /*!< Provisioner add local app key completion event */
+    ESP_BLE_MESH_PROVISIONER_UPDATE_LOCAL_APP_KEY_COMP_EVT,     /*!< Provisioner update local app key completion event */
+    ESP_BLE_MESH_PROVISIONER_BIND_APP_KEY_TO_MODEL_COMP_EVT,    /*!< Provisioner bind local model with local app key completion event */
+    ESP_BLE_MESH_PROVISIONER_ADD_LOCAL_NET_KEY_COMP_EVT,        /*!< Provisioner add local network key completion event */
+    ESP_BLE_MESH_PROVISIONER_UPDATE_LOCAL_NET_KEY_COMP_EVT,     /*!< Provisioner update local network key completion event */
+    ESP_BLE_MESH_PROVISIONER_STORE_NODE_COMP_DATA_COMP_EVT,     /*!< Provisioner store node composition data completion event */
+    ESP_BLE_MESH_PROVISIONER_DELETE_NODE_WITH_UUID_COMP_EVT,    /*!< Provisioner delete node with uuid completion event */
+    ESP_BLE_MESH_PROVISIONER_DELETE_NODE_WITH_ADDR_COMP_EVT,    /*!< Provisioner delete node with unicast address completion event */
+    ESP_BLE_MESH_PROVISIONER_ENABLE_HEARTBEAT_RECV_COMP_EVT,     /*!< Provisioner start to receive heartbeat message completion event */
+    ESP_BLE_MESH_PROVISIONER_SET_HEARTBEAT_FILTER_TYPE_COMP_EVT, /*!< Provisioner set the heartbeat filter type completion event */
+    ESP_BLE_MESH_PROVISIONER_SET_HEARTBEAT_FILTER_INFO_COMP_EVT, /*!< Provisioner set the heartbeat filter information completion event */
+    ESP_BLE_MESH_PROVISIONER_RECV_HEARTBEAT_MESSAGE_EVT,         /*!< Provisioner receive heartbeat message event */
+    ESP_BLE_MESH_PROVISIONER_DRIECT_ERASE_SETTINGS_COMP_EVT,        /*!< Provisioner directly erase settings completion event */
+    ESP_BLE_MESH_PROVISIONER_OPEN_SETTINGS_WITH_INDEX_COMP_EVT,     /*!< Provisioner open settings with index completion event */
+    ESP_BLE_MESH_PROVISIONER_OPEN_SETTINGS_WITH_UID_COMP_EVT,       /*!< Provisioner open settings with user id completion event */
+    ESP_BLE_MESH_PROVISIONER_CLOSE_SETTINGS_WITH_INDEX_COMP_EVT,    /*!< Provisioner close settings with index completion event */
+    ESP_BLE_MESH_PROVISIONER_CLOSE_SETTINGS_WITH_UID_COMP_EVT,      /*!< Provisioner close settings with user id completion event */
+    ESP_BLE_MESH_PROVISIONER_DELETE_SETTINGS_WITH_INDEX_COMP_EVT,   /*!< Provisioner delete settings with index completion event */
+    ESP_BLE_MESH_PROVISIONER_DELETE_SETTINGS_WITH_UID_COMP_EVT,     /*!< Provisioner delete settings with user id completion event */
+    ESP_BLE_MESH_SET_FAST_PROV_INFO_COMP_EVT,                   /*!< Set fast provisioning information (e.g. unicast address range, net_idx, etc.) completion event */
+    ESP_BLE_MESH_SET_FAST_PROV_ACTION_COMP_EVT,                 /*!< Set fast provisioning action completion event */
+    ESP_BLE_MESH_HEARTBEAT_MESSAGE_RECV_EVT,                    /*!< Receive Heartbeat message event */
+    ESP_BLE_MESH_LPN_ENABLE_COMP_EVT,                           /*!< Enable Low Power Node completion event */
+    ESP_BLE_MESH_LPN_DISABLE_COMP_EVT,                          /*!< Disable Low Power Node completion event */
+    ESP_BLE_MESH_LPN_POLL_COMP_EVT,                             /*!< Low Power Node send Friend Poll completion event */
+    ESP_BLE_MESH_LPN_FRIENDSHIP_ESTABLISH_EVT,                  /*!< Low Power Node establishes friendship event */
+    ESP_BLE_MESH_LPN_FRIENDSHIP_TERMINATE_EVT,                  /*!< Low Power Node terminates friendship event */
+    ESP_BLE_MESH_FRIEND_FRIENDSHIP_ESTABLISH_EVT,               /*!< Friend Node establishes friendship event */
+    ESP_BLE_MESH_FRIEND_FRIENDSHIP_TERMINATE_EVT,               /*!< Friend Node terminates friendship event */
+    ESP_BLE_MESH_PROXY_CLIENT_RECV_ADV_PKT_EVT,                 /*!< Proxy Client receives Network ID advertising packet event */
+    ESP_BLE_MESH_PROXY_CLIENT_CONNECTED_EVT,                    /*!< Proxy Client establishes connection successfully event */
+    ESP_BLE_MESH_PROXY_CLIENT_DISCONNECTED_EVT,                 /*!< Proxy Client terminates connection successfully event */
+    ESP_BLE_MESH_PROXY_CLIENT_RECV_FILTER_STATUS_EVT,           /*!< Proxy Client receives Proxy Filter Status event */
+    ESP_BLE_MESH_PROXY_CLIENT_CONNECT_COMP_EVT,                 /*!< Proxy Client connect completion event */
+    ESP_BLE_MESH_PROXY_CLIENT_DISCONNECT_COMP_EVT,              /*!< Proxy Client disconnect completion event */
+    ESP_BLE_MESH_PROXY_CLIENT_SET_FILTER_TYPE_COMP_EVT,         /*!< Proxy Client set filter type completion event */
+    ESP_BLE_MESH_PROXY_CLIENT_ADD_FILTER_ADDR_COMP_EVT,         /*!< Proxy Client add filter address completion event */
+    ESP_BLE_MESH_PROXY_CLIENT_REMOVE_FILTER_ADDR_COMP_EVT,      /*!< Proxy Client remove filter address completion event */
+    ESP_BLE_MESH_PROXY_SERVER_CONNECTED_EVT,                    /*!< Proxy Server establishes connection successfully event */
+    ESP_BLE_MESH_PROXY_SERVER_DISCONNECTED_EVT,                 /*!< Proxy Server terminates connection successfully event */
+    ESP_BLE_MESH_MODEL_SUBSCRIBE_GROUP_ADDR_COMP_EVT,           /*!< Local model subscribes group address completion event */
+    ESP_BLE_MESH_MODEL_UNSUBSCRIBE_GROUP_ADDR_COMP_EVT,         /*!< Local model unsubscribes group address completion event */
+    ESP_BLE_MESH_DEINIT_MESH_COMP_EVT,                          /*!< De-initialize BLE Mesh stack completion event */
+    ESP_BLE_MESH_PROV_EVT_MAX,
+} esp_ble_mesh_prov_cb_event_t;
+
+/**
+ * @brief BLE Mesh Node/Provisioner callback parameters union
+ */
+typedef union {
+    /**
+     * @brief ESP_BLE_MESH_PROV_REGISTER_COMP_EVT
+     */
+    struct ble_mesh_prov_register_comp_param {
+        int err_code;                           /*!< Indicate the result of BLE Mesh initialization */
+    } prov_register_comp;                       /*!< Event parameter of ESP_BLE_MESH_PROV_REGISTER_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_SET_UNPROV_DEV_NAME_COMP_EVT
+     */
+    struct ble_mesh_set_unprov_dev_name_comp_param {
+        int err_code;                           /*!< Indicate the result of setting BLE Mesh device name */
+    } node_set_unprov_dev_name_comp;            /*!< Event parameter of ESP_BLE_MESH_NODE_SET_UNPROV_DEV_NAME_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_ENABLE_COMP_EVT
+     */
+    struct ble_mesh_prov_enable_comp_param {
+        int err_code;                           /*!< Indicate the result of enabling BLE Mesh device */
+    } node_prov_enable_comp;                    /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_ENABLE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_DISABLE_COMP_EVT
+     */
+    struct ble_mesh_prov_disable_comp_param {
+        int err_code;                           /*!< Indicate the result of disabling BLE Mesh device */
+    } node_prov_disable_comp;                   /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_DISABLE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_LINK_OPEN_EVT
+     */
+    struct ble_mesh_link_open_evt_param {
+        esp_ble_mesh_prov_bearer_t bearer;      /*!< Type of the bearer used when device link is open */
+    } node_prov_link_open;                      /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_LINK_OPEN_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_LINK_CLOSE_EVT
+     */
+    struct ble_mesh_link_close_evt_param {
+        esp_ble_mesh_prov_bearer_t bearer;      /*!< Type of the bearer used when device link is closed */
+    } node_prov_link_close;                     /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_LINK_CLOSE_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_OUTPUT_NUMBER_EVT
+     */
+    struct ble_mesh_output_num_evt_param {
+        esp_ble_mesh_output_action_t action;    /*!< Action of Output OOB Authentication */
+        uint32_t number;                        /*!< Number of Output OOB Authentication  */
+    } node_prov_output_num;                     /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_OUTPUT_NUMBER_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_OUTPUT_STRING_EVT
+     */
+    struct ble_mesh_output_str_evt_param {
+        char string[8];                         /*!< String of Output OOB Authentication */
+    } node_prov_output_str;                     /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_OUTPUT_STRING_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_INPUT_EVT
+     */
+    struct ble_mesh_input_evt_param {
+        esp_ble_mesh_input_action_t action;     /*!< Action of Input OOB Authentication */
+        uint8_t size;                           /*!< Size of Input OOB Authentication */
+    } node_prov_input;                          /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_INPUT_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_COMPLETE_EVT
+     */
+    struct ble_mesh_provision_complete_evt_param {
+        uint16_t net_idx;                       /*!< NetKey Index */
+        uint8_t  net_key[16];                   /*!< NetKey */
+        uint16_t addr;                          /*!< Primary address */
+        uint8_t  flags;                         /*!< Flags */
+        uint32_t iv_index;                      /*!< IV Index */
+    } node_prov_complete;                       /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_COMPLETE_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_RESET_EVT
+     */
+    struct ble_mesh_provision_reset_param {
+
+    } node_prov_reset;                          /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_RESET_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_SET_OOB_PUB_KEY_COMP_EVT
+     */
+    struct ble_mesh_set_oob_pub_key_comp_param {
+        int err_code;                           /*!< Indicate the result of setting OOB Public Key */
+    } node_prov_set_oob_pub_key_comp;           /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_SET_OOB_PUB_KEY_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_INPUT_NUM_COMP_EVT
+     */
+    struct ble_mesh_input_number_comp_param {
+        int err_code;                           /*!< Indicate the result of inputting number */
+    } node_prov_input_num_comp;                 /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_INPUT_NUM_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROV_INPUT_STR_COMP_EVT
+     */
+    struct ble_mesh_input_string_comp_param {
+        int err_code;                           /*!< Indicate the result of inputting string */
+    } node_prov_input_str_comp;                 /*!< Event parameter of ESP_BLE_MESH_NODE_PROV_INPUT_STR_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROXY_IDENTITY_ENABLE_COMP_EVT
+     */
+    struct ble_mesh_proxy_identity_enable_comp_param {
+        int err_code;                           /*!< Indicate the result of enabling Mesh Proxy advertising */
+    } node_proxy_identity_enable_comp;          /*!< Event parameter of ESP_BLE_MESH_NODE_PROXY_IDENTITY_ENABLE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROXY_GATT_ENABLE_COMP_EVT
+     */
+    struct ble_mesh_proxy_gatt_enable_comp_param {
+        int err_code;                           /*!< Indicate the result of enabling Mesh Proxy Service */
+    } node_proxy_gatt_enable_comp;              /*!< Event parameter of ESP_BLE_MESH_NODE_PROXY_GATT_ENABLE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_PROXY_GATT_DISABLE_COMP_EVT
+     */
+    struct ble_mesh_proxy_gatt_disable_comp_param {
+        int err_code;                           /*!< Indicate the result of disabling Mesh Proxy Service */
+    } node_proxy_gatt_disable_comp;             /*!< Event parameter of ESP_BLE_MESH_NODE_PROXY_GATT_DISABLE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_ADD_LOCAL_NET_KEY_COMP_EVT
+     */
+    struct ble_mesh_node_add_local_net_key_comp_param {
+        int err_code;                           /*!< Indicate the result of adding local NetKey by the node */
+        uint16_t net_idx;                       /*!< NetKey Index */
+    } node_add_net_key_comp;                    /*!< Event parameter of ESP_BLE_MESH_NODE_ADD_LOCAL_NET_KEY_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_ADD_LOCAL_APP_KEY_COMP_EVT
+     */
+    struct ble_mesh_node_add_local_app_key_comp_param {
+        int err_code;                           /*!< Indicate the result of adding local AppKey by the node */
+        uint16_t net_idx;                       /*!< NetKey Index */
+        uint16_t app_idx;                       /*!< AppKey Index */
+    } node_add_app_key_comp;                    /*!< Event parameter of ESP_BLE_MESH_NODE_ADD_LOCAL_APP_KEY_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_NODE_BIND_APP_KEY_TO_MODEL_COMP_EVT
+     */
+    struct ble_mesh_node_bind_local_mod_app_comp_param {
+        int err_code;                           /*!< Indicate the result of binding AppKey with model by the node */
+        uint16_t element_addr;                  /*!< Element address */
+        uint16_t app_idx;                       /*!< AppKey Index */
+        uint16_t company_id;                    /*!< Company ID */
+        uint16_t model_id;                      /*!< Model ID */
+    } node_bind_app_key_to_model_comp;          /*!< Event parameter of ESP_BLE_MESH_NODE_BIND_APP_KEY_TO_MODEL_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_RECV_UNPROV_ADV_PKT_EVT
+     */
+    struct ble_mesh_provisioner_recv_unprov_adv_pkt_param {
+        uint8_t  dev_uuid[16];                  /*!< Device UUID of the unprovisioned device */
+        esp_ble_mesh_bd_addr_t addr;            /*!< Device address of the unprovisioned device */
+        esp_ble_mesh_addr_type_t addr_type;     /*!< Device address type */
+        uint16_t oob_info;                      /*!< OOB Info of the unprovisioned device */
+        uint8_t  adv_type;                      /*!< Avertising type of the unprovisioned device */
+        esp_ble_mesh_prov_bearer_t bearer;      /*!< Bearer of the unprovisioned device */
+        int8_t   rssi;                          /*!< RSSI of the received advertising packet */
+    } provisioner_recv_unprov_adv_pkt;          /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_RECV_UNPROV_ADV_PKT_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_ENABLE_COMP_EVT
+     */
+    struct ble_mesh_provisioner_prov_enable_comp_param {
+        int err_code;                           /*!< Indicate the result of enabling BLE Mesh Provisioner */
+    } provisioner_prov_enable_comp;             /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_ENABLE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_DISABLE_COMP_EVT
+     */
+    struct ble_mesh_provisioner_prov_disable_comp_param {
+        int err_code;                           /*!< Indicate the result of disabling BLE Mesh Provisioner */
+    } provisioner_prov_disable_comp;            /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_DISABLE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_LINK_OPEN_EVT
+     */
+    struct ble_mesh_provisioner_link_open_evt_param {
+        esp_ble_mesh_prov_bearer_t bearer;      /*!< Type of the bearer used when Provisioner link is opened */
+    } provisioner_prov_link_open;               /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_LINK_OPEN_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_READ_OOB_PUB_KEY_EVT
+     */
+    struct ble_mesh_provisioner_prov_read_oob_pub_key_evt_param {
+        uint8_t link_idx;                       /*!< Index of the provisioning link */
+    } provisioner_prov_read_oob_pub_key;        /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_READ_OOB_PUB_KEY_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_INPUT_EVT
+     */
+    struct ble_mesh_provisioner_prov_input_evt_param {
+        esp_ble_mesh_oob_method_t method;       /*!< Method of device Output OOB Authentication */
+        esp_ble_mesh_output_action_t action;    /*!< Action of device Output OOB Authentication */
+        uint8_t size;                           /*!< Size of device Output OOB Authentication */
+        uint8_t link_idx;                       /*!< Index of the provisioning link */
+    } provisioner_prov_input;                   /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_INPUT_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_OUTPUT_EVT
+     */
+    struct ble_mesh_provisioner_prov_output_evt_param {
+        esp_ble_mesh_oob_method_t method;       /*!< Method of device Input OOB Authentication */
+        esp_ble_mesh_input_action_t action;     /*!< Action of device Input OOB Authentication */
+        uint8_t size;                           /*!< Size of device Input OOB Authentication */
+        uint8_t link_idx;                       /*!< Index of the provisioning link */
+        union {
+            char string[8];                     /*!< String output by the Provisioner */
+            uint32_t number;                    /*!< Number output by the Provisioner */
+        };
+    } provisioner_prov_output;                  /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_OUTPUT_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_LINK_CLOSE_EVT
+     */
+    struct ble_mesh_provisioner_link_close_evt_param {
+        esp_ble_mesh_prov_bearer_t bearer;      /*!< Type of the bearer used when Provisioner link is closed */
+        uint8_t reason;                         /*!< Reason of the closed provisioning link */
+    } provisioner_prov_link_close;              /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_LINK_CLOSE_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_COMPLETE_EVT
+     */
+    struct ble_mesh_provisioner_prov_comp_param {
+        uint16_t node_idx;                      /*!< Index of the provisioned device */
+        esp_ble_mesh_octet16_t device_uuid;     /*!< Device UUID of the provisioned device */
+        uint16_t unicast_addr;                  /*!< Primary address of the provisioned device */
+        uint8_t element_num;                    /*!< Element count of the provisioned device */
+        uint16_t netkey_idx;                    /*!< NetKey Index of the provisioned device */
+    } provisioner_prov_complete;                /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_COMPLETE_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_ADD_UNPROV_DEV_COMP_EVT
+     */
+    struct ble_mesh_provisioner_add_unprov_dev_comp_param {
+        int err_code;                           /*!< Indicate the result of adding device into queue by the Provisioner */
+    } provisioner_add_unprov_dev_comp;          /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_ADD_UNPROV_DEV_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_DEV_WITH_ADDR_COMP_EVT
+     */
+    struct ble_mesh_provisioner_prov_dev_with_addr_comp_param {
+        int err_code;                           /*!< Indicate the result of Provisioner starting to provision a device */
+    } provisioner_prov_dev_with_addr_comp;      /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_DEV_WITH_ADDR_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_DELETE_DEV_COMP_EVT
+     */
+    struct ble_mesh_provisioner_delete_dev_comp_param {
+        int err_code;                           /*!< Indicate the result of deleting device by the Provisioner */
+    } provisioner_delete_dev_comp;              /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_DELETE_DEV_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_SET_DEV_UUID_MATCH_COMP_EVT
+     */
+    struct ble_mesh_provisioner_set_dev_uuid_match_comp_param {
+        int err_code;                           /*!< Indicate the result of setting Device UUID match value by the Provisioner */
+    } provisioner_set_dev_uuid_match_comp;      /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_SET_DEV_UUID_MATCH_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_SET_PROV_DATA_INFO_COMP_EVT
+     */
+    struct ble_mesh_provisioner_set_prov_data_info_comp_param {
+        int err_code;                           /*!< Indicate the result of setting provisioning info by the Provisioner */
+    } provisioner_set_prov_data_info_comp;      /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_SET_PROV_DATA_INFO_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_SET_STATIC_OOB_VALUE_COMP_EVT
+     */
+    struct ble_mesh_provisioner_set_static_oob_val_comp_param {
+        int err_code;                           /*!< Indicate the result of setting static oob value by the Provisioner */
+    } provisioner_set_static_oob_val_comp;      /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_SET_STATIC_OOB_VALUE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_SET_PRIMARY_ELEM_ADDR_COMP_EVT
+     */
+    struct ble_mesh_provisioner_set_primary_elem_addr_comp_param {
+        int err_code;                           /*!< Indicate the result of setting unicast address of primary element by the Provisioner */
+    } provisioner_set_primary_elem_addr_comp;   /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_SET_PRIMARY_ELEM_ADDR_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_READ_OOB_PUB_KEY_COMP_EVT
+     */
+    struct ble_mesh_provisioner_prov_read_oob_pub_key_comp_param {
+        int err_code;                           /*!< Indicate the result of setting OOB Public Key by the Provisioner */
+    } provisioner_prov_read_oob_pub_key_comp;   /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_READ_OOB_PUB_KEY_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_INPUT_NUMBER_COMP_EVT
+     */
+    struct ble_mesh_provisioner_prov_input_num_comp_param {
+        int err_code;                           /*!< Indicate the result of inputting number by the Provisioner */
+    } provisioner_prov_input_num_comp;          /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_INPUT_NUMBER_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_PROV_INPUT_STRING_COMP_EVT
+     */
+    struct ble_mesh_provisioner_prov_input_str_comp_param {
+        int err_code;                           /*!< Indicate the result of inputting string by the Provisioner */
+    } provisioner_prov_input_str_comp;          /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_PROV_INPUT_STRING_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_SET_NODE_NAME_COMP_EVT
+     */
+    struct ble_mesh_provisioner_set_node_name_comp_param {
+        int err_code;                           /*!< Indicate the result of setting provisioned device name by the Provisioner */
+        uint16_t node_index;                    /*!< Index of the provisioned device */
+    } provisioner_set_node_name_comp;           /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_SET_NODE_NAME_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_ADD_LOCAL_APP_KEY_COMP_EVT
+     */
+    struct ble_mesh_provisioner_add_local_app_key_comp_param {
+        int err_code;                           /*!< Indicate the result of adding local AppKey by the Provisioner */
+        uint16_t net_idx;                       /*!< NetKey Index */
+        uint16_t app_idx;                       /*!< AppKey Index */
+    } provisioner_add_app_key_comp;             /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_ADD_LOCAL_APP_KEY_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_UPDATE_LOCAL_APP_KEY_COMP_EVT
+     */
+    struct ble_mesh_provisioner_update_local_app_key_comp_param {
+        int err_code;                           /*!< Indicate the result of updating local AppKey by the Provisioner */
+        uint16_t net_idx;                       /*!< NetKey Index */
+        uint16_t app_idx;                       /*!< AppKey Index */
+    } provisioner_update_app_key_comp;          /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_UPDATE_LOCAL_APP_KEY_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_BIND_APP_KEY_TO_MODEL_COMP_EVT
+     */
+    struct ble_mesh_provisioner_bind_local_mod_app_comp_param {
+        int err_code;                           /*!< Indicate the result of binding AppKey with model by the Provisioner */
+        uint16_t element_addr;                  /*!< Element address */
+        uint16_t app_idx;                       /*!< AppKey Index */
+        uint16_t company_id;                    /*!< Company ID */
+        uint16_t model_id;                      /*!< Model ID */
+    } provisioner_bind_app_key_to_model_comp;   /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_BIND_APP_KEY_TO_MODEL_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_ADD_LOCAL_NET_KEY_COMP_EVT
+     */
+    struct ble_mesh_provisioner_add_local_net_key_comp_param {
+        int err_code;                           /*!< Indicate the result of adding local NetKey by the Provisioner */
+        uint16_t net_idx;                       /*!< NetKey Index */
+    } provisioner_add_net_key_comp;             /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_ADD_LOCAL_NET_KEY_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_UPDATE_LOCAL_NET_KEY_COMP_EVT
+     */
+    struct ble_mesh_provisioner_update_local_net_key_comp_param {
+        int err_code;                           /*!< Indicate the result of updating local NetKey by the Provisioner */
+        uint16_t net_idx;                       /*!< NetKey Index */
+    } provisioner_update_net_key_comp;          /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_UPDATE_LOCAL_NET_KEY_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_STORE_NODE_COMP_DATA_COMP_EVT
+     */
+    struct ble_mesh_provisioner_store_node_comp_data_comp_param {
+        int err_code;                           /*!< Indicate the result of storing node composition data by the Provisioner */
+        uint16_t addr;                          /*!< Node element address */
+    } provisioner_store_node_comp_data_comp;    /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_STORE_NODE_COMP_DATA_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_DELETE_NODE_WITH_UUID_COMP_EVT
+     */
+    struct ble_mesh_provisioner_delete_node_with_uuid_comp_param {
+        int err_code;                           /*!< Indicate the result of deleting node with uuid by the Provisioner */
+        uint8_t uuid[16];                       /*!< Node device uuid */
+    } provisioner_delete_node_with_uuid_comp;   /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_DELETE_NODE_WITH_UUID_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_DELETE_NODE_WITH_ADDR_COMP_EVT
+     */
+    struct ble_mesh_provisioner_delete_node_with_addr_comp_param {
+        int err_code;                           /*!< Indicate the result of deleting node with unicast address by the Provisioner */
+        uint16_t unicast_addr;                  /*!< Node unicast address */
+    } provisioner_delete_node_with_addr_comp;   /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_DELETE_NODE_WITH_ADDR_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_ENABLE_HEARTBEAT_RECV_COMP_EVT
+     */
+    struct {
+        int err_code;                           /*!< Indicate the result of enabling/disabling to receive heartbeat messages by the Provisioner */
+        bool enable;                            /*!< Indicate enabling or disabling receiving heartbeat messages */
+    } provisioner_enable_heartbeat_recv_comp;   /*!< Event parameters of ESP_BLE_MESH_PROVISIONER_ENABLE_HEARTBEAT_RECV_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_SET_HEARTBEAT_FILTER_TYPE_COMP_EVT
+     */
+    struct {
+        int err_code;                               /*!< Indicate the result of setting the heartbeat filter type by the Provisioner */
+        uint8_t type;                               /*!< Type of the filter used for receiving heartbeat messages */
+    } provisioner_set_heartbeat_filter_type_comp;   /*!< Event parameters of ESP_BLE_MESH_PROVISIONER_SET_HEARTBEAT_FILTER_TYPE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_SET_HEARTBEAT_FILTER_INFO_COMP_EVT
+     */
+    struct {
+        int err_code;                               /*!< Indicate the result of setting the heartbeat filter address by the Provisioner */
+        uint8_t  op;                                /*!< Operation (add, remove, clean) */
+        uint16_t hb_src;                            /*!< Heartbeat source address */
+        uint16_t hb_dst;                            /*!< Heartbeat destination address */
+    } provisioner_set_heartbeat_filter_info_comp;   /*!< Event parameters of ESP_BLE_MESH_PROVISIONER_SET_HEARTBEAT_FILTER_INFO_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_RECV_HEARTBEAT_MESSAGE_EVT
+     */
+    struct {
+        uint16_t hb_src;            /*!< Heartbeat source address */
+        uint16_t hb_dst;            /*!< Heartbeat destination address */
+        uint8_t  init_ttl;          /*!< Heartbeat InitTTL */
+        uint8_t  rx_ttl;            /*!< Heartbeat RxTTL */
+        uint8_t  hops;              /*!< Heartbeat hops (InitTTL - RxTTL + 1) */
+        uint16_t feature;           /*!< Bit field of currently active features of the node */
+        int8_t   rssi;              /*!< RSSI of the heartbeat message */
+    } provisioner_recv_heartbeat;   /*!< Event parameters of ESP_BLE_MESH_PROVISIONER_RECV_HEARTBEAT_MESSAGE_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_DRIECT_ERASE_SETTINGS_COMP_EVT
+     */
+    struct {
+        int err_code;                           /*!< Indicate the result of directly erasing settings by the Provisioner */
+    } provisioner_direct_erase_settings_comp;   /*!< Event parameters of ESP_BLE_MESH_PROVISIONER_DRIECT_ERASE_SETTINGS_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_OPEN_SETTINGS_WITH_INDEX_COMP_EVT
+     */
+    struct {
+        int err_code;                               /*!< Indicate the result of opening settings with index by the Provisioner */
+        uint8_t index;                              /*!< Index of Provisioner settings */
+    } provisioner_open_settings_with_index_comp;    /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_OPEN_SETTINGS_WITH_INDEX_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_OPEN_SETTINGS_WITH_UID_COMP_EVT
+     */
+    struct {
+        int err_code;                                   /*!< Indicate the result of opening settings with user id by the Provisioner */
+        uint8_t index;                                  /*!< Index of Provisioner settings */
+        char uid[ESP_BLE_MESH_SETTINGS_UID_SIZE + 1];   /*!< Provisioner settings user id */
+    } provisioner_open_settings_with_uid_comp;          /*!< Event parameters of ESP_BLE_MESH_PROVISIONER_OPEN_SETTINGS_WITH_UID_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_CLOSE_SETTINGS_WITH_INDEX_COMP_EVT
+     */
+    struct {
+        int err_code;                               /*!< Indicate the result of closing settings with index by the Provisioner */
+        uint8_t index;                              /*!< Index of Provisioner settings */
+    } provisioner_close_settings_with_index_comp;   /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_CLOSE_SETTINGS_WITH_INDEX_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_CLOSE_SETTINGS_WITH_UID_COMP_EVT
+     */
+    struct {
+        int err_code;                                   /*!< Indicate the result of closing settings with user id by the Provisioner */
+        uint8_t index;                                  /*!< Index of Provisioner settings */
+        char uid[ESP_BLE_MESH_SETTINGS_UID_SIZE + 1];   /*!< Provisioner settings user id */
+    } provisioner_close_settings_with_uid_comp;         /*!< Event parameters of ESP_BLE_MESH_PROVISIONER_CLOSE_SETTINGS_WITH_UID_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_DELETE_SETTINGS_WITH_INDEX_COMP_EVT
+     */
+    struct {
+        int err_code;                               /*!< Indicate the result of deleting settings with index by the Provisioner */
+        uint8_t index;                              /*!< Index of Provisioner settings */
+    } provisioner_delete_settings_with_index_comp;  /*!< Event parameter of ESP_BLE_MESH_PROVISIONER_DELETE_SETTINGS_WITH_INDEX_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROVISIONER_DELETE_SETTINGS_WITH_UID_COMP_EVT
+     */
+    struct {
+        int err_code;                                   /*!< Indicate the result of deleting settings with user id by the Provisioner */
+        uint8_t index;                                  /*!< Index of Provisioner settings */
+        char uid[ESP_BLE_MESH_SETTINGS_UID_SIZE + 1];   /*!< Provisioner settings user id */
+    } provisioner_delete_settings_with_uid_comp;        /*!< Event parameters of ESP_BLE_MESH_PROVISIONER_DELETE_SETTINGS_WITH_UID_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_SET_FAST_PROV_INFO_COMP_EVT
+     */
+    struct ble_mesh_set_fast_prov_info_comp_param {
+        uint8_t status_unicast;                 /*!< Indicate the result of setting unicast address range of fast provisioning */
+        uint8_t status_net_idx;                 /*!< Indicate the result of setting NetKey Index of fast provisioning */
+        uint8_t status_match;                   /*!< Indicate the result of setting matching Device UUID of fast provisioning */
+    } set_fast_prov_info_comp;                  /*!< Event parameter of ESP_BLE_MESH_SET_FAST_PROV_INFO_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_SET_FAST_PROV_ACTION_COMP_EVT
+     */
+    struct ble_mesh_set_fast_prov_action_comp_param {
+        uint8_t status_action;                  /*!< Indicate the result of setting action of fast provisioning */
+    } set_fast_prov_action_comp;                /*!< Event parameter of ESP_BLE_MESH_SET_FAST_PROV_ACTION_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_HEARTBEAT_MESSAGE_RECV_EVT
+     */
+    struct ble_mesh_heartbeat_msg_recv_param {
+        uint8_t  hops;                          /*!< Heartbeat hops (InitTTL - RxTTL + 1) */
+        uint16_t feature;                       /*!< Bit field of currently active features of the node */
+    } heartbeat_msg_recv;                       /*!< Event parameter of ESP_BLE_MESH_HEARTBEAT_MESSAGE_RECV_EVT */
+    /**
+     * @brief ESP_BLE_MESH_LPN_ENABLE_COMP_EVT
+     */
+    struct ble_mesh_lpn_enable_comp_param {
+        int err_code;                           /*!< Indicate the result of enabling LPN functionality */
+    } lpn_enable_comp;                          /*!< Event parameter of ESP_BLE_MESH_LPN_ENABLE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_LPN_DISABLE_COMP_EVT
+     */
+    struct ble_mesh_lpn_disable_comp_param {
+        int err_code;                           /*!< Indicate the result of disabling LPN functionality */
+    } lpn_disable_comp;                         /*!< Event parameter of ESP_BLE_MESH_LPN_DISABLE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_LPN_POLL_COMP_EVT
+     */
+    struct ble_mesh_lpn_poll_comp_param {
+        int err_code;                           /*!< Indicate the result of sending Friend Poll */
+    } lpn_poll_comp;                            /*!< Event parameter of ESP_BLE_MESH_LPN_POLL_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_LPN_FRIENDSHIP_ESTABLISH_EVT
+     */
+    struct ble_mesh_lpn_friendship_establish_param {
+        uint16_t friend_addr;                   /*!< Friend Node unicast address */
+    } lpn_friendship_establish;                 /*!< Event parameter of ESP_BLE_MESH_LPN_FRIENDSHIP_ESTABLISH_EVT */
+    /**
+     * @brief ESP_BLE_MESH_LPN_FRIENDSHIP_TERMINATE_EVT
+     */
+    struct ble_mesh_lpn_friendship_terminate_param {
+        uint16_t friend_addr;                   /*!< Friend Node unicast address */
+    } lpn_friendship_terminate;                 /*!< Event parameter of ESP_BLE_MESH_LPN_FRIENDSHIP_TERMINATE_EVT */
+    /**
+     * @brief ESP_BLE_MESH_FRIEND_FRIENDSHIP_ESTABLISH_EVT
+     */
+    struct ble_mesh_friend_friendship_establish_param {
+        uint16_t lpn_addr;                      /*!< Low Power Node unicast address */
+    } frnd_friendship_establish;                /*!< Event parameter of ESP_BLE_MESH_FRIEND_FRIENDSHIP_ESTABLISH_EVT */
+    /**
+     * @brief ESP_BLE_MESH_FRIEND_FRIENDSHIP_TERMINATE_EVT
+     */
+    struct ble_mesh_friend_friendship_terminate_param {
+        uint16_t lpn_addr;                      /*!< Low Power Node unicast address */
+        /** This enum value is the reason of friendship termination on the friend node side */
+        enum {
+            ESP_BLE_MESH_FRND_FRIENDSHIP_TERMINATE_ESTABLISH_FAIL,  /*!< Friend Offer has been sent, but Friend Offer is not received within 1 second, friendship fails to be established */
+            ESP_BLE_MESH_FRND_FRIENDSHIP_TERMINATE_POLL_TIMEOUT,    /*!< Friendship is established, PollTimeout timer expires and no Friend Poll/Sub Add/Sub Remove is received */
+            ESP_BLE_MESH_FRND_FRIENDSHIP_TERMINATE_RECV_FRND_REQ,   /*!< Receive Friend Request from existing Low Power Node */
+            ESP_BLE_MESH_FRND_FRIENDSHIP_TERMINATE_RECV_FRND_CLEAR, /*!< Receive Friend Clear from other friend node */
+            ESP_BLE_MESH_FRND_FRIENDSHIP_TERMINATE_DISABLE,         /*!< Friend feature disabled or corresponding NetKey is deleted */
+        } reason;                               /*!< Friendship terminated reason */
+    } frnd_friendship_terminate;                /*!< Event parameter of ESP_BLE_MESH_FRIEND_FRIENDSHIP_TERMINATE_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_CLIENT_RECV_ADV_PKT_EVT
+     */
+    struct ble_mesh_proxy_client_recv_adv_pkt_param {
+        esp_ble_mesh_bd_addr_t addr;            /*!< Device address */
+        esp_ble_mesh_addr_type_t addr_type;     /*!< Device address type */
+        uint16_t net_idx;                       /*!< Network ID related NetKey Index */
+        uint8_t  net_id[8];                     /*!< Network ID contained in the advertising packet */
+        int8_t   rssi;                          /*!< RSSI of the received advertising packet */
+    } proxy_client_recv_adv_pkt;                /*!< Event parameter of ESP_BLE_MESH_PROXY_CLIENT_RECV_ADV_PKT_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_CLIENT_CONNECTED_EVT
+     */
+    struct ble_mesh_proxy_client_connected_param {
+        esp_ble_mesh_bd_addr_t addr;            /*!< Device address of the Proxy Server */
+        esp_ble_mesh_addr_type_t addr_type;     /*!< Device address type */
+        uint8_t conn_handle;                    /*!< Proxy connection handle */
+        uint16_t net_idx;                       /*!< Corresponding NetKey Index */
+    } proxy_client_connected;                   /*!< Event parameter of ESP_BLE_MESH_PROXY_CLIENT_CONNECTED_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_CLIENT_DISCONNECTED_EVT
+     */
+    struct ble_mesh_proxy_client_disconnected_param {
+        esp_ble_mesh_bd_addr_t addr;            /*!< Device address of the Proxy Server */
+        esp_ble_mesh_addr_type_t addr_type;     /*!< Device address type */
+        uint8_t conn_handle;                    /*!< Proxy connection handle */
+        uint16_t net_idx;                       /*!< Corresponding NetKey Index */
+        uint8_t reason;                         /*!< Proxy disconnect reason */
+    } proxy_client_disconnected;                /*!< Event parameter of ESP_BLE_MESH_PROXY_CLIENT_DISCONNECTED_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_CLIENT_RECV_FILTER_STATUS_EVT
+     */
+    struct ble_mesh_proxy_client_recv_filter_status_param {
+        uint8_t  conn_handle;                   /*!< Proxy connection handle */
+        uint16_t server_addr;                   /*!< Proxy Server primary element address */
+        uint16_t net_idx;                       /*!< Corresponding NetKey Index */
+        uint8_t  filter_type;                   /*!< Proxy Server filter type(whitelist or blacklist) */
+        uint16_t list_size;                     /*!< Number of addresses in the Proxy Server filter list */
+    } proxy_client_recv_filter_status;          /*!< Event parameter of ESP_BLE_MESH_PROXY_CLIENT_RECV_FILTER_STATUS_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_CLIENT_CONNECT_COMP_EVT
+     */
+    struct ble_mesh_proxy_client_connect_comp_param {
+        int err_code;                           /*!< Indicate the result of Proxy Client connect */
+        esp_ble_mesh_bd_addr_t addr;            /*!< Device address of the Proxy Server */
+        esp_ble_mesh_addr_type_t addr_type;     /*!< Device address type */
+        uint16_t net_idx;                       /*!< Corresponding NetKey Index */
+    } proxy_client_connect_comp;                /*!< Event parameter of ESP_BLE_MESH_PROXY_CLIENT_CONNECT_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_CLIENT_DISCONNECT_COMP_EVT
+     */
+    struct ble_mesh_proxy_client_disconnect_comp_param {
+        int err_code;                           /*!< Indicate the result of Proxy Client disconnect */
+        uint8_t conn_handle;                    /*!< Proxy connection handle */
+    } proxy_client_disconnect_comp;             /*!< Event parameter of ESP_BLE_MESH_PROXY_CLIENT_DISCONNECT_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_CLIENT_SET_FILTER_TYPE_COMP_EVT
+     */
+    struct ble_mesh_proxy_client_set_filter_type_comp_param {
+        int err_code;                           /*!< Indicate the result of Proxy Client set filter type */
+        uint8_t conn_handle;                    /*!< Proxy connection handle */
+        uint16_t net_idx;                       /*!< Corresponding NetKey Index */
+    } proxy_client_set_filter_type_comp;        /*!< Event parameter of ESP_BLE_MESH_PROXY_CLIENT_SET_FILTER_TYPE_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_CLIENT_ADD_FILTER_ADDR_COMP_EVT
+     */
+    struct ble_mesh_proxy_client_add_filter_addr_comp_param {
+        int err_code;                           /*!< Indicate the result of Proxy Client add filter address */
+        uint8_t conn_handle;                    /*!< Proxy connection handle */
+        uint16_t net_idx;                       /*!< Corresponding NetKey Index */
+    } proxy_client_add_filter_addr_comp;        /*!< Event parameter of ESP_BLE_MESH_PROXY_CLIENT_ADD_FILTER_ADDR_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_CLIENT_REMOVE_FILTER_ADDR_COMP_EVT
+     */
+    struct ble_mesh_proxy_client_remove_filter_addr_comp_param {
+        int err_code;                           /*!< Indicate the result of Proxy Client remove filter address */
+        uint8_t conn_handle;                    /*!< Proxy connection handle */
+        uint16_t net_idx;                       /*!< Corresponding NetKey Index */
+    } proxy_client_remove_filter_addr_comp;     /*!< Event parameter of ESP_BLE_MESH_PROXY_CLIENT_REMOVE_FILTER_ADDR_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_SERVER_CONNECTED_EVT
+     */
+    struct ble_mesh_proxy_server_connected_param {
+        uint8_t conn_handle;                    /*!< Proxy connection handle */
+    } proxy_server_connected;                   /*!< Event parameter of ESP_BLE_MESH_PROXY_SERVER_CONNECTED_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_SERVER_DISCONNECTED_EVT
+     */
+    struct ble_mesh_proxy_server_disconnected_param {
+        uint8_t conn_handle;                    /*!< Proxy connection handle */
+        uint8_t reason;                         /*!< Proxy disconnect reason */
+    } proxy_server_disconnected;                /*!< Event parameter of ESP_BLE_MESH_PROXY_SERVER_DISCONNECTED_EVT */
+    /**
+     * @brief ESP_BLE_MESH_MODEL_SUBSCRIBE_GROUP_ADDR_COMP_EVT
+     */
+    struct ble_mesh_model_sub_group_addr_comp_param {
+        int err_code;                           /*!< Indicate the result of local model subscribing group address */
+        uint16_t element_addr;                  /*!< Element address */
+        uint16_t company_id;                    /*!< Company ID */
+        uint16_t model_id;                      /*!< Model ID */
+        uint16_t group_addr;                    /*!< Group Address */
+    } model_sub_group_addr_comp;                /*!< Event parameters of ESP_BLE_MESH_MODEL_SUBSCRIBE_GROUP_ADDR_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_MODEL_UNSUBSCRIBE_GROUP_ADDR_COMP_EVT
+     */
+    struct ble_mesh_model_unsub_group_addr_comp_param {
+        int err_code;                           /*!< Indicate the result of local model unsubscribing group address */
+        uint16_t element_addr;                  /*!< Element address */
+        uint16_t company_id;                    /*!< Company ID */
+        uint16_t model_id;                      /*!< Model ID */
+        uint16_t group_addr;                    /*!< Group Address */
+    } model_unsub_group_addr_comp;              /*!< Event parameters of ESP_BLE_MESH_MODEL_UNSUBSCRIBE_GROUP_ADDR_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_DEINIT_MESH_COMP_EVT
+     */
+    struct ble_mesh_deinit_mesh_comp_param {
+        int err_code;                           /*!< Indicate the result of BLE Mesh deinitialization */
+    } deinit_mesh_comp;                         /*!< Event parameter of ESP_BLE_MESH_DEINIT_MESH_COMP_EVT */
+} esp_ble_mesh_prov_cb_param_t;
+
+/**
+ * @brief BLE Mesh models related Model ID and Opcode definitions
+ */
+
+/*!< Foundation Models */
+#define ESP_BLE_MESH_MODEL_ID_CONFIG_SRV                            0x0000
+#define ESP_BLE_MESH_MODEL_ID_CONFIG_CLI                            0x0001
+#define ESP_BLE_MESH_MODEL_ID_HEALTH_SRV                            0x0002
+#define ESP_BLE_MESH_MODEL_ID_HEALTH_CLI                            0x0003
+
+/*!< Models from the Mesh Model Specification */
+#define ESP_BLE_MESH_MODEL_ID_GEN_ONOFF_SRV                         0x1000
+#define ESP_BLE_MESH_MODEL_ID_GEN_ONOFF_CLI                         0x1001
+#define ESP_BLE_MESH_MODEL_ID_GEN_LEVEL_SRV                         0x1002
+#define ESP_BLE_MESH_MODEL_ID_GEN_LEVEL_CLI                         0x1003
+#define ESP_BLE_MESH_MODEL_ID_GEN_DEF_TRANS_TIME_SRV                0x1004
+#define ESP_BLE_MESH_MODEL_ID_GEN_DEF_TRANS_TIME_CLI                0x1005
+#define ESP_BLE_MESH_MODEL_ID_GEN_POWER_ONOFF_SRV                   0x1006
+#define ESP_BLE_MESH_MODEL_ID_GEN_POWER_ONOFF_SETUP_SRV             0x1007
+#define ESP_BLE_MESH_MODEL_ID_GEN_POWER_ONOFF_CLI                   0x1008
+#define ESP_BLE_MESH_MODEL_ID_GEN_POWER_LEVEL_SRV                   0x1009
+#define ESP_BLE_MESH_MODEL_ID_GEN_POWER_LEVEL_SETUP_SRV             0x100a
+#define ESP_BLE_MESH_MODEL_ID_GEN_POWER_LEVEL_CLI                   0x100b
+#define ESP_BLE_MESH_MODEL_ID_GEN_BATTERY_SRV                       0x100c
+#define ESP_BLE_MESH_MODEL_ID_GEN_BATTERY_CLI                       0x100d
+#define ESP_BLE_MESH_MODEL_ID_GEN_LOCATION_SRV                      0x100e
+#define ESP_BLE_MESH_MODEL_ID_GEN_LOCATION_SETUP_SRV                0x100f
+#define ESP_BLE_MESH_MODEL_ID_GEN_LOCATION_CLI                      0x1010
+#define ESP_BLE_MESH_MODEL_ID_GEN_ADMIN_PROP_SRV                    0x1011
+#define ESP_BLE_MESH_MODEL_ID_GEN_MANUFACTURER_PROP_SRV             0x1012
+#define ESP_BLE_MESH_MODEL_ID_GEN_USER_PROP_SRV                     0x1013
+#define ESP_BLE_MESH_MODEL_ID_GEN_CLIENT_PROP_SRV                   0x1014
+#define ESP_BLE_MESH_MODEL_ID_GEN_PROP_CLI                          0x1015
+#define ESP_BLE_MESH_MODEL_ID_SENSOR_SRV                            0x1100
+#define ESP_BLE_MESH_MODEL_ID_SENSOR_SETUP_SRV                      0x1101
+#define ESP_BLE_MESH_MODEL_ID_SENSOR_CLI                            0x1102
+#define ESP_BLE_MESH_MODEL_ID_TIME_SRV                              0x1200
+#define ESP_BLE_MESH_MODEL_ID_TIME_SETUP_SRV                        0x1201
+#define ESP_BLE_MESH_MODEL_ID_TIME_CLI                              0x1202
+#define ESP_BLE_MESH_MODEL_ID_SCENE_SRV                             0x1203
+#define ESP_BLE_MESH_MODEL_ID_SCENE_SETUP_SRV                       0x1204
+#define ESP_BLE_MESH_MODEL_ID_SCENE_CLI                             0x1205
+#define ESP_BLE_MESH_MODEL_ID_SCHEDULER_SRV                         0x1206
+#define ESP_BLE_MESH_MODEL_ID_SCHEDULER_SETUP_SRV                   0x1207
+#define ESP_BLE_MESH_MODEL_ID_SCHEDULER_CLI                         0x1208
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_LIGHTNESS_SRV                   0x1300
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_LIGHTNESS_SETUP_SRV             0x1301
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_LIGHTNESS_CLI                   0x1302
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_CTL_SRV                         0x1303
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_CTL_SETUP_SRV                   0x1304
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_CTL_CLI                         0x1305
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_CTL_TEMP_SRV                    0x1306
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_HSL_SRV                         0x1307
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_HSL_SETUP_SRV                   0x1308
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_HSL_CLI                         0x1309
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_HSL_HUE_SRV                     0x130a
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_HSL_SAT_SRV                     0x130b
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_XYL_SRV                         0x130c
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_XYL_SETUP_SRV                   0x130d
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_XYL_CLI                         0x130e
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_LC_SRV                          0x130f
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_LC_SETUP_SRV                    0x1310
+#define ESP_BLE_MESH_MODEL_ID_LIGHT_LC_CLI                          0x1311
+
+/**
+ * esp_ble_mesh_opcode_config_client_get_t belongs to esp_ble_mesh_opcode_t, this typedef is only
+ * used to locate the opcodes used by esp_ble_mesh_config_client_get_state.
+ * The following opcodes will only be used in the esp_ble_mesh_config_client_get_state function.
+ */
+typedef uint32_t esp_ble_mesh_opcode_config_client_get_t;
+
+#define ESP_BLE_MESH_MODEL_OP_BEACON_GET                            ESP_BLE_MESH_MODEL_OP_2(0x80, 0x09) /*!< Config Beacon Get */
+#define ESP_BLE_MESH_MODEL_OP_COMPOSITION_DATA_GET                  ESP_BLE_MESH_MODEL_OP_2(0x80, 0x08) /*!< Config Composition Data Get */
+#define ESP_BLE_MESH_MODEL_OP_DEFAULT_TTL_GET                       ESP_BLE_MESH_MODEL_OP_2(0x80, 0x0C) /*!< Config Default TTL Get */
+#define ESP_BLE_MESH_MODEL_OP_GATT_PROXY_GET                        ESP_BLE_MESH_MODEL_OP_2(0x80, 0x12) /*!< Config GATT Proxy Get */
+#define ESP_BLE_MESH_MODEL_OP_RELAY_GET                             ESP_BLE_MESH_MODEL_OP_2(0x80, 0x26) /*!< Config Relay Get */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_PUB_GET                         ESP_BLE_MESH_MODEL_OP_2(0x80, 0x18) /*!< Config Model Publication Get */
+#define ESP_BLE_MESH_MODEL_OP_FRIEND_GET                            ESP_BLE_MESH_MODEL_OP_2(0x80, 0x0F) /*!< Config Friend Get */
+#define ESP_BLE_MESH_MODEL_OP_HEARTBEAT_PUB_GET                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x38) /*!< Config Heartbeat Publication Get */
+#define ESP_BLE_MESH_MODEL_OP_HEARTBEAT_SUB_GET                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x3a) /*!< Config Heartbeat Subscription Get */
+#define ESP_BLE_MESH_MODEL_OP_NET_KEY_GET                           ESP_BLE_MESH_MODEL_OP_2(0x80, 0x42) /*!< Config NetKey Get */
+#define ESP_BLE_MESH_MODEL_OP_APP_KEY_GET                           ESP_BLE_MESH_MODEL_OP_2(0x80, 0x01) /*!< Config AppKey Get */
+#define ESP_BLE_MESH_MODEL_OP_NODE_IDENTITY_GET                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x46) /*!< Config Node Identity Get */
+#define ESP_BLE_MESH_MODEL_OP_SIG_MODEL_SUB_GET                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x29) /*!< Config SIG Model Subscription Get */
+#define ESP_BLE_MESH_MODEL_OP_VENDOR_MODEL_SUB_GET                  ESP_BLE_MESH_MODEL_OP_2(0x80, 0x2B) /*!< Config Vendor Model Subscription Get */
+#define ESP_BLE_MESH_MODEL_OP_SIG_MODEL_APP_GET                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x4B) /*!< Config SIG Model App Get */
+#define ESP_BLE_MESH_MODEL_OP_VENDOR_MODEL_APP_GET                  ESP_BLE_MESH_MODEL_OP_2(0x80, 0x4D) /*!< Config Vendor Model App Get */
+#define ESP_BLE_MESH_MODEL_OP_KEY_REFRESH_PHASE_GET                 ESP_BLE_MESH_MODEL_OP_2(0x80, 0x15) /*!< Config Key Refresh Phase Get */
+#define ESP_BLE_MESH_MODEL_OP_LPN_POLLTIMEOUT_GET                   ESP_BLE_MESH_MODEL_OP_2(0x80, 0x2D) /*!< Config Low Power Node PollTimeout Get */
+#define ESP_BLE_MESH_MODEL_OP_NETWORK_TRANSMIT_GET                  ESP_BLE_MESH_MODEL_OP_2(0x80, 0x23) /*!< Config Network Transmit Get */
+
+/**
+ * esp_ble_mesh_opcode_config_client_set_t belongs to esp_ble_mesh_opcode_t, this typedef is
+ * only used to locate the opcodes used by esp_ble_mesh_config_client_set_state.
+ * The following opcodes will only be used in the esp_ble_mesh_config_client_set_state function.
+ */
+typedef uint32_t esp_ble_mesh_opcode_config_client_set_t;
+
+#define ESP_BLE_MESH_MODEL_OP_BEACON_SET                            ESP_BLE_MESH_MODEL_OP_2(0x80, 0x0A) /*!< Config Beacon Set */
+#define ESP_BLE_MESH_MODEL_OP_DEFAULT_TTL_SET                       ESP_BLE_MESH_MODEL_OP_2(0x80, 0x0D) /*!< Config Default TTL Set */
+#define ESP_BLE_MESH_MODEL_OP_GATT_PROXY_SET                        ESP_BLE_MESH_MODEL_OP_2(0x80, 0x13) /*!< Config GATT Proxy Set */
+#define ESP_BLE_MESH_MODEL_OP_RELAY_SET                             ESP_BLE_MESH_MODEL_OP_2(0x80, 0x27) /*!< Config Relay Set */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_PUB_SET                         ESP_BLE_MESH_MODEL_OP_1(0x03)       /*!< Config Model Publication Set */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_SUB_ADD                         ESP_BLE_MESH_MODEL_OP_2(0x80, 0x1B) /*!< Config Model Subscription Add */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_SUB_VIRTUAL_ADDR_ADD            ESP_BLE_MESH_MODEL_OP_2(0x80, 0x20) /*!< Config Model Subscription Virtual Address Add */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_SUB_DELETE                      ESP_BLE_MESH_MODEL_OP_2(0x80, 0x1C) /*!< Config Model Subscription Delete */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_SUB_VIRTUAL_ADDR_DELETE         ESP_BLE_MESH_MODEL_OP_2(0x80, 0x21) /*!< Config Model Subscription Virtual Address Delete */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_SUB_OVERWRITE                   ESP_BLE_MESH_MODEL_OP_2(0x80, 0x1E) /*!< Config Model Subscription Overwrite */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_SUB_VIRTUAL_ADDR_OVERWRITE      ESP_BLE_MESH_MODEL_OP_2(0x80, 0x22) /*!< Config Model Subscription Virtual Address Overwrite */
+#define ESP_BLE_MESH_MODEL_OP_NET_KEY_ADD                           ESP_BLE_MESH_MODEL_OP_2(0x80, 0x40) /*!< Config NetKey Add */
+#define ESP_BLE_MESH_MODEL_OP_APP_KEY_ADD                           ESP_BLE_MESH_MODEL_OP_1(0x00)       /*!< Config AppKey Add */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_APP_BIND                        ESP_BLE_MESH_MODEL_OP_2(0x80, 0x3D) /*!< Config Model App Bind */
+#define ESP_BLE_MESH_MODEL_OP_NODE_RESET                            ESP_BLE_MESH_MODEL_OP_2(0x80, 0x49) /*!< Config Node Reset */
+#define ESP_BLE_MESH_MODEL_OP_FRIEND_SET                            ESP_BLE_MESH_MODEL_OP_2(0x80, 0x10) /*!< Config Friend Set */
+#define ESP_BLE_MESH_MODEL_OP_HEARTBEAT_PUB_SET                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x39) /*!< Config Heartbeat Publication Set */
+#define ESP_BLE_MESH_MODEL_OP_HEARTBEAT_SUB_SET                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x3B) /*!< Config Heartbeat Subscription Set */
+#define ESP_BLE_MESH_MODEL_OP_NET_KEY_UPDATE                        ESP_BLE_MESH_MODEL_OP_2(0x80, 0x45) /*!< Config NetKey Update */
+#define ESP_BLE_MESH_MODEL_OP_NET_KEY_DELETE                        ESP_BLE_MESH_MODEL_OP_2(0x80, 0x41) /*!< Config NetKey Delete */
+#define ESP_BLE_MESH_MODEL_OP_APP_KEY_UPDATE                        ESP_BLE_MESH_MODEL_OP_1(0x01)       /*!< Config AppKey Update */
+#define ESP_BLE_MESH_MODEL_OP_APP_KEY_DELETE                        ESP_BLE_MESH_MODEL_OP_2(0x80, 0x00) /*!< Config AppKey Delete */
+#define ESP_BLE_MESH_MODEL_OP_NODE_IDENTITY_SET                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x47) /*!< Config Node Identity Set */
+#define ESP_BLE_MESH_MODEL_OP_KEY_REFRESH_PHASE_SET                 ESP_BLE_MESH_MODEL_OP_2(0x80, 0x16) /*!< Config Key Refresh Phase Set */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_PUB_VIRTUAL_ADDR_SET            ESP_BLE_MESH_MODEL_OP_2(0x80, 0x1A) /*!< Config Model Publication Virtual Address Set */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_SUB_DELETE_ALL                  ESP_BLE_MESH_MODEL_OP_2(0x80, 0x1D) /*!< Config Model Subscription Delete All */
+#define ESP_BLE_MESH_MODEL_OP_MODEL_APP_UNBIND                      ESP_BLE_MESH_MODEL_OP_2(0x80, 0x3F) /*!< Config Model App Unbind */
+#define ESP_BLE_MESH_MODEL_OP_NETWORK_TRANSMIT_SET                  ESP_BLE_MESH_MODEL_OP_2(0x80, 0x24) /*!< Config Network Transmit Set */
+
+/**
+ * esp_ble_mesh_opcode_config_status_t belongs to esp_ble_mesh_opcode_t, this typedef is only
+ * used to locate the opcodes used by the Config Model messages
+ * The following opcodes are used by the BLE Mesh Config Server Model internally to respond
+ * to the Config Client Model's request messages.
+ */
+typedef uint32_t esp_ble_mesh_opcode_config_status_t;
+
+#define ESP_BLE_MESH_MODEL_OP_BEACON_STATUS                         ESP_BLE_MESH_MODEL_OP_2(0x80, 0x0B)
+#define ESP_BLE_MESH_MODEL_OP_COMPOSITION_DATA_STATUS               ESP_BLE_MESH_MODEL_OP_1(0x02)
+#define ESP_BLE_MESH_MODEL_OP_DEFAULT_TTL_STATUS                    ESP_BLE_MESH_MODEL_OP_2(0x80, 0x0E)
+#define ESP_BLE_MESH_MODEL_OP_GATT_PROXY_STATUS                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x14)
+#define ESP_BLE_MESH_MODEL_OP_RELAY_STATUS                          ESP_BLE_MESH_MODEL_OP_2(0x80, 0x28)
+#define ESP_BLE_MESH_MODEL_OP_MODEL_PUB_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x80, 0x19)
+#define ESP_BLE_MESH_MODEL_OP_MODEL_SUB_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x80, 0x1F)
+#define ESP_BLE_MESH_MODEL_OP_SIG_MODEL_SUB_LIST                    ESP_BLE_MESH_MODEL_OP_2(0x80, 0x2A)
+#define ESP_BLE_MESH_MODEL_OP_VENDOR_MODEL_SUB_LIST                 ESP_BLE_MESH_MODEL_OP_2(0x80, 0x2C)
+#define ESP_BLE_MESH_MODEL_OP_NET_KEY_STATUS                        ESP_BLE_MESH_MODEL_OP_2(0x80, 0x44)
+#define ESP_BLE_MESH_MODEL_OP_NET_KEY_LIST                          ESP_BLE_MESH_MODEL_OP_2(0x80, 0x43)
+#define ESP_BLE_MESH_MODEL_OP_APP_KEY_STATUS                        ESP_BLE_MESH_MODEL_OP_2(0x80, 0x03)
+#define ESP_BLE_MESH_MODEL_OP_APP_KEY_LIST                          ESP_BLE_MESH_MODEL_OP_2(0x80, 0x02)
+#define ESP_BLE_MESH_MODEL_OP_NODE_IDENTITY_STATUS                  ESP_BLE_MESH_MODEL_OP_2(0x80, 0x48)
+#define ESP_BLE_MESH_MODEL_OP_MODEL_APP_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x80, 0x3E)
+#define ESP_BLE_MESH_MODEL_OP_SIG_MODEL_APP_LIST                    ESP_BLE_MESH_MODEL_OP_2(0x80, 0x4C)
+#define ESP_BLE_MESH_MODEL_OP_VENDOR_MODEL_APP_LIST                 ESP_BLE_MESH_MODEL_OP_2(0x80, 0x4E)
+#define ESP_BLE_MESH_MODEL_OP_NODE_RESET_STATUS                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x4A)
+#define ESP_BLE_MESH_MODEL_OP_FRIEND_STATUS                         ESP_BLE_MESH_MODEL_OP_2(0x80, 0x11)
+#define ESP_BLE_MESH_MODEL_OP_KEY_REFRESH_PHASE_STATUS              ESP_BLE_MESH_MODEL_OP_2(0x80, 0x17)
+#define ESP_BLE_MESH_MODEL_OP_HEARTBEAT_PUB_STATUS                  ESP_BLE_MESH_MODEL_OP_1(0x06)
+#define ESP_BLE_MESH_MODEL_OP_HEARTBEAT_SUB_STATUS                  ESP_BLE_MESH_MODEL_OP_2(0x80, 0x3C)
+#define ESP_BLE_MESH_MODEL_OP_LPN_POLLTIMEOUT_STATUS                ESP_BLE_MESH_MODEL_OP_2(0x80, 0x2E)
+#define ESP_BLE_MESH_MODEL_OP_NETWORK_TRANSMIT_STATUS               ESP_BLE_MESH_MODEL_OP_2(0x80, 0x25)
+
+/**
+ * This typedef is only used to indicate the status code contained in some of
+ * the Configuration Server Model status message.
+ */
+typedef uint8_t esp_ble_mesh_cfg_status_t;
+
+#define ESP_BLE_MESH_CFG_STATUS_SUCCESS                             0x00
+#define ESP_BLE_MESH_CFG_STATUS_INVALID_ADDRESS                     0x01
+#define ESP_BLE_MESH_CFG_STATUS_INVALID_MODEL                       0x02
+#define ESP_BLE_MESH_CFG_STATUS_INVALID_APPKEY                      0x03
+#define ESP_BLE_MESH_CFG_STATUS_INVALID_NETKEY                      0x04
+#define ESP_BLE_MESH_CFG_STATUS_INSUFFICIENT_RESOURCES              0x05
+#define ESP_BLE_MESH_CFG_STATUS_KEY_INDEX_ALREADY_STORED            0x06
+#define ESP_BLE_MESH_CFG_STATUS_INVALID_PUBLISH_PARAMETERS          0x07
+#define ESP_BLE_MESH_CFG_STATUS_NOT_A_SUBSCRIBE_MODEL               0x08
+#define ESP_BLE_MESH_CFG_STATUS_STORAGE_FAILURE                     0x09
+#define ESP_BLE_MESH_CFG_STATUS_FEATURE_NOT_SUPPORTED               0x0A
+#define ESP_BLE_MESH_CFG_STATUS_CANNOT_UPDATE                       0x0B
+#define ESP_BLE_MESH_CFG_STATUS_CANNOT_REMOVE                       0x0C
+#define ESP_BLE_MESH_CFG_STATUS_CANNOT_BIND                         0x0D
+#define ESP_BLE_MESH_CFG_STATUS_TEMP_UNABLE_TO_CHANGE_STATE         0x0E
+#define ESP_BLE_MESH_CFG_STATUS_CANNOT_SET                          0x0F
+#define ESP_BLE_MESH_CFG_STATUS_UNSPECIFIED_ERROR                   0x10
+#define ESP_BLE_MESH_CFG_STATUS_INVALID_BINDING                     0x11
+
+/**
+ * esp_ble_mesh_opcode_health_client_get_t belongs to esp_ble_mesh_opcode_t, this typedef is
+ * only used to locate the opcodes used by esp_ble_mesh_health_client_get_state.
+ * The following opcodes will only be used in the esp_ble_mesh_health_client_get_state function.
+ */
+typedef uint32_t esp_ble_mesh_opcode_health_client_get_t;
+
+#define ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_GET                      ESP_BLE_MESH_MODEL_OP_2(0x80, 0x31) /*!< Health Fault Get */
+#define ESP_BLE_MESH_MODEL_OP_HEALTH_PERIOD_GET                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x34) /*!< Health Period Get */
+#define ESP_BLE_MESH_MODEL_OP_ATTENTION_GET                         ESP_BLE_MESH_MODEL_OP_2(0x80, 0x04) /*!< Health Attention Get */
+
+/**
+ * esp_ble_mesh_opcode_health_client_set_t belongs to esp_ble_mesh_opcode_t, this typedef is
+ * only used to locate the opcodes used by esp_ble_mesh_health_client_set_state.
+ * The following opcodes will only be used in the esp_ble_mesh_health_client_set_state function.
+ */
+typedef uint32_t esp_ble_mesh_opcode_health_client_set_t;
+
+#define ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_CLEAR                    ESP_BLE_MESH_MODEL_OP_2(0x80, 0x2F) /*!< Health Fault Clear */
+#define ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_CLEAR_UNACK              ESP_BLE_MESH_MODEL_OP_2(0x80, 0x30) /*!< Health Fault Clear Unacknowledged */
+#define ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_TEST                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x32) /*!< Health Fault Test */
+#define ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_TEST_UNACK               ESP_BLE_MESH_MODEL_OP_2(0x80, 0x33) /*!< Health Fault Test Unacknowledged */
+#define ESP_BLE_MESH_MODEL_OP_HEALTH_PERIOD_SET                     ESP_BLE_MESH_MODEL_OP_2(0x80, 0x35) /*!< Health Period Set */
+#define ESP_BLE_MESH_MODEL_OP_HEALTH_PERIOD_SET_UNACK               ESP_BLE_MESH_MODEL_OP_2(0x80, 0x36) /*!< Health Period Set Unacknowledged */
+#define ESP_BLE_MESH_MODEL_OP_ATTENTION_SET                         ESP_BLE_MESH_MODEL_OP_2(0x80, 0x05) /*!< Health Attention Set */
+#define ESP_BLE_MESH_MODEL_OP_ATTENTION_SET_UNACK                   ESP_BLE_MESH_MODEL_OP_2(0x80, 0x06) /*!< Health Attention Set Unacknowledged */
+
+/**
+ * esp_ble_mesh_health_model_status_t belongs to esp_ble_mesh_opcode_t, this typedef is
+ * only used to locate the opcodes used by the Health Model messages.
+ * The following opcodes are used by the BLE Mesh Health Server Model internally to
+ * respond to the Health Client Model's request messages.
+ */
+typedef uint32_t esp_ble_mesh_health_model_status_t;
+
+#define ESP_BLE_MESH_MODEL_OP_HEALTH_CURRENT_STATUS                 ESP_BLE_MESH_MODEL_OP_1(0x04)
+#define ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_STATUS                   ESP_BLE_MESH_MODEL_OP_1(0x05)
+#define ESP_BLE_MESH_MODEL_OP_HEALTH_PERIOD_STATUS                  ESP_BLE_MESH_MODEL_OP_2(0x80, 0x37)
+#define ESP_BLE_MESH_MODEL_OP_ATTENTION_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x80, 0x07)
+
+/**
+ * esp_ble_mesh_generic_message_opcode_t belongs to esp_ble_mesh_opcode_t, this typedef is
+ * only used to locate the opcodes used by functions esp_ble_mesh_generic_client_get_state
+ * & esp_ble_mesh_generic_client_set_state.
+ */
+typedef uint32_t esp_ble_mesh_generic_message_opcode_t;
+
+/*!< Generic OnOff Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_ONOFF_GET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x01)
+#define ESP_BLE_MESH_MODEL_OP_GEN_ONOFF_SET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x02)
+#define ESP_BLE_MESH_MODEL_OP_GEN_ONOFF_SET_UNACK                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x03)
+#define ESP_BLE_MESH_MODEL_OP_GEN_ONOFF_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x82, 0x04)
+
+/*!< Generic Level Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_LEVEL_GET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x05)
+#define ESP_BLE_MESH_MODEL_OP_GEN_LEVEL_SET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x06)
+#define ESP_BLE_MESH_MODEL_OP_GEN_LEVEL_SET_UNACK                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x07)
+#define ESP_BLE_MESH_MODEL_OP_GEN_LEVEL_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x82, 0x08)
+#define ESP_BLE_MESH_MODEL_OP_GEN_DELTA_SET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x09)
+#define ESP_BLE_MESH_MODEL_OP_GEN_DELTA_SET_UNACK                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x0A)
+#define ESP_BLE_MESH_MODEL_OP_GEN_MOVE_SET                          ESP_BLE_MESH_MODEL_OP_2(0x82, 0x0B)
+#define ESP_BLE_MESH_MODEL_OP_GEN_MOVE_SET_UNACK                    ESP_BLE_MESH_MODEL_OP_2(0x82, 0x0C)
+
+/*!< Generic Default Transition Time Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_DEF_TRANS_TIME_GET                ESP_BLE_MESH_MODEL_OP_2(0x82, 0x0D)
+#define ESP_BLE_MESH_MODEL_OP_GEN_DEF_TRANS_TIME_SET                ESP_BLE_MESH_MODEL_OP_2(0x82, 0x0E)
+#define ESP_BLE_MESH_MODEL_OP_GEN_DEF_TRANS_TIME_SET_UNACK          ESP_BLE_MESH_MODEL_OP_2(0x82, 0x0F)
+#define ESP_BLE_MESH_MODEL_OP_GEN_DEF_TRANS_TIME_STATUS             ESP_BLE_MESH_MODEL_OP_2(0x82, 0x10)
+
+/*!< Generic Power OnOff Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_ONPOWERUP_GET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x11)
+#define ESP_BLE_MESH_MODEL_OP_GEN_ONPOWERUP_STATUS                  ESP_BLE_MESH_MODEL_OP_2(0x82, 0x12)
+
+/*!< Generic Power OnOff Setup Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_ONPOWERUP_SET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x13)
+#define ESP_BLE_MESH_MODEL_OP_GEN_ONPOWERUP_SET_UNACK               ESP_BLE_MESH_MODEL_OP_2(0x82, 0x14)
+
+/*!< Generic Power Level Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_LEVEL_GET                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x15)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_LEVEL_SET                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x16)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_LEVEL_SET_UNACK             ESP_BLE_MESH_MODEL_OP_2(0x82, 0x17)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_LEVEL_STATUS                ESP_BLE_MESH_MODEL_OP_2(0x82, 0x18)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_LAST_GET                    ESP_BLE_MESH_MODEL_OP_2(0x82, 0x19)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_LAST_STATUS                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x1A)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_DEFAULT_GET                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x1B)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_DEFAULT_STATUS              ESP_BLE_MESH_MODEL_OP_2(0x82, 0x1C)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_RANGE_GET                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x1D)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_RANGE_STATUS                ESP_BLE_MESH_MODEL_OP_2(0x82, 0x1E)
+
+/*!< Generic Power Level Setup Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_DEFAULT_SET                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x1F)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_DEFAULT_SET_UNACK           ESP_BLE_MESH_MODEL_OP_2(0x82, 0x20)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_RANGE_SET                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x21)
+#define ESP_BLE_MESH_MODEL_OP_GEN_POWER_RANGE_SET_UNACK             ESP_BLE_MESH_MODEL_OP_2(0x82, 0x22)
+
+/*!< Generic Battery Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_BATTERY_GET                       ESP_BLE_MESH_MODEL_OP_2(0x82, 0x23)
+#define ESP_BLE_MESH_MODEL_OP_GEN_BATTERY_STATUS                    ESP_BLE_MESH_MODEL_OP_2(0x82, 0x24)
+
+/*!< Generic Location Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_LOC_GLOBAL_GET                    ESP_BLE_MESH_MODEL_OP_2(0x82, 0x25)
+#define ESP_BLE_MESH_MODEL_OP_GEN_LOC_GLOBAL_STATUS                 ESP_BLE_MESH_MODEL_OP_1(0x40)
+#define ESP_BLE_MESH_MODEL_OP_GEN_LOC_LOCAL_GET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x26)
+#define ESP_BLE_MESH_MODEL_OP_GEN_LOC_LOCAL_STATUS                  ESP_BLE_MESH_MODEL_OP_2(0x82, 0x27)
+
+/*!< Generic Location Setup Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_LOC_GLOBAL_SET                    ESP_BLE_MESH_MODEL_OP_1(0x41)
+#define ESP_BLE_MESH_MODEL_OP_GEN_LOC_GLOBAL_SET_UNACK              ESP_BLE_MESH_MODEL_OP_1(0x42)
+#define ESP_BLE_MESH_MODEL_OP_GEN_LOC_LOCAL_SET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x28)
+#define ESP_BLE_MESH_MODEL_OP_GEN_LOC_LOCAL_SET_UNACK               ESP_BLE_MESH_MODEL_OP_2(0x82, 0x29)
+
+/*!< Generic Manufacturer Property Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_MANUFACTURER_PROPERTIES_GET       ESP_BLE_MESH_MODEL_OP_2(0x82, 0x2A)
+#define ESP_BLE_MESH_MODEL_OP_GEN_MANUFACTURER_PROPERTIES_STATUS    ESP_BLE_MESH_MODEL_OP_1(0x43)
+#define ESP_BLE_MESH_MODEL_OP_GEN_MANUFACTURER_PROPERTY_GET         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x2B)
+#define ESP_BLE_MESH_MODEL_OP_GEN_MANUFACTURER_PROPERTY_SET         ESP_BLE_MESH_MODEL_OP_1(0x44)
+#define ESP_BLE_MESH_MODEL_OP_GEN_MANUFACTURER_PROPERTY_SET_UNACK   ESP_BLE_MESH_MODEL_OP_1(0x45)
+#define ESP_BLE_MESH_MODEL_OP_GEN_MANUFACTURER_PROPERTY_STATUS      ESP_BLE_MESH_MODEL_OP_1(0x46)
+
+/*!< Generic Admin Property Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTIES_GET              ESP_BLE_MESH_MODEL_OP_2(0x82, 0x2C)
+#define ESP_BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTIES_STATUS           ESP_BLE_MESH_MODEL_OP_1(0x47)
+#define ESP_BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_GET                ESP_BLE_MESH_MODEL_OP_2(0x82, 0x2D)
+#define ESP_BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_SET                ESP_BLE_MESH_MODEL_OP_1(0x48)
+#define ESP_BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_SET_UNACK          ESP_BLE_MESH_MODEL_OP_1(0x49)
+#define ESP_BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_STATUS             ESP_BLE_MESH_MODEL_OP_1(0x4A)
+
+/*!< Generic User Property Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_USER_PROPERTIES_GET               ESP_BLE_MESH_MODEL_OP_2(0x82, 0x2E)
+#define ESP_BLE_MESH_MODEL_OP_GEN_USER_PROPERTIES_STATUS            ESP_BLE_MESH_MODEL_OP_1(0x4B)
+#define ESP_BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_GET                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x2F)
+#define ESP_BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_SET                 ESP_BLE_MESH_MODEL_OP_1(0x4C)
+#define ESP_BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_SET_UNACK           ESP_BLE_MESH_MODEL_OP_1(0x4D)
+#define ESP_BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_STATUS              ESP_BLE_MESH_MODEL_OP_1(0x4E)
+
+/*!< Generic Client Property Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_GEN_CLIENT_PROPERTIES_GET             ESP_BLE_MESH_MODEL_OP_1(0x4F)
+#define ESP_BLE_MESH_MODEL_OP_GEN_CLIENT_PROPERTIES_STATUS          ESP_BLE_MESH_MODEL_OP_1(0x50)
+
+/**
+ * esp_ble_mesh_sensor_message_opcode_t belongs to esp_ble_mesh_opcode_t, this typedef is
+ * only used to locate the opcodes used by functions esp_ble_mesh_sensor_client_get_state
+ * & esp_ble_mesh_sensor_client_set_state.
+ */
+typedef uint32_t esp_ble_mesh_sensor_message_opcode_t;
+
+/*!< Sensor Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_DESCRIPTOR_GET                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x30)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_DESCRIPTOR_STATUS              ESP_BLE_MESH_MODEL_OP_1(0x51)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_GET                            ESP_BLE_MESH_MODEL_OP_2(0x82, 0x31)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_STATUS                         ESP_BLE_MESH_MODEL_OP_1(0x52)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_COLUMN_GET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x32)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_COLUMN_STATUS                  ESP_BLE_MESH_MODEL_OP_1(0x53)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_SERIES_GET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x33)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_SERIES_STATUS                  ESP_BLE_MESH_MODEL_OP_1(0x54)
+
+/*!< Sensor Setup Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_CADENCE_GET                    ESP_BLE_MESH_MODEL_OP_2(0x82, 0x34)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_CADENCE_SET                    ESP_BLE_MESH_MODEL_OP_1(0x55)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_CADENCE_SET_UNACK              ESP_BLE_MESH_MODEL_OP_1(0x56)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_CADENCE_STATUS                 ESP_BLE_MESH_MODEL_OP_1(0x57)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_SETTINGS_GET                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x35)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_SETTINGS_STATUS                ESP_BLE_MESH_MODEL_OP_1(0x58)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_SETTING_GET                    ESP_BLE_MESH_MODEL_OP_2(0x82, 0x36)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_SETTING_SET                    ESP_BLE_MESH_MODEL_OP_1(0x59)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_SETTING_SET_UNACK              ESP_BLE_MESH_MODEL_OP_1(0x5A)
+#define ESP_BLE_MESH_MODEL_OP_SENSOR_SETTING_STATUS                 ESP_BLE_MESH_MODEL_OP_1(0x5B)
+
+/**
+ * esp_ble_mesh_time_scene_message_opcode_t belongs to esp_ble_mesh_opcode_t, this typedef is
+ * only used to locate the opcodes used by functions esp_ble_mesh_time_scene_client_get_state
+ * & esp_ble_mesh_time_scene_client_set_state.
+ */
+typedef uint32_t esp_ble_mesh_time_scene_message_opcode_t;
+
+/*!< Time Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_TIME_GET                              ESP_BLE_MESH_MODEL_OP_2(0x82, 0x37)
+#define ESP_BLE_MESH_MODEL_OP_TIME_SET                              ESP_BLE_MESH_MODEL_OP_1(0x5C)
+#define ESP_BLE_MESH_MODEL_OP_TIME_STATUS                           ESP_BLE_MESH_MODEL_OP_1(0x5D)
+#define ESP_BLE_MESH_MODEL_OP_TIME_ROLE_GET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x38)
+#define ESP_BLE_MESH_MODEL_OP_TIME_ROLE_SET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x39)
+#define ESP_BLE_MESH_MODEL_OP_TIME_ROLE_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x82, 0x3A)
+#define ESP_BLE_MESH_MODEL_OP_TIME_ZONE_GET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x3B)
+#define ESP_BLE_MESH_MODEL_OP_TIME_ZONE_SET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x3C)
+#define ESP_BLE_MESH_MODEL_OP_TIME_ZONE_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x82, 0x3D)
+#define ESP_BLE_MESH_MODEL_OP_TAI_UTC_DELTA_GET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x3E)
+#define ESP_BLE_MESH_MODEL_OP_TAI_UTC_DELTA_SET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x3F)
+#define ESP_BLE_MESH_MODEL_OP_TAI_UTC_DELTA_STATUS                  ESP_BLE_MESH_MODEL_OP_2(0x82, 0x40)
+
+/*!< Scene Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_SCENE_GET                             ESP_BLE_MESH_MODEL_OP_2(0x82, 0x41)
+#define ESP_BLE_MESH_MODEL_OP_SCENE_RECALL                          ESP_BLE_MESH_MODEL_OP_2(0x82, 0x42)
+#define ESP_BLE_MESH_MODEL_OP_SCENE_RECALL_UNACK                    ESP_BLE_MESH_MODEL_OP_2(0x82, 0x43)
+#define ESP_BLE_MESH_MODEL_OP_SCENE_STATUS                          ESP_BLE_MESH_MODEL_OP_1(0x5E)
+#define ESP_BLE_MESH_MODEL_OP_SCENE_REGISTER_GET                    ESP_BLE_MESH_MODEL_OP_2(0x82, 0x44)
+#define ESP_BLE_MESH_MODEL_OP_SCENE_REGISTER_STATUS                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x45)
+
+/*!< Scene Setup Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_SCENE_STORE                           ESP_BLE_MESH_MODEL_OP_2(0x82, 0x46)
+#define ESP_BLE_MESH_MODEL_OP_SCENE_STORE_UNACK                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x47)
+#define ESP_BLE_MESH_MODEL_OP_SCENE_DELETE                          ESP_BLE_MESH_MODEL_OP_2(0x82, 0x9E)
+#define ESP_BLE_MESH_MODEL_OP_SCENE_DELETE_UNACK                    ESP_BLE_MESH_MODEL_OP_2(0x82, 0x9F)
+
+/*!< Scheduler Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_SCHEDULER_ACT_GET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x48)
+#define ESP_BLE_MESH_MODEL_OP_SCHEDULER_ACT_STATUS                  ESP_BLE_MESH_MODEL_OP_1(0x5F)
+#define ESP_BLE_MESH_MODEL_OP_SCHEDULER_GET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x49)
+#define ESP_BLE_MESH_MODEL_OP_SCHEDULER_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x82, 0x4A)
+
+/*!< Scheduler Setup Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_SCHEDULER_ACT_SET                     ESP_BLE_MESH_MODEL_OP_1(0x60)
+#define ESP_BLE_MESH_MODEL_OP_SCHEDULER_ACT_SET_UNACK               ESP_BLE_MESH_MODEL_OP_1(0x61)
+
+/**
+ * esp_ble_mesh_light_message_opcode_t belongs to esp_ble_mesh_opcode_t, this typedef is
+ * only used to locate the opcodes used by functions esp_ble_mesh_light_client_get_state
+ * & esp_ble_mesh_light_client_set_state.
+ */
+typedef uint32_t esp_ble_mesh_light_message_opcode_t;
+
+/*!< Light Lightness Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_GET                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x4B)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_SET                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x4C)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_SET_UNACK             ESP_BLE_MESH_MODEL_OP_2(0x82, 0x4D)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_STATUS                ESP_BLE_MESH_MODEL_OP_2(0x82, 0x4E)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LINEAR_GET            ESP_BLE_MESH_MODEL_OP_2(0x82, 0x4F)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LINEAR_SET            ESP_BLE_MESH_MODEL_OP_2(0x82, 0x50)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LINEAR_SET_UNACK      ESP_BLE_MESH_MODEL_OP_2(0x82, 0x51)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LINEAR_STATUS         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x52)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LAST_GET              ESP_BLE_MESH_MODEL_OP_2(0x82, 0x53)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LAST_STATUS           ESP_BLE_MESH_MODEL_OP_2(0x82, 0x54)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_DEFAULT_GET           ESP_BLE_MESH_MODEL_OP_2(0x82, 0x55)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_DEFAULT_STATUS        ESP_BLE_MESH_MODEL_OP_2(0x82, 0x56)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_RANGE_GET             ESP_BLE_MESH_MODEL_OP_2(0x82, 0x57)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_RANGE_STATUS          ESP_BLE_MESH_MODEL_OP_2(0x82, 0x58)
+
+/*!< Light Lightness Setup Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_DEFAULT_SET           ESP_BLE_MESH_MODEL_OP_2(0x82, 0x59)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_DEFAULT_SET_UNACK     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x5A)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_RANGE_SET             ESP_BLE_MESH_MODEL_OP_2(0x82, 0x5B)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_RANGE_SET_UNACK       ESP_BLE_MESH_MODEL_OP_2(0x82, 0x5C)
+
+/*!< Light CTL Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_GET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x5D)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_SET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x5E)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_SET_UNACK                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x5F)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x82, 0x60)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_GET             ESP_BLE_MESH_MODEL_OP_2(0x82, 0x61)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_RANGE_GET       ESP_BLE_MESH_MODEL_OP_2(0x82, 0x62)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_RANGE_STATUS    ESP_BLE_MESH_MODEL_OP_2(0x82, 0x63)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_SET             ESP_BLE_MESH_MODEL_OP_2(0x82, 0x64)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_SET_UNACK       ESP_BLE_MESH_MODEL_OP_2(0x82, 0x65)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_STATUS          ESP_BLE_MESH_MODEL_OP_2(0x82, 0x66)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_DEFAULT_GET                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x67)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_DEFAULT_STATUS              ESP_BLE_MESH_MODEL_OP_2(0x82, 0x68)
+
+/*!< Light CTL Setup Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_DEFAULT_SET                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x69)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_DEFAULT_SET_UNACK           ESP_BLE_MESH_MODEL_OP_2(0x82, 0x6A)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_RANGE_SET       ESP_BLE_MESH_MODEL_OP_2(0x82, 0x6B)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_RANGE_SET_UNACK ESP_BLE_MESH_MODEL_OP_2(0x82, 0x6C)
+
+/*!< Light HSL Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_GET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x6D)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_HUE_GET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x6E)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_HUE_SET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x6F)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_HUE_SET_UNACK               ESP_BLE_MESH_MODEL_OP_2(0x82, 0x70)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_HUE_STATUS                  ESP_BLE_MESH_MODEL_OP_2(0x82, 0x71)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_SATURATION_GET              ESP_BLE_MESH_MODEL_OP_2(0x82, 0x72)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_SATURATION_SET              ESP_BLE_MESH_MODEL_OP_2(0x82, 0x73)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_SATURATION_SET_UNACK        ESP_BLE_MESH_MODEL_OP_2(0x82, 0x74)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_SATURATION_STATUS           ESP_BLE_MESH_MODEL_OP_2(0x82, 0x75)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_SET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x76)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_SET_UNACK                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x77)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x82, 0x78)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_TARGET_GET                  ESP_BLE_MESH_MODEL_OP_2(0x82, 0x79)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_TARGET_STATUS               ESP_BLE_MESH_MODEL_OP_2(0x82, 0x7A)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_DEFAULT_GET                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x7B)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_DEFAULT_STATUS              ESP_BLE_MESH_MODEL_OP_2(0x82, 0x7C)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_RANGE_GET                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x7D)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_RANGE_STATUS                ESP_BLE_MESH_MODEL_OP_2(0x82, 0x7E)
+
+/*!< Light HSL Setup Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_DEFAULT_SET                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x7F)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_DEFAULT_SET_UNACK           ESP_BLE_MESH_MODEL_OP_2(0x82, 0x80)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_RANGE_SET                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x81)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_RANGE_SET_UNACK             ESP_BLE_MESH_MODEL_OP_2(0x82, 0x82)
+
+/*!< Light xyL Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_GET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x83)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_SET                         ESP_BLE_MESH_MODEL_OP_2(0x82, 0x84)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_SET_UNACK                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x85)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_STATUS                      ESP_BLE_MESH_MODEL_OP_2(0x82, 0x86)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_TARGET_GET                  ESP_BLE_MESH_MODEL_OP_2(0x82, 0x87)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_TARGET_STATUS               ESP_BLE_MESH_MODEL_OP_2(0x82, 0x88)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_DEFAULT_GET                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x89)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_DEFAULT_STATUS              ESP_BLE_MESH_MODEL_OP_2(0x82, 0x8A)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_RANGE_GET                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x8B)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_RANGE_STATUS                ESP_BLE_MESH_MODEL_OP_2(0x82, 0x8C)
+
+/*!< Light xyL Setup Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_DEFAULT_SET                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x8D)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_DEFAULT_SET_UNACK           ESP_BLE_MESH_MODEL_OP_2(0x82, 0x8E)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_RANGE_SET                   ESP_BLE_MESH_MODEL_OP_2(0x82, 0x8F)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_RANGE_SET_UNACK             ESP_BLE_MESH_MODEL_OP_2(0x82, 0x90)
+
+/*!< Light Control Message Opcode */
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_MODE_GET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x91)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_MODE_SET                     ESP_BLE_MESH_MODEL_OP_2(0x82, 0x92)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_MODE_SET_UNACK               ESP_BLE_MESH_MODEL_OP_2(0x82, 0x93)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_MODE_STATUS                  ESP_BLE_MESH_MODEL_OP_2(0x82, 0x94)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_OM_GET                       ESP_BLE_MESH_MODEL_OP_2(0x82, 0x95)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_OM_SET                       ESP_BLE_MESH_MODEL_OP_2(0x82, 0x96)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_OM_SET_UNACK                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x97)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_OM_STATUS                    ESP_BLE_MESH_MODEL_OP_2(0x82, 0x98)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_LIGHT_ONOFF_GET              ESP_BLE_MESH_MODEL_OP_2(0x82, 0x99)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_LIGHT_ONOFF_SET              ESP_BLE_MESH_MODEL_OP_2(0x82, 0x9A)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_LIGHT_ONOFF_SET_UNACK        ESP_BLE_MESH_MODEL_OP_2(0x82, 0x9B)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_LIGHT_ONOFF_STATUS           ESP_BLE_MESH_MODEL_OP_2(0x82, 0x9C)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_GET                 ESP_BLE_MESH_MODEL_OP_2(0x82, 0x9D)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_SET                 ESP_BLE_MESH_MODEL_OP_1(0x62)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_SET_UNACK           ESP_BLE_MESH_MODEL_OP_1(0x63)
+#define ESP_BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_STATUS              ESP_BLE_MESH_MODEL_OP_1(0x64)
+
+typedef uint32_t esp_ble_mesh_opcode_t;
+/*!< End of defines of esp_ble_mesh_opcode_t */
+
+/**
+ * This typedef is only used to indicate the status code contained in some of the
+ * server models (e.g. Generic Server Model) status message.
+ */
+typedef uint8_t esp_ble_mesh_model_status_t;
+
+#define ESP_BLE_MESH_MODEL_STATUS_SUCCESS                           0x00
+#define ESP_BLE_MESH_MODEL_STATUS_CANNOT_SET_RANGE_MIN              0x01
+#define ESP_BLE_MESH_MODEL_STATUS_CANNOT_SET_RANGE_MAX              0x02
+
+/**
+ * @brief BLE Mesh client models related definitions
+ */
+
+/** Client model Get/Set message opcode and corresponding Status message opcode */
+typedef struct {
+    uint32_t cli_op;        /*!< The client message opcode */
+    uint32_t status_op;     /*!< The server status opcode corresponding to the client message opcode */
+} esp_ble_mesh_client_op_pair_t;
+
+/** Client Model user data context. */
+typedef struct {
+    esp_ble_mesh_model_t *model;                    /*!< Pointer to the client model. Initialized by the stack. */
+    int op_pair_size;                               /*!< Size of the op_pair */
+    const esp_ble_mesh_client_op_pair_t *op_pair;   /*!< Table containing get/set message opcode and corresponding status message opcode */
+    uint32_t publish_status;                        /*!< Callback used to handle the received unsolicited message. Initialized by the stack. */
+    void *internal_data;                            /*!< Pointer to the internal data of client model */
+    uint8_t msg_role;                               /*!< Role of the device (Node/Provisioner) that is going to send messages */
+} esp_ble_mesh_client_t;
+
+/** Common parameters of the messages sent by Client Model. */
+typedef struct {
+    esp_ble_mesh_opcode_t opcode;   /*!< Message opcode */
+    esp_ble_mesh_model_t *model;    /*!< Pointer to the client model structure */
+    esp_ble_mesh_msg_ctx_t ctx;     /*!< The context used to send message */
+    int32_t msg_timeout;            /*!< Timeout value (ms) to get response to the sent message */
+    /*!< Note: if using default timeout value in menuconfig, make sure to set this value to 0 */
+    uint8_t msg_role;               /*!< Role of the device - Node/Provisioner */
+} esp_ble_mesh_client_common_param_t;
+
+/**
+ * @brief BLE Mesh server models related definitions
+ */
+
+/** This enum value is the flag of transition timer operation */
+enum {
+    ESP_BLE_MESH_SERVER_TRANS_TIMER_START,  /* Proper transition timer has been started */
+    ESP_BLE_MESH_SERVER_FLAG_MAX,
+};
+
+/** Parameters of the server model state transition */
+typedef struct {
+    bool just_started;          /*!< Indicate if the state transition has just started */
+
+    uint8_t  trans_time;        /*!< State transition time */
+    uint8_t  remain_time;       /*!< Remaining time of state transition */
+    uint8_t  delay;             /*!< Delay before starting state transition */
+    uint32_t quo_tt;            /*!< Duration of each divided transition step */
+    uint32_t counter;           /*!< Number of steps which the transition duration is divided */
+    uint32_t total_duration;    /*!< State transition total duration */
+    int64_t  start_timestamp;   /*!< Time when the state transition is started */
+
+    /**
+     * Flag used to indicate if the transition timer has been started internally.
+     *
+     * If the model which contains esp_ble_mesh_state_transition_t sets "set_auto_rsp"
+     * to ESP_BLE_MESH_SERVER_RSP_BY_APP, the handler of the timer shall be initialized
+     * by the users.
+     *
+     * And users can use this flag to indicate whether the timer is started or not.
+     */
+    BLE_MESH_ATOMIC_DEFINE(flag, ESP_BLE_MESH_SERVER_FLAG_MAX);
+    struct k_delayed_work timer;    /*!< Timer used for state transition */
+} esp_ble_mesh_state_transition_t;
+
+/** Parameters of the server model received last same set message. */
+typedef struct {
+    uint8_t  tid;       /*!< Transaction number of the last message */
+    uint16_t src;       /*!< Source address of the last message */
+    uint16_t dst;       /*!< Destination address of the last message */
+    int64_t  timestamp; /*!< Time when the last message is received */
+} esp_ble_mesh_last_msg_info_t;
+
+#define ESP_BLE_MESH_SERVER_RSP_BY_APP  0   /*!< Response need to be sent in the application */
+#define ESP_BLE_MESH_SERVER_AUTO_RSP    1   /*!< Response will be sent internally */
+
+/** Parameters of the Server Model response control */
+typedef struct {
+    /**
+     * @brief BLE Mesh Server Response Option
+     *        1. If get_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, then the
+     *           response of Client Get messages need to be replied by the application;
+     *        2. If get_auto_rsp is set to ESP_BLE_MESH_SERVER_AUTO_RSP, then the
+     *           response of Client Get messages will be replied by the server models;
+     *        3. If set_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, then the
+     *           response of Client Set messages need to be replied by the application;
+     *        4. If set_auto_rsp is set to ESP_BLE_MESH_SERVER_AUTO_RSP, then the
+     *           response of Client Set messages will be replied by the server models;
+     *        5. If status_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, then the
+     *           response of Server Status messages need to be replied by the application;
+     *        6. If status_auto_rsp is set to ESP_BLE_MESH_SERVER_AUTO_RSP, then the
+     *           response of Server Status messages will be replied by the server models;
+     */
+    uint8_t get_auto_rsp : 1,       /*!< Response control for Client Get messages */
+            set_auto_rsp : 1,       /*!< Response control for Client Set messages */
+            status_auto_rsp : 1;    /*!< Response control for Server Status messages */
+} esp_ble_mesh_server_rsp_ctrl_t;
+
+/**
+ * @brief Server model state value union
+ */
+typedef union {
+    struct {
+        uint8_t onoff;          /*!< The value of the Generic OnOff state */
+    } gen_onoff;                /*!< The Generic OnOff state */
+    struct {
+        int16_t level;          /*!< The value of the Generic Level state */
+    } gen_level;                /*!< The Generic Level state */
+    struct {
+        uint8_t onpowerup;      /*!< The value of the Generic OnPowerUp state */
+    } gen_onpowerup;            /*!< The Generic OnPowerUp state */
+    struct {
+        uint16_t power;         /*!< The value of the Generic Power Actual state */
+    } gen_power_actual;         /*!< The Generic Power Actual state */
+    struct {
+        uint16_t lightness;     /*!< The value of the Light Lightness Actual state */
+    } light_lightness_actual;   /*!< The Light Lightness Actual state */
+    struct {
+        uint16_t lightness;     /*!< The value of the Light Lightness Linear state */
+    } light_lightness_linear;   /*!< The Light Lightness Linear state */
+    struct {
+        uint16_t lightness;     /*!< The value of the Light CTL Lightness state */
+    } light_ctl_lightness;      /*!< The Light CTL Lightness state */
+    struct {
+        uint16_t temperature;   /*!< The value of the Light CTL Temperature state */
+        int16_t  delta_uv;      /*!< The value of the Light CTL Delta UV state */
+    } light_ctl_temp_delta_uv;  /*!< The Light CTL Temperature & Delta UV states */
+    struct {
+        uint16_t lightness;     /*!< The value of the Light HSL Lightness state */
+        uint16_t hue;           /*!< The value of the Light HSL Hue state */
+        uint16_t saturation;    /*!< The value of the Light HSL Saturation state */
+    } light_hsl;                /*!< The Light HSL composite state */
+    struct {
+        uint16_t lightness;     /*!< The value of the Light HSL Lightness state */
+    } light_hsl_lightness;      /*!< The Light HSL Lightness state */
+    struct {
+        uint16_t hue;           /*!< The value of the Light HSL Hue state */
+    } light_hsl_hue;            /*!< The Light HSL Hue state */
+    struct {
+        uint16_t saturation;    /*!< The value of the Light HSL Saturation state */
+    } light_hsl_saturation;     /*!< The Light HSL Saturation state */
+    struct {
+        uint16_t lightness;     /*!< The value of the Light xyL Lightness state */
+    } light_xyl_lightness;      /*!< The Light xyL Lightness state */
+    struct {
+        uint8_t onoff;          /*!< The value of the Light LC Light OnOff state */
+    } light_lc_light_onoff;     /*!< The Light LC Light OnOff state */
+} esp_ble_mesh_server_state_value_t;
+
+/** This enum value is the type of server model states */
+typedef enum {
+    ESP_BLE_MESH_GENERIC_ONOFF_STATE,
+    ESP_BLE_MESH_GENERIC_LEVEL_STATE,
+    ESP_BLE_MESH_GENERIC_ONPOWERUP_STATE,
+    ESP_BLE_MESH_GENERIC_POWER_ACTUAL_STATE,
+    ESP_BLE_MESH_LIGHT_LIGHTNESS_ACTUAL_STATE,
+    ESP_BLE_MESH_LIGHT_LIGHTNESS_LINEAR_STATE,
+    ESP_BLE_MESH_LIGHT_CTL_LIGHTNESS_STATE,
+    ESP_BLE_MESH_LIGHT_CTL_TEMP_DELTA_UV_STATE,
+    ESP_BLE_MESH_LIGHT_HSL_STATE,
+    ESP_BLE_MESH_LIGHT_HSL_LIGHTNESS_STATE,
+    ESP_BLE_MESH_LIGHT_HSL_HUE_STATE,
+    ESP_BLE_MESH_LIGHT_HSL_SATURATION_STATE,
+    ESP_BLE_MESH_LIGHT_XYL_LIGHTNESS_STATE,
+    ESP_BLE_MESH_LIGHT_LC_LIGHT_ONOFF_STATE,
+    ESP_BLE_MESH_SERVER_MODEL_STATE_MAX,
+} esp_ble_mesh_server_state_type_t;
+
+/*!< This enum value is the event of undefined SIG models and vendor models */
+typedef enum {
+    ESP_BLE_MESH_MODEL_OPERATION_EVT,                   /*!< User-defined models receive messages from peer devices (e.g. get, set, status, etc) event */
+    ESP_BLE_MESH_MODEL_SEND_COMP_EVT,                   /*!< User-defined models send messages completion event */
+    ESP_BLE_MESH_MODEL_PUBLISH_COMP_EVT,                /*!< User-defined models publish messages completion event */
+    ESP_BLE_MESH_CLIENT_MODEL_RECV_PUBLISH_MSG_EVT,     /*!< User-defined client models receive publish messages event */
+    ESP_BLE_MESH_CLIENT_MODEL_SEND_TIMEOUT_EVT,         /*!< Timeout event for the user-defined client models that failed to receive response from peer server models */
+    ESP_BLE_MESH_MODEL_PUBLISH_UPDATE_EVT,              /*!< When a model is configured to publish messages periodically, this event will occur during every publish period */
+    ESP_BLE_MESH_SERVER_MODEL_UPDATE_STATE_COMP_EVT,    /*!< Server models update state value completion event */
+    ESP_BLE_MESH_MODEL_EVT_MAX,
+} esp_ble_mesh_model_cb_event_t;
+
+/**
+ * @brief BLE Mesh model callback parameters union
+ */
+typedef union {
+    /**
+     * @brief ESP_BLE_MESH_MODEL_OPERATION_EVT
+     */
+    struct ble_mesh_model_operation_evt_param {
+        uint32_t opcode;                /*!< Opcode of the received message */
+        esp_ble_mesh_model_t *model;    /*!< Pointer to the model which receives the message */
+        esp_ble_mesh_msg_ctx_t *ctx;    /*!< Pointer to the context of the received message */
+        uint16_t length;                /*!< Length of the received message */
+        uint8_t *msg;                   /*!< Value of the received message */
+    } model_operation;                  /*!< Event parameter of ESP_BLE_MESH_MODEL_OPERATION_EVT */
+    /**
+     * @brief ESP_BLE_MESH_MODEL_SEND_COMP_EVT
+     */
+    struct ble_mesh_model_send_comp_param {
+        int err_code;                   /*!< Indicate the result of sending a message */
+        uint32_t opcode;                /*!< Opcode of the message */
+        esp_ble_mesh_model_t *model;    /*!< Pointer to the model which sends the message */
+        esp_ble_mesh_msg_ctx_t *ctx;    /*!< Context of the message */
+    } model_send_comp;                  /*!< Event parameter of ESP_BLE_MESH_MODEL_SEND_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_MODEL_PUBLISH_COMP_EVT
+     */
+    struct ble_mesh_model_publish_comp_param {
+        int err_code;                   /*!< Indicate the result of publishing a message */
+        esp_ble_mesh_model_t *model;    /*!< Pointer to the model which publishes the message */
+    } model_publish_comp;               /*!< Event parameter of ESP_BLE_MESH_MODEL_PUBLISH_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_CLIENT_MODEL_RECV_PUBLISH_MSG_EVT
+     */
+    struct ble_mesh_mod_recv_publish_msg_param {
+        uint32_t opcode;                /*!< Opcode of the unsolicited received message */
+        esp_ble_mesh_model_t *model;    /*!< Pointer to the model which receives the message */
+        esp_ble_mesh_msg_ctx_t *ctx;    /*!< Pointer to the context of the message */
+        uint16_t length;                /*!< Length of the received message */
+        uint8_t *msg;                   /*!< Value of the received message */
+    } client_recv_publish_msg;          /*!< Event parameter of ESP_BLE_MESH_CLIENT_MODEL_RECV_PUBLISH_MSG_EVT */
+    /**
+     * @brief ESP_BLE_MESH_CLIENT_MODEL_SEND_TIMEOUT_EVT
+     */
+    struct ble_mesh_client_model_send_timeout_param {
+        uint32_t opcode;                /*!< Opcode of the previously sent message */
+        esp_ble_mesh_model_t *model;    /*!< Pointer to the model which sends the previous message */
+        esp_ble_mesh_msg_ctx_t *ctx;    /*!< Pointer to the context of the previous message */
+    } client_send_timeout;              /*!< Event parameter of ESP_BLE_MESH_CLIENT_MODEL_SEND_TIMEOUT_EVT */
+    /**
+     * @brief ESP_BLE_MESH_MODEL_PUBLISH_UPDATE_EVT
+     */
+    struct ble_mesh_model_publish_update_evt_param {
+        esp_ble_mesh_model_t *model;    /*!< Pointer to the model which is going to update its publish message */
+    } model_publish_update;             /*!< Event parameter of ESP_BLE_MESH_MODEL_PUBLISH_UPDATE_EVT */
+    /**
+     * @brief ESP_BLE_MESH_SERVER_MODEL_UPDATE_STATE_COMP_EVT
+     */
+    struct ble_mesh_server_model_update_state_comp_param {
+        int err_code;                           /*!< Indicate the result of updating server model state */
+        esp_ble_mesh_model_t *model;            /*!< Pointer to the server model which state value is updated */
+        esp_ble_mesh_server_state_type_t type;  /*!< Type of the updated server state */
+    } server_model_update_state;                /*!< Event parameter of ESP_BLE_MESH_SERVER_MODEL_UPDATE_STATE_COMP_EVT */
+} esp_ble_mesh_model_cb_param_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_DEFS_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_config_model_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_config_model_api.h
new file mode 100644
index 00000000000..31369d89567
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_config_model_api.h
@@ -0,0 +1,817 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_BLE_MESH_CONFIG_MODEL_API_H_
+#define _ESP_BLE_MESH_CONFIG_MODEL_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @def    ESP_BLE_MESH_MODEL_CFG_SRV
+ *
+ *  @brief  Define a new Config Server Model.
+ *
+ *  @note   The Config Server Model can only be included by a Primary Element.
+ *
+ *  @param  srv_data Pointer to a unique Config Server Model user_data.
+ *
+ *  @return New Config Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_CFG_SRV(srv_data)                              \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_CONFIG_SRV,          \
+                  NULL, NULL, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_CFG_CLI
+ *
+ *  @brief  Define a new Config Client Model.
+ *
+ *  @note   The Config Client Model can only be included by a Primary Element.
+ *
+ *  @param  cli_data Pointer to a unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Config Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_CFG_CLI(cli_data)                              \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_CONFIG_CLI,          \
+                  NULL, NULL, cli_data)
+
+/** Configuration Server Model context */
+typedef struct esp_ble_mesh_cfg_srv {
+    esp_ble_mesh_model_t *model;    /*!< Pointer to Configuration Server Model */
+
+    uint8_t net_transmit;           /*!< Network Transmit state */
+    uint8_t relay;                  /*!< Relay Mode state */
+    uint8_t relay_retransmit;       /*!< Relay Retransmit state */
+    uint8_t beacon;                 /*!< Secure Network Beacon state */
+    uint8_t gatt_proxy;             /*!< GATT Proxy state */
+    uint8_t friend_state;           /*!< Friend state */
+    uint8_t default_ttl;            /*!< Default TTL */
+
+    /** Heartbeat Publication */
+    struct {
+        struct k_delayed_work timer;    /*!< Heartbeat Publication timer */
+
+        uint16_t dst;                   /*!< Destination address for Heartbeat messages */
+        uint16_t count;                 /*!< Number of Heartbeat messages to be sent */
+        uint8_t  period;                /*!< Period for sending Heartbeat messages */
+        uint8_t  ttl;                   /*!< TTL to be used when sending Heartbeat messages */
+        uint16_t feature;               /*!< Bit field indicating features that trigger Heartbeat messages when changed */
+        uint16_t net_idx;               /*!< NetKey Index used by Heartbeat Publication */
+    } heartbeat_pub;
+
+    /** Heartbeat Subscription */
+    struct {
+        int64_t  expiry;                /*!< Timestamp when Heartbeat subscription period is expired */
+
+        uint16_t src;                   /*!< Source address for Heartbeat messages */
+        uint16_t dst;                   /*!< Destination address for Heartbeat messages */
+        uint16_t count;                 /*!< Number of Heartbeat messages received */
+        uint8_t  min_hops;              /*!< Minimum hops when receiving Heartbeat messages */
+        uint8_t  max_hops;              /*!< Maximum hops when receiving Heartbeat messages */
+
+        /** Optional heartbeat subscription tracking function */
+        esp_ble_mesh_cb_t heartbeat_recv_cb;
+    } heartbeat_sub;
+} esp_ble_mesh_cfg_srv_t;
+
+/** Parameters of Config Composition Data Get. */
+typedef struct {
+    uint8_t page;                   /*!< Page number of the Composition Data. */
+} esp_ble_mesh_cfg_composition_data_get_t;
+
+/** Parameters of Config Model Publication Get. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_pub_get_t;
+
+/** Parameters of Config SIG Model Subscription Get. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t model_id;              /*!< The model id */
+} esp_ble_mesh_cfg_sig_model_sub_get_t;
+
+/** Parameters of Config Vendor Model Subscription Get. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_vnd_model_sub_get_t;
+
+/** Parameters of Config AppKey Get. */
+typedef struct {
+    uint16_t net_idx;               /*!< The network key index */
+} esp_ble_mesh_cfg_app_key_get_t;
+
+/** Parameters of Config Node Identity Get. */
+typedef struct {
+    uint16_t net_idx;               /*!< The network key index */
+} esp_ble_mesh_cfg_node_identity_get_t;
+
+/** Parameters of Config SIG Model App Get. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t model_id;              /*!< The model id */
+} esp_ble_mesh_cfg_sig_model_app_get_t;
+
+/** Parameters of Config Vendor Model App Get. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_vnd_model_app_get_t;
+
+/** Parameters of Config Key Refresh Phase Get. */
+typedef struct {
+    uint16_t net_idx;               /*!< The network key index */
+} esp_ble_mesh_cfg_kr_phase_get_t;
+
+/** Parameters of Config Low Power Node PollTimeout Get. */
+typedef struct {
+    uint16_t lpn_addr;              /*!< The unicast address of the Low Power node */
+} esp_ble_mesh_cfg_lpn_polltimeout_get_t;
+
+/** Parameters of Config Beacon Set. */
+typedef struct {
+    uint8_t beacon;                 /*!< New Secure Network Beacon state */
+} esp_ble_mesh_cfg_beacon_set_t;
+
+/** Parameters of Config Default TTL Set. */
+typedef struct {
+    uint8_t ttl;                    /*!< The default TTL state value */
+} esp_ble_mesh_cfg_default_ttl_set_t;
+
+/** Parameters of Config Friend Set. */
+typedef struct {
+    uint8_t friend_state;           /*!< The friend state value */
+} esp_ble_mesh_cfg_friend_set_t;
+
+/** Parameters of Config GATT Proxy Set. */
+typedef struct {
+    uint8_t gatt_proxy;             /*!< The GATT Proxy state value */
+} esp_ble_mesh_cfg_gatt_proxy_set_t;
+
+/** Parameters of Config Relay Set. */
+typedef struct {
+    uint8_t relay;                  /*!< The relay value */
+    uint8_t relay_retransmit;       /*!< The relay retransmit value */
+} esp_ble_mesh_cfg_relay_set_t;
+
+/** Parameters of Config NetKey Add. */
+typedef struct {
+    uint16_t net_idx;               /*!< The network key index */
+    uint8_t  net_key[16];           /*!< The network key value */
+} esp_ble_mesh_cfg_net_key_add_t;
+
+/** Parameters of Config AppKey Add. */
+typedef struct {
+    uint16_t net_idx;               /*!< The network key index */
+    uint16_t app_idx;               /*!< The app key index */
+    uint8_t  app_key[16];           /*!< The app key value */
+} esp_ble_mesh_cfg_app_key_add_t;
+
+/** Parameters of Config Model App Bind. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t model_app_idx;         /*!< Index of the app key to bind with the model */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_app_bind_t;
+
+/** Parameters of Config Model Publication Set. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t publish_addr;          /*!< Value of the publish address */
+    uint16_t publish_app_idx;       /*!< Index of the application key */
+    bool     cred_flag;             /*!< Value of the Friendship Credential Flag */
+    uint8_t  publish_ttl;           /*!< Default TTL value for the publishing messages */
+    uint8_t  publish_period;        /*!< Period for periodic status publishing */
+    uint8_t  publish_retransmit;    /*!< Number of retransmissions and number of 50-millisecond steps between retransmissions */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_pub_set_t;
+
+/** Parameters of Config Model Subscription Add. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t sub_addr;              /*!< The address to be added to the Subscription List */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_sub_add_t;
+
+/** Parameters of Config Model Subscription Delete. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t sub_addr;              /*!< The address to be removed from the Subscription List */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_sub_delete_t;
+
+/** Parameters of Config Model Subscription Overwrite. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t sub_addr;              /*!< The address to be added to the Subscription List */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_sub_overwrite_t;
+
+/** Parameters of Config Model Subscription Virtual Address Add. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint8_t  label_uuid[16];        /*!< The Label UUID of the virtual address to be added to the Subscription List */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_sub_va_add_t;
+
+/** Parameters of Config Model Subscription Virtual Address Delete. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint8_t  label_uuid[16];        /*!< The Label UUID of the virtual address to be removed from the Subscription List */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_sub_va_delete_t;
+
+/** Parameters of Config Model Subscription Virtual Address Overwrite. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint8_t  label_uuid[16];        /*!< The Label UUID of the virtual address to be added to the Subscription List */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_sub_va_overwrite_t;
+
+/** Parameters of Config Model Publication Virtual Address Set. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint8_t  label_uuid[16];        /*!< Value of the Label UUID publish address */
+    uint16_t publish_app_idx;       /*!< Index of the application key */
+    bool     cred_flag;             /*!< Value of the Friendship Credential Flag */
+    uint8_t  publish_ttl;           /*!< Default TTL value for the publishing messages */
+    uint8_t  publish_period;        /*!< Period for periodic status publishing */
+    uint8_t  publish_retransmit;    /*!< Number of retransmissions and number of 50-millisecond steps between retransmissions */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_pub_va_set_t;
+
+/** Parameters of Config Model Subscription Delete All. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_sub_delete_all_t;
+
+/** Parameters of Config NetKey Update. */
+typedef struct {
+    uint16_t net_idx;               /*!< The network key index */
+    uint8_t  net_key[16];           /*!< The network key value */
+} esp_ble_mesh_cfg_net_key_update_t;
+
+/** Parameters of Config NetKey Delete. */
+typedef struct {
+    uint16_t net_idx;               /*!< The network key index */
+} esp_ble_mesh_cfg_net_key_delete_t;
+
+/** Parameters of Config AppKey Update. */
+typedef struct {
+    uint16_t net_idx;               /*!< The network key index */
+    uint16_t app_idx;               /*!< The app key index */
+    uint8_t  app_key[16];           /*!< The app key value */
+} esp_ble_mesh_cfg_app_key_update_t;
+
+/** Parameters of Config AppKey Delete. */
+typedef struct {
+    uint16_t net_idx;               /*!< The network key index */
+    uint16_t app_idx;               /*!< The app key index */
+} esp_ble_mesh_cfg_app_key_delete_t;
+
+/** Parameters of Config Node Identity Set. */
+typedef struct {
+    uint16_t net_idx;               /*!< The network key index */
+    uint8_t  identity;              /*!< New Node Identity state */
+} esp_ble_mesh_cfg_node_identity_set_t;
+
+/** Parameters of Config Model App Unbind. */
+typedef struct {
+    uint16_t element_addr;          /*!< The element address */
+    uint16_t model_app_idx;         /*!< Index of the app key to bind with the model */
+    uint16_t model_id;              /*!< The model id */
+    uint16_t company_id;            /*!< The company id, if not a vendor model, shall set to 0xFFFF */
+} esp_ble_mesh_cfg_model_app_unbind_t;
+
+/** Parameters of Config Key Refresh Phase Set. */
+typedef struct {
+    uint16_t net_idx;               /*!< The network key index */
+    uint8_t  transition;            /*!< New Key Refresh Phase Transition */
+} esp_ble_mesh_cfg_kr_phase_set_t;
+
+/** Parameters of Config Network Transmit Set. */
+typedef struct {
+    uint8_t net_transmit;           /*!< Network Transmit State */
+} esp_ble_mesh_cfg_net_transmit_set_t;
+
+/** Parameters of Config Model Heartbeat Publication Set. */
+typedef struct  {
+    uint16_t dst;                   /*!< Destination address for Heartbeat messages */
+    uint8_t  count;                 /*!< Number of Heartbeat messages to be sent */
+    uint8_t  period;                /*!< Period for sending Heartbeat messages */
+    uint8_t  ttl;                   /*!< TTL to be used when sending Heartbeat messages */
+    uint16_t feature;               /*!< Bit field indicating features that trigger Heartbeat messages when changed */
+    uint16_t net_idx;               /*!< NetKey Index */
+} esp_ble_mesh_cfg_heartbeat_pub_set_t;
+
+/** Parameters of Config Model Heartbeat Subscription Set. */
+typedef struct {
+    uint16_t src;                   /*!< Source address for Heartbeat messages */
+    uint16_t dst;                   /*!< Destination address for Heartbeat messages */
+    uint8_t  period;                /*!< Period for receiving Heartbeat messages */
+} esp_ble_mesh_cfg_heartbeat_sub_set_t;
+
+/**
+ * @brief For ESP_BLE_MESH_MODEL_OP_BEACON_GET
+ *            ESP_BLE_MESH_MODEL_OP_COMPOSITION_DATA_GET
+ *            ESP_BLE_MESH_MODEL_OP_DEFAULT_TTL_GET
+ *            ESP_BLE_MESH_MODEL_OP_GATT_PROXY_GET
+ *            ESP_BLE_MESH_MODEL_OP_RELAY_GET
+ *            ESP_BLE_MESH_MODEL_OP_MODEL_PUB_GET
+ *            ESP_BLE_MESH_MODEL_OP_FRIEND_GET
+ *            ESP_BLE_MESH_MODEL_OP_HEARTBEAT_PUB_GET
+ *            ESP_BLE_MESH_MODEL_OP_HEARTBEAT_SUB_GET
+ * the get_state parameter in the esp_ble_mesh_config_client_get_state function should not be set to NULL.
+ */
+typedef union {
+    esp_ble_mesh_cfg_model_pub_get_t         model_pub_get;     /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_PUB_GET. */
+    esp_ble_mesh_cfg_composition_data_get_t  comp_data_get;     /*!< For ESP_BLE_MESH_MODEL_OP_COMPOSITION_DATA_GET. */
+    esp_ble_mesh_cfg_sig_model_sub_get_t     sig_model_sub_get; /*!< For ESP_BLE_MESH_MODEL_OP_SIG_MODEL_SUB_GET */
+    esp_ble_mesh_cfg_vnd_model_sub_get_t     vnd_model_sub_get; /*!< For ESP_BLE_MESH_MODEL_OP_VENDOR_MODEL_SUB_GET */
+    esp_ble_mesh_cfg_app_key_get_t           app_key_get;       /*!< For ESP_BLE_MESH_MODEL_OP_APP_KEY_GET. */
+    esp_ble_mesh_cfg_node_identity_get_t     node_identity_get; /*!< For ESP_BLE_MESH_MODEL_OP_NODE_IDENTITY_GET. */
+    esp_ble_mesh_cfg_sig_model_app_get_t     sig_model_app_get; /*!< For ESP_BLE_MESH_MODEL_OP_SIG_MODEL_APP_GET */
+    esp_ble_mesh_cfg_vnd_model_app_get_t     vnd_model_app_get; /*!< For ESP_BLE_MESH_MODEL_OP_VENDOR_MODEL_APP_GET */
+    esp_ble_mesh_cfg_kr_phase_get_t          kr_phase_get;      /*!< For ESP_BLE_MESH_MODEL_OP_KEY_REFRESH_PHASE_GET */
+    esp_ble_mesh_cfg_lpn_polltimeout_get_t   lpn_pollto_get;    /*!< For ESP_BLE_MESH_MODEL_OP_LPN_POLLTIMEOUT_GET */
+} esp_ble_mesh_cfg_client_get_state_t;
+
+/**
+ * @brief For ESP_BLE_MESH_MODEL_OP_BEACON_SET
+ *            ESP_BLE_MESH_MODEL_OP_DEFAULT_TTL_SET
+ *            ESP_BLE_MESH_MODEL_OP_GATT_PROXY_SET
+ *            ESP_BLE_MESH_MODEL_OP_RELAY_SET
+ *            ESP_BLE_MESH_MODEL_OP_MODEL_PUB_SET
+ *            ESP_BLE_MESH_MODEL_OP_MODEL_SUB_ADD
+ *            ESP_BLE_MESH_MODEL_OP_MODEL_SUB_VIRTUAL_ADDR_ADD
+ *            ESP_BLE_MESH_MODEL_OP_MODEL_SUB_DELETE
+ *            ESP_BLE_MESH_MODEL_OP_MODEL_SUB_VIRTUAL_ADDR_DELETE
+ *            ESP_BLE_MESH_MODEL_OP_MODEL_SUB_OVERWRITE
+ *            ESP_BLE_MESH_MODEL_OP_MODEL_SUB_VIRTUAL_ADDR_OVERWRITE
+ *            ESP_BLE_MESH_MODEL_OP_NET_KEY_ADD
+ *            ESP_BLE_MESH_MODEL_OP_APP_KEY_ADD
+ *            ESP_BLE_MESH_MODEL_OP_MODEL_APP_BIND
+ *            ESP_BLE_MESH_MODEL_OP_NODE_RESET
+ *            ESP_BLE_MESH_MODEL_OP_FRIEND_SET
+ *            ESP_BLE_MESH_MODEL_OP_HEARTBEAT_PUB_SET
+ *            ESP_BLE_MESH_MODEL_OP_HEARTBEAT_SUB_SET
+ * the set_state parameter in the esp_ble_mesh_config_client_set_state function should not be set to NULL.
+ */
+typedef union {
+    esp_ble_mesh_cfg_beacon_set_t             beacon_set;             /*!< For ESP_BLE_MESH_MODEL_OP_BEACON_SET */
+    esp_ble_mesh_cfg_default_ttl_set_t        default_ttl_set;        /*!< For ESP_BLE_MESH_MODEL_OP_DEFAULT_TTL_SET */
+    esp_ble_mesh_cfg_friend_set_t             friend_set;             /*!< For ESP_BLE_MESH_MODEL_OP_FRIEND_SET */
+    esp_ble_mesh_cfg_gatt_proxy_set_t         gatt_proxy_set;         /*!< For ESP_BLE_MESH_MODEL_OP_GATT_PROXY_SET */
+    esp_ble_mesh_cfg_relay_set_t              relay_set;              /*!< For ESP_BLE_MESH_MODEL_OP_RELAY_SET */
+    esp_ble_mesh_cfg_net_key_add_t            net_key_add;            /*!< For ESP_BLE_MESH_MODEL_OP_NET_KEY_ADD */
+    esp_ble_mesh_cfg_app_key_add_t            app_key_add;            /*!< For ESP_BLE_MESH_MODEL_OP_APP_KEY_ADD */
+    esp_ble_mesh_cfg_model_app_bind_t         model_app_bind;         /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_APP_BIND */
+    esp_ble_mesh_cfg_model_pub_set_t          model_pub_set;          /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_PUB_SET */
+    esp_ble_mesh_cfg_model_sub_add_t          model_sub_add;          /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_SUB_ADD */
+    esp_ble_mesh_cfg_model_sub_delete_t       model_sub_delete;       /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_SUB_DELETE */
+    esp_ble_mesh_cfg_model_sub_overwrite_t    model_sub_overwrite;    /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_SUB_OVERWRITE */
+    esp_ble_mesh_cfg_model_sub_va_add_t       model_sub_va_add;       /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_SUB_VIRTUAL_ADDR_ADD */
+    esp_ble_mesh_cfg_model_sub_va_delete_t    model_sub_va_delete;    /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_SUB_VIRTUAL_ADDR_DELETE */
+    esp_ble_mesh_cfg_model_sub_va_overwrite_t model_sub_va_overwrite; /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_SUB_VIRTUAL_ADDR_OVERWRITE */
+    esp_ble_mesh_cfg_heartbeat_pub_set_t      heartbeat_pub_set;      /*!< For ESP_BLE_MESH_MODEL_OP_HEARTBEAT_PUB_SET */
+    esp_ble_mesh_cfg_heartbeat_sub_set_t      heartbeat_sub_set;      /*!< For ESP_BLE_MESH_MODEL_OP_HEARTBEAT_SUB_SET */
+    esp_ble_mesh_cfg_model_pub_va_set_t       model_pub_va_set;       /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_PUB_VIRTUAL_ADDR_SET */
+    esp_ble_mesh_cfg_model_sub_delete_all_t   model_sub_delete_all;   /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_SUB_DELETE_ALL */
+    esp_ble_mesh_cfg_net_key_update_t         net_key_update;         /*!< For ESP_BLE_MESH_MODEL_OP_NET_KEY_UPDATE */
+    esp_ble_mesh_cfg_net_key_delete_t         net_key_delete;         /*!< For ESP_BLE_MESH_MODEL_OP_NET_KEY_DELETE */
+    esp_ble_mesh_cfg_app_key_update_t         app_key_update;         /*!< For ESP_BLE_MESH_MODEL_OP_APP_KEY_UPDATE */
+    esp_ble_mesh_cfg_app_key_delete_t         app_key_delete;         /*!< For ESP_BLE_MESH_MODEL_OP_APP_KEY_DELETE */
+    esp_ble_mesh_cfg_node_identity_set_t      node_identity_set;      /*!< For ESP_BLE_MESH_MODEL_OP_NODE_IDENTITY_SET */
+    esp_ble_mesh_cfg_model_app_unbind_t       model_app_unbind;       /*!< For ESP_BLE_MESH_MODEL_OP_MODEL_APP_UNBIND */
+    esp_ble_mesh_cfg_kr_phase_set_t           kr_phase_set;           /*!< For ESP_BLE_MESH_MODEL_OP_KEY_REFRESH_PHASE_SET */
+    esp_ble_mesh_cfg_net_transmit_set_t       net_transmit_set;       /*!< For ESP_BLE_MESH_MODEL_OP_NETWORK_TRANSMIT_SET */
+} esp_ble_mesh_cfg_client_set_state_t;
+
+/** Parameter of Config Beacon Status */
+typedef struct {
+    uint8_t beacon;                     /*!< Secure Network Beacon state value */
+} esp_ble_mesh_cfg_beacon_status_cb_t;
+
+/** Parameters of Config Composition Data Status */
+typedef struct {
+    uint8_t page;                              /*!< Page number of the Composition Data */
+    struct net_buf_simple *composition_data;   /*!< Pointer to Composition Data for the identified page */
+} esp_ble_mesh_cfg_comp_data_status_cb_t;
+
+/** Parameter of Config Default TTL Status */
+typedef struct {
+    uint8_t default_ttl;                /*!< Default TTL state value */
+} esp_ble_mesh_cfg_default_ttl_status_cb_t;
+
+/** Parameter of Config GATT Proxy Status */
+typedef struct {
+    uint8_t gatt_proxy;                 /*!< GATT Proxy state value */
+} esp_ble_mesh_cfg_gatt_proxy_status_cb_t;
+
+/** Parameters of Config Relay Status */
+typedef struct {
+    uint8_t relay;                      /*!< Relay state value */
+    uint8_t retransmit;                 /*!< Relay retransmit value(number of retransmissions and number of 10-millisecond steps between retransmissions) */
+} esp_ble_mesh_cfg_relay_status_cb_t;
+
+/** Parameters of Config Model Publication Status */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t element_addr;              /*!< Address of the element */
+    uint16_t publish_addr;              /*!< Value of the publish address */
+    uint16_t app_idx;                   /*!< Index of the application key */
+    bool     cred_flag;                 /*!< Value of the Friendship Credential Flag */
+    uint8_t  ttl;                       /*!< Default TTL value for the outgoing messages */
+    uint8_t  period;                    /*!< Period for periodic status publishing */
+    uint8_t  transmit;                  /*!< Number of retransmissions and number of 50-millisecond steps between retransmissions */
+    uint16_t company_id;                /*!< Company ID */
+    uint16_t model_id;                  /*!< Model ID */
+} esp_ble_mesh_cfg_model_pub_status_cb_t;
+
+/** Parameters of Config Model Subscription Status */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t element_addr;              /*!< Address of the element */
+    uint16_t sub_addr;                  /*!< Value of the address */
+    uint16_t company_id;                /*!< Company ID */
+    uint16_t model_id;                  /*!< Model ID */
+} esp_ble_mesh_cfg_model_sub_status_cb_t;
+
+/** Parameters of Config NetKey Status */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t net_idx;                   /*!< Index of the NetKey */
+} esp_ble_mesh_cfg_net_key_status_cb_t;
+
+/** Parameters of Config AppKey Status */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t net_idx;                   /*!< Index of the NetKey */
+    uint16_t app_idx;                   /*!< Index of the application key */
+} esp_ble_mesh_cfg_app_key_status_cb_t;
+
+/** Parameters of Config Model App Status */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t element_addr;              /*!< Address of the element */
+    uint16_t app_idx;                   /*!< Index of the application key */
+    uint16_t company_id;                /*!< Company ID */
+    uint16_t model_id;                  /*!< Model ID */
+} esp_ble_mesh_cfg_mod_app_status_cb_t;
+
+/** Parameter of Config Friend Status */
+typedef struct {
+    uint8_t friend_state;               /*!< Friend state value */
+} esp_ble_mesh_cfg_friend_status_cb_t;
+
+/** Parameters of Config Heartbeat Publication Status */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t dst;                       /*!< Destination address for Heartbeat messages */
+    uint8_t  count;                     /*!< Number of Heartbeat messages remaining to be sent */
+    uint8_t  period;                    /*!< Period for sending Heartbeat messages */
+    uint8_t  ttl;                       /*!< TTL to be used when sending Heartbeat messages */
+    uint16_t features;                  /*!< Features that trigger Heartbeat messages when changed */
+    uint16_t net_idx;                   /*!< Index of the NetKey */
+} esp_ble_mesh_cfg_hb_pub_status_cb_t;
+
+/** Parameters of Config Heartbeat Subscription Status */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t src;                       /*!< Source address for Heartbeat messages */
+    uint16_t dst;                       /*!< Destination address for Heartbeat messages */
+    uint8_t  period;                    /*!< Remaining Period for processing Heartbeat messages */
+    uint8_t  count;                     /*!< Number of Heartbeat messages received */
+    uint8_t  min_hops;                  /*!< Minimum hops when receiving Heartbeat messages */
+    uint8_t  max_hops;                  /*!< Maximum hops when receiving Heartbeat messages */
+} esp_ble_mesh_cfg_hb_sub_status_cb_t;
+
+/** Parameters of Config Network Transmit Status */
+typedef struct {
+    uint8_t net_trans_count: 3;         /*!< Number of transmissions for each Network PDU originating from the node */
+    uint8_t net_trans_step : 5;         /*!< Maximum hops when receiving Heartbeat messages */
+} esp_ble_mesh_cfg_net_trans_status_cb_t;
+
+/** Parameters of Config SIG/Vendor Subscription List */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t element_addr;              /*!< Address of the element */
+    uint16_t company_id;                /*!< Company ID */
+    uint16_t model_id;                  /*!< Model ID */
+    struct net_buf_simple *sub_addr;    /*!< A block of all addresses from the Subscription List */
+} esp_ble_mesh_cfg_model_sub_list_cb_t;
+
+/** Parameter of Config NetKey List */
+typedef struct {
+    struct net_buf_simple *net_idx;     /*!< A list of NetKey Indexes known to the node */
+} esp_ble_mesh_cfg_net_key_list_cb_t;
+
+/** Parameters of Config AppKey List */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t net_idx;                   /*!< NetKey Index of the NetKey that the AppKeys are bound to */
+    struct net_buf_simple *app_idx;     /*!< A list of AppKey indexes that are bound to the NetKey identified by NetKeyIndex */
+} esp_ble_mesh_cfg_app_key_list_cb_t;
+
+/** Parameters of Config Node Identity Status */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t net_idx;                   /*!< Index of the NetKey */
+    uint8_t  identity;                  /*!< Node Identity state */
+} esp_ble_mesh_cfg_node_id_status_cb_t;
+
+/** Parameters of Config SIG/Vendor Model App List */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t element_addr;              /*!< Address of the element */
+    uint16_t company_id;                /*!< Company ID */
+    uint16_t model_id;                  /*!< Model ID */
+    struct net_buf_simple *app_idx;     /*!< All AppKey indexes bound to the Model */
+} esp_ble_mesh_cfg_model_app_list_cb_t;
+
+/** Parameters of Config Key Refresh Phase Status */
+typedef struct {
+    uint8_t  status;                    /*!< Status Code for the request message */
+    uint16_t net_idx;                   /*!< Index of the NetKey */
+    uint8_t  phase;                     /*!< Key Refresh Phase state */
+} esp_ble_mesh_cfg_kr_phase_status_cb_t;
+
+/** Parameters of Config Low Power Node PollTimeout Status */
+typedef struct {
+    uint16_t lpn_addr;                  /*!< The unicast address of the Low Power node */
+    int32_t  poll_timeout;              /*!< The current value of the PollTimeout timer of the Low Power node */
+} esp_ble_mesh_cfg_lpn_pollto_status_cb_t;
+
+/**
+ * @brief Configuration Client Model received message union
+ */
+typedef union {
+    esp_ble_mesh_cfg_beacon_status_cb_t      beacon_status;         /*!< The beacon status value */
+    esp_ble_mesh_cfg_comp_data_status_cb_t   comp_data_status;      /*!< The composition data status value */
+    esp_ble_mesh_cfg_default_ttl_status_cb_t default_ttl_status;    /*!< The default_ttl status value */
+    esp_ble_mesh_cfg_gatt_proxy_status_cb_t  gatt_proxy_status;     /*!< The gatt_proxy status value */
+    esp_ble_mesh_cfg_relay_status_cb_t       relay_status;          /*!< The relay status value */
+    esp_ble_mesh_cfg_model_pub_status_cb_t   model_pub_status;      /*!< The model publication status value */
+    esp_ble_mesh_cfg_model_sub_status_cb_t   model_sub_status;      /*!< The model subscription status value */
+    esp_ble_mesh_cfg_net_key_status_cb_t     netkey_status;         /*!< The netkey status value */
+    esp_ble_mesh_cfg_app_key_status_cb_t     appkey_status;         /*!< The appkey status value */
+    esp_ble_mesh_cfg_mod_app_status_cb_t     model_app_status;      /*!< The model app status value */
+    esp_ble_mesh_cfg_friend_status_cb_t      friend_status;         /*!< The friend status value */
+    esp_ble_mesh_cfg_hb_pub_status_cb_t      heartbeat_pub_status;  /*!< The heartbeat publication status value */
+    esp_ble_mesh_cfg_hb_sub_status_cb_t      heartbeat_sub_status;  /*!< The heartbeat subscription status value */
+    esp_ble_mesh_cfg_net_trans_status_cb_t   net_transmit_status;   /*!< The network transmit status value */
+    esp_ble_mesh_cfg_model_sub_list_cb_t     model_sub_list;        /*!< The model subscription list value */
+    esp_ble_mesh_cfg_net_key_list_cb_t       netkey_list;           /*!< The network key index list value */
+    esp_ble_mesh_cfg_app_key_list_cb_t       appkey_list;           /*!< The application key index list value */
+    esp_ble_mesh_cfg_node_id_status_cb_t     node_identity_status;  /*!< The node identity status value */
+    esp_ble_mesh_cfg_model_app_list_cb_t     model_app_list;        /*!< The model application key index list value */
+    esp_ble_mesh_cfg_kr_phase_status_cb_t    kr_phase_status;       /*!< The key refresh phase status value */
+    esp_ble_mesh_cfg_lpn_pollto_status_cb_t  lpn_timeout_status;    /*!< The low power node poll timeout status value */
+} esp_ble_mesh_cfg_client_common_cb_param_t;
+
+/** Configuration Client Model callback parameters */
+typedef struct {
+    int error_code;                                         /*!< Appropriate error code */
+    esp_ble_mesh_client_common_param_t       *params;       /*!< The client common parameters */
+    esp_ble_mesh_cfg_client_common_cb_param_t status_cb;    /*!< The config status message callback values */
+} esp_ble_mesh_cfg_client_cb_param_t;
+
+/** This enum value is the event of Configuration Client Model */
+typedef enum {
+    ESP_BLE_MESH_CFG_CLIENT_GET_STATE_EVT,
+    ESP_BLE_MESH_CFG_CLIENT_SET_STATE_EVT,
+    ESP_BLE_MESH_CFG_CLIENT_PUBLISH_EVT,
+    ESP_BLE_MESH_CFG_CLIENT_TIMEOUT_EVT,
+    ESP_BLE_MESH_CFG_CLIENT_EVT_MAX,
+} esp_ble_mesh_cfg_client_cb_event_t;
+
+/**
+ * @brief Configuration Server model related context.
+ */
+
+typedef struct {
+    uint16_t element_addr;      /*!< Element Address */
+    uint16_t pub_addr;          /*!< Publish Address */
+    uint16_t app_idx;           /*!< AppKey Index */
+    bool     cred_flag;         /*!< Friendship Credential Flag */
+    uint8_t  pub_ttl;           /*!< Publish TTL */
+    uint8_t  pub_period;        /*!< Publish Period */
+    uint8_t  pub_retransmit;    /*!< Publish Retransmit */
+    uint16_t company_id;        /*!< Company ID */
+    uint16_t model_id;          /*!< Model ID */
+} esp_ble_mesh_state_change_cfg_mod_pub_set_t;
+
+/** Parameters of Config Model Subscription Add */
+typedef struct {
+    uint16_t element_addr;      /*!< Element Address */
+    uint16_t sub_addr;          /*!< Subscription Address */
+    uint16_t company_id;        /*!< Company ID */
+    uint16_t model_id;          /*!< Model ID */
+} esp_ble_mesh_state_change_cfg_model_sub_add_t;
+
+/** Parameters of Config Model Subscription Delete */
+typedef struct {
+    uint16_t element_addr;      /*!< Element Address */
+    uint16_t sub_addr;          /*!< Subscription Address */
+    uint16_t company_id;        /*!< Company ID */
+    uint16_t model_id;          /*!< Model ID */
+} esp_ble_mesh_state_change_cfg_model_sub_delete_t;
+
+/** Parameters of Config NetKey Add */
+typedef struct {
+    uint16_t net_idx;           /*!< NetKey Index */
+    uint8_t  net_key[16];       /*!< NetKey */
+} esp_ble_mesh_state_change_cfg_netkey_add_t;
+
+/** Parameters of Config NetKey Update */
+typedef struct {
+    uint16_t net_idx;           /*!< NetKey Index */
+    uint8_t  net_key[16];       /*!< NetKey */
+} esp_ble_mesh_state_change_cfg_netkey_update_t;
+
+/** Parameter of Config NetKey Delete */
+typedef struct {
+    uint16_t net_idx;           /*!< NetKey Index */
+} esp_ble_mesh_state_change_cfg_netkey_delete_t;
+
+/** Parameters of Config AppKey Add */
+typedef struct {
+    uint16_t net_idx;           /*!< NetKey Index */
+    uint16_t app_idx;           /*!< AppKey Index */
+    uint8_t  app_key[16];       /*!< AppKey */
+} esp_ble_mesh_state_change_cfg_appkey_add_t;
+
+/** Parameters of Config AppKey Update */
+typedef struct {
+    uint16_t net_idx;           /*!< NetKey Index */
+    uint16_t app_idx;           /*!< AppKey Index */
+    uint8_t  app_key[16];       /*!< AppKey */
+} esp_ble_mesh_state_change_cfg_appkey_update_t;
+
+/** Parameters of Config AppKey Delete */
+typedef struct {
+    uint16_t net_idx;           /*!< NetKey Index */
+    uint16_t app_idx;           /*!< AppKey Index */
+} esp_ble_mesh_state_change_cfg_appkey_delete_t;
+
+/** Parameters of Config Model App Bind */
+typedef struct {
+    uint16_t element_addr;      /*!< Element Address */
+    uint16_t app_idx;           /*!< AppKey Index */
+    uint16_t company_id;        /*!< Company ID */
+    uint16_t model_id;          /*!< Model ID */
+} esp_ble_mesh_state_change_cfg_model_app_bind_t;
+
+/** Parameters of Config Model App Unbind */
+typedef struct {
+    uint16_t element_addr;      /*!< Element Address */
+    uint16_t app_idx;           /*!< AppKey Index */
+    uint16_t company_id;        /*!< Company ID */
+    uint16_t model_id;          /*!< Model ID */
+} esp_ble_mesh_state_change_cfg_model_app_unbind_t;
+
+/** Parameters of Config Key Refresh Phase Set */
+typedef struct {
+    uint16_t net_idx;           /*!< NetKey Index */
+    uint8_t  kr_phase;          /*!< New Key Refresh Phase Transition */
+} esp_ble_mesh_state_change_cfg_kr_phase_set_t;
+
+/**
+ * @brief Configuration Server model state change value union
+ */
+typedef union {
+    /**
+     * The recv_op in ctx can be used to decide which state is changed.
+     */
+    esp_ble_mesh_state_change_cfg_mod_pub_set_t         mod_pub_set;        /*!< Config Model Publication Set */
+    esp_ble_mesh_state_change_cfg_model_sub_add_t       mod_sub_add;        /*!< Config Model Subscription Add */
+    esp_ble_mesh_state_change_cfg_model_sub_delete_t    mod_sub_delete;     /*!< Config Model Subscription Delete */
+    esp_ble_mesh_state_change_cfg_netkey_add_t          netkey_add;         /*!< Config NetKey Add */
+    esp_ble_mesh_state_change_cfg_netkey_update_t       netkey_update;      /*!< Config NetKey Update */
+    esp_ble_mesh_state_change_cfg_netkey_delete_t       netkey_delete;      /*!< Config NetKey Delete */
+    esp_ble_mesh_state_change_cfg_appkey_add_t          appkey_add;         /*!< Config AppKey Add */
+    esp_ble_mesh_state_change_cfg_appkey_update_t       appkey_update;      /*!< Config AppKey Update */
+    esp_ble_mesh_state_change_cfg_appkey_delete_t       appkey_delete;      /*!< Config AppKey Delete */
+    esp_ble_mesh_state_change_cfg_model_app_bind_t      mod_app_bind;       /*!< Config Model App Bind */
+    esp_ble_mesh_state_change_cfg_model_app_unbind_t    mod_app_unbind;     /*!< Config Model App Unbind */
+    esp_ble_mesh_state_change_cfg_kr_phase_set_t        kr_phase_set;       /*!< Config Key Refresh Phase Set */
+} esp_ble_mesh_cfg_server_state_change_t;
+
+/**
+ * @brief Configuration Server model callback value union
+ */
+typedef union {
+    esp_ble_mesh_cfg_server_state_change_t state_change;  /*!< ESP_BLE_MESH_CFG_SERVER_STATE_CHANGE_EVT */
+} esp_ble_mesh_cfg_server_cb_value_t;
+
+/** Configuration Server model callback parameters */
+typedef struct {
+    esp_ble_mesh_model_t  *model;   /*!< Pointer to the server model structure */
+    esp_ble_mesh_msg_ctx_t ctx;     /*!< Context of the received message */
+    esp_ble_mesh_cfg_server_cb_value_t value;   /*!< Value of the received configuration messages */
+} esp_ble_mesh_cfg_server_cb_param_t;
+
+/** This enum value is the event of Configuration Server model */
+typedef enum {
+    ESP_BLE_MESH_CFG_SERVER_STATE_CHANGE_EVT,
+    ESP_BLE_MESH_CFG_SERVER_EVT_MAX,
+} esp_ble_mesh_cfg_server_cb_event_t;
+
+/**
+ *  @brief Bluetooth Mesh Config Client and Server Model functions.
+ */
+
+/**
+ * @brief   Configuration Client Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_cfg_client_cb_t)(esp_ble_mesh_cfg_client_cb_event_t event,
+                                              esp_ble_mesh_cfg_client_cb_param_t *param);
+
+/**
+ * @brief   Configuration Server Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_cfg_server_cb_t)(esp_ble_mesh_cfg_server_cb_event_t event,
+                                              esp_ble_mesh_cfg_server_cb_param_t *param);
+
+/**
+ * @brief         Register BLE Mesh Config Client Model callback.
+ *
+ * @param[in]     callback: Pointer to the callback function.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_config_client_callback(esp_ble_mesh_cfg_client_cb_t callback);
+
+/**
+ * @brief         Register BLE Mesh Config Server Model callback.
+ *
+ * @param[in]     callback: Pointer to the callback function.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_config_server_callback(esp_ble_mesh_cfg_server_cb_t callback);
+
+/**
+ * @brief         Get the value of Config Server Model states using the Config Client Model get messages.
+ *
+ * @note          If you want to find the opcodes and corresponding meanings accepted by this API,
+ *                please refer to esp_ble_mesh_opcode_config_client_get_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]     params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]     get_state: Pointer to a union, each kind of opcode corresponds to one structure inside.
+ *                           Shall not be set to NULL.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_config_client_get_state(esp_ble_mesh_client_common_param_t *params,
+                                               esp_ble_mesh_cfg_client_get_state_t *get_state);
+
+/**
+ * @brief         Set the value of the Configuration Server Model states using the Config Client Model set messages.
+ *
+ * @note          If you want to find the opcodes and corresponding meanings accepted by this API,
+ *                please refer to esp_ble_mesh_opcode_config_client_set_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]     params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]     set_state: Pointer to a union, each kind of opcode corresponds to one structure inside.
+ *                           Shall not be set to NULL.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_config_client_set_state(esp_ble_mesh_client_common_param_t *params,
+                                               esp_ble_mesh_cfg_client_set_state_t *set_state);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_CONFIG_MODEL_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_generic_model_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_generic_model_api.h
new file mode 100644
index 00000000000..fc4808af411
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_generic_model_api.h
@@ -0,0 +1,1296 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/** @file
+ *  @brief Bluetooth Mesh Generic Client Model APIs.
+ */
+
+#ifndef _ESP_BLE_MESH_GENERIC_MODEL_API_H_
+#define _ESP_BLE_MESH_GENERIC_MODEL_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_ONOFF_CLI
+ *
+ *  @brief  Define a new Generic OnOff Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Generic OnOff Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Generic OnOff Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_ONOFF_CLI(cli_pub, cli_data)         \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_ONOFF_CLI, \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_LEVEL_CLI
+ *
+ *  @brief  Define a new Generic Level Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Generic Level Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Generic Level Client Model instance.
+ */
+
+#define ESP_BLE_MESH_MODEL_GEN_LEVEL_CLI(cli_pub, cli_data)         \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_LEVEL_CLI, \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_DEF_TRANS_TIME_CLI
+ *
+ *  @brief  Define a new Generic Default Transition Time Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Generic Default Transition
+ *          Time Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Generic Default Transition Time Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_DEF_TRANS_TIME_CLI(cli_pub, cli_data)            \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_DEF_TRANS_TIME_CLI,    \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_POWER_ONOFF_CLI
+ *
+ *  @brief  Define a new Generic Power OnOff Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Generic Power OnOff Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Generic Power OnOff Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_POWER_ONOFF_CLI(cli_pub, cli_data)           \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_POWER_ONOFF_CLI,   \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_POWER_LEVEL_CLI
+ *
+ *  @brief  Define a new Generic Power Level Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Generic Power Level Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Generic Power Level Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_POWER_LEVEL_CLI(cli_pub, cli_data)           \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_POWER_LEVEL_CLI,   \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_BATTERY_CLI
+ *
+ *  @brief  Define a new Generic Battery Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Generic Battery Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Generic Battery Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_BATTERY_CLI(cli_pub, cli_data)           \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_BATTERY_CLI,   \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_LOCATION_CLI
+ *
+ *  @brief  Define a new Generic Location Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Generic Location Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Generic Location Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_LOCATION_CLI(cli_pub, cli_data)          \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_LOCATION_CLI,  \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_PROPERTY_CLI
+ *
+ *  @brief  Define a new Generic Property Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Generic Property Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Generic Location Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_PROPERTY_CLI(cli_pub, cli_data)          \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_PROP_CLI,      \
+                    NULL, cli_pub, cli_data)
+
+/**
+ *  @brief Bluetooth Mesh Generic Client Model Get and Set parameters structure.
+ */
+
+/** Parameters of Generic OnOff Set. */
+typedef struct {
+    bool    op_en;      /*!< Indicate if optional parameters are included */
+    uint8_t onoff;      /*!< Target value of Generic OnOff state */
+    uint8_t tid;        /*!< Transaction ID */
+    uint8_t trans_time; /*!< Time to complete state transition (optional) */
+    uint8_t delay;      /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_gen_onoff_set_t;
+
+/** Parameters of Generic Level Set. */
+typedef struct {
+    bool    op_en;      /*!< Indicate if optional parameters are included */
+    int16_t level;      /*!< Target value of Generic Level state */
+    uint8_t tid;        /*!< Transaction ID */
+    uint8_t trans_time; /*!< Time to complete state transition (optional) */
+    uint8_t delay;      /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_gen_level_set_t;
+
+/** Parameters of Generic Delta Set. */
+typedef struct {
+    bool    op_en;      /*!< Indicate if optional parameters are included */
+    int32_t level;      /*!< Delta change of Generic Level state */
+    uint8_t tid;        /*!< Transaction ID */
+    uint8_t trans_time; /*!< Time to complete state transition (optional) */
+    uint8_t delay;      /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_gen_delta_set_t;
+
+/** Parameters of Generic Move Set. */
+typedef struct {
+    bool    op_en;          /*!< Indicate if optional parameters are included */
+    int16_t delta_level;    /*!< Delta Level step to calculate Move speed for Generic Level state */
+    uint8_t tid;            /*!< Transaction ID */
+    uint8_t trans_time;     /*!< Time to complete state transition (optional) */
+    uint8_t delay;          /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_gen_move_set_t;
+
+/** Parameter of Generic Default Transition Time Set. */
+typedef struct {
+    uint8_t trans_time; /*!< The value of the Generic Default Transition Time state */
+} esp_ble_mesh_gen_def_trans_time_set_t;
+
+/** Parameter of Generic OnPowerUp Set. */
+typedef struct {
+    uint8_t onpowerup;  /*!< The value of the Generic OnPowerUp state */
+} esp_ble_mesh_gen_onpowerup_set_t;
+
+/** Parameters of Generic Power Level Set. */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t power;         /*!< Target value of Generic Power Actual state */
+    uint8_t  tid;           /*!< Transaction ID */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_gen_power_level_set_t;
+
+/** Parameter of Generic Power Default Set. */
+typedef struct {
+    uint16_t power;         /*!< The value of the Generic Power Default state */
+} esp_ble_mesh_gen_power_default_set_t;
+
+/** Parameters of Generic Power Range Set. */
+typedef struct {
+    uint16_t range_min;     /*!< Value of Range Min field of Generic Power Range state */
+    uint16_t range_max;     /*!< Value of Range Max field of Generic Power Range state */
+} esp_ble_mesh_gen_power_range_set_t;
+
+/** Parameters of Generic Location Global Set. */
+typedef struct {
+    int32_t global_latitude;    /*!< Global Coordinates (Latitude) */
+    int32_t global_longitude;   /*!< Global Coordinates (Longitude) */
+    int16_t global_altitude;    /*!< Global Altitude */
+} esp_ble_mesh_gen_loc_global_set_t;
+
+/** Parameters of Generic Location Local Set. */
+typedef struct {
+    int16_t  local_north;       /*!< Local Coordinates (North) */
+    int16_t  local_east;        /*!< Local Coordinates (East) */
+    int16_t  local_altitude;    /*!< Local Altitude */
+    uint8_t  floor_number;      /*!< Floor Number */
+    uint16_t uncertainty;       /*!< Uncertainty */
+} esp_ble_mesh_gen_loc_local_set_t;
+
+/** Parameter of Generic User Property Get. */
+typedef struct {
+    uint16_t property_id;       /*!< Property ID identifying a Generic User Property */
+} esp_ble_mesh_gen_user_property_get_t;
+
+/** Parameters of Generic User Property Set. */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Generic User Property */
+    struct net_buf_simple *property_value;  /*!< Raw value for the User Property */
+} esp_ble_mesh_gen_user_property_set_t;
+
+/** Parameter of Generic Admin Property Get. */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Generic Admin Property */
+} esp_ble_mesh_gen_admin_property_get_t;
+
+/** Parameters of Generic Admin Property Set. */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Generic Admin Property */
+    uint8_t  user_access;   /*!< Enumeration indicating user access */
+    struct net_buf_simple *property_value;  /*!< Raw value for the Admin Property */
+} esp_ble_mesh_gen_admin_property_set_t;
+
+/** Parameter of Generic Manufacturer Property Get. */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Generic Manufacturer Property */
+} esp_ble_mesh_gen_manufacturer_property_get_t;
+
+/** Parameters of Generic Manufacturer Property Set. */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Generic Manufacturer Property */
+    uint8_t  user_access;   /*!< Enumeration indicating user access */
+} esp_ble_mesh_gen_manufacturer_property_set_t;
+
+/** Parameter of Generic Client Properties Get. */
+typedef struct {
+    uint16_t property_id;   /*!< A starting Client Property ID present within an element */
+} esp_ble_mesh_gen_client_properties_get_t;
+
+/**
+ * @brief Generic Client Model get message union
+ */
+typedef union {
+    esp_ble_mesh_gen_user_property_get_t         user_property_get;         /*!< For ESP_BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_GET */
+    esp_ble_mesh_gen_admin_property_get_t        admin_property_get;        /*!< For ESP_BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_GET*/
+    esp_ble_mesh_gen_manufacturer_property_get_t manufacturer_property_get; /*!< For ESP_BLE_MESH_MODEL_OP_GEN_MANUFACTURER_PROPERTY_SET */
+    esp_ble_mesh_gen_client_properties_get_t     client_properties_get;     /*!< For ESP_BLE_MESH_MODEL_OP_GEN_CLIENT_PROPERTIES_GET */
+} esp_ble_mesh_generic_client_get_state_t;
+
+/**
+ * @brief Generic Client Model set message union
+ */
+typedef union {
+    esp_ble_mesh_gen_onoff_set_t          onoff_set;            /*!< For ESP_BLE_MESH_MODEL_OP_GEN_ONOFF_SET & ESP_BLE_MESH_MODEL_OP_GEN_ONOFF_SET_UNACK */
+    esp_ble_mesh_gen_level_set_t          level_set;            /*!< For ESP_BLE_MESH_MODEL_OP_GEN_LEVEL_SET & ESP_BLE_MESH_MODEL_OP_GEN_LEVEL_SET_UNACK */
+    esp_ble_mesh_gen_delta_set_t          delta_set;            /*!< For ESP_BLE_MESH_MODEL_OP_GEN_DELTA_SET & ESP_BLE_MESH_MODEL_OP_GEN_DELTA_SET_UNACK */
+    esp_ble_mesh_gen_move_set_t           move_set;             /*!< For ESP_BLE_MESH_MODEL_OP_GEN_MOVE_SET & ESP_BLE_MESH_MODEL_OP_GEN_MOVE_SET_UNACK */
+    esp_ble_mesh_gen_def_trans_time_set_t def_trans_time_set;   /*!< For ESP_BLE_MESH_MODEL_OP_GEN_DEF_TRANS_TIME_SET & ESP_BLE_MESH_MODEL_OP_GEN_DEF_TRANS_TIME_SET_UNACK */
+    esp_ble_mesh_gen_onpowerup_set_t      power_set;            /*!< For ESP_BLE_MESH_MODEL_OP_GEN_ONPOWERUP_SET & ESP_BLE_MESH_MODEL_OP_GEN_ONPOWERUP_SET_UNACK */
+    esp_ble_mesh_gen_power_level_set_t    power_level_set;      /*!< For ESP_BLE_MESH_MODEL_OP_GEN_POWER_LEVEL_SET & ESP_BLE_MESH_MODEL_OP_GEN_POWER_LEVEL_SET_UNACK */
+    esp_ble_mesh_gen_power_default_set_t  power_default_set;    /*!< For ESP_BLE_MESH_MODEL_OP_GEN_POWER_DEFAULT_SET & ESP_BLE_MESH_MODEL_OP_GEN_POWER_DEFAULT_SET_UNACK */
+    esp_ble_mesh_gen_power_range_set_t    power_range_set;      /*!< For ESP_BLE_MESH_MODEL_OP_GEN_POWER_RANGE_SET & ESP_BLE_MESH_MODEL_OP_GEN_POWER_RANGE_SET_UNACK */
+    esp_ble_mesh_gen_loc_global_set_t     loc_global_set;       /*!< For ESP_BLE_MESH_MODEL_OP_GEN_LOC_GLOBAL_SET & ESP_BLE_MESH_MODEL_OP_GEN_LOC_GLOBAL_SET_UNACK */
+    esp_ble_mesh_gen_loc_local_set_t      loc_local_set;        /*!< For ESP_BLE_MESH_MODEL_OP_GEN_LOC_LOCAL_SET & ESP_BLE_MESH_MODEL_OP_GEN_LOC_LOCAL_SET_UNACK */
+    esp_ble_mesh_gen_user_property_set_t  user_property_set;    /*!< For ESP_BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_SET & ESP_BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_SET_UNACK */
+    esp_ble_mesh_gen_admin_property_set_t admin_property_set;   /*!< For ESP_BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_SET & ESP_BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_SET_UNACK */
+    esp_ble_mesh_gen_manufacturer_property_set_t manufacturer_property_set; /*!< For ESP_BLE_MESH_MODEL_OP_GEN_MANUFACTURER_PROPERTY_SET & ESP_BLE_MESH_MODEL_OP_GEN_MANUFACTURER_PROPERTY_SET_UNACK */
+} esp_ble_mesh_generic_client_set_state_t;
+
+/**
+ *  @brief Bluetooth Mesh Generic Client Model Get and Set callback parameters structure.
+ */
+
+/** Parameters of Generic OnOff Status. */
+typedef struct {
+    bool    op_en;          /*!< Indicate if optional parameters are included */
+    uint8_t present_onoff;  /*!< Current value of Generic OnOff state */
+    uint8_t target_onoff;   /*!< Target value of Generic OnOff state (optional) */
+    uint8_t remain_time;    /*!< Time to complete state transition (C.1) */
+} esp_ble_mesh_gen_onoff_status_cb_t;
+
+/** Parameters of Generic Level Status. */
+typedef struct {
+    bool    op_en;          /*!< Indicate if optional parameters are included */
+    int16_t present_level;  /*!< Current value of Generic Level state */
+    int16_t target_level;   /*!< Target value of the Generic Level state (optional) */
+    uint8_t remain_time;    /*!< Time to complete state transition (C.1) */
+} esp_ble_mesh_gen_level_status_cb_t;
+
+/** Parameter of Generic Default Transition Time Status. */
+typedef struct {
+    uint8_t trans_time;     /*!< The value of the Generic Default Transition Time state */
+} esp_ble_mesh_gen_def_trans_time_status_cb_t;
+
+/** Parameter of Generic OnPowerUp Status. */
+typedef struct {
+    uint8_t onpowerup;      /*!< The value of the Generic OnPowerUp state */
+} esp_ble_mesh_gen_onpowerup_status_cb_t;
+
+/** Parameters of Generic Power Level Status. */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t present_power; /*!< Current value of Generic Power Actual state */
+    uint16_t target_power;  /*!< Target value of Generic Power Actual state (optional) */
+    uint8_t  remain_time;   /*!< Time to complete state transition (C.1) */
+} esp_ble_mesh_gen_power_level_status_cb_t;
+
+/** Parameter of Generic Power Last Status. */
+typedef struct {
+    uint16_t power;         /*!< The value of the Generic Power Last state */
+} esp_ble_mesh_gen_power_last_status_cb_t;
+
+/** Parameter of Generic Power Default Status. */
+typedef struct {
+    uint16_t power;         /*!< The value of the Generic Default Last state */
+} esp_ble_mesh_gen_power_default_status_cb_t;
+
+/** Parameters of Generic Power Range Status. */
+typedef struct {
+    uint8_t  status_code;   /*!< Status Code for the request message */
+    uint16_t range_min;     /*!< Value of Range Min field of Generic Power Range state */
+    uint16_t range_max;     /*!< Value of Range Max field of Generic Power Range state */
+} esp_ble_mesh_gen_power_range_status_cb_t;
+
+/** Parameters of Generic Battery Status. */
+typedef struct {
+    uint32_t battery_level     : 8;  /*!< Value of Generic Battery Level state */
+    uint32_t time_to_discharge : 24; /*!< Value of Generic Battery Time to Discharge state */
+    uint32_t time_to_charge    : 24; /*!< Value of Generic Battery Time to Charge state */
+    uint32_t flags             : 8;  /*!< Value of Generic Battery Flags state */
+} esp_ble_mesh_gen_battery_status_cb_t;
+
+/** Parameters of Generic Location Global Status. */
+typedef struct {
+    int32_t global_latitude;  /*!< Global Coordinates (Latitude) */
+    int32_t global_longitude; /*!< Global Coordinates (Longitude) */
+    int16_t global_altitude;  /*!< Global Altitude */
+} esp_ble_mesh_gen_loc_global_status_cb_t;
+
+/** Parameters of Generic Location Local Status. */
+typedef struct {
+    int16_t  local_north;     /*!< Local Coordinates (North) */
+    int16_t  local_east;      /*!< Local Coordinates (East) */
+    int16_t  local_altitude;  /*!< Local Altitude */
+    uint8_t  floor_number;    /*!< Floor Number */
+    uint16_t uncertainty;     /*!< Uncertainty */
+} esp_ble_mesh_gen_loc_local_status_cb_t;
+
+/** Parameter of Generic User Properties Status. */
+typedef struct {
+    struct net_buf_simple *property_ids;    /*!< Buffer contains a sequence of N User Property IDs */
+} esp_ble_mesh_gen_user_properties_status_cb_t;
+
+/** Parameters of Generic User Property Status. */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t property_id;   /*!< Property ID identifying a Generic User Property */
+    uint8_t  user_access;   /*!< Enumeration indicating user access (optional) */
+    struct net_buf_simple *property_value;  /*!< Raw value for the User Property (C.1) */
+} esp_ble_mesh_gen_user_property_status_cb_t;
+
+/** Parameter of Generic Admin Properties Status. */
+typedef struct {
+    struct net_buf_simple *property_ids; /*!< Buffer contains a sequence of N Admin Property IDs */
+} esp_ble_mesh_gen_admin_properties_status_cb_t;
+
+/** Parameters of Generic Admin Property Status. */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t property_id;   /*!< Property ID identifying a Generic Admin Property */
+    uint8_t  user_access;   /*!< Enumeration indicating user access (optional) */
+    struct net_buf_simple *property_value;  /*!< Raw value for the Admin Property (C.1) */
+} esp_ble_mesh_gen_admin_property_status_cb_t;
+
+/** Parameter of Generic Manufacturer Properties Status. */
+typedef struct {
+    struct net_buf_simple *property_ids;    /*!< Buffer contains a sequence of N Manufacturer Property IDs */
+} esp_ble_mesh_gen_manufacturer_properties_status_cb_t;
+
+/** Parameters of Generic Manufacturer Property Status. */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t property_id;   /*!< Property ID identifying a Generic Manufacturer Property */
+    uint8_t  user_access;   /*!< Enumeration indicating user access (optional) */
+    struct net_buf_simple *property_value;  /*!< Raw value for the Manufacturer Property (C.1) */
+} esp_ble_mesh_gen_manufacturer_property_status_cb_t;
+
+/** Parameter of Generic Client Properties Status. */
+typedef struct {
+    struct net_buf_simple *property_ids;    /*!< Buffer contains a sequence of N Client Property IDs */
+} esp_ble_mesh_gen_client_properties_status_cb_t;
+
+/**
+ * @brief Generic Client Model received message union
+ */
+typedef union {
+    esp_ble_mesh_gen_onoff_status_cb_t             onoff_status;            /*!< For ESP_BLE_MESH_MODEL_OP_GEN_ONOFF_STATUS */
+    esp_ble_mesh_gen_level_status_cb_t             level_status;            /*!< For ESP_BLE_MESH_MODEL_OP_GEN_LEVEL_STATUS */
+    esp_ble_mesh_gen_def_trans_time_status_cb_t    def_trans_time_status;   /*!< For ESP_BLE_MESH_MODEL_OP_GEN_DEF_TRANS_TIME_STATUS */
+    esp_ble_mesh_gen_onpowerup_status_cb_t         onpowerup_status;        /*!< For ESP_BLE_MESH_MODEL_OP_GEN_ONPOWERUP_STATUS */
+    esp_ble_mesh_gen_power_level_status_cb_t       power_level_status;      /*!< For ESP_BLE_MESH_MODEL_OP_GEN_POWER_LEVEL_STATUS */
+    esp_ble_mesh_gen_power_last_status_cb_t        power_last_status;       /*!< For ESP_BLE_MESH_MODEL_OP_GEN_POWER_LAST_STATUS */
+    esp_ble_mesh_gen_power_default_status_cb_t     power_default_status;    /*!< For ESP_BLE_MESH_MODEL_OP_GEN_POWER_DEFAULT_STATUS */
+    esp_ble_mesh_gen_power_range_status_cb_t       power_range_status;      /*!< For ESP_BLE_MESH_MODEL_OP_GEN_POWER_RANGE_STATUS */
+    esp_ble_mesh_gen_battery_status_cb_t           battery_status;          /*!< For ESP_BLE_MESH_MODEL_OP_GEN_BATTERY_STATUS */
+    esp_ble_mesh_gen_loc_global_status_cb_t        location_global_status;  /*!< For ESP_BLE_MESH_MODEL_OP_GEN_LOC_GLOBAL_STATUS */
+    esp_ble_mesh_gen_loc_local_status_cb_t         location_local_status;   /*!< ESP_BLE_MESH_MODEL_OP_GEN_LOC_LOCAL_STATUS */
+    esp_ble_mesh_gen_user_properties_status_cb_t   user_properties_status;  /*!< ESP_BLE_MESH_MODEL_OP_GEN_USER_PROPERTIES_STATUS */
+    esp_ble_mesh_gen_user_property_status_cb_t     user_property_status;    /*!< ESP_BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_STATUS */
+    esp_ble_mesh_gen_admin_properties_status_cb_t  admin_properties_status; /*!< ESP_BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTIES_STATUS */
+    esp_ble_mesh_gen_admin_property_status_cb_t    admin_property_status;   /*!< ESP_BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_STATUS */
+    esp_ble_mesh_gen_manufacturer_properties_status_cb_t manufacturer_properties_status; /*!< ESP_BLE_MESH_MODEL_OP_GEN_MANUFACTURER_PROPERTIES_STATUS */
+    esp_ble_mesh_gen_manufacturer_property_status_cb_t   manufacturer_property_status;   /*!< ESP_BLE_MESH_MODEL_OP_GEN_MANUFACTURER_PROPERTY_STATUS */
+    esp_ble_mesh_gen_client_properties_status_cb_t       client_properties_status;       /*!< ESP_BLE_MESH_MODEL_OP_GEN_CLIENT_PROPERTIES_STATUS */
+} esp_ble_mesh_gen_client_status_cb_t;
+
+/** Generic Client Model callback parameters */
+typedef struct {
+    int error_code;                                 /*!< Appropriate error code */
+    esp_ble_mesh_client_common_param_t *params;     /*!< The client common parameters. */
+    esp_ble_mesh_gen_client_status_cb_t status_cb;  /*!< The generic status message callback values */
+} esp_ble_mesh_generic_client_cb_param_t;
+
+/** This enum value is the event of Generic Client Model */
+typedef enum {
+    ESP_BLE_MESH_GENERIC_CLIENT_GET_STATE_EVT,
+    ESP_BLE_MESH_GENERIC_CLIENT_SET_STATE_EVT,
+    ESP_BLE_MESH_GENERIC_CLIENT_PUBLISH_EVT,
+    ESP_BLE_MESH_GENERIC_CLIENT_TIMEOUT_EVT,
+    ESP_BLE_MESH_GENERIC_CLIENT_EVT_MAX,
+} esp_ble_mesh_generic_client_cb_event_t;
+
+/**
+ *  @brief Bluetooth Mesh Generic Client Model function.
+ */
+
+/**
+ * @brief   Generic Client Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_generic_client_cb_t)(esp_ble_mesh_generic_client_cb_event_t event,
+                                                  esp_ble_mesh_generic_client_cb_param_t *param);
+
+/**
+ * @brief       Register BLE Mesh Generic Client Model callback.
+ *
+ * @param[in]   callback: Pointer to the callback function.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_generic_client_callback(esp_ble_mesh_generic_client_cb_t callback);
+
+/**
+ * @brief       Get the value of Generic Server Model states using the Generic Client Model get messages.
+ *
+ * @note        If you want to find the opcodes and corresponding meanings accepted by this API,
+ *              please refer to esp_ble_mesh_generic_message_opcode_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]   params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]   get_state: Pointer to generic get message value.
+ *                         Shall not be set to NULL.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_generic_client_get_state(esp_ble_mesh_client_common_param_t *params,
+                                                esp_ble_mesh_generic_client_get_state_t *get_state);
+
+/**
+ * @brief       Set the value of Generic Server Model states using the Generic Client Model set messages.
+ *
+ * @note        If you want to find the opcodes and corresponding meanings accepted by this API,
+ *              please refer to esp_ble_mesh_generic_message_opcode_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]   params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]   set_state: Pointer to generic set message value.
+ *                         Shall not be set to NULL.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_generic_client_set_state(esp_ble_mesh_client_common_param_t *params,
+                                                esp_ble_mesh_generic_client_set_state_t *set_state);
+
+/**
+ * @brief Generic Server Models related context.
+ */
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_ONOFF_SRV
+ *
+ *  @brief  Define a new Generic OnOff Server Model.
+ *
+ *  @note   1. The Generic OnOff Server Model is a root model.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_onoff_srv_t.
+ *
+ *  @return New Generic OnOff Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_ONOFF_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_ONOFF_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_LEVEL_SRV
+ *
+ *  @brief  Define a new Generic Level Server Model.
+ *
+ *  @note   1. The Generic Level Server Model is a root model.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_level_srv_t.
+ *
+ *  @return New Generic Level Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_LEVEL_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_LEVEL_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_DEF_TRANS_TIME_SRV
+ *
+ *  @brief  Define a new Generic Default Transition Time Server Model.
+ *
+ *  @note   1. The Generic Default Transition Time Server Model is a root model.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_def_trans_time_srv_t.
+ *
+ *  @return New Generic Default Transition Time Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_DEF_TRANS_TIME_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_DEF_TRANS_TIME_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_POWER_ONOFF_SRV
+ *
+ *  @brief  Define a new Generic Power OnOff Server Model.
+ *
+ *  @note   1. The Generic Power OnOff Server model extends the Generic OnOff Server
+ *             model. When this model is present on an element, the corresponding
+ *             Generic Power OnOff Setup Server model shall also be present.
+ *          2. This model may be used to represent a variety of devices that do not
+ *             fit any of the model descriptions that have been defined but support
+ *             the generic properties of On/Off.
+ *          3. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_power_onoff_srv_t.
+ *
+ *  @return New Generic Power OnOff Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_POWER_ONOFF_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_POWER_ONOFF_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_POWER_ONOFF_SETUP_SRV
+ *
+ *  @brief  Define a new Generic Power OnOff Setup Server Model.
+ *
+ *  @note   1. The Generic Power OnOff Setup Server model extends the Generic Power
+ *             OnOff Server model and the Generic Default Transition Time Server model.
+ *          2. This model shall support model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_power_onoff_setup_srv_t.
+ *
+ *  @return New Generic Power OnOff Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_POWER_ONOFF_SETUP_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_POWER_ONOFF_SETUP_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_POWER_LEVEL_SRV
+ *
+ *  @brief  Define a new Generic Power Level Server Model.
+ *
+ *  @note   1. The Generic Power Level Server model extends the Generic Power OnOff
+ *             Server model and the Generic Level Server model. When this model is
+ *             present on an Element, the corresponding Generic Power Level Setup
+ *             Server model shall also be present.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_power_level_srv_t.
+ *
+ *  @return New Generic Power Level Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_POWER_LEVEL_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_POWER_LEVEL_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_POWER_LEVEL_SETUP_SRV
+ *
+ *  @brief  Define a new Generic Power Level Setup Server Model.
+ *
+ *  @note   1. The Generic Power Level Setup Server model extends the Generic Power
+ *             Level Server model and the Generic Power OnOff Setup Server model.
+ *          2. This model shall support model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_power_level_setup_srv_t.
+ *
+ *  @return New Generic Power Level Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_POWER_LEVEL_SETUP_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_POWER_LEVEL_SETUP_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_BATTERY_SRV
+ *
+ *  @brief  Define a new Generic Battery Server Model.
+ *
+ *  @note   1. The Generic Battery Server Model is a root model.
+ *          2. This model shall support model publication and model subscription.
+ *          3. The model may be used to represent an element that is powered by a battery.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_battery_srv_t.
+ *
+ *  @return New Generic Battery Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_BATTERY_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_BATTERY_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_LOCATION_SRV
+ *
+ *  @brief  Define a new Generic Location Server Model.
+ *
+ *  @note   1. The Generic Location Server model is a root model. When this model
+ *             is present on an Element, the corresponding Generic Location Setup
+ *             Server model shall also be present.
+ *          2. This model shall support model publication and model subscription.
+ *          3. The model may be used to represent an element that knows its
+ *             location (global or local).
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_location_srv_t.
+ *
+ *  @return New Generic Location Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_LOCATION_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_LOCATION_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_LOCATION_SETUP_SRV
+ *
+ *  @brief  Define a new Generic Location Setup Server Model.
+ *
+ *  @note   1. The Generic Location Setup Server model extends the Generic Location
+ *             Server model.
+ *          2. This model shall support model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_location_setup_srv_t.
+ *
+ *  @return New Generic Location Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_LOCATION_SETUP_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_LOCATION_SETUP_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_USER_PROP_SRV
+ *
+ *  @brief  Define a new Generic User Property Server Model.
+ *
+ *  @note   1. The Generic User Property Server model is a root model.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_user_prop_srv_t.
+ *
+ *  @return New Generic User Property Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_USER_PROP_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_USER_PROP_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_ADMIN_PROP_SRV
+ *
+ *  @brief  Define a new Generic Admin Property Server Model.
+ *
+ *  @note   1. The Generic Admin Property Server model extends the Generic User
+ *             Property Server model.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_admin_prop_srv_t.
+ *
+ *  @return New Generic Admin Property Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_ADMIN_PROP_SRV(srv_pub, srv_data)            \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_ADMIN_PROP_SRV,    \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_MANUFACTURER_PROP_SRV
+ *
+ *  @brief  Define a new Generic Manufacturer Property Server Model.
+ *
+ *  @note   1. The Generic Manufacturer Property Server model extends the Generic
+ *             User Property Server model.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_manu_prop_srv_t.
+ *
+ *  @return New Generic Manufacturer Property Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_MANUFACTURER_PROP_SRV(srv_pub, srv_data)            \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_MANUFACTURER_PROP_SRV,    \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_GEN_CLIENT_PROP_SRV
+ *
+ *  @brief  Define a new Generic User Property Server Model.
+ *
+ *  @note   1. The Generic Client Property Server model is a root model.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_gen_client_prop_srv_t.
+ *
+ *  @return New Generic Client Property Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_GEN_CLIENT_PROP_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_GEN_CLIENT_PROP_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** Parameters of Generic OnOff state */
+typedef struct {
+    uint8_t onoff;          /*!< The present value of the Generic OnOff state */
+    uint8_t target_onoff;   /*!< The target value of the Generic OnOff state */
+} esp_ble_mesh_gen_onoff_state_t;
+
+/** User data of Generic OnOff Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Generic OnOff Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_gen_onoff_state_t state;       /*!< Parameters of the Generic OnOff state */
+    esp_ble_mesh_last_msg_info_t last;          /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t transition; /*!< Parameters of state transition */
+} esp_ble_mesh_gen_onoff_srv_t;
+
+/** Parameters of Generic Level state */
+typedef struct {
+    int16_t level;          /*!< The present value of the Generic Level state */
+    int16_t target_level;   /*!< The target value of the Generic Level state */
+
+    /**
+     * When a new transaction starts, level should be set to last_last, and use
+     * "level + incoming delta" to calculate the target level. In another word,
+     * "last_level" is used to record "level" of the last transaction, and
+     * "last_delta" is used to record the previously received delta_level value.
+     */
+    int16_t last_level; /*!< The last value of the Generic Level state */
+    int32_t last_delta; /*!< The last delta change of the Generic Level state */
+
+    bool move_start;    /*!< Indicate if the transition of the Generic Level state has been started */
+    bool positive;      /*!< Indicate if the transition is positive or negative */
+} esp_ble_mesh_gen_level_state_t;
+
+/** User data of Generic Level Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Generic Level Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_gen_level_state_t state;       /*!< Parameters of the Generic Level state */
+    esp_ble_mesh_last_msg_info_t last;          /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t transition; /*!< Parameters of state transition */
+    int32_t tt_delta_level;                     /*!< Delta change value of level state transition */
+} esp_ble_mesh_gen_level_srv_t;
+
+/** Parameter of Generic Default Transition Time state */
+typedef struct {
+    uint8_t trans_time;     /*!< The value of the Generic Default Transition Time state */
+} esp_ble_mesh_gen_def_trans_time_state_t;
+
+/** User data of Generic Default Transition Time Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                    /*!< Pointer to the Generic Default Transition Time Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;        /*!< Response control of the server model received messages */
+    esp_ble_mesh_gen_def_trans_time_state_t state;  /*!< Parameters of the Generic Default Transition Time state */
+} esp_ble_mesh_gen_def_trans_time_srv_t;
+
+/** Parameter of Generic OnPowerUp state */
+typedef struct {
+    uint8_t onpowerup;      /*!< The value of the Generic OnPowerUp state */
+} esp_ble_mesh_gen_onpowerup_state_t;
+
+/** User data of Generic Power OnOff Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Generic Power OnOff Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_gen_onpowerup_state_t *state;  /*!< Parameters of the Generic OnPowerUp state */
+} esp_ble_mesh_gen_power_onoff_srv_t;
+
+/** User data of Generic Power OnOff Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Generic Power OnOff Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_gen_onpowerup_state_t *state;  /*!< Parameters of the Generic OnPowerUp state */
+} esp_ble_mesh_gen_power_onoff_setup_srv_t;
+
+/** Parameters of Generic Power Level state */
+typedef struct {
+    uint16_t power_actual;          /*!< The present value of the Generic Power Actual state */
+    uint16_t target_power_actual;   /*!< The target value of the Generic Power Actual state */
+
+    uint16_t power_last;            /*!< The value of the Generic Power Last state */
+    uint16_t power_default;         /*!< The value of the Generic Power Default state */
+
+    uint8_t  status_code;           /*!< The status code of setting Generic Power Range state */
+    uint16_t power_range_min;       /*!< The minimum value of the Generic Power Range state */
+    uint16_t power_range_max;       /*!< The maximum value of the Generic Power Range state */
+} esp_ble_mesh_gen_power_level_state_t;
+
+/** User data of Generic Power Level Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                    /*!< Pointer to the Generic Power Level Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;        /*!< Response control of the server model received messages */
+    esp_ble_mesh_gen_power_level_state_t *state;    /*!< Parameters of the Generic Power Level state */
+    esp_ble_mesh_last_msg_info_t last;              /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t transition;     /*!< Parameters of state transition */
+    int32_t tt_delta_level;                         /*!< Delta change value of level state transition */
+} esp_ble_mesh_gen_power_level_srv_t;
+
+/** User data of Generic Power Level Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                    /*!< Pointer to the Generic Power Level Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;        /*!< Response control of the server model received messages */
+    esp_ble_mesh_gen_power_level_state_t *state;    /*!< Parameters of the Generic Power Level state */
+} esp_ble_mesh_gen_power_level_setup_srv_t;
+
+/** Parameters of Generic Battery state */
+typedef struct {
+    uint32_t battery_level : 8,         /*!< The value of the Generic Battery Level state */
+             time_to_discharge : 24;    /*!< The value of the Generic Battery Time to Discharge state */
+    uint32_t time_to_charge : 24,       /*!< The value of the Generic Battery Time to Charge state */
+             battery_flags : 8;         /*!< The value of the Generic Battery Flags state */
+} esp_ble_mesh_gen_battery_state_t;
+
+/** User data of Generic Battery Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Generic Battery Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_gen_battery_state_t state;     /*!< Parameters of the Generic Battery state */
+} esp_ble_mesh_gen_battery_srv_t;
+
+/** Parameters of Generic Location state */
+typedef struct {
+    int32_t  global_latitude;   /*!< The value of the Global Latitude field */
+    int32_t  global_longitude;  /*!< The value of the Global Longitude field */
+    int16_t  global_altitude;   /*!< The value of the Global Altitude field */
+    int16_t  local_north;       /*!< The value of the Local North field */
+    int16_t  local_east;        /*!< The value of the Local East field */
+    int16_t  local_altitude;    /*!< The value of the Local Altitude field */
+    uint8_t  floor_number;      /*!< The value of the Floor Number field */
+    uint16_t uncertainty;       /*!< The value of the Uncertainty field */
+} esp_ble_mesh_gen_location_state_t;
+
+/** User data of Generic Location Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Generic Location Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_gen_location_state_t *state;   /*!< Parameters of the Generic Location state */
+} esp_ble_mesh_gen_location_srv_t;
+
+/** User data of Generic Location Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Generic Location Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_gen_location_state_t *state;   /*!< Parameters of the Generic Location state */
+} esp_ble_mesh_gen_location_setup_srv_t;
+
+/** This enum value is the access value of Generic User Property */
+typedef enum {
+    ESP_BLE_MESH_GEN_USER_ACCESS_PROHIBIT,
+    ESP_BLE_MESH_GEN_USER_ACCESS_READ,
+    ESP_BLE_MESH_GEN_USER_ACCESS_WRITE,
+    ESP_BLE_MESH_GEN_USER_ACCESS_READ_WRITE,
+} esp_ble_mesh_gen_user_prop_access_t;
+
+/** This enum value is the access value of Generic Admin Property */
+typedef enum {
+    ESP_BLE_MESH_GEN_ADMIN_NOT_USER_PROP,
+    ESP_BLE_MESH_GEN_ADMIN_ACCESS_READ,
+    ESP_BLE_MESH_GEN_ADMIN_ACCESS_WRITE,
+    ESP_BLE_MESH_GEN_ADMIN_ACCESS_READ_WRITE,
+} esp_ble_mesh_gen_admin_prop_access_t;
+
+/** This enum value is the access value of Generic Manufacturer Property */
+typedef enum {
+    ESP_BLE_MESH_GEN_MANU_NOT_USER_PROP,
+    ESP_BLE_MESH_GEN_MANU_ACCESS_READ,
+} esp_ble_mesh_gen_manu_prop_access_t;
+
+/** Parameters of Generic Property states */
+typedef struct {
+    uint16_t id;            /*!< The value of User/Admin/Manufacturer Property ID */
+    uint8_t  user_access;   /*!< The value of User Access field */
+    uint8_t  admin_access;  /*!< The value of Admin Access field */
+    uint8_t  manu_access;   /*!< The value of Manufacturer Access field */
+    struct net_buf_simple *val; /*!< The value of User/Admin/Manufacturer Property */
+} esp_ble_mesh_generic_property_t;
+
+/** User data of Generic User Property Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                    /*!< Pointer to the Generic User Property Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;        /*!< Response control of the server model received messages */
+    uint8_t property_count;                         /*!< Generic User Property count */
+    esp_ble_mesh_generic_property_t *properties;    /*!< Parameters of the Generic User Property state */
+} esp_ble_mesh_gen_user_prop_srv_t;
+
+/** User data of Generic Admin Property Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                    /*!< Pointer to the Generic Admin Property Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;        /*!< Response control of the server model received messages */
+    uint8_t property_count;                         /*!< Generic Admin Property count */
+    esp_ble_mesh_generic_property_t *properties;    /*!< Parameters of the Generic Admin Property state */
+} esp_ble_mesh_gen_admin_prop_srv_t;
+
+/** User data of Generic Manufacturer Property Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                    /*!< Pointer to the Generic Manufacturer Property Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;        /*!< Response control of the server model received messages */
+    uint8_t property_count;                         /*!< Generic Manufacturer Property count */
+    esp_ble_mesh_generic_property_t *properties;    /*!< Parameters of the Generic Manufacturer Property state */
+} esp_ble_mesh_gen_manu_prop_srv_t;
+
+/** User data of Generic Client Property Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Generic Client Property Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    uint8_t id_count;                           /*!< Generic Client Property ID count */
+    uint16_t *property_ids;                     /*!< Parameters of the Generic Client Property state */
+} esp_ble_mesh_gen_client_prop_srv_t;
+
+/** Parameter of Generic OnOff Set state change event */
+typedef struct {
+    uint8_t onoff;          /*!< The value of Generic OnOff state */
+} esp_ble_mesh_state_change_gen_onoff_set_t;
+
+/** Parameter of Generic Level Set state change event */
+typedef struct {
+    int16_t level;          /*!< The value of Generic Level state */
+} esp_ble_mesh_state_change_gen_level_set_t;
+
+/** Parameter of Generic Delta Set state change event */
+typedef struct {
+    int16_t level;          /*!< The value of Generic Level state */
+} esp_ble_mesh_state_change_gen_delta_set_t;
+
+/** Parameter of Generic Move Set state change event */
+typedef struct {
+    int16_t level;          /*!< The value of Generic Level state */
+} esp_ble_mesh_state_change_gen_move_set_t;
+
+/** Parameter of Generic Default Transition Time Set state change event */
+typedef struct {
+    uint8_t trans_time;     /*!< The value of Generic Default Transition Time state */
+} esp_ble_mesh_state_change_gen_def_trans_time_set_t;
+
+/** Parameter of Generic OnPowerUp Set state change event */
+typedef struct {
+    uint8_t onpowerup;      /*!< The value of Generic OnPowerUp state */
+} esp_ble_mesh_state_change_gen_onpowerup_set_t;
+
+/** Parameter of Generic Power Level Set state change event */
+typedef struct {
+    uint16_t power;         /*!< The value of Generic Power Actual state */
+} esp_ble_mesh_state_change_gen_power_level_set_t;
+
+/** Parameter of Generic Power Default Set state change event */
+typedef struct {
+    uint16_t power;         /*!< The value of Generic Power Default state */
+} esp_ble_mesh_state_change_gen_power_default_set_t;
+
+/** Parameters of Generic Power Range Set state change event */
+typedef struct {
+    uint16_t range_min;     /*!< The minimum value of Generic Power Range state */
+    uint16_t range_max;     /*!< The maximum value of Generic Power Range state */
+} esp_ble_mesh_state_change_gen_power_range_set_t;
+
+/** Parameters of Generic Location Global Set state change event */
+typedef struct {
+    int32_t latitude;       /*!< The Global Latitude value of Generic Location state */
+    int32_t longitude;      /*!< The Global Longitude value of Generic Location state */
+    int16_t altitude;       /*!< The Global Altitude value of Generic Location state */
+} esp_ble_mesh_state_change_gen_loc_global_set_t;
+
+/** Parameters of Generic Location Local Set state change event */
+typedef struct {
+    int16_t  north;         /*!< The Local North value of Generic Location state */
+    int16_t  east;          /*!< The Local East value of Generic Location state */
+    int16_t  altitude;      /*!< The Local Altitude value of Generic Location state */
+    uint8_t  floor_number;  /*!< The Floor Number value of Generic Location state */
+    uint16_t uncertainty;   /*!< The Uncertainty value of Generic Location state */
+} esp_ble_mesh_state_change_gen_loc_local_set_t;
+
+/** Parameters of Generic User Property Set state change event */
+typedef struct {
+    uint16_t id;    /*!< The property id of Generic User Property state */
+    struct net_buf_simple *value;   /*!< The property value of Generic User Property state */
+} esp_ble_mesh_state_change_gen_user_property_set_t;
+
+/** Parameters of Generic Admin Property Set state change event */
+typedef struct {
+    uint16_t id;        /*!< The property id of Generic Admin Property state */
+    uint8_t  access;    /*!< The property access of Generic Admin Property state */
+    struct net_buf_simple *value;   /*!< The property value of Generic Admin Property state */
+} esp_ble_mesh_state_change_gen_admin_property_set_t;
+
+/** Parameters of Generic Manufacturer Property Set state change event */
+typedef struct {
+    uint16_t id;        /*!< The property id of Generic Manufacturer Property state */
+    uint8_t  access;    /*!< The property value of Generic Manufacturer Property state */
+} esp_ble_mesh_state_change_gen_manu_property_set_t;
+
+/**
+ * @brief Generic Server Model state change value union
+ */
+typedef union {
+    /**
+     * The recv_op in ctx can be used to decide which state is changed.
+     */
+    esp_ble_mesh_state_change_gen_onoff_set_t          onoff_set;           /*!< Generic OnOff Set */
+    esp_ble_mesh_state_change_gen_level_set_t          level_set;           /*!< Generic Level Set */
+    esp_ble_mesh_state_change_gen_delta_set_t          delta_set;           /*!< Generic Delta Set */
+    esp_ble_mesh_state_change_gen_move_set_t           move_set;            /*!< Generic Move Set */
+    esp_ble_mesh_state_change_gen_def_trans_time_set_t def_trans_time_set;  /*!< Generic Default Transition Time Set */
+    esp_ble_mesh_state_change_gen_onpowerup_set_t      onpowerup_set;       /*!< Generic OnPowerUp Set */
+    esp_ble_mesh_state_change_gen_power_level_set_t    power_level_set;     /*!< Generic Power Level Set */
+    esp_ble_mesh_state_change_gen_power_default_set_t  power_default_set;   /*!< Generic Power Default Set */
+    esp_ble_mesh_state_change_gen_power_range_set_t    power_range_set;     /*!< Generic Power Range Set */
+    esp_ble_mesh_state_change_gen_loc_global_set_t     loc_global_set;      /*!< Generic Location Global Set */
+    esp_ble_mesh_state_change_gen_loc_local_set_t      loc_local_set;       /*!< Generic Location Local Set */
+    esp_ble_mesh_state_change_gen_user_property_set_t  user_property_set;   /*!< Generic User Property Set */
+    esp_ble_mesh_state_change_gen_admin_property_set_t admin_property_set;  /*!< Generic Admin Property Set */
+    esp_ble_mesh_state_change_gen_manu_property_set_t  manu_property_set;   /*!< Generic Manufacturer Property Set */
+} esp_ble_mesh_generic_server_state_change_t;
+
+/** Context of the received Generic User Property Get message */
+typedef struct {
+    uint16_t property_id;       /*!< Property ID identifying a Generic User Property */
+} esp_ble_mesh_server_recv_gen_user_property_get_t;
+
+/** Context of the received Generic Admin Property Get message */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Generic Admin Property */
+} esp_ble_mesh_server_recv_gen_admin_property_get_t;
+
+/** Context of the received Generic Manufacturer Property message */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Generic Manufacturer Property */
+} esp_ble_mesh_server_recv_gen_manufacturer_property_get_t;
+
+/** Context of the received Generic Client Properties Get message */
+typedef struct {
+    uint16_t property_id;   /*!< A starting Client Property ID present within an element */
+} esp_ble_mesh_server_recv_gen_client_properties_get_t;
+
+/**
+ * @brief Generic Server Model received get message union
+ */
+typedef union {
+    esp_ble_mesh_server_recv_gen_user_property_get_t         user_property;     /*!< Generic User Property Get */
+    esp_ble_mesh_server_recv_gen_admin_property_get_t        admin_property;    /*!< Generic Admin Property Get */
+    esp_ble_mesh_server_recv_gen_manufacturer_property_get_t manu_property;     /*!< Generic Manufacturer Property Get */
+    esp_ble_mesh_server_recv_gen_client_properties_get_t     client_properties; /*!< Generic Client Properties Get */
+} esp_ble_mesh_generic_server_recv_get_msg_t;
+
+/** Context of the received Generic OnOff Set message */
+typedef struct {
+    bool    op_en;          /*!< Indicate if optional parameters are included */
+    uint8_t onoff;          /*!< Target value of Generic OnOff state */
+    uint8_t tid;            /*!< Transaction ID */
+    uint8_t trans_time;     /*!< Time to complete state transition (optional) */
+    uint8_t delay;          /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_gen_onoff_set_t;
+
+/** Context of the received Generic Level Set message */
+typedef struct {
+    bool    op_en;          /*!< Indicate if optional parameters are included */
+    int16_t level;          /*!< Target value of Generic Level state */
+    uint8_t tid;            /*!< Transaction ID */
+    uint8_t trans_time;     /*!< Time to complete state transition (optional) */
+    uint8_t delay;          /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_gen_level_set_t;
+
+/** Context of the received Generic Delta Set message */
+typedef struct {
+    bool    op_en;          /*!< Indicate if optional parameters are included */
+    int32_t delta_level;    /*!< Delta change of Generic Level state */
+    uint8_t tid;            /*!< Transaction ID */
+    uint8_t trans_time;     /*!< Time to complete state transition (optional) */
+    uint8_t delay;          /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_gen_delta_set_t;
+
+/** Context of the received Generic Move Set message */
+typedef struct {
+    bool    op_en;          /*!< Indicate if optional parameters are included */
+    int16_t delta_level;    /*!< Delta Level step to calculate Move speed for Generic Level state */
+    uint8_t tid;            /*!< Transaction ID */
+    uint8_t trans_time;     /*!< Time to complete state transition (optional) */
+    uint8_t delay;          /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_gen_move_set_t;
+
+/** Context of the received Generic Default Transition Time Set message */
+typedef struct {
+    uint8_t trans_time;     /*!< The value of the Generic Default Transition Time state */
+} esp_ble_mesh_server_recv_gen_def_trans_time_set_t;
+
+/** Context of the received Generic OnPowerUp Set message */
+typedef struct {
+    uint8_t onpowerup;      /*!< The value of the Generic OnPowerUp state */
+} esp_ble_mesh_server_recv_gen_onpowerup_set_t;
+
+/** Context of the received Generic Power Level Set message */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t power;         /*!< Target value of Generic Power Actual state */
+    uint8_t  tid;           /*!< Transaction ID */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_gen_power_level_set_t;
+
+/** Context of the received Generic Power Default Set message */
+typedef struct {
+    uint16_t power;         /*!< The value of the Generic Power Default state */
+} esp_ble_mesh_server_recv_gen_power_default_set_t;
+
+/** Context of the received Generic Power Range Set message */
+typedef struct {
+    uint16_t range_min;     /*!< Value of Range Min field of Generic Power Range state */
+    uint16_t range_max;     /*!< Value of Range Max field of Generic Power Range state */
+} esp_ble_mesh_server_recv_gen_power_range_set_t;
+
+/** Context of the received Generic Location Global Set message */
+typedef struct {
+    int32_t global_latitude;    /*!< Global Coordinates (Latitude) */
+    int32_t global_longitude;   /*!< Global Coordinates (Longitude) */
+    int16_t global_altitude;    /*!< Global Altitude */
+} esp_ble_mesh_server_recv_gen_loc_global_set_t;
+
+/** Context of the received Generic Location Local Set message */
+typedef struct {
+    int16_t  local_north;       /*!< Local Coordinates (North) */
+    int16_t  local_east;        /*!< Local Coordinates (East) */
+    int16_t  local_altitude;    /*!< Local Altitude */
+    uint8_t  floor_number;      /*!< Floor Number */
+    uint16_t uncertainty;       /*!< Uncertainty */
+} esp_ble_mesh_server_recv_gen_loc_local_set_t;
+
+/** Context of the received Generic User Property Set message */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Generic User Property */
+    struct net_buf_simple *property_value;  /*!< Raw value for the User Property */
+} esp_ble_mesh_server_recv_gen_user_property_set_t;
+
+/** Context of the received Generic Admin Property Set message */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Generic Admin Property */
+    uint8_t  user_access;   /*!< Enumeration indicating user access */
+    struct net_buf_simple *property_value;  /*!< Raw value for the Admin Property */
+} esp_ble_mesh_server_recv_gen_admin_property_set_t;
+
+/** Context of the received Generic Manufacturer Property Set message */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Generic Manufacturer Property */
+    uint8_t  user_access;   /*!< Enumeration indicating user access */
+} esp_ble_mesh_server_recv_gen_manufacturer_property_set_t;
+
+/**
+ * @brief Generic Server Model received set message union
+ */
+typedef union {
+    esp_ble_mesh_server_recv_gen_onoff_set_t                 onoff;             /*!< Generic OnOff Set/Generic OnOff Set Unack */
+    esp_ble_mesh_server_recv_gen_level_set_t                 level;             /*!< Generic Level Set/Generic Level Set Unack */
+    esp_ble_mesh_server_recv_gen_delta_set_t                 delta;             /*!< Generic Delta Set/Generic Delta Set Unack */
+    esp_ble_mesh_server_recv_gen_move_set_t                  move;              /*!< Generic Move Set/Generic Move Set Unack */
+    esp_ble_mesh_server_recv_gen_def_trans_time_set_t        def_trans_time;    /*!< Generic Default Transition Time Set/Generic Default Transition Time Set Unack */
+    esp_ble_mesh_server_recv_gen_onpowerup_set_t             onpowerup;         /*!< Generic OnPowerUp Set/Generic OnPowerUp Set Unack */
+    esp_ble_mesh_server_recv_gen_power_level_set_t           power_level;       /*!< Generic Power Level Set/Generic Power Level Set Unack */
+    esp_ble_mesh_server_recv_gen_power_default_set_t         power_default;     /*!< Generic Power Default Set/Generic Power Default Set Unack */
+    esp_ble_mesh_server_recv_gen_power_range_set_t           power_range;       /*!< Generic Power Range Set/Generic Power Range Set Unack */
+    esp_ble_mesh_server_recv_gen_loc_global_set_t            location_global;   /*!< Generic Location Global Set/Generic Location Global Set Unack */
+    esp_ble_mesh_server_recv_gen_loc_local_set_t             location_local;    /*!< Generic Location Local Set/Generic Location Local Set Unack */
+    esp_ble_mesh_server_recv_gen_user_property_set_t         user_property;     /*!< Generic User Property Set/Generic User Property Set Unack */
+    esp_ble_mesh_server_recv_gen_admin_property_set_t        admin_property;    /*!< Generic Admin Property Set/Generic Admin Property Set Unack */
+    esp_ble_mesh_server_recv_gen_manufacturer_property_set_t manu_property;     /*!< Generic Manufacturer Property Set/Generic Manufacturer Property Set Unack */
+} esp_ble_mesh_generic_server_recv_set_msg_t;
+
+/**
+ * @brief Generic Server Model callback value union
+ */
+typedef union {
+    esp_ble_mesh_generic_server_state_change_t state_change;    /*!< ESP_BLE_MESH_GENERIC_SERVER_STATE_CHANGE_EVT */
+    esp_ble_mesh_generic_server_recv_get_msg_t get;     /*!< ESP_BLE_MESH_GENERIC_SERVER_RECV_GET_MSG_EVT */
+    esp_ble_mesh_generic_server_recv_set_msg_t set;     /*!< ESP_BLE_MESH_GENERIC_SERVER_RECV_SET_MSG_EVT */
+} esp_ble_mesh_generic_server_cb_value_t;
+
+/** Generic Server Model callback parameters */
+typedef struct {
+    esp_ble_mesh_model_t  *model;   /*!< Pointer to Generic Server Models */
+    esp_ble_mesh_msg_ctx_t ctx;     /*!< Context of the received messages */
+    esp_ble_mesh_generic_server_cb_value_t value;   /*!< Value of the received Generic Messages */
+} esp_ble_mesh_generic_server_cb_param_t;
+
+/** This enum value is the event of Generic Server Model */
+typedef enum {
+    /**
+     * 1. When get_auto_rsp is set to ESP_BLE_MESH_SERVER_AUTO_RSP, no event will be
+     *    callback to the application layer when Generic Get messages are received.
+     * 2. When set_auto_rsp is set to ESP_BLE_MESH_SERVER_AUTO_RSP, this event will
+     *    be callback to the application layer when Generic Set/Set Unack messages
+     *    are received.
+     */
+    ESP_BLE_MESH_GENERIC_SERVER_STATE_CHANGE_EVT,
+    /**
+     * When get_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, this event will be
+     * callback to the application layer when Generic Get messages are received.
+     */
+    ESP_BLE_MESH_GENERIC_SERVER_RECV_GET_MSG_EVT,
+    /**
+     * When set_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, this event will be
+     * callback to the application layer when Generic Set/Set Unack messages are received.
+     */
+    ESP_BLE_MESH_GENERIC_SERVER_RECV_SET_MSG_EVT,
+    ESP_BLE_MESH_GENERIC_SERVER_EVT_MAX,
+} esp_ble_mesh_generic_server_cb_event_t;
+
+/**
+ *  @brief Bluetooth Mesh Generic Server Model function.
+ */
+
+/**
+ * @brief   Generic Server Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_generic_server_cb_t)(esp_ble_mesh_generic_server_cb_event_t event,
+                                                  esp_ble_mesh_generic_server_cb_param_t *param);
+
+/**
+ * @brief       Register BLE Mesh Generic Server Model callback.
+ *
+ * @param[in]   callback: Pointer to the callback function.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_generic_server_callback(esp_ble_mesh_generic_server_cb_t callback);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_GENERIC_MODEL_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_health_model_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_health_model_api.h
new file mode 100644
index 00000000000..3a636ce1c38
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_health_model_api.h
@@ -0,0 +1,406 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_BLE_MESH_HEALTH_MODEL_API_H_
+#define _ESP_BLE_MESH_HEALTH_MODEL_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @def    ESP_BLE_MESH_MODEL_HEALTH_SRV
+ *
+ *  @brief  Define a new Health Server Model.
+ *
+ *  @note   The Health Server Model can only be included by a Primary Element.
+ *
+ *  @param  srv Pointer to the unique struct esp_ble_mesh_health_srv_t.
+ *  @param  pub Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *
+ *  @return New Health Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_HEALTH_SRV(srv, pub)                           \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_HEALTH_SRV,          \
+                           NULL, pub, srv)
+
+/** @def    ESP_BLE_MESH_MODEL_HEALTH_CLI
+ *
+ *  @brief  Define a new Health Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Health Client Model.
+ *
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Health Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_HEALTH_CLI(cli_data)                           \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_HEALTH_CLI,          \
+                           NULL, NULL, cli_data)
+
+/** @def ESP_BLE_MESH_HEALTH_PUB_DEFINE
+ *
+ *  A helper to define a health publication context
+ *
+ *  @param _name Name given to the publication context variable.
+ *  @param _max  Maximum number of faults the element can have.
+ *  @param _role Role of the device which contains the model.
+ */
+#define ESP_BLE_MESH_HEALTH_PUB_DEFINE(_name, _max, _role) \
+        ESP_BLE_MESH_MODEL_PUB_DEFINE(_name, (1 + 3 + (_max)), _role)
+
+/**
+ * SIG identifier of Health Fault Test.
+ * 0x01 ~ 0xFF: Vendor Specific Test.
+ */
+#define ESP_BLE_MESH_HEALTH_STANDARD_TEST               0x00
+
+/**
+ * Fault values of Health Fault Test.
+ * 0x33 ~ 0x7F: Reserved for Future Use.
+ * 0x80 ~ 0xFF: Vendor Specific Warning/Error.
+ */
+#define ESP_BLE_MESH_NO_FAULT                           0x00
+#define ESP_BLE_MESH_BATTERY_LOW_WARNING                0x01
+#define ESP_BLE_MESH_BATTERY_LOW_ERROR                  0x02
+#define ESP_BLE_MESH_SUPPLY_VOLTAGE_TOO_LOW_WARNING     0x03
+#define ESP_BLE_MESH_SUPPLY_VOLTAGE_TOO_LOW_ERROR       0x04
+#define ESP_BLE_MESH_SUPPLY_VOLTAGE_TOO_HIGH_WARNING    0x05
+#define ESP_BLE_MESH_SUPPLY_VOLTAGE_TOO_HIGH_ERROR      0x06
+#define ESP_BLE_MESH_POWER_SUPPLY_INTERRUPTED_WARNING   0x07
+#define ESP_BLE_MESH_POWER_SUPPLY_INTERRUPTED_ERROR     0x08
+#define ESP_BLE_MESH_NO_LOAD_WARNING                    0x09
+#define ESP_BLE_MESH_NO_LOAD_ERROR                      0x0A
+#define ESP_BLE_MESH_OVERLOAD_WARNING                   0x0B
+#define ESP_BLE_MESH_OVERLOAD_ERROR                     0x0C
+#define ESP_BLE_MESH_OVERHEAT_WARNING                   0x0D
+#define ESP_BLE_MESH_OVERHEAT_ERROR                     0x0E
+#define ESP_BLE_MESH_CONDENSATION_WARNING               0x0F
+#define ESP_BLE_MESH_CONDENSATION_ERROR                 0x10
+#define ESP_BLE_MESH_VIBRATION_WARNING                  0x11
+#define ESP_BLE_MESH_VIBRATION_ERROR                    0x12
+#define ESP_BLE_MESH_CONFIGURATION_WARNING              0x13
+#define ESP_BLE_MESH_CONFIGURATION_ERROR                0x14
+#define ESP_BLE_MESH_ELEMENT_NOT_CALIBRATED_WARNING     0x15
+#define ESP_BLE_MESH_ELEMENT_NOT_CALIBRATED_ERROR       0x16
+#define ESP_BLE_MESH_MEMORY_WARNING                     0x17
+#define ESP_BLE_MESH_MEMORY_ERROR                       0x18
+#define ESP_BLE_MESH_SELF_TEST_WARNING                  0x19
+#define ESP_BLE_MESH_SELF_TEST_ERROR                    0x1A
+#define ESP_BLE_MESH_INPUT_TOO_LOW_WARNING              0x1B
+#define ESP_BLE_MESH_INPUT_TOO_LOW_ERROR                0x1C
+#define ESP_BLE_MESH_INPUT_TOO_HIGH_WARNING             0x1D
+#define ESP_BLE_MESH_INPUT_TOO_HIGH_ERROR               0x1E
+#define ESP_BLE_MESH_INPUT_NO_CHANGE_WARNING            0x1F
+#define ESP_BLE_MESH_INPUT_NO_CHANGE_ERROR              0x20
+#define ESP_BLE_MESH_ACTUATOR_BLOCKED_WARNING           0x21
+#define ESP_BLE_MESH_ACTUATOR_BLOCKED_ERROR             0x22
+#define ESP_BLE_MESH_HOUSING_OPENED_WARNING             0x23
+#define ESP_BLE_MESH_HOUSING_OPENED_ERROR               0x24
+#define ESP_BLE_MESH_TAMPER_WARNING                     0x25
+#define ESP_BLE_MESH_TAMPER_ERROR                       0x26
+#define ESP_BLE_MESH_DEVICE_MOVED_WARNING               0x27
+#define ESP_BLE_MESH_DEVICE_MOVED_ERROR                 0x28
+#define ESP_BLE_MESH_DEVICE_DROPPED_WARNING             0x29
+#define ESP_BLE_MESH_DEVICE_DROPPED_ERROR               0x2A
+#define ESP_BLE_MESH_OVERFLOW_WARNING                   0x2B
+#define ESP_BLE_MESH_OVERFLOW_ERROR                     0x2C
+#define ESP_BLE_MESH_EMPTY_WARNING                      0x2D
+#define ESP_BLE_MESH_EMPTY_ERROR                        0x2E
+#define ESP_BLE_MESH_INTERNAL_BUS_WARNING               0x2F
+#define ESP_BLE_MESH_INTERNAL_BUS_ERROR                 0x30
+#define ESP_BLE_MESH_MECHANISM_JAMMED_WARNING           0x31
+#define ESP_BLE_MESH_MECHANISM_JAMMED_ERROR             0x32
+
+/** ESP BLE Mesh Health Server callback */
+typedef struct {
+    /** Clear health registered faults. Initialized by the stack. */
+    esp_ble_mesh_cb_t fault_clear;
+
+    /** Run a specific health test. Initialized by the stack. */
+    esp_ble_mesh_cb_t fault_test;
+
+    /** Health attention on callback. Initialized by the stack. */
+    esp_ble_mesh_cb_t attention_on;
+
+    /** Health attention off callback. Initialized by the stack. */
+    esp_ble_mesh_cb_t attention_off;
+} esp_ble_mesh_health_srv_cb_t;
+
+#define ESP_BLE_MESH_HEALTH_FAULT_ARRAY_SIZE    32
+
+/** ESP BLE Mesh Health Server test Context */
+typedef struct {
+    uint8_t  id_count;          /*!< Number of Health self-test ID */
+    const uint8_t *test_ids;    /*!< Array of Health self-test IDs */
+    uint16_t company_id;        /*!< Company ID used to identify the Health Fault state */
+    uint8_t  prev_test_id;      /*!< Current test ID of the health fault test */
+    uint8_t  current_faults[ESP_BLE_MESH_HEALTH_FAULT_ARRAY_SIZE];      /*!< Array of current faults */
+    uint8_t  registered_faults[ESP_BLE_MESH_HEALTH_FAULT_ARRAY_SIZE];   /*!< Array of registered faults */
+} __attribute__((packed)) esp_ble_mesh_health_test_t;
+
+/** ESP BLE Mesh Health Server Model Context */
+typedef struct {
+    /** Pointer to Health Server Model */
+    esp_ble_mesh_model_t *model;
+
+    /** Health callback struct */
+    esp_ble_mesh_health_srv_cb_t health_cb;
+
+    /** Attention Timer state */
+    struct k_delayed_work attention_timer;
+
+    /** Attention Timer start flag */
+    bool attention_timer_start;
+
+    /** Health Server fault test */
+    esp_ble_mesh_health_test_t health_test;
+} esp_ble_mesh_health_srv_t;
+
+/** Parameter of Health Fault Get */
+typedef struct {
+    uint16_t company_id;    /*!< Bluetooth assigned 16-bit Company ID */
+} esp_ble_mesh_health_fault_get_t;
+
+/** Parameter of Health Attention Set */
+typedef struct {
+    uint8_t attention;      /*!< Value of the Attention Timer state */
+} esp_ble_mesh_health_attention_set_t;
+
+/** Parameter of Health Period Set */
+typedef struct {
+    uint8_t fast_period_divisor;    /*!< Divider for the Publish Period */
+} esp_ble_mesh_health_period_set_t;
+
+/** Parameter of Health Fault Test */
+typedef struct {
+    uint16_t company_id;    /*!< Bluetooth assigned 16-bit Company ID */
+    uint8_t  test_id;       /*!< ID of a specific test to be performed */
+} esp_ble_mesh_health_fault_test_t;
+
+/** Parameter of Health Fault Clear */
+typedef struct {
+    uint16_t company_id;    /*!< Bluetooth assigned 16-bit Company ID */
+} esp_ble_mesh_health_fault_clear_t;
+
+/**
+ * @brief For ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_GET
+ *            ESP_BLE_MESH_MODEL_OP_ATTENTION_GET
+ *            ESP_BLE_MESH_MODEL_OP_HEALTH_PERIOD_GET
+ * the get_state parameter in the esp_ble_mesh_health_client_get_state function should not be set to NULL.
+ */
+typedef union {
+    esp_ble_mesh_health_fault_get_t fault_get;          /*!< For ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_GET. */
+} esp_ble_mesh_health_client_get_state_t;
+
+/**
+ * @brief For ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_CLEAR
+ *            ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_CLEAR_UNACK
+ *            ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_TEST
+ *            ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_TEST_UNACK
+ *            ESP_BLE_MESH_MODEL_OP_HEALTH_PERIOD_SET
+ *            ESP_BLE_MESH_MODEL_OP_HEALTH_PERIOD_SET_UNACK
+ *            ESP_BLE_MESH_MODEL_OP_ATTENTION_SET
+ *            ESP_BLE_MESH_MODEL_OP_ATTENTION_SET_UNACK
+ * the set_state parameter in the esp_ble_mesh_health_client_set_state function should not be set to NULL.
+ */
+typedef union {
+    esp_ble_mesh_health_attention_set_t attention_set;    /*!< For ESP_BLE_MESH_MODEL_OP_ATTENTION_SET or ESP_BLE_MESH_MODEL_OP_ATTENTION_SET_UNACK. */
+    esp_ble_mesh_health_period_set_t    period_set;       /*!< For ESP_BLE_MESH_MODEL_OP_HEALTH_PERIOD_SET or ESP_BLE_MESH_MODEL_OP_HEALTH_PERIOD_SET_UNACK. */
+    esp_ble_mesh_health_fault_test_t    fault_test;       /*!< For ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_TEST or ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_TEST_UNACK. */
+    esp_ble_mesh_health_fault_clear_t   fault_clear;      /*!< For ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_CLEAR or ESP_BLE_MESH_MODEL_OP_HEALTH_FAULT_CLEAR_UNACK. */
+} esp_ble_mesh_health_client_set_state_t;
+
+/** Parameters of Health Current Status */
+typedef struct {
+    uint8_t  test_id;                       /*!< ID of a most recently performed test */
+    uint16_t company_id;                    /*!< Bluetooth assigned 16-bit Company ID */
+    struct net_buf_simple *fault_array;     /*!< FaultArray field contains a sequence of 1-octet fault values */
+} esp_ble_mesh_health_current_status_cb_t;
+
+/** Parameters of Health Fault Status */
+typedef struct {
+    uint8_t  test_id;                       /*!< ID of a most recently performed test */
+    uint16_t company_id;                    /*!< Bluetooth assigned 16-bit Company ID */
+    struct net_buf_simple *fault_array;     /*!< FaultArray field contains a sequence of 1-octet fault values */
+} esp_ble_mesh_health_fault_status_cb_t;
+
+/** Parameter of Health Period Status */
+typedef struct {
+    uint8_t fast_period_divisor;            /*!< Divider for the Publish Period */
+} esp_ble_mesh_health_period_status_cb_t;
+
+/** Parameter of Health Attention Status */
+typedef struct {
+    uint8_t attention;                      /*!< Value of the Attention Timer state */
+} esp_ble_mesh_health_attention_status_cb_t;
+
+/**
+ * @brief Health Client Model received message union
+ */
+typedef union {
+    esp_ble_mesh_health_current_status_cb_t   current_status;       /*!< The health current status value */
+    esp_ble_mesh_health_fault_status_cb_t     fault_status;         /*!< The health fault status value */
+    esp_ble_mesh_health_period_status_cb_t    period_status;        /*!< The health period status value */
+    esp_ble_mesh_health_attention_status_cb_t attention_status;     /*!< The health attention status value */
+} esp_ble_mesh_health_client_common_cb_param_t;
+
+/** Health Client Model callback parameters */
+typedef struct {
+    int error_code;                                         /*!< Appropriate error code */
+    esp_ble_mesh_client_common_param_t          *params;    /*!< The client common parameters. */
+    esp_ble_mesh_health_client_common_cb_param_t status_cb; /*!< The health message status callback values */
+} esp_ble_mesh_health_client_cb_param_t;
+
+/** This enum value is the event of Health Client Model */
+typedef enum {
+    ESP_BLE_MESH_HEALTH_CLIENT_GET_STATE_EVT,
+    ESP_BLE_MESH_HEALTH_CLIENT_SET_STATE_EVT,
+    ESP_BLE_MESH_HEALTH_CLIENT_PUBLISH_EVT,
+    ESP_BLE_MESH_HEALTH_CLIENT_TIMEOUT_EVT,
+    ESP_BLE_MESH_HEALTH_CLIENT_EVT_MAX,
+} esp_ble_mesh_health_client_cb_event_t;
+
+/** Parameter of publishing Health Current Status completion event */
+typedef struct {
+    int error_code;                 /*!< The result of publishing Health Current Status */
+    esp_ble_mesh_elem_t *element;   /*!< Pointer to the element which contains the Health Server Model */
+} esp_ble_mesh_health_fault_update_comp_cb_t;
+
+/** Parameters of Health Fault Clear event */
+typedef struct {
+    esp_ble_mesh_model_t *model;    /*!< Pointer to the Health Server Model */
+    uint16_t company_id;            /*!< Bluetooth assigned 16-bit Company ID */
+} esp_ble_mesh_health_fault_clear_cb_t;
+
+/** Parameters of Health Fault Test event */
+typedef struct {
+    esp_ble_mesh_model_t *model;    /*!< Pointer to the Health Server Model */
+    uint8_t  test_id;               /*!< ID of a specific test to be performed */
+    uint16_t company_id;            /*!< Bluetooth assigned 16-bit Company ID */
+} esp_ble_mesh_health_fault_test_cb_t;
+
+/** Parameter of Health Attention On event */
+typedef struct {
+    esp_ble_mesh_model_t *model;    /*!< Pointer to the Health Server Model */
+    uint8_t time;                   /*!< Duration of attention timer on (in seconds) */
+} esp_ble_mesh_health_attention_on_cb_t;
+
+/** Parameter of Health Attention Off event */
+typedef struct {
+    esp_ble_mesh_model_t *model;    /*!< Pointer to the Health Server Model */
+} esp_ble_mesh_health_attention_off_cb_t;
+
+/**
+ * @brief Health Server Model callback parameters union
+ */
+typedef union {
+    esp_ble_mesh_health_fault_update_comp_cb_t  fault_update_comp;  /*!< ESP_BLE_MESH_HEALTH_SERVER_FAULT_UPDATE_COMP_EVT */
+    esp_ble_mesh_health_fault_clear_cb_t        fault_clear;        /*!< ESP_BLE_MESH_HEALTH_SERVER_FAULT_CLEAR_EVT */
+    esp_ble_mesh_health_fault_test_cb_t         fault_test;         /*!< ESP_BLE_MESH_HEALTH_SERVER_FAULT_TEST_EVT */
+    esp_ble_mesh_health_attention_on_cb_t       attention_on;       /*!< ESP_BLE_MESH_HEALTH_SERVER_ATTENTION_ON_EVT */
+    esp_ble_mesh_health_attention_off_cb_t      attention_off;      /*!< ESP_BLE_MESH_HEALTH_SERVER_ATTENTION_OFF_EVT */
+} esp_ble_mesh_health_server_cb_param_t;
+
+/** This enum value is the event of Health Server Model */
+typedef enum {
+    ESP_BLE_MESH_HEALTH_SERVER_FAULT_UPDATE_COMP_EVT,
+    ESP_BLE_MESH_HEALTH_SERVER_FAULT_CLEAR_EVT,
+    ESP_BLE_MESH_HEALTH_SERVER_FAULT_TEST_EVT,
+    ESP_BLE_MESH_HEALTH_SERVER_ATTENTION_ON_EVT,
+    ESP_BLE_MESH_HEALTH_SERVER_ATTENTION_OFF_EVT,
+    ESP_BLE_MESH_HEALTH_SERVER_EVT_MAX,
+} esp_ble_mesh_health_server_cb_event_t;
+
+/**
+ *  @brief Bluetooth Mesh Health Client and Server Model function.
+ */
+
+/**
+ * @brief   Health Client Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_health_client_cb_t)(esp_ble_mesh_health_client_cb_event_t event,
+                                                 esp_ble_mesh_health_client_cb_param_t *param);
+
+/**
+ * @brief   Health Server Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_health_server_cb_t)(esp_ble_mesh_health_server_cb_event_t event,
+                                                 esp_ble_mesh_health_server_cb_param_t *param);
+
+/**
+ * @brief         Register BLE Mesh Health Model callback, the callback will report Health Client & Server Model events.
+ *
+ * @param[in]     callback: Pointer to the callback function.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_health_client_callback(esp_ble_mesh_health_client_cb_t callback);
+
+/**
+ * @brief         Register BLE Mesh Health Server Model callback.
+ *
+ * @param[in]     callback: Pointer to the callback function.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_health_server_callback(esp_ble_mesh_health_server_cb_t callback);
+
+/**
+ * @brief         This function is called to get the Health Server states using the Health Client Model get messages.
+ *
+ * @note          If you want to find the opcodes and corresponding meanings accepted by this API,
+ *                please refer to esp_ble_mesh_opcode_health_client_get_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]     params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]     get_state: Pointer to a union, each kind of opcode corresponds to one structure inside.
+ *                           Shall not be set to NULL.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_health_client_get_state(esp_ble_mesh_client_common_param_t *params,
+                                               esp_ble_mesh_health_client_get_state_t *get_state);
+
+/**
+ * @brief         This function is called to set the Health Server states using the Health Client Model set messages.
+ *
+ * @note          If you want to find the opcodes and corresponding meanings accepted by this API,
+ *                please refer to esp_ble_mesh_opcode_health_client_set_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]     params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]     set_state: Pointer to a union, each kind of opcode corresponds to one structure inside.
+ *                           Shall not be set to NULL.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_health_client_set_state(esp_ble_mesh_client_common_param_t *params,
+                                               esp_ble_mesh_health_client_set_state_t *set_state);
+
+/**
+ * @brief         This function is called by the Health Server Model to update the context of its Health Current status.
+ *
+ * @param[in]     element: The element to which the Health Server Model belongs.
+ *
+ * @return        ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_health_server_fault_update(esp_ble_mesh_elem_t *element);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_HEALTH_MODEL_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_lighting_model_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_lighting_model_api.h
new file mode 100644
index 00000000000..48f45f5e4f2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_lighting_model_api.h
@@ -0,0 +1,1674 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/** @file
+ *  @brief Bluetooth Mesh Light Client Model APIs.
+ */
+
+#ifndef _ESP_BLE_MESH_LIGHTING_MODEL_API_H_
+#define _ESP_BLE_MESH_LIGHTING_MODEL_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_LIGHTNESS_CLI
+ *
+ *  @brief  Define a new Light Lightness Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Light Lightness Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Light Lightness Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_LIGHTNESS_CLI(cli_pub, cli_data)           \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_LIGHTNESS_CLI,   \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_CTL_CLI
+ *
+ *  @brief  Define a new Light CTL Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Light CTL Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Light CTL Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_CTL_CLI(cli_pub, cli_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_CTL_CLI,     \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_HSL_CLI
+ *
+ *  @brief  Define a new Light HSL Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Light HSL Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Light HSL Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_HSL_CLI(cli_pub, cli_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_HSL_CLI,     \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_XYL_CLI
+ *
+ *  @brief  Define a new Light xyL Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Light xyL Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Light xyL Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_XYL_CLI(cli_pub, cli_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_XYL_CLI,     \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_LC_CLI
+ *
+ *  @brief  Define a new Light LC Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Light LC Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Light LC Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_LC_CLI(cli_pub, cli_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_LC_CLI,     \
+                    NULL, cli_pub, cli_data)
+
+/**
+ *  @brief Bluetooth Mesh Light Lightness Client Model Get and Set parameters structure.
+ */
+
+/** Parameters of Light Lightness Set */
+typedef struct {
+    bool     op_en;        /*!< Indicate if optional parameters are included */
+    uint16_t lightness;    /*!< Target value of light lightness actual state */
+    uint8_t  tid;          /*!< Transaction ID */
+    uint8_t  trans_time;   /*!< Time to complete state transition (optional) */
+    uint8_t  delay;        /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_light_lightness_set_t;
+
+/** Parameters of Light Lightness Linear Set */
+typedef struct {
+    bool     op_en;        /*!< Indicate if optional parameters are included */
+    uint16_t lightness;    /*!< Target value of light lightness linear state */
+    uint8_t  tid;          /*!< Transaction ID */
+    uint8_t  trans_time;   /*!< Time to complete state transition (optional) */
+    uint8_t  delay;        /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_light_lightness_linear_set_t;
+
+/** Parameter of Light Lightness Default Set */
+typedef struct {
+    uint16_t lightness;    /*!< The value of the Light Lightness Default state */
+} esp_ble_mesh_light_lightness_default_set_t;
+
+/** Parameters of Light Lightness Range Set */
+typedef struct {
+    uint16_t range_min;    /*!< Value of range min field of light lightness range state */
+    uint16_t range_max;    /*!< Value of range max field of light lightness range state */
+} esp_ble_mesh_light_lightness_range_set_t;
+
+/** Parameters of Light CTL Set */
+typedef struct {
+    bool     op_en;            /*!< Indicate if optional parameters are included */
+    uint16_t ctl_lightness;    /*!< Target value of light ctl lightness state */
+    uint16_t ctl_temperatrue;  /*!< Target value of light ctl temperature state */
+    int16_t  ctl_delta_uv;     /*!< Target value of light ctl delta UV state */
+    uint8_t  tid;              /*!< Transaction ID */
+    uint8_t  trans_time;       /*!< Time to complete state transition (optional) */
+    uint8_t  delay;            /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_light_ctl_set_t;
+
+/** Parameters of Light CTL Temperature Set */
+typedef struct {
+    bool     op_en;            /*!< Indicate if optional parameters are included */
+    uint16_t ctl_temperatrue;  /*!< Target value of light ctl temperature state */
+    int16_t  ctl_delta_uv;     /*!< Target value of light ctl delta UV state */
+    uint8_t  tid;              /*!< Transaction ID */
+    uint8_t  trans_time;       /*!< Time to complete state transition (optional) */
+    uint8_t  delay;            /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_light_ctl_temperature_set_t;
+
+/** Parameters of Light CTL Temperature Range Set */
+typedef struct {
+    uint16_t range_min;        /*!< Value of temperature range min field of light ctl temperature range state */
+    uint16_t range_max;        /*!< Value of temperature range max field of light ctl temperature range state */
+} esp_ble_mesh_light_ctl_temperature_range_set_t;
+
+/** Parameters of Light CTL Default Set */
+typedef struct {
+    uint16_t lightness;        /*!< Value of light lightness default state */
+    uint16_t temperature;      /*!< Value of light temperature default state */
+    int16_t  delta_uv;         /*!< Value of light delta UV default state */
+} esp_ble_mesh_light_ctl_default_set_t;
+
+/** Parameters of Light HSL Set */
+typedef struct {
+    bool     op_en;            /*!< Indicate if optional parameters are included */
+    uint16_t hsl_lightness;    /*!< Target value of light hsl lightness state */
+    uint16_t hsl_hue;          /*!< Target value of light hsl hue state */
+    uint16_t hsl_saturation;   /*!< Target value of light hsl saturation state */
+    uint8_t  tid;              /*!< Transaction ID */
+    uint8_t  trans_time;       /*!< Time to complete state transition (optional) */
+    uint8_t  delay;            /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_light_hsl_set_t;
+
+/** Parameters of Light HSL Hue Set */
+typedef struct {
+    bool     op_en;            /*!< Indicate if optional parameters are included */
+    uint16_t hue;              /*!< Target value of light hsl hue state */
+    uint8_t  tid;              /*!< Transaction ID */
+    uint8_t  trans_time;       /*!< Time to complete state transition (optional) */
+    uint8_t  delay;            /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_light_hsl_hue_set_t;
+
+/** Parameters of Light HSL Saturation Set */
+typedef struct {
+    bool     op_en;            /*!< Indicate if optional parameters are included */
+    uint16_t saturation;       /*!< Target value of light hsl hue state */
+    uint8_t  tid;              /*!< Transaction ID */
+    uint8_t  trans_time;       /*!< Time to complete state transition (optional) */
+    uint8_t  delay;            /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_light_hsl_saturation_set_t;
+
+/** Parameters of Light HSL Default Set */
+typedef struct {
+    uint16_t lightness;        /*!< Value of light lightness default state */
+    uint16_t hue;              /*!< Value of light hue default state */
+    uint16_t saturation;       /*!< Value of light saturation default state */
+} esp_ble_mesh_light_hsl_default_set_t;
+
+/** Parameters of Light HSL Range Set */
+typedef struct {
+    uint16_t hue_range_min;        /*!< Value of hue range min field of light hsl hue range state */
+    uint16_t hue_range_max;        /*!< Value of hue range max field of light hsl hue range state */
+    uint16_t saturation_range_min; /*!< Value of saturation range min field of light hsl saturation range state */
+    uint16_t saturation_range_max; /*!< Value of saturation range max field of light hsl saturation range state */
+} esp_ble_mesh_light_hsl_range_set_t;
+
+/** Parameters of Light xyL Set */
+typedef struct {
+    bool     op_en;            /*!< Indicate whether optional parameters included */
+    uint16_t xyl_lightness;    /*!< The target value of the Light xyL Lightness state */
+    uint16_t xyl_x;            /*!< The target value of the Light xyL x state */
+    uint16_t xyl_y;            /*!< The target value of the Light xyL y state */
+    uint8_t  tid;              /*!< Transaction Identifier */
+    uint8_t  trans_time;       /*!< Time to complete state transition (optional) */
+    uint8_t  delay;            /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_light_xyl_set_t;
+
+/** Parameters of Light xyL Default Set */
+typedef struct {
+    uint16_t lightness;        /*!< The value of the Light Lightness Default state */
+    uint16_t xyl_x;            /*!< The value of the Light xyL x Default state */
+    uint16_t xyl_y;            /*!< The value of the Light xyL y Default state */
+} esp_ble_mesh_light_xyl_default_set_t;
+
+/** Parameters of Light xyL Range Set */
+typedef struct {
+    uint16_t xyl_x_range_min;  /*!< The value of the xyL x Range Min field of the Light xyL x Range state */
+    uint16_t xyl_x_range_max;  /*!< The value of the xyL x Range Max field of the Light xyL x Range state */
+    uint16_t xyl_y_range_min;  /*!< The value of the xyL y Range Min field of the Light xyL y Range state */
+    uint16_t xyl_y_range_max;  /*!< The value of the xyL y Range Max field of the Light xyL y Range state */
+} esp_ble_mesh_light_xyl_range_set_t;
+
+/** Parameter of Light LC Mode Set */
+typedef struct {
+    uint8_t mode;              /*!< The target value of the Light LC Mode state */
+} esp_ble_mesh_light_lc_mode_set_t;
+
+/** Parameter of Light LC OM Set */
+typedef struct {
+    uint8_t mode;              /*!< The target value of the Light LC Occupancy Mode state */
+} esp_ble_mesh_light_lc_om_set_t;
+
+/** Parameters of Light LC Light OnOff Set */
+typedef struct {
+    bool    op_en;             /*!< Indicate whether optional parameters included */
+    uint8_t light_onoff;       /*!< The target value of the Light LC Light OnOff state */
+    uint8_t tid;               /*!< Transaction Identifier */
+    uint8_t trans_time;        /*!< Time to complete state transition (optional) */
+    uint8_t delay;             /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_light_lc_light_onoff_set_t;
+
+/** Parameter of Light LC Property Get */
+typedef struct {
+    uint16_t property_id;      /*!< Property ID identifying a Light LC Property */
+} esp_ble_mesh_light_lc_property_get_t;
+
+/** Parameters of Light LC Property Set */
+typedef struct {
+    uint16_t property_id;      /*!< Property ID identifying a Light LC Property */
+    struct net_buf_simple *property_value;  /*!< Raw value for the Light LC Property */
+} esp_ble_mesh_light_lc_property_set_t;
+
+/**
+ * @brief Lighting Client Model get message union
+ */
+typedef union {
+    esp_ble_mesh_light_lc_property_get_t           lc_property_get;             /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_GET */
+} esp_ble_mesh_light_client_get_state_t;
+
+/**
+ * @brief Lighting Client Model set message union
+ */
+typedef union {
+    esp_ble_mesh_light_lightness_set_t             lightness_set;               /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_SET_UNACK */
+    esp_ble_mesh_light_lightness_linear_set_t      lightness_linear_set;        /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LINEAR_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LINEAR_SET_UNACK */
+    esp_ble_mesh_light_lightness_default_set_t     lightness_default_set;       /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_DEFAULT_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_DEFAULT_SET_UNACK */
+    esp_ble_mesh_light_lightness_range_set_t       lightness_range_set;         /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_RANGE_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_RANGE_SET_UNACK */
+    esp_ble_mesh_light_ctl_set_t                   ctl_set;                     /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_SET_UNACK */
+    esp_ble_mesh_light_ctl_temperature_set_t       ctl_temperature_set;         /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_SET_UNACK */
+    esp_ble_mesh_light_ctl_temperature_range_set_t ctl_temperature_range_set;   /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_RANGE_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_RANGE_SET_UNACK */
+    esp_ble_mesh_light_ctl_default_set_t           ctl_default_set;             /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_DEFAULT_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_DEFAULT_SET_UNACK */
+    esp_ble_mesh_light_hsl_set_t                   hsl_set;                     /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_SET_UNACK */
+    esp_ble_mesh_light_hsl_hue_set_t               hsl_hue_set;                 /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_HUE_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_HUE_SET_UNACK */
+    esp_ble_mesh_light_hsl_saturation_set_t        hsl_saturation_set;          /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_SATURATION_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_SATURATION_SET_UNACK */
+    esp_ble_mesh_light_hsl_default_set_t           hsl_default_set;             /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_DEFAULT_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_DEFAULT_SET_UNACK */
+    esp_ble_mesh_light_hsl_range_set_t             hsl_range_set;               /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_RANGE_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_RANGE_SET_UNACK */
+    esp_ble_mesh_light_xyl_set_t                   xyl_set;                     /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_SET_UNACK */
+    esp_ble_mesh_light_xyl_default_set_t           xyl_default_set;             /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_DEFAULT_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_DEFAULT_SET_UNACK */
+    esp_ble_mesh_light_xyl_range_set_t             xyl_range_set;               /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_RANGE_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_RANGE_SET_UNACK */
+    esp_ble_mesh_light_lc_mode_set_t               lc_mode_set;                 /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LC_MODE_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_LC_MODE_SET_UNACK */
+    esp_ble_mesh_light_lc_om_set_t                 lc_om_set;                   /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LC_OM_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_LC_OM_SET_UNACK */
+    esp_ble_mesh_light_lc_light_onoff_set_t        lc_light_onoff_set;          /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LC_LIGHT_ONOFF_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_LC_LIGHT_ONOFF_SET_UNACK */
+    esp_ble_mesh_light_lc_property_set_t           lc_property_set;             /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_SET & ESP_BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_SET_UNACK */
+} esp_ble_mesh_light_client_set_state_t;
+
+/**
+ *  @brief Bluetooth Mesh Light Lightness Client Model Get and Set callback parameters structure.
+ */
+
+/** Parameters of Light Lightness Status */
+typedef struct {
+    bool     op_en;                /*!< Indicate if optional parameters are included */
+    uint16_t present_lightness;    /*!< Current value of light lightness actual state */
+    uint16_t target_lightness;     /*!< Target value of light lightness actual state (optional) */
+    uint8_t  remain_time;          /*!< Time to complete state transition (C.1) */
+} esp_ble_mesh_light_lightness_status_cb_t;
+
+/** Parameters of Light Lightness Linear Status */
+typedef struct {
+    bool     op_en;                /*!< Indicate if optional parameters are included */
+    uint16_t present_lightness;    /*!< Current value of light lightness linear state */
+    uint16_t target_lightness;     /*!< Target value of light lightness linear state (optional) */
+    uint8_t  remain_time;          /*!< Time to complete state transition (C.1) */
+} esp_ble_mesh_light_lightness_linear_status_cb_t;
+
+/** Parameter of Light Lightness Last Status */
+typedef struct {
+    uint16_t lightness;            /*!< The value of the Light Lightness Last state */
+} esp_ble_mesh_light_lightness_last_status_cb_t;
+
+/** Parameter of Light Lightness Default Status */
+typedef struct {
+    uint16_t lightness;            /*!< The value of the Light Lightness default State */
+} esp_ble_mesh_light_lightness_default_status_cb_t;
+
+/** Parameters of Light Lightness Range Status */
+typedef struct {
+    uint8_t  status_code;          /*!< Status Code for the request message */
+    uint16_t range_min;            /*!< Value of range min field of light lightness range state */
+    uint16_t range_max;            /*!< Value of range max field of light lightness range state */
+} esp_ble_mesh_light_lightness_range_status_cb_t;
+
+/** Parameters of Light CTL Status */
+typedef struct {
+    bool     op_en;                    /*!< Indicate if optional parameters are included */
+    uint16_t present_ctl_lightness;    /*!< Current value of light ctl lightness state */
+    uint16_t present_ctl_temperature;  /*!< Current value of light ctl temperature state */
+    uint16_t target_ctl_lightness;     /*!< Target value of light ctl lightness state (optional) */
+    uint16_t target_ctl_temperature;   /*!< Target value of light ctl temperature state (C.1) */
+    uint8_t  remain_time;              /*!< Time to complete state transition (C.1) */
+} esp_ble_mesh_light_ctl_status_cb_t;
+
+/** Parameters of Light CTL Temperature Status */
+typedef struct {
+    bool     op_en;                    /*!< Indicate if optional parameters are included */
+    uint16_t present_ctl_temperature;  /*!< Current value of light ctl temperature state */
+    uint16_t present_ctl_delta_uv;     /*!< Current value of light ctl delta UV state */
+    uint16_t target_ctl_temperature;   /*!< Target value of light ctl temperature state (optional) */
+    uint16_t target_ctl_delta_uv;      /*!< Target value of light ctl delta UV state (C.1) */
+    uint8_t  remain_time;              /*!< Time to complete state transition (C.1) */
+} esp_ble_mesh_light_ctl_temperature_status_cb_t;
+
+/** Parameters of Light CTL Temperature Range Status */
+typedef struct {
+    uint8_t  status_code;      /*!< Status code for the request message */
+    uint16_t range_min;        /*!< Value of temperature range min field of light ctl temperature range state */
+    uint16_t range_max;        /*!< Value of temperature range max field of light ctl temperature range state */
+} esp_ble_mesh_light_ctl_temperature_range_status_cb_t;
+
+/** Parameters of Light CTL Default Status */
+typedef struct {
+    uint16_t lightness;        /*!< Value of light lightness default state */
+    uint16_t temperature;      /*!< Value of light temperature default state */
+    int16_t  delta_uv;         /*!< Value of light delta UV default state */
+} esp_ble_mesh_light_ctl_default_status_cb_t;
+
+/** Parameters of Light HSL Status */
+typedef struct {
+    bool     op_en;            /*!< Indicate if optional parameters are included */
+    uint16_t hsl_lightness;    /*!< Current value of light hsl lightness state */
+    uint16_t hsl_hue;          /*!< Current value of light hsl hue state */
+    uint16_t hsl_saturation;   /*!< Current value of light hsl saturation state */
+    uint8_t  remain_time;      /*!< Time to complete state transition (optional) */
+} esp_ble_mesh_light_hsl_status_cb_t;
+
+/** Parameters of Light HSL Target Status */
+typedef struct {
+    bool  op_en;                    /*!< Indicate if optional parameters are included */
+    uint16_t hsl_lightness_target;     /*!< Target value of light hsl lightness state */
+    uint16_t hsl_hue_target;           /*!< Target value of light hsl hue state */
+    uint16_t hsl_saturation_target;    /*!< Target value of light hsl saturation state */
+    uint8_t  remain_time;              /*!< Time to complete state transition (optional) */
+} esp_ble_mesh_light_hsl_target_status_cb_t;
+
+/** Parameters of Light HSL Hue Status */
+typedef struct {
+    bool     op_en;        /*!< Indicate if optional parameters are included */
+    uint16_t present_hue;  /*!< Current value of light hsl hue state */
+    uint16_t target_hue;   /*!< Target value of light hsl hue state (optional) */
+    uint8_t  remain_time;  /*!< Time to complete state transition (C.1) */
+} esp_ble_mesh_light_hsl_hue_status_cb_t;
+
+/** Parameters of Light HSL Saturation Status */
+typedef struct {
+    bool     op_en;                /*!< Indicate if optional parameters are included */
+    uint16_t present_saturation;   /*!< Current value of light hsl saturation state */
+    uint16_t target_saturation;    /*!< Target value of light hsl saturation state (optional) */
+    uint8_t  remain_time;          /*!< Time to complete state transition (C.1) */
+} esp_ble_mesh_light_hsl_saturation_status_cb_t;
+
+/** Parameters of Light HSL Default Status */
+typedef struct {
+    uint16_t lightness;    /*!< Value of light lightness default state */
+    uint16_t hue;          /*!< Value of light hue default state */
+    uint16_t saturation;   /*!< Value of light saturation default state */
+} esp_ble_mesh_light_hsl_default_status_cb_t;
+
+/** Parameters of Light HSL Range Status */
+typedef struct {
+    uint8_t  status_code;          /*!< Status code for the request message */
+    uint16_t hue_range_min;        /*!< Value of hue range min field of light hsl hue range state */
+    uint16_t hue_range_max;        /*!< Value of hue range max field of light hsl hue range state */
+    uint16_t saturation_range_min; /*!< Value of saturation range min field of light hsl saturation range state */
+    uint16_t saturation_range_max; /*!< Value of saturation range max field of light hsl saturation range state */
+} esp_ble_mesh_light_hsl_range_status_cb_t;
+
+/** Parameters of Light xyL Status */
+typedef struct {
+    bool     op_en;                /*!< Indicate whether optional parameters included */
+    uint16_t xyl_lightness;        /*!< The present value of the Light xyL Lightness state */
+    uint16_t xyl_x;                /*!< The present value of the Light xyL x state */
+    uint16_t xyl_y;                /*!< The present value of the Light xyL y state */
+    uint8_t  remain_time;          /*!< Time to complete state transition (optional) */
+} esp_ble_mesh_light_xyl_status_cb_t;
+
+/** Parameters of Light xyL Target Status */
+typedef struct {
+    bool     op_en;                /*!< Indicate whether optional parameters included */
+    uint16_t target_xyl_lightness; /*!< The target value of the Light xyL Lightness state */
+    uint16_t target_xyl_x;         /*!< The target value of the Light xyL x state */
+    uint16_t target_xyl_y;         /*!< The target value of the Light xyL y state */
+    uint8_t  remain_time;          /*!< Time to complete state transition (optional) */
+} esp_ble_mesh_light_xyl_target_status_cb_t;
+
+/** Parameters of Light xyL Default Status */
+typedef struct {
+    uint16_t lightness;        /*!< The value of the Light Lightness Default state */
+    uint16_t xyl_x;            /*!< The value of the Light xyL x Default state */
+    uint16_t xyl_y;            /*!< The value of the Light xyL y Default state */
+} esp_ble_mesh_light_xyl_default_status_cb_t;
+
+/** Parameters of Light xyL Range Status */
+typedef struct {
+    uint8_t  status_code;      /*!< Status Code for the requesting message */
+    uint16_t xyl_x_range_min;  /*!< The value of the xyL x Range Min field of the Light xyL x Range state */
+    uint16_t xyl_x_range_max;  /*!< The value of the xyL x Range Max field of the Light xyL x Range state */
+    uint16_t xyl_y_range_min;  /*!< The value of the xyL y Range Min field of the Light xyL y Range state */
+    uint16_t xyl_y_range_max;  /*!< The value of the xyL y Range Max field of the Light xyL y Range state */
+} esp_ble_mesh_light_xyl_range_status_cb_t;
+
+/** Parameter of Light LC Mode Status */
+typedef struct {
+    uint8_t mode;              /*!< The present value of the Light LC Mode state */
+} esp_ble_mesh_light_lc_mode_status_cb_t;
+
+/** Parameter of Light LC OM Status */
+typedef struct {
+    uint8_t mode;              /*!< The present value of the Light LC Occupancy Mode state */
+} esp_ble_mesh_light_lc_om_status_cb_t;
+
+/** Parameters of Light LC Light OnOff Status */
+typedef struct {
+    bool    op_en;                 /*!< Indicate whether optional parameters included */
+    uint8_t present_light_onoff;   /*!< The present value of the Light LC Light OnOff state */
+    uint8_t target_light_onoff;    /*!< The target value of the Light LC Light OnOff state (Optional) */
+    uint8_t remain_time;           /*!< Time to complete state transition (C.1) */
+} esp_ble_mesh_light_lc_light_onoff_status_cb_t;
+
+/** Parameters of Light LC Property Status */
+typedef struct {
+    uint16_t property_id;      /*!< Property ID identifying a Light LC Property */
+    struct net_buf_simple *property_value;  /*!< Raw value for the Light LC Property */
+} esp_ble_mesh_light_lc_property_status_cb_t;
+
+/**
+ * @brief Lighting Client Model received message union
+ */
+typedef union {
+    esp_ble_mesh_light_lightness_status_cb_t             lightness_status;             /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_STATUS */
+    esp_ble_mesh_light_lightness_linear_status_cb_t      lightness_linear_status;      /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LINEAR_STATUS */
+    esp_ble_mesh_light_lightness_last_status_cb_t        lightness_last_status;        /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LAST_STATUS */
+    esp_ble_mesh_light_lightness_default_status_cb_t     lightness_default_status;     /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_DEFAULT_STATUS */
+    esp_ble_mesh_light_lightness_range_status_cb_t       lightness_range_status;       /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_RANGE_STATUS */
+    esp_ble_mesh_light_ctl_status_cb_t                   ctl_status;                   /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_STATUS */
+    esp_ble_mesh_light_ctl_temperature_status_cb_t       ctl_temperature_status;       /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_STATUS */
+    esp_ble_mesh_light_ctl_temperature_range_status_cb_t ctl_temperature_range_status; /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_RANGE_STATUS */
+    esp_ble_mesh_light_ctl_default_status_cb_t           ctl_default_status;           /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_CTL_DEFAULT_STATUS */
+    esp_ble_mesh_light_hsl_status_cb_t                   hsl_status;                   /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_STATUS */
+    esp_ble_mesh_light_hsl_target_status_cb_t            hsl_target_status;            /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_TARGET_STATUS */
+    esp_ble_mesh_light_hsl_hue_status_cb_t               hsl_hue_status;               /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_HUE_STATUS */
+    esp_ble_mesh_light_hsl_saturation_status_cb_t        hsl_saturation_status;        /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_SATURATION_STATUS */
+    esp_ble_mesh_light_hsl_default_status_cb_t           hsl_default_status;           /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_DEFAULT_STATUS */
+    esp_ble_mesh_light_hsl_range_status_cb_t             hsl_range_status;             /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_HSL_RANGE_STATUS */
+    esp_ble_mesh_light_xyl_status_cb_t                   xyl_status;                   /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_STATUS */
+    esp_ble_mesh_light_xyl_target_status_cb_t            xyl_target_status;            /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_TARGET_STATUS */
+    esp_ble_mesh_light_xyl_default_status_cb_t           xyl_default_status;           /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_DEFAULT_STATUS */
+    esp_ble_mesh_light_xyl_range_status_cb_t             xyl_range_status;             /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_XYL_RANGE_STATUS */
+    esp_ble_mesh_light_lc_mode_status_cb_t               lc_mode_status;               /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LC_MODE_STATUS */
+    esp_ble_mesh_light_lc_om_status_cb_t                 lc_om_status;                 /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LC_OM_STATUS */
+    esp_ble_mesh_light_lc_light_onoff_status_cb_t        lc_light_onoff_status;        /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LC_LIGHT_ONOFF_STATUS */
+    esp_ble_mesh_light_lc_property_status_cb_t           lc_property_status;           /*!< For ESP_BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_STATUS */
+} esp_ble_mesh_light_client_status_cb_t;
+
+/** Lighting Client Model callback parameters */
+typedef struct {
+    int error_code;                                     /*!< Appropriate error code */
+    esp_ble_mesh_client_common_param_t   *params;       /*!< The client common parameters. */
+    esp_ble_mesh_light_client_status_cb_t status_cb;    /*!< The light status message callback values */
+} esp_ble_mesh_light_client_cb_param_t;
+
+/** This enum value is the event of Lighting Client Model */
+typedef enum {
+    ESP_BLE_MESH_LIGHT_CLIENT_GET_STATE_EVT,
+    ESP_BLE_MESH_LIGHT_CLIENT_SET_STATE_EVT,
+    ESP_BLE_MESH_LIGHT_CLIENT_PUBLISH_EVT,
+    ESP_BLE_MESH_LIGHT_CLIENT_TIMEOUT_EVT,
+    ESP_BLE_MESH_LIGHT_CLIENT_EVT_MAX,
+} esp_ble_mesh_light_client_cb_event_t;
+
+/**
+ *  @brief Bluetooth Mesh Light Client Model function.
+ */
+
+/**
+ * @brief   Lighting Client Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_light_client_cb_t)(esp_ble_mesh_light_client_cb_event_t event,
+                                                esp_ble_mesh_light_client_cb_param_t *param);
+
+/**
+ * @brief       Register BLE Mesh Light Client Model callback.
+ *
+ * @param[in]   callback: pointer to the callback function.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_light_client_callback(esp_ble_mesh_light_client_cb_t callback);
+
+/**
+ * @brief       Get the value of Light Server Model states using the Light Client Model get messages.
+ *
+ * @note        If you want to know the opcodes and corresponding meanings accepted by this API,
+ *              please refer to esp_ble_mesh_light_message_opcode_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]   params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]   get_state: Pointer of light get message value.
+ *                         Shall not be set to NULL.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_light_client_get_state(esp_ble_mesh_client_common_param_t *params,
+                                              esp_ble_mesh_light_client_get_state_t *get_state);
+
+/**
+ * @brief       Set the value of Light Server Model states using the Light Client Model set messages.
+ *
+ * @note        If you want to know the opcodes and corresponding meanings accepted by this API,
+ *              please refer to esp_ble_mesh_light_message_opcode_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]   params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]   set_state: Pointer of light set message value.
+ *                         Shall not be set to NULL.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_light_client_set_state(esp_ble_mesh_client_common_param_t *params,
+                                              esp_ble_mesh_light_client_set_state_t *set_state);
+
+/**
+ * @brief Lighting Server Models related context.
+ */
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_LIGHTNESS_SRV
+ *
+ *  @brief  Define a new Light Lightness Server Model.
+ *
+ *  @note   1. The Light Lightness Server model extends the Generic Power OnOff
+ *             Server model and the Generic Level Server model. When this model
+ *             is present on an Element, the corresponding Light Lightness Setup
+ *             Server model shall also be present.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_lightness_srv_t.
+ *
+ *  @return New Light Lightness Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_LIGHTNESS_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_LIGHTNESS_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_LIGHTNESS_SETUP_SRV
+ *
+ *  @brief  Define a new Light Lightness Setup Server Model.
+ *
+ *  @note   1. The Light Lightness Setup Server model extends the Light Lightness
+ *             Server model and the Generic Power OnOff Setup Server model.
+ *          2. This model shall support model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_lightness_setup_srv_t.
+ *
+ *  @return New Light Lightness Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_LIGHTNESS_SETUP_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_LIGHTNESS_SETUP_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_CTL_SRV
+ *
+ *  @brief  Define a new Light CTL Server Model.
+ *
+ *  @note   1. The Light CTL Server model extends the Light Lightness Server model.
+ *             When this model is present on an Element, the corresponding Light
+ *             CTL Temperature Server model and the corresponding Light CTL Setup
+ *             Server model shall also be present.
+ *          2. This model shall support model publication and model subscription.
+ *          3. The model requires two elements: the main element and the Temperature
+ *             element. The Temperature element contains the corresponding Light CTL
+ *             Temperature Server model and an instance of a Generic Level state
+ *             bound to the Light CTL Temperature state on the Temperature element.
+ *             The Light CTL Temperature state on the Temperature element is bound to
+ *             the Light CTL state on the main element.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_ctl_srv_t.
+ *
+ *  @return New Light CTL Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_CTL_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_CTL_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_CTL_SETUP_SRV
+ *
+ *  @brief  Define a new Light CTL Setup Server Model.
+ *
+ *  @note   1. The Light CTL Setup Server model extends the Light CTL Server and
+ *             the Light Lightness Setup Server.
+ *          2. This model shall support model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_ctl_setup_srv_t.
+ *
+ *  @return New Light CTL Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_CTL_SETUP_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_CTL_SETUP_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_CTL_TEMP_SRV
+ *
+ *  @brief  Define a new Light CTL Temperature Server Model.
+ *
+ *  @note   1. The Light CTL Temperature Server model extends the Generic Level
+ *             Server model.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_ctl_temp_srv_t.
+ *
+ *  @return New Light CTL Temperature Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_CTL_TEMP_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_CTL_TEMP_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_HSL_SRV
+ *
+ *  @brief  Define a new Light HSL Server Model.
+ *
+ *  @note   1. The Light HSL Server model extends the Light Lightness Server model. When
+ *             this model is present on an Element, the corresponding Light HSL Hue
+ *             Server model and the corresponding Light HSL Saturation Server model and
+ *             the corresponding Light HSL Setup Server model shall also be present.
+ *          2. This model shall support model publication and model subscription.
+ *          3. The model requires three elements: the main element and the Hue element
+ *             and the Saturation element. The Hue element contains the corresponding
+ *             Light HSL Hue Server model and an instance of a Generic Level state bound
+ *             to the Light HSL Hue state on the Hue element. The Saturation element
+ *             contains the corresponding Light HSL Saturation Server model and an
+ *             instance of a Generic Level state bound to the Light HSL Saturation state
+ *             on the Saturation element. The Light HSL Hue state on the Hue element is
+ *             bound to the Light HSL state on the main element and the Light HSL
+ *             Saturation state on the Saturation element is bound to the Light HSL state
+ *             on the main element.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_hsl_srv_t.
+ *
+ *  @return New Light HSL Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_HSL_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_HSL_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_HSL_SETUP_SRV
+ *
+ *  @brief  Define a new Light HSL Setup Server Model.
+ *
+ *  @note   1. The Light HSL Setup Server model extends the Light HSL Server and
+ *             the Light Lightness Setup Server.
+ *          2. This model shall support model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_hsl_setup_srv_t.
+ *
+ *  @return New Light HSL Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_HSL_SETUP_SRV(srv_pub, srv_data)           \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_HSL_SETUP_SRV,   \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_HSL_HUE_SRV
+ *
+ *  @brief  Define a new Light HSL Hue Server Model.
+ *
+ *  @note   1. The Light HSL Hue Server model extends the Generic Level Server model.
+ *             This model is associated with the Light HSL Server model.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_hsl_hue_srv_t.
+ *
+ *  @return New Light HSL Hue Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_HSL_HUE_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_HSL_HUE_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_HSL_SAT_SRV
+ *
+ *  @brief  Define a new Light HSL Saturation Server Model.
+ *
+ *  @note   1. The Light HSL Saturation Server model extends the Generic Level Server
+ *             model. This model is associated with the Light HSL Server model.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_hsl_sat_srv_t.
+ *
+ *  @return New Light HSL Saturation Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_HSL_SAT_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_HSL_SAT_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_XYL_SRV
+ *
+ *  @brief  Define a new Light xyL Server Model.
+ *
+ *  @note   1. The Light xyL Server model extends the Light Lightness Server model.
+ *             When this model is present on an Element, the corresponding Light xyL
+ *             Setup Server model shall also be present.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_xyl_srv_t.
+ *
+ *  @return New Light xyL Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_XYL_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_XYL_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_XYL_SETUP_SRV
+ *
+ *  @brief  Define a new Light xyL Setup Server Model.
+ *
+ *  @note   1. The Light xyL Setup Server model extends the Light xyL Server and
+ *             the Light Lightness Setup Server.
+ *          2. This model shall support model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_xyl_setup_srv_t.
+ *
+ *  @return New Light xyL Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_XYL_SETUP_SRV(srv_pub, srv_data)           \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_XYL_SETUP_SRV,   \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_LC_SRV
+ *
+ *  @brief  Define a new Light LC Server Model.
+ *
+ *  @note   1. The Light LC (Lightness Control) Server model extends the Light
+ *             Lightness Server model and the Generic OnOff Server model. When
+ *             this model is present on an Element, the corresponding Light LC
+ *             Setup Server model shall also be present.
+ *          2. This model shall support model publication and model subscription.
+ *          3. This model may be used to represent an element that is a client to
+ *             a Sensor Server model and controls the Light Lightness Actual state
+ *             via defined state bindings.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_lc_srv_t.
+ *
+ *  @return New Light LC Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_LC_SRV(srv_pub, srv_data)           \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_LC_SRV,   \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_LIGHT_LC_SETUP_SRV
+ *
+ *  @brief  Define a new Light LC Setup Server Model.
+ *
+ *  @note   1. The Light LC (Lightness Control) Setup model extends the Light LC
+ *             Server model.
+ *          2. This model shall support model publication and model subscription.
+ *          3. This model may be used to configure setup parameters for the Light
+ *             LC Server model.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_light_lc_setup_srv_t.
+ *
+ *  @return New Light LC Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_LIGHT_LC_SETUP_SRV(srv_pub, srv_data)           \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_LIGHT_LC_SETUP_SRV,   \
+                    NULL, srv_pub, srv_data)
+
+/** Parameters of Light Lightness state */
+typedef struct {
+    uint16_t lightness_linear;          /*!< The present value of Light Lightness Linear state */
+    uint16_t target_lightness_linear;   /*!< The target value of Light Lightness Linear state */
+
+    uint16_t lightness_actual;          /*!< The present value of Light Lightness Actual state */
+    uint16_t target_lightness_actual;   /*!< The target value of Light Lightness Actual state */
+
+    uint16_t lightness_last;            /*!< The value of Light Lightness Last state */
+    uint16_t lightness_default;         /*!< The value of Light Lightness Default state */
+
+    uint8_t  status_code;               /*!< The status code of setting Light Lightness Range state */
+    uint16_t lightness_range_min;       /*!< The minimum value of Light Lightness Range state */
+    uint16_t lightness_range_max;       /*!< The maximum value of Light Lightness Range state */
+} esp_ble_mesh_light_lightness_state_t;
+
+/** User data of Light Lightness Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                    /*!< Pointer to the Lighting Lightness Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;        /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_lightness_state_t *state;    /*!< Parameters of the Light Lightness state */
+    esp_ble_mesh_last_msg_info_t last;              /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t actual_transition;  /*!< Parameters of state transition */
+    esp_ble_mesh_state_transition_t linear_transition;  /*!< Parameters of state transition */
+    int32_t tt_delta_lightness_actual;      /*!< Delta change value of lightness actual state transition */
+    int32_t tt_delta_lightness_linear;      /*!< Delta change value of lightness linear state transition */
+} esp_ble_mesh_light_lightness_srv_t;
+
+/** User data of Light Lightness Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                    /*!< Pointer to the Lighting Lightness Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;        /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_lightness_state_t *state;    /*!< Parameters of the Light Lightness state */
+} esp_ble_mesh_light_lightness_setup_srv_t;
+
+/** Parameters of Light CTL state */
+typedef struct {
+    uint16_t lightness;             /*!< The present value of Light CTL Lightness state */
+    uint16_t target_lightness;      /*!< The target value of Light CTL Lightness state */
+
+    uint16_t temperature;           /*!< The present value of Light CTL Temperature state */
+    uint16_t target_temperature;    /*!< The target value of Light CTL Temperature state */
+
+    int16_t  delta_uv;              /*!< The present value of Light CTL Delta UV state */
+    int16_t  target_delta_uv;       /*!< The target value of Light CTL Delta UV state */
+
+    uint8_t  status_code;           /*!< The statue code of setting Light CTL Temperature Range state */
+    uint16_t temperature_range_min; /*!< The minimum value of Light CTL Temperature Range state */
+    uint16_t temperature_range_max; /*!< The maximum value of Light CTL Temperature Range state */
+
+    uint16_t lightness_default;     /*!< The value of Light Lightness Default state */
+    uint16_t temperature_default;   /*!< The value of Light CTL Temperature Default state */
+    int16_t  delta_uv_default;      /*!< The value of Light CTL Delta UV Default state */
+} esp_ble_mesh_light_ctl_state_t;
+
+/** User data of Light CTL Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Lighting CTL Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_ctl_state_t *state;      /*!< Parameters of the Light CTL state */
+    esp_ble_mesh_last_msg_info_t last;          /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t transition; /*!< Parameters of state transition */
+    int32_t tt_delta_lightness;     /*!< Delta change value of lightness state transition */
+    int32_t tt_delta_temperature;   /*!< Delta change value of temperature state transition */
+    int32_t tt_delta_delta_uv;      /*!< Delta change value of delta uv state transition */
+} esp_ble_mesh_light_ctl_srv_t;
+
+/** User data of Light CTL Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Lighting CTL Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_ctl_state_t *state;      /*!< Parameters of the Light CTL state */
+} esp_ble_mesh_light_ctl_setup_srv_t;
+
+/** User data of Light CTL Temperature Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Lighting CTL Temperature Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_ctl_state_t *state;      /*!< Parameters of the Light CTL state */
+    esp_ble_mesh_last_msg_info_t last;          /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t transition; /*!< Parameters of state transition */
+    int32_t tt_delta_temperature;   /*!< Delta change value of temperature state transition */
+    int32_t tt_delta_delta_uv;      /*!< Delta change value of delta uv state transition */
+} esp_ble_mesh_light_ctl_temp_srv_t;
+
+/** Parameters of Light HSL state */
+typedef struct {
+    uint16_t lightness;             /*!< The present value of Light HSL Lightness state */
+    uint16_t target_lightness;      /*!< The target value of Light HSL Lightness state */
+
+    uint16_t hue;                   /*!< The present value of Light HSL Hue state */
+    uint16_t target_hue;            /*!< The target value of Light HSL Hue state */
+
+    uint16_t saturation;            /*!< The present value of Light HSL Saturation state */
+    uint16_t target_saturation;     /*!< The target value of Light HSL Saturation state */
+
+    uint16_t lightness_default;     /*!< The value of Light Lightness Default state */
+    uint16_t hue_default;           /*!< The value of Light HSL Hue Default state */
+    uint16_t saturation_default;    /*!< The value of Light HSL Saturation Default state */
+
+    uint8_t  status_code;           /*!< The status code of setting Light HSL Hue & Saturation Range state */
+    uint16_t hue_range_min;         /*!< The minimum value of Light HSL Hue Range state */
+    uint16_t hue_range_max;         /*!< The maximum value of Light HSL Hue Range state */
+    uint16_t saturation_range_min;  /*!< The minimum value of Light HSL Saturation state */
+    uint16_t saturation_range_max;  /*!< The maximum value of Light HSL Saturation state */
+} esp_ble_mesh_light_hsl_state_t;
+
+/** User data of Light HSL Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Lighting HSL Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_hsl_state_t *state;      /*!< Parameters of the Light HSL state */
+    esp_ble_mesh_last_msg_info_t last;          /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t transition; /*!< Parameters of state transition */
+    int32_t tt_delta_lightness;     /*!< Delta change value of lightness state transition */
+    int32_t tt_delta_hue;           /*!< Delta change value of hue state transition */
+    int32_t tt_delta_saturation;    /*!< Delta change value of saturation state transition */
+} esp_ble_mesh_light_hsl_srv_t;
+
+/** User data of Light HSL Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Lighting HSL Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_hsl_state_t *state;      /*!< Parameters of the Light HSL state */
+} esp_ble_mesh_light_hsl_setup_srv_t;
+
+/** User data of Light HSL Hue Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Lighting HSL Hue Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_hsl_state_t *state;      /*!< Parameters of the Light HSL state */
+    esp_ble_mesh_last_msg_info_t last;          /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t transition; /*!< Parameters of state transition */
+    int32_t tt_delta_hue;   /*!< Delta change value of hue state transition */
+} esp_ble_mesh_light_hsl_hue_srv_t;
+
+/** User data of Light HSL Saturation Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;    /*!< Pointer to the Lighting HSL Saturation Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_hsl_state_t *state;      /*!< Parameters of the Light HSL state */
+    esp_ble_mesh_last_msg_info_t last;          /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t transition; /*!< Parameters of state transition */
+    int32_t tt_delta_saturation;    /*!< Delta change value of saturation state transition */
+} esp_ble_mesh_light_hsl_sat_srv_t;
+
+/** Parameters of Light xyL state */
+typedef struct {
+    uint16_t lightness;         /*!< The present value of Light xyL Lightness state */
+    uint16_t target_lightness;  /*!< The target value of Light xyL Lightness state */
+
+    uint16_t x;                 /*!< The present value of Light xyL x state */
+    uint16_t target_x;          /*!< The target value of Light xyL x state */
+
+    uint16_t y;                 /*!< The present value of Light xyL y state */
+    uint16_t target_y;          /*!< The target value of Light xyL y state */
+
+    uint16_t lightness_default; /*!< The value of Light Lightness Default state */
+    uint16_t x_default;         /*!< The value of Light xyL x Default state */
+    uint16_t y_default;         /*!< The value of Light xyL y Default state */
+
+    uint8_t  status_code;       /*!< The status code of setting Light xyL x & y Range state */
+    uint16_t x_range_min;       /*!< The minimum value of Light xyL x Range state */
+    uint16_t x_range_max;       /*!< The maximum value of Light xyL x Range state */
+    uint16_t y_range_min;       /*!< The minimum value of Light xyL y Range state */
+    uint16_t y_range_max;       /*!< The maximum value of Light xyL y Range state */
+} esp_ble_mesh_light_xyl_state_t;
+
+/** User data of Light xyL Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Lighting xyL Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_xyl_state_t *state;      /*!< Parameters of the Light xyL state */
+    esp_ble_mesh_last_msg_info_t last;          /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t transition; /*!< Parameters of state transition */
+    int32_t tt_delta_lightness; /*!< Delta change value of lightness state transition */
+    int32_t tt_delta_x;         /*!< Delta change value of x state transition */
+    int32_t tt_delta_y;         /*!< Delta change value of y state transition */
+} esp_ble_mesh_light_xyl_srv_t;
+
+/** User data of Light xyL Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Lighting xyL Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_xyl_state_t *state;      /*!< Parameters of the Light xyL state */
+} esp_ble_mesh_light_xyl_setup_srv_t;
+
+/** Parameters of Light LC states */
+typedef struct {
+    /**
+     * 0b0 The controller is turned off.
+     * - The binding with the Light Lightness state is disabled.
+     * 0b1 The controller is turned on.
+     * - The binding with the Light Lightness state is enabled.
+     */
+    uint32_t mode : 1,                  /*!< The value of Light LC Mode state */
+             occupancy_mode : 1,        /*!< The value of Light LC Occupancy Mode state */
+             light_onoff : 1,           /*!< The present value of Light LC Light OnOff state */
+             target_light_onoff : 1,    /*!< The target value of Light LC Light OnOff state */
+             occupancy : 1,             /*!< The value of Light LC Occupancy state */
+             ambient_luxlevel : 24;     /*!< The value of Light LC Ambient LuxLevel state */
+
+    /**
+     * 1. Light LC Linear Output = max((Lightness Out)^2/65535, Regulator Output)
+     * 2. If the Light LC Mode state is set to 0b1, the binding is enabled and upon
+     *    a change of the Light LC Linear Output state, the following operation
+     *    shall be performed:
+     *    Light Lightness Linear = Light LC Linear Output
+     * 3. If the Light LC Mode state is set to 0b0, the binding is disabled (i.e.,
+     *    upon a change of the Light LC Linear Output state, no operation on the
+     *    Light Lightness Linear state is performed).
+     */
+    uint16_t linear_output;     /*!< The value of Light LC Linear Output state */
+} esp_ble_mesh_light_lc_state_t;
+
+/**
+ * Parameters of Light Property states.
+ * The Light LC Property states are read / write states that determine the
+ * configuration of a Light Lightness Controller. Each state is represented
+ * by a device property and is controlled by Light LC Property messages.
+ */
+typedef struct {
+    /**
+     * A timing state that determines the delay for changing the Light LC
+     * Occupancy state upon receiving a Sensor Status message from an
+     * occupancy sensor.
+     */
+    uint32_t time_occupancy_delay;  /*!< The value of Light LC Time Occupancy Delay state */
+    /**
+     * A timing state that determines the time the controlled lights fade
+     * to the level determined by the Light LC Lightness On state.
+     */
+    uint32_t time_fade_on;      /*!< The value of Light LC Time Fade On state */
+    /**
+     * A timing state that determines the time the controlled lights stay
+     * at the level determined by the Light LC Lightness On state.
+     */
+    uint32_t time_run_on;       /*!< The value of Light LC Time Run On state */
+    /**
+     * A timing state that determines the time the controlled lights fade
+     * from the level determined by the Light LC Lightness On state to the
+     * level determined by the Light Lightness Prolong state.
+     */
+    uint32_t time_fade;         /*!< The value of Light LC Time Fade state */
+    /**
+     * A timing state that determines the time the controlled lights stay at
+     * the level determined by the Light LC Lightness Prolong state.
+     */
+    uint32_t time_prolong;      /*!< The value of Light LC Time Prolong state */
+    /**
+     * A timing state that determines the time the controlled lights fade from
+     * the level determined by the Light LC Lightness Prolong state to the level
+     * determined by the Light LC Lightness Standby state when the transition is
+     * automatic.
+     */
+    uint32_t time_fade_standby_auto;    /*!< The value of Light LC Time Fade Standby Auto state */
+    /**
+     * A timing state that determines the time the controlled lights fade from
+     * the level determined by the Light LC Lightness Prolong state to the level
+     * determined by the Light LC Lightness Standby state when the transition is
+     * triggered by a change in the Light LC Light OnOff state.
+     */
+    uint32_t time_fade_standby_manual;  /*!< The value of Light LC Time Fade Standby Manual state */
+
+    /**
+     * A lightness state that determines the perceptive light lightness at the
+     * Occupancy and Run internal controller states.
+     */
+    uint16_t lightness_on;          /*!< The value of Light LC Lightness On state */
+    /**
+     * A lightness state that determines the light lightness at the Prolong
+     * internal controller state.
+     */
+    uint16_t lightness_prolong;     /*!< The value of Light LC Lightness Prolong state */
+    /**
+     * A lightness state that determines the light lightness at the Standby
+     * internal controller state.
+     */
+    uint16_t lightness_standby;     /*!< The value of Light LC Lightness Standby state */
+
+    /**
+     * A uint16 state representing the Ambient LuxLevel level that determines
+     * if the controller transitions from the Light Control Standby state.
+     */
+    uint16_t ambient_luxlevel_on;       /*!< The value of Light LC Ambient LuxLevel On state */
+    /**
+     * A uint16 state representing the required Ambient LuxLevel level in the
+     * Prolong state.
+     */
+    uint16_t ambient_luxlevel_prolong;  /*!< The value of Light LC Ambient LuxLevel Prolong state */
+    /**
+     * A uint16 state representing the required Ambient LuxLevel level in the
+     * Standby state.
+     */
+    uint16_t ambient_luxlevel_standby;  /*!< The value of Light LC Ambient LuxLevel Standby state */
+
+    /**
+     * A float32 state representing the integral coefficient that determines the
+     * integral part of the equation defining the output of the Light LC PI
+     * Feedback Regulator, when Light LC Ambient LuxLevel is less than LuxLevel
+     * Out. Valid range: 0.0 ~ 1000.0. The default value is 250.0.
+     */
+    float regulator_kiu;    /*!< The value of Light LC Regulator Kiu state */
+    /**
+     * A float32 state representing the integral coefficient that determines the
+     * integral part of the equation defining the output of the Light LC PI
+     * Feedback Regulator, when Light LC Ambient LuxLevel is greater than or equal
+     * to the value of the LuxLevel Out state. Valid range: 0.0 ~ 1000.0. The
+     * default value is 25.0.
+     */
+    float regulator_kid;    /*!< The value of Light LC Regulator Kid state */
+    /**
+     * A float32 state representing the proportional coefficient that determines
+     * the proportional part of the equation defining the output of the Light LC
+     * PI Feedback Regulator, when Light LC Ambient LuxLevel is less than the value
+     * of the LuxLevel Out state. Valid range: 0.0 ~ 1000.0. The default value is 80.0.
+     */
+    float regulator_kpu;    /*!< The value of Light LC Regulator Kpu state */
+    /**
+     * A float32 state representing the proportional coefficient that determines
+     * the proportional part of the equation defining the output of the Light LC PI
+     * Feedback Regulator, when Light LC Ambient LuxLevel is greater than or equal
+     * to the value of the LuxLevel Out state. Valid range: 0.0 ~ 1000.0. The default
+     * value is 80.0.
+     */
+    float regulator_kpd;    /*!< The value of Light LC Regulator Kpd state */
+    /**
+     * A int8 state representing the percentage accuracy of the Light LC PI Feedback
+     * Regulator. Valid range: 0.0 ~ 100.0. The default value is 2.0.
+     */
+    int8_t regulator_accuracy;  /*!< The value of Light LC Regulator Accuracy state */
+
+    /**
+     * If the message Raw field contains a Raw Value for the Time Since Motion
+     * Sensed device property, which represents a value less than or equal to
+     * the value of the Light LC Occupancy Delay state, it shall delay setting
+     * the Light LC Occupancy state to 0b1 by the difference between the value
+     * of the Light LC Occupancy Delay state and the received Time Since Motion
+     * value.
+     */
+    uint32_t set_occupancy_to_1_delay;  /*!< The value of the difference between value of the
+                                            Light LC Occupancy Delay state and the received
+                                            Time Since Motion value */
+} esp_ble_mesh_light_lc_property_state_t;
+
+/** This enum value is the Light LC State Machine states */
+typedef enum {
+    ESP_BLE_MESH_LC_OFF,
+    ESP_BLE_MESH_LC_STANDBY,
+    ESP_BLE_MESH_LC_FADE_ON,
+    ESP_BLE_MESH_LC_RUN,
+    ESP_BLE_MESH_LC_FADE,
+    ESP_BLE_MESH_LC_PROLONG,
+    ESP_BLE_MESH_LC_FADE_STANDBY_AUTO,
+    ESP_BLE_MESH_LC_FADE_STANDBY_MANUAL,
+} esp_ble_mesh_lc_state_t;
+
+/** Parameters of Light LC state machine */
+typedef struct {
+    /**
+     * The Fade On, Fade, Fade Standby Auto, and Fade Standby Manual states are
+     * transition states that define the transition of the Lightness Out and
+     * LuxLevel Out states. This transition can be started as a result of the
+     * Light LC State Machine change or as a result of receiving the Light LC
+     * Light OnOff Set or Light LC Light Set Unacknowledged message.
+     */
+    struct {
+        uint8_t fade_on;                /*!< The value of transition time of Light LC Time Fade On */
+        uint8_t fade;                   /*!< The value of transition time of Light LC Time Fade */
+        uint8_t fade_standby_auto;      /*!< The value of transition time of Light LC Time Fade Standby Auto */
+        uint8_t fade_standby_manual;    /*!< The value of transition time of Light LC Time Fade Standby Manual */
+    } trans_time;                       /*!< The value of transition time */
+    esp_ble_mesh_lc_state_t state;      /*!< The value of Light LC state machine state */
+    struct k_delayed_work timer;        /*!< Timer of Light LC state machine */
+} esp_ble_mesh_light_lc_state_machine_t;
+
+/** Parameters of Light Lightness controller */
+typedef struct {
+    esp_ble_mesh_light_lc_state_t          state;           /*!< Parameters of Light LC state */
+    esp_ble_mesh_light_lc_property_state_t prop_state;      /*!< Parameters of Light LC Property state */
+    esp_ble_mesh_light_lc_state_machine_t  state_machine;   /*!< Parameters of Light LC state machine */
+} esp_ble_mesh_light_control_t;
+
+/** User data of Light LC Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Lighting LC Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_control_t *lc;           /*!< Parameters of the Light controller */
+    esp_ble_mesh_last_msg_info_t last;          /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t transition; /*!< Parameters of state transition */
+} esp_ble_mesh_light_lc_srv_t;
+
+/** User data of Light LC Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Lighting LC Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_light_control_t *lc;           /*!< Parameters of the Light controller */
+} esp_ble_mesh_light_lc_setup_srv_t;
+
+/** Parameter of Light Lightness Actual state change event */
+typedef struct {
+    uint16_t lightness;     /*!< The value of Light Lightness Actual state */
+} esp_ble_mesh_state_change_light_lightness_set_t;
+
+/** Parameter of Light Lightness Linear state change event */
+typedef struct {
+    uint16_t lightness;     /*!< The value of Light Lightness Linear state */
+} esp_ble_mesh_state_change_light_lightness_linear_set_t;
+
+/** Parameter of Light Lightness Default state change event */
+typedef struct {
+    uint16_t lightness;     /*!< The value of Light Lightness Default state */
+} esp_ble_mesh_state_change_light_lightness_default_set_t;
+
+/** Parameters of Light Lightness Range state change event */
+typedef struct {
+    uint16_t range_min;     /*!< The minimum value of Light Lightness Range state */
+    uint16_t range_max;     /*!< The maximum value of Light Lightness Range state */
+} esp_ble_mesh_state_change_light_lightness_range_set_t;
+
+/** Parameters of Light CTL state change event */
+typedef struct {
+    uint16_t lightness;     /*!< The value of Light CTL Lightness state */
+    uint16_t temperature;   /*!< The value of Light CTL Temperature state */
+    int16_t  delta_uv;      /*!< The value of Light CTL Delta UV state */
+} esp_ble_mesh_state_change_light_ctl_set_t;
+
+/** Parameters of Light CTL Temperature state change event */
+typedef struct {
+    uint16_t temperature;   /*!< The value of Light CTL Temperature state */
+    int16_t  delta_uv;      /*!< The value of Light CTL Delta UV state */
+} esp_ble_mesh_state_change_light_ctl_temperature_set_t;
+
+/** Parameters of Light CTL Temperature Range state change event */
+typedef struct {
+    uint16_t range_min;     /*!< The minimum value of Light CTL Temperature Range state */
+    uint16_t range_max;     /*!< The maximum value of Light CTL Temperature Range state */
+} esp_ble_mesh_state_change_light_ctl_temperature_range_set_t;
+
+/** Parameters of Light CTL Default state change event */
+typedef struct {
+    uint16_t lightness;     /*!< The value of Light Lightness Default state */
+    uint16_t temperature;   /*!< The value of Light CTL Temperature Default state */
+    int16_t  delta_uv;      /*!< The value of Light CTL Delta UV Default state */
+} esp_ble_mesh_state_change_light_ctl_default_set_t;
+
+/** Parameters of Light HSL state change event */
+typedef struct {
+    uint16_t lightness;     /*!< The value of Light HSL Lightness state */
+    uint16_t hue;           /*!< The value of Light HSL Hue state */
+    uint16_t saturation;    /*!< The value of Light HSL Saturation state */
+} esp_ble_mesh_state_change_light_hsl_set_t;
+
+/** Parameter of Light HSL Hue state change event */
+typedef struct {
+    uint16_t hue;           /*!< The value of Light HSL Hue state */
+} esp_ble_mesh_state_change_light_hsl_hue_set_t;
+
+/** Parameter of Light HSL Saturation state change event */
+typedef struct {
+    uint16_t saturation;    /*!< The value of Light HSL Saturation state */
+} esp_ble_mesh_state_change_light_hsl_saturation_set_t;
+
+/** Parameters of Light HSL Default state change event */
+typedef struct {
+    uint16_t lightness;     /*!< The value of Light HSL Lightness Default state */
+    uint16_t hue;           /*!< The value of Light HSL Hue Default state */
+    uint16_t saturation;    /*!< The value of Light HSL Saturation Default state */
+} esp_ble_mesh_state_change_light_hsl_default_set_t;
+
+/** Parameters of Light HSL Range state change event */
+typedef struct {
+    uint16_t hue_range_min;         /*!< The minimum hue value of Light HSL Range state */
+    uint16_t hue_range_max;         /*!< The maximum hue value of Light HSL Range state */
+    uint16_t saturation_range_min;  /*!< The minimum saturation value of Light HSL Range state */
+    uint16_t saturation_range_max;  /*!< The maximum saturation value of Light HSL Range state */
+} esp_ble_mesh_state_change_light_hsl_range_set_t;
+
+/** Parameters of Light xyL state change event */
+typedef struct {
+    uint16_t lightness;     /*!< The value of Light xyL Lightness state */
+    uint16_t x;             /*!< The value of Light xyL x state */
+    uint16_t y;             /*!< The value of Light xyL y state */
+} esp_ble_mesh_state_change_light_xyl_set_t;
+
+/** Parameters of Light xyL Default state change event */
+typedef struct {
+    uint16_t lightness;     /*!< The value of Light Lightness Default state */
+    uint16_t x;             /*!< The value of Light xyL x Default state */
+    uint16_t y;             /*!< The value of Light xyL y Default state */
+} esp_ble_mesh_state_change_light_xyl_default_set_t;
+
+/** Parameters of Light xyL Range state change event */
+typedef struct {
+    uint16_t x_range_min;   /*!< The minimum value of Light xyL x Range state */
+    uint16_t x_range_max;   /*!< The maximum value of Light xyL x Range state */
+    uint16_t y_range_min;   /*!< The minimum value of Light xyL y Range state */
+    uint16_t y_range_max;   /*!< The maximum value of Light xyL y Range state */
+} esp_ble_mesh_state_change_light_xyl_range_set_t;
+
+/** Parameter of Light LC Mode state change event */
+typedef struct {
+    uint8_t mode;       /*!< The value of Light LC Mode state */
+} esp_ble_mesh_state_change_light_lc_mode_set_t;
+
+/** Parameter of Light LC Occupancy Mode state change event */
+typedef struct {
+    uint8_t mode;       /*!< The value of Light LC Occupancy Mode state */
+} esp_ble_mesh_state_change_light_lc_om_set_t;
+
+/** Parameter of Light LC Light OnOff state change event */
+typedef struct {
+    uint8_t onoff;      /*!< The value of Light LC Light OnOff state */
+} esp_ble_mesh_state_change_light_lc_light_onoff_set_t;
+
+/** Parameters of Light LC Property state change event */
+typedef struct {
+    uint16_t property_id;   /*!< The property id of Light LC Property state */
+    struct net_buf_simple *property_value;  /*!< The property value of Light LC Property state */
+} esp_ble_mesh_state_change_light_lc_property_set_t;
+
+/** Parameters of Sensor Status state change event */
+typedef struct {
+    uint16_t property_id;       /*!< The value of Sensor Property ID */
+    /** Parameters of Sensor Status related state */
+    union {
+        uint8_t  occupancy;                 /*!< The value of Light LC Occupancy state */
+        uint32_t set_occupancy_to_1_delay;  /*!< The value of Light LC Set Occupancy to 1 Delay state */
+        uint32_t ambient_luxlevel;          /*!< The value of Light LC Ambient Luxlevel state */
+    } state;
+} esp_ble_mesh_state_change_sensor_status_t;
+
+/**
+ * @brief Lighting Server Model state change value union
+ */
+typedef union {
+    /**
+     * The recv_op in ctx can be used to decide which state is changed.
+     */
+    esp_ble_mesh_state_change_light_lightness_set_t             lightness_set;          /*!< Light Lightness Set */
+    esp_ble_mesh_state_change_light_lightness_linear_set_t      lightness_linear_set;   /*!< Light Lightness Linear Set */
+    esp_ble_mesh_state_change_light_lightness_default_set_t     lightness_default_set;  /*!< Light Lightness Default Set */
+    esp_ble_mesh_state_change_light_lightness_range_set_t       lightness_range_set;    /*!< Light Lightness Range Set */
+    esp_ble_mesh_state_change_light_ctl_set_t                   ctl_set;                /*!< Light CTL Set */
+    esp_ble_mesh_state_change_light_ctl_temperature_set_t       ctl_temp_set;           /*!< Light CTL Temperature Set */
+    esp_ble_mesh_state_change_light_ctl_temperature_range_set_t ctl_temp_range_set;     /*!< Light CTL Temperature Range Set */
+    esp_ble_mesh_state_change_light_ctl_default_set_t           ctl_default_set;        /*!< Light CTL Default Set */
+    esp_ble_mesh_state_change_light_hsl_set_t                   hsl_set;                /*!< Light HSL Set */
+    esp_ble_mesh_state_change_light_hsl_hue_set_t               hsl_hue_set;            /*!< Light HSL Hue Set */
+    esp_ble_mesh_state_change_light_hsl_saturation_set_t        hsl_saturation_set;     /*!< Light HSL Saturation Set */
+    esp_ble_mesh_state_change_light_hsl_default_set_t           hsl_default_set;        /*!< Light HSL Default Set */
+    esp_ble_mesh_state_change_light_hsl_range_set_t             hsl_range_set;          /*!< Light HSL Range Set */
+    esp_ble_mesh_state_change_light_xyl_set_t                   xyl_set;                /*!< Light xyL Set */
+    esp_ble_mesh_state_change_light_xyl_default_set_t           xyl_default_set;        /*!< Light xyL Default Set */
+    esp_ble_mesh_state_change_light_xyl_range_set_t             xyl_range_set;          /*!< Light xyL Range Set */
+    esp_ble_mesh_state_change_light_lc_mode_set_t               lc_mode_set;            /*!< Light LC Mode Set */
+    esp_ble_mesh_state_change_light_lc_om_set_t                 lc_om_set;              /*!< Light LC Occupancy Mode Set */
+    esp_ble_mesh_state_change_light_lc_light_onoff_set_t        lc_light_onoff_set;     /*!< Light LC Light OnOff Set */
+    esp_ble_mesh_state_change_light_lc_property_set_t           lc_property_set;        /*!< Light LC Property Set */
+    esp_ble_mesh_state_change_sensor_status_t                   sensor_status;          /*!< Sensor Status */
+} esp_ble_mesh_lighting_server_state_change_t;
+
+/** Context of the received Light LC Property Get message */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Light LC Property */
+} esp_ble_mesh_server_recv_light_lc_property_get_t;
+
+/**
+ * @brief Lighting Server Model received get message union
+ */
+typedef union {
+    esp_ble_mesh_server_recv_light_lc_property_get_t lc_property;   /*!< Light LC Property Get */
+} esp_ble_mesh_lighting_server_recv_get_msg_t;
+
+/** Context of the received Light Lightness Set message */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t lightness;     /*!< Target value of light lightness actual state */
+    uint8_t  tid;           /*!< Transaction ID */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_light_lightness_set_t;
+
+/** Context of the received Light Lightness Linear Set message */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t lightness;     /*!< Target value of light lightness linear state */
+    uint8_t  tid;           /*!< Transaction ID */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_light_lightness_linear_set_t;
+
+/** Context of the received Light Lightness Default Set message */
+typedef struct {
+    uint16_t lightness;     /*!< The value of the Light Lightness Default state */
+} esp_ble_mesh_server_recv_light_lightness_default_set_t;
+
+/** Context of the received Light Lightness Range Set message */
+typedef struct {
+    uint16_t range_min;     /*!< Value of range min field of light lightness range state */
+    uint16_t range_max;     /*!< Value of range max field of light lightness range state */
+} esp_ble_mesh_server_recv_light_lightness_range_set_t;
+
+/** Context of the received Light CTL Set message */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t lightness;     /*!< Target value of light ctl lightness state */
+    uint16_t temperature;   /*!< Target value of light ctl temperature state */
+    int16_t  delta_uv;      /*!< Target value of light ctl delta UV state */
+    uint8_t  tid;           /*!< Transaction ID */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_light_ctl_set_t;
+
+/** Context of the received Light CTL Temperature Set message */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t temperature;   /*!< Target value of light ctl temperature state */
+    int16_t  delta_uv;      /*!< Target value of light ctl delta UV state */
+    uint8_t  tid;           /*!< Transaction ID */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_light_ctl_temperature_set_t;
+
+/** Context of the received Light CTL Temperature Range Set message */
+typedef struct {
+    uint16_t range_min;     /*!< Value of temperature range min field of light ctl temperature range state */
+    uint16_t range_max;     /*!< Value of temperature range max field of light ctl temperature range state */
+} esp_ble_mesh_server_recv_light_ctl_temperature_range_set_t;
+
+/** Context of the received Light CTL Default Set message */
+typedef struct {
+    uint16_t lightness;     /*!< Value of light lightness default state */
+    uint16_t temperature;   /*!< Value of light temperature default state */
+    int16_t  delta_uv;      /*!< Value of light delta UV default state */
+} esp_ble_mesh_server_recv_light_ctl_default_set_t;
+
+/** Context of the received Light HSL Set message */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t lightness;     /*!< Target value of light hsl lightness state */
+    uint16_t hue;           /*!< Target value of light hsl hue state */
+    uint16_t saturation;    /*!< Target value of light hsl saturation state */
+    uint8_t  tid;           /*!< Transaction ID */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_light_hsl_set_t;
+
+/** Context of the received Light HSL Hue Set message */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t hue;           /*!< Target value of light hsl hue state */
+    uint8_t  tid;           /*!< Transaction ID */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_light_hsl_hue_set_t;
+
+/** Context of the received Light HSL Saturation Set message */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t saturation;    /*!< Target value of light hsl hue state */
+    uint8_t  tid;           /*!< Transaction ID */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_light_hsl_saturation_set_t;
+
+/** Context of the received Light HSL Default Set message */
+typedef struct {
+    uint16_t lightness;     /*!< Value of light lightness default state */
+    uint16_t hue;           /*!< Value of light hue default state */
+    uint16_t saturation;    /*!< Value of light saturation default state */
+} esp_ble_mesh_server_recv_light_hsl_default_set_t;
+
+/** Context of the received Light HSL Range Set message */
+typedef struct {
+    uint16_t hue_range_min;         /*!< Value of hue range min field of light hsl hue range state */
+    uint16_t hue_range_max;         /*!< Value of hue range max field of light hsl hue range state */
+    uint16_t saturation_range_min;  /*!< Value of saturation range min field of light hsl saturation range state */
+    uint16_t saturation_range_max;  /*!< Value of saturation range max field of light hsl saturation range state */
+} esp_ble_mesh_server_recv_light_hsl_range_set_t;
+
+/** Context of the received Light xyL Set message */
+typedef struct {
+    bool     op_en;         /*!< Indicate whether optional parameters included */
+    uint16_t lightness;     /*!< The target value of the Light xyL Lightness state */
+    uint16_t x;             /*!< The target value of the Light xyL x state */
+    uint16_t y;             /*!< The target value of the Light xyL y state */
+    uint8_t  tid;           /*!< Transaction Identifier */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_light_xyl_set_t;
+
+/** Context of the received Light xyL Default Set message */
+typedef struct {
+    uint16_t lightness;     /*!< The value of the Light Lightness Default state */
+    uint16_t x;             /*!< The value of the Light xyL x Default state */
+    uint16_t y;             /*!< The value of the Light xyL y Default state */
+} esp_ble_mesh_server_recv_light_xyl_default_set_t;
+
+/** Context of the received Light xyl Range Set message */
+typedef struct {
+    uint16_t x_range_min;   /*!< The value of the xyL x Range Min field of the Light xyL x Range state */
+    uint16_t x_range_max;   /*!< The value of the xyL x Range Max field of the Light xyL x Range state */
+    uint16_t y_range_min;   /*!< The value of the xyL y Range Min field of the Light xyL y Range state */
+    uint16_t y_range_max;   /*!< The value of the xyL y Range Max field of the Light xyL y Range state */
+} esp_ble_mesh_server_recv_light_xyl_range_set_t;
+
+/** Context of the received Light LC Mode Set message */
+typedef struct {
+    uint8_t mode;   /*!< The target value of the Light LC Mode state */
+} esp_ble_mesh_server_recv_light_lc_mode_set_t;
+
+/** Context of the received Light OM Set message */
+typedef struct {
+    uint8_t mode;   /*!< The target value of the Light LC Occupancy Mode state */
+} esp_ble_mesh_server_recv_light_lc_om_set_t;
+
+/** Context of the received Light LC Light OnOff Set message */
+typedef struct {
+    bool    op_en;          /*!< Indicate whether optional parameters included */
+    uint8_t light_onoff;    /*!< The target value of the Light LC Light OnOff state */
+    uint8_t tid;            /*!< Transaction Identifier */
+    uint8_t trans_time;     /*!< Time to complete state transition (optional) */
+    uint8_t delay;          /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_light_lc_light_onoff_set_t;
+
+/** Context of the received Light LC Property Set message */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID identifying a Light LC Property */
+    struct net_buf_simple *property_value;  /*!< Raw value for the Light LC Property */
+} esp_ble_mesh_server_recv_light_lc_property_set_t;
+
+/**
+ * @brief Lighting Server Model received set message union
+ */
+typedef union {
+    esp_ble_mesh_server_recv_light_lightness_set_t             lightness;           /*!< Light Lightness Set/Light Lightness Set Unack */
+    esp_ble_mesh_server_recv_light_lightness_linear_set_t      lightness_linear;    /*!< Light Lightness Linear Set/Light Lightness Linear Set Unack */
+    esp_ble_mesh_server_recv_light_lightness_default_set_t     lightness_default;   /*!< Light Lightness Default Set/Light Lightness Default Set Unack */
+    esp_ble_mesh_server_recv_light_lightness_range_set_t       lightness_range;     /*!< Light Lightness Range Set/Light Lightness Range Set Unack */
+    esp_ble_mesh_server_recv_light_ctl_set_t                   ctl;                 /*!< Light CTL Set/Light CTL Set Unack */
+    esp_ble_mesh_server_recv_light_ctl_temperature_set_t       ctl_temp;            /*!< Light CTL Temperature Set/Light CTL Temperature Set Unack */
+    esp_ble_mesh_server_recv_light_ctl_temperature_range_set_t ctl_temp_range;      /*!< Light CTL Temperature Range Set/Light CTL Temperature Range Set Unack */
+    esp_ble_mesh_server_recv_light_ctl_default_set_t           ctl_default;         /*!< Light CTL Default Set/Light CTL Default Set Unack */
+    esp_ble_mesh_server_recv_light_hsl_set_t                   hsl;                 /*!< Light HSL Set/Light HSL Set Unack */
+    esp_ble_mesh_server_recv_light_hsl_hue_set_t               hsl_hue;             /*!< Light HSL Hue Set/Light HSL Hue Set Unack */
+    esp_ble_mesh_server_recv_light_hsl_saturation_set_t        hsl_saturation;      /*!< Light HSL Saturation Set/Light HSL Saturation Set Unack */
+    esp_ble_mesh_server_recv_light_hsl_default_set_t           hsl_default;         /*!< Light HSL Default Set/Light HSL Default Set Unack */
+    esp_ble_mesh_server_recv_light_hsl_range_set_t             hsl_range;           /*!< Light HSL Range Set/Light HSL Range Set Unack */
+    esp_ble_mesh_server_recv_light_xyl_set_t                   xyl;                 /*!< Light xyL Set/Light xyL Set Unack */
+    esp_ble_mesh_server_recv_light_xyl_default_set_t           xyl_default;         /*!< Light xyL Default Set/Light xyL Default Set Unack */
+    esp_ble_mesh_server_recv_light_xyl_range_set_t             xyl_range;           /*!< Light xyL Range Set/Light xyL Range Set Unack */
+    esp_ble_mesh_server_recv_light_lc_mode_set_t               lc_mode;             /*!< Light LC Mode Set/Light LC Mode Set Unack */
+    esp_ble_mesh_server_recv_light_lc_om_set_t                 lc_om;               /*!< Light LC OM Set/Light LC OM Set Unack */
+    esp_ble_mesh_server_recv_light_lc_light_onoff_set_t        lc_light_onoff;      /*!< Light LC Light OnOff Set/Light LC Light OnOff Set Unack */
+    esp_ble_mesh_server_recv_light_lc_property_set_t           lc_property;         /*!< Light LC Property Set/Light LC Property Set Unack */
+} esp_ble_mesh_lighting_server_recv_set_msg_t;
+
+/** Context of the received Sensor Status message */
+typedef struct {
+    struct net_buf_simple *data;    /*!< Value of sensor data state (optional) */
+} esp_ble_mesh_server_recv_sensor_status_t;
+
+/**
+ * @brief Lighting Server Model received status message union
+ */
+typedef union {
+    esp_ble_mesh_server_recv_sensor_status_t sensor_status;     /*!< Sensor Status */
+} esp_ble_mesh_lighting_server_recv_status_msg_t;
+
+/**
+ * @brief Lighting Server Model callback value union
+ */
+typedef union {
+    esp_ble_mesh_lighting_server_state_change_t state_change;   /*!< ESP_BLE_MESH_LIGHTING_SERVER_STATE_CHANGE_EVT */
+    esp_ble_mesh_lighting_server_recv_get_msg_t get;            /*!< ESP_BLE_MESH_LIGHTING_SERVER_RECV_GET_MSG_EVT */
+    esp_ble_mesh_lighting_server_recv_set_msg_t set;            /*!< ESP_BLE_MESH_LIGHTING_SERVER_RECV_SET_MSG_EVT */
+    esp_ble_mesh_lighting_server_recv_status_msg_t status;      /*!< ESP_BLE_MESH_LIGHTING_SERVER_RECV_STATUS_MSG_EVT */
+} esp_ble_mesh_lighting_server_cb_value_t;
+
+/** Lighting Server Model callback parameters */
+typedef struct {
+    esp_ble_mesh_model_t  *model;   /*!< Pointer to Lighting Server Models */
+    esp_ble_mesh_msg_ctx_t ctx;     /*!< Context of the received messages */
+    esp_ble_mesh_lighting_server_cb_value_t value;  /*!< Value of the received Lighting Messages */
+} esp_ble_mesh_lighting_server_cb_param_t;
+
+/** This enum value is the event of Lighting Server Model */
+typedef enum {
+    /**
+     * 1. When get_auto_rsp is set to ESP_BLE_MESH_SERVER_AUTO_RSP, no event will be
+     *    callback to the application layer when Lighting Get messages are received.
+     * 2. When set_auto_rsp is set to ESP_BLE_MESH_SERVER_AUTO_RSP, this event will
+     *    be callback to the application layer when Lighting Set/Set Unack messages
+     *    are received.
+     */
+    ESP_BLE_MESH_LIGHTING_SERVER_STATE_CHANGE_EVT,
+    /**
+     * When get_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, this event will be
+     * callback to the application layer when Lighting Get messages are received.
+     */
+    ESP_BLE_MESH_LIGHTING_SERVER_RECV_GET_MSG_EVT,
+    /**
+     * When set_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, this event will be
+     * callback to the application layer when Lighting Set/Set Unack messages are received.
+     */
+    ESP_BLE_MESH_LIGHTING_SERVER_RECV_SET_MSG_EVT,
+    /**
+     * When status_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, this event will
+     * be callback to the application layer when Sensor Status message is received.
+     */
+    ESP_BLE_MESH_LIGHTING_SERVER_RECV_STATUS_MSG_EVT,
+    ESP_BLE_MESH_LIGHTING_SERVER_EVT_MAX,
+} esp_ble_mesh_lighting_server_cb_event_t;
+
+/**
+ *  @brief Bluetooth Mesh Lighting Server Model function.
+ */
+
+/**
+ * @brief   Lighting Server Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_lighting_server_cb_t)(esp_ble_mesh_lighting_server_cb_event_t event,
+                                                   esp_ble_mesh_lighting_server_cb_param_t *param);
+
+/**
+ * @brief       Register BLE Mesh Lighting Server Model callback.
+ *
+ * @param[in]   callback: Pointer to the callback function.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_lighting_server_callback(esp_ble_mesh_lighting_server_cb_t callback);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_LIGHTING_MODEL_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_sensor_model_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_sensor_model_api.h
new file mode 100644
index 00000000000..4f051a0b265
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_sensor_model_api.h
@@ -0,0 +1,709 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/** @file
+ *  @brief Bluetooth Mesh Sensor Client Model APIs.
+ */
+
+#ifndef _ESP_BLE_MESH_SENSOR_MODEL_API_H_
+#define _ESP_BLE_MESH_SENSOR_MODEL_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @def    ESP_BLE_MESH_MODEL_SENSOR_CLI
+ *
+ *  @brief  Define a new Sensor Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Sensor Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Sensor Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_SENSOR_CLI(cli_pub, cli_data)            \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_SENSOR_CLI,    \
+                    NULL, cli_pub, cli_data)
+
+/**
+ *  @brief Bluetooth Mesh Sensor Client Model Get and Set parameters structure.
+ */
+
+/** Parameters of Sensor Descriptor Get */
+typedef struct {
+    bool  op_en;        /*!< Indicate if optional parameters are included */
+    uint16_t property_id;  /*!< Property ID of a sensor (optional) */
+} esp_ble_mesh_sensor_descriptor_get_t;
+
+/** Parameter of Sensor Cadence Get */
+typedef struct {
+    uint16_t property_id;  /*!< Property ID of a sensor */
+} esp_ble_mesh_sensor_cadence_get_t;
+
+/** Parameters of Sensor Cadence Set */
+typedef struct {
+    uint16_t property_id;                               /*!< Property ID for the sensor */
+    uint8_t  fast_cadence_period_divisor : 7,           /*!< Divisor for the publish period */
+             status_trigger_type : 1;                   /*!< The unit and format of the Status Trigger Delta fields */
+    struct net_buf_simple *status_trigger_delta_down;   /*!< Delta down value that triggers a status message */
+    struct net_buf_simple *status_trigger_delta_up;     /*!< Delta up value that triggers a status message */
+    uint8_t  status_min_interval;                       /*!< Minimum interval between two consecutive Status messages */
+    struct net_buf_simple *fast_cadence_low;            /*!< Low value for the fast cadence range */
+    struct net_buf_simple *fast_cadence_high;           /*!< Fast value for the fast cadence range */
+} esp_ble_mesh_sensor_cadence_set_t;
+
+/** Parameter of Sensor Settings Get */
+typedef struct {
+    uint16_t sensor_property_id;   /*!< Property ID of a sensor */
+} esp_ble_mesh_sensor_settings_get_t;
+
+/** Parameters of Sensor Setting Get */
+typedef struct {
+    uint16_t sensor_property_id;           /*!< Property ID of a sensor */
+    uint16_t sensor_setting_property_id;   /*!< Setting ID identifying a setting within a sensor */
+} esp_ble_mesh_sensor_setting_get_t;
+
+/** Parameters of Sensor Setting Set */
+typedef struct {
+    uint16_t sensor_property_id;           /*!< Property ID identifying a sensor */
+    uint16_t sensor_setting_property_id;   /*!< Setting ID identifying a setting within a sensor */
+    struct net_buf_simple *sensor_setting_raw;  /*!< Raw value for the setting */
+} esp_ble_mesh_sensor_setting_set_t;
+
+/** Parameters of Sensor Get */
+typedef struct {
+    bool     op_en;        /*!< Indicate if optional parameters are included  */
+    uint16_t property_id;  /*!< Property ID for the sensor (optional) */
+} esp_ble_mesh_sensor_get_t;
+
+/** Parameters of Sensor Column Get */
+typedef struct {
+    uint16_t property_id;  /*!< Property identifying a sensor */
+    struct net_buf_simple *raw_value_x; /*!< Raw value identifying a column */
+} esp_ble_mesh_sensor_column_get_t;
+
+/** Parameters of Sensor Series Get */
+typedef struct {
+    bool     op_en;        /*!< Indicate if optional parameters are included */
+    uint16_t property_id;  /*!< Property identifying a sensor */
+    struct net_buf_simple *raw_value_x1;    /*!< Raw value identifying a starting column (optional) */
+    struct net_buf_simple *raw_value_x2;    /*!< Raw value identifying an ending column (C.1) */
+} esp_ble_mesh_sensor_series_get_t;
+
+/**
+ * @brief Sensor Client Model get message union
+ */
+typedef union {
+    esp_ble_mesh_sensor_descriptor_get_t descriptor_get;    /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_DESCRIPTOR_GET */
+    esp_ble_mesh_sensor_cadence_get_t    cadence_get;       /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_CADENCE_GET */
+    esp_ble_mesh_sensor_settings_get_t   settings_get;      /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_SETTINGS_GET */
+    esp_ble_mesh_sensor_setting_get_t    setting_get;       /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_SETTING_GET */
+    esp_ble_mesh_sensor_get_t            sensor_get;        /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_GET */
+    esp_ble_mesh_sensor_column_get_t     column_get;        /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_COLUMN_GET */
+    esp_ble_mesh_sensor_series_get_t     series_get;        /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_SERIES_GET */
+} esp_ble_mesh_sensor_client_get_state_t;
+
+/**
+ * @brief Sensor Client Model set message union
+ */
+typedef union {
+    esp_ble_mesh_sensor_cadence_set_t cadence_set;          /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_CADENCE_SET & ESP_BLE_MESH_MODEL_OP_SENSOR_CADENCE_SET_UNACK */
+    esp_ble_mesh_sensor_setting_set_t setting_set;          /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_SETTING_SET & ESP_BLE_MESH_MODEL_OP_SENSOR_SETTING_SET_UNACK */
+} esp_ble_mesh_sensor_client_set_state_t;
+
+/**
+ *  @brief Bluetooth Mesh Sensor Client Model Get and Set callback parameters structure.
+ */
+
+/** Parameter of Sensor Descriptor Status */
+typedef struct {
+    struct net_buf_simple *descriptor;  /*!< Sequence of 8-octet sensor descriptors (optional) */
+} esp_ble_mesh_sensor_descriptor_status_cb_t;
+
+/** Parameters of Sensor Cadence Status */
+typedef struct {
+    uint16_t property_id;  /*!< Property for the sensor */
+    struct net_buf_simple *sensor_cadence_value;    /*!< Value of sensor cadence state */
+} esp_ble_mesh_sensor_cadence_status_cb_t;
+
+/** Parameters of Sensor Settings Status */
+typedef struct {
+    uint16_t sensor_property_id;   /*!< Property ID identifying a sensor */
+    struct net_buf_simple *sensor_setting_property_ids; /*!< A sequence of N sensor setting property IDs (optional) */
+} esp_ble_mesh_sensor_settings_status_cb_t;
+
+/** Parameters of Sensor Setting Status */
+typedef struct  {
+    bool     op_en;                        /*!< Indicate id optional parameters are included */
+    uint16_t sensor_property_id;           /*!< Property ID identifying a sensor */
+    uint16_t sensor_setting_property_id;   /*!< Setting ID identifying a setting within a sensor */
+    uint8_t  sensor_setting_access;        /*!< Read/Write access rights for the setting (optional) */
+    struct net_buf_simple *sensor_setting_raw;  /*!< Raw value for the setting */
+} esp_ble_mesh_sensor_setting_status_cb_t;
+
+/** Parameter of Sensor Status */
+typedef struct {
+    struct net_buf_simple *marshalled_sensor_data;  /*!< Value of sensor data state (optional) */
+} esp_ble_mesh_sensor_status_cb_t;
+
+/** Parameters of Sensor Column Status */
+typedef struct {
+    uint16_t property_id;  /*!< Property identifying a sensor and the Y axis  */
+    struct net_buf_simple *sensor_column_value; /*!< Left values of sensor column status */
+} esp_ble_mesh_sensor_column_status_cb_t;
+
+/** Parameters of Sensor Series Status */
+typedef struct {
+    uint16_t property_id;  /*!< Property identifying a sensor and the Y axis  */
+    struct net_buf_simple *sensor_series_value; /*!< Left values of sensor series status */
+} esp_ble_mesh_sensor_series_status_cb_t;
+
+/**
+ * @brief Sensor Client Model received message union
+ */
+typedef union {
+    esp_ble_mesh_sensor_descriptor_status_cb_t descriptor_status;   /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_DESCRIPTOR_STATUS */
+    esp_ble_mesh_sensor_cadence_status_cb_t    cadence_status;      /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_CADENCE_STATUS */
+    esp_ble_mesh_sensor_settings_status_cb_t   settings_status;     /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_SETTINGS_STATUS */
+    esp_ble_mesh_sensor_setting_status_cb_t    setting_status;      /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_SETTING_STATUS */
+    esp_ble_mesh_sensor_status_cb_t            sensor_status;       /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_STATUS */
+    esp_ble_mesh_sensor_column_status_cb_t     column_status;       /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_COLUMN_STATUS */
+    esp_ble_mesh_sensor_series_status_cb_t     series_status;       /*!< For ESP_BLE_MESH_MODEL_OP_SENSOR_SERIES_STATUS */
+} esp_ble_mesh_sensor_client_status_cb_t;
+
+/** Sensor Client Model callback parameters */
+typedef struct {
+    int error_code;     /*!< 0: success,
+                         *   otherwise failure. For the error code values please refer to errno.h file.
+                         *   A negative sign is added to the standard error codes in errno.h. */
+    esp_ble_mesh_client_common_param_t    *params;      /*!< The client common parameters. */
+    esp_ble_mesh_sensor_client_status_cb_t status_cb;   /*!< The sensor status message callback values */
+} esp_ble_mesh_sensor_client_cb_param_t;
+
+/** This enum value is the event of Sensor Client Model */
+typedef enum {
+    ESP_BLE_MESH_SENSOR_CLIENT_GET_STATE_EVT,
+    ESP_BLE_MESH_SENSOR_CLIENT_SET_STATE_EVT,
+    ESP_BLE_MESH_SENSOR_CLIENT_PUBLISH_EVT,
+    ESP_BLE_MESH_SENSOR_CLIENT_TIMEOUT_EVT,
+    ESP_BLE_MESH_SENSOR_CLIENT_EVT_MAX,
+} esp_ble_mesh_sensor_client_cb_event_t;
+
+/**
+ *  @brief Bluetooth Mesh Sensor Client Model function.
+ */
+
+/**
+ * @brief   Sensor Client Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_sensor_client_cb_t)(esp_ble_mesh_sensor_client_cb_event_t event,
+                                                 esp_ble_mesh_sensor_client_cb_param_t *param);
+
+/**
+ * @brief       Register BLE Mesh Sensor Client Model callback.
+ *
+ * @param[in]   callback: Pointer to the callback function.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_sensor_client_callback(esp_ble_mesh_sensor_client_cb_t callback);
+
+/**
+ * @brief       Get the value of Sensor Server Model states using the Sensor Client Model get messages.
+ *
+ * @note        If you want to know the opcodes and corresponding meanings accepted by this API,
+ *              please refer to esp_ble_mesh_sensor_message_opcode_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]   params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]   get_state: Pointer to sensor get message value.
+ *                         Shall not be set to NULL.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_sensor_client_get_state(esp_ble_mesh_client_common_param_t *params,
+                                               esp_ble_mesh_sensor_client_get_state_t *get_state);
+
+/**
+ * @brief       Set the value of Sensor Server Model states using the Sensor Client Model set messages.
+ *
+ * @note        If you want to know the opcodes and corresponding meanings accepted by this API,
+ *              please refer to esp_ble_mesh_sensor_message_opcode_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]   params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]   set_state: Pointer to sensor set message value.
+ *                         Shall not be set to NULL.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_sensor_client_set_state(esp_ble_mesh_client_common_param_t *params,
+                                               esp_ble_mesh_sensor_client_set_state_t *set_state);
+
+/**
+ * @brief Sensor Server Models related context.
+ */
+
+/** @def    ESP_BLE_MESH_MODEL_SENSOR_SRV
+ *
+ *  @brief  Define a new Sensor Server Model.
+ *
+ *  @note   1. The Sensor Server model is a root model. When this model is present
+ *             on an element, the corresponding Sensor Setup Server model shall
+ *             also be present.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_sensor_srv_t.
+ *
+ *  @return New Sensor Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_SENSOR_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_SENSOR_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_SENSOR_SETUP_SRV
+ *
+ *  @brief  Define a new Sensor Setup Server Model.
+ *
+ *  @note   1. The Sensor Setup Server model extends the Sensor Server model.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_sensor_setup_srv_t.
+ *
+ *  @return New Sensor Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_SENSOR_SETUP_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_SENSOR_SETUP_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+#define ESP_BLE_MESH_INVALID_SENSOR_PROPERTY_ID 0x0000  /*!< Invalid Sensor Property ID */
+
+#define ESP_BLE_MESH_SENSOR_PROPERTY_ID_LEN     0x02    /*!< Length of Sensor Property ID */
+
+#define ESP_BLE_MESH_SENSOR_DESCRIPTOR_LEN      0x08    /*!< Length of Sensor Descriptor state */
+
+#define ESP_BLE_MESH_SENSOR_UNSPECIFIED_POS_TOLERANCE   0x000   /*!< Unspecified Sensor Positive Tolerance */
+#define ESP_BLE_MESH_SENSOR_UNSPECIFIED_NEG_TOLERANCE   0x000   /*!< Unspecified Sensor Negative Tolerance */
+
+#define ESP_BLE_MESH_SENSOR_NOT_APPL_MEASURE_PERIOD     0x00    /*!< Not applicable Sensor Measurement Period */
+
+#define ESP_BLE_MESH_SENSOR_NOT_APPL_UPDATE_INTERVAL    0x00    /*!< Not applicable Sensor Update Interval */
+
+#define ESP_BLE_MESH_INVALID_SENSOR_SETTING_PROPERTY_ID 0x0000  /*!< Invalid Sensor Setting Property ID */
+
+#define ESP_BLE_MESH_SENSOR_SETTING_PROPERTY_ID_LEN     0x02    /*!< Length of Sensor Setting Property ID */
+#define ESP_BLE_MESH_SENSOR_SETTING_ACCESS_LEN          0x01    /*!< Length of Sensor Setting Access */
+
+#define ESP_BLE_MESH_SENSOR_SETTING_ACCESS_READ         0x01    /*!< Sensor Setting Access - Read */
+#define ESP_BLE_MESH_SENSOR_SETTING_ACCESS_READ_WRITE   0x03    /*!< Sensor Setting Access - Read & Write */
+
+#define ESP_BLE_MESH_SENSOR_DIVISOR_TRIGGER_TYPE_LEN    0x01    /*!< Length of Sensor Divisor Trigger Type */
+#define ESP_BLE_MESH_SENSOR_STATUS_MIN_INTERVAL_LEN     0x01    /*!< Length of Sensor Status Min Interval */
+
+#define ESP_BLE_MESH_SENSOR_PERIOD_DIVISOR_MAX_VALUE    15  /*!< Maximum value of Sensor Period Divisor */
+
+#define ESP_BLE_MESH_SENSOR_STATUS_MIN_INTERVAL_MAX     26  /*!< Maximum value of Sensor Status Min Interval */
+
+/**
+ * Sensor Status Trigger Type - Format Type of the characteristic
+ * that the Sensor Property ID state references
+ */
+#define ESP_BLE_MESH_SENSOR_STATUS_TRIGGER_TYPE_CHAR    0
+/** Sensor Status Trigger Type - Format Type "uint16" */
+#define ESP_BLE_MESH_SENSOR_STATUS_TRIGGER_TYPE_UINT16  1
+
+#define ESP_BLE_MESH_SENSOR_DATA_FORMAT_A   0x00    /*!< Sensor Data Format A */
+#define ESP_BLE_MESH_SENSOR_DATA_FORMAT_B   0x01    /*!< Sensor Data Format B */
+
+#define ESP_BLE_MESH_SENSOR_DATA_FORMAT_A_MPID_LEN  0x02    /*!< MPID length of Sensor Data Format A */
+#define ESP_BLE_MESH_SENSOR_DATA_FORMAT_B_MPID_LEN  0x03    /*!< MPID length of Sensor Data Format B */
+
+/**
+ * Zero length of Sensor Data.
+ *
+ * Note:
+ * The Length field is a 1-based uint7 value (valid range 0x0–0x7F,
+ * representing range of 1–127). The value 0x7F represents a length
+ * of zero.
+ */
+#define ESP_BLE_MESH_SENSOR_DATA_ZERO_LEN   0x7F
+
+/** @def    ESP_BLE_MESH_GET_SENSOR_DATA_FORMAT
+ *
+ *  @brief  Get format of the sensor data.
+ *
+ *  @note   Multiple sensor data may be concatenated. Make sure the _data pointer is
+ *          updated before getting the format of the corresponding sensor data.
+ *
+ *  @param  _data Pointer to the start of the sensor data.
+ *
+ *  @return Format of the sensor data.
+ */
+#define ESP_BLE_MESH_GET_SENSOR_DATA_FORMAT(_data)      (((_data)[0]) & BIT_MASK(1))
+
+/** @def    ESP_BLE_MESH_GET_SENSOR_DATA_LENGTH
+ *
+ *  @brief  Get length of the sensor data.
+ *
+ *  @note   Multiple sensor data may be concatenated. Make sure the _data pointer is
+ *          updated before getting the length of the corresponding sensor data.
+ *
+ *  @param  _data Pointer to the start of the sensor data.
+ *  @param  _fmt  Format of the sensor data.
+ *
+ *  @return Length (zero-based) of the sensor data.
+ */
+#define ESP_BLE_MESH_GET_SENSOR_DATA_LENGTH(_data, _fmt)    \
+            (((_fmt) == ESP_BLE_MESH_SENSOR_DATA_FORMAT_A) ? ((((_data)[0]) >> 1) & BIT_MASK(4)) : ((((_data)[0]) >> 1) & BIT_MASK(7)))
+
+/** @def    ESP_BLE_MESH_GET_SENSOR_DATA_PROPERTY_ID
+ *
+ *  @brief  Get Sensor Property ID of the sensor data.
+ *
+ *  @note   Multiple sensor data may be concatenated. Make sure the _data pointer is
+ *          updated before getting Sensor Property ID of the corresponding sensor data.
+ *
+ *  @param  _data Pointer to the start of the sensor data.
+ *  @param  _fmt  Format of the sensor data.
+ *
+ *  @return Sensor Property ID of the sensor data.
+ */
+#define ESP_BLE_MESH_GET_SENSOR_DATA_PROPERTY_ID(_data, _fmt)   \
+            (((_fmt) == ESP_BLE_MESH_SENSOR_DATA_FORMAT_A) ? ((((_data)[1]) << 3) | (((_data)[0]) >> 5)) : ((((_data)[2]) << 8) | ((_data)[1])))
+
+/** @def    ESP_BLE_MESH_SENSOR_DATA_FORMAT_A_MPID
+ *
+ *  @brief  Generate a MPID value for sensor data with Format A.
+ *
+ *  @note   1. The Format field is 0b0 and indicates that Format A is used.
+ *          2. The Length field is a 1-based uint4 value (valid range 0x0–0xF,
+ *             representing range of 1–16).
+ *          3. The Property ID is an 11-bit bit field representing 11 LSb of a Property ID.
+ *          4. This format may be used for Property Values that are not longer than 16
+ *             octets and for Property IDs less than 0x0800.
+ *
+ *  @param  _len Length of Sensor Raw value.
+ *  @param  _id  Sensor Property ID.
+ *
+ *  @return 2-octet MPID value for sensor data with Format A.
+ *
+ */
+#define ESP_BLE_MESH_SENSOR_DATA_FORMAT_A_MPID(_len, _id) \
+        ((((_id) & BIT_MASK(11)) << 5) | (((_len) & BIT_MASK(4)) << 1) | ESP_BLE_MESH_SENSOR_DATA_FORMAT_A)
+
+/** @def    ESP_BLE_MESH_SENSOR_DATA_FORMAT_B_MPID
+ *
+ *  @brief  Generate a MPID value for sensor data with Format B.
+ *
+ *  @note   1. The Format field is 0b1 and indicates Format B is used.
+ *          2. The Length field is a 1-based uint7 value (valid range 0x0–0x7F, representing
+ *             range of 1–127). The value 0x7F represents a length of zero.
+ *          3. The Property ID is a 16-bit bit field representing a Property ID.
+ *          4. This format may be used for Property Values not longer than 128 octets and for
+ *             any Property IDs. Property values longer than 128 octets are not supported by
+ *             the Sensor Status message.
+ *          5. Exclude the generated 1-octet value, the 2-octet Sensor Property ID
+ *
+ *  @param  _len Length of Sensor Raw value.
+ *  @param  _id  Sensor Property ID.
+ *
+ *  @return 3-octet MPID value for sensor data with Format B.
+ *
+ */
+#define ESP_BLE_MESH_SENSOR_DATA_FORMAT_B_MPID(_len, _id) \
+        (((_id) << 8) | (((_len) & BIT_MASK(7)) << 1) | ESP_BLE_MESH_SENSOR_DATA_FORMAT_B)
+
+/** This enum value is value of Sensor Sampling Function */
+enum esp_ble_mesh_sensor_sample_func {
+    ESP_BLE_MESH_SAMPLE_FUNC_UNSPECIFIED,
+    ESP_BLE_MESH_SAMPLE_FUNC_INSTANTANEOUS,
+    ESP_BLE_MESH_SAMPLE_FUNC_ARITHMETIC_MEAN,
+    ESP_BLE_MESH_SAMPLE_FUNC_RMS,
+    ESP_BLE_MESH_SAMPLE_FUNC_MAXIMUM,
+    ESP_BLE_MESH_SAMPLE_FUNC_MINIMUM,
+    ESP_BLE_MESH_SAMPLE_FUNC_ACCUMULATED,
+    ESP_BLE_MESH_SAMPLE_FUNC_COUNT,
+};
+
+/** Parameters of Sensor Descriptor state */
+typedef struct {
+    uint32_t positive_tolerance : 12,   /*!< The value of Sensor Positive Tolerance field */
+             negative_tolerance : 12,   /*!< The value of Sensor Negative Tolerance field */
+             sampling_function : 8;     /*!< The value of Sensor Sampling Function field */
+    uint8_t  measure_period;            /*!< The value of Sensor Measurement Period field */
+    uint8_t  update_interval;           /*!< The value of Sensor Update Interval field */
+} esp_ble_mesh_sensor_descriptor_t;
+
+/** Parameters of Sensor Setting state */
+typedef struct {
+    uint16_t property_id;       /*!< The value of Sensor Setting Property ID field */
+    uint8_t  access;            /*!< The value of Sensor Setting Access field */
+    struct net_buf_simple *raw; /*!< The value of Sensor Setting Raw field */
+} esp_ble_mesh_sensor_setting_t;
+
+/** Parameters of Sensor Cadence state */
+typedef struct {
+    uint8_t period_divisor : 7, /*!< The value of Fast Cadence Period Divisor field */
+            trigger_type : 1;   /*!< The value of Status Trigger Type field */
+    /**
+     * Note:
+     * The parameter "size" in trigger_delta_down, trigger_delta_up, fast_cadence_low &
+     * fast_cadence_high indicates the exact length of these four parameters, and they
+     * are associated with the Sensor Property ID. Users need to initialize the "size"
+     * precisely.
+     */
+    struct net_buf_simple *trigger_delta_down;  /*!< The value of Status Trigger Delta Down field */
+    struct net_buf_simple *trigger_delta_up;    /*!< The value of Status Trigger Delta Up field */
+    uint8_t min_interval;                       /*!< The value of Status Min Interval field */
+    struct net_buf_simple *fast_cadence_low;    /*!< The value of Fast Cadence Low field */
+    struct net_buf_simple *fast_cadence_high;   /*!< The value of Fast Cadence High field */
+} esp_ble_mesh_sensor_cadence_t;
+
+/** Parameters of Sensor Data state */
+typedef struct {
+    /**
+     * Format A: The Length field is a 1-based uint4 value (valid range 0x0–0xF,
+     *           representing range of 1 – 16).
+     * Format B: The Length field is a 1-based uint7 value (valid range 0x0–0x7F,
+     *           representing range of 1 – 127). The value 0x7F represents a
+     *           length of zero.
+     */
+    uint8_t format : 1, /*!< The value of the Sensor Data format */
+            length : 7; /*!< The value of the Sensor Data length */
+    struct net_buf_simple *raw_value;   /*!< The value of Sensor Data raw value */
+} esp_ble_mesh_sensor_data_t;
+
+/** Parameters of Sensor Series Column state */
+typedef struct {
+    struct net_buf_simple *raw_value_x;     /*!< The value of Sensor Raw Value X field */
+    struct net_buf_simple *column_width;    /*!< The value of Sensor Column Width field */
+    struct net_buf_simple *raw_value_y;     /*!< The value of Sensor Raw Value Y field */
+} esp_ble_mesh_sensor_series_column_t;
+
+/** Parameters of Sensor states */
+typedef struct {
+    uint16_t sensor_property_id;    /*!< The value of Sensor Property ID field */
+
+    /* Constant throughout the lifetime of an element */
+    esp_ble_mesh_sensor_descriptor_t descriptor;    /*!< Parameters of the Sensor Descriptor state */
+
+    /**
+     * Multiple Sensor Setting states may be present for each sensor.
+     * The Sensor Setting Property ID values shall be unique for each
+     * Sensor Property ID that identifies a sensor within an element.
+     */
+    const uint8_t setting_count;                /*!<  */
+    esp_ble_mesh_sensor_setting_t *settings;    /*!< Parameters of the Sensor Setting state */
+
+    /**
+     * The Sensor Cadence state may be not supported by sensors based
+     * on device properties referencing "non-scalar characteristics"
+     * such as "histograms" or "composite characteristics".
+     */
+    esp_ble_mesh_sensor_cadence_t *cadence;     /*!< Parameters of the Sensor Cadence state */
+
+    esp_ble_mesh_sensor_data_t sensor_data;     /*!< Parameters of the Sensor Data state */
+
+    esp_ble_mesh_sensor_series_column_t series_column;  /*!< Parameters of the Sensor Series Column state */
+} esp_ble_mesh_sensor_state_t;
+
+/** User data of Sensor Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Sensor Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    const uint8_t state_count;                  /*!< Sensor state count */
+    esp_ble_mesh_sensor_state_t *states;        /*!< Parameters of the Sensor states */
+} esp_ble_mesh_sensor_srv_t;
+
+/** User data of Sensor Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Sensor Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    const uint8_t state_count;                  /*!< Sensor state count */
+    esp_ble_mesh_sensor_state_t *states;        /*!< Parameters of the Sensor states */
+} esp_ble_mesh_sensor_setup_srv_t;
+
+/** Parameters of Sensor Cadence Set state change event */
+typedef struct {
+    uint16_t property_id;           /*!< The value of Sensor Property ID state */
+    uint8_t  period_divisor : 7,    /*!< The value of Fast Cadence Period Divisor state */
+             trigger_type : 1;      /*!< The value of Status Trigger Type state */
+    struct net_buf_simple *trigger_delta_down;  /*!< The value of Status Trigger Delta Down state */
+    struct net_buf_simple *trigger_delta_up;    /*!< The value of Status Trigger Delta Up state */
+    uint8_t min_interval;                       /*!< The value of Status Min Interval state */
+    struct net_buf_simple *fast_cadence_low;    /*!< The value of Fast Cadence Low state */
+    struct net_buf_simple *fast_cadence_high;   /*!< The value of Fast Cadence High state */
+} esp_ble_mesh_state_change_sensor_cadence_set_t;
+
+/** Parameters of Sensor Setting Set state change event */
+typedef struct {
+    uint16_t property_id;           /*!< The value of Sensor Property ID state */
+    uint16_t setting_property_id;   /*!< The value of Sensor Setting Property ID state */
+    struct net_buf_simple *setting_value;   /*!< The value of Sensor Property Value state */
+} esp_ble_mesh_state_change_sensor_setting_set_t;
+
+/**
+ * @brief Sensor Server Model state change value union
+ */
+typedef union {
+    /**
+     * The recv_op in ctx can be used to decide which state is changed.
+     */
+    esp_ble_mesh_state_change_sensor_cadence_set_t sensor_cadence_set;  /*!< Sensor Cadence Set */
+    esp_ble_mesh_state_change_sensor_setting_set_t sensor_setting_set;  /*!< Sensor Setting Set */
+} esp_ble_mesh_sensor_server_state_change_t;
+
+/** Context of the received Sensor Descriptor Get message */
+typedef struct {
+    bool  op_en;    /*!< Indicate if optional parameters are included */
+    uint16_t property_id;   /*!< Property ID of a sensor (optional) */
+} esp_ble_mesh_server_recv_sensor_descriptor_get_t;
+
+/** Context of the received Sensor Cadence Get message */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID of a sensor */
+} esp_ble_mesh_server_recv_sensor_cadence_get_t;
+
+/** Context of the received Sensor Settings Get message */
+typedef struct {
+    uint16_t property_id;   /*!< Property ID of a sensor */
+} esp_ble_mesh_server_recv_sensor_settings_get_t;
+
+/** Context of the received Sensor Setting Get message */
+typedef struct {
+    uint16_t property_id;           /*!< Property ID of a sensor */
+    uint16_t setting_property_id;   /*!< Setting ID identifying a setting within a sensor */
+} esp_ble_mesh_server_recv_sensor_setting_get_t;
+
+/** Context of the received Sensor Get message */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included  */
+    uint16_t property_id;   /*!< Property ID for the sensor (optional) */
+} esp_ble_mesh_server_recv_sensor_get_t;
+
+/** Context of the received Sensor Column Get message */
+typedef struct {
+    uint16_t property_id;   /*!< Property identifying a sensor */
+    struct net_buf_simple *raw_value_x; /*!< Raw value identifying a column */
+} esp_ble_mesh_server_recv_sensor_column_get_t;
+
+/** Context of the received Sensor Series Get message */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t property_id;   /*!< Property identifying a sensor */
+    struct net_buf_simple *raw_value;   /*!< Raw value containing X1 and X2 (optional) */
+} esp_ble_mesh_server_recv_sensor_series_get_t;
+
+/**
+ * @brief Sensor Server Model received get message union
+ */
+typedef union {
+    esp_ble_mesh_server_recv_sensor_descriptor_get_t sensor_descriptor; /*!< Sensor Descriptor Get */
+    esp_ble_mesh_server_recv_sensor_cadence_get_t    sensor_cadence;    /*!< Sensor Cadence Get */
+    esp_ble_mesh_server_recv_sensor_settings_get_t   sensor_settings;   /*!< Sensor Settings Get */
+    esp_ble_mesh_server_recv_sensor_setting_get_t    sensor_setting;    /*!< Sensor Setting Get */
+    esp_ble_mesh_server_recv_sensor_get_t            sensor_data;       /*!< Sensor Get */
+    esp_ble_mesh_server_recv_sensor_column_get_t     sensor_column;     /*!< Sensor Column Get */
+    esp_ble_mesh_server_recv_sensor_series_get_t     sensor_series;     /*!< Sensor Series Get */
+} esp_ble_mesh_sensor_server_recv_get_msg_t;
+
+/** Context of the received Sensor Cadence Set message */
+typedef struct {
+    uint16_t property_id;           /*!< Property ID for the sensor */
+    struct net_buf_simple *cadence; /*!< Value of Sensor Cadence state */
+} esp_ble_mesh_server_recv_sensor_cadence_set_t;
+
+/** Context of the received Sensor Setting Set message */
+typedef struct {
+    uint16_t property_id;           /*!< Property ID identifying a sensor */
+    uint16_t setting_property_id;   /*!< Setting ID identifying a setting within a sensor */
+    struct net_buf_simple *setting_raw; /*!< Raw value for the setting */
+} esp_ble_mesh_server_recv_sensor_setting_set_t;
+
+/**
+ * @brief Sensor Server Model received set message union
+ */
+typedef union {
+    esp_ble_mesh_server_recv_sensor_cadence_set_t sensor_cadence;   /*!< Sensor Cadence Set */
+    esp_ble_mesh_server_recv_sensor_setting_set_t sensor_setting;   /*!< Sensor Setting Set */
+} esp_ble_mesh_sensor_server_recv_set_msg_t;
+
+/**
+ * @brief Sensor Server Model callback value union
+ */
+typedef union {
+    esp_ble_mesh_sensor_server_state_change_t state_change; /*!< ESP_BLE_MESH_SENSOR_SERVER_STATE_CHANGE_EVT */
+    esp_ble_mesh_sensor_server_recv_get_msg_t get;  /*!< ESP_BLE_MESH_SENSOR_SERVER_RECV_GET_MSG_EVT */
+    esp_ble_mesh_sensor_server_recv_set_msg_t set;  /*!< ESP_BLE_MESH_SENSOR_SERVER_RECV_SET_MSG_EVT */
+} esp_ble_mesh_sensor_server_cb_value_t;
+
+/** Sensor Server Model callback parameters */
+typedef struct {
+    esp_ble_mesh_model_t  *model;   /*!< Pointer to Sensor Server Models */
+    esp_ble_mesh_msg_ctx_t ctx;     /*!< Context of the received messages */
+    esp_ble_mesh_sensor_server_cb_value_t value;    /*!< Value of the received Sensor Messages */
+} esp_ble_mesh_sensor_server_cb_param_t;
+
+/** This enum value is the event of Sensor Server Model */
+typedef enum {
+    /**
+     * 1. When get_auto_rsp is set to ESP_BLE_MESH_SERVER_AUTO_RSP, no event will be
+     *    callback to the application layer when Sensor Get messages are received.
+     * 2. When set_auto_rsp is set to ESP_BLE_MESH_SERVER_AUTO_RSP, this event will
+     *    be callback to the application layer when Sensor Set/Set Unack messages
+     *    are received.
+     */
+    ESP_BLE_MESH_SENSOR_SERVER_STATE_CHANGE_EVT,
+    /**
+     * When get_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, this event will be
+     * callback to the application layer when Sensor Get messages are received.
+     */
+    ESP_BLE_MESH_SENSOR_SERVER_RECV_GET_MSG_EVT,
+    /**
+     * When set_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, this event will be
+     * callback to the application layer when Sensor Set/Set Unack messages are received.
+     */
+    ESP_BLE_MESH_SENSOR_SERVER_RECV_SET_MSG_EVT,
+    ESP_BLE_MESH_SENSOR_SERVER_EVT_MAX,
+} esp_ble_mesh_sensor_server_cb_event_t;
+
+/**
+ *  @brief Bluetooth Mesh Sensor Server Model function.
+ */
+
+/**
+ * @brief   Sensor Server Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_sensor_server_cb_t)(esp_ble_mesh_sensor_server_cb_event_t event,
+                                                 esp_ble_mesh_sensor_server_cb_param_t *param);
+
+/**
+ * @brief       Register BLE Mesh Sensor Server Model callback.
+ *
+ * @param[in]   callback: Pointer to the callback function.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_sensor_server_callback(esp_ble_mesh_sensor_server_cb_t callback);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_SENSOR_MODEL_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_time_scene_model_api.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_time_scene_model_api.h
new file mode 100644
index 00000000000..07e5a5ba017
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/api/models/include/esp_ble_mesh_time_scene_model_api.h
@@ -0,0 +1,911 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/** @file
+ *  @brief Bluetooth Mesh Time and Scene Client Model APIs.
+ */
+
+#ifndef _ESP_BLE_MESH_TIME_SCENE_MODEL_API_H_
+#define _ESP_BLE_MESH_TIME_SCENE_MODEL_API_H_
+
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @def    ESP_BLE_MESH_MODEL_TIME_CLI
+ *
+ *  @brief  Define a new Time Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Time Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Time Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_TIME_CLI(cli_pub, cli_data)         \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_TIME_CLI, \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_SCENE_CLI
+ *
+ *  @brief  Define a new Scene Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Scene Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Scene Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_SCENE_CLI(cli_pub, cli_data)         \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_SCENE_CLI, \
+                    NULL, cli_pub, cli_data)
+
+/** @def    ESP_BLE_MESH_MODEL_SCHEDULER_CLI
+ *
+ *  @brief  Define a new Scheduler Client Model.
+ *
+ *  @note   This API needs to be called for each element on which
+ *          the application needs to have a Scheduler Client Model.
+ *
+ *  @param  cli_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  cli_data Pointer to the unique struct esp_ble_mesh_client_t.
+ *
+ *  @return New Scheduler Client Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_SCHEDULER_CLI(cli_pub, cli_data)         \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_SCHEDULER_CLI, \
+                    NULL, cli_pub, cli_data)
+
+/**
+ *  @brief Bluetooth Mesh Time Scene Client Model Get and Set parameters structure.
+ */
+
+/** Parameters of Time Set */
+typedef struct {
+    uint8_t  tai_seconds[5];        /*!< The current TAI time in seconds */
+    uint8_t  sub_second;            /*!< The sub-second time in units of 1/256 second */
+    uint8_t  uncertainty;           /*!< The estimated uncertainty in 10-millisecond steps */
+    uint16_t time_authority : 1;    /*!< 0 = No Time Authority, 1 = Time Authority */
+    uint16_t tai_utc_delta : 15;    /*!< Current difference between TAI and UTC in seconds */
+    uint8_t  time_zone_offset;      /*!< The local time zone offset in 15-minute increments */
+} esp_ble_mesh_time_set_t;
+
+/** Parameters of Time Zone Set */
+typedef struct {
+    uint8_t time_zone_offset_new;   /*!< Upcoming local time zone offset */
+    uint8_t tai_zone_change[5];     /*!< TAI Seconds time of the upcoming Time Zone Offset change */
+} esp_ble_mesh_time_zone_set_t;
+
+/** Parameters of TAI-UTC Delta Set */
+typedef struct {
+    uint16_t tai_utc_delta_new : 15;   /*!< Upcoming difference between TAI and UTC in seconds */
+    uint16_t padding : 1;              /*!< Always 0b0. Other values are Prohibited. */
+    uint8_t tai_delta_change[5];       /*!< TAI Seconds time of the upcoming TAI-UTC Delta change */
+} esp_ble_mesh_tai_utc_delta_set_t;
+
+/** Parameter of Time Role Set */
+typedef struct {
+    uint8_t time_role;      /*!< The Time Role for the element */
+} esp_ble_mesh_time_role_set_t;
+
+/** Parameter of Scene Store */
+typedef struct {
+    uint16_t scene_number;  /*!< The number of scenes to be stored */
+} esp_ble_mesh_scene_store_t;
+
+/** Parameters of Scene Recall */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t scene_number;  /*!< The number of scenes to be recalled */
+    uint8_t  tid;           /*!< Transaction ID */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_scene_recall_t;
+
+/** Parameter of Scene Delete */
+typedef struct {
+    uint16_t scene_number;  /*!< The number of scenes to be deleted */
+} esp_ble_mesh_scene_delete_t;
+
+/** Parameter of Scheduler Action Get */
+typedef struct {
+    uint8_t index;  /*!< Index of the Schedule Register entry to get */
+} esp_ble_mesh_scheduler_act_get_t;
+
+/** Parameters of Scheduler Action Set */
+typedef struct {
+    uint64_t index : 4;         /*!< Index of the Schedule Register entry to set */
+    uint64_t year : 7;          /*!< Scheduled year for the action */
+    uint64_t month : 12;        /*!< Scheduled month for the action */
+    uint64_t day : 5;           /*!< Scheduled day of the month for the action */
+    uint64_t hour : 5;          /*!< Scheduled hour for the action */
+    uint64_t minute : 6;        /*!< Scheduled minute for the action */
+    uint64_t second : 6;        /*!< Scheduled second for the action */
+    uint64_t day_of_week : 7;   /*!< Schedule days of the week for the action */
+    uint64_t action : 4;        /*!< Action to be performed at the scheduled time */
+    uint64_t trans_time : 8;    /*!< Transition time for this action */
+    uint16_t scene_number;      /*!< Transition time for this action */
+} esp_ble_mesh_scheduler_act_set_t;
+
+/**
+ * @brief Time Scene Client Model get message union
+ */
+typedef union {
+    esp_ble_mesh_scheduler_act_get_t scheduler_act_get; /*!< For ESP_BLE_MESH_MODEL_OP_SCHEDULER_ACT_GET */
+} esp_ble_mesh_time_scene_client_get_state_t;
+
+/**
+ * @brief Time Scene Client Model set message union
+ */
+typedef union {
+    esp_ble_mesh_time_set_t          time_set;          /*!< For ESP_BLE_MESH_MODEL_OP_TIME_SET */
+    esp_ble_mesh_time_zone_set_t     time_zone_set;     /*!< For ESP_BLE_MESH_MODEL_OP_TIME_ZONE_SET */
+    esp_ble_mesh_tai_utc_delta_set_t tai_utc_delta_set; /*!< For ESP_BLE_MESH_MODEL_OP_TAI_UTC_DELTA_SET */
+    esp_ble_mesh_time_role_set_t     time_role_set;     /*!< For ESP_BLE_MESH_MODEL_OP_TIME_ROLE_SET */
+    esp_ble_mesh_scene_store_t       scene_store;       /*!< For ESP_BLE_MESH_MODEL_OP_SCENE_STORE & ESP_BLE_MESH_MODEL_OP_SCENE_STORE_UNACK */
+    esp_ble_mesh_scene_recall_t      scene_recall;      /*!< For ESP_BLE_MESH_MODEL_OP_SCENE_RECALL & ESP_BLE_MESH_MODEL_OP_SCENE_RECALL_UNACK */
+    esp_ble_mesh_scene_delete_t      scene_delete;      /*!< For ESP_BLE_MESH_MODEL_OP_SCENE_DELETE & ESP_BLE_MESH_MODEL_OP_SCENE_DELETE_UNACK */
+    esp_ble_mesh_scheduler_act_set_t scheduler_act_set; /*!< For ESP_BLE_MESH_MODEL_OP_SCHEDULER_ACT_SET & ESP_BLE_MESH_MODEL_OP_SCHEDULER_ACT_SET_UNACK */
+} esp_ble_mesh_time_scene_client_set_state_t;
+
+/**
+ *  @brief Bluetooth Mesh Time Scene Client Model Get and Set callback parameters structure.
+ */
+
+/** Parameters of Time Status */
+typedef struct {
+    uint8_t  tai_seconds[5];           /*!< The current TAI time in seconds */
+    uint8_t  sub_second;               /*!< The sub-second time in units of 1/256 second */
+    uint8_t  uncertainty;              /*!< The estimated uncertainty in 10-millisecond steps */
+    uint16_t time_authority : 1;       /*!< 0 = No Time Authority, 1 = Time Authority */
+    uint16_t tai_utc_delta : 15;       /*!< Current difference between TAI and UTC in seconds */
+    uint8_t  time_zone_offset;         /*!< The local time zone offset in 15-minute increments */
+} esp_ble_mesh_time_status_cb_t;
+
+/** Parameters of Time Zone Status */
+typedef struct {
+    uint8_t time_zone_offset_curr;     /*!< Current local time zone offset */
+    uint8_t time_zone_offset_new;      /*!< Upcoming local time zone offset */
+    uint8_t tai_zone_change[5];        /*!< TAI Seconds time of the upcoming Time Zone Offset change */
+} esp_ble_mesh_time_zone_status_cb_t;
+
+/** Parameters of TAI-UTC Delta Status */
+typedef struct {
+    uint16_t tai_utc_delta_curr : 15;  /*!< Current difference between TAI and UTC in seconds */
+    uint16_t padding_1 : 1;            /*!< Always 0b0. Other values are Prohibited. */
+    uint16_t tai_utc_delta_new : 15;   /*!< Upcoming difference between TAI and UTC in seconds */
+    uint16_t padding_2 : 1;            /*!< Always 0b0. Other values are Prohibited. */
+    uint8_t tai_delta_change[5];       /*!< TAI Seconds time of the upcoming TAI-UTC Delta change */
+} esp_ble_mesh_tai_utc_delta_status_cb_t;
+
+/** Parameter of Time Role Status */
+typedef struct {
+    uint8_t time_role;  /*!< The Time Role for the element */
+} esp_ble_mesh_time_role_status_cb_t;
+
+/** Parameters of Scene Status */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint8_t  status_code;   /*!< Status code of the last operation */
+    uint16_t current_scene; /*!< Scene Number of the current scene */
+    uint16_t target_scene;  /*!< Scene Number of the target scene (optional) */
+    uint8_t  remain_time;   /*!< Time to complete state transition (C.1) */
+} esp_ble_mesh_scene_status_cb_t;
+
+/** Parameters of Scene Register Status */
+typedef struct {
+    uint8_t  status_code;   /*!< Status code for the previous operation */
+    uint16_t current_scene; /*!< Scene Number of the current scene */
+    struct net_buf_simple *scenes;  /*!< A list of scenes stored within an element */
+} esp_ble_mesh_scene_register_status_cb_t;
+
+/** Parameter of Scheduler Status */
+typedef struct {
+    uint16_t schedules;     /*!< Bit field indicating defined Actions in the Schedule Register */
+} esp_ble_mesh_scheduler_status_cb_t;
+
+/** Parameters of Scheduler Action Status */
+typedef struct {
+    uint64_t index : 4;         /*!< Enumerates (selects) a Schedule Register entry */
+    uint64_t year : 7;          /*!< Scheduled year for the action */
+    uint64_t month : 12;        /*!< Scheduled month for the action */
+    uint64_t day : 5;           /*!< Scheduled day of the month for the action */
+    uint64_t hour : 5;          /*!< Scheduled hour for the action */
+    uint64_t minute : 6;        /*!< Scheduled minute for the action */
+    uint64_t second : 6;        /*!< Scheduled second for the action */
+    uint64_t day_of_week : 7;   /*!< Schedule days of the week for the action */
+    uint64_t action : 4;        /*!< Action to be performed at the scheduled time */
+    uint64_t trans_time : 8;    /*!< Transition time for this action */
+    uint16_t scene_number;      /*!< Transition time for this action */
+} esp_ble_mesh_scheduler_act_status_cb_t;
+
+/**
+ * @brief Time Scene Client Model received message union
+ */
+typedef union {
+    esp_ble_mesh_time_status_cb_t           time_status;            /*!< For ESP_BLE_MESH_MODEL_OP_TIME_STATUS */
+    esp_ble_mesh_time_zone_status_cb_t      time_zone_status;       /*!< For ESP_BLE_MESH_MODEL_OP_TIME_ZONE_STATUS */
+    esp_ble_mesh_tai_utc_delta_status_cb_t  tai_utc_delta_status;   /*!< For ESP_BLE_MESH_MODEL_OP_TAI_UTC_DELTA_STATUS */
+    esp_ble_mesh_time_role_status_cb_t      time_role_status;       /*!< For ESP_BLE_MESH_MODEL_OP_TIME_ROLE_STATUS */
+    esp_ble_mesh_scene_status_cb_t          scene_status;           /*!< For ESP_BLE_MESH_MODEL_OP_SCENE_STATUS */
+    esp_ble_mesh_scene_register_status_cb_t scene_register_status;  /*!< For ESP_BLE_MESH_MODEL_OP_SCENE_REGISTER_STATUS */
+    esp_ble_mesh_scheduler_status_cb_t      scheduler_status;       /*!< For ESP_BLE_MESH_MODEL_OP_SCHEDULER_STATUS */
+    esp_ble_mesh_scheduler_act_status_cb_t  scheduler_act_status;   /*!< For ESP_BLE_MESH_MODEL_OP_SCHEDULER_ACT_STATUS */
+} esp_ble_mesh_time_scene_client_status_cb_t;
+
+/** Time Scene Client Model callback parameters */
+typedef struct {
+    int error_code;                                         /*!< Appropriate error code */
+    esp_ble_mesh_client_common_param_t        *params;      /*!< The client common parameters. */
+    esp_ble_mesh_time_scene_client_status_cb_t status_cb;   /*!< The scene status message callback values */
+} esp_ble_mesh_time_scene_client_cb_param_t;
+
+/** This enum value is the event of Time Scene Client Model */
+typedef enum {
+    ESP_BLE_MESH_TIME_SCENE_CLIENT_GET_STATE_EVT,
+    ESP_BLE_MESH_TIME_SCENE_CLIENT_SET_STATE_EVT,
+    ESP_BLE_MESH_TIME_SCENE_CLIENT_PUBLISH_EVT,
+    ESP_BLE_MESH_TIME_SCENE_CLIENT_TIMEOUT_EVT,
+    ESP_BLE_MESH_TIME_SCENE_CLIENT_EVT_MAX,
+} esp_ble_mesh_time_scene_client_cb_event_t;
+
+/**
+ *  @brief Bluetooth Mesh Time Scene Client Model function.
+ */
+
+/**
+ * @brief   Time Scene Client Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_time_scene_client_cb_t)(esp_ble_mesh_time_scene_client_cb_event_t event,
+                                                     esp_ble_mesh_time_scene_client_cb_param_t *param);
+
+/**
+ * @brief       Register BLE Mesh Time Scene Client Model callback.
+ *
+ * @param[in]   callback: Pointer to the callback function.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_time_scene_client_callback(esp_ble_mesh_time_scene_client_cb_t callback);
+
+/**
+ * @brief       Get the value of Time Scene Server Model states using the Time Scene Client Model get messages.
+ *
+ * @note        If you want to know the opcodes and corresponding meanings accepted by this API,
+ *              please refer to esp_ble_mesh_time_scene_message_opcode_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]   params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]   get_state: Pointer to time scene get message value.
+ *                         Shall not be set to NULL.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ */
+esp_err_t esp_ble_mesh_time_scene_client_get_state(esp_ble_mesh_client_common_param_t *params,
+                                                   esp_ble_mesh_time_scene_client_get_state_t *get_state);
+
+/**
+ * @brief       Set the value of Time Scene Server Model states using the Time Scene Client Model set messages.
+ *
+ * @note        If you want to know the opcodes and corresponding meanings accepted by this API,
+ *              please refer to esp_ble_mesh_time_scene_message_opcode_t in esp_ble_mesh_defs.h
+ *
+ * @param[in]   params:    Pointer to BLE Mesh common client parameters.
+ * @param[in]   set_state: Pointer to time scene set message value.
+ *                         Shall not be set to NULL.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ */
+esp_err_t esp_ble_mesh_time_scene_client_set_state(esp_ble_mesh_client_common_param_t *params,
+                                                   esp_ble_mesh_time_scene_client_set_state_t *set_state);
+
+/**
+ * @brief Time Scene Server Models related context.
+ */
+
+/** @def    ESP_BLE_MESH_MODEL_TIME_SRV
+ *
+ *  @brief  Define a new Time Server Model.
+ *
+ *  @note   1. The Time Server model is a root model. When this model is present on an
+ *             Element, the corresponding Time Setup Server model shall also be present.
+ *          2. This model shall support model publication and model subscription.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_time_srv_t.
+ *
+ *  @return New Time Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_TIME_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_TIME_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_TIME_SETUP_SRV
+ *
+ *  @brief  Define a new Time Setup Server Model.
+ *
+ *  @note   1. The Time Setup Server model extends the Time Server model. Time is
+ *             sensitive information that is propagated across a mesh network.
+ *          2. Only an authorized Time Client should be allowed to change the Time
+ *             and Time Role states. A dedicated application key Bluetooth SIG
+ *             Proprietary should be used on the Time Setup Server to restrict
+ *             access to the server to only authorized Time Clients.
+ *          3. This model does not support subscribing nor publishing.
+ *
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_time_setup_srv_t.
+ *
+ *  @return New Time Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_TIME_SETUP_SRV(srv_data)                     \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_TIME_SETUP_SRV,    \
+                    NULL, NULL, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_SCENE_SRV
+ *
+ *  @brief  Define a new Scene Server Model.
+ *
+ *  @note   1. The Scene Server model is a root model. When this model is present
+ *             on an Element, the corresponding Scene Setup Server model shall
+ *             also be present.
+ *          2. This model shall support model publication and model subscription.
+ *          3. The model may be present only on the Primary element of a node.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_scene_srv_t.
+ *
+ *  @return New Scene Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_SCENE_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_SCENE_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_SCENE_SETUP_SRV
+ *
+ *  @brief  Define a new Scene Setup Server Model.
+ *
+ *  @note   1. The Scene Setup Server model extends the Scene Server model and
+ *             the Generic Default Transition Time Server model.
+ *          2. This model shall support model subscription.
+ *          3. The model may be present only on the Primary element of a node.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_scene_setup_srv_t.
+ *
+ *  @return New Scene Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_SCENE_SETUP_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_SCENE_SETUP_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_SCHEDULER_SRV
+ *
+ *  @brief  Define a new Scheduler Server Model.
+ *
+ *  @note   1. The Scheduler Server model extends the Scene Server model. When
+ *             this model is present on an Element, the corresponding Scheduler
+ *             Setup Server model shall also be present.
+ *          2. This model shall support model publication and model subscription.
+ *          3. The model may be present only on the Primary element of a node.
+ *          4. The model requires the Time Server model shall be present on the element.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_scheduler_srv_t.
+ *
+ *  @return New Scheduler Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_SCHEDULER_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_SCHEDULER_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+/** @def    ESP_BLE_MESH_MODEL_SCHEDULER_SETUP_SRV
+ *
+ *  @brief  Define a new Scheduler Setup Server Model.
+ *
+ *  @note   1. The Scheduler Setup Server model extends the Scheduler Server and
+ *             the Scene Setup Server models.
+ *          2. This model shall support model subscription.
+ *          3. The model may be present only on the Primary element of a node.
+ *
+ *  @param  srv_pub  Pointer to the unique struct esp_ble_mesh_model_pub_t.
+ *  @param  srv_data Pointer to the unique struct esp_ble_mesh_scheduler_setup_srv_t.
+ *
+ *  @return New Scheduler Setup Server Model instance.
+ */
+#define ESP_BLE_MESH_MODEL_SCHEDULER_SETUP_SRV(srv_pub, srv_data)             \
+        ESP_BLE_MESH_SIG_MODEL(ESP_BLE_MESH_MODEL_ID_SCHEDULER_SETUP_SRV,     \
+                    NULL, srv_pub, srv_data)
+
+#define ESP_BLE_MESH_UNKNOWN_TAI_SECONDS        0x0000000000    /*!< Unknown TAI Seconds */
+#define ESP_BLE_MESH_UNKNOWN_TAI_ZONE_CHANGE    0x0000000000    /*!< Unknown TAI of Zone Change */
+#define ESP_BLE_MESH_UNKNOWN_TAI_DELTA_CHANGE   0x0000000000    /*!< Unknown TAI of Delta Change */
+
+#define ESP_BLE_MESH_TAI_UTC_DELTA_MAX_VALUE    0x7FFF  /*!< Maximum TAI-UTC Delta value */
+
+#define ESP_BLE_MESH_TAI_SECONDS_LEN            0x05    /*!< Length of TAI Seconds */
+#define ESP_BLE_MESH_TAI_OF_ZONE_CHANGE_LEN     0x05    /*!< Length of TAI of Zone Change */
+#define ESP_BLE_MESH_TAI_OF_DELTA_CHANGE_LEN    0x05    /*!< Length of TAI of Delta Change */
+
+#define ESP_BLE_MESH_INVALID_SCENE_NUMBER       0x0000  /*!< Invalid Scene Number */
+#define ESP_BLE_MESH_SCENE_NUMBER_LEN           0x02    /*!< Length of the Scene Number */
+
+#define ESP_BLE_MESH_SCHEDULE_YEAR_ANY_YEAR     0x64    /*!< Any year of the Scheduled year */
+
+#define ESP_BLE_MESH_SCHEDULE_DAY_ANY_DAY       0x00    /*!< Any day of the Scheduled day */
+
+#define ESP_BLE_MESH_SCHEDULE_HOUR_ANY_HOUR     0x18    /*!< Any hour of the Scheduled hour */
+#define ESP_BLE_MESH_SCHEDULE_HOUR_ONCE_A_DAY   0x19    /*!< Any hour of the Scheduled Day */
+
+#define ESP_BLE_MESH_SCHEDULE_SEC_ANY_OF_HOUR   0x3C    /*!< Any minute of the Scheduled hour */
+#define ESP_BLE_MESH_SCHEDULE_SEC_EVERY_15_MIN  0x3D    /*!< Every 15 minutes of the Scheduled hour */
+#define ESP_BLE_MESH_SCHEDULE_SEC_EVERY_20_MIN  0x3E    /*!< Every 20 minutes of the Scheduled hour */
+#define ESP_BLE_MESH_SCHEDULE_SEC_ONCE_AN_HOUR  0x3F    /*!< Once of the Scheduled hour */
+
+#define ESP_BLE_MESH_SCHEDULE_SEC_ANY_OF_MIN    0x3C    /*!< Any second of the Scheduled minute */
+#define ESP_BLE_MESH_SCHEDULE_SEC_EVERY_15_SEC  0x3D    /*!< Every 15 seconds of the Scheduled minute */
+#define ESP_BLE_MESH_SCHEDULE_SEC_EVERY_20_SEC  0x3E    /*!< Every 20 seconds of the Scheduled minute */
+#define ESP_BLE_MESH_SCHEDULE_SEC_ONCE_AN_MIN   0x3F    /*!< Once of the Scheduled minute */
+
+#define ESP_BLE_MESH_SCHEDULE_ACT_TURN_OFF      0x00    /*!< Scheduled Action - Turn Off */
+#define ESP_BLE_MESH_SCHEDULE_ACT_TURN_ON       0x01    /*!< Scheduled Action - Turn On */
+#define ESP_BLE_MESH_SCHEDULE_ACT_SCENE_RECALL  0x02    /*!< Scheduled Action - Scene Recall */
+#define ESP_BLE_MESH_SCHEDULE_ACT_NO_ACTION     0x0F    /*!< Scheduled Action - No Action */
+
+#define ESP_BLE_MESH_SCHEDULE_SCENE_NO_SCENE    0x0000  /*!< Scheduled Scene - No Scene */
+
+#define ESP_BLE_MESH_SCHEDULE_ENTRY_MAX_INDEX   0x0F    /*!< Maximum number of Scheduled entries */
+
+#define ESP_BLE_MESH_TIME_NONE          0x00    /*!< Time Role - None */
+#define ESP_BLE_MESH_TIME_AUTHORITY     0x01    /*!< Time Role - Mesh Time Authority */
+#define ESP_BLE_MESH_TIME_RELAY         0x02    /*!< Time Role - Mesh Time Relay */
+#define ESP_BLE_MESH_TIME_CLINET        0x03    /*!< Time Role - Mesh Time Client */
+
+#define ESP_BLE_MESH_SCENE_SUCCESS      0x00    /*!< Scene operation - Success */
+#define ESP_BLE_MESH_SCENE_REG_FULL     0x01    /*!< Scene operation - Scene Register Full */
+#define ESP_BLE_MESH_SCENE_NOT_FOUND    0x02    /*!< Scene operation - Scene Not Found */
+
+/** Parameters of Time state */
+typedef struct {
+    struct {
+        uint8_t  tai_seconds[5];            /*!< The value of the TAI Seconds state */
+        uint8_t  subsecond;                 /*!< The value of the Subsecond field */
+        uint8_t  uncertainty;               /*!< The value of the Uncertainty field */
+        uint8_t  time_zone_offset_curr;     /*!< The value of the Time Zone Offset Current field */
+        uint8_t  time_zone_offset_new;      /*!< The value of the Time Zone Offset New state */
+        uint8_t  tai_zone_change[5];        /*!< The value of the TAI of Zone Chaneg field */
+        uint16_t time_authority : 1,        /*!< The value of the Time Authority bit */
+                 tai_utc_delta_curr : 15;   /*!< The value of the TAI-UTC Delta Current state */
+        uint16_t tai_utc_delta_new : 15;    /*!< The value of the TAI-UTC Delta New state */
+        uint8_t  tai_delta_change[5];       /*!< The value of the TAI of Delta Change field */
+    } time;                                 /*!< Parameters of the Time state */
+    uint8_t time_role;                      /*!< The value of the Time Role state */
+} esp_ble_mesh_time_state_t;
+
+/** User data of Time Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Time Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_time_state_t *state;           /*!< Parameters of the Time state */
+} esp_ble_mesh_time_srv_t;
+
+/** User data of Time Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Time Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_time_state_t *state;           /*!< Parameters of the Time state */
+} esp_ble_mesh_time_setup_srv_t;
+
+/**
+ * 1. Scene Store is an operation of storing values of a present state of an element.
+ * 2. The structure and meaning of the stored state is determined by a model. States
+ *    to be stored are specified by each model.
+ * 3. The Scene Store operation shall persistently store all values of all states
+ *    marked as Stored with Scene for all models present on all elements of a node.
+ * 4. If a model is extending another model, the extending model shall determine the
+ *    Stored with Scene behavior of that model.
+ */
+
+/** Parameters of Scene Register state */
+typedef struct {
+    uint16_t scene_number;  /*!< The value of the Scene Number */
+    uint8_t  scene_type;    /*!< The value of the Scene Type */
+    /**
+     * Scene value may use a union to represent later, the union contains
+     * structures of all the model states which can be stored in a scene.
+     */
+    struct net_buf_simple *scene_value; /*!< The value of the Scene Value */
+} esp_ble_mesh_scene_register_t;
+
+/**
+ * Parameters of Scenes state.
+ *
+ * Scenes serve as memory banks for storage of states (e.g., a power level
+ * or a light level/color). Values of states of an element can be stored
+ * as a scene and can be recalled later from the scene memory.
+ *
+ * A scene is represented by a Scene Number, which is a 16-bit non-zero,
+ * mesh-wide value. (There can be a maximum of 65535 scenes in a mesh
+ * network.) The meaning of a scene, as well as the state storage container
+ * associated with it, are determined by a model.
+ *
+ * The Scenes state change may start numerous parallel model transitions.
+ * In that case, each individual model handles the transition internally.
+ *
+ * The scene transition is defined as a group of individual model transitions
+ * started by a Scene Recall operation. The scene transition is in progress
+ * when at least one transition from the group of individual model transitions
+ * is in progress.
+ */
+typedef struct {
+    const uint16_t scene_count;             /*!< The Scenes state's scene count */
+    esp_ble_mesh_scene_register_t *scenes;  /*!< Parameters of the Scenes state */
+
+    /**
+     * The Current Scene state is a 16-bit value that contains either the Scene
+     * Number of the currently active scene or a value of 0x0000 when no scene
+     * is active.
+     *
+     * When a Scene Store operation or a Scene Recall operation completes with
+     * success, the Current Scene state value shall be to the Scene Number used
+     * during that operation.
+     *
+     * When the Current Scene Number is deleted from a Scene Register state as a
+     * result of Scene Delete operation, the Current Scene state shall be set to
+     * 0x0000.
+     *
+     * When any of the element's state that is marked as “Stored with Scene” has
+     * changed not as a result of a Scene Recall operation, the value of the
+     * Current Scene state shall be set to 0x0000.
+     *
+     * When a scene transition is in progress, the value of the Current Scene
+     * state shall be set to 0x0000.
+     */
+    uint16_t current_scene;     /*!< The value of the Current Scene state */
+
+    /**
+     * The Target Scene state is a 16-bit value that contains the target Scene
+     * Number when a scene transition is in progress.
+     *
+     * When the scene transition is in progress and the target Scene Number is
+     * deleted from a Scene Register state as a result of Scene Delete operation,
+     * the Target Scene state shall be set to 0x0000.
+     *
+     * When the scene transition is in progress and a new Scene Number is stored
+     * in the Scene Register as a result of Scene Store operation, the Target
+     * Scene state shall be set to the new Scene Number.
+     *
+     * When the scene transition is not in progress, the value of the Target Scene
+     * state shall be set to 0x0000.
+     */
+    uint16_t target_scene;      /*!< The value of the Target Scene state */
+
+    /* Indicate the status code for the last operation */
+    uint8_t status_code;        /*!< The status code of the last scene operation */
+
+    /* Indicate if scene transition is in progress */
+    bool in_progress;           /*!< Indicate if the scene transition is in progress */
+} esp_ble_mesh_scenes_state_t;
+
+/** User data of Scene Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Scene Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_scenes_state_t *state;         /*!< Parameters of the Scenes state */
+    esp_ble_mesh_last_msg_info_t last;          /*!< Parameters of the last received set message */
+    esp_ble_mesh_state_transition_t transition; /*!< Parameters of state transition */
+} esp_ble_mesh_scene_srv_t;
+
+/** User data of Scene Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Scene Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_scenes_state_t *state;         /*!< Parameters of the Scenes state */
+} esp_ble_mesh_scene_setup_srv_t;
+
+/** Parameters of Scheduler Register state */
+typedef struct {
+    bool in_use;                /*!< Indicate if the registered schedule is in use */
+    uint64_t year : 7,          /*!< The value of Scheduled year for the action */
+             month : 12,        /*!< The value of Scheduled month for the action */
+             day : 5,           /*!< The value of Scheduled day of the month for the action */
+             hour : 5,          /*!< The value of Scheduled hour for the action */
+             minute : 6,        /*!< The value of Scheduled minute for the action */
+             second : 6,        /*!< The value of Scheduled second for the action */
+             day_of_week : 7,   /*!< The value of Schedule days of the week for the action */
+             action : 4,        /*!< The value of Action to be performed at the scheduled time */
+             trans_time : 8;    /*!< The value of Transition time for this action */
+    uint16_t scene_number;      /*!< The value of Scene Number to be used for some actions */
+} esp_ble_mesh_schedule_register_t;
+
+/** Parameters of Scheduler state */
+typedef struct {
+    const uint8_t schedule_count;                   /*!< Scheduler count */
+    esp_ble_mesh_schedule_register_t *schedules;    /*!< Up to 16 scheduled entries */
+} esp_ble_mesh_scheduler_state_t;
+
+/** User data of Scheduler Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Scheduler Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_scheduler_state_t *state;      /*!< Parameters of the Scheduler state */
+} esp_ble_mesh_scheduler_srv_t;
+
+/** User data of Scheduler Setup Server Model */
+typedef struct {
+    esp_ble_mesh_model_t *model;                /*!< Pointer to the Scheduler Setup Server Model. Initialized internally. */
+    esp_ble_mesh_server_rsp_ctrl_t rsp_ctrl;    /*!< Response control of the server model received messages */
+    esp_ble_mesh_scheduler_state_t *state;      /*!< Parameters of the Scheduler state */
+} esp_ble_mesh_scheduler_setup_srv_t;
+
+/** Parameters of Time Set state change event */
+typedef struct {
+    uint8_t  tai_seconds[5];        /*!< The current TAI time in seconds */
+    uint8_t  subsecond;             /*!< The sub-second time in units of 1/256 second */
+    uint8_t  uncertainty;           /*!< The estimated uncertainty in 10-millisecond steps */
+    uint16_t time_authority : 1;    /*!< 0 = No Time Authority, 1 = Time Authority */
+    uint16_t tai_utc_delta_curr : 15;   /*!< Current difference between TAI and UTC in seconds */
+    uint8_t  time_zone_offset_curr;     /*!< The local time zone offset in 15-minute increments */
+} esp_ble_mesh_state_change_time_set_t;
+
+/** Parameters of Time Status state change event */
+typedef struct {
+    uint8_t  tai_seconds[5];        /*!< The current TAI time in seconds */
+    uint8_t  subsecond;             /*!< The sub-second time in units of 1/256 second */
+    uint8_t  uncertainty;           /*!< The estimated uncertainty in 10-millisecond steps */
+    uint16_t time_authority : 1;    /*!< 0 = No Time Authority, 1 = Time Authority */
+    uint16_t tai_utc_delta_curr : 15;   /*!< Current difference between TAI and UTC in seconds */
+    uint8_t  time_zone_offset_curr;     /*!< The local time zone offset in 15-minute increments */
+} esp_ble_mesh_state_change_time_status_t;
+
+/** Parameters of Time Zone Set state change event */
+typedef struct {
+    uint8_t time_zone_offset_new;   /*!< Upcoming local time zone offset */
+    uint8_t tai_zone_change[5];     /*!< TAI Seconds time of the upcoming Time Zone Offset change */
+} esp_ble_mesh_state_change_time_zone_set_t;
+
+/** Parameters of TAI UTC Delta Set state change event */
+typedef struct {
+    uint16_t tai_utc_delta_new : 15;    /*!< Upcoming difference between TAI and UTC in seconds */
+    uint8_t tai_delta_change[5];        /*!< TAI Seconds time of the upcoming TAI-UTC Delta change */
+} esp_ble_mesh_state_change_tai_utc_delta_set_t;
+
+/** Parameter of Time Role Set state change event */
+typedef struct {
+    uint8_t time_role;      /*!< The Time Role for the element */
+} esp_ble_mesh_state_change_time_role_set_t;
+
+/** Parameter of Scene Store state change event */
+typedef struct {
+    uint16_t scene_number;  /*!< The number of scenes to be stored */
+} esp_ble_mesh_state_change_scene_store_t;
+
+/** Parameter of Scene Recall state change event */
+typedef struct {
+    uint16_t scene_number;  /*!< The number of scenes to be recalled */
+} esp_ble_mesh_state_change_scene_recall_t;
+
+/** Parameter of Scene Delete state change event */
+typedef struct {
+    uint16_t scene_number;  /*!< The number of scenes to be deleted */
+} esp_ble_mesh_state_change_scene_delete_t;
+
+/** Parameter of Scheduler Action Set state change event */
+typedef struct {
+    uint64_t index : 4;         /*!< Index of the Schedule Register entry to set */
+    uint64_t year : 7;          /*!< Scheduled year for the action */
+    uint64_t month : 12;        /*!< Scheduled month for the action */
+    uint64_t day : 5;           /*!< Scheduled day of the month for the action */
+    uint64_t hour : 5;          /*!< Scheduled hour for the action */
+    uint64_t minute : 6;        /*!< Scheduled minute for the action */
+    uint64_t second : 6;        /*!< Scheduled second for the action */
+    uint64_t day_of_week : 7;   /*!< Schedule days of the week for the action */
+    uint64_t action : 4;        /*!< Action to be performed at the scheduled time */
+    uint64_t trans_time : 8;    /*!< Transition time for this action */
+    uint16_t scene_number;      /*!< Scene number to be used for some actions */
+} esp_ble_mesh_state_change_scheduler_act_set_t;
+
+/**
+ * @brief Time Scene Server Model state change value union
+ */
+typedef union {
+    /**
+     * The recv_op in ctx can be used to decide which state is changed.
+     */
+    esp_ble_mesh_state_change_time_set_t          time_set;             /*!< Time Set */
+    esp_ble_mesh_state_change_time_status_t       time_status;          /*!< Time Status */
+    esp_ble_mesh_state_change_time_zone_set_t     time_zone_set;        /*!< Time Zone Set */
+    esp_ble_mesh_state_change_tai_utc_delta_set_t tai_utc_delta_set;    /*!< TAI UTC Delta Set */
+    esp_ble_mesh_state_change_time_role_set_t     time_role_set;        /*!< Time Role Set */
+    esp_ble_mesh_state_change_scene_store_t       scene_store;          /*!< Scene Store */
+    esp_ble_mesh_state_change_scene_recall_t      scene_recall;         /*!< Scene Recall */
+    esp_ble_mesh_state_change_scene_delete_t      scene_delete;         /*!< Scene Delete */
+    esp_ble_mesh_state_change_scheduler_act_set_t scheduler_act_set;    /*!< Scheduler Action Set */
+} esp_ble_mesh_time_scene_server_state_change_t;
+
+/** Context of the received Scheduler Action Get message */
+typedef struct {
+    uint8_t index;  /*!< Index of the Schedule Register entry to get */
+} esp_ble_mesh_server_recv_scheduler_act_get_t;
+
+/**
+ * @brief Time Scene Server Model received get message union
+ */
+typedef union {
+    esp_ble_mesh_server_recv_scheduler_act_get_t scheduler_act; /*!< Scheduler Action Get */
+} esp_ble_mesh_time_scene_server_recv_get_msg_t;
+
+/** Context of the received Time Set message */
+typedef struct {
+    uint8_t  tai_seconds[5];        /*!< The current TAI time in seconds */
+    uint8_t  subsecond;             /*!< The sub-second time in units of 1/256 second */
+    uint8_t  uncertainty;           /*!< The estimated uncertainty in 10-millisecond steps */
+    uint16_t time_authority : 1;    /*!< 0 = No Time Authority, 1 = Time Authority */
+    uint16_t tai_utc_delta : 15;    /*!< Current difference between TAI and UTC in seconds */
+    uint8_t  time_zone_offset;      /*!< The local time zone offset in 15-minute increments */
+} esp_ble_mesh_server_recv_time_set_t;
+
+/** Context of the received Time Zone Set message */
+typedef struct {
+    uint8_t time_zone_offset_new;   /*!< Upcoming local time zone offset */
+    uint8_t tai_zone_change[5];     /*!< TAI Seconds time of the upcoming Time Zone Offset change */
+} esp_ble_mesh_server_recv_time_zone_set_t;
+
+/** Context of the received TAI UTC Delta Set message */
+typedef struct {
+    uint16_t tai_utc_delta_new : 15;    /*!< Upcoming difference between TAI and UTC in seconds */
+    uint16_t padding : 1;               /*!< Always 0b0. Other values are Prohibited. */
+    uint8_t tai_delta_change[5];        /*!< TAI Seconds time of the upcoming TAI-UTC Delta change */
+} esp_ble_mesh_server_recv_tai_utc_delta_set_t;
+
+/** Context of the received Time Role Set message */
+typedef struct {
+    uint8_t time_role;      /*!< The Time Role for the element */
+} esp_ble_mesh_server_recv_time_role_set_t;
+
+/** Context of the received Scene Store message */
+typedef struct {
+    uint16_t scene_number;  /*!< The number of scenes to be stored */
+} esp_ble_mesh_server_recv_scene_store_t;
+
+/** Context of the received Scene Recall message */
+typedef struct {
+    bool     op_en;         /*!< Indicate if optional parameters are included */
+    uint16_t scene_number;  /*!< The number of scenes to be recalled */
+    uint8_t  tid;           /*!< Transaction ID */
+    uint8_t  trans_time;    /*!< Time to complete state transition (optional) */
+    uint8_t  delay;         /*!< Indicate message execution delay (C.1) */
+} esp_ble_mesh_server_recv_scene_recall_t;
+
+/** Context of the received Scene Delete message */
+typedef struct {
+    uint16_t scene_number;  /*!< The number of scenes to be deleted */
+} esp_ble_mesh_server_recv_scene_delete_t;
+
+/** Context of the received Scheduler Action Set message */
+typedef struct {
+    uint64_t index : 4;         /*!< Index of the Schedule Register entry to set */
+    uint64_t year : 7;          /*!< Scheduled year for the action */
+    uint64_t month : 12;        /*!< Scheduled month for the action */
+    uint64_t day : 5;           /*!< Scheduled day of the month for the action */
+    uint64_t hour : 5;          /*!< Scheduled hour for the action */
+    uint64_t minute : 6;        /*!< Scheduled minute for the action */
+    uint64_t second : 6;        /*!< Scheduled second for the action */
+    uint64_t day_of_week : 7;   /*!< Schedule days of the week for the action */
+    uint64_t action : 4;        /*!< Action to be performed at the scheduled time */
+    uint64_t trans_time : 8;    /*!< Transition time for this action */
+    uint16_t scene_number;      /*!< Scene number to be used for some actions */
+} esp_ble_mesh_server_recv_scheduler_act_set_t;
+
+/**
+ * @brief Time Scene Server Model received set message union
+ */
+typedef union {
+    esp_ble_mesh_server_recv_time_set_t          time;              /*!< Time Set */
+    esp_ble_mesh_server_recv_time_zone_set_t     time_zone;         /*!< Time Zone Set */
+    esp_ble_mesh_server_recv_tai_utc_delta_set_t tai_utc_delta;     /*!< TAI-UTC Delta Set */
+    esp_ble_mesh_server_recv_time_role_set_t     time_role;         /*!< Time Role Set */
+    esp_ble_mesh_server_recv_scene_store_t       scene_store;       /*!< Scene Store/Scene Store Unack */
+    esp_ble_mesh_server_recv_scene_recall_t      scene_recall;      /*!< Scene Recall/Scene Recall Unack */
+    esp_ble_mesh_server_recv_scene_delete_t      scene_delete;      /*!< Scene Delete/Scene Delete Unack */
+    esp_ble_mesh_server_recv_scheduler_act_set_t scheduler_act;     /*!< Scheduler Action Set/Scheduler Action Set Unack */
+} esp_ble_mesh_time_scene_server_recv_set_msg_t;
+
+/** Context of the received Time Status message */
+typedef struct {
+    uint8_t  tai_seconds[5];        /*!< The current TAI time in seconds */
+    uint8_t  subsecond;             /*!< The sub-second time in units of 1/256 second */
+    uint8_t  uncertainty;           /*!< The estimated uncertainty in 10-millisecond steps */
+    uint16_t time_authority : 1;    /*!< 0 = No Time Authority, 1 = Time Authority */
+    uint16_t tai_utc_delta : 15;    /*!< Current difference between TAI and UTC in seconds */
+    uint8_t  time_zone_offset;      /*!< The local time zone offset in 15-minute increments */
+} esp_ble_mesh_server_recv_time_status_t;
+
+/**
+ * @brief Time Scene Server Model received status message union
+ */
+typedef union {
+    esp_ble_mesh_server_recv_time_status_t time_status;     /*!< Time Status */
+} esp_ble_mesh_time_scene_server_recv_status_msg_t;
+
+/**
+ * @brief Time Scene Server Model callback value union
+ */
+typedef union {
+    esp_ble_mesh_time_scene_server_state_change_t state_change; /*!< ESP_BLE_MESH_TIME_SCENE_SERVER_STATE_CHANGE_EVT */
+    esp_ble_mesh_time_scene_server_recv_get_msg_t get;  /*!< ESP_BLE_MESH_TIME_SCENE_SERVER_RECV_GET_MSG_EVT */
+    esp_ble_mesh_time_scene_server_recv_set_msg_t set;  /*!< ESP_BLE_MESH_TIME_SCENE_SERVER_RECV_SET_MSG_EVT */
+    esp_ble_mesh_time_scene_server_recv_status_msg_t status;    /*!< ESP_BLE_MESH_TIME_SCENE_SERVER_RECV_STATUS_MSG_EVT */
+} esp_ble_mesh_time_scene_server_cb_value_t;
+
+/** Time Scene Server Model callback parameters */
+typedef struct {
+    esp_ble_mesh_model_t  *model;   /*!< Pointer to Time and Scenes Server Models */
+    esp_ble_mesh_msg_ctx_t ctx;     /*!< Context of the received messages */
+    esp_ble_mesh_time_scene_server_cb_value_t value;    /*!< Value of the received Time and Scenes Messages */
+} esp_ble_mesh_time_scene_server_cb_param_t;
+
+/** This enum value is the event of Time Scene Server Model */
+typedef enum {
+    /**
+     * 1. When get_auto_rsp is set to ESP_BLE_MESH_SERVER_AUTO_RSP, no event will be
+     *    callback to the application layer when Time Scene Get messages are received.
+     * 2. When set_auto_rsp is set to ESP_BLE_MESH_SERVER_AUTO_RSP, this event will
+     *    be callback to the application layer when Time Scene Set/Set Unack messages
+     *    are received.
+     */
+    ESP_BLE_MESH_TIME_SCENE_SERVER_STATE_CHANGE_EVT,
+    /**
+     * When get_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, this event will be
+     * callback to the application layer when Time Scene Get messages are received.
+     */
+    ESP_BLE_MESH_TIME_SCENE_SERVER_RECV_GET_MSG_EVT,
+    /**
+     * When set_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, this event will be
+     * callback to the application layer when Time Scene Set/Set Unack messages are received.
+     */
+    ESP_BLE_MESH_TIME_SCENE_SERVER_RECV_SET_MSG_EVT,
+    /**
+     * When status_auto_rsp is set to ESP_BLE_MESH_SERVER_RSP_BY_APP, this event will
+     * be callback to the application layer when TIme Status message is received.
+     */
+    ESP_BLE_MESH_TIME_SCENE_SERVER_RECV_STATUS_MSG_EVT,
+    ESP_BLE_MESH_TIME_SCENE_SERVER_EVT_MAX,
+} esp_ble_mesh_time_scene_server_cb_event_t;
+
+/**
+ *  @brief Bluetooth Mesh Time and Scenes Server Model function.
+ */
+
+/**
+ * @brief   Time Scene Server Model callback function type
+ * @param   event: Event type
+ * @param   param: Pointer to callback parameter
+ */
+typedef void (* esp_ble_mesh_time_scene_server_cb_t)(esp_ble_mesh_time_scene_server_cb_event_t event,
+                                                     esp_ble_mesh_time_scene_server_cb_param_t *param);
+
+/**
+ * @brief       Register BLE Mesh Time and Scenes Server Model callback.
+ *
+ * @param[in]   callback: Pointer to the callback function.
+ *
+ * @return      ESP_OK on success or error code otherwise.
+ *
+ */
+esp_err_t esp_ble_mesh_register_time_scene_server_callback(esp_ble_mesh_time_scene_server_cb_t callback);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_BLE_MESH_TIME_SCENE_MODEL_API_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_ble.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_ble.h
new file mode 100644
index 00000000000..854ca96522d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_ble.h
@@ -0,0 +1,54 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BTC_BLE_MESH_BLE_H_
+#define _BTC_BLE_MESH_BLE_H_
+
+#include <stdint.h>
+#include "btc/btc_manage.h"
+#include "mesh_bearer_adapt.h"
+#include "esp_ble_mesh_ble_api.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef union {
+    struct {
+        esp_ble_mesh_ble_adv_param_t param;
+        esp_ble_mesh_ble_adv_data_t data;
+    } start_ble_adv;
+    struct {
+        uint8_t index;
+    } stop_ble_adv;
+    struct {
+        esp_ble_mesh_ble_scan_param_t param;
+    } start_ble_scan;
+    struct {
+        /* RFU */
+    } stop_ble_scan;
+} btc_ble_mesh_ble_args_t;
+
+typedef enum {
+    BTC_BLE_MESH_ACT_START_BLE_ADV,
+    BTC_BLE_MESH_ACT_STOP_BLE_ADV,
+    BTC_BLE_MESH_ACT_START_BLE_SCAN,
+    BTC_BLE_MESH_ACT_STOP_BLE_SCAN,
+} btc_ble_mesh_ble_act_t;
+
+void bt_mesh_ble_scan_cb_evt_to_btc(const bt_mesh_addr_t *addr,
+                                    uint8_t adv_type, uint8_t data[],
+                                    uint16_t length, int8_t rssi);
+
+void btc_ble_mesh_ble_call_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_ble_cb_handler(btc_msg_t *msg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BTC_BLE_MESH_BLE_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_config_model.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_config_model.h
new file mode 100644
index 00000000000..39ed1a5c1a4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_config_model.h
@@ -0,0 +1,72 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BTC_BLE_MESH_CONFIG_MODEL_H_
+#define _BTC_BLE_MESH_CONFIG_MODEL_H_
+
+#include "btc/btc_manage.h"
+#include "esp_ble_mesh_config_model_api.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    BTC_BLE_MESH_ACT_CONFIG_CLIENT_GET_STATE,
+    BTC_BLE_MESH_ACT_CONFIG_CLIENT_SET_STATE,
+    BTC_BLE_MESH_ACT_CONFIG_CLIENT_MAX,
+} btc_ble_mesh_config_client_act_t;
+
+typedef union {
+    struct ble_mesh_cfg_client_get_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_cfg_client_get_state_t *get_state;
+    } cfg_client_get_state;
+    struct ble_mesh_cfg_client_set_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_cfg_client_set_state_t *set_state;
+    } cfg_client_set_state;
+} btc_ble_mesh_config_client_args_t;
+
+typedef enum {
+    BTC_BLE_MESH_EVT_CONFIG_CLIENT_GET_STATE,
+    BTC_BLE_MESH_EVT_CONFIG_CLIENT_SET_STATE,
+    BTC_BLE_MESH_EVT_CONFIG_CLIENT_PUBLISH,
+    BTC_BLE_MESH_EVT_CONFIG_CLIENT_TIMEOUT,
+    BTC_BLE_MESH_EVT_CONFIG_CLIENT_MAX,
+} btc_ble_mesh_config_client_evt_t;
+
+void btc_ble_mesh_config_client_call_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_config_client_cb_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_config_client_arg_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
+
+void btc_ble_mesh_config_client_publish_callback(uint32_t opcode, struct bt_mesh_model *model,
+                                                 struct bt_mesh_msg_ctx *ctx,
+                                                 struct net_buf_simple *buf);
+
+void bt_mesh_config_client_cb_evt_to_btc(uint32_t opcode, uint8_t evt_type,
+                                         struct bt_mesh_model *model,
+                                         struct bt_mesh_msg_ctx *ctx,
+                                         const uint8_t *val, size_t len);
+
+void btc_ble_mesh_config_server_cb_handler(btc_msg_t *msg);
+
+typedef enum {
+    BTC_BLE_MESH_EVT_CONFIG_SERVER_STATE_CHANGE,
+    BTC_BLE_MESH_EVT_CONFIG_SERVER_MAX,
+} btc_ble_mesh_config_server_evt_t;
+
+void bt_mesh_config_server_cb_evt_to_btc(uint8_t evt_type, struct bt_mesh_model *model,
+                                         struct bt_mesh_msg_ctx *ctx,
+                                         const uint8_t *val, size_t len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BTC_BLE_MESH_CONFIG_MODEL_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_generic_model.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_generic_model.h
new file mode 100644
index 00000000000..a5b586d5ab7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_generic_model.h
@@ -0,0 +1,74 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BTC_BLE_MESH_GENERIC_MODEL_H_
+#define _BTC_BLE_MESH_GENERIC_MODEL_H_
+
+#include "btc/btc_manage.h"
+#include "esp_ble_mesh_generic_model_api.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    BTC_BLE_MESH_ACT_GENERIC_CLIENT_GET_STATE,
+    BTC_BLE_MESH_ACT_GENERIC_CLIENT_SET_STATE,
+    BTC_BLE_MESH_ACT_GENERIC_CLIENT_MAX,
+} btc_ble_mesh_generic_client_act_t;
+
+typedef union {
+    struct ble_mesh_generic_client_get_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_generic_client_get_state_t *get_state;
+    } generic_client_get_state;
+    struct ble_mesh_generic_client_set_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_generic_client_set_state_t *set_state;
+    } generic_client_set_state;
+} btc_ble_mesh_generic_client_args_t;
+
+typedef enum {
+    BTC_BLE_MESH_EVT_GENERIC_CLIENT_GET_STATE,
+    BTC_BLE_MESH_EVT_GENERIC_CLIENT_SET_STATE,
+    BTC_BLE_MESH_EVT_GENERIC_CLIENT_PUBLISH,
+    BTC_BLE_MESH_EVT_GENERIC_CLIENT_TIMEOUT,
+    BTC_BLE_MESH_EVT_GENERIC_CLIENT_MAX,
+} btc_ble_mesh_generic_client_evt_t;
+
+void btc_ble_mesh_generic_client_call_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_generic_client_cb_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_generic_client_arg_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
+
+void btc_ble_mesh_generic_client_publish_callback(uint32_t opcode, struct bt_mesh_model *model,
+                                                  struct bt_mesh_msg_ctx *ctx,
+                                                  struct net_buf_simple *buf);
+
+void bt_mesh_generic_client_cb_evt_to_btc(uint32_t opcode, uint8_t evt_type,
+                                          struct bt_mesh_model *model,
+                                          struct bt_mesh_msg_ctx *ctx,
+                                          const uint8_t *val, size_t len);
+
+typedef enum {
+    BTC_BLE_MESH_EVT_GENERIC_SERVER_STATE_CHANGE,
+    BTC_BLE_MESH_EVT_GENERIC_SERVER_RECV_GET_MSG,
+    BTC_BLE_MESH_EVT_GENERIC_SERVER_RECV_SET_MSG,
+    BTC_BLE_MESH_EVT_GENERIC_SERVER_MAX,
+} btc_ble_mesh_generic_server_evt_t;
+
+void bt_mesh_generic_server_cb_evt_to_btc(uint8_t evt_type, struct bt_mesh_model *model,
+                                          struct bt_mesh_msg_ctx *ctx,
+                                          const uint8_t *val, size_t len);
+
+void btc_ble_mesh_generic_server_cb_handler(btc_msg_t *msg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BTC_BLE_MESH_GENERIC_MODEL_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_health_model.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_health_model.h
new file mode 100644
index 00000000000..331f41c23d6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_health_model.h
@@ -0,0 +1,87 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BTC_BLE_MESH_HEALTH_MODEL_H_
+#define _BTC_BLE_MESH_HEALTH_MODEL_H_
+
+#include "btc/btc_manage.h"
+#include "esp_ble_mesh_health_model_api.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    BTC_BLE_MESH_ACT_HEALTH_CLIENT_GET_STATE,
+    BTC_BLE_MESH_ACT_HEALTH_CLIENT_SET_STATE,
+    BTC_BLE_MESH_ACT_HEALTH_CLIENT_MAX,
+} btc_ble_mesh_health_client_act_t;
+
+typedef union {
+    struct ble_mesh_health_client_get_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_health_client_get_state_t *get_state;
+    } health_client_get_state;
+    struct ble_mesh_health_client_set_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_health_client_set_state_t *set_state;
+    } health_client_set_state;
+} btc_ble_mesh_health_client_args_t;
+
+typedef enum {
+    BTC_BLE_MESH_EVT_HEALTH_CLIENT_GET_STATE,
+    BTC_BLE_MESH_EVT_HEALTH_CLIENT_SET_STATE,
+    BTC_BLE_MESH_EVT_HEALTH_CLIENT_PUBLISH,
+    BTC_BLE_MESH_EVT_HEALTH_CLIENT_TIMEOUT,
+    BTC_BLE_MESH_EVT_HEALTH_CLIENT_MAX,
+} btc_ble_mesh_health_client_evt_t;
+
+void btc_ble_mesh_health_client_arg_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
+
+void btc_ble_mesh_health_client_call_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_health_client_cb_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_health_publish_callback(uint32_t opcode, struct bt_mesh_model *model,
+                                          struct bt_mesh_msg_ctx *ctx,
+                                          struct net_buf_simple *buf);
+
+void bt_mesh_health_client_cb_evt_to_btc(uint32_t opcode, uint8_t evt_type,
+                                         struct bt_mesh_model *model,
+                                         struct bt_mesh_msg_ctx *ctx,
+                                         const uint8_t *val, uint16_t len);
+
+typedef enum {
+    BTC_BLE_MESH_ACT_HEALTH_SERVER_FAULT_UPDATE,
+    BTC_BLE_MESH_ACT_HEALTH_SERVER_MAX,
+} btc_ble_mesh_health_server_act_t;
+
+typedef union {
+    struct ble_mesh_health_server_fault_update_args {
+        esp_ble_mesh_elem_t *element;
+    } health_fault_update;
+} btc_ble_mesh_health_server_args_t;
+
+void btc_ble_mesh_health_server_call_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_health_server_cb_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_health_server_arg_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
+
+void btc_ble_mesh_health_server_fault_clear(struct bt_mesh_model *model, uint16_t company_id);
+
+void btc_ble_mesh_health_server_fault_test(struct bt_mesh_model *model,
+                                           uint8_t test_id, uint16_t company_id);
+
+void btc_ble_mesh_health_server_attention_on(struct bt_mesh_model *model, uint8_t time);
+
+void btc_ble_mesh_health_server_attention_off(struct bt_mesh_model *model);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BTC_BLE_MESH_HEALTH_MODEL_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_lighting_model.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_lighting_model.h
new file mode 100644
index 00000000000..854d6521612
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_lighting_model.h
@@ -0,0 +1,75 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BTC_BLE_MESH_LIGHTING_MODEL_H_
+#define _BTC_BLE_MESH_LIGHTING_MODEL_H_
+
+#include "btc/btc_manage.h"
+#include "esp_ble_mesh_lighting_model_api.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    BTC_BLE_MESH_ACT_LIGHTING_CLIENT_GET_STATE,
+    BTC_BLE_MESH_ACT_LIGHTING_CLIENT_SET_STATE,
+    BTC_BLE_MESH_ACT_LIGHTING_CLIENT_MAX,
+} btc_ble_mesh_lighting_client_act_t;
+
+typedef union {
+    struct ble_mesh_light_client_get_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_light_client_get_state_t *get_state;
+    } light_client_get_state;
+    struct ble_mesh_light_client_set_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_light_client_set_state_t *set_state;
+    } light_client_set_state;
+} btc_ble_mesh_lighting_client_args_t;
+
+typedef enum {
+    BTC_BLE_MESH_EVT_LIGHTING_CLIENT_GET_STATE,
+    BTC_BLE_MESH_EVT_LIGHTING_CLIENT_SET_STATE,
+    BTC_BLE_MESH_EVT_LIGHTING_CLIENT_PUBLISH,
+    BTC_BLE_MESH_EVT_LIGHTING_CLIENT_TIMEOUT,
+    BTC_BLE_MESH_EVT_LIGHTING_CLIENT_MAX,
+} btc_ble_mesh_lighting_client_evt_t;
+
+void btc_ble_mesh_lighting_client_call_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_lighting_client_cb_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_lighting_client_arg_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
+
+void btc_ble_mesh_lighting_client_publish_callback(uint32_t opcode, struct bt_mesh_model *model,
+                                                   struct bt_mesh_msg_ctx *ctx,
+                                                   struct net_buf_simple *buf);
+
+void bt_mesh_lighting_client_cb_evt_to_btc(uint32_t opcode, uint8_t evt_type,
+                                           struct bt_mesh_model *model,
+                                           struct bt_mesh_msg_ctx *ctx,
+                                           const uint8_t *val, size_t len);
+
+typedef enum {
+    BTC_BLE_MESH_EVT_LIGHTING_SERVER_STATE_CHANGE,
+    BTC_BLE_MESH_EVT_LIGHTING_SERVER_RECV_GET_MSG,
+    BTC_BLE_MESH_EVT_LIGHTING_SERVER_RECV_SET_MSG,
+    BTC_BLE_MESH_EVT_LIGHTING_SERVER_RECV_STATUS_MSG,
+    BTC_BLE_MESH_EVT_LIGHTING_SERVER_MAX,
+} btc_ble_mesh_lighting_server_evt_t;
+
+void bt_mesh_lighting_server_cb_evt_to_btc(uint8_t evt_type, struct bt_mesh_model *model,
+                                           struct bt_mesh_msg_ctx *ctx,
+                                           const uint8_t *val, size_t len);
+
+void btc_ble_mesh_lighting_server_cb_handler(btc_msg_t *msg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BTC_BLE_MESH_LIGHTING_MODEL_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_prov.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_prov.h
new file mode 100644
index 00000000000..ab54cc487b8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_prov.h
@@ -0,0 +1,392 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BTC_BLE_MESH_PROV_H_
+#define _BTC_BLE_MESH_PROV_H_
+
+#include "btc/btc_manage.h"
+#include "mesh_byteorder.h"
+#include "mesh_config.h"
+#include "mesh_main.h"
+#include "fast_prov.h"
+#include "provisioner_prov.h"
+#include "esp_ble_mesh_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    BTC_BLE_MESH_ACT_MESH_INIT = 0,
+    BTC_BLE_MESH_ACT_PROV_ENABLE,
+    BTC_BLE_MESH_ACT_PROV_DISABLE,
+    BTC_BLE_MESH_ACT_NODE_RESET,
+    BTC_BLE_MESH_ACT_SET_OOB_PUB_KEY,
+    BTC_BLE_MESH_ACT_INPUT_NUMBER,
+    BTC_BLE_MESH_ACT_INPUT_STRING,
+    BTC_BLE_MESH_ACT_SET_DEVICE_NAME,
+    BTC_BLE_MESH_ACT_PROXY_IDENTITY_ENABLE,
+    BTC_BLE_MESH_ACT_PROXY_GATT_ENABLE,
+    BTC_BLE_MESH_ACT_PROXY_GATT_DISABLE,
+    BTC_BLE_MESH_ACT_NODE_ADD_LOCAL_NET_KEY,
+    BTC_BLE_MESH_ACT_NODE_ADD_LOCAL_APP_KEY,
+    BTC_BLE_MESH_ACT_NODE_BIND_APP_KEY_TO_MODEL,
+    BTC_BLE_MESH_ACT_PROVISIONER_READ_OOB_PUB_KEY,
+    BTC_BLE_MESH_ACT_PROVISIONER_INPUT_STR,
+    BTC_BLE_MESH_ACT_PROVISIONER_INPUT_NUM,
+    BTC_BLE_MESH_ACT_PROVISIONER_ENABLE,
+    BTC_BLE_MESH_ACT_PROVISIONER_DISABLE,
+    BTC_BLE_MESH_ACT_PROVISIONER_DEV_ADD,
+    BTC_BLE_MESH_ACT_PROVISIONER_PROV_DEV_WITH_ADDR,
+    BTC_BLE_MESH_ACT_PROVISIONER_DEV_DEL,
+    BTC_BLE_MESH_ACT_PROVISIONER_SET_DEV_UUID_MATCH,
+    BTC_BLE_MESH_ACT_PROVISIONER_SET_PROV_DATA_INFO,
+    BTC_BLE_MESH_ACT_PROVISIONER_SET_STATIC_OOB_VAL,
+    BTC_BLE_MESH_ACT_PROVISIONER_SET_PRIMARY_ELEM_ADDR,
+    BTC_BLE_MESH_ACT_PROVISIONER_SET_NODE_NAME,
+    BTC_BLE_MESH_ACT_PROVISIONER_ADD_LOCAL_APP_KEY,
+    BTC_BLE_MESH_ACT_PROVISIONER_UPDATE_LOCAL_APP_KEY,
+    BTC_BLE_MESH_ACT_PROVISIONER_BIND_LOCAL_MOD_APP,
+    BTC_BLE_MESH_ACT_PROVISIONER_ADD_LOCAL_NET_KEY,
+    BTC_BLE_MESH_ACT_PROVISIONER_UPDATE_LOCAL_NET_KEY,
+    BTC_BLE_MESH_ACT_PROVISIONER_STORE_NODE_COMP_DATA,
+    BTC_BLE_MESH_ACT_PROVISIONER_DELETE_NODE_WITH_UUID,
+    BTC_BLE_MESH_ACT_PROVISIONER_DELETE_NODE_WITH_ADDR,
+    BTC_BLE_MESH_ACT_PROVISIONER_ENABLE_HEARTBEAT_RECV,
+    BTC_BLE_MESH_ACT_PROVISIONER_SET_HEARTBEAT_FILTER_TYPE,
+    BTC_BLE_MESH_ACT_PROVISIONER_SET_HEARTBEAT_FILTER_INFO,
+    BTC_BLE_MESH_ACT_PROVISIONER_DIRECT_ERASE_SETTINGS,
+    BTC_BLE_MESH_ACT_PROVISIONER_OPEN_SETTINGS_WITH_INDEX,
+    BTC_BLE_MESH_ACT_PROVISIONER_OPEN_SETTINGS_WITH_UID,
+    BTC_BLE_MESH_ACT_PROVISIONER_CLOSE_SETTINGS_WITH_INDEX,
+    BTC_BLE_MESH_ACT_PROVISIONER_CLOSE_SETTINGS_WITH_UID,
+    BTC_BLE_MESH_ACT_PROVISIONER_DELETE_SETTINGS_WITH_INDEX,
+    BTC_BLE_MESH_ACT_PROVISIONER_DELETE_SETTINGS_WITH_UID,
+    BTC_BLE_MESH_ACT_SET_FAST_PROV_INFO,
+    BTC_BLE_MESH_ACT_SET_FAST_PROV_ACTION,
+    BTC_BLE_MESH_ACT_LPN_ENABLE,
+    BTC_BLE_MESH_ACT_LPN_DISABLE,
+    BTC_BLE_MESH_ACT_LPN_POLL,
+    BTC_BLE_MESH_ACT_PROXY_CLIENT_CONNECT,
+    BTC_BLE_MESH_ACT_PROXY_CLIENT_DISCONNECT,
+    BTC_BLE_MESH_ACT_PROXY_CLIENT_SET_FILTER_TYPE,
+    BTC_BLE_MESH_ACT_PROXY_CLIENT_ADD_FILTER_ADDR,
+    BTC_BLE_MESH_ACT_PROXY_CLIENT_REMOVE_FILTER_ADDR,
+    BTC_BLE_MESH_ACT_MODEL_SUBSCRIBE_GROUP_ADDR,
+    BTC_BLE_MESH_ACT_MODEL_UNSUBSCRIBE_GROUP_ADDR,
+    BTC_BLE_MESH_ACT_DEINIT_MESH,
+} btc_ble_mesh_prov_act_t;
+
+typedef enum {
+    BTC_BLE_MESH_ACT_MODEL_PUBLISH,
+    BTC_BLE_MESH_ACT_SERVER_MODEL_SEND,
+    BTC_BLE_MESH_ACT_CLIENT_MODEL_SEND,
+    BTC_BLE_MESH_ACT_SERVER_MODEL_UPDATE_STATE,
+} btc_ble_mesh_model_act_t;
+
+typedef union {
+    struct ble_mesh_init_args {
+        esp_ble_mesh_prov_t *prov;
+        esp_ble_mesh_comp_t *comp;
+        SemaphoreHandle_t semaphore;
+    } mesh_init;
+    struct ble_mesh_node_prov_enable_args {
+        esp_ble_mesh_prov_bearer_t bearers;
+    } node_prov_enable;
+    struct ble_mesh_node_prov_disable_args {
+        esp_ble_mesh_prov_bearer_t bearers;
+    } node_prov_disable;
+    struct ble_mesh_set_oob_pub_key_args {
+        uint8_t pub_key_x[32];
+        uint8_t pub_key_y[32];
+        uint8_t private_key[32];
+    } set_oob_pub_key;
+    struct ble_mesh_node_input_num_args {
+        uint32_t number;
+    } input_number;
+    struct ble_mesh_node_input_str_args {
+        char string[8];
+    } input_string;
+    struct ble_mesh_set_device_name_args {
+        char name[ESP_BLE_MESH_DEVICE_NAME_MAX_LEN + 1];
+    } set_device_name;
+    struct ble_mesh_node_add_local_net_key_args {
+        uint8_t  net_key[16];
+        uint16_t net_idx;
+    } node_add_local_net_key;
+    struct ble_mesh_node_add_local_app_key_args {
+        uint8_t  app_key[16];
+        uint16_t net_idx;
+        uint16_t app_idx;
+    } node_add_local_app_key;
+    struct ble_mesh_node_bind_local_mod_app_args {
+        uint16_t element_addr;
+        uint16_t company_id;
+        uint16_t model_id;
+        uint16_t app_idx;
+    } node_local_mod_app_bind;
+    struct ble_mesh_provisioner_read_oob_pub_key_args {
+        uint8_t link_idx;
+        uint8_t pub_key_x[32];
+        uint8_t pub_key_y[32];
+    } provisioner_read_oob_pub_key;
+    struct ble_mesh_provisioner_input_str_args {
+        char string[8];
+        uint8_t link_idx;
+    } provisioner_input_str;
+    struct ble_mesh_provisioner_input_num_args {
+        uint32_t number;
+        uint8_t  link_idx;
+    } provisioner_input_num;
+    struct ble_mesh_provisioner_enable_args {
+        esp_ble_mesh_prov_bearer_t bearers;
+    } provisioner_enable;
+    struct ble_mesh_provisioner_disable_args {
+        esp_ble_mesh_prov_bearer_t bearers;
+    } provisioner_disable;
+    struct ble_mesh_provisioner_dev_add_args {
+        esp_ble_mesh_unprov_dev_add_t add_dev;
+        esp_ble_mesh_dev_add_flag_t   flags;
+    } provisioner_dev_add;
+    struct ble_mesh_provisioner_prov_dev_with_addr_args {
+        uint8_t uuid[16];
+        esp_ble_mesh_bd_addr_t addr;
+        esp_ble_mesh_addr_type_t addr_type;
+        esp_ble_mesh_prov_bearer_t bearer;
+        uint16_t oob_info;
+        uint16_t unicast_addr;
+    } provisioner_prov_dev_with_addr;
+    struct ble_mesh_provisioner_dev_del_args {
+        esp_ble_mesh_device_delete_t del_dev;
+    } provisioner_dev_del;
+    struct ble_mesh_provisioner_set_dev_uuid_match_args {
+        uint8_t offset;
+        uint8_t match_len;
+        uint8_t match_val[16];
+        bool prov_after_match;
+    } set_dev_uuid_match;
+    struct ble_mesh_provisioner_set_prov_net_idx_args {
+        esp_ble_mesh_prov_data_info_t prov_data;
+    } set_prov_data_info;
+    struct ble_mesh_provisioner_set_static_oob_val_args {
+        uint8_t value[16];
+        uint8_t length;
+    } set_static_oob_val;
+    struct ble_mesh_provisioner_set_primary_elem_addr_args {
+        uint16_t addr;
+    } set_primary_elem_addr;
+    struct ble_mesh_provisioner_set_node_name_args {
+        uint16_t index;
+        char name[ESP_BLE_MESH_NODE_NAME_MAX_LEN + 1];
+    } set_node_name;
+    struct ble_mesh_provisioner_add_local_app_key_args {
+        uint8_t app_key[16];
+        uint16_t net_idx;
+        uint16_t app_idx;
+    } add_local_app_key;
+    struct ble_mesh_provisioner_update_local_app_key_args {
+        uint8_t app_key[16];
+        uint16_t net_idx;
+        uint16_t app_idx;
+    } update_local_app_key;
+    struct ble_mesh_provisioner_bind_local_mod_app_args {
+        uint16_t elem_addr;
+        uint16_t model_id;
+        uint16_t cid;
+        uint16_t app_idx;
+    } local_mod_app_bind;
+    struct ble_mesh_provisioner_add_local_net_key_args {
+        uint8_t net_key[16];
+        uint16_t net_idx;
+    } add_local_net_key;
+    struct ble_mesh_provisioner_update_local_net_key_args {
+        uint8_t net_key[16];
+        uint16_t net_idx;
+    } update_local_net_key;
+    struct ble_mesh_provisioner_store_node_comp_data_args {
+        uint16_t unicast_addr;
+        uint16_t length;
+        uint8_t *data;
+    } store_node_comp_data;
+    struct ble_mesh_provisioner_delete_node_with_uuid_args {
+        uint8_t uuid[16];
+    } delete_node_with_uuid;
+    struct ble_mesh_provisioner_delete_node_with_addr_args {
+        uint16_t unicast_addr;
+    } delete_node_with_addr;
+    struct {
+        bool enable;
+    } enable_heartbeat_recv;
+    struct {
+        uint8_t type;
+    } set_heartbeat_filter_type;
+    struct {
+        uint8_t  op;
+        uint16_t hb_src;
+        uint16_t hb_dst;
+    } set_heartbeat_filter_info;
+    struct {
+        uint8_t index;
+    } open_settings_with_index;
+    struct {
+        char uid[ESP_BLE_MESH_SETTINGS_UID_SIZE + 1];
+    } open_settings_with_uid;
+    struct {
+        uint8_t index;
+        bool erase;
+    } close_settings_with_index;
+    struct {
+        char uid[ESP_BLE_MESH_SETTINGS_UID_SIZE + 1];
+        bool erase;
+    } close_settings_with_uid;
+    struct {
+        uint8_t index;
+    } delete_settings_with_index;
+    struct {
+        char uid[ESP_BLE_MESH_SETTINGS_UID_SIZE + 1];
+    } delete_settings_with_uid;
+    struct ble_mesh_set_fast_prov_info_args {
+        uint16_t unicast_min;
+        uint16_t unicast_max;
+        uint16_t net_idx;
+        uint8_t  flags;
+        uint32_t iv_index;
+        uint8_t  offset;
+        uint8_t  match_len;
+        uint8_t  match_val[16];
+    } set_fast_prov_info;
+    struct ble_mesh_set_fast_prov_action_args {
+        uint8_t action;
+    } set_fast_prov_action;
+    struct ble_mesh_lpn_enable_args {
+        /* RFU */
+    } lpn_enable;
+    struct ble_mesh_lpn_disable_args {
+        bool force;
+    } lpn_disable;
+    struct ble_mesh_lpn_poll_args {
+        /* RFU */
+    } lpn_poll;
+    struct ble_mesh_proxy_client_connect_args {
+        uint8_t  addr[6];
+        uint8_t  addr_type;
+        uint16_t net_idx;
+    } proxy_client_connect;
+    struct ble_mesh_proxy_client_disconnect_args {
+        uint8_t conn_handle;
+    } proxy_client_disconnect;
+    struct ble_mesh_proxy_client_set_filter_type_args {
+        uint8_t  conn_handle;
+        uint16_t net_idx;
+        uint8_t  filter_type;
+    } proxy_client_set_filter_type;
+    struct ble_mesh_proxy_client_add_filter_addr_args {
+        uint8_t   conn_handle;
+        uint16_t  net_idx;
+        uint16_t  addr_num;
+        uint16_t *addr;
+    } proxy_client_add_filter_addr;
+    struct ble_mesh_proxy_client_remove_filter_addr_args {
+        uint8_t   conn_handle;
+        uint16_t  net_idx;
+        uint16_t  addr_num;
+        uint16_t *addr;
+    } proxy_client_remove_filter_addr;
+    struct ble_mesh_model_sub_group_addr_args {
+        uint16_t element_addr;
+        uint16_t company_id;
+        uint16_t model_id;
+        uint16_t group_addr;
+    } model_sub_group_addr;
+    struct ble_mesh_model_unsub_group_addr_args {
+        uint16_t element_addr;
+        uint16_t company_id;
+        uint16_t model_id;
+        uint16_t group_addr;
+    } model_unsub_group_addr;
+    struct ble_mesh_deinit_args {
+        esp_ble_mesh_deinit_param_t param;
+    } mesh_deinit;
+} btc_ble_mesh_prov_args_t;
+
+typedef union {
+    struct ble_mesh_model_publish_args {
+        esp_ble_mesh_model_t *model;
+        uint8_t device_role;
+    } model_publish;
+    struct ble_mesh_model_send_args {
+        esp_ble_mesh_model_t *model;
+        esp_ble_mesh_msg_ctx_t *ctx;
+        uint32_t opcode;
+        bool need_rsp;
+        uint16_t length;
+        uint8_t *data;
+        uint8_t device_role;
+        int32_t msg_timeout;
+    } model_send;
+    struct ble_mesh_server_model_update_state_args {
+        esp_ble_mesh_model_t *model;
+        esp_ble_mesh_server_state_type_t type;
+        esp_ble_mesh_server_state_value_t *value;
+    } model_update_state;
+} btc_ble_mesh_model_args_t;
+
+void btc_ble_mesh_prov_arg_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
+
+void btc_ble_mesh_model_arg_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
+
+const uint8_t *btc_ble_mesh_node_get_local_net_key(uint16_t net_idx);
+
+const uint8_t *btc_ble_mesh_node_get_local_app_key(uint16_t app_idx);
+
+esp_ble_mesh_node_t *btc_ble_mesh_provisioner_get_node_with_uuid(const uint8_t uuid[16]);
+
+esp_ble_mesh_node_t *btc_ble_mesh_provisioner_get_node_with_addr(uint16_t unicast_addr);
+
+esp_ble_mesh_node_t *btc_ble_mesh_provisioner_get_node_with_name(const char *name);
+
+uint16_t btc_ble_mesh_provisioner_get_prov_node_count(void);
+
+const esp_ble_mesh_node_t **btc_ble_mesh_provisioner_get_node_table_entry(void);
+
+int btc_ble_mesh_client_model_init(esp_ble_mesh_model_t *model);
+
+int btc_ble_mesh_client_model_deinit(esp_ble_mesh_model_t *model);
+
+int32_t btc_ble_mesh_model_pub_period_get(esp_ble_mesh_model_t *mod);
+
+uint16_t btc_ble_mesh_get_primary_addr(void);
+
+uint16_t *btc_ble_mesh_model_find_group(esp_ble_mesh_model_t *mod, uint16_t addr);
+
+esp_ble_mesh_elem_t *btc_ble_mesh_elem_find(uint16_t addr);
+
+uint8_t btc_ble_mesh_elem_count(void);
+
+esp_ble_mesh_model_t *btc_ble_mesh_model_find_vnd(const esp_ble_mesh_elem_t *elem,
+                                                  uint16_t company, uint16_t id);
+
+esp_ble_mesh_model_t *btc_ble_mesh_model_find(const esp_ble_mesh_elem_t *elem, uint16_t id);
+
+const esp_ble_mesh_comp_t *btc_ble_mesh_comp_get(void);
+
+const char *btc_ble_mesh_provisioner_get_settings_uid(uint8_t index);
+
+uint8_t btc_ble_mesh_provisioner_get_settings_index(const char *uid);
+
+uint8_t btc_ble_mesh_provisioner_get_free_settings_count(void);
+
+void btc_ble_mesh_model_call_handler(btc_msg_t *msg);
+void btc_ble_mesh_model_cb_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_prov_call_handler(btc_msg_t *msg);
+void btc_ble_mesh_prov_cb_handler(btc_msg_t *msg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BTC_BLE_MESH_PROV_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_sensor_model.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_sensor_model.h
new file mode 100644
index 00000000000..a0dc29f3784
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_sensor_model.h
@@ -0,0 +1,74 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BTC_BLE_MESH_SENSOR_MODEL_H_
+#define _BTC_BLE_MESH_SENSOR_MODEL_H_
+
+#include "btc/btc_manage.h"
+#include "esp_ble_mesh_sensor_model_api.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    BTC_BLE_MESH_ACT_SENSOR_CLIENT_GET_STATE,
+    BTC_BLE_MESH_ACT_SENSOR_CLIENT_SET_STATE,
+    BTC_BLE_MESH_ACT_SENSOR_CLIENT_MAX,
+} btc_ble_mesh_sensor_client_act_t;
+
+typedef union {
+    struct ble_mesh_sensor_client_get_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_sensor_client_get_state_t *get_state;
+    } sensor_client_get_state;
+    struct ble_mesh_sensor_client_set_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_sensor_client_set_state_t *set_state;
+    } sensor_client_set_state;
+} btc_ble_mesh_sensor_client_args_t;
+
+typedef enum {
+    BTC_BLE_MESH_EVT_SENSOR_CLIENT_GET_STATE,
+    BTC_BLE_MESH_EVT_SENSOR_CLIENT_SET_STATE,
+    BTC_BLE_MESH_EVT_SENSOR_CLIENT_PUBLISH,
+    BTC_BLE_MESH_EVT_SENSOR_CLIENT_TIMEOUT,
+    BTC_BLE_MESH_EVT_SENSOR_CLIENT_MAX,
+} btc_ble_mesh_sensor_client_evt_t;
+
+void btc_ble_mesh_sensor_client_call_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_sensor_client_cb_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_sensor_client_arg_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
+
+void btc_ble_mesh_sensor_client_publish_callback(uint32_t opcode, struct bt_mesh_model *model,
+                                                 struct bt_mesh_msg_ctx *ctx,
+                                                 struct net_buf_simple *buf);
+
+void bt_mesh_sensor_client_cb_evt_to_btc(uint32_t opcode, uint8_t evt_type,
+                                         struct bt_mesh_model *model,
+                                         struct bt_mesh_msg_ctx *ctx,
+                                         const uint8_t *val, size_t len);
+
+typedef enum {
+    BTC_BLE_MESH_EVT_SENSOR_SERVER_STATE_CHANGE,
+    BTC_BLE_MESH_EVT_SENSOR_SERVER_RECV_GET_MSG,
+    BTC_BLE_MESH_EVT_SENSOR_SERVER_RECV_SET_MSG,
+    BTC_BLE_MESH_EVT_SENSOR_SERVER_MAX,
+} btc_ble_mesh_sensor_server_evt_t;
+
+void bt_mesh_sensor_server_cb_evt_to_btc(uint8_t evt_type, struct bt_mesh_model *model,
+                                         struct bt_mesh_msg_ctx *ctx,
+                                         const uint8_t *val, size_t len);
+
+void btc_ble_mesh_sensor_server_cb_handler(btc_msg_t *msg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BTC_BLE_MESH_SENSOR_MODEL_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_time_scene_model.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_time_scene_model.h
new file mode 100644
index 00000000000..6c878dc7769
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/btc/include/btc_ble_mesh_time_scene_model.h
@@ -0,0 +1,75 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BTC_BLE_MESH_TIME_SCENE_MODEL_H_
+#define _BTC_BLE_MESH_TIME_SCENE_MODEL_H_
+
+#include "btc/btc_manage.h"
+#include "esp_ble_mesh_time_scene_model_api.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    BTC_BLE_MESH_ACT_TIME_SCENE_CLIENT_GET_STATE,
+    BTC_BLE_MESH_ACT_TIME_SCENE_CLIENT_SET_STATE,
+    BTC_BLE_MESH_ACT_TIME_SCENE_CLIENT_MAX,
+} btc_ble_mesh_time_scene_client_act_t;
+
+typedef union {
+    struct ble_mesh_time_scene_client_get_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_time_scene_client_get_state_t *get_state;
+    } time_scene_client_get_state;
+    struct ble_mesh_time_scene_client_set_state_reg_args {
+        esp_ble_mesh_client_common_param_t *params;
+        esp_ble_mesh_time_scene_client_set_state_t *set_state;
+    } time_scene_client_set_state;
+} btc_ble_mesh_time_scene_client_args_t;
+
+typedef enum {
+    BTC_BLE_MESH_EVT_TIME_SCENE_CLIENT_GET_STATE,
+    BTC_BLE_MESH_EVT_TIME_SCENE_CLIENT_SET_STATE,
+    BTC_BLE_MESH_EVT_TIME_SCENE_CLIENT_PUBLISH,
+    BTC_BLE_MESH_EVT_TIME_SCENE_CLIENT_TIMEOUT,
+    BTC_BLE_MESH_EVT_TIME_SCENE_CLIENT_MAX,
+} btc_ble_mesh_time_scene_client_evt_t;
+
+void btc_ble_mesh_time_scene_client_call_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_time_scene_client_cb_handler(btc_msg_t *msg);
+
+void btc_ble_mesh_time_scene_client_arg_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
+
+void btc_ble_mesh_time_scene_client_publish_callback(uint32_t opcode, struct bt_mesh_model *model,
+                                                     struct bt_mesh_msg_ctx *ctx,
+                                                     struct net_buf_simple *buf);
+
+void bt_mesh_time_scene_client_cb_evt_to_btc(uint32_t opcode, uint8_t evt_type,
+                                             struct bt_mesh_model *model,
+                                             struct bt_mesh_msg_ctx *ctx,
+                                             const uint8_t *val, size_t len);
+
+typedef enum {
+    BTC_BLE_MESH_EVT_TIME_SCENE_SERVER_STATE_CHANGE,
+    BTC_BLE_MESH_EVT_TIME_SCENE_SERVER_RECV_GET_MSG,
+    BTC_BLE_MESH_EVT_TIME_SCENE_SERVER_RECV_SET_MSG,
+    BTC_BLE_MESH_EVT_TIME_SCENE_SERVER_RECV_STATUS_MSG,
+    BTC_BLE_MESH_EVT_TIME_SCENE_SERVER_MAX,
+} btc_ble_mesh_time_scene_server_evt_t;
+
+void bt_mesh_time_scene_server_cb_evt_to_btc(uint8_t evt_type, struct bt_mesh_model *model,
+                                             struct bt_mesh_msg_ctx *ctx,
+                                             const uint8_t *val, size_t len);
+
+void btc_ble_mesh_time_scene_server_cb_handler(btc_msg_t *msg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BTC_BLE_MESH_TIME_SCENE_MODEL_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_atomic.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_atomic.h
new file mode 100644
index 00000000000..6d62840e46e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_atomic.h
@@ -0,0 +1,305 @@
+/* atomic operations */
+
+/*
+ * SPDX-FileCopyrightText: 1997-2015 Wind River Systems, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_ATOMIC_H_
+#define _BLE_MESH_ATOMIC_H_
+
+#include "mesh_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef bt_mesh_atomic_t bt_mesh_atomic_val_t;
+
+/**
+ * @defgroup atomic_apis Atomic Services APIs
+ * @ingroup kernel_apis
+ * @{
+ */
+
+/**
+ *
+ * @brief Atomic increment.
+ *
+ * This routine performs an atomic increment by 1 on @a target.
+ *
+ * @param target Address of atomic variable.
+ *
+ * @return Previous value of @a target.
+ */
+#ifdef CONFIG_ATOMIC_OPERATIONS_BUILTIN
+static inline bt_mesh_atomic_val_t bt_mesh_atomic_inc(bt_mesh_atomic_t *target)
+{
+    return bt_mesh_atomic_add(target, 1);
+}
+#else
+extern bt_mesh_atomic_val_t bt_mesh_atomic_inc(bt_mesh_atomic_t *target);
+#endif
+
+/**
+ *
+ * @brief Atomic decrement.
+ *
+ * This routine performs an atomic decrement by 1 on @a target.
+ *
+ * @param target Address of atomic variable.
+ *
+ * @return Previous value of @a target.
+ */
+#ifdef CONFIG_ATOMIC_OPERATIONS_BUILTIN
+static inline bt_mesh_atomic_val_t bt_mesh_atomic_dec(bt_mesh_atomic_t *target)
+{
+    return bt_mesh_atomic_sub(target, 1);
+}
+#else
+extern bt_mesh_atomic_val_t bt_mesh_atomic_dec(bt_mesh_atomic_t *target);
+#endif
+
+/**
+ *
+ * @brief Atomic get.
+ *
+ * This routine performs an atomic read on @a target.
+ *
+ * @param target Address of atomic variable.
+ *
+ * @return Value of @a target.
+ */
+#ifdef CONFIG_ATOMIC_OPERATIONS_BUILTIN
+static inline bt_mesh_atomic_val_t bt_mesh_atomic_get(const bt_mesh_atomic_t *target)
+{
+    return __atomic_load_n(target, __ATOMIC_SEQ_CST);
+}
+#else
+extern bt_mesh_atomic_val_t bt_mesh_atomic_get(const bt_mesh_atomic_t *target);
+#endif
+
+/**
+ *
+ * @brief Atomic get-and-set.
+ *
+ * This routine atomically sets @a target to @a value and returns
+ * the previous value of @a target.
+ *
+ * @param target Address of atomic variable.
+ * @param value Value to write to @a target.
+ *
+ * @return Previous value of @a target.
+ */
+#ifdef CONFIG_ATOMIC_OPERATIONS_BUILTIN
+static inline bt_mesh_atomic_val_t bt_mesh_atomic_set(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t value)
+{
+    /* This builtin, as described by Intel, is not a traditional
+     * test-and-set operation, but rather an atomic exchange operation. It
+     * writes value into *ptr, and returns the previous contents of *ptr.
+     */
+    return __atomic_exchange_n(target, value, __ATOMIC_SEQ_CST);
+}
+#else
+extern bt_mesh_atomic_val_t bt_mesh_atomic_set(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t value);
+#endif
+
+/**
+ *
+ * @brief Atomic bitwise inclusive OR.
+ *
+ * This routine atomically sets @a target to the bitwise inclusive OR of
+ * @a target and @a value.
+ *
+ * @param target Address of atomic variable.
+ * @param value Value to OR.
+ *
+ * @return Previous value of @a target.
+ */
+#ifdef CONFIG_ATOMIC_OPERATIONS_BUILTIN
+static inline bt_mesh_atomic_val_t bt_mesh_atomic_or(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t value)
+{
+    return __atomic_fetch_or(target, value, __ATOMIC_SEQ_CST);
+}
+#else
+extern bt_mesh_atomic_val_t bt_mesh_atomic_or(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t value);
+#endif
+
+/**
+ *
+ * @brief Atomic bitwise AND.
+ *
+ * This routine atomically sets @a target to the bitwise AND of @a target
+ * and @a value.
+ *
+ * @param target Address of atomic variable.
+ * @param value Value to AND.
+ *
+ * @return Previous value of @a target.
+ */
+#ifdef CONFIG_ATOMIC_OPERATIONS_BUILTIN
+static inline bt_mesh_atomic_val_t bt_mesh_atomic_and(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t value)
+{
+    return __atomic_fetch_and(target, value, __ATOMIC_SEQ_CST);
+}
+#else
+extern bt_mesh_atomic_val_t bt_mesh_atomic_and(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t value);
+#endif
+
+/**
+ * @cond INTERNAL_HIDDEN
+ */
+
+#define BLE_MESH_ATOMIC_BITS            (sizeof(bt_mesh_atomic_val_t) * 8)
+#define BLE_MESH_ATOMIC_MASK(bit)       (1 << ((bit) & (BLE_MESH_ATOMIC_BITS - 1)))
+#define BLE_MESH_ATOMIC_ELEM(addr, bit) ((addr) + ((bit) / BLE_MESH_ATOMIC_BITS))
+
+/**
+ * INTERNAL_HIDDEN @endcond
+ */
+
+/**
+ * @brief Define an array of atomic variables.
+ *
+ * This macro defines an array of atomic variables containing at least
+ * @a num_bits bits.
+ *
+ * @note
+ * If used from file scope, the bits of the array are initialized to zero;
+ * if used from within a function, the bits are left uninitialized.
+ *
+ * @param name Name of array of atomic variables.
+ * @param num_bits Number of bits needed.
+ */
+#define BLE_MESH_ATOMIC_DEFINE(name, num_bits) \
+        bt_mesh_atomic_t name[1 + ((num_bits) - 1) / BLE_MESH_ATOMIC_BITS]
+
+/**
+ * @brief Atomically test a bit.
+ *
+ * This routine tests whether bit number @a bit of @a target is set or not.
+ * The target may be a single atomic variable or an array of them.
+ *
+ * @param target Address of atomic variable or array.
+ * @param bit Bit number (starting from 0).
+ *
+ * @return 1 if the bit was set, 0 if it wasn't.
+ */
+static inline int bt_mesh_atomic_test_bit(const bt_mesh_atomic_t *target, int bit)
+{
+    bt_mesh_atomic_val_t val = bt_mesh_atomic_get(BLE_MESH_ATOMIC_ELEM(target, bit));
+
+    return (1 & (val >> (bit & (BLE_MESH_ATOMIC_BITS - 1))));
+}
+
+/**
+ * @brief Atomically test and clear a bit.
+ *
+ * Atomically clear bit number @a bit of @a target and return its old value.
+ * The target may be a single atomic variable or an array of them.
+ *
+ * @param target Address of atomic variable or array.
+ * @param bit Bit number (starting from 0).
+ *
+ * @return 1 if the bit was set, 0 if it wasn't.
+ */
+static inline int bt_mesh_atomic_test_and_clear_bit(bt_mesh_atomic_t *target, int bit)
+{
+    bt_mesh_atomic_val_t mask = BLE_MESH_ATOMIC_MASK(bit);
+    bt_mesh_atomic_val_t old;
+
+    old = bt_mesh_atomic_and(BLE_MESH_ATOMIC_ELEM(target, bit), ~mask);
+
+    return (old & mask) != 0;
+}
+
+/**
+ * @brief Atomically set a bit.
+ *
+ * Atomically set bit number @a bit of @a target and return its old value.
+ * The target may be a single atomic variable or an array of them.
+ *
+ * @param target Address of atomic variable or array.
+ * @param bit Bit number (starting from 0).
+ *
+ * @return 1 if the bit was set, 0 if it wasn't.
+ */
+static inline int bt_mesh_atomic_test_and_set_bit(bt_mesh_atomic_t *target, int bit)
+{
+    bt_mesh_atomic_val_t mask = BLE_MESH_ATOMIC_MASK(bit);
+    bt_mesh_atomic_val_t old;
+
+    old = bt_mesh_atomic_or(BLE_MESH_ATOMIC_ELEM(target, bit), mask);
+
+    return (old & mask) != 0;
+}
+
+/**
+ * @brief Atomically clear a bit.
+ *
+ * Atomically clear bit number @a bit of @a target.
+ * The target may be a single atomic variable or an array of them.
+ *
+ * @param target Address of atomic variable or array.
+ * @param bit Bit number (starting from 0).
+ *
+ * @return N/A
+ */
+static inline void bt_mesh_atomic_clear_bit(bt_mesh_atomic_t *target, int bit)
+{
+    bt_mesh_atomic_val_t mask = BLE_MESH_ATOMIC_MASK(bit);
+
+    (void)bt_mesh_atomic_and(BLE_MESH_ATOMIC_ELEM(target, bit), ~mask);
+}
+
+/**
+ * @brief Atomically set a bit.
+ *
+ * Atomically set bit number @a bit of @a target.
+ * The target may be a single atomic variable or an array of them.
+ *
+ * @param target Address of atomic variable or array.
+ * @param bit Bit number (starting from 0).
+ *
+ * @return N/A
+ */
+static inline void bt_mesh_atomic_set_bit(bt_mesh_atomic_t *target, int bit)
+{
+    bt_mesh_atomic_val_t mask = BLE_MESH_ATOMIC_MASK(bit);
+
+    (void)bt_mesh_atomic_or(BLE_MESH_ATOMIC_ELEM(target, bit), mask);
+}
+
+/**
+ * @brief Atomically set a bit to a given value.
+ *
+ * Atomically set bit number @a bit of @a target to value @a val.
+ * The target may be a single atomic variable or an array of them.
+ *
+ * @param target Address of atomic variable or array.
+ * @param bit Bit number (starting from 0).
+ * @param val true for 1, false for 0.
+ *
+ * @return N/A
+ */
+static inline void bt_mesh_atomic_set_bit_to(bt_mesh_atomic_t *target, int bit, bool val)
+{
+    bt_mesh_atomic_val_t mask = BLE_MESH_ATOMIC_MASK(bit);
+
+    if (val) {
+        (void)bt_mesh_atomic_or(BLE_MESH_ATOMIC_ELEM(target, bit), mask);
+    } else {
+        (void)bt_mesh_atomic_and(BLE_MESH_ATOMIC_ELEM(target, bit), ~mask);
+    }
+}
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_ATOMIC_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_buf.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_buf.h
new file mode 100644
index 00000000000..33baa8cc81d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_buf.h
@@ -0,0 +1,1758 @@
+/** @file
+ *  @brief Buffer management.
+ */
+
+/*
+ * SPDX-FileCopyrightText: 2015 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _BLE_MESH_BUF_H_
+#define _BLE_MESH_BUF_H_
+
+#include "mesh_config.h"
+#include "mesh_types.h"
+#include "mesh_slist.h"
+#include "mesh_compiler.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Unaligned access */
+#define UNALIGNED_GET(p)                    \
+__extension__ ({                            \
+    struct  __attribute__((__packed__)) {   \
+        __typeof__(*(p)) __v;               \
+    } *__p = (__typeof__(__p)) (p);         \
+    __p->__v;                               \
+})
+
+#define BLE_MESH_NET_BUF_USER_DATA_SIZE     4
+
+/**
+ * @brief Network buffer library
+ * @defgroup net_buf Network Buffer Library
+ * @ingroup networking
+ * @{
+ */
+
+/* Alignment needed for various parts of the buffer definition */
+#define __net_buf_align __aligned(sizeof(int))
+
+/**
+ *  @def NET_BUF_SIMPLE_DEFINE
+ *  @brief Define a net_buf_simple stack variable.
+ *
+ *  This is a helper macro which is used to define a net_buf_simple object
+ *  on the stack.
+ *
+ *  @param _name Name of the net_buf_simple object.
+ *  @param _size Maximum data storage for the buffer.
+ */
+#define NET_BUF_SIMPLE_DEFINE(_name, _size) \
+    uint8_t net_buf_data_##_name[_size];    \
+    struct net_buf_simple _name = {         \
+        .data  = net_buf_data_##_name,      \
+        .len   = 0,                         \
+        .size  = _size,                     \
+        .__buf = net_buf_data_##_name,      \
+    }
+
+/**
+ * @def NET_BUF_SIMPLE_DEFINE_STATIC
+ * @brief Define a static net_buf_simple variable.
+ *
+ * This is a helper macro which is used to define a static net_buf_simple
+ * object.
+ *
+ * @param _name Name of the net_buf_simple object.
+ * @param _size Maximum data storage for the buffer.
+ */
+#define NET_BUF_SIMPLE_DEFINE_STATIC(_name, _size)  \
+    static uint8_t net_buf_data_##_name[_size];     \
+    static struct net_buf_simple _name = {          \
+        .data  = net_buf_data_##_name,              \
+        .len   = 0,                                 \
+        .size  = _size,                             \
+        .__buf = net_buf_data_##_name,              \
+    }
+
+/**
+ * @brief Simple network buffer representation.
+ *
+ * This is a simpler variant of the net_buf object (in fact net_buf uses
+ * net_buf_simple internally). It doesn't provide any kind of reference
+ * counting, user data, dynamic allocation, or in general the ability to
+ * pass through kernel objects such as FIFOs.
+ *
+ * The main use of this is for scenarios where the meta-data of the normal
+ * net_buf isn't needed and causes too much overhead. This could be e.g.
+ * when the buffer only needs to be allocated on the stack or when the
+ * access to and lifetime of the buffer is well controlled and constrained.
+ */
+struct net_buf_simple {
+    /** Pointer to the start of data in the buffer. */
+    uint8_t *data;
+
+    /** Length of the data behind the data pointer. */
+    uint16_t len;
+
+    /** Amount of data that this buffer can store. */
+    uint16_t size;
+
+    /** Start of the data storage. Not to be accessed directly
+     *  (the data pointer should be used instead).
+     */
+    uint8_t *__buf;
+};
+
+/**
+ * @def NET_BUF_SIMPLE
+ * @brief Define a net_buf_simple stack variable and get a pointer to it.
+ *
+ * This is a helper macro which is used to define a net_buf_simple object on
+ * the stack and the get a pointer to it as follows:
+ *
+ * struct net_buf_simple *my_buf = NET_BUF_SIMPLE(10);
+ *
+ * After creating the object it needs to be initialized by calling
+ * net_buf_simple_init().
+ *
+ * @param _size Maximum data storage for the buffer.
+ *
+ * @return Pointer to stack-allocated net_buf_simple object.
+ */
+#define NET_BUF_SIMPLE(_size)                   \
+    ((struct net_buf_simple *)(&(struct {       \
+        struct net_buf_simple buf;              \
+        uint8_t data[_size] __net_buf_align;    \
+    }) {                                        \
+        .buf.size = _size,                      \
+        .buf.__buf = NULL,                      \
+    }))
+
+/**
+ * @brief Initialize a net_buf_simple object.
+ *
+ * This needs to be called after creating a net_buf_simple object using
+ * the NET_BUF_SIMPLE macro.
+ *
+ * @param buf Buffer to initialize.
+ * @param reserve_head Headroom to reserve.
+ */
+static inline void net_buf_simple_init(struct net_buf_simple *buf,
+                                       size_t reserve_head)
+{
+    if (!buf->__buf) {
+        buf->__buf = (uint8_t *)buf + sizeof(*buf);
+    }
+
+    buf->data = buf->__buf + reserve_head;
+    buf->len = 0;
+}
+
+/**
+ * @brief Initialize a net_buf_simple object with data.
+ *
+ * Initialized buffer object with external data.
+ *
+ * @param buf Buffer to initialize.
+ * @param data External data pointer
+ * @param size Amount of data the pointed data buffer if able to fit.
+ */
+void net_buf_simple_init_with_data(struct net_buf_simple *buf,
+                                   void *data, size_t size);
+
+/**
+ * @brief Reset buffer
+ *
+ * Reset buffer data so it can be reused for other purposes.
+ *
+ * @param buf Buffer to reset.
+ */
+static inline void net_buf_simple_reset(struct net_buf_simple *buf)
+{
+    buf->len  = 0;
+    buf->data = buf->__buf;
+}
+
+/**
+ * Clone buffer state, using the same data buffer.
+ *
+ * Initializes a buffer to point to the same data as an existing buffer.
+ * Allows operations on the same data without altering the length and
+ * offset of the original.
+ *
+ * @param original Buffer to clone.
+ * @param clone The new clone.
+ */
+void net_buf_simple_clone(const struct net_buf_simple *original,
+                          struct net_buf_simple *clone);
+
+/**
+ * @brief Prepare data to be added at the end of the buffer
+ *
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param len Number of bytes to increment the length with.
+ *
+ * @return The original tail of the buffer.
+ */
+void *net_buf_simple_add(struct net_buf_simple *buf, size_t len);
+
+/**
+ * @brief Copy given number of bytes from memory to the end of the buffer
+ *
+ * Increments the data length of the  buffer to account for more data at the
+ * end.
+ *
+ * @param buf Buffer to update.
+ * @param mem Location of data to be added.
+ * @param len Length of data to be added
+ *
+ * @return The original tail of the buffer.
+ */
+void *net_buf_simple_add_mem(struct net_buf_simple *buf, const void *mem,
+                             size_t len);
+
+/**
+ * @brief Add (8-bit) byte at the end of the buffer
+ *
+ * Increments the data length of the  buffer to account for more data at the
+ * end.
+ *
+ * @param buf Buffer to update.
+ * @param val byte value to be added.
+ *
+ * @return Pointer to the value added
+ */
+uint8_t *net_buf_simple_add_u8(struct net_buf_simple *buf, uint8_t val);
+
+/**
+ * @brief Add 16-bit value at the end of the buffer
+ *
+ * Adds 16-bit value in little endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 16-bit value to be added.
+ */
+void net_buf_simple_add_le16(struct net_buf_simple *buf, uint16_t val);
+
+/**
+ * @brief Add 16-bit value at the end of the buffer
+ *
+ * Adds 16-bit value in big endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 16-bit value to be added.
+ */
+void net_buf_simple_add_be16(struct net_buf_simple *buf, uint16_t val);
+
+/**
+ * @brief Add 24-bit value at the end of the buffer
+ *
+ * Adds 24-bit value in little endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 24-bit value to be added.
+ */
+void net_buf_simple_add_le24(struct net_buf_simple *buf, uint32_t val);
+
+/**
+ * @brief Add 24-bit value at the end of the buffer
+ *
+ * Adds 24-bit value in big endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 24-bit value to be added.
+ */
+void net_buf_simple_add_be24(struct net_buf_simple *buf, uint32_t val);
+
+/**
+ * @brief Add 32-bit value at the end of the buffer
+ *
+ * Adds 32-bit value in little endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 32-bit value to be added.
+ */
+void net_buf_simple_add_le32(struct net_buf_simple *buf, uint32_t val);
+
+/**
+ * @brief Add 32-bit value at the end of the buffer
+ *
+ * Adds 32-bit value in big endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 32-bit value to be added.
+ */
+void net_buf_simple_add_be32(struct net_buf_simple *buf, uint32_t val);
+
+/**
+ * @brief Add 48-bit value at the end of the buffer
+ *
+ * Adds 48-bit value in little endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 48-bit value to be added.
+ */
+void net_buf_simple_add_le48(struct net_buf_simple *buf, uint64_t val);
+
+/**
+ * @brief Add 48-bit value at the end of the buffer
+ *
+ * Adds 48-bit value in big endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 48-bit value to be added.
+ */
+void net_buf_simple_add_be48(struct net_buf_simple *buf, uint64_t val);
+
+/**
+ * @brief Add 64-bit value at the end of the buffer
+ *
+ * Adds 64-bit value in little endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 64-bit value to be added.
+ */
+void net_buf_simple_add_le64(struct net_buf_simple *buf, uint64_t val);
+
+/**
+ * @brief Add 64-bit value at the end of the buffer
+ *
+ * Adds 64-bit value in big endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 64-bit value to be added.
+ */
+void net_buf_simple_add_be64(struct net_buf_simple *buf, uint64_t val);
+
+/**
+ * @brief Push data to the beginning of the buffer.
+ *
+ * Modifies the data pointer and buffer length to account for more data
+ * in the beginning of the buffer.
+ *
+ * @param buf Buffer to update.
+ * @param len Number of bytes to add to the beginning.
+ *
+ * @return The new beginning of the buffer data.
+ */
+void *net_buf_simple_push(struct net_buf_simple *buf, size_t len);
+
+/**
+ * @brief Push 16-bit value to the beginning of the buffer
+ *
+ * Adds 16-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 16-bit value to be pushed to the buffer.
+ */
+void net_buf_simple_push_le16(struct net_buf_simple *buf, uint16_t val);
+
+/**
+ * @brief Push 16-bit value to the beginning of the buffer
+ *
+ * Adds 16-bit value in big endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 16-bit value to be pushed to the buffer.
+ */
+void net_buf_simple_push_be16(struct net_buf_simple *buf, uint16_t val);
+
+/**
+ * @brief Push 8-bit value to the beginning of the buffer
+ *
+ * Adds 8-bit value the beginning of the buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 8-bit value to be pushed to the buffer.
+ */
+void net_buf_simple_push_u8(struct net_buf_simple *buf, uint8_t val);
+
+/**
+ * @brief Push 24-bit value to the beginning of the buffer
+ *
+ * Adds 24-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 24-bit value to be pushed to the buffer.
+ */
+void net_buf_simple_push_le24(struct net_buf_simple *buf, uint32_t val);
+
+/**
+ * @brief Push 24-bit value to the beginning of the buffer
+ *
+ * Adds 24-bit value in big endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 24-bit value to be pushed to the buffer.
+ */
+void net_buf_simple_push_be24(struct net_buf_simple *buf, uint32_t val);
+
+/**
+ * @brief Push 32-bit value to the beginning of the buffer
+ *
+ * Adds 32-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 32-bit value to be pushed to the buffer.
+ */
+void net_buf_simple_push_le32(struct net_buf_simple *buf, uint32_t val);
+
+/**
+ * @brief Push 32-bit value to the beginning of the buffer
+ *
+ * Adds 32-bit value in big endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 32-bit value to be pushed to the buffer.
+ */
+void net_buf_simple_push_be32(struct net_buf_simple *buf, uint32_t val);
+
+/**
+ * @brief Push 48-bit value to the beginning of the buffer
+ *
+ * Adds 48-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 48-bit value to be pushed to the buffer.
+ */
+void net_buf_simple_push_le48(struct net_buf_simple *buf, uint64_t val);
+
+/**
+ * @brief Push 48-bit value to the beginning of the buffer
+ *
+ * Adds 48-bit value in big endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 48-bit value to be pushed to the buffer.
+ */
+void net_buf_simple_push_be48(struct net_buf_simple *buf, uint64_t val);
+
+/**
+ * @brief Push 64-bit value to the beginning of the buffer
+ *
+ * Adds 64-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 64-bit value to be pushed to the buffer.
+ */
+void net_buf_simple_push_le64(struct net_buf_simple *buf, uint64_t val);
+
+/**
+ * @brief Push 64-bit value to the beginning of the buffer
+ *
+ * Adds 64-bit value in big endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 64-bit value to be pushed to the buffer.
+ */
+void net_buf_simple_push_be64(struct net_buf_simple *buf, uint64_t val);
+
+/**
+ * @brief Remove data from the beginning of the buffer.
+ *
+ * Removes data from the beginning of the buffer by modifying the data
+ * pointer and buffer length.
+ *
+ * @param buf Buffer to update.
+ * @param len Number of bytes to remove.
+ *
+ * @return New beginning of the buffer data.
+ */
+void *net_buf_simple_pull(struct net_buf_simple *buf, size_t len);
+
+/**
+ * @brief Remove data from the beginning of the buffer.
+ *
+ * Removes data from the beginning of the buffer by modifying the data
+ * pointer and buffer length.
+ *
+ * @param buf Buffer to update.
+ * @param len Number of bytes to remove.
+ *
+ * @return Pointer to the old location of the buffer data.
+ */
+void *net_buf_simple_pull_mem(struct net_buf_simple *buf, size_t len);
+
+/**
+ * @brief Remove a 8-bit value from the beginning of the buffer
+ *
+ * Same idea as with net_buf_simple_pull(), but a helper for operating
+ * on 8-bit values.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return The 8-bit removed value
+ */
+uint8_t net_buf_simple_pull_u8(struct net_buf_simple *buf);
+
+/**
+ * @brief Remove and convert 16 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_simple_pull(), but a helper for operating
+ * on 16-bit little endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 16-bit value converted from little endian to host endian.
+ */
+uint16_t net_buf_simple_pull_le16(struct net_buf_simple *buf);
+
+/**
+ * @brief Remove and convert 16 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_simple_pull(), but a helper for operating
+ * on 16-bit big endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 16-bit value converted from big endian to host endian.
+ */
+uint16_t net_buf_simple_pull_be16(struct net_buf_simple *buf);
+
+/**
+ * @brief Remove and convert 24 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_simple_pull(), but a helper for operating
+ * on 24-bit little endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 24-bit value converted from little endian to host endian.
+ */
+uint32_t net_buf_simple_pull_le24(struct net_buf_simple *buf);
+
+/**
+ * @brief Remove and convert 24 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_simple_pull(), but a helper for operating
+ * on 24-bit big endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 24-bit value converted from big endian to host endian.
+ */
+uint32_t net_buf_simple_pull_be24(struct net_buf_simple *buf);
+
+/**
+ * @brief Remove and convert 32 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_simple_pull(), but a helper for operating
+ * on 32-bit little endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 32-bit value converted from little endian to host endian.
+ */
+uint32_t net_buf_simple_pull_le32(struct net_buf_simple *buf);
+
+/**
+ * @brief Remove and convert 32 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_simple_pull(), but a helper for operating
+ * on 32-bit big endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 32-bit value converted from big endian to host endian.
+ */
+uint32_t net_buf_simple_pull_be32(struct net_buf_simple *buf);
+
+/**
+ * @brief Remove and convert 48 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_simple_pull(), but a helper for operating
+ * on 48-bit little endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 48-bit value converted from little endian to host endian.
+ */
+uint64_t net_buf_simple_pull_le48(struct net_buf_simple *buf);
+
+/**
+ * @brief Remove and convert 48 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_simple_pull(), but a helper for operating
+ * on 48-bit big endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 48-bit value converted from big endian to host endian.
+ */
+uint64_t net_buf_simple_pull_be48(struct net_buf_simple *buf);
+
+/**
+ * @brief Remove and convert 64 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_simple_pull(), but a helper for operating
+ * on 64-bit little endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 64-bit value converted from little endian to host endian.
+ */
+uint64_t net_buf_simple_pull_le64(struct net_buf_simple *buf);
+
+/**
+ * @brief Remove and convert 64 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_simple_pull(), but a helper for operating
+ * on 64-bit big endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 64-bit value converted from big endian to host endian.
+ */
+uint64_t net_buf_simple_pull_be64(struct net_buf_simple *buf);
+
+/**
+ * @brief Get the tail pointer for a buffer.
+ *
+ * Get a pointer to the end of the data in a buffer.
+ *
+ * @param buf Buffer.
+ *
+ * @return Tail pointer for the buffer.
+ */
+static inline uint8_t *net_buf_simple_tail(struct net_buf_simple *buf)
+{
+    return buf->data + buf->len;
+}
+
+/**
+ * @brief Check buffer headroom.
+ *
+ * Check how much free space there is in the beginning of the buffer.
+ *
+ * buf A valid pointer on a buffer
+ *
+ * @return Number of bytes available in the beginning of the buffer.
+ */
+size_t net_buf_simple_headroom(struct net_buf_simple *buf);
+
+/**
+ * @brief Check buffer tailroom.
+ *
+ * Check how much free space there is at the end of the buffer.
+ *
+ * @param buf A valid pointer on a buffer
+ *
+ * @return Number of bytes available at the end of the buffer.
+ */
+size_t net_buf_simple_tailroom(struct net_buf_simple *buf);
+
+/**
+ * @brief Parsing state of a buffer.
+ *
+ * This is used for temporarily storing the parsing state of a buffer
+ * while giving control of the parsing to a routine which we don't
+ * control.
+ */
+struct net_buf_simple_state {
+    /** Offset of the data pointer from the beginning of the storage */
+    uint16_t offset;
+    /** Length of data */
+    uint16_t len;
+};
+
+/**
+ * @brief Save the parsing state of a buffer.
+ *
+ * Saves the parsing state of a buffer so it can be restored later.
+ *
+ * @param buf Buffer from which the state should be saved.
+ * @param state Storage for the state.
+ */
+static inline void net_buf_simple_save(struct net_buf_simple *buf,
+                                       struct net_buf_simple_state *state)
+{
+    state->offset = net_buf_simple_headroom(buf);
+    state->len = buf->len;
+}
+
+/**
+ * @brief Restore the parsing state of a buffer.
+ *
+ * Restores the parsing state of a buffer from a state previously stored
+ * by net_buf_simple_save().
+ *
+ * @param buf Buffer to which the state should be restored.
+ * @param state Stored state.
+ */
+static inline void net_buf_simple_restore(struct net_buf_simple *buf,
+                                          struct net_buf_simple_state *state)
+{
+    buf->data = buf->__buf + state->offset;
+    buf->len = state->len;
+}
+
+/**
+ * @brief Initialize buffer with the given headroom.
+ *
+ * The buffer is not expected to contain any data when this API is called.
+ *
+ * @param buf Buffer to initialize.
+ * @param reserve How much headroom to reserve.
+ */
+void net_buf_simple_reserve(struct net_buf_simple *buf, size_t reserve);
+
+/**
+ * Flag indicating that the buffer has associated fragments. Only used
+ * internally by the buffer handling code while the buffer is inside a
+ * FIFO, meaning this never needs to be explicitly set or unset by the
+ * net_buf API user. As long as the buffer is outside of a FIFO, i.e.
+ * in practice always for the user for this API, the buf->frags pointer
+ * should be used instead.
+ */
+#define NET_BUF_FRAGS        BIT(0)
+
+/**
+ * @brief Network buffer representation.
+ *
+ * This struct is used to represent network buffers. Such buffers are
+ * normally defined through the NET_BUF_POOL_*_DEFINE() APIs and allocated
+ * using the net_buf_alloc() API.
+ */
+struct net_buf {
+    union {
+        /** Allow placing the buffer into sys_slist_t */
+        sys_snode_t node;
+
+        /** Fragments associated with this buffer. */
+        struct net_buf *frags;
+    };
+
+    /** Reference count. */
+    uint8_t ref;
+
+    /** Bit-field of buffer flags. */
+    uint8_t flags;
+
+    /** Where the buffer should go when freed up. */
+    struct net_buf_pool *pool;
+
+    /* Union for convenience access to the net_buf_simple members, also
+     * preserving the old API.
+     */
+    union {
+        /* The ABI of this struct must match net_buf_simple */
+        struct {
+            /** Pointer to the start of data in the buffer. */
+            uint8_t *data;
+
+            /** Length of the data behind the data pointer. */
+            uint16_t len;
+
+            /** Amount of data that this buffer can store. */
+            uint16_t size;
+
+            /** Start of the data storage. Not to be accessed
+             *  directly (the data pointer should be used
+             *  instead).
+             */
+            uint8_t *__buf;
+        };
+
+        struct net_buf_simple b;
+    };
+
+    /** System metadata for this buffer. */
+    uint8_t user_data[BLE_MESH_NET_BUF_USER_DATA_SIZE] __net_buf_align;
+};
+
+struct net_buf_data_cb {
+    uint8_t *(*alloc)(struct net_buf *buf, size_t *size, int32_t timeout);
+    uint8_t *(*ref)(struct net_buf *buf, uint8_t *data);
+    void   (*unref)(struct net_buf *buf, uint8_t *data);
+};
+
+struct net_buf_data_alloc {
+    const struct net_buf_data_cb *cb;
+    void *alloc_data;
+};
+
+struct net_buf_pool {
+    /** Number of buffers in pool */
+    const uint16_t buf_count;
+
+    /** Number of uninitialized buffers */
+    uint16_t uninit_count;
+
+#if defined(CONFIG_BLE_MESH_NET_BUF_POOL_USAGE)
+    /** Amount of available buffers in the pool. */
+    int16_t avail_count;
+
+    /** Total size of the pool. */
+    const uint16_t pool_size;
+
+    /** Name of the pool. Used when printing pool information. */
+    const char *name;
+#endif /* CONFIG_BLE_MESH_NET_BUF_POOL_USAGE */
+
+    /** Optional destroy callback when buffer is freed. */
+    void (*const destroy)(struct net_buf *buf);
+
+    /** Data allocation handlers. */
+    const struct net_buf_data_alloc *alloc;
+
+    /** Helper to access the start of storage (for net_buf_pool_init) */
+    struct net_buf *const __bufs;
+};
+
+#if defined(CONFIG_BLE_MESH_NET_BUF_POOL_USAGE)
+#define NET_BUF_POOL_INITIALIZER(_pool, _alloc, _bufs, _count, _destroy) \
+    {                                                                   \
+        .alloc = _alloc,                                                \
+        .__bufs = (struct net_buf *)_bufs,                              \
+        .buf_count = _count,                                            \
+        .uninit_count = _count,                                         \
+        .avail_count = _count,                                          \
+        .destroy = _destroy,                                            \
+        .name = STRINGIFY(_pool),                                       \
+    }
+#else
+#define NET_BUF_POOL_INITIALIZER(_pool, _alloc, _bufs, _count, _destroy) \
+    {                                                                   \
+        .alloc = _alloc,                                                \
+        .__bufs = (struct net_buf *)_bufs,                              \
+        .buf_count = _count,                                            \
+        .uninit_count = _count,                                         \
+        .destroy = _destroy,                                            \
+    }
+#endif /* CONFIG_BLE_MESH_NET_BUF_POOL_USAGE */
+
+struct net_buf_pool_fixed {
+    size_t data_size;
+    uint8_t *data_pool;
+};
+
+/** @cond INTERNAL_HIDDEN */
+extern const struct net_buf_data_cb net_buf_fixed_cb;
+
+/**
+ * @def NET_BUF_POOL_FIXED_DEFINE
+ * @brief Define a new pool for buffers based on fixed-size data
+ *
+ * Defines a net_buf_pool struct and the necessary memory storage (array of
+ * structs) for the needed amount of buffers. After this, the buffers can be
+ * accessed from the pool through net_buf_alloc. The pool is defined as a
+ * static variable, so if it needs to be exported outside the current module
+ * this needs to happen with the help of a separate pointer rather than an
+ * extern declaration.
+ *
+ * The data payload of the buffers will be allocated from a byte array
+ * of fixed sized chunks. This kind of pool does not support blocking on
+ * the data allocation, so the timeout passed to net_buf_alloc will be
+ * always treated as K_NO_WAIT when trying to allocate the data. This means
+ * that allocation failures, i.e. NULL returns, must always be handled
+ * cleanly.
+ *
+ * If provided with a custom destroy callback, this callback is
+ * responsible for eventually calling net_buf_destroy() to complete the
+ * process of returning the buffer to the pool.
+ *
+ * @param _name      Name of the pool variable.
+ * @param _count     Number of buffers in the pool.
+ * @param _data_size Maximum data payload per buffer.
+ * @param _destroy   Optional destroy callback when buffer is freed.
+ */
+#define NET_BUF_POOL_FIXED_DEFINE(_name, _count, _data_size, _destroy)      \
+    static struct net_buf net_buf_##_name[_count];                          \
+    static uint8_t net_buf_data_##_name[_count][_data_size];                \
+    static const struct net_buf_pool_fixed net_buf_fixed_##_name = {        \
+        .data_size = _data_size,                                            \
+        .data_pool = (uint8_t *)net_buf_data_##_name,                       \
+    };                                                                      \
+    static const struct net_buf_data_alloc net_buf_fixed_alloc_##_name = {  \
+        .cb = &net_buf_fixed_cb,                                            \
+        .alloc_data = (void *)&net_buf_fixed_##_name,                       \
+    };                                                                      \
+    struct net_buf_pool _name __net_buf_align                               \
+            __in_section(_net_buf_pool, static, _name) =                    \
+        NET_BUF_POOL_INITIALIZER(_name, &net_buf_fixed_alloc_##_name,       \
+                    net_buf_##_name, _count, _destroy)
+
+/**
+ * @def NET_BUF_POOL_DEFINE
+ * @brief Define a new pool for buffers
+ *
+ * Defines a net_buf_pool struct and the necessary memory storage (array of
+ * structs) for the needed amount of buffers. After this,the buffers can be
+ * accessed from the pool through net_buf_alloc. The pool is defined as a
+ * static variable, so if it needs to be exported outside the current module
+ * this needs to happen with the help of a separate pointer rather than an
+ * extern declaration.
+ *
+ * If provided with a custom destroy callback this callback is
+ * responsible for eventually calling net_buf_destroy() to complete the
+ * process of returning the buffer to the pool.
+ *
+ * @param _name     Name of the pool variable.
+ * @param _count    Number of buffers in the pool.
+ * @param _size     Maximum data size for each buffer.
+ * @param _ud_size  Amount of user data space to reserve.
+ * @param _destroy  Optional destroy callback when buffer is freed.
+ */
+#define NET_BUF_POOL_DEFINE(_name, _count, _size, _ud_size, _destroy)   \
+    NET_BUF_POOL_FIXED_DEFINE(_name, _count, _size, _destroy)
+
+/**
+ * @brief Get a zero-based index for a buffer.
+ *
+ * This function will translate a buffer into a zero-based index,
+ * based on its placement in its buffer pool. This can be useful if you
+ * want to associate an external array of meta-data contexts with the
+ * buffers of a pool.
+ *
+ * @param buf  Network buffer.
+ *
+ * @return Zero-based index for the buffer.
+ */
+int net_buf_id(struct net_buf *buf);
+
+/**
+ * @brief Allocate a new fixed buffer from a pool.
+ *
+ * @param pool Which pool to allocate the buffer from.
+ * @param timeout Affects the action taken should the pool be empty.
+ *        If K_NO_WAIT, then return immediately. If K_FOREVER, then
+ *        wait as long as necessary. Otherwise, wait up to the specified
+ *        number of milliseconds before timing out. Note that some types
+ *        of data allocators do not support blocking (such as the HEAP
+ *        type). In this case it's still possible for net_buf_alloc() to
+ *        fail (return NULL) even if it was given K_FOREVER.
+ *
+ * @return New buffer or NULL if out of buffers.
+ */
+#if defined(CONFIG_BLE_MESH_NET_BUF_LOG)
+struct net_buf *net_buf_alloc_fixed_debug(struct net_buf_pool *pool, int32_t timeout,
+                                          const char *func, int line);
+#define net_buf_alloc_fixed(_pool, _timeout) \
+    net_buf_alloc_fixed_debug(_pool, _timeout, __func__, __LINE__)
+#else
+struct net_buf *net_buf_alloc_fixed(struct net_buf_pool *pool, int32_t timeout);
+#endif
+
+/**
+ * @def net_buf_alloc
+ *
+ * @copydetails net_buf_alloc_fixed
+ */
+#define net_buf_alloc(pool, timeout) net_buf_alloc_fixed(pool, timeout)
+
+/**
+ *  @brief Reset buffer
+ *
+ *  Reset buffer data and flags so it can be reused for other purposes.
+ *
+ *  @param buf Buffer to reset.
+ */
+void net_buf_reset(struct net_buf *buf);
+
+/**
+ * @def net_buf_reserve
+ * @brief Initialize buffer with the given headroom.
+ *
+ * The buffer is not expected to contain any data when this API is called.
+ *
+ * @param buf Buffer to initialize.
+ * @param reserve How much headroom to reserve.
+ */
+#define net_buf_reserve(buf, reserve) net_buf_simple_reserve(&(buf)->b, reserve)
+
+/**
+ *  @brief Put a buffer into a list
+ *
+ *  Put a buffer to the end of a list. If the buffer contains follow-up
+ *  fragments this function will take care of inserting them as well
+ *  into the list.
+ *
+ *  @param list Which list to append the buffer to.
+ *  @param buf Buffer.
+ */
+void net_buf_slist_put(sys_slist_t *list, struct net_buf *buf);
+
+/**
+ *  @brief Get a buffer from a list.
+ *
+ *  Get buffer from a list. If the buffer had any fragments, these will
+ *  automatically be recovered from the list as well and be placed to
+ *  the buffer's fragment list.
+ *
+ *  @param list Which list to take the buffer from.
+ *
+ *  @return New buffer or NULL if the FIFO is empty.
+ */
+struct net_buf *net_buf_slist_get(sys_slist_t *list);
+
+/**
+ *  @brief Decrements the reference count of a buffer.
+ *
+ *  Decrements the reference count of a buffer and puts it back into the
+ *  pool if the count reaches zero.
+ *
+ *  @param buf A valid pointer on a buffer
+ */
+#if defined(CONFIG_BLE_MESH_NET_BUF_LOG)
+void net_buf_unref_debug(struct net_buf *buf, const char *func, int line);
+#define net_buf_unref(_buf) \
+        net_buf_unref_debug(_buf, __func__, __LINE__)
+#else
+void net_buf_unref(struct net_buf *buf);
+#endif
+
+/**
+ *  @brief Increment the reference count of a buffer.
+ *
+ *  @param buf A valid pointer on a buffer
+ *
+ *  @return the buffer newly referenced
+ */
+struct net_buf *net_buf_ref(struct net_buf *buf);
+
+/**
+ *  @brief Get a pointer to the user data of a buffer.
+ *
+ *  @param buf A valid pointer on a buffer
+ *
+ *  @return Pointer to the user data of the buffer.
+ */
+static inline void *net_buf_user_data(struct net_buf *buf)
+{
+    return (void *)buf->user_data;
+}
+
+/**
+ *  @def net_buf_add
+ *  @brief Prepare data to be added at the end of the buffer
+ *
+ *  Increments the data length of a buffer to account for more data
+ *  at the end.
+ *
+ *  @param buf Buffer to update.
+ *  @param len Number of bytes to increment the length with.
+ *
+ *  @return The original tail of the buffer.
+ */
+#define net_buf_add(buf, len) net_buf_simple_add(&(buf)->b, len)
+
+/**
+ *  @def net_buf_add_mem
+ *  @brief Copy bytes from memory to the end of the buffer
+ *
+ *  Copies the given number of bytes to the end of the buffer. Increments the
+ *  data length of the  buffer to account for more data at the end.
+ *
+ *  @param buf Buffer to update.
+ *  @param mem Location of data to be added.
+ *  @param len Length of data to be added
+ *
+ *  @return The original tail of the buffer.
+ */
+#define net_buf_add_mem(buf, mem, len) net_buf_simple_add_mem(&(buf)->b, mem, len)
+
+/**
+ *  @def net_buf_add_u8
+ *  @brief Add (8-bit) byte at the end of the buffer
+ *
+ *  Adds a byte at the end of the buffer. Increments the data length of
+ *  the  buffer to account for more data at the end.
+ *
+ *  @param buf Buffer to update.
+ *  @param val byte value to be added.
+ *
+ *  @return Pointer to the value added
+ */
+#define net_buf_add_u8(buf, val) net_buf_simple_add_u8(&(buf)->b, val)
+
+/**
+ *  @def net_buf_add_le16
+ *  @brief Add 16-bit value at the end of the buffer
+ *
+ *  Adds 16-bit value in little endian format at the end of buffer.
+ *  Increments the data length of a buffer to account for more data
+ *  at the end.
+ *
+ *  @param buf Buffer to update.
+ *  @param val 16-bit value to be added.
+ */
+#define net_buf_add_le16(buf, val) net_buf_simple_add_le16(&(buf)->b, val)
+
+/**
+ *  @def net_buf_add_be16
+ *  @brief Add 16-bit value at the end of the buffer
+ *
+ *  Adds 16-bit value in big endian format at the end of buffer.
+ *  Increments the data length of a buffer to account for more data
+ *  at the end.
+ *
+ *  @param buf Buffer to update.
+ *  @param val 16-bit value to be added.
+ */
+#define net_buf_add_be16(buf, val) net_buf_simple_add_be16(&(buf)->b, val)
+
+/**
+ * @def net_buf_add_le24
+ * @brief Add 24-bit value at the end of the buffer
+ *
+ * Adds 24-bit value in little endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 24-bit value to be added.
+ */
+#define net_buf_add_le24(buf, val) net_buf_simple_add_le24(&(buf)->b, val)
+
+/**
+ * @def net_buf_add_be24
+ * @brief Add 24-bit value at the end of the buffer
+ *
+ * Adds 24-bit value in big endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 24-bit value to be added.
+ */
+#define net_buf_add_be24(buf, val) net_buf_simple_add_be24(&(buf)->b, val)
+
+/**
+ *  @def net_buf_add_le32
+ *  @brief Add 32-bit value at the end of the buffer
+ *
+ *  Adds 32-bit value in little endian format at the end of buffer.
+ *  Increments the data length of a buffer to account for more data
+ *  at the end.
+ *
+ *  @param buf Buffer to update.
+ *  @param val 32-bit value to be added.
+ */
+#define net_buf_add_le32(buf, val) net_buf_simple_add_le32(&(buf)->b, val)
+
+/**
+ *  @def net_buf_add_be32
+ *  @brief Add 32-bit value at the end of the buffer
+ *
+ *  Adds 32-bit value in big endian format at the end of buffer.
+ *  Increments the data length of a buffer to account for more data
+ *  at the end.
+ *
+ *  @param buf Buffer to update.
+ *  @param val 32-bit value to be added.
+ */
+#define net_buf_add_be32(buf, val) net_buf_simple_add_be32(&(buf)->b, val)
+
+/**
+ * @def net_buf_add_le48
+ * @brief Add 48-bit value at the end of the buffer
+ *
+ * Adds 48-bit value in little endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 48-bit value to be added.
+ */
+#define net_buf_add_le48(buf, val) net_buf_simple_add_le48(&(buf)->b, val)
+
+/**
+ * @def net_buf_add_be48
+ * @brief Add 48-bit value at the end of the buffer
+ *
+ * Adds 48-bit value in big endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 48-bit value to be added.
+ */
+#define net_buf_add_be48(buf, val) net_buf_simple_add_be48(&(buf)->b, val)
+
+/**
+ * @def net_buf_add_le64
+ * @brief Add 64-bit value at the end of the buffer
+ *
+ * Adds 64-bit value in little endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 64-bit value to be added.
+ */
+#define net_buf_add_le64(buf, val) net_buf_simple_add_le64(&(buf)->b, val)
+
+/**
+ * @def net_buf_add_be64
+ * @brief Add 64-bit value at the end of the buffer
+ *
+ * Adds 64-bit value in big endian format at the end of buffer.
+ * Increments the data length of a buffer to account for more data
+ * at the end.
+ *
+ * @param buf Buffer to update.
+ * @param val 64-bit value to be added.
+ */
+#define net_buf_add_be64(buf, val) net_buf_simple_add_be64(&(buf)->b, val)
+
+/**
+ *  @def net_buf_push
+ *  @brief Push data to the beginning of the buffer.
+ *
+ *  Modifies the data pointer and buffer length to account for more data
+ *  in the beginning of the buffer.
+ *
+ *  @param buf Buffer to update.
+ *  @param len Number of bytes to add to the beginning.
+ *
+ *  @return The new beginning of the buffer data.
+ */
+#define net_buf_push(buf, len) net_buf_simple_push(&(buf)->b, len)
+
+/**
+ *  @def net_buf_push_le16
+ *  @brief Push 16-bit value to the beginning of the buffer
+ *
+ *  Adds 16-bit value in little endian format to the beginning of the
+ *  buffer.
+ *
+ *  @param buf Buffer to update.
+ *  @param val 16-bit value to be pushed to the buffer.
+ */
+#define net_buf_push_le16(buf, val) net_buf_simple_push_le16(&(buf)->b, val)
+
+/**
+ *  @def net_buf_push_be16
+ *  @brief Push 16-bit value to the beginning of the buffer
+ *
+ *  Adds 16-bit value in little endian format to the beginning of the
+ *  buffer.
+ *
+ *  @param buf Buffer to update.
+ *  @param val 16-bit value to be pushed to the buffer.
+ */
+#define net_buf_push_be16(buf, val) net_buf_simple_push_be16(&(buf)->b, val)
+
+/**
+ *  @def net_buf_push_u8
+ *  @brief Push 8-bit value to the beginning of the buffer
+ *
+ *  Adds 8-bit value the beginning of the buffer.
+ *
+ *  @param buf Buffer to update.
+ *  @param val 8-bit value to be pushed to the buffer.
+ */
+#define net_buf_push_u8(buf, val) net_buf_simple_push_u8(&(buf)->b, val)
+
+/**
+ * @def net_buf_push_le24
+ * @brief Push 24-bit value to the beginning of the buffer
+ *
+ * Adds 24-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 24-bit value to be pushed to the buffer.
+ */
+#define net_buf_push_le24(buf, val) net_buf_simple_push_le24(&(buf)->b, val)
+
+/**
+ * @def net_buf_push_be24
+ * @brief Push 24-bit value to the beginning of the buffer
+ *
+ * Adds 24-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 24-bit value to be pushed to the buffer.
+ */
+#define net_buf_push_be24(buf, val) net_buf_simple_push_be24(&(buf)->b, val)
+
+/**
+ * @def net_buf_push_le32
+ * @brief Push 32-bit value to the beginning of the buffer
+ *
+ * Adds 32-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 32-bit value to be pushed to the buffer.
+ */
+#define net_buf_push_le32(buf, val) net_buf_simple_push_le32(&(buf)->b, val)
+
+/**
+ * @def net_buf_push_be32
+ * @brief Push 32-bit value to the beginning of the buffer
+ *
+ * Adds 32-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 32-bit value to be pushed to the buffer.
+ */
+#define net_buf_push_be32(buf, val) net_buf_simple_push_be32(&(buf)->b, val)
+
+/**
+ * @def net_buf_push_le48
+ * @brief Push 48-bit value to the beginning of the buffer
+ *
+ * Adds 48-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 48-bit value to be pushed to the buffer.
+ */
+#define net_buf_push_le48(buf, val) net_buf_simple_push_le48(&(buf)->b, val)
+
+/**
+ * @def net_buf_push_be48
+ * @brief Push 48-bit value to the beginning of the buffer
+ *
+ * Adds 48-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 48-bit value to be pushed to the buffer.
+ */
+#define net_buf_push_be48(buf, val) net_buf_simple_push_be48(&(buf)->b, val)
+
+/**
+ * @def net_buf_push_le64
+ * @brief Push 64-bit value to the beginning of the buffer
+ *
+ * Adds 64-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 64-bit value to be pushed to the buffer.
+ */
+#define net_buf_push_le64(buf, val) net_buf_simple_push_le64(&(buf)->b, val)
+
+/**
+ * @def net_buf_push_be64
+ * @brief Push 64-bit value to the beginning of the buffer
+ *
+ * Adds 64-bit value in little endian format to the beginning of the
+ * buffer.
+ *
+ * @param buf Buffer to update.
+ * @param val 64-bit value to be pushed to the buffer.
+ */
+#define net_buf_push_be64(buf, val) net_buf_simple_push_be64(&(buf)->b, val)
+
+/**
+ *  @def net_buf_pull
+ *  @brief Remove data from the beginning of the buffer.
+ *
+ *  Removes data from the beginning of the buffer by modifying the data
+ *  pointer and buffer length.
+ *
+ *  @param buf Buffer to update.
+ *  @param len Number of bytes to remove.
+ *
+ *  @return New beginning of the buffer data.
+ */
+#define net_buf_pull(buf, len) net_buf_simple_pull(&(buf)->b, len)
+
+/**
+ * @def net_buf_pull_mem
+ * @brief Remove data from the beginning of the buffer.
+ *
+ * Removes data from the beginning of the buffer by modifying the data
+ * pointer and buffer length.
+ *
+ * @param buf Buffer to update.
+ * @param len Number of bytes to remove.
+ *
+ * @return Pointer to the old beginning of the buffer data.
+ */
+#define net_buf_pull_mem(buf, len) net_buf_simple_pull_mem(&(buf)->b, len)
+
+/**
+ *  @def net_buf_pull_u8
+ *  @brief Remove a 8-bit value from the beginning of the buffer
+ *
+ *  Same idea as with net_buf_pull(), but a helper for operating on
+ *  8-bit values.
+ *
+ *  @param buf A valid pointer on a buffer.
+ *
+ *  @return The 8-bit removed value
+ */
+#define net_buf_pull_u8(buf) net_buf_simple_pull_u8(&(buf)->b)
+
+/**
+ *  @def net_buf_pull_le16
+ *  @brief Remove and convert 16 bits from the beginning of the buffer.
+ *
+ *  Same idea as with net_buf_pull(), but a helper for operating on
+ *  16-bit little endian data.
+ *
+ *  @param buf A valid pointer on a buffer.
+ *
+ *  @return 16-bit value converted from little endian to host endian.
+ */
+#define net_buf_pull_le16(buf) net_buf_simple_pull_le16(&(buf)->b)
+
+/**
+ *  @def net_buf_pull_be16
+ *  @brief Remove and convert 16 bits from the beginning of the buffer.
+ *
+ *  Same idea as with net_buf_pull(), but a helper for operating on
+ *  16-bit big endian data.
+ *
+ *  @param buf A valid pointer on a buffer.
+ *
+ *  @return 16-bit value converted from big endian to host endian.
+ */
+#define net_buf_pull_be16(buf) net_buf_simple_pull_be16(&(buf)->b)
+
+/**
+ * @def net_buf_pull_le24
+ * @brief Remove and convert 24 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_pull(), but a helper for operating on
+ * 24-bit little endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 24-bit value converted from little endian to host endian.
+ */
+#define net_buf_pull_le24(buf) net_buf_simple_pull_le24(&(buf)->b)
+
+/**
+ * @def net_buf_pull_be24
+ * @brief Remove and convert 24 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_pull(), but a helper for operating on
+ * 24-bit big endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 24-bit value converted from big endian to host endian.
+ */
+#define net_buf_pull_be24(buf) net_buf_simple_pull_be24(&(buf)->b)
+
+/**
+ *  @def net_buf_pull_le32
+ *  @brief Remove and convert 32 bits from the beginning of the buffer.
+ *
+ *  Same idea as with net_buf_pull(), but a helper for operating on
+ *  32-bit little endian data.
+ *
+ *  @param buf A valid pointer on a buffer.
+ *
+ *  @return 32-bit value converted from little endian to host endian.
+ */
+#define net_buf_pull_le32(buf) net_buf_simple_pull_le32(&(buf)->b)
+
+/**
+ *  @def net_buf_pull_be32
+ *  @brief Remove and convert 32 bits from the beginning of the buffer.
+ *
+ *  Same idea as with net_buf_pull(), but a helper for operating on
+ *  32-bit big endian data.
+ *
+ *  @param buf A valid pointer on a buffer
+ *
+ *  @return 32-bit value converted from big endian to host endian.
+ */
+#define net_buf_pull_be32(buf) net_buf_simple_pull_be32(&(buf)->b)
+
+/**
+ * @def net_buf_pull_le48
+ * @brief Remove and convert 48 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_pull(), but a helper for operating on
+ * 48-bit little endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 48-bit value converted from little endian to host endian.
+ */
+#define net_buf_pull_le48(buf) net_buf_simple_pull_le48(&(buf)->b)
+
+/**
+ * @def net_buf_pull_be48
+ * @brief Remove and convert 48 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_pull(), but a helper for operating on
+ * 48-bit big endian data.
+ *
+ * @param buf A valid pointer on a buffer
+ *
+ * @return 48-bit value converted from big endian to host endian.
+ */
+#define net_buf_pull_be48(buf) net_buf_simple_pull_be48(&(buf)->b)
+
+/**
+ * @def net_buf_pull_le64
+ * @brief Remove and convert 64 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_pull(), but a helper for operating on
+ * 64-bit little endian data.
+ *
+ * @param buf A valid pointer on a buffer.
+ *
+ * @return 64-bit value converted from little endian to host endian.
+ */
+#define net_buf_pull_le64(buf) net_buf_simple_pull_le64(&(buf)->b)
+
+/**
+ * @def net_buf_pull_be64
+ * @brief Remove and convert 64 bits from the beginning of the buffer.
+ *
+ * Same idea as with net_buf_pull(), but a helper for operating on
+ * 64-bit big endian data.
+ *
+ * @param buf A valid pointer on a buffer
+ *
+ * @return 64-bit value converted from big endian to host endian.
+ */
+#define net_buf_pull_be64(buf) net_buf_simple_pull_be64(&(buf)->b)
+
+/**
+ *  @def net_buf_tailroom
+ *  @brief Check buffer tailroom.
+ *
+ *  Check how much free space there is at the end of the buffer.
+ *
+ *  @param buf A valid pointer on a buffer
+ *
+ *  @return Number of bytes available at the end of the buffer.
+ */
+#define net_buf_tailroom(buf) net_buf_simple_tailroom(&(buf)->b)
+
+/**
+ *  @def net_buf_headroom
+ *  @brief Check buffer headroom.
+ *
+ *  Check how much free space there is in the beginning of the buffer.
+ *
+ *  buf A valid pointer on a buffer
+ *
+ *  @return Number of bytes available in the beginning of the buffer.
+ */
+#define net_buf_headroom(buf) net_buf_simple_headroom(&(buf)->b)
+
+/**
+ * @def net_buf_tail
+ * @brief Get the tail pointer for a buffer.
+ *
+ * Get a pointer to the end of the data in a buffer.
+ *
+ * @param buf Buffer.
+ *
+ * @return Tail pointer for the buffer.
+ */
+#define net_buf_tail(buf) net_buf_simple_tail(&(buf)->b)
+
+/**
+ * @brief Find the last fragment in the fragment list.
+ *
+ * @return Pointer to last fragment in the list.
+ */
+struct net_buf *net_buf_frag_last(struct net_buf *frags);
+
+/**
+ * @brief Insert a new fragment to a chain of bufs.
+ *
+ * Insert a new fragment into the buffer fragments list after the parent.
+ *
+ * Note: This function takes ownership of the fragment reference so the
+ * caller is not required to unref.
+ *
+ * @param parent Parent buffer/fragment.
+ * @param frag Fragment to insert.
+ */
+void net_buf_frag_insert(struct net_buf *parent, struct net_buf *frag);
+
+/**
+ * @brief Add a new fragment to the end of a chain of bufs.
+ *
+ * Append a new fragment into the buffer fragments list.
+ *
+ * Note: This function takes ownership of the fragment reference so the
+ * caller is not required to unref.
+ *
+ * @param head Head of the fragment chain.
+ * @param frag Fragment to add.
+ *
+ * @return New head of the fragment chain. Either head (if head
+ *         was non-NULL) or frag (if head was NULL).
+ */
+struct net_buf *net_buf_frag_add(struct net_buf *head, struct net_buf *frag);
+
+/**
+ * @brief Delete existing fragment from a chain of bufs.
+ *
+ * @param parent Parent buffer/fragment, or NULL if there is no parent.
+ * @param frag Fragment to delete.
+ *
+ * @return Pointer to the buffer following the fragment, or NULL if it
+ *         had no further fragments.
+ */
+#if defined(CONFIG_BLE_MESH_NET_BUF_LOG)
+struct net_buf *net_buf_frag_del_debug(struct net_buf *parent,
+                                       struct net_buf *frag,
+                                       const char *func, int line);
+#define net_buf_frag_del(_parent, _frag) \
+    net_buf_frag_del_debug(_parent, _frag, __func__, __LINE__)
+#else
+struct net_buf *net_buf_frag_del(struct net_buf *parent, struct net_buf *frag);
+#endif
+
+/**
+ * @brief Copy bytes from net_buf chain starting at offset to linear buffer
+ *
+ * Copy (extract) @a len bytes from @a src net_buf chain, starting from @a
+ * offset in it, to a linear buffer @a dst. Return number of bytes actually
+ * copied, which may be less than requested, if net_buf chain doesn't have
+ * enough data, or destination buffer is too small.
+ *
+ * @param dst Destination buffer
+ * @param dst_len Destination buffer length
+ * @param src Source net_buf chain
+ * @param offset Starting offset to copy from
+ * @param len Number of bytes to copy
+ * @return number of bytes actually copied
+ */
+size_t net_buf_linearize(void *dst, size_t dst_len,
+                         struct net_buf *src, size_t offset, size_t len);
+
+/**
+ * @typedef net_buf_allocator_cb
+ * @brief Network buffer allocator callback.
+ *
+ * @details The allocator callback is called when net_buf_append_bytes
+ * needs to allocate a new net_buf.
+ *
+ * @param timeout Affects the action taken should the net buf pool be empty.
+ *        If K_NO_WAIT, then return immediately. If K_FOREVER, then
+ *        wait as long as necessary. Otherwise, wait up to the specified
+ *        number of milliseconds before timing out.
+ * @param user_data The user data given in net_buf_append_bytes call.
+ * @return pointer to allocated net_buf or NULL on error.
+ */
+typedef struct net_buf *(*net_buf_allocator_cb)(int32_t timeout, void *user_data);
+
+/**
+ * @brief Append data to a list of net_buf
+ *
+ * @details Append data to a net_buf. If there is not enough space in the
+ * net_buf then more net_buf will be added, unless there are no free net_buf
+ * and timeout occurs.
+ *
+ * @param buf Network buffer.
+ * @param len Total length of input data
+ * @param value Data to be added
+ * @param timeout Timeout is passed to the net_buf allocator callback.
+ * @param allocate_cb When a new net_buf is required, use this callback.
+ * @param user_data A user data pointer to be supplied to the allocate_cb.
+ *        This pointer is can be anything from a mem_pool or a net_pkt, the
+ *        logic is left up to the allocate_cb function.
+ *
+ * @return Length of data actually added. This may be less than input
+ *         length if other timeout than K_FOREVER was used, and there
+ *         were no free fragments in a pool to accommodate all data.
+ */
+size_t net_buf_append_bytes(struct net_buf *buf, size_t len,
+                            const void *value, int32_t timeout,
+                            net_buf_allocator_cb allocate_cb, void *user_data);
+
+/**
+ * @brief Skip N number of bytes in a net_buf
+ *
+ * @details Skip N number of bytes starting from fragment's offset. If the total
+ * length of data is placed in multiple fragments, this function will skip from
+ * all fragments until it reaches N number of bytes.  Any fully skipped buffers
+ * are removed from the net_buf list.
+ *
+ * @param buf Network buffer.
+ * @param len Total length of data to be skipped.
+ *
+ * @return Pointer to the fragment or
+ *         NULL and pos is 0 after successful skip,
+ *         NULL and pos is 0xffff otherwise.
+ */
+static inline struct net_buf *net_buf_skip(struct net_buf *buf, size_t len)
+{
+    while (buf && len--) {
+        net_buf_pull_u8(buf);
+        if (!buf->len) {
+            buf = net_buf_frag_del(NULL, buf);
+        }
+    }
+
+    return buf;
+}
+
+/**
+ * @brief Calculate amount of bytes stored in fragments.
+ *
+ * Calculates the total amount of data stored in the given buffer and the
+ * fragments linked to it.
+ *
+ * @param buf Buffer to start off with.
+ *
+ * @return Number of bytes in the buffer and its fragments.
+ */
+static inline size_t net_buf_frags_len(struct net_buf *buf)
+{
+    size_t bytes = 0;
+
+    while (buf) {
+        bytes += buf->len;
+        buf = buf->frags;
+    }
+
+    return bytes;
+}
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_BUF_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_byteorder.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_byteorder.h
new file mode 100644
index 00000000000..0ccf2b5b9ea
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_byteorder.h
@@ -0,0 +1,599 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2016 Intel Corporation.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_BYTEORDER_H_
+#define _BLE_MESH_BYTEORDER_H_
+
+#include "mesh_types.h"
+#include "mesh_trace.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Internal helpers only used by the sys_* APIs further below */
+#ifndef __bswap_16
+#define __bswap_16(x) ((uint16_t) ((((x) >> 8) & 0xff) | (((x) & 0xff) << 8)))
+#endif
+
+#ifndef __bswap_24
+#define __bswap_24(x) ((uint32_t) ((((x) >> 16) & 0xff) | \
+                                   (((x)) & 0xff00) | \
+                                   (((x) & 0xff) << 16)))
+#endif
+
+#ifndef __bswap_32
+#define __bswap_32(x) ((uint32_t) ((((x) >> 24) & 0xff) | \
+                                   (((x) >> 8) & 0xff00) | \
+                                   (((x) & 0xff00) << 8) | \
+                                   (((x) & 0xff) << 24)))
+#endif
+
+#ifndef __bswap_48
+#define __bswap_48(x) ((uint64_t) ((((x) >> 40) & 0xff) | \
+                                   (((x) >> 24) & 0xff00) | \
+                                   (((x) >> 8) & 0xff0000) | \
+                                   (((x) & 0xff0000) << 8) | \
+                                   (((x) & 0xff00) << 24) | \
+                                   (((x) & 0xff) << 40)))
+#endif
+
+#ifndef __bswap_64
+#define __bswap_64(x) ((uint64_t) ((((x) >> 56) & 0xff) | \
+                                   (((x) >> 40) & 0xff00) | \
+                                   (((x) >> 24) & 0xff0000) | \
+                                   (((x) >> 8) & 0xff000000) | \
+                                   (((x) & 0xff000000) << 8) | \
+                                   (((x) & 0xff0000) << 24) | \
+                                   (((x) & 0xff00) << 40) | \
+                                   (((x) & 0xff) << 56)))
+#endif
+
+/** @def sys_le16_to_cpu
+ *  @brief Convert 16-bit integer from little-endian to host endianness.
+ *
+ *  @param val 16-bit integer in little-endian format.
+ *
+ *  @return 16-bit integer in host endianness.
+ */
+
+/** @def sys_cpu_to_le16
+ *  @brief Convert 16-bit integer from host endianness to little-endian.
+ *
+ *  @param val 16-bit integer in host endianness.
+ *
+ *  @return 16-bit integer in little-endian format.
+ */
+
+/** @def sys_le24_to_cpu
+ *  @brief Convert 24-bit integer from little-endian to host endianness.
+ *
+ *  @param val 24-bit integer in little-endian format.
+ *
+ *  @return 24-bit integer in host endianness.
+ */
+
+/** @def sys_cpu_to_le24
+ *  @brief Convert 24-bit integer from host endianness to little-endian.
+ *
+ *  @param val 24-bit integer in host endianness.
+ *
+ *  @return 24-bit integer in little-endian format.
+ */
+
+/** @def sys_le32_to_cpu
+ *  @brief Convert 32-bit integer from little-endian to host endianness.
+ *
+ *  @param val 32-bit integer in little-endian format.
+ *
+ *  @return 32-bit integer in host endianness.
+ */
+
+/** @def sys_cpu_to_le32
+ *  @brief Convert 32-bit integer from host endianness to little-endian.
+ *
+ *  @param val 32-bit integer in host endianness.
+ *
+ *  @return 32-bit integer in little-endian format.
+ */
+
+/** @def sys_le48_to_cpu
+ *  @brief Convert 48-bit integer from little-endian to host endianness.
+ *
+ *  @param val 48-bit integer in little-endian format.
+ *
+ *  @return 48-bit integer in host endianness.
+ */
+
+/** @def sys_cpu_to_le48
+ *  @brief Convert 48-bit integer from host endianness to little-endian.
+ *
+ *  @param val 48-bit integer in host endianness.
+ *
+ *  @return 48-bit integer in little-endian format.
+ */
+
+/** @def sys_be16_to_cpu
+ *  @brief Convert 16-bit integer from big-endian to host endianness.
+ *
+ *  @param val 16-bit integer in big-endian format.
+ *
+ *  @return 16-bit integer in host endianness.
+ */
+
+/** @def sys_cpu_to_be16
+ *  @brief Convert 16-bit integer from host endianness to big-endian.
+ *
+ *  @param val 16-bit integer in host endianness.
+ *
+ *  @return 16-bit integer in big-endian format.
+ */
+
+/** @def sys_be24_to_cpu
+ *  @brief Convert 24-bit integer from big-endian to host endianness.
+ *
+ *  @param val 24-bit integer in big-endian format.
+ *
+ *  @return 24-bit integer in host endianness.
+ */
+
+/** @def sys_cpu_to_be24
+ *  @brief Convert 24-bit integer from host endianness to big-endian.
+ *
+ *  @param val 24-bit integer in host endianness.
+ *
+ *  @return 24-bit integer in big-endian format.
+ */
+
+/** @def sys_be32_to_cpu
+ *  @brief Convert 32-bit integer from big-endian to host endianness.
+ *
+ *  @param val 32-bit integer in big-endian format.
+ *
+ *  @return 32-bit integer in host endianness.
+ */
+
+/** @def sys_cpu_to_be32
+ *  @brief Convert 32-bit integer from host endianness to big-endian.
+ *
+ *  @param val 32-bit integer in host endianness.
+ *
+ *  @return 32-bit integer in big-endian format.
+ */
+
+/** @def sys_be48_to_cpu
+ *  @brief Convert 48-bit integer from big-endian to host endianness.
+ *
+ *  @param val 48-bit integer in big-endian format.
+ *
+ *  @return 48-bit integer in host endianness.
+ */
+
+/** @def sys_cpu_to_be48
+ *  @brief Convert 48-bit integer from host endianness to big-endian.
+ *
+ *  @param val 48-bit integer in host endianness.
+ *
+ *  @return 48-bit integer in big-endian format.
+ */
+
+#ifndef sys_le16_to_cpu
+#define sys_le16_to_cpu(val) (val)
+#endif
+#ifndef sys_cpu_to_le16
+#define sys_cpu_to_le16(val) (val)
+#endif
+#ifndef sys_le24_to_cpu
+#define sys_le24_to_cpu(val) (val)
+#endif
+#ifndef sys_cpu_to_le24
+#define sys_cpu_to_le24(val) (val)
+#endif
+#ifndef sys_le32_to_cpu
+#define sys_le32_to_cpu(val) (val)
+#endif
+#ifndef sys_cpu_to_le32
+#define sys_cpu_to_le32(val) (val)
+#endif
+#ifndef sys_le48_to_cpu
+#define sys_le48_to_cpu(val) (val)
+#endif
+#ifndef sys_cpu_to_le48
+#define sys_cpu_to_le48(val) (val)
+#endif
+#ifndef sys_le64_to_cpu
+#define sys_le64_to_cpu(val) (val)
+#endif
+#ifndef sys_cpu_to_le64
+#define sys_cpu_to_le64(val) (val)
+#endif
+#ifndef sys_be16_to_cpu
+#define sys_be16_to_cpu(val) __bswap_16(val)
+#endif
+#ifndef sys_cpu_to_be16
+#define sys_cpu_to_be16(val) __bswap_16(val)
+#endif
+#ifndef sys_be24_to_cpu
+#define sys_be24_to_cpu(val) __bswap_24(val)
+#endif
+#ifndef sys_cpu_to_be24
+#define sys_cpu_to_be24(val) __bswap_24(val)
+#endif
+#ifndef sys_be32_to_cpu
+#define sys_be32_to_cpu(val) __bswap_32(val)
+#endif
+#ifndef sys_cpu_to_be32
+#define sys_cpu_to_be32(val) __bswap_32(val)
+#endif
+#ifndef sys_be48_to_cpu
+#define sys_be48_to_cpu(val) __bswap_48(val)
+#endif
+#ifndef sys_cpu_to_be48
+#define sys_cpu_to_be48(val) __bswap_48(val)
+#endif
+#ifndef sys_be64_to_cpu
+#define sys_be64_to_cpu(val) __bswap_64(val)
+#endif
+#ifndef sys_cpu_to_be64
+#define sys_cpu_to_be64(val) __bswap_64(val)
+#endif
+
+/**
+ *  @brief Put a 16-bit integer as big-endian to arbitrary location.
+ *
+ *  Put a 16-bit integer, originally in host endianness, to a
+ *  potentially unaligned memory location in big-endian format.
+ *
+ *  @param val 16-bit integer in host endianness.
+ *  @param dst Destination memory address to store the result.
+ */
+static inline void sys_put_be16(uint16_t val, uint8_t dst[2])
+{
+    dst[0] = val >> 8;
+    dst[1] = val;
+}
+
+/**
+ *  @brief Put a 24-bit integer as big-endian to arbitrary location.
+ *
+ *  Put a 24-bit integer, originally in host endianness, to a
+ *  potentially unaligned memory location in big-endian format.
+ *
+ *  @param val 24-bit integer in host endianness.
+ *  @param dst Destination memory address to store the result.
+ */
+static inline void sys_put_be24(uint32_t val, uint8_t dst[3])
+{
+    dst[0] = val >> 16;
+    sys_put_be16(val, &dst[1]);
+}
+
+/**
+ *  @brief Put a 32-bit integer as big-endian to arbitrary location.
+ *
+ *  Put a 32-bit integer, originally in host endianness, to a
+ *  potentially unaligned memory location in big-endian format.
+ *
+ *  @param val 32-bit integer in host endianness.
+ *  @param dst Destination memory address to store the result.
+ */
+static inline void sys_put_be32(uint32_t val, uint8_t dst[4])
+{
+    sys_put_be16(val >> 16, dst);
+    sys_put_be16(val, &dst[2]);
+}
+
+/**
+ *  @brief Put a 48-bit integer as big-endian to arbitrary location.
+ *
+ *  Put a 48-bit integer, originally in host endianness, to a
+ *  potentially unaligned memory location in big-endian format.
+ *
+ *  @param val 48-bit integer in host endianness.
+ *  @param dst Destination memory address to store the result.
+ */
+static inline void sys_put_be48(uint64_t val, uint8_t dst[6])
+{
+    sys_put_be16(val >> 32, dst);
+    sys_put_be32(val, &dst[2]);
+}
+
+/**
+ *  @brief Put a 64-bit integer as big-endian to arbitrary location.
+ *
+ *  Put a 64-bit integer, originally in host endianness, to a
+ *  potentially unaligned memory location in big-endian format.
+ *
+ *  @param val 64-bit integer in host endianness.
+ *  @param dst Destination memory address to store the result.
+ */
+static inline void sys_put_be64(uint64_t val, uint8_t dst[8])
+{
+    sys_put_be32(val >> 32, dst);
+    sys_put_be32(val, &dst[4]);
+}
+
+/**
+ *  @brief Put a 16-bit integer as little-endian to arbitrary location.
+ *
+ *  Put a 16-bit integer, originally in host endianness, to a
+ *  potentially unaligned memory location in little-endian format.
+ *
+ *  @param val 16-bit integer in host endianness.
+ *  @param dst Destination memory address to store the result.
+ */
+static inline void sys_put_le16(uint16_t val, uint8_t dst[2])
+{
+    dst[0] = val;
+    dst[1] = val >> 8;
+}
+
+/**
+ *  @brief Put a 24-bit integer as little-endian to arbitrary location.
+ *
+ *  Put a 24-bit integer, originally in host endianness, to a
+ *  potentially unaligned memory location in littel-endian format.
+ *
+ *  @param val 24-bit integer in host endianness.
+ *  @param dst Destination memory address to store the result.
+ */
+static inline void sys_put_le24(uint32_t val, uint8_t dst[3])
+{
+    sys_put_le16(val, dst);
+    dst[2] = val >> 16;
+}
+
+/**
+ *  @brief Put a 32-bit integer as little-endian to arbitrary location.
+ *
+ *  Put a 32-bit integer, originally in host endianness, to a
+ *  potentially unaligned memory location in little-endian format.
+ *
+ *  @param val 32-bit integer in host endianness.
+ *  @param dst Destination memory address to store the result.
+ */
+static inline void sys_put_le32(uint32_t val, uint8_t dst[4])
+{
+    sys_put_le16(val, dst);
+    sys_put_le16(val >> 16, &dst[2]);
+}
+
+/**
+ *  @brief Put a 48-bit integer as little-endian to arbitrary location.
+ *
+ *  Put a 48-bit integer, originally in host endianness, to a
+ *  potentially unaligned memory location in little-endian format.
+ *
+ *  @param val 48-bit integer in host endianness.
+ *  @param dst Destination memory address to store the result.
+ */
+static inline void sys_put_le48(uint64_t val, uint8_t dst[6])
+{
+    sys_put_le32(val, dst);
+    sys_put_le16(val >> 32, &dst[4]);
+}
+
+/**
+ *  @brief Put a 64-bit integer as little-endian to arbitrary location.
+ *
+ *  Put a 64-bit integer, originally in host endianness, to a
+ *  potentially unaligned memory location in little-endian format.
+ *
+ *  @param val 64-bit integer in host endianness.
+ *  @param dst Destination memory address to store the result.
+ */
+static inline void sys_put_le64(uint64_t val, uint8_t dst[8])
+{
+    sys_put_le32(val, dst);
+    sys_put_le32(val >> 32, &dst[4]);
+}
+
+/**
+ *  @brief Get a 16-bit integer stored in big-endian format.
+ *
+ *  Get a 16-bit integer, stored in big-endian format in a potentially
+ *  unaligned memory location, and convert it to the host endianness.
+ *
+ *  @param src Location of the big-endian 16-bit integer to get.
+ *
+ *  @return 16-bit integer in host endianness.
+ */
+static inline uint16_t sys_get_be16(const uint8_t src[2])
+{
+    return ((uint16_t)src[0] << 8) | src[1];
+}
+
+/**
+ *  @brief Get a 24-bit integer stored in big-endian format.
+ *
+ *  Get a 24-bit integer, stored in big-endian format in a potentially
+ *  unaligned memory location, and convert it to the host endianness.
+ *
+ *  @param src Location of the big-endian 24-bit integer to get.
+ *
+ *  @return 24-bit integer in host endianness.
+ */
+static inline uint32_t sys_get_be24(const uint8_t src[3])
+{
+    return ((uint32_t)src[0] << 16) | sys_get_be16(&src[1]);
+}
+
+/**
+ *  @brief Get a 32-bit integer stored in big-endian format.
+ *
+ *  Get a 32-bit integer, stored in big-endian format in a potentially
+ *  unaligned memory location, and convert it to the host endianness.
+ *
+ *  @param src Location of the big-endian 32-bit integer to get.
+ *
+ *  @return 32-bit integer in host endianness.
+ */
+static inline uint32_t sys_get_be32(const uint8_t src[4])
+{
+    return ((uint32_t)sys_get_be16(&src[0]) << 16) | sys_get_be16(&src[2]);
+}
+
+/**
+ *  @brief Get a 48-bit integer stored in big-endian format.
+ *
+ *  Get a 48-bit integer, stored in big-endian format in a potentially
+ *  unaligned memory location, and convert it to the host endianness.
+ *
+ *  @param src Location of the big-endian 48-bit integer to get.
+ *
+ *  @return 48-bit integer in host endianness.
+ */
+static inline uint64_t sys_get_be48(const uint8_t src[6])
+{
+    return ((uint64_t)sys_get_be32(&src[0]) << 32) | sys_get_be16(&src[4]);
+}
+
+/**
+ *  @brief Get a 64-bit integer stored in big-endian format.
+ *
+ *  Get a 64-bit integer, stored in big-endian format in a potentially
+ *  unaligned memory location, and convert it to the host endianness.
+ *
+ *  @param src Location of the big-endian 64-bit integer to get.
+ *
+ *  @return 64-bit integer in host endianness.
+ */
+static inline uint64_t sys_get_be64(const uint8_t src[8])
+{
+    return ((uint64_t)sys_get_be32(&src[0]) << 32) | sys_get_be32(&src[4]);
+}
+
+/**
+ *  @brief Get a 16-bit integer stored in little-endian format.
+ *
+ *  Get a 16-bit integer, stored in little-endian format in a potentially
+ *  unaligned memory location, and convert it to the host endianness.
+ *
+ *  @param src Location of the little-endian 16-bit integer to get.
+ *
+ *  @return 16-bit integer in host endianness.
+ */
+static inline uint16_t sys_get_le16(const uint8_t src[2])
+{
+    return ((uint16_t)src[1] << 8) | src[0];
+}
+
+/**
+ *  @brief Get a 24-bit integer stored in big-endian format.
+ *
+ *  Get a 24-bit integer, stored in big-endian format in a potentially
+ *  unaligned memory location, and convert it to the host endianness.
+ *
+ *  @param src Location of the big-endian 24-bit integer to get.
+ *
+ *  @return 24-bit integer in host endianness.
+ */
+static inline uint32_t sys_get_le24(const uint8_t src[3])
+{
+    return ((uint32_t)src[2] << 16) | sys_get_le16(&src[0]);
+}
+
+/**
+ *  @brief Get a 32-bit integer stored in little-endian format.
+ *
+ *  Get a 32-bit integer, stored in little-endian format in a potentially
+ *  unaligned memory location, and convert it to the host endianness.
+ *
+ *  @param src Location of the little-endian 32-bit integer to get.
+ *
+ *  @return 32-bit integer in host endianness.
+ */
+static inline uint32_t sys_get_le32(const uint8_t src[4])
+{
+    return ((uint32_t)sys_get_le16(&src[2]) << 16) | sys_get_le16(&src[0]);
+}
+
+/**
+ *  @brief Get a 48-bit integer stored in little-endian format.
+ *
+ *  Get a 48-bit integer, stored in little-endian format in a potentially
+ *  unaligned memory location, and convert it to the host endianness.
+ *
+ *  @param src Location of the little-endian 48-bit integer to get.
+ *
+ *  @return 48-bit integer in host endianness.
+ */
+static inline uint64_t sys_get_le48(const uint8_t src[6])
+{
+    return ((uint64_t)sys_get_le32(&src[2]) << 32) | sys_get_le16(&src[0]);
+}
+
+/**
+ *  @brief Get a 64-bit integer stored in little-endian format.
+ *
+ *  Get a 64-bit integer, stored in little-endian format in a potentially
+ *  unaligned memory location, and convert it to the host endianness.
+ *
+ *  @param src Location of the little-endian 64-bit integer to get.
+ *
+ *  @return 64-bit integer in host endianness.
+ */
+static inline uint64_t sys_get_le64(const uint8_t src[8])
+{
+    return ((uint64_t)sys_get_le32(&src[4]) << 32) | sys_get_le32(&src[0]);
+}
+
+/**
+ * @brief Swap one buffer content into another
+ *
+ * Copy the content of src buffer into dst buffer in reversed order,
+ * i.e.: src[n] will be put in dst[end-n]
+ * Where n is an index and 'end' the last index in both arrays.
+ * The 2 memory pointers must be pointing to different areas, and have
+ * a minimum size of given length.
+ *
+ * @param dst A valid pointer on a memory area where to copy the data in
+ * @param src A valid pointer on a memory area where to copy the data from
+ * @param length Size of both dst and src memory areas
+ */
+static inline void sys_memcpy_swap(void *dst, const void *src, size_t length)
+{
+    uint8_t *pdst = (uint8_t *)dst;
+    const uint8_t *psrc = (const uint8_t *)src;
+
+    __ASSERT(((psrc < pdst && (psrc + length) <= pdst) ||
+            (psrc > pdst && (pdst + length) <= psrc)),
+            "Source and destination buffers must not overlap");
+
+    psrc += length - 1;
+
+    for (; length > 0; length--) {
+        *pdst++ = *psrc--;
+    }
+}
+
+/**
+ * @brief Swap buffer content
+ *
+ * In-place memory swap, where final content will be reversed.
+ * I.e.: buf[n] will be put in buf[end-n]
+ * Where n is an index and 'end' the last index of buf.
+ *
+ * @param buf A valid pointer on a memory area to swap
+ * @param length Size of buf memory area
+ */
+static inline void sys_mem_swap(void *buf, size_t length)
+{
+    size_t i;
+
+    for (i = 0; i < (length / 2); i++) {
+        uint8_t tmp = ((uint8_t *)buf)[i];
+
+        ((uint8_t *)buf)[i] = ((uint8_t *)buf)[length - 1 - i];
+        ((uint8_t *)buf)[length - 1 - i] = tmp;
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_BYTEORDER_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_common.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_common.h
new file mode 100644
index 00000000000..42e28be696e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_common.h
@@ -0,0 +1,74 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/** @file
+ *  @brief Bluetooth Mesh Model Common APIs.
+ */
+
+#ifndef _BLE_MESH_COMMON_H_
+#define _BLE_MESH_COMMON_H_
+
+#include <stddef.h>
+#include <stdlib.h>
+
+#include "esp_attr.h"
+#include "esp_heap_caps.h"
+
+#include "mesh_byteorder.h"
+#include "mesh_ffs.h"
+#include "mesh_trace.h"
+#include "mesh_mutex.h"
+#include "mesh_access.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+IRAM_ATTR void *bt_mesh_malloc(size_t size);
+
+IRAM_ATTR void *bt_mesh_calloc(size_t size);
+
+IRAM_ATTR void bt_mesh_free(void *ptr);
+
+/**
+ * @brief This function allocates memory to store outgoing message.
+ *
+ * @param[in] size: Length of memory allocated to store message value
+ *
+ * @return NULL-fail, pointer of a net_buf_simple structure-success
+ */
+struct net_buf_simple *bt_mesh_alloc_buf(uint16_t size);
+
+/**
+ * @brief This function releases the memory allocated for the outgoing message.
+ *
+ * @param[in] buf: Pointer to the net_buf_simple structure to be freed
+ *
+ * @return none
+ */
+void bt_mesh_free_buf(struct net_buf_simple *buf);
+
+/**
+ * @brief This function gets device role for stack internal use.
+ *
+ * @Note  Currently Provisioner only support client models, Node supports
+ *        client models and server models. Hence if srv_send is set to be
+ *        TRUE, then role NODE will be returned.
+ *
+ * @param[in] model:    Pointer to the model structure
+ * @param[in] srv_send: Indicate if the message is sent by a server model
+ *
+ * @return 0 - Node, 1 - Provisioner
+ */
+uint8_t bt_mesh_get_device_role(struct bt_mesh_model *model, bool srv_send);
+
+int bt_mesh_rand(void *buf, size_t len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_COMMON_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_compiler.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_compiler.h
new file mode 100644
index 00000000000..c73e8dfbc06
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_compiler.h
@@ -0,0 +1,80 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2014,2017 Wind River Systems, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_COMPILER_H_
+#define _BLE_MESH_COMPILER_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ___in_section(a, b, c)
+
+#define __in_section(a, b, c) ___in_section(a, b, c)
+
+#define __in_section_unique(seg) ___in_section(seg, __FILE__, __COUNTER__)
+
+#ifndef __packed
+#define __packed        __attribute__((__packed__))
+#endif
+
+#ifndef __aligned
+#define __aligned(x)    __attribute__((__aligned__(x)))
+#endif
+
+#ifndef __used
+#define __used          __attribute__((__used__))
+#endif
+
+#ifndef ARG_UNUSED
+#define ARG_UNUSED(x)   (void)(x)
+#endif
+
+#ifndef popcount
+#define popcount(x)     __builtin_popcount(x)
+#endif
+
+#ifndef ALWAYS_INLINE
+#define ALWAYS_INLINE inline __attribute__((always_inline))
+#endif
+
+
+/*
+ * This is meant to be used in conjunction with __in_section() and similar
+ * where scattered structure instances are concatened together by the linker
+ * and walked by the code at run time just like a contiguous array of such
+ * structures.
+ *
+ * Assemblers and linkers may insert alignment padding by default whose
+ * size is larger than the natural alignment for those structures when
+ * gathering various section segments together, messing up the array walk.
+ * To prevent this, we need to provide an explicit alignment not to rely
+ * on the default that might just work by luck.
+ *
+ * Alignment statements in  linker scripts are not sufficient as
+ * the assembler may add padding by itself to each segment when switching
+ * between sections within the same file even if it merges many such segments
+ * into a single section in the end.
+ */
+#ifndef Z_DECL_ALIGN
+#define Z_DECL_ALIGN(type) __aligned(__alignof(type)) type
+#endif
+
+/*
+ * Convenience helper combining __in_section() and Z_DECL_ALIGN().
+ * The section name is the struct type prepended with an underscore.
+ * The subsection is "static" and the subsubsection is the variable name.
+ */
+#ifndef Z_STRUCT_SECTION_ITERABLE
+#define Z_STRUCT_SECTION_ITERABLE(struct_type, name) \
+        Z_DECL_ALIGN(struct struct_type) name
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_COMPILER_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_config.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_config.h
new file mode 100644
index 00000000000..d75a4588c31
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_config.h
@@ -0,0 +1,47 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_CONFIG_H_
+#define _BLE_MESH_CONFIG_H_
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CONFIG_BLE_MESH_GENERIC_CLIENT (CONFIG_BLE_MESH_GENERIC_ONOFF_CLI || \
+                                        CONFIG_BLE_MESH_GENERIC_LEVEL_CLI || \
+                                        CONFIG_BLE_MESH_GENERIC_DEF_TRANS_TIME_CLI || \
+                                        CONFIG_BLE_MESH_GENERIC_POWER_ONOFF_CLI || \
+                                        CONFIG_BLE_MESH_GENERIC_POWER_LEVEL_CLI || \
+                                        CONFIG_BLE_MESH_GENERIC_BATTERY_CLI || \
+                                        CONFIG_BLE_MESH_GENERIC_LOCATION_CLI || \
+                                        CONFIG_BLE_MESH_GENERIC_PROPERTY_CLI)
+
+#define CONFIG_BLE_MESH_TIME_SCENE_CLIENT (CONFIG_BLE_MESH_TIME_CLI || \
+                                           CONFIG_BLE_MESH_SCENE_CLI || \
+                                           CONFIG_BLE_MESH_SCHEDULER_CLI)
+
+#define CONFIG_BLE_MESH_LIGHTING_CLIENT (CONFIG_BLE_MESH_LIGHT_LIGHTNESS_CLI || \
+                                         CONFIG_BLE_MESH_LIGHT_CTL_CLI || \
+                                         CONFIG_BLE_MESH_LIGHT_HSL_CLI || \
+                                         CONFIG_BLE_MESH_LIGHT_XYL_CLI || \
+                                         CONFIG_BLE_MESH_LIGHT_LC_CLI)
+
+#define CONFIG_BLE_MESH_SERVER_MODEL (CONFIG_BLE_MESH_GENERIC_SERVER || \
+                                      CONFIG_BLE_MESH_SENSOR_SERVER || \
+                                      CONFIG_BLE_MESH_TIME_SCENE_SERVER || \
+                                      CONFIG_BLE_MESH_LIGHTING_SERVER)
+
+#define CONFIG_BLE_MESH_BLE_COEX_SUPPORT (CONFIG_BLE_MESH_SUPPORT_BLE_ADV || \
+                                          CONFIG_BLE_MESH_SUPPORT_BLE_SCAN)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_CONFIG_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_dlist.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_dlist.h
new file mode 100644
index 00000000000..e21d08b761d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_dlist.h
@@ -0,0 +1,498 @@
+/*
+ * SPDX-FileCopyrightText: 2013-2015 Wind River Systems, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief Doubly-linked list implementation
+ *
+ * Doubly-linked list implementation using inline macros/functions.
+ * This API is not thread safe, and thus if a list is used across threads,
+ * calls to functions must be protected with synchronization primitives.
+ *
+ * The lists are expected to be initialized such that both the head and tail
+ * pointers point to the list itself.  Initializing the lists in such a fashion
+ * simplifies the adding and removing of nodes to/from the list.
+ */
+
+#ifndef _BLE_MESH_DLIST_H_
+#define _BLE_MESH_DLIST_H_
+
+#include <stddef.h>
+#include "mesh_util.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+struct _dnode {
+    union {
+        struct _dnode *head; /* ptr to head of list (sys_dlist_t) */
+        struct _dnode *next; /* ptr to next node    (sys_dnode_t) */
+    };
+    union {
+        struct _dnode *tail; /* ptr to tail of list (sys_dlist_t) */
+        struct _dnode *prev; /* ptr to previous node (sys_dnode_t) */
+    };
+};
+
+typedef struct _dnode sys_dlist_t;
+typedef struct _dnode sys_dnode_t;
+
+/**
+ * @brief Provide the primitive to iterate on a list
+ * Note: the loop is unsafe and thus __dn should not be removed
+ *
+ * User _MUST_ add the loop statement curly braces enclosing its own code:
+ *
+ *     SYS_DLIST_FOR_EACH_NODE(l, n) {
+ *         <user code>
+ *     }
+ *
+ * This and other SYS_DLIST_*() macros are not thread safe.
+ *
+ * @param __dl A pointer on a sys_dlist_t to iterate on
+ * @param __dn A sys_dnode_t pointer to peek each node of the list
+ */
+#define SYS_DLIST_FOR_EACH_NODE(__dl, __dn)             \
+    for (__dn = sys_dlist_peek_head(__dl); __dn;            \
+         __dn = sys_dlist_peek_next(__dl, __dn))
+
+/**
+ * @brief Provide the primitive to iterate on a list, from a node in the list
+ * Note: the loop is unsafe and thus __dn should not be removed
+ *
+ * User _MUST_ add the loop statement curly braces enclosing its own code:
+ *
+ *     SYS_DLIST_ITERATE_FROM_NODE(l, n) {
+ *         <user code>
+ *     }
+ *
+ * Like SYS_DLIST_FOR_EACH_NODE(), but __dn already contains a node in the list
+ * where to start searching for the next entry from. If NULL, it starts from
+ * the head.
+ *
+ * This and other SYS_DLIST_*() macros are not thread safe.
+ *
+ * @param __dl A pointer on a sys_dlist_t to iterate on
+ * @param __dn A sys_dnode_t pointer to peek each node of the list;
+ *             it contains the starting node, or NULL to start from the head
+ */
+#define SYS_DLIST_ITERATE_FROM_NODE(__dl, __dn) \
+    for (__dn = __dn ? sys_dlist_peek_next_no_check(__dl, __dn) \
+             : sys_dlist_peek_head(__dl); \
+         __dn; \
+         __dn = sys_dlist_peek_next(__dl, __dn))
+
+/**
+ * @brief Provide the primitive to safely iterate on a list
+ * Note: __dn can be removed, it will not break the loop.
+ *
+ * User _MUST_ add the loop statement curly braces enclosing its own code:
+ *
+ *     SYS_DLIST_FOR_EACH_NODE_SAFE(l, n, s) {
+ *         <user code>
+ *     }
+ *
+ * This and other SYS_DLIST_*() macros are not thread safe.
+ *
+ * @param __dl A pointer on a sys_dlist_t to iterate on
+ * @param __dn A sys_dnode_t pointer to peek each node of the list
+ * @param __dns A sys_dnode_t pointer for the loop to run safely
+ */
+#define SYS_DLIST_FOR_EACH_NODE_SAFE(__dl, __dn, __dns)         \
+    for (__dn = sys_dlist_peek_head(__dl),              \
+             __dns = sys_dlist_peek_next(__dl, __dn);       \
+         __dn; __dn = __dns,                    \
+             __dns = sys_dlist_peek_next(__dl, __dn))
+
+/*
+ * @brief Provide the primitive to resolve the container of a list node
+ * Note: it is safe to use with NULL pointer nodes
+ *
+ * @param __dn A pointer on a sys_dnode_t to get its container
+ * @param __cn Container struct type pointer
+ * @param __n The field name of sys_dnode_t within the container struct
+ */
+#define SYS_DLIST_CONTAINER(__dn, __cn, __n) \
+    (__dn ? CONTAINER_OF(__dn, __typeof__(*__cn), __n) : NULL)
+/*
+ * @brief Provide the primitive to peek container of the list head
+ *
+ * @param __dl A pointer on a sys_dlist_t to peek
+ * @param __cn Container struct type pointer
+ * @param __n The field name of sys_dnode_t within the container struct
+ */
+#define SYS_DLIST_PEEK_HEAD_CONTAINER(__dl, __cn, __n) \
+    SYS_DLIST_CONTAINER(sys_dlist_peek_head(__dl), __cn, __n)
+
+/*
+ * @brief Provide the primitive to peek the next container
+ *
+ * @param __dl A pointer on a sys_dlist_t to peek
+ * @param __cn Container struct type pointer
+ * @param __n The field name of sys_dnode_t within the container struct
+ */
+#define SYS_DLIST_PEEK_NEXT_CONTAINER(__dl, __cn, __n) \
+    ((__cn) ? SYS_DLIST_CONTAINER(sys_dlist_peek_next(__dl, &(__cn->__n)), \
+                      __cn, __n) : NULL)
+
+/**
+ * @brief Provide the primitive to iterate on a list under a container
+ * Note: the loop is unsafe and thus __cn should not be detached
+ *
+ * User _MUST_ add the loop statement curly braces enclosing its own code:
+ *
+ *     SYS_DLIST_FOR_EACH_CONTAINER(l, c, n) {
+ *         <user code>
+ *     }
+ *
+ * @param __dl A pointer on a sys_dlist_t to iterate on
+ * @param __cn A pointer to peek each entry of the list
+ * @param __n The field name of sys_dnode_t within the container struct
+ */
+#define SYS_DLIST_FOR_EACH_CONTAINER(__dl, __cn, __n)           \
+    for (__cn = SYS_DLIST_PEEK_HEAD_CONTAINER(__dl, __cn, __n); __cn; \
+         __cn = SYS_DLIST_PEEK_NEXT_CONTAINER(__dl, __cn, __n))
+
+/**
+ * @brief Provide the primitive to safely iterate on a list under a container
+ * Note: __cn can be detached, it will not break the loop.
+ *
+ * User _MUST_ add the loop statement curly braces enclosing its own code:
+ *
+ *     SYS_DLIST_FOR_EACH_CONTAINER_SAFE(l, c, cn, n) {
+ *         <user code>
+ *     }
+ *
+ * @param __dl A pointer on a sys_dlist_t to iterate on
+ * @param __cn A pointer to peek each entry of the list
+ * @param __cns A pointer for the loop to run safely
+ * @param __n The field name of sys_dnode_t within the container struct
+ */
+#define SYS_DLIST_FOR_EACH_CONTAINER_SAFE(__dl, __cn, __cns, __n)   \
+    for (__cn = SYS_DLIST_PEEK_HEAD_CONTAINER(__dl, __cn, __n), \
+         __cns = SYS_DLIST_PEEK_NEXT_CONTAINER(__dl, __cn, __n); __cn; \
+         __cn = __cns,                      \
+         __cns = SYS_DLIST_PEEK_NEXT_CONTAINER(__dl, __cn, __n))
+
+/**
+ * @brief initialize list
+ *
+ * @param list the doubly-linked list
+ *
+ * @return N/A
+ */
+
+static inline void sys_dlist_init(sys_dlist_t *list)
+{
+    list->head = (sys_dnode_t *)list;
+    list->tail = (sys_dnode_t *)list;
+}
+
+#define SYS_DLIST_STATIC_INIT(ptr_to_list) {{(ptr_to_list)}, {(ptr_to_list)}}
+
+/**
+ * @brief check if a node is the list's head
+ *
+ * @param list the doubly-linked list to operate on
+ * @param node the node to check
+ *
+ * @return 1 if node is the head, 0 otherwise
+ */
+
+static inline int sys_dlist_is_head(sys_dlist_t *list, sys_dnode_t *node)
+{
+    return list->head == node;
+}
+
+/**
+ * @brief check if a node is the list's tail
+ *
+ * @param list the doubly-linked list to operate on
+ * @param node the node to check
+ *
+ * @return 1 if node is the tail, 0 otherwise
+ */
+
+static inline int sys_dlist_is_tail(sys_dlist_t *list, sys_dnode_t *node)
+{
+    return list->tail == node;
+}
+
+/**
+ * @brief check if the list is empty
+ *
+ * @param list the doubly-linked list to operate on
+ *
+ * @return 1 if empty, 0 otherwise
+ */
+
+static inline int sys_dlist_is_empty(sys_dlist_t *list)
+{
+    return list->head == list;
+}
+
+/**
+ * @brief check if more than one node present
+ *
+ * This and other sys_dlist_*() functions are not thread safe.
+ *
+ * @param list the doubly-linked list to operate on
+ *
+ * @return 1 if multiple nodes, 0 otherwise
+ */
+
+static inline int sys_dlist_has_multiple_nodes(sys_dlist_t *list)
+{
+    return list->head != list->tail;
+}
+
+/**
+ * @brief get a reference to the head item in the list
+ *
+ * @param list the doubly-linked list to operate on
+ *
+ * @return a pointer to the head element, NULL if list is empty
+ */
+
+static inline sys_dnode_t *sys_dlist_peek_head(sys_dlist_t *list)
+{
+    return sys_dlist_is_empty(list) ? NULL : list->head;
+}
+
+/**
+ * @brief get a reference to the head item in the list
+ *
+ * The list must be known to be non-empty.
+ *
+ * @param list the doubly-linked list to operate on
+ *
+ * @return a pointer to the head element
+ */
+
+static inline sys_dnode_t *sys_dlist_peek_head_not_empty(sys_dlist_t *list)
+{
+    return list->head;
+}
+
+/**
+ * @brief get a reference to the next item in the list, node is not NULL
+ *
+ * Faster than sys_dlist_peek_next() if node is known not to be NULL.
+ *
+ * @param list the doubly-linked list to operate on
+ * @param node the node from which to get the next element in the list
+ *
+ * @return a pointer to the next element from a node, NULL if node is the tail
+ */
+
+static inline sys_dnode_t *sys_dlist_peek_next_no_check(sys_dlist_t *list,
+                                                        sys_dnode_t *node)
+{
+    return (node == list->tail) ? NULL : node->next;
+}
+
+/**
+ * @brief get a reference to the next item in the list
+ *
+ * @param list the doubly-linked list to operate on
+ * @param node the node from which to get the next element in the list
+ *
+ * @return a pointer to the next element from a node, NULL if node is the tail
+ * or NULL (when node comes from reading the head of an empty list).
+ */
+
+static inline sys_dnode_t *sys_dlist_peek_next(sys_dlist_t *list,
+                                               sys_dnode_t *node)
+{
+    return node ? sys_dlist_peek_next_no_check(list, node) : NULL;
+}
+
+/**
+ * @brief get a reference to the tail item in the list
+ *
+ * @param list the doubly-linked list to operate on
+ *
+ * @return a pointer to the tail element, NULL if list is empty
+ */
+
+static inline sys_dnode_t *sys_dlist_peek_tail(sys_dlist_t *list)
+{
+    return sys_dlist_is_empty(list) ? NULL : list->tail;
+}
+
+/**
+ * @brief add node to tail of list
+ *
+ * This and other sys_dlist_*() functions are not thread safe.
+ *
+ * @param list the doubly-linked list to operate on
+ * @param node the element to append
+ *
+ * @return N/A
+ */
+
+static inline void sys_dlist_append(sys_dlist_t *list, sys_dnode_t *node)
+{
+    node->next = list;
+    node->prev = list->tail;
+
+    list->tail->next = node;
+    list->tail = node;
+}
+
+/**
+ * @brief add node to head of list
+ *
+ * This and other sys_dlist_*() functions are not thread safe.
+ *
+ * @param list the doubly-linked list to operate on
+ * @param node the element to append
+ *
+ * @return N/A
+ */
+
+static inline void sys_dlist_prepend(sys_dlist_t *list, sys_dnode_t *node)
+{
+    node->next = list->head;
+    node->prev = list;
+
+    list->head->prev = node;
+    list->head = node;
+}
+
+/**
+ * @brief insert node after a node
+ *
+ * Insert a node after a specified node in a list.
+ * This and other sys_dlist_*() functions are not thread safe.
+ *
+ * @param list the doubly-linked list to operate on
+ * @param insert_point the insert point in the list: if NULL, insert at head
+ * @param node the element to append
+ *
+ * @return N/A
+ */
+
+static inline void sys_dlist_insert_after(sys_dlist_t *list,
+                                          sys_dnode_t *insert_point,
+                                          sys_dnode_t *node)
+{
+    if (!insert_point) {
+        sys_dlist_prepend(list, node);
+    } else {
+        node->next = insert_point->next;
+        node->prev = insert_point;
+        insert_point->next->prev = node;
+        insert_point->next = node;
+    }
+}
+
+/**
+ * @brief insert node before a node
+ *
+ * Insert a node before a specified node in a list.
+ * This and other sys_dlist_*() functions are not thread safe.
+ *
+ * @param list the doubly-linked list to operate on
+ * @param insert_point the insert point in the list: if NULL, insert at tail
+ * @param node the element to insert
+ *
+ * @return N/A
+ */
+
+static inline void sys_dlist_insert_before(sys_dlist_t *list,
+                                           sys_dnode_t *insert_point,
+                                           sys_dnode_t *node)
+{
+    if (!insert_point) {
+        sys_dlist_append(list, node);
+    } else {
+        node->prev = insert_point->prev;
+        node->next = insert_point;
+        insert_point->prev->next = node;
+        insert_point->prev = node;
+    }
+}
+
+/**
+ * @brief insert node at position
+ *
+ * Insert a node in a location depending on a external condition. The cond()
+ * function checks if the node is to be inserted _before_ the current node
+ * against which it is checked.
+ * This and other sys_dlist_*() functions are not thread safe.
+ *
+ * @param list the doubly-linked list to operate on
+ * @param node the element to insert
+ * @param cond a function that determines if the current node is the correct
+ *             insert point
+ * @param data parameter to cond()
+ *
+ * @return N/A
+ */
+
+static inline void sys_dlist_insert_at(sys_dlist_t *list, sys_dnode_t *node,
+                                       int (*cond)(sys_dnode_t *, void *), void *data)
+{
+    if (sys_dlist_is_empty(list)) {
+        sys_dlist_append(list, node);
+    } else {
+        sys_dnode_t *pos = sys_dlist_peek_head(list);
+
+        while (pos && !cond(pos, data)) {
+            pos = sys_dlist_peek_next(list, pos);
+        }
+        sys_dlist_insert_before(list, pos, node);
+    }
+}
+
+/**
+ * @brief remove a specific node from a list
+ *
+ * The list is implicit from the node. The node must be part of a list.
+ * This and other sys_dlist_*() functions are not thread safe.
+ *
+ * @param node the node to remove
+ *
+ * @return N/A
+ */
+
+static inline void sys_dlist_remove(sys_dnode_t *node)
+{
+    node->prev->next = node->next;
+    node->next->prev = node->prev;
+}
+
+/**
+ * @brief get the first node in a list
+ *
+ * This and other sys_dlist_*() functions are not thread safe.
+ *
+ * @param list the doubly-linked list to operate on
+ *
+ * @return the first node in the list, NULL if list is empty
+ */
+
+static inline sys_dnode_t *sys_dlist_get(sys_dlist_t *list)
+{
+    sys_dnode_t *node;
+
+    if (sys_dlist_is_empty(list)) {
+        return NULL;
+    }
+
+    node = list->head;
+    sys_dlist_remove(node);
+    return node;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_DLIST_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_ffs.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_ffs.h
new file mode 100644
index 00000000000..1173affbb4d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_ffs.h
@@ -0,0 +1,60 @@
+/*
+ * SPDX-FileCopyrightText: 2015 Wind River Systems, Inc.
+ * SPDX-FileCopyrightText: 2017 Oticon A/S
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_FFS_H_
+#define _BLE_MESH_FFS_H_
+
+#include "mesh_types.h"
+#include "mesh_compiler.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *
+ * @brief find most significant bit set in a 32-bit word
+ *
+ * This routine finds the first bit set starting from the most significant bit
+ * in the argument passed in and returns the index of that bit.  Bits are
+ * numbered starting at 1 from the least significant bit.  A return value of
+ * zero indicates that the value passed is zero.
+ *
+ * @return most significant bit set, 0 if @a op is 0
+ */
+
+static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
+{
+    if (op == 0) {
+        return 0;
+    }
+
+    return 32 - __builtin_clz(op);
+}
+
+/**
+ *
+ * @brief find least significant bit set in a 32-bit word
+ *
+ * This routine finds the first bit set starting from the least significant bit
+ * in the argument passed in and returns the index of that bit.  Bits are
+ * numbered starting at 1 from the least significant bit.  A return value of
+ * zero indicates that the value passed is zero.
+ *
+ * @return least significant bit set, 0 if @a op is 0
+ */
+
+static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
+{
+    return __builtin_ffs(op);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_FFS_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_kernel.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_kernel.h
new file mode 100644
index 00000000000..b11e144e087
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_kernel.h
@@ -0,0 +1,59 @@
+/*
+ * SPDX-FileCopyrightText: 2016 Wind River Systems, Inc.
+ * SPDX-FileContributor: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_KERNEL_H_
+#define _BLE_MESH_KERNEL_H_
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "freertos/semphr.h"
+
+#include "mesh_config.h"
+#include "mesh_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_BT_BLUEDROID_ENABLED
+#ifdef CONFIG_BT_BLUEDROID_PINNED_TO_CORE
+#define BLE_MESH_ADV_TASK_CORE  (CONFIG_BT_BLUEDROID_PINNED_TO_CORE < portNUM_PROCESSORS ? CONFIG_BT_BLUEDROID_PINNED_TO_CORE : tskNO_AFFINITY)
+#else
+#define BLE_MESH_ADV_TASK_CORE  (0)
+#endif
+#endif
+
+#ifdef CONFIG_BT_NIMBLE_ENABLED
+#ifdef CONFIG_BT_NIMBLE_PINNED_TO_CORE
+#define BLE_MESH_ADV_TASK_CORE  (CONFIG_BT_NIMBLE_PINNED_TO_CORE < portNUM_PROCESSORS ? CONFIG_BT_NIMBLE_PINNED_TO_CORE : tskNO_AFFINITY)
+#else
+#define BLE_MESH_ADV_TASK_CORE  (0)
+#endif
+#endif
+
+#define BLE_MESH_ADV_TASK_STACK_SIZE    3072
+#define BLE_MESH_ADV_TASK_NAME          "mesh_adv_task"
+#define BLE_MESH_ADV_TASK_PRIO          (configMAX_PRIORITIES - 5)
+
+/**
+ * @brief Put the current thread to sleep.
+ *
+ * This routine puts the current thread to sleep for @a duration
+ * milliseconds.
+ *
+ * @param duration Number of milliseconds to sleep.
+ *
+ * @return N/A
+ */
+void k_sleep(int32_t duration);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_KERNEL_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_mutex.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_mutex.h
new file mode 100644
index 00000000000..13d405bab09
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_mutex.h
@@ -0,0 +1,49 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_MUTEX_H_
+#define _BLE_MESH_MUTEX_H_
+
+#include "mesh_kernel.h"
+#include "mesh_slist.h"
+#include "mesh_atomic.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    SemaphoreHandle_t mutex;
+#if CONFIG_BLE_MESH_FREERTOS_STATIC_ALLOC
+    StaticQueue_t *buffer;
+#endif
+} bt_mesh_mutex_t;
+
+void bt_mesh_mutex_create(bt_mesh_mutex_t *mutex);
+void bt_mesh_mutex_free(bt_mesh_mutex_t *mutex);
+void bt_mesh_mutex_lock(bt_mesh_mutex_t *mutex);
+void bt_mesh_mutex_unlock(bt_mesh_mutex_t *mutex);
+
+void bt_mesh_alarm_lock(void);
+void bt_mesh_alarm_unlock(void);
+
+void bt_mesh_list_lock(void);
+void bt_mesh_list_unlock(void);
+
+void bt_mesh_buf_lock(void);
+void bt_mesh_buf_unlock(void);
+
+void bt_mesh_atomic_lock(void);
+void bt_mesh_atomic_unlock(void);
+
+void bt_mesh_mutex_init(void);
+void bt_mesh_mutex_deinit(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_MUTEX_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_slist.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_slist.h
new file mode 100644
index 00000000000..aaeb5407cb0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_slist.h
@@ -0,0 +1,467 @@
+/*
+ * SPDX-FileCopyrightText: 2016 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ *
+ * @brief Single-linked list implementation
+ *
+ * Single-linked list implementation using inline macros/functions.
+ * This API is not thread safe, and thus if a list is used across threads,
+ * calls to functions must be protected with synchronization primitives.
+ */
+
+#ifndef _BLE_MESH_SLIST_H_
+#define _BLE_MESH_SLIST_H_
+
+#include <stddef.h>
+#include <stdbool.h>
+#include "mesh_util.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct _snode {
+    struct _snode *next;
+};
+
+typedef struct _snode sys_snode_t;
+
+struct _slist {
+    sys_snode_t *head;
+    sys_snode_t *tail;
+};
+
+typedef struct _slist sys_slist_t;
+
+/**
+ * @brief Provide the primitive to iterate on a list
+ * Note: the loop is unsafe and thus __sn should not be removed
+ *
+ * User _MUST_ add the loop statement curly braces enclosing its own code:
+ *
+ *     SYS_SLIST_FOR_EACH_NODE(l, n) {
+ *         <user code>
+ *     }
+ *
+ * This and other SYS_SLIST_*() macros are not thread safe.
+ *
+ * @param __sl A pointer on a sys_slist_t to iterate on
+ * @param __sn A sys_snode_t pointer to peek each node of the list
+ */
+#define SYS_SLIST_FOR_EACH_NODE(__sl, __sn)         \
+    for (__sn = sys_slist_peek_head(__sl); __sn;    \
+         __sn = sys_slist_peek_next(__sn))
+
+/**
+ * @brief Provide the primitive to iterate on a list, from a node in the list
+ * Note: the loop is unsafe and thus __sn should not be removed
+ *
+ * User _MUST_ add the loop statement curly braces enclosing its own code:
+ *
+ *     SYS_SLIST_ITERATE_FROM_NODE(l, n) {
+ *         <user code>
+ *     }
+ *
+ * Like SYS_SLIST_FOR_EACH_NODE(), but __dn already contains a node in the list
+ * where to start searching for the next entry from. If NULL, it starts from
+ * the head.
+ *
+ * This and other SYS_SLIST_*() macros are not thread safe.
+ *
+ * @param __sl A pointer on a sys_slist_t to iterate on
+ * @param __sn A sys_snode_t pointer to peek each node of the list
+ *             it contains the starting node, or NULL to start from the head
+ */
+#define SYS_SLIST_ITERATE_FROM_NODE(__sl, __sn)             \
+    for (__sn = __sn ? sys_slist_peek_next_no_check(__sn)   \
+             : sys_slist_peek_head(__sl);                   \
+         __sn;                                              \
+         __sn = sys_slist_peek_next(__sn))
+
+/**
+ * @brief Provide the primitive to safely iterate on a list
+ * Note: __sn can be removed, it will not break the loop.
+ *
+ * User _MUST_ add the loop statement curly braces enclosing its own code:
+ *
+ *     SYS_SLIST_FOR_EACH_NODE_SAFE(l, n, s) {
+ *         <user code>
+ *     }
+ *
+ * This and other SYS_SLIST_*() macros are not thread safe.
+ *
+ * @param __sl A pointer on a sys_slist_t to iterate on
+ * @param __sn A sys_snode_t pointer to peek each node of the list
+ * @param __sns A sys_snode_t pointer for the loop to run safely
+ */
+#define SYS_SLIST_FOR_EACH_NODE_SAFE(__sl, __sn, __sns) \
+    for (__sn = sys_slist_peek_head(__sl),              \
+             __sns = sys_slist_peek_next(__sn);         \
+         __sn; __sn = __sns,                            \
+             __sns = sys_slist_peek_next(__sn))
+
+/*
+ * @brief Provide the primitive to resolve the container of a list node
+ * Note: it is safe to use with NULL pointer nodes
+ *
+ * @param __ln A pointer on a sys_node_t to get its container
+ * @param __cn Container struct type pointer
+ * @param __n The field name of sys_node_t within the container struct
+ */
+#define SYS_SLIST_CONTAINER(__ln, __cn, __n)    \
+        ((__ln) ? CONTAINER_OF((__ln), __typeof__(*(__cn)), __n) : NULL)
+/*
+ * @brief Provide the primitive to peek container of the list head
+ *
+ * @param __sl A pointer on a sys_slist_t to peek
+ * @param __cn Container struct type pointer
+ * @param __n The field name of sys_node_t within the container struct
+ */
+#define SYS_SLIST_PEEK_HEAD_CONTAINER(__sl, __cn, __n)  \
+        SYS_SLIST_CONTAINER(sys_slist_peek_head(__sl), __cn, __n)
+
+/*
+ * @brief Provide the primitive to peek container of the list tail
+ *
+ * @param __sl A pointer on a sys_slist_t to peek
+ * @param __cn Container struct type pointer
+ * @param __n The field name of sys_node_t within the container struct
+ */
+#define SYS_SLIST_PEEK_TAIL_CONTAINER(__sl, __cn, __n)  \
+        SYS_SLIST_CONTAINER(sys_slist_peek_tail(__sl), __cn, __n)
+
+/*
+ * @brief Provide the primitive to peek the next container
+ *
+ * @param __cn Container struct type pointer
+ * @param __n The field name of sys_node_t within the container struct
+ */
+
+#define SYS_SLIST_PEEK_NEXT_CONTAINER(__cn, __n)                            \
+        ((__cn) ? SYS_SLIST_CONTAINER(sys_slist_peek_next(&((__cn)->__n)),  \
+                __cn, __n) : NULL)
+
+/**
+ * @brief Provide the primitive to iterate on a list under a container
+ * Note: the loop is unsafe and thus __cn should not be detached
+ *
+ * User _MUST_ add the loop statement curly braces enclosing its own code:
+ *
+ *     SYS_SLIST_FOR_EACH_CONTAINER(l, c, n) {
+ *         <user code>
+ *     }
+ *
+ * @param __sl A pointer on a sys_slist_t to iterate on
+ * @param __cn A pointer to peek each entry of the list
+ * @param __n The field name of sys_node_t within the container struct
+ */
+#define SYS_SLIST_FOR_EACH_CONTAINER(__sl, __cn, __n)                   \
+    for (__cn = SYS_SLIST_PEEK_HEAD_CONTAINER(__sl, __cn, __n); __cn;   \
+         __cn = SYS_SLIST_PEEK_NEXT_CONTAINER(__cn, __n))
+
+/**
+ * @brief Provide the primitive to safely iterate on a list under a container
+ * Note: __cn can be detached, it will not break the loop.
+ *
+ * User _MUST_ add the loop statement curly braces enclosing its own code:
+ *
+ *     SYS_SLIST_FOR_EACH_NODE_SAFE(l, c, cn, n) {
+ *         <user code>
+ *     }
+ *
+ * @param __sl A pointer on a sys_slist_t to iterate on
+ * @param __cn A pointer to peek each entry of the list
+ * @param __cns A pointer for the loop to run safely
+ * @param __n The field name of sys_node_t within the container struct
+ */
+#define SYS_SLIST_FOR_EACH_CONTAINER_SAFE(__sl, __cn, __cns, __n)   \
+    for (__cn = SYS_SLIST_PEEK_HEAD_CONTAINER(__sl, __cn, __n),     \
+         __cns = SYS_SLIST_PEEK_NEXT_CONTAINER(__cn, __n); __cn;    \
+         __cn = __cns, __cns = SYS_SLIST_PEEK_NEXT_CONTAINER(__cn, __n))
+
+/**
+ * @brief Initialize a list
+ *
+ * @param list A pointer on the list to initialize
+ */
+static inline void sys_slist_init(sys_slist_t *list)
+{
+    list->head = NULL;
+    list->tail = NULL;
+}
+
+#define SYS_SLIST_STATIC_INIT(ptr_to_list) {NULL, NULL}
+
+/**
+ * @brief Test if the given list is empty
+ *
+ * @param list A pointer on the list to test
+ *
+ * @return a boolean, true if it's empty, false otherwise
+ */
+static inline bool sys_slist_is_empty(sys_slist_t *list)
+{
+    return (!list->head);
+}
+
+/**
+ * @brief Peek the first node from the list
+ *
+ * @param list A point on the list to peek the first node from
+ *
+ * @return A pointer on the first node of the list (or NULL if none)
+ */
+static inline sys_snode_t *sys_slist_peek_head(sys_slist_t *list)
+{
+    return list->head;
+}
+
+/**
+ * @brief Peek the last node from the list
+ *
+ * @param list A point on the list to peek the last node from
+ *
+ * @return A pointer on the last node of the list (or NULL if none)
+ */
+static inline sys_snode_t *sys_slist_peek_tail(sys_slist_t *list)
+{
+    return list->tail;
+}
+
+/**
+ * @brief Peek the next node from current node, node is not NULL
+ *
+ * Faster then sys_slist_peek_next() if node is known not to be NULL.
+ *
+ * @param node A pointer on the node where to peek the next node
+ *
+ * @return a pointer on the next node (or NULL if none)
+ */
+static inline sys_snode_t *sys_slist_peek_next_no_check(sys_snode_t *node)
+{
+    return node->next;
+}
+
+/**
+ * @brief Peek the next node from current node
+ *
+ * @param node A pointer on the node where to peek the next node
+ *
+ * @return a pointer on the next node (or NULL if none)
+ */
+static inline sys_snode_t *sys_slist_peek_next(sys_snode_t *node)
+{
+    return node ? sys_slist_peek_next_no_check(node) : NULL;
+}
+
+/**
+ * @brief Prepend a node to the given list
+ *
+ * This and other sys_slist_*() functions are not thread safe.
+ *
+ * @param list A pointer on the list to affect
+ * @param node A pointer on the node to prepend
+ */
+static inline void sys_slist_prepend(sys_slist_t *list,
+                                     sys_snode_t *node)
+{
+    node->next = list->head;
+    list->head = node;
+
+    if (!list->tail) {
+        list->tail = list->head;
+    }
+}
+
+/**
+ * @brief Append a node to the given list
+ *
+ * This and other sys_slist_*() functions are not thread safe.
+ *
+ * @param list A pointer on the list to affect
+ * @param node A pointer on the node to append
+ */
+static inline void sys_slist_append(sys_slist_t *list,
+                                    sys_snode_t *node)
+{
+    node->next = NULL;
+
+    if (!list->tail) {
+        list->tail = node;
+        list->head = node;
+    } else {
+        list->tail->next = node;
+        list->tail = node;
+    }
+}
+
+/**
+ * @brief Append a list to the given list
+ *
+ * Append a singly-linked, NULL-terminated list consisting of nodes containing
+ * the pointer to the next node as the first element of a node, to @a list.
+ * This and other sys_slist_*() functions are not thread safe.
+ *
+ * @param list A pointer on the list to affect
+ * @param head A pointer to the first element of the list to append
+ * @param tail A pointer to the last element of the list to append
+ */
+static inline void sys_slist_append_list(sys_slist_t *list,
+                                         void *head, void *tail)
+{
+    if (!list->tail) {
+        list->head = (sys_snode_t *)head;
+        list->tail = (sys_snode_t *)tail;
+    } else {
+        list->tail->next = (sys_snode_t *)head;
+        list->tail = (sys_snode_t *)tail;
+    }
+}
+
+/**
+ * @brief merge two slists, appending the second one to the first
+ *
+ * When the operation is completed, the appending list is empty.
+ * This and other sys_slist_*() functions are not thread safe.
+ *
+ * @param list A pointer on the list to affect
+ * @param list_to_append A pointer to the list to append.
+ */
+static inline void sys_slist_merge_slist(sys_slist_t *list,
+                                         sys_slist_t *list_to_append)
+{
+    sys_slist_append_list(list, list_to_append->head,
+                          list_to_append->tail);
+    sys_slist_init(list_to_append);
+}
+
+/**
+ * @brief Insert a node to the given list
+ *
+ * This and other sys_slist_*() functions are not thread safe.
+ *
+ * @param list A pointer on the list to affect
+ * @param prev A pointer on the previous node
+ * @param node A pointer on the node to insert
+ */
+static inline void sys_slist_insert(sys_slist_t *list,
+                                    sys_snode_t *prev,
+                                    sys_snode_t *node)
+{
+    if (!prev) {
+        sys_slist_prepend(list, node);
+    } else if (!prev->next) {
+        sys_slist_append(list, node);
+    } else {
+        node->next = prev->next;
+        prev->next = node;
+    }
+}
+
+/**
+ * @brief Fetch and remove the first node of the given list
+ *
+ * List must be known to be non-empty.
+ * This and other sys_slist_*() functions are not thread safe.
+ *
+ * @param list A pointer on the list to affect
+ *
+ * @return A pointer to the first node of the list
+ */
+static inline sys_snode_t *sys_slist_get_not_empty(sys_slist_t *list)
+{
+    sys_snode_t *node = list->head;
+
+    list->head = node->next;
+    if (list->tail == node) {
+        list->tail = list->head;
+    }
+
+    return node;
+}
+
+/**
+ * @brief Fetch and remove the first node of the given list
+ *
+ * This and other sys_slist_*() functions are not thread safe.
+ *
+ * @param list A pointer on the list to affect
+ *
+ * @return A pointer to the first node of the list (or NULL if empty)
+ */
+static inline sys_snode_t *sys_slist_get(sys_slist_t *list)
+{
+    return sys_slist_is_empty(list) ? NULL : sys_slist_get_not_empty(list);
+}
+
+/**
+ * @brief Remove a node
+ *
+ * This and other sys_slist_*() functions are not thread safe.
+ *
+ * @param list A pointer on the list to affect
+ * @param prev_node A pointer on the previous node
+ *        (can be NULL, which means the node is the list's head)
+ * @param node A pointer on the node to remove
+ */
+static inline void sys_slist_remove(sys_slist_t *list,
+                                    sys_snode_t *prev_node,
+                                    sys_snode_t *node)
+{
+    if (!prev_node) {
+        list->head = node->next;
+
+        /* Was node also the tail? */
+        if (list->tail == node) {
+            list->tail = list->head;
+        }
+    } else {
+        prev_node->next = node->next;
+
+        /* Was node the tail? */
+        if (list->tail == node) {
+            list->tail = prev_node;
+        }
+    }
+
+    node->next = NULL;
+}
+
+/**
+ * @brief Find and remove a node from a list
+ *
+ * This and other sys_slist_*() functions are not thread safe.
+ *
+ * @param list A pointer on the list to affect
+ * @param node A pointer on the node to remove from the list
+ *
+ * @return true if node was removed
+ */
+static inline bool sys_slist_find_and_remove(sys_slist_t *list,
+                                             sys_snode_t *node)
+{
+    sys_snode_t *prev = NULL;
+    sys_snode_t *test;
+
+    SYS_SLIST_FOR_EACH_NODE(list, test) {
+        if (test == node) {
+            sys_slist_remove(list, prev, node);
+            return true;
+        }
+
+        prev = test;
+    }
+
+    return false;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_SLIST_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_timer.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_timer.h
new file mode 100644
index 00000000000..5399c4e5c73
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_timer.h
@@ -0,0 +1,266 @@
+/*
+ * SPDX-FileCopyrightText: 2016 Wind River Systems, Inc.
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_TIMER_H_
+#define _BLE_MESH_TIMER_H_
+
+#include "mesh_types.h"
+#include "mesh_slist.h"
+#include "mesh_atomic.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* number of nsec per usec */
+#define NSEC_PER_USEC   1000
+
+/* number of microseconds per millisecond */
+#define USEC_PER_MSEC   1000
+
+/* number of milliseconds per second */
+#define MSEC_PER_SEC    1000
+
+/* number of microseconds per second */
+#define USEC_PER_SEC    ((USEC_PER_MSEC) * (MSEC_PER_SEC))
+
+/* number of nanoseconds per second */
+#define NSEC_PER_SEC    ((NSEC_PER_USEC) * (USEC_PER_MSEC) * (MSEC_PER_SEC))
+
+/* timeout is not in use */
+#define _INACTIVE       (-1)
+
+struct k_work;
+
+/**
+ * @typedef k_work_handler_t
+ * @brief Work item handler function type.
+ *
+ * A work item's handler function is executed by a workqueue's thread
+ * when the work item is processed by the workqueue.
+ *
+ * @param work Address of the work item.
+ *
+ * @return N/A
+ */
+typedef void (*k_work_handler_t)(struct k_work *work);
+
+struct k_work {
+    void *_reserved;
+    k_work_handler_t handler;
+    int index;
+};
+
+#define _K_WORK_INITIALIZER(work_handler)   \
+{                                           \
+    ._reserved = NULL,                      \
+    .handler = work_handler,                \
+}
+
+/**
+ * @brief Generate null timeout delay.
+ *
+ * This macro generates a timeout delay that that instructs a kernel API
+ * not to wait if the requested operation cannot be performed immediately.
+ *
+ * @return Timeout delay value.
+ */
+#define K_NO_WAIT       0
+
+/**
+ * @brief Generate timeout delay from milliseconds.
+ *
+ * This macro generates a timeout delay that that instructs a kernel API
+ * to wait up to @a ms milliseconds to perform the requested operation.
+ *
+ * @param ms Duration in milliseconds.
+ *
+ * @return Timeout delay value.
+ */
+#define K_MSEC(ms)      (ms)
+
+/**
+ * @brief Generate timeout delay from seconds.
+ *
+ * This macro generates a timeout delay that that instructs a kernel API
+ * to wait up to @a s seconds to perform the requested operation.
+ *
+ * @param s Duration in seconds.
+ *
+ * @return Timeout delay value.
+ */
+#define K_SECONDS(s)    K_MSEC((s) * MSEC_PER_SEC)
+
+/**
+ * @brief Generate timeout delay from minutes.
+ *
+ * This macro generates a timeout delay that that instructs a kernel API
+ * to wait up to @a m minutes to perform the requested operation.
+ *
+ * @param m Duration in minutes.
+ *
+ * @return Timeout delay value.
+ */
+#define K_MINUTES(m)    K_SECONDS((m) * 60)
+
+/**
+ * @brief Generate timeout delay from hours.
+ *
+ * This macro generates a timeout delay that that instructs a kernel API
+ * to wait up to @a h hours to perform the requested operation.
+ *
+ * @param h Duration in hours.
+ *
+ * @return Timeout delay value.
+ */
+#define K_HOURS(h)      K_MINUTES((h) * 60)
+
+/**
+ * @brief Generate infinite timeout delay.
+ *
+ * This macro generates a timeout delay that that instructs a kernel API
+ * to wait as long as necessary to perform the requested operation.
+ *
+ * @return Timeout delay value.
+ */
+#define K_FOREVER       (-1)
+
+/**
+ * @brief Get system uptime (32-bit version).
+ *
+ * This routine returns the lower 32-bits of the elapsed time since the system
+ * booted, in milliseconds.
+ *
+ * This routine can be more efficient than k_uptime_get(), as it reduces the
+ * need for interrupt locking and 64-bit math. However, the 32-bit result
+ * cannot hold a system uptime time larger than approximately 50 days, so the
+ * caller must handle possible rollovers.
+ *
+ * @return Current uptime.
+ */
+uint32_t k_uptime_get_32(void);
+
+struct k_delayed_work {
+    struct k_work work;
+};
+
+/**
+ * @brief Submit a delayed work item to the system workqueue.
+ *
+ * This routine schedules work item @a work to be processed by the system
+ * workqueue after a delay of @a delay milliseconds. The routine initiates
+ * an asynchronous countdown for the work item and then returns to the caller.
+ * Only when the countdown completes is the work item actually submitted to
+ * the workqueue and becomes pending.
+ *
+ * Submitting a previously submitted delayed work item that is still
+ * counting down cancels the existing submission and restarts the countdown
+ * using the new delay. If the work item is currently pending on the
+ * workqueue's queue because the countdown has completed it is too late to
+ * resubmit the item, and resubmission fails without impacting the work item.
+ * If the work item has already been processed, or is currently being processed,
+ * its work is considered complete and the work item can be resubmitted.
+ *
+ * @warning
+ * Work items submitted to the system workqueue should avoid using handlers
+ * that block or yield since this may prevent the system workqueue from
+ * processing other work items in a timely manner.
+ *
+ * @note Can be called by ISRs.
+ *
+ * @param work Address of delayed work item.
+ * @param delay Delay before submitting the work item (in milliseconds).
+ *
+ * @retval 0 Work item countdown started.
+ * @retval -EINPROGRESS Work item is already pending.
+ * @retval -EINVAL Work item is being processed or has completed its work.
+ * @retval -EADDRINUSE Work item is pending on a different workqueue.
+ */
+int k_delayed_work_submit(struct k_delayed_work *work, int32_t delay);
+
+int k_delayed_work_submit_periodic(struct k_delayed_work *work, int32_t period);
+
+/**
+ * @brief Get time remaining before a delayed work gets scheduled.
+ *
+ * This routine computes the (approximate) time remaining before a
+ * delayed work gets executed. If the delayed work is not waiting to be
+ * scheduled, it returns zero.
+ *
+ * @param work     Delayed work item.
+ *
+ * @return Remaining time (in milliseconds).
+ */
+int32_t k_delayed_work_remaining_get(struct k_delayed_work *work);
+
+/**
+ * @brief Submit a work item to the system workqueue.
+ *
+ * This routine submits work item @a work to be processed by the system
+ * workqueue. If the work item is already pending in the workqueue's queue
+ * as a result of an earlier submission, this routine has no effect on the
+ * work item. If the work item has already been processed, or is currently
+ * being processed, its work is considered complete and the work item can be
+ * resubmitted.
+ *
+ * @warning
+ * Work items submitted to the system workqueue should avoid using handlers
+ * that block or yield since this may prevent the system workqueue from
+ * processing other work items in a timely manner.
+ *
+ * @note Can be called by ISRs.
+ *
+ * @param work Address of work item.
+ *
+ * @return N/A
+ */
+static inline void k_work_submit(struct k_work *work)
+{
+    if (work && work->handler) {
+        work->handler(work);
+    }
+}
+
+/**
+ * @brief Initialize a work item.
+ *
+ * This routine initializes a workqueue work item, prior to its first use.
+ *
+ * @param work Address of work item.
+ * @param handler Function to invoke each time work item is processed.
+ *
+ * @return N/A
+ */
+static inline void k_work_init(struct k_work *work, k_work_handler_t handler)
+{
+    work->handler = handler;
+}
+
+int k_delayed_work_cancel(struct k_delayed_work *work);
+
+int k_delayed_work_free(struct k_delayed_work *work);
+
+int k_delayed_work_init(struct k_delayed_work *work, k_work_handler_t handler);
+
+/**
+ * @brief Get system uptime.
+ *
+ * This routine returns the elapsed time since the system booted,
+ * in milliseconds.
+ *
+ * @return Current uptime.
+ */
+int64_t k_uptime_get(void);
+
+void bt_mesh_timer_init(void);
+void bt_mesh_timer_deinit(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_TIMER_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_trace.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_trace.h
new file mode 100644
index 00000000000..72ad111ac3e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_trace.h
@@ -0,0 +1,127 @@
+/*
+ * SPDX-FileCopyrightText: 2017 Nordic Semiconductor ASA
+ * SPDX-FileCopyrightText: 2015-2016 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_TRACE_H_
+#define _BLE_MESH_TRACE_H_
+
+#include <assert.h>
+#include "esp_log.h"
+#include "mesh_util.h"
+#include "esp_rom_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Define common tracing for all */
+#ifndef BLE_MESH_LOG_LEVEL_ERROR
+#define BLE_MESH_LOG_LEVEL_ERROR            1
+#endif /* BLE_MESH_LOG_LEVEL_ERROR */
+
+#ifndef BLE_MESH_LOG_LEVEL_WARN
+#define BLE_MESH_LOG_LEVEL_WARN             2
+#endif /* BLE_MESH_LOG_LEVEL_WARN */
+
+#ifndef BLE_MESH_LOG_LEVEL_INFO
+#define BLE_MESH_LOG_LEVEL_INFO             3
+#endif /* BLE_MESH_LOG_LEVEL_INFO */
+
+#ifndef BLE_MESH_LOG_LEVEL_DEBUG
+#define BLE_MESH_LOG_LEVEL_DEBUG            4
+#endif /* BLE_MESH_LOG_LEVEL_DEBUG */
+
+#ifndef BLE_MESH_LOG_LEVEL_VERBOSE
+#define BLE_MESH_LOG_LEVEL_VERBOSE          5
+#endif /*BLE_MESH_LOG_LEVEL_VERBOSE */
+
+#ifdef CONFIG_BLE_MESH_STACK_TRACE_LEVEL
+#define BLE_MESH_LOG_LEVEL                  CONFIG_BLE_MESH_STACK_TRACE_LEVEL
+#else
+#define BLE_MESH_LOG_LEVEL                  BLE_MESH_LOG_LEVEL_WARN
+#endif
+
+#ifdef CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL
+#define BLE_MESH_NET_BUF_LOG_LEVEL          CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL
+#else
+#define BLE_MESH_NET_BUF_LOG_LEVEL          BLE_MESH_LOG_LEVEL_WARN
+#endif
+
+#define BLE_MESH_TRACE_TAG                  "BLE_MESH"
+
+#if (LOG_LOCAL_LEVEL >= 4)
+#define BLE_MESH_LOG_LOCAL_LEVEL_MAPPING    (LOG_LOCAL_LEVEL + 1)
+#else
+#define BLE_MESH_LOG_LOCAL_LEVEL_MAPPING    LOG_LOCAL_LEVEL
+#endif
+
+#define BLE_MESH_LOG_LEVEL_CHECK(LAYER, LEVEL)  (MAX(LAYER##_LOG_LEVEL, BLE_MESH_LOG_LOCAL_LEVEL_MAPPING) >= BLE_MESH_LOG_LEVEL_##LEVEL)
+
+#define BLE_MESH_PRINT_E(tag, format, ...)  {esp_log_write(ESP_LOG_ERROR,   tag, LOG_FORMAT(E, format), esp_log_timestamp(), tag, ##__VA_ARGS__); }
+#define BLE_MESH_PRINT_W(tag, format, ...)  {esp_log_write(ESP_LOG_WARN,    tag, LOG_FORMAT(W, format), esp_log_timestamp(), tag, ##__VA_ARGS__); }
+#define BLE_MESH_PRINT_I(tag, format, ...)  {esp_log_write(ESP_LOG_INFO,    tag, LOG_FORMAT(I, format), esp_log_timestamp(), tag, ##__VA_ARGS__); }
+#define BLE_MESH_PRINT_D(tag, format, ...)  {esp_log_write(ESP_LOG_DEBUG,   tag, LOG_FORMAT(D, format), esp_log_timestamp(), tag, ##__VA_ARGS__); }
+#define BLE_MESH_PRINT_V(tag, format, ...)  {esp_log_write(ESP_LOG_VERBOSE, tag, LOG_FORMAT(V, format), esp_log_timestamp(), tag, ##__VA_ARGS__); }
+
+#define printk          esp_rom_printf
+
+#define _STRINGIFY(x)   #x
+#define STRINGIFY(s)    _STRINGIFY(s)
+
+#ifndef __ASSERT
+#define __ASSERT(test, str) assert(test)
+#endif
+
+#ifndef __ASSERT_NO_MSG
+#define __ASSERT_NO_MSG(x) assert(x)
+#endif
+
+#if !CONFIG_BLE_MESH_NO_LOG
+#define BT_ERR(fmt, args...)    do {if ((BLE_MESH_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_ERROR) && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH, ERROR)) BLE_MESH_PRINT_E(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#define BT_WARN(fmt, args...)   do {if ((BLE_MESH_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_WARN)  && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH, WARN))  BLE_MESH_PRINT_W(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#define BT_INFO(fmt, args...)   do {if ((BLE_MESH_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_INFO)  && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH, INFO))  BLE_MESH_PRINT_I(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#define BT_DBG(fmt, args...)    do {if ((BLE_MESH_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_DEBUG) && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH, DEBUG)) BLE_MESH_PRINT_D(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#else
+#define BT_ERR(fmt, args...)
+#define BT_WARN(fmt, args...)
+#define BT_INFO(fmt, args...)
+#define BT_DBG(fmt, args...)
+#endif
+
+#if defined(CONFIG_BLE_MESH_NET_BUF_LOG) && (!CONFIG_BLE_MESH_NO_LOG)
+#define NET_BUF_ERR(fmt, args...)   do {if ((BLE_MESH_NET_BUF_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_ERROR) && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH_NET_BUF, ERROR)) BLE_MESH_PRINT_E(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#define NET_BUF_WARN(fmt, args...)  do {if ((BLE_MESH_NET_BUF_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_WARN)  && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH_NET_BUF, WARN))  BLE_MESH_PRINT_W(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#define NET_BUF_INFO(fmt, args...)  do {if ((BLE_MESH_NET_BUF_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_INFO)  && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH_NET_BUF, INFO))  BLE_MESH_PRINT_I(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#define NET_BUF_DBG(fmt, args...)   do {if ((BLE_MESH_NET_BUF_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_DEBUG) && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH_NET_BUF, DEBUG)) BLE_MESH_PRINT_D(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#define NET_BUF_ASSERT(cond)        __ASSERT_NO_MSG(cond)
+#else
+#define NET_BUF_ERR(fmt, args...)
+#define NET_BUF_WARN(fmt, args...)
+#define NET_BUF_INFO(fmt, args...)
+#define NET_BUF_DBG(fmt, args...)
+#define NET_BUF_ASSERT(cond)
+#endif
+
+#if defined(CONFIG_BLE_MESH_NET_BUF_SIMPLE_LOG) && (!CONFIG_BLE_MESH_NO_LOG)
+#define NET_BUF_SIMPLE_ERR(fmt, args...)    do {if ((BLE_MESH_NET_BUF_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_ERROR) && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH_NET_BUF, ERROR)) BLE_MESH_PRINT_E(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#define NET_BUF_SIMPLE_WARN(fmt, args...)   do {if ((BLE_MESH_NET_BUF_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_WARN)  && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH_NET_BUF, WARN))  BLE_MESH_PRINT_W(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#define NET_BUF_SIMPLE_INFO(fmt, args...)   do {if ((BLE_MESH_NET_BUF_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_INFO)  && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH_NET_BUF, INFO))  BLE_MESH_PRINT_I(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#define NET_BUF_SIMPLE_DBG(fmt, args...)    do {if ((BLE_MESH_NET_BUF_LOG_LEVEL >= BLE_MESH_LOG_LEVEL_DEBUG) && BLE_MESH_LOG_LEVEL_CHECK(BLE_MESH_NET_BUF, DEBUG)) BLE_MESH_PRINT_D(BLE_MESH_TRACE_TAG, fmt, ## args);} while(0)
+#define NET_BUF_SIMPLE_ASSERT(cond)         __ASSERT_NO_MSG(cond)
+#else
+#define NET_BUF_SIMPLE_ERR(fmt, args...)
+#define NET_BUF_SIMPLE_WARN(fmt, args...)
+#define NET_BUF_SIMPLE_INFO(fmt, args...)
+#define NET_BUF_SIMPLE_DBG(fmt, args...)
+#define NET_BUF_SIMPLE_ASSERT(cond)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_TRACE_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_types.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_types.h
new file mode 100644
index 00000000000..eba8c1a2063
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_types.h
@@ -0,0 +1,33 @@
+/*
+ * SPDX-FileCopyrightText: 2017 Linaro Limited
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_TYPES_H_
+#define _BLE_MESH_TYPES_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <inttypes.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef int         bt_mesh_atomic_t;
+
+#ifndef PRIu64
+#define PRIu64      "llu"
+#endif
+
+#ifndef PRIx64
+#define PRIx64      "llx"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_TYPES_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_util.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_util.h
new file mode 100644
index 00000000000..c12c8d70a65
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/include/mesh_util.h
@@ -0,0 +1,191 @@
+/*
+ * SPDX-FileCopyrightText: 2011-2014 Wind River Systems, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief Misc utilities
+ *
+ * Misc utilities usable by the kernel and application code.
+ */
+
+#ifndef _BLE_MESH_UTIL_H_
+#define _BLE_MESH_UTIL_H_
+
+#include <stddef.h>
+#include "esp_bit_defs.h"
+#include "mesh_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Helper to pass a int as a pointer or vice-versa.
+ * Those are available for 32 bits architectures:
+ */
+#ifndef POINTER_TO_UINT
+#define POINTER_TO_UINT(x) ((uint32_t)  (x))
+#endif
+#ifndef UINT_TO_POINTER
+#define UINT_TO_POINTER(x) ((void *) (x))
+#endif
+#ifndef POINTER_TO_INT
+#define POINTER_TO_INT(x)  ((int32_t)  (x))
+#endif
+#ifndef INT_TO_POINTER
+#define INT_TO_POINTER(x)  ((void *) (x))
+#endif
+
+/* Evaluates to 0 if cond is true-ish; compile error otherwise */
+#ifndef ZERO_OR_COMPILE_ERROR
+#define ZERO_OR_COMPILE_ERROR(cond) ((int) sizeof(char[1 - 2 * !(cond)]) - 1)
+#endif
+
+/* Evaluates to 0 if array is an array; compile error if not array (e.g.
+ * pointer)
+ */
+#ifndef IS_ARRAY
+#define IS_ARRAY(array) \
+        ZERO_OR_COMPILE_ERROR( \
+        !__builtin_types_compatible_p(__typeof__(array), \
+            __typeof__(&(array)[0])))
+#endif
+
+/* Evaluates to number of elements in an array; compile error if not
+ * an array (e.g. pointer)
+ */
+#ifndef ARRAY_SIZE
+#define ARRAY_SIZE(array) (sizeof(array) / sizeof((array)[0]))
+#endif
+
+/* Evaluates to 1 if ptr is part of array, 0 otherwise; compile error if
+ * "array" argument is not an array (e.g. "ptr" and "array" mixed up)
+ */
+#ifndef PART_OF_ARRAY
+#define PART_OF_ARRAY(array, ptr) \
+        ((ptr) && ((ptr) >= &array[0] && (ptr) < &array[ARRAY_SIZE(array)]))
+#endif
+
+#ifndef CONTAINER_OF
+#define CONTAINER_OF(ptr, type, field) \
+        ((type *)(((char *)(ptr)) - offsetof(type, field)))
+#endif
+
+/* round "x" up/down to next multiple of "align" (which must be a power of 2) */
+#ifndef ROUND_UP
+#define ROUND_UP(x, align) \
+        (((unsigned long)(x) + ((unsigned long)align - 1)) & \
+        ~((unsigned long)align - 1))
+#endif
+
+#ifndef ROUND_DOWN
+#define ROUND_DOWN(x, align) ((unsigned long)(x) & ~((unsigned long)align - 1))
+#endif
+
+/* round up/down to the next word boundary */
+#ifndef WB_UP
+#define WB_UP(x) ROUND_UP(x, sizeof(void *))
+#endif
+
+#ifndef WB_DN
+#define WB_DN(x) ROUND_DOWN(x, sizeof(void *))
+#endif
+
+#ifndef ceiling_fraction
+#define ceiling_fraction(numerator, divider) \
+        (((numerator) + ((divider) - 1)) / (divider))
+#endif
+
+#ifndef CHECKIF
+#define CHECKIF(expr)   if (expr)
+#endif
+
+/** @brief Return larger value of two provided expressions.
+ *
+ * @note Arguments are evaluated twice. See Z_MAX for GCC only, single
+ * evaluation version.
+ */
+#ifndef MAX
+#define MAX(a, b) (((a) > (b)) ? (a) : (b))
+#endif
+
+/** @brief Return smaller value of two provided expressions.
+ *
+ * @note Arguments are evaluated twice. See Z_MIN for GCC only, single
+ * evaluation version.
+ */
+#ifndef MIN
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+#ifndef BIT
+#define BIT(n)      (1UL << (n))
+#endif
+
+#ifndef BIT_MASK
+#define BIT_MASK(n) (BIT(n) - 1)
+#endif
+
+/**
+ * @brief Check for macro definition in compiler-visible expressions
+ *
+ * This trick was pioneered in Linux as the config_enabled() macro.
+ * The madness has the effect of taking a macro value that may be
+ * defined to "1" (e.g. CONFIG_MYFEATURE), or may not be defined at
+ * all and turning it into a literal expression that can be used at
+ * "runtime".  That is, it works similarly to
+ * "defined(CONFIG_MYFEATURE)" does except that it is an expansion
+ * that can exist in a standard expression and be seen by the compiler
+ * and optimizer.  Thus much ifdef usage can be replaced with cleaner
+ * expressions like:
+ *
+ *     if (IS_ENABLED(CONFIG_MYFEATURE))
+ *             myfeature_enable();
+ *
+ * INTERNAL
+ * First pass just to expand any existing macros, we need the macro
+ * value to be e.g. a literal "1" at expansion time in the next macro,
+ * not "(1)", etc...  Standard recursive expansion does not work.
+ */
+#define IS_ENABLED(config_macro) Z_IS_ENABLED1(config_macro)
+
+/* Now stick on a "_XXXX" prefix, it will now be "_XXXX1" if config_macro
+ * is "1", or just "_XXXX" if it's undefined.
+ *   ENABLED:   Z_IS_ENABLED2(_XXXX1)
+ *   DISABLED   Z_IS_ENABLED2(_XXXX)
+ */
+#define Z_IS_ENABLED1(config_macro) Z_IS_ENABLED2(_XXXX##config_macro)
+
+/* Here's the core trick, we map "_XXXX1" to "_YYYY," (i.e. a string
+ * with a trailing comma), so it has the effect of making this a
+ * two-argument tuple to the preprocessor only in the case where the
+ * value is defined to "1"
+ *   ENABLED:    _YYYY,    <--- note comma!
+ *   DISABLED:   _XXXX
+ */
+#define _XXXX1 _YYYY,
+
+/* Then we append an extra argument to fool the gcc preprocessor into
+ * accepting it as a varargs macro.
+ *                         arg1   arg2  arg3
+ *   ENABLED:   Z_IS_ENABLED3(_YYYY,    1,    0)
+ *   DISABLED   Z_IS_ENABLED3(_XXXX 1,  0)
+ */
+#define Z_IS_ENABLED2(one_or_two_args) Z_IS_ENABLED3(one_or_two_args true, false)
+
+/* And our second argument is thus now cooked to be 1 in the case
+ * where the value is defined to 1, and 0 if not:
+ */
+#define Z_IS_ENABLED3(ignore_this, val, ...) val
+
+const char *bt_hex(const void *buf, size_t len);
+
+void mem_rcopy(uint8_t *dst, uint8_t const *src, uint16_t len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_UTIL_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/aes.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/aes.h
new file mode 100644
index 00000000000..aa636c7d4f9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/aes.h
@@ -0,0 +1,130 @@
+/* aes.h - TinyCrypt interface to an AES-128 implementation */
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief -- Interface to an AES-128 implementation.
+ *
+ *  Overview:   AES-128 is a NIST approved block cipher specified in
+ *              FIPS 197. Block ciphers are deterministic algorithms that
+ *              perform a transformation specified by a symmetric key in fixed-
+ *              length data sets, also called blocks.
+ *
+ *  Security:   AES-128 provides approximately 128 bits of security.
+ *
+ *  Usage:      1) call tc_aes128_set_encrypt/decrypt_key to set the key.
+ *
+ *              2) call tc_aes_encrypt/decrypt to process the data.
+ */
+
+#ifndef __BLE_MESH_TC_AES_H__
+#define __BLE_MESH_TC_AES_H__
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define Nb (4)  /* number of columns (32-bit words) comprising the state */
+#define Nk (4)  /* number of 32-bit words comprising the key */
+#define Nr (10) /* number of rounds */
+#define TC_AES_BLOCK_SIZE (Nb*Nk)
+#define TC_AES_KEY_SIZE (Nb*Nk)
+
+typedef struct tc_aes_key_sched_struct {
+    unsigned int words[Nb * (Nr + 1)];
+} *TCAesKeySched_t;
+
+/**
+ *  @brief Set AES-128 encryption key
+ *  Uses key k to initialize s
+ *  @return  returns TC_CRYPTO_SUCCESS (1)
+ *           returns TC_CRYPTO_FAIL (0) if: s == NULL or k == NULL
+ *  @note       This implementation skips the additional steps required for keys
+ *              larger than 128 bits, and must not be used for AES-192 or
+ *              AES-256 key schedule -- see FIPS 197 for details
+ *  @param      s IN/OUT -- initialized struct tc_aes_key_sched_struct
+ *  @param      k IN -- points to the AES key
+ */
+int tc_aes128_set_encrypt_key(TCAesKeySched_t s, const uint8_t *k);
+
+/**
+ *  @brief AES-128 Encryption procedure
+ *  Encrypts contents of in buffer into out buffer under key;
+ *              schedule s
+ *  @note Assumes s was initialized by aes_set_encrypt_key;
+ *              out and in point to 16 byte buffers
+ *  @return  returns TC_CRYPTO_SUCCESS (1)
+ *           returns TC_CRYPTO_FAIL (0) if: out == NULL or in == NULL or s == NULL
+ *  @param out IN/OUT -- buffer to receive ciphertext block
+ *  @param in IN -- a plaintext block to encrypt
+ *  @param s IN -- initialized AES key schedule
+ */
+int tc_aes_encrypt(uint8_t *out, const uint8_t *in,
+                   const TCAesKeySched_t s);
+
+/**
+ *  @brief Set the AES-128 decryption key
+ *  Uses key k to initialize s
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if: s == NULL or k == NULL
+ *  @note       This is the implementation of the straightforward inverse cipher
+ *              using the cipher documented in FIPS-197 figure 12, not the
+ *              equivalent inverse cipher presented in Figure 15
+ *  @warning    This routine skips the additional steps required for keys larger
+ *              than 128, and must not be used for AES-192 or AES-256 key
+ *              schedule -- see FIPS 197 for details
+ *  @param s  IN/OUT -- initialized struct tc_aes_key_sched_struct
+ *  @param k  IN -- points to the AES key
+ */
+int tc_aes128_set_decrypt_key(TCAesKeySched_t s, const uint8_t *k);
+
+/**
+ *  @brief AES-128 Encryption procedure
+ *  Decrypts in buffer into out buffer under key schedule s
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if: out is NULL or in is NULL or s is NULL
+ *  @note   Assumes s was initialized by aes_set_encrypt_key
+ *          out and in point to 16 byte buffers
+ *  @param out IN/OUT -- buffer to receive ciphertext block
+ *  @param in IN -- a plaintext block to encrypt
+ *  @param s IN -- initialized AES key schedule
+ */
+int tc_aes_decrypt(uint8_t *out, const uint8_t *in,
+                   const TCAesKeySched_t s);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_AES_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/cbc_mode.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/cbc_mode.h
new file mode 100644
index 00000000000..4be3d95e56f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/cbc_mode.h
@@ -0,0 +1,151 @@
+/* cbc_mode.h - TinyCrypt interface to a CBC mode implementation */
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief Interface to a CBC mode implementation.
+ *
+ *  Overview: CBC (for "cipher block chaining") mode is a NIST approved mode of
+ *            operation defined in SP 800-38a. It can be used with any block
+ *            cipher to provide confidentiality of strings whose lengths are
+ *            multiples of the block_size of the underlying block cipher.
+ *            TinyCrypt hard codes AES as the block cipher.
+ *
+ *  Security: CBC mode provides data confidentiality given that the maximum
+ *            number q of blocks encrypted under a single key satisfies
+ *            q < 2^63, which is not a practical constraint (it is considered a
+ *            good practice to replace the encryption when q == 2^56). CBC mode
+ *            provides NO data integrity.
+ *
+ *            CBC mode assumes that the IV value input into the
+ *            tc_cbc_mode_encrypt is randomly generated. The TinyCrypt library
+ *            provides HMAC-PRNG module, which generates suitable IVs. Other
+ *            methods for generating IVs are acceptable, provided that the
+ *            values of the IVs generated appear random to any adversary,
+ *            including someone with complete knowledge of the system design.
+ *
+ *            The randomness property on which CBC mode's security depends is
+ *            the unpredictability of the IV. Since it is unpredictable, this
+ *            means in practice that CBC mode requires that the IV is stored
+ *            somehow with the ciphertext in order to recover the plaintext.
+ *
+ *            TinyCrypt CBC encryption prepends the IV to the ciphertext,
+ *            because this affords a more efficient (few buffers) decryption.
+ *            Hence tc_cbc_mode_encrypt assumes the ciphertext buffer is always
+ *            16 bytes larger than the plaintext buffer.
+ *
+ *  Requires: AES-128
+ *
+ *  Usage:    1) call tc_cbc_mode_encrypt to encrypt data.
+ *
+ *            2) call tc_cbc_mode_decrypt to decrypt data.
+ *
+ */
+
+#ifndef __BLE_MESH_TC_CBC_MODE_H__
+#define __BLE_MESH_TC_CBC_MODE_H__
+
+#include <tinycrypt/aes.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *  @brief CBC encryption procedure
+ *  CBC encrypts inlen bytes of the in buffer into the out buffer
+ *  using the encryption key schedule provided, prepends iv to out
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if:
+ *                out == NULL or
+ *                in == NULL or
+ *                ctr == NULL or
+ *                sched == NULL or
+ *                inlen == 0 or
+ *                (inlen % TC_AES_BLOCK_SIZE) != 0 or
+ *                (outlen % TC_AES_BLOCK_SIZE) != 0 or
+ *                outlen != inlen + TC_AES_BLOCK_SIZE
+ *  @note Assumes: - sched has been configured by aes_set_encrypt_key
+ *              - iv contains a 16 byte random string
+ *              - out buffer is large enough to hold the ciphertext + iv
+ *              - out buffer is a contiguous buffer
+ *              - in holds the plaintext and is a contiguous buffer
+ *              - inlen gives the number of bytes in the in buffer
+ *  @param out IN/OUT -- buffer to receive the ciphertext
+ *  @param outlen IN -- length of ciphertext buffer in bytes
+ *  @param in IN -- plaintext to encrypt
+ *  @param inlen IN -- length of plaintext buffer in bytes
+ *  @param iv IN -- the IV for the this encrypt/decrypt
+ *  @param sched IN --  AES key schedule for this encrypt
+ */
+int tc_cbc_mode_encrypt(uint8_t *out, unsigned int outlen, const uint8_t *in,
+                        unsigned int inlen, const uint8_t *iv,
+                        const TCAesKeySched_t sched);
+
+/**
+ * @brief CBC decryption procedure
+ * CBC decrypts inlen bytes of the in buffer into the out buffer
+ * using the provided encryption key schedule
+ * @return returns TC_CRYPTO_SUCCESS (1)
+ *         returns TC_CRYPTO_FAIL (0) if:
+ *                out == NULL or
+ *                in == NULL or
+ *                sched == NULL or
+ *                inlen == 0 or
+ *                outlen == 0 or
+ *                (inlen % TC_AES_BLOCK_SIZE) != 0 or
+ *                (outlen % TC_AES_BLOCK_SIZE) != 0 or
+ *                outlen != inlen + TC_AES_BLOCK_SIZE
+ * @note Assumes:- in == iv + ciphertext, i.e. the iv and the ciphertext are
+ *                contiguous. This allows for a very efficient decryption
+ *                algorithm that would not otherwise be possible
+ *              - sched was configured by aes_set_decrypt_key
+ *              - out buffer is large enough to hold the decrypted plaintext
+ *              and is a contiguous buffer
+ *              - inlen gives the number of bytes in the in buffer
+ * @param out IN/OUT -- buffer to receive decrypted data
+ * @param outlen IN -- length of plaintext buffer in bytes
+ * @param in IN -- ciphertext to decrypt, including IV
+ * @param inlen IN -- length of ciphertext buffer in bytes
+ * @param iv IN -- the IV for the this encrypt/decrypt
+ * @param sched IN --  AES key schedule for this decrypt
+ *
+ */
+int tc_cbc_mode_decrypt(uint8_t *out, unsigned int outlen, const uint8_t *in,
+                        unsigned int inlen, const uint8_t *iv,
+                        const TCAesKeySched_t sched);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_CBC_MODE_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ccm_mode.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ccm_mode.h
new file mode 100644
index 00000000000..1f85c76e613
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ccm_mode.h
@@ -0,0 +1,211 @@
+/* ccm_mode.h - TinyCrypt interface to a CCM mode implementation */
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief Interface to a CCM mode implementation.
+ *
+ *  Overview: CCM (for "Counter with CBC-MAC") mode is a NIST approved mode of
+ *            operation defined in SP 800-38C.
+ *
+ *            TinyCrypt CCM implementation accepts:
+ *
+ *            1) Both non-empty payload and associated data (it encrypts and
+ *            authenticates the payload and also authenticates the associated
+ *            data);
+ *            2) Non-empty payload and empty associated data (it encrypts and
+ *            authenticates the payload);
+ *            3) Non-empty associated data and empty payload (it degenerates to
+ *            an authentication mode on the associated data).
+ *
+ *            TinyCrypt CCM implementation accepts associated data of any length
+ *            between 0 and (2^16 - 2^8) bytes.
+ *
+ *  Security: The mac length parameter is an important parameter to estimate the
+ *            security against collision attacks (that aim at finding different
+ *            messages that produce the same authentication tag). TinyCrypt CCM
+ *            implementation accepts any even integer between 4 and 16, as
+ *            suggested in SP 800-38C.
+ *
+ *            RFC-3610, which also specifies CCM, presents a few relevant
+ *            security suggestions, such as: it is recommended for most
+ *            applications to use a mac length greater than 8. Besides, the
+ *            usage of the same nonce for two different messages which are
+ *            encrypted with the same key destroys the security of CCM mode.
+ *
+ *  Requires: AES-128
+ *
+ *  Usage:    1) call tc_ccm_config to configure.
+ *
+ *            2) call tc_ccm_mode_encrypt to encrypt data and generate tag.
+ *
+ *            3) call tc_ccm_mode_decrypt to decrypt data and verify tag.
+ */
+
+#ifndef __BLE_MESH_TC_CCM_MODE_H__
+#define __BLE_MESH_TC_CCM_MODE_H__
+
+#include <tinycrypt/aes.h>
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* max additional authenticated size in bytes: 2^16 - 2^8 = 65280 */
+#define TC_CCM_AAD_MAX_BYTES 0xff00
+
+/* max message size in bytes: 2^(8L) = 2^16 = 65536 */
+#define TC_CCM_PAYLOAD_MAX_BYTES 0x10000
+
+/* struct tc_ccm_mode_struct represents the state of a CCM computation */
+typedef struct tc_ccm_mode_struct {
+    TCAesKeySched_t sched; /* AES key schedule */
+    uint8_t *nonce; /* nonce required by CCM */
+    unsigned int mlen; /* mac length in bytes (parameter t in SP-800 38C) */
+} *TCCcmMode_t;
+
+/**
+ * @brief CCM configuration procedure
+ * @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if:
+ *                c == NULL or
+ *                sched == NULL or
+ *                nonce == NULL or
+ *                mlen != {4, 6, 8, 10, 12, 16}
+ * @param c -- CCM state
+ * @param sched IN -- AES key schedule
+ * @param nonce IN - nonce
+ * @param nlen -- nonce length in bytes
+ * @param mlen -- mac length in bytes (parameter t in SP-800 38C)
+ */
+int tc_ccm_config(TCCcmMode_t c, TCAesKeySched_t sched, uint8_t *nonce,
+                  unsigned int nlen, unsigned int mlen);
+
+/**
+ * @brief CCM tag generation and encryption procedure
+ * @return returns TC_CRYPTO_SUCCESS (1)
+ *         returns TC_CRYPTO_FAIL (0) if:
+ *                out == NULL or
+ *                c == NULL or
+ *                ((plen > 0) and (payload == NULL)) or
+ *                ((alen > 0) and (associated_data == NULL)) or
+ *                (alen >= TC_CCM_AAD_MAX_BYTES) or
+ *                (plen >= TC_CCM_PAYLOAD_MAX_BYTES) or
+ *                (olen < plen + maclength)
+ *
+ * @param out OUT -- encrypted data
+ * @param olen IN -- output length in bytes
+ * @param associated_data IN -- associated data
+ * @param alen IN -- associated data length in bytes
+ * @param payload IN -- payload
+ * @param plen IN -- payload length in bytes
+ * @param c IN -- CCM state
+ *
+ * @note: out buffer should be at least (plen + c->mlen) bytes long.
+ *
+ * @note: The sequence b for encryption is formatted as follows:
+ *        b = [FLAGS | nonce | counter ], where:
+ *          FLAGS is 1 byte long
+ *          nonce is 13 bytes long
+ *          counter is 2 bytes long
+ *        The byte FLAGS is composed by the following 8 bits:
+ *          0-2 bits: used to represent the value of q-1
+ *          3-7 btis: always 0's
+ *
+ * @note: The sequence b for authentication is formatted as follows:
+ *        b = [FLAGS | nonce | length(mac length)], where:
+ *          FLAGS is 1 byte long
+ *          nonce is 13 bytes long
+ *          length(mac length) is 2 bytes long
+ *        The byte FLAGS is composed by the following 8 bits:
+ *          0-2 bits: used to represent the value of q-1
+ *          3-5 bits: mac length (encoded as: (mlen-2)/2)
+ *          6: Adata (0 if alen == 0, and 1 otherwise)
+ *          7: always 0
+ */
+int tc_ccm_generation_encryption(uint8_t *out, unsigned int olen,
+                                 const uint8_t *associated_data,
+                                 unsigned int alen, const uint8_t *payload,
+                                 unsigned int plen, TCCcmMode_t c);
+
+/**
+ * @brief CCM decryption and tag verification procedure
+ * @return returns TC_CRYPTO_SUCCESS (1)
+ *         returns TC_CRYPTO_FAIL (0) if:
+ *                out == NULL or
+ *                c == NULL or
+ *                ((plen > 0) and (payload == NULL)) or
+ *                ((alen > 0) and (associated_data == NULL)) or
+ *                (alen >= TC_CCM_AAD_MAX_BYTES) or
+ *                (plen >= TC_CCM_PAYLOAD_MAX_BYTES) or
+ *                (olen < plen - c->mlen)
+ *
+ * @param out OUT -- decrypted data
+ * @param associated_data IN -- associated data
+ * @param alen IN -- associated data length in bytes
+ * @param payload IN -- payload
+ * @param plen IN -- payload length in bytes
+ * @param c IN -- CCM state
+ *
+ * @note: out buffer should be at least (plen - c->mlen) bytes long.
+ *
+ * @note: The sequence b for encryption is formatted as follows:
+ *        b = [FLAGS | nonce | counter ], where:
+ *          FLAGS is 1 byte long
+ *          nonce is 13 bytes long
+ *          counter is 2 bytes long
+ *        The byte FLAGS is composed by the following 8 bits:
+ *          0-2 bits: used to represent the value of q-1
+ *          3-7 btis: always 0's
+ *
+ * @note: The sequence b for authentication is formatted as follows:
+ *        b = [FLAGS | nonce | length(mac length)], where:
+ *          FLAGS is 1 byte long
+ *          nonce is 13 bytes long
+ *          length(mac length) is 2 bytes long
+ *        The byte FLAGS is composed by the following 8 bits:
+ *          0-2 bits: used to represent the value of q-1
+ *          3-5 bits: mac length (encoded as: (mlen-2)/2)
+ *          6: Adata (0 if alen == 0, and 1 otherwise)
+ *          7: always 0
+ */
+int tc_ccm_decryption_verification(uint8_t *out, unsigned int olen,
+                                   const uint8_t *associated_data,
+                                   unsigned int alen, const uint8_t *payload, unsigned int plen,
+                                   TCCcmMode_t c);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_CCM_MODE_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/cmac_mode.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/cmac_mode.h
new file mode 100644
index 00000000000..cf0b3601b20
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/cmac_mode.h
@@ -0,0 +1,194 @@
+/*  cmac_mode.h -- interface to a CMAC implementation */
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief Interface to a CMAC implementation.
+ *
+ *  Overview: CMAC is defined NIST in SP 800-38B, and is the standard algorithm
+ *            for computing a MAC using a block cipher. It can compute the MAC
+ *            for a byte string of any length. It is distinguished from CBC-MAC
+ *            in the processing of the final message block; CMAC uses a
+ *            different technique to compute the final message block is full
+ *            size or only partial, while CBC-MAC uses the same technique for
+ *            both. This difference permits CMAC to be applied to variable
+ *            length messages, while all messages authenticated by CBC-MAC must
+ *            be the same length.
+ *
+ *  Security: AES128-CMAC mode of operation offers 64 bits of security against
+ *            collision attacks. Note however that an external attacker cannot
+ *            generate the tags him/herself without knowing the MAC key. In this
+ *            sense, to attack the collision property of AES128-CMAC, an
+ *            external attacker would need the cooperation of the legal user to
+ *            produce an exponentially high number of tags (e.g. 2^64) to
+ *            finally be able to look for collisions and benefit from them. As
+ *            an extra precaution, the current implementation allows to at most
+ *            2^48 calls to the tc_cmac_update function before re-calling
+ *            tc_cmac_setup (allowing a new key to be set), as suggested in
+ *            Appendix B of SP 800-38B.
+ *
+ *  Requires: AES-128
+ *
+ *  Usage:   This implementation provides a "scatter-gather" interface, so that
+ *           the CMAC value can be computed incrementally over a message
+ *           scattered in different segments throughout memory. Experience shows
+ *           this style of interface tends to minimize the burden of programming
+ *           correctly. Like all symmetric key operations, it is session
+ *           oriented.
+ *
+ *           To begin a CMAC session, use tc_cmac_setup to initialize a struct
+ *           tc_cmac_struct with encryption key and buffer. Our implementation
+ *           always assume that the AES key to be the same size as the block
+ *           cipher block size. Once setup, this data structure can be used for
+ *           many CMAC computations.
+ *
+ *           Once the state has been setup with a key, computing the CMAC of
+ *           some data requires three steps:
+ *
+ *           (1) first use tc_cmac_init to initialize a new CMAC computation.
+ *           (2) next mix all of the data into the CMAC computation state using
+ *               tc_cmac_update. If all of the data resides in a single data
+ *               segment then only one tc_cmac_update call is needed; if data
+ *               is scattered throughout memory in n data segments, then n calls
+ *               will be needed. CMAC IS ORDER SENSITIVE, to be able to detect
+ *               attacks that swap bytes, so the order in which data is mixed
+ *               into the state is critical!
+ *           (3) Once all of the data for a message has been mixed, use
+ *               tc_cmac_final to compute the CMAC tag value.
+ *
+ *           Steps (1)-(3) can be repeated as many times as you want to CMAC
+ *           multiple messages. A practical limit is 2^48 1K messages before you
+ *           have to change the key.
+ *
+ *           Once you are done computing CMAC with a key, it is a good idea to
+ *           destroy the state so an attacker cannot recover the key; use
+ *           tc_cmac_erase to accomplish this.
+ */
+
+#ifndef __BLE_MESH_TC_CMAC_MODE_H__
+#define __BLE_MESH_TC_CMAC_MODE_H__
+
+#include <tinycrypt/aes.h>
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* padding for last message block */
+#define TC_CMAC_PADDING 0x80
+
+/* struct tc_cmac_struct represents the state of a CMAC computation */
+typedef struct tc_cmac_struct {
+    /* initialization vector */
+    uint8_t iv[TC_AES_BLOCK_SIZE];
+    /* used if message length is a multiple of block_size bytes */
+    uint8_t K1[TC_AES_BLOCK_SIZE];
+    /* used if message length isn't a multiple block_size bytes */
+    uint8_t K2[TC_AES_BLOCK_SIZE];
+    /* where to put bytes that didn't fill a block */
+    uint8_t leftover[TC_AES_BLOCK_SIZE];
+    /* identifies the encryption key */
+    unsigned int keyid;
+    /* next available leftover location */
+    unsigned int leftover_offset;
+    /* AES key schedule */
+    TCAesKeySched_t sched;
+    /* calls to tc_cmac_update left before re-key */
+    uint64_t countdown;
+} *TCCmacState_t;
+
+/**
+ * @brief Configures the CMAC state to use the given AES key
+ * @return returns TC_CRYPTO_SUCCESS (1) after having configured the CMAC state
+ *         returns TC_CRYPTO_FAIL (0) if:
+ *              s == NULL or
+ *              key == NULL
+ *
+ * @param s IN/OUT -- the state to set up
+ * @param key IN -- the key to use
+ * @param sched IN -- AES key schedule
+ */
+int tc_cmac_setup(TCCmacState_t s, const uint8_t *key,
+                  TCAesKeySched_t sched);
+
+/**
+ * @brief Erases the CMAC state
+ * @return returns TC_CRYPTO_SUCCESS (1) after having configured the CMAC state
+ *         returns TC_CRYPTO_FAIL (0) if:
+ *              s == NULL
+ *
+ * @param s IN/OUT -- the state to erase
+ */
+int tc_cmac_erase(TCCmacState_t s);
+
+/**
+ * @brief Initializes a new CMAC computation
+ * @return returns TC_CRYPTO_SUCCESS (1) after having initialized the CMAC state
+ *         returns TC_CRYPTO_FAIL (0) if:
+ *              s == NULL
+ *
+ * @param s IN/OUT -- the state to initialize
+ */
+int tc_cmac_init(TCCmacState_t s);
+
+/**
+ * @brief Incrementally computes CMAC over the next data segment
+ * @return returns TC_CRYPTO_SUCCESS (1) after successfully updating the CMAC state
+ *         returns TC_CRYPTO_FAIL (0) if:
+ *              s == NULL or
+ *              if data == NULL when dlen > 0
+ *
+ * @param s IN/OUT -- the CMAC state
+ * @param data IN -- the next data segment to MAC
+ * @param dlen IN -- the length of data in bytes
+ */
+int tc_cmac_update(TCCmacState_t s, const uint8_t *data, size_t dlen);
+
+/**
+ * @brief Generates the tag from the CMAC state
+ * @return returns TC_CRYPTO_SUCCESS (1) after successfully generating the tag
+ *         returns TC_CRYPTO_FAIL (0) if:
+ *              tag == NULL or
+ *              s == NULL
+ *
+ * @param tag OUT -- the CMAC tag
+ * @param s IN -- CMAC state
+ */
+int tc_cmac_final(uint8_t *tag, TCCmacState_t s);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_CMAC_MODE_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/constants.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/constants.h
new file mode 100644
index 00000000000..0abb01a15a8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/constants.h
@@ -0,0 +1,61 @@
+/* constants.h - TinyCrypt interface to constants */
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief -- Interface to constants.
+ *
+ */
+
+#ifndef __BLE_MESH_TC_CONSTANTS_H__
+#define __BLE_MESH_TC_CONSTANTS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdbool.h>
+
+#ifndef NULL
+#define NULL ((void *)0)
+#endif
+
+#define TC_CRYPTO_SUCCESS 1
+#define TC_CRYPTO_FAIL 0
+
+#define TC_ZERO_BYTE 0x00
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_CONSTANTS_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ctr_mode.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ctr_mode.h
new file mode 100644
index 00000000000..039f58c86c4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ctr_mode.h
@@ -0,0 +1,108 @@
+/* ctr_mode.h - TinyCrypt interface to CTR mode */
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief Interface to CTR mode.
+ *
+ *  Overview:  CTR (pronounced "counter") mode is a NIST approved mode of
+ *             operation defined in SP 800-38a. It can be used with any
+ *             block cipher to provide confidentiality of strings of any
+ *             length. TinyCrypt hard codes AES128 as the block cipher.
+ *
+ *  Security:  CTR mode achieves confidentiality only if the counter value is
+ *             never reused with a same encryption key. If the counter is
+ *             repeated, than an adversary might be able to defeat the scheme.
+ *
+ *             A usual method to ensure different counter values refers to
+ *             initialize the counter in a given value (0, for example) and
+ *             increases it every time a new block is enciphered. This naturally
+ *             leaves to a limitation on the number q of blocks that can be
+ *             enciphered using a same key: q < 2^(counter size).
+ *
+ *             TinyCrypt uses a counter of 32 bits. This means that after 2^32
+ *             block encryptions, the counter will be reused (thus losing CBC
+ *             security). 2^32 block encryptions should be enough for most of
+ *             applications targeting constrained devices. Applications intended
+ *             to encrypt a larger number of blocks must replace the key after
+ *             2^32 block encryptions.
+ *
+ *             CTR mode provides NO data integrity.
+ *
+ *  Requires: AES-128
+ *
+ *  Usage:     1) call tc_ctr_mode to process the data to encrypt/decrypt.
+ *
+ */
+
+#ifndef __BLE_MESH_TC_CTR_MODE_H__
+#define __BLE_MESH_TC_CTR_MODE_H__
+
+#include <tinycrypt/aes.h>
+#include <tinycrypt/constants.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *  @brief CTR mode encryption/decryption procedure.
+ *  CTR mode encrypts (or decrypts) inlen bytes from in buffer into out buffer
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if:
+ *                out == NULL or
+ *                in == NULL or
+ *                ctr == NULL or
+ *                sched == NULL or
+ *                inlen == 0 or
+ *                outlen == 0 or
+ *                inlen != outlen
+ *  @note Assumes:- The current value in ctr has NOT been used with sched
+ *              - out points to inlen bytes
+ *              - in points to inlen bytes
+ *              - ctr is an integer counter in littleEndian format
+ *              - sched was initialized by aes_set_encrypt_key
+ * @param out OUT -- produced ciphertext (plaintext)
+ * @param outlen IN -- length of ciphertext buffer in bytes
+ * @param in IN -- data to encrypt (or decrypt)
+ * @param inlen IN -- length of input data in bytes
+ * @param ctr IN/OUT -- the current counter value
+ * @param sched IN -- an initialized AES key schedule
+ */
+int tc_ctr_mode(uint8_t *out, unsigned int outlen, const uint8_t *in,
+                unsigned int inlen, uint8_t *ctr, const TCAesKeySched_t sched);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_CTR_MODE_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ctr_prng.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ctr_prng.h
new file mode 100644
index 00000000000..04e070d3ee7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ctr_prng.h
@@ -0,0 +1,166 @@
+/* ctr_prng.h - TinyCrypt interface to a CTR-PRNG implementation */
+
+/*
+ * Copyright (c) 2016, Chris Morrison
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright notice, this
+ *   list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright notice,
+ *   this list of conditions and the following disclaimer in the documentation
+ *   and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief Interface to a CTR-PRNG implementation.
+ *
+ *  Overview:   A pseudo-random number generator (PRNG) generates a sequence
+ *              of numbers that have a distribution close to the one expected
+ *              for a sequence of truly random numbers. The NIST Special
+ *              Publication 800-90A specifies several mechanisms to generate
+ *              sequences of pseudo random numbers, including the CTR-PRNG one
+ *              which is based on AES. TinyCrypt implements CTR-PRNG with
+ *              AES-128.
+ *
+ *  Security:   A cryptographically secure PRNG depends on the existence of an
+ *              entropy source to provide a truly random seed as well as the
+ *              security of the primitives used as the building blocks (AES-128
+ *              in this instance).
+ *
+ *  Requires:   - AES-128
+ *
+ *  Usage:      1) call tc_ctr_prng_init to seed the prng context
+ *
+ *              2) call tc_ctr_prng_reseed to mix in additional entropy into
+ *              the prng context
+ *
+ *              3) call tc_ctr_prng_generate to output the pseudo-random data
+ *
+ *              4) call tc_ctr_prng_uninstantiate to zero out the prng context
+ */
+
+#ifndef __BLE_MESH_TC_CTR_PRNG_H__
+#define __BLE_MESH_TC_CTR_PRNG_H__
+
+#include <tinycrypt/aes.h>
+
+#define TC_CTR_PRNG_RESEED_REQ -1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    /* updated each time another BLOCKLEN_BYTES bytes are produced */
+    uint8_t V[TC_AES_BLOCK_SIZE];
+
+    /* updated whenever the PRNG is reseeded */
+    struct tc_aes_key_sched_struct key;
+
+    /* number of requests since initialization/reseeding */
+    uint64_t reseedCount;
+} TCCtrPrng_t;
+
+
+/**
+ *  @brief CTR-PRNG initialization procedure
+ *  Initializes prng context with entropy and personalization string (if any)
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if:
+ *                ctx == NULL,
+ *                entropy == NULL,
+ *                entropyLen < (TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE)
+ *  @note       Only the first (TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE) bytes of
+ *              both the entropy and personalization inputs are used -
+ *              supplying additional bytes has no effect.
+ *  @param ctx IN/OUT -- the PRNG context to initialize
+ *  @param entropy IN -- entropy used to seed the PRNG
+ *  @param entropyLen IN -- entropy length in bytes
+ *  @param personalization IN -- personalization string used to seed the PRNG
+ *  (may be null)
+ *  @param plen IN -- personalization length in bytes
+ *
+ */
+int tc_ctr_prng_init(TCCtrPrng_t *const ctx,
+                     uint8_t const *const entropy,
+                     unsigned int entropyLen,
+                     uint8_t const *const personalization,
+                     unsigned int pLen);
+
+/**
+ *  @brief CTR-PRNG reseed procedure
+ *  Mixes entropy and additional_input into the prng context
+ *  @return returns  TC_CRYPTO_SUCCESS (1)
+ *  returns TC_CRYPTO_FAIL (0) if:
+ *          ctx == NULL,
+ *          entropy == NULL,
+ *          entropylen < (TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE)
+ *  @note It is better to reseed an existing prng context rather than
+ *        re-initialise, so that any existing entropy in the context is
+ *        presereved.  This offers some protection against undetected failures
+ *        of the entropy source.
+ *  @note Assumes tc_ctr_prng_init has been called for ctx
+ *  @param ctx IN/OUT -- the PRNG state
+ *  @param entropy IN -- entropy to mix into the prng
+ *  @param entropylen IN -- length of entropy in bytes
+ *  @param additional_input IN -- additional input to the prng (may be null)
+ *  @param additionallen IN -- additional input length in bytes
+ */
+int tc_ctr_prng_reseed(TCCtrPrng_t *const ctx,
+                       uint8_t const *const entropy,
+                       unsigned int entropyLen,
+                       uint8_t const *const additional_input,
+                       unsigned int additionallen);
+
+/**
+ *  @brief CTR-PRNG generate procedure
+ *  Generates outlen pseudo-random bytes into out buffer, updates prng
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CTR_PRNG_RESEED_REQ (-1) if a reseed is needed
+ *             returns TC_CRYPTO_FAIL (0) if:
+ *                ctx == NULL,
+ *                out == NULL,
+ *                outlen >= 2^16
+ *  @note Assumes tc_ctr_prng_init has been called for ctx
+ *  @param ctx IN/OUT -- the PRNG context
+ *  @param additional_input IN -- additional input to the prng (may be null)
+ *  @param additionallen IN -- additional input length in bytes
+ *  @param out IN/OUT -- buffer to receive output
+ *  @param outlen IN -- size of out buffer in bytes
+ */
+int tc_ctr_prng_generate(TCCtrPrng_t *const ctx,
+                         uint8_t const *const additional_input,
+                         unsigned int additionallen,
+                         uint8_t *const out,
+                         unsigned int outlen);
+
+/**
+ *  @brief CTR-PRNG uninstantiate procedure
+ *  Zeroes the internal state of the supplied prng context
+ *  @return none
+ *  @param ctx IN/OUT -- the PRNG context
+ */
+void tc_ctr_prng_uninstantiate(TCCtrPrng_t *const ctx);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_CTR_PRNG_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc.h
new file mode 100644
index 00000000000..72ba652f26d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc.h
@@ -0,0 +1,545 @@
+/* ecc.h - TinyCrypt interface to common ECC functions */
+
+/* Copyright (c) 2014, Kenneth MacKay
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright notice, this
+ *   list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright notice,
+ *   this list of conditions and the following disclaimer in the documentation
+ *   and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief -- Interface to common ECC functions.
+ *
+ *  Overview: This software is an implementation of common functions
+ *            necessary to elliptic curve cryptography. This implementation uses
+ *            curve NIST p-256.
+ *
+ *  Security: The curve NIST p-256 provides approximately 128 bits of security.
+ *
+ */
+
+#ifndef __BLE_MESH_TC_UECC_H__
+#define __BLE_MESH_TC_UECC_H__
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Word size (4 bytes considering 32-bits architectures) */
+#define uECC_WORD_SIZE 4
+
+/* setting max number of calls to prng: */
+#ifndef uECC_RNG_MAX_TRIES
+#define uECC_RNG_MAX_TRIES 64
+#endif
+
+/* defining data types to store word and bit counts: */
+typedef int8_t wordcount_t;
+typedef int16_t bitcount_t;
+/* defining data type for comparison result: */
+typedef int8_t cmpresult_t;
+/* defining data type to store ECC coordinate/point in 32bits words: */
+typedef unsigned int uECC_word_t;
+/* defining data type to store an ECC coordinate/point in 64bits words: */
+typedef uint64_t uECC_dword_t;
+
+/* defining masks useful for ecc computations: */
+#define HIGH_BIT_SET 0x80000000
+#define uECC_WORD_BITS 32
+#define uECC_WORD_BITS_SHIFT 5
+#define uECC_WORD_BITS_MASK 0x01F
+
+/* Number of words of 32 bits to represent an element of the the curve p-256: */
+#define NUM_ECC_WORDS 8
+/* Number of bytes to represent an element of the the curve p-256: */
+#define NUM_ECC_BYTES (uECC_WORD_SIZE*NUM_ECC_WORDS)
+
+/* structure that represents an elliptic curve (e.g. p256):*/
+struct uECC_Curve_t;
+typedef const struct uECC_Curve_t *uECC_Curve;
+struct uECC_Curve_t {
+    wordcount_t num_words;
+    wordcount_t num_bytes;
+    bitcount_t num_n_bits;
+    uECC_word_t p[NUM_ECC_WORDS];
+    uECC_word_t n[NUM_ECC_WORDS];
+    uECC_word_t G[NUM_ECC_WORDS * 2];
+    uECC_word_t b[NUM_ECC_WORDS];
+    void (*double_jacobian)(uECC_word_t *X1, uECC_word_t *Y1, uECC_word_t *Z1,
+                            uECC_Curve curve);
+    void (*x_side)(uECC_word_t *result, const uECC_word_t *x, uECC_Curve curve);
+    void (*mmod_fast)(uECC_word_t *result, uECC_word_t *product);
+};
+
+/*
+ * @brief computes doubling of point ion jacobian coordinates, in place.
+ * @param X1 IN/OUT -- x coordinate
+ * @param Y1 IN/OUT -- y coordinate
+ * @param Z1 IN/OUT -- z coordinate
+ * @param curve IN -- elliptic curve
+ */
+void double_jacobian_default(uECC_word_t *X1, uECC_word_t *Y1,
+                             uECC_word_t *Z1, uECC_Curve curve);
+
+/*
+ * @brief Computes x^3 + ax + b. result must not overlap x.
+ * @param result OUT -- x^3 + ax + b
+ * @param x IN -- value of x
+ * @param curve IN -- elliptic curve
+ */
+void x_side_default(uECC_word_t *result, const uECC_word_t *x,
+                    uECC_Curve curve);
+
+/*
+ * @brief Computes result = product % curve_p
+ * from http://www.nsa.gov/ia/_files/nist-routines.pdf
+ * @param result OUT -- product % curve_p
+ * @param product IN -- value to be reduced mod curve_p
+ */
+void vli_mmod_fast_secp256r1(unsigned int *result, unsigned int *product);
+
+/* Bytes to words ordering: */
+#define BYTES_TO_WORDS_8(a, b, c, d, e, f, g, h) 0x##d##c##b##a, 0x##h##g##f##e
+#define BYTES_TO_WORDS_4(a, b, c, d) 0x##d##c##b##a
+#define BITS_TO_WORDS(num_bits) \
+    ((num_bits + ((uECC_WORD_SIZE * 8) - 1)) / (uECC_WORD_SIZE * 8))
+#define BITS_TO_BYTES(num_bits) ((num_bits + 7) / 8)
+
+/* definition of curve NIST p-256: */
+static const struct uECC_Curve_t curve_secp256r1 = {
+    NUM_ECC_WORDS,
+    NUM_ECC_BYTES,
+    256, /* num_n_bits */ {
+        BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
+        BYTES_TO_WORDS_8(FF, FF, FF, FF, 00, 00, 00, 00),
+        BYTES_TO_WORDS_8(00, 00, 00, 00, 00, 00, 00, 00),
+        BYTES_TO_WORDS_8(01, 00, 00, 00, FF, FF, FF, FF)
+    }, {
+        BYTES_TO_WORDS_8(51, 25, 63, FC, C2, CA, B9, F3),
+        BYTES_TO_WORDS_8(84, 9E, 17, A7, AD, FA, E6, BC),
+        BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
+        BYTES_TO_WORDS_8(00, 00, 00, 00, FF, FF, FF, FF)
+    }, {
+        BYTES_TO_WORDS_8(96, C2, 98, D8, 45, 39, A1, F4),
+        BYTES_TO_WORDS_8(A0, 33, EB, 2D, 81, 7D, 03, 77),
+        BYTES_TO_WORDS_8(F2, 40, A4, 63, E5, E6, BC, F8),
+        BYTES_TO_WORDS_8(47, 42, 2C, E1, F2, D1, 17, 6B),
+
+        BYTES_TO_WORDS_8(F5, 51, BF, 37, 68, 40, B6, CB),
+        BYTES_TO_WORDS_8(CE, 5E, 31, 6B, 57, 33, CE, 2B),
+        BYTES_TO_WORDS_8(16, 9E, 0F, 7C, 4A, EB, E7, 8E),
+        BYTES_TO_WORDS_8(9B, 7F, 1A, FE, E2, 42, E3, 4F)
+    }, {
+        BYTES_TO_WORDS_8(4B, 60, D2, 27, 3E, 3C, CE, 3B),
+        BYTES_TO_WORDS_8(F6, B0, 53, CC, B0, 06, 1D, 65),
+        BYTES_TO_WORDS_8(BC, 86, 98, 76, 55, BD, EB, B3),
+        BYTES_TO_WORDS_8(E7, 93, 3A, AA, D8, 35, C6, 5A)
+    },
+    &double_jacobian_default,
+    &x_side_default,
+    &vli_mmod_fast_secp256r1
+};
+
+uECC_Curve uECC_secp256r1(void);
+
+/*
+ * @brief Generates a random integer in the range 0 < random < top.
+ * Both random and top have num_words words.
+ * @param random OUT -- random integer in the range 0 < random < top
+ * @param top IN -- upper limit
+ * @param num_words IN -- number of words
+ * @return a random integer in the range 0 < random < top
+ */
+int uECC_generate_random_int(uECC_word_t *random, const uECC_word_t *top,
+                             wordcount_t num_words);
+
+
+/* uECC_RNG_Function type
+ * The RNG function should fill 'size' random bytes into 'dest'. It should
+ * return 1 if 'dest' was filled with random data, or 0 if the random data could
+ * not be generated. The filled-in values should be either truly random, or from
+ * a cryptographically-secure PRNG.
+ *
+ * A correctly functioning RNG function must be set (using uECC_set_rng())
+ * before calling uECC_make_key() or uECC_sign().
+ *
+ * Setting a correctly functioning RNG function improves the resistance to
+ * side-channel attacks for uECC_shared_secret().
+ *
+ * A correct RNG function is set by default. If you are building on another
+ * POSIX-compliant system that supports /dev/random or /dev/urandom, you can
+ * define uECC_POSIX to use the predefined RNG.
+ */
+typedef int(*uECC_RNG_Function)(uint8_t *dest, unsigned int size);
+
+/*
+ * @brief Set the function that will be used to generate random bytes. The RNG
+ * function should return 1 if the random data was generated, or 0 if the random
+ * data could not be generated.
+ *
+ * @note On platforms where there is no predefined RNG function, this must be
+ * called before uECC_make_key() or uECC_sign() are used.
+ *
+ * @param rng_function IN -- function that will be used to generate random bytes
+ */
+void uECC_set_rng(uECC_RNG_Function rng_function);
+
+/*
+ * @brief provides current uECC_RNG_Function.
+ * @return Returns the function that will be used to generate random bytes.
+ */
+uECC_RNG_Function uECC_get_rng(void);
+
+/*
+ * @brief computes the size of a private key for the curve in bytes.
+ * @param curve IN -- elliptic curve
+ * @return size of a private key for the curve in bytes.
+ */
+int uECC_curve_private_key_size(uECC_Curve curve);
+
+/*
+ * @brief computes the size of a public key for the curve in bytes.
+ * @param curve IN -- elliptic curve
+ * @return the size of a public key for the curve in bytes.
+ */
+int uECC_curve_public_key_size(uECC_Curve curve);
+
+/*
+ * @brief Compute the corresponding public key for a private key.
+ * @param private_key IN -- The private key to compute the public key for
+ * @param public_key OUT -- Will be filled in with the corresponding public key
+ * @param curve
+ * @return Returns 1 if key was computed successfully, 0 if an error occurred.
+ */
+int uECC_compute_public_key(const uint8_t *private_key,
+                            uint8_t *public_key, uECC_Curve curve);
+
+/*
+ * @brief Compute public-key.
+ * @return corresponding public-key.
+ * @param result OUT -- public-key
+ * @param private_key IN -- private-key
+ * @param curve IN -- elliptic curve
+ */
+uECC_word_t EccPoint_compute_public_key(uECC_word_t *result,
+                                        uECC_word_t *private_key, uECC_Curve curve);
+
+/*
+ * @brief Regularize the bitcount for the private key so that attackers cannot
+ * use a side channel attack to learn the number of leading zeros.
+ * @return Regularized k
+ * @param k IN -- private-key
+ * @param k0 IN/OUT -- regularized k
+ * @param k1 IN/OUT -- regularized k
+ * @param curve IN -- elliptic curve
+ */
+uECC_word_t regularize_k(const uECC_word_t *const k, uECC_word_t *k0,
+                         uECC_word_t *k1, uECC_Curve curve);
+
+/*
+ * @brief Point multiplication algorithm using Montgomery's ladder with co-Z
+ * coordinates. See http://eprint.iacr.org/2011/338.pdf.
+ * @note Result may overlap point.
+ * @param result OUT -- returns scalar*point
+ * @param point IN -- elliptic curve point
+ * @param scalar IN -- scalar
+ * @param initial_Z IN -- initial value for z
+ * @param num_bits IN -- number of bits in scalar
+ * @param curve IN -- elliptic curve
+ */
+void EccPoint_mult(uECC_word_t *result, const uECC_word_t *point,
+                   const uECC_word_t *scalar, const uECC_word_t *initial_Z,
+                   bitcount_t num_bits, uECC_Curve curve);
+
+/*
+ * @brief Constant-time comparison to zero - secure way to compare long integers
+ * @param vli IN -- very long integer
+ * @param num_words IN -- number of words in the vli
+ * @return 1 if vli == 0, 0 otherwise.
+ */
+uECC_word_t uECC_vli_isZero(const uECC_word_t *vli, wordcount_t num_words);
+
+/*
+ * @brief Check if 'point' is the point at infinity
+ * @param point IN -- elliptic curve point
+ * @param curve IN -- elliptic curve
+ * @return if 'point' is the point at infinity, 0 otherwise.
+ */
+uECC_word_t EccPoint_isZero(const uECC_word_t *point, uECC_Curve curve);
+
+/*
+ * @brief computes the sign of left - right, in constant time.
+ * @param left IN -- left term to be compared
+ * @param right IN -- right term to be compared
+ * @param num_words IN -- number of words
+ * @return the sign of left - right
+ */
+cmpresult_t uECC_vli_cmp(const uECC_word_t *left, const uECC_word_t *right,
+                         wordcount_t num_words);
+
+/*
+ * @brief computes sign of left - right, not in constant time.
+ * @note should not be used if inputs are part of a secret
+ * @param left IN -- left term to be compared
+ * @param right IN -- right term to be compared
+ * @param num_words IN -- number of words
+ * @return the sign of left - right
+ */
+cmpresult_t uECC_vli_cmp_unsafe(const uECC_word_t *left, const uECC_word_t *right,
+                                wordcount_t num_words);
+
+/*
+ * @brief Computes result = (left - right) % mod.
+ * @note Assumes that (left < mod) and (right < mod), and that result does not
+ * overlap mod.
+ * @param result OUT -- (left - right) % mod
+ * @param left IN -- leftright term in modular subtraction
+ * @param right IN -- right term in modular subtraction
+ * @param mod IN -- mod
+ * @param num_words IN -- number of words
+ */
+void uECC_vli_modSub(uECC_word_t *result, const uECC_word_t *left,
+                     const uECC_word_t *right, const uECC_word_t *mod,
+                     wordcount_t num_words);
+
+/*
+ * @brief Computes P' = (x1', y1', Z3), P + Q = (x3, y3, Z3) or
+ * P => P', Q => P + Q
+ * @note assumes Input P = (x1, y1, Z), Q = (x2, y2, Z)
+ * @param X1 IN -- x coordinate of P
+ * @param Y1 IN -- y coordinate of P
+ * @param X2 IN -- x coordinate of Q
+ * @param Y2 IN -- y coordinate of Q
+ * @param curve IN -- elliptic curve
+ */
+void XYcZ_add(uECC_word_t *X1, uECC_word_t *Y1, uECC_word_t *X2,
+              uECC_word_t *Y2, uECC_Curve curve);
+
+/*
+ * @brief Computes (x1 * z^2, y1 * z^3)
+ * @param X1 IN -- previous x1 coordinate
+ * @param Y1 IN -- previous y1 coordinate
+ * @param Z IN -- z value
+ * @param curve IN -- elliptic curve
+ */
+void apply_z(uECC_word_t *X1, uECC_word_t *Y1, const uECC_word_t *const Z,
+             uECC_Curve curve);
+
+/*
+ * @brief Check if bit is set.
+ * @return Returns nonzero if bit 'bit' of vli is set.
+ * @warning It is assumed that the value provided in 'bit' is within the
+ * boundaries of the word-array 'vli'.
+ * @note The bit ordering layout assumed for vli is: {31, 30, ..., 0},
+ * {63, 62, ..., 32}, {95, 94, ..., 64}, {127, 126,..., 96} for a vli consisting
+ * of 4 uECC_word_t elements.
+ */
+uECC_word_t uECC_vli_testBit(const uECC_word_t *vli, bitcount_t bit);
+
+/*
+ * @brief Computes result = product % mod, where product is 2N words long.
+ * @param result OUT -- product % mod
+ * @param mod IN -- module
+ * @param num_words IN -- number of words
+ * @warning Currently only designed to work for curve_p or curve_n.
+ */
+void uECC_vli_mmod(uECC_word_t *result, uECC_word_t *product,
+                   const uECC_word_t *mod, wordcount_t num_words);
+
+/*
+ * @brief Computes modular product (using curve->mmod_fast)
+ * @param result OUT -- (left * right) mod % curve_p
+ * @param left IN -- left term in product
+ * @param right IN -- right term in product
+ * @param curve IN -- elliptic curve
+ */
+void uECC_vli_modMult_fast(uECC_word_t *result, const uECC_word_t *left,
+                           const uECC_word_t *right, uECC_Curve curve);
+
+/*
+ * @brief Computes result = left - right.
+ * @note Can modify in place.
+ * @param result OUT -- left - right
+ * @param left IN -- left term in subtraction
+ * @param right IN -- right term in subtraction
+ * @param num_words IN -- number of words
+ * @return borrow
+ */
+uECC_word_t uECC_vli_sub(uECC_word_t *result, const uECC_word_t *left,
+                         const uECC_word_t *right, wordcount_t num_words);
+
+/*
+ * @brief Constant-time comparison function(secure way to compare long ints)
+ * @param left IN -- left term in comparison
+ * @param right IN -- right term in comparison
+ * @param num_words IN -- number of words
+ * @return Returns 0 if left == right, 1 otherwise.
+ */
+uECC_word_t uECC_vli_equal(const uECC_word_t *left, const uECC_word_t *right,
+                           wordcount_t num_words);
+
+/*
+ * @brief Computes (left * right) % mod
+ * @param result OUT -- (left * right) % mod
+ * @param left IN -- left term in product
+ * @param right IN -- right term in product
+ * @param mod IN -- mod
+ * @param num_words IN -- number of words
+ */
+void uECC_vli_modMult(uECC_word_t *result, const uECC_word_t *left,
+                      const uECC_word_t *right, const uECC_word_t *mod,
+                      wordcount_t num_words);
+
+/*
+ * @brief Computes (1 / input) % mod
+ * @note All VLIs are the same size.
+ * @note See "Euclid's GCD to Montgomery Multiplication to the Great Divide"
+ * @param result OUT -- (1 / input) % mod
+ * @param input IN -- value to be modular inverted
+ * @param mod IN -- mod
+ * @param num_words -- number of words
+ */
+void uECC_vli_modInv(uECC_word_t *result, const uECC_word_t *input,
+                     const uECC_word_t *mod, wordcount_t num_words);
+
+/*
+ * @brief Sets dest = src.
+ * @param dest OUT -- destination buffer
+ * @param src IN --  origin buffer
+ * @param num_words IN -- number of words
+ */
+void uECC_vli_set(uECC_word_t *dest, const uECC_word_t *src,
+                  wordcount_t num_words);
+
+/*
+ * @brief Computes (left + right) % mod.
+ * @note Assumes that (left < mod) and right < mod), and that result does not
+ * overlap mod.
+ * @param result OUT -- (left + right) % mod.
+ * @param left IN -- left term in addition
+ * @param right IN -- right term in addition
+ * @param mod IN -- mod
+ * @param num_words IN -- number of words
+ */
+void uECC_vli_modAdd(uECC_word_t *result,  const uECC_word_t *left,
+                     const uECC_word_t *right, const uECC_word_t *mod,
+                     wordcount_t num_words);
+
+/*
+ * @brief Counts the number of bits required to represent vli.
+ * @param vli IN -- very long integer
+ * @param max_words IN -- number of words
+ * @return number of bits in given vli
+ */
+bitcount_t uECC_vli_numBits(const uECC_word_t *vli,
+                            const wordcount_t max_words);
+
+/*
+ * @brief Erases (set to 0) vli
+ * @param vli IN -- very long integer
+ * @param num_words IN -- number of words
+ */
+void uECC_vli_clear(uECC_word_t *vli, wordcount_t num_words);
+
+/*
+ * @brief check if it is a valid point in the curve
+ * @param point IN -- point to be checked
+ * @param curve IN -- elliptic curve
+ * @return 0 if point is valid
+ * @exception returns -1 if it is a point at infinity
+ * @exception returns -2 if x or y is smaller than p,
+ * @exception returns -3 if y^2 != x^3 + ax + b.
+ */
+int uECC_valid_point(const uECC_word_t *point, uECC_Curve curve);
+
+/*
+ * @brief Check if a public key is valid.
+ * @param public_key IN -- The public key to be checked.
+ * @return returns 0 if the public key is valid
+ * @exception returns -1 if it is a point at infinity
+ * @exception returns -2 if x or y is smaller than p,
+ * @exception returns -3 if y^2 != x^3 + ax + b.
+ * @exception returns -4 if public key is the group generator.
+ *
+ * @note Note that you are not required to check for a valid public key before
+ * using any other uECC functions. However, you may wish to avoid spending CPU
+ * time computing a shared secret or verifying a signature using an invalid
+ * public key.
+ */
+int uECC_valid_public_key(const uint8_t *public_key, uECC_Curve curve);
+
+/*
+ * @brief Converts an integer in uECC native format to big-endian bytes.
+ * @param bytes OUT -- bytes representation
+ * @param num_bytes IN -- number of bytes
+ * @param native IN -- uECC native representation
+ */
+void uECC_vli_nativeToBytes(uint8_t *bytes, int num_bytes,
+                            const unsigned int *native);
+
+/*
+ * @brief Converts big-endian bytes to an integer in uECC native format.
+ * @param native OUT -- uECC native representation
+ * @param bytes IN -- bytes representation
+ * @param num_bytes IN -- number of bytes
+ */
+void uECC_vli_bytesToNative(unsigned int *native, const uint8_t *bytes,
+                            int num_bytes);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_UECC_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc_dh.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc_dh.h
new file mode 100644
index 00000000000..ba9a0ebb2dc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc_dh.h
@@ -0,0 +1,131 @@
+/* ecc_dh.h - TinyCrypt interface to EC-DH implementation */
+
+/*
+ * Copyright (c) 2014, Kenneth MacKay
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright notice, this
+ *   list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright notice,
+ *   this list of conditions and the following disclaimer in the documentation
+ *   and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief -- Interface to EC-DH implementation.
+ *
+ *  Overview: This software is an implementation of EC-DH. This implementation
+ *            uses curve NIST p-256.
+ *
+ *  Security: The curve NIST p-256 provides approximately 128 bits of security.
+ */
+
+#ifndef __BLE_MESH_TC_ECC_DH_H__
+#define __BLE_MESH_TC_ECC_DH_H__
+
+#include <tinycrypt/ecc.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Create a public/private key pair.
+ * @return returns TC_CRYPTO_SUCCESS (1) if the key pair was generated successfully
+ *         returns TC_CRYPTO_FAIL (0) if error while generating key pair
+ *
+ * @param p_public_key OUT -- Will be filled in with the public key. Must be at
+ * least 2 * the curve size (in bytes) long. For curve secp256r1, p_public_key
+ * must be 64 bytes long.
+ * @param p_private_key OUT -- Will be filled in with the private key. Must be as
+ * long as the curve order (for secp256r1, p_private_key must be 32 bytes long).
+ *
+ * @note side-channel countermeasure: algorithm strengthened against timing
+ * attack.
+ * @warning A cryptographically-secure PRNG function must be set (using
+ * uECC_set_rng()) before calling uECC_make_key().
+ */
+int uECC_make_key(uint8_t *p_public_key, uint8_t *p_private_key, uECC_Curve curve);
+
+#ifdef ENABLE_TESTS
+
+/**
+ * @brief Create a public/private key pair given a specific d.
+ *
+ * @note THIS FUNCTION SHOULD BE CALLED ONLY FOR TEST PURPOSES. Refer to
+ * uECC_make_key() function for real applications.
+ */
+int uECC_make_key_with_d(uint8_t *p_public_key, uint8_t *p_private_key,
+                         unsigned int *d, uECC_Curve curve);
+#endif
+
+/**
+ * @brief Compute a shared secret given your secret key and someone else's
+ * public key.
+ * @return returns TC_CRYPTO_SUCCESS (1) if the shared secret was computed successfully
+ *         returns TC_CRYPTO_FAIL (0) otherwise
+ *
+ * @param p_secret OUT -- Will be filled in with the shared secret value. Must be
+ * the same size as the curve size (for curve secp256r1, secret must be 32 bytes
+ * long.
+ * @param p_public_key IN -- The public key of the remote party.
+ * @param p_private_key IN -- Your private key.
+ *
+ * @warning It is recommended to use the output of uECC_shared_secret() as the
+ * input of a recommended Key Derivation Function (see NIST SP 800-108) in
+ * order to produce a cryptographically secure symmetric key.
+ */
+int uECC_shared_secret(const uint8_t *p_public_key, const uint8_t *p_private_key,
+                       uint8_t *p_secret, uECC_Curve curve);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_ECC_DH_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc_dsa.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc_dsa.h
new file mode 100644
index 00000000000..cfada859d32
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc_dsa.h
@@ -0,0 +1,139 @@
+/* ecc_dh.h - TinyCrypt interface to EC-DSA implementation */
+
+/*
+ * Copyright (c) 2014, Kenneth MacKay
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright notice, this
+ *   list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright notice,
+ *   this list of conditions and the following disclaimer in the documentation
+ *   and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief -- Interface to EC-DSA implementation.
+ *
+ *  Overview: This software is an implementation of EC-DSA. This implementation
+ *            uses curve NIST p-256.
+ *
+ *  Security: The curve NIST p-256 provides approximately 128 bits of security.
+ *
+ *  Usage:  - To sign: Compute a hash of the data you wish to sign (SHA-2 is
+ *          recommended) and pass it in to ecdsa_sign function along with your
+ *          private key and a random number. You must use a new non-predictable
+ *          random number to generate each new signature.
+ *          - To verify a signature: Compute the hash of the signed data using
+ *          the same hash as the signer and pass it to this function along with
+ *          the signer's public key and the signature values (r and s).
+ */
+
+#ifndef __BLE_MESH_TC_ECC_DSA_H__
+#define __BLE_MESH_TC_ECC_DSA_H__
+
+#include <tinycrypt/ecc.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Generate an ECDSA signature for a given hash value.
+ * @return returns TC_CRYPTO_SUCCESS (1) if the signature generated successfully
+ *         returns TC_CRYPTO_FAIL (0) if an error occurred.
+ *
+ * @param p_private_key IN -- Your private key.
+ * @param p_message_hash IN -- The hash of the message to sign.
+ * @param p_hash_size IN -- The size of p_message_hash in bytes.
+ * @param p_signature OUT -- Will be filled in with the signature value. Must be
+ * at least 2 * curve size long (for secp256r1, signature must be 64 bytes long).
+ *
+ * @warning A cryptographically-secure PRNG function must be set (using
+ * uECC_set_rng()) before calling uECC_sign().
+ * @note Usage: Compute a hash of the data you wish to sign (SHA-2 is
+ * recommended) and pass it in to this function along with your private key.
+ * @note side-channel countermeasure: algorithm strengthened against timing
+ * attack.
+ */
+int uECC_sign(const uint8_t *p_private_key, const uint8_t *p_message_hash,
+              unsigned p_hash_size, uint8_t *p_signature, uECC_Curve curve);
+
+#ifdef ENABLE_TESTS
+/*
+ * THIS FUNCTION SHOULD BE CALLED FOR TEST PURPOSES ONLY.
+ * Refer to uECC_sign() function for real applications.
+ */
+int uECC_sign_with_k(const uint8_t *private_key, const uint8_t *message_hash,
+                     unsigned int hash_size, uECC_word_t *k, uint8_t *signature,
+                     uECC_Curve curve);
+#endif
+
+/**
+ * @brief Verify an ECDSA signature.
+ * @return returns TC_SUCCESS (1) if the signature is valid
+ *     returns TC_FAIL (0) if the signature is invalid.
+ *
+ * @param p_public_key IN -- The signer's public key.
+ * @param p_message_hash IN -- The hash of the signed data.
+ * @param p_hash_size IN -- The size of p_message_hash in bytes.
+ * @param p_signature IN -- The signature values.
+ *
+ * @note Usage: Compute the hash of the signed data using the same hash as the
+ * signer and pass it to this function along with the signer's public key and
+ * the signature values (hash_size and signature).
+ */
+int uECC_verify(const uint8_t *p_public_key, const uint8_t *p_message_hash,
+                unsigned int p_hash_size, const uint8_t *p_signature, uECC_Curve curve);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_ECC_DSA_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc_platform_specific.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc_platform_specific.h
new file mode 100644
index 00000000000..972e5f7fee3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/ecc_platform_specific.h
@@ -0,0 +1,81 @@
+/*  uECC_platform_specific.h - Interface to platform specific functions*/
+
+/* Copyright (c) 2014, Kenneth MacKay
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  * Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.*/
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  uECC_platform_specific.h -- Interface to platform specific functions
+ */
+
+#ifndef __BLE_MESH_UECC_PLATFORM_SPECIFIC_H_
+#define __BLE_MESH_UECC_PLATFORM_SPECIFIC_H_
+
+/*
+ * The RNG function should fill 'size' random bytes into 'dest'. It should
+ * return 1 if 'dest' was filled with random data, or 0 if the random data could
+ * not be generated. The filled-in values should be either truly random, or from
+ * a cryptographically-secure PRNG.
+ *
+ * A cryptographically-secure PRNG function must be set (using uECC_set_rng())
+ * before calling uECC_make_key() or uECC_sign().
+ *
+ * Setting a cryptographically-secure PRNG function improves the resistance to
+ * side-channel attacks for uECC_shared_secret().
+ *
+ * A correct PRNG function is set by default (default_RNG_defined = 1) and works
+ * for some platforms, such as Unix and Linux. For other platforms, you may need
+ * to provide another PRNG function.
+*/
+#define default_RNG_defined 0
+
+int default_CSPRNG(uint8_t *dest, unsigned int size);
+
+#endif /* __BLE_MESH_UECC_PLATFORM_SPECIFIC_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/hmac.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/hmac.h
new file mode 100644
index 00000000000..cb399d8d5c7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/hmac.h
@@ -0,0 +1,139 @@
+/* hmac.h - TinyCrypt interface to an HMAC implementation */
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief Interface to an HMAC implementation.
+ *
+ *  Overview:   HMAC is a message authentication code based on hash functions.
+ *              TinyCrypt hard codes SHA-256 as the hash function. A message
+ *              authentication code based on hash functions is also called a
+ *              keyed cryptographic hash function since it performs a
+ *              transformation specified by a key in an arbitrary length data
+ *              set into a fixed length data set (also called tag).
+ *
+ *  Security:   The security of the HMAC depends on the length of the key and
+ *              on the security of the hash function. Note that HMAC primitives
+ *              are much less affected by collision attacks than their
+ *              corresponding hash functions.
+ *
+ *  Requires:   SHA-256
+ *
+ *  Usage:      1) call tc_hmac_set_key to set the HMAC key.
+ *
+ *              2) call tc_hmac_init to initialize a struct hash_state before
+ *              processing the data.
+ *
+ *              3) call tc_hmac_update to process the next input segment;
+ *              tc_hmac_update can be called as many times as needed to process
+ *              all of the segments of the input; the order is important.
+ *
+ *              4) call tc_hmac_final to out put the tag.
+ */
+
+#ifndef __BLE_MESH_TC_HMAC_H__
+#define __BLE_MESH_TC_HMAC_H__
+
+#include <tinycrypt/sha256.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct tc_hmac_state_struct {
+    /* the internal state required by h */
+    struct tc_sha256_state_struct hash_state;
+    /* HMAC key schedule */
+    uint8_t key[2 * TC_SHA256_BLOCK_SIZE];
+};
+typedef struct tc_hmac_state_struct *TCHmacState_t;
+
+/**
+ *  @brief HMAC set key procedure
+ *  Configures ctx to use key
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if
+ *                ctx == NULL or
+ *                key == NULL or
+ *                key_size == 0
+ * @param ctx IN/OUT -- the struct tc_hmac_state_struct to initial
+ * @param key IN -- the HMAC key to configure
+ * @param key_size IN -- the HMAC key size
+ */
+int tc_hmac_set_key(TCHmacState_t ctx, const uint8_t *key,
+                    unsigned int key_size);
+
+/**
+ * @brief HMAC init procedure
+ * Initializes ctx to begin the next HMAC operation
+ * @return returns TC_CRYPTO_SUCCESS (1)
+ *         returns TC_CRYPTO_FAIL (0) if: ctx == NULL or key == NULL
+ * @param ctx IN/OUT -- struct tc_hmac_state_struct buffer to init
+ */
+int tc_hmac_init(TCHmacState_t ctx);
+
+/**
+ *  @brief HMAC update procedure
+ *  Mixes data_length bytes addressed by data into state
+ *  @return returns TC_CRYPTO_SUCCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if: ctx == NULL or key == NULL
+ *  @note Assumes state has been initialized by tc_hmac_init
+ *  @param ctx IN/OUT -- state of HMAC computation so far
+ *  @param data IN -- data to incorporate into state
+ *  @param data_length IN -- size of data in bytes
+ */
+int tc_hmac_update(TCHmacState_t ctx, const void *data,
+                   unsigned int data_length);
+
+/**
+ *  @brief HMAC final procedure
+ *  Writes the HMAC tag into the tag buffer
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if:
+ *                tag == NULL or
+ *                ctx == NULL or
+ *                key == NULL or
+ *                taglen != TC_SHA256_DIGEST_SIZE
+ *  @note ctx is erased before exiting. This should never be changed/removed.
+ *  @note Assumes the tag bufer is at least sizeof(hmac_tag_size(state)) bytes
+ *  state has been initialized by tc_hmac_init
+ *  @param tag IN/OUT -- buffer to receive computed HMAC tag
+ *  @param taglen IN -- size of tag in bytes
+ *  @param ctx IN/OUT -- the HMAC state for computing tag
+ */
+int tc_hmac_final(uint8_t *tag, unsigned int taglen, TCHmacState_t ctx);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__BLE_MESH_TC_HMAC_H__*/
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/hmac_prng.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/hmac_prng.h
new file mode 100644
index 00000000000..f7f90010213
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/hmac_prng.h
@@ -0,0 +1,164 @@
+/* hmac_prng.h - TinyCrypt interface to an HMAC-PRNG implementation */
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief Interface to an HMAC-PRNG implementation.
+ *
+ *  Overview:   A pseudo-random number generator (PRNG) generates a sequence
+ *              of numbers that have a distribution close to the one expected
+ *              for a sequence of truly random numbers. The NIST Special
+ *              Publication 800-90A specifies several mechanisms to generate
+ *              sequences of pseudo random numbers, including the HMAC-PRNG one
+ *              which is based on HMAC. TinyCrypt implements HMAC-PRNG with
+ *              certain modifications from the NIST SP 800-90A spec.
+ *
+ *  Security:   A cryptographically secure PRNG depends on the existence of an
+ *              entropy source to provide a truly random seed as well as the
+ *              security of the primitives used as the building blocks (HMAC and
+ *              SHA256, for TinyCrypt).
+ *
+ *              The NIST SP 800-90A standard tolerates a null personalization,
+ *              while TinyCrypt requires a non-null personalization. This is
+ *              because a personalization string (the host name concatenated
+ *              with a time stamp, for example) is easily computed and might be
+ *              the last line of defense against failure of the entropy source.
+ *
+ *  Requires:   - SHA-256
+ *              - HMAC
+ *
+ *  Usage:      1) call tc_hmac_prng_init to set the HMAC key and process the
+ *              personalization data.
+ *
+ *              2) call tc_hmac_prng_reseed to process the seed and additional
+ *              input.
+ *
+ *              3) call tc_hmac_prng_generate to out put the pseudo-random data.
+ */
+
+#ifndef __BLE_MESH_TC_HMAC_PRNG_H__
+#define __BLE_MESH_TC_HMAC_PRNG_H__
+
+#include <tinycrypt/sha256.h>
+#include <tinycrypt/hmac.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define TC_HMAC_PRNG_RESEED_REQ -1
+
+struct tc_hmac_prng_struct {
+    /* the HMAC instance for this PRNG */
+    struct tc_hmac_state_struct h;
+    /* the PRNG key */
+    uint8_t key[TC_SHA256_DIGEST_SIZE];
+    /* PRNG state */
+    uint8_t v[TC_SHA256_DIGEST_SIZE];
+    /* calls to tc_hmac_prng_generate left before re-seed */
+    unsigned int countdown;
+};
+
+typedef struct tc_hmac_prng_struct *TCHmacPrng_t;
+
+/**
+ *  @brief HMAC-PRNG initialization procedure
+ *  Initializes prng with personalization, disables tc_hmac_prng_generate
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if:
+ *                prng == NULL,
+ *                personalization == NULL,
+ *                plen > MAX_PLEN
+ *  @note Assumes: - personalization != NULL.
+ *              The personalization is a platform unique string (e.g., the host
+ *              name) and is the last line of defense against failure of the
+ *              entropy source
+ *  @warning    NIST SP 800-90A specifies 3 items as seed material during
+ *              initialization: entropy seed, personalization, and an optional
+ *              nonce. TinyCrypts requires instead a non-null personalization
+ *              (which is easily computed) and indirectly requires an entropy
+ *              seed (since the reseed function is mandatorily called after
+ *              init)
+ *  @param prng IN/OUT -- the PRNG state to initialize
+ *  @param personalization IN -- personalization string
+ *  @param plen IN -- personalization length in bytes
+ */
+int tc_hmac_prng_init(TCHmacPrng_t prng,
+                      const uint8_t *personalization,
+                      unsigned int plen);
+
+/**
+ *  @brief HMAC-PRNG reseed procedure
+ *  Mixes seed into prng, enables tc_hmac_prng_generate
+ *  @return returns  TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if:
+ *          prng == NULL,
+ *          seed == NULL,
+ *          seedlen < MIN_SLEN,
+ *          seendlen > MAX_SLEN,
+ *          additional_input != (const uint8_t *) 0 && additionallen == 0,
+ *          additional_input != (const uint8_t *) 0 && additionallen > MAX_ALEN
+ *  @note Assumes:- tc_hmac_prng_init has been called for prng
+ *              - seed has sufficient entropy.
+ *
+ *  @param prng IN/OUT -- the PRNG state
+ *  @param seed IN -- entropy to mix into the prng
+ *  @param seedlen IN -- length of seed in bytes
+ *  @param additional_input IN -- additional input to the prng
+ *  @param additionallen IN -- additional input length in bytes
+ */
+int tc_hmac_prng_reseed(TCHmacPrng_t prng, const uint8_t *seed,
+                        unsigned int seedlen, const uint8_t *additional_input,
+                        unsigned int additionallen);
+
+/**
+ *  @brief HMAC-PRNG generate procedure
+ *  Generates outlen pseudo-random bytes into out buffer, updates prng
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_HMAC_PRNG_RESEED_REQ (-1) if a reseed is needed
+ *          returns TC_CRYPTO_FAIL (0) if:
+ *                out == NULL,
+ *                prng == NULL,
+ *                outlen == 0,
+ *                outlen >= MAX_OUT
+ *  @note Assumes tc_hmac_prng_init has been called for prng
+ *  @param out IN/OUT -- buffer to receive output
+ *  @param outlen IN -- size of out buffer in bytes
+ *  @param prng IN/OUT -- the PRNG state
+ */
+int tc_hmac_prng_generate(uint8_t *out, unsigned int outlen, TCHmacPrng_t prng);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_HMAC_PRNG_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/sha256.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/sha256.h
new file mode 100644
index 00000000000..c57cb00cad2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/sha256.h
@@ -0,0 +1,129 @@
+/* sha256.h - TinyCrypt interface to a SHA-256 implementation */
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief Interface to a SHA-256 implementation.
+ *
+ *  Overview:   SHA-256 is a NIST approved cryptographic hashing algorithm
+ *              specified in FIPS 180. A hash algorithm maps data of arbitrary
+ *              size to data of fixed length.
+ *
+ *  Security:   SHA-256 provides 128 bits of security against collision attacks
+ *              and 256 bits of security against pre-image attacks. SHA-256 does
+ *              NOT behave like a random oracle, but it can be used as one if
+ *              the string being hashed is prefix-free encoded before hashing.
+ *
+ *  Usage:      1) call tc_sha256_init to initialize a struct
+ *              tc_sha256_state_struct before hashing a new string.
+ *
+ *              2) call tc_sha256_update to hash the next string segment;
+ *              tc_sha256_update can be called as many times as needed to hash
+ *              all of the segments of a string; the order is important.
+ *
+ *              3) call tc_sha256_final to out put the digest from a hashing
+ *              operation.
+ */
+
+#ifndef __BLE_MESH_TC_SHA256_H__
+#define __BLE_MESH_TC_SHA256_H__
+
+#include <stddef.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define TC_SHA256_BLOCK_SIZE (64)
+#define TC_SHA256_DIGEST_SIZE (32)
+#define TC_SHA256_STATE_BLOCKS (TC_SHA256_DIGEST_SIZE/4)
+
+struct tc_sha256_state_struct {
+    unsigned int iv[TC_SHA256_STATE_BLOCKS];
+    uint64_t bits_hashed;
+    uint8_t leftover[TC_SHA256_BLOCK_SIZE];
+    size_t leftover_offset;
+};
+
+typedef struct tc_sha256_state_struct *TCSha256State_t;
+
+/**
+ *  @brief SHA256 initialization procedure
+ *  Initializes s
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if s == NULL
+ *  @param s Sha256 state struct
+ */
+int tc_sha256_init(TCSha256State_t s);
+
+/**
+ *  @brief SHA256 update procedure
+ *  Hashes data_length bytes addressed by data into state s
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if:
+ *                s == NULL,
+ *                s->iv == NULL,
+ *                data == NULL
+ *  @note Assumes s has been initialized by tc_sha256_init
+ *  @warning The state buffer 'leftover' is left in memory after processing
+ *           If your application intends to have sensitive data in this
+ *           buffer, remind to erase it after the data has been processed
+ *  @param s Sha256 state struct
+ *  @param data message to hash
+ *  @param datalen length of message to hash
+ */
+int tc_sha256_update (TCSha256State_t s, const uint8_t *data, size_t datalen);
+
+/**
+ *  @brief SHA256 final procedure
+ *  Inserts the completed hash computation into digest
+ *  @return returns TC_CRYPTO_SUCCESS (1)
+ *          returns TC_CRYPTO_FAIL (0) if:
+ *                s == NULL,
+ *                s->iv == NULL,
+ *                digest == NULL
+ *  @note Assumes: s has been initialized by tc_sha256_init
+ *        digest points to at least TC_SHA256_DIGEST_SIZE bytes
+ *  @warning The state buffer 'leftover' is left in memory after processing
+ *           If your application intends to have sensitive data in this
+ *           buffer, remind to erase it after the data has been processed
+ *  @param digest unsigned eight bit integer
+ *  @param Sha256 state struct
+ */
+int tc_sha256_final(uint8_t *digest, TCSha256State_t s);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_SHA256_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/utils.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/utils.h
new file mode 100644
index 00000000000..422892390fd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_common/tinycrypt/include/tinycrypt/utils.h
@@ -0,0 +1,121 @@
+/* utils.h - TinyCrypt interface to platform-dependent run-time operations */
+
+/*
+ *  Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *    - Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *    - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ *    - Neither the name of Intel Corporation nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief Interface to platform-dependent run-time operations.
+ *
+ */
+
+#ifndef __BLE_MESH_TC_UTILS_H__
+#define __BLE_MESH_TC_UTILS_H__
+
+#include <stdint.h>
+#include <stddef.h>
+#include <string.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Copy the the buffer 'from' to the buffer 'to'.
+ * @return returns TC_CRYPTO_SUCCESS (1)
+ *         returns TC_CRYPTO_FAIL (0) if:
+ *                from_len > to_len.
+ *
+ * @param to OUT -- destination buffer
+ * @param to_len IN -- length of destination buffer
+ * @param from IN -- origin buffer
+ * @param from_len IN -- length of origin buffer
+ */
+unsigned int _copy(uint8_t *to, unsigned int to_len,
+                   const uint8_t *from, unsigned int from_len);
+
+/**
+ * @brief Set the value 'val' into the buffer 'to', 'len' times.
+ *
+ * @param to OUT -- destination buffer
+ * @param val IN -- value to be set in 'to'
+ * @param len IN -- number of times the value will be copied
+ */
+void _set(void *to, uint8_t val, unsigned int len);
+
+/**
+ * @brief Set the value 'val' into the buffer 'to', 'len' times, in a way
+ *         which does not risk getting optimized out by the compiler
+ *        In cases where the compiler does not set __GNUC__ and where the
+ *         optimization level removes the memset, it may be necessary to
+ *         implement a _set_secure function and define the
+ *         TINYCRYPT_ARCH_HAS_SET_SECURE, which then can ensure that the
+ *         memset does not get optimized out.
+ *
+ * @param to OUT -- destination buffer
+ * @param val IN -- value to be set in 'to'
+ * @param len IN -- number of times the value will be copied
+ */
+#ifdef TINYCRYPT_ARCH_HAS_SET_SECURE
+extern void _set_secure(void *to, uint8_t val, unsigned int len);
+#else /* ! TINYCRYPT_ARCH_HAS_SET_SECURE */
+static inline void _set_secure(void *to, uint8_t val, unsigned int len)
+{
+    (void) memset(to, val, len);
+#ifdef __GNUC__
+    __asm__ __volatile__("" :: "g"(to) : "memory");
+#endif /* __GNUC__ */
+}
+#endif /* TINYCRYPT_ARCH_HAS_SET_SECURE */
+
+/*
+ * @brief AES specific doubling function, which utilizes
+ * the finite field used by AES.
+ * @return Returns a^2
+ *
+ * @param a IN/OUT -- value to be doubled
+ */
+uint8_t _double_byte(uint8_t a);
+
+/*
+ * @brief Constant-time algorithm to compare if two sequences of bytes are equal
+ * @return Returns 0 if equal, and non-zero otherwise
+ *
+ * @param a IN -- sequence of bytes a
+ * @param b IN -- sequence of bytes b
+ * @param size IN -- size of sequences a and b
+ */
+int _compare(const uint8_t *a, const uint8_t *b, size_t size);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BLE_MESH_TC_UTILS_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/access.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/access.h
new file mode 100644
index 00000000000..a74e0563920
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/access.h
@@ -0,0 +1,80 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ACCESS_H_
+#define _ACCESS_H_
+
+#include "net.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* bt_mesh_model.flags */
+enum {
+    BLE_MESH_MOD_BIND_PENDING = BIT(0),
+    BLE_MESH_MOD_SUB_PENDING = BIT(1),
+    BLE_MESH_MOD_PUB_PENDING = BIT(2),
+};
+
+void bt_mesh_elem_register(struct bt_mesh_elem *elem, uint8_t count);
+
+uint8_t bt_mesh_elem_count(void);
+
+/* Find local element based on unicast or group address */
+struct bt_mesh_elem *bt_mesh_elem_find(uint16_t addr);
+
+uint16_t *bt_mesh_model_find_group(struct bt_mesh_model *mod, uint16_t addr);
+
+bool bt_mesh_fixed_group_match(uint16_t addr);
+
+void bt_mesh_model_foreach(void (*func)(struct bt_mesh_model *mod,
+                                        struct bt_mesh_elem *elem,
+                                        bool vnd, bool primary,
+                                        void *user_data),
+                           void *user_data);
+
+int32_t bt_mesh_model_pub_period_get(struct bt_mesh_model *mod);
+
+void bt_mesh_comp_provision(uint16_t addr);
+void bt_mesh_comp_unprovision(void);
+
+uint16_t bt_mesh_primary_addr(void);
+
+const struct bt_mesh_comp *bt_mesh_comp_get(void);
+
+struct bt_mesh_model *bt_mesh_model_get(bool vnd, uint8_t elem_idx, uint8_t mod_idx);
+
+void bt_mesh_model_recv(struct bt_mesh_net_rx *rx, struct net_buf_simple *buf);
+
+int bt_mesh_comp_register(const struct bt_mesh_comp *comp);
+int bt_mesh_comp_deregister(void);
+
+struct bt_mesh_subnet *bt_mesh_tx_netkey_get(uint8_t role, uint16_t net_idx);
+
+const uint8_t *bt_mesh_tx_devkey_get(uint8_t role, uint16_t dst);
+
+struct bt_mesh_app_key *bt_mesh_tx_appkey_get(uint8_t role, uint16_t app_idx);
+
+size_t bt_mesh_rx_netkey_size(void);
+
+struct bt_mesh_subnet *bt_mesh_rx_netkey_get(size_t index);
+
+size_t bt_mesh_rx_devkey_size(void);
+
+const uint8_t *bt_mesh_rx_devkey_get(size_t index, uint16_t src);
+
+size_t bt_mesh_rx_appkey_size(void);
+
+struct bt_mesh_app_key *bt_mesh_rx_appkey_get(size_t index);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ACCESS_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/adv.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/adv.h
new file mode 100644
index 00000000000..27108c203a0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/adv.h
@@ -0,0 +1,102 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ADV_H_
+#define _ADV_H_
+
+#include "mesh_access.h"
+#include "mesh_bearer_adapt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Maximum advertising data payload for a single data type */
+#define BLE_MESH_ADV_DATA_SIZE 29
+
+/* The user data is a pointer (4 bytes) to struct bt_mesh_adv */
+#define BLE_MESH_ADV_USER_DATA_SIZE 4
+
+#define BLE_MESH_ADV(buf) (*(struct bt_mesh_adv **)net_buf_user_data(buf))
+
+typedef struct bt_mesh_msg {
+    bool  relay;        /* Flag indicates if the packet is a relayed one */
+    void *arg;          /* Pointer to the struct net_buf */
+    uint16_t src;       /* Source address for relay packets */
+    uint16_t dst;       /* Destination address for relay packets */
+    uint32_t timestamp; /* Timestamp recorded when the relay packet is posted to queue */
+} bt_mesh_msg_t;
+
+enum bt_mesh_adv_type {
+    BLE_MESH_ADV_PROV,
+    BLE_MESH_ADV_DATA,
+    BLE_MESH_ADV_BEACON,
+    BLE_MESH_ADV_URI,
+    BLE_MESH_ADV_BLE,
+};
+
+struct bt_mesh_adv {
+    const struct bt_mesh_send_cb *cb;
+    void *cb_data;
+
+    uint8_t type:3,
+            busy:1;
+    uint8_t xmit;
+};
+
+typedef struct bt_mesh_adv *(*bt_mesh_adv_alloc_t)(int id);
+
+/* xmit_count: Number of retransmissions, i.e. 0 == 1 transmission */
+struct net_buf *bt_mesh_adv_create(enum bt_mesh_adv_type type, uint8_t xmit,
+                                   int32_t timeout);
+
+typedef enum {
+    BLE_MESH_BUF_REF_EQUAL,
+    BLE_MESH_BUF_REF_SMALL,
+    BLE_MESH_BUF_REF_MAX,
+} bt_mesh_buf_ref_flag_t;
+
+void bt_mesh_adv_buf_ref_debug(const char *func, struct net_buf *buf,
+                               uint8_t ref_cmp, bt_mesh_buf_ref_flag_t flag);
+
+struct net_buf *bt_mesh_adv_create_from_pool(struct net_buf_pool *pool,
+                                             bt_mesh_adv_alloc_t get_id,
+                                             enum bt_mesh_adv_type type,
+                                             uint8_t xmit, int32_t timeout);
+
+void bt_mesh_unref_buf_from_pool(struct net_buf_pool *pool);
+
+void bt_mesh_adv_send(struct net_buf *buf, const struct bt_mesh_send_cb *cb,
+                      void *cb_data);
+
+struct net_buf *bt_mesh_relay_adv_create(enum bt_mesh_adv_type type, uint8_t xmit,
+                                         int32_t timeout);
+
+void bt_mesh_relay_adv_send(struct net_buf *buf, const struct bt_mesh_send_cb *cb,
+                            void *cb_data, uint16_t src, uint16_t dst);
+
+uint16_t bt_mesh_get_stored_relay_count(void);
+
+void bt_mesh_adv_update(void);
+
+void bt_mesh_adv_init(void);
+void bt_mesh_adv_deinit(void);
+
+#if CONFIG_BLE_MESH_SUPPORT_BLE_ADV
+int bt_mesh_start_ble_advertising(const struct bt_mesh_ble_adv_param *param,
+                                  const struct bt_mesh_ble_adv_data *data, uint8_t *index);
+
+int bt_mesh_stop_ble_advertising(uint8_t index);
+#endif /* CONFIG_BLE_MESH_SUPPORT_BLE_ADV */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ADV_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/beacon.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/beacon.h
new file mode 100644
index 00000000000..5e97b4cfe00
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/beacon.h
@@ -0,0 +1,35 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BEACON_H_
+#define _BEACON_H_
+
+#include "net.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void bt_mesh_beacon_enable(void);
+void bt_mesh_beacon_disable(void);
+
+void bt_mesh_beacon_ivu_initiator(bool enable);
+
+void bt_mesh_beacon_recv(struct net_buf_simple *buf, int8_t rssi);
+
+void bt_mesh_beacon_create(struct bt_mesh_subnet *sub,
+                           struct net_buf_simple *buf);
+
+void bt_mesh_beacon_init(void);
+void bt_mesh_beacon_deinit(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BEACON_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/crypto.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/crypto.h
new file mode 100644
index 00000000000..e8b3450728c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/crypto.h
@@ -0,0 +1,174 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _CRYPTO_H_
+#define _CRYPTO_H_
+
+#include <string.h>
+#include "mesh_buf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct bt_mesh_sg {
+    const void *data;
+    size_t len;
+};
+
+int bt_mesh_aes_cmac(const uint8_t key[16], struct bt_mesh_sg *sg,
+                     size_t sg_len, uint8_t mac[16]);
+
+static inline int bt_mesh_aes_cmac_one(const uint8_t key[16], const void *m,
+                                       size_t len, uint8_t mac[16])
+{
+    struct bt_mesh_sg sg = { m, len };
+
+    return bt_mesh_aes_cmac(key, &sg, 1, mac);
+}
+
+static inline bool bt_mesh_s1(const char *m, uint8_t salt[16])
+{
+    const uint8_t zero[16] = { 0 };
+
+    return bt_mesh_aes_cmac_one(zero, m, strlen(m), salt);
+}
+
+int bt_mesh_k1(const uint8_t *ikm, size_t ikm_len, const uint8_t salt[16],
+               const char *info, uint8_t okm[16]);
+
+#define bt_mesh_k1_str(ikm, ikm_len, salt_str, info, okm) \
+({ \
+    const uint8_t salt[16] = salt_str; \
+    bt_mesh_k1(ikm, ikm_len, salt, info, okm); \
+})
+
+int bt_mesh_k2(const uint8_t n[16], const uint8_t *p, size_t p_len,
+               uint8_t net_id[1], uint8_t enc_key[16], uint8_t priv_key[16]);
+
+int bt_mesh_k3(const uint8_t n[16], uint8_t out[8]);
+
+int bt_mesh_k4(const uint8_t n[16], uint8_t out[1]);
+
+int bt_mesh_id128(const uint8_t n[16], const char *s, uint8_t out[16]);
+
+static inline int bt_mesh_id_resolving_key(const uint8_t net_key[16],
+                                           uint8_t resolving_key[16])
+{
+    return bt_mesh_k1_str(net_key, 16, "smbt", "smbi", resolving_key);
+}
+
+static inline int bt_mesh_identity_key(const uint8_t net_key[16],
+                                       uint8_t identity_key[16])
+{
+    return bt_mesh_id128(net_key, "nkik", identity_key);
+}
+
+static inline int bt_mesh_beacon_key(const uint8_t net_key[16],
+                                     uint8_t beacon_key[16])
+{
+    return bt_mesh_id128(net_key, "nkbk", beacon_key);
+}
+
+int bt_mesh_beacon_auth(const uint8_t beacon_key[16], uint8_t flags,
+                        const uint8_t net_id[16], uint32_t iv_index,
+                        uint8_t auth[8]);
+
+static inline int bt_mesh_app_id(const uint8_t app_key[16], uint8_t app_id[1])
+{
+    return bt_mesh_k4(app_key, app_id);
+}
+
+static inline int bt_mesh_session_key(const uint8_t dhkey[32],
+                                      const uint8_t prov_salt[16],
+                                      uint8_t session_key[16])
+{
+    return bt_mesh_k1(dhkey, 32, prov_salt, "prsk", session_key);
+}
+
+static inline int bt_mesh_prov_nonce(const uint8_t dhkey[32],
+                                     const uint8_t prov_salt[16],
+                                     uint8_t nonce[13])
+{
+    uint8_t tmp[16];
+    int err;
+
+    err = bt_mesh_k1(dhkey, 32, prov_salt, "prsn", tmp);
+    if (!err) {
+        memcpy(nonce, tmp + 3, 13);
+    }
+
+    return err;
+}
+
+static inline int bt_mesh_dev_key(const uint8_t dhkey[32],
+                                  const uint8_t prov_salt[16],
+                                  uint8_t dev_key[16])
+{
+    return bt_mesh_k1(dhkey, 32, prov_salt, "prdk", dev_key);
+}
+
+static inline int bt_mesh_prov_salt(const uint8_t conf_salt[16],
+                                    const uint8_t prov_rand[16],
+                                    const uint8_t dev_rand[16],
+                                    uint8_t prov_salt[16])
+{
+    const uint8_t prov_salt_key[16] = { 0 };
+    struct bt_mesh_sg sg[] = {
+        { conf_salt, 16 },
+        { prov_rand, 16 },
+        { dev_rand, 16 },
+    };
+
+    return bt_mesh_aes_cmac(prov_salt_key, sg, ARRAY_SIZE(sg), prov_salt);
+}
+
+int bt_mesh_net_obfuscate(uint8_t *pdu, uint32_t iv_index,
+                          const uint8_t privacy_key[16]);
+
+int bt_mesh_net_encrypt(const uint8_t key[16], struct net_buf_simple *buf,
+                        uint32_t iv_index, bool proxy);
+
+int bt_mesh_net_decrypt(const uint8_t key[16], struct net_buf_simple *buf,
+                        uint32_t iv_index, bool proxy);
+
+int bt_mesh_app_encrypt(const uint8_t key[16], bool dev_key, uint8_t aszmic,
+                        struct net_buf_simple *buf, const uint8_t *ad,
+                        uint16_t src, uint16_t dst, uint32_t seq_num, uint32_t iv_index);
+
+int bt_mesh_app_decrypt(const uint8_t key[16], bool dev_key, uint8_t aszmic,
+                        struct net_buf_simple *buf, struct net_buf_simple *out,
+                        const uint8_t *ad, uint16_t src, uint16_t dst, uint32_t seq_num,
+                        uint32_t iv_index);
+
+uint8_t bt_mesh_fcs_calc(const uint8_t *data, uint8_t data_len);
+
+bool bt_mesh_fcs_check(struct net_buf_simple *buf, uint8_t received_fcs);
+
+int bt_mesh_virtual_addr(const uint8_t virtual_label[16], uint16_t *addr);
+
+int bt_mesh_prov_conf_salt(const uint8_t conf_inputs[145], uint8_t salt[16]);
+
+int bt_mesh_prov_conf_key(const uint8_t dhkey[32], const uint8_t conf_salt[16],
+                          uint8_t conf_key[16]);
+
+int bt_mesh_prov_conf(const uint8_t conf_key[16], const uint8_t rand[16],
+                      const uint8_t auth[16], uint8_t conf[16]);
+
+int bt_mesh_prov_decrypt(const uint8_t key[16], uint8_t nonce[13],
+                         const uint8_t data[25 + 8], uint8_t out[25]);
+
+int bt_mesh_prov_encrypt(const uint8_t key[16], uint8_t nonce[13],
+                         const uint8_t data[25], uint8_t out[33]);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _CRYPTO_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/fast_prov.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/fast_prov.h
new file mode 100644
index 00000000000..69bea4402f4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/fast_prov.h
@@ -0,0 +1,36 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _FAST_PROV_H_
+#define _FAST_PROV_H_
+
+#include "net.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+const uint8_t *bt_mesh_fast_prov_dev_key_get(uint16_t dst);
+
+struct bt_mesh_subnet *bt_mesh_fast_prov_subnet_get(uint16_t net_idx);
+
+struct bt_mesh_app_key *bt_mesh_fast_prov_app_key_find(uint16_t app_idx);
+
+uint8_t bt_mesh_set_fast_prov_net_idx(uint16_t net_idx);
+
+uint8_t bt_mesh_fast_prov_net_key_add(const uint8_t net_key[16]);
+
+const uint8_t *bt_mesh_fast_prov_net_key_get(uint16_t net_idx);
+
+const uint8_t *bt_mesh_get_fast_prov_app_key(uint16_t net_idx, uint16_t app_idx);
+
+uint8_t bt_mesh_set_fast_prov_action(uint8_t action);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _FAST_PROV_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/foundation.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/foundation.h
new file mode 100644
index 00000000000..3855d93fb6f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/foundation.h
@@ -0,0 +1,183 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _FOUNDATION_H_
+#define _FOUNDATION_H_
+
+#include "mesh_byteorder.h"
+#include "net.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define OP_APP_KEY_ADD                     BLE_MESH_MODEL_OP_1(0x00)
+#define OP_APP_KEY_UPDATE                  BLE_MESH_MODEL_OP_1(0x01)
+#define OP_DEV_COMP_DATA_STATUS            BLE_MESH_MODEL_OP_1(0x02)
+#define OP_MOD_PUB_SET                     BLE_MESH_MODEL_OP_1(0x03)
+#define OP_HEALTH_CURRENT_STATUS           BLE_MESH_MODEL_OP_1(0x04)
+#define OP_HEALTH_FAULT_STATUS             BLE_MESH_MODEL_OP_1(0x05)
+#define OP_HEARTBEAT_PUB_STATUS            BLE_MESH_MODEL_OP_1(0x06)
+#define OP_APP_KEY_DEL                     BLE_MESH_MODEL_OP_2(0x80, 0x00)
+#define OP_APP_KEY_GET                     BLE_MESH_MODEL_OP_2(0x80, 0x01)
+#define OP_APP_KEY_LIST                    BLE_MESH_MODEL_OP_2(0x80, 0x02)
+#define OP_APP_KEY_STATUS                  BLE_MESH_MODEL_OP_2(0x80, 0x03)
+#define OP_ATTENTION_GET                   BLE_MESH_MODEL_OP_2(0x80, 0x04)
+#define OP_ATTENTION_SET                   BLE_MESH_MODEL_OP_2(0x80, 0x05)
+#define OP_ATTENTION_SET_UNREL             BLE_MESH_MODEL_OP_2(0x80, 0x06)
+#define OP_ATTENTION_STATUS                BLE_MESH_MODEL_OP_2(0x80, 0x07)
+#define OP_DEV_COMP_DATA_GET               BLE_MESH_MODEL_OP_2(0x80, 0x08)
+#define OP_BEACON_GET                      BLE_MESH_MODEL_OP_2(0x80, 0x09)
+#define OP_BEACON_SET                      BLE_MESH_MODEL_OP_2(0x80, 0x0a)
+#define OP_BEACON_STATUS                   BLE_MESH_MODEL_OP_2(0x80, 0x0b)
+#define OP_DEFAULT_TTL_GET                 BLE_MESH_MODEL_OP_2(0x80, 0x0c)
+#define OP_DEFAULT_TTL_SET                 BLE_MESH_MODEL_OP_2(0x80, 0x0d)
+#define OP_DEFAULT_TTL_STATUS              BLE_MESH_MODEL_OP_2(0x80, 0x0e)
+#define OP_FRIEND_GET                      BLE_MESH_MODEL_OP_2(0x80, 0x0f)
+#define OP_FRIEND_SET                      BLE_MESH_MODEL_OP_2(0x80, 0x10)
+#define OP_FRIEND_STATUS                   BLE_MESH_MODEL_OP_2(0x80, 0x11)
+#define OP_GATT_PROXY_GET                  BLE_MESH_MODEL_OP_2(0x80, 0x12)
+#define OP_GATT_PROXY_SET                  BLE_MESH_MODEL_OP_2(0x80, 0x13)
+#define OP_GATT_PROXY_STATUS               BLE_MESH_MODEL_OP_2(0x80, 0x14)
+#define OP_KRP_GET                         BLE_MESH_MODEL_OP_2(0x80, 0x15)
+#define OP_KRP_SET                         BLE_MESH_MODEL_OP_2(0x80, 0x16)
+#define OP_KRP_STATUS                      BLE_MESH_MODEL_OP_2(0x80, 0x17)
+#define OP_MOD_PUB_GET                     BLE_MESH_MODEL_OP_2(0x80, 0x18)
+#define OP_MOD_PUB_STATUS                  BLE_MESH_MODEL_OP_2(0x80, 0x19)
+#define OP_MOD_PUB_VA_SET                  BLE_MESH_MODEL_OP_2(0x80, 0x1a)
+#define OP_MOD_SUB_ADD                     BLE_MESH_MODEL_OP_2(0x80, 0x1b)
+#define OP_MOD_SUB_DEL                     BLE_MESH_MODEL_OP_2(0x80, 0x1c)
+#define OP_MOD_SUB_DEL_ALL                 BLE_MESH_MODEL_OP_2(0x80, 0x1d)
+#define OP_MOD_SUB_OVERWRITE               BLE_MESH_MODEL_OP_2(0x80, 0x1e)
+#define OP_MOD_SUB_STATUS                  BLE_MESH_MODEL_OP_2(0x80, 0x1f)
+#define OP_MOD_SUB_VA_ADD                  BLE_MESH_MODEL_OP_2(0x80, 0x20)
+#define OP_MOD_SUB_VA_DEL                  BLE_MESH_MODEL_OP_2(0x80, 0x21)
+#define OP_MOD_SUB_VA_OVERWRITE            BLE_MESH_MODEL_OP_2(0x80, 0x22)
+#define OP_NET_TRANSMIT_GET                BLE_MESH_MODEL_OP_2(0x80, 0x23)
+#define OP_NET_TRANSMIT_SET                BLE_MESH_MODEL_OP_2(0x80, 0x24)
+#define OP_NET_TRANSMIT_STATUS             BLE_MESH_MODEL_OP_2(0x80, 0x25)
+#define OP_RELAY_GET                       BLE_MESH_MODEL_OP_2(0x80, 0x26)
+#define OP_RELAY_SET                       BLE_MESH_MODEL_OP_2(0x80, 0x27)
+#define OP_RELAY_STATUS                    BLE_MESH_MODEL_OP_2(0x80, 0x28)
+#define OP_MOD_SUB_GET                     BLE_MESH_MODEL_OP_2(0x80, 0x29)
+#define OP_MOD_SUB_LIST                    BLE_MESH_MODEL_OP_2(0x80, 0x2a)
+#define OP_MOD_SUB_GET_VND                 BLE_MESH_MODEL_OP_2(0x80, 0x2b)
+#define OP_MOD_SUB_LIST_VND                BLE_MESH_MODEL_OP_2(0x80, 0x2c)
+#define OP_LPN_TIMEOUT_GET                 BLE_MESH_MODEL_OP_2(0x80, 0x2d)
+#define OP_LPN_TIMEOUT_STATUS              BLE_MESH_MODEL_OP_2(0x80, 0x2e)
+#define OP_HEALTH_FAULT_CLEAR              BLE_MESH_MODEL_OP_2(0x80, 0x2f)
+#define OP_HEALTH_FAULT_CLEAR_UNREL        BLE_MESH_MODEL_OP_2(0x80, 0x30)
+#define OP_HEALTH_FAULT_GET                BLE_MESH_MODEL_OP_2(0x80, 0x31)
+#define OP_HEALTH_FAULT_TEST               BLE_MESH_MODEL_OP_2(0x80, 0x32)
+#define OP_HEALTH_FAULT_TEST_UNREL         BLE_MESH_MODEL_OP_2(0x80, 0x33)
+#define OP_HEALTH_PERIOD_GET               BLE_MESH_MODEL_OP_2(0x80, 0x34)
+#define OP_HEALTH_PERIOD_SET               BLE_MESH_MODEL_OP_2(0x80, 0x35)
+#define OP_HEALTH_PERIOD_SET_UNREL         BLE_MESH_MODEL_OP_2(0x80, 0x36)
+#define OP_HEALTH_PERIOD_STATUS            BLE_MESH_MODEL_OP_2(0x80, 0x37)
+#define OP_HEARTBEAT_PUB_GET               BLE_MESH_MODEL_OP_2(0x80, 0x38)
+#define OP_HEARTBEAT_PUB_SET               BLE_MESH_MODEL_OP_2(0x80, 0x39)
+#define OP_HEARTBEAT_SUB_GET               BLE_MESH_MODEL_OP_2(0x80, 0x3a)
+#define OP_HEARTBEAT_SUB_SET               BLE_MESH_MODEL_OP_2(0x80, 0x3b)
+#define OP_HEARTBEAT_SUB_STATUS            BLE_MESH_MODEL_OP_2(0x80, 0x3c)
+#define OP_MOD_APP_BIND                    BLE_MESH_MODEL_OP_2(0x80, 0x3d)
+#define OP_MOD_APP_STATUS                  BLE_MESH_MODEL_OP_2(0x80, 0x3e)
+#define OP_MOD_APP_UNBIND                  BLE_MESH_MODEL_OP_2(0x80, 0x3f)
+#define OP_NET_KEY_ADD                     BLE_MESH_MODEL_OP_2(0x80, 0x40)
+#define OP_NET_KEY_DEL                     BLE_MESH_MODEL_OP_2(0x80, 0x41)
+#define OP_NET_KEY_GET                     BLE_MESH_MODEL_OP_2(0x80, 0x42)
+#define OP_NET_KEY_LIST                    BLE_MESH_MODEL_OP_2(0x80, 0x43)
+#define OP_NET_KEY_STATUS                  BLE_MESH_MODEL_OP_2(0x80, 0x44)
+#define OP_NET_KEY_UPDATE                  BLE_MESH_MODEL_OP_2(0x80, 0x45)
+#define OP_NODE_IDENTITY_GET               BLE_MESH_MODEL_OP_2(0x80, 0x46)
+#define OP_NODE_IDENTITY_SET               BLE_MESH_MODEL_OP_2(0x80, 0x47)
+#define OP_NODE_IDENTITY_STATUS            BLE_MESH_MODEL_OP_2(0x80, 0x48)
+#define OP_NODE_RESET                      BLE_MESH_MODEL_OP_2(0x80, 0x49)
+#define OP_NODE_RESET_STATUS               BLE_MESH_MODEL_OP_2(0x80, 0x4a)
+#define OP_SIG_MOD_APP_GET                 BLE_MESH_MODEL_OP_2(0x80, 0x4b)
+#define OP_SIG_MOD_APP_LIST                BLE_MESH_MODEL_OP_2(0x80, 0x4c)
+#define OP_VND_MOD_APP_GET                 BLE_MESH_MODEL_OP_2(0x80, 0x4d)
+#define OP_VND_MOD_APP_LIST                BLE_MESH_MODEL_OP_2(0x80, 0x4e)
+
+#define STATUS_SUCCESS                     0x00
+#define STATUS_INVALID_ADDRESS             0x01
+#define STATUS_INVALID_MODEL               0x02
+#define STATUS_INVALID_APPKEY              0x03
+#define STATUS_INVALID_NETKEY              0x04
+#define STATUS_INSUFF_RESOURCES            0x05
+#define STATUS_IDX_ALREADY_STORED          0x06
+#define STATUS_NVAL_PUB_PARAM              0x07
+#define STATUS_NOT_SUB_MOD                 0x08
+#define STATUS_STORAGE_FAIL                0x09
+#define STATUS_FEAT_NOT_SUPP               0x0a
+#define STATUS_CANNOT_UPDATE               0x0b
+#define STATUS_CANNOT_REMOVE               0x0c
+#define STATUS_CANNOT_BIND                 0x0d
+#define STATUS_TEMP_STATE_CHG_FAIL         0x0e
+#define STATUS_CANNOT_SET                  0x0f
+#define STATUS_UNSPECIFIED                 0x10
+#define STATUS_INVALID_BINDING             0x11
+
+enum {
+    BLE_MESH_VA_CHANGED,    /* Label information changed */
+};
+
+struct label {
+    uint16_t ref;
+    uint16_t addr;
+    uint8_t  uuid[16];
+    bt_mesh_atomic_t flags[1];
+};
+
+void bt_mesh_mod_sub_reset(bool store);
+
+void bt_mesh_cfg_reset(bool store);
+
+void bt_mesh_heartbeat(uint16_t src, uint16_t dst, uint8_t hops, uint16_t feat);
+
+void bt_mesh_attention(struct bt_mesh_model *model, uint8_t time);
+
+struct label *get_label(uint16_t index);
+
+uint8_t *bt_mesh_label_uuid_get(uint16_t addr);
+
+struct bt_mesh_hb_pub *bt_mesh_hb_pub_get(void);
+void bt_mesh_hb_pub_disable(void);
+struct bt_mesh_cfg_srv *bt_mesh_cfg_get(void);
+
+uint8_t bt_mesh_net_transmit_get(void);
+uint8_t bt_mesh_relay_get(void);
+uint8_t bt_mesh_friend_get(void);
+uint8_t bt_mesh_relay_retransmit_get(void);
+uint8_t bt_mesh_beacon_get(void);
+uint8_t bt_mesh_gatt_proxy_get(void);
+uint8_t bt_mesh_default_ttl_get(void);
+
+void bt_mesh_subnet_del(struct bt_mesh_subnet *sub, bool store);
+
+struct bt_mesh_app_key *bt_mesh_app_key_alloc(uint16_t app_idx);
+void bt_mesh_app_key_del(struct bt_mesh_app_key *key, bool store);
+
+static inline void key_idx_pack(struct net_buf_simple *buf,
+                                uint16_t idx1, uint16_t idx2)
+{
+    net_buf_simple_add_le16(buf, idx1 | ((idx2 & 0x00f) << 12));
+    net_buf_simple_add_u8(buf, idx2 >> 4);
+}
+
+static inline void key_idx_unpack(struct net_buf_simple *buf,
+                                  uint16_t *idx1, uint16_t *idx2)
+{
+    *idx1 = sys_get_le16(&buf->data[0]) & 0xfff;
+    *idx2 = sys_get_le16(&buf->data[1]) >> 4;
+    net_buf_simple_pull(buf, 3);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _FOUNDATION_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/friend.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/friend.h
new file mode 100644
index 00000000000..2855081bf57
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/friend.h
@@ -0,0 +1,67 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _FRIEND_H_
+#define _FRIEND_H_
+
+#include "net.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum bt_mesh_friend_pdu_type {
+    BLE_MESH_FRIEND_PDU_SINGLE,
+    BLE_MESH_FRIEND_PDU_PARTIAL,
+    BLE_MESH_FRIEND_PDU_COMPLETE,
+};
+
+bool bt_mesh_friend_match(uint16_t net_idx, uint16_t addr);
+
+struct bt_mesh_friend *bt_mesh_friend_find(uint16_t net_idx, uint16_t lpn_addr,
+                                           bool valid, bool established);
+
+bool bt_mesh_friend_queue_has_space(uint16_t net_idx, uint16_t src, uint16_t dst,
+                                    const uint64_t *seq_auth, uint8_t seg_count);
+
+void bt_mesh_friend_enqueue_rx(struct bt_mesh_net_rx *rx,
+                               enum bt_mesh_friend_pdu_type type,
+                               const uint64_t *seq_auth, uint8_t seg_count,
+                               struct net_buf_simple *sbuf);
+bool bt_mesh_friend_enqueue_tx(struct bt_mesh_net_tx *tx,
+                               enum bt_mesh_friend_pdu_type type,
+                               const uint64_t *seq_auth, uint8_t seg_count,
+                               struct net_buf_simple *sbuf);
+
+void bt_mesh_friend_clear_incomplete(struct bt_mesh_subnet *sub, uint16_t src,
+                                     uint16_t dst, const uint64_t *seq_auth);
+
+void bt_mesh_friend_sec_update(uint16_t net_idx);
+
+void bt_mesh_friend_clear_net_idx(uint16_t net_idx);
+
+int bt_mesh_friend_poll(struct bt_mesh_net_rx *rx, struct net_buf_simple *buf);
+int bt_mesh_friend_req(struct bt_mesh_net_rx *rx, struct net_buf_simple *buf);
+int bt_mesh_friend_clear(struct bt_mesh_net_rx *rx, struct net_buf_simple *buf);
+int bt_mesh_friend_clear_cfm(struct bt_mesh_net_rx *rx,
+                             struct net_buf_simple *buf);
+int bt_mesh_friend_sub_add(struct bt_mesh_net_rx *rx,
+                           struct net_buf_simple *buf);
+int bt_mesh_friend_sub_rem(struct bt_mesh_net_rx *rx,
+                           struct net_buf_simple *buf);
+
+int bt_mesh_friend_init(void);
+int bt_mesh_friend_deinit(void);
+
+void bt_mesh_friend_remove_lpn(uint16_t lpn_addr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _FRIEND_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/cfg_cli.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/cfg_cli.h
new file mode 100644
index 00000000000..02ff566dd92
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/cfg_cli.h
@@ -0,0 +1,318 @@
+/** @file
+ *  @brief Bluetooth Mesh Configuration Client Model APIs.
+ */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _BLE_MESH_CFG_CLI_H_
+#define _BLE_MESH_CFG_CLI_H_
+
+#include "client_common.h"
+
+/**
+ * @brief Bluetooth Mesh
+ * @defgroup bt_mesh_cfg_cli Bluetooth Mesh Configuration Client Model
+ * @ingroup bt_mesh
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Config client model common structure */
+typedef bt_mesh_client_user_data_t      bt_mesh_config_client_t;
+typedef bt_mesh_client_internal_data_t  config_internal_data_t;
+
+extern const struct bt_mesh_model_op bt_mesh_cfg_cli_op[];
+extern const struct bt_mesh_model_cb bt_mesh_cfg_cli_cb;
+
+#define BLE_MESH_MODEL_CFG_CLI(cli_data)            \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_CFG_CLI,   \
+            bt_mesh_cfg_cli_op, NULL, cli_data, &bt_mesh_cfg_cli_cb)
+
+int bt_mesh_cfg_comp_data_get(bt_mesh_client_common_param_t *param, uint8_t page);
+
+int bt_mesh_cfg_beacon_get(bt_mesh_client_common_param_t *param);
+
+int bt_mesh_cfg_beacon_set(bt_mesh_client_common_param_t *param, uint8_t val);
+
+int bt_mesh_cfg_ttl_get(bt_mesh_client_common_param_t *param);
+
+int bt_mesh_cfg_ttl_set(bt_mesh_client_common_param_t *param, uint8_t val);
+
+int bt_mesh_cfg_friend_get(bt_mesh_client_common_param_t *param);
+
+int bt_mesh_cfg_friend_set(bt_mesh_client_common_param_t *param, uint8_t val);
+
+int bt_mesh_cfg_gatt_proxy_get(bt_mesh_client_common_param_t *param);
+
+int bt_mesh_cfg_gatt_proxy_set(bt_mesh_client_common_param_t *param, uint8_t val);
+
+int bt_mesh_cfg_relay_get(bt_mesh_client_common_param_t *param);
+
+int bt_mesh_cfg_relay_set(bt_mesh_client_common_param_t *param,
+                          uint8_t relay, uint8_t retransmit);
+
+int bt_mesh_cfg_net_key_add(bt_mesh_client_common_param_t *param,
+                            uint16_t net_idx, const uint8_t net_key[16]);
+
+int bt_mesh_cfg_app_key_add(bt_mesh_client_common_param_t *param,
+                            uint16_t net_idx, uint16_t app_idx,
+                            const uint8_t app_key[16]);
+
+int bt_mesh_cfg_mod_app_bind(bt_mesh_client_common_param_t *param,
+                             uint16_t elem_addr, uint16_t app_idx,
+                             uint16_t mod_id, uint16_t cid);
+
+struct bt_mesh_cfg_mod_pub {
+    uint16_t addr;
+    uint16_t app_idx;
+    bool     cred_flag;
+    uint8_t  ttl;
+    uint8_t  period;
+    uint8_t  transmit;
+};
+
+int bt_mesh_cfg_mod_pub_get(bt_mesh_client_common_param_t *param,
+                            uint16_t elem_addr, uint16_t mod_id, uint16_t cid);
+
+int bt_mesh_cfg_mod_pub_set(bt_mesh_client_common_param_t *param,
+                            uint16_t elem_addr, uint16_t mod_id, uint16_t cid,
+                            struct bt_mesh_cfg_mod_pub *pub);
+
+int bt_mesh_cfg_mod_sub_add(bt_mesh_client_common_param_t *param,
+                            uint16_t elem_addr, uint16_t sub_addr,
+                            uint16_t mod_id, uint16_t cid);
+
+int bt_mesh_cfg_mod_sub_del(bt_mesh_client_common_param_t *param,
+                            uint16_t elem_addr, uint16_t sub_addr,
+                            uint16_t mod_id, uint16_t cid);
+
+int bt_mesh_cfg_mod_sub_overwrite(bt_mesh_client_common_param_t *param,
+                                  uint16_t elem_addr, uint16_t sub_addr,
+                                  uint16_t mod_id, uint16_t cid);
+
+int bt_mesh_cfg_mod_sub_va_add(bt_mesh_client_common_param_t *param,
+                               uint16_t elem_addr, const uint8_t label[16],
+                               uint16_t mod_id, uint16_t cid);
+
+int bt_mesh_cfg_mod_sub_va_del(bt_mesh_client_common_param_t *param,
+                               uint16_t elem_addr, const uint8_t label[16],
+                               uint16_t mod_id, uint16_t cid);
+
+int bt_mesh_cfg_mod_sub_va_overwrite(bt_mesh_client_common_param_t *param,
+                                     uint16_t elem_addr, const uint8_t label[16],
+                                     uint16_t mod_id, uint16_t cid);
+
+struct bt_mesh_cfg_hb_sub {
+    uint16_t src;
+    uint16_t dst;
+    uint8_t  period;
+};
+
+int bt_mesh_cfg_hb_sub_set(bt_mesh_client_common_param_t *param,
+                           struct bt_mesh_cfg_hb_sub *sub);
+
+int bt_mesh_cfg_hb_sub_get(bt_mesh_client_common_param_t *param);
+
+struct bt_mesh_cfg_hb_pub {
+    uint16_t dst;
+    uint8_t  count;
+    uint8_t  period;
+    uint8_t  ttl;
+    uint16_t feat;
+    uint16_t net_idx;
+};
+
+int bt_mesh_cfg_hb_pub_set(bt_mesh_client_common_param_t *param,
+                           struct bt_mesh_cfg_hb_pub *pub);
+
+int bt_mesh_cfg_hb_pub_get(bt_mesh_client_common_param_t *param);
+
+int bt_mesh_cfg_node_reset(bt_mesh_client_common_param_t *param);
+
+/* Configuration Client Status Message Context */
+
+struct bt_mesh_cfg_comp_data_status {
+    uint8_t page;
+    struct net_buf_simple *comp_data;
+};
+
+struct bt_mesh_cfg_relay_status {
+    uint8_t relay;
+    uint8_t retransmit;
+};
+
+struct bt_mesh_cfg_netkey_status {
+    uint8_t  status;
+    uint16_t net_idx;
+};
+
+struct bt_mesh_cfg_appkey_status {
+    uint8_t  status;
+    uint16_t net_idx;
+    uint16_t app_idx;
+};
+
+struct bt_mesh_cfg_mod_app_status {
+    uint8_t  status;
+    uint16_t elem_addr;
+    uint16_t app_idx;
+    uint16_t cid;
+    uint16_t mod_id;
+};
+
+struct bt_mesh_cfg_mod_pub_status {
+    uint8_t  status;
+    uint16_t elem_addr;
+    uint16_t addr;
+    uint16_t app_idx;
+    bool     cred_flag;
+    uint8_t  ttl;
+    uint8_t  period;
+    uint8_t  transmit;
+    uint16_t cid;
+    uint16_t mod_id;
+};
+
+struct bt_mesh_cfg_mod_sub_status {
+    uint8_t  status;
+    uint16_t elem_addr;
+    uint16_t sub_addr;
+    uint16_t cid;
+    uint16_t mod_id;
+};
+
+struct bt_mesh_cfg_hb_sub_status {
+    uint8_t  status;
+    uint16_t src;
+    uint16_t dst;
+    uint8_t  period;
+    uint8_t  count;
+    uint8_t  min;
+    uint8_t  max;
+};
+
+struct bt_mesh_cfg_hb_pub_status {
+    uint8_t  status;
+    uint16_t dst;
+    uint8_t  count;
+    uint8_t  period;
+    uint8_t  ttl;
+    uint16_t feat;
+    uint16_t net_idx;
+};
+
+struct bt_mesh_cfg_mod_sub_list {
+    uint8_t  status;
+    uint16_t elem_addr;
+    uint16_t cid;
+    uint16_t mod_id;
+    struct net_buf_simple *addr;
+};
+
+struct bt_mesh_cfg_net_key_list {
+    struct net_buf_simple *net_idx;
+};
+
+struct bt_mesh_cfg_app_key_list {
+    uint8_t  status;
+    uint16_t net_idx;
+    struct net_buf_simple *app_idx;
+};
+
+struct bt_mesh_cfg_node_id_status {
+    uint8_t  status;
+    uint16_t net_idx;
+    uint8_t  identity;
+};
+
+struct bt_mesh_cfg_mod_app_list {
+    uint8_t  status;
+    uint16_t elem_addr;
+    uint16_t cid;
+    uint16_t mod_id;
+    struct net_buf_simple *app_idx;
+};
+
+struct bt_mesh_cfg_key_refresh_status {
+    uint8_t  status;
+    uint16_t net_idx;
+    uint8_t  phase;
+};
+
+struct bt_mesh_cfg_lpn_pollto_status {
+    uint16_t lpn_addr;
+    int32_t  timeout;
+};
+
+int bt_mesh_cfg_mod_pub_va_set(bt_mesh_client_common_param_t *param,
+                               uint16_t elem_addr, uint16_t mod_id,
+                               uint16_t cid, const uint8_t label[16],
+                               struct bt_mesh_cfg_mod_pub *pub);
+
+int bt_mesh_cfg_mod_sub_del_all(bt_mesh_client_common_param_t *param,
+                                uint16_t elem_addr, uint16_t mod_id, uint16_t cid);
+
+int bt_mesh_cfg_mod_sub_get(bt_mesh_client_common_param_t *param,
+                            uint16_t elem_addr, uint16_t mod_id);
+
+int bt_mesh_cfg_mod_sub_get_vnd(bt_mesh_client_common_param_t *param,
+                                uint16_t elem_addr, uint16_t mod_id, uint16_t cid);
+
+int bt_mesh_cfg_net_key_update(bt_mesh_client_common_param_t *param,
+                               uint16_t net_idx, const uint8_t net_key[16]);
+
+int bt_mesh_cfg_net_key_delete(bt_mesh_client_common_param_t *param, uint16_t net_idx);
+
+int bt_mesh_cfg_net_key_get(bt_mesh_client_common_param_t *param);
+
+int bt_mesh_cfg_app_key_update(bt_mesh_client_common_param_t *param,
+                               uint16_t net_idx, uint16_t app_idx,
+                               const uint8_t app_key[16]);
+
+int bt_mesh_cfg_app_key_delete(bt_mesh_client_common_param_t *param,
+                               uint16_t net_idx, uint16_t app_idx);
+
+int bt_mesh_cfg_app_key_get(bt_mesh_client_common_param_t *param, uint16_t net_idx);
+
+int bt_mesh_cfg_node_identity_get(bt_mesh_client_common_param_t *param, uint16_t net_idx);
+
+int bt_mesh_cfg_node_identity_set(bt_mesh_client_common_param_t *param,
+                                  uint16_t net_idx, uint8_t identity);
+
+int bt_mesh_cfg_mod_app_unbind(bt_mesh_client_common_param_t *param,
+                               uint16_t elem_addr, uint16_t app_idx,
+                               uint16_t mod_id, uint16_t cid);
+
+int bt_mesh_cfg_mod_app_get(bt_mesh_client_common_param_t *param,
+                            uint16_t elem_addr, uint16_t mod_id);
+
+int bt_mesh_cfg_mod_app_get_vnd(bt_mesh_client_common_param_t *param,
+                                uint16_t elem_addr, uint16_t mod_id, uint16_t cid);
+
+int bt_mesh_cfg_kr_phase_get(bt_mesh_client_common_param_t *param, uint16_t net_idx);
+
+int bt_mesh_cfg_kr_phase_set(bt_mesh_client_common_param_t *param,
+                             uint16_t net_idx, uint8_t transition);
+
+int bt_mesh_cfg_lpn_timeout_get(bt_mesh_client_common_param_t *param, uint16_t lpn_addr);
+
+int bt_mesh_cfg_net_transmit_get(bt_mesh_client_common_param_t *param);
+
+int bt_mesh_cfg_net_transmit_set(bt_mesh_client_common_param_t *param, uint8_t transmit);
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* __BLE_MESH_CFG_CLI_H */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/cfg_srv.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/cfg_srv.h
new file mode 100644
index 00000000000..41b9a6236f5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/cfg_srv.h
@@ -0,0 +1,223 @@
+/** @file
+ *  @brief Bluetooth Mesh Configuration Server Model APIs.
+ */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _BLE_MESH_CFG_SRV_H_
+#define _BLE_MESH_CFG_SRV_H_
+
+#include "mesh_access.h"
+
+/**
+ * @brief Bluetooth Mesh
+ * @defgroup bt_mesh_cfg_srv Bluetooth Mesh Configuration Server Model
+ * @ingroup bt_mesh
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Mesh Configuration Server Model Context */
+struct bt_mesh_cfg_srv {
+    struct bt_mesh_model *model;
+
+    uint8_t net_transmit;      /* Network Transmit state */
+    uint8_t relay;             /* Relay Mode state */
+    uint8_t relay_retransmit;  /* Relay Retransmit state */
+    uint8_t beacon;            /* Secure Network Beacon state */
+    uint8_t gatt_proxy;        /* GATT Proxy state */
+    uint8_t frnd;              /* Friend state */
+    uint8_t default_ttl;       /* Default TTL */
+
+    /* Heartbeat Publication */
+    struct bt_mesh_hb_pub {
+        struct k_delayed_work timer;
+
+        uint16_t dst;
+        uint16_t count;
+        uint8_t  period;
+        uint8_t  ttl;
+        uint16_t feat;
+        uint16_t net_idx;
+    } hb_pub;
+
+    /* Heartbeat Subscription */
+    struct bt_mesh_hb_sub {
+        int64_t  expiry;
+
+        uint16_t src;
+        uint16_t dst;
+        uint16_t count;
+        uint8_t  min_hops;
+        uint8_t  max_hops;
+
+        /* Optional subscription tracking function */
+        void (*func)(uint8_t hops, uint16_t feat);
+    } hb_sub;
+};
+
+extern const struct bt_mesh_model_op bt_mesh_cfg_srv_op[];
+extern const struct bt_mesh_model_cb bt_mesh_cfg_srv_cb;
+
+#define BLE_MESH_MODEL_CFG_SRV(srv_data)            \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_CFG_SRV,   \
+            bt_mesh_cfg_srv_op, NULL, srv_data, &bt_mesh_cfg_srv_cb)
+
+typedef union {
+    struct {
+        uint8_t beacon;
+    } cfg_beacon_set;
+    struct {
+        uint8_t ttl;
+    } cfg_default_ttl_set;
+    struct {
+        uint8_t gatt_proxy;
+    } cfg_gatt_proxy_set;
+    struct {
+        uint8_t relay;
+        uint8_t retransmit;
+    } cfg_relay_set;
+    struct {
+        uint16_t elem_addr;
+        uint16_t pub_addr;
+        uint16_t app_idx;
+        bool  cred_flag;
+        uint8_t  ttl;
+        uint8_t  period;
+        uint8_t  transmit;
+        uint16_t cid;
+        uint16_t mod_id;
+    } cfg_mod_pub_set;
+    struct {
+        uint16_t elem_addr;
+        uint8_t  pub_addr[16];
+        uint16_t app_idx;
+        bool  cred_flag;
+        uint8_t  ttl;
+        uint8_t  period;
+        uint8_t  transmit;
+        uint16_t cid;
+        uint16_t mod_id;
+    } cfg_mod_pub_va_set;
+    struct {
+        uint16_t elem_addr;
+        uint16_t sub_addr;
+        uint16_t cid;
+        uint16_t mod_id;
+    } cfg_mod_sub_add;
+    struct {
+        uint16_t elem_addr;
+        uint8_t  sub_addr[16];
+        uint16_t cid;
+        uint16_t mod_id;
+    } cfg_mod_sub_va_add;
+    struct {
+        uint16_t elem_addr;
+        uint16_t sub_addr;
+        uint16_t cid;
+        uint16_t mod_id;
+    } cfg_mod_sub_delete;
+    struct {
+        uint16_t elem_addr;
+        uint8_t  sub_addr[16];
+        uint16_t cid;
+        uint16_t mod_id;
+    } cfg_mod_sub_va_delete;
+    struct {
+        uint16_t elem_addr;
+        uint16_t sub_addr;
+        uint16_t cid;
+        uint16_t mod_id;
+    } cfg_mod_sub_overwrite;
+    struct {
+        uint16_t elem_addr;
+        uint8_t  sub_addr[16];
+        uint16_t cid;
+        uint16_t mod_id;
+    } cfg_mod_sub_va_overwrite;
+    struct {
+        uint16_t elem_addr;
+        uint16_t cid;
+        uint16_t mod_id;
+    } cfg_mod_sub_delete_all;
+    struct {
+        uint16_t net_idx;
+        uint8_t  net_key[16];
+    } cfg_netkey_add;
+    struct {
+        uint16_t net_idx;
+        uint8_t  net_key[16];
+    } cfg_netkey_update;
+    struct {
+        uint16_t net_idx;
+    } cfg_netkey_delete;
+    struct {
+        uint16_t net_idx;
+        uint16_t app_idx;
+        uint8_t  app_key[16];
+    } cfg_appkey_add;
+    struct {
+        uint16_t net_idx;
+        uint16_t app_idx;
+        uint8_t  app_key[16];
+    } cfg_appkey_update;
+    struct {
+        uint16_t net_idx;
+        uint16_t app_idx;
+    } cfg_appkey_delete;
+    struct {
+        uint16_t net_idx;
+        uint8_t  identity;
+    } cfg_node_identity_set;
+    struct {
+        uint16_t elem_addr;
+        uint16_t app_idx;
+        uint16_t cid;
+        uint16_t mod_id;
+    } cfg_mod_app_bind;
+    struct {
+        uint16_t elem_addr;
+        uint16_t app_idx;
+        uint16_t cid;
+        uint16_t mod_id;
+    } cfg_mod_app_unbind;
+    struct {
+        uint8_t frnd;
+    } cfg_friend_set;
+    struct {
+        uint16_t net_idx;
+        uint8_t  kr_phase;
+    } cfg_kr_phase_set;
+    struct {
+        uint16_t dst;
+        uint8_t  count;
+        uint8_t  period;
+        uint8_t  ttl;
+        uint16_t feat;
+        uint16_t net_idx;
+    } cfg_hb_pub_set;
+    struct {
+        uint16_t src;
+        uint16_t dst;
+        uint8_t  period;
+    } cfg_hb_sub_set;
+    struct {
+        uint8_t transmit;
+    } cfg_net_transmit_set;
+} bt_mesh_cfg_server_state_change_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* __BLE_MESH_CFG_SRV_H */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/health_cli.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/health_cli.h
new file mode 100644
index 00000000000..239e14cbede
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/health_cli.h
@@ -0,0 +1,78 @@
+/** @file
+ *  @brief Bluetooth Mesh Health Client Model APIs.
+ */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _BLE_MESH_HEALTH_CLI_H_
+#define _BLE_MESH_HEALTH_CLI_H_
+
+#include "client_common.h"
+
+/**
+ * @brief Bluetooth Mesh
+ * @defgroup bt_mesh_health_cli Bluetooth Mesh Health Client Model
+ * @ingroup bt_mesh
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Health client model common structure */
+typedef bt_mesh_client_user_data_t      bt_mesh_health_client_t;
+typedef bt_mesh_client_internal_data_t  health_internal_data_t;
+
+extern const struct bt_mesh_model_op bt_mesh_health_cli_op[];
+extern const struct bt_mesh_model_cb bt_mesh_health_cli_cb;
+
+#define BLE_MESH_MODEL_HEALTH_CLI(cli_data)             \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_HEALTH_CLI,    \
+            bt_mesh_health_cli_op, NULL, cli_data, &bt_mesh_health_cli_cb)
+
+int bt_mesh_health_fault_get(bt_mesh_client_common_param_t *param, uint16_t cid);
+
+int bt_mesh_health_fault_clear(bt_mesh_client_common_param_t *param,
+                               uint16_t cid, bool need_ack);
+
+int bt_mesh_health_fault_test(bt_mesh_client_common_param_t *param,
+                              uint16_t cid, uint8_t test_id, bool need_ack);
+
+int bt_mesh_health_period_get(bt_mesh_client_common_param_t *param);
+
+int bt_mesh_health_period_set(bt_mesh_client_common_param_t *param,
+                              uint8_t divisor, bool need_ack);
+
+int bt_mesh_health_attention_get(bt_mesh_client_common_param_t *param);
+
+int bt_mesh_health_attention_set(bt_mesh_client_common_param_t *param,
+                                 uint8_t attention, bool need_ack);
+
+/* Health Client Status Message Context */
+
+struct bt_mesh_health_current_status {
+    uint8_t  test_id;
+    uint16_t cid;
+    struct net_buf_simple *fault_array;
+};
+
+struct bt_mesh_health_fault_status {
+    uint8_t  test_id;
+    uint16_t cid;
+    struct net_buf_simple *fault_array;
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* __BLE_MESH_HEALTH_CLI_H */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/health_srv.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/health_srv.h
new file mode 100644
index 00000000000..35a61b8258f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/health_srv.h
@@ -0,0 +1,106 @@
+/** @file
+ *  @brief Bluetooth Mesh Health Server Model APIs.
+ */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _BLE_MESH_HEALTH_SRV_H_
+#define _BLE_MESH_HEALTH_SRV_H_
+
+#include "mesh_access.h"
+
+/**
+ * @brief Bluetooth Mesh Health Server Model
+ * @defgroup bt_mesh_health_srv Bluetooth Mesh Health Server Model
+ * @ingroup bt_mesh
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct bt_mesh_health_srv_cb {
+    /* Clear registered faults */
+    void (*fault_clear)(struct bt_mesh_model *model, uint16_t company_id);
+
+    /* Run a specific test */
+    void (*fault_test)(struct bt_mesh_model *model, uint8_t test_id,
+                       uint16_t company_id);
+
+    /* Attention on */
+    void (*attn_on)(struct bt_mesh_model *model, uint8_t time);
+
+    /* Attention off */
+    void (*attn_off)(struct bt_mesh_model *model);
+};
+
+/** @def BLE_MESH_HEALTH_PUB_DEFINE
+ *
+ *  A helper to define a health publication context
+ *
+ *  @param _name Name given to the publication context variable.
+ *  @param _max_faults Maximum number of faults the element can have.
+ */
+#define BLE_MESH_HEALTH_PUB_DEFINE(_name, _max_faults) \
+    BLE_MESH_MODEL_PUB_DEFINE(_name, NULL, (1 + 3 + (_max_faults)))
+
+struct bt_mesh_health_test {
+    uint8_t  id_count;         /* Number of Health self-test ID */
+    const uint8_t *test_ids;   /* Array of Health self-test IDs */
+    uint16_t company_id;       /* Company ID used to identify the Health Fault state */
+    uint8_t  prev_test_id;     /* Most currently performed test id */
+    uint8_t  curr_faults[32];  /* Array of current faults */
+    uint8_t  reg_faults[32];   /* Array of registered faults */
+} __attribute__((packed));
+
+/** Mesh Health Server Model Context */
+struct bt_mesh_health_srv {
+    struct bt_mesh_model *model;
+
+    /* Optional callback struct */
+    struct bt_mesh_health_srv_cb cb;
+
+    /* Attention Timer state */
+    struct k_delayed_work attn_timer;
+
+    /* Attention Timer start flag */
+    bool attn_timer_start;
+
+    /* Health Server fault test */
+    struct bt_mesh_health_test test;
+};
+
+extern const struct bt_mesh_model_op bt_mesh_health_srv_op[];
+extern const struct bt_mesh_model_cb bt_mesh_health_srv_cb;
+
+/** @def BLE_MESH_MODEL_HEALTH_SRV
+ *
+ *  Define a new health server model. Note that this API needs to be
+ *  repeated for each element which the application wants to have a
+ *  health server model on. Each instance also needs a unique
+ *  bt_mesh_health_srv and bt_mesh_model_pub context.
+ *
+ *  @param srv Pointer to a unique struct bt_mesh_health_srv.
+ *  @param pub Pointer to a unique struct bt_mesh_model_pub.
+ *
+ *  @return New mesh model instance.
+ */
+#define BLE_MESH_MODEL_HEALTH_SRV(srv, pub)             \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_HEALTH_SRV,    \
+            bt_mesh_health_srv_op, pub, srv, &bt_mesh_health_srv_cb)
+
+int bt_mesh_fault_update(struct bt_mesh_elem *elem);
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* __BLE_MESH_HEALTH_SRV_H */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_access.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_access.h
new file mode 100644
index 00000000000..66fbb7e43fb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_access.h
@@ -0,0 +1,601 @@
+/** @file
+ *  @brief Bluetooth Mesh Access Layer APIs.
+ */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _BLE_MESH_ACCESS_H_
+#define _BLE_MESH_ACCESS_H_
+
+#include "mesh_config.h"
+#include "mesh_buf.h"
+#include "mesh_timer.h"
+
+/**
+ * @brief Bluetooth Mesh Access Layer
+ * @defgroup bt_mesh_access Bluetooth Mesh Access Layer
+ * @ingroup bt_mesh
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BLE_MESH_CID_NVAL          0xFFFF
+
+#define BLE_MESH_ADDR_UNASSIGNED   0x0000
+#define BLE_MESH_ADDR_ALL_NODES    0xffff
+#define BLE_MESH_ADDR_PROXIES      0xfffc
+#define BLE_MESH_ADDR_FRIENDS      0xfffd
+#define BLE_MESH_ADDR_RELAYS       0xfffe
+
+#define BLE_MESH_KEY_UNUSED        0xffff
+#define BLE_MESH_KEY_DEV           0xfffe
+
+/** Helper to define a mesh element within an array.
+ *
+ *  In case the element has no SIG or Vendor models the helper
+ *  macro BLE_MESH_MODEL_NONE can be given instead.
+ *
+ *  @param _loc       Location Descriptor.
+ *  @param _mods      Array of models.
+ *  @param _vnd_mods  Array of vendor models.
+ */
+#define BLE_MESH_ELEM(_loc, _mods, _vnd_mods)   \
+{                                               \
+    .loc              = (_loc),                 \
+    .model_count      = ARRAY_SIZE(_mods),      \
+    .models           = (_mods),                \
+    .vnd_model_count  = ARRAY_SIZE(_vnd_mods),  \
+    .vnd_models       = (_vnd_mods),            \
+}
+
+/** Abstraction that describes a Mesh Element */
+struct bt_mesh_elem {
+    /* Unicast Address. Set at runtime during provisioning. */
+    uint16_t addr;
+
+    /* Location Descriptor (GATT Bluetooth Namespace Descriptors) */
+    const uint16_t loc;
+
+    const uint8_t model_count;
+    const uint8_t vnd_model_count;
+
+    struct bt_mesh_model *const models;
+    struct bt_mesh_model *const vnd_models;
+};
+
+/* Foundation Models */
+#define BLE_MESH_MODEL_ID_CFG_SRV                   0x0000
+#define BLE_MESH_MODEL_ID_CFG_CLI                   0x0001
+#define BLE_MESH_MODEL_ID_HEALTH_SRV                0x0002
+#define BLE_MESH_MODEL_ID_HEALTH_CLI                0x0003
+
+/* Models from the Mesh Model Specification */
+#define BLE_MESH_MODEL_ID_GEN_ONOFF_SRV             0x1000
+#define BLE_MESH_MODEL_ID_GEN_ONOFF_CLI             0x1001
+#define BLE_MESH_MODEL_ID_GEN_LEVEL_SRV             0x1002
+#define BLE_MESH_MODEL_ID_GEN_LEVEL_CLI             0x1003
+#define BLE_MESH_MODEL_ID_GEN_DEF_TRANS_TIME_SRV    0x1004
+#define BLE_MESH_MODEL_ID_GEN_DEF_TRANS_TIME_CLI    0x1005
+#define BLE_MESH_MODEL_ID_GEN_POWER_ONOFF_SRV       0x1006
+#define BLE_MESH_MODEL_ID_GEN_POWER_ONOFF_SETUP_SRV 0x1007
+#define BLE_MESH_MODEL_ID_GEN_POWER_ONOFF_CLI       0x1008
+#define BLE_MESH_MODEL_ID_GEN_POWER_LEVEL_SRV       0x1009
+#define BLE_MESH_MODEL_ID_GEN_POWER_LEVEL_SETUP_SRV 0x100a
+#define BLE_MESH_MODEL_ID_GEN_POWER_LEVEL_CLI       0x100b
+#define BLE_MESH_MODEL_ID_GEN_BATTERY_SRV           0x100c
+#define BLE_MESH_MODEL_ID_GEN_BATTERY_CLI           0x100d
+#define BLE_MESH_MODEL_ID_GEN_LOCATION_SRV          0x100e
+#define BLE_MESH_MODEL_ID_GEN_LOCATION_SETUP_SRV    0x100f
+#define BLE_MESH_MODEL_ID_GEN_LOCATION_CLI          0x1010
+#define BLE_MESH_MODEL_ID_GEN_ADMIN_PROP_SRV        0x1011
+#define BLE_MESH_MODEL_ID_GEN_MANUFACTURER_PROP_SRV 0x1012
+#define BLE_MESH_MODEL_ID_GEN_USER_PROP_SRV         0x1013
+#define BLE_MESH_MODEL_ID_GEN_CLIENT_PROP_SRV       0x1014
+#define BLE_MESH_MODEL_ID_GEN_PROP_CLI              0x1015
+#define BLE_MESH_MODEL_ID_SENSOR_SRV                0x1100
+#define BLE_MESH_MODEL_ID_SENSOR_SETUP_SRV          0x1101
+#define BLE_MESH_MODEL_ID_SENSOR_CLI                0x1102
+#define BLE_MESH_MODEL_ID_TIME_SRV                  0x1200
+#define BLE_MESH_MODEL_ID_TIME_SETUP_SRV            0x1201
+#define BLE_MESH_MODEL_ID_TIME_CLI                  0x1202
+#define BLE_MESH_MODEL_ID_SCENE_SRV                 0x1203
+#define BLE_MESH_MODEL_ID_SCENE_SETUP_SRV           0x1204
+#define BLE_MESH_MODEL_ID_SCENE_CLI                 0x1205
+#define BLE_MESH_MODEL_ID_SCHEDULER_SRV             0x1206
+#define BLE_MESH_MODEL_ID_SCHEDULER_SETUP_SRV       0x1207
+#define BLE_MESH_MODEL_ID_SCHEDULER_CLI             0x1208
+#define BLE_MESH_MODEL_ID_LIGHT_LIGHTNESS_SRV       0x1300
+#define BLE_MESH_MODEL_ID_LIGHT_LIGHTNESS_SETUP_SRV 0x1301
+#define BLE_MESH_MODEL_ID_LIGHT_LIGHTNESS_CLI       0x1302
+#define BLE_MESH_MODEL_ID_LIGHT_CTL_SRV             0x1303
+#define BLE_MESH_MODEL_ID_LIGHT_CTL_SETUP_SRV       0x1304
+#define BLE_MESH_MODEL_ID_LIGHT_CTL_CLI             0x1305
+#define BLE_MESH_MODEL_ID_LIGHT_CTL_TEMP_SRV        0x1306
+#define BLE_MESH_MODEL_ID_LIGHT_HSL_SRV             0x1307
+#define BLE_MESH_MODEL_ID_LIGHT_HSL_SETUP_SRV       0x1308
+#define BLE_MESH_MODEL_ID_LIGHT_HSL_CLI             0x1309
+#define BLE_MESH_MODEL_ID_LIGHT_HSL_HUE_SRV         0x130a
+#define BLE_MESH_MODEL_ID_LIGHT_HSL_SAT_SRV         0x130b
+#define BLE_MESH_MODEL_ID_LIGHT_XYL_SRV             0x130c
+#define BLE_MESH_MODEL_ID_LIGHT_XYL_SETUP_SRV       0x130d
+#define BLE_MESH_MODEL_ID_LIGHT_XYL_CLI             0x130e
+#define BLE_MESH_MODEL_ID_LIGHT_LC_SRV              0x130f
+#define BLE_MESH_MODEL_ID_LIGHT_LC_SETUP_SRV        0x1310
+#define BLE_MESH_MODEL_ID_LIGHT_LC_CLI              0x1311
+
+/** Message sending context. */
+struct bt_mesh_msg_ctx {
+    /** NetKey Index of the subnet to send the message on. */
+    uint16_t net_idx;
+
+    /** AppKey Index to encrypt the message with. */
+    uint16_t app_idx;
+
+    /** Remote address. */
+    uint16_t addr;
+
+    /** Destination address of a received message. Not used for sending. */
+    uint16_t recv_dst;
+
+    /** RSSI of received packet. Not used for sending. */
+    int8_t  recv_rssi;
+
+    /** Received TTL value. Not used for sending. */
+    uint8_t  recv_ttl: 7;
+
+    /** Force sending reliably by using segment acknowledgement */
+    uint8_t  send_rel: 1;
+
+    /** TTL, or BLE_MESH_TTL_DEFAULT for default TTL. */
+    uint8_t  send_ttl;
+
+    /** Change by Espressif, opcode of a received message.
+     *  Not used for sending message. */
+    uint32_t recv_op;
+
+    /** Change by Espressif, model corresponds to the message */
+    struct bt_mesh_model *model;
+
+    /** Change by Espressif, if the message is sent by a server
+     *  model. Not used for receiving message. */
+    bool srv_send;
+};
+
+struct bt_mesh_model_op {
+    /* OpCode encoded using the BLE_MESH_MODEL_OP_* macros */
+    const uint32_t  opcode;
+
+    /* Minimum required message length */
+    const size_t min_len;
+
+    /* Message handler for the opcode */
+    void (*const func)(struct bt_mesh_model *model,
+                       struct bt_mesh_msg_ctx *ctx,
+                       struct net_buf_simple *buf);
+};
+
+#define BLE_MESH_MODEL_OP_1(b0)         (b0)
+#define BLE_MESH_MODEL_OP_2(b0, b1)     (((b0) << 8) | (b1))
+#define BLE_MESH_MODEL_OP_3(b0, cid)    ((((b0) << 16) | 0xc00000) | (cid))
+
+#define BLE_MESH_MODEL_OP_END           { 0, 0, NULL }
+#define BLE_MESH_MODEL_NO_OPS           ((struct bt_mesh_model_op []) \
+                                        { BLE_MESH_MODEL_OP_END })
+
+/** Helper to define an empty model array */
+#define BLE_MESH_MODEL_NONE             ((struct bt_mesh_model []){})
+
+/** Length of a short Mesh MIC. */
+#define BLE_MESH_MIC_SHORT              4
+/** Length of a long Mesh MIC. */
+#define BLE_MESH_MIC_LONG               8
+
+/** @def BLE_MESH_MODEL_OP_LEN
+ *
+ * @brief Helper to determine the length of an opcode.
+ *
+ * @param _op Opcode.
+ */
+#define BLE_MESH_MODEL_OP_LEN(_op) ((_op) <= 0xff ? 1 : (_op) <= 0xffff ? 2 : 3)
+
+/** @def BLE_MESH_MODEL_BUF_LEN
+ *
+ * @brief Helper for model message buffer length.
+ *
+ * Returns the length of a Mesh model message buffer, including the opcode
+ * length and a short MIC.
+ *
+ * @param _op Opcode of the message.
+ * @param _payload_len Length of the model payload.
+ */
+#define BLE_MESH_MODEL_BUF_LEN(_op, _payload_len)                \
+        (BLE_MESH_MODEL_OP_LEN(_op) + (_payload_len) + BLE_MESH_MIC_SHORT)
+
+/** @def BLE_MESH_MODEL_BUF_LEN_LONG_MIC
+ *
+ * @brief Helper for model message buffer length.
+ *
+ * Returns the length of a Mesh model message buffer, including the opcode
+ * length and a long MIC.
+ *
+ * @param _op Opcode of the message.
+ * @param _payload_len Length of the model payload.
+ */
+#define BLE_MESH_MODEL_BUF_LEN_LONG_MIC(_op, _payload_len)       \
+        (BLE_MESH_MODEL_OP_LEN(_op) + (_payload_len) + BLE_MESH_MIC_LONG)
+
+/** @def BLE_MESH_MODEL_BUF_DEFINE
+ *
+ * @brief Define a Mesh model message buffer using @ref NET_BUF_SIMPLE_DEFINE.
+ *
+ * @param _buf Buffer name.
+ * @param _op Opcode of the message.
+ * @param _payload_len Length of the model message payload.
+ */
+#define BLE_MESH_MODEL_BUF_DEFINE(_buf, _op, _payload_len)       \
+        NET_BUF_SIMPLE_DEFINE(_buf, BLE_MESH_MODEL_BUF_LEN((_op), (_payload_len)))
+
+/** @def BLE_MESH_MODEL_CB
+ *
+ *  @brief Composition data SIG model entry with callback functions.
+ *
+ *  @param _id        Model ID.
+ *  @param _op        Array of model opcode handlers.
+ *  @param _pub       Model publish parameters.
+ *  @param _user_data User data for the model.
+ *  @param _cb        Callback structure, or NULL to keep no callbacks.
+ */
+#define BLE_MESH_MODEL_CB(_id, _op, _pub, _user_data, _cb)          \
+{                                                                   \
+    .id = (_id),                                                    \
+    .op = (_op),                                                    \
+    .keys = { [0 ... (CONFIG_BLE_MESH_MODEL_KEY_COUNT - 1)] =       \
+            BLE_MESH_KEY_UNUSED },                                  \
+    .pub = (_pub),                                                  \
+    .groups = { [0 ... (CONFIG_BLE_MESH_MODEL_GROUP_COUNT - 1)] =   \
+            BLE_MESH_ADDR_UNASSIGNED },                             \
+    .user_data = (_user_data),                                      \
+    .cb = (_cb),                                                    \
+}
+
+/** @def BLE_MESH_MODEL_VND_CB
+ *
+ *  @brief Composition data vendor model entry with callback functions.
+ *
+ *  @param _company   Company ID.
+ *  @param _id        Model ID.
+ *  @param _op        Array of model opcode handlers.
+ *  @param _pub       Model publish parameters.
+ *  @param _user_data User data for the model.
+ *  @param _cb        Callback structure, or NULL to keep no callbacks.
+ */
+#define BLE_MESH_MODEL_VND_CB(_company, _id, _op, _pub, _user_data, _cb) \
+{                                                                   \
+    .vnd.company = (_company),                                      \
+    .vnd.id = (_id),                                                \
+    .op = (_op),                                                    \
+    .pub = (_pub),                                                  \
+    .keys = { [0 ... (CONFIG_BLE_MESH_MODEL_KEY_COUNT - 1)] =       \
+            BLE_MESH_KEY_UNUSED },                                  \
+    .groups = { [0 ... (CONFIG_BLE_MESH_MODEL_GROUP_COUNT - 1)] =   \
+            BLE_MESH_ADDR_UNASSIGNED },                             \
+    .user_data = (_user_data),                                      \
+    .cb = (_cb),                                                    \
+}
+
+/** @def BLE_MESH_TRANSMIT
+ *
+ *  @brief Encode transmission count & interval steps.
+ *
+ *  @param count   Number of retransmissions (first transmission is excluded).
+ *  @param int_ms  Interval steps in milliseconds. Must be greater than 0
+ *                 and a multiple of 10.
+ *
+ *  @return Mesh transmit value that can be used e.g. for the default
+ *          values of the configuration model data.
+ */
+#define BLE_MESH_TRANSMIT(count, int_ms) ((count) | ((((int_ms) / 10) - 1) << 3))
+
+/** @def BLE_MESH_TRANSMIT_COUNT
+ *
+ *  @brief Decode transmit count from a transmit value.
+ *
+ *  @param transmit Encoded transmit count & interval value.
+ *
+ *  @return Transmission count (actual transmissions is N + 1).
+ */
+#define BLE_MESH_TRANSMIT_COUNT(transmit) (((transmit) & (uint8_t)BIT_MASK(3)))
+
+/** @def BLE_MESH_TRANSMIT_INT
+ *
+ *  @brief Decode transmit interval from a transmit value.
+ *
+ *  @param transmit Encoded transmit count & interval value.
+ *
+ *  @return Transmission interval in milliseconds.
+ */
+#define BLE_MESH_TRANSMIT_INT(transmit) ((((transmit) >> 3) + 1) * 10)
+
+/** @def BLE_MESH_PUB_TRANSMIT
+ *
+ *  @brief Encode Publish Retransmit count & interval steps.
+ *
+ *  @param count   Number of retransmissions (first transmission is excluded).
+ *  @param int_ms  Interval steps in milliseconds. Must be greater than 0
+ *                 and a multiple of 50.
+ *
+ *  @return Mesh transmit value that can be used e.g. for the default
+ *          values of the configuration model data.
+ */
+#define BLE_MESH_PUB_TRANSMIT(count, int_ms) BLE_MESH_TRANSMIT((count), (int_ms) / 5)
+
+/** @def BLE_MESH_PUB_TRANSMIT_COUNT
+ *
+ *  @brief Decode Publish Retransmit count from a given value.
+ *
+ *  @param transmit Encoded Publish Retransmit count & interval value.
+ *
+ *  @return Retransmission count (actual transmissions is N + 1).
+ */
+#define BLE_MESH_PUB_TRANSMIT_COUNT(transmit) BLE_MESH_TRANSMIT_COUNT(transmit)
+
+/** @def BLE_MESH_PUB_TRANSMIT_INT
+ *
+ *  @brief Decode Publish Retransmit interval from a given value.
+ *
+ *  @param transmit Encoded Publish Retransmit count & interval value.
+ *
+ *  @return Transmission interval in milliseconds.
+ */
+#define BLE_MESH_PUB_TRANSMIT_INT(transmit) ((((transmit) >> 3) + 1) * 50)
+
+/** Model publication context. */
+struct bt_mesh_model_pub {
+    /** The model the context belongs to. Initialized by the stack. */
+    struct bt_mesh_model *mod;
+
+    uint16_t addr;          /**< Publish Address. */
+    uint16_t key:12,        /**< Publish AppKey Index. */
+             cred:1,        /**< Friendship Credentials Flag. */
+             send_rel:1;    /**< Force reliable sending (segment acks) */
+
+    uint8_t  ttl;           /**< Publish Time to Live. */
+    uint8_t  retransmit;    /**< Retransmit Count & Interval Steps. */
+    uint8_t  period;        /**< Publish Period. */
+    uint8_t  period_div:4,  /**< Divisor for the Period. */
+             fast_period:1, /**< Use FastPeriodDivisor */
+             count:3;       /**< Retransmissions left. */
+
+    uint32_t period_start;  /**< Start of the current period. */
+
+    /** @brief Publication buffer, containing the publication message.
+     *
+     *  This will get correctly created when the publication context
+     *  has been defined using the BLE_MESH_MODEL_PUB_DEFINE macro.
+     *
+     *  BLE_MESH_MODEL_PUB_DEFINE(name, update, size);
+     */
+    struct net_buf_simple *msg;
+
+    /** @brief Callback for updating the publication buffer.
+     *
+     *  When set to NULL, the model is assumed not to support
+     *  periodic publishing. When set to non-NULL the callback
+     *  will be called periodically and is expected to update
+     *  @ref bt_mesh_model_pub.msg with a valid publication
+     *  message.
+     *
+     *  If the callback returns non-zero, the publication is skipped
+     *  and will resume on the next periodic publishing interval.
+     *
+     *  @param mod The Model the Publication Context belongs to.
+     *
+     *  @return Zero on success or (negative) error code otherwise.
+     */
+    int (*update)(struct bt_mesh_model *mod);
+
+    /** Publish Period Timer. Only for stack-internal use. */
+    struct k_delayed_work timer;
+
+    /* Change by Espressif, role of the device going to publish messages */
+    uint8_t dev_role;
+};
+
+/** @def BLE_MESH_MODEL_PUB_DEFINE
+ *
+ *  Define a model publication context.
+ *
+ *  @param _name Variable name given to the context.
+ *  @param _update Optional message update callback (may be NULL).
+ *  @param _msg_len Length of the publication message.
+ */
+#define BLE_MESH_MODEL_PUB_DEFINE(_name, _update, _msg_len) \
+    NET_BUF_SIMPLE_DEFINE_STATIC(bt_mesh_pub_msg_##_name, _msg_len); \
+    static struct bt_mesh_model_pub _name = { \
+        .update = _update, \
+        .msg = &bt_mesh_pub_msg_##_name, \
+    }
+
+/** Model callback functions. */
+struct bt_mesh_model_cb {
+    /** @brief Model init callback.
+     *
+     *  Called on every model instance during mesh initialization.
+     *
+     *  If any of the model init callbacks return an error, the mesh
+     *  subsystem initialization will be aborted, and the error will
+     *  be returned to the caller of @ref bt_mesh_init.
+     *
+     *  @param model Model to be initialized.
+     *
+     *  @return 0 on success, error otherwise.
+     */
+    int (*const init)(struct bt_mesh_model *model);
+
+#if CONFIG_BLE_MESH_DEINIT
+    /** @brief Model deinit callback.
+     *
+     *  Called on every model instance during mesh deinitialization.
+     *  All model data is deleted, and the model should clear its state.
+     *
+     *  If any of the model deinit callbacks return an error, the mesh
+     *  subsystem deinitialization will be aborted, and the error will
+     *  be returned to the caller of @ref bt_mesh_deinit.
+     *
+     *  @param model Model to be de-initialized.
+     */
+    int (*const deinit)(struct bt_mesh_model *model);
+#endif /* CONFIG_BLE_MESH_DEINIT */
+};
+
+/** Abstraction that describes a Mesh Model instance */
+struct bt_mesh_model {
+    union {
+        const uint16_t id;
+        struct {
+            uint16_t company;
+            uint16_t id;
+        } vnd;
+    };
+
+    /* Internal information, mainly for persistent storage */
+    uint8_t  elem_idx;  /* Belongs to Nth element */
+    uint8_t  model_idx; /* Is the Nth model in the element */
+    uint16_t flags;     /* Information about what has changed */
+
+    /* The Element this Model belongs to */
+    struct bt_mesh_elem *elem;
+
+    /* Model Publication */
+    struct bt_mesh_model_pub *const pub;
+
+    /* AppKey List */
+    uint16_t keys[CONFIG_BLE_MESH_MODEL_KEY_COUNT];
+
+    /* Subscription List (group or virtual addresses) */
+    uint16_t groups[CONFIG_BLE_MESH_MODEL_GROUP_COUNT];
+
+    /** Opcode handler list */
+    const struct bt_mesh_model_op *const op;
+
+    /** Model callback structure. */
+    const struct bt_mesh_model_cb *const cb;
+
+    /* Model-specific user data */
+    void *user_data;
+};
+
+struct bt_mesh_send_cb {
+    void (*start)(uint16_t duration, int err, void *cb_data);
+    void (*end)(int err, void *cb_data);
+};
+
+void bt_mesh_model_msg_init(struct net_buf_simple *msg, uint32_t opcode);
+
+/** Special TTL value to request using configured default TTL */
+#define BLE_MESH_TTL_DEFAULT    0xff
+
+/** Maximum allowed TTL value */
+#define BLE_MESH_TTL_MAX        0x7f
+
+/**
+ * @brief Send an Access Layer message.
+ *
+ * @param model     Mesh (client) Model that the message belongs to.
+ * @param ctx       Message context, includes keys, TTL, etc.
+ * @param msg       Access Layer payload (the actual message to be sent).
+ * @param cb        Optional "message sent" callback.
+ * @param cb_data   User data to be passed to the callback.
+ *
+ * @return 0 on success, or (negative) error code on failure.
+ */
+int bt_mesh_model_send(struct bt_mesh_model *model,
+                       struct bt_mesh_msg_ctx *ctx,
+                       struct net_buf_simple *msg,
+                       const struct bt_mesh_send_cb *cb,
+                       void *cb_data);
+
+/**
+ * @brief Send a model publication message.
+ *
+ * Before calling this function, the user needs to ensure that the model
+ * publication message (@ref bt_mesh_model_pub.msg) contains a valid
+ * message to be sent. Note that this API is only to be used for
+ * non-period publishing. For periodic publishing the app only needs
+ * to make sure that @ref bt_mesh_model_pub.msg contains a valid message
+ * whenever the @ref bt_mesh_model_pub.update callback is called.
+ *
+ * @param model  Mesh (client) Model that's publishing the message.
+ *
+ * @return 0 on success, or (negative) error code on failure.
+ */
+int bt_mesh_model_publish(struct bt_mesh_model *model);
+
+/**
+ * @brief Get the element that a model belongs to.
+ *
+ * @param mod  Mesh model.
+ *
+ * @return Pointer to the element that the given model belongs to.
+ */
+struct bt_mesh_elem *bt_mesh_model_elem(struct bt_mesh_model *mod);
+
+/** @brief Find a SIG model.
+ *
+ *  @param elem Element to search for the model in.
+ *  @param id   Model ID of the model.
+ *
+ *  @return A pointer to the Mesh model matching the given parameters, or NULL
+ *          if no SIG model with the given ID exists in the given element.
+ */
+struct bt_mesh_model *bt_mesh_model_find(struct bt_mesh_elem *elem, uint16_t id);
+
+/** @brief Find a vendor model.
+ *
+ *  @param elem    Element to search for the model in.
+ *  @param company Company ID of the model.
+ *  @param id      Model ID of the model.
+ *
+ *  @return A pointer to the Mesh model matching the given parameters, or NULL
+ *          if no vendor model with the given ID exists in the given element.
+ */
+struct bt_mesh_model *bt_mesh_model_find_vnd(struct bt_mesh_elem *elem,
+                                             uint16_t company, uint16_t id);
+
+/** @brief Get whether the model is in the primary element of the device.
+ *
+ *  @param mod Mesh model.
+ *
+ *  @return true if the model is on the primary element, false otherwise.
+ */
+static inline bool bt_mesh_model_in_primary(const struct bt_mesh_model *mod)
+{
+    return (mod->elem_idx == 0);
+}
+
+/** Node Composition */
+struct bt_mesh_comp {
+    uint16_t cid;
+    uint16_t pid;
+    uint16_t vid;
+
+    size_t elem_count;
+    struct bt_mesh_elem *elem;
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* __BLE_MESH_ACCESS_H */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_bearer_adapt.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_bearer_adapt.h
new file mode 100644
index 00000000000..0174c32741f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_bearer_adapt.h
@@ -0,0 +1,807 @@
+/*
+ * SPDX-FileCopyrightText: 2017 Nordic Semiconductor ASA
+ * SPDX-FileCopyrightText: 2015-2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_BEARER_ADAPT_H_
+#define _BLE_MESH_BEARER_ADAPT_H_
+
+#include <sys/types.h>
+#include "mesh_config.h"
+#include "mesh_types.h"
+#include "mesh_util.h"
+#include "mesh_uuid.h"
+#include "mesh_buf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* BLE Mesh Max Connection Count */
+#ifdef CONFIG_BT_BLUEDROID_ENABLED
+#define BLE_MESH_MAX_CONN   CONFIG_BT_ACL_CONNECTIONS
+#endif
+
+#ifdef CONFIG_BT_NIMBLE_ENABLED
+#define BLE_MESH_MAX_CONN   CONFIG_BT_NIMBLE_MAX_CONNECTIONS
+#endif
+
+#define BLE_MESH_GAP_ADV_MAX_LEN    31
+
+#define BLE_MESH_GATT_DEF_MTU_SIZE  23
+
+/* BD ADDR types */
+#define BLE_MESH_ADDR_PUBLIC         0x00
+#define BLE_MESH_ADDR_RANDOM         0x01
+#define BLE_MESH_ADDR_PUBLIC_ID      0x02
+#define BLE_MESH_ADDR_RANDOM_ID      0x03
+
+/* BD ADDR length */
+#define BLE_MESH_ADDR_LEN                   0x06
+
+/* Advertising types */
+#define BLE_MESH_ADV_IND                    0x00
+#define BLE_MESH_ADV_DIRECT_IND             0x01
+#define BLE_MESH_ADV_SCAN_IND               0x02
+#define BLE_MESH_ADV_NONCONN_IND            0x03
+#define BLE_MESH_ADV_DIRECT_IND_LOW_DUTY    0x04
+
+/* advertising channel map */
+#define BLE_MESH_ADV_CHNL_37                BIT(0)
+#define BLE_MESH_ADV_CHNL_38                BIT(1)
+#define BLE_MESH_ADV_CHNL_39                BIT(2)
+
+/* Advertising filter policy */
+#define BLE_MESH_AP_SCAN_CONN_ALL           0x00
+#define BLE_MESH_AP_SCAN_WL_CONN_ALL        0x01
+#define BLE_MESH_AP_SCAN_ALL_CONN_WL        0x02
+#define BLE_MESH_AP_SCAN_CONN_WL            0x03
+
+/* Scan types */
+#define BLE_MESH_SCAN_PASSIVE               0x00
+#define BLE_MESH_SCAN_ACTIVE                0x01
+
+/* Scan operation */
+#define BLE_MESH_SCAN_DISABLE               0x00
+#define BLE_MESH_SCAN_ENABLE                0x01
+
+/* Scan duplicate operation */
+#define BLE_MESH_SCAN_FILTER_DUP_DISABLE    0x00
+#define BLE_MESH_SCAN_FILTER_DUP_ENABLE     0x01
+
+/* Scan filter policy */
+#define BLE_MESH_SP_ADV_ALL                 0x00
+#define BLE_MESH_SP_ADV_WL                  0x01
+#define BLE_MESH_SP_ADV_ALL_RPA_DIR_ADV     0x02
+#define BLE_MESH_SP_ADV_WL_RPA_DIR_ADV      0x03
+
+/* Error codes for Error response PDU */
+#define BLE_MESH_ATT_ERR_INVALID_HANDLE             0x01
+#define BLE_MESH_ATT_ERR_READ_NOT_PERMITTED         0x02
+#define BLE_MESH_ATT_ERR_WRITE_NOT_PERMITTED        0x03
+#define BLE_MESH_ATT_ERR_INVALID_PDU                0x04
+#define BLE_MESH_ATT_ERR_AUTHENTICATION             0x05
+#define BLE_MESH_ATT_ERR_NOT_SUPPORTED              0x06
+#define BLE_MESH_ATT_ERR_INVALID_OFFSET             0x07
+#define BLE_MESH_ATT_ERR_AUTHORIZATION              0x08
+#define BLE_MESH_ATT_ERR_PREPARE_QUEUE_FULL         0x09
+#define BLE_MESH_ATT_ERR_ATTRIBUTE_NOT_FOUND        0x0a
+#define BLE_MESH_ATT_ERR_ATTRIBUTE_NOT_LONG         0x0b
+#define BLE_MESH_ATT_ERR_ENCRYPTION_KEY_SIZE        0x0c
+#define BLE_MESH_ATT_ERR_INVALID_ATTRIBUTE_LEN      0x0d
+#define BLE_MESH_ATT_ERR_UNLIKELY                   0x0e
+#define BLE_MESH_ATT_ERR_INSUFFICIENT_ENCRYPTION    0x0f
+#define BLE_MESH_ATT_ERR_UNSUPPORTED_GROUP_TYPE     0x10
+#define BLE_MESH_ATT_ERR_INSUFFICIENT_RESOURCES     0x11
+
+/* Common Profile Error Codes (from CSS) */
+#define BLE_MESH_ATT_ERR_WRITE_REQ_REJECTED         0xfc
+#define BLE_MESH_ATT_ERR_CCC_IMPROPER_CONF          0xfd
+#define BLE_MESH_ATT_ERR_PROCEDURE_IN_PROGRESS      0xfe
+#define BLE_MESH_ATT_ERR_OUT_OF_RANGE               0xff
+
+/* EIR/AD data type definitions */
+#define BLE_MESH_DATA_FLAGS                 0x01 /* AD flags */
+#define BLE_MESH_DATA_UUID16_SOME           0x02 /* 16-bit UUID, more available */
+#define BLE_MESH_DATA_UUID16_ALL            0x03 /* 16-bit UUID, all listed */
+#define BLE_MESH_DATA_UUID32_SOME           0x04 /* 32-bit UUID, more available */
+#define BLE_MESH_DATA_UUID32_ALL            0x05 /* 32-bit UUID, all listed */
+#define BLE_MESH_DATA_UUID128_SOME          0x06 /* 128-bit UUID, more available */
+#define BLE_MESH_DATA_UUID128_ALL           0x07 /* 128-bit UUID, all listed */
+#define BLE_MESH_DATA_NAME_SHORTENED        0x08 /* Shortened name */
+#define BLE_MESH_DATA_NAME_COMPLETE         0x09 /* Complete name */
+#define BLE_MESH_DATA_TX_POWER              0x0a /* Tx Power */
+#define BLE_MESH_DATA_SOLICIT16             0x14 /* Solicit UUIDs, 16-bit */
+#define BLE_MESH_DATA_SOLICIT128            0x15 /* Solicit UUIDs, 128-bit */
+#define BLE_MESH_DATA_SVC_DATA16            0x16 /* Service data, 16-bit UUID */
+#define BLE_MESH_DATA_GAP_APPEARANCE        0x19 /* GAP appearance */
+#define BLE_MESH_DATA_SOLICIT32             0x1f /* Solicit UUIDs, 32-bit */
+#define BLE_MESH_DATA_SVC_DATA32            0x20 /* Service data, 32-bit UUID */
+#define BLE_MESH_DATA_SVC_DATA128           0x21 /* Service data, 128-bit UUID */
+#define BLE_MESH_DATA_URI                   0x24 /* URI */
+#define BLE_MESH_DATA_MESH_PROV             0x29 /* Mesh Provisioning PDU */
+#define BLE_MESH_DATA_MESH_MESSAGE          0x2a /* Mesh Networking PDU */
+#define BLE_MESH_DATA_MESH_BEACON           0x2b /* Mesh Beacon */
+
+#define BLE_MESH_DATA_MANUFACTURER_DATA     0xff /* Manufacturer Specific Data */
+
+#define BLE_MESH_AD_LIMITED     0x01 /* Limited Discoverable */
+#define BLE_MESH_AD_GENERAL     0x02 /* General Discoverable */
+#define BLE_MESH_AD_NO_BREDR    0x04 /* BR/EDR not supported */
+
+/* Client Characteristic Configuration Values */
+
+/** @def BLE_MESH_GATT_CCC_NOTIFY
+ *  @brief Client Characteristic Configuration Notification.
+ *
+ *  If set, changes to Characteristic Value shall be notified.
+ */
+#define BLE_MESH_GATT_CCC_NOTIFY        0x0001
+
+/** @def BLE_MESH_GATT_CCC_INDICATE
+ *  @brief Client Characteristic Configuration Indication.
+ *
+ *  If set, changes to Characteristic Value shall be indicated.
+ */
+#define BLE_MESH_GATT_CCC_INDICATE      0x0002
+
+/**  @def BLE_MESH_GATT_ERR
+  *  @brief Construct error return value for attribute read and write callbacks.
+  *
+  *  @param _att_err ATT error code
+  *
+  *  @return Appropriate error code for the attribute callbacks.
+  *
+  */
+#define BLE_MESH_GATT_ERR(_att_err)     (-(_att_err))
+
+enum {
+    BLE_MESH_GATT_ITER_STOP = 0,
+    BLE_MESH_GATT_ITER_CONTINUE,
+};
+
+/* GATT attribute permission bit field values */
+enum {
+    /** No operations supported, e.g. for notify-only */
+    BLE_MESH_GATT_PERM_NONE = 0,
+
+    /** Attribute read permission. */
+    BLE_MESH_GATT_PERM_READ = BIT(0),
+
+    /** Attribute write permission. */
+    BLE_MESH_GATT_PERM_WRITE = BIT(1),
+
+    /** Attribute read permission with encryption.
+     *
+     *  If set, requires encryption for read access.
+     */
+    BLE_MESH_GATT_PERM_READ_ENCRYPT = BIT(2),
+
+    /** Attribute write permission with encryption.
+     *
+     *  If set, requires encryption for write access.
+     */
+    BLE_MESH_GATT_PERM_WRITE_ENCRYPT = BIT(3),
+
+    /** Attribute read permission with authentication.
+     *
+     *  If set, requires encryption using authenticated link-key for read
+     *  access.
+     */
+    BLE_MESH_GATT_PERM_READ_AUTHEN = BIT(4),
+
+    /** Attribute write permission with authentication.
+     *
+     *  If set, requires encryption using authenticated link-key for write
+     *  access.
+     */
+    BLE_MESH_GATT_PERM_WRITE_AUTHEN = BIT(5),
+
+    /** Attribute prepare write permission.
+     *
+     *  If set, allows prepare writes with use of BT_GATT_WRITE_FLAG_PREPARE
+     *  passed to write callback.
+     */
+    BLE_MESH_GATT_PERM_PREPARE_WRITE = BIT(6),
+};
+
+/** Advertising options */
+enum {
+    /** Convenience value when no options are specified. */
+    BLE_MESH_ADV_OPT_NONE = 0,
+
+    /** Advertise as connectable. Type of advertising is determined by
+     * providing SCAN_RSP data and/or enabling local privacy support.
+     */
+    BLE_MESH_ADV_OPT_CONNECTABLE = BIT(0),
+
+    /** Don't try to resume connectable advertising after a connection.
+     *  This option is only meaningful when used together with
+     *  BLE_MESH_ADV_OPT_CONNECTABLE. If set the advertising will be stopped
+     *  when bt_le_adv_stop() is called or when an incoming (slave)
+     *  connection happens. If this option is not set the stack will
+     *  take care of keeping advertising enabled even as connections
+     *  occur.
+     */
+    BLE_MESH_ADV_OPT_ONE_TIME = BIT(1),
+};
+
+/* Defined GAP timers */
+#define BLE_MESH_GAP_SCAN_FAST_INTERVAL     0x0060  /* 60 ms    */
+#define BLE_MESH_GAP_SCAN_FAST_WINDOW       0x0030  /* 30 ms    */
+#define BLE_MESH_GAP_SCAN_SLOW_INTERVAL_1   0x0800  /* 1.28 s   */
+#define BLE_MESH_GAP_SCAN_SLOW_WINDOW_1     0x0012  /* 11.25 ms */
+#define BLE_MESH_GAP_SCAN_SLOW_INTERVAL_2   0x1000  /* 2.56 s   */
+#define BLE_MESH_GAP_SCAN_SLOW_WINDOW_2     0x0012  /* 11.25 ms */
+#define BLE_MESH_GAP_ADV_FAST_INT_MIN_0     0x0020  /* 20 ms    */
+#define BLE_MESH_GAP_ADV_FAST_INT_MAX_0     0x0020  /* 20 ms    */
+#define BLE_MESH_GAP_ADV_FAST_INT_MIN_1     0x0030  /* 30 ms    */
+#define BLE_MESH_GAP_ADV_FAST_INT_MAX_1     0x0060  /* 60 ms    */
+#define BLE_MESH_GAP_ADV_FAST_INT_MIN_2     0x00a0  /* 100 ms   */
+#define BLE_MESH_GAP_ADV_FAST_INT_MAX_2     0x00f0  /* 150 ms   */
+#define BLE_MESH_GAP_ADV_SLOW_INT_MIN       0x0320  /* 500 ms   */
+#define BLE_MESH_GAP_ADV_SLOW_INT_MAX       0x0320  /* 500 ms   */
+#define BLE_MESH_GAP_INIT_CONN_INT_MIN      0x0018  /* 30 ms    */
+#define BLE_MESH_GAP_INIT_CONN_INT_MAX      0x0028  /* 50 ms    */
+
+/* Characteristic Properties Bit field values */
+
+/** @def BLE_MESH_GATT_CHRC_BROADCAST
+ *  @brief Characteristic broadcast property.
+ *
+ *  If set, permits broadcasts of the Characteristic Value using Server
+ *  Characteristic Configuration Descriptor.
+ */
+#define BLE_MESH_GATT_CHRC_BROADCAST              0x01
+
+/** @def BLE_MESH_GATT_CHRC_READ
+ *  @brief Characteristic read property.
+ *
+ *  If set, permits reads of the Characteristic Value.
+ */
+#define BLE_MESH_GATT_CHRC_READ                   0x02
+
+/** @def BLE_MESH_GATT_CHRC_WRITE_WITHOUT_RESP
+ *  @brief Characteristic write without response property.
+ *
+ *  If set, permits write of the Characteristic Value without response.
+ */
+#define BLE_MESH_GATT_CHRC_WRITE_WITHOUT_RESP     0x04
+
+/** @def BLE_MESH_GATT_CHRC_WRITE
+ *  @brief Characteristic write with response property.
+ *
+ *  If set, permits write of the Characteristic Value with response.
+ */
+#define BLE_MESH_GATT_CHRC_WRITE                  0x08
+
+/** @def BLE_MESH_GATT_CHRC_NOTIFY
+ *  @brief Characteristic notify property.
+ *
+ *  If set, permits notifications of a Characteristic Value without
+ *  acknowledgment.
+ */
+#define BLE_MESH_GATT_CHRC_NOTIFY                 0x10
+
+/** @def BLE_MESH_GATT_CHRC_INDICATE
+ *  @brief Characteristic indicate property.
+ *
+ * If set, permits indications of a Characteristic Value with acknowledgment.
+ */
+#define BLE_MESH_GATT_CHRC_INDICATE               0x20
+
+/** @def BLE_MESH_GATT_CHRC_AUTH
+ *  @brief Characteristic Authenticated Signed Writes property.
+ *
+ *  If set, permits signed writes to the Characteristic Value.
+ */
+#define BLE_MESH_GATT_CHRC_AUTH                   0x40
+
+/** @def BLE_MESH_GATT_CHRC_EXT_PROP
+ *  @brief Characteristic Extended Properties property.
+ *
+ * If set, additional characteristic properties are defined in the
+ * Characteristic Extended Properties Descriptor.
+ */
+#define BLE_MESH_GATT_CHRC_EXT_PROP               0x80
+
+/** @brief Characteristic Attribute Value. */
+struct bt_mesh_gatt_char {
+    /** Characteristic UUID. */
+    const struct bt_mesh_uuid *uuid;
+    /** Characteristic properties. */
+    uint8_t                    properties;
+};
+
+/** @brief GATT Service structure */
+struct bt_mesh_gatt_service {
+    /** Service Attributes */
+    struct bt_mesh_gatt_attr *attrs;
+    /** Service Attribute count */
+    uint16_t                  attr_count;
+    sys_snode_t               node;
+};
+
+typedef struct {
+    uint8_t type;
+    uint8_t val[6];
+} bt_mesh_addr_t;
+
+/** Description of different data types that can be encoded into
+  * advertising data. Used to form arrays that are passed to the
+  * bt_le_adv_start() function.
+  */
+struct bt_mesh_adv_data {
+    uint8_t type;
+    uint8_t data_len;
+    const uint8_t *data;
+};
+
+/** @brief Helper to declare elements of bt_data arrays
+ *
+ *  This macro is mainly for creating an array of struct
+ *  bt_mesh_adv_data elements which is then passed to
+ *  bt_le_adv_start().
+ *
+ *  @param _type Type of advertising data field
+ *  @param _data Pointer to the data field payload
+ *  @param _data_len Number of bytes behind the _data pointer
+ */
+#define BLE_MESH_ADV_DATA(_type, _data, _data_len)  \
+    {                                               \
+        .type = (_type),                            \
+        .data_len = (_data_len),                    \
+        .data = (const uint8_t *)(_data),           \
+    }
+
+/** @brief Helper to declare elements of bt_data arrays
+ *
+ *  This macro is mainly for creating an array of struct bt_mesh_adv_data
+ *  elements which is then passed to bt_le_adv_start().
+ *
+ *  @param _type Type of advertising data field
+ *  @param _bytes Variable number of single-byte parameters
+ */
+#define BLE_MESH_ADV_DATA_BYTES(_type, _bytes...)       \
+    BLE_MESH_ADV_DATA(_type, ((uint8_t []) { _bytes }), \
+        sizeof((uint8_t []) { _bytes }))
+
+/* BLE Mesh Advertising Parameters */
+struct bt_mesh_adv_param {
+    /** Bit-field of advertising options */
+    uint8_t  options;
+
+    /** Minimum Advertising Interval (N * 0.625) */
+    uint16_t interval_min;
+
+    /** Maximum Advertising Interval (N * 0.625) */
+    uint16_t interval_max;
+};
+
+#if CONFIG_BLE_MESH_SUPPORT_BLE_ADV
+enum bt_mesh_ble_adv_priority {
+    BLE_MESH_BLE_ADV_PRIO_LOW,
+    BLE_MESH_BLE_ADV_PRIO_HIGH,
+};
+
+struct bt_mesh_ble_adv_param {
+    uint16_t interval;         /* Advertising interval */
+    uint8_t  adv_type;         /* Advertising type */
+    uint8_t  own_addr_type;    /* Own address type */
+    uint8_t  peer_addr_type;   /* Peer address type */
+    uint8_t  peer_addr[6];     /* Peer address */
+    uint16_t duration;         /* Duration is milliseconds */
+    uint16_t period;           /* Period in milliseconds */
+    uint16_t count;            /* Number of advertising duration */
+    uint8_t  priority:2;       /* Priority of BLE advertising packet */
+};
+
+struct bt_mesh_ble_adv_data {
+    uint8_t adv_data_len;      /* Advertising data length */
+    uint8_t adv_data[31];      /* Advertising data */
+    uint8_t scan_rsp_data_len; /* Scan response data length */
+    uint8_t scan_rsp_data[31]; /* Scan response data */
+};
+#endif /* CONFIG_BLE_MESH_SUPPORT_BLE_ADV */
+
+/* BLE Mesh scan parameters */
+struct bt_mesh_scan_param {
+    /** Scan type (BLE_MESH_SCAN_ACTIVE or BLE_MESH_SCAN_PASSIVE) */
+    uint8_t  type;
+
+    /** Duplicate filtering (BLE_MESH_SCAN_FILTER_DUP_ENABLE or
+     *  BLE_MESH_SCAN_FILTER_DUP_DISABLE)
+     */
+    uint8_t  filter_dup;
+
+    /** Scan interval (N * 0.625 ms) */
+    uint16_t interval;
+
+    /** Scan window (N * 0.625 ms) */
+    uint16_t window;
+
+    /** BLE scan filter policy */
+    uint8_t  scan_fil_policy;
+};
+
+struct bt_mesh_conn {
+    uint16_t handle;
+    bt_mesh_atomic_t ref;
+};
+
+/** @typedef bt_mesh_scan_cb_t
+ *  @brief Callback type for reporting LE scan results.
+ *
+ *  A function of this type is given to the bt_le_scan_start() function
+ *  and will be called for any discovered LE device.
+ *
+ *  @param addr Advertiser LE address and type.
+ *  @param rssi Strength of advertiser signal.
+ *  @param adv_type Type of advertising response from advertiser.
+ *  @param data Buffer containing advertiser data.
+ */
+typedef void bt_mesh_scan_cb_t(const bt_mesh_addr_t *addr, int8_t rssi,
+                               uint8_t adv_type, struct net_buf_simple *buf);
+
+/*  @typedef bt_mesh_dh_key_cb_t
+ *  @brief Callback type for DH Key calculation.
+ *
+ *  Used to notify of the calculated DH Key.
+ *
+ *  @param key Public key.
+ *  @param idx Provisioning link index, only used by Provisioner.
+ *
+ *  @return The DH Key, or NULL in case of failure.
+ */
+typedef void (*bt_mesh_dh_key_cb_t)(const uint8_t key[32], const uint8_t idx);
+
+/** @typedef bt_mesh_gatt_attr_func_t
+ *  @brief Attribute iterator callback.
+ *
+ *  @param attr Attribute found.
+ *  @param user_data Data given.
+ *
+ *  @return BLE_MESH_GATT_ITER_CONTINUE if should continue to the next attribute
+ *  or BLE_MESH_GATT_ITER_STOP to stop.
+ */
+typedef uint8_t (*bt_mesh_gatt_attr_func_t)(const struct bt_mesh_gatt_attr *attr,
+                                            void *user_data);
+
+/** @brief Connection callback structure.
+ *
+ *  This structure is used for tracking the state of a connection.
+ *  It is registered with the help of the bt_mesh_gatts_conn_cb_register() API.
+ *  It's permissible to register multiple instances of this @ref bt_conn_cb
+ *  type, in case different modules of an application are interested in
+ *  tracking the connection state. If a callback is not of interest for
+ *  an instance, it may be set to NULL and will as a consequence not be
+ *  used for that instance.
+ */
+struct bt_mesh_conn_cb {
+    /** @brief A new connection has been established.
+     *
+     *  This callback notifies the application of a new connection.
+     *  In case the err parameter is non-zero it means that the
+     *  connection establishment failed.
+     *
+     *  @param conn New connection object.
+     *  @param err HCI error. Zero for success, non-zero otherwise.
+     */
+    void (*connected)(struct bt_mesh_conn *conn, uint8_t err);
+
+    /** @brief A connection has been disconnected.
+     *
+     *  This callback notifies the application that a connection
+     *  has been disconnected.
+     *
+     *  @param conn Connection object.
+     *  @param reason HCI reason for the disconnection.
+     */
+    void (*disconnected)(struct bt_mesh_conn *conn, uint8_t reason);
+};
+
+struct bt_mesh_prov_conn_cb {
+    void (*connected)(bt_mesh_addr_t *addr, struct bt_mesh_conn *conn, int id);
+
+    void (*disconnected)(bt_mesh_addr_t *addr, struct bt_mesh_conn *conn, uint8_t reason);
+
+    ssize_t (*prov_write_descr)(bt_mesh_addr_t *addr, struct bt_mesh_conn *conn);
+
+    ssize_t (*prov_notify)(struct bt_mesh_conn *conn, uint8_t *data, uint16_t len);
+
+    ssize_t (*proxy_write_descr)(bt_mesh_addr_t *addr, struct bt_mesh_conn *conn);
+
+    ssize_t (*proxy_notify)(struct bt_mesh_conn *conn, uint8_t *data, uint16_t len);
+};
+
+/** @brief GATT Attribute structure. */
+struct bt_mesh_gatt_attr {
+    /** Attribute UUID */
+    const struct bt_mesh_uuid *uuid;
+
+    /** Attribute read callback
+     *
+     *  @param conn   The connection that is requesting to read
+     *  @param attr   The attribute that's being read
+     *  @param buf    Buffer to place the read result in
+     *  @param len    Length of data to read
+     *  @param offset Offset to start reading from
+     *
+     *  @return Number fo bytes read, or in case of an error
+     *          BLE_MESH_GATT_ERR() with a specific ATT error code.
+     */
+    ssize_t (*read)(struct bt_mesh_conn *conn,
+                    const struct bt_mesh_gatt_attr *attr,
+                    void *buf, uint16_t len,
+                    uint16_t offset);
+
+    /** Attribute write callback
+     *
+     *  @param conn   The connection that is requesting to write
+     *  @param attr   The attribute that's being written
+     *  @param buf    Buffer with the data to write
+     *  @param len    Number of bytes in the buffer
+     *  @param offset Offset to start writing from
+     *  @param flags  Flags (BT_GATT_WRITE_*)
+     *
+     *  @return Number of bytes written, or in case of an error
+     *          BLE_MESH_GATT_ERR() with a specific ATT error code.
+     */
+    ssize_t (*write)(struct bt_mesh_conn *conn,
+                     const struct bt_mesh_gatt_attr *attr,
+                     const void *buf, uint16_t len,
+                     uint16_t offset, uint8_t flags);
+
+    /** Attribute user data */
+    void *user_data;
+    /** Attribute handle */
+    uint16_t handle;
+    /** Attribute permissions */
+    uint8_t  perm;
+};
+
+/** @def BLE_MESH_GATT_PRIMARY_SERVICE
+ *  @brief Primary Service Declaration Macro.
+ *
+ *  Helper macro to declare a primary service attribute.
+ *
+ *  @param _service Service attribute value.
+ */
+#define BLE_MESH_GATT_PRIMARY_SERVICE(_service)     \
+{                                                   \
+    .uuid = BLE_MESH_UUID_GATT_PRIMARY,             \
+    .perm = BLE_MESH_GATT_PERM_READ,                \
+    .read = bt_mesh_gatts_attr_read_service,        \
+    .user_data = _service,                          \
+}
+
+/** @def BLE_MESH_GATT_SECONDARY_SERVICE
+ *  @brief Secondary Service Declaration Macro.
+ *
+ *  Helper macro to declare a secondary service attribute.
+ *
+ *  @param _service Service attribute value.
+ */
+#define BLE_MESH_GATT_SECONDARY_SERVICE(_service)   \
+{                                                   \
+    .uuid = BLE_MESH_UUID_GATT_SECONDARY,           \
+    .perm = BLE_MESH_GATT_PERM_READ,                \
+    .read = bt_mesh_gatts_attr_read_service,        \
+    .user_data = _service,                          \
+}
+
+/** @def BLE_MESH_GATT_INCLUDE_SERVICE
+ *  @brief Include Service Declaration Macro.
+ *
+ *  Helper macro to declare database internal include service attribute.
+ *
+ *  @param _service_incl the first service attribute of service to include
+ */
+#define BLE_MESH_GATT_INCLUDE_SERVICE(_service_incl)    \
+{                                                       \
+    .uuid = BLE_MESH_UUID_GATT_INCLUDE,                 \
+    .perm = BLE_MESH_GATT_PERM_READ,                    \
+    .read = bt_mesh_gatts_attr_read_included,           \
+    .user_data = _service_incl,                         \
+}
+
+/** @def BLE_MESH_GATT_CHARACTERISTIC
+ *  @brief Characteristic Declaration Macro.
+ *
+ *  Helper macro to declare a characteristic attribute.
+ *
+ *  @param _uuid Characteristic attribute uuid.
+ *  @param _props Characteristic attribute properties.
+ */
+#define BLE_MESH_GATT_CHARACTERISTIC(_uuid, _props)             \
+{                                                               \
+    .uuid = BLE_MESH_UUID_GATT_CHRC,                            \
+    .perm = BLE_MESH_GATT_PERM_READ,                            \
+    .read = bt_mesh_gatts_attr_read_chrc,                       \
+    .user_data = (&(struct bt_mesh_gatt_char) { .uuid = _uuid,  \
+                           .properties = _props, }),            \
+}
+
+/** @def BLE_MESH_GATT_DESCRIPTOR
+ *  @brief Descriptor Declaration Macro.
+ *
+ *  Helper macro to declare a descriptor attribute.
+ *
+ *  @param _uuid Descriptor attribute uuid.
+ *  @param _perm Descriptor attribute access permissions.
+ *  @param _read Descriptor attribute read callback.
+ *  @param _write Descriptor attribute write callback.
+ *  @param _value Descriptor attribute value.
+ */
+#define BLE_MESH_GATT_DESCRIPTOR(_uuid, _perm, _read, _write, _value)   \
+{                           \
+    .uuid = _uuid,          \
+    .perm = _perm,          \
+    .read = _read,          \
+    .write = _write,        \
+    .user_data = _value,    \
+}
+
+/** @def BLE_MESH_GATT_SERVICE
+ *  @brief Service Structure Declaration Macro.
+ *
+ *  Helper macro to declare a service structure.
+ *
+ *  @param _attrs Service attributes.
+ */
+#define BLE_MESH_GATT_SERVICE(_attrs)   \
+{                                       \
+    .attrs = _attrs,                    \
+    .attr_count = ARRAY_SIZE(_attrs),   \
+}
+
+int bt_mesh_host_init(void);
+
+int bt_le_adv_start(const struct bt_mesh_adv_param *param,
+                    const struct bt_mesh_adv_data *ad, size_t ad_len,
+                    const struct bt_mesh_adv_data *sd, size_t sd_len);
+
+#if CONFIG_BLE_MESH_SUPPORT_BLE_ADV
+int bt_mesh_ble_adv_start(const struct bt_mesh_ble_adv_param *param,
+                          const struct bt_mesh_ble_adv_data *data);
+#endif
+
+int bt_le_adv_stop(void);
+
+int bt_le_scan_start(const struct bt_mesh_scan_param *param, bt_mesh_scan_cb_t cb);
+
+int bt_le_scan_stop(void);
+
+typedef enum {
+    BLE_MESH_WHITELIST_REMOVE,
+    BLE_MESH_WHITELIST_ADD,
+} bt_mesh_wl_operation;
+
+struct bt_mesh_white_list {
+    bool add_remove;
+    uint8_t remote_bda[BLE_MESH_ADDR_LEN];
+    uint8_t addr_type;
+    /* For Bluedroid host, this callback is used to notify the
+     * result of updating white list.
+     */
+    void (*update_wl_comp_cb)(uint8_t status, bt_mesh_wl_operation wl_operation);
+};
+
+int bt_le_update_white_list(struct bt_mesh_white_list *wl);
+
+void bt_mesh_gatts_conn_cb_register(struct bt_mesh_conn_cb *cb);
+void bt_mesh_gatts_conn_cb_deregister(void);
+
+int bt_mesh_gatts_disconnect(struct bt_mesh_conn *conn, uint8_t reason);
+
+int bt_mesh_gatts_service_register(struct bt_mesh_gatt_service *svc);
+int bt_mesh_gatts_service_deregister(struct bt_mesh_gatt_service *svc);
+
+int bt_mesh_gatts_service_unregister(struct bt_mesh_gatt_service *svc);
+
+ssize_t bt_mesh_gatts_attr_read_included(struct bt_mesh_conn *conn,
+                                         const struct bt_mesh_gatt_attr *attr,
+                                         void *buf, uint16_t len, uint16_t offset);
+
+ssize_t bt_mesh_gatts_attr_read(struct bt_mesh_conn *conn,
+                                const struct bt_mesh_gatt_attr *attr,
+                                void *buf, uint16_t buf_len, uint16_t offset,
+                                const void *value, uint16_t value_len);
+
+ssize_t bt_mesh_gatts_attr_read_service(struct bt_mesh_conn *conn,
+                                        const struct bt_mesh_gatt_attr *attr,
+                                        void *buf, uint16_t len, uint16_t offset);
+
+ssize_t bt_mesh_gatts_attr_read_chrc(struct bt_mesh_conn *conn,
+                                     const struct bt_mesh_gatt_attr *attr,
+                                     void *buf, uint16_t len, uint16_t offset);
+
+int bt_mesh_gatts_notify(struct bt_mesh_conn *conn,
+                         const struct bt_mesh_gatt_attr *attr,
+                         const void *data, uint16_t len);
+
+uint16_t bt_mesh_gatt_get_mtu(struct bt_mesh_conn *conn);
+
+/** APIs added by Espressif */
+int bt_mesh_gatts_service_stop(struct bt_mesh_gatt_service *svc);
+int bt_mesh_gatts_service_start(struct bt_mesh_gatt_service *svc);
+
+int bt_mesh_gatts_set_local_device_name(const char *name);
+
+void bt_mesh_gattc_conn_cb_register(struct bt_mesh_prov_conn_cb *cb);
+void bt_mesh_gattc_conn_cb_deregister(void);
+
+uint8_t bt_mesh_gattc_get_free_conn_count(void);
+
+uint16_t bt_mesh_gattc_get_service_uuid(struct bt_mesh_conn *conn);
+
+int bt_mesh_gattc_conn_create(const bt_mesh_addr_t *addr, uint16_t service_uuid);
+
+void bt_gattc_conn_close(struct bt_mesh_conn *conn);
+
+void bt_mesh_gattc_exchange_mtu(uint8_t index);
+
+uint16_t bt_mesh_gattc_get_mtu_info(struct bt_mesh_conn *conn);
+
+int bt_mesh_gattc_write_no_rsp(struct bt_mesh_conn *conn,
+                               const struct bt_mesh_gatt_attr *attr,
+                               const void *data, uint16_t len);
+
+void bt_mesh_gattc_disconnect(struct bt_mesh_conn *conn);
+
+struct bt_mesh_conn *bt_mesh_conn_ref(struct bt_mesh_conn *conn);
+
+void bt_mesh_conn_unref(struct bt_mesh_conn *conn);
+
+void bt_mesh_gatt_init(void);
+void bt_mesh_gatt_deinit(void);
+
+void bt_mesh_adapt_init(void);
+
+void bt_mesh_set_private_key(const uint8_t pri_key[32]);
+
+const uint8_t *bt_mesh_pub_key_get(void);
+
+bool bt_mesh_check_public_key(const uint8_t key[64]);
+
+int bt_mesh_dh_key_gen(const uint8_t remote_pk[64], bt_mesh_dh_key_cb_t cb, const uint8_t idx);
+
+int bt_mesh_encrypt_le(const uint8_t key[16], const uint8_t plaintext[16],
+                       uint8_t enc_data[16]);
+
+int bt_mesh_encrypt_be(const uint8_t key[16], const uint8_t plaintext[16],
+                       uint8_t enc_data[16]);
+
+enum {
+    BLE_MESH_EXCEP_LIST_ADD = 0,
+    BLE_MESH_EXCEP_LIST_REMOVE,
+    BLE_MESH_EXCEP_LIST_CLEAN,
+};
+
+enum {
+    BLE_MESH_EXCEP_INFO_ADV_ADDR = 0,
+    BLE_MESH_EXCEP_INFO_MESH_LINK_ID,
+    BLE_MESH_EXCEP_INFO_MESH_BEACON,
+    BLE_MESH_EXCEP_INFO_MESH_PROV_ADV,
+    BLE_MESH_EXCEP_INFO_MESH_PROXY_ADV,
+};
+
+enum {
+    BLE_MESH_EXCEP_CLEAN_ADDR_LIST           = BIT(0),
+    BLE_MESH_EXCEP_CLEAN_MESH_LINK_ID_LIST   = BIT(1),
+    BLE_MESH_EXCEP_CLEAN_MESH_BEACON_LIST    = BIT(2),
+    BLE_MESH_EXCEP_CLEAN_MESH_PROV_ADV_LIST  = BIT(3),
+    BLE_MESH_EXCEP_CLEAN_MESH_PROXY_ADV_LIST = BIT(4),
+    BLE_MESH_EXCEP_CLEAN_ALL_LIST            = 0xFFFF,
+};
+
+int bt_mesh_update_exceptional_list(uint8_t sub_code, uint8_t type, void *info);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_BEARER_ADAPT_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_hci.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_hci.h
new file mode 100644
index 00000000000..860d575c2bd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_hci.h
@@ -0,0 +1,133 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2016 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _BLE_MESH_HCI_H_
+#define _BLE_MESH_HCI_H_
+
+#include "mesh_atomic.h"
+#include "mesh_bearer_adapt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Porting form zephyr/subsys/bluetooth/host/hci_core.h */
+
+#define BLE_MESH_LMP_FEAT_PAGES_COUNT   1
+
+/* bt_mesh_dev flags: the flags defined here represent BT controller state */
+enum {
+    BLE_MESH_DEV_ENABLE,
+    BLE_MESH_DEV_READY,
+    BLE_MESH_DEV_ID_STATIC_RANDOM,
+    BLE_MESH_DEV_HAS_PUB_KEY,
+    BLE_MESH_DEV_PUB_KEY_BUSY,
+
+    BLE_MESH_DEV_ADVERTISING,
+    BLE_MESH_DEV_KEEP_ADVERTISING,
+    BLE_MESH_DEV_SCANNING,
+    BLE_MESH_DEV_EXPLICIT_SCAN,
+    BLE_MESH_DEV_ACTIVE_SCAN,
+    BLE_MESH_DEV_SCAN_FILTER_DUP,
+
+    BLE_MESH_DEV_RPA_VALID,
+
+    BLE_MESH_DEV_ID_PENDING,
+
+    /* Total number of flags - must be at the end of the enum */
+    BLE_MESH_DEV_NUM_FLAGS,
+};
+
+struct bt_mesh_dev_le {
+    /* LE features */
+    uint8_t  features[8];
+
+    /* LE states */
+    uint64_t states;
+};
+
+/* State tracking for the local Bluetooth controller */
+struct bt_mesh_dev {
+    /* Flags indicate which functionality is enabled */
+    BLE_MESH_ATOMIC_DEFINE(flags, BLE_MESH_DEV_NUM_FLAGS);
+
+    /* Controller version & manufacturer information */
+    uint8_t  hci_version;
+    uint8_t  lmp_version;
+    uint16_t hci_revision;
+    uint16_t lmp_subversion;
+    uint16_t manufacturer;
+
+    /* LMP features (pages 0, 1, 2) */
+    uint8_t  features[BLE_MESH_LMP_FEAT_PAGES_COUNT][8];
+
+    /* LE controller specific features */
+    struct bt_mesh_dev_le le;
+};
+
+/*Porting from zephyr/subsys/bluetooth/host/hci_core.h */
+/* HCI version from Assigned Numbers */
+#define BLE_MESH_HCI_VERSION_1_0B   0
+#define BLE_MESH_HCI_VERSION_1_1    1
+#define BLE_MESH_HCI_VERSION_1_2    2
+#define BLE_MESH_HCI_VERSION_2_0    3
+#define BLE_MESH_HCI_VERSION_2_1    4
+#define BLE_MESH_HCI_VERSION_3_0    5
+#define BLE_MESH_HCI_VERSION_4_0    6
+#define BLE_MESH_HCI_VERSION_4_1    7
+#define BLE_MESH_HCI_VERSION_4_2    8
+#define BLE_MESH_HCI_VERSION_5_0    9
+
+/* OpCode Group Fields */
+#define BLE_MESH_OGF_LINK_CTRL      0x01
+#define BLE_MESH_OGF_BASEBAND       0x03
+#define BLE_MESH_OGF_INFO           0x04
+#define BLE_MESH_OGF_STATUS         0x05
+#define BLE_MESH_OGF_LE             0x08
+#define BLE_MESH_OGF_VS             0x3f
+
+/* Construct OpCode from OGF and OCF */
+#define BLE_MESH_OP(ogf, ocf)       ((ocf) | ((ogf) << 10))
+
+/* Obtain OGF from OpCode */
+#define BLE_MESH_OGF(opcode)        (((opcode) >> 10) & BIT_MASK(6))
+
+/* Obtain OCF from OpCode */
+#define BLE_MESH_OCF(opcode)        ((opcode) & BIT_MASK(10))
+
+#define BLE_MESH_HCI_OP_SET_ADV_PARAM       BLE_MESH_OP(BLE_MESH_OGF_LE, 0x0006)
+struct bt_mesh_hci_cp_set_adv_param {
+    uint16_t       min_interval;
+    uint16_t       max_interval;
+    uint8_t        type;
+    uint8_t        own_addr_type;
+    bt_mesh_addr_t direct_addr;
+    uint8_t        channel_map;
+    uint8_t        filter_policy;
+} __packed;
+
+#define BLE_MESH_HCI_OP_SET_ADV_DATA        BLE_MESH_OP(BLE_MESH_OGF_LE, 0x0008)
+struct bt_mesh_hci_cp_set_adv_data {
+    uint8_t len;
+    uint8_t data[31];
+} __packed;
+
+#define BLE_MESH_HCI_OP_SET_SCAN_RSP_DATA   BLE_MESH_OP(BLE_MESH_OGF_LE, 0x0009)
+struct bt_mesh_hci_cp_set_scan_rsp_data {
+    uint8_t len;
+    uint8_t data[31];
+} __packed;
+
+/* Added by Espressif */
+extern struct bt_mesh_dev bt_mesh_dev;
+
+void bt_mesh_hci_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_HCI_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_main.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_main.h
new file mode 100644
index 00000000000..ff41994a8e7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_main.h
@@ -0,0 +1,635 @@
+/** @file
+ *  @brief Bluetooth Mesh Profile APIs.
+ */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _BLE_MESH_MAIN_H_
+#define _BLE_MESH_MAIN_H_
+
+#include "mesh_access.h"
+
+/**
+ * @brief Bluetooth Mesh Provisioning
+ * @defgroup bt_mesh_prov Bluetooth Mesh Provisioning
+ * @ingroup bt_mesh
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    BLE_MESH_NO_OUTPUT       = 0,
+    BLE_MESH_BLINK           = BIT(0),
+    BLE_MESH_BEEP            = BIT(1),
+    BLE_MESH_VIBRATE         = BIT(2),
+    BLE_MESH_DISPLAY_NUMBER  = BIT(3),
+    BLE_MESH_DISPLAY_STRING  = BIT(4),
+} bt_mesh_output_action_t;
+
+typedef enum {
+    BLE_MESH_NO_INPUT      = 0,
+    BLE_MESH_PUSH          = BIT(0),
+    BLE_MESH_TWIST         = BIT(1),
+    BLE_MESH_ENTER_NUMBER  = BIT(2),
+    BLE_MESH_ENTER_STRING  = BIT(3),
+} bt_mesh_input_action_t;
+
+typedef enum {
+    BLE_MESH_PROV_ADV   = BIT(0),
+    BLE_MESH_PROV_GATT  = BIT(1),
+} bt_mesh_prov_bearer_t;
+
+typedef enum {
+    BLE_MESH_PROV_OOB_OTHER     = BIT(0),
+    BLE_MESH_PROV_OOB_URI       = BIT(1),
+    BLE_MESH_PROV_OOB_2D_CODE   = BIT(2),
+    BLE_MESH_PROV_OOB_BAR_CODE  = BIT(3),
+    BLE_MESH_PROV_OOB_NFC       = BIT(4),
+    BLE_MESH_PROV_OOB_NUMBER    = BIT(5),
+    BLE_MESH_PROV_OOB_STRING    = BIT(6),
+    /* 7 - 10 are reserved */
+    BLE_MESH_PROV_OOB_ON_BOX    = BIT(11),
+    BLE_MESH_PROV_OOB_IN_BOX    = BIT(12),
+    BLE_MESH_PROV_OOB_ON_PAPER  = BIT(13),
+    BLE_MESH_PROV_OOB_IN_MANUAL = BIT(14),
+    BLE_MESH_PROV_OOB_ON_DEV    = BIT(15),
+} bt_mesh_prov_oob_info_t;
+
+#define BLE_MESH_PROV_STATIC_OOB_MAX_LEN    16
+#define BLE_MESH_PROV_OUTPUT_OOB_MAX_LEN    8
+#define BLE_MESH_PROV_INPUT_OOB_MAX_LEN     8
+
+/** Provisioning properties & capabilities. */
+struct bt_mesh_prov {
+#if CONFIG_BLE_MESH_NODE
+    /** The UUID that's used when advertising as unprovisioned */
+    const uint8_t *uuid;
+
+    /** Optional URI. This will be advertised separately from the
+     *  unprovisioned beacon, however the unprovisioned beacon will
+     *  contain a hash of it so the two can be associated by the
+     *  provisioner.
+     */
+    const char *uri;
+
+    /** Out of Band information field. */
+    bt_mesh_prov_oob_info_t oob_info;
+
+    /** Flag indicates whether unprovisioned devices support OOB public key */
+    bool oob_pub_key;
+
+    /** @brief Set device OOB public key.
+     *
+     *  This callback notifies the application to
+     *  set OOB public key & private key pair.
+     */
+    void (*oob_pub_key_cb)(void);
+
+    /** Static OOB value */
+    const uint8_t *static_val;
+    /** Static OOB value length */
+    uint8_t        static_val_len;
+
+    /** Maximum size of Output OOB supported */
+    uint8_t        output_size;
+    /** Supported Output OOB Actions */
+    uint16_t       output_actions;
+
+    /* Maximum size of Input OOB supported */
+    uint8_t        input_size;
+    /** Supported Input OOB Actions */
+    uint16_t       input_actions;
+
+    /** @brief Output of a number is requested.
+     *
+     *  This callback notifies the application to
+     *  output the given number using the given action.
+     *
+     *  @param act Action for outputting the number.
+     *  @param num Number to be out-put.
+     *
+     *  @return Zero on success or negative error code otherwise
+     */
+    int         (*output_number)(bt_mesh_output_action_t act, uint32_t num);
+
+    /** @brief Output of a string is requested.
+     *
+     *  This callback notifies the application to
+     *  display the given string to the user.
+     *
+     *  @param str String to be displayed.
+     *
+     *  @return Zero on success or negative error code otherwise
+     */
+    int         (*output_string)(const char *str);
+
+    /** @brief Input is requested.
+     *
+     *  This callback notifies the application to request
+     *  input from the user using the given action. The
+     *  requested input will either be a string or a number, and
+     *  the application needs to consequently call the
+     *  bt_mesh_input_string() or bt_mesh_input_number() functions
+     *  once the data has been acquired from the user.
+     *
+     *  @param act Action for inputting data.
+     *  @param num Maximum size of the in-put data.
+     *
+     *  @return Zero on success or negative error code otherwise
+     */
+    int         (*input)(bt_mesh_input_action_t act, uint8_t size);
+
+    /** @brief Provisioning link has been opened.
+     *
+     *  This callback notifies the application that a provisioning
+     *  link has been opened on the given provisioning bearer.
+     *
+     *  @param bearer Provisioning bearer.
+     */
+    void        (*link_open)(bt_mesh_prov_bearer_t bearer);
+
+    /** @brief Provisioning link has been closed.
+     *
+     *  This callback notifies the application that a provisioning
+     *  link has been closed on the given provisioning bearer.
+     *
+     *  @param bearer Provisioning bearer.
+     */
+    void        (*link_close)(bt_mesh_prov_bearer_t bearer);
+
+    /** @brief Provisioning is complete.
+     *
+     *  This callback notifies the application that provisioning has
+     *  been successfully completed, and that the local node has been
+     *  assigned the specified NetKeyIndex and primary element address.
+     *
+     *  @param net_idx  NetKeyIndex given during provisioning.
+     *  @param net_key  NetKey given during provisioning.
+     *  @param addr     Primary element address.
+     *  @param flags    Key Refresh & IV Update flags
+     *  @param iv_index IV Index.
+     */
+    void        (*complete)(uint16_t net_idx, const uint8_t net_key[16], uint16_t addr, uint8_t flags, uint32_t iv_index);
+
+    /** @brief Node has been reset.
+     *
+     *  This callback notifies the application that the local node
+     *  has been reset and needs to be reprovisioned. The node will
+     *  not automatically advertise as unprovisioned, rather the
+     *  bt_mesh_prov_enable() API needs to be called to enable
+     *  unprovisioned advertising on one or more provisioning bearers.
+     */
+    void        (*reset)(void);
+#endif /* CONFIG_BLE_MESH_NODE */
+
+#if CONFIG_BLE_MESH_PROVISIONER
+    /* Provisioner device uuid */
+    const uint8_t *prov_uuid;
+
+    /*
+     * Primary element address of the provisioner.
+     * No need to initialize it for fast provisioning.
+     */
+    const uint16_t prov_unicast_addr;
+
+    /*
+     * Starting unicast address going to assigned.
+     * No need to initialize it for fast provisioning.
+     */
+    uint16_t prov_start_address;
+
+    /* Attention timer contained in Provisioning Invite */
+    uint8_t  prov_attention;
+
+    /* Provisioner provisioning Algorithm */
+    uint8_t  prov_algorithm;
+
+    /* Provisioner public key oob */
+    uint8_t  prov_pub_key_oob;
+
+    /** @brief Input is requested.
+     *
+     *  This callback notifies the application that it should
+     *  read device's public key with OOB
+     *
+     *  @param link_idx: The provisioning link index
+     *
+     *  @return Zero on success or negative error code otherwise
+     */
+    int  (*prov_pub_key_oob_cb)(uint8_t link_idx);
+
+    /* Provisioner static oob value */
+    uint8_t *prov_static_oob_val;
+
+    /* Provisioner static oob value length */
+    uint8_t  prov_static_oob_len;
+
+    /** @brief Provisioner input a number read from device output
+     *
+     *  This callback notifies the application that it should
+     *  input the number given by the device.
+     *
+     *  @param method:   The OOB authentication method
+     *  @param act:      The output action of the device
+     *  @param size:     The output size of the device
+     *  @param link_idx: The provisioning link index
+     *
+     *  @return Zero on success or negative error code otherwise
+     */
+    int  (*prov_input_num)(uint8_t method, bt_mesh_output_action_t act, uint8_t size, uint8_t link_idx);
+
+    /** @brief Provisioner output a number to the device
+     *
+     *  This callback notifies the application that it should
+     *  output the number to the device.
+     *
+     *  @param method:   The OOB authentication method
+     *  @param act:      The input action of the device
+     *  @param data:     The input number/string of the device
+     *  @param size:     The input size of the device
+     *  @param link_idx: The provisioning link index
+     *
+     *  @return Zero on success or negative error code otherwise
+     */
+    int  (*prov_output_num)(uint8_t method, bt_mesh_input_action_t act, void *data, uint8_t size, uint8_t link_idx);
+
+    /*
+     * Key refresh and IV update flag.
+     * No need to initialize it for fast provisioning.
+     */
+    uint8_t  flags;
+
+    /*
+     * IV index. No need to initialize it for fast provisioning.
+     */
+    uint32_t iv_index;
+
+    /** @brief Provisioner has opened a provisioning link.
+     *
+     *  This callback notifies the application that a provisioning
+     *  link has been opened on the given provisioning bearer.
+     *
+     *  @param bearer Provisioning bearer.
+     */
+    void (*prov_link_open)(bt_mesh_prov_bearer_t bearer);
+
+    /** @brief Provisioner has closed a provisioning link.
+     *
+     *  This callback notifies the application that a provisioning
+     *  link has been closed on the given provisioning bearer.
+     *
+     *  @param bearer Provisioning bearer.
+     *  @param reason Provisioning link close reason(disconnect reason)
+     */
+    void (*prov_link_close)(bt_mesh_prov_bearer_t bearer, uint8_t reason);
+
+    /** @brief Provision one device is complete.
+     *
+     *  This callback notifies the application that provisioner has
+     *  successfully provisioned a device, and the node has been assigned
+     *  the specified NetKeyIndex and primary element address.
+     *
+     *  @param node_idx     Node index within the node(provisioned device) queue.
+     *  @param device_uuid  Provisioned device uuid pointer.
+     *  @param unicast_addr Provisioned device assigned unicast address.
+     *  @param element_num  Provisioned device element number.
+     *  @param netkey_idx   Provisioned device assigned netkey index.
+     */
+    void (*prov_complete)(uint16_t node_idx, const uint8_t device_uuid[16],
+                          uint16_t unicast_addr, uint8_t element_num,
+                          uint16_t netkey_idx);
+#endif /* CONFIG_BLE_MESH_PROVISIONER */
+};
+
+enum ble_mesh_role {
+    NODE = 0,
+    PROVISIONER,
+    FAST_PROV,
+    ROLE_NVAL,
+};
+
+/* The following APIs are for BLE Mesh Node */
+
+/** @brief Provide provisioning input OOB string.
+ *
+ *  This is intended to be called after the bt_mesh_prov input callback
+ *  has been called with BLE_MESH_ENTER_STRING as the action.
+ *
+ *  @param str String.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_input_string(const char *str);
+
+/** @brief Provide provisioning input OOB number.
+ *
+ *  This is intended to be called after the bt_mesh_prov input callback
+ *  has been called with BLE_MESH_ENTER_NUMBER as the action.
+ *
+ *  @param num Number.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_input_number(uint32_t num);
+
+/** @brief Enable specific provisioning bearers
+ *
+ *  Enable one or more provisioning bearers.
+ *
+ *  @param Bit-wise OR of provisioning bearers.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_prov_enable(bt_mesh_prov_bearer_t bearers);
+
+/** @brief Disable specific provisioning bearers
+ *
+ *  Disable one or more provisioning bearers.
+ *
+ *  @param Bit-wise OR of provisioning bearers.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_prov_disable(bt_mesh_prov_bearer_t bearers);
+
+/* The following APIs are for BLE Mesh Provisioner */
+
+/** @brief Provide provisioning input OOB string.
+ *
+ *  This is intended to be called after the bt_mesh_prov input callback
+ *  has been called with BLE_MESH_ENTER_STRING as the action.
+ *
+ *  @param str String.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_prov_input_string(const char *str);
+
+/** @brief Provide provisioning input OOB number.
+ *
+ *  This is intended to be called after the bt_mesh_prov input callback
+ *  has been called with BLE_MESH_ENTER_NUMBER as the action.
+ *
+ *  @param num Number.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_prov_input_number(uint32_t num);
+
+/** @brief Enable specific provisioning bearers
+ *
+ *  Enable one or more provisioning bearers.
+ *
+ *  @param bearers Bit-wise OR of provisioning bearers.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_provisioner_enable(bt_mesh_prov_bearer_t bearers);
+
+/** @brief Disable specific provisioning bearers
+ *
+ *  Disable one or more provisioning bearers.
+ *
+ *  @param bearers Bit-wise OR of provisioning bearers.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_provisioner_disable(bt_mesh_prov_bearer_t bearers);
+
+/**
+ * @}
+ */
+
+/**
+ * @brief Bluetooth Mesh
+ * @defgroup bt_mesh Bluetooth Mesh
+ * @ingroup bluetooth
+ * @{
+ */
+
+/* Primary Network Key index */
+#define BLE_MESH_NET_PRIMARY                 0x000
+
+#define BLE_MESH_RELAY_DISABLED              0x00
+#define BLE_MESH_RELAY_ENABLED               0x01
+#define BLE_MESH_RELAY_NOT_SUPPORTED         0x02
+
+#define BLE_MESH_BEACON_DISABLED             0x00
+#define BLE_MESH_BEACON_ENABLED              0x01
+
+#define BLE_MESH_GATT_PROXY_DISABLED         0x00
+#define BLE_MESH_GATT_PROXY_ENABLED          0x01
+#define BLE_MESH_GATT_PROXY_NOT_SUPPORTED    0x02
+
+#define BLE_MESH_FRIEND_DISABLED             0x00
+#define BLE_MESH_FRIEND_ENABLED              0x01
+#define BLE_MESH_FRIEND_NOT_SUPPORTED        0x02
+
+#define BLE_MESH_NODE_IDENTITY_STOPPED       0x00
+#define BLE_MESH_NODE_IDENTITY_RUNNING       0x01
+#define BLE_MESH_NODE_IDENTITY_NOT_SUPPORTED 0x02
+
+/* Features */
+#define BLE_MESH_FEAT_RELAY                  BIT(0)
+#define BLE_MESH_FEAT_PROXY                  BIT(1)
+#define BLE_MESH_FEAT_FRIEND                 BIT(2)
+#define BLE_MESH_FEAT_LOW_POWER              BIT(3)
+#define BLE_MESH_FEAT_SUPPORTED              (BLE_MESH_FEAT_RELAY |     \
+                                              BLE_MESH_FEAT_PROXY |     \
+                                              BLE_MESH_FEAT_FRIEND |    \
+                                              BLE_MESH_FEAT_LOW_POWER)
+
+/** @brief Check if the mesh stack is initialized.
+ *
+ *  @return true - yes, false - no.
+ */
+bool bt_mesh_is_initialized(void);
+
+/** @brief Initialize Mesh support
+ *
+ *  After calling this API, the node will not automatically advertise as
+ *  unprovisioned, rather the bt_mesh_prov_enable() API needs to be called
+ *  to enable unprovisioned advertising on one or more provisioning bearers.
+ *
+ *  @param prov Node provisioning information.
+ *  @param comp Node Composition.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_init(const struct bt_mesh_prov *prov,
+                 const struct bt_mesh_comp *comp);
+
+/* BLE Mesh deinit parameters */
+struct bt_mesh_deinit_param {
+    bool erase; /* Indicate if erasing flash when deinit mesh stack */
+};
+
+/** @brief De-initialize Mesh support
+ *
+ *  @param param BLE Mesh deinit parameters.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_deinit(struct bt_mesh_deinit_param *param);
+
+/** @brief Reset the state of the local Mesh node.
+ *
+ *  Resets the state of the node, which means that it needs to be
+ *  reprovisioned to become an active node in a Mesh network again.
+ *
+ *  After calling this API, the node will not automatically advertise as
+ *  unprovisioned, rather the bt_mesh_prov_enable() API needs to be called
+ *  to enable unprovisioned advertising on one or more provisioning bearers.
+ *
+ */
+void bt_mesh_node_reset(void);
+
+/** @brief Suspend the Mesh network temporarily.
+ *
+ *  This API can be used for power saving purposes, but the user should be
+ *  aware that leaving the local node suspended for a long period of time
+ *  may cause it to become permanently disconnected from the Mesh network.
+ *  If at all possible, the Friendship feature should be used instead, to
+ *  make the node into a Low Power Node.
+ *
+ *  @return 0 on success, or (negative) error code on failure.
+ */
+int bt_mesh_suspend(void);
+
+/** @brief Resume a suspended Mesh network.
+ *
+ *  This API resumes the local node, after it has been suspended using the
+ *  bt_mesh_suspend() API.
+ *
+ *  @return 0 on success, or (negative) error code on failure.
+ */
+int bt_mesh_resume(void);
+
+/** @brief Provision the local Mesh Node.
+ *
+ *  This API should normally not be used directly by the application. The
+ *  only exception is for testing purposes where manual provisioning is
+ *  desired without an actual external provisioner.
+ *
+ *  @param net_key  Network Key
+ *  @param net_idx  Network Key Index
+ *  @param flags    Provisioning Flags
+ *  @param iv_index IV Index
+ *  @param addr     Primary element address
+ *  @param dev_key  Device Key
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_provision(const uint8_t net_key[16], uint16_t net_idx,
+                      uint8_t flags, uint32_t iv_index, uint16_t addr,
+                      const uint8_t dev_key[16]);
+
+/** @brief Check if the device is an unprovisioned device
+ *         and will act as a node once provisioned.
+ *
+ *  @return true - yes, false - no.
+ */
+bool bt_mesh_is_node(void);
+
+/** @brief Check if the local node has been provisioned.
+ *
+ *  This API can be used to check if the local node has been provisioned
+ *  or not. It can e.g. be helpful to determine if there was a stored
+ *  network in flash, i.e. if the network was restored after calling
+ *  settings_load().
+ *
+ *  @return True if the node is provisioned. False otherwise.
+ */
+bool bt_mesh_is_provisioned(void);
+
+/** @brief Check if the device is a Provisioner.
+ *
+ *  @return true - yes, false - no.
+ */
+bool bt_mesh_is_provisioner(void);
+
+/** @brief Check if the Provisioner is enabled
+ *
+ *  @return true - enabled, false - disabled.
+ */
+bool bt_mesh_is_provisioner_en(void);
+
+/** @brief Toggle the IV Update test mode
+ *
+ *  This API is only available if the IV Update test mode has been enabled
+ *  in Kconfig. It is needed for passing most of the IV Update qualification
+ *  test cases.
+ *
+ *  @param enable true to enable IV Update test mode, false to disable it.
+ */
+void bt_mesh_iv_update_test(bool enable);
+
+/** @brief Toggle the IV Update state
+ *
+ *  This API is only available if the IV Update test mode has been enabled
+ *  in Kconfig. It is needed for passing most of the IV Update qualification
+ *  test cases.
+ *
+ *  @return true if IV Update In Progress state was entered, false otherwise.
+ */
+bool bt_mesh_iv_update(void);
+
+/** @brief Toggle the Low Power feature of the local device
+ *
+ *  Enables or disables the Low Power feature of the local device. This is
+ *  exposed as a run-time feature, since the device might want to change
+ *  this e.g. based on being plugged into a stable power source or running
+ *  from a battery power source.
+ *
+ *  @param enable  true to enable LPN functionality, false to disable it.
+ *  @param force   when disable LPN functionality, use this flag to indicate
+ *                 whether directly clear corresponding information or sending
+ *                 friend clear to disable it.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_lpn_set(bool enable, bool force);
+
+/** @brief Send out a Friend Poll message.
+ *
+ *  Send a Friend Poll message to the Friend of this node. If there is no
+ *  established Friendship the function will return an error.
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_lpn_poll(void);
+
+/** @brief Register a callback for Friendship changes.
+ *
+ *  Registers a callback that will be called whenever Friendship gets
+ *  established or is lost.
+ *
+ *  @param cb Function to call when the Friendship status changes.
+ */
+void bt_mesh_lpn_set_cb(void (*cb)(uint16_t friend_addr, bool established));
+
+/** @brief Register a callback for Friendship changes of friend node.
+ *
+ *  Registers a callback that will be called whenever Friendship gets
+ *  established or is terminated.
+ *
+ *  @param cb Function to call when the Friendship status of friend node changes.
+ */
+void bt_mesh_friend_set_cb(void (*cb)(bool establish, uint16_t lpn_addr, uint8_t reason));
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* _BLE_MESH_MAIN_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_proxy.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_proxy.h
new file mode 100644
index 00000000000..3bdf5c405c0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_proxy.h
@@ -0,0 +1,45 @@
+/** @file
+ *  @brief Bluetooth Mesh Proxy APIs.
+ */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_PROXY_H_
+#define _BLE_MESH_PROXY_H_
+
+#include <stddef.h>
+/**
+ * @brief Bluetooth Mesh Proxy
+ * @defgroup bt_mesh_proxy Bluetooth Mesh Proxy
+ * @ingroup bt_mesh
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Enable advertising with Node Identity.
+ *
+ * This API requires that GATT Proxy support has been enabled. Once called
+ * each subnet will start advertising using Node Identity for the next
+ * 60 seconds.
+ *
+ * @return 0 on success, or (negative) error code on failure.
+ */
+int bt_mesh_proxy_identity_enable(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* _BLE_MESH_PROXY_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_uuid.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_uuid.h
new file mode 100644
index 00000000000..b3d207cbe88
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/include/mesh_uuid.h
@@ -0,0 +1,530 @@
+/** @file
+ *  @brief Bluetooth UUID handling
+ */
+
+/*
+ * SPDX-FileCopyrightText: 2015-2016 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _BLE_MESH_UUID_H_
+#define _BLE_MESH_UUID_H_
+
+/**
+ * @brief UUIDs
+ * @defgroup bt_uuid UUIDs
+ * @ingroup bluetooth
+ * @{
+ */
+
+#include "mesh_util.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @brief Bluetooth UUID types */
+enum {
+    BLE_MESH_UUID_TYPE_16,
+    BLE_MESH_UUID_TYPE_32,
+    BLE_MESH_UUID_TYPE_128,
+};
+
+/** @brief This is a 'tentative' type and should be used as a pointer only */
+struct bt_mesh_uuid {
+    uint8_t type;
+};
+
+struct bt_mesh_uuid_16 {
+    struct bt_mesh_uuid uuid;
+    uint16_t val;
+};
+
+struct bt_mesh_uuid_32 {
+    struct bt_mesh_uuid uuid;
+    uint32_t val;
+};
+
+struct bt_mesh_uuid_128 {
+    struct bt_mesh_uuid uuid;
+    uint8_t val[16];
+};
+
+#define BLE_MESH_UUID_INIT_16(value)        \
+{                                           \
+    .uuid.type = BLE_MESH_UUID_TYPE_16,     \
+    .val = (value),                         \
+}
+
+#define BLE_MESH_UUID_INIT_32(value)        \
+{                                           \
+    .uuid.type = BLE_MESH_UUID_TYPE_32,     \
+    .val = (value),                         \
+}
+
+#define BLE_MESH_UUID_INIT_128(value...)    \
+{                                           \
+    .uuid.type = BLE_MESH_UUID_TYPE_128,    \
+    .val = { value },                       \
+}
+
+#define BLE_MESH_UUID_DECLARE_16(value)     \
+        ((struct bt_mesh_uuid *) (&(struct bt_mesh_uuid_16) BLE_MESH_UUID_INIT_16(value)))
+
+#define BLE_MESH_UUID_DECLARE_32(value)     \
+        ((struct bt_mesh_uuid *) (&(struct bt_mesh_uuid_32) BLE_MESH_UUID_INIT_32(value)))
+
+#define BLE_MESH_UUID_DECLARE_128(value...) \
+        ((struct bt_mesh_uuid *) (&(struct bt_mesh_uuid_128) BLE_MESH_UUID_INIT_128(value)))
+
+#define BLE_MESH_UUID_16(__u)  CONTAINER_OF(__u, struct bt_mesh_uuid_16, uuid)
+#define BLE_MESH_UUID_32(__u)  CONTAINER_OF(__u, struct bt_mesh_uuid_32, uuid)
+#define BLE_MESH_UUID_128(__u) CONTAINER_OF(__u, struct bt_mesh_uuid_128, uuid)
+
+/** @def BLE_MESH_UUID_GAP
+ *  @brief Generic Access
+ */
+#define BLE_MESH_UUID_GAP                       BLE_MESH_UUID_DECLARE_16(0x1800)
+#define BLE_MESH_UUID_GAP_VAL                   0x1800
+/** @def BLE_MESH_UUID_GATT
+ *  @brief Generic Attribute
+ */
+#define BLE_MESH_UUID_GATT                      BLE_MESH_UUID_DECLARE_16(0x1801)
+#define BLE_MESH_UUID_GATT_VAL                  0x1801
+/** @def BLE_MESH_UUID_CTS
+ *  @brief Current Time Service
+ */
+#define BLE_MESH_UUID_CTS                       BLE_MESH_UUID_DECLARE_16(0x1805)
+#define BLE_MESH_UUID_CTS_VAL                   0x1805
+/** @def BLE_MESH_UUID_DIS
+ *  @brief Device Information Service
+ */
+#define BLE_MESH_UUID_DIS                       BLE_MESH_UUID_DECLARE_16(0x180a)
+#define BLE_MESH_UUID_DIS_VAL                   0x180a
+/** @def BLE_MESH_UUID_HRS
+ *  @brief Heart Rate Service
+ */
+#define BLE_MESH_UUID_HRS                       BLE_MESH_UUID_DECLARE_16(0x180d)
+#define BLE_MESH_UUID_HRS_VAL                   0x180d
+/** @def BLE_MESH_UUID_BAS
+ *  @brief Battery Service
+ */
+#define BLE_MESH_UUID_BAS                       BLE_MESH_UUID_DECLARE_16(0x180f)
+#define BLE_MESH_UUID_BAS_VAL                   0x180f
+/** @def BLE_MESH_UUID_HIDS
+ *  @brief HID Service
+ */
+#define BLE_MESH_UUID_HIDS                      BLE_MESH_UUID_DECLARE_16(0x1812)
+#define BLE_MESH_UUID_HIDS_VAL                  0x1812
+/** @def BLE_MESH_UUID_CSC
+ *  @brief Cycling Speed and Cadence Service
+ */
+#define BLE_MESH_UUID_CSC                       BLE_MESH_UUID_DECLARE_16(0x1816)
+#define BLE_MESH_UUID_CSC_VAL                   0x1816
+/** @def BLE_MESH_UUID_ESS
+ *  @brief Environmental Sensing Service
+ */
+#define BLE_MESH_UUID_ESS                       BLE_MESH_UUID_DECLARE_16(0x181a)
+#define BLE_MESH_UUID_ESS_VAL                   0x181a
+/** @def BLE_MESH_UUID_IPSS
+ *  @brief IP Support Service
+ */
+#define BLE_MESH_UUID_IPSS                      BLE_MESH_UUID_DECLARE_16(0x1820)
+#define BLE_MESH_UUID_IPSS_VAL                  0x1820
+/** @def BLE_MESH_UUID_MESH_PROV
+ *  @brief Mesh Provisioning Service
+ */
+#define BLE_MESH_UUID_MESH_PROV                 BLE_MESH_UUID_DECLARE_16(0x1827)
+#define BLE_MESH_UUID_MESH_PROV_VAL             0x1827
+/** @def BLE_MESH_UUID_MESH_PROXY
+ *  @brief Mesh Proxy Service
+ */
+#define BLE_MESH_UUID_MESH_PROXY                BLE_MESH_UUID_DECLARE_16(0x1828)
+#define BLE_MESH_UUID_MESH_PROXY_VAL            0x1828
+/** @def BLE_MESH_UUID_GATT_PRIMARY
+ *  @brief GATT Primary Service
+ */
+#define BLE_MESH_UUID_GATT_PRIMARY              BLE_MESH_UUID_DECLARE_16(0x2800)
+#define BLE_MESH_UUID_GATT_PRIMARY_VAL          0x2800
+/** @def BLE_MESH_UUID_GATT_SECONDARY
+ *  @brief GATT Secondary Service
+ */
+#define BLE_MESH_UUID_GATT_SECONDARY            BLE_MESH_UUID_DECLARE_16(0x2801)
+#define BLE_MESH_UUID_GATT_SECONDARY_VAL        0x2801
+/** @def BLE_MESH_UUID_GATT_INCLUDE
+ *  @brief GATT Include Service
+ */
+#define BLE_MESH_UUID_GATT_INCLUDE              BLE_MESH_UUID_DECLARE_16(0x2802)
+#define BLE_MESH_UUID_GATT_INCLUDE_VAL          0x2802
+/** @def BLE_MESH_UUID_GATT_CHRC
+ *  @brief GATT Characteristic
+ */
+#define BLE_MESH_UUID_GATT_CHRC                 BLE_MESH_UUID_DECLARE_16(0x2803)
+#define BLE_MESH_UUID_GATT_CHRC_VAL             0x2803
+/** @def BLE_MESH_UUID_GATT_CEP
+ *  @brief GATT Characteristic Extended Properties
+ */
+#define BLE_MESH_UUID_GATT_CEP                  BLE_MESH_UUID_DECLARE_16(0x2900)
+#define BLE_MESH_UUID_GATT_CEP_VAL              0x2900
+/** @def BLE_MESH_UUID_GATT_CUD
+ *  @brief GATT Characteristic User Description
+ */
+#define BLE_MESH_UUID_GATT_CUD                  BLE_MESH_UUID_DECLARE_16(0x2901)
+#define BLE_MESH_UUID_GATT_CUD_VAL              0x2901
+/** @def BLE_MESH_UUID_GATT_CCC
+ *  @brief GATT Client Characteristic Configuration
+ */
+#define BLE_MESH_UUID_GATT_CCC                  BLE_MESH_UUID_DECLARE_16(0x2902)
+#define BLE_MESH_UUID_GATT_CCC_VAL              0x2902
+/** @def BLE_MESH_UUID_GATT_SCC
+ *  @brief GATT Server Characteristic Configuration
+ */
+#define BLE_MESH_UUID_GATT_SCC                  BLE_MESH_UUID_DECLARE_16(0x2903)
+#define BLE_MESH_UUID_GATT_SCC_VAL              0x2903
+/** @def BLE_MESH_UUID_GATT_CPF
+ *  @brief GATT Characteristic Presentation Format
+ */
+#define BLE_MESH_UUID_GATT_CPF                  BLE_MESH_UUID_DECLARE_16(0x2904)
+#define BLE_MESH_UUID_GATT_CPF_VAL              0x2904
+/** @def BLE_MESH_UUID_VALID_RANGE
+ *  @brief Valid Range Descriptor
+ */
+#define BLE_MESH_UUID_VALID_RANGE               BLE_MESH_UUID_DECLARE_16(0x2906)
+#define BLE_MESH_UUID_VALID_RANGE_VAL           0x2906
+/** @def BLE_MESH_UUID_HIDS_EXT_REPORT
+ *  @brief HID External Report Descriptor
+ */
+#define BLE_MESH_UUID_HIDS_EXT_REPORT           BLE_MESH_UUID_DECLARE_16(0x2907)
+#define BLE_MESH_UUID_HIDS_EXT_REPORT_VAL       0x2907
+/** @def BLE_MESH_UUID_HIDS_REPORT_REF
+ *  @brief HID Report Reference Descriptor
+ */
+#define BLE_MESH_UUID_HIDS_REPORT_REF           BLE_MESH_UUID_DECLARE_16(0x2908)
+#define BLE_MESH_UUID_HIDS_REPORT_REF_VAL       0x2908
+/** @def BLE_MESH_UUID_ES_CONFIGURATION
+ *  @brief Environmental Sensing Configuration Descriptor
+ */
+#define BLE_MESH_UUID_ES_CONFIGURATION          BLE_MESH_UUID_DECLARE_16(0x290b)
+#define BLE_MESH_UUID_ES_CONFIGURATION_VAL      0x290b
+/** @def BLE_MESH_UUID_ES_MEASUREMENT
+ *  @brief Environmental Sensing Measurement Descriptor
+ */
+#define BLE_MESH_UUID_ES_MEASUREMENT            BLE_MESH_UUID_DECLARE_16(0x290c)
+#define BLE_MESH_UUID_ES_MEASUREMENT_VAL        0x290c
+/** @def BLE_MESH_UUID_ES_TRIGGER_SETTING
+ *  @brief Environmental Sensing Trigger Setting Descriptor
+ */
+#define BLE_MESH_UUID_ES_TRIGGER_SETTING        BLE_MESH_UUID_DECLARE_16(0x290d)
+#define BLE_MESH_UUID_ES_TRIGGER_SETTING_VAL    0x290d
+/** @def BLE_MESH_UUID_GAP_DEVICE_NAME
+ *  @brief GAP Characteristic Device Name
+ */
+#define BLE_MESH_UUID_GAP_DEVICE_NAME           BLE_MESH_UUID_DECLARE_16(0x2a00)
+#define BLE_MESH_UUID_GAP_DEVICE_NAME_VAL       0x2a00
+/** @def BLE_MESH_UUID_GAP_APPEARANCE
+ *  @brief GAP Characteristic Appearance
+ */
+#define BLE_MESH_UUID_GAP_APPEARANCE            BLE_MESH_UUID_DECLARE_16(0x2a01)
+#define BLE_MESH_UUID_GAP_APPEARANCE_VAL        0x2a01
+/** @def BLE_MESH_UUID_GAP_PPCP
+ *  @brief GAP Characteristic Peripheral Preferred Connection Parameters
+ */
+#define BLE_MESH_UUID_GAP_PPCP                  BLE_MESH_UUID_DECLARE_16(0x2a04)
+#define BLE_MESH_UUID_GAP_PPCP_VAL              0x2a04
+/** @def BLE_MESH_UUID_GATT_SC
+ *  @brief GATT Characteristic Service Changed
+ */
+#define BLE_MESH_UUID_GATT_SC                   BLE_MESH_UUID_DECLARE_16(0x2a05)
+#define BLE_MESH_UUID_GATT_SC_VAL               0x2a05
+/** @def BLE_MESH_UUID_BAS_BATTERY_LEVEL
+ *  @brief BAS Characteristic Battery Level
+ */
+#define BLE_MESH_UUID_BAS_BATTERY_LEVEL         BLE_MESH_UUID_DECLARE_16(0x2a19)
+#define BLE_MESH_UUID_BAS_BATTERY_LEVEL_VAL     0x2a19
+/** @def BLE_MESH_UUID_DIS_SYSTEM_ID
+ *  @brief DIS Characteristic System ID
+ */
+#define BLE_MESH_UUID_DIS_SYSTEM_ID             BLE_MESH_UUID_DECLARE_16(0x2a23)
+#define BLE_MESH_UUID_DIS_SYSTEM_ID_VAL         0x2a23
+/** @def BLE_MESH_UUID_DIS_MODEL_NUMBER
+ *  @brief DIS Characteristic Model Number String
+ */
+#define BLE_MESH_UUID_DIS_MODEL_NUMBER          BLE_MESH_UUID_DECLARE_16(0x2a24)
+#define BLE_MESH_UUID_DIS_MODEL_NUMBER_VAL      0x2a24
+/** @def BLE_MESH_UUID_DIS_SERIAL_NUMBER
+ *  @brief DIS Characteristic Serial Number String
+ */
+#define BLE_MESH_UUID_DIS_SERIAL_NUMBER         BLE_MESH_UUID_DECLARE_16(0x2a25)
+#define BLE_MESH_UUID_DIS_SERIAL_NUMBER_VAL     0x2a25
+/** @def BLE_MESH_UUID_DIS_FIRMWARE_REVISION
+ *  @brief DIS Characteristic Firmware Revision String
+ */
+#define BLE_MESH_UUID_DIS_FIRMWARE_REVISION     BLE_MESH_UUID_DECLARE_16(0x2a26)
+#define BLE_MESH_UUID_DIS_FIRMWARE_REVISION_VAL 0x2a26
+/** @def BLE_MESH_UUID_DIS_HARDWARE_REVISION
+ *  @brief DIS Characteristic Hardware Revision String
+ */
+#define BLE_MESH_UUID_DIS_HARDWARE_REVISION     BLE_MESH_UUID_DECLARE_16(0x2a27)
+#define BLE_MESH_UUID_DIS_HARDWARE_REVISION_VAL 0x2a27
+/** @def BLE_MESH_UUID_DIS_SOFTWARE_REVISION
+ *  @brief DIS Characteristic Software Revision String
+ */
+#define BLE_MESH_UUID_DIS_SOFTWARE_REVISION     BLE_MESH_UUID_DECLARE_16(0x2a28)
+#define BLE_MESH_UUID_DIS_SOFTWARE_REVISION_VAL 0x2a28
+/** @def BLE_MESH_UUID_DIS_MANUFACTURER_NAME
+ *  @brief DIS Characteristic Manufacturer Name String
+ */
+#define BLE_MESH_UUID_DIS_MANUFACTURER_NAME     BLE_MESH_UUID_DECLARE_16(0x2a29)
+#define BLE_MESH_UUID_DIS_MANUFACTURER_NAME_VAL 0x2a29
+/** @def BLE_MESH_UUID_DIS_PNP_ID
+ *  @brief DIS Characteristic PnP ID
+ */
+#define BLE_MESH_UUID_DIS_PNP_ID                BLE_MESH_UUID_DECLARE_16(0x2a50)
+#define BLE_MESH_UUID_DIS_PNP_ID_VAL            0x2a50
+/** @def BLE_MESH_UUID_CTS_CURRENT_TIME
+ *  @brief CTS Characteristic Current Time
+ */
+#define BLE_MESH_UUID_CTS_CURRENT_TIME          BLE_MESH_UUID_DECLARE_16(0x2a2b)
+#define BLE_MESH_UUID_CTS_CURRENT_TIME_VAL      0x2a2b
+/** @def BLE_MESH_UUID_MAGN_DECLINATION
+ *  @brief Magnetic Declination Characteristic
+ */
+#define BLE_MESH_UUID_MAGN_DECLINATION          BLE_MESH_UUID_DECLARE_16(0x2a2c)
+#define BLE_MESH_UUID_MAGN_DECLINATION_VAL      0x2a2c
+/** @def BLE_MESH_UUID_HRS_MEASUREMENT
+ *  @brief HRS Characteristic Measurement Interval
+ */
+#define BLE_MESH_UUID_HRS_MEASUREMENT           BLE_MESH_UUID_DECLARE_16(0x2a37)
+#define BLE_MESH_UUID_HRS_MEASUREMENT_VAL       0x2a37
+/** @def BLE_MESH_UUID_HRS_BODY_SENSOR
+ *  @brief HRS Characteristic Body Sensor Location
+ */
+#define BLE_MESH_UUID_HRS_BODY_SENSOR           BLE_MESH_UUID_DECLARE_16(0x2a38)
+#define BLE_MESH_UUID_HRS_BODY_SENSOR_VAL       0x2a38
+/** @def BLE_MESH_UUID_HRS_CONTROL_POINT
+ *  @brief HRS Characteristic Control Point
+ */
+#define BLE_MESH_UUID_HRS_CONTROL_POINT         BLE_MESH_UUID_DECLARE_16(0x2a39)
+#define BLE_MESH_UUID_HRS_CONTROL_POINT_VAL     0x2a39
+/** @def BLE_MESH_UUID_HIDS_INFO
+ *  @brief HID Information Characteristic
+ */
+#define BLE_MESH_UUID_HIDS_INFO                 BLE_MESH_UUID_DECLARE_16(0x2a4a)
+#define BLE_MESH_UUID_HIDS_INFO_VAL             0x2a4a
+/** @def BLE_MESH_UUID_HIDS_REPORT_MAP
+ *  @brief HID Report Map Characteristic
+ */
+#define BLE_MESH_UUID_HIDS_REPORT_MAP           BLE_MESH_UUID_DECLARE_16(0x2a4b)
+#define BLE_MESH_UUID_HIDS_REPORT_MAP_VAL       0x2a4b
+/** @def BLE_MESH_UUID_HIDS_CTRL_POINT
+ *  @brief HID Control Point Characteristic
+ */
+#define BLE_MESH_UUID_HIDS_CTRL_POINT           BLE_MESH_UUID_DECLARE_16(0x2a4c)
+#define BLE_MESH_UUID_HIDS_CTRL_POINT_VAL       0x2a4c
+/** @def BLE_MESH_UUID_HIDS_REPORT
+ *  @brief HID Report Characteristic
+ */
+#define BLE_MESH_UUID_HIDS_REPORT               BLE_MESH_UUID_DECLARE_16(0x2a4d)
+#define BLE_MESH_UUID_HIDS_REPORT_VAL           0x2a4d
+/** @def BLE_MESH_UUID_CSC_MEASUREMENT
+ *  @brief CSC Measurement Characteristic
+ */
+#define BLE_MESH_UUID_CSC_MEASUREMENT           BLE_MESH_UUID_DECLARE_16(0x2a5b)
+#define BLE_MESH_UUID_CSC_MEASUREMENT_VAL       0x2a5b
+/** @def BLE_MESH_UUID_CSC_FEATURE
+ *  @brief CSC Feature Characteristic
+ */
+#define BLE_MESH_UUID_CSC_FEATURE               BLE_MESH_UUID_DECLARE_16(0x2a5c)
+#define BLE_MESH_UUID_CSC_FEATURE_VAL           0x2a5c
+/** @def BLE_MESH_UUID_SENSOR_LOCATION
+ *  @brief Sensor Location Characteristic
+ */
+#define BLE_MESH_UUID_SENSOR_LOCATION           BLE_MESH_UUID_DECLARE_16(0x2a5d)
+#define BLE_MESH_UUID_SENSOR_LOCATION_VAL       0x2a5d
+/** @def BLE_MESH_UUID_SC_CONTROL_POINT
+ *  @brief SC Control Point Characteristic
+ */
+#define BLE_MESH_UUID_SC_CONTROL_POINT          BLE_MESH_UUID_DECLARE_16(0x2a55)
+#define BLE_MESH_UUID_SC_CONTROL_POINT_VAl      0x2a55
+/** @def BLE_MESH_UUID_ELEVATION
+ *  @brief Elevation Characteristic
+ */
+#define BLE_MESH_UUID_ELEVATION                 BLE_MESH_UUID_DECLARE_16(0x2a6c)
+#define BLE_MESH_UUID_ELEVATION_VAL             0x2a6c
+/** @def BLE_MESH_UUID_PRESSURE
+ *  @brief Pressure Characteristic
+ */
+#define BLE_MESH_UUID_PRESSURE                  BLE_MESH_UUID_DECLARE_16(0x2a6d)
+#define BLE_MESH_UUID_PRESSURE_VAL              0x2a6d
+/** @def BLE_MESH_UUID_TEMPERATURE
+ *  @brief Temperature Characteristic
+ */
+#define BLE_MESH_UUID_TEMPERATURE               BLE_MESH_UUID_DECLARE_16(0x2a6e)
+#define BLE_MESH_UUID_TEMPERATURE_VAL           0x2a6e
+/** @def BLE_MESH_UUID_HUMIDITY
+ *  @brief Humidity Characteristic
+ */
+#define BLE_MESH_UUID_HUMIDITY                  BLE_MESH_UUID_DECLARE_16(0x2a6f)
+#define BLE_MESH_UUID_HUMIDITY_VAL              0x2a6f
+/** @def BLE_MESH_UUID_TRUE_WIND_SPEED
+ *  @brief True Wind Speed Characteristic
+ */
+#define BLE_MESH_UUID_TRUE_WIND_SPEED           BLE_MESH_UUID_DECLARE_16(0x2a70)
+#define BLE_MESH_UUID_TRUE_WIND_SPEED_VAL       0x2a70
+/** @def BLE_MESH_UUID_TRUE_WIND_DIR
+ *  @brief True Wind Direction Characteristic
+ */
+#define BLE_MESH_UUID_TRUE_WIND_DIR             BLE_MESH_UUID_DECLARE_16(0x2a71)
+#define BLE_MESH_UUID_TRUE_WIND_DIR_VAL         0x2a71
+/** @def BLE_MESH_UUID_APPARENT_WIND_SPEED
+ *  @brief Apparent Wind Speed Characteristic
+ */
+#define BLE_MESH_UUID_APPARENT_WIND_SPEED       BLE_MESH_UUID_DECLARE_16(0x2a72)
+#define BLE_MESH_UUID_APPARENT_WIND_SPEED_VAL   0x2a72
+/** @def BLE_MESH_UUID_APPARENT_WIND_DIR
+ *  @brief Apparent Wind Direction Characteristic
+ */
+#define BLE_MESH_UUID_APPARENT_WIND_DIR         BLE_MESH_UUID_DECLARE_16(0x2a73)
+#define BLE_MESH_UUID_APPARENT_WIND_DIR_VAL     0x2a73
+/** @def BLE_MESH_UUID_GUST_FACTOR
+ *  @brief Gust Factor Characteristic
+ */
+#define BLE_MESH_UUID_GUST_FACTOR               BLE_MESH_UUID_DECLARE_16(0x2a74)
+#define BLE_MESH_UUID_GUST_FACTOR_VAL           0x2a74
+/** @def BLE_MESH_UUID_POLLEN_CONCENTRATION
+ *  @brief Pollen Concentration Characteristic
+ */
+#define BLE_MESH_UUID_POLLEN_CONCENTRATION      BLE_MESH_UUID_DECLARE_16(0x2a75)
+#define BLE_MESH_UUID_POLLEN_CONCENTRATION_VAL  0x2a75
+/** @def BLE_MESH_UUID_UV_INDEX
+ *  @brief UV Index Characteristic
+ */
+#define BLE_MESH_UUID_UV_INDEX                  BLE_MESH_UUID_DECLARE_16(0x2a76)
+#define BLE_MESH_UUID_UV_INDEX_VAL              0x2a76
+/** @def BLE_MESH_UUID_IRRADIANCE
+ *  @brief Irradiance Characteristic
+ */
+#define BLE_MESH_UUID_IRRADIANCE                BLE_MESH_UUID_DECLARE_16(0x2a77)
+#define BLE_MESH_UUID_IRRADIANCE_VAL            0x2a77
+/** @def BLE_MESH_UUID_RAINFALL
+ *  @brief Rainfall Characteristic
+ */
+#define BLE_MESH_UUID_RAINFALL                  BLE_MESH_UUID_DECLARE_16(0x2a78)
+#define BLE_MESH_UUID_RAINFALL_VAL              0x2a78
+/** @def BLE_MESH_UUID_WIND_CHILL
+ *  @brief Wind Chill Characteristic
+ */
+#define BLE_MESH_UUID_WIND_CHILL                BLE_MESH_UUID_DECLARE_16(0x2a79)
+#define BLE_MESH_UUID_WIND_CHILL_VAL            0x2a79
+/** @def BLE_MESH_UUID_HEAT_INDEX
+ *  @brief Heat Index Characteristic
+ */
+#define BLE_MESH_UUID_HEAT_INDEX                BLE_MESH_UUID_DECLARE_16(0x2a7a)
+#define BLE_MESH_UUID_HEAT_INDEX_VAL            0x2a7a
+/** @def BLE_MESH_UUID_DEW_POINT
+ *  @brief Dew Point Characteristic
+ */
+#define BLE_MESH_UUID_DEW_POINT                 BLE_MESH_UUID_DECLARE_16(0x2a7b)
+#define BLE_MESH_UUID_DEW_POINT_VAL             0x2a7b
+/** @def BLE_MESH_UUID_DESC_VALUE_CHANGED
+ *  @brief Descriptor Value Changed Characteristic
+ */
+#define BLE_MESH_UUID_DESC_VALUE_CHANGED        BLE_MESH_UUID_DECLARE_16(0x2a7d)
+#define BLE_MESH_UUID_DESC_VALUE_CHANGED_VAL    0x2a7d
+/** @def BLE_MESH_UUID_MAGN_FLUX_DENSITY_2D
+ *  @brief Magnetic Flux Density - 2D Characteristic
+ */
+#define BLE_MESH_UUID_MAGN_FLUX_DENSITY_2D      BLE_MESH_UUID_DECLARE_16(0x2aa0)
+#define BLE_MESH_UUID_MAGN_FLUX_DENSITY_2D_VAL  0x2aa0
+/** @def BLE_MESH_UUID_MAGN_FLUX_DENSITY_3D
+ *  @brief Magnetic Flux Density - 3D Characteristic
+ */
+#define BLE_MESH_UUID_MAGN_FLUX_DENSITY_3D      BLE_MESH_UUID_DECLARE_16(0x2aa1)
+#define BLE_MESH_UUID_MAGN_FLUX_DENSITY_3D_VAL  0x2aa1
+/** @def BLE_MESH_UUID_BAR_PRESSURE_TREND
+ *  @brief Barometric Pressure Trend Characteristic
+ */
+#define BLE_MESH_UUID_BAR_PRESSURE_TREND        BLE_MESH_UUID_DECLARE_16(0x2aa3)
+#define BLE_MESH_UUID_BAR_PRESSURE_TREND_VAL    0x2aa3
+/** @def BLE_MESH_UUID_MESH_PROV_DATA_IN
+ *  @brief Mesh Provisioning Data In
+ */
+#define BLE_MESH_UUID_MESH_PROV_DATA_IN         BLE_MESH_UUID_DECLARE_16(0x2adb)
+#define BLE_MESH_UUID_MESH_PROV_DATA_IN_VAL     0x2adb
+/** @def BLE_MESH_UUID_MESH_PROV_DATA_OUT
+ *  @brief Mesh Provisioning Data Out
+ */
+#define BLE_MESH_UUID_MESH_PROV_DATA_OUT        BLE_MESH_UUID_DECLARE_16(0x2adc)
+#define BLE_MESH_UUID_MESH_PROV_DATA_OUT_VAL    0x2adc
+/** @def BLE_MESH_UUID_MESH_PROXY_DATA_IN
+ *  @brief Mesh Proxy Data In
+ */
+#define BLE_MESH_UUID_MESH_PROXY_DATA_IN        BLE_MESH_UUID_DECLARE_16(0x2add)
+#define BLE_MESH_UUID_MESH_PROXY_DATA_IN_VAL    0x2add
+/** @def BLE_MESH_UUID_MESH_PROXY_DATA_OUT
+ *  @brief Mesh Proxy Data Out
+ */
+#define BLE_MESH_UUID_MESH_PROXY_DATA_OUT       BLE_MESH_UUID_DECLARE_16(0x2ade)
+#define BLE_MESH_UUID_MESH_PROXY_DATA_OUT_VAL   0x2ade
+
+/*
+ * Protocol UUIDs
+ */
+#define BLE_MESH_UUID_SDP                       BLE_MESH_UUID_DECLARE_16(0x0001)
+#define BLE_MESH_UUID_SDP_VAL                   0x0001
+#define BLE_MESH_UUID_UDP                       BLE_MESH_UUID_DECLARE_16(0x0002)
+#define BLE_MESH_UUID_UDP_VAL                   0x0002
+#define BLE_MESH_UUID_RFCOMM                    BLE_MESH_UUID_DECLARE_16(0x0003)
+#define BLE_MESH_UUID_RFCOMM_VAL                0x0003
+#define BLE_MESH_UUID_TCP                       BLE_MESH_UUID_DECLARE_16(0x0004)
+#define BLE_MESH_UUID_TCP_VAL                   0x0004
+#define BLE_MESH_UUID_TCS_BIN                   BLE_MESH_UUID_DECLARE_16(0x0005)
+#define BLE_MESH_UUID_TCS_BIN_VAL               0x0005
+#define BLE_MESH_UUID_TCS_AT                    BLE_MESH_UUID_DECLARE_16(0x0006)
+#define BLE_MESH_UUID_TCS_AT_VAL                0x0006
+#define BLE_MESH_UUID_ATT                       BLE_MESH_UUID_DECLARE_16(0x0007)
+#define BLE_MESH_UUID_ATT_VAL                   0x0007
+#define BLE_MESH_UUID_OBEX                      BLE_MESH_UUID_DECLARE_16(0x0008)
+#define BLE_MESH_UUID_OBEX_VAL                  0x0008
+#define BLE_MESH_UUID_IP                        BLE_MESH_UUID_DECLARE_16(0x0009)
+#define BLE_MESH_UUID_IP_VAL                    0x0009
+#define BLE_MESH_UUID_FTP                       BLE_MESH_UUID_DECLARE_16(0x000a)
+#define BLE_MESH_UUID_FTP_VAL                   0x000a
+#define BLE_MESH_UUID_HTTP                      BLE_MESH_UUID_DECLARE_16(0x000c)
+#define BLE_MESH_UUID_HTTP_VAL                  0x000c
+#define BLE_MESH_UUID_BNEP                      BLE_MESH_UUID_DECLARE_16(0x000f)
+#define BLE_MESH_UUID_BNEP_VAL                  0x000f
+#define BLE_MESH_UUID_UPNP                      BLE_MESH_UUID_DECLARE_16(0x0010)
+#define BLE_MESH_UUID_UPNP_VAL                  0x0010
+#define BLE_MESH_UUID_HIDP                      BLE_MESH_UUID_DECLARE_16(0x0011)
+#define BLE_MESH_UUID_HIDP_VAL                  0x0011
+#define BLE_MESH_UUID_HCRP_CTRL                 BLE_MESH_UUID_DECLARE_16(0x0012)
+#define BLE_MESH_UUID_HCRP_CTRL_VAL             0x0012
+#define BLE_MESH_UUID_HCRP_DATA                 BLE_MESH_UUID_DECLARE_16(0x0014)
+#define BLE_MESH_UUID_HCRP_DATA_VAL             0x0014
+#define BLE_MESH_UUID_HCRP_NOTE                 BLE_MESH_UUID_DECLARE_16(0x0016)
+#define BLE_MESH_UUID_HCRP_NOTE_VAL             0x0016
+#define BLE_MESH_UUID_AVCTP                     BLE_MESH_UUID_DECLARE_16(0x0017)
+#define BLE_MESH_UUID_AVCTP_VAL                 0x0017
+#define BLE_MESH_UUID_AVDTP                     BLE_MESH_UUID_DECLARE_16(0x0019)
+#define BLE_MESH_UUID_AVDTP_VAL                 0x0019
+#define BLE_MESH_UUID_CMTP                      BLE_MESH_UUID_DECLARE_16(0x001b)
+#define BLE_MESH_UUID_CMTP_VAL                  0x001b
+#define BLE_MESH_UUID_UDI                       BLE_MESH_UUID_DECLARE_16(0x001d)
+#define BLE_MESH_UUID_UDI_VAL                   0x001d
+#define BLE_MESH_UUID_MCAP_CTRL                 BLE_MESH_UUID_DECLARE_16(0x001e)
+#define BLE_MESH_UUID_MCAP_CTRL_VAL             0x001e
+#define BLE_MESH_UUID_MCAP_DATA                 BLE_MESH_UUID_DECLARE_16(0x001f)
+#define BLE_MESH_UUID_MCAP_DATA_VAL             0x001f
+#define BLE_MESH_UUID_L2CAP                     BLE_MESH_UUID_DECLARE_16(0x0100)
+#define BLE_MESH_UUID_L2CAP_VAL                 0x0100
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* _BLE_MESH_UUID_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/local_operation.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/local_operation.h
new file mode 100644
index 00000000000..f7f169d1f8c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/local_operation.h
@@ -0,0 +1,41 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _LOCAL_OPERATION_H_
+#define _LOCAL_OPERATION_H_
+
+#include "mesh_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int bt_mesh_model_subscribe_group_addr(uint16_t elem_addr, uint16_t mod_id,
+                                       uint16_t cid, uint16_t group_addr);
+
+int bt_mesh_model_unsubscribe_group_addr(uint16_t elem_addr, uint16_t cid,
+                                         uint16_t mod_id, uint16_t group_addr);
+
+const uint8_t *bt_mesh_node_get_local_net_key(uint16_t net_idx);
+
+const uint8_t *bt_mesh_node_get_local_app_key(uint16_t app_idx);
+
+int bt_mesh_node_local_net_key_add(uint16_t net_idx, const uint8_t net_key[16]);
+
+int bt_mesh_node_local_app_key_add(uint16_t net_idx, uint16_t app_idx,
+                                   const uint8_t app_key[16]);
+
+int bt_mesh_node_bind_app_key_to_model(uint16_t elem_addr, uint16_t mod_id,
+                                       uint16_t cid, uint16_t app_idx);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LOCAL_OPERATION_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/lpn.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/lpn.h
new file mode 100644
index 00000000000..dbff49d624d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/lpn.h
@@ -0,0 +1,78 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _LPN_H_
+#define _LPN_H_
+
+#include "net.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int bt_mesh_lpn_friend_update(struct bt_mesh_net_rx *rx,
+                              struct net_buf_simple *buf);
+int bt_mesh_lpn_friend_offer(struct bt_mesh_net_rx *rx,
+                             struct net_buf_simple *buf);
+int bt_mesh_lpn_friend_clear_cfm(struct bt_mesh_net_rx *rx,
+                                 struct net_buf_simple *buf);
+int bt_mesh_lpn_friend_sub_cfm(struct bt_mesh_net_rx *rx,
+                               struct net_buf_simple *buf);
+
+static inline bool bt_mesh_lpn_established(void)
+{
+#if defined(CONFIG_BLE_MESH_LOW_POWER)
+    return bt_mesh.lpn.established;
+#else
+    return false;
+#endif
+}
+
+static inline bool bt_mesh_lpn_match(uint16_t addr)
+{
+#if defined(CONFIG_BLE_MESH_LOW_POWER)
+    if (bt_mesh_lpn_established()) {
+        return (addr == bt_mesh.lpn.frnd);
+    }
+#endif
+    return false;
+}
+
+static inline bool bt_mesh_lpn_waiting_update(void)
+{
+#if defined(CONFIG_BLE_MESH_LOW_POWER)
+    return (bt_mesh.lpn.state == BLE_MESH_LPN_WAIT_UPDATE);
+#else
+    return false;
+#endif
+}
+
+static inline bool bt_mesh_lpn_timer(void)
+{
+#if defined(CONFIG_BLE_MESH_LPN_AUTO)
+    return (bt_mesh.lpn.state == BLE_MESH_LPN_TIMER);
+#else
+    return false;
+#endif
+}
+
+void bt_mesh_lpn_msg_received(struct bt_mesh_net_rx *rx);
+
+void bt_mesh_lpn_group_add(uint16_t group);
+void bt_mesh_lpn_group_del(uint16_t *groups, size_t group_count);
+
+void bt_mesh_lpn_disable(bool force);
+
+int bt_mesh_lpn_init(void);
+int bt_mesh_lpn_deinit(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LPN_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/mesh.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/mesh.h
new file mode 100644
index 00000000000..33155aa555c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/mesh.h
@@ -0,0 +1,33 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _MESH_H_
+#define _MESH_H_
+
+#include "net.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BLE_MESH_KEY_PRIMARY            0x0000
+#define BLE_MESH_KEY_ANY                0xffff
+
+#define BLE_MESH_ADDR_IS_UNICAST(addr)  ((addr) && (addr) < 0x8000)
+#define BLE_MESH_ADDR_IS_GROUP(addr)    ((addr) >= 0xc000 && (addr) <= 0xff00)
+#define BLE_MESH_ADDR_IS_VIRTUAL(addr)  ((addr) >= 0x8000 && (addr) < 0xc000)
+#define BLE_MESH_ADDR_IS_RFU(addr)      ((addr) >= 0xff00 && (addr) <= 0xfffb)
+
+struct bt_mesh_net;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _MESH_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/net.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/net.h
new file mode 100644
index 00000000000..8a1b9b343a3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/net.h
@@ -0,0 +1,424 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _NET_H_
+#define _NET_H_
+
+#include "mesh_access.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BLE_MESH_NET_FLAG_KR       BIT(0)
+#define BLE_MESH_NET_FLAG_IVU      BIT(1)
+
+#define BLE_MESH_KR_NORMAL         0x00
+#define BLE_MESH_KR_PHASE_1        0x01
+#define BLE_MESH_KR_PHASE_2        0x02
+#define BLE_MESH_KR_PHASE_3        0x03
+
+#define BLE_MESH_IV_UPDATE(flags)   ((flags >> 1) & 0x01)
+#define BLE_MESH_KEY_REFRESH(flags) (flags & 0x01)
+
+/* How many hours in between updating IVU duration */
+#define BLE_MESH_IVU_MIN_HOURS      96
+#define BLE_MESH_IVU_HOURS          (BLE_MESH_IVU_MIN_HOURS / CONFIG_BLE_MESH_IVU_DIVIDER)
+#define BLE_MESH_IVU_TIMEOUT        K_HOURS(BLE_MESH_IVU_HOURS)
+
+struct bt_mesh_app_key {
+    uint16_t net_idx;
+    uint16_t app_idx;
+    bool     updated;
+    struct bt_mesh_app_keys {
+        uint8_t id;
+        uint8_t val[16];
+    } keys[2];
+};
+
+struct bt_mesh_subnet {
+    uint32_t beacon_sent;       /* Timestamp of last sent beacon */
+    uint8_t  beacons_last;      /* Number of beacons during last observation window. */
+    uint8_t  beacons_cur;       /* Number of beacons observed during currently ongoing window. */
+
+    uint8_t  beacon_cache[21];  /* Cached last authenticated beacon */
+
+    uint16_t net_idx;           /* NetKeyIndex */
+
+    bool     kr_flag;           /* Key Refresh Flag */
+    uint8_t  kr_phase;          /* Key Refresh Phase */
+
+    uint8_t  node_id;           /* Node Identity State */
+    uint32_t node_id_start;     /* Node Identity started timestamp */
+
+    uint8_t  auth[8];           /* Beacon Authentication Value */
+
+    struct bt_mesh_subnet_keys {
+        uint8_t net[16];        /* NetKey */
+        uint8_t nid;            /* NID */
+        uint8_t enc[16];        /* EncKey */
+        uint8_t net_id[8];      /* Network ID */
+#if defined(CONFIG_BLE_MESH_GATT_PROXY_SERVER)
+        uint8_t identity[16];   /* IdentityKey */
+#endif
+        uint8_t privacy[16];    /* PrivacyKey */
+        uint8_t beacon[16];     /* BeaconKey */
+    } keys[2];
+};
+
+struct bt_mesh_rpl {
+    uint16_t src;
+    bool     old_iv;
+#if defined(CONFIG_BLE_MESH_SETTINGS)
+    bool     store;
+#endif
+    uint32_t seq;
+};
+
+#if defined(CONFIG_BLE_MESH_FRIEND)
+#define FRIEND_SEG_RX           CONFIG_BLE_MESH_FRIEND_SEG_RX
+#define FRIEND_SUB_LIST_SIZE    CONFIG_BLE_MESH_FRIEND_SUB_LIST_SIZE
+#else
+#define FRIEND_SEG_RX           0
+#define FRIEND_SUB_LIST_SIZE    0
+#endif
+
+struct bt_mesh_friend {
+    uint16_t lpn;
+    uint8_t  recv_delay;
+    uint8_t  fsn:1,
+             send_last:1,
+             pending_req:1,
+             sec_update:1,
+             pending_buf:1,
+             valid:1,
+             established:1;
+    int32_t  poll_to;
+    uint8_t  num_elem;
+    uint16_t lpn_counter;
+    uint16_t counter;
+
+    uint16_t net_idx;
+
+    uint16_t sub_list[FRIEND_SUB_LIST_SIZE];
+
+    struct k_delayed_work timer;
+
+    struct bt_mesh_friend_seg {
+        sys_slist_t queue;
+
+        /* The target number of segments, i.e. not necessarily
+         * the current number of segments, in the queue. This is
+         * used for Friend Queue free space calculations.
+         */
+        uint8_t seg_count;
+    } seg[FRIEND_SEG_RX];
+
+    struct net_buf *last;
+
+    sys_slist_t queue;
+    uint32_t    queue_size;
+
+    /* Friend Clear Procedure */
+    struct {
+        uint32_t start;               /* Clear Procedure start */
+        uint16_t frnd;                /* Previous Friend's address */
+        uint16_t repeat_sec;          /* Repeat timeout in seconds */
+        struct k_delayed_work timer;  /* Repeat timer */
+    } clear;
+};
+
+#if defined(CONFIG_BLE_MESH_LOW_POWER)
+#define LPN_GROUPS CONFIG_BLE_MESH_LPN_GROUPS
+#else
+#define LPN_GROUPS 0
+#endif
+
+/* Low Power Node state */
+struct bt_mesh_lpn {
+    enum __packed {
+        BLE_MESH_LPN_DISABLED,     /* LPN feature is disabled */
+        BLE_MESH_LPN_CLEAR,        /* Clear in progress */
+        BLE_MESH_LPN_TIMER,        /* Waiting for auto timer expiry */
+        BLE_MESH_LPN_ENABLED,      /* LPN enabled, but no Friend */
+        BLE_MESH_LPN_REQ_WAIT,     /* Wait before scanning for offers */
+        BLE_MESH_LPN_WAIT_OFFER,   /* Friend Req sent */
+        BLE_MESH_LPN_ESTABLISHED,  /* Friendship established */
+        BLE_MESH_LPN_RECV_DELAY,   /* Poll sent, waiting ReceiveDelay */
+        BLE_MESH_LPN_WAIT_UPDATE,  /* Waiting for Update or message */
+        BLE_MESH_LPN_OFFER_RECV,   /* Friend offer received */
+    } state;
+
+    /* Transaction Number (used for subscription list) */
+    uint8_t xact_next;
+    uint8_t xact_pending;
+    uint8_t sent_req;
+
+    /* Address of our Friend when we're a LPN. Unassigned if we don't
+     * have a friend yet.
+     */
+    uint16_t frnd;
+
+    /* Value from the friend offer */
+    uint8_t  recv_win;
+
+    uint8_t  req_attempts;     /* Number of Request attempts */
+
+    int32_t  poll_timeout;
+
+    uint8_t  groups_changed: 1, /* Friend Subscription List needs updating */
+             pending_poll: 1,   /* Poll to be sent after subscription */
+             disable: 1,        /* Disable LPN after clearing */
+             fsn: 1,            /* Friend Sequence Number */
+             established: 1,    /* Friendship established */
+             clear_success: 1;  /* Friend Clear Confirm received */
+
+    /* Friend Queue Size */
+    uint8_t  queue_size;
+
+    /* LPNCounter */
+    uint16_t counter;
+
+    /* Previous Friend of this LPN */
+    uint16_t old_friend;
+
+    /* Duration reported for last advertising packet */
+    uint16_t adv_duration;
+
+    /* Next LPN related action timer */
+    struct k_delayed_work timer;
+
+    /* Subscribed groups */
+    uint16_t groups[LPN_GROUPS];
+
+    /* Bit fields for tracking which groups the Friend knows about */
+    BLE_MESH_ATOMIC_DEFINE(added, LPN_GROUPS);
+    BLE_MESH_ATOMIC_DEFINE(pending, LPN_GROUPS);
+    BLE_MESH_ATOMIC_DEFINE(to_remove, LPN_GROUPS);
+};
+
+/* bt_mesh_net.flags */
+enum {
+    BLE_MESH_NODE,            /* Device is a node */
+    BLE_MESH_PROVISIONER,     /* Device is a Provisioner */
+    BLE_MESH_VALID,           /* We have been provisioned */
+    BLE_MESH_VALID_PROV,      /* Provisioner has been enabled */
+    BLE_MESH_SUSPENDED,       /* Network is temporarily suspended */
+    BLE_MESH_IVU_IN_PROGRESS, /* IV Update in Progress */
+    BLE_MESH_IVU_INITIATOR,   /* IV Update initiated by us */
+    BLE_MESH_IVU_TEST,        /* IV Update test mode */
+    BLE_MESH_IVU_PENDING,     /* Update blocked by SDU in progress */
+
+    /* pending storage actions, must reside within first 32 flags */
+    BLE_MESH_RPL_PENDING,
+    BLE_MESH_KEYS_PENDING,
+    BLE_MESH_NET_PENDING,
+    BLE_MESH_IV_PENDING,
+    BLE_MESH_SEQ_PENDING,
+    BLE_MESH_HB_PUB_PENDING,
+    BLE_MESH_CFG_PENDING,
+    BLE_MESH_MOD_PENDING,
+    BLE_MESH_VA_PENDING,
+
+    /* Don't touch - intentionally last */
+    BLE_MESH_FLAG_COUNT,
+};
+
+struct bt_mesh_net {
+    uint32_t iv_index; /* Current IV Index */
+    uint32_t seq;      /* Next outgoing sequence number (24 bits) */
+
+    BLE_MESH_ATOMIC_DEFINE(flags, BLE_MESH_FLAG_COUNT);
+
+    /* Local network interface */
+    struct k_work local_work;
+    sys_slist_t local_queue;
+
+#if defined(CONFIG_BLE_MESH_FRIEND)
+    /* Friend state, unique for each LPN that we're Friends for */
+    struct bt_mesh_friend frnd[CONFIG_BLE_MESH_FRIEND_LPN_COUNT];
+#endif
+
+#if defined(CONFIG_BLE_MESH_LOW_POWER)
+    struct bt_mesh_lpn lpn;  /* Low Power Node state */
+#endif
+
+    /* Number of hours in current IV Update state */
+    uint8_t ivu_duration;
+
+    /* Timer to track duration in current IV Update state */
+    struct k_delayed_work ivu_timer;
+
+    uint8_t dev_key[16];
+
+    struct bt_mesh_app_key app_keys[CONFIG_BLE_MESH_APP_KEY_COUNT];
+
+    struct bt_mesh_subnet sub[CONFIG_BLE_MESH_SUBNET_COUNT];
+
+    struct bt_mesh_rpl rpl[CONFIG_BLE_MESH_CRPL];
+
+#if defined(CONFIG_BLE_MESH_PROVISIONER)
+    /* Application keys stored by provisioner */
+    struct bt_mesh_app_key *p_app_keys[CONFIG_BLE_MESH_PROVISIONER_APP_KEY_COUNT];
+    /* Next app_idx can be assigned */
+    uint16_t p_app_idx_next;
+
+    /* Network keys stored by provisioner */
+    struct bt_mesh_subnet *p_sub[CONFIG_BLE_MESH_PROVISIONER_SUBNET_COUNT];
+    /* Next net_idx can be assigned */
+    uint16_t p_net_idx_next;
+#endif
+};
+
+/* Network interface */
+enum bt_mesh_net_if {
+    BLE_MESH_NET_IF_ADV,
+    BLE_MESH_NET_IF_LOCAL,
+    BLE_MESH_NET_IF_PROXY,
+    BLE_MESH_NET_IF_PROXY_CFG,
+};
+
+/* Decoding context for Network/Transport data */
+struct bt_mesh_net_rx {
+    struct bt_mesh_subnet *sub;
+    struct bt_mesh_msg_ctx ctx;
+    uint32_t seq;            /* Sequence Number */
+    uint8_t  old_iv:1,       /* iv_index - 1 was used */
+             new_key:1,      /* Data was encrypted with updated key */
+             friend_cred:1,  /* Data was encrypted with friend cred */
+             ctl:1,          /* Network Control */
+             net_if:2,       /* Network interface */
+             local_match:1,  /* Matched a local element */
+             friend_match:1; /* Matched an LPN we're friends for */
+    uint16_t msg_cache_idx;  /* Index of entry in message cache */
+};
+
+/* Encoding context for Network/Transport data */
+struct bt_mesh_net_tx {
+    struct bt_mesh_subnet *sub;
+    struct bt_mesh_msg_ctx *ctx;
+    uint16_t src;
+    uint8_t  xmit;
+    uint8_t  friend_cred:1,
+             aszmic:1,
+             aid: 6;
+};
+
+extern struct bt_mesh_net bt_mesh;
+
+#define BLE_MESH_NET_IVI_TX (bt_mesh.iv_index - \
+                             bt_mesh_atomic_test_bit(bt_mesh.flags, \
+                             BLE_MESH_IVU_IN_PROGRESS))
+#define BLE_MESH_NET_IVI_RX(rx) (bt_mesh.iv_index - (rx)->old_iv)
+
+#define BLE_MESH_NET_HDR_LEN 9
+
+void bt_mesh_msg_cache_clear(uint16_t unicast_addr, uint8_t elem_num);
+
+int bt_mesh_net_keys_create(struct bt_mesh_subnet_keys *keys,
+                            const uint8_t key[16]);
+
+int bt_mesh_net_create(uint16_t idx, uint8_t flags, const uint8_t key[16],
+                       uint32_t iv_index);
+
+uint8_t bt_mesh_net_flags(struct bt_mesh_subnet *sub);
+
+bool bt_mesh_kr_update(struct bt_mesh_subnet *sub, uint8_t new_kr, bool new_key);
+
+void bt_mesh_net_revoke_keys(struct bt_mesh_subnet *sub);
+
+int bt_mesh_net_beacon_update(struct bt_mesh_subnet *sub);
+
+void bt_mesh_rpl_reset(void);
+
+bool bt_mesh_net_iv_update(uint32_t iv_index, bool iv_update);
+
+void bt_mesh_net_sec_update(struct bt_mesh_subnet *sub);
+
+struct bt_mesh_subnet *bt_mesh_subnet_get(uint16_t net_idx);
+
+struct bt_mesh_subnet *bt_mesh_subnet_find(const uint8_t net_id[8], uint8_t flags,
+                                           uint32_t iv_index, const uint8_t auth[8],
+                                           bool *new_key);
+
+int bt_mesh_net_encode(struct bt_mesh_net_tx *tx, struct net_buf_simple *buf,
+                       bool proxy);
+
+int bt_mesh_net_send(struct bt_mesh_net_tx *tx, struct net_buf *buf,
+                     const struct bt_mesh_send_cb *cb, void *cb_data);
+
+int bt_mesh_net_resend(struct bt_mesh_subnet *sub, struct net_buf *buf,
+                       bool new_key, const struct bt_mesh_send_cb *cb,
+                       void *cb_data);
+
+int bt_mesh_net_decode(struct net_buf_simple *data, enum bt_mesh_net_if net_if,
+                       struct bt_mesh_net_rx *rx, struct net_buf_simple *buf);
+
+void bt_mesh_net_recv(struct net_buf_simple *data, int8_t rssi,
+                      enum bt_mesh_net_if net_if);
+
+bool bt_mesh_primary_subnet_exist(void);
+
+uint32_t bt_mesh_next_seq(void);
+
+void bt_mesh_net_start(void);
+
+void bt_mesh_net_init(void);
+void bt_mesh_net_reset(void);
+void bt_mesh_net_deinit(void);
+
+void bt_mesh_net_header_parse(struct net_buf_simple *buf,
+                              struct bt_mesh_net_rx *rx);
+
+/* Friendship Credential Management */
+struct friend_cred {
+    uint16_t net_idx;
+    uint16_t addr;
+
+    uint16_t lpn_counter;
+    uint16_t frnd_counter;
+
+    struct {
+        uint8_t nid;         /* NID */
+        uint8_t enc[16];     /* EncKey */
+        uint8_t privacy[16]; /* PrivacyKey */
+    } cred[2];
+};
+
+int friend_cred_get(struct bt_mesh_subnet *sub, uint16_t addr, uint8_t *nid,
+                    const uint8_t **enc, const uint8_t **priv);
+int friend_cred_set(struct friend_cred *cred, uint8_t idx, const uint8_t net_key[16]);
+void friend_cred_refresh(uint16_t net_idx);
+int friend_cred_update(struct bt_mesh_subnet *sub);
+struct friend_cred *friend_cred_create(struct bt_mesh_subnet *sub, uint16_t addr,
+                                       uint16_t lpn_counter, uint16_t frnd_counter);
+void friend_cred_clear(struct friend_cred *cred);
+int friend_cred_del(uint16_t net_idx, uint16_t addr);
+
+static inline void send_cb_finalize(const struct bt_mesh_send_cb *cb,
+                                    void *cb_data)
+{
+    if (!cb) {
+        return;
+    }
+
+    if (cb->start) {
+        cb->start(0, 0, cb_data);
+    }
+
+    if (cb->end) {
+        cb->end(0, cb_data);
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _NET_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/prov.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/prov.h
new file mode 100644
index 00000000000..789d33a3866
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/prov.h
@@ -0,0 +1,43 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _PROV_H_
+#define _PROV_H_
+
+#include "mesh_main.h"
+#include "mesh_bearer_adapt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void bt_mesh_pb_adv_recv(struct net_buf_simple *buf);
+
+bool bt_prov_active(void);
+
+int bt_mesh_pb_gatt_open(struct bt_mesh_conn *conn);
+int bt_mesh_pb_gatt_close(struct bt_mesh_conn *conn);
+int bt_mesh_pb_gatt_recv(struct bt_mesh_conn *conn, struct net_buf_simple *buf);
+
+int bt_mesh_set_oob_pub_key(const uint8_t pub_key_x[32], const uint8_t pub_key_y[32],
+                            const uint8_t pri_key[32]);
+
+const struct bt_mesh_prov *bt_mesh_prov_get(void);
+
+int bt_mesh_prov_init(const struct bt_mesh_prov *prov);
+int bt_mesh_prov_deinit(void);
+
+void bt_mesh_prov_complete(uint16_t net_idx, const uint8_t net_key[16],
+                           uint16_t addr, uint8_t flags, uint32_t iv_index);
+void bt_mesh_prov_reset(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _PROV_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/provisioner_main.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/provisioner_main.h
new file mode 100644
index 00000000000..9b01e31fb73
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/provisioner_main.h
@@ -0,0 +1,145 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _PROVISIONER_MAIN_H_
+#define _PROVISIONER_MAIN_H_
+
+#include "net.h"
+#include "mesh_bearer_adapt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BLE_MESH_INVALID_NODE_INDEX     0xFFFF
+#define BLE_MESH_NODE_NAME_SIZE         31
+
+/* Each node information stored by provisioner */
+struct bt_mesh_node {
+    /* Device information */
+    uint8_t  addr[6];      /* Node device address */
+    uint8_t  addr_type;    /* Node device address type */
+    uint8_t  dev_uuid[16]; /* Node Device UUID */
+    uint16_t oob_info;     /* Node OOB information */
+
+    /* Provisioning information */
+    uint16_t unicast_addr; /* Node unicast address */
+    uint8_t  element_num;  /* Node element number */
+    uint16_t net_idx;      /* Node NetKey Index */
+    uint8_t  flags;        /* Node key refresh flag and iv update flag */
+    uint32_t iv_index;     /* Node IV Index */
+    uint8_t  dev_key[16];  /* Node device key */
+
+    /* Additional information */
+    char  name[BLE_MESH_NODE_NAME_SIZE + 1]; /* Node name */
+    uint16_t comp_length;  /* Length of Composition Data */
+    uint8_t *comp_data;    /* Value of Composition Data */
+} __packed;
+
+int bt_mesh_provisioner_init(void);
+
+int bt_mesh_provisioner_net_create(void);
+
+void bt_mesh_provisioner_main_reset(bool erase);
+
+int bt_mesh_provisioner_deinit(bool erase);
+
+bool bt_mesh_provisioner_check_is_addr_dup(uint16_t addr, uint8_t elem_num, bool comp_with_own);
+
+uint16_t bt_mesh_provisioner_get_node_count(void);
+
+int bt_mesh_provisioner_restore_node_info(struct bt_mesh_node *node);
+
+int bt_mesh_provisioner_provision(const bt_mesh_addr_t *addr, const uint8_t uuid[16],
+                                  uint16_t oob_info, uint16_t unicast_addr,
+                                  uint8_t element_num, uint16_t net_idx,
+                                  uint8_t flags, uint32_t iv_index,
+                                  const uint8_t dev_key[16], uint16_t *index);
+
+int bt_mesh_provisioner_remove_node(const uint8_t uuid[16]);
+
+int bt_mesh_provisioner_restore_node_name(uint16_t addr, const char *name);
+
+int bt_mesh_provisioner_restore_node_comp_data(uint16_t addr, const uint8_t *data, uint16_t length);
+
+struct bt_mesh_node *bt_mesh_provisioner_get_node_with_uuid(const uint8_t uuid[16]);
+
+struct bt_mesh_node *bt_mesh_provisioner_get_node_with_addr(uint16_t unicast_addr);
+
+int bt_mesh_provisioner_delete_node_with_uuid(const uint8_t uuid[16]);
+
+int bt_mesh_provisioner_delete_node_with_node_addr(uint16_t unicast_addr);
+
+int bt_mesh_provisioner_delete_node_with_dev_addr(const bt_mesh_addr_t *addr);
+
+int bt_mesh_provisioner_set_node_name(uint16_t index, const char *name);
+
+const char *bt_mesh_provisioner_get_node_name(uint16_t index);
+
+uint16_t bt_mesh_provisioner_get_node_index(const char *name);
+
+struct bt_mesh_node *bt_mesh_provisioner_get_node_with_name(const char *name);
+
+const struct bt_mesh_node **bt_mesh_provisioner_get_node_table_entry(void);
+
+int bt_mesh_provisioner_store_node_comp_data(uint16_t addr, const uint8_t *data, uint16_t length);
+
+const uint8_t *bt_mesh_provisioner_net_key_get(uint16_t net_idx);
+
+struct bt_mesh_subnet *bt_mesh_provisioner_subnet_get(uint16_t net_idx);
+
+bool bt_mesh_provisioner_check_msg_dst(uint16_t dst);
+
+const uint8_t *bt_mesh_provisioner_dev_key_get(uint16_t dst);
+
+struct bt_mesh_app_key *bt_mesh_provisioner_app_key_find(uint16_t app_idx);
+
+int bt_mesh_provisioner_local_app_key_add(const uint8_t app_key[16],
+                                          uint16_t net_idx, uint16_t *app_idx);
+
+int bt_mesh_provisioner_local_app_key_update(const uint8_t app_key[16],
+                                             uint16_t net_idx, uint16_t app_idx);
+
+const uint8_t *bt_mesh_provisioner_local_app_key_get(uint16_t net_idx, uint16_t app_idx);
+
+int bt_mesh_provisioner_local_app_key_del(uint16_t net_idx, uint16_t app_idx, bool store);
+
+int bt_mesh_provisioner_local_net_key_add(const uint8_t net_key[16], uint16_t *net_idx);
+
+int bt_mesh_provisioner_local_net_key_update(const uint8_t net_key[16], uint16_t net_idx);
+
+const uint8_t *bt_mesh_provisioner_local_net_key_get(uint16_t net_idx);
+
+int bt_mesh_provisioner_local_net_key_del(uint16_t net_idx, bool store);
+
+/* Provisioner bind local client model with proper appkey index */
+int bt_mesh_provisioner_bind_local_model_app_idx(uint16_t elem_addr, uint16_t mod_id,
+                                                 uint16_t cid, uint16_t app_idx);
+
+typedef void (* bt_mesh_heartbeat_recv_cb_t)(uint16_t hb_src, uint16_t hb_dst,
+                                             uint8_t init_ttl, uint8_t rx_ttl,
+                                             uint8_t hops, uint16_t feat, int8_t rssi);
+
+int bt_mesh_provisioner_recv_heartbeat(bt_mesh_heartbeat_recv_cb_t cb);
+
+int bt_mesh_provisioner_set_heartbeat_filter_type(uint8_t filter_type);
+
+int bt_mesh_provisioner_set_heartbeat_filter_info(uint8_t op, uint16_t src, uint16_t dst);
+
+void bt_mesh_provisioner_heartbeat(uint16_t hb_src, uint16_t hb_dst,
+                                   uint8_t init_ttl, uint8_t rx_ttl,
+                                   uint8_t hops, uint16_t feat, int8_t rssi);
+
+/* Provisioner print own element information */
+int bt_mesh_print_local_composition_data(void);
+
+int bt_mesh_provisioner_store_node_info(struct bt_mesh_node *node);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _PROVISIONER_MAIN_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/provisioner_prov.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/provisioner_prov.h
new file mode 100644
index 00000000000..66827232ad6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/provisioner_prov.h
@@ -0,0 +1,423 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _PROVISIONER_PROV_H_
+#define _PROVISIONER_PROV_H_
+
+#include "mesh_main.h"
+#include "mesh_bearer_adapt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef CONFIG_BLE_MESH_PBA_SAME_TIME
+#define CONFIG_BLE_MESH_PBA_SAME_TIME   0
+#endif
+
+#ifndef CONFIG_BLE_MESH_PBG_SAME_TIME
+#define CONFIG_BLE_MESH_PBG_SAME_TIME   0
+#endif
+
+#define RM_AFTER_PROV  BIT(0)
+#define START_PROV_NOW BIT(1)
+#define FLUSHABLE_DEV  BIT(2)
+
+struct bt_mesh_unprov_dev_add {
+    uint8_t  addr[6];
+    uint8_t  addr_type;
+    uint8_t  uuid[16];
+    uint16_t oob_info;
+    uint8_t  bearer;
+};
+
+struct bt_mesh_device_delete {
+    uint8_t addr[6];
+    uint8_t addr_type;
+    uint8_t uuid[16];
+};
+
+#define NET_IDX_FLAG  BIT(0)
+#define FLAGS_FLAG    BIT(1)
+#define IV_INDEX_FLAG BIT(2)
+
+struct bt_mesh_prov_data_info {
+    union {
+        uint16_t net_idx;
+        uint8_t  flags;
+        uint32_t iv_index;
+    };
+    uint8_t flag;
+};
+
+/* The following APIs are for primary provisioner internal use */
+
+/**
+ * @brief This function decrements the current PB-GATT count.
+ *
+ * @return None
+ */
+void bt_mesh_provisioner_pbg_count_dec(void);
+
+/**
+ * @brief This function clears the part of the link info of the proper device.
+ *
+ * @param[in] addr: Remote device address
+ *
+ * @return None
+ */
+void bt_mesh_provisioner_clear_link_info(const uint8_t addr[6]);
+
+/**
+ * @brief This function handles the received PB-ADV PDUs.
+ *
+ * @param[in] buf: Pointer to the buffer containing generic provisioning PDUs
+ *
+ * @return Zero - success, otherwise - fail
+ */
+void bt_mesh_provisioner_pb_adv_recv(struct net_buf_simple *buf);
+
+/**
+ * @brief This function sends provisioning invite to start
+ *        provisioning this unprovisioned device.
+ *
+ * @param[in] addr: Remote device address
+ * @param[in] conn: Pointer to the bt_conn structure
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_set_prov_conn(const uint8_t addr[6], struct bt_mesh_conn *conn);
+
+/**
+ * @brief This function sends provisioning invite to start
+ *        provisioning this unprovisioned device.
+ *
+ * @param[in] conn: Pointer to the bt_conn structure
+ * @param[in] addr: Address of the connected device
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_pb_gatt_open(struct bt_mesh_conn *conn, uint8_t *addr);
+
+/**
+ * @brief This function resets the used information when
+ *        related connection is terminated.
+ *
+ * @param[in] conn:   Pointer to the bt_conn structure
+ * @param[in] reason: Connection terminated reason
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_pb_gatt_close(struct bt_mesh_conn *conn, uint8_t reason);
+
+/**
+ * @brief This function handles the received PB-GATT provision
+ *        PDUs.
+ *
+ * @param[in] conn: Pointer to the bt_conn structure
+ * @param[in] buf:  Pointer to the buffer containing provision PDUs
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_pb_gatt_recv(struct bt_mesh_conn *conn, struct net_buf_simple *buf);
+
+/**
+ * @brief This function initializes provisioner's PB-GATT and PB-ADV
+ *        related information.
+ *
+ * @param[in] prov_info: Pointer to the application-initialized provisioner info.
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_prov_init(const struct bt_mesh_prov *prov_info);
+
+int bt_mesh_provisioner_prov_reset(bool erase);
+
+/**
+ * @brief This function de-initializes provisioner's PB-GATT and PB-ADV
+ *        related information.
+ *
+ * @param[in] erase: Indicate if erasing provisioning information from flash.
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_prov_deinit(bool erase);
+
+/**
+ * @brief This function parses the received unprovisioned device
+ *        beacon advertising packets, and if checked, starts to provision this device
+ *        using PB-ADV bearer.
+ *
+ * @param[in] buf:  Pointer to the buffer containing unprovisioned device beacon
+ * @param[in] rssi: RSSI of the received unprovisioned device beacon
+ *
+ * @return None
+ */
+void bt_mesh_provisioner_unprov_beacon_recv(struct net_buf_simple *buf, int8_t rssi);
+
+void bt_mesh_provisioner_prov_adv_recv(struct net_buf_simple *buf,
+                                       const bt_mesh_addr_t *addr, int8_t rssi);
+
+/**
+ * @brief This function gets the bt_mesh_prov pointer.
+ *
+ * @return bt_mesh_prov pointer(prov)
+ */
+const struct bt_mesh_prov *bt_mesh_provisioner_get_prov_info(void);
+
+void bt_mesh_provisioner_restore_prov_info(uint16_t primary_addr, uint16_t alloc_addr);
+
+/* The following APIs are for primary provisioner application use */
+
+/** @brief Add unprovisioned device info to unprov_dev queue
+ *
+ *  @param[in] add_dev: Pointer to the structure containing the device information
+ *  @param[in] flags:   Flags indicate several operations of the device information
+ *                       - Remove device information from queue after it is provisioned (BIT0)
+ *                       - Start provisioning as soon as device is added to queue (BIT1)
+ *                       - Device can be flushed when device queue is full (BIT2)
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ *
+ *  @note  1. Currently address type only supports public address and static random address.
+ *         2. If device UUID and/or device address and address type already exist in the
+ *            device queue, but the bearer differs from the existing one, add operation
+ *            will also be successful and it will update the provision bearer supported by
+ *            the device.
+ */
+int bt_mesh_provisioner_add_unprov_dev(struct bt_mesh_unprov_dev_add *add_dev, uint8_t flags);
+
+/** @brief Provision an unprovisioned device with fixed unicast address.
+ *
+ *  @param[in] uuid:         Device UUID of the unprovisioned device
+ *  @param[in] addr:         Device address of the unprovisioned device
+ *  @param[in] addr_type:    Device address type of the unprovisioned device
+ *  @param[in] bearer:       Provisioning bearer going to be used
+ *  @param[in] oob_info:     OOB info of the unprovisioned device
+ *  @param[in] unicast_addr: Unicast address going to be allocated for the unprovisioned device
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ *
+ *  @note  1. Currently address type only supports public address and static random address.
+ *         2. Bearer must be equal to BLE_MESH_PROV_ADV or BLE_MESH_PROV_GATT
+ */
+int bt_mesh_provisioner_prov_device_with_addr(const uint8_t uuid[16], const uint8_t addr[6],
+                                              uint8_t addr_type, bt_mesh_prov_bearer_t bearer,
+                                              uint16_t oob_info, uint16_t unicast_addr);
+
+/** @brief Delete device from queue, reset current provisioning link and reset the node
+ *
+ *  @param[in] del_dev: Pointer to the structure containing the device information
+ *
+ *  @return Zero on success or (negative) error code otherwise.
+ */
+int bt_mesh_provisioner_delete_device(struct bt_mesh_device_delete *del_dev);
+
+/**
+ * @brief This function sets a part of the device UUID for comparison before
+ *        starting to provision the device.
+ *
+ * @param[in] offset: offset of the device UUID to be compared
+ * @param[in] length: length of the device UUID to be compared
+ * @param[in] match:  value to be compared
+ * @param[in] prov_flag: flags indicate if uuid_match advertising packets are received, after that
+ *                       the device will be provisioned at once or reported to the application layer
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_set_dev_uuid_match(uint8_t offset, uint8_t length,
+                                           const uint8_t *match, bool prov_flag);
+
+/** @brief Callback for provisioner receiving advertising packet from unprovisioned devices which are
+ *  not in the unprovisioned device queue.
+ *
+ *  Report on the unprovisioned device beacon and mesh provisioning service advertising data to application layer
+ *
+ *  @param addr      Unprovisioned device address pointer
+ *  @param addr_type Unprovisioned device address type
+ *  @param dev_uuid  Unprovisioned device device UUID pointer
+ *  @param bearer    Advertising packet received from PB-GATT or PB-ADV bearer
+ *  @param adv_type  Adv packet type, currently this is not used and we can use bearer to device
+ *                   the adv_type(ADV_IND or ADV_NONCONN_IND). This parameter will be used, when
+ *                   scan response data will be supported.
+ *  @param rssi      RSSI of the received advertising packet
+ *
+ */
+typedef void (*unprov_adv_pkt_cb_t)(const uint8_t addr[6], const uint8_t addr_type,
+                                    const uint8_t adv_type, const uint8_t dev_uuid[16],
+                                    uint16_t oob_info, bt_mesh_prov_bearer_t bearer, int8_t rssi);
+
+/**
+ * @brief This function registers the callback which notifies the application
+ *        layer of the received mesh provisioning or unprovisioned device
+ *        beacon advertizing packets (from devices not in the unprov device queue).
+ *
+ * @param[in] cb: Callback of the notifying adv pkts function
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_adv_pkt_cb_register(unprov_adv_pkt_cb_t cb);
+
+/**
+ * @brief This function changes net_idx or flags or iv_index used in provisioning data.
+ *
+ * @param[in] info: Pointer of structure containing net_idx or flags or iv_index
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_set_prov_data_info(struct bt_mesh_prov_data_info *info);
+
+/**
+ * @brief This function initializes the provisioning information needed by Provisioner,
+ *        including NetKey Index, flags, IV Index, etc.
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_init_prov_info(void);
+
+/**
+ * @brief This function sets the provisioning bearer type used by Provisioner.
+ *
+ * @param[in] bearers: Provisioning bearer type
+ * @param[in] clear:   Indicate if the corresponding bearer type will be cleared
+ *
+ * @return None
+ */
+void bt_mesh_provisioner_set_prov_bearer(bt_mesh_prov_bearer_t bearers, bool clear);
+
+/**
+ * @brief This function gets the provisioning bearer type used by Provisioner.
+ *
+ * @return Currently supported provisioning bearer type
+ */
+bt_mesh_prov_bearer_t bt_mesh_provisioner_get_prov_bearer(void);
+
+/**
+ * @brief This function sets the Static OOB value used by Provisioner.
+ *
+ * @param[in] value:  Static OOB value
+ * @param[in] length: Static OOB value length
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_set_static_oob_value(const uint8_t *value, uint8_t length);
+
+/**
+ * @brief This function gets the unicast address of primary element of Provisioner.
+ *
+ * @return Unicast address of primary element of Provisioner.
+ */
+uint16_t bt_mesh_provisioner_get_primary_elem_addr(void);
+
+/**
+ * @brief This function sets the unicast address of primary element of Provisioner.
+ *
+ * @param[in] addr: unicast address of primary element
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_set_primary_elem_addr(uint16_t addr);
+
+/**
+ * @brief This function is used to update next allocated address by Provisioner.
+ *
+ * @note  This function is used for mesh internal test.
+ *
+ * @param[in] unicast_addr: unicast address of the node
+ * @param[in] element_num:  element count of the node
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_test_provisioner_update_alloc_addr(uint16_t unicast_addr, uint16_t element_num);
+
+/**
+ * @brief This function is called to input number/string out-put by unprovisioned device.
+ *
+ * @param[in] idx       The provisioning link index
+ * @param[in] val       Pointer of the input number/string
+ * @param[in] num_flag  Flag indicates if it is a number or string
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_set_oob_input_data(const uint8_t idx, const uint8_t *val, bool num_flag);
+
+/**
+ * @brief This function is called to output number/string which will be input by unprovisioned device.
+ *
+ * @param[in] idx       The provisioning link index
+ * @param[in] num       Pointer of the output number/string
+ * @param[in] size      Size of the output number/string
+ * @param[in] num_flag  Flag indicates if it is a number or string
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_set_oob_output_data(const uint8_t idx, const uint8_t *num,
+                                            uint8_t size, bool num_flag);
+
+/**
+ * @brief This function is called to read unprovisioned device's oob public key.
+ *
+ * @param[in] idx        The provisioning link index
+ * @param[in] pub_key_x  Unprovisioned device's Public Key X
+ * @param[in] pub_key_y  Unprovisioned device's Public Key Y
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_provisioner_read_oob_pub_key(const uint8_t idx, const uint8_t pub_key_x[32],
+                                         const uint8_t pub_key_y[32]);
+
+/* The following APIs are for fast provisioning */
+
+/**
+ * @brief This function is called to set fast_prov_flag.
+ *
+ * @param[in] enable: Enable or disable fast provisioning
+ *
+ * @return None
+ */
+void bt_mesh_provisioner_fast_prov_enable(bool enable);
+
+/**
+ * @brief This function is called to set netkey index used for fast provisioning.
+ *
+ * @param[in] net_idx: Netkey index
+ *
+ * @return None
+ */
+void bt_mesh_provisioner_set_fast_prov_net_idx(uint16_t net_idx);
+
+/**
+ * @brief This function is called to get netkey index used for fast provisioning.
+ *
+ * @return net_idx of fast provisioning
+ */
+uint16_t bt_mesh_provisioner_get_fast_prov_net_idx(void);
+
+/**
+ * @brief This function is called to set unicast address range used for fast provisioning.
+ *
+ * @param[in] min: Minimum unicast address
+ * @param[in] max: Maximum unicast address
+ *
+ * @return status for set unicast address range message
+ */
+uint8_t bt_mesh_set_fast_prov_unicast_addr_range(uint16_t min, uint16_t max);
+
+/**
+ * @brief This function is called to set flags & iv_index used for fast provisioning.
+ *
+ * @param[in] flags:    Key refresh flag and iv update flag
+ * @param[in] iv_index: IV index
+ *
+ * @return None
+ */
+void bt_mesh_set_fast_prov_flags_iv_index(uint8_t flags, uint32_t iv_index);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _PROVISIONER_PROV_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/proxy_client.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/proxy_client.h
new file mode 100644
index 00000000000..3c25a9b104d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/proxy_client.h
@@ -0,0 +1,112 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _PROXY_CLIENT_H_
+#define _PROXY_CLIENT_H_
+
+#include "net.h"
+#include "mesh_bearer_adapt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BLE_MESH_PROXY_ADV_NET_ID           0x00
+#define BLE_MESH_PROXY_ADV_NODE_ID          0x01
+
+#define BLE_MESH_PROXY_NET_PDU              0x00
+#define BLE_MESH_PROXY_BEACON               0x01
+#define BLE_MESH_PROXY_CONFIG               0x02
+#define BLE_MESH_PROXY_PROV                 0x03
+
+#define BLE_MESH_PROXY_CFG_FILTER_SET       0x00
+#define BLE_MESH_PROXY_CFG_FILTER_ADD       0x01
+#define BLE_MESH_PROXY_CFG_FILTER_REMOVE    0x02
+#define BLE_MESH_PROXY_CFG_FILTER_STATUS    0x03
+
+typedef union {
+    struct {
+        uint8_t  net_id[8];
+        uint16_t net_idx;
+    } net_id;
+    struct {
+        uint16_t src;
+    } node_id;
+} bt_mesh_proxy_adv_ctx_t;
+
+struct bt_mesh_proxy_net_pdu {
+    struct net_buf_simple *val;
+};
+
+struct bt_mesh_proxy_cfg_pdu {
+    uint8_t opcode;
+    union {
+        struct cfg_filter_set {
+            uint8_t filter_type;
+        } set;
+        struct cfg_addr_add {
+            uint16_t *addr;
+            uint16_t  addr_num;
+        } add;
+        struct cfg_addr_remove {
+            uint16_t *addr;
+            uint16_t  addr_num;
+        } remove;
+    };
+};
+
+typedef struct {
+    uint8_t type;
+    union {
+        struct bt_mesh_proxy_net_pdu net;
+        struct bt_mesh_proxy_cfg_pdu cfg;
+    };
+} bt_mesh_proxy_client_pdu_t;
+
+int bt_mesh_proxy_client_send(struct bt_mesh_conn *conn, uint8_t type,
+                              struct net_buf_simple *msg);
+
+int bt_mesh_proxy_client_prov_enable(void);
+int bt_mesh_proxy_client_prov_disable(void);
+
+int bt_mesh_proxy_client_gatt_enable(void);
+int bt_mesh_proxy_client_gatt_disable(void);
+
+typedef void (*proxy_client_recv_adv_cb_t)(const bt_mesh_addr_t *addr, uint8_t type,
+                                           bt_mesh_proxy_adv_ctx_t *ctx, int8_t rssi);
+typedef void (*proxy_client_connect_cb_t)(const bt_mesh_addr_t *addr,
+                                          uint8_t conn_handle, uint16_t net_idx);
+typedef void (*proxy_client_disconnect_cb_t)(const bt_mesh_addr_t *addr, uint8_t conn_handle,
+                                             uint16_t net_idx, uint8_t reason);
+typedef void (*proxy_client_recv_filter_status_cb_t)(uint8_t conn_handle, uint16_t src, uint16_t net_idx,
+                                                     uint8_t filter_type, uint16_t list_size);
+
+void bt_mesh_proxy_client_set_adv_recv_cb(proxy_client_recv_adv_cb_t cb);
+void bt_mesh_proxy_client_set_conn_cb(proxy_client_connect_cb_t cb);
+void bt_mesh_proxy_client_set_disconn_cb(proxy_client_disconnect_cb_t cb);
+void bt_mesh_proxy_client_set_filter_status_cb(proxy_client_recv_filter_status_cb_t cb);
+
+void bt_mesh_proxy_client_gatt_adv_recv(struct net_buf_simple *buf,
+                                        const bt_mesh_addr_t *addr, int8_t rssi);
+
+int bt_mesh_proxy_client_connect(const uint8_t addr[6], uint8_t addr_type, uint16_t net_idx);
+int bt_mesh_proxy_client_disconnect(uint8_t conn_handle);
+
+bool bt_mesh_proxy_client_beacon_send(struct bt_mesh_subnet *sub);
+
+bool bt_mesh_proxy_client_relay(struct net_buf_simple *buf, uint16_t dst);
+
+int bt_mesh_proxy_client_cfg_send(uint8_t conn_handle, uint16_t net_idx,
+                                  struct bt_mesh_proxy_cfg_pdu *pdu);
+
+int bt_mesh_proxy_client_init(void);
+int bt_mesh_proxy_client_deinit(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _PROXY_CLIENT_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/proxy_server.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/proxy_server.h
new file mode 100644
index 00000000000..d84dbd0ecfa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/proxy_server.h
@@ -0,0 +1,80 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _PROXY_H_
+#define _PROXY_H_
+
+#include "net.h"
+#include "mesh_bearer_adapt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BLE_MESH_PROXY_NET_PDU   0x00
+#define BLE_MESH_PROXY_BEACON    0x01
+#define BLE_MESH_PROXY_CONFIG    0x02
+#define BLE_MESH_PROXY_PROV      0x03
+
+#if CONFIG_BLE_MESH_PROXY
+/**
+ * Device Name Characteristic:
+ * 1. For iOS, when it tries to get the value of Device Name Characteristic, the PDU
+ *    "Read By Type Request" will be used, and the valid length of corresponding
+ *    response is 19 (23 - 1 - 1 - 2).
+ * 2. For Android, when it tries to get the value of Device Name Characteristic, the
+ *    PDU "Read Request" will be used, and the valid length of corresponding response
+ *    is 22 (23 - 1).
+ */
+#define DEVICE_NAME_SIZE    MIN((BLE_MESH_GATT_DEF_MTU_SIZE - 4), (BLE_MESH_GAP_ADV_MAX_LEN - 2))
+#else
+/* For Scan Response Data, the maximum length is 29 (31 - 1 - 1) currently. */
+#define DEVICE_NAME_SIZE    (BLE_MESH_GAP_ADV_MAX_LEN - 2)
+#endif
+
+typedef void (*proxy_server_connect_cb_t)(uint8_t conn_handle);
+typedef void (*proxy_server_disconnect_cb_t)(uint8_t conn_handle, uint8_t reason);
+
+int bt_mesh_set_device_name(const char *name);
+
+int bt_mesh_proxy_server_send(struct bt_mesh_conn *conn, uint8_t type,
+                              struct net_buf_simple *msg);
+
+int bt_mesh_proxy_server_prov_enable(void);
+int bt_mesh_proxy_server_prov_disable(bool disconnect);
+
+void bt_mesh_proxy_server_set_conn_cb(proxy_server_connect_cb_t cb);
+void bt_mesh_proxy_server_set_disconn_cb(proxy_server_disconnect_cb_t cb);
+
+int bt_mesh_proxy_server_gatt_enable(void);
+int bt_mesh_proxy_server_gatt_disable(void);
+
+void bt_mesh_proxy_server_gatt_disconnect(void);
+
+void bt_mesh_proxy_server_beacon_send(struct bt_mesh_subnet *sub);
+
+struct net_buf_simple *bt_mesh_proxy_server_get_buf(void);
+
+int32_t bt_mesh_proxy_server_adv_start(void);
+void bt_mesh_proxy_server_adv_stop(void);
+
+void bt_mesh_proxy_server_identity_start(struct bt_mesh_subnet *sub);
+void bt_mesh_proxy_server_identity_stop(struct bt_mesh_subnet *sub);
+
+bool bt_mesh_proxy_server_relay(struct net_buf_simple *buf, uint16_t dst);
+void bt_mesh_proxy_server_addr_add(struct net_buf_simple *buf, uint16_t addr);
+
+int bt_mesh_proxy_server_init(void);
+int bt_mesh_proxy_server_deinit(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _PROXY_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/scan.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/scan.h
new file mode 100644
index 00000000000..2d999565fad
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/scan.h
@@ -0,0 +1,39 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _SCAN_H_
+#define _SCAN_H_
+
+#include "mesh_bearer_adapt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+const bt_mesh_addr_t *bt_mesh_get_unprov_dev_addr(void);
+
+int bt_mesh_scan_enable(void);
+
+int bt_mesh_scan_disable(void);
+
+int bt_mesh_scan_with_wl_enable(void);
+
+struct bt_mesh_ble_scan_param {
+    uint32_t duration;
+};
+
+int bt_mesh_start_ble_scan(struct bt_mesh_ble_scan_param *param);
+
+int bt_mesh_stop_ble_scan(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SCAN_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/settings.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/settings.h
new file mode 100644
index 00000000000..dd112d70dd9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/settings.h
@@ -0,0 +1,79 @@
+/*
+ * SPDX-FileCopyrightText: 2018 Intel Corporation
+ * SPDX-FileContributor: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _SETTINGS_H_
+#define _SETTINGS_H_
+
+#include "net.h"
+#include "provisioner_main.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BLE_MESH_SETTINGS_ROLE_NONE     0
+#define BLE_MESH_SETTINGS_ROLE_NODE     (BIT(BLE_MESH_NODE))
+#define BLE_MESH_SETTINGS_ROLE_PROV     (BIT(BLE_MESH_PROVISIONER))
+#define BLE_MESH_SETTINGS_ROLE_BIT_MASK (BIT(BLE_MESH_NODE) | BIT(BLE_MESH_PROVISIONER))
+
+void bt_mesh_store_role(void);
+void bt_mesh_store_net(void);
+void bt_mesh_store_iv(bool only_duration);
+void bt_mesh_store_seq(void);
+void bt_mesh_clear_seq(void);
+void bt_mesh_store_rpl(struct bt_mesh_rpl *rpl);
+void bt_mesh_store_subnet(struct bt_mesh_subnet *sub);
+void bt_mesh_store_app_key(struct bt_mesh_app_key *key);
+void bt_mesh_store_hb_pub(void);
+void bt_mesh_store_cfg(void);
+void bt_mesh_store_mod_bind(struct bt_mesh_model *mod);
+void bt_mesh_store_mod_sub(struct bt_mesh_model *mod);
+void bt_mesh_store_mod_pub(struct bt_mesh_model *mod);
+void bt_mesh_store_label(void);
+
+void bt_mesh_clear_role(void);
+void bt_mesh_clear_net(void);
+void bt_mesh_clear_subnet(struct bt_mesh_subnet *sub);
+void bt_mesh_clear_app_key(struct bt_mesh_app_key *key);
+void bt_mesh_clear_rpl(void);
+
+#if CONFIG_BLE_MESH_PROVISIONER
+void bt_mesh_store_prov_info(uint16_t primary_addr, uint16_t alloc_addr);
+void bt_mesh_clear_prov_info(void);
+void bt_mesh_store_p_net_idx(void);
+void bt_mesh_clear_p_net_idx(void);
+void bt_mesh_store_p_app_idx(void);
+void bt_mesh_clear_p_app_idx(void);
+void bt_mesh_store_p_subnet(struct bt_mesh_subnet *sub);
+void bt_mesh_store_p_app_key(struct bt_mesh_app_key *key);
+void bt_mesh_clear_p_subnet(uint16_t net_idx);
+void bt_mesh_clear_p_app_key(uint16_t app_idx);
+void bt_mesh_clear_rpl_single(uint16_t src);
+void bt_mesh_store_node_info(struct bt_mesh_node *node);
+void bt_mesh_clear_node_info(uint16_t unicast_addr);
+void bt_mesh_store_node_name(struct bt_mesh_node *node);
+void bt_mesh_store_node_comp_data(struct bt_mesh_node *node);
+#endif
+
+void bt_mesh_settings_lock(void);
+void bt_mesh_settings_unlock(void);
+
+int settings_core_init(void);
+int settings_core_load(void);
+int settings_core_commit(void);
+int settings_core_deinit(void);
+int settings_core_erase(void);
+
+int bt_mesh_settings_init(void);
+int bt_mesh_settings_deinit(bool erase);
+void bt_mesh_settings_reset(bool erase);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SETTINGS_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/settings_uid.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/settings_uid.h
new file mode 100644
index 00000000000..ef7dc93bc29
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/settings_uid.h
@@ -0,0 +1,39 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _SETTINGS_UID_H_
+#define _SETTINGS_UID_H_
+
+#include "mesh_types.h"
+#include "settings_nvs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int settings_uid_init(void);
+int settings_uid_load(void);
+int settings_uid_deinit(void);
+int settings_uid_erase(void);
+
+int bt_mesh_provisioner_open_settings_with_index(uint8_t index);
+int bt_mesh_provisioner_open_settings_with_uid(const char *id, uint8_t *index);
+int bt_mesh_provisioner_close_settings_with_index(uint8_t index, bool erase);
+int bt_mesh_provisioner_close_settings_with_uid(const char *id, bool erase, uint8_t *index);
+int bt_mesh_provisioner_delete_settings_with_index(uint8_t index);
+int bt_mesh_provisioner_delete_settings_with_uid(const char *id, uint8_t *index);
+
+const char *bt_mesh_provisioner_get_settings_uid(uint8_t index);
+uint8_t bt_mesh_provisioner_get_settings_index(const char *id);
+uint8_t bt_mesh_provisioner_get_free_settings_count(void);
+
+int bt_mesh_provisioner_direct_erase_settings(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SETTINGS_UID_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/storage/settings_nvs.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/storage/settings_nvs.h
new file mode 100644
index 00000000000..a82392cab61
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/storage/settings_nvs.h
@@ -0,0 +1,67 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_SETTINGS_NVS_H_
+#define _BLE_MESH_SETTINGS_NVS_H_
+
+#include "nvs_flash.h"
+#include "mesh_buf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef nvs_handle_t    bt_mesh_nvs_handle_t;
+
+#define SETTINGS_ITEM_SIZE              sizeof(uint16_t)
+
+#define BLE_MESH_GET_ELEM_IDX(x)        ((uint8_t)((x) >> 8))
+#define BLE_MESH_GET_MODEL_IDX(x)       ((uint8_t)(x))
+#define BLE_MESH_GET_MODEL_KEY(a, b)    ((uint16_t)(((uint16_t)((a) << 8)) | (b)))
+
+int bt_mesh_settings_nvs_open(const char* name, bt_mesh_nvs_handle_t *handle);
+void bt_mesh_settings_nvs_close(bt_mesh_nvs_handle_t handle);
+
+void bt_mesh_settings_init_foreach(void);
+void bt_mesh_settings_deinit_foreach(bool erase);
+
+int bt_mesh_settings_direct_open(bt_mesh_nvs_handle_t *handle);
+void bt_mesh_settings_direct_close(void);
+
+int bt_mesh_save_settings(bt_mesh_nvs_handle_t handle, const char *key,
+                          const uint8_t *val, size_t len);
+int bt_mesh_save_core_settings(const char *key, const uint8_t *val, size_t len);
+int bt_mesh_save_uid_settings(const char *key, const uint8_t *val, size_t len);
+
+int bt_mesh_erase_settings(bt_mesh_nvs_handle_t handle, const char *key);
+int bt_mesh_erase_core_settings(const char *key);
+int bt_mesh_erase_uid_settings(const char *name);
+
+int bt_mesh_load_settings(bt_mesh_nvs_handle_t handle, const char *key,
+                          uint8_t *buf, size_t buf_len, bool *exist);
+int bt_mesh_load_core_settings(const char *key, uint8_t *buf, size_t buf_len, bool *exist);
+int bt_mesh_load_uid_settings(const char *key, uint8_t *buf, size_t buf_len, bool *exist);
+
+struct net_buf_simple *bt_mesh_get_settings_item(bt_mesh_nvs_handle_t handle, const char *key);
+struct net_buf_simple *bt_mesh_get_core_settings_item(const char *key);
+struct net_buf_simple *bt_mesh_get_uid_settings_item(const char *key);
+
+int bt_mesh_add_settings_item(bt_mesh_nvs_handle_t handle, const char *key, const uint16_t val);
+int bt_mesh_add_core_settings_item(const char *key, const uint16_t val);
+int bt_mesh_add_uid_settings_item(const char *key, const uint16_t val);
+
+int bt_mesh_remove_settings_item(bt_mesh_nvs_handle_t handle, const char *key, const uint16_t val);
+int bt_mesh_remove_core_settings_item(const char *key, const uint16_t val);
+int bt_mesh_remove_uid_settings_item(const char *key, const uint16_t val);
+
+int bt_mesh_settings_erase_key(bt_mesh_nvs_handle_t handle, const char *key);
+int bt_mesh_settings_erase_all(bt_mesh_nvs_handle_t handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_SETTINGS_NVS_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/test.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/test.h
new file mode 100644
index 00000000000..c02947ac531
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/test.h
@@ -0,0 +1,52 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _BLE_MESH_TEST_H_
+#define _BLE_MESH_TEST_H_
+
+#include "mesh_bearer_adapt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int bt_mesh_test(void);
+
+struct bt_mesh_device_network_info {
+    uint8_t  net_key[16];
+    uint16_t net_idx;
+    uint8_t  flags;
+    uint32_t iv_index;
+    uint16_t unicast_addr;
+    uint8_t  dev_key[16];
+    uint8_t  app_key[16];
+    uint16_t app_idx;
+    uint16_t group_addr;
+};
+
+int bt_mesh_device_auto_enter_network(struct bt_mesh_device_network_info *info);
+
+/* Before trying to update the white list, users need to make sure that
+ * one of the following conditions is satisfied:
+ * 1. BLE scanning is disabled;
+ * 2. BLE scanning is enabled with scan filter policy disabled;
+ * If BLE scanning is enabled with scan filter policy enabled, users need
+ * to stop BLE scanning firstly, then the white list can be updated.
+ */
+int bt_mesh_test_update_white_list(struct bt_mesh_white_list *wl);
+
+int bt_mesh_test_start_scanning(bool wl_en);
+
+int bt_mesh_test_stop_scanning(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BLE_MESH_TEST_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/transport.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/transport.h
new file mode 100644
index 00000000000..015b51e4df4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_core/transport.h
@@ -0,0 +1,128 @@
+/*  Bluetooth Mesh */
+
+/*
+ * SPDX-FileCopyrightText: 2017 Intel Corporation
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _TRANSPORT_H_
+#define _TRANSPORT_H_
+
+#include "net.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define TRANS_SEQ_AUTH_NVAL            0xffffffffffffffff
+
+#define BLE_MESH_SDU_UNSEG_MAX         11
+#define BLE_MESH_CTL_SEG_SDU_MAX       8
+#define BLE_MESH_APP_SEG_SDU_MAX       12
+#define BLE_MESH_TX_SDU_MAX            (CONFIG_BLE_MESH_TX_SEG_MAX * 12)
+
+#define TRANS_SEQ_ZERO_MASK            ((uint16_t)BIT_MASK(13))
+#define TRANS_CTL_OP_MASK              ((uint8_t)BIT_MASK(7))
+#define TRANS_CTL_OP(data)             ((data)[0] & TRANS_CTL_OP_MASK)
+#define TRANS_CTL_HDR(op, seg)         ((op & TRANS_CTL_OP_MASK) | (seg << 7))
+
+#define TRANS_CTL_OP_ACK               0x00
+#define TRANS_CTL_OP_FRIEND_POLL       0x01
+#define TRANS_CTL_OP_FRIEND_UPDATE     0x02
+#define TRANS_CTL_OP_FRIEND_REQ        0x03
+#define TRANS_CTL_OP_FRIEND_OFFER      0x04
+#define TRANS_CTL_OP_FRIEND_CLEAR      0x05
+#define TRANS_CTL_OP_FRIEND_CLEAR_CFM  0x06
+#define TRANS_CTL_OP_FRIEND_SUB_ADD    0x07
+#define TRANS_CTL_OP_FRIEND_SUB_REM    0x08
+#define TRANS_CTL_OP_FRIEND_SUB_CFM    0x09
+#define TRANS_CTL_OP_HEARTBEAT         0x0a
+
+struct bt_mesh_ctl_friend_poll {
+    uint8_t  fsn;
+} __packed;
+
+struct bt_mesh_ctl_friend_update {
+    uint8_t  flags;
+    uint32_t iv_index;
+    uint8_t  md;
+} __packed;
+
+struct bt_mesh_ctl_friend_req {
+    uint8_t  criteria;
+    uint8_t  recv_delay;
+    uint8_t  poll_to[3];
+    uint16_t prev_addr;
+    uint8_t  num_elem;
+    uint16_t lpn_counter;
+} __packed;
+
+struct bt_mesh_ctl_friend_offer {
+    uint8_t  recv_win;
+    uint8_t  queue_size;
+    uint8_t  sub_list_size;
+    int8_t   rssi;
+    uint16_t frnd_counter;
+} __packed;
+
+struct bt_mesh_ctl_friend_clear {
+    uint16_t lpn_addr;
+    uint16_t lpn_counter;
+} __packed;
+
+struct bt_mesh_ctl_friend_clear_confirm {
+    uint16_t lpn_addr;
+    uint16_t lpn_counter;
+} __packed;
+
+#define BLE_MESH_FRIEND_SUB_MIN_LEN (1 + 2)
+struct bt_mesh_ctl_friend_sub {
+    uint8_t  xact;
+    uint16_t addr_list[5];
+} __packed;
+
+struct bt_mesh_ctl_friend_sub_confirm {
+    uint8_t xact;
+} __packed;
+
+uint8_t bt_mesh_get_seg_retrans_num(void);
+
+int32_t bt_mesh_get_seg_retrans_timeout(uint8_t ttl);
+
+void bt_mesh_set_hb_sub_dst(uint16_t addr);
+
+struct bt_mesh_app_key *bt_mesh_app_key_find(uint16_t app_idx);
+
+bool bt_mesh_tx_in_progress(void);
+
+void bt_mesh_rx_reset(bool erase);
+void bt_mesh_tx_reset(void);
+void bt_mesh_rx_reset_single(uint16_t src);
+void bt_mesh_tx_reset_single(uint16_t dst);
+
+int bt_mesh_ctl_send(struct bt_mesh_net_tx *tx, uint8_t ctl_op, void *data,
+                     size_t data_len, const struct bt_mesh_send_cb *cb,
+                     void *cb_data);
+
+int bt_mesh_trans_send(struct bt_mesh_net_tx *tx, struct net_buf_simple *msg,
+                       const struct bt_mesh_send_cb *cb, void *cb_data);
+
+int bt_mesh_trans_recv(struct net_buf_simple *buf, struct bt_mesh_net_rx *rx);
+
+void bt_mesh_trans_init(void);
+void bt_mesh_trans_deinit(bool erase);
+
+bool bt_mesh_rpl_check(struct bt_mesh_net_rx *rx, struct bt_mesh_rpl **match);
+
+void bt_mesh_heartbeat_send(void);
+
+int bt_mesh_app_key_get(const struct bt_mesh_subnet *subnet, uint16_t app_idx,
+                        const uint8_t **key, uint8_t *aid,  uint8_t role, uint16_t dst);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TRANSPORT_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/client_common.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/client_common.h
new file mode 100644
index 00000000000..5d2bc64bec6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/client_common.h
@@ -0,0 +1,122 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _CLIENT_COMMON_H_
+#define _CLIENT_COMMON_H_
+
+#include "mesh_access.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Client model opcode pair table */
+typedef struct {
+    uint32_t cli_op;    /* Client message opcode */
+    uint32_t status_op; /* Corresponding status message opcode */
+} bt_mesh_client_op_pair_t;
+
+/** Client model user data context */
+typedef struct {
+    /** Pointer to the client model */
+    struct bt_mesh_model *model;
+
+    /** Size of the opcode pair table */
+    int op_pair_size;
+
+    /** Pointer to the opcode pair table */
+    const bt_mesh_client_op_pair_t *op_pair;
+
+    /**
+     * @brief This function is a callback function used to push the received unsolicited
+     *        messages to the application layer.
+     *
+     * @param[in]  opcode: Opcode of received status message
+     * @param[in]  model:  Model associated with the status message
+     * @param[in]  ctx:    Context information of the status message
+     * @param[in]  buf:    Buffer contains the status message value
+     *
+     * @return None
+     */
+    void (*publish_status)(uint32_t opcode, struct bt_mesh_model *model, struct bt_mesh_msg_ctx *ctx, struct net_buf_simple *buf);
+
+    /** Pointer to the internal data of client model */
+    void *internal_data;
+
+    /** Role of the device to which the client model belongs */
+    uint8_t msg_role;
+} bt_mesh_client_user_data_t;
+
+/** Client model internal data context */
+typedef struct  {
+    sys_slist_t queue;
+} bt_mesh_client_internal_data_t;
+
+/** Client model sending message related context */
+typedef struct {
+    sys_snode_t client_node;
+    struct bt_mesh_msg_ctx ctx;     /* Message context */
+    uint32_t opcode;                /* Message opcode */
+    uint32_t op_pending;            /* Expected status message opcode */
+    int32_t  timeout;               /* Calculated message timeout value */
+    struct k_delayed_work timer;    /* Time used to get response. Only for internal use. */
+} bt_mesh_client_node_t;
+
+/** Client model sending message parameters */
+typedef struct {
+    uint32_t opcode;                    /* Message opcode */
+    struct bt_mesh_model *model;        /* Pointer to the client model */
+    struct bt_mesh_msg_ctx ctx;         /* Message context */
+    int32_t msg_timeout;                /* Time to get corresponding response */
+    uint8_t msg_role;                   /* Role (Node/Provisioner) of the device */
+    const struct bt_mesh_send_cb *cb;   /* User defined callback function */
+    void *cb_data;                      /* User defined callback value */
+} bt_mesh_client_common_param_t;
+
+void bt_mesh_client_model_lock(void);
+
+void bt_mesh_client_model_unlock(void);
+
+int bt_mesh_client_init(struct bt_mesh_model *model);
+
+int bt_mesh_client_deinit(struct bt_mesh_model *model);
+
+/**
+ * @brief Check if the msg received by client model is a publish msg or not
+ *
+ * @param model     Mesh (client) Model that the message belongs to.
+ * @param ctx       Message context, includes keys, TTL, etc.
+ * @param buf       The message buffer
+ * @param need_pub  Indicate if the msg sent to app layer as a publish msg
+ * @return 0 on success, or (negative) error code on failure.
+ */
+bt_mesh_client_node_t *bt_mesh_is_client_recv_publish_msg(struct bt_mesh_model *model,
+                                                          struct bt_mesh_msg_ctx *ctx,
+                                                          struct net_buf_simple *buf, bool need_pub);
+
+int bt_mesh_client_send_msg(bt_mesh_client_common_param_t *param,
+                            struct net_buf_simple *msg, bool need_ack,
+                            k_work_handler_t timer_handler);
+
+int bt_mesh_client_free_node(bt_mesh_client_node_t *node);
+
+int bt_mesh_client_clear_list(void *data);
+
+/**
+ * @brief Set role of the client model for internal use.
+ *
+ * @param[in] model: Pointer to the client model
+ * @param[in] role:  Role of the device
+ *
+ * @return Zero - success, otherwise - fail
+ */
+int bt_mesh_set_client_model_role(struct bt_mesh_model *model, uint8_t role);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _CLIENT_COMMON_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/generic_client.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/generic_client.h
new file mode 100644
index 00000000000..1e8a45e57f0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/generic_client.h
@@ -0,0 +1,408 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/** @file
+ *  @brief Bluetooth Mesh Generic Client Model APIs.
+ */
+
+#ifndef _GENERIC_CLIENT_H_
+#define _GENERIC_CLIENT_H_
+
+#include "client_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Generic client model common structure */
+typedef bt_mesh_client_user_data_t      bt_mesh_generic_client_t;
+typedef bt_mesh_client_internal_data_t  generic_internal_data_t;
+
+/* Generic Client Model Callback */
+extern const struct bt_mesh_model_cb bt_mesh_generic_client_cb;
+
+/* Generic OnOff Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_gen_onoff_cli_op[];
+
+/** @def BLE_MESH_MODEL_GEN_ONOFF_CLI
+ *
+ *  Define a new generic onoff client model. Note that this API
+ *  needs to be repeated for each element which the application
+ *  wants to have a generic onoff client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_gen_onoff_cli.
+ *
+ *  @return New generic onoff client model instance.
+ */
+#define BLE_MESH_MODEL_GEN_ONOFF_CLI(cli_pub, cli_data)     \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_GEN_ONOFF_CLI,     \
+            bt_mesh_gen_onoff_cli_op, cli_pub, cli_data, &bt_mesh_generic_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_gen_onoff_client_t;
+
+struct bt_mesh_gen_onoff_status {
+    bool    op_en;         /* Indicate whether optional parameters included  */
+    uint8_t present_onoff; /* Present value of Generic OnOff state           */
+    uint8_t target_onoff;  /* Target value of Generic OnOff state (optional) */
+    uint8_t remain_time;   /* Time to complete state transition (C.1)        */
+};
+
+struct bt_mesh_gen_onoff_set {
+    bool    op_en;      /* Indicate whether optional parameters included */
+    uint8_t onoff;      /* Target value of Generic OnOff state           */
+    uint8_t tid;        /* Transaction Identifier                        */
+    uint8_t trans_time; /* Time to complete state transition (optional)  */
+    uint8_t delay;      /* Indicate message execution delay (C.1)        */
+};
+
+/* Generic Level Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_gen_level_cli_op[];
+
+/** @def BLE_MESH_MODEL_GEN_LEVEL_CLI
+ *
+ *  Define a new generic level client model. Note that this API
+ *  needs to be repeated for each element which the application
+ *  wants to have a generic level client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_gen_level_cli.
+ *
+ *  @return New generic level client model instance.
+ */
+#define BLE_MESH_MODEL_GEN_LEVEL_CLI(cli_pub, cli_data)     \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_GEN_LEVEL_CLI,     \
+            bt_mesh_gen_level_cli_op, cli_pub, cli_data, &bt_mesh_generic_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_gen_level_client_t;
+
+struct bt_mesh_gen_level_status {
+    bool    op_en;         /* Indicate whether optional parameters included      */
+    int16_t present_level; /* Present value of Generic Level state               */
+    int16_t target_level;  /* Target value of the Generic Level state (optional) */
+    uint8_t remain_time;   /* Time to complete state transition (C.1)            */
+};
+
+struct bt_mesh_gen_level_set {
+    bool    op_en;      /* Indicate whether optional parameters included */
+    int16_t level;      /* Target value of Generic Level state           */
+    uint8_t tid;        /* Transaction Identifier                        */
+    uint8_t trans_time; /* Time to complete state transition (optional)  */
+    uint8_t delay;      /* Indicate message execution delay (C.1)        */
+};
+
+struct bt_mesh_gen_delta_set {
+    bool    op_en;        /* Indicate whether optional parameters included */
+    int32_t delta_level;  /* Delta change of Generic Level state           */
+    uint8_t tid;          /* Transaction Identifier                        */
+    uint8_t trans_time;   /* Time to complete state transition (optional)  */
+    uint8_t delay;        /* Indicate message execution delay (C.1)        */
+};
+
+struct bt_mesh_gen_move_set {
+    bool    op_en;       /* Indicate whether optional parameters included                    */
+    int16_t delta_level; /* Delta Level step to calculate Move speed for Generic Level state */
+    uint8_t tid;         /* Transaction Identifier                                           */
+    uint8_t trans_time;  /* Time to complete state transition (optional)                     */
+    uint8_t delay;       /* Indicate message execution delay (C.1)                           */
+};
+
+/* Generic Default Transition Time Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_gen_def_trans_time_cli_op[];
+
+/** @def BLE_MESH_MODEL_GEN_DEF_TRANS_TIME_CLI
+ *
+ *  Define a new generic default transition time client model. Note
+ *  that this API needs to be repeated for each element that the
+ *  application wants to have a generic default transition client
+ *  model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_gen_def_trans_time_cli.
+ *
+ *  @return New generic default transition time client model instance.
+ */
+#define BLE_MESH_MODEL_GEN_DEF_TRANS_TIME_CLI(cli_pub, cli_data)    \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_GEN_DEF_TRANS_TIME_CLI,    \
+            bt_mesh_gen_def_trans_time_cli_op, cli_pub, cli_data, &bt_mesh_generic_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_gen_def_trans_time_client_t;
+
+struct bt_mesh_gen_def_trans_time_set {
+    uint8_t trans_time;  /* The value of the Generic Default Transition Time state */
+};
+
+struct bt_mesh_gen_def_trans_time_status {
+    uint8_t trans_time;  /* The value of the Generic Default Transition Time state */
+};
+
+/* Generic Power OnOff Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_gen_power_onoff_cli_op[];
+
+/** @def BLE_MESH_MODEL_GEN_POWER_ONOFF_CLI
+ *
+ *  Define a new generic power onoff client model. Note that this API
+ *  needs to be repeated for each element which the application wants
+ *  to have a generic power onoff client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_gen_power_onoff_cli.
+ *
+ *  @return New generic power onoff client model instance.
+ */
+#define BLE_MESH_MODEL_GEN_POWER_ONOFF_CLI(cli_pub, cli_data)   \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_GEN_POWER_ONOFF_CLI,   \
+            bt_mesh_gen_power_onoff_cli_op, cli_pub, cli_data, &bt_mesh_generic_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_gen_power_onoff_client_t;
+
+struct bt_mesh_gen_onpowerup_set {
+    uint8_t onpowerup;  /* The value of the Generic OnPowerUp state */
+};
+
+struct bt_mesh_gen_onpowerup_status {
+    uint8_t onpowerup;  /* The value of the Generic OnPowerUp state */
+};
+
+/* Generic Power Level Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_gen_power_level_cli_op[];
+
+/** @def BLE_MESH_MODEL_GEN_POWER_LEVEL_CLI
+ *
+ *  Define a new generic power level client model. Note that this API
+ *  needs to be repeated for each element which the application wants
+ *  to have a generic power level client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_gen_power_level_cli.
+ *
+ *  @return New generic power level client model instance.
+ */
+#define BLE_MESH_MODEL_GEN_POWER_LEVEL_CLI(cli_pub, cli_data)   \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_GEN_POWER_LEVEL_CLI,   \
+            bt_mesh_gen_power_level_cli_op, cli_pub, cli_data, &bt_mesh_generic_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_gen_power_level_client_t;
+
+struct bt_mesh_gen_power_level_status {
+    bool     op_en;         /* Indicate whether optional parameters included         */
+    uint16_t present_power; /* Present value of Generic Power Actual state           */
+    uint16_t target_power;  /* Target value of Generic Power Actual state (optional) */
+    uint8_t  remain_time;   /* Time to complete state transition (C.1)               */
+};
+
+struct bt_mesh_gen_power_last_status {
+    uint16_t power; /* The value of the Generic Power Last state */
+};
+
+struct bt_mesh_gen_power_default_status {
+    uint16_t power; /* The value of the Generic Default Last state */
+};
+
+struct bt_mesh_gen_power_range_status {
+    uint8_t  status_code; /* Status Code for the requesting message                */
+    uint16_t range_min;   /* Value of Range Min field of Generic Power Range state */
+    uint16_t range_max;   /* Value of Range Max field of Generic Power Range state */
+};
+
+struct bt_mesh_gen_power_level_set {
+    bool     op_en;      /* Indicate whether optional parameters included */
+    uint16_t power;      /* Target value of Generic Power Actual state    */
+    uint8_t  tid;        /* Transaction Identifier                        */
+    uint8_t  trans_time; /* Time to complete state transition (optional)  */
+    uint8_t  delay;      /* Indicate message execution delay (C.1)        */
+};
+
+struct bt_mesh_gen_power_default_set {
+    uint16_t power;  /* The value of the Generic Power Default state */
+};
+
+struct bt_mesh_gen_power_range_set {
+    uint16_t range_min; /* Value of Range Min field of Generic Power Range state */
+    uint16_t range_max; /* Value of Range Max field of Generic Power Range state */
+};
+
+/* Generic Battery Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_gen_battery_cli_op[];
+
+/** @def BLE_MESH_MODEL_GEN_BATTERY_CLI
+ *
+ *  Define a new generic battery client model. Note that this API
+ *  needs to be repeated for each element which the application
+ *  wants to have a generic battery client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_gen_battery_cli.
+ *
+ *  @return New generic battery client model instance.
+ */
+#define BLE_MESH_MODEL_GEN_BATTERY_CLI(cli_pub, cli_data)   \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_GEN_BATTERY_CLI,   \
+            bt_mesh_gen_battery_cli_op, cli_pub, cli_data, &bt_mesh_generic_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_gen_battery_client_t;
+
+struct bt_mesh_gen_battery_status {
+    uint32_t battery_level     : 8;  /* Value of Generic Battery Level state             */
+    uint32_t time_to_discharge : 24; /* Value of Generic Battery Time to Discharge state */
+    uint32_t time_to_charge    : 24; /* Value of Generic Battery Time to Charge state    */
+    uint32_t flags             : 8;  /* Value of Generic Battery Flags state             */
+};
+
+/* Generic Location Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_gen_location_cli_op[];
+
+/** @def BLE_MESH_MODEL_GEN_LOCATION_CLI
+ *
+ *  Define a new generic location client model. Note that this API
+ *  needs to be repeated for each element which the application
+ *  wants to have a generic location client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_gen_location_cli.
+ *
+ *  @return New generic location client model instance.
+ */
+#define BLE_MESH_MODEL_GEN_LOCATION_CLI(cli_pub, cli_data)  \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_GEN_LOCATION_CLI,  \
+            bt_mesh_gen_location_cli_op, cli_pub, cli_data, &bt_mesh_generic_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_gen_location_client_t;
+
+struct bt_mesh_gen_loc_global_status {
+    int32_t global_latitude;  /* Global Coordinates (Latitude)  */
+    int32_t global_longitude; /* Global Coordinates (Longitude) */
+    int16_t global_altitude;  /* Global Altitude                */
+};
+
+struct bt_mesh_gen_loc_local_status {
+    int16_t  local_north;    /* Local Coordinates (North) */
+    int16_t  local_east;     /* Local Coordinates (East)  */
+    int16_t  local_altitude; /* Local Altitude            */
+    uint8_t  floor_number;   /* Floor Number              */
+    uint16_t uncertainty;    /* Uncertainty               */
+};
+
+struct bt_mesh_gen_loc_global_set {
+    int32_t global_latitude;  /* Global Coordinates (Latitude)  */
+    int32_t global_longitude; /* Global Coordinates (Longitude) */
+    int16_t global_altitude;  /* Global Altitude                */
+};
+
+struct bt_mesh_gen_loc_local_set {
+    int16_t  local_north;    /* Local Coordinates (North) */
+    int16_t  local_east;     /* Local Coordinates (East)  */
+    int16_t  local_altitude; /* Local Altitude            */
+    uint8_t  floor_number;   /* Floor Number              */
+    uint16_t uncertainty;    /* Uncertainty               */
+};
+
+/* Generic Property Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_gen_property_cli_op[];
+
+/** @def BLE_MESH_MODEL_GEN_LOCATION_CLI
+ *
+ *  Define a new generic location client model. Note that this API
+ *  needs to be repeated for each element which the application
+ *  wants to have a generic location client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_gen_location_cli.
+ *
+ *  @return New generic location client model instance.
+ */
+#define BLE_MESH_MODEL_GEN_PROPERTY_CLI(cli_pub, cli_data)  \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_GEN_PROP_CLI,      \
+            bt_mesh_gen_property_cli_op, cli_pub, cli_data, &bt_mesh_generic_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_gen_property_client_t;
+
+struct bt_mesh_gen_user_properties_status {
+    struct net_buf_simple *user_property_ids; /* Buffer contains a sequence of N User Property IDs */
+};
+
+struct bt_mesh_gen_user_property_status {
+    bool     op_en;                   /* Indicate whether optional parameters included      */
+    uint16_t user_property_id;        /* Property ID identifying a Generic User Property    */
+    uint8_t  user_access;             /* Enumeration indicating user access (optional)      */
+    struct net_buf_simple *user_property_value; /* Raw value for the User Property (C.1) */
+};
+
+struct bt_mesh_gen_admin_properties_status {
+    struct net_buf_simple *admin_property_ids; /* Buffer contains a sequence of N Admin Property IDs */
+};
+
+struct bt_mesh_gen_admin_property_status {
+    bool     op_en;                    /* Indicate whether optional parameters included       */
+    uint16_t admin_property_id;        /* Property ID identifying a Generic Admin Property    */
+    uint8_t  admin_user_access;        /* Enumeration indicating user access (optional)       */
+    struct net_buf_simple *admin_property_value; /* Raw value for the Admin Property (C.1) */
+};
+
+struct bt_mesh_gen_manu_properties_status {
+    struct net_buf_simple *manu_property_ids; /* Buffer contains a sequence of N Manufacturer Property IDs */
+};
+
+struct bt_mesh_gen_manu_property_status {
+    bool     op_en;                   /* Indicate whether optional parameters included              */
+    uint16_t manu_property_id;        /* Property ID identifying a Generic Manufacturer Property    */
+    uint8_t  manu_user_access;        /* Enumeration indicating user access (optional)              */
+    struct net_buf_simple *manu_property_value; /* Raw value for the Manufacturer Property (C.1) */
+};
+
+struct bt_mesh_gen_client_properties_status {
+    struct net_buf_simple *client_property_ids; /* Buffer contains a sequence of N Client Property IDs */
+};
+
+struct bt_mesh_gen_user_property_get {
+    uint16_t user_property_id;        /* Property ID identifying a Generic User Property */
+};
+
+struct bt_mesh_gen_user_property_set {
+    uint16_t user_property_id;        /* Property ID identifying a Generic User Property */
+    struct net_buf_simple *user_property_value; /* Raw value for the User Property    */
+};
+
+struct bt_mesh_gen_admin_property_get {
+    uint16_t admin_property_id;        /* Property ID identifying a Generic Admin Property */
+};
+
+struct bt_mesh_gen_admin_property_set {
+    uint16_t admin_property_id;        /* Property ID identifying a Generic Admin Property */
+    uint8_t  admin_user_access;        /* Enumeration indicating user access               */
+    struct net_buf_simple *admin_property_value; /* Raw value for the Admin Property    */
+};
+
+struct bt_mesh_gen_manu_property_get {
+    uint16_t manu_property_id; /* Property ID identifying a Generic Manufacturer Property */
+};
+
+struct bt_mesh_gen_manu_property_set {
+    uint16_t manu_property_id; /* Property ID identifying a Generic Manufacturer Property */
+    uint8_t  manu_user_access; /* Enumeration indicating user access                      */
+};
+
+struct bt_mesh_gen_client_properties_get {
+    uint16_t client_property_id; /* A starting Client Property ID present within an element */
+};
+
+/**
+ * @brief This function is called to get generic states.
+ *
+ * @param[in]  common: Message common information structure
+ * @param[in]  get:    Pointer of generic get message value
+ *
+ * @return Zero-success, other-fail
+ */
+int bt_mesh_generic_client_get_state(bt_mesh_client_common_param_t *common, void *get);
+
+/**
+ * @brief This function is called to set generic states.
+ *
+ * @param[in]  common: Message common information structure
+ * @param[in]  set:    Pointer of generic set message value
+ *
+ * @return Zero-success, other-fail
+ */
+int bt_mesh_generic_client_set_state(bt_mesh_client_common_param_t *common, void *set);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _GENERIC_CLIENT_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/lighting_client.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/lighting_client.h
new file mode 100644
index 00000000000..4fcd7f31903
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/lighting_client.h
@@ -0,0 +1,440 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/** @file
+ *  @brief Bluetooth Mesh Lighting Client Model APIs.
+ */
+
+#ifndef _LIGHTING_CLIENT_H_
+#define _LIGHTING_CLIENT_H_
+
+#include "client_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Light client model common structure */
+typedef bt_mesh_client_user_data_t      bt_mesh_light_client_t;
+typedef bt_mesh_client_internal_data_t  light_internal_data_t;
+
+/* Lighting Client Model Callback */
+extern const struct bt_mesh_model_cb bt_mesh_lighting_client_cb;
+
+/* Light Lightness Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_light_lightness_cli_op[];
+
+/** @def BLE_MESH_MODEL_LIGHT_LIGHTNESS_CLI
+ *
+ *  Define a new light lightness client model. Note that this API
+ *  needs to be repeated for each element which the application
+ *  wants to have a light lightness client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_light_lightness_cli.
+ *
+ *  @return New light lightness client model instance.
+ */
+#define BLE_MESH_MODEL_LIGHT_LIGHTNESS_CLI(cli_pub, cli_data)   \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_LIGHT_LIGHTNESS_CLI,   \
+            bt_mesh_light_lightness_cli_op, cli_pub, cli_data, &bt_mesh_lighting_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_light_lightness_client_t;
+
+struct bt_mesh_light_lightness_status {
+    bool     op_en;             /* Indicate whether optional parameters included           */
+    uint16_t present_lightness; /* Present value of light lightness actual state           */
+    uint16_t target_lightness;  /* Target value of light lightness actual state (optional) */
+    uint8_t  remain_time;       /* Time to complete state transition (C.1)                 */
+};
+
+struct bt_mesh_light_lightness_linear_status {
+    bool     op_en;             /* Indicate whether optional parameters included           */
+    uint16_t present_lightness; /* Present value of light lightness linear state           */
+    uint16_t target_lightness;  /* Target value of light lightness linear state (optional) */
+    uint8_t  remain_time;       /* Time to complete state transition (C.1)                 */
+};
+
+struct bt_mesh_light_lightness_last_status {
+    uint16_t lightness; /* The value of the Light Lightness Last state */
+};
+
+struct bt_mesh_light_lightness_default_status {
+    uint16_t lightness; /* The value of the Light Lightness default state */
+};
+
+struct bt_mesh_light_lightness_range_status {
+    uint8_t  status_code; /* Status Code for the requesting message                  */
+    uint16_t range_min;   /* Value of range min field of light lightness range state */
+    uint16_t range_max;   /* Value of range max field of light lightness range state */
+};
+
+struct bt_mesh_light_lightness_set {
+    bool     op_en;      /* Indicate whether optional parameters included */
+    uint16_t lightness;  /* Target value of light lightness actual state  */
+    uint8_t  tid;        /* Transaction Identifier                        */
+    uint8_t  trans_time; /* Time to complete state transition (optional)  */
+    uint8_t  delay;      /* Indicate message execution delay (C.1)        */
+};
+
+struct bt_mesh_light_lightness_linear_set {
+    bool     op_en;      /* Indicate whether optional parameters included */
+    uint16_t lightness;  /* Target value of light lightness linear state  */
+    uint8_t  tid;        /* Transaction Identifier                        */
+    uint8_t  trans_time; /* Time to complete state transition (optional)  */
+    uint8_t  delay;      /* Indicate message execution delay (C.1)        */
+};
+
+struct bt_mesh_light_lightness_default_set {
+    uint16_t lightness;  /* The value of the Light Lightness Default state */
+};
+
+struct bt_mesh_light_lightness_range_set {
+    uint16_t range_min; /* Value of range min field of light lightness range state */
+    uint16_t range_max; /* Value of range max field of light lightness range state */
+};
+
+/* Light CTL Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_light_ctl_cli_op[];
+
+/** @def BLE_MESH_MODEL_LIGHT_CTL_CLI
+ *
+ *  Define a new light CTL client model. Note that this API needs
+ *  to be repeated for each element which the application wants to
+ *  have a light CTL client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_light_ctl_cli.
+ *
+ *  @return New light CTL client model instance.
+ */
+#define BLE_MESH_MODEL_LIGHT_CTL_CLI(cli_pub, cli_data)     \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_LIGHT_CTL_CLI,     \
+            bt_mesh_light_ctl_cli_op, cli_pub, cli_data, &bt_mesh_lighting_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_light_ctl_client_t;
+
+struct bt_mesh_light_ctl_status {
+    bool     op_en;                   /* Indicate whether optional parameters included        */
+    uint16_t present_ctl_lightness;   /* Present value of light ctl lightness state           */
+    uint16_t present_ctl_temperature; /* Present value of light ctl temperature state         */
+    uint16_t target_ctl_lightness;    /* Target value of light ctl lightness state (optional) */
+    uint16_t target_ctl_temperature;  /* Target value of light ctl temperature state (C.1)    */
+    uint8_t  remain_time;             /* Time to complete state transition (C.1)              */
+};
+
+struct bt_mesh_light_ctl_temperature_status {
+    bool     op_en;                   /* Indicate whether optional parameters included          */
+    uint16_t present_ctl_temperature; /* Present value of light ctl temperature state           */
+    uint16_t present_ctl_delta_uv;    /* Present value of light ctl delta UV state              */
+    uint16_t target_ctl_temperature;  /* Target value of light ctl temperature state (optional) */
+    uint16_t target_ctl_delta_uv;     /* Target value of light ctl delta UV state (C.1)         */
+    uint8_t  remain_time;             /* Time to complete state transition (C.1)                */
+};
+
+struct bt_mesh_light_ctl_temperature_range_status {
+    uint8_t  status_code; /* Status code for the requesting message                                    */
+    uint16_t range_min;   /* Value of temperature range min field of light ctl temperature range state */
+    uint16_t range_max;   /* Value of temperature range max field of light ctl temperature range state */
+};
+
+struct bt_mesh_light_ctl_default_status {
+    uint16_t lightness;   /* Value of light lightness default state   */
+    uint16_t temperature; /* Value of light temperature default state */
+    int16_t  delta_uv;    /* Value of light delta UV default state    */
+};
+
+struct bt_mesh_light_ctl_set {
+    bool     op_en;           /* Indicate whether optional parameters included */
+    uint16_t ctl_lightness;   /* Target value of light ctl lightness state     */
+    uint16_t ctl_temperature; /* Target value of light ctl temperature state   */
+    int16_t  ctl_delta_uv;    /* Target value of light ctl delta UV state      */
+    uint8_t  tid;             /* Transaction Identifier                        */
+    uint8_t  trans_time;      /* Time to complete state transition (optional)  */
+    uint8_t  delay;           /* Indicate message execution delay (C.1)        */
+};
+
+struct bt_mesh_light_ctl_temperature_set {
+    bool     op_en;           /* Indicate whether optional parameters included */
+    uint16_t ctl_temperature; /* Target value of light ctl temperature state   */
+    int16_t  ctl_delta_uv;    /* Target value of light ctl delta UV state      */
+    uint8_t  tid;             /* Transaction Identifier                        */
+    uint8_t  trans_time;      /* Time to complete state transition (optional)  */
+    uint8_t  delay;           /* Indicate message execution delay (C.1)        */
+};
+
+struct bt_mesh_light_ctl_temperature_range_set {
+    uint16_t range_min; /* Value of temperature range min field of light ctl temperature range state */
+    uint16_t range_max; /* Value of temperature range max field of light ctl temperature range state */
+};
+
+struct bt_mesh_light_ctl_default_set {
+    uint16_t lightness;   /* Value of light lightness default state   */
+    uint16_t temperature; /* Value of light temperature default state */
+    int16_t  delta_uv;    /* Value of light delta UV default state    */
+};
+
+/* Light HSL Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_light_hsl_cli_op[];
+
+/** @def BLE_MESH_MODEL_LIGHT_HSL_CLI
+ *
+ *  Define a new light HSL client model. Note that this API needs
+ *  to be repeated for each element which the application wants to
+ *  have a light HSL client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_light_hsl_cli.
+ *
+ *  @return New light HSL client model instance.
+ */
+#define BLE_MESH_MODEL_LIGHT_HSL_CLI(cli_pub, cli_data)     \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_LIGHT_HSL_CLI,     \
+            bt_mesh_light_hsl_cli_op, cli_pub, cli_data, &bt_mesh_lighting_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_light_hsl_client_t;
+
+struct bt_mesh_light_hsl_status {
+    bool     op_en;          /* Indicate whether optional parameters included */
+    uint16_t hsl_lightness;  /* Present value of light hsl lightness state    */
+    uint16_t hsl_hue;        /* Present value of light hsl hue state          */
+    uint16_t hsl_saturation; /* Present value of light hsl saturation state   */
+    uint8_t  remain_time;    /* Time to complete state transition (optional)  */
+};
+
+struct bt_mesh_light_hsl_target_status {
+    bool     op_en;                 /* Indicate whether optional parameters included */
+    uint16_t hsl_lightness_target;  /* Target value of light hsl lightness state     */
+    uint16_t hsl_hue_target;        /* Target value of light hsl hue state           */
+    uint16_t hsl_saturation_target; /* Target value of light hsl saturation state    */
+    uint8_t  remain_time;           /* Time to complete state transition (optional)  */
+};
+
+struct bt_mesh_light_hsl_hue_status {
+    bool     op_en;       /* Indicate whether optional parameters included  */
+    uint16_t present_hue; /* Present value of light hsl hue state           */
+    uint16_t target_hue;  /* Target value of light hsl hue state (optional) */
+    uint8_t  remain_time; /* Time to complete state transition (C.1)   */
+};
+
+struct bt_mesh_light_hsl_saturation_status {
+    bool     op_en;              /* Indicate whether optional parameters included         */
+    uint16_t present_saturation; /* Present value of light hsl saturation state           */
+    uint16_t target_saturation;  /* Target value of light hsl saturation state (optional) */
+    uint8_t  remain_time;        /* Time to complete state transition (C.1)               */
+};
+
+struct bt_mesh_light_hsl_default_status {
+    uint16_t lightness;  /* Value of light lightness default state  */
+    uint16_t hue;        /* Value of light hue default state        */
+    uint16_t saturation; /* Value of light saturation default state */
+};
+
+struct bt_mesh_light_hsl_range_status {
+    uint8_t  status_code;          /* Status code for the requesting message                                  */
+    uint16_t hue_range_min;        /* Value of hue range min field of light hsl hue range state               */
+    uint16_t hue_range_max;        /* Value of hue range max field of light hsl hue range state               */
+    uint16_t saturation_range_min; /* Value of saturation range min field of light hsl saturation range state */
+    uint16_t saturation_range_max; /* Value of saturation range max field of light hsl saturation range state */
+};
+
+struct bt_mesh_light_hsl_set {
+    bool     op_en;          /* Indicate whether optional parameters included */
+    uint16_t hsl_lightness;  /* Target value of light hsl lightness state     */
+    uint16_t hsl_hue;        /* Target value of light hsl hue state           */
+    uint16_t hsl_saturation; /* Target value of light hsl saturation state    */
+    uint8_t  tid;            /* Transaction Identifier                        */
+    uint8_t  trans_time;     /* Time to complete state transition (optional)  */
+    uint8_t  delay;          /* Indicate message execution delay (C.1)        */
+};
+
+struct bt_mesh_light_hsl_hue_set {
+    bool     op_en;      /* Indicate whether optional parameters included */
+    uint16_t hue;        /* Target value of light hsl hue state           */
+    uint8_t  tid;        /* Transaction Identifier                        */
+    uint8_t  trans_time; /* Time to complete state transition (optional)  */
+    uint8_t  delay;      /* Indicate message execution delay (C.1)        */
+};
+
+struct bt_mesh_light_hsl_saturation_set {
+    bool     op_en;      /* Indicate whether optional parameters included */
+    uint16_t saturation; /* Target value of light hsl hue state           */
+    uint8_t  tid;        /* Transaction Identifier                        */
+    uint8_t  trans_time; /* Time to complete state transition (optional)  */
+    uint8_t  delay;      /* Indicate message execution delay (C.1)        */
+};
+
+struct bt_mesh_light_hsl_default_set {
+    uint16_t lightness;  /* Value of light lightness default state  */
+    uint16_t hue;        /* Value of light hue default state        */
+    uint16_t saturation; /* Value of light saturation default state */
+};
+
+struct bt_mesh_light_hsl_range_set {
+    uint16_t hue_range_min;        /* Value of hue range min field of light hsl hue range state               */
+    uint16_t hue_range_max;        /* Value of hue range max field of light hsl hue range state               */
+    uint16_t saturation_range_min; /* Value of saturation range min field of light hsl saturation range state */
+    uint16_t saturation_range_max; /* Value of saturation range max field of light hsl saturation range state */
+};
+
+/* Light xyL Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_light_xyl_cli_op[];
+
+/** @def BLE_MESH_MODEL_LIGHT_XYL_CLI
+ *
+ *  Define a new light xyL client model. Note that this API needs
+ *  to be repeated for each element which the application wants
+ *  to have a light xyL client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_light_xyl_cli.
+ *
+ *  @return New light xyL client model instance.
+ */
+#define BLE_MESH_MODEL_LIGHT_XYL_CLI(cli_pub, cli_data)     \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_LIGHT_XYL_CLI,     \
+            bt_mesh_light_xyl_cli_op, cli_pub, cli_data, &bt_mesh_lighting_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_light_xyl_client_t;
+
+struct bt_mesh_light_xyl_status {
+    bool     op_en;         /* Indicate whether optional parameters included      */
+    uint16_t xyl_lightness; /* The present value of the Light xyL Lightness state */
+    uint16_t xyl_x;         /* The present value of the Light xyL x state         */
+    uint16_t xyl_y;         /* The present value of the Light xyL y state         */
+    uint8_t  remain_time;   /* Time to complete state transition (optional)       */
+};
+
+struct bt_mesh_light_xyl_target_status {
+    bool     op_en;                /* Indicate whether optional parameters included     */
+    uint16_t target_xyl_lightness; /* The target value of the Light xyL Lightness state */
+    uint16_t target_xyl_x;         /* The target value of the Light xyL x state         */
+    uint16_t target_xyl_y;         /* The target value of the Light xyL y state         */
+    uint8_t  remain_time;          /* Time to complete state transition (optional)      */
+};
+
+struct bt_mesh_light_xyl_default_status {
+    uint16_t lightness; /* The value of the Light Lightness Default state */
+    uint16_t xyl_x;     /* The value of the Light xyL x Default state     */
+    uint16_t xyl_y;     /* The value of the Light xyL y Default state     */
+};
+
+struct bt_mesh_light_xyl_range_status {
+    uint8_t  status_code;     /* Status Code for the requesting message */
+    uint16_t xyl_x_range_min; /* The value of the xyL x Range Min field of the Light xyL x Range state */
+    uint16_t xyl_x_range_max; /* The value of the xyL x Range Max field of the Light xyL x Range state */
+    uint16_t xyl_y_range_min; /* The value of the xyL y Range Min field of the Light xyL y Range state */
+    uint16_t xyl_y_range_max; /* The value of the xyL y Range Max field of the Light xyL y Range state */
+};
+
+struct bt_mesh_light_xyl_set {
+    bool     op_en;         /* Indicate whether optional parameters included     */
+    uint16_t xyl_lightness; /* The target value of the Light xyL Lightness state */
+    uint16_t xyl_x;         /* The target value of the Light xyL x state         */
+    uint16_t xyl_y;         /* The target value of the Light xyL y state         */
+    uint8_t  tid;           /* Transaction Identifier                            */
+    uint8_t  trans_time;    /* Time to complete state transition (optional)      */
+    uint8_t  delay;         /* Indicate message execution delay (C.1)            */
+};
+
+struct bt_mesh_light_xyl_default_set {
+    uint16_t lightness; /* The value of the Light Lightness Default state */
+    uint16_t xyl_x;     /* The value of the Light xyL x Default state     */
+    uint16_t xyl_y;     /* The value of the Light xyL y Default state     */
+};
+
+struct bt_mesh_light_xyl_range_set {
+    uint16_t xyl_x_range_min; /* The value of the xyL x Range Min field of the Light xyL x Range state */
+    uint16_t xyl_x_range_max; /* The value of the xyL x Range Max field of the Light xyL x Range state */
+    uint16_t xyl_y_range_min; /* The value of the xyL y Range Min field of the Light xyL y Range state */
+    uint16_t xyl_y_range_max; /* The value of the xyL y Range Max field of the Light xyL y Range state */
+};
+
+/* Light LC Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_light_lc_cli_op[];
+
+/** @def BLE_MESH_MODEL_LIGHT_LC_CLI
+ *
+ *  Define a new light lc client model. Note that this API needs
+ *  to be repeated for each element which the application wants
+ *  to have a light lc client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_light_lc_cli.
+ *
+ *  @return New light lc client model instance.
+ */
+#define BLE_MESH_MODEL_LIGHT_LC_CLI(cli_pub, cli_data)      \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_LIGHT_LC_CLI,      \
+            bt_mesh_light_lc_cli_op, cli_pub, cli_data, &bt_mesh_lighting_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_light_lc_client_t;
+
+struct bt_mesh_light_lc_mode_status {
+    uint8_t mode; /* The present value of the Light LC Mode state */
+};
+
+struct bt_mesh_light_lc_om_status {
+    uint8_t mode; /* The present value of the Light LC Occupancy Mode state */
+};
+
+struct bt_mesh_light_lc_light_onoff_status {
+    bool    op_en;               /* Indicate whether optional parameters included                 */
+    uint8_t present_light_onoff; /* The present value of the Light LC Light OnOff state           */
+    uint8_t target_light_onoff;  /* The target value of the Light LC Light OnOff state (Optional) */
+    uint8_t remain_time;         /* Time to complete state transition (C.1)                       */
+};
+
+struct bt_mesh_light_lc_property_status {
+    uint16_t light_lc_property_id;  /* Property ID identifying a Light LC Property */
+    struct net_buf_simple *light_lc_property_value; /* Raw value for the Light LC Property */
+};
+
+struct bt_mesh_light_lc_mode_set {
+    uint8_t mode; /* The target value of the Light LC Mode state */
+};
+
+struct bt_mesh_light_lc_om_set {
+    uint8_t mode; /* The target value of the Light LC Occupancy Mode state */
+};
+
+struct bt_mesh_light_lc_light_onoff_set {
+    bool    op_en;       /* Indicate whether optional parameters included      */
+    uint8_t light_onoff; /* The target value of the Light LC Light OnOff state */
+    uint8_t tid;         /* Transaction Identifier                             */
+    uint8_t trans_time;  /* Time to complete state transition (optional)       */
+    uint8_t delay;       /* Indicate message execution delay (C.1)             */
+};
+
+struct bt_mesh_light_lc_property_get {
+    uint16_t light_lc_property_id;  /* Property ID identifying a Light LC Property */
+};
+
+struct bt_mesh_light_lc_property_set {
+    uint16_t light_lc_property_id;  /* Property ID identifying a Light LC Property */
+    struct net_buf_simple *light_lc_property_value; /* Raw value for the Light LC Property */
+};
+
+/**
+ * @brief This function is called to get light states.
+ *
+ * @param[in]  common: Message common information structure
+ * @param[in]  get:    Pointer of light get message value
+ *
+ * @return Zero-success, other-fail
+ */
+int bt_mesh_light_client_get_state(bt_mesh_client_common_param_t *common, void *get);
+
+/**
+ * @brief This function is called to set light states.
+ *
+ * @param[in]  common: Message common information structure
+ * @param[in]  set:    Pointer of light set message value
+ *
+ * @return Zero-success, other-fail
+ */
+int bt_mesh_light_client_set_state(bt_mesh_client_common_param_t *common, void *set);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LIGHTING_CLIENT_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/sensor_client.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/sensor_client.h
new file mode 100644
index 00000000000..6dfcebdfbb2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/sensor_client.h
@@ -0,0 +1,155 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/** @file
+ *  @brief Bluetooth Mesh Sensor Client Model APIs.
+ */
+
+#ifndef _SENSOR_CLIENT_H_
+#define _SENSOR_CLIENT_H_
+
+#include "client_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Sensor Client Model Callback */
+extern const struct bt_mesh_model_cb bt_mesh_sensor_client_cb;
+
+/* Sensor Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_sensor_cli_op[];
+
+/** @def BLE_MESH_MODEL_SENSOR_CLI
+ *
+ *  Define a new sensor client model. Note that this API needs to
+ *  be repeated for each element which the application wants to
+ *  have a sensor client model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_sensor_cli.
+ *
+ *  @return New sensor client model instance.
+ */
+#define BLE_MESH_MODEL_SENSOR_CLI(cli_pub, cli_data)    \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_SENSOR_CLI,    \
+            bt_mesh_sensor_cli_op, cli_pub, cli_data, &bt_mesh_sensor_client_cb)
+
+typedef bt_mesh_client_user_data_t      bt_mesh_sensor_client_t;
+typedef bt_mesh_client_internal_data_t  sensor_internal_data_t;
+
+struct bt_mesh_sensor_descriptor_status {
+    struct net_buf_simple *descriptor; /* Sequence of 8-octet sensor descriptors (optional) */
+};
+
+struct bt_mesh_sensor_cadence_status {
+    uint16_t property_id;              /* Property for the sensor                       */
+    struct net_buf_simple *sensor_cadence_value; /* Value of sensor cadence state */
+};
+
+struct bt_mesh_sensor_settings_status {
+    uint16_t sensor_property_id;              /* Property ID identifying a sensor                        */
+    struct net_buf_simple *sensor_setting_property_ids; /* A sequence of N sensor setting property IDs (optional) */
+};
+
+struct bt_mesh_sensor_setting_status {
+    bool     op_en;                      /* Indicate whether optional parameters included       */
+    uint16_t sensor_property_id;         /* Property ID identifying a sensor                    */
+    uint16_t sensor_setting_property_id; /* Setting ID identifying a setting within a sensor    */
+    uint8_t  sensor_setting_access;      /* Read/Write access rights for the setting (optional) */
+    struct net_buf_simple *sensor_setting_raw; /* Raw value for the setting */
+};
+
+struct bt_mesh_sensor_status {
+    struct net_buf_simple *marshalled_sensor_data; /* Value of sensor data state (optional) */
+};
+
+struct bt_mesh_sensor_column_status {
+    uint16_t property_id;             /* Property identifying a sensor and the Y axis  */
+    struct net_buf_simple *sensor_column_value; /* Left values of sensor column status */
+};
+
+struct bt_mesh_sensor_series_status {
+    uint16_t property_id;             /* Property identifying a sensor and the Y axis  */
+    struct net_buf_simple *sensor_series_value; /* Left values of sensor series status */
+};
+
+struct bt_mesh_sensor_descriptor_get {
+    bool     op_en;       /* Indicate whether optional parameters included */
+    uint16_t property_id; /* Property ID for the sensor (optional)         */
+};
+
+struct bt_mesh_sensor_cadence_get {
+    uint16_t property_id; /* Property ID for the sensor */
+};
+
+struct bt_mesh_sensor_cadence_set {
+    uint16_t property_id;                     /* Property ID for the sensor                                */
+    uint8_t  fast_cadence_period_divisor : 7, /* Divisor for the publish period                            */
+             status_trigger_type : 1;         /* The unit and format of the Status Trigger Delta fields    */
+    struct net_buf_simple *status_trigger_delta_down; /* Delta down value that triggers a status message */
+    struct net_buf_simple *status_trigger_delta_up; /* Delta up value that triggers a status message */
+    uint8_t  status_min_interval;             /* Minimum interval between two consecutive Status messages  */
+    struct net_buf_simple *fast_cadence_low;  /* Low value for the fast cadence range */
+    struct net_buf_simple *fast_cadence_high; /* Fast value for the fast cadence range */
+};
+
+struct bt_mesh_sensor_settings_get {
+    uint16_t sensor_property_id; /* Property ID for the sensor */
+};
+
+struct bt_mesh_sensor_setting_get {
+    uint16_t sensor_property_id;         /* Property ID identifying a sensor                 */
+    uint16_t sensor_setting_property_id; /* Setting ID identifying a setting within a sensor */
+};
+
+struct bt_mesh_sensor_setting_set {
+    uint16_t sensor_property_id;         /* Property ID identifying a sensor                 */
+    uint16_t sensor_setting_property_id; /* Setting ID identifying a setting within a sensor */
+    struct net_buf_simple *sensor_setting_raw; /* Raw value for the setting */
+};
+
+struct bt_mesh_sensor_get {
+    bool     op_en;       /* Indicate whether optional parameters included */
+    uint16_t property_id; /* Property ID for the sensor (optional)         */
+};
+
+struct bt_mesh_sensor_column_get {
+    uint16_t property_id;     /* Property identifying a sensor                */
+    struct net_buf_simple *raw_value_x; /* Raw value identifying a column */
+};
+
+struct bt_mesh_sensor_series_get {
+    bool     op_en;            /* Indicate whether optional parameters included         */
+    uint16_t property_id;      /* Property identifying a sensor                         */
+    struct net_buf_simple *raw_value_x1; /* Raw value identifying a starting column (optional) */
+    struct net_buf_simple *raw_value_x2; /* Raw value identifying a ending column (C.1) */
+};
+
+/**
+ * @brief This function is called to get sensor states.
+ *
+ * @param[in]  common: Message common information structure
+ * @param[in]  get:    Pointer of sensor get message value
+ *
+ * @return Zero-success, other-fail
+ */
+int bt_mesh_sensor_client_get_state(bt_mesh_client_common_param_t *common, void *get);
+
+/**
+ * @brief This function is called to set sensor states.
+ *
+ * @param[in]  common: Message common information structure
+ * @param[in]  set:    Pointer of sensor set message value
+ *
+ * @return Zero-success, other-fail
+ */
+int bt_mesh_sensor_client_set_state(bt_mesh_client_common_param_t *common, void *set);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SENSOR_CLIENT_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/time_scene_client.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/time_scene_client.h
new file mode 100644
index 00000000000..f7c7f5e58c4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/client/include/time_scene_client.h
@@ -0,0 +1,225 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/** @file
+ *  @brief Bluetooth Mesh Time and Scene Client Model APIs.
+ */
+
+#ifndef _TIME_SCENE_CLIENT_H_
+#define _TIME_SCENE_CLIENT_H_
+
+#include "client_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Time scene client model common structure */
+typedef bt_mesh_client_user_data_t      bt_mesh_time_scene_client_t;
+typedef bt_mesh_client_internal_data_t  time_scene_internal_data_t;
+
+/* Time Scene Client Model Callback */
+extern const struct bt_mesh_model_cb bt_mesh_time_scene_client_cb;
+
+/* Time Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_time_cli_op[];
+
+/** @def BLE_MESH_MODEL_TIME_CLI
+ *
+ *  Define a new time client model. Note that this API needs to
+ *  be repeated for each element which the application wants to
+ *  have a time model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_time_cli.
+ *
+ *  @return New time client model instance.
+ */
+#define BLE_MESH_MODEL_TIME_CLI(cli_pub, cli_data)      \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_TIME_CLI,      \
+            bt_mesh_time_cli_op, cli_pub, cli_data, &bt_mesh_time_scene_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_time_client_t;
+
+struct bt_mesh_time_status {
+    uint8_t  tai_seconds[5];     /* The current TAI time in seconds */
+    uint8_t  sub_second;         /* The sub-second time in units of 1/256 second */
+    uint8_t  uncertainty;        /* The estimated uncertainty in 10-millisecond steps */
+    uint16_t time_authority : 1; /* 0 = No Time Authority, 1 = Time Authority */
+    uint16_t tai_utc_delta : 15; /* Current difference between TAI and UTC in seconds */
+    uint8_t  time_zone_offset;   /* The local time zone offset in 15-minute increments */
+};
+
+struct bt_mesh_time_zone_status {
+    uint8_t time_zone_offset_curr; /* Current local time zone offset */
+    uint8_t time_zone_offset_new;  /* Upcoming local time zone offset */
+    uint8_t tai_zone_change[5];    /* TAI Seconds time of the upcoming Time Zone Offset change */
+};
+
+struct bt_mesh_tai_utc_delta_status {
+    uint16_t tai_utc_delta_curr : 15; /* Current difference between TAI and UTC in seconds */
+    uint16_t padding_1 : 1;           /* Always 0b0. Other values are Prohibited. */
+    uint16_t tai_utc_delta_new : 15;  /* Upcoming difference between TAI and UTC in seconds */
+    uint16_t padding_2 : 1;           /* Always 0b0. Other values are Prohibited. */
+    uint8_t  tai_delta_change[5];     /* TAI Seconds time of the upcoming TAI-UTC Delta change */
+};
+
+struct bt_mesh_time_role_status {
+    uint8_t time_role; /* The Time Role for the element */
+};
+
+struct bt_mesh_time_set {
+    uint8_t  tai_seconds[5];     /* The current TAI time in seconds */
+    uint8_t  sub_second;         /* The sub-second time in units of 1/256 second */
+    uint8_t  uncertainty;        /* The estimated uncertainty in 10-millisecond steps */
+    uint16_t time_authority : 1; /* 0 = No Time Authority, 1 = Time Authority */
+    uint16_t tai_utc_delta : 15; /* Current difference between TAI and UTC in seconds */
+    uint8_t  time_zone_offset;   /* The local time zone offset in 15-minute increments */
+};
+
+struct bt_mesh_time_zone_set {
+    uint8_t time_zone_offset_new; /* Upcoming local time zone offset */
+    uint8_t tai_zone_change[5];   /* TAI Seconds time of the upcoming Time Zone Offset change */
+};
+
+struct bt_mesh_tai_utc_delta_set {
+    uint16_t tai_utc_delta_new : 15; /* Upcoming difference between TAI and UTC in seconds */
+    uint16_t padding : 1;            /* Always 0b0. Other values are Prohibited. */
+    uint8_t  tai_delta_change[5];    /* TAI Seconds time of the upcoming TAI-UTC Delta change */
+};
+
+struct bt_mesh_time_role_set {
+    uint8_t time_role; /* The Time Role for the element */
+};
+
+/* Scene Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_scene_cli_op[];
+
+/** @def BLE_MESH_MODEL_SCENE_CLI
+ *
+ *  Define a new scene client model. Note that this API needs to
+ *  be repeated for each element which the application wants to
+ *  have a scene model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_scene_cli.
+ *
+ *  @return New scene client model instance.
+ */
+#define BLE_MESH_MODEL_SCENE_CLI(cli_pub, cli_data)     \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_SCENE_CLI,     \
+            bt_mesh_scene_cli_op, cli_pub, cli_data, &bt_mesh_time_scene_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_scene_client_t;
+
+struct bt_mesh_scene_status {
+    bool     op_en;         /* Indicate whether optional parameters included */
+    uint8_t  status_code;   /* Status code for the last operation            */
+    uint16_t current_scene; /* Scene Number of a current scene               */
+    uint16_t target_scene;  /* Scene Number of a target scene (optional)     */
+    uint8_t  remain_time;   /* Time to complete state transition (C.1)       */
+};
+
+struct bt_mesh_scene_register_status {
+    uint8_t  status_code;   /* Status code for the previous operation              */
+    uint16_t current_scene; /* Scene Number of a current scene                     */
+    struct net_buf_simple *scenes; /* A list of scenes stored within an element */
+};
+
+struct bt_mesh_scene_store {
+    uint16_t scene_number; /* The number of the scene to be stored */
+};
+
+struct bt_mesh_scene_recall {
+    bool     op_en;        /* Indicate whether optional parameters included */
+    uint16_t scene_number; /* The number of the scene to be recalled        */
+    uint8_t  tid;          /* Transaction Identifier                        */
+    uint8_t  trans_time;   /* Time to complete state transition (optional)  */
+    uint8_t  delay;        /* Indicate message execution delay (C.1)        */
+};
+
+struct bt_mesh_scene_delete {
+    uint16_t scene_number; /* The number of the scene to be deleted */
+};
+
+/* Scheduler Client Model Context */
+extern const struct bt_mesh_model_op bt_mesh_scheduler_cli_op[];
+
+/** @def BLE_MESH_MODEL_SCHEDULER_CLI
+ *
+ *  Define a new scheduler client model. Note that this API needs to
+ *  be repeated for each element which the application wants to
+ *  have a scheduler model on.
+ *  @param cli_pub  Pointer to a unique struct bt_mesh_model_pub.
+ *  @param cli_data Pointer to a unique struct bt_mesh_scheduler_cli.
+ *
+ *  @return New scheduler client model instance.
+ */
+#define BLE_MESH_MODEL_SCHEDULER_CLI(cli_pub, cli_data)     \
+        BLE_MESH_MODEL_CB(BLE_MESH_MODEL_ID_SCHEDULER_CLI,     \
+            bt_mesh_scheduler_cli_op, cli_pub, cli_data, &bt_mesh_time_scene_client_cb)
+
+typedef bt_mesh_client_user_data_t  bt_mesh_scheduler_client_t;
+
+struct bt_mesh_scheduler_status {
+    uint16_t schedules; /* Bit field indicating defined Actions in the Schedule Register */
+};
+
+struct bt_mesh_scheduler_act_status {
+    uint64_t index : 4;        /* Enumerates (selects) a Schedule Register entry */
+    uint64_t year : 7;         /* Scheduled year for the action */
+    uint64_t month : 12;       /* Scheduled month for the action */
+    uint64_t day : 5;          /* Scheduled day of the month for the action */
+    uint64_t hour : 5;         /* Scheduled hour for the action */
+    uint64_t minute : 6;       /* Scheduled minute for the action */
+    uint64_t second : 6;       /* Scheduled second for the action */
+    uint64_t day_of_week : 7;  /* Schedule days of the week for the action */
+    uint64_t action : 4;       /* Action to be performed at the scheduled time */
+    uint64_t trans_time : 8;   /* Transition time for this action */
+    uint16_t scene_number;     /* Transition time for this action */
+};
+
+struct bt_mesh_scheduler_act_get {
+    uint8_t index; /* Index of the Schedule Register entry to get */
+};
+
+struct bt_mesh_scheduler_act_set {
+    uint64_t index : 4;        /* Index of the Schedule Register entry to set */
+    uint64_t year : 7;         /* Scheduled year for the action */
+    uint64_t month : 12;       /* Scheduled month for the action */
+    uint64_t day : 5;          /* Scheduled day of the month for the action */
+    uint64_t hour : 5;         /* Scheduled hour for the action */
+    uint64_t minute : 6;       /* Scheduled minute for the action */
+    uint64_t second : 6;       /* Scheduled second for the action */
+    uint64_t day_of_week : 7;  /* Schedule days of the week for the action */
+    uint64_t action : 4;       /* Action to be performed at the scheduled time */
+    uint64_t trans_time : 8;   /* Transition time for this action */
+    uint16_t scene_number;     /* Transition time for this action */
+};
+
+/**
+ * @brief This function is called to get scene states.
+ *
+ * @param[in]  common: Message common information structure
+ * @param[in]  get:    Pointer of time scene get message value
+ *
+ * @return Zero-success, other-fail
+ */
+int bt_mesh_time_scene_client_get_state(bt_mesh_client_common_param_t *common, void *get);
+
+/**
+ * @brief This function is called to set scene states.
+ *
+ * @param[in]  common: Message common information structure
+ * @param[in]  set:    Pointer of time scene set message value
+ *
+ * @return Zero-success, other-fail
+ */
+int bt_mesh_time_scene_client_set_state(bt_mesh_client_common_param_t *common, void *set);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TIME_SCENE_CLIENT_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/common/include/device_property.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/common/include/device_property.h
new file mode 100644
index 00000000000..74bf76a938f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/common/include/device_property.h
@@ -0,0 +1,1350 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _DEVICE_PROPERTY_H_
+#define _DEVICE_PROPERTY_H_
+
+#include "mesh_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Details of BLE Mesh Device Properties.
+ * Note: For the size of the corresponding characteristic, please refer to the GATT_Specification_Supplement_v2.
+ *
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * |                   Device Property Name                   |   ID   |               Characteristic              | Size |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Average Ambient Temperature In A Period Of Day           | 0x0001 | Temperature 8 In A Period Of Day          |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Average Input Current                                    | 0x0002 | Average Current                           |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Average Input Voltage                                    | 0x0003 | Average Voltage                           |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Average Output Current                                   | 0x0004 | Average Current                           |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Average Output Voltage                                   | 0x0005 | Average Voltage                           |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Center Beam Intensity At Full Power                      | 0x0006 | Luminous Intensity                        |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Chromaticity Tolerance                                   | 0x0007 | Chromaticity Tolerance                    |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Color Rendering Index R9                                 | 0x0008 | Cie 13.3-1995 Color Rendering Index       |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Color Rendering Index Ra                                 | 0x0009 | Cie 13.3-1995 Color Rendering Index       |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Appearance                                        | 0x000A | Gap.Appearance                            |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Country Of Origin                                 | 0x000B | Country Code                              |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Date Of Manufacture                               | 0x000C | Date UTC                                  |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Energy Use Since Turn On                          | 0x000D | Energy                                    |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Firmware Revision                                 | 0x000E | Fixed String 8                            |  8   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Global Trade Item Number                          | 0x000F | Global Trade Item Number                  |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Hardware Revision                                 | 0x0010 | Fixed String 16                           |  16  |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Manufacturer Name                                 | 0x0011 | Fixed String 36                           |  36  |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Model Number                                      | 0x0012 | Fixed String 24                           |  24  |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Operating Temperature Range Specification         | 0x0013 | Temperature Range                         |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Operating Temperature Statistical Values          | 0x0014 | Temperature Statistics                    |  9   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Over Temperature Event Statistics                 | 0x0015 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Power Range Specification                         | 0x0016 | Power Specification                       |  9   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Runtime Since Turn On                             | 0x0017 | Time Hour 24                              |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Runtime Warranty                                  | 0x0018 | Time Hour 24                              |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Serial Number                                     | 0x0019 | Fixed String 16                           |  16  |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Software Revision                                 | 0x001A | Fixed String 8                            |  8   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Device Under Temperature Event Statistics                | 0x001B | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Indoor Ambient Temperature Statistical Values            | 0x001C | Temperature 8 Statistics                  |  5   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Initial CIE 1931 Chromaticity Coordinates                | 0x001D | Chromaticity Coordinates                  |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Initial Correlated Color Temperature                     | 0x001E | Correlated Color Temperature              |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Initial Luminous Flux                                    | 0x001F | Luminous Flux                             |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Initial Planckian Distance                               | 0x0020 | Chromatic Distance From Planckian         |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Input Current Range Specification                        | 0x0021 | Electric Current Specification            |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Input Current Statistics                                 | 0x0022 | Electric Current Statistics               |  9   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Input Over Current Event Statistics                      | 0x0023 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Input Over Ripple Voltage Event Statistics               | 0x0024 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Input Over Voltage Event Statistics                      | 0x0025 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Input Under Current Event Statistics                     | 0x0026 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Input Under Voltage Event Statistics                     | 0x0027 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Input Voltage Range Specification                        | 0x0028 | Voltage Specification                     |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Input Voltage Ripple Specification                       | 0x0029 | Percentage 8                              |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Input Voltage Statistics                                 | 0x002A | Voltage Statistics                        |  9   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Ambient LuxLevel On                        | 0x002B | Illuminance                               |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Ambient LuxLevel Prolong                   | 0x002C | Illuminance                               |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Ambient LuxLevel Standby                   | 0x002D | Illuminance                               |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Lightness On                               | 0x002E | Perceived Lightness                       |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Lightness Prolong                          | 0x002F | Perceived Lightness                       |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Lightness Standby                          | 0x0030 | Perceived Lightness                       |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Regulator Accuracy                         | 0x0031 | Percentage 8                              |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Regulator Kid                              | 0x0032 | Coefficient                               |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Regulator Kiu                              | 0x0033 | Coefficient                               |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Regulator Kpd                              | 0x0034 | Coefficient                               |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Regulator Kpu                              | 0x0035 | Coefficient                               |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Time Fade                                  | 0x0036 | Time Millisecond 24                       |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Time Fade On                               | 0x0037 | Time Millisecond 24                       |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Time Fade Standby Auto                     | 0x0038 | Time Millisecond 24                       |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Time Fade Standby Manual                   | 0x0039 | Time Millisecond 24                       |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Time Occupancy Delay                       | 0x003A | Time Millisecond 24                       |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Time Prolong                               | 0x003B | Time Millisecond 24                       |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Control Time Run On                                | 0x003C | Time Millisecond 24                       |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Lumen Maintenance Factor                                 | 0x003D | Percentage 8                              |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminous Efficacy                                        | 0x003E | Luminous Efficacy                         |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminous Energy Since Turn On                            | 0x003F | Luminous Energy                           |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminous Exposure                                        | 0x0040 | Luminous Exposure                         |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminous Flux Range                                      | 0x0041 | Luminous Flux Range                       |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Motion Sensed                                            | 0x0042 | Percentage 8                              |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Motion Threshold                                         | 0x0043 | Percentage 8                              |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Open Circuit Event Statistics                            | 0x0044 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Outdoor Statistical Values                               | 0x0045 | Temperature 8 Statistics                  |  5   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Output Current Range                                     | 0x0046 | Electric Current Range                    |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Output Current Statistics                                | 0x0047 | Electric Current Statistics               |  9   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Output Ripple Voltage Specification                      | 0x0048 | Percentage 8                              |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Output Voltage Range                                     | 0x0049 | Voltage Specification                     |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Output Voltage Statistics                                | 0x004A | Voltage Statistics                        |  9   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Over Output Ripple Voltage Event Statistics              | 0x004B | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | People Count                                             | 0x004C | Count 16                                  |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Presence Detected                                        | 0x004D | Boolean                                   |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Ambient Light Level                              | 0x004E | Illuminance                               |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Ambient Temperature                              | 0x004F | Temperature 8                             |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present CIE 1931 Chromaticity Coordinates                | 0x0050 | Chromaticity Coordinates                  |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Correlated Color Temperature                     | 0x0051 | Correlated Color Temperature              |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Device Input Power                               | 0x0052 | Power                                     |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Device Operating Efficiency                      | 0x0053 | Percentage 8                              |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Device Operating Temperature                     | 0x0054 | Temperature                               |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Illuminance                                      | 0x0055 | Illuminance                               |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Indoor Ambient Temperature                       | 0x0056 | Temperature 8                             |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Input Current                                    | 0x0057 | Electric Current                          |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Input Ripple Voltage                             | 0x0058 | Percentage 8                              |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Input Voltage                                    | 0x0059 | Voltage                                   |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Luminous Flux                                    | 0x005A | Luminous Flux                             |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Outdoor Ambient Temperature                      | 0x005B | Temperature 8                             |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Output Current                                   | 0x005C | Electric Current                          |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Output Voltage                                   | 0x005D | Voltage                                   |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Planckian Distance                               | 0x005E | Chromatic Distance From Planckian         |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Relative Output Ripple Voltage                   | 0x005F | Percentage 8                              |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Relative Device Energy Use In A Period Of Day            | 0x0060 | Energy In A Period Of Day                 |  5   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Relative Device Runtime In A Generic Level Range         | 0x0061 | Relative Runtime In A Generic Level Range |  5   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Relative Exposure Time In An Illuminance Range           | 0x0062 | Relative Value In An Illuminance Range    |  5   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Relative Runtime In A Correlated Color Temperature Range | 0x0063 | Luminous Energy                           |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Relative Runtime In A Device Operating Temperature Range | 0x0064 | Relative Value In A Temperature Range     |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Relative Runtime In An Input Current Range               | 0x0065 | Relative Runtime In A Current Range       |  5   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Relative Runtime In An Input Voltage Range               | 0x0066 | Relative Value In A Voltage Range         |  5   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Short Circuit Event Statistics                           | 0x0067 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Time Since Motion Sensed                                 | 0x0068 | Time Second 16                            |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Time Since Presence Detected                             | 0x0069 | Time Second 16                            |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Total Device Energy Use                                  | 0x006A | Energy                                    |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Total Device Off On Cycles                               | 0x006B | Count 24                                  |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Total Device Power On Cycles                             | 0x006C | Count 24                                  |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Total Device Power On Time                               | 0x006D | Time Hour 24                              |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Total Device Runtime                                     | 0x006E | Time Hour 24                              |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Total Light Exposure Time                                | 0x006F | Time Hour 24                              |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Total Luminous Energy                                    | 0x0070 | Luminous Energy                           |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Desired Ambient Temperature                              | 0x0071 | Temperature 8                             |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Precise Total Device Energy Use                          | 0x0072 | Energy32                                  |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Power Factor                                             | 0x0073 | Cosine Of The Angle                       |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Sensor Gain                                              | 0x0074 | Coefficient                               |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Precise Present Ambient Temperature                      | 0x0075 | Temperature                               |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Ambient Relative Humidity                        | 0x0076 | Humidity                                  |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Ambient Carbon Dioxide Concentration             | 0x0077 | CO2 Concentration                         |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Ambient Volatile Organic Compounds Concentration | 0x0078 | VOC Concentration                         |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Ambient Noise                                    | 0x0079 | Noise                                     |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Active Energy Loadside                                   | 0x0080 | Energy32                                  |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Active Power Loadside                                    | 0x0081 | Power                                     |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Air Pressure                                             | 0x0082 | Pressure                                  |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Apparent Energy                                          | 0x0083 | Apparent Energy32                         |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Apparent Power                                           | 0x0084 | Apparent Power                            |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Apparent Wind Direction                                  | 0x0085 | Apparent Wind Direction                   |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Apparent Wind Speed                                      | 0x0086 | Apparent Wind Speed                       |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Dew Point                                                | 0x0087 | Dew Point                                 |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | External Supply Voltage                                  | 0x0088 | High Voltage                              |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | External Supply Voltage Frequency                        | 0x0089 | Voltage Frequency                         |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Gust Factor                                              | 0x008A | Gust Factor                               |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Heat Index                                               | 0x008B | Heat Index                                |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Distribution                                       | 0x008C | Light Distribution                        |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source Current                                     | 0x008D | Average Current                           |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source On Time Not Resettable                      | 0x008E | Time Second 32                            |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source On Time Resettable                          | 0x008F | Time Second 32                            |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source Open Circuit Statistics                     | 0x0090 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source Overall Failures Statistics                 | 0x0091 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source Short Circuit Statistics                    | 0x0092 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source Start Counter Resettable                    | 0x0093 | Count 24                                  |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source Temperature                                 | 0x0094 | High Temperature                          |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source Thermal Derating Statistics                 | 0x0095 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source Thermal Shutdown Statistics                 | 0x0096 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source Total Power On Cycles                       | 0x0097 | Count 24                                  |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source Voltage                                     | 0x0098 | Average Voltage                           |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminaire Color                                          | 0x0099 | Fixed String 24                           |  24  |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminaire Identification Number                          | 0x009A | Fixed String 24                           |  24  |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminaire Manufacturer GTIN                              | 0x009B | Global Trade Item Number                  |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminaire Nominal Input Power                            | 0x009C | Power                                     |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminaire Nominal Maximum AC Mains Voltage               | 0x009D | Voltage                                   |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminaire Nominal Minimum AC Mains Voltage               | 0x009E | Voltage                                   |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminaire Power At Minimum Dim Level                     | 0x009F | Power                                     |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminaire Time Of Manufacture                            | 0x00A0 | Date UTC                                  |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Magnetic Declination                                     | 0x00A1 | Magnetic Declination                      |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Magnetic Flux Density - 2D                               | 0x00A2 | Magnetic Flux Density - 2D                |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Magnetic Flux Density - 3D                               | 0x00A3 | Magnetic Flux Density - 3D                |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Nominal Light Output                                     | 0x00A4 | Light Output                              |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Overall Failure Condition                                | 0x00A5 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Pollen Concentration                                     | 0x00A6 | Pollen Concentration                      |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Indoor Relative Humidity                         | 0x00A7 | Humidity                                  |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Present Outdoor Relative Humidity                        | 0x00A8 | Humidity                                  |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Pressure                                                 | 0x00A9 | Pressure                                  |  4   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Rainfall                                                 | 0x00AA | Rainfall                                  |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Rated Median Useful Life Of Luminaire                    | 0x00AB | Time Hour 24                              |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Rated Median Useful Light Source Starts                  | 0x00AC | Count 24                                  |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Reference Temperature                                    | 0x00AD | High Temperature                          |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Total Device Starts                                      | 0x00AE | Count 24                                  |  3   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | True Wind Direction                                      | 0x00AF | True Wind Direction                       |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | True Wind Speed                                          | 0x00B0 | True Wind Speed                           |  2   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | UV Index                                                 | 0x00B1 | UV Index                                  |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Wind Chill                                               | 0x00B2 | Wind Chill                                |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Light Source Type                                        | 0x00B3 | Light Source Type                         |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Luminaire Identification String                          | 0x00B4 | Fixed String 64                           |  64  |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Output Power Limitation                                  | 0x00B5 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Thermal Derating                                         | 0x00B6 | Event Statistics                          |  6   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ * | Output Current Percent                                   | 0x00B7 | Percentage 8                              |  1   |
+ * |----------------------------------------------------------|--------|-------------------------------------------|------|
+ */
+
+/**
+ * @brief BLE Mesh Device Property IDs
+ */
+#define BLE_MESH_INVALID_DEVICE_PROPERTY_ID                                 0x0000
+#define BLE_MESH_AVERAGE_AMBIENT_TEMPERATURE_IN_A_PERIOD_OF_DAY             0x0001
+#define BLE_MESH_AVERAGE_INPUT_CURRENT                                      0x0002
+#define BLE_MESH_AVERAGE_INPUT_VOLTAGE                                      0x0003
+#define BLE_MESH_AVERAGE_OUTPUT_CURRENT                                     0x0004
+#define BLE_MESH_AVERAGE_OUTPUT_VOLTAGE                                     0x0005
+#define BLE_MESH_CENTER_BEAM_INTENSITY_AT_FULL_POWER                        0x0006
+#define BLE_MESH_CHROMATICITY_TOLERANCE                                     0x0007
+#define BLE_MESH_COLOR_RENDERING_INDEX_R9                                   0x0008
+#define BLE_MESH_COLOR_RENDERING_INDEX_RA                                   0x0009
+#define BLE_MESH_DEVICE_APPEARANCE                                          0x000A
+#define BLE_MESH_DEVICE_COUNTRY_OF_ORIGIN                                   0x000B
+#define BLE_MESH_DEVICE_DATE_OF_MANUFACTURE                                 0x000C
+#define BLE_MESH_DEVICE_ENERGY_USE_SINCE_TURN_ON                            0x000D
+#define BLE_MESH_DEVICE_FIRMWARE_REVISION                                   0x000E
+#define BLE_MESH_DEVICE_GLOBAL_TRADE_ITEM_NUMBER                            0x000F
+#define BLE_MESH_DEVICE_HARDWARE_REVISION                                   0x0010
+#define BLE_MESH_DEVICE_MANUFACTURER_NAME                                   0x0011
+#define BLE_MESH_DEVICE_MODEL_NUMBER                                        0x0012
+#define BLE_MESH_DEVICE_OPERATING_TEMPERATURE_RANGE_SPECIFICATION           0x0013
+#define BLE_MESH_DEVICE_OPERATING_TEMPERATURE_STATISTICAL_VALUES            0x0014
+#define BLE_MESH_DEVICE_OVER_TEMPERATURE_EVENT_STATISTICS                   0x0015
+#define BLE_MESH_DEVICE_POWER_RANGE_SPECIFICATION                           0x0016
+#define BLE_MESH_DEVICE_RUNTIME_SINCE_TURN_ON                               0x0017
+#define BLE_MESH_DEVICE_RUNTIME_WARRANTY                                    0x0018
+#define BLE_MESH_DEVICE_SERIAL_NUMBER                                       0x0019
+#define BLE_MESH_DEVICE_SOFTWARE_REVISION                                   0x001A
+#define BLE_MESH_DEVICE_UNDER_TEMPERATURE_EVENT_STATISTICS                  0x001B
+#define BLE_MESH_INDOOR_AMBIENT_TEMPERATURE_STATISTICAL_VALUES              0x001C
+#define BLE_MESH_INITIAL_CIE_1931_CHROMATICITY_COORDINATES                  0x001D
+#define BLE_MESH_INITIAL_CORRELATED_COLOR_TEMPERATURE                       0x001E
+#define BLE_MESH_INITIAL_LUMINOUS_FLUX                                      0x001F
+#define BLE_MESH_INITIAL_PLANCKIAN_DISTANCE                                 0x0020
+#define BLE_MESH_INPUT_CURRENT_RANGE_SPECIFICATION                          0x0021
+#define BLE_MESH_INPUT_CURRENT_STATISTICS                                   0x0022
+#define BLE_MESH_INPUT_OVER_CURRENT_EVENT_STATISTICS                        0x0023
+#define BLE_MESH_INPUT_OVER_RIPPLE_VOLTAGE_EVENT_STATISTICS                 0x0024
+#define BLE_MESH_INPUT_OVER_VOLTAGE_EVENT_STATISTICS                        0x0025
+#define BLE_MESH_INPUT_UNDER_CURRENT_EVENT_STATISTICS                       0x0026
+#define BLE_MESH_INPUT_UNDER_VOLTAGE_EVENT_STATISTICS                       0x0027
+#define BLE_MESH_INPUT_VOLTAGE_RANGE_SPECIFICATION                          0x0028
+#define BLE_MESH_INPUT_VOLTAGE_RIPPLE_SPECIFICATION                         0x0029
+#define BLE_MESH_INPUT_VOLTAGE_STATISTICS                                   0x002A
+#define BLE_MESH_LIGHT_CONTROL_AMBIENT_LUXLEVEL_ON                          0x002B
+#define BLE_MESH_LIGHT_CONTROL_AMBIENT_LUXLEVEL_PROLONG                     0x002C
+#define BLE_MESH_LIGHT_CONTROL_AMBIENT_LUXLEVEL_STANDBY                     0x002D
+#define BLE_MESH_LIGHT_CONTROL_LIGHTNESS_ON                                 0x002E
+#define BLE_MESH_LIGHT_CONTROL_LIGHTNESS_PROLONG                            0x002F
+#define BLE_MESH_LIGHT_CONTROL_LIGHTNESS_STANDBY                            0x0030
+#define BLE_MESH_LIGHT_CONTROL_REGULATOR_ACCURACY                           0x0031
+#define BLE_MESH_LIGHT_CONTROL_REGULATOR_KID                                0x0032
+#define BLE_MESH_LIGHT_CONTROL_REGULATOR_KIU                                0x0033
+#define BLE_MESH_LIGHT_CONTROL_REGULATOR_KPD                                0x0034
+#define BLE_MESH_LIGHT_CONTROL_REGULATOR_KPU                                0x0035
+#define BLE_MESH_LIGHT_CONTROL_TIME_FADE                                    0x0036
+#define BLE_MESH_LIGHT_CONTROL_TIME_FADE_ON                                 0x0037
+#define BLE_MESH_LIGHT_CONTROL_TIME_FADE_STANDBY_AUTO                       0x0038
+#define BLE_MESH_LIGHT_CONTROL_TIME_FADE_STANDBY_MANUAL                     0x0039
+#define BLE_MESH_LIGHT_CONTROL_TIME_OCCUPANCY_DELAY                         0x003A
+#define BLE_MESH_LIGHT_CONTROL_TIME_PROLONG                                 0x003B
+#define BLE_MESH_LIGHT_CONTROL_TIME_RUN_ON                                  0x003C
+#define BLE_MESH_LUMEN_MAINTENANCE_FACTOR                                   0x003D
+#define BLE_MESH_LUMINOUS_EFFICACY                                          0x003E
+#define BLE_MESH_LUMINOUS_ENERGY_SINCE_TURN_ON                              0x003F
+#define BLE_MESH_LUMINOUS_EXPOSURE                                          0x0040
+#define BLE_MESH_LUMINOUS_FLUX_RANGE                                        0x0041
+#define BLE_MESH_MOTION_SENSED                                              0x0042
+#define BLE_MESH_MOTION_THRESHOLD                                           0x0043
+#define BLE_MESH_OPEN_CIRCUIT_EVENT_STATISTICS                              0x0044
+#define BLE_MESH_OUTDOOR_STATISTICAL_VALUES                                 0x0045
+#define BLE_MESH_OUTPUT_CURRENT_RANGE                                       0x0046
+#define BLE_MESH_OUTPUT_CURRENT_STATISTICS                                  0x0047
+#define BLE_MESH_OUTPUT_RIPPLE_VOLTAGE_SPECIFICATION                        0x0048
+#define BLE_MESH_OUTPUT_VOLTAGE_RANGE                                       0x0049
+#define BLE_MESH_OUTPUT_VOLTAGE_STATISTICS                                  0x004A
+#define BLE_MESH_OVER_OUTPUT_RIPPLE_VOLTAGE_EVENT_STATISTICS                0x004B
+#define BLE_MESH_PEOPLE_COUNT                                               0x004C
+#define BLE_MESH_PRESENCE_DETECTED                                          0x004D
+#define BLE_MESH_PRESENT_AMBIENT_LIGHT_LEVEL                                0x004E
+#define BLE_MESH_PRESENT_AMBIENT_TEMPERATURE                                0x004F
+#define BLE_MESH_PRESENT_CIE_1931_CHROMATICITY                              0x0050
+#define BLE_MESH_PRESENT_CORRELATED_COLOR_TEMPERATURE                       0x0051
+#define BLE_MESH_PRESENT_DEVICE_INPUT_POWER                                 0x0052
+#define BLE_MESH_PRESENT_DEVICE_OPERATING_EFFICIENCY                        0x0053
+#define BLE_MESH_PRESENT_DEVICE_OPERATING_TEMPERATURE                       0x0054
+#define BLE_MESH_PRESENT_ILLUMINANCE                                        0x0055
+#define BLE_MESH_PRESENT_INDOOR_AMBIENT_TEMPERATURE                         0x0056
+#define BLE_MESH_PRESENT_INPUT_CURRENT                                      0x0057
+#define BLE_MESH_PRESENT_INPUT_RIPPLE_VOLTAGE                               0x0058
+#define BLE_MESH_PRESENT_INPUT_VOLTAGE                                      0x0059
+#define BLE_MESH_PRESENT_LUMINOUS_FLUX                                      0x005A
+#define BLE_MESH_PRESENT_OUTDOOR_AMBIENT_TEMPERATURE                        0x005B
+#define BLE_MESH_PRESENT_OUTPUT_CURRENT                                     0x005C
+#define BLE_MESH_PRESENT_OUTPUT_VOLTAGE                                     0x005D
+#define BLE_MESH_PRESENT_PLANCKIAN_DISTANCE                                 0x005E
+#define BLE_MESH_PRESENT_RELATIVE_OUTPUT_RIPPLE_VOLTAGE                     0x005F
+#define BLE_MESH_RELATIVE_DEVICE_ENERGY_USE_IN_A_PERIOD_OF_DAY              0x0060
+#define BLE_MESH_RELATIVE_DEVICE_RUNTIME_IN_A_GENERIC_LEVEL_RANGE           0x0061
+#define BLE_MESH_RELATIVE_EXPOSURE_TIME_IN_AN_ILLUMINANCE_RANGE             0x0062
+#define BLE_MESH_RELATIVE_RUNTIME_IN_A_CORRELATED_COLOR_TEMPERATURE_RANGE   0x0063
+#define BLE_MESH_RELATIVE_RUNTIME_IN_A_DEVICE_OPERATING_TEMPERATURE_RANGE   0x0064
+#define BLE_MESH_RELATIVE_RUNTIME_IN_AN_INPUT_CURRENT_RANGE                 0x0065
+#define BLE_MESH_RELATIVE_RUNTIME_IN_AN_INPUT_VOLTAGE_RANGE                 0x0066
+#define BLE_MESH_SHORT_CIRCUIT_EVENT_STATISTICS                             0x0067
+#define BLE_MESH_TIME_SINCE_MOTION_SENSED                                   0x0068
+#define BLE_MESH_TIME_SINCE_PRESENCE_DETECTED                               0x0069
+#define BLE_MESH_TOTAL_DEVICE_ENERGY_USE                                    0x006A
+#define BLE_MESH_TOTAL_DEVICE_OFF_ON_CYCLES                                 0x006B
+#define BLE_MESH_TOTAL_DEVICE_POWER_ON_CYCLES                               0x006C
+#define BLE_MESH_TOTAL_DEVICE_POWER_ON_TIME                                 0x006D
+#define BLE_MESH_TOTAL_DEVICE_RUNTIME                                       0x006E
+#define BLE_MESH_TOTAL_LIGHT_EXPOSURE_TIME                                  0x006F
+#define BLE_MESH_TOTAL_LUMINOUS_ENERGY                                      0x0070
+#define BLE_MESH_DESIRED_AMBIENT_TEMPERATURE                                0x0071
+#define BLE_MESH_PRECISE_TOTAL_DEVICE_ENERGY_USE                            0x0072
+#define BLE_MESH_POWER_FACTOR                                               0x0073
+#define BLE_MESH_SENSOR_GAIN                                                0x0074
+#define BLE_MESH_PRECISE_PRESENT_AMBIENT_TEMPERATURE                        0x0075
+#define BLE_MESH_PRESENT_AMBIENT_RELATIVE_HUMIDITY                          0x0076
+#define BLE_MESH_PRESENT_AMBIENT_CARBON_DIOXIDE_CONCENTRATION               0x0077
+#define BLE_MESH_PRESENT_AMBIENT_VOLATILE_ORGANIC_COMPOUNDS_CONCENTRATION   0x0078
+#define BLE_MESH_PRESENT_AMBIENT_NOISE                                      0x0079
+#define BLE_MESH_ACTIVE_ENERGY_LOADSIDE                                     0x0080
+#define BLE_MESH_ACTIVE_POWER_LOADSIDE                                      0x0081
+#define BLE_MESH_AIR_PRESSURE                                               0x0082
+#define BLE_MESH_APPARENT_ENERGY                                            0x0083
+#define BLE_MESH_APPARENT_POWER                                             0x0084
+#define BLE_MESH_APPARENT_WIND_DIRECTION                                    0x0085
+#define BLE_MESH_APPARENT_WIND_SPEED                                        0x0086
+#define BLE_MESH_DEW_POINT                                                  0x0087
+#define BLE_MESH_EXTERNAL_SUPPLY_VOLTAGE                                    0x0088
+#define BLE_MESH_EXTERNAL_SUPPLY_VOLTAGE_FREQUENCY                          0x0089
+#define BLE_MESH_GUST_FACTOR                                                0x008A
+#define BLE_MESH_HEAT_INDEX                                                 0x008B
+#define BLE_MESH_LIGHT_DISTRIBUTION                                         0x008C
+#define BLE_MESH_LIGHT_SOURCE_CURRENT                                       0x008D
+#define BLE_MESH_LIGHT_SOURCE_ON_TIME_NOT_RESETTABLE                        0x008E
+#define BLE_MESH_LIGHT_SOURCE_ON_TIME_RESETTABLE                            0x008F
+#define BLE_MESH_LIGHT_SOURCE_OPEN_CIRCUIT_STATISTICS                       0x0090
+#define BLE_MESH_LIGHT_SOURCE_OVERALL_FAILURES_STATISTICS                   0x0091
+#define BLE_MESH_LIGHT_SOURCE_SHORT_CIRCUIT_STATISTICS                      0x0092
+#define BLE_MESH_LIGHT_SOURCE_START_COUNTER_RESETTABLE                      0x0093
+#define BLE_MESH_LIGHT_SOURCE_TEMPERATURE                                   0x0094
+#define BLE_MESH_LIGHT_SOURCE_THERMAL_DERATING_STATISTICS                   0x0095
+#define BLE_MESH_LIGHT_SOURCE_THERMAL_SHUTDOWN_STATISTICS                   0x0096
+#define BLE_MESH_LIGHT_SOURCE_TOTAL_POWER_ON_CYCLES                         0x0097
+#define BLE_MESH_LIGHT_SOURCE_VOLTAGE                                       0x0098
+#define BLE_MESH_LUMINAIRE_COLOR                                            0x0099
+#define BLE_MESH_LUMINAIRE_IDENTIFICATION_NUMBER                            0x009A
+#define BLE_MESH_LUMINAIRE_MANUFACTURER_GTIN                                0x009B
+#define BLE_MESH_LUMINAIRE_NOMINAL_INPUT_POWER                              0x009C
+#define BLE_MESH_LUMINAIRE_NOMINAL_MAXIMUM_AC_MAINS_VOLTAGE                 0x009D
+#define BLE_MESH_LUMINAIRE_NOMINAL_MINIMUM_AC_MAINS_VOLTAGE                 0x009E
+#define BLE_MESH_LUMINAIRE_POWER_AT_MINIMUM_DIM_LEVEL                       0x009F
+#define BLE_MESH_LUMINAIRE_TIME_OF_MANUFACTURE                              0x00A0
+#define BLE_MESH_MAGNETIC_DECLINATION                                       0x00A1
+#define BLE_MESH_MAGNETIC_FLUX_DENSITY_2D                                   0x00A2
+#define BLE_MESH_MAGNETIC_FLUX_DENSITY_3D                                   0x00A3
+#define BLE_MESH_NOMINAL_LIGHT_OUTPUT                                       0x00A4
+#define BLE_MESH_OVERALL_FAILURE_CONDITION                                  0x00A5
+#define BLE_MESH_POLLEN_CONCENTRATION                                       0x00A6
+#define BLE_MESH_PRESENT_INDOOR_RELATIVE_HUMIDITY                           0x00A7
+#define BLE_MESH_PRESENT_OUTDOOR_RELATIVE_HUMIDITY                          0x00A8
+#define BLE_MESH_PRESSURE                                                   0x00A9
+#define BLE_MESH_RAINFALL                                                   0x00AA
+#define BLE_MESH_RATED_MEDIAN_USEFUL_LIFE_OF_LUMINAIRE                      0x00AB
+#define BLE_MESH_RATED_MEDIAN_USEFUL_LIGHT_SOURCE_STARTS                    0x00AC
+#define BLE_MESH_REFERENCE_TEMPERATURE                                      0x00AD
+#define BLE_MESH_TOTAL_DEVICE_STARTS                                        0x00AE
+#define BLE_MESH_TRUE_WIND_DIRECTION                                        0x00AF
+#define BLE_MESH_TRUE_WIND_SPEED                                            0x00B0
+#define BLE_MESH_UV_INDEX                                                   0x00B1
+#define BLE_MESH_WIND_CHILL                                                 0x00B2
+#define BLE_MESH_LIGHT_SOURCE_TYPE                                          0x00B3
+#define BLE_MESH_LUMINAIRE_IDENTIFICATION_STRING                            0x00B4
+#define BLE_MESH_OUTPUT_POWER_LIMITATION                                    0x00B5
+#define BLE_MESH_THERMAL_DERATING                                           0x00B6
+#define BLE_MESH_OUTPUT_CURRENT_PERCENT                                     0x00B7
+
+/**
+ * @brief BLE Mesh Device Property value length
+ */
+#define BLE_MESH_AVERAGE_AMBIENT_TEMPERATURE_IN_A_PERIOD_OF_DAY_LEN             3
+#define BLE_MESH_AVERAGE_INPUT_CURRENT_LEN                                      3
+#define BLE_MESH_AVERAGE_INPUT_VOLTAGE_LEN                                      3
+#define BLE_MESH_AVERAGE_OUTPUT_CURRENT_LEN                                     3
+#define BLE_MESH_AVERAGE_OUTPUT_VOLTAGE_LEN                                     3
+#define BLE_MESH_CENTER_BEAM_INTENSITY_AT_FULL_POWER_LEN                        2
+#define BLE_MESH_CHROMATICITY_TOLERANCE_LEN                                     1
+#define BLE_MESH_COLOR_RENDERING_INDEX_R9_LEN                                   1
+#define BLE_MESH_COLOR_RENDERING_INDEX_RA_LEN                                   1
+#define BLE_MESH_DEVICE_APPEARANCE_LEN                                          2
+#define BLE_MESH_DEVICE_COUNTRY_OF_ORIGIN_LEN                                   2
+#define BLE_MESH_DEVICE_DATE_OF_MANUFACTURE_LEN                                 3
+#define BLE_MESH_DEVICE_ENERGY_USE_SINCE_TURN_ON_LEN                            3
+#define BLE_MESH_DEVICE_FIRMWARE_REVISION_LEN                                   8
+#define BLE_MESH_DEVICE_GLOBAL_TRADE_ITEM_NUMBER_LEN                            6
+#define BLE_MESH_DEVICE_HARDWARE_REVISION_LEN                                   16
+#define BLE_MESH_DEVICE_MANUFACTURER_NAME_LEN                                   36
+#define BLE_MESH_DEVICE_MODEL_NUMBER_LEN                                        24
+#define BLE_MESH_DEVICE_OPERATING_TEMPERATURE_RANGE_SPECIFICATION_LEN           4
+#define BLE_MESH_DEVICE_OPERATING_TEMPERATURE_STATISTICAL_VALUES_LEN            9
+#define BLE_MESH_DEVICE_OVER_TEMPERATURE_EVENT_STATISTICS_LEN                   6
+#define BLE_MESH_DEVICE_POWER_RANGE_SPECIFICATION_LEN                           9
+#define BLE_MESH_DEVICE_RUNTIME_SINCE_TURN_ON_LEN                               3
+#define BLE_MESH_DEVICE_RUNTIME_WARRANTY_LEN                                    3
+#define BLE_MESH_DEVICE_SERIAL_NUMBER_LEN                                       16
+#define BLE_MESH_DEVICE_SOFTWARE_REVISION_LEN                                   8
+#define BLE_MESH_DEVICE_UNDER_TEMPERATURE_EVENT_STATISTICS_LEN                  6
+#define BLE_MESH_INDOOR_AMBIENT_TEMPERATURE_STATISTICAL_VALUES_LEN              5
+#define BLE_MESH_INITIAL_CIE_1931_CHROMATICITY_COORDINATES_LEN                  4
+#define BLE_MESH_INITIAL_CORRELATED_COLOR_TEMPERATURE_LEN                       2
+#define BLE_MESH_INITIAL_LUMINOUS_FLUX_LEN                                      2
+#define BLE_MESH_INITIAL_PLANCKIAN_DISTANCE_LEN                                 2
+#define BLE_MESH_INPUT_CURRENT_RANGE_SPECIFICATION_LEN                          6
+#define BLE_MESH_INPUT_CURRENT_STATISTICS_LEN                                   9
+#define BLE_MESH_INPUT_OVER_CURRENT_EVENT_STATISTICS_LEN                        6
+#define BLE_MESH_INPUT_OVER_RIPPLE_VOLTAGE_EVENT_STATISTICS_LEN                 6
+#define BLE_MESH_INPUT_OVER_VOLTAGE_EVENT_STATISTICS_LEN                        6
+#define BLE_MESH_INPUT_UNDER_CURRENT_EVENT_STATISTICS_LEN                       6
+#define BLE_MESH_INPUT_UNDER_VOLTAGE_EVENT_STATISTICS_LEN                       6
+#define BLE_MESH_INPUT_VOLTAGE_RANGE_SPECIFICATION_LEN                          6
+#define BLE_MESH_INPUT_VOLTAGE_RIPPLE_SPECIFICATION_LEN                         1
+#define BLE_MESH_INPUT_VOLTAGE_STATISTICS_LEN                                   9
+#define BLE_MESH_LIGHT_CONTROL_AMBIENT_LUXLEVEL_ON_LEN                          3
+#define BLE_MESH_LIGHT_CONTROL_AMBIENT_LUXLEVEL_PROLONG_LEN                     3
+#define BLE_MESH_LIGHT_CONTROL_AMBIENT_LUXLEVEL_STANDBY_LEN                     3
+#define BLE_MESH_LIGHT_CONTROL_LIGHTNESS_ON_LEN                                 2
+#define BLE_MESH_LIGHT_CONTROL_LIGHTNESS_PROLONG_LEN                            2
+#define BLE_MESH_LIGHT_CONTROL_LIGHTNESS_STANDBY_LEN                            2
+#define BLE_MESH_LIGHT_CONTROL_REGULATOR_ACCURACY_LEN                           1
+#define BLE_MESH_LIGHT_CONTROL_REGULATOR_KID_LEN                                4
+#define BLE_MESH_LIGHT_CONTROL_REGULATOR_KIU_LEN                                4
+#define BLE_MESH_LIGHT_CONTROL_REGULATOR_KPD_LEN                                4
+#define BLE_MESH_LIGHT_CONTROL_REGULATOR_KPU_LEN                                4
+#define BLE_MESH_LIGHT_CONTROL_TIME_FADE_LEN                                    3
+#define BLE_MESH_LIGHT_CONTROL_TIME_FADE_ON_LEN                                 3
+#define BLE_MESH_LIGHT_CONTROL_TIME_FADE_STANDBY_AUTO_LEN                       3
+#define BLE_MESH_LIGHT_CONTROL_TIME_FADE_STANDBY_MANUAL_LEN                     3
+#define BLE_MESH_LIGHT_CONTROL_TIME_OCCUPANCY_DELAY_LEN                         3
+#define BLE_MESH_LIGHT_CONTROL_TIME_PROLONG_LEN                                 3
+#define BLE_MESH_LIGHT_CONTROL_TIME_RUN_ON_LEN                                  3
+#define BLE_MESH_LUMEN_MAINTENANCE_FACTOR_LEN                                   1
+#define BLE_MESH_LUMINOUS_EFFICACY_LEN                                          2
+#define BLE_MESH_LUMINOUS_ENERGY_SINCE_TURN_ON_LEN                              3
+#define BLE_MESH_LUMINOUS_EXPOSURE_LEN                                          3
+#define BLE_MESH_LUMINOUS_FLUX_RANGE_LEN                                        4
+#define BLE_MESH_MOTION_SENSED_LEN                                              1
+#define BLE_MESH_MOTION_THRESHOLD_LEN                                           1
+#define BLE_MESH_OPEN_CIRCUIT_EVENT_STATISTICS_LEN                              6
+#define BLE_MESH_OUTDOOR_STATISTICAL_VALUES_LEN                                 5
+#define BLE_MESH_OUTPUT_CURRENT_RANGE_LEN                                       4
+#define BLE_MESH_OUTPUT_CURRENT_STATISTICS_LEN                                  9
+#define BLE_MESH_OUTPUT_RIPPLE_VOLTAGE_SPECIFICATION_LEN                        1
+#define BLE_MESH_OUTPUT_VOLTAGE_RANGE_LEN                                       6
+#define BLE_MESH_OUTPUT_VOLTAGE_STATISTICS_LEN                                  9
+#define BLE_MESH_OVER_OUTPUT_RIPPLE_VOLTAGE_EVENT_STATISTICS_LEN                6
+#define BLE_MESH_PEOPLE_COUNT_LEN                                               2
+#define BLE_MESH_PRESENCE_DETECTED_LEN                                          1
+#define BLE_MESH_PRESENT_AMBIENT_LIGHT_LEVEL_LEN                                3
+#define BLE_MESH_PRESENT_AMBIENT_TEMPERATURE_LEN                                1
+#define BLE_MESH_PRESENT_CIE_1931_CHROMATICITY_LEN                              4
+#define BLE_MESH_PRESENT_CORRELATED_COLOR_TEMPERATURE_LEN                       2
+#define BLE_MESH_PRESENT_DEVICE_INPUT_POWER_LEN                                 3
+#define BLE_MESH_PRESENT_DEVICE_OPERATING_EFFICIENCY_LEN                        1
+#define BLE_MESH_PRESENT_DEVICE_OPERATING_TEMPERATURE_LEN                       2
+#define BLE_MESH_PRESENT_ILLUMINANCE_LEN                                        3
+#define BLE_MESH_PRESENT_INDOOR_AMBIENT_TEMPERATURE_LEN                         1
+#define BLE_MESH_PRESENT_INPUT_CURRENT_LEN                                      2
+#define BLE_MESH_PRESENT_INPUT_RIPPLE_VOLTAGE_LEN                               1
+#define BLE_MESH_PRESENT_INPUT_VOLTAGE_LEN                                      2
+#define BLE_MESH_PRESENT_LUMINOUS_FLUX_LEN                                      2
+#define BLE_MESH_PRESENT_OUTDOOR_AMBIENT_TEMPERATURE_LEN                        1
+#define BLE_MESH_PRESENT_OUTPUT_CURRENT_LEN                                     2
+#define BLE_MESH_PRESENT_OUTPUT_VOLTAGE_LEN                                     2
+#define BLE_MESH_PRESENT_PLANCKIAN_DISTANCE_LEN                                 2
+#define BLE_MESH_PRESENT_RELATIVE_OUTPUT_RIPPLE_VOLTAGE_LEN                     1
+#define BLE_MESH_RELATIVE_DEVICE_ENERGY_USE_IN_A_PERIOD_OF_DAY_LEN              5
+#define BLE_MESH_RELATIVE_DEVICE_RUNTIME_IN_A_GENERIC_LEVEL_RANGE_LEN           5
+#define BLE_MESH_RELATIVE_EXPOSURE_TIME_IN_AN_ILLUMINANCE_RANGE_LEN             5
+#define BLE_MESH_RELATIVE_RUNTIME_IN_A_CORRELATED_COLOR_TEMPERATURE_RANGE_LEN   3
+#define BLE_MESH_RELATIVE_RUNTIME_IN_A_DEVICE_OPERATING_TEMPERATURE_RANGE_LEN   3
+#define BLE_MESH_RELATIVE_RUNTIME_IN_AN_INPUT_CURRENT_RANGE_LEN                 5
+#define BLE_MESH_RELATIVE_RUNTIME_IN_AN_INPUT_VOLTAGE_RANGE_LEN                 5
+#define BLE_MESH_SHORT_CIRCUIT_EVENT_STATISTICS_LEN                             6
+#define BLE_MESH_TIME_SINCE_MOTION_SENSED_LEN                                   2
+#define BLE_MESH_TIME_SINCE_PRESENCE_DETECTED_LEN                               2
+#define BLE_MESH_TOTAL_DEVICE_ENERGY_USE_LEN                                    3
+#define BLE_MESH_TOTAL_DEVICE_OFF_ON_CYCLES_LEN                                 3
+#define BLE_MESH_TOTAL_DEVICE_POWER_ON_CYCLES_LEN                               3
+#define BLE_MESH_TOTAL_DEVICE_POWER_ON_TIME_LEN                                 3
+#define BLE_MESH_TOTAL_DEVICE_RUNTIME_LEN                                       3
+#define BLE_MESH_TOTAL_LIGHT_EXPOSURE_TIME_LEN                                  3
+#define BLE_MESH_TOTAL_LUMINOUS_ENERGY_LEN                                      3
+#define BLE_MESH_DESIRED_AMBIENT_TEMPERATURE_LEN                                1
+#define BLE_MESH_PRECISE_TOTAL_DEVICE_ENERGY_USE_LEN                            4
+#define BLE_MESH_POWER_FACTOR_LEN                                               1
+#define BLE_MESH_SENSOR_GAIN_LEN                                                4
+#define BLE_MESH_PRECISE_PRESENT_AMBIENT_TEMPERATURE_LEN                        2
+#define BLE_MESH_PRESENT_AMBIENT_RELATIVE_HUMIDITY_LEN                          2
+#define BLE_MESH_PRESENT_AMBIENT_CARBON_DIOXIDE_CONCENTRATION_LEN               2
+#define BLE_MESH_PRESENT_AMBIENT_VOLATILE_ORGANIC_COMPOUNDS_CONCENTRATION_LEN   2
+#define BLE_MESH_PRESENT_AMBIENT_NOISE_LEN                                      1
+#define BLE_MESH_ACTIVE_ENERGY_LOADSIDE_LEN                                     4
+#define BLE_MESH_ACTIVE_POWER_LOADSIDE_LEN                                      3
+#define BLE_MESH_AIR_PRESSURE_LEN                                               4
+#define BLE_MESH_APPARENT_ENERGY_LEN                                            4
+#define BLE_MESH_APPARENT_POWER_LEN                                             3
+#define BLE_MESH_APPARENT_WIND_DIRECTION_LEN                                    2
+#define BLE_MESH_APPARENT_WIND_SPEED_LEN                                        2
+#define BLE_MESH_DEW_POINT_LEN                                                  1
+#define BLE_MESH_EXTERNAL_SUPPLY_VOLTAGE_LEN                                    3
+#define BLE_MESH_EXTERNAL_SUPPLY_VOLTAGE_FREQUENCY_LEN                          2
+#define BLE_MESH_GUST_FACTOR_LEN                                                1
+#define BLE_MESH_HEAT_INDEX_LEN                                                 1
+#define BLE_MESH_LIGHT_DISTRIBUTION_LEN                                         1
+#define BLE_MESH_LIGHT_SOURCE_CURRENT_LEN                                       3
+#define BLE_MESH_LIGHT_SOURCE_ON_TIME_NOT_RESETTABLE_LEN                        4
+#define BLE_MESH_LIGHT_SOURCE_ON_TIME_RESETTABLE_LEN                            4
+#define BLE_MESH_LIGHT_SOURCE_OPEN_CIRCUIT_STATISTICS_LEN                       6
+#define BLE_MESH_LIGHT_SOURCE_OVERALL_FAILURES_STATISTICS_LEN                   6
+#define BLE_MESH_LIGHT_SOURCE_SHORT_CIRCUIT_STATISTICS_LEN                      6
+#define BLE_MESH_LIGHT_SOURCE_START_COUNTER_RESETTABLE_LEN                      3
+#define BLE_MESH_LIGHT_SOURCE_TEMPERATURE_LEN                                   2
+#define BLE_MESH_LIGHT_SOURCE_THERMAL_DERATING_STATISTICS_LEN                   6
+#define BLE_MESH_LIGHT_SOURCE_THERMAL_SHUTDOWN_STATISTICS_LEN                   6
+#define BLE_MESH_LIGHT_SOURCE_TOTAL_POWER_ON_CYCLES_LEN                         3
+#define BLE_MESH_LIGHT_SOURCE_VOLTAGE_LEN                                       3
+#define BLE_MESH_LUMINAIRE_COLOR_LEN                                            24
+#define BLE_MESH_LUMINAIRE_IDENTIFICATION_NUMBER_LEN                            24
+#define BLE_MESH_LUMINAIRE_MANUFACTURER_GTIN_LEN                                6
+#define BLE_MESH_LUMINAIRE_NOMINAL_INPUT_POWER_LEN                              3
+#define BLE_MESH_LUMINAIRE_NOMINAL_MAXIMUM_AC_MAINS_VOLTAGE_LEN                 2
+#define BLE_MESH_LUMINAIRE_NOMINAL_MINIMUM_AC_MAINS_VOLTAGE_LEN                 2
+#define BLE_MESH_LUMINAIRE_POWER_AT_MINIMUM_DIM_LEVEL_LEN                       3
+#define BLE_MESH_LUMINAIRE_TIME_OF_MANUFACTURE_LEN                              3
+#define BLE_MESH_MAGNETIC_DECLINATION_LEN                                       2
+#define BLE_MESH_MAGNETIC_FLUX_DENSITY_2D_LEN                                   4
+#define BLE_MESH_MAGNETIC_FLUX_DENSITY_3D_LEN                                   6
+#define BLE_MESH_NOMINAL_LIGHT_OUTPUT_LEN                                       3
+#define BLE_MESH_OVERALL_FAILURE_CONDITION_LEN                                  6
+#define BLE_MESH_POLLEN_CONCENTRATION_LEN                                       3
+#define BLE_MESH_PRESENT_INDOOR_RELATIVE_HUMIDITY_LEN                           2
+#define BLE_MESH_PRESENT_OUTDOOR_RELATIVE_HUMIDITY_LEN                          2
+#define BLE_MESH_PRESSURE_LEN                                                   4
+#define BLE_MESH_RAINFALL_LEN                                                   2
+#define BLE_MESH_RATED_MEDIAN_USEFUL_LIFE_OF_LUMINAIRE_LEN                      3
+#define BLE_MESH_RATED_MEDIAN_USEFUL_LIGHT_SOURCE_STARTS_LEN                    3
+#define BLE_MESH_REFERENCE_TEMPERATURE_LEN                                      2
+#define BLE_MESH_TOTAL_DEVICE_STARTS_LEN                                        3
+#define BLE_MESH_TRUE_WIND_DIRECTION_LEN                                        2
+#define BLE_MESH_TRUE_WIND_SPEED_LEN                                            2
+#define BLE_MESH_UV_INDEX_LEN                                                   1
+#define BLE_MESH_WIND_CHILL_LEN                                                 1
+#define BLE_MESH_LIGHT_SOURCE_TYPE_LEN                                          1
+#define BLE_MESH_LUMINAIRE_IDENTIFICATION_STRING_LEN                            64
+#define BLE_MESH_OUTPUT_POWER_LIMITATION_LEN                                    6
+#define BLE_MESH_THERMAL_DERATING_LEN                                           6
+#define BLE_MESH_OUTPUT_CURRENT_PERCENT_LEN                                     1
+
+/**
+ * @brief BLE Mesh Device Property referenced Characteristic UUIDs
+ */
+#define BLE_MESH_UUID_AVERAGE_CURRENT_VAL                               0x2AE0
+#define BLE_MESH_UUID_AVERAGE_VOLTAGE_VAL                               0x2AE1
+#define BLE_MESH_UUID_BOOLEAN_VAL                                       0x2AE2
+#define BLE_MESH_UUID_CHROMATIC_DISTANCE_FROM_PLANCKIAN_VAL             0x2AE3
+#define BLE_MESH_UUID_CHROMATICITY_COORDINATE_VAL                       0x2B1C
+#define BLE_MESH_UUID_CHROMATICITY_COORDINATES_VAL                      0x2AE4
+#define BLE_MESH_UUID_CHROMATICITY_IN_CCT_AND_DUV_VALUES_VAL            0x2AE5
+#define BLE_MESH_UUID_CHROMATICITY_TOLERANCE_VAL                        0x2AE6
+#define BLE_MESH_UUID_CIE_13_3_1995_COLOR_RENDERING_INDEX_VAL           0x2AE7
+#define BLE_MESH_UUID_COEFFICIENT_VAL                                   0x2AE8
+#define BLE_MESH_UUID_CORRELATED_COLOR_TEMPERATURE_VAL                  0x2AE9
+#define BLE_MESH_UUID_COUNT_16_VAL                                      0x2AEA
+#define BLE_MESH_UUID_COUNT_24_VAL                                      0x2AEB
+#define BLE_MESH_UUID_COUNTRY_CODE_VAL                                  0x2AEC
+#define BLE_MESH_UUID_DATE_UTC_VAL                                      0x2AED
+#define BLE_MESH_UUID_ELECTRIC_CURRENT_VAL                              0x2AEE
+#define BLE_MESH_UUID_ELECTRIC_CURRENT_RANGE_VAL                        0x2AEF
+#define BLE_MESH_UUID_ELECTRIC_CURRENT_SPECIFICATION_VAL                0x2AF0
+#define BLE_MESH_UUID_ELECTRIC_CURRENT_STATISTICS_VAL                   0x2AF1
+#define BLE_MESH_UUID_ENERGY_VAL                                        0x2AF2
+#define BLE_MESH_UUID_ENERGY_IN_A_PERIOD_OF_DAY_VAL                     0x2AF3
+#define BLE_MESH_UUID_EVENT_STATISTICS_VAL                              0x2AF4
+#define BLE_MESH_UUID_FIXED_STRING_16_VAL                               0x2AF5
+#define BLE_MESH_UUID_FIXED_STRING_24_VAL                               0x2AF6
+#define BLE_MESH_UUID_FIXED_STRING_36_VAL                               0x2AF7
+#define BLE_MESH_UUID_FIXED_STRING_8_VAL                                0x2AF8
+#define BLE_MESH_UUID_GENERIC_LEVEL_VAL                                 0x2AF9
+#define BLE_MESH_UUID_GLOBAL_TRADE_ITEM_NUMBER_VAL                      0x2AFA
+#define BLE_MESH_UUID_ILLUMINANCE_VAL                                   0x2AFB
+#define BLE_MESH_UUID_LUMINOUS_EFFICACY_VAL                             0x2AFC
+#define BLE_MESH_UUID_LUMINOUS_ENERGY_VAL                               0x2AFD
+#define BLE_MESH_UUID_LUMINOUS_EXPOSURE_VAL                             0x2AFE
+#define BLE_MESH_UUID_LUMINOUS_FLUX_VAL                                 0x2AFF
+#define BLE_MESH_UUID_LUMINOUS_FLUX_RANGE_VAL                           0x2B00
+#define BLE_MESH_UUID_LUMINOUS_INTENSITY_VAL                            0x2B01
+#define BLE_MESH_UUID_MASS_FLOW_VAL                                     0x2B02
+/**
+ * The following four have been defined in mesh_uuid.h
+ * #define BLE_MESH_UUID_MESH_PROV_DATA_IN_VAL                          0x2ADB
+ * #define BLE_MESH_UUID_MESH_PROV_DATA_OUT_VAL                         0x2ADC
+ * #define BLE_MESH_UUID_MESH_PROXY_DATA_IN_VAL                         0x2ADD
+ * #define BLE_MESH_UUID_MESH_PROXY_DATA_OUT_VAL                        0x2ADE
+ */
+#define BLE_MESH_UUID_PERCEIVED_LIGHTNESS_VAL                           0x2B03
+#define BLE_MESH_UUID_PERCENTAGE_8_VAL                                  0x2B04
+#define BLE_MESH_UUID_POWER_VAL                                         0x2B05
+#define BLE_MESH_UUID_POWER_SPECIFICATION_VAL                           0x2B06
+#define BLE_MESH_UUID_RELATIVE_RUNTIME_IN_A_CURRENT_RANGE_VAL           0x2B07
+#define BLE_MESH_UUID_RELATIVE_RUNTIME_IN_A_GENERIC_LEVEL_RANGE_VAL     0x2B08
+#define BLE_MESH_UUID_RELATIVE_VALUE_IN_A_PERIOD_OF_DAY_VAL             0x2B0B
+#define BLE_MESH_UUID_RELATIVE_VALUE_IN_A_TEMPERATURE_RANGE_VAL         0x2B0C
+#define BLE_MESH_UUID_RELATIVE_VALUE_IN_A_VOLTAGE_RANGE_VAL             0x2B09
+#define BLE_MESH_UUID_RELATIVE_VALUE_IN_AN_ILLUMINANCE_RANGE_VAL        0x2B0A
+#define BLE_MESH_UUID_TEMPERATURE_8_VAL                                 0x2B0D
+#define BLE_MESH_UUID_TEMPERATURE_8_IN_A_PERIOD_OF_DAY_VAL              0x2B0E
+#define BLE_MESH_UUID_TEMPERATURE_8_STATISTICS_VAL                      0x2B0F
+#define BLE_MESH_UUID_TEMPERATURE_RANGE_VAL                             0x2B10
+#define BLE_MESH_UUID_TEMPERATURE_STATISTICS_VAL                        0x2B11
+#define BLE_MESH_UUID_TIME_DECIHOUR_8_VAL                               0x2B12
+#define BLE_MESH_UUID_TIME_EXPONENTIAL_8_VAL                            0x2B13
+#define BLE_MESH_UUID_TIME_HOUR_24_VAL                                  0x2B14
+#define BLE_MESH_UUID_TIME_MILLISECOND_24_VAL                           0x2B15
+#define BLE_MESH_UUID_TIME_SECOND_16_VAL                                0x2B16
+#define BLE_MESH_UUID_TIME_SECOND_8_VAL                                 0x2B17
+#define BLE_MESH_UUID_VOLTAGE_VAL                                       0x2B18
+#define BLE_MESH_UUID_VOLTAGE_SPECIFICATION_VAL                         0x2B19
+#define BLE_MESH_UUID_VOLTAGE_STATISTICS_VAL                            0x2B1A
+#define BLE_MESH_UUID_VOLUME_FLOW_VAL                                   0x2B1B
+
+/**
+ * @brief BLE Mesh Device Property referenced Characteristic Type Definitions
+ */
+
+/* Unit is in degrees Celsius with a resolution of 0.01 degrees Celsius. */
+typedef int16_t bt_mesh_temperature_t;
+
+typedef uint16_t bt_mesh_gap_appearance_t;
+
+/* Mesh Characteristics Type Definitions  */
+
+/* This characteristic represents an electric current.
+ * Note: Unit is ampere with a resolution of 0.01.
+ *       Minimum value: 0, maximum value: 655.34;
+ *       A value of 0xFFFF represents 'value is not known'.
+ */
+typedef uint16_t bt_mesh_electric_current_t;
+
+/* The Time Exponential 8 characteristic is used to represent a measure of period of
+ * time in seconds.
+ * Note: The time duration is given by the value 1.1^(N-64) in seconds, with N being
+ *       the raw 8-bit value;
+ *       Minimum value: 0.0, maximum value: 73216705;
+ *       A raw value of 0x00 represents 0 seconds, and a raw value of 0xFF represents
+ *       the total life of the device.
+ */
+typedef uint8_t bt_mesh_time_exponential_8_t;
+
+/* The Voltage characteristic is used to represent a measure of positive electric
+ * potential difference in units of volts.
+ * Note: Unit is volt with a resolution of 1/64V;
+ *       Minimum value: 0.0, maximum value: 1022.0;
+ *       A value of 0xFFFF represents 'value is not known'. The minimum representable
+ *       value represents the minimum value or lower, the maximum representable value
+ *       represents the maximum value or higher.
+ */
+typedef uint16_t bt_mesh_voltage_t;
+
+/* This characteristic aggregates the Electric Current characteristic and instance of
+ * the Time Exponential 8 characteristic.
+ */
+typedef struct __packed average_current {
+    bt_mesh_electric_current_t   electric_current;
+    bt_mesh_time_exponential_8_t sensing_duration;
+} bt_mesh_average_current_t;
+
+/* This characteristic aggregates the Voltage characteristic and instance of the Time
+ * Exponential 8 characteristic.
+ */
+typedef struct __packed average_voltage {
+    bt_mesh_voltage_t            voltage;
+    bt_mesh_time_exponential_8_t sensing_duration;
+} bt_mesh_average_voltage_t;
+
+/* The Boolean characteristic defines the predefined Boolean values as an enumeration.
+ * Key      |   Value
+ * 0        |   False
+ * 1        |   True
+ * 2 to 255 |   Prohibited
+ */
+typedef uint8_t bt_mesh_boolean_t;
+
+/* The Chromatic Distance From Planckian characteristic represents a distance of a
+ * chromaticity coordinate from the Planckian locus in the (u',2/3 v') diagram as
+ * defined by ANSI standard C78.377-2008. The distance is positive if the chromaticity
+ * coordinate is located above the Planckian locus (i.e. has as higher y value than the
+ * Planckian), and negative if it is located below. The distance is only valid within
+ * the range from -0.05 to 0.05.
+ * Note: Unit is unitless with a resolution of 0.00001;
+ *       Minimum value: -0.05, maximum value: 0.05;
+ *       A value of 0xFFFF represents 'value is not known';
+ *       A value of 0xFFFE represents 'value is not valid'.
+ */
+typedef int16_t bt_mesh_chromatic_distance_from_planckian_t;
+
+/* This characteristic represents a chromaticity coordinate in a color diagram such as
+ * the CIE1931 diagram. It can represent an x or y coordinate.
+ * Note: Unit is unitless with a resolution of 1/65535;
+ *       Minimum value: 0, maximum value: 1.0.
+ */
+typedef uint16_t bt_mesh_chromaticity_coordinate_t;
+
+/* This characteristic represents a chromaticity coordinate as a tuple with an x and
+ * y coordinate.
+ */
+typedef struct __packed chromaticity_coordinates {
+    bt_mesh_chromaticity_coordinate_t chromaticity_x_coordinate;
+    bt_mesh_chromaticity_coordinate_t chromaticity_y_coordinate;
+} bt_mesh_chromaticity_coordinates_t;
+
+/* The Correlated Color Temperature characteristic is used to represent correlated color
+ * temperature in a range from 800 to 65534 Kelvin with a resolution of 1 Kelvin.
+ * Note: Unit is Kelvin with a resolution of 1;
+ *       Minimum value: 800, maximum value: 65534;
+ *       A value of 0xFFFF represents 'value is not known'.
+ */
+typedef uint16_t bt_mesh_correlated_color_temperature_t;
+
+/* The Chromaticity In CCT And Duv Values characteristic is a composite characteristic
+ * consisting of the Correlated Color Temperature characteristic and the Chromatic
+ * Distance From Planckian characteristic.
+ */
+typedef struct __packed chromaticity_in_cct_and_duv_values {
+    bt_mesh_correlated_color_temperature_t      correlated_color_temperature;
+    bt_mesh_chromatic_distance_from_planckian_t chromaticity_distance_from_planckian;
+} bt_mesh_chromaticity_in_cct_and_duv_values_t;
+
+/* The Chromaticity Tolerance characteristic is a tolerance of a tuple of chromaticity
+ * values represented as a value of a radius of a circle in the CIE 1976 (u',v') diagram;
+ * value corresponding to the 3-sigma values of the expected chromaticity deviations.
+ * Note: Unit is unitless with a resolution of 0.0001;
+ *       Minimum value: 0, maximum value: 0.0255.
+ */
+typedef uint8_t bt_mesh_chromaticity_tolerance_t;
+
+/* The CIE 13.3-1995 Color Rendering Index characteristic is a color rendition index value
+ * for a color patch as calculated in accordance with the CIE 13.3-1995 standard.
+ * Note: Unit is unitless with a resolution of 1;
+ *       Minimum value: -128, maximum value: 100.
+ */
+typedef int8_t bt_mesh_cie_13_3_1995_color_rendering_index_t;
+
+/* The Coefficient characteristic is used to represent a general coefficient value. */
+typedef float bt_mesh_coefficient_t;
+
+/* The Count 16 characteristic is used to represent a general count value.
+ * Note: Unit is unitless with a resolution of 1;
+ *       Minimum value: 0, maximum value 65534;
+ *       A value of 0xFFFF represents 'value is not known'.
+ */
+typedef uint16_t bt_mesh_count_16_t;
+
+/* The Count 24 characteristic is used to represent a general count value.
+ * Note: Unit is unitless with a resolution of 1;
+ *       Minimum value: 0, maximum value 16777214;
+ *       A value of 0xFFFFFF represents 'value is not known'.
+ */
+typedef uint8_t bt_mesh_count_24_t[3];
+
+/* This characteristic represents a country or dependent areas in accordance with
+ * the ISO 3166-1 Numeric standard.
+ * Note: Unit is unitless with a resolution of 1;
+ *       Minimum value: 0, maximum value: 4095;
+ *       A value of 0xFFFF represents 'value is not known'.
+ */
+typedef uint16_t bt_mesh_country_code_t;
+
+/* Date as days elapsed since the Epoch (Jan 1, 1970) in the Coordinated Universal
+ * Time (UTC) time zone.
+ * Note: Unit is a day with a resolution of 1;
+ *       Minimum value: 1, maximum value: 16777214;
+ *       A value of 0x000000 represents 'value is not known'.
+ */
+typedef uint8_t bt_mesh_date_utc_t[3];
+
+/* This characteristic aggregates two instances of the Electric Current characteristic
+ * to represent a range of Electric Current values.
+ */
+typedef struct __packed electric_current_range {
+    bt_mesh_electric_current_t minimum_electric_current_value;
+    bt_mesh_electric_current_t maximum_electric_current_value;
+} bt_mesh_electric_current_range_t;
+
+/* This characteristic aggregates three instances of the Electric Current characteristic
+ * to represent a specification of electric current values.
+ */
+typedef struct __packed electric_current_specification {
+    bt_mesh_electric_current_t minimum_electric_current_value;
+    bt_mesh_electric_current_t typical_electric_current_value;
+    bt_mesh_electric_current_t maximum_electric_current_value;
+} bt_mesh_electric_current_specification_t;
+
+/* This characteristic aggregates four instances of the Electric Current characteristic
+ * with a Sensing Duration to represent a set of statistical electric current values.
+ */
+typedef struct __packed electric_current_statistics {
+    bt_mesh_electric_current_t   average_electric_current_value;
+    bt_mesh_electric_current_t   standard_electric_current_value;
+    bt_mesh_electric_current_t   minimum_electric_current_value;
+    bt_mesh_electric_current_t   maximum_electric_current_value;
+    bt_mesh_time_exponential_8_t sensing_duration;
+} bt_mesh_electric_current_statistics_t;
+
+/* The Energy characteristic is used to represent a measure of energy in units of
+ * kilowatt hours.
+ * Note: Unit is kilowatt-hour with a resolution of 1;
+ *       Minimum value: 0, maximum value: 16777214;
+ *       A value of 0xFFFFFF represents ‘value is not known’.
+ */
+typedef uint8_t bt_mesh_energy_t[3];
+
+/* The Time Decihour 8 characteristic is used to represent a period of time in
+ * tenths of an hour.
+ * Note: Unit is hour with a resolution of 0.1;
+ *       Minimum value: 0.0, maximum value: 24.0;
+ *       A value of 0xFF represents 'value is not known'. All other values are Prohibited.
+ */
+typedef uint8_t bt_mesh_time_decihour_8_t;
+
+/* This characteristic aggregates the Energy characteristic, and two instances of
+ * the Time Decihour 8 characteristic, to represent energy use in a period of day.
+ */
+typedef struct __packed energy_in_a_period_of_day {
+    bt_mesh_energy_t          energy_value;
+    bt_mesh_time_decihour_8_t start_time;
+    bt_mesh_time_decihour_8_t end_time;
+} bt_mesh_energy_in_a_period_of_day_t;
+
+/* The Time Second 16 characteristic is used to represent a period of time with a
+ * unit of 1 second.
+ * Note: Unit is second with a resolution of 1;
+ *       Minimum value: 0, maximum value: 65534;
+ *       A value of 0xFFFF represents 'value is not known'.
+ */
+typedef uint16_t bt_mesh_time_second_16_t;
+
+/* This characteristic aggregates the Count 16 characteristic, two instances of the
+ * Time Decihour 8 characteristic and an instance of the Sensing Duration characteristic,
+ * to represent statistical values of events.
+ */
+typedef struct __packed event_statistics {
+    bt_mesh_count_16_t           number_of_events;
+    bt_mesh_time_second_16_t     average_event_duration;
+    bt_mesh_time_exponential_8_t time_elapsed_since_last_event;
+    bt_mesh_time_exponential_8_t sensing_duration;
+} bt_mesh_event_statistics_t;
+
+/* The Fixed String 16 characteristic represents a 16-octet UTF-8 string. */
+typedef char bt_mesh_fixed_string_16_t[16];
+
+/* The Fixed String 24 characteristic represents a 24-octet UTF-8 string. */
+typedef char bt_mesh_fixed_string_24_t[24];
+
+/* The Fixed String 36 characteristic represents a 36-octet UTF-8 string. */
+typedef char bt_mesh_fixed_string_36_t[36];
+
+/* The Fixed String 8 characteristic represents an 8-octet UTF-8 string. */
+typedef char bt_mesh_fixed_string_8_t[8];
+
+/* The Generic Level characteristic represents a general level value of a
+ * setting of a device.
+ * Note: Unit is unitless with a resolution of 1;
+ *       Minimum value: 0, maximum value: 65535.
+ */
+typedef uint16_t bt_mesh_generic_level_t;
+
+/* The Global Trade Item Number characteristic represents an identifier as
+ * issued by GS1 General Specifications, which may consist up to 14 digits,
+ * and is here represented as a 48-bit unsigned integer.
+ */
+typedef uint8_t bt_mesh_global_trade_item_number_t[6];
+
+/* The Illuminance characteristic is used to represent a measure of illuminance
+ * in units of lux.
+ * Note: Unit is lux with a resolution of 0.01;
+ *       Minimum value: 0, maximum value: 167772.14;
+ *       A value of 0xFFFFFF represents 'value is not known'.
+ */
+typedef uint8_t bt_mesh_illuminance_t[3];
+
+/* The Luminous Efficacy characteristic is used to represent a measure of luminous
+ * efficacy in units of lumen per watt.
+ * Note: Unit is lumen per watt with a resolution of 0.1;
+ *       Minimum value: 0, maximum value: 1800;
+ *       A value of 0xFFFF represents 'value is not known'. All other values are Prohibited.
+ */
+typedef uint16_t bt_mesh_luminous_efficacy_t;
+
+/* The Luminous Energy characteristic is used to represent a measure of luminous
+ * energy in units of lumen hour.
+ * Note: Unit is lumen hour with a resolution of 1000;
+ *       Minimum value: 0, maximum value: 16777214000;
+ *       A value of 0xFFFFFF represents 'value is not known'.
+ */
+typedef uint8_t bt_mesh_luminous_energy_t[3];
+
+/* The Luminous Exposure characteristic is used to represent a measure of luminous
+ * exposure in units of lux-hour.
+ * Note: Unit is lux hour with a resolution of 1000;
+ *       Minimum value: 0, maximum value: 16777214000;
+ *       A value of 0xFFFFFF represents 'value is not known'.
+ */
+typedef uint8_t bt_mesh_luminous_exposure_t[3];
+
+/* The Luminous Flux characteristic is used to represent a measure of luminous flux
+ * in units of lumen.
+ * Note: Unit is lumen with a resolution of 1;
+ *       Minimum value: 0, maximum value: 65534;
+ *       A value of 0xFFFF represents 'value is not known'.
+ */
+typedef uint16_t bt_mesh_luminous_flux_t;
+
+/* This characteristic aggregates two instances of the Luminous Flux characteristic
+ * to represent a luminous flux range.
+ */
+typedef struct __packed luminous_flux_range {
+    bt_mesh_luminous_flux_t minimum_luminous_flux;
+    bt_mesh_luminous_flux_t maximum_luminous_flux;
+} bt_mesh_luminous_flux_range_t;
+
+/* The Luminous Intensity characteristic is used to represent a luminous intensity of
+ * a beam of light in units of candela.
+ * Note: Unit is candela with a resolution of 1;
+ *       Minimum value: 0, maximum value: 65534;
+ *       A value of 0xFFFF represents 'value is not known'.
+ */
+typedef uint16_t bt_mesh_luminous_intensity_t;
+
+/* The Mass Flow characteristic is used to represent a flow of mass.
+ * Note: Unit is gram/second with a resolution of 1;
+ *       Minimum value: 0, maximum value: 65534;
+ *       A value of 0xFFFF represents 'value is not known'.
+ */
+typedef uint16_t bt_mesh_mass_flow_t;
+
+/* The Mesh Provisioning Data In characteristic can be written to send a Proxy PDU
+ * message containing Provisioning PDU to the Provisioning Server.
+ */
+struct mesh_provisioning_data_in {
+
+};
+
+/* The Mesh Provisioning Data Out characteristic can be notified to send a Proxy PDU
+ * message containing Provisioning PDU from a Provisioning Server to a Provisioning Client.
+ */
+struct mesh_provisioning_data_out {
+
+};
+
+/* The Mesh Proxy Data In characteristic is used by the client to send Proxy PDUs to
+ * the server.
+ */
+struct mesh_proxy_data_in {
+
+};
+
+/* The Mesh Proxy Data Out characteristic is used by the server to send Proxy PDUs to
+ * the client.
+ */
+struct mesh_proxy_data_out {
+
+};
+
+/* The Perceived Lightness characteristic is used to represent the perceived lightness
+ * of a light.
+ * Note: Unit is unitless with a resolution of 1;
+ *       Minimum value: 0, maximum value: 65535.
+ */
+typedef uint16_t bt_mesh_perceived_lightness_t;
+
+/* The Percentage 8 characteristic is used to represent a measure of percentage.
+ * Note: Unit is a percentage with a resolution of 0.5;
+ *       Minimum value: 0, maximum value: 100;
+ *       A value of 0xFF represents 'value is not known'. All other values are Prohibited.
+ */
+typedef uint8_t bt_mesh_percentage_8_t;
+
+/* The Power characteristic is used to represent a measure of power in units of watts.
+ * Note: Unit is watt with a resolution of 0.1;
+ *       Minimum value: 0, maximum value: 1677721.4;
+ *       A value of 0xFFFFFF represents 'value is not known'.
+ */
+typedef uint8_t bt_mesh_power_t[3];
+
+/* This characteristic aggregates three instances of the Power characteristic to
+ * represent a specification of Power values.
+ */
+typedef struct __packed power_specification {
+    bt_mesh_power_t minimum_power_value;
+    bt_mesh_power_t typical_power_value;
+    bt_mesh_power_t maximum_power_value;
+} bt_mesh_power_specification_t;
+
+/* This characteristic aggregates the Percentage 8 characteristic and two instances of
+ * the Electric Current characteristic to represent a relative value in an electric
+ * current range.
+ */
+typedef struct __packed relative_runtime_in_a_current_range {
+    bt_mesh_percentage_8_t     relative_runtime_value;
+    bt_mesh_electric_current_t minimum_current;
+    bt_mesh_electric_current_t maximum_current;
+} bt_mesh_relative_runtime_in_a_current_range_t;
+
+/* This characteristic aggregates the Percentage 8 characteristic and two instances of
+ * the Generic Level characteristic to represent a runtime in a generic level range.
+ */
+typedef struct __packed relative_runtime_in_a_generic_level_range {
+    bt_mesh_percentage_8_t  relative_value;
+    bt_mesh_generic_level_t minimum_generic_level;
+    bt_mesh_generic_level_t maximum_generic_level;
+} bt_mesh_relative_runtime_in_a_generic_level_range_t;
+
+/* This characteristic aggregates the Percentage 8 characteristic, and two instances of
+ * the Time Decihour 8 characteristic.
+ */
+typedef struct __packed relative_value_in_a_period_of_day {
+    bt_mesh_percentage_8_t    relative_value;
+    bt_mesh_time_decihour_8_t start_time;
+    bt_mesh_time_decihour_8_t end_time;
+} bt_mesh_relative_value_in_a_period_of_day_t;
+
+/* This characteristic aggregates the Percentage 8 characteristic, and two instances of
+ * the Temperature characteristic.
+ */
+typedef struct __packed relative_value_in_a_temperature_range {
+    bt_mesh_percentage_8_t relative_value;
+    bt_mesh_temperature_t  minimum_temperature_value;
+    bt_mesh_temperature_t  maximum_temperature_value;
+} bt_mesh_relative_value_in_a_temperature_range_t;
+
+/* This characteristic aggregates the Percentage 8 characteristic and two instances of
+ * the Voltage characteristic to represent a relative value in a voltage range.
+ */
+typedef struct __packed relative_value_in_a_voltage_range {
+    bt_mesh_percentage_8_t relative_value;
+    bt_mesh_voltage_t      minimum_voltage;
+    bt_mesh_voltage_t      maximum_voltage;
+} bt_mesh_relative_value_in_a_voltage_range_t;
+
+/* This characteristic aggregates the Percentage 8 characteristic and two instances of
+ * the Illuminance characteristic to represent a relative value in a illuminance range.
+ */
+typedef struct __packed relative_value_in_an_illuminance_range {
+    bt_mesh_percentage_8_t relative_value;
+    bt_mesh_illuminance_t  minimum_illuminance;
+    bt_mesh_illuminance_t  maximum_illuminance;
+} bt_mesh_relative_value_in_an_illuminance_range_t;
+
+/* The Temperature 8 characteristic is used to represent a measure of temperature with
+ * a unit of 0.5 degree Celsius.
+ * Note: Unit is degree Celsius with a resolution of 0.5;
+ *       Minimum value: -64.0, maximum value: 63.5;
+ *       A value of 0xFF represents 'value is not known'.
+ */
+typedef int8_t bt_mesh_temperature_8_t;
+
+/* This characteristic aggregates the Temperature 8 characteristic, and two instances
+ * of the Time Decihour 8 characteristic, to represent a temperature value in a period
+ * of day.
+ */
+typedef struct __packed temperature_8_in_a_period_of_day {
+    bt_mesh_temperature_8_t   temperature;
+    bt_mesh_time_decihour_8_t start_time;
+    bt_mesh_time_decihour_8_t end_time;
+} bt_mesh_temperature_8_in_a_period_of_day_t;
+
+/* This characteristic aggregates four instances of the Temperature 8 characteristic,
+ * and one instance of the Time Exponential 8 characteristic.
+ */
+typedef struct __packed temperature_8_statistics {
+    bt_mesh_temperature_8_t      average;
+    bt_mesh_temperature_8_t      standard_deviation_value;
+    bt_mesh_temperature_8_t      minimum_value;
+    bt_mesh_temperature_8_t      maximum_value;
+    bt_mesh_time_exponential_8_t sensing_duration;
+} bt_mesh_temperature_8_statistics_t;
+
+/* This characteristic aggregates two instances of the Temperature characteristic to
+ * represent a temperature range.
+ */
+typedef struct __packed temperature_range {
+    bt_mesh_temperature_t minimum_temperature;
+    bt_mesh_temperature_t maximum_temperature;
+} bt_mesh_temperature_range_t;
+
+/* This characteristic aggregates four instances of the Temperature characteristic,
+ * and one instance of the Time Exponential 8 characteristic.
+ */
+typedef struct __packed temperature_statistics {
+    bt_mesh_temperature_t        average_temperature;
+    bt_mesh_temperature_t        standard_deviation_temperature;
+    bt_mesh_temperature_t        minimum_temperature;
+    bt_mesh_temperature_t        maximum_temperature;
+    bt_mesh_time_exponential_8_t sensing_duration;
+} bt_mesh_temperature_statistics_t;
+
+/* The Time Hour 24 characteristic is used to represent a period of time in hours.
+ * Note: Unit is hour with a resolution of 1;
+ *       Minimum value: 0, maximum value: 16777214;
+ *       A value of 0xFFFFFF represents 'value is not known'.
+ */
+typedef uint8_t bt_mesh_time_hour_24_t[3];
+
+/* The Time Millisecond 24 characteristic is used to represent a period of time with
+ * a resolution of 1 millisecond.
+ * Note: Unit is second with a resolution of 0.001;
+ *       Minimum value: 0, maximum value: 16777.214;
+ *       A value of 0xFFFFFF represents 'value is not known'.
+ */
+typedef uint8_t bt_mesh_time_millisecond_24_t[3];
+
+/* The Time Second 8 characteristic is used to represent a period of time with a unit
+ * of 1 second.
+ * Note: Unit is second with a resolution of 1;
+ *       Minimum value: 0, maximum value: 254;
+ *       A value of 0xFF represents 'value is not known'.
+ */
+typedef uint8_t bt_mesh_time_second_8_t;
+
+/* This characteristic aggregates three instances of the Voltage characteristic to
+ * represent a specification of voltage values.
+ */
+typedef struct __packed voltage_specification {
+    bt_mesh_voltage_t minimum_voltage_value;
+    bt_mesh_voltage_t typical_voltage_value;
+    bt_mesh_voltage_t maximum_voltage_value;
+} bt_mesh_voltage_specification_t;
+
+/* This characteristic aggregates four instances of the Voltage characteristic and an
+ * instance of the Time Exponential 8 characteristic to represent a set of statistical
+ * voltage values over a period of time.
+ */
+typedef struct __packed voltage_statistics {
+    bt_mesh_voltage_t            average_voltage_value;
+    bt_mesh_voltage_t            standard_deviation_voltage_value;
+    bt_mesh_voltage_t            minimum_voltage_value;
+    bt_mesh_voltage_t            maximum_voltage_value;
+    bt_mesh_time_exponential_8_t sensing_duration;
+} bt_mesh_voltage_statistics_t;
+
+/* The Volume Flow characteristic is used to represent a flow of a general volume such
+ * as a volume of material or gas.
+ * Note: Unit is liter/second with a resolution of 0.001 (1 milliliter);
+ *       Minimum value: 0, maximum value: 65534;
+ *       A value of 0xFFFF represents 'value is not known'.
+ */
+typedef uint16_t bt_mesh_volume_flow_t;
+
+/* Mesh Device Property related function */
+
+uint8_t bt_mesh_get_dev_prop_len(uint16_t prop_id);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DEVICE_PROPERTY_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/common/include/model_opcode.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/common/include/model_opcode.h
new file mode 100644
index 00000000000..29294a88990
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/common/include/model_opcode.h
@@ -0,0 +1,276 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _MODEL_OPCODE_H_
+#define _MODEL_OPCODE_H_
+
+#include "mesh_access.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Generic OnOff Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_ONOFF_GET                          BLE_MESH_MODEL_OP_2(0x82, 0x01)
+#define BLE_MESH_MODEL_OP_GEN_ONOFF_SET                          BLE_MESH_MODEL_OP_2(0x82, 0x02)
+#define BLE_MESH_MODEL_OP_GEN_ONOFF_SET_UNACK                    BLE_MESH_MODEL_OP_2(0x82, 0x03)
+#define BLE_MESH_MODEL_OP_GEN_ONOFF_STATUS                       BLE_MESH_MODEL_OP_2(0x82, 0x04)
+
+/* Generic Level Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_LEVEL_GET                          BLE_MESH_MODEL_OP_2(0x82, 0x05)
+#define BLE_MESH_MODEL_OP_GEN_LEVEL_SET                          BLE_MESH_MODEL_OP_2(0x82, 0x06)
+#define BLE_MESH_MODEL_OP_GEN_LEVEL_SET_UNACK                    BLE_MESH_MODEL_OP_2(0x82, 0x07)
+#define BLE_MESH_MODEL_OP_GEN_LEVEL_STATUS                       BLE_MESH_MODEL_OP_2(0x82, 0x08)
+#define BLE_MESH_MODEL_OP_GEN_DELTA_SET                          BLE_MESH_MODEL_OP_2(0x82, 0x09)
+#define BLE_MESH_MODEL_OP_GEN_DELTA_SET_UNACK                    BLE_MESH_MODEL_OP_2(0x82, 0x0A)
+#define BLE_MESH_MODEL_OP_GEN_MOVE_SET                           BLE_MESH_MODEL_OP_2(0x82, 0x0B)
+#define BLE_MESH_MODEL_OP_GEN_MOVE_SET_UNACK                     BLE_MESH_MODEL_OP_2(0x82, 0x0C)
+
+/* Generic Default Transition Time Message Opcode*/
+#define BLE_MESH_MODEL_OP_GEN_DEF_TRANS_TIME_GET                 BLE_MESH_MODEL_OP_2(0x82, 0x0D)
+#define BLE_MESH_MODEL_OP_GEN_DEF_TRANS_TIME_SET                 BLE_MESH_MODEL_OP_2(0x82, 0x0E)
+#define BLE_MESH_MODEL_OP_GEN_DEF_TRANS_TIME_SET_UNACK           BLE_MESH_MODEL_OP_2(0x82, 0x0F)
+#define BLE_MESH_MODEL_OP_GEN_DEF_TRANS_TIME_STATUS              BLE_MESH_MODEL_OP_2(0x82, 0x10)
+
+/* Generic Power OnOff Message Opcode*/
+#define BLE_MESH_MODEL_OP_GEN_ONPOWERUP_GET                      BLE_MESH_MODEL_OP_2(0x82, 0x11)
+#define BLE_MESH_MODEL_OP_GEN_ONPOWERUP_STATUS                   BLE_MESH_MODEL_OP_2(0x82, 0x12)
+
+/* Generic Power OnOff Setup Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_ONPOWERUP_SET                      BLE_MESH_MODEL_OP_2(0x82, 0x13)
+#define BLE_MESH_MODEL_OP_GEN_ONPOWERUP_SET_UNACK                BLE_MESH_MODEL_OP_2(0x82, 0x14)
+
+/* Generic Power Level Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_POWER_LEVEL_GET                    BLE_MESH_MODEL_OP_2(0x82, 0x15)
+#define BLE_MESH_MODEL_OP_GEN_POWER_LEVEL_SET                    BLE_MESH_MODEL_OP_2(0x82, 0x16)
+#define BLE_MESH_MODEL_OP_GEN_POWER_LEVEL_SET_UNACK              BLE_MESH_MODEL_OP_2(0x82, 0x17)
+#define BLE_MESH_MODEL_OP_GEN_POWER_LEVEL_STATUS                 BLE_MESH_MODEL_OP_2(0x82, 0x18)
+#define BLE_MESH_MODEL_OP_GEN_POWER_LAST_GET                     BLE_MESH_MODEL_OP_2(0x82, 0x19)
+#define BLE_MESH_MODEL_OP_GEN_POWER_LAST_STATUS                  BLE_MESH_MODEL_OP_2(0x82, 0x1A)
+#define BLE_MESH_MODEL_OP_GEN_POWER_DEFAULT_GET                  BLE_MESH_MODEL_OP_2(0x82, 0x1B)
+#define BLE_MESH_MODEL_OP_GEN_POWER_DEFAULT_STATUS               BLE_MESH_MODEL_OP_2(0x82, 0x1C)
+#define BLE_MESH_MODEL_OP_GEN_POWER_RANGE_GET                    BLE_MESH_MODEL_OP_2(0x82, 0x1D)
+#define BLE_MESH_MODEL_OP_GEN_POWER_RANGE_STATUS                 BLE_MESH_MODEL_OP_2(0x82, 0x1E)
+
+/* Generic Power Level Setup Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_POWER_DEFAULT_SET                  BLE_MESH_MODEL_OP_2(0x82, 0x1F)
+#define BLE_MESH_MODEL_OP_GEN_POWER_DEFAULT_SET_UNACK            BLE_MESH_MODEL_OP_2(0x82, 0x20)
+#define BLE_MESH_MODEL_OP_GEN_POWER_RANGE_SET                    BLE_MESH_MODEL_OP_2(0x82, 0x21)
+#define BLE_MESH_MODEL_OP_GEN_POWER_RANGE_SET_UNACK              BLE_MESH_MODEL_OP_2(0x82, 0x22)
+
+/* Generic Battery Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_BATTERY_GET                        BLE_MESH_MODEL_OP_2(0x82, 0x23)
+#define BLE_MESH_MODEL_OP_GEN_BATTERY_STATUS                     BLE_MESH_MODEL_OP_2(0x82, 0x24)
+
+/* Generic Location Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_LOC_GLOBAL_GET                     BLE_MESH_MODEL_OP_2(0x82, 0x25)
+#define BLE_MESH_MODEL_OP_GEN_LOC_GLOBAL_STATUS                  BLE_MESH_MODEL_OP_1(0x40)
+#define BLE_MESH_MODEL_OP_GEN_LOC_LOCAL_GET                      BLE_MESH_MODEL_OP_2(0x82, 0x26)
+#define BLE_MESH_MODEL_OP_GEN_LOC_LOCAL_STATUS                   BLE_MESH_MODEL_OP_2(0x82, 0x27)
+
+/* Generic Location Setup Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_LOC_GLOBAL_SET                     BLE_MESH_MODEL_OP_1(0x41)
+#define BLE_MESH_MODEL_OP_GEN_LOC_GLOBAL_SET_UNACK               BLE_MESH_MODEL_OP_1(0x42)
+#define BLE_MESH_MODEL_OP_GEN_LOC_LOCAL_SET                      BLE_MESH_MODEL_OP_2(0x82, 0x28)
+#define BLE_MESH_MODEL_OP_GEN_LOC_LOCAL_SET_UNACK                BLE_MESH_MODEL_OP_2(0x82, 0x29)
+
+/* Generic Manufacturer Property Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_MANU_PROPERTIES_GET                BLE_MESH_MODEL_OP_2(0x82, 0x2A)
+#define BLE_MESH_MODEL_OP_GEN_MANU_PROPERTIES_STATUS             BLE_MESH_MODEL_OP_1(0x43)
+#define BLE_MESH_MODEL_OP_GEN_MANU_PROPERTY_GET                  BLE_MESH_MODEL_OP_2(0x82, 0x2B)
+#define BLE_MESH_MODEL_OP_GEN_MANU_PROPERTY_SET                  BLE_MESH_MODEL_OP_1(0x44)
+#define BLE_MESH_MODEL_OP_GEN_MANU_PROPERTY_SET_UNACK            BLE_MESH_MODEL_OP_1(0x45)
+#define BLE_MESH_MODEL_OP_GEN_MANU_PROPERTY_STATUS               BLE_MESH_MODEL_OP_1(0x46)
+
+/* Generic Admin Property Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTIES_GET               BLE_MESH_MODEL_OP_2(0x82, 0x2C)
+#define BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTIES_STATUS            BLE_MESH_MODEL_OP_1(0x47)
+#define BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_GET                 BLE_MESH_MODEL_OP_2(0x82, 0x2D)
+#define BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_SET                 BLE_MESH_MODEL_OP_1(0x48)
+#define BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_SET_UNACK           BLE_MESH_MODEL_OP_1(0x49)
+#define BLE_MESH_MODEL_OP_GEN_ADMIN_PROPERTY_STATUS              BLE_MESH_MODEL_OP_1(0x4A)
+
+/* Generic User Property Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_USER_PROPERTIES_GET                BLE_MESH_MODEL_OP_2(0x82, 0x2E)
+#define BLE_MESH_MODEL_OP_GEN_USER_PROPERTIES_STATUS             BLE_MESH_MODEL_OP_1(0x4B)
+#define BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_GET                  BLE_MESH_MODEL_OP_2(0x82, 0x2F)
+#define BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_SET                  BLE_MESH_MODEL_OP_1(0x4C)
+#define BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_SET_UNACK            BLE_MESH_MODEL_OP_1(0x4D)
+#define BLE_MESH_MODEL_OP_GEN_USER_PROPERTY_STATUS               BLE_MESH_MODEL_OP_1(0x4E)
+
+/* Generic Client Property Message Opcode */
+#define BLE_MESH_MODEL_OP_GEN_CLIENT_PROPERTIES_GET              BLE_MESH_MODEL_OP_1(0x4F)
+#define BLE_MESH_MODEL_OP_GEN_CLIENT_PROPERTIES_STATUS           BLE_MESH_MODEL_OP_1(0x50)
+
+/* Sensor Message Opcode */
+#define BLE_MESH_MODEL_OP_SENSOR_DESCRIPTOR_GET                  BLE_MESH_MODEL_OP_2(0x82, 0x30)
+#define BLE_MESH_MODEL_OP_SENSOR_DESCRIPTOR_STATUS               BLE_MESH_MODEL_OP_1(0x51)
+#define BLE_MESH_MODEL_OP_SENSOR_GET                             BLE_MESH_MODEL_OP_2(0x82, 0x31)
+#define BLE_MESH_MODEL_OP_SENSOR_STATUS                          BLE_MESH_MODEL_OP_1(0x52)
+#define BLE_MESH_MODEL_OP_SENSOR_COLUMN_GET                      BLE_MESH_MODEL_OP_2(0x82, 0x32)
+#define BLE_MESH_MODEL_OP_SENSOR_COLUMN_STATUS                   BLE_MESH_MODEL_OP_1(0x53)
+#define BLE_MESH_MODEL_OP_SENSOR_SERIES_GET                      BLE_MESH_MODEL_OP_2(0x82, 0x33)
+#define BLE_MESH_MODEL_OP_SENSOR_SERIES_STATUS                   BLE_MESH_MODEL_OP_1(0x54)
+
+/* Sensor Setup Message Opcode */
+#define BLE_MESH_MODEL_OP_SENSOR_CADENCE_GET                     BLE_MESH_MODEL_OP_2(0x82, 0x34)
+#define BLE_MESH_MODEL_OP_SENSOR_CADENCE_SET                     BLE_MESH_MODEL_OP_1(0x55)
+#define BLE_MESH_MODEL_OP_SENSOR_CADENCE_SET_UNACK               BLE_MESH_MODEL_OP_1(0x56)
+#define BLE_MESH_MODEL_OP_SENSOR_CADENCE_STATUS                  BLE_MESH_MODEL_OP_1(0x57)
+#define BLE_MESH_MODEL_OP_SENSOR_SETTINGS_GET                    BLE_MESH_MODEL_OP_2(0x82, 0x35)
+#define BLE_MESH_MODEL_OP_SENSOR_SETTINGS_STATUS                 BLE_MESH_MODEL_OP_1(0x58)
+#define BLE_MESH_MODEL_OP_SENSOR_SETTING_GET                     BLE_MESH_MODEL_OP_2(0x82, 0x36)
+#define BLE_MESH_MODEL_OP_SENSOR_SETTING_SET                     BLE_MESH_MODEL_OP_1(0x59)
+#define BLE_MESH_MODEL_OP_SENSOR_SETTING_SET_UNACK               BLE_MESH_MODEL_OP_1(0x5A)
+#define BLE_MESH_MODEL_OP_SENSOR_SETTING_STATUS                  BLE_MESH_MODEL_OP_1(0x5B)
+
+/* Time Message Opcode */
+#define BLE_MESH_MODEL_OP_TIME_GET                               BLE_MESH_MODEL_OP_2(0x82, 0x37)
+#define BLE_MESH_MODEL_OP_TIME_SET                               BLE_MESH_MODEL_OP_1(0x5C)
+#define BLE_MESH_MODEL_OP_TIME_STATUS                            BLE_MESH_MODEL_OP_1(0x5D)
+#define BLE_MESH_MODEL_OP_TIME_ROLE_GET                          BLE_MESH_MODEL_OP_2(0x82, 0x38)
+#define BLE_MESH_MODEL_OP_TIME_ROLE_SET                          BLE_MESH_MODEL_OP_2(0x82, 0x39)
+#define BLE_MESH_MODEL_OP_TIME_ROLE_STATUS                       BLE_MESH_MODEL_OP_2(0x82, 0x3A)
+#define BLE_MESH_MODEL_OP_TIME_ZONE_GET                          BLE_MESH_MODEL_OP_2(0x82, 0x3B)
+#define BLE_MESH_MODEL_OP_TIME_ZONE_SET                          BLE_MESH_MODEL_OP_2(0x82, 0x3C)
+#define BLE_MESH_MODEL_OP_TIME_ZONE_STATUS                       BLE_MESH_MODEL_OP_2(0x82, 0x3D)
+#define BLE_MESH_MODEL_OP_TAI_UTC_DELTA_GET                      BLE_MESH_MODEL_OP_2(0x82, 0x3E)
+#define BLE_MESH_MODEL_OP_TAI_UTC_DELTA_SET                      BLE_MESH_MODEL_OP_2(0x82, 0x3F)
+#define BLE_MESH_MODEL_OP_TAI_UTC_DELTA_STATUS                   BLE_MESH_MODEL_OP_2(0x82, 0x40)
+
+/* Scene Message Opcode */
+#define BLE_MESH_MODEL_OP_SCENE_GET                              BLE_MESH_MODEL_OP_2(0x82, 0x41)
+#define BLE_MESH_MODEL_OP_SCENE_RECALL                           BLE_MESH_MODEL_OP_2(0x82, 0x42)
+#define BLE_MESH_MODEL_OP_SCENE_RECALL_UNACK                     BLE_MESH_MODEL_OP_2(0x82, 0x43)
+#define BLE_MESH_MODEL_OP_SCENE_STATUS                           BLE_MESH_MODEL_OP_1(0x5E)
+#define BLE_MESH_MODEL_OP_SCENE_REGISTER_GET                     BLE_MESH_MODEL_OP_2(0x82, 0x44)
+#define BLE_MESH_MODEL_OP_SCENE_REGISTER_STATUS                  BLE_MESH_MODEL_OP_2(0x82, 0x45)
+
+/* Scene Setup Message Opcode */
+#define BLE_MESH_MODEL_OP_SCENE_STORE                            BLE_MESH_MODEL_OP_2(0x82, 0x46)
+#define BLE_MESH_MODEL_OP_SCENE_STORE_UNACK                      BLE_MESH_MODEL_OP_2(0x82, 0x47)
+#define BLE_MESH_MODEL_OP_SCENE_DELETE                           BLE_MESH_MODEL_OP_2(0x82, 0x9E)
+#define BLE_MESH_MODEL_OP_SCENE_DELETE_UNACK                     BLE_MESH_MODEL_OP_2(0x82, 0x9F)
+
+/* Scheduler Message Opcode */
+#define BLE_MESH_MODEL_OP_SCHEDULER_ACT_GET                      BLE_MESH_MODEL_OP_2(0x82, 0x48)
+#define BLE_MESH_MODEL_OP_SCHEDULER_ACT_STATUS                   BLE_MESH_MODEL_OP_1(0x5F)
+#define BLE_MESH_MODEL_OP_SCHEDULER_GET                          BLE_MESH_MODEL_OP_2(0x82, 0x49)
+#define BLE_MESH_MODEL_OP_SCHEDULER_STATUS                       BLE_MESH_MODEL_OP_2(0x82, 0x4A)
+
+/* Scheduler Setup Message Opcode */
+#define BLE_MESH_MODEL_OP_SCHEDULER_ACT_SET                      BLE_MESH_MODEL_OP_1(0x60)
+#define BLE_MESH_MODEL_OP_SCHEDULER_ACT_SET_UNACK                BLE_MESH_MODEL_OP_1(0x61)
+
+/* Light Lightness Message Opcode */
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_GET                    BLE_MESH_MODEL_OP_2(0x82, 0x4B)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_SET                    BLE_MESH_MODEL_OP_2(0x82, 0x4C)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_SET_UNACK              BLE_MESH_MODEL_OP_2(0x82, 0x4D)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_STATUS                 BLE_MESH_MODEL_OP_2(0x82, 0x4E)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LINEAR_GET             BLE_MESH_MODEL_OP_2(0x82, 0x4F)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LINEAR_SET             BLE_MESH_MODEL_OP_2(0x82, 0x50)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LINEAR_SET_UNACK       BLE_MESH_MODEL_OP_2(0x82, 0x51)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LINEAR_STATUS          BLE_MESH_MODEL_OP_2(0x82, 0x52)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LAST_GET               BLE_MESH_MODEL_OP_2(0x82, 0x53)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_LAST_STATUS            BLE_MESH_MODEL_OP_2(0x82, 0x54)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_DEFAULT_GET            BLE_MESH_MODEL_OP_2(0x82, 0x55)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_DEFAULT_STATUS         BLE_MESH_MODEL_OP_2(0x82, 0x56)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_RANGE_GET              BLE_MESH_MODEL_OP_2(0x82, 0x57)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_RANGE_STATUS           BLE_MESH_MODEL_OP_2(0x82, 0x58)
+
+/* Light Lightness Setup Message Opcode */
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_DEFAULT_SET            BLE_MESH_MODEL_OP_2(0x82, 0x59)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_DEFAULT_SET_UNACK      BLE_MESH_MODEL_OP_2(0x82, 0x5A)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_RANGE_SET              BLE_MESH_MODEL_OP_2(0x82, 0x5B)
+#define BLE_MESH_MODEL_OP_LIGHT_LIGHTNESS_RANGE_SET_UNACK        BLE_MESH_MODEL_OP_2(0x82, 0x5C)
+
+/* Light CTL Message Opcode */
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_GET                          BLE_MESH_MODEL_OP_2(0x82, 0x5D)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_SET                          BLE_MESH_MODEL_OP_2(0x82, 0x5E)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_SET_UNACK                    BLE_MESH_MODEL_OP_2(0x82, 0x5F)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_STATUS                       BLE_MESH_MODEL_OP_2(0x82, 0x60)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_GET              BLE_MESH_MODEL_OP_2(0x82, 0x61)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_RANGE_GET        BLE_MESH_MODEL_OP_2(0x82, 0x62)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_RANGE_STATUS     BLE_MESH_MODEL_OP_2(0x82, 0x63)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_SET              BLE_MESH_MODEL_OP_2(0x82, 0x64)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_SET_UNACK        BLE_MESH_MODEL_OP_2(0x82, 0x65)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_STATUS           BLE_MESH_MODEL_OP_2(0x82, 0x66)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_DEFAULT_GET                  BLE_MESH_MODEL_OP_2(0x82, 0x67)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_DEFAULT_STATUS               BLE_MESH_MODEL_OP_2(0x82, 0x68)
+
+/* Light CTL Setup Message Opcode */
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_DEFAULT_SET                  BLE_MESH_MODEL_OP_2(0x82, 0x69)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_DEFAULT_SET_UNACK            BLE_MESH_MODEL_OP_2(0x82, 0x6A)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_RANGE_SET        BLE_MESH_MODEL_OP_2(0x82, 0x6B)
+#define BLE_MESH_MODEL_OP_LIGHT_CTL_TEMPERATURE_RANGE_SET_UNACK  BLE_MESH_MODEL_OP_2(0x82, 0x6C)
+
+/* Light HSL Message Opcode */
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_GET                          BLE_MESH_MODEL_OP_2(0x82, 0x6D)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_HUE_GET                      BLE_MESH_MODEL_OP_2(0x82, 0x6E)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_HUE_SET                      BLE_MESH_MODEL_OP_2(0x82, 0x6F)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_HUE_SET_UNACK                BLE_MESH_MODEL_OP_2(0x82, 0x70)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_HUE_STATUS                   BLE_MESH_MODEL_OP_2(0x82, 0x71)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_SATURATION_GET               BLE_MESH_MODEL_OP_2(0x82, 0x72)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_SATURATION_SET               BLE_MESH_MODEL_OP_2(0x82, 0x73)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_SATURATION_SET_UNACK         BLE_MESH_MODEL_OP_2(0x82, 0x74)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_SATURATION_STATUS            BLE_MESH_MODEL_OP_2(0x82, 0x75)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_SET                          BLE_MESH_MODEL_OP_2(0x82, 0x76)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_SET_UNACK                    BLE_MESH_MODEL_OP_2(0x82, 0x77)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_STATUS                       BLE_MESH_MODEL_OP_2(0x82, 0x78)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_TARGET_GET                   BLE_MESH_MODEL_OP_2(0x82, 0x79)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_TARGET_STATUS                BLE_MESH_MODEL_OP_2(0x82, 0x7A)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_DEFAULT_GET                  BLE_MESH_MODEL_OP_2(0x82, 0x7B)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_DEFAULT_STATUS               BLE_MESH_MODEL_OP_2(0x82, 0x7C)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_RANGE_GET                    BLE_MESH_MODEL_OP_2(0x82, 0x7D)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_RANGE_STATUS                 BLE_MESH_MODEL_OP_2(0x82, 0x7E)
+
+/* Light HSL Setup Message Opcode */
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_DEFAULT_SET                  BLE_MESH_MODEL_OP_2(0x82, 0x7F)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_DEFAULT_SET_UNACK            BLE_MESH_MODEL_OP_2(0x82, 0x80)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_RANGE_SET                    BLE_MESH_MODEL_OP_2(0x82, 0x81)
+#define BLE_MESH_MODEL_OP_LIGHT_HSL_RANGE_SET_UNACK              BLE_MESH_MODEL_OP_2(0x82, 0x82)
+
+/* Light xyL Message Opcode */
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_GET                          BLE_MESH_MODEL_OP_2(0x82, 0x83)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_SET                          BLE_MESH_MODEL_OP_2(0x82, 0x84)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_SET_UNACK                    BLE_MESH_MODEL_OP_2(0x82, 0x85)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_STATUS                       BLE_MESH_MODEL_OP_2(0x82, 0x86)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_TARGET_GET                   BLE_MESH_MODEL_OP_2(0x82, 0x87)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_TARGET_STATUS                BLE_MESH_MODEL_OP_2(0x82, 0x88)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_DEFAULT_GET                  BLE_MESH_MODEL_OP_2(0x82, 0x89)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_DEFAULT_STATUS               BLE_MESH_MODEL_OP_2(0x82, 0x8A)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_RANGE_GET                    BLE_MESH_MODEL_OP_2(0x82, 0x8B)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_RANGE_STATUS                 BLE_MESH_MODEL_OP_2(0x82, 0x8C)
+
+/* Light xyL Setup Message Opcode */
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_DEFAULT_SET                  BLE_MESH_MODEL_OP_2(0x82, 0x8D)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_DEFAULT_SET_UNACK            BLE_MESH_MODEL_OP_2(0x82, 0x8E)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_RANGE_SET                    BLE_MESH_MODEL_OP_2(0x82, 0x8F)
+#define BLE_MESH_MODEL_OP_LIGHT_XYL_RANGE_SET_UNACK              BLE_MESH_MODEL_OP_2(0x82, 0x90)
+
+/* Light Control Message Opcode */
+#define BLE_MESH_MODEL_OP_LIGHT_LC_MODE_GET                      BLE_MESH_MODEL_OP_2(0x82, 0x91)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_MODE_SET                      BLE_MESH_MODEL_OP_2(0x82, 0x92)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_MODE_SET_UNACK                BLE_MESH_MODEL_OP_2(0x82, 0x93)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_MODE_STATUS                   BLE_MESH_MODEL_OP_2(0x82, 0x94)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_OM_GET                        BLE_MESH_MODEL_OP_2(0x82, 0x95)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_OM_SET                        BLE_MESH_MODEL_OP_2(0x82, 0x96)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_OM_SET_UNACK                  BLE_MESH_MODEL_OP_2(0x82, 0x97)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_OM_STATUS                     BLE_MESH_MODEL_OP_2(0x82, 0x98)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_LIGHT_ONOFF_GET               BLE_MESH_MODEL_OP_2(0x82, 0x99)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_LIGHT_ONOFF_SET               BLE_MESH_MODEL_OP_2(0x82, 0x9A)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_LIGHT_ONOFF_SET_UNACK         BLE_MESH_MODEL_OP_2(0x82, 0x9B)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_LIGHT_ONOFF_STATUS            BLE_MESH_MODEL_OP_2(0x82, 0x9C)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_GET                  BLE_MESH_MODEL_OP_2(0x82, 0x9D)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_SET                  BLE_MESH_MODEL_OP_1(0x62)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_SET_UNACK            BLE_MESH_MODEL_OP_1(0x63)
+#define BLE_MESH_MODEL_OP_LIGHT_LC_PROPERTY_STATUS               BLE_MESH_MODEL_OP_1(0x64)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _MODEL_OPCODE_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/generic_server.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/generic_server.h
new file mode 100644
index 00000000000..0e79233f958
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/generic_server.h
@@ -0,0 +1,367 @@
+/* Bluetooth: Mesh Generic OnOff, Generic Level, Lighting & Vendor Models
+ *
+ * SPDX-FileCopyrightText: 2018 Vikrant More
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _GENERIC_SERVER_H_
+#define _GENERIC_SERVER_H_
+
+#include "server_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct bt_mesh_gen_onoff_state {
+    uint8_t onoff;
+    uint8_t target_onoff;
+};
+
+struct bt_mesh_gen_onoff_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_gen_onoff_state state;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition transition;
+};
+
+struct bt_mesh_gen_level_state {
+    int16_t level;
+    int16_t target_level;
+
+    int16_t last_level;
+    int32_t last_delta;
+
+    bool move_start;
+    bool positive;
+};
+
+struct bt_mesh_gen_level_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_gen_level_state state;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition transition;
+    int32_t tt_delta_level;
+};
+
+struct bt_mesh_gen_def_trans_time_state {
+    uint8_t trans_time;
+};
+
+struct bt_mesh_gen_def_trans_time_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_gen_def_trans_time_state state;
+};
+
+struct bt_mesh_gen_onpowerup_state {
+    uint8_t onpowerup;
+};
+
+struct bt_mesh_gen_power_onoff_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_gen_onpowerup_state *state;
+};
+
+struct bt_mesh_gen_power_onoff_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_gen_onpowerup_state *state;
+};
+
+struct bt_mesh_gen_power_level_state {
+    uint16_t power_actual;
+    uint16_t target_power_actual;
+
+    uint16_t power_last;
+    uint16_t power_default;
+
+    uint8_t  status_code;
+    uint16_t power_range_min;
+    uint16_t power_range_max;
+};
+
+struct bt_mesh_gen_power_level_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_gen_power_level_state *state;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition transition;
+    int32_t tt_delta_level;
+};
+
+struct bt_mesh_gen_power_level_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_gen_power_level_state *state;
+};
+
+struct bt_mesh_gen_battery_state {
+    uint32_t battery_level : 8,
+             time_to_discharge : 24;
+    uint32_t time_to_charge : 24,
+             battery_flags : 8;
+};
+
+struct bt_mesh_gen_battery_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_gen_battery_state state;
+};
+
+struct bt_mesh_gen_location_state {
+    int32_t  global_latitude;
+    int32_t  global_longitude;
+    int16_t  global_altitude;
+    int16_t  local_north;
+    int16_t  local_east;
+    int16_t  local_altitude;
+    uint8_t  floor_number;
+    uint16_t uncertainty;
+};
+
+struct bt_mesh_gen_location_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_gen_location_state *state;
+};
+
+struct bt_mesh_gen_location_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_gen_location_state *state;
+};
+
+/**
+ * According to the hierarchy of Generic Property states (Model Spec section 3.1.8),
+ * the Manufacturer Properties and Admin Properties may contain multiple Property
+ * states. User Properties just a collection of which can be accessed.
+ *
+ * property_count: Number of the properties contained in the table
+ * properties:     Table of the properties
+ *
+ * These variables need to be initialized in the application layer, the precise
+ * number of the properties should be set and memories used to store the property
+ * values should be allocated.
+ */
+
+enum bt_mesh_gen_user_prop_access {
+    USER_ACCESS_PROHIBIT,
+    USER_ACCESS_READ,
+    USER_ACCESS_WRITE,
+    USER_ACCESS_READ_WRITE,
+};
+
+enum bt_mesh_gen_admin_prop_access {
+    ADMIN_NOT_USER_PROP,
+    ADMIN_ACCESS_READ,
+    ADMIN_ACCESS_WRITE,
+    ADMIN_ACCESS_READ_WRITE,
+};
+
+enum bt_mesh_gen_manu_prop_access {
+    MANU_NOT_USER_PROP,
+    MANU_ACCESS_READ,
+};
+
+struct bt_mesh_generic_property {
+    uint16_t id;
+    uint8_t  user_access;
+    uint8_t  admin_access;
+    uint8_t  manu_access;
+    struct net_buf_simple *val;
+};
+
+struct bt_mesh_gen_user_prop_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    uint8_t property_count;
+    struct bt_mesh_generic_property *properties;
+};
+
+struct bt_mesh_gen_admin_prop_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    uint8_t property_count;
+    struct bt_mesh_generic_property *properties;
+};
+
+struct bt_mesh_gen_manu_prop_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    uint8_t property_count;
+    struct bt_mesh_generic_property *properties;
+};
+
+struct bt_mesh_gen_client_prop_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    uint8_t id_count;
+    uint16_t *property_ids;
+};
+
+typedef union {
+    struct {
+        uint8_t onoff;
+    } gen_onoff_set;
+    struct {
+        int16_t level;
+    } gen_level_set;
+    struct {
+        int16_t level;
+    } gen_delta_set;
+    struct {
+        int16_t level;
+    } gen_move_set;
+    struct {
+        uint8_t trans_time;
+    } gen_def_trans_time_set;
+    struct {
+        uint8_t onpowerup;
+    } gen_onpowerup_set;
+    struct {
+        uint16_t power;
+    } gen_power_level_set;
+    struct {
+        uint16_t power;
+    } gen_power_default_set;
+    struct {
+        uint16_t range_min;
+        uint16_t range_max;
+    } gen_power_range_set;
+    struct {
+        int32_t latitude;
+        int32_t longitude;
+        int16_t altitude;
+    } gen_loc_global_set;
+    struct {
+        int16_t  north;
+        int16_t  east;
+        int16_t  altitude;
+        uint8_t  floor_number;
+        uint16_t uncertainty;
+    } gen_loc_local_set;
+    struct {
+        uint16_t id;
+        struct net_buf_simple *value;
+    } gen_user_prop_set;
+    struct {
+        uint16_t id;
+        uint8_t  access;
+        struct net_buf_simple *value;
+    } gen_admin_prop_set;
+    struct {
+        uint16_t id;
+        uint8_t  access;
+    } gen_manu_prop_set;
+} bt_mesh_gen_server_state_change_t;
+
+typedef union {
+    struct {
+        uint16_t id;
+    } user_property_get;
+    struct {
+        uint16_t id;
+    } admin_property_get;
+    struct {
+        uint16_t id;
+    } manu_property_get;
+    struct {
+        uint16_t id;
+    } client_properties_get;
+} bt_mesh_gen_server_recv_get_msg_t;
+
+typedef union {
+    struct {
+        bool    op_en;
+        uint8_t onoff;
+        uint8_t tid;
+        uint8_t trans_time;
+        uint8_t delay;
+    } onoff_set;
+    struct {
+        bool    op_en;
+        int16_t level;
+        uint8_t tid;
+        uint8_t trans_time;
+        uint8_t delay;
+    } level_set;
+    struct {
+        bool    op_en;
+        int32_t delta_level;
+        uint8_t tid;
+        uint8_t trans_time;
+        uint8_t delay;
+    } delta_set;
+    struct {
+        bool    op_en;
+        int16_t delta_level;
+        uint8_t tid;
+        uint8_t trans_time;
+        uint8_t delay;
+    } move_set;
+    struct {
+        uint8_t trans_time;
+    } def_trans_time_set;
+    struct {
+        uint8_t onpowerup;
+    } onpowerup_set;
+    struct {
+        bool     op_en;
+        uint16_t power;
+        uint8_t  tid;
+        uint8_t  trans_time;
+        uint8_t  delay;
+    } power_level_set;
+    struct {
+        uint16_t power;
+    } power_default_set;
+    struct {
+        uint16_t range_min;
+        uint16_t range_max;
+    } power_range_set;
+    struct {
+        int32_t latitude;
+        int32_t longitude;
+        int16_t altitude;
+    } loc_global_set;
+    struct {
+        int16_t  north;
+        int16_t  east;
+        int16_t  altitude;
+        uint8_t  floor_number;
+        uint16_t uncertainty;
+    } loc_local_set;
+    struct {
+        uint16_t id;
+        struct net_buf_simple *value;
+    } user_property_set;
+    struct {
+        uint16_t id;
+        uint8_t  access;
+        struct net_buf_simple *value;
+    } admin_property_set;
+    struct {
+        uint16_t id;
+        uint8_t  access;
+    } manu_property_set;
+} bt_mesh_gen_server_recv_set_msg_t;
+
+void bt_mesh_generic_server_lock(void);
+void bt_mesh_generic_server_unlock(void);
+
+void gen_onoff_publish(struct bt_mesh_model *model);
+void gen_level_publish(struct bt_mesh_model *model);
+void gen_onpowerup_publish(struct bt_mesh_model *model);
+void gen_power_level_publish(struct bt_mesh_model *model, uint16_t opcode);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _GENERIC_SERVER_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/lighting_server.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/lighting_server.h
new file mode 100644
index 00000000000..a3e595a4917
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/lighting_server.h
@@ -0,0 +1,510 @@
+/* Bluetooth: Mesh Generic OnOff, Generic Level, Lighting & Vendor Models
+ *
+ * SPDX-FileCopyrightText: 2018 Vikrant More
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _LIGHTING_SERVER_H_
+#define _LIGHTING_SERVER_H_
+
+#include "server_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct bt_mesh_light_lightness_state {
+    uint16_t lightness_linear;
+    uint16_t target_lightness_linear;
+
+    uint16_t lightness_actual;
+    uint16_t target_lightness_actual;
+
+    uint16_t lightness_last;
+    uint16_t lightness_default;
+
+    uint8_t  status_code;
+    uint16_t lightness_range_min;
+    uint16_t lightness_range_max;
+};
+
+struct bt_mesh_light_lightness_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_lightness_state *state;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition actual_transition;
+    struct bt_mesh_state_transition linear_transition;
+    int32_t tt_delta_lightness_actual;
+    int32_t tt_delta_lightness_linear;
+};
+
+struct bt_mesh_light_lightness_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_lightness_state *state;
+};
+
+struct bt_mesh_light_ctl_state {
+    uint16_t lightness;
+    uint16_t target_lightness;
+
+    uint16_t temperature;
+    uint16_t target_temperature;
+
+    int16_t  delta_uv;
+    int16_t  target_delta_uv;
+
+    uint8_t  status_code;
+    uint16_t temperature_range_min;
+    uint16_t temperature_range_max;
+
+    uint16_t lightness_default;
+    uint16_t temperature_default;
+    int16_t  delta_uv_default;
+};
+
+struct bt_mesh_light_ctl_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_ctl_state *state;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition transition;
+    int32_t tt_delta_lightness;
+    int32_t tt_delta_temperature;
+    int32_t tt_delta_delta_uv;
+};
+
+struct bt_mesh_light_ctl_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_ctl_state *state;
+};
+
+struct bt_mesh_light_ctl_temp_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_ctl_state *state;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition transition;
+    int32_t tt_delta_temperature;
+    int32_t tt_delta_delta_uv;
+};
+
+struct bt_mesh_light_hsl_state {
+    uint16_t lightness;
+    uint16_t target_lightness;
+
+    uint16_t hue;
+    uint16_t target_hue;
+
+    uint16_t saturation;
+    uint16_t target_saturation;
+
+    uint16_t lightness_default;
+    uint16_t hue_default;
+    uint16_t saturation_default;
+
+    uint8_t  status_code;
+    uint16_t hue_range_min;
+    uint16_t hue_range_max;
+    uint16_t saturation_range_min;
+    uint16_t saturation_range_max;
+};
+
+struct bt_mesh_light_hsl_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_hsl_state *state;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition transition;
+    int32_t tt_delta_lightness;
+    int32_t tt_delta_hue;
+    int32_t tt_delta_saturation;
+};
+
+struct bt_mesh_light_hsl_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_hsl_state *state;
+};
+
+struct bt_mesh_light_hsl_hue_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_hsl_state *state;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition transition;
+    int32_t tt_delta_hue;
+};
+
+struct bt_mesh_light_hsl_sat_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_hsl_state *state;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition transition;
+    int32_t tt_delta_saturation;
+};
+
+struct bt_mesh_light_xyl_state {
+    uint16_t lightness;
+    uint16_t target_lightness;
+
+    uint16_t x;
+    uint16_t target_x;
+
+    uint16_t y;
+    uint16_t target_y;
+
+    uint16_t lightness_default;
+    uint16_t x_default;
+    uint16_t y_default;
+
+    uint8_t  status_code;
+    uint16_t x_range_min;
+    uint16_t x_range_max;
+    uint16_t y_range_min;
+    uint16_t y_range_max;
+};
+
+struct bt_mesh_light_xyl_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_xyl_state *state;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition transition;
+    int32_t tt_delta_lightness;
+    int32_t tt_delta_x;
+    int32_t tt_delta_y;
+};
+
+struct bt_mesh_light_xyl_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_xyl_state *state;
+};
+
+struct bt_mesh_light_lc_state {
+    uint32_t mode : 1,              /* default 0 */
+             occupancy_mode : 1,    /* default 1 */
+             light_onoff : 1,
+             target_light_onoff : 1,
+             occupancy : 1,
+             ambient_luxlevel : 24; /* 0x000000 ~ 0xFFFFFF */
+
+    uint16_t linear_output;         /* 0x0000 ~ 0xFFFF */
+};
+
+struct bt_mesh_light_lc_property_state {
+    uint32_t time_occupancy_delay;         /* 0x003A */
+    uint32_t time_fade_on;                 /* 0x0037 */
+    uint32_t time_run_on;                  /* 0x003C */
+    uint32_t time_fade;                    /* 0x0036 */
+    uint32_t time_prolong;                 /* 0x003B */
+    uint32_t time_fade_standby_auto;       /* 0x0038 */
+    uint32_t time_fade_standby_manual;     /* 0x0039 */
+
+    uint16_t lightness_on;                 /* 0x002E */
+    uint16_t lightness_prolong;            /* 0x002F */
+    uint16_t lightness_standby;            /* 0x0030 */
+
+    uint16_t ambient_luxlevel_on;          /* 0x002B, 0x0000 ~ 0xFFFF */
+    uint16_t ambient_luxlevel_prolong;     /* 0x002C, 0x0000 ~ 0xFFFF */
+    uint16_t ambient_luxlevel_standby;     /* 0x002D, 0x0000 ~ 0xFFFF */
+
+    float    regulator_kiu;                /* 0x0033, 0.0 ~ 1000.0, default 250.0 */
+    float    regulator_kid;                /* 0x0032, 0.0 ~ 1000.0, default 25.0 */
+    float    regulator_kpu;                /* 0x0035, 0.0 ~ 1000.0, default 80.0 */
+    float    regulator_kpd;                /* 0x0034, 0.0 ~ 1000.0, default 80.0 */
+    int8_t   regulator_accuracy;           /* 0x0031, 0.0 ~ 100.0, default 2.0 */
+
+    uint32_t set_occupancy_to_1_delay;
+};
+
+typedef enum {
+    LC_OFF,
+    LC_STANDBY,
+    LC_FADE_ON,
+    LC_RUN,
+    LC_FADE,
+    LC_PROLONG,
+    LC_FADE_STANDBY_AUTO,
+    LC_FADE_STANDBY_MANUAL,
+} bt_mesh_lc_state;
+
+struct bt_mesh_light_lc_state_machine {
+    struct {
+        uint8_t fade_on;
+        uint8_t fade;
+        uint8_t fade_standby_auto;
+        uint8_t fade_standby_manual;
+    } trans_time;
+    bt_mesh_lc_state state;
+    struct k_delayed_work timer;
+};
+
+struct bt_mesh_light_control {
+    struct bt_mesh_light_lc_state          state;
+    struct bt_mesh_light_lc_property_state prop_state;
+    struct bt_mesh_light_lc_state_machine  state_machine;
+};
+
+struct bt_mesh_light_lc_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_control *lc;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition transition;
+};
+
+struct bt_mesh_light_lc_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_light_control *lc;
+};
+
+typedef union {
+    struct {
+        uint16_t lightness;
+    } lightness_set;
+    struct {
+        uint16_t lightness;
+    } lightness_linear_set;
+    struct {
+        uint16_t lightness;
+    } lightness_default_set;
+    struct {
+        uint16_t range_min;
+        uint16_t range_max;
+    } lightness_range_set;
+    struct {
+        uint16_t lightness;
+        uint16_t temperature;
+        int16_t delta_uv;
+    } ctl_set;
+    struct {
+        uint16_t temperature;
+        int16_t delta_uv;
+    } ctl_temp_set;
+    struct {
+        uint16_t range_min;
+        uint16_t range_max;
+    } ctl_temp_range_set;
+    struct {
+        uint16_t lightness;
+        uint16_t temperature;
+        int16_t  delta_uv;
+    } ctl_default_set;
+    struct {
+        uint16_t lightness;
+        uint16_t hue;
+        uint16_t saturation;
+    } hsl_set;
+    struct {
+        uint16_t hue;
+    } hsl_hue_set;
+    struct {
+        uint16_t saturation;
+    } hsl_saturation_set;
+    struct {
+        uint16_t lightness;
+        uint16_t hue;
+        uint16_t saturation;
+    } hsl_default_set;
+    struct {
+        uint16_t hue_range_min;
+        uint16_t hue_range_max;
+        uint16_t sat_range_min;
+        uint16_t sat_range_max;
+    } hsl_range_set;
+    struct {
+        uint16_t lightness;
+        uint16_t x;
+        uint16_t y;
+    } xyl_set;
+    struct {
+        uint16_t lightness;
+        uint16_t x;
+        uint16_t y;
+    } xyl_default_set;
+    struct {
+        uint16_t x_range_min;
+        uint16_t x_range_max;
+        uint16_t y_range_min;
+        uint16_t y_range_max;
+    } xyl_range_set;
+    struct {
+        uint8_t mode;
+    } lc_mode_set;
+    struct {
+        uint8_t mode;
+    } lc_om_set;
+    struct {
+        uint8_t onoff;
+    } lc_light_onoff_set;
+    struct {
+        uint16_t id;
+        struct net_buf_simple *value;
+    } lc_property_set;
+    struct {
+        uint16_t property_id;
+        union {
+            uint8_t  occupancy;
+            uint32_t set_occupancy_to_1_delay;
+            uint32_t ambient_luxlevel;
+        } state;
+    } sensor_status;
+} bt_mesh_light_server_state_change_t;
+
+typedef union {
+    struct {
+        uint16_t id;
+    } lc_property_get;
+} bt_mesh_light_server_recv_get_msg_t;
+
+typedef union {
+    struct {
+        bool     op_en;
+        uint16_t lightness;
+        uint8_t  tid;
+        uint8_t  trans_time;
+        uint8_t  delay;
+    } lightness_set;
+    struct {
+        bool     op_en;
+        uint16_t lightness;
+        uint8_t  tid;
+        uint8_t  trans_time;
+        uint8_t  delay;
+    } lightness_linear_set;
+    struct {
+        uint16_t lightness;
+    } lightness_default_set;
+    struct {
+        uint16_t range_min;
+        uint16_t range_max;
+    } lightness_range_set;
+    struct {
+        bool     op_en;
+        uint16_t lightness;
+        uint16_t temperature;
+        int16_t  delta_uv;
+        uint8_t  tid;
+        uint8_t  trans_time;
+        uint8_t  delay;
+    } ctl_set;
+    struct {
+        bool     op_en;
+        uint16_t temperature;
+        int16_t  delta_uv;
+        uint8_t  tid;
+        uint8_t  trans_time;
+        uint8_t  delay;
+    } ctl_temp_set;
+    struct {
+        uint16_t range_min;
+        uint16_t range_max;
+    } ctl_temp_range_set;
+    struct {
+        uint16_t lightness;
+        uint16_t temperature;
+        int16_t  delta_uv;
+    } ctl_default_set;
+    struct {
+        bool     op_en;
+        uint16_t lightness;
+        uint16_t hue;
+        uint16_t saturation;
+        uint8_t  tid;
+        uint8_t  trans_time;
+        uint8_t  delay;
+    } hsl_set;
+    struct {
+        bool     op_en;
+        uint16_t hue;
+        uint8_t  tid;
+        uint8_t  trans_time;
+        uint8_t  delay;
+    } hsl_hue_set;
+    struct {
+        bool     op_en;
+        uint16_t saturation;
+        uint8_t  tid;
+        uint8_t  trans_time;
+        uint8_t  delay;
+    } hsl_saturation_set;
+    struct {
+        uint16_t lightness;
+        uint16_t hue;
+        uint16_t saturation;
+    } hsl_default_set;
+    struct {
+        uint16_t hue_range_min;
+        uint16_t hue_range_max;
+        uint16_t sat_range_min;
+        uint16_t sat_range_max;
+    } hsl_range_set;
+    struct {
+        bool     op_en;
+        uint16_t lightness;
+        uint16_t x;
+        uint16_t y;
+        uint8_t  tid;
+        uint8_t  trans_time;
+        uint8_t  delay;
+    } xyl_set;
+    struct {
+        uint16_t lightness;
+        uint16_t x;
+        uint16_t y;
+    } xyl_default_set;
+    struct {
+        uint16_t x_range_min;
+        uint16_t x_range_max;
+        uint16_t y_range_min;
+        uint16_t y_range_max;
+    } xyl_range_set;
+    struct {
+        uint8_t mode;
+    } lc_mode_set;
+    struct {
+        uint8_t mode;
+    } lc_om_set;
+    struct {
+        bool    op_en;
+        uint8_t light_onoff;
+        uint8_t tid;
+        uint8_t trans_time;
+        uint8_t delay;
+    } lc_light_onoff_set;
+    struct {
+        uint16_t id;
+        struct net_buf_simple *value;
+    } lc_property_set;
+} bt_mesh_light_server_recv_set_msg_t;
+
+typedef union {
+    struct {
+        struct net_buf_simple *data;
+    } sensor_status;
+} bt_mesh_light_server_recv_status_msg_t;
+
+void bt_mesh_light_server_lock(void);
+void bt_mesh_light_server_unlock(void);
+
+uint8_t *bt_mesh_get_lc_prop_value(struct bt_mesh_model *model, uint16_t prop_id);
+
+void light_lightness_publish(struct bt_mesh_model *model, uint16_t opcode);
+void light_ctl_publish(struct bt_mesh_model *model, uint16_t opcode);
+void light_hsl_publish(struct bt_mesh_model *model, uint16_t opcode);
+void light_xyl_publish(struct bt_mesh_model *model, uint16_t opcode);
+void light_lc_publish(struct bt_mesh_model *model, uint16_t opcode);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LIGHTING_SERVER_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/sensor_server.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/sensor_server.h
new file mode 100644
index 00000000000..7946f3b4faf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/sensor_server.h
@@ -0,0 +1,246 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _SENSOR_SERVER_H_
+#define _SENSOR_SERVER_H_
+
+#include "server_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Sensor Property ID related */
+#define INVALID_SENSOR_PROPERTY_ID          0x0000
+
+#define SENSOR_PROPERTY_ID_LEN              0x02
+
+/* Sensor Descriptor state related */
+#define SENSOR_DESCRIPTOR_LEN               0x08
+
+#define SENSOR_UNSPECIFIED_POS_TOLERANCE    0x000
+#define SENSOR_UNSPECIFIED_NEG_TOLERANCE    0x000
+
+#define SENSOR_NOT_APPL_MEASURE_PERIOD      0x00
+
+#define SENSOR_NOT_APPL_UPDATE_INTERVAL     0x00
+
+/* Sensor Setting state related */
+#define INVALID_SENSOR_SETTING_PROPERTY_ID  0x0000
+
+#define SENSOR_SETTING_PROPERTY_ID_LEN      0x02
+#define SENSOR_SETTING_ACCESS_LEN           0x01
+
+#define SENSOR_SETTING_ACCESS_READ          0x01
+#define SENSOR_SETTING_ACCESS_READ_WRITE    0x03
+
+/* Sensor Cadence state related */
+#define SENSOR_DIVISOR_TRIGGER_TYPE_LEN     0x01
+#define SENSOR_STATUS_MIN_INTERVAL_LEN      0x01
+
+#define SENSOR_PERIOD_DIVISOR_MAX_VALUE     15
+
+#define SENSOR_STATUS_MIN_INTERVAL_MAX      26
+
+#define SENSOR_STATUS_TRIGGER_TYPE_CHAR     0
+#define SENSOR_STATUS_TRIGGER_TYPE_UINT16   1
+
+#define SENSOR_STATUS_TRIGGER_UINT16_LEN    0x02
+
+/* Sensor Data state related */
+#define SENSOR_DATA_FORMAT_A                0x00
+#define SENSOR_DATA_FORMAT_B                0x01
+
+#define SENSOR_DATA_FORMAT_A_MPID_LEN       0x02
+#define SENSOR_DATA_FORMAT_B_MPID_LEN       0x03
+
+#define SENSOR_DATA_ZERO_LEN                0x7F
+
+enum bt_mesh_sensor_sample_func {
+    UNSPECIFIED,
+    INSTANTANEOUS,
+    ARITHMETIC_MEAN,
+    RMS,
+    MAXIMUM,
+    MINIMUM,
+    ACCUMULATED,
+    COUNT,
+};
+
+struct sensor_descriptor {
+    uint32_t positive_tolerance : 12,
+             negative_tolerance : 12,
+             sample_function : 8;
+    uint8_t  measure_period;
+    uint8_t  update_interval;
+};
+
+struct sensor_setting {
+    uint16_t property_id;
+    uint8_t  access;
+    /* Or use union to include all possible types */
+    struct net_buf_simple *raw;
+};
+
+struct sensor_cadence {
+    uint8_t period_divisor : 7,
+            trigger_type : 1;
+    struct net_buf_simple *trigger_delta_down;
+    struct net_buf_simple *trigger_delta_up;
+    uint8_t min_interval;
+    struct net_buf_simple *fast_cadence_low;
+    struct net_buf_simple *fast_cadence_high;
+};
+
+struct sensor_data {
+    /**
+     * Format A: The Length field is a 1-based uint4 value (valid range 0x0–0xF,
+     *           representing range of 1 – 16).
+     * Format B: The Length field is a 1-based uint7 value (valid range 0x0–0x7F,
+     *           representing range of 1 – 127). The value 0x7F represents a
+     *           length of zero.
+     */
+    uint8_t format : 1,
+            length : 7;
+    struct net_buf_simple *raw_value;
+};
+
+struct sensor_series_column {
+    struct net_buf_simple *raw_value_x;
+    struct net_buf_simple *column_width;
+    struct net_buf_simple *raw_value_y;
+};
+
+struct bt_mesh_sensor_state {
+    uint16_t sensor_property_id;
+
+    /* Constant throughout the lifetime of an element */
+    struct sensor_descriptor descriptor;
+
+    /* Multiple Sensor Setting states may be present for each sensor.
+     * The Sensor Setting Property ID values shall be unique for each
+     * Sensor Property ID that identifies a sensor within an element.
+     */
+    const uint8_t setting_count;
+    struct sensor_setting *settings;
+
+    /* The Sensor Cadence state may be not supported by sensors based
+     * on device properties referencing "non-scalar characteristics"
+     * such as "histograms" or "composite characteristics".
+     */
+    struct sensor_cadence *cadence;
+
+    struct sensor_data sensor_data;
+
+    /* Values measured by sensors may be organized as arrays (and
+     * represented as series of columns, such as histograms).
+     * 1. The Sensor Raw Value X field has a size and representation
+     *    defined by the Sensor Property ID and represents the left
+     *    corner of the column on the X axis.
+     * 2. The Sensor Column Width field has a size and representation
+     *    defined by the Sensor Property ID and represents the width
+     *    of the column on the X axis.
+     * 3. The Sensor Raw Value Y field has a size and representation
+     *    defined by the Sensor Property ID and represents the height
+     *    of the column on the Y axis.
+     * Note: Values outside the bins defined by a Sensor Property are
+     * not included. For example, if the histogram is defined as 3 bins
+     * representing “lamp operating hours in a given temperature range”
+     * and the bins are [40,60), [60, 80), and [80,100], then any hours
+     * outside that [40, 100] range would not be included.
+     */
+    struct sensor_series_column series_column;
+};
+
+/* 1. Multiple instances of the Sensor states may be present within the
+ *    same model, provided that each instance has a unique value of the
+ *    Sensor Property ID to allow the instances to be differentiated.
+ * 2. Note: The number of sensors within a multisensor is limited by the
+ *    size of the message payload for the Sensor Descriptor Status message.
+ *    A single Sensor Descriptor may be sent using a single Unsegmented
+ *    Access message. Using Segmentation and Reassembly (SAR), up to 38
+ *    Sensor Descriptor states may be sent.
+ */
+
+struct bt_mesh_sensor_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    const uint8_t state_count;
+    struct bt_mesh_sensor_state *states;
+};
+
+struct bt_mesh_sensor_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    const uint8_t state_count;
+    struct bt_mesh_sensor_state *states;
+};
+
+typedef union {
+    struct {
+        uint16_t id;
+        uint8_t  period_divisor : 7,
+                 trigger_type : 1;
+        struct net_buf_simple *trigger_delta_down;
+        struct net_buf_simple *trigger_delta_up;
+        uint8_t min_interval;
+        struct net_buf_simple *fast_cadence_low;
+        struct net_buf_simple *fast_cadence_high;
+    } sensor_cadence_set;
+    struct {
+        uint16_t id;
+        uint16_t setting_id;
+        struct net_buf_simple *value;
+    } sensor_setting_set;
+} bt_mesh_sensor_server_state_change_t;
+
+typedef union {
+    struct {
+        bool     op_en;
+        uint16_t id;
+    } sensor_descriptor_get;
+    struct {
+        uint16_t id;
+    } sensor_cadence_get;
+    struct {
+        uint16_t id;
+    } sensor_settings_get;
+    struct {
+        uint16_t id;
+        uint16_t setting_id;
+    } sensor_setting_get;
+    struct {
+        bool     op_en;
+        uint16_t id;
+    } sensor_get;
+    struct {
+        uint16_t id;
+        struct net_buf_simple *raw_x;
+    } sensor_column_get;
+    struct {
+        bool     op_en;
+        uint16_t id;
+        struct net_buf_simple *raw;
+    } sensor_series_get;
+} bt_mesh_sensor_server_recv_get_msg_t;
+
+typedef union {
+    struct {
+        uint16_t id;
+        struct net_buf_simple *cadence;
+    } sensor_cadence_set;
+    struct {
+        uint16_t id;
+        uint16_t setting_id;
+        struct net_buf_simple *raw;
+    } sensor_setting_set;
+} bt_mesh_sensor_server_recv_set_msg_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SENSOR_SERVER_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/server_common.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/server_common.h
new file mode 100644
index 00000000000..d56dcbd8433
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/server_common.h
@@ -0,0 +1,124 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _SERVER_COMMON_H_
+#define _SERVER_COMMON_H_
+
+#include <string.h>
+#include <stdint.h>
+#include "mesh_access.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BLE_MESH_SERVER_RSP_MAX_LEN         384
+
+#define BLE_MESH_SERVER_TRANS_MIC_SIZE      4
+
+#define BLE_MESH_CHECK_SEND_STATUS(_func) do {                      \
+        int __status = (_func);                                     \
+        if (__status) {                                             \
+            BT_ERR("%s, Send failed, err %d", __func__, __status);  \
+        }                                                           \
+    } while(0);
+
+#define BLE_MESH_STATE_OFF                      0x00
+#define BLE_MESH_STATE_ON                       0x01
+#define BLE_MESH_STATE_RESTORE                  0x02
+
+/* Following 4 values are as per Mesh Model specification */
+#define BLE_MESH_LIGHTNESS_MIN                  0x0001
+#define BLE_MESH_LIGHTNESS_MAX                  0xFFFF
+#define BLE_MESH_TEMPERATURE_MIN                0x0320
+#define BLE_MESH_TEMPERATURE_MAX                0x4E20
+#define BLE_MESH_TEMPERATURE_UNKNOWN            0xFFFF
+
+/* Refer 7.2 of Mesh Model Specification */
+#define BLE_MESH_RANGE_UPDATE_SUCCESS           0x00
+#define BLE_MESH_CANNOT_SET_RANGE_MIN           0x01
+#define BLE_MESH_CANNOT_SET_RANGE_MAX           0x02
+
+#define BLE_MESH_UNKNOWN_REMAIN_TIME            0x3F
+#define BLE_MESH_DEVICE_SPECIFIC_RESOLUTION     10
+
+enum {
+    BLE_MESH_TRANS_TIMER_START,  /* Proper transition timer has been started */
+    BLE_MESH_TRANS_FLAG_MAX,
+};
+
+struct bt_mesh_state_transition {
+    bool just_started;
+
+    uint8_t  trans_time;
+    uint8_t  remain_time;
+    uint8_t  delay;
+    uint32_t quo_tt;
+    uint32_t counter;
+    uint32_t total_duration;
+    int64_t  start_timestamp;
+
+    BLE_MESH_ATOMIC_DEFINE(flag, BLE_MESH_TRANS_FLAG_MAX);
+    struct k_delayed_work timer;
+};
+
+struct bt_mesh_last_msg_info {
+    uint8_t  tid;
+    uint16_t src;
+    uint16_t dst;
+    int64_t  timestamp;
+};
+
+#define BLE_MESH_SERVER_RSP_BY_APP  0
+#define BLE_MESH_SERVER_AUTO_RSP    1
+
+struct bt_mesh_server_rsp_ctrl {
+    /**
+     * @brief BLE Mesh Server Response Option
+     *        1. If get_auto_rsp is set to BLE_MESH_SERVER_RSP_BY_APP, then the response
+     *           of Client Get messages need to be replied by the application;
+     *        2. If get_auto_rsp is set to BLE_MESH_SERVER_AUTO_RSP, then the response
+     *           of Client Get messages will be replied by the server models;
+     *        3. If set_auto_rsp is set to BLE_MESH_SERVER_RSP_BY_APP, then the response
+     *           of Client Set messages need to be replied by the application;
+     *        4. If set_auto_rsp is set to BLE_MESH_SERVER_AUTO_RSP, then the response
+     *           of Client Set messages will be replied by the server models;
+     *        5. If status_auto_rsp is set to BLE_MESH_SERVER_RSP_BY_APP, then the response
+     *           of Server Status messages need to be replied by the application;
+     *        6. If status_auto_rsp is set to BLE_MESH_SERVER_AUTO_RSP, then the response
+     *           of Server status messages will be replied by the server models;
+     */
+    uint8_t get_auto_rsp : 1, /* Response for Client Get messages */
+            set_auto_rsp : 1, /* Response for Client Set messages */
+            status_auto_rsp : 1; /* Response for Server Status messages */
+};
+
+uint8_t bt_mesh_get_default_trans_time(struct bt_mesh_model *model);
+
+int bt_mesh_get_light_lc_trans_time(struct bt_mesh_model *model, uint8_t *trans_time);
+
+int bt_mesh_server_get_optional(struct bt_mesh_model *model,
+                                struct bt_mesh_msg_ctx *ctx,
+                                struct net_buf_simple *buf,
+                                uint8_t *trans_time, uint8_t *delay,
+                                bool *optional);
+
+void bt_mesh_server_alloc_ctx(struct k_work *work);
+void bt_mesh_server_free_ctx(struct k_work *work);
+
+bool bt_mesh_is_server_recv_last_msg(struct bt_mesh_last_msg_info *last,
+                                     uint8_t tid, uint16_t src, uint16_t dst, int64_t *now);
+
+void bt_mesh_server_update_last_msg(struct bt_mesh_last_msg_info *last,
+                                    uint8_t tid, uint16_t src, uint16_t dst, int64_t *now);
+
+struct net_buf_simple *bt_mesh_server_get_pub_msg(struct bt_mesh_model *model, uint16_t msg_len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SERVER_COMMON_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/state_binding.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/state_binding.h
new file mode 100644
index 00000000000..3a44f9e0010
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/state_binding.h
@@ -0,0 +1,108 @@
+/* Bluetooth: Mesh Generic OnOff, Generic Level, Lighting & Vendor Models
+ *
+ * SPDX-FileCopyrightText: 2018 Vikrant More
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _STATE_BINDING_H_
+#define _STATE_BINDING_H_
+
+#include "mesh_access.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    GENERIC_ONOFF_STATE,
+    GENERIC_LEVEL_STATE,
+    GENERIC_ONPOWERUP_STATE,
+    GENERIC_POWER_ACTUAL_STATE,
+    LIGHT_LIGHTNESS_ACTUAL_STATE,
+    LIGHT_LIGHTNESS_LINEAR_STATE,
+    LIGHT_CTL_LIGHTNESS_STATE,
+    LIGHT_CTL_TEMP_DELTA_UV_STATE,
+    LIGHT_HSL_STATE,
+    LIGHT_HSL_LIGHTNESS_STATE,
+    LIGHT_HSL_HUE_STATE,
+    LIGHT_HSL_SATURATION_STATE,
+    LIGHT_XYL_LIGHTNESS_STATE,
+    LIGHT_LC_LIGHT_ONOFF_STATE,
+    BIND_STATE_MAX,
+} bt_mesh_server_state_type_t;
+
+typedef union {
+    struct {
+        uint8_t onoff;
+    } gen_onoff;
+    struct {
+        int16_t level;
+    } gen_level;
+    struct {
+        uint8_t onpowerup;
+    } gen_onpowerup;
+    struct {
+        uint16_t power;
+    } gen_power_actual;
+    struct {
+        uint16_t lightness;
+    } light_lightness_actual;
+    struct {
+        uint16_t lightness;
+    } light_lightness_linear;
+    struct {
+        uint16_t lightness;
+    } light_ctl_lightness;
+    struct {
+        uint16_t temperature;
+        int16_t  delta_uv;
+    } light_ctl_temp_delta_uv;
+    struct {
+        uint16_t lightness;
+        uint16_t hue;
+        uint16_t saturation;
+    } light_hsl;
+    struct {
+        uint16_t lightness;
+    } light_hsl_lightness;
+    struct {
+        uint16_t hue;
+    } light_hsl_hue;
+    struct {
+        uint16_t saturation;
+    } light_hsl_saturation;
+    struct {
+        uint16_t lightness;
+    } light_xyl_lightness;
+    struct {
+        uint8_t onoff;
+    } light_lc_light_onoff;
+} bt_mesh_server_state_value_t;
+
+uint16_t bt_mesh_convert_lightness_actual_to_linear(uint16_t actual);
+
+uint16_t bt_mesh_convert_lightness_linear_to_actual(uint16_t linear);
+
+int16_t bt_mesh_convert_temperature_to_gen_level(uint16_t temp, uint16_t min, uint16_t max);
+
+uint16_t bt_mesh_covert_gen_level_to_temperature(int16_t level, uint16_t min, uint16_t max);
+
+int16_t bt_mesh_convert_hue_to_level(uint16_t hue);
+
+uint16_t bt_mesh_convert_level_to_hue(int16_t level);
+
+int16_t bt_mesh_convert_saturation_to_level(uint16_t saturation);
+
+uint16_t bt_mesh_convert_level_to_saturation(int16_t level);
+
+int bt_mesh_update_binding_state(struct bt_mesh_model *model,
+                                 bt_mesh_server_state_type_t type,
+                                 bt_mesh_server_state_value_t *value);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _STATE_BINDING_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/state_transition.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/state_transition.h
new file mode 100644
index 00000000000..86ca747b5a4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/state_transition.h
@@ -0,0 +1,100 @@
+/* Bluetooth: Mesh Generic OnOff, Generic Level, Lighting & Vendor Models
+ *
+ * SPDX-FileCopyrightText: 2018 Vikrant More
+ * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _STATE_TRANSITION_H_
+#define _STATE_TRANSITION_H_
+
+#include "server_common.h"
+#include "generic_server.h"
+#include "sensor_server.h"
+#include "lighting_server.h"
+#include "time_scene_server.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void bt_mesh_server_calc_remain_time(struct bt_mesh_state_transition *transition);
+
+/* APIs used to get server model transition time values */
+
+void generic_onoff_tt_values(struct bt_mesh_gen_onoff_srv *srv,
+                             uint8_t trans_time, uint8_t delay);
+
+void generic_level_tt_values(struct bt_mesh_gen_level_srv *srv,
+                             uint8_t trans_time, uint8_t delay);
+
+void generic_power_level_tt_values(struct bt_mesh_gen_power_level_srv *srv,
+                                   uint8_t trans_time, uint8_t delay);
+
+void light_lightness_actual_tt_values(struct bt_mesh_light_lightness_srv *srv,
+                                      uint8_t trans_time, uint8_t delay);
+
+void light_lightness_linear_tt_values(struct bt_mesh_light_lightness_srv *srv,
+                                      uint8_t trans_time, uint8_t delay);
+
+void light_ctl_tt_values(struct bt_mesh_light_ctl_srv *srv,
+                         uint8_t trans_time, uint8_t delay);
+
+void light_ctl_temp_tt_values(struct bt_mesh_light_ctl_temp_srv *srv,
+                              uint8_t trans_time, uint8_t delay);
+
+void light_hsl_tt_values(struct bt_mesh_light_hsl_srv *srv,
+                         uint8_t trans_time, uint8_t delay);
+
+void light_hsl_hue_tt_values(struct bt_mesh_light_hsl_hue_srv *srv,
+                             uint8_t trans_time, uint8_t delay);
+
+void light_hsl_sat_tt_values(struct bt_mesh_light_hsl_sat_srv *srv,
+                             uint8_t trans_time, uint8_t delay);
+
+void light_xyl_tt_values(struct bt_mesh_light_xyl_srv *srv,
+                         uint8_t trans_time, uint8_t delay);
+
+void light_lc_tt_values(struct bt_mesh_light_lc_srv *srv,
+                        uint8_t trans_time, uint8_t delay);
+
+void scene_tt_values(struct bt_mesh_scene_srv *srv, uint8_t trans_time, uint8_t delay);
+
+/* Server model transition timer handlers */
+
+void generic_onoff_work_handler(struct k_work *work);
+
+void generic_level_work_handler(struct k_work *work);
+
+void generic_power_level_work_handler(struct k_work *work);
+
+void light_lightness_actual_work_handler(struct k_work *work);
+
+void light_lightness_linear_work_handler(struct k_work *work);
+
+void light_ctl_work_handler(struct k_work *work);
+
+void light_ctl_temp_work_handler(struct k_work *work);
+
+void light_hsl_work_handler(struct k_work *work);
+
+void light_hsl_hue_work_handler(struct k_work *work);
+
+void light_hsl_sat_work_handler(struct k_work *work);
+
+void light_xyl_work_handler(struct k_work *work);
+
+void light_lc_work_handler(struct k_work *work);
+
+void scene_recall_work_handler(struct k_work *work);
+
+void bt_mesh_server_stop_transition(struct bt_mesh_state_transition *transition);
+
+void bt_mesh_server_start_transition(struct bt_mesh_state_transition *transition);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _STATE_TRANSITION_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/time_scene_server.h b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/time_scene_server.h
new file mode 100644
index 00000000000..6728e6ff578
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/esp_ble_mesh/mesh_models/server/include/time_scene_server.h
@@ -0,0 +1,384 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _TIME_SCENE_SERVER_H_
+#define _TIME_SCENE_SERVER_H_
+
+#include "server_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * 1. Mesh defines times based on International Atomic Time (TAI). The base
+ *    representation of times is the number of seconds after 00:00:00 TAI
+ *    on 2000-01-01 (that is, 1999-12-31 T23:59:28 UTC).
+ * 2. UTC: Coordinated Universal Time. For more information, please refer
+ *    to https://time.is/zh/UTC
+ * 3. For the algorithm used for the transfer between TAI and UTC, please
+ *    refer to Mesh Model Spec Section 5.1.1
+ */
+
+#define UNKNOWN_TAI_SECONDS         0x0000000000
+#define UNKNOWN_TAI_ZONE_CHANGE     0x0000000000
+#define UNKNOWN_TAI_DELTA_CHANGE    0x0000000000
+#define TAI_UTC_DELTA_MAX_VALUE     0x7FFF
+#define TAI_SECONDS_LEN             0x05
+#define TAI_OF_ZONE_CHANGE_LEN      0x05
+#define TAI_OF_DELTA_CHANGE_LEN     0x05
+
+#define INVALID_SCENE_NUMBER        0x0000
+#define SCENE_NUMBER_LEN            0x02
+
+#define SCHEDULE_YEAR_ANY_YEAR      0x64
+
+#define SCHEDULE_DAY_ANY_DAY        0x00
+
+#define SCHEDULE_HOUR_ANY_HOUR      0x18
+#define SCHEDULE_HOUR_ONCE_A_DAY    0x19
+
+#define SCHEDULE_SEC_ANY_OF_HOUR    0x3C
+#define SCHEDULE_SEC_EVERY_15_MIN   0x3D
+#define SCHEDULE_SEC_EVERY_20_MIN   0x3E
+#define SCHEDULE_SEC_ONCE_AN_HOUR   0x3F
+
+#define SCHEDULE_SEC_ANY_OF_MIN     0x3C
+#define SCHEDULE_SEC_EVERY_15_SEC   0x3D
+#define SCHEDULE_SEC_EVERY_20_SEC   0x3E
+#define SCHEDULE_SEC_ONCE_AN_MIN    0x3F
+
+#define SCHEDULE_ACT_TURN_OFF       0x00
+#define SCHEDULE_ACT_TURN_ON        0x01
+#define SCHEDULE_ACT_SCENE_RECALL   0x02
+#define SCHEDULE_ACT_NO_ACTION      0x0F
+
+#define SCHEDULE_SCENE_NO_SCENE     0x0000
+
+#define SCHEDULE_ENTRY_MAX_INDEX    0x0F
+
+#define TIME_NONE                   0x00
+#define TIME_AUTHORITY              0x01
+#define TIME_RELAY                  0x02
+#define TIME_CLINET                 0x03
+
+#define SCENE_SUCCESS               0x00
+#define SCENE_REG_FULL              0x01
+#define SCENE_NOT_FOUND             0x02
+
+/**
+ * The Time state represents the present TAI time, the current TAI-UTC Delta
+ * and local time zone offset, and the next change to each of the latter
+ * (e.g., because of a switch from winter to summer time or an announced leap
+ * second). It consists of 10 fields with a total size of 183 bits.
+ */
+struct bt_mesh_time_state {
+    struct {
+        uint8_t  tai_seconds[5];
+        uint8_t  subsecond;
+        uint8_t  uncertainty;
+        uint8_t  time_zone_offset_curr;
+        uint8_t  time_zone_offset_new;
+        uint8_t  tai_zone_change[5];
+        uint16_t time_authority : 1,
+                 tai_utc_delta_curr : 15;
+        uint16_t tai_utc_delta_new : 15;
+        uint8_t  tai_delta_change[5];
+    } time;
+    uint8_t time_role;
+};
+
+struct bt_mesh_time_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_time_state *state;
+};
+
+struct bt_mesh_time_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_time_state *state;
+};
+
+struct scene_register {
+    uint16_t scene_number;
+    uint8_t  scene_type;   /* Indicate the type of scene value */
+    /**
+     * Scene value may use a union to represent later, the union contains
+     * structures of all the model states which can be stored in a scene.
+     */
+    struct net_buf_simple *scene_value;
+};
+
+/**
+ * Scenes serve as memory banks for storage of states (e.g., a power level
+ * or a light level/color). Values of states of an element can be stored
+ * as a scene and can be recalled later from the scene memory.
+ *
+ * A scene is represented by a Scene Number, which is a 16-bit non-zero,
+ * mesh-wide value. (There can be a maximum of 65535 scenes in a mesh
+ * network.) The meaning of a scene, as well as the state storage container
+ * associated with it, are determined by a model.
+ *
+ * The Scenes state change may start numerous parallel model transitions.
+ * In that case, each individual model handles the transition internally.
+ *
+ * The scene transition is defined as a group of individual model transitions
+ * started by a Scene Recall operation. The scene transition is in progress
+ * when at least one transition from the group of individual model transitions
+ * is in progress.
+ */
+struct bt_mesh_scenes_state {
+    const uint16_t scene_count;
+    struct scene_register *scenes;
+
+    /**
+     * The Current Scene state is a 16-bit value that contains either the Scene
+     * Number of the currently active scene or a value of 0x0000 when no scene
+     * is active.
+     *
+     * When a Scene Store operation or a Scene Recall operation completes with
+     * success, the Current Scene state value shall be to the Scene Number used
+     * during that operation.
+     *
+     * When the Current Scene Number is deleted from a Scene Register state as a
+     * result of Scene Delete operation, the Current Scene state shall be set to
+     * 0x0000.
+     *
+     * When any of the element's state that is marked as “Stored with Scene” has
+     * changed not as a result of a Scene Recall operation, the value of the
+     * Current Scene state shall be set to 0x0000.
+     *
+     * When a scene transition is in progress, the value of the Current Scene
+     * state shall be set to 0x0000.
+     */
+    uint16_t current_scene;
+
+    /**
+     * The Target Scene state is a 16-bit value that contains the target Scene
+     * Number when a scene transition is in progress.
+     *
+     * When the scene transition is in progress and the target Scene Number is
+     * deleted from a Scene Register state as a result of Scene Delete operation,
+     * the Target Scene state shall be set to 0x0000.
+     *
+     * When the scene transition is in progress and a new Scene Number is stored
+     * in the Scene Register as a result of Scene Store operation, the Target
+     * Scene state shall be set to the new Scene Number.
+     *
+     * When the scene transition is not in progress, the value of the Target Scene
+     * state shall be set to 0x0000.
+     */
+    uint16_t target_scene;
+
+    /* Indicate the status code for the last operation */
+    uint8_t status_code;
+
+    /* Indicate if scene transition is in progress */
+    bool in_progress;
+};
+
+struct bt_mesh_scene_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_scenes_state *state;
+    struct bt_mesh_last_msg_info last;
+    struct bt_mesh_state_transition transition;
+};
+
+struct bt_mesh_scene_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_scenes_state *state;
+};
+
+struct schedule_register {
+    bool     in_use;
+    uint64_t year : 7,
+             month : 12,
+             day : 5,
+             hour : 5,
+             minute : 6,
+             second : 6,
+             day_of_week : 7,
+             action : 4,
+             trans_time : 8;
+    uint16_t scene_number;
+};
+
+struct bt_mesh_scheduler_state {
+    const uint8_t schedule_count;
+    struct schedule_register *schedules; /* Up to 16 scheduled entries */
+
+    /**
+     * A recommended implementation of the Scheduler should calculate the
+     * value of the TAI Seconds of the next scheduled event and put it in
+     * a queue of scheduled events sorted by time.
+     *
+     * Every second, the first event in the queue is compared with the value
+     * of the Time state. The first event is executed if it is less than or
+     * equal to the Time state and then removed from the queue. After
+     * execution, the Repeat Flag shall be checked, and the next occurrence
+     * of the scheduled event is calculated and put in the queue.
+     *
+     * One second timeout value, and compare the first event in queue with the
+     * Time state. If it is satisfied, then execute the first event. Also the
+     * Repeat Flag need to be checked, if it is set then the event needs to
+     * be put into the end of queue.
+     *
+     * sys_slist_t event_queue;
+     *
+     * For each event_queue item, it can use the following struct:
+     * struct schedule_event {
+     *     sys_snode_t node;
+     *     uint8_t event_index;
+     * };
+     *
+     * Also we need a "struct k_delayed_work track_timer" which can be used to
+     * track the schedule timer and handle proper scheduled events.
+     */
+};
+
+struct bt_mesh_scheduler_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_scheduler_state *state;
+};
+
+struct bt_mesh_scheduler_setup_srv {
+    struct bt_mesh_model *model;
+    struct bt_mesh_server_rsp_ctrl rsp_ctrl;
+    struct bt_mesh_scheduler_state *state;
+};
+
+typedef union {
+    struct {
+        uint8_t  tai_seconds[5];
+        uint8_t  subsecond;
+        uint8_t  uncertainty;
+        uint16_t time_authority : 1;
+        uint16_t tai_utc_delta_curr : 15;
+        uint8_t  time_zone_offset_curr;
+    } time_set;
+    struct {
+        uint8_t  tai_seconds[5];
+        uint8_t  subsecond;
+        uint8_t  uncertainty;
+        uint16_t time_authority : 1;
+        uint16_t tai_utc_delta_curr : 15;
+        uint8_t  time_zone_offset_curr;
+    } time_status;
+    struct {
+        uint8_t time_zone_offset_new;
+        uint8_t tai_zone_change[5];
+    } time_zone_set;
+    struct {
+        uint16_t tai_utc_delta_new : 15;
+        uint8_t  tai_delta_change[5];
+    } tai_utc_delta_set;
+    struct {
+        uint8_t role;
+    } time_role_set;
+    struct {
+        uint16_t scene_number;
+    } scene_store;
+    struct {
+        uint16_t scene_number;
+    } scene_recall;
+    struct {
+        uint16_t scene_number;
+    } scene_delete;
+    struct {
+        uint64_t index : 4,
+                 year : 7,
+                 month : 12,
+                 day : 5,
+                 hour : 5,
+                 minute : 6,
+                 second : 6,
+                 day_of_week : 7,
+                 action : 4,
+                 trans_time : 8;
+        uint16_t scene_number;
+    } scheduler_act_set;
+} bt_mesh_time_scene_server_state_change_t;
+
+typedef union {
+    struct {
+        uint8_t index;
+    } scheduler_act_get;
+} bt_mesh_time_scene_server_recv_get_msg_t;
+
+typedef union {
+    struct {
+        uint8_t  tai_seconds[5];
+        uint8_t  subsecond;
+        uint8_t  uncertainty;
+        uint16_t time_authority : 1;
+        uint16_t tai_utc_delta : 15;
+        uint8_t  time_zone_offset;
+    } time_set;
+    struct {
+        uint8_t time_zone_offset_new;
+        uint8_t tai_zone_change[5];
+    } time_zone_set;
+    struct {
+        uint16_t tai_utc_delta_new : 15;
+        uint16_t padding : 1;
+        uint8_t  tai_delta_change[5];
+    } tai_utc_delta_set;
+    struct {
+        uint8_t time_role;
+    } time_role_set;
+    struct {
+        uint16_t scene_number;
+    } scene_store;
+    struct {
+        bool     op_en;
+        uint16_t scene_number;
+        uint8_t  tid;
+        uint8_t  trans_time;
+        uint8_t  delay;
+    } scene_recall;
+    struct {
+        uint16_t scene_number;
+    } scene_delete;
+    struct {
+        uint64_t index : 4,
+                 year : 7,
+                 month : 12,
+                 day : 5,
+                 hour : 5,
+                 minute : 6,
+                 second : 6,
+                 day_of_week : 7,
+                 action : 4,
+                 trans_time : 8;
+        uint16_t scene_number;
+    } scheduler_act_set;
+} bt_mesh_time_scene_server_recv_set_msg_t;
+
+typedef union {
+    struct {
+        uint8_t  tai_seconds[5];
+        uint8_t  subsecond;
+        uint8_t  uncertainty;
+        uint16_t time_authority : 1;
+        uint16_t tai_utc_delta : 15;
+        uint8_t  time_zone_offset;
+    } time_status;
+} bt_mesh_time_scene_server_recv_status_msg_t;
+
+void bt_mesh_time_scene_server_lock(void);
+void bt_mesh_time_scene_server_unlock(void);
+
+void scene_publish(struct bt_mesh_model *model, struct bt_mesh_msg_ctx *ctx, uint16_t opcode);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TIME_SCENE_SERVER_H_ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_a2dp_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_a2dp_api.h
new file mode 100644
index 00000000000..e45af93542c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_a2dp_api.h
@@ -0,0 +1,373 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_A2DP_API_H__
+#define __ESP_A2DP_API_H__
+
+#include "esp_err.h"
+#include "esp_bt_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Media codec types supported by A2DP
+#define ESP_A2D_MCT_SBC         (0)             /*!< SBC */
+#define ESP_A2D_MCT_M12         (0x01)          /*!< MPEG-1, 2 Audio */
+#define ESP_A2D_MCT_M24         (0x02)          /*!< MPEG-2, 4 AAC */
+#define ESP_A2D_MCT_ATRAC       (0x04)          /*!< ATRAC family */
+#define ESP_A2D_MCT_NON_A2DP    (0xff)
+
+typedef uint8_t esp_a2d_mct_t;
+
+/** A2DP media codec capabilities union
+ */
+typedef struct {
+    esp_a2d_mct_t type;                        /*!< A2DP media codec type */
+#define ESP_A2D_CIE_LEN_SBC          (4)
+#define ESP_A2D_CIE_LEN_M12          (4)
+#define ESP_A2D_CIE_LEN_M24          (6)
+#define ESP_A2D_CIE_LEN_ATRAC        (7)
+    union {
+        uint8_t sbc[ESP_A2D_CIE_LEN_SBC];      /*!< SBC codec capabilities */
+        uint8_t m12[ESP_A2D_CIE_LEN_M12];      /*!< MPEG-1,2 audio codec capabilities */
+        uint8_t m24[ESP_A2D_CIE_LEN_M24];      /*!< MPEG-2, 4 AAC audio codec capabilities */
+        uint8_t atrac[ESP_A2D_CIE_LEN_ATRAC];  /*!< ATRAC family codec capabilities */
+    } cie;                                     /*!< A2DP codec information element */
+} __attribute__((packed)) esp_a2d_mcc_t;
+
+/// Bluetooth A2DP connection states
+typedef enum {
+    ESP_A2D_CONNECTION_STATE_DISCONNECTED = 0, /*!< connection released  */
+    ESP_A2D_CONNECTION_STATE_CONNECTING,       /*!< connecting remote device */
+    ESP_A2D_CONNECTION_STATE_CONNECTED,        /*!< connection established */
+    ESP_A2D_CONNECTION_STATE_DISCONNECTING     /*!< disconnecting remote device */
+} esp_a2d_connection_state_t;
+
+/// Bluetooth A2DP disconnection reason
+typedef enum {
+    ESP_A2D_DISC_RSN_NORMAL = 0,               /*!< Finished disconnection that is initiated by local or remote device */
+    ESP_A2D_DISC_RSN_ABNORMAL                  /*!< Abnormal disconnection caused by signal loss */
+} esp_a2d_disc_rsn_t;
+
+/// Bluetooth A2DP datapath states
+typedef enum {
+    ESP_A2D_AUDIO_STATE_REMOTE_SUSPEND = 0,    /*!< audio stream datapath suspended by remote device */
+    ESP_A2D_AUDIO_STATE_STOPPED,               /*!< audio stream datapath stopped */
+    ESP_A2D_AUDIO_STATE_STARTED,               /*!< audio stream datapath started */
+} esp_a2d_audio_state_t;
+
+/// A2DP media control command acknowledgement code
+typedef enum {
+    ESP_A2D_MEDIA_CTRL_ACK_SUCCESS = 0,        /*!< media control command is acknowledged with success */
+    ESP_A2D_MEDIA_CTRL_ACK_FAILURE,            /*!< media control command is acknowledged with failure */
+    ESP_A2D_MEDIA_CTRL_ACK_BUSY,               /*!< media control command is rejected, as previous command is not yet acknowledged */
+} esp_a2d_media_ctrl_ack_t;
+
+/// A2DP media control commands
+typedef enum {
+    ESP_A2D_MEDIA_CTRL_NONE = 0,               /*!< Not for application use, use inside stack only. */
+    ESP_A2D_MEDIA_CTRL_CHECK_SRC_RDY,          /*!< check whether AVDTP is connected, only used in A2DP source */
+    ESP_A2D_MEDIA_CTRL_START,                  /*!< command to set up media transmission channel */
+    ESP_A2D_MEDIA_CTRL_STOP,                   /*!< command to stop media transmission */
+    ESP_A2D_MEDIA_CTRL_SUSPEND,                /*!< command to suspend media transmission  */
+} esp_a2d_media_ctrl_t;
+
+/// Bluetooth A2DP Initiation states
+typedef enum {
+    ESP_A2D_DEINIT_SUCCESS = 0,                /*!< A2DP profile deinit successful event */
+    ESP_A2D_INIT_SUCCESS                       /*!< A2DP profile deinit successful event */
+} esp_a2d_init_state_t;
+
+/// A2DP callback events
+typedef enum {
+    ESP_A2D_CONNECTION_STATE_EVT = 0,          /*!< connection state changed event */
+    ESP_A2D_AUDIO_STATE_EVT,                   /*!< audio stream transmission state changed event */
+    ESP_A2D_AUDIO_CFG_EVT,                     /*!< audio codec is configured, only used for A2DP SINK */
+    ESP_A2D_MEDIA_CTRL_ACK_EVT,                /*!< acknowledge event in response to media control commands */
+    ESP_A2D_PROF_STATE_EVT,                    /*!< indicate a2dp init&deinit complete */
+} esp_a2d_cb_event_t;
+
+/// A2DP state callback parameters
+typedef union {
+    /**
+     * @brief  ESP_A2D_CONNECTION_STATE_EVT
+     */
+    struct a2d_conn_stat_param {
+        esp_a2d_connection_state_t state;      /*!< one of values from esp_a2d_connection_state_t */
+        esp_bd_addr_t remote_bda;              /*!< remote bluetooth device address */
+        esp_a2d_disc_rsn_t disc_rsn;           /*!< reason of disconnection for "DISCONNECTED" */
+    } conn_stat;                               /*!< A2DP connection status */
+
+    /**
+     * @brief ESP_A2D_AUDIO_STATE_EVT
+     */
+    struct a2d_audio_stat_param {
+        esp_a2d_audio_state_t state;           /*!< one of the values from esp_a2d_audio_state_t */
+        esp_bd_addr_t remote_bda;              /*!< remote bluetooth device address */
+    } audio_stat;                              /*!< audio stream playing state */
+
+    /**
+     * @brief ESP_A2D_AUDIO_CFG_EVT
+     */
+    struct a2d_audio_cfg_param {
+        esp_bd_addr_t remote_bda;              /*!< remote bluetooth device address */
+        esp_a2d_mcc_t mcc;                     /*!< A2DP media codec capability information */
+    } audio_cfg;                               /*!< media codec configuration information */
+
+    /**
+     * @brief ESP_A2D_MEDIA_CTRL_ACK_EVT
+     */
+    struct media_ctrl_stat_param {
+        esp_a2d_media_ctrl_t cmd;              /*!< media control commands to acknowledge */
+        esp_a2d_media_ctrl_ack_t status;       /*!< acknowledgement to media control commands */
+    } media_ctrl_stat;                         /*!< status in acknowledgement to media control commands */
+    /**
+     * @brief ESP_A2D_PROF_STATE_EVT
+     */
+    struct a2d_prof_stat_param {
+        esp_a2d_init_state_t init_state;       /*!< a2dp profile state param */
+    } a2d_prof_stat;                           /*!< status to indicate a2d prof init or deinit */
+} esp_a2d_cb_param_t;
+
+/**
+ * @brief           A2DP profile callback function type
+ *
+ * @param           event : Event type
+ *
+ * @param           param : Pointer to callback parameter
+ */
+typedef void (* esp_a2d_cb_t)(esp_a2d_cb_event_t event, esp_a2d_cb_param_t *param);
+
+/**
+ * @brief           A2DP sink data callback function
+ *
+ * @param[in]       buf : pointer to the data received from A2DP source device and is PCM format decoded from SBC decoder;
+ *                  buf references to a static memory block and can be overwritten by upcoming data
+ *
+ * @param[in]       len : size(in bytes) in buf
+ */
+typedef void (* esp_a2d_sink_data_cb_t)(const uint8_t *buf, uint32_t len);
+
+/**
+ * @brief           A2DP source data read callback function
+ *
+ * @param[in]       buf : buffer to be filled with PCM data stream from higher layer
+ *
+ * @param[in]       len : size(in bytes) of data block to be copied to buf. -1 is an indication to user
+ *                  that data buffer shall be flushed
+ *
+ * @return          size of bytes read successfully, if the argument len is -1, this value is ignored.
+ *
+ */
+typedef int32_t (* esp_a2d_source_data_cb_t)(uint8_t *buf, int32_t len);
+
+/**
+ * @brief           Register application callback function to A2DP module. This function should be called
+ *                  only after esp_bluedroid_enable() completes successfully, used by both A2DP source
+ *                  and sink.
+ *
+ * @param[in]       callback: A2DP event callback function
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: if callback is a NULL function pointer
+ *
+ */
+esp_err_t esp_a2d_register_callback(esp_a2d_cb_t callback);
+
+
+/**
+ * @brief           Register A2DP sink data output function; For now the output is PCM data stream decoded
+ *                  from SBC format. This function should be called only after esp_bluedroid_enable()
+ *                  completes successfully, used only by A2DP sink. The callback is invoked in the context
+ *                  of A2DP sink task whose stack size is configurable through menuconfig.
+ *
+ * @param[in]       callback: A2DP sink data callback function
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: if callback is a NULL function pointer
+ *
+ */
+esp_err_t esp_a2d_sink_register_data_callback(esp_a2d_sink_data_cb_t callback);
+
+
+/**
+ *
+ * @brief           Initialize the bluetooth A2DP sink module. This function should be called
+ *                  after esp_bluedroid_enable() completes successfully, and ESP_A2D_PROF_STATE_EVT
+ *                  with ESP_A2D_INIT_SUCCESS will reported to the APP layer. Note: A2DP can work independently.
+ *                  If you want to use AVRC together, you should initiate AVRC first. This
+ *                  function should be called after esp_bluedroid_enable() completes successfully.
+ *
+ * @return
+ *                  - ESP_OK: if the initialization request is sent successfully
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_a2d_sink_init(void);
+
+
+/**
+ *
+ * @brief           De-initialize for A2DP sink module. This function
+ *                  should be called only after esp_bluedroid_enable() completes successfully,
+ *                  and ESP_A2D_PROF_STATE_EVT with ESP_A2D_DEINIT_SUCCESS will reported to APP layer.
+ *
+ * @return
+ *                  - ESP_OK: if the deinitialization request is sent successfully
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_a2d_sink_deinit(void);
+
+
+/**
+ *
+ * @brief           Connect to remote bluetooth A2DP source device. This API must be called after
+ *                  esp_a2d_sink_init() and before esp_a2d_sink_deinit().
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ *
+ * @return
+ *                  - ESP_OK: connect request is sent to lower layer successfully
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_a2d_sink_connect(esp_bd_addr_t remote_bda);
+
+
+/**
+ *
+ * @brief           Disconnect from the remote A2DP source device. This API must be called after
+ *                  esp_a2d_sink_init() and before esp_a2d_sink_deinit().
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer successfully
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_a2d_sink_disconnect(esp_bd_addr_t remote_bda);
+
+
+/**
+ *
+ * @brief           Media control commands. This API can be used for both A2DP sink and source
+ *                  and must be called after esp_a2d_sink_init() and before esp_a2d_sink_deinit().
+ *
+ * @param[in]       ctrl: control commands for A2DP data channel
+ *
+ * @return
+ *                  - ESP_OK: control command is sent to lower layer successfully
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_a2d_media_ctrl(esp_a2d_media_ctrl_t ctrl);
+
+
+/**
+ *
+ * @brief           Initialize the bluetooth A2DP source module. A2DP can work independently.
+ *                  If you want to use AVRC together, you should initiate AVRC first. This function should be called
+ *                  after esp_bluedroid_enable() completes successfully, and ESP_A2D_PROF_STATE_EVT
+ *                  with ESP_A2D_INIT_SUCCESS will reported to the APP layer. Note: A2DP can work independently.
+ *                  If you want to use AVRC together, you should initiate AVRC first.
+ *
+ * @return
+ *                  - ESP_OK: if the initialization request is sent to lower layer successfully
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_a2d_source_init(void);
+
+
+/**
+ *
+ * @brief           De-initialize for A2DP source module. This function
+ *                  should be called only after esp_bluedroid_enable() completes successfully,
+ *                  and ESP_A2D_PROF_STATE_EVT with ESP_A2D_DEINIT_SUCCESS will reported to APP layer.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_a2d_source_deinit(void);
+
+
+/**
+ * @brief           Register A2DP source data input function. For now, the input shoule be PCM data stream.
+ *                  This function should be called only after esp_bluedroid_enable() completes
+ *                  successfully. The callback is invoked in the context of A2DP source task whose
+ *                  stack size is configurable through menuconfig.
+ *
+ * @param[in]       callback: A2DP source data callback function
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: if callback is a NULL function pointer
+ *
+ */
+esp_err_t esp_a2d_source_register_data_callback(esp_a2d_source_data_cb_t callback);
+
+
+/**
+ *
+ * @brief           Connect to remote A2DP sink device. This API must be called
+ *                  after esp_a2d_source_init() and before esp_a2d_source_deinit().
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ *
+ * @return
+ *                  - ESP_OK: connect request is sent to lower layer successfully
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_a2d_source_connect(esp_bd_addr_t remote_bda);
+
+
+/**
+ *
+ * @brief           Disconnect from the remote A2DP sink device. This API must be called
+ *                  after esp_a2d_source_init() and before esp_a2d_source_deinit().
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_a2d_source_disconnect(esp_bd_addr_t remote_bda);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __ESP_A2DP_API_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_avrc_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_avrc_api.h
new file mode 100644
index 00000000000..dd4d5fcb8dc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_avrc_api.h
@@ -0,0 +1,743 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_AVRC_API_H__
+#define __ESP_AVRC_API_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_bt_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_AVRC_TRANS_LABEL_MAX        15       /*!< max transaction label */
+
+/// AVRC feature bit mask
+typedef enum {
+    ESP_AVRC_FEAT_RCTG = 0x0001,                 /*!< remote control target */
+    ESP_AVRC_FEAT_RCCT = 0x0002,                 /*!< remote control controller */
+    ESP_AVRC_FEAT_VENDOR = 0x0008,               /*!< remote control vendor dependent commands */
+    ESP_AVRC_FEAT_BROWSE = 0x0010,               /*!< use browsing channel */
+    ESP_AVRC_FEAT_META_DATA = 0x0040,            /*!< remote control metadata transfer command/response */
+    ESP_AVRC_FEAT_ADV_CTRL = 0x0200,             /*!< remote control advanced control commmand/response */
+} esp_avrc_features_t;
+
+/// AVRC supported features flag retrieved in SDP record
+typedef enum {
+    ESP_AVRC_FEAT_FLAG_CAT1 = 0x0001,                             /*!< category 1 */
+    ESP_AVRC_FEAT_FLAG_CAT2 = 0x0002,                             /*!< category 2 */
+    ESP_AVRC_FEAT_FLAG_CAT3 = 0x0004,                             /*!< category 3 */
+    ESP_AVRC_FEAT_FLAG_CAT4 = 0x0008,                             /*!< category 4 */
+    ESP_AVRC_FEAT_FLAG_BROWSING = 0x0040,                         /*!< browsing */
+    ESP_AVRC_FEAT_FLAG_COVER_ART_GET_IMAGE_PROP = 0x0080,         /*!< Cover Art GetImageProperties */
+    ESP_AVRC_FEAT_FLAG_COVER_ART_GET_IMAGE = 0x0100,              /*!< Cover Art GetImage */
+    ESP_AVRC_FEAT_FLAG_COVER_ART_GET_LINKED_THUMBNAIL = 0x0200,   /*!< Cover Art GetLinkedThumbnail */
+} esp_avrc_feature_flag_t;
+
+/// AVRC passthrough command code
+typedef enum {
+    ESP_AVRC_PT_CMD_SELECT         =   0x00,    /*!< select */
+    ESP_AVRC_PT_CMD_UP             =   0x01,    /*!< up */
+    ESP_AVRC_PT_CMD_DOWN           =   0x02,    /*!< down */
+    ESP_AVRC_PT_CMD_LEFT           =   0x03,    /*!< left */
+    ESP_AVRC_PT_CMD_RIGHT          =   0x04,    /*!< right */
+    ESP_AVRC_PT_CMD_RIGHT_UP       =   0x05,    /*!< right-up */
+    ESP_AVRC_PT_CMD_RIGHT_DOWN     =   0x06,    /*!< right-down */
+    ESP_AVRC_PT_CMD_LEFT_UP        =   0x07,    /*!< left-up */
+    ESP_AVRC_PT_CMD_LEFT_DOWN      =   0x08,    /*!< left-down */
+    ESP_AVRC_PT_CMD_ROOT_MENU      =   0x09,    /*!< root menu */
+    ESP_AVRC_PT_CMD_SETUP_MENU     =   0x0A,    /*!< setup menu */
+    ESP_AVRC_PT_CMD_CONT_MENU      =   0x0B,    /*!< contents menu */
+    ESP_AVRC_PT_CMD_FAV_MENU       =   0x0C,    /*!< favorite menu */
+    ESP_AVRC_PT_CMD_EXIT           =   0x0D,    /*!< exit */
+    ESP_AVRC_PT_CMD_0              =   0x20,    /*!< 0 */
+    ESP_AVRC_PT_CMD_1              =   0x21,    /*!< 1 */
+    ESP_AVRC_PT_CMD_2              =   0x22,    /*!< 2 */
+    ESP_AVRC_PT_CMD_3              =   0x23,    /*!< 3 */
+    ESP_AVRC_PT_CMD_4              =   0x24,    /*!< 4 */
+    ESP_AVRC_PT_CMD_5              =   0x25,    /*!< 5 */
+    ESP_AVRC_PT_CMD_6              =   0x26,    /*!< 6 */
+    ESP_AVRC_PT_CMD_7              =   0x27,    /*!< 7 */
+    ESP_AVRC_PT_CMD_8              =   0x28,    /*!< 8 */
+    ESP_AVRC_PT_CMD_9              =   0x29,    /*!< 9 */
+    ESP_AVRC_PT_CMD_DOT            =   0x2A,    /*!< dot */
+    ESP_AVRC_PT_CMD_ENTER          =   0x2B,    /*!< enter */
+    ESP_AVRC_PT_CMD_CLEAR          =   0x2C,    /*!< clear */
+    ESP_AVRC_PT_CMD_CHAN_UP        =   0x30,    /*!< channel up */
+    ESP_AVRC_PT_CMD_CHAN_DOWN      =   0x31,    /*!< channel down */
+    ESP_AVRC_PT_CMD_PREV_CHAN      =   0x32,    /*!< previous channel */
+    ESP_AVRC_PT_CMD_SOUND_SEL      =   0x33,    /*!< sound select */
+    ESP_AVRC_PT_CMD_INPUT_SEL      =   0x34,    /*!< input select */
+    ESP_AVRC_PT_CMD_DISP_INFO      =   0x35,    /*!< display information */
+    ESP_AVRC_PT_CMD_HELP           =   0x36,    /*!< help */
+    ESP_AVRC_PT_CMD_PAGE_UP        =   0x37,    /*!< page up */
+    ESP_AVRC_PT_CMD_PAGE_DOWN      =   0x38,    /*!< page down */
+    ESP_AVRC_PT_CMD_POWER          =   0x40,    /*!< power */
+    ESP_AVRC_PT_CMD_VOL_UP         =   0x41,    /*!< volume up */
+    ESP_AVRC_PT_CMD_VOL_DOWN       =   0x42,    /*!< volume down */
+    ESP_AVRC_PT_CMD_MUTE           =   0x43,    /*!< mute */
+    ESP_AVRC_PT_CMD_PLAY           =   0x44,    /*!< play */
+    ESP_AVRC_PT_CMD_STOP           =   0x45,    /*!< stop */
+    ESP_AVRC_PT_CMD_PAUSE          =   0x46,    /*!< pause */
+    ESP_AVRC_PT_CMD_RECORD         =   0x47,    /*!< record */
+    ESP_AVRC_PT_CMD_REWIND         =   0x48,    /*!< rewind */
+    ESP_AVRC_PT_CMD_FAST_FORWARD   =   0x49,    /*!< fast forward */
+    ESP_AVRC_PT_CMD_EJECT          =   0x4A,    /*!< eject */
+    ESP_AVRC_PT_CMD_FORWARD        =   0x4B,    /*!< forward */
+    ESP_AVRC_PT_CMD_BACKWARD       =   0x4C,    /*!< backward */
+    ESP_AVRC_PT_CMD_ANGLE          =   0x50,    /*!< angle */
+    ESP_AVRC_PT_CMD_SUBPICT        =   0x51,    /*!< subpicture */
+    ESP_AVRC_PT_CMD_F1             =   0x71,    /*!< F1 */
+    ESP_AVRC_PT_CMD_F2             =   0x72,    /*!< F2 */
+    ESP_AVRC_PT_CMD_F3             =   0x73,    /*!< F3 */
+    ESP_AVRC_PT_CMD_F4             =   0x74,    /*!< F4 */
+    ESP_AVRC_PT_CMD_F5             =   0x75,    /*!< F5 */
+    ESP_AVRC_PT_CMD_VENDOR         =   0x7E,    /*!< vendor unique */
+} esp_avrc_pt_cmd_t;
+
+/// AVRC passthrough command filter
+typedef enum {
+    ESP_AVRC_PSTH_FILTER_ALLOWED_CMD = 0,       /*!< all of the PASSTHROUGH commands that can possibly be used, immuateble */
+    ESP_AVRC_PSTH_FILTER_SUPPORTED_CMD = 1,     /*!< PASSTHROUGH commands selectively supported according to the current configuration */
+    ESP_AVRC_PSTH_FILTER_SUPPORT_MAX,
+} esp_avrc_psth_filter_t;
+
+/// AVRC passthrough command bit mask
+typedef struct {
+    uint16_t bits[8];                           /*!< bit mask representation of PASSTHROUGH commands */
+} esp_avrc_psth_bit_mask_t;
+
+typedef enum {
+    ESP_AVRC_BIT_MASK_OP_TEST = 0,      /*!< operation code to test a specific bit */
+    ESP_AVRC_BIT_MASK_OP_SET = 1,       /*!< operation code to set a specific bit  */
+    ESP_AVRC_BIT_MASK_OP_CLEAR = 2,     /*!< operation code to clear a specific bit */
+} esp_avrc_bit_mask_op_t;
+
+/// AVRC passthrough command state
+typedef enum {
+    ESP_AVRC_PT_CMD_STATE_PRESSED = 0,           /*!< key pressed */
+    ESP_AVRC_PT_CMD_STATE_RELEASED = 1           /*!< key released */
+} esp_avrc_pt_cmd_state_t;
+
+/// AVRC Controller callback events
+typedef enum {
+    ESP_AVRC_CT_CONNECTION_STATE_EVT = 0,        /*!< connection state changed event */
+    ESP_AVRC_CT_PASSTHROUGH_RSP_EVT = 1,         /*!< passthrough response event */
+    ESP_AVRC_CT_METADATA_RSP_EVT = 2,            /*!< metadata response event */
+    ESP_AVRC_CT_PLAY_STATUS_RSP_EVT = 3,         /*!< play status response event */
+    ESP_AVRC_CT_CHANGE_NOTIFY_EVT = 4,           /*!< notification event */
+    ESP_AVRC_CT_REMOTE_FEATURES_EVT = 5,         /*!< feature of remote device indication event */
+    ESP_AVRC_CT_GET_RN_CAPABILITIES_RSP_EVT = 6,     /*!< supported notification events capability of peer device */
+    ESP_AVRC_CT_SET_ABSOLUTE_VOLUME_RSP_EVT = 7, /*!< set absolute volume response event */
+} esp_avrc_ct_cb_event_t;
+
+/// AVRC Target callback events
+typedef enum {
+    ESP_AVRC_TG_CONNECTION_STATE_EVT = 0,          /*!< connection state changed event */
+    ESP_AVRC_TG_REMOTE_FEATURES_EVT = 1,           /*!< feature of remote device indication event */
+    ESP_AVRC_TG_PASSTHROUGH_CMD_EVT = 2,           /*!< passthrough command event */
+    ESP_AVRC_TG_SET_ABSOLUTE_VOLUME_CMD_EVT = 3,   /*!< set absolute volume command from remote device */
+    ESP_AVRC_TG_REGISTER_NOTIFICATION_EVT = 4,     /*!< register notification event */
+    ESP_AVRC_TG_SET_PLAYER_APP_VALUE_EVT = 5,      /*!< set applicaton attribute value, attribute refer to esp_avrc_ps_attr_ids_t */
+} esp_avrc_tg_cb_event_t;
+
+/// AVRC metadata attribute mask
+typedef enum {
+    ESP_AVRC_MD_ATTR_TITLE = 0x1,                 /*!< title of the playing track */
+    ESP_AVRC_MD_ATTR_ARTIST = 0x2,                /*!< track artist */
+    ESP_AVRC_MD_ATTR_ALBUM = 0x4,                 /*!< album name */
+    ESP_AVRC_MD_ATTR_TRACK_NUM = 0x8,             /*!< track position on the album */
+    ESP_AVRC_MD_ATTR_NUM_TRACKS = 0x10,           /*!< number of tracks on the album */
+    ESP_AVRC_MD_ATTR_GENRE = 0x20,                /*!< track genre */
+    ESP_AVRC_MD_ATTR_PLAYING_TIME = 0x40          /*!< total album playing time in miliseconds */
+} esp_avrc_md_attr_mask_t;
+
+/// AVRC event notification ids
+typedef enum {
+    ESP_AVRC_RN_PLAY_STATUS_CHANGE = 0x01,        /*!< track status change, eg. from playing to paused */
+    ESP_AVRC_RN_TRACK_CHANGE = 0x02,              /*!< new track is loaded */
+    ESP_AVRC_RN_TRACK_REACHED_END = 0x03,         /*!< current track reached end */
+    ESP_AVRC_RN_TRACK_REACHED_START = 0x04,       /*!< current track reached start position */
+    ESP_AVRC_RN_PLAY_POS_CHANGED = 0x05,          /*!< track playing position changed */
+    ESP_AVRC_RN_BATTERY_STATUS_CHANGE = 0x06,     /*!< battery status changed */
+    ESP_AVRC_RN_SYSTEM_STATUS_CHANGE = 0x07,      /*!< system status changed */
+    ESP_AVRC_RN_APP_SETTING_CHANGE = 0x08,        /*!< application settings changed */
+    ESP_AVRC_RN_NOW_PLAYING_CHANGE = 0x09,        /*!< now playing content changed */
+    ESP_AVRC_RN_AVAILABLE_PLAYERS_CHANGE = 0x0a,  /*!< available players changed */
+    ESP_AVRC_RN_ADDRESSED_PLAYER_CHANGE = 0x0b,   /*!< the addressed player changed */
+    ESP_AVRC_RN_UIDS_CHANGE = 0x0c,               /*!< UIDs changed */
+    ESP_AVRC_RN_VOLUME_CHANGE = 0x0d,             /*!< volume changed locally on TG */
+    ESP_AVRC_RN_MAX_EVT
+} esp_avrc_rn_event_ids_t;
+
+/// AVRC target notification event notification capability
+typedef enum {
+    ESP_AVRC_RN_CAP_ALLOWED_EVT = 0,              /*!< all of the notification events that can possibly be supported, immutable */
+    ESP_AVRC_RN_CAP_SUPPORTED_EVT = 1,            /*!< notification events selectively supported according to the current configuration */
+    ESP_AVRC_RN_CAP_MAX,
+} esp_avrc_rn_evt_cap_t;
+
+/// AVRC target notification event capability bit mask
+typedef struct {
+    uint16_t bits;                                /*!< bit mask representation of PASSTHROUGH commands */
+} esp_avrc_rn_evt_cap_mask_t;
+
+/// AVRC notification response type
+typedef enum {
+    ESP_AVRC_RN_RSP_INTERIM = 13,     /*!< initial response to RegisterNotification, should be sent T_mtp(1000ms) from receiving the command */
+    ESP_AVRC_RN_RSP_CHANGED = 15,     /*!< final response to RegisterNotification command */
+} esp_avrc_rn_rsp_t;
+
+/// AVRC player setting ids
+typedef enum {
+    ESP_AVRC_PS_EQUALIZER = 0x01,                 /*!< equalizer, on or off */
+    ESP_AVRC_PS_REPEAT_MODE = 0x02,               /*!< repeat mode */
+    ESP_AVRC_PS_SHUFFLE_MODE = 0x03,              /*!< shuffle mode */
+    ESP_AVRC_PS_SCAN_MODE = 0x04,                 /*!< scan mode on or off */
+    ESP_AVRC_PS_MAX_ATTR
+} esp_avrc_ps_attr_ids_t;
+
+/// AVRC equalizer modes
+typedef enum {
+    ESP_AVRC_PS_EQUALIZER_OFF = 0x1,              /*!< equalizer OFF */
+    ESP_AVRC_PS_EQUALIZER_ON = 0x2                /*!< equalizer ON */
+} esp_avrc_ps_eq_value_ids_t;
+
+/// AVRC repeat modes
+typedef enum {
+    ESP_AVRC_PS_REPEAT_OFF = 0x1,                 /*!< repeat mode off */
+    ESP_AVRC_PS_REPEAT_SINGLE = 0x2,              /*!< single track repeat */
+    ESP_AVRC_PS_REPEAT_GROUP = 0x3                /*!< group repeat */
+} esp_avrc_ps_rpt_value_ids_t;
+
+
+/// AVRC shuffle modes
+typedef enum {
+    ESP_AVRC_PS_SHUFFLE_OFF = 0x1,                /*<! shuffle off */
+    ESP_AVRC_PS_SHUFFLE_ALL = 0x2,                /*<! shuffle all tracks */
+    ESP_AVRC_PS_SHUFFLE_GROUP = 0x3               /*<! group shuffle */
+} esp_avrc_ps_shf_value_ids_t;
+
+/// AVRC scan modes
+typedef enum {
+    ESP_AVRC_PS_SCAN_OFF = 0x1,                   /*!< scan off */
+    ESP_AVRC_PS_SCAN_ALL = 0x2,                   /*!< all tracks scan */
+    ESP_AVRC_PS_SCAN_GROUP = 0x3                  /*!< group scan */
+} esp_avrc_ps_scn_value_ids_t;
+
+/// AVCTP response codes
+typedef enum {
+    ESP_AVRC_RSP_NOT_IMPL   = 8,                  /*!< not implemented */
+    ESP_AVRC_RSP_ACCEPT     = 9,                  /*!< accept */
+    ESP_AVRC_RSP_REJECT     = 10,                 /*!< reject */
+    ESP_AVRC_RSP_IN_TRANS   = 11,                 /*!< in transition */
+    ESP_AVRC_RSP_IMPL_STBL  = 12,                 /*!< implemented/stable */
+    ESP_AVRC_RSP_CHANGED    = 13,                 /*!< changed */
+    ESP_AVRC_RSP_INTERIM    = 15,                 /*!< interim */
+} esp_avrc_rsp_t;
+
+/// AVRCP battery status
+typedef enum {
+    ESP_AVRC_BATT_NORMAL       = 0,               /*!< normal state */
+    ESP_AVRC_BATT_WARNING      = 1,               /*!< unable to operate soon */
+    ESP_AVRC_BATT_CRITICAL     = 2,               /*!< cannot operate any more */
+    ESP_AVRC_BATT_EXTERNAL     = 3,               /*!< plugged to external power supply */
+    ESP_AVRC_BATT_FULL_CHARGE  = 4,               /*!< when completely charged from external power supply */
+} esp_avrc_batt_stat_t;
+
+/// AVRCP current status of playback
+typedef enum {
+    ESP_AVRC_PLAYBACK_STOPPED = 0,                /*!< stopped */
+    ESP_AVRC_PLAYBACK_PLAYING = 1,                /*!< playing */
+    ESP_AVRC_PLAYBACK_PAUSED = 2,                 /*!< paused */
+    ESP_AVRC_PLAYBACK_FWD_SEEK = 3,               /*!< forward seek */
+    ESP_AVRC_PLAYBACK_REV_SEEK = 4,               /*!< reverse seek */
+    ESP_AVRC_PLAYBACK_ERROR = 0xFF,               /*!< error */
+} esp_avrc_playback_stat_t;
+
+/// AVRCP notification parameters
+typedef union
+{
+    uint8_t volume;                          /*!< response data for ESP_AVRC_RN_VOLUME_CHANGE, ranges 0..127 */
+    esp_avrc_playback_stat_t playback;       /*!< response data for ESP_AVRC_RN_PLAY_STATUS_CHANGE */
+    uint8_t elm_id[8];                       /*!< response data for ESP_AVRC_RN_TRACK_CHANGE */
+    uint32_t play_pos;                       /*!< response data for ESP_AVRC_RN_PLAY_POS_CHANGED, in millisecond */
+    esp_avrc_batt_stat_t batt;               /*!< response data for ESP_AVRC_RN_BATTERY_STATUS_CHANGE */
+} esp_avrc_rn_param_t;
+
+/// AVRCP set app value parameters
+typedef struct {
+    uint8_t   attr_id;                       /*!< player application attribute id */
+    uint8_t   attr_val;                      /*!< player application attribute value */
+} esp_avrc_set_app_value_param_t;
+
+/// AVRC controller callback parameters
+typedef union {
+    /**
+     * @brief ESP_AVRC_CT_CONNECTION_STATE_EVT
+     */
+    struct avrc_ct_conn_stat_param {
+        bool connected;                          /*!< whether AVRC connection is set up */
+        esp_bd_addr_t remote_bda;                /*!< remote bluetooth device address */
+    } conn_stat;                                 /*!< AVRC connection status */
+
+    /**
+     * @brief ESP_AVRC_CT_PASSTHROUGH_RSP_EVT
+     */
+    struct avrc_ct_psth_rsp_param {
+        uint8_t tl;                              /*!< transaction label, 0 to 15 */
+        uint8_t key_code;                        /*!< passthrough command code */
+        uint8_t key_state;                       /*!< 0 for PRESSED, 1 for RELEASED */
+    } psth_rsp;                                  /*!< passthrough command response */
+
+    /**
+     * @brief ESP_AVRC_CT_METADATA_RSP_EVT
+     */
+    struct avrc_ct_meta_rsp_param {
+        uint8_t attr_id;                         /*!< id of metadata attribute */
+        uint8_t *attr_text;                      /*!< attribute itself */
+        int attr_length;                         /*!< attribute character length */
+    } meta_rsp;                                  /*!< metadata attributes response */
+
+    /**
+     * @brief ESP_AVRC_CT_CHANGE_NOTIFY_EVT
+     */
+    struct avrc_ct_change_notify_param {
+        uint8_t event_id;                        /*!< id of AVRC event notification */
+        esp_avrc_rn_param_t event_parameter;     /*!< event notification parameter */
+    } change_ntf;                                /*!< notifications */
+
+    /**
+     * @brief ESP_AVRC_CT_REMOTE_FEATURES_EVT
+     */
+    struct avrc_ct_rmt_feats_param {
+        uint32_t feat_mask;                      /*!< AVRC feature mask of remote device */
+        uint16_t tg_feat_flag;                   /*!< feature flag of remote device as TG */
+        esp_bd_addr_t remote_bda;                /*!< remote bluetooth device address */
+    } rmt_feats;                                 /*!< AVRC features discovered from remote SDP server */
+
+    /**
+     * @brief ESP_AVRC_CT_GET_RN_CAPABILITIES_RSP_EVT
+     */
+    struct avrc_ct_get_rn_caps_rsp_param {
+        uint8_t cap_count;                       /*!< number of items provided in event or company_id according to cap_id used */
+        esp_avrc_rn_evt_cap_mask_t evt_set;      /*!< supported event_ids represented in bit-mask */
+    } get_rn_caps_rsp;                           /*!< get supported event capabilities response from AVRCP target */
+
+    /**
+     * @brief ESP_AVRC_CT_SET_ABSOLUTE_VOLUME_RSP_EVT
+     */
+    struct avrc_ct_set_volume_rsp_param {
+        uint8_t volume;                          /*!< the volume which has actually been set, range is 0 to 0x7f, means 0% to 100% */
+    } set_volume_rsp;                            /*!< set absolute volume response event */
+} esp_avrc_ct_cb_param_t;
+
+/// AVRC target callback parameters
+typedef union {
+    /**
+     * @brief ESP_AVRC_TG_CONNECTION_STATE_EVT
+     */
+    struct avrc_tg_conn_stat_param {
+        bool connected;                          /*!< whether AVRC connection is set up */
+        esp_bd_addr_t remote_bda;                /*!< remote bluetooth device address */
+    } conn_stat;                                 /*!< AVRC connection status */
+
+    /**
+     * @brief ESP_AVRC_TG_REMOTE_FEATURES_EVT
+     */
+    struct avrc_tg_rmt_feats_param {
+        uint32_t feat_mask;                      /*!< AVRC feature mask of remote device */
+        uint16_t ct_feat_flag;                   /*!< feature flag of remote device as CT */
+        esp_bd_addr_t remote_bda;                /*!< remote bluetooth device address */
+    } rmt_feats;                                 /*!< AVRC features discovered through SDP */
+
+    /**
+     * @brief ESP_AVRC_TG_PASSTHROUGH_CMD_EVT
+     */
+    struct avrc_tg_psth_cmd_param {
+        uint8_t key_code;                        /*!< passthrough command code */
+        uint8_t key_state;                       /*!< 0 for PRESSED, 1 for RELEASED */
+    } psth_cmd;                                  /*!< passthrough command */
+
+    /**
+     * @brief ESP_AVRC_TG_SET_ABSOLUTE_VOLUME_CMD_EVT
+     */
+    struct avrc_tg_set_abs_vol_param {
+        uint8_t volume;                          /*!< volume ranges from 0 to 127 */
+    } set_abs_vol;                               /*!< set absolute volume command targeted on audio sink */
+
+    /**
+     * @brief ESP_AVRC_TG_REGISTER_NOTIFICATION_EVT
+     */
+    struct avrc_tg_reg_ntf_param {
+        uint8_t event_id;                        /*!< event id of AVRC RegisterNotification */
+        uint32_t event_parameter;                /*!< event notification parameter */
+    } reg_ntf;                                   /*!< register notification */
+
+    /**
+     * @brief ESP_AVRC_TG_SET_PLAYER_APP_VALUE_EVT
+     */
+    struct avrc_tg_set_app_value_param {
+        uint8_t num_val;                        /*!< attribute num */
+        esp_avrc_set_app_value_param_t *p_vals; /*!< point to the id and value of player application attribute */
+    } set_app_value;                            /*!< set player application value */
+
+} esp_avrc_tg_cb_param_t;
+
+/**
+ * @brief           AVRCP controller callback function type
+ *
+ * @param           event : Event type
+ *
+ * @param           param : Pointer to callback parameter union
+ */
+typedef void (* esp_avrc_ct_cb_t)(esp_avrc_ct_cb_event_t event, esp_avrc_ct_cb_param_t *param);
+
+/**
+ * @brief           AVRCP target callback function type
+ *
+ * @param           event : Event type
+ *
+ * @param           param : Pointer to callback parameter union
+ */
+typedef void (* esp_avrc_tg_cb_t)(esp_avrc_tg_cb_event_t event, esp_avrc_tg_cb_param_t *param);
+
+
+/**
+ * @brief           Register application callbacks to AVRCP module. This function should be
+ *                  called after esp_bluedroid_enable() completes successfully.
+ *
+ * @param[in]       callback: AVRCP controller callback function
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_avrc_ct_register_callback(esp_avrc_ct_cb_t callback);
+
+/**
+ *
+ * @brief           Initialize the bluetooth AVRCP controller module, This function should be called
+ *                  after esp_bluedroid_enable() completes successfully. Note: AVRC cannot work independently,
+ *                  AVRC should be used along with A2DP and AVRC should be initialized before A2DP.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_avrc_ct_init(void);
+
+/**
+ *
+ * @brief           De-initialize AVRCP controller module. This function should be called after
+ *                  after esp_bluedroid_enable() completes successfully. Note: AVRC cannot work independently,
+ *                  AVRC should be used along with A2DP and AVRC should be deinitialized before A2DP.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_avrc_ct_deinit(void);
+
+/**
+ *
+ * @brief           Send player application settings command to AVRCP target. This function should be called
+ *                  after ESP_AVRC_CT_CONNECTION_STATE_EVT is received and AVRCP connection is established.
+ *
+ * @param[in]       tl : transaction label, 0 to 15, consecutive commands should use different values
+ *
+ * @param[in]       attr_id : player application setting attribute IDs from one of esp_avrc_ps_attr_ids_t
+ *
+ * @param[in]       value_id : attribute value defined for the specific player application setting attribute
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_avrc_ct_send_set_player_value_cmd(uint8_t tl, uint8_t attr_id, uint8_t value_id);
+
+/**
+ * @brief           Send GetCapabilities PDU to AVRCP target to retrieve remote device's supported
+ *                  notification event_ids. This function should be called after
+ *                  ESP_AVRC_CT_CONNECTION_STATE_EVT is received and AVRCP connection is established.
+ *
+ * @param[in]       tl : transaction label, 0 to 15, consecutive commands should use different values
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_avrc_ct_send_get_rn_capabilities_cmd(uint8_t tl);
+
+/**
+ * @brief           Send register notification command to AVRCP target. This function should be called after
+ *                  ESP_AVRC_CT_CONNECTION_STATE_EVT is received and AVRCP connection is established.
+ *
+ * @param[in]       tl : transaction label, 0 to 15, consecutive commands should use different values.
+ *
+ * @param[in]       event_id : id of events, e.g. ESP_AVRC_RN_PLAY_STATUS_CHANGE, ESP_AVRC_RN_TRACK_CHANGE, etc.
+ *
+ * @param[in]       event_parameter : playback interval for ESP_AVRC_RN_PLAY_POS_CHANGED;
+ *                                    For other events , value of this parameter is ignored.
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_ERR_NOT_SUPPORTED: if the event_id is not supported in current implementation
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_avrc_ct_send_register_notification_cmd(uint8_t tl, uint8_t event_id, uint32_t event_parameter);
+
+/**
+ * @brief           Send set absolute volume command to AVRCP target. This function should be called after
+ *                  ESP_AVRC_CT_CONNECTION_STATE_EVT is received and AVRCP connection is established.
+ *
+ * @param[in]       tl : transaction label, 0 to 15, consecutive commands should use different values
+ *
+ * @param[in]       volume : volume, 0 to 0x7f, means 0% to 100%
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_ERR_NOT_SUPPORTED: if the event_id is not supported in current implementation
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_avrc_ct_send_set_absolute_volume_cmd(uint8_t tl, uint8_t volume);
+
+/**
+ * @brief           Send metadata command to AVRCP target. This function should be called after
+ *                  ESP_AVRC_CT_CONNECTION_STATE_EVT is received and AVRCP connection is established.
+ *
+ * @param[in]       tl : transaction label, 0 to 15, consecutive commands should use different values.
+ *
+ * @param[in]       attr_mask : mask of attributes, e.g. ESP_AVRC_MD_ATTR_ID_TITLE | ESP_AVRC_MD_ATTR_ID_ARTIST.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_avrc_ct_send_metadata_cmd(uint8_t tl, uint8_t attr_mask);
+
+
+/**
+ * @brief           Send passthrough command to AVRCP target. This function should be called after
+ *                  ESP_AVRC_CT_CONNECTION_STATE_EVT is received and AVRCP connection is established.
+ *
+ * @param[in]       tl : transaction label, 0 to 15, consecutive commands should use different values.
+ *
+ * @param[in]       key_code : passthrough command code, e.g. ESP_AVRC_PT_CMD_PLAY, ESP_AVRC_PT_CMD_STOP, etc.
+ *
+ * @param[in]       key_state : passthrough command key state, ESP_AVRC_PT_CMD_STATE_PRESSED or
+ *                  ESP_AVRC_PT_CMD_STATE_RELEASED
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_avrc_ct_send_passthrough_cmd(uint8_t tl, uint8_t key_code, uint8_t key_state);
+
+
+/**
+ * @brief           Register application callbacks to AVRCP target module. This function should be
+ *                  called after esp_bluedroid_enable() completes successfully.
+ *
+ * @param[in]       callback: AVRCP target callback function
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_avrc_tg_register_callback(esp_avrc_tg_cb_t callback);
+
+/**
+ *
+ * @brief           Initialize the bluetooth AVRCP target module, This function should be called
+ *                  after esp_bluedroid_enable() completes successfully. Note: AVRC cannot work independently,
+ *                  AVRC should be used along with A2DP and AVRC should be initialized before A2DP.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_avrc_tg_init(void);
+
+/**
+ *
+ * @brief           De-initialize AVRCP target module. This function should be called after
+ *                  after esp_bluedroid_enable() completes successfully. Note: AVRC cannot work independently,
+ *                  AVRC should be used along with A2DP and AVRC should be deinitialized before A2DP.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_avrc_tg_deinit(void);
+
+/**
+ *
+ * @brief           Get the current filter of remote passthrough commands on AVRC target. Filter is given by
+ *                  filter type and bit mask for the passthrough commands. This function should be called
+ *                  after esp_avrc_tg_init().
+ *                  For filter type ESP_AVRC_PSTH_FILTER_ALLOWED_CMD, the retrieved command set is constant and
+ *                  it covers all of the passthrough commands that can possibly be supported.
+ *                  For filter type ESP_AVRC_PSTH_FILTER_SUPPORT_COMMANDS, the retrieved command set covers the
+ *                  passthrough commands selected to be supported according to current configuration. The
+ *                  configuration can be changed using esp_avrc_tg_set_psth_cmd_filter().
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not enabled or AVRC TG is not initialized
+ *                  - ESP_ERR_INVALID_ARG: if filter type is invalid or cmd_set is NULL
+ *                  - ESP_FAIL: otherwise
+ */
+esp_err_t esp_avrc_tg_get_psth_cmd_filter(esp_avrc_psth_filter_t filter, esp_avrc_psth_bit_mask_t *cmd_set);
+
+/**
+ *
+ * @brief           Set the filter of remote passthrough commands on AVRC target. Filter is given by
+ *                  filter type and bit mask for the passthrough commands. This function should be called
+ *                  after esp_avrc_tg_init().
+ *
+ *                  If filter type is ESP_AVRC_PSTH_FILTER_SUPPORT_CMD, the passthrough commands which
+ *                  are set "1" as given in cmd_set will generate ESP_AVRC_CT_PASSTHROUGH_RSP_EVT callback
+ *                  event and are auto-accepted in the protocol stack, other commands are replied with response
+ *                  type "NOT IMPLEMENTED" (8). The set of supported commands should be a subset of allowed
+ *                  command set. The allowed command set can be retrieved using esp_avrc_tg_get_psth_cmd_filter()
+ *                  with filter type "ESP_AVRC_PSTH_FILTER_ALLOWED_CMD".
+ *
+ *                  Filter type "ESP_AVRC_PSTH_FILTER_ALLOWED_CMD" does not apply to this function.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not enabled
+ *                  - ESP_ERR_INVALID_ARG: if filter type is invalid or cmd_set is NULL
+ *                  - ESP_ERR_NOT_SUPPORTED:: if filter type is ESP_AVRC_PSTH_FILTER_ALLOWED_CMD, or cmd_set
+ *                    includes unallowed commands
+ *
+ */
+esp_err_t esp_avrc_tg_set_psth_cmd_filter(esp_avrc_psth_filter_t filter, const esp_avrc_psth_bit_mask_t *cmd_set);
+
+/**
+ * @brief           Operate on the type esp_avrc_psth_bit_mask_t with regard to a specific PASSTHROUGH command.
+ *
+ * @param[in]       op: operation requested on the bit mask field
+ *
+ * @param[in]       psth: pointer to passthrough command bit mask structure
+ *
+ * @param[in]       cmd: passthrough command code
+ *
+ * @return          For operation ESP_AVRC_BIT_MASK_OP_SET or ESP_AVRC_BIT_MASK_OP_CLEAR, return
+ *                  true for a successful operation, otherwise return false.
+ *                  For operation ESP_AVRC_BIT_MASK_OP_TEST, return true if the corresponding bit
+ *                  is set, otherwise false.
+ *
+ */
+bool esp_avrc_psth_bit_mask_operation(esp_avrc_bit_mask_op_t op, esp_avrc_psth_bit_mask_t *psth, esp_avrc_pt_cmd_t cmd);
+
+/**
+ *
+ * @brief           Get the requested event notification capabilies on local AVRC target. The capability is returned
+ *                  in a bit mask representation in evt_set. This function should be called after esp_avrc_tg_init().
+ *
+ *                  For capability type "ESP_AVRC_RN_CAP_ALLOWED_EVT, the retrieved event set is constant and
+ *                  it covers all of the notifcation events that can possibly be supported with current
+ *                  implementation.
+ *
+ *                  For capability type ESP_AVRC_RN_CAP_SUPPORTED_EVT, the event set covers the notification
+ *                  events selected to be supported under current configuration, The configuration can be
+ *                  changed using esp_avrc_tg_set_rn_evt_cap().
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not enabled or AVRC TG is not initialized
+ *                  - ESP_ERR_INVALID_ARG: if cap is invalid or evt_set is NULL
+ *                  - ESP_FAIL: otherwise
+ */
+esp_err_t esp_avrc_tg_get_rn_evt_cap(esp_avrc_rn_evt_cap_t cap, esp_avrc_rn_evt_cap_mask_t *evt_set);
+
+/**
+ *
+ * @brief           Set the event notification capabilities on local AVRCP target. The capability is given in a
+ *                  bit mask representation in evt_set and must be a subset of allowed event IDs with current
+ *                  implementation. This function should be called after esp_avrc_tg_init().
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not enabled
+ *                  - ESP_ERR_INVALID_ARG: if evt_set is NULL
+ *
+ */
+esp_err_t esp_avrc_tg_set_rn_evt_cap(const esp_avrc_rn_evt_cap_mask_t *evt_set);
+
+/**
+ * @brief           Operate on the type esp_avrc_rn_evt_cap_mask_t with regard to a specific event.
+ *
+ * @param[in]       op: operation requested on the bit mask field
+ *
+ * @param[in]       events: pointer to event notification capability bit mask structure
+ *
+ * @param[in]       event_id: notification event code
+ *
+ * @return          For operation ESP_AVRC_BIT_MASK_OP_SET or ESP_AVRC_BIT_MASK_OP_CLEAR, return
+ *                  true for a successful operation, otherwise return false.
+ *
+ *                  For operation ESP_AVRC_BIT_MASK_OP_TEST, return true if the corresponding bit
+ *                  is set, otherwise false.
+ *
+ */
+bool esp_avrc_rn_evt_bit_mask_operation(esp_avrc_bit_mask_op_t op, esp_avrc_rn_evt_cap_mask_t *events,
+                                        esp_avrc_rn_event_ids_t event_id);
+
+/**
+ *
+ * @brief           Send RegisterNotification Response to remote AVRCP controller. Local event notification
+ *                  capability can be set using esp_avrc_tg_set_rn_evt_cap(), in a bit mask representation
+ *                  in evt_set. This function should be called after esp_avrc_tg_init().
+ *
+ * @param[in]       event_id: notification event ID that remote AVRCP CT registers
+ *
+ * @param[in]       rsp: notification response code
+ *
+ * @param[in]       param: parameters included in the specific notification
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not enabled or AVRC TG is not initialized
+ *                  - ESP_ERR_INVALID_ARG: if evt_set is NULL
+ *
+ */
+esp_err_t esp_avrc_tg_send_rn_rsp(esp_avrc_rn_event_ids_t event_id, esp_avrc_rn_rsp_t rsp,
+                                  esp_avrc_rn_param_t *param);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_AVRC_API_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_bt_defs.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_bt_defs.h
new file mode 100644
index 00000000000..1287404ce35
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_bt_defs.h
@@ -0,0 +1,144 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_BT_DEFS_H__
+#define __ESP_BT_DEFS_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_BLUEDROID_STATUS_CHECK(status)           \
+    if (esp_bluedroid_get_status() != (status)) {    \
+        return ESP_ERR_INVALID_STATE;                \
+    }
+
+
+/* relate to BT_STATUS_xxx in bt_def.h */
+/// Status Return Value
+typedef enum {
+    ESP_BT_STATUS_SUCCESS       = 0,            /* relate to BT_STATUS_SUCCESS in bt_def.h */
+    ESP_BT_STATUS_FAIL,                         /* relate to BT_STATUS_FAIL in bt_def.h */
+    ESP_BT_STATUS_NOT_READY,                    /* relate to BT_STATUS_NOT_READY in bt_def.h */
+    ESP_BT_STATUS_NOMEM,                        /* relate to BT_STATUS_NOMEM in bt_def.h */
+    ESP_BT_STATUS_BUSY,                         /* relate to BT_STATUS_BUSY in bt_def.h */
+    ESP_BT_STATUS_DONE          = 5,            /* relate to BT_STATUS_DONE in bt_def.h */
+    ESP_BT_STATUS_UNSUPPORTED,                  /* relate to BT_STATUS_UNSUPPORTED in bt_def.h */
+    ESP_BT_STATUS_PARM_INVALID,                 /* relate to BT_STATUS_PARM_INVALID in bt_def.h */
+    ESP_BT_STATUS_UNHANDLED,                    /* relate to BT_STATUS_UNHANDLED in bt_def.h */
+    ESP_BT_STATUS_AUTH_FAILURE,                 /* relate to BT_STATUS_AUTH_FAILURE in bt_def.h */
+    ESP_BT_STATUS_RMT_DEV_DOWN  = 10,           /* relate to BT_STATUS_RMT_DEV_DOWN in bt_def.h */
+    ESP_BT_STATUS_AUTH_REJECTED,                /* relate to BT_STATUS_AUTH_REJECTED in bt_def.h */
+    ESP_BT_STATUS_INVALID_STATIC_RAND_ADDR,     /* relate to BT_STATUS_INVALID_STATIC_RAND_ADDR in bt_def.h */
+    ESP_BT_STATUS_PENDING,                      /* relate to BT_STATUS_PENDING in bt_def.h */
+    ESP_BT_STATUS_UNACCEPT_CONN_INTERVAL,       /* relate to BT_UNACCEPT_CONN_INTERVAL in bt_def.h */
+    ESP_BT_STATUS_PARAM_OUT_OF_RANGE,           /* relate to BT_PARAM_OUT_OF_RANGE in bt_def.h */
+    ESP_BT_STATUS_TIMEOUT,                      /* relate to BT_STATUS_TIMEOUT in bt_def.h */
+    ESP_BT_STATUS_PEER_LE_DATA_LEN_UNSUPPORTED, /* relate to BTM_PEER_LE_DATA_LEN_UNSUPPORTED in stack/btm_api.h */
+    ESP_BT_STATUS_CONTROL_LE_DATA_LEN_UNSUPPORTED,/* relate to BTM_CONTROL_LE_DATA_LEN_UNSUPPORTED in stack/btm_api.h */
+    ESP_BT_STATUS_ERR_ILLEGAL_PARAMETER_FMT,    /* relate to HCI_ERR_ILLEGAL_PARAMETER_FMT in stack/hcidefs.h */
+    ESP_BT_STATUS_MEMORY_FULL   = 20,           /* relate to BT_STATUS_MEMORY_FULL in bt_def.h */
+    ESP_BT_STATUS_EIR_TOO_LARGE,                /* relate to BT_STATUS_EIR_TOO_LARGE in bt_def.h */
+} esp_bt_status_t;
+
+
+/*Define the bt octet 16 bit size*/
+#define ESP_BT_OCTET16_LEN    16
+typedef uint8_t esp_bt_octet16_t[ESP_BT_OCTET16_LEN];   /* octet array: size 16 */
+
+#define ESP_BT_OCTET8_LEN    8
+typedef uint8_t esp_bt_octet8_t[ESP_BT_OCTET8_LEN];   /* octet array: size 8 */
+
+typedef uint8_t esp_link_key[ESP_BT_OCTET16_LEN];      /* Link Key */
+
+/// Default GATT interface id
+#define ESP_DEFAULT_GATT_IF             0xff
+
+#define ESP_BLE_CONN_INT_MIN                0x0006       /*!< relate to BTM_BLE_CONN_INT_MIN in stack/btm_ble_api.h */
+#define ESP_BLE_CONN_INT_MAX                0x0C80       /*!< relate to BTM_BLE_CONN_INT_MAX in stack/btm_ble_api.h */
+#define ESP_BLE_CONN_LATENCY_MAX            499          /*!< relate to ESP_BLE_CONN_LATENCY_MAX in stack/btm_ble_api.h */
+#define ESP_BLE_CONN_SUP_TOUT_MIN           0x000A       /*!< relate to BTM_BLE_CONN_SUP_TOUT_MIN in stack/btm_ble_api.h */
+#define ESP_BLE_CONN_SUP_TOUT_MAX           0x0C80       /*!< relate to ESP_BLE_CONN_SUP_TOUT_MAX in stack/btm_ble_api.h */
+#define ESP_BLE_CONN_PARAM_UNDEF            0xffff       /* use this value when a specific value not to be overwritten */ /* relate to ESP_BLE_CONN_PARAM_UNDEF in stack/btm_ble_api.h */
+#define ESP_BLE_SCAN_PARAM_UNDEF            0xffffffff   /* relate to ESP_BLE_SCAN_PARAM_UNDEF in stack/btm_ble_api.h */
+
+/// Check the param is valid or not
+#define ESP_BLE_IS_VALID_PARAM(x, min, max)  (((x) >= (min) && (x) <= (max)) || ((x) == ESP_BLE_CONN_PARAM_UNDEF))
+
+/// UUID type
+typedef struct {
+#define ESP_UUID_LEN_16     2
+#define ESP_UUID_LEN_32     4
+#define ESP_UUID_LEN_128    16
+    uint16_t len;							/*!< UUID length, 16bit, 32bit or 128bit */
+    union {
+        uint16_t    uuid16;                 /*!< 16bit UUID */
+        uint32_t    uuid32;                 /*!< 32bit UUID */
+        uint8_t     uuid128[ESP_UUID_LEN_128]; /*!< 128bit UUID */
+    } uuid;									/*!< UUID */
+} __attribute__((packed)) esp_bt_uuid_t;
+
+/// Bluetooth device type
+typedef enum {
+    ESP_BT_DEVICE_TYPE_BREDR   = 0x01,
+    ESP_BT_DEVICE_TYPE_BLE     = 0x02,
+    ESP_BT_DEVICE_TYPE_DUMO    = 0x03,
+} esp_bt_dev_type_t;
+
+/// Bluetooth address length
+#define ESP_BD_ADDR_LEN     6
+
+/// Bluetooth device address
+typedef uint8_t esp_bd_addr_t[ESP_BD_ADDR_LEN];
+
+/// BLE device address type
+typedef enum {
+    BLE_ADDR_TYPE_PUBLIC        = 0x00,
+    BLE_ADDR_TYPE_RANDOM        = 0x01,
+    BLE_ADDR_TYPE_RPA_PUBLIC    = 0x02,
+    BLE_ADDR_TYPE_RPA_RANDOM    = 0x03,
+} esp_ble_addr_type_t;
+
+/// white list address type
+typedef enum {
+    BLE_WL_ADDR_TYPE_PUBLIC        = 0x00,
+    BLE_WL_ADDR_TYPE_RANDOM        = 0x01,
+} esp_ble_wl_addr_type_t;
+
+/// Used to exchange the encryption key in the init key & response key
+#define ESP_BLE_ENC_KEY_MASK    (1 << 0)            /* relate to BTM_BLE_ENC_KEY_MASK in stack/btm_api.h */
+/// Used to exchange the IRK key in the init key & response key
+#define ESP_BLE_ID_KEY_MASK     (1 << 1)            /* relate to BTM_BLE_ID_KEY_MASK in stack/btm_api.h */
+/// Used to exchange the CSRK key in the init key & response key
+#define ESP_BLE_CSR_KEY_MASK    (1 << 2)            /* relate to BTM_BLE_CSR_KEY_MASK in stack/btm_api.h */
+/// Used to exchange the link key(this key just used in the BLE & BR/EDR coexist mode) in the init key & response key
+#define ESP_BLE_LINK_KEY_MASK   (1 << 3)            /* relate to BTM_BLE_LINK_KEY_MASK in stack/btm_api.h */
+typedef uint8_t esp_ble_key_mask_t;            /* the key mask type */
+
+/// Minimum of the application id
+#define ESP_APP_ID_MIN  0x0000
+/// Maximum of the application id
+#define ESP_APP_ID_MAX  0x7fff
+
+#define ESP_BD_ADDR_STR         "%02x:%02x:%02x:%02x:%02x:%02x"
+#define ESP_BD_ADDR_HEX(addr)   addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif     /* __ESP_BT_DEFS_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_bt_device.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_bt_device.h
new file mode 100644
index 00000000000..3e2bb7944f7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_bt_device.h
@@ -0,0 +1,58 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_BT_DEVICE_H__
+#define __ESP_BT_DEVICE_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_bt_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *
+ * @brief      Get bluetooth device address.  Must use after "esp_bluedroid_enable".
+ *
+ * @return     bluetooth device address (six bytes), or NULL if bluetooth stack is not enabled
+ */
+const uint8_t *esp_bt_dev_get_address(void);
+
+
+/**
+ * @brief           Set bluetooth device name. This function should be called after esp_bluedroid_enable()
+ *                  completes successfully.
+ *
+ *                  A BR/EDR/LE device type shall have a single Bluetooth device name which shall be
+ *                  identical irrespective of the physical channel used to perform the name discovery procedure.
+ *
+ * @param[in]       name : device name to be set
+ *
+ * @return
+ *                  - ESP_OK : Succeed
+ *                  - ESP_ERR_INVALID_ARG : if name is NULL pointer or empty, or string length out of limit
+ *                  - ESP_ERR_INVALID_STATE : if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL : others
+ */
+esp_err_t esp_bt_dev_set_device_name(const char *name);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __ESP_BT_DEVICE_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_bt_main.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_bt_main.h
new file mode 100644
index 00000000000..9a5b7591457
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_bt_main.h
@@ -0,0 +1,81 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_BT_MAIN_H__
+#define __ESP_BT_MAIN_H__
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Bluetooth stack status type, to indicate whether the bluetooth stack is ready.
+ */
+typedef enum {
+    ESP_BLUEDROID_STATUS_UNINITIALIZED   = 0,        /*!< Bluetooth not initialized */
+    ESP_BLUEDROID_STATUS_INITIALIZED,                /*!< Bluetooth initialized but not enabled */
+    ESP_BLUEDROID_STATUS_ENABLED                     /*!< Bluetooth initialized and enabled */
+} esp_bluedroid_status_t;
+
+/**
+ * @brief     Get bluetooth stack status
+ *
+ * @return    Bluetooth stack status
+ *
+ */
+esp_bluedroid_status_t esp_bluedroid_get_status(void);
+
+/**
+ * @brief     Enable bluetooth, must after esp_bluedroid_init().
+ *
+ * @return
+ *            - ESP_OK : Succeed
+ *            - Other  : Failed
+ */
+esp_err_t esp_bluedroid_enable(void);
+
+/**
+ * @brief     Disable bluetooth, must prior to esp_bluedroid_deinit().
+ *
+ * @return
+ *            - ESP_OK : Succeed
+ *            - Other  : Failed
+ */
+esp_err_t esp_bluedroid_disable(void);
+
+/**
+ * @brief     Init and alloc the resource for bluetooth, must be prior to every bluetooth stuff.
+ *
+ * @return
+ *            - ESP_OK : Succeed
+ *            - Other  : Failed
+ */
+esp_err_t esp_bluedroid_init(void);
+
+/**
+ * @brief     Deinit and free the resource for bluetooth, must be after every bluetooth stuff.
+ *
+ * @return
+ *            - ESP_OK : Succeed
+ *            - Other  : Failed
+ */
+esp_err_t esp_bluedroid_deinit(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_BT_MAIN_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gap_ble_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gap_ble_api.h
new file mode 100644
index 00000000000..dd48ab982dd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gap_ble_api.h
@@ -0,0 +1,2154 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_GAP_BLE_API_H__
+#define __ESP_GAP_BLE_API_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_err.h"
+#include "esp_bt_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**@{
+ * BLE_ADV_DATA_FLAG data flag bit definition used for advertising data flag
+ */
+#define ESP_BLE_ADV_FLAG_LIMIT_DISC         (0x01 << 0)
+#define ESP_BLE_ADV_FLAG_GEN_DISC           (0x01 << 1)
+#define ESP_BLE_ADV_FLAG_BREDR_NOT_SPT      (0x01 << 2)
+#define ESP_BLE_ADV_FLAG_DMT_CONTROLLER_SPT (0x01 << 3)
+#define ESP_BLE_ADV_FLAG_DMT_HOST_SPT       (0x01 << 4)
+#define ESP_BLE_ADV_FLAG_NON_LIMIT_DISC     (0x00 )
+/**
+ * @}
+ */
+
+/* relate to BTM_LE_KEY_xxx in stack/btm_api.h */
+#define ESP_LE_KEY_NONE                    0                                                                         /* relate to BTM_LE_KEY_NONE in stack/btm_api.h */
+#define ESP_LE_KEY_PENC                    (1 << 0)   /*!< encryption key, encryption information of peer device */  /* relate to BTM_LE_KEY_PENC in stack/btm_api.h */
+#define ESP_LE_KEY_PID                     (1 << 1)   /*!< identity key of the peer device */                        /* relate to BTM_LE_KEY_PID in stack/btm_api.h */
+#define ESP_LE_KEY_PCSRK                   (1 << 2)   /*!< peer SRK */                                               /* relate to BTM_LE_KEY_PCSRK in stack/btm_api.h */
+#define ESP_LE_KEY_PLK                     (1 << 3)   /*!< Link key*/                                                /* relate to BTM_LE_KEY_PLK in stack/btm_api.h */
+#define ESP_LE_KEY_LLK                     (ESP_LE_KEY_PLK << 4)                                                     /* relate to BTM_LE_KEY_LLK in stack/btm_api.h */
+#define ESP_LE_KEY_LENC                    (ESP_LE_KEY_PENC << 4)   /*!< master role security information:div */     /* relate to BTM_LE_KEY_LENC in stack/btm_api.h */
+#define ESP_LE_KEY_LID                     (ESP_LE_KEY_PID << 4)    /*!< master device ID key */                     /* relate to BTM_LE_KEY_LID in stack/btm_api.h */
+#define ESP_LE_KEY_LCSRK                   (ESP_LE_KEY_PCSRK << 4)  /*!< local CSRK has been deliver to peer */      /* relate to BTM_LE_KEY_LCSRK in stack/btm_api.h */
+typedef uint8_t esp_ble_key_type_t;
+
+/* relate to BTM_LE_AUTH_xxx in stack/btm_api.h */
+#define ESP_LE_AUTH_NO_BOND                 0x00                                     /*!< 0*/                     /* relate to BTM_LE_AUTH_NO_BOND in stack/btm_api.h */
+#define ESP_LE_AUTH_BOND                    0x01                                     /*!< 1 << 0 */               /* relate to BTM_LE_AUTH_BOND in stack/btm_api.h */
+#define ESP_LE_AUTH_REQ_MITM                (1 << 2)                                 /*!< 1 << 2 */               /* relate to BTM_LE_AUTH_REQ_MITM in stack/btm_api.h */
+#define ESP_LE_AUTH_REQ_BOND_MITM           (ESP_LE_AUTH_BOND | ESP_LE_AUTH_REQ_MITM)/*!< 0101*/
+#define ESP_LE_AUTH_REQ_SC_ONLY             (1 << 3)                                 /*!< 1 << 3 */               /* relate to BTM_LE_AUTH_REQ_SC_ONLY in stack/btm_api.h */
+#define ESP_LE_AUTH_REQ_SC_BOND             (ESP_LE_AUTH_BOND | ESP_LE_AUTH_REQ_SC_ONLY)            /*!< 1001 */  /* relate to BTM_LE_AUTH_REQ_SC_BOND in stack/btm_api.h */
+#define ESP_LE_AUTH_REQ_SC_MITM             (ESP_LE_AUTH_REQ_MITM | ESP_LE_AUTH_REQ_SC_ONLY)        /*!< 1100 */  /* relate to BTM_LE_AUTH_REQ_SC_MITM in stack/btm_api.h */
+#define ESP_LE_AUTH_REQ_SC_MITM_BOND        (ESP_LE_AUTH_REQ_MITM | ESP_LE_AUTH_REQ_SC_ONLY | ESP_LE_AUTH_BOND)   /*!< 1101 */  /* relate to BTM_LE_AUTH_REQ_SC_MITM_BOND in stack/btm_api.h */
+typedef uint8_t   esp_ble_auth_req_t;         /*!< combination of the above bit pattern */
+
+#define ESP_BLE_ONLY_ACCEPT_SPECIFIED_AUTH_DISABLE 0
+#define ESP_BLE_ONLY_ACCEPT_SPECIFIED_AUTH_ENABLE  1
+
+#define ESP_BLE_OOB_DISABLE 0
+#define ESP_BLE_OOB_ENABLE  1
+
+/* relate to BTM_IO_CAP_xxx in stack/btm_api.h */
+#define ESP_IO_CAP_OUT                      0   /*!< DisplayOnly */         /* relate to BTM_IO_CAP_OUT in stack/btm_api.h */
+#define ESP_IO_CAP_IO                       1   /*!< DisplayYesNo */        /* relate to BTM_IO_CAP_IO in stack/btm_api.h */
+#define ESP_IO_CAP_IN                       2   /*!< KeyboardOnly */        /* relate to BTM_IO_CAP_IN in stack/btm_api.h */
+#define ESP_IO_CAP_NONE                     3   /*!< NoInputNoOutput */     /* relate to BTM_IO_CAP_NONE in stack/btm_api.h */
+#define ESP_IO_CAP_KBDISP                   4   /*!< Keyboard display */    /* relate to BTM_IO_CAP_KBDISP in stack/btm_api.h */
+
+#define ESP_BLE_APPEARANCE_UNKNOWN                 0x0000 /* relate to BTM_BLE_APPEARANCE_UNKNOWN in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_PHONE           0x0040 /* relate to BTM_BLE_APPEARANCE_GENERIC_PHONE in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_COMPUTER        0x0080 /* relate to BTM_BLE_APPEARANCE_GENERIC_COMPUTER in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_WATCH           0x00C0 /* relate to BTM_BLE_APPEARANCE_GENERIC_WATCH in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_SPORTS_WATCH            0x00C1 /* relate to BTM_BLE_APPEARANCE_SPORTS_WATCH in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_CLOCK           0x0100 /* relate to BTM_BLE_APPEARANCE_GENERIC_CLOCK in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_DISPLAY         0x0140 /* relate to BTM_BLE_APPEARANCE_GENERIC_DISPLAY in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_REMOTE          0x0180 /* relate to BTM_BLE_APPEARANCE_GENERIC_REMOTE in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_EYEGLASSES      0x01C0 /* relate to BTM_BLE_APPEARANCE_GENERIC_EYEGLASSES in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_TAG             0x0200 /* relate to BTM_BLE_APPEARANCE_GENERIC_TAG in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_KEYRING         0x0240 /* relate to BTM_BLE_APPEARANCE_GENERIC_KEYRING in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_MEDIA_PLAYER    0x0280 /* relate to BTM_BLE_APPEARANCE_GENERIC_MEDIA_PLAYER in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 0x02C0 /* relate to BTM_BLE_APPEARANCE_GENERIC_BARCODE_SCANNER in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_THERMOMETER     0x0300 /* relate to BTM_BLE_APPEARANCE_GENERIC_THERMOMETER in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_THERMOMETER_EAR         0x0301 /* relate to BTM_BLE_APPEARANCE_THERMOMETER_EAR in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_HEART_RATE      0x0340 /* relate to BTM_BLE_APPEARANCE_GENERIC_HEART_RATE in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_HEART_RATE_BELT         0x0341 /* relate to BTM_BLE_APPEARANCE_HEART_RATE_BELT in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE  0x0380 /* relate to BTM_BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_BLOOD_PRESSURE_ARM      0x0381 /* relate to BTM_BLE_APPEARANCE_BLOOD_PRESSURE_ARM in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_BLOOD_PRESSURE_WRIST    0x0382 /* relate to BTM_BLE_APPEARANCE_BLOOD_PRESSURE_WRIST in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_HID             0x03C0 /* relate to BTM_BLE_APPEARANCE_GENERIC_HID in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_HID_KEYBOARD            0x03C1 /* relate to BTM_BLE_APPEARANCE_HID_KEYBOARD in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_HID_MOUSE               0x03C2 /* relate to BTM_BLE_APPEARANCE_HID_MOUSE in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_HID_JOYSTICK            0x03C3 /* relate to BTM_BLE_APPEARANCE_HID_JOYSTICK in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_HID_GAMEPAD             0x03C4 /* relate to BTM_BLE_APPEARANCE_HID_GAMEPAD in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_HID_DIGITIZER_TABLET    0x03C5 /* relate to BTM_BLE_APPEARANCE_HID_DIGITIZER_TABLET in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_HID_CARD_READER         0x03C6 /* relate to BTM_BLE_APPEARANCE_HID_CARD_READER in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_HID_DIGITAL_PEN         0x03C7 /* relate to BTM_BLE_APPEARANCE_HID_DIGITAL_PEN in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_HID_BARCODE_SCANNER     0x03C8 /* relate to BTM_BLE_APPEARANCE_HID_BARCODE_SCANNER in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_GLUCOSE         0x0400 /* relate to BTM_BLE_APPEARANCE_GENERIC_GLUCOSE in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_WALKING         0x0440 /* relate to BTM_BLE_APPEARANCE_GENERIC_WALKING in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_WALKING_IN_SHOE         0x0441 /* relate to BTM_BLE_APPEARANCE_WALKING_IN_SHOE in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_WALKING_ON_SHOE         0x0442 /* relate to BTM_BLE_APPEARANCE_WALKING_ON_SHOE in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_WALKING_ON_HIP          0x0443 /* relate to BTM_BLE_APPEARANCE_WALKING_ON_HIP in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_CYCLING         0x0480 /* relate to BTM_BLE_APPEARANCE_GENERIC_CYCLING in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_CYCLING_COMPUTER        0x0481 /* relate to BTM_BLE_APPEARANCE_CYCLING_COMPUTER in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_CYCLING_SPEED           0x0482 /* relate to BTM_BLE_APPEARANCE_CYCLING_SPEED in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_CYCLING_CADENCE         0x0483 /* relate to BTM_BLE_APPEARANCE_CYCLING_CADENCE in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_CYCLING_POWER           0x0484 /* relate to BTM_BLE_APPEARANCE_CYCLING_POWER in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_CYCLING_SPEED_CADENCE   0x0485 /* relate to BTM_BLE_APPEARANCE_CYCLING_SPEED_CADENCE in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_PULSE_OXIMETER  0x0C40 /* relate to BTM_BLE_APPEARANCE_GENERIC_PULSE_OXIMETER in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 0x0C41 /* relate to BTM_BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_PULSE_OXIMETER_WRIST    0x0C42 /* relate to BTM_BLE_APPEARANCE_PULSE_OXIMETER_WRIST in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_WEIGHT          0x0C80 /* relate to BTM_BLE_APPEARANCE_GENERIC_WEIGHT in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_PERSONAL_MOBILITY_DEVICE    0x0CC0 /* relate to BTM_BLE_APPEARANCE_GENERIC_PERSONAL_MOBILITY_DEVICE in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_POWERED_WHEELCHAIR                  0x0CC1 /* relate to BTM_BLE_APPEARANCE_POWERED_WHEELCHAIR in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_MOBILITY_SCOOTER                    0x0CC2 /* relate to BTM_BLE_APPEARANCE_MOBILITY_SCOOTER in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_CONTINUOUS_GLUCOSE_MONITOR  0x0D00 /* relate to BTM_BLE_APPEARANCE_GENERIC_CONTINUOUS_GLUCOSE_MONITOR in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_INSULIN_PUMP                0x0D40 /* relate to BTM_BLE_APPEARANCE_GENERIC_INSULIN_PUMP in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_INSULIN_PUMP_DURABLE_PUMP           0x0D41 /* relate to BTM_BLE_APPEARANCE_INSULIN_PUMP_DURABLE_PUMP in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_INSULIN_PUMP_PATCH_PUMP             0x0D44 /* relate to BTM_BLE_APPEARANCE_INSULIN_PUMP_PATCH_PUMP in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_INSULIN_PEN                         0x0D48 /* relate to BTM_BLE_APPEARANCE_INSULIN_PEN in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_MEDICATION_DELIVERY         0x0D80 /* relate to BTM_BLE_APPEARANCE_GENERIC_MEDICATION_DELIVERY in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS  0x1440             /* relate to BTM_BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION 0x1441             /* relate to BTM_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION_AND_NAV     0x1442 /* relate to BTM_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION_AND_NAV in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION_POD         0x1443 /* relate to BTM_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION_POD in stack/btm_ble_api.h */
+#define ESP_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION_POD_AND_NAV 0x1444 /* relate to BTM_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION_POD_AND_NAV in stack/btm_ble_api.h */
+
+typedef uint8_t esp_ble_io_cap_t;               /*!< combination of the io capability */
+
+/// GAP BLE callback event type
+typedef enum {
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+    ESP_GAP_BLE_ADV_DATA_SET_COMPLETE_EVT        = 0,       /*!< When advertising data set complete, the event comes */
+    ESP_GAP_BLE_SCAN_RSP_DATA_SET_COMPLETE_EVT,             /*!< When scan response data set complete, the event comes */
+    ESP_GAP_BLE_SCAN_PARAM_SET_COMPLETE_EVT,                /*!< When scan parameters set complete, the event comes */
+    ESP_GAP_BLE_SCAN_RESULT_EVT,                            /*!< When one scan result ready, the event comes each time */
+    ESP_GAP_BLE_ADV_DATA_RAW_SET_COMPLETE_EVT,              /*!< When raw advertising data set complete, the event comes */
+    ESP_GAP_BLE_SCAN_RSP_DATA_RAW_SET_COMPLETE_EVT,         /*!< When raw advertising data set complete, the event comes */
+    ESP_GAP_BLE_ADV_START_COMPLETE_EVT,                     /*!< When start advertising complete, the event comes */
+    ESP_GAP_BLE_SCAN_START_COMPLETE_EVT,                    /*!< When start scan complete, the event comes */
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+    ESP_GAP_BLE_AUTH_CMPL_EVT = 8,                          /* Authentication complete indication. */
+    ESP_GAP_BLE_KEY_EVT,                                    /* BLE  key event for peer device keys */
+    ESP_GAP_BLE_SEC_REQ_EVT,                                /* BLE  security request */
+    ESP_GAP_BLE_PASSKEY_NOTIF_EVT,                          /* passkey notification event */
+    ESP_GAP_BLE_PASSKEY_REQ_EVT,                            /* passkey request event */
+    ESP_GAP_BLE_OOB_REQ_EVT,                                /* OOB request event */
+    ESP_GAP_BLE_LOCAL_IR_EVT,                               /* BLE local IR event */
+    ESP_GAP_BLE_LOCAL_ER_EVT,                               /* BLE local ER event */
+    ESP_GAP_BLE_NC_REQ_EVT,                                 /* Numeric Comparison request event */
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+    ESP_GAP_BLE_ADV_STOP_COMPLETE_EVT,                      /*!< When stop adv complete, the event comes */
+    ESP_GAP_BLE_SCAN_STOP_COMPLETE_EVT,                     /*!< When stop scan complete, the event comes */
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+    ESP_GAP_BLE_SET_STATIC_RAND_ADDR_EVT = 19,              /*!< When set the static rand address complete, the event comes */
+    ESP_GAP_BLE_UPDATE_CONN_PARAMS_EVT,                     /*!< When update connection parameters complete, the event comes */
+    ESP_GAP_BLE_SET_PKT_LENGTH_COMPLETE_EVT,                /*!< When set pkt length complete, the event comes */
+    ESP_GAP_BLE_SET_LOCAL_PRIVACY_COMPLETE_EVT,             /*!< When  Enable/disable privacy on the local device complete, the event comes */
+    ESP_GAP_BLE_REMOVE_BOND_DEV_COMPLETE_EVT,               /*!< When remove the bond device complete, the event comes */
+    ESP_GAP_BLE_CLEAR_BOND_DEV_COMPLETE_EVT,                /*!< When clear the bond device clear complete, the event comes */
+    ESP_GAP_BLE_GET_BOND_DEV_COMPLETE_EVT,                  /*!< When get the bond device list complete, the event comes */
+    ESP_GAP_BLE_READ_RSSI_COMPLETE_EVT,                     /*!< When read the rssi complete, the event comes */
+    ESP_GAP_BLE_UPDATE_WHITELIST_COMPLETE_EVT,              /*!< When add or remove whitelist complete, the event comes */
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+    ESP_GAP_BLE_UPDATE_DUPLICATE_EXCEPTIONAL_LIST_COMPLETE_EVT,  /*!< When update duplicate exceptional list complete, the event comes */
+#endif //#if (BLE_42_FEATURE_SUPPORT == TRUE)
+    ESP_GAP_BLE_SET_CHANNELS_EVT = 29,                           /*!< When setting BLE channels complete, the event comes */
+#if (BLE_50_FEATURE_SUPPORT == TRUE)
+    ESP_GAP_BLE_READ_PHY_COMPLETE_EVT,
+    ESP_GAP_BLE_SET_PREFERED_DEFAULT_PHY_COMPLETE_EVT,
+    ESP_GAP_BLE_SET_PREFERED_PHY_COMPLETE_EVT,
+    ESP_GAP_BLE_EXT_ADV_SET_RAND_ADDR_COMPLETE_EVT,
+    ESP_GAP_BLE_EXT_ADV_SET_PARAMS_COMPLETE_EVT,
+    ESP_GAP_BLE_EXT_ADV_DATA_SET_COMPLETE_EVT,
+    ESP_GAP_BLE_EXT_SCAN_RSP_DATA_SET_COMPLETE_EVT,
+    ESP_GAP_BLE_EXT_ADV_START_COMPLETE_EVT,
+    ESP_GAP_BLE_EXT_ADV_STOP_COMPLETE_EVT,
+    ESP_GAP_BLE_EXT_ADV_SET_REMOVE_COMPLETE_EVT,
+    ESP_GAP_BLE_EXT_ADV_SET_CLEAR_COMPLETE_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_SET_PARAMS_COMPLETE_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_DATA_SET_COMPLETE_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_START_COMPLETE_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_STOP_COMPLETE_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_CREATE_SYNC_COMPLETE_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_SYNC_CANCEL_COMPLETE_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_SYNC_TERMINATE_COMPLETE_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_ADD_DEV_COMPLETE_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_REMOVE_DEV_COMPLETE_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_CLEAR_DEV_COMPLETE_EVT,
+    ESP_GAP_BLE_SET_EXT_SCAN_PARAMS_COMPLETE_EVT,
+    ESP_GAP_BLE_EXT_SCAN_START_COMPLETE_EVT,
+    ESP_GAP_BLE_EXT_SCAN_STOP_COMPLETE_EVT,
+    ESP_GAP_BLE_PREFER_EXT_CONN_PARAMS_SET_COMPLETE_EVT,
+    ESP_GAP_BLE_PHY_UPDATE_COMPLETE_EVT,
+    ESP_GAP_BLE_EXT_ADV_REPORT_EVT,
+    ESP_GAP_BLE_SCAN_TIMEOUT_EVT,
+    ESP_GAP_BLE_ADV_TERMINATED_EVT,
+    ESP_GAP_BLE_SCAN_REQ_RECEIVED_EVT,
+    ESP_GAP_BLE_CHANNEL_SELETE_ALGORITHM_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_REPORT_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_SYNC_LOST_EVT,
+    ESP_GAP_BLE_PERIODIC_ADV_SYNC_ESTAB_EVT,
+#endif // #if (BLE_50_FEATURE_SUPPORT == TRUE)
+    ESP_GAP_BLE_EVT_MAX,
+} esp_gap_ble_cb_event_t;
+
+#define ESP_GAP_BLE_CHANNELS_LEN     5
+typedef uint8_t esp_gap_ble_channels[ESP_GAP_BLE_CHANNELS_LEN];
+
+/// This is the old name, just for backwards compatibility
+#define ESP_GAP_BLE_ADD_WHITELIST_COMPLETE_EVT ESP_GAP_BLE_UPDATE_WHITELIST_COMPLETE_EVT
+
+/// Advertising data maximum length
+#define ESP_BLE_ADV_DATA_LEN_MAX               31
+/// Scan response data maximum length
+#define ESP_BLE_SCAN_RSP_DATA_LEN_MAX          31
+
+/* relate to BTM_BLE_AD_TYPE_xxx in stack/btm_ble_api.h */
+/// The type of advertising data(not adv_type)
+typedef enum {
+    ESP_BLE_AD_TYPE_FLAG                     = 0x01,    /* relate to BTM_BLE_AD_TYPE_FLAG in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_16SRV_PART               = 0x02,    /* relate to BTM_BLE_AD_TYPE_16SRV_PART in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_16SRV_CMPL               = 0x03,    /* relate to BTM_BLE_AD_TYPE_16SRV_CMPL in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_32SRV_PART               = 0x04,    /* relate to BTM_BLE_AD_TYPE_32SRV_PART in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_32SRV_CMPL               = 0x05,    /* relate to BTM_BLE_AD_TYPE_32SRV_CMPL in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_128SRV_PART              = 0x06,    /* relate to BTM_BLE_AD_TYPE_128SRV_PART in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_128SRV_CMPL              = 0x07,    /* relate to BTM_BLE_AD_TYPE_128SRV_CMPL in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_NAME_SHORT               = 0x08,    /* relate to BTM_BLE_AD_TYPE_NAME_SHORT in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_NAME_CMPL                = 0x09,    /* relate to BTM_BLE_AD_TYPE_NAME_CMPL in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_TX_PWR                   = 0x0A,    /* relate to BTM_BLE_AD_TYPE_TX_PWR in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_DEV_CLASS                = 0x0D,    /* relate to BTM_BLE_AD_TYPE_DEV_CLASS in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_SM_TK                    = 0x10,    /* relate to BTM_BLE_AD_TYPE_SM_TK in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_SM_OOB_FLAG              = 0x11,    /* relate to BTM_BLE_AD_TYPE_SM_OOB_FLAG in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_INT_RANGE                = 0x12,    /* relate to BTM_BLE_AD_TYPE_INT_RANGE in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_SOL_SRV_UUID             = 0x14,    /* relate to BTM_BLE_AD_TYPE_SOL_SRV_UUID in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_128SOL_SRV_UUID          = 0x15,    /* relate to BTM_BLE_AD_TYPE_128SOL_SRV_UUID in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_SERVICE_DATA             = 0x16,    /* relate to BTM_BLE_AD_TYPE_SERVICE_DATA in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_PUBLIC_TARGET            = 0x17,    /* relate to BTM_BLE_AD_TYPE_PUBLIC_TARGET in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_RANDOM_TARGET            = 0x18,    /* relate to BTM_BLE_AD_TYPE_RANDOM_TARGET in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_APPEARANCE               = 0x19,    /* relate to BTM_BLE_AD_TYPE_APPEARANCE in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_ADV_INT                  = 0x1A,    /* relate to BTM_BLE_AD_TYPE_ADV_INT in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_LE_DEV_ADDR              = 0x1b,    /* relate to BTM_BLE_AD_TYPE_LE_DEV_ADDR in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_LE_ROLE                  = 0x1c,    /* relate to BTM_BLE_AD_TYPE_LE_ROLE in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_SPAIR_C256               = 0x1d,    /* relate to BTM_BLE_AD_TYPE_SPAIR_C256 in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_SPAIR_R256               = 0x1e,    /* relate to BTM_BLE_AD_TYPE_SPAIR_R256 in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_32SOL_SRV_UUID           = 0x1f,    /* relate to BTM_BLE_AD_TYPE_32SOL_SRV_UUID in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_32SERVICE_DATA           = 0x20,    /* relate to BTM_BLE_AD_TYPE_32SERVICE_DATA in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_128SERVICE_DATA          = 0x21,    /* relate to BTM_BLE_AD_TYPE_128SERVICE_DATA in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_LE_SECURE_CONFIRM        = 0x22,    /* relate to BTM_BLE_AD_TYPE_LE_SECURE_CONFIRM in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_LE_SECURE_RANDOM         = 0x23,    /* relate to BTM_BLE_AD_TYPE_LE_SECURE_RANDOM in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_URI                      = 0x24,    /* relate to BTM_BLE_AD_TYPE_URI in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_INDOOR_POSITION          = 0x25,    /* relate to BTM_BLE_AD_TYPE_INDOOR_POSITION in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_TRANS_DISC_DATA          = 0x26,    /* relate to BTM_BLE_AD_TYPE_TRANS_DISC_DATA in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_LE_SUPPORT_FEATURE       = 0x27,    /* relate to BTM_BLE_AD_TYPE_LE_SUPPORT_FEATURE in stack/btm_ble_api.h */
+    ESP_BLE_AD_TYPE_CHAN_MAP_UPDATE          = 0x28,    /* relate to BTM_BLE_AD_TYPE_CHAN_MAP_UPDATE in stack/btm_ble_api.h */
+    ESP_BLE_AD_MANUFACTURER_SPECIFIC_TYPE    = 0xFF,    /* relate to BTM_BLE_AD_MANUFACTURER_SPECIFIC_TYPE in stack/btm_ble_api.h */
+} esp_ble_adv_data_type;
+
+/// Advertising mode
+typedef enum {
+    ADV_TYPE_IND                = 0x00,
+    ADV_TYPE_DIRECT_IND_HIGH    = 0x01,
+    ADV_TYPE_SCAN_IND           = 0x02,
+    ADV_TYPE_NONCONN_IND        = 0x03,
+    ADV_TYPE_DIRECT_IND_LOW     = 0x04,
+} esp_ble_adv_type_t;
+
+/// Advertising channel mask
+typedef enum {
+    ADV_CHNL_37     = 0x01,
+    ADV_CHNL_38     = 0x02,
+    ADV_CHNL_39     = 0x04,
+    ADV_CHNL_ALL    = 0x07,
+} esp_ble_adv_channel_t;
+
+typedef enum {
+    ///Allow both scan and connection requests from anyone
+    ADV_FILTER_ALLOW_SCAN_ANY_CON_ANY  = 0x00,
+    ///Allow both scan req from White List devices only and connection req from anyone
+    ADV_FILTER_ALLOW_SCAN_WLST_CON_ANY,
+    ///Allow both scan req from anyone and connection req from White List devices only
+    ADV_FILTER_ALLOW_SCAN_ANY_CON_WLST,
+    ///Allow scan and connection requests from White List devices only
+    ADV_FILTER_ALLOW_SCAN_WLST_CON_WLST,
+    ///Enumeration end value for advertising filter policy value check
+} esp_ble_adv_filter_t;
+
+
+/* relate to BTA_DM_BLE_SEC_xxx in bta/bta_api.h */
+typedef enum {
+    ESP_BLE_SEC_ENCRYPT = 1,            /* relate to BTA_DM_BLE_SEC_ENCRYPT in bta/bta_api.h. If the device has already
+                                           bonded, the stack will used LTK to encrypt with the remote device directly.
+                                           Else if the device hasn't bonded, the stack will used the default authentication request
+                                           used the esp_ble_gap_set_security_param function set by the user. */
+    ESP_BLE_SEC_ENCRYPT_NO_MITM,        /* relate to BTA_DM_BLE_SEC_ENCRYPT_NO_MITM in bta/bta_api.h. If the device has already
+                                           bonded, the stack will check the LTK Whether the authentication request has been met, if met, used the LTK
+                                           to encrypt with the remote device directly, else Re-pair with the remote device.
+                                           Else if the device hasn't bonded, the stack will used NO MITM authentication request in the current link instead of
+                                           used the authreq in the esp_ble_gap_set_security_param function set by the user. */
+    ESP_BLE_SEC_ENCRYPT_MITM,           /* relate to BTA_DM_BLE_SEC_ENCRYPT_MITM in bta/bta_api.h. If the device has already
+                                           bonded, the stack will check the LTK Whether the authentication request has been met, if met, used the LTK
+                                           to encrypt with the remote device directly, else Re-pair with the remote device.
+                                           Else if the device hasn't bonded, the stack will used MITM authentication request in the current link instead of
+                                           used the authreq in the esp_ble_gap_set_security_param function set by the user. */
+}esp_ble_sec_act_t;
+
+typedef enum {
+    ESP_BLE_SM_PASSKEY = 0,
+    /* Authentication requirements of local device */
+    ESP_BLE_SM_AUTHEN_REQ_MODE,
+    /* The IO capability of local device */
+    ESP_BLE_SM_IOCAP_MODE,
+    /* Initiator Key Distribution/Generation */
+    ESP_BLE_SM_SET_INIT_KEY,
+    /* Responder Key Distribution/Generation */
+    ESP_BLE_SM_SET_RSP_KEY,
+    /* Maximum Encryption key size to support */
+    ESP_BLE_SM_MAX_KEY_SIZE,
+    /* Minimum Encryption key size requirement from Peer */
+    ESP_BLE_SM_MIN_KEY_SIZE,
+    /* Set static Passkey */
+    ESP_BLE_SM_SET_STATIC_PASSKEY,
+    /* Reset static Passkey */
+    ESP_BLE_SM_CLEAR_STATIC_PASSKEY,
+    /* Accept only specified SMP Authentication requirement */
+    ESP_BLE_SM_ONLY_ACCEPT_SPECIFIED_SEC_AUTH,
+    /* Enable/Disable OOB support */
+    ESP_BLE_SM_OOB_SUPPORT,
+    /* Appl encryption key size */
+    ESP_BLE_APP_ENC_KEY_SIZE,
+    ESP_BLE_SM_MAX_PARAM,
+} esp_ble_sm_param_t;
+
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+/// Advertising parameters
+typedef struct {
+    uint16_t                adv_int_min;        /*!< Minimum advertising interval for
+                                                  undirected and low duty cycle directed advertising.
+                                                  Range: 0x0020 to 0x4000 Default: N = 0x0800 (1.28 second)
+                                                  Time = N * 0.625 msec Time Range: 20 ms to 10.24 sec */
+    uint16_t                adv_int_max;        /*!< Maximum advertising interval for
+                                                  undirected and low duty cycle directed advertising.
+                                                  Range: 0x0020 to 0x4000 Default: N = 0x0800 (1.28 second)
+                                                  Time = N * 0.625 msec Time Range: 20 ms to 10.24 sec Advertising max interval */
+    esp_ble_adv_type_t      adv_type;           /*!< Advertising type */
+    esp_ble_addr_type_t     own_addr_type;      /*!< Owner bluetooth device address type */
+    esp_bd_addr_t           peer_addr;          /*!< Peer device bluetooth device address */
+    esp_ble_addr_type_t     peer_addr_type;     /*!< Peer device bluetooth device address type, only support public address type and random address type */
+    esp_ble_adv_channel_t   channel_map;        /*!< Advertising channel map */
+    esp_ble_adv_filter_t    adv_filter_policy;  /*!< Advertising filter policy */
+} esp_ble_adv_params_t;
+
+/// Advertising data content, according to "Supplement to the Bluetooth Core Specification"
+typedef struct {
+    bool                    set_scan_rsp;           /*!< Set this advertising data as scan response or not*/
+    bool                    include_name;           /*!< Advertising data include device name or not */
+    bool                    include_txpower;        /*!< Advertising data include TX power */
+    int                     min_interval;           /*!< Advertising data show slave preferred connection min interval.
+                                                    The connection interval in the following manner:
+                                                    connIntervalmin = Conn_Interval_Min * 1.25 ms
+                                                    Conn_Interval_Min range: 0x0006 to 0x0C80
+                                                    Value of 0xFFFF indicates no specific minimum.
+                                                    Values not defined above are reserved for future use.*/
+
+    int                     max_interval;           /*!< Advertising data show slave preferred connection max interval.
+                                                    The connection interval in the following manner:
+                                                    connIntervalmax = Conn_Interval_Max * 1.25 ms
+                                                    Conn_Interval_Max range: 0x0006 to 0x0C80
+                                                    Conn_Interval_Max shall be equal to or greater than the Conn_Interval_Min.
+                                                    Value of 0xFFFF indicates no specific maximum.
+                                                    Values not defined above are reserved for future use.*/
+
+    int                     appearance;             /*!< External appearance of device */
+    uint16_t                manufacturer_len;       /*!< Manufacturer data length */
+    uint8_t                 *p_manufacturer_data;   /*!< Manufacturer data point */
+    uint16_t                service_data_len;       /*!< Service data length */
+    uint8_t                 *p_service_data;        /*!< Service data point */
+    uint16_t                service_uuid_len;       /*!< Service uuid length */
+    uint8_t                 *p_service_uuid;        /*!< Service uuid array point */
+    uint8_t                 flag;                   /*!< Advertising flag of discovery mode, see BLE_ADV_DATA_FLAG detail */
+} esp_ble_adv_data_t;
+
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+
+/// Ble scan type
+typedef enum {
+    BLE_SCAN_TYPE_PASSIVE   =   0x0,            /*!< Passive scan */
+    BLE_SCAN_TYPE_ACTIVE    =   0x1,            /*!< Active scan */
+} esp_ble_scan_type_t;
+
+/// Ble scan filter type
+typedef enum {
+    BLE_SCAN_FILTER_ALLOW_ALL           = 0x0,  /*!< Accept all :
+                                                  1. advertisement packets except directed advertising packets not addressed to this device (default). */
+    BLE_SCAN_FILTER_ALLOW_ONLY_WLST     = 0x1,  /*!< Accept only :
+                                                  1. advertisement packets from devices where the advertiser’s address is in the White list.
+                                                  2. Directed advertising packets which are not addressed for this device shall be ignored. */
+    BLE_SCAN_FILTER_ALLOW_UND_RPA_DIR   = 0x2,  /*!< Accept all :
+                                                  1. undirected advertisement packets, and
+                                                  2. directed advertising packets where the initiator address is a resolvable private address, and
+                                                  3. directed advertising packets addressed to this device. */
+    BLE_SCAN_FILTER_ALLOW_WLIST_RPA_DIR = 0x3,  /*!< Accept all :
+                                                  1. advertisement packets from devices where the advertiser’s address is in the White list, and
+                                                  2. directed advertising packets where the initiator address is a resolvable private address, and
+                                                  3. directed advertising packets addressed to this device.*/
+} esp_ble_scan_filter_t;
+
+/// Ble scan duplicate type
+typedef enum {
+    BLE_SCAN_DUPLICATE_DISABLE           = 0x0,  /*!< the Link Layer should generate advertising reports to the host for each packet received */
+    BLE_SCAN_DUPLICATE_ENABLE            = 0x1,  /*!< the Link Layer should filter out duplicate advertising reports to the Host */
+    BLE_SCAN_DUPLICATE_MAX               = 0x2,  /*!< 0x02 – 0xFF, Reserved for future use */
+} esp_ble_scan_duplicate_t;
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+/// Ble scan parameters
+typedef struct {
+    esp_ble_scan_type_t     scan_type;              /*!< Scan type */
+    esp_ble_addr_type_t     own_addr_type;          /*!< Owner address type */
+    esp_ble_scan_filter_t   scan_filter_policy;     /*!< Scan filter policy */
+    uint16_t                scan_interval;          /*!< Scan interval. This is defined as the time interval from
+                                                      when the Controller started its last LE scan until it begins the subsequent LE scan.
+                                                      Range: 0x0004 to 0x4000 Default: 0x0010 (10 ms)
+                                                      Time = N * 0.625 msec
+                                                      Time Range: 2.5 msec to 10.24 seconds*/
+    uint16_t                scan_window;            /*!< Scan window. The duration of the LE scan. LE_Scan_Window
+                                                      shall be less than or equal to LE_Scan_Interval
+                                                      Range: 0x0004 to 0x4000 Default: 0x0010 (10 ms)
+                                                      Time = N * 0.625 msec
+                                                      Time Range: 2.5 msec to 10240 msec */
+    esp_ble_scan_duplicate_t  scan_duplicate;       /*!< The Scan_Duplicates parameter controls whether the Link Layer should filter out
+                                                        duplicate advertising reports (BLE_SCAN_DUPLICATE_ENABLE) to the Host, or if the Link Layer should generate
+                                                        advertising reports for each packet received */
+} esp_ble_scan_params_t;
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+/// connection parameters information
+typedef struct {
+    uint16_t             interval;                  /*!< connection interval */
+    uint16_t             latency;                   /*!< Slave latency for the connection in number of connection events. Range: 0x0000 to 0x01F3 */
+    uint16_t             timeout;                   /*!< Supervision timeout for the LE Link. Range: 0x000A to 0x0C80.
+                                                      Mandatory Range: 0x000A to 0x0C80 Time = N * 10 msec
+                                                      Time Range: 100 msec to 32 seconds */
+} esp_gap_conn_params_t;
+
+/// Connection update parameters
+typedef struct {
+    esp_bd_addr_t bda;                              /*!< Bluetooth device address */
+    uint16_t min_int;                               /*!< Min connection interval */
+    uint16_t max_int;                               /*!< Max connection interval */
+    uint16_t latency;                               /*!< Slave latency for the connection in number of connection events. Range: 0x0000 to 0x01F3 */
+    uint16_t timeout;                               /*!< Supervision timeout for the LE Link. Range: 0x000A to 0x0C80.
+                                                      Mandatory Range: 0x000A to 0x0C80 Time = N * 10 msec
+                                                      Time Range: 100 msec to 32 seconds */
+} esp_ble_conn_update_params_t;
+
+/**
+* @brief BLE pkt date length keys
+*/
+typedef struct
+{
+    uint16_t rx_len;                   /*!< pkt rx data length value */
+    uint16_t tx_len;                   /*!< pkt tx data length value */
+} esp_ble_pkt_data_length_params_t;
+
+/**
+* @brief BLE encryption keys
+*/
+typedef struct
+{
+    esp_bt_octet16_t     ltk;          /*!< The long term key*/
+    esp_bt_octet8_t      rand;         /*!< The random number*/
+    uint16_t             ediv;         /*!< The ediv value*/
+    uint8_t              sec_level;    /*!< The security level of the security link*/
+    uint8_t              key_size;     /*!< The key size(7~16) of the security link*/
+} esp_ble_penc_keys_t;                 /*!< The key type*/
+
+/**
+* @brief  BLE CSRK keys
+*/
+typedef struct
+{
+    uint32_t            counter;      /*!< The counter */
+    esp_bt_octet16_t    csrk;         /*!< The csrk key */
+    uint8_t             sec_level;    /*!< The security level */
+} esp_ble_pcsrk_keys_t;               /*!< The pcsrk key type */
+
+/**
+* @brief  BLE pid keys
+*/
+typedef struct
+{
+    esp_bt_octet16_t          irk;           /*!< The irk value */
+    esp_ble_addr_type_t       addr_type;     /*!< The address type */
+    esp_bd_addr_t             static_addr;   /*!< The static address */
+} esp_ble_pid_keys_t;                        /*!< The pid key type */
+
+/**
+* @brief  BLE Encryption reproduction keys
+*/
+typedef struct
+{
+    esp_bt_octet16_t  ltk;                  /*!< The long term key */
+    uint16_t          div;                  /*!< The div value */
+    uint8_t           key_size;             /*!< The key size of the security link */
+    uint8_t           sec_level;            /*!< The security level of the security link */
+} esp_ble_lenc_keys_t;                      /*!< The  key type */
+
+/**
+* @brief  BLE SRK keys
+*/
+typedef struct
+{
+    uint32_t          counter;              /*!< The counter value */
+    uint16_t          div;                  /*!< The div value */
+    uint8_t           sec_level;            /*!< The security level of the security link */
+    esp_bt_octet16_t  csrk;                 /*!< The csrk key value */
+} esp_ble_lcsrk_keys;                       /*!< The csrk key type */
+
+/**
+* @brief  Structure associated with ESP_KEY_NOTIF_EVT
+*/
+typedef struct
+{
+    esp_bd_addr_t  bd_addr;        /*!< peer address */
+    uint32_t       passkey;        /*!< the numeric value for comparison. If just_works, do not show this number to UI */
+} esp_ble_sec_key_notif_t;         /*!< BLE key notify type*/
+
+/**
+* @brief  Structure of the security request
+*/
+typedef struct
+{
+    esp_bd_addr_t  bd_addr;        /*!< peer address */
+} esp_ble_sec_req_t;               /*!< BLE security request type*/
+
+/**
+* @brief  union type of the security key value
+*/
+typedef union
+{
+    esp_ble_penc_keys_t   penc_key;       /*!< received peer encryption key */
+    esp_ble_pcsrk_keys_t  pcsrk_key;      /*!< received peer device SRK */
+    esp_ble_pid_keys_t    pid_key;        /*!< peer device ID key */
+    esp_ble_lenc_keys_t   lenc_key;       /*!< local encryption reproduction keys LTK = = d1(ER,DIV,0)*/
+    esp_ble_lcsrk_keys    lcsrk_key;      /*!< local device CSRK = d1(ER,DIV,1)*/
+} esp_ble_key_value_t;                    /*!< ble key value type*/
+
+/**
+* @brief  struct type of the bond key information value
+*/
+typedef struct
+{
+    esp_ble_key_mask_t    key_mask;       /*!< the key mask to indicate witch key is present */
+    esp_ble_penc_keys_t   penc_key;       /*!< received peer encryption key */
+    esp_ble_pcsrk_keys_t  pcsrk_key;      /*!< received peer device SRK */
+    esp_ble_pid_keys_t    pid_key;        /*!< peer device ID key */
+} esp_ble_bond_key_info_t;                /*!< ble bond key information value type */
+
+/**
+* @brief  struct type of the bond device value
+*/
+typedef struct
+{
+    esp_bd_addr_t  bd_addr;               /*!< peer address */
+    esp_ble_bond_key_info_t bond_key;     /*!< the bond key information */
+} esp_ble_bond_dev_t;                     /*!< the ble bond device type */
+
+
+/**
+* @brief  union type of the security key value
+*/
+typedef struct
+{
+    esp_bd_addr_t               bd_addr;        /*!< peer address */
+    esp_ble_key_type_t          key_type;       /*!< key type of the security link */
+    esp_ble_key_value_t         p_key_value;    /*!< the pointer to the key value */
+} esp_ble_key_t;                                /*!< the union to the ble key value type*/
+
+/**
+* @brief  structure type of the ble local id keys value
+*/
+typedef struct {
+    esp_bt_octet16_t       ir;                  /*!< the 16 bits of the ir value */
+    esp_bt_octet16_t       irk;                 /*!< the 16 bits of the ir key value */
+    esp_bt_octet16_t       dhk;                 /*!< the 16 bits of the dh key value */
+} esp_ble_local_id_keys_t;                      /*!< the structure of the ble local id keys value type*/
+
+
+/**
+  * @brief Structure associated with ESP_AUTH_CMPL_EVT
+  */
+typedef struct
+{
+    esp_bd_addr_t         bd_addr;               /*!< BD address peer device. */
+    bool                  key_present;           /*!< Valid link key value in key element */
+    esp_link_key          key;                   /*!< Link key associated with peer device. */
+    uint8_t               key_type;              /*!< The type of Link Key */
+    bool                  success;               /*!< TRUE of authentication succeeded, FALSE if failed. */
+    uint8_t               fail_reason;           /*!< The HCI reason/error code for when success=FALSE */
+    esp_ble_addr_type_t   addr_type;             /*!< Peer device address type */
+    esp_bt_dev_type_t     dev_type;              /*!< Device type */
+    esp_ble_auth_req_t    auth_mode;             /*!< authentication mode */
+} esp_ble_auth_cmpl_t;                           /*!< The ble authentication complete cb type */
+
+/**
+  * @brief union associated with ble security
+  */
+typedef union
+{
+    esp_ble_sec_key_notif_t    key_notif;      /*!< passkey notification */
+    esp_ble_sec_req_t          ble_req;        /*!< BLE SMP related request */
+    esp_ble_key_t              ble_key;        /*!< BLE SMP keys used when pairing */
+    esp_ble_local_id_keys_t    ble_id_keys;    /*!< BLE IR event */
+    esp_ble_auth_cmpl_t        auth_cmpl;      /*!< Authentication complete indication. */
+} esp_ble_sec_t;                               /*!< BLE security type */
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+/// Sub Event of ESP_GAP_BLE_SCAN_RESULT_EVT
+typedef enum {
+    ESP_GAP_SEARCH_INQ_RES_EVT             = 0,      /*!< Inquiry result for a peer device. */
+    ESP_GAP_SEARCH_INQ_CMPL_EVT            = 1,      /*!< Inquiry complete. */
+    ESP_GAP_SEARCH_DISC_RES_EVT            = 2,      /*!< Discovery result for a peer device. */
+    ESP_GAP_SEARCH_DISC_BLE_RES_EVT        = 3,      /*!< Discovery result for BLE GATT based service on a peer device. */
+    ESP_GAP_SEARCH_DISC_CMPL_EVT           = 4,      /*!< Discovery complete. */
+    ESP_GAP_SEARCH_DI_DISC_CMPL_EVT        = 5,      /*!< Discovery complete. */
+    ESP_GAP_SEARCH_SEARCH_CANCEL_CMPL_EVT  = 6,      /*!< Search cancelled */
+    ESP_GAP_SEARCH_INQ_DISCARD_NUM_EVT     = 7,      /*!< The number of pkt discarded by flow control */
+} esp_gap_search_evt_t;
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+/**
+ * @brief Ble scan result event type, to indicate the
+ *        result is scan response or advertising data or other
+ */
+typedef enum {
+    ESP_BLE_EVT_CONN_ADV         = 0x00,        /*!< Connectable undirected advertising (ADV_IND) */
+    ESP_BLE_EVT_CONN_DIR_ADV     = 0x01,        /*!< Connectable directed advertising (ADV_DIRECT_IND) */
+    ESP_BLE_EVT_DISC_ADV         = 0x02,        /*!< Scannable undirected advertising (ADV_SCAN_IND) */
+    ESP_BLE_EVT_NON_CONN_ADV     = 0x03,        /*!< Non connectable undirected advertising (ADV_NONCONN_IND) */
+    ESP_BLE_EVT_SCAN_RSP         = 0x04,        /*!< Scan Response (SCAN_RSP) */
+} esp_ble_evt_type_t;
+
+typedef enum{
+    ESP_BLE_WHITELIST_REMOVE     = 0X00,    /*!< remove mac from whitelist */
+    ESP_BLE_WHITELIST_ADD        = 0X01,    /*!< add address to whitelist */
+} esp_ble_wl_opration_t;
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+typedef enum {
+    ESP_BLE_DUPLICATE_EXCEPTIONAL_LIST_ADD      = 0,  /*!< Add device info into duplicate scan exceptional list */
+    ESP_BLE_DUPLICATE_EXCEPTIONAL_LIST_REMOVE,        /*!< Remove device info from duplicate scan exceptional list */
+    ESP_BLE_DUPLICATE_EXCEPTIONAL_LIST_CLEAN,         /*!< Clean duplicate scan exceptional list */
+} esp_bt_duplicate_exceptional_subcode_type_t;
+#endif //#if (BLE_42_FEATURE_SUPPORT == TRUE)
+
+#define BLE_BIT(n) (1UL<<(n))
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+typedef enum {
+    ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_INFO_ADV_ADDR       = 0,  /*!< BLE advertising address , device info will be added into ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_ADDR_LIST */
+    ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_INFO_MESH_LINK_ID,        /*!< BLE mesh link ID, it is for BLE mesh, device info will be added into ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_MESH_LINK_ID_LIST */
+    ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_INFO_MESH_BEACON_TYPE,    /*!< BLE mesh beacon AD type, the format is | Len | 0x2B | Beacon Type | Beacon Data | */
+    ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_INFO_MESH_PROV_SRV_ADV,   /*!< BLE mesh provisioning service uuid, the format is | 0x02 | 0x01 | flags | 0x03 | 0x03 | 0x1827 | .... |` */
+    ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_INFO_MESH_PROXY_SRV_ADV,  /*!< BLE mesh adv with proxy service uuid, the format is | 0x02 | 0x01 | flags | 0x03 | 0x03 | 0x1828 | .... |` */
+} esp_ble_duplicate_exceptional_info_type_t;
+
+typedef enum {
+    ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_ADDR_LIST                  = BLE_BIT(0),             /*!< duplicate scan exceptional addr list */
+    ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_MESH_LINK_ID_LIST          = BLE_BIT(1),             /*!< duplicate scan exceptional mesh link ID list */
+    ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_MESH_BEACON_TYPE_LIST      = BLE_BIT(2),             /*!< duplicate scan exceptional mesh beacon type list */
+    ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_MESH_PROV_SRV_ADV_LIST     = BLE_BIT(3),             /*!< duplicate scan exceptional mesh adv with provisioning service uuid */
+    ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_MESH_PROXY_SRV_ADV_LIST    = BLE_BIT(4),             /*!< duplicate scan exceptional mesh adv with provisioning service uuid */
+    ESP_BLE_DUPLICATE_SCAN_EXCEPTIONAL_ALL_LIST                   = 0xFFFF,                 /*!< duplicate scan exceptional all list */
+} esp_duplicate_scan_exceptional_list_type_t;
+
+typedef uint8_t esp_duplicate_info_t[ESP_BD_ADDR_LEN];
+
+#endif //#if (BLE_42_FEATURE_SUPPORT == TRUE)
+
+#if (BLE_50_FEATURE_SUPPORT == TRUE)
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_NONCONN_NONSCANNABLE_UNDIRECTED      (0 << 0) // Non-Connectable and Non-Scannable Undirected advertising
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_CONNECTABLE                          (1 << 0) // Connectable advertising
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_SCANNABLE                            (1 << 1) // Scannable advertising
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_DIRECTED                             (1 << 2) // Directed advertising
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_HD_DIRECTED                          (1 << 3) // High Duty Cycle Directed Connectable advertising (<= 3.75 ms Advertis- ing Interval)
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_LEGACY                               (1 << 4) // Use legacy advertising PDUs
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_ANON_ADV                             (1 << 5) // Omit advertiser's address from all PDUs ("anonymous advertising")
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_INCLUDE_TX_PWR                       (1 << 6) // Include TxPower in the extended header of the advertising PDU
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_MASK                                 (0x7F)   // Reserved for future use
+
+/*  If extended advertising PDU types are being used (bit 4 = 0) then:
+    The advertisement shall not be both connectable and scannable.
+    High duty cycle directed connectable advertising (<= 3.75 ms advertising interval) shall not be used (bit 3 = 0)
+*/
+// ADV_IND
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_LEGACY_IND        (ESP_BLE_GAP_SET_EXT_ADV_PROP_LEGACY |\
+                                                        ESP_BLE_GAP_SET_EXT_ADV_PROP_CONNECTABLE |\
+                                                        ESP_BLE_GAP_SET_EXT_ADV_PROP_SCANNABLE)
+// ADV_DIRECT_IND (low duty cycle)
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_LEGACY_LD_DIR     (ESP_BLE_GAP_SET_EXT_ADV_PROP_LEGACY |\
+                                                        ESP_BLE_GAP_SET_EXT_ADV_PROP_CONNECTABLE |\
+                                                        ESP_BLE_GAP_SET_EXT_ADV_PROP_DIRECTED)
+// ADV_DIRECT_IND (high duty cycle)
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_LEGACY_HD_DIR     (ESP_BLE_GAP_SET_EXT_ADV_PROP_LEGACY |\
+                                                        ESP_BLE_GAP_SET_EXT_ADV_PROP_CONNECTABLE |\
+                                                        ESP_BLE_GAP_SET_EXT_ADV_PROP_HD_DIRECTED)
+// ADV_SCAN_IND
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_LEGACY_SCAN       (ESP_BLE_GAP_SET_EXT_ADV_PROP_LEGACY |\
+                                                        ESP_BLE_GAP_SET_EXT_ADV_PROP_SCANNABLE)
+// ADV_NONCONN_IND
+#define ESP_BLE_GAP_SET_EXT_ADV_PROP_LEGACY_NONCONN    (ESP_BLE_GAP_SET_EXT_ADV_PROP_LEGACY)
+typedef uint16_t esp_ble_ext_adv_type_mask_t;
+
+#define ESP_BLE_GAP_PHY_1M                             1
+#define ESP_BLE_GAP_PHY_2M                             2
+#define ESP_BLE_GAP_PHY_CODED                          3
+typedef uint8_t esp_ble_gap_phy_t;
+
+#define ESP_BLE_GAP_NO_PREFER_TRANSMIT_PHY     (1<<0)
+#define ESP_BLE_GAP_NO_PREFER_RECEIVE_PHY      (1<<1)
+typedef uint8_t esp_ble_gap_all_phys_t;
+
+// Primary phy only support 1M and LE coded phy
+#define ESP_BLE_GAP_PRI_PHY_1M     ESP_BLE_GAP_PHY_1M
+#define ESP_BLE_GAP_PRI_PHY_CODED  ESP_BLE_GAP_PHY_CODED
+typedef uint8_t esp_ble_gap_pri_phy_t; // primary phy
+
+#define ESP_BLE_GAP_PHY_1M_PREF_MASK                   (1 << 0)
+#define ESP_BLE_GAP_PHY_2M_PREF_MASK                   (1 << 1)
+#define ESP_BLE_GAP_PHY_CODED_PREF_MASK                (1 << 2)
+typedef uint8_t esp_ble_gap_phy_mask_t;
+
+#define ESP_BLE_GAP_PHY_OPTIONS_NO_PREF                  0 // The Host has no preferred coding when transmitting on the LE Coded PHY
+#define ESP_BLE_GAP_PHY_OPTIONS_PREF_S2_CODING           1 // The Host prefers that S=2 coding be used when transmitting on the LE Coded PHY
+#define ESP_BLE_GAP_PHY_OPTIONS_PREF_S8_CODING           2 // The Host prefers that S=8 coding be used when transmitting on the LE Coded PHY
+typedef uint16_t esp_ble_gap_prefer_phy_options_t;
+
+#define ESP_BLE_GAP_EXT_SCAN_CFG_UNCODE_MASK           0x01
+#define ESP_BLE_GAP_EXT_SCAN_CFG_CODE_MASK             0x02
+typedef uint8_t esp_ble_ext_scan_cfg_mask_t;
+
+#define ESP_BLE_GAP_EXT_ADV_DATA_COMPLETE              0x00
+#define ESP_BLE_GAP_EXT_ADV_DATA_INCOMPLETE            0x01
+#define ESP_BLE_GAP_EXT_ADV_DATA_TRUNCATED             0x02
+typedef uint8_t esp_ble_gap_ext_adv_data_status_t;
+
+#define ESP_BLE_GAP_SYNC_POLICY_BY_ADV_INFO       0
+#define ESP_BLE_GAP_SYNC_POLICY_BY_PERIODIC_LIST  1
+typedef uint8_t esp_ble_gap_sync_t;
+
+/* Advertising report */
+#define ESP_BLE_ADV_REPORT_EXT_ADV_IND                    (1<<0)
+#define ESP_BLE_ADV_REPORT_EXT_SCAN_IND                   (1<<1)
+#define ESP_BLE_ADV_REPORT_EXT_DIRECT_ADV                 (1<<2)
+#define ESP_BLE_ADV_REPORT_EXT_SCAN_RSP                   (1<<3)
+/* Bluetooth 5.0, Vol 2, Part E, 7.7.65.13 */
+#define ESP_BLE_LEGACY_ADV_TYPE_IND                       (0x13)
+#define ESP_BLE_LEGACY_ADV_TYPE_DIRECT_IND                (0x15)
+#define ESP_BLE_LEGACY_ADV_TYPE_SCAN_IND                  (0x12)
+#define ESP_BLE_LEGACY_ADV_TYPE_NONCON_IND                (0x10)
+#define ESP_BLE_LEGACY_ADV_TYPE_SCAN_RSP_TO_ADV_IND       (0x1b)
+#define ESP_BLE_LEGACY_ADV_TYPE_SCAN_RSP_TO_ADV_SCAN_IND  (0x1a)
+typedef uint8_t esp_ble_gap_adv_type_t;
+
+/**
+* @brief ext adv parameters
+*/
+typedef struct {
+    esp_ble_ext_adv_type_mask_t type;   /*!< ext adv type */
+    uint32_t interval_min;              /*!< ext adv minimum interval */
+    uint32_t interval_max;              /*!< ext adv maximum interval */
+    esp_ble_adv_channel_t channel_map;  /*!< ext adv channel map */
+    esp_ble_addr_type_t own_addr_type;  /*!< ext adv own addresss type */
+    esp_ble_addr_type_t peer_addr_type; /*!< ext adv peer address type */
+    esp_bd_addr_t peer_addr;            /*!< ext adv peer address */
+    esp_ble_adv_filter_t filter_policy; /*!< ext adv filter policy */
+    int8_t tx_power;                    /*!< ext adv tx power */
+    esp_ble_gap_pri_phy_t primary_phy;  /*!< ext adv primary phy */
+    uint8_t max_skip;                   /*!< ext adv maximum skip */
+    esp_ble_gap_phy_t secondary_phy;    /*!< ext adv secondary phy */
+    uint8_t sid;                        /*!< ext adv sid */
+    bool scan_req_notif;                /*!< ext adv sacn request event notify */
+} esp_ble_gap_ext_adv_params_t;
+
+/**
+* @brief ext scan config
+*/
+typedef struct {
+    esp_ble_scan_type_t scan_type; /*!< ext scan type */
+    uint16_t scan_interval;        /*!< ext scan interval */
+    uint16_t scan_window;          /*!< ext scan window */
+} esp_ble_ext_scan_cfg_t;
+
+/**
+* @brief ext scan parameters
+*/
+typedef struct {
+    esp_ble_addr_type_t own_addr_type;        /*!< ext scan own addresss type */
+    esp_ble_scan_filter_t filter_policy;      /*!< ext scan filter policy */
+    esp_ble_scan_duplicate_t  scan_duplicate; /*!< ext scan duplicate scan */
+    esp_ble_ext_scan_cfg_mask_t cfg_mask;     /*!< ext scan config mask */
+    esp_ble_ext_scan_cfg_t uncoded_cfg;       /*!< ext scan uncoded config parameters */
+    esp_ble_ext_scan_cfg_t coded_cfg;         /*!< ext scan coded config parameters */
+} esp_ble_ext_scan_params_t;
+
+/**
+* @brief create extend connection parameters
+*/
+typedef struct {
+    uint16_t scan_interval;       /*!< init scan interval */
+    uint16_t scan_window;         /*!< init scan window */
+    uint16_t interval_min;        /*!< minimum interval */
+    uint16_t interval_max;        /*!< maximum interval */
+    uint16_t latency;             /*!< ext scan type */
+    uint16_t supervision_timeout; /*!< connection supervision timeout */
+    uint16_t min_ce_len;          /*!< minimum ce length */
+    uint16_t max_ce_len;          /*!< maximum ce length */
+} esp_ble_gap_conn_params_t;
+
+/**
+* @brief extend adv enable parameters
+*/
+typedef struct {
+    uint8_t instance;        /*!< advertising handle */
+    int duration;            /*!< advertising duration */
+    int max_events;          /*!< maximum number of extended advertising events */
+} esp_ble_gap_ext_adv_t;
+
+/**
+* @brief periodic adv parameters
+*/
+typedef struct {
+    uint16_t interval_min;     /*!< periodic advertising minimum interval */
+    uint16_t interval_max;     /*!< periodic advertising maximum interval */
+    uint8_t  properties;       /*!< periodic advertising properties */
+} esp_ble_gap_periodic_adv_params_t;
+
+/**
+* @brief periodic adv sync parameters
+*/
+typedef struct {
+    esp_ble_gap_sync_t filter_policy;   /*!< periodic advertising sync filter policy */
+    uint8_t sid;                        /*!< periodic advertising sid */
+    esp_ble_addr_type_t addr_type;      /*!< periodic advertising address type */
+    esp_bd_addr_t addr;                 /*!< periodic advertising address */
+    uint16_t skip;                      /*!< the maximum number of periodic advertising events that can be skipped */
+    uint16_t sync_timeout;              /*!< synchronization timeout */
+} esp_ble_gap_periodic_adv_sync_params_t;
+
+/**
+* @brief extend adv report parameters
+*/
+typedef struct {
+    // uint8_t props;
+    // uint8_t legacy_event_type;
+    esp_ble_gap_adv_type_t event_type;              /*!< extend advertising type */
+    uint8_t addr_type;                              /*!< extend advertising address type */
+    esp_bd_addr_t addr;                             /*!< extend advertising address */
+    esp_ble_gap_pri_phy_t primary_phy;              /*!< extend advertising primary phy */
+    esp_ble_gap_phy_t secondly_phy;                 /*!< extend advertising secondary phy */
+    uint8_t sid;                                    /*!< extend advertising sid */
+    uint8_t tx_power;                               /*!< extend advertising tx power */
+    int8_t rssi;                                    /*!< extend advertising rssi */
+    uint16_t per_adv_interval;                      /*!< periodic advertising interval */
+    uint8_t dir_addr_type;                          /*!< direct address type */
+    esp_bd_addr_t dir_addr;                         /*!< direct address */
+    esp_ble_gap_ext_adv_data_status_t data_status;  /*!< data type */
+    uint8_t adv_data_len;                           /*!< extend advertising data length */
+    uint8_t adv_data[251];                          /*!< extend advertising data */
+} esp_ble_gap_ext_adv_reprot_t;
+
+/**
+* @brief periodic adv report parameters
+*/
+typedef struct {
+    uint16_t sync_handle;                          /*!< periodic advertising train handle */
+    uint8_t tx_power;                              /*!< periodic advertising tx power*/
+    int8_t rssi;                                   /*!< periodic advertising rssi */
+    esp_ble_gap_ext_adv_data_status_t data_status; /*!< periodic advertising data type*/
+    uint8_t data_length;                           /*!< periodic advertising data length */
+    uint8_t data[251];                             /*!< periodic advertising data */
+} esp_ble_gap_periodic_adv_report_t;
+
+/**
+* @brief perodic adv sync establish parameters
+*/
+typedef struct {
+    uint8_t status;                               /*!< periodic advertising sync status */
+    uint16_t sync_handle;                         /*!< periodic advertising train handle */
+    uint8_t sid;                                  /*!< periodic advertising sid */
+    esp_ble_addr_type_t addr_type;                /*!< periodic advertising address type */
+    esp_bd_addr_t adv_addr;                       /*!< periodic advertising address */
+    esp_ble_gap_phy_t adv_phy;                    /*!< periodic advertising adv phy type */
+    uint16_t period_adv_interval;                 /*!< periodic advertising interval */
+    uint8_t adv_clk_accuracy;                     /*!< periodic advertising clock accuracy */
+} esp_ble_gap_periodic_adv_sync_estab_t;
+
+#endif //#if (BLE_50_FEATURE_SUPPORT == TRUE)
+
+/**
+ * @brief Gap callback parameters union
+ */
+typedef union {
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+    /**
+     * @brief ESP_GAP_BLE_ADV_DATA_SET_COMPLETE_EVT
+     */
+    struct ble_adv_data_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the set advertising data operation success status */
+    } adv_data_cmpl;                                /*!< Event parameter of ESP_GAP_BLE_ADV_DATA_SET_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SCAN_RSP_DATA_SET_COMPLETE_EVT
+     */
+    struct ble_scan_rsp_data_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the set scan response data operation success status */
+    } scan_rsp_data_cmpl;                           /*!< Event parameter of ESP_GAP_BLE_SCAN_RSP_DATA_SET_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SCAN_PARAM_SET_COMPLETE_EVT
+     */
+    struct ble_scan_param_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the set scan param operation success status */
+    } scan_param_cmpl;                              /*!< Event parameter of ESP_GAP_BLE_SCAN_PARAM_SET_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SCAN_RESULT_EVT
+     */
+    struct ble_scan_result_evt_param {
+        esp_gap_search_evt_t search_evt;            /*!< Search event type */
+        esp_bd_addr_t bda;                          /*!< Bluetooth device address which has been searched */
+        esp_bt_dev_type_t dev_type;                 /*!< Device type */
+        esp_ble_addr_type_t ble_addr_type;          /*!< Ble device address type */
+        esp_ble_evt_type_t ble_evt_type;            /*!< Ble scan result event type */
+        int rssi;                                   /*!< Searched device's RSSI */
+        uint8_t  ble_adv[ESP_BLE_ADV_DATA_LEN_MAX + ESP_BLE_SCAN_RSP_DATA_LEN_MAX];     /*!< Received EIR */
+        int flag;                                   /*!< Advertising data flag bit */
+        int num_resps;                              /*!< Scan result number */
+        uint8_t adv_data_len;                       /*!< Adv data length */
+        uint8_t scan_rsp_len;                       /*!< Scan response length */
+        uint32_t num_dis;                          /*!< The number of discard packets */
+    } scan_rst;                                     /*!< Event parameter of ESP_GAP_BLE_SCAN_RESULT_EVT */
+    /**
+     * @brief ESP_GAP_BLE_ADV_DATA_RAW_SET_COMPLETE_EVT
+     */
+    struct ble_adv_data_raw_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the set raw advertising data operation success status */
+    } adv_data_raw_cmpl;                            /*!< Event parameter of ESP_GAP_BLE_ADV_DATA_RAW_SET_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SCAN_RSP_DATA_RAW_SET_COMPLETE_EVT
+     */
+    struct ble_scan_rsp_data_raw_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the set raw advertising data operation success status */
+    } scan_rsp_data_raw_cmpl;                       /*!< Event parameter of ESP_GAP_BLE_SCAN_RSP_DATA_RAW_SET_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_ADV_START_COMPLETE_EVT
+     */
+    struct ble_adv_start_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate advertising start operation success status */
+    } adv_start_cmpl;                               /*!< Event parameter of ESP_GAP_BLE_ADV_START_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SCAN_START_COMPLETE_EVT
+     */
+    struct ble_scan_start_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate scan start operation success status */
+    } scan_start_cmpl;                              /*!< Event parameter of ESP_GAP_BLE_SCAN_START_COMPLETE_EVT */
+#endif //#if (BLE_42_FEATURE_SUPPORT == TRUE)
+    esp_ble_sec_t ble_security;                     /*!< ble gap security union type */
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+    /**
+     * @brief ESP_GAP_BLE_SCAN_STOP_COMPLETE_EVT
+     */
+    struct ble_scan_stop_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate scan stop operation success status */
+    } scan_stop_cmpl;                               /*!< Event parameter of ESP_GAP_BLE_SCAN_STOP_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_ADV_STOP_COMPLETE_EVT
+     */
+    struct ble_adv_stop_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate adv stop operation success status */
+    } adv_stop_cmpl;                                /*!< Event parameter of ESP_GAP_BLE_ADV_STOP_COMPLETE_EVT */
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+    /**
+     * @brief ESP_GAP_BLE_SET_STATIC_RAND_ADDR_EVT
+     */
+    struct ble_set_rand_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate set static rand address operation success status */
+    } set_rand_addr_cmpl;                           /*!< Event parameter of ESP_GAP_BLE_SET_STATIC_RAND_ADDR_EVT */
+    /**
+     * @brief ESP_GAP_BLE_UPDATE_CONN_PARAMS_EVT
+     */
+    struct ble_update_conn_params_evt_param {
+        esp_bt_status_t status;                    /*!< Indicate update connection parameters success status */
+        esp_bd_addr_t bda;                         /*!< Bluetooth device address */
+        uint16_t min_int;                          /*!< Min connection interval */
+        uint16_t max_int;                          /*!< Max connection interval */
+        uint16_t latency;                          /*!< Slave latency for the connection in number of connection events. Range: 0x0000 to 0x01F3 */
+        uint16_t conn_int;                         /*!< Current connection interval */
+        uint16_t timeout;                          /*!< Supervision timeout for the LE Link. Range: 0x000A to 0x0C80.
+                                                     Mandatory Range: 0x000A to 0x0C80 Time = N * 10 msec */
+    } update_conn_params;                          /*!< Event parameter of ESP_GAP_BLE_UPDATE_CONN_PARAMS_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SET_PKT_LENGTH_COMPLETE_EVT
+     */
+    struct ble_pkt_data_length_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the set pkt data length operation success status */
+        esp_ble_pkt_data_length_params_t params;    /*!<  pkt data length value */
+    } pkt_data_lenth_cmpl;                          /*!< Event parameter of ESP_GAP_BLE_SET_PKT_LENGTH_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SET_LOCAL_PRIVACY_COMPLETE_EVT
+     */
+    struct ble_local_privacy_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the set local privacy operation success status */
+    } local_privacy_cmpl;                           /*!< Event parameter of ESP_GAP_BLE_SET_LOCAL_PRIVACY_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_REMOVE_BOND_DEV_COMPLETE_EVT
+     */
+    struct ble_remove_bond_dev_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the remove bond device operation success status */
+        esp_bd_addr_t bd_addr;                      /*!< The device address which has been remove from the bond list */
+    } remove_bond_dev_cmpl;                         /*!< Event parameter of ESP_GAP_BLE_REMOVE_BOND_DEV_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_CLEAR_BOND_DEV_COMPLETE_EVT
+     */
+    struct ble_clear_bond_dev_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the clear bond device operation success status */
+    } clear_bond_dev_cmpl;                          /*!< Event parameter of ESP_GAP_BLE_CLEAR_BOND_DEV_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_GET_BOND_DEV_COMPLETE_EVT
+     */
+    struct ble_get_bond_dev_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the get bond device operation success status */
+        uint8_t dev_num;                            /*!< Indicate the get number device in the bond list */
+        esp_ble_bond_dev_t *bond_dev;               /*!< the pointer to the bond device Structure */
+    } get_bond_dev_cmpl;                            /*!< Event parameter of ESP_GAP_BLE_GET_BOND_DEV_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_READ_RSSI_COMPLETE_EVT
+     */
+    struct ble_read_rssi_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the read adv tx power operation success status */
+        int8_t rssi;                                /*!< The ble remote device rssi value, the range is from -127 to 20, the unit is dbm,
+                                                         if the RSSI cannot be read, the RSSI metric shall be set to 127. */
+        esp_bd_addr_t remote_addr;                  /*!< The remote device address */
+    } read_rssi_cmpl;                               /*!< Event parameter of ESP_GAP_BLE_READ_RSSI_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_UPDATE_WHITELIST_COMPLETE_EVT
+     */
+    struct ble_update_whitelist_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate the add or remove whitelist operation success status */
+        esp_ble_wl_opration_t wl_opration;          /*!< The value is ESP_BLE_WHITELIST_ADD if add address to whitelist operation success, ESP_BLE_WHITELIST_REMOVE if remove address from the whitelist operation success */
+    } update_whitelist_cmpl;                        /*!< Event parameter of ESP_GAP_BLE_UPDATE_WHITELIST_COMPLETE_EVT */
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+    /**
+     * @brief ESP_GAP_BLE_UPDATE_DUPLICATE_EXCEPTIONAL_LIST_COMPLETE_EVT
+     */
+    struct ble_update_duplicate_exceptional_list_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate update duplicate scan exceptional list operation success status */
+        uint8_t         subcode;                    /*!< Define in esp_bt_duplicate_exceptional_subcode_type_t */
+        uint16_t         length;                     /*!< The length of device_info */
+        esp_duplicate_info_t device_info;           /*!< device information, when subcode is ESP_BLE_DUPLICATE_EXCEPTIONAL_LIST_CLEAN, the value is invalid */
+    } update_duplicate_exceptional_list_cmpl;       /*!< Event parameter of ESP_GAP_BLE_UPDATE_DUPLICATE_EXCEPTIONAL_LIST_COMPLETE_EVT */
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+    /**
+     * @brief ESP_GAP_BLE_SET_CHANNELS_EVT
+      */
+    struct ble_set_channels_evt_param {
+        esp_bt_status_t stat;                       /*!< BLE set channel status */
+    } ble_set_channels;                             /*!< Event parameter of ESP_GAP_BLE_SET_CHANNELS_EVT */
+
+#if (BLE_50_FEATURE_SUPPORT == TRUE)
+    /**
+     * @brief ESP_GAP_BLE_READ_PHY_COMPLETE_EVT
+     */
+    struct ble_read_phy_cmpl_evt_param {
+        esp_bt_status_t status;                   /*!< read phy complete status */
+        esp_bd_addr_t bda;                        /*!< read phy address */
+        esp_ble_gap_phy_t tx_phy;                 /*!< tx phy type */
+        esp_ble_gap_phy_t rx_phy;                 /*!< rx phy type */
+    } read_phy;                                   /*!< Event parameter of ESP_GAP_BLE_READ_PHY_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SET_PREFERED_DEFAULT_PHY_COMPLETE_EVT
+     */
+    struct ble_set_perf_def_phy_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate perf default phy set status */
+    } set_perf_def_phy;                             /*!< Event parameter of ESP_GAP_BLE_SET_PREFERED_DEFAULT_PHY_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SET_PREFERED_PHY_COMPLETE_EVT
+     */
+    struct ble_set_perf_phy_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate perf phy set status */
+    } set_perf_phy;                                  /*!< Event parameter of ESP_GAP_BLE_SET_PREFERED_PHY_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_EXT_ADV_SET_RAND_ADDR_COMPLETE_EVT
+     */
+    struct ble_ext_adv_set_rand_addr_cmpl_evt_param {
+        esp_bt_status_t status;                      /*!< Indicate extend advertising random address set status */
+    } ext_adv_set_rand_addr;                         /*!< Event parameter of ESP_GAP_BLE_EXT_ADV_SET_RAND_ADDR_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_EXT_ADV_SET_PARAMS_COMPLETE_EVT
+     */
+    struct ble_ext_adv_set_params_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate extend advertising parameters set status */
+    } ext_adv_set_params;                           /*!< Event parameter of ESP_GAP_BLE_EXT_ADV_SET_PARAMS_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_EXT_ADV_DATA_SET_COMPLETE_EVT
+     */
+     struct ble_ext_adv_data_set_cmpl_evt_param {
+        esp_bt_status_t status;                      /*!< Indicate extend advertising data set status */
+    } ext_adv_data_set;                              /*!< Event parameter of ESP_GAP_BLE_EXT_ADV_DATA_SET_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_EXT_SCAN_RSP_DATA_SET_COMPLETE_EVT
+     */
+    struct ble_ext_adv_scan_rsp_set_cmpl_evt_param {
+        esp_bt_status_t status;                      /*!< Indicate extend advertising sacn response data set status */
+    } scan_rsp_set;                                  /*!< Event parameter of ESP_GAP_BLE_EXT_SCAN_RSP_DATA_SET_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_EXT_ADV_START_COMPLETE_EVT
+     */
+    struct ble_ext_adv_start_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate advertising start operation success status */
+    } ext_adv_start;                                /*!< Event parameter of ESP_GAP_BLE_EXT_ADV_START_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_EXT_ADV_STOP_COMPLETE_EVT
+     */
+    struct ble_ext_adv_stop_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate advertising stop operation success status */
+    } ext_adv_stop;                                 /*!< Event parameter of ESP_GAP_BLE_EXT_ADV_STOP_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_EXT_ADV_SET_REMOVE_COMPLETE_EVT
+     */
+    struct ble_ext_adv_set_remove_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate advertising stop operation success status */
+    } ext_adv_remove;                               /*!< Event parameter of ESP_GAP_BLE_EXT_ADV_SET_REMOVE_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_EXT_ADV_SET_CLEAR_COMPLETE_EVT
+     */
+    struct ble_ext_adv_set_clear_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate advertising stop operation success status */
+    } ext_adv_clear;                                /*!< Event parameter of ESP_GAP_BLE_EXT_ADV_SET_CLEAR_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_SET_PARAMS_COMPLETE_EVT
+     */
+    struct ble_periodic_adv_set_params_cmpl_param {
+        esp_bt_status_t status;                    /*!< Indicate periodic advertisingparameters set status */
+    } peroid_adv_set_params;                       /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_SET_PARAMS_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_DATA_SET_COMPLETE_EVT
+     */
+    struct ble_periodic_adv_data_set_cmpl_param {
+        esp_bt_status_t status;                    /*!< Indicate periodic advertising data set status */
+    } period_adv_data_set;                         /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_DATA_SET_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_START_COMPLETE_EVT
+     */
+    struct ble_periodic_adv_start_cmpl_param {
+        esp_bt_status_t status;                   /*!< Indicate periodic advertising start status */
+    } period_adv_start;                           /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_START_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_STOP_COMPLETE_EVT
+     */
+    struct ble_periodic_adv_stop_cmpl_param {
+        esp_bt_status_t status;                  /*!< Indicate periodic advertising stop status */
+    } period_adv_stop;                           /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_STOP_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_CREATE_SYNC_COMPLETE_EVT
+     */
+    struct ble_period_adv_create_sync_cmpl_param {
+        esp_bt_status_t status;                  /*!< Indicate periodic advertising create sync status */
+    } period_adv_create_sync;                    /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_CREATE_SYNC_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_SYNC_CANCEL_COMPLETE_EVT
+     */
+    struct ble_period_adv_sync_cancel_cmpl_param {
+        esp_bt_status_t status;                  /*!< Indicate periodic advertising sync cancle status */
+    } period_adv_sync_cancel;                    /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_SYNC_CANCEL_COMPLETE_EVT */
+     /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_SYNC_TERMINATE_COMPLETE_EVT
+     */
+    struct ble_period_adv_sync_terminate_cmpl_param {
+        esp_bt_status_t status;                  /*!< Indicate periodic advertising sync terminate status */
+    } period_adv_sync_term;                      /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_SYNC_TERMINATE_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_ADD_DEV_COMPLETE_EVT
+     */
+    struct ble_period_adv_add_dev_cmpl_param {
+        esp_bt_status_t status;                 /*!< Indicate periodic advertising device list add status */
+    } period_adv_add_dev;                       /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_ADD_DEV_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_REMOVE_DEV_COMPLETE_EVT
+     */
+    struct ble_period_adv_remove_dev_cmpl_param {
+        esp_bt_status_t status;                /*!< Indicate periodic advertising device list remove status */
+    } period_adv_remove_dev;                   /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_REMOVE_DEV_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_CLEAR_DEV_COMPLETE_EVT
+     */
+    struct ble_period_adv_clear_dev_cmpl_param {
+        esp_bt_status_t status;               /*!< Indicate periodic advertising device list clean status */
+    } period_adv_clear_dev;                   /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_CLEAR_DEV_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SET_EXT_SCAN_PARAMS_COMPLETE_EVT
+     */
+    struct ble_set_ext_scan_params_cmpl_param {
+        esp_bt_status_t status;              /*!< Indicate extend advertising parameters set status */
+    } set_ext_scan_params;                   /*!< Event parameter of ESP_GAP_BLE_SET_EXT_SCAN_PARAMS_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_EXT_SCAN_START_COMPLETE_EVT
+     */
+    struct ble_ext_scan_start_cmpl_param {
+        esp_bt_status_t status;             /*!< Indicate extend advertising start status */
+    } ext_scan_start;                       /*!< Event parameter of ESP_GAP_BLE_EXT_SCAN_START_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_EXT_SCAN_STOP_COMPLETE_EVT
+     */
+    struct ble_ext_scan_stop_cmpl_param {
+        esp_bt_status_t status;            /*!< Indicate extend advertising stop status */
+    } ext_scan_stop;                       /*!< Event parameter of ESP_GAP_BLE_EXT_SCAN_STOP_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PREFER_EXT_CONN_PARAMS_SET_COMPLETE_EVT
+     */
+    struct ble_ext_conn_params_set_cmpl_param {
+        esp_bt_status_t status;            /*!< Indicate extend connection parameters set status */
+    } ext_conn_params_set;                 /*!< Event parameter of ESP_GAP_BLE_PREFER_EXT_CONN_PARAMS_SET_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_ADV_TERMINATED_EVT
+     */
+    struct ble_adv_terminate_param {
+        uint8_t status;                   /*!< Indicate adv terminate status */
+        /*  status 0x3c indicates that advertising for a fixed duration completed or,
+            for directed advertising, that advertising completed without a connection
+            being created;
+            status 0x00 indicates that advertising successfully ended with a connection being created.
+        */
+        uint8_t adv_instance;           /*!< extend advertising handle */
+        uint16_t conn_idx;              /*!< connection index */
+        uint8_t completed_event;        /*!< the number of completed extend advertising events */
+    } adv_terminate;                    /*!< Event parameter of ESP_GAP_BLE_ADV_TERMINATED_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SCAN_REQ_RECEIVED_EVT
+     */
+    struct ble_scan_req_received_param {
+        uint8_t adv_instance;                /*!< extend advertising handle */
+        esp_ble_addr_type_t scan_addr_type;  /*!< scanner address type */
+        esp_bd_addr_t scan_addr;             /*!< scanner address */
+    } scan_req_received;                     /*!< Event parameter of ESP_GAP_BLE_SCAN_REQ_RECEIVED_EVT */
+    /**
+     * @brief ESP_GAP_BLE_CHANNEL_SELETE_ALGORITHM_EVT
+     */
+    struct ble_channel_sel_alg_param {
+        uint16_t conn_handle;              /*!< connection handle */
+        uint8_t channel_sel_alg;           /*!< channel selection algorithm */
+    } channel_sel_alg;                     /*!< Event parameter of ESP_GAP_BLE_CHANNEL_SELETE_ALGORITHM_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_SYNC_LOST_EVT
+     */
+    struct ble_periodic_adv_sync_lost_param {
+        uint16_t sync_handle;                 /*!< sync handle */
+    } periodic_adv_sync_lost;                 /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_SYNC_LOST_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_SYNC_ESTAB_EVT
+     */
+    struct ble_periodic_adv_sync_estab_param {
+        uint8_t status;                      /*!< periodic advertising sync status */
+        uint16_t sync_handle;                /*!< periodic advertising sync handle */
+        uint8_t sid;                         /*!< periodic advertising sid */
+        esp_ble_addr_type_t adv_addr_type;   /*!< periodic advertising address type */
+        esp_bd_addr_t adv_addr;              /*!< periodic advertising address */
+        esp_ble_gap_phy_t adv_phy;           /*!< periodic advertising phy type */
+        uint16_t period_adv_interval;        /*!< periodic advertising interval */
+        uint8_t adv_clk_accuracy;            /*!< periodic advertising clock accuracy */
+    } periodic_adv_sync_estab;               /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_SYNC_ESTAB_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PHY_UPDATE_COMPLETE_EVT
+     */
+    struct ble_phy_update_cmpl_param {
+        esp_bt_status_t status;             /*!< phy update status */
+        esp_bd_addr_t bda;                  /*!< address */
+        esp_ble_gap_phy_t tx_phy;           /*!< tx phy type */
+        esp_ble_gap_phy_t rx_phy;           /*!< rx phy type */
+    } phy_update;                           /*!< Event parameter of ESP_GAP_BLE_PHY_UPDATE_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_EXT_ADV_REPORT_EVT
+     */
+    struct ble_ext_adv_report_param {
+        esp_ble_gap_ext_adv_reprot_t params;   /*!< extend advertising report parameters */
+    } ext_adv_report;                          /*!< Event parameter of ESP_GAP_BLE_EXT_ADV_REPORT_EVT */
+    /**
+     * @brief ESP_GAP_BLE_PERIODIC_ADV_REPORT_EVT
+     */
+    struct ble_periodic_adv_report_param {
+        esp_ble_gap_periodic_adv_report_t params; /*!< periodic advertising report parameters */
+    } period_adv_report;                          /*!< Event parameter of ESP_GAP_BLE_PERIODIC_ADV_REPORT_EVT */
+#endif // #if (BLE_50_FEATURE_SUPPORT == TRUE)
+} esp_ble_gap_cb_param_t;
+
+/**
+ * @brief GAP callback function type
+ * @param event : Event type
+ * @param param : Point to callback parameter, currently is union type
+ */
+typedef void (* esp_gap_ble_cb_t)(esp_gap_ble_cb_event_t event, esp_ble_gap_cb_param_t *param);
+
+/**
+ * @brief           This function is called to occur gap event, such as scan result
+ *
+ * @param[in]       callback: callback function
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_register_callback(esp_gap_ble_cb_t callback);
+
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+/**
+ * @brief           This function is called to override the BTA default ADV parameters.
+ *
+ * @param[in]       adv_data: Pointer to User defined ADV data structure. This
+ *                  memory space can not be freed until callback of config_adv_data
+ *                  is received.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_config_adv_data (esp_ble_adv_data_t *adv_data);
+
+
+
+/**
+ * @brief           This function is called to set scan parameters
+ *
+ * @param[in]       scan_params: Pointer to User defined scan_params data structure. This
+ *                  memory space can not be freed until callback of set_scan_params
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_set_scan_params(esp_ble_scan_params_t *scan_params);
+
+
+/**
+ * @brief           This procedure keep the device scanning the peer device which advertising on the air
+ *
+ * @param[in]       duration: Keeping the scanning time, the unit is second.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_start_scanning(uint32_t duration);
+
+
+/**
+ * @brief          This function call to stop the device scanning the peer device which advertising on the air
+ * @return
+ *                 - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_stop_scanning(void);
+
+/**
+ * @brief           This function is called to start advertising.
+ *
+ * @param[in]       adv_params: pointer to User defined adv_params data structure.
+
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_start_advertising (esp_ble_adv_params_t *adv_params);
+
+
+
+/**
+ * @brief           This function is called to stop advertising.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_stop_advertising(void);
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+
+
+/**
+ * @brief           Update connection parameters, can only be used when connection is up.
+ *
+ * @param[in]       params   -  connection update parameters
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_update_conn_params(esp_ble_conn_update_params_t *params);
+
+
+/**
+ * @brief           This function is to set maximum LE data packet size
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_set_pkt_data_len(esp_bd_addr_t remote_device, uint16_t tx_data_length);
+
+/**
+ * @brief           This function sets the static Random Address and Non-Resolvable Private Address for the application
+ *
+ * @param[in]       rand_addr: the random address which should be setting
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_set_rand_addr(esp_bd_addr_t rand_addr);
+
+/**
+ * @brief           This function clears the random address for the application
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_clear_rand_addr(void);
+
+
+
+/**
+ * @brief           Enable/disable privacy on the local device
+ *
+ * @param[in]       privacy_enable   - enable/disable privacy on remote device.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_config_local_privacy (bool privacy_enable);
+
+/**
+ * @brief           set local gap appearance icon
+ *
+ *
+ * @param[in]       icon   - External appearance value, these values are defined by the Bluetooth SIG, please refer to
+ *                  https://www.bluetooth.com/specifications/gatt/viewer?attributeXmlFile=org.bluetooth.characteristic.gap.appearance.xml
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_config_local_icon (uint16_t icon);
+
+/**
+* @brief            Add or remove device from white list
+*
+* @param[in]        add_remove: the value is true if added the ble device to the white list, and false remove to the white list.
+* @param[in]        remote_bda: the remote device address add/remove from the white list.
+* @param[in]        wl_addr_type: whitelist address type
+* @return
+*                     - ESP_OK : success
+*                     - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_update_whitelist(bool add_remove, esp_bd_addr_t remote_bda, esp_ble_wl_addr_type_t wl_addr_type);
+
+/**
+* @brief            Clear all white list
+*
+* @return
+*                     - ESP_OK : success
+*                     - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_clear_whitelist(void);
+
+/**
+* @brief            Get the whitelist size in the controller
+*
+* @param[out]       length: the white list length.
+* @return
+*                     - ESP_OK : success
+*                     - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_get_whitelist_size(uint16_t *length);
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+/**
+* @brief            This function is called to set the preferred connection
+*                   parameters when default connection parameter is not desired before connecting.
+*                   This API can only be used in the master role.
+*
+* @param[in]        bd_addr: BD address of the peripheral
+* @param[in]        min_conn_int: minimum preferred connection interval
+* @param[in]        max_conn_int: maximum preferred connection interval
+* @param[in]        slave_latency: preferred slave latency
+* @param[in]        supervision_tout: preferred supervision timeout
+*
+* @return
+*                   - ESP_OK : success
+*                   - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_set_prefer_conn_params(esp_bd_addr_t bd_addr,
+                                                                 uint16_t min_conn_int, uint16_t max_conn_int,
+                                                                 uint16_t slave_latency, uint16_t supervision_tout);
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+/**
+ * @brief           Set device name to the local device
+ *
+ * @param[in]       name   -  device name.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_set_device_name(const char *name);
+
+/**
+ * @brief          This function is called to get local used address and adress type.
+ *                 uint8_t *esp_bt_dev_get_address(void) get the public address
+ *
+ * @param[in]       local_used_addr - current local used ble address (six bytes)
+ * @param[in]       addr_type   - ble address type
+ *
+ * @return          - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_get_local_used_addr(esp_bd_addr_t local_used_addr, uint8_t * addr_type);
+/**
+ * @brief          This function is called to get ADV data for a specific type.
+ *
+ * @param[in]       adv_data - pointer of ADV data which to be resolved
+ * @param[in]       type   - finding ADV data type
+ * @param[out]      length - return the length of ADV data not including type
+ *
+ * @return          pointer of ADV data
+ *
+ */
+uint8_t *esp_ble_resolve_adv_data(uint8_t *adv_data, uint8_t type, uint8_t *length);
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+/**
+ * @brief           This function is called to set raw advertising data. User need to fill
+ *                  ADV data by self.
+ *
+ * @param[in]       raw_data : raw advertising data
+ * @param[in]       raw_data_len : raw advertising data length , less than 31 bytes
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gap_config_adv_data_raw(uint8_t *raw_data, uint32_t raw_data_len);
+
+/**
+ * @brief           This function is called to set raw scan response data. User need to fill
+ *                  scan response data by self.
+ *
+ * @param[in]       raw_data : raw scan response data
+ * @param[in]       raw_data_len : raw scan response data length , less than 31 bytes
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ */
+esp_err_t esp_ble_gap_config_scan_rsp_data_raw(uint8_t *raw_data, uint32_t raw_data_len);
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+
+/**
+ * @brief           This function is called to read the RSSI of remote device.
+ *                  The address of link policy results are returned in the gap callback function with
+ *                  ESP_GAP_BLE_READ_RSSI_COMPLETE_EVT event.
+ *
+ * @param[in]       remote_addr : The remote connection device address.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ */
+esp_err_t esp_ble_gap_read_rssi(esp_bd_addr_t remote_addr);
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+/**
+ * @brief           This function is called to add a device info into the duplicate scan exceptional list.
+ *
+ *
+ * @param[in]       type: device info type, it is defined in esp_ble_duplicate_exceptional_info_type_t
+ *                  when type is MESH_BEACON_TYPE, MESH_PROV_SRV_ADV or MESH_PROXY_SRV_ADV , device_info is invalid.
+ * @param[in]       device_info: the device information.
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ */
+esp_err_t esp_ble_gap_add_duplicate_scan_exceptional_device(esp_ble_duplicate_exceptional_info_type_t type, esp_duplicate_info_t device_info);
+
+/**
+ * @brief           This function is called to remove a device info from the duplicate scan exceptional list.
+ *
+ *
+ * @param[in]       type: device info type, it is defined in esp_ble_duplicate_exceptional_info_type_t
+ *                  when type is MESH_BEACON_TYPE, MESH_PROV_SRV_ADV or MESH_PROXY_SRV_ADV , device_info is invalid.
+ * @param[in]       device_info: the device information.
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ */
+esp_err_t esp_ble_gap_remove_duplicate_scan_exceptional_device(esp_ble_duplicate_exceptional_info_type_t type, esp_duplicate_info_t device_info);
+
+/**
+ * @brief           This function is called to clean the duplicate scan exceptional list.
+ *                  This API will delete all device information in the duplicate scan exceptional list.
+ *
+ *
+ * @param[in]       list_type: duplicate scan exceptional list type, the value can be one or more of esp_duplicate_scan_exceptional_list_type_t.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ */
+esp_err_t esp_ble_gap_clean_duplicate_scan_exceptional_list(esp_duplicate_scan_exceptional_list_type_t list_type);
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+
+#if (SMP_INCLUDED == TRUE)
+/**
+* @brief             Set a GAP security parameter value. Overrides the default value.
+*
+*                    Secure connection is highly recommended to avoid some major
+*                    vulnerabilities like 'Impersonation in the Pin Pairing Protocol'
+*                    (CVE-2020-26555) and 'Authentication of the LE Legacy Pairing
+*                    Protocol'.
+*
+*                    To accept only `secure connection mode`, it is necessary do as following:
+*
+*                    1. Set bit `ESP_LE_AUTH_REQ_SC_ONLY` (`param_type` is
+*                    `ESP_BLE_SM_AUTHEN_REQ_MODE`), bit `ESP_LE_AUTH_BOND` and bit
+*                    `ESP_LE_AUTH_REQ_MITM` is optional as required.
+*
+*                    2. Set to `ESP_BLE_ONLY_ACCEPT_SPECIFIED_AUTH_ENABLE` (`param_type` is
+*                    `ESP_BLE_SM_ONLY_ACCEPT_SPECIFIED_SEC_AUTH`).
+*
+* @param[in]       param_type : the type of the param which to be set
+* @param[in]       value  : the param value
+* @param[in]       len : the length of the param value
+*
+* @return            - ESP_OK : success
+*                       - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_set_security_param(esp_ble_sm_param_t param_type,
+                                         void *value, uint8_t len);
+
+/**
+* @brief             Grant security request access.
+*
+* @param[in]       bd_addr : BD address of the peer
+* @param[in]       accept  :  accept the security request or not
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_security_rsp(esp_bd_addr_t bd_addr,  bool accept);
+
+
+/**
+* @brief             Set a gap parameter value. Use this function to change
+*                    the default GAP parameter values.
+*
+* @param[in]       bd_addr : the address of the peer device need to encryption
+* @param[in]       sec_act  : This is the security action to indicate
+*                                   what kind of BLE security level is required for
+*                                   the BLE link if the BLE is supported
+*
+* @return            - ESP_OK : success
+*                       - other  : failed
+*
+*/
+esp_err_t esp_ble_set_encryption(esp_bd_addr_t bd_addr, esp_ble_sec_act_t sec_act);
+
+/**
+* @brief          Reply the key value to the peer device in the legacy connection stage.
+*
+* @param[in]      bd_addr : BD address of the peer
+* @param[in]      accept : passkey entry successful or declined.
+* @param[in]      passkey : passkey value, must be a 6 digit number,
+*                                     can be lead by 0.
+*
+* @return            - ESP_OK : success
+*                  - other  : failed
+*
+*/
+esp_err_t esp_ble_passkey_reply(esp_bd_addr_t bd_addr, bool accept, uint32_t passkey);
+
+
+/**
+* @brief           Reply the confirm value to the peer device in the secure connection stage.
+*
+* @param[in]       bd_addr : BD address of the peer device
+* @param[in]       accept : numbers to compare are the same or different.
+*
+* @return            - ESP_OK : success
+*                       - other  : failed
+*
+*/
+esp_err_t esp_ble_confirm_reply(esp_bd_addr_t bd_addr, bool accept);
+
+/**
+* @brief           Removes a device from the security database list of
+*                  peer device. It manages unpairing event while connected.
+*
+* @param[in]       bd_addr : BD address of the peer device
+*
+* @return            - ESP_OK : success
+*                       - other  : failed
+*
+*/
+esp_err_t esp_ble_remove_bond_device(esp_bd_addr_t bd_addr);
+
+/**
+* @brief           Get the device number from the security database list of peer device.
+*                  It will return the device bonded number immediately.
+*
+* @return          - >= 0 : bonded devices number.
+*                  - ESP_FAIL  : failed
+*
+*/
+int esp_ble_get_bond_device_num(void);
+
+
+/**
+* @brief           Get the device from the security database list of peer device.
+*                  It will return the device bonded information immediately.
+* @param[inout]    dev_num: Indicate the dev_list array(buffer) size as input.
+*                           If dev_num is large enough, it means the actual number as output.
+*                           Suggest that dev_num value equal to esp_ble_get_bond_device_num().
+*
+* @param[out]      dev_list: an array(buffer) of `esp_ble_bond_dev_t` type. Use for storing the bonded devices address.
+*                            The dev_list should be allocated by who call this API.
+* @return          - ESP_OK : success
+*                  - other  : failed
+*
+*/
+esp_err_t esp_ble_get_bond_device_list(int *dev_num, esp_ble_bond_dev_t *dev_list);
+
+/**
+* @brief           This function is called to provide the OOB data for
+*                  SMP in response to ESP_GAP_BLE_OOB_REQ_EVT
+*
+* @param[in]       bd_addr: BD address of the peer device.
+* @param[in]       TK: TK value, the TK value shall be a 128-bit random number
+* @param[in]       len: length of tk, should always be 128-bit
+*
+* @return          - ESP_OK : success
+*                  - other  : failed
+*
+*/
+esp_err_t esp_ble_oob_req_reply(esp_bd_addr_t bd_addr, uint8_t *TK, uint8_t len);
+
+#endif /* #if (SMP_INCLUDED == TRUE) */
+
+/**
+* @brief           This function is to disconnect the physical connection of the peer device
+*                  gattc may have multiple virtual GATT server connections when multiple app_id registered.
+*                  esp_ble_gattc_close (esp_gatt_if_t gattc_if, uint16_t conn_id) only close one virtual GATT server connection.
+*                  if there exist other virtual GATT server connections, it does not disconnect the physical connection.
+*                  esp_ble_gap_disconnect(esp_bd_addr_t remote_device) disconnect the physical connection directly.
+*
+*
+*
+* @param[in]       remote_device : BD address of the peer device
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_disconnect(esp_bd_addr_t remote_device);
+
+/**
+* @brief           This function is called to read the connection
+*                  parameters information of the device
+*
+* @param[in]       bd_addr: BD address of the peer device.
+* @param[out]      conn_params: the connection parameters information
+*
+* @return          - ESP_OK : success
+*                  - other  : failed
+*
+*/
+esp_err_t esp_ble_get_current_conn_params(esp_bd_addr_t bd_addr, esp_gap_conn_params_t *conn_params);
+
+/**
+* @brief            BLE set channels
+*
+* @param[in]        channels :   The n th such field (in the range 0 to 36) contains the value for the link layer channel index n.
+*                                0 means channel n is bad.
+*                                1 means channel n is unknown.
+*                                The most significant bits are reserved and shall be set to 0.
+*                                At least one channel shall be marked as unknown.
+*
+* @return           - ESP_OK : success
+*                   - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+*                   - other  : failed
+*
+*/
+esp_err_t esp_gap_ble_set_channels(esp_gap_ble_channels channels);
+
+/**
+* @brief           This function is called to authorized a link after Authentication(MITM protection)
+*
+* @param[in]       bd_addr: BD address of the peer device.
+* @param[out]      authorize: Authorized the link or not.
+*
+* @return          - ESP_OK : success
+*                  - other  : failed
+*
+*/
+esp_err_t esp_gap_ble_set_authorization(esp_bd_addr_t bd_addr, bool authorize);
+
+#if (BLE_50_FEATURE_SUPPORT == TRUE)
+
+/**
+* @brief           This function is used to read the current transmitter PHY
+*                  and receiver PHY on the connection identified by remote address.
+*
+* @param[in]       bd_addr : BD address of the peer device
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_read_phy(esp_bd_addr_t bd_addr);
+
+/**
+* @brief           This function is used to allows the Host to specify its preferred values
+*                  for the transmitter PHY and receiver PHY to be used for all subsequent connections
+*                  over the LE transport.
+*
+* @param[in]       tx_phy_mask : indicates the transmitter PHYs that the Host prefers the Controller to use
+* @param[in]       rx_phy_mask : indicates the receiver PHYs that the Host prefers the Controller to use
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_set_prefered_default_phy(esp_ble_gap_phy_mask_t tx_phy_mask, esp_ble_gap_phy_mask_t rx_phy_mask);
+/**
+* @brief           This function is used to set the PHY preferences for the connection identified by the remote address.
+*                  The Controller might not be able to make the change (e.g. because the peer does not support the requested PHY)
+*                  or may decide that the current PHY is preferable.
+*
+* @param[in]       bd_addr : remote address
+* @param[in]       all_phys_mask : a bit field that allows the Host to specify
+* @param[in]       tx_phy_mask : a bit field that indicates the transmitter PHYs that the Host prefers the Controller to use
+* @param[in]       rx_phy_mask : a bit field that indicates the receiver PHYs that the Host prefers the Controller to use
+* @param[in]       phy_options : a bit field that allows the Host to specify options for PHYs
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_set_prefered_phy(esp_bd_addr_t bd_addr,
+                                       esp_ble_gap_all_phys_t all_phys_mask,
+                                       esp_ble_gap_phy_mask_t tx_phy_mask,
+                                       esp_ble_gap_phy_mask_t rx_phy_mask,
+                                       esp_ble_gap_prefer_phy_options_t phy_options);
+
+/**
+* @brief           This function is used by the Host to set the random device address specified by the Random_Address parameter.
+*
+* @param[in]       instance  : Used to identify an advertising set
+* @param[in]       rand_addr : Random Device Address
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_ext_adv_set_rand_addr(uint8_t instance, esp_bd_addr_t rand_addr);
+
+/**
+* @brief           This function is used by the Host to set the advertising parameters.
+*
+* @param[in]       instance : identifies the advertising set whose parameters are being configured.
+* @param[in]       params   : advertising parameters
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_ext_adv_set_params(uint8_t instance, const esp_ble_gap_ext_adv_params_t *params);
+
+/**
+* @brief           This function is used to set the data used in advertising PDUs that have a data field
+*
+* @param[in]       instance : identifies the advertising set whose data are being configured
+* @param[in]       length   : data length
+* @param[in]       data     : data information
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_config_ext_adv_data_raw(uint8_t instance, uint16_t length, const uint8_t *data);
+
+/**
+* @brief           This function is used to provide scan response data used in scanning response PDUs
+*
+* @param[in]       instance : identifies the advertising set whose response data are being configured.
+* @param[in]       length : responsedata length
+* @param[in]       scan_rsp_data : response data information
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_config_ext_scan_rsp_data_raw(uint8_t instance, uint16_t length,
+                                                                   const uint8_t *scan_rsp_data);
+/**
+* @brief           This function is used to request the Controller to enable one or more
+*                  advertising sets using the advertising sets identified by the instance parameter.
+*
+* @param[in]       num_adv : Number of advertising sets to enable or disable
+* @param[in]       ext_adv : adv parameters
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_ext_adv_start(uint8_t num_adv, const esp_ble_gap_ext_adv_t *ext_adv);
+
+/**
+* @brief           This function is used to request the Controller to disable one or more
+*                  advertising sets using the advertising sets identified by the instance parameter.
+*
+* @param[in]       num_adv : Number of advertising sets to enable or disable
+* @param[in]       ext_adv_inst : ext adv instance
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_ext_adv_stop(uint8_t num_adv, const uint8_t *ext_adv_inst);
+
+/**
+* @brief           This function is used to remove an advertising set from the Controller.
+*
+* @param[in]       instance : Used to identify an advertising set
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_ext_adv_set_remove(uint8_t instance);
+
+/**
+* @brief           This function is used to remove all existing advertising sets from the Controller.
+*
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_ext_adv_set_clear(void);
+
+/**
+* @brief           This function is used by the Host to set the parameters for periodic advertising.
+*
+* @param[in]       instance : identifies the advertising set whose periodic advertising parameters are being configured.
+* @param[in]       params : periodic adv parameters
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_periodic_adv_set_params(uint8_t instance, const esp_ble_gap_periodic_adv_params_t *params);
+
+/**
+* @brief           This function is used to set the data used in periodic advertising PDUs.
+*
+* @param[in]       instance : identifies the advertising set whose periodic advertising parameters are being configured.
+* @param[in]       length : the length of periodic data
+* @param[in]       data : periodic data information
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_config_periodic_adv_data_raw(uint8_t instance, uint16_t length,
+                                                                           const uint8_t *data);
+/**
+* @brief           This function is used to request the Controller to enable the periodic advertising for the advertising set specified
+*
+* @param[in]       instance : Used to identify an advertising set
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_periodic_adv_start(uint8_t instance);
+
+/**
+* @brief           This function is used to request the Controller to disable the periodic advertising for the advertising set specified
+*
+* @param[in]       instance : Used to identify an advertising set
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_periodic_adv_stop(uint8_t instance);
+
+/**
+* @brief           This function is used to set the extended scan parameters to be used on the advertising channels.
+*
+* @param[in]       params : scan parameters
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_set_ext_scan_params(const esp_ble_ext_scan_params_t *params);
+
+/**
+* @brief           This function is used to enable scanning.
+*
+* @param[in]       duration : Scan duration
+* @param[in]       period  : Time interval from when the Controller started its last Scan Duration until it begins the subsequent Scan Duration.
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_start_ext_scan(uint32_t duration, uint16_t period);
+
+/**
+* @brief           This function is used to disable scanning.
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_stop_ext_scan(void);
+
+/**
+* @brief           This function is used to synchronize with periodic advertising from an advertiser and begin receiving periodic advertising packets.
+*
+* @param[in]       params : sync parameters
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_periodic_adv_create_sync(const esp_ble_gap_periodic_adv_sync_params_t *params);
+
+/**
+* @brief           This function is used to cancel the LE_Periodic_Advertising_Create_Sync command while it is pending.
+*
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_periodic_adv_sync_cancel(void);
+
+/**
+* @brief           This function is used to stop reception of the periodic advertising identified by the Sync Handle parameter.
+*
+* @param[in]       sync_handle : identify the periodic advertiser
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_periodic_adv_sync_terminate(uint16_t sync_handle);
+
+/**
+* @brief           This function is used to add a single device to the Periodic Advertiser list stored in the Controller
+*
+* @param[in]       addr_type : address type
+* @param[in]       addr : Device Address
+* @param[in]       sid : Advertising SID subfield in the ADI field used to identify the Periodic Advertising
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_periodic_adv_add_dev_to_list(esp_ble_addr_type_t addr_type,
+                                                                         esp_bd_addr_t addr,
+                                                                         uint8_t sid);
+
+/**
+* @brief           This function is used to remove one device from the list of Periodic Advertisers stored in the Controller.
+*                  Removals from the Periodic Advertisers List take effect immediately.
+*
+* @param[in]       addr_type : address type
+* @param[in]       addr : Device Address
+* @param[in]       sid : Advertising SID subfield in the ADI field used to identify the Periodic Advertising
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_periodic_adv_remove_dev_from_list(esp_ble_addr_type_t addr_type,
+                                                                         esp_bd_addr_t addr,
+                                                                         uint8_t sid);
+/**
+* @brief           This function is used to remove all devices from the list of Periodic Advertisers in the Controller.
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_periodic_adv_clear_dev(void);
+
+/**
+* @brief           This function is used to set aux connection parameters
+*
+* @param[in]       addr : device address
+* @param[in]       phy_mask : indicates the PHY(s) on which the advertising packets should be received on the primary advertising channel and the PHYs for which connection parameters have been specified.
+* @param[in]       phy_1m_conn_params : Scan connectable advertisements on the LE 1M PHY. Connection parameters for the LE 1M PHY are provided.
+* @param[in]       phy_2m_conn_params : Connection parameters for the LE 2M PHY are provided.
+* @param[in]       phy_coded_conn_params : Scan connectable advertisements on the LE Coded PHY. Connection parameters for the LE Coded PHY are provided.
+*
+* @return            - ESP_OK : success
+*                    - other  : failed
+*
+*/
+esp_err_t esp_ble_gap_prefer_ext_connect_params_set(esp_bd_addr_t addr,
+                                                    esp_ble_gap_phy_mask_t phy_mask,
+                                                    const esp_ble_gap_conn_params_t *phy_1m_conn_params,
+                                                    const esp_ble_gap_conn_params_t *phy_2m_conn_params,
+                                                    const esp_ble_gap_conn_params_t *phy_coded_conn_params);
+
+#endif //#if (BLE_50_FEATURE_SUPPORT == TRUE)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_GAP_BLE_API_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h
new file mode 100644
index 00000000000..285cbb028cf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h
@@ -0,0 +1,777 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_GAP_BT_API_H__
+#define __ESP_GAP_BT_API_H__
+
+#include <stdint.h>
+#include "esp_err.h"
+#include "esp_bt_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// RSSI threshold
+#define ESP_BT_GAP_RSSI_HIGH_THRLD  -20             /*!< High RSSI threshold */
+#define ESP_BT_GAP_RSSI_LOW_THRLD   -45             /*!< Low RSSI threshold */
+
+/// Class of device
+typedef struct {
+    uint32_t      reserved_2: 2;                    /*!< undefined */
+    uint32_t      minor: 6;                         /*!< minor class */
+    uint32_t      major: 5;                         /*!< major class */
+    uint32_t      service: 11;                      /*!< service class */
+    uint32_t      reserved_8: 8;                    /*!< undefined */
+} esp_bt_cod_t;
+
+/// class of device settings
+typedef enum {
+    ESP_BT_SET_COD_MAJOR_MINOR     = 0x01,          /*!< overwrite major, minor class */
+    ESP_BT_SET_COD_SERVICE_CLASS   = 0x02,          /*!< set the bits in the input, the current bit will remain */
+    ESP_BT_CLR_COD_SERVICE_CLASS   = 0x04,          /*!< clear the bits in the input, others will remain */
+    ESP_BT_SET_COD_ALL             = 0x08,          /*!< overwrite major, minor, set the bits in service class */
+    ESP_BT_INIT_COD                = 0x0a,          /*!< overwrite major, minor, and service class */
+} esp_bt_cod_mode_t;
+
+#define ESP_BT_GAP_AFH_CHANNELS_LEN     10
+typedef uint8_t esp_bt_gap_afh_channels[ESP_BT_GAP_AFH_CHANNELS_LEN];
+
+
+/// Discoverability and Connectability mode
+typedef enum {
+    ESP_BT_NON_CONNECTABLE,             /*!< Non-connectable */
+    ESP_BT_CONNECTABLE,                 /*!< Connectable */
+} esp_bt_connection_mode_t;
+
+typedef enum {
+    ESP_BT_NON_DISCOVERABLE,            /*!< Non-discoverable */
+    ESP_BT_LIMITED_DISCOVERABLE,        /*!< Limited Discoverable */
+    ESP_BT_GENERAL_DISCOVERABLE,        /*!< General Discoverable */
+} esp_bt_discovery_mode_t;
+
+/// Bluetooth Device Property type
+typedef enum {
+    ESP_BT_GAP_DEV_PROP_BDNAME = 1,                 /*!< Bluetooth device name, value type is int8_t [] */
+    ESP_BT_GAP_DEV_PROP_COD,                        /*!< Class of Device, value type is uint32_t */
+    ESP_BT_GAP_DEV_PROP_RSSI,                       /*!< Received Signal strength Indication, value type is int8_t, ranging from -128 to 127 */
+    ESP_BT_GAP_DEV_PROP_EIR,                        /*!< Extended Inquiry Response, value type is uint8_t [] */
+} esp_bt_gap_dev_prop_type_t;
+
+/// Maximum bytes of Bluetooth device name
+#define ESP_BT_GAP_MAX_BDNAME_LEN             (248)
+
+/// Maximum size of EIR Significant part
+#define ESP_BT_GAP_EIR_DATA_LEN               (240)
+
+/// Bluetooth Device Property Descriptor
+typedef struct {
+    esp_bt_gap_dev_prop_type_t type;                /*!< Device property type */
+    int len;                                        /*!< Device property value length */
+    void *val;                                      /*!< Device property value */
+} esp_bt_gap_dev_prop_t;
+
+/// Extended Inquiry Response data type
+#define ESP_BT_EIR_TYPE_FLAGS                   0x01      /*!< Flag with information such as BR/EDR and LE support */
+#define ESP_BT_EIR_TYPE_INCMPL_16BITS_UUID      0x02      /*!< Incomplete list of 16-bit service UUIDs */
+#define ESP_BT_EIR_TYPE_CMPL_16BITS_UUID        0x03      /*!< Complete list of 16-bit service UUIDs */
+#define ESP_BT_EIR_TYPE_INCMPL_32BITS_UUID      0x04      /*!< Incomplete list of 32-bit service UUIDs */
+#define ESP_BT_EIR_TYPE_CMPL_32BITS_UUID        0x05      /*!< Complete list of 32-bit service UUIDs */
+#define ESP_BT_EIR_TYPE_INCMPL_128BITS_UUID     0x06      /*!< Incomplete list of 128-bit service UUIDs */
+#define ESP_BT_EIR_TYPE_CMPL_128BITS_UUID       0x07      /*!< Complete list of 128-bit service UUIDs */
+#define ESP_BT_EIR_TYPE_SHORT_LOCAL_NAME        0x08      /*!< Shortened Local Name */
+#define ESP_BT_EIR_TYPE_CMPL_LOCAL_NAME         0x09      /*!< Complete Local Name */
+#define ESP_BT_EIR_TYPE_TX_POWER_LEVEL          0x0a      /*!< Tx power level, value is 1 octet ranging from  -127 to 127, unit is dBm*/
+#define ESP_BT_EIR_TYPE_URL                     0x24      /*!< Uniform resource identifier */
+#define ESP_BT_EIR_TYPE_MANU_SPECIFIC           0xff      /*!< Manufacturer specific data */
+#define  ESP_BT_EIR_TYPE_MAX_NUM                12        /*!< MAX number of EIR type */
+
+typedef uint8_t esp_bt_eir_type_t;
+
+
+
+/* ESP_BT_EIR_FLAG bit definition */
+#define ESP_BT_EIR_FLAG_LIMIT_DISC         (0x01 << 0)
+#define ESP_BT_EIR_FLAG_GEN_DISC           (0x01 << 1)
+#define ESP_BT_EIR_FLAG_BREDR_NOT_SPT      (0x01 << 2)
+#define ESP_BT_EIR_FLAG_DMT_CONTROLLER_SPT (0x01 << 3)
+#define ESP_BT_EIR_FLAG_DMT_HOST_SPT       (0x01 << 4)
+
+#define ESP_BT_EIR_MAX_LEN                  240
+/// EIR data content, according to "Supplement to the Bluetooth Core Specification"
+typedef struct {
+    bool                    fec_required;           /*!< FEC is required or not, true by default */
+    bool                    include_txpower;        /*!< EIR data include TX power, false by default */
+    bool                    include_uuid;           /*!< EIR data include UUID, false by default */
+    uint8_t                 flag;                   /*!< EIR flags, see ESP_BT_EIR_FLAG for details, EIR will not include flag if it is 0, 0 by default */
+    uint16_t                manufacturer_len;       /*!< Manufacturer data length, 0 by default */
+    uint8_t                 *p_manufacturer_data;   /*!< Manufacturer data point */
+    uint16_t                url_len;                /*!< URL length, 0 by default */
+    uint8_t                 *p_url;                 /*!< URL point */
+} esp_bt_eir_data_t;
+
+/// Major service class field of Class of Device, mutiple bits can be set
+typedef enum {
+    ESP_BT_COD_SRVC_NONE                     =     0,    /*!< None indicates an invalid value */
+    ESP_BT_COD_SRVC_LMTD_DISCOVER            =   0x1,    /*!< Limited Discoverable Mode */
+    ESP_BT_COD_SRVC_POSITIONING              =   0x8,    /*!< Positioning (Location identification) */
+    ESP_BT_COD_SRVC_NETWORKING               =  0x10,    /*!< Networking, e.g. LAN, Ad hoc */
+    ESP_BT_COD_SRVC_RENDERING                =  0x20,    /*!< Rendering, e.g. Printing, Speakers */
+    ESP_BT_COD_SRVC_CAPTURING                =  0x40,    /*!< Capturing, e.g. Scanner, Microphone */
+    ESP_BT_COD_SRVC_OBJ_TRANSFER             =  0x80,    /*!< Object Transfer, e.g. v-Inbox, v-Folder */
+    ESP_BT_COD_SRVC_AUDIO                    = 0x100,    /*!< Audio, e.g. Speaker, Microphone, Headset service */
+    ESP_BT_COD_SRVC_TELEPHONY                = 0x200,    /*!< Telephony, e.g. Cordless telephony, Modem, Headset service */
+    ESP_BT_COD_SRVC_INFORMATION              = 0x400,    /*!< Information, e.g., WEB-server, WAP-server */
+} esp_bt_cod_srvc_t;
+
+typedef enum{
+    ESP_BT_PIN_TYPE_VARIABLE = 0,                       /*!< Refer to BTM_PIN_TYPE_VARIABLE */
+    ESP_BT_PIN_TYPE_FIXED    = 1,                       /*!< Refer to BTM_PIN_TYPE_FIXED */
+} esp_bt_pin_type_t;
+
+#define ESP_BT_PIN_CODE_LEN        16                   /*!< Max pin code length */
+typedef uint8_t esp_bt_pin_code_t[ESP_BT_PIN_CODE_LEN]; /*!< Pin Code (upto 128 bits) MSB is 0 */
+
+typedef enum {
+    ESP_BT_SP_IOCAP_MODE = 0,                            /*!< Set IO mode */
+    //ESP_BT_SP_OOB_DATA, //TODO                         /*!< Set OOB data */
+} esp_bt_sp_param_t;
+
+/* relate to BTM_IO_CAP_xxx in stack/btm_api.h */
+#define ESP_BT_IO_CAP_OUT                      0        /*!< DisplayOnly */         /* relate to BTM_IO_CAP_OUT in stack/btm_api.h */
+#define ESP_BT_IO_CAP_IO                       1        /*!< DisplayYesNo */        /* relate to BTM_IO_CAP_IO in stack/btm_api.h */
+#define ESP_BT_IO_CAP_IN                       2        /*!< KeyboardOnly */        /* relate to BTM_IO_CAP_IN in stack/btm_api.h */
+#define ESP_BT_IO_CAP_NONE                     3        /*!< NoInputNoOutput */     /* relate to BTM_IO_CAP_NONE in stack/btm_api.h */
+typedef uint8_t esp_bt_io_cap_t;                        /*!< Combination of the IO Capability */
+
+
+/* BTM Power manager modes */
+#define ESP_BT_PM_MD_ACTIVE                 0x00        /*!< Active mode */
+#define ESP_BT_PM_MD_HOLD                   0x01        /*!< Hold mode */
+#define ESP_BT_PM_MD_SNIFF                  0x02        /*!< Sniff mode */
+#define ESP_BT_PM_MD_PARK                   0x03        /*!< Park state */
+typedef uint8_t esp_bt_pm_mode_t;
+
+
+
+/// Bits of major service class field
+#define ESP_BT_COD_SRVC_BIT_MASK              (0xffe000) /*!< Major service bit mask */
+#define ESP_BT_COD_SRVC_BIT_OFFSET            (13)       /*!< Major service bit offset */
+
+/// Major device class field of Class of Device
+typedef enum {
+    ESP_BT_COD_MAJOR_DEV_MISC                = 0,    /*!< Miscellaneous */
+    ESP_BT_COD_MAJOR_DEV_COMPUTER            = 1,    /*!< Computer */
+    ESP_BT_COD_MAJOR_DEV_PHONE               = 2,    /*!< Phone(cellular, cordless, pay phone, modem */
+    ESP_BT_COD_MAJOR_DEV_LAN_NAP             = 3,    /*!< LAN, Network Access Point */
+    ESP_BT_COD_MAJOR_DEV_AV                  = 4,    /*!< Audio/Video(headset, speaker, stereo, video display, VCR */
+    ESP_BT_COD_MAJOR_DEV_PERIPHERAL          = 5,    /*!< Peripheral(mouse, joystick, keyboard) */
+    ESP_BT_COD_MAJOR_DEV_IMAGING             = 6,    /*!< Imaging(printer, scanner, camera, display */
+    ESP_BT_COD_MAJOR_DEV_WEARABLE            = 7,    /*!< Wearable */
+    ESP_BT_COD_MAJOR_DEV_TOY                 = 8,    /*!< Toy */
+    ESP_BT_COD_MAJOR_DEV_HEALTH              = 9,    /*!< Health */
+    ESP_BT_COD_MAJOR_DEV_UNCATEGORIZED       = 31,   /*!< Uncategorized: device not specified */
+} esp_bt_cod_major_dev_t;
+
+/// Bits of major device class field
+#define ESP_BT_COD_MAJOR_DEV_BIT_MASK         (0x1f00) /*!< Major device bit mask */
+#define ESP_BT_COD_MAJOR_DEV_BIT_OFFSET       (8)      /*!< Major device bit offset */
+
+/// Bits of minor device class field
+#define ESP_BT_COD_MINOR_DEV_BIT_MASK         (0xfc)   /*!< Minor device bit mask */
+#define ESP_BT_COD_MINOR_DEV_BIT_OFFSET       (2)      /*!< Minor device bit offset */
+
+/// Bits of format type
+#define ESP_BT_COD_FORMAT_TYPE_BIT_MASK       (0x03)   /*!< Format type bit mask */
+#define ESP_BT_COD_FORMAT_TYPE_BIT_OFFSET     (0)      /*!< Format type bit offset */
+
+/// Class of device format type 1
+#define ESP_BT_COD_FORMAT_TYPE_1              (0x00)
+
+/** Bluetooth Device Discovery state */
+typedef enum {
+    ESP_BT_GAP_DISCOVERY_STOPPED,                   /*!< Device discovery stopped */
+    ESP_BT_GAP_DISCOVERY_STARTED,                   /*!< Device discovery started */
+} esp_bt_gap_discovery_state_t;
+
+/// BT GAP callback events
+typedef enum {
+    ESP_BT_GAP_DISC_RES_EVT = 0,                    /*!< Device discovery result event */
+    ESP_BT_GAP_DISC_STATE_CHANGED_EVT,              /*!< Discovery state changed event */
+    ESP_BT_GAP_RMT_SRVCS_EVT,                       /*!< Get remote services event */
+    ESP_BT_GAP_RMT_SRVC_REC_EVT,                    /*!< Get remote service record event */
+    ESP_BT_GAP_AUTH_CMPL_EVT,                       /*!< Authentication complete event */
+    ESP_BT_GAP_PIN_REQ_EVT,                         /*!< Legacy Pairing Pin code request */
+    ESP_BT_GAP_CFM_REQ_EVT,                         /*!< Security Simple Pairing User Confirmation request. */
+    ESP_BT_GAP_KEY_NOTIF_EVT,                       /*!< Security Simple Pairing Passkey Notification */
+    ESP_BT_GAP_KEY_REQ_EVT,                         /*!< Security Simple Pairing Passkey request */
+    ESP_BT_GAP_READ_RSSI_DELTA_EVT,                 /*!< Read rssi event */
+    ESP_BT_GAP_CONFIG_EIR_DATA_EVT,                 /*!< Config EIR data event */
+    ESP_BT_GAP_SET_AFH_CHANNELS_EVT,                /*!< Set AFH channels event */
+    ESP_BT_GAP_READ_REMOTE_NAME_EVT,                /*!< Read Remote Name event */
+    ESP_BT_GAP_MODE_CHG_EVT,
+    ESP_BT_GAP_REMOVE_BOND_DEV_COMPLETE_EVT,         /*!< remove bond device complete event */
+    ESP_BT_GAP_QOS_CMPL_EVT,                        /*!< QOS complete event */
+    ESP_BT_GAP_EVT_MAX,
+} esp_bt_gap_cb_event_t;
+
+/** Inquiry Mode */
+typedef enum {
+    ESP_BT_INQ_MODE_GENERAL_INQUIRY,                /*!< General inquiry mode */
+    ESP_BT_INQ_MODE_LIMITED_INQUIRY,                /*!< Limited inquiry mode */
+} esp_bt_inq_mode_t;
+
+/** Minimum and Maximum inquiry length*/
+#define ESP_BT_GAP_MIN_INQ_LEN                (0x01)  /*!< Minimum inquiry duration, unit is 1.28s */
+#define ESP_BT_GAP_MAX_INQ_LEN                (0x30)  /*!< Maximum inquiry duration, unit is 1.28s */
+
+/// GAP state callback parameters
+typedef union {
+    /**
+     * @brief ESP_BT_GAP_DISC_RES_EVT
+     */
+    struct disc_res_param {
+        esp_bd_addr_t bda;                     /*!< remote bluetooth device address*/
+        int num_prop;                          /*!< number of properties got */
+        esp_bt_gap_dev_prop_t *prop;           /*!< properties discovered from the new device */
+    } disc_res;                                /*!< discovery result parameter struct */
+
+    /**
+     * @brief  ESP_BT_GAP_DISC_STATE_CHANGED_EVT
+     */
+    struct disc_state_changed_param {
+        esp_bt_gap_discovery_state_t state;    /*!< discovery state */
+    } disc_st_chg;                             /*!< discovery state changed parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_RMT_SRVCS_EVT
+     */
+    struct rmt_srvcs_param {
+        esp_bd_addr_t bda;                     /*!< remote bluetooth device address*/
+        esp_bt_status_t stat;                  /*!< service search status */
+        int num_uuids;                         /*!< number of UUID in uuid_list */
+        esp_bt_uuid_t *uuid_list;              /*!< list of service UUIDs of remote device */
+    } rmt_srvcs;                               /*!< services of remote device parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_RMT_SRVC_REC_EVT
+     */
+    struct rmt_srvc_rec_param {
+        esp_bd_addr_t bda;                     /*!< remote bluetooth device address*/
+        esp_bt_status_t stat;                  /*!< service search status */
+    } rmt_srvc_rec;                            /*!< specific service record from remote device parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_READ_RSSI_DELTA_EVT *
+     */
+    struct read_rssi_delta_param {
+        esp_bd_addr_t bda;                     /*!< remote bluetooth device address*/
+        esp_bt_status_t stat;                  /*!< read rssi status */
+        int8_t rssi_delta;                     /*!< rssi delta value range -128 ~127, The value zero indicates that the RSSI is inside the Golden Receive Power Range, the Golden Receive Power Range is from ESP_BT_GAP_RSSI_LOW_THRLD to ESP_BT_GAP_RSSI_HIGH_THRLD */
+    } read_rssi_delta;                         /*!< read rssi parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_CONFIG_EIR_DATA_EVT *
+     */
+    struct config_eir_data_param {
+        esp_bt_status_t stat;                                   /*!< config EIR status:
+                                                                    ESP_BT_STATUS_SUCCESS: config success
+                                                                    ESP_BT_STATUS_EIR_TOO_LARGE: the EIR data is more than 240B. The EIR may not contain the whole data.
+                                                                    others: failed
+                                                                */
+        uint8_t eir_type_num;                                   /*!< the number of EIR types in EIR type */
+        esp_bt_eir_type_t eir_type[ESP_BT_EIR_TYPE_MAX_NUM];    /*!< EIR types in EIR type */
+    } config_eir_data;                                          /*!< config EIR data */
+
+    /**
+     * @brief ESP_BT_GAP_AUTH_CMPL_EVT
+     */
+    struct auth_cmpl_param {
+        esp_bd_addr_t bda;                     /*!< remote bluetooth device address*/
+        esp_bt_status_t stat;                  /*!< authentication complete status */
+        uint8_t device_name[ESP_BT_GAP_MAX_BDNAME_LEN + 1]; /*!< device name */
+    } auth_cmpl;                               /*!< authentication complete parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_PIN_REQ_EVT
+     */
+    struct pin_req_param {
+        esp_bd_addr_t bda;                     /*!< remote bluetooth device address*/
+        bool min_16_digit;                     /*!< TRUE if the pin returned must be at least 16 digits */
+    } pin_req;                                 /*!< pin request parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_CFM_REQ_EVT
+     */
+    struct cfm_req_param {
+        esp_bd_addr_t bda;                     /*!< remote bluetooth device address*/
+        uint32_t num_val;                      /*!< the numeric value for comparison. */
+    } cfm_req;                                 /*!< confirm request parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_KEY_NOTIF_EVT
+     */
+    struct key_notif_param {
+        esp_bd_addr_t bda;                     /*!< remote bluetooth device address*/
+        uint32_t passkey;                      /*!< the numeric value for passkey entry. */
+    } key_notif;                               /*!< passkey notif parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_KEY_REQ_EVT
+     */
+    struct key_req_param {
+        esp_bd_addr_t bda;                     /*!< remote bluetooth device address*/
+    } key_req;                                 /*!< passkey request parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_SET_AFH_CHANNELS_EVT
+     */
+    struct set_afh_channels_param {
+        esp_bt_status_t stat;                  /*!< set AFH channel status */
+    } set_afh_channels;                        /*!< set AFH channel parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_READ_REMOTE_NAME_EVT
+     */
+    struct read_rmt_name_param {
+        esp_bt_status_t stat;                  /*!< read Remote Name status */
+        uint8_t rmt_name[ESP_BT_GAP_MAX_BDNAME_LEN + 1]; /*!< Remote device name */
+    } read_rmt_name;                        /*!< read Remote Name parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_MODE_CHG_EVT
+     */
+    struct mode_chg_param {
+        esp_bd_addr_t bda;                      /*!< remote bluetooth device address*/
+        esp_bt_pm_mode_t mode;                  /*!< PM mode*/
+    } mode_chg;                                 /*!< mode change event parameter struct */
+
+    /**
+     * @brief ESP_BT_GAP_REMOVE_BOND_DEV_COMPLETE_EVT
+     */
+    struct bt_remove_bond_dev_cmpl_evt_param {
+        esp_bd_addr_t bda;                          /*!< remote bluetooth device address*/
+        esp_bt_status_t status;                     /*!< Indicate the remove bond device operation success status */
+    }remove_bond_dev_cmpl;                           /*!< Event parameter of ESP_BT_GAP_REMOVE_BOND_DEV_COMPLETE_EVT */
+
+    /**
+     * @brief ESP_BT_GAP_QOS_CMPL_EVT
+     */
+    struct qos_cmpl_param {
+        esp_bt_status_t stat;                  /*!< QoS status */
+        esp_bd_addr_t bda;                     /*!< remote bluetooth device address*/
+        uint32_t t_poll;                       /*!< poll interval, the maximum time between transmissions
+                                                    which from the master to a particular slave on the ACL
+                                                    logical transport. unit is 0.625ms. */
+    } qos_cmpl;                                /*!< QoS complete parameter struct */
+} esp_bt_gap_cb_param_t;
+
+/**
+ * @brief           bluetooth GAP callback function type
+ *
+ * @param           event : Event type
+ *
+ * @param           param : Pointer to callback parameter
+ */
+typedef void (* esp_bt_gap_cb_t)(esp_bt_gap_cb_event_t event, esp_bt_gap_cb_param_t *param);
+
+/**
+ * @brief           get major service field of COD
+ *
+ * @param[in]       cod: Class of Device
+ *
+ * @return          major service bits
+ */
+static inline uint32_t esp_bt_gap_get_cod_srvc(uint32_t cod)
+{
+    return (cod & ESP_BT_COD_SRVC_BIT_MASK) >> ESP_BT_COD_SRVC_BIT_OFFSET;
+}
+
+/**
+ * @brief           get major device field of COD
+ *
+ * @param[in]       cod: Class of Device
+ *
+ * @return          major device bits
+ */
+static inline uint32_t esp_bt_gap_get_cod_major_dev(uint32_t cod)
+{
+    return (cod & ESP_BT_COD_MAJOR_DEV_BIT_MASK) >> ESP_BT_COD_MAJOR_DEV_BIT_OFFSET;
+}
+
+/**
+ * @brief           get minor service field of COD
+ *
+ * @param[in]       cod: Class of Device
+ *
+ * @return          minor service bits
+ */
+static inline uint32_t esp_bt_gap_get_cod_minor_dev(uint32_t cod)
+{
+    return (cod & ESP_BT_COD_MINOR_DEV_BIT_MASK) >> ESP_BT_COD_MINOR_DEV_BIT_OFFSET;
+}
+
+/**
+ * @brief           get format type of COD
+ *
+ * @param[in]       cod: Class of Device
+ *
+ * @return          format type
+ */
+static inline uint32_t esp_bt_gap_get_cod_format_type(uint32_t cod)
+{
+    return (cod & ESP_BT_COD_FORMAT_TYPE_BIT_MASK);
+}
+
+/**
+ * @brief           decide the integrity of COD
+ *
+ * @param[in]       cod: Class of Device
+ *
+ * @return
+ *                  - true if cod is valid
+ *                  - false otherise
+ */
+static inline bool esp_bt_gap_is_valid_cod(uint32_t cod)
+{
+    if (esp_bt_gap_get_cod_format_type(cod) == ESP_BT_COD_FORMAT_TYPE_1 &&
+            esp_bt_gap_get_cod_srvc(cod) != ESP_BT_COD_SRVC_NONE) {
+        return true;
+    }
+
+    return false;
+}
+
+/**
+ * @brief           register callback function. This function should be called after esp_bluedroid_enable() completes successfully
+ *
+ * @return
+ *                  - ESP_OK : Succeed
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_bt_gap_register_callback(esp_bt_gap_cb_t callback);
+
+/**
+ * @brief           Set discoverability and connectability mode for legacy bluetooth. This function should
+ *                  be called after esp_bluedroid_enable() completes successfully
+ *
+ * @param[in]       c_mode : one of the enums of esp_bt_connection_mode_t
+ *
+ * @param[in]       d_mode : one of the enums of esp_bt_discovery_mode_t
+ *
+ * @return
+ *                  - ESP_OK : Succeed
+ *                  - ESP_ERR_INVALID_ARG: if argument invalid
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_bt_gap_set_scan_mode(esp_bt_connection_mode_t c_mode, esp_bt_discovery_mode_t d_mode);
+
+/**
+ * @brief           This function starts Inquiry and Name Discovery. This function should be called after esp_bluedroid_enable() completes successfully.
+ *                  When Inquiry is halted and cached results do not contain device name, then Name Discovery will connect to the peer target to get the device name.
+ *                  esp_bt_gap_cb_t will be called with ESP_BT_GAP_DISC_STATE_CHANGED_EVT when Inquriry is started or Name Discovery is completed.
+ *                  esp_bt_gap_cb_t will be called with ESP_BT_GAP_DISC_RES_EVT each time the two types of discovery results are got.
+ *
+ * @param[in]       mode - Inquiry mode
+ *
+ * @param[in]       inq_len - Inquiry duration in 1.28 sec units, ranging from 0x01 to 0x30. This parameter only specifies the total duration of the Inquiry process,
+ *                          - when this time expires, Inquiry will be halted.
+ *
+ * @param[in]       num_rsps - Number of responses that can be received before the Inquiry is halted, value 0 indicates an unlimited number of responses.
+ *
+ * @return
+ *                  - ESP_OK : Succeed
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_ERR_INVALID_ARG: if invalid parameters are provided
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_bt_gap_start_discovery(esp_bt_inq_mode_t mode, uint8_t inq_len, uint8_t num_rsps);
+
+/**
+ * @brief           Cancel Inquiry and Name Discovery. This function should be called after esp_bluedroid_enable() completes successfully.
+ *                  esp_bt_gap_cb_t will be called with ESP_BT_GAP_DISC_STATE_CHANGED_EVT if Inquiry or Name Discovery is cancelled by
+ *                  calling this function.
+ *
+ * @return
+ *                  - ESP_OK : Succeed
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_bt_gap_cancel_discovery(void);
+
+/**
+ * @brief           Start SDP to get remote services. This function should be called after esp_bluedroid_enable() completes successfully.
+ *                  esp_bt_gap_cb_t will be called with ESP_BT_GAP_RMT_SRVCS_EVT after service discovery ends.
+ *
+ * @return
+ *                  - ESP_OK : Succeed
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_bt_gap_get_remote_services(esp_bd_addr_t remote_bda);
+
+/**
+ * @brief           Start SDP to look up the service matching uuid on the remote device. This function should be called after
+ *                  esp_bluedroid_enable() completes successfully.
+ *
+ *                  esp_bt_gap_cb_t will be called with ESP_BT_GAP_RMT_SRVC_REC_EVT after service discovery ends
+ * @return
+ *                  - ESP_OK : Succeed
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_bt_gap_get_remote_service_record(esp_bd_addr_t remote_bda, esp_bt_uuid_t *uuid);
+
+/**
+ * @brief           This function is called to get EIR data for a specific type.
+ *
+ * @param[in]       eir - pointer of raw eir data to be resolved
+ * @param[in]       type   - specific EIR data type
+ * @param[out]      length - return the length of EIR data excluding fields of length and data type
+ *
+ * @return          pointer of starting position of eir data excluding eir data type, NULL if not found
+ *
+ */
+uint8_t *esp_bt_gap_resolve_eir_data(uint8_t *eir, esp_bt_eir_type_t type, uint8_t *length);
+
+/**
+ * @brief           This function is called to config EIR data.
+ *
+ *                  esp_bt_gap_cb_t will be called with ESP_BT_GAP_CONFIG_EIR_DATA_EVT after config EIR ends.
+ *
+ * @param[in]       eir_data - pointer of EIR data content
+ * @return
+ *                  - ESP_OK : Succeed
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_ERR_INVALID_ARG: if param is invalid
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_bt_gap_config_eir_data(esp_bt_eir_data_t *eir_data);
+
+/**
+ * @brief           This function is called to set class of device.
+ *                  The structure esp_bt_gap_cb_t will be called with ESP_BT_GAP_SET_COD_EVT after set COD ends.
+ *                  Some profile have special restrictions on class of device, changes may cause these profile do not work.
+ *
+ * @param[in]       cod - class of device
+ * @param[in]       mode - setting mode
+ *
+ * @return
+ *                  - ESP_OK : Succeed
+ *                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_ERR_INVALID_ARG: if param is invalid
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_bt_gap_set_cod(esp_bt_cod_t cod, esp_bt_cod_mode_t mode);
+
+/**
+ * @brief           This function is called to get class of device.
+ *
+ * @param[out]      cod - class of device
+ *
+ * @return
+ *                  - ESP_OK : Succeed
+ *                  - ESP_FAIL: others
+ */
+esp_err_t esp_bt_gap_get_cod(esp_bt_cod_t *cod);
+
+/**
+ * @brief           This function is called to read RSSI delta by address after connected. The RSSI value returned by ESP_BT_GAP_READ_RSSI_DELTA_EVT.
+ *
+ *
+ * @param[in]       remote_addr - remote device address, corresponding to a certain connection handle
+ * @return
+ *                  - ESP_OK : Succeed
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_gap_read_rssi_delta(esp_bd_addr_t remote_addr);
+
+/**
+* @brief           Removes a device from the security database list of
+*                  peer device.
+*
+* @param[in]       bd_addr : BD address of the peer device
+*
+* @return          - ESP_OK : success
+*                  - ESP_FAIL  : failed
+*
+*/
+esp_err_t esp_bt_gap_remove_bond_device(esp_bd_addr_t bd_addr);
+
+/**
+* @brief           Get the device number from the security database list of peer device.
+*                  It will return the device bonded number immediately.
+*
+* @return          - >= 0 : bonded devices number
+*                  - ESP_FAIL  : failed
+*
+*/
+int esp_bt_gap_get_bond_device_num(void);
+
+/**
+* @brief           Get the device from the security database list of peer device.
+*                  It will return the device bonded information immediately.
+*
+* @param[inout]    dev_num: Indicate the dev_list array(buffer) size as input.
+*                           If dev_num is large enough, it means the actual number as output.
+*                           Suggest that dev_num value equal to esp_ble_get_bond_device_num().
+*
+* @param[out]      dev_list: an array(buffer) of `esp_bd_addr_t` type. Use for storing the bonded devices address.
+*                            The dev_list should be allocated by who call this API.
+*
+* @return
+*                  - ESP_OK : Succeed
+*                  - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+*                  - ESP_FAIL: others
+*/
+esp_err_t esp_bt_gap_get_bond_device_list(int *dev_num, esp_bd_addr_t *dev_list);
+
+/**
+* @brief            Set pin type and default pin code for legacy pairing.
+*
+* @param[in]        pin_type:       Use variable or fixed pin.
+*                                   If pin_type is ESP_BT_PIN_TYPE_VARIABLE, pin_code and pin_code_len
+*                                   will be ignored, and ESP_BT_GAP_PIN_REQ_EVT will come when control
+*                                   requests for pin code.
+*                                   Else, will use fixed pin code and not callback to users.
+*
+* @param[in]        pin_code_len:   Length of pin_code
+*
+* @param[in]        pin_code:       Pin_code
+*
+* @return           - ESP_OK : success
+*                   - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+*                   - other  : failed
+*/
+esp_err_t esp_bt_gap_set_pin(esp_bt_pin_type_t pin_type, uint8_t pin_code_len, esp_bt_pin_code_t pin_code);
+
+/**
+* @brief            Reply the pin_code to the peer device for legacy pairing
+*                   when ESP_BT_GAP_PIN_REQ_EVT is coming.
+*
+* @param[in]        bd_addr:        BD address of the peer
+*
+* @param[in]        accept:         Pin_code reply successful or declined.
+*
+* @param[in]        pin_code_len:   Length of pin_code
+*
+* @param[in]        pin_code:       Pin_code
+*
+* @return           - ESP_OK : success
+*                   - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+*                   - other  : failed
+*/
+esp_err_t esp_bt_gap_pin_reply(esp_bd_addr_t bd_addr, bool accept, uint8_t pin_code_len, esp_bt_pin_code_t pin_code);
+
+#if (BT_SSP_INCLUDED == TRUE)
+/**
+* @brief            Set a GAP security parameter value. Overrides the default value.
+*
+* @param[in]        param_type : the type of the param which is to be set
+*
+* @param[in]        value  : the param value
+*
+* @param[in]        len : the length of the param value
+*
+* @return           - ESP_OK : success
+*                   - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+*                   - other  : failed
+*
+*/
+esp_err_t esp_bt_gap_set_security_param(esp_bt_sp_param_t param_type,
+                                        void *value, uint8_t len);
+
+/**
+* @brief            Reply the key value to the peer device in the legacy connection stage.
+*
+* @param[in]        bd_addr : BD address of the peer
+*
+* @param[in]        accept : passkey entry successful or declined.
+*
+* @param[in]        passkey : passkey value, must be a 6 digit number, can be lead by 0.
+*
+* @return           - ESP_OK : success
+*                   - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+*                   - other  : failed
+*
+*/
+esp_err_t esp_bt_gap_ssp_passkey_reply(esp_bd_addr_t bd_addr, bool accept, uint32_t passkey);
+
+
+/**
+* @brief            Reply the confirm value to the peer device in the legacy connection stage.
+*
+* @param[in]        bd_addr : BD address of the peer device
+*
+* @param[in]        accept : numbers to compare are the same or different
+*
+* @return           - ESP_OK : success
+*                   - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+*                   - other  : failed
+*
+*/
+esp_err_t esp_bt_gap_ssp_confirm_reply(esp_bd_addr_t bd_addr, bool accept);
+
+#endif /*(BT_SSP_INCLUDED == TRUE)*/
+
+/**
+* @brief            Set the AFH channels
+*
+* @param[in]        channels :  The n th such field (in the range 0 to 78) contains the value for channel n :
+*                               0 means channel n is bad.
+*                               1 means channel n is unknown.
+*                               The most significant bit is reserved and shall be set to 0.
+*                               At least 20 channels shall be marked as unknown.
+*
+* @return           - ESP_OK : success
+*                   - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+*                   - other  : failed
+*
+*/
+esp_err_t esp_bt_gap_set_afh_channels(esp_bt_gap_afh_channels channels);
+
+/**
+* @brief            Read the remote device name
+*
+* @param[in]        remote_bda: The remote device's address
+*
+* @return           - ESP_OK : success
+*                   - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+*                   - other  : failed
+*
+*/
+esp_err_t esp_bt_gap_read_remote_name(esp_bd_addr_t remote_bda);
+
+/**
+* @brief            Config Quality of service
+*
+* @param[in]        remote_bda: The remote device's address
+* @param[in]        t_poll:     Poll interval, the maximum time between transmissions
+                                which from the master to a particular slave on the ACL
+                                logical transport. unit is 0.625ms
+*
+* @return           - ESP_OK : success
+*                   - ESP_ERR_INVALID_STATE: if bluetooth stack is not yet enabled
+*                   - other  : failed
+*
+*/
+esp_err_t esp_bt_gap_set_qos(esp_bd_addr_t remote_bda, uint32_t t_poll);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_GAP_BT_API_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gatt_common_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gatt_common_api.h
new file mode 100644
index 00000000000..447a26bd957
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gatt_common_api.h
@@ -0,0 +1,56 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_GATT_COMMON_API_H__
+#define __ESP_GATT_COMMON_API_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_err.h"
+#include "esp_bt_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Maximum Transmission Unit used in GATT
+#define ESP_GATT_DEF_BLE_MTU_SIZE   23   /* relate to GATT_DEF_BLE_MTU_SIZE in stack/gatt_api.h */
+
+// Maximum Transmission Unit allowed in GATT
+#define ESP_GATT_MAX_MTU_SIZE       517  /* relate to GATT_MAX_MTU_SIZE in stack/gatt_api.h */
+
+/**
+ * @brief           This function is called to set local MTU,
+ *                  the function is called before BLE connection.
+ *
+ * @param[in]       mtu: the size of MTU.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+extern esp_err_t esp_ble_gatt_set_local_mtu (uint16_t mtu);
+
+#if (BLE_INCLUDED == TRUE)
+extern uint16_t esp_ble_get_sendable_packets_num (void);
+extern uint16_t esp_ble_get_cur_sendable_packets_num (uint16_t connid);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_GATT_COMMON_API_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gatt_defs.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gatt_defs.h
new file mode 100644
index 00000000000..9177753bd9d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gatt_defs.h
@@ -0,0 +1,492 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_GATT_DEFS_H__
+#define __ESP_GATT_DEFS_H__
+
+#include "esp_bt_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// GATT INVALID UUID
+#define ESP_GATT_ILLEGAL_UUID               0
+/// GATT INVALID HANDLE
+#define ESP_GATT_ILLEGAL_HANDLE             0
+/// GATT attribute max handle
+#define ESP_GATT_ATTR_HANDLE_MAX            100
+#define ESP_GATT_MAX_READ_MULTI_HANDLES     10           /* Max attributes to read in one request */
+
+
+/**@{
+ * All "ESP_GATT_UUID_xxx" is attribute types
+ */
+#define ESP_GATT_UUID_IMMEDIATE_ALERT_SVC           0x1802          /*  Immediate alert Service*/
+#define ESP_GATT_UUID_LINK_LOSS_SVC                 0x1803          /*  Link Loss Service*/
+#define ESP_GATT_UUID_TX_POWER_SVC                  0x1804          /*  TX Power Service*/
+#define ESP_GATT_UUID_CURRENT_TIME_SVC              0x1805          /*  Current Time Service Service*/
+#define ESP_GATT_UUID_REF_TIME_UPDATE_SVC           0x1806          /*  Reference Time Update Service*/
+#define ESP_GATT_UUID_NEXT_DST_CHANGE_SVC           0x1807          /*  Next DST Change Service*/
+#define ESP_GATT_UUID_GLUCOSE_SVC                   0x1808          /*  Glucose Service*/
+#define ESP_GATT_UUID_HEALTH_THERMOM_SVC            0x1809          /*  Health Thermometer Service*/
+#define ESP_GATT_UUID_DEVICE_INFO_SVC               0x180A          /*  Device Information Service*/
+#define ESP_GATT_UUID_HEART_RATE_SVC                0x180D          /*  Heart Rate Service*/
+#define ESP_GATT_UUID_PHONE_ALERT_STATUS_SVC        0x180E          /* Phone Alert Status Service*/
+#define ESP_GATT_UUID_BATTERY_SERVICE_SVC           0x180F          /* Battery Service*/
+#define ESP_GATT_UUID_BLOOD_PRESSURE_SVC            0x1810          /* Blood Pressure Service*/
+#define ESP_GATT_UUID_ALERT_NTF_SVC                 0x1811          /* Alert Notification Service*/
+#define ESP_GATT_UUID_HID_SVC                       0x1812          /* HID Service*/
+#define ESP_GATT_UUID_SCAN_PARAMETERS_SVC           0x1813          /* Scan Parameters Service*/
+#define ESP_GATT_UUID_RUNNING_SPEED_CADENCE_SVC     0x1814          /* Running Speed and Cadence Service*/
+#define ESP_GATT_UUID_Automation_IO_SVC             0x1815          /* Automation IO Service*/
+#define ESP_GATT_UUID_CYCLING_SPEED_CADENCE_SVC     0x1816          /* Cycling Speed and Cadence Service*/
+#define ESP_GATT_UUID_CYCLING_POWER_SVC             0x1818          /* Cycling Power Service*/
+#define ESP_GATT_UUID_LOCATION_AND_NAVIGATION_SVC   0x1819          /* Location and Navigation Service*/
+#define ESP_GATT_UUID_ENVIRONMENTAL_SENSING_SVC     0x181A          /* Environmental Sensing Service*/
+#define ESP_GATT_UUID_BODY_COMPOSITION              0x181B          /* Body Composition Service*/
+#define ESP_GATT_UUID_USER_DATA_SVC                 0x181C          /* User Data Service*/
+#define ESP_GATT_UUID_WEIGHT_SCALE_SVC              0x181D          /* Weight Scale Service*/
+#define ESP_GATT_UUID_BOND_MANAGEMENT_SVC           0x181E          /* Bond Management Service*/
+#define ESP_GATT_UUID_CONT_GLUCOSE_MONITOR_SVC      0x181F          /* Continuous Glucose Monitoring Service*/
+
+#define ESP_GATT_UUID_PRI_SERVICE                   0x2800
+#define ESP_GATT_UUID_SEC_SERVICE                   0x2801
+#define ESP_GATT_UUID_INCLUDE_SERVICE               0x2802
+#define ESP_GATT_UUID_CHAR_DECLARE                  0x2803          /*  Characteristic Declaration*/
+
+#define ESP_GATT_UUID_CHAR_EXT_PROP                 0x2900          /*  Characteristic Extended Properties */
+#define ESP_GATT_UUID_CHAR_DESCRIPTION              0x2901          /*  Characteristic User Description*/
+#define ESP_GATT_UUID_CHAR_CLIENT_CONFIG            0x2902          /*  Client Characteristic Configuration */
+#define ESP_GATT_UUID_CHAR_SRVR_CONFIG              0x2903          /*  Server Characteristic Configuration */
+#define ESP_GATT_UUID_CHAR_PRESENT_FORMAT           0x2904          /*  Characteristic Presentation Format*/
+#define ESP_GATT_UUID_CHAR_AGG_FORMAT               0x2905          /*  Characteristic Aggregate Format*/
+#define ESP_GATT_UUID_CHAR_VALID_RANGE              0x2906          /*  Characteristic Valid Range */
+#define ESP_GATT_UUID_EXT_RPT_REF_DESCR             0x2907          /*  External Report Reference */
+#define ESP_GATT_UUID_RPT_REF_DESCR                 0x2908          /*  Report Reference */
+#define ESP_GATT_UUID_NUM_DIGITALS_DESCR            0x2909          /*  Number of Digitals */
+#define ESP_GATT_UUID_VALUE_TRIGGER_DESCR           0x290A          /*  Value Trigger Setting */
+#define ESP_GATT_UUID_ENV_SENSING_CONFIG_DESCR      0x290B          /*  Environmental Sensing Configuration */
+#define ESP_GATT_UUID_ENV_SENSING_MEASUREMENT_DESCR 0x290C          /*  Environmental Sensing Measurement */
+#define ESP_GATT_UUID_ENV_SENSING_TRIGGER_DESCR     0x290D          /*  Environmental Sensing Trigger Setting */
+#define ESP_GATT_UUID_TIME_TRIGGER_DESCR            0x290E          /*  Time Trigger Setting */
+
+/* GAP Profile Attributes */
+#define ESP_GATT_UUID_GAP_DEVICE_NAME               0x2A00
+#define ESP_GATT_UUID_GAP_ICON                      0x2A01
+#define ESP_GATT_UUID_GAP_PREF_CONN_PARAM           0x2A04
+#define ESP_GATT_UUID_GAP_CENTRAL_ADDR_RESOL        0x2AA6
+
+/* Attribute Profile Attribute UUID */
+#define ESP_GATT_UUID_GATT_SRV_CHGD                 0x2A05
+
+/* Link ESP_Loss Service */
+#define ESP_GATT_UUID_ALERT_LEVEL                   0x2A06          /* Alert Level */
+#define ESP_GATT_UUID_TX_POWER_LEVEL                0x2A07          /* TX power level */
+
+/* Current Time Service */
+#define ESP_GATT_UUID_CURRENT_TIME                  0x2A2B          /* Current Time */
+#define ESP_GATT_UUID_LOCAL_TIME_INFO               0x2A0F          /* Local time info */
+#define ESP_GATT_UUID_REF_TIME_INFO                 0x2A14          /* reference time information */
+
+/* Network availability Profile */
+#define ESP_GATT_UUID_NW_STATUS                     0x2A18          /* network availability status */
+#define ESP_GATT_UUID_NW_TRIGGER                    0x2A1A          /* Network availability trigger */
+
+/* Phone alert */
+#define ESP_GATT_UUID_ALERT_STATUS                  0x2A3F          /* alert status */
+#define ESP_GATT_UUID_RINGER_CP                     0x2A40          /* ringer control point */
+#define ESP_GATT_UUID_RINGER_SETTING                0x2A41          /* ringer setting */
+
+/* Glucose Service */
+#define ESP_GATT_UUID_GM_MEASUREMENT                0x2A18
+#define ESP_GATT_UUID_GM_CONTEXT                    0x2A34
+#define ESP_GATT_UUID_GM_CONTROL_POINT              0x2A52
+#define ESP_GATT_UUID_GM_FEATURE                    0x2A51
+
+/* device information characteristic */
+#define ESP_GATT_UUID_SYSTEM_ID                     0x2A23
+#define ESP_GATT_UUID_MODEL_NUMBER_STR              0x2A24
+#define ESP_GATT_UUID_SERIAL_NUMBER_STR             0x2A25
+#define ESP_GATT_UUID_FW_VERSION_STR                0x2A26
+#define ESP_GATT_UUID_HW_VERSION_STR                0x2A27
+#define ESP_GATT_UUID_SW_VERSION_STR                0x2A28
+#define ESP_GATT_UUID_MANU_NAME                     0x2A29
+#define ESP_GATT_UUID_IEEE_DATA                     0x2A2A
+#define ESP_GATT_UUID_PNP_ID                        0x2A50
+
+/* HID characteristics */
+#define ESP_GATT_UUID_HID_INFORMATION               0x2A4A
+#define ESP_GATT_UUID_HID_REPORT_MAP                0x2A4B
+#define ESP_GATT_UUID_HID_CONTROL_POINT             0x2A4C
+#define ESP_GATT_UUID_HID_REPORT                    0x2A4D
+#define ESP_GATT_UUID_HID_PROTO_MODE                0x2A4E
+#define ESP_GATT_UUID_HID_BT_KB_INPUT               0x2A22
+#define ESP_GATT_UUID_HID_BT_KB_OUTPUT              0x2A32
+#define ESP_GATT_UUID_HID_BT_MOUSE_INPUT            0x2A33
+
+ /// Heart Rate Measurement
+#define    ESP_GATT_HEART_RATE_MEAS                 0x2A37
+/// Body Sensor Location
+#define    ESP_GATT_BODY_SENSOR_LOCATION            0x2A38
+/// Heart Rate Control Point
+#define    ESP_GATT_HEART_RATE_CNTL_POINT           0x2A39
+
+/* Battery Service characteristics */
+#define ESP_GATT_UUID_BATTERY_LEVEL                 0x2A19
+
+/* Sensor Service */
+#define ESP_GATT_UUID_SC_CONTROL_POINT              0x2A55
+#define ESP_GATT_UUID_SENSOR_LOCATION               0x2A5D
+
+/* Runners speed and cadence service */
+#define ESP_GATT_UUID_RSC_MEASUREMENT               0x2A53
+#define ESP_GATT_UUID_RSC_FEATURE                   0x2A54
+
+/* Cycling speed and cadence service */
+#define ESP_GATT_UUID_CSC_MEASUREMENT               0x2A5B
+#define ESP_GATT_UUID_CSC_FEATURE                   0x2A5C
+
+/* Scan ESP_Parameter characteristics */
+#define ESP_GATT_UUID_SCAN_INT_WINDOW               0x2A4F
+#define ESP_GATT_UUID_SCAN_REFRESH                  0x2A31
+/**
+ * @}
+ */
+
+/* relate to BTA_GATT_PREP_WRITE_xxx in bta/bta_gatt_api.h */
+/// Attribute write data type from the client
+typedef enum {
+    ESP_GATT_PREP_WRITE_CANCEL    = 0x00,       /*!< Prepare write cancel */  /* relate to BTA_GATT_PREP_WRITE_CANCEL in bta/bta_gatt_api.h */
+    ESP_GATT_PREP_WRITE_EXEC      = 0x01,       /*!< Prepare write execute */ /* relate to BTA_GATT_PREP_WRITE_EXEC in bta/bta_gatt_api.h */
+} esp_gatt_prep_write_type;
+
+/* relate to BTA_GATT_xxx in bta/bta_gatt_api.h */
+/**
+ * @brief GATT success code and error codes
+ */
+typedef enum {
+    ESP_GATT_OK                     =   0x0,                    /* relate to BTA_GATT_OK in bta/bta_gatt_api.h */
+    ESP_GATT_INVALID_HANDLE         =   0x01,   /* 0x0001 */    /* relate to BTA_GATT_INVALID_HANDLE in bta/bta_gatt_api.h */
+    ESP_GATT_READ_NOT_PERMIT        =   0x02,   /* 0x0002 */    /* relate to BTA_GATT_READ_NOT_PERMIT in bta/bta_gatt_api.h */
+    ESP_GATT_WRITE_NOT_PERMIT       =   0x03,   /* 0x0003 */    /* relate to BTA_GATT_WRITE_NOT_PERMIT in bta/bta_gatt_api.h */
+    ESP_GATT_INVALID_PDU            =   0x04,   /* 0x0004 */    /* relate to BTA_GATT_INVALID_PDU in bta/bta_gatt_api.h */
+    ESP_GATT_INSUF_AUTHENTICATION   =   0x05,   /* 0x0005 */    /* relate to BTA_GATT_INSUF_AUTHENTICATION in bta/bta_gatt_api.h */
+    ESP_GATT_REQ_NOT_SUPPORTED      =   0x06,   /* 0x0006 */    /* relate to BTA_GATT_REQ_NOT_SUPPORTED in bta/bta_gatt_api.h */
+    ESP_GATT_INVALID_OFFSET         =   0x07,   /* 0x0007 */    /* relate to BTA_GATT_INVALID_OFFSET in bta/bta_gatt_api.h */
+    ESP_GATT_INSUF_AUTHORIZATION    =   0x08,   /* 0x0008 */    /* relate to BTA_GATT_INSUF_AUTHORIZATION in bta/bta_gatt_api.h */
+    ESP_GATT_PREPARE_Q_FULL         =   0x09,   /* 0x0009 */    /* relate to BTA_GATT_PREPARE_Q_FULL in bta/bta_gatt_api.h */
+    ESP_GATT_NOT_FOUND              =   0x0a,   /* 0x000a */    /* relate to BTA_GATT_NOT_FOUND in bta/bta_gatt_api.h */
+    ESP_GATT_NOT_LONG               =   0x0b,   /* 0x000b */    /* relate to BTA_GATT_NOT_LONG in bta/bta_gatt_api.h */
+    ESP_GATT_INSUF_KEY_SIZE         =   0x0c,   /* 0x000c */    /* relate to BTA_GATT_INSUF_KEY_SIZE in bta/bta_gatt_api.h */
+    ESP_GATT_INVALID_ATTR_LEN       =   0x0d,   /* 0x000d */    /* relate to BTA_GATT_INVALID_ATTR_LEN in bta/bta_gatt_api.h */
+    ESP_GATT_ERR_UNLIKELY           =   0x0e,   /* 0x000e */    /* relate to BTA_GATT_ERR_UNLIKELY in bta/bta_gatt_api.h */
+    ESP_GATT_INSUF_ENCRYPTION       =   0x0f,   /* 0x000f */    /* relate to BTA_GATT_INSUF_ENCRYPTION in bta/bta_gatt_api.h */
+    ESP_GATT_UNSUPPORT_GRP_TYPE     =   0x10,   /* 0x0010 */    /* relate to BTA_GATT_UNSUPPORT_GRP_TYPE in bta/bta_gatt_api.h */
+    ESP_GATT_INSUF_RESOURCE         =   0x11,   /* 0x0011 */    /* relate to BTA_GATT_INSUF_RESOURCE in bta/bta_gatt_api.h */
+
+    ESP_GATT_NO_RESOURCES           =   0x80,   /* 0x80 */    /* relate to BTA_GATT_NO_RESOURCES in bta/bta_gatt_api.h */
+    ESP_GATT_INTERNAL_ERROR         =   0x81,   /* 0x81 */    /* relate to BTA_GATT_INTERNAL_ERROR in bta/bta_gatt_api.h */
+    ESP_GATT_WRONG_STATE            =   0x82,   /* 0x82 */    /* relate to BTA_GATT_WRONG_STATE in bta/bta_gatt_api.h */
+    ESP_GATT_DB_FULL                =   0x83,   /* 0x83 */    /* relate to BTA_GATT_DB_FULL in bta/bta_gatt_api.h */
+    ESP_GATT_BUSY                   =   0x84,   /* 0x84 */    /* relate to BTA_GATT_BUSY in bta/bta_gatt_api.h */
+    ESP_GATT_ERROR                  =   0x85,   /* 0x85 */    /* relate to BTA_GATT_ERROR in bta/bta_gatt_api.h */
+    ESP_GATT_CMD_STARTED            =   0x86,   /* 0x86 */    /* relate to BTA_GATT_CMD_STARTED in bta/bta_gatt_api.h */
+    ESP_GATT_ILLEGAL_PARAMETER      =   0x87,   /* 0x87 */    /* relate to BTA_GATT_ILLEGAL_PARAMETER in bta/bta_gatt_api.h */
+    ESP_GATT_PENDING                =   0x88,   /* 0x88 */    /* relate to BTA_GATT_PENDING in bta/bta_gatt_api.h */
+    ESP_GATT_AUTH_FAIL              =   0x89,   /* 0x89 */    /* relate to BTA_GATT_AUTH_FAIL in bta/bta_gatt_api.h */
+    ESP_GATT_MORE                   =   0x8a,   /* 0x8a */    /* relate to BTA_GATT_MORE in bta/bta_gatt_api.h */
+    ESP_GATT_INVALID_CFG            =   0x8b,   /* 0x8b */    /* relate to BTA_GATT_INVALID_CFG in bta/bta_gatt_api.h */
+    ESP_GATT_SERVICE_STARTED        =   0x8c,   /* 0x8c */    /* relate to BTA_GATT_SERVICE_STARTED in bta/bta_gatt_api.h */
+    ESP_GATT_ENCRYPED_MITM          =   ESP_GATT_OK,    /* relate to BTA_GATT_ENCRYPED_MITM in bta/bta_gatt_api.h */
+    ESP_GATT_ENCRYPED_NO_MITM       =   0x8d,   /* 0x8d */    /* relate to BTA_GATT_ENCRYPED_NO_MITM in bta/bta_gatt_api.h */
+    ESP_GATT_NOT_ENCRYPTED          =   0x8e,   /* 0x8e */    /* relate to BTA_GATT_NOT_ENCRYPTED in bta/bta_gatt_api.h */
+    ESP_GATT_CONGESTED              =   0x8f,   /* 0x8f */    /* relate to BTA_GATT_CONGESTED in bta/bta_gatt_api.h */
+    ESP_GATT_DUP_REG                =   0x90,   /* 0x90 */    /* relate to BTA_GATT_DUP_REG in bta/bta_gatt_api.h */
+    ESP_GATT_ALREADY_OPEN           =   0x91,   /* 0x91 */    /* relate to BTA_GATT_ALREADY_OPEN in bta/bta_gatt_api.h */
+    ESP_GATT_CANCEL                 =   0x92,   /* 0x92 */    /* relate to BTA_GATT_CANCEL in bta/bta_gatt_api.h */
+    /* 0xE0 ~ 0xFC reserved for future use */
+    ESP_GATT_STACK_RSP              =   0xe0,   /* 0xe0 */    /* relate to BTA_GATT_STACK_RSP in bta/bta_gatt_api.h */
+    ESP_GATT_APP_RSP                =   0xe1,   /* 0xe1 */    /* relate to BTA_GATT_APP_RSP in bta/bta_gatt_api.h */
+    //Error caused by customer application or stack bug
+    ESP_GATT_UNKNOWN_ERROR          =   0xef,   /* 0xef */    /* relate to BTA_GATT_UNKNOWN_ERROR in bta/bta_gatt_api.h */
+    ESP_GATT_CCC_CFG_ERR            =   0xfd,   /* 0xFD Client Characteristic Configuration Descriptor Improperly Configured */    /* relate to BTA_GATT_CCC_CFG_ERR in bta/bta_gatt_api.h */
+    ESP_GATT_PRC_IN_PROGRESS        =   0xfe,   /* 0xFE Procedure Already in progress */  /* relate to BTA_GATT_PRC_IN_PROGRESS in bta/bta_gatt_api.h */
+    ESP_GATT_OUT_OF_RANGE           =   0xff,   /* 0xFFAttribute value out of range */    /* relate to BTA_GATT_OUT_OF_RANGE in bta/bta_gatt_api.h */
+} esp_gatt_status_t;
+
+/* relate to BTA_GATT_CONN_xxx in bta/bta_gatt_api.h */
+/**
+ * @brief Gatt Connection reason enum
+ */
+typedef enum {
+    ESP_GATT_CONN_UNKNOWN = 0,                      /*!< Gatt connection unknown */               /* relate to BTA_GATT_CONN_UNKNOWN in bta/bta_gatt_api.h */
+    ESP_GATT_CONN_L2C_FAILURE = 1,                  /*!< General L2cap failure  */                /* relate to BTA_GATT_CONN_L2C_FAILURE in bta/bta_gatt_api.h */
+    ESP_GATT_CONN_TIMEOUT = 0x08,                   /*!< Connection timeout  */                   /* relate to BTA_GATT_CONN_TIMEOUT in bta/bta_gatt_api.h */
+    ESP_GATT_CONN_TERMINATE_PEER_USER = 0x13,       /*!< Connection terminate by peer user  */    /* relate to BTA_GATT_CONN_TERMINATE_PEER_USER in bta/bta_gatt_api.h */
+    ESP_GATT_CONN_TERMINATE_LOCAL_HOST = 0x16,      /*!< Connection terminated by local host */    /* relate to BTA_GATT_CONN_TERMINATE_LOCAL_HOST in bta/bta_gatt_api.h */
+    ESP_GATT_CONN_FAIL_ESTABLISH = 0x3e,            /*!< Connection fail to establish  */         /* relate to BTA_GATT_CONN_FAIL_ESTABLISH in bta/bta_gatt_api.h */
+    ESP_GATT_CONN_LMP_TIMEOUT = 0x22,               /*!< Connection fail for LMP response tout */ /* relate to BTA_GATT_CONN_LMP_TIMEOUT in bta/bta_gatt_api.h */
+    ESP_GATT_CONN_CONN_CANCEL = 0x0100,             /*!< L2CAP connection cancelled  */           /* relate to BTA_GATT_CONN_CONN_CANCEL in bta/bta_gatt_api.h */
+    ESP_GATT_CONN_NONE = 0x0101                     /*!< No connection to cancel  */              /* relate to BTA_GATT_CONN_NONE in bta/bta_gatt_api.h */
+} esp_gatt_conn_reason_t;
+
+/**
+ * @brief Gatt id, include uuid and instance id
+ */
+typedef struct {
+    esp_bt_uuid_t   uuid;                   /*!< UUID */
+    uint8_t         inst_id;                /*!< Instance id */
+} __attribute__((packed)) esp_gatt_id_t;
+
+/**
+ * @brief Gatt service id, include id
+ *        (uuid and instance id) and primary flag
+ */
+typedef struct {
+    esp_gatt_id_t   id;                     /*!< Gatt id, include uuid and instance */
+    bool            is_primary;             /*!< This service is primary or not */
+} __attribute__((packed)) esp_gatt_srvc_id_t;
+
+/* relate to BTA_GATT_AUTH_REQ_xxx in bta/bta_gatt_api.h */
+/**
+ * @brief Gatt authentication request type
+ */
+typedef enum {
+    ESP_GATT_AUTH_REQ_NONE                  = 0,                                       /* relate to BTA_GATT_AUTH_REQ_NONE in bta/bta_gatt_api.h */
+    ESP_GATT_AUTH_REQ_NO_MITM               = 1,   /* unauthenticated encryption */    /* relate to BTA_GATT_AUTH_REQ_NO_MITM in bta/bta_gatt_api.h */
+    ESP_GATT_AUTH_REQ_MITM                  = 2,   /* authenticated encryption */      /* relate to BTA_GATT_AUTH_REQ_MITM in bta/bta_gatt_api.h */
+    ESP_GATT_AUTH_REQ_SIGNED_NO_MITM        = 3,                                       /* relate to BTA_GATT_AUTH_REQ_SIGNED_NO_MITM in bta/bta_gatt_api.h */
+    ESP_GATT_AUTH_REQ_SIGNED_MITM           = 4,                                       /* relate to BTA_GATT_AUTH_REQ_SIGNED_MITM in bta/bta_gatt_api.h */
+} esp_gatt_auth_req_t;
+
+/* relate to BTA_GATT_PERM_xxx in bta/bta_gatt_api.h */
+/**
+ * @brief Attribute permissions
+ */
+#define    ESP_GATT_PERM_READ                  (1 << 0)   /* bit 0 -  0x0001 */    /* relate to BTA_GATT_PERM_READ in bta/bta_gatt_api.h */
+#define    ESP_GATT_PERM_READ_ENCRYPTED        (1 << 1)   /* bit 1 -  0x0002 */    /* relate to BTA_GATT_PERM_READ_ENCRYPTED in bta/bta_gatt_api.h */
+#define    ESP_GATT_PERM_READ_ENC_MITM         (1 << 2)   /* bit 2 -  0x0004 */    /* relate to BTA_GATT_PERM_READ_ENC_MITM in bta/bta_gatt_api.h */
+#define    ESP_GATT_PERM_WRITE                 (1 << 4)   /* bit 4 -  0x0010 */    /* relate to BTA_GATT_PERM_WRITE in bta/bta_gatt_api.h */
+#define    ESP_GATT_PERM_WRITE_ENCRYPTED       (1 << 5)   /* bit 5 -  0x0020 */    /* relate to BTA_GATT_PERM_WRITE_ENCRYPTED in bta/bta_gatt_api.h */
+#define    ESP_GATT_PERM_WRITE_ENC_MITM        (1 << 6)   /* bit 6 -  0x0040 */    /* relate to BTA_GATT_PERM_WRITE_ENC_MITM in bta/bta_gatt_api.h */
+#define    ESP_GATT_PERM_WRITE_SIGNED          (1 << 7)   /* bit 7 -  0x0080 */    /* relate to BTA_GATT_PERM_WRITE_SIGNED in bta/bta_gatt_api.h */
+#define    ESP_GATT_PERM_WRITE_SIGNED_MITM     (1 << 8)   /* bit 8 -  0x0100 */    /* relate to BTA_GATT_PERM_WRITE_SIGNED_MITM in bta/bta_gatt_api.h */
+#define    ESP_GATT_PERM_READ_AUTHORIZATION    (1 << 9)   /* bit 9 -  0x0200 */
+#define    ESP_GATT_PERM_WRITE_AUTHORIZATION   (1 << 10)  /* bit 10 - 0x0400 */
+typedef uint16_t esp_gatt_perm_t;
+
+/* relate to BTA_GATT_CHAR_PROP_BIT_xxx in bta/bta_gatt_api.h */
+/* definition of characteristic properties */
+#define    ESP_GATT_CHAR_PROP_BIT_BROADCAST    (1 << 0)       /* 0x01 */    /* relate to BTA_GATT_CHAR_PROP_BIT_BROADCAST in bta/bta_gatt_api.h */
+#define    ESP_GATT_CHAR_PROP_BIT_READ         (1 << 1)       /* 0x02 */    /* relate to BTA_GATT_CHAR_PROP_BIT_READ in bta/bta_gatt_api.h */
+#define    ESP_GATT_CHAR_PROP_BIT_WRITE_NR     (1 << 2)       /* 0x04 */    /* relate to BTA_GATT_CHAR_PROP_BIT_WRITE_NR in bta/bta_gatt_api.h */
+#define    ESP_GATT_CHAR_PROP_BIT_WRITE        (1 << 3)       /* 0x08 */    /* relate to BTA_GATT_CHAR_PROP_BIT_WRITE in bta/bta_gatt_api.h */
+#define    ESP_GATT_CHAR_PROP_BIT_NOTIFY       (1 << 4)       /* 0x10 */    /* relate to BTA_GATT_CHAR_PROP_BIT_NOTIFY in bta/bta_gatt_api.h */
+#define    ESP_GATT_CHAR_PROP_BIT_INDICATE     (1 << 5)       /* 0x20 */    /* relate to BTA_GATT_CHAR_PROP_BIT_INDICATE in bta/bta_gatt_api.h */
+#define    ESP_GATT_CHAR_PROP_BIT_AUTH         (1 << 6)       /* 0x40 */    /* relate to BTA_GATT_CHAR_PROP_BIT_AUTH in bta/bta_gatt_api.h */
+#define    ESP_GATT_CHAR_PROP_BIT_EXT_PROP     (1 << 7)       /* 0x80 */    /* relate to BTA_GATT_CHAR_PROP_BIT_EXT_PROP in bta/bta_gatt_api.h */
+typedef uint8_t esp_gatt_char_prop_t;
+
+/// GATT maximum attribute length
+#define ESP_GATT_MAX_ATTR_LEN   600 //as same as GATT_MAX_ATTR_LEN
+
+typedef enum {
+    ESP_GATT_SERVICE_FROM_REMOTE_DEVICE         = 0,                                       /* relate to BTA_GATTC_SERVICE_INFO_FROM_REMOTE_DEVICE in bta_gattc_int.h */
+    ESP_GATT_SERVICE_FROM_NVS_FLASH             = 1,                                       /* relate to BTA_GATTC_SERVICE_INFO_FROM_NVS_FLASH in bta_gattc_int.h */
+    ESP_GATT_SERVICE_FROM_UNKNOWN               = 2,                                       /* relate to BTA_GATTC_SERVICE_INFO_FROM_UNKNOWN in bta_gattc_int.h */
+} esp_service_source_t;
+
+/**
+ * @brief Attribute description (used to create database)
+ */
+ typedef struct
+ {
+     uint16_t uuid_length;              /*!< UUID length */
+     uint8_t  *uuid_p;                  /*!< UUID value */
+     uint16_t perm;                     /*!< Attribute permission */
+     uint16_t max_length;               /*!< Maximum length of the element*/
+     uint16_t length;                   /*!< Current length of the element*/
+     uint8_t  *value;                   /*!< Element value array*/
+ } esp_attr_desc_t;
+
+
+/**
+ * @brief attribute auto response flag
+ */
+typedef struct
+{
+#define ESP_GATT_RSP_BY_APP             0
+#define ESP_GATT_AUTO_RSP               1
+    /**
+     * @brief if auto_rsp set to ESP_GATT_RSP_BY_APP, means the response of Write/Read operation will by replied by application.
+              if auto_rsp set to ESP_GATT_AUTO_RSP, means the response of Write/Read operation will be replied by GATT stack automatically.
+     */
+    uint8_t auto_rsp;
+} esp_attr_control_t;
+
+
+/**
+ * @brief attribute type added to the gatt server database
+ */
+typedef struct
+{
+    esp_attr_control_t      attr_control;                   /*!< The attribute control type */
+    esp_attr_desc_t         att_desc;                       /*!< The attribute type */
+} esp_gatts_attr_db_t;
+
+
+/**
+  * @brief set the attribute value type
+  */
+typedef struct
+{
+    uint16_t attr_max_len;                                  /*!<  attribute max value length */
+    uint16_t attr_len;                                      /*!<  attribute current value length */
+    uint8_t  *attr_value;                                   /*!<  the pointer to attribute value */
+} esp_attr_value_t;
+
+
+/**
+  * @brief Gatt  include service entry element
+  */
+typedef struct
+{
+    uint16_t start_hdl;                                     /*!< Gatt  start handle value of included service */
+    uint16_t end_hdl;                                       /*!< Gatt  end handle value of included service */
+    uint16_t uuid;                                          /*!< Gatt  attribute value UUID of included service */
+} esp_gatts_incl_svc_desc_t;                                /*!< Gatt include service entry element */
+
+/**
+  * @brief Gatt  include 128 bit service entry element
+  */
+typedef struct
+{
+    uint16_t start_hdl;                                     /*!< Gatt  start handle value of included 128 bit service */
+    uint16_t end_hdl;                                       /*!< Gatt  end handle value of included 128 bit service */
+} esp_gatts_incl128_svc_desc_t;                             /*!< Gatt  include 128 bit service entry element */
+
+/// Gatt attribute value
+typedef struct {
+    uint8_t           value[ESP_GATT_MAX_ATTR_LEN];         /*!< Gatt attribute value */
+    uint16_t          handle;                               /*!< Gatt attribute handle */
+    uint16_t          offset;                               /*!< Gatt attribute value offset */
+    uint16_t          len;                                  /*!< Gatt attribute value length */
+    uint8_t           auth_req;                             /*!< Gatt authentication request */
+} esp_gatt_value_t;
+
+/// GATT remote read request response type
+typedef union {
+    esp_gatt_value_t attr_value;                            /*!< Gatt attribute structure */
+    uint16_t            handle;                             /*!< Gatt attribute handle */
+} esp_gatt_rsp_t;
+
+/**
+  * @brief Gatt write type
+  */
+typedef enum {
+    ESP_GATT_WRITE_TYPE_NO_RSP  =   1,                      /*!< Gatt write attribute need no response */
+    ESP_GATT_WRITE_TYPE_RSP,                                /*!< Gatt write attribute need remote response */
+} esp_gatt_write_type_t;
+
+/**
+  * @brief Connection parameters information
+  */
+typedef struct {
+    uint16_t             interval;                         /*!< connection interval */
+    uint16_t             latency;                          /*!< Slave latency for the connection in number of connection events. Range: 0x0000 to 0x01F3 */
+    uint16_t             timeout;                          /*!< Supervision timeout for the LE Link. Range: 0x000A to 0x0C80.
+                                                                Mandatory Range: 0x000A to 0x0C80 Time = N * 10 msec
+                                                                Time Range: 100 msec to 32 seconds */
+} esp_gatt_conn_params_t;
+
+#define ESP_GATT_IF_NONE    0xff                            /*!< If callback report gattc_if/gatts_if as this macro, means this event is not correspond to any app */
+
+typedef uint8_t    esp_gatt_if_t;                           /*!< Gatt interface type, different application on GATT client use different gatt_if */
+
+/**
+  * @brief the type of attribute element
+  */
+typedef enum {
+    ESP_GATT_DB_PRIMARY_SERVICE,                            /*!< Gattc primary service attribute type in the cache */
+    ESP_GATT_DB_SECONDARY_SERVICE,                          /*!< Gattc secondary service attribute type in the cache */
+    ESP_GATT_DB_CHARACTERISTIC,                             /*!< Gattc characteristic attribute type in the cache */
+    ESP_GATT_DB_DESCRIPTOR,                                 /*!< Gattc characteristic descriptor attribute type in the cache */
+    ESP_GATT_DB_INCLUDED_SERVICE,                           /*!< Gattc include service attribute type in the cache */
+    ESP_GATT_DB_ALL,                                        /*!< Gattc all the attribute (primary service & secondary service & include service & char & descriptor) type in the cache */
+} esp_gatt_db_attr_type_t;                                  /*!< Gattc attribute type element */
+
+/**
+  * @brief read multiple attribute
+  */
+typedef struct {
+    uint8_t  num_attr;                                      /*!< The number of the attribute */
+    uint16_t handles[ESP_GATT_MAX_READ_MULTI_HANDLES];      /*!< The handles list */
+} esp_gattc_multi_t;                                        /*!< The gattc multiple read element */
+
+/**
+  * @brief data base attribute element
+  */
+typedef struct {
+    esp_gatt_db_attr_type_t     type;                       /*!< The attribute type */
+    uint16_t                    attribute_handle;           /*!< The attribute handle, it's valid for all of the type */
+    uint16_t                    start_handle;               /*!< The service start handle, it's valid only when the type = ESP_GATT_DB_PRIMARY_SERVICE or ESP_GATT_DB_SECONDARY_SERVICE */
+    uint16_t                    end_handle;                 /*!< The service end handle, it's valid only when the type = ESP_GATT_DB_PRIMARY_SERVICE or ESP_GATT_DB_SECONDARY_SERVICE */
+    esp_gatt_char_prop_t        properties;                 /*!< The characteristic properties, it's valid only when the type = ESP_GATT_DB_CHARACTERISTIC */
+    esp_bt_uuid_t               uuid;                       /*!< The attribute uuid, it's valid for all of the type */
+} esp_gattc_db_elem_t;                                      /*!< The gattc service data base element in the cache */
+
+/**
+  * @brief service element
+  */
+typedef struct {
+    bool                        is_primary;                 /*!< The service flag, true if the service is primary service, else is secondary service */
+    uint16_t                    start_handle;               /*!< The start handle of the service */
+    uint16_t                    end_handle;                 /*!< The end handle of the service */
+    esp_bt_uuid_t               uuid;                       /*!< The uuid of the service */
+} esp_gattc_service_elem_t;                                 /*!< The gattc service element */
+
+/**
+  * @brief characteristic element
+  */
+typedef struct {
+    uint16_t                    char_handle;                /*!< The characteristic handle */
+    esp_gatt_char_prop_t        properties;                 /*!< The characteristic properties */
+    esp_bt_uuid_t               uuid;                       /*!< The characteristic uuid */
+} esp_gattc_char_elem_t;                                    /*!< The gattc characteristic element */
+
+/**
+  * @brief descriptor element
+  */
+typedef struct {
+    uint16_t                   handle;                      /*!< The characteristic descriptor handle */
+    esp_bt_uuid_t              uuid;                        /*!< The characteristic descriptor uuid */
+} esp_gattc_descr_elem_t;                                   /*!< The gattc descriptor type element */
+
+/**
+  * @brief include service element
+  */
+typedef struct {
+    uint16_t                   handle;                      /*!< The include service current attribute handle */
+    uint16_t                   incl_srvc_s_handle;          /*!< The start handle of the service which has been included */
+    uint16_t                   incl_srvc_e_handle;          /*!< The end handle of the service which has been included */
+    esp_bt_uuid_t              uuid;                        /*!< The include service uuid */
+} esp_gattc_incl_svc_elem_t;                                /*!< The gattc include service element */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_GATT_DEFS_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gattc_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gattc_api.h
new file mode 100644
index 00000000000..40719096345
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gattc_api.h
@@ -0,0 +1,891 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_GATTC_API_H__
+#define __ESP_GATTC_API_H__
+
+#include "esp_bt_defs.h"
+#include "esp_gatt_defs.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// GATT Client callback function events
+typedef enum {
+    ESP_GATTC_REG_EVT                 = 0,        /*!< When GATT client is registered, the event comes */
+    ESP_GATTC_UNREG_EVT               = 1,        /*!< When GATT client is unregistered, the event comes */
+    ESP_GATTC_OPEN_EVT                = 2,        /*!< When GATT virtual connection is set up, the event comes */
+    ESP_GATTC_READ_CHAR_EVT           = 3,        /*!< When GATT characteristic is read, the event comes */
+    ESP_GATTC_WRITE_CHAR_EVT          = 4,        /*!< When GATT characteristic write operation completes, the event comes */
+    ESP_GATTC_CLOSE_EVT               = 5,        /*!< When GATT virtual connection is closed, the event comes */
+    ESP_GATTC_SEARCH_CMPL_EVT         = 6,        /*!< When GATT service discovery is completed, the event comes */
+    ESP_GATTC_SEARCH_RES_EVT          = 7,        /*!< When GATT service discovery result is got, the event comes */
+    ESP_GATTC_READ_DESCR_EVT          = 8,        /*!< When GATT characteristic descriptor read completes, the event comes */
+    ESP_GATTC_WRITE_DESCR_EVT         = 9,        /*!< When GATT characteristic descriptor write completes, the event comes */
+    ESP_GATTC_NOTIFY_EVT              = 10,       /*!< When GATT notification or indication arrives, the event comes */
+    ESP_GATTC_PREP_WRITE_EVT          = 11,       /*!< When GATT prepare-write operation completes, the event comes */
+    ESP_GATTC_EXEC_EVT                = 12,       /*!< When write execution completes, the event comes */
+    ESP_GATTC_ACL_EVT                 = 13,       /*!< When ACL connection is up, the event comes */
+    ESP_GATTC_CANCEL_OPEN_EVT         = 14,       /*!< When GATT client ongoing connection is cancelled, the event comes */
+    ESP_GATTC_SRVC_CHG_EVT            = 15,       /*!< When "service changed" occurs, the event comes */
+    ESP_GATTC_ENC_CMPL_CB_EVT         = 17,       /*!< When encryption procedure completes, the event comes */
+    ESP_GATTC_CFG_MTU_EVT             = 18,       /*!< When configuration of MTU completes, the event comes */
+    ESP_GATTC_ADV_DATA_EVT            = 19,       /*!< When advertising of data, the event comes */
+    ESP_GATTC_MULT_ADV_ENB_EVT        = 20,       /*!< When multi-advertising is enabled, the event comes */
+    ESP_GATTC_MULT_ADV_UPD_EVT        = 21,       /*!< When multi-advertising parameters are updated, the event comes */
+    ESP_GATTC_MULT_ADV_DATA_EVT       = 22,       /*!< When multi-advertising data arrives, the event comes */
+    ESP_GATTC_MULT_ADV_DIS_EVT        = 23,       /*!< When multi-advertising is disabled, the event comes */
+    ESP_GATTC_CONGEST_EVT             = 24,       /*!< When GATT connection congestion comes, the event comes */
+    ESP_GATTC_BTH_SCAN_ENB_EVT        = 25,       /*!< When batch scan is enabled, the event comes */
+    ESP_GATTC_BTH_SCAN_CFG_EVT        = 26,       /*!< When batch scan storage is configured, the event comes */
+    ESP_GATTC_BTH_SCAN_RD_EVT         = 27,       /*!< When Batch scan read event is reported, the event comes */
+    ESP_GATTC_BTH_SCAN_THR_EVT        = 28,       /*!< When Batch scan threshold is set, the event comes */
+    ESP_GATTC_BTH_SCAN_PARAM_EVT      = 29,       /*!< When Batch scan parameters are set, the event comes */
+    ESP_GATTC_BTH_SCAN_DIS_EVT        = 30,       /*!< When Batch scan is disabled, the event comes */
+    ESP_GATTC_SCAN_FLT_CFG_EVT        = 31,       /*!< When Scan filter configuration completes, the event comes */
+    ESP_GATTC_SCAN_FLT_PARAM_EVT      = 32,       /*!< When Scan filter parameters are set, the event comes */
+    ESP_GATTC_SCAN_FLT_STATUS_EVT     = 33,       /*!< When Scan filter status is reported, the event comes */
+    ESP_GATTC_ADV_VSC_EVT             = 34,       /*!< When advertising vendor spec content event is reported, the event comes */
+    ESP_GATTC_REG_FOR_NOTIFY_EVT      = 38,       /*!< When register for notification of a service completes, the event comes */
+    ESP_GATTC_UNREG_FOR_NOTIFY_EVT    = 39,       /*!< When unregister for notification of a service completes, the event comes */
+    ESP_GATTC_CONNECT_EVT             = 40,       /*!< When the ble physical connection is set up, the event comes */
+    ESP_GATTC_DISCONNECT_EVT          = 41,       /*!< When the ble physical connection disconnected, the event comes */
+    ESP_GATTC_READ_MULTIPLE_EVT       = 42,       /*!< When the ble characteristic or descriptor multiple complete, the event comes */
+    ESP_GATTC_QUEUE_FULL_EVT          = 43,       /*!< When the gattc command queue full, the event comes */
+    ESP_GATTC_SET_ASSOC_EVT           = 44,       /*!< When the ble gattc set the associated address complete, the event comes */
+    ESP_GATTC_GET_ADDR_LIST_EVT       = 45,       /*!< When the ble get gattc address list in cache finish, the event comes */
+    ESP_GATTC_DIS_SRVC_CMPL_EVT       = 46,       /*!< When the ble discover service complete, the event comes */
+} esp_gattc_cb_event_t;
+
+
+/**
+ * @brief Gatt client callback parameters union
+ */
+typedef union {
+    /**
+     * @brief ESP_GATTC_REG_EVT
+     */
+    struct gattc_reg_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t app_id;                /*!< Application id which input in register API */
+    } reg;                              /*!< Gatt client callback param of ESP_GATTC_REG_EVT */
+
+    /**
+     * @brief ESP_GATTC_OPEN_EVT
+     */
+    struct gattc_open_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t conn_id;               /*!< Connection id */
+        esp_bd_addr_t remote_bda;       /*!< Remote bluetooth device address */
+        uint16_t mtu;                   /*!< MTU size */
+    } open;                             /*!< Gatt client callback param of ESP_GATTC_OPEN_EVT */
+
+    /**
+     * @brief ESP_GATTC_CLOSE_EVT
+     */
+    struct gattc_close_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t conn_id;               /*!< Connection id */
+        esp_bd_addr_t remote_bda;       /*!< Remote bluetooth device address */
+        esp_gatt_conn_reason_t reason;  /*!< The reason of gatt connection close */
+    } close;                            /*!< Gatt client callback param of ESP_GATTC_CLOSE_EVT */
+
+    /**
+     * @brief ESP_GATTC_CFG_MTU_EVT
+     */
+    struct gattc_cfg_mtu_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t conn_id;               /*!< Connection id */
+        uint16_t mtu;                   /*!< MTU size */
+    } cfg_mtu;                          /*!< Gatt client callback param of ESP_GATTC_CFG_MTU_EVT */
+
+    /**
+     * @brief ESP_GATTC_SEARCH_CMPL_EVT
+     */
+    struct gattc_search_cmpl_evt_param {
+        esp_gatt_status_t status;                     /*!< Operation status */
+        uint16_t conn_id;                             /*!< Connection id */
+        esp_service_source_t searched_service_source; /*!< The source of the service information */
+    } search_cmpl;                                    /*!< Gatt client callback param of ESP_GATTC_SEARCH_CMPL_EVT */
+
+    /**
+     * @brief ESP_GATTC_SEARCH_RES_EVT
+     */
+    struct gattc_search_res_evt_param {
+        uint16_t conn_id;               /*!< Connection id */
+        uint16_t start_handle;          /*!< Service start handle */
+        uint16_t end_handle;            /*!< Service end handle */
+        esp_gatt_id_t srvc_id;          /*!< Service id, include service uuid and other information */
+        bool      is_primary;           /*!< True if this is the primary service */
+    } search_res;                       /*!< Gatt client callback param of ESP_GATTC_SEARCH_RES_EVT */
+
+    /**
+     * @brief ESP_GATTC_READ_CHAR_EVT,  ESP_GATTC_READ_DESCR_EVT
+     */
+    struct gattc_read_char_evt_param {
+
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t conn_id;               /*!< Connection id */
+        uint16_t handle;                /*!< Characteristic handle */
+        uint8_t *value;                 /*!< Characteristic value */
+        uint16_t value_len;             /*!< Characteristic value length */
+    } read;                             /*!< Gatt client callback param of ESP_GATTC_READ_CHAR_EVT */
+
+    /**
+     * @brief ESP_GATTC_WRITE_CHAR_EVT, ESP_GATTC_PREP_WRITE_EVT, ESP_GATTC_WRITE_DESCR_EVT
+     */
+    struct gattc_write_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t conn_id;               /*!< Connection id */
+        uint16_t handle;                /*!< The Characteristic or descriptor handle */
+        uint16_t offset;                /*!< The prepare write offset, this value is valid only when prepare write */
+    } write;                            /*!< Gatt client callback param of ESP_GATTC_WRITE_DESCR_EVT */
+
+    /**
+     * @brief ESP_GATTC_EXEC_EVT
+     */
+    struct gattc_exec_cmpl_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t conn_id;               /*!< Connection id */
+    } exec_cmpl;                        /*!< Gatt client callback param of ESP_GATTC_EXEC_EVT */
+
+    /**
+     * @brief ESP_GATTC_NOTIFY_EVT
+     */
+    struct gattc_notify_evt_param {
+        uint16_t conn_id;               /*!< Connection id */
+        esp_bd_addr_t remote_bda;       /*!< Remote bluetooth device address */
+        uint16_t handle;                /*!< The Characteristic or descriptor handle */
+        uint16_t value_len;             /*!< Notify attribute value */
+        uint8_t *value;                 /*!< Notify attribute value */
+        bool is_notify;                 /*!< True means notify, false means indicate */
+    } notify;                           /*!< Gatt client callback param of ESP_GATTC_NOTIFY_EVT */
+
+    /**
+     * @brief ESP_GATTC_SRVC_CHG_EVT
+	 */
+    struct gattc_srvc_chg_evt_param {
+        esp_bd_addr_t remote_bda;       /*!< Remote bluetooth device address */
+    } srvc_chg;                         /*!< Gatt client callback param of ESP_GATTC_SRVC_CHG_EVT */
+
+    /**
+     * @brief ESP_GATTC_CONGEST_EVT
+     */
+    struct gattc_congest_evt_param {
+        uint16_t conn_id;               /*!< Connection id */
+        bool congested;                 /*!< Congested or not */
+    } congest;                          /*!< Gatt client callback param of ESP_GATTC_CONGEST_EVT */
+    /**
+     * @brief ESP_GATTC_REG_FOR_NOTIFY_EVT
+     */
+    struct gattc_reg_for_notify_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t handle;                /*!< The characteristic or descriptor handle */
+    } reg_for_notify;                   /*!< Gatt client callback param of ESP_GATTC_REG_FOR_NOTIFY_EVT */
+
+    /**
+     * @brief ESP_GATTC_UNREG_FOR_NOTIFY_EVT
+     */
+    struct gattc_unreg_for_notify_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t handle;                /*!< The characteristic or descriptor handle */
+    } unreg_for_notify;                 /*!< Gatt client callback param of ESP_GATTC_UNREG_FOR_NOTIFY_EVT */
+
+    /**
+     * @brief ESP_GATTC_CONNECT_EVT
+     */
+    struct gattc_connect_evt_param {
+        uint16_t conn_id;               /*!< Connection id */
+        uint8_t link_role;              /*!< Link role : master role = 0  ; slave role = 1*/
+        esp_bd_addr_t remote_bda;       /*!< Remote bluetooth device address */
+        esp_gatt_conn_params_t conn_params; /*!< current connection parameters */
+    } connect;                          /*!< Gatt client callback param of ESP_GATTC_CONNECT_EVT */
+
+    /**
+     * @brief ESP_GATTC_DISCONNECT_EVT
+     */
+    struct gattc_disconnect_evt_param {
+        esp_gatt_conn_reason_t reason;  /*!< disconnection reason */
+        uint16_t conn_id;               /*!< Connection id */
+        esp_bd_addr_t remote_bda;       /*!< Remote bluetooth device address */
+    } disconnect;                       /*!< Gatt client callback param of ESP_GATTC_DISCONNECT_EVT */
+    /**
+     * @brief ESP_GATTC_SET_ASSOC_EVT
+     */
+    struct gattc_set_assoc_addr_cmp_evt_param {
+        esp_gatt_status_t status;      /*!< Operation status */
+    } set_assoc_cmp;                     /*!< Gatt client callback param of ESP_GATTC_SET_ASSOC_EVT */
+    /**
+     * @brief ESP_GATTC_GET_ADDR_LIST_EVT
+     */
+    struct gattc_get_addr_list_evt_param {
+        esp_gatt_status_t status;      /*!< Operation status */
+        uint8_t num_addr;              /*!< The number of address in the gattc cache address list */
+        esp_bd_addr_t *addr_list;      /*!< The pointer to the address list which has been get from the gattc cache */
+    } get_addr_list;                   /*!< Gatt client callback param of ESP_GATTC_GET_ADDR_LIST_EVT */
+
+    /**
+     * @brief ESP_GATTC_QUEUE_FULL_EVT
+     */
+    struct gattc_queue_full_evt_param {
+        esp_gatt_status_t status;      /*!< Operation status */
+        uint16_t conn_id;              /*!< Connection id */
+        bool     is_full;              /*!< The gattc command queue is full or not */
+    } queue_full;                      /*!< Gatt client callback param of ESP_GATTC_QUEUE_FULL_EVT */
+
+    /**
+     * @brief ESP_GATTC_DIS_SRVC_CMPL_EVT
+     */
+    struct gattc_dis_srvc_cmpl_evt_param {
+        esp_gatt_status_t status;      /*!< Operation status */
+        uint16_t conn_id;              /*!< Connection id */
+    } dis_srvc_cmpl;                   /*!< Gatt client callback param of ESP_GATTC_DIS_SRVC_CMPL_EVT */
+
+} esp_ble_gattc_cb_param_t;             /*!< GATT client callback parameter union type */
+
+/**
+ * @brief GATT Client callback function type
+ * @param event : Event type
+ * @param gattc_if : GATT client access interface, normally
+ *                   different gattc_if correspond to different profile
+ * @param param : Point to callback parameter, currently is union type
+ */
+typedef void (* esp_gattc_cb_t)(esp_gattc_cb_event_t event, esp_gatt_if_t gattc_if, esp_ble_gattc_cb_param_t *param);
+
+/**
+ * @brief           This function is called to register application callbacks
+ *                  with GATTC module.
+ *
+ * @param[in]       callback : pointer to the application callback function.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_register_callback(esp_gattc_cb_t callback);
+
+
+/**
+ * @brief           This function is called to register application callbacks
+ *                  with GATTC module.
+ *
+ * @param[in]       app_id : Application Identify (UUID), for different application
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_app_register(uint16_t app_id);
+
+
+/**
+ * @brief           This function is called to unregister an application
+ *                  from GATTC module.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_app_unregister(esp_gatt_if_t gattc_if);
+
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
+/**
+ * @brief           Open a direct connection or add a background auto connection
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       remote_bda: remote device bluetooth device address.
+ * @param[in]       remote_addr_type: remote device bluetooth device the address type.
+ * @param[in]       is_direct: direct connection or background auto connection(by now, background auto connection is not supported).
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_open(esp_gatt_if_t gattc_if, esp_bd_addr_t remote_bda, esp_ble_addr_type_t remote_addr_type, bool is_direct);
+#endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+
+#if (BLE_50_FEATURE_SUPPORT == TRUE)
+esp_err_t esp_ble_gattc_aux_open(esp_gatt_if_t gattc_if, esp_bd_addr_t remote_bda, esp_ble_addr_type_t remote_addr_type, bool is_direct);
+#endif // #if (BLE_50_FEATURE_SUPPORT == TRUE)
+/**
+ * @brief           Close the virtual connection to the GATT server. gattc may have multiple virtual GATT server connections when multiple app_id registered,
+ *                  this API only close one virtual GATT server connection. if there exist other virtual GATT server connections,
+ *                  it does not disconnect the physical connection.
+ *                  if you want to disconnect the physical connection directly, you can use esp_ble_gap_disconnect(esp_bd_addr_t remote_device).
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id: connection ID to be closed.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_close (esp_gatt_if_t gattc_if, uint16_t conn_id);
+
+
+/**
+ * @brief           Configure the MTU size in the GATT channel. This can be done
+ *                  only once per connection. Before using, use esp_ble_gatt_set_local_mtu()
+ *                  to configure the local MTU size.
+ *
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id: connection ID.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_send_mtu_req (esp_gatt_if_t gattc_if, uint16_t conn_id);
+
+
+/**
+ * @brief           This function is called to get service from local cache.
+ *                  This function report service search result by a callback
+ *                  event, and followed by a service search complete event.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id: connection ID.
+ * @param[in]       filter_uuid: a UUID of the service application is interested in.
+ *                  If Null, discover for all services.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_search_service(esp_gatt_if_t gattc_if, uint16_t conn_id, esp_bt_uuid_t *filter_uuid);
+
+/**
+ * @brief           Find all the service with the given service uuid in the gattc cache, if the svc_uuid is NULL, find all the service.
+ *                  Note: It just get service from local cache, won't get from remote devices. If want to get it from remote device, need
+ *                  to used the esp_ble_gattc_cache_refresh, then call esp_ble_gattc_get_service again.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id: connection ID which identify the server.
+ * @param[in]       svc_uuid: the pointer to the service uuid.
+ * @param[out]      result: The pointer to the service which has been found in the gattc cache.
+ * @param[inout]   count: input the number of service want to find,
+ *                         it will output the number of service has been found in the gattc cache with the given service uuid.
+ * @param[in]       offset: Offset of the service position to get.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_gatt_status_t esp_ble_gattc_get_service(esp_gatt_if_t gattc_if, uint16_t conn_id, esp_bt_uuid_t *svc_uuid,
+                                            esp_gattc_service_elem_t *result, uint16_t *count, uint16_t offset);
+
+/**
+ * @brief           Find all the characteristic with the given service in the gattc cache
+ *                  Note: It just get characteristic from local cache, won't get from remote devices.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id: connection ID which identify the server.
+ * @param[in]       start_handle: the attribute start handle.
+ * @param[in]       end_handle: the attribute end handle
+ * @param[out]      result: The pointer to the characteristic in the service.
+ * @param[inout]   count: input the number of characteristic want to find,
+ *                         it will output the number of characteristic has been found in the gattc cache with the given service.
+ * @param[in]       offset: Offset of the characteristic position to get.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_gatt_status_t esp_ble_gattc_get_all_char(esp_gatt_if_t gattc_if,
+                                             uint16_t conn_id,
+                                             uint16_t start_handle,
+                                             uint16_t end_handle,
+                                             esp_gattc_char_elem_t *result,
+                                             uint16_t *count, uint16_t offset);
+
+/**
+ * @brief           Find all the descriptor with the given characteristic in the gattc cache
+ *                  Note: It just get descriptor from local cache, won't get from remote devices.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id: connection ID which identify the server.
+ * @param[in]       char_handle: the given characteristic handle
+ * @param[out]      result: The pointer to the descriptor in the characteristic.
+ * @param[inout]    count: input the number of descriptor want to find,
+ *                         it will output the number of descriptor has been found in the gattc cache with the given characteristic.
+ * @param[in]       offset: Offset of the descriptor position to get.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_gatt_status_t esp_ble_gattc_get_all_descr(esp_gatt_if_t gattc_if,
+                                              uint16_t conn_id,
+                                              uint16_t char_handle,
+                                              esp_gattc_descr_elem_t *result,
+                                              uint16_t *count, uint16_t offset);
+
+
+/**
+ * @brief           Find the characteristic with the given characteristic uuid in the gattc cache
+ *                  Note: It just get characteristic from local cache, won't get from remote devices.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id: connection ID which identify the server.
+ * @param[in]       start_handle: the attribute start handle
+ * @param[in]       end_handle: the attribute end handle
+ * @param[in]       char_uuid: the characteristic uuid
+ * @param[out]      result: The pointer to the characteristic in the service.
+ * @param[inout]   count: input the number of characteristic want to find,
+ *                         it will output the number of characteristic has been found in the gattc cache with the given service.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_gatt_status_t esp_ble_gattc_get_char_by_uuid(esp_gatt_if_t gattc_if,
+                                                 uint16_t conn_id,
+                                                 uint16_t start_handle,
+                                                 uint16_t end_handle,
+                                                 esp_bt_uuid_t char_uuid,
+                                                 esp_gattc_char_elem_t *result,
+                                                 uint16_t *count);
+
+/**
+ * @brief           Find the descriptor with the given characteristic uuid in the gattc cache
+ *                  Note: It just get descriptor from local cache, won't get from remote devices.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id: connection ID which identify the server.
+ * @param[in]       start_handle: the attribute start handle
+ * @param[in]       end_handle: the attribute end handle
+ * @param[in]       char_uuid: the characteristic uuid.
+ * @param[in]       descr_uuid: the descriptor uuid.
+ * @param[out]      result: The pointer to the descriptor in the given characteristic.
+ * @param[inout]   count: input the number of descriptor want to find,
+ *                         it will output the number of descriptor has been found in the gattc cache with the given characteristic.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_gatt_status_t esp_ble_gattc_get_descr_by_uuid(esp_gatt_if_t gattc_if,
+                                                  uint16_t conn_id,
+                                                  uint16_t start_handle,
+                                                  uint16_t end_handle,
+                                                  esp_bt_uuid_t char_uuid,
+                                                  esp_bt_uuid_t descr_uuid,
+                                                  esp_gattc_descr_elem_t *result,
+                                                  uint16_t *count);
+
+/**
+ * @brief           Find the descriptor with the given characteristic handle in the gattc cache
+ *                  Note: It just get descriptor from local cache, won't get from remote devices.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id: connection ID which identify the server.
+ * @param[in]       char_handle: the characteristic handle.
+ * @param[in]       descr_uuid: the descriptor uuid.
+ * @param[out]      result: The pointer to the descriptor in the given characteristic.
+ * @param[inout]   count: input the number of descriptor want to find,
+ *                         it will output the number of descriptor has been found in the gattc cache with the given characteristic.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_gatt_status_t esp_ble_gattc_get_descr_by_char_handle(esp_gatt_if_t gattc_if,
+                                                         uint16_t conn_id,
+                                                         uint16_t char_handle,
+                                                         esp_bt_uuid_t descr_uuid,
+                                                         esp_gattc_descr_elem_t *result,
+                                                         uint16_t *count);
+
+/**
+ * @brief           Find the include service with the given service handle in the gattc cache
+ *                  Note: It just get include service from local cache, won't get from remote devices.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id: connection ID which identify the server.
+ * @param[in]       start_handle: the attribute start handle
+ * @param[in]       end_handle: the attribute end handle
+ * @param[in]       incl_uuid: the include service uuid
+ * @param[out]      result: The pointer to the include service in the given service.
+ * @param[inout]   count: input the number of include service want to find,
+ *                         it will output the number of include service has been found in the gattc cache with the given service.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_gatt_status_t esp_ble_gattc_get_include_service(esp_gatt_if_t gattc_if,
+                                                    uint16_t conn_id,
+                                                    uint16_t start_handle,
+                                                    uint16_t end_handle,
+                                                    esp_bt_uuid_t *incl_uuid,
+                                                    esp_gattc_incl_svc_elem_t *result,
+                                                    uint16_t *count);
+
+
+/**
+ * @brief           Find the attribute count with the given service or characteristic in the gattc cache
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id: connection ID which identify the server.
+ * @param[in]       type: the attribute type.
+ * @param[in]       start_handle: the attribute start handle, if the type is ESP_GATT_DB_DESCRIPTOR, this parameter should be ignore
+ * @param[in]       end_handle: the attribute end handle, if the type is ESP_GATT_DB_DESCRIPTOR, this parameter should be ignore
+ * @param[in]       char_handle: the characteristic handle, this parameter valid when the type is ESP_GATT_DB_DESCRIPTOR. If the type
+ *                               isn't ESP_GATT_DB_DESCRIPTOR, this parameter should be ignore.
+ * @param[out]      count: output the number of attribute has been found in the gattc cache with the given attribute type.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_gatt_status_t esp_ble_gattc_get_attr_count(esp_gatt_if_t gattc_if,
+                                               uint16_t conn_id,
+                                               esp_gatt_db_attr_type_t type,
+                                               uint16_t start_handle,
+                                               uint16_t end_handle,
+                                               uint16_t char_handle,
+                                               uint16_t *count);
+
+/**
+ * @brief           This function is called to get the GATT database.
+ *                  Note: It just get attribute data base from local cache, won't get from remote devices.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       start_handle: the attribute start handle
+ * @param[in]       end_handle: the attribute end handle
+ * @param[in]       conn_id: connection ID which identify the server.
+ * @param[in]       db: output parameter which will contain the GATT database copy.
+ *                      Caller is responsible for freeing it.
+ * @param[in]       count: number of elements in database.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_gatt_status_t esp_ble_gattc_get_db(esp_gatt_if_t gattc_if, uint16_t conn_id, uint16_t start_handle, uint16_t end_handle,
+                                        esp_gattc_db_elem_t *db, uint16_t *count);
+
+/**
+ * @brief           This function is called to read a service's characteristics of
+ *                  the given characteristic handle
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id : connection ID.
+ * @param[in]       handle : characteritic handle to read.
+ * @param[in]       auth_req : authenticate request type
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_read_char (esp_gatt_if_t gattc_if,
+                                   uint16_t conn_id,
+                                   uint16_t handle,
+                                   esp_gatt_auth_req_t auth_req);
+
+/**
+ * @brief           This function is called to read a service's characteristics of
+ *                  the given characteristic UUID
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id : connection ID.
+ * @param[in]       start_handle : the attribute start handle.
+ * @param[in]       end_handle : the attribute end handle
+ * @param[in]       uuid : The UUID of attribute which will be read.
+ * @param[in]       auth_req : authenticate request type
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_read_by_type (esp_gatt_if_t gattc_if,
+                                      uint16_t conn_id,
+                                      uint16_t start_handle,
+                                      uint16_t end_handle,
+                                      esp_bt_uuid_t *uuid,
+                                      esp_gatt_auth_req_t auth_req);
+
+/**
+ * @brief           This function is called to read multiple characteristic or
+ *                  characteristic descriptors.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id : connection ID.
+ * @param[in]       read_multi : pointer to the read multiple parameter.
+ * @param[in]       auth_req : authenticate request type
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_read_multiple(esp_gatt_if_t gattc_if,
+                                      uint16_t conn_id, esp_gattc_multi_t *read_multi,
+                                      esp_gatt_auth_req_t auth_req);
+
+
+/**
+ * @brief           This function is called to read a characteristics descriptor.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id : connection ID.
+ * @param[in]       handle : descriptor handle to read.
+ * @param[in]       auth_req : authenticate request type
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_read_char_descr (esp_gatt_if_t gattc_if,
+                                         uint16_t conn_id,
+                                         uint16_t handle,
+                                         esp_gatt_auth_req_t auth_req);
+
+
+/**
+ * @brief           This function is called to write characteristic value.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id : connection ID.
+ * @param[in]       handle : characteristic handle to write.
+ * @param[in]       value_len: length of the value to be written.
+ * @param[in]       value : the value to be written.
+ * @param[in]       write_type : the type of attribute write operation.
+ * @param[in]       auth_req : authentication request.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_write_char( esp_gatt_if_t gattc_if,
+                                    uint16_t conn_id,
+                                    uint16_t handle,
+                                    uint16_t value_len,
+                                    uint8_t *value,
+                                    esp_gatt_write_type_t write_type,
+                                    esp_gatt_auth_req_t auth_req);
+
+
+/**
+ * @brief           This function is called to write characteristic descriptor value.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id : connection ID
+ * @param[in]       handle : descriptor hadle to write.
+ * @param[in]       value_len: length of the value to be written.
+ * @param[in]       value : the value to be written.
+ * @param[in]       write_type : the type of attribute write operation.
+ * @param[in]       auth_req : authentication request.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_write_char_descr (esp_gatt_if_t gattc_if,
+                                         uint16_t conn_id,
+                                         uint16_t handle,
+                                         uint16_t value_len,
+                                         uint8_t *value,
+                                         esp_gatt_write_type_t write_type,
+                                         esp_gatt_auth_req_t auth_req);
+
+
+/**
+ * @brief           This function is called to prepare write a characteristic value.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id : connection ID.
+ * @param[in]       handle : characteristic handle to prepare write.
+ * @param[in]       offset : offset of the write value.
+ * @param[in]       value_len: length of the value to be written.
+ * @param[in]       value : the value to be written.
+ * @param[in]       auth_req : authentication request.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_prepare_write(esp_gatt_if_t gattc_if,
+                                      uint16_t conn_id,
+                                      uint16_t handle,
+                                      uint16_t offset,
+                                      uint16_t value_len,
+                                      uint8_t *value,
+                                      esp_gatt_auth_req_t auth_req);
+
+
+/**
+ * @brief           This function is called to prepare write a characteristic descriptor value.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id : connection ID.
+ * @param[in]       handle : characteristic descriptor handle to prepare write.
+ * @param[in]       offset : offset of the write value.
+ * @param[in]       value_len: length of the value to be written.
+ * @param[in]       value : the value to be written.
+ * @param[in]       auth_req : authentication request.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_prepare_write_char_descr(esp_gatt_if_t gattc_if,
+                                                 uint16_t conn_id,
+                                                 uint16_t handle,
+                                                 uint16_t offset,
+                                                 uint16_t value_len,
+                                                 uint8_t *value,
+                                                 esp_gatt_auth_req_t auth_req);
+
+
+/**
+ * @brief           This function is called to execute write a prepare write sequence.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       conn_id : connection ID.
+ * @param[in]       is_execute : execute or cancel.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_execute_write (esp_gatt_if_t gattc_if, uint16_t conn_id, bool is_execute);
+
+
+/**
+ * @brief           This function is called to register for notification of a service.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       server_bda : target GATT server.
+ * @param[in]       handle : GATT characteristic handle.
+ *
+ * @return
+ *                  - ESP_OK: registration succeeds
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_register_for_notify (esp_gatt_if_t gattc_if,
+                                             esp_bd_addr_t server_bda,
+                                             uint16_t handle);
+
+
+/**
+ * @brief           This function is called to de-register for notification of a service.
+ *
+ * @param[in]       gattc_if: Gatt client access interface.
+ * @param[in]       server_bda : target GATT server.
+ * @param[in]       handle : GATT characteristic handle.
+ *
+ * @return
+ *                  - ESP_OK: unregister succeeds
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gattc_unregister_for_notify (esp_gatt_if_t gattc_if,
+                                               esp_bd_addr_t server_bda,
+                                               uint16_t handle);
+
+
+/**
+* @brief           Refresh the server cache store in the gattc stack of the remote device. If
+*                  the device is connected, this API will restart the discovery of service information of the remote device
+*
+* @param[in]       remote_bda: remote device BD address.
+*
+* @return
+*                  - ESP_OK: success
+*                  - other: failed
+*
+*/
+esp_err_t esp_ble_gattc_cache_refresh(esp_bd_addr_t remote_bda);
+
+/**
+* @brief           Add or delete the associated address with the source address.
+*                  Note: The role of this API is mainly when the client side has stored a server-side database,
+*                        when it needs to connect another device, but the device's attribute database is the same
+*                        as the server database stored on the client-side, calling this API can use the database
+*                        that the device has stored used as the peer server database to reduce the attribute
+*                        database search and discovery process and speed up the connection time.
+*                        The associated address mains that device want to used the database has stored in the local cache.
+*                        The source address mains that device want to share the database to the associated address device.
+*
+* @param[in]       gattc_if: Gatt client access interface.
+* @param[in]       src_addr: the source address which provide the attribute table.
+* @param[in]       assoc_addr: the associated device address which went to share the attribute table with the source address.
+* @param[in]       is_assoc: true add the associated device address, false remove the associated device address.
+* @return
+*                  - ESP_OK: success
+*                  - other: failed
+*
+*/
+esp_err_t esp_ble_gattc_cache_assoc(esp_gatt_if_t gattc_if, esp_bd_addr_t src_addr,
+                                      esp_bd_addr_t assoc_addr, bool is_assoc);
+/**
+* @brief           Get the address list which has store the attribute table in the gattc cache. There will
+*                  callback ESP_GATTC_GET_ADDR_LIST_EVT event when get address list complete.
+*
+* @param[in]       gattc_if: Gatt client access interface.
+* @return
+*                  - ESP_OK: success
+*                  - other: failed
+*
+*/
+esp_err_t esp_ble_gattc_cache_get_addr_list(esp_gatt_if_t gattc_if);
+
+/**
+* @brief           Clean the service cache of this device in the gattc stack,
+*
+* @param[in]       remote_bda: remote device BD address.
+*
+* @return
+*                  - ESP_OK: success
+*                  - other: failed
+*
+*/
+esp_err_t esp_ble_gattc_cache_clean(esp_bd_addr_t remote_bda);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_GATTC_API_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gatts_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gatts_api.h
new file mode 100644
index 00000000000..475ae08c553
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_gatts_api.h
@@ -0,0 +1,585 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_GATTS_API_H__
+#define __ESP_GATTS_API_H__
+
+#include "esp_bt_defs.h"
+#include "esp_gatt_defs.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// GATT Server callback function events
+typedef enum {
+    ESP_GATTS_REG_EVT                 = 0,       /*!< When register application id, the event comes */
+    ESP_GATTS_READ_EVT                = 1,       /*!< When gatt client request read operation, the event comes */
+    ESP_GATTS_WRITE_EVT               = 2,       /*!< When gatt client request write operation, the event comes */
+    ESP_GATTS_EXEC_WRITE_EVT          = 3,       /*!< When gatt client request execute write, the event comes */
+    ESP_GATTS_MTU_EVT                 = 4,       /*!< When set mtu complete, the event comes */
+    ESP_GATTS_CONF_EVT                = 5,       /*!< When receive confirm, the event comes */
+    ESP_GATTS_UNREG_EVT               = 6,       /*!< When unregister application id, the event comes */
+    ESP_GATTS_CREATE_EVT              = 7,       /*!< When create service complete, the event comes */
+    ESP_GATTS_ADD_INCL_SRVC_EVT       = 8,       /*!< When add included service complete, the event comes */
+    ESP_GATTS_ADD_CHAR_EVT            = 9,       /*!< When add characteristic complete, the event comes */
+    ESP_GATTS_ADD_CHAR_DESCR_EVT      = 10,      /*!< When add descriptor complete, the event comes */
+    ESP_GATTS_DELETE_EVT              = 11,      /*!< When delete service complete, the event comes */
+    ESP_GATTS_START_EVT               = 12,      /*!< When start service complete, the event comes */
+    ESP_GATTS_STOP_EVT                = 13,      /*!< When stop service complete, the event comes */
+    ESP_GATTS_CONNECT_EVT             = 14,      /*!< When gatt client connect, the event comes */
+    ESP_GATTS_DISCONNECT_EVT          = 15,      /*!< When gatt client disconnect, the event comes */
+    ESP_GATTS_OPEN_EVT                = 16,      /*!< When connect to peer, the event comes */
+    ESP_GATTS_CANCEL_OPEN_EVT         = 17,      /*!< When disconnect from peer, the event comes */
+    ESP_GATTS_CLOSE_EVT               = 18,      /*!< When gatt server close, the event comes */
+    ESP_GATTS_LISTEN_EVT              = 19,      /*!< When gatt listen to be connected the event comes */
+    ESP_GATTS_CONGEST_EVT             = 20,      /*!< When congest happen, the event comes */
+    /* following is extra event */
+    ESP_GATTS_RESPONSE_EVT            = 21,      /*!< When gatt send response complete, the event comes */
+    ESP_GATTS_CREAT_ATTR_TAB_EVT      = 22,      /*!< When gatt create table complete, the event comes */
+    ESP_GATTS_SET_ATTR_VAL_EVT        = 23,      /*!< When gatt set attr value complete, the event comes */
+    ESP_GATTS_SEND_SERVICE_CHANGE_EVT = 24,      /*!< When gatt send service change indication complete, the event comes */
+} esp_gatts_cb_event_t;
+
+/**
+ * @brief Gatt server callback parameters union
+ */
+typedef union {
+    /**
+     * @brief ESP_GATTS_REG_EVT
+     */
+    struct gatts_reg_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t app_id;                /*!< Application id which input in register API */
+    } reg;                              /*!< Gatt server callback param of ESP_GATTS_REG_EVT */
+
+    /**
+     * @brief ESP_GATTS_READ_EVT
+     */
+    struct gatts_read_evt_param {
+        uint16_t conn_id;               /*!< Connection id */
+        uint32_t trans_id;              /*!< Transfer id */
+        esp_bd_addr_t bda;              /*!< The bluetooth device address which been read */
+        uint16_t handle;                /*!< The attribute handle */
+        uint16_t offset;                /*!< Offset of the value, if the value is too long */
+        bool is_long;                   /*!< The value is too long or not */
+        bool need_rsp;                  /*!< The read operation need to do response */
+    } read;                             /*!< Gatt server callback param of ESP_GATTS_READ_EVT */
+
+
+    /**
+     * @brief ESP_GATTS_WRITE_EVT
+     */
+    struct gatts_write_evt_param {
+        uint16_t conn_id;               /*!< Connection id */
+        uint32_t trans_id;              /*!< Transfer id */
+        esp_bd_addr_t bda;              /*!< The bluetooth device address which been written */
+        uint16_t handle;                /*!< The attribute handle */
+        uint16_t offset;                /*!< Offset of the value, if the value is too long */
+        bool need_rsp;                  /*!< The write operation need to do response */
+        bool is_prep;                   /*!< This write operation is prepare write */
+        uint16_t len;                   /*!< The write attribute value length */
+        uint8_t *value;                 /*!< The write attribute value */
+    } write;                            /*!< Gatt server callback param of ESP_GATTS_WRITE_EVT */
+
+    /**
+     * @brief ESP_GATTS_EXEC_WRITE_EVT
+     */
+    struct gatts_exec_write_evt_param {
+        uint16_t conn_id;               /*!< Connection id */
+        uint32_t trans_id;              /*!< Transfer id */
+        esp_bd_addr_t bda;              /*!< The bluetooth device address which been written */
+#define ESP_GATT_PREP_WRITE_CANCEL 0x00 /*!< Prepare write flag to indicate cancel prepare write */
+#define ESP_GATT_PREP_WRITE_EXEC   0x01 /*!< Prepare write flag to indicate execute prepare write */
+        uint8_t exec_write_flag;        /*!< Execute write flag */
+    } exec_write;                       /*!< Gatt server callback param of ESP_GATTS_EXEC_WRITE_EVT */
+
+    /**
+     * @brief ESP_GATTS_MTU_EVT
+     */
+    struct gatts_mtu_evt_param {
+        uint16_t conn_id;               /*!< Connection id */
+        uint16_t mtu;                   /*!< MTU size */
+    } mtu;                              /*!< Gatt server callback param of ESP_GATTS_MTU_EVT */
+
+    /**
+     * @brief ESP_GATTS_CONF_EVT
+     */
+    struct gatts_conf_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t conn_id;               /*!< Connection id */
+        uint16_t handle;                /*!< attribute handle */
+        uint16_t len;                   /*!< The indication or notification value length, len is valid when send notification or indication failed */
+        uint8_t *value;                 /*!< The indication or notification value , value is valid when send notification or indication failed */
+    } conf;                             /*!< Gatt server callback param of ESP_GATTS_CONF_EVT (confirm) */
+
+    /**
+     * @brief ESP_GATTS_UNREG_EVT
+     */
+
+    /**
+     * @brief ESP_GATTS_CREATE_EVT
+     */
+    struct gatts_create_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t service_handle;        /*!< Service attribute handle */
+        esp_gatt_srvc_id_t service_id;  /*!< Service id, include service uuid and other information */
+    } create;                           /*!< Gatt server callback param of ESP_GATTS_CREATE_EVT */
+
+    /**
+     * @brief ESP_GATTS_ADD_INCL_SRVC_EVT
+     */
+    struct gatts_add_incl_srvc_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t attr_handle;           /*!< Included service attribute handle */
+        uint16_t service_handle;        /*!< Service attribute handle */
+    } add_incl_srvc;                    /*!< Gatt server callback param of ESP_GATTS_ADD_INCL_SRVC_EVT */
+
+    /**
+     * @brief ESP_GATTS_ADD_CHAR_EVT
+     */
+    struct gatts_add_char_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t attr_handle;           /*!< Characteristic attribute handle */
+        uint16_t service_handle;        /*!< Service attribute handle */
+        esp_bt_uuid_t char_uuid;        /*!< Characteristic uuid */
+    } add_char;                         /*!< Gatt server callback param of ESP_GATTS_ADD_CHAR_EVT */
+
+    /**
+     * @brief ESP_GATTS_ADD_CHAR_DESCR_EVT
+     */
+    struct gatts_add_char_descr_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t attr_handle;           /*!< Descriptor attribute handle */
+        uint16_t service_handle;        /*!< Service attribute handle */
+        esp_bt_uuid_t descr_uuid;       /*!< Characteristic descriptor uuid */
+    } add_char_descr;                   /*!< Gatt server callback param of ESP_GATTS_ADD_CHAR_DESCR_EVT */
+
+    /**
+     * @brief ESP_GATTS_DELETE_EVT
+     */
+    struct gatts_delete_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t service_handle;        /*!< Service attribute handle */
+    } del;                              /*!< Gatt server callback param of ESP_GATTS_DELETE_EVT */
+
+    /**
+     * @brief ESP_GATTS_START_EVT
+     */
+    struct gatts_start_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t service_handle;        /*!< Service attribute handle */
+    } start;                            /*!< Gatt server callback param of ESP_GATTS_START_EVT */
+
+    /**
+     * @brief ESP_GATTS_STOP_EVT
+     */
+    struct gatts_stop_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t service_handle;        /*!< Service attribute handle */
+    } stop;                             /*!< Gatt server callback param of ESP_GATTS_STOP_EVT */
+
+    /**
+     * @brief ESP_GATTS_CONNECT_EVT
+     */
+    struct gatts_connect_evt_param {
+        uint16_t conn_id;               /*!< Connection id */
+        uint8_t link_role;              /*!< Link role : master role = 0  ; slave role = 1*/
+        esp_bd_addr_t remote_bda;       /*!< Remote bluetooth device address */
+        esp_gatt_conn_params_t conn_params; /*!< current Connection parameters */
+    } connect;                          /*!< Gatt server callback param of ESP_GATTS_CONNECT_EVT */
+
+    /**
+     * @brief ESP_GATTS_DISCONNECT_EVT
+     */
+    struct gatts_disconnect_evt_param {
+        uint16_t conn_id;               /*!< Connection id */
+        esp_bd_addr_t remote_bda;       /*!< Remote bluetooth device address */
+        esp_gatt_conn_reason_t reason;  /*!< Indicate the reason of disconnection */
+    } disconnect;                       /*!< Gatt server callback param of ESP_GATTS_DISCONNECT_EVT */
+
+    /**
+     * @brief ESP_GATTS_OPEN_EVT
+     */
+    struct gatts_open_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+    } open;                             /*!< Gatt server callback param of ESP_GATTS_OPEN_EVT */
+
+    /**
+     * @brief ESP_GATTS_CANCEL_OPEN_EVT
+     */
+    struct gatts_cancel_open_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+    } cancel_open;                      /*!< Gatt server callback param of ESP_GATTS_CANCEL_OPEN_EVT */
+
+    /**
+     * @brief ESP_GATTS_CLOSE_EVT
+     */
+    struct gatts_close_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t conn_id;               /*!< Connection id */
+    } close;                            /*!< Gatt server callback param of ESP_GATTS_CLOSE_EVT */
+
+    /**
+     * @brief ESP_GATTS_LISTEN_EVT
+     */
+    /**
+     * @brief ESP_GATTS_CONGEST_EVT
+     */
+    struct gatts_congest_evt_param {
+        uint16_t conn_id;               /*!< Connection id */
+        bool congested;                 /*!< Congested or not */
+    } congest;                          /*!< Gatt server callback param of ESP_GATTS_CONGEST_EVT */
+
+    /**
+     * @brief ESP_GATTS_RESPONSE_EVT
+     */
+    struct gatts_rsp_evt_param {
+        esp_gatt_status_t status;       /*!< Operation status */
+        uint16_t handle;                /*!< Attribute handle which send response */
+    } rsp;                              /*!< Gatt server callback param of ESP_GATTS_RESPONSE_EVT */
+
+    /**
+     * @brief ESP_GATTS_CREAT_ATTR_TAB_EVT
+     */
+    struct gatts_add_attr_tab_evt_param{
+        esp_gatt_status_t status;       /*!< Operation status */
+        esp_bt_uuid_t svc_uuid;         /*!< Service uuid type */
+        uint8_t svc_inst_id;            /*!< Service id */
+        uint16_t num_handle;            /*!< The number of the attribute handle to be added to the gatts database */
+        uint16_t *handles;              /*!< The number to the handles */
+    } add_attr_tab;                     /*!< Gatt server callback param of ESP_GATTS_CREAT_ATTR_TAB_EVT */
+
+
+   /**
+    * @brief ESP_GATTS_SET_ATTR_VAL_EVT
+    */
+    struct gatts_set_attr_val_evt_param{
+        uint16_t srvc_handle;           /*!< The service handle */
+        uint16_t attr_handle;           /*!< The attribute  handle */
+        esp_gatt_status_t status;       /*!< Operation status*/
+    } set_attr_val;                     /*!< Gatt server callback param of ESP_GATTS_SET_ATTR_VAL_EVT */
+
+    /**
+    * @brief ESP_GATTS_SEND_SERVICE_CHANGE_EVT
+    */
+    struct gatts_send_service_change_evt_param{
+        esp_gatt_status_t status;       /*!< Operation status*/
+    } service_change;                    /*!< Gatt server callback param of ESP_GATTS_SEND_SERVICE_CHANGE_EVT */
+
+} esp_ble_gatts_cb_param_t;
+
+/**
+ * @brief GATT Server callback function type
+ * @param event : Event type
+ * @param gatts_if : GATT server access interface, normally
+ *                   different gatts_if correspond to different profile
+ * @param param : Point to callback parameter, currently is union type
+ */
+typedef void (* esp_gatts_cb_t)(esp_gatts_cb_event_t event, esp_gatt_if_t gatts_if, esp_ble_gatts_cb_param_t *param);
+
+/**
+ * @brief           This function is called to register application callbacks
+ *                  with BTA GATTS module.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_register_callback(esp_gatts_cb_t callback);
+
+/**
+ * @brief           This function is called to register application identifier
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_app_register(uint16_t app_id);
+
+
+
+/**
+ * @brief           unregister with GATT Server.
+ *
+ * @param[in]       gatts_if: GATT server access interface
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_app_unregister(esp_gatt_if_t gatts_if);
+
+
+/**
+ * @brief           Create a service. When service creation is done, a callback
+ *                  event ESP_GATTS_CREATE_EVT is called to report status
+ *                  and service ID to the profile. The service ID obtained in
+ *                  the callback function needs to be used when adding included
+ *                  service and characteristics/descriptors into the service.
+ *
+ * @param[in]       gatts_if: GATT server access interface
+ * @param[in]       service_id: service ID.
+ * @param[in]       num_handle: number of handle requested for this service.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_create_service(esp_gatt_if_t gatts_if,
+                                       esp_gatt_srvc_id_t *service_id, uint16_t num_handle);
+
+
+/**
+ * @brief               Create a service attribute tab.
+ * @param[in]       gatts_attr_db: the pointer to the service attr tab
+ * @param[in]       gatts_if: GATT server access interface
+ * @param[in]       max_nb_attr: the number of attribute to be added to the service database.
+ * @param[in]       srvc_inst_id: the instance id of the service
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_create_attr_tab(const esp_gatts_attr_db_t *gatts_attr_db,
+                                            esp_gatt_if_t gatts_if,
+                                            uint8_t max_nb_attr,
+                                            uint8_t srvc_inst_id);
+/**
+ * @brief           This function is called to add an included service. This function have to be called between
+ *                  'esp_ble_gatts_create_service' and 'esp_ble_gatts_add_char'.  After included
+ *                  service is included, a callback event ESP_GATTS_ADD_INCL_SRVC_EVT
+ *                  is reported the included service ID.
+ *
+ * @param[in]       service_handle: service handle to which this included service is to
+ *                  be added.
+ * @param[in]       included_service_handle: the service ID to be included.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_add_included_service(uint16_t service_handle, uint16_t included_service_handle);
+
+
+
+/**
+ * @brief           This function is called to add a characteristic into a service.
+ *
+ * @param[in]       service_handle: service handle to which this included service is to
+ *                  be added.
+ * @param[in]       char_uuid : Characteristic UUID.
+ * @param[in]       perm      : Characteristic value declaration attribute permission.
+ * @param[in]       property  : Characteristic Properties
+ * @param[in]       char_val    : Characteristic value
+ * @param[in]       control : attribute response control byte
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_add_char(uint16_t service_handle,  esp_bt_uuid_t  *char_uuid,
+                                 esp_gatt_perm_t perm, esp_gatt_char_prop_t property, esp_attr_value_t *char_val,
+                                 esp_attr_control_t *control);
+
+
+/**
+ * @brief           This function is called to add characteristic descriptor. When
+ *                  it's done, a callback event ESP_GATTS_ADD_DESCR_EVT is called
+ *                  to report the status and an ID number for this descriptor.
+ *
+ * @param[in]       service_handle: service handle to which this characteristic descriptor is to
+ *                              be added.
+ * @param[in]       perm: descriptor access permission.
+ * @param[in]       descr_uuid: descriptor UUID.
+ * @param[in]       char_descr_val  : Characteristic descriptor value
+ * @param[in]       control : attribute response control byte
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_add_char_descr (uint16_t service_handle,
+                                        esp_bt_uuid_t   *descr_uuid,
+                                        esp_gatt_perm_t perm, esp_attr_value_t *char_descr_val,
+                                        esp_attr_control_t *control);
+
+
+
+/**
+ * @brief           This function is called to delete a service. When this is done,
+ *                  a callback event ESP_GATTS_DELETE_EVT is report with the status.
+ *
+ * @param[in]       service_handle: service_handle to be deleted.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_delete_service(uint16_t service_handle);
+
+
+
+/**
+ * @brief           This function is called to start a service.
+ *
+ * @param[in]       service_handle: the service handle to be started.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_start_service(uint16_t service_handle);
+
+
+
+/**
+ * @brief           This function is called to stop a service.
+ *
+ * @param[in]       service_handle - service to be topped.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_stop_service(uint16_t service_handle);
+
+
+
+/**
+ * @brief           Send indicate or notify to GATT client.
+ *                  Set param need_confirm as false will send notification, otherwise indication.
+ *
+ * @param[in]       gatts_if: GATT server access interface
+ * @param[in]       conn_id - connection id to indicate.
+ * @param[in]       attr_handle - attribute handle to indicate.
+ * @param[in]       value_len - indicate value length.
+ * @param[in]       value: value to indicate.
+ * @param[in]       need_confirm - Whether a confirmation is required.
+ *                  false sends a GATT notification, true sends a GATT indication.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_send_indicate(esp_gatt_if_t gatts_if, uint16_t conn_id, uint16_t attr_handle,
+                                      uint16_t value_len, uint8_t *value, bool need_confirm);
+
+
+/**
+ * @brief           This function is called to send a response to a request.
+ *
+ * @param[in]       gatts_if: GATT server access interface
+ * @param[in]       conn_id - connection identifier.
+ * @param[in]       trans_id - transfer id
+ * @param[in]       status - response status
+ * @param[in]       rsp - response data.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_send_response(esp_gatt_if_t gatts_if, uint16_t conn_id, uint32_t trans_id,
+                                      esp_gatt_status_t status, esp_gatt_rsp_t *rsp);
+
+
+/**
+ * @brief           This function is called to set the attribute value by the application
+ *
+ * @param[in]       attr_handle: the attribute handle which to be set
+ * @param[in]       length: the value length
+ * @param[in]       value: the pointer to the attribute value
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_set_attr_value(uint16_t attr_handle, uint16_t length, const uint8_t *value);
+
+/**
+ * @brief       Retrieve attribute value
+ *
+ * @param[in]   attr_handle: Attribute handle.
+ * @param[out]  length: pointer to the attribute value length
+ * @param[out]  value:  Pointer to attribute value payload, the value cannot be modified by user
+ *
+ * @return
+ *                  - ESP_GATT_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_gatt_status_t esp_ble_gatts_get_attr_value(uint16_t attr_handle, uint16_t *length, const uint8_t **value);
+
+
+/**
+ * @brief           Open a direct open connection or add a background auto connection
+ *
+ * @param[in]       gatts_if: GATT server access interface
+ * @param[in]       remote_bda: remote device bluetooth device address.
+ * @param[in]       is_direct: direct connection or background auto connection
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_open(esp_gatt_if_t gatts_if, esp_bd_addr_t remote_bda, bool is_direct);
+
+/**
+ * @brief           Close a connection  a remote device.
+ *
+ * @param[in]       gatts_if: GATT server access interface
+ * @param[in]       conn_id: connection ID to be closed.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_close(esp_gatt_if_t gatts_if, uint16_t conn_id);
+
+/**
+ * @brief           Send service change indication
+ *
+ * @param[in]       gatts_if: GATT server access interface
+ * @param[in]       remote_bda: remote device bluetooth device address.
+ *                  If remote_bda is NULL then it will send service change
+ *                  indication to all the connected devices and if not then
+ *                  to a specific device
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ *
+ */
+esp_err_t esp_ble_gatts_send_service_change_indication(esp_gatt_if_t gatts_if, esp_bd_addr_t remote_bda);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_GATTS_API_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hf_ag_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hf_ag_api.h
new file mode 100644
index 00000000000..3d4999f8a7e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hf_ag_api.h
@@ -0,0 +1,612 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_HF_AG_API_H__
+#define __ESP_HF_AG_API_H__
+
+#include "esp_err.h"
+#include "esp_bt_defs.h"
+#include "esp_hf_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* features masks of HF AG  */
+#define ESP_HF_PEER_FEAT_3WAY       0x01        /* Three-way calling */
+#define ESP_HF_PEER_FEAT_ECNR       0x02        /* Echo cancellation and/or noise reduction */
+#define ESP_HF_PEER_FEAT_VREC       0x04        /* Voice recognition */
+#define ESP_HF_PEER_FEAT_INBAND     0x08        /* In-band ring tone */
+#define ESP_HF_PEER_FEAT_VTAG       0x10        /* Attach a phone number to a voice tag */
+#define ESP_HF_PEER_FEAT_REJECT     0x20        /* Ability to reject incoming call */
+#define ESP_HF_PEER_FEAT_ECS        0x40        /* Enhanced Call Status */
+#define ESP_HF_PEER_FEAT_ECC        0x80        /* Enhanced Call Control */
+#define ESP_HF_PEER_FEAT_EXTERR    0x100        /* Extended error codes */
+#define ESP_HF_PEER_FEAT_CODEC     0x200        /* Codec Negotiation */
+
+/* CHLD feature masks of HF AG */
+#define ESP_HF_CHLD_FEAT_REL           0x01       /* 0  Release waiting call or held calls */
+#define ESP_HF_CHLD_FEAT_REL_ACC       0x02       /* 1  Release active calls and accept other waiting or held call */
+#define ESP_HF_CHLD_FEAT_REL_X         0x04       /* 1x Release specified active call only */
+#define ESP_HF_CHLD_FEAT_HOLD_ACC      0x08       /* 2  Active calls on hold and accept other waiting or held call */
+#define ESP_HF_CHLD_FEAT_PRIV_X        0x10       /* 2x Request private mode with specified call(put the rest on hold) */
+#define ESP_HF_CHLD_FEAT_MERGE         0x20       /* 3  Add held call to multiparty */
+#define ESP_HF_CHLD_FEAT_MERGE_DETACH  0x40       /* 4  Connect two calls and leave(disconnect from multiparty) */
+
+/// HF callback events
+typedef enum
+{
+    ESP_HF_CONNECTION_STATE_EVT = 0,          /*!< Connection state changed event */
+    ESP_HF_AUDIO_STATE_EVT,                   /*!< Audio connection state change event */
+    ESP_HF_BVRA_RESPONSE_EVT,                 /*!< Voice recognition state change event */
+    ESP_HF_VOLUME_CONTROL_EVT,                /*!< Audio volume control command from HF Client, provided by +VGM or +VGS message */
+
+    ESP_HF_UNAT_RESPONSE_EVT,                 /*!< Unknown AT cmd Response*/
+    ESP_HF_IND_UPDATE_EVT,                    /*!< Indicator Update Event*/
+    ESP_HF_CIND_RESPONSE_EVT,                 /*!< Call And Device Indicator Response*/
+    ESP_HF_COPS_RESPONSE_EVT,                 /*!< Current operator information */
+    ESP_HF_CLCC_RESPONSE_EVT,                 /*!< List of current calls notification */
+    ESP_HF_CNUM_RESPONSE_EVT,                 /*!< Subscriber information response from HF Client */
+    ESP_HF_VTS_RESPONSE_EVT,                  /*!< Enable or not DTMF */
+    ESP_HF_NREC_RESPONSE_EVT,                 /*!< Enable or not NREC */
+
+    ESP_HF_ATA_RESPONSE_EVT,                  /*!< Answer an Incoming Call */
+    ESP_HF_CHUP_RESPONSE_EVT,                 /*!< Reject an Incoming Call */
+    ESP_HF_DIAL_EVT,                          /*!< Origin an outgoing call with specific number or the dial the last number */
+    ESP_HF_WBS_RESPONSE_EVT,                  /*!< Codec Status */
+    ESP_HF_BCS_RESPONSE_EVT,                  /*!< Final Codec Choice */
+} esp_hf_cb_event_t;
+
+/// HFP AG callback parameters
+typedef union
+{
+    /**
+     * @brief  ESP_HS_CONNECTION_STATE_EVT
+     */
+    struct hf_conn_stat_param {
+        esp_bd_addr_t remote_bda;                 /*!< Remote bluetooth device address */
+        esp_hf_connection_state_t state;          /*!< Connection state */
+        uint32_t peer_feat;                       /*!< HF supported features */
+        uint32_t chld_feat;                       /*!< AG supported features on call hold and multiparty services */
+    } conn_stat;                                  /*!< AG callback param of ESP_HF_CONNECTION_STATE_EVT */
+
+    /**
+     * @brief ESP_HF_AUDIO_STATE_EVT
+     */
+    struct hf_audio_stat_param {
+        esp_bd_addr_t remote_addr;                /*!< Remote bluetooth device address */
+        esp_hf_audio_state_t state;               /*!< Audio connection state */
+    } audio_stat;                                 /*!< AG callback param of ESP_HF_AUDIO_STATE_EVT */
+
+    /**
+     * @brief ESP_HF_BVRA_RESPONSE_EVT
+     */
+    struct hf_vra_rep_param {
+        esp_bd_addr_t     remote_addr;            /*!< Remote bluetooth device address */
+        esp_hf_vr_state_t value;                  /*!< Voice recognition state */
+    } vra_rep;                                    /*!< AG callback param of ESP_HF_BVRA_RESPONSE_EVT */
+
+    /**
+     * @brief ESP_HF_VOLUME_CONTROL_EVT
+     */
+    struct hf_volume_control_param {
+        esp_hf_volume_type_t type;                /*!< Volume control target, speaker or microphone */
+        int volume;                               /*!< Gain, ranges from 0 to 15 */
+    } volume_control;                             /*!< AG callback param of ESP_HF_VOLUME_CONTROL_EVT */
+
+    /**
+     * @brief ESP_HF_UNAT_RESPOSNE_EVT
+     */
+    struct hf_unat_rep_param {
+        char *unat;                               /*!< Unknown AT command string */
+    }unat_rep;                                    /*!< AG callback param of ESP_HF_UNAT_RESPONSE_EVT */
+
+    /**
+     * @brief ESP_HF_CIND_RESPONSE_EVT
+     */
+    struct hf_cind_param {
+        esp_hf_call_status_t       call_status;         /*!< call status indicator */
+        esp_hf_call_setup_status_t call_setup_status;   /*!< call setup status indicator */
+        esp_hf_network_state_t svc;                     /*!< bluetooth proprietary call hold status indicator */
+        int signal_strength;                            /*!< bluetooth proprietary call hold status indicator */
+        esp_hf_roaming_status_t roam;                   /*!< bluetooth proprietary call hold status indicator */
+        int battery_level;                              /*!< battery charge value, ranges from 0 to 5 */
+        esp_hf_call_held_status_t  call_held_status;    /*!< bluetooth proprietary call hold status indicator */
+    } cind;                                             /*!< AG callback param of ESP_HF_CIND_RESPONSE_EVT */
+
+    /**
+     * @brief ESP_HF_DIAL_EVT
+     */
+    struct hf_out_call_param {
+        esp_bd_addr_t remote_addr;                /*!< remote bluetooth device address */
+        char *num_or_loc;                         /*!< location in phone memory */
+    } out_call;                                   /*!< AG callback param of ESP_HF_DIAL_EVT */
+
+    /**
+     * @brief ESP_HF_VTS_RESPOSNE_EVT
+     */
+    struct hf_vts_rep_param {
+        char *code;                               /*!< MTF code from HF Client */
+    }vts_rep;                                     /*!< AG callback param of ESP_HF_VTS_RESPONSE_EVT */
+
+    /**
+     * @brief ESP_HF_NREC_RESPOSNE_EVT
+     */
+    struct hf_nrec_param {
+       esp_hf_nrec_t state;                       /*!< NREC enabled or disabled */
+    } nrec;                                       /*!< AG callback param of ESP_HF_NREC_RESPONSE_EVT */
+
+    /**
+     * @brief ESP_HF_WBS_RESPONSE_EVT
+     */
+    struct hf_wbs_rep_param {
+        esp_hf_wbs_config_t codec;                /*!< codec mode CVSD or mSBC */
+    } wbs_rep;                                    /*!< AG callback param of ESP_HF_WBS_RESPONSE_EVT */
+
+    /**
+     * @brief ESP_HF_BCS_RESPONSE_EVT
+     */
+    struct hf_bcs_rep_param {
+        esp_hf_wbs_config_t mode;                 /*!< codec mode CVSD or mSBC */
+    } bcs_rep;                                    /*!< AG callback param of ESP_HF_BCS_RESPONSE_EVT */
+
+} esp_hf_cb_param_t;                              /*!< HFP AG callback param compound*/
+
+/**
+ * @brief           AG incoming data callback function, the callback is useful in case of
+ *                  Voice Over HCI.
+ *
+ * @param[in]       buf : pointer to incoming data(payload of HCI synchronous data packet), the
+ *                  buffer is allocated inside bluetooth protocol stack and will be released after
+ *                  invoke of the callback is finished.
+ *
+ * @param[in]       len : size(in bytes) in buf
+ */
+typedef void (* esp_hf_incoming_data_cb_t)(const uint8_t *buf, uint32_t len);
+
+/**
+ * @brief           AG outgoing data callback function, the callback is useful in case of
+ *                  Voice Over HCI. Once audio connection is set up and the application layer has
+ *                  prepared data to send, the lower layer will call this function to read data
+ *                  and then send. This callback is supposed to be implemented as non-blocking,
+ *                  and if data is not enough, return value 0 is supposed.
+ *
+ * @param[in]       buf : pointer to incoming data(payload of HCI synchronous data packet), the
+ *                  buffer is allocated inside bluetooth protocol stack and will be released after
+ *                  invoke of the callback is finished.
+ *
+ * @param[in]       len : size(in bytes) in buf
+ *
+ * @return          length of data successfully read
+ */
+typedef uint32_t (* esp_hf_outgoing_data_cb_t) (uint8_t *buf, uint32_t len);
+
+/**
+ * @brief           HF AG callback function type
+ *
+ * @param           event : Event type
+ *
+ * @param           param : Pointer to callback parameter
+ */
+typedef void (* esp_hf_cb_t) (esp_hf_cb_event_t event, esp_hf_cb_param_t *param);
+
+/************************************************************************************
+**  ESP HF API
+************************************************************************************/
+/**
+ * @brief           Register application callback function to HFP AG module.
+ *                  This function should be called only after esp_bluedroid_enable() completes successfully.
+ *
+ * @param[in]       callback: HFP AG event callback function
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: if callback is a NULL function pointer
+ *
+ */
+esp_err_t esp_bt_hf_register_callback(esp_hf_cb_t callback);
+
+/**
+ *
+ * @brief           Initialize the bluetooth HF AG module.
+ *                  This function should be called after esp_bluedroid_enable() completes successfully.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ *
+ * @return
+ *                  - ESP_OK: if the initialization request is sent successfully
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_init(esp_bd_addr_t remote_addr);
+
+/**
+ *
+ * @brief           De-initialize for HF AG module.
+ *                  This function should be called only after esp_bluedroid_enable() completes successfully.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_deinit(esp_bd_addr_t remote_addr);
+
+/**
+ *
+ * @brief           To establish a Service Level Connection to remote bluetooth HFP client device.
+ *                  This function must be called after esp_bt_hf_init() and before esp_bt_hf_deinit().
+ *
+ * @param[in]       remote_bda: remote bluetooth HFP client device address
+ *
+ * @return
+ *                  - ESP_OK: connect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_connect(esp_bd_addr_t remote_bda);
+
+/**
+ *
+ * @brief           Disconnect from the remote HFP client. This function must be called
+ *                  after esp_bt_hf_init() and before esp_bt_hf_deinit().
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_disconnect(esp_bd_addr_t remote_bda);
+
+/**
+ *
+ * @brief           Create audio connection with remote HFP client.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_connect_audio(esp_bd_addr_t remote_bda);
+
+/**
+ *
+ * @brief           Release the established audio connection with remote HFP client.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_disconnect_audio(esp_bd_addr_t remote_bda);
+
+/**
+ *
+ * @brief           Response of Volume Recognition Command(AT+VRA) from HFP client.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_bda: the device address of voice recognization initiator
+ *
+ * @param[in]       value: 0 - voice recognition disabled, 1- voice recognition enabled
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_vra(esp_bd_addr_t remote_bda, esp_hf_vr_state_t value);
+
+/**
+ *
+ * @brief           Volume synchronization with HFP client.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ *
+ * @param[in]       type: volume control target, speaker or microphone
+ *
+ * @param[in]       volume: gain of the speaker of microphone, ranges 0 to 15
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_volume_control(esp_bd_addr_t remote_bda, esp_hf_volume_control_target_t type, int volume);
+
+ /**
+ *
+ * @brief           Handle Unknown AT command from HFP Client.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ *
+ * @param[in]       unat: User AT command response to HF Client.
+ *                        It will response "ERROR" by default if unat is NULL.
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_unat_response(esp_bd_addr_t remote_addr, char *unat);
+
+ /**
+ *
+ * @brief           Unsolicited send extend AT error code to HFP Client.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ * @param[in]       response_code: AT command response code
+ * @param[in]       error_code: CME error code
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_cmee_response(esp_bd_addr_t remote_bda, esp_hf_at_response_code_t response_code, esp_hf_cme_err_t error_code);
+
+ /**
+ *
+ * @brief           Usolicited send device status notificationto HFP Client.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ * @param[in]       call_state: call state
+ * @param[in]       call_setup_state: call setup state
+ * @param[in]       ntk_state: network service state
+ * @param[in]       signal: signal strength from 0 to 5
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_indchange_notification(esp_bd_addr_t remote_addr, esp_hf_call_status_t call_state,
+                                            esp_hf_call_setup_status_t call_setup_state,
+                                            esp_hf_network_state_t ntk_state, int signal);
+
+ /**
+ *
+ * @brief           Response to device individual indicatiors to HFP Client.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ * @param[in]       call_state: call state
+ * @param[in]       call_setup_state: call setup state
+ * @param[in]       ntk_state: network service state
+ * @param[in]       signal: signal strength from 0 to 5
+ * @param[in]       roam: roam state
+ * @param[in]       batt_lev: batery level from 0 to 5
+ * @param[in]       call_held_status: call held status
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_cind_response(esp_bd_addr_t remote_addr,
+                                esp_hf_call_status_t call_state,
+                                esp_hf_call_setup_status_t call_setup_state,
+                                esp_hf_network_state_t ntk_state, int signal, esp_hf_roaming_status_t roam, int batt_lev,
+                                esp_hf_call_held_status_t call_held_status);
+
+/**
+ *
+ * @brief           Reponse for AT+COPS command from HF Client.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ * @param[in]       name: current operator name
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_cops_response(esp_bd_addr_t remote_addr, char *name);
+
+/**
+ *
+ * @brief           Response to AT+CLCC command from HFP Client.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ * @param[in]       index: the index of current call
+ * @param[in]       dir: call direction (incoming/outgoing)
+ * @param[in]       current_call_state: current call state
+ * @param[in]       mode: current call mode (voice/data/fax)
+ * @param[in]       mpty: single or multi type
+ * @param[in]       number: current call number
+ * @param[in]       type: international type or unknow
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_clcc_response(esp_bd_addr_t remote_addr, int index, esp_hf_current_call_direction_t dir,
+                                 esp_hf_current_call_status_t current_call_state, esp_hf_current_call_mode_t mode,
+                                 esp_hf_current_call_mpty_type_t mpty, char *number, esp_hf_call_addr_type_t type);
+
+/**
+ *
+ * @brief           Response for AT+CNUM command from HF Client.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ * @param[in]       number: registration number
+ * @param[in]       type: service type (unknown/voice/fax)
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_cnum_response(esp_bd_addr_t remote_addr, char *number, esp_hf_subscriber_service_type_t type);
+
+/**
+ *
+ * @brief           Inform HF Client that AG Provided in-band ring tone or not.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ * @param[in]       state: in-band ring tone state
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_bsir(esp_bd_addr_t remote_addr, esp_hf_in_band_ring_state_t state);
+
+/**
+ *
+ * @brief           Answer Incoming Call from AG.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ * @param[in]       num_active: the number of active call
+ * @param[in]       num_held: the number of held call
+ * @param[in]       call_state: call state
+ * @param[in]       call_setup_state: call setup state
+ * @param[in]       number: number of the incoming call
+ * @param[in]       call_addr_type: call address type
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_answer_call(esp_bd_addr_t remote_addr, int num_active, int num_held,
+                                esp_hf_call_status_t call_state,  esp_hf_call_setup_status_t call_setup_state,
+                                char *number, esp_hf_call_addr_type_t call_addr_type);
+
+/**
+ *
+ * @brief           Reject Incoming Call from AG.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ * @param[in]       num_active: the number of active call
+ * @param[in]       num_held: the number of held call
+ * @param[in]       call_state: call state
+ * @param[in]       call_setup_state: call setup state
+ * @param[in]       number: number of the incoming call
+ * @param[in]       call_addr_type: call address type
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_reject_call(esp_bd_addr_t remote_addr, int num_active, int num_held,
+                                esp_hf_call_status_t call_state,  esp_hf_call_setup_status_t call_setup_state,
+                                char *number, esp_hf_call_addr_type_t call_addr_type);
+
+/**
+ *
+ * @brief           Initiate a call from AG.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ * @param[in]       num_active: the number of active call
+ * @param[in]       num_held: the number of held call
+ * @param[in]       call_state: call state
+ * @param[in]       call_setup_state: call setup state
+ * @param[in]       number: number of the outgoing call
+ * @param[in]       call_addr_type: call address type
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_out_call(esp_bd_addr_t remote_addr, int num_active, int num_held,
+                            esp_hf_call_status_t call_state,  esp_hf_call_setup_status_t call_setup_state,
+                            char *number, esp_hf_call_addr_type_t call_addr_type);
+
+/**
+ *
+ * @brief           End an ongoing call.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *
+ * @param[in]       remote_addr: remote bluetooth device address
+ * @param[in]       num_active: the number of active call
+ * @param[in]       num_held: the number of held call
+ * @param[in]       call_state: call state
+ * @param[in]       call_setup_state: call setup state
+ * @param[in]       number: number of the call
+ * @param[in]       call_addr_type: call address type
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_bt_hf_end_call(esp_bd_addr_t remote_addr, int num_active, int num_held,
+                            esp_hf_call_status_t call_state,  esp_hf_call_setup_status_t call_setup_state,
+                            char *number, esp_hf_call_addr_type_t call_addr_type);
+
+/**
+ * @brief           Register AG data output function.
+ *                  The callback is only used in the case that Voice Over HCI is enabled.
+ *
+ * @param[in]       recv: HFP client incoming data callback function
+ * @param[in]       send: HFP client outgoing data callback function
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: if callback is a NULL function pointer
+ *
+ */
+esp_err_t esp_bt_hf_register_data_callback(esp_hf_incoming_data_cb_t recv, esp_hf_outgoing_data_cb_t send);
+
+
+/**
+ * @brief           Trigger the lower-layer to fetch and send audio data.
+ *
+ *                  This function is only used in the case that Voice Over HCI is enabled.
+ *                  As a precondition to use this API, Service Level Connection shall exist with HFP client.
+ *                  After this function is called, lower layer will invoke esp_hf_client_outgoing_data_cb_t to fetch data
+ *
+ */
+void esp_hf_outgoing_data_ready(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //__ESP_HF_AG_API_H__
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h
new file mode 100644
index 00000000000..55569bc5c84
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h
@@ -0,0 +1,667 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_HF_CLIENT_API_H__
+#define __ESP_HF_CLIENT_API_H__
+
+#include "esp_err.h"
+#include "esp_bt_defs.h"
+#include "esp_hf_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_BT_HF_CLIENT_NUMBER_LEN           (32)
+#define ESP_BT_HF_CLIENT_OPERATOR_NAME_LEN    (16)
+
+/// Bluetooth HFP RFCOMM connection and service level connection status
+typedef enum {
+    ESP_HF_CLIENT_CONNECTION_STATE_DISCONNECTED = 0,     /*!< RFCOMM data link channel released */
+    ESP_HF_CLIENT_CONNECTION_STATE_CONNECTING,           /*!< connecting remote device on the RFCOMM data link*/
+    ESP_HF_CLIENT_CONNECTION_STATE_CONNECTED,            /*!< RFCOMM connection established */
+    ESP_HF_CLIENT_CONNECTION_STATE_SLC_CONNECTED,        /*!< service level connection established */
+    ESP_HF_CLIENT_CONNECTION_STATE_DISCONNECTING,        /*!< disconnecting with remote device on the RFCOMM dat link*/
+} esp_hf_client_connection_state_t;
+
+/// Bluetooth HFP audio connection status
+typedef enum {
+    ESP_HF_CLIENT_AUDIO_STATE_DISCONNECTED = 0,          /*!< audio connection released */
+    ESP_HF_CLIENT_AUDIO_STATE_CONNECTING,                /*!< audio connection has been initiated */
+    ESP_HF_CLIENT_AUDIO_STATE_CONNECTED,                 /*!< audio connection is established */
+    ESP_HF_CLIENT_AUDIO_STATE_CONNECTED_MSBC,            /*!< mSBC audio connection is established */
+} esp_hf_client_audio_state_t;
+
+/// in-band ring tone state
+typedef enum {
+    ESP_HF_CLIENT_IN_BAND_RINGTONE_NOT_PROVIDED = 0,
+    ESP_HF_CLIENT_IN_BAND_RINGTONE_PROVIDED,
+} esp_hf_client_in_band_ring_state_t;
+
+/* features masks of AG */
+#define ESP_HF_CLIENT_PEER_FEAT_3WAY       0x01        /* Three-way calling */
+#define ESP_HF_CLIENT_PEER_FEAT_ECNR       0x02        /* Echo cancellation and/or noise reduction */
+#define ESP_HF_CLIENT_PEER_FEAT_VREC       0x04        /* Voice recognition */
+#define ESP_HF_CLIENT_PEER_FEAT_INBAND     0x08        /* In-band ring tone */
+#define ESP_HF_CLIENT_PEER_FEAT_VTAG       0x10        /* Attach a phone number to a voice tag */
+#define ESP_HF_CLIENT_PEER_FEAT_REJECT     0x20        /* Ability to reject incoming call */
+#define ESP_HF_CLIENT_PEER_FEAT_ECS        0x40        /* Enhanced Call Status */
+#define ESP_HF_CLIENT_PEER_FEAT_ECC        0x80        /* Enhanced Call Control */
+#define ESP_HF_CLIENT_PEER_FEAT_EXTERR    0x100        /* Extended error codes */
+#define ESP_HF_CLIENT_PEER_FEAT_CODEC     0x200        /* Codec Negotiation */
+/* HFP 1.7+ */
+#define ESP_HF_CLIENT_PEER_FEAT_HF_IND    0x400        /* HF Indicators */
+#define ESP_HF_CLIENT_PEER_FEAT_ESCO_S4   0x800        /* eSCO S4 Setting Supported */
+
+/* CHLD feature masks of AG */
+#define ESP_HF_CLIENT_CHLD_FEAT_REL           0x01       /* 0  Release waiting call or held calls */
+#define ESP_HF_CLIENT_CHLD_FEAT_REL_ACC       0x02       /* 1  Release active calls and accept other waiting or held call */
+#define ESP_HF_CLIENT_CHLD_FEAT_REL_X         0x04       /* 1x Release specified active call only */
+#define ESP_HF_CLIENT_CHLD_FEAT_HOLD_ACC      0x08       /* 2  Active calls on hold and accept other waiting or held call */
+#define ESP_HF_CLIENT_CHLD_FEAT_PRIV_X        0x10       /* 2x Request private mode with specified call(put the rest on hold) */
+#define ESP_HF_CLIENT_CHLD_FEAT_MERGE         0x20       /* 3  Add held call to multiparty */
+#define ESP_HF_CLIENT_CHLD_FEAT_MERGE_DETACH  0x40       /* 4  Connect two calls and leave(disconnect from multiparty) */
+
+/// HF CLIENT callback events
+typedef enum {
+    ESP_HF_CLIENT_CONNECTION_STATE_EVT = 0,          /*!< connection state changed event */
+    ESP_HF_CLIENT_AUDIO_STATE_EVT,                   /*!< audio connection state change event */
+    ESP_HF_CLIENT_BVRA_EVT,                          /*!< voice recognition state change event */
+    ESP_HF_CLIENT_CIND_CALL_EVT,                     /*!< call indication */
+    ESP_HF_CLIENT_CIND_CALL_SETUP_EVT,               /*!< call setup indication */
+    ESP_HF_CLIENT_CIND_CALL_HELD_EVT,                /*!< call held indication */
+    ESP_HF_CLIENT_CIND_SERVICE_AVAILABILITY_EVT,     /*!< network service availability indication */
+    ESP_HF_CLIENT_CIND_SIGNAL_STRENGTH_EVT,          /*!< signal strength indication */
+    ESP_HF_CLIENT_CIND_ROAMING_STATUS_EVT,           /*!< roaming status indication */
+    ESP_HF_CLIENT_CIND_BATTERY_LEVEL_EVT,            /*!< battery level indication */
+    ESP_HF_CLIENT_COPS_CURRENT_OPERATOR_EVT,         /*!< current operator information */
+    ESP_HF_CLIENT_BTRH_EVT,                          /*!< call response and hold event */
+    ESP_HF_CLIENT_CLIP_EVT,                          /*!< Calling Line Identification notification */
+    ESP_HF_CLIENT_CCWA_EVT,                          /*!< call waiting notification */
+    ESP_HF_CLIENT_CLCC_EVT,                          /*!< list of current calls notification */
+    ESP_HF_CLIENT_VOLUME_CONTROL_EVT,                /*!< audio volume control command from AG, provided by +VGM or +VGS message */
+    ESP_HF_CLIENT_AT_RESPONSE_EVT,                   /*!< AT command response event */
+    ESP_HF_CLIENT_CNUM_EVT,                          /*!< subscriber information response from AG */
+    ESP_HF_CLIENT_BSIR_EVT,                          /*!< setting of in-band ring tone */
+    ESP_HF_CLIENT_BINP_EVT,                          /*!< requested number of last voice tag from AG */
+    ESP_HF_CLIENT_RING_IND_EVT,                      /*!< ring indication event */
+} esp_hf_client_cb_event_t;
+
+/// HFP client callback parameters
+typedef union {
+    /**
+     * @brief  ESP_HF_CLIENT_CONNECTION_STATE_EVT
+     */
+    struct hf_client_conn_stat_param {
+        esp_hf_client_connection_state_t state;  /*!< HF connection state */
+        uint32_t peer_feat;                      /*!< AG supported features */
+        uint32_t chld_feat;                      /*!< AG supported features on call hold and multiparty services */
+        esp_bd_addr_t remote_bda;                /*!< remote bluetooth device address */
+    } conn_stat;                                 /*!< HF callback param of ESP_HF_CLIENT_CONNECTION_STATE_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_AUDIO_STATE_EVT
+     */
+    struct hf_client_audio_stat_param {
+        esp_hf_client_audio_state_t state;       /*!< audio connection state */
+        esp_bd_addr_t remote_bda;                /*!< remote bluetooth device address */
+    } audio_stat;                                /*!< HF callback param of ESP_HF_CLIENT_AUDIO_STATE_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_BVRA_EVT
+     */
+    struct hf_client_bvra_param {
+        esp_hf_vr_state_t value;                 /*!< voice recognition state */
+    } bvra;                                      /*!< HF callback param of ESP_HF_CLIENT_BVRA_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_CIND_SERVICE_AVAILABILITY_EVT
+     */
+    struct hf_client_service_availability_param {
+        esp_hf_network_state_t status;           /*!< service availability status */
+    } service_availability;                      /*!< HF callback param of ESP_HF_CLIENT_CIND_SERVICE_AVAILABILITY_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_CIND_ROAMING_STATUS_EVT
+     */
+    struct hf_client_network_roaming_param {
+        esp_hf_roaming_status_t status;          /*!< roaming status */
+    } roaming;                                   /*!< HF callback param of ESP_HF_CLIENT_CIND_ROAMING_STATUS_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_CIND_SIGNAL_STRENGTH_EVT
+     */
+    struct hf_client_signal_strength_ind_param {
+        int value;                               /*!< signal strength value, ranges from 0 to 5 */
+    } signal_strength;                           /*!< HF callback param of ESP_HF_CLIENT_CIND_SIGNAL_STRENGTH_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_CIND_BATTERY_LEVEL_EVT
+     */
+    struct hf_client_battery_level_ind_param {
+        int value;                               /*!< battery charge value, ranges from 0 to 5 */
+    } battery_level;                             /*!< HF callback param of ESP_HF_CLIENT_CIND_BATTERY_LEVEL_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_COPS_CURRENT_OPERATOR_EVT
+     */
+    struct hf_client_current_operator_param {
+        const char *name;                        /*!< name of the network operator */
+    } cops;                                      /*!< HF callback param of ESP_HF_CLIENT_COPS_CURRENT_OPERATOR_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_CIND_CALL_EVT
+     */
+    struct hf_client_call_ind_param {
+        esp_hf_call_status_t status;             /*!< call status indicator */
+    } call;                                      /*!< HF callback param of ESP_HF_CLIENT_CIND_CALL_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_CIND_CALL_SETUP_EVT
+     */
+    struct hf_client_call_setup_ind_param {
+        esp_hf_call_setup_status_t status;       /*!< call setup status indicator */
+    } call_setup;                                /*!< HF callback param of ESP_HF_CLIENT_BVRA_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_CIND_CALL_HELD_EVT
+     */
+    struct hf_client_call_held_ind_param {
+        esp_hf_call_held_status_t status;        /*!< bluetooth proprietary call hold status indicator */
+    } call_held;                                 /*!< HF callback param of ESP_HF_CLIENT_CIND_CALL_HELD_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_BTRH_EVT
+     */
+    struct hf_client_btrh_param {
+        esp_hf_btrh_status_t status;             /*!< call hold and response status result code */
+    } btrh;                                      /*!< HF callback param of ESP_HF_CLIENT_BRTH_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_CLIP_EVT
+     */
+    struct hf_client_clip_param {
+        const char *number;                      /*!< phone number string of call */
+    } clip;                                      /*!< HF callback param of ESP_HF_CLIENT_CLIP_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_CCWA_EVT
+     */
+    struct hf_client_ccwa_param {
+        const char *number;                      /*!< phone number string of waiting call */
+    } ccwa;                                      /*!< HF callback param of ESP_HF_CLIENT_BVRA_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_CLCC_EVT
+     */
+    struct hf_client_clcc_param {
+        int idx;                                 /*!< numbering(starting with 1) of the call */
+        esp_hf_current_call_direction_t dir;     /*!< direction of the call */
+        esp_hf_current_call_status_t status;     /*!< status of the call */
+        esp_hf_current_call_mpty_type_t mpty;    /*!< multi-party flag */
+        char *number;                            /*!< phone number(optional) */
+    } clcc;                                      /*!< HF callback param of ESP_HF_CLIENT_CLCC_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_VOLUME_CONTROL_EVT
+     */
+    struct hf_client_volume_control_param {
+        esp_hf_volume_control_target_t type;     /*!< volume control target, speaker or microphone */
+        int volume;                              /*!< gain, ranges from 0 to 15 */
+    } volume_control;                            /*!< HF callback param of ESP_HF_CLIENT_VOLUME_CONTROL_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_AT_RESPONSE_EVT
+     */
+    struct hf_client_at_response_param {
+        esp_hf_at_response_code_t code;          /*!< AT response code */
+        esp_hf_cme_err_t cme;                    /*!< Extended Audio Gateway Error Result Code */
+    } at_response;                               /*!< HF callback param of ESP_HF_CLIENT_AT_RESPONSE_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_CNUM_EVT
+     */
+    struct hf_client_cnum_param {
+        const char *number;                      /*!< phone number string */
+        esp_hf_subscriber_service_type_t type;   /*!< service type that the phone number relates to */
+    } cnum;                                      /*!< HF callback param of ESP_HF_CLIENT_CNUM_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_BSIR_EVT
+     */
+    struct hf_client_bsirparam {
+        esp_hf_client_in_band_ring_state_t state;  /*!< setting state of in-band ring tone */
+    } bsir;                                        /*!< HF callback param of ESP_HF_CLIENT_BSIR_EVT */
+
+    /**
+     * @brief ESP_HF_CLIENT_BINP_EVT
+     */
+    struct hf_client_binp_param {
+        const char *number;                      /*!< phone number corresponding to the last voice tag in the HF */
+    } binp;                                      /*!< HF callback param of ESP_HF_CLIENT_BINP_EVT */
+
+} esp_hf_client_cb_param_t;                      /*!< HFP client callback parameters */
+
+/**
+ * @brief           HFP client incoming data callback function, the callback is useful in case of
+ *                  Voice Over HCI.
+ * @param[in]       buf : pointer to incoming data(payload of HCI synchronous data packet), the
+ *                  buffer is allocated inside bluetooth protocol stack and will be released after
+ *                  invoke of the callback is finished.
+ * @param[in]       len : size(in bytes) in buf
+ */
+typedef void (* esp_hf_client_incoming_data_cb_t)(const uint8_t *buf, uint32_t len);
+
+/**
+ * @brief           HFP client outgoing data callback function, the callback is useful in case of
+ *                  Voice Over HCI. Once audio connection is set up and the application layer has
+ *                  prepared data to send, the lower layer will call this function to read data
+ *                  and then send. This callback is supposed to be implemented as non-blocking,
+ *                  and if data is not enough, return value 0 is supposed.
+ *
+ * @param[in]       buf : pointer to incoming data(payload of HCI synchronous data packet), the
+ *                  buffer is allocated inside bluetooth protocol stack and will be released after
+ *                  invoke of the callback is finished.
+ *
+ * @param[in]       len : size(in bytes) in buf
+ *
+ * @return          length of data successfully read
+ *
+ */
+typedef uint32_t (* esp_hf_client_outgoing_data_cb_t)(uint8_t *buf, uint32_t len);
+
+/**
+ * @brief           HFP client callback function type
+ *
+ * @param           event : Event type
+ *
+ * @param           param : Pointer to callback parameter
+ */
+typedef void (* esp_hf_client_cb_t)(esp_hf_client_cb_event_t event, esp_hf_client_cb_param_t *param);
+
+/**
+ * @brief           Register application callback function to HFP client module.
+ *                  This function should be called only after esp_bluedroid_enable() completes successfully.
+ *
+ * @param[in]       callback: HFP client event callback function
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: if callback is a NULL function pointer
+ *
+ */
+esp_err_t esp_hf_client_register_callback(esp_hf_client_cb_t callback);
+
+/**
+ *
+ * @brief           Initialize the bluetooth HFP client module.
+ *                  This function should be called after esp_bluedroid_enable() completes successfully.
+ *
+ * @return
+ *                  - ESP_OK: if the initialization request is sent successfully
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_init(void);
+
+/**
+ *
+ * @brief           De-initialize for HFP client module.
+ *                  This function should be called only after esp_bluedroid_enable() completes successfully.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_deinit(void);
+
+/**
+ *
+ * @brief           Establish a Service Level Connection to remote bluetooth HFP audio gateway(AG) device.
+ *                  This function must be called after esp_hf_client_init() and before esp_hf_client_deinit().
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ *
+ * @return
+ *                  - ESP_OK: connect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_connect(esp_bd_addr_t remote_bda);
+
+/**
+ *
+ * @brief           Disconnect from the remote HFP audio gateway.
+ *                  This function must be called after esp_hf_client_init() and before esp_hf_client_deinit().
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_disconnect(esp_bd_addr_t remote_bda);
+
+/**
+ *
+ * @brief           Create audio connection with remote HFP AG.
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_connect_audio(esp_bd_addr_t remote_bda);
+
+/**
+ *
+ * @brief           Release the established audio connection with remote HFP AG.
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @param[in]       remote_bda: remote bluetooth device address
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_disconnect_audio(esp_bd_addr_t remote_bda);
+
+/**
+ *
+ * @brief           Enable voice recognition in the AG.
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_start_voice_recognition(void);
+
+/**
+ *
+ * @brief           Disable voice recognition in the AG.
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_stop_voice_recognition(void);
+
+/**
+ *
+ * @brief           Volume synchronization with AG.
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @param[in]       type: volume control target, speaker or microphone
+ * @param[in]       volume: gain of the speaker of microphone, ranges 0 to 15
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_volume_update(esp_hf_volume_control_target_t type, int volume);
+
+/**
+ *
+ * @brief           Place a call with a specified number, if number is NULL, last called number is called.
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @param[in]       number: number string of the call. If NULL, the last number is called(aka re-dial)
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_dial(const char *number);
+
+/**
+ *
+ * @brief           Place a call with number specified by location(speed dial).
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @param[in]       location: location of the number in the memory
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+
+esp_err_t esp_hf_client_dial_memory(int location);
+
+/**
+ *
+ * @brief           Send call hold and multiparty commands, or enhanced call control commands(Use AT+CHLD).
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @param[in]       chld: AT+CHLD call hold and multiparty handling AT command.
+ * @param[in]       idx: used in Enhanced Call Control Mechanisms, used if chld is
+ *                       ESP_HF_CHLD_TYPE_REL_X or ESP_HF_CHLD_TYPE_PRIV_X
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_send_chld_cmd(esp_hf_chld_type_t chld, int idx);
+
+/**
+ *
+ * @brief           Send response and hold action command(Send AT+BTRH command)
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @param[in]       btrh: response and hold action to send
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_send_btrh_cmd(esp_hf_btrh_cmd_t btrh);
+
+/**
+ *
+ * @brief           Answer an incoming call(send ATA command).
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_answer_call(void);
+
+/**
+ *
+ * @brief           Reject an incoming call(send AT+CHUP command).
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_reject_call(void);
+
+/**
+ *
+ * @brief           Query list of current calls in AG(send AT+CLCC command).
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_query_current_calls(void);
+
+/**
+ *
+ * @brief           Query the name of currently selected network operator in AG(use AT+COPS commands).
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_query_current_operator_name(void);
+
+/**
+ *
+ * @brief           Get subscriber information number from AG(send AT+CNUM command)
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_retrieve_subscriber_info(void);
+
+/**
+ *
+ * @brief           Transmit DTMF codes during an ongoing call(use AT+VTS commands)
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @param[in]       code: dtmf code, single ascii character in the set 0-9, #, *, A-D
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_send_dtmf(char code);
+
+/**
+ *
+ * @brief           Request a phone number from AG corresponding to last voice tag recorded (send AT+BINP command).
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ * @return
+ *                  - ESP_OK: disconnect request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_request_last_voice_tag_number(void);
+
+/**
+ *
+ * @brief           Disable echo cancellation and noise reduction in the AG (use AT+NREC=0 command).
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG
+ *
+ * @return
+ *                  - ESP_OK: NREC=0 request is sent to lower layer
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: others
+ *
+ */
+esp_err_t esp_hf_client_send_nrec(void);
+
+
+/**
+ * @brief           Register HFP client data output function; the callback is only used in
+ *                  the case that Voice Over HCI is enabled.
+ *
+ * @param[in]       recv: HFP client incoming data callback function
+ *
+ * @param[in]       send: HFP client outgoing data callback function
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - ESP_INVALID_STATE: if bluetooth stack is not yet enabled
+ *                  - ESP_FAIL: if callback is a NULL function pointer
+ *
+ */
+esp_err_t esp_hf_client_register_data_callback(esp_hf_client_incoming_data_cb_t recv,
+                                               esp_hf_client_outgoing_data_cb_t send);
+
+/**
+ * @brief           Trigger the lower-layer to fetch and send audio data.
+ *                  This function is only only used in the case that Voice Over HCI is enabled. After this
+ *                  function is called, lower layer will invoke esp_hf_client_outgoing_data_cb_t to fetch data.
+ *
+ *                  As a precondition to use this API, Service Level Connection shall exist with AG.
+ *
+ */
+void esp_hf_client_outgoing_data_ready(void);
+
+
+/**
+ * @brief           Initialize the down sampling converter. This is a utility function that can
+ *                  only be used in the case that Voice Over HCI is enabled.
+ *
+ * @param[in]       src_sps: original samples per second(source audio data, i.e. 48000, 32000,
+ *                  16000, 44100, 22050, 11025)
+ * @param[in]       bits: number of bits per pcm sample (16)
+ *
+ * @param[in]       channels: number of channels (i.e. mono(1), stereo(2)...)
+ */
+void esp_hf_client_pcm_resample_init(uint32_t src_sps, uint32_t bits, uint32_t channels);
+
+/**
+ * @brief           Deinitialize the down sampling converter.
+ */
+void esp_hf_client_pcm_resample_deinit(void);
+
+/**
+ * @brief           Down sampling utility to convert high sampling rate into 8K/16bits 1-channel mode PCM
+ *                  samples. This can only be used in the case that Voice Over HCI is enabled.
+ *
+ * @param[in]       src: pointer to the buffer where the original sampling PCM are stored
+ *
+ * @param[in]       in_bytes: length of the input PCM sample buffer in byte
+ *
+ * @param[in]       dst: pointer to the buffer which is to be used to store the converted PCM samples
+ *
+ * @return          number of samples converted
+ */
+int32_t esp_hf_client_pcm_resample(void *src, uint32_t in_bytes, void *dst);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __ESP_HF_CLIENT_API_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hf_defs.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hf_defs.h
new file mode 100644
index 00000000000..5e3e3cfa4f5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hf_defs.h
@@ -0,0 +1,348 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_HF_DEFS_H__
+#define __ESP_HF_DEFS_H__
+
+#include "esp_bt_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_BT_HF_NUMBER_LEN           (32)
+#define ESP_BT_HF_OPERATOR_NAME_LEN    (16)
+
+#ifndef BTC_HSAG_SERVICE_NAME
+#define BTC_HSAG_SERVICE_NAME ("Headset Gateway")
+#endif
+
+#ifndef BTC_HFAG_SERVICE_NAME
+#define BTC_HFAG_SERVICE_NAME ("Handsfree Gateway")
+#endif
+
+#ifndef BTC_HF_SERVICES
+#define BTC_HF_SERVICES    (BTA_HSP_SERVICE_MASK | BTA_HFP_SERVICE_MASK )
+#endif
+
+#ifndef BTC_HF_SERVICE_NAMES
+#define BTC_HF_SERVICE_NAMES {BTC_HSAG_SERVICE_NAME , BTC_HFAG_SERVICE_NAME}
+#endif
+
+#ifndef BTC_HF_SECURITY
+#define BTC_HF_SECURITY    (BTA_SEC_AUTHENTICATE | BTA_SEC_ENCRYPT)
+#endif
+
+#define BTC_HF_CALL_END_TIMEOUT       6
+
+#define BTC_HF_INVALID_IDX       -1
+
+/// in-band ring tone state
+typedef enum {
+    ESP_HF_IN_BAND_RINGTONE_NOT_PROVIDED = 0,
+    ESP_HF_IN_BAND_RINGTONE_PROVIDED,
+} esp_hf_in_band_ring_state_t;
+
+/// voice recognition state
+typedef enum {
+    ESP_HF_VR_STATE_DISABLED = 0,           /*!< voice recognition disabled */
+    ESP_HF_VR_STATE_ENABLED,                /*!< voice recognition enabled */
+} esp_hf_vr_state_t;
+
+/// Bluetooth HFP audio volume control target
+typedef enum {
+    ESP_HF_VOLUME_CONTROL_TARGET_SPK = 0,             /*!< speaker */
+    ESP_HF_VOLUME_CONTROL_TARGET_MIC,                 /*!< microphone */
+} esp_hf_volume_control_target_t;
+
+/// Bluetooth HFP audio connection status
+typedef enum {
+    ESP_HF_AUDIO_STATE_DISCONNECTED = 0,          /*!< audio connection released */
+    ESP_HF_AUDIO_STATE_CONNECTING,                /*!< audio connection has been initiated */
+    ESP_HF_AUDIO_STATE_CONNECTED,                 /*!< audio connection is established */
+    ESP_HF_AUDIO_STATE_CONNECTED_MSBC,            /*!< mSBC audio connection is established */
+} esp_hf_audio_state_t;
+
+typedef enum {
+    ESP_HF_VOLUME_TYPE_SPK = 0,
+    ESP_HF_VOLUME_TYPE_MIC
+} esp_hf_volume_type_t;
+
+/// +CIND network service availability status
+typedef enum
+{
+    ESP_HF_NETWORK_STATE_NOT_AVAILABLE = 0,
+    ESP_HF_NETWORK_STATE_AVAILABLE
+} esp_hf_network_state_t;
+
+/** +CIEV Service type */
+typedef enum
+{
+    ESP_HF_SERVICE_TYPE_HOME = 0,
+    ESP_HF_SERVICE_TYPE_ROAMING
+} esp_hf_service_type_t;
+
+/// +CIND call status indicator values
+typedef enum {
+    ESP_HF_CALL_STATUS_NO_CALLS = 0,                  /*!< no call in progress  */
+    ESP_HF_CALL_STATUS_CALL_IN_PROGRESS = 1,          /*!< call is present(active or held) */
+} esp_hf_call_status_t;
+
+/// +CIND call setup status indicator values
+typedef enum {
+    ESP_HF_CALL_SETUP_STATUS_IDLE = 0,                /*!< no call setup in progress */
+    ESP_HF_CALL_SETUP_STATUS_INCOMING = 1,            /*!< incoming call setup in progress */
+    ESP_HF_CALL_SETUP_STATUS_OUTGOING_DIALING = 2,    /*!< outgoing call setup in dialing state */
+    ESP_HF_CALL_SETUP_STATUS_OUTGOING_ALERTING = 3,   /*!< outgoing call setup in alerting state */
+} esp_hf_call_setup_status_t;
+
+/// +CIND roaming status indicator values
+typedef enum {
+    ESP_HF_ROAMING_STATUS_INACTIVE = 0,               /*!< roaming is not active */
+    ESP_HF_ROAMING_STATUS_ACTIVE,                     /*!< a roaming is active */
+} esp_hf_roaming_status_t;
+
+/// +CIND call held indicator values
+typedef enum {
+    ESP_HF_CALL_HELD_STATUS_NONE = 0,                 /*!< no calls held */
+    ESP_HF_CALL_HELD_STATUS_HELD_AND_ACTIVE = 1,      /*!< both active and held call */
+    ESP_HF_CALL_HELD_STATUS_HELD = 2,                 /*!< call on hold, no active call*/
+} esp_hf_call_held_status_t;
+
+/// +CLCC status of the call
+typedef enum {
+    ESP_HF_CURRENT_CALL_STATUS_ACTIVE = 0,            /*!< active */
+    ESP_HF_CURRENT_CALL_STATUS_HELD = 1,              /*!< held */
+    ESP_HF_CURRENT_CALL_STATUS_DIALING = 2,           /*!< dialing (outgoing calls only) */
+    ESP_HF_CURRENT_CALL_STATUS_ALERTING = 3,          /*!< alerting (outgoing calls only) */
+    ESP_HF_CURRENT_CALL_STATUS_INCOMING = 4,          /*!< incoming (incoming calls only) */
+    ESP_HF_CURRENT_CALL_STATUS_WAITING = 5,           /*!< waiting (incoming calls only) */
+    ESP_HF_CURRENT_CALL_STATUS_HELD_BY_RESP_HOLD = 6, /*!< call held by response and hold */
+} esp_hf_current_call_status_t;
+
+/// +CLCC direction of the call
+typedef enum {
+    ESP_HF_CURRENT_CALL_DIRECTION_OUTGOING = 0,       /*!< outgoing */
+    ESP_HF_CURRENT_CALL_DIRECTION_INCOMING = 1,       /*!< incoming */
+} esp_hf_current_call_direction_t;
+
+/// +CLCC multi-party call flag
+typedef enum {
+    ESP_HF_CURRENT_CALL_MPTY_TYPE_SINGLE = 0,         /*!< not a member of a multi-party call */
+    ESP_HF_CURRENT_CALL_MPTY_TYPE_MULTI = 1,          /*!< member of a multi-party call */
+} esp_hf_current_call_mpty_type_t;
+
+/// +CLCC call mode
+typedef enum {
+    ESP_HF_CURRENT_CALL_MODE_VOICE = 0,
+    ESP_HF_CURRENT_CALL_MODE_DATA = 1,
+    ESP_HF_CURRENT_CALL_MODE_FAX = 2,
+} esp_hf_current_call_mode_t;
+
+/// +CLCC address type
+typedef enum {
+    ESP_HF_CALL_ADDR_TYPE_UNKNOWN = 0x81,            /*!< unkown address type */
+    ESP_HF_CALL_ADDR_TYPE_INTERNATIONAL = 0x91,      /*!< international address */
+} esp_hf_call_addr_type_t;
+
+/// +CNUM service type of the phone number
+typedef enum {
+    ESP_HF_SUBSCRIBER_SERVICE_TYPE_UNKNOWN = 0,      /*!< unknown */
+    ESP_HF_SUBSCRIBER_SERVICE_TYPE_VOICE,            /*!< voice service */
+    ESP_HF_SUBSCRIBER_SERVICE_TYPE_FAX,              /*!< fax service */
+} esp_hf_subscriber_service_type_t;
+
+/// +BTRH response and hold result code
+typedef enum {
+    ESP_HF_BTRH_STATUS_HELD = 0,       /*!< incoming call is put on held in AG */
+    ESP_HF_BTRH_STATUS_ACCEPTED,       /*!< held incoming call is accepted in AG */
+    ESP_HF_BTRH_STATUS_REJECTED,       /*!< held incoming call is rejected in AG */
+} esp_hf_btrh_status_t;
+
+/// AT+BTRH response and hold action code
+typedef enum {
+    ESP_HF_BTRH_CMD_HOLD = 0,          /*!< put the incoming call on hold */
+    ESP_HF_BTRH_CMD_ACCEPT = 1,        /*!< accept a held incoming call */
+    ESP_HF_BTRH_CMD_REJECT = 2,        /*!< reject a held incoming call */
+} esp_hf_btrh_cmd_t;
+
+/* +NREC */
+typedef enum
+{
+    ESP_HF_NREC_STOP = 0,
+    ESP_HF_NREC_START
+} esp_hf_nrec_t;
+
+///+CCWA resposne status
+typedef enum {
+    ESP_HF_CALL_WAITING_INACTIVE,
+    ESP_HF_CALL_WAITING_ACTIVE,
+} esp_hf_call_waiting_status_t;
+
+/* WBS codec setting */
+typedef enum
+{
+   ESP_HF_WBS_NONE,
+   ESP_HF_WBS_NO,
+   ESP_HF_WBS_YES
+}esp_hf_wbs_config_t;
+
+/// Bluetooth HFP RFCOMM connection and service level connection status
+typedef enum {
+    ESP_HF_CONNECTION_STATE_DISCONNECTED = 0,     /*!< RFCOMM data link channel released */
+    ESP_HF_CONNECTION_STATE_CONNECTING,           /*!< connecting remote device on the RFCOMM data link*/
+    ESP_HF_CONNECTION_STATE_CONNECTED,            /*!< RFCOMM connection established */
+    ESP_HF_CONNECTION_STATE_SLC_CONNECTED,        /*!< service level connection established */
+    ESP_HF_CONNECTION_STATE_DISCONNECTING,        /*!< disconnecting with remote device on the RFCOMM data link*/
+} esp_hf_connection_state_t;
+
+/// AT+CHLD command values
+typedef enum {
+    ESP_HF_CHLD_TYPE_REL = 0,               /*!< <0>, Terminate all held or set UDUB("busy") to a waiting call */
+    ESP_HF_CHLD_TYPE_REL_ACC,               /*!< <1>, Terminate all active calls and accepts a waiting/held call */
+    ESP_HF_CHLD_TYPE_HOLD_ACC,              /*!< <2>, Hold all active calls and accepts a waiting/held call */
+    ESP_HF_CHLD_TYPE_MERGE,                 /*!< <3>, Add all held calls to a conference */
+    ESP_HF_CHLD_TYPE_MERGE_DETACH,          /*!< <4>, connect the two calls and disconnects the subscriber from both calls */
+    ESP_HF_CHLD_TYPE_REL_X,                 /*!< <1x>, releases specified calls only */
+    ESP_HF_CHLD_TYPE_PRIV_X,                /*!< <2x>, request private consultation mode with specified call */
+} esp_hf_chld_type_t;
+
+/* AT response code - OK/Error */
+typedef enum {
+    ESP_HF_AT_RESPONSE_CODE_OK = 0,         /*!< acknowledges execution of a command line */
+    ESP_HF_AT_RESPONSE_CODE_ERR,            /*!< command not accepted */
+    ESP_HF_AT_RESPONSE_CODE_NO_CARRIER,     /*!< connection terminated */
+    ESP_HF_AT_RESPONSE_CODE_BUSY,           /*!< busy signal detected */
+    ESP_HF_AT_RESPONSE_CODE_NO_ANSWER,      /*!< connection completion timeout */
+    ESP_HF_AT_RESPONSE_CODE_DELAYED,        /*!< delayed */
+    ESP_HF_AT_RESPONSE_CODE_BLACKLISTED,    /*!< blacklisted */
+    ESP_HF_AT_RESPONSE_CODE_CME,            /*!< CME error */
+} esp_hf_at_response_code_t;
+
+/* AT response code - OK/Error */
+typedef enum {
+    ESP_HF_AT_RESPONSE_ERROR = 0,
+    ESP_HF_AT_RESPONSE_OK
+} esp_hf_at_response_t;
+
+/// Extended Audio Gateway Error Result Code Response
+typedef enum {
+    ESP_HF_CME_AG_FAILURE = 0,                    /*!< ag failure */
+    ESP_HF_CME_NO_CONNECTION_TO_PHONE = 1,        /*!< no connection to phone */
+    ESP_HF_CME_OPERATION_NOT_ALLOWED = 3,         /*!< operation not allowed */
+    ESP_HF_CME_OPERATION_NOT_SUPPORTED = 4,       /*!< operation not supported */
+    ESP_HF_CME_PH_SIM_PIN_REQUIRED = 5,           /*!< PH-SIM PIN Required */
+    ESP_HF_CME_SIM_NOT_INSERTED = 10,             /*!< SIM not inserted */
+    ESP_HF_CME_SIM_PIN_REQUIRED = 11,             /*!< SIM PIN required */
+    ESP_HF_CME_SIM_PUK_REQUIRED = 12,             /*!< SIM PUK required */
+    ESP_HF_CME_SIM_FAILURE = 13,                  /*!< SIM failure */
+    ESP_HF_CME_SIM_BUSY = 14,                     /*!< SIM busy */
+    ESP_HF_CME_INCORRECT_PASSWORD = 16,           /*!< incorrect password */
+    ESP_HF_CME_SIM_PIN2_REQUIRED = 17,            /*!< SIM PIN2 required */
+    ESP_HF_CME_SIM_PUK2_REQUIRED = 18,            /*!< SIM PUK2 required */
+    ESP_HF_CME_MEMEORY_FULL = 20,                 /*!< memory full */
+    ESP_HF_CME_INVALID_INDEX = 21,                /*!< invalid index */
+    ESP_HF_CME_MEMEORY_FAILURE = 23,              /*!< memory failure */
+    ESP_HF_CME_TEXT_STRING_TOO_LONG = 24,         /*!< test string too long */
+    ESP_HF_CME_INVALID_CHARACTERS_IN_TEXT_STRING = 25,  /*!< invalid characters in text string */
+    ESP_HF_CME_DIAL_STRING_TOO_LONG = 26,         /*!< dial string too long*/
+    ESP_HF_CME_INVALID_CHARACTERS_IN_DIAL_STRING = 27,  /*!< invalid characters in dial string */
+    ESP_HF_CME_NO_NETWORK_SERVICE = 30,           /*!< no network service */
+    ESP_HF_CME_NETWORK_TIMEOUT = 31,              /*!< network timeout */
+    ESP_HF_CME_NETWORK_NOT_ALLOWED = 32,          /*!< network not allowed --emergency calls only */
+} esp_hf_cme_err_t;
+
+/** Callback for connection state change.
+ *  state will have one of the values from BtHfConnectionState
+ */
+typedef void (* esp_hf_connection_state_callback)(esp_hf_connection_state_t state, esp_bd_addr_t *bd_addr);
+
+/** Callback for audio connection state change.
+ *  state will have one of the values from BtHfAudioState
+ */
+typedef void (* esp_hf_audio_state_callback)(esp_hf_audio_state_t state, esp_bd_addr_t *bd_addr);
+
+/** Callback for VR connection state change.
+ *  state will have one of the values from BtHfVRState
+ */
+typedef void (* esp_hf_vr_cmd_callback)(esp_hf_vr_state_t state, esp_bd_addr_t *bd_addr);
+
+/** Callback for answer incoming call (ATA)
+ */
+typedef void (* esp_hf_answer_call_cmd_callback)(esp_bd_addr_t *bd_addr);
+
+/** Callback for disconnect call (AT+CHUP)
+ */
+typedef void (* esp_hf_hangup_call_cmd_callback)(esp_bd_addr_t *bd_addr);
+
+/** Callback for disconnect call (AT+CHUP)
+ *  type will denote Speaker/Mic gain (BtHfVolumeControl).
+ */
+typedef void (* esp_hf_volume_cmd_callback)(esp_hf_volume_control_target_t type, int volume, esp_bd_addr_t *bd_addr);
+
+/** Callback for dialing an outgoing call
+ *  If number is NULL, redial
+ */
+typedef void (* esp_hf_dial_call_cmd_callback)(char *number, esp_bd_addr_t *bd_addr);
+
+/** Callback for sending DTMF tones
+ *  tone contains the dtmf character to be sent
+ */
+typedef void (* esp_hf_dtmf_cmd_callback)(char tone, esp_bd_addr_t *bd_addr);
+
+/** Callback for enabling/disabling noise reduction/echo cancellation
+ *  value will be 1 to enable, 0 to disable
+ */
+typedef void (* esp_hf_nrec_cmd_callback)(esp_hf_nrec_t nrec, esp_bd_addr_t *bd_addr);
+
+/** Callback for AT+BCS and event from BAC
+ *  WBS enable, WBS disable
+ */
+typedef void (* esp_hf_wbs_callback)(esp_hf_wbs_config_t wbs, esp_bd_addr_t *bd_addr);
+
+/** Callback for call hold handling (AT+CHLD)
+ *  value will contain the call hold command (0, 1, 2, 3)
+ */
+typedef void (* esp_hf_chld_cmd_callback)(esp_hf_chld_type_t chld, esp_bd_addr_t *bd_addr);
+
+/** Callback for CNUM (subscriber number)
+ */
+typedef void (* esp_hf_cnum_cmd_callback)(esp_bd_addr_t *bd_addr);
+
+/** Callback for indicators (CIND)
+ */
+typedef void (* esp_hf_cind_cmd_callback)(esp_bd_addr_t *bd_addr);
+
+/** Callback for operator selection (COPS)
+ */
+typedef void (* esp_hf_cops_cmd_callback)(esp_bd_addr_t *bd_addr);
+
+/** Callback for call list (AT+CLCC)
+ */
+typedef void (* esp_hf_clcc_cmd_callback) (esp_bd_addr_t *bd_addr);
+
+/** Callback for unknown AT command recd from AG
+ *  at_string will contain the unparsed AT string
+ */
+typedef void (* esp_hf_unknown_at_cmd_callback)(char *at_string, esp_bd_addr_t *bd_addr);
+
+/** Callback for keypressed (HSP) event.
+ */
+typedef void (* esp_hf_key_pressed_cmd_callback)(esp_bd_addr_t *bd_addr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_HF_DEFS_H__ */
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hidd_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hidd_api.h
new file mode 100644
index 00000000000..de90ff8efc6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hidd_api.h
@@ -0,0 +1,379 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+// Copyright 2019      Blake Felt
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_HIDD_API_H__
+#define __ESP_HIDD_API_H__
+
+#include "esp_bt_defs.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* sub_class of hid device */
+#define ESP_HID_CLASS_UNKNOWN      (0x00<<2)
+#define ESP_HID_CLASS_JOS          (0x01<<2)           /* joy stick */
+#define ESP_HID_CLASS_GPD          (0x02<<2)           /* game pad */
+#define ESP_HID_CLASS_RMC          (0x03<<2)           /* remote control */
+#define ESP_HID_CLASS_SED          (0x04<<2)           /* sensing device */
+#define ESP_HID_CLASS_DGT          (0x05<<2)           /* Digitizer tablet */
+#define ESP_HID_CLASS_CDR          (0x06<<2)           /* card reader */
+#define ESP_HID_CLASS_KBD          (0x10<<2)           /* keyboard */
+#define ESP_HID_CLASS_MIC          (0x20<<2)           /* pointing device */
+#define ESP_HID_CLASS_COM          (0x30<<2)           /* Combo keyboard/pointing */
+
+/**
+ * @brief HIDD handshake error
+ */
+typedef enum {
+    ESP_HID_PAR_HANDSHAKE_RSP_SUCCESS = 0,
+    ESP_HID_PAR_HANDSHAKE_RSP_NOT_READY = 1,
+    ESP_HID_PAR_HANDSHAKE_RSP_ERR_INVALID_REP_ID = 2,
+    ESP_HID_PAR_HANDSHAKE_RSP_ERR_UNSUPPORTED_REQ = 3,
+    ESP_HID_PAR_HANDSHAKE_RSP_ERR_INVALID_PARAM = 4,
+    ESP_HID_PAR_HANDSHAKE_RSP_ERR_UNKNOWN = 14,
+    ESP_HID_PAR_HANDSHAKE_RSP_ERR_FATAL = 15
+} esp_hidd_handshake_error_t;
+
+/**
+ * @brief HIDD report types
+ */
+typedef enum {
+    ESP_HIDD_REPORT_TYPE_OTHER = 0,
+    ESP_HIDD_REPORT_TYPE_INPUT,
+    ESP_HIDD_REPORT_TYPE_OUTPUT,
+    ESP_HIDD_REPORT_TYPE_FEATURE,
+    // special value for reports to be sent on INTR(INPUT is assumed)
+    ESP_HIDD_REPORT_TYPE_INTRDATA
+} esp_hidd_report_type_t;
+
+/**
+ * @brief HIDD connection state
+ */
+typedef enum {
+    ESP_HIDD_CONN_STATE_CONNECTED,
+    ESP_HIDD_CONN_STATE_CONNECTING,
+    ESP_HIDD_CONN_STATE_DISCONNECTED,
+    ESP_HIDD_CONN_STATE_DISCONNECTING,
+    ESP_HIDD_CONN_STATE_UNKNOWN
+} esp_hidd_connection_state_t;
+
+/**
+ * @brief HID device protocol modes
+ */
+typedef enum {
+    ESP_HIDD_REPORT_MODE = 0x00,
+    ESP_HIDD_BOOT_MODE = 0x01,
+    ESP_HIDD_UNSUPPORTED_MODE = 0xff
+} esp_hidd_protocol_mode_t;
+
+
+/**
+ * @brief HIDD characteristics for SDP report
+ */
+typedef struct {
+    const char *name;
+    const char *description;
+    const char *provider;
+    uint8_t subclass;
+    uint8_t *desc_list;
+    int desc_list_len;
+} esp_hidd_app_param_t;
+
+/**
+ * @brief HIDD Quality of Service parameters
+ */
+typedef struct {
+    uint8_t service_type;
+    uint32_t token_rate;
+    uint32_t token_bucket_size;
+    uint32_t peak_bandwidth;
+    uint32_t access_latency;
+    uint32_t delay_variation;
+} esp_hidd_qos_param_t;
+
+/**
+ * @brief HID device callback function events
+ */
+typedef enum {
+    ESP_HIDD_INIT_EVT = 0,       /*!< When HID device is inited, the event comes */
+    ESP_HIDD_DEINIT_EVT,         /*!< When HID device is deinited, the event comes */
+    ESP_HIDD_REGISTER_APP_EVT,   /*!< When HID device application registered, the event comes */
+    ESP_HIDD_UNREGISTER_APP_EVT, /*!< When HID device application unregistered, the event comes */
+    ESP_HIDD_OPEN_EVT,           /*!< When HID device connection to host opened, the event comes */
+    ESP_HIDD_CLOSE_EVT,          /*!< When HID device connection to host closed, the event comes */
+    ESP_HIDD_SEND_REPORT_EVT,    /*!< When HID device send report to lower layer, the event comes */
+    ESP_HIDD_REPORT_ERR_EVT,     /*!< When HID device report handshanke error to lower layer, the event comes */
+    ESP_HIDD_GET_REPORT_EVT,     /*!< When HID device receives GET_REPORT request from host, the event comes */
+    ESP_HIDD_SET_REPORT_EVT,     /*!< When HID device receives SET_REPORT request from host, the event comes */
+    ESP_HIDD_SET_PROTOCOL_EVT,   /*!< When HID device receives SET_PROTOCOL request from host, the event comes */
+    ESP_HIDD_INTR_DATA_EVT,      /*!< When HID device receives DATA from host on intr, the event comes */
+    ESP_HIDD_VC_UNPLUG_EVT,      /*!< When HID device initiates Virtual Cable Unplug, the event comes */
+    ESP_HIDD_API_ERR_EVT         /*!< When HID device has API error, the event comes */
+} esp_hidd_cb_event_t;
+
+typedef enum {
+    ESP_HIDD_SUCCESS,
+    ESP_HIDD_ERROR,         /*!< general ESP HD error */
+    ESP_HIDD_NO_RES,        /*!< out of system resources */
+    ESP_HIDD_BUSY,          /*!< Temporarily can not handle this request. */
+    ESP_HIDD_NO_DATA,       /*!< No data. */
+    ESP_HIDD_NEED_INIT,     /*!< HIDD module shall init first */
+    ESP_HIDD_NEED_DEINIT,   /*!< HIDD module shall deinit first */
+    ESP_HIDD_NEED_REG,      /*!< HIDD module shall register first */
+    ESP_HIDD_NEED_DEREG,    /*!< HIDD module shall deregister first */
+    ESP_HIDD_NO_CONNECTION, /*!< connection may have been closed */
+} esp_hidd_status_t;
+
+/**
+ * @brief HID device callback parameters union
+ */
+typedef union {
+    /**
+     * @brief ESP_HIDD_INIT_EVT
+     */
+    struct hidd_init_evt_param {
+        esp_hidd_status_t status; /*!< operation status */
+    } init;                       /*!< HIDD callback param of ESP_HIDD_INIT_EVT */
+
+    /**
+     * @brief ESP_HIDD_DEINIT_EVT
+     */
+    struct hidd_deinit_evt_param {
+        esp_hidd_status_t status; /*!< operation status */
+    } deinit;                     /*!< HIDD callback param of ESP_HIDD_DEINIT_EVT */
+
+    /**
+     * @brief ESP_HIDD_REGISTER_APP_EVT
+     */
+    struct hidd_register_app_evt_param {
+        esp_hidd_status_t status; /*!< operation status */
+        bool in_use;              /*!< indicate whether use virtual cable plug host address */
+        esp_bd_addr_t bd_addr;    /*!< host address */
+    } register_app;               /*!< HIDD callback param of ESP_HIDD_REGISTER_APP_EVT */
+
+    /**
+     * @brief ESP_HIDD_UNREGISTER_APP_EVT
+     */
+    struct hidd_unregister_app_evt_param {
+        esp_hidd_status_t status; /*!< operation status         */
+    } unregister_app;             /*!< HIDD callback param of ESP_HIDD_UNREGISTER_APP_EVT */
+
+    /**
+     * @brief ESP_HIDD_OPEN_EVT
+     */
+    struct hidd_open_evt_param {
+        esp_hidd_status_t status;                /*!< operation status         */
+        esp_hidd_connection_state_t conn_status; /*!< connection status */
+        esp_bd_addr_t bd_addr;                   /*!< host address */
+    } open;                                      /*!< HIDD callback param of ESP_HIDD_OPEN_EVT */
+
+    /**
+     * @brief ESP_HIDD_CLOSE_EVT
+     */
+    struct hidd_close_evt_param {
+        esp_hidd_status_t status;                /*!< operation status         */
+        esp_hidd_connection_state_t conn_status; /*!< connection status        */
+    } close;                                     /*!< HIDD callback param of ESP_HIDD_CLOSE_EVT */
+
+    /**
+     * @brief ESP_HIDD_SEND_REPORT_EVT
+     */
+    struct hidd_send_report_evt_param {
+        esp_hidd_status_t status;           /*!< operation status         */
+        uint8_t reason;                     /*!< lower layer failed reason(ref hiddefs.h)       */
+        esp_hidd_report_type_t report_type; /*!< report type        */
+        uint8_t report_id;                  /*!< report id         */
+    } send_report;                          /*!< HIDD callback param of ESP_HIDD_SEND_REPORT_EVT */
+
+    /**
+     * @brief ESP_HIDD_REPORT_ERR_EVT
+     */
+    struct hidd_report_err_evt_param {
+        esp_hidd_status_t status; /*!< operation status         */
+        uint8_t reason;           /*!< lower layer failed reason(ref hiddefs.h)           */
+    } report_err;                 /*!< HIDD callback param of ESP_HIDD_REPORT_ERR_EVT */
+
+    /**
+     * @brief ESP_HIDD_GET_REPORT_EVT
+     */
+    struct hidd_get_report_evt_param {
+        esp_hidd_report_type_t report_type; /*!< report type        */
+        uint8_t report_id;                  /*!< report id         */
+        uint16_t buffer_size;               /*!< buffer size         */
+    } get_report;                           /*!< HIDD callback param of ESP_HIDD_GET_REPORT_EVT */
+
+    /**
+     * @brief ESP_HIDD_SET_REPORT_EVT
+     */
+    struct hidd_set_report_evt_param {
+        esp_hidd_report_type_t report_type; /*!< report type        */
+        uint8_t report_id;                  /*!< report id         */
+        uint16_t len;                       /*!< set_report data length         */
+        uint8_t *data;                      /*!< set_report data pointer         */
+    } set_report;                           /*!< HIDD callback param of ESP_HIDD_SET_REPORT_EVT */
+
+    /**
+     * @brief ESP_HIDD_SET_PROTOCOL_EVT
+     */
+    struct hidd_set_protocol_evt_param {
+        esp_hidd_protocol_mode_t protocol_mode; /*!< protocol mode        */
+    } set_protocol;                             /*!< HIDD callback param of ESP_HIDD_SET_PROTOCOL_EVT */
+
+    /**
+     * @brief ESP_HIDD_INTR_DATA_EVT
+     */
+    struct hidd_intr_data_evt_param {
+        uint8_t report_id; /*!< interrupt channel report id         */
+        uint16_t len;      /*!< interrupt channel report data length         */
+        uint8_t *data;     /*!< interrupt channel report data pointer         */
+    } intr_data;           /*!< HIDD callback param of ESP_HIDD_INTR_DATA_EVT */
+
+    /**
+     * @brief ESP_HIDD_VC_UNPLUG_EVT
+     */
+    struct hidd_vc_unplug_param {
+        esp_hidd_status_t status;                /*!< operation status         */
+        esp_hidd_connection_state_t conn_status; /*!< connection status        */
+    } vc_unplug;                                 /*!< HIDD callback param of ESP_HIDD_VC_UNPLUG_EVT */
+} esp_hidd_cb_param_t;
+
+/**
+ * @brief       HID device callback function type.
+ * @param       event:      Event type
+ * @param       param:      Point to callback parameter, currently is union type
+ */
+typedef void (esp_hd_cb_t)(esp_hidd_cb_event_t event, esp_hidd_cb_param_t *param);
+
+/**
+ * @brief       This function is called to init callbacks with HID device module.
+ *
+ * @param[in]   callback:   pointer to the init callback function.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_device_register_callback(esp_hd_cb_t callback);
+
+/**
+ * @brief       This function initializes HIDD. This function should be called after esp_bluedroid_enable and
+ *              esp_blueroid_init success, and should be called after esp_bt_hid_device_register_callback.
+ *              When the operation is complete the callback function will be called with ESP_HIDD_INIT_EVT.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_device_init(void);
+
+/**
+ * @brief       This function de-initializes HIDD interface. This function should be called after esp_bluedroid_enable() and
+ *              esp_blueroid_init() success, and should be called after esp_bt_hid_device_init(). When the operation is complete the callback
+ *              function will be called with ESP_HIDD_DEINIT_EVT.
+ *
+ * @return    - ESP_OK: success
+ *            - other: failed
+ */
+esp_err_t esp_bt_hid_device_deinit(void);
+
+/**
+ * @brief     Registers HIDD parameters with SDP and sets l2cap Quality of Service. This function should be called after
+ *            esp_bluedroid_enable and esp_blueroid_init success, and must be done after esp_bt_hid_device_init. When the operation is complete the callback
+ *            function will be called with ESP_HIDD_REGISTER_APP_EVT.
+ *
+ * @param[in] app_param:  HIDD parameters
+ * @param[in] in_qos:     incoming QoS parameters
+ * @param[in] out_qos:    outgoing QoS parameters
+ *
+ * @return    - ESP_OK: success
+ *            - other: failed
+ */
+esp_err_t esp_bt_hid_device_register_app(esp_hidd_app_param_t *app_param, esp_hidd_qos_param_t *in_qos,
+                                         esp_hidd_qos_param_t *out_qos);
+
+/**
+ * @brief   Removes HIDD parameters from SDP and resets l2cap Quality of Service. This function should be called after esp_bluedroid_enable and
+ *          esp_blueroid_init success, and should be called after esp_bt_hid_device_init. When the operation is complete the callback
+ *          function will be called with ESP_HIDD_UNREGISTER_APP_EVT.
+ *
+ * @return  - ESP_OK: success
+ *          - other: failed
+ */
+esp_err_t esp_bt_hid_device_unregister_app(void);
+
+/**
+ * @brief     This function connects HIDD interface to connected bluetooth device, if not done already. When the operation is complete the callback
+ *            function will be called with ESP_HIDD_OPEN_EVT.
+ *
+ * @param[in] bd_addr:      Remote host bluetooth device address.
+ *
+ * @return
+ *            - ESP_OK: success
+ *            - other: failed
+ */
+esp_err_t esp_bt_hid_device_connect(esp_bd_addr_t bd_addr);
+
+/**
+ * @brief     This function disconnects HIDD interface. When the operation is complete the callback
+ *            function will be called with ESP_HIDD_CLOSE_EVT.
+ *
+ * @return
+ *            - ESP_OK: success
+ *            - other: failed
+ */
+esp_err_t esp_bt_hid_device_disconnect(void);
+
+/**
+ * @brief     Send HIDD report. When the operation is complete the callback
+ *            function will be called with ESP_HIDD_SEND_REPORT_EVT.
+ *
+ * @param[in] type:   type of report
+ * @param[in] id:     report id as defined by descriptor
+ * @param[in] len:    length of report
+ * @param[in] data:   report data
+ *
+ * @return
+ *            - ESP_OK: success
+ *            - other: failed
+ */
+esp_err_t esp_bt_hid_device_send_report(esp_hidd_report_type_t type, uint8_t id, uint16_t len, uint8_t *data);
+
+/**
+ * @brief     Sends HIDD handshake with error info for invalid set_report. When the operation is complete the callback
+ *            function will be called with ESP_HIDD_REPORT_ERR_EVT.
+ *
+ * @param[in] error: type of error
+ *
+ * @return    - ESP_OK: success
+ *            - other: failed
+ */
+esp_err_t esp_bt_hid_device_report_error(esp_hidd_handshake_error_t error);
+
+/**
+ * @brief     Unplug virtual cable of HIDD. When the operation is complete the callback
+ *            function will be called with ESP_HIDD_VC_UNPLUG_EVT.
+ *
+ * @return    - ESP_OK: success
+ *            - other: failed
+ */
+esp_err_t esp_bt_hid_device_virtual_cable_unplug(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hidh_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hidh_api.h
new file mode 100644
index 00000000000..07abdece2d0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_hidh_api.h
@@ -0,0 +1,465 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+// Copyright 2019      Blake Felt
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_HIDH_API_H__
+#define __ESP_HIDH_API_H__
+
+#include "esp_bt_defs.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BTHH_MAX_DSC_LEN 884
+
+/**
+ * @brief HID host connection state
+ */
+typedef enum {
+    ESP_HIDH_CONN_STATE_CONNECTED = 0,           /*!< connected state */
+    ESP_HIDH_CONN_STATE_CONNECTING,              /*!< connecting state */
+    ESP_HIDH_CONN_STATE_DISCONNECTED,            /*!< disconnected state */
+    ESP_HIDH_CONN_STATE_DISCONNECTING,           /*!< disconnecting state */
+    ESP_HIDH_CONN_STATE_UNKNOWN                  /*!< unknown state(initial state) */
+} esp_hidh_connection_state_t;
+
+typedef enum {
+    ESP_HIDH_OK,
+    ESP_HIDH_HS_HID_NOT_READY,  /*!< handshake error : device not ready */
+    ESP_HIDH_HS_INVALID_RPT_ID, /*!< handshake error : invalid report ID */
+    ESP_HIDH_HS_TRANS_NOT_SPT,  /*!< handshake error : transaction not spt */
+    ESP_HIDH_HS_INVALID_PARAM,  /*!< handshake error : invalid paremter */
+    ESP_HIDH_HS_ERROR,          /*!< handshake error : unspecified HS error */
+    ESP_HIDH_ERR,               /*!< general ESP HH error */
+    ESP_HIDH_ERR_SDP,           /*!< SDP error */
+    ESP_HIDH_ERR_PROTO,         /*!< SET_Protocol error,
+                                  only used in ESP_HIDH_OPEN_EVT callback */
+
+    ESP_HIDH_ERR_DB_FULL,       /*!< device database full error, used in
+                                     ESP_HIDH_OPEN_EVT/ESP_HIDH_ADD_DEV_EVT */
+    ESP_HIDH_ERR_TOD_UNSPT,     /*!< type of device not supported */
+    ESP_HIDH_ERR_NO_RES,        /*!< out of system resources */
+    ESP_HIDH_ERR_AUTH_FAILED,   /*!< authentication fail */
+    ESP_HIDH_ERR_HDL,           /*!< connection handle error */
+    ESP_HIDH_ERR_SEC,           /*!< encryption error */
+    // self_defined
+    ESP_HIDH_BUSY,              /*!< Temporarily can not handle this request. */
+    ESP_HIDH_NO_DATA,           /*!< No data. */
+    ESP_HIDH_NEED_INIT,         /*!< HIDH module shall init first */
+    ESP_HIDH_NEED_DEINIT,       /*!< HIDH module shall deinit first */
+    ESP_HIDH_NO_CONNECTION,     /*!< connection may have been closed */
+} esp_hidh_status_t;
+
+/**
+ * @brief HID host protocol modes
+ */
+typedef enum {
+    ESP_HIDH_BOOT_MODE = 0x00,       /*!< boot protocol mode */
+    ESP_HIDH_REPORT_MODE = 0x01,     /*!< report protocol mode */
+    ESP_HIDH_UNSUPPORTED_MODE = 0xff /*!< unsupported protocol mode */
+} esp_hidh_protocol_mode_t;
+
+/**
+ * @brief HID host report types
+ */
+typedef enum {
+    ESP_HIDH_REPORT_TYPE_OTHER = 0, /*!< unsupported report type */
+    ESP_HIDH_REPORT_TYPE_INPUT,     /*!< input report type */
+    ESP_HIDH_REPORT_TYPE_OUTPUT,    /*!< output report type */
+    ESP_HIDH_REPORT_TYPE_FEATURE,   /*!< feature report type */
+} esp_hidh_report_type_t;
+
+/**
+ * @brief HID host callback function events
+ */
+typedef enum {
+    ESP_HIDH_INIT_EVT = 0,  /*!< When HID host is inited, the event comes */
+    ESP_HIDH_DEINIT_EVT,    /*!< When HID host is deinited, the event comes */
+    ESP_HIDH_OPEN_EVT,      /*!< When HID host connection opened, the event comes */
+    ESP_HIDH_CLOSE_EVT,     /*!< When HID host connection closed, the event comes */
+    ESP_HIDH_GET_RPT_EVT,   /*!< When Get_Report command is called, the event comes */
+    ESP_HIDH_SET_RPT_EVT,   /*!< When Set_Report command is called, the event comes */
+    ESP_HIDH_GET_PROTO_EVT, /*!< When Get_Protocol command is called, the event comes */
+    ESP_HIDH_SET_PROTO_EVT, /*!< When Set_Protocol command is called, the event comes */
+    ESP_HIDH_GET_IDLE_EVT,  /*!< When Get_Idle command is called, the event comes */
+    ESP_HIDH_SET_IDLE_EVT,  /*!< When Set_Idle command is called, the event comes */
+    ESP_HIDH_GET_DSCP_EVT,  /*!< When HIDH is inited, the event comes */
+    ESP_HIDH_ADD_DEV_EVT,   /*!< When a device is added, the event comes */
+    ESP_HIDH_RMV_DEV_EVT,   /*!< When a device is removed, the event comes */
+    ESP_HIDH_VC_UNPLUG_EVT, /*!< When virtually unplugged, the event comes */
+    ESP_HIDH_DATA_EVT,      /*!< When send data on interrupt channel, the event comes */
+    ESP_HIDH_DATA_IND_EVT,  /*!< When receive data on interrupt channel, the event comes */
+    ESP_HIDH_SET_INFO_EVT   /*!< When set the HID device descriptor, the event comes */
+} esp_hidh_cb_event_t;
+
+typedef struct {
+    int attr_mask;
+    uint8_t sub_class;
+    uint8_t app_id;
+    int vendor_id;
+    int product_id;
+    int version;
+    uint8_t ctry_code;
+    int dl_len;
+    uint8_t dsc_list[BTHH_MAX_DSC_LEN];
+} esp_hidh_hid_info_t;
+
+/**
+ * @brief HID host callback parameters union
+ */
+typedef union {
+    /**
+     * @brief ESP_HIDH_INIT_EVT
+     */
+    struct hidh_init_evt_param {
+        esp_hidh_status_t status; /*!< status */
+    } init;                       /*!< HIDH callback param of ESP_HIDH_INIT_EVT */
+
+    /**
+     * @brief ESP_HIDH_DEINIT_EVT
+     */
+    struct hidh_uninit_evt_param {
+        esp_hidh_status_t status; /*!< status */
+    } deinit;                     /*!< HIDH callback param of ESP_HIDH_DEINIT_EVT */
+
+    /**
+     * @brief ESP_HIDH_OPEN_EVT
+     */
+    struct hidh_open_evt_param {
+        esp_hidh_status_t status;                /*!< operation status         */
+        esp_hidh_connection_state_t conn_status; /*!< connection status        */
+        bool is_orig;                            /*!< indicate if host intiate the connection        */
+        uint8_t handle;                          /*!< device handle            */
+        esp_bd_addr_t bd_addr;                   /*!< device address           */
+    } open;                                      /*!< HIDH callback param of ESP_HIDH_OPEN_EVT */
+
+    /**
+     * @brief ESP_HIDH_CLOSE_EVT
+     */
+    struct hidh_close_evt_param {
+        esp_hidh_status_t status;                /*!< operation status         */
+        uint8_t reason;                          /*!< lower layer failed reason(ref hiddefs.h)       */
+        esp_hidh_connection_state_t conn_status; /*!< connection status        */
+        uint8_t handle;                          /*!< device handle            */
+    } close;                                     /*!< HIDH callback param of ESP_HIDH_CLOSE_EVT */
+
+    /**
+     * @brief ESP_HIDH_VC_UNPLUG_EVT
+     */
+    struct hidh_unplug_evt_param {
+        esp_hidh_status_t status;                /*!< operation status         */
+        esp_hidh_connection_state_t conn_status; /*!< connection status        */
+        uint8_t handle;                          /*!< device handle            */
+    } unplug;                                    /*!< HIDH callback param of ESP_HIDH_VC_UNPLUG_EVT */
+
+    /**
+     * @brief ESP_HIDH_GET_PROTO_EVT
+     */
+    struct hidh_get_proto_evt_param {
+        esp_hidh_status_t status;            /*!< operation status         */
+        uint8_t handle;                      /*!< device handle            */
+        esp_hidh_protocol_mode_t proto_mode; /*!< protocol mode            */
+    } get_proto;                             /*!< HIDH callback param of ESP_HIDH_GET_PROTO_EVT */
+
+    /**
+     * @brief ESP_HIDH_SET_PROTO_EVT
+     */
+    struct hidh_set_proto_evt_param {
+        esp_hidh_status_t status; /*!< operation status         */
+        uint8_t handle;           /*!< device handle            */
+    } set_proto;                  /*!< HIDH callback param of ESP_HIDH_SET_PROTO_EVT */
+
+    /**
+     * @brief ESP_HIDH_GET_RPT_EVT
+     */
+    struct hidh_get_rpt_evt_param {
+        esp_hidh_status_t status; /*!< operation status         */
+        uint8_t handle;           /*!< device handle            */
+        uint16_t len;             /*!< data length              */
+        uint8_t *data;            /*!< data pointer             */
+    } get_rpt;                    /*!< HIDH callback param of ESP_HIDH_GET_RPT_EVT */
+
+    /**
+     * @brief ESP_HIDH_SET_RPT_EVT
+     */
+    struct hidh_set_rpt_evt_param {
+        esp_hidh_status_t status; /*!< operation status         */
+        uint8_t handle;           /*!< device handle            */
+    } set_rpt;                    /*!< HIDH callback param of ESP_HIDH_SET_RPT_EVT */
+
+    /**
+     * @brief ESP_HIDH_DATA_EVT
+     */
+    struct hidh_send_data_evt_param {
+        esp_hidh_status_t status; /*!< operation status         */
+        uint8_t handle;           /*!< device handle            */
+        uint8_t reason;           /*!< lower layer failed reason(ref hiddefs.h)       */
+    } send_data;                  /*!< HIDH callback param of ESP_HIDH_DATA_EVT */
+
+    /**
+     * @brief ESP_HIDH_GET_IDLE_EVT
+     */
+    struct hidh_get_idle_evt_param {
+        esp_hidh_status_t status; /*!< operation status         */
+        uint8_t handle;           /*!< device handle            */
+        uint8_t idle_rate;        /*!< idle rate                */
+    } get_idle;                   /*!< HIDH callback param of ESP_HIDH_GET_IDLE_EVT */
+
+    /**
+     * @brief ESP_HIDH_SET_IDLE_EVT
+     */
+    struct hidh_set_idle_evt_param {
+        esp_hidh_status_t status; /*!< operation status         */
+        uint8_t handle;           /*!< device handle            */
+    } set_idle;                   /*!< HIDH callback param of ESP_HIDH_SET_IDLE_EVT */
+
+    /**
+     * @brief ESP_HIDH_DATA_IND_EVT
+     */
+    struct hidh_data_ind_evt_param {
+        esp_hidh_status_t status;            /*!< operation status         */
+        uint8_t handle;                      /*!< device handle            */
+        esp_hidh_protocol_mode_t proto_mode; /*!< protocol mode            */
+        uint16_t len;                        /*!< data length              */
+        uint8_t *data;                       /*!< data pointer             */
+    } data_ind;                              /*!< HIDH callback param of ESP_HIDH_DATA_IND_EVT */
+
+    /**
+     * @brief ESP_HIDH_ADD_DEV_EVT
+     */
+    struct hidh_add_dev_evt_param {
+        esp_hidh_status_t status; /*!< operation status         */
+        uint8_t handle;           /*!< device handle            */
+        esp_bd_addr_t bd_addr;    /*!< device address           */
+    } add_dev;                    /*!< HIDH callback param of ESP_HIDH_ADD_DEV_EVT */
+
+    /**
+     * @brief ESP_HIDH_RMV_DEV_EVT
+     */
+    struct hidh_rmv_dev_evt_param {
+        esp_hidh_status_t status; /*!< operation status         */
+        uint8_t handle;           /*!< device handle            */
+        esp_bd_addr_t bd_addr;    /*!< device address           */
+    } rmv_dev;                    /*!< HIDH callback param of ESP_HIDH_RMV_DEV_EVT */
+
+    /**
+     * @brief ESP_HIDH_GET_DSCP_EVT
+     */
+    struct hidh_get_dscp_evt_param {
+        esp_hidh_status_t status; /*!< operation status         */
+        uint8_t handle;           /*!< device handle            */
+        bool added;               /*!< Indicate if added        */
+        uint16_t vendor_id;       /*!< Vendor ID */
+        uint16_t product_id;      /*!< Product ID */
+        uint16_t version;         /*!< Version */
+        uint16_t ssr_max_latency; /*!< SSR max latency */
+        uint16_t ssr_min_tout;    /*!< SSR min timeout */
+        uint8_t ctry_code;        /*!< Country Code */
+        uint16_t dl_len;          /*!< Device descriptor length */
+        uint8_t *dsc_list;        /*!< Device descriptor pointer */
+    } dscp;                       /*!< HIDH callback param of ESP_HIDH_GET_DSCP_EVT */
+
+    /**
+     * @brief ESP_HIDH_SET_INFO_EVT
+     */
+    struct hidh_set_info_evt_param {
+        esp_hidh_status_t status; /*!< operation status         */
+        uint8_t handle;           /*!< device handle            */
+        esp_bd_addr_t bd_addr;    /*!< device address           */
+    } set_info;                   /*!< HIDH callback param of ESP_HIDH_SET_INFO_EVT */
+} esp_hidh_cb_param_t;
+
+/**
+ * @brief       HID host callback function type
+ * @param       event:      Event type
+ * @param       param:      Point to callback parameter, currently is union type
+ */
+typedef void (esp_hh_cb_t)(esp_hidh_cb_event_t event, esp_hidh_cb_param_t *param);
+
+/**
+ * @brief       This function is called to init callbacks with HID host module.
+ *
+ * @param[in]   callback:   pointer to the init callback function.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_register_callback(esp_hh_cb_t callback);
+
+/**
+ * @brief       This function initializes HID host. This function should be called after esp_bluedroid_enable() and
+ *              esp_blueroid_init() success, and should be called after esp_bt_hid_host_register_callback().
+ *              When the operation is complete the callback function will be called with ESP_HIDH_INIT_EVT.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_init(void);
+
+/**
+ * @brief       Closes the interface. This function should be called after esp_bluedroid_enable() and
+ *              esp_blueroid_init() success, and should be called after esp_bt_hid_host_init().
+ *              When the operation is complete the callback function will be called with ESP_HIDH_DEINIT_EVT.
+ *
+ * @return      - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_deinit(void);
+
+/**
+ * @brief       Connect to hid device. When the operation is complete the callback
+ *              function will be called with ESP_HIDH_OPEN_EVT.
+ *
+ * @param[in]   bd_addr:  Remote device bluetooth device address.
+ *
+ * @return      - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_connect(esp_bd_addr_t bd_addr);
+
+/**
+ * @brief       Disconnect from hid device. When the operation is complete the callback
+ *              function will be called with ESP_HIDH_CLOSE_EVT.
+ *
+ * @param[in]   bd_addr:  Remote device bluetooth device address.
+ *
+ * @return      - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_disconnect(esp_bd_addr_t bd_addr);
+
+/**
+ * @brief       Virtual UnPlug (VUP) the specified HID device. When the operation is complete the callback
+ *              function will be called with ESP_HIDH_VC_UNPLUG_EVT.
+ *
+ * @param[in]   bd_addr:  Remote device bluetooth device address.
+ *
+ * @return      - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_virtual_cable_unplug(esp_bd_addr_t bd_addr);
+
+/**
+ * @brief       Set the HID device descriptor for the specified HID device. When the operation is complete the callback
+ *              function will be called with ESP_HIDH_SET_INFO_EVT.
+ *
+ * @param[in]   bd_addr:  Remote device bluetooth device address.
+ * @param[in]   hid_info:  HID device descriptor structure.
+ *
+ * @return      - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_set_info(esp_bd_addr_t bd_addr, esp_hidh_hid_info_t *hid_info);
+
+/**
+ * @brief       Get the HID proto mode. When the operation is complete the callback
+ *              function will be called with ESP_HIDH_GET_PROTO_EVT.
+ *
+ * @param[in]   bd_addr:  Remote device bluetooth device address.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_get_protocol(esp_bd_addr_t bd_addr);
+
+/**
+ * @brief       Set the HID proto mode. When the operation is complete the callback
+ *              function will be called with ESP_HIDH_SET_PROTO_EVT.
+ *
+ * @param[in]   bd_addr:  Remote device bluetooth device address.
+ * @param[in]   protocol_mode:  Protocol mode type.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_set_protocol(esp_bd_addr_t bd_addr, esp_hidh_protocol_mode_t protocol_mode);
+
+/**
+ * @brief       Get the HID Idle Time. When the operation is complete the callback
+ *              function will be called with ESP_HIDH_GET_IDLE_EVT.
+ *
+ * @param[in]   bd_addr:  Remote device bluetooth device address.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_get_idle(esp_bd_addr_t bd_addr);
+
+/**
+ * @brief       Set the HID Idle Time. When the operation is complete the callback
+ *              function will be called with ESP_HIDH_SET_IDLE_EVT.
+ *
+ * @param[in]   bd_addr:  Remote device bluetooth device address.
+ * @param[in]   idle_time:  Idle time rate
+ *
+ * @return    - ESP_OK: success
+ *            - other: failed
+ */
+esp_err_t esp_bt_hid_host_set_idle(esp_bd_addr_t bd_addr, uint16_t idle_time);
+
+/**
+ * @brief       Send a GET_REPORT to HID device. When the operation is complete the callback
+ *              function will be called with ESP_HIDH_GET_RPT_EVT.
+ *
+ * @param[in]   bd_addr:  Remote device bluetooth device address.
+ * @param[in]   report_type:  Report type
+ * @param[in]   report_id:  Report id
+ * @param[in]   buffer_size:  Buffer size
+ *
+ * @return      - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_get_report(esp_bd_addr_t bd_addr, esp_hidh_report_type_t report_type, uint8_t report_id,
+                                     int buffer_size);
+
+/**
+ * @brief       Send a SET_REPORT to HID device. When the operation is complete the callback
+ *              function will be called with ESP_HIDH_SET_RPT_EVT.
+ *
+ * @param[in]   bd_addr:  Remote device bluetooth device address.
+ * @param[in]   report_type:  Report type
+ * @param[in]   report:  Report data pointer
+ * @param[in]   len:  Report data length
+ *
+ * @return      - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_set_report(esp_bd_addr_t bd_addr, esp_hidh_report_type_t report_type, uint8_t *report,
+                                     size_t len);
+
+/**
+ * @brief       Send data to HID device. When the operation is complete the callback
+ *              function will be called with ESP_HIDH_DATA_EVT.
+ *
+ * @param[in]   bd_addr:  Remote device bluetooth device address.
+ * @param[in]   data:  Data pointer
+ * @param[in]   len:  Data length
+ *
+ * @return      - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_bt_hid_host_send_data(esp_bd_addr_t bd_addr, uint8_t *data, size_t len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_spp_api.h b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_spp_api.h
new file mode 100644
index 00000000000..9df1e58a717
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/host/bluedroid/api/include/api/esp_spp_api.h
@@ -0,0 +1,372 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_SPP_API_H__
+#define __ESP_SPP_API_H__
+
+#include "esp_err.h"
+#include "esp_bt_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ESP_SPP_SUCCESS   = 0,          /*!< Successful operation. */
+    ESP_SPP_FAILURE,                /*!< Generic failure. */
+    ESP_SPP_BUSY,                   /*!< Temporarily can not handle this request. */
+    ESP_SPP_NO_DATA,                /*!< No data */
+    ESP_SPP_NO_RESOURCE,            /*!< No more resource */
+    ESP_SPP_NEED_INIT,              /*!< SPP module shall init first */
+    ESP_SPP_NEED_DEINIT,            /*!< SPP module shall deinit first */
+    ESP_SPP_NO_CONNECTION,          /*!< Connection may have been closed */
+    ESP_SPP_NO_SERVER,              /*!< No SPP server */
+} esp_spp_status_t;
+
+/* Security Setting Mask
+Use these three mask mode:
+1. ESP_SPP_SEC_NONE
+2. ESP_SPP_SEC_AUTHENTICATE
+3. (ESP_SPP_SEC_ENCRYPT|ESP_SPP_SEC_AUTHENTICATE)
+*/
+#define ESP_SPP_SEC_NONE            0x0000    /*!< No security. relate to BTA_SEC_NONE in bta/bta_api.h */
+#define ESP_SPP_SEC_AUTHORIZE       0x0001    /*!< Authorization required (only needed for out going connection ) relate to BTA_SEC_AUTHORIZE in bta/bta_api.h*/
+#define ESP_SPP_SEC_AUTHENTICATE    0x0012    /*!< Authentication required.  relate to BTA_SEC_AUTHENTICATE in bta/bta_api.h*/
+#define ESP_SPP_SEC_ENCRYPT         0x0024    /*!< Encryption required.  relate to BTA_SEC_ENCRYPT in bta/bta_api.h*/
+#define ESP_SPP_SEC_MODE4_LEVEL4    0x0040    /*!< Mode 4 level 4 service, i.e. incoming/outgoing MITM and P-256 encryption  relate to BTA_SEC_MODE4_LEVEL4 in bta/bta_api.h*/
+#define ESP_SPP_SEC_MITM            0x3000    /*!< Man-In-The_Middle protection  relate to BTA_SEC_MITM in bta/bta_api.h*/
+#define ESP_SPP_SEC_IN_16_DIGITS    0x4000    /*!< Min 16 digit for pin code  relate to BTA_SEC_IN_16_DIGITS in bta/bta_api.h*/
+typedef uint16_t esp_spp_sec_t;
+
+typedef enum {
+    ESP_SPP_ROLE_MASTER     = 0,          /*!< Role: master */
+    ESP_SPP_ROLE_SLAVE      = 1,          /*!< Role: slave */
+} esp_spp_role_t;
+
+typedef enum {
+    ESP_SPP_MODE_CB         = 0,          /*!< When data is coming, a callback will come with data */
+    ESP_SPP_MODE_VFS        = 1,          /*!< Use VFS to write/read data */
+} esp_spp_mode_t;
+
+#define ESP_SPP_MAX_MTU                 (3*330)     /*!< SPP max MTU */
+#define ESP_SPP_MAX_SCN                 31          /*!< SPP max SCN */
+/**
+ * @brief SPP callback function events
+ */
+typedef enum {
+    ESP_SPP_INIT_EVT                    = 0,                /*!< When SPP is inited, the event comes */
+    ESP_SPP_UNINIT_EVT                  = 1,                /*!< When SPP is uninited, the event comes */
+    ESP_SPP_DISCOVERY_COMP_EVT          = 8,                /*!< When SDP discovery complete, the event comes */
+    ESP_SPP_OPEN_EVT                    = 26,               /*!< When SPP Client connection open, the event comes */
+    ESP_SPP_CLOSE_EVT                   = 27,               /*!< When SPP connection closed, the event comes */
+    ESP_SPP_START_EVT                   = 28,               /*!< When SPP server started, the event comes */
+    ESP_SPP_CL_INIT_EVT                 = 29,               /*!< When SPP client initiated a connection, the event comes */
+    ESP_SPP_DATA_IND_EVT                = 30,               /*!< When SPP connection received data, the event comes, only for ESP_SPP_MODE_CB */
+    ESP_SPP_CONG_EVT                    = 31,               /*!< When SPP connection congestion status changed, the event comes, only for ESP_SPP_MODE_CB */
+    ESP_SPP_WRITE_EVT                   = 33,               /*!< When SPP write operation completes, the event comes, only for ESP_SPP_MODE_CB */
+    ESP_SPP_SRV_OPEN_EVT                = 34,               /*!< When SPP Server connection open, the event comes */
+    ESP_SPP_SRV_STOP_EVT                = 35,               /*!< When SPP server stopped, the event comes */
+} esp_spp_cb_event_t;
+
+
+/**
+ * @brief SPP callback parameters union
+ */
+typedef union {
+    /**
+     * @brief SPP_INIT_EVT
+     */
+    struct spp_init_evt_param {
+        esp_spp_status_t    status;         /*!< status */
+    } init;                                 /*!< SPP callback param of SPP_INIT_EVT */
+
+    /**
+     * @brief SPP_UNINIT_EVT
+     */
+    struct spp_uninit_evt_param {
+        esp_spp_status_t    status;         /*!< status */
+    } uninit;                               /*!< SPP callback param of SPP_UNINIT_EVT */
+
+    /**
+     * @brief SPP_DISCOVERY_COMP_EVT
+     */
+    struct spp_discovery_comp_evt_param {
+        esp_spp_status_t status;                   /*!< status */
+        uint8_t scn_num;                           /*!< The num of scn_num */
+        uint8_t scn[ESP_SPP_MAX_SCN];              /*!< channel # */
+        const char *service_name[ESP_SPP_MAX_SCN]; /*!< service_name */
+    } disc_comp;                            /*!< SPP callback param of SPP_DISCOVERY_COMP_EVT */
+
+    /**
+     * @brief ESP_SPP_OPEN_EVT
+     */
+    struct spp_open_evt_param {
+        esp_spp_status_t    status;         /*!< status */
+        uint32_t            handle;         /*!< The connection handle */
+        int                 fd;             /*!< The file descriptor only for ESP_SPP_MODE_VFS */
+        esp_bd_addr_t       rem_bda;        /*!< The peer address */
+    } open;                                 /*!< SPP callback param of ESP_SPP_OPEN_EVT */
+
+    /**
+     * @brief ESP_SPP_SRV_OPEN_EVT
+     */
+    struct spp_srv_open_evt_param {
+        esp_spp_status_t    status;         /*!< status */
+        uint32_t            handle;         /*!< The connection handle */
+        uint32_t            new_listen_handle;  /*!< The new listen handle */
+        int                 fd;             /*!< The file descriptor only for ESP_SPP_MODE_VFS */
+        esp_bd_addr_t       rem_bda;        /*!< The peer address */
+    } srv_open;                             /*!< SPP callback param of ESP_SPP_SRV_OPEN_EVT */
+    /**
+     * @brief ESP_SPP_CLOSE_EVT
+     */
+    struct spp_close_evt_param {
+        esp_spp_status_t    status;         /*!< status */
+        uint32_t            port_status;    /*!< PORT status */
+        uint32_t            handle;         /*!< The connection handle */
+        bool                async;          /*!< FALSE, if local initiates disconnect */
+    } close;                                /*!< SPP callback param of ESP_SPP_CLOSE_EVT */
+
+    /**
+     * @brief ESP_SPP_START_EVT
+     */
+    struct spp_start_evt_param {
+        esp_spp_status_t    status;         /*!< status */
+        uint32_t            handle;         /*!< The connection handle */
+        uint8_t             sec_id;         /*!< security ID used by this server */
+        uint8_t             scn;            /*!< Server channel number */
+        bool                use_co;         /*!< TRUE to use co_rfc_data */
+    } start;                                /*!< SPP callback param of ESP_SPP_START_EVT */
+
+    /**
+     * @brief ESP_SPP_SRV_STOP_EVT
+     */
+    struct spp_srv_stop_evt_param {
+        esp_spp_status_t    status;         /*!< status */
+        uint8_t             scn;            /*!< Server channel number */
+    } srv_stop;                             /*!< SPP callback param of ESP_SPP_SRV_STOP_EVT */
+
+    /**
+     * @brief ESP_SPP_CL_INIT_EVT
+     */
+    struct spp_cl_init_evt_param {
+        esp_spp_status_t    status;         /*!< status */
+        uint32_t            handle;         /*!< The connection handle */
+        uint8_t             sec_id;         /*!< security ID used by this server */
+        bool                use_co;         /*!< TRUE to use co_rfc_data */
+    } cl_init;                              /*!< SPP callback param of ESP_SPP_CL_INIT_EVT */
+
+    /**
+     * @brief ESP_SPP_WRITE_EVT
+     */
+    struct spp_write_evt_param {
+        esp_spp_status_t    status;         /*!< status */
+        uint32_t            handle;         /*!< The connection handle */
+        int                 len;            /*!< The length of the data written. */
+        bool                cong;           /*!< congestion status */
+    } write;                                /*!< SPP callback param of ESP_SPP_WRITE_EVT */
+
+    /**
+     * @brief ESP_SPP_DATA_IND_EVT
+     */
+    struct spp_data_ind_evt_param {
+        esp_spp_status_t    status;         /*!< status */
+        uint32_t            handle;         /*!< The connection handle */
+        uint16_t            len;            /*!< The length of data */
+        uint8_t             *data;          /*!< The data received */
+    } data_ind;                             /*!< SPP callback param of ESP_SPP_DATA_IND_EVT */
+
+    /**
+     * @brief ESP_SPP_CONG_EVT
+     */
+    struct spp_cong_evt_param {
+        esp_spp_status_t    status;         /*!< status */
+        uint32_t            handle;         /*!< The connection handle */
+        bool                cong;           /*!< TRUE, congested. FALSE, uncongested */
+    } cong;                                 /*!< SPP callback param of ESP_SPP_CONG_EVT */
+} esp_spp_cb_param_t;                       /*!< SPP callback parameter union type */
+
+/**
+ * @brief       SPP callback function type.
+ *              When handle ESP_SPP_DATA_IND_EVT, it is strongly recommended to cache incoming data, and process them in
+ *              other lower priority application task rather than in this callback directly.
+ *
+ * @param       event:      Event type
+ * @param       param:      Point to callback parameter, currently is union type
+ */
+typedef void (esp_spp_cb_t)(esp_spp_cb_event_t event, esp_spp_cb_param_t *param);
+
+/**
+ * @brief       This function is called to init callbacks with SPP module.
+ *
+ * @param[in]   callback:   pointer to the init callback function.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_spp_register_callback(esp_spp_cb_t callback);
+
+/**
+ * @brief       This function is called to init SPP module.
+ *              When the operation is completed, the callback function will be called with ESP_SPP_INIT_EVT.
+ *              This function should be called after esp_bluedroid_enable() completes successfully.
+ *
+ * @param[in]   mode: Choose the mode of SPP, ESP_SPP_MODE_CB or ESP_SPP_MODE_VFS.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_spp_init(esp_spp_mode_t mode);
+
+/**
+ * @brief       This function is called to uninit SPP module.
+ *              The operation will close all active SPP connection first, then the callback function will be called
+ *              with ESP_SPP_CLOSE_EVT, and the number of ESP_SPP_CLOSE_EVT is equal to the number of connection.
+ *              When the operation is completed, the callback function will be called with ESP_SPP_UNINIT_EVT.
+ *              This function should be called after esp_spp_init() completes successfully.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_spp_deinit(void);
+
+
+/**
+ * @brief       This function is called to performs service discovery for the services provided by the given peer device.
+ *              When the operation is completed, the callback function will be called with ESP_SPP_DISCOVERY_COMP_EVT.
+ *              This funciton must be called after esp_spp_init() successful and before esp_spp_deinit().
+ *
+ * @param[in]   bd_addr:   Remote device bluetooth device address.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_spp_start_discovery(esp_bd_addr_t bd_addr);
+
+/**
+ * @brief       This function makes an SPP connection to a remote BD Address.
+ *              When the connection is initiated or failed to initiate, the callback is called with ESP_SPP_CL_INIT_EVT.
+ *              When the connection is established or failed, the callback is called with ESP_SPP_OPEN_EVT.
+ *              This funciton must be called after esp_spp_init() successful and before esp_spp_deinit().
+ *
+ * @param[in]   sec_mask:     Security Setting Mask. Suggest to use ESP_SPP_SEC_NONE, ESP_SPP_SEC_AUTHORIZE or ESP_SPP_SEC_AUTHENTICATE only.
+ * @param[in]   role:         Master or slave.
+ * @param[in]   remote_scn:   Remote device bluetooth device SCN.
+ * @param[in]   peer_bd_addr: Remote device bluetooth device address.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_spp_connect(esp_spp_sec_t sec_mask, esp_spp_role_t role, uint8_t remote_scn, esp_bd_addr_t peer_bd_addr);
+
+/**
+ * @brief       This function closes an SPP connection.
+ *              When the operation is completed, the callback function will be called with ESP_SPP_CLOSE_EVT.
+ *              This funciton must be called after esp_spp_init() successful and before esp_spp_deinit().
+ *
+ * @param[in]   handle:    The connection handle.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_spp_disconnect(uint32_t handle);
+
+/**
+ * @brief       This function create a SPP server and starts listening for an
+ *              SPP connection request from a remote Bluetooth device.
+ *              When the server is started successfully, the callback is called with ESP_SPP_START_EVT.
+ *              When the connection is established, the callback is called with ESP_SPP_SRV_OPEN_EVT.
+ *              This funciton must be called after esp_spp_init() successful and before esp_spp_deinit().
+ *
+ * @param[in]   sec_mask:     Security Setting Mask. Suggest to use ESP_SPP_SEC_NONE, ESP_SPP_SEC_AUTHORIZE or ESP_SPP_SEC_AUTHENTICATE only.
+ * @param[in]   role:         Master or slave.
+ * @param[in]   local_scn:    The specific channel you want to get.
+ *                            If channel is 0, means get any channel.
+ * @param[in]   name:         Server's name.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_spp_start_srv(esp_spp_sec_t sec_mask, esp_spp_role_t role, uint8_t local_scn, const char *name);
+
+/**
+ * @brief       This function stops all SPP servers.
+ *              The operation will close all active SPP connection first, then the callback function will be called
+ *              with ESP_SPP_CLOSE_EVT, and the number of ESP_SPP_CLOSE_EVT is equal to the number of connection.
+ *              When the operation is completed, the callback is called with ESP_SPP_SRV_STOP_EVT.
+ *              This funciton must be called after esp_spp_init() successful and before esp_spp_deinit().
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+
+esp_err_t esp_spp_stop_srv(void);
+
+/**
+ * @brief       This function stops a specific SPP server.
+ *              The operation will close all active SPP connection first on the specific SPP server, then the callback function will be called
+ *              with ESP_SPP_CLOSE_EVT, and the number of ESP_SPP_CLOSE_EVT is equal to the number of connection.
+ *              When the operation is completed, the callback is called with ESP_SPP_SRV_STOP_EVT.
+ *              This funciton must be called after esp_spp_init() successful and before esp_spp_deinit().
+ *
+ * @param[in]   scn:         Server channel number.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_spp_stop_srv_scn(uint8_t scn);
+
+/**
+ * @brief       This function is used to write data, only for ESP_SPP_MODE_CB.
+ *              When this function need to be called repeatedly, it is strongly recommended to call this function again after
+ *              the previous event ESP_SPP_WRITE_EVT is received and the parameter 'cong' is equal to false. If the previous event
+ *              ESP_SPP_WRITE_EVT with parameter 'cong' is equal to true, the function can only be called again when the event
+ *              ESP_SPP_CONG_EVT with parameter 'cong' equal to false is received.
+ *              This funciton must be called after an connection between initiator and acceptor has been established.
+ *
+ * @param[in]   handle: The connection handle.
+ * @param[in]   len:    The length of the data written.
+ * @param[in]   p_data: The data written.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_spp_write(uint32_t handle, int len, uint8_t *p_data);
+
+
+/**
+ * @brief       This function is used to register VFS.
+ *              For now, SPP only supports write, read and close.
+ *
+ * @return
+ *              - ESP_OK: success
+ *              - other: failed
+ */
+esp_err_t esp_spp_vfs_register(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif ///__ESP_SPP_API_H__
diff --git a/tools/sdk/esp32s3/include/bt/include/esp32s3/include/esp_bt.h b/tools/sdk/esp32s3/include/bt/include/esp32s3/include/esp_bt.h
new file mode 100644
index 00000000000..efdc6ee63af
--- /dev/null
+++ b/tools/sdk/esp32s3/include/bt/include/esp32s3/include/esp_bt.h
@@ -0,0 +1,537 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __ESP_BT_H__
+#define __ESP_BT_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "sdkconfig.h"
+#include "esp_task.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_BT_CTRL_CONFIG_MAGIC_VAL    0x5A5AA5A5
+#define ESP_BT_CTRL_CONFIG_VERSION      0x02112280
+
+#define ESP_BT_HCI_TL_MAGIC_VALUE   0xfadebead
+#define ESP_BT_HCI_TL_VERSION       0x00010000
+
+/**
+ * @brief Bluetooth mode for controller enable/disable
+ */
+typedef enum {
+    ESP_BT_MODE_IDLE       = 0x00,   /*!< Bluetooth is not running */
+    ESP_BT_MODE_BLE        = 0x01,   /*!< Run BLE mode */
+    ESP_BT_MODE_CLASSIC_BT = 0x02,   /*!< Run Classic BT mode */
+    ESP_BT_MODE_BTDM       = 0x03,   /*!< Run dual mode */
+} esp_bt_mode_t;
+
+/**
+ * @brief Type of controller HCI transport layer
+ */
+typedef enum {
+    ESP_BT_CTRL_HCI_TL_UART = 0,      /*!< HCI UART h4 transport layer */
+    ESP_BT_CTRL_HCI_TL_VHCI = 1,      /*!< VHCI interface */
+} esp_bt_ctrl_hci_tl_t;
+
+/**
+ * @breif type of BLE connection event length computation
+ */
+typedef enum {
+    ESP_BLE_CE_LEN_TYPE_ORIG = 0,      /*!< original */
+    ESP_BLE_CE_LEN_TYPE_CE   = 1,      /*!< use CE_LEN parameter from HCI commands */
+    ESP_BLE_CE_LEN_TYPE_SD   = 1,      /*!< Espressif vendor defined */
+} esp_ble_ce_len_t;
+
+/**
+ * @brief Bluetooth sleep mode
+ */
+typedef enum {
+    ESP_BT_SLEEP_MODE_NONE = 0,      /*!< Bluetooth sleep mode disabled */
+    ESP_BT_SLEEP_MODE_1    = 1,      /*!< Bluetooth sleep mode 1 */
+} esp_bt_sleep_mode_t;
+
+/**
+ * @brief Bluetooth sleep clock
+ */
+typedef enum {
+    ESP_BT_SLEEP_CLOCK_NONE            = 0,   /*!< Sleep clock not configured */
+    ESP_BT_SLEEP_CLOCK_MAIN_XTAL       = 1,   /*!< SoC main crystal */
+    ESP_BT_SLEEP_CLOCK_EXT_32K_XTAL    = 2,   /*!< External 32.768kHz crystal */
+    ESP_BT_SLEEP_CLOCK_RTC_SLOW        = 3,   /*!< Internal 90kHz RC oscillator */
+    ESP_BT_SLEEP_CLOCK_FPGA_32K        = 4,   /*!< Hardwired 32KHz clock temporarily used for FPGA */
+} esp_bt_sleep_clock_t;
+
+/**
+ * @brief antenna index used for bluetooth
+ */
+enum {
+    ESP_BT_ANT_IDX_0 = 0,               /*!< anntena NO 0 */
+    ESP_BT_ANT_IDX_1 = 1,               /*!< anntena NO 1 */
+};
+
+/**
+ * @brief Maximum Tx/Rx time limit on Coded-PHY connection
+ */
+enum {
+    ESP_BT_COEX_PHY_CODED_TX_RX_TIME_LIMIT_FORCE_DISABLE = 0,    /*!< Disable the limit */
+    ESP_BT_COEX_PHY_CODED_TX_RX_TIME_LIMIT_FORCE_ENABLE,         /*!< Always Enable the limit */
+};
+
+#define ESP_BT_HCI_TL_STATUS_OK            (0)   /*!< HCI_TL Tx/Rx operation status OK */
+
+/**
+ * @brief callback function for HCI Transport Layer send/receive operations
+ */
+typedef void (* esp_bt_hci_tl_callback_t) (void *arg, uint8_t status);
+
+#ifdef CONFIG_BT_ENABLED
+
+#define BT_CTRL_BLE_MAX_ACT_LIMIT           10  //Maximum BLE activity limitation
+#define SLAVE_CE_LEN_MIN_DEFAULT             5
+
+#ifdef CONFIG_BT_CTRL_SCAN_DUPL_TYPE
+#define SCAN_DUPLICATE_TYPE_VALUE  CONFIG_BT_CTRL_SCAN_DUPL_TYPE
+#else
+#define SCAN_DUPLICATE_TYPE_VALUE  0
+#endif
+
+/* normal adv cache size */
+#ifdef CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE
+#define NORMAL_SCAN_DUPLICATE_CACHE_SIZE            CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE
+#else
+#define NORMAL_SCAN_DUPLICATE_CACHE_SIZE            20
+#endif
+
+#ifndef CONFIG_BT_CTRL_BLE_MESH_SCAN_DUPL_EN
+#define CONFIG_BT_CTRL_BLE_MESH_SCAN_DUPL_EN FALSE
+#endif
+
+#define SCAN_DUPLICATE_MODE_NORMAL_ADV_ONLY         0
+#define SCAN_DUPLICATE_MODE_NORMAL_ADV_MESH_ADV     1
+
+#if CONFIG_BT_CTRL_BLE_MESH_SCAN_DUPL_EN
+    #define SCAN_DUPLICATE_MODE                     SCAN_DUPLICATE_MODE_NORMAL_ADV_MESH_ADV
+    #ifdef CONFIG_BT_CTRL_MESH_DUPL_SCAN_CACHE_SIZE
+    #define MESH_DUPLICATE_SCAN_CACHE_SIZE          CONFIG_BT_CTRL_MESH_DUPL_SCAN_CACHE_SIZE
+    #else
+    #define MESH_DUPLICATE_SCAN_CACHE_SIZE          50
+    #endif
+#else
+    #define SCAN_DUPLICATE_MODE SCAN_DUPLICATE_MODE_NORMAL_ADV_ONLY
+    #define MESH_DUPLICATE_SCAN_CACHE_SIZE          0
+#endif
+
+#ifdef CONFIG_BT_CTRL_AGC_RECORRECT_EN
+#define BT_CTRL_AGC_RECORRECT_EN  CONFIG_BT_CTRL_AGC_RECORRECT_EN
+#else
+#define BT_CTRL_AGC_RECORRECT_EN        0
+#endif
+
+#ifdef CONFIG_BT_CTRL_CODED_AGC_RECORRECT_EN
+#define BT_CTRL_CODED_AGC_RECORRECT  CONFIG_BT_CTRL_CODED_AGC_RECORRECT_EN
+#else
+#define BT_CTRL_CODED_AGC_RECORRECT        0
+#endif
+
+#define AGC_RECORRECT_EN       ((BT_CTRL_AGC_RECORRECT_EN << 0) | (BT_CTRL_CODED_AGC_RECORRECT <<1))
+
+#define CFG_MASK_BIT_SCAN_DUPLICATE_OPTION    (1<<0)
+
+#define CFG_MASK      CFG_MASK_BIT_SCAN_DUPLICATE_OPTION
+
+#define BLE_HW_TARGET_CODE_ESP32S3_CHIP_ECO0                      (0x02010000)
+
+#define BT_CONTROLLER_INIT_CONFIG_DEFAULT() {                              \
+    .magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL,                                 \
+    .version = ESP_BT_CTRL_CONFIG_VERSION,                                 \
+    .controller_task_stack_size = ESP_TASK_BT_CONTROLLER_STACK,            \
+    .controller_task_prio = ESP_TASK_BT_CONTROLLER_PRIO,                   \
+    .controller_task_run_cpu = CONFIG_BT_CTRL_PINNED_TO_CORE,              \
+    .bluetooth_mode = CONFIG_BT_CTRL_MODE_EFF,                             \
+    .ble_max_act = CONFIG_BT_CTRL_BLE_MAX_ACT_EFF,                         \
+    .sleep_mode = CONFIG_BT_CTRL_SLEEP_MODE_EFF,                           \
+    .sleep_clock = CONFIG_BT_CTRL_SLEEP_CLOCK_EFF,                         \
+    .ble_st_acl_tx_buf_nb = CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB,       \
+    .ble_hw_cca_check = CONFIG_BT_CTRL_HW_CCA_EFF,                         \
+    .ble_adv_dup_filt_max = CONFIG_BT_CTRL_ADV_DUP_FILT_MAX,               \
+    .ce_len_type = CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF,                      \
+    .hci_tl_type = CONFIG_BT_CTRL_HCI_TL_EFF,                              \
+    .hci_tl_funcs = NULL,                                                  \
+    .txant_dft = CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF,                      \
+    .rxant_dft = CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF,                      \
+    .txpwr_dft = CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF,                    \
+    .cfg_mask = CFG_MASK,                                                  \
+    .scan_duplicate_mode = SCAN_DUPLICATE_MODE,                            \
+    .scan_duplicate_type = SCAN_DUPLICATE_TYPE_VALUE,                      \
+    .normal_adv_size = NORMAL_SCAN_DUPLICATE_CACHE_SIZE,                   \
+    .mesh_adv_size = MESH_DUPLICATE_SCAN_CACHE_SIZE,                       \
+    .coex_phy_coded_tx_rx_time_limit = CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF, \
+    .hw_target_code = BLE_HW_TARGET_CODE_ESP32S3_CHIP_ECO0,                \
+    .slave_ce_len_min = SLAVE_CE_LEN_MIN_DEFAULT,                          \
+    .hw_recorrect_en = AGC_RECORRECT_EN,                                   \
+    .cca_thresh = CONFIG_BT_CTRL_HW_CCA_VAL,                               \
+};
+
+#else
+#define BT_CONTROLLER_INIT_CONFIG_DEFAULT() {0}; _Static_assert(0, "please enable bluetooth in menuconfig to use bt.h");
+#endif
+
+/**
+ * @brief Controller HCI transport layer function structure
+ *        This structure shall be registered when HCI transport layer is UART
+ */
+typedef struct {
+    uint32_t _magic;                        /* Magic number */
+    uint32_t _version;                      /* version number of the defined structure */
+    uint32_t _reserved;                     /* reserved for future use */
+    int (* _open)(void);                    /* hci tl open */
+    void (* _close)(void);                  /* hci tl close */
+    void (* _finish_transfers)(void);       /* hci tl finish trasnfers */
+    void (* _recv)(uint8_t *buf, uint32_t len, esp_bt_hci_tl_callback_t callback, void* arg); /* hci tl recv */
+    void (* _send)(uint8_t *buf, uint32_t len, esp_bt_hci_tl_callback_t callback, void* arg); /* hci tl send */
+    bool (* _flow_off)(void); /* hci tl flow off */
+    void (* _flow_on)(void); /* hci tl flow on */
+} esp_bt_hci_tl_t;
+
+/**
+ * @brief Controller config options, depend on config mask.
+ *        Config mask indicate which functions enabled, this means
+ *        some options or parameters of some functions enabled by config mask.
+ */
+typedef struct {
+    /*
+     * Following parameters can not be configured runtime when call esp_bt_controller_init()
+     * They will be overwritten by constant values from menuconfig options or from macros.
+     * So, do not modify the value when esp_bt_controller_init()
+     */
+    uint32_t magic;                         /*!< Magic number */
+    uint32_t version;                       /*!< version number of the defined structure */
+    /*
+     * Following parameters can be configured runtime, when call esp_bt_controller_init()
+     */
+    uint16_t controller_task_stack_size;    /*!< Bluetooth controller task stack size */
+    uint8_t controller_task_prio;           /*!< Bluetooth controller task priority */
+    uint8_t controller_task_run_cpu;        /*!< CPU num that Bluetooth controller task runs on */
+    uint8_t bluetooth_mode;                 /*!< Controller mode: BR/EDR, BLE or Dual Mode */
+    uint8_t ble_max_act;                    /*!< BLE maximum number of air activities */
+    uint8_t sleep_mode;                     /*!< controller sleep mode */
+    uint8_t sleep_clock;                    /*!< controller sleep clock */
+    uint8_t ble_st_acl_tx_buf_nb;           /*!< controller static ACL TX BUFFER number */
+    uint8_t ble_hw_cca_check;               /*!< controller hardware triggered CCA check */
+    uint16_t ble_adv_dup_filt_max;          /*!< maxinum number of duplicate scan filter */
+    bool coex_param_en;                     /*!< deprecated */
+    uint8_t ce_len_type;                    /*!< connection event length computation method */
+    bool coex_use_hooks;                    /*!< deprecated */
+    uint8_t hci_tl_type;                    /*!< HCI transport layer, UART, VHCI, etc */
+    esp_bt_hci_tl_t *hci_tl_funcs;          /*!< hci transport functions used, must be set when hci_tl_type is UART */
+    uint8_t txant_dft;                      /*!< default Tx antenna */
+    uint8_t rxant_dft;                      /*!< default Rx antenna */
+    uint8_t txpwr_dft;                      /*!< default Tx power */
+    uint32_t cfg_mask;
+    uint8_t scan_duplicate_mode;            /*!< scan duplicate mode */
+    uint8_t scan_duplicate_type;            /*!< scan duplicate type */
+    uint16_t normal_adv_size;               /*!< Normal adv size for scan duplicate */
+    uint16_t mesh_adv_size;                 /*!< Mesh adv size for scan duplicate */
+    uint8_t coex_phy_coded_tx_rx_time_limit;  /*!< limit on max tx/rx time in case of connection using CODED-PHY with Wi-Fi coexistence */
+    uint32_t hw_target_code;                /*!< hardware target */
+    uint8_t slave_ce_len_min;               /*!< slave minimum ce length*/
+    uint8_t hw_recorrect_en;
+    uint8_t cca_thresh;                     /*!< cca threshold*/
+} esp_bt_controller_config_t;
+
+/**
+ * @brief Bluetooth controller enable/disable/initialised/de-initialised status
+ */
+typedef enum {
+    ESP_BT_CONTROLLER_STATUS_IDLE = 0,
+    ESP_BT_CONTROLLER_STATUS_INITED,
+    ESP_BT_CONTROLLER_STATUS_ENABLED,
+    ESP_BT_CONTROLLER_STATUS_NUM,
+} esp_bt_controller_status_t;
+
+/**
+ * @brief BLE tx power type
+ *        ESP_BLE_PWR_TYPE_CONN_HDL0-8: for each connection, and only be set after connection completed.
+ *                                      when disconnect, the correspond TX power is not effected.
+ *        ESP_BLE_PWR_TYPE_ADV : for advertising/scan response.
+ *        ESP_BLE_PWR_TYPE_SCAN : for scan.
+ *        ESP_BLE_PWR_TYPE_DEFAULT : if each connection's TX power is not set, it will use this default value.
+ *                                   if neither in scan mode nor in adv mode, it will use this default value.
+ *        If none of power type is set, system will use ESP_PWR_LVL_P3 as default for ADV/SCAN/CONN0-9.
+ */
+typedef enum {
+    ESP_BLE_PWR_TYPE_CONN_HDL0  = 0,            /*!< For connection handle 0 */
+    ESP_BLE_PWR_TYPE_CONN_HDL1  = 1,            /*!< For connection handle 1 */
+    ESP_BLE_PWR_TYPE_CONN_HDL2  = 2,            /*!< For connection handle 2 */
+    ESP_BLE_PWR_TYPE_CONN_HDL3  = 3,            /*!< For connection handle 3 */
+    ESP_BLE_PWR_TYPE_CONN_HDL4  = 4,            /*!< For connection handle 4 */
+    ESP_BLE_PWR_TYPE_CONN_HDL5  = 5,            /*!< For connection handle 5 */
+    ESP_BLE_PWR_TYPE_CONN_HDL6  = 6,            /*!< For connection handle 6 */
+    ESP_BLE_PWR_TYPE_CONN_HDL7  = 7,            /*!< For connection handle 7 */
+    ESP_BLE_PWR_TYPE_CONN_HDL8  = 8,            /*!< For connection handle 8 */
+    ESP_BLE_PWR_TYPE_ADV        = 9,            /*!< For advertising */
+    ESP_BLE_PWR_TYPE_SCAN       = 10,           /*!< For scan */
+    ESP_BLE_PWR_TYPE_DEFAULT    = 11,           /*!< For default, if not set other, it will use default value */
+    ESP_BLE_PWR_TYPE_NUM        = 12,           /*!< TYPE numbers */
+} esp_ble_power_type_t;
+
+/**
+ * @brief Bluetooth TX power level(index), it's just a index corresponding to power(dbm).
+ */
+typedef enum {
+    ESP_PWR_LVL_N27 = 0,              /*!< Corresponding to -27dbm */
+    ESP_PWR_LVL_N24 = 1,              /*!< Corresponding to -24dbm */
+    ESP_PWR_LVL_N21 = 2,              /*!< Corresponding to -21dbm */
+    ESP_PWR_LVL_N18 = 3,              /*!< Corresponding to -18dbm */
+    ESP_PWR_LVL_N15 = 4,              /*!< Corresponding to -15dbm */
+    ESP_PWR_LVL_N12 = 5,              /*!< Corresponding to -12dbm */
+    ESP_PWR_LVL_N9  = 6,              /*!< Corresponding to  -9dbm */
+    ESP_PWR_LVL_N6  = 7,              /*!< Corresponding to  -6dbm */
+    ESP_PWR_LVL_N3  = 8,              /*!< Corresponding to  -3dbm */
+    ESP_PWR_LVL_N0  = 9,              /*!< Corresponding to   0dbm */
+    ESP_PWR_LVL_P3  = 10,             /*!< Corresponding to  +3dbm */
+    ESP_PWR_LVL_P6  = 11,             /*!< Corresponding to  +6dbm */
+    ESP_PWR_LVL_P9  = 12,             /*!< Corresponding to  +9dbm */
+    ESP_PWR_LVL_P12 = 13,             /*!< Corresponding to  +12dbm */
+    ESP_PWR_LVL_P15 = 14,             /*!< Corresponding to  +15dbm */
+    ESP_PWR_LVL_P18 = 15,             /*!< Corresponding to  +18dbm */
+    ESP_PWR_LVL_INVALID = 0xFF,       /*!< Indicates an invalid value */
+} esp_power_level_t;
+
+/**
+ * @brief  Set BLE TX power
+ *         Connection Tx power should only be set after connection created.
+ * @param  power_type : The type of which tx power, could set Advertising/Connection/Default and etc
+ * @param  power_level: Power level(index) corresponding to absolute value(dbm)
+ * @return              ESP_OK - success, other - failed
+ */
+esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level);
+
+/**
+ * @brief  Get BLE TX power
+ *         Connection Tx power should only be get after connection created.
+ * @param  power_type : The type of which tx power, could set Advertising/Connection/Default and etc
+ * @return             >= 0 - Power level, < 0 - Invalid
+ */
+esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type);
+
+/**
+ * @brief       Initialize BT controller to allocate task and other resource.
+ *              This function should be called only once, before any other BT functions are called.
+ * @param  cfg: Initial configuration of BT controller. Different from previous version, there's a mode and some
+ *              connection configuration in "cfg" to configure controller work mode and allocate the resource which is needed.
+ * @return      ESP_OK - success, other - failed
+ */
+esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg);
+
+/**
+ * @brief  De-initialize BT controller to free resource and delete task.
+ *
+ * This function should be called only once, after any other BT functions are called.
+ * This function is not whole completed, esp_bt_controller_init cannot called after this function.
+ * @return  ESP_OK - success, other - failed
+ */
+esp_err_t esp_bt_controller_deinit(void);
+
+/**
+ * @brief Enable BT controller.
+ *               Due to a known issue, you cannot call esp_bt_controller_enable() a second time
+ *               to change the controller mode dynamically. To change controller mode, call
+ *               esp_bt_controller_disable() and then call esp_bt_controller_enable() with the new mode.
+ * @param mode : the mode(BLE/BT/BTDM) to enable. For compatible of API, retain this argument. This mode must be
+ *               equal as the mode in "cfg" of esp_bt_controller_init().
+ * @return       ESP_OK - success, other - failed
+ */
+esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode);
+
+/**
+ * @brief  Disable BT controller
+ * @return       ESP_OK - success, other - failed
+ */
+esp_err_t esp_bt_controller_disable(void);
+
+/**
+ * @brief  Get BT controller is initialised/de-initialised/enabled/disabled
+ * @return status value
+ */
+esp_bt_controller_status_t esp_bt_controller_get_status(void);
+
+uint16_t esp_bt_get_tx_buf_num(void);
+
+/** @brief esp_vhci_host_callback
+ *  used for vhci call host function to notify what host need to do
+ */
+typedef struct esp_vhci_host_callback {
+    void (*notify_host_send_available)(void);               /*!< callback used to notify that the host can send packet to controller */
+    int (*notify_host_recv)(uint8_t *data, uint16_t len);   /*!< callback used to notify that the controller has a packet to send to the host*/
+} esp_vhci_host_callback_t;
+
+/** @brief esp_vhci_host_check_send_available
+ *  used for check actively if the host can send packet to controller or not.
+ *  @return true for ready to send, false means cannot send packet
+ */
+bool esp_vhci_host_check_send_available(void);
+
+/** @brief esp_vhci_host_send_packet
+ * host send packet to controller
+ *
+ * Should not call this function from within a critical section
+ * or when the scheduler is suspended.
+ *
+ * @param data the packet point
+ * @param len the packet length
+ */
+void esp_vhci_host_send_packet(uint8_t *data, uint16_t len);
+
+/** @brief esp_vhci_host_register_callback
+ * register the vhci reference callback
+ * struct defined by vhci_host_callback structure.
+ * @param callback esp_vhci_host_callback type variable
+ * @return ESP_OK - success, ESP_FAIL - failed
+ */
+esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback);
+
+/** @brief esp_bt_controller_mem_release
+ * release the controller memory as per the mode
+ *
+ * This function releases the BSS, data and other sections of the controller to heap. The total size is about 70k bytes.
+ *
+ * esp_bt_controller_mem_release(mode) should be called only before esp_bt_controller_init()
+ * or after esp_bt_controller_deinit().
+ *
+ * Note that once BT controller memory is released, the process cannot be reversed. It means you cannot use the bluetooth
+ * mode which you have released by this function.
+ *
+ * If your firmware will later upgrade the Bluetooth controller mode (BLE -> BT Classic or disabled -> enabled)
+ * then do not call this function.
+ *
+ * If the app calls esp_bt_controller_enable(ESP_BT_MODE_BLE) to use BLE only then it is safe to call
+ * esp_bt_controller_mem_release(ESP_BT_MODE_CLASSIC_BT) at initialization time to free unused BT Classic memory.
+ *
+ * If the mode is ESP_BT_MODE_BTDM, then it may be useful to call API esp_bt_mem_release(ESP_BT_MODE_BTDM) instead,
+ * which internally calls esp_bt_controller_mem_release(ESP_BT_MODE_BTDM) and additionally releases the BSS and data
+ * consumed by the BT/BLE host stack to heap. For more details about usage please refer to the documentation of
+ * esp_bt_mem_release() function
+ *
+ * @param mode : the mode want to release memory
+ * @return ESP_OK - success, other - failed
+ */
+esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode);
+
+/** @brief esp_bt_mem_release
+ * release controller memory and BSS and data section of the BT/BLE host stack as per the mode
+ *
+ * This function first releases controller memory by internally calling esp_bt_controller_mem_release().
+ * Additionally, if the mode is set to ESP_BT_MODE_BTDM, it also releases the BSS and data consumed by the BT/BLE host stack to heap
+ *
+ * Note that once BT memory is released, the process cannot be reversed. It means you cannot use the bluetooth
+ * mode which you have released by this function.
+ *
+ * If your firmware will later upgrade the Bluetooth controller mode (BLE -> BT Classic or disabled -> enabled)
+ * then do not call this function.
+ *
+ * If you never intend to use bluetooth in a current boot-up cycle, you can call esp_bt_mem_release(ESP_BT_MODE_BTDM)
+ * before esp_bt_controller_init or after esp_bt_controller_deinit.
+ *
+ * For example, if a user only uses bluetooth for setting the WiFi configuration, and does not use bluetooth in the rest of the product operation".
+ * In such cases, after receiving the WiFi configuration, you can disable/deinit bluetooth and release its memory.
+ * Below is the sequence of APIs to be called for such scenarios:
+ *
+ *      esp_bluedroid_disable();
+ *      esp_bluedroid_deinit();
+ *      esp_bt_controller_disable();
+ *      esp_bt_controller_deinit();
+ *      esp_bt_mem_release(ESP_BT_MODE_BTDM);
+ *
+ * @param mode : the mode whose memory is to be released
+ * @return ESP_OK - success, other - failed
+ */
+esp_err_t esp_bt_mem_release(esp_bt_mode_t mode);
+
+/**
+ * @brief enable bluetooth to enter modem sleep
+ *
+ * Note that this function shall not be invoked before esp_bt_controller_enable()
+ *
+ * There are currently two options for bluetooth modem sleep, one is ORIG mode, and another is EVED Mode. EVED Mode is intended for BLE only.
+ *
+ * For ORIG mode:
+ * Bluetooth modem sleep is enabled in controller start up by default if CONFIG_BTDM_CONTROLLER_MODEM_SLEEP is set and "ORIG mode" is selected. In ORIG modem sleep mode, bluetooth controller will switch off some components and pause to work every now and then, if there is no event to process; and wakeup according to the scheduled interval and resume the work. It can also wakeup earlier upon external request using function "esp_bt_controller_wakeup_request".
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ */
+esp_err_t esp_bt_sleep_enable(void);
+
+
+/**
+ * @brief disable bluetooth modem sleep
+ *
+ * Note that this function shall not be invoked before esp_bt_controller_enable()
+ *
+ * If esp_bt_sleep_disable() is called, bluetooth controller will not be allowed to enter modem sleep;
+ *
+ * If ORIG modem sleep mode is in use, if this function is called, bluetooth controller may not immediately wake up if it is dormant then.
+ * In this case, esp_bt_controller_wakeup_request() can be used to shorten the time for wakeup.
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ */
+esp_err_t esp_bt_sleep_disable(void);
+
+/**
+ * @brief to check whether bluetooth controller is sleeping at the instant, if modem sleep is enabled
+ *
+ * Note that this function shall not be invoked before esp_bt_controller_enable()
+ * This function is supposed to be used ORIG mode of modem sleep
+ *
+ * @return  true if in modem sleep state, false otherwise
+ */
+bool esp_bt_controller_is_sleeping(void);
+
+/**
+ * @brief request controller to wakeup from sleeping state during sleep mode
+ *
+ * Note that this function shall not be invoked before esp_bt_controller_enable()
+ * Note that this function is supposed to be used ORIG mode of modem sleep
+ * Note that after this request, bluetooth controller may again enter sleep as long as the modem sleep is enabled
+ *
+ * Profiling shows that it takes several milliseconds to wakeup from modem sleep after this request.
+ * Generally it takes longer if 32kHz XTAL is used than the main XTAL, due to the lower frequency of the former as the bluetooth low power clock source.
+ */
+void esp_bt_controller_wakeup_request(void);
+
+/**
+ * @brief notify bluetooth controller task to process the event upon Tx or Rx done
+ *
+ * Note that this function shall not be invoked before esp_bt_controller_enable()
+ * This function can be called in both ISR and non-ISR context
+ *
+ */
+int esp_bt_h4tl_eif_io_event_notify(int event);
+
+/**
+ * @brief bt Wi-Fi power domain power on
+ */
+void esp_wifi_bt_power_domain_on(void);
+
+/**
+ * @brief bt Wi-Fi power domain power off
+ */
+void esp_wifi_bt_power_domain_off(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_BT_H__ */
diff --git a/tools/sdk/esp32s3/include/button/button/include/iot_button.h b/tools/sdk/esp32s3/include/button/button/include/iot_button.h
new file mode 100644
index 00000000000..3e735133464
--- /dev/null
+++ b/tools/sdk/esp32s3/include/button/button/include/iot_button.h
@@ -0,0 +1,272 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _IOT_BUTTON_H_
+#define _IOT_BUTTON_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <driver/gpio.h>
+#include <freertos/FreeRTOS.h>
+#include <freertos/portmacro.h>
+typedef void (* button_cb)(void*);
+typedef void* button_handle_t;
+
+typedef enum {
+    BUTTON_ACTIVE_HIGH = 1,    /*!<button active level: high level*/
+    BUTTON_ACTIVE_LOW = 0,     /*!<button active level: low level*/
+} button_active_t;
+
+typedef enum {
+    BUTTON_CB_PUSH = 0,   /*!<button push callback event */
+    BUTTON_CB_RELEASE,    /*!<button release callback event */
+    BUTTON_CB_TAP,        /*!<button quick tap callback event(will not trigger if there already is a "PRESS" event) */
+    BUTTON_CB_SERIAL,     /*!<button serial trigger callback event */
+} button_cb_type_t;
+
+/**
+ * @brief Init button functions
+ *
+ * @param gpio_num GPIO index of the pin that the button uses
+ * @param active_level button hardware active level.
+ *        For "BUTTON_ACTIVE_LOW" it means when the button pressed, the GPIO will read low level.
+ *
+ * @return A button_handle_t handle to the created button object, or NULL in case of error.
+ */
+button_handle_t iot_button_create(gpio_num_t gpio_num, button_active_t active_level);
+
+/**
+ * @brief Register a callback function for a serial trigger event.
+ *
+ * @param btn_handle handle of the button object
+ * @param start_after_sec define the time after which to start serial trigger action
+ * @param interval_tick serial trigger interval
+ * @param cb callback function for "TAP" action.
+ * @param arg Parameter for callback function
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_set_serial_cb(button_handle_t btn_handle, uint32_t start_after_sec, TickType_t interval_tick, button_cb cb, void* arg);
+
+/**
+ * @brief Register a callback function for a button_cb_type_t action.
+ *
+ * @param btn_handle handle of the button object
+ * @param type callback function type
+ * @param cb callback function for "TAP" action.
+ * @param arg Parameter for callback function
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_set_evt_cb(button_handle_t btn_handle, button_cb_type_t type, button_cb cb, void* arg);
+
+/**
+ * @brief Callbacks invoked as timer events occur while button is pressed.
+ *        Example: If a button is configured for 2 sec, 5 sec and 7 sec callbacks and if the button is pressed for 6 sec then 2 sec callback would be invoked at 2 sec event and 5 sec callback would be invoked at 5 sec event
+ *
+ * @param btn_handle handle of the button object
+ * @param press_sec the callback function would be called if you press the button for a specified period of time
+ * @param cb callback function for "PRESS and HOLD" action.
+ * @param arg Parameter for callback function
+ *
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_add_on_press_cb(button_handle_t btn_handle, uint32_t press_sec, button_cb cb, void* arg);
+
+/**
+ * @brief Single callback invoked according to the latest timer event on button release. 
+ *        Example: If a button is configured for 2 sec, 5 sec and 7 sec callbacks and if the button is released at 6 sec then only 5 sec callback would be invoked
+ *
+ * @param btn_handle handle of the button object
+ * @param press_sec the callback function would be called if you press the button for a specified period of time
+ * @param cb callback function for "PRESS and RELEASE" action.
+ * @param arg Parameter for callback function
+ * 
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_add_on_release_cb(button_handle_t btn_handle, uint32_t press_sec, button_cb cb, void* arg);
+
+/**
+ * @brief Delete button object and free memory
+ * @param btn_handle handle of the button object
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_delete(button_handle_t btn_handle);
+
+/**
+ * @brief Remove callback
+ *
+ * @param btn_handle The handle of the button object
+ * @param type callback function event type
+ *
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t iot_button_rm_cb(button_handle_t btn_handle, button_cb_type_t type);
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifdef __cplusplus
+
+/**
+ * class of button
+ * simple usage:
+ * CButton* btn = new CButton(BUTTON_IO_NUM, BUTTON_ACTIVE_LEVEL, BUTTON_SERIAL_TRIGGER, 3);
+ * btn->add_cb(BUTTON_CB_PUSH, button_tap_cb, (void*) push, 50 / portTICK_PERIOD_MS);
+ * btn->add_custom_cb(5, button_press_5s_cb, NULL);
+ * ......
+ * delete btn;
+ */
+class CButton
+{
+private:
+    button_handle_t m_btn_handle;
+
+    /**
+     * prevent copy constructing
+     */
+    CButton(const CButton&);
+    CButton& operator = (const CButton&);
+public:
+
+    /**
+     * @brief constructor of CButton
+     * 
+     * @param gpio_num GPIO index of the pin that the button uses
+     * @param active_level button hardware active level.
+     *        For "BUTTON_ACTIVE_LOW" it means when the button pressed, the GPIO will read low level.
+     */
+    CButton(gpio_num_t gpio_num, button_active_t active_level = BUTTON_ACTIVE_LOW);
+    
+    ~CButton();
+
+    /**
+     * @brief Register a callback function for a button_cb_type_t action.
+     *
+     * @param type callback function type
+     * @param cb callback function for "TAP" action.
+     * @param arg Parameter for callback function
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t set_evt_cb(button_cb_type_t type, button_cb cb, void* arg);
+
+    /**
+     * @brief Register a callback function for a serial trigger event.
+     *
+     * @param btn_handle handle of the button object
+     * @param start_after_sec define the time after which to start serial trigger action
+     * @param interval_tick serial trigger interval
+     * @param cb callback function for "TAP" action.
+     * @param arg Parameter for callback function
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t set_serial_cb(button_cb cb, void* arg, TickType_t interval_tick, uint32_t start_after_sec);
+
+    /**
+     * @brief Callbacks invoked as timer events occur while button is pressed
+     *
+     * @param press_sec the callback function would be called if you press the button for a specified period of time
+     * @param cb callback function for "PRESS and HOLD" action.
+     * @param arg Parameter for callback function
+     *
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t add_on_press_cb(uint32_t press_sec, button_cb cb, void* arg);
+    
+    /**
+     * @brief Single callback invoked according to the latest timer event on button release.
+     *
+     * @param press_sec the callback function would be called if you press the button for a specified period of time
+     * @param cb callback function for "PRESS and RELEASE" action.
+     * @param arg Parameter for callback function
+     *
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t add_on_release_cb(uint32_t press_sec, button_cb cb, void* arg);
+    
+    /**
+     * @brief Remove callback
+     *
+     * @param type callback function event type
+     *
+     * @return
+     *     - ESP_OK Success
+     */
+    esp_err_t rm_cb(button_cb_type_t type);
+};
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/cbor/port/include/cbor.h b/tools/sdk/esp32s3/include/cbor/port/include/cbor.h
new file mode 100644
index 00000000000..c8e6ccf4832
--- /dev/null
+++ b/tools/sdk/esp32s3/include/cbor/port/include/cbor.h
@@ -0,0 +1,2 @@
+#include "../../tinycbor/src/cbor.h"
+#include "../../tinycbor/src/cborjson.h"
diff --git a/tools/sdk/esp32s3/include/cmock/CMock/src/cmock.h b/tools/sdk/esp32s3/include/cmock/CMock/src/cmock.h
new file mode 100644
index 00000000000..21123e925de
--- /dev/null
+++ b/tools/sdk/esp32s3/include/cmock/CMock/src/cmock.h
@@ -0,0 +1,41 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#ifndef CMOCK_FRAMEWORK_H
+#define CMOCK_FRAMEWORK_H
+
+#include "cmock_internals.h"
+
+#define CMOCK_VERSION_MAJOR    2
+#define CMOCK_VERSION_MINOR    5
+#define CMOCK_VERSION_BUILD    2
+#define CMOCK_VERSION          ((CMOCK_VERSION_MAJOR << 16) | (CMOCK_VERSION_MINOR << 8) | CMOCK_VERSION_BUILD)
+
+/* should be big enough to index full range of CMOCK_MEM_MAX */
+#ifndef CMOCK_MEM_INDEX_TYPE
+#include <stddef.h>
+#define CMOCK_MEM_INDEX_TYPE  size_t
+#endif
+
+#define CMOCK_GUTS_NONE   (0)
+
+/*-------------------------------------------------------
+ * Memory API
+ *-------------------------------------------------------*/
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemNew(CMOCK_MEM_INDEX_TYPE size);
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemChain(CMOCK_MEM_INDEX_TYPE root_index, CMOCK_MEM_INDEX_TYPE obj_index);
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemNext(CMOCK_MEM_INDEX_TYPE previous_item_index);
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemEndOfChain(CMOCK_MEM_INDEX_TYPE root_index);
+
+void*                 CMock_Guts_GetAddressFor(CMOCK_MEM_INDEX_TYPE index);
+
+CMOCK_MEM_INDEX_TYPE CMock_Guts_MemBytesCapacity(void);
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemBytesFree(void);
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemBytesUsed(void);
+void                  CMock_Guts_MemFreeAll(void);
+void                  CMock_Guts_MemFreeFinal(void);
+
+#endif /* end of CMOCK_FRAMEWORK_H */
diff --git a/tools/sdk/esp32s3/include/cmock/CMock/src/cmock_internals.h b/tools/sdk/esp32s3/include/cmock/CMock/src/cmock_internals.h
new file mode 100644
index 00000000000..56fb33b1aa6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/cmock/CMock/src/cmock_internals.h
@@ -0,0 +1,91 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#ifndef CMOCK_FRAMEWORK_INTERNALS_H
+#define CMOCK_FRAMEWORK_INTERNALS_H
+
+#include "unity.h"
+
+/* These are constants that the generated mocks have access to */
+extern const char* CMockStringOutOfMemory;
+extern const char* CMockStringCalledMore;
+extern const char* CMockStringCalledLess;
+extern const char* CMockStringCalledEarly;
+extern const char* CMockStringCalledLate;
+extern const char* CMockStringCallOrder;
+extern const char* CMockStringIgnPreExp;
+extern const char* CMockStringPtrPreExp;
+extern const char* CMockStringPtrIsNULL;
+extern const char* CMockStringExpNULL;
+extern const char* CMockStringMismatch;
+
+/* define CMOCK_MEM_DYNAMIC to grab memory as needed with malloc
+ * when you do that, CMOCK_MEM_SIZE is used for incremental size instead of total */
+#ifdef CMOCK_MEM_STATIC
+#undef CMOCK_MEM_DYNAMIC
+#endif
+
+#ifdef CMOCK_MEM_DYNAMIC
+#include <stdlib.h>
+#endif
+
+/* this is used internally during pointer arithmetic. make sure this type is the same size as the target's pointer type */
+#ifndef CMOCK_MEM_PTR_AS_INT
+#ifdef UNITY_POINTER_WIDTH
+#ifdef UNITY_INT_WIDTH
+#if UNITY_POINTER_WIDTH == UNITY_INT_WIDTH
+#define CMOCK_MEM_PTR_AS_INT unsigned int
+#endif
+#endif
+#endif
+#endif
+
+#ifndef CMOCK_MEM_PTR_AS_INT
+#ifdef UNITY_POINTER_WIDTH
+#ifdef UNITY_LONG_WIDTH
+#if UNITY_POINTER_WIDTH == UNITY_LONG_WIDTH
+#define CMOCK_MEM_PTR_AS_INT unsigned long
+#endif
+#if UNITY_POINTER_WIDTH > UNITY_LONG_WIDTH
+#define CMOCK_MEM_PTR_AS_INT unsigned long long
+#endif
+#endif
+#endif
+#endif
+
+#ifndef CMOCK_MEM_PTR_AS_INT
+#define CMOCK_MEM_PTR_AS_INT unsigned long
+#endif
+
+/* 0 for no alignment, 1 for 16-bit, 2 for 32-bit, 3 for 64-bit */
+#ifndef CMOCK_MEM_ALIGN
+  #ifdef UNITY_LONG_WIDTH
+    #if (UNITY_LONG_WIDTH == 16)
+      #define CMOCK_MEM_ALIGN (1)
+    #elif (UNITY_LONG_WIDTH == 32)
+      #define CMOCK_MEM_ALIGN (2)
+    #elif (UNITY_LONG_WIDTH == 64)
+      #define CMOCK_MEM_ALIGN (3)
+    #else
+      #define CMOCK_MEM_ALIGN (2)
+    #endif
+  #else
+    #define CMOCK_MEM_ALIGN (2)
+  #endif
+#endif
+
+/* amount of memory to allow cmock to use in its internal heap */
+#ifndef CMOCK_MEM_SIZE
+#define CMOCK_MEM_SIZE (32768)
+#endif
+
+/* automatically calculated defs for easier reading */
+#define CMOCK_MEM_ALIGN_SIZE  (CMOCK_MEM_INDEX_TYPE)(1u << CMOCK_MEM_ALIGN)
+#define CMOCK_MEM_ALIGN_MASK  (CMOCK_MEM_INDEX_TYPE)(CMOCK_MEM_ALIGN_SIZE - 1)
+#define CMOCK_MEM_INDEX_SIZE  (CMOCK_MEM_INDEX_TYPE)(CMOCK_MEM_PTR_AS_INT)((sizeof(CMOCK_MEM_INDEX_TYPE) > CMOCK_MEM_ALIGN_SIZE) ? sizeof(CMOCK_MEM_INDEX_TYPE) : CMOCK_MEM_ALIGN_SIZE)
+
+
+#endif /* end of CMOCK_FRAMEWORK_INTERNALS_H */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/address.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/address.h
new file mode 100644
index 00000000000..8b8d9a24fae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/address.h
@@ -0,0 +1,213 @@
+/*
+ * address.h -- representation of network addresses
+ *
+ * Copyright (C) 2010-2011,2015-2016 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file address.h
+ * @brief Representation of network addresses
+ */
+
+#ifndef COAP_ADDRESS_H_
+#define COAP_ADDRESS_H_
+
+#include <assert.h>
+#include <stdint.h>
+#include <string.h>
+#include <sys/types.h>
+#include "libcoap.h"
+
+#if defined(WITH_LWIP)
+
+#include <lwip/ip_addr.h>
+
+typedef struct coap_address_t {
+  uint16_t port;
+  ip_addr_t addr;
+} coap_address_t;
+
+/**
+ * Returns the port from @p addr in host byte order.
+ */
+COAP_STATIC_INLINE uint16_t
+coap_address_get_port(const coap_address_t *addr) {
+  return ntohs(addr->port);
+}
+
+/**
+ * Sets the port field of @p addr to @p port (in host byte order).
+ */
+COAP_STATIC_INLINE void
+coap_address_set_port(coap_address_t *addr, uint16_t port) {
+  addr->port = htons(port);
+}
+
+#define _coap_address_equals_impl(A, B) \
+        ((A)->port == (B)->port        \
+        && (!!ip_addr_cmp(&(A)->addr,&(B)->addr)))
+
+#define _coap_address_isany_impl(A)  ip_addr_isany(&(A)->addr)
+
+#define _coap_is_mcast_impl(Address) ip_addr_ismulticast(&(Address)->addr)
+
+#elif defined(WITH_CONTIKI)
+
+#include "uip.h"
+
+typedef struct coap_address_t {
+  uip_ipaddr_t addr;
+  uint16_t port;
+} coap_address_t;
+
+/**
+ * Returns the port from @p addr in host byte order.
+ */
+COAP_STATIC_INLINE uint16_t
+coap_address_get_port(const coap_address_t *addr) {
+  return uip_ntohs(addr->port);
+}
+
+/**
+ * Sets the port field of @p addr to @p port (in host byte order).
+ */
+COAP_STATIC_INLINE void
+coap_address_set_port(coap_address_t *addr, uint16_t port) {
+  addr->port = uip_htons(port);
+}
+
+#define _coap_address_equals_impl(A,B) \
+        ((A)->port == (B)->port        \
+        && uip_ipaddr_cmp(&((A)->addr),&((B)->addr)))
+
+/** @todo implementation of _coap_address_isany_impl() for Contiki */
+#define _coap_address_isany_impl(A)  0
+
+#define _coap_is_mcast_impl(Address) uip_is_addr_mcast(&((Address)->addr))
+
+#else /* WITH_LWIP || WITH_CONTIKI */
+
+ /** multi-purpose address abstraction */
+typedef struct coap_address_t {
+  socklen_t size;           /**< size of addr */
+  union {
+    struct sockaddr         sa;
+    struct sockaddr_in      sin;
+    struct sockaddr_in6     sin6;
+  } addr;
+} coap_address_t;
+
+/**
+ * Returns the port from @p addr in host byte order.
+ */
+uint16_t coap_address_get_port(const coap_address_t *addr);
+
+/**
+ * Set the port field of @p addr to @p port (in host byte order).
+ */
+void coap_address_set_port(coap_address_t *addr, uint16_t port);
+
+/**
+ * Compares given address objects @p a and @p b. This function returns @c 1 if
+ * addresses are equal, @c 0 otherwise. The parameters @p a and @p b must not be
+ * @c NULL;
+ */
+int coap_address_equals(const coap_address_t *a, const coap_address_t *b);
+
+COAP_STATIC_INLINE int
+_coap_address_isany_impl(const coap_address_t *a) {
+  /* need to compare only relevant parts of sockaddr_in6 */
+  switch (a->addr.sa.sa_family) {
+  case AF_INET:
+    return a->addr.sin.sin_addr.s_addr == INADDR_ANY;
+  case AF_INET6:
+    return memcmp(&in6addr_any,
+                  &a->addr.sin6.sin6_addr,
+                  sizeof(in6addr_any)) == 0;
+  default:
+    ;
+  }
+
+  return 0;
+}
+#endif /* WITH_LWIP || WITH_CONTIKI */
+
+/**
+ * Resets the given coap_address_t object @p addr to its default values. In
+ * particular, the member size must be initialized to the available size for
+ * storing addresses.
+ *
+ * @param addr The coap_address_t object to initialize.
+ */
+void coap_address_init(coap_address_t *addr);
+
+/* Convenience function to copy IPv6 addresses without garbage. */
+
+COAP_STATIC_INLINE void
+coap_address_copy( coap_address_t *dst, const coap_address_t *src ) {
+#if defined(WITH_LWIP) || defined(WITH_CONTIKI)
+  memcpy( dst, src, sizeof( coap_address_t ) );
+#else
+  memset( dst, 0, sizeof( coap_address_t ) );
+  dst->size = src->size;
+  if ( src->addr.sa.sa_family == AF_INET6 ) {
+    dst->addr.sin6.sin6_family = src->addr.sin6.sin6_family;
+    dst->addr.sin6.sin6_addr = src->addr.sin6.sin6_addr;
+    dst->addr.sin6.sin6_port = src->addr.sin6.sin6_port;
+    dst->addr.sin6.sin6_scope_id = src->addr.sin6.sin6_scope_id;
+  } else if ( src->addr.sa.sa_family == AF_INET ) {
+    dst->addr.sin = src->addr.sin;
+  } else {
+    memcpy( &dst->addr, &src->addr, src->size );
+  }
+#endif
+}
+
+#if defined(WITH_LWIP) || defined(WITH_CONTIKI)
+/**
+ * Compares given address objects @p a and @p b. This function returns @c 1 if
+ * addresses are equal, @c 0 otherwise. The parameters @p a and @p b must not be
+ * @c NULL;
+ */
+COAP_STATIC_INLINE int
+coap_address_equals(const coap_address_t *a, const coap_address_t *b) {
+  assert(a); assert(b);
+  return _coap_address_equals_impl(a, b);
+}
+#endif
+
+/**
+ * Checks if given address object @p a denotes the wildcard address. This
+ * function returns @c 1 if this is the case, @c 0 otherwise. The parameters @p
+ * a must not be @c NULL;
+ */
+COAP_STATIC_INLINE int
+coap_address_isany(const coap_address_t *a) {
+  assert(a);
+  return _coap_address_isany_impl(a);
+}
+
+#if !defined(WITH_LWIP) && !defined(WITH_CONTIKI)
+
+/**
+ * Checks if given address @p a denotes a multicast address. This function
+ * returns @c 1 if @p a is multicast, @c 0 otherwise.
+ */
+int coap_is_mcast(const coap_address_t *a);
+#else /* !WITH_LWIP && !WITH_CONTIKI */
+/**
+ * Checks if given address @p a denotes a multicast address. This function
+ * returns @c 1 if @p a is multicast, @c 0 otherwise.
+ */
+COAP_STATIC_INLINE int
+coap_is_mcast(const coap_address_t *a) {
+  return a && _coap_is_mcast_impl(a);
+}
+#endif /* !WITH_LWIP && !WITH_CONTIKI */
+
+#endif /* COAP_ADDRESS_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/async.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/async.h
new file mode 100644
index 00000000000..a61e0c09828
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/async.h
@@ -0,0 +1,116 @@
+/*
+ * async.h -- state management for asynchronous messages
+ *
+ * Copyright (C) 2010-2011 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file async.h
+ * @brief State management for asynchronous messages
+ */
+
+#ifndef COAP_ASYNC_H_
+#define COAP_ASYNC_H_
+
+#include "net.h"
+
+/**
+ * @defgroup coap_async Asynchronous Messaging
+ * @{
+ * API functions for  Async "separate" messages.
+ * A coap_context_t object holds a list of coap_async_t objects that can
+ * be used to generate a separate response in the case a result of a request
+ * cannot be delivered immediately.
+ */
+
+/**
+ * Returns @c 1 if libcoap was built with separate messages enabled,
+ * @c 0 otherwise.
+ */
+int coap_async_is_supported(void);
+
+/**
+ * Allocates a new coap_async_t object and fills its fields according to
+ * the given @p request. This function returns a pointer to the registered
+ * coap_async_t object or @c NULL on error. Note that this function will
+ * return @c NULL in case that an object with the same identifier is already
+ * registered.
+ *
+ * When the delay expires, a copy of the @p request will get sent to the
+ * appropriate request handler.
+ *
+ * @param session  The session that is used for asynchronous transmissions.
+ * @param request  The request that is handled asynchronously.
+ * @param delay    The amount of time to delay before sending response, 0 means
+ *                 wait forever.
+ *
+ * @return         A pointer to the registered coap_async_t object or @c
+ *                 NULL in case of an error.
+ */
+coap_async_t *
+coap_register_async(coap_session_t *session,
+                    const coap_pdu_t *request,
+                    coap_tick_t delay);
+
+/**
+ * Update the delay timeout, so changing when the registered @p async triggers.
+ *
+ * When the new delay expires, a copy of the original request will get sent to
+ * the appropriate request handler.
+ *
+ * @param async The object to update.
+ * @param delay    The amount of time to delay before sending response, 0 means
+ *                 wait forever.
+ */
+void
+coap_async_set_delay(coap_async_t *async, coap_tick_t delay);
+
+/**
+ * Releases the memory that was allocated by coap_register_async() for the
+ * object @p async.
+ *
+ * @param session  The session to use.
+ * @param async The object to delete.
+ */
+void
+coap_free_async(coap_session_t *session, coap_async_t *async);
+
+/**
+ * Retrieves the object identified by @p token from the list of asynchronous
+ * transactions that are registered with @p context. This function returns a
+ * pointer to that object or @c NULL if not found.
+ *
+ * @param session The session that is used for asynchronous transmissions.
+ * @param token   The PDU's token of the object to retrieve.
+ *
+ * @return        A pointer to the object identified by @p token or @c NULL if
+ *                not found.
+ */
+coap_async_t *coap_find_async(coap_session_t *session, coap_bin_const_t token);
+
+/**
+ * Set the application data pointer held in @p async. This overwrites any
+ * existing data pointer.
+ *
+ * @param async The async state object.
+ * @param app_data The pointer to the data.
+ */
+void coap_async_set_app_data(coap_async_t *async, void *app_data);
+
+/**
+ * Gets the application data pointer held in @p async.
+ *
+ * @param async The async state object.
+ *
+ * @return The applicaton data pointer.
+ */
+void *coap_async_get_app_data(const coap_async_t *async);
+
+/** @} */
+
+#endif /* COAP_ASYNC_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/block.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/block.h
new file mode 100644
index 00000000000..a2aac00fdc6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/block.h
@@ -0,0 +1,348 @@
+/*
+ * block.h -- block transfer
+ *
+ * Copyright (C) 2010-2012,2014-2015 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_BLOCK_H_
+#define COAP_BLOCK_H_
+
+#include "encode.h"
+#include "option.h"
+#include "pdu.h"
+
+/**
+ * @defgroup block Block Transfer
+ * API functions for handling PDUs using CoAP BLOCK options
+ * @{
+ */
+
+#ifndef COAP_MAX_BLOCK_SZX
+/**
+ * The largest value for the SZX component in a Block option.
+ */
+#define COAP_MAX_BLOCK_SZX      6
+#endif /* COAP_MAX_BLOCK_SZX */
+
+/**
+ * Structure of Block options.
+ */
+typedef struct {
+  unsigned int num;       /**< block number */
+  unsigned int m:1;       /**< 1 if more blocks follow, 0 otherwise */
+  unsigned int szx:3;     /**< block size */
+} coap_block_t;
+
+#define COAP_BLOCK_USE_LIBCOAP  0x01 /* Use libcoap to do block requests */
+#define COAP_BLOCK_SINGLE_BODY  0x02 /* Deliver the data as a single body */
+
+/**
+ * Returns the value of the least significant byte of a Block option @p opt.
+ * For zero-length options (i.e. num == m == szx == 0), COAP_OPT_BLOCK_LAST
+ * returns @c NULL.
+ */
+#define COAP_OPT_BLOCK_LAST(opt) \
+  (coap_opt_length(opt) ? (coap_opt_value(opt) + (coap_opt_length(opt)-1)) : 0)
+
+/** Returns the value of the More-bit of a Block option @p opt. */
+#define COAP_OPT_BLOCK_MORE(opt) \
+  (coap_opt_length(opt) ? (*COAP_OPT_BLOCK_LAST(opt) & 0x08) : 0)
+
+/** Returns the value of the SZX-field of a Block option @p opt. */
+#define COAP_OPT_BLOCK_SZX(opt)  \
+  (coap_opt_length(opt) ? (*COAP_OPT_BLOCK_LAST(opt) & 0x07) : 0)
+
+/**
+ * Returns the value of field @c num in the given block option @p block_opt.
+ */
+unsigned int coap_opt_block_num(const coap_opt_t *block_opt);
+
+/**
+ * Checks if more than @p num blocks are required to deliver @p data_len
+ * bytes of data for a block size of 1 << (@p szx + 4).
+ */
+COAP_STATIC_INLINE int
+coap_more_blocks(size_t data_len, unsigned int num, uint16_t szx) {
+  return ((num+1) << (szx + 4)) < data_len;
+}
+
+#if 0
+/** Sets the More-bit in @p block_opt */
+COAP_STATIC_INLINE void
+coap_opt_block_set_m(coap_opt_t *block_opt, int m) {
+  if (m)
+    *(coap_opt_value(block_opt) + (coap_opt_length(block_opt) - 1)) |= 0x08;
+  else
+    *(coap_opt_value(block_opt) + (coap_opt_length(block_opt) - 1)) &= ~0x08;
+}
+#endif
+
+/**
+ * Initializes @p block from @p pdu. @p number must be either COAP_OPTION_BLOCK1
+ * or COAP_OPTION_BLOCK2. When option @p number was found in @p pdu, @p block is
+ * initialized with values from this option and the function returns the value
+ * @c 1. Otherwise, @c 0 is returned.
+ *
+ * @param pdu    The pdu to search for option @p number.
+ * @param number The option number to search for (must be COAP_OPTION_BLOCK1 or
+ *               COAP_OPTION_BLOCK2).
+ * @param block  The block structure to initilize.
+ *
+ * @return       @c 1 on success, @c 0 otherwise.
+ */
+int coap_get_block(const coap_pdu_t *pdu, coap_option_num_t number,
+                   coap_block_t *block);
+
+/**
+ * Writes a block option of type @p number to message @p pdu. If the requested
+ * block size is too large to fit in @p pdu, it is reduced accordingly. An
+ * exception is made for the final block when less space is required. The actual
+ * length of the resource is specified in @p data_length.
+ *
+ * This function may change *block to reflect the values written to @p pdu. As
+ * the function takes into consideration the remaining space @p pdu, no more
+ * options should be added after coap_write_block_opt() has returned.
+ *
+ * @param block       The block structure to use. On return, this object is
+ *                    updated according to the values that have been written to
+ *                    @p pdu.
+ * @param number      COAP_OPTION_BLOCK1 or COAP_OPTION_BLOCK2.
+ * @param pdu         The message where the block option should be written.
+ * @param data_length The length of the actual data that will be added the @p
+ *                    pdu by calling coap_add_block().
+ *
+ * @return            @c 1 on success, or a negative value on error.
+ */
+int coap_write_block_opt(coap_block_t *block,
+                         coap_option_num_t number,
+                         coap_pdu_t *pdu,
+                         size_t data_length);
+
+/**
+ * Adds the @p block_num block of size 1 << (@p block_szx + 4) from source @p
+ * data to @p pdu.
+ *
+ * @param pdu       The message to add the block.
+ * @param len       The length of @p data.
+ * @param data      The source data to fill the block with.
+ * @param block_num The actual block number.
+ * @param block_szx Encoded size of block @p block_number.
+ *
+ * @return          @c 1 on success, @c 0 otherwise.
+ */
+int coap_add_block(coap_pdu_t *pdu,
+                   size_t len,
+                   const uint8_t *data,
+                   unsigned int block_num,
+                   unsigned char block_szx);
+
+/**
+ * Re-assemble payloads into a body
+ *
+ * @param body_data The pointer to the data for the body holding the
+ *                  representation so far or NULL if the first time.
+ * @param length    The length of @p data.
+ * @param data      The payload data to update the body with.
+ * @param offset    The offset of the @p data into the body.
+ * @param total     The estimated total size of the body.
+ *
+ * @return          The current representation of the body or @c NULL if error.
+ *                  If NULL, @p body_data will have been de-allocated.
+ */
+coap_binary_t *
+coap_block_build_body(coap_binary_t *body_data, size_t length,
+                      const uint8_t *data, size_t offset, size_t total);
+
+/**
+ * Adds the appropriate part of @p data to the @p response pdu.  If blocks are
+ * required, then the appropriate block will be added to the PDU and sent.
+ * Adds a ETAG option that is the hash of the entire data if the data is to be
+ * split into blocks
+ * Used by a request handler.
+ *
+ * Note: The application will get called for every packet of a large body to
+ * process. Consider using coap_add_data_response_large() instead.
+ *
+ * @param request    The requesting pdu.
+ * @param response   The response pdu.
+ * @param media_type The format of the data.
+ * @param maxage     The maxmimum life of the data. If @c -1, then there
+ *                   is no maxage.
+ * @param length     The total length of the data.
+ * @param data       The entire data block to transmit.
+ *
+ */
+void
+coap_add_data_blocked_response(const coap_pdu_t *request,
+                               coap_pdu_t *response,
+                               uint16_t media_type,
+                               int maxage,
+                               size_t length,
+                               const uint8_t* data);
+
+/**
+ * Callback handler for de-allocating the data based on @p app_ptr provided to
+ * coap_add_data_large_*() functions following transmission of the supplied
+ * data.
+ *
+ * @param session The session that this data is associated with
+ * @param app_ptr The application provided pointer provided to the
+ *                coap_add_data_large_* functions.
+ */
+typedef void (*coap_release_large_data_t)(coap_session_t *session,
+                                          void *app_ptr);
+
+/**
+ * Associates given data with the @p pdu that is passed as second parameter.
+ *
+ * If all the data can be transmitted in a single PDU, this is functionally
+ * the same as coap_add_data() except @p release_func (if not NULL) will get
+ * invoked after data transmission.
+ *
+ * Used for a client request.
+ *
+ * If the data spans multiple PDUs, then the data will get transmitted using
+ * BLOCK1 option with the addition of the SIZE1 option.
+ * The underlying library will handle the transmission of the individual blocks.
+ * Once the body of data has been transmitted (or a failure occurred), then
+ * @p release_func (if not NULL) will get called so the application can
+ * de-allocate the @p data based on @p app_data. It is the responsibility of
+ * the application not to change the contents of @p data until the data
+ * transfer has completed.
+ *
+ * There is no need for the application to include the BLOCK1 option in the
+ * @p pdu.
+ *
+ * coap_add_data_large_request() (or the alternative coap_add_data_large_*()
+ * functions) must be called only once per PDU and must be the last PDU update
+ * before the PDU is transmitted. The (potentially) initial data will get
+ * transmitted when coap_send() is invoked.
+ *
+ * Note: COAP_BLOCK_USE_LIBCOAP must be set by coap_context_set_block_mode()
+ * for libcoap to work correctly when using this function.
+ *
+ * @param session  The session to associate the data with.
+ * @param pdu      The PDU to associate the data with.
+ * @param length   The length of data to transmit.
+ * @param data     The data to transmit.
+ * @param release_func The function to call to de-allocate @p data or @c NULL
+ *                 if the function is not required.
+ * @param app_ptr  A Pointer that the application can provide for when
+ *                 release_func() is called.
+ *
+ * @return @c 1 if addition is successful, else @c 0.
+ */
+int coap_add_data_large_request(coap_session_t *session,
+                                coap_pdu_t *pdu,
+                                size_t length,
+                                const uint8_t *data,
+                                coap_release_large_data_t release_func,
+                                void *app_ptr);
+
+/**
+ * Associates given data with the @p response pdu that is passed as fourth
+ * parameter.
+ *
+ * If all the data can be transmitted in a single PDU, this is functionally
+ * the same as coap_add_data() except @p release_func (if not NULL) will get
+ * invoked after data transmission. The MEDIA_TYPE, MAXAGE and ETAG options may
+ * be added in as appropriate.
+ *
+ * Used by a server request handler to create the response.
+ *
+ * If the data spans multiple PDUs, then the data will get transmitted using
+ * BLOCK2 (response) option with the addition of the SIZE2 and ETAG
+ * options. The underlying library will handle the transmission of the
+ * individual blocks. Once the body of data has been transmitted (or a
+ * failure occurred), then @p release_func (if not NULL) will get called so the
+ * application can de-allocate the @p data based on @p app_data. It is the
+ * responsibility of the application not to change the contents of @p data
+ * until the data transfer has completed.
+ *
+ * There is no need for the application to include the BLOCK2 option in the
+ * @p pdu.
+ *
+ * coap_add_data_large_response() (or the alternative coap_add_data_large*()
+ * functions) must be called only once per PDU and must be the last PDU update
+ * before returning from the request handler function.
+ *
+ * Note: COAP_BLOCK_USE_LIBCOAP must be set by coap_context_set_block_mode()
+ * for libcoap to work correctly when using this function.
+ *
+ * @param resource   The resource the data is associated with.
+ * @param session    The coap session.
+ * @param request    The requesting pdu.
+ * @param response   The response pdu.
+ * @param query      The query taken from the (original) requesting pdu.
+ * @param media_type The format of the data.
+ * @param maxage     The maxmimum life of the data. If @c -1, then there
+ *                   is no maxage.
+ * @param etag       ETag to use if not 0.
+ * @param length     The total length of the data.
+ * @param data       The entire data block to transmit.
+ * @param release_func The function to call to de-allocate @p data or NULL if
+ *                   the function is not required.
+ * @param app_ptr    A Pointer that the application can provide for when
+ *                   release_func() is called.
+ *
+ * @return @c 1 if addition is successful, else @c 0.
+ */
+int
+coap_add_data_large_response(coap_resource_t *resource,
+                             coap_session_t *session,
+                             const coap_pdu_t *request,
+                             coap_pdu_t *response,
+                             const coap_string_t *query,
+                             uint16_t media_type,
+                             int maxage,
+                             uint64_t etag,
+                             size_t length,
+                             const uint8_t *data,
+                             coap_release_large_data_t release_func,
+                             void *app_ptr);
+
+/**
+ * Set the context level CoAP block handling bits for handling RFC7959.
+ * These bits flow down to a session when a session is created and if the peer
+ * does not support something, an appropriate bit may get disabled in the
+ * session block_mode.
+ * The session block_mode then flows down into coap_crcv_t or coap_srcv_t where
+ * again an appropriate bit may get disabled.
+ *
+ * Note: This function must be called before the session is set up.
+ *
+ * Note: COAP_BLOCK_USE_LIBCOAP must be set if libcoap is to do all the
+ * block tracking and requesting, otherwise the application will have to do
+ * all of this work (the default if coap_context_set_block_mode() is not
+ * called).
+ *
+ * @param context        The coap_context_t object.
+ * @param block_mode     Zero or more COAP_BLOCK_ or'd options
+ */
+void coap_context_set_block_mode(coap_context_t *context,
+                                  uint8_t block_mode);
+
+/**
+ * Cancel an observe that is being tracked by the client large receive logic.
+ * (coap_context_set_block_mode() has to be called)
+ * This will trigger the sending of an observe cancel pdu to the server.
+ *
+ * @param session  The session that is being used for the observe.
+ * @param token    The original token used to initiate the observation.
+ * @param message_type The COAP_MESSAGE_ type (NON or CON) to send the observe
+ *                 cancel pdu as.
+ *
+ * @return @c 1 if observe cancel transmission initiation is successful,
+ *         else @c 0.
+ */
+int coap_cancel_observe(coap_session_t *session, coap_binary_t *token,
+                    coap_pdu_type_t message_type);
+
+/**@}*/
+
+#endif /* COAP_BLOCK_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_asn1_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_asn1_internal.h
new file mode 100644
index 00000000000..5bb4e2a8dbe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_asn1_internal.h
@@ -0,0 +1,89 @@
+/*
+ * coap_asn1_internal.h -- ASN.1 functions for libcoap
+ *
+ * Copyright (C) 2020 Jon Shallow <supjps-libcoap@jpshallow.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_asn1_internal.h
+ * @brief COAP ASN.1 internal information
+ */
+
+#ifndef COAP_ASN1_INTERNAL_H_
+#define COAP_ASN1_INTERNAL_H_
+
+
+/**
+ * @defgroup asn1 ASN.1 Support (Internal)
+ * CoAP ASN.1 Structures, Enums and Functions that are not exposed to
+ * applications
+ * @{
+ */
+
+typedef enum {
+  COAP_ASN1_NONE = 0,
+  COAP_ASN1_INTEGER = 2,
+  COAP_ASN1_BITSTRING = 3,
+  COAP_ASN1_OCTETSTRING = 4,
+  COAP_ASN1_IDENTIFIER = 6,
+} coap_asn1_tag_t;
+
+/**
+ * Callback to validate the asn1 tag and data.
+ *
+ * Internal function.
+ *
+ * @param data  The start of the tag and data
+ * @param size  The size of the tag and data
+ *
+ * @return @c 1 if pass, else @c 0 if fail
+ */
+typedef int (*asn1_validate)(const uint8_t *data, size_t size);
+
+/**
+ * Get the asn1 length from the current @p ptr.
+ *
+ * Internal function.
+ *
+ * @param ptr  The current asn.1 object length pointer
+ *
+ * @return The length of the asn.1 object. @p ptr is updated to be after the length.
+ */
+size_t asn1_len(const uint8_t **ptr);
+
+/**
+ * Get the asn1 tag from the current @p ptr.
+ *
+ * Internal function.
+ *
+ * @param ptr  The current asn.1 object tag pointer
+ * @param constructed  1 if current tag is constructed
+ * @param class  The current class of the tag
+ *
+ * @return The tag value.@p ptr is updated to be after the tag.
+ */
+coap_asn1_tag_t asn1_tag_c(const uint8_t **ptr, int *constructed, int *class);
+
+/**
+ * Get the asn1 tag and data from the current @p ptr.
+ *
+ * Internal function.
+ *
+ * @param ltag The tag to look for
+ * @param ptr  The current asn.1 object pointer
+ * @param tlen The remaining size oof the asn.1 data
+ * @param validate Call validate to verify tag data or @c NULL
+ *
+ * @return The asn.1 tag and data or @c NULL if not found
+ */
+coap_binary_t *get_asn1_tag(coap_asn1_tag_t ltag, const uint8_t *ptr,
+                            size_t tlen, asn1_validate validate);
+
+/** @} */
+
+#endif /* COAP_ASN1_INTERNAL_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_async_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_async_internal.h
new file mode 100644
index 00000000000..a23b1c8e697
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_async_internal.h
@@ -0,0 +1,67 @@
+/*
+ * coap_async_internal.h -- state management for asynchronous messages
+ *
+ * Copyright (C) 2010-2021 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_async_internal.h
+ * @brief CoAP async internal information
+ */
+
+#ifndef COAP_ASYNC_INTERNAL_H_
+#define COAP_ASYNC_INTERNAL_H_
+
+#include "coap3/net.h"
+
+#ifndef WITHOUT_ASYNC
+
+/**
+ * @defgroup coap_async_internal Asynchronous Messaging (Internal)
+ * @{
+ * CoAP Async Structures, Enums and Functions that are not exposed to
+ * applications.
+ * A coap_context_t object holds a list of coap_async_t objects that can be
+ * used to generate a separate response in the case a result of a request cannot
+ * be delivered immediately.
+ */
+struct coap_async_t {
+  struct coap_async_t *next; /**< internally used for linking */
+  coap_tick_t delay;    /**< When to delay to before triggering the response
+                             0 indicates never trigger */
+  coap_session_t *session;         /**< transaction session */
+  coap_pdu_t *pdu;                 /**< copy of request pdu */
+  void* appdata;                   /** User definable data pointer */
+};
+
+/**
+ * Checks if there are any pending Async requests - if so, send them off.
+ * Otherewise return the time remaining for the next Async to be triggered
+ * or 0 if nothing to do.
+ *
+ * @param context The current context.
+ * @param now     The current time in ticks.
+ *
+ * @return The tick time before the next Async needs to go, else 0 if
+ *         nothing to do.
+ */
+coap_tick_t coap_check_async(coap_context_t *context, coap_tick_t now);
+
+/**
+ * Removes and frees off all of the async entries for the given context.
+ *
+ * @param context The context to remove all async entries from.
+ */
+void
+coap_delete_all_async(coap_context_t *context);
+
+/** @} */
+
+#endif /*  WITHOUT_ASYNC */
+
+#endif /* COAP_ASYNC_INTERNAL_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_block_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_block_internal.h
new file mode 100644
index 00000000000..b7ad0a554cc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_block_internal.h
@@ -0,0 +1,242 @@
+/*
+ * coap_block_internal.h -- Structures, Enums & Functions that are not
+ * exposed to application programming
+ *
+ * Copyright (C) 2010-2021 Olaf Bergmann <bergmann@tzi.org>
+ * Copyright (C) 2021      Jon Shallow <supjps-libcoap@jpshallow.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_block_internal.h
+ * @brief COAP block internal information
+ */
+
+#ifndef COAP_BLOCK_INTERNAL_H_
+#define COAP_BLOCK_INTERNAL_H_
+
+#include "coap_pdu_internal.h"
+#include "resource.h"
+
+/**
+ * @defgroup block_internal Block (Internal)
+ * Structures, Enums and Functions that are not exposed to applications
+ * @{
+ */
+
+typedef enum {
+  COAP_RECURSE_OK,
+  COAP_RECURSE_NO
+} coap_recurse_t;
+
+struct coap_lg_range {
+  uint32_t begin;
+  uint32_t end;
+};
+
+#define COAP_RBLOCK_CNT 4
+/**
+ * Structure to keep track of received blocks
+ */
+typedef struct coap_rblock_t {
+  uint32_t used;
+  uint32_t retry;
+  struct coap_lg_range range[COAP_RBLOCK_CNT];
+  coap_tick_t last_seen;
+} coap_rblock_t;
+
+/**
+ * Structure to keep track of block1 specific information
+ * (Requests)
+ */
+typedef struct coap_l_block1_t {
+  coap_binary_t *app_token; /**< original PDU token */
+  uint8_t token[8];      /**< last used token */
+  size_t token_length;   /**< length of token */
+  uint32_t count;        /**< the number of packets sent for payload */
+} coap_l_block1_t;
+
+/**
+ * Structure to keep track of block2 specific information
+ * (Responses)
+ */
+typedef struct coap_l_block2_t {
+  coap_resource_t *resource; /**< associated resource */
+  coap_string_t *query;  /**< Associated query for the resource */
+  uint64_t etag;         /**< ETag value */
+  coap_time_t maxage_expire; /**< When this entry expires */
+} coap_l_block2_t;
+
+/**
+ * Structure to hold large body (many blocks) transmission information
+ */
+struct coap_lg_xmit_t {
+  struct coap_lg_xmit_t *next;
+  uint8_t blk_size;      /**< large block transmission size */
+  uint16_t option;       /**< large block transmisson CoAP option */
+  int last_block;        /**< last acknowledged block number */
+  const uint8_t *data;   /**< large data ptr */
+  size_t length;         /**< large data length */
+  size_t offset;         /**< large data next offset to transmit */
+  union {
+    coap_l_block1_t b1;
+    coap_l_block2_t b2;
+  } b;
+  coap_pdu_t pdu;        /**< skeletal PDU */
+  coap_tick_t last_payload; /**< Last time MAX_PAYLOAD was sent or 0 */
+  coap_tick_t last_used; /**< Last time all data sent or 0 */
+  coap_release_large_data_t release_func; /**< large data de-alloc function */
+  void *app_ptr;         /**< applicaton provided ptr for de-alloc function */
+};
+
+/**
+ * Structure to hold large body (many blocks) client receive information
+ */
+struct coap_lg_crcv_t {
+  struct coap_lg_crcv_t *next;
+  uint8_t observe[3];    /**< Observe data (if set) (only 24 bits) */
+  uint8_t observe_length;/**< Length of observe data */
+  uint8_t observe_set;   /**< Set if this is an observe receive PDU */
+  uint8_t etag_set;      /**< Set if ETag is in receive PDU */
+  uint8_t etag_length;   /**< ETag length */
+  uint8_t etag[8];       /**< ETag for block checking */
+  uint16_t content_format; /**< Content format for the set of blocks */
+  uint8_t last_type;     /**< Last request type (CON/NON) */
+  uint8_t initial;       /**< If set, has not been used yet */
+  uint8_t szx;           /**< size of individual blocks */
+  size_t total_len;      /**< Length as indicated by SIZE2 option */
+  coap_binary_t *body_data; /**< Used for re-assembling entire body */
+  coap_binary_t *app_token; /**< app requesting PDU token */
+  uint8_t base_token[8]; /**< established base PDU token */
+  size_t base_token_length; /**< length of token */
+  uint8_t token[8];      /**< last used token */
+  size_t token_length;   /**< length of token */
+  coap_pdu_t pdu;        /**< skeletal PDU */
+  coap_rblock_t rec_blocks; /** < list of received blocks */
+  coap_tick_t last_used; /**< Last time all data sent or 0 */
+  uint16_t block_option; /**< Block option in use */
+};
+
+/**
+ * Structure to hold large body (many blocks) server receive information
+ */
+struct coap_lg_srcv_t {
+  struct coap_lg_srcv_t *next;
+  uint8_t observe[3];    /**< Observe data (if set) (only 24 bits) */
+  uint8_t observe_length;/**< Length of observe data */
+  uint8_t observe_set;   /**< Set if this is an observe receive PDU */
+  uint8_t rtag_set;      /**< Set if RTag is in receive PDU */
+  uint8_t rtag_length;   /**< RTag length */
+  uint8_t rtag[8];       /**< RTag for block checking */
+  uint16_t content_format; /**< Content format for the set of blocks */
+  uint8_t last_type;     /**< Last request type (CON/NON) */
+  uint8_t szx;           /**< size of individual blocks */
+  size_t total_len;      /**< Length as indicated by SIZE1 option */
+  coap_binary_t *body_data; /**< Used for re-assembling entire body */
+  size_t amount_so_far;  /**< Amount of data seen so far */
+  coap_resource_t *resource; /**< associated resource */
+  coap_str_const_t *uri_path; /** set to uri_path if unknown resource */
+  coap_rblock_t rec_blocks; /** < list of received blocks */
+  uint8_t last_token[8]; /**< last used token */
+  size_t last_token_length; /**< length of token */
+  coap_mid_t last_mid;   /**< Last received mid for this set of packets */
+  coap_tick_t last_used; /**< Last time data sent or 0 */
+  uint16_t block_option; /**< Block option in use */
+};
+
+coap_lg_crcv_t * coap_block_new_lg_crcv(coap_session_t *session,
+                                        coap_pdu_t *pdu);
+
+void coap_block_delete_lg_crcv(coap_session_t *session,
+                               coap_lg_crcv_t *lg_crcv);
+
+coap_tick_t coap_block_check_lg_crcv_timeouts(coap_session_t *session,
+                                              coap_tick_t now);
+
+void coap_block_delete_lg_srcv(coap_session_t *session,
+                               coap_lg_srcv_t *lg_srcv);
+
+coap_tick_t coap_block_check_lg_srcv_timeouts(coap_session_t *session,
+                                              coap_tick_t now);
+
+int coap_handle_request_send_block(coap_session_t *session,
+                                   coap_pdu_t *pdu,
+                                   coap_pdu_t *response,
+                                   coap_resource_t *resource,
+                                   coap_string_t *query);
+
+int coap_handle_request_put_block(coap_context_t *context,
+                                  coap_session_t *session,
+                                  coap_pdu_t *pdu,
+                                  coap_pdu_t *response,
+                                  coap_resource_t *resource,
+                                  coap_string_t *uri_path,
+                                  coap_opt_t *observe,
+                                  coap_string_t *query,
+                                  coap_method_handler_t h,
+                                  int *added_block);
+
+int coap_handle_response_send_block(coap_session_t *session, coap_pdu_t *rcvd);
+
+int coap_handle_response_get_block(coap_context_t *context,
+                                   coap_session_t *session,
+                                   coap_pdu_t *sent,
+                                   coap_pdu_t *rcvd,
+                                   coap_recurse_t recursive);
+
+void coap_block_delete_lg_xmit(coap_session_t *session,
+                               coap_lg_xmit_t *lg_xmit);
+
+coap_tick_t coap_block_check_lg_xmit_timeouts(coap_session_t *session,
+                                              coap_tick_t now);
+
+/**
+ * The function that does all the work for the coap_add_data_large*()
+ * functions.
+ *
+ * @param session  The session to associate the data with.
+ * @param pdu      The PDU to associate the data with.
+ * @param resource The resource to associate the data with (BLOCK2).
+ * @param query    The query to associate the data with (BLOCK2).
+ * @param maxage   The maxmimum life of the data. If @c -1, then there
+ *                 is no maxage (BLOCK2).
+ * @param etag     ETag to use if not 0 (BLOCK2).
+ * @param length   The length of data to transmit.
+ * @param data     The data to transmit.
+ * @param release_func The function to call to de-allocate @p data or NULL if
+ *                 the function is not required.
+ * @param app_ptr  A Pointer that the application can provide for when
+ *                 release_func() is called.
+ *
+ * @return @c 1 if transmission initiation is successful, else @c 0.
+ */
+int coap_add_data_large_internal(coap_session_t *session,
+                        coap_pdu_t *pdu,
+                        coap_resource_t *resource,
+                        const coap_string_t *query,
+                        int maxage,
+                        uint64_t etag,
+                        size_t length,
+                        const uint8_t *data,
+                        coap_release_large_data_t release_func,
+                        void *app_ptr);
+
+/**
+ * The function checks that the code in a newly formed lg_xmit created by
+ * coap_add_data_large_response() is updated.
+ *
+ * @param session  The session
+ * @param response The response PDU to to check
+ * @param resource The requested resource
+ * @param query    The requested query
+ */
+void coap_check_code_lg_xmit(coap_session_t *session, coap_pdu_t *response,
+                             coap_resource_t *resource, coap_string_t *query);
+
+/** @} */
+
+#endif /* COAP_BLOCK_INTERNAL_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_cache.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_cache.h
new file mode 100644
index 00000000000..a8d2fd7a84e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_cache.h
@@ -0,0 +1,232 @@
+/* coap_cache.h -- Caching of CoAP requests
+*
+* Copyright (C) 2020 Olaf Bergmann <bergmann@tzi.org>
+*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+* This file is part of the CoAP library libcoap. Please see
+* README for terms of use.
+*/
+
+/**
+ * @file coap_cache.h
+ * @brief Provides a simple cache request storage for CoAP requests
+ */
+
+#ifndef COAP_CACHE_H_
+#define COAP_CACHE_H_
+
+#include "coap_forward_decls.h"
+
+/**
+ * @defgroup cache Cache Support
+ * API functions for CoAP Caching
+ * @{
+ */
+
+/**
+ * Callback to free off the app data when the cache-entry is
+ * being deleted / freed off.
+ *
+ * @param data  The app data to be freed off.
+ */
+typedef void (*coap_cache_app_data_free_callback_t)(void *data);
+
+typedef enum coap_cache_session_based_t {
+  COAP_CACHE_NOT_SESSION_BASED,
+  COAP_CACHE_IS_SESSION_BASED
+} coap_cache_session_based_t;
+
+typedef enum coap_cache_record_pdu_t {
+  COAP_CACHE_NOT_RECORD_PDU,
+  COAP_CACHE_RECORD_PDU
+} coap_cache_record_pdu_t;
+
+/**
+ * Calculates a cache-key for the given CoAP PDU. See
+ * https://tools.ietf.org/html/rfc7252#section-5.6
+ * for an explanation of CoAP cache keys.
+ *
+ * Specific CoAP options can be removed from the cache-key.  Examples of
+ * this are the BLOCK1 and BLOCK2 options - which make no real sense including
+ * them in a client or server environment, but should be included in a proxy
+ * caching environment where things are cached on a per block basis.
+ * This is done globally by calling the coap_cache_ignore_options()
+ * function.
+ *
+ * NOTE: The returned cache-key needs to be freed off by the caller by
+ * calling coap_cache_delete_key().
+ *
+ * @param session The session to add into cache-key if @p session_based
+ *                is set.
+ * @param pdu     The CoAP PDU for which a cache-key is to be
+ *                calculated.
+ * @param session_based COAP_CACHE_IS_SESSION_BASED if session based
+ *                      cache-key, else COAP_CACHE_NOT_SESSION_BASED.
+ *
+ * @return        The returned cache-key or @c NULL if failure.
+ */
+coap_cache_key_t *coap_cache_derive_key(const coap_session_t *session,
+                                        const coap_pdu_t *pdu,
+                                   coap_cache_session_based_t session_based);
+
+/**
+ * Calculates a cache-key for the given CoAP PDU. See
+ * https://tools.ietf.org/html/rfc7252#section-5.6
+ * for an explanation of CoAP cache keys.
+ *
+ * Specific CoAP options can be removed from the cache-key.  Examples of
+ * this are the BLOCK1 and BLOCK2 options - which make no real sense including
+ * them in a client or server environment, but should be included in a proxy
+ * caching environment where things are cached on a per block basis.
+ * This is done individually by specifying @p cache_ignore_count and
+ * @p cache_ignore_options .
+ *
+ * NOTE: The returned cache-key needs to be freed off by the caller by
+ * calling coap_cache_delete_key().
+ *
+ * @param session The session to add into cache-key if @p session_based
+ *                is set.
+ * @param pdu     The CoAP PDU for which a cache-key is to be
+ *                calculated.
+ * @param session_based COAP_CACHE_IS_SESSION_BASED if session based
+ *                      cache-key, else COAP_CACHE_NOT_SESSION_BASED.
+ * @param ignore_options The array of options to ignore.
+ * @param ignore_count   The number of options to ignore.
+ *
+ * @return        The returned cache-key or @c NULL if failure.
+ */
+coap_cache_key_t *coap_cache_derive_key_w_ignore(const coap_session_t *session,
+                                      const coap_pdu_t *pdu,
+                                      coap_cache_session_based_t session_based,
+                                      const uint16_t *ignore_options,
+                                      size_t ignore_count);
+
+/**
+ * Delete the cache-key.
+ *
+ * @param cache_key The cache-key to delete.
+ */
+void coap_delete_cache_key(coap_cache_key_t *cache_key);
+
+/**
+ * Define the CoAP options that are not to be included when calculating
+ * the cache-key. Options that are defined as Non-Cache and the Observe
+ * option are always ignored.
+ *
+ * @param context   The context to save the ignored options information in.
+ * @param options   The array of options to ignore.
+ * @param count     The number of options to ignore.  Use 0 to reset the
+ *                  options matching.
+ *
+ * @return          @return @c 1 if successful, else @c 0.
+ */
+int coap_cache_ignore_options(coap_context_t *context,
+                              const uint16_t *options, size_t count);
+
+/**
+ * Create a new cache-entry hash keyed by cache-key derived from the PDU.
+ *
+ * If @p session_based is set, then this cache-entry will get deleted when
+ * the session is freed off.
+ * If @p record_pdu is set, then the copied PDU will get freed off when
+ * this cache-entry is deleted.
+ *
+ * The cache-entry is maintained on a context hash list.
+ *
+ * @param session   The session to use to derive the context from.
+ * @param pdu       The pdu to use to generate the cache-key.
+ * @param record_pdu COAP_CACHE_RECORD_PDU if to take a copy of the PDU for
+ *                   later use, else COAP_CACHE_NOT_RECORD_PDU.
+ * @param session_based COAP_CACHE_IS_SESSION_BASED if to associate this
+ *                      cache-entry with the the session (which is embedded
+ *                      in the cache-entry), else COAP_CACHE_NOT_SESSION_BASED.
+ * @param idle_time Idle time in seconds before cache-entry is expired.
+ *                  If set to 0, it does not expire (but will get
+ *                  deleted if the session is deleted and it is session_based).
+ *
+ * @return          The returned cache-key or @c NULL if failure.
+ */
+coap_cache_entry_t *coap_new_cache_entry(coap_session_t *session,
+                                 const coap_pdu_t *pdu,
+                                 coap_cache_record_pdu_t record_pdu,
+                                 coap_cache_session_based_t session_based,
+                                 unsigned int idle_time);
+
+/**
+ * Remove a cache-entry from the hash list and free off all the appropriate
+ * contents apart from app_data.
+ *
+ * @param context     The context to use.
+ * @param cache_entry The cache-entry to remove.
+ */
+void coap_delete_cache_entry(coap_context_t *context,
+                             coap_cache_entry_t *cache_entry);
+
+/**
+ * Searches for a cache-entry identified by @p cache_key. This
+ * function returns the corresponding cache-entry or @c NULL
+ * if not found.
+ *
+ * @param context    The context to use.
+ * @param cache_key  The cache-key to get the hashed coap-entry.
+ *
+ * @return The cache-entry for @p cache_key or @c NULL if not found.
+ */
+coap_cache_entry_t *coap_cache_get_by_key(coap_context_t *context,
+                                          const coap_cache_key_t *cache_key);
+
+/**
+ * Searches for a cache-entry corresponding to @p pdu. This
+ * function returns the corresponding cache-entry or @c NULL if not
+ * found.
+ *
+ * @param session    The session to use.
+ * @param pdu        The CoAP request to search for.
+ * @param session_based COAP_CACHE_IS_SESSION_BASED if session based
+ *                     cache-key to be used, else COAP_CACHE_NOT_SESSION_BASED.
+ *
+ * @return The cache-entry for @p request or @c NULL if not found.
+ */
+coap_cache_entry_t *coap_cache_get_by_pdu(coap_session_t *session,
+                                          const coap_pdu_t *pdu,
+                                   coap_cache_session_based_t session_based);
+
+/**
+ * Returns the PDU information stored in the @p coap_cache entry.
+ *
+ * @param cache_entry The CoAP cache entry.
+ *
+ * @return The PDU information stored in the cache_entry or NULL
+ *         if the PDU was not initially copied.
+ */
+const coap_pdu_t *coap_cache_get_pdu(const coap_cache_entry_t *cache_entry);
+
+/**
+ * Stores @p data with the given cache entry. This function
+ * overwrites any value that has previously been stored with @p
+ * cache_entry.
+ *
+ * @param cache_entry The CoAP cache entry.
+ * @param data The data pointer to store with wih the cache entry. Note that
+ *             this data must be valid during the lifetime of @p cache_entry.
+ * @param callback The callback to call to free off this data when the
+ *                 cache-entry is deleted, or @c NULL if not required.
+ */
+void coap_cache_set_app_data(coap_cache_entry_t *cache_entry, void *data,
+                             coap_cache_app_data_free_callback_t callback);
+
+/**
+ * Returns any application-specific data that has been stored with @p
+ * cache_entry using the function coap_cache_set_app_data(). This function will
+ * return @c NULL if no data has been stored.
+ *
+ * @param cache_entry The CoAP cache entry.
+ *
+ * @return The data pointer previously stored or @c NULL if no data stored.
+ */
+void *coap_cache_get_app_data(const coap_cache_entry_t *cache_entry);
+
+/** @} */
+
+#endif  /* COAP_CACHE_H */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_cache_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_cache_internal.h
new file mode 100644
index 00000000000..29c0756875c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_cache_internal.h
@@ -0,0 +1,111 @@
+/*
+ * coap_cache_internal.h -- Cache functions for libcoap
+ *
+ * Copyright (C) 2019--2020 Olaf Bergmann <bergmann@tzi.org> and others
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_cache_internal.h
+ * @brief COAP cache internal information
+ */
+
+#ifndef COAP_CACHE_INTERNAL_H_
+#define COAP_CACHE_INTERNAL_H_
+
+#include "coap_io.h"
+
+/**
+ * @defgroup cache_internal Cache Support (Internal)
+ * CoAP Cache Structures, Enums and Functions that are not exposed to
+ * applications
+ * @{
+ */
+
+/* Holds a digest in binary typically sha256 except for notls */
+typedef struct coap_digest_t {
+  uint8_t key[32];
+} coap_digest_t;
+
+struct coap_cache_key_t {
+  uint8_t key[32];
+};
+
+struct coap_cache_entry_t {
+  UT_hash_handle hh;
+  coap_cache_key_t *cache_key;
+  coap_session_t *session;
+  coap_pdu_t *pdu;
+  void* app_data;
+  coap_tick_t expire_ticks;
+  unsigned int idle_timeout;
+  coap_cache_app_data_free_callback_t callback;
+};
+
+/**
+ * Expire coap_cache_entry_t entries
+ *
+ * Internal function.
+ *
+ * @param context The context holding the coap-entries to exire
+ */
+void coap_expire_cache_entries(coap_context_t *context);
+
+typedef void coap_digest_ctx_t;
+
+/**
+ * Initialize a coap_digest
+ *
+ * Internal function.
+ *
+ * @return          The digest context or @c NULL if failure.
+ */
+coap_digest_ctx_t *coap_digest_setup(void);
+
+/**
+ * Free off coap_digest_ctx_t. Always done by
+ * coap_digest_final()
+ *
+ * Internal function.
+ *
+ * @param digest_ctx The coap_digest context.
+ */
+void coap_digest_free(coap_digest_ctx_t *digest_ctx);
+
+/**
+ * Update the coap_digest information with the next chunk of data
+ *
+ * Internal function.
+ *
+ * @param digest_ctx The coap_digest context.
+ * @param data       Pointer to data.
+ * @param data_len   Number of bytes.
+ *
+ * @return           @c 1 success, @c 0 failure.
+ */
+int coap_digest_update(coap_digest_ctx_t *digest_ctx,
+                      const uint8_t *data,
+                      size_t data_len
+                      );
+
+/**
+ * Finalize the coap_digest information  into the provided
+ * @p digest_buffer.
+ *
+ * Internal function.
+ *
+ * @param digest_ctx    The coap_digest context.
+ * @param digest_buffer Pointer to digest buffer to update
+ *
+ * @return              @c 1 success, @c 0 failure.
+ */
+int coap_digest_final(coap_digest_ctx_t *digest_ctx,
+                      coap_digest_t *digest_buffer);
+
+/** @} */
+
+#endif /* COAP_CACHE_INTERNAL_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_debug.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_debug.h
new file mode 100644
index 00000000000..f8f70f64495
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_debug.h
@@ -0,0 +1,247 @@
+/*
+ * coap_debug.h -- debug utilities
+ *
+ * Copyright (C) 2010-2011,2014 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_DEBUG_H_
+#define COAP_DEBUG_H_
+
+/**
+ * @defgroup logging Logging Support
+ * API functions for logging support
+ * @{
+ */
+
+#ifndef COAP_DEBUG_FD
+/**
+ * Used for output for @c LOG_DEBUG to @c LOG_ERR.
+ */
+#define COAP_DEBUG_FD stdout
+#endif
+
+#ifndef COAP_ERR_FD
+/**
+ * Used for output for @c LOG_CRIT to @c LOG_EMERG.
+ */
+#define COAP_ERR_FD stderr
+#endif
+
+#ifdef HAVE_SYSLOG_H
+#include <syslog.h>
+/**
+ * Logging type.  One of LOG_* from @b syslog.
+ */
+typedef short coap_log_t;
+/*
+   LOG_DEBUG+2 gives ciphers in GnuTLS
+   Use COAP_LOG_CIPHERS to output Cipher Info in OpenSSL etc.
+ */
+#define COAP_LOG_CIPHERS (LOG_DEBUG+2)
+#else /* !HAVE_SYSLOG_H */
+/** Pre-defined log levels akin to what is used in \b syslog
+    with LOG_CIPHERS added. */
+
+#if !defined(RIOT_VERSION)
+typedef enum {
+  LOG_EMERG=0, /**< Emergency */
+  LOG_ALERT,   /**< Alert */
+  LOG_CRIT,    /**< Critical */
+  LOG_ERR,     /**< Error */
+  LOG_WARNING, /**< Warning */
+  LOG_NOTICE,  /**< Notice */
+  LOG_INFO,    /**< Information */
+  LOG_DEBUG,   /**< Debug */
+  COAP_LOG_CIPHERS=LOG_DEBUG+2 /**< CipherInfo */
+} coap_log_t;
+#else /* RIOT_VERSION */
+/* RIOT defines a subset of the syslog levels in log.h with different
+ * numeric values. The remaining levels are defined here. Note that
+ * output granularity differs from what would be expected when
+ * adhering to the syslog levels.
+ */
+#include <log.h>
+typedef short coap_log_t;
+#define LOG_EMERG  (0)
+#define LOG_ALERT  (1)
+#define LOG_CRIT   (2)
+#define LOG_ERR    (3)
+/*  LOG_WARNING    (4) */
+#define LOG_NOTICE (5)
+/*  LOG_INFO       (6) */
+/*  LOG_DEBUG      (7) */
+#define COAP_LOG_CIPHERS (9)
+#endif /* RIOT_VERSION */
+
+#endif /* !HAVE_SYSLOG_H */
+
+/**
+ * Get the current logging level.
+ *
+ * @return One of the LOG_* values.
+ */
+coap_log_t coap_get_log_level(void);
+
+/**
+ * Sets the log level to the specified value.
+ *
+ * @param level One of the LOG_* values.
+ */
+void coap_set_log_level(coap_log_t level);
+
+/**
+ * Logging callback handler definition.
+ *
+ * @param level One of the LOG_* values.
+ * @param message Zero-terminated string message to log.
+ */
+typedef void (*coap_log_handler_t) (coap_log_t level, const char *message);
+
+/**
+ * Add a custom log callback handler.
+ *
+ * @param handler The logging handler to use or @p NULL to use default handler.
+ */
+void coap_set_log_handler(coap_log_handler_t handler);
+
+/**
+ * Get the library package name.
+ *
+ * @return Zero-terminated string with the name of this library.
+ */
+const char *coap_package_name(void);
+
+/**
+ * Get the library package version.
+ *
+ * @return Zero-terminated string with the library version.
+ */
+const char *coap_package_version(void);
+
+/**
+ * Writes the given text to @c COAP_ERR_FD (for @p level <= @c LOG_CRIT) or @c
+ * COAP_DEBUG_FD (for @p level >= @c LOG_ERR). The text is output only when
+ * @p level is below or equal to the log level that set by coap_set_log_level().
+ *
+ * Internal function.
+ *
+ * @param level One of the LOG_* values.
+ & @param format The format string to use.
+ */
+#if (defined(__GNUC__))
+void coap_log_impl(coap_log_t level,
+              const char *format, ...) __attribute__ ((format(printf, 2, 3)));
+#else
+void coap_log_impl(coap_log_t level, const char *format, ...);
+#endif
+
+#ifndef coap_log
+/**
+ * Logging function.
+ * Writes the given text to @c COAP_ERR_FD (for @p level <= @c LOG_CRIT) or @c
+ * COAP_DEBUG_FD (for @p level >= @c LOG_ERR). The text is output only when
+ * @p level is below or equal to the log level that set by coap_set_log_level().
+ *
+ * @param level One of the LOG_* values.
+ */
+#define coap_log(level, ...) do { \
+  if ((int)((level))<=(int)coap_get_log_level()) \
+     coap_log_impl((level), __VA_ARGS__); \
+} while(0)
+#endif
+
+#include "pdu.h"
+
+/**
+ * Defines the output mode for the coap_show_pdu() function.
+ *
+ * @param use_fprintf @p 1 if the output is to use fprintf() (the default)
+ *                    @p 0 if the output is to use coap_log().
+ */
+void coap_set_show_pdu_output(int use_fprintf);
+
+/**
+ * Display the contents of the specified @p pdu.
+ * Note: The output method of coap_show_pdu() is dependent on the setting of
+ * coap_set_show_pdu_output().
+ *
+ * @param level The required minimum logging level.
+ * @param pdu The PDU to decode.
+ */
+void coap_show_pdu(coap_log_t level, const coap_pdu_t *pdu);
+
+/**
+ * Display the current (D)TLS library linked with and built for version.
+ *
+ * @param level The required minimum logging level.
+ */
+void coap_show_tls_version(coap_log_t level);
+
+/**
+ * Build a string containing the current (D)TLS library linked with and
+ * built for version.
+ *
+ * @param buffer The buffer to put the string into.
+ * @param bufsize The size of the buffer to put the string into.
+ *
+ * @return A pointer to the provided buffer.
+ */
+char *coap_string_tls_version(char *buffer, size_t bufsize);
+
+/**
+ * Build a string containing the current (D)TLS library support
+ *
+ * @param buffer The buffer to put the string into.
+ * @param bufsize The size of the buffer to put the string into.
+ *
+ * @return A pointer to the provided buffer.
+ */
+char *coap_string_tls_support(char *buffer, size_t bufsize);
+
+/**
+ * Print the address into the defined buffer.
+ *
+ * Internal Function.
+ *
+ * @param address The address to print.
+ * @param buffer The buffer to print into.
+ * @param size The size of the buffer to print into.
+ *
+ * @return The amount written into the buffer.
+ */
+size_t coap_print_addr(const coap_address_t *address,
+                       unsigned char *buffer, size_t size);
+
+/** @} */
+
+/**
+ * Set the packet loss level for testing.  This can be in one of two forms.
+ *
+ * Percentage : 0% to 100%.  Use the specified probability.
+ * 0% is send all packets, 100% is drop all packets.
+ *
+ * List: A comma separated list of numbers or number ranges that are the
+ * packets to drop.
+ *
+ * @param loss_level The defined loss level (percentage or list).
+ *
+ * @return @c 1 If loss level set, @c 0 if there is an error.
+ */
+int coap_debug_set_packet_loss(const char *loss_level);
+
+/**
+ * Check to see whether a packet should be sent or not.
+ *
+ * Internal function
+ *
+ * @return @c 1 if packet is to be sent, @c 0 if packet is to be dropped.
+ */
+int coap_debug_send_packet(void);
+
+
+#endif /* COAP_DEBUG_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_dtls.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_dtls.h
new file mode 100644
index 00000000000..fc30445431d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_dtls.h
@@ -0,0 +1,485 @@
+/*
+ * coap_dtls.h -- (Datagram) Transport Layer Support for libcoap
+ *
+ * Copyright (C) 2016 Olaf Bergmann <bergmann@tzi.org>
+ * Copyright (C) 2017 Jean-Claude Michelou <jcm@spinetix.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_DTLS_H_
+#define COAP_DTLS_H_
+
+#include "coap_time.h"
+#include "str.h"
+
+/**
+ * @defgroup dtls DTLS Support
+ * API functions for interfacing with DTLS libraries.
+ * @{
+ */
+
+typedef struct coap_dtls_pki_t coap_dtls_pki_t;
+
+#ifndef COAP_DTLS_HINT_LENGTH
+#define COAP_DTLS_HINT_LENGTH 128
+#endif
+#ifndef COAP_DTLS_MAX_PSK_IDENTITY
+#define COAP_DTLS_MAX_PSK_IDENTITY 64
+#endif
+#ifndef COAP_DTLS_MAX_PSK
+#define COAP_DTLS_MAX_PSK 64
+#endif
+
+typedef enum coap_dtls_role_t {
+  COAP_DTLS_ROLE_CLIENT, /**< Internal function invoked for client */
+  COAP_DTLS_ROLE_SERVER  /**< Internal function invoked for server */
+} coap_dtls_role_t;
+
+#define COAP_DTLS_RPK_CERT_CN "RPK"
+
+/**
+ * Check whether DTLS is available.
+ *
+ * @return @c 1 if support for DTLS is enabled, or @c 0 otherwise.
+ */
+int coap_dtls_is_supported(void);
+
+/**
+ * Check whether TLS is available.
+ *
+ * @return @c 1 if support for TLS is enabled, or @c 0 otherwise.
+ */
+int coap_tls_is_supported(void);
+
+typedef enum coap_tls_library_t {
+  COAP_TLS_LIBRARY_NOTLS = 0, /**< No DTLS library */
+  COAP_TLS_LIBRARY_TINYDTLS,  /**< Using TinyDTLS library */
+  COAP_TLS_LIBRARY_OPENSSL,   /**< Using OpenSSL library */
+  COAP_TLS_LIBRARY_GNUTLS,    /**< Using GnuTLS library */
+  COAP_TLS_LIBRARY_MBEDTLS,   /**< Using Mbed TLS library */
+} coap_tls_library_t;
+
+/**
+ * The structure used for returning the underlying (D)TLS library
+ * information.
+ */
+typedef struct coap_tls_version_t {
+  uint64_t version; /**< (D)TLS runtime Library Version */
+  coap_tls_library_t type; /**< Library type. One of COAP_TLS_LIBRARY_* */
+  uint64_t built_version; /**< (D)TLS Built against Library Version */
+} coap_tls_version_t;
+
+/**
+ * Determine the type and version of the underlying (D)TLS library.
+ *
+ * @return The version and type of library libcoap was compiled against.
+ */
+coap_tls_version_t *coap_get_tls_library_version(void);
+
+/**
+ * Additional Security setup handler that can be set up by
+ * coap_context_set_pki().
+ * Invoked when libcoap has done the validation checks at the TLS level,
+ * but the application needs to do some additional checks/changes/updates.
+ *
+ * @param tls_session The security session definition - e.g. SSL * for OpenSSL.
+ *                    NULL if server callback.
+ *                    This will be dependent on the underlying TLS library -
+ *                    see coap_get_tls_library_version()
+ * @param setup_data A structure containing setup data originally passed into
+ *                   coap_context_set_pki() or coap_new_client_session_pki().
+ *
+ * @return @c 1 if successful, else @c 0.
+ */
+typedef int (*coap_dtls_security_setup_t)(void* tls_session,
+                                          coap_dtls_pki_t *setup_data);
+
+/**
+ * CN Validation callback that can be set up by coap_context_set_pki().
+ * Invoked when libcoap has done the validation checks at the TLS level,
+ * but the application needs to check that the CN is allowed.
+ * CN is the SubjectAltName in the cert, if not present, then the leftmost
+ * Common Name (CN) component of the subject name.
+ * NOTE: If using RPK, then the Public Key does not contain a CN, but the
+ * content of COAP_DTLS_RPK_CERT_CN is presented for the @p cn parameter.
+ *
+ * @param cn  The determined CN from the certificate
+ * @param asn1_public_cert  The ASN.1 DER encoded X.509 certificate
+ * @param asn1_length  The ASN.1 length
+ * @param coap_session  The CoAP session associated with the certificate update
+ * @param depth  Depth in cert chain.  If 0, then client cert, else a CA
+ * @param validated  TLS layer can find no issues if 1
+ * @param arg  The same as was passed into coap_context_set_pki()
+ *             in setup_data->cn_call_back_arg
+ *
+ * @return @c 1 if accepted, else @c 0 if to be rejected.
+ */
+typedef int (*coap_dtls_cn_callback_t)(const char *cn,
+             const uint8_t *asn1_public_cert,
+             size_t asn1_length,
+             coap_session_t *coap_session,
+             unsigned int depth,
+             int validated,
+             void *arg);
+
+/**
+ * The enum used for determining the provided PKI ASN.1 (DER) Private Key
+ * formats.
+ */
+typedef enum coap_asn1_privatekey_type_t {
+  COAP_ASN1_PKEY_NONE,     /**< NONE */
+  COAP_ASN1_PKEY_RSA,      /**< RSA type */
+  COAP_ASN1_PKEY_RSA2,     /**< RSA2 type */
+  COAP_ASN1_PKEY_DSA,      /**< DSA type */
+  COAP_ASN1_PKEY_DSA1,     /**< DSA1 type */
+  COAP_ASN1_PKEY_DSA2,     /**< DSA2 type */
+  COAP_ASN1_PKEY_DSA3,     /**< DSA3 type */
+  COAP_ASN1_PKEY_DSA4,     /**< DSA4 type */
+  COAP_ASN1_PKEY_DH,       /**< DH type */
+  COAP_ASN1_PKEY_DHX,      /**< DHX type */
+  COAP_ASN1_PKEY_EC,       /**< EC type */
+  COAP_ASN1_PKEY_HMAC,     /**< HMAC type */
+  COAP_ASN1_PKEY_CMAC,     /**< CMAC type */
+  COAP_ASN1_PKEY_TLS1_PRF, /**< TLS1_PRF type */
+  COAP_ASN1_PKEY_HKDF      /**< HKDF type */
+} coap_asn1_privatekey_type_t;
+
+/**
+ * The enum used for determining the PKI key formats.
+ */
+typedef enum coap_pki_key_t {
+  COAP_PKI_KEY_PEM = 0,        /**< The PKI key type is PEM file */
+  COAP_PKI_KEY_ASN1,           /**< The PKI key type is ASN.1 (DER) buffer */
+  COAP_PKI_KEY_PEM_BUF,        /**< The PKI key type is PEM buffer */
+  COAP_PKI_KEY_PKCS11,         /**< The PKI key type is PKCS11 (DER) */
+} coap_pki_key_t;
+
+/**
+ * The structure that holds the PKI PEM definitions.
+ */
+typedef struct coap_pki_key_pem_t {
+  const char *ca_file;       /**< File location of Common CA in PEM format */
+  const char *public_cert;   /**< File location of Public Cert */
+  const char *private_key;   /**< File location of Private Key in PEM format */
+} coap_pki_key_pem_t;
+
+/**
+ * The structure that holds the PKI PEM buffer definitions.
+ * The certificates and private key data must be in PEM format.
+ *
+ * Note:  The Certs and Key should be NULL terminated strings for
+ * performance reasons (to save a potential buffer copy) and the length include
+ * this NULL terminator. It is not a requirement to have the NULL terminator
+ * though and the length must then reflect the actual data size.
+ */
+typedef struct coap_pki_key_pem_buf_t {
+  const uint8_t *ca_cert;     /**< PEM buffer Common CA Cert */
+  const uint8_t *public_cert; /**< PEM buffer Public Cert, or Public Key if RPK */
+  const uint8_t *private_key; /**< PEM buffer Private Key
+                                  If RPK and 'EC PRIVATE KEY' this can be used
+                                  for both the public_cert and private_key */
+  size_t ca_cert_len;         /**< PEM buffer CA Cert length */
+  size_t public_cert_len;     /**< PEM buffer Public Cert length */
+  size_t private_key_len;     /**< PEM buffer Private Key length */
+} coap_pki_key_pem_buf_t;
+
+/**
+ * The structure that holds the PKI ASN.1 (DER) definitions.
+ */
+typedef struct coap_pki_key_asn1_t {
+  const uint8_t *ca_cert;     /**< ASN1 (DER) Common CA Cert */
+  const uint8_t *public_cert; /**< ASN1 (DER) Public Cert, or Public Key if RPK */
+  const uint8_t *private_key; /**< ASN1 (DER) Private Key */
+  size_t ca_cert_len;         /**< ASN1 CA Cert length */
+  size_t public_cert_len;     /**< ASN1 Public Cert length */
+  size_t private_key_len;     /**< ASN1 Private Key length */
+  coap_asn1_privatekey_type_t private_key_type; /**< Private Key Type */
+} coap_pki_key_asn1_t;
+
+/**
+ * The structure that holds the PKI PKCS11 definitions.
+ */
+typedef struct coap_pki_key_pkcs11_t {
+  const char *ca;            /**< pkcs11: URI for Common CA Certificate */
+  const char *public_cert;   /**< pkcs11: URI for Public Cert */
+  const char *private_key;   /**< pkcs11: URI for Private Key */
+  const char *user_pin;      /**< User pin to access PKCS11.  If NULL, then
+                                  pin-value= parameter must be set in
+                                  pkcs11: URI as a query. */
+} coap_pki_key_pkcs11_t;
+
+/**
+ * The structure that holds the PKI key information.
+ */
+typedef struct coap_dtls_key_t {
+  coap_pki_key_t key_type;          /**< key format type */
+  union {
+    coap_pki_key_pem_t pem;          /**< for PEM file keys */
+    coap_pki_key_pem_buf_t pem_buf;  /**< for PEM memory keys */
+    coap_pki_key_asn1_t asn1;        /**< for ASN.1 (DER) memory keys */
+    coap_pki_key_pkcs11_t pkcs11;    /**< for PKCS11 keys */
+  } key;
+} coap_dtls_key_t;
+
+/**
+ * Server Name Indication (SNI) Validation callback that can be set up by
+ * coap_context_set_pki().
+ * Invoked if the SNI is not previously seen and prior to sending a certificate
+ * set back to the client so that the appropriate certificate set can be used
+ * based on the requesting SNI.
+ *
+ * @param sni  The requested SNI
+ * @param arg  The same as was passed into coap_context_set_pki()
+ *             in setup_data->sni_call_back_arg
+ *
+ * @return New set of certificates to use, or @c NULL if SNI is to be rejected.
+ */
+typedef coap_dtls_key_t *(*coap_dtls_pki_sni_callback_t)(const char *sni,
+             void* arg);
+
+
+#define COAP_DTLS_PKI_SETUP_VERSION 1 /**< Latest PKI setup version */
+
+/**
+ * The structure used for defining the PKI setup data to be used.
+ */
+struct coap_dtls_pki_t {
+  uint8_t version; /** Set to COAP_DTLS_PKI_SETUP_VERSION
+                       to support this version of the struct */
+
+  /* Options to enable different TLS functionality in libcoap */
+  uint8_t verify_peer_cert;        /**< 1 if peer cert is to be verified */
+  uint8_t check_common_ca;         /**< 1 if peer cert is to be signed by
+                                    * the same CA as the local cert */
+  uint8_t allow_self_signed;       /**< 1 if self-signed certs are allowed.
+                                    *     Ignored if check_common_ca set */
+  uint8_t allow_expired_certs;     /**< 1 if expired certs are allowed */
+  uint8_t cert_chain_validation;   /**< 1 if to check cert_chain_verify_depth */
+  uint8_t cert_chain_verify_depth; /**< recommended depth is 3 */
+  uint8_t check_cert_revocation;   /**< 1 if revocation checks wanted */
+  uint8_t allow_no_crl;            /**< 1 ignore if CRL not there */
+  uint8_t allow_expired_crl;       /**< 1 if expired crl is allowed */
+  uint8_t allow_bad_md_hash;      /**< 1 if unsupported MD hashes are allowed */
+  uint8_t allow_short_rsa_length; /**< 1 if small RSA keysizes are allowed */
+  uint8_t is_rpk_not_cert;        /**< 1 is RPK instead of Public Certificate.
+                                   *     If set, PKI key format type cannot be
+                                   *     COAP_PKI_KEY_PEM */
+  uint8_t reserved[3];             /**< Reserved - must be set to 0 for
+                                        future compatibility */
+                                   /* Size of 3 chosen to align to next
+                                    * parameter, so if newly defined option
+                                    * it can use one of the reserverd slot so
+                                    * no need to change
+                                    * COAP_DTLS_PKI_SETUP_VERSION and just
+                                    * decrement the reserved[] count.
+                                    */
+
+  /** CN check callback function.
+   * If not NULL, is called when the TLS connection has passed the configured
+   * TLS options above for the application to verify if the CN is valid.
+   */
+  coap_dtls_cn_callback_t validate_cn_call_back;
+  void *cn_call_back_arg;  /**< Passed in to the CN callback function */
+
+  /** SNI check callback function.
+   * If not @p NULL, called if the SNI is not previously seen and prior to
+   * sending a certificate set back to the client so that the appropriate
+   * certificate set can be used based on the requesting SNI.
+   */
+  coap_dtls_pki_sni_callback_t validate_sni_call_back;
+  void *sni_call_back_arg;  /**< Passed in to the sni callback function */
+
+  /** Additional Security callback handler that is invoked when libcoap has
+   * done the standard, defined validation checks at the TLS level,
+   * If not @p NULL, called from within the TLS Client Hello connection
+   * setup.
+   */
+  coap_dtls_security_setup_t additional_tls_setup_call_back;
+
+  char* client_sni;    /**<  If not NULL, SNI to use in client TLS setup.
+                             Owned by the client app and must remain valid
+                             during the call to coap_new_client_session_pki() */
+
+  coap_dtls_key_t pki_key;  /**< PKI key definition */
+};
+
+/**
+ * The structure that holds the Client PSK information.
+ */
+typedef struct coap_dtls_cpsk_info_t {
+  coap_bin_const_t identity;
+  coap_bin_const_t key;
+} coap_dtls_cpsk_info_t;
+
+/**
+ * Identity Hint Validation callback that can be set up by
+ * coap_new_client_session_psk2().
+ * Invoked when libcoap has done the validation checks at the TLS level,
+ * but the application needs to check that the Identity Hint is allowed,
+ * and thus needs to use the appropriate PSK information for the Identity
+ * Hint for the (D)TLS session.
+ * Note: Identity Hint is not supported in (D)TLS1.3.
+ *
+ * @param hint  The server provided Identity Hint
+ * @param coap_session  The CoAP session associated with the Identity Hint
+ * @param arg  The same as was passed into coap_new_client_session_psk2()
+ *             in setup_data->ih_call_back_arg
+ *
+ * @return New coap_dtls_cpsk_info_t object or @c NULL on error.
+ */
+typedef const coap_dtls_cpsk_info_t *(*coap_dtls_ih_callback_t)(
+                                      coap_str_const_t *hint,
+                                      coap_session_t *coap_session,
+                                      void *arg);
+
+#define COAP_DTLS_CPSK_SETUP_VERSION 1 /**< Latest CPSK setup version */
+
+/**
+ * The structure used for defining the Client PSK setup data to be used.
+ */
+typedef struct coap_dtls_cpsk_t {
+  uint8_t version; /** Set to COAP_DTLS_CPSK_SETUP_VERSION
+                       to support this version of the struct */
+
+  /* Options to enable different TLS functionality in libcoap */
+  uint8_t reserved[7];             /**< Reserved - must be set to 0 for
+                                        future compatibility */
+                                   /* Size of 7 chosen to align to next
+                                    * parameter, so if newly defined option
+                                    * it can use one of the reserverd slot so
+                                    * no need to change
+                                    * COAP_DTLS_CPSK_SETUP_VERSION and just
+                                    * decrement the reserved[] count.
+                                    */
+
+  /** Identity Hint check callback function.
+   * If not NULL, is called when the Identity Hint (TLS1.2 or earlier) is
+   * provided by the server.
+   * The appropriate Identity and Pre-shared Key to use can then be returned.
+   */
+  coap_dtls_ih_callback_t validate_ih_call_back;
+  void *ih_call_back_arg;  /**< Passed in to the Identity Hint callback
+                                function */
+
+  char* client_sni;    /**< If not NULL, SNI to use in client TLS setup.
+                            Owned by the client app and must remain valid
+                            during the call to coap_new_client_session_psk2()
+                            Note: Not supported by TinyDTLS. */
+
+  coap_dtls_cpsk_info_t psk_info;  /**< Client PSK definition */
+} coap_dtls_cpsk_t;
+
+/**
+ * The structure that holds the Server Pre-Shared Key and Identity
+ * Hint information.
+ */
+typedef struct coap_dtls_spsk_info_t {
+  coap_bin_const_t hint;
+  coap_bin_const_t key;
+} coap_dtls_spsk_info_t;
+
+
+/**
+ * Identity Validation callback that can be set up by
+ * coap_context_set_psk2().
+ * Invoked when libcoap has done the validation checks at the TLS level,
+ * but the application needs to check that the Identity is allowed,
+ * and needs to use the appropriate Pre-Shared Key for the (D)TLS session.
+ *
+ * @param identity  The client provided Identity
+ * @param coap_session  The CoAP session associated with the Identity Hint
+ * @param arg  The value as passed into coap_context_set_psk2()
+ *             in setup_data->id_call_back_arg
+ *
+ * @return New coap_bin_const_t object containing the Pre-Shared Key or
+           @c NULL on error.
+ *         Note: This information will be duplicated into an internal
+ *               structure.
+ */
+typedef const coap_bin_const_t *(*coap_dtls_id_callback_t)(
+                                 coap_bin_const_t *identity,
+                                 coap_session_t *coap_session,
+                                 void *arg);
+/**
+ * PSK SNI callback that can be set up by coap_context_set_psk2().
+ * Invoked when libcoap has done the validation checks at the TLS level
+ * and the application needs to:-
+ * a) check that the SNI is allowed
+ * b) provide the appropriate PSK information for the (D)TLS session.
+ *
+ * @param sni  The client provided SNI
+ * @param coap_session  The CoAP session associated with the SNI
+ * @param arg  The same as was passed into coap_context_set_psk2()
+ *             in setup_data->sni_call_back_arg
+ *
+ * @return New coap_dtls_spsk_info_t object or @c NULL on error.
+ */
+typedef const coap_dtls_spsk_info_t *(*coap_dtls_psk_sni_callback_t)(
+                                 const char *sni,
+                                 coap_session_t *coap_session,
+                                 void *arg);
+
+#define COAP_DTLS_SPSK_SETUP_VERSION 1 /**< Latest SPSK setup version */
+
+/**
+ * The structure used for defining the Server PSK setup data to be used.
+ */
+typedef struct coap_dtls_spsk_t {
+  uint8_t version; /** Set to COAP_DTLS_SPSK_SETUP_VERSION
+                       to support this version of the struct */
+
+  /* Options to enable different TLS functionality in libcoap */
+  uint8_t reserved[7];             /**< Reserved - must be set to 0 for
+                                        future compatibility */
+                                   /* Size of 7 chosen to align to next
+                                    * parameter, so if newly defined option
+                                    * it can use one of the reserverd slot so
+                                    * no need to change
+                                    * COAP_DTLS_SPSK_SETUP_VERSION and just
+                                    * decrement the reserved[] count.
+                                    */
+
+  /** Identity check callback function.
+   * If not @p NULL, is called when the Identity is provided by the client.
+   * The appropriate Pre-Shared Key to use can then be returned.
+   */
+  coap_dtls_id_callback_t validate_id_call_back;
+  void *id_call_back_arg;  /**< Passed in to the Identity callback function */
+
+  /** SNI check callback function.
+   * If not @p NULL, called if the SNI is not previously seen and prior to
+   * sending PSK information back to the client so that the appropriate
+   * PSK information can be used based on the requesting SNI.
+   */
+  coap_dtls_psk_sni_callback_t validate_sni_call_back;
+  void *sni_call_back_arg;  /**< Passed in to the SNI callback function */
+
+  coap_dtls_spsk_info_t psk_info;  /**< Server PSK definition */
+} coap_dtls_spsk_t;
+
+
+/** @} */
+
+/**
+ * @ingroup logging
+ * Sets the (D)TLS logging level to the specified @p level.
+ * Note: coap_log_level() will influence output if at a specified level.
+ *
+ * @param level The logging level to use - LOG_*
+ */
+void coap_dtls_set_log_level(int level);
+
+/**
+ * @ingroup logging
+ * Get the current (D)TLS logging.
+ *
+ * @return The current log level (one of LOG_*).
+ */
+int coap_dtls_get_log_level(void);
+
+
+#endif /* COAP_DTLS_H */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_dtls_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_dtls_internal.h
new file mode 100644
index 00000000000..8ea09a4eb3e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_dtls_internal.h
@@ -0,0 +1,345 @@
+/*
+ * coap_dtls_internal.h -- (Datagram) Transport Layer Support for libcoap
+ *
+ * Copyright (C) 2016 Olaf Bergmann <bergmann@tzi.org>
+ * Copyright (C) 2017 Jean-Claude Michelou <jcm@spinetix.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_DTLS_INTERNAL_H_
+#define COAP_DTLS_INTERNAL_H_
+
+/**
+ * @defgroup dtls_internal DTLS Support (Internal)
+ * CoAP DTLS Structures, Enums and Functions that are not exposed to
+ * applications
+ * @{
+ */
+
+/* https://tools.ietf.org/html/rfc6347#section-4.2.4.1 */
+#ifndef COAP_DTLS_RETRANSMIT_MS
+#define COAP_DTLS_RETRANSMIT_MS 1000
+#endif
+#ifndef COAP_DTLS_RETRANSMIT_TOTAL_MS
+#define COAP_DTLS_RETRANSMIT_TOTAL_MS 60000
+#endif
+
+#define COAP_DTLS_RETRANSMIT_COAP_TICKS (COAP_DTLS_RETRANSMIT_MS * COAP_TICKS_PER_SECOND / 1000)
+
+/**
+ * Creates a new DTLS context for the given @p coap_context. This function
+ * returns a pointer to a new DTLS context object or @c NULL on error.
+ *
+ * @param coap_context The CoAP context where the DTLS object shall be used.
+ *
+ * @return A DTLS context object or @c NULL on error.
+ */
+void *
+coap_dtls_new_context(coap_context_t *coap_context);
+
+/**
+ * Set the DTLS context's default server PSK information.
+ * This does the PSK specifics following coap_dtls_new_context().
+ *
+ * @param coap_context The CoAP context.
+ * @param setup_data A structure containing setup data originally passed into
+ *                   coap_context_set_psk2().
+ *
+ * @return @c 1 if successful, else @c 0.
+ */
+
+int
+coap_dtls_context_set_spsk(coap_context_t *coap_context,
+                          coap_dtls_spsk_t *setup_data);
+
+/**
+ * Set the DTLS context's default client PSK information.
+ * This does the PSK specifics following coap_dtls_new_context().
+ *
+ * @param coap_context The CoAP context.
+ * @param setup_data A structure containing setup data originally passed into
+ *                   coap_new_client_session_psk2().
+ *
+ * @return @c 1 if successful, else @c 0.
+ */
+
+int
+coap_dtls_context_set_cpsk(coap_context_t *coap_context,
+                          coap_dtls_cpsk_t *setup_data);
+
+/**
+ * Set the DTLS context's default server PKI information.
+ * This does the PKI specifics following coap_dtls_new_context().
+ * If @p COAP_DTLS_ROLE_SERVER, then the information will get put into the
+ * TLS library's context (from which sessions are derived).
+ * If @p COAP_DTLS_ROLE_CLIENT, then the information will get put into the
+ * TLS library's session.
+ *
+ * @param coap_context The CoAP context.
+ * @param setup_data     Setup information defining how PKI is to be setup.
+ *                       Required parameter.  If @p NULL, PKI will not be
+ *                       set up.
+ * @param role  One of @p COAP_DTLS_ROLE_CLIENT or @p COAP_DTLS_ROLE_SERVER
+ *
+ * @return @c 1 if successful, else @c 0.
+ */
+
+int
+coap_dtls_context_set_pki(coap_context_t *coap_context,
+                          const coap_dtls_pki_t *setup_data,
+                          const coap_dtls_role_t role);
+
+/**
+ * Set the dtls context's default Root CA information for a client or server.
+ *
+ * @param coap_context   The current coap_context_t object.
+ * @param ca_file        If not @p NULL, is the full path name of a PEM encoded
+ *                       file containing all the Root CAs to be used.
+ * @param ca_dir         If not @p NULL, points to a directory containing PEM
+ *                       encoded files containing all the Root CAs to be used.
+ *
+ * @return @c 1 if successful, else @c 0.
+ */
+
+int
+coap_dtls_context_set_pki_root_cas(coap_context_t *coap_context,
+                                   const char *ca_file,
+                                   const char *ca_dir);
+
+/**
+ * Check whether one of the coap_dtls_context_set_{psk|pki}() functions have
+ * been called.
+ *
+ * @param coap_context The current coap_context_t object.
+ *
+ * @return @c 1 if coap_dtls_context_set_{psk|pki}() called, else @c 0.
+ */
+
+int coap_dtls_context_check_keys_enabled(coap_context_t *coap_context);
+
+/**
+ * Releases the storage allocated for @p dtls_context.
+ *
+ * @param dtls_context The DTLS context as returned by coap_dtls_new_context().
+ */
+void coap_dtls_free_context(void *dtls_context);
+
+/**
+ * Create a new client-side session. This should send a HELLO to the server.
+ *
+ * @param coap_session   The CoAP session.
+ *
+ * @return Opaque handle to underlying TLS library object containing security
+ *         parameters for the session.
+*/
+void *coap_dtls_new_client_session(coap_session_t *coap_session);
+
+/**
+ * Create a new DTLS server-side session.
+ * Called after coap_dtls_hello() has returned @c 1, signalling that a validated
+ * HELLO was received from a client.
+ * This should send a HELLO to the server.
+ *
+ * @param coap_session   The CoAP session.
+ *
+ * @return Opaque handle to underlying TLS library object containing security
+ *         parameters for the DTLS session.
+ */
+void *coap_dtls_new_server_session(coap_session_t *coap_session);
+
+/**
+ * Terminates the DTLS session (may send an ALERT if necessary) then frees the
+ * underlying TLS library object containing security parameters for the session.
+ *
+ * @param coap_session   The CoAP session.
+ */
+void coap_dtls_free_session(coap_session_t *coap_session);
+
+/**
+ * Notify of a change in the CoAP session's MTU, for example after
+ * a PMTU update.
+ *
+ * @param coap_session   The CoAP session.
+ */
+void coap_dtls_session_update_mtu(coap_session_t *coap_session);
+
+/**
+ * Send data to a DTLS peer.
+ *
+ * @param coap_session The CoAP session.
+ * @param data      pointer to data.
+ * @param data_len  Number of bytes to send.
+ *
+ * @return @c 0 if this would be blocking, @c -1 if there is an error or the
+ *         number of cleartext bytes sent.
+ */
+int coap_dtls_send(coap_session_t *coap_session,
+                   const uint8_t *data,
+                   size_t data_len);
+
+/**
+ * Check if timeout is handled per CoAP session or per CoAP context.
+ *
+ * @return @c 1 of timeout and retransmit is per context, @c 0 if it is
+ *         per session.
+ */
+int coap_dtls_is_context_timeout(void);
+
+/**
+ * Do all pending retransmits and get next timeout
+ *
+ * @param dtls_context The DTLS context.
+ *
+ * @return @c 0 if no event is pending or date of the next retransmit.
+ */
+coap_tick_t coap_dtls_get_context_timeout(void *dtls_context);
+
+/**
+ * Get next timeout for this session.
+ *
+ * @param coap_session The CoAP session.
+ * @param now The current time in ticks.
+ *
+ * @return @c 0 If no event is pending or ticks time of the next retransmit.
+ */
+coap_tick_t coap_dtls_get_timeout(coap_session_t *coap_session,
+                                  coap_tick_t now);
+
+/**
+ * Handle a DTLS timeout expiration.
+ *
+ * @param coap_session The CoAP session.
+ */
+void coap_dtls_handle_timeout(coap_session_t *coap_session);
+
+/**
+ * Handling incoming data from a DTLS peer.
+ *
+ * @param coap_session The CoAP session.
+ * @param data      Encrypted datagram.
+ * @param data_len  Encrypted datagram size.
+ *
+ * @return Result of coap_handle_dgram on the decrypted CoAP PDU
+ *         or @c -1 for error.
+ */
+int coap_dtls_receive(coap_session_t *coap_session,
+                      const uint8_t *data,
+                      size_t data_len);
+
+/**
+ * Handling client HELLO messages from a new candiate peer.
+ * Note that session->tls is empty.
+ *
+ * @param coap_session The CoAP session.
+ * @param data      Encrypted datagram.
+ * @param data_len  Encrypted datagram size.
+ *
+ * @return @c 0 if a cookie verification message has been sent, @c 1 if the
+ *        HELLO contains a valid cookie and a server session should be created,
+ *        @c -1 if the message is invalid.
+ */
+int coap_dtls_hello(coap_session_t *coap_session,
+                    const uint8_t *data,
+                    size_t data_len);
+
+/**
+ * Get DTLS overhead over cleartext PDUs.
+ *
+ * @param coap_session The CoAP session.
+ *
+ * @return Maximum number of bytes added by DTLS layer.
+ */
+unsigned int coap_dtls_get_overhead(coap_session_t *coap_session);
+
+/**
+ * Create a new TLS client-side session.
+ *
+ * @param coap_session The CoAP session.
+ * @param connected Updated with whether the connection is connected yet or not.
+ *                  @c 0 is not connected, @c 1 is connected.
+ *
+ * @return Opaque handle to underlying TLS library object containing security
+ *         parameters for the session.
+*/
+void *coap_tls_new_client_session(coap_session_t *coap_session, int *connected);
+
+/**
+ * Create a TLS new server-side session.
+ *
+ * @param coap_session The CoAP session.
+ * @param connected Updated with whether the connection is connected yet or not.
+ *                  @c 0 is not connected, @c 1 is connected.
+ *
+ * @return Opaque handle to underlying TLS library object containing security
+ *         parameters for the session.
+ */
+void *coap_tls_new_server_session(coap_session_t *coap_session, int *connected);
+
+/**
+ * Terminates the TLS session (may send an ALERT if necessary) then frees the
+ * underlying TLS library object containing security parameters for the session.
+ *
+ * @param coap_session The CoAP session.
+ */
+void coap_tls_free_session( coap_session_t *coap_session );
+
+/**
+ * Send data to a TLS peer, with implicit flush.
+ *
+ * @param coap_session The CoAP session.
+ * @param data      Pointer to data.
+ * @param data_len  Number of bytes to send.
+ *
+ * @return          @c 0 if this should be retried, @c -1 if there is an error
+ *                  or the number of cleartext bytes sent.
+ */
+ssize_t coap_tls_write(coap_session_t *coap_session,
+                       const uint8_t *data,
+                       size_t data_len
+                       );
+
+/**
+ * Read some data from a TLS peer.
+ *
+ * @param coap_session The CoAP session.
+ * @param data      Pointer to data.
+ * @param data_len  Maximum number of bytes to read.
+ *
+ * @return          @c 0 if this should be retried, @c -1 if there is an error
+ *                  or the number of cleartext bytes read.
+ */
+ssize_t coap_tls_read(coap_session_t *coap_session,
+                      uint8_t *data,
+                      size_t data_len
+                      );
+
+/**
+ * Initialize the underlying (D)TLS Library layer.
+ *
+ */
+void coap_dtls_startup(void);
+
+/**
+ * Close down the underlying (D)TLS Library layer.
+ *
+ */
+void coap_dtls_shutdown(void);
+
+/**
+ * Get the actual (D)TLS object for the session.
+ *
+ * @param session The session.
+ * @param tls_lib Updated with the library type.
+ *
+ * @return The TLS information.
+ */
+void *coap_dtls_get_tls(const coap_session_t *session,
+                        coap_tls_library_t *tls_lib);
+
+/** @} */
+
+#endif /* COAP_DTLS_INTERNAL_H */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_event.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_event.h
new file mode 100644
index 00000000000..b6ea60524a2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_event.h
@@ -0,0 +1,104 @@
+/*
+ * coap_event.h -- libcoap Event API
+ *
+ * Copyright (C) 2016 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_EVENT_H_
+#define COAP_EVENT_H_
+
+#include "libcoap.h"
+
+/**
+ * @defgroup events Event API
+ * API functions for event delivery from lower-layer library functions.
+ * @{
+ */
+
+/**
+ * Scalar type to represent different events, e.g. DTLS events or
+ * retransmission timeouts.
+ */
+typedef enum coap_event_t {
+/**
+ * (D)TLS events for COAP_PROTO_DTLS and COAP_PROTO_TLS
+ */
+  COAP_EVENT_DTLS_CLOSED       = 0x0000,
+  COAP_EVENT_DTLS_CONNECTED    = 0x01DE,
+  COAP_EVENT_DTLS_RENEGOTIATE  = 0x01DF,
+  COAP_EVENT_DTLS_ERROR        = 0x0200,
+
+/**
+ * TCP events for COAP_PROTO_TCP and COAP_PROTO_TLS
+ */
+  COAP_EVENT_TCP_CONNECTED     = 0x1001,
+  COAP_EVENT_TCP_CLOSED        = 0x1002,
+  COAP_EVENT_TCP_FAILED        = 0x1003,
+
+/**
+ * CSM exchange events for reliable protocols only
+ */
+  COAP_EVENT_SESSION_CONNECTED = 0x2001,
+  COAP_EVENT_SESSION_CLOSED    = 0x2002,
+  COAP_EVENT_SESSION_FAILED    = 0x2003,
+
+/**
+ * (Q-)BLOCK receive errors
+ */
+  COAP_EVENT_PARTIAL_BLOCK     = 0x3001
+} coap_event_t;
+
+/**
+ * Type for event handler functions that can be registered with a CoAP
+ * context using the unction coap_set_event_handler(). When called by
+ * the library, the first argument will be the current coap_session_t object
+ * which is associated with the original CoAP context. The second parameter
+ * is the event type.
+ */
+typedef int (*coap_event_handler_t)(coap_session_t *session,
+                                    const coap_event_t event);
+
+/**
+ * Registers the function @p hnd as callback for events from the given
+ * CoAP context @p context. Any event handler that has previously been
+ * registered with @p context will be overwritten by this operation.
+ *
+ * @param context The CoAP context to register the event handler with.
+ * @param hnd     The event handler to be registered.  @c NULL if to be
+ *                de-registered.
+ */
+void coap_register_event_handler(coap_context_t *context,
+                            coap_event_handler_t hnd);
+
+/** @} */
+
+/**
+ * Registers the function @p hnd as callback for events from the given
+ * CoAP context @p context. Any event handler that has previously been
+ * registered with @p context will be overwritten by this operation.
+ *
+ * @deprecated Use coap_register_event_handler() instead.
+ *
+ * @param context The CoAP context to register the event handler with.
+ * @param hnd     The event handler to be registered.
+ */
+COAP_DEPRECATED
+void coap_set_event_handler(coap_context_t *context,
+                            coap_event_handler_t hnd);
+
+/**
+ * Clears the event handler registered with @p context.
+ *
+ * @deprecated Use coap_register_event_handler() instead with NULL for hnd.
+ *
+ * @param context The CoAP context whose event handler is to be removed.
+ */
+COAP_DEPRECATED
+void coap_clear_event_handler(coap_context_t *context);
+
+#endif /* COAP_EVENT_H */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_forward_decls.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_forward_decls.h
new file mode 100644
index 00000000000..3bedbf7899a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_forward_decls.h
@@ -0,0 +1,107 @@
+/*
+ * coap_forward_decls.h -- Forward declarations of structures that are
+ * opaque to application programming that use libcoap.
+ *
+ * Copyright (C) 2019-2021 Jon Shallow <supjps-libcoap@jpshallow.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_forward_decls.h
+ * @brief COAP forward definitions
+ */
+
+#ifndef COAP_FORWARD_DECLS_H_
+#define COAP_FORWARD_DECLS_H_
+
+/*
+ * Define the forward declations for the structures (even non-opaque)
+ * so that applications (using coap.h) as well as libcoap builds
+ * can reference them (and makes .h file dependencies a lot simpler).
+ */
+struct coap_address_t;
+struct coap_bin_const_t;
+struct coap_dtls_pki_t;
+struct coap_str_const_t;
+struct coap_string_t;
+
+/*
+ * typedef all the opaque structures that are defined in coap_*_internal.h
+ */
+
+/* ************* coap_async_internal.h ***************** */
+
+/**
+ * Async Entry information.
+ */
+typedef struct coap_async_t coap_async_t;
+
+/* ************* coap_block_internal.h ***************** */
+
+/*
+ * Block handling information.
+ */
+typedef struct coap_lg_xmit_t coap_lg_xmit_t;
+typedef struct coap_lg_crcv_t coap_lg_crcv_t;
+typedef struct coap_lg_srcv_t coap_lg_srcv_t;
+
+/* ************* coap_cache_internal.h ***************** */
+
+/*
+ * Cache Entry information.
+ */
+typedef struct coap_cache_entry_t coap_cache_entry_t;
+typedef struct coap_cache_key_t coap_cache_key_t;
+
+/* ************* coap_io_internal.h ***************** */
+
+/**
+ * coap_socket_t and coap_packet_t information.
+ */
+typedef struct coap_packet_t coap_packet_t;
+typedef struct coap_socket_t coap_socket_t;
+
+/* ************* coap_net_internal.h ***************** */
+
+/*
+ * Net information.
+ */
+typedef struct coap_context_t coap_context_t;
+typedef struct coap_queue_t coap_queue_t;
+
+/* ************* coap_pdu_internal.h ***************** */
+
+/**
+ * PDU information.
+ */
+typedef struct coap_pdu_t coap_pdu_t;
+
+/* ************* coap_resource_internal.h ***************** */
+
+/*
+ * Resource information.
+ */
+typedef struct coap_attr_t coap_attr_t;
+typedef struct coap_resource_t coap_resource_t;
+
+/* ************* coap_session_internal.h ***************** */
+
+/*
+ * Session information.
+ */
+typedef struct coap_addr_hash_t coap_addr_hash_t;
+typedef struct coap_endpoint_t coap_endpoint_t;
+typedef struct coap_session_t coap_session_t;
+
+/* ************* coap_subscribe_internal.h ***************** */
+
+/*
+ * Observe subscriber information.
+ */
+typedef struct coap_subscription_t coap_subscription_t;
+
+#endif /* COAP_FORWARD_DECLS_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_hashkey.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_hashkey.h
new file mode 100644
index 00000000000..11a797bde7a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_hashkey.h
@@ -0,0 +1,61 @@
+/*
+ * coap_hashkey.h -- definition of hash key type and helper functions
+ *
+ * Copyright (C) 2010-2011 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_hashkey.h
+ * @brief definition of hash key type and helper functions
+ */
+
+#ifndef COAP_HASHKEY_H_
+#define COAP_HASHKEY_H_
+
+#include "libcoap.h"
+#include "uthash.h"
+#include "str.h"
+
+typedef unsigned char coap_key_t[4];
+
+#ifndef coap_hash
+/**
+ * Calculates a fast hash over the given string @p s of length @p len and stores
+ * the result into @p h. Depending on the exact implementation, this function
+ * cannot be used as one-way function to check message integrity or simlar.
+ *
+ * @param s   The string used for hash calculation.
+ * @param len The length of @p s.
+ * @param h   The result buffer to store the calculated hash key.
+ */
+void coap_hash_impl(const unsigned char *s, size_t len, coap_key_t h);
+
+#define coap_hash(String,Length,Result) \
+  coap_hash_impl((String),(Length),(Result))
+
+/* This is used to control the pre-set hash-keys for resources. */
+#define COAP_DEFAULT_HASH
+#else
+#undef COAP_DEFAULT_HASH
+#endif /* coap_hash */
+
+/**
+ * Calls coap_hash() with given @c coap_string_t object as parameter.
+ *
+ * @param Str Must contain a pointer to a coap string object.
+ * @param H   A coap_key_t object to store the result.
+ *
+ * @hideinitializer
+ */
+#define coap_str_hash(Str,H) {               \
+    assert(Str);                             \
+    memset((H), 0, sizeof(coap_key_t));      \
+    coap_hash((Str)->s, (Str)->length, (H)); \
+  }
+
+#endif /* COAP_HASHKEY_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_internal.h
new file mode 100644
index 00000000000..5eee5c12867
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_internal.h
@@ -0,0 +1,65 @@
+/*
+ * coap_internal.h -- Structures, Enums & Functions that are not exposed to
+ * application programming
+ *
+ * Copyright (C) 2019-2021 Jon Shallow <supjps-libcoap@jpshallow.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/*
+ * All libcoap library files should include this file which then pulls in all
+ * of the other appropriate header files.
+ *
+ * Note: This file should never be included in application code (with the
+ * possible exception of internal test suites).
+ */
+
+/**
+ * @file coap_internal.h
+ * @brief Pulls together all the internal only header files
+ */
+
+#ifndef COAP_INTERNAL_H_
+#define COAP_INTERNAL_H_
+
+#include "coap_config.h"
+
+/*
+ * Correctly set up assert() based on NDEBUG for libcoap
+ */
+#if defined(HAVE_ASSERT_H) && !defined(assert)
+# include <assert.h>
+#endif
+
+#include "coap3/coap.h"
+
+/*
+ * Include all the header files that are for internal use only.
+ */
+
+/* Not defined in coap.h - internal usage .h files */
+#include "utlist.h"
+#include "uthash.h"
+#include "coap_hashkey.h"
+#include "coap_mutex.h"
+
+/* Specifically defined internal .h files */
+#include "coap_asn1_internal.h"
+#include "coap_async_internal.h"
+#include "coap_block_internal.h"
+#include "coap_cache_internal.h"
+#include "coap_dtls_internal.h"
+#include "coap_io_internal.h"
+#include "coap_net_internal.h"
+#include "coap_pdu_internal.h"
+#include "coap_session_internal.h"
+#include "coap_resource_internal.h"
+#include "coap_session_internal.h"
+#include "coap_subscribe_internal.h"
+#include "coap_tcp_internal.h"
+
+#endif /* COAP_INTERNAL_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_io.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_io.h
new file mode 100644
index 00000000000..b27921f8be1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_io.h
@@ -0,0 +1,72 @@
+/*
+ * coap_io.h -- Default network I/O functions for libcoap
+ *
+ * Copyright (C) 2012-2013 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_IO_H_
+#define COAP_IO_H_
+
+#include <sys/types.h>
+
+#include "address.h"
+
+#ifdef RIOT_VERSION
+#include "net/gnrc.h"
+#endif /* RIOT_VERSION */
+
+#ifndef COAP_RXBUFFER_SIZE
+#define COAP_RXBUFFER_SIZE 1472
+#endif /* COAP_RXBUFFER_SIZE */
+
+/*
+ * It may may make sense to define this larger on busy systems
+ * (lots of sessions, large number of which are active), by using
+ * -DCOAP_MAX_EPOLL_EVENTS=nn at compile time.
+ */
+#ifndef COAP_MAX_EPOLL_EVENTS
+#define COAP_MAX_EPOLL_EVENTS 10
+#endif /* COAP_MAX_EPOLL_EVENTS */
+
+#ifdef _WIN32
+typedef SOCKET coap_fd_t;
+#define coap_closesocket closesocket
+#define COAP_SOCKET_ERROR SOCKET_ERROR
+#define COAP_INVALID_SOCKET INVALID_SOCKET
+#else
+typedef int coap_fd_t;
+#define coap_closesocket close
+#define COAP_SOCKET_ERROR (-1)
+#define COAP_INVALID_SOCKET (-1)
+#endif
+
+typedef uint16_t coap_socket_flags_t;
+
+typedef struct coap_addr_tuple_t {
+  coap_address_t remote;       /**< remote address and port */
+  coap_address_t local;        /**< local address and port */
+} coap_addr_tuple_t;
+
+const char *coap_socket_strerror( void );
+
+/**
+ * Check whether TCP is available.
+ *
+ * @return @c 1 if support for TCP is enabled, or @c 0 otherwise.
+ */
+int coap_tcp_is_supported(void);
+
+typedef enum {
+  COAP_NACK_TOO_MANY_RETRIES,
+  COAP_NACK_NOT_DELIVERABLE,
+  COAP_NACK_RST,
+  COAP_NACK_TLS_FAILED,
+  COAP_NACK_ICMP_ISSUE
+} coap_nack_reason_t;
+
+#endif /* COAP_IO_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_io_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_io_internal.h
new file mode 100644
index 00000000000..241ef7f9955
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_io_internal.h
@@ -0,0 +1,168 @@
+/*
+ * coap_io.h -- Default network I/O functions for libcoap
+ *
+ * Copyright (C) 2012-2013 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_IO_INTERNAL_H_
+#define COAP_IO_INTERNAL_H_
+
+#include <sys/types.h>
+
+#include "address.h"
+
+#ifdef RIOT_VERSION
+#include "net/gnrc.h"
+#endif /* RIOT_VERSION */
+
+struct coap_socket_t {
+#if defined(WITH_LWIP)
+  struct udp_pcb *pcb;
+#elif defined(WITH_CONTIKI)
+  void *conn;
+#else
+  coap_fd_t fd;
+#endif /* WITH_LWIP */
+#if defined(RIOT_VERSION)
+  gnrc_pktsnip_t *pkt; /* pointer to received packet for processing */
+#endif /* RIOT_VERSION */
+  coap_socket_flags_t flags;
+  coap_session_t *session; /* Used by the epoll logic for an active session. */
+  coap_endpoint_t *endpoint; /* Used by the epoll logic for a listening
+                                endpoint. */
+};
+
+/**
+ * coap_socket_flags_t values
+ */
+#define COAP_SOCKET_EMPTY        0x0000  /**< the socket is not used */
+#define COAP_SOCKET_NOT_EMPTY    0x0001  /**< the socket is not empty */
+#define COAP_SOCKET_BOUND        0x0002  /**< the socket is bound */
+#define COAP_SOCKET_CONNECTED    0x0004  /**< the socket is connected */
+#define COAP_SOCKET_WANT_READ    0x0010  /**< non blocking socket is waiting for reading */
+#define COAP_SOCKET_WANT_WRITE   0x0020  /**< non blocking socket is waiting for writing */
+#define COAP_SOCKET_WANT_ACCEPT  0x0040  /**< non blocking server socket is waiting for accept */
+#define COAP_SOCKET_WANT_CONNECT 0x0080  /**< non blocking client socket is waiting for connect */
+#define COAP_SOCKET_CAN_READ     0x0100  /**< non blocking socket can now read without blocking */
+#define COAP_SOCKET_CAN_WRITE    0x0200  /**< non blocking socket can now write without blocking */
+#define COAP_SOCKET_CAN_ACCEPT   0x0400  /**< non blocking server socket can now accept without blocking */
+#define COAP_SOCKET_CAN_CONNECT  0x0800  /**< non blocking client socket can now connect without blocking */
+#define COAP_SOCKET_MULTICAST    0x1000  /**< socket is used for multicast communication */
+
+coap_endpoint_t *coap_malloc_endpoint( void );
+void coap_mfree_endpoint( coap_endpoint_t *ep );
+
+const char *coap_socket_format_errno(int error);
+
+int
+coap_socket_connect_udp(coap_socket_t *sock,
+                        const coap_address_t *local_if,
+                        const coap_address_t *server,
+                        int default_port,
+                        coap_address_t *local_addr,
+                        coap_address_t *remote_addr);
+
+int
+coap_socket_bind_udp(coap_socket_t *sock,
+                     const coap_address_t *listen_addr,
+                     coap_address_t *bound_addr );
+
+void coap_socket_close(coap_socket_t *sock);
+
+ssize_t
+coap_socket_send( coap_socket_t *sock, coap_session_t *session,
+                  const uint8_t *data, size_t data_len );
+
+ssize_t
+coap_socket_write(coap_socket_t *sock, const uint8_t *data, size_t data_len);
+
+ssize_t
+coap_socket_read(coap_socket_t *sock, uint8_t *data, size_t data_len);
+
+void
+coap_epoll_ctl_mod(coap_socket_t *sock, uint32_t events, const char *func);
+
+#ifdef WITH_LWIP
+ssize_t
+coap_socket_send_pdu( coap_socket_t *sock, coap_session_t *session,
+                      coap_pdu_t *pdu );
+#endif
+
+/**
+ * Function interface for data transmission. This function returns the number of
+ * bytes that have been transmitted, or a value less than zero on error.
+ *
+ * @param sock             Socket to send data with
+ * @param session          Addressing information for unconnected sockets, or NULL
+ * @param data             The data to send.
+ * @param datalen          The actual length of @p data.
+ *
+ * @return                 The number of bytes written on success, or a value
+ *                         less than zero on error.
+ */
+ssize_t coap_network_send( coap_socket_t *sock, const coap_session_t *session, const uint8_t *data, size_t datalen );
+
+/**
+ * Function interface for reading data. This function returns the number of
+ * bytes that have been read, or a value less than zero on error. In case of an
+ * error, @p *packet is set to NULL.
+ *
+ * @param sock   Socket to read data from
+ * @param packet Received packet metadata and payload. src and dst should be preset.
+ *
+ * @return       The number of bytes received on success, or a value less than
+ *               zero on error.
+ */
+ssize_t coap_network_read( coap_socket_t *sock, coap_packet_t *packet );
+
+#ifndef coap_mcast_interface
+# define coap_mcast_interface(Local) 0
+#endif
+
+/**
+ * Given a packet, set msg and msg_len to an address and length of the packet's
+ * data in memory.
+ * */
+void coap_packet_get_memmapped(coap_packet_t *packet,
+                               unsigned char **address,
+                               size_t *length);
+
+#ifdef WITH_LWIP
+/**
+ * Get the pbuf of a packet. The caller takes over responsibility for freeing
+ * the pbuf.
+ */
+struct pbuf *coap_packet_extract_pbuf(coap_packet_t *packet);
+#endif
+
+#if defined(WITH_LWIP)
+/*
+ * This is only included in coap_io.h instead of .c in order to be available for
+ * sizeof in lwippools.h.
+ * Simple carry-over of the incoming pbuf that is later turned into a node.
+ *
+ * Source address data is currently side-banded via ip_current_dest_addr & co
+ * as the packets have limited lifetime anyway.
+ */
+struct coap_packet_t {
+  struct pbuf *pbuf;
+  const coap_endpoint_t *local_interface;
+  coap_addr_tuple_t addr_info; /**< local and remote addresses */
+  int ifindex;                /**< the interface index */
+//  uint16_t srcport;
+};
+#else
+struct coap_packet_t {
+  coap_addr_tuple_t addr_info; /**< local and remote addresses */
+  int ifindex;                /**< the interface index */
+  size_t length;              /**< length of payload */
+  unsigned char payload[COAP_RXBUFFER_SIZE]; /**< payload */
+};
+#endif
+
+#endif /* COAP_IO_INTERNAL_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_mutex.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_mutex.h
new file mode 100644
index 00000000000..44084fecb1c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_mutex.h
@@ -0,0 +1,59 @@
+/*
+ * coap_mutex.h -- mutex utilities
+ *
+ * Copyright (C) 2019 Jon Shallow <supjps-libcoap@jpshallow.com>
+ *               2019 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_mutex.h
+ * @brief COAP mutex mechanism wrapper
+ */
+
+#ifndef COAP_MUTEX_H_
+#define COAP_MUTEX_H_
+
+/*
+ * Mutexes are currently only used if there is a constrained stack,
+ * and large static variables (instead of the large variable being on
+ * the stack) need to be protected.
+ */
+#if COAP_CONSTRAINED_STACK
+
+#if defined(HAVE_PTHREAD_H) && defined(HAVE_PTHREAD_MUTEX_LOCK)
+#include <pthread.h>
+
+typedef pthread_mutex_t coap_mutex_t;
+#define COAP_MUTEX_INITIALIZER PTHREAD_MUTEX_INITIALIZER
+#define coap_mutex_lock(a) pthread_mutex_lock(a)
+#define coap_mutex_trylock(a) pthread_mutex_trylock(a)
+#define coap_mutex_unlock(a) pthread_mutex_unlock(a)
+
+#elif defined(RIOT_VERSION)
+/* use RIOT's mutex API */
+#include <mutex.h>
+
+typedef mutex_t coap_mutex_t;
+#define COAP_MUTEX_INITIALIZER MUTEX_INIT
+#define coap_mutex_lock(a) mutex_lock(a)
+#define coap_mutex_trylock(a) mutex_trylock(a)
+#define coap_mutex_unlock(a) mutex_unlock(a)
+
+#else
+/* define stub mutex functions */
+typedef int coap_mutex_t;
+#define COAP_MUTEX_INITIALIZER 0
+#define coap_mutex_lock(a) *(a) = 1
+#define coap_mutex_trylock(a) *(a) = 1
+#define coap_mutex_unlock(a) *(a) = 0
+
+#endif /* !RIOT_VERSION && !HAVE_PTHREAD_H && !HAVE_PTHREAD_MUTEX_LOCK */
+
+#endif /* COAP_CONSTRAINED_STACK */
+
+#endif /* COAP_MUTEX_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_net_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_net_internal.h
new file mode 100644
index 00000000000..bf243f3d022
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_net_internal.h
@@ -0,0 +1,366 @@
+/*
+ * coap_context_internal.h -- Structures, Enums & Functions that are not
+ * exposed to application programming
+ *
+ * Copyright (C) 2010-2021 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_net_internal.h
+ * @brief COAP net internal information
+ */
+
+#ifndef COAP_NET_INTERNAL_H_
+#define COAP_NET_INTERNAL_H_
+
+/**
+ * @defgroup context_internal Context Handling (Internal)
+ * CoAP Context Structures, Enums and Functions that are not exposed to
+ * applications
+ * @{
+ */
+
+/**
+ * Queue entry
+ */
+struct coap_queue_t {
+  struct coap_queue_t *next;
+  coap_tick_t t;                /**< when to send PDU for the next time */
+  unsigned char retransmit_cnt; /**< retransmission counter, will be removed
+                                 *    when zero */
+  unsigned int timeout;         /**< the randomized timeout value */
+  coap_session_t *session;      /**< the CoAP session */
+  coap_mid_t id;                /**< CoAP message id */
+  coap_pdu_t *pdu;              /**< the CoAP PDU to send */
+};
+
+/**
+ * The CoAP stack's global state is stored in a coap_context_t object.
+ */
+struct coap_context_t {
+  coap_opt_filter_t known_options;
+  coap_resource_t *resources; /**< hash table or list of known
+                                   resources */
+  coap_resource_t *unknown_resource; /**< can be used for handling
+                                          unknown resources */
+  coap_resource_t *proxy_uri_resource; /**< can be used for handling
+                                            proxy URI resources */
+  coap_resource_release_userdata_handler_t release_userdata;
+                                        /**< function to  release user_data
+                                             when resource is deleted */
+
+#ifndef WITHOUT_ASYNC
+  /**
+   * list of asynchronous message ids */
+  coap_async_t *async_state;
+#endif /* WITHOUT_ASYNC */
+
+  /**
+   * The time stamp in the first element of the sendqeue is relative
+   * to sendqueue_basetime. */
+  coap_tick_t sendqueue_basetime;
+  coap_queue_t *sendqueue;
+  coap_endpoint_t *endpoint;      /**< the endpoints used for listening  */
+  coap_session_t *sessions;       /**< client sessions */
+
+#ifdef WITH_CONTIKI
+  struct uip_udp_conn *conn;      /**< uIP connection object */
+  struct etimer retransmit_timer; /**< fires when the next packet must be
+                                       sent */
+  struct etimer notify_timer;     /**< used to check resources periodically */
+#endif /* WITH_CONTIKI */
+
+#ifdef WITH_LWIP
+  uint8_t timer_configured;       /**< Set to 1 when a retransmission is
+                                   *   scheduled using lwIP timers for this
+                                   *   context, otherwise 0. */
+#endif /* WITH_LWIP */
+
+  coap_response_handler_t response_handler;
+  coap_nack_handler_t nack_handler;
+  coap_ping_handler_t ping_handler;
+  coap_pong_handler_t pong_handler;
+
+  /**
+   * Callback function that is used to signal events to the
+   * application.  This field is set by coap_set_event_handler().
+   */
+  coap_event_handler_t handle_event;
+
+  ssize_t (*network_send)(coap_socket_t *sock, const coap_session_t *session,
+                          const uint8_t *data, size_t datalen);
+
+  ssize_t (*network_read)(coap_socket_t *sock, coap_packet_t *packet);
+
+  size_t(*get_client_psk)(const coap_session_t *session, const uint8_t *hint,
+                          size_t hint_len, uint8_t *identity,
+                          size_t *identity_len, size_t max_identity_len,
+                          uint8_t *psk, size_t max_psk_len);
+  size_t(*get_server_psk)(const coap_session_t *session,
+                          const uint8_t *identity, size_t identity_len,
+                          uint8_t *psk, size_t max_psk_len);
+  size_t(*get_server_hint)(const coap_session_t *session, uint8_t *hint,
+                          size_t max_hint_len);
+
+  void *dtls_context;
+
+  coap_dtls_spsk_t spsk_setup_data;  /**< Contains the initial PSK server setup
+                                          data */
+
+  unsigned int session_timeout;    /**< Number of seconds of inactivity after
+                                        which an unused session will be closed.
+                                        0 means use default. */
+  unsigned int max_idle_sessions;  /**< Maximum number of simultaneous unused
+                                        sessions per endpoint. 0 means no
+                                        maximum. */
+  unsigned int max_handshake_sessions; /**< Maximum number of simultaneous
+                                            negotating sessions per endpoint. 0
+                                            means use default. */
+  unsigned int ping_timeout;           /**< Minimum inactivity time before
+                                            sending a ping message. 0 means
+                                            disabled. */
+  unsigned int csm_timeout;           /**< Timeout for waiting for a CSM from
+                                           the remote side. 0 means disabled. */
+  uint8_t observe_pending;         /**< Observe response pending */
+  uint8_t block_mode;              /**< Zero or more COAP_BLOCK_ or'd options */
+  uint64_t etag;                   /**< Next ETag to use */
+
+  coap_cache_entry_t *cache;       /**< CoAP cache-entry cache */
+  uint16_t *cache_ignore_options;  /**< CoAP options to ignore when creating a
+                                        cache-key */
+  size_t cache_ignore_count;       /**< The number of CoAP options to ignore
+                                        when creating a cache-key */
+  void *app;                       /**< application-specific data */
+#ifdef COAP_EPOLL_SUPPORT
+  int epfd;                        /**< External FD for epoll */
+  int eptimerfd;                   /**< Internal FD for timeout */
+  coap_tick_t next_timeout;        /**< When the next timeout is to occur */
+#endif /* COAP_EPOLL_SUPPORT */
+};
+
+/**
+ * Adds @p node to given @p queue, ordered by variable t in @p node.
+ *
+ * @param queue Queue to add to.
+ * @param node Node entry to add to Queue.
+ *
+ * @return @c 1 added to queue, @c 0 failure.
+ */
+int coap_insert_node(coap_queue_t **queue, coap_queue_t *node);
+
+/**
+ * Destroys specified @p node.
+ *
+ * @param node Node entry to remove.
+ *
+ * @return @c 1 node deleted from queue, @c 0 failure.
+ */
+int coap_delete_node(coap_queue_t *node);
+
+/**
+ * Removes all items from given @p queue and frees the allocated storage.
+ *
+ * Internal function.
+ *
+ * @param queue The queue to delete.
+ */
+void coap_delete_all(coap_queue_t *queue);
+
+/**
+ * Creates a new node suitable for adding to the CoAP sendqueue.
+ *
+ * @return New node entry, or @c NULL if failure.
+ */
+coap_queue_t *coap_new_node(void);
+
+/**
+ * Set sendqueue_basetime in the given context object @p ctx to @p now. This
+ * function returns the number of elements in the queue head that have timed
+ * out.
+ */
+unsigned int coap_adjust_basetime(coap_context_t *ctx, coap_tick_t now);
+
+/**
+ * Returns the next pdu to send without removing from sendqeue.
+ */
+coap_queue_t *coap_peek_next( coap_context_t *context );
+
+/**
+ * Returns the next pdu to send and removes it from the sendqeue.
+ */
+coap_queue_t *coap_pop_next( coap_context_t *context );
+
+/**
+ * Handles retransmissions of confirmable messages
+ *
+ * @param context      The CoAP context.
+ * @param node         The node to retransmit.
+ *
+ * @return             The message id of the sent message or @c
+ *                     COAP_INVALID_MID on error.
+ */
+coap_mid_t coap_retransmit(coap_context_t *context, coap_queue_t *node);
+
+/**
+ * Parses and interprets a CoAP datagram with context @p ctx. This function
+ * returns @c 0 if the datagram was handled, or a value less than zero on
+ * error.
+ *
+ * @param ctx    The current CoAP context.
+ * @param session The current CoAP session.
+ * @param data The received packet'd data.
+ * @param data_len The received packet'd data length.
+ *
+ * @return       @c 0 if message was handled successfully, or less than zero on
+ *               error.
+ */
+int coap_handle_dgram(coap_context_t *ctx, coap_session_t *session, uint8_t *data, size_t data_len);
+
+/**
+ * This function removes the element with given @p id from the list given list.
+ * If @p id was found, @p node is updated to point to the removed element. Note
+ * that the storage allocated by @p node is @b not released. The caller must do
+ * this manually using coap_delete_node(). This function returns @c 1 if the
+ * element with id @p id was found, @c 0 otherwise. For a return value of @c 0,
+ * the contents of @p node is undefined.
+ *
+ * @param queue The queue to search for @p id.
+ * @param session The session to look for.
+ * @param id    The message id to look for.
+ * @param node  If found, @p node is updated to point to the removed node. You
+ *              must release the storage pointed to by @p node manually.
+ *
+ * @return      @c 1 if @p id was found, @c 0 otherwise.
+ */
+int coap_remove_from_queue(coap_queue_t **queue,
+                           coap_session_t *session,
+                           coap_mid_t id,
+                           coap_queue_t **node);
+
+coap_mid_t
+coap_wait_ack( coap_context_t *context, coap_session_t *session,
+               coap_queue_t *node);
+
+/**
+ * Cancels all outstanding messages for session @p session that have the specified
+ * token.
+ *
+ * @param context      The context in use.
+ * @param session      Session of the messages to remove.
+ * @param token        Message token.
+ * @param token_length Actual length of @p token.
+ */
+void coap_cancel_all_messages(coap_context_t *context,
+                              coap_session_t *session,
+                              const uint8_t *token,
+                              size_t token_length);
+
+/**
+* Cancels all outstanding messages for session @p session.
+*
+* @param context      The context in use.
+* @param session      Session of the messages to remove.
+* @param reason       The reasion for the session cancellation
+*/
+void
+coap_cancel_session_messages(coap_context_t *context,
+                             coap_session_t *session,
+                             coap_nack_reason_t reason);
+
+/**
+ * Dispatches the PDUs from the receive queue in given context.
+ */
+void coap_dispatch(coap_context_t *context, coap_session_t *session,
+                   coap_pdu_t *pdu);
+
+/**
+ * Verifies that @p pdu contains no unknown critical options. Options must be
+ * registered at @p ctx, using the function coap_register_option(). A basic set
+ * of options is registered automatically by coap_new_context(). This function
+ * returns @c 1 if @p pdu is ok, @c 0 otherwise. The given filter object @p
+ * unknown will be updated with the unknown options. As only @c COAP_MAX_OPT
+ * options can be signalled this way, remaining options must be examined
+ * manually.
+ *
+ * @code
+  coap_opt_filter_t f = COAP_OPT_NONE;
+  coap_opt_iterator_t opt_iter;
+
+  if (coap_option_check_critical(ctx, pdu, f) == 0) {
+    coap_option_iterator_init(pdu, &opt_iter, f);
+
+    while (coap_option_next(&opt_iter)) {
+      if (opt_iter.type & 0x01) {
+        ... handle unknown critical option in opt_iter ...
+      }
+    }
+  }
+   @endcode
+ *
+ * @param ctx      The context where all known options are registered.
+ * @param pdu      The PDU to check.
+ * @param unknown  The output filter that will be updated to indicate the
+ *                 unknown critical options found in @p pdu.
+ *
+ * @return         @c 1 if everything was ok, @c 0 otherwise.
+ */
+int coap_option_check_critical(coap_context_t *ctx,
+                               coap_pdu_t *pdu,
+                               coap_opt_filter_t *unknown);
+
+/**
+ * Creates a new response for given @p request with the contents of @c
+ * .well-known/core. The result is NULL on error or a newly allocated PDU that
+ * must be either sent with coap_sent() or released by coap_delete_pdu().
+ *
+ * @param context The current coap context to use.
+ * @param session The CoAP session.
+ * @param request The request for @c .well-known/core .
+ *
+ * @return        A new 2.05 response for @c .well-known/core or NULL on error.
+ */
+coap_pdu_t *coap_wellknown_response(coap_context_t *context,
+                                    coap_session_t *session,
+                                    coap_pdu_t *request);
+
+/**
+ * Calculates the initial timeout based on the session CoAP transmission
+ * parameters 'ack_timeout', 'ack_random_factor', and COAP_TICKS_PER_SECOND.
+ * The calculation requires 'ack_timeout' and 'ack_random_factor' to be in
+ * Qx.FRAC_BITS fixed point notation, whereas the passed parameter @p r
+ * is interpreted as the fractional part of a Q0.MAX_BITS random value.
+ *
+ * @param session session timeout is associated with
+ * @param r  random value as fractional part of a Q0.MAX_BITS fixed point
+ *           value
+ * @return   COAP_TICKS_PER_SECOND * 'ack_timeout' *
+ *           (1 + ('ack_random_factor' - 1) * r)
+ */
+unsigned int coap_calc_timeout(coap_session_t *session, unsigned char r);
+
+/**
+ * Sends a CoAP message to given peer. The memory that is
+ * allocated for the pdu will be released by coap_send_internal().
+ * The caller must not use the pdu after calling coap_send_internal().
+ *
+ * If the response body is split into multiple payloads using blocks, libcoap
+ * will handle asking for the subsequent blocks and any necessary recovery
+ * needed.
+ *
+ * @param session   The CoAP session.
+ * @param pdu       The CoAP PDU to send.
+ *
+ * @return          The message id of the sent message or @c
+ *                  COAP_INVALID_MID on error.
+ */
+coap_mid_t coap_send_internal(coap_session_t *session, coap_pdu_t *pdu);
+
+/** @} */
+
+#endif /* COAP_NET_INTERNAL_H_ */
+
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_pdu_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_pdu_internal.h
new file mode 100644
index 00000000000..0d8446c0d4c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_pdu_internal.h
@@ -0,0 +1,300 @@
+/*
+ * coap_pdu_internal.h -- CoAP PDU structure
+ *
+ * Copyright (C) 2010-2021 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_pdu_internal.h
+ * @brief CoAP PDU internal information
+ */
+
+#ifndef COAP_COAP_PDU_INTERNAL_H_
+#define COAP_COAP_PDU_INTERNAL_H_
+
+#ifdef WITH_LWIP
+#include <lwip/pbuf.h>
+#endif
+
+#include <stdint.h>
+
+/**
+ * @defgroup pdu_internal PDU (Internal)
+ * CoAP PDU Structures, Enums and Functions that are not exposed to
+ * applications
+ * @{
+ */
+
+#define COAP_DEFAULT_VERSION      1 /* version of CoAP supported */
+
+/* TCP Message format constants, do not modify */
+#define COAP_MESSAGE_SIZE_OFFSET_TCP8 13
+#define COAP_MESSAGE_SIZE_OFFSET_TCP16 269 /* 13 + 256 */
+#define COAP_MESSAGE_SIZE_OFFSET_TCP32 65805 /* 269 + 65536 */
+
+/* Derived message size limits */
+#define COAP_MAX_MESSAGE_SIZE_TCP0 (COAP_MESSAGE_SIZE_OFFSET_TCP8-1) /* 12 */
+#define COAP_MAX_MESSAGE_SIZE_TCP8 (COAP_MESSAGE_SIZE_OFFSET_TCP16-1) /* 268 */
+#define COAP_MAX_MESSAGE_SIZE_TCP16 (COAP_MESSAGE_SIZE_OFFSET_TCP32-1) /* 65804 */
+#define COAP_MAX_MESSAGE_SIZE_TCP32 (COAP_MESSAGE_SIZE_OFFSET_TCP32+0xFFFFFFFF)
+
+#ifndef COAP_DEBUG_BUF_SIZE
+#if defined(WITH_CONTIKI) || defined(WITH_LWIP)
+#define COAP_DEBUG_BUF_SIZE 128
+#else /* defined(WITH_CONTIKI) || defined(WITH_LWIP) */
+/* 1024 derived from RFC7252 4.6.  Message Size max payload */
+#define COAP_DEBUG_BUF_SIZE (8 + 1024 * 2)
+#endif /* defined(WITH_CONTIKI) || defined(WITH_LWIP) */
+#endif /* COAP_DEBUG_BUF_SIZE */
+
+#ifndef COAP_DEFAULT_MAX_PDU_RX_SIZE
+#if defined(WITH_CONTIKI) || defined(WITH_LWIP)
+#define COAP_DEFAULT_MAX_PDU_RX_SIZE (COAP_MAX_MESSAGE_SIZE_TCP16+4UL)
+#else
+/* 8 MiB max-message-size plus some space for options */
+#define COAP_DEFAULT_MAX_PDU_RX_SIZE (8UL*1024*1024+256)
+#endif
+#endif /* COAP_DEFAULT_MAX_PDU_RX_SIZE */
+
+/**
+ * Indicates that a response is suppressed. This will occur for error
+ * responses if the request was received via IP multicast.
+ */
+#define COAP_DROPPED_RESPONSE -2
+
+#define COAP_PDU_DELAYED -3
+
+#define COAP_PAYLOAD_START 0xFF /* payload marker */
+
+#define COAP_PDU_IS_EMPTY(pdu)     ((pdu)->code == 0)
+#define COAP_PDU_IS_REQUEST(pdu)   (!COAP_PDU_IS_EMPTY(pdu) && (pdu)->code < 32)
+#define COAP_PDU_IS_RESPONSE(pdu)  ((pdu)->code >= 64 && (pdu)->code < 224)
+#define COAP_PDU_IS_SIGNALING(pdu) ((pdu)->code >= 224)
+
+#define COAP_PDU_MAX_UDP_HEADER_SIZE 4
+#define COAP_PDU_MAX_TCP_HEADER_SIZE 6
+
+/**
+ * structure for CoAP PDUs
+ * token, if any, follows the fixed size header, then options until
+ * payload marker (0xff), then the payload if stored inline.
+ * Memory layout is:
+ * <---header--->|<---token---><---options--->0xff<---payload--->
+ * header is addressed with a negative offset to token, its maximum size is
+ * max_hdr_size.
+ * options starts at token + token_length
+ * payload starts at data, its length is used_size - (data - token)
+ */
+
+struct coap_pdu_t {
+  coap_pdu_type_t type;     /**< message type */
+  coap_pdu_code_t code;     /**< request method (value 1--31) or response code
+                                 (value 64-255) */
+  coap_mid_t mid;           /**< message id, if any, in regular host byte
+                                 order */
+  uint8_t max_hdr_size;     /**< space reserved for protocol-specific header */
+  uint8_t hdr_size;         /**< actual size used for protocol-specific
+                                 header */
+  uint8_t token_length;     /**< length of Token */
+  uint16_t max_opt;         /**< highest option number in PDU */
+  size_t alloc_size;        /**< allocated storage for token, options and
+                                 payload */
+  size_t used_size;         /**< used bytes of storage for token, options and
+                                 payload */
+  size_t max_size;          /**< maximum size for token, options and payload,
+                                 or zero for variable size pdu */
+  uint8_t *token;           /**< first byte of token, if any, or options */
+  uint8_t *data;            /**< first byte of payload, if any */
+#ifdef WITH_LWIP
+  struct pbuf *pbuf;        /**< lwIP PBUF. The package data will always reside
+                             *   inside the pbuf's payload, but this pointer
+                             *   has to be kept because no exact offset can be
+                             *   given. This field must not be accessed from
+                             *   outside, because the pbuf's reference count
+                             *   is checked to be 1 when the pbuf is assigned
+                             *   to the pdu, and the pbuf stays exclusive to
+                             *   this pdu. */
+#endif
+  const uint8_t *body_data; /**< Holds ptr to re-assembled data or NULL */
+  size_t body_length;       /**< Holds body data length */
+  size_t body_offset;       /**< Holds body data offset */
+  size_t body_total;        /**< Holds body data total size */
+  coap_lg_xmit_t *lg_xmit;  /**< Holds ptr to lg_xmit if sending a set of
+                                 blocks */
+};
+
+/**
+ * Dynamically grows the size of @p pdu to @p new_size. The new size
+ * must not exceed the PDU's configure maximum size. On success, this
+ * function returns 1, otherwise 0.
+ *
+ * @param pdu      The PDU to resize.
+ * @param new_size The new size in bytes.
+ * @return         1 if the operation succeeded, 0 otherwise.
+ */
+int coap_pdu_resize(coap_pdu_t *pdu, size_t new_size);
+
+/**
+ * Dynamically grows the size of @p pdu to @p new_size if needed. The new size
+ * must not exceed the PDU's configured maximum size. On success, this
+ * function returns 1, otherwise 0.
+ *
+ * @param pdu      The PDU to resize.
+ * @param new_size The new size in bytes.
+ * @return         1 if the operation succeeded, 0 otherwise.
+ */
+int coap_pdu_check_resize(coap_pdu_t *pdu, size_t new_size);
+
+/**
+* Interprets @p data to determine the number of bytes in the header.
+* This function returns @c 0 on error or a number greater than zero on success.
+*
+* @param proto  Session's protocol
+* @param data   The first byte of raw data to parse as CoAP PDU.
+*
+* @return       A value greater than zero on success or @c 0 on error.
+*/
+size_t coap_pdu_parse_header_size(coap_proto_t proto,
+                                 const uint8_t *data);
+
+/**
+ * Parses @p data to extract the message size.
+ * @p length must be at least coap_pdu_parse_header_size(proto, data).
+ * This function returns @c 0 on error or a number greater than zero on success.
+ *
+ * @param proto  Session's protocol
+ * @param data   The raw data to parse as CoAP PDU.
+ * @param length The actual size of @p data.
+ *
+ * @return       A value greater than zero on success or @c 0 on error.
+ */
+size_t coap_pdu_parse_size(coap_proto_t proto,
+                           const uint8_t *data,
+                           size_t length);
+
+/**
+ * Decode the protocol specific header for the specified PDU.
+ * @param pdu A newly received PDU.
+ * @param proto The target wire protocol.
+ * @return 1 for success or 0 on error.
+ */
+
+int coap_pdu_parse_header(coap_pdu_t *pdu, coap_proto_t proto);
+
+/**
+ * Verify consistency in the given CoAP PDU structure and locate the data.
+ * This function returns @c 0 on error or a number greater than zero on
+ * success.
+ * This function only parses the token and options, up to the payload start
+ * marker.
+ *
+ * @param pdu     The PDU structure to check.
+ *
+ * @return       1 on success or @c 0 on error.
+ */
+int coap_pdu_parse_opt(coap_pdu_t *pdu);
+
+/**
+* Parses @p data into the CoAP PDU structure given in @p result.
+* The target pdu must be large enough to
+* This function returns @c 0 on error or a number greater than zero on success.
+*
+* @param proto   Session's protocol
+* @param data    The raw data to parse as CoAP PDU.
+* @param length  The actual size of @p data.
+* @param pdu     The PDU structure to fill. Note that the structure must
+*                provide space to hold at least the token and options
+*                part of the message.
+*
+* @return       1 on success or @c 0 on error.
+*/
+int coap_pdu_parse(coap_proto_t proto,
+                   const uint8_t *data,
+                   size_t length,
+                   coap_pdu_t *pdu);
+
+/**
+ * Clears any contents from @p pdu and resets @c used_size,
+ * and @c data pointers. @c max_size is set to @p size, any
+ * other field is set to @c 0. Note that @p pdu must be a valid
+ * pointer to a coap_pdu_t object created e.g. by coap_pdu_init().
+ *
+ * @param pdu   The PDU to clear.
+ * @param size  The maximum size of the PDU.
+ */
+void coap_pdu_clear(coap_pdu_t *pdu, size_t size);
+
+/**
+ * Removes (first) option of given number from the @p pdu.
+ *
+ * @param pdu   The PDU to remove the option from.
+ * @param number The number of the CoAP option to remove (first only removed).
+ *
+ * @return @c 1 if success else @c 0 if error.
+ */
+int coap_remove_option(coap_pdu_t *pdu, coap_option_num_t number);
+
+/**
+ * Inserts option of given number in the @p pdu with the appropriate data.
+ * The option will be inserted in the appropriate place in the options in
+ * the pdu.
+ *
+ * @param pdu    The PDU where the option is to be inserted.
+ * @param number The number of the new option.
+ * @param len    The length of the new option.
+ * @param data   The data of the new option.
+ *
+ * @return The overall length of the option or @c 0 on failure.
+ */
+size_t coap_insert_option(coap_pdu_t *pdu, coap_option_num_t number,
+                          size_t len, const uint8_t *data);
+
+/**
+ * Updates existing first option of given number in the @p pdu with the new
+ * data.
+ *
+ * @param pdu    The PDU where the option is to be updated.
+ * @param number The number of the option to update (first only updated).
+ * @param len    The length of the updated option.
+ * @param data   The data of the updated option.
+ *
+ * @return The overall length of the updated option or @c 0 on failure.
+ */
+size_t coap_update_option(coap_pdu_t *pdu,
+                          coap_option_num_t number,
+                          size_t len,
+                          const uint8_t *data);
+
+/**
+ * Compose the protocol specific header for the specified PDU.
+ *
+ * @param pdu A newly composed PDU.
+ * @param proto The target wire protocol.
+ *
+ * @return Number of header bytes prepended before pdu->token or 0 on error.
+ */
+
+size_t coap_pdu_encode_header(coap_pdu_t *pdu, coap_proto_t proto);
+
+ /**
+ * Updates token in @p pdu with length @p len and @p data.
+ * This function returns @c 0 on error or a value greater than zero on success.
+ *
+ * @param pdu  The PDU where the token is to be updated.
+ * @param len  The length of the new token.
+ * @param data The token to add.
+ *
+ * @return     A value greater than zero on success, or @c 0 on error.
+ */
+int coap_update_token(coap_pdu_t *pdu,
+                      size_t len,
+                      const uint8_t *data);
+
+/** @} */
+
+#endif /* COAP_COAP_PDU_INTERNAL_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_prng.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_prng.h
new file mode 100644
index 00000000000..6d297afaec3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_prng.h
@@ -0,0 +1,113 @@
+/*
+ * coap_prng.h -- Pseudo Random Numbers
+ *
+ * Copyright (C) 2010-2020 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_prng.h
+ * @brief Pseudo Random Numbers
+ */
+
+#ifndef COAP_PRNG_H_
+#define COAP_PRNG_H_
+
+/**
+ * @defgroup coap_prng Pseudo Random Numbers
+ * API functions for gerating pseudo random numbers
+ * @{
+ */
+
+#if defined(WITH_CONTIKI)
+#include <string.h>
+
+/**
+ * Fills \p buf with \p len random bytes. This is the default implementation for
+ * coap_prng(). You might want to change contiki_prng_impl() to use a better
+ * PRNG on your specific platform.
+ */
+COAP_STATIC_INLINE int
+contiki_prng_impl(unsigned char *buf, size_t len) {
+  uint16_t v = random_rand();
+  while (len > sizeof(v)) {
+    memcpy(buf, &v, sizeof(v));
+    len -= sizeof(v);
+    buf += sizeof(v);
+    v = random_rand();
+  }
+
+  memcpy(buf, &v, len);
+  return 1;
+}
+
+#define coap_prng(Buf,Length) contiki_prng_impl((Buf), (Length))
+#define coap_prng_init(Value) random_init((uint16_t)(Value))
+
+#elif defined(WITH_LWIP) && defined(LWIP_RAND)
+
+COAP_STATIC_INLINE int
+lwip_prng_impl(unsigned char *buf, size_t len) {
+  u32_t v = LWIP_RAND();
+  while (len > sizeof(v)) {
+    memcpy(buf, &v, sizeof(v));
+    len -= sizeof(v);
+    buf += sizeof(v);
+    v = LWIP_RAND();
+  }
+
+  memcpy(buf, &v, len);
+  return 1;
+}
+
+#define coap_prng(Buf,Length) lwip_prng_impl((Buf), (Length))
+#define coap_prng_init(Value) (void)Value
+
+#else
+
+/**
+ * Data type for random number generator function. The function must
+ * fill @p len bytes of random data into the buffer starting at @p
+ * out.  On success, the function should return 1, zero otherwise.
+ */
+typedef int (*coap_rand_func_t)(void *out, size_t len);
+
+/**
+ * Replaces the current random number generation function with the
+ * default function @p rng.
+ *
+ * @param rng  The random number generation function to use.
+ */
+void coap_set_prng(coap_rand_func_t rng);
+
+/**
+ * Seeds the default random number generation function with the given
+ * @p seed. The default random number generation function will use
+ * getrandom() if available, ignoring the seed.
+ *
+ * @param seed  The seed for the pseudo random number generator.
+ */
+void coap_prng_init(unsigned int seed);
+
+/**
+ * Fills @p buf with @p len random bytes using the default pseudo
+ * random number generator. The default PRNG can be changed with
+ * coap_set_prng(). This function returns 1 when @p len random bytes
+ * have been written to @p buf, zero otherwise.
+ *
+ * @param buf  The buffer to fill with random bytes.
+ * @param len  The number of random bytes to write into @p buf.
+ *
+ * @return 1 on success, 0 otherwise.
+ */
+int coap_prng(void *buf, size_t len);
+
+#endif /* POSIX */
+
+/** @} */
+
+#endif /* COAP_PRNG_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_resource_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_resource_internal.h
new file mode 100644
index 00000000000..cbcc36a664c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_resource_internal.h
@@ -0,0 +1,141 @@
+/*
+ * coap_resource_internal.h -- generic resource handling
+ *
+ * Copyright (C) 2010,2011,2014-2021 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_resource_internal.h
+ * @brief Generic resource internal handling
+ */
+
+#ifndef COAP_RESOURCE_INTERNAL_H_
+#define COAP_RESOURCE_INTERNAL_H_
+
+#include "uthash.h"
+
+/**
+ * @defgroup coap_resource_internal Resources (Internal)
+ * Structures, Enums and Functions that are not exposed to applications
+ * @{
+ */
+
+/**
+* Abstraction of attribute associated with a resource.
+*/
+struct coap_attr_t {
+  struct coap_attr_t *next; /**< Pointer to next in chain or NULL */
+  coap_str_const_t *name;   /**< Name of the attribute */
+  coap_str_const_t *value;  /**< Value of the attribute (can be NULL) */
+  int flags;
+};
+
+/**
+* Abstraction of resource that can be attached to coap_context_t.
+* The key is uri_path.
+*/
+struct coap_resource_t {
+  unsigned int dirty:1;          /**< set to 1 if resource has changed */
+  unsigned int partiallydirty:1; /**< set to 1 if some subscribers have not yet
+                                  *   been notified of the last change */
+  unsigned int observable:1;     /**< can be observed */
+  unsigned int cacheable:1;      /**< can be cached */
+  unsigned int is_unknown:1;     /**< resource created for unknown handler */
+  unsigned int is_proxy_uri:1;   /**< resource created for proxy URI handler */
+
+  /**
+   * Used to store handlers for the seven coap methods @c GET, @c POST, @c PUT,
+   * @c DELETE, @c FETCH, @c PATCH and @c IPATCH.
+   * coap_dispatch() will pass incoming requests to handle_request() and then
+   * to the handler that corresponds to its request method or generate a 4.05
+   * response if no handler is available.
+   */
+  coap_method_handler_t handler[7];
+
+  UT_hash_handle hh;
+
+  coap_attr_t *link_attr; /**< attributes to be included with the link format */
+  coap_subscription_t *subscribers;  /**< list of observers for this resource */
+
+  /**
+   * Request URI Path for this resource. This field will point into static
+   * or allocated memory which must remain there for the duration of the
+   * resource.
+   */
+  coap_str_const_t *uri_path;  /**< the key used for hash lookup for this
+                                    resource */
+  int flags; /**< zero or more COAP_RESOURCE_FLAGS_* or'd together */
+
+  /**
+  * The next value for the Observe option. This field must be increased each
+  * time the resource changes. Only the lower 24 bits are sent.
+  */
+  unsigned int observe;
+
+  /**
+   * Pointer back to the context that 'owns' this resource.
+   */
+  coap_context_t *context;
+
+  /**
+   * Count of valid names this host is known by (proxy support)
+   */
+  size_t proxy_name_count;
+
+  /**
+   * Array valid names this host is known by (proxy support)
+   */
+  coap_str_const_t ** proxy_name_list;
+
+  /**
+   * This pointer is under user control. It can be used to store context for
+   * the coap handler.
+   */
+  void *user_data;
+
+};
+
+/**
+ * Deletes all resources from given @p context and frees their storage.
+ *
+ * @param context The CoAP context with the resources to be deleted.
+ */
+void coap_delete_all_resources(coap_context_t *context);
+
+#define RESOURCES_ADD(r, obj) \
+  HASH_ADD(hh, (r), uri_path->s[0], (obj)->uri_path->length, (obj))
+
+#define RESOURCES_DELETE(r, obj) \
+  HASH_DELETE(hh, (r), (obj))
+
+#define RESOURCES_ITER(r,tmp)  \
+  coap_resource_t *tmp, *rtmp; \
+  HASH_ITER(hh, (r), tmp, rtmp)
+
+#define RESOURCES_FIND(r, k, res) {                     \
+    HASH_FIND(hh, (r), (k)->s, (k)->length, (res)); \
+  }
+
+/**
+ * Deletes an attribute.
+ * Note: This is for internal use only, as it is not deleted from its chain.
+ *
+ * @param attr Pointer to a previously created attribute.
+ *
+ */
+void coap_delete_attr(coap_attr_t *attr);
+
+coap_print_status_t coap_print_wellknown(coap_context_t *,
+                                         unsigned char *,
+                                         size_t *, size_t,
+                                         coap_opt_t *);
+
+
+/** @} */
+
+#endif /* COAP_RESOURCE_INTERNAL_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_riot.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_riot.h
new file mode 100644
index 00000000000..fc4bfa2e655
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_riot.h
@@ -0,0 +1,34 @@
+/* coap_riot.h -- RIOT-specific definitions for libcoap
+ *
+ * Copyright (C) 2019 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see
+ * README for terms of use.
+ */
+
+#ifndef COAP_RIOT_H_
+#define COAP_RIOT_H_
+
+#ifndef LIBCOAP_MSG_QUEUE_SIZE
+/**
+ * Size of the queue for passing messages between the network
+ * interface and the coap stack. */
+#define LIBCOAP_MSG_QUEUE_SIZE (32U)
+#endif /* LIBCOAP_MSG_QUEUE_SIZE */
+
+#ifndef LIBCOAP_MAX_SOCKETS
+/**
+ * Maximum number of sockets that are simultaneously considered for
+ * reading or writing. */
+#define LIBCOAP_MAX_SOCKETS (16U)
+#endif /* LIBCOAP_MAX_SOCKETS */
+
+/**
+ * This function must be called in the RIOT CoAP thread for
+ * RIOT-specific initialization.
+ */
+void coap_riot_startup(void);
+
+#endif /* COAP_RIOT_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_session.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_session.h
new file mode 100644
index 00000000000..6c49b78e97d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_session.h
@@ -0,0 +1,591 @@
+/* coap_session.h -- Session management for libcoap
+*
+* Copyright (C) 2017 Jean-Claue Michelou <jcm@spinetix.com>
+*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+* This file is part of the CoAP library libcoap. Please see
+* README for terms of use.
+*/
+
+/**
+ * @file coap_session.h
+ * @brief Defines the application visible session information
+ */
+
+#ifndef COAP_SESSION_H_
+#define COAP_SESSION_H_
+
+/**
+ * @defgroup session Sessions
+ * API functions for CoAP Sessions
+ * @{
+ */
+
+/**
+* Abstraction of a fixed point number that can be used where necessary instead
+* of a float.  1,000 fractional bits equals one integer
+*/
+typedef struct coap_fixed_point_t {
+  uint16_t integer_part;    /**< Integer part of fixed point variable */
+  uint16_t fractional_part; /**< Fractional part of fixed point variable
+                                1/1000 (3 points) precision */
+} coap_fixed_point_t;
+
+#define COAP_PROTO_NOT_RELIABLE(p) ((p)==COAP_PROTO_UDP || (p)==COAP_PROTO_DTLS)
+#define COAP_PROTO_RELIABLE(p) ((p)==COAP_PROTO_TCP || (p)==COAP_PROTO_TLS)
+
+/**
+ * coap_session_type_t values
+ */
+typedef enum coap_session_type_t {
+  COAP_SESSION_TYPE_NONE = 0, /**< Not defined */
+  COAP_SESSION_TYPE_CLIENT,   /**< client-side */
+  COAP_SESSION_TYPE_SERVER,   /**< server-side */
+  COAP_SESSION_TYPE_HELLO,    /**< server-side ephemeral session for
+                                   responding to a client hello */
+} coap_session_type_t;
+
+/**
+ * coap_session_state_t values
+ */
+typedef enum coap_session_state_t {
+  COAP_SESSION_STATE_NONE = 0,
+  COAP_SESSION_STATE_CONNECTING,
+  COAP_SESSION_STATE_HANDSHAKE,
+  COAP_SESSION_STATE_CSM,
+  COAP_SESSION_STATE_ESTABLISHED,
+} coap_session_state_t;
+
+/**
+ * Increment reference counter on a session.
+ *
+ * @param session The CoAP session.
+ * @return same as session
+ */
+coap_session_t *coap_session_reference(coap_session_t *session);
+
+/**
+ * Decrement reference counter on a session.
+ * Note that the session may be deleted as a result and should not be used
+ * after this call.
+ *
+ * @param session The CoAP session.
+ */
+void coap_session_release(coap_session_t *session);
+
+/**
+ * Notify session that it has failed.  This cleans up any outstanding / queued
+ * transmissions, observations etc..
+ *
+ * @param session The CoAP session.
+ * @param reason The reason why the session was disconnected.
+ */
+void coap_session_disconnected(coap_session_t *session,
+                               coap_nack_reason_t reason);
+
+/**
+ * Stores @p data with the given session. This function overwrites any value
+ * that has previously been stored with @p session.
+ *
+ * @param session The CoAP session.
+ * @param data The pointer to the data to store.
+ */
+void coap_session_set_app_data(coap_session_t *session, void *data);
+
+/**
+ * Returns any application-specific data that has been stored with @p
+ * session using the function coap_session_set_app_data(). This function will
+ * return @c NULL if no data has been stored.
+ *
+ * @param session The CoAP session.
+ *
+ * @return Pointer to the stored data or @c NULL.
+ */
+void *coap_session_get_app_data(const coap_session_t *session);
+
+/**
+ * Get the remote IP address from the session.
+ *
+ * @param session The CoAP session.
+ *
+ * @return The session's remote address or @c NULL on failure.
+ */
+const coap_address_t *coap_session_get_addr_remote(
+                                               const coap_session_t *session);
+
+/**
+ * Get the local IP address from the session.
+ *
+ * @param session The CoAP session.
+ *
+ * @return The session's local address or @c NULL on failure.
+ */
+const coap_address_t *coap_session_get_addr_local(
+                                               const coap_session_t *session);
+
+/**
+ * Get the session protocol type
+ *
+ * @param session The CoAP session.
+ *
+ * @return The session's protocol type
+ */
+coap_proto_t coap_session_get_proto(const coap_session_t *session);
+
+/**
+ * Get the session type
+ *
+ * @param session The CoAP session.
+ *
+ * @return The session's type
+ */
+coap_session_type_t coap_session_get_type(const coap_session_t *session);
+
+/**
+ * Get the session state
+ *
+ * @param session The CoAP session.
+ *
+ * @return The session's state
+ */
+coap_session_state_t coap_session_get_state(const coap_session_t *session);
+
+/**
+ * Get the session if index
+ *
+ * @param session The CoAP session.
+ *
+ * @return The session's if index, or @c -1 on error.
+ */
+int coap_session_get_ifindex(const coap_session_t *session);
+
+/**
+ * Get the session TLS security ptr (TLS type dependent)
+ *
+ * OpenSSL:  SSL*
+ * GnuTLS:   gnutls_session_t (implicit *)
+ * Mbed TLS: mbedtls_ssl_context*
+ * TinyDTLS: struct dtls_context*
+ *
+ * @param session The CoAP session.
+ * @param tls_lib Updated with the library type.
+ *
+ * @return The session TLS ptr or @c NULL if not set up
+ */
+void *coap_session_get_tls(const coap_session_t *session,
+                           coap_tls_library_t *tls_lib);
+
+/**
+ * Get the session context
+ *
+ * @param session The CoAP session.
+ *
+ * @return The session's context
+ */
+coap_context_t *coap_session_get_context(const coap_session_t *session);
+
+/**
+ * Set the session type to client. Typically used in a call-home server.
+ * The session needs to be of type COAP_SESSION_TYPE_SERVER.
+ * Note: If this function is successful, the session reference count is
+ * incremented and a subsequent coap_session_release() taking the
+ * reference count to 0 will cause the session to be freed off.
+ *
+ * @param session The CoAP session.
+ *
+ * @return @c 1 if updated, @c 0 on failure.
+ */
+int coap_session_set_type_client(coap_session_t *session);
+
+/**
+ * Set the session MTU. This is the maximum message size that can be sent,
+ * excluding IP and UDP overhead.
+ *
+ * @param session The CoAP session.
+ * @param mtu maximum message size
+ */
+void coap_session_set_mtu(coap_session_t *session, unsigned mtu);
+
+/**
+ * Get maximum acceptable PDU size
+ *
+ * @param session The CoAP session.
+ * @return maximum PDU size, not including header (but including token).
+ */
+size_t coap_session_max_pdu_size(const coap_session_t *session);
+
+/**
+* Creates a new client session to the designated server.
+* @param ctx The CoAP context.
+* @param local_if Address of local interface. It is recommended to use NULL to let the operating system choose a suitable local interface. If an address is specified, the port number should be zero, which means that a free port is automatically selected.
+* @param server The server's address. If the port number is zero, the default port for the protocol will be used.
+* @param proto Protocol.
+*
+* @return A new CoAP session or NULL if failed. Call coap_session_release to free.
+*/
+coap_session_t *coap_new_client_session(
+  coap_context_t *ctx,
+  const coap_address_t *local_if,
+  const coap_address_t *server,
+  coap_proto_t proto
+);
+
+/**
+* Creates a new client session to the designated server with PSK credentials
+* @param ctx The CoAP context.
+* @param local_if Address of local interface. It is recommended to use NULL to let the operating system choose a suitable local interface. If an address is specified, the port number should be zero, which means that a free port is automatically selected.
+* @param server The server's address. If the port number is zero, the default port for the protocol will be used.
+* @param proto Protocol.
+* @param identity PSK client identity
+* @param key PSK shared key
+* @param key_len PSK shared key length
+*
+* @return A new CoAP session or NULL if failed. Call coap_session_release to free.
+*/
+coap_session_t *coap_new_client_session_psk(
+  coap_context_t *ctx,
+  const coap_address_t *local_if,
+  const coap_address_t *server,
+  coap_proto_t proto,
+  const char *identity,
+  const uint8_t *key,
+  unsigned key_len
+);
+
+/**
+* Creates a new client session to the designated server with PSK credentials
+* @param ctx The CoAP context.
+* @param local_if Address of local interface. It is recommended to use NULL to
+*                 let the operating system choose a suitable local interface.
+*                 If an address is specified, the port number should be zero,
+*                 which means that a free port is automatically selected.
+* @param server The server's address. If the port number is zero, the default
+*               port for the protocol will be used.
+* @param proto CoAP Protocol.
+* @param setup_data PSK parameters.
+*
+* @return A new CoAP session or NULL if failed. Call coap_session_release()
+*         to free.
+*/
+coap_session_t *coap_new_client_session_psk2(
+  coap_context_t *ctx,
+  const coap_address_t *local_if,
+  const coap_address_t *server,
+  coap_proto_t proto,
+  coap_dtls_cpsk_t *setup_data
+);
+
+/**
+ * Get the server session's current Identity Hint (PSK).
+ *
+ * @param session  The current coap_session_t object.
+ *
+ * @return @c hint if successful, else @c NULL.
+ */
+const coap_bin_const_t * coap_session_get_psk_hint(
+                                               const coap_session_t *session);
+
+/**
+ * Get the session's current pre-shared key (PSK).
+ *
+ * @param session  The current coap_session_t object.
+ *
+ * @return @c psk_key if successful, else @c NULL.
+ */
+const coap_bin_const_t * coap_session_get_psk_key(
+                                               const coap_session_t *session);
+
+/**
+* Creates a new client session to the designated server with PKI credentials
+* @param ctx The CoAP context.
+* @param local_if Address of local interface. It is recommended to use NULL to
+*                 let the operating system choose a suitable local interface.
+*                 If an address is specified, the port number should be zero,
+*                 which means that a free port is automatically selected.
+* @param server The server's address. If the port number is zero, the default
+*               port for the protocol will be used.
+* @param proto CoAP Protocol.
+* @param setup_data PKI parameters.
+*
+* @return A new CoAP session or NULL if failed. Call coap_session_release()
+*         to free.
+*/
+coap_session_t *coap_new_client_session_pki(
+  coap_context_t *ctx,
+  const coap_address_t *local_if,
+  const coap_address_t *server,
+  coap_proto_t proto,
+  coap_dtls_pki_t *setup_data
+);
+
+/**
+ * Initializes the token value to use as a starting point.
+ *
+ * @param session The current coap_session_t object.
+ * @param length  The length of the token (0 - 8 bytes).
+ * @param token   The token data.
+ *
+ */
+void coap_session_init_token(coap_session_t *session, size_t length,
+                             const uint8_t *token);
+
+/**
+ * Creates a new token for use.
+ *
+ * @param session The current coap_session_t object.
+ * @param length  Updated with the length of the new token.
+ * @param token   Updated with the new token data (must be 8 bytes long).
+ *
+ */
+void coap_session_new_token(coap_session_t *session, size_t *length,
+                                      uint8_t *token);
+
+/**
+ * @ingroup logging
+ * Get session description.
+ *
+ * @param session  The CoAP session.
+ * @return description string.
+ */
+const char *coap_session_str(const coap_session_t *session);
+
+/**
+* Create a new endpoint for communicating with peers.
+*
+* @param context        The coap context that will own the new endpoint
+* @param listen_addr    Address the endpoint will listen for incoming requests on or originate outgoing requests from. Use NULL to specify that no incoming request will be accepted and use a random endpoint.
+* @param proto          Protocol used on this endpoint
+*/
+
+coap_endpoint_t *coap_new_endpoint(coap_context_t *context, const coap_address_t *listen_addr, coap_proto_t proto);
+
+/**
+* Set the endpoint's default MTU. This is the maximum message size that can be
+* sent, excluding IP and UDP overhead.
+*
+* @param endpoint The CoAP endpoint.
+* @param mtu maximum message size
+*/
+void coap_endpoint_set_default_mtu(coap_endpoint_t *endpoint, unsigned mtu);
+
+void coap_free_endpoint(coap_endpoint_t *ep);
+
+/** @} */
+
+/**
+ * @ingroup logging
+* Get endpoint description.
+*
+* @param endpoint  The CoAP endpoint.
+* @return description string.
+*/
+const char *coap_endpoint_str(const coap_endpoint_t *endpoint);
+
+coap_session_t *coap_session_get_by_peer(const coap_context_t *ctx,
+  const coap_address_t *remote_addr, int ifindex);
+
+ /**
+  * @defgroup cc Rate Control
+  * The transmission parameters for CoAP rate control ("Congestion
+  * Control" in stream-oriented protocols) are defined in
+  * https://tools.ietf.org/html/rfc7252#section-4.8
+  * @{
+  */
+
+  /**
+   * Number of seconds when to expect an ACK or a response to an
+   * outstanding CON message.
+   * RFC 7252, Section 4.8 Default value of ACK_TIMEOUT is 2
+   *
+   * Configurable using coap_session_set_ack_timeout()
+   */
+#define COAP_DEFAULT_ACK_TIMEOUT ((coap_fixed_point_t){2,0})
+
+  /**
+   * A factor that is used to randomize the wait time before a message
+   * is retransmitted to prevent synchronization effects.
+   * RFC 7252, Section 4.8 Default value of ACK_RANDOM_FACTOR is 1.5
+   *
+   * Configurable using coap_session_set_ack_random_factor()
+   */
+#define COAP_DEFAULT_ACK_RANDOM_FACTOR ((coap_fixed_point_t){1,500})
+
+  /**
+   * Number of message retransmissions before message sending is stopped
+   * RFC 7252, Section 4.8 Default value of MAX_RETRANSMIT is 4
+   *
+   * Configurable using coap_session_set_max_retransmit()
+   */
+#define COAP_DEFAULT_MAX_RETRANSMIT  4
+
+  /**
+   * The number of simultaneous outstanding interactions that a client
+   * maintains to a given server.
+   * RFC 7252, Section 4.8 Default value of NSTART is 1
+   */
+#define COAP_DEFAULT_NSTART 1
+
+  /**
+   * The maximum number of seconds before sending back a response to a
+   * multicast request.
+   * RFC 7252, Section 4.8 DEFAULT_LEISURE is 5.
+   */
+#ifndef COAP_DEFAULT_LEISURE
+#define COAP_DEFAULT_LEISURE (5U)
+#endif /* COAP_DEFAULT_LEISURE */
+
+  /**
+   * The MAX_TRANSMIT_SPAN definition for the session (s).
+   *
+   * RFC 7252, Section 4.8.2 Calculation of MAX_TRAMSMIT_SPAN
+   *  ACK_TIMEOUT * ((2 ** (MAX_RETRANSMIT)) - 1) * ACK_RANDOM_FACTOR
+   */
+#define COAP_MAX_TRANSMIT_SPAN(s) \
+ ((s->ack_timeout.integer_part * 1000 + s->ack_timeout.fractional_part) * \
+  ((1 << (s->max_retransmit)) -1) * \
+  (s->ack_random_factor.integer_part * 1000 + \
+   s->ack_random_factor.fractional_part) \
+  / 1000000)
+
+  /**
+   * The MAX_TRANSMIT_WAIT definition for the session (s).
+   *
+   * RFC 7252, Section 4.8.2 Calculation of MAX_TRAMSMIT_WAIT
+   *  ACK_TIMEOUT * ((2 ** (MAX_RETRANSMIT + 1)) - 1) * ACK_RANDOM_FACTOR
+   */
+#define COAP_MAX_TRANSMIT_WAIT(s) \
+ ((s->ack_timeout.integer_part * 1000 + s->ack_timeout.fractional_part) * \
+  ((1 << (s->max_retransmit + 1)) -1) * \
+  (s->ack_random_factor.integer_part * 1000 + \
+   s->ack_random_factor.fractional_part) \
+  / 1000000)
+
+  /**
+   * The MAX_LATENCY definition.
+   * RFC 7252, Section 4.8.2 MAX_LATENCY is 100.
+   */
+#define COAP_MAX_LATENCY 100
+
+  /**
+   * The PROCESSING_DELAY definition for the session (s).
+   *
+   * RFC 7252, Section 4.8.2 Calculation of PROCESSING_DELAY
+   *  PROCESSING_DELAY set to ACK_TIMEOUT
+   */
+#define COAP_PROCESSING_DELAY(s) \
+ ((s->ack_timeout.integer_part * 1000 + s->ack_timeout.fractional_part + 500) \
+  / 1000)
+
+  /**
+   * The MAX_RTT definition for the session (s).
+   *
+   * RFC 7252, Section 4.8.2 Calculation of MAX_RTT
+   *  (2 * MAX_LATENCY) + PROCESSING_DELAY
+   */
+#define COAP_MAX_RTT(s) \
+ ((2 * COAP_MAX_LATENCY) + COAP_PROCESSING_DELAY(s))
+
+  /**
+   * The EXCHANGE_LIFETIME definition for the session (s).
+   *
+   * RFC 7252, Section 4.8.2 Calculation of EXCHANGE_LIFETIME
+   *  MAX_TRANSMIT_SPAN + (2 * MAX_LATENCY) + PROCESSING_DELAY
+   */
+#define COAP_EXCHANGE_LIFETIME(s) \
+ (COAP_MAX_TRANSMIT_SPAN(s) + (2 * COAP_MAX_LATENCY) + COAP_PROCESSING_DELAY(s))
+
+  /**
+   * The NON_LIFETIME definition for the session (s).
+   *
+   * RFC 7252, Section 4.8.2 Calculation of NON_LIFETIME
+   *  MAX_TRANSMIT_SPAN + MAX_LATENCY
+   */
+#define COAP_NON_LIFETIME(s) \
+ (COAP_MAX_TRANSMIT_SPAN(s) + COAP_MAX_LATENCY)
+
+      /** @} */
+
+/**
+* Set the CoAP maximum retransmit count before failure
+*
+* Number of message retransmissions before message sending is stopped
+*
+* @param session The CoAP session.
+* @param value The value to set to. The default is 4 and should not normally
+*              get changed.
+*/
+void coap_session_set_max_retransmit(coap_session_t *session,
+                                     unsigned int value);
+
+/**
+* Set the CoAP initial ack response timeout before the next re-transmit
+*
+* Number of seconds when to expect an ACK or a response to an
+* outstanding CON message.
+*
+* @param session The CoAP session.
+* @param value The value to set to. The default is 2 and should not normally
+*              get changed.
+*/
+void coap_session_set_ack_timeout(coap_session_t *session,
+                                  coap_fixed_point_t value);
+
+/**
+* Set the CoAP ack randomize factor
+*
+* A factor that is used to randomize the wait time before a message
+* is retransmitted to prevent synchronization effects.
+*
+* @param session The CoAP session.
+* @param value The value to set to. The default is 1.5 and should not normally
+*              get changed.
+*/
+void coap_session_set_ack_random_factor(coap_session_t *session,
+                                        coap_fixed_point_t value);
+
+/**
+* Get the CoAP maximum retransmit before failure
+*
+* Number of message retransmissions before message sending is stopped
+*
+* @param session The CoAP session.
+*
+* @return Current maximum retransmit value
+*/
+unsigned int coap_session_get_max_retransmit(const coap_session_t *session);
+
+/**
+* Get the CoAP initial ack response timeout before the next re-transmit
+*
+* Number of seconds when to expect an ACK or a response to an
+* outstanding CON message.
+*
+* @param session The CoAP session.
+*
+* @return Current ack response timeout value
+*/
+coap_fixed_point_t coap_session_get_ack_timeout(const coap_session_t *session);
+
+/**
+* Get the CoAP ack randomize factor
+*
+* A factor that is used to randomize the wait time before a message
+* is retransmitted to prevent synchronization effects.
+*
+* @param session The CoAP session.
+*
+* @return Current ack randomize value
+*/
+coap_fixed_point_t coap_session_get_ack_random_factor(
+                                               const coap_session_t *session);
+
+/**
+ * Send a ping message for the session.
+ * @param session The CoAP session.
+ *
+ * @return COAP_INVALID_MID if there is an error
+ */
+coap_mid_t coap_session_send_ping(coap_session_t *session);
+
+#endif  /* COAP_SESSION_H */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_session_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_session_internal.h
new file mode 100644
index 00000000000..1fd2de9ecf1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_session_internal.h
@@ -0,0 +1,295 @@
+/*
+ * coap_session_internal.h -- Structures, Enums & Functions that are not
+ * exposed to application programming
+ *
+ * Copyright (C) 2010-2019 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_session_internal.h
+ * @brief COAP session internal information
+ */
+
+#ifndef COAP_SESSION_INTERNAL_H_
+#define COAP_SESSION_INTERNAL_H_
+
+#include "coap_io_internal.h"
+
+#define COAP_DEFAULT_SESSION_TIMEOUT 300
+#define COAP_PARTIAL_SESSION_TIMEOUT_TICKS (30 * COAP_TICKS_PER_SECOND)
+#define COAP_DEFAULT_MAX_HANDSHAKE_SESSIONS 100
+
+/**
+ * @defgroup session_internal Sessions (Internal)
+ * CoAP Session Structures, Enums and Functions that are not exposed to
+ * applications
+ * @{
+ */
+
+/**
+ * Only used for servers for hashing incoming packets. Cannot have local IP
+ * address as this may be an initial multicast and subsequent unicast address
+ */
+struct coap_addr_hash_t {
+  coap_address_t remote;       /**< remote address and port */
+  uint16_t lport;              /**< local port */
+  coap_proto_t proto;          /**< CoAP protocol */
+};
+
+/**
+ * Abstraction of virtual session that can be attached to coap_context_t
+ * (client) or coap_endpoint_t (server).
+ */
+struct coap_session_t {
+  coap_proto_t proto;               /**< protocol used */
+  coap_session_type_t type;         /**< client or server side socket */
+  coap_session_state_t state;       /**< current state of relationaship with
+                                         peer */
+  unsigned ref;                     /**< reference count from queues */
+  size_t tls_overhead;              /**< overhead of TLS layer */
+  size_t mtu;                       /**< path or CSM mtu */
+  coap_addr_hash_t addr_hash;  /**< Address hash for server incoming packets */
+  UT_hash_handle hh;
+  coap_addr_tuple_t addr_info;      /**< key: remote/local address info */
+  int ifindex;                      /**< interface index */
+  coap_socket_t sock;               /**< socket object for the session, if
+                                         any */
+  coap_endpoint_t *endpoint;        /**< session's endpoint */
+  coap_context_t *context;          /**< session's context */
+  void *tls;                        /**< security parameters */
+  uint16_t tx_mid;                  /**< the last message id that was used in
+                                         this session */
+  uint8_t con_active;               /**< Active CON request sent */
+  uint8_t csm_block_supported;      /**< CSM TCP blocks supported */
+  coap_mid_t last_ping_mid;         /**< the last keepalive message id that was
+                                         used in this session */
+  coap_queue_t *delayqueue;         /**< list of delayed messages waiting to
+                                         be sent */
+  coap_lg_xmit_t *lg_xmit;          /**< list of large transmissions */
+  coap_lg_crcv_t *lg_crcv;       /**< Client list of expected large receives */
+  coap_lg_srcv_t *lg_srcv;       /**< Server list of expected large receives */
+  size_t partial_write;             /**< if > 0 indicates number of bytes
+                                         already written from the pdu at the
+                                         head of sendqueue */
+  uint8_t read_header[8];           /**< storage space for header of incoming
+                                         message header */
+  size_t partial_read;              /**< if > 0 indicates number of bytes
+                                         already read for an incoming message */
+  coap_pdu_t *partial_pdu;          /**< incomplete incoming pdu */
+  coap_tick_t last_rx_tx;
+  coap_tick_t last_tx_rst;
+  coap_tick_t last_ping;
+  coap_tick_t last_pong;
+  coap_tick_t csm_tx;
+  coap_dtls_cpsk_t cpsk_setup_data; /**< client provided PSK initial setup
+                                         data */
+  coap_bin_const_t *psk_identity;   /**< If client, this field contains the
+                                      current identity for server; When this
+                                      field is NULL, the current identity is
+                                      contained in cpsk_setup_data
+
+                                      If server, this field contains the client
+                                      provided identity.
+
+                                      Value maintained internally */
+  coap_bin_const_t *psk_key;        /**< If client, this field contains the
+                                      current pre-shared key for server;
+                                      When this field is NULL, the current
+                                      key is contained in cpsk_setup_data
+
+                                      If server, this field contains the
+                                      client's current key.
+
+                                      Value maintained internally */
+  coap_bin_const_t *psk_hint;       /**< If client, this field contains the
+                                      server provided identity hint.
+
+                                      If server, this field contains the
+                                      current hint for the client; When this
+                                      field is NULL, the current hint is
+                                      contained in context->spsk_setup_data
+
+                                      Value maintained internally */
+  void *app;                        /**< application-specific data */
+  unsigned int max_retransmit;      /**< maximum re-transmit count (default
+                                         4) */
+  coap_fixed_point_t ack_timeout;   /**< timeout waiting for ack (default 2
+                                         secs) */
+  coap_fixed_point_t ack_random_factor; /**< ack random factor backoff (default
+                                             1.5) */
+  unsigned int dtls_timeout_count;      /**< dtls setup retry counter */
+  int dtls_event;                       /**< Tracking any (D)TLS events on this
+                                             sesison */
+  uint8_t block_mode;             /**< Zero or more COAP_BLOCK_ or'd options */
+  uint64_t tx_token;              /**< Next token number to use */
+};
+
+/**
+ * Abstraction of virtual endpoint that can be attached to coap_context_t. The
+ * keys (port, bind_addr) must uniquely identify this endpoint.
+ */
+struct coap_endpoint_t {
+  struct coap_endpoint_t *next;
+  coap_context_t *context;        /**< endpoint's context */
+  coap_proto_t proto;             /**< protocol used on this interface */
+  uint16_t default_mtu;           /**< default mtu for this interface */
+  coap_socket_t sock;             /**< socket object for the interface, if
+                                       any */
+  coap_address_t bind_addr;       /**< local interface address */
+  coap_session_t *sessions;       /**< hash table or list of active sessions */
+};
+
+/**
+ * Notify session transport has just connected and CSM exchange can now start.
+ *
+ * @param session The CoAP session.
+ */
+void coap_session_send_csm(coap_session_t *session);
+
+/**
+ * Notify session that it has just connected or reconnected.
+ *
+ * @param session The CoAP session.
+ */
+void coap_session_connected(coap_session_t *session);
+
+/**
+ * Refresh the session's current Identity Hint (PSK).
+ * Note: A copy of @p psk_hint is maintained in the session by libcoap.
+ *
+ * @param session  The current coap_session_t object.
+ * @param psk_hint If NULL, the Identity Hint will revert to the
+ *                 initial Identity Hint used at session setup.
+ *
+ * @return @c 1 if successful, else @c 0.
+ */
+int coap_session_refresh_psk_hint(coap_session_t *session,
+                                  const coap_bin_const_t *psk_hint);
+
+/**
+ * Refresh the session's current pre-shared key (PSK).
+ * Note: A copy of @p psk_key is maintained in the session by libcoap.
+ *
+ * @param session  The current coap_session_t object.
+ * @param psk_key  If NULL, the pre-shared key will revert to the
+ *                 initial pre-shared key used as session setup.
+ *
+ * @return @c 1 if successful, else @c 0.
+ */
+int coap_session_refresh_psk_key(coap_session_t *session,
+                                 const coap_bin_const_t *psk_key);
+
+/**
+ * Creates a new server session for the specified endpoint.
+ * @param ctx The CoAP context.
+ * @param ep An endpoint where an incoming connection request is pending.
+ *
+ * @return A new CoAP session or NULL if failed. Call coap_session_release to
+ * add to unused queue.
+ */
+coap_session_t *coap_new_server_session(
+  coap_context_t *ctx,
+  coap_endpoint_t *ep
+);
+
+/**
+ * Function interface for datagram data transmission. This function returns
+ * the number of bytes that have been transmitted, or a value less than zero
+ * on error.
+ *
+ * @param session          Session to send data on.
+ * @param data             The data to send.
+ * @param datalen          The actual length of @p data.
+ *
+ * @return                 The number of bytes written on success, or a value
+ *                         less than zero on error.
+ */
+ssize_t coap_session_send(coap_session_t *session,
+  const uint8_t *data, size_t datalen);
+
+/**
+ * Function interface for stream data transmission. This function returns
+ * the number of bytes that have been transmitted, or a value less than zero
+ * on error. The number of bytes written may be less than datalen because of
+ * congestion control.
+ *
+ * @param session          Session to send data on.
+ * @param data             The data to send.
+ * @param datalen          The actual length of @p data.
+ *
+ * @return                 The number of bytes written on success, or a value
+ *                         less than zero on error.
+ */
+ssize_t coap_session_write(coap_session_t *session,
+  const uint8_t *data, size_t datalen);
+
+/**
+ * Send a pdu according to the session's protocol. This function returns
+ * the number of bytes that have been transmitted, or a value less than zero
+ * on error.
+ *
+ * @param session          Session to send pdu on.
+ * @param pdu              The pdu to send.
+ *
+ * @return                 The number of bytes written on success, or a value
+ *                         less than zero on error.
+ */
+ssize_t coap_session_send_pdu(coap_session_t *session, coap_pdu_t *pdu);
+
+ssize_t
+coap_session_delay_pdu(coap_session_t *session, coap_pdu_t *pdu,
+                       coap_queue_t *node);
+
+/**
+ * Lookup the server session for the packet received on an endpoint, or create
+ * a new one.
+ *
+ * @param endpoint Active endpoint the packet was received on.
+ * @param packet Received packet.
+ * @param now The current time in ticks.
+ * @return The CoAP session or @c NULL if error.
+ */
+coap_session_t *coap_endpoint_get_session(coap_endpoint_t *endpoint,
+  const coap_packet_t *packet, coap_tick_t now);
+
+/**
+ * Create a new DTLS session for the @p session.
+ * Note: the @p session is released if no DTLS server session can be created.
+ *
+ * @ingroup dtls_internal
+ *
+ * @param session   Session to add DTLS session to
+ * @param now       The current time in ticks.
+ *
+ * @return CoAP session or @c NULL if error.
+ */
+coap_session_t *coap_session_new_dtls_session(coap_session_t *session,
+  coap_tick_t now);
+
+void coap_session_free(coap_session_t *session);
+void coap_session_mfree(coap_session_t *session);
+
+/** @} */
+
+#define SESSIONS_ADD(e, obj) \
+  HASH_ADD(hh, (e), addr_hash, sizeof((obj)->addr_hash), (obj))
+
+#define SESSIONS_DELETE(e, obj) \
+  HASH_DELETE(hh, (e), (obj))
+
+#define SESSIONS_ITER(e, el, rtmp)  \
+  HASH_ITER(hh, (e), el, rtmp)
+
+#define SESSIONS_ITER_SAFE(e, el, rtmp) \
+for ((el) = (e); (el) && ((rtmp) = (el)->hh.next, 1); (el) = (rtmp))
+
+#define SESSIONS_FIND(e, k, res) {                     \
+    HASH_FIND(hh, (e), &(k), sizeof(k), (res)); \
+  }
+
+#endif /* COAP_SESSION_INTERNAL_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_subscribe_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_subscribe_internal.h
new file mode 100644
index 00000000000..b7702362bee
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_subscribe_internal.h
@@ -0,0 +1,151 @@
+/*
+ * coap_subscribe_internal.h -- Structures, Enums & Functions that are not
+ * exposed to application programming
+ *
+ * Copyright (C) 2010-2021 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_subscribe_internal.h
+ * @brief COAP subscribe internal information
+ */
+
+#ifndef COAP_SUBSCRIBE_INTERNAL_H_
+#define COAP_SUBSCRIBE_INTERNAL_H_
+
+/**
+ * @defgroup subscribe_internal Observe Subscription (Internal)
+ * CoAP Observe Subscription Structures, Enums and Functions that are not
+ * exposed to applications
+ * @{
+ */
+
+#ifndef COAP_OBS_MAX_NON
+/**
+ * Number of notifications that may be sent non-confirmable before a confirmable
+ * message is sent to detect if observers are alive. The maximum allowed value
+ * here is @c 15.
+ */
+#define COAP_OBS_MAX_NON   5
+#endif /* COAP_OBS_MAX_NON */
+
+#ifndef COAP_OBS_MAX_FAIL
+/**
+ * Number of confirmable notifications that may fail (i.e. time out without
+ * being ACKed) before an observer is removed. The maximum value for
+ * COAP_OBS_MAX_FAIL is @c 3.
+ */
+#define COAP_OBS_MAX_FAIL  3
+#endif /* COAP_OBS_MAX_FAIL */
+
+/** Subscriber information */
+struct coap_subscription_t {
+  struct coap_subscription_t *next; /**< next element in linked list */
+  struct coap_session_t *session;   /**< subscriber session */
+
+  unsigned int non_cnt:4;  /**< up to 15 non-confirmable notifies allowed */
+  unsigned int fail_cnt:2; /**< up to 3 confirmable notifies can fail */
+  unsigned int dirty:1;    /**< set if the notification temporarily could not be
+                            *   sent (in that case, the resource's partially
+                            *   dirty flag is set too) */
+  coap_cache_key_t *cache_key; /** cache_key to identify requester */
+  coap_pdu_t *pdu;         /**< PDU to use for additional requests */
+};
+
+void coap_subscription_init(coap_subscription_t *);
+
+/**
+ * Handles a failed observe notify.
+ *
+ * @param context The context holding the resource.
+ * @param session The session that the observe notify failed on.
+ * @param token The token used when the observe notify failed.
+ */
+void
+coap_handle_failed_notify(coap_context_t *context,
+                          coap_session_t *session,
+                          const coap_binary_t *token);
+
+/**
+ * Checks all known resources to see if they are dirty and then notifies
+ * subscribed observers.
+ *
+ * @param context The context to check for dirty resources.
+ */
+void coap_check_notify(coap_context_t *context);
+
+/**
+ * Adds the specified peer as observer for @p resource. The subscription is
+ * identified by the given @p token. This function returns the registered
+ * subscription information if the @p observer has been added, or @c NULL on
+ * error.
+ *
+ * @param resource        The observed resource.
+ * @param session         The observer's session
+ * @param token           The token that identifies this subscription.
+ * @param pdu             The requesting pdu.
+ *
+ * @return                A pointer to the added/updated subscription
+ *                        information or @c NULL on error.
+ */
+coap_subscription_t *coap_add_observer(coap_resource_t *resource,
+                                       coap_session_t *session,
+                                       const coap_binary_t *token,
+                                       const coap_pdu_t *pdu);
+
+/**
+ * Returns a subscription object for given @p peer.
+ *
+ * @param resource The observed resource.
+ * @param session  The observer's session
+ * @param token    The token that identifies this subscription or @c NULL for
+ *                 any token.
+ * @return         A valid subscription if exists or @c NULL otherwise.
+ */
+coap_subscription_t *coap_find_observer(coap_resource_t *resource,
+                                        coap_session_t *session,
+                                        const coap_binary_t *token);
+
+/**
+ * Flags that data is ready to be sent to observers.
+ *
+ * @param context  The CoAP context to use.
+ * @param session  The observer's session
+ * @param token    The corresponding token that has been used for the
+ *                 subscription.
+ */
+void coap_touch_observer(coap_context_t *context,
+                         coap_session_t *session,
+                         const coap_binary_t *token);
+
+/**
+ * Removes any subscription for @p observer from @p resource and releases the
+ * allocated storage. The result is @c 1 if an observation relationship with @p
+ * observer and @p token existed, @c 0 otherwise.
+ *
+ * @param resource The observed resource.
+ * @param session  The observer's session.
+ * @param token    The token that identifies this subscription or @c NULL for
+ *                 any token.
+ * @return         @c 1 if the observer has been deleted, @c 0 otherwise.
+ */
+int coap_delete_observer(coap_resource_t *resource,
+                         coap_session_t *session,
+                         const coap_binary_t *token);
+
+/**
+ * Removes any subscription for @p session and releases the allocated storage.
+ *
+ * @param context  The CoAP context to use.
+ * @param session  The observer's session.
+ */
+void coap_delete_observers(coap_context_t *context, coap_session_t *session);
+
+/** @} */
+
+#endif /* COAP_SUBSCRIBE_INTERNAL_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_tcp_internal.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_tcp_internal.h
new file mode 100644
index 00000000000..4fd31b38d01
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_tcp_internal.h
@@ -0,0 +1,111 @@
+/*
+ * coap_tcp_internal.h -- TCP functions for libcoap
+ *
+ * Copyright (C) 2019--2020 Olaf Bergmann <bergmann@tzi.org> and others
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_tcp_internal.h
+ * @brief COAP tcp internal information
+ */
+
+#ifndef COAP_TCP_INTERNAL_H_
+#define COAP_TCP_INTERNAL_H_
+
+#include "coap_io.h"
+
+/**
+ * @defgroup tcp TCP Support (Internal)
+ * CoAP TCP Structures, Enums and Functions that are not exposed to
+ * applications
+ * @{
+ */
+
+#if !COAP_DISABLE_TCP
+
+/**
+ * Create a new TCP socket and initiate the connection
+ *
+ * Internal function.
+ *
+ * @param sock Where socket information is to be filled in
+ * @param local_if The local address to use or NULL
+ * @param server The address to connect to
+ * @param default_port The port to use if not set in @p server
+ * @param local_addr Filled in after connection initiation with
+ *                   the local address
+ * @param remote_addr Filled in after connection initiation with
+ *                    the remote address
+ *
+ * @return @c 1 if succesful, @c 0 if failure of some sort
+*/
+int
+coap_socket_connect_tcp1(coap_socket_t *sock,
+                         const coap_address_t *local_if,
+                         const coap_address_t *server,
+                         int default_port,
+                         coap_address_t *local_addr,
+                         coap_address_t *remote_addr);
+
+/**
+ * Complete the TCP Connection
+ *
+ * Internal function.
+ *
+ * @param sock The socket information to use
+ * @param local_addr Filled in with the final local address
+ * @param remote_addr Filled in with the final remote address
+ *
+ * @return @c 1 if succesful, @c 0 if failure of some sort
+*/
+int
+coap_socket_connect_tcp2(coap_socket_t *sock,
+                         coap_address_t *local_addr,
+                         coap_address_t *remote_addr);
+
+/**
+ * Create a new TCP socket and then listen for new incoming TCP sessions
+ *
+ * Internal function.
+ *
+ * @param sock Where socket information is to be filled in
+ * @param listen_addr The address to be listening for new incoming sessions
+ * @param bound_addr Filled in with the address that the TCP layer
+ *                   is listening on for new incoming TCP sessions
+ *
+ * @return @c 1 if succesful, @c 0 if failure of some sort
+*/
+int
+coap_socket_bind_tcp(coap_socket_t *sock,
+                     const coap_address_t *listen_addr,
+                     coap_address_t *bound_addr);
+
+/**
+ * Accept a new incoming TCP session
+ *
+ * Internal function.
+ *
+ * @param server The socket information to use to accept the TCP connection
+ * @param new_client Filled in socket information with the new incoming
+ *                   session information
+ * @param local_addr Filled in with the local address
+ * @param remote_addr Filled in with the remote address
+ *
+ * @return @c 1 if succesful, @c 0 if failure of some sort
+*/
+int
+coap_socket_accept_tcp(coap_socket_t *server,
+                       coap_socket_t *new_client,
+                       coap_address_t *local_addr,
+                       coap_address_t *remote_addr);
+
+#endif /* !COAP_DISABLE_TCP */
+
+/** @} */
+
+#endif /* COAP_TCP_INTERNAL_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_time.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_time.h
new file mode 100644
index 00000000000..99d117a4eb7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/coap_time.h
@@ -0,0 +1,203 @@
+/*
+ * coap_time.h -- Clock Handling
+ *
+ * Copyright (C) 2010-2019 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file coap_time.h
+ * @brief Clock Handling
+ */
+
+#ifndef COAP_TIME_H_
+#define COAP_TIME_H_
+
+/**
+ * @defgroup clock Clock Handling
+ * Default implementation of internal clock.
+ * @{
+ */
+
+#if defined(WITH_LWIP)
+
+#include <stdint.h>
+#include <lwip/sys.h>
+
+/* lwIP provides ms in sys_now */
+#define COAP_TICKS_PER_SECOND 1000
+
+typedef uint32_t coap_tick_t;
+typedef uint32_t coap_time_t;
+typedef int32_t coap_tick_diff_t;
+
+COAP_STATIC_INLINE void coap_ticks_impl(coap_tick_t *t) {
+  *t = sys_now();
+}
+
+COAP_STATIC_INLINE void coap_clock_init_impl(void) {
+}
+
+#define coap_clock_init coap_clock_init_impl
+#define coap_ticks coap_ticks_impl
+
+COAP_STATIC_INLINE coap_time_t coap_ticks_to_rt(coap_tick_t t) {
+  return t / COAP_TICKS_PER_SECOND;
+}
+
+COAP_STATIC_INLINE uint64_t coap_ticks_to_rt_us(coap_tick_t t) {
+  return (uint64_t)t * 1000000 / COAP_TICKS_PER_SECOND;
+}
+
+#elif defined(WITH_CONTIKI)
+
+#include "clock.h"
+
+typedef clock_time_t coap_tick_t;
+typedef clock_time_t coap_time_t;
+
+/**
+ * This data type is used to represent the difference between two clock_tick_t
+ * values. This data type must have the same size in memory as coap_tick_t to
+ * allow wrapping.
+ */
+typedef int coap_tick_diff_t;
+
+#define COAP_TICKS_PER_SECOND CLOCK_SECOND
+
+COAP_STATIC_INLINE void coap_clock_init(void) {
+  clock_init();
+}
+
+COAP_STATIC_INLINE void coap_ticks(coap_tick_t *t) {
+  *t = clock_time();
+}
+
+COAP_STATIC_INLINE coap_time_t coap_ticks_to_rt(coap_tick_t t) {
+  return t / COAP_TICKS_PER_SECOND;
+}
+
+COAP_STATIC_INLINE uint64_t coap_ticks_to_rt_us(coap_tick_t t) {
+  return (uint64_t)t * 1000000 / COAP_TICKS_PER_SECOND;
+}
+
+#elif defined(RIOT_VERSION)
+#include <xtimer.h>
+
+#ifdef XTIMER_HZ
+#define COAP_TICKS_PER_SECOND (XTIMER_HZ)
+#else /* XTIMER_HZ */
+#define COAP_TICKS_PER_SECOND (XTIMER_HZ_BASE)
+#endif /* XTIMER_HZ */
+
+typedef uint64_t coap_tick_t;
+typedef int64_t coap_tick_diff_t;
+typedef uint32_t coap_time_t;
+
+static inline void coap_clock_init(void) {}
+
+static inline void coap_ticks(coap_tick_t *t) {
+  *t = xtimer_now_usec64();
+}
+
+static inline coap_time_t coap_ticks_to_rt(coap_tick_t t) {
+  return t / 1000000UL;
+}
+
+static inline uint64_t coap_ticks_to_rt_us(coap_tick_t t) {
+  return t;
+}
+
+static inline coap_tick_t coap_ticks_from_rt_us(uint64_t t) {
+  return t / 1000000UL;
+}
+#else /* !WITH_LWIP && !WITH_CONTIKI && !RIOT_VERSION */
+
+#include <stdint.h>
+
+/**
+ * This data type represents internal timer ticks with COAP_TICKS_PER_SECOND
+ * resolution.
+ */
+typedef uint64_t coap_tick_t;
+
+/**
+ * CoAP time in seconds since epoch.
+ */
+typedef time_t coap_time_t;
+
+/**
+ * This data type is used to represent the difference between two clock_tick_t
+ * values. This data type must have the same size in memory as coap_tick_t to
+ * allow wrapping.
+ */
+typedef int64_t coap_tick_diff_t;
+
+/** Use ms resolution on POSIX systems */
+#define COAP_TICKS_PER_SECOND ((coap_tick_t)(1000U))
+
+/**
+ * Initializes the internal clock.
+ */
+void coap_clock_init(void);
+
+/**
+ * Sets @p t to the internal time with COAP_TICKS_PER_SECOND resolution.
+ */
+void coap_ticks(coap_tick_t *t);
+
+/**
+ * Helper function that converts coap ticks to wallclock time. On POSIX, this
+ * function returns the number of seconds since the epoch. On other systems, it
+ * may be the calculated number of seconds since last reboot or so.
+ *
+ * @param t Internal system ticks.
+ *
+ * @return  The number of seconds that has passed since a specific reference
+ *          point (seconds since epoch on POSIX).
+ */
+coap_time_t coap_ticks_to_rt(coap_tick_t t);
+
+/**
+* Helper function that converts coap ticks to POSIX wallclock time in us.
+*
+* @param t Internal system ticks.
+*
+* @return  The number of seconds that has passed since a specific reference
+*          point (seconds since epoch on POSIX).
+*/
+uint64_t coap_ticks_to_rt_us(coap_tick_t t);
+
+/**
+* Helper function that converts POSIX wallclock time in us to coap ticks.
+*
+* @param t POSIX time is us
+*
+* @return  coap ticks
+*/
+coap_tick_t coap_ticks_from_rt_us(uint64_t t);
+#endif
+
+/**
+ * Returns @c 1 if and only if @p a is less than @p b where less is defined on a
+ * signed data type.
+ */
+COAP_STATIC_INLINE int coap_time_lt(coap_tick_t a, coap_tick_t b) {
+  return ((coap_tick_diff_t)(a - b)) < 0;
+}
+
+/**
+ * Returns @c 1 if and only if @p a is less than or equal @p b where less is
+ * defined on a signed data type.
+ */
+COAP_STATIC_INLINE int coap_time_le(coap_tick_t a, coap_tick_t b) {
+  return a == b || coap_time_lt(a,b);
+}
+
+/** @} */
+
+#endif /* COAP_TIME_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/encode.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/encode.h
new file mode 100644
index 00000000000..a79146fc862
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/encode.h
@@ -0,0 +1,120 @@
+/*
+ * encode.h -- encoding and decoding of CoAP data types
+ *
+ * Copyright (C) 2010-2012 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_ENCODE_H_
+#define COAP_ENCODE_H_
+
+#if (BSD >= 199103) || defined(WITH_CONTIKI) || defined(_WIN32)
+# include <string.h>
+#else
+# include <strings.h>
+#endif
+
+#include <stdint.h>
+
+#ifndef HAVE_FLS
+/* include this only if fls() is not available */
+extern int coap_fls(unsigned int i);
+#else
+#define coap_fls(i) fls(i)
+#endif
+
+#ifndef HAVE_FLSLL
+ /* include this only if flsll() is not available */
+extern int coap_flsll(long long i);
+#else
+#define coap_flsll(i) flsll(i)
+#endif
+
+/**
+ * @defgroup encode Encode / Decode API
+ * API functions for endoding/decoding CoAP options.
+ * @{
+ */
+
+/**
+ * Decodes multiple-length byte sequences. @p buf points to an input byte
+ * sequence of length @p length. Returns the up to 4 byte decoded value.
+ *
+ * @param buf The input byte sequence to decode from
+ * @param length The length of the input byte sequence
+ *
+ * @return      The decoded value
+ */
+unsigned int coap_decode_var_bytes(const uint8_t *buf, size_t length);
+
+/**
+ * Decodes multiple-length byte sequences. @p buf points to an input byte
+ * sequence of length @p length. Returns the up to 8 byte decoded value.
+ *
+ * @param buf The input byte sequence to decode from
+ * @param length The length of the input byte sequence
+ *
+ * @return      The decoded value
+ */
+uint64_t coap_decode_var_bytes8(const uint8_t *buf, size_t length);
+
+/**
+ * Encodes multiple-length byte sequences. @p buf points to an output buffer of
+ * sufficient length to store the encoded bytes. @p value is the 4 byte value
+ * to encode.
+ * Returns the number of bytes used to encode @p value or 0 on error.
+ *
+ * @param buf    The output buffer to encode into
+ * @param length The output buffer size to encode into (must be sufficient)
+ * @param value  The value to encode into the buffer
+ *
+ * @return       The number of bytes used to encode @p value or @c 0 on error.
+ */
+unsigned int coap_encode_var_safe(uint8_t *buf,
+                                  size_t length,
+                                  unsigned int value);
+
+/**
+ * Encodes multiple-length byte sequences. @p buf points to an output buffer of
+ * sufficient length to store the encoded bytes. @p value is the 8 byte value
+ * to encode.
+ * Returns the number of bytes used to encode @p value or 0 on error.
+ *
+ * @param buf    The output buffer to encode into
+ * @param length The output buffer size to encode into (must be sufficient)
+ * @param value  The value to encode into the buffer
+ *
+ * @return       The number of bytes used to encode @p value or @c 0 on error.
+ */
+unsigned int coap_encode_var_safe8(uint8_t *buf,
+                                  size_t length,
+                                  uint64_t value);
+
+/** @} */
+
+/**
+ * @deprecated Use coap_encode_var_safe() instead.
+ * Provided for backward compatibility.  As @p value has a
+ * maximum value of 0xffffffff, and buf is usually defined as an array, it
+ * is unsafe to continue to use this variant if buf[] is less than buf[4].
+ *
+ * For example
+ *  char buf[1],oops;
+ *  ..
+ *  coap_encode_var_bytes(buf, 0xfff);
+ * would cause oops to get overwritten.  This error can only be found by code
+ * inspection.
+ *   coap_encode_var_safe(buf, sizeof(buf), 0xfff);
+ * would catch this error at run-time and should be used instead.
+ */
+COAP_STATIC_INLINE COAP_DEPRECATED int
+coap_encode_var_bytes(uint8_t *buf, unsigned int value
+) {
+  return (int)coap_encode_var_safe(buf, sizeof(value), value);
+}
+
+#endif /* COAP_ENCODE_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/libcoap.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/libcoap.h
new file mode 100644
index 00000000000..60ca3b64b90
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/libcoap.h
@@ -0,0 +1,63 @@
+/*
+ * libcoap.h -- platform specific header file for CoAP stack
+ *
+ * Copyright (C) 2015 Carsten Schoenert <c.schoenert@t-online.de>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_LIBCOAP_H_
+#define COAP_LIBCOAP_H_
+
+/* The non posix embedded platforms like Contiki, TinyOS, RIOT, ... doesn't have
+ * a POSIX compatible header structure so we have to slightly do some platform
+ * related things. Currently there is only Contiki available so we check for a
+ * CONTIKI environment and do *not* include the POSIX related network stuff. If
+ * there are other platforms in future there need to be analogous environments.
+ *
+ * The CONTIKI variable is within the Contiki build environment! */
+
+#if defined(_WIN32)
+#pragma comment(lib,"Ws2_32.lib")
+#include <ws2tcpip.h>
+typedef SSIZE_T ssize_t;
+typedef USHORT in_port_t;
+#elif !defined (CONTIKI)
+#include <netinet/in.h>
+#include <sys/socket.h>
+#endif /* CONTIKI */
+
+#ifndef COAP_STATIC_INLINE
+#  if defined(__cplusplus)
+#    define COAP_STATIC_INLINE inline
+#  else
+#    if defined(_MSC_VER)
+#      define COAP_STATIC_INLINE static __inline
+#    else
+#      define COAP_STATIC_INLINE static inline
+#    endif
+#  endif
+#endif
+#ifndef COAP_DEPRECATED
+#  if defined(_MSC_VER)
+#    define COAP_DEPRECATED __declspec(deprecated)
+#  else
+#    define COAP_DEPRECATED __attribute__ ((deprecated))
+#  endif
+#endif
+#ifndef COAP_UNUSED
+#  ifdef __GNUC__
+#    define COAP_UNUSED __attribute__((unused))
+#  else /* __GNUC__ */
+#    define COAP_UNUSED
+#  endif /* __GNUC__ */
+#endif /* COAP_UNUSED */
+
+void coap_startup(void);
+
+void coap_cleanup(void);
+
+#endif /* COAP_LIBCOAP_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/lwippools.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/lwippools.h
new file mode 100644
index 00000000000..445bce4a94a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/lwippools.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/* Memory pool definitions for the libcoap when used with lwIP (which has its
+ * own mechanism for quickly allocating chunks of data with known sizes). Has
+ * to be findable by lwIP (ie. an #include <lwippools.h> must either directly
+ * include this or include something more generic which includes this), and
+ * MEMP_USE_CUSTOM_POOLS has to be set in lwipopts.h. */
+
+#include "coap_internal.h"
+#include "net.h"
+#include "resource.h"
+#include "subscribe.h"
+
+#ifndef MEMP_NUM_COAPCONTEXT
+#define MEMP_NUM_COAPCONTEXT 1
+#endif
+
+#ifndef MEMP_NUM_COAPENDPOINT
+#define MEMP_NUM_COAPENDPOINT 1
+#endif
+
+/* 1 is sufficient as this is very short-lived */
+#ifndef MEMP_NUM_COAPPACKET
+#define MEMP_NUM_COAPPACKET 1
+#endif
+
+#ifndef MEMP_NUM_COAPNODE
+#define MEMP_NUM_COAPNODE 4
+#endif
+
+#ifndef MEMP_NUM_COAPPDU
+#define MEMP_NUM_COAPPDU MEMP_NUM_COAPNODE
+#endif
+
+#ifndef MEMP_NUM_COAPSESSION
+#define MEMP_NUM_COAPSESSION 2
+#endif
+
+#ifndef MEMP_NUM_COAP_SUBSCRIPTION
+#define MEMP_NUM_COAP_SUBSCRIPTION 4
+#endif
+
+#ifndef MEMP_NUM_COAPRESOURCE
+#define MEMP_NUM_COAPRESOURCE 10
+#endif
+
+#ifndef MEMP_NUM_COAPRESOURCEATTR
+#define MEMP_NUM_COAPRESOURCEATTR 20
+#endif
+
+#ifndef MEMP_NUM_COAPOPTLIST
+#define MEMP_NUM_COAPOPTLIST 1
+#endif
+
+#ifndef MEMP_LEN_COAPOPTLIST
+#define MEMP_LEN_COAPOPTLIST 12
+#endif
+
+#ifndef MEMP_NUM_COAPSTRING
+#define MEMP_NUM_COAPSTRING 10
+#endif
+
+#ifndef MEMP_LEN_COAPSTRING
+#define MEMP_LEN_COAPSTRING 32
+#endif
+
+#ifndef MEMP_NUM_COAPCACHE_KEYS
+#define MEMP_NUM_COAPCACHE_KEYS        (2U)
+#endif /* MEMP_NUM_COAPCACHE_KEYS */
+
+#ifndef MEMP_NUM_COAPCACHE_ENTRIES
+#define MEMP_NUM_COAPCACHE_ENTRIES        (2U)
+#endif /* MEMP_NUM_COAPCACHE_ENTRIES */
+
+#ifndef MEMP_NUM_COAPPDUBUF
+#define MEMP_NUM_COAPPDUBUF 2
+#endif
+
+#ifndef MEMP_LEN_COAPPDUBUF
+#define MEMP_LEN_COAPPDUBUF 32
+#endif
+
+#ifndef MEMP_NUM_COAPLGXMIT
+#define MEMP_NUM_COAPLGXMIT 2
+#endif
+
+#ifndef MEMP_NUM_COAPLGCRCV
+#define MEMP_NUM_COAPLGCRCV 2
+#endif
+
+#ifndef MEMP_NUM_COAPLGSRCV
+#define MEMP_NUM_COAPLGSRCV 2
+#endif
+
+LWIP_MEMPOOL(COAP_CONTEXT, MEMP_NUM_COAPCONTEXT, sizeof(coap_context_t), "COAP_CONTEXT")
+LWIP_MEMPOOL(COAP_ENDPOINT, MEMP_NUM_COAPENDPOINT, sizeof(coap_endpoint_t), "COAP_ENDPOINT")
+LWIP_MEMPOOL(COAP_PACKET, MEMP_NUM_COAPPACKET, sizeof(coap_packet_t), "COAP_PACKET")
+LWIP_MEMPOOL(COAP_NODE, MEMP_NUM_COAPNODE, sizeof(coap_queue_t), "COAP_NODE")
+LWIP_MEMPOOL(COAP_PDU, MEMP_NUM_COAPPDU, sizeof(coap_pdu_t), "COAP_PDU")
+LWIP_MEMPOOL(COAP_SESSION, MEMP_NUM_COAPSESSION, sizeof(coap_session_t), "COAP_SESSION")
+LWIP_MEMPOOL(COAP_subscription, MEMP_NUM_COAP_SUBSCRIPTION, sizeof(coap_subscription_t), "COAP_subscription")
+LWIP_MEMPOOL(COAP_RESOURCE, MEMP_NUM_COAPRESOURCE, sizeof(coap_resource_t), "COAP_RESOURCE")
+LWIP_MEMPOOL(COAP_RESOURCEATTR, MEMP_NUM_COAPRESOURCEATTR, sizeof(coap_attr_t), "COAP_RESOURCEATTR")
+LWIP_MEMPOOL(COAP_OPTLIST, MEMP_NUM_COAPOPTLIST, sizeof(coap_optlist_t)+MEMP_LEN_COAPOPTLIST, "COAP_OPTLIST")
+LWIP_MEMPOOL(COAP_STRING, MEMP_NUM_COAPSTRING, sizeof(coap_string_t)+MEMP_LEN_COAPSTRING, "COAP_STRING")
+LWIP_MEMPOOL(COAP_CACHE_KEY, MEMP_NUM_COAPCACHE_KEYS, sizeof(coap_cache_key_t), "COAP_CACHE_KEY")
+LWIP_MEMPOOL(COAP_CACHE_ENTRY, MEMP_NUM_COAPCACHE_ENTRIES, sizeof(coap_cache_entry_t), "COAP_CACHE_ENTRY")
+LWIP_MEMPOOL(COAP_PDU_BUF, MEMP_NUM_COAPPDUBUF, MEMP_LEN_COAPPDUBUF, "COAP_PDU_BUF")
+LWIP_MEMPOOL(COAP_LG_XMIT, MEMP_NUM_COAPLGXMIT, sizeof(coap_lg_xmit_t), "COAP_LG_XMIT")
+LWIP_MEMPOOL(COAP_LG_CRCV, MEMP_NUM_COAPLGCRCV, sizeof(coap_lg_crcv_t), "COAP_LG_CRCV")
+LWIP_MEMPOOL(COAP_LG_SRCV, MEMP_NUM_COAPLGSRCV, sizeof(coap_lg_srcv_t), "COAP_LG_SRCV")
+
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/mem.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/mem.h
new file mode 100644
index 00000000000..c42008963da
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/mem.h
@@ -0,0 +1,139 @@
+/*
+ * mem.h -- CoAP memory handling
+ *
+ * Copyright (C) 2010-2011,2014-2015 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_MEM_H_
+#define COAP_MEM_H_
+
+#include <stdlib.h>
+
+#ifndef WITH_LWIP
+/**
+ * Initializes libcoap's memory management.
+ * This function must be called once before coap_malloc() can be used on
+ * constrained devices.
+ */
+void coap_memory_init(void);
+#endif /* WITH_LWIP */
+
+/**
+ * Type specifiers for coap_malloc_type(). Memory objects can be typed to
+ * facilitate arrays of type objects to be used instead of dynamic memory
+ * management on constrained devices.
+ */
+typedef enum {
+  COAP_STRING,
+  COAP_ATTRIBUTE_NAME,
+  COAP_ATTRIBUTE_VALUE,
+  COAP_PACKET,
+  COAP_NODE,
+  COAP_CONTEXT,
+  COAP_ENDPOINT,
+  COAP_PDU,
+  COAP_PDU_BUF,
+  COAP_RESOURCE,
+  COAP_RESOURCEATTR,
+#ifdef HAVE_LIBTINYDTLS
+  COAP_DTLS_SESSION,
+#endif
+  COAP_SESSION,
+  COAP_OPTLIST,
+  COAP_CACHE_KEY,
+  COAP_CACHE_ENTRY,
+  COAP_LG_XMIT,
+  COAP_LG_CRCV,
+  COAP_LG_SRCV,
+} coap_memory_tag_t;
+
+#ifndef WITH_LWIP
+
+/**
+ * Allocates a chunk of @p size bytes and returns a pointer to the newly
+ * allocated memory. The @p type is used to select the appropriate storage
+ * container on constrained devices. The storage allocated by coap_malloc_type()
+ * must be released with coap_free_type().
+ *
+ * @param type The type of object to be stored.
+ * @param size The number of bytes requested.
+ * @return     A pointer to the allocated storage or @c NULL on error.
+ */
+void *coap_malloc_type(coap_memory_tag_t type, size_t size);
+
+/**
+ * Reallocates a chunk @p p of bytes created by coap_malloc_type() or
+ * coap_realloc_type() and returns a pointer to the newly allocated memory of
+ * @p size.
+ * Only COAP_STRING type is supported.
+ *
+ * Note: If there is an error, @p p will separately need to be released by
+ * coap_free_type().
+ *
+ * @param type The type of object to be stored.
+ * @param p    A pointer to memory that was allocated by coap_malloc_type().
+ * @param size The number of bytes requested.
+ * @return     A pointer to the allocated storage or @c NULL on error.
+ */
+void *coap_realloc_type(coap_memory_tag_t type, void *p, size_t size);
+
+/**
+ * Releases the memory that was allocated by coap_malloc_type(). The type tag @p
+ * type must be the same that was used for allocating the object pointed to by
+ * @p .
+ *
+ * @param type The type of the object to release.
+ * @param p    A pointer to memory that was allocated by coap_malloc_type().
+ */
+void coap_free_type(coap_memory_tag_t type, void *p);
+
+/**
+ * Wrapper function to coap_malloc_type() for backwards compatibility.
+ */
+COAP_STATIC_INLINE void *coap_malloc(size_t size) {
+  return coap_malloc_type(COAP_STRING, size);
+}
+
+/**
+ * Wrapper function to coap_free_type() for backwards compatibility.
+ */
+COAP_STATIC_INLINE void coap_free(void *object) {
+  coap_free_type(COAP_STRING, object);
+}
+
+#endif /* not WITH_LWIP */
+
+#ifdef WITH_LWIP
+
+#include <lwip/memp.h>
+
+/* no initialization needed with lwip (or, more precisely: lwip must be
+ * completely initialized anyway by the time coap gets active)  */
+COAP_STATIC_INLINE void coap_memory_init(void) {}
+
+/* It would be nice to check that size equals the size given at the memp
+ * declaration, but i currently don't see a standard way to check that without
+ * sourcing the custom memp pools and becoming dependent of its syntax
+ */
+#define coap_malloc_type(type, size) memp_malloc(MEMP_ ## type)
+#define coap_free_type(type, p) memp_free(MEMP_ ## type, p)
+
+/* Those are just here to make uri.c happy where string allocation has not been
+ * made conditional.
+ */
+COAP_STATIC_INLINE void *coap_malloc(size_t size) {
+  LWIP_ASSERT("coap_malloc must not be used in lwIP", 0);
+}
+
+COAP_STATIC_INLINE void coap_free(void *pointer) {
+  LWIP_ASSERT("coap_free must not be used in lwIP", 0);
+}
+
+#endif /* WITH_LWIP */
+
+#endif /* COAP_MEM_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/net.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/net.h
new file mode 100644
index 00000000000..ea5a2cba1bb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/net.h
@@ -0,0 +1,780 @@
+/*
+ * net.h -- CoAP network interface
+ *
+ * Copyright (C) 2010-2021 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_NET_H_
+#define COAP_NET_H_
+
+#include <stdlib.h>
+#include <string.h>
+#ifndef _WIN32
+#include <sys/select.h>
+#include <sys/time.h>
+#endif
+#include <time.h>
+
+#ifdef WITH_LWIP
+#include <lwip/ip_addr.h>
+#endif
+
+#include "coap_io.h"
+#include "coap_dtls.h"
+#include "coap_event.h"
+#include "pdu.h"
+#include "coap_session.h"
+
+/**
+ * @defgroup context Context Handling
+ * API functions for handling PDUs using CoAP Contexts
+ * @{
+ */
+
+typedef enum coap_response_t {
+  COAP_RESPONSE_FAIL, /**< Response not liked - send CoAP RST packet */
+  COAP_RESPONSE_OK    /**< Response is fine */
+} coap_response_t;
+
+/**
+ * Response handler that is used as callback in coap_context_t.
+ *
+ * @param session CoAP session.
+ * @param sent The PDU that was transmitted.
+ * @param received The PDU that was received.
+ * @param mid CoAP transaction ID.
+
+ * @return @c COAP_RESPONSE_OK if successful, else @c COAP_RESPONSE_FAIL which
+ *         triggers sending a RST packet.
+ */
+typedef coap_response_t (*coap_response_handler_t)(coap_session_t *session,
+                                                   const coap_pdu_t *sent,
+                                                   const coap_pdu_t *received,
+                                                   const coap_mid_t mid);
+
+/**
+ * Negative Acknowedge handler that is used as callback in coap_context_t.
+ *
+ * @param session CoAP session.
+ * @param sent The PDU that was transmitted.
+ * @param reason The reason for the NACK.
+ * @param mid CoAP message ID.
+ */
+typedef void (*coap_nack_handler_t)(coap_session_t *session,
+                                    const coap_pdu_t *sent,
+                                    const coap_nack_reason_t reason,
+                                    const coap_mid_t mid);
+
+/**
+ * Received Ping handler that is used as callback in coap_context_t.
+ *
+ * @param session CoAP session.
+ * @param received The PDU that was received.
+ * @param mid CoAP message ID.
+ */
+typedef void (*coap_ping_handler_t)(coap_session_t *session,
+                                    const coap_pdu_t *received,
+                                    const coap_mid_t mid);
+
+/**
+ * Received Pong handler that is used as callback in coap_context_t.
+ *
+ * @param session CoAP session.
+ * @param received The PDU that was received.
+ * @param mid CoAP message ID.
+ */
+typedef void (*coap_pong_handler_t)(coap_session_t *session,
+                                    const coap_pdu_t *received,
+                                    const coap_mid_t mid);
+
+/**
+ * Registers a new message handler that is called whenever a response is
+ * received.
+ *
+ * @param context The context to register the handler for.
+ * @param handler The response handler to register.
+ */
+void
+coap_register_response_handler(coap_context_t *context,
+                               coap_response_handler_t handler);
+
+/**
+ * Registers a new message handler that is called whenever a confirmable
+ * message (request or response) is dropped after all retries have been
+ * exhausted, or a rst message was received, or a network or TLS level
+ * event was received that indicates delivering the message is not possible.
+ *
+ * @param context The context to register the handler for.
+ * @param handler The nack handler to register.
+ */
+void
+coap_register_nack_handler(coap_context_t *context,
+                           coap_nack_handler_t handler);
+
+/**
+ * Registers a new message handler that is called whenever a CoAP Ping
+ * message is received.
+ *
+ * @param context The context to register the handler for.
+ * @param handler The ping handler to register.
+ */
+void
+coap_register_ping_handler(coap_context_t *context,
+                           coap_ping_handler_t handler);
+
+/**
+ * Registers a new message handler that is called whenever a CoAP Pong
+ * message is received.
+ *
+ * @param context The context to register the handler for.
+ * @param handler The pong handler to register.
+ */
+void
+coap_register_pong_handler(coap_context_t *context,
+                           coap_pong_handler_t handler);
+
+/**
+ * Registers the option type @p type with the given context object @p ctx.
+ *
+ * @param ctx  The context to use.
+ * @param type The option type to register.
+ */
+void
+coap_register_option(coap_context_t *ctx, uint16_t type);
+
+/**
+ * Creates a new coap_context_t object that will hold the CoAP stack status.
+ */
+coap_context_t *coap_new_context(const coap_address_t *listen_addr);
+
+/**
+ * Set the context's default PSK hint and/or key for a server.
+ *
+ * @param context The current coap_context_t object.
+ * @param hint    The default PSK server hint sent to a client. If NULL, PSK
+ *                authentication is disabled. Empty string is a valid hint.
+ * @param key     The default PSK key. If NULL, PSK authentication will fail.
+ * @param key_len The default PSK key's length. If @p 0, PSK authentication will
+ *                fail.
+ *
+ * @return @c 1 if successful, else @c 0.
+ */
+int coap_context_set_psk( coap_context_t *context, const char *hint,
+                           const uint8_t *key, size_t key_len );
+
+/**
+ * Set the context's default PSK hint and/or key for a server.
+ *
+ * @param context    The current coap_context_t object.
+ * @param setup_data If NULL, PSK authentication will fail. PSK
+ *                   information required.
+ *
+ * @return @c 1 if successful, else @c 0.
+ */
+int coap_context_set_psk2(coap_context_t *context,
+                          coap_dtls_spsk_t *setup_data);
+
+/**
+ * Set the context's default PKI information for a server.
+ *
+ * @param context        The current coap_context_t object.
+ * @param setup_data     If NULL, PKI authentication will fail. Certificate
+ *                       information required.
+ *
+ * @return @c 1 if successful, else @c 0.
+ */
+int
+coap_context_set_pki(coap_context_t *context,
+                     const coap_dtls_pki_t *setup_data);
+
+/**
+ * Set the context's default Root CA information for a client or server.
+ *
+ * @param context        The current coap_context_t object.
+ * @param ca_file        If not NULL, is the full path name of a PEM encoded
+ *                       file containing all the Root CAs to be used.
+ * @param ca_dir         If not NULL, points to a directory containing PEM
+ *                       encoded files containing all the Root CAs to be used.
+ *
+ * @return @c 1 if successful, else @c 0.
+ */
+int
+coap_context_set_pki_root_cas(coap_context_t *context,
+                              const char *ca_file,
+                              const char *ca_dir);
+
+/**
+ * Set the context keepalive timer for sessions.
+ * A keepalive message will be sent after if a session has been inactive,
+ * i.e. no packet sent or received, for the given number of seconds.
+ * For unreliable protocols, a CoAP Empty message will be sent. If a
+ * CoAP RST is not received, the CoAP Empty messages will get resent based
+ * on the Confirmable retry parameters until there is a failure timeout,
+ * at which point the session will be considered as disconnected.
+ * For reliable protocols, a CoAP PING message will be sent. If a CoAP PONG
+ * has not been received before the next PING is due to be sent, the session
+ * will be considered as disconnected.
+ *
+ * @param context        The coap_context_t object.
+ * @param seconds        Number of seconds for the inactivity timer, or zero
+ *                       to disable CoAP-level keepalive messages.
+ */
+void coap_context_set_keepalive(coap_context_t *context, unsigned int seconds);
+
+/**
+ * Get the libcoap internal file descriptor for using in an application's
+ * select() or returned as an event in an application's epoll_wait() call.
+ *
+ * @param context        The coap_context_t object.
+ *
+ * @return The libcoap file descriptor or @c -1 if epoll is not available.
+ */
+int coap_context_get_coap_fd(const coap_context_t *context);
+
+/**
+ * Set the maximum idle sessions count. The number of server sessions that
+ * are currently not in use. If this number is exceeded, the least recently
+ * used server session is completely removed.
+ * 0 (the default) means that the number is not monitored.
+ *
+ * @param context           The coap_context_t object.
+ * @param max_idle_sessions The maximum idle session count.
+ */
+void
+coap_context_set_max_idle_sessions(coap_context_t *context,
+                                   unsigned int max_idle_sessions);
+
+/**
+ * Get the maximum idle sessions count.
+ *
+ * @param context The coap_context_t object.
+ *
+ * @return The count of max idle sessions.
+ */
+unsigned int
+coap_context_get_max_idle_sessions(const coap_context_t *context);
+
+/**
+ * Set the session timeout value. The number of seconds of inactivity after
+ * which an unused server session will be closed.
+ * 0 means use default (300 secs).
+ *
+ * @param context         The coap_context_t object.
+ * @param session_timeout The session timeout value.
+ */
+void
+coap_context_set_session_timeout(coap_context_t *context,
+                                   unsigned int session_timeout);
+
+/**
+ * Get the session timeout value
+ *
+ * @param context The coap_context_t object.
+ *
+ * @return The session timeout value.
+ */
+unsigned int
+coap_context_get_session_timeout(const coap_context_t *context);
+
+/**
+ * Set the CSM timeout value. The number of seconds to wait for a (TCP) CSM
+ * negotiation response from the peer.
+ * 0 (the default) means use wait forever.
+ *
+ * @param context    The coap_context_t object.
+ * @param csm_tmeout The CSM timeout value.
+ */
+void
+coap_context_set_csm_timeout(coap_context_t *context,
+                             unsigned int csm_tmeout);
+
+/**
+ * Get the CSM timeout value
+ *
+ * @param context The coap_context_t object.
+ *
+ * @return The CSM timeout value.
+ */
+unsigned int
+coap_context_get_csm_timeout(const coap_context_t *context);
+
+/**
+ * Set the maximum number of sessions in (D)TLS handshake value. If this number
+ * is exceeded, the least recently used server session in handshake is
+ * completely removed.
+ * 0 (the default) means that the number is not monitored.
+ *
+ * @param context         The coap_context_t object.
+ * @param max_handshake_sessions The maximum number of sessions in handshake.
+ */
+void
+coap_context_set_max_handshake_sessions(coap_context_t *context,
+                                        unsigned int max_handshake_sessions);
+
+/**
+ * Get the session timeout value
+ *
+ * @param context The coap_context_t object.
+ *
+ * @return The maximim number of sessions in (D)TLS handshake value.
+ */
+unsigned int
+coap_context_get_max_handshake_sessions(const coap_context_t *context);
+
+/**
+ * Returns a new message id and updates @p session->tx_mid accordingly. The
+ * message id is returned in network byte order to make it easier to read in
+ * tracing tools.
+ *
+ * @param session The current coap_session_t object.
+ *
+ * @return        Incremented message id in network byte order.
+ */
+uint16_t coap_new_message_id(coap_session_t *session);
+
+/**
+ * CoAP stack context must be released with coap_free_context(). This function
+ * clears all entries from the receive queue and send queue and deletes the
+ * resources that have been registered with @p context, and frees the attached
+ * endpoints.
+ *
+ * @param context The current coap_context_t object to free off.
+ */
+void coap_free_context(coap_context_t *context);
+
+/**
+ * Stores @p data with the given CoAP context. This function
+ * overwrites any value that has previously been stored with @p
+ * context.
+ *
+ * @param context The CoAP context.
+ * @param data The data to store with wih the context. Note that this data
+ *             must be valid during the lifetime of @p context.
+ */
+void coap_set_app_data(coap_context_t *context, void *data);
+
+/**
+ * Returns any application-specific data that has been stored with @p
+ * context using the function coap_set_app_data(). This function will
+ * return @c NULL if no data has been stored.
+ *
+ * @param context The CoAP context.
+ *
+ * @return The data previously stored or @c NULL if not data stored.
+ */
+void *coap_get_app_data(const coap_context_t *context);
+
+/**
+ * Creates a new ACK PDU with specified error @p code. The options specified by
+ * the filter expression @p opts will be copied from the original request
+ * contained in @p request. Unless @c SHORT_ERROR_RESPONSE was defined at build
+ * time, the textual reason phrase for @p code will be added as payload, with
+ * Content-Type @c 0.
+ * This function returns a pointer to the new response message, or @c NULL on
+ * error. The storage allocated for the new message must be released with
+ * coap_free().
+ *
+ * @param request Specification of the received (confirmable) request.
+ * @param code    The error code to set.
+ * @param opts    An option filter that specifies which options to copy from
+ *                the original request in @p node.
+ *
+ * @return        A pointer to the new message or @c NULL on error.
+ */
+coap_pdu_t *coap_new_error_response(const coap_pdu_t *request,
+                                    coap_pdu_code_t code,
+                                    coap_opt_filter_t *opts);
+
+/**
+ * Sends an error response with code @p code for request @p request to @p dst.
+ * @p opts will be passed to coap_new_error_response() to copy marked options
+ * from the request. This function returns the message id if the message was
+ * sent, or @c COAP_INVALID_MID otherwise.
+ *
+ * @param session         The CoAP session.
+ * @param request         The original request to respond to.
+ * @param code            The response code.
+ * @param opts            A filter that specifies the options to copy from the
+ *                        @p request.
+ *
+ * @return                The message id if the message was sent, or @c
+ *                        COAP_INVALID_MID otherwise.
+ */
+coap_mid_t coap_send_error(coap_session_t *session,
+                           const coap_pdu_t *request,
+                           coap_pdu_code_t code,
+                           coap_opt_filter_t *opts);
+
+/**
+ * Helper function to create and send a message with @p type (usually ACK or
+ * RST). This function returns @c COAP_INVALID_MID when the message was not
+ * sent, a valid transaction id otherwise.
+ *
+ * @param session         The CoAP session.
+ * @param request         The request that should be responded to.
+ * @param type            Which type to set.
+ * @return                message id on success or @c COAP_INVALID_MID
+ *                        otherwise.
+ */
+coap_mid_t
+coap_send_message_type(coap_session_t *session, const coap_pdu_t *request,
+                       coap_pdu_type_t type);
+
+/**
+ * Sends an ACK message with code @c 0 for the specified @p request to @p dst.
+ * This function returns the corresponding message id if the message was
+ * sent or @c COAP_INVALID_MID on error.
+ *
+ * @param session         The CoAP session.
+ * @param request         The request to be acknowledged.
+ *
+ * @return                The message id if ACK was sent or @c
+ *                        COAP_INVALID_MID on error.
+ */
+coap_mid_t coap_send_ack(coap_session_t *session, const coap_pdu_t *request);
+
+/**
+ * Sends an RST message with code @c 0 for the specified @p request to @p dst.
+ * This function returns the corresponding message id if the message was
+ * sent or @c COAP_INVALID_MID on error.
+ *
+ * @param session         The CoAP session.
+ * @param request         The request to be reset.
+ *
+ * @return                The message id if RST was sent or @c
+ *                        COAP_INVALID_MID on error.
+ */
+COAP_STATIC_INLINE coap_mid_t
+coap_send_rst(coap_session_t *session, const coap_pdu_t *request) {
+  return coap_send_message_type(session, request, COAP_MESSAGE_RST);
+}
+
+/**
+* Sends a CoAP message to given peer. The memory that is
+* allocated for the pdu will be released by coap_send().
+* The caller must not use the pdu after calling coap_send().
+*
+* @param session         The CoAP session.
+* @param pdu             The CoAP PDU to send.
+*
+* @return                The message id of the sent message or @c
+*                        COAP_INVALID_MID on error.
+*/
+coap_mid_t coap_send( coap_session_t *session, coap_pdu_t *pdu );
+
+#define coap_send_large(session, pdu) coap_send(session, pdu)
+
+/**
+ * Invokes the event handler of @p context for the given @p event and
+ * @p data.
+ *
+ * @param context The CoAP context whose event handler is to be called.
+ * @param event   The event to deliver.
+ * @param session The session related to @p event.
+ * @return The result from the associated event handler or 0 if none was
+ * registered.
+ */
+int coap_handle_event(coap_context_t *context,
+                      coap_event_t event,
+                      coap_session_t *session);
+/**
+ * Returns 1 if there are no messages to send or to dispatch in the context's
+ * queues. */
+int coap_can_exit(coap_context_t *context);
+
+/**
+ * Returns the current value of an internal tick counter. The counter counts \c
+ * COAP_TICKS_PER_SECOND ticks every second.
+ */
+void coap_ticks(coap_tick_t *);
+
+/**
+ * Function interface for joining a multicast group for listening for the
+ * currently defined endpoints that are UDP.
+ *
+ * @param ctx       The current context.
+ * @param groupname The name of the group that is to be joined for listening.
+ * @param ifname    Network interface to join the group on, or NULL if first
+ *                  appropriate interface is to be chosen by the O/S.
+ *
+ * @return       0 on success, -1 on error
+ */
+int
+coap_join_mcast_group_intf(coap_context_t *ctx, const char *groupname,
+                           const char *ifname);
+
+#define coap_join_mcast_group(ctx, groupname) \
+            (coap_join_mcast_group_intf(ctx, groupname, NULL))
+
+/**
+ * Function interface for defining the hop count (ttl) for sending
+ * multicast traffic
+ *
+ * @param session The current contexsion.
+ * @param hops    The number of hops (ttl) to use before the multicast
+ *                packet expires.
+ *
+ * @return       1 on success, 0 on error
+ */
+int
+coap_mcast_set_hops(coap_session_t *session, size_t hops);
+
+/**@}*/
+
+/**
+ * @defgroup app_io Application I/O Handling
+ * API functions for Application Input / Output
+ * @{
+ */
+
+#define COAP_IO_WAIT    0
+#define COAP_IO_NO_WAIT ((uint32_t)-1)
+
+/**
+ * The main I/O processing function.  All pending network I/O is completed,
+ * and then optionally waits for the next input packet.
+ *
+ * This internally calls coap_io_prepare_io(), then select() for the appropriate
+ * sockets, updates COAP_SOCKET_CAN_xxx where appropriate and then calls
+ * coap_io_do_io() before returning with the time spent in the function.
+ *
+ * Alternatively, if libcoap is compiled with epoll support, this internally
+ * calls coap_io_prepare_epoll(), then epoll_wait() for waiting for any file
+ * descriptors that have (internally) been set up with epoll_ctl() and
+ * finally coap_io_do_epoll() before returning with the time spent in the
+ * function.
+ *
+ * @param ctx The CoAP context
+ * @param timeout_ms Minimum number of milliseconds to wait for new packets
+ *                   before returning after doing any processing.
+ *                   If COAP_IO_WAIT, the call will block until the next
+ *                   internal action (e.g. packet retransmit) if any, or block
+ *                   until the next packet is received whichever is the sooner
+ *                   and do the necessary processing.
+ *                   If COAP_IO_NO_WAIT, the function will return immediately
+ *                   after processing without waiting for any new input
+ *                   packets to arrive.
+ *
+ * @return Number of milliseconds spent in function or @c -1 if there was
+ *         an error
+ */
+int coap_io_process(coap_context_t *ctx, uint32_t timeout_ms);
+
+#ifndef RIOT_VERSION
+/**
+ * The main message processing loop with additional fds for internal select.
+ *
+ * @param ctx The CoAP context
+ * @param timeout_ms Minimum number of milliseconds to wait for new packets
+ *                   before returning after doing any processing.
+ *                   If COAP_IO_WAIT, the call will block until the next
+ *                   internal action (e.g. packet retransmit) if any, or block
+ *                   until the next packet is received whichever is the sooner
+ *                   and do the necessary processing.
+ *                   If COAP_IO_NO_WAIT, the function will return immediately
+ *                   after processing without waiting for any new input
+ *                   packets to arrive.
+ * @param nfds      The maximum FD set in readfds, writefds or exceptfds
+ *                  plus one,
+ * @param readfds   Read FDs to additionally check for in internal select()
+ *                  or NULL if not required.
+ * @param writefds  Write FDs to additionally check for in internal select()
+ *                  or NULL if not required.
+ * @param exceptfds Except FDs to additionally check for in internal select()
+ *                  or NULL if not required.
+ *
+ *
+ * @return Number of milliseconds spent in coap_io_process_with_fds, or @c -1
+ *         if there was an error.  If defined, readfds, writefds, exceptfds
+ *         are updated as returned by the internal select() call.
+ */
+int coap_io_process_with_fds(coap_context_t *ctx, uint32_t timeout_ms,
+                             int nfds, fd_set *readfds, fd_set *writefds,
+                             fd_set *exceptfds);
+#endif /* !RIOT_VERSION */
+
+/**@}*/
+
+/**
+ * @defgroup app_io_internal Application I/O Handling (Internal)
+ * Internal API functions for Application Input / Output
+ * @{
+ */
+
+/**
+* Iterates through all the coap_socket_t structures embedded in endpoints or
+* sessions associated with the @p ctx to determine which are wanting any
+* read, write, accept or connect I/O (COAP_SOCKET_WANT_xxx is set). If set,
+* the coap_socket_t is added to the @p sockets.
+*
+* Any now timed out delayed packet is transmitted, along with any packets
+* associated with requested observable response.
+*
+* In addition, it returns when the next expected I/O is expected to take place
+* (e.g. a packet retransmit).
+*
+* Prior to calling coap_io_do_io(), the @p sockets must be tested to see
+* if any of the COAP_SOCKET_WANT_xxx have the appropriate information and if
+* so, COAP_SOCKET_CAN_xxx is set. This typically will be done after using a
+* select() call.
+*
+* Note: If epoll support is compiled into libcoap, coap_io_prepare_epoll() must
+* be used instead of coap_io_prepare_io().
+*
+* Internal function.
+*
+* @param ctx The CoAP context
+* @param sockets Array of socket descriptors, filled on output
+* @param max_sockets Size of socket array.
+* @param num_sockets Pointer to the number of valid entries in the socket
+*                    arrays on output.
+* @param now Current time.
+*
+* @return timeout Maxmimum number of milliseconds that can be used by a
+*                 select() to wait for network events or 0 if wait should be
+*                 forever.
+*/
+unsigned int
+coap_io_prepare_io(coap_context_t *ctx,
+  coap_socket_t *sockets[],
+  unsigned int max_sockets,
+  unsigned int *num_sockets,
+  coap_tick_t now
+);
+
+/**
+ * Processes any outstanding read, write, accept or connect I/O as indicated
+ * in the coap_socket_t structures (COAP_SOCKET_CAN_xxx set) embedded in
+ * endpoints or sessions associated with @p ctx.
+ *
+ * Note: If epoll support is compiled into libcoap, coap_io_do_epoll() must
+ * be used instead of coap_io_do_io().
+ *
+ * Internal function.
+ *
+ * @param ctx The CoAP context
+ * @param now Current time
+ */
+void coap_io_do_io(coap_context_t *ctx, coap_tick_t now);
+
+/**
+ * Any now timed out delayed packet is transmitted, along with any packets
+ * associated with requested observable response.
+ *
+ * In addition, it returns when the next expected I/O is expected to take place
+ * (e.g. a packet retransmit).
+ *
+ * Note: If epoll support is compiled into libcoap, coap_io_prepare_epoll() must
+ * be used instead of coap_io_prepare_io().
+ *
+ * Internal function.
+ *
+ * @param ctx The CoAP context
+ * @param now Current time.
+ *
+ * @return timeout Maxmimum number of milliseconds that can be used by a
+ *                 epoll_wait() to wait for network events or 0 if wait should be
+ *                 forever.
+ */
+unsigned int
+coap_io_prepare_epoll(coap_context_t *ctx, coap_tick_t now);
+
+struct epoll_event;
+
+/**
+ * Process all the epoll events
+ *
+ * Note: If epoll support is compiled into libcoap, coap_io_do_epoll() must
+ * be used instead of coap_io_do_io().
+ *
+ * Internal function
+ *
+ * @param ctx    The current CoAP context.
+ * @param events The list of events returned from an epoll_wait() call.
+ * @param nevents The number of events.
+ *
+ */
+void coap_io_do_epoll(coap_context_t *ctx, struct epoll_event* events,
+                      size_t nevents);
+
+/**@}*/
+
+/**
+ * @deprecated Use coap_io_process() instead.
+ *
+ * This function just calls coap_io_process().
+ *
+ * @param ctx The CoAP context
+ * @param timeout_ms Minimum number of milliseconds to wait for new packets
+ *                   before returning after doing any processing.
+ *                   If COAP_IO_WAIT, the call will block until the next
+ *                   internal action (e.g. packet retransmit) if any, or block
+ *                   until the next packet is received whichever is the sooner
+ *                   and do the necessary processing.
+ *                   If COAP_IO_NO_WAIT, the function will return immediately
+ *                   after processing without waiting for any new input
+ *                   packets to arrive.
+ *
+ * @return Number of milliseconds spent in function or @c -1 if there was
+ *         an error
+ */
+COAP_STATIC_INLINE COAP_DEPRECATED int
+coap_run_once(coap_context_t *ctx, uint32_t timeout_ms)
+{
+  return coap_io_process(ctx, timeout_ms);
+}
+
+/**
+* @deprecated Use coap_io_prepare_io() instead.
+*
+* This function just calls coap_io_prepare_io().
+*
+* Internal function.
+*
+* @param ctx The CoAP context
+* @param sockets Array of socket descriptors, filled on output
+* @param max_sockets Size of socket array.
+* @param num_sockets Pointer to the number of valid entries in the socket
+*                    arrays on output.
+* @param now Current time.
+*
+* @return timeout Maxmimum number of milliseconds that can be used by a
+*                 select() to wait for network events or 0 if wait should be
+*                 forever.
+*/
+COAP_STATIC_INLINE COAP_DEPRECATED unsigned int
+coap_write(coap_context_t *ctx,
+  coap_socket_t *sockets[],
+  unsigned int max_sockets,
+  unsigned int *num_sockets,
+  coap_tick_t now
+) {
+  return coap_io_prepare_io(ctx, sockets, max_sockets, num_sockets, now);
+}
+
+/**
+ * @deprecated Use coap_io_do_io() instead.
+ *
+ * This function just calls coap_io_do_io().
+ *
+ * Internal function.
+ *
+ * @param ctx The CoAP context
+ * @param now Current time
+ */
+COAP_STATIC_INLINE COAP_DEPRECATED void
+coap_read(coap_context_t *ctx, coap_tick_t now
+) {
+  coap_io_do_io(ctx, now);
+}
+
+/* Old definitions which may be hanging around in old code - be helpful! */
+#define COAP_RUN_NONBLOCK COAP_RUN_NONBLOCK_deprecated_use_COAP_IO_NO_WAIT
+#define COAP_RUN_BLOCK COAP_RUN_BLOCK_deprecated_use_COAP_IO_WAIT
+
+#endif /* COAP_NET_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/option.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/option.h
new file mode 100644
index 00000000000..c01e8f6688b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/option.h
@@ -0,0 +1,439 @@
+/*
+ * option.h -- helpers for handling options in CoAP PDUs
+ *
+ * Copyright (C) 2010-2013 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file option.h
+ * @brief Helpers for handling options in CoAP PDUs
+ */
+
+#ifndef COAP_OPTION_H_
+#define COAP_OPTION_H_
+
+typedef uint16_t coap_option_num_t;
+
+/**
+ * Use byte-oriented access methods here because sliding a complex struct
+ * coap_opt_t over the data buffer may cause bus error on certain platforms.
+ */
+typedef uint8_t coap_opt_t;
+#define PCHAR(p) ((coap_opt_t *)(p))
+
+/**
+ * Representation of CoAP options.
+ */
+typedef struct {
+  uint16_t delta;
+  size_t length;
+  const uint8_t *value;
+} coap_option_t;
+
+/**
+ * Parses the option pointed to by @p opt into @p result. This function returns
+ * the number of bytes that have been parsed, or @c 0 on error. An error is
+ * signaled when illegal delta or length values are encountered or when option
+ * parsing would result in reading past the option (i.e. beyond opt + length).
+ *
+ * @param opt    The beginning of the option to parse.
+ * @param length The maximum length of @p opt.
+ * @param result A pointer to the coap_option_t structure that is filled with
+ *               actual values iff coap_opt_parse() > 0.
+ * @return       The number of bytes parsed or @c 0 on error.
+ */
+size_t coap_opt_parse(const coap_opt_t *opt,
+                      size_t length,
+                      coap_option_t *result);
+
+/**
+ * Returns the size of the given option, taking into account a possible option
+ * jump.
+ *
+ * @param opt An option jump or the beginning of the option.
+ * @return    The number of bytes between @p opt and the end of the option
+ *            starting at @p opt. In case of an error, this function returns
+ *            @c 0 as options need at least one byte storage space.
+ */
+size_t coap_opt_size(const coap_opt_t *opt);
+
+/**
+ * @defgroup opt_filter Option Filters
+ * API functions for access option filters
+ * @{
+ */
+
+/**
+ * The number of option types below 256 that can be stored in an
+ * option filter. COAP_OPT_FILTER_SHORT + COAP_OPT_FILTER_LONG must be
+ * at most 16. Each coap_option_filter_t object reserves
+ * ((COAP_OPT_FILTER_SHORT + 1) / 2) * 2 bytes for short options.
+ */
+#define COAP_OPT_FILTER_SHORT 6
+
+/**
+ * The number of option types above 255 that can be stored in an
+ * option filter. COAP_OPT_FILTER_SHORT + COAP_OPT_FILTER_LONG must be
+ * at most 16. Each coap_option_filter_t object reserves
+ * COAP_OPT_FILTER_LONG * 2 bytes for short options.
+ */
+#define COAP_OPT_FILTER_LONG  2
+
+/* Ensure that COAP_OPT_FILTER_SHORT and COAP_OPT_FILTER_LONG are set
+ * correctly. */
+#if (COAP_OPT_FILTER_SHORT + COAP_OPT_FILTER_LONG > 16)
+#error COAP_OPT_FILTER_SHORT + COAP_OPT_FILTER_LONG must be less or equal 16
+#endif /* (COAP_OPT_FILTER_SHORT + COAP_OPT_FILTER_LONG > 16) */
+
+/*
+ * mask contains a bit vector that indicates which fields in the long_opts[]
+ * and subsequent short_opts[] are used. The first COAP_OPT_FILTER_LONG bits
+ * correspond to the long option types that are stored in long_opts[]
+ * elements. The next COAP_OPT_FILTER_SHORT bits correspond to the short
+ * option types that are stored in short_opts[].
+ */
+typedef struct coap_opt_filter_t {
+  uint16_t mask;
+  uint16_t long_opts[COAP_OPT_FILTER_LONG];
+  uint8_t short_opts[COAP_OPT_FILTER_SHORT];
+} coap_opt_filter_t;
+
+/** Pre-defined filter that includes all options. */
+#define COAP_OPT_ALL NULL
+
+/**
+ * Clears filter @p filter.
+ *
+ * @param filter The filter to clear.
+ */
+void
+coap_option_filter_clear(coap_opt_filter_t *filter);
+
+/**
+ * Sets the corresponding entry for @p number in @p filter. This
+ * function returns @c 1 if bit was set or @c 0 on error (i.e. when
+ * the given number does not fit in the filter).
+ *
+ * @param filter The filter object to change.
+ * @param number The option number for which the bit should be set.
+ *
+ * @return       @c 1 if bit was set, @c 0 otherwise.
+ */
+int coap_option_filter_set(coap_opt_filter_t *filter, coap_option_num_t number);
+
+/**
+ * Clears the corresponding entry for @p number in @p filter. This
+ * function returns @c 1 if bit was set or @c 0 on error (i.e. when
+ * the given number does not fit in the filter).
+ *
+ * @param filter The filter object to change.
+ * @param number The option number that should be cleared from the filter.
+ *
+ * @return       @c 1 if bit was set, @c 0 otherwise.
+ */
+int coap_option_filter_unset(coap_opt_filter_t *filter,
+                             coap_option_num_t number);
+
+/**
+ * Checks if @p number is contained in @p filter. This function returns
+ * @c 1 if found, @c 0 if not, or @c -1 on error (i.e. when the given
+ * number does not fit in the filter).
+ *
+ * @param filter The filter object to search.
+ * @param number The option number to search for.
+ *
+ * @return       @c 1 if @p number was found, @c 0 otherwise, or @c -1 on error.
+ */
+int coap_option_filter_get(coap_opt_filter_t *filter, coap_option_num_t number);
+
+/**
+ * Iterator to run through PDU options. This object must be
+ * initialized with coap_option_iterator_init(). Call
+ * coap_option_next() to walk through the list of options until
+ * coap_option_next() returns @c NULL.
+ *
+ * @code
+ * coap_opt_t *option;
+ * coap_opt_iterator_t opt_iter;
+ * coap_option_iterator_init(pdu, &opt_iter, COAP_OPT_ALL);
+ *
+ * while ((option = coap_option_next(&opt_iter))) {
+ *   ... do something with option ...
+ * }
+ * @endcode
+ */
+typedef struct {
+  size_t length;                /**< remaining length of PDU */
+  coap_option_num_t number;     /**< decoded option number */
+  unsigned int bad:1;           /**< iterator object is ok if not set */
+  unsigned int filtered:1;      /**< denotes whether or not filter is used */
+  coap_opt_t *next_option;      /**< pointer to the unparsed next option */
+  coap_opt_filter_t filter;     /**< option filter */
+} coap_opt_iterator_t;
+
+/**
+ * Initializes the given option iterator @p oi to point to the beginning of the
+ * @p pdu's option list. This function returns @p oi on success, @c NULL
+ * otherwise (i.e. when no options exist). Note that a length check on the
+ * option list must be performed before coap_option_iterator_init() is called.
+ *
+ * @param pdu    The PDU the options of which should be walked through.
+ * @param oi     An iterator object that will be initilized.
+ * @param filter An optional option number filter.
+ *               With @p number != @c COAP_OPT_ALL, coap_option_next()
+ *               will return only options matching this bitmask.
+ *               Fence-post options @c 14, @c 28, @c 42, ... are always
+ *               skipped.
+ *
+ * @return       The iterator object @p oi on success, @c NULL otherwise.
+ */
+coap_opt_iterator_t *coap_option_iterator_init(const coap_pdu_t *pdu,
+                                               coap_opt_iterator_t *oi,
+                                               const coap_opt_filter_t *filter);
+
+/**
+ * Updates the iterator @p oi to point to the next option. This function returns
+ * a pointer to that option or @c NULL if no more options exist. The contents of
+ * @p oi will be updated. In particular, @c oi->n specifies the current option's
+ * ordinal number (counted from @c 1), @c oi->number is the option's number
+ * value, and @c oi->option points to the beginning of the current option
+ * itself. When * advanced past the last option, @c oi->option will be @c NULL.
+ *
+ * Note that options are skipped whose corresponding bits in the filter
+ * specified with coap_option_iterator_init() are @c 0. Options with numbers
+ * that do not fit in this filter hence will always be returned.
+ *
+ * @param oi The option iterator to update.
+ *
+ * @return   The next option or @c NULL if no more options exist.
+ */
+coap_opt_t *coap_option_next(coap_opt_iterator_t *oi);
+
+/**
+ * Retrieves the first option of number @p number from @p pdu. @p oi must
+ * point to a coap_opt_iterator_t object that will be initialized by this
+ * function to filter only options with number @p number. This function returns
+ * the first option with this number, or @c NULL if not found.
+ *
+ * @param pdu  The PDU to parse for options.
+ * @param number The option number to search for.
+ * @param oi   An iterator object to use.
+ *
+ * @return     A pointer to the first option of number @p number, or @c NULL if
+ *             not found.
+ */
+coap_opt_t *coap_check_option(const coap_pdu_t *pdu,
+                              coap_option_num_t number,
+                              coap_opt_iterator_t *oi);
+
+/**
+ * Encodes the given delta and length values into @p opt. This function returns
+ * the number of bytes that were required to encode @p delta and @p length or @c
+ * 0 on error. Note that the result indicates by how many bytes @p opt must be
+ * advanced to encode the option value.
+ *
+ * @param opt    The option buffer space where @p delta and @p length are
+ *               written.
+ * @param maxlen The maximum length of @p opt.
+ * @param delta  The actual delta value to encode.
+ * @param length The actual length value to encode.
+ *
+ * @return       The number of bytes used or @c 0 on error.
+ */
+size_t coap_opt_setheader(coap_opt_t *opt,
+                          size_t maxlen,
+                          uint16_t delta,
+                          size_t length);
+
+/**
+ * Compute storage bytes needed for an option with given @p delta and
+ * @p length
+ *
+ * @param delta  The option delta.
+ * @param length The option length.
+ *
+ * @return       The number of bytes required to encode this option.
+ */
+size_t coap_opt_encode_size(uint16_t delta, size_t length);
+
+/**
+ * Encodes option with given @p delta into @p opt. This function returns the
+ * number of bytes written to @p opt or @c 0 on error. This happens especially
+ * when @p opt does not provide sufficient space to store the option value,
+ * delta, and option jumps when required.
+ *
+ * @param opt    The option buffer space where @p val is written.
+ * @param n      Maximum length of @p opt.
+ * @param delta  The option delta.
+ * @param val    The option value to copy into @p opt.
+ * @param length The actual length of @p val.
+ *
+ * @return       The number of bytes that have been written to @p opt or @c 0 on
+ *               error. The return value will always be less than @p n.
+ */
+size_t coap_opt_encode(coap_opt_t *opt,
+                       size_t n,
+                       uint16_t delta,
+                       const uint8_t *val,
+                       size_t length);
+
+/**
+ * Returns the length of the given option. @p opt must point to an option jump
+ * or the beginning of the option. This function returns @c 0 when @p opt is not
+ * an option or the actual length of @p opt (which can be @c 0 as well).
+ *
+ * @note {The rationale for using @c 0 in case of an error is that in most
+ * contexts, the result of this function is used to skip the next
+ * coap_opt_length() bytes.}
+ *
+ * @param opt  The option whose length should be returned.
+ *
+ * @return     The option's length or @c 0 when undefined.
+ */
+uint32_t coap_opt_length(const coap_opt_t *opt);
+
+/**
+ * Returns a pointer to the value of the given option. @p opt must point to an
+ * option jump or the beginning of the option. This function returns @c NULL if
+ * @p opt is not a valid option.
+ *
+ * @param opt The option whose value should be returned.
+ *
+ * @return    A pointer to the option value or @c NULL on error.
+ */
+const uint8_t *coap_opt_value(const coap_opt_t *opt);
+
+/**
+ * Representation of chained list of CoAP options to install.
+ *
+ * @code
+ * coap_optlist_t *optlist_chain = NULL;
+ * coap_pdu_t *pdu = coap_new_pdu(session);
+ *
+ * ... other set up code ...
+ * coap_insert_optlist(&optlist_chain, coap_new_optlist(COAP_OPTION_OBSERVE,
+ *                    COAP_OBSERVE_ESTABLISH, NULL));
+ *
+ * coap_add_optlist_pdu(pdu, &optlist_chain);
+ * ... other code ...
+ * coap_delete_optlist(optlist_chain);
+ * @endcode
+ */
+typedef struct coap_optlist_t {
+  struct coap_optlist_t *next;  /**< next entry in the optlist chain */
+  uint16_t number;              /**< the option number (no delta coding) */
+  size_t length;                /**< the option value length */
+  uint8_t *data;                /**< the option data */
+} coap_optlist_t;
+
+/**
+ * Create a new optlist entry.
+ *
+ * Note: Where possible, the option data needs to be stripped of leading zeros
+ * (big endian) to reduce the amount of data needed in the PDU, as well as in
+ * some cases the maximum data size of an opton can be exceeded if not stripped
+ * and hence be illegal.  This is done by using coap_encode_var_safe() or
+ * coap_encode_var_safe8().
+ *
+ * @param number    The option number (COAP_OPTION_*)
+ * @param length    The option length
+ * @param data      The option value data
+ *
+ * @return          A pointer to the new optlist entry, or @c NULL if error
+ */
+coap_optlist_t *coap_new_optlist(uint16_t number,
+                                 size_t length,
+                                 const uint8_t *data);
+
+/**
+ * The current optlist of @p optlist_chain is first sorted (as per RFC7272
+ * ordering requirements) and then added to the @p pdu.
+ *
+ * @param pdu  The pdu to add the options to from the chain list
+ * @param optlist_chain The chained list of optlist to add to the pdu
+ *
+ * @return     @c 1 if succesful or @c 0 if failure;
+ */
+int coap_add_optlist_pdu(coap_pdu_t *pdu, coap_optlist_t** optlist_chain);
+
+/**
+ * Adds @p optlist to the given @p optlist_chain. The optlist_chain variable
+ * be set to NULL before the initial call to coap_insert_optlist().
+ * The optlist_chain will need to be deleted using coap_delete_optlist()
+ * when no longer required.
+ *
+ * @param optlist_chain The chain to add optlist to
+ * @param optlist  The optlist to add to the queue
+ *
+ * @return         @c 1 if successful, @c 0 otherwise.
+ */
+int coap_insert_optlist(coap_optlist_t **optlist_chain,
+                        coap_optlist_t *optlist);
+
+/**
+ * Removes all entries from the @p optlist_chain, freeing off their
+ * memory usage.
+ *
+ * @param optlist_chain The optlist chain to remove all the entries from
+ */
+void coap_delete_optlist(coap_optlist_t *optlist_chain);
+
+/** @} */
+
+/**
+ * Sets the corresponding bit for @p type in @p filter. This function returns @c
+ * 1 if bit was set or @c -1 on error (i.e. when the given type does not fit in
+ * the filter).
+ *
+ * @deprecated Use coap_option_filter_set() instead.
+ *
+ * @param filter The filter object to change.
+ * @param type   The type for which the bit should be set.
+ *
+ * @return       @c 1 if bit was set, @c -1 otherwise.
+ */
+COAP_STATIC_INLINE COAP_DEPRECATED int
+coap_option_setb(coap_opt_filter_t *filter, uint16_t type) {
+  return coap_option_filter_set(filter, type) ? 1 : -1;
+}
+
+/**
+ * Clears the corresponding bit for @p type in @p filter. This function returns
+ * @c 1 if bit was cleared or @c -1 on error (i.e. when the given type does not
+ * fit in the filter).
+ *
+ * @deprecated Use coap_option_filter_unset() instead.
+ *
+ * @param filter The filter object to change.
+ * @param type   The type for which the bit should be cleared.
+ *
+ * @return       @c 1 if bit was set, @c -1 otherwise.
+ */
+COAP_STATIC_INLINE COAP_DEPRECATED int
+coap_option_clrb(coap_opt_filter_t *filter, uint16_t type) {
+  return coap_option_filter_unset(filter, type) ? 1 : -1;
+}
+
+/**
+ * Gets the corresponding bit for @p type in @p filter. This function returns @c
+ * 1 if the bit is set @c 0 if not, or @c -1 on error (i.e. when the given type
+ * does not fit in the filter).
+ *
+ * @deprecated Use coap_option_filter_get() instead.
+ *
+ * @param filter The filter object to read bit from.
+ * @param type   The type for which the bit should be read.
+ *
+ * @return       @c 1 if bit was set, @c 0 if not, @c -1 on error.
+ */
+COAP_STATIC_INLINE COAP_DEPRECATED int
+coap_option_getb(coap_opt_filter_t *filter, uint16_t type) {
+  return coap_option_filter_get(filter, type);
+}
+
+#endif /* COAP_OPTION_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/pdu.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/pdu.h
new file mode 100644
index 00000000000..8031a1c2c40
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/pdu.h
@@ -0,0 +1,571 @@
+/*
+ * pdu.h -- CoAP message structure
+ *
+ * Copyright (C) 2010-2014 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file pdu.h
+ * @brief Pre-defined constants that reflect defaults for CoAP
+ */
+
+#ifndef COAP_PDU_H_
+#define COAP_PDU_H_
+
+#include "uri.h"
+#include "option.h"
+
+#ifdef WITH_LWIP
+#include <lwip/pbuf.h>
+#endif
+
+#include <stdint.h>
+
+/**
+ * @defgroup pdu PDU
+ * API functions for PDUs
+ * @{
+ */
+
+#define COAP_DEFAULT_PORT      5683 /* CoAP default UDP/TCP port */
+#define COAPS_DEFAULT_PORT     5684 /* CoAP default UDP/TCP port for secure transmission */
+#define COAP_DEFAULT_MAX_AGE     60 /* default maximum object lifetime in seconds */
+#ifndef COAP_DEFAULT_MTU
+#define COAP_DEFAULT_MTU       1152
+#endif /* COAP_DEFAULT_MTU */
+
+#ifndef COAP_DEFAULT_HOP_LIMIT
+#define COAP_DEFAULT_HOP_LIMIT       16
+#endif /* COAP_DEFAULT_HOP_LIMIT */
+
+#define COAP_DEFAULT_SCHEME  "coap" /* the default scheme for CoAP URIs */
+
+/** well-known resources URI */
+#define COAP_DEFAULT_URI_WELLKNOWN ".well-known/core"
+
+/* CoAP message types */
+
+/**
+ * CoAP PDU message type definitions
+ */
+typedef enum coap_pdu_type_t {
+  COAP_MESSAGE_CON,  /* 0 confirmable message (requires ACK/RST) */
+  COAP_MESSAGE_NON,  /* 1 non-confirmable message (one-shot message) */
+  COAP_MESSAGE_ACK,  /* 2 used to acknowledge confirmable messages */
+  COAP_MESSAGE_RST   /* 3 indicates error in received messages */
+} coap_pdu_type_t;
+
+/**
+ * CoAP PDU Request methods
+ */
+typedef enum coap_request_t {
+  COAP_REQUEST_GET = 1,
+  COAP_REQUEST_POST,      /* 2 */
+  COAP_REQUEST_PUT,       /* 3 */
+  COAP_REQUEST_DELETE,    /* 4 */
+  COAP_REQUEST_FETCH,     /* 5 RFC 8132 */
+  COAP_REQUEST_PATCH,     /* 6 RFC 8132 */
+  COAP_REQUEST_IPATCH,    /* 7 RFC 8132 */
+} coap_request_t;
+
+/*
+ * CoAP option numbers (be sure to update coap_option_check_critical() and
+ * coap_add_option() when adding options
+ */
+
+/*
+ * The C, U, and N flags indicate the properties
+ * Critical, Unsafe, and NoCacheKey, respectively.
+ * If U is set, then N has no meaning as per
+ * https://tools.ietf.org/html/rfc7252#section-5.10
+ * and is set to a -.
+ *
+ * Separately, R is for the options that can be repeated
+ *
+ * The least significant byte of the option is set as followed
+ * as per https://tools.ietf.org/html/rfc7252#section-5.4.6
+ *
+ *   0   1   2   3   4   5   6   7
+ * --+---+---+---+---+---+---+---+
+ *           | NoCacheKey| U | C |
+ * --+---+---+---+---+---+---+---+
+ *
+ * https://tools.ietf.org/html/rfc8613#section-4 goes on to define E, I and U
+ * properties Encrypted and Integrity Protected, Integrity Protected Only, and
+ * Unprotected respectively.  Integrity Protected Only is not currently used.
+ *
+ * An Option is tagged with CUNREIU with any of the letters replaced with _ if
+ * not set, or - for N if U is set (see above) for aiding understanding of the
+ * Option.
+ */
+
+#define COAP_OPTION_IF_MATCH        1 /* C__RE__, opaque,    0-8 B, RFC7252 */
+#define COAP_OPTION_URI_HOST        3 /* CU-___U, String,  1-255 B, RFC7252 */
+#define COAP_OPTION_ETAG            4 /* ___RE__, opaque,    1-8 B, RFC7252 */
+#define COAP_OPTION_IF_NONE_MATCH   5 /* C___E__, empty,       0 B, RFC7252 */
+#define COAP_OPTION_OBSERVE         6 /* _U-_E_U, empty/uint,0/0-3 B, RFC7641 */
+#define COAP_OPTION_URI_PORT        7 /* CU-___U, uint,      0-2 B, RFC7252 */
+#define COAP_OPTION_LOCATION_PATH   8 /* ___RE__, String,  0-255 B, RFC7252 */
+#define COAP_OPTION_OSCORE          9 /* C_____U, *,       0-255 B, RFC8613 */
+#define COAP_OPTION_URI_PATH       11 /* CU-RE__, String,  0-255 B, RFC7252 */
+#define COAP_OPTION_CONTENT_FORMAT 12 /* ____E__, uint,      0-2 B, RFC7252 */
+#define COAP_OPTION_CONTENT_TYPE COAP_OPTION_CONTENT_FORMAT
+/* COAP_OPTION_MAXAGE default 60 seconds if not set */
+#define COAP_OPTION_MAXAGE         14 /* _U-_E_U, uint,      0-4 B, RFC7252 */
+#define COAP_OPTION_URI_QUERY      15 /* CU-RE__, String,  1-255 B, RFC7252 */
+#define COAP_OPTION_HOP_LIMIT      16 /* ______U, uint,        1 B, RFC8768 */
+#define COAP_OPTION_ACCEPT         17 /* C___E__, uint,      0-2 B, RFC7252 */
+#define COAP_OPTION_LOCATION_QUERY 20 /* ___RE__, String,  0-255 B, RFC7252 */
+#define COAP_OPTION_BLOCK2         23 /* CU-_E_U, uint,      0-3 B, RFC7959 */
+#define COAP_OPTION_BLOCK1         27 /* CU-_E_U, uint,      0-3 B, RFC7959 */
+#define COAP_OPTION_SIZE2          28 /* __N_E_U, uint,      0-4 B, RFC7959 */
+#define COAP_OPTION_PROXY_URI      35 /* CU-___U, String, 1-1034 B, RFC7252 */
+#define COAP_OPTION_PROXY_SCHEME   39 /* CU-___U, String,  1-255 B, RFC7252 */
+#define COAP_OPTION_SIZE1          60 /* __N_E_U, uint,      0-4 B, RFC7252 */
+#define COAP_OPTION_NORESPONSE    258 /* _U-_E_U, uint,      0-1 B, RFC7967 */
+
+#define COAP_MAX_OPT            65535 /**< the highest option number we know */
+
+/* CoAP result codes (HTTP-Code / 100 * 40 + HTTP-Code % 100) */
+
+/* As of draft-ietf-core-coap-04, response codes are encoded to base
+ * 32, i.e.  the three upper bits determine the response class while
+ * the remaining five fine-grained information specific to that class.
+ */
+#define COAP_RESPONSE_CODE(N) (((N)/100 << 5) | (N)%100)
+
+/* Determines the class of response code C */
+#define COAP_RESPONSE_CLASS(C) (((C) >> 5) & 0xFF)
+
+#ifndef SHORT_ERROR_RESPONSE
+/**
+ * Returns a human-readable response phrase for the specified CoAP response @p
+ * code. This function returns @c NULL if not found.
+ *
+ * @param code The response code for which the literal phrase should be
+ *             retrieved.
+ *
+ * @return     A zero-terminated string describing the error, or @c NULL if not
+ *             found.
+ */
+const char *coap_response_phrase(unsigned char code);
+
+#define COAP_ERROR_PHRASE_LENGTH   32 /**< maximum length of error phrase */
+
+#else
+#define coap_response_phrase(x) ((char *)NULL)
+
+#define COAP_ERROR_PHRASE_LENGTH    0 /**< maximum length of error phrase */
+#endif /* SHORT_ERROR_RESPONSE */
+
+#define COAP_SIGNALING_CODE(N) (((N)/100 << 5) | (N)%100)
+
+typedef enum coap_pdu_signaling_proto_t {
+  COAP_SIGNALING_CSM =     COAP_SIGNALING_CODE(701),
+  COAP_SIGNALING_PING =    COAP_SIGNALING_CODE(702),
+  COAP_SIGNALING_PONG =    COAP_SIGNALING_CODE(703),
+  COAP_SIGNALING_RELEASE = COAP_SIGNALING_CODE(704),
+  COAP_SIGNALING_ABORT =   COAP_SIGNALING_CODE(705),
+} coap_pdu_signaling_proto_t;
+
+/* Applies to COAP_SIGNALING_CSM */
+#define COAP_SIGNALING_OPTION_MAX_MESSAGE_SIZE 2
+#define COAP_SIGNALING_OPTION_BLOCK_WISE_TRANSFER 4
+/* Applies to COAP_SIGNALING_PING / COAP_SIGNALING_PONG */
+#define COAP_SIGNALING_OPTION_CUSTODY 2
+/* Applies to COAP_SIGNALING_RELEASE */
+#define COAP_SIGNALING_OPTION_ALTERNATIVE_ADDRESS 2
+#define COAP_SIGNALING_OPTION_HOLD_OFF 4
+/* Applies to COAP_SIGNALING_ABORT */
+#define COAP_SIGNALING_OPTION_BAD_CSM_OPTION 2
+
+/* CoAP media type encoding */
+
+#define COAP_MEDIATYPE_TEXT_PLAIN                 0 /* text/plain (UTF-8) */
+#define COAP_MEDIATYPE_APPLICATION_LINK_FORMAT   40 /* application/link-format */
+#define COAP_MEDIATYPE_APPLICATION_XML           41 /* application/xml */
+#define COAP_MEDIATYPE_APPLICATION_OCTET_STREAM  42 /* application/octet-stream */
+#define COAP_MEDIATYPE_APPLICATION_RDF_XML       43 /* application/rdf+xml */
+#define COAP_MEDIATYPE_APPLICATION_EXI           47 /* application/exi  */
+#define COAP_MEDIATYPE_APPLICATION_JSON          50 /* application/json  */
+#define COAP_MEDIATYPE_APPLICATION_CBOR          60 /* application/cbor  */
+#define COAP_MEDIATYPE_APPLICATION_CWT           61 /* application/cwt, RFC 8392  */
+
+/* Content formats from RFC 8152 */
+#define COAP_MEDIATYPE_APPLICATION_COSE_SIGN     98 /* application/cose; cose-type="cose-sign"     */
+#define COAP_MEDIATYPE_APPLICATION_COSE_SIGN1    18 /* application/cose; cose-type="cose-sign1"    */
+#define COAP_MEDIATYPE_APPLICATION_COSE_ENCRYPT  96 /* application/cose; cose-type="cose-encrypt"  */
+#define COAP_MEDIATYPE_APPLICATION_COSE_ENCRYPT0 16 /* application/cose; cose-type="cose-encrypt0" */
+#define COAP_MEDIATYPE_APPLICATION_COSE_MAC      97 /* application/cose; cose-type="cose-mac"      */
+#define COAP_MEDIATYPE_APPLICATION_COSE_MAC0     17 /* application/cose; cose-type="cose-mac0"     */
+
+#define COAP_MEDIATYPE_APPLICATION_COSE_KEY     101 /* application/cose-key  */
+#define COAP_MEDIATYPE_APPLICATION_COSE_KEY_SET 102 /* application/cose-key-set  */
+
+/* Content formats from RFC 8428 */
+#define COAP_MEDIATYPE_APPLICATION_SENML_JSON   110 /* application/senml+json  */
+#define COAP_MEDIATYPE_APPLICATION_SENSML_JSON  111 /* application/sensml+json */
+#define COAP_MEDIATYPE_APPLICATION_SENML_CBOR   112 /* application/senml+cbor  */
+#define COAP_MEDIATYPE_APPLICATION_SENSML_CBOR  113 /* application/sensml+cbor */
+#define COAP_MEDIATYPE_APPLICATION_SENML_EXI    114 /* application/senml-exi   */
+#define COAP_MEDIATYPE_APPLICATION_SENSML_EXI   115 /* application/sensml-exi  */
+#define COAP_MEDIATYPE_APPLICATION_SENML_XML    310 /* application/senml+xml   */
+#define COAP_MEDIATYPE_APPLICATION_SENSML_XML   311 /* application/sensml+xml  */
+
+/* Content formats from RFC 8782 */
+#define COAP_MEDIATYPE_APPLICATION_DOTS_CBOR    271 /* application/dots+cbor */
+
+/* Note that identifiers for registered media types are in the range 0-65535. We
+ * use an unallocated type here and hope for the best. */
+#define COAP_MEDIATYPE_ANY                         0xff /* any media type */
+
+/**
+ * coap_mid_t is used to store the CoAP Message ID of a CoAP PDU.
+ * Valid message ids are 0 to 2^16.  Negative values are error codes.
+ */
+typedef int coap_mid_t;
+
+/** Indicates an invalid message id. */
+#define COAP_INVALID_MID -1
+
+/**
+ * Indicates an invalid message id.
+ * @deprecated Use COAP_INVALID_MID instead.
+ */
+#define COAP_INVALID_TID COAP_INVALID_MID
+
+/**
+ * @deprecated Use coap_optlist_t instead.
+ *
+ * Structures for more convenient handling of options. (To be used with ordered
+ * coap_list_t.) The option's data will be added to the end of the coap_option
+ * structure (see macro COAP_OPTION_DATA).
+ */
+COAP_DEPRECATED typedef struct {
+  uint16_t key;           /* the option key (no delta coding) */
+  unsigned int length;
+} coap_option;
+
+#define COAP_OPTION_KEY(option) (option).key
+#define COAP_OPTION_LENGTH(option) (option).length
+#define COAP_OPTION_DATA(option) ((unsigned char *)&(option) + sizeof(coap_option))
+
+#ifdef WITH_LWIP
+/**
+ * Creates a CoAP PDU from an lwIP @p pbuf, whose reference is passed on to this
+ * function.
+ *
+ * The pbuf is checked for being contiguous, and for having only one reference.
+ * The reference is stored in the PDU and will be freed when the PDU is freed.
+ *
+ * (For now, these are fatal errors; in future, a new pbuf might be allocated,
+ * the data copied and the passed pbuf freed).
+ *
+ * This behaves like coap_pdu_init(0, 0, 0, pbuf->tot_len), and afterwards
+ * copying the contents of the pbuf to the pdu.
+ *
+ * @return A pointer to the new PDU object or @c NULL on error.
+ */
+coap_pdu_t * coap_pdu_from_pbuf(struct pbuf *pbuf);
+#endif
+
+/**
+* CoAP protocol types
+*/
+typedef enum coap_proto_t {
+  COAP_PROTO_NONE = 0,
+  COAP_PROTO_UDP,
+  COAP_PROTO_DTLS,
+  COAP_PROTO_TCP,
+  COAP_PROTO_TLS,
+} coap_proto_t;
+
+/**
+ * Set of codes available for a PDU.
+ */
+typedef enum coap_pdu_code_t {
+  COAP_EMPTY_CODE          = 0,
+
+  COAP_REQUEST_CODE_GET    = COAP_REQUEST_GET,
+  COAP_REQUEST_CODE_POST   = COAP_REQUEST_POST,
+  COAP_REQUEST_CODE_PUT    = COAP_REQUEST_PUT,
+  COAP_REQUEST_CODE_DELETE = COAP_REQUEST_DELETE,
+  COAP_REQUEST_CODE_FETCH  = COAP_REQUEST_FETCH,
+  COAP_REQUEST_CODE_PATCH  = COAP_REQUEST_PATCH,
+  COAP_REQUEST_CODE_IPATCH = COAP_REQUEST_IPATCH,
+
+  COAP_RESPONSE_CODE_CREATED                    = COAP_RESPONSE_CODE(201),
+  COAP_RESPONSE_CODE_DELETED                    = COAP_RESPONSE_CODE(202),
+  COAP_RESPONSE_CODE_VALID                      = COAP_RESPONSE_CODE(203),
+  COAP_RESPONSE_CODE_CHANGED                    = COAP_RESPONSE_CODE(204),
+  COAP_RESPONSE_CODE_CONTENT                    = COAP_RESPONSE_CODE(205),
+  COAP_RESPONSE_CODE_CONTINUE                   = COAP_RESPONSE_CODE(231),
+  COAP_RESPONSE_CODE_BAD_REQUEST                = COAP_RESPONSE_CODE(400),
+  COAP_RESPONSE_CODE_UNAUTHORIZED               = COAP_RESPONSE_CODE(401),
+  COAP_RESPONSE_CODE_BAD_OPTION                 = COAP_RESPONSE_CODE(402),
+  COAP_RESPONSE_CODE_FORBIDDEN                  = COAP_RESPONSE_CODE(403),
+  COAP_RESPONSE_CODE_NOT_FOUND                  = COAP_RESPONSE_CODE(404),
+  COAP_RESPONSE_CODE_NOT_ALLOWED                = COAP_RESPONSE_CODE(405),
+  COAP_RESPONSE_CODE_NOT_ACCEPTABLE             = COAP_RESPONSE_CODE(406),
+  COAP_RESPONSE_CODE_INCOMPLETE                 = COAP_RESPONSE_CODE(408),
+  COAP_RESPONSE_CODE_CONFLICT                   = COAP_RESPONSE_CODE(409),
+  COAP_RESPONSE_CODE_PRECONDITION_FAILED        = COAP_RESPONSE_CODE(412),
+  COAP_RESPONSE_CODE_REQUEST_TOO_LARGE          = COAP_RESPONSE_CODE(413),
+  COAP_RESPONSE_CODE_UNSUPPORTED_CONTENT_FORMAT = COAP_RESPONSE_CODE(415),
+  COAP_RESPONSE_CODE_UNPROCESSABLE              = COAP_RESPONSE_CODE(422),
+  COAP_RESPONSE_CODE_TOO_MANY_REQUESTS          = COAP_RESPONSE_CODE(429),
+  COAP_RESPONSE_CODE_INTERNAL_ERROR             = COAP_RESPONSE_CODE(500),
+  COAP_RESPONSE_CODE_NOT_IMPLEMENTED            = COAP_RESPONSE_CODE(501),
+  COAP_RESPONSE_CODE_BAD_GATEWAY                = COAP_RESPONSE_CODE(502),
+  COAP_RESPONSE_CODE_SERVICE_UNAVAILABLE        = COAP_RESPONSE_CODE(503),
+  COAP_RESPONSE_CODE_GATEWAY_TIMEOUT            = COAP_RESPONSE_CODE(504),
+  COAP_RESPONSE_CODE_PROXYING_NOT_SUPPORTED     = COAP_RESPONSE_CODE(505),
+  COAP_RESPONSE_CODE_HOP_LIMIT_REACHED          = COAP_RESPONSE_CODE(508),
+
+  COAP_SIGNALING_CODE_CSM                       = COAP_SIGNALING_CSM,
+  COAP_SIGNALING_CODE_PING                      = COAP_SIGNALING_PING,
+  COAP_SIGNALING_CODE_PONG                      = COAP_SIGNALING_PONG,
+  COAP_SIGNALING_CODE_RELEASE                   = COAP_SIGNALING_RELEASE,
+  COAP_SIGNALING_CODE_ABORT                     = COAP_SIGNALING_ABORT
+} coap_pdu_code_t;
+
+/**
+ * Creates a new CoAP PDU with at least enough storage space for the given
+ * @p size maximum message size. The function returns a pointer to the
+ * node coap_pdu_t object on success, or @c NULL on error. The storage allocated
+ * for the result must be released with coap_delete_pdu() if coap_send()
+ * is not called.
+ *
+ * @param type The type of the PDU (one of COAP_MESSAGE_CON, COAP_MESSAGE_NON,
+ *             COAP_MESSAGE_ACK, COAP_MESSAGE_RST).
+ * @param code The message code of the PDU.
+ * @param mid  The message id to set or 0 if unknown / not applicable.
+ * @param size The maximum allowed number of byte for the message.
+ * @return     A pointer to the new PDU object or @c NULL on error.
+ */
+coap_pdu_t *coap_pdu_init(coap_pdu_type_t type, coap_pdu_code_t code,
+                          coap_mid_t mid, size_t size);
+
+/**
+ * Creates a new CoAP PDU.
+ *
+ * @param type The type of the PDU (one of COAP_MESSAGE_CON, COAP_MESSAGE_NON,
+ *             COAP_MESSAGE_ACK, COAP_MESSAGE_RST).
+ * @param code The message code of the PDU.
+ * @param session The session that will be using this PDU
+ *
+ * @return The skeletal PDU or @c NULL if failure.
+ */
+coap_pdu_t *coap_new_pdu(coap_pdu_type_t type, coap_pdu_code_t code,
+                         coap_session_t *session);
+
+/**
+ * Dispose of an CoAP PDU and frees associated storage.
+ * Not that in general you should not call this function directly.
+ * When a PDU is sent with coap_send(), coap_delete_pdu() will be called
+ * automatically for you.
+ *
+ * @param pdu The PDU for free off.
+ */
+void coap_delete_pdu(coap_pdu_t *pdu);
+
+/**
+ * Duplicate an existing PDU. Specific options can be ignored and not copied
+ * across.  The PDU data payload is not copied across.
+ *
+ * @param old_pdu      The PDU to duplicate
+ * @param session      The session that will be using this PDU.
+ * @param token_length The length of the token to use in this duplicated PDU.
+ * @param token        The token to use in this duplicated PDU.
+ * @param drop_options A list of options not to copy into the duplicated PDU.
+ *                     If @c NULL, then all options are copied across.
+ *
+ * @return The duplicated PDU or @c NULL if failure.
+ */
+coap_pdu_t *
+coap_pdu_duplicate(const coap_pdu_t *old_pdu,
+                   coap_session_t *session,
+                   size_t token_length,
+                   const uint8_t *token,
+                   coap_opt_filter_t *drop_options);
+
+/**
+ * Adds token of length @p len to @p pdu.
+ * Adding the token destroys any following contents of the pdu. Hence options
+ * and data must be added after coap_add_token() has been called. In @p pdu,
+ * length is set to @p len + @c 4, and max_delta is set to @c 0. This function
+ * returns @c 0 on error or a value greater than zero on success.
+ *
+ * @param pdu  The PDU where the token is to be added.
+ * @param len  The length of the new token.
+ * @param data The token to add.
+ *
+ * @return     A value greater than zero on success, or @c 0 on error.
+ */
+int coap_add_token(coap_pdu_t *pdu,
+                  size_t len,
+                  const uint8_t *data);
+
+/**
+ * Adds option of given number to pdu that is passed as first
+ * parameter.
+ * coap_add_option() destroys the PDU's data, so coap_add_data() must be called
+ * after all options have been added. As coap_add_token() destroys the options
+ * following the token, the token must be added before coap_add_option() is
+ * called. This function returns the number of bytes written or @c 0 on error.
+ *
+ * Note: Where possible, the option data needs to be stripped of leading zeros
+ * (big endian) to reduce the amount of data needed in the PDU, as well as in
+ * some cases the maximum data size of an opton can be exceeded if not stripped
+ * and hence be illegal.  This is done by using coap_encode_var_safe() or
+ * coap_encode_var_safe8().
+ *
+ * @param pdu    The PDU where the option is to be added.
+ * @param number The number of the new option.
+ * @param len    The length of the new option.
+ * @param data   The data of the new option.
+ *
+ * @return The overall length of the option or @c 0 on failure.
+ */
+size_t coap_add_option(coap_pdu_t *pdu,
+                       coap_option_num_t number,
+                       size_t len,
+                       const uint8_t *data);
+
+/**
+ * Adds given data to the pdu that is passed as first parameter. Note that the
+ * PDU's data is destroyed by coap_add_option(). coap_add_data() must be called
+ * only once per PDU, otherwise the result is undefined.
+ *
+ * @param pdu    The PDU where the data is to be added.
+ * @param len    The length of the data.
+ * @param data   The data to add.
+ *
+ * @return @c 1 if success, else @c 0 if failure.
+ */
+int coap_add_data(coap_pdu_t *pdu,
+                  size_t len,
+                  const uint8_t *data);
+
+/**
+ * Adds given data to the pdu that is passed as first parameter but does not
+ * copy it. Note that the PDU's data is destroyed by coap_add_option().
+ * coap_add_data() must be have been called once for this PDU, otherwise the
+ * result is undefined.
+ * The actual data must be copied at the returned location.
+ *
+ * @param pdu    The PDU where the data is to be added.
+ * @param len    The length of the data.
+ *
+ * @return Where to copy the data of len to, or @c NULL is error.
+ */
+uint8_t *coap_add_data_after(coap_pdu_t *pdu, size_t len);
+
+/**
+ * Retrieves the length and data pointer of specified PDU. Returns 0 on error or
+ * 1 if *len and *data have correct values. Note that these values are destroyed
+ * with the pdu.
+ *
+ * @param pdu    The specified PDU.
+ * @param len    Returns the length of the current data
+ * @param data   Returns the ptr to the current data
+ *
+ * @return @c 1 if len and data are correctly filled in, else
+ *         @c 0 if there is no data.
+ */
+int coap_get_data(const coap_pdu_t *pdu,
+                  size_t *len,
+                  const uint8_t **data);
+
+/**
+ * Retrieves the data from a PDU, with support for large bodies of data that
+ * spans multiple PDUs.
+ *
+ * Note: The data pointed to on return is destroyed when the PDU is destroyed.
+ *
+ * @param pdu    The specified PDU.
+ * @param len    Returns the length of the current data
+ * @param data   Returns the ptr to the current data
+ * @param offset Returns the offset of the current data from the start of the
+ *               body comprising of many blocks (RFC7959)
+ * @param total  Returns the total size of the body.
+ *               If offset + length < total, then there is more data to follow.
+ *
+ * @return @c 1 if len, data, offset and total are correctly filled in, else
+ *         @c 0 if there is no data.
+ */
+int coap_get_data_large(const coap_pdu_t *pdu,
+                        size_t *len,
+                        const uint8_t **data,
+                        size_t *offset,
+                        size_t *total);
+
+/**
+ * Gets the PDU code associated with @p pdu.
+ *
+ * @param pdu The PDU object.
+ *
+ * @return The PDU code.
+ */
+coap_pdu_code_t coap_pdu_get_code(const coap_pdu_t *pdu);
+
+/**
+ * Sets the PDU code in the @p pdu.
+ *
+ * @param pdu The PDU object.
+ * @param code The code to set in the PDU.
+ */
+void coap_pdu_set_code(coap_pdu_t *pdu, coap_pdu_code_t code);
+
+/**
+ * Gets the PDU type associated with @p pdu.
+ *
+ * @param pdu The PDU object.
+ *
+ * @return The PDU type.
+ */
+coap_pdu_type_t coap_pdu_get_type(const coap_pdu_t *pdu);
+
+/**
+ * Sets the PDU type in the @p pdu.
+ *
+ * @param pdu The PDU object.
+ * @param type The type to set for the PDU.
+ */
+void coap_pdu_set_type(coap_pdu_t *pdu, coap_pdu_type_t type);
+
+/**
+ * Gets the token associated with @p pdu.
+ *
+ * @param pdu The PDU object.
+ *
+ * @return The token information.
+ */
+coap_bin_const_t coap_pdu_get_token(const coap_pdu_t *pdu);
+
+/**
+ * Gets the message id associated with @p pdu.
+ *
+ * @param pdu The PDU object.
+ *
+ * @return The message id.
+ */
+coap_mid_t coap_pdu_get_mid(const coap_pdu_t *pdu);
+
+/**
+ * Sets the message id in the @p pdu.
+ *
+ * @param pdu The PDU object.
+ * @param mid The message id value to set in the PDU.
+ *
+ */
+void coap_pdu_set_mid(coap_pdu_t *pdu, coap_mid_t mid);
+
+/** @} */
+
+#endif /* COAP_PDU_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/resource.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/resource.h
new file mode 100644
index 00000000000..5cf7751f67e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/resource.h
@@ -0,0 +1,379 @@
+/*
+ * resource.h -- generic resource handling
+ *
+ * Copyright (C) 2010,2011,2014-2021 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file resource.h
+ * @brief Generic resource handling
+ */
+
+#ifndef COAP_RESOURCE_H_
+#define COAP_RESOURCE_H_
+
+#ifndef COAP_RESOURCE_CHECK_TIME
+/** The interval in seconds to check if resources have changed. */
+#define COAP_RESOURCE_CHECK_TIME 2
+#endif /* COAP_RESOURCE_CHECK_TIME */
+
+#include "async.h"
+#include "block.h"
+#include "str.h"
+#include "pdu.h"
+#include "net.h"
+#include "subscribe.h"
+
+/**
+ * @defgroup coap_resource Resource Configuraton
+ * API functions for setting up resources
+ * @{
+ */
+
+/**
+ * Definition of message handler function
+ */
+typedef void (*coap_method_handler_t)
+  (coap_resource_t *,
+   coap_session_t *,
+   const coap_pdu_t * /* request */,
+   const coap_string_t * /* query string */,
+   coap_pdu_t * /* response */);
+
+#define COAP_ATTR_FLAGS_RELEASE_NAME  0x1
+#define COAP_ATTR_FLAGS_RELEASE_VALUE 0x2
+
+/** The URI passed to coap_resource_init() is free'd by coap_delete_resource(). */
+#define COAP_RESOURCE_FLAGS_RELEASE_URI 0x1
+
+/**
+ * Notifications will be sent non-confirmable by default. RFC 7641 Section 4.5
+ * https://tools.ietf.org/html/rfc7641#section-4.5
+ * Libcoap will always send every fifth packet as confirmable.
+ */
+#define COAP_RESOURCE_FLAGS_NOTIFY_NON  0x0
+
+/**
+ * Notifications will be sent confirmable. RFC 7641 Section 4.5
+ * https://tools.ietf.org/html/rfc7641#section-4.5
+ */
+#define COAP_RESOURCE_FLAGS_NOTIFY_CON  0x2
+
+/**
+ * Notifications will always be sent non-confirmable. This is in
+ * violation of RFC 7641 Section 4.5
+ * https://tools.ietf.org/html/rfc7641#section-4.5
+ * but required by the DOTS signal channel protocol which needs to operate in
+ * lossy DDoS attack environments.
+ * https://tools.ietf.org/html/rfc8782#section-4.4.2.1
+ */
+#define COAP_RESOURCE_FLAGS_NOTIFY_NON_ALWAYS  0x4
+
+/**
+ * Creates a new resource object and initializes the link field to the string
+ * @p uri_path. This function returns the new coap_resource_t object.
+ *
+ * If the string is going to be freed off by coap_delete_resource() when
+ * COAP_RESOURCE_FLAGS_RELEASE_URI is set in @p flags, then either the 's'
+ * variable of coap_str_const_t has to point to constant text, or point to data
+ * within the allocated coap_str_const_t parameter.
+ *
+ * @param uri_path The string URI path of the new resource. The leading '/' is
+ *                 not normally required - e.g. just "full/path/for/resource".
+ * @param flags    Flags for memory management (in particular release of
+ *                 memory). Possible values:@n
+ *
+ *                 COAP_RESOURCE_FLAGS_RELEASE_URI
+ *                  If this flag is set, the URI passed to
+ *                  coap_resource_init() is free'd by
+ *                  coap_delete_resource()@n
+ *
+ *                 COAP_RESOURCE_FLAGS_NOTIFY_CON
+ *                  If this flag is set, coap-observe notifications
+ *                  will be sent confirmable by default.@n
+ *
+ *                 COAP_RESOURCE_FLAGS_NOTIFY_NON (default)
+ *                  If this flag is set, coap-observe notifications
+ *                  will be sent non-confirmable by default.@n
+ *
+ *                  If flags is set to 0 then the
+ *                  COAP_RESOURCE_FLAGS_NOTIFY_NON is considered.
+ *
+ * @return         A pointer to the new object or @c NULL on error.
+ */
+coap_resource_t *coap_resource_init(coap_str_const_t *uri_path,
+                                    int flags);
+
+
+/**
+ * Creates a new resource object for the unknown resource handler with support
+ * for PUT.
+ *
+ * In the same way that additional handlers can be added to the resource
+ * created by coap_resource_init() by using coap_register_handler(), POST,
+ * GET, DELETE etc. handlers can be added to this resource. It is the
+ * responsibility of the application to manage the unknown resources by either
+ * creating new resources with coap_resource_init() (which should have a
+ * DELETE handler specified for the resource removal) or by maintaining an
+ * active resource list.
+ *
+ * Note: There can only be one unknown resource handler per context - attaching
+ *       a new one overrides the previous definition.
+ *
+ * Note: It is not possible to observe the unknown resource with a GET request
+ *       - a separate resource needs to be reated by the PUT (or POST) handler,
+ *       and make that resource observable.
+ *
+ * This function returns the new coap_resource_t object.
+ *
+ * @param put_handler The PUT handler to register with @p resource for
+ *                    unknown Uri-Path.
+ *
+ * @return       A pointer to the new object or @c NULL on error.
+ */
+coap_resource_t *coap_resource_unknown_init(coap_method_handler_t put_handler);
+
+/**
+ * Creates a new resource object for handling proxy URIs.
+ * This function returns the new coap_resource_t object.
+ *
+ * Note: There can only be one proxy resource handler per context - attaching
+ *       a new one overrides the previous definition.
+ *
+ * @param handler The PUT/POST/GET etc. handler that handles all request types.
+ * @param host_name_count The number of provided host_name_list entries. A
+ *                        minimum of 1 must be provided.
+ * @param host_name_list Array of depth host_name_count names that this proxy
+ *                       is known by.
+ *
+ * @return         A pointer to the new object or @c NULL on error.
+ */
+coap_resource_t *coap_resource_proxy_uri_init(coap_method_handler_t handler,
+                      size_t host_name_count, const char *host_name_list[]);
+
+/**
+ * Returns the resource identified by the unique string @p uri_path. If no
+ * resource was found, this function returns @c NULL.
+ *
+ * @param context  The context to look for this resource.
+ * @param uri_path  The unique string uri of the resource.
+ *
+ * @return         A pointer to the resource or @c NULL if not found.
+ */
+coap_resource_t *coap_get_resource_from_uri_path(coap_context_t *context,
+                                                coap_str_const_t *uri_path);
+
+/**
+ * Get the uri_path from a @p resource.
+ *
+ * @param resource The CoAP resource to check.
+ *
+ * @return         The uri_path if it exists or @c NULL otherwise.
+ */
+coap_str_const_t* coap_resource_get_uri_path(coap_resource_t *resource);
+
+/**
+ * Sets the notification message type of resource @p resource to given
+ * @p mode
+
+ * @param resource The resource to update.
+ * @param mode     Must be one of @c COAP_RESOURCE_FLAGS_NOTIFY_NON
+ *                 or @c COAP_RESOURCE_FLAGS_NOTIFY_CON.
+ */
+void coap_resource_set_mode(coap_resource_t *resource, int mode);
+
+/**
+ * Sets the user_data. The user_data is exclusively used by the library-user
+ * and can be used as user defined context in the handler functions.
+ *
+ * @param resource Resource to attach the data to
+ * @param data     Data to attach to the user_data field. This pointer is
+ *                 only used for storage, the data remains under user control
+ */
+void coap_resource_set_userdata(coap_resource_t *resource, void *data);
+
+/**
+ * Gets the user_data. The user_data is exclusively used by the library-user
+ * and can be used as context in the handler functions.
+ *
+ * @param resource Resource to retrieve the user_data from
+ *
+ * @return        The user_data pointer
+ */
+void *coap_resource_get_userdata(coap_resource_t *resource);
+
+/**
+ * Definition of release resource user_data callback function
+ */
+typedef void (*coap_resource_release_userdata_handler_t)(void *user_data);
+
+/**
+ * Defines the context wide callback to use to when the resource is deleted
+ * to release the data held in the resource's user_data.
+ *
+ * @param context  The context to associate the release callback with
+ * @param callback The callback to invoke when the resource is deleted or NULL
+ *
+ */
+void coap_resource_release_userdata_handler(coap_context_t *context,
+                          coap_resource_release_userdata_handler_t callback);
+
+/**
+ * Registers the given @p resource for @p context. The resource must have been
+ * created by coap_resource_init() or coap_resource_unknown_init(), the
+ * storage allocated for the resource will be released by coap_delete_resource().
+ *
+ * @param context  The context to use.
+ * @param resource The resource to store.
+ */
+void coap_add_resource(coap_context_t *context, coap_resource_t *resource);
+
+/**
+ * Deletes a resource identified by @p resource. The storage allocated for that
+ * resource is freed, and removed from the context.
+ *
+ * @param context  The context where the resources are stored.
+ * @param resource The resource to delete.
+ *
+ * @return         @c 1 if the resource was found (and destroyed),
+ *                 @c 0 otherwise.
+ */
+int coap_delete_resource(coap_context_t *context, coap_resource_t *resource);
+
+/**
+ * Registers the specified @p handler as message handler for the request type @p
+ * method
+ *
+ * @param resource The resource for which the handler shall be registered.
+ * @param method   The CoAP request method to handle.
+ * @param handler  The handler to register with @p resource.
+ */
+void coap_register_handler(coap_resource_t *resource,
+                           coap_request_t method,
+                           coap_method_handler_t handler);
+
+/**
+ * Registers a new attribute with the given @p resource. As the
+ * attribute's coap_str_const_ fields will point to @p name and @p value the
+ * caller must ensure that these pointers are valid during the
+ * attribute's lifetime.
+
+ * If the @p name and/or @p value string is going to be freed off at attribute
+ * removal time by the setting of COAP_ATTR_FLAGS_RELEASE_NAME or
+ * COAP_ATTR_FLAGS_RELEASE_VALUE in @p flags, then either the 's'
+ * variable of coap_str_const_t has to point to constant text, or point to data
+ * within the allocated coap_str_const_t parameter.
+ *
+ * @param resource The resource to register the attribute with.
+ * @param name     The attribute's name as a string.
+ * @param value    The attribute's value as a string or @c NULL if none.
+ * @param flags    Flags for memory management (in particular release of
+ *                 memory). Possible values:@n
+ *
+ *                 COAP_ATTR_FLAGS_RELEASE_NAME
+ *                  If this flag is set, the name passed to
+ *                  coap_add_attr_release() is free'd
+ *                  when the attribute is deleted@n
+ *
+ *                 COAP_ATTR_FLAGS_RELEASE_VALUE
+ *                  If this flag is set, the value passed to
+ *                  coap_add_attr_release() is free'd
+ *                  when the attribute is deleted@n
+ *
+ * @return         A pointer to the new attribute or @c NULL on error.
+ */
+coap_attr_t *coap_add_attr(coap_resource_t *resource,
+                           coap_str_const_t *name,
+                           coap_str_const_t *value,
+                           int flags);
+
+/**
+ * Returns @p resource's coap_attr_t object with given @p name if found, @c NULL
+ * otherwise.
+ *
+ * @param resource The resource to search for attribute @p name.
+ * @param name     Name of the requested attribute as a string.
+ * @return         The first attribute with specified @p name or @c NULL if none
+ *                 was found.
+ */
+coap_attr_t *coap_find_attr(coap_resource_t *resource,
+                            coap_str_const_t *name);
+
+/**
+ * Returns @p attribute's value.
+ *
+ * @param attribute Pointer to attribute.
+ *
+ * @return Attribute's value or @c NULL.
+ */
+coap_str_const_t *coap_attr_get_value(coap_attr_t *attribute);
+
+/**
+ * Status word to encode the result of conditional print or copy operations such
+ * as coap_print_link(). The lower 28 bits of coap_print_status_t are used to
+ * encode the number of characters that has actually been printed, bits 28 to 31
+ * encode the status.  When COAP_PRINT_STATUS_ERROR is set, an error occurred
+ * during output. In this case, the other bits are undefined.
+ * COAP_PRINT_STATUS_TRUNC indicates that the output is truncated, i.e. the
+ * printing would have exceeded the current buffer.
+ */
+typedef unsigned int coap_print_status_t;
+
+#define COAP_PRINT_STATUS_MASK  0xF0000000u
+#define COAP_PRINT_OUTPUT_LENGTH(v) ((v) & ~COAP_PRINT_STATUS_MASK)
+#define COAP_PRINT_STATUS_ERROR 0x80000000u
+#define COAP_PRINT_STATUS_TRUNC 0x40000000u
+
+/**
+ * Writes a description of this resource in link-format to given text buffer. @p
+ * len must be initialized to the maximum length of @p buf and will be set to
+ * the number of characters actually written if successful. This function
+ * returns @c 1 on success or @c 0 on error.
+ *
+ * @param resource The resource to describe.
+ * @param buf      The output buffer to write the description to.
+ * @param len      Must be initialized to the length of @p buf and
+ *                 will be set to the length of the printed link description.
+ * @param offset   The offset within the resource description where to
+ *                 start writing into @p buf. This is useful for dealing
+ *                 with the Block2 option. @p offset is updated during
+ *                 output as it is consumed.
+ *
+ * @return If COAP_PRINT_STATUS_ERROR is set, an error occured. Otherwise,
+ *         the lower 28 bits will indicate the number of characters that
+ *         have actually been output into @p buffer. The flag
+ *         COAP_PRINT_STATUS_TRUNC indicates that the output has been
+ *         truncated.
+ */
+coap_print_status_t coap_print_link(const coap_resource_t *resource,
+                                    unsigned char *buf,
+                                    size_t *len,
+                                    size_t *offset);
+
+/** @} */
+
+/**
+ * Returns the resource identified by the unique string @p uri_path. If no
+ * resource was found, this function returns @c NULL.
+ *
+ * @param context  The context to look for this resource.
+ * @param uri_path  The unique string uri of the resource.
+ *
+ * @return         A pointer to the resource or @c NULL if not found.
+ */
+coap_resource_t *coap_get_resource_from_uri_path(coap_context_t *context,
+                                                coap_str_const_t *uri_path);
+
+/**
+ * @deprecated use coap_resource_notify_observers() instead.
+ */
+COAP_DEPRECATED int
+coap_resource_set_dirty(coap_resource_t *r,
+                        const coap_string_t *query);
+
+#endif /* COAP_RESOURCE_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/str.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/str.h
new file mode 100644
index 00000000000..dbf53d0c475
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/str.h
@@ -0,0 +1,204 @@
+/*
+ * str.h -- strings to be used in the CoAP library
+ *
+ * Copyright (C) 2010-2011 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_STR_H_
+#define COAP_STR_H_
+
+#include <string.h>
+
+
+/**
+ * @defgroup string String handling support
+ * API functions for handling strings and binary data
+ * @{
+ */
+
+/*
+ * Note: string and binary use equivalent objects.
+ * string is likely to contain readable textual information, binary will not.
+ */
+
+/**
+ * CoAP string data definition
+ */
+typedef struct coap_string_t {
+  size_t length;    /**< length of string */
+  uint8_t *s;       /**< string data */
+} coap_string_t;
+
+/**
+ * CoAP string data definition with const data
+ */
+typedef struct coap_str_const_t {
+  size_t length;    /**< length of string */
+  const uint8_t *s; /**< read-only string data */
+} coap_str_const_t;
+
+#define COAP_SET_STR(st,l,v) { (st)->length = (l), (st)->s = (v); }
+
+/**
+ * CoAP binary data definition
+ */
+typedef struct coap_binary_t {
+  size_t length;    /**< length of binary data */
+  uint8_t *s;       /**< binary data */
+} coap_binary_t;
+
+/**
+ * CoAP binary data definition with const data
+ */
+typedef struct coap_bin_const_t {
+  size_t length;    /**< length of binary data */
+  const uint8_t *s; /**< read-only binary data */
+} coap_bin_const_t;
+
+/**
+ * Returns a new string object with at least size+1 bytes storage allocated.
+ * It is the responsibility of the caller to fill in all the appropriate
+ * information.
+ * The string must be released using coap_delete_string().
+ *
+ * @param size The size to allocate for the string data.
+ *
+ * @return       A pointer to the new object or @c NULL on error.
+ */
+coap_string_t *coap_new_string(size_t size);
+
+/**
+ * Deletes the given string and releases any memory allocated.
+ *
+ * @param string The string to free off.
+ */
+void coap_delete_string(coap_string_t *string);
+
+/**
+ * Returns a new const string object with at least size+1 bytes storage
+ * allocated, and the provided data copied into the string object.
+ * The string must be released using coap_delete_str_const().
+ *
+ * @param data The data to put in the new string object.
+ * @param size The size to allocate for the binary string data.
+ *
+ * @return       A pointer to the new object or @c NULL on error.
+ */
+coap_str_const_t *coap_new_str_const(const uint8_t *data, size_t size);
+
+/**
+ * Deletes the given const string and releases any memory allocated.
+ *
+ * @param string The string to free off.
+ */
+void coap_delete_str_const(coap_str_const_t *string);
+
+/**
+ * Returns a new binary object with at least size bytes storage allocated.
+ * It is the responsibility of the caller to fill in all the appropriate
+ * information.
+ * The coap_binary_t object must be released using coap_delete_binary().
+ *
+ * @param size The size to allocate for the binary data.
+ *
+ * @return       A pointer to the new object or @c NULL on error.
+ */
+coap_binary_t *coap_new_binary(size_t size);
+
+/**
+ * Deletes the given coap_binary_t object and releases any memory allocated.
+ *
+ * @param binary The coap_binary_t object to free off.
+ */
+void coap_delete_binary(coap_binary_t *binary);
+
+/**
+ * Resizes the given coap_binary_t object.
+ * It is the responsibility of the caller to fill in all the appropriate
+ * additional information.
+ *
+ * Note: If there is an error, @p binary will separately need to be released by
+ * coap_delete_binary().
+ *
+ * @param binary The coap_binary_t object to resize.
+ * @param new_size The new size to allocate for the binary data.
+ *
+ * @return       A pointer to the new object or @c NULL on error.
+ */
+coap_binary_t *coap_resize_binary(coap_binary_t *binary, size_t new_size);
+
+/**
+ * Take the specified byte array (text) and create a coap_bin_const_t *
+ * Returns a new const binary object with at least size bytes storage
+ * allocated, and the provided data copied into the binary object.
+ * The binary data must be released using coap_delete_bin_const().
+ *
+ * @param data The data to put in the new string object.
+ * @param size The size to allocate for the binary data.
+ *
+ * @return       A pointer to the new object or @c NULL on error.
+ */
+coap_bin_const_t *coap_new_bin_const(const uint8_t *data, size_t size);
+
+/**
+ * Deletes the given const binary data and releases any memory allocated.
+ *
+ * @param binary The binary data to free off.
+ */
+void coap_delete_bin_const(coap_bin_const_t *binary);
+
+#ifndef COAP_MAX_STR_CONST_FUNC
+#define COAP_MAX_STR_CONST_FUNC 2
+#endif /* COAP_MAX_STR_CONST_FUNC */
+
+/**
+ * Take the specified byte array (text) and create a coap_str_const_t *
+ *
+ * Note: the array is 2 deep as there are up to two callings of
+ * coap_make_str_const in a function call. e.g. coap_add_attr().
+ * Caution: If there are local variable assignments, these will cycle around
+ * the var[COAP_MAX_STR_CONST_FUNC] set.  No current examples do this.
+ *
+ * @param string The const string to convert to a coap_str_const_t *
+ *
+ * @return       A pointer to one of two static variables containing the
+ *               coap_str_const_t * result
+ */
+coap_str_const_t *coap_make_str_const(const char *string);
+
+/**
+ * Compares the two strings for equality
+ *
+ * @param string1 The first string.
+ * @param string2 The second string.
+ *
+ * @return         @c 1 if the strings are equal
+ *                 @c 0 otherwise.
+ */
+#define coap_string_equal(string1,string2) \
+        ((string1)->length == (string2)->length && ((string1)->length == 0 || \
+         ((string1)->s && (string2)->s && \
+          memcmp((string1)->s, (string2)->s, (string1)->length) == 0)))
+
+/**
+ * Compares the two binary data for equality
+ *
+ * @param binary1 The first binary data.
+ * @param binary2 The second binary data.
+ *
+ * @return         @c 1 if the binary data is equal
+ *                 @c 0 otherwise.
+ */
+#define coap_binary_equal(binary1,binary2) \
+        ((binary1)->length == (binary2)->length && ((binary1)->length == 0 || \
+         ((binary1)->s && (binary2)->s && \
+          memcmp((binary1)->s, (binary2)->s, (binary1)->length) == 0)))
+
+/** @} */
+
+#endif /* COAP_STR_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/subscribe.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/subscribe.h
new file mode 100644
index 00000000000..c3aabc2db04
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/subscribe.h
@@ -0,0 +1,68 @@
+/*
+ * subscribe.h -- subscription handling for CoAP
+ *                see RFC7641
+ *
+ * Copyright (C) 2010-2012,2014-2021 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+/**
+ * @file subscribe.h
+ * @brief Defines the application visible subscribe information
+ */
+
+#ifndef COAP_SUBSCRIBE_H_
+#define COAP_SUBSCRIBE_H_
+
+/**
+ * @defgroup observe Resource Observation
+ * API functions for interfacing with the observe handling (RFC7641)
+ * @{
+ */
+
+/**
+ * The value COAP_OBSERVE_ESTABLISH in a GET/FETCH request option
+ * COAP_OPTION_OBSERVE indicates a new observe relationship for (sender
+ * address, token) is requested.
+ */
+#define COAP_OBSERVE_ESTABLISH 0
+
+/**
+ * The value COAP_OBSERVE_CANCEL in a GET/FETCH request option
+ * COAP_OPTION_OBSERVE indicates that the observe relationship for (sender
+ * address, token) must be cancelled.
+ */
+#define COAP_OBSERVE_CANCEL 1
+
+/**
+ * Set whether a @p resource is observable.  If the resource is observable
+ * and the client has set the COAP_OPTION_OBSERVE in a request packet, then
+ * whenever the state of the resource changes (a call to
+ * coap_resource_trigger_observe()), an Observer response will get sent.
+ *
+ * @param resource The CoAP resource to use.
+ * @param mode     @c 1 if Observable is to be set, @c 0 otherwise.
+ *
+ */
+void coap_resource_set_get_observable(coap_resource_t *resource, int mode);
+
+/**
+ * Initiate the sending of an Observe packet for all observers of @p resource,
+ * optionally matching @p query if not NULL
+ *
+ * @param resource The CoAP resource to use.
+ * @param query    The Query to match against or NULL
+ *
+ * @return         @c 1 if the Observe has been triggered, @c 0 otherwise.
+ */
+int
+coap_resource_notify_observers(coap_resource_t *resource,
+                               const coap_string_t *query);
+
+/** @} */
+
+#endif /* COAP_SUBSCRIBE_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/uri.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/uri.h
new file mode 100644
index 00000000000..8084483b500
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/uri.h
@@ -0,0 +1,176 @@
+/*
+ * uri.h -- helper functions for URI treatment
+ *
+ * Copyright (C) 2010-2020 Olaf Bergmann <bergmann@tzi.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_URI_H_
+#define COAP_URI_H_
+
+#include <stdint.h>
+
+#include "str.h"
+
+/**
+ * The scheme specifiers. Secure schemes have an odd numeric value,
+ * others are even.
+ */
+typedef enum coap_uri_scheme_t {
+  COAP_URI_SCHEME_COAP = 0,
+  COAP_URI_SCHEME_COAPS,     /* 1 */
+  COAP_URI_SCHEME_COAP_TCP,  /* 2 */
+  COAP_URI_SCHEME_COAPS_TCP, /* 3 */
+  COAP_URI_SCHEME_HTTP,      /* 4 Proxy-Uri only */
+  COAP_URI_SCHEME_HTTPS      /* 5 Proxy-Uri only */
+} coap_uri_scheme_t;
+
+/** This mask can be used to check if a parsed URI scheme is secure. */
+#define COAP_URI_SCHEME_SECURE_MASK 0x01
+
+/**
+ * Representation of parsed URI. Components may be filled from a string with
+ * coap_split_uri() or coap_split_proxy_uri() and can be used as input for
+ * option-creation functions.
+ */
+typedef struct {
+  coap_str_const_t host;  /**< host part of the URI */
+  uint16_t port;          /**< The port in host byte order */
+  coap_str_const_t path;  /**< Beginning of the first path segment.
+                           Use coap_split_path() to create Uri-Path options */
+  coap_str_const_t query; /**<  The query part if present */
+
+  /** The parsed scheme specifier. */
+  enum coap_uri_scheme_t scheme;
+} coap_uri_t;
+
+static inline int
+coap_uri_scheme_is_secure(const coap_uri_t *uri) {
+  return uri && ((uri->scheme & COAP_URI_SCHEME_SECURE_MASK) != 0);
+}
+
+/**
+ * Creates a new coap_uri_t object from the specified URI. Returns the new
+ * object or NULL on error. The memory allocated by the new coap_uri_t
+ * must be released using coap_free().
+ *
+ * @param uri The URI path to copy.
+ * @param length The length of uri.
+ *
+ * @return New URI object or NULL on error.
+ */
+coap_uri_t *coap_new_uri(const uint8_t *uri, unsigned int length);
+
+/**
+ * Clones the specified coap_uri_t object. Thie function allocates sufficient
+ * memory to hold the coap_uri_t structure and its contents. The object must
+ * be released with coap_free(). */
+coap_uri_t *coap_clone_uri(const coap_uri_t *uri);
+
+/**
+ * @defgroup uri_parse URI Parsing Functions
+ *
+ * CoAP PDUs contain normalized URIs with their path and query split into
+ * multiple segments. The functions in this module help splitting strings.
+ * @{
+ */
+
+/**
+ * Parses a given string into URI components. The identified syntactic
+ * components are stored in the result parameter @p uri. Optional URI
+ * components that are not specified will be set to { 0, 0 }, except for the
+ * port which is set to the default port for the protocol. This function
+ * returns @p 0 if parsing succeeded, a value less than zero otherwise.
+ *
+ * @param str_var The string to split up.
+ * @param len     The actual length of @p str_var
+ * @param uri     The coap_uri_t object to store the result.
+ *
+ * @return        @c 0 on success, or < 0 on error.
+ *
+ */
+int coap_split_uri(const uint8_t *str_var, size_t len, coap_uri_t *uri);
+
+/**
+ * Parses a given string into URI components. The identified syntactic
+ * components are stored in the result parameter @p uri. Optional URI
+ * components that are not specified will be set to { 0, 0 }, except for the
+ * port which is set to default port for the protocol. This function returns
+ * @p 0 if parsing succeeded, a value less than zero otherwise.
+ * Note: This function enforces that the given string is in Proxy-Uri format
+ *       as well as supports different schema such as http.
+ *
+ * @param str_var The string to split up.
+ * @param len     The actual length of @p str_var
+ * @param uri     The coap_uri_t object to store the result.
+ *
+ * @return        @c 0 on success, or < 0 on error.
+ *
+ */
+int coap_split_proxy_uri(const uint8_t *str_var, size_t len, coap_uri_t *uri);
+
+/**
+ * Splits the given URI path into segments. Each segment is preceded
+ * by an option pseudo-header with delta-value 0 and the actual length
+ * of the respective segment after percent-decoding.
+ *
+ * @param s      The path string to split.
+ * @param length The actual length of @p s.
+ * @param buf    Result buffer for parsed segments.
+ * @param buflen Maximum length of @p buf. Will be set to the actual number
+ *               of bytes written into buf on success.
+ *
+ * @return       The number of segments created or @c -1 on error.
+ */
+int coap_split_path(const uint8_t *s,
+                    size_t length,
+                    unsigned char *buf,
+                    size_t *buflen);
+
+/**
+ * Splits the given URI query into segments. Each segment is preceded
+ * by an option pseudo-header with delta-value 0 and the actual length
+ * of the respective query term.
+ *
+ * @param s      The query string to split.
+ * @param length The actual length of @p s.
+ * @param buf    Result buffer for parsed segments.
+ * @param buflen Maximum length of @p buf. Will be set to the actual number
+ *               of bytes written into buf on success.
+ *
+ * @return       The number of segments created or @c -1 on error.
+ *
+ * @bug This function does not reserve additional space for delta > 12.
+ */
+int coap_split_query(const uint8_t *s,
+                     size_t length,
+                     unsigned char *buf,
+                     size_t *buflen);
+
+/**
+ * Extract query string from request PDU according to escape rules in 6.5.8.
+ * @param request Request PDU.
+ * @return        Reconstructed and escaped query string part or @c NULL if
+ *                no query was contained in @p request. The coap_string_t
+ *                object returned by this function must be released with
+ *                coap_delete_string.
+ */
+coap_string_t *coap_get_query(const coap_pdu_t *request);
+
+/**
+ * Extract uri_path string from request PDU
+ * @param request Request PDU.
+ * @return        Reconstructed and escaped uri path string part or @c NULL
+ *                if no URI-Path was contained in @p request. The
+ *                coap_string_t object returned by this function must be
+ *                released with coap_delete_string.
+ */
+coap_string_t *coap_get_uri_path(const coap_pdu_t *request);
+
+/** @} */
+
+#endif /* COAP_URI_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/uthash.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/uthash.h
new file mode 100644
index 00000000000..9a396b6179f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/uthash.h
@@ -0,0 +1,1136 @@
+/*
+Copyright (c) 2003-2021, Troy D. Hanson     http://troydhanson.github.io/uthash/
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
+OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef UTHASH_H
+#define UTHASH_H
+
+#define UTHASH_VERSION 2.3.0
+
+#include <string.h>   /* memcmp, memset, strlen */
+#include <stddef.h>   /* ptrdiff_t */
+#include <stdlib.h>   /* exit */
+
+#if defined(HASH_DEFINE_OWN_STDINT) && HASH_DEFINE_OWN_STDINT
+/* This codepath is provided for backward compatibility, but I plan to remove it. */
+#warning "HASH_DEFINE_OWN_STDINT is deprecated; please use HASH_NO_STDINT instead"
+typedef unsigned int uint32_t;
+typedef unsigned char uint8_t;
+#elif defined(HASH_NO_STDINT) && HASH_NO_STDINT
+#else
+#include <stdint.h>   /* uint8_t, uint32_t */
+#endif
+
+/* These macros use decltype or the earlier __typeof GNU extension.
+   As decltype is only available in newer compilers (VS2010 or gcc 4.3+
+   when compiling c++ source) this code uses whatever method is needed
+   or, for VS2008 where neither is available, uses casting workarounds. */
+#if !defined(DECLTYPE) && !defined(NO_DECLTYPE)
+#if defined(_MSC_VER)   /* MS compiler */
+#if _MSC_VER >= 1600 && defined(__cplusplus)  /* VS2010 or newer in C++ mode */
+#define DECLTYPE(x) (decltype(x))
+#else                   /* VS2008 or older (or VS2010 in C mode) */
+#define NO_DECLTYPE
+#endif
+#elif defined(__BORLANDC__) || defined(__ICCARM__) || defined(__LCC__) || defined(__WATCOMC__)
+#define NO_DECLTYPE
+#else                   /* GNU, Sun and other compilers */
+#define DECLTYPE(x) (__typeof(x))
+#endif
+#endif
+
+#ifdef NO_DECLTYPE
+#define DECLTYPE(x)
+#define DECLTYPE_ASSIGN(dst,src)                                                 \
+do {                                                                             \
+  char **_da_dst = (char**)(&(dst));                                             \
+  *_da_dst = (char*)(src);                                                       \
+} while (0)
+#else
+#define DECLTYPE_ASSIGN(dst,src)                                                 \
+do {                                                                             \
+  (dst) = DECLTYPE(dst)(src);                                                    \
+} while (0)
+#endif
+
+#ifndef uthash_malloc
+#define uthash_malloc(sz) malloc(sz)      /* malloc fcn                      */
+#endif
+#ifndef uthash_free
+#define uthash_free(ptr,sz) free(ptr)     /* free fcn                        */
+#endif
+#ifndef uthash_bzero
+#define uthash_bzero(a,n) memset(a,'\0',n)
+#endif
+#ifndef uthash_strlen
+#define uthash_strlen(s) strlen(s)
+#endif
+
+#ifndef HASH_FUNCTION
+#define HASH_FUNCTION(keyptr,keylen,hashv) HASH_JEN(keyptr, keylen, hashv)
+#endif
+
+#ifndef HASH_KEYCMP
+#define HASH_KEYCMP(a,b,n) memcmp(a,b,n)
+#endif
+
+#ifndef uthash_noexpand_fyi
+#define uthash_noexpand_fyi(tbl)          /* can be defined to log noexpand  */
+#endif
+#ifndef uthash_expand_fyi
+#define uthash_expand_fyi(tbl)            /* can be defined to log expands   */
+#endif
+
+#ifndef HASH_NONFATAL_OOM
+#define HASH_NONFATAL_OOM 0
+#endif
+
+#if HASH_NONFATAL_OOM
+/* malloc failures can be recovered from */
+
+#ifndef uthash_nonfatal_oom
+#define uthash_nonfatal_oom(obj) do {} while (0)    /* non-fatal OOM error */
+#endif
+
+#define HASH_RECORD_OOM(oomed) do { (oomed) = 1; } while (0)
+#define IF_HASH_NONFATAL_OOM(x) x
+
+#else
+/* malloc failures result in lost memory, hash tables are unusable */
+
+#ifndef uthash_fatal
+#define uthash_fatal(msg) exit(-1)        /* fatal OOM error */
+#endif
+
+#define HASH_RECORD_OOM(oomed) uthash_fatal("out of memory")
+#define IF_HASH_NONFATAL_OOM(x)
+
+#endif
+
+/* initial number of buckets */
+#define HASH_INITIAL_NUM_BUCKETS 32U     /* initial number of buckets        */
+#define HASH_INITIAL_NUM_BUCKETS_LOG2 5U /* lg2 of initial number of buckets */
+#define HASH_BKT_CAPACITY_THRESH 10U     /* expand when bucket count reaches */
+
+/* calculate the element whose hash handle address is hhp */
+#define ELMT_FROM_HH(tbl,hhp) ((void*)(((char*)(hhp)) - ((tbl)->hho)))
+/* calculate the hash handle from element address elp */
+#define HH_FROM_ELMT(tbl,elp) ((UT_hash_handle*)(void*)(((char*)(elp)) + ((tbl)->hho)))
+
+#define HASH_ROLLBACK_BKT(hh, head, itemptrhh)                                   \
+do {                                                                             \
+  struct UT_hash_handle *_hd_hh_item = (itemptrhh);                              \
+  unsigned _hd_bkt;                                                              \
+  HASH_TO_BKT(_hd_hh_item->hashv, (head)->hh.tbl->num_buckets, _hd_bkt);         \
+  (head)->hh.tbl->buckets[_hd_bkt].count++;                                      \
+  _hd_hh_item->hh_next = NULL;                                                   \
+  _hd_hh_item->hh_prev = NULL;                                                   \
+} while (0)
+
+#define HASH_VALUE(keyptr,keylen,hashv)                                          \
+do {                                                                             \
+  HASH_FUNCTION(keyptr, keylen, hashv);                                          \
+} while (0)
+
+#define HASH_FIND_BYHASHVALUE(hh,head,keyptr,keylen,hashval,out)                 \
+do {                                                                             \
+  (out) = NULL;                                                                  \
+  if (head) {                                                                    \
+    unsigned _hf_bkt;                                                            \
+    HASH_TO_BKT(hashval, (head)->hh.tbl->num_buckets, _hf_bkt);                  \
+    if (HASH_BLOOM_TEST((head)->hh.tbl, hashval) != 0) {                         \
+      HASH_FIND_IN_BKT((head)->hh.tbl, hh, (head)->hh.tbl->buckets[ _hf_bkt ], keyptr, keylen, hashval, out); \
+    }                                                                            \
+  }                                                                              \
+} while (0)
+
+#define HASH_FIND(hh,head,keyptr,keylen,out)                                     \
+do {                                                                             \
+  (out) = NULL;                                                                  \
+  if (head) {                                                                    \
+    unsigned _hf_hashv;                                                          \
+    HASH_VALUE(keyptr, keylen, _hf_hashv);                                       \
+    HASH_FIND_BYHASHVALUE(hh, head, keyptr, keylen, _hf_hashv, out);             \
+  }                                                                              \
+} while (0)
+
+#ifdef HASH_BLOOM
+#define HASH_BLOOM_BITLEN (1UL << HASH_BLOOM)
+#define HASH_BLOOM_BYTELEN (HASH_BLOOM_BITLEN/8UL) + (((HASH_BLOOM_BITLEN%8UL)!=0UL) ? 1UL : 0UL)
+#define HASH_BLOOM_MAKE(tbl,oomed)                                               \
+do {                                                                             \
+  (tbl)->bloom_nbits = HASH_BLOOM;                                               \
+  (tbl)->bloom_bv = (uint8_t*)uthash_malloc(HASH_BLOOM_BYTELEN);                 \
+  if (!(tbl)->bloom_bv) {                                                        \
+    HASH_RECORD_OOM(oomed);                                                      \
+  } else {                                                                       \
+    uthash_bzero((tbl)->bloom_bv, HASH_BLOOM_BYTELEN);                           \
+    (tbl)->bloom_sig = HASH_BLOOM_SIGNATURE;                                     \
+  }                                                                              \
+} while (0)
+
+#define HASH_BLOOM_FREE(tbl)                                                     \
+do {                                                                             \
+  uthash_free((tbl)->bloom_bv, HASH_BLOOM_BYTELEN);                              \
+} while (0)
+
+#define HASH_BLOOM_BITSET(bv,idx) (bv[(idx)/8U] |= (1U << ((idx)%8U)))
+#define HASH_BLOOM_BITTEST(bv,idx) (bv[(idx)/8U] & (1U << ((idx)%8U)))
+
+#define HASH_BLOOM_ADD(tbl,hashv)                                                \
+  HASH_BLOOM_BITSET((tbl)->bloom_bv, ((hashv) & (uint32_t)((1UL << (tbl)->bloom_nbits) - 1U)))
+
+#define HASH_BLOOM_TEST(tbl,hashv)                                               \
+  HASH_BLOOM_BITTEST((tbl)->bloom_bv, ((hashv) & (uint32_t)((1UL << (tbl)->bloom_nbits) - 1U)))
+
+#else
+#define HASH_BLOOM_MAKE(tbl,oomed)
+#define HASH_BLOOM_FREE(tbl)
+#define HASH_BLOOM_ADD(tbl,hashv)
+#define HASH_BLOOM_TEST(tbl,hashv) (1)
+#define HASH_BLOOM_BYTELEN 0U
+#endif
+
+#define HASH_MAKE_TABLE(hh,head,oomed)                                           \
+do {                                                                             \
+  (head)->hh.tbl = (UT_hash_table*)uthash_malloc(sizeof(UT_hash_table));         \
+  if (!(head)->hh.tbl) {                                                         \
+    HASH_RECORD_OOM(oomed);                                                      \
+  } else {                                                                       \
+    uthash_bzero((head)->hh.tbl, sizeof(UT_hash_table));                         \
+    (head)->hh.tbl->tail = &((head)->hh);                                        \
+    (head)->hh.tbl->num_buckets = HASH_INITIAL_NUM_BUCKETS;                      \
+    (head)->hh.tbl->log2_num_buckets = HASH_INITIAL_NUM_BUCKETS_LOG2;            \
+    (head)->hh.tbl->hho = (char*)(&(head)->hh) - (char*)(head);                  \
+    (head)->hh.tbl->buckets = (UT_hash_bucket*)uthash_malloc(                    \
+        HASH_INITIAL_NUM_BUCKETS * sizeof(struct UT_hash_bucket));               \
+    (head)->hh.tbl->signature = HASH_SIGNATURE;                                  \
+    if (!(head)->hh.tbl->buckets) {                                              \
+      HASH_RECORD_OOM(oomed);                                                    \
+      uthash_free((head)->hh.tbl, sizeof(UT_hash_table));                        \
+    } else {                                                                     \
+      uthash_bzero((head)->hh.tbl->buckets,                                      \
+          HASH_INITIAL_NUM_BUCKETS * sizeof(struct UT_hash_bucket));             \
+      HASH_BLOOM_MAKE((head)->hh.tbl, oomed);                                    \
+      IF_HASH_NONFATAL_OOM(                                                      \
+        if (oomed) {                                                             \
+          uthash_free((head)->hh.tbl->buckets,                                   \
+              HASH_INITIAL_NUM_BUCKETS*sizeof(struct UT_hash_bucket));           \
+          uthash_free((head)->hh.tbl, sizeof(UT_hash_table));                    \
+        }                                                                        \
+      )                                                                          \
+    }                                                                            \
+  }                                                                              \
+} while (0)
+
+#define HASH_REPLACE_BYHASHVALUE_INORDER(hh,head,fieldname,keylen_in,hashval,add,replaced,cmpfcn) \
+do {                                                                             \
+  (replaced) = NULL;                                                             \
+  HASH_FIND_BYHASHVALUE(hh, head, &((add)->fieldname), keylen_in, hashval, replaced); \
+  if (replaced) {                                                                \
+    HASH_DELETE(hh, head, replaced);                                             \
+  }                                                                              \
+  HASH_ADD_KEYPTR_BYHASHVALUE_INORDER(hh, head, &((add)->fieldname), keylen_in, hashval, add, cmpfcn); \
+} while (0)
+
+#define HASH_REPLACE_BYHASHVALUE(hh,head,fieldname,keylen_in,hashval,add,replaced) \
+do {                                                                             \
+  (replaced) = NULL;                                                             \
+  HASH_FIND_BYHASHVALUE(hh, head, &((add)->fieldname), keylen_in, hashval, replaced); \
+  if (replaced) {                                                                \
+    HASH_DELETE(hh, head, replaced);                                             \
+  }                                                                              \
+  HASH_ADD_KEYPTR_BYHASHVALUE(hh, head, &((add)->fieldname), keylen_in, hashval, add); \
+} while (0)
+
+#define HASH_REPLACE(hh,head,fieldname,keylen_in,add,replaced)                   \
+do {                                                                             \
+  unsigned _hr_hashv;                                                            \
+  HASH_VALUE(&((add)->fieldname), keylen_in, _hr_hashv);                         \
+  HASH_REPLACE_BYHASHVALUE(hh, head, fieldname, keylen_in, _hr_hashv, add, replaced); \
+} while (0)
+
+#define HASH_REPLACE_INORDER(hh,head,fieldname,keylen_in,add,replaced,cmpfcn)    \
+do {                                                                             \
+  unsigned _hr_hashv;                                                            \
+  HASH_VALUE(&((add)->fieldname), keylen_in, _hr_hashv);                         \
+  HASH_REPLACE_BYHASHVALUE_INORDER(hh, head, fieldname, keylen_in, _hr_hashv, add, replaced, cmpfcn); \
+} while (0)
+
+#define HASH_APPEND_LIST(hh, head, add)                                          \
+do {                                                                             \
+  (add)->hh.next = NULL;                                                         \
+  (add)->hh.prev = ELMT_FROM_HH((head)->hh.tbl, (head)->hh.tbl->tail);           \
+  (head)->hh.tbl->tail->next = (add);                                            \
+  (head)->hh.tbl->tail = &((add)->hh);                                           \
+} while (0)
+
+#define HASH_AKBI_INNER_LOOP(hh,head,add,cmpfcn)                                 \
+do {                                                                             \
+  do {                                                                           \
+    if (cmpfcn(DECLTYPE(head)(_hs_iter), add) > 0) {                             \
+      break;                                                                     \
+    }                                                                            \
+  } while ((_hs_iter = HH_FROM_ELMT((head)->hh.tbl, _hs_iter)->next));           \
+} while (0)
+
+#ifdef NO_DECLTYPE
+#undef HASH_AKBI_INNER_LOOP
+#define HASH_AKBI_INNER_LOOP(hh,head,add,cmpfcn)                                 \
+do {                                                                             \
+  char *_hs_saved_head = (char*)(head);                                          \
+  do {                                                                           \
+    DECLTYPE_ASSIGN(head, _hs_iter);                                             \
+    if (cmpfcn(head, add) > 0) {                                                 \
+      DECLTYPE_ASSIGN(head, _hs_saved_head);                                     \
+      break;                                                                     \
+    }                                                                            \
+    DECLTYPE_ASSIGN(head, _hs_saved_head);                                       \
+  } while ((_hs_iter = HH_FROM_ELMT((head)->hh.tbl, _hs_iter)->next));           \
+} while (0)
+#endif
+
+#if HASH_NONFATAL_OOM
+
+#define HASH_ADD_TO_TABLE(hh,head,keyptr,keylen_in,hashval,add,oomed)            \
+do {                                                                             \
+  if (!(oomed)) {                                                                \
+    unsigned _ha_bkt;                                                            \
+    (head)->hh.tbl->num_items++;                                                 \
+    HASH_TO_BKT(hashval, (head)->hh.tbl->num_buckets, _ha_bkt);                  \
+    HASH_ADD_TO_BKT((head)->hh.tbl->buckets[_ha_bkt], hh, &(add)->hh, oomed);    \
+    if (oomed) {                                                                 \
+      HASH_ROLLBACK_BKT(hh, head, &(add)->hh);                                   \
+      HASH_DELETE_HH(hh, head, &(add)->hh);                                      \
+      (add)->hh.tbl = NULL;                                                      \
+      uthash_nonfatal_oom(add);                                                  \
+    } else {                                                                     \
+      HASH_BLOOM_ADD((head)->hh.tbl, hashval);                                   \
+      HASH_EMIT_KEY(hh, head, keyptr, keylen_in);                                \
+    }                                                                            \
+  } else {                                                                       \
+    (add)->hh.tbl = NULL;                                                        \
+    uthash_nonfatal_oom(add);                                                    \
+  }                                                                              \
+} while (0)
+
+#else
+
+#define HASH_ADD_TO_TABLE(hh,head,keyptr,keylen_in,hashval,add,oomed)            \
+do {                                                                             \
+  unsigned _ha_bkt;                                                              \
+  (head)->hh.tbl->num_items++;                                                   \
+  HASH_TO_BKT(hashval, (head)->hh.tbl->num_buckets, _ha_bkt);                    \
+  HASH_ADD_TO_BKT((head)->hh.tbl->buckets[_ha_bkt], hh, &(add)->hh, oomed);      \
+  HASH_BLOOM_ADD((head)->hh.tbl, hashval);                                       \
+  HASH_EMIT_KEY(hh, head, keyptr, keylen_in);                                    \
+} while (0)
+
+#endif
+
+
+#define HASH_ADD_KEYPTR_BYHASHVALUE_INORDER(hh,head,keyptr,keylen_in,hashval,add,cmpfcn) \
+do {                                                                             \
+  IF_HASH_NONFATAL_OOM( int _ha_oomed = 0; )                                     \
+  (add)->hh.hashv = (hashval);                                                   \
+  (add)->hh.key = (char*) (keyptr);                                              \
+  (add)->hh.keylen = (unsigned) (keylen_in);                                     \
+  if (!(head)) {                                                                 \
+    (add)->hh.next = NULL;                                                       \
+    (add)->hh.prev = NULL;                                                       \
+    HASH_MAKE_TABLE(hh, add, _ha_oomed);                                         \
+    IF_HASH_NONFATAL_OOM( if (!_ha_oomed) { )                                    \
+      (head) = (add);                                                            \
+    IF_HASH_NONFATAL_OOM( } )                                                    \
+  } else {                                                                       \
+    void *_hs_iter = (head);                                                     \
+    (add)->hh.tbl = (head)->hh.tbl;                                              \
+    HASH_AKBI_INNER_LOOP(hh, head, add, cmpfcn);                                 \
+    if (_hs_iter) {                                                              \
+      (add)->hh.next = _hs_iter;                                                 \
+      if (((add)->hh.prev = HH_FROM_ELMT((head)->hh.tbl, _hs_iter)->prev)) {     \
+        HH_FROM_ELMT((head)->hh.tbl, (add)->hh.prev)->next = (add);              \
+      } else {                                                                   \
+        (head) = (add);                                                          \
+      }                                                                          \
+      HH_FROM_ELMT((head)->hh.tbl, _hs_iter)->prev = (add);                      \
+    } else {                                                                     \
+      HASH_APPEND_LIST(hh, head, add);                                           \
+    }                                                                            \
+  }                                                                              \
+  HASH_ADD_TO_TABLE(hh, head, keyptr, keylen_in, hashval, add, _ha_oomed);       \
+  HASH_FSCK(hh, head, "HASH_ADD_KEYPTR_BYHASHVALUE_INORDER");                    \
+} while (0)
+
+#define HASH_ADD_KEYPTR_INORDER(hh,head,keyptr,keylen_in,add,cmpfcn)             \
+do {                                                                             \
+  unsigned _hs_hashv;                                                            \
+  HASH_VALUE(keyptr, keylen_in, _hs_hashv);                                      \
+  HASH_ADD_KEYPTR_BYHASHVALUE_INORDER(hh, head, keyptr, keylen_in, _hs_hashv, add, cmpfcn); \
+} while (0)
+
+#define HASH_ADD_BYHASHVALUE_INORDER(hh,head,fieldname,keylen_in,hashval,add,cmpfcn) \
+  HASH_ADD_KEYPTR_BYHASHVALUE_INORDER(hh, head, &((add)->fieldname), keylen_in, hashval, add, cmpfcn)
+
+#define HASH_ADD_INORDER(hh,head,fieldname,keylen_in,add,cmpfcn)                 \
+  HASH_ADD_KEYPTR_INORDER(hh, head, &((add)->fieldname), keylen_in, add, cmpfcn)
+
+#define HASH_ADD_KEYPTR_BYHASHVALUE(hh,head,keyptr,keylen_in,hashval,add)        \
+do {                                                                             \
+  IF_HASH_NONFATAL_OOM( int _ha_oomed = 0; )                                     \
+  (add)->hh.hashv = (hashval);                                                   \
+  (add)->hh.key = (const void*) (keyptr);                                        \
+  (add)->hh.keylen = (unsigned) (keylen_in);                                     \
+  if (!(head)) {                                                                 \
+    (add)->hh.next = NULL;                                                       \
+    (add)->hh.prev = NULL;                                                       \
+    HASH_MAKE_TABLE(hh, add, _ha_oomed);                                         \
+    IF_HASH_NONFATAL_OOM( if (!_ha_oomed) { )                                    \
+      (head) = (add);                                                            \
+    IF_HASH_NONFATAL_OOM( } )                                                    \
+  } else {                                                                       \
+    (add)->hh.tbl = (head)->hh.tbl;                                              \
+    HASH_APPEND_LIST(hh, head, add);                                             \
+  }                                                                              \
+  HASH_ADD_TO_TABLE(hh, head, keyptr, keylen_in, hashval, add, _ha_oomed);       \
+  HASH_FSCK(hh, head, "HASH_ADD_KEYPTR_BYHASHVALUE");                            \
+} while (0)
+
+#define HASH_ADD_KEYPTR(hh,head,keyptr,keylen_in,add)                            \
+do {                                                                             \
+  unsigned _ha_hashv;                                                            \
+  HASH_VALUE(keyptr, keylen_in, _ha_hashv);                                      \
+  HASH_ADD_KEYPTR_BYHASHVALUE(hh, head, keyptr, keylen_in, _ha_hashv, add);      \
+} while (0)
+
+#define HASH_ADD_BYHASHVALUE(hh,head,fieldname,keylen_in,hashval,add)            \
+  HASH_ADD_KEYPTR_BYHASHVALUE(hh, head, &((add)->fieldname), keylen_in, hashval, add)
+
+#define HASH_ADD(hh,head,fieldname,keylen_in,add)                                \
+  HASH_ADD_KEYPTR(hh, head, &((add)->fieldname), keylen_in, add)
+
+#define HASH_TO_BKT(hashv,num_bkts,bkt)                                          \
+do {                                                                             \
+  bkt = ((hashv) & ((num_bkts) - 1U));                                           \
+} while (0)
+
+/* delete "delptr" from the hash table.
+ * "the usual" patch-up process for the app-order doubly-linked-list.
+ * The use of _hd_hh_del below deserves special explanation.
+ * These used to be expressed using (delptr) but that led to a bug
+ * if someone used the same symbol for the head and deletee, like
+ *  HASH_DELETE(hh,users,users);
+ * We want that to work, but by changing the head (users) below
+ * we were forfeiting our ability to further refer to the deletee (users)
+ * in the patch-up process. Solution: use scratch space to
+ * copy the deletee pointer, then the latter references are via that
+ * scratch pointer rather than through the repointed (users) symbol.
+ */
+#define HASH_DELETE(hh,head,delptr)                                              \
+    HASH_DELETE_HH(hh, head, &(delptr)->hh)
+
+#define HASH_DELETE_HH(hh,head,delptrhh)                                         \
+do {                                                                             \
+  struct UT_hash_handle *_hd_hh_del = (delptrhh);                                \
+  if ((_hd_hh_del->prev == NULL) && (_hd_hh_del->next == NULL)) {                \
+    HASH_BLOOM_FREE((head)->hh.tbl);                                             \
+    uthash_free((head)->hh.tbl->buckets,                                         \
+                (head)->hh.tbl->num_buckets * sizeof(struct UT_hash_bucket));    \
+    uthash_free((head)->hh.tbl, sizeof(UT_hash_table));                          \
+    (head) = NULL;                                                               \
+  } else {                                                                       \
+    unsigned _hd_bkt;                                                            \
+    if (_hd_hh_del == (head)->hh.tbl->tail) {                                    \
+      (head)->hh.tbl->tail = HH_FROM_ELMT((head)->hh.tbl, _hd_hh_del->prev);     \
+    }                                                                            \
+    if (_hd_hh_del->prev != NULL) {                                              \
+      HH_FROM_ELMT((head)->hh.tbl, _hd_hh_del->prev)->next = _hd_hh_del->next;   \
+    } else {                                                                     \
+      DECLTYPE_ASSIGN(head, _hd_hh_del->next);                                   \
+    }                                                                            \
+    if (_hd_hh_del->next != NULL) {                                              \
+      HH_FROM_ELMT((head)->hh.tbl, _hd_hh_del->next)->prev = _hd_hh_del->prev;   \
+    }                                                                            \
+    HASH_TO_BKT(_hd_hh_del->hashv, (head)->hh.tbl->num_buckets, _hd_bkt);        \
+    HASH_DEL_IN_BKT((head)->hh.tbl->buckets[_hd_bkt], _hd_hh_del);               \
+    (head)->hh.tbl->num_items--;                                                 \
+  }                                                                              \
+  HASH_FSCK(hh, head, "HASH_DELETE_HH");                                         \
+} while (0)
+
+/* convenience forms of HASH_FIND/HASH_ADD/HASH_DEL */
+#define HASH_FIND_STR(head,findstr,out)                                          \
+do {                                                                             \
+    unsigned _uthash_hfstr_keylen = (unsigned)uthash_strlen(findstr);            \
+    HASH_FIND(hh, head, findstr, _uthash_hfstr_keylen, out);                     \
+} while (0)
+#define HASH_ADD_STR(head,strfield,add)                                          \
+do {                                                                             \
+    unsigned _uthash_hastr_keylen = (unsigned)uthash_strlen((add)->strfield);    \
+    HASH_ADD(hh, head, strfield[0], _uthash_hastr_keylen, add);                  \
+} while (0)
+#define HASH_REPLACE_STR(head,strfield,add,replaced)                             \
+do {                                                                             \
+    unsigned _uthash_hrstr_keylen = (unsigned)uthash_strlen((add)->strfield);    \
+    HASH_REPLACE(hh, head, strfield[0], _uthash_hrstr_keylen, add, replaced);    \
+} while (0)
+#define HASH_FIND_INT(head,findint,out)                                          \
+    HASH_FIND(hh,head,findint,sizeof(int),out)
+#define HASH_ADD_INT(head,intfield,add)                                          \
+    HASH_ADD(hh,head,intfield,sizeof(int),add)
+#define HASH_REPLACE_INT(head,intfield,add,replaced)                             \
+    HASH_REPLACE(hh,head,intfield,sizeof(int),add,replaced)
+#define HASH_FIND_PTR(head,findptr,out)                                          \
+    HASH_FIND(hh,head,findptr,sizeof(void *),out)
+#define HASH_ADD_PTR(head,ptrfield,add)                                          \
+    HASH_ADD(hh,head,ptrfield,sizeof(void *),add)
+#define HASH_REPLACE_PTR(head,ptrfield,add,replaced)                             \
+    HASH_REPLACE(hh,head,ptrfield,sizeof(void *),add,replaced)
+#define HASH_DEL(head,delptr)                                                    \
+    HASH_DELETE(hh,head,delptr)
+
+/* HASH_FSCK checks hash integrity on every add/delete when HASH_DEBUG is defined.
+ * This is for uthash developer only; it compiles away if HASH_DEBUG isn't defined.
+ */
+#ifdef HASH_DEBUG
+#include <stdio.h>   /* fprintf, stderr */
+#define HASH_OOPS(...) do { fprintf(stderr, __VA_ARGS__); exit(-1); } while (0)
+#define HASH_FSCK(hh,head,where)                                                 \
+do {                                                                             \
+  struct UT_hash_handle *_thh;                                                   \
+  if (head) {                                                                    \
+    unsigned _bkt_i;                                                             \
+    unsigned _count = 0;                                                         \
+    char *_prev;                                                                 \
+    for (_bkt_i = 0; _bkt_i < (head)->hh.tbl->num_buckets; ++_bkt_i) {           \
+      unsigned _bkt_count = 0;                                                   \
+      _thh = (head)->hh.tbl->buckets[_bkt_i].hh_head;                            \
+      _prev = NULL;                                                              \
+      while (_thh) {                                                             \
+        if (_prev != (char*)(_thh->hh_prev)) {                                   \
+          HASH_OOPS("%s: invalid hh_prev %p, actual %p\n",                       \
+              (where), (void*)_thh->hh_prev, (void*)_prev);                      \
+        }                                                                        \
+        _bkt_count++;                                                            \
+        _prev = (char*)(_thh);                                                   \
+        _thh = _thh->hh_next;                                                    \
+      }                                                                          \
+      _count += _bkt_count;                                                      \
+      if ((head)->hh.tbl->buckets[_bkt_i].count !=  _bkt_count) {                \
+        HASH_OOPS("%s: invalid bucket count %u, actual %u\n",                    \
+            (where), (head)->hh.tbl->buckets[_bkt_i].count, _bkt_count);         \
+      }                                                                          \
+    }                                                                            \
+    if (_count != (head)->hh.tbl->num_items) {                                   \
+      HASH_OOPS("%s: invalid hh item count %u, actual %u\n",                     \
+          (where), (head)->hh.tbl->num_items, _count);                           \
+    }                                                                            \
+    _count = 0;                                                                  \
+    _prev = NULL;                                                                \
+    _thh =  &(head)->hh;                                                         \
+    while (_thh) {                                                               \
+      _count++;                                                                  \
+      if (_prev != (char*)_thh->prev) {                                          \
+        HASH_OOPS("%s: invalid prev %p, actual %p\n",                            \
+            (where), (void*)_thh->prev, (void*)_prev);                           \
+      }                                                                          \
+      _prev = (char*)ELMT_FROM_HH((head)->hh.tbl, _thh);                         \
+      _thh = (_thh->next ? HH_FROM_ELMT((head)->hh.tbl, _thh->next) : NULL);     \
+    }                                                                            \
+    if (_count != (head)->hh.tbl->num_items) {                                   \
+      HASH_OOPS("%s: invalid app item count %u, actual %u\n",                    \
+          (where), (head)->hh.tbl->num_items, _count);                           \
+    }                                                                            \
+  }                                                                              \
+} while (0)
+#else
+#define HASH_FSCK(hh,head,where)
+#endif
+
+/* When compiled with -DHASH_EMIT_KEYS, length-prefixed keys are emitted to
+ * the descriptor to which this macro is defined for tuning the hash function.
+ * The app can #include <unistd.h> to get the prototype for write(2). */
+#ifdef HASH_EMIT_KEYS
+#define HASH_EMIT_KEY(hh,head,keyptr,fieldlen)                                   \
+do {                                                                             \
+  unsigned _klen = fieldlen;                                                     \
+  write(HASH_EMIT_KEYS, &_klen, sizeof(_klen));                                  \
+  write(HASH_EMIT_KEYS, keyptr, (unsigned long)fieldlen);                        \
+} while (0)
+#else
+#define HASH_EMIT_KEY(hh,head,keyptr,fieldlen)
+#endif
+
+/* The Bernstein hash function, used in Perl prior to v5.6. Note (x<<5+x)=x*33. */
+#define HASH_BER(key,keylen,hashv)                                               \
+do {                                                                             \
+  unsigned _hb_keylen = (unsigned)keylen;                                        \
+  const unsigned char *_hb_key = (const unsigned char*)(key);                    \
+  (hashv) = 0;                                                                   \
+  while (_hb_keylen-- != 0U) {                                                   \
+    (hashv) = (((hashv) << 5) + (hashv)) + *_hb_key++;                           \
+  }                                                                              \
+} while (0)
+
+
+/* SAX/FNV/OAT/JEN hash functions are macro variants of those listed at
+ * http://eternallyconfuzzled.com/tuts/algorithms/jsw_tut_hashing.aspx */
+#define HASH_SAX(key,keylen,hashv)                                               \
+do {                                                                             \
+  unsigned _sx_i;                                                                \
+  const unsigned char *_hs_key = (const unsigned char*)(key);                    \
+  hashv = 0;                                                                     \
+  for (_sx_i=0; _sx_i < keylen; _sx_i++) {                                       \
+    hashv ^= (hashv << 5) + (hashv >> 2) + _hs_key[_sx_i];                       \
+  }                                                                              \
+} while (0)
+/* FNV-1a variation */
+#define HASH_FNV(key,keylen,hashv)                                               \
+do {                                                                             \
+  unsigned _fn_i;                                                                \
+  const unsigned char *_hf_key = (const unsigned char*)(key);                    \
+  (hashv) = 2166136261U;                                                         \
+  for (_fn_i=0; _fn_i < keylen; _fn_i++) {                                       \
+    hashv = hashv ^ _hf_key[_fn_i];                                              \
+    hashv = hashv * 16777619U;                                                   \
+  }                                                                              \
+} while (0)
+
+#define HASH_OAT(key,keylen,hashv)                                               \
+do {                                                                             \
+  unsigned _ho_i;                                                                \
+  const unsigned char *_ho_key=(const unsigned char*)(key);                      \
+  hashv = 0;                                                                     \
+  for(_ho_i=0; _ho_i < keylen; _ho_i++) {                                        \
+      hashv += _ho_key[_ho_i];                                                   \
+      hashv += (hashv << 10);                                                    \
+      hashv ^= (hashv >> 6);                                                     \
+  }                                                                              \
+  hashv += (hashv << 3);                                                         \
+  hashv ^= (hashv >> 11);                                                        \
+  hashv += (hashv << 15);                                                        \
+} while (0)
+
+#define HASH_JEN_MIX(a,b,c)                                                      \
+do {                                                                             \
+  a -= b; a -= c; a ^= ( c >> 13 );                                              \
+  b -= c; b -= a; b ^= ( a << 8 );                                               \
+  c -= a; c -= b; c ^= ( b >> 13 );                                              \
+  a -= b; a -= c; a ^= ( c >> 12 );                                              \
+  b -= c; b -= a; b ^= ( a << 16 );                                              \
+  c -= a; c -= b; c ^= ( b >> 5 );                                               \
+  a -= b; a -= c; a ^= ( c >> 3 );                                               \
+  b -= c; b -= a; b ^= ( a << 10 );                                              \
+  c -= a; c -= b; c ^= ( b >> 15 );                                              \
+} while (0)
+
+#define HASH_JEN(key,keylen,hashv)                                               \
+do {                                                                             \
+  unsigned _hj_i,_hj_j,_hj_k;                                                    \
+  unsigned const char *_hj_key=(unsigned const char*)(key);                      \
+  hashv = 0xfeedbeefu;                                                           \
+  _hj_i = _hj_j = 0x9e3779b9u;                                                   \
+  _hj_k = (unsigned)(keylen);                                                    \
+  while (_hj_k >= 12U) {                                                         \
+    _hj_i +=    (_hj_key[0] + ( (unsigned)_hj_key[1] << 8 )                      \
+        + ( (unsigned)_hj_key[2] << 16 )                                         \
+        + ( (unsigned)_hj_key[3] << 24 ) );                                      \
+    _hj_j +=    (_hj_key[4] + ( (unsigned)_hj_key[5] << 8 )                      \
+        + ( (unsigned)_hj_key[6] << 16 )                                         \
+        + ( (unsigned)_hj_key[7] << 24 ) );                                      \
+    hashv += (_hj_key[8] + ( (unsigned)_hj_key[9] << 8 )                         \
+        + ( (unsigned)_hj_key[10] << 16 )                                        \
+        + ( (unsigned)_hj_key[11] << 24 ) );                                     \
+                                                                                 \
+     HASH_JEN_MIX(_hj_i, _hj_j, hashv);                                          \
+                                                                                 \
+     _hj_key += 12;                                                              \
+     _hj_k -= 12U;                                                               \
+  }                                                                              \
+  hashv += (unsigned)(keylen);                                                   \
+  switch ( _hj_k ) {                                                             \
+    case 11: hashv += ( (unsigned)_hj_key[10] << 24 ); /* FALLTHROUGH */         \
+    case 10: hashv += ( (unsigned)_hj_key[9] << 16 );  /* FALLTHROUGH */         \
+    case 9:  hashv += ( (unsigned)_hj_key[8] << 8 );   /* FALLTHROUGH */         \
+    case 8:  _hj_j += ( (unsigned)_hj_key[7] << 24 );  /* FALLTHROUGH */         \
+    case 7:  _hj_j += ( (unsigned)_hj_key[6] << 16 );  /* FALLTHROUGH */         \
+    case 6:  _hj_j += ( (unsigned)_hj_key[5] << 8 );   /* FALLTHROUGH */         \
+    case 5:  _hj_j += _hj_key[4];                      /* FALLTHROUGH */         \
+    case 4:  _hj_i += ( (unsigned)_hj_key[3] << 24 );  /* FALLTHROUGH */         \
+    case 3:  _hj_i += ( (unsigned)_hj_key[2] << 16 );  /* FALLTHROUGH */         \
+    case 2:  _hj_i += ( (unsigned)_hj_key[1] << 8 );   /* FALLTHROUGH */         \
+    case 1:  _hj_i += _hj_key[0];                      /* FALLTHROUGH */         \
+    default: ;                                                                   \
+  }                                                                              \
+  HASH_JEN_MIX(_hj_i, _hj_j, hashv);                                             \
+} while (0)
+
+/* The Paul Hsieh hash function */
+#undef get16bits
+#if (defined(__GNUC__) && defined(__i386__)) || defined(__WATCOMC__)             \
+  || defined(_MSC_VER) || defined (__BORLANDC__) || defined (__TURBOC__)
+#define get16bits(d) (*((const uint16_t *) (d)))
+#endif
+
+#if !defined (get16bits)
+#define get16bits(d) ((((uint32_t)(((const uint8_t *)(d))[1])) << 8)             \
+                       +(uint32_t)(((const uint8_t *)(d))[0]) )
+#endif
+#define HASH_SFH(key,keylen,hashv)                                               \
+do {                                                                             \
+  unsigned const char *_sfh_key=(unsigned const char*)(key);                     \
+  uint32_t _sfh_tmp, _sfh_len = (uint32_t)keylen;                                \
+                                                                                 \
+  unsigned _sfh_rem = _sfh_len & 3U;                                             \
+  _sfh_len >>= 2;                                                                \
+  hashv = 0xcafebabeu;                                                           \
+                                                                                 \
+  /* Main loop */                                                                \
+  for (;_sfh_len > 0U; _sfh_len--) {                                             \
+    hashv    += get16bits (_sfh_key);                                            \
+    _sfh_tmp  = ((uint32_t)(get16bits (_sfh_key+2)) << 11) ^ hashv;              \
+    hashv     = (hashv << 16) ^ _sfh_tmp;                                        \
+    _sfh_key += 2U*sizeof (uint16_t);                                            \
+    hashv    += hashv >> 11;                                                     \
+  }                                                                              \
+                                                                                 \
+  /* Handle end cases */                                                         \
+  switch (_sfh_rem) {                                                            \
+    case 3: hashv += get16bits (_sfh_key);                                       \
+            hashv ^= hashv << 16;                                                \
+            hashv ^= (uint32_t)(_sfh_key[sizeof (uint16_t)]) << 18;              \
+            hashv += hashv >> 11;                                                \
+            break;                                                               \
+    case 2: hashv += get16bits (_sfh_key);                                       \
+            hashv ^= hashv << 11;                                                \
+            hashv += hashv >> 17;                                                \
+            break;                                                               \
+    case 1: hashv += *_sfh_key;                                                  \
+            hashv ^= hashv << 10;                                                \
+            hashv += hashv >> 1;                                                 \
+            break;                                                               \
+    default: ;                                                                   \
+  }                                                                              \
+                                                                                 \
+  /* Force "avalanching" of final 127 bits */                                    \
+  hashv ^= hashv << 3;                                                           \
+  hashv += hashv >> 5;                                                           \
+  hashv ^= hashv << 4;                                                           \
+  hashv += hashv >> 17;                                                          \
+  hashv ^= hashv << 25;                                                          \
+  hashv += hashv >> 6;                                                           \
+} while (0)
+
+/* iterate over items in a known bucket to find desired item */
+#define HASH_FIND_IN_BKT(tbl,hh,head,keyptr,keylen_in,hashval,out)               \
+do {                                                                             \
+  if ((head).hh_head != NULL) {                                                  \
+    DECLTYPE_ASSIGN(out, ELMT_FROM_HH(tbl, (head).hh_head));                     \
+  } else {                                                                       \
+    (out) = NULL;                                                                \
+  }                                                                              \
+  while ((out) != NULL) {                                                        \
+    if ((out)->hh.hashv == (hashval) && (out)->hh.keylen == (keylen_in)) {       \
+      if (HASH_KEYCMP((out)->hh.key, keyptr, keylen_in) == 0) {                  \
+        break;                                                                   \
+      }                                                                          \
+    }                                                                            \
+    if ((out)->hh.hh_next != NULL) {                                             \
+      DECLTYPE_ASSIGN(out, ELMT_FROM_HH(tbl, (out)->hh.hh_next));                \
+    } else {                                                                     \
+      (out) = NULL;                                                              \
+    }                                                                            \
+  }                                                                              \
+} while (0)
+
+/* add an item to a bucket  */
+#define HASH_ADD_TO_BKT(head,hh,addhh,oomed)                                     \
+do {                                                                             \
+  UT_hash_bucket *_ha_head = &(head);                                            \
+  _ha_head->count++;                                                             \
+  (addhh)->hh_next = _ha_head->hh_head;                                          \
+  (addhh)->hh_prev = NULL;                                                       \
+  if (_ha_head->hh_head != NULL) {                                               \
+    _ha_head->hh_head->hh_prev = (addhh);                                        \
+  }                                                                              \
+  _ha_head->hh_head = (addhh);                                                   \
+  if ((_ha_head->count >= ((_ha_head->expand_mult + 1U) * HASH_BKT_CAPACITY_THRESH)) \
+      && !(addhh)->tbl->noexpand) {                                              \
+    HASH_EXPAND_BUCKETS(addhh,(addhh)->tbl, oomed);                              \
+    IF_HASH_NONFATAL_OOM(                                                        \
+      if (oomed) {                                                               \
+        HASH_DEL_IN_BKT(head,addhh);                                             \
+      }                                                                          \
+    )                                                                            \
+  }                                                                              \
+} while (0)
+
+/* remove an item from a given bucket */
+#define HASH_DEL_IN_BKT(head,delhh)                                              \
+do {                                                                             \
+  UT_hash_bucket *_hd_head = &(head);                                            \
+  _hd_head->count--;                                                             \
+  if (_hd_head->hh_head == (delhh)) {                                            \
+    _hd_head->hh_head = (delhh)->hh_next;                                        \
+  }                                                                              \
+  if ((delhh)->hh_prev) {                                                        \
+    (delhh)->hh_prev->hh_next = (delhh)->hh_next;                                \
+  }                                                                              \
+  if ((delhh)->hh_next) {                                                        \
+    (delhh)->hh_next->hh_prev = (delhh)->hh_prev;                                \
+  }                                                                              \
+} while (0)
+
+/* Bucket expansion has the effect of doubling the number of buckets
+ * and redistributing the items into the new buckets. Ideally the
+ * items will distribute more or less evenly into the new buckets
+ * (the extent to which this is true is a measure of the quality of
+ * the hash function as it applies to the key domain).
+ *
+ * With the items distributed into more buckets, the chain length
+ * (item count) in each bucket is reduced. Thus by expanding buckets
+ * the hash keeps a bound on the chain length. This bounded chain
+ * length is the essence of how a hash provides constant time lookup.
+ *
+ * The calculation of tbl->ideal_chain_maxlen below deserves some
+ * explanation. First, keep in mind that we're calculating the ideal
+ * maximum chain length based on the *new* (doubled) bucket count.
+ * In fractions this is just n/b (n=number of items,b=new num buckets).
+ * Since the ideal chain length is an integer, we want to calculate
+ * ceil(n/b). We don't depend on floating point arithmetic in this
+ * hash, so to calculate ceil(n/b) with integers we could write
+ *
+ *      ceil(n/b) = (n/b) + ((n%b)?1:0)
+ *
+ * and in fact a previous version of this hash did just that.
+ * But now we have improved things a bit by recognizing that b is
+ * always a power of two. We keep its base 2 log handy (call it lb),
+ * so now we can write this with a bit shift and logical AND:
+ *
+ *      ceil(n/b) = (n>>lb) + ( (n & (b-1)) ? 1:0)
+ *
+ */
+#define HASH_EXPAND_BUCKETS(hh,tbl,oomed)                                        \
+do {                                                                             \
+  unsigned _he_bkt;                                                              \
+  unsigned _he_bkt_i;                                                            \
+  struct UT_hash_handle *_he_thh, *_he_hh_nxt;                                   \
+  UT_hash_bucket *_he_new_buckets, *_he_newbkt;                                  \
+  _he_new_buckets = (UT_hash_bucket*)uthash_malloc(                              \
+           sizeof(struct UT_hash_bucket) * (tbl)->num_buckets * 2U);             \
+  if (!_he_new_buckets) {                                                        \
+    HASH_RECORD_OOM(oomed);                                                      \
+  } else {                                                                       \
+    uthash_bzero(_he_new_buckets,                                                \
+        sizeof(struct UT_hash_bucket) * (tbl)->num_buckets * 2U);                \
+    (tbl)->ideal_chain_maxlen =                                                  \
+       ((tbl)->num_items >> ((tbl)->log2_num_buckets+1U)) +                      \
+       ((((tbl)->num_items & (((tbl)->num_buckets*2U)-1U)) != 0U) ? 1U : 0U);    \
+    (tbl)->nonideal_items = 0;                                                   \
+    for (_he_bkt_i = 0; _he_bkt_i < (tbl)->num_buckets; _he_bkt_i++) {           \
+      _he_thh = (tbl)->buckets[ _he_bkt_i ].hh_head;                             \
+      while (_he_thh != NULL) {                                                  \
+        _he_hh_nxt = _he_thh->hh_next;                                           \
+        HASH_TO_BKT(_he_thh->hashv, (tbl)->num_buckets * 2U, _he_bkt);           \
+        _he_newbkt = &(_he_new_buckets[_he_bkt]);                                \
+        if (++(_he_newbkt->count) > (tbl)->ideal_chain_maxlen) {                 \
+          (tbl)->nonideal_items++;                                               \
+          if (_he_newbkt->count > _he_newbkt->expand_mult * (tbl)->ideal_chain_maxlen) { \
+            _he_newbkt->expand_mult++;                                           \
+          }                                                                      \
+        }                                                                        \
+        _he_thh->hh_prev = NULL;                                                 \
+        _he_thh->hh_next = _he_newbkt->hh_head;                                  \
+        if (_he_newbkt->hh_head != NULL) {                                       \
+          _he_newbkt->hh_head->hh_prev = _he_thh;                                \
+        }                                                                        \
+        _he_newbkt->hh_head = _he_thh;                                           \
+        _he_thh = _he_hh_nxt;                                                    \
+      }                                                                          \
+    }                                                                            \
+    uthash_free((tbl)->buckets, (tbl)->num_buckets * sizeof(struct UT_hash_bucket)); \
+    (tbl)->num_buckets *= 2U;                                                    \
+    (tbl)->log2_num_buckets++;                                                   \
+    (tbl)->buckets = _he_new_buckets;                                            \
+    (tbl)->ineff_expands = ((tbl)->nonideal_items > ((tbl)->num_items >> 1)) ?   \
+        ((tbl)->ineff_expands+1U) : 0U;                                          \
+    if ((tbl)->ineff_expands > 1U) {                                             \
+      (tbl)->noexpand = 1;                                                       \
+      uthash_noexpand_fyi(tbl);                                                  \
+    }                                                                            \
+    uthash_expand_fyi(tbl);                                                      \
+  }                                                                              \
+} while (0)
+
+
+/* This is an adaptation of Simon Tatham's O(n log(n)) mergesort */
+/* Note that HASH_SORT assumes the hash handle name to be hh.
+ * HASH_SRT was added to allow the hash handle name to be passed in. */
+#define HASH_SORT(head,cmpfcn) HASH_SRT(hh,head,cmpfcn)
+#define HASH_SRT(hh,head,cmpfcn)                                                 \
+do {                                                                             \
+  unsigned _hs_i;                                                                \
+  unsigned _hs_looping,_hs_nmerges,_hs_insize,_hs_psize,_hs_qsize;               \
+  struct UT_hash_handle *_hs_p, *_hs_q, *_hs_e, *_hs_list, *_hs_tail;            \
+  if (head != NULL) {                                                            \
+    _hs_insize = 1;                                                              \
+    _hs_looping = 1;                                                             \
+    _hs_list = &((head)->hh);                                                    \
+    while (_hs_looping != 0U) {                                                  \
+      _hs_p = _hs_list;                                                          \
+      _hs_list = NULL;                                                           \
+      _hs_tail = NULL;                                                           \
+      _hs_nmerges = 0;                                                           \
+      while (_hs_p != NULL) {                                                    \
+        _hs_nmerges++;                                                           \
+        _hs_q = _hs_p;                                                           \
+        _hs_psize = 0;                                                           \
+        for (_hs_i = 0; _hs_i < _hs_insize; ++_hs_i) {                           \
+          _hs_psize++;                                                           \
+          _hs_q = ((_hs_q->next != NULL) ?                                       \
+            HH_FROM_ELMT((head)->hh.tbl, _hs_q->next) : NULL);                   \
+          if (_hs_q == NULL) {                                                   \
+            break;                                                               \
+          }                                                                      \
+        }                                                                        \
+        _hs_qsize = _hs_insize;                                                  \
+        while ((_hs_psize != 0U) || ((_hs_qsize != 0U) && (_hs_q != NULL))) {    \
+          if (_hs_psize == 0U) {                                                 \
+            _hs_e = _hs_q;                                                       \
+            _hs_q = ((_hs_q->next != NULL) ?                                     \
+              HH_FROM_ELMT((head)->hh.tbl, _hs_q->next) : NULL);                 \
+            _hs_qsize--;                                                         \
+          } else if ((_hs_qsize == 0U) || (_hs_q == NULL)) {                     \
+            _hs_e = _hs_p;                                                       \
+            if (_hs_p != NULL) {                                                 \
+              _hs_p = ((_hs_p->next != NULL) ?                                   \
+                HH_FROM_ELMT((head)->hh.tbl, _hs_p->next) : NULL);               \
+            }                                                                    \
+            _hs_psize--;                                                         \
+          } else if ((cmpfcn(                                                    \
+                DECLTYPE(head)(ELMT_FROM_HH((head)->hh.tbl, _hs_p)),             \
+                DECLTYPE(head)(ELMT_FROM_HH((head)->hh.tbl, _hs_q))              \
+                )) <= 0) {                                                       \
+            _hs_e = _hs_p;                                                       \
+            if (_hs_p != NULL) {                                                 \
+              _hs_p = ((_hs_p->next != NULL) ?                                   \
+                HH_FROM_ELMT((head)->hh.tbl, _hs_p->next) : NULL);               \
+            }                                                                    \
+            _hs_psize--;                                                         \
+          } else {                                                               \
+            _hs_e = _hs_q;                                                       \
+            _hs_q = ((_hs_q->next != NULL) ?                                     \
+              HH_FROM_ELMT((head)->hh.tbl, _hs_q->next) : NULL);                 \
+            _hs_qsize--;                                                         \
+          }                                                                      \
+          if ( _hs_tail != NULL ) {                                              \
+            _hs_tail->next = ((_hs_e != NULL) ?                                  \
+              ELMT_FROM_HH((head)->hh.tbl, _hs_e) : NULL);                       \
+          } else {                                                               \
+            _hs_list = _hs_e;                                                    \
+          }                                                                      \
+          if (_hs_e != NULL) {                                                   \
+            _hs_e->prev = ((_hs_tail != NULL) ?                                  \
+              ELMT_FROM_HH((head)->hh.tbl, _hs_tail) : NULL);                    \
+          }                                                                      \
+          _hs_tail = _hs_e;                                                      \
+        }                                                                        \
+        _hs_p = _hs_q;                                                           \
+      }                                                                          \
+      if (_hs_tail != NULL) {                                                    \
+        _hs_tail->next = NULL;                                                   \
+      }                                                                          \
+      if (_hs_nmerges <= 1U) {                                                   \
+        _hs_looping = 0;                                                         \
+        (head)->hh.tbl->tail = _hs_tail;                                         \
+        DECLTYPE_ASSIGN(head, ELMT_FROM_HH((head)->hh.tbl, _hs_list));           \
+      }                                                                          \
+      _hs_insize *= 2U;                                                          \
+    }                                                                            \
+    HASH_FSCK(hh, head, "HASH_SRT");                                             \
+  }                                                                              \
+} while (0)
+
+/* This function selects items from one hash into another hash.
+ * The end result is that the selected items have dual presence
+ * in both hashes. There is no copy of the items made; rather
+ * they are added into the new hash through a secondary hash
+ * hash handle that must be present in the structure. */
+#define HASH_SELECT(hh_dst, dst, hh_src, src, cond)                              \
+do {                                                                             \
+  unsigned _src_bkt, _dst_bkt;                                                   \
+  void *_last_elt = NULL, *_elt;                                                 \
+  UT_hash_handle *_src_hh, *_dst_hh, *_last_elt_hh=NULL;                         \
+  ptrdiff_t _dst_hho = ((char*)(&(dst)->hh_dst) - (char*)(dst));                 \
+  if ((src) != NULL) {                                                           \
+    for (_src_bkt=0; _src_bkt < (src)->hh_src.tbl->num_buckets; _src_bkt++) {    \
+      for (_src_hh = (src)->hh_src.tbl->buckets[_src_bkt].hh_head;               \
+        _src_hh != NULL;                                                         \
+        _src_hh = _src_hh->hh_next) {                                            \
+        _elt = ELMT_FROM_HH((src)->hh_src.tbl, _src_hh);                         \
+        if (cond(_elt)) {                                                        \
+          IF_HASH_NONFATAL_OOM( int _hs_oomed = 0; )                             \
+          _dst_hh = (UT_hash_handle*)(void*)(((char*)_elt) + _dst_hho);          \
+          _dst_hh->key = _src_hh->key;                                           \
+          _dst_hh->keylen = _src_hh->keylen;                                     \
+          _dst_hh->hashv = _src_hh->hashv;                                       \
+          _dst_hh->prev = _last_elt;                                             \
+          _dst_hh->next = NULL;                                                  \
+          if (_last_elt_hh != NULL) {                                            \
+            _last_elt_hh->next = _elt;                                           \
+          }                                                                      \
+          if ((dst) == NULL) {                                                   \
+            DECLTYPE_ASSIGN(dst, _elt);                                          \
+            HASH_MAKE_TABLE(hh_dst, dst, _hs_oomed);                             \
+            IF_HASH_NONFATAL_OOM(                                                \
+              if (_hs_oomed) {                                                   \
+                uthash_nonfatal_oom(_elt);                                       \
+                (dst) = NULL;                                                    \
+                continue;                                                        \
+              }                                                                  \
+            )                                                                    \
+          } else {                                                               \
+            _dst_hh->tbl = (dst)->hh_dst.tbl;                                    \
+          }                                                                      \
+          HASH_TO_BKT(_dst_hh->hashv, _dst_hh->tbl->num_buckets, _dst_bkt);      \
+          HASH_ADD_TO_BKT(_dst_hh->tbl->buckets[_dst_bkt], hh_dst, _dst_hh, _hs_oomed); \
+          (dst)->hh_dst.tbl->num_items++;                                        \
+          IF_HASH_NONFATAL_OOM(                                                  \
+            if (_hs_oomed) {                                                     \
+              HASH_ROLLBACK_BKT(hh_dst, dst, _dst_hh);                           \
+              HASH_DELETE_HH(hh_dst, dst, _dst_hh);                              \
+              _dst_hh->tbl = NULL;                                               \
+              uthash_nonfatal_oom(_elt);                                         \
+              continue;                                                          \
+            }                                                                    \
+          )                                                                      \
+          HASH_BLOOM_ADD(_dst_hh->tbl, _dst_hh->hashv);                          \
+          _last_elt = _elt;                                                      \
+          _last_elt_hh = _dst_hh;                                                \
+        }                                                                        \
+      }                                                                          \
+    }                                                                            \
+  }                                                                              \
+  HASH_FSCK(hh_dst, dst, "HASH_SELECT");                                         \
+} while (0)
+
+#define HASH_CLEAR(hh,head)                                                      \
+do {                                                                             \
+  if ((head) != NULL) {                                                          \
+    HASH_BLOOM_FREE((head)->hh.tbl);                                             \
+    uthash_free((head)->hh.tbl->buckets,                                         \
+                (head)->hh.tbl->num_buckets*sizeof(struct UT_hash_bucket));      \
+    uthash_free((head)->hh.tbl, sizeof(UT_hash_table));                          \
+    (head) = NULL;                                                               \
+  }                                                                              \
+} while (0)
+
+#define HASH_OVERHEAD(hh,head)                                                   \
+ (((head) != NULL) ? (                                                           \
+ (size_t)(((head)->hh.tbl->num_items   * sizeof(UT_hash_handle))   +             \
+          ((head)->hh.tbl->num_buckets * sizeof(UT_hash_bucket))   +             \
+           sizeof(UT_hash_table)                                   +             \
+           (HASH_BLOOM_BYTELEN))) : 0U)
+
+#ifdef NO_DECLTYPE
+#define HASH_ITER(hh,head,el,tmp)                                                \
+for(((el)=(head)), ((*(char**)(&(tmp)))=(char*)((head!=NULL)?(head)->hh.next:NULL)); \
+  (el) != NULL; ((el)=(tmp)), ((*(char**)(&(tmp)))=(char*)((tmp!=NULL)?(tmp)->hh.next:NULL)))
+#else
+#define HASH_ITER(hh,head,el,tmp)                                                \
+for(((el)=(head)), ((tmp)=DECLTYPE(el)((head!=NULL)?(head)->hh.next:NULL));      \
+  (el) != NULL; ((el)=(tmp)), ((tmp)=DECLTYPE(el)((tmp!=NULL)?(tmp)->hh.next:NULL)))
+#endif
+
+/* obtain a count of items in the hash */
+#define HASH_COUNT(head) HASH_CNT(hh,head)
+#define HASH_CNT(hh,head) ((head != NULL)?((head)->hh.tbl->num_items):0U)
+
+typedef struct UT_hash_bucket {
+   struct UT_hash_handle *hh_head;
+   unsigned count;
+
+   /* expand_mult is normally set to 0. In this situation, the max chain length
+    * threshold is enforced at its default value, HASH_BKT_CAPACITY_THRESH. (If
+    * the bucket's chain exceeds this length, bucket expansion is triggered).
+    * However, setting expand_mult to a non-zero value delays bucket expansion
+    * (that would be triggered by additions to this particular bucket)
+    * until its chain length reaches a *multiple* of HASH_BKT_CAPACITY_THRESH.
+    * (The multiplier is simply expand_mult+1). The whole idea of this
+    * multiplier is to reduce bucket expansions, since they are expensive, in
+    * situations where we know that a particular bucket tends to be overused.
+    * It is better to let its chain length grow to a longer yet-still-bounded
+    * value, than to do an O(n) bucket expansion too often.
+    */
+   unsigned expand_mult;
+
+} UT_hash_bucket;
+
+/* random signature used only to find hash tables in external analysis */
+#define HASH_SIGNATURE 0xa0111fe1u
+#define HASH_BLOOM_SIGNATURE 0xb12220f2u
+
+typedef struct UT_hash_table {
+   UT_hash_bucket *buckets;
+   unsigned num_buckets, log2_num_buckets;
+   unsigned num_items;
+   struct UT_hash_handle *tail; /* tail hh in app order, for fast append    */
+   ptrdiff_t hho; /* hash handle offset (byte pos of hash handle in element */
+
+   /* in an ideal situation (all buckets used equally), no bucket would have
+    * more than ceil(#items/#buckets) items. that's the ideal chain length. */
+   unsigned ideal_chain_maxlen;
+
+   /* nonideal_items is the number of items in the hash whose chain position
+    * exceeds the ideal chain maxlen. these items pay the penalty for an uneven
+    * hash distribution; reaching them in a chain traversal takes >ideal steps */
+   unsigned nonideal_items;
+
+   /* ineffective expands occur when a bucket doubling was performed, but
+    * afterward, more than half the items in the hash had nonideal chain
+    * positions. If this happens on two consecutive expansions we inhibit any
+    * further expansion, as it's not helping; this happens when the hash
+    * function isn't a good fit for the key domain. When expansion is inhibited
+    * the hash will still work, albeit no longer in constant time. */
+   unsigned ineff_expands, noexpand;
+
+   uint32_t signature; /* used only to find hash tables in external analysis */
+#ifdef HASH_BLOOM
+   uint32_t bloom_sig; /* used only to test bloom exists in external analysis */
+   uint8_t *bloom_bv;
+   uint8_t bloom_nbits;
+#endif
+
+} UT_hash_table;
+
+typedef struct UT_hash_handle {
+   struct UT_hash_table *tbl;
+   void *prev;                       /* prev element in app order      */
+   void *next;                       /* next element in app order      */
+   struct UT_hash_handle *hh_prev;   /* previous hh in bucket order    */
+   struct UT_hash_handle *hh_next;   /* next hh in bucket order        */
+   const void *key;                  /* ptr to enclosing struct's key  */
+   unsigned keylen;                  /* enclosing struct's key len     */
+   unsigned hashv;                   /* result of hash-fcn(key)        */
+} UT_hash_handle;
+
+#endif /* UTHASH_H */
diff --git a/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/utlist.h b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/utlist.h
new file mode 100644
index 00000000000..1979448a7b9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/libcoap/include/coap3/utlist.h
@@ -0,0 +1,1073 @@
+/*
+Copyright (c) 2007-2021, Troy D. Hanson   http://troydhanson.github.io/uthash/
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
+OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef UTLIST_H
+#define UTLIST_H
+
+#define UTLIST_VERSION 2.3.0
+
+#include <assert.h>
+
+/*
+ * This file contains macros to manipulate singly and doubly-linked lists.
+ *
+ * 1. LL_ macros:  singly-linked lists.
+ * 2. DL_ macros:  doubly-linked lists.
+ * 3. CDL_ macros: circular doubly-linked lists.
+ *
+ * To use singly-linked lists, your structure must have a "next" pointer.
+ * To use doubly-linked lists, your structure must "prev" and "next" pointers.
+ * Either way, the pointer to the head of the list must be initialized to NULL.
+ *
+ * ----------------.EXAMPLE -------------------------
+ * struct item {
+ *      int id;
+ *      struct item *prev, *next;
+ * }
+ *
+ * struct item *list = NULL:
+ *
+ * int main() {
+ *      struct item *item;
+ *      ... allocate and populate item ...
+ *      DL_APPEND(list, item);
+ * }
+ * --------------------------------------------------
+ *
+ * For doubly-linked lists, the append and delete macros are O(1)
+ * For singly-linked lists, append and delete are O(n) but prepend is O(1)
+ * The sort macro is O(n log(n)) for all types of single/double/circular lists.
+ */
+
+/* These macros use decltype or the earlier __typeof GNU extension.
+   As decltype is only available in newer compilers (VS2010 or gcc 4.3+
+   when compiling c++ source) this code uses whatever method is needed
+   or, for VS2008 where neither is available, uses casting workarounds. */
+#if !defined(LDECLTYPE) && !defined(NO_DECLTYPE)
+#if defined(_MSC_VER)   /* MS compiler */
+#if _MSC_VER >= 1600 && defined(__cplusplus)  /* VS2010 or newer in C++ mode */
+#define LDECLTYPE(x) decltype(x)
+#else                   /* VS2008 or older (or VS2010 in C mode) */
+#define NO_DECLTYPE
+#endif
+#elif defined(__BORLANDC__) || defined(__ICCARM__) || defined(__LCC__) || defined(__WATCOMC__)
+#define NO_DECLTYPE
+#else                   /* GNU, Sun and other compilers */
+#define LDECLTYPE(x) __typeof(x)
+#endif
+#endif
+
+/* for VS2008 we use some workarounds to get around the lack of decltype,
+ * namely, we always reassign our tmp variable to the list head if we need
+ * to dereference its prev/next pointers, and save/restore the real head.*/
+#ifdef NO_DECLTYPE
+#define IF_NO_DECLTYPE(x) x
+#define LDECLTYPE(x) char*
+#define UTLIST_SV(elt,list) _tmp = (char*)(list); {char **_alias = (char**)&(list); *_alias = (elt); }
+#define UTLIST_NEXT(elt,list,next) ((char*)((list)->next))
+#define UTLIST_NEXTASGN(elt,list,to,next) { char **_alias = (char**)&((list)->next); *_alias=(char*)(to); }
+/* #define UTLIST_PREV(elt,list,prev) ((char*)((list)->prev)) */
+#define UTLIST_PREVASGN(elt,list,to,prev) { char **_alias = (char**)&((list)->prev); *_alias=(char*)(to); }
+#define UTLIST_RS(list) { char **_alias = (char**)&(list); *_alias=_tmp; }
+#define UTLIST_CASTASGN(a,b) { char **_alias = (char**)&(a); *_alias=(char*)(b); }
+#else
+#define IF_NO_DECLTYPE(x)
+#define UTLIST_SV(elt,list)
+#define UTLIST_NEXT(elt,list,next) ((elt)->next)
+#define UTLIST_NEXTASGN(elt,list,to,next) ((elt)->next)=(to)
+/* #define UTLIST_PREV(elt,list,prev) ((elt)->prev) */
+#define UTLIST_PREVASGN(elt,list,to,prev) ((elt)->prev)=(to)
+#define UTLIST_RS(list)
+#define UTLIST_CASTASGN(a,b) (a)=(b)
+#endif
+
+/******************************************************************************
+ * The sort macro is an adaptation of Simon Tatham's O(n log(n)) mergesort    *
+ * Unwieldy variable names used here to avoid shadowing passed-in variables.  *
+ *****************************************************************************/
+#define LL_SORT(list, cmp)                                                                     \
+    LL_SORT2(list, cmp, next)
+
+#define LL_SORT2(list, cmp, next)                                                              \
+do {                                                                                           \
+  LDECLTYPE(list) _ls_p;                                                                       \
+  LDECLTYPE(list) _ls_q;                                                                       \
+  LDECLTYPE(list) _ls_e;                                                                       \
+  LDECLTYPE(list) _ls_tail;                                                                    \
+  IF_NO_DECLTYPE(LDECLTYPE(list) _tmp;)                                                        \
+  int _ls_insize, _ls_nmerges, _ls_psize, _ls_qsize, _ls_i, _ls_looping;                       \
+  if (list) {                                                                                  \
+    _ls_insize = 1;                                                                            \
+    _ls_looping = 1;                                                                           \
+    while (_ls_looping) {                                                                      \
+      UTLIST_CASTASGN(_ls_p,list);                                                             \
+      (list) = NULL;                                                                           \
+      _ls_tail = NULL;                                                                         \
+      _ls_nmerges = 0;                                                                         \
+      while (_ls_p) {                                                                          \
+        _ls_nmerges++;                                                                         \
+        _ls_q = _ls_p;                                                                         \
+        _ls_psize = 0;                                                                         \
+        for (_ls_i = 0; _ls_i < _ls_insize; _ls_i++) {                                         \
+          _ls_psize++;                                                                         \
+          UTLIST_SV(_ls_q,list); _ls_q = UTLIST_NEXT(_ls_q,list,next); UTLIST_RS(list);        \
+          if (!_ls_q) break;                                                                   \
+        }                                                                                      \
+        _ls_qsize = _ls_insize;                                                                \
+        while (_ls_psize > 0 || (_ls_qsize > 0 && _ls_q)) {                                    \
+          if (_ls_psize == 0) {                                                                \
+            _ls_e = _ls_q; UTLIST_SV(_ls_q,list); _ls_q =                                      \
+              UTLIST_NEXT(_ls_q,list,next); UTLIST_RS(list); _ls_qsize--;                      \
+          } else if (_ls_qsize == 0 || !_ls_q) {                                               \
+            _ls_e = _ls_p; UTLIST_SV(_ls_p,list); _ls_p =                                      \
+              UTLIST_NEXT(_ls_p,list,next); UTLIST_RS(list); _ls_psize--;                      \
+          } else if (cmp(_ls_p,_ls_q) <= 0) {                                                  \
+            _ls_e = _ls_p; UTLIST_SV(_ls_p,list); _ls_p =                                      \
+              UTLIST_NEXT(_ls_p,list,next); UTLIST_RS(list); _ls_psize--;                      \
+          } else {                                                                             \
+            _ls_e = _ls_q; UTLIST_SV(_ls_q,list); _ls_q =                                      \
+              UTLIST_NEXT(_ls_q,list,next); UTLIST_RS(list); _ls_qsize--;                      \
+          }                                                                                    \
+          if (_ls_tail) {                                                                      \
+            UTLIST_SV(_ls_tail,list); UTLIST_NEXTASGN(_ls_tail,list,_ls_e,next); UTLIST_RS(list); \
+          } else {                                                                             \
+            UTLIST_CASTASGN(list,_ls_e);                                                       \
+          }                                                                                    \
+          _ls_tail = _ls_e;                                                                    \
+        }                                                                                      \
+        _ls_p = _ls_q;                                                                         \
+      }                                                                                        \
+      if (_ls_tail) {                                                                          \
+        UTLIST_SV(_ls_tail,list); UTLIST_NEXTASGN(_ls_tail,list,NULL,next); UTLIST_RS(list);   \
+      }                                                                                        \
+      if (_ls_nmerges <= 1) {                                                                  \
+        _ls_looping=0;                                                                         \
+      }                                                                                        \
+      _ls_insize *= 2;                                                                         \
+    }                                                                                          \
+  }                                                                                            \
+} while (0)
+
+
+#define DL_SORT(list, cmp)                                                                     \
+    DL_SORT2(list, cmp, prev, next)
+
+#define DL_SORT2(list, cmp, prev, next)                                                        \
+do {                                                                                           \
+  LDECLTYPE(list) _ls_p;                                                                       \
+  LDECLTYPE(list) _ls_q;                                                                       \
+  LDECLTYPE(list) _ls_e;                                                                       \
+  LDECLTYPE(list) _ls_tail;                                                                    \
+  IF_NO_DECLTYPE(LDECLTYPE(list) _tmp;)                                                        \
+  int _ls_insize, _ls_nmerges, _ls_psize, _ls_qsize, _ls_i, _ls_looping;                       \
+  if (list) {                                                                                  \
+    _ls_insize = 1;                                                                            \
+    _ls_looping = 1;                                                                           \
+    while (_ls_looping) {                                                                      \
+      UTLIST_CASTASGN(_ls_p,list);                                                             \
+      (list) = NULL;                                                                           \
+      _ls_tail = NULL;                                                                         \
+      _ls_nmerges = 0;                                                                         \
+      while (_ls_p) {                                                                          \
+        _ls_nmerges++;                                                                         \
+        _ls_q = _ls_p;                                                                         \
+        _ls_psize = 0;                                                                         \
+        for (_ls_i = 0; _ls_i < _ls_insize; _ls_i++) {                                         \
+          _ls_psize++;                                                                         \
+          UTLIST_SV(_ls_q,list); _ls_q = UTLIST_NEXT(_ls_q,list,next); UTLIST_RS(list);        \
+          if (!_ls_q) break;                                                                   \
+        }                                                                                      \
+        _ls_qsize = _ls_insize;                                                                \
+        while ((_ls_psize > 0) || ((_ls_qsize > 0) && _ls_q)) {                                \
+          if (_ls_psize == 0) {                                                                \
+            _ls_e = _ls_q; UTLIST_SV(_ls_q,list); _ls_q =                                      \
+              UTLIST_NEXT(_ls_q,list,next); UTLIST_RS(list); _ls_qsize--;                      \
+          } else if ((_ls_qsize == 0) || (!_ls_q)) {                                           \
+            _ls_e = _ls_p; UTLIST_SV(_ls_p,list); _ls_p =                                      \
+              UTLIST_NEXT(_ls_p,list,next); UTLIST_RS(list); _ls_psize--;                      \
+          } else if (cmp(_ls_p,_ls_q) <= 0) {                                                  \
+            _ls_e = _ls_p; UTLIST_SV(_ls_p,list); _ls_p =                                      \
+              UTLIST_NEXT(_ls_p,list,next); UTLIST_RS(list); _ls_psize--;                      \
+          } else {                                                                             \
+            _ls_e = _ls_q; UTLIST_SV(_ls_q,list); _ls_q =                                      \
+              UTLIST_NEXT(_ls_q,list,next); UTLIST_RS(list); _ls_qsize--;                      \
+          }                                                                                    \
+          if (_ls_tail) {                                                                      \
+            UTLIST_SV(_ls_tail,list); UTLIST_NEXTASGN(_ls_tail,list,_ls_e,next); UTLIST_RS(list); \
+          } else {                                                                             \
+            UTLIST_CASTASGN(list,_ls_e);                                                       \
+          }                                                                                    \
+          UTLIST_SV(_ls_e,list); UTLIST_PREVASGN(_ls_e,list,_ls_tail,prev); UTLIST_RS(list);   \
+          _ls_tail = _ls_e;                                                                    \
+        }                                                                                      \
+        _ls_p = _ls_q;                                                                         \
+      }                                                                                        \
+      UTLIST_CASTASGN((list)->prev, _ls_tail);                                                 \
+      UTLIST_SV(_ls_tail,list); UTLIST_NEXTASGN(_ls_tail,list,NULL,next); UTLIST_RS(list);     \
+      if (_ls_nmerges <= 1) {                                                                  \
+        _ls_looping=0;                                                                         \
+      }                                                                                        \
+      _ls_insize *= 2;                                                                         \
+    }                                                                                          \
+  }                                                                                            \
+} while (0)
+
+#define CDL_SORT(list, cmp)                                                                    \
+    CDL_SORT2(list, cmp, prev, next)
+
+#define CDL_SORT2(list, cmp, prev, next)                                                       \
+do {                                                                                           \
+  LDECLTYPE(list) _ls_p;                                                                       \
+  LDECLTYPE(list) _ls_q;                                                                       \
+  LDECLTYPE(list) _ls_e;                                                                       \
+  LDECLTYPE(list) _ls_tail;                                                                    \
+  LDECLTYPE(list) _ls_oldhead;                                                                 \
+  LDECLTYPE(list) _tmp;                                                                        \
+  int _ls_insize, _ls_nmerges, _ls_psize, _ls_qsize, _ls_i, _ls_looping;                       \
+  if (list) {                                                                                  \
+    _ls_insize = 1;                                                                            \
+    _ls_looping = 1;                                                                           \
+    while (_ls_looping) {                                                                      \
+      UTLIST_CASTASGN(_ls_p,list);                                                             \
+      UTLIST_CASTASGN(_ls_oldhead,list);                                                       \
+      (list) = NULL;                                                                           \
+      _ls_tail = NULL;                                                                         \
+      _ls_nmerges = 0;                                                                         \
+      while (_ls_p) {                                                                          \
+        _ls_nmerges++;                                                                         \
+        _ls_q = _ls_p;                                                                         \
+        _ls_psize = 0;                                                                         \
+        for (_ls_i = 0; _ls_i < _ls_insize; _ls_i++) {                                         \
+          _ls_psize++;                                                                         \
+          UTLIST_SV(_ls_q,list);                                                               \
+          if (UTLIST_NEXT(_ls_q,list,next) == _ls_oldhead) {                                   \
+            _ls_q = NULL;                                                                      \
+          } else {                                                                             \
+            _ls_q = UTLIST_NEXT(_ls_q,list,next);                                              \
+          }                                                                                    \
+          UTLIST_RS(list);                                                                     \
+          if (!_ls_q) break;                                                                   \
+        }                                                                                      \
+        _ls_qsize = _ls_insize;                                                                \
+        while (_ls_psize > 0 || (_ls_qsize > 0 && _ls_q)) {                                    \
+          if (_ls_psize == 0) {                                                                \
+            _ls_e = _ls_q; UTLIST_SV(_ls_q,list); _ls_q =                                      \
+              UTLIST_NEXT(_ls_q,list,next); UTLIST_RS(list); _ls_qsize--;                      \
+            if (_ls_q == _ls_oldhead) { _ls_q = NULL; }                                        \
+          } else if (_ls_qsize == 0 || !_ls_q) {                                               \
+            _ls_e = _ls_p; UTLIST_SV(_ls_p,list); _ls_p =                                      \
+              UTLIST_NEXT(_ls_p,list,next); UTLIST_RS(list); _ls_psize--;                      \
+            if (_ls_p == _ls_oldhead) { _ls_p = NULL; }                                        \
+          } else if (cmp(_ls_p,_ls_q) <= 0) {                                                  \
+            _ls_e = _ls_p; UTLIST_SV(_ls_p,list); _ls_p =                                      \
+              UTLIST_NEXT(_ls_p,list,next); UTLIST_RS(list); _ls_psize--;                      \
+            if (_ls_p == _ls_oldhead) { _ls_p = NULL; }                                        \
+          } else {                                                                             \
+            _ls_e = _ls_q; UTLIST_SV(_ls_q,list); _ls_q =                                      \
+              UTLIST_NEXT(_ls_q,list,next); UTLIST_RS(list); _ls_qsize--;                      \
+            if (_ls_q == _ls_oldhead) { _ls_q = NULL; }                                        \
+          }                                                                                    \
+          if (_ls_tail) {                                                                      \
+            UTLIST_SV(_ls_tail,list); UTLIST_NEXTASGN(_ls_tail,list,_ls_e,next); UTLIST_RS(list); \
+          } else {                                                                             \
+            UTLIST_CASTASGN(list,_ls_e);                                                       \
+          }                                                                                    \
+          UTLIST_SV(_ls_e,list); UTLIST_PREVASGN(_ls_e,list,_ls_tail,prev); UTLIST_RS(list);   \
+          _ls_tail = _ls_e;                                                                    \
+        }                                                                                      \
+        _ls_p = _ls_q;                                                                         \
+      }                                                                                        \
+      UTLIST_CASTASGN((list)->prev,_ls_tail);                                                  \
+      UTLIST_CASTASGN(_tmp,list);                                                              \
+      UTLIST_SV(_ls_tail,list); UTLIST_NEXTASGN(_ls_tail,list,_tmp,next); UTLIST_RS(list);     \
+      if (_ls_nmerges <= 1) {                                                                  \
+        _ls_looping=0;                                                                         \
+      }                                                                                        \
+      _ls_insize *= 2;                                                                         \
+    }                                                                                          \
+  }                                                                                            \
+} while (0)
+
+/******************************************************************************
+ * singly linked list macros (non-circular)                                   *
+ *****************************************************************************/
+#define LL_PREPEND(head,add)                                                                   \
+    LL_PREPEND2(head,add,next)
+
+#define LL_PREPEND2(head,add,next)                                                             \
+do {                                                                                           \
+  (add)->next = (head);                                                                        \
+  (head) = (add);                                                                              \
+} while (0)
+
+#define LL_CONCAT(head1,head2)                                                                 \
+    LL_CONCAT2(head1,head2,next)
+
+#define LL_CONCAT2(head1,head2,next)                                                           \
+do {                                                                                           \
+  LDECLTYPE(head1) _tmp;                                                                       \
+  if (head1) {                                                                                 \
+    _tmp = (head1);                                                                            \
+    while (_tmp->next) { _tmp = _tmp->next; }                                                  \
+    _tmp->next=(head2);                                                                        \
+  } else {                                                                                     \
+    (head1)=(head2);                                                                           \
+  }                                                                                            \
+} while (0)
+
+#define LL_APPEND(head,add)                                                                    \
+    LL_APPEND2(head,add,next)
+
+#define LL_APPEND2(head,add,next)                                                              \
+do {                                                                                           \
+  LDECLTYPE(head) _tmp;                                                                        \
+  (add)->next=NULL;                                                                            \
+  if (head) {                                                                                  \
+    _tmp = (head);                                                                             \
+    while (_tmp->next) { _tmp = _tmp->next; }                                                  \
+    _tmp->next=(add);                                                                          \
+  } else {                                                                                     \
+    (head)=(add);                                                                              \
+  }                                                                                            \
+} while (0)
+
+#define LL_INSERT_INORDER(head,add,cmp)                                                        \
+    LL_INSERT_INORDER2(head,add,cmp,next)
+
+#define LL_INSERT_INORDER2(head,add,cmp,next)                                                  \
+do {                                                                                           \
+  LDECLTYPE(head) _tmp;                                                                        \
+  if (head) {                                                                                  \
+    LL_LOWER_BOUND2(head, _tmp, add, cmp, next);                                               \
+    LL_APPEND_ELEM2(head, _tmp, add, next);                                                    \
+  } else {                                                                                     \
+    (head) = (add);                                                                            \
+    (head)->next = NULL;                                                                       \
+  }                                                                                            \
+} while (0)
+
+#define LL_LOWER_BOUND(head,elt,like,cmp)                                                      \
+    LL_LOWER_BOUND2(head,elt,like,cmp,next)
+
+#define LL_LOWER_BOUND2(head,elt,like,cmp,next)                                                \
+  do {                                                                                         \
+    if ((head) == NULL || (cmp(head, like)) >= 0) {                                            \
+      (elt) = NULL;                                                                            \
+    } else {                                                                                   \
+      for ((elt) = (head); (elt)->next != NULL; (elt) = (elt)->next) {                         \
+        if (cmp((elt)->next, like) >= 0) {                                                     \
+          break;                                                                               \
+        }                                                                                      \
+      }                                                                                        \
+    }                                                                                          \
+  } while (0)
+
+#define LL_DELETE(head,del)                                                                    \
+    LL_DELETE2(head,del,next)
+
+#define LL_DELETE2(head,del,next)                                                              \
+do {                                                                                           \
+  LDECLTYPE(head) _tmp;                                                                        \
+  if ((head) == (del)) {                                                                       \
+    (head)=(head)->next;                                                                       \
+  } else {                                                                                     \
+    _tmp = (head);                                                                             \
+    while (_tmp->next && (_tmp->next != (del))) {                                              \
+      _tmp = _tmp->next;                                                                       \
+    }                                                                                          \
+    if (_tmp->next) {                                                                          \
+      _tmp->next = (del)->next;                                                                \
+    }                                                                                          \
+  }                                                                                            \
+} while (0)
+
+#define LL_COUNT(head,el,counter)                                                              \
+    LL_COUNT2(head,el,counter,next)                                                            \
+
+#define LL_COUNT2(head,el,counter,next)                                                        \
+do {                                                                                           \
+  (counter) = 0;                                                                               \
+  LL_FOREACH2(head,el,next) { ++(counter); }                                                   \
+} while (0)
+
+#define LL_FOREACH(head,el)                                                                    \
+    LL_FOREACH2(head,el,next)
+
+#define LL_FOREACH2(head,el,next)                                                              \
+    for ((el) = (head); el; (el) = (el)->next)
+
+#define LL_FOREACH_SAFE(head,el,tmp)                                                           \
+    LL_FOREACH_SAFE2(head,el,tmp,next)
+
+#define LL_FOREACH_SAFE2(head,el,tmp,next)                                                     \
+  for ((el) = (head); (el) && ((tmp) = (el)->next, 1); (el) = (tmp))
+
+#define LL_SEARCH_SCALAR(head,out,field,val)                                                   \
+    LL_SEARCH_SCALAR2(head,out,field,val,next)
+
+#define LL_SEARCH_SCALAR2(head,out,field,val,next)                                             \
+do {                                                                                           \
+    LL_FOREACH2(head,out,next) {                                                               \
+      if ((out)->field == (val)) break;                                                        \
+    }                                                                                          \
+} while (0)
+
+#define LL_SEARCH(head,out,elt,cmp)                                                            \
+    LL_SEARCH2(head,out,elt,cmp,next)
+
+#define LL_SEARCH2(head,out,elt,cmp,next)                                                      \
+do {                                                                                           \
+    LL_FOREACH2(head,out,next) {                                                               \
+      if ((cmp(out,elt))==0) break;                                                            \
+    }                                                                                          \
+} while (0)
+
+#define LL_REPLACE_ELEM2(head, el, add, next)                                                  \
+do {                                                                                           \
+ LDECLTYPE(head) _tmp;                                                                         \
+ assert((head) != NULL);                                                                       \
+ assert((el) != NULL);                                                                         \
+ assert((add) != NULL);                                                                        \
+ (add)->next = (el)->next;                                                                     \
+ if ((head) == (el)) {                                                                         \
+  (head) = (add);                                                                              \
+ } else {                                                                                      \
+  _tmp = (head);                                                                               \
+  while (_tmp->next && (_tmp->next != (el))) {                                                 \
+   _tmp = _tmp->next;                                                                          \
+  }                                                                                            \
+  if (_tmp->next) {                                                                            \
+    _tmp->next = (add);                                                                        \
+  }                                                                                            \
+ }                                                                                             \
+} while (0)
+
+#define LL_REPLACE_ELEM(head, el, add)                                                         \
+    LL_REPLACE_ELEM2(head, el, add, next)
+
+#define LL_PREPEND_ELEM2(head, el, add, next)                                                  \
+do {                                                                                           \
+ if (el) {                                                                                     \
+  LDECLTYPE(head) _tmp;                                                                        \
+  assert((head) != NULL);                                                                      \
+  assert((add) != NULL);                                                                       \
+  (add)->next = (el);                                                                          \
+  if ((head) == (el)) {                                                                        \
+   (head) = (add);                                                                             \
+  } else {                                                                                     \
+   _tmp = (head);                                                                              \
+   while (_tmp->next && (_tmp->next != (el))) {                                                \
+    _tmp = _tmp->next;                                                                         \
+   }                                                                                           \
+   if (_tmp->next) {                                                                           \
+     _tmp->next = (add);                                                                       \
+   }                                                                                           \
+  }                                                                                            \
+ } else {                                                                                      \
+  LL_APPEND2(head, add, next);                                                                 \
+ }                                                                                             \
+} while (0)                                                                                    \
+
+#define LL_PREPEND_ELEM(head, el, add)                                                         \
+    LL_PREPEND_ELEM2(head, el, add, next)
+
+#define LL_APPEND_ELEM2(head, el, add, next)                                                   \
+do {                                                                                           \
+ if (el) {                                                                                     \
+  assert((head) != NULL);                                                                      \
+  assert((add) != NULL);                                                                       \
+  (add)->next = (el)->next;                                                                    \
+  (el)->next = (add);                                                                          \
+ } else {                                                                                      \
+  LL_PREPEND2(head, add, next);                                                                \
+ }                                                                                             \
+} while (0)                                                                                    \
+
+#define LL_APPEND_ELEM(head, el, add)                                                          \
+    LL_APPEND_ELEM2(head, el, add, next)
+
+#ifdef NO_DECLTYPE
+/* Here are VS2008 / NO_DECLTYPE replacements for a few functions */
+
+#undef LL_CONCAT2
+#define LL_CONCAT2(head1,head2,next)                                                           \
+do {                                                                                           \
+  char *_tmp;                                                                                  \
+  if (head1) {                                                                                 \
+    _tmp = (char*)(head1);                                                                     \
+    while ((head1)->next) { (head1) = (head1)->next; }                                         \
+    (head1)->next = (head2);                                                                   \
+    UTLIST_RS(head1);                                                                          \
+  } else {                                                                                     \
+    (head1)=(head2);                                                                           \
+  }                                                                                            \
+} while (0)
+
+#undef LL_APPEND2
+#define LL_APPEND2(head,add,next)                                                              \
+do {                                                                                           \
+  if (head) {                                                                                  \
+    (add)->next = head;     /* use add->next as a temp variable */                             \
+    while ((add)->next->next) { (add)->next = (add)->next->next; }                             \
+    (add)->next->next=(add);                                                                   \
+  } else {                                                                                     \
+    (head)=(add);                                                                              \
+  }                                                                                            \
+  (add)->next=NULL;                                                                            \
+} while (0)
+
+#undef LL_INSERT_INORDER2
+#define LL_INSERT_INORDER2(head,add,cmp,next)                                                  \
+do {                                                                                           \
+  if ((head) == NULL || (cmp(head, add)) >= 0) {                                               \
+    (add)->next = (head);                                                                      \
+    (head) = (add);                                                                            \
+  } else {                                                                                     \
+    char *_tmp = (char*)(head);                                                                \
+    while ((head)->next != NULL && (cmp((head)->next, add)) < 0) {                             \
+      (head) = (head)->next;                                                                   \
+    }                                                                                          \
+    (add)->next = (head)->next;                                                                \
+    (head)->next = (add);                                                                      \
+    UTLIST_RS(head);                                                                           \
+  }                                                                                            \
+} while (0)
+
+#undef LL_DELETE2
+#define LL_DELETE2(head,del,next)                                                              \
+do {                                                                                           \
+  if ((head) == (del)) {                                                                       \
+    (head)=(head)->next;                                                                       \
+  } else {                                                                                     \
+    char *_tmp = (char*)(head);                                                                \
+    while ((head)->next && ((head)->next != (del))) {                                          \
+      (head) = (head)->next;                                                                   \
+    }                                                                                          \
+    if ((head)->next) {                                                                        \
+      (head)->next = ((del)->next);                                                            \
+    }                                                                                          \
+    UTLIST_RS(head);                                                                           \
+  }                                                                                            \
+} while (0)
+
+#undef LL_REPLACE_ELEM2
+#define LL_REPLACE_ELEM2(head, el, add, next)                                                  \
+do {                                                                                           \
+  assert((head) != NULL);                                                                      \
+  assert((el) != NULL);                                                                        \
+  assert((add) != NULL);                                                                       \
+  if ((head) == (el)) {                                                                        \
+    (head) = (add);                                                                            \
+  } else {                                                                                     \
+    (add)->next = head;                                                                        \
+    while ((add)->next->next && ((add)->next->next != (el))) {                                 \
+      (add)->next = (add)->next->next;                                                         \
+    }                                                                                          \
+    if ((add)->next->next) {                                                                   \
+      (add)->next->next = (add);                                                               \
+    }                                                                                          \
+  }                                                                                            \
+  (add)->next = (el)->next;                                                                    \
+} while (0)
+
+#undef LL_PREPEND_ELEM2
+#define LL_PREPEND_ELEM2(head, el, add, next)                                                  \
+do {                                                                                           \
+  if (el) {                                                                                    \
+    assert((head) != NULL);                                                                    \
+    assert((add) != NULL);                                                                     \
+    if ((head) == (el)) {                                                                      \
+      (head) = (add);                                                                          \
+    } else {                                                                                   \
+      (add)->next = (head);                                                                    \
+      while ((add)->next->next && ((add)->next->next != (el))) {                               \
+        (add)->next = (add)->next->next;                                                       \
+      }                                                                                        \
+      if ((add)->next->next) {                                                                 \
+        (add)->next->next = (add);                                                             \
+      }                                                                                        \
+    }                                                                                          \
+    (add)->next = (el);                                                                        \
+  } else {                                                                                     \
+    LL_APPEND2(head, add, next);                                                               \
+  }                                                                                            \
+} while (0)                                                                                    \
+
+#endif /* NO_DECLTYPE */
+
+/******************************************************************************
+ * doubly linked list macros (non-circular)                                   *
+ *****************************************************************************/
+#define DL_PREPEND(head,add)                                                                   \
+    DL_PREPEND2(head,add,prev,next)
+
+#define DL_PREPEND2(head,add,prev,next)                                                        \
+do {                                                                                           \
+ (add)->next = (head);                                                                         \
+ if (head) {                                                                                   \
+   (add)->prev = (head)->prev;                                                                 \
+   (head)->prev = (add);                                                                       \
+ } else {                                                                                      \
+   (add)->prev = (add);                                                                        \
+ }                                                                                             \
+ (head) = (add);                                                                               \
+} while (0)
+
+#define DL_APPEND(head,add)                                                                    \
+    DL_APPEND2(head,add,prev,next)
+
+#define DL_APPEND2(head,add,prev,next)                                                         \
+do {                                                                                           \
+  if (head) {                                                                                  \
+      (add)->prev = (head)->prev;                                                              \
+      (head)->prev->next = (add);                                                              \
+      (head)->prev = (add);                                                                    \
+      (add)->next = NULL;                                                                      \
+  } else {                                                                                     \
+      (head)=(add);                                                                            \
+      (head)->prev = (head);                                                                   \
+      (head)->next = NULL;                                                                     \
+  }                                                                                            \
+} while (0)
+
+#define DL_INSERT_INORDER(head,add,cmp)                                                        \
+    DL_INSERT_INORDER2(head,add,cmp,prev,next)
+
+#define DL_INSERT_INORDER2(head,add,cmp,prev,next)                                             \
+do {                                                                                           \
+  LDECLTYPE(head) _tmp;                                                                        \
+  if (head) {                                                                                  \
+    DL_LOWER_BOUND2(head, _tmp, add, cmp, next);                                               \
+    DL_APPEND_ELEM2(head, _tmp, add, prev, next);                                              \
+  } else {                                                                                     \
+    (head) = (add);                                                                            \
+    (head)->prev = (head);                                                                     \
+    (head)->next = NULL;                                                                       \
+  }                                                                                            \
+} while (0)
+
+#define DL_LOWER_BOUND(head,elt,like,cmp)                                                      \
+    DL_LOWER_BOUND2(head,elt,like,cmp,next)
+
+#define DL_LOWER_BOUND2(head,elt,like,cmp,next)                                                \
+do {                                                                                           \
+  if ((head) == NULL || (cmp(head, like)) >= 0) {                                              \
+    (elt) = NULL;                                                                              \
+  } else {                                                                                     \
+    for ((elt) = (head); (elt)->next != NULL; (elt) = (elt)->next) {                           \
+      if ((cmp((elt)->next, like)) >= 0) {                                                     \
+        break;                                                                                 \
+      }                                                                                        \
+    }                                                                                          \
+  }                                                                                            \
+} while (0)
+
+#define DL_CONCAT(head1,head2)                                                                 \
+    DL_CONCAT2(head1,head2,prev,next)
+
+#define DL_CONCAT2(head1,head2,prev,next)                                                      \
+do {                                                                                           \
+  LDECLTYPE(head1) _tmp;                                                                       \
+  if (head2) {                                                                                 \
+    if (head1) {                                                                               \
+        UTLIST_CASTASGN(_tmp, (head2)->prev);                                                  \
+        (head2)->prev = (head1)->prev;                                                         \
+        (head1)->prev->next = (head2);                                                         \
+        UTLIST_CASTASGN((head1)->prev, _tmp);                                                  \
+    } else {                                                                                   \
+        (head1)=(head2);                                                                       \
+    }                                                                                          \
+  }                                                                                            \
+} while (0)
+
+#define DL_DELETE(head,del)                                                                    \
+    DL_DELETE2(head,del,prev,next)
+
+#define DL_DELETE2(head,del,prev,next)                                                         \
+do {                                                                                           \
+  assert((head) != NULL);                                                                      \
+  assert((del)->prev != NULL);                                                                 \
+  if ((del)->prev == (del)) {                                                                  \
+      (head)=NULL;                                                                             \
+  } else if ((del)==(head)) {                                                                  \
+      (del)->next->prev = (del)->prev;                                                         \
+      (head) = (del)->next;                                                                    \
+  } else {                                                                                     \
+      (del)->prev->next = (del)->next;                                                         \
+      if ((del)->next) {                                                                       \
+          (del)->next->prev = (del)->prev;                                                     \
+      } else {                                                                                 \
+          (head)->prev = (del)->prev;                                                          \
+      }                                                                                        \
+  }                                                                                            \
+} while (0)
+
+#define DL_COUNT(head,el,counter)                                                              \
+    DL_COUNT2(head,el,counter,next)                                                            \
+
+#define DL_COUNT2(head,el,counter,next)                                                        \
+do {                                                                                           \
+  (counter) = 0;                                                                               \
+  DL_FOREACH2(head,el,next) { ++(counter); }                                                   \
+} while (0)
+
+#define DL_FOREACH(head,el)                                                                    \
+    DL_FOREACH2(head,el,next)
+
+#define DL_FOREACH2(head,el,next)                                                              \
+    for ((el) = (head); el; (el) = (el)->next)
+
+/* this version is safe for deleting the elements during iteration */
+#define DL_FOREACH_SAFE(head,el,tmp)                                                           \
+    DL_FOREACH_SAFE2(head,el,tmp,next)
+
+#define DL_FOREACH_SAFE2(head,el,tmp,next)                                                     \
+  for ((el) = (head); (el) && ((tmp) = (el)->next, 1); (el) = (tmp))
+
+/* these are identical to their singly-linked list counterparts */
+#define DL_SEARCH_SCALAR LL_SEARCH_SCALAR
+#define DL_SEARCH LL_SEARCH
+#define DL_SEARCH_SCALAR2 LL_SEARCH_SCALAR2
+#define DL_SEARCH2 LL_SEARCH2
+
+#define DL_REPLACE_ELEM2(head, el, add, prev, next)                                            \
+do {                                                                                           \
+ assert((head) != NULL);                                                                       \
+ assert((el) != NULL);                                                                         \
+ assert((add) != NULL);                                                                        \
+ if ((head) == (el)) {                                                                         \
+  (head) = (add);                                                                              \
+  (add)->next = (el)->next;                                                                    \
+  if ((el)->next == NULL) {                                                                    \
+   (add)->prev = (add);                                                                        \
+  } else {                                                                                     \
+   (add)->prev = (el)->prev;                                                                   \
+   (add)->next->prev = (add);                                                                  \
+  }                                                                                            \
+ } else {                                                                                      \
+  (add)->next = (el)->next;                                                                    \
+  (add)->prev = (el)->prev;                                                                    \
+  (add)->prev->next = (add);                                                                   \
+  if ((el)->next == NULL) {                                                                    \
+   (head)->prev = (add);                                                                       \
+  } else {                                                                                     \
+   (add)->next->prev = (add);                                                                  \
+  }                                                                                            \
+ }                                                                                             \
+} while (0)
+
+#define DL_REPLACE_ELEM(head, el, add)                                                         \
+    DL_REPLACE_ELEM2(head, el, add, prev, next)
+
+#define DL_PREPEND_ELEM2(head, el, add, prev, next)                                            \
+do {                                                                                           \
+ if (el) {                                                                                     \
+  assert((head) != NULL);                                                                      \
+  assert((add) != NULL);                                                                       \
+  (add)->next = (el);                                                                          \
+  (add)->prev = (el)->prev;                                                                    \
+  (el)->prev = (add);                                                                          \
+  if ((head) == (el)) {                                                                        \
+   (head) = (add);                                                                             \
+  } else {                                                                                     \
+   (add)->prev->next = (add);                                                                  \
+  }                                                                                            \
+ } else {                                                                                      \
+  DL_APPEND2(head, add, prev, next);                                                           \
+ }                                                                                             \
+} while (0)                                                                                    \
+
+#define DL_PREPEND_ELEM(head, el, add)                                                         \
+    DL_PREPEND_ELEM2(head, el, add, prev, next)
+
+#define DL_APPEND_ELEM2(head, el, add, prev, next)                                             \
+do {                                                                                           \
+ if (el) {                                                                                     \
+  assert((head) != NULL);                                                                      \
+  assert((add) != NULL);                                                                       \
+  (add)->next = (el)->next;                                                                    \
+  (add)->prev = (el);                                                                          \
+  (el)->next = (add);                                                                          \
+  if ((add)->next) {                                                                           \
+   (add)->next->prev = (add);                                                                  \
+  } else {                                                                                     \
+   (head)->prev = (add);                                                                       \
+  }                                                                                            \
+ } else {                                                                                      \
+  DL_PREPEND2(head, add, prev, next);                                                          \
+ }                                                                                             \
+} while (0)                                                                                    \
+
+#define DL_APPEND_ELEM(head, el, add)                                                          \
+   DL_APPEND_ELEM2(head, el, add, prev, next)
+
+#ifdef NO_DECLTYPE
+/* Here are VS2008 / NO_DECLTYPE replacements for a few functions */
+
+#undef DL_INSERT_INORDER2
+#define DL_INSERT_INORDER2(head,add,cmp,prev,next)                                             \
+do {                                                                                           \
+  if ((head) == NULL) {                                                                        \
+    (add)->prev = (add);                                                                       \
+    (add)->next = NULL;                                                                        \
+    (head) = (add);                                                                            \
+  } else if ((cmp(head, add)) >= 0) {                                                          \
+    (add)->prev = (head)->prev;                                                                \
+    (add)->next = (head);                                                                      \
+    (head)->prev = (add);                                                                      \
+    (head) = (add);                                                                            \
+  } else {                                                                                     \
+    char *_tmp = (char*)(head);                                                                \
+    while ((head)->next && (cmp((head)->next, add)) < 0) {                                     \
+      (head) = (head)->next;                                                                   \
+    }                                                                                          \
+    (add)->prev = (head);                                                                      \
+    (add)->next = (head)->next;                                                                \
+    (head)->next = (add);                                                                      \
+    UTLIST_RS(head);                                                                           \
+    if ((add)->next) {                                                                         \
+      (add)->next->prev = (add);                                                               \
+    } else {                                                                                   \
+      (head)->prev = (add);                                                                    \
+    }                                                                                          \
+  }                                                                                            \
+} while (0)
+#endif /* NO_DECLTYPE */
+
+/******************************************************************************
+ * circular doubly linked list macros                                         *
+ *****************************************************************************/
+#define CDL_APPEND(head,add)                                                                   \
+    CDL_APPEND2(head,add,prev,next)
+
+#define CDL_APPEND2(head,add,prev,next)                                                        \
+do {                                                                                           \
+ if (head) {                                                                                   \
+   (add)->prev = (head)->prev;                                                                 \
+   (add)->next = (head);                                                                       \
+   (head)->prev = (add);                                                                       \
+   (add)->prev->next = (add);                                                                  \
+ } else {                                                                                      \
+   (add)->prev = (add);                                                                        \
+   (add)->next = (add);                                                                        \
+   (head) = (add);                                                                             \
+ }                                                                                             \
+} while (0)
+
+#define CDL_PREPEND(head,add)                                                                  \
+    CDL_PREPEND2(head,add,prev,next)
+
+#define CDL_PREPEND2(head,add,prev,next)                                                       \
+do {                                                                                           \
+ if (head) {                                                                                   \
+   (add)->prev = (head)->prev;                                                                 \
+   (add)->next = (head);                                                                       \
+   (head)->prev = (add);                                                                       \
+   (add)->prev->next = (add);                                                                  \
+ } else {                                                                                      \
+   (add)->prev = (add);                                                                        \
+   (add)->next = (add);                                                                        \
+ }                                                                                             \
+ (head) = (add);                                                                               \
+} while (0)
+
+#define CDL_INSERT_INORDER(head,add,cmp)                                                       \
+    CDL_INSERT_INORDER2(head,add,cmp,prev,next)
+
+#define CDL_INSERT_INORDER2(head,add,cmp,prev,next)                                            \
+do {                                                                                           \
+  LDECLTYPE(head) _tmp;                                                                        \
+  if (head) {                                                                                  \
+    CDL_LOWER_BOUND2(head, _tmp, add, cmp, next);                                              \
+    CDL_APPEND_ELEM2(head, _tmp, add, prev, next);                                             \
+  } else {                                                                                     \
+    (head) = (add);                                                                            \
+    (head)->next = (head);                                                                     \
+    (head)->prev = (head);                                                                     \
+  }                                                                                            \
+} while (0)
+
+#define CDL_LOWER_BOUND(head,elt,like,cmp)                                                     \
+    CDL_LOWER_BOUND2(head,elt,like,cmp,next)
+
+#define CDL_LOWER_BOUND2(head,elt,like,cmp,next)                                               \
+do {                                                                                           \
+  if ((head) == NULL || (cmp(head, like)) >= 0) {                                              \
+    (elt) = NULL;                                                                              \
+  } else {                                                                                     \
+    for ((elt) = (head); (elt)->next != (head); (elt) = (elt)->next) {                         \
+      if ((cmp((elt)->next, like)) >= 0) {                                                     \
+        break;                                                                                 \
+      }                                                                                        \
+    }                                                                                          \
+  }                                                                                            \
+} while (0)
+
+#define CDL_DELETE(head,del)                                                                   \
+    CDL_DELETE2(head,del,prev,next)
+
+#define CDL_DELETE2(head,del,prev,next)                                                        \
+do {                                                                                           \
+  if (((head)==(del)) && ((head)->next == (head))) {                                           \
+      (head) = NULL;                                                                           \
+  } else {                                                                                     \
+     (del)->next->prev = (del)->prev;                                                          \
+     (del)->prev->next = (del)->next;                                                          \
+     if ((del) == (head)) (head)=(del)->next;                                                  \
+  }                                                                                            \
+} while (0)
+
+#define CDL_COUNT(head,el,counter)                                                             \
+    CDL_COUNT2(head,el,counter,next)                                                           \
+
+#define CDL_COUNT2(head, el, counter,next)                                                     \
+do {                                                                                           \
+  (counter) = 0;                                                                               \
+  CDL_FOREACH2(head,el,next) { ++(counter); }                                                  \
+} while (0)
+
+#define CDL_FOREACH(head,el)                                                                   \
+    CDL_FOREACH2(head,el,next)
+
+#define CDL_FOREACH2(head,el,next)                                                             \
+    for ((el)=(head);el;(el)=(((el)->next==(head)) ? NULL : (el)->next))
+
+#define CDL_FOREACH_SAFE(head,el,tmp1,tmp2)                                                    \
+    CDL_FOREACH_SAFE2(head,el,tmp1,tmp2,prev,next)
+
+#define CDL_FOREACH_SAFE2(head,el,tmp1,tmp2,prev,next)                                         \
+  for ((el) = (head), (tmp1) = (head) ? (head)->prev : NULL;                                   \
+       (el) && ((tmp2) = (el)->next, 1);                                                       \
+       (el) = ((el) == (tmp1) ? NULL : (tmp2)))
+
+#define CDL_SEARCH_SCALAR(head,out,field,val)                                                  \
+    CDL_SEARCH_SCALAR2(head,out,field,val,next)
+
+#define CDL_SEARCH_SCALAR2(head,out,field,val,next)                                            \
+do {                                                                                           \
+    CDL_FOREACH2(head,out,next) {                                                              \
+      if ((out)->field == (val)) break;                                                        \
+    }                                                                                          \
+} while (0)
+
+#define CDL_SEARCH(head,out,elt,cmp)                                                           \
+    CDL_SEARCH2(head,out,elt,cmp,next)
+
+#define CDL_SEARCH2(head,out,elt,cmp,next)                                                     \
+do {                                                                                           \
+    CDL_FOREACH2(head,out,next) {                                                              \
+      if ((cmp(out,elt))==0) break;                                                            \
+    }                                                                                          \
+} while (0)
+
+#define CDL_REPLACE_ELEM2(head, el, add, prev, next)                                           \
+do {                                                                                           \
+ assert((head) != NULL);                                                                       \
+ assert((el) != NULL);                                                                         \
+ assert((add) != NULL);                                                                        \
+ if ((el)->next == (el)) {                                                                     \
+  (add)->next = (add);                                                                         \
+  (add)->prev = (add);                                                                         \
+  (head) = (add);                                                                              \
+ } else {                                                                                      \
+  (add)->next = (el)->next;                                                                    \
+  (add)->prev = (el)->prev;                                                                    \
+  (add)->next->prev = (add);                                                                   \
+  (add)->prev->next = (add);                                                                   \
+  if ((head) == (el)) {                                                                        \
+   (head) = (add);                                                                             \
+  }                                                                                            \
+ }                                                                                             \
+} while (0)
+
+#define CDL_REPLACE_ELEM(head, el, add)                                                        \
+    CDL_REPLACE_ELEM2(head, el, add, prev, next)
+
+#define CDL_PREPEND_ELEM2(head, el, add, prev, next)                                           \
+do {                                                                                           \
+  if (el) {                                                                                    \
+    assert((head) != NULL);                                                                    \
+    assert((add) != NULL);                                                                     \
+    (add)->next = (el);                                                                        \
+    (add)->prev = (el)->prev;                                                                  \
+    (el)->prev = (add);                                                                        \
+    (add)->prev->next = (add);                                                                 \
+    if ((head) == (el)) {                                                                      \
+      (head) = (add);                                                                          \
+    }                                                                                          \
+  } else {                                                                                     \
+    CDL_APPEND2(head, add, prev, next);                                                        \
+  }                                                                                            \
+} while (0)
+
+#define CDL_PREPEND_ELEM(head, el, add)                                                        \
+    CDL_PREPEND_ELEM2(head, el, add, prev, next)
+
+#define CDL_APPEND_ELEM2(head, el, add, prev, next)                                            \
+do {                                                                                           \
+ if (el) {                                                                                     \
+  assert((head) != NULL);                                                                      \
+  assert((add) != NULL);                                                                       \
+  (add)->next = (el)->next;                                                                    \
+  (add)->prev = (el);                                                                          \
+  (el)->next = (add);                                                                          \
+  (add)->next->prev = (add);                                                                   \
+ } else {                                                                                      \
+  CDL_PREPEND2(head, add, prev, next);                                                         \
+ }                                                                                             \
+} while (0)
+
+#define CDL_APPEND_ELEM(head, el, add)                                                         \
+    CDL_APPEND_ELEM2(head, el, add, prev, next)
+
+#ifdef NO_DECLTYPE
+/* Here are VS2008 / NO_DECLTYPE replacements for a few functions */
+
+#undef CDL_INSERT_INORDER2
+#define CDL_INSERT_INORDER2(head,add,cmp,prev,next)                                            \
+do {                                                                                           \
+  if ((head) == NULL) {                                                                        \
+    (add)->prev = (add);                                                                       \
+    (add)->next = (add);                                                                       \
+    (head) = (add);                                                                            \
+  } else if ((cmp(head, add)) >= 0) {                                                          \
+    (add)->prev = (head)->prev;                                                                \
+    (add)->next = (head);                                                                      \
+    (add)->prev->next = (add);                                                                 \
+    (head)->prev = (add);                                                                      \
+    (head) = (add);                                                                            \
+  } else {                                                                                     \
+    char *_tmp = (char*)(head);                                                                \
+    while ((char*)(head)->next != _tmp && (cmp((head)->next, add)) < 0) {                      \
+      (head) = (head)->next;                                                                   \
+    }                                                                                          \
+    (add)->prev = (head);                                                                      \
+    (add)->next = (head)->next;                                                                \
+    (add)->next->prev = (add);                                                                 \
+    (head)->next = (add);                                                                      \
+    UTLIST_RS(head);                                                                           \
+  }                                                                                            \
+} while (0)
+#endif /* NO_DECLTYPE */
+
+#endif /* UTLIST_H */
diff --git a/tools/sdk/esp32s3/include/coap/port/include/coap3/coap.h b/tools/sdk/esp32s3/include/coap/port/include/coap3/coap.h
new file mode 100644
index 00000000000..c69d2734b3a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/port/include/coap3/coap.h
@@ -0,0 +1,51 @@
+/* Modify head file implementation for ESP32 platform.
+ *
+ * Uses libcoap software implementation for failover when concurrent
+ * define operations are in use.
+ *
+ * coap.h -- main header file for CoAP stack of libcoap
+ *
+ * Copyright (C) 2010-2012,2015-2016 Olaf Bergmann <bergmann@tzi.org>
+ *               2015 Carsten Schoenert <c.schoenert@t-online.de>
+ *
+ * Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef _COAP_H_
+#define _COAP_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "coap3/libcoap.h"
+
+#include "coap3/coap_forward_decls.h"
+#include "coap3/address.h"
+#include "coap3/async.h"
+#include "coap3/block.h"
+#include "coap3/coap_cache.h"
+#include "coap3/coap_dtls.h"
+#include "coap3/coap_event.h"
+#include "coap3/coap_io.h"
+#include "coap3/coap_time.h"
+#include "coap3/coap_debug.h"
+#include "coap3/encode.h"
+#include "coap3/mem.h"
+#include "coap3/net.h"
+#include "coap3/option.h"
+#include "coap3/pdu.h"
+#include "coap3/coap_prng.h"
+#include "coap3/resource.h"
+#include "coap3/str.h"
+#include "coap3/subscribe.h"
+#include "coap3/uri.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _COAP_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/port/include/coap_config.h b/tools/sdk/esp32s3/include/coap/port/include/coap_config.h
new file mode 100644
index 00000000000..1efa37aa7f7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/port/include/coap_config.h
@@ -0,0 +1,42 @@
+/*
+ * libcoap configure implementation for ESP32 platform.
+ *
+ * Uses libcoap software implementation for failover when concurrent
+ * configure operations are in use.
+ *
+ * coap.h -- main header file for CoAP stack of libcoap
+ *
+ * Copyright (C) 2010-2012,2015-2016 Olaf Bergmann <bergmann@tzi.org>
+ *               2015 Carsten Schoenert <c.schoenert@t-online.de>
+ *
+ * Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef _CONFIG_H_
+#define _CONFIG_H_
+
+/* Always enabled in ESP-IDF */
+#ifndef WITH_POSIX
+#define WITH_POSIX
+#endif
+
+#include "coap_config_posix.h"
+
+#define HAVE_STDIO_H
+#define HAVE_ASSERT_H
+
+#define PACKAGE_STRING PACKAGE_NAME PACKAGE_VERSION
+
+/* it's just provided by libc. i hope we don't get too many of those, as
+ * actually we'd need autotools again to find out what environment we're
+ * building in */
+#define HAVE_STRNLEN 1
+
+#define HAVE_LIMITS_H
+
+#define COAP_RESOURCES_NOHASH
+
+#endif /* _CONFIG_H_ */
diff --git a/tools/sdk/esp32s3/include/coap/port/include/coap_config_posix.h b/tools/sdk/esp32s3/include/coap/port/include/coap_config_posix.h
new file mode 100644
index 00000000000..b24335ad156
--- /dev/null
+++ b/tools/sdk/esp32s3/include/coap/port/include/coap_config_posix.h
@@ -0,0 +1,60 @@
+/*
+ * libcoap configure implementation for ESP32 platform.
+ *
+ * Uses libcoap software implementation for failover when concurrent
+ * configure operations are in use.
+ *
+ * coap.h -- main header file for CoAP stack of libcoap
+ *
+ * Copyright (C) 2010-2012,2015-2016 Olaf Bergmann <bergmann@tzi.org>
+ *               2015 Carsten Schoenert <c.schoenert@t-online.de>
+ *
+ * Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * This file is part of the CoAP library libcoap. Please see README for terms
+ * of use.
+ */
+
+#ifndef COAP_CONFIG_POSIX_H_
+#define COAP_CONFIG_POSIX_H_
+
+#ifdef WITH_POSIX
+
+#include <sys/socket.h>
+#include <net/if.h>
+
+#define HAVE_SYS_SOCKET_H
+#define HAVE_MALLOC
+#define HAVE_ARPA_INET_H
+#define HAVE_TIME_H
+#define HAVE_NETDB_H
+#define HAVE_NETINET_IN_H
+#define HAVE_STRUCT_CMSGHDR
+#define COAP_DISABLE_TCP 0
+
+#define ipi_spec_dst ipi_addr
+struct in6_pktinfo {
+  struct in6_addr ipi6_addr;        /* src/dst IPv6 address */
+  unsigned int ipi6_ifindex;        /* send/recv interface index */
+};
+#define IN6_IS_ADDR_V4MAPPED(a) \
+        ((((__const uint32_t *) (a))[0] == 0)                                 \
+         && (((__const uint32_t *) (a))[1] == 0)                              \
+         && (((__const uint32_t *) (a))[2] == htonl (0xffff)))
+
+/* As not defined, just need to define is as something innocuous */
+#define IPV6_PKTINFO IPV6_CHECKSUM
+
+#define PACKAGE_NAME "libcoap-posix"
+#define PACKAGE_VERSION "?"
+
+#ifdef CONFIG_MBEDTLS_TLS_ENABLED
+#define HAVE_MBEDTLS
+#endif /* CONFIG_MBEDTLS_TLS_ENABLED */
+#define COAP_CONSTRAINED_STACK 1
+#define ESPIDF_VERSION
+
+#define gai_strerror(x) "gai_strerror() not supported"
+
+#endif /* WITH_POSIX */
+#endif /* COAP_CONFIG_POSIX_H_ */
diff --git a/tools/sdk/esp32s3/include/console/argtable3/argtable3.h b/tools/sdk/esp32s3/include/console/argtable3/argtable3.h
new file mode 100644
index 00000000000..abb2009cccf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/console/argtable3/argtable3.h
@@ -0,0 +1,306 @@
+/*******************************************************************************
+ * This file is part of the argtable3 library.
+ *
+ * Copyright (C) 1998-2001,2003-2011,2013 Stewart Heitmann
+ * <sheitmann@users.sourceforge.net>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of STEWART HEITMANN nor the  names of its contributors
+ *       may be used to endorse or promote products derived from this software
+ *       without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL STEWART HEITMANN BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ ******************************************************************************/
+
+#ifndef ARGTABLE3
+#define ARGTABLE3
+
+#include <stdio.h>      /* FILE */
+#include <time.h>       /* struct tm */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ARG_REX_ICASE 1
+
+/* bit masks for arg_hdr.flag */
+enum
+{
+    ARG_TERMINATOR=0x1,
+    ARG_HASVALUE=0x2,
+    ARG_HASOPTVALUE=0x4
+};
+
+typedef void (arg_resetfn)(void *parent);
+typedef int  (arg_scanfn)(void *parent, const char *argval);
+typedef int  (arg_checkfn)(void *parent);
+typedef void (arg_errorfn)(void *parent, FILE *fp, int error, const char *argval, const char *progname);
+
+
+/*
+* The arg_hdr struct defines properties that are common to all arg_xxx structs.
+* The argtable library requires each arg_xxx struct to have an arg_hdr
+* struct as its first data member.
+* The argtable library functions then use this data to identify the
+* properties of the command line option, such as its option tags,
+* datatype string, and glossary strings, and so on.
+* Moreover, the arg_hdr struct contains pointers to custom functions that
+* are provided by each arg_xxx struct which perform the tasks of parsing
+* that particular arg_xxx arguments, performing post-parse checks, and
+* reporting errors.
+* These functions are private to the individual arg_xxx source code
+* and are the pointer to them are initiliased by that arg_xxx struct's
+* constructor function. The user could alter them after construction
+* if desired, but the original intention is for them to be set by the
+* constructor and left unaltered.
+*/
+struct arg_hdr
+{
+    char         flag;        /* Modifier flags: ARG_TERMINATOR, ARG_HASVALUE. */
+    const char  *shortopts;   /* String defining the short options */
+    const char  *longopts;    /* String defiing the long options */
+    const char  *datatype;    /* Description of the argument data type */
+    const char  *glossary;    /* Description of the option as shown by arg_print_glossary function */
+    int          mincount;    /* Minimum number of occurences of this option accepted */
+    int          maxcount;    /* Maximum number of occurences if this option accepted */
+    void        *parent;      /* Pointer to parent arg_xxx struct */
+    arg_resetfn *resetfn;     /* Pointer to parent arg_xxx reset function */
+    arg_scanfn  *scanfn;      /* Pointer to parent arg_xxx scan function */
+    arg_checkfn *checkfn;     /* Pointer to parent arg_xxx check function */
+    arg_errorfn *errorfn;     /* Pointer to parent arg_xxx error function */
+    void        *priv;        /* Pointer to private header data for use by arg_xxx functions */
+};
+
+struct arg_rem
+{
+    struct arg_hdr hdr;      /* The mandatory argtable header struct */
+};
+
+struct arg_lit
+{
+    struct arg_hdr hdr;      /* The mandatory argtable header struct */
+    int count;               /* Number of matching command line args */
+};
+
+struct arg_int
+{
+    struct arg_hdr hdr;      /* The mandatory argtable header struct */
+    int count;               /* Number of matching command line args */
+    int *ival;               /* Array of parsed argument values */
+};
+
+struct arg_dbl
+{
+    struct arg_hdr hdr;      /* The mandatory argtable header struct */
+    int count;               /* Number of matching command line args */
+    double *dval;            /* Array of parsed argument values */
+};
+
+struct arg_str
+{
+    struct arg_hdr hdr;      /* The mandatory argtable header struct */
+    int count;               /* Number of matching command line args */
+    const char **sval;       /* Array of parsed argument values */
+};
+
+struct arg_rex
+{
+    struct arg_hdr hdr;      /* The mandatory argtable header struct */
+    int count;               /* Number of matching command line args */
+    const char **sval;       /* Array of parsed argument values */
+};
+
+struct arg_file
+{
+    struct arg_hdr hdr;      /* The mandatory argtable header struct */
+    int count;               /* Number of matching command line args*/
+    const char **filename;   /* Array of parsed filenames  (eg: /home/foo.bar) */
+    const char **basename;   /* Array of parsed basenames  (eg: foo.bar) */
+    const char **extension;  /* Array of parsed extensions (eg: .bar) */
+};
+
+struct arg_date
+{
+    struct arg_hdr hdr;      /* The mandatory argtable header struct */
+    const char *format;      /* strptime format string used to parse the date */
+    int count;               /* Number of matching command line args */
+    struct tm *tmval;        /* Array of parsed time values */
+};
+
+enum {ARG_ELIMIT=1, ARG_EMALLOC, ARG_ENOMATCH, ARG_ELONGOPT, ARG_EMISSARG};
+struct arg_end
+{
+    struct arg_hdr hdr;      /* The mandatory argtable header struct */
+    int count;               /* Number of errors encountered */
+    int *error;              /* Array of error codes */
+    void **parent;           /* Array of pointers to offending arg_xxx struct */
+    const char **argval;     /* Array of pointers to offending argv[] string */
+};
+
+
+/**** arg_xxx constructor functions *********************************/
+
+struct arg_rem* arg_rem(const char* datatype, const char* glossary);
+
+struct arg_lit* arg_lit0(const char* shortopts,
+    const char* longopts,
+    const char* glossary);
+struct arg_lit* arg_lit1(const char* shortopts,
+    const char* longopts,
+    const char *glossary);
+struct arg_lit* arg_litn(const char* shortopts,
+    const char* longopts,
+    int mincount,
+    int maxcount,
+    const char *glossary);
+
+struct arg_key* arg_key0(const char* keyword,
+    int flags,
+    const char* glossary);
+struct arg_key* arg_key1(const char* keyword,
+    int flags,
+    const char* glossary);
+struct arg_key* arg_keyn(const char* keyword,
+    int flags,
+    int mincount,
+    int maxcount,
+    const char* glossary);
+
+struct arg_int* arg_int0(const char* shortopts,
+    const char* longopts,
+    const char* datatype,
+    const char* glossary);
+struct arg_int* arg_int1(const char* shortopts,
+    const char* longopts,
+    const char* datatype,
+    const char *glossary);
+struct arg_int* arg_intn(const char* shortopts,
+    const char* longopts,
+    const char *datatype,
+    int mincount,
+    int maxcount,
+    const char *glossary);
+
+struct arg_dbl* arg_dbl0(const char* shortopts,
+    const char* longopts,
+    const char* datatype,
+    const char* glossary);
+struct arg_dbl* arg_dbl1(const char* shortopts,
+    const char* longopts,
+    const char* datatype,
+    const char *glossary);
+struct arg_dbl* arg_dbln(const char* shortopts,
+    const char* longopts,
+    const char *datatype,
+    int mincount,
+    int maxcount,
+    const char *glossary);
+
+struct arg_str* arg_str0(const char* shortopts,
+    const char* longopts,
+    const char* datatype,
+    const char* glossary);
+struct arg_str* arg_str1(const char* shortopts,
+    const char* longopts,
+    const char* datatype,
+    const char *glossary);
+struct arg_str* arg_strn(const char* shortopts,
+    const char* longopts,
+    const char* datatype,
+    int mincount,
+    int maxcount,
+    const char *glossary);
+
+struct arg_rex* arg_rex0(const char* shortopts,
+    const char* longopts,
+    const char* pattern,
+    const char* datatype,
+    int flags,
+    const char* glossary);
+struct arg_rex* arg_rex1(const char* shortopts,
+    const char* longopts,
+    const char* pattern,
+    const char* datatype,
+    int flags,
+    const char *glossary);
+struct arg_rex* arg_rexn(const char* shortopts,
+    const char* longopts,
+    const char* pattern,
+    const char* datatype,
+    int mincount,
+    int maxcount,
+    int flags,
+    const char *glossary);
+
+struct arg_file* arg_file0(const char* shortopts,
+    const char* longopts,
+    const char* datatype,
+    const char* glossary);
+struct arg_file* arg_file1(const char* shortopts,
+    const char* longopts,
+    const char* datatype,
+    const char *glossary);
+struct arg_file* arg_filen(const char* shortopts,
+    const char* longopts,
+    const char* datatype,
+    int mincount,
+    int maxcount,
+    const char *glossary);
+
+struct arg_date* arg_date0(const char* shortopts,
+    const char* longopts,
+    const char* format,
+    const char* datatype,
+    const char* glossary);
+struct arg_date* arg_date1(const char* shortopts,
+    const char* longopts,
+    const char* format,
+    const char* datatype,
+    const char *glossary);
+struct arg_date* arg_daten(const char* shortopts,
+    const char* longopts,
+    const char* format,
+    const char* datatype,
+    int mincount,
+    int maxcount,
+    const char *glossary);
+
+struct arg_end* arg_end(int maxerrors);
+
+
+/**** other functions *******************************************/
+int arg_nullcheck(void **argtable);
+int arg_parse(int argc, char **argv, void **argtable);
+void arg_print_option(FILE *fp, const char *shortopts, const char *longopts, const char *datatype, const char *suffix);
+void arg_print_syntax(FILE *fp, void **argtable, const char *suffix);
+void arg_print_syntaxv(FILE *fp, void **argtable, const char *suffix);
+void arg_print_glossary(FILE *fp, void **argtable, const char *format);
+void arg_print_glossary_gnu(FILE *fp, void **argtable);
+void arg_print_errors(FILE* fp, struct arg_end* end, const char* progname);
+void arg_freetable(void **argtable, size_t n);
+void arg_print_formatted(FILE *fp, const unsigned lmargin, const unsigned rmargin, const char *text);
+
+/**** deprecated functions, for back-compatibility only ********/
+void arg_free(void **argtable);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/console/esp_console.h b/tools/sdk/esp32s3/include/console/esp_console.h
new file mode 100644
index 00000000000..bd49cd83a9c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/console/esp_console.h
@@ -0,0 +1,386 @@
+/*
+ * SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stddef.h>
+#include "sdkconfig.h"
+#include "esp_err.h"
+
+// Forward declaration. Definition in linenoise/linenoise.h.
+typedef struct linenoiseCompletions linenoiseCompletions;
+
+/**
+ * @brief Parameters for console initialization
+ */
+typedef struct {
+    size_t max_cmdline_length;  //!< length of command line buffer, in bytes
+    size_t max_cmdline_args;    //!< maximum number of command line arguments to parse
+    int hint_color;             //!< ASCII color code of hint text
+    int hint_bold;              //!< Set to 1 to print hint text in bold
+} esp_console_config_t;
+
+/**
+ * @brief Default console configuration value
+ *
+ */
+#define ESP_CONSOLE_CONFIG_DEFAULT() \
+    {                                \
+        .max_cmdline_length = 256,   \
+        .max_cmdline_args = 32,      \
+        .hint_color = 39,            \
+        .hint_bold = 0               \
+    }
+
+/**
+ * @brief Parameters for console REPL (Read Eval Print Loop)
+ *
+ */
+typedef struct {
+    uint32_t max_history_len;      //!< maximum length for the history
+    const char *history_save_path; //!< file path used to save history commands, set to NULL won't save to file system
+    uint32_t task_stack_size;      //!< repl task stack size
+    uint32_t task_priority;        //!< repl task priority
+    const char *prompt;            //!< prompt (NULL represents default: "esp> ")
+    size_t max_cmdline_length;     //!< maximum length of a command line. If 0, default value will be used
+} esp_console_repl_config_t;
+
+/**
+ * @brief Default console repl configuration value
+ *
+ */
+#define ESP_CONSOLE_REPL_CONFIG_DEFAULT() \
+{                                         \
+        .max_history_len = 32,            \
+        .history_save_path = NULL,        \
+        .task_stack_size = 4096,          \
+        .task_priority = 2,               \
+        .prompt = NULL,                   \
+        .max_cmdline_length = 0,          \
+}
+
+/**
+ * @brief Parameters for console device: UART
+ *
+ */
+typedef struct {
+    int channel;     //!< UART channel number (count from zero)
+    int baud_rate;   //!< Comunication baud rate
+    int tx_gpio_num; //!< GPIO number for TX path, -1 means using default one
+    int rx_gpio_num; //!< GPIO number for RX path, -1 means using default one
+} esp_console_dev_uart_config_t;
+
+#ifdef CONFIG_ESP_CONSOLE_UART_CUSTOM
+#define ESP_CONSOLE_DEV_UART_CONFIG_DEFAULT()       \
+{                                                   \
+    .channel = CONFIG_ESP_CONSOLE_UART_NUM,         \
+    .baud_rate = CONFIG_ESP_CONSOLE_UART_BAUDRATE,  \
+    .tx_gpio_num = CONFIG_ESP_CONSOLE_UART_TX_GPIO, \
+    .rx_gpio_num = CONFIG_ESP_CONSOLE_UART_RX_GPIO, \
+}
+#else
+#define ESP_CONSOLE_DEV_UART_CONFIG_DEFAULT()      \
+{                                                  \
+    .channel = CONFIG_ESP_CONSOLE_UART_NUM,        \
+    .baud_rate = CONFIG_ESP_CONSOLE_UART_BAUDRATE, \
+    .tx_gpio_num = -1,                             \
+    .rx_gpio_num = -1,                             \
+}
+#endif
+
+/**
+ * @brief Parameters for console device: USB CDC
+ *
+ * @note It's an empty structure for now, reserved for future
+ *
+ */
+typedef struct {
+
+} esp_console_dev_usb_cdc_config_t;
+
+#define ESP_CONSOLE_DEV_CDC_CONFIG_DEFAULT() \
+{                                            \
+}
+
+#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
+/**
+ * @brief Parameters for console device: USB-SERIAL-JTAG
+ *
+ * @note It's an empty structure for now, reserved for future
+ *
+ */
+typedef struct {
+
+} esp_console_dev_usb_serial_jtag_config_t;
+
+#define ESP_CONSOLE_DEV_USB_SERIAL_JTAG_CONFIG_DEFAULT() {}
+
+#endif // CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
+
+/**
+ * @brief initialize console module
+ * @param config console configuration
+ * @note  Call this once before using other console module features
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NO_MEM if out of memory
+ *      - ESP_ERR_INVALID_STATE if already initialized
+ *      - ESP_ERR_INVALID_ARG if the configuration is invalid
+ */
+esp_err_t esp_console_init(const esp_console_config_t *config);
+
+/**
+ * @brief de-initialize console module
+ * @note  Call this once when done using console module functions
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if not initialized yet
+ */
+esp_err_t esp_console_deinit(void);
+
+/**
+ * @brief Console command main function
+ * @param argc number of arguments
+ * @param argv array with argc entries, each pointing to a zero-terminated string argument
+ * @return console command return code, 0 indicates "success"
+ */
+typedef int (*esp_console_cmd_func_t)(int argc, char **argv);
+
+/**
+ * @brief Console command description
+ */
+typedef struct {
+    /**
+     * Command name. Must not be NULL, must not contain spaces.
+     * The pointer must be valid until the call to esp_console_deinit.
+     */
+    const char *command;
+    /**
+     * Help text for the command, shown by help command.
+     * If set, the pointer must be valid until the call to esp_console_deinit.
+     * If not set, the command will not be listed in 'help' output.
+     */
+    const char *help;
+    /**
+     * Hint text, usually lists possible arguments.
+     * If set to NULL, and 'argtable' field is non-NULL, hint will be generated
+     * automatically
+     */
+    const char *hint;
+    /**
+     * Pointer to a function which implements the command.
+     */
+    esp_console_cmd_func_t func;
+    /**
+     * Array or structure of pointers to arg_xxx structures, may be NULL.
+     * Used to generate hint text if 'hint' is set to NULL.
+     * Array/structure which this field points to must end with an arg_end.
+     * Only used for the duration of esp_console_cmd_register call.
+     */
+    void *argtable;
+} esp_console_cmd_t;
+
+/**
+ * @brief Register console command
+ * @param cmd pointer to the command description; can point to a temporary value
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NO_MEM if out of memory
+ *      - ESP_ERR_INVALID_ARG if command description includes invalid arguments
+ */
+esp_err_t esp_console_cmd_register(const esp_console_cmd_t *cmd);
+
+/**
+ * @brief Run command line
+ * @param cmdline command line (command name followed by a number of arguments)
+ * @param[out] cmd_ret return code from the command (set if command was run)
+ * @return
+ *      - ESP_OK, if command was run
+ *      - ESP_ERR_INVALID_ARG, if the command line is empty, or only contained
+ *        whitespace
+ *      - ESP_ERR_NOT_FOUND, if command with given name wasn't registered
+ *      - ESP_ERR_INVALID_STATE, if esp_console_init wasn't called
+ */
+esp_err_t esp_console_run(const char *cmdline, int *cmd_ret);
+
+/**
+ * @brief Split command line into arguments in place
+ * @verbatim
+ * - This function finds whitespace-separated arguments in the given input line.
+ *
+ *     'abc def 1 20 .3' -> [ 'abc', 'def', '1', '20', '.3' ]
+ *
+ * - Argument which include spaces may be surrounded with quotes. In this case
+ *   spaces are preserved and quotes are stripped.
+ *
+ *     'abc "123 456" def' -> [ 'abc', '123 456', 'def' ]
+ *
+ * - Escape sequences may be used to produce backslash, double quote, and space:
+ *
+ *     'a\ b\\c\"' -> [ 'a b\c"' ]
+ * @endverbatim
+ * @note Pointers to at most argv_size - 1 arguments are returned in argv array.
+ *       The pointer after the last one (i.e. argv[argc]) is set to NULL.
+ *
+ * @param line pointer to buffer to parse; it is modified in place
+ * @param argv array where the pointers to arguments are written
+ * @param argv_size number of elements in argv_array (max. number of arguments)
+ * @return number of arguments found (argc)
+ */
+size_t esp_console_split_argv(char *line, char **argv, size_t argv_size);
+
+/**
+ * @brief Callback which provides command completion for linenoise library
+ *
+ * When using linenoise for line editing, command completion support
+ * can be enabled like this:
+ *
+ *   linenoiseSetCompletionCallback(&esp_console_get_completion);
+ *
+ * @param buf the string typed by the user
+ * @param lc linenoiseCompletions to be filled in
+ */
+void esp_console_get_completion(const char *buf, linenoiseCompletions *lc);
+
+/**
+ * @brief Callback which provides command hints for linenoise library
+ *
+ * When using linenoise for line editing, hints support can be enabled as
+ * follows:
+ *
+ *   linenoiseSetHintsCallback((linenoiseHintsCallback*) &esp_console_get_hint);
+ *
+ * The extra cast is needed because linenoiseHintsCallback is defined as
+ * returning a char* instead of const char*.
+ *
+ * @param buf line typed by the user
+ * @param[out] color ANSI color code to be used when displaying the hint
+ * @param[out] bold set to 1 if hint has to be displayed in bold
+ * @return string containing the hint text. This string is persistent and should
+ *         not be freed (i.e. linenoiseSetFreeHintsCallback should not be used).
+ */
+const char *esp_console_get_hint(const char *buf, int *color, int *bold);
+
+/**
+ * @brief Register a 'help' command
+ *
+ * Default 'help' command prints the list of registered commands along with
+ * hints and help strings.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE, if esp_console_init wasn't called
+ */
+esp_err_t esp_console_register_help_command(void);
+
+/******************************************************************************
+ *              Console REPL
+ ******************************************************************************/
+
+/**
+ * @brief Type defined for console REPL
+ *
+ */
+typedef struct esp_console_repl_s esp_console_repl_t;
+
+/**
+ * @brief Console REPL base structure
+ *
+ */
+struct esp_console_repl_s {
+    /**
+     * @brief Delete console REPL environment
+     * @param[in] repl REPL handle returned from esp_console_new_repl_xxx
+     * @return
+     *      - ESP_OK on success
+     *      - ESP_FAIL on errors
+     */
+    esp_err_t (*del)(esp_console_repl_t *repl);
+};
+
+/**
+ * @brief Establish a console REPL environment over UART driver
+ *
+ * @param[in] dev_config UART device configuration
+ * @param[in] repl_config REPL configuration
+ * @param[out] ret_repl return REPL handle after initialization succeed, return NULL otherwise
+ *
+ * @note This is a all-in-one function to establish the environment needed for REPL, includes:
+ *       - Install the UART driver on the console UART (8n1, 115200, REF_TICK clock source)
+ *       - Configures the stdin/stdout to go through the UART driver
+ *       - Initializes linenoise
+ *       - Spawn new thread to run REPL in the background
+ *
+ * @attention This function is meant to be used in the examples to make the code more compact.
+ *            Applications which use console functionality should be based on
+ *            the underlying linenoise and esp_console functions.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_FAIL Parameter error
+ */
+esp_err_t esp_console_new_repl_uart(const esp_console_dev_uart_config_t *dev_config, const esp_console_repl_config_t *repl_config, esp_console_repl_t **ret_repl);
+
+/**
+ * @brief Establish a console REPL environment over USB CDC
+ *
+ * @param[in] dev_config USB CDC configuration
+ * @param[in] repl_config REPL configuration
+ * @param[out] ret_repl return REPL handle after initialization succeed, return NULL otherwise
+ *
+ * @note This is a all-in-one function to establish the environment needed for REPL, includes:
+ *       - Initializes linenoise
+ *       - Spawn new thread to run REPL in the background
+ *
+ * @attention This function is meant to be used in the examples to make the code more compact.
+ *            Applications which use console functionality should be based on
+ *            the underlying linenoise and esp_console functions.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_FAIL Parameter error
+ */
+esp_err_t esp_console_new_repl_usb_cdc(const esp_console_dev_usb_cdc_config_t *dev_config, const esp_console_repl_config_t *repl_config, esp_console_repl_t **ret_repl);
+
+#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
+/**
+ * @brief Establish a console REPL (Read-eval-print loop) environment over USB-SERIAL-JTAG
+ *
+ * @param[in] dev_config USB-SERIAL-JTAG configuration
+ * @param[in] repl_config REPL configuration
+ * @param[out] ret_repl return REPL handle after initialization succeed, return NULL otherwise
+ *
+ * @note This is a all-in-one function to establish the environment needed for REPL, includes:
+ *       - Initializes linenoise
+ *       - Spawn new thread to run REPL in the background
+ *
+ * @attention This function is meant to be used in the examples to make the code more compact.
+ *            Applications which use console functionality should be based on
+ *            the underlying linenoise and esp_console functions.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_FAIL Parameter error
+ */
+esp_err_t esp_console_new_repl_usb_serial_jtag(const esp_console_dev_usb_serial_jtag_config_t *dev_config, const esp_console_repl_config_t *repl_config, esp_console_repl_t **ret_repl);
+#endif // CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
+
+/**
+ * @brief Start REPL environment
+ * @param[in] repl REPL handle returned from esp_console_new_repl_xxx
+ * @note Once the REPL got started, it won't be stopped until user call repl->del(repl) to destory the REPL environment.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE, if repl has started already
+ */
+esp_err_t esp_console_start_repl(esp_console_repl_t *repl);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/console/linenoise/linenoise.h b/tools/sdk/esp32s3/include/console/linenoise/linenoise.h
new file mode 100644
index 00000000000..730ba9b5b1f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/console/linenoise/linenoise.h
@@ -0,0 +1,81 @@
+/* linenoise.h -- VERSION 1.0
+ *
+ * Guerrilla line editing library against the idea that a line editing lib
+ * needs to be 20,000 lines of C code.
+ *
+ * See linenoise.c for more information.
+ *
+ * ------------------------------------------------------------------------
+ *
+ * Copyright (c) 2010-2014, Salvatore Sanfilippo <antirez at gmail dot com>
+ * Copyright (c) 2010-2013, Pieter Noordhuis <pcnoordhuis at gmail dot com>
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *  *  Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *
+ *  *  Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __LINENOISE_H
+#define __LINENOISE_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdbool.h>
+
+typedef struct linenoiseCompletions {
+  size_t len;
+  char **cvec;
+} linenoiseCompletions;
+
+typedef void(linenoiseCompletionCallback)(const char *, linenoiseCompletions *);
+typedef char*(linenoiseHintsCallback)(const char *, int *color, int *bold);
+typedef void(linenoiseFreeHintsCallback)(void *);
+void linenoiseSetCompletionCallback(linenoiseCompletionCallback *);
+void linenoiseSetHintsCallback(linenoiseHintsCallback *);
+void linenoiseSetFreeHintsCallback(linenoiseFreeHintsCallback *);
+void linenoiseAddCompletion(linenoiseCompletions *, const char *);
+
+int linenoiseProbe(void);
+char *linenoise(const char *prompt);
+void linenoiseFree(void *ptr);
+int linenoiseHistoryAdd(const char *line);
+int linenoiseHistorySetMaxLen(int len);
+int linenoiseHistorySave(const char *filename);
+int linenoiseHistoryLoad(const char *filename);
+void linenoiseHistoryFree(void);
+void linenoiseClearScreen(void);
+void linenoiseSetMultiLine(int ml);
+void linenoiseSetDumbMode(int set);
+bool linenoiseIsDumbMode(void);
+void linenoisePrintKeyCodes(void);
+void linenoiseAllowEmpty(bool);
+int linenoiseSetMaxLineLen(size_t len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LINENOISE_H */
diff --git a/tools/sdk/esp32s3/include/driver/esp32s3/include/driver/temp_sensor.h b/tools/sdk/esp32s3/include/driver/esp32s3/include/driver/temp_sensor.h
new file mode 100644
index 00000000000..c3a87068b60
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/esp32s3/include/driver/temp_sensor.h
@@ -0,0 +1,97 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief temperature sensor range option.
+ */
+typedef enum {
+    TSENS_DAC_L0 = 0, /*!< offset = -2, measure range: 50℃ ~ 125℃, error < 3℃. */
+    TSENS_DAC_L1,     /*!< offset = -1, measure range: 20℃ ~ 100℃, error < 2℃. */
+    TSENS_DAC_L2,     /*!< offset =  0, measure range:-10℃ ~  80℃, error < 1℃. */
+    TSENS_DAC_L3,     /*!< offset =  1, measure range:-30℃ ~  50℃, error < 2℃. */
+    TSENS_DAC_L4,     /*!< offset =  2, measure range:-40℃ ~  20℃, error < 3℃. */
+    TSENS_DAC_MAX,
+    TSENS_DAC_DEFAULT = TSENS_DAC_L2,
+} temp_sensor_dac_offset_t;
+
+/**
+ * @brief Configuration for temperature sensor reading
+ */
+typedef struct {
+    temp_sensor_dac_offset_t dac_offset;    /*!< The temperature measurement range is configured with a built-in temperature offset DAC. */
+    uint8_t clk_div;                        /*!< Default: 6 */
+} temp_sensor_config_t;
+
+/**
+ * @brief temperature sensor default setting.
+ */
+#define TSENS_CONFIG_DEFAULT() {.dac_offset = TSENS_DAC_L2, \
+                                .clk_div = 6}
+
+/**
+ * @brief Set parameter of temperature sensor.
+ * @param tsens
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t temp_sensor_set_config(temp_sensor_config_t tsens);
+
+/**
+ * @brief Get parameter of temperature sensor.
+ * @param tsens
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t temp_sensor_get_config(temp_sensor_config_t *tsens);
+
+/**
+ * @brief Start temperature sensor measure.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t temp_sensor_start(void);
+
+/**
+ * @brief Stop temperature sensor measure.
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t temp_sensor_stop(void);
+
+/**
+ * @brief Read temperature sensor raw data.
+ * @param tsens_out Pointer to raw data, Range: 0 ~ 255
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG `tsens_out` is NULL
+ *     - ESP_ERR_INVALID_STATE temperature sensor dont start
+ */
+esp_err_t temp_sensor_read_raw(uint32_t *tsens_out);
+
+/**
+ * @brief Read temperature sensor data that is converted to degrees Celsius.
+ * @note  Should not be called from interrupt.
+ * @param celsius The measure output value.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG ARG is NULL.
+ *     - ESP_ERR_INVALID_STATE The ambient temperature is out of range.
+ */
+esp_err_t temp_sensor_read_celsius(float *celsius);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/esp32s3/include/driver/touch_sensor.h b/tools/sdk/esp32s3/include/driver/esp32s3/include/driver/touch_sensor.h
new file mode 100644
index 00000000000..d90a56e992c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/esp32s3/include/driver/touch_sensor.h
@@ -0,0 +1,593 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "driver/touch_sensor_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Set touch sensor FSM start
+ * @note  Start FSM after the touch sensor FSM mode is set.
+ * @note  Call this function will reset benchmark of all touch channels.
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_fsm_start(void);
+
+/**
+ * @brief Stop touch sensor FSM.
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_fsm_stop(void);
+
+/**
+ * @brief Trigger a touch sensor measurement, only support in SW mode of FSM
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_sw_start(void);
+
+/**
+ * @brief Set touch sensor times of charge and discharge and sleep time.
+ *        Excessive total time will slow down the touch response.
+ *        Too small measurement time will not be sampled enough, resulting in inaccurate measurements.
+ *
+ * @note The greater the duty cycle of the measurement time, the more system power is consumed.
+ * @param sleep_cycle The touch sensor will sleep after each measurement.
+ *                    sleep_cycle decide the interval between each measurement.
+ *                    t_sleep = sleep_cycle / (RTC_SLOW_CLK frequency).
+ *                    The approximate frequency value of RTC_SLOW_CLK can be obtained using rtc_clk_slow_freq_get_hz function.
+ * @param meas_times The times of charge and discharge in each measure process of touch channels.
+ *                  The timer frequency is 8Mhz. Range: 0 ~ 0xffff.
+ *                  Recommended typical value: Modify this value to make the measurement time around 1ms.
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_set_meas_time(uint16_t sleep_cycle, uint16_t meas_times);
+
+/**
+ * @brief Get touch sensor times of charge and discharge and sleep time
+ * @param sleep_cycle  Pointer to accept sleep cycle number
+ * @param meas_times Pointer to accept measurement times count.
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_get_meas_time(uint16_t *sleep_cycle, uint16_t *meas_times);
+
+/**
+ * @brief Set connection type of touch channel in idle status.
+ *        When a channel is in measurement mode, other initialized channels are in idle mode.
+ *        The touch channel is generally adjacent to the trace, so the connection state of the idle channel
+ *        affects the stability and sensitivity of the test channel.
+ *        The `CONN_HIGHZ`(high resistance) setting increases the sensitivity of touch channels.
+ *        The `CONN_GND`(grounding) setting increases the stability of touch channels.
+ * @param type  Select idle channel connect to high resistance state or ground.
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_set_idle_channel_connect(touch_pad_conn_type_t type);
+
+/**
+ * @brief Set connection type of touch channel in idle status.
+ *        When a channel is in measurement mode, other initialized channels are in idle mode.
+ *        The touch channel is generally adjacent to the trace, so the connection state of the idle channel
+ *        affects the stability and sensitivity of the test channel.
+ *        The `CONN_HIGHZ`(high resistance) setting increases the sensitivity of touch channels.
+ *        The `CONN_GND`(grounding) setting increases the stability of touch channels.
+ * @param type  Pointer to connection type.
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_get_idle_channel_connect(touch_pad_conn_type_t *type);
+
+/**
+ * @brief Set the trigger threshold of touch sensor.
+ *        The threshold determines the sensitivity of the touch sensor.
+ *        The threshold is the original value of the trigger state minus the benchmark value.
+ * @note  If set "TOUCH_PAD_THRESHOLD_MAX", the touch is never be triggered.
+ * @param touch_num touch pad index
+ * @param threshold threshold of touch sensor. Should be less than the max change value of touch.
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_set_thresh(touch_pad_t touch_num, uint32_t threshold);
+
+/**
+ * @brief Get touch sensor trigger threshold
+ * @param touch_num touch pad index
+ * @param threshold pointer to accept threshold
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if argument is wrong
+ */
+esp_err_t touch_pad_get_thresh(touch_pad_t touch_num, uint32_t *threshold);
+
+/**
+ * @brief Register touch channel into touch sensor scan group.
+ *        The working mode of the touch sensor is cyclically scanned.
+ *        This function will set the scan bits according to the given bitmask.
+ * @note  If set this mask, the FSM timer should be stop firsty.
+ * @note  The touch sensor that in scan map, should be deinit GPIO function firstly by `touch_pad_io_init`.
+ * @param enable_mask bitmask of touch sensor scan group.
+ *        e.g. TOUCH_PAD_NUM14 -> BIT(14)
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_set_channel_mask(uint16_t enable_mask);
+
+/**
+ * @brief Get the touch sensor scan group bit mask.
+ * @param enable_mask Pointer to bitmask of touch sensor scan group.
+ *        e.g. TOUCH_PAD_NUM14 -> BIT(14)
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_get_channel_mask(uint16_t *enable_mask);
+
+/**
+ * @brief Clear touch channel from touch sensor scan group.
+ *        The working mode of the touch sensor is cyclically scanned.
+ *        This function will clear the scan bits according to the given bitmask.
+ * @note  If clear all mask, the FSM timer should be stop firsty.
+ * @param enable_mask bitmask of touch sensor scan group.
+ *        e.g. TOUCH_PAD_NUM14 -> BIT(14)
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_clear_channel_mask(uint16_t enable_mask);
+
+/**
+ * @brief Configure parameter for each touch channel.
+ * @note  Touch num 0 is denoise channel, please use `touch_pad_denoise_enable` to set denoise function
+ * @param touch_num touch pad index
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG if argument wrong
+ *     - ESP_FAIL if touch pad not initialized
+ */
+esp_err_t touch_pad_config(touch_pad_t touch_num);
+
+/**
+ * @brief Reset the FSM of touch module.
+ * @note  Call this function after `touch_pad_fsm_stop`.
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_reset(void);
+
+/**
+ * @brief Get the current measure channel.
+ * @note  Should be called when touch sensor measurement is in cyclic scan mode.
+ * @return
+ *      - touch channel number
+ */
+touch_pad_t touch_pad_get_current_meas_channel(void);
+
+/**
+ * @brief Get the touch sensor interrupt status mask.
+ * @return
+ *      - touch interrupt bit
+ */
+uint32_t touch_pad_read_intr_status_mask(void);
+
+/**
+ * @brief Enable touch sensor interrupt by bitmask.
+ * @note  This API can be called in ISR handler.
+ * @param int_mask Pad mask to enable interrupts
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_intr_enable(touch_pad_intr_mask_t int_mask);
+
+/**
+ * @brief Disable touch sensor interrupt by bitmask.
+ * @note  This API can be called in ISR handler.
+ * @param int_mask Pad mask to disable interrupts
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_intr_disable(touch_pad_intr_mask_t int_mask);
+
+/**
+ * @brief Clear touch sensor interrupt by bitmask.
+ * @param int_mask Pad mask to clear interrupts
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_intr_clear(touch_pad_intr_mask_t int_mask);
+
+/**
+ * @brief   Register touch-pad ISR.
+ *          The handler will be attached to the same CPU core that this function is running on.
+ * @param fn  Pointer to ISR handler
+ * @param arg  Parameter for ISR
+ * @param intr_mask Enable touch sensor interrupt handler by bitmask.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Arguments error
+ *     - ESP_ERR_NO_MEM No memory
+ */
+esp_err_t touch_pad_isr_register(intr_handler_t fn, void *arg, touch_pad_intr_mask_t intr_mask);
+
+/**
+ * @brief Enable/disable the timeout check and set timeout threshold for all touch sensor channels measurements.
+ *        If enable: When the touch reading of a touch channel exceeds the measurement threshold, a timeout interrupt will be generated.
+ *        If disable: the FSM does not check if the channel under measurement times out.
+ *
+ * @note The threshold compared with touch readings.
+ * @note In order to avoid abnormal short circuit of some touch channels. This function should be turned on.
+ *       Ensure the normal operation of other touch channels.
+ *
+ * @param enable true(default): Enable the timeout check; false: Disable the timeout check.
+ * @param threshold For all channels, the maximum value that will not be exceeded during normal operation.
+ *
+* @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_timeout_set(bool enable, uint32_t threshold);
+
+/**
+ * @brief Call this interface after timeout to make the touch channel resume normal work. Point on the next channel to measure.
+ *        If this API is not called, the touch FSM will stop the measurement after timeout interrupt.
+ *
+ * @note  Call this API after finishes the exception handling by user.
+ *
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_timeout_resume(void);
+
+/**
+ * @brief get raw data of touch sensor.
+ * @note After the initialization is complete, the "raw_data" is max value. You need to wait for a measurement
+ *       cycle before you can read the correct touch value.
+ * @param touch_num touch pad index
+ * @param raw_data pointer to accept touch sensor value
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Touch channel 0 haven't this parameter.
+ */
+
+esp_err_t touch_pad_read_raw_data(touch_pad_t touch_num, uint32_t *raw_data);
+
+/**
+ * @brief get benchmark of touch sensor.
+ * @note After initialization, the benchmark value is the maximum during the first measurement period.
+ * @param touch_num touch pad index
+ * @param benchmark pointer to accept touch sensor benchmark value
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Touch channel 0 haven't this parameter.
+ */
+esp_err_t touch_pad_read_benchmark(touch_pad_t touch_num, uint32_t *benchmark);
+
+/**
+ * @brief Get smoothed data that obtained by filtering the raw data.
+ *
+ * @param touch_num touch pad index
+ * @param smooth pointer to smoothed data
+ */
+esp_err_t touch_pad_filter_read_smooth(touch_pad_t touch_num, uint32_t *smooth);
+
+/**
+ * @brief Force reset benchmark to raw data of touch sensor.
+ * @param touch_num touch pad index
+ *                  - TOUCH_PAD_MAX Reset basaline of all channels
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_reset_benchmark(touch_pad_t touch_num);
+
+/**
+ * @brief set parameter of touch sensor filter and detection algorithm.
+ *        For more details on the detection algorithm, please refer to the application documentation.
+ * @param filter_info select filter type and threshold of detection algorithm
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_filter_set_config(const touch_filter_config_t *filter_info);
+
+/**
+ * @brief get parameter of touch sensor filter and detection algorithm.
+ *        For more details on the detection algorithm, please refer to the application documentation.
+ * @param filter_info select filter type and threshold of detection algorithm
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_filter_get_config(touch_filter_config_t *filter_info);
+
+/**
+ * @brief enable touch sensor filter for detection algorithm.
+ *        For more details on the detection algorithm, please refer to the application documentation.
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_filter_enable(void);
+
+/**
+ * @brief disable touch sensor filter for detection algorithm.
+ *        For more details on the detection algorithm, please refer to the application documentation.
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_filter_disable(void);
+
+/**
+ * @brief set parameter of denoise pad (TOUCH_PAD_NUM0).
+ *        T0 is an internal channel that does not have a corresponding external GPIO.
+ *        T0 will work simultaneously with the measured channel Tn. Finally, the actual
+ *        measured value of Tn is the value after subtracting lower bits of T0.
+ *        The noise reduction function filters out interference introduced simultaneously on all channels,
+ *        such as noise introduced by power supplies and external EMI.
+ * @param denoise parameter of denoise
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_denoise_set_config(const touch_pad_denoise_t *denoise);
+
+/**
+ * @brief get parameter of denoise pad (TOUCH_PAD_NUM0).
+ * @param denoise Pointer to parameter of denoise
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_denoise_get_config(touch_pad_denoise_t *denoise);
+
+/**
+ * @brief enable denoise function.
+ *        T0 is an internal channel that does not have a corresponding external GPIO.
+ *        T0 will work simultaneously with the measured channel Tn. Finally, the actual
+ *        measured value of Tn is the value after subtracting lower bits of T0.
+ *        The noise reduction function filters out interference introduced simultaneously on all channels,
+ *        such as noise introduced by power supplies and external EMI.
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_denoise_enable(void);
+
+/**
+ * @brief disable denoise function.
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_denoise_disable(void);
+
+/**
+ * @brief Get denoise measure value (TOUCH_PAD_NUM0).
+ * @param data Pointer to receive denoise value
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_denoise_read_data(uint32_t *data);
+
+/**
+ * @brief set parameter of waterproof function.
+ *
+ *        The waterproof function includes a shielded channel (TOUCH_PAD_NUM14) and a guard channel.
+ *        Guard pad is used to detect the large area of water covering the touch panel.
+ *        Shield pad is used to shield the influence of water droplets covering the touch panel.
+ *        It is generally designed as a grid and is placed around the touch buttons.
+ *
+ * @param waterproof parameter of waterproof
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_waterproof_set_config(const touch_pad_waterproof_t *waterproof);
+
+/**
+ * @brief get parameter of waterproof function.
+ * @param waterproof parameter of waterproof
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_waterproof_get_config(touch_pad_waterproof_t *waterproof);
+
+/**
+ * @brief Enable parameter of waterproof function.
+ *        Should be called after function ``touch_pad_waterproof_set_config``.
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_waterproof_enable(void);
+
+/**
+ * @brief Disable parameter of waterproof function.
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_waterproof_disable(void);
+
+/**
+ * @brief Enable/disable proximity function of touch channels.
+ *        The proximity sensor measurement is the accumulation of touch channel measurements.
+ *
+ * @note Supports up to three touch channels configured as proximity sensors.
+ * @param touch_num touch pad index
+ * @param enabled true: enable the proximity function; false:  disable the proximity function
+ * @return
+ *     - ESP_OK: Configured correctly.
+ *     - ESP_ERR_INVALID_ARG: Touch channel number error.
+ *     - ESP_ERR_NOT_SUPPORTED: Don't support configured.
+ */
+esp_err_t touch_pad_proximity_enable(touch_pad_t touch_num, bool enabled);
+
+/**
+ * @brief Set measure count of proximity channel.
+ *        The proximity sensor measurement is the accumulation of touch channel measurements.
+ *
+ * @note All proximity channels use the same `count` value. So please pass the parameter `TOUCH_PAD_MAX`.
+ * @param touch_num Touch pad index. In this version, pass the parameter `TOUCH_PAD_MAX`.
+ * @param count The cumulative times of measurements for proximity pad. Range: 0 ~ 255.
+ * @return
+ *     - ESP_OK: Configured correctly.
+ *     - ESP_ERR_INVALID_ARG: Touch channel number error.
+ */
+esp_err_t touch_pad_proximity_set_count(touch_pad_t touch_num, uint32_t count);
+
+/**
+ * @brief Get measure count of proximity channel.
+ *        The proximity sensor measurement is the accumulation of touch channel measurements.
+ *
+ * @note All proximity channels use the same `count` value. So please pass the parameter `TOUCH_PAD_MAX`.
+ * @param touch_num Touch pad index. In this version, pass the parameter `TOUCH_PAD_MAX`.
+ * @param count The cumulative times of measurements for proximity pad. Range: 0 ~ 255.
+ * @return
+ *     - ESP_OK: Configured correctly.
+ *     - ESP_ERR_INVALID_ARG: Touch channel number error.
+ */
+esp_err_t touch_pad_proximity_get_count(touch_pad_t touch_num, uint32_t *count);
+
+/**
+ * @brief Get the accumulated measurement of the proximity sensor.
+ *        The proximity sensor measurement is the accumulation of touch channel measurements.
+ * @param touch_num touch pad index
+ * @param measure_out If the accumulation process does not end, the `measure_out` is the process value.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Touch num is not proximity
+ */
+esp_err_t touch_pad_proximity_get_data(touch_pad_t touch_num, uint32_t *measure_out);
+
+/**
+ * @brief Get parameter of touch sensor sleep channel.
+ *        The touch sensor can works in sleep mode to wake up sleep.
+ *
+ * @note  After the sleep channel is configured, Please use special functions for sleep channel.
+ *        e.g. The user should uses `touch_pad_sleep_channel_read_data` instead of `touch_pad_read_raw_data` to obtain the sleep channel reading.
+ *
+ * @param slp_config touch sleep pad config.
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_sleep_channel_get_info(touch_pad_sleep_channel_t *slp_config);
+
+/**
+ * @brief Enable/Disable sleep channel function for touch sensor.
+ *        The touch sensor can works in sleep mode to wake up sleep.
+ *
+ * @note  ESP32S2 only support one sleep channel.
+ * @note  After the sleep channel is configured, Please use special functions for sleep channel.
+ *        e.g. The user should uses `touch_pad_sleep_channel_read_data` instead of `touch_pad_read_raw_data` to obtain the sleep channel reading.
+ *
+ * @param pad_num Set touch channel number for sleep pad. Only one touch sensor channel is supported in deep sleep mode.
+ * @param enable true: enable sleep pad for touch sensor; false: disable sleep pad for touch sensor;
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_sleep_channel_enable(touch_pad_t pad_num, bool enable);
+
+/**
+ * @brief Enable/Disable proximity function for sleep channel.
+ *        The touch sensor can works in sleep mode to wake up sleep.
+ *
+ * @note  ESP32S2 only support one sleep channel.
+ *
+ * @param pad_num Set touch channel number for sleep pad. Only one touch sensor channel is supported in deep sleep mode.
+ * @param enable true: enable proximity for sleep channel; false: disable proximity for sleep channel;
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_sleep_channel_enable_proximity(touch_pad_t pad_num, bool enable);
+
+/**
+ * @brief Set the trigger threshold of touch sensor in deep sleep.
+ *        The threshold determines the sensitivity of the touch sensor.
+ *
+ * @note  In general, the touch threshold during sleep can use the threshold parameter parameters before sleep.
+ *
+ * @param pad_num Set touch channel number for sleep pad. Only one touch sensor channel is supported in deep sleep mode.
+ * @param touch_thres touch sleep pad threshold
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_sleep_set_threshold(touch_pad_t pad_num, uint32_t touch_thres);
+
+/**
+ * @brief Get the trigger threshold of touch sensor in deep sleep.
+ *        The threshold determines the sensitivity of the touch sensor.
+ *
+ * @note In general, the touch threshold during sleep can use the threshold parameter parameters before sleep.
+ *
+ * @param pad_num Set touch channel number for sleep pad. Only one touch sensor channel is supported in deep sleep mode.
+ * @param touch_thres touch sleep pad threshold
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_sleep_get_threshold(touch_pad_t pad_num, uint32_t *touch_thres);
+
+/**
+ * @brief Read benchmark of touch sensor sleep channel.
+ * @param pad_num Set touch channel number for sleep pad. Only one touch sensor channel is supported in deep sleep mode.
+ * @param benchmark pointer to accept touch sensor benchmark value
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG parameter is NULL
+ */
+esp_err_t touch_pad_sleep_channel_read_benchmark(touch_pad_t pad_num, uint32_t *benchmark);
+
+/**
+ * @brief Read smoothed data of touch sensor sleep channel.
+ *        Smoothed data is filtered from the raw data.
+ * @param pad_num Set touch channel number for sleep pad. Only one touch sensor channel is supported in deep sleep mode.
+ * @param smooth_data pointer to accept touch sensor smoothed data
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG parameter is NULL
+ */
+esp_err_t touch_pad_sleep_channel_read_smooth(touch_pad_t pad_num, uint32_t *smooth_data);
+
+/**
+ * @brief Read raw data of touch sensor sleep channel.
+ * @param pad_num Set touch channel number for sleep pad. Only one touch sensor channel is supported in deep sleep mode.
+ * @param raw_data pointer to accept touch sensor raw data
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG parameter is NULL
+ */
+esp_err_t touch_pad_sleep_channel_read_data(touch_pad_t pad_num, uint32_t *raw_data);
+
+/**
+ * @brief Reset benchmark of touch sensor sleep channel.
+ *
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_sleep_channel_reset_benchmark(void);
+
+/**
+ * @brief Read proximity count of touch sensor sleep channel.
+ * @param pad_num Set touch channel number for sleep pad. Only one touch sensor channel is supported in deep sleep mode.
+ * @param proximity_cnt pointer to accept touch sensor proximity count value
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG parameter is NULL
+ */
+esp_err_t touch_pad_sleep_channel_read_proximity_cnt(touch_pad_t pad_num, uint32_t *proximity_cnt);
+
+/**
+ * @brief Change the operating frequency of touch pad in deep sleep state. Reducing the operating frequency can effectively reduce power consumption.
+ *        If this function is not called, the working frequency of touch in the deep sleep state is the same as that in the wake-up state.
+ *
+ * @param sleep_cycle The touch sensor will sleep after each measurement.
+ *                    sleep_cycle decide the interval between each measurement.
+ *                    t_sleep = sleep_cycle / (RTC_SLOW_CLK frequency).
+ *                    The approximate frequency value of RTC_SLOW_CLK can be obtained using rtc_clk_slow_freq_get_hz function.
+ * @param meas_times The times of charge and discharge in each measure process of touch channels.
+ *                  The timer frequency is 8Mhz. Range: 0 ~ 0xffff.
+ *                  Recommended typical value: Modify this value to make the measurement time around 1ms.
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t touch_pad_sleep_channel_set_work_time(uint16_t sleep_cycle, uint16_t meas_times);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/adc.h b/tools/sdk/esp32s3/include/driver/include/driver/adc.h
new file mode 100644
index 00000000000..5cd19dacd7d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/adc.h
@@ -0,0 +1,646 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "sdkconfig.h"
+#include "driver/gpio.h"
+#include "hal/adc_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO36 */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO37 */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO38 */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO39 */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO32 */
+    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO33 */
+    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO34 */
+    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO35 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO1  */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO2  */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO3  */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO4  */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO5  */
+    ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO6  */
+    ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO7  */
+    ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO8  */
+    ADC1_CHANNEL_8,     /*!< ADC1 channel 8 is GPIO9  */
+    ADC1_CHANNEL_9,     /*!< ADC1 channel 9 is GPIO10 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */
+    ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO1 */
+    ADC1_CHANNEL_2,     /*!< ADC1 channel 2 is GPIO2 */
+    ADC1_CHANNEL_3,     /*!< ADC1 channel 3 is GPIO3 */
+    ADC1_CHANNEL_4,     /*!< ADC1 channel 4 is GPIO4 */
+    ADC1_CHANNEL_MAX,
+} adc1_channel_t;
+#endif // CONFIG_IDF_TARGET_*
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
+/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO4  (ESP32), GPIO11 (ESP32-S2) */
+    ADC2_CHANNEL_1,     /*!< ADC2 channel 1 is GPIO0  (ESP32), GPIO12 (ESP32-S2) */
+    ADC2_CHANNEL_2,     /*!< ADC2 channel 2 is GPIO2  (ESP32), GPIO13 (ESP32-S2) */
+    ADC2_CHANNEL_3,     /*!< ADC2 channel 3 is GPIO15 (ESP32), GPIO14 (ESP32-S2) */
+    ADC2_CHANNEL_4,     /*!< ADC2 channel 4 is GPIO13 (ESP32), GPIO15 (ESP32-S2) */
+    ADC2_CHANNEL_5,     /*!< ADC2 channel 5 is GPIO12 (ESP32), GPIO16 (ESP32-S2) */
+    ADC2_CHANNEL_6,     /*!< ADC2 channel 6 is GPIO14 (ESP32), GPIO17 (ESP32-S2) */
+    ADC2_CHANNEL_7,     /*!< ADC2 channel 7 is GPIO27 (ESP32), GPIO18 (ESP32-S2) */
+    ADC2_CHANNEL_8,     /*!< ADC2 channel 8 is GPIO25 (ESP32), GPIO19 (ESP32-S2) */
+    ADC2_CHANNEL_9,     /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */
+    ADC2_CHANNEL_MAX,
+} adc2_channel_t;
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
+typedef enum {
+    ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */
+    ADC2_CHANNEL_MAX,
+} adc2_channel_t;
+#endif
+
+
+/**
+ * @brief ADC rtc controller attenuation option.
+ *
+ * @note  This definitions are only for being back-compatible
+ */
+#define ADC_ATTEN_0db   ADC_ATTEN_DB_0
+#define ADC_ATTEN_2_5db ADC_ATTEN_DB_2_5
+#define ADC_ATTEN_6db   ADC_ATTEN_DB_6
+#define ADC_ATTEN_11db  ADC_ATTEN_DB_11
+
+/**
+ * The default (max) bit width of the ADC of current version. You can also get the maximum bitwidth
+ * by `SOC_ADC_MAX_BITWIDTH` defined in soc_caps.h.
+ */
+#define ADC_WIDTH_BIT_DEFAULT   (ADC_WIDTH_MAX-1)
+
+//this definitions are only for being back-compatible
+#define ADC_WIDTH_9Bit  ADC_WIDTH_BIT_9
+#define ADC_WIDTH_10Bit ADC_WIDTH_BIT_10
+#define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
+#define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
+
+/**
+ * @brief ADC digital controller encode option.
+ *
+ * @deprecated The ESP32-S2 doesn't use I2S DMA. Call ``adc_digi_output_format_t`` instead.
+ */
+typedef enum {
+    ADC_ENCODE_12BIT,        /*!< ADC to DMA data format,          , [15:12]-channel [11:0]-12 bits ADC data */
+    ADC_ENCODE_11BIT,        /*!< ADC to DMA data format, [15]-unit, [14:11]-channel [10:0]-11 bits ADC data */
+    ADC_ENCODE_MAX,
+} adc_i2s_encode_t;
+
+/*---------------------------------------------------------------
+                    Common setting
+---------------------------------------------------------------*/
+
+/**
+ * @brief Enable ADC power
+ * @deprecated Use adc_power_acquire and adc_power_release instead.
+ */
+void adc_power_on(void) __attribute__((deprecated));
+
+/**
+ * @brief Power off SAR ADC
+ * @deprecated Use adc_power_acquire and adc_power_release instead.
+ * This function will force power down for ADC.
+ * This function is deprecated because forcing power ADC power off may
+ * disrupt operation of other components which may be using the ADC.
+ */
+void adc_power_off(void) __attribute__((deprecated));
+
+/**
+ * @brief Increment the usage counter for ADC module.
+ * ADC will stay powered on while the counter is greater than 0.
+ * Call adc_power_release when done using the ADC.
+ */
+void adc_power_acquire(void);
+
+/**
+ * @brief Decrement the usage counter for ADC module.
+ * ADC will stay powered on while the counter is greater than 0.
+ * Call this function when done using the ADC.
+ */
+void adc_power_release(void);
+
+/*---------------------------------------------------------------
+                    ADC Single Read Setting
+---------------------------------------------------------------*/
+/**
+ * @brief Get the GPIO number of a specific ADC1 channel.
+ *
+ * @param channel Channel to get the GPIO number
+ * @param gpio_num output buffer to hold the GPIO number
+ *
+ * @return
+ *   - ESP_OK if success
+ *   - ESP_ERR_INVALID_ARG if channel not valid
+ */
+esp_err_t adc1_pad_get_io_num(adc1_channel_t channel, gpio_num_t *gpio_num);
+
+/**
+ * @brief Set the attenuation of a particular channel on ADC1, and configure its associated GPIO pin mux.
+ *
+ * The default ADC voltage is for attenuation 0 dB and listed in the table below.
+ * By setting higher attenuation it is possible to read higher voltages.
+ *
+ * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
+ * shown in the following table.
+ *
+ *     +----------+-------------+-----------------+
+ *     |          | attenuation | suggested range |
+ *     |    SoC   |     (dB)    |      (mV)       |
+ *     +==========+=============+=================+
+ *     |          |       0     |    100 ~  950   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |    100 ~ 1250   |
+ *     |   ESP32  +-------------+-----------------+
+ *     |          |       6     |    150 ~ 1750   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |    150 ~ 2450   |
+ *     +----------+-------------+-----------------+
+ *     |          |       0     |      0 ~  750   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |      0 ~ 1050   |
+ *     | ESP32-S2 +-------------+-----------------+
+ *     |          |       6     |      0 ~ 1300   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |      0 ~ 2500   |
+ *     +----------+-------------+-----------------+
+ *
+ * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
+ *
+ * @note For any given channel, this function must be called before the first time ``adc1_get_raw()`` is called for that channel.
+ *
+ * @note This function can be called multiple times to configure multiple
+ *       ADC channels simultaneously. You may call ``adc1_get_raw()`` only after configuring a channel.
+ *
+ * @param channel ADC1 channel to configure
+ * @param atten  Attenuation level
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc1_config_channel_atten(adc1_channel_t channel, adc_atten_t atten);
+
+/**
+ * @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1.
+ *        The configuration is for all channels of ADC1
+ * @param width_bit Bit capture width for ADC1
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc1_config_width(adc_bits_width_t width_bit);
+
+/**
+ * @brief Take an ADC1 reading from a single channel.
+ * @note ESP32:
+ *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
+ *       but will remove the glitches on GPIO36 and GPIO39.
+ *
+ * @note Call ``adc1_config_width()`` before the first time this
+ *       function is called.
+ *
+ * @note For any given channel, adc1_config_channel_atten(channel)
+ *       must be called before the first time this function is called. Configuring
+ *       a new channel does not prevent a previously configured channel from being read.
+ *
+ * @param  channel ADC1 channel to read
+ *
+ * @return
+ *     - -1: Parameter error
+ *     -  Other: ADC1 channel reading.
+ */
+int adc1_get_raw(adc1_channel_t channel);
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+//TODO IDF-3610, replace these with proper caps
+/**
+ * @brief Set ADC data invert
+ * @param adc_unit ADC unit index
+ * @param inv_en whether enable data invert
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_set_data_inv(adc_unit_t adc_unit, bool inv_en);
+
+/**
+ * @brief Set ADC source clock
+ * @param clk_div ADC clock divider, ADC clock is divided from APB clock
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t adc_set_clk_div(uint8_t clk_div);
+
+/**
+ * @brief Configure ADC capture width.
+ *
+ * @param adc_unit ADC unit index
+ * @param width_bit Bit capture width for ADC unit.
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
+
+/**
+ * @brief Configure ADC1 to be usable by the ULP
+ *
+ * This function reconfigures ADC1 to be controlled by the ULP.
+ * Effect of this function can be reverted using ``adc1_get_raw()`` function.
+ *
+ * Note that adc1_config_channel_atten, ``adc1_config_width()`` functions need
+ * to be called to configure ADC1 channels, before ADC1 is used by the ULP.
+ */
+void adc1_ulp_enable(void);
+#endif  //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+
+/**
+ * @brief Get the GPIO number of a specific ADC2 channel.
+ *
+ * @param channel Channel to get the GPIO number
+ *
+ * @param gpio_num output buffer to hold the GPIO number
+ *
+ * @return
+ *   - ESP_OK if success
+ *   - ESP_ERR_INVALID_ARG if channel not valid
+ */
+esp_err_t adc2_pad_get_io_num(adc2_channel_t channel, gpio_num_t *gpio_num);
+
+/**
+ * @brief Configure the ADC2 channel, including setting attenuation.
+ *
+ * The default ADC voltage is for attenuation 0 dB and listed in the table below.
+ * By setting higher attenuation it is possible to read higher voltages.
+ *
+ * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
+ * shown in the following table.
+ *
+ *     +----------+-------------+-----------------+
+ *     |          | attenuation | suggested range |
+ *     |    SoC   |     (dB)    |      (mV)       |
+ *     +==========+=============+=================+
+ *     |          |       0     |    100 ~  950   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |    100 ~ 1250   |
+ *     |   ESP32  +-------------+-----------------+
+ *     |          |       6     |    150 ~ 1750   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |    150 ~ 2450   |
+ *     +----------+-------------+-----------------+
+ *     |          |       0     |      0 ~  750   |
+ *     |          +-------------+-----------------+
+ *     |          |       2.5   |      0 ~ 1050   |
+ *     | ESP32-S2 +-------------+-----------------+
+ *     |          |       6     |      0 ~ 1300   |
+ *     |          +-------------+-----------------+
+ *     |          |      11     |      0 ~ 2500   |
+ *     +----------+-------------+-----------------+
+ *
+ * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
+ *
+ * @note This function also configures the input GPIO pin mux to
+ *       connect it to the ADC2 channel. It must be called before calling
+ *       ``adc2_get_raw()`` for this channel.
+ *
+ * @note For any given channel, this function must be called before the first time ``adc2_get_raw()`` is called for that channel.
+ *
+ * @param channel ADC2 channel to configure
+ * @param atten  Attenuation level
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten);
+
+/**
+ * @brief Take an ADC2 reading on a single channel
+ *
+ * @note ESP32:
+ *       When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
+ *       but will remove the glitches on GPIO36 and GPIO39.
+ *
+ *
+ * @note ESP32:
+ *       For a given channel, ``adc2_config_channel_atten()``
+ *       must be called before the first time this function is called. If Wi-Fi is started via ``esp_wifi_start()``, this
+ *       function will always fail with ``ESP_ERR_TIMEOUT``.
+ *
+ * @note ESP32-S2:
+ *       ADC2 support hardware arbiter. The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
+ *       the low priority controller will read the invalid ADC2 data. Default priority: Wi-Fi > RTC > Digital;
+ *
+ * @param channel ADC2 channel to read
+ * @param width_bit Bit capture width for ADC2
+ * @param raw_out the variable to hold the output data.
+ *
+ * @return
+ *     - ESP_OK if success
+ *     - ESP_ERR_TIMEOUT ADC2 is being used by other controller and the request timed out.
+ *     - ESP_ERR_INVALID_STATE The controller status is invalid. Please try again.
+ */
+esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *raw_out);
+
+/**
+ *  @brief Output ADC1 or ADC2's reference voltage to ``adc2_channe_t``'s IO.
+ *
+ *  This function routes the internal reference voltage of ADCn to one of
+ *  ADC2's channels. This reference voltage can then be manually measured
+ *  for calibration purposes.
+ *
+ *  @note  ESP32 only supports output of ADC2's internal reference voltage.
+ *  @param[in]  adc_unit ADC unit index
+ *  @param[in]  gpio     GPIO number (Only ADC2's channels IO are supported)
+ *
+ *  @return
+ *                  - ESP_OK: v_ref successfully routed to selected GPIO
+ *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
+ */
+esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio);
+
+/**
+ *  @brief Output ADC2 reference voltage to ``adc2_channe_t``'s IO.
+ *
+ *  This function routes the internal reference voltage of ADCn to one of
+ *  ADC2's channels. This reference voltage can then be manually measured
+ *  for calibration purposes.
+ *
+ *  @deprecated Use ``adc_vref_to_gpio`` instead.
+ *
+ *  @param[in]  gpio    GPIO number (ADC2's channels are supported)
+ *
+ *  @return
+ *                  - ESP_OK: v_ref successfully routed to selected GPIO
+ *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
+ */
+esp_err_t adc2_vref_to_gpio(gpio_num_t gpio) __attribute__((deprecated));
+
+/*---------------------------------------------------------------
+                    DMA setting
+---------------------------------------------------------------*/
+/**
+ * @brief Digital ADC DMA read max timeout value, it may make the ``adc_digi_read_bytes`` block forever if the OS supports
+ */
+#define ADC_MAX_DELAY UINT32_MAX
+
+/**
+ * @brief ADC DMA driver configuration
+ */
+typedef struct adc_digi_init_config_s {
+    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed.
+    uint32_t conv_num_each_intr;    ///< Bytes of data that can be converted in 1 interrupt.
+    uint32_t adc1_chan_mask;        ///< Channel list of ADC1 to be initialized.
+    uint32_t adc2_chan_mask;        ///< Channel list of ADC2 to be initialized.
+} adc_digi_init_config_t;
+
+/**
+ * @brief ADC digital controller settings
+ */
+typedef struct {
+    bool conv_limit_en;                      ///< To limit ADC conversion times. Conversion stops after finishing `conv_limit_num` times conversion
+    uint32_t conv_limit_num;                 ///< Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255.
+    uint32_t pattern_num;                    ///< Number of ADC channels that will be used
+    adc_digi_pattern_config_t *adc_pattern;    ///< List of configs for each ADC channel that will be used
+    uint32_t sample_freq_hz;  /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
+                                   Fs = Fd / interval / 2
+                                   Fs: sampling frequency;
+                                   Fd: digital controller frequency, no larger than 5M for better performance
+                                   interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
+    adc_digi_convert_mode_t conv_mode;      ///< ADC DMA conversion mode, see `adc_digi_convert_mode_t`.
+    adc_digi_output_format_t format;        ///< ADC DMA conversion output format, see `adc_digi_output_format_t`.
+} adc_digi_configuration_t;
+
+/**
+ * @brief Initialize the Digital ADC.
+ *
+ * @param init_config Pointer to Digital ADC initilization config. Refer to ``adc_digi_init_config_t``.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *         - ESP_ERR_NOT_FOUND     No free interrupt found with the specified flags
+ *         - ESP_ERR_NO_MEM        If out of memory
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config);
+
+/**
+ * @brief Read bytes from Digital ADC through DMA.
+ *
+ * @param[out] buf                 Buffer to read from ADC.
+ * @param[in]  length_max          Expected length of data read from the ADC.
+ * @param[out] out_length          Real length of data read from the ADC via this API.
+ * @param[in]  timeout_ms          Time to wait for data via this API, in millisecond.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid. Usually it means the ADC sampling rate is faster than the task processing rate.
+ *         - ESP_ERR_TIMEOUT       Operation timed out
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_read_bytes(uint8_t *buf, uint32_t length_max, uint32_t *out_length, uint32_t timeout_ms);
+
+/**
+ * @brief Start the Digital ADC and DMA peripherals. After this, the hardware starts working.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_start(void);
+
+/**
+ * @brief Stop the Digital ADC and DMA peripherals. After this, the hardware stops working.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_stop(void);
+
+/**
+ * @brief Deinitialize the Digital ADC.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *         - ESP_OK                On success
+ */
+esp_err_t adc_digi_deinitialize(void);
+
+/**
+ * @brief Setting the digital controller.
+ *
+ * @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
+ *
+ * @return
+ *      - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *      - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *      - ESP_OK                On success
+ */
+esp_err_t adc_digi_controller_configure(const adc_digi_configuration_t *config);
+
+
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+//TODO IDF-3610
+/**
+ * @brief Reset adc digital controller filter.
+ *
+ * @param idx Filter index.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_reset(adc_digi_filter_idx_t idx);
+
+/**
+ * @brief Set adc digital controller filter configuration.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param config See ``adc_digi_filter_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_set_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
+
+/**
+ * @brief Get adc digital controller filter configuration.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param config See ``adc_digi_filter_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_get_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config);
+
+/**
+ * @brief Enable/disable adc digital controller filter.
+ *        Filtering the ADC data to obtain smooth data at higher sampling rates.
+ *
+ * @note For ESP32S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time.
+ *
+ * @param idx Filter index.
+ * @param enable Enable/Disable filter.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_filter_enable(adc_digi_filter_idx_t idx, bool enable);
+
+/**
+ * @brief Config monitor of adc digital controller.
+ *
+ * @note For ESP32S2, The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
+ *
+ * @param idx Monitor index.
+ * @param config See ``adc_digi_monitor_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_monitor_set_config(adc_digi_monitor_idx_t idx, adc_digi_monitor_t *config);
+
+/**
+ * @brief Enable/disable monitor of adc digital controller.
+ *
+ * @note For ESP32S2, The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
+ *
+ * @param idx Monitor index.
+ * @param enable True or false enable monitor.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_monitor_enable(adc_digi_monitor_idx_t idx, bool enable);
+#endif  //#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+
+#if CONFIG_IDF_TARGET_ESP32
+//TODO IDF-3610
+/**
+ * @brief Read Hall Sensor
+ *
+ * @note When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
+ *       the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
+ *       When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *
+ * @note The Hall Sensor uses channels 0 and 3 of ADC1. Do not configure
+ * these channels for use as ADC channels.
+ *
+ * @note The ADC1 module must be enabled by calling
+ *       adc1_config_width() before calling hall_sensor_read(). ADC1
+ *       should be configured for 12 bit readings, as the hall sensor
+ *       readings are low values and do not cover the full range of the
+ *       ADC.
+ *
+ * @return The hall sensor reading.
+ */
+int hall_sensor_read(void);
+
+/*---------------------------------------------------------------
+                    To Be Deprecated TODO: IDF-3610
+---------------------------------------------------------------*/
+/**
+ * @brief Set I2S data source
+ * @param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC.
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src);
+
+/**
+ * @brief Initialize I2S ADC mode
+ * @param adc_unit ADC unit index
+ * @param channel ADC channel index
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/adc2_wifi_private.h b/tools/sdk/esp32s3/include/driver/include/driver/adc2_wifi_private.h
new file mode 100644
index 00000000000..f8b355196bf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/adc2_wifi_private.h
@@ -0,0 +1,56 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "esp_err.h"
+
+/**
+ * @brief For WIFI module to claim the usage of ADC2.
+ *
+ * Other tasks will be forbidden to use ADC2 between ``adc2_wifi_acquire`` and ``adc2_wifi_release``.
+ * The WIFI module may have to wait for a short time for the current conversion (if exist) to finish.
+ *
+ * @return
+ *      - ESP_OK success
+ *      - ESP_ERR_TIMEOUT reserved for future use. Currently the function will wait until success.
+ */
+esp_err_t adc2_wifi_acquire(void);
+
+
+/**
+ * @brief For WIFI module to let other tasks use the ADC2 when WIFI is not work.
+ *
+ * Other tasks will be forbidden to use ADC2 between ``adc2_wifi_acquire`` and ``adc2_wifi_release``.
+ * Call this function to release the occupation of ADC2 by WIFI.
+ *
+ * @return always return ESP_OK.
+ */
+esp_err_t adc2_wifi_release(void);
+
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+/**
+ * @brief This API help ADC2 calibration constructor be linked.
+ *
+ * @note  This is a private function, Don't call `adc2_cal_include` in user code.
+ */
+void adc2_cal_include(void);
+#else
+/**
+ * @brief There's no calibration involved on this chip.
+ *
+ * @note  This is a private function, Don't call `adc2_cal_include` in user code.
+ */
+#define adc2_cal_include()
+#endif //CONFIG_IDF_TARGET_*
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/adc_common.h b/tools/sdk/esp32s3/include/driver/include/driver/adc_common.h
new file mode 100644
index 00000000000..e081f28d154
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/adc_common.h
@@ -0,0 +1,11 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * This file is only a wrapper for `driver/adc.h` for back-compatability.
+ */
+
+#include "adc.h"
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/adc_deprecated.h b/tools/sdk/esp32s3/include/driver/include/driver/adc_deprecated.h
new file mode 100644
index 00000000000..bdd0547c06a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/adc_deprecated.h
@@ -0,0 +1,163 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*----------------------------------------------------------------------------------
+              This file contains Deprecated ADC APIs
+-----------------------------------------------------------------------------------*/
+
+#pragma once
+#include "esp_err.h"
+#include "hal/adc_types.h"
+#include "driver/adc_types_deprecated.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#if CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+                    ESP32S2 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief Config ADC module arbiter.
+ *        The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
+ *        the low priority controller will read the invalid ADC2 data, and the validity of the data can be judged by the flag bit in the data.
+ *
+ * @note Only ADC2 support arbiter.
+ * @note Default priority: Wi-Fi > RTC > Digital;
+ * @note In normal use, there is no need to call this interface to config arbiter.
+ *
+ * @param adc_unit ADC unit.
+ * @param config Refer to `adc_arbiter_t`.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - ESP_ERR_NOT_SUPPORTED ADC unit not support arbiter.
+ */
+esp_err_t adc_arbiter_config(adc_unit_t adc_unit, adc_arbiter_t *config) __attribute__((deprecated));
+
+/**
+ * @brief Enable interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_enable(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Disable interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_disable(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Clear interrupt of adc digital controller by bitmask.
+ *
+ * @param adc_unit ADC unit.
+ * @param intr_mask Interrupt bitmask. See ``adc_digi_intr_t``.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_intr_clear(adc_unit_t adc_unit, adc_digi_intr_t intr_mask) __attribute__((deprecated));
+
+/**
+ * @brief Get interrupt status mask of adc digital controller.
+ *
+ * @param adc_unit ADC unit.
+ * @return
+ *     - intr Interrupt bitmask, See ``adc_digi_intr_t``.
+ */
+uint32_t adc_digi_intr_get_status(adc_unit_t adc_unit) __attribute__((deprecated));
+
+/**
+ * @brief Register ADC interrupt handler, the handler is an ISR.
+ *        The handler will be attached to the same CPU core that this function is running on.
+ *
+ * @param fn Interrupt handler function.
+ * @param arg Parameter for handler function
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_NOT_FOUND Can not find the interrupt that matches the flags.
+ *     - ESP_ERR_INVALID_ARG Function pointer error.
+ */
+esp_err_t adc_digi_isr_register(void (*fn)(void *), void *arg, int intr_alloc_flags) __attribute__((deprecated));
+
+/**
+ * @brief Deregister ADC interrupt handler, the handler is an ISR.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG hander error.
+ *     - ESP_FAIL ISR not be registered.
+ */
+esp_err_t adc_digi_isr_deregister(void) __attribute__((deprecated));
+#endif  // #if CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+            ESP32, ESP32S2 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller initialization.
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_init(void) __attribute__((deprecated));
+
+/**
+ * @brief ADC digital controller deinitialization.
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_deinit(void) __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+/*---------------------------------------------------------------
+            ESP32, ESP32S2, ESP32C3 Deprecated ADC APIs
+---------------------------------------------------------------*/
+/**
+ * @brief Setting the digital controller.
+ *
+ * @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
+ *
+ * @return
+ *      - ESP_ERR_INVALID_STATE Driver state is invalid.
+ *      - ESP_ERR_INVALID_ARG   If the combination of arguments is invalid.
+ *      - ESP_OK                On success
+ */
+esp_err_t adc_digi_controller_config(const adc_digi_config_t *config) __attribute__((deprecated));
+
+/**
+ * @brief Initialize ADC pad
+ * @param adc_unit ADC unit index
+ * @param channel ADC channel index
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel) __attribute__((deprecated));;
+#endif //#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/adc_types_deprecated.h b/tools/sdk/esp32s3/include/driver/include/driver/adc_types_deprecated.h
new file mode 100644
index 00000000000..5d0e0dc2327
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/adc_types_deprecated.h
@@ -0,0 +1,203 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_err.h"
+#include "hal/adc_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+/*---------------------------------------------------------------
+                    ESP32 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t bit_width: 2;   /*!< ADC resolution.
+-                                         0: 9 bit;
+-                                         1: 10 bit;
+-                                         2: 11 bit;
+-                                         3: 12 bit. */
+            int8_t channel:   4;   /*!< ADC channel index. */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+/**
+  * Explanation of the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA outputs:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     +---------------------+--------+--------+--------+
+  *     | trigger meas times  |    1   |    1   |    1   |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_limit_num      |   +1   |   +1   |   +1   |
+  *     | dma_eof_num         |   +1   |   +2   |   +1   |
+  *     | dma output (byte)   |   +2   |   +4   |   +2   |
+  *     +---------------------+--------+--------+--------+
+  */
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc1_pattern_len;               /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    uint32_t adc2_pattern_len;               /*!<Refer to ``adc1_pattern_len`` */
+    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
+    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to `adc1_pattern` */
+    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
+    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
+} adc_digi_config_t __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32
+
+
+#if CONFIG_IDF_TARGET_ESP32S2
+/*---------------------------------------------------------------
+                    ESP32S2 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t reserved:  2;   /*!< reserved0 */
+            uint8_t channel:   4;   /*!< ADC channel index. */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+/**
+  * @brief ADC digital controller (DMA mode) configuration parameters.
+  *
+  * Example setting: When using ADC1 channel0 to measure voltage, the sampling rate is required to be 1 kHz:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | sample rate         | 1 kHz  | 1 kHz  | 1 kHz  |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     | adc1_pattern_len    |    1   |    1   |    1   |
+  *     | dig_clk.use_apll    |    0   |    0   |    0   |
+  *     | dig_clk.div_num     |   99   |   99   |   99   |
+  *     | dig_clk.div_b       |    0   |    0   |    0   |
+  *     | dig_clk.div_a       |    0   |    0   |    0   |
+  *     | interval            |  400   |  400   |  200   |
+  *     +---------------------+--------+--------+--------+
+  *     | `trigger_meas_freq` | 1 kHz  | 1 kHz  | 2 kHz  |
+  *     +---------------------+--------+--------+--------+
+  *
+  * Explanation of the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA outputs:
+  *
+  *     +---------------------+--------+--------+--------+
+  *     | conv_mode           | single |  both  |  alter |
+  *     +---------------------+--------+--------+--------+
+  *     | trigger meas times  |    1   |    1   |    1   |
+  *     +---------------------+--------+--------+--------+
+  *     | conv_limit_num      |   +1   |   +1   |   +1   |
+  *     | dma_eof_num         |   +1   |   +2   |   +1   |
+  *     | dma output (byte)   |   +2   |   +4   |   +2   |
+  *     +---------------------+--------+--------+--------+
+  */
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc1_pattern_len;               /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    uint32_t adc2_pattern_len;               /*!<Refer to ``adc1_pattern_len`` */
+    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
+    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to `adc1_pattern` */
+    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
+    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
+    uint32_t interval;                       /*!<The number of interval clock cycles for the digital controller to trigger the measurement.
+                                                 The unit is the divided clock. Range: 40 ~ 4095.
+                                                 Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval. Refer to ``adc_digi_clk_t``.
+                                                 Note: The sampling rate of each channel is also related to the conversion mode (See ``adc_digi_convert_mode_t``) and pattern table settings. */
+    adc_digi_clk_t dig_clk;                  /*!<ADC digital controller clock divider settings. Refer to ``adc_digi_clk_t``.
+                                                 Note: The clocks of the DAC digital controller use the ADC digital controller clock divider. */
+    uint32_t dma_eof_num;                    /*!<DMA eof num of adc digital controller.
+                                                 If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated in DMA.
+                                                 Note: The converted data in the DMA in link buffer will be multiple of two bytes. */
+} adc_digi_config_t __attribute__((deprecated));
+
+/**
+ * @brief ADC digital controller (DMA mode) interrupt type options.
+ */
+typedef enum {
+    ADC_DIGI_INTR_MASK_MONITOR = 0x1,
+    ADC_DIGI_INTR_MASK_MEAS_DONE = 0x2,
+    ADC_DIGI_INTR_MASK_ALL = 0x3,
+} adc_digi_intr_t __attribute__((deprecated));
+FLAG_ATTR(adc_digi_intr_t)
+#endif  //#if CONFIG_IDF_TARGET_ESP32S2
+
+
+#if CONFIG_IDF_TARGET_ESP32C3
+/*---------------------------------------------------------------
+                    ESP32C3 Deprecated Types
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration. Modification of attenuation affects the range of measurements.
+                                         0: measurement range 0 - 800mV,
+                                         1: measurement range 0 - 1100mV,
+                                         2: measurement range 0 - 1350mV,
+                                         3: measurement range 0 - 2600mV. */
+            uint8_t channel:   3;   /*!< ADC channel index. */
+            uint8_t unit:      1;   /*!< ADC unit index. */
+            uint8_t reserved:  2;   /*!< reserved0 */
+        };
+        uint8_t val;                /*!<Raw data value */
+    };
+} adc_digi_pattern_table_t __attribute__((deprecated));
+
+typedef struct {
+    bool conv_limit_en;                      /*!<Enable the function of limiting ADC conversion times.
+                                                 If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;                 /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc_pattern_len;                /*!<Pattern table length for digital controller. Range: 0 ~ 7 (0: Don't change the pattern table setting).
+                                                 The pattern table that defines the conversion rules for each SAR ADC. Each table has 7 items, in which channel selection,
+                                                 resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                                 pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    adc_digi_pattern_table_t *adc_pattern;   /*!<Pointer to pattern table for digital controller. The table size defined by `adc_pattern_len`. */
+    uint32_t sample_freq_hz;  /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
+                                   Fs = Fd / interval / 2
+                                   Fs: sampling frequency;
+                                   Fd: digital controller frequency, no larger than 5M for better performance
+                                   interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
+} adc_digi_config_t __attribute__((deprecated));
+#endif  //#if CONFIG_IDF_TARGET_ESP32C3
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/can.h b/tools/sdk/esp32s3/include/driver/include/driver/can.h
new file mode 100644
index 00000000000..ec4c0e15dfe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/can.h
@@ -0,0 +1,66 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#warning driver/can.h is deprecated, please use driver/twai.h instead
+
+#include "hal/can_types.h"
+#include "driver/twai.h"
+
+/* ---------------------------- Compatibility ------------------------------- */
+
+#define CAN_GENERAL_CONFIG_DEFAULT(tx_io_num, rx_io_num, op_mode)   TWAI_GENERAL_CONFIG_DEFAULT(tx_io_num, rx_io_num, op_mode)
+
+#define CAN_ALERT_TX_IDLE               TWAI_ALERT_TX_IDLE
+#define CAN_ALERT_TX_SUCCESS            TWAI_ALERT_TX_SUCCESS
+#define CAN_ALERT_BELOW_ERR_WARN        TWAI_ALERT_BELOW_ERR_WARN
+#define CAN_ALERT_ERR_ACTIVE            TWAI_ALERT_ERR_ACTIVE
+#define CAN_ALERT_RECOVERY_IN_PROGRESS  TWAI_ALERT_RECOVERY_IN_PROGRESS
+#define CAN_ALERT_BUS_RECOVERED         TWAI_ALERT_BUS_RECOVERED
+#define CAN_ALERT_ARB_LOST              TWAI_ALERT_ARB_LOST
+#define CAN_ALERT_ABOVE_ERR_WARN        TWAI_ALERT_ABOVE_ERR_WARN
+#define CAN_ALERT_BUS_ERROR             TWAI_ALERT_BUS_ERROR
+#define CAN_ALERT_TX_FAILED             TWAI_ALERT_TX_FAILED
+#define CAN_ALERT_RX_QUEUE_FULL         TWAI_ALERT_RX_QUEUE_FULL
+#define CAN_ALERT_ERR_PASS              TWAI_ALERT_ERR_PASS
+#define CAN_ALERT_BUS_OFF               TWAI_ALERT_BUS_OFF
+#define CAN_ALERT_ALL                   TWAI_ALERT_ALL
+#define CAN_ALERT_NONE                  TWAI_ALERT_NONE
+#define CAN_ALERT_AND_LOG               TWAI_ALERT_AND_LOG
+
+#define CAN_IO_UNUSED                   TWAI_IO_UNUSED
+
+#define CAN_STATE_STOPPED               TWAI_STATE_STOPPED
+#define CAN_STATE_RUNNING               TWAI_STATE_RUNNING
+#define CAN_STATE_BUS_OFF               TWAI_STATE_BUS_OFF
+#define CAN_STATE_RECOVERING            TWAI_STATE_RECOVERING
+
+typedef twai_state_t                    can_state_t;
+typedef twai_general_config_t           can_general_config_t;
+typedef twai_status_info_t              can_status_info_t;
+
+
+#define can_driver_install(g_config, t_config, f_config)        twai_driver_install(g_config, t_config, f_config)
+#define can_driver_uninstall()                                  twai_driver_uninstall()
+#define can_start()                                             twai_start()
+#define can_stop()                                              twai_stop()
+#define can_transmit(message, ticks_to_wait)                    twai_transmit(message, ticks_to_wait)
+#define can_receive(message, ticks_to_wait)                     twai_receive(message, ticks_to_wait)
+#define can_read_alerts(alerts, ticks_to_wait)                  twai_read_alerts(alerts, ticks_to_wait)
+#define can_reconfigure_alerts(alerts_enabled, current_alerts)  twai_reconfigure_alerts(alerts_enabled, current_alerts)
+#define can_initiate_recovery()                                 twai_initiate_recovery()
+#define can_get_status_info(status_info)                        twai_get_status_info(status_info)
+#define can_clear_transmit_queue()                              twai_clear_transmit_queue()
+#define can_clear_receive_queue()                               twai_clear_receive_queue()
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/dac_common.h b/tools/sdk/esp32s3/include/driver/include/driver/dac_common.h
new file mode 100644
index 00000000000..f0f2ecadaea
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/dac_common.h
@@ -0,0 +1,90 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include "esp_err.h"
+#include "driver/gpio.h"
+#include "hal/dac_types.h"
+
+/**
+ * @brief Get the GPIO number of a specific DAC channel.
+ *
+ * @param channel Channel to get the gpio number
+ * @param gpio_num output buffer to hold the gpio number
+ * @return
+ *   - ESP_OK if success
+ */
+esp_err_t dac_pad_get_io_num(dac_channel_t channel, gpio_num_t *gpio_num);
+
+/**
+ * @brief Set DAC output voltage.
+ *        DAC output is 8-bit. Maximum (255) corresponds to VDD3P3_RTC.
+ *
+ * @note Need to configure DAC pad before calling this function.
+ *       DAC channel 1 is attached to GPIO25, DAC channel 2 is attached to GPIO26
+ * @param channel DAC channel
+ * @param dac_value DAC output value
+ *
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t dac_output_voltage(dac_channel_t channel, uint8_t dac_value);
+
+/**
+ * @brief DAC pad output enable
+ *
+ * @param channel DAC channel
+ * @note DAC channel 1 is attached to GPIO25, DAC channel 2 is attached to GPIO26
+ *       I2S left channel will be mapped to DAC channel 2
+ *       I2S right channel will be mapped to DAC channel 1
+ */
+esp_err_t dac_output_enable(dac_channel_t channel);
+
+/**
+ * @brief DAC pad output disable
+ *
+ * @param channel DAC channel
+ * @note DAC channel 1 is attached to GPIO25, DAC channel 2 is attached to GPIO26
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t dac_output_disable(dac_channel_t channel);
+
+/**
+ * @brief Enable cosine wave generator output.
+ *
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t dac_cw_generator_enable(void);
+
+/**
+ * @brief Disable cosine wave generator output.
+ *
+ * @return
+ *     - ESP_OK success
+ */
+esp_err_t dac_cw_generator_disable(void);
+
+/**
+ * @brief Config the cosine wave generator function in DAC module.
+ *
+ * @param cw Configuration.
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG The parameter is NULL.
+ */
+esp_err_t dac_cw_generator_config(dac_cw_config_t *cw);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/dedic_gpio.h b/tools/sdk/esp32s3/include/driver/include/driver/dedic_gpio.h
new file mode 100644
index 00000000000..238a270b471
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/dedic_gpio.h
@@ -0,0 +1,169 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_attr.h"
+#include "soc/soc_caps.h"
+
+#if SOC_DEDICATED_GPIO_SUPPORTED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Type of Dedicated GPIO bundle
+ */
+typedef struct dedic_gpio_bundle_t *dedic_gpio_bundle_handle_t;
+
+/**
+ * @brief Type of Dedicated GPIO bundle configuration
+ */
+typedef struct {
+    const int *gpio_array; /*!< Array of GPIO numbers, gpio_array[0] ~ gpio_array[size-1] <=> low_dedic_channel_num ~ high_dedic_channel_num */
+    size_t array_size;     /*!< Number of GPIOs in gpio_array */
+    struct {
+        unsigned int in_en: 1;      /*!< Enable input */
+        unsigned int in_invert: 1;  /*!< Invert input signal */
+        unsigned int out_en: 1;     /*!< Enable output */
+        unsigned int out_invert: 1; /*!< Invert output signal */
+    } flags; /*!< Flags to control specific behaviour of GPIO bundle */
+} dedic_gpio_bundle_config_t;
+
+/**
+ * @brief Create GPIO bundle and return the handle
+ *
+ * @param[in] config Configuration of GPIO bundle
+ * @param[out] ret_bundle Returned handle of the new created GPIO bundle
+ * @return
+ *      - ESP_OK: Create GPIO bundle successfully
+ *      - ESP_ERR_INVALID_ARG: Create GPIO bundle failed because of invalid argument
+ *      - ESP_ERR_NO_MEM: Create GPIO bundle failed because of no capable memory
+ *      - ESP_ERR_NOT_FOUND: Create GPIO bundle failed because of no enough continuous dedicated channels
+ *      - ESP_FAIL: Create GPIO bundle failed because of other error
+ *
+ * @note One has to enable at least input or output mode in "config" parameter.
+ */
+esp_err_t dedic_gpio_new_bundle(const dedic_gpio_bundle_config_t *config, dedic_gpio_bundle_handle_t *ret_bundle);
+
+/**
+ * @brief Destory GPIO bundle
+ *
+ * @param[in] bundle Handle of GPIO bundle that returned from "dedic_gpio_new_bundle"
+ * @return
+ *      - ESP_OK: Destory GPIO bundle successfully
+ *      - ESP_ERR_INVALID_ARG: Destory GPIO bundle failed because of invalid argument
+ *      - ESP_FAIL: Destory GPIO bundle failed because of other error
+ */
+esp_err_t dedic_gpio_del_bundle(dedic_gpio_bundle_handle_t bundle);
+
+/**@{*/
+/**
+ * @brief Get allocated channel mask
+ *
+ * @param[in] bundle Handle of GPIO bundle that returned from "dedic_gpio_new_bundle"
+ * @param[out] mask Returned mask value for on specific direction (in or out)
+ * @return
+ *      - ESP_OK: Get channel mask successfully
+ *      - ESP_ERR_INVALID_ARG: Get channel mask failed because of invalid argument
+ *      - ESP_FAIL: Get channel mask failed because of other error
+ *
+ * @note Each bundle should have at least one mask (in or/and out), based on bundle configuration.
+ * @note With the returned mask, user can directly invoke LL function like "cpu_ll_write_dedic_gpio_mask"
+ *       or write assembly code with dedicated GPIO instructions, to get better performance on GPIO manipulation.
+ */
+esp_err_t dedic_gpio_get_out_mask(dedic_gpio_bundle_handle_t bundle, uint32_t *mask);
+esp_err_t dedic_gpio_get_in_mask(dedic_gpio_bundle_handle_t bundle, uint32_t *mask);
+/**@}*/
+
+/**
+ * @brief Write value to GPIO bundle
+ *
+ * @param[in] bundle Handle of GPIO bundle that returned from "dedic_gpio_new_bundle"
+ * @param[in] mask Mask of the GPIOs to be written in the given bundle
+ * @param[in] value Value to write to given GPIO bundle, low bit represents low member in the bundle
+ *
+ * @note The mask is seen from the view of GPIO bundle.
+ *       For example, bundleA contains [GPIO10, GPIO12, GPIO17], to set GPIO17 individually, the mask should be 0x04.
+ * @note For performance reasons, this function doesn't check the validity of any parameters, and is placed in IRAM.
+ */
+void dedic_gpio_bundle_write(dedic_gpio_bundle_handle_t bundle, uint32_t mask, uint32_t value) IRAM_ATTR;
+
+/**
+ * @brief Read the value that output from the given GPIO bundle
+ *
+ * @param[in] bundle Handle of GPIO bundle that returned from "dedic_gpio_new_bundle"
+ * @return Value that output from the GPIO bundle, low bit represents low member in the bundle
+ *
+ * @note For performance reasons, this function doesn't check the validity of any parameters, and is placed in IRAM.
+ */
+uint32_t dedic_gpio_bundle_read_out(dedic_gpio_bundle_handle_t bundle) IRAM_ATTR;
+
+/**
+ * @brief Read the value that input to the given GPIO bundle
+ *
+ * @param[in] bundle Handle of GPIO bundle that returned from "dedic_gpio_new_bundle"
+ * @return Value that input to the GPIO bundle, low bit represents low member in the bundle
+ *
+ * @note For performance reasons, this function doesn't check the validity of any parameters, and is placed in IRAM.
+ */
+uint32_t dedic_gpio_bundle_read_in(dedic_gpio_bundle_handle_t bundle) IRAM_ATTR;
+
+#if SOC_DEDIC_GPIO_HAS_INTERRUPT
+
+/**
+ * @brief Supported type of dedicated GPIO interrupt
+ */
+typedef enum {
+    DEDIC_GPIO_INTR_NONE,          /*!< No interrupt */
+    DEDIC_GPIO_INTR_LOW_LEVEL = 2, /*!< Interrupt on low level */
+    DEDIC_GPIO_INTR_HIGH_LEVEL,    /*!< Interrupt on high level */
+    DEDIC_GPIO_INTR_NEG_EDGE,      /*!< Interrupt on negedge */
+    DEDIC_GPIO_INTR_POS_EDGE,      /*!< Interrupt on posedge */
+    DEDIC_GPIO_INTR_BOTH_EDGE      /*!< Interrupt on both negedge and posedge */
+} dedic_gpio_intr_type_t;
+
+/**
+ * @brief Type of dedicated GPIO ISR callback function
+ *
+ * @param bundle Handle of GPIO bundle that returned from "dedic_gpio_new_bundle"
+ * @param index Index of the GPIO in its corresponding bundle (count from 0)
+ * @param args User defined arguments for the callback function. It's passed through `dedic_gpio_bundle_set_interrupt_and_callback`
+ * @return If a high priority task is woken up by the callback function
+ */
+typedef bool (*dedic_gpio_isr_callback_t)(dedic_gpio_bundle_handle_t bundle, uint32_t index, void *args);
+
+/**
+ * @brief Set interrupt and callback function for GPIO bundle
+ *
+ * @param[in] bundle Handle of GPIO bundle that returned from "dedic_gpio_new_bundle"
+ * @param[in] mask Mask of the GPIOs in the given bundle
+ * @param[in] intr_type Interrupt type, set to DEDIC_GPIO_INTR_NONE can disable interrupt
+ * @param[in] cb_isr Callback function, which got invoked in ISR context. A NULL pointer here will bypass the callback
+ * @param[in] cb_args User defined argument to be passed to the callback function
+ *
+ * @note This function is only valid for bundle with input mode enabled. See "dedic_gpio_bundle_config_t"
+ * @note The mask is seen from the view of GPIO Bundle.
+ *       For example, bundleA contains [GPIO10, GPIO12, GPIO17], to set GPIO17 individually, the mask should be 0x04.
+ *
+ * @return
+ *      - ESP_OK: Set GPIO interrupt and callback function successfully
+ *      - ESP_ERR_INVALID_ARG: Set GPIO interrupt and callback function failed because of invalid argument
+ *      - ESP_FAIL: Set GPIO interrupt and callback function failed because of other error
+ */
+esp_err_t dedic_gpio_bundle_set_interrupt_and_callback(dedic_gpio_bundle_handle_t bundle, uint32_t mask, dedic_gpio_intr_type_t intr_type, dedic_gpio_isr_callback_t cb_isr, void *cb_args);
+
+#endif // SOC_DEDIC_GPIO_HAS_INTERRUPT
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //SOC_DEDICATED_GPIO_SUPPORTED
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/gpio.h b/tools/sdk/esp32s3/include/driver/include/driver/gpio.h
new file mode 100644
index 00000000000..eeb63f74f8e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/gpio.h
@@ -0,0 +1,533 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+#include "esp_err.h"
+#include <stdbool.h>
+#include "esp_intr_alloc.h"
+#if !CONFIG_IDF_TARGET_LINUX
+#include <esp_types.h>
+#include <esp_bit_defs.h>
+#include "esp_attr.h"
+#include "soc/soc_caps.h"
+#include "soc/gpio_periph.h"
+#endif // !CONFIG_IDF_TARGET_LINUX
+#include "hal/gpio_types.h"
+
+// |================================= WARNING ====================================================== |
+// | Including ROM header file in a PUBLIC API file will be REMOVED in the next major release (5.x). |
+// | User should include "esp_rom_gpio.h" in their code if they have to use those ROM API.           |
+// |================================================================================================ |
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/gpio.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/gpio.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/gpio.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/gpio.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/gpio.h"
+#elif CONFIG_IDF_TARGET_ESP32H2
+#include "esp32h2/rom/gpio.h"
+#endif
+
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
+#include "soc/rtc_io_reg.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define GPIO_PIN_COUNT                      (SOC_GPIO_PIN_COUNT)
+/// Check whether it is a valid GPIO number
+#define GPIO_IS_VALID_GPIO(gpio_num)        (((1ULL << (gpio_num)) & SOC_GPIO_VALID_GPIO_MASK) != 0)
+/// Check whether it can be a valid GPIO number of output mode
+#define GPIO_IS_VALID_OUTPUT_GPIO(gpio_num) (((1ULL << (gpio_num)) & SOC_GPIO_VALID_OUTPUT_GPIO_MASK) != 0)
+
+
+typedef intr_handle_t gpio_isr_handle_t;
+
+/**
+ * @brief GPIO common configuration
+ *
+ *        Configure GPIO's Mode,pull-up,PullDown,IntrType
+ *
+ * @param  pGPIOConfig Pointer to GPIO configure struct
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *
+ */
+esp_err_t gpio_config(const gpio_config_t *pGPIOConfig);
+
+/**
+ * @brief Reset an gpio to default state (select gpio function, enable pullup and disable input and output).
+ *
+ * @param gpio_num GPIO number.
+ *
+ * @note This function also configures the IOMUX for this pin to the GPIO
+ *       function, and disconnects any other peripheral output configured via GPIO
+ *       Matrix.
+ *
+ * @return Always return ESP_OK.
+ */
+esp_err_t gpio_reset_pin(gpio_num_t gpio_num);
+
+/**
+ * @brief  GPIO set interrupt trigger type
+ *
+ * @param  gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param  intr_type Interrupt type, select from gpio_int_type_t
+ *
+ * @return
+ *     - ESP_OK  Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *
+ */
+esp_err_t gpio_set_intr_type(gpio_num_t gpio_num, gpio_int_type_t intr_type);
+
+/**
+ * @brief  Enable GPIO module interrupt signal
+ *
+ * @note Please do not use the interrupt of GPIO36 and GPIO39 when using ADC or Wi-Fi with sleep mode enabled.
+ *       Please refer to the comments of `adc1_get_raw`.
+ *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
+ *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),
+ *       but will remove the glitches on GPIO36 and GPIO39.
+ *
+ * @param  gpio_num GPIO number. If you want to enable an interrupt on e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *
+ */
+esp_err_t gpio_intr_enable(gpio_num_t gpio_num);
+
+/**
+ * @brief  Disable GPIO module interrupt signal
+ *
+ * @param  gpio_num GPIO number. If you want to disable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *
+ */
+esp_err_t gpio_intr_disable(gpio_num_t gpio_num);
+
+/**
+ * @brief  GPIO set output level
+ *
+ * @param  gpio_num GPIO number. If you want to set the output level of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param  level Output level. 0: low ; 1: high
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO number error
+ *
+ */
+esp_err_t gpio_set_level(gpio_num_t gpio_num, uint32_t level);
+
+/**
+ * @brief  GPIO get input level
+ *
+ * @warning If the pad is not configured for input (or input and output) the returned value is always 0.
+ *
+ * @param  gpio_num GPIO number. If you want to get the logic level of e.g. pin GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ *
+ * @return
+ *     - 0 the GPIO input level is 0
+ *     - 1 the GPIO input level is 1
+ *
+ */
+int gpio_get_level(gpio_num_t gpio_num);
+
+/**
+ * @brief	 GPIO set direction
+ *
+ * Configure GPIO direction,such as output_only,input_only,output_and_input
+ *
+ * @param  gpio_num  Configure GPIO pins number, it should be GPIO number. If you want to set direction of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param  mode GPIO direction
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO error
+ *
+ */
+esp_err_t gpio_set_direction(gpio_num_t gpio_num, gpio_mode_t mode);
+
+/**
+ * @brief  Configure GPIO pull-up/pull-down resistors
+ *
+ * Only pins that support both input & output have integrated pull-up and pull-down resistors. Input-only GPIOs 34-39 do not.
+ *
+ * @param  gpio_num GPIO number. If you want to set pull up or down mode for e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param  pull GPIO pull up/down mode.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG : Parameter error
+ *
+ */
+esp_err_t gpio_set_pull_mode(gpio_num_t gpio_num, gpio_pull_mode_t pull);
+
+/**
+ * @brief Enable GPIO wake-up function.
+ *
+ * @param gpio_num GPIO number.
+ *
+ * @param intr_type GPIO wake-up type. Only GPIO_INTR_LOW_LEVEL or GPIO_INTR_HIGH_LEVEL can be used.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type);
+
+/**
+ * @brief Disable GPIO wake-up function.
+ *
+ * @param gpio_num GPIO number
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num);
+
+/**
+ * @brief   Register GPIO interrupt handler, the handler is an ISR.
+ *          The handler will be attached to the same CPU core that this function is running on.
+ *
+ * This ISR function is called whenever any GPIO interrupt occurs. See
+ * the alternative gpio_install_isr_service() and
+ * gpio_isr_handler_add() API in order to have the driver support
+ * per-GPIO ISRs.
+ *
+ * @param  fn  Interrupt handler function.
+ * @param  arg  Parameter for handler function
+ * @param  intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *            ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ * @param  handle Pointer to return handle. If non-NULL, a handle for the interrupt will be returned here.
+ *
+ * \verbatim embed:rst:leading-asterisk
+ * To disable or remove the ISR, pass the returned handle to the :doc:`interrupt allocation functions </api-reference/system/intr_alloc>`.
+ * \endverbatim
+ *
+ * @return
+ *     - ESP_OK Success ;
+ *     - ESP_ERR_INVALID_ARG GPIO error
+ *     - ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
+ */
+esp_err_t gpio_isr_register(void (*fn)(void *), void *arg, int intr_alloc_flags, gpio_isr_handle_t *handle);
+
+/**
+  * @brief Enable pull-up on GPIO.
+  *
+  * @param gpio_num GPIO number
+  *
+  * @return
+  *     - ESP_OK Success
+  *     - ESP_ERR_INVALID_ARG Parameter error
+  */
+esp_err_t gpio_pullup_en(gpio_num_t gpio_num);
+
+/**
+  * @brief Disable pull-up on GPIO.
+  *
+  * @param gpio_num GPIO number
+  *
+  * @return
+  *     - ESP_OK Success
+  *     - ESP_ERR_INVALID_ARG Parameter error
+  */
+esp_err_t gpio_pullup_dis(gpio_num_t gpio_num);
+
+/**
+  * @brief Enable pull-down on GPIO.
+  *
+  * @param gpio_num GPIO number
+  *
+  * @return
+  *     - ESP_OK Success
+  *     - ESP_ERR_INVALID_ARG Parameter error
+  */
+esp_err_t gpio_pulldown_en(gpio_num_t gpio_num);
+
+/**
+  * @brief Disable pull-down on GPIO.
+  *
+  * @param gpio_num GPIO number
+  *
+  * @return
+  *     - ESP_OK Success
+  *     - ESP_ERR_INVALID_ARG Parameter error
+  */
+esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num);
+
+/**
+  * @brief Install the driver's GPIO ISR handler service, which allows per-pin GPIO interrupt handlers.
+  *
+  * This function is incompatible with gpio_isr_register() - if that function is used, a single global ISR is registered for all GPIO interrupts. If this function is used, the ISR service provides a global GPIO ISR and individual pin handlers are registered via the gpio_isr_handler_add() function.
+  *
+  * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+  *            ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+  *
+  * @return
+  *     - ESP_OK Success
+  *     - ESP_ERR_NO_MEM No memory to install this service
+  *     - ESP_ERR_INVALID_STATE ISR service already installed.
+  *     - ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
+  *     - ESP_ERR_INVALID_ARG GPIO error
+  */
+esp_err_t gpio_install_isr_service(int intr_alloc_flags);
+
+/**
+  * @brief Uninstall the driver's GPIO ISR service, freeing related resources.
+  */
+void gpio_uninstall_isr_service(void);
+
+/**
+  * @brief Add ISR handler for the corresponding GPIO pin.
+  *
+  * Call this function after using gpio_install_isr_service() to
+  * install the driver's GPIO ISR handler service.
+  *
+  * The pin ISR handlers no longer need to be declared with IRAM_ATTR,
+  * unless you pass the ESP_INTR_FLAG_IRAM flag when allocating the
+  * ISR in gpio_install_isr_service().
+  *
+  * This ISR handler will be called from an ISR. So there is a stack
+  * size limit (configurable as "ISR stack size" in menuconfig). This
+  * limit is smaller compared to a global GPIO interrupt handler due
+  * to the additional level of indirection.
+  *
+  * @param gpio_num GPIO number
+  * @param isr_handler ISR handler function for the corresponding GPIO number.
+  * @param args parameter for ISR handler.
+  *
+  * @return
+  *     - ESP_OK Success
+  *     - ESP_ERR_INVALID_STATE Wrong state, the ISR service has not been initialized.
+  *     - ESP_ERR_INVALID_ARG Parameter error
+  */
+esp_err_t gpio_isr_handler_add(gpio_num_t gpio_num, gpio_isr_t isr_handler, void *args);
+
+/**
+  * @brief Remove ISR handler for the corresponding GPIO pin.
+  *
+  * @param gpio_num GPIO number
+  *
+  * @return
+  *     - ESP_OK Success
+  *     - ESP_ERR_INVALID_STATE Wrong state, the ISR service has not been initialized.
+  *     - ESP_ERR_INVALID_ARG Parameter error
+  */
+esp_err_t gpio_isr_handler_remove(gpio_num_t gpio_num);
+
+/**
+  * @brief Set GPIO pad drive capability
+  *
+  * @param gpio_num GPIO number, only support output GPIOs
+  * @param strength Drive capability of the pad
+  *
+  * @return
+  *     - ESP_OK Success
+  *     - ESP_ERR_INVALID_ARG Parameter error
+  */
+esp_err_t gpio_set_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t strength);
+
+/**
+  * @brief Get GPIO pad drive capability
+  *
+  * @param gpio_num GPIO number, only support output GPIOs
+  * @param strength Pointer to accept drive capability of the pad
+  *
+  * @return
+  *     - ESP_OK Success
+  *     - ESP_ERR_INVALID_ARG Parameter error
+  */
+esp_err_t gpio_get_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t *strength);
+
+/**
+  * @brief Enable gpio pad hold function.
+  *
+  * The gpio pad hold function works in both input and output modes, but must be output-capable gpios.
+  * If pad hold enabled:
+  *   in output mode: the output level of the pad will be force locked and can not be changed.
+  *   in input mode: the input value read will not change, regardless the changes of input signal.
+  *
+  * The state of digital gpio cannot be held during Deep-sleep, and it will resume the hold function
+  * when the chip wakes up from Deep-sleep. If the digital gpio also needs to be held during Deep-sleep,
+  * `gpio_deep_sleep_hold_en` should also be called.
+  *
+  * Power down or call gpio_hold_dis will disable this function.
+  *
+  * @param gpio_num GPIO number, only support output-capable GPIOs
+  *
+  * @return
+  *     - ESP_OK Success
+  *     - ESP_ERR_NOT_SUPPORTED Not support pad hold function
+  */
+esp_err_t gpio_hold_en(gpio_num_t gpio_num);
+
+/**
+  * @brief Disable gpio pad hold function.
+  *
+  * When the chip is woken up from Deep-sleep, the gpio will be set to the default mode, so, the gpio will output
+  * the default level if this function is called. If you don't want the level changes, the gpio should be configured to
+  * a known state before this function is called.
+  *  e.g.
+  *     If you hold gpio18 high during Deep-sleep, after the chip is woken up and `gpio_hold_dis` is called,
+  *     gpio18 will output low level(because gpio18 is input mode by default). If you don't want this behavior,
+  *     you should configure gpio18 as output mode and set it to hight level before calling `gpio_hold_dis`.
+  *
+  * @param gpio_num GPIO number, only support output-capable GPIOs
+  *
+  * @return
+  *     - ESP_OK Success
+  *     - ESP_ERR_NOT_SUPPORTED Not support pad hold function
+  */
+esp_err_t gpio_hold_dis(gpio_num_t gpio_num);
+
+/**
+  * @brief Enable all digital gpio pad hold function during Deep-sleep.
+  *
+  * When the chip is in Deep-sleep mode, all digital gpio will hold the state before sleep, and when the chip is woken up,
+  * the status of digital gpio will not be held. Note that the pad hold feature only works when the chip is in Deep-sleep mode,
+  * when not in sleep mode, the digital gpio state can be changed even you have called this function.
+  *
+  * Power down or call gpio_hold_dis will disable this function, otherwise, the digital gpio hold feature works as long as the chip enter Deep-sleep.
+  */
+void gpio_deep_sleep_hold_en(void);
+
+/**
+  * @brief Disable all digital gpio pad hold function during Deep-sleep.
+  *
+  */
+void gpio_deep_sleep_hold_dis(void);
+
+/**
+  * @brief Set pad input to a peripheral signal through the IOMUX.
+  * @param gpio_num GPIO number of the pad.
+  * @param signal_idx Peripheral signal id to input. One of the ``*_IN_IDX`` signals in ``soc/gpio_sig_map.h``.
+  */
+void gpio_iomux_in(uint32_t gpio_num, uint32_t signal_idx);
+
+/**
+  * @brief Set peripheral output to an GPIO pad through the IOMUX.
+  * @param gpio_num gpio_num GPIO number of the pad.
+  * @param func The function number of the peripheral pin to output pin.
+  *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+void gpio_iomux_out(uint8_t gpio_num, int func, bool oen_inv);
+
+#if SOC_GPIO_SUPPORT_FORCE_HOLD
+/**
+  * @brief Force hold digital and rtc gpio pad.
+  * @note GPIO force hold, whether the chip in sleep mode or wakeup mode.
+  * */
+esp_err_t gpio_force_hold_all(void);
+
+/**
+  * @brief Force unhold digital and rtc gpio pad.
+  * @note GPIO force unhold, whether the chip in sleep mode or wakeup mode.
+  * */
+esp_err_t gpio_force_unhold_all(void);
+#endif
+
+#if SOC_GPIO_SUPPORT_SLP_SWITCH
+/**
+  * @brief Enable SLP_SEL to change GPIO status automantically in lightsleep.
+  * @param gpio_num GPIO number of the pad.
+  *
+  * @return
+  *     - ESP_OK Success
+  *
+  */
+esp_err_t gpio_sleep_sel_en(gpio_num_t gpio_num);
+
+/**
+  * @brief Disable SLP_SEL to change GPIO status automantically in lightsleep.
+  * @param gpio_num GPIO number of the pad.
+  *
+  * @return
+  *     - ESP_OK Success
+  */
+esp_err_t gpio_sleep_sel_dis(gpio_num_t gpio_num);
+
+/**
+ * @brief	 GPIO set direction at sleep
+ *
+ * Configure GPIO direction,such as output_only,input_only,output_and_input
+ *
+ * @param  gpio_num  Configure GPIO pins number, it should be GPIO number. If you want to set direction of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param  mode GPIO direction
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO error
+ */
+esp_err_t gpio_sleep_set_direction(gpio_num_t gpio_num, gpio_mode_t mode);
+
+/**
+ * @brief  Configure GPIO pull-up/pull-down resistors at sleep
+ *
+ * Only pins that support both input & output have integrated pull-up and pull-down resistors. Input-only GPIOs 34-39 do not.
+ *
+ * @param  gpio_num GPIO number. If you want to set pull up or down mode for e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param  pull GPIO pull up/down mode.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG : Parameter error
+ */
+esp_err_t gpio_sleep_set_pull_mode(gpio_num_t gpio_num, gpio_pull_mode_t pull);
+#endif
+
+#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+
+#define GPIO_IS_DEEP_SLEEP_WAKEUP_VALID_GPIO(gpio_num)        ((gpio_num & ~SOC_GPIO_DEEP_SLEEP_WAKEUP_VALID_GPIO_MASK) == 0)
+
+/**
+ * @brief Enable GPIO deep-sleep wake-up function.
+ *
+ * @param gpio_num GPIO number.
+ *
+ * @param intr_type GPIO wake-up type. Only GPIO_INTR_LOW_LEVEL or GPIO_INTR_HIGH_LEVEL can be used.
+ *
+ * @note Called by the SDK. User shouldn't call this directly in the APP.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type);
+
+/**
+ * @brief Disable GPIO deep-sleep wake-up function.
+ *
+ * @param gpio_num GPIO number
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t gpio_deep_sleep_wakeup_disable(gpio_num_t gpio_num);
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/i2c.h b/tools/sdk/esp32s3/include/driver/include/driver/i2c.h
new file mode 100644
index 00000000000..22dcc8ab241
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/i2c.h
@@ -0,0 +1,664 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _DRIVER_I2C_H_
+#define _DRIVER_I2C_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <esp_types.h>
+#include "esp_err.h"
+#include "esp_intr_alloc.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/semphr.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "freertos/ringbuf.h"
+#include "driver/gpio.h"
+#include "soc/soc_caps.h"
+#include "hal/i2c_types.h"
+
+#define I2C_APB_CLK_FREQ  APB_CLK_FREQ /*!< I2C source clock is APB clock, 80MHz */
+
+#define I2C_NUM_MAX            (SOC_I2C_NUM) /*!< I2C port max */
+#define I2C_NUM_0              (0) /*!< I2C port 0 */
+#if SOC_I2C_NUM >= 2
+#define I2C_NUM_1              (1) /*!< I2C port 1 */
+#endif
+
+// I2C clk flags for users to use, can be expanded in the future.
+#define I2C_SCLK_SRC_FLAG_FOR_NOMAL       (0)         /*!< Any one clock source that is available for the specified frequency may be choosen*/
+#define I2C_SCLK_SRC_FLAG_AWARE_DFS       (1 << 0)    /*!< For REF tick clock, it won't change with APB.*/
+#define I2C_SCLK_SRC_FLAG_LIGHT_SLEEP     (1 << 1)    /*!< For light sleep mode.*/
+
+/**
+ * @brief Minimum size, in bytes, of the internal private structure used to describe
+ * I2C commands link.
+ */
+#define I2C_INTERNAL_STRUCT_SIZE (24)
+
+/**
+ * @brief The following macro is used to determine the recommended size of the
+ * buffer to pass to `i2c_cmd_link_create_static()` function.
+ * It requires one parameter, `TRANSACTIONS`, describing the number of transactions
+ * intended to be performed on the I2C port.
+ * For example, if one wants to perform a read on an I2C device register, `TRANSACTIONS`
+ * must be at least 2, because the commands required are the following:
+ *  - write device register
+ *  - read register content
+ *
+ * Signals such as "(repeated) start", "stop", "nack", "ack" shall not be counted.
+ */
+#define I2C_LINK_RECOMMENDED_SIZE(TRANSACTIONS)     (2 * I2C_INTERNAL_STRUCT_SIZE + I2C_INTERNAL_STRUCT_SIZE * \
+                                                        (5 * TRANSACTIONS)) /* Make the assumption that each transaction
+                                                                             * of the user is surrounded by a "start", device address
+                                                                             * and a "nack/ack" signal. Allocate one more room for
+                                                                             * "stop" signal at the end.
+                                                                             * Allocate 2 more internal struct size for headers.
+                                                                             */
+
+/**
+ * @brief I2C initialization parameters
+ */
+typedef struct{
+    i2c_mode_t mode;     /*!< I2C mode */
+    int sda_io_num;      /*!< GPIO number for I2C sda signal */
+    int scl_io_num;      /*!< GPIO number for I2C scl signal */
+    bool sda_pullup_en;  /*!< Internal GPIO pull mode for I2C sda signal*/
+    bool scl_pullup_en;  /*!< Internal GPIO pull mode for I2C scl signal*/
+
+    union {
+        struct {
+            uint32_t clk_speed;      /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */
+        } master;                    /*!< I2C master config */
+        struct {
+            uint8_t addr_10bit_en;   /*!< I2C 10bit address mode enable for slave mode */
+            uint16_t slave_addr;     /*!< I2C address for slave mode */
+            uint32_t maximum_speed;  /*!< I2C expected clock speed from SCL. */
+        } slave;                     /*!< I2C slave config */
+    };
+    uint32_t clk_flags;              /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/
+} i2c_config_t;
+
+
+typedef void *i2c_cmd_handle_t;    /*!< I2C command handle  */
+
+/**
+ * @brief Install an I2C driver
+ *
+ * @param i2c_num I2C port number
+ * @param mode I2C mode (either master or slave)
+ * @param slv_rx_buf_len Receiving buffer size. Only slave mode will use this value, it is ignored in master mode.
+ * @param slv_tx_buf_len Sending buffer size. Only slave mode will use this value, it is ignored in master mode.
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values.
+ *                         See esp_intr_alloc.h for more info.
+ *        @note
+ *        In master mode, if the cache is likely to be disabled(such as write flash) and the slave is time-sensitive,
+ *        `ESP_INTR_FLAG_IRAM` is suggested to be used. In this case, please use the memory allocated from internal RAM in i2c read and write function,
+ *        because we can not access the psram(if psram is enabled) in interrupt handle function when cache is disabled.
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_FAIL Driver installation error
+ */
+esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_buf_len, size_t slv_tx_buf_len, int intr_alloc_flags);
+
+/**
+ * @brief Delete I2C driver
+ *
+ * @note This function does not guarantee thread safety.
+ *       Please make sure that no thread will continuously hold semaphores before calling the delete function.
+ *
+ * @param i2c_num I2C port to delete
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_driver_delete(i2c_port_t i2c_num);
+
+/**
+ * @brief Configure an I2C bus with the given configuration.
+ *
+ * @param i2c_num I2C port to configure
+ * @param i2c_conf Pointer to the I2C configuration
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf);
+
+/**
+ * @brief reset I2C tx hardware fifo
+ *
+ * @param i2c_num I2C port number
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_reset_tx_fifo(i2c_port_t i2c_num);
+
+/**
+ * @brief reset I2C rx fifo
+ *
+ * @param i2c_num I2C port number
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_reset_rx_fifo(i2c_port_t i2c_num);
+
+/**
+ * @brief Register an I2C ISR handler.
+ *
+ * @param i2c_num I2C port number to attach handler to
+ * @param fn ISR handler function
+ * @param arg Parameter for the ISR handler
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *                         ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ * @param handle Handle return from esp_intr_alloc.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_isr_register(i2c_port_t i2c_num, void (*fn)(void *), void *arg, int intr_alloc_flags, intr_handle_t *handle);
+
+/**
+ * @brief Delete and free I2C ISR handle.
+ *
+ * @param handle Handle of isr to delete.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_isr_free(intr_handle_t handle);
+
+/**
+ * @brief Configure GPIO pins for I2C SCK and SDA signals.
+ *
+ * @param i2c_num I2C port number
+ * @param sda_io_num GPIO number for I2C SDA signal
+ * @param scl_io_num GPIO number for I2C SCL signal
+ * @param sda_pullup_en Enable the internal pullup for SDA pin
+ * @param scl_pullup_en Enable the internal pullup for SCL pin
+ * @param mode I2C mode
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_set_pin(i2c_port_t i2c_num, int sda_io_num, int scl_io_num,
+                      bool sda_pullup_en, bool scl_pullup_en, i2c_mode_t mode);
+
+/**
+ * @brief Perform a write to a device connected to a particular I2C port.
+ *        This function is a wrapper to `i2c_master_start()`, `i2c_master_write()`, `i2c_master_read()`, etc...
+ *        It shall only be called in I2C master mode.
+ *
+ * @param i2c_num I2C port number to perform the transfer on
+ * @param device_address I2C device's 7-bit address
+ * @param write_buffer Bytes to send on the bus
+ * @param write_size Size, in bytes, of the write buffer
+ * @param ticks_to_wait Maximum ticks to wait before issuing a timeout.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_FAIL Sending command error, slave hasn't ACK the transfer.
+ *     - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
+ *     - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
+ */
+esp_err_t i2c_master_write_to_device(i2c_port_t i2c_num, uint8_t device_address,
+                                     const uint8_t* write_buffer, size_t write_size,
+                                     TickType_t ticks_to_wait);
+
+/**
+ * @brief Perform a read to a device connected to a particular I2C port.
+ *        This function is a wrapper to `i2c_master_start()`, `i2c_master_write()`, `i2c_master_read()`, etc...
+ *        It shall only be called in I2C master mode.
+ *
+ * @param i2c_num I2C port number to perform the transfer on
+ * @param device_address I2C device's 7-bit address
+ * @param read_buffer Buffer to store the bytes received on the bus
+ * @param read_size Size, in bytes, of the read buffer
+ * @param ticks_to_wait Maximum ticks to wait before issuing a timeout.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_FAIL Sending command error, slave hasn't ACK the transfer.
+ *     - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
+ *     - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
+ */
+esp_err_t i2c_master_read_from_device(i2c_port_t i2c_num, uint8_t device_address,
+                                      uint8_t* read_buffer, size_t read_size,
+                                      TickType_t ticks_to_wait);
+
+/**
+ * @brief Perform a write followed by a read to a device on the I2C bus.
+ *        A repeated start signal is used between the `write` and `read`, thus, the bus is
+ *        not released until the two transactions are finished.
+ *        This function is a wrapper to `i2c_master_start()`, `i2c_master_write()`, `i2c_master_read()`, etc...
+ *        It shall only be called in I2C master mode.
+ *
+ * @param i2c_num I2C port number to perform the transfer on
+ * @param device_address I2C device's 7-bit address
+ * @param write_buffer Bytes to send on the bus
+ * @param write_size Size, in bytes, of the write buffer
+ * @param read_buffer Buffer to store the bytes received on the bus
+ * @param read_size Size, in bytes, of the read buffer
+ * @param ticks_to_wait Maximum ticks to wait before issuing a timeout.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_FAIL Sending command error, slave hasn't ACK the transfer.
+ *     - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
+ *     - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
+ */
+esp_err_t i2c_master_write_read_device(i2c_port_t i2c_num, uint8_t device_address,
+                                       const uint8_t* write_buffer, size_t write_size,
+                                       uint8_t* read_buffer, size_t read_size,
+                                       TickType_t ticks_to_wait);
+
+
+/**
+ * @brief Create and initialize an I2C commands list with a given buffer.
+ *        All the allocations for data or signals (START, STOP, ACK, ...) will be
+ *        performed within this buffer.
+ *        This buffer must be valid during the whole transaction.
+ *        After finishing the I2C transactions, it is required to call `i2c_cmd_link_delete_static()`.
+ *
+ * @note It is **highly** advised to not allocate this buffer on the stack. The size of the data
+ *       used underneath may increase in the future, resulting in a possible stack overflow as the macro
+ *       `I2C_LINK_RECOMMENDED_SIZE` would also return a bigger value.
+ *       A better option is to use a buffer allocated statically or dynamically (with `malloc`).
+ *
+ * @param buffer Buffer to use for commands allocations
+ * @param size Size in bytes of the buffer
+ *
+ * @return Handle to the I2C command link or NULL if the buffer provided is too small, please
+ *         use `I2C_LINK_RECOMMENDED_SIZE` macro to get the recommended size for the buffer.
+ */
+i2c_cmd_handle_t i2c_cmd_link_create_static(uint8_t* buffer, uint32_t size);
+
+/**
+ * @brief Create and initialize an I2C commands list with a given buffer.
+ *        After finishing the I2C transactions, it is required to call `i2c_cmd_link_delete()`
+ *        to release and return the resources.
+ *        The required bytes will be dynamically allocated.
+ *
+ * @return Handle to the I2C command link
+ */
+i2c_cmd_handle_t i2c_cmd_link_create(void);
+
+/**
+ * @brief Free the I2C commands list allocated statically with `i2c_cmd_link_create_static`.
+ *
+ * @param cmd_handle I2C commands list allocated statically. This handle should be created thanks to
+ *                   `i2c_cmd_link_create_static()` function
+ */
+void i2c_cmd_link_delete_static(i2c_cmd_handle_t cmd_handle);
+
+/**
+ * @brief Free the I2C commands list
+ *
+ * @param cmd_handle I2C commands list. This handle should be created thanks to
+ *                   `i2c_cmd_link_create()` function
+ */
+void i2c_cmd_link_delete(i2c_cmd_handle_t cmd_handle);
+
+/**
+ * @brief Queue a "START signal" to the given commands list.
+ *        This function shall only be called in I2C master mode.
+ *        Call `i2c_master_cmd_begin()` to send all the queued commands.
+ *
+ * @param cmd_handle I2C commands list
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
+ *     - ESP_FAIL No more memory left on the heap
+ */
+esp_err_t i2c_master_start(i2c_cmd_handle_t cmd_handle);
+
+/**
+ * @brief Queue a "write byte" command to the commands list.
+ *        A single byte will be sent on the I2C port. This function shall only be
+ *        called in I2C master mode.
+ *        Call `i2c_master_cmd_begin()` to send all queued commands
+ *
+ * @param cmd_handle I2C commands list
+ * @param data Byte to send on the port
+ * @param ack_en Enable ACK signal
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
+ *     - ESP_FAIL No more memory left on the heap
+ */
+esp_err_t i2c_master_write_byte(i2c_cmd_handle_t cmd_handle, uint8_t data, bool ack_en);
+
+/**
+ * @brief Queue a "write (multiple) bytes" command to the commands list.
+ *        This function shall only be called in I2C master mode.
+ *        Call `i2c_master_cmd_begin()` to send all queued commands
+ *
+ * @param cmd_handle I2C commands list
+ * @param data Bytes to send. This buffer shall remain **valid** until the transaction is finished.
+ *             If the PSRAM is enabled and `intr_flag` is set to `ESP_INTR_FLAG_IRAM`,
+ *             `data` should be allocated from internal RAM.
+ * @param data_len Length, in bytes, of the data buffer
+ * @param ack_en Enable ACK signal
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
+ *     - ESP_FAIL No more memory left on the heap
+ */
+esp_err_t i2c_master_write(i2c_cmd_handle_t cmd_handle, const uint8_t *data, size_t data_len, bool ack_en);
+
+/**
+ * @brief Queue a "read byte" command to the commands list.
+ *        A single byte will be read on the I2C bus. This function shall only be
+ *        called in I2C master mode.
+ *        Call `i2c_master_cmd_begin()` to send all queued commands
+ *
+ * @param cmd_handle I2C commands list
+ * @param data Pointer where the received byte will the stored. This buffer shall remain **valid**
+ *             until the transaction is finished.
+ * @param ack ACK signal
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
+ *     - ESP_FAIL No more memory left on the heap
+ */
+esp_err_t i2c_master_read_byte(i2c_cmd_handle_t cmd_handle, uint8_t *data, i2c_ack_type_t ack);
+
+/**
+ * @brief Queue a "read (multiple) bytes" command to the commands list.
+ *        Multiple bytes will be read on the I2C bus. This function shall only be
+ *        called in I2C master mode.
+ *        Call `i2c_master_cmd_begin()` to send all queued commands
+ *
+ * @param cmd_handle I2C commands list
+ * @param data Pointer where the received bytes will the stored. This buffer shall remain **valid**
+ *             until the transaction is finished.
+ * @param data_len Size, in bytes, of the `data` buffer
+ * @param ack ACK signal
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
+ *     - ESP_FAIL No more memory left on the heap
+ */
+esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t data_len, i2c_ack_type_t ack);
+
+/**
+ * @brief Queue a "STOP signal" to the given commands list.
+ *        This function shall only be called in I2C master mode.
+ *        Call `i2c_master_cmd_begin()` to send all the queued commands.
+ *
+ * @param cmd_handle I2C commands list
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
+ *     - ESP_FAIL No more memory left on the heap
+ */
+esp_err_t i2c_master_stop(i2c_cmd_handle_t cmd_handle);
+
+/**
+ * @brief Send all the queued commands on the I2C bus, in master mode.
+ *        The task will be blocked until all the commands have been sent out.
+ *        The I2C APIs are not thread-safe, if you want to use one I2C port in different tasks,
+ *        you need to take care of the multi-thread issue.
+ *        This function shall only be called in I2C master mode.
+ *
+ * @param i2c_num I2C port number
+ * @param cmd_handle I2C commands list
+ * @param ticks_to_wait Maximum ticks to wait before issuing a timeout.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_FAIL Sending command error, slave hasn't ACK the transfer.
+ *     - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
+ *     - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
+ */
+esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, TickType_t ticks_to_wait);
+
+/**
+ * @brief Write bytes to internal ringbuffer of the I2C slave data. When the TX fifo empty, the ISR will
+ *        fill the hardware FIFO with the internal ringbuffer's data.
+ *        @note This function shall only be called in I2C slave mode.
+ *
+ * @param i2c_num I2C port number
+ * @param data Bytes to write into internal buffer
+ * @param size Size, in bytes, of `data` buffer
+ * @param ticks_to_wait Maximum ticks to wait.
+ *
+ * @return
+ *     - ESP_FAIL (-1) Parameter error
+ *     - Other (>=0) The number of data bytes pushed to the I2C slave buffer.
+ */
+int i2c_slave_write_buffer(i2c_port_t i2c_num, const uint8_t *data, int size, TickType_t ticks_to_wait);
+
+/**
+ * @brief Read bytes from I2C internal buffer. When the I2C bus receives data, the ISR will copy them
+ *        from the hardware RX FIFO to the internal ringbuffer.
+ *        Calling this function will then copy bytes from the internal ringbuffer to the `data` user buffer.
+ *        @note This function shall only be called in I2C slave mode.
+ *
+ * @param i2c_num I2C port number
+ * @param data Buffer to fill with ringbuffer's bytes
+ * @param max_size Maximum bytes to read
+ * @param ticks_to_wait Maximum waiting ticks
+ *
+ * @return
+ *     - ESP_FAIL(-1) Parameter error
+ *     - Others(>=0) The number of data bytes read from I2C slave buffer.
+ */
+int i2c_slave_read_buffer(i2c_port_t i2c_num, uint8_t *data, size_t max_size, TickType_t ticks_to_wait);
+
+/**
+ * @brief Set I2C master clock period
+ *
+ * @param i2c_num I2C port number
+ * @param high_period Clock cycle number during SCL is high level, high_period is a 14 bit value
+ * @param low_period Clock cycle number during SCL is low level, low_period is a 14 bit value
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_set_period(i2c_port_t i2c_num, int high_period, int low_period);
+
+/**
+ * @brief Get I2C master clock period
+ *
+ * @param i2c_num I2C port number
+ * @param high_period pointer to get clock cycle number during SCL is high level, will get a 14 bit value
+ * @param low_period pointer to get clock cycle number during SCL is low level, will get a 14 bit value
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_get_period(i2c_port_t i2c_num, int *high_period, int *low_period);
+
+/**
+ * @brief Enable hardware filter on I2C bus
+ *        Sometimes the I2C bus is disturbed by high frequency noise(about 20ns), or the rising edge of
+ *        the SCL clock is very slow, these may cause the master state machine to break.
+ *        Enable hardware filter can filter out high frequency interference and make the master more stable.
+ *        @note Enable filter will slow down the SCL clock.
+ *
+ * @param i2c_num I2C port number to filter
+ * @param cyc_num the APB cycles need to be filtered (0<= cyc_num <=7).
+ *        When the period of a pulse is less than cyc_num * APB_cycle, the I2C controller will ignore this pulse.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_filter_enable(i2c_port_t i2c_num, uint8_t cyc_num);
+
+/**
+ * @brief Disable filter on I2C bus
+ *
+ * @param i2c_num I2C port number
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_filter_disable(i2c_port_t i2c_num);
+
+/**
+ * @brief set I2C master start signal timing
+ *
+ * @param i2c_num I2C port number
+ * @param setup_time clock number between the falling-edge of SDA and rising-edge of SCL for start mark, it's a 10-bit value.
+ * @param hold_time clock num between the falling-edge of SDA and falling-edge of SCL for start mark, it's a 10-bit value.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_set_start_timing(i2c_port_t i2c_num, int setup_time, int hold_time);
+
+/**
+ * @brief get I2C master start signal timing
+ *
+ * @param i2c_num I2C port number
+ * @param setup_time pointer to get setup time
+ * @param hold_time pointer to get hold time
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_get_start_timing(i2c_port_t i2c_num, int *setup_time, int *hold_time);
+
+/**
+ * @brief set I2C master stop signal timing
+ *
+ * @param i2c_num I2C port number
+ * @param setup_time clock num between the rising-edge of SCL and the rising-edge of SDA, it's a 10-bit value.
+ * @param hold_time clock number after the STOP bit's rising-edge, it's a 14-bit value.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_set_stop_timing(i2c_port_t i2c_num, int setup_time, int hold_time);
+
+/**
+ * @brief get I2C master stop signal timing
+ *
+ * @param i2c_num I2C port number
+ * @param setup_time pointer to get setup time.
+ * @param hold_time pointer to get hold time.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_get_stop_timing(i2c_port_t i2c_num, int *setup_time, int *hold_time);
+
+/**
+ * @brief set I2C data signal timing
+ *
+ * @param i2c_num I2C port number
+ * @param sample_time clock number I2C used to sample data on SDA after the rising-edge of SCL, it's a 10-bit value
+ * @param hold_time clock number I2C used to hold the data after the falling-edge of SCL, it's a 10-bit value
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_set_data_timing(i2c_port_t i2c_num, int sample_time, int hold_time);
+
+/**
+ * @brief get I2C data signal timing
+ *
+ * @param i2c_num I2C port number
+ * @param sample_time pointer to get sample time
+ * @param hold_time pointer to get hold time
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_get_data_timing(i2c_port_t i2c_num, int *sample_time, int *hold_time);
+
+/**
+ * @brief set I2C timeout value
+ * @param i2c_num I2C port number
+ * @param timeout timeout value for I2C bus (unit: APB 80Mhz clock cycle)
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_set_timeout(i2c_port_t i2c_num, int timeout);
+
+/**
+ * @brief get I2C timeout value
+ * @param i2c_num I2C port number
+ * @param timeout pointer to get timeout value
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_get_timeout(i2c_port_t i2c_num, int *timeout);
+
+/**
+ * @brief set I2C data transfer mode
+ *
+ * @param i2c_num I2C port number
+ * @param tx_trans_mode I2C sending data mode
+ * @param rx_trans_mode I2C receving data mode
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_set_data_mode(i2c_port_t i2c_num, i2c_trans_mode_t tx_trans_mode, i2c_trans_mode_t rx_trans_mode);
+
+/**
+ * @brief get I2C data transfer mode
+ *
+ * @param i2c_num I2C port number
+ * @param tx_trans_mode pointer to get I2C sending data mode
+ * @param rx_trans_mode pointer to get I2C receiving data mode
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_get_data_mode(i2c_port_t i2c_num, i2c_trans_mode_t *tx_trans_mode, i2c_trans_mode_t *rx_trans_mode);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*_DRIVER_I2C_H_*/
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/i2s.h b/tools/sdk/esp32s3/include/driver/include/driver/i2s.h
new file mode 100644
index 00000000000..389b631ba7e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/i2s.h
@@ -0,0 +1,505 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_types.h"
+#include "esp_err.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/semphr.h"
+#include "soc/i2s_periph.h"
+#include "soc/rtc_periph.h"
+#include "soc/soc_caps.h"
+#include "hal/i2s_types.h"
+#include "driver/periph_ctrl.h"
+#include "esp_intr_alloc.h"
+
+#if SOC_I2S_SUPPORTS_ADC
+#include "driver/adc.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define I2S_PIN_NO_CHANGE (-1) /*!< Use in i2s_pin_config_t for pins which should not be changed */
+
+/**
+ * @brief I2S port number, the max port number is (I2S_NUM_MAX -1).
+ */
+typedef enum {
+    I2S_NUM_0 = 0,                 /*!< I2S port 0 */
+#if SOC_I2S_NUM > 1
+    I2S_NUM_1 = 1,                 /*!< I2S port 1 */
+#endif
+    I2S_NUM_MAX,                   /*!< I2S port max */
+} i2s_port_t;
+
+#if SOC_I2S_SUPPORTS_PCM
+/**
+ * @brief I2S PCM configuration
+ *
+ */
+typedef struct {
+    i2s_pcm_compress_t  pcm_type;       /*!< I2S PCM a/u-law decompress or compress type */
+} i2s_pcm_cfg_t;
+#endif
+
+#if SOC_I2S_SUPPORTS_PDM_TX
+/**
+ * @brief Default I2S PDM Up-Sampling Rate configuration
+ */
+#define I2S_PDM_DEFAULT_UPSAMPLE_CONFIG(rate) { \
+        .sample_rate = rate,                    \
+        .fp = 960,                              \
+        .fs = (rate) / 100,                     \
+    }
+
+/**
+ * @brief I2S PDM up-sample rate configuration
+ * @note  TX PDM can only be set to the following two upsampling rate configurations:
+ *        1: fp = 960, fs = sample_rate / 100, in this case, Fpdm = 128*48000
+ *        2: fp = 960, fs = 480, in this case, Fpdm = 128*Fpcm = 128*sample_rate
+ *        If the pdm receiver do not care the pdm serial clock, it's recommended set Fpdm = 128*48000.
+ *        Otherwise, the second configuration should be applied.
+ */
+typedef struct  {
+    int sample_rate;                    /*!< I2S PDM sample rate */
+    int fp;                             /*!< I2S PDM TX upsampling paramater. Normally it should be set to 960 */
+    int fs;                             /*!< I2S PDM TX upsampling paramater. When it is set to 480, the pdm clock frequency Fpdm = 128 * sample_rate, when it is set to sample_rate / 100， Fpdm will be fixed to 128*48000 */
+} i2s_pdm_tx_upsample_cfg_t;
+#endif
+
+/**
+ * @brief I2S pin number for i2s_set_pin
+ *
+ */
+typedef struct {
+    int mck_io_num;     /*!< MCK in out pin. Note that ESP32 supports setting MCK on GPIO0/GPIO1/GPIO3 only*/
+    int bck_io_num;     /*!< BCK in out pin*/
+    int ws_io_num;      /*!< WS in out pin*/
+    int data_out_num;   /*!< DATA out pin*/
+    int data_in_num;    /*!< DATA in pin*/
+} i2s_pin_config_t;
+
+/**
+ * @brief I2S driver configuration parameters
+ *
+ */
+typedef struct {
+
+    i2s_mode_t              mode;                       /*!< I2S work mode */
+    uint32_t                sample_rate;                /*!< I2S sample rate */
+    i2s_bits_per_sample_t   bits_per_sample;            /*!< I2S sample bits in one channel */
+    i2s_channel_fmt_t       channel_format;             /*!< I2S channel format.*/
+    i2s_comm_format_t       communication_format;       /*!< I2S communication format */
+    int                     intr_alloc_flags;           /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */
+    int                     dma_buf_count;              /**< The total number of DMA buffers to receive/transmit data.
+                                                          * A descriptor includes some information such as buffer address,
+                                                          * the address of the next descriptor, and the buffer length.
+                                                          * Since one descriptor points to one buffer, therefore, 'dma_desc_num' can be interpreted as the total number of DMA buffers used to store data from DMA interrupt.
+                                                          * Notice that these buffers are internal to'i2s_read' and descriptors are created automatically inside of the I2S driver.
+                                                          * Users only need to set the buffer number while the length is derived from the parameter described below.
+                                                          */
+    int                     dma_buf_len;                /**< Number of frames in a DMA buffer.
+                                                          *  A frame means the data of all channels in a WS cycle.
+                                                          *  The real_dma_buf_size = dma_buf_len * chan_num * bits_per_chan / 8.
+                                                          *  For example, if two channels in stereo mode (i.e., 'channel_format' is set to 'I2S_CHANNEL_FMT_RIGHT_LEFT') are active,
+                                                          *  and each channel transfers 32 bits (i.e., 'bits_per_sample' is set to 'I2S_BITS_PER_CHAN_32BIT'),
+                                                          *  then the total number of bytes of a frame is 'channel_format' * 'bits_per_sample' = 2 * 32 / 8 = 8 bytes.
+                                                          *  We assume that the current 'dma_buf_len' is 100, then the real length of the DMA buffer is 8 * 100 = 800 bytes.
+                                                          *  Note that the length of an internal real DMA buffer shouldn't be greater than 4092.
+                                                          */
+    bool                    use_apll;                   /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */
+    bool                    tx_desc_auto_clear;         /*!< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability) */
+    int                     fixed_mclk;                 /*!< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value. If fixed_mclk set, mclk_multiple won't take effect */
+    i2s_mclk_multiple_t     mclk_multiple;              /*!< The multiple of I2S master clock(MCLK) to sample rate */
+    i2s_bits_per_chan_t     bits_per_chan;              /*!< I2S total bits in one channel， only take effect when larger than 'bits_per_sample', default '0' means equal to 'bits_per_sample' */
+
+#if SOC_I2S_SUPPORTS_TDM
+    i2s_channel_t           chan_mask;                  /*!< I2S active channel bit mask, set value in `i2s_channel_t` to enable specific channel, the bit map of active channel can not exceed (0x1<<total_chan). */
+    uint32_t                total_chan;                 /*!< I2S Total number of channels. If it is smaller than the biggest active channel number, it will be set to this number automatically. */
+    bool                    left_align;                 /*!< Set to enable left alignment */
+    bool                    big_edin;                   /*!< Set to enable big edin */
+    bool                    bit_order_msb;              /*!< Set to enable msb order */
+    bool                    skip_msk;                   /*!< Set to enable skip mask. If it is enabled, only the data of the enabled channels will be sent, otherwise all data stored in DMA TX buffer will be sent */
+#endif // SOC_I2S_SUPPORTS_TDM
+
+} i2s_driver_config_t;
+
+typedef i2s_driver_config_t i2s_config_t;       // for backward compatible
+typedef intr_handle_t i2s_isr_handle_t;         // for backward compatible
+
+/**
+ * @brief I2S event queue types
+ *
+ */
+typedef enum {
+    I2S_EVENT_DMA_ERROR,
+    I2S_EVENT_TX_DONE,     /*!< I2S DMA finish sent 1 buffer*/
+    I2S_EVENT_RX_DONE,     /*!< I2S DMA finish received 1 buffer*/
+    I2S_EVENT_TX_Q_OVF,    /*!< I2S DMA sent queue overflow*/
+    I2S_EVENT_RX_Q_OVF,    /*!< I2S DMA receive queue overflow*/
+    I2S_EVENT_MAX,         /*!< I2S event max index*/
+} i2s_event_type_t;
+
+/**
+ * @brief Event structure used in I2S event queue
+ *
+ */
+typedef struct {
+    i2s_event_type_t    type;   /*!< I2S event type */
+    size_t              size;   /*!< I2S data size for I2S_DATA event*/
+} i2s_event_t;
+
+/**
+ * @brief Set I2S pin number
+ *
+ * @note
+ * The I2S peripheral output signals can be connected to multiple GPIO pads.
+ * However, the I2S peripheral input signal can only be connected to one GPIO pad.
+ *
+ * @param   i2s_num     I2S port number
+ *
+ * @param   pin         I2S Pin structure, or NULL to set 2-channel 8-bit internal DAC pin configuration (GPIO25 & GPIO26)
+ *
+ * Inside the pin configuration structure, set I2S_PIN_NO_CHANGE for any pin where
+ * the current configuration should not be changed.
+ *
+ * @note if *pin is set as NULL, this function will initialize both of the built-in DAC channels by default.
+ *       if you don't want this to happen and you want to initialize only one of the DAC channels, you can call i2s_set_dac_mode instead.
+ *
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_FAIL            IO error
+ */
+esp_err_t i2s_set_pin(i2s_port_t i2s_num, const i2s_pin_config_t *pin);
+
+#if SOC_I2S_SUPPORTS_PDM_RX
+/**
+ * @brief Set PDM mode down-sample rate
+ *        In PDM RX mode, there would be 2 rounds of downsample process in hardware.
+ *        In the first downsample process, the sampling number can be 16 or 8.
+ *        In the second downsample process, the sampling number is fixed as 8.
+ *        So the clock frequency in PDM RX mode would be (fpcm * 64) or (fpcm * 128) accordingly.
+ * @param i2s_num I2S port number
+ * @param downsample i2s RX down sample rate for PDM mode.
+ *
+ * @note After calling this function, it would call i2s_set_clk inside to update the clock frequency.
+ *       Please call this function after I2S driver has been initialized.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM      Out of memory
+ */
+esp_err_t i2s_set_pdm_rx_down_sample(i2s_port_t i2s_num, i2s_pdm_dsr_t downsample);
+#endif
+
+#if SOC_I2S_SUPPORTS_PDM_TX
+/**
+ * @brief Set TX PDM mode up-sample rate
+ * @note  If you have set PDM mode while calling 'i2s_driver_install',
+ *        default PDM TX upsample parameters have already been set,
+ *        no need to call this function again if you don't have to change the default configuration
+ *
+ * @param i2s_num I2S port number
+ * @param upsample_cfg Set I2S PDM up-sample rate configuration
+ *
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM      Out of memory
+ */
+esp_err_t i2s_set_pdm_tx_up_sample(i2s_port_t i2s_num, const i2s_pdm_tx_upsample_cfg_t *upsample_cfg);
+#endif
+
+/**
+ * @brief Install and start I2S driver.
+ *
+ * @param i2s_num         I2S port number
+ *
+ * @param i2s_config      I2S configurations - see i2s_config_t struct
+ *
+ * @param queue_size      I2S event queue size/depth.
+ *
+ * @param i2s_queue       I2S event queue handle, if set NULL, driver will not use an event queue.
+ *
+ * This function must be called before any I2S driver read/write operations.
+ *
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM      Out of memory
+ *     - ESP_ERR_INVALID_STATE  Current I2S port is in use
+ */
+esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config, int queue_size, void *i2s_queue);
+
+/**
+ * @brief Uninstall I2S driver.
+ *
+ * @param i2s_num  I2S port number
+ *
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_INVALID_STATE I2S port has been uninstalled by others (e.g. LCD i80)
+ */
+esp_err_t i2s_driver_uninstall(i2s_port_t i2s_num);
+
+/**
+ * @brief Write data to I2S DMA transmit buffer.
+ *
+ * @param i2s_num             I2S port number
+ *
+ * @param src                 Source address to write from
+ *
+ * @param size                Size of data in bytes
+ *
+ * @param[out] bytes_written  Number of bytes written, if timeout, the result will be less than the size passed in.
+ *
+ * @param ticks_to_wait       TX buffer wait timeout in RTOS ticks. If this
+ * many ticks pass without space becoming available in the DMA
+ * transmit buffer, then the function will return (note that if the
+ * data is written to the DMA buffer in pieces, the overall operation
+ * may still take longer than this timeout.) Pass portMAX_DELAY for no
+ * timeout.
+ *
+ * @return
+ *     - ESP_OK               Success
+ *     - ESP_ERR_INVALID_ARG  Parameter error
+ */
+esp_err_t i2s_write(i2s_port_t i2s_num, const void *src, size_t size, size_t *bytes_written, TickType_t ticks_to_wait);
+
+/**
+ * @brief Write data to I2S DMA transmit buffer while expanding the number of bits per sample. For example, expanding 16-bit PCM to 32-bit PCM.
+ *
+ * @param i2s_num             I2S port number
+ *
+ * @param src                 Source address to write from
+ *
+ * @param size                Size of data in bytes
+ *
+ * @param src_bits            Source audio bit
+ *
+ * @param aim_bits            Bit wanted, no more than 32, and must be greater than src_bits
+ *
+ * @param[out] bytes_written  Number of bytes written, if timeout, the result will be less than the size passed in.
+ *
+ * @param ticks_to_wait       TX buffer wait timeout in RTOS ticks. If this
+ * many ticks pass without space becoming available in the DMA
+ * transmit buffer, then the function will return (note that if the
+ * data is written to the DMA buffer in pieces, the overall operation
+ * may still take longer than this timeout.) Pass portMAX_DELAY for no
+ * timeout.
+ *
+ * Format of the data in source buffer is determined by the I2S
+ * configuration (see i2s_config_t).
+ *
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2s_write_expand(i2s_port_t i2s_num, const void *src, size_t size, size_t src_bits, size_t aim_bits, size_t *bytes_written, TickType_t ticks_to_wait);
+
+/**
+ * @brief Read data from I2S DMA receive buffer
+ *
+ * @param i2s_num         I2S port number
+ *
+ * @param dest            Destination address to read into
+ *
+ * @param size            Size of data in bytes
+ *
+ * @param[out] bytes_read Number of bytes read, if timeout, bytes read will be less than the size passed in.
+ *
+ * @param ticks_to_wait   RX buffer wait timeout in RTOS ticks. If this many ticks pass without bytes becoming available in the DMA receive buffer, then the function will return (note that if data is read from the DMA buffer in pieces, the overall operation may still take longer than this timeout.) Pass portMAX_DELAY for no timeout.
+ *
+ * @note If the built-in ADC mode is enabled, we should call i2s_adc_enable and i2s_adc_disable around the whole reading process,
+ *       to prevent the data getting corrupted.
+ *
+ * @return
+ *     - ESP_OK               Success
+ *     - ESP_ERR_INVALID_ARG  Parameter error
+ */
+esp_err_t i2s_read(i2s_port_t i2s_num, void *dest, size_t size, size_t *bytes_read, TickType_t ticks_to_wait);
+
+/**
+ * @brief Set sample rate used for I2S RX and TX.
+ *
+ * The bit clock rate is determined by the sample rate and i2s_config_t configuration parameters (number of channels, bits_per_sample).
+ *
+ * `bit_clock = rate * (number of channels) * bits_per_sample`
+ *
+ * @param i2s_num  I2S port number
+ *
+ * @param rate I2S sample rate (ex: 8000, 44100...)
+ *
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM      Out of memory
+ */
+esp_err_t i2s_set_sample_rates(i2s_port_t i2s_num, uint32_t rate);
+
+/**
+ * @brief Stop I2S driver
+ *
+ * There is no need to call i2s_stop() before calling i2s_driver_uninstall().
+ *
+ * Disables I2S TX/RX, until i2s_start() is called.
+ *
+ * @param i2s_num  I2S port number
+ *
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2s_stop(i2s_port_t i2s_num);
+
+/**
+ * @brief Start I2S driver
+ *
+ * It is not necessary to call this function after i2s_driver_install() (it is started automatically), however it is necessary to call it after i2s_stop().
+ *
+ *
+ * @param i2s_num  I2S port number
+ *
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2s_start(i2s_port_t i2s_num);
+
+/**
+ * @brief Zero the contents of the TX DMA buffer.
+ *
+ * Pushes zero-byte samples into the TX DMA buffer, until it is full.
+ *
+ * @param i2s_num  I2S port number
+ *
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2s_zero_dma_buffer(i2s_port_t i2s_num);
+
+#if SOC_I2S_SUPPORTS_PCM
+/**
+ * @brief Configure I2S a/u-law decompress or compress
+ *
+ * @note  This function should be called after i2s driver installed
+ *        Only take effecttive when the i2s 'communication_format' is set to 'I2S_COMM_FORMAT_STAND_PCM_SHORT' or 'I2S_COMM_FORMAT_STAND_PCM_LONG'
+ *
+ * @param i2s_num  I2S port number
+ *
+ * @param pcm_cfg  including mode selection and a/u-law decompress or compress configuration paramater
+ *
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2s_pcm_config(i2s_port_t i2s_num, const i2s_pcm_cfg_t *pcm_cfg);
+#endif
+
+/**
+ * @brief Set clock & bit width used for I2S RX and TX.
+ *
+ * Similar to i2s_set_sample_rates(), but also sets bit width.
+ *
+ * 1. stop i2s;
+ * 2. calculate mclk, bck, bck_factor
+ * 3. malloc dma buffer;
+ * 4. start i2s
+ *
+ * @param i2s_num  I2S port number
+ *
+ * @param rate I2S sample rate (ex: 8000, 44100...)
+ *
+ * @param bits_cfg I2S bits configuration
+ *             the low 16 bits is for data bits per sample in one channel (see 'i2s_bits_per_sample_t')
+ *             the high 16 bits is for total bits in one channel (see 'i2s_bits_per_chan_t')
+ *             high 16bits =0 means same as the bits per sample.
+ *
+ * @param ch I2S channel, (I2S_CHANNEL_MONO, I2S_CHANNEL_STEREO or specific channel in TDM mode)
+ *
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM      Out of memory
+ */
+esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, uint32_t bits_cfg, i2s_channel_t ch);
+
+/**
+ * @brief get clock set on particular port number.
+ *
+ * @param i2s_num  I2S port number
+ *
+ * @return
+ *     - actual clock set by i2s driver
+ */
+float i2s_get_clk(i2s_port_t i2s_num);
+
+#if SOC_I2S_SUPPORTS_ADC
+/**
+ * @brief Set built-in ADC mode for I2S DMA, this function will initialize ADC pad,
+ *        and set ADC parameters.
+ * @note  In this mode, the ADC maximum sampling rate is 150KHz. Set the sampling rate through ``i2s_config_t``.
+ * @param adc_unit    SAR ADC unit index
+ * @param adc_channel ADC channel index
+ * @return
+ *     - ESP_OK              Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2s_set_adc_mode(adc_unit_t adc_unit, adc1_channel_t adc_channel);
+
+/**
+ * @brief Start to use I2S built-in ADC mode
+ * @note This function would acquire the lock of ADC to prevent the data getting corrupted
+ *       during the I2S peripheral is being used to do fully continuous ADC sampling.
+ *
+ * @param i2s_num i2s port index
+ * @return
+ *     - ESP_OK                Success
+ *     - ESP_ERR_INVALID_ARG   Parameter error
+ *     - ESP_ERR_INVALID_STATE Driver state error
+ */
+esp_err_t i2s_adc_enable(i2s_port_t i2s_num);
+
+/**
+ * @brief Stop to use I2S built-in ADC mode
+ * @param i2s_num i2s port index
+ * @note This function would release the lock of ADC so that other tasks can use ADC.
+ * @return
+ *     - ESP_OK                 Success
+ *     - ESP_ERR_INVALID_ARG    Parameter error
+ *     - ESP_ERR_INVALID_STATE  Driver state error
+ */
+esp_err_t i2s_adc_disable(i2s_port_t i2s_num);
+#endif // SOC_I2S_SUPPORTS_ADC
+
+#if SOC_I2S_SUPPORTS_DAC
+/**
+ * @brief Set I2S dac mode, I2S built-in DAC is disabled by default
+ *
+ * @param dac_mode DAC mode configurations - see i2s_dac_mode_t
+ *
+ * @note Built-in DAC functions are only supported on I2S0 for current ESP32 chip.
+ *       If either of the built-in DAC channel are enabled, the other one can not
+ *       be used as RTC DAC function at the same time.
+ *
+ * @return
+ *     - ESP_OK               Success
+ *     - ESP_ERR_INVALID_ARG  Parameter error
+ */
+esp_err_t i2s_set_dac_mode(i2s_dac_mode_t dac_mode);
+#endif //SOC_I2S_SUPPORTS_DAC
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/ledc.h b/tools/sdk/esp32s3/include/driver/include/driver/ledc.h
new file mode 100644
index 00000000000..7b22f3d1779
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/ledc.h
@@ -0,0 +1,468 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_err.h"
+#include "esp_intr_alloc.h"
+#include "soc/soc.h"
+#include "hal/ledc_types.h"
+#include "driver/gpio.h"
+#include "driver/periph_ctrl.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LEDC_APB_CLK_HZ  (APB_CLK_FREQ)
+#define LEDC_REF_CLK_HZ  (REF_CLK_FREQ)
+#define LEDC_ERR_DUTY    (0xFFFFFFFF)
+#define LEDC_ERR_VAL     (-1)
+
+typedef intr_handle_t ledc_isr_handle_t;
+
+/**
+ * @brief LEDC callback event type
+ */
+typedef enum {
+    LEDC_FADE_END_EVT                   /**< LEDC fade end event */
+} ledc_cb_event_t;
+
+/**
+ * @brief LEDC callback parameter
+ */
+typedef struct {
+    ledc_cb_event_t event;              /**< Event name */
+    uint32_t speed_mode;                /**< Speed mode of the LEDC channel group */
+    uint32_t channel;                   /**< LEDC channel (0 - LEDC_CHANNEL_MAX-1) */
+    uint32_t duty;                      /**< LEDC current duty of the channel, the range of duty is [0, (2**duty_resolution) - 1] */
+} ledc_cb_param_t;
+
+/**
+ * @brief Type of LEDC event callback
+ * @param param LEDC callback parameter
+ * @param user_arg User registered data
+ */
+typedef bool (* ledc_cb_t)(const ledc_cb_param_t *param, void *user_arg);
+
+/**
+ * @brief Group of supported LEDC callbacks
+ * @note The callbacks are all running under ISR environment
+ */
+typedef struct {
+    ledc_cb_t fade_cb;                  /**< LEDC fade_end callback function */
+} ledc_cbs_t;
+
+/**
+ * @brief LEDC channel configuration
+ *        Configure LEDC channel with the given channel/output gpio_num/interrupt/source timer/frequency(Hz)/LEDC duty resolution
+ *
+ * @param ledc_conf Pointer of LEDC channel configure struct
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t ledc_channel_config(const ledc_channel_config_t* ledc_conf);
+
+/**
+ * @brief LEDC timer configuration
+ *        Configure LEDC timer with the given source timer/frequency(Hz)/duty_resolution
+ *
+ * @param  timer_conf Pointer of LEDC timer configure struct
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_FAIL Can not find a proper pre-divider number base on the given frequency and the current duty_resolution.
+ */
+esp_err_t ledc_timer_config(const ledc_timer_config_t* timer_conf);
+
+/**
+ * @brief LEDC update channel parameters
+ * @note  Call this function to activate the LEDC updated parameters.
+ *        After ledc_set_duty, we need to call this function to update the settings.
+ *        And the new LEDC parameters don't take effect until the next PWM cycle.
+ * @note  ledc_set_duty, ledc_set_duty_with_hpoint and ledc_update_duty are not thread-safe, do not call these functions to
+ *        control one LEDC channel in different tasks at the same time.
+ *        A thread-safe version of API is ledc_set_duty_and_update
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *
+ */
+esp_err_t ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
+
+/**
+ * @brief Set LEDC output gpio.
+ * @deprecated This function is redundant, please use ledc_channel_config to set gpio pins.
+ *
+ * @param  gpio_num The LEDC output gpio
+ * @param  speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param  ledc_channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t ledc_set_pin(int gpio_num, ledc_mode_t speed_mode, ledc_channel_t ledc_channel)
+    __attribute__((deprecated("use ledc_channel_config instead")));
+/**
+ * @brief LEDC stop.
+ *        Disable LEDC output, and set idle level
+ *
+ * @param  speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param  channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @param  idle_level Set output idle level after LEDC stops.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t ledc_stop(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t idle_level);
+
+/**
+ * @brief LEDC set channel frequency (Hz)
+ *
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param  timer_num LEDC timer index (0-3), select from ledc_timer_t
+ * @param  freq_hz Set the LEDC frequency
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_FAIL Can not find a proper pre-divider number base on the given frequency and the current duty_resolution.
+ */
+esp_err_t ledc_set_freq(ledc_mode_t speed_mode, ledc_timer_t timer_num, uint32_t freq_hz);
+
+/**
+ * @brief      LEDC get channel frequency (Hz)
+ *
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param timer_num LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return
+ *     - 0  error
+ *     - Others Current LEDC frequency
+ */
+uint32_t ledc_get_freq(ledc_mode_t speed_mode, ledc_timer_t timer_num);
+
+/**
+ * @brief LEDC set duty and hpoint value
+ *        Only after calling ledc_update_duty will the duty update.
+ * @note  ledc_set_duty, ledc_set_duty_with_hpoint and ledc_update_duty are not thread-safe, do not call these functions to
+ *        control one LEDC channel in different tasks at the same time.
+ *        A thread-safe version of API is ledc_set_duty_and_update
+ * @note  If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
+ *        Other duty operations will have to wait until the fade operation has finished.
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @param duty Set the LEDC duty, the range of duty setting is [0, (2**duty_resolution) - 1]
+ * @param hpoint Set the LEDC hpoint value(max: 0xfffff)
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t ledc_set_duty_with_hpoint(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t duty, uint32_t hpoint);
+
+/**
+ * @brief LEDC get hpoint value, the counter value when the output is set high level.
+ *
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @return
+ *     - LEDC_ERR_VAL if parameter error
+ *     - Others Current hpoint value of LEDC channel
+ */
+int ledc_get_hpoint(ledc_mode_t speed_mode, ledc_channel_t channel);
+
+/**
+ * @brief LEDC set duty
+ *        This function do not change the hpoint value of this channel. if needed, please call ledc_set_duty_with_hpoint.
+ *        only after calling ledc_update_duty will the duty update.
+ * @note  ledc_set_duty, ledc_set_duty_with_hpoint and ledc_update_duty are not thread-safe, do not call these functions to
+ *        control one LEDC channel in different tasks at the same time.
+ *        A thread-safe version of API is ledc_set_duty_and_update.
+ * @note  If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
+ *        Other duty operations will have to wait until the fade operation has finished.
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @param duty Set the LEDC duty, the range of duty setting is [0, (2**duty_resolution) - 1]
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t ledc_set_duty(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t duty);
+
+/**
+ * @brief LEDC get duty
+ *        This function returns the duty at the present PWM cycle.
+ *        You shouldn't expect the function to return the new duty in the same cycle of calling ledc_update_duty,
+ *        because duty update doesn't take effect until the next cycle.
+ *
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ *
+ * @return
+ *     - LEDC_ERR_DUTY if parameter error
+ *     - Others Current LEDC duty
+ */
+uint32_t ledc_get_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
+
+/**
+ * @brief LEDC set gradient
+ *        Set LEDC gradient, After the function calls the ledc_update_duty function, the function can take effect.
+ * @note  If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
+ *        Other duty operations will have to wait until the fade operation has finished.
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @param duty Set the start of the gradient duty, the range of duty setting is [0, (2**duty_resolution) - 1]
+ * @param fade_direction Set the direction of the gradient
+ * @param step_num Set the number of the gradient
+ * @param duty_cycle_num Set how many LEDC tick each time the gradient lasts
+ * @param duty_scale Set gradient change amplitude
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t ledc_set_fade(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t duty, ledc_duty_direction_t fade_direction,
+                        uint32_t step_num, uint32_t duty_cycle_num, uint32_t duty_scale);
+
+/**
+ * @brief Register LEDC interrupt handler, the handler is an ISR.
+ *        The handler will be attached to the same CPU core that this function is running on.
+ *
+ * @param fn Interrupt handler function.
+ * @param arg User-supplied argument passed to the handler function.
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ * @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
+ *        be returned here.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Function pointer error.
+ */
+esp_err_t ledc_isr_register(void (*fn)(void*), void * arg, int intr_alloc_flags, ledc_isr_handle_t *handle);
+
+/**
+ * @brief Configure LEDC settings
+ *
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param timer_sel  Timer index (0-3), there are 4 timers in LEDC module
+ * @param clock_divider Timer clock divide value, the timer clock is divided from the selected clock source
+ * @param duty_resolution Resolution of duty setting in number of bits. The range of duty values is [0, (2**duty_resolution)]
+ * @param clk_src Select LEDC source clock.
+ *
+ * @return
+ *     - (-1) Parameter error
+ *     - Other Current LEDC duty
+ */
+esp_err_t ledc_timer_set(ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t clock_divider, uint32_t duty_resolution, ledc_clk_src_t clk_src);
+
+/**
+ * @brief Reset LEDC timer
+ *
+ * @param  speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param  timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_OK Success
+ */
+esp_err_t ledc_timer_rst(ledc_mode_t speed_mode, ledc_timer_t timer_sel);
+
+/**
+ * @brief Pause LEDC timer counter
+ *
+ * @param  speed_mode  Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param  timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_OK Success
+ *
+ */
+esp_err_t ledc_timer_pause(ledc_mode_t speed_mode, ledc_timer_t timer_sel);
+
+/**
+ * @brief Resume LEDC timer
+ *
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_OK Success
+ */
+esp_err_t ledc_timer_resume(ledc_mode_t speed_mode, ledc_timer_t timer_sel);
+
+/**
+ * @brief Bind LEDC channel with the selected timer
+ *
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel index (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_OK Success
+ */
+esp_err_t ledc_bind_channel_timer(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_timer_t timer_sel);
+
+/**
+ * @brief Set LEDC fade function.
+ * @note  Call ledc_fade_func_install() once before calling this function.
+ *        Call ledc_fade_start() after this to start fading.
+ * @note  ledc_set_fade_with_step, ledc_set_fade_with_time and ledc_fade_start are not thread-safe, do not call these functions to
+ *        control one LEDC channel in different tasks at the same time.
+ *        A thread-safe version of API is ledc_set_fade_step_and_start
+ * @note  If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
+ *        Other duty operations will have to wait until the fade operation has finished.
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode. ,
+ * @param channel LEDC channel index (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @param target_duty Target duty of fading [0, (2**duty_resolution) - 1]
+ * @param scale Controls the increase or decrease step scale.
+ * @param cycle_num increase or decrease the duty every cycle_num cycles
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE Fade function not installed.
+ *     - ESP_FAIL Fade function init error
+ */
+esp_err_t ledc_set_fade_with_step(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t target_duty, uint32_t scale, uint32_t cycle_num);
+
+/**
+ * @brief Set LEDC fade function, with a limited time.
+ * @note  Call ledc_fade_func_install() once before calling this function.
+ *        Call ledc_fade_start() after this to start fading.
+ * @note  ledc_set_fade_with_step, ledc_set_fade_with_time and ledc_fade_start are not thread-safe, do not call these functions to
+ *        control one LEDC channel in different tasks at the same time.
+ *        A thread-safe version of API is ledc_set_fade_step_and_start
+ * @note  If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
+ *        Other duty operations will have to wait until the fade operation has finished.
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode. ,
+ * @param channel LEDC channel index (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @param target_duty Target duty of fading [0, (2**duty_resolution) - 1]
+ * @param max_fade_time_ms The maximum time of the fading ( ms ).
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE Fade function not installed.
+ *     - ESP_FAIL Fade function init error
+ */
+esp_err_t ledc_set_fade_with_time(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t target_duty, int max_fade_time_ms);
+
+/**
+ * @brief Install LEDC fade function. This function will occupy interrupt of LEDC module.
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE Fade function already installed.
+ */
+esp_err_t ledc_fade_func_install(int intr_alloc_flags);
+
+/**
+ * @brief Uninstall LEDC fade function.
+ *
+ */
+void ledc_fade_func_uninstall(void);
+
+/**
+ * @brief Start LEDC fading.
+ * @note  Call ledc_fade_func_install() once before calling this function.
+ *        Call this API right after ledc_set_fade_with_time or ledc_set_fade_with_step before to start fading.
+ * @note  If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
+ *        Other duty operations will have to wait until the fade operation has finished.
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel number
+ * @param fade_mode Whether to block until fading done. See ledc_types.h ledc_fade_mode_t for more info.
+ *        Note that this function will not return until fading to the target duty if LEDC_FADE_WAIT_DONE mode is selected.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE Fade function not installed.
+ *     - ESP_ERR_INVALID_ARG Parameter error.
+ */
+esp_err_t ledc_fade_start(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_fade_mode_t fade_mode);
+
+/**
+ * @brief A thread-safe API to set duty for LEDC channel and return when duty updated.
+ * @note  If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
+ *        Other duty operations will have to wait until the fade operation has finished.
+ *
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @param duty Set the LEDC duty, the range of duty setting is [0, (2**duty_resolution) - 1]
+ * @param hpoint Set the LEDC hpoint value(max: 0xfffff)
+ *
+ */
+esp_err_t ledc_set_duty_and_update(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t duty, uint32_t hpoint);
+
+/**
+ * @brief A thread-safe API to set and start LEDC fade function, with a limited time.
+ * @note  Call ledc_fade_func_install() once, before calling this function.
+ * @note  If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
+ *        Other duty operations will have to wait until the fade operation has finished.
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel index (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @param target_duty Target duty of fading [0, (2**duty_resolution) - 1]
+ * @param max_fade_time_ms The maximum time of the fading ( ms ).
+ * @param fade_mode choose blocking or non-blocking mode
+ * @return
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE Fade function not installed.
+ *     - ESP_FAIL Fade function init error
+ */
+esp_err_t ledc_set_fade_time_and_start(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t target_duty, uint32_t max_fade_time_ms, ledc_fade_mode_t fade_mode);
+
+/**
+ * @brief A thread-safe API to set and start LEDC fade function.
+ * @note  Call ledc_fade_func_install() once before calling this function.
+ * @note  If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
+ *        Other duty operations will have to wait until the fade operation has finished.
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel index (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @param target_duty Target duty of fading [0, (2**duty_resolution) - 1]
+ * @param scale Controls the increase or decrease step scale.
+ * @param cycle_num increase or decrease the duty every cycle_num cycles
+ * @param fade_mode choose blocking or non-blocking mode
+ * @return
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE Fade function not installed.
+ *     - ESP_FAIL Fade function init error
+ */
+esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t target_duty, uint32_t scale, uint32_t cycle_num, ledc_fade_mode_t fade_mode);
+
+/**
+ * @brief LEDC callback registration function
+ * @note  The callback is called from an ISR, it must never attempt to block, and any FreeRTOS API called must be ISR capable.
+ * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
+ * @param channel LEDC channel index (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
+ * @param cbs Group of LEDC callback functions
+ * @param user_arg user registered data for the callback function
+ * @return
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE Fade function not installed.
+ *     - ESP_FAIL Fade function init error
+ */
+esp_err_t ledc_cb_register(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_cbs_t *cbs, void *user_arg);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/mcpwm.h b/tools/sdk/esp32s3/include/driver/include/driver/mcpwm.h
new file mode 100644
index 00000000000..fed2c3f326d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/mcpwm.h
@@ -0,0 +1,931 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "soc/soc_caps.h"
+#if SOC_MCPWM_SUPPORTED
+#include "esp_err.h"
+#include "soc/soc.h"
+#include "driver/gpio.h"
+#include "esp_intr_alloc.h"
+#include "hal/mcpwm_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief IO signals for the MCPWM
+ *
+ *        - 6 MCPWM output pins that generate PWM signals
+ *        - 3 MCPWM fault input pins to detect faults like overcurrent, overvoltage, etc.
+ *        - 3 MCPWM sync input pins to synchronize MCPWM outputs signals
+ *        - 3 MCPWM capture input pins to gather feedback from controlled motors, using e.g. hall sensors
+ */
+typedef enum {
+    MCPWM0A = 0,        /*!<PWM0A output pin*/
+    MCPWM0B,            /*!<PWM0B output pin*/
+    MCPWM1A,            /*!<PWM1A output pin*/
+    MCPWM1B,            /*!<PWM1B output pin*/
+    MCPWM2A,            /*!<PWM2A output pin*/
+    MCPWM2B,            /*!<PWM2B output pin*/
+    MCPWM_SYNC_0,       /*!<SYNC0  input pin*/
+    MCPWM_SYNC_1,       /*!<SYNC1  input pin*/
+    MCPWM_SYNC_2,       /*!<SYNC2  input pin*/
+    MCPWM_FAULT_0,      /*!<FAULT0 input pin*/
+    MCPWM_FAULT_1,      /*!<FAULT1 input pin*/
+    MCPWM_FAULT_2,      /*!<FAULT2 input pin*/
+    MCPWM_CAP_0 = 84,   /*!<CAP0   input pin*/
+    MCPWM_CAP_1,        /*!<CAP1   input pin*/
+    MCPWM_CAP_2,        /*!<CAP2   input pin*/
+} mcpwm_io_signals_t;
+
+/**
+ * @brief pin number for MCPWM
+ */
+typedef struct {
+    int mcpwm0a_out_num;       /*!<MCPWM0A out pin*/
+    int mcpwm0b_out_num;       /*!<MCPWM0A out pin*/
+    int mcpwm1a_out_num;       /*!<MCPWM0A out pin*/
+    int mcpwm1b_out_num;       /*!<MCPWM0A out pin*/
+    int mcpwm2a_out_num;       /*!<MCPWM0A out pin*/
+    int mcpwm2b_out_num;       /*!<MCPWM0A out pin*/
+    int mcpwm_sync0_in_num;    /*!<SYNC0  in pin*/
+    int mcpwm_sync1_in_num;    /*!<SYNC1  in pin*/
+    int mcpwm_sync2_in_num;    /*!<SYNC2  in pin*/
+    int mcpwm_fault0_in_num;   /*!<FAULT0 in pin*/
+    int mcpwm_fault1_in_num;   /*!<FAULT1 in pin*/
+    int mcpwm_fault2_in_num;   /*!<FAULT2 in pin*/
+    int mcpwm_cap0_in_num;     /*!<CAP0   in pin*/
+    int mcpwm_cap1_in_num;     /*!<CAP1   in pin*/
+    int mcpwm_cap2_in_num;     /*!<CAP2   in pin*/
+} mcpwm_pin_config_t;
+
+/**
+ * @brief Select MCPWM unit
+ */
+typedef enum {
+    MCPWM_UNIT_0,   /*!<MCPWM unit0 selected*/
+    MCPWM_UNIT_1,   /*!<MCPWM unit1 selected*/
+    MCPWM_UNIT_MAX, /*!<Max number of MCPWM units*/
+} mcpwm_unit_t;
+
+_Static_assert(MCPWM_UNIT_MAX == SOC_MCPWM_GROUPS, "MCPWM unit number not equal to chip capabilities");
+
+/**
+ * @brief Select MCPWM timer
+ */
+typedef enum {
+    MCPWM_TIMER_0,   /*!<Select MCPWM timer0*/
+    MCPWM_TIMER_1,   /*!<Select MCPWM timer1*/
+    MCPWM_TIMER_2,   /*!<Select MCPWM timer2*/
+    MCPWM_TIMER_MAX, /*!<Max number of timers in a unit*/
+} mcpwm_timer_t;
+
+/**
+ * @brief Select MCPWM operator
+ */
+typedef enum {
+    MCPWM_GEN_A,   /*!<Select MCPWMXA, where 'X' is operator number*/
+    MCPWM_GEN_B,   /*!<Select MCPWMXB, where 'X' is operator number*/
+    MCPWM_GEN_MAX, /*!<Num of generators to each operator of MCPWM*/
+} mcpwm_generator_t;
+
+//definitions and macros to be back-compatible before IDFv4.1
+#define MCPWM_OPR_A     MCPWM_GEN_A         ///< @deprecated
+#define MCPWM_OPR_B     MCPWM_GEN_B         ///< @deprecated
+#define MCPWM_OPR_MAX   MCPWM_GEN_MAX       ///< @deprecated
+typedef mcpwm_generator_t mcpwm_operator_t; ///< @deprecated
+
+/**
+ * @brief MCPWM carrier oneshot mode, in this mode the width of the first pulse of carrier can be programmed
+ */
+typedef enum {
+    MCPWM_ONESHOT_MODE_DIS, /*!<Enable oneshot mode*/
+    MCPWM_ONESHOT_MODE_EN,  /*!<Disable oneshot mode*/
+} mcpwm_carrier_os_t;
+
+/**
+ * @brief MCPWM carrier output inversion, high frequency carrier signal active with MCPWM signal is high
+ */
+typedef enum {
+    MCPWM_CARRIER_OUT_IVT_DIS, /*!<Enable  carrier output inversion*/
+    MCPWM_CARRIER_OUT_IVT_EN,  /*!<Disable carrier output inversion*/
+} mcpwm_carrier_out_ivt_t;
+
+/**
+ * @brief MCPWM select fault signal input
+ */
+typedef enum {
+    MCPWM_SELECT_F0, /*!<Select F0 as input*/
+    MCPWM_SELECT_F1, /*!<Select F1 as input*/
+    MCPWM_SELECT_F2, /*!<Select F2 as input*/
+} mcpwm_fault_signal_t;
+
+/**
+ * @brief MCPWM select sync signal input
+ */
+typedef enum {
+    MCPWM_SELECT_NO_INPUT,        /*!<No sync input selected*/
+    MCPWM_SELECT_TIMER0_SYNC,     /*!<Select software sync signal from timer0 as input*/
+    MCPWM_SELECT_TIMER1_SYNC,     /*!<Select software sync signal from timer1 as input*/
+    MCPWM_SELECT_TIMER2_SYNC,     /*!<Select software sync signal from timer2 as input*/
+    MCPWM_SELECT_GPIO_SYNC0,      /*!<Select GPIO SYNC0 as input*/
+    MCPWM_SELECT_GPIO_SYNC1,      /*!<Select GPIO SYNC1 as input*/
+    MCPWM_SELECT_GPIO_SYNC2,      /*!<Select GPIO SYNC2 as input*/
+} mcpwm_sync_signal_t;
+
+ // backward compatibility
+#define MCPWM_SELCT_SYNC0 MCPWM_SELCT_GPIO_SYNC0
+#define MCPWM_SELCT_SYNC1 MCPWM_SELCT_GPIO_SYNC1
+#define MCPWM_SELCT_SYNC2 MCPWM_SELCT_GPIO_SYNC2
+
+/**
+ * @brief MCPWM timer sync event trigger
+ */
+typedef enum {
+    MCPWM_SWSYNC_SOURCE_SYNCIN,      /*!<the input sync signal will be routed to its sync output path*/
+    MCPWM_SWSYNC_SOURCE_TEZ,         /*!<sync signal generated when timer counts to zero*/
+    MCPWM_SWSYNC_SOURCE_TEP,         /*!<sync signal generated when timer counts to peak*/
+    MCPWM_SWSYNC_SOURCE_DISABLED,    /*!<timer does not generate sync signals*/
+} mcpwm_timer_sync_trigger_t;
+
+/**
+ * @brief MCPWM select triggering level of fault signal
+ */
+typedef enum {
+    MCPWM_LOW_LEVEL_TGR,  /*!<Fault condition occurs when fault input signal goes from high to low*/
+    MCPWM_HIGH_LEVEL_TGR, /*!<Fault condition occurs when fault input signal goes low to high*/
+} mcpwm_fault_input_level_t;
+
+/**
+ * @brief MCPWM select capture starts from which edge
+ */
+typedef enum {
+    MCPWM_NEG_EDGE = BIT(0),           /*!<Capture the negative edge*/
+    MCPWM_POS_EDGE = BIT(1),           /*!<Capture the positive edge*/
+    MCPWM_BOTH_EDGE = BIT(1) | BIT(0), /*!<Capture both edges*/
+} mcpwm_capture_on_edge_t;
+
+/**
+ * @brief Interrupt masks for MCPWM capture
+ */
+typedef enum {
+    MCPWM_LL_INTR_CAP0 = BIT(27), ///< Capture 0 happened
+    MCPWM_LL_INTR_CAP1 = BIT(28), ///< Capture 1 happened
+    MCPWM_LL_INTR_CAP2 = BIT(29), ///< Capture 2 happened
+} mcpwm_intr_t;
+
+/**
+ * @brief Select type of MCPWM counter
+ */
+typedef enum {
+    MCPWM_FREEZE_COUNTER,   /*!<Counter freeze */
+    MCPWM_UP_COUNTER,       /*!<For asymmetric MCPWM*/
+    MCPWM_DOWN_COUNTER,     /*!<For asymmetric MCPWM*/
+    MCPWM_UP_DOWN_COUNTER,  /*!<For symmetric MCPWM, frequency is half of MCPWM frequency set*/
+    MCPWM_COUNTER_MAX,      /*!<Maximum counter mode*/
+} mcpwm_counter_type_t;
+
+/**
+ * @brief Select type of MCPWM duty cycle mode
+ */
+typedef enum {
+    MCPWM_DUTY_MODE_0 = 0, /*!<Active high duty, i.e. duty cycle proportional to high time for asymmetric MCPWM*/
+    MCPWM_DUTY_MODE_1,     /*!<Active low duty,  i.e. duty cycle proportional to low  time for asymmetric MCPWM, out of phase(inverted) MCPWM*/
+    MCPWM_HAL_GENERATOR_MODE_FORCE_LOW,
+    MCPWM_HAL_GENERATOR_MODE_FORCE_HIGH,
+    MCPWM_DUTY_MODE_MAX,   /*!<Num of duty cycle modes*/
+} mcpwm_duty_type_t;
+
+/**
+ * @brief MCPWM deadtime types, used to generate deadtime, RED refers to rising edge delay and FED refers to falling edge delay
+ */
+typedef enum {
+    MCPWM_DEADTIME_BYPASS = 0,          /*!<Bypass the deadtime*/
+    MCPWM_BYPASS_RED,                   /*!<MCPWMXA Out = MCPWMXA In with no delay, MCPWMXB Out = MCPWMXA In with falling edge delay*/
+    MCPWM_BYPASS_FED,                   /*!<MCPWMXA Out = MCPWMXA In with rising edge delay, MCPWMXB Out = MCPWMXB In with no delay*/
+    MCPWM_ACTIVE_HIGH_MODE,             /*!<MCPWMXA Out = MCPWMXA In with rising edge delay,  MCPWMXB Out = MCPWMXA In with falling edge delay*/
+    MCPWM_ACTIVE_LOW_MODE,              /*!<MCPWMXA Out = MCPWMXA In with compliment of rising edge delay,  MCPWMXB Out = MCPWMXA In with compliment of falling edge delay*/
+    MCPWM_ACTIVE_HIGH_COMPLIMENT_MODE,  /*!<MCPWMXA Out = MCPWMXA In with rising edge delay,  MCPWMXB = MCPWMXA In with compliment of falling edge delay*/
+    MCPWM_ACTIVE_LOW_COMPLIMENT_MODE,   /*!<MCPWMXA Out = MCPWMXA In with compliment of rising edge delay,  MCPWMXB Out = MCPWMXA In with falling edge delay*/
+    MCPWM_ACTIVE_RED_FED_FROM_PWMXA,    /*!<MCPWMXA Out = MCPWMXB Out = MCPWMXA In with rising edge delay as well as falling edge delay*/
+    MCPWM_ACTIVE_RED_FED_FROM_PWMXB,    /*!<MCPWMXA Out = MCPWMXB Out = MCPWMXB In with rising edge delay as well as falling edge delay*/
+    MCPWM_DEADTIME_TYPE_MAX,            /*!<Maximum number of supported dead time modes*/
+} mcpwm_deadtime_type_t;
+
+/**
+ * @brief MCPWM select action to be taken on the output when event happens
+ */
+typedef enum {
+    MCPWM_ACTION_NO_CHANGE = 0,  /*!<No change in the output*/
+    MCPWM_ACTION_FORCE_LOW,      /*!<Make output low*/
+    MCPWM_ACTION_FORCE_HIGH,     /*!<Make output high*/
+    MCPWM_ACTION_TOGGLE,         /*!<Make output toggle*/
+} mcpwm_output_action_t;
+
+/// @deprecated MCPWM select action to be taken on MCPWMXA when fault occurs
+typedef mcpwm_output_action_t mcpwm_action_on_pwmxa_t;
+#define MCPWM_NO_CHANGE_IN_MCPWMXA  MCPWM_ACTION_NO_CHANGE      /*!< @deprecated No change in MCPWMXA output*/
+#define MCPWM_FORCE_MCPWMXA_LOW     MCPWM_ACTION_FORCE_LOW      /*!< @deprecated Make MCPWMXA output low*/
+#define MCPWM_FORCE_MCPWMXA_HIGH    MCPWM_ACTION_FORCE_HIGH     /*!< @deprecated Make MCPWMXA output high*/
+#define MCPWM_TOG_MCPWMXA           MCPWM_ACTION_TOGGLE         /*!< @deprecated Make MCPWMXA output toggle*/
+
+/// @deprecated MCPWM select action to be taken on MCPWMXB when fault occurs
+typedef mcpwm_output_action_t mcpwm_action_on_pwmxb_t;
+#define MCPWM_NO_CHANGE_IN_MCPWMXB  MCPWM_ACTION_NO_CHANGE      /*!< @deprecated No change in MCPWMXB output*/
+#define MCPWM_FORCE_MCPWMXB_LOW     MCPWM_ACTION_FORCE_LOW      /*!< @deprecated Make MCPWMXB output low*/
+#define MCPWM_FORCE_MCPWMXB_HIGH    MCPWM_ACTION_FORCE_HIGH     /*!< @deprecated Make MCPWMXB output high*/
+#define MCPWM_TOG_MCPWMXB           MCPWM_ACTION_TOGGLE         /*!< @deprecated Make MCPWMXB output toggle*/
+
+/**
+ * @brief MCPWM select capture signal input
+ */
+typedef enum {
+    MCPWM_SELECT_CAP0, /*!<Select CAP0 as input*/
+    MCPWM_SELECT_CAP1, /*!<Select CAP1 as input*/
+    MCPWM_SELECT_CAP2, /*!<Select CAP2 as input*/
+} mcpwm_capture_signal_t;
+
+/**
+ * @brief MCPWM capture channel ID alias
+ */
+typedef mcpwm_capture_signal_t mcpwm_capture_channel_id_t;
+
+/**
+ * @brief event data that will be passed into ISR callback
+ */
+typedef struct {
+    mcpwm_capture_on_edge_t cap_edge;   /*!<Which signal edge is detected*/
+    uint32_t cap_value;                 /*!<Corresponding timestamp when event occurs. Clock rate = APB(usually 80M)*/
+} cap_event_data_t;
+
+/**
+ * @brief Type of capture event callback
+ * @param mcpwm MCPWM unit(0-1)
+ * @param cap_channel capture channel ID
+ * @param edata Capture event data, contains capture edge and capture value, fed by the driver
+ * @param user_data User registered data, passed from `mcpwm_capture_config_t`
+ *
+ * @note Since this an ISR callback so do not do anything that may block and call APIs that is designed to be used within ISR(usually has '_ISR' postfix)
+ *
+ * @return Whether a task switch is needed after the callback function returns,
+ *         this is usually due to the callback wakes up some high priority task.
+ *
+ */
+typedef bool (*cap_isr_cb_t)(mcpwm_unit_t mcpwm, mcpwm_capture_channel_id_t cap_channel, const cap_event_data_t *edata,
+                             void *user_data);
+
+/**
+ * @brief MCPWM config structure
+ */
+typedef struct {
+    uint32_t frequency;              /*!<Set frequency of MCPWM in Hz*/
+    float cmpr_a;                    /*!<Set % duty cycle for operator a(MCPWMXA), i.e for 62.3% duty cycle, duty_a = 62.3*/
+    float cmpr_b;                    /*!<Set % duty cycle for operator b(MCPWMXB), i.e for 48% duty cycle, duty_b = 48.0*/
+    mcpwm_duty_type_t duty_mode;     /*!<Set type of duty cycle*/
+    mcpwm_counter_type_t counter_mode;  /*!<Set  type of MCPWM counter*/
+} mcpwm_config_t;
+
+/**
+ * @brief MCPWM carrier configuration structure
+ */
+typedef struct {
+    uint8_t carrier_period;                    /*!<Set carrier period = (carrier_period + 1)*800ns, carrier_period should be < 16*/
+    uint8_t carrier_duty;                      /*!<Set carrier duty cycle, carrier_duty should be less than 8 (increment every 12.5%)*/
+    uint8_t pulse_width_in_os;                 /*!<Set pulse width of first pulse in one shot mode = (carrier period)*(pulse_width_in_os + 1), should be less then 16*/
+    mcpwm_carrier_os_t carrier_os_mode;        /*!<Enable or disable carrier oneshot mode*/
+    mcpwm_carrier_out_ivt_t carrier_ivt_mode;  /*!<Invert output of carrier*/
+} mcpwm_carrier_config_t;
+
+/**
+ * @brief MCPWM config capture structure
+ */
+typedef struct {
+    mcpwm_capture_on_edge_t cap_edge;      /*!<Set capture edge*/
+    uint32_t cap_prescale;                 /*!<Prescale of capture signal, ranging from 1 to 256*/
+    cap_isr_cb_t capture_cb;               /*!<User defined capture event callback, running under interrupt context */
+    void *user_data;                       /*!<User defined ISR callback function args*/
+} mcpwm_capture_config_t;
+
+/**
+ * @brief MCPWM config sync structure
+ */
+typedef struct {
+    mcpwm_sync_signal_t sync_sig;              /*!<Set sync input signal that will cause timer to sync*/
+    uint32_t timer_val;                        /*!<Counter value to be set after sync, in 0 ~ 999, unit: 1 / 1000 * peak*/
+    mcpwm_timer_direction_t count_direction;   /*!<Counting direction to be set after sync */
+} mcpwm_sync_config_t;
+
+/**
+ * @brief This function initializes each gpio signal for MCPWM
+ *
+ * @note This function initializes one gpio at a time.
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param io_signal set MCPWM signals, each MCPWM unit has 6 output(MCPWMXA, MCPWMXB) and 9 input(SYNC_X, FAULT_X, CAP_X)
+ *                  'X' is timer_num(0-2)
+ * @param gpio_num set this to configure gpio for MCPWM, if you want to use gpio16, gpio_num = 16
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_gpio_init(mcpwm_unit_t mcpwm_num, mcpwm_io_signals_t io_signal, int gpio_num);
+
+/**
+ * @brief Initialize MCPWM gpio structure
+ *
+ * @note This function initialize a group of MCPWM GPIOs at a time.
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param mcpwm_pin MCPWM pin structure
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_set_pin(mcpwm_unit_t mcpwm_num, const mcpwm_pin_config_t *mcpwm_pin);
+
+/**
+ * @brief Initialize MCPWM parameters
+ * @note
+ *        The default resolution configured for MCPWM group and timer are 160M / 16 = 10M and 10M / 10 = 1M
+ *        The default resolution can be changed by calling mcpwm_group_set_resolution() and mcpwm_timer_set_resolution(),
+ *        before calling this function.
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers.
+ * @param mcpwm_conf configure structure mcpwm_config_t
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_init( mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, const mcpwm_config_t  *mcpwm_conf);
+
+/**
+ * @brief Set resolution of the MCPWM group
+ * @note
+ *        This will override default resolution of group(=10,000,000).
+ *        This WILL NOT automatically update frequency and duty. Call mcpwm_set_frequency() and mcpwm_set_duty() manually
+ *        to set them back.
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param resolution set expected frequency resolution
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_group_set_resolution(mcpwm_unit_t mcpwm_num, unsigned long int resolution);
+
+/**
+ * @brief Set resolution of each timer
+ * @note
+ *        This WILL override default resolution of timer(=1,000,000).
+ *        This WILL NOT automatically update frequency and duty. Call mcpwm_set_frequency() and mcpwm_set_duty() manually
+ *        to set them back.
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param resolution set expected frequency resolution
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_timer_set_resolution(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, unsigned long int resolution);
+
+/**
+ * @brief Set frequency(in Hz) of MCPWM timer
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param frequency set the frequency in Hz of each timer
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_set_frequency(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, uint32_t frequency);
+
+/**
+ * @brief Set duty cycle of each operator(MCPWMXA/MCPWMXB)
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param gen set the generator(MCPWMXA/MCPWMXB), 'X' is operator number selected
+ * @param duty set duty cycle in %(i.e for 62.3% duty cycle, duty = 62.3) of each operator
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_set_duty(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_generator_t gen, float duty);
+
+/**
+ * @brief Set duty cycle of each operator(MCPWMXA/MCPWMXB) in us
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param gen set the generator(MCPWMXA/MCPWMXB), 'x' is operator number selected
+ * @param duty_in_us set duty value in microseconds of each operator
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_set_duty_in_us(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_generator_t gen, uint32_t duty_in_us);
+
+/**
+ * @brief Set duty either active high or active low(out of phase/inverted)
+ * @note
+ *        Call this function every time after mcpwm_set_signal_high or mcpwm_set_signal_low to resume with previously set duty cycle
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param gen set the generator(MCPWMXA/MCPWMXB), 'x' is operator number selected
+ * @param duty_type set active low or active high duty type
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_set_duty_type(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_generator_t gen, mcpwm_duty_type_t duty_type);
+
+/**
+* @brief Get frequency of timer
+*
+* @param mcpwm_num set MCPWM unit(0-1)
+* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+*
+* @return
+*     - frequency of timer
+*/
+uint32_t mcpwm_get_frequency(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
+
+/**
+ * @brief Get duty cycle of each operator
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param gen set the generator(MCPWMXA/MCPWMXB), 'x' is operator number selected
+ *
+ * @return
+ *     - duty cycle in % of each operator(56.7 means duty is 56.7%)
+ */
+float mcpwm_get_duty(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_operator_t gen);
+
+/**
+ * @brief Get duty cycle of each operator in us
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param gen set the generator(MCPWMXA/MCPWMXB), 'x' is operator number selected
+ *
+ * @return
+ *     - duty cycle in us of each operator
+ */
+uint32_t mcpwm_get_duty_in_us(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_operator_t gen);
+
+/**
+ * @brief Use this function to set MCPWM signal high
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param gen set the operator(MCPWMXA/MCPWMXB), 'x' is timer number selected
+
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_set_signal_high(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_generator_t gen);
+
+/**
+ * @brief Use this function to set MCPWM signal low
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param gen set the operator(MCPWMXA/MCPWMXB), 'x' is timer number selected
+
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_set_signal_low(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_generator_t gen);
+
+/**
+ * @brief Start MCPWM signal on timer 'x'
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_start(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
+
+/**
+ * @brief Start MCPWM signal on timer 'x'
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_stop(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
+
+/**
+ * @brief  Initialize carrier configuration
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param carrier_conf configure structure mcpwm_carrier_config_t
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_carrier_init(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, const mcpwm_carrier_config_t *carrier_conf);
+
+/**
+* @brief Enable MCPWM carrier submodule, for respective timer
+*
+* @param mcpwm_num set MCPWM unit(0-1)
+* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+*
+* @return
+*     - ESP_OK Success
+*     - ESP_ERR_INVALID_ARG Parameter error
+*/
+esp_err_t mcpwm_carrier_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
+
+/**
+ * @brief Disable MCPWM carrier submodule, for respective timer
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_carrier_disable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
+
+/**
+ * @brief Set period of carrier
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param carrier_period set the carrier period of each timer, carrier period = (carrier_period + 1)*800ns
+ *                    (carrier_period <= 15)
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_carrier_set_period(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, uint8_t carrier_period);
+
+/**
+ * @brief Set duty_cycle of carrier
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param carrier_duty set duty_cycle of carrier , carrier duty cycle = carrier_duty*12.5%
+ *                  (chop_duty <= 7)
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_carrier_set_duty_cycle(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, uint8_t carrier_duty);
+
+/**
+ * @brief Enable and set width of first pulse in carrier oneshot mode
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param pulse_width set pulse width of first pulse in oneshot mode, width = (carrier period)*(pulse_width +1)
+ *                    (pulse_width <= 15)
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_carrier_oneshot_mode_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, uint8_t pulse_width);
+
+/**
+ * @brief Disable oneshot mode, width of first pulse = carrier period
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_carrier_oneshot_mode_disable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
+
+/**
+ * @brief Enable or disable carrier output inversion
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param carrier_ivt_mode enable or disable carrier output inversion
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_carrier_output_invert(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num,
+                                      mcpwm_carrier_out_ivt_t carrier_ivt_mode);
+
+/**
+ * @brief Enable and initialize deadtime for each MCPWM timer
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param dt_mode set deadtime mode
+ * @param red set rising edge delay = red*100ns
+ * @param fed set rising edge delay = fed*100ns
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_deadtime_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_deadtime_type_t dt_mode,
+                                uint32_t red, uint32_t fed);
+
+/**
+ * @brief Disable deadtime on MCPWM timer
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_deadtime_disable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
+
+/**
+ * @brief Initialize fault submodule, currently low level triggering is not supported
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param intput_level set fault signal level, which will cause fault to occur
+ * @param fault_sig set the fault pin, which needs to be enabled
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_fault_init(mcpwm_unit_t mcpwm_num, mcpwm_fault_input_level_t intput_level, mcpwm_fault_signal_t fault_sig);
+
+/**
+ * @brief Set oneshot mode on fault detection, once fault occur in oneshot mode reset is required to resume MCPWM signals
+ * @note
+ *        currently low level triggering is not supported
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param fault_sig set the fault pin, which needs to be enabled for oneshot mode
+ * @param action_on_pwmxa action to be taken on MCPWMXA when fault occurs, either no change or high or low or toggle
+ * @param action_on_pwmxb action to be taken on MCPWMXB when fault occurs, either no change or high or low or toggle
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_fault_set_oneshot_mode(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_fault_signal_t fault_sig,
+                                       mcpwm_output_action_t action_on_pwmxa, mcpwm_output_action_t action_on_pwmxb);
+
+/**
+ * @brief Set cycle-by-cycle mode on fault detection, once fault occur in cyc mode MCPWM signal resumes as soon as fault signal becomes inactive
+ * @note
+ *        currently low level triggering is not supported
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param fault_sig set the fault pin, which needs to be enabled for cyc mode
+ * @param action_on_pwmxa action to be taken on MCPWMXA when fault occurs, either no change or high or low or toggle
+ * @param action_on_pwmxb action to be taken on MCPWMXB when fault occurs, either no change or high or low or toggle
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_fault_set_cyc_mode(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_fault_signal_t fault_sig,
+                                   mcpwm_output_action_t action_on_pwmxa, mcpwm_output_action_t action_on_pwmxb);
+
+/**
+ * @brief Disable fault signal
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param fault_sig fault pin, which needs to be disabled
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_fault_deinit(mcpwm_unit_t mcpwm_num, mcpwm_fault_signal_t fault_sig);
+
+/**
+ * @brief Initialize capture submodule
+ *
+ * @note Enabling capture feature would also enable the capture interrupt event,
+ *       users have to register an interrupt handler by `mcpwm_isr_register`, and in there, query the capture data.
+ * @note The capture timer uses APB_CLK (typically 80MHz) as the count source.
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param cap_edge set capture edge, BIT(0) - negative edge, BIT(1) - positive edge
+ * @param cap_sig capture pin, which needs to be enabled
+ * @param num_of_pulse Input capture signal prescaling, ranges from 0 to 255, representing prescaling from 1 to 256.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+__attribute__((deprecated("please use mcpwm_capture_enable_channel instead")))
+esp_err_t mcpwm_capture_enable(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig, mcpwm_capture_on_edge_t cap_edge,
+                               uint32_t num_of_pulse);
+
+/**
+ * @brief Disable capture signal
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param cap_sig capture pin, which needs to be disabled
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+__attribute__((deprecated("please use mcpwm_capture_disable_channel instead")))
+esp_err_t mcpwm_capture_disable(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig);
+
+/**
+ * @brief Enable capture channel
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param cap_channel capture channel, which needs to be enabled
+ * @param cap_conf capture channel configuration
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_capture_enable_channel(mcpwm_unit_t mcpwm_num, mcpwm_capture_channel_id_t cap_channel, const mcpwm_capture_config_t *cap_conf);
+
+/**
+ * @brief Disable capture channel
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param cap_channel capture channel, which needs to be disabled
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_capture_disable_channel(mcpwm_unit_t mcpwm_num, mcpwm_capture_channel_id_t cap_channel);
+
+/**
+ * @brief Get capture value
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param cap_sig capture channel on which value is to be measured
+ *
+ * @return
+ *     Captured value
+ */
+uint32_t mcpwm_capture_signal_get_value(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig);
+
+/**
+ * @brief Get edge of capture signal
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param cap_sig capture channel of whose edge is to be determined
+ *
+ * @return
+ *     Capture signal edge: 1 - positive edge, 2 - negtive edge
+ */
+uint32_t mcpwm_capture_signal_get_edge(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig);
+
+/**
+ * @brief Initialize sync submodule and sets the signal that will cause the timer be loaded with pre-defined value
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param sync_sig set the synchronization input signal
+ * @param phase_val phase value in 1/1000 (for 86.7%, phase_val = 867) which timer moves to on sync signal
+ *
+ * @note Count direction is undefined within this API
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+__attribute__((deprecated("please use mcpwm_sync_configure() instead")))
+esp_err_t mcpwm_sync_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_sync_signal_t sync_sig,
+                            uint32_t phase_val);
+
+/**
+ * @brief Initialize sync submodule and sets the signal that will cause the timer be loaded with pre-defined value
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param sync_conf sync configuration on this timer
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_sync_configure(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, const mcpwm_sync_config_t *sync_conf);
+
+/**
+ * @brief Disable sync submodule on given timer
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_sync_disable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
+
+/**
+ * @brief Set sync output on given timer
+ *        Configures what event triggers MCPWM timer to output a sync signal.
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ * @param trigger set the trigger that will cause the timer to generate a software sync signal.
+ *                Specifically, `MCPWM_SWSYNC_SOURCE_DISABLED` will disable the timer from generating sync signal.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mcpwm_set_timer_sync_output(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_timer_sync_trigger_t trigger);
+
+/**
+ * @brief Trigger a software sync event and sends it to a specific timer.
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
+ *
+ * @note This software sync event will have the same effect as hw one, except that:
+ *         - On esp32s3 the soft sync event can be routed to its output if `MCPWM_SWSYNC_SOURCE_SYNCIN` is selected via `mcpwm_set_timer_sync_output()`
+ *         - On esp32 there is no such behavior and soft sync event will only take effect on this timer and can not be propagated to others.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Function pointer error.
+ */
+esp_err_t mcpwm_timer_trigger_soft_sync(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
+
+/**
+ * @brief Set external GPIO sync input inverter
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param sync_sig set sync signal of MCPWM, only supports GPIO sync signal
+ * @param invert whether GPIO sync source input is inverted (to get negative edge trigger)
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Function pointer error.
+ */
+esp_err_t mcpwm_sync_invert_gpio_synchro(mcpwm_unit_t mcpwm_num, mcpwm_sync_signal_t sync_sig, bool invert);
+
+/**
+ * @brief Register MCPWM interrupt handler, the handler is an ISR.
+ *        the handler will be attached to the same CPU core that this function is running on.
+ *
+ * @param mcpwm_num set MCPWM unit(0-1)
+ * @param fn interrupt handler function.
+ * @param arg user-supplied argument passed to the handler function.
+ * @param intr_alloc_flags flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. see esp_intr_alloc.h for more info.
+ * @param handle pointer to return handle. If non-NULL, a handle for the interrupt will
+ *        be returned here.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Function pointer error.
+ */
+esp_err_t mcpwm_isr_register(mcpwm_unit_t mcpwm_num, void (*fn)(void *), void *arg, int intr_alloc_flags,
+                             intr_handle_t *handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  //SOC_MCPWM_SUPPORTED
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/pcnt.h b/tools/sdk/esp32s3/include/driver/include/driver/pcnt.h
new file mode 100644
index 00000000000..a9dcc05f0d9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/pcnt.h
@@ -0,0 +1,451 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "freertos/FreeRTOS.h"
+#include "esp_types.h"
+#include "esp_err.h"
+#include "esp_intr_alloc.h"
+#include "driver/gpio.h"
+#include "soc/soc_caps.h"
+#include "hal/pcnt_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define PCNT_PIN_NOT_USED     (-1)  /*!< When selected for a pin, this pin will not be used */
+
+typedef intr_handle_t pcnt_isr_handle_t;
+
+/**
+ * @brief PCNT port number, the max port number is (PCNT_PORT_MAX - 1).
+ */
+typedef enum {
+    PCNT_PORT_0,   /*!< PCNT port 0 */
+    PCNT_PORT_MAX, /*!< PCNT port max */
+} pcnt_port_t;
+
+/**
+ * @brief Selection of all available PCNT units
+ */
+typedef enum {
+    PCNT_UNIT_0, /*!< PCNT unit 0 */
+    PCNT_UNIT_1, /*!< PCNT unit 1 */
+    PCNT_UNIT_2, /*!< PCNT unit 2 */
+    PCNT_UNIT_3, /*!< PCNT unit 3 */
+#if SOC_PCNT_UNITS_PER_GROUP > 4
+    PCNT_UNIT_4, /*!< PCNT unit 4 */
+    PCNT_UNIT_5, /*!< PCNT unit 5 */
+    PCNT_UNIT_6, /*!< PCNT unit 6 */
+    PCNT_UNIT_7, /*!< PCNT unit 7 */
+#endif
+    PCNT_UNIT_MAX,
+} pcnt_unit_t;
+
+/**
+ * @brief Selection of channels available for a single PCNT unit
+ */
+typedef enum {
+    PCNT_CHANNEL_0, /*!< PCNT channel 0 */
+    PCNT_CHANNEL_1, /*!< PCNT channel 1 */
+    PCNT_CHANNEL_MAX,
+} pcnt_channel_t;
+
+/**
+ * @brief Selection of counter's events the may trigger an interrupt
+ */
+typedef enum {
+    PCNT_EVT_THRES_1 = 1 << 2, /*!< PCNT watch point event: threshold1 value event */
+    PCNT_EVT_THRES_0 = 1 << 3, /*!< PCNT watch point event: threshold0 value event */
+    PCNT_EVT_L_LIM = 1 << 4,   /*!< PCNT watch point event: Minimum counter value */
+    PCNT_EVT_H_LIM = 1 << 5,   /*!< PCNT watch point event: Maximum counter value */
+    PCNT_EVT_ZERO = 1 << 6,    /*!< PCNT watch point event: counter value zero event */
+    PCNT_EVT_MAX
+} pcnt_evt_type_t;
+
+/**
+ * @brief Selection of available modes that determine the counter's action depending on the state of the control signal's input GPIO
+ * @note  Configuration covers two actions, one for high, and one for low level on the control input
+ */
+typedef pcnt_channel_level_action_t pcnt_ctrl_mode_t;
+#define PCNT_MODE_KEEP    PCNT_CHANNEL_LEVEL_ACTION_KEEP    /*!< Control mode: won't change counter mode*/
+#define PCNT_MODE_REVERSE PCNT_CHANNEL_LEVEL_ACTION_INVERSE /*!< Control mode: invert counter mode(increase -> decrease, decrease -> increase) */
+#define PCNT_MODE_DISABLE PCNT_CHANNEL_LEVEL_ACTION_HOLD    /*!< Control mode: Inhibit counter(counter value will not change in this condition) */
+#define PCNT_MODE_MAX     3
+
+/**
+ * @brief Selection of available modes that determine the counter's action on the edge of the pulse signal's input GPIO
+ * @note  Configuration covers two actions, one for positive, and one for negative edge on the pulse input
+ */
+typedef pcnt_channel_edge_action_t pcnt_count_mode_t;
+#define PCNT_COUNT_DIS PCNT_CHANNEL_EDGE_ACTION_HOLD     /*!< Counter mode: Inhibit counter(counter value will not change in this condition) */
+#define PCNT_COUNT_INC PCNT_CHANNEL_EDGE_ACTION_INCREASE /*!< Counter mode: Increase counter value */
+#define PCNT_COUNT_DEC PCNT_CHANNEL_EDGE_ACTION_DECREASE /*!< Counter mode: Decrease counter value */
+#define PCNT_COUNT_MAX 3
+
+/**
+ * @brief Pulse Counter configuration for a single channel
+ */
+typedef struct {
+    int pulse_gpio_num;          /*!< Pulse input GPIO number, if you want to use GPIO16, enter pulse_gpio_num = 16, a negative value will be ignored */
+    int ctrl_gpio_num;           /*!< Control signal input GPIO number, a negative value will be ignored */
+    pcnt_ctrl_mode_t lctrl_mode; /*!< PCNT low control mode */
+    pcnt_ctrl_mode_t hctrl_mode; /*!< PCNT high control mode */
+    pcnt_count_mode_t pos_mode;  /*!< PCNT positive edge count mode */
+    pcnt_count_mode_t neg_mode;  /*!< PCNT negative edge count mode */
+    int16_t counter_h_lim;       /*!< Maximum counter value */
+    int16_t counter_l_lim;       /*!< Minimum counter value */
+    pcnt_unit_t unit;            /*!< PCNT unit number */
+    pcnt_channel_t channel;      /*!< the PCNT channel */
+} pcnt_config_t;
+
+/**
+ * @brief Configure Pulse Counter unit
+ *        @note
+ *        This function will disable three events: PCNT_EVT_L_LIM, PCNT_EVT_H_LIM, PCNT_EVT_ZERO.
+ *
+ * @param pcnt_config Pointer of Pulse Counter unit configure parameter
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver already initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_unit_config(const pcnt_config_t *pcnt_config);
+
+/**
+ * @brief Get pulse counter value
+ *
+ * @param pcnt_unit  Pulse Counter unit number
+ * @param count Pointer to accept counter value
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_get_counter_value(pcnt_unit_t pcnt_unit, int16_t *count);
+
+/**
+ * @brief Pause PCNT counter of PCNT unit
+ *
+ * @param pcnt_unit PCNT unit number
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_counter_pause(pcnt_unit_t pcnt_unit);
+
+/**
+ * @brief Resume counting for PCNT counter
+ *
+ * @param pcnt_unit PCNT unit number, select from pcnt_unit_t
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_counter_resume(pcnt_unit_t pcnt_unit);
+
+/**
+ * @brief Clear and reset PCNT counter value to zero
+ *
+ * @param  pcnt_unit PCNT unit number, select from pcnt_unit_t
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_counter_clear(pcnt_unit_t pcnt_unit);
+
+/**
+ * @brief Enable PCNT interrupt for PCNT unit
+ *        @note
+ *        Each Pulse counter unit has five watch point events that share the same interrupt.
+ *        Configure events with pcnt_event_enable() and pcnt_event_disable()
+ *
+ * @param pcnt_unit PCNT unit number
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_intr_enable(pcnt_unit_t pcnt_unit);
+
+/**
+ * @brief Disable PCNT interrupt for PCNT unit
+ *
+ * @param pcnt_unit PCNT unit number
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_intr_disable(pcnt_unit_t pcnt_unit);
+
+/**
+ * @brief Enable PCNT event of PCNT unit
+ *
+ * @param unit PCNT unit number
+ * @param evt_type Watch point event type.
+ *                 All enabled events share the same interrupt (one interrupt per pulse counter unit).
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_event_enable(pcnt_unit_t unit, pcnt_evt_type_t evt_type);
+
+/**
+ * @brief Disable PCNT event of PCNT unit
+ *
+ * @param unit PCNT unit number
+ * @param evt_type Watch point event type.
+ *                 All enabled events share the same interrupt (one interrupt per pulse counter unit).
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_event_disable(pcnt_unit_t unit, pcnt_evt_type_t evt_type);
+
+/**
+ * @brief Set PCNT event value of PCNT unit
+ *
+ * @param unit PCNT unit number
+ * @param evt_type Watch point event type.
+ *                 All enabled events share the same interrupt (one interrupt per pulse counter unit).
+ *
+ * @param value Counter value for PCNT event
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_set_event_value(pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16_t value);
+
+/**
+ * @brief Get PCNT event value of PCNT unit
+ *
+ * @param unit PCNT unit number
+ * @param evt_type Watch point event type.
+ *                 All enabled events share the same interrupt (one interrupt per pulse counter unit).
+ * @param value Pointer to accept counter value for PCNT event
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_get_event_value(pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16_t *value);
+
+/**
+ * @brief Get PCNT event status of PCNT unit
+ *
+ * @param unit PCNT unit number
+ * @param status Pointer to accept event status word
+ * @return
+ *      - ESP_OK Success
+ *      - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *      - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_get_event_status(pcnt_unit_t unit, uint32_t *status);
+
+/**
+ * @brief Unregister PCNT interrupt handler (registered by pcnt_isr_register), the handler is an ISR.
+ *        The handler will be attached to the same CPU core that this function is running on.
+ *        If the interrupt service is registered by pcnt_isr_service_install, please call pcnt_isr_service_uninstall instead
+ *
+ * @param handle handle to unregister the ISR service.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_NOT_FOUND Can not find the interrupt that matches the flags.
+ *     - ESP_ERR_INVALID_ARG Function pointer error.
+ */
+esp_err_t pcnt_isr_unregister(pcnt_isr_handle_t handle);
+
+/**
+ * @brief Register PCNT interrupt handler, the handler is an ISR.
+ *        The handler will be attached to the same CPU core that this function is running on.
+ *        Please do not use pcnt_isr_service_install if this function was called.
+ *
+ * @param fn Interrupt handler function.
+ * @param arg Parameter for handler function
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ * @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
+ *        be returned here. Calling pcnt_isr_unregister to unregister this ISR service if needed,
+ *        but only if the handle is not NULL.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_NOT_FOUND Can not find the interrupt that matches the flags.
+ *     - ESP_ERR_INVALID_ARG Function pointer error.
+ */
+esp_err_t pcnt_isr_register(void (*fn)(void *), void *arg, int intr_alloc_flags, pcnt_isr_handle_t *handle);
+
+/**
+ * @brief Configure PCNT pulse signal input pin and control input pin
+ *
+ * @param unit PCNT unit number
+ * @param channel PCNT channel number
+ * @param pulse_io Pulse signal input GPIO
+ * @param ctrl_io Control signal input GPIO
+ *
+ * @note  Set the signal input to PCNT_PIN_NOT_USED if unused.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_set_pin(pcnt_unit_t unit, pcnt_channel_t channel, int pulse_io, int ctrl_io);
+
+/**
+ * @brief Enable PCNT input filter
+ *
+ * @param unit PCNT unit number
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_filter_enable(pcnt_unit_t unit);
+
+/**
+ * @brief Disable PCNT input filter
+ *
+ * @param unit PCNT unit number
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_filter_disable(pcnt_unit_t unit);
+
+/**
+ * @brief Set PCNT filter value
+ *
+ * @param unit PCNT unit number
+ * @param filter_val PCNT signal filter value, counter in APB_CLK cycles.
+ *        Any pulses lasting shorter than this will be ignored when the filter is enabled.
+ *        @note
+ *        filter_val is a 10-bit value, so the maximum filter_val should be limited to 1023.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_set_filter_value(pcnt_unit_t unit, uint16_t filter_val);
+
+/**
+ * @brief Get PCNT filter value
+ *
+ * @param unit PCNT unit number
+ * @param filter_val Pointer to accept PCNT filter value.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_get_filter_value(pcnt_unit_t unit, uint16_t *filter_val);
+
+/**
+ * @brief Set PCNT counter mode
+ *
+ * @param unit PCNT unit number
+ * @param channel PCNT channel number
+ * @param pos_mode Counter mode when detecting positive edge
+ * @param neg_mode Counter mode when detecting negative edge
+ * @param hctrl_mode Counter mode when control signal is high level
+ * @param lctrl_mode Counter mode when control signal is low level
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_set_mode(pcnt_unit_t unit, pcnt_channel_t channel,
+                        pcnt_count_mode_t pos_mode, pcnt_count_mode_t neg_mode,
+                        pcnt_ctrl_mode_t hctrl_mode, pcnt_ctrl_mode_t lctrl_mode);
+
+/**
+ * @brief Add ISR handler for specified unit.
+ *
+ * Call this function after using pcnt_isr_service_install() to
+ * install the PCNT driver's ISR handler service.
+ *
+ * The ISR handlers do not need to be declared with IRAM_ATTR,
+ * unless you pass the ESP_INTR_FLAG_IRAM flag when allocating the
+ * ISR in pcnt_isr_service_install().
+ *
+ * This ISR handler will be called from an ISR. So there is a stack
+ * size limit (configurable as "ISR stack size" in menuconfig). This
+ * limit is smaller compared to a global PCNT interrupt handler due
+ * to the additional level of indirection.
+ *
+ * @param unit PCNT unit number
+ * @param isr_handler Interrupt handler function.
+ * @param args Parameter for handler function
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_isr_handler_add(pcnt_unit_t unit, void(*isr_handler)(void *), void *args);
+
+/**
+ * @brief Install PCNT ISR service.
+ * @note We can manage different interrupt service for each unit.
+ *       This function will use the default ISR handle service, Calling pcnt_isr_service_uninstall to
+ *       uninstall the default service if needed. Please do not use pcnt_isr_register if this function was called.
+ *
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_NO_MEM No memory to install this service
+ *     - ESP_ERR_INVALID_STATE ISR service already installed
+ */
+esp_err_t pcnt_isr_service_install(int intr_alloc_flags);
+
+/**
+ * @brief Uninstall PCNT ISR service, freeing related resources.
+ */
+void pcnt_isr_service_uninstall(void);
+
+/**
+ * @brief Delete ISR handler for specified unit.
+ *
+ * @param unit PCNT unit number
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t pcnt_isr_handler_remove(pcnt_unit_t unit);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/periph_ctrl.h b/tools/sdk/esp32s3/include/driver/include/driver/periph_ctrl.h
new file mode 100644
index 00000000000..adba0533cfb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/periph_ctrl.h
@@ -0,0 +1,109 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _DRIVER_PERIPH_CTRL_H_
+#define _DRIVER_PERIPH_CTRL_H_
+
+#include "soc/periph_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief      enable peripheral module
+ *
+ * @param[in]  periph    :  Peripheral module name
+ *
+ * Clock for the module will be ungated, and reset de-asserted.
+ *
+ * @note If periph_module_enable is called a number of times,
+ *       periph_module_disable has to be called the same number of times
+ *       in order to put the peripheral into disabled state.
+ *
+ * @return     NULL
+ *
+ */
+void periph_module_enable(periph_module_t periph);
+
+/**
+ * @brief      disable peripheral module
+ *
+ * @param[in]  periph    :  Peripheral module name
+ *
+ * Clock for the module will be gated, reset asserted.
+ *
+ * @note If periph_module_enable is called a number of times,
+ *       periph_module_disable has to be called the same number of times
+ *       in order to put the peripheral into disabled state.
+ *
+ * @return     NULL
+ *
+ */
+void periph_module_disable(periph_module_t periph);
+
+/**
+ * @brief      reset peripheral module
+ *
+ * @param[in]  periph    :  Peripheral module name
+ *
+ * Reset will asserted then de-assrted for the peripheral.
+ *
+ * Calling this function does not enable or disable the clock for the module.
+ *
+ * @return     NULL
+ *
+ */
+void periph_module_reset(periph_module_t periph);
+
+/**
+ * @brief      enable wifi bt common module
+ *
+ * @note If wifi_bt_common_module_enable is called a number of times,
+ *       wifi_bt_common_module_disable has to be called the same number of times
+ *       in order to put the peripheral into disabled state.
+ *
+ * @return     NULL
+ *
+ */
+void wifi_bt_common_module_enable(void);
+
+/**
+ * @brief      disable wifi bt common module
+ *
+ * @note If wifi_bt_common_module_enable is called a number of times,
+ *       wifi_bt_common_module_disable has to be called the same number of times
+ *       in order to put the peripheral into disabled state.
+ *
+ * @return     NULL
+ *
+ */
+void wifi_bt_common_module_disable(void);
+
+/**
+ * @brief      enable wifi module
+ *
+ * @note Enable wifi module only.
+ *
+ * @return     NULL
+ *
+ */
+void wifi_module_enable(void);
+
+/**
+ * @brief      disable wifi module
+ *
+ * @note Disable wifi module only.
+ *
+ * @return     NULL
+ *
+ */
+void wifi_module_disable(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DRIVER_PERIPH_CTRL_H_ */
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/rmt.h b/tools/sdk/esp32s3/include/driver/include/driver/rmt.h
new file mode 100644
index 00000000000..bc07954a080
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/rmt.h
@@ -0,0 +1,935 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_err.h"
+#include "soc/soc_caps.h"
+#include "driver/gpio.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/ringbuf.h"
+#include "soc/rmt_struct.h"
+#include "hal/rmt_types.h"
+
+#define RMT_CHANNEL_FLAGS_AWARE_DFS (1 << 0) /*!< Channel can work during APB clock scaling */
+#define RMT_CHANNEL_FLAGS_INVERT_SIG (1 << 1) /*!< Invert RMT signal */
+
+/** @cond */
+#define RMT_CHANNEL_FLAGS_ALWAYS_ON RMT_CHANNEL_FLAGS_AWARE_DFS  /*!< Deprecated name, defined here for compatibility */
+/** @endcond */
+
+/**
+ * @brief Define memory space of each RMT channel (in words = 4 bytes)
+ *
+ */
+#define RMT_MEM_ITEM_NUM SOC_RMT_MEM_WORDS_PER_CHANNEL
+
+/**
+* @brief Data struct of RMT TX configure parameters
+*/
+typedef struct {
+    uint32_t carrier_freq_hz;          /*!< RMT carrier frequency */
+    rmt_carrier_level_t carrier_level; /*!< Level of the RMT output, when the carrier is applied */
+    rmt_idle_level_t idle_level;       /*!< RMT idle level */
+    uint8_t carrier_duty_percent;      /*!< RMT carrier duty (%) */
+#if SOC_RMT_SUPPORT_TX_LOOP_COUNT
+    uint32_t loop_count;               /*!< Maximum loop count */
+#endif
+    bool carrier_en;                   /*!< RMT carrier enable */
+    bool loop_en;                      /*!< Enable sending RMT items in a loop */
+    bool idle_output_en;               /*!< RMT idle level output enable */
+} rmt_tx_config_t;
+
+/**
+* @brief Data struct of RMT RX configure parameters
+*/
+typedef struct {
+    uint16_t idle_threshold;     /*!< RMT RX idle threshold */
+    uint8_t filter_ticks_thresh; /*!< RMT filter tick number */
+    bool filter_en;              /*!< RMT receiver filter enable */
+#if SOC_RMT_SUPPORT_RX_DEMODULATION
+    bool rm_carrier;                   /*!< RMT receiver remove carrier enable */
+    uint32_t carrier_freq_hz;          /*!< RMT carrier frequency */
+    uint8_t carrier_duty_percent;      /*!< RMT carrier duty (%) */
+    rmt_carrier_level_t carrier_level; /*!< The level to remove the carrier */
+#endif
+} rmt_rx_config_t;
+
+/**
+* @brief Data struct of RMT configure parameters
+*/
+typedef struct {
+    rmt_mode_t rmt_mode;   /*!< RMT mode: transmitter or receiver */
+    rmt_channel_t channel; /*!< RMT channel */
+    gpio_num_t gpio_num;   /*!< RMT GPIO number */
+    uint8_t clk_div;       /*!< RMT channel counter divider */
+    uint8_t mem_block_num; /*!< RMT memory block number */
+    uint32_t flags;        /*!< RMT channel extra configurations, OR'd with RMT_CHANNEL_FLAGS_[*] */
+    union {
+        rmt_tx_config_t tx_config; /*!< RMT TX parameter */
+        rmt_rx_config_t rx_config; /*!< RMT RX parameter */
+    };
+} rmt_config_t;
+
+/**
+ * @brief Default configuration for Tx channel
+ *
+ */
+#define RMT_DEFAULT_CONFIG_TX(gpio, channel_id)      \
+    {                                                \
+        .rmt_mode = RMT_MODE_TX,                     \
+        .channel = channel_id,                       \
+        .gpio_num = gpio,                            \
+        .clk_div = 80,                               \
+        .mem_block_num = 1,                          \
+        .flags = 0,                                  \
+        .tx_config = {                               \
+            .carrier_freq_hz = 38000,                \
+            .carrier_level = RMT_CARRIER_LEVEL_HIGH, \
+            .idle_level = RMT_IDLE_LEVEL_LOW,        \
+            .carrier_duty_percent = 33,              \
+            .carrier_en = false,                     \
+            .loop_en = false,                        \
+            .idle_output_en = true,                  \
+        }                                            \
+    }
+
+/**
+ * @brief Default configuration for RX channel
+ *
+ */
+#define RMT_DEFAULT_CONFIG_RX(gpio, channel_id) \
+    {                                           \
+        .rmt_mode = RMT_MODE_RX,                \
+        .channel = channel_id,                  \
+        .gpio_num = gpio,                       \
+        .clk_div = 80,                          \
+        .mem_block_num = 1,                     \
+        .flags = 0,                             \
+        .rx_config = {                          \
+            .idle_threshold = 12000,            \
+            .filter_ticks_thresh = 100,         \
+            .filter_en = true,                  \
+        }                                       \
+    }
+
+/**
+* @brief RMT interrupt handle
+*
+*/
+typedef intr_handle_t rmt_isr_handle_t;
+
+/**
+* @brief Type of RMT Tx End callback function
+*
+*/
+typedef void (*rmt_tx_end_fn_t)(rmt_channel_t channel, void *arg);
+
+/**
+* @brief Structure encapsulating a RMT TX end callback
+*/
+typedef struct {
+    rmt_tx_end_fn_t function; /*!< Function which is called on RMT TX end */
+    void *arg;                /*!< Optional argument passed to function */
+} rmt_tx_end_callback_t;
+
+/**
+* @brief User callback function to convert uint8_t type data to rmt format(rmt_item32_t).
+*
+*        This function may be called from an ISR, so, the code should be short and efficient.
+*
+* @param  src Pointer to the buffer storing the raw data that needs to be converted to rmt format.
+* @param[out] dest Pointer to the buffer storing the rmt format data.
+* @param  src_size The raw data size.
+* @param  wanted_num The number of rmt format data that wanted to get.
+* @param[out] translated_size The size of the raw data that has been converted to rmt format,
+*             it should return 0 if no data is converted in user callback.
+* @param[out] item_num The number of the rmt format data that actually converted to,
+*             it can be less than wanted_num if there is not enough raw data, but cannot exceed wanted_num.
+*             it should return 0 if no data was converted.
+*
+* @note
+*       In fact, item_num should be a multiple of translated_size, e.g. :
+*       When we convert each byte of uint8_t type data to rmt format data,
+*       the relation between item_num and translated_size should be `item_num = translated_size*8`.
+*/
+typedef void (*sample_to_rmt_t)(const void *src, rmt_item32_t *dest, size_t src_size, size_t wanted_num, size_t *translated_size, size_t *item_num);
+
+/**
+* @brief Set RMT clock divider, channel clock is divided from source clock.
+*
+* @param channel RMT channel
+* @param div_cnt RMT counter clock divider
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_clk_div(rmt_channel_t channel, uint8_t div_cnt);
+
+/**
+* @brief Get RMT clock divider, channel clock is divided from source clock.
+*
+* @param channel RMT channel
+* @param div_cnt pointer to accept RMT counter divider
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_clk_div(rmt_channel_t channel, uint8_t *div_cnt);
+
+/**
+* @brief Set RMT RX idle threshold value
+*
+*        In receive mode, when no edge is detected on the input signal
+*        for longer than idle_thres channel clock cycles,
+*        the receive process is finished.
+*
+* @param channel RMT channel
+* @param thresh RMT RX idle threshold
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_rx_idle_thresh(rmt_channel_t channel, uint16_t thresh);
+
+/**
+* @brief Get RMT idle threshold value.
+*
+*        In receive mode, when no edge is detected on the input signal
+*        for longer than idle_thres channel clock cycles,
+*        the receive process is finished.
+*
+* @param channel RMT channel
+* @param thresh pointer to accept RMT RX idle threshold value
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_rx_idle_thresh(rmt_channel_t channel, uint16_t *thresh);
+
+/**
+* @brief Set RMT memory block number for RMT channel
+*
+*        This function is used to configure the amount of memory blocks allocated to channel n
+*        The 8 channels share a 512x32-bit RAM block which can be read and written
+*        by the processor cores over the APB bus, as well as read by the transmitters
+*        and written by the receivers.
+*
+*        The RAM address range for channel n is start_addr_CHn to end_addr_CHn, which are defined by:
+*        Memory block start address is RMT_CHANNEL_MEM(n) (in soc/rmt_reg.h),
+*        that is, start_addr_chn = RMT base address + 0x800 + 64 ∗ 4 ∗ n, and
+*        end_addr_chn = RMT base address + 0x800 +  64 ∗ 4 ∗ n + 64 ∗ 4 ∗ RMT_MEM_SIZE_CHn mod 512 ∗ 4
+*
+*        @note
+*        If memory block number of one channel is set to a value greater than 1, this channel will occupy the memory
+*        block of the next channel.
+*        Channel 0 can use at most 8 blocks of memory, accordingly channel 7 can only use one memory block.
+*
+* @param channel RMT channel
+* @param rmt_mem_num RMT RX memory block number, one block has 64 * 32 bits.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_mem_block_num(rmt_channel_t channel, uint8_t rmt_mem_num);
+
+/**
+* @brief Get RMT memory block number
+*
+* @param channel RMT channel
+* @param rmt_mem_num Pointer to accept RMT RX memory block number
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_mem_block_num(rmt_channel_t channel, uint8_t *rmt_mem_num);
+
+/**
+* @brief Configure RMT carrier for TX signal.
+*
+*        Set different values for carrier_high and carrier_low to set different frequency of carrier.
+*        The unit of carrier_high/low is the source clock tick, not the divided channel counter clock.
+*
+* @param channel RMT channel
+* @param carrier_en Whether to enable output carrier.
+* @param high_level High level duration of carrier
+* @param low_level Low level duration of carrier.
+* @param carrier_level Configure the way carrier wave is modulated for channel.
+*     - 1'b1:transmit on low output level
+*     - 1'b0:transmit on high output level
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_tx_carrier(rmt_channel_t channel, bool carrier_en, uint16_t high_level, uint16_t low_level, rmt_carrier_level_t carrier_level);
+
+/**
+* @brief Set RMT memory in low power mode.
+*
+*        Reduce power consumed by memory. 1:memory is in low power state.
+*
+* @param channel RMT channel
+* @param pd_en RMT memory low power enable.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_mem_pd(rmt_channel_t channel, bool pd_en);
+
+/**
+* @brief Get RMT memory low power mode.
+*
+* @param channel RMT channel
+* @param pd_en Pointer to accept RMT memory low power mode.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_mem_pd(rmt_channel_t channel, bool *pd_en);
+
+/**
+* @brief Set RMT start sending data from memory.
+*
+* @param channel RMT channel
+* @param tx_idx_rst Set true to reset memory index for TX.
+*                   Otherwise, transmitter will continue sending from the last index in memory.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_tx_start(rmt_channel_t channel, bool tx_idx_rst);
+
+/**
+* @brief Set RMT stop sending.
+*
+* @param channel RMT channel
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_tx_stop(rmt_channel_t channel);
+
+/**
+* @brief Set RMT start receiving data.
+*
+* @param channel RMT channel
+* @param rx_idx_rst Set true to reset memory index for receiver.
+*                   Otherwise, receiver will continue receiving data to the last index in memory.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_rx_start(rmt_channel_t channel, bool rx_idx_rst);
+
+/**
+* @brief Set RMT stop receiving data.
+*
+* @param channel RMT channel
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_rx_stop(rmt_channel_t channel);
+
+/**
+* @brief Reset RMT TX memory
+*
+* @param channel RMT channel
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_tx_memory_reset(rmt_channel_t channel);
+
+/**
+* @brief Reset RMT RX memory
+*
+* @param channel RMT channel
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_rx_memory_reset(rmt_channel_t channel);
+
+/**
+* @brief Set RMT memory owner.
+* @note Setting memroy is only valid for RX channel.
+*
+* @param channel RMT channel
+* @param owner To set when the transmitter or receiver can process the memory of channel.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_memory_owner(rmt_channel_t channel, rmt_mem_owner_t owner);
+
+/**
+* @brief Get RMT memory owner.
+*
+* @param channel RMT channel
+* @param owner Pointer to get memory owner.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_memory_owner(rmt_channel_t channel, rmt_mem_owner_t *owner);
+
+/**
+* @brief Set RMT tx loop mode.
+*
+* @param channel RMT channel
+* @param loop_en Enable RMT transmitter loop sending mode.
+*                If set true, transmitter will continue sending from the first data
+*                to the last data in channel over and over again in a loop.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_tx_loop_mode(rmt_channel_t channel, bool loop_en);
+
+/**
+* @brief Get RMT tx loop mode.
+*
+* @param channel RMT channel
+* @param loop_en Pointer to accept RMT transmitter loop sending mode.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_tx_loop_mode(rmt_channel_t channel, bool *loop_en);
+
+/**
+* @brief Set RMT RX filter.
+*
+*        In receive mode, channel will ignore input pulse when the pulse width is smaller than threshold.
+*        Counted in source clock, not divided counter clock.
+*
+* @param channel RMT channel
+* @param rx_filter_en To enable RMT receiver filter.
+* @param thresh Threshold of pulse width for receiver.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_rx_filter(rmt_channel_t channel, bool rx_filter_en, uint8_t thresh);
+
+/**
+* @brief Set RMT source clock
+*
+*        RMT module has two clock sources:
+*        1. APB clock which is 80Mhz
+*        2. REF tick clock, which would be 1Mhz (not supported in this version).
+*
+* @param channel RMT channel
+* @param base_clk To choose source clock for RMT module.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_source_clk(rmt_channel_t channel, rmt_source_clk_t base_clk);
+
+/**
+* @brief Get RMT source clock
+*
+*        RMT module has two clock sources:
+*        1. APB clock which is 80Mhz
+*        2. REF tick clock, which would be 1Mhz (not supported in this version).
+*
+* @param channel RMT channel
+* @param src_clk Pointer to accept source clock for RMT module.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_source_clk(rmt_channel_t channel, rmt_source_clk_t *src_clk);
+
+/**
+* @brief Set RMT idle output level for transmitter
+*
+* @param channel RMT channel
+* @param idle_out_en To enable idle level output.
+* @param level To set the output signal's level for channel in idle state.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_idle_level(rmt_channel_t channel, bool idle_out_en, rmt_idle_level_t level);
+
+/**
+* @brief Get RMT idle output level for transmitter
+*
+* @param channel RMT channel
+* @param idle_out_en Pointer to accept value of enable idle.
+* @param level Pointer to accept value of output signal's level in idle state for specified channel.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_idle_level(rmt_channel_t channel, bool *idle_out_en, rmt_idle_level_t *level);
+
+/**
+* @brief Get RMT status
+*
+* @param channel RMT channel
+* @param status Pointer to accept channel status.
+*        Please refer to RMT_CHnSTATUS_REG(n=0~7) in `rmt_reg.h` for more details of each field.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_status(rmt_channel_t channel, uint32_t *status);
+
+/**
+* @brief Set RMT RX interrupt enable
+*
+* @param channel RMT channel
+* @param en enable or disable RX interrupt.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_rx_intr_en(rmt_channel_t channel, bool en);
+
+/**
+* @brief Set RMT RX error interrupt enable
+*
+* @param channel RMT channel
+* @param en enable or disable RX err interrupt.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_err_intr_en(rmt_channel_t channel, bool en);
+
+/**
+* @brief Set RMT TX interrupt enable
+*
+* @param channel RMT channel
+* @param en enable or disable TX interrupt.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_tx_intr_en(rmt_channel_t channel, bool en);
+
+/**
+* @brief Set RMT TX threshold event interrupt enable
+*
+* An interrupt will be triggered when the number of transmitted items reaches the threshold value
+*
+* @param channel RMT channel
+* @param en enable or disable TX event interrupt.
+* @param evt_thresh RMT event interrupt threshold value
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_tx_thr_intr_en(rmt_channel_t channel, bool en, uint16_t evt_thresh);
+
+/**
+* @brief Configure the GPIO used by RMT channel
+*
+* @param channel RMT channel
+* @param mode RMT mode, either RMT_MODE_TX or RMT_MODE_RX
+* @param gpio_num GPIO number, which is connected with certain RMT signal
+* @param invert_signal Invert RMT signal physically by GPIO matrix
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Configure RMT GPIO failed because of wrong parameter
+*     - ESP_OK Configure RMT GPIO successfully
+*/
+esp_err_t rmt_set_gpio(rmt_channel_t channel, rmt_mode_t mode, gpio_num_t gpio_num, bool invert_signal);
+
+/**
+* @brief Configure RMT parameters
+*
+* @param rmt_param RMT parameter struct
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_config(const rmt_config_t *rmt_param);
+
+/**
+* @brief Register RMT interrupt handler, the handler is an ISR.
+*
+*        The handler will be attached to the same CPU core that this function is running on.
+*
+* @note  If you already called rmt_driver_install to use system RMT driver,
+*        please do not register ISR handler again.
+*
+* @param fn Interrupt handler function.
+* @param arg Parameter for the handler function
+* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+*        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+* @param handle If non-zero, a handle to later clean up the ISR gets stored here.
+*
+* @return
+*     - ESP_OK Success
+*     - ESP_ERR_INVALID_ARG Function pointer error.
+*     - ESP_FAIL System driver installed, can not register ISR handler for RMT
+*/
+esp_err_t rmt_isr_register(void (*fn)(void *), void *arg, int intr_alloc_flags, rmt_isr_handle_t *handle);
+
+/**
+* @brief   Deregister previously registered RMT interrupt handler
+*
+* @param handle Handle obtained from rmt_isr_register
+*
+* @return
+*     - ESP_OK Success
+*     - ESP_ERR_INVALID_ARG Handle invalid
+*/
+esp_err_t rmt_isr_deregister(rmt_isr_handle_t handle);
+
+/**
+* @brief Fill memory data of channel with given RMT items.
+*
+* @param channel RMT channel
+* @param item Pointer of items.
+* @param item_num RMT sending items number.
+* @param mem_offset Index offset of memory.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_fill_tx_items(rmt_channel_t channel, const rmt_item32_t *item, uint16_t item_num, uint16_t mem_offset);
+
+/**
+* @brief Initialize RMT driver
+*
+* @param channel RMT channel
+* @param rx_buf_size Size of RMT RX ringbuffer. Can be 0 if the RX ringbuffer is not used.
+* @param intr_alloc_flags Flags for the RMT driver interrupt handler. Pass 0 for default flags. See esp_intr_alloc.h for details.
+*        If ESP_INTR_FLAG_IRAM is used, please do not use the memory allocated from psram when calling rmt_write_items.
+*
+* @return
+*     - ESP_ERR_INVALID_STATE Driver is already installed, call rmt_driver_uninstall first.
+*     - ESP_ERR_NO_MEM Memory allocation failure
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int intr_alloc_flags);
+
+/**
+* @brief Uninstall RMT driver.
+*
+* @param channel RMT channel
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_driver_uninstall(rmt_channel_t channel);
+
+/**
+* @brief Get the current status of eight channels.
+*
+* @note Do not call this function if it is possible that `rmt_driver_uninstall` will be called at the same time.
+*
+* @param[out] channel_status store the current status of each channel
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter is NULL
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_channel_status(rmt_channel_status_result_t *channel_status);
+
+/**
+* @brief Get speed of channel's internal counter clock.
+*
+* @param channel RMT channel
+* @param[out] clock_hz counter clock speed, in hz
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter is NULL
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_counter_clock(rmt_channel_t channel, uint32_t *clock_hz);
+
+/**
+* @brief RMT send waveform from rmt_item array.
+*
+*        This API allows user to send waveform with any length.
+*
+* @param channel RMT channel
+* @param rmt_item head point of RMT items array.
+*        If ESP_INTR_FLAG_IRAM is used, please do not use the memory allocated from psram when calling rmt_write_items.
+* @param item_num RMT data item number.
+* @param wait_tx_done
+*        - If set 1, it will block the task and wait for sending done.
+*        - If set 0, it will not wait and return immediately.
+*
+*         @note
+*         This function will not copy data, instead, it will point to the original items,
+*         and send the waveform items.
+*         If wait_tx_done is set to true, this function will block and will not return until
+*         all items have been sent out.
+*         If wait_tx_done is set to false, this function will return immediately, and the driver
+*         interrupt will continue sending the items. We must make sure the item data will not be
+*         damaged when the driver is still sending items in driver interrupt.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_write_items(rmt_channel_t channel, const rmt_item32_t *rmt_item, int item_num, bool wait_tx_done);
+
+/**
+* @brief Wait RMT TX finished.
+*
+* @param channel RMT channel
+* @param wait_time Maximum time in ticks to wait for transmission to be complete.  If set 0, return immediately with ESP_ERR_TIMEOUT if TX is busy (polling).
+*
+* @return
+*     - ESP_OK RMT Tx done successfully
+*     - ESP_ERR_TIMEOUT Exceeded the 'wait_time' given
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_FAIL Driver not installed
+*/
+esp_err_t rmt_wait_tx_done(rmt_channel_t channel, TickType_t wait_time);
+
+/**
+* @brief Get ringbuffer from RMT.
+*
+*        Users can get the RMT RX ringbuffer handle, and process the RX data.
+*
+* @param channel RMT channel
+* @param buf_handle Pointer to buffer handle to accept RX ringbuffer handle.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_get_ringbuf_handle(rmt_channel_t channel, RingbufHandle_t *buf_handle);
+
+/**
+* @brief Init rmt translator and register user callback.
+*        The callback will convert the raw data that needs to be sent to rmt format.
+*        If a channel is initialized more than once, tha user callback will be replaced by the later.
+*
+* @param channel RMT channel .
+* @param fn Point to the data conversion function.
+*
+* @return
+*     - ESP_FAIL Init fail.
+*     - ESP_OK Init success.
+*/
+esp_err_t rmt_translator_init(rmt_channel_t channel, sample_to_rmt_t fn);
+
+/**
+* @brief Set user context for the translator of specific channel
+*
+* @param channel RMT channel number
+* @param context User context
+*
+* @return
+*     - ESP_FAIL Set context fail
+*     - ESP_OK Set context success
+*/
+esp_err_t rmt_translator_set_context(rmt_channel_t channel, void *context);
+
+/**
+* @brief Get the user context set by 'rmt_translator_set_context'
+*
+* @note This API must be invoked in the RMT translator callback function,
+*       and the first argument must be the actual parameter 'item_num' you got in that callback function.
+*
+* @param item_num Address of the memory which contains the number of translated items (It's from driver's internal memroy)
+* @param context Returned User context
+*
+* @return
+*     - ESP_FAIL Get context fail
+*     - ESP_OK Get context success
+*/
+esp_err_t rmt_translator_get_context(const size_t *item_num, void **context);
+
+/**
+* @brief Translate uint8_t type of data into rmt format and send it out.
+*        Requires rmt_translator_init to init the translator first.
+*
+* @param channel RMT channel .
+* @param src Pointer to the raw data.
+* @param src_size The size of the raw data.
+* @param wait_tx_done Set true to wait all data send done.
+*
+* @return
+*     - ESP_FAIL Send fail
+*     - ESP_OK Send success
+*/
+esp_err_t rmt_write_sample(rmt_channel_t channel, const uint8_t *src, size_t src_size, bool wait_tx_done);
+
+/**
+* @brief Registers a callback that will be called when transmission ends.
+*
+*        Called by rmt_driver_isr_default in interrupt context.
+*
+* @note Requires rmt_driver_install to install the default ISR handler.
+*
+* @param function Function to be called from the default interrupt handler or NULL.
+* @param arg Argument which will be provided to the callback when it is called.
+*
+* @return the previous callback settings (members will be set to NULL if there was none)
+*/
+rmt_tx_end_callback_t rmt_register_tx_end_callback(rmt_tx_end_fn_t function, void *arg);
+
+#if SOC_RMT_SUPPORT_RX_PINGPONG
+/**
+* @brief Set RMT RX threshold event interrupt enable
+*
+* An interrupt will be triggered when the number of received items reaches the threshold value
+*
+* @param channel RMT channel
+* @param en enable or disable RX event interrupt.
+* @param evt_thresh RMT event interrupt threshold value
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_rx_thr_intr_en(rmt_channel_t channel, bool en, uint16_t evt_thresh);
+#endif
+
+#if SOC_RMT_SUPPORT_TX_SYNCHRO
+/**
+* @brief Add channel into a synchronous group (channels in the same group can start transaction simultaneously)
+*
+* @param channel RMT channel
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_add_channel_to_group(rmt_channel_t channel);
+
+/**
+* @brief Remove channel out of a group
+*
+* @param channel RMT channel
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_remove_channel_from_group(rmt_channel_t channel);
+#endif
+
+#if SOC_RMT_SUPPORT_TX_LOOP_COUNT
+/**
+ * @brief Set loop count threshold value for RMT TX channel
+ *
+ * When tx loop count reaches this value, an ISR callback will notify user
+ *
+ * @param channel RMT channel
+ * @param count loop count, 1 ~ 1023
+ * @return
+ *      - ESP_ERR_INVALID_ARG Parameter error
+ *      - ESP_OK Success
+ */
+esp_err_t rmt_set_tx_loop_count(rmt_channel_t channel, uint32_t count);
+
+/**
+ * @brief Enable or disable the feature that when loop count reaches the threshold, RMT will stop transmitting.
+ *
+ * - When the loop auto-stop feature is enabled will halt RMT transmission after the loop count reaches a certain threshold
+ * - When disabled, the RMT transmission continue indefinitely until halted by the users
+ *
+ * @note The auto-stop feature is implemented in hardware on particular targets (i.e. those with SOC_RMT_SUPPORT_TX_LOOP_AUTOSTOP defined).
+ *       Otherwise, the auto-stop feature is implemented in software via the interrupt.
+ *
+ * @param channel RMT channel
+ * @param en enable bit
+ * @return
+ *      - ESP_ERR_INVALID_ARG Parameter error
+ *      - ESP_OK Success
+ */
+esp_err_t rmt_enable_tx_loop_autostop(rmt_channel_t channel, bool en);
+#endif // SOC_RMT_SUPPORT_TX_LOOP_COUNT
+
+/**
+* @brief Reset RMT TX/RX memory index.
+*
+* @param channel RMT channel
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_memory_rw_rst(rmt_channel_t channel)
+__attribute__((deprecated("use rmt_tx_memory_reset or rmt_rx_memory_reset instead")));
+
+/**
+* @brief Set mask value to RMT interrupt enable register.
+*
+* @param mask Bit mask to set to the register
+*
+*/
+void rmt_set_intr_enable_mask(uint32_t mask)
+__attribute__((deprecated("interrupt should be handled by driver")));
+
+/**
+* @brief Clear mask value to RMT interrupt enable register.
+*
+* @param mask Bit mask to clear the register
+*
+*/
+void rmt_clr_intr_enable_mask(uint32_t mask)
+__attribute__((deprecated("interrupt should be handled by driver")));
+
+/**
+* @brief Set RMT pin
+*
+* @param channel RMT channel
+* @param mode TX or RX mode for RMT
+* @param gpio_num GPIO number to transmit or receive the signal.
+*
+* @return
+*     - ESP_ERR_INVALID_ARG Parameter error
+*     - ESP_OK Success
+*/
+esp_err_t rmt_set_pin(rmt_channel_t channel, rmt_mode_t mode, gpio_num_t gpio_num)
+__attribute__((deprecated("use rmt_set_gpio instead")));
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/rtc_cntl.h b/tools/sdk/esp32s3/include/driver/include/driver/rtc_cntl.h
new file mode 100644
index 00000000000..2a0f5916c08
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/rtc_cntl.h
@@ -0,0 +1,48 @@
+/*
+ * SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_err.h"
+#include "esp_intr_alloc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Register a handler for specific RTC_CNTL interrupts
+ *
+ * Multiple handlers can be registered using this function. Whenever an
+ * RTC interrupt happens, all handlers with matching rtc_intr_mask values
+ * will be called.
+ *
+ * @param handler  handler function to call
+ * @param handler_arg  argument to be passed to the handler
+ * @param rtc_intr_mask  combination of RTC_CNTL_*_INT_ENA bits indicating the
+ *                       sources to call the handler for
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NO_MEM not enough memory to allocate handler structure
+ *      - other errors returned by esp_intr_alloc
+ */
+esp_err_t rtc_isr_register(intr_handler_t handler, void* handler_arg,
+                            uint32_t rtc_intr_mask);
+/**
+ * @brief Deregister the handler previously registered using rtc_isr_register
+ * @param handler  handler function to call (as passed to rtc_isr_register)
+ * @param handler_arg  argument of the handler (as passed to rtc_isr_register)
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if a handler matching both handler and
+ *        handler_arg isn't registered
+ */
+esp_err_t rtc_isr_deregister(intr_handler_t handler, void* handler_arg);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/rtc_io.h b/tools/sdk/esp32s3/include/driver/include/driver/rtc_io.h
new file mode 100644
index 00000000000..cbf32c4fc04
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/rtc_io.h
@@ -0,0 +1,310 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _DRIVER_RTC_GPIO_H_
+#define _DRIVER_RTC_GPIO_H_
+
+#include <stdint.h>
+#include "esp_err.h"
+#include "soc/soc_caps.h"
+#include "soc/rtc_io_periph.h"
+#include "hal/rtc_io_types.h"
+#include "driver/gpio.h"
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Determine if the specified GPIO is a valid RTC GPIO.
+ *
+ * @param gpio_num GPIO number
+ * @return true if GPIO is valid for RTC GPIO use. false otherwise.
+ */
+static inline bool rtc_gpio_is_valid_gpio(gpio_num_t gpio_num)
+{
+#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+    return (gpio_num < GPIO_PIN_COUNT && rtc_io_num_map[gpio_num] >= 0);
+#else
+    return false;
+#endif
+}
+
+#define RTC_GPIO_IS_VALID_GPIO(gpio_num) rtc_gpio_is_valid_gpio(gpio_num) // Deprecated, use rtc_gpio_is_valid_gpio()
+
+#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+/**
+ * @brief Get RTC IO index number by gpio number.
+ *
+ * @param gpio_num GPIO number
+ * @return
+ *        >=0: Index of rtcio.
+ *        -1 : The gpio is not rtcio.
+ */
+static inline int rtc_io_number_get(gpio_num_t gpio_num)
+{
+    return rtc_io_num_map[gpio_num];
+}
+
+/**
+ * @brief Init a GPIO as RTC GPIO
+ *
+ * This function must be called when initializing a pad for an analog function.
+ *
+ * @param  gpio_num GPIO number (e.g. GPIO_NUM_12)
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_init(gpio_num_t gpio_num);
+
+/**
+ * @brief Init a GPIO as digital GPIO
+ *
+ * @param  gpio_num GPIO number (e.g. GPIO_NUM_12)
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num);
+
+/**
+ * @brief Get the RTC IO input level
+ *
+ * @param  gpio_num GPIO number (e.g. GPIO_NUM_12)
+ *
+ * @return
+ *     - 1 High level
+ *     - 0 Low level
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+uint32_t rtc_gpio_get_level(gpio_num_t gpio_num);
+
+/**
+ * @brief Set the RTC IO output level
+ *
+ * @param  gpio_num GPIO number (e.g. GPIO_NUM_12)
+ * @param  level output level
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_set_level(gpio_num_t gpio_num, uint32_t level);
+
+/**
+ * @brief    RTC GPIO set direction
+ *
+ * Configure RTC GPIO direction, such as output only, input only,
+ * output and input.
+ *
+ * @param  gpio_num GPIO number (e.g. GPIO_NUM_12)
+ * @param  mode GPIO direction
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_set_direction(gpio_num_t gpio_num, rtc_gpio_mode_t mode);
+
+/**
+ * @brief RTC GPIO set direction in deep sleep mode or disable sleep status (default).
+ *        In some application scenarios, IO needs to have another states during deep sleep.
+ *
+ * NOTE: ESP32 support INPUT_ONLY mode.
+ *       ESP32S2 support INPUT_ONLY, OUTPUT_ONLY, INPUT_OUTPUT mode.
+ *
+ * @param  gpio_num GPIO number (e.g. GPIO_NUM_12)
+ * @param  mode GPIO direction
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_set_direction_in_sleep(gpio_num_t gpio_num, rtc_gpio_mode_t mode);
+
+/**
+ * @brief  RTC GPIO pullup enable
+ *
+ * This function only works for RTC IOs. In general, call gpio_pullup_en,
+ * which will work both for normal GPIOs and RTC IOs.
+ *
+ * @param  gpio_num GPIO number (e.g. GPIO_NUM_12)
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_pullup_en(gpio_num_t gpio_num);
+
+/**
+ * @brief  RTC GPIO pulldown enable
+ *
+ * This function only works for RTC IOs. In general, call gpio_pulldown_en,
+ * which will work both for normal GPIOs and RTC IOs.
+ *
+ * @param  gpio_num GPIO number (e.g. GPIO_NUM_12)
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_pulldown_en(gpio_num_t gpio_num);
+
+/**
+ * @brief  RTC GPIO pullup disable
+ *
+ * This function only works for RTC IOs. In general, call gpio_pullup_dis,
+ * which will work both for normal GPIOs and RTC IOs.
+ *
+ * @param  gpio_num GPIO number (e.g. GPIO_NUM_12)
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_pullup_dis(gpio_num_t gpio_num);
+
+/**
+ * @brief  RTC GPIO pulldown disable
+ *
+ * This function only works for RTC IOs. In general, call gpio_pulldown_dis,
+ * which will work both for normal GPIOs and RTC IOs.
+ *
+ * @param  gpio_num GPIO number (e.g. GPIO_NUM_12)
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_pulldown_dis(gpio_num_t gpio_num);
+
+/**
+ * @brief Set RTC GPIO pad drive capability
+ *
+ * @param gpio_num GPIO number, only support output GPIOs
+ * @param strength Drive capability of the pad
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t rtc_gpio_set_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t strength);
+
+/**
+ * @brief Get RTC GPIO pad drive capability
+ *
+ * @param gpio_num GPIO number, only support output GPIOs
+ * @param strength Pointer to accept drive capability of the pad
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t rtc_gpio_get_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t* strength);
+
+#endif // SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+
+#if SOC_RTCIO_HOLD_SUPPORTED
+
+/**
+ * @brief Enable hold function on an RTC IO pad
+ *
+ * Enabling HOLD function will cause the pad to latch current values of
+ * input enable, output enable, output value, function, drive strength values.
+ * This function is useful when going into light or deep sleep mode to prevent
+ * the pin configuration from changing.
+ *
+ * @param gpio_num GPIO number (e.g. GPIO_NUM_12)
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_hold_en(gpio_num_t gpio_num);
+
+/**
+ * @brief Disable hold function on an RTC IO pad
+ *
+ * Disabling hold function will allow the pad receive the values of
+ * input enable, output enable, output value, function, drive strength from
+ * RTC_IO peripheral.
+ *
+ * @param gpio_num GPIO number (e.g. GPIO_NUM_12)
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_hold_dis(gpio_num_t gpio_num);
+
+/**
+ * @brief Helper function to disconnect internal circuits from an RTC IO
+ * This function disables input, output, pullup, pulldown, and enables
+ * hold feature for an RTC IO.
+ * Use this function if an RTC IO needs to be disconnected from internal
+ * circuits in deep sleep, to minimize leakage current.
+ *
+ * In particular, for ESP32-WROVER module, call
+ * rtc_gpio_isolate(GPIO_NUM_12) before entering deep sleep, to reduce
+ * deep sleep current.
+ *
+ * @param gpio_num GPIO number (e.g. GPIO_NUM_12).
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num);
+
+/**
+ * @brief Enable force hold signal for all RTC IOs
+ *
+ * Each RTC pad has a "force hold" input signal from the RTC controller.
+ * If this signal is set, pad latches current values of input enable,
+ * function, output enable, and other signals which come from the RTC mux.
+ * Force hold signal is enabled before going into deep sleep for pins which
+ * are used for EXT1 wakeup.
+ */
+esp_err_t rtc_gpio_force_hold_all(void);
+
+/**
+ * @brief Disable force hold signal for all RTC IOs
+ */
+esp_err_t rtc_gpio_force_hold_dis_all(void);
+
+#endif // SOC_RTCIO_HOLD_SUPPORTED
+
+#if SOC_RTCIO_WAKE_SUPPORTED
+
+/**
+ * @brief Enable wakeup from sleep mode using specific GPIO
+ * @param gpio_num  GPIO number
+ * @param intr_type  Wakeup on high level (GPIO_INTR_HIGH_LEVEL) or low level
+ *                   (GPIO_INTR_LOW_LEVEL)
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if gpio_num is not an RTC IO, or intr_type is not
+ *        one of GPIO_INTR_HIGH_LEVEL, GPIO_INTR_LOW_LEVEL.
+ */
+esp_err_t rtc_gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type);
+
+/**
+ * @brief Disable wakeup from sleep mode using specific GPIO
+ * @param gpio_num  GPIO number
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if gpio_num is not an RTC IO
+ */
+esp_err_t rtc_gpio_wakeup_disable(gpio_num_t gpio_num);
+
+#endif // SOC_RTCIO_WAKE_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/sdio_slave.h b/tools/sdk/esp32s3/include/driver/include/driver/sdio_slave.h
new file mode 100644
index 00000000000..e124b5cc86f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/sdio_slave.h
@@ -0,0 +1,288 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "freertos/FreeRTOS.h"
+#include "esp_err.h"
+#include "sys/queue.h"
+
+#include "hal/sdio_slave_types.h"
+#include "soc/sdio_slave_periph.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SDIO_SLAVE_RECV_MAX_BUFFER  (4096-4)
+
+typedef void(*sdio_event_cb_t)(uint8_t event);
+
+
+/// Configuration of SDIO slave
+typedef struct {
+    sdio_slave_timing_t timing;             ///< timing of sdio_slave. see `sdio_slave_timing_t`.
+    sdio_slave_sending_mode_t sending_mode; ///< mode of sdio_slave. `SDIO_SLAVE_MODE_STREAM` if the data needs to be sent as much as possible; `SDIO_SLAVE_MODE_PACKET` if the data should be sent in packets.
+    int                 send_queue_size;    ///< max buffers that can be queued before sending.
+    size_t              recv_buffer_size;
+                            ///< If buffer_size is too small, it costs more CPU time to handle larger number of buffers.
+                            ///< If buffer_size is too large, the space larger than the transaction length is left blank but still counts a buffer, and the buffers are easily run out.
+                            ///< Should be set according to length of data really transferred.
+                            ///< All data that do not fully fill a buffer is still counted as one buffer. E.g. 10 bytes data costs 2 buffers if the size is 8 bytes per buffer.
+                            ///< Buffer size of the slave pre-defined between host and slave before communication. All receive buffer given to the driver should be larger than this.
+    sdio_event_cb_t     event_cb;           ///< when the host interrupts slave, this callback will be called with interrupt number (0-7).
+    uint32_t            flags; ///< Features to be enabled for the slave, combinations of ``SDIO_SLAVE_FLAG_*``.
+#define SDIO_SLAVE_FLAG_DAT2_DISABLED       BIT(0)      /**< It is required by the SD specification that all 4 data
+        lines should be used and pulled up even in 1-bit mode or SPI mode. However, as a feature, the user can specify
+        this flag to make use of DAT2 pin in 1-bit mode. Note that the host cannot read CCCR registers to know we don't
+        support 4-bit mode anymore, please do this at your own risk.
+        */
+#define SDIO_SLAVE_FLAG_HOST_INTR_DISABLED  BIT(1)      /**< The DAT1 line is used as the interrupt line in SDIO
+        protocol. However, as a feature, the user can specify this flag to make use of DAT1 pin of the slave in 1-bit
+        mode. Note that the host has to do polling to the interrupt registers to know whether there are interrupts from
+        the slave. And it cannot read CCCR registers to know we don't support 4-bit mode anymore, please do this at
+        your own risk.
+        */
+#define SDIO_SLAVE_FLAG_INTERNAL_PULLUP     BIT(2)      /**< Enable internal pullups for enabled pins. It is required
+        by the SD specification that all the 4 data lines should be pulled up even in 1-bit mode or SPI mode. Note that
+        the internal pull-ups are not sufficient for stable communication, please do connect external pull-ups on the
+        bus. This is only for example and debug use.
+        */
+} sdio_slave_config_t;
+
+/** Handle of a receive buffer, register a handle by calling ``sdio_slave_recv_register_buf``. Use the handle to load the buffer to the
+ *  driver, or call ``sdio_slave_recv_unregister_buf`` if it is no longer used.
+ */
+typedef void *sdio_slave_buf_handle_t;
+
+/** Initialize the sdio slave driver
+ *
+ * @param config Configuration of the sdio slave driver.
+ *
+ * @return
+ *     - ESP_ERR_NOT_FOUND if no free interrupt found.
+ *     - ESP_ERR_INVALID_STATE if already initialized.
+ *     - ESP_ERR_NO_MEM if fail due to memory allocation failed.
+ *     - ESP_OK if success
+ */
+esp_err_t sdio_slave_initialize(sdio_slave_config_t *config);
+
+/** De-initialize the sdio slave driver to release the resources.
+ */
+void sdio_slave_deinit(void);
+
+/** Start hardware for sending and receiving, as well as set the IOREADY1 to 1.
+ *
+ * @note The driver will continue sending from previous data and PKT_LEN counting, keep data received as well as start receiving from current TOKEN1 counting.
+ * See ``sdio_slave_reset``.
+ *
+ * @return
+ *  - ESP_ERR_INVALID_STATE if already started.
+ *  - ESP_OK otherwise.
+ */
+esp_err_t sdio_slave_start(void);
+
+/** Stop hardware from sending and receiving, also set IOREADY1 to 0.
+ *
+ * @note this will not clear the data already in the driver, and also not reset the PKT_LEN and TOKEN1 counting. Call ``sdio_slave_reset`` to do that.
+ */
+void sdio_slave_stop(void);
+
+/** Clear the data still in the driver, as well as reset the PKT_LEN and TOKEN1 counting.
+ *
+ * @return always return ESP_OK.
+ */
+esp_err_t sdio_slave_reset(void);
+
+/*---------------------------------------------------------------------------
+ *                  Receive
+ *--------------------------------------------------------------------------*/
+/** Register buffer used for receiving. All buffers should be registered before used, and then can be used (again) in the driver by the handle returned.
+ *
+ * @param start The start address of the buffer.
+ *
+ * @note The driver will use and only use the amount of space specified in the `recv_buffer_size` member set in the `sdio_slave_config_t`.
+ *       All buffers should be larger than that. The buffer is used by the DMA, so it should be DMA capable and 32-bit aligned.
+ *
+ * @return The buffer handle if success, otherwise NULL.
+ */
+sdio_slave_buf_handle_t sdio_slave_recv_register_buf(uint8_t *start);
+
+/** Unregister buffer from driver, and free the space used by the descriptor pointing to the buffer.
+ *
+ * @param handle Handle to the buffer to release.
+ *
+ * @return ESP_OK if success, ESP_ERR_INVALID_ARG if the handle is NULL or the buffer is being used.
+ */
+esp_err_t sdio_slave_recv_unregister_buf(sdio_slave_buf_handle_t handle);
+
+/** Load buffer to the queue waiting to receive data. The driver takes ownership of the buffer until the buffer is returned by
+ *  ``sdio_slave_send_get_finished`` after the transaction is finished.
+ *
+ * @param handle Handle to the buffer ready to receive data.
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG    if invalid handle or the buffer is already in the queue. Only after the buffer is returened by
+ *                              ``sdio_slave_recv`` can you load it again.
+ *     - ESP_OK if success
+ */
+esp_err_t sdio_slave_recv_load_buf(sdio_slave_buf_handle_t handle);
+
+/** Get buffer of received data if exist with packet information. The driver returns the ownership of the buffer to the app.
+ *
+ * When you see return value is ``ESP_ERR_NOT_FINISHED``, you should call this API iteratively until the return value is ``ESP_OK``.
+ * All the continuous buffers returned with ``ESP_ERR_NOT_FINISHED``, together with the last buffer returned with ``ESP_OK``, belong to one packet from the host.
+ *
+ * You can call simpler ``sdio_slave_recv`` instead, if the host never send data longer than the Receiving buffer size,
+ * or you don't care about the packet boundary (e.g. the data is only a byte stream).
+ *
+ * @param handle_ret Handle of the buffer holding received data. Use this handle in ``sdio_slave_recv_load_buf()`` to receive in the same buffer again.
+ * @param wait Time to wait before data received.
+ *
+ * @note Call ``sdio_slave_load_buf`` with the handle to re-load the buffer onto the link list, and receive with the same buffer again.
+ *       The address and length of the buffer got here is the same as got from `sdio_slave_get_buffer`.
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG    if handle_ret is NULL
+ *     - ESP_ERR_TIMEOUT        if timeout before receiving new data
+ *     - ESP_ERR_NOT_FINISHED   if returned buffer is not the end of a packet from the host, should call this API again until the end of a packet
+ *     - ESP_OK if success
+ */
+esp_err_t sdio_slave_recv_packet(sdio_slave_buf_handle_t* handle_ret, TickType_t wait);
+
+/** Get received data if exist. The driver returns the ownership of the buffer to the app.
+ *
+ * @param handle_ret Handle to the buffer holding received data. Use this handle in ``sdio_slave_recv_load_buf`` to receive in the same buffer again.
+ * @param[out] out_addr Output of the start address, set to NULL if not needed.
+ * @param[out] out_len Actual length of the data in the buffer, set to NULL if not needed.
+ * @param wait Time to wait before data received.
+ *
+ * @note Call ``sdio_slave_load_buf`` with the handle to re-load the buffer onto the link list, and receive with the same buffer again.
+ *       The address and length of the buffer got here is the same as got from `sdio_slave_get_buffer`.
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG    if handle_ret is NULL
+ *     - ESP_ERR_TIMEOUT        if timeout before receiving new data
+ *     - ESP_OK if success
+ */
+esp_err_t sdio_slave_recv(sdio_slave_buf_handle_t* handle_ret, uint8_t **out_addr, size_t *out_len, TickType_t wait);
+
+/** Retrieve the buffer corresponding to a handle.
+ *
+ * @param handle Handle to get the buffer.
+ * @param len_o Output of buffer length
+ *
+ * @return buffer address if success, otherwise NULL.
+ */
+uint8_t* sdio_slave_recv_get_buf(sdio_slave_buf_handle_t handle, size_t *len_o);
+
+/*---------------------------------------------------------------------------
+ *                  Send
+ *--------------------------------------------------------------------------*/
+/** Put a new sending transfer into the send queue. The driver takes ownership of the buffer until the buffer is returned by
+ *  ``sdio_slave_send_get_finished`` after the transaction is finished.
+ *
+ * @param addr Address for data to be sent. The buffer should be DMA capable and 32-bit aligned.
+ * @param len Length of the data, should not be longer than 4092 bytes (may support longer in the future).
+ * @param arg Argument to returned in ``sdio_slave_send_get_finished``. The argument can be used to indicate which transaction is done,
+ *            or as a parameter for a callback. Set to NULL if not needed.
+ * @param wait Time to wait if the buffer is full.
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG if the length is not greater than 0.
+ *     - ESP_ERR_TIMEOUT if the queue is still full until timeout.
+ *     - ESP_OK if success.
+ */
+esp_err_t sdio_slave_send_queue(uint8_t* addr, size_t len, void* arg, TickType_t wait);
+
+/** Return the ownership of a finished transaction.
+ * @param out_arg Argument of the finished transaction. Set to NULL if unused.
+ * @param wait Time to wait if there's no finished sending transaction.
+ *
+ * @return ESP_ERR_TIMEOUT if no transaction finished, or ESP_OK if succeed.
+ */
+esp_err_t sdio_slave_send_get_finished(void** out_arg, TickType_t wait);
+
+/** Start a new sending transfer, and wait for it (blocked) to be finished.
+ *
+ * @param addr Start address of the buffer to send
+ * @param len Length of buffer to send.
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG if the length of descriptor is not greater than 0.
+ *     - ESP_ERR_TIMEOUT if the queue is full or host do not start a transfer before timeout.
+ *     - ESP_OK if success.
+ */
+esp_err_t sdio_slave_transmit(uint8_t* addr, size_t len);
+
+/*---------------------------------------------------------------------------
+ *                  Host
+ *--------------------------------------------------------------------------*/
+/** Read the spi slave register shared with host.
+ *
+ * @param pos register address, 0-27 or 32-63.
+ *
+ * @note register 28 to 31 are reserved for interrupt vector.
+ *
+ * @return value of the register.
+ */
+uint8_t sdio_slave_read_reg(int pos);
+
+/** Write the spi slave register shared with host.
+ *
+ * @param pos register address, 0-11, 14-15, 18-19, 24-27 and 32-63, other address are reserved.
+ * @param reg the value to write.
+ *
+ * @note register 29 and 31 are used for interrupt vector.
+ *
+ * @return ESP_ERR_INVALID_ARG if address wrong, otherwise ESP_OK.
+ */
+esp_err_t sdio_slave_write_reg(int pos, uint8_t reg);
+
+/** Get the interrupt enable for host.
+ *
+ * @return the interrupt mask.
+ */
+sdio_slave_hostint_t sdio_slave_get_host_intena(void);
+
+/** Set the interrupt enable for host.
+ *
+ * @param mask Enable mask for host interrupt.
+ */
+void sdio_slave_set_host_intena(sdio_slave_hostint_t mask);
+
+/** Interrupt the host by general purpose interrupt.
+ *
+ * @param pos Interrupt num, 0-7.
+ *
+ * @return
+ *     - ESP_ERR_INVALID_ARG if interrupt num error
+ *     - ESP_OK otherwise
+ */
+esp_err_t sdio_slave_send_host_int(uint8_t pos);
+
+/** Clear general purpose interrupt to host.
+ *
+ * @param mask Interrupt bits to clear, by bit mask.
+ */
+void sdio_slave_clear_host_int(sdio_slave_hostint_t mask);
+
+/** Wait for general purpose interrupt from host.
+ *
+ * @param pos Interrupt source number to wait for.
+ * is set.
+ * @param wait Time to wait before interrupt triggered.
+ *
+ * @note this clears the interrupt at the same time.
+ *
+ * @return ESP_OK if success, ESP_ERR_TIMEOUT if timeout.
+ */
+esp_err_t sdio_slave_wait_int(int pos, TickType_t wait);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/sdmmc_defs.h b/tools/sdk/esp32s3/include/driver/include/driver/sdmmc_defs.h
new file mode 100644
index 00000000000..54e051f354e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/sdmmc_defs.h
@@ -0,0 +1,490 @@
+/*
+ * SPDX-FileCopyrightText: 2006 Uwe Stuehler <uwe@openbsd.org>
+ *
+ * SPDX-License-Identifier: ISC
+ *
+ * SPDX-FileContributor: 2016-2021 Espressif Systems (Shanghai) CO LTD
+ */
+/*
+ * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _SDMMC_DEFS_H_
+#define _SDMMC_DEFS_H_
+
+#include <stdint.h>
+#include <limits.h>
+
+/* MMC commands */                              /* response type */
+#define MMC_GO_IDLE_STATE               0       /* R0 */
+#define MMC_SEND_OP_COND                1       /* R3 */
+#define MMC_ALL_SEND_CID                2       /* R2 */
+#define MMC_SET_RELATIVE_ADDR           3       /* R1 */
+#define MMC_SWITCH                      6       /* R1B */
+#define MMC_SELECT_CARD                 7       /* R1 */
+#define MMC_SEND_EXT_CSD                8       /* R1 */
+#define MMC_SEND_CSD                    9       /* R2 */
+#define MMC_SEND_CID                    10      /* R1 */
+#define MMC_READ_DAT_UNTIL_STOP         11      /* R1 */
+#define MMC_STOP_TRANSMISSION           12      /* R1B */
+#define MMC_SEND_STATUS                 13      /* R1 */
+#define MMC_SET_BLOCKLEN                16      /* R1 */
+#define MMC_READ_BLOCK_SINGLE           17      /* R1 */
+#define MMC_READ_BLOCK_MULTIPLE         18      /* R1 */
+#define MMC_WRITE_DAT_UNTIL_STOP        20      /* R1 */
+#define MMC_SET_BLOCK_COUNT             23      /* R1 */
+#define MMC_WRITE_BLOCK_SINGLE          24      /* R1 */
+#define MMC_WRITE_BLOCK_MULTIPLE        25      /* R1 */
+#define MMC_APP_CMD                     55      /* R1 */
+
+/* SD commands */                               /* response type */
+#define SD_SEND_RELATIVE_ADDR           3       /* R6 */
+#define SD_SEND_SWITCH_FUNC             6       /* R1 */
+#define SD_SEND_IF_COND                 8       /* R7 */
+#define SD_READ_OCR                     58      /* R3 */
+#define SD_CRC_ON_OFF                   59      /* R1 */
+
+/* SD application commands */                   /* response type */
+#define SD_APP_SET_BUS_WIDTH            6       /* R1 */
+#define SD_APP_SD_STATUS                13      /* R2 */
+#define SD_APP_OP_COND                  41      /* R3 */
+#define SD_APP_SEND_SCR                 51      /* R1 */
+
+/* SD IO commands */
+#define SD_IO_SEND_OP_COND              5       /* R4 */
+#define SD_IO_RW_DIRECT                 52      /* R5 */
+#define SD_IO_RW_EXTENDED               53      /* R5 */
+
+
+/* OCR bits */
+#define MMC_OCR_MEM_READY               (1<<31) /* memory power-up status bit */
+#define MMC_OCR_ACCESS_MODE_MASK        0x60000000 /* bits 30:29 */
+#define MMC_OCR_SECTOR_MODE             (1<<30)
+#define MMC_OCR_BYTE_MODE               (1<<29)
+#define MMC_OCR_3_5V_3_6V               (1<<23)
+#define MMC_OCR_3_4V_3_5V               (1<<22)
+#define MMC_OCR_3_3V_3_4V               (1<<21)
+#define MMC_OCR_3_2V_3_3V               (1<<20)
+#define MMC_OCR_3_1V_3_2V               (1<<19)
+#define MMC_OCR_3_0V_3_1V               (1<<18)
+#define MMC_OCR_2_9V_3_0V               (1<<17)
+#define MMC_OCR_2_8V_2_9V               (1<<16)
+#define MMC_OCR_2_7V_2_8V               (1<<15)
+#define MMC_OCR_2_6V_2_7V               (1<<14)
+#define MMC_OCR_2_5V_2_6V               (1<<13)
+#define MMC_OCR_2_4V_2_5V               (1<<12)
+#define MMC_OCR_2_3V_2_4V               (1<<11)
+#define MMC_OCR_2_2V_2_3V               (1<<10)
+#define MMC_OCR_2_1V_2_2V               (1<<9)
+#define MMC_OCR_2_0V_2_1V               (1<<8)
+#define MMC_OCR_1_65V_1_95V             (1<<7)
+
+#define SD_OCR_SDHC_CAP                 (1<<30)
+#define SD_OCR_VOL_MASK                 0xFF8000 /* bits 23:15 */
+
+/* SD mode R1 response type bits */
+#define MMC_R1_READY_FOR_DATA           (1<<8)  /* ready for next transfer */
+#define MMC_R1_APP_CMD                  (1<<5)  /* app. commands supported */
+#define MMC_R1_SWITCH_ERROR             (1<<7)  /* switch command did not succeed */
+
+/* SPI mode R1 response type bits */
+#define SD_SPI_R1_IDLE_STATE            (1<<0)
+#define SD_SPI_R1_ERASE_RST             (1<<1)
+#define SD_SPI_R1_ILLEGAL_CMD           (1<<2)
+#define SD_SPI_R1_CMD_CRC_ERR           (1<<3)
+#define SD_SPI_R1_ERASE_SEQ_ERR         (1<<4)
+#define SD_SPI_R1_ADDR_ERR              (1<<5)
+#define SD_SPI_R1_PARAM_ERR             (1<<6)
+#define SD_SPI_R1_NO_RESPONSE           (1<<7)
+
+#define SDIO_R1_FUNC_NUM_ERR            (1<<4)
+
+/* 48-bit response decoding (32 bits w/o CRC) */
+#define MMC_R1(resp)                    ((resp)[0])
+#define MMC_R3(resp)                    ((resp)[0])
+#define MMC_R4(resp)                    ((resp)[0])
+#define MMC_R5(resp)                    ((resp)[0])
+#define SD_R6(resp)                     ((resp)[0])
+#define MMC_R1_CURRENT_STATE(resp)      (((resp)[0] >> 9) & 0xf)
+
+/* SPI mode response decoding */
+#define SD_SPI_R1(resp)                 ((resp)[0] & 0xff)
+#define SD_SPI_R2(resp)                 ((resp)[0] & 0xffff)
+#define SD_SPI_R3(resp)                 ((resp)[0])
+#define SD_SPI_R7(resp)                 ((resp)[0])
+
+/* SPI mode data response decoding */
+#define SD_SPI_DATA_RSP_VALID(resp_byte)        (((resp_byte)&0x11)==0x1)
+#define SD_SPI_DATA_RSP(resp_byte)              (((resp_byte)>>1)&0x7)
+#define  SD_SPI_DATA_ACCEPTED                   0x2
+#define  SD_SPI_DATA_CRC_ERROR                  0x5
+#define  SD_SPI_DATA_WR_ERROR                   0x6
+
+/* RCA argument and response */
+#define MMC_ARG_RCA(rca)                ((rca) << 16)
+#define SD_R6_RCA(resp)                 (SD_R6((resp)) >> 16)
+
+/* bus width argument */
+#define SD_ARG_BUS_WIDTH_1              0
+#define SD_ARG_BUS_WIDTH_4              2
+
+/* EXT_CSD fields */
+#define EXT_CSD_BUS_WIDTH               183     /* WO */
+#define EXT_CSD_HS_TIMING               185     /* R/W */
+#define EXT_CSD_REV                     192     /* RO */
+#define EXT_CSD_STRUCTURE               194     /* RO */
+#define EXT_CSD_CARD_TYPE               196     /* RO */
+#define EXT_CSD_SEC_COUNT               212     /* RO */
+#define EXT_CSD_PWR_CL_26_360           203     /* RO */
+#define EXT_CSD_PWR_CL_52_360           202     /* RO */
+#define EXT_CSD_PWR_CL_26_195           201     /* RO */
+#define EXT_CSD_PWR_CL_52_195           200     /* RO */
+#define EXT_CSD_POWER_CLASS             187     /* R/W */
+#define EXT_CSD_CMD_SET                 191     /* R/W */
+#define EXT_CSD_S_CMD_SET               504     /* RO */
+
+/* EXT_CSD field definitions */
+#define EXT_CSD_CMD_SET_NORMAL          (1U << 0)
+#define EXT_CSD_CMD_SET_SECURE          (1U << 1)
+#define EXT_CSD_CMD_SET_CPSECURE        (1U << 2)
+
+/* EXT_CSD_HS_TIMING */
+#define EXT_CSD_HS_TIMING_BC            0
+#define EXT_CSD_HS_TIMING_HS            1
+#define EXT_CSD_HS_TIMING_HS200         2
+#define EXT_CSD_HS_TIMING_HS400         3
+
+/* EXT_CSD_BUS_WIDTH  */
+#define EXT_CSD_BUS_WIDTH_1             0
+#define EXT_CSD_BUS_WIDTH_4             1
+#define EXT_CSD_BUS_WIDTH_8             2
+#define EXT_CSD_BUS_WIDTH_4_DDR         5
+#define EXT_CSD_BUS_WIDTH_8_DDR         6
+
+/* EXT_CSD_CARD_TYPE */
+/* The only currently valid values for this field are 0x01, 0x03, 0x07,
+ * 0x0B and 0x0F. */
+#define EXT_CSD_CARD_TYPE_F_26M         (1 << 0)        /* SDR at "rated voltages */
+#define EXT_CSD_CARD_TYPE_F_52M         (1 << 1)        /* SDR at "rated voltages */
+#define EXT_CSD_CARD_TYPE_F_52M_1_8V    (1 << 2)        /* DDR, 1.8V or 3.3V I/O */
+#define EXT_CSD_CARD_TYPE_F_52M_1_2V    (1 << 3)        /* DDR, 1.2V I/O */
+#define EXT_CSD_CARD_TYPE_26M           0x01
+#define EXT_CSD_CARD_TYPE_52M           0x03
+#define EXT_CSD_CARD_TYPE_52M_V18       0x07
+#define EXT_CSD_CARD_TYPE_52M_V12       0x0b
+#define EXT_CSD_CARD_TYPE_52M_V12_18    0x0f
+
+/* EXT_CSD MMC */
+#define EXT_CSD_MMC_SIZE 512
+
+/* MMC_SWITCH access mode */
+#define MMC_SWITCH_MODE_CMD_SET         0x00    /* Change the command set */
+#define MMC_SWITCH_MODE_SET_BITS        0x01    /* Set bits in value */
+#define MMC_SWITCH_MODE_CLEAR_BITS      0x02    /* Clear bits in value */
+#define MMC_SWITCH_MODE_WRITE_BYTE      0x03    /* Set target to value */
+
+/* MMC R2 response (CSD) */
+#define MMC_CSD_CSDVER(resp)            MMC_RSP_BITS((resp), 126, 2)
+#define  MMC_CSD_CSDVER_1_0             1
+#define  MMC_CSD_CSDVER_2_0             2
+#define  MMC_CSD_CSDVER_EXT_CSD         3
+#define MMC_CSD_MMCVER(resp)            MMC_RSP_BITS((resp), 122, 4)
+#define  MMC_CSD_MMCVER_1_0             0 /* MMC 1.0 - 1.2 */
+#define  MMC_CSD_MMCVER_1_4             1 /* MMC 1.4 */
+#define  MMC_CSD_MMCVER_2_0             2 /* MMC 2.0 - 2.2 */
+#define  MMC_CSD_MMCVER_3_1             3 /* MMC 3.1 - 3.3 */
+#define  MMC_CSD_MMCVER_4_0             4 /* MMC 4 */
+#define MMC_CSD_READ_BL_LEN(resp)       MMC_RSP_BITS((resp), 80, 4)
+#define MMC_CSD_C_SIZE(resp)            MMC_RSP_BITS((resp), 62, 12)
+#define MMC_CSD_CAPACITY(resp)          ((MMC_CSD_C_SIZE((resp))+1) << \
+                                         (MMC_CSD_C_SIZE_MULT((resp))+2))
+#define MMC_CSD_C_SIZE_MULT(resp)       MMC_RSP_BITS((resp), 47, 3)
+
+/* MMC v1 R2 response (CID) */
+#define MMC_CID_MID_V1(resp)            MMC_RSP_BITS((resp), 104, 24)
+#define MMC_CID_PNM_V1_CPY(resp, pnm)                                   \
+        do {                                                            \
+                (pnm)[0] = MMC_RSP_BITS((resp), 96, 8);                 \
+                (pnm)[1] = MMC_RSP_BITS((resp), 88, 8);                 \
+                (pnm)[2] = MMC_RSP_BITS((resp), 80, 8);                 \
+                (pnm)[3] = MMC_RSP_BITS((resp), 72, 8);                 \
+                (pnm)[4] = MMC_RSP_BITS((resp), 64, 8);                 \
+                (pnm)[5] = MMC_RSP_BITS((resp), 56, 8);                 \
+                (pnm)[6] = MMC_RSP_BITS((resp), 48, 8);                 \
+                (pnm)[7] = '\0';                                        \
+        } while (0)
+#define MMC_CID_REV_V1(resp)            MMC_RSP_BITS((resp), 40, 8)
+#define MMC_CID_PSN_V1(resp)            MMC_RSP_BITS((resp), 16, 24)
+#define MMC_CID_MDT_V1(resp)            MMC_RSP_BITS((resp), 8, 8)
+
+/* MMC v2 R2 response (CID) */
+#define MMC_CID_MID_V2(resp)            MMC_RSP_BITS((resp), 120, 8)
+#define MMC_CID_OID_V2(resp)            MMC_RSP_BITS((resp), 104, 16)
+#define MMC_CID_PNM_V2_CPY(resp, pnm)                                   \
+        do {                                                            \
+                (pnm)[0] = MMC_RSP_BITS((resp), 96, 8);                 \
+                (pnm)[1] = MMC_RSP_BITS((resp), 88, 8);                 \
+                (pnm)[2] = MMC_RSP_BITS((resp), 80, 8);                 \
+                (pnm)[3] = MMC_RSP_BITS((resp), 72, 8);                 \
+                (pnm)[4] = MMC_RSP_BITS((resp), 64, 8);                 \
+                (pnm)[5] = MMC_RSP_BITS((resp), 56, 8);                 \
+                (pnm)[6] = '\0';                                        \
+        } while (0)
+#define MMC_CID_PSN_V2(resp)            MMC_RSP_BITS((resp), 16, 32)
+
+/* SD R2 response (CSD) */
+#define SD_CSD_CSDVER(resp)             MMC_RSP_BITS((resp), 126, 2)
+#define  SD_CSD_CSDVER_1_0              0
+#define  SD_CSD_CSDVER_2_0              1
+#define SD_CSD_TAAC(resp)               MMC_RSP_BITS((resp), 112, 8)
+#define  SD_CSD_TAAC_1_5_MSEC           0x26
+#define SD_CSD_NSAC(resp)               MMC_RSP_BITS((resp), 104, 8)
+#define SD_CSD_SPEED(resp)              MMC_RSP_BITS((resp), 96, 8)
+#define  SD_CSD_SPEED_25_MHZ            0x32
+#define  SD_CSD_SPEED_50_MHZ            0x5a
+#define SD_CSD_CCC(resp)                MMC_RSP_BITS((resp), 84, 12)
+#define  SD_CSD_CCC_BASIC               (1 << 0)        /* basic */
+#define  SD_CSD_CCC_BR                  (1 << 2)        /* block read */
+#define  SD_CSD_CCC_BW                  (1 << 4)        /* block write */
+#define  SD_CSD_CCC_ERASE               (1 << 5)        /* erase */
+#define  SD_CSD_CCC_WP                  (1 << 6)        /* write protection */
+#define  SD_CSD_CCC_LC                  (1 << 7)        /* lock card */
+#define  SD_CSD_CCC_AS                  (1 << 8)        /*application specific*/
+#define  SD_CSD_CCC_IOM                 (1 << 9)        /* I/O mode */
+#define  SD_CSD_CCC_SWITCH              (1 << 10)       /* switch */
+#define SD_CSD_READ_BL_LEN(resp)        MMC_RSP_BITS((resp), 80, 4)
+#define SD_CSD_READ_BL_PARTIAL(resp)    MMC_RSP_BITS((resp), 79, 1)
+#define SD_CSD_WRITE_BLK_MISALIGN(resp) MMC_RSP_BITS((resp), 78, 1)
+#define SD_CSD_READ_BLK_MISALIGN(resp)  MMC_RSP_BITS((resp), 77, 1)
+#define SD_CSD_DSR_IMP(resp)            MMC_RSP_BITS((resp), 76, 1)
+#define SD_CSD_C_SIZE(resp)             MMC_RSP_BITS((resp), 62, 12)
+#define SD_CSD_CAPACITY(resp)           ((SD_CSD_C_SIZE((resp))+1) << \
+                                         (SD_CSD_C_SIZE_MULT((resp))+2))
+#define SD_CSD_V2_C_SIZE(resp)          MMC_RSP_BITS((resp), 48, 22)
+#define SD_CSD_V2_CAPACITY(resp)        ((SD_CSD_V2_C_SIZE((resp))+1) << 10)
+#define SD_CSD_V2_BL_LEN                0x9     /* 512 */
+#define SD_CSD_VDD_R_CURR_MIN(resp)     MMC_RSP_BITS((resp), 59, 3)
+#define SD_CSD_VDD_R_CURR_MAX(resp)     MMC_RSP_BITS((resp), 56, 3)
+#define SD_CSD_VDD_W_CURR_MIN(resp)     MMC_RSP_BITS((resp), 53, 3)
+#define SD_CSD_VDD_W_CURR_MAX(resp)     MMC_RSP_BITS((resp), 50, 3)
+#define  SD_CSD_VDD_RW_CURR_100mA       0x7
+#define  SD_CSD_VDD_RW_CURR_80mA        0x6
+#define SD_CSD_C_SIZE_MULT(resp)        MMC_RSP_BITS((resp), 47, 3)
+#define SD_CSD_ERASE_BLK_EN(resp)       MMC_RSP_BITS((resp), 46, 1)
+#define SD_CSD_SECTOR_SIZE(resp)        MMC_RSP_BITS((resp), 39, 7) /* +1 */
+#define SD_CSD_WP_GRP_SIZE(resp)        MMC_RSP_BITS((resp), 32, 7) /* +1 */
+#define SD_CSD_WP_GRP_ENABLE(resp)      MMC_RSP_BITS((resp), 31, 1)
+#define SD_CSD_R2W_FACTOR(resp)         MMC_RSP_BITS((resp), 26, 3)
+#define SD_CSD_WRITE_BL_LEN(resp)       MMC_RSP_BITS((resp), 22, 4)
+#define  SD_CSD_RW_BL_LEN_2G            0xa
+#define  SD_CSD_RW_BL_LEN_1G            0x9
+#define SD_CSD_WRITE_BL_PARTIAL(resp)   MMC_RSP_BITS((resp), 21, 1)
+#define SD_CSD_FILE_FORMAT_GRP(resp)    MMC_RSP_BITS((resp), 15, 1)
+#define SD_CSD_COPY(resp)               MMC_RSP_BITS((resp), 14, 1)
+#define SD_CSD_PERM_WRITE_PROTECT(resp) MMC_RSP_BITS((resp), 13, 1)
+#define SD_CSD_TMP_WRITE_PROTECT(resp)  MMC_RSP_BITS((resp), 12, 1)
+#define SD_CSD_FILE_FORMAT(resp)        MMC_RSP_BITS((resp), 10, 2)
+
+/* SD R2 response (CID) */
+#define SD_CID_MID(resp)                MMC_RSP_BITS((resp), 120, 8)
+#define SD_CID_OID(resp)                MMC_RSP_BITS((resp), 104, 16)
+#define SD_CID_PNM_CPY(resp, pnm)                                       \
+        do {                                                            \
+                (pnm)[0] = MMC_RSP_BITS((resp), 96, 8);                 \
+                (pnm)[1] = MMC_RSP_BITS((resp), 88, 8);                 \
+                (pnm)[2] = MMC_RSP_BITS((resp), 80, 8);                 \
+                (pnm)[3] = MMC_RSP_BITS((resp), 72, 8);                 \
+                (pnm)[4] = MMC_RSP_BITS((resp), 64, 8);                 \
+                (pnm)[5] = '\0';                                        \
+        } while (0)
+#define SD_CID_REV(resp)                MMC_RSP_BITS((resp), 56, 8)
+#define SD_CID_PSN(resp)                MMC_RSP_BITS((resp), 24, 32)
+#define SD_CID_MDT(resp)                MMC_RSP_BITS((resp), 8, 12)
+
+/* SCR (SD Configuration Register) */
+#define SCR_STRUCTURE(scr)              MMC_RSP_BITS((scr), 60, 4)
+#define  SCR_STRUCTURE_VER_1_0          0 /* Version 1.0 */
+#define SCR_SD_SPEC(scr)                MMC_RSP_BITS((scr), 56, 4)
+#define  SCR_SD_SPEC_VER_1_0            0 /* Version 1.0 and 1.01 */
+#define  SCR_SD_SPEC_VER_1_10           1 /* Version 1.10 */
+#define  SCR_SD_SPEC_VER_2              2 /* Version 2.00 or Version 3.0X */
+#define SCR_DATA_STAT_AFTER_ERASE(scr)  MMC_RSP_BITS((scr), 55, 1)
+#define SCR_SD_SECURITY(scr)            MMC_RSP_BITS((scr), 52, 3)
+#define  SCR_SD_SECURITY_NONE           0 /* no security */
+#define  SCR_SD_SECURITY_1_0            1 /* security protocol 1.0 */
+#define  SCR_SD_SECURITY_1_0_2          2 /* security protocol 1.0 */
+#define SCR_SD_BUS_WIDTHS(scr)          MMC_RSP_BITS((scr), 48, 4)
+#define  SCR_SD_BUS_WIDTHS_1BIT         (1 << 0) /* 1bit (DAT0) */
+#define  SCR_SD_BUS_WIDTHS_4BIT         (1 << 2) /* 4bit (DAT0-3) */
+#define SCR_SD_SPEC3(scr)               MMC_RSP_BITS((scr), 47, 1)
+#define SCR_EX_SECURITY(scr)            MMC_RSP_BITS((scr), 43, 4)
+#define SCR_SD_SPEC4(scr)               MMC_RSP_BITS((scr), 42, 1)
+#define SCR_RESERVED(scr)               MMC_RSP_BITS((scr), 34, 8)
+#define SCR_CMD_SUPPORT_CMD23(scr)      MMC_RSP_BITS((scr), 33, 1)
+#define SCR_CMD_SUPPORT_CMD20(scr)      MMC_RSP_BITS((scr), 32, 1)
+#define SCR_RESERVED2(scr)              MMC_RSP_BITS((scr), 0, 32)
+
+/* Max supply current in SWITCH_FUNC response (in mA) */
+#define SD_SFUNC_I_MAX(status) (MMC_RSP_BITS((uint32_t *)(status), 496, 16))
+
+/* Supported flags in SWITCH_FUNC response */
+#define SD_SFUNC_SUPPORTED(status, group) \
+        (MMC_RSP_BITS((uint32_t *)(status), 400 + (group - 1) * 16, 16))
+
+/* Selected function in SWITCH_FUNC response */
+#define SD_SFUNC_SELECTED(status, group) \
+        (MMC_RSP_BITS((uint32_t *)(status), 376 + (group - 1) * 4, 4))
+
+/* Busy flags in SWITCH_FUNC response */
+#define SD_SFUNC_BUSY(status, group) \
+        (MMC_RSP_BITS((uint32_t *)(status), 272 + (group - 1) * 16, 16))
+
+/* Version of SWITCH_FUNC response */
+#define SD_SFUNC_VER(status)    (MMC_RSP_BITS((uint32_t *)(status), 368, 8))
+
+#define SD_SFUNC_GROUP_MAX      6
+#define SD_SFUNC_FUNC_MAX       15
+
+#define SD_ACCESS_MODE          1       /* Function group 1, Access Mode */
+
+#define SD_ACCESS_MODE_SDR12    0       /* 25 MHz clock */
+#define SD_ACCESS_MODE_SDR25    1       /* 50 MHz clock */
+#define SD_ACCESS_MODE_SDR50    2       /* UHS-I, 100 MHz clock */
+#define SD_ACCESS_MODE_SDR104   3       /* UHS-I, 208 MHz clock */
+#define SD_ACCESS_MODE_DDR50    4       /* UHS-I, 50 MHz clock, DDR */
+
+/**
+ * @brief Extract up to 32 sequential bits from an array of 32-bit words
+ *
+ * Bits within the word are numbered in the increasing order from LSB to MSB.
+ *
+ * As an example, consider 2 32-bit words:
+ *
+ * 0x01234567 0x89abcdef
+ *
+ * On a little-endian system, the bytes are stored in memory as follows:
+ *
+ * 67 45 23 01 ef cd ab 89
+ *
+ * MMC_RSP_BITS will extact bits as follows:
+ *
+ * start=0  len=4   -> result=0x00000007
+ * start=0  len=12  -> result=0x00000567
+ * start=28 len=8   -> result=0x000000f0
+ * start=59 len=5   -> result=0x00000011
+ *
+ * @param src array of words to extract bits from
+ * @param start index of the first bit to extract
+ * @param len number of bits to extract, 1 to 32
+ * @return 32-bit word where requested bits start from LSB
+ */
+static inline uint32_t MMC_RSP_BITS(uint32_t *src, int start, int len)
+{
+    uint32_t mask = (len % 32 == 0) ? UINT_MAX : UINT_MAX >> (32 - (len % 32));
+    size_t word = start / 32;
+    size_t shift = start % 32;
+    uint32_t right = src[word] >> shift;
+    uint32_t left = (len + shift <= 32) ? 0 : src[word + 1] << ((32 - shift) % 32);
+    return (left | right) & mask;
+}
+
+/* SD R4 response (IO OCR) */
+#define SD_IO_OCR_MEM_READY             (1<<31)
+#define SD_IO_OCR_NUM_FUNCTIONS(ocr)    (((ocr) >> 28) & 0x7)
+#define SD_IO_OCR_MEM_PRESENT       (1<<27)
+#define SD_IO_OCR_MASK              0x00fffff0
+
+/* CMD52 arguments */
+#define SD_ARG_CMD52_READ           (0<<31)
+#define SD_ARG_CMD52_WRITE          (1<<31)
+#define SD_ARG_CMD52_FUNC_SHIFT     28
+#define SD_ARG_CMD52_FUNC_MASK      0x7
+#define SD_ARG_CMD52_EXCHANGE       (1<<27)
+#define SD_ARG_CMD52_REG_SHIFT      9
+#define SD_ARG_CMD52_REG_MASK       0x1ffff
+#define SD_ARG_CMD52_DATA_SHIFT     0
+#define SD_ARG_CMD52_DATA_MASK      0xff
+#define SD_R5_DATA(resp)            ((resp)[0] & 0xff)
+
+/* CMD53 arguments */
+#define SD_ARG_CMD53_READ           (0<<31)
+#define SD_ARG_CMD53_WRITE          (1<<31)
+#define SD_ARG_CMD53_FUNC_SHIFT     28
+#define SD_ARG_CMD53_FUNC_MASK      0x7
+#define SD_ARG_CMD53_BLOCK_MODE     (1<<27)
+#define SD_ARG_CMD53_INCREMENT      (1<<26)
+#define SD_ARG_CMD53_REG_SHIFT      9
+#define SD_ARG_CMD53_REG_MASK       0x1ffff
+#define SD_ARG_CMD53_LENGTH_SHIFT   0
+#define SD_ARG_CMD53_LENGTH_MASK    0x1ff
+#define SD_ARG_CMD53_LENGTH_MAX     512
+
+/* Card Common Control Registers (CCCR) */
+#define SD_IO_CCCR_START            0x00000
+#define SD_IO_CCCR_SIZE             0x100
+#define SD_IO_CCCR_FN_ENABLE        0x02
+#define SD_IO_CCCR_FN_READY         0x03
+#define SD_IO_CCCR_INT_ENABLE       0x04
+#define SD_IO_CCCR_INT_PENDING      0x05
+#define SD_IO_CCCR_CTL              0x06
+#define  CCCR_CTL_RES               (1<<3)
+#define SD_IO_CCCR_BUS_WIDTH        0x07
+#define  CCCR_BUS_WIDTH_1           (0<<0)
+#define  CCCR_BUS_WIDTH_4           (2<<0)
+#define  CCCR_BUS_WIDTH_8           (3<<0)
+#define  CCCR_BUS_WIDTH_ECSI        (1<<5)
+#define SD_IO_CCCR_CARD_CAP         0x08
+#define  CCCR_CARD_CAP_LSC          BIT(6)
+#define  CCCR_CARD_CAP_4BLS         BIT(7)
+#define SD_IO_CCCR_CISPTR           0x09
+#define SD_IO_CCCR_BLKSIZEL         0x10
+#define SD_IO_CCCR_BLKSIZEH         0x11
+#define SD_IO_CCCR_HIGHSPEED        0x13
+#define  CCCR_HIGHSPEED_SUPPORT     BIT(0)
+#define  CCCR_HIGHSPEED_ENABLE      BIT(1)
+
+/* Function Basic Registers (FBR) */
+#define SD_IO_FBR_START         0x00100
+#define SD_IO_FBR_SIZE          0x00700
+
+/* Card Information Structure (CIS) */
+#define SD_IO_CIS_START         0x01000
+#define SD_IO_CIS_SIZE          0x17000
+
+/* CIS tuple codes (based on PC Card 16) */
+#define CISTPL_CODE_NULL            0x00
+#define CISTPL_CODE_DEVICE          0x01
+#define CISTPL_CODE_CHKSUM          0x10
+#define CISTPL_CODE_VERS1           0x15
+#define CISTPL_CODE_ALTSTR          0x16
+#define CISTPL_CODE_CONFIG          0x1A
+#define CISTPL_CODE_CFTABLE_ENTRY   0x1B
+#define CISTPL_CODE_MANFID          0x20
+#define CISTPL_CODE_FUNCID          0x21
+#define   TPLFID_FUNCTION_SDIO        0x0c
+#define CISTPL_CODE_FUNCE           0x22
+#define CISTPL_CODE_VENDER_BEGIN    0x80
+#define CISTPL_CODE_VENDER_END      0x8F
+#define CISTPL_CODE_SDIO_STD        0x91
+#define CISTPL_CODE_SDIO_EXT        0x92
+#define CISTPL_CODE_END             0xFF
+
+
+/* Timing */
+#define SDMMC_TIMING_LEGACY 0
+#define SDMMC_TIMING_HIGHSPEED 1
+#define SDMMC_TIMING_MMC_DDR52 2
+
+#endif //_SDMMC_DEFS_H_
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/sdmmc_host.h b/tools/sdk/esp32s3/include/driver/include/driver/sdmmc_host.h
new file mode 100644
index 00000000000..ff5ae71d011
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/sdmmc_host.h
@@ -0,0 +1,286 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "soc/soc_caps.h"
+#if SOC_SDMMC_HOST_SUPPORTED
+
+#include <stdint.h>
+#include <stddef.h>
+#include "esp_err.h"
+#include "sdmmc_types.h"
+#include "driver/gpio.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SDMMC_HOST_SLOT_0     0     ///< SDMMC slot 0
+#define SDMMC_HOST_SLOT_1     1     ///< SDMMC slot 1
+
+/**
+ * @brief Default sdmmc_host_t structure initializer for SDMMC peripheral
+ *
+ * Uses SDMMC peripheral, with 4-bit mode enabled, and max frequency set to 20MHz
+ */
+#define SDMMC_HOST_DEFAULT() {\
+    .flags = SDMMC_HOST_FLAG_8BIT | \
+             SDMMC_HOST_FLAG_4BIT | \
+             SDMMC_HOST_FLAG_1BIT | \
+             SDMMC_HOST_FLAG_DDR, \
+    .slot = SDMMC_HOST_SLOT_1, \
+    .max_freq_khz = SDMMC_FREQ_DEFAULT, \
+    .io_voltage = 3.3f, \
+    .init = &sdmmc_host_init, \
+    .set_bus_width = &sdmmc_host_set_bus_width, \
+    .get_bus_width = &sdmmc_host_get_slot_width, \
+    .set_bus_ddr_mode = &sdmmc_host_set_bus_ddr_mode, \
+    .set_card_clk = &sdmmc_host_set_card_clk, \
+    .do_transaction = &sdmmc_host_do_transaction, \
+    .deinit = &sdmmc_host_deinit, \
+    .io_int_enable = sdmmc_host_io_int_enable, \
+    .io_int_wait = sdmmc_host_io_int_wait, \
+    .command_timeout_ms = 0, \
+}
+
+/**
+ * Extra configuration for SDMMC peripheral slot
+ */
+typedef struct {
+#ifdef SOC_SDMMC_USE_GPIO_MATRIX
+    gpio_num_t clk;         ///< GPIO number of CLK signal.
+    gpio_num_t cmd;         ///< GPIO number of CMD signal.
+    gpio_num_t d0;          ///< GPIO number of D0 signal.
+    gpio_num_t d1;          ///< GPIO number of D1 signal.
+    gpio_num_t d2;          ///< GPIO number of D2 signal.
+    gpio_num_t d3;          ///< GPIO number of D3 signal.
+    gpio_num_t d4;          ///< GPIO number of D4 signal. Ignored in 1- or 4- line mode.
+    gpio_num_t d5;          ///< GPIO number of D5 signal. Ignored in 1- or 4- line mode.
+    gpio_num_t d6;          ///< GPIO number of D6 signal. Ignored in 1- or 4- line mode.
+    gpio_num_t d7;          ///< GPIO number of D7 signal. Ignored in 1- or 4- line mode.
+#endif // SOC_SDMMC_USE_GPIO_MATRIX
+    union {
+        gpio_num_t gpio_cd;     ///< GPIO number of card detect signal
+        gpio_num_t cd;          ///< GPIO number of card detect signal; shorter name.
+    };
+    union {
+        gpio_num_t gpio_wp;     ///< GPIO number of write protect signal
+        gpio_num_t wp;          ///< GPIO number of write protect signal; shorter name.
+    };
+    uint8_t width;          ///< Bus width used by the slot (might be less than the max width supported)
+    uint32_t flags;         ///< Features used by this slot
+#define SDMMC_SLOT_FLAG_INTERNAL_PULLUP  BIT(0)
+        /**< Enable internal pullups on enabled pins. The internal pullups
+         are insufficient however, please make sure external pullups are
+         connected on the bus. This is for debug / example purpose only.
+         */
+} sdmmc_slot_config_t;
+
+#define SDMMC_SLOT_NO_CD      GPIO_NUM_NC     ///< indicates that card detect line is not used
+#define SDMMC_SLOT_NO_WP      GPIO_NUM_NC     ///< indicates that write protect line is not used
+#define SDMMC_SLOT_WIDTH_DEFAULT 0 ///< use the maximum possible width for the slot
+
+#ifdef SOC_SDMMC_USE_GPIO_MATRIX
+
+/**
+ * Macro defining default configuration of SDMMC host slot
+ */
+#define SDMMC_SLOT_CONFIG_DEFAULT() {\
+    .clk = GPIO_NUM_14, \
+    .cmd = GPIO_NUM_15, \
+    .d0 = GPIO_NUM_2, \
+    .d1 = GPIO_NUM_4, \
+    .d2 = GPIO_NUM_12, \
+    .d3 = GPIO_NUM_13, \
+    .d4 = GPIO_NUM_33, \
+    .d5 = GPIO_NUM_34, \
+    .d6 = GPIO_NUM_35, \
+    .d7 = GPIO_NUM_36, \
+    .cd = SDMMC_SLOT_NO_CD, \
+    .wp = SDMMC_SLOT_NO_WP, \
+    .width   = SDMMC_SLOT_WIDTH_DEFAULT, \
+    .flags = 0, \
+}
+
+#else // SOC_SDMMC_USE_GPIO_MATRIX
+
+/**
+ * Macro defining default configuration of SDMMC host slot
+ */
+#define SDMMC_SLOT_CONFIG_DEFAULT() {\
+    .cd = SDMMC_SLOT_NO_CD, \
+    .wp = SDMMC_SLOT_NO_WP, \
+    .width   = SDMMC_SLOT_WIDTH_DEFAULT, \
+    .flags = 0, \
+}
+
+#endif // SOC_SDMMC_USE_GPIO_MATRIX
+
+/**
+ * @brief Initialize SDMMC host peripheral
+ *
+ * @note This function is not thread safe
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if sdmmc_host_init was already called
+ *      - ESP_ERR_NO_MEM if memory can not be allocated
+ */
+esp_err_t sdmmc_host_init(void);
+
+/**
+ * @brief Initialize given slot of SDMMC peripheral
+ *
+ * On the ESP32, SDMMC peripheral has two slots:
+ *  - Slot 0: 8-bit wide, maps to HS1_* signals in PIN MUX
+ *  - Slot 1: 4-bit wide, maps to HS2_* signals in PIN MUX
+ *
+ * Card detect and write protect signals can be routed to
+ * arbitrary GPIOs using GPIO matrix.
+ *
+ * @note This function is not thread safe
+ *
+ * @param slot  slot number (SDMMC_HOST_SLOT_0 or SDMMC_HOST_SLOT_1)
+ * @param slot_config  additional configuration for the slot
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if host has not been initialized using sdmmc_host_init
+ */
+esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config);
+
+/**
+ * @brief Select bus width to be used for data transfer
+ *
+ * SD/MMC card must be initialized prior to this command, and a command to set
+ * bus width has to be sent to the card (e.g. SD_APP_SET_BUS_WIDTH)
+ *
+ * @note This function is not thread safe
+ *
+ * @param slot  slot number (SDMMC_HOST_SLOT_0 or SDMMC_HOST_SLOT_1)
+ * @param width  bus width (1, 4, or 8 for slot 0; 1 or 4 for slot 1)
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if slot number or width is not valid
+ */
+esp_err_t sdmmc_host_set_bus_width(int slot, size_t width);
+
+/**
+ * @brief Get bus width configured in ``sdmmc_host_init_slot`` to be used for data transfer
+ *
+ * @param slot  slot number (SDMMC_HOST_SLOT_0 or SDMMC_HOST_SLOT_1)
+ * @return configured bus width of the specified slot.
+ */
+size_t sdmmc_host_get_slot_width(int slot);
+
+/**
+ * @brief Set card clock frequency
+ *
+ * Currently only integer fractions of 40MHz clock can be used.
+ * For High Speed cards, 40MHz can be used.
+ * For Default Speed cards, 20MHz can be used.
+ *
+ * @note This function is not thread safe
+ *
+ * @param slot  slot number (SDMMC_HOST_SLOT_0 or SDMMC_HOST_SLOT_1)
+ * @param freq_khz  card clock frequency, in kHz
+ * @return
+ *      - ESP_OK on success
+ *      - other error codes may be returned in the future
+ */
+esp_err_t sdmmc_host_set_card_clk(int slot, uint32_t freq_khz);
+
+/**
+ * @brief Enable or disable DDR mode of SD interface
+ * @param slot  slot number (SDMMC_HOST_SLOT_0 or SDMMC_HOST_SLOT_1)
+ * @param ddr_enabled  enable or disable DDR mode
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_SUPPORTED if DDR mode is not supported on this slot
+ */
+esp_err_t sdmmc_host_set_bus_ddr_mode(int slot, bool ddr_enabled);
+
+/**
+ * @brief Send command to the card and get response
+ *
+ * This function returns when command is sent and response is received,
+ * or data is transferred, or timeout occurs.
+ *
+ * @note This function is not thread safe w.r.t. init/deinit functions,
+ *       and bus width/clock speed configuration functions. Multiple tasks
+ *       can call sdmmc_host_do_transaction as long as other sdmmc_host_*
+ *       functions are not called.
+ *
+ * @attention Data buffer passed in cmdinfo->data must be in DMA capable memory
+ *
+ * @param slot  slot number (SDMMC_HOST_SLOT_0 or SDMMC_HOST_SLOT_1)
+ * @param cmdinfo   pointer to structure describing command and data to transfer
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_TIMEOUT if response or data transfer has timed out
+ *      - ESP_ERR_INVALID_CRC if response or data transfer CRC check has failed
+ *      - ESP_ERR_INVALID_RESPONSE if the card has sent an invalid response
+ *      - ESP_ERR_INVALID_SIZE if the size of data transfer is not valid in SD protocol
+ *      - ESP_ERR_INVALID_ARG if the data buffer is not in DMA capable memory
+ */
+esp_err_t sdmmc_host_do_transaction(int slot, sdmmc_command_t* cmdinfo);
+
+/**
+ * @brief Enable IO interrupts
+ *
+ * This function configures the host to accept SDIO interrupts.
+ *
+ * @param slot  slot number (SDMMC_HOST_SLOT_0 or SDMMC_HOST_SLOT_1)
+ * @return returns ESP_OK, other errors possible in the future
+ */
+esp_err_t sdmmc_host_io_int_enable(int slot);
+
+/**
+ * @brief Block until an SDIO interrupt is received, or timeout occurs
+ * @param slot  slot number (SDMMC_HOST_SLOT_0 or SDMMC_HOST_SLOT_1)
+ * @param timeout_ticks  number of RTOS ticks to wait for the interrupt
+ * @return
+ *  - ESP_OK on success (interrupt received)
+ *  - ESP_ERR_TIMEOUT if the interrupt did not occur within timeout_ticks
+ */
+esp_err_t sdmmc_host_io_int_wait(int slot, TickType_t timeout_ticks);
+
+/**
+ * @brief Disable SDMMC host and release allocated resources
+ *
+ * @note This function is not thread safe
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if sdmmc_host_init function has not been called
+ */
+esp_err_t sdmmc_host_deinit(void);
+
+/**
+ * @brief Enable the pull-ups of sd pins.
+ *
+ * This function is deprecated. Please set SDMMC_SLOT_FLAG_INTERNAL_PULLUP flag in
+ * sdmmc_slot_config_t::flags instead.
+ *
+ * @note You should always place actual pullups on the lines instead of using
+ * this function. Internal pullup resistance are high and not sufficient, may
+ * cause instability in products. This is for debug or examples only.
+ *
+ * @param slot Slot to use, normally set it to 1.
+ * @param width Bit width of your configuration, 1 or 4.
+ *
+ * @return
+ *      - ESP_OK: if success
+ *      - ESP_ERR_INVALID_ARG: if configured width larger than maximum the slot can
+ *              support
+ */
+esp_err_t sdmmc_host_pullup_en(int slot, int width) __attribute__((deprecated));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //SOC_SDMMC_HOST_SUPPORTED
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/sdmmc_types.h b/tools/sdk/esp32s3/include/driver/include/driver/sdmmc_types.h
new file mode 100644
index 00000000000..cbb796fdbb3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/sdmmc_types.h
@@ -0,0 +1,189 @@
+/*
+ * SPDX-FileCopyrightText: 2006 Uwe Stuehler <uwe@openbsd.org>
+ *
+ * SPDX-License-Identifier: ISC
+ *
+ * SPDX-FileContributor: 2016-2021 Espressif Systems (Shanghai) CO LTD
+ */
+/*
+ * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _SDMMC_TYPES_H_
+#define _SDMMC_TYPES_H_
+
+#include <stdint.h>
+#include <stddef.h>
+#include "esp_err.h"
+#include "freertos/FreeRTOS.h"
+
+/**
+ * Decoded values from SD card Card Specific Data register
+ */
+typedef struct {
+    int csd_ver;                /*!< CSD structure format */
+    int mmc_ver;                /*!< MMC version (for CID format) */
+    int capacity;               /*!< total number of sectors */
+    int sector_size;            /*!< sector size in bytes */
+    int read_block_len;         /*!< block length for reads */
+    int card_command_class;     /*!< Card Command Class for SD */
+    int tr_speed;               /*!< Max transfer speed */
+} sdmmc_csd_t;
+
+/**
+ * Decoded values from SD card Card IDentification register
+ */
+typedef struct {
+    int mfg_id;     /*!< manufacturer identification number */
+    int oem_id;     /*!< OEM/product identification number */
+    char name[8];   /*!< product name (MMC v1 has the longest) */
+    int revision;   /*!< product revision */
+    int serial;     /*!< product serial number */
+    int date;       /*!< manufacturing date */
+} sdmmc_cid_t;
+
+/**
+ * Decoded values from SD Configuration Register
+ */
+typedef struct {
+    int sd_spec;    /*!< SD Physical layer specification version, reported by card */
+    int bus_width;  /*!< bus widths supported by card: BIT(0) — 1-bit bus, BIT(2) — 4-bit bus */
+} sdmmc_scr_t;
+
+/**
+ * Decoded values of Extended Card Specific Data
+ */
+typedef struct {
+    uint8_t power_class;    /*!< Power class used by the card */
+} sdmmc_ext_csd_t;
+
+/**
+ * SD/MMC command response buffer
+ */
+typedef uint32_t sdmmc_response_t[4];
+
+/**
+ * SD SWITCH_FUNC response buffer
+ */
+typedef struct {
+    uint32_t data[512 / 8 / sizeof(uint32_t)];  /*!< response data */
+} sdmmc_switch_func_rsp_t;
+
+/**
+ * SD/MMC command information
+ */
+typedef struct {
+        uint32_t opcode;            /*!< SD or MMC command index */
+        uint32_t arg;               /*!< SD/MMC command argument */
+        sdmmc_response_t response;  /*!< response buffer */
+        void* data;                 /*!< buffer to send or read into */
+        size_t datalen;             /*!< length of data buffer */
+        size_t blklen;              /*!< block length */
+        int flags;                  /*!< see below */
+/** @cond */
+#define SCF_ITSDONE      0x0001     /*!< command is complete */
+#define SCF_CMD(flags)   ((flags) & 0x00f0)
+#define SCF_CMD_AC       0x0000
+#define SCF_CMD_ADTC     0x0010
+#define SCF_CMD_BC       0x0020
+#define SCF_CMD_BCR      0x0030
+#define SCF_CMD_READ     0x0040     /*!< read command (data expected) */
+#define SCF_RSP_BSY      0x0100
+#define SCF_RSP_136      0x0200
+#define SCF_RSP_CRC      0x0400
+#define SCF_RSP_IDX      0x0800
+#define SCF_RSP_PRESENT  0x1000
+/* response types */
+#define SCF_RSP_R0       0 /*!< none */
+#define SCF_RSP_R1       (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
+#define SCF_RSP_R1B      (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
+#define SCF_RSP_R2       (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136)
+#define SCF_RSP_R3       (SCF_RSP_PRESENT)
+#define SCF_RSP_R4       (SCF_RSP_PRESENT)
+#define SCF_RSP_R5       (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
+#define SCF_RSP_R5B      (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
+#define SCF_RSP_R6       (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
+#define SCF_RSP_R7       (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
+/* special flags */
+#define SCF_WAIT_BUSY    0x2000     /*!< Wait for completion of card busy signal before returning */
+/** @endcond */
+        esp_err_t error;            /*!< error returned from transfer */
+        int timeout_ms;             /*!< response timeout, in milliseconds */
+} sdmmc_command_t;
+
+/**
+ * SD/MMC Host description
+ *
+ * This structure defines properties of SD/MMC host and functions
+ * of SD/MMC host which can be used by upper layers.
+ */
+typedef struct {
+    uint32_t flags;             /*!< flags defining host properties */
+#define SDMMC_HOST_FLAG_1BIT    BIT(0)      /*!< host supports 1-line SD and MMC protocol */
+#define SDMMC_HOST_FLAG_4BIT    BIT(1)      /*!< host supports 4-line SD and MMC protocol */
+#define SDMMC_HOST_FLAG_8BIT    BIT(2)      /*!< host supports 8-line MMC protocol */
+#define SDMMC_HOST_FLAG_SPI     BIT(3)      /*!< host supports SPI protocol */
+#define SDMMC_HOST_FLAG_DDR     BIT(4)      /*!< host supports DDR mode for SD/MMC */
+#define SDMMC_HOST_FLAG_DEINIT_ARG BIT(5)      /*!< host `deinit` function called with the slot argument */
+    int slot;                   /*!< slot number, to be passed to host functions */
+    int max_freq_khz;           /*!< max frequency supported by the host */
+#define SDMMC_FREQ_DEFAULT      20000       /*!< SD/MMC Default speed (limited by clock divider) */
+#define SDMMC_FREQ_HIGHSPEED    40000       /*!< SD High speed (limited by clock divider) */
+#define SDMMC_FREQ_PROBING      400         /*!< SD/MMC probing speed */
+#define SDMMC_FREQ_52M          52000       /*!< MMC 52MHz speed */
+#define SDMMC_FREQ_26M          26000       /*!< MMC 26MHz speed */
+    float io_voltage;           /*!< I/O voltage used by the controller (voltage switching is not supported) */
+    esp_err_t (*init)(void);    /*!< Host function to initialize the driver */
+    esp_err_t (*set_bus_width)(int slot, size_t width);    /*!< host function to set bus width */
+    size_t (*get_bus_width)(int slot); /*!< host function to get bus width */
+    esp_err_t (*set_bus_ddr_mode)(int slot, bool ddr_enable); /*!< host function to set DDR mode */
+    esp_err_t (*set_card_clk)(int slot, uint32_t freq_khz); /*!< host function to set card clock frequency */
+    esp_err_t (*do_transaction)(int slot, sdmmc_command_t* cmdinfo);    /*!< host function to do a transaction */
+    union {
+        esp_err_t (*deinit)(void);  /*!< host function to deinitialize the driver */
+        esp_err_t (*deinit_p)(int slot);  /*!< host function to deinitialize the driver, called with the `slot` */
+    };
+    esp_err_t (*io_int_enable)(int slot); /*!< Host function to enable SDIO interrupt line */
+    esp_err_t (*io_int_wait)(int slot, TickType_t timeout_ticks); /*!< Host function to wait for SDIO interrupt line to be active */
+    int command_timeout_ms;     /*!< timeout, in milliseconds, of a single command. Set to 0 to use the default value. */
+} sdmmc_host_t;
+
+/**
+ * SD/MMC card information structure
+ */
+typedef struct {
+    sdmmc_host_t host;          /*!< Host with which the card is associated */
+    uint32_t ocr;               /*!< OCR (Operation Conditions Register) value */
+    union {
+        sdmmc_cid_t cid;            /*!< decoded CID (Card IDentification) register value */
+        sdmmc_response_t raw_cid;   /*!< raw CID of MMC card to be decoded
+                                         after the CSD is fetched in the data transfer mode*/
+    };
+    sdmmc_csd_t csd;            /*!< decoded CSD (Card-Specific Data) register value */
+    sdmmc_scr_t scr;            /*!< decoded SCR (SD card Configuration Register) value */
+    sdmmc_ext_csd_t ext_csd;    /*!< decoded EXT_CSD (Extended Card Specific Data) register value */
+    uint16_t rca;               /*!< RCA (Relative Card Address) */
+    uint16_t max_freq_khz;      /*!< Maximum frequency, in kHz, supported by the card */
+    uint32_t is_mem : 1;        /*!< Bit indicates if the card is a memory card */
+    uint32_t is_sdio : 1;       /*!< Bit indicates if the card is an IO card */
+    uint32_t is_mmc : 1;        /*!< Bit indicates if the card is MMC */
+    uint32_t num_io_functions : 3;  /*!< If is_sdio is 1, contains the number of IO functions on the card */
+    uint32_t log_bus_width : 2; /*!< log2(bus width supported by card) */
+    uint32_t is_ddr : 1;        /*!< Card supports DDR mode */
+    uint32_t reserved : 23;     /*!< Reserved for future expansion */
+} sdmmc_card_t;
+
+
+#endif // _SDMMC_TYPES_H_
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/sdspi_host.h b/tools/sdk/esp32s3/include/driver/include/driver/sdspi_host.h
new file mode 100644
index 00000000000..abb690c39bc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/sdspi_host.h
@@ -0,0 +1,244 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stddef.h>
+#include "esp_err.h"
+#include "sdmmc_types.h"
+#include "driver/gpio.h"
+#include "driver/spi_master.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Handle representing an SD SPI device
+typedef int sdspi_dev_handle_t;
+
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+#define SDSPI_DEFAULT_HOST HSPI_HOST
+#else
+#define SDSPI_DEFAULT_HOST SPI2_HOST
+#endif
+
+/**
+ * @brief Default sdmmc_host_t structure initializer for SD over SPI driver
+ *
+ * Uses SPI mode and max frequency set to 20MHz
+ *
+ * 'slot' should be set to an sdspi device initialized by `sdspi_host_init_device()`.
+ */
+#define SDSPI_HOST_DEFAULT() {\
+    .flags = SDMMC_HOST_FLAG_SPI | SDMMC_HOST_FLAG_DEINIT_ARG, \
+    .slot = SDSPI_DEFAULT_HOST, \
+    .max_freq_khz = SDMMC_FREQ_DEFAULT, \
+    .io_voltage = 3.3f, \
+    .init = &sdspi_host_init, \
+    .set_bus_width = NULL, \
+    .get_bus_width = NULL, \
+    .set_bus_ddr_mode = NULL, \
+    .set_card_clk = &sdspi_host_set_card_clk, \
+    .do_transaction = &sdspi_host_do_transaction, \
+    .deinit_p = &sdspi_host_remove_device, \
+    .io_int_enable = &sdspi_host_io_int_enable, \
+    .io_int_wait = &sdspi_host_io_int_wait, \
+    .command_timeout_ms = 0, \
+}
+
+/**
+ * Extra configuration for SD SPI device.
+ */
+typedef struct {
+    spi_host_device_t host_id; ///< SPI host to use, SPIx_HOST (see spi_types.h).
+    gpio_num_t gpio_cs;     ///< GPIO number of CS signal
+    gpio_num_t gpio_cd;     ///< GPIO number of card detect signal
+    gpio_num_t gpio_wp;     ///< GPIO number of write protect signal
+    gpio_num_t gpio_int;    ///< GPIO number of interrupt line (input) for SDIO card.
+} sdspi_device_config_t;
+
+#define SDSPI_SLOT_NO_CD    GPIO_NUM_NC ///< indicates that card detect line is not used
+#define SDSPI_SLOT_NO_WP    GPIO_NUM_NC ///< indicates that write protect line is not used
+#define SDSPI_SLOT_NO_INT   GPIO_NUM_NC ///< indicates that interrupt line is not used
+
+/**
+ * Macro defining default configuration of SD SPI device.
+ */
+#define SDSPI_DEVICE_CONFIG_DEFAULT() {\
+    .host_id   = SDSPI_DEFAULT_HOST, \
+    .gpio_cs   = GPIO_NUM_13, \
+    .gpio_cd   = SDSPI_SLOT_NO_CD, \
+    .gpio_wp   = SDSPI_SLOT_NO_WP, \
+    .gpio_int  = GPIO_NUM_NC, \
+}
+
+/**
+ * @brief Initialize SD SPI driver
+ *
+ * @note This function is not thread safe
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - other error codes may be returned in future versions
+ */
+esp_err_t sdspi_host_init(void);
+
+/**
+* @brief Attach and initialize an SD SPI device on the specific SPI bus
+*
+* @note This function is not thread safe
+*
+* @note Initialize the SPI bus by `spi_bus_initialize()` before calling this function.
+*
+* @note The SDIO over sdspi needs an extra interrupt line. Call ``gpio_install_isr_service()`` before this function.
+*
+* @param dev_config pointer to device configuration structure
+* @param out_handle Output of the handle to the sdspi device.
+
+* @return
+*      - ESP_OK on success
+*      - ESP_ERR_INVALID_ARG if sdspi_host_init_device has invalid arguments
+*      - ESP_ERR_NO_MEM if memory can not be allocated
+*      - other errors from the underlying spi_master and gpio drivers
+*/
+esp_err_t sdspi_host_init_device(const sdspi_device_config_t* dev_config, sdspi_dev_handle_t* out_handle);
+
+/**
+ * @brief Remove an SD SPI device
+ *
+ * @param handle Handle of the SD SPI device
+ * @return Always ESP_OK
+ */
+esp_err_t sdspi_host_remove_device(sdspi_dev_handle_t handle);
+
+/**
+ * @brief Send command to the card and get response
+ *
+ * This function returns when command is sent and response is received,
+ * or data is transferred, or timeout occurs.
+ *
+ * @note This function is not thread safe w.r.t. init/deinit functions,
+ *       and bus width/clock speed configuration functions. Multiple tasks
+ *       can call sdspi_host_do_transaction as long as other sdspi_host_*
+ *       functions are not called.
+ *
+ * @param handle    Handle of the sdspi device
+ * @param cmdinfo   pointer to structure describing command and data to transfer
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_TIMEOUT if response or data transfer has timed out
+ *      - ESP_ERR_INVALID_CRC if response or data transfer CRC check has failed
+ *      - ESP_ERR_INVALID_RESPONSE if the card has sent an invalid response
+ */
+esp_err_t sdspi_host_do_transaction(sdspi_dev_handle_t handle, sdmmc_command_t *cmdinfo);
+
+/**
+ * @brief Set card clock frequency
+ *
+ * Currently only integer fractions of 40MHz clock can be used.
+ * For High Speed cards, 40MHz can be used.
+ * For Default Speed cards, 20MHz can be used.
+ *
+ * @note This function is not thread safe
+ *
+ * @param host    Handle of the sdspi device
+ * @param freq_khz  card clock frequency, in kHz
+ * @return
+ *      - ESP_OK on success
+ *      - other error codes may be returned in the future
+ */
+esp_err_t sdspi_host_set_card_clk(sdspi_dev_handle_t host, uint32_t freq_khz);
+
+/**
+ * @brief Release resources allocated using sdspi_host_init
+ *
+ * @note This function is not thread safe
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if sdspi_host_init function has not been called
+ */
+esp_err_t sdspi_host_deinit(void);
+
+/**
+ * @brief Enable SDIO interrupt.
+ *
+ * @param handle    Handle of the sdspi device
+ *
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t sdspi_host_io_int_enable(sdspi_dev_handle_t handle);
+
+/**
+ * @brief Wait for SDIO interrupt until timeout.
+ *
+ * @param handle    Handle of the sdspi device
+ * @param timeout_ticks Ticks to wait before timeout.
+ *
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t sdspi_host_io_int_wait(sdspi_dev_handle_t handle, TickType_t timeout_ticks);
+
+/*******************************************************************************
+ * Deprecated APIs
+ ******************************************************************************/
+
+/**
+ * Extra configuration for SPI host.
+ *
+ * @deprecated Use `sdspi_device_config_t` and corresponding `sdspi_host_init_device()` instead.
+ */
+typedef struct {
+    gpio_num_t gpio_cs;     ///< GPIO number of CS signal
+    gpio_num_t gpio_cd;     ///< GPIO number of card detect signal
+    gpio_num_t gpio_wp;     ///< GPIO number of write protect signal
+    gpio_num_t gpio_int;    ///< GPIO number of interrupt line (input) for SDIO card.
+    gpio_num_t gpio_miso;   ///< GPIO number of MISO signal.
+    gpio_num_t gpio_mosi;   ///< GPIO number of MOSI signal.
+    gpio_num_t gpio_sck;    ///< GPIO number of SCK signal.
+    int        dma_channel;        ///< DMA channel to be used by SPI driver (1 or 2).
+} sdspi_slot_config_t;
+
+/**
+ * Macro defining default configuration of SPI host
+ */
+#define SDSPI_SLOT_CONFIG_DEFAULT() {\
+    .gpio_cs   = GPIO_NUM_13, \
+    .gpio_cd   = SDSPI_SLOT_NO_CD, \
+    .gpio_wp   = SDSPI_SLOT_NO_WP, \
+    .gpio_int  = GPIO_NUM_NC, \
+    .gpio_miso = GPIO_NUM_2, \
+    .gpio_mosi = GPIO_NUM_15, \
+    .gpio_sck  = GPIO_NUM_14, \
+    .dma_channel = 1, \
+}
+
+/**
+* @brief Initialize SD SPI driver for the specific SPI controller
+*
+* @note This function is not thread safe
+*
+* @note The SDIO over sdspi needs an extra interrupt line. Call ``gpio_install_isr_service()`` before this function.
+*
+* @param slot         SPI controller to use (SPI2_HOST or SPI3_HOST)
+* @param slot_config  pointer to slot configuration structure
+
+* @deprecated Use `sdspi_host_init_device` instead.
+*
+* @return
+*      - ESP_OK on success
+*      - ESP_ERR_INVALID_ARG if sdspi_init_slot has invalid arguments
+*      - ESP_ERR_NO_MEM if memory can not be allocated
+*      - other errors from the underlying spi_master and gpio drivers
+*/
+esp_err_t sdspi_host_init_slot(int slot, const sdspi_slot_config_t* slot_config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/sigmadelta.h b/tools/sdk/esp32s3/include/driver/include/driver/sigmadelta.h
new file mode 100644
index 00000000000..17f86b308e7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/sigmadelta.h
@@ -0,0 +1,79 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <esp_types.h>
+#include "soc/soc_caps.h"
+#include "soc/sigmadelta_periph.h"
+#include "driver/gpio.h"
+#include "hal/sigmadelta_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configure Sigma-delta channel
+ *
+ * @param  config Pointer of Sigma-delta channel configuration struct
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE sigmadelta driver already initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t sigmadelta_config(const sigmadelta_config_t *config);
+
+/**
+ * @brief Set Sigma-delta channel duty.
+ *
+ *        This function is used to set Sigma-delta channel duty,
+ *        If you add a capacitor between the output pin and ground,
+ *        the average output voltage will be Vdc = VDDIO / 256 * duty + VDDIO/2,
+ *        where VDDIO is the power supply voltage.
+ *
+ * @param channel Sigma-delta channel number
+ * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
+ *             The waveform is more like a random one in this range.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE sigmadelta driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t sigmadelta_set_duty(sigmadelta_channel_t channel, int8_t duty);
+
+/**
+ * @brief Set Sigma-delta channel's clock pre-scale value.
+ *        The source clock is APP_CLK, 80MHz. The clock frequency of the sigma-delta channel is APP_CLK / pre_scale
+ *
+ * @param channel Sigma-delta channel number
+ * @param prescale The divider of source clock, ranges from 0 to 255
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE sigmadelta driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t sigmadelta_set_prescale(sigmadelta_channel_t channel, uint8_t prescale);
+
+/**
+ * @brief Set Sigma-delta signal output pin
+ *
+ * @param channel Sigma-delta channel number
+ * @param gpio_num GPIO number of output pin.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE sigmadelta driver has not been initialized
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t sigmadelta_set_pin(sigmadelta_channel_t channel, gpio_num_t gpio_num);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/spi_common.h b/tools/sdk/esp32s3/include/driver/include/driver/spi_common.h
new file mode 100644
index 00000000000..830b8efd8c2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/spi_common.h
@@ -0,0 +1,173 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#ifndef SPI_MOCK
+#include "soc/lldesc.h"
+#include "soc/spi_periph.h"
+#endif
+#include "hal/spi_types.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//Maximum amount of bytes that can be put in one DMA descriptor
+#define SPI_MAX_DMA_LEN (4096-4)
+
+/**
+ * Transform unsigned integer of length <= 32 bits to the format which can be
+ * sent by the SPI driver directly.
+ *
+ * E.g. to send 9 bits of data, you can:
+ *
+ *      uint16_t data = SPI_SWAP_DATA_TX(0x145, 9);
+ *
+ * Then points tx_buffer to ``&data``.
+ *
+ * @param DATA Data to be sent, can be uint8_t, uint16_t or uint32_t.
+ * @param LEN Length of data to be sent, since the SPI peripheral sends from
+ *      the MSB, this helps to shift the data to the MSB.
+ */
+#define SPI_SWAP_DATA_TX(DATA, LEN) __builtin_bswap32((uint32_t)(DATA)<<(32-(LEN)))
+
+/**
+ * Transform received data of length <= 32 bits to the format of an unsigned integer.
+ *
+ * E.g. to transform the data of 15 bits placed in a 4-byte array to integer:
+ *
+ *      uint16_t data = SPI_SWAP_DATA_RX(*(uint32_t*)t->rx_data, 15);
+ *
+ * @param DATA Data to be rearranged, can be uint8_t, uint16_t or uint32_t.
+ * @param LEN Length of data received, since the SPI peripheral writes from
+ *      the MSB, this helps to shift the data to the LSB.
+ */
+#define SPI_SWAP_DATA_RX(DATA, LEN) (__builtin_bswap32(DATA)>>(32-(LEN)))
+
+#define SPICOMMON_BUSFLAG_SLAVE         0          ///< Initialize I/O in slave mode
+#define SPICOMMON_BUSFLAG_MASTER        (1<<0)     ///< Initialize I/O in master mode
+#define SPICOMMON_BUSFLAG_IOMUX_PINS    (1<<1)     ///< Check using iomux pins. Or indicates the pins are configured through the IO mux rather than GPIO matrix.
+#define SPICOMMON_BUSFLAG_GPIO_PINS     (1<<2)     ///< Force the signals to be routed through GPIO matrix. Or indicates the pins are routed through the GPIO matrix.
+#define SPICOMMON_BUSFLAG_SCLK          (1<<3)     ///< Check existing of SCLK pin. Or indicates CLK line initialized.
+#define SPICOMMON_BUSFLAG_MISO          (1<<4)     ///< Check existing of MISO pin. Or indicates MISO line initialized.
+#define SPICOMMON_BUSFLAG_MOSI          (1<<5)     ///< Check existing of MOSI pin. Or indicates MOSI line initialized.
+#define SPICOMMON_BUSFLAG_DUAL          (1<<6)     ///< Check MOSI and MISO pins can output. Or indicates bus able to work under DIO mode.
+#define SPICOMMON_BUSFLAG_WPHD          (1<<7)     ///< Check existing of WP and HD pins. Or indicates WP & HD pins initialized.
+#define SPICOMMON_BUSFLAG_QUAD          (SPICOMMON_BUSFLAG_DUAL|SPICOMMON_BUSFLAG_WPHD)     ///< Check existing of MOSI/MISO/WP/HD pins as output. Or indicates bus able to work under QIO mode.
+#define SPICOMMON_BUSFLAG_IO4_IO7       (1<<8)     ///< Check existing of IO4~IO7 pins. Or indicates IO4~IO7 pins initialized.
+#define SPICOMMON_BUSFLAG_OCTAL         (SPICOMMON_BUSFLAG_QUAD|SPICOMMON_BUSFLAG_IO4_IO7)  ///< Check existing of MOSI/MISO/WP/HD/SPIIO4/SPIIO5/SPIIO6/SPIIO7 pins as output. Or indicates bus able to work under octal mode.
+#define SPICOMMON_BUSFLAG_NATIVE_PINS   SPICOMMON_BUSFLAG_IOMUX_PINS
+
+/**
+ * @brief SPI DMA channels
+ */
+typedef enum {
+  SPI_DMA_DISABLED = 0,     ///< Do not enable DMA for SPI
+#if CONFIG_IDF_TARGET_ESP32
+  SPI_DMA_CH1      = 1,     ///< Enable DMA, select DMA Channel 1
+  SPI_DMA_CH2      = 2,     ///< Enable DMA, select DMA Channel 2
+#endif
+  SPI_DMA_CH_AUTO  = 3,     ///< Enable DMA, channel is automatically selected by driver
+} spi_common_dma_t;
+
+#if __cplusplus
+/* Needed for C++ backwards compatibility with earlier ESP-IDF where this argument is a bare 'int'. Can be removed in ESP-IDF 5 */
+typedef int spi_dma_chan_t;
+#else
+typedef spi_common_dma_t spi_dma_chan_t;
+#endif
+
+/**
+ * @brief This is a configuration structure for a SPI bus.
+ *
+ * You can use this structure to specify the GPIO pins of the bus. Normally, the driver will use the
+ * GPIO matrix to route the signals. An exception is made when all signals either can be routed through
+ * the IO_MUX or are -1. In that case, the IO_MUX is used, allowing for >40MHz speeds.
+ *
+ * @note Be advised that the slave driver does not use the quadwp/quadhd lines and fields in spi_bus_config_t refering to these lines will be ignored and can thus safely be left uninitialized.
+ */
+typedef struct {
+    union {
+      int mosi_io_num;    ///< GPIO pin for Master Out Slave In (=spi_d) signal, or -1 if not used.
+      int data0_io_num;   ///< GPIO pin for spi data0 signal in quad/octal mode, or -1 if not used.
+    };
+    union {
+      int miso_io_num;    ///< GPIO pin for Master In Slave Out (=spi_q) signal, or -1 if not used.
+      int data1_io_num;   ///< GPIO pin for spi data1 signal in quad/octal mode, or -1 if not used.
+    };
+    int sclk_io_num;      ///< GPIO pin for SPI Clock signal, or -1 if not used.
+    union {
+      int quadwp_io_num;  ///< GPIO pin for WP (Write Protect) signal, or -1 if not used.
+      int data2_io_num;   ///< GPIO pin for spi data2 signal in quad/octal mode, or -1 if not used.
+    };
+    union {
+      int quadhd_io_num;  ///< GPIO pin for HD (Hold) signal, or -1 if not used.
+      int data3_io_num;   ///< GPIO pin for spi data3 signal in quad/octal mode, or -1 if not used.
+    };
+    int data4_io_num;     ///< GPIO pin for spi data4 signal in octal mode, or -1 if not used.
+    int data5_io_num;     ///< GPIO pin for spi data5 signal in octal mode, or -1 if not used.
+    int data6_io_num;     ///< GPIO pin for spi data6 signal in octal mode, or -1 if not used.
+    int data7_io_num;     ///< GPIO pin for spi data7 signal in octal mode, or -1 if not used.
+    int max_transfer_sz;  ///< Maximum transfer size, in bytes. Defaults to 4092 if 0 when DMA enabled, or to `SOC_SPI_MAXIMUM_BUFFER_SIZE` if DMA is disabled.
+    uint32_t flags;       ///< Abilities of bus to be checked by the driver. Or-ed value of ``SPICOMMON_BUSFLAG_*`` flags.
+    int intr_flags;       /**< Interrupt flag for the bus to set the priority, and IRAM attribute, see
+                           *  ``esp_intr_alloc.h``. Note that the EDGE, INTRDISABLED attribute are ignored
+                           *  by the driver. Note that if ESP_INTR_FLAG_IRAM is set, ALL the callbacks of
+                           *  the driver, and their callee functions, should be put in the IRAM.
+                           */
+} spi_bus_config_t;
+
+
+/**
+ * @brief Initialize a SPI bus
+ *
+ * @warning SPI0/1 is not supported
+ *
+ * @param host_id       SPI peripheral that controls this bus
+ * @param bus_config    Pointer to a spi_bus_config_t struct specifying how the host should be initialized
+ * @param dma_chan      - Selecting a DMA channel for an SPI bus allows transactions on the bus with size only limited by the amount of internal memory.
+ *                      - Selecting SPI_DMA_DISABLED limits the size of transactions.
+ *                      - Set to SPI_DMA_DISABLED if only the SPI flash uses this bus.
+ *                      - Set to SPI_DMA_CH_AUTO to let the driver to allocate the DMA channel.
+ *
+ * @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in
+ *          DMA-capable memory.
+ *
+ * @warning The ISR of SPI is always executed on the core which calls this
+ *          function. Never starve the ISR on this core or the SPI transactions will not
+ *          be handled.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if configuration is invalid
+ *         - ESP_ERR_INVALID_STATE if host already is in use
+ *         - ESP_ERR_NOT_FOUND     if there is no available DMA channel
+ *         - ESP_ERR_NO_MEM        if out of memory
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *bus_config, spi_dma_chan_t dma_chan);
+
+/**
+ * @brief Free a SPI bus
+ *
+ * @warning In order for this to succeed, all devices have to be removed first.
+ *
+ * @param host_id SPI peripheral to free
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_INVALID_STATE if not all devices on the bus are freed
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_bus_free(spi_host_device_t host_id);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/spi_common_internal.h b/tools/sdk/esp32s3/include/driver/include/driver/spi_common_internal.h
new file mode 100644
index 00000000000..0704c7ddd87
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/spi_common_internal.h
@@ -0,0 +1,782 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// Internal header, don't use it in the user code
+
+#pragma once
+
+#include <esp_intr_alloc.h>
+#include "driver/spi_common.h"
+#include "freertos/FreeRTOS.h"
+#include "hal/spi_types.h"
+#include "esp_pm.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+#ifdef CONFIG_SPI_MASTER_ISR_IN_IRAM
+#define SPI_MASTER_ISR_ATTR IRAM_ATTR
+#else
+#define SPI_MASTER_ISR_ATTR
+#endif
+
+#ifdef CONFIG_SPI_MASTER_IN_IRAM
+#define SPI_MASTER_ATTR IRAM_ATTR
+#else
+#define SPI_MASTER_ATTR
+#endif
+
+
+#define BUS_LOCK_DEBUG  0
+
+#if BUS_LOCK_DEBUG
+#define BUS_LOCK_DEBUG_EXECUTE_CHECK(x)  assert(x)
+#else
+#define BUS_LOCK_DEBUG_EXECUTE_CHECK(x)
+#endif
+
+
+struct spi_bus_lock_t;
+struct spi_bus_lock_dev_t;
+/// Handle to the lock of an SPI bus
+typedef struct spi_bus_lock_t* spi_bus_lock_handle_t;
+/// Handle to lock of one of the device on an SPI bus
+typedef struct spi_bus_lock_dev_t* spi_bus_lock_dev_handle_t;
+
+/// Background operation control function
+typedef void (*bg_ctrl_func_t)(void*);
+
+/// Attributes of an SPI bus
+typedef struct {
+    spi_bus_config_t bus_cfg;   ///< Config used to initialize the bus
+    uint32_t flags;             ///< Flags (attributes) of the bus
+    int max_transfer_sz;        ///< Maximum length of bytes available to send
+    bool dma_enabled;           ///< To enable DMA or not
+    int tx_dma_chan;            ///< TX DMA channel, on ESP32 and ESP32S2, tx_dma_chan and rx_dma_chan are same
+    int rx_dma_chan;            ///< RX DMA channel, on ESP32 and ESP32S2, tx_dma_chan and rx_dma_chan are same
+    int dma_desc_num;           ///< DMA descriptor number of dmadesc_tx or dmadesc_rx.
+    lldesc_t *dmadesc_tx;       ///< DMA descriptor array for TX
+    lldesc_t *dmadesc_rx;       ///< DMA descriptor array for RX
+    spi_bus_lock_handle_t lock;
+#ifdef CONFIG_PM_ENABLE
+    esp_pm_lock_handle_t pm_lock;   ///< Power management lock
+#endif
+} spi_bus_attr_t;
+
+/// Destructor called when a bus is deinitialized.
+typedef esp_err_t (*spi_destroy_func_t)(void*);
+
+
+/**
+ * @brief Try to claim a SPI peripheral
+ *
+ * Call this if your driver wants to manage a SPI peripheral.
+ *
+ * @param host Peripheral to claim
+ * @param source The caller indentification string.
+ *
+ * @note This public API is deprecated.
+ *
+ * @return True if peripheral is claimed successfully; false if peripheral already is claimed.
+ */
+bool spicommon_periph_claim(spi_host_device_t host, const char* source);
+
+/**
+ * @brief Check whether the spi periph is in use.
+ *
+ * @param host Peripheral to check.
+ *
+ * @note This public API is deprecated.
+ *
+ * @return True if in use, otherwise false.
+ */
+bool spicommon_periph_in_use(spi_host_device_t host);
+
+/**
+ * @brief Return the SPI peripheral so another driver can claim it.
+ *
+ * @param host Peripheral to return
+ *
+ * @note This public API is deprecated.
+ *
+ * @return True if peripheral is returned successfully; false if peripheral was free to claim already.
+ */
+bool spicommon_periph_free(spi_host_device_t host);
+
+/**
+ * @brief Alloc DMA for SPI
+ *
+ * @param host_id                      SPI host ID
+ * @param dma_chan                     DMA channel to be used
+ * @param[out] out_actual_tx_dma_chan  Actual TX DMA channel (if you choose to assign a specific DMA channel, this will be the channel you assigned before)
+ * @param[out] out_actual_rx_dma_chan  Actual RX DMA channel (if you choose to assign a specific DMA channel, this will be the channel you assigned before)
+ *
+ * @return
+ *        - ESP_OK:                On success
+ *        - ESP_ERR_NO_MEM:        No enough memory
+ *        - ESP_ERR_NOT_FOUND:     There is no available DMA channel
+ */
+esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan);
+
+/**
+ * @brief Free DMA for SPI
+ *
+ * @param host_id  SPI host ID
+ *
+ * @return
+ *        - ESP_OK: On success
+ */
+esp_err_t spicommon_dma_chan_free(spi_host_device_t host_id);
+
+/**
+ * @brief Connect a SPI peripheral to GPIO pins
+ *
+ * This routine is used to connect a SPI peripheral to the IO-pads and DMA channel given in
+ * the arguments. Depending on the IO-pads requested, the routing is done either using the
+ * IO_mux or using the GPIO matrix.
+ *
+ * @note This public API is deprecated. Please call ``spi_bus_initialize`` for master
+ *       bus initialization and ``spi_slave_initialize`` for slave initialization.
+ *
+ * @param host SPI peripheral to be routed
+ * @param bus_config Pointer to a spi_bus_config struct detailing the GPIO pins
+ * @param flags Combination of SPICOMMON_BUSFLAG_* flags, set to ensure the pins set are capable with some functions:
+ *              - ``SPICOMMON_BUSFLAG_MASTER``: Initialize I/O in master mode
+ *              - ``SPICOMMON_BUSFLAG_SLAVE``: Initialize I/O in slave mode
+ *              - ``SPICOMMON_BUSFLAG_IOMUX_PINS``: Pins set should match the iomux pins of the controller.
+ *              - ``SPICOMMON_BUSFLAG_SCLK``, ``SPICOMMON_BUSFLAG_MISO``, ``SPICOMMON_BUSFLAG_MOSI``:
+ *                  Make sure SCLK/MISO/MOSI is/are set to a valid GPIO. Also check output capability according to the mode.
+ *              - ``SPICOMMON_BUSFLAG_DUAL``: Make sure both MISO and MOSI are output capable so that DIO mode is capable.
+ *              - ``SPICOMMON_BUSFLAG_WPHD`` Make sure WP and HD are set to valid output GPIOs.
+ *              - ``SPICOMMON_BUSFLAG_QUAD``: Combination of ``SPICOMMON_BUSFLAG_DUAL`` and ``SPICOMMON_BUSFLAG_WPHD``.
+ *              - ``SPICOMMON_BUSFLAG_IO4_IO7``: Make sure spi data4 ~ spi data7 are set to valid output GPIOs.
+ *              - ``SPICOMMON_BUSFLAG_OCTAL``: Combination of ``SPICOMMON_BUSFLAG_QUAL`` and ``SPICOMMON_BUSFLAG_IO4_IO7``.
+ * @param[out] flags_o A SPICOMMON_BUSFLAG_* flag combination of bus abilities will be written to this address.
+ *              Leave to NULL if not needed.
+ *              - ``SPICOMMON_BUSFLAG_IOMUX_PINS``: The bus is connected to iomux pins.
+ *              - ``SPICOMMON_BUSFLAG_SCLK``, ``SPICOMMON_BUSFLAG_MISO``, ``SPICOMMON_BUSFLAG_MOSI``: The bus has
+ *                  CLK/MISO/MOSI connected.
+ *              - ``SPICOMMON_BUSFLAG_DUAL``: The bus is capable with DIO mode.
+ *              - ``SPICOMMON_BUSFLAG_WPHD`` The bus has WP and HD connected.
+ *              - ``SPICOMMON_BUSFLAG_QUAD``: Combination of ``SPICOMMON_BUSFLAG_DUAL`` and ``SPICOMMON_BUSFLAG_WPHD``.
+ *              - ``SPICOMMON_BUSFLAG_IO4_IO7``: The bus has spi data4 ~ spi data7 connected.
+ *              - ``SPICOMMON_BUSFLAG_OCTAL``: Combination of ``SPICOMMON_BUSFLAG_QUAL`` and ``SPICOMMON_BUSFLAG_IO4_IO7``.
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_OK                on success
+ */
+esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_config_t *bus_config, uint32_t flags, uint32_t *flags_o);
+
+/**
+ * @brief Free the IO used by a SPI peripheral
+ *
+ * @note This public API is deprecated. Please call ``spi_bus_free`` for master
+ *       bus deinitialization and ``spi_slave_free`` for slave deinitialization.
+ *
+ * @param bus_cfg Bus config struct which defines which pins to be used.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_OK                on success
+ */
+esp_err_t spicommon_bus_free_io_cfg(const spi_bus_config_t *bus_cfg);
+
+/**
+ * @brief Initialize a Chip Select pin for a specific SPI peripheral
+ *
+ * @note This public API is deprecated. Please call corresponding device initialization
+ *       functions.
+ *
+ * @param host SPI peripheral
+ * @param cs_io_num GPIO pin to route
+ * @param cs_num CS id to route
+ * @param force_gpio_matrix If true, CS will always be routed through the GPIO matrix. If false,
+ *                          if the GPIO number allows it, the routing will happen through the IO_mux.
+ */
+void spicommon_cs_initialize(spi_host_device_t host, int cs_io_num, int cs_num, int force_gpio_matrix);
+
+/**
+ * @brief Free a chip select line
+ *
+ * @param cs_gpio_num CS gpio num to free
+ *
+ * @note This public API is deprecated.
+ */
+void spicommon_cs_free_io(int cs_gpio_num);
+
+/**
+ * @brief Check whether all pins used by a host are through IOMUX.
+ *
+ * @param host SPI peripheral
+ *
+ * @note This public API is deprecated.
+ *
+ * @return false if any pins are through the GPIO matrix, otherwise true.
+ */
+bool spicommon_bus_using_iomux(spi_host_device_t host);
+
+/**
+ * @brief Get the IRQ source for a specific SPI host
+ *
+ * @param host The SPI host
+ *
+ * @note This public API is deprecated.
+ *
+ * @return The hosts IRQ source
+ */
+int spicommon_irqsource_for_host(spi_host_device_t host);
+
+/**
+ * @brief Get the IRQ source for a specific SPI DMA
+ *
+ * @param host The SPI host
+ *
+ * @note This public API is deprecated.
+ *
+ * @return The hosts IRQ source
+ */
+int spicommon_irqdma_source_for_host(spi_host_device_t host);
+
+/**
+ * Callback, to be called when a DMA engine reset is completed
+*/
+typedef void(*dmaworkaround_cb_t)(void *arg);
+
+
+/**
+ * @brief Request a reset for a certain DMA channel
+ *
+ * @note In some (well-defined) cases in the ESP32 (at least rev v.0 and v.1), a SPI DMA channel will get confused. This can be remedied
+ * by resetting the SPI DMA hardware in case this happens. Unfortunately, the reset knob used for thsi will reset _both_ DMA channels, and
+ * as such can only done safely when both DMA channels are idle. These functions coordinate this.
+ *
+ * Essentially, when a reset is needed, a driver can request this using spicommon_dmaworkaround_req_reset. This is supposed to be called
+ * with an user-supplied function as an argument. If both DMA channels are idle, this call will reset the DMA subsystem and return true.
+ * If the other DMA channel is still busy, it will return false; as soon as the other DMA channel is done, however, it will reset the
+ * DMA subsystem and call the callback. The callback is then supposed to be used to continue the SPI drivers activity.
+ *
+ * @param dmachan DMA channel associated with the SPI host that needs a reset
+ * @param cb Callback to call in case DMA channel cannot be reset immediately
+ * @param arg Argument to the callback
+ *
+ * @note This public API is deprecated.
+ *
+ * @return True when a DMA reset could be executed immediately. False when it could not; in this
+ *         case the callback will be called with the specified argument when the logic can execute
+ *         a reset, after that reset.
+ */
+bool spicommon_dmaworkaround_req_reset(int dmachan, dmaworkaround_cb_t cb, void *arg);
+
+
+/**
+ * @brief Check if a DMA reset is requested but has not completed yet
+ *
+ * @note This public API is deprecated.
+ *
+ * @return True when a DMA reset is requested but hasn't completed yet. False otherwise.
+ */
+bool spicommon_dmaworkaround_reset_in_progress(void);
+
+
+/**
+ * @brief Mark a DMA channel as idle.
+ *
+ * A call to this function tells the workaround logic that this channel will
+ * not be affected by a global SPI DMA reset.
+ *
+ * @note This public API is deprecated.
+ */
+void spicommon_dmaworkaround_idle(int dmachan);
+
+/**
+ * @brief Mark a DMA channel as active.
+ *
+ * A call to this function tells the workaround logic that this channel will
+ * be affected by a global SPI DMA reset, and a reset like that should not be attempted.
+ *
+ * @note This public API is deprecated.
+ */
+void spicommon_dmaworkaround_transfer_active(int dmachan);
+
+/*******************************************************************************
+ * Bus attributes
+ ******************************************************************************/
+/**
+ * @brief Set bus lock for the main bus, called by startup code.
+ *
+ * @param lock The lock to be used by the main SPI bus.
+ */
+void spi_bus_main_set_lock(spi_bus_lock_handle_t lock);
+
+/**
+ * @brief Get the attributes of a specified SPI bus.
+ *
+ * @param host_id The specified host to get attribute
+ * @return (Const) Pointer to the attributes
+ */
+const spi_bus_attr_t* spi_bus_get_attr(spi_host_device_t host_id);
+
+/**
+ * @brief Register a function to a initialized bus to make it called when deinitializing the bus.
+ *
+ * @param host_id   The SPI bus to register the destructor.
+ * @param f         Destructor to register
+ * @param arg       The argument to call the destructor
+ * @return Always ESP_OK.
+ */
+esp_err_t spi_bus_register_destroy_func(spi_host_device_t host_id,
+                                        spi_destroy_func_t f, void *arg);
+
+/*******************************************************************************
+ * SPI Bus Lock for arbitration among SPI master (intr, polling) trans, SPI flash operations and
+ * flash/psram cache access.
+ *
+ * NON-PUBLIC API. Don't use it directly in applications.
+ *
+ * There is the main lock corresponding to an SPI bus, of which several devices (holding child
+ * locks) attaching to it. Each of the device is STRONGLY RECOMMENDED to be used in only one task
+ * to avoid concurrency issues.
+ *
+ * Terms:
+ * - BG operations (BackGround operations) means some transaction that will not immediately /
+ *   explicitly be sent in the task. It can be some cache access, or interrupt transactions.
+ *
+ * - Operation: usage of the bus, for example, do SPI transactions.
+ *
+ * - Acquiring processor: the task or the ISR that is allowed to use the bus. No operations will be
+ *   performed if there is no acquiring processor. A processor becomes the acquiring processor if
+ *   it ask for that when no acquiring processor exist, otherwise it has to wait for the acquiring
+ *   processor to handle over the role to it. The acquiring processor will and will only assign one
+ *   acquiring processor in the waiting list (if not empty) when it finishes its operation.
+ *
+ * - Acquiring device: the only device allowed to use the bus. Operations can be performed in
+ *   either the BG or the task. When there's no acquiring device, only the ISR is allowed to be the
+ *   acquiring processor and perform operations on the bus.
+ *
+ * When a device wants to perform operations, it either:
+ * 1. Acquire the bus, and operate in the task (e.g. polling transactions of SPI master, and SPI flash
+ *    operations)
+ *
+ * 2. Request a BG operation. And the ISR will be enabled at proper time.
+ *
+ *    For example if a task wants to send an interrupt transaction, it prepares the data in the task,
+ *    call `spi_bus_lock_bg_request`, and handle sending in the ISR.
+ *
+ * 3. When a device has already acquired the bus, BG operations are also allowed. After the
+ *    `spi_bus_lock_bg_request` is called, call `spi_bus_lock_wait_bg_done` before operations in task
+ *    again to wait until BG operations are done.
+ *
+ * Any device may try to invoke the ISR (by `spi_bus_lock_bg_request`). The ISR will be invoked and
+ * become the acquiring processor immediately when the bus is not acquired by other processors. Any
+ * device may also try to acquire the bus (by `spi_bus_lock_acquire_start`). The device will become
+ * the acquiring processor immediately when the bus is not acquired and there is no request active.
+ *
+ * The acquiring processor must be aware of its acquiring role, and properly transfer the acquiring
+ * processor to other tasks or ISR when they have nothing else to do. Before picking a new
+ * acquiring processor, a new acquiring device must be picked first, if there are other devices,
+ * asking to be acquiring device. After that, the new acquiring processor is picked by the sequence
+ * below:
+ *
+ * 1. If there is an acquiring device:
+ *      1.1 The ISR, if acquiring device has active BG requests
+ *      1.2 The task of the device, if no active BG request for the device
+ * 2. The ISR, if there's no acquiring device, but any BG request is active
+ * 3. No one becomes the acquiring processor
+ *
+ * The API also helps on the arbitration of SPI cs lines. The bus is initialized with a cs_num
+ * argument. When attaching devices onto the bus with `spi_bus_lock_register_dev`, it will allocate
+ * devices with different device ID according to the flags given. If the ID is smaller than the
+ * cs_num given when bus is initialized, error will be returned.
+ *
+ * Usage:
+ * * Initialization:
+ * 1. Call `spi_bus_init_lock` to register a lock for a bus.
+ * 2. Call `spi_bus_lock_set_bg_control` to prepare BG enable/disable functions for
+ *    the lock.
+ * 3. Call `spi_bus_lock_register_dev` for each devices that may make use of the
+ *    bus, properly store the returned handle, representing those devices.
+ *
+ * * Acquiring:
+ * 1. Call `spi_bus_lock_acquire_start` when a device wants to use the bus
+ * 2. Call `spi_bus_lock_touch` to mark the bus as touched by this device. Also check if the bus
+ *    has been touched by other devices.
+ * 3. (optional) Do something on the bus...
+ * 4. (optional) Call `spi_bus_lock_bg_request` to inform and invoke the BG. See ISR below about
+ *    ISR operations.
+ * 5. (optional) If `spi_bus_lock_bg_request` is done, you have to call `spi_bus_lock_wait_bg_done`
+ *    before touching the bus again, or do the following steps.
+ * 6. Call `spi_bus_lock_acquire_end` to release the bus to other devices.
+ *
+ * * ISR:
+ * 1. Call `spi_bus_lock_bg_entry` when entering the ISR, run or skip the closure for the previous
+ *    operation according to the return value.
+ * 2. Call `spi_bus_lock_get_acquiring_dev` to get the acquiring device. If there is no acquiring
+ *    device, call `spi_bus_lock_bg_check_dev_acq` to check and update a new acquiring device.
+ * 3. Call `spi_bus_lock_bg_check_dev_req` to check for request of the desired device. If the
+ *    desired device is not requested, go to step 5.
+ * 4. Check, start operation for the desired device and go to step 6; otherwise if no operations
+ *    can be performed, call `spi_bus_lock_bg_clear_req` to clear the request for this device. If
+ *    `spi_bus_lock_bg_clear_req` is called and there is no BG requests active, goto step 6.
+ * 5. (optional) If the device is the acquiring device, go to step 6, otherwise
+ *    find another desired device, and go back to step 3.
+ * 6. Call `spi_bus_lock_bg_exit` to try quitting the ISR. If failed, go back to step 2 to look for
+ *    a new request again. Otherwise, quit the ISR.
+ *
+ * * Deinitialization (optional):
+ * 1. Call `spi_bus_lock_unregister_dev` for each device when they are no longer needed.
+ * 2. Call `spi_bus_deinit_lock` to release the resources occupied by the lock.
+ *
+ * Some technical details:
+ *
+ * The child-lock of each device will have its own Binary Semaphore, which allows the task serving
+ * this device (task A) being blocked when it fail to become the acquiring processor while it's
+ * calling `spi_bus_lock_acquire_start` or `spi_bus_lock_wait_bg_done`. If it is blocked, there
+ * must be an acquiring processor (either the ISR or another task (task B)), is doing transaction
+ * on the bus. After that, task A will get unblocked and become the acquiring processor when the
+ * ISR call `spi_bus_lock_bg_resume_acquired_dev`, or task B call `spi_bus_lock_acquire_end`.
+ *
+ * When the device wants to send ISR transaction, it should call `spi_bus_lock_bg_request` after
+ * the data is prepared. This function sets a request bit in the critical resource. The ISR will be
+ * invoked and become the new acquiring processor, when:
+ *
+ * 1. A task calls `spi_bus_lock_bg_request` while there is no acquiring processor;
+ * 2. A tasks calls `spi_bus_lock_bg_request` while the task is the acquiring processor. Then the
+ *    acquiring processor is handled over to the ISR;
+ * 3. A tasks who is the acquiring processor release the bus by calling `spi_bus_lock_acquire_end`,
+ *    and the ISR happens to be the next acquiring processor.
+ *
+ * The ISR will check (by `spi_bus_lock_bg_check_dev_req`) and clear a request bit (by
+ * `spi_bus_lock_bg_clear_req`) after it confirm that all the requests of the corresponding device
+ * are served. The request bit supports being written to recursively, which means, the task don't
+ * need to wait for `spi_bus_lock_bg_clear_req` before call another `spi_bus_lock_bg_request`. The
+ * API will handle the concurrency conflicts properly.
+ *
+ * The `spi_bus_lock_bg_exit` (together with `spi_bus_lock_bg_entry` called before)` is responsible
+ * to ensure ONE and ONLY ONE of the following will happen when the ISR try to give up its
+ * acquiring processor rule:
+ *
+ * 1. ISR quit, no any task unblocked while the interrupt disabled, and none of the BG bits is
+ *    active.
+ * 2. ISR quit, there is an acquiring device, and the acquiring processor is passed to the task
+ *    serving the acquiring device by unblocking the task.
+ * 3. The ISR failed to quit and have to try again.
+ ******************************************************************************/
+
+#define DEV_NUM_MAX 6     ///< Number of devices supported by this lock
+
+/// Lock configuration struct
+typedef struct {
+    int host_id;    ///< SPI host id
+    int cs_num;     ///< Physical cs numbers of the host
+} spi_bus_lock_config_t;
+
+/// Child-lock configuration struct
+typedef struct {
+    uint32_t flags; ///< flags for the lock, OR-ed of `SPI_BUS_LOCK_DEV_*` flags.
+#define SPI_BUS_LOCK_DEV_FLAG_CS_REQUIRED   BIT(0)  ///< The device needs a physical CS pin.
+} spi_bus_lock_dev_config_t;
+
+/************* Common *********************/
+/**
+ * Initialize a lock for an SPI bus.
+ *
+ * @param out_lock Output of the handle to the lock
+ * @return
+ *  - ESP_ERR_NO_MEM: if memory exhausted
+ *  - ESP_OK: if success
+ */
+esp_err_t spi_bus_init_lock(spi_bus_lock_handle_t *out_lock, const spi_bus_lock_config_t *config);
+
+/**
+ * Free the resources used by an SPI bus lock.
+ *
+ * @note All attached devices should have been unregistered before calling this
+ *       funciton.
+ *
+ * @param lock Handle to the lock to free.
+ */
+void spi_bus_deinit_lock(spi_bus_lock_handle_t lock);
+
+/**
+ * @brief Get the corresponding lock according to bus id.
+ *
+ * @param host_id The bus id to get the lock
+ * @return The lock handle
+ */
+spi_bus_lock_handle_t spi_bus_lock_get_by_id(spi_host_device_t host_id);
+
+/**
+ * @brief Configure how the SPI bus lock enable the background operation.
+ *
+ * @note The lock will not try to stop the background operations, but wait for
+ *       The background operations finished indicated by `spi_bus_lock_bg_resume_acquired_dev`.
+ *
+ * @param lock Handle to the lock to set
+ * @param bg_enable The enabling function
+ * @param bg_disable The disabling function, set to NULL if not required
+ * @param arg Argument to pass to the enabling/disabling function.
+ */
+void spi_bus_lock_set_bg_control(spi_bus_lock_handle_t lock, bg_ctrl_func_t bg_enable,
+                                 bg_ctrl_func_t bg_disable, void *arg);
+
+/**
+ * Attach a device onto an SPI bus lock. The returning handle is used to perform
+ * following requests for the attached device.
+ *
+ * @param lock SPI bus lock to attach
+ * @param out_dev_handle Output handle corresponding to the device
+ * @param flags requirement of the device, bitwise OR of SPI_BUS_LOCK_FLAG_* flags
+ *
+ * @return
+ *  - ESP_ERR_NOT_SUPPORTED: if there's no hardware resources for new devices.
+ *  - ESP_ERR_NO_MEM: if memory exhausted
+ *  - ESP_OK: if success
+ */
+esp_err_t spi_bus_lock_register_dev(spi_bus_lock_handle_t lock,
+                                    spi_bus_lock_dev_config_t *config,
+                                    spi_bus_lock_dev_handle_t *out_dev_handle);
+
+/**
+ * Detach a device from its bus and free the resources used
+ *
+ * @param dev_handle Handle to the device.
+ */
+void spi_bus_lock_unregister_dev(spi_bus_lock_dev_handle_t dev_handle);
+
+/**
+ * @brief Get the parent bus lock of the device
+ *
+ * @param dev_handle Handle to the device to get bus lock
+ * @return The bus lock handle
+ */
+spi_bus_lock_handle_t spi_bus_lock_get_parent(spi_bus_lock_dev_handle_t dev_handle);
+
+/**
+ * @brief Get the device ID of a lock.
+ *
+ * The callers should allocate CS pins according to this ID.
+ *
+ * @param dev_handle Handle to the device to get ID
+ * @return ID of the device
+ */
+int spi_bus_lock_get_dev_id(spi_bus_lock_dev_handle_t dev_handle);
+
+/**
+ * @brief The device request to touch bus registers. Can only be called by the acquiring processor.
+ *
+ * Also check if the registers has been touched by other devices.
+ *
+ * @param dev_handle Handle to the device to operate the registers
+ * @return true if there has been other devices touching SPI registers.
+ *     The caller may need to do a full-configuration. Otherwise return
+ *     false.
+ */
+bool spi_bus_lock_touch(spi_bus_lock_dev_handle_t dev_handle);
+
+/************* Acquiring service *********************/
+/**
+ * Acquiring the SPI bus for exclusive use. Will also wait for the BG to finish all requests of
+ * this device before it returns.
+ *
+ * After successfully return, the caller becomes the acquiring processor.
+ *
+ * @note For the main flash bus, `bg_disable` will be called to disable the cache.
+ *
+ * @param dev_handle Handle to the device request for acquiring.
+ * @param wait Time to wait until timeout or succeed, must be `portMAX_DELAY` for now.
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_INVALID_ARG: timeout is not portMAX_DELAY
+ */
+esp_err_t spi_bus_lock_acquire_start(spi_bus_lock_dev_handle_t dev_handle, TickType_t wait);
+
+/**
+ * Release the bus acquired. Will pass the acquiring processor to other blocked
+ * processors (tasks or ISR), and cause them to be unblocked or invoked.
+ *
+ * The acquiring device may also become NULL if no device is asking for acquiring.
+ * In this case, the BG may be invoked if there is any BG requests.
+ *
+ * If the new acquiring device has BG requests, the BG will be invoked before the
+ * task is resumed later after the BG finishes all requests of the new acquiring
+ * device. Otherwise the task of the new acquiring device will be resumed immediately.
+ *
+ * @param dev_handle Handle to the device releasing the bus.
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_INVALID_STATE: the device hasn't acquired the lock yet
+ */
+esp_err_t spi_bus_lock_acquire_end(spi_bus_lock_dev_handle_t dev_handle);
+
+/**
+ * Get the device acquiring the bus.
+ *
+ * @note Return value is not stable as the acquiring processor may change
+ *       when this function is called.
+ *
+ * @param lock Lock of SPI bus to get the acquiring device.
+ * @return The argument corresponding to the acquiring device, see
+ *         `spi_bus_lock_register_dev`.
+ */
+spi_bus_lock_dev_handle_t spi_bus_lock_get_acquiring_dev(spi_bus_lock_handle_t lock);
+
+/************* BG (Background, for ISR or cache) service *********************/
+/**
+ * Call by a device to request a BG operation.
+ *
+ * Depending on the bus lock state, the BG operations may be resumed by this
+ * call, or pending until BG operations allowed.
+ *
+ * Cleared by `spi_bus_lock_bg_clear_req` in the BG.
+ *
+ * @param dev_handle The device requesting BG operations.
+ * @return always ESP_OK
+ */
+esp_err_t spi_bus_lock_bg_request(spi_bus_lock_dev_handle_t dev_handle);
+
+/**
+ * Wait until the ISR has finished all the BG operations for the acquiring device.
+ * If any `spi_bus_lock_bg_request` for this device has been called after
+ * `spi_bus_lock_acquire_start`, this function must be called before any operation
+ * in the task.
+ *
+ * @note Can only be called when bus acquired by this device.
+ *
+ * @param dev_handle Handle to the device acquiring the bus.
+ * @param wait Time to wait until timeout or succeed, must be `portMAX_DELAY` for now.
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_INVALID_STATE: The device is not the acquiring bus.
+ *  - ESP_ERR_INVALID_ARG: Timeout is not portMAX_DELAY.
+ */
+esp_err_t spi_bus_lock_wait_bg_done(spi_bus_lock_dev_handle_t dev_handle, TickType_t wait);
+
+/**
+ * Handle interrupt and closure of last operation. Should be called at the beginning of the ISR,
+ * when the ISR is acting as the acquiring processor.
+ *
+ * @param lock The SPI bus lock
+ *
+ * @return false if the ISR has already touched the HW, should run closure of the
+ *         last operation first; otherwise true if the ISR just start operating
+ *         on the HW, closure should be skipped.
+ */
+bool spi_bus_lock_bg_entry(spi_bus_lock_handle_t lock);
+
+/**
+ * Handle the scheduling of other acquiring devices, and control of HW operation
+ * status.
+ *
+ * If no BG request is found, call with `wip=false`. This function will return false,
+ * indicating there is incoming BG requests for the current acquiring device (or
+ * for all devices if there is no acquiring device) and the ISR needs retry.
+ * Otherwise may schedule a new acquiring processor (unblock the task) if there
+ * is, and return true.
+ *
+ * Otherwise if a BG request is started in this ISR, call with `wip=true` and the
+ * function will enable the interrupt to make the ISR be called again when the
+ * request is done.
+ *
+ * This function is safe and should still be called when the ISR just lost its acquiring processor
+ * role, but hasn't quit.
+ *
+ * @note This function will not change acquiring device. The ISR call
+ *       `spi_bus_lock_bg_update_acquiring` to check for new acquiring device,
+ *       when acquiring devices need to be served before other devices.
+ *
+ * @param lock The SPI bus lock.
+ * @param wip Whether an operation is being executed when quitting the ISR.
+ * @param do_yield[out] Not touched when no yielding required, otherwise set
+ *                      to pdTRUE.
+ * @return false if retry is required, indicating that there is pending BG request.
+ *         otherwise true and quit ISR is allowed.
+ */
+bool spi_bus_lock_bg_exit(spi_bus_lock_handle_t lock, bool wip, BaseType_t* do_yield);
+
+/**
+ * Check whether there is device asking for the acquiring device, and the desired
+ * device for the next operation is also recommended.
+ *
+ * @note Must be called when the ISR is acting as the acquiring processor, and
+ *        there is no acquiring device.
+ *
+ * @param lock The SPI bus lock.
+ * @param out_dev_lock The recommended device for hte next operation. It's the new
+ *        acquiring device when found, otherwise a device that has active BG request.
+ *
+ * @return true if the ISR need to quit (new acquiring device has no active BG
+ *         request, or no active BG requests for all devices when there is no
+ *         acquiring device), otherwise false.
+ */
+bool spi_bus_lock_bg_check_dev_acq(spi_bus_lock_handle_t lock, spi_bus_lock_dev_handle_t *out_dev_lock);
+
+/**
+ * Check if the device has BG requests. Must be called when the ISR is acting as
+ * the acquiring processor.
+ *
+ * @note This is not stable, may become true again when a task request for BG
+ *       operation (by `spi_bus_lock_bg_request`).
+ *
+ * @param dev_lock The device to check.
+ * @return true if the device has BG requests, otherwise false.
+ */
+bool spi_bus_lock_bg_check_dev_req(spi_bus_lock_dev_handle_t dev_lock);
+
+/**
+ * Clear the pending BG operation request of a device after served. Must be
+ * called when the ISR is acting as the acquiring processor.
+ *
+ * @note When the return value is true, the ISR will lost the acquiring processor role. Then
+ *       `spi_bus_lock_bg_exit` must be called and checked before calling all other functions that
+ *       require to be called when the ISR is the acquiring processor again.
+ *
+ * @param dev_handle The device whose request is served.
+ * @return True if no pending requests for the acquiring device, or for all devices
+ *         if there is no acquiring device. Otherwise false. When the return value is
+ *         true, the ISR is no longer the acquiring processor.
+ */
+bool spi_bus_lock_bg_clear_req(spi_bus_lock_dev_handle_t dev_lock);
+
+/**
+ * Check if there is any active BG requests.
+ *
+ * @param lock The SPI bus lock.
+ * @return true if any device has active BG requst, otherwise false.
+ */
+bool spi_bus_lock_bg_req_exist(spi_bus_lock_handle_t lock);
+
+/*******************************************************************************
+ * Variable and APIs for the OS to initialize the locks for the main chip
+ ******************************************************************************/
+/// The lock for the main bus
+extern const spi_bus_lock_handle_t g_main_spi_bus_lock;
+
+/**
+ * @brief Initialize the main SPI bus, called during chip startup.
+ *
+ * @return always ESP_OK
+ */
+esp_err_t spi_bus_lock_init_main_bus(void);
+
+/// The lock for the main flash device
+extern const spi_bus_lock_dev_handle_t g_spi_lock_main_flash_dev;
+
+/**
+ * @brief Initialize the main flash device, called during chip startup.
+ *
+ * @return
+ *      - ESP_OK: if success
+ *      - ESP_ERR_NO_MEM: memory exhausted
+ */
+esp_err_t spi_bus_lock_init_main_dev(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/spi_master.h b/tools/sdk/esp32s3/include/driver/include/driver/spi_master.h
new file mode 100644
index 00000000000..eaf391c8213
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/spi_master.h
@@ -0,0 +1,389 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_err.h"
+#include "freertos/FreeRTOS.h"
+//for spi_bus_initialization funcions. to be back-compatible
+#include "driver/spi_common.h"
+
+/** SPI master clock is divided by 80MHz apb clock. Below defines are example frequencies, and are accurate. Be free to specify a random frequency, it will be rounded to closest frequency (to macros below if above 8MHz).
+  * 8MHz
+  */
+#define SPI_MASTER_FREQ_8M      (APB_CLK_FREQ/10)
+#define SPI_MASTER_FREQ_9M      (APB_CLK_FREQ/9)    ///< 8.89MHz
+#define SPI_MASTER_FREQ_10M     (APB_CLK_FREQ/8)    ///< 10MHz
+#define SPI_MASTER_FREQ_11M     (APB_CLK_FREQ/7)    ///< 11.43MHz
+#define SPI_MASTER_FREQ_13M     (APB_CLK_FREQ/6)    ///< 13.33MHz
+#define SPI_MASTER_FREQ_16M     (APB_CLK_FREQ/5)    ///< 16MHz
+#define SPI_MASTER_FREQ_20M     (APB_CLK_FREQ/4)    ///< 20MHz
+#define SPI_MASTER_FREQ_26M     (APB_CLK_FREQ/3)    ///< 26.67MHz
+#define SPI_MASTER_FREQ_40M     (APB_CLK_FREQ/2)    ///< 40MHz
+#define SPI_MASTER_FREQ_80M     (APB_CLK_FREQ/1)    ///< 80MHz
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define SPI_DEVICE_TXBIT_LSBFIRST          (1<<0)  ///< Transmit command/address/data LSB first instead of the default MSB first
+#define SPI_DEVICE_RXBIT_LSBFIRST          (1<<1)  ///< Receive data LSB first instead of the default MSB first
+#define SPI_DEVICE_BIT_LSBFIRST            (SPI_DEVICE_TXBIT_LSBFIRST|SPI_DEVICE_RXBIT_LSBFIRST) ///< Transmit and receive LSB first
+#define SPI_DEVICE_3WIRE                   (1<<2)  ///< Use MOSI (=spid) for both sending and receiving data
+#define SPI_DEVICE_POSITIVE_CS             (1<<3)  ///< Make CS positive during a transaction instead of negative
+#define SPI_DEVICE_HALFDUPLEX              (1<<4)  ///< Transmit data before receiving it, instead of simultaneously
+#define SPI_DEVICE_CLK_AS_CS               (1<<5)  ///< Output clock on CS line if CS is active
+/** There are timing issue when reading at high frequency (the frequency is related to whether iomux pins are used, valid time after slave sees the clock).
+  *     - In half-duplex mode, the driver automatically inserts dummy bits before reading phase to fix the timing issue. Set this flag to disable this feature.
+  *     - In full-duplex mode, however, the hardware cannot use dummy bits, so there is no way to prevent data being read from getting corrupted.
+  *       Set this flag to confirm that you're going to work with output only, or read without dummy bits at your own risk.
+  */
+#define SPI_DEVICE_NO_DUMMY                (1<<6)
+#define SPI_DEVICE_DDRCLK                  (1<<7)
+
+
+typedef struct spi_transaction_t spi_transaction_t;
+typedef void(*transaction_cb_t)(spi_transaction_t *trans);
+
+/**
+ * @brief This is a configuration for a SPI slave device that is connected to one of the SPI buses.
+ */
+typedef struct {
+    uint8_t command_bits;           ///< Default amount of bits in command phase (0-16), used when ``SPI_TRANS_VARIABLE_CMD`` is not used, otherwise ignored.
+    uint8_t address_bits;           ///< Default amount of bits in address phase (0-64), used when ``SPI_TRANS_VARIABLE_ADDR`` is not used, otherwise ignored.
+    uint8_t dummy_bits;             ///< Amount of dummy bits to insert between address and data phase
+    uint8_t mode;                   /**< SPI mode, representing a pair of (CPOL, CPHA) configuration:
+                                         - 0: (0, 0)
+                                         - 1: (0, 1)
+                                         - 2: (1, 0)
+                                         - 3: (1, 1)
+                                     */
+    uint16_t duty_cycle_pos;         ///< Duty cycle of positive clock, in 1/256th increments (128 = 50%/50% duty). Setting this to 0 (=not setting it) is equivalent to setting this to 128.
+    uint16_t cs_ena_pretrans;        ///< Amount of SPI bit-cycles the cs should be activated before the transmission (0-16). This only works on half-duplex transactions.
+    uint8_t cs_ena_posttrans;       ///< Amount of SPI bit-cycles the cs should stay active after the transmission (0-16)
+    int clock_speed_hz;             ///< Clock speed, divisors of 80MHz, in Hz. See ``SPI_MASTER_FREQ_*``.
+    int input_delay_ns;             /**< Maximum data valid time of slave. The time required between SCLK and MISO
+        valid, including the possible clock delay from slave to master. The driver uses this value to give an extra
+        delay before the MISO is ready on the line. Leave at 0 unless you know you need a delay. For better timing
+        performance at high frequency (over 8MHz), it's suggest to have the right value.
+        */
+    int spics_io_num;               ///< CS GPIO pin for this device, or -1 if not used
+    uint32_t flags;                 ///< Bitwise OR of SPI_DEVICE_* flags
+    int queue_size;                 ///< Transaction queue size. This sets how many transactions can be 'in the air' (queued using spi_device_queue_trans but not yet finished using spi_device_get_trans_result) at the same time
+    transaction_cb_t pre_cb;   /**< Callback to be called before a transmission is started.
+                                 *
+                                 *  This callback is called within interrupt
+                                 *  context should be in IRAM for best
+                                 *  performance, see "Transferring Speed"
+                                 *  section in the SPI Master documentation for
+                                 *  full details. If not, the callback may crash
+                                 *  during flash operation when the driver is
+                                 *  initialized with ESP_INTR_FLAG_IRAM.
+                                 */
+    transaction_cb_t post_cb;  /**< Callback to be called after a transmission has completed.
+                                 *
+                                 *  This callback is called within interrupt
+                                 *  context should be in IRAM for best
+                                 *  performance, see "Transferring Speed"
+                                 *  section in the SPI Master documentation for
+                                 *  full details. If not, the callback may crash
+                                 *  during flash operation when the driver is
+                                 *  initialized with ESP_INTR_FLAG_IRAM.
+                                 */
+} spi_device_interface_config_t;
+
+
+#define SPI_TRANS_MODE_DIO            (1<<0)  ///< Transmit/receive data in 2-bit mode
+#define SPI_TRANS_MODE_QIO            (1<<1)  ///< Transmit/receive data in 4-bit mode
+#define SPI_TRANS_USE_RXDATA          (1<<2)  ///< Receive into rx_data member of spi_transaction_t instead into memory at rx_buffer.
+#define SPI_TRANS_USE_TXDATA          (1<<3)  ///< Transmit tx_data member of spi_transaction_t instead of data at tx_buffer. Do not set tx_buffer when using this.
+#define SPI_TRANS_MODE_DIOQIO_ADDR    (1<<4)  ///< Also transmit address in mode selected by SPI_MODE_DIO/SPI_MODE_QIO
+#define SPI_TRANS_VARIABLE_CMD        (1<<5)  ///< Use the ``command_bits`` in ``spi_transaction_ext_t`` rather than default value in ``spi_device_interface_config_t``.
+#define SPI_TRANS_VARIABLE_ADDR       (1<<6)  ///< Use the ``address_bits`` in ``spi_transaction_ext_t`` rather than default value in ``spi_device_interface_config_t``.
+#define SPI_TRANS_VARIABLE_DUMMY      (1<<7)  ///< Use the ``dummy_bits`` in ``spi_transaction_ext_t`` rather than default value in ``spi_device_interface_config_t``.
+#define SPI_TRANS_CS_KEEP_ACTIVE      (1<<8)  ///< Keep CS active after data transfer
+#define SPI_TRANS_MULTILINE_CMD       (1<<9)  ///< The data lines used at command phase is the same as data phase (otherwise, only one data line is used at command phase)
+#define SPI_TRANS_MODE_OCT            (1<<10) ///< Transmit/receive data in 8-bit mode
+#define SPI_TRANS_MULTILINE_ADDR      SPI_TRANS_MODE_DIOQIO_ADDR ///< The data lines used at address phase is the same as data phase (otherwise, only one data line is used at address phase)
+
+/**
+ * This structure describes one SPI transaction. The descriptor should not be modified until the transaction finishes.
+ */
+struct spi_transaction_t {
+    uint32_t flags;                 ///< Bitwise OR of SPI_TRANS_* flags
+    uint16_t cmd;                   /**< Command data, of which the length is set in the ``command_bits`` of spi_device_interface_config_t.
+                                      *
+                                      *  <b>NOTE: this field, used to be "command" in ESP-IDF 2.1 and before, is re-written to be used in a new way in ESP-IDF 3.0.</b>
+                                      *
+                                      *  Example: write 0x0123 and command_bits=12 to send command 0x12, 0x3_ (in previous version, you may have to write 0x3_12).
+                                      */
+    uint64_t addr;                  /**< Address data, of which the length is set in the ``address_bits`` of spi_device_interface_config_t.
+                                      *
+                                      *  <b>NOTE: this field, used to be "address" in ESP-IDF 2.1 and before, is re-written to be used in a new way in ESP-IDF3.0.</b>
+                                      *
+                                      *  Example: write 0x123400 and address_bits=24 to send address of 0x12, 0x34, 0x00 (in previous version, you may have to write 0x12340000).
+                                      */
+    size_t length;                  ///< Total data length, in bits
+    size_t rxlength;                ///< Total data length received, should be not greater than ``length`` in full-duplex mode (0 defaults this to the value of ``length``).
+    void *user;                     ///< User-defined variable. Can be used to store eg transaction ID.
+    union {
+        const void *tx_buffer;      ///< Pointer to transmit buffer, or NULL for no MOSI phase
+        uint8_t tx_data[4];         ///< If SPI_TRANS_USE_TXDATA is set, data set here is sent directly from this variable.
+    };
+    union {
+        void *rx_buffer;            ///< Pointer to receive buffer, or NULL for no MISO phase. Written by 4 bytes-unit if DMA is used.
+        uint8_t rx_data[4];         ///< If SPI_TRANS_USE_RXDATA is set, data is received directly to this variable
+    };
+} ;        //the rx data should start from a 32-bit aligned address to get around dma issue.
+
+/**
+ * This struct is for SPI transactions which may change their address and command length.
+ * Please do set the flags in base to ``SPI_TRANS_VARIABLE_CMD_ADR`` to use the bit length here.
+ */
+typedef struct {
+    struct spi_transaction_t base;  ///< Transaction data, so that pointer to spi_transaction_t can be converted into spi_transaction_ext_t
+    uint8_t command_bits;           ///< The command length in this transaction, in bits.
+    uint8_t address_bits;           ///< The address length in this transaction, in bits.
+    uint8_t dummy_bits;             ///< The dummy length in this transaction, in bits.
+} spi_transaction_ext_t ;
+
+
+typedef struct spi_device_t *spi_device_handle_t;  ///< Handle for a device on a SPI bus
+/**
+ * @brief Allocate a device on a SPI bus
+ *
+ * This initializes the internal structures for a device, plus allocates a CS pin on the indicated SPI master
+ * peripheral and routes it to the indicated GPIO. All SPI master devices have three CS pins and can thus control
+ * up to three devices.
+ *
+ * @note While in general, speeds up to 80MHz on the dedicated SPI pins and 40MHz on GPIO-matrix-routed pins are
+ *       supported, full-duplex transfers routed over the GPIO matrix only support speeds up to 26MHz.
+ *
+ * @param host_id SPI peripheral to allocate device on
+ * @param dev_config SPI interface protocol config for the device
+ * @param handle Pointer to variable to hold the device handle
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_NOT_FOUND     if host doesn't have any free CS slots
+ *         - ESP_ERR_NO_MEM        if out of memory
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_bus_add_device(spi_host_device_t host_id, const spi_device_interface_config_t *dev_config, spi_device_handle_t *handle);
+
+
+/**
+ * @brief Remove a device from the SPI bus
+ *
+ * @param handle Device handle to free
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_INVALID_STATE if device already is freed
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_bus_remove_device(spi_device_handle_t handle);
+
+
+/**
+ * @brief Queue a SPI transaction for interrupt transaction execution. Get the result by ``spi_device_get_trans_result``.
+ *
+ * @note Normally a device cannot start (queue) polling and interrupt
+ *      transactions simultaneously.
+ *
+ * @param handle Device handle obtained using spi_host_add_dev
+ * @param trans_desc Description of transaction to execute
+ * @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
+ *                      never time out.
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_TRANS_CS_KEEP_ACTIVE flag is specified while
+ *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
+ *         - ESP_ERR_TIMEOUT       if there was no room in the queue before ticks_to_wait expired
+ *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
+ *         - ESP_ERR_INVALID_STATE if previous transactions are not finished
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_device_queue_trans(spi_device_handle_t handle, spi_transaction_t *trans_desc, TickType_t ticks_to_wait);
+
+
+/**
+ * @brief Get the result of a SPI transaction queued earlier by ``spi_device_queue_trans``.
+ *
+ * This routine will wait until a transaction to the given device
+ * succesfully completed. It will then return the description of the
+ * completed transaction so software can inspect the result and e.g. free the memory or
+ * re-use the buffers.
+ *
+ * @param handle Device handle obtained using spi_host_add_dev
+ * @param trans_desc Pointer to variable able to contain a pointer to the description of the transaction
+        that is executed. The descriptor should not be modified until the descriptor is returned by
+        spi_device_get_trans_result.
+ * @param ticks_to_wait Ticks to wait until there's a returned item; use portMAX_DELAY to never time
+                        out.
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_TIMEOUT       if there was no completed transaction before ticks_to_wait expired
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_device_get_trans_result(spi_device_handle_t handle, spi_transaction_t **trans_desc, TickType_t ticks_to_wait);
+
+
+/**
+ * @brief Send a SPI transaction, wait for it to complete, and return the result
+ *
+ * This function is the equivalent of calling spi_device_queue_trans() followed by spi_device_get_trans_result().
+ * Do not use this when there is still a transaction separately queued (started) from spi_device_queue_trans() or polling_start/transmit that hasn't been finalized.
+ *
+ * @note This function is not thread safe when multiple tasks access the same SPI device.
+ *      Normally a device cannot start (queue) polling and interrupt
+ *      transactions simutanuously.
+ *
+ * @param handle Device handle obtained using spi_host_add_dev
+ * @param trans_desc Description of transaction to execute
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_device_transmit(spi_device_handle_t handle, spi_transaction_t *trans_desc);
+
+
+/**
+ * @brief Immediately start a polling transaction.
+ *
+ * @note Normally a device cannot start (queue) polling and interrupt
+ *      transactions simutanuously. Moreover, a device cannot start a new polling
+ *      transaction if another polling transaction is not finished.
+ *
+ * @param handle Device handle obtained using spi_host_add_dev
+ * @param trans_desc Description of transaction to execute
+ * @param ticks_to_wait Ticks to wait until there's room in the queue;
+ *              currently only portMAX_DELAY is supported.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_TRANS_CS_KEEP_ACTIVE flag is specified while
+ *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
+ *         - ESP_ERR_TIMEOUT       if the device cannot get control of the bus before ``ticks_to_wait`` expired
+ *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
+ *         - ESP_ERR_INVALID_STATE if previous transactions are not finished
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_device_polling_start(spi_device_handle_t handle, spi_transaction_t *trans_desc, TickType_t ticks_to_wait);
+
+
+/**
+ * @brief Poll until the polling transaction ends.
+ *
+ * This routine will not return until the transaction to the given device has
+ * succesfully completed. The task is not blocked, but actively busy-spins for
+ * the transaction to be completed.
+ *
+ * @param handle Device handle obtained using spi_host_add_dev
+ * @param ticks_to_wait Ticks to wait until there's a returned item; use portMAX_DELAY to never time
+                        out.
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_TIMEOUT       if the transaction cannot finish before ticks_to_wait expired
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_device_polling_end(spi_device_handle_t handle, TickType_t ticks_to_wait);
+
+
+/**
+ * @brief Send a polling transaction, wait for it to complete, and return the result
+ *
+ * This function is the equivalent of calling spi_device_polling_start() followed by spi_device_polling_end().
+ * Do not use this when there is still a transaction that hasn't been finalized.
+ *
+ * @note This function is not thread safe when multiple tasks access the same SPI device.
+ *      Normally a device cannot start (queue) polling and interrupt
+ *      transactions simutanuously.
+ *
+ * @param handle Device handle obtained using spi_host_add_dev
+ * @param trans_desc Description of transaction to execute
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_device_polling_transmit(spi_device_handle_t handle, spi_transaction_t *trans_desc);
+
+
+/**
+ * @brief Occupy the SPI bus for a device to do continuous transactions.
+ *
+ * Transactions to all other devices will be put off until ``spi_device_release_bus`` is called.
+ *
+ * @note The function will wait until all the existing transactions have been sent.
+ *
+ * @param device The device to occupy the bus.
+ * @param wait Time to wait before the the bus is occupied by the device. Currently MUST set to portMAX_DELAY.
+ *
+ * @return
+ *      - ESP_ERR_INVALID_ARG : ``wait`` is not set to portMAX_DELAY.
+ *      - ESP_OK : Success.
+ */
+esp_err_t spi_device_acquire_bus(spi_device_handle_t device, TickType_t wait);
+
+/**
+ * @brief Release the SPI bus occupied by the device. All other devices can start sending transactions.
+ *
+ * @param dev The device to release the bus.
+ */
+void spi_device_release_bus(spi_device_handle_t dev);
+
+
+/**
+ * @brief Calculate the working frequency that is most close to desired frequency, and also the register value.
+ *
+ * @param fapb The frequency of apb clock, should be ``APB_CLK_FREQ``.
+ * @param hz Desired working frequency
+ * @param duty_cycle Duty cycle of the spi clock
+ * @param reg_o Output of value to be set in clock register, or NULL if not needed.
+ *
+ * @deprecated The app shouldn't care about the register. Call ``spi_get_actual_clock`` instead.
+ *
+ * @return Actual working frequency that most fit.
+ */
+int spi_cal_clock(int fapb, int hz, int duty_cycle, uint32_t *reg_o) __attribute__((deprecated));
+
+/**
+ * @brief Calculate the working frequency that is most close to desired frequency.
+ *
+ * @param fapb The frequency of apb clock, should be ``APB_CLK_FREQ``.
+ * @param hz Desired working frequency
+ * @param duty_cycle Duty cycle of the spi clock
+ *
+ * @return Actual working frequency that most fit.
+ */
+int spi_get_actual_clock(int fapb, int hz, int duty_cycle);
+
+/**
+  * @brief Calculate the timing settings of specified frequency and settings.
+  *
+  * @param gpio_is_used True if using GPIO matrix, or False if iomux pins are used.
+  * @param input_delay_ns Input delay from SCLK launch edge to MISO data valid.
+  * @param eff_clk Effective clock frequency (in Hz) from spi_cal_clock.
+  * @param dummy_o Address of dummy bits used output. Set to NULL if not needed.
+  * @param cycles_remain_o Address of cycles remaining (after dummy bits are used) output.
+  *         - -1 If too many cycles remaining, suggest to compensate half a clock.
+  *         - 0 If no remaining cycles or dummy bits are not used.
+  *         - positive value: cycles suggest to compensate.
+  *
+  * @note If **dummy_o* is not zero, it means dummy bits should be applied in half duplex mode, and full duplex mode may not work.
+  */
+void spi_get_timing(bool gpio_is_used, int input_delay_ns, int eff_clk, int *dummy_o, int *cycles_remain_o);
+
+/**
+  * @brief Get the frequency limit of current configurations.
+  *         SPI master working at this limit is OK, while above the limit, full duplex mode and DMA will not work,
+  *         and dummy bits will be aplied in the half duplex mode.
+  *
+  * @param gpio_is_used True if using GPIO matrix, or False if native pins are used.
+  * @param input_delay_ns Input delay from SCLK launch edge to MISO data valid.
+  * @return Frequency limit of current configurations.
+  */
+int spi_get_freq_limit(bool gpio_is_used, int input_delay_ns);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/spi_slave.h b/tools/sdk/esp32s3/include/driver/include/driver/spi_slave.h
new file mode 100644
index 00000000000..92fa6004860
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/spi_slave.h
@@ -0,0 +1,190 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef _DRIVER_SPI_SLAVE_H_
+#define _DRIVER_SPI_SLAVE_H_
+
+#include "esp_err.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/semphr.h"
+#include "driver/spi_common.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+#define SPI_SLAVE_TXBIT_LSBFIRST          (1<<0)  ///< Transmit command/address/data LSB first instead of the default MSB first
+#define SPI_SLAVE_RXBIT_LSBFIRST          (1<<1)  ///< Receive data LSB first instead of the default MSB first
+#define SPI_SLAVE_BIT_LSBFIRST            (SPI_SLAVE_TXBIT_LSBFIRST|SPI_SLAVE_RXBIT_LSBFIRST) ///< Transmit and receive LSB first
+
+
+typedef struct spi_slave_transaction_t spi_slave_transaction_t;
+typedef void(*slave_transaction_cb_t)(spi_slave_transaction_t *trans);
+
+/**
+ * @brief This is a configuration for a SPI host acting as a slave device.
+ */
+typedef struct {
+    int spics_io_num;               ///< CS GPIO pin for this device
+    uint32_t flags;                 ///< Bitwise OR of SPI_SLAVE_* flags
+    int queue_size;                 ///< Transaction queue size. This sets how many transactions can be 'in the air' (queued using spi_slave_queue_trans but not yet finished using spi_slave_get_trans_result) at the same time
+    uint8_t mode;                   /**< SPI mode, representing a pair of (CPOL, CPHA) configuration:
+                                         - 0: (0, 0)
+                                         - 1: (0, 1)
+                                         - 2: (1, 0)
+                                         - 3: (1, 1)
+                                     */
+    slave_transaction_cb_t post_setup_cb;  /**< Callback called after the SPI registers are loaded with new data.
+                                             *
+                                             *  This callback is called within interrupt
+                                             *  context should be in IRAM for best
+                                             *  performance, see "Transferring Speed"
+                                             *  section in the SPI Master documentation for
+                                             *  full details. If not, the callback may crash
+                                             *  during flash operation when the driver is
+                                             *  initialized with ESP_INTR_FLAG_IRAM.
+                                             */
+    slave_transaction_cb_t post_trans_cb;  /**< Callback called after a transaction is done.
+                                             *
+                                             *  This callback is called within interrupt
+                                             *  context should be in IRAM for best
+                                             *  performance, see "Transferring Speed"
+                                             *  section in the SPI Master documentation for
+                                             *  full details. If not, the callback may crash
+                                             *  during flash operation when the driver is
+                                             *  initialized with ESP_INTR_FLAG_IRAM.
+                                             */
+} spi_slave_interface_config_t;
+
+/**
+ * This structure describes one SPI transaction
+ */
+struct spi_slave_transaction_t {
+    size_t length;                  ///< Total data length, in bits
+    size_t trans_len;               ///< Transaction data length, in bits
+    const void *tx_buffer;          ///< Pointer to transmit buffer, or NULL for no MOSI phase
+    void *rx_buffer;                /**< Pointer to receive buffer, or NULL for no MISO phase.
+                                     * When the DMA is anabled, must start at WORD boundary (``rx_buffer%4==0``),
+                                     * and has length of a multiple of 4 bytes.
+                                     */
+    void *user;                     ///< User-defined variable. Can be used to store eg transaction ID.
+};
+
+/**
+ * @brief Initialize a SPI bus as a slave interface
+ *
+ * @warning SPI0/1 is not supported
+ *
+ * @param host          SPI peripheral to use as a SPI slave interface
+ * @param bus_config    Pointer to a spi_bus_config_t struct specifying how the host should be initialized
+ * @param slave_config  Pointer to a spi_slave_interface_config_t struct specifying the details for the slave interface
+ * @param dma_chan      - Selecting a DMA channel for an SPI bus allows transactions on the bus with size only limited by the amount of internal memory.
+ *                      - Selecting SPI_DMA_DISABLED limits the size of transactions.
+ *                      - Set to SPI_DMA_DISABLED if only the SPI flash uses this bus.
+ *                      - Set to SPI_DMA_CH_AUTO to let the driver to allocate the DMA channel.
+ *
+ * @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in
+ *          DMA-capable memory.
+ *
+ * @warning The ISR of SPI is always executed on the core which calls this
+ *          function. Never starve the ISR on this core or the SPI transactions will not
+ *          be handled.
+ *
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if configuration is invalid
+ *         - ESP_ERR_INVALID_STATE if host already is in use
+ *         - ESP_ERR_NOT_FOUND     if there is no available DMA channel
+ *         - ESP_ERR_NO_MEM        if out of memory
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *bus_config, const spi_slave_interface_config_t *slave_config, spi_dma_chan_t dma_chan);
+
+/**
+ * @brief Free a SPI bus claimed as a SPI slave interface
+ *
+ * @param host SPI peripheral to free
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_INVALID_STATE if not all devices on the bus are freed
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_slave_free(spi_host_device_t host);
+
+
+/**
+ * @brief Queue a SPI transaction for execution
+ *
+ * Queues a SPI transaction to be executed by this slave device. (The transaction queue size was specified when the slave
+ * device was initialised via spi_slave_initialize.) This function may block if the queue is full (depending on the
+ * ticks_to_wait parameter). No SPI operation is directly initiated by this function, the next queued transaction
+ * will happen when the master initiates a SPI transaction by pulling down CS and sending out clock signals.
+ *
+ * This function hands over ownership of the buffers in ``trans_desc`` to the SPI slave driver; the application is
+ * not to access this memory until ``spi_slave_queue_trans`` is called to hand ownership back to the application.
+ *
+ * @param host SPI peripheral that is acting as a slave
+ * @param trans_desc Description of transaction to execute. Not const because we may want to write status back
+ *                   into the transaction description.
+ * @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
+ *                      never time out.
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_slave_queue_trans(spi_host_device_t host, const spi_slave_transaction_t *trans_desc, TickType_t ticks_to_wait);
+
+
+/**
+ * @brief Get the result of a SPI transaction queued earlier
+ *
+ * This routine will wait until a transaction to the given device (queued earlier with
+ * spi_slave_queue_trans) has succesfully completed. It will then return the description of the
+ * completed transaction so software can inspect the result and e.g. free the memory or
+ * re-use the buffers.
+ *
+ * It is mandatory to eventually use this function for any transaction queued by ``spi_slave_queue_trans``.
+ *
+ * @param host SPI peripheral to that is acting as a slave
+ * @param[out] trans_desc Pointer to variable able to contain a pointer to the description of the
+ *                   transaction that is executed
+ * @param ticks_to_wait Ticks to wait until there's a returned item; use portMAX_DELAY to never time
+ *                      out.
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_slave_get_trans_result(spi_host_device_t host, spi_slave_transaction_t **trans_desc, TickType_t ticks_to_wait);
+
+
+/**
+ * @brief Do a SPI transaction
+ *
+ * Essentially does the same as spi_slave_queue_trans followed by spi_slave_get_trans_result. Do
+ * not use this when there is still a transaction queued that hasn't been finalized
+ * using spi_slave_get_trans_result.
+ *
+ * @param host SPI peripheral to that is acting as a slave
+ * @param trans_desc Pointer to variable able to contain a pointer to the description of the
+ *                   transaction that is executed. Not const because we may want to write status back
+ *                   into the transaction description.
+ * @param ticks_to_wait Ticks to wait until there's a returned item; use portMAX_DELAY to never time
+ *                      out.
+ * @return
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_OK                on success
+ */
+esp_err_t spi_slave_transmit(spi_host_device_t host, spi_slave_transaction_t *trans_desc, TickType_t ticks_to_wait);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/spi_slave_hd.h b/tools/sdk/esp32s3/include/driver/include/driver/spi_slave_hd.h
new file mode 100644
index 00000000000..5d6ff4c2b9e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/spi_slave_hd.h
@@ -0,0 +1,208 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_types.h"
+#include "soc/soc_caps.h"
+#include "freertos/FreeRTOS.h"
+
+#include "hal/spi_types.h"
+#include "driver/spi_common.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#if !SOC_SPI_SUPPORT_SLAVE_HD_VER2  && !CI_HEADER_CHECK
+#error The SPI peripheral does not support this feature
+#endif
+
+/// Descriptor of data to send/receive
+typedef struct {
+    uint8_t* data;                              ///< Buffer to send, must be DMA capable
+    size_t   len;                               ///< Len of data to send/receive. For receiving the buffer length should be multiples of 4 bytes, otherwise the extra part will be truncated.
+    size_t   trans_len;                         ///< For RX direction, it indicates the data actually received. For TX direction, it is meaningless.
+    void*    arg;                               ///< Extra argument indiciating this data
+} spi_slave_hd_data_t;
+
+/// Information of SPI Slave HD event
+typedef struct {
+    spi_event_t          event;                 ///< Event type
+    spi_slave_hd_data_t* trans;                 ///< Corresponding transaction for SPI_EV_SEND and SPI_EV_RECV events
+} spi_slave_hd_event_t;
+
+/// Callback for SPI Slave HD
+typedef bool (*slave_cb_t)(void* arg, spi_slave_hd_event_t* event, BaseType_t* awoken);
+
+/// Channel of SPI Slave HD to do data transaction
+typedef enum {
+    SPI_SLAVE_CHAN_TX = 0,                      ///< The output channel (RDDMA)
+    SPI_SLAVE_CHAN_RX = 1,                      ///< The input channel (WRDMA)
+} spi_slave_chan_t;
+
+/// Callback configuration structure for SPI Slave HD
+typedef struct {
+    slave_cb_t cb_buffer_tx;                    ///< Callback when master reads from shared buffer
+    slave_cb_t cb_buffer_rx;                    ///< Callback when master writes to shared buffer
+    slave_cb_t cb_send_dma_ready;               ///< Callback when TX data buffer is loaded to the hardware (DMA)
+    slave_cb_t cb_sent;                         ///< Callback when data are sent
+    slave_cb_t cb_recv_dma_ready;               ///< Callback when RX data buffer is loaded to the hardware (DMA)
+    slave_cb_t cb_recv;                         ///< Callback when data are received
+    slave_cb_t cb_cmd9;                         ///< Callback when CMD9 received
+    slave_cb_t cb_cmdA;                         ///< Callback when CMDA received
+    void* arg;                                  ///< Argument indicating this SPI Slave HD peripheral instance
+} spi_slave_hd_callback_config_t;
+
+
+//flags for ``spi_slave_hd_slot_config_t`` to use
+#define SPI_SLAVE_HD_TXBIT_LSBFIRST     (1<<0)  ///< Transmit command/address/data LSB first instead of the default MSB first
+#define SPI_SLAVE_HD_RXBIT_LSBFIRST     (1<<1)  ///< Receive data LSB first instead of the default MSB first
+#define SPI_SLAVE_HD_BIT_LSBFIRST       (SPI_SLAVE_HD_TXBIT_LSBFIRST|SPI_SLAVE_HD_RXBIT_LSBFIRST) ///< Transmit and receive LSB first
+#define SPI_SLAVE_HD_APPEND_MODE        (1<<2)  ///< Adopt DMA append mode for transactions. In this mode, users can load(append) DMA descriptors without stopping the DMA
+
+/// Configuration structure for the SPI Slave HD driver
+typedef struct {
+    uint8_t mode;                               /**< SPI mode, representing a pair of (CPOL, CPHA) configuration:
+                                                     - 0: (0, 0)
+                                                     - 1: (0, 1)
+                                                     - 2: (1, 0)
+                                                     - 3: (1, 1)
+                                                 */
+    uint32_t spics_io_num;                      ///< CS GPIO pin for this device
+    uint32_t flags;                             ///< Bitwise OR of SPI_SLAVE_HD_* flags
+    uint32_t command_bits;                      ///< command field bits, multiples of 8 and at least 8.
+    uint32_t address_bits;                      ///< address field bits, multiples of 8 and at least 8.
+    uint32_t dummy_bits;                        ///< dummy field bits, multiples of 8 and at least 8.
+    uint32_t queue_size;                        ///< Transaction queue size. This sets how many transactions can be 'in the air' (queued using spi_slave_hd_queue_trans but not yet finished using spi_slave_hd_get_trans_result) at the same time
+    spi_dma_chan_t dma_chan;                    ///< DMA channel to used.
+    spi_slave_hd_callback_config_t cb_config;   ///< Callback configuration
+} spi_slave_hd_slot_config_t;
+
+/**
+ * @brief Initialize the SPI Slave HD driver.
+ *
+ * @param host_id       The host to use
+ * @param bus_config    Bus configuration for the bus used
+ * @param config        Configuration for the SPI Slave HD driver
+ * @return
+ *  - ESP_OK:                on success
+ *  - ESP_ERR_INVALID_ARG:   invalid argument given
+ *  - ESP_ERR_INVALID_STATE: function called in invalid state, may be some resources are already in use
+ *  - ESP_ERR_NOT_FOUND      if there is no available DMA channel
+ *  - ESP_ERR_NO_MEM:        memory allocation failed
+ *  - or other return value from `esp_intr_alloc`
+ */
+esp_err_t spi_slave_hd_init(spi_host_device_t host_id, const spi_bus_config_t *bus_config,
+                            const spi_slave_hd_slot_config_t *config);
+
+/**
+ * @brief Deinitialize the SPI Slave HD driver
+ *
+ * @param host_id The host to deinitialize the driver
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_INVALID_ARG: if the host_id is not correct
+ */
+esp_err_t spi_slave_hd_deinit(spi_host_device_t host_id);
+
+/**
+ * @brief Queue transactions (segment mode)
+ *
+ * @param host_id   Host to queue the transaction
+ * @param chan      SPI_SLAVE_CHAN_TX or SPI_SLAVE_CHAN_RX
+ * @param trans     Transaction descriptors
+ * @param timeout   Timeout before the data is queued
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_INVALID_ARG: The input argument is invalid. Can be the following reason:
+ *      - The buffer given is not DMA capable
+ *      - The length of data is invalid (not larger than 0, or exceed the max transfer length)
+ *      - The transaction direction is invalid
+ *  - ESP_ERR_TIMEOUT: Cannot queue the data before timeout. Master is still processing previous transaction.
+ *  - ESP_ERR_INVALID_STATE: Function called in invalid state. This API should be called under segment mode.
+ */
+esp_err_t spi_slave_hd_queue_trans(spi_host_device_t host_id, spi_slave_chan_t chan, spi_slave_hd_data_t* trans, TickType_t timeout);
+
+/**
+ * @brief Get the result of a data transaction (segment mode)
+ *
+ * @note This API should be called successfully the same times as the ``spi_slave_hd_queue_trans``.
+ *
+ * @param host_id   Host to queue the transaction
+ * @param chan      Channel to get the result, SPI_SLAVE_CHAN_TX or SPI_SLAVE_CHAN_RX
+ * @param[out] out_trans Pointer to the transaction descriptor (``spi_slave_hd_data_t``) passed to the driver before. Hardware has finished this transaction. Member ``trans_len`` indicates the actual number of bytes of received data, it's meaningless for TX.
+ * @param timeout   Timeout before the result is got
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_INVALID_ARG: Function is not valid
+ *  - ESP_ERR_TIMEOUT: There's no transaction done before timeout
+ *  - ESP_ERR_INVALID_STATE: Function called in invalid state. This API should be called under segment mode.
+ */
+esp_err_t spi_slave_hd_get_trans_res(spi_host_device_t host_id, spi_slave_chan_t chan, spi_slave_hd_data_t **out_trans, TickType_t timeout);
+
+/**
+ * @brief Read the shared registers
+ *
+ * @param host_id   Host to read the shared registers
+ * @param addr      Address of register to read, 0 to ``SOC_SPI_MAXIMUM_BUFFER_SIZE-1``
+ * @param[out] out_data Output buffer to store the read data
+ * @param len       Length to read, not larger than ``SOC_SPI_MAXIMUM_BUFFER_SIZE-addr``
+ */
+void spi_slave_hd_read_buffer(spi_host_device_t host_id, int addr, uint8_t *out_data, size_t len);
+
+/**
+ * @brief Write the shared registers
+ *
+ * @param host_id   Host to write the shared registers
+ * @param addr      Address of register to write, 0 to ``SOC_SPI_MAXIMUM_BUFFER_SIZE-1``
+ * @param data      Buffer holding the data to write
+ * @param len       Length to write, ``SOC_SPI_MAXIMUM_BUFFER_SIZE-addr``
+ */
+void spi_slave_hd_write_buffer(spi_host_device_t host_id, int addr, uint8_t *data, size_t len);
+
+/**
+ * @brief Load transactions (append mode)
+ *
+ * @note In this mode, user transaction descriptors will be appended to the DMA and the DMA will keep processing the data without stopping
+ *
+ * @param host_id   Host to load transactions
+ * @param chan      SPI_SLAVE_CHAN_TX or SPI_SLAVE_CHAN_RX
+ * @param trans     Transaction descriptor
+ * @param timeout   Timeout before the transaction is loaded
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_INVALID_ARG: The input argument is invalid. Can be the following reason:
+ *      - The buffer given is not DMA capable
+ *      - The length of data is invalid (not larger than 0, or exceed the max transfer length)
+ *      - The transaction direction is invalid
+ *  - ESP_ERR_TIMEOUT: Master is still processing previous transaction. There is no available transaction for slave to load
+ *  - ESP_ERR_INVALID_STATE: Function called in invalid state. This API should be called under append mode.
+ */
+esp_err_t spi_slave_hd_append_trans(spi_host_device_t host_id, spi_slave_chan_t chan, spi_slave_hd_data_t *trans, TickType_t timeout);
+
+/**
+ * @brief Get the result of a data transaction (append mode)
+ *
+ * @note This API should be called the same times as the ``spi_slave_hd_append_trans``
+ *
+ * @param host_id   Host to load the transaction
+ * @param chan      SPI_SLAVE_CHAN_TX or SPI_SLAVE_CHAN_RX
+ * @param[out] out_trans Pointer to the transaction descriptor (``spi_slave_hd_data_t``) passed to the driver before. Hardware has finished this transaction. Member ``trans_len`` indicates the actual number of bytes of received data, it's meaningless for TX.
+ * @param timeout   Timeout before the result is got
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_INVALID_ARG: Function is not valid
+ *  - ESP_ERR_TIMEOUT: There's no transaction done before timeout
+ *  - ESP_ERR_INVALID_STATE: Function called in invalid state. This API should be called under append mode.
+ */
+esp_err_t spi_slave_hd_get_append_trans_res(spi_host_device_t host_id, spi_slave_chan_t chan, spi_slave_hd_data_t **out_trans, TickType_t timeout);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/timer.h b/tools/sdk/esp32s3/include/driver/include/driver/timer.h
new file mode 100644
index 00000000000..a3ab39267cd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/timer.h
@@ -0,0 +1,453 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_err.h"
+#include "esp_attr.h"
+#include "soc/soc.h"
+#include "soc/timer_periph.h"
+#include "esp_intr_alloc.h"
+#include "hal/timer_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define TIMER_BASE_CLK   (APB_CLK_FREQ)  /*!< Frequency of the clock on the input of the timer groups */
+
+/**
+ * @brief Interrupt handle callback function. User need to retrun a bool value
+ *        in callback.
+ *
+ * @return
+ *     - True Do task yield at the end of ISR
+ *     - False Not do task yield at the end of ISR
+ *
+ * @note If you called FreeRTOS functions in callback, you need to return true or false based on
+ *       the retrun value of argument `pxHigherPriorityTaskWoken`.
+ *       For example, `xQueueSendFromISR` is called in callback, if the return value `pxHigherPriorityTaskWoken`
+ *       of any FreeRTOS calls is pdTRUE, return true; otherwise return false.
+ */
+typedef bool (*timer_isr_t)(void *);
+
+/**
+ * @brief Interrupt handle, used in order to free the isr after use.
+ * Aliases to an int handle for now.
+ */
+typedef intr_handle_t timer_isr_handle_t;
+
+/**
+ * @brief Read the counter value of hardware timer.
+ *
+ * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ * @param timer_val Pointer to accept timer counter value.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_get_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *timer_val);
+
+/**
+ * @brief Read the counter value of hardware timer, in unit of a given scale.
+ *
+ * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ * @param time Pointer, type of double*, to accept timer counter value, in seconds.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_get_counter_time_sec(timer_group_t group_num, timer_idx_t timer_num, double *time);
+
+/**
+ * @brief Set counter value to hardware timer.
+ *
+ * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ * @param load_val Counter value to write to the hardware timer.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_set_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t load_val);
+
+/**
+ * @brief Start the counter of hardware timer.
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_start(timer_group_t group_num, timer_idx_t timer_num);
+
+/**
+ * @brief Pause the counter of hardware timer.
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_pause(timer_group_t group_num, timer_idx_t timer_num);
+
+/**
+ * @brief Set counting mode for hardware timer.
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ * @param counter_dir Counting direction of timer, count-up or count-down
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_set_counter_mode(timer_group_t group_num, timer_idx_t timer_num, timer_count_dir_t counter_dir);
+
+/**
+ * @brief Enable or disable counter reload function when alarm event occurs.
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ * @param reload Counter reload mode.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_set_auto_reload(timer_group_t group_num, timer_idx_t timer_num, timer_autoreload_t reload);
+
+/**
+ * @brief Set hardware divider of the source clock to the timer group.
+ * By default, the source clock is APB clock running at 80 MHz.
+ * For more information, please check Chapter Reset and Clock in Chip Technical Reference Manual.
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ * @param divider Timer clock divider value. The divider's range is from from 2 to 65536.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_set_divider(timer_group_t group_num, timer_idx_t timer_num, uint32_t divider);
+
+/**
+ * @brief Set timer alarm value.
+ *
+ * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ * @param alarm_value A 64-bit value to set the alarm value.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_set_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_value);
+
+/**
+ * @brief Get timer alarm value.
+ *
+ * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ * @param alarm_value Pointer of A 64-bit value to accept the alarm value.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_get_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *alarm_value);
+
+/**
+ * @brief Enable or disable generation of timer alarm events.
+ *
+ * @param group_num Timer group, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ * @param alarm_en To enable or disable timer alarm function.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_alarm_t alarm_en);
+
+/**
+ * @brief Add ISR handle callback for the corresponding timer.
+ *
+ * @param group_num Timer group number
+ * @param timer_num Timer index of timer group
+ * @param isr_handler Interrupt handler function, it is a callback function.
+ * @param arg Parameter for handler function
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ *
+ * @note This ISR handler will be called from an ISR.
+ *       This ISR handler do not need to handle interrupt status, and should be kept short.
+ *       If you want to realize some specific applications or write the whole ISR, you can
+ *       call timer_isr_register(...) to register ISR.
+ *
+ *       The callback should return a bool value to determine whether need to do YIELD at
+ *       the end of the ISR.
+ *
+ *       If the intr_alloc_flags value ESP_INTR_FLAG_IRAM is set,
+ *       the handler function must be declared with IRAM_ATTR attribute
+ *       and can only call functions in IRAM or ROM. It cannot call other timer APIs.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_isr_callback_add(timer_group_t group_num, timer_idx_t timer_num, timer_isr_t isr_handler, void *arg, int intr_alloc_flags);
+
+/**
+ * @brief Remove ISR handle callback for the corresponding timer.
+ *
+ * @param group_num Timer group number
+ * @param timer_num Timer index of timer group
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_isr_callback_remove(timer_group_t group_num, timer_idx_t timer_num);
+
+/**
+ * @brief Register Timer interrupt handler, the handler is an ISR.
+ *        The handler will be attached to the same CPU core that this function is running on.
+ *
+ * @param group_num Timer group number
+ * @param timer_num Timer index of timer group
+ * @param fn Interrupt handler function.
+ * @param arg Parameter for handler function
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ * @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
+ *        be returned here.
+ *
+ * @note If use this function to reigster ISR, you need to write the whole ISR.
+ *       In the interrupt handler, you need to call timer_spinlock_take(..) before
+ *       your handling, and call timer_spinlock_give(...) after your handling.
+ *
+ *       If the intr_alloc_flags value ESP_INTR_FLAG_IRAM is set,
+ *       the handler function must be declared with IRAM_ATTR attribute
+ *       and can only call functions in IRAM or ROM. It cannot call other timer APIs.
+ *       Use direct register access to configure timers from inside the ISR in this case.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_isr_register(timer_group_t group_num, timer_idx_t timer_num, void (*fn)(void *), void *arg, int intr_alloc_flags, timer_isr_handle_t *handle);
+
+/** @brief Initializes and configure the timer.
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ * @param config Pointer to timer initialization parameters.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_init(timer_group_t group_num, timer_idx_t timer_num, const timer_config_t *config);
+
+/** @brief Deinitializes the timer.
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_deinit(timer_group_t group_num, timer_idx_t timer_num);
+
+/** @brief Get timer configure value.
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
+ * @param config Pointer of struct to accept timer parameters.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_get_config(timer_group_t group_num, timer_idx_t timer_num, timer_config_t *config);
+
+/** @brief Enable timer group interrupt, by enable mask
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param intr_mask Timer interrupt enable mask.
+ *          - TIMER_INTR_T0: t0 interrupt
+ *          - TIMER_INTR_T1: t1 interrupt
+ *          - TIMER_INTR_WDT: watchdog interrupt
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_group_intr_enable(timer_group_t group_num, timer_intr_t intr_mask);
+
+/** @brief Disable timer group interrupt, by disable mask
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param intr_mask Timer interrupt disable mask.
+ *          - TIMER_INTR_T0: t0 interrupt
+ *          - TIMER_INTR_T1: t1 interrupt
+ *          - TIMER_INTR_WDT: watchdog interrupt
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_group_intr_disable(timer_group_t group_num, timer_intr_t intr_mask);
+
+/** @brief Enable timer interrupt
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_enable_intr(timer_group_t group_num, timer_idx_t timer_num);
+
+/** @brief Disable timer interrupt
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_disable_intr(timer_group_t group_num, timer_idx_t timer_num);
+
+/** @brief Clear timer interrupt status, just used in ISR
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index.
+ *
+ */
+void timer_group_intr_clr_in_isr(timer_group_t group_num, timer_idx_t timer_num) __attribute__((deprecated));
+
+/** @brief Clear timer interrupt status, just used in ISR
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index.
+ *
+ */
+void timer_group_clr_intr_status_in_isr(timer_group_t group_num, timer_idx_t timer_num);
+
+/** @brief Enable alarm interrupt, just used in ISR
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index.
+ *
+ */
+void timer_group_enable_alarm_in_isr(timer_group_t group_num, timer_idx_t timer_num);
+
+/** @brief Get the current counter value, just used in ISR
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index.
+ *
+ * @return
+ *     - Counter value
+ */
+uint64_t timer_group_get_counter_value_in_isr(timer_group_t group_num, timer_idx_t timer_num);
+
+/** @brief Set the alarm threshold for the timer, just used in ISR
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index.
+ * @param alarm_val Alarm threshold.
+ *
+ */
+void timer_group_set_alarm_value_in_isr(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_val);
+
+/** @brief Enable/disable a counter, just used in ISR
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index.
+ * @param counter_en Enable/disable.
+ *
+ */
+void timer_group_set_counter_enable_in_isr(timer_group_t group_num, timer_idx_t timer_num, timer_start_t counter_en);
+
+/** @brief Get the masked interrupt status, just used in ISR
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ *
+ * @return
+ *     - Interrupt status
+ */
+timer_intr_t timer_group_intr_get_in_isr(timer_group_t group_num) __attribute__((deprecated));
+
+/** @brief Get interrupt status, just used in ISR
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ *
+ * @return
+ *     - Interrupt status
+ */
+uint32_t timer_group_get_intr_status_in_isr(timer_group_t group_num);
+
+/** @brief Clear the masked interrupt status, just used in ISR
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param intr_mask Masked interrupt.
+ *
+ */
+void timer_group_clr_intr_sta_in_isr(timer_group_t group_num, timer_intr_t intr_mask) __attribute__((deprecated));
+
+/** @brief Get auto reload enable status, just used in ISR
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param timer_num Timer index
+ *
+ * @return
+ *     - True Auto reload enabled
+ *     - False Auto reload disabled
+ */
+bool timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num);
+
+/** @brief Take timer spinlock to enter critical protect
+ *
+ *  @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_spinlock_take(timer_group_t group_num) __attribute__ ((deprecated));
+
+/** @brief Give timer spinlock to exit critical protect
+ *
+ *  @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t timer_spinlock_give(timer_group_t group_num) __attribute__ ((deprecated));
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/touch_pad.h b/tools/sdk/esp32s3/include/driver/include/driver/touch_pad.h
new file mode 100644
index 00000000000..0c2feebd8af
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/touch_pad.h
@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "driver/touch_sensor.h"
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/touch_sensor_common.h b/tools/sdk/esp32s3/include/driver/include/driver/touch_sensor_common.h
new file mode 100644
index 00000000000..e49c7d5de72
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/touch_sensor_common.h
@@ -0,0 +1,163 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_err.h"
+#include "esp_intr_alloc.h"
+#include "hal/touch_sensor_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Initialize touch module.
+ * @note  If default parameter don't match the usage scenario, it can be changed after this function.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_NO_MEM Touch pad init error
+ *     - ESP_ERR_NOT_SUPPORTED Touch pad is providing current to external XTAL
+ */
+esp_err_t touch_pad_init(void);
+
+/**
+ * @brief Un-install touch pad driver.
+ * @note  After this function is called, other touch functions are prohibited from being called.
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Touch pad driver not initialized
+ */
+esp_err_t touch_pad_deinit(void);
+
+/**
+ * @brief Initialize touch pad GPIO
+ * @param touch_num touch pad index
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if argument is wrong
+ */
+esp_err_t touch_pad_io_init(touch_pad_t touch_num);
+
+/**
+ * @brief Set touch sensor high voltage threshold of chanrge.
+ *        The touch sensor measures the channel capacitance value by charging and discharging the channel.
+ *        So the high threshold should be less than the supply voltage.
+ * @param refh the value of DREFH
+ * @param refl the value of DREFL
+ * @param atten the attenuation on DREFH
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if argument is wrong
+ */
+esp_err_t touch_pad_set_voltage(touch_high_volt_t refh, touch_low_volt_t refl, touch_volt_atten_t atten);
+
+/**
+ * @brief Get touch sensor reference voltage,
+ * @param refh pointer to accept DREFH value
+ * @param refl pointer to accept DREFL value
+ * @param atten pointer to accept the attenuation on DREFH
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_get_voltage(touch_high_volt_t *refh, touch_low_volt_t *refl, touch_volt_atten_t *atten);
+
+/**
+ * @brief Set touch sensor charge/discharge speed for each pad.
+ *        If the slope is 0, the counter would always be zero.
+ *        If the slope is 1, the charging and discharging would be slow, accordingly.
+ *        If the slope is set 7, which is the maximum value, the charging and discharging would be fast.
+ * @note The higher the charge and discharge current, the greater the immunity of the touch channel,
+ *       but it will increase the system power consumption.
+ * @param touch_num touch pad index
+ * @param slope touch pad charge/discharge speed
+ * @param opt the initial voltage
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if argument is wrong
+ */
+esp_err_t touch_pad_set_cnt_mode(touch_pad_t touch_num, touch_cnt_slope_t slope, touch_tie_opt_t opt);
+
+/**
+ * @brief Get touch sensor charge/discharge speed for each pad
+ * @param touch_num touch pad index
+ * @param slope pointer to accept touch pad charge/discharge slope
+ * @param opt pointer to accept the initial voltage
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if argument is wrong
+ */
+esp_err_t touch_pad_get_cnt_mode(touch_pad_t touch_num, touch_cnt_slope_t *slope, touch_tie_opt_t *opt);
+
+/**
+ * @brief Deregister the handler previously registered using touch_pad_isr_handler_register
+ * @param fn  handler function to call (as passed to touch_pad_isr_handler_register)
+ * @param arg  argument of the handler (as passed to touch_pad_isr_handler_register)
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if a handler matching both fn and
+ *        arg isn't registered
+ */
+esp_err_t touch_pad_isr_deregister(void(*fn)(void *), void *arg);
+
+/**
+ * @brief Get the touch pad which caused wakeup from deep sleep.
+ * @param pad_num pointer to touch pad which caused wakeup
+ * @return
+ *      - ESP_OK Success
+ *      - ESP_ERR_INVALID_ARG parameter is NULL
+ */
+esp_err_t touch_pad_get_wakeup_status(touch_pad_t *pad_num);
+
+/**
+ * @brief Set touch sensor FSM mode, the test action can be triggered by the timer,
+ *        as well as by the software.
+ * @param mode FSM mode
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if argument is wrong
+ */
+esp_err_t touch_pad_set_fsm_mode(touch_fsm_mode_t mode);
+
+/**
+ * @brief Get touch sensor FSM mode
+ * @param mode pointer to accept FSM mode
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_get_fsm_mode(touch_fsm_mode_t *mode);
+
+
+/**
+ * @brief To clear the touch sensor channel active status.
+ *
+ * @note The FSM automatically updates the touch sensor status. It is generally not necessary to call this API to clear the status.
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t touch_pad_clear_status(void);
+
+/**
+ * @brief Get the touch sensor channel active status mask.
+ *        The bit position represents the channel number. The 0/1 status of the bit represents the trigger status.
+ *
+ * @return
+ *      - The touch sensor status. e.g. Touch1 trigger status is `status_mask & (BIT1)`.
+ */
+uint32_t touch_pad_get_status(void);
+
+/**
+ * @brief Check touch sensor measurement status.
+ *
+ * @return
+ *      - True measurement is under way
+ *      - False measurement done
+ */
+bool touch_pad_meas_is_done(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/twai.h b/tools/sdk/esp32s3/include/driver/include/driver/twai.h
new file mode 100644
index 00000000000..70f88a4da10
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/twai.h
@@ -0,0 +1,345 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "soc/soc_caps.h"
+#if SOC_TWAI_SUPPORTED
+
+#include "freertos/FreeRTOS.h"
+#include "esp_types.h"
+#include "esp_intr_alloc.h"
+#include "esp_err.h"
+#include "gpio.h"
+#include "hal/twai_types.h"
+
+/* -------------------- Default initializers and flags ---------------------- */
+/** @cond */    //Doxy command to hide preprocessor definitions from docs
+/**
+ * @brief Initializer macro for general configuration structure.
+ *
+ * This initializer macros allows the TX GPIO, RX GPIO, and operating mode to be
+ * configured. The other members of the general configuration structure are
+ * assigned default values.
+ */
+#define TWAI_GENERAL_CONFIG_DEFAULT(tx_io_num, rx_io_num, op_mode) {.mode = op_mode, .tx_io = tx_io_num, .rx_io = rx_io_num,        \
+                                                                    .clkout_io = TWAI_IO_UNUSED, .bus_off_io = TWAI_IO_UNUSED,      \
+                                                                    .tx_queue_len = 5, .rx_queue_len = 5,                           \
+                                                                    .alerts_enabled = TWAI_ALERT_NONE,  .clkout_divider = 0,        \
+                                                                    .intr_flags = ESP_INTR_FLAG_LEVEL1}
+
+/**
+ * @brief   Alert flags
+ *
+ * The following flags represents the various kind of alerts available in
+ * the TWAI driver. These flags can be used when configuring/reconfiguring
+ * alerts, or when calling twai_read_alerts().
+ *
+ * @note    The TWAI_ALERT_AND_LOG flag is not an actual alert, but will configure
+ *          the TWAI driver to log to UART when an enabled alert occurs.
+ */
+#define TWAI_ALERT_TX_IDLE                  0x00000001  /**< Alert(1): No more messages to transmit */
+#define TWAI_ALERT_TX_SUCCESS               0x00000002  /**< Alert(2): The previous transmission was successful */
+#define TWAI_ALERT_RX_DATA                  0x00000004  /**< Alert(4): A frame has been received and added to the RX queue */
+#define TWAI_ALERT_BELOW_ERR_WARN           0x00000008  /**< Alert(8): Both error counters have dropped below error warning limit */
+#define TWAI_ALERT_ERR_ACTIVE               0x00000010  /**< Alert(16): TWAI controller has become error active */
+#define TWAI_ALERT_RECOVERY_IN_PROGRESS     0x00000020  /**< Alert(32): TWAI controller is undergoing bus recovery */
+#define TWAI_ALERT_BUS_RECOVERED            0x00000040  /**< Alert(64): TWAI controller has successfully completed bus recovery */
+#define TWAI_ALERT_ARB_LOST                 0x00000080  /**< Alert(128): The previous transmission lost arbitration */
+#define TWAI_ALERT_ABOVE_ERR_WARN           0x00000100  /**< Alert(256): One of the error counters have exceeded the error warning limit */
+#define TWAI_ALERT_BUS_ERROR                0x00000200  /**< Alert(512): A (Bit, Stuff, CRC, Form, ACK) error has occurred on the bus */
+#define TWAI_ALERT_TX_FAILED                0x00000400  /**< Alert(1024): The previous transmission has failed (for single shot transmission) */
+#define TWAI_ALERT_RX_QUEUE_FULL            0x00000800  /**< Alert(2048): The RX queue is full causing a frame to be lost */
+#define TWAI_ALERT_ERR_PASS                 0x00001000  /**< Alert(4096): TWAI controller has become error passive */
+#define TWAI_ALERT_BUS_OFF                  0x00002000  /**< Alert(8192): Bus-off condition occurred. TWAI controller can no longer influence bus */
+#define TWAI_ALERT_RX_FIFO_OVERRUN          0x00004000  /**< Alert(16384): An RX FIFO overrun has occurred */
+#define TWAI_ALERT_TX_RETRIED               0x00008000  /**< Alert(32768): An message transmission was cancelled and retried due to an errata workaround */
+#define TWAI_ALERT_PERIPH_RESET             0x00010000  /**< Alert(65536): The TWAI controller was reset */
+#define TWAI_ALERT_ALL                      0x0001FFFF  /**< Bit mask to enable all alerts during configuration */
+#define TWAI_ALERT_NONE                     0x00000000  /**< Bit mask to disable all alerts during configuration */
+#define TWAI_ALERT_AND_LOG                  0x00020000  /**< Bit mask to enable alerts to also be logged when they occur. Note that logging from the ISR is disabled if CONFIG_TWAI_ISR_IN_IRAM is enabled (see docs). */
+
+/** @endcond */
+
+#define TWAI_IO_UNUSED                   ((gpio_num_t) -1)   /**< Marks GPIO as unused in TWAI configuration */
+
+/* ----------------------- Enum and Struct Definitions ---------------------- */
+
+/**
+ * @brief   TWAI driver states
+ */
+typedef enum {
+    TWAI_STATE_STOPPED,             /**< Stopped state. The TWAI controller will not participate in any TWAI bus activities */
+    TWAI_STATE_RUNNING,             /**< Running state. The TWAI controller can transmit and receive messages */
+    TWAI_STATE_BUS_OFF,             /**< Bus-off state. The TWAI controller cannot participate in bus activities until it has recovered */
+    TWAI_STATE_RECOVERING,          /**< Recovering state. The TWAI controller is undergoing bus recovery */
+} twai_state_t;
+
+/**
+ * @brief   Structure for general configuration of the TWAI driver
+ *
+ * @note    Macro initializers are available for this structure
+ */
+typedef struct {
+    twai_mode_t mode;               /**< Mode of TWAI controller */
+    gpio_num_t tx_io;               /**< Transmit GPIO number */
+    gpio_num_t rx_io;               /**< Receive GPIO number */
+    gpio_num_t clkout_io;           /**< CLKOUT GPIO number (optional, set to -1 if unused) */
+    gpio_num_t bus_off_io;          /**< Bus off indicator GPIO number (optional, set to -1 if unused) */
+    uint32_t tx_queue_len;          /**< Number of messages TX queue can hold (set to 0 to disable TX Queue) */
+    uint32_t rx_queue_len;          /**< Number of messages RX queue can hold */
+    uint32_t alerts_enabled;        /**< Bit field of alerts to enable (see documentation) */
+    uint32_t clkout_divider;        /**< CLKOUT divider. Can be 1 or any even number from 2 to 14 (optional, set to 0 if unused) */
+    int intr_flags;                 /**< Interrupt flags to set the priority of the driver's ISR. Note that to use the ESP_INTR_FLAG_IRAM, the CONFIG_TWAI_ISR_IN_IRAM option should be enabled first. */
+} twai_general_config_t;
+
+/**
+ * @brief   Structure to store status information of TWAI driver
+ */
+typedef struct {
+    twai_state_t state;             /**< Current state of TWAI controller (Stopped/Running/Bus-Off/Recovery) */
+    uint32_t msgs_to_tx;            /**< Number of messages queued for transmission or awaiting transmission completion */
+    uint32_t msgs_to_rx;            /**< Number of messages in RX queue waiting to be read */
+    uint32_t tx_error_counter;      /**< Current value of Transmit Error Counter */
+    uint32_t rx_error_counter;      /**< Current value of Receive Error Counter */
+    uint32_t tx_failed_count;       /**< Number of messages that failed transmissions */
+    uint32_t rx_missed_count;       /**< Number of messages that were lost due to a full RX queue (or errata workaround if enabled) */
+    uint32_t rx_overrun_count;      /**< Number of messages that were lost due to a RX FIFO overrun */
+    uint32_t arb_lost_count;        /**< Number of instances arbitration was lost */
+    uint32_t bus_error_count;       /**< Number of instances a bus error has occurred */
+} twai_status_info_t;
+
+/* ------------------------------ Public API -------------------------------- */
+
+/**
+ * @brief   Install TWAI driver
+ *
+ * This function installs the TWAI driver using three configuration structures.
+ * The required memory is allocated and the TWAI driver is placed in the stopped
+ * state after running this function.
+ *
+ * @param[in]   g_config    General configuration structure
+ * @param[in]   t_config    Timing configuration structure
+ * @param[in]   f_config    Filter configuration structure
+ *
+ * @note    Macro initializers are available for the configuration structures (see documentation)
+ *
+ * @note    To reinstall the TWAI driver, call twai_driver_uninstall() first
+ *
+ * @return
+ *      - ESP_OK: Successfully installed TWAI driver
+ *      - ESP_ERR_INVALID_ARG: Arguments are invalid
+ *      - ESP_ERR_NO_MEM: Insufficient memory
+ *      - ESP_ERR_INVALID_STATE: Driver is already installed
+ */
+esp_err_t twai_driver_install(const twai_general_config_t *g_config, const twai_timing_config_t *t_config, const twai_filter_config_t *f_config);
+
+/**
+ * @brief   Uninstall the TWAI driver
+ *
+ * This function uninstalls the TWAI driver, freeing the memory utilized by the
+ * driver. This function can only be called when the driver is in the stopped
+ * state or the bus-off state.
+ *
+ * @warning The application must ensure that no tasks are blocked on TX/RX
+ *          queues or alerts when this function is called.
+ *
+ * @return
+ *      - ESP_OK: Successfully uninstalled TWAI driver
+ *      - ESP_ERR_INVALID_STATE: Driver is not in stopped/bus-off state, or is not installed
+ */
+esp_err_t twai_driver_uninstall(void);
+
+/**
+ * @brief   Start the TWAI driver
+ *
+ * This function starts the TWAI driver, putting the TWAI driver into the running
+ * state. This allows the TWAI driver to participate in TWAI bus activities such
+ * as transmitting/receiving messages. The TX and RX queue are reset in this function,
+ * clearing any messages that are unread or pending transmission. This function
+ * can only be called when the TWAI driver is in the stopped state.
+ *
+ * @return
+ *      - ESP_OK: TWAI driver is now running
+ *      - ESP_ERR_INVALID_STATE: Driver is not in stopped state, or is not installed
+ */
+esp_err_t twai_start(void);
+
+/**
+ * @brief   Stop the TWAI driver
+ *
+ * This function stops the TWAI driver, preventing any further message from being
+ * transmitted or received until twai_start() is called. Any messages in the TX
+ * queue are cleared. Any messages in the RX queue should be read by the
+ * application after this function is called. This function can only be called
+ * when the TWAI driver is in the running state.
+ *
+ * @warning A message currently being transmitted/received on the TWAI bus will
+ *          be ceased immediately. This may lead to other TWAI nodes interpreting
+ *          the unfinished message as an error.
+ *
+ * @return
+ *      - ESP_OK: TWAI driver is now Stopped
+ *      - ESP_ERR_INVALID_STATE: Driver is not in running state, or is not installed
+ */
+esp_err_t twai_stop(void);
+
+/**
+ * @brief   Transmit a TWAI message
+ *
+ * This function queues a TWAI message for transmission. Transmission will start
+ * immediately if no other messages are queued for transmission. If the TX queue
+ * is full, this function will block until more space becomes available or until
+ * it times out. If the TX queue is disabled (TX queue length = 0 in configuration),
+ * this function will return immediately if another message is undergoing
+ * transmission. This function can only be called when the TWAI driver is in the
+ * running state and cannot be called under Listen Only Mode.
+ *
+ * @param[in]   message         Message to transmit
+ * @param[in]   ticks_to_wait   Number of FreeRTOS ticks to block on the TX queue
+ *
+ * @note    This function does not guarantee that the transmission is successful.
+ *          The TX_SUCCESS/TX_FAILED alert can be enabled to alert the application
+ *          upon the success/failure of a transmission.
+ *
+ * @note    The TX_IDLE alert can be used to alert the application when no other
+ *          messages are awaiting transmission.
+ *
+ * @return
+ *      - ESP_OK: Transmission successfully queued/initiated
+ *      - ESP_ERR_INVALID_ARG: Arguments are invalid
+ *      - ESP_ERR_TIMEOUT: Timed out waiting for space on TX queue
+ *      - ESP_FAIL: TX queue is disabled and another message is currently transmitting
+ *      - ESP_ERR_INVALID_STATE: TWAI driver is not in running state, or is not installed
+ *      - ESP_ERR_NOT_SUPPORTED: Listen Only Mode does not support transmissions
+ */
+esp_err_t twai_transmit(const twai_message_t *message, TickType_t ticks_to_wait);
+
+/**
+ * @brief   Receive a TWAI message
+ *
+ * This function receives a message from the RX queue. The flags field of the
+ * message structure will indicate the type of message received. This function
+ * will block if there are no messages in the RX queue
+ *
+ * @param[out]  message         Received message
+ * @param[in]   ticks_to_wait   Number of FreeRTOS ticks to block on RX queue
+ *
+ * @warning The flags field of the received message should be checked to determine
+ *          if the received message contains any data bytes.
+ *
+ * @return
+ *      - ESP_OK: Message successfully received from RX queue
+ *      - ESP_ERR_TIMEOUT: Timed out waiting for message
+ *      - ESP_ERR_INVALID_ARG: Arguments are invalid
+ *      - ESP_ERR_INVALID_STATE: TWAI driver is not installed
+ */
+esp_err_t twai_receive(twai_message_t *message, TickType_t ticks_to_wait);
+
+/**
+ * @brief   Read TWAI driver alerts
+ *
+ * This function will read the alerts raised by the TWAI driver. If no alert has
+ * been issued when this function is called, this function will block until an alert
+ * occurs or until it timeouts.
+ *
+ * @param[out]  alerts          Bit field of raised alerts (see documentation for alert flags)
+ * @param[in]   ticks_to_wait   Number of FreeRTOS ticks to block for alert
+ *
+ * @note    Multiple alerts can be raised simultaneously. The application should
+ *          check for all alerts that have been enabled.
+ *
+ * @return
+ *      - ESP_OK: Alerts read
+ *      - ESP_ERR_TIMEOUT: Timed out waiting for alerts
+ *      - ESP_ERR_INVALID_ARG: Arguments are invalid
+ *      - ESP_ERR_INVALID_STATE: TWAI driver is not installed
+ */
+esp_err_t twai_read_alerts(uint32_t *alerts, TickType_t ticks_to_wait);
+
+/**
+ * @brief   Reconfigure which alerts are enabled
+ *
+ * This function reconfigures which alerts are enabled. If there are alerts
+ * which have not been read whilst reconfiguring, this function can read those
+ * alerts.
+ *
+ * @param[in]   alerts_enabled  Bit field of alerts to enable (see documentation for alert flags)
+ * @param[out]  current_alerts  Bit field of currently raised alerts. Set to NULL if unused
+ *
+ * @return
+ *      - ESP_OK: Alerts reconfigured
+ *      - ESP_ERR_INVALID_STATE: TWAI driver is not installed
+ */
+esp_err_t twai_reconfigure_alerts(uint32_t alerts_enabled, uint32_t *current_alerts);
+
+/**
+ * @brief   Start the bus recovery process
+ *
+ * This function initiates the bus recovery process when the TWAI driver is in
+ * the bus-off state. Once initiated, the TWAI driver will enter the recovering
+ * state and wait for 128 occurrences of the bus-free signal on the TWAI bus
+ * before returning to the stopped state. This function will reset the TX queue,
+ * clearing any messages pending transmission.
+ *
+ * @note    The BUS_RECOVERED alert can be enabled to alert the application when
+ *          the bus recovery process completes.
+ *
+ * @return
+ *      - ESP_OK: Bus recovery started
+ *      - ESP_ERR_INVALID_STATE: TWAI driver is not in the bus-off state, or is not installed
+ */
+esp_err_t twai_initiate_recovery(void);
+
+/**
+ * @brief   Get current status information of the TWAI driver
+ *
+ * @param[out]  status_info     Status information
+ *
+ * @return
+ *      - ESP_OK: Status information retrieved
+ *      - ESP_ERR_INVALID_ARG: Arguments are invalid
+ *      - ESP_ERR_INVALID_STATE: TWAI driver is not installed
+ */
+esp_err_t twai_get_status_info(twai_status_info_t *status_info);
+
+/**
+ * @brief   Clear the transmit queue
+ *
+ * This function will clear the transmit queue of all messages.
+ *
+ * @note    The transmit queue is automatically cleared when twai_stop() or
+ *          twai_initiate_recovery() is called.
+ *
+ * @return
+ *      - ESP_OK: Transmit queue cleared
+ *      - ESP_ERR_INVALID_STATE: TWAI driver is not installed or TX queue is disabled
+ */
+esp_err_t twai_clear_transmit_queue(void);
+
+/**
+ * @brief   Clear the receive queue
+ *
+ * This function will clear the receive queue of all messages.
+ *
+ * @note    The receive queue is automatically cleared when twai_start() is
+ *          called.
+ *
+ * @return
+ *      - ESP_OK: Transmit queue cleared
+ *      - ESP_ERR_INVALID_STATE: TWAI driver is not installed
+ */
+esp_err_t twai_clear_receive_queue(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //SOC_TWAI_SUPPORTED
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/uart.h b/tools/sdk/esp32s3/include/driver/include/driver/uart.h
new file mode 100644
index 00000000000..4524516338b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/uart.h
@@ -0,0 +1,872 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "esp_err.h"
+#include "esp_intr_alloc.h"
+#include "soc/soc_caps.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/semphr.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "freertos/ringbuf.h"
+#include "hal/uart_types.h"
+
+// Valid UART port number
+#define UART_NUM_0             (0) /*!< UART port 0 */
+#define UART_NUM_1             (1) /*!< UART port 1 */
+#if SOC_UART_NUM > 2
+#define UART_NUM_2             (2) /*!< UART port 2 */
+#endif
+#define UART_NUM_MAX           (SOC_UART_NUM) /*!< UART port max */
+
+/* @brief When calling `uart_set_pin`, instead of GPIO number, `UART_PIN_NO_CHANGE`
+ *        can be provided to keep the currently allocated pin.
+ */
+#define UART_PIN_NO_CHANGE      (-1)
+
+#define UART_FIFO_LEN           SOC_UART_FIFO_LEN       ///< Length of the UART HW FIFO
+#define UART_BITRATE_MAX        SOC_UART_BITRATE_MAX    ///< Maximum configurable bitrate
+
+/**
+ * @brief UART interrupt configuration parameters for uart_intr_config function
+ */
+typedef struct {
+    uint32_t intr_enable_mask;          /*!< UART interrupt enable mask, choose from UART_XXXX_INT_ENA_M under UART_INT_ENA_REG(i), connect with bit-or operator*/
+    uint8_t  rx_timeout_thresh;         /*!< UART timeout interrupt threshold (unit: time of sending one byte)*/
+    uint8_t  txfifo_empty_intr_thresh;  /*!< UART TX empty interrupt threshold.*/
+    uint8_t  rxfifo_full_thresh;        /*!< UART RX full interrupt threshold.*/
+} uart_intr_config_t;
+
+/**
+ * @brief UART event types used in the ring buffer
+ */
+typedef enum {
+    UART_DATA,              /*!< UART data event*/
+    UART_BREAK,             /*!< UART break event*/
+    UART_BUFFER_FULL,       /*!< UART RX buffer full event*/
+    UART_FIFO_OVF,          /*!< UART FIFO overflow event*/
+    UART_FRAME_ERR,         /*!< UART RX frame error event*/
+    UART_PARITY_ERR,        /*!< UART RX parity event*/
+    UART_DATA_BREAK,        /*!< UART TX data and break event*/
+    UART_PATTERN_DET,       /*!< UART pattern detected */
+    UART_EVENT_MAX,         /*!< UART event max index*/
+} uart_event_type_t;
+
+/**
+ * @brief Event structure used in UART event queue
+ */
+typedef struct {
+    uart_event_type_t type; /*!< UART event type */
+    size_t size;            /*!< UART data size for UART_DATA event*/
+    bool timeout_flag;      /*!< UART data read timeout flag for UART_DATA event (no new data received during configured RX TOUT)*/
+                            /*!< If the event is caused by FIFO-full interrupt, then there will be no event with the timeout flag before the next byte coming.*/
+} uart_event_t;
+
+typedef intr_handle_t uart_isr_handle_t;
+
+/**
+ * @brief Install UART driver and set the UART to the default configuration.
+ *
+ * UART ISR handler will be attached to the same CPU core that this function is running on.
+ *
+ * @note  Rx_buffer_size should be greater than UART_FIFO_LEN. Tx_buffer_size should be either zero or greater than UART_FIFO_LEN.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param rx_buffer_size UART RX ring buffer size.
+ * @param tx_buffer_size UART TX ring buffer size.
+ *        If set to zero, driver will not use TX buffer, TX function will block task until all data have been sent out.
+ * @param queue_size UART event queue size/depth.
+ * @param uart_queue UART event queue handle (out param). On success, a new queue handle is written here to provide
+ *        access to UART events. If set to NULL, driver will not use an event queue.
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info. Do not set ESP_INTR_FLAG_IRAM here
+ *        (the driver's ISR handler is not located in IRAM)
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_driver_install(uart_port_t uart_num, int rx_buffer_size, int tx_buffer_size, int queue_size, QueueHandle_t* uart_queue, int intr_alloc_flags);
+
+/**
+ * @brief Uninstall UART driver.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_driver_delete(uart_port_t uart_num);
+
+/**
+ * @brief Checks whether the driver is installed or not
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ *
+ * @return
+ *     - true  driver is installed
+ *     - false driver is not installed
+ */
+bool uart_is_driver_installed(uart_port_t uart_num);
+
+/**
+ * @brief Set UART data bits.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param data_bit UART data bits
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_set_word_length(uart_port_t uart_num, uart_word_length_t data_bit);
+
+/**
+ * @brief Get the UART data bit configuration.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param data_bit Pointer to accept value of UART data bits.
+ *
+ * @return
+ *     - ESP_FAIL  Parameter error
+ *     - ESP_OK    Success, result will be put in (*data_bit)
+ */
+esp_err_t uart_get_word_length(uart_port_t uart_num, uart_word_length_t* data_bit);
+
+/**
+ * @brief Set UART stop bits.
+ *
+ * @param uart_num  UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param stop_bits  UART stop bits
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Fail
+ */
+esp_err_t uart_set_stop_bits(uart_port_t uart_num, uart_stop_bits_t stop_bits);
+
+/**
+ * @brief Get the UART stop bit configuration.
+ *
+ * @param uart_num  UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param stop_bits  Pointer to accept value of UART stop bits.
+ *
+ * @return
+ *     - ESP_FAIL Parameter error
+ *     - ESP_OK   Success, result will be put in (*stop_bit)
+ */
+esp_err_t uart_get_stop_bits(uart_port_t uart_num, uart_stop_bits_t* stop_bits);
+
+/**
+ * @brief Set UART parity mode.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param parity_mode the enum of uart parity configuration
+ *
+ * @return
+ *     - ESP_FAIL  Parameter error
+ *     - ESP_OK    Success
+ */
+esp_err_t uart_set_parity(uart_port_t uart_num, uart_parity_t parity_mode);
+
+/**
+ * @brief Get the UART parity mode configuration.
+ *
+ * @param uart_num  UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param parity_mode Pointer to accept value of UART parity mode.
+ *
+ * @return
+ *     - ESP_FAIL  Parameter error
+ *     - ESP_OK    Success, result will be put in (*parity_mode)
+ *
+ */
+esp_err_t uart_get_parity(uart_port_t uart_num, uart_parity_t* parity_mode);
+
+/**
+ * @brief Set UART baud rate.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param baudrate UART baud rate.
+ *
+ * @return
+ *     - ESP_FAIL Parameter error
+ *     - ESP_OK   Success
+ */
+esp_err_t uart_set_baudrate(uart_port_t uart_num, uint32_t baudrate);
+
+/**
+ * @brief Get the UART baud rate configuration.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param baudrate Pointer to accept value of UART baud rate
+ *
+ * @return
+ *     - ESP_FAIL Parameter error
+ *     - ESP_OK   Success, result will be put in (*baudrate)
+ *
+ */
+esp_err_t uart_get_baudrate(uart_port_t uart_num, uint32_t* baudrate);
+
+/**
+ * @brief Set UART line inverse mode
+ *
+ * @param uart_num  UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param inverse_mask Choose the wires that need to be inverted. Using the ORred mask of `uart_signal_inv_t`
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_set_line_inverse(uart_port_t uart_num, uint32_t inverse_mask);
+
+/**
+ * @brief Set hardware flow control.
+ *
+ * @param uart_num   UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param flow_ctrl Hardware flow control mode
+ * @param rx_thresh Threshold of Hardware RX flow control (0 ~ UART_FIFO_LEN).
+ *        Only when UART_HW_FLOWCTRL_RTS is set, will the rx_thresh value be set.
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_set_hw_flow_ctrl(uart_port_t uart_num, uart_hw_flowcontrol_t flow_ctrl, uint8_t rx_thresh);
+
+/**
+ * @brief Set software flow control.
+ *
+ * @param uart_num   UART_NUM_0, UART_NUM_1 or UART_NUM_2
+ * @param enable     switch on or off
+ * @param rx_thresh_xon  low water mark
+ * @param rx_thresh_xoff high water mark
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+ esp_err_t uart_set_sw_flow_ctrl(uart_port_t uart_num, bool enable,  uint8_t rx_thresh_xon,  uint8_t rx_thresh_xoff);
+
+/**
+ * @brief Get the UART hardware flow control configuration.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param flow_ctrl Option for different flow control mode.
+ *
+ * @return
+ *     - ESP_FAIL Parameter error
+ *     - ESP_OK   Success, result will be put in (*flow_ctrl)
+ */
+esp_err_t uart_get_hw_flow_ctrl(uart_port_t uart_num, uart_hw_flowcontrol_t* flow_ctrl);
+
+/**
+ * @brief Clear UART interrupt status
+ *
+ * @param uart_num  UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param clr_mask  Bit mask of the interrupt status to be cleared.
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_clear_intr_status(uart_port_t uart_num, uint32_t clr_mask);
+
+/**
+ * @brief Set UART interrupt enable
+ *
+ * @param uart_num     UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param enable_mask  Bit mask of the enable bits.
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_enable_intr_mask(uart_port_t uart_num, uint32_t enable_mask);
+
+/**
+ * @brief Clear UART interrupt enable bits
+ *
+ * @param uart_num      UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param disable_mask  Bit mask of the disable bits.
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_disable_intr_mask(uart_port_t uart_num, uint32_t disable_mask);
+
+/**
+ * @brief Enable UART RX interrupt (RX_FULL & RX_TIMEOUT INTERRUPT)
+ *
+ * @param uart_num  UART port number, the max port number is (UART_NUM_MAX -1).
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_enable_rx_intr(uart_port_t uart_num);
+
+/**
+ * @brief Disable UART RX interrupt (RX_FULL & RX_TIMEOUT INTERRUPT)
+ *
+ * @param uart_num  UART port number, the max port number is (UART_NUM_MAX -1).
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_disable_rx_intr(uart_port_t uart_num);
+
+/**
+ * @brief Disable UART TX interrupt (TXFIFO_EMPTY INTERRUPT)
+ *
+ * @param uart_num  UART port number
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_disable_tx_intr(uart_port_t uart_num);
+
+/**
+ * @brief Enable UART TX interrupt (TXFIFO_EMPTY INTERRUPT)
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param enable  1: enable; 0: disable
+ * @param thresh  Threshold of TX interrupt, 0 ~ UART_FIFO_LEN
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_enable_tx_intr(uart_port_t uart_num, int enable, int thresh);
+
+/**
+ * @brief Register UART interrupt handler (ISR).
+ *
+ * @note UART ISR handler will be attached to the same CPU core that this function is running on.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param fn  Interrupt handler function.
+ * @param arg parameter for handler function
+ * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
+ *        ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
+ * @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
+ *        be returned here.
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_isr_register(uart_port_t uart_num, void (*fn)(void*), void * arg, int intr_alloc_flags,  uart_isr_handle_t *handle);
+
+/**
+ * @brief Free UART interrupt handler registered by uart_isr_register. Must be called on the same core as
+ * uart_isr_register was called.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_isr_free(uart_port_t uart_num);
+
+/**
+ * @brief Assign signals of a UART peripheral to GPIO pins
+ *
+ * @note If the GPIO number configured for a UART signal matches one of the
+ *       IOMUX signals for that GPIO, the signal will be connected directly
+ *       via the IOMUX. Otherwise the GPIO and signal will be connected via
+ *       the GPIO Matrix. For example, if on an ESP32 the call
+ *       `uart_set_pin(0, 1, 3, -1, -1)` is performed, as GPIO1 is UART0's
+ *       default TX pin and GPIO3 is UART0's default RX pin, both will be
+ *       connected to respectively U0TXD and U0RXD through the IOMUX, totally
+ *       bypassing the GPIO matrix.
+ *       The check is performed on a per-pin basis. Thus, it is possible to have
+ *       RX pin binded to a GPIO through the GPIO matrix, whereas TX is binded
+ *       to its GPIO through the IOMUX.
+ *
+ * @note Internal signal can be output to multiple GPIO pads.
+ *       Only one GPIO pad can connect with input signal.
+ *
+ * @param uart_num   UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param tx_io_num  UART TX pin GPIO number.
+ * @param rx_io_num  UART RX pin GPIO number.
+ * @param rts_io_num UART RTS pin GPIO number.
+ * @param cts_io_num UART CTS pin GPIO number.
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_set_pin(uart_port_t uart_num, int tx_io_num, int rx_io_num, int rts_io_num, int cts_io_num);
+
+/**
+ * @brief Manually set the UART RTS pin level.
+ * @note  UART must be configured with hardware flow control disabled.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param level    1: RTS output low (active); 0: RTS output high (block)
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_set_rts(uart_port_t uart_num, int level);
+
+/**
+ * @brief Manually set the UART DTR pin level.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param level    1: DTR output low; 0: DTR output high
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_set_dtr(uart_port_t uart_num, int level);
+
+/**
+ * @brief Set UART idle interval after tx FIFO is empty
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param idle_num idle interval after tx FIFO is empty(unit: the time it takes to send one bit
+ *        under current baudrate)
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_set_tx_idle_num(uart_port_t uart_num, uint16_t idle_num);
+
+/**
+ * @brief Set UART configuration parameters.
+ *
+ * @param uart_num    UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param uart_config UART parameter settings
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_param_config(uart_port_t uart_num, const uart_config_t *uart_config);
+
+/**
+ * @brief Configure UART interrupts.
+ *
+ * @param uart_num  UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param intr_conf UART interrupt settings
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_intr_config(uart_port_t uart_num, const uart_intr_config_t *intr_conf);
+
+/**
+ * @brief Wait until UART TX FIFO is empty.
+ *
+ * @param uart_num      UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param ticks_to_wait Timeout, count in RTOS ticks
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Parameter error
+ *     - ESP_ERR_TIMEOUT  Timeout
+ */
+esp_err_t uart_wait_tx_done(uart_port_t uart_num, TickType_t ticks_to_wait);
+
+/**
+ * @brief Send data to the UART port from a given buffer and length.
+ *
+ * This function will not wait for enough space in TX FIFO. It will just fill the available TX FIFO and return when the FIFO is full.
+ * @note This function should only be used when UART TX buffer is not enabled.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param buffer data buffer address
+ * @param len    data length to send
+ *
+ * @return
+ *     - (-1)  Parameter error
+ *     - OTHERS (>=0) The number of bytes pushed to the TX FIFO
+ */
+int uart_tx_chars(uart_port_t uart_num, const char* buffer, uint32_t len);
+
+/**
+ * @brief Send data to the UART port from a given buffer and length,
+ *
+ * If the UART driver's parameter 'tx_buffer_size' is set to zero:
+ * This function will not return until all the data have been sent out, or at least pushed into TX FIFO.
+ *
+ * Otherwise, if the 'tx_buffer_size' > 0, this function will return after copying all the data to tx ring buffer,
+ * UART ISR will then move data from the ring buffer to TX FIFO gradually.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param src   data buffer address
+ * @param size  data length to send
+ *
+ * @return
+ *     - (-1) Parameter error
+ *     - OTHERS (>=0) The number of bytes pushed to the TX FIFO
+ */
+int uart_write_bytes(uart_port_t uart_num, const void* src, size_t size);
+
+/**
+ * @brief Send data to the UART port from a given buffer and length,
+ *
+ * If the UART driver's parameter 'tx_buffer_size' is set to zero:
+ * This function will not return until all the data and the break signal have been sent out.
+ * After all data is sent out, send a break signal.
+ *
+ * Otherwise, if the 'tx_buffer_size' > 0, this function will return after copying all the data to tx ring buffer,
+ * UART ISR will then move data from the ring buffer to TX FIFO gradually.
+ * After all data sent out, send a break signal.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param src   data buffer address
+ * @param size  data length to send
+ * @param brk_len break signal duration(unit: the time it takes to send one bit at current baudrate)
+ *
+ * @return
+ *     - (-1) Parameter error
+ *     - OTHERS (>=0) The number of bytes pushed to the TX FIFO
+ */
+int uart_write_bytes_with_break(uart_port_t uart_num, const void* src, size_t size, int brk_len);
+
+/**
+ * @brief UART read bytes from UART buffer
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param buf     pointer to the buffer.
+ * @param length  data length
+ * @param ticks_to_wait sTimeout, count in RTOS ticks
+ *
+ * @return
+ *     - (-1) Error
+ *     - OTHERS (>=0) The number of bytes read from UART FIFO
+ */
+int uart_read_bytes(uart_port_t uart_num, void* buf, uint32_t length, TickType_t ticks_to_wait);
+
+/**
+ * @brief Alias of uart_flush_input.
+ *        UART ring buffer flush. This will discard all data in the UART RX buffer.
+ * @note  Instead of waiting the data sent out, this function will clear UART rx buffer.
+ *        In order to send all the data in tx FIFO, we can use uart_wait_tx_done function.
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_flush(uart_port_t uart_num);
+
+/**
+ * @brief Clear input buffer, discard all the data is in the ring-buffer.
+ * @note  In order to send all the data in tx FIFO, we can use uart_wait_tx_done function.
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_flush_input(uart_port_t uart_num);
+
+/**
+ * @brief   UART get RX ring buffer cached data length
+ *
+ * @param   uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param   size Pointer of size_t to accept cached data length
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_get_buffered_data_len(uart_port_t uart_num, size_t* size);
+
+/**
+ * @brief   UART disable pattern detect function.
+ *          Designed for applications like 'AT commands'.
+ *          When the hardware detects a series of one same character, the interrupt will be triggered.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_disable_pattern_det_intr(uart_port_t uart_num);
+
+#if CONFIG_IDF_TARGET_ESP32
+/**
+ * @brief UART enable pattern detect function.
+ *        Designed for applications like 'AT commands'.
+ *        When the hardware detect a series of one same character, the interrupt will be triggered.
+ * @note  This function only works for esp32. And this function is deprecated, please use
+ *        uart_enable_pattern_det_baud_intr instead.
+ *
+ * @param uart_num UART port number.
+ * @param pattern_chr character of the pattern.
+ * @param chr_num number of the character, 8bit value.
+ * @param chr_tout timeout of the interval between each pattern characters, 24bit value, unit is APB (80Mhz) clock cycle.
+ *        When the duration is less than this value, it will not take this data as at_cmd char.
+ * @param post_idle idle time after the last pattern character, 24bit value, unit is APB (80Mhz) clock cycle.
+ *        When the duration is less than this value, it will not take the previous data as the last at_cmd char
+ * @param pre_idle idle time before the first pattern character, 24bit value, unit is APB (80Mhz) clock cycle.
+ *        When the duration is less than this value, it will not take this data as the first at_cmd char.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_enable_pattern_det_intr(uart_port_t uart_num, char pattern_chr, uint8_t chr_num, int chr_tout, int post_idle, int pre_idle) __attribute__((deprecated));
+#endif
+
+/**
+ * @brief UART enable pattern detect function.
+ *        Designed for applications like 'AT commands'.
+ *        When the hardware detect a series of one same character, the interrupt will be triggered.
+ *
+ * @param uart_num UART port number.
+ * @param pattern_chr character of the pattern.
+ * @param chr_num number of the character, 8bit value.
+ * @param chr_tout timeout of the interval between each pattern characters, 16bit value, unit is the baud-rate cycle you configured.
+ *        When the duration is more than this value, it will not take this data as at_cmd char.
+ * @param post_idle idle time after the last pattern character, 16bit value, unit is the baud-rate cycle you configured.
+ *        When the duration is less than this value, it will not take the previous data as the last at_cmd char
+ * @param pre_idle idle time before the first pattern character, 16bit value, unit is the baud-rate cycle you configured.
+ *        When the duration is less than this value, it will not take this data as the first at_cmd char.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t uart_enable_pattern_det_baud_intr(uart_port_t uart_num, char pattern_chr, uint8_t chr_num, int chr_tout, int post_idle, int pre_idle);
+
+/**
+ * @brief Return the nearest detected pattern position in buffer.
+ *        The positions of the detected pattern are saved in a queue,
+ *        this function will dequeue the first pattern position and move the pointer to next pattern position.
+ * @note  If the RX buffer is full and flow control is not enabled,
+ *        the detected pattern may not be found in the rx buffer due to overflow.
+ *
+ *        The following APIs will modify the pattern position info:
+ *        uart_flush_input, uart_read_bytes, uart_driver_delete, uart_pop_pattern_pos
+ *        It is the application's responsibility to ensure atomic access to the pattern queue and the rx data buffer
+ *        when using pattern detect feature.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @return
+ *     - (-1) No pattern found for current index or parameter error
+ *     - others the pattern position in rx buffer.
+ */
+int uart_pattern_pop_pos(uart_port_t uart_num);
+
+/**
+ * @brief Return the nearest detected pattern position in buffer.
+ *        The positions of the detected pattern are saved in a queue,
+ *        This function do nothing to the queue.
+ * @note  If the RX buffer is full and flow control is not enabled,
+ *        the detected pattern may not be found in the rx buffer due to overflow.
+ *
+ *        The following APIs will modify the pattern position info:
+ *        uart_flush_input, uart_read_bytes, uart_driver_delete, uart_pop_pattern_pos
+ *        It is the application's responsibility to ensure atomic access to the pattern queue and the rx data buffer
+ *        when using pattern detect feature.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @return
+ *     - (-1) No pattern found for current index or parameter error
+ *     - others the pattern position in rx buffer.
+ */
+int uart_pattern_get_pos(uart_port_t uart_num);
+
+/**
+ * @brief Allocate a new memory with the given length to save record the detected pattern position in rx buffer.
+ *
+ * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ * @param queue_length Max queue length for the detected pattern.
+ *        If the queue length is not large enough, some pattern positions might be lost.
+ *        Set this value to the maximum number of patterns that could be saved in data buffer at the same time.
+ * @return
+ *     - ESP_ERR_NO_MEM No enough memory
+ *     - ESP_ERR_INVALID_STATE Driver not installed
+ *     - ESP_FAIL Parameter error
+ *     - ESP_OK Success
+ */
+esp_err_t uart_pattern_queue_reset(uart_port_t uart_num, int queue_length);
+
+/**
+ * @brief UART set communication mode
+ *
+ * @note  This function must be executed after uart_driver_install(), when the driver object is initialized.
+ * @param uart_num     Uart number to configure, the max port number is (UART_NUM_MAX -1).
+ * @param mode UART    UART mode to set
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t uart_set_mode(uart_port_t uart_num, uart_mode_t mode);
+
+/**
+ * @brief Set uart threshold value for RX fifo full
+ * @note If application is using higher baudrate and it is observed that bytes
+ *       in hardware RX fifo are overwritten then this threshold can be reduced
+ *
+ * @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
+ * @param threshold Threshold value above which RX fifo full interrupt is generated
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_INVALID_STATE Driver is not installed
+ */
+esp_err_t uart_set_rx_full_threshold(uart_port_t uart_num, int threshold);
+
+/**
+ * @brief Set uart threshold values for TX fifo empty
+ *
+ * @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
+ * @param threshold Threshold value below which TX fifo empty interrupt is generated
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_INVALID_STATE Driver is not installed
+ */
+esp_err_t uart_set_tx_empty_threshold(uart_port_t uart_num, int threshold);
+
+/**
+ * @brief UART set threshold timeout for TOUT feature
+ *
+ * @param uart_num     Uart number to configure, the max port number is (UART_NUM_MAX -1).
+ * @param tout_thresh  This parameter defines timeout threshold in uart symbol periods. The maximum value of threshold is 126.
+ *        tout_thresh = 1, defines TOUT interrupt timeout equal to transmission time of one symbol (~11 bit) on current baudrate.
+ *        If the time is expired the UART_RXFIFO_TOUT_INT interrupt is triggered. If tout_thresh == 0,
+ *        the TOUT feature is disabled.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_INVALID_STATE Driver is not installed
+ */
+esp_err_t uart_set_rx_timeout(uart_port_t uart_num, const uint8_t tout_thresh);
+
+/**
+ * @brief Returns collision detection flag for RS485 mode
+ *        Function returns the collision detection flag into variable pointed by collision_flag.
+ *        *collision_flag = true, if collision detected else it is equal to false.
+ *        This function should be executed when actual transmission is completed (after uart_write_bytes()).
+ *
+ * @param uart_num  Uart number to configure the max port number is (UART_NUM_MAX -1).
+ * @param collision_flag Pointer to variable of type bool to return collision flag.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t uart_get_collision_flag(uart_port_t uart_num, bool* collision_flag);
+
+/**
+ * @brief Set the number of RX pin signal edges for light sleep wakeup
+ *
+ * UART can be used to wake up the system from light sleep. This feature works
+ * by counting the number of positive edges on RX pin and comparing the count to
+ * the threshold. When the count exceeds the threshold, system is woken up from
+ * light sleep. This function allows setting the threshold value.
+ *
+ * Stop bit and parity bits (if enabled) also contribute to the number of edges.
+ * For example, letter 'a' with ASCII code 97 is encoded as 0100001101 on the wire
+ * (with 8n1 configuration), start and stop bits included. This sequence has 3
+ * positive edges (transitions from 0 to 1). Therefore, to wake up the system
+ * when 'a' is sent, set wakeup_threshold=3.
+ *
+ * The character that triggers wakeup is not received by UART (i.e. it can not
+ * be obtained from UART FIFO). Depending on the baud rate, a few characters
+ * after that will also not be received. Note that when the chip enters and exits
+ * light sleep mode, APB frequency will be changing. To make sure that UART has
+ * correct baud rate all the time, select REF_TICK as UART clock source,
+ * by setting use_ref_tick field in uart_config_t to true.
+ *
+ * @note in ESP32, the wakeup signal can only be input via IO_MUX (i.e.
+ *       GPIO3 should be configured as function_1 to wake up UART0,
+ *       GPIO9 should be configured as function_5 to wake up UART1), UART2
+ *       does not support light sleep wakeup feature.
+ *
+ * @param uart_num  UART number, the max port number is (UART_NUM_MAX -1).
+ * @param wakeup_threshold  number of RX edges for light sleep wakeup, value is 3 .. 0x3ff.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if uart_num is incorrect or wakeup_threshold is
+ *        outside of [3, 0x3ff] range.
+ */
+esp_err_t uart_set_wakeup_threshold(uart_port_t uart_num, int wakeup_threshold);
+
+/**
+ * @brief Get the number of RX pin signal edges for light sleep wakeup.
+ *
+ * See description of uart_set_wakeup_threshold for the explanation of UART
+ * wakeup feature.
+ *
+ * @param uart_num  UART number, the max port number is (UART_NUM_MAX -1).
+ * @param[out] out_wakeup_threshold  output, set to the current value of wakeup
+ *                                   threshold for the given UART.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if out_wakeup_threshold is NULL
+ */
+esp_err_t uart_get_wakeup_threshold(uart_port_t uart_num, int* out_wakeup_threshold);
+
+/**
+  * @brief Wait until UART tx memory empty and the last char send ok (polling mode).
+  *
+  * @param uart_num UART number
+  *
+  * * @return
+  *      - ESP_OK on success
+  *      - ESP_ERR_INVALID_ARG Parameter error
+  *      - ESP_FAIL Driver not installed
+  */
+esp_err_t uart_wait_tx_idle_polling(uart_port_t uart_num);
+
+/**
+  * @brief Configure TX signal loop back to RX module, just for the test usage.
+  *
+  * @param uart_num UART number
+  * @param loop_back_en Set ture to enable the loop back function, else set it false.
+  *
+  * * @return
+  *      - ESP_OK on success
+  *      - ESP_ERR_INVALID_ARG Parameter error
+  *      - ESP_FAIL Driver not installed
+  */
+esp_err_t uart_set_loop_back(uart_port_t uart_num, bool loop_back_en);
+
+/**
+  * @brief Configure behavior of UART RX timeout interrupt.
+  *
+  * When always_rx_timeout is true, timeout interrupt is triggered even if FIFO is full.
+  * This function can cause extra timeout interrupts triggered only to send the timeout event.
+  * Call this function only if you want to ensure timeout interrupt will always happen after a byte stream.
+  *
+  * @param uart_num UART number
+  * @param always_rx_timeout_en Set to false enable the default behavior of timeout interrupt,
+  *                             set it to true to always trigger timeout interrupt.
+  *
+  */
+void uart_set_always_rx_timeout(uart_port_t uart_num, bool always_rx_timeout_en);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/uart_select.h b/tools/sdk/esp32s3/include/driver/include/driver/uart_select.h
new file mode 100644
index 00000000000..578f8c9d901
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/uart_select.h
@@ -0,0 +1,41 @@
+
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _UART_SELECT_H_
+#define _UART_SELECT_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "driver/uart.h"
+
+typedef enum {
+    UART_SELECT_READ_NOTIF,
+    UART_SELECT_WRITE_NOTIF,
+    UART_SELECT_ERROR_NOTIF,
+} uart_select_notif_t;
+
+typedef void (*uart_select_notif_callback_t)(uart_port_t uart_num, uart_select_notif_t uart_select_notif, BaseType_t *task_woken);
+
+/**
+ * @brief Set notification callback function for select() events
+ * @param uart_num UART port number
+ * @param uart_select_notif_callback callback function
+ */
+void uart_set_select_notif_callback(uart_port_t uart_num, uart_select_notif_callback_t uart_select_notif_callback);
+
+/**
+ * @brief Get mutex guarding select() notifications
+ */
+portMUX_TYPE *uart_get_selectlock(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_UART_SELECT_H_
diff --git a/tools/sdk/esp32s3/include/driver/include/driver/usb_serial_jtag.h b/tools/sdk/esp32s3/include/driver/include/driver/usb_serial_jtag.h
new file mode 100644
index 00000000000..e9c253b0a52
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/driver/usb_serial_jtag.h
@@ -0,0 +1,93 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_err.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/semphr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configuration structure for the usb-serial-jtag-driver. Can be expanded in the future
+ *
+ * @note  tx_buffer_size and rx_buffer_size must be > 0
+ */
+typedef struct {
+    uint32_t tx_buffer_size;                    /* Size of the buffer (in bytes) for the TX direction */
+    uint32_t rx_buffer_size;                    /* Size of the buffer (in bytes) for the RX direction */
+} usb_serial_jtag_driver_config_t;
+
+#define USB_SERIAL_JTAG_DRIVER_CONFIG_DEFAULT() (usb_serial_jtag_driver_config_t) {\
+    .rx_buffer_size = 256,\
+    .tx_buffer_size = 256,\
+}
+
+/**
+ * @brief Install USB-SERIAL-JTAG driver and set the USB-SERIAL-JTAG to the default configuration.
+ *
+ * USB-SERIAL-JTAG driver's ISR will be attached to the same CPU core that calls this function. Thus, users
+ * should ensure that the same core is used when calling `usb_serial_jtag_driver_uninstall()`.
+ *
+ * @note  Blocking mode will result in usb_serial_jtag_write_bytes() blocking until all bytes have been written to the TX FIFO.
+ *
+ * @param usb_serial_jtag_driver_config_t Configuration for usb_serial_jtag driver.
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_FAIL Failed for some reason.
+ */
+esp_err_t usb_serial_jtag_driver_install(usb_serial_jtag_driver_config_t *usb_serial_jtag_config);
+
+/**
+ * @brief USB_SERIAL_JTAG read bytes from USB_SERIAL_JTAG buffer
+ *
+ * @param buf     pointer to the buffer.
+ * @param length  data length
+ * @param ticks_to_wait Timeout in RTOS ticks
+ *
+ * @return
+ *     - The number of bytes read from USB_SERIAL FIFO
+ */
+int usb_serial_jtag_read_bytes(void* buf, uint32_t length, TickType_t ticks_to_wait);
+
+/**
+ * @brief Send data to the USB-UART port from a given buffer and length,
+ *
+ * Please ensure the `tx_buffer_size is larger than 0`, if the 'tx_buffer_size' > 0, this function will return after copying all the data to tx ring buffer,
+ * USB_SERIAL_JTAG ISR will then move data from the ring buffer to TX FIFO gradually.
+ *
+ * @param src   data buffer address
+ * @param size  data length to send
+ * @param ticks_to_wait Timeout in RTOS ticks
+ *
+ * @return
+ *     - The number of bytes pushed to the TX FIFO
+ */
+int usb_serial_jtag_write_bytes(const void* src, size_t size, TickType_t ticks_to_wait);
+
+/**
+ * @brief Uninstall USB-SERIAL-JTAG driver.
+ *
+ * @return
+ *     - ESP_OK   Success
+ */
+esp_err_t usb_serial_jtag_driver_uninstall(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/esp_private/adc_cali.h b/tools/sdk/esp32s3/include/driver/include/esp_private/adc_cali.h
new file mode 100644
index 00000000000..9c8a58d6d88
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/esp_private/adc_cali.h
@@ -0,0 +1,33 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// Internal header for calibration, don't use in app
+
+#include "sdkconfig.h"
+#include "esp_err.h"
+#include "hal/adc_hal.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !CONFIG_IDF_TARGET_ESP32
+
+/**
+ * @brief Calibrate the offset of ADC. (Based on the pre-stored efuse or actual calibration)
+ *
+ * @param adc_n ADC unit to calibrate
+ * @param channel Target channel if really do calibration
+ * @param atten Attenuation to use
+ * @return Always ESP_OK
+ */
+extern esp_err_t adc_cal_offset(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten);
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/esp_private/gdma.h b/tools/sdk/esp32s3/include/driver/include/esp_private/gdma.h
new file mode 100644
index 00000000000..88a45b56cfe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/esp_private/gdma.h
@@ -0,0 +1,318 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// DO NOT USE THESE APIS IN ANY APPLICATIONS
+// GDMA driver is not public for end users, but for ESP-IDF developpers.
+
+#pragma once
+
+#include <stdbool.h>
+#include "soc/gdma_channel.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Type of GDMA channel handle
+ *
+ */
+typedef struct gdma_channel_t *gdma_channel_handle_t;
+
+/**
+ * @brief Enumeration of peripherals which have the DMA capability
+ * @note Some peripheral might not be available on certain chip, please refer to `soc_caps.h` for detail.
+ *
+ */
+typedef enum {
+    GDMA_TRIG_PERIPH_M2M,  /*!< GDMA trigger peripheral: M2M */
+    GDMA_TRIG_PERIPH_UART, /*!< GDMA trigger peripheral: UART */
+    GDMA_TRIG_PERIPH_SPI,  /*!< GDMA trigger peripheral: SPI */
+    GDMA_TRIG_PERIPH_I2S,  /*!< GDMA trigger peripheral: I2S */
+    GDMA_TRIG_PERIPH_AES,  /*!< GDMA trigger peripheral: AES */
+    GDMA_TRIG_PERIPH_SHA,  /*!< GDMA trigger peripheral: SHA */
+    GDMA_TRIG_PERIPH_ADC,  /*!< GDMA trigger peripheral: ADC */
+    GDMA_TRIG_PERIPH_DAC,  /*!< GDMA trigger peripheral: DAC */
+    GDMA_TRIG_PERIPH_LCD,  /*!< GDMA trigger peripheral: LCD */
+    GDMA_TRIG_PERIPH_CAM,  /*!< GDMA trigger peripheral: CAM */
+    GDMA_TRIG_PERIPH_RMT,  /*!< GDMA trigger peripheral: RMT */
+} gdma_trigger_peripheral_t;
+
+/**
+ * @brief Enumeration of GDMA channel direction
+ *
+ */
+typedef enum {
+    GDMA_CHANNEL_DIRECTION_TX, /*!< GDMA channel direction: TX */
+    GDMA_CHANNEL_DIRECTION_RX, /*!< GDMA channel direction: RX */
+} gdma_channel_direction_t;
+
+/**
+ * @brief Collection of configuration items that used for allocating GDMA channel
+ *
+ */
+typedef struct {
+    gdma_channel_handle_t sibling_chan; /*!< DMA sibling channel handle (NULL means having sibling is not necessary) */
+    gdma_channel_direction_t direction; /*!< DMA channel direction */
+    struct {
+        int reserve_sibling: 1; /*!< If set, DMA channel allocator would prefer to allocate new channel in a new pair, and reserve sibling channel for future use */
+    } flags;
+} gdma_channel_alloc_config_t;
+
+/**
+ * @brief GDMA transfer ability
+ *
+ * @note The alignment set in this structure is **not** a guarantee that gdma driver will take care of the nonalignment cases.
+ *       Actually the GDMA driver has no knowledge about the DMA buffer (address and size) used by upper layer.
+ *       So it's the responsibility of the **upper layer** to take care of the buffer address and size.
+ *
+ */
+typedef struct {
+    size_t sram_trans_align;  /*!< DMA transfer alignment for memory in SRAM, in bytes. The driver enables/disables burst mode based on this value. 0 means no alignment is required */
+    size_t psram_trans_align; /*!< DMA transfer alignment for memory in PSRAM, in bytes. The driver sets proper burst block size based on the alignment value. 0 means no alignment is required */
+} gdma_transfer_ability_t;
+
+/**
+ * @brief Type of GDMA event data
+ *
+ */
+typedef struct {
+    union {
+        intptr_t rx_eof_desc_addr; /*!< EOF descriptor address of RX channel */
+        intptr_t tx_eof_desc_addr; /*!< EOF descriptor address of TX channel */
+    };
+} gdma_event_data_t;
+
+/**
+ * @brief Type of GDMA event callback
+ * @param dma_chan GDMA channel handle, created from `gdma_new_channel`
+ * @param event_data GDMA event data
+ * @param user_data User registered data from `gdma_register_tx_event_callbacks` or `gdma_register_rx_event_callbacks`
+ *
+ * @return Whether a task switch is needed after the callback function returns,
+ *         this is usually due to the callback wakes up some high priority task.
+ *
+ */
+typedef bool (*gdma_event_callback_t)(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data);
+
+/**
+ * @brief Group of supported GDMA TX callbacks
+ * @note The callbacks are all running under ISR environment
+ *
+ */
+typedef struct {
+    gdma_event_callback_t on_trans_eof; /*!< Invoked when TX engine meets EOF descriptor */
+} gdma_tx_event_callbacks_t;
+
+/**
+ * @brief Group of supported GDMA RX callbacks
+ * @note The callbacks are all running under ISR environment
+ *
+ */
+typedef struct {
+    gdma_event_callback_t on_recv_eof; /*!< Invoked when RX engine meets EOF descriptor */
+} gdma_rx_event_callbacks_t;
+
+/**
+ * @brief Type of GDMA engine trigger
+ * @note It's recommended to initialize this structure with `GDMA_MAKE_TRIGGER`.
+ *
+ */
+typedef struct {
+    gdma_trigger_peripheral_t periph; /*!< Target peripheral which will trigger DMA operations */
+    int instance_id;                  /*!< Peripheral instance ID. Supported IDs are listed in `soc/gdma_channel.h`, e.g. SOC_GDMA_TRIG_PERIPH_UART0 */
+} gdma_trigger_t;
+
+/**
+ * @brief Helper macro to initialize GDMA trigger
+ * @note value of `peri` must be selected from `gdma_trigger_peripheral_t` enum.
+ *       e.g. GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_UART,0)
+ *
+ */
+#define GDMA_MAKE_TRIGGER(peri, id) \
+    (gdma_trigger_t) { .periph = peri, .instance_id = SOC_##peri##id }
+
+/**
+ * @brief A collection of strategy item that each GDMA channel could apply
+ *
+ */
+typedef struct {
+    bool owner_check;      /*!< If set / clear, DMA channel enables / disables checking owner validity */
+    bool auto_update_desc; /*!< If set / clear, DMA channel enables / disables hardware to update descriptor automatically (TX channel only) */
+} gdma_strategy_config_t;
+
+/**
+ * @brief Create GDMA channel
+ * @note This API won't install interrupt service for the allocated channel.
+ *       If interrupt service is needed, user has to register GDMA event callback by `gdma_register_tx_event_callbacks` or `gdma_register_rx_event_callbacks`.
+ *
+ * @param[in] config Pointer to a collection of configurations for allocating GDMA channel
+ * @param[out] ret_chan Returnned channel handle
+ * @return
+ *      - ESP_OK: Create DMA channel successfully
+ *      - ESP_ERR_INVALID_ARG: Create DMA channel failed because of invalid argument
+ *      - ESP_ERR_NO_MEM: Create DMA channel failed because out of memory
+ *      - ESP_FAIL: Create DMA channel failed because of other error
+ */
+esp_err_t gdma_new_channel(const gdma_channel_alloc_config_t *config, gdma_channel_handle_t *ret_chan);
+
+/**
+ * @brief Connect GDMA channel to trigger peripheral
+ *
+ * @note Suggest to use helper macro `GDMA_MAKE_TRIGGER` to construct parameter `trig_periph`. e.g. GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SHA,0)
+ * @note Connecting to a peripheral will also reset the DMA FIFO and FSM automatically
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @param[in] trig_periph GDMA trigger peripheral
+ * @return
+ *      - ESP_OK: Connect GDMA channel successfully
+ *      - ESP_ERR_INVALID_ARG: Connect GDMA channel failed because of invalid argument
+ *      - ESP_ERR_INVALID_STATE: Connect GDMA channel failed because DMA channel is working with another peripheral
+ *      - ESP_FAIL: Connect GDMA channel failed because of other error
+ */
+esp_err_t gdma_connect(gdma_channel_handle_t dma_chan, gdma_trigger_t trig_periph);
+
+/**
+ * @brief Disconnect GMA channel from peripheral
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @return
+ *      - ESP_OK: Disconnect GDMA channel successfully
+ *      - ESP_ERR_INVALID_ARG: Disconnect GDMA channel failed because of invalid argument
+ *      - ESP_ERR_INVALID_STATE: Disconnect GDMA channel failed because DMA channel is not connected to any peripheral
+ *      - ESP_FAIL: Disconnect DMA channel failed because of other error
+ */
+esp_err_t gdma_disconnect(gdma_channel_handle_t dma_chan);
+
+/**
+ * @brief Set DMA channel transfer ability
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @param[in] ability Transfer ability, e.g. alignment
+ * @return
+ *      - ESP_OK: Set DMA channel transfer ability successfully
+ *      - ESP_ERR_INVALID_ARG: Set DMA channel transfer ability failed because of invalid argument
+ *      - ESP_FAIL: Set DMA channel transfer ability failed because of other error
+ */
+esp_err_t gdma_set_transfer_ability(gdma_channel_handle_t dma_chan, const gdma_transfer_ability_t *ability);
+
+/**
+ * @brief Apply channel strategy for GDMA channel
+ *
+ * @param dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @param config Configuration of GDMA channel strategy
+ *      - ESP_OK: Apply channel strategy successfully
+ *      - ESP_ERR_INVALID_ARG: Apply channel strategy failed because of invalid argument
+ *      - ESP_FAIL: Apply channel strategy failed because of other error
+ */
+esp_err_t gdma_apply_strategy(gdma_channel_handle_t dma_chan, const gdma_strategy_config_t *config);
+
+/**
+ * @brief Delete GDMA channel
+ * @note If you call `gdma_new_channel` several times for a same peripheral, make sure you call this API the same times.
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @return
+ *      - ESP_OK: Delete GDMA channel successfully
+ *      - ESP_ERR_INVALID_ARG: Delete GDMA channel failed because of invalid argument
+ *      - ESP_FAIL: Delete GDMA channel failed because of other error
+ */
+esp_err_t gdma_del_channel(gdma_channel_handle_t dma_chan);
+
+/**
+ * @brief Get the channel ID
+ *
+ * @note This API breaks the encapsulation of GDMA Channel Object.
+ *       With the returned channel ID, you can even bypass all other GDMA driver API and access Low Level API directly.
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @param[out] channel_id Returned channel ID
+ * @return
+ *      - ESP_OK: Get GDMA channel ID successfully
+ *      - ESP_ERR_INVALID_ARG: Get GDMA channel ID failed because of invalid argument
+ *      - ESP_FAIL: Get GDMA channel ID failed because of other error
+ */
+esp_err_t gdma_get_channel_id(gdma_channel_handle_t dma_chan, int *channel_id);
+
+/**
+ * @brief Set GDMA event callbacks for TX channel
+ * @note This API will install GDMA interrupt service for the channel internally
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @param[in] cbs Group of callback functions
+ * @param[in] user_data User data, which will be passed to callback functions directly
+ * @return
+ *      - ESP_OK: Set event callbacks successfully
+ *      - ESP_ERR_INVALID_ARG: Set event callbacks failed because of invalid argument
+ *      - ESP_FAIL: Set event callbacks failed because of other error
+ */
+esp_err_t gdma_register_tx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_tx_event_callbacks_t *cbs, void *user_data);
+
+/**
+ * @brief Set GDMA event callbacks for RX channel
+ * @note This API will install GDMA interrupt service for the channel internally
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @param[in] cbs Group of callback functions
+ * @param[in] user_data User data, which will be passed to callback functions directly
+ * @return
+ *      - ESP_OK: Set event callbacks successfully
+ *      - ESP_ERR_INVALID_ARG: Set event callbacks failed because of invalid argument
+ *      - ESP_FAIL: Set event callbacks failed because of other error
+ */
+esp_err_t gdma_register_rx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_rx_event_callbacks_t *cbs, void *user_data);
+
+/**
+ * @brief Set DMA descriptor address and start engine
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @param[in] desc_base_addr Base address of descriptors (usually the descriptors are chained into a link or ring)
+ * @return
+ *      - ESP_OK: Start DMA engine successfully
+ *      - ESP_ERR_INVALID_ARG: Start DMA engine failed because of invalid argument
+ *      - ESP_FAIL: Start DMA engine failed because of other error
+ */
+esp_err_t gdma_start(gdma_channel_handle_t dma_chan, intptr_t desc_base_addr);
+
+/**
+ * @brief Stop DMA engine
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @return
+ *      - ESP_OK: Stop DMA engine successfully
+ *      - ESP_ERR_INVALID_ARG: Stop DMA engine failed because of invalid argument
+ *      - ESP_FAIL: Stop DMA engine failed because of other error
+ */
+esp_err_t gdma_stop(gdma_channel_handle_t dma_chan);
+
+/**
+ * @brief Make the appended descriptors be aware to the DMA engine
+ * @note This API could also resume a paused DMA engine, make sure new descriptors have been appended to the descriptor chain before calling it.
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @return
+ *      - ESP_OK: Send append command to DMA engine successfully
+ *      - ESP_ERR_INVALID_ARG: Send append command to DMA engine failed because of invalid argument
+ *      - ESP_FAIL: Send append command to DMA engine failed because of other error
+ */
+esp_err_t gdma_append(gdma_channel_handle_t dma_chan);
+
+/**
+ * @brief Reset DMA channel FIFO and internal finite state machine
+ * @note Resetting a DMA channel won't break the connection with the target peripheral
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @return
+ *      - ESP_OK: DMA channel reset successfully
+ *      - ESP_ERR_INVALID_ARG: DMA channel reset failed due to invalid arguments
+ *      - ESP_FAIL: DMA channel reset failed due to other errors
+ */
+esp_err_t gdma_reset(gdma_channel_handle_t dma_chan);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/esp_private/gpio.h b/tools/sdk/esp32s3/include/driver/include/esp_private/gpio.h
new file mode 100644
index 00000000000..c4227dc8c4f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/esp_private/gpio.h
@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+#include <esp_types.h>
+
+#include "soc/soc_caps.h"
+#include "driver/gpio.h"
+
+#if SOC_GPIO_SUPPORT_SLP_SWITCH
+#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
+/**
+  * @brief Emulate ESP32S2 behaviour to backup FUN_PU, FUN_PD information
+  *
+  * @note Need to be called before sleep.
+  *
+  * @return
+  *      - ESP_OK Success
+  */
+esp_err_t gpio_sleep_pupd_config_apply(gpio_num_t gpio_num);
+
+/**
+  * @brief Emulate ESP32S2 behaviour to restore FUN_PU, FUN_PD information
+  *
+  * @note Need to be called after sleep.
+  *
+  * @return
+  *      - ESP_OK Success
+  */
+esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num);
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/driver/include/esp_private/i2s_platform.h b/tools/sdk/esp32s3/include/driver/include/esp_private/i2s_platform.h
new file mode 100644
index 00000000000..ff1ebdf17a6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/driver/include/esp_private/i2s_platform.h
@@ -0,0 +1,48 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// DO NOT USE THESE APIS IN YOUR APPLICATIONS
+// The following APIs are for internal use, public to other IDF components, but not for users' applications.
+
+#pragma once
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Register an I2S or I2S variant driver object to platform
+ *
+ * @note This private API is used to avoid applications from using the same I2S instance for different purpose.
+ * @note This function will help enable the peripheral APB clock as well.
+ *
+ * @param driver_obj Driver object
+ * @param port_id I2S port number
+ * @return
+ *      - ESP_OK: The specific I2S port is free and register the new device object successfully
+ *      - ESP_ERR_INVALID_ARG: Invalid argument, e.g. wrong port_id
+ *      - ESP_ERR_NOT_FOUND: Specific I2S port is not available
+ */
+esp_err_t i2s_priv_register_object(void *driver_obj, int port_id);
+
+/**
+ * @brief Deregister I2S or I2S variant driver object from platform
+ *
+ * @note This function will help disable the peripheral APB clock as well.
+ *
+ * @param port_id I2S port number
+ * @return
+ *      - ESP_OK: Deregister I2S port successfully (i.e. that I2S port can used used by other users after this function returns)
+ *      - ESP_ERR_INVALID_ARG: Invalid argument, e.g. wrong port_id
+ *      - ESP_ERR_INVALID_STATE: Specific I2S port is free already
+ */
+esp_err_t i2s_priv_deregister_object(int port_id);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/efuse/esp32s3/include/esp_efuse.h b/tools/sdk/esp32s3/include/efuse/esp32s3/include/esp_efuse.h
new file mode 100644
index 00000000000..e3e7e1f8c05
--- /dev/null
+++ b/tools/sdk/esp32s3/include/efuse/esp32s3/include/esp_efuse.h
@@ -0,0 +1,81 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Type of eFuse blocks ESP32S3
+ */
+typedef enum {
+    EFUSE_BLK0                 = 0,   /**< Number of eFuse BLOCK0. REPEAT_DATA */
+
+    EFUSE_BLK1                 = 1,   /**< Number of eFuse BLOCK1. MAC_SPI_8M_SYS */
+
+    EFUSE_BLK2                 = 2,   /**< Number of eFuse BLOCK2. SYS_DATA_PART1 */
+    EFUSE_BLK_SYS_DATA_PART1   = 2,   /**< Number of eFuse BLOCK2. SYS_DATA_PART1 */
+
+    EFUSE_BLK3                 = 3,   /**< Number of eFuse BLOCK3. USER_DATA*/
+    EFUSE_BLK_USER_DATA        = 3,   /**< Number of eFuse BLOCK3. USER_DATA*/
+
+    EFUSE_BLK4                 = 4,   /**< Number of eFuse BLOCK4. KEY0 */
+    EFUSE_BLK_KEY0             = 4,   /**< Number of eFuse BLOCK4. KEY0 */
+
+    EFUSE_BLK5                 = 5,   /**< Number of eFuse BLOCK5. KEY1 */
+    EFUSE_BLK_KEY1             = 5,   /**< Number of eFuse BLOCK5. KEY1 */
+
+    EFUSE_BLK6                 = 6,   /**< Number of eFuse BLOCK6. KEY2 */
+    EFUSE_BLK_KEY2             = 6,   /**< Number of eFuse BLOCK6. KEY2 */
+
+    EFUSE_BLK7                 = 7,   /**< Number of eFuse BLOCK7. KEY3 */
+    EFUSE_BLK_KEY3             = 7,   /**< Number of eFuse BLOCK7. KEY3 */
+
+    EFUSE_BLK8                 = 8,   /**< Number of eFuse BLOCK8. KEY4 */
+    EFUSE_BLK_KEY4             = 8,   /**< Number of eFuse BLOCK8. KEY4 */
+
+    EFUSE_BLK9                 = 9,   /**< Number of eFuse BLOCK9. KEY5 */
+    EFUSE_BLK_KEY5             = 9,   /**< Number of eFuse BLOCK9. KEY5 */
+    EFUSE_BLK_KEY_MAX          = 10,
+
+    EFUSE_BLK10                = 10,  /**< Number of eFuse BLOCK10. SYS_DATA_PART2 */
+    EFUSE_BLK_SYS_DATA_PART2   = 10,  /**< Number of eFuse BLOCK10. SYS_DATA_PART2 */
+
+    EFUSE_BLK_MAX
+} esp_efuse_block_t;
+
+/**
+ * @brief Type of coding scheme
+ */
+typedef enum {
+    EFUSE_CODING_SCHEME_NONE    = 0,    /**< None */
+    EFUSE_CODING_SCHEME_RS      = 3,    /**< Reed-Solomon coding */
+} esp_efuse_coding_scheme_t;
+
+/**
+ * @brief Type of key purpose
+ */
+typedef enum {
+    ESP_EFUSE_KEY_PURPOSE_USER = 0,                             /**< User purposes (software-only use) */
+    ESP_EFUSE_KEY_PURPOSE_RESERVED = 1,                         /**< Reserved */
+    ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 = 2,                /**< XTS_AES_256_KEY_1 (flash/PSRAM encryption) */
+    ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 = 3,                /**< XTS_AES_256_KEY_2 (flash/PSRAM encryption) */
+    ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,                  /**< XTS_AES_128_KEY (flash/PSRAM encryption) */
+    ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,                    /**< HMAC Downstream mode */
+    ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,                   /**< JTAG soft enable key (uses HMAC Downstream mode) */
+    ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,      /**< Digital Signature peripheral key (uses HMAC Downstream mode) */
+    ESP_EFUSE_KEY_PURPOSE_HMAC_UP = 8,                          /**< HMAC Upstream mode */
+    ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,              /**< SECURE_BOOT_DIGEST0 (Secure Boot key digest) */
+    ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,             /**< SECURE_BOOT_DIGEST1 (Secure Boot key digest) */
+    ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,             /**< SECURE_BOOT_DIGEST2 (Secure Boot key digest) */
+    ESP_EFUSE_KEY_PURPOSE_MAX,                                  /**< MAX PURPOSE */
+} esp_efuse_purpose_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/efuse/esp32s3/include/esp_efuse_rtc_calib.h b/tools/sdk/esp32s3/include/efuse/esp32s3/include/esp_efuse_rtc_calib.h
new file mode 100644
index 00000000000..e2f5b54329a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/efuse/esp32s3/include/esp_efuse_rtc_calib.h
@@ -0,0 +1,59 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <esp_types.h>
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//This is the ADC calibration value version burnt in efuse
+#define ESP_EFUSE_ADC_CALIB_VER     1
+
+/**
+ * @brief Get the RTC calibration efuse version
+ *
+ * @return Version of the stored efuse
+ */
+int esp_efuse_rtc_calib_get_ver(void);
+
+/**
+ * @brief Get the init code in the efuse, for the corresponding attenuation.
+ *
+ * @param version       Version of the stored efuse
+ * @param adc_unit      ADC unit
+ * @param atten         Attenuation of the init code
+ * @return The init code stored in efuse
+ */
+uint32_t esp_efuse_rtc_calib_get_init_code(int version, uint32_t adc_unit, int atten);
+
+/**
+ * @brief Get the calibration digits stored in the efuse, and the corresponding voltage.
+ *
+ * @param version       Version of the stored efuse
+ * @param adc_unit      ADC unit
+ * @param atten         Attenuation to use
+ * @param out_digi      Output buffer of the digits
+ * @param out_vol_mv    Output of the voltage, in mV
+ * @return
+ *      - ESP_ERR_INVALID_ARG: If efuse version or attenuation is invalid
+ *      - ESP_OK: if success
+ */
+esp_err_t esp_efuse_rtc_calib_get_cal_voltage(int version, uint32_t adc_unit, int atten, uint32_t* out_digi, uint32_t* out_vol_mv);
+
+/**
+ * @brief Get the temperature sensor calibration number delta_T stored in the efuse.
+ *
+ * @param version Version of the stored efuse
+ *
+ * @return The specification of temperature sensor calibration number in efuse.
+ */
+float esp_efuse_rtc_calib_get_cal_temp(int version);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/efuse/esp32s3/include/esp_efuse_table.h b/tools/sdk/esp32s3/include/efuse/esp32s3/include/esp_efuse_table.h
new file mode 100644
index 00000000000..3618ae3ddab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/efuse/esp32s3/include/esp_efuse_table.h
@@ -0,0 +1,150 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+// md5_digest_table 9444b887379d924049af42806ca71d45
+// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
+// If you want to change some fields, you need to change esp_efuse_table.csv file
+// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
+// To show efuse_table run the command 'show_efuse_table'.
+
+
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RD_DIS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0_PURPOSE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1_PURPOSE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2_PURPOSE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3_PURPOSE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4_PURPOSE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5_PURPOSE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USER_DATA[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USB_EXCHG_PINS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY3[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY4[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY5[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_SYS_DATA_PART2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DCACHE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_DCACHE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_APP_CPU[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[];
+extern const esp_efuse_desc_t* ESP_EFUSE_HARD_DIS_JTAG[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_USB_EXT_PHY_ENABLE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_BTLC_GPIO_ENABLE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_XPD[];
+extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_TIEH[];
+extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_FORCE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG[];
+extern const esp_efuse_desc_t* ESP_EFUSE_STRAP_JTAG_SEL[];
+extern const esp_efuse_desc_t* ESP_EFUSE_USB_PHY_SEL[];
+extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[];
+extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[];
+extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[];
+extern const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[];
+extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[];
+extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[];
+extern const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CLK[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_Q_D1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D_D0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_HD_D3[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_WP_D2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_DQS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D4[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D5[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D6[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION[];
+extern const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[];
+extern const esp_efuse_desc_t* ESP_EFUSE_BLK_VER_MINOR[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC2_CAL_VOL_ATTEN3[];
+extern const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[];
+extern const esp_efuse_desc_t* ESP_EFUSE_BLK_VER_MAJOR[];
+extern const esp_efuse_desc_t* ESP_EFUSE_TEMP_CALIB[];
+extern const esp_efuse_desc_t* ESP_EFUSE_OCODE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN3[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC2_INIT_CODE_ATTEN0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC2_INIT_CODE_ATTEN1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC2_INIT_CODE_ATTEN2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC2_INIT_CODE_ATTEN3[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN3[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC2_CAL_VOL_ATTEN0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC2_CAL_VOL_ATTEN1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ADC2_CAL_VOL_ATTEN2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[];
+extern const esp_efuse_desc_t* ESP_EFUSE_USER_DATA_MAC_CUSTOM[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY3[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY4[];
+extern const esp_efuse_desc_t* ESP_EFUSE_KEY5[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[];
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/efuse/include/esp_efuse.h b/tools/sdk/esp32s3/include/efuse/include/esp_efuse.h
new file mode 100644
index 00000000000..02300ccfa72
--- /dev/null
+++ b/tools/sdk/esp32s3/include/efuse/include/esp_efuse.h
@@ -0,0 +1,766 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "esp_err.h"
+#include "esp_log.h"
+#include "soc/soc_caps.h"
+#include "sdkconfig.h"
+#include_next "esp_efuse.h"
+
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/secure_boot.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/secure_boot.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/secure_boot.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/secure_boot.h"
+#elif CONFIG_IDF_TARGET_ESP32H2
+#include "esp32h2/rom/secure_boot.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_ERR_EFUSE                              0x1600                     /*!< Base error code for efuse api. */
+#define ESP_OK_EFUSE_CNT                          (ESP_ERR_EFUSE + 0x01)      /*!< OK the required number of bits is set. */
+#define ESP_ERR_EFUSE_CNT_IS_FULL                 (ESP_ERR_EFUSE + 0x02)      /*!< Error field is full. */
+#define ESP_ERR_EFUSE_REPEATED_PROG               (ESP_ERR_EFUSE + 0x03)      /*!< Error repeated programming of programmed bits is strictly forbidden. */
+#define ESP_ERR_CODING                            (ESP_ERR_EFUSE + 0x04)      /*!< Error while a encoding operation. */
+#define ESP_ERR_NOT_ENOUGH_UNUSED_KEY_BLOCKS      (ESP_ERR_EFUSE + 0x05)      /*!< Error not enough unused key blocks available */
+#define ESP_ERR_DAMAGED_READING                   (ESP_ERR_EFUSE + 0x06)      /*!< Error. Burn or reset was done during a reading operation leads to damage read data. This error is internal to the efuse component and not returned by any public API. */
+
+/**
+ * @brief Type definition for an eFuse field
+ */
+typedef struct {
+    esp_efuse_block_t   efuse_block: 8; /**< Block of eFuse */
+    uint8_t             bit_start;      /**< Start bit [0..255] */
+    uint16_t            bit_count;      /**< Length of bit field [1..-]*/
+} esp_efuse_desc_t;
+
+/**
+ * @brief Type definition for ROM log scheme
+ */
+typedef enum {
+    ESP_EFUSE_ROM_LOG_ALWAYS_ON,    /**< Always enable ROM logging */
+    ESP_EFUSE_ROM_LOG_ON_GPIO_LOW,  /**< ROM logging is enabled when specific GPIO level is low during start up */
+    ESP_EFUSE_ROM_LOG_ON_GPIO_HIGH, /**< ROM logging is enabled when specific GPIO level is high during start up */
+    ESP_EFUSE_ROM_LOG_ALWAYS_OFF    /**< Disable ROM logging permanently */
+} esp_efuse_rom_log_scheme_t;
+
+/**
+ * @brief   Reads bits from EFUSE field and writes it into an array.
+ *
+ * The number of read bits will be limited to the minimum value
+ * from the description of the bits in "field" structure or "dst_size_bits" required size.
+ * Use "esp_efuse_get_field_size()" function to determine the length of the field.
+ *
+ * @note Please note that reading in the batch mode does not show uncommitted changes.
+ *
+ * @param[in]  field          A pointer to the structure describing the fields of efuse.
+ * @param[out] dst            A pointer to array that will contain the result of reading.
+ * @param[in]  dst_size_bits  The number of bits required to read.
+ *                            If the requested number of bits is greater than the field,
+ *                            the number will be limited to the field size.
+ *
+ * @return
+ *    - ESP_OK: The operation was successfully completed.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ */
+esp_err_t esp_efuse_read_field_blob(const esp_efuse_desc_t* field[], void* dst, size_t dst_size_bits);
+
+
+/**
+ * @brief Read a single bit eFuse field as a boolean value.
+ *
+ * @note The value must exist and must be a single bit wide. If there is any possibility of an error
+ * in the provided arguments, call esp_efuse_read_field_blob() and check the returned value instead.
+ *
+ * @note If assertions are enabled and the parameter is invalid, execution will abort
+ * @note Please note that reading in the batch mode does not show uncommitted changes.
+ *
+ * @param[in]  field          A pointer to the structure describing the fields of efuse.
+ * @return
+ *    - true: The field parameter is valid and the bit is set.
+ *    - false: The bit is not set, or the parameter is invalid and assertions are disabled.
+ *
+ */
+bool esp_efuse_read_field_bit(const esp_efuse_desc_t *field[]);
+
+/**
+ * @brief   Reads bits from EFUSE field and returns number of bits programmed as "1".
+ *
+ * If the bits are set not sequentially, they will still be counted.
+ * @note Please note that reading in the batch mode does not show uncommitted changes.
+ *
+ * @param[in]  field          A pointer to the structure describing the fields of efuse.
+ * @param[out] out_cnt        A pointer that will contain the number of programmed as "1" bits.
+ *
+ * @return
+ *    - ESP_OK: The operation was successfully completed.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ */
+esp_err_t esp_efuse_read_field_cnt(const esp_efuse_desc_t* field[], size_t* out_cnt);
+
+/**
+ * @brief   Writes array to EFUSE field.
+ *
+ * The number of write bits will be limited to the minimum value
+ * from the description of the bits in "field" structure or "src_size_bits" required size.
+ * Use "esp_efuse_get_field_size()" function to determine the length of the field.
+ * After the function is completed, the writing registers are cleared.
+ * @param[in]  field          A pointer to the structure describing the fields of efuse.
+ * @param[in]  src            A pointer to array that contains the data for writing.
+ * @param[in]  src_size_bits  The number of bits required to write.
+ *
+ * @return
+ *    - ESP_OK: The operation was successfully completed.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits is strictly forbidden.
+ *    - ESP_ERR_CODING: Error range of data does not match the coding scheme.
+ */
+esp_err_t esp_efuse_write_field_blob(const esp_efuse_desc_t* field[], const void* src, size_t src_size_bits);
+
+/**
+ * @brief   Writes a required count of bits as "1" to EFUSE field.
+ *
+ * If there are no free bits in the field to set the required number of bits to "1",
+ * ESP_ERR_EFUSE_CNT_IS_FULL error is returned, the field will not be partially recorded.
+ * After the function is completed, the writing registers are cleared.
+ * @param[in]  field          A pointer to the structure describing the fields of efuse.
+ * @param[in]  cnt            Required number of programmed as "1" bits.
+ *
+ * @return
+ *    - ESP_OK: The operation was successfully completed.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_EFUSE_CNT_IS_FULL: Not all requested cnt bits is set.
+ */
+esp_err_t esp_efuse_write_field_cnt(const esp_efuse_desc_t* field[], size_t cnt);
+
+/**
+ * @brief Write a single bit eFuse field to 1
+ *
+ * For use with eFuse fields that are a single bit. This function will write the bit to value 1 if
+ * it is not already set, or does nothing if the bit is already set.
+ *
+ * This is equivalent to calling esp_efuse_write_field_cnt() with the cnt parameter equal to 1,
+ * except that it will return ESP_OK if the field is already set to 1.
+ *
+ * @param[in] field Pointer to the structure describing the efuse field.
+ *
+ * @return
+ * - ESP_OK: The operation was successfully completed, or the bit was already set to value 1.
+ * - ESP_ERR_INVALID_ARG: Error in the passed arugments, including if the efuse field is not 1 bit wide.
+ */
+esp_err_t esp_efuse_write_field_bit(const esp_efuse_desc_t* field[]);
+
+/**
+ * @brief   Sets a write protection for the whole block.
+ *
+ * After that, it is impossible to write to this block.
+ * The write protection does not apply to block 0.
+ * @param[in]  blk          Block number of eFuse. (EFUSE_BLK1, EFUSE_BLK2 and EFUSE_BLK3)
+ *
+ * @return
+ *    - ESP_OK: The operation was successfully completed.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_EFUSE_CNT_IS_FULL: Not all requested cnt bits is set.
+ *    - ESP_ERR_NOT_SUPPORTED: The block does not support this command.
+ */
+esp_err_t esp_efuse_set_write_protect(esp_efuse_block_t blk);
+
+/**
+ * @brief   Sets a read protection for the whole block.
+ *
+ * After that, it is impossible to read from this block.
+ * The read protection does not apply to block 0.
+ * @param[in]  blk          Block number of eFuse. (EFUSE_BLK1, EFUSE_BLK2 and EFUSE_BLK3)
+ *
+ * @return
+ *    - ESP_OK: The operation was successfully completed.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_EFUSE_CNT_IS_FULL: Not all requested cnt bits is set.
+ *    - ESP_ERR_NOT_SUPPORTED: The block does not support this command.
+ */
+esp_err_t esp_efuse_set_read_protect(esp_efuse_block_t blk);
+
+/**
+ * @brief   Returns the number of bits used by field.
+ *
+ * @param[in]  field          A pointer to the structure describing the fields of efuse.
+ *
+ * @return Returns the number of bits used by field.
+ */
+int esp_efuse_get_field_size(const esp_efuse_desc_t* field[]);
+
+/**
+ * @brief   Returns value of efuse register.
+ *
+ * This is a thread-safe implementation.
+ * Example: EFUSE_BLK2_RDATA3_REG where (blk=2, num_reg=3)
+ * @note Please note that reading in the batch mode does not show uncommitted changes.
+ *
+ * @param[in]  blk     Block number of eFuse.
+ * @param[in]  num_reg The register number in the block.
+ *
+ * @return Value of register
+ */
+uint32_t esp_efuse_read_reg(esp_efuse_block_t blk, unsigned int num_reg);
+
+/**
+ * @brief   Write value to efuse register.
+ *
+ * Apply a coding scheme if necessary.
+ * This is a thread-safe implementation.
+ * Example: EFUSE_BLK3_WDATA0_REG where (blk=3, num_reg=0)
+ * @param[in]  blk     Block number of eFuse.
+ * @param[in]  num_reg The register number in the block.
+ * @param[in]  val     Value to write.
+ *
+ * @return
+ *      - ESP_OK: The operation was successfully completed.
+ *      - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits is strictly forbidden.
+ */
+esp_err_t esp_efuse_write_reg(esp_efuse_block_t blk, unsigned int num_reg, uint32_t val);
+
+/**
+ * @brief   Return efuse coding scheme for blocks.
+ *
+ * Note: The coding scheme is applicable only to 1, 2 and 3 blocks. For 0 block, the coding scheme is always ``NONE``.
+ *
+ * @param[in]  blk     Block number of eFuse.
+ * @return Return efuse coding scheme for blocks
+ */
+esp_efuse_coding_scheme_t esp_efuse_get_coding_scheme(esp_efuse_block_t blk);
+
+/**
+ * @brief   Read key to efuse block starting at the offset and the required size.
+ *
+ * @note Please note that reading in the batch mode does not show uncommitted changes.
+ *
+ * @param[in]  blk             Block number of eFuse.
+ * @param[in]  dst_key         A pointer to array that will contain the result of reading.
+ * @param[in]  offset_in_bits  Start bit in block.
+ * @param[in]  size_bits       The number of bits required to read.
+ *
+ * @return
+ *    - ESP_OK: The operation was successfully completed.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_CODING: Error range of data does not match the coding scheme.
+ */
+esp_err_t esp_efuse_read_block(esp_efuse_block_t blk, void* dst_key, size_t offset_in_bits, size_t size_bits);
+
+/**
+ * @brief   Write key to efuse block starting at the offset and the required size.
+ *
+ * @param[in]  blk             Block number of eFuse.
+ * @param[in]  src_key         A pointer to array that contains the key for writing.
+ * @param[in]  offset_in_bits  Start bit in block.
+ * @param[in]  size_bits       The number of bits required to write.
+ *
+ * @return
+ *    - ESP_OK: The operation was successfully completed.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_CODING: Error range of data does not match the coding scheme.
+ *    - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits
+ */
+esp_err_t esp_efuse_write_block(esp_efuse_block_t blk, const void* src_key, size_t offset_in_bits, size_t size_bits);
+
+/**
+ * @brief   Returns chip version from efuse
+ *
+ * @return chip version
+ */
+uint8_t esp_efuse_get_chip_ver(void);
+
+/**
+ * @brief   Returns chip package from efuse
+ *
+ * @return chip package
+ */
+uint32_t esp_efuse_get_pkg_ver(void);
+
+
+/**
+ *  @brief Reset efuse write registers
+ *
+ * Efuse write registers are written to zero, to negate
+ * any changes that have been staged here.
+ *
+ * @note This function is not threadsafe, if calling code updates
+ * efuse values from multiple tasks then this is caller's
+ * responsibility to serialise.
+ */
+void esp_efuse_reset(void);
+
+#ifdef CONFIG_IDF_TARGET_ESP32
+/**
+ *  @brief Disable BASIC ROM Console via efuse
+ *
+ * By default, if booting from flash fails the ESP32 will boot a
+ * BASIC console in ROM.
+ *
+ * Call this function (from bootloader or app) to permanently disable the console on this chip.
+ *
+ */
+void esp_efuse_disable_basic_rom_console(void);
+#endif
+
+
+/**
+ *  @brief Disable ROM Download Mode via eFuse
+ *
+ * Permanently disables the ROM Download Mode feature. Once disabled, if the SoC is booted with
+ * strapping pins set for ROM Download Mode then an error is printed instead.
+ *
+ * @note Not all SoCs support this option. An error will be returned if called on an ESP32
+ * with a silicon revision lower than 3, as these revisions do not support this option.
+ *
+ * @note If ROM Download Mode is already disabled, this function does nothing and returns success.
+ *
+ * @return
+ * - ESP_OK If the eFuse was successfully burned, or had already been burned.
+ * - ESP_ERR_NOT_SUPPORTED (ESP32 only) This SoC is not capable of disabling UART download mode
+ * - ESP_ERR_INVALID_STATE (ESP32 only) This eFuse is write protected and cannot be written
+ */
+esp_err_t esp_efuse_disable_rom_download_mode(void);
+
+/**
+ * @brief Set boot ROM log scheme via eFuse
+ *
+ * @note By default, the boot ROM will always print to console. This API can be called to set the log scheme only once per chip,
+ *       once the value is changed from the default it can't be changed again.
+ *
+ * @param log_scheme Supported ROM log scheme
+ * @return
+ *      - ESP_OK If the eFuse was successfully burned, or had already been burned.
+ *      - ESP_ERR_NOT_SUPPORTED (ESP32 only) This SoC is not capable of setting ROM log scheme
+ *      - ESP_ERR_INVALID_STATE This eFuse is write protected or has been burned already
+ */
+esp_err_t esp_efuse_set_rom_log_scheme(esp_efuse_rom_log_scheme_t log_scheme);
+
+#if SOC_SUPPORTS_SECURE_DL_MODE
+/**
+ *  @brief Switch ROM Download Mode to Secure Download mode via eFuse
+ *
+ * Permanently enables Secure Download mode. This mode limits the use of ROM Download Mode functions
+ * to simple flash read, write and erase operations, plus a command to return a summary of currently
+ * enabled security features.
+ *
+ * @note If Secure Download mode is already enabled, this function does nothing and returns success.
+ *
+ * @note Disabling the ROM Download Mode also disables Secure Download Mode.
+ *
+ * @return
+ * - ESP_OK If the eFuse was successfully burned, or had already been burned.
+ * - ESP_ERR_INVALID_STATE ROM Download Mode has been disabled via eFuse, so Secure Download mode is unavailable.
+ */
+esp_err_t esp_efuse_enable_rom_secure_download_mode(void);
+#endif
+
+
+/**
+ *  @brief Return secure_version from efuse field.
+ * @return Secure version from efuse field
+ */
+uint32_t esp_efuse_read_secure_version(void);
+
+/**
+ *  @brief Check secure_version from app and secure_version and from efuse field.
+ *
+ * @param secure_version Secure version from app.
+ * @return
+ *          - True: If version of app is equal or more then secure_version from efuse.
+ */
+bool esp_efuse_check_secure_version(uint32_t secure_version);
+
+/**
+ *  @brief Write efuse field by secure_version value.
+ *
+ * Update the secure_version value is available if the coding scheme is None.
+ * Note: Do not use this function in your applications. This function is called as part of the other API.
+ *
+ * @param[in] secure_version Secure version from app.
+ * @return
+ *          - ESP_OK: Successful.
+ *          - ESP_FAIL: secure version of app cannot be set to efuse field.
+ *          - ESP_ERR_NOT_SUPPORTED: Anti rollback is not supported with the 3/4 and Repeat coding scheme.
+ */
+esp_err_t esp_efuse_update_secure_version(uint32_t secure_version);
+
+#if defined(BOOTLOADER_BUILD) && defined(CONFIG_EFUSE_VIRTUAL) && !defined(CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH)
+/**
+ *  @brief Initializes eFuses API to keep eFuses in RAM.
+ *
+ * This function just copies all eFuses to RAM. IDF eFuse APIs perform all operators with RAM instead of real eFuse.
+ * (Used only in bootloader).
+ */
+void esp_efuse_init_virtual_mode_in_ram(void);
+#endif
+
+#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
+/**
+ *  @brief Initializes variables: offset and size to simulate the work of an eFuse.
+ *
+ * Note: To simulate the work of an eFuse need to set CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH option
+ * and to add in the partition.csv file a line `efuse_em, data, efuse,   ,   0x2000,`.
+ *
+ * @param[in] offset The starting address of the partition where the eFuse data will be located.
+ * @param[in] size The size of the partition.
+ */
+void esp_efuse_init_virtual_mode_in_flash(uint32_t offset, uint32_t size);
+#endif
+
+/**
+ *  @brief Set the batch mode of writing fields.
+ *
+ * This mode allows you to write the fields in the batch mode when need to burn several efuses at one time.
+ * To enable batch mode call begin() then perform as usually the necessary operations
+ * read and write and at the end call commit() to actually burn all written efuses.
+ * The batch mode can be used nested. The commit will be done by the last commit() function.
+ * The number of begin() functions should be equal to the number of commit() functions.
+ *
+ * @note Please note that reading in the batch mode does not show uncommitted changes.
+ *
+ * Note: If batch mode is enabled by the first task, at this time the second task cannot write/read efuses.
+ * The second task will wait for the first task to complete the batch operation.
+ *
+ * \code{c}
+ * // Example of using the batch writing mode.
+ *
+ * // set the batch writing mode
+ * esp_efuse_batch_write_begin();
+ *
+ * // use any writing functions as usual
+ * esp_efuse_write_field_blob(ESP_EFUSE_...);
+ * esp_efuse_write_field_cnt(ESP_EFUSE_...);
+ * esp_efuse_set_write_protect(EFUSE_BLKx);
+ * esp_efuse_write_reg(EFUSE_BLKx, ...);
+ * esp_efuse_write_block(EFUSE_BLKx, ...);
+ * esp_efuse_write(ESP_EFUSE_1, 3);  // ESP_EFUSE_1 == 1, here we write a new value = 3. The changes will be burn by the commit() function.
+ * esp_efuse_read_...(ESP_EFUSE_1);  // this function returns ESP_EFUSE_1 == 1 because uncommitted changes are not readable, it will be available only after commit.
+ * ...
+ *
+ * // esp_efuse_batch_write APIs can be called recursively.
+ * esp_efuse_batch_write_begin();
+ * esp_efuse_set_write_protect(EFUSE_BLKx);
+ * esp_efuse_batch_write_commit(); // the burn will be skipped here, it will be done in the last commit().
+ *
+ * ...
+ *
+ * // Write all of these fields to the efuse registers
+ * esp_efuse_batch_write_commit();
+ * esp_efuse_read_...(ESP_EFUSE_1);  // this function returns ESP_EFUSE_1 == 3.
+ *
+ * \endcode
+ *
+ * @return
+ *          - ESP_OK: Successful.
+ */
+esp_err_t esp_efuse_batch_write_begin(void);
+
+/**
+ *  @brief Reset the batch mode of writing fields.
+ *
+ * It will reset the batch writing mode and any written changes.
+ *
+ * @return
+ *          - ESP_OK: Successful.
+ *          - ESP_ERR_INVALID_STATE: Tha batch mode was not set.
+ */
+esp_err_t esp_efuse_batch_write_cancel(void);
+
+/**
+ *  @brief Writes all prepared data for the batch mode.
+ *
+ * Must be called to ensure changes are written to the efuse registers.
+ * After this the batch writing mode will be reset.
+ *
+ * @return
+ *          - ESP_OK: Successful.
+ *          - ESP_ERR_INVALID_STATE: The deferred writing mode was not set.
+ */
+esp_err_t esp_efuse_batch_write_commit(void);
+
+/**
+ *  @brief Checks that the given block is empty.
+ *
+ * @return
+ *          - True: The block is empty.
+ *          - False: The block is not empty or was an error.
+ */
+bool esp_efuse_block_is_empty(esp_efuse_block_t block);
+
+/**
+ * @brief Returns a read protection for the key block.
+ *
+ * @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
+ *
+ * @return True: The key block is read protected
+ *         False: The key block is readable.
+ */
+bool esp_efuse_get_key_dis_read(esp_efuse_block_t block);
+
+/**
+ * @brief Sets a read protection for the key block.
+ *
+ * @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
+ *
+ * @return
+ *    - ESP_OK: Successful.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits is strictly forbidden.
+ *    - ESP_ERR_CODING: Error range of data does not match the coding scheme.
+ */
+esp_err_t esp_efuse_set_key_dis_read(esp_efuse_block_t block);
+
+/**
+ * @brief Returns a write protection for the key block.
+ *
+ * @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
+ *
+ * @return True: The key block is write protected
+ *         False: The key block is writeable.
+ */
+bool esp_efuse_get_key_dis_write(esp_efuse_block_t block);
+
+/**
+ * @brief Sets a write protection for the key block.
+ *
+ * @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
+ *
+ * @return
+ *    - ESP_OK: Successful.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits is strictly forbidden.
+ *    - ESP_ERR_CODING: Error range of data does not match the coding scheme.
+ */
+esp_err_t esp_efuse_set_key_dis_write(esp_efuse_block_t block);
+
+/**
+ * @brief Returns true if the key block is unused, false otherwise.
+ *
+ * An unused key block is all zero content, not read or write protected,
+ * and has purpose 0 (ESP_EFUSE_KEY_PURPOSE_USER)
+ *
+ * @param block key block to check.
+ *
+ * @return
+ *         - True if key block is unused,
+ *         - False if key block is used or the specified block index is not a key block.
+ */
+bool esp_efuse_key_block_unused(esp_efuse_block_t block);
+
+/**
+ * @brief Find a key block with the particular purpose set.
+ *
+ * @param[in] purpose Purpose to search for.
+ * @param[out] block Pointer in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX which will be set to the key block if found.
+ *                   Can be NULL, if only need to test the key block exists.
+ *
+ * @return
+ *         - True: If found,
+ *         - False: If not found (value at block pointer is unchanged).
+ */
+bool esp_efuse_find_purpose(esp_efuse_purpose_t purpose, esp_efuse_block_t *block);
+
+/**
+ * @brief Returns a write protection of the key purpose field for an efuse key block.
+ *
+ * @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
+ *
+ * @note For ESP32: no keypurpose, it returns always True.
+ *
+ * @return True: The key purpose is write protected.
+ *         False: The key purpose is writeable.
+ */
+bool esp_efuse_get_keypurpose_dis_write(esp_efuse_block_t block);
+
+/**
+ * @brief Returns the current purpose set for an efuse key block.
+ *
+ * @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
+ *
+ * @return
+ *         - Value: If Successful, it returns the value of the purpose related to the given key block.
+ *         - ESP_EFUSE_KEY_PURPOSE_MAX: Otherwise.
+ */
+esp_efuse_purpose_t esp_efuse_get_key_purpose(esp_efuse_block_t block);
+
+
+#ifndef CONFIG_IDF_TARGET_ESP32
+/**
+ * @brief Returns a pointer to a key purpose for an efuse key block.
+ *
+ * @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
+ *
+ * To get the value of this field use esp_efuse_read_field_blob() or esp_efuse_get_key_purpose().
+ *
+ * @return Pointer: If Successful returns a pointer to the corresponding efuse field otherwise NULL.
+ */
+const esp_efuse_desc_t **esp_efuse_get_purpose_field(esp_efuse_block_t block);
+
+/**
+ * @brief Returns a pointer to a key block.
+ *
+ * @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
+ *
+ * @return Pointer: If Successful returns a pointer to the corresponding efuse field otherwise NULL.
+ */
+const esp_efuse_desc_t** esp_efuse_get_key(esp_efuse_block_t block);
+
+/**
+ * @brief Sets a key purpose for an efuse key block.
+ *
+ * @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
+ * @param[in] purpose Key purpose.
+ *
+ * @return
+ *    - ESP_OK: Successful.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits is strictly forbidden.
+ *    - ESP_ERR_CODING: Error range of data does not match the coding scheme.
+ */
+esp_err_t esp_efuse_set_key_purpose(esp_efuse_block_t block, esp_efuse_purpose_t purpose);
+
+/**
+ * @brief Sets a write protection of the key purpose field for an efuse key block.
+ *
+ * @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
+ *
+ * @return
+ *    - ESP_OK: Successful.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits is strictly forbidden.
+ *    - ESP_ERR_CODING: Error range of data does not match the coding scheme.
+ */
+esp_err_t esp_efuse_set_keypurpose_dis_write(esp_efuse_block_t block);
+
+/**
+ * @brief Search for an unused key block and return the first one found.
+ *
+ * See esp_efuse_key_block_unused for a description of an unused key block.
+ *
+ * @return First unused key block, or EFUSE_BLK_KEY_MAX if no unused key block is found.
+ */
+esp_efuse_block_t esp_efuse_find_unused_key_block(void);
+
+/**
+ * @brief Return the number of unused efuse key blocks in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
+ */
+unsigned esp_efuse_count_unused_key_blocks(void);
+
+/**
+ * @brief Returns the status of the Secure Boot public key digest revocation bit.
+ *
+ * @param[in] num_digest The number of digest in range 0..2
+ *
+ * @return
+ *         - True: If key digest is revoked,
+ *         - False; If key digest is not revoked.
+ */
+bool esp_efuse_get_digest_revoke(unsigned num_digest);
+
+/**
+ * @brief Sets the Secure Boot public key digest revocation bit.
+ *
+ * @param[in] num_digest The number of digest in range 0..2
+ *
+ * @return
+ *    - ESP_OK: Successful.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits is strictly forbidden.
+ *    - ESP_ERR_CODING: Error range of data does not match the coding scheme.
+ */
+esp_err_t esp_efuse_set_digest_revoke(unsigned num_digest);
+
+/**
+ * @brief Returns a write protection of the Secure Boot public key digest revocation bit.
+ *
+ * @param[in] num_digest The number of digest in range 0..2
+ *
+ * @return True: The revocation bit is write protected.
+ *         False: The revocation bit is writeable.
+ */
+bool esp_efuse_get_write_protect_of_digest_revoke(unsigned num_digest);
+
+/**
+ * @brief Sets a write protection of the Secure Boot public key digest revocation bit.
+ *
+ * @param[in] num_digest The number of digest in range 0..2
+ *
+ * @return
+ *    - ESP_OK: Successful.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits is strictly forbidden.
+ *    - ESP_ERR_CODING: Error range of data does not match the coding scheme.
+ */
+esp_err_t esp_efuse_set_write_protect_of_digest_revoke(unsigned num_digest);
+
+#endif // not CONFIG_IDF_TARGET_ESP32
+
+/**
+ * @brief Program a block of key data to an efuse block
+ *
+ * The burn of a key, protection bits, and a purpose happens in batch mode.
+ *
+ * @param[in] block Block to read purpose for. Must be in range EFUSE_BLK_KEY0 to EFUSE_BLK_KEY_MAX. Key block must be unused (esp_efuse_key_block_unused).
+ * @param[in] purpose Purpose to set for this key. Purpose must be already unset.
+ * @param[in] key Pointer to data to write.
+ * @param[in] key_size_bytes Bytes length of data to write.
+ *
+ * @return
+ *    - ESP_OK: Successful.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_INVALID_STATE: Error in efuses state, unused block not found.
+ *    - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits is strictly forbidden.
+ *    - ESP_ERR_CODING: Error range of data does not match the coding scheme.
+ */
+esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpose, const void *key, size_t key_size_bytes);
+
+/**
+ * @brief Program keys to unused efuse blocks
+ *
+ * The burn of keys, protection bits, and purposes happens in batch mode.
+ *
+ * @param[in] purposes Array of purposes (purpose[number_of_keys]).
+ * @param[in] keys Array of keys (uint8_t keys[number_of_keys][32]). Each key is 32 bytes long.
+ * @param[in] number_of_keys The number of keys to write (up to 6 keys).
+ *
+ * @return
+ *    - ESP_OK: Successful.
+ *    - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ *    - ESP_ERR_INVALID_STATE: Error in efuses state, unused block not found.
+ *    - ESP_ERR_NOT_ENOUGH_UNUSED_KEY_BLOCKS: Error not enough unused key blocks available
+ *    - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits is strictly forbidden.
+ *    - ESP_ERR_CODING: Error range of data does not match the coding scheme.
+ */
+esp_err_t esp_efuse_write_keys(const esp_efuse_purpose_t purposes[], uint8_t keys[][32], unsigned number_of_keys);
+
+
+#if CONFIG_ESP32_REV_MIN_3 || !CONFIG_IDF_TARGET_ESP32
+/**
+ * @brief Read key digests from efuse. Any revoked/missing digests will be marked as NULL
+ *
+ * @param[out] trusted_keys The number of digest in range 0..2
+ *
+ * @return
+ *    - ESP_OK: Successful.
+ *    - ESP_FAIL: If trusted_keys is NULL or there is no valid digest.
+ */
+esp_err_t esp_secure_boot_read_key_digests(ets_secure_boot_key_digests_t *trusted_keys);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/detect/dl_detect_define.hpp b/tools/sdk/esp32s3/include/esp-dl/include/detect/dl_detect_define.hpp
new file mode 100644
index 00000000000..cc53050cb9b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/detect/dl_detect_define.hpp
@@ -0,0 +1,17 @@
+#pragma once
+
+#include <vector>
+
+namespace dl
+{
+    namespace detect
+    {
+        typedef struct
+        {
+            int category;              /*<! category index */
+            float score;               /*<! score of box */
+            std::vector<int> box;      /*<! [left_up_x, left_up_y, right_down_x, right_down_y] */
+            std::vector<int> keypoint; /*<! [x1, y1, x2, y2, ...] */
+        } result_t;
+    }
+}
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/dl_define.hpp b/tools/sdk/esp32s3/include/esp-dl/include/dl_define.hpp
new file mode 100644
index 00000000000..734c0b80a4a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/dl_define.hpp
@@ -0,0 +1,100 @@
+#pragma once
+
+#include <climits>
+#include "sdkconfig.h"
+
+#define DL_LOG_LATENCY_UNIT 0  /*<! - 1: cycle */
+                               /*<! - 0: us */
+#define DL_LOG_NN_LATENCY 0    /*<! - 1: print the latency of each parts of nn */
+                               /*<! - 0: mute */
+#define DL_LOG_LAYER_LATENCY 0 /*<! - 1: print the latency of each parts of layer */
+                               /*<! - 0: mute */
+
+#if CONFIG_SPIRAM_SUPPORT || CONFIG_ESP32_SPIRAM_SUPPORT || CONFIG_ESP32S2_SPIRAM_SUPPORT || CONFIG_ESP32S3_SPIRAM_SUPPORT
+#define DL_SPIRAM_SUPPORT 1
+#else
+#define DL_SPIRAM_SUPPORT 0
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+#define CONFIG_DEFAULT_ASSIGN_CORE \
+    {                              \
+    } // TODO: 多核 task 完成时，改成默认 0,1
+#elif CONFIG_IDF_TARGET_ESP32S2
+#define CONFIG_DEFAULT_ASSIGN_CORE \
+    {                              \
+    }
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define CONFIG_DEFAULT_ASSIGN_CORE \
+    {                              \
+    } // TODO: 多核 task 完成时，改成默认 0,1
+#elif CONFIG_IDF_TARGET_ESP32C3
+#define CONFIG_DEFAULT_ASSIGN_CORE \
+    {                              \
+    }
+#else
+#define CONFIG_DEFAULT_ASSIGN_CORE \
+    {                              \
+    }
+#endif
+
+#define DL_Q16_MIN (-32768)
+#define DL_Q16_MAX (32767)
+#define DL_Q8_MIN (-128)
+#define DL_Q8_MAX (127)
+
+#ifndef DL_MAX
+#define DL_MAX(x, y) (((x) < (y)) ? (y) : (x))
+#endif
+
+#ifndef DL_MIN
+#define DL_MIN(x, y) (((x) < (y)) ? (x) : (y))
+#endif
+
+#ifndef DL_CLIP
+#define DL_CLIP(x, low, high) ((x) < (low)) ? (low) : (((x) > (high)) ? (high) : (x))
+#endif
+
+#ifndef DL_ABS
+#define DL_ABS(x) ((x) < 0 ? (-(x)) : (x))
+#endif
+
+#ifndef DL_RIGHT_SHIFT
+#define DL_RIGHT_SHIFT(x, shift) ((shift) > 0) ? ((x) >> (shift)) : ((x) << -(shift))
+#endif
+
+#ifndef DL_LEFT_SHIFT
+#define DL_LEFT_SHIFT(x, shift) ((shift) > 0) ? ((x) << (shift)) : ((x) >> -(shift))
+#endif
+
+namespace dl
+{
+    typedef enum
+    {
+        Linear,    /*<! Linear >*/
+        ReLU,      /*<! ReLU >*/
+        LeakyReLU, /*<! LeakyReLU >*/
+        PReLU,     /*<! PReLU >*/
+        // TODO: Sigmoid,   /*<! Sigmoid >*/
+        // TODO: Softmax,    /*<! Softmax*/
+        // TODO: TanH,
+        // TODO: ReLU6
+    } activation_type_t;
+
+    typedef enum
+    {
+        PADDING_NOT_SET,
+        PADDING_VALID,      /*<! no padding >*/
+        PADDING_SAME_BEGIN,  /*<! SAME in MXNET style >*/
+        PADDING_SAME_END,   /*<! SAME in TensorFlow style >*/
+    } padding_type_t;
+    
+    typedef enum
+    {
+        PADDING_EMPTY,
+        PADDING_CONSTANT,
+        PADDING_EDGE, 
+        PADDING_REFLECT,
+        PADDING_SYMMETRIC,
+    } padding_mode_t;
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/image/dl_image.hpp b/tools/sdk/esp32s3/include/esp-dl/include/image/dl_image.hpp
new file mode 100644
index 00000000000..8e8a4df705b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/image/dl_image.hpp
@@ -0,0 +1,491 @@
+#pragma once
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <math.h>
+#include <vector>
+#include "dl_define.hpp"
+#include "dl_variable.hpp"
+#include "dl_math_matrix.hpp"
+
+namespace dl
+{
+    namespace image
+    {
+        typedef enum
+        {
+            IMAGE_RESIZE_BILINEAR = 0, /*<! Resize image by taking bilinear of four pixels */
+            IMAGE_RESIZE_MEAN = 1,     /*<! Resize image by taking mean of four pixels */
+            IMAGE_RESIZE_NEAREST = 2   /*<! Resize image by taking the nearest pixel */
+        } resize_type_t;
+
+        /**
+         * @brief Convert RGB888 pixel to Gray.
+         * 
+         * @param red   red value
+         * @param green green value
+         * @param blue  blue value
+         * @return gray value
+         */
+        inline uint8_t convert_pixel_rgb888_to_gray(int red, int green, int blue)
+        {
+            int temp = (red * 38 + green * 75 + blue * 15) >> 7;
+            return DL_CLIP(temp, 0, 255);
+        }
+
+        /**
+         * @brief Convert RGB565 pixel to RGB888.
+         * 
+         * @tparam T supports all integer types
+         * @param input  pixel value in RGB565
+         * @param output pixel value in RGB888
+         */
+        template <typename T>
+        inline void convert_pixel_rgb565_to_rgb888(uint16_t input, T *output)
+        {
+            output[0] = (input & 0x1F00) >> 5;                           // blue
+            output[1] = ((input & 0x7) << 5) | ((input & 0xE000) >> 11); // green
+            output[2] = input & 0xF8;                                    // red
+        }
+
+        /**
+         * @brief Convert RGB565 image to RGB888 image.
+         * 
+         * @param image  ptr of RGB565 image
+         * @param image_shape shape of the input image
+         * @return Tensor<uint8_t>* output RGB88 image
+         */
+        Tensor<uint8_t> *convert_image_rgb565_to_rgb888(uint16_t *image, std::vector<int> &image_shape);
+
+        /**
+         * @brief Convert RGB565 pixel to Gray.
+         * 
+         * @param input pixel value in RGB565
+         * @return pixel value in Gray
+         */
+        inline uint8_t convert_pixel_rgb565_to_gray(uint16_t input)
+        {
+            int blue = (input & 0x1F00) >> 5;                            // blue
+            int green = ((input & 0x7) << 5) | ((input & 0xE000) >> 11); // green
+            int red = input & 0xF8;                                      // red
+
+            return convert_pixel_rgb888_to_gray(red, green, blue);
+        }
+
+        /**
+         * @brief Crop a patch from image and resize and store to destination image.
+         * If the cropping box is out of image, destination image will be padded with edge.
+         * 
+         * The outer rectangle is the entire output image.
+         * The inner rectangle is where the resized image will be stored.
+         * In other world, this function could help you do padding while resize image.
+         *               ___________________________(dst_w)__________________
+         *              |         ___________________________                |
+         *              |        |(x_start, y_start)         |               | 
+         *              |        |                           |               | 
+         *              |        |                           |               | 
+         *       (dst_h)|        |                           |               | 
+         *              |        |                           |               | 
+         *              |        |                           |               | 
+         *              |        |___________________________|(x_end, y_end) | 
+         *              |____________________________________________________| 
+         * 
+         * @tparam T suppot all integer types
+         * @param dst_image     pointer of destination(output) image
+         * @param dst_width     destination image width
+         * @param dst_channel   destination image channel number
+         * @param dst_y_start   start y of resized image in destination image
+         * @param dst_y_end     end y of resized image in destination image
+         * @param dst_x_start   start x of resized image in destination image
+         * @param dst_x_end     end x of resized image in destination image
+         * @param src_image     pointer of source image
+         * @param src_height    source image height
+         * @param src_width     source image width
+         * @param src_channel   source image channel
+         * @param src_y_start   start y of resized image in source image
+         * @param src_y_end     end y of resized image in source image
+         * @param src_x_start   start x of resized image in source image
+         * @param src_x_end     end x of resized image in source image
+         * @param resize_type   one of IMAGE_RESIZE_BILINEAR or IMAGE_RESIZE_MEAN or IMAGE_RESIZE_NEAREST
+         * @param shift_left    bit left shift number implemented on output
+         */
+        template <typename T>
+        void crop_and_resize(T *dst_image,
+                             int dst_width,
+                             int dst_channel,
+                             int dst_y_start, int dst_y_end,
+                             int dst_x_start, int dst_x_end,
+                             uint16_t *src_image,
+                             int src_height,
+                             int src_width,
+                             int src_channel,
+                             int src_y_start, int src_y_end,
+                             int src_x_start, int src_x_end,
+                             resize_type_t resize_type = IMAGE_RESIZE_NEAREST,
+                             int shift_left = 0);
+
+        /**
+         * @brief Crop a patch from image and resize and store to destination image.
+         * If the cropping box is out of image, destination image will be padded with edge.
+         * 
+         * The outer rectangle is the entire output image.
+         * The inner rectangle is where the resized image will be stored.
+         * In other world, this function could help you do padding while resize image.
+         *               ___________________________(dst_w)__________________
+         *              |         ___________________________                |
+         *              |        |(x_start, y_start)         |               | 
+         *              |        |                           |               | 
+         *              |        |                           |               | 
+         *       (dst_h)|        |                           |               | 
+         *              |        |                           |               | 
+         *              |        |                           |               | 
+         *              |        |___________________________|(x_end, y_end) | 
+         *              |____________________________________________________| 
+         * 
+         * @tparam T suppot all integer types
+         * @param dst_image     pointer of destination(output) image
+         * @param dst_width     destination image width
+         * @param dst_channel   destination image channel number
+         * @param dst_y_start   start y of resized image in destination image
+         * @param dst_y_end     end y of resized image in destination image
+         * @param dst_x_start   start x of resized image in destination image
+         * @param dst_x_end     end x of resized image in destination image
+         * @param src_image     pointer of source image
+         * @param src_height    source image height
+         * @param src_width     source image width
+         * @param src_channel   source image channel
+         * @param src_y_start   start y of resized image in source image
+         * @param src_y_end     end y of resized image in source image
+         * @param src_x_start   start x of resized image in source image
+         * @param src_x_end     end x of resized image in source image
+         * @param resize_type   one of IMAGE_RESIZE_BILINEAR or IMAGE_RESIZE_MEAN or IMAGE_RESIZE_NEAREST
+         * @param shift_left    bit left shift number implemented on output
+         */
+        template <typename T>
+        void crop_and_resize(T *dst_image,
+                             int dst_width,
+                             int dst_channel,
+                             int dst_y_start, int dst_y_end,
+                             int dst_x_start, int dst_x_end,
+                             uint8_t *src_image,
+                             int src_height,
+                             int src_width,
+                             int src_channel,
+                             int src_y_start, int src_y_end,
+                             int src_x_start, int src_x_end,
+                             resize_type_t resize_type = IMAGE_RESIZE_NEAREST,
+                             int shift_left = 0);
+
+        /**
+         * @brief Draw a filled rectangle on RGB888 image.
+         * 
+         * @param image        pointer of input image
+         * @param image_height height of input image
+         * @param image_width  width of input image
+         * @param x1           left up corner x
+         * @param y1           left up corner y
+         * @param x2           right bottom corner x
+         * @param y2           right bottom corner y
+         * @param color        0x    00|       00|       00|       00
+         *                     reserved|channel 0|channel 1|channel 2 
+         */
+        void draw_filled_rectangle(uint8_t *image, const uint32_t image_height, const uint32_t image_width,
+                                   uint32_t x1, uint32_t y1, uint32_t x2, uint32_t y2,
+                                   const uint32_t color = 0x00FF0000);
+
+        /**
+         * @brief Draw a filled rectangle on RGB565 image.
+         * 
+         * @param image        pointer of input image
+         * @param image_height height of input image
+         * @param image_width  width of input image
+         * @param x1           left up corner x
+         * @param y1           left up corner y
+         * @param x2           right bottom corner x
+         * @param y2           right bottom corner y
+         * @param color        0b         000|    00000|    00000|           000
+         *                     channel 1[2:0]|channel 0|channel 2|channel 1[5:3] 
+         */
+        void draw_filled_rectangle(uint16_t *image, const uint32_t image_height, const uint32_t image_width,
+                                   uint32_t x1, uint32_t y1, uint32_t x2, uint32_t y2,
+                                   const uint16_t color = 0b0001111100000000);
+
+        /**
+         * @brief Draw a point on RGB888 image.
+         * 
+         * @param image        pointer of input image
+         * @param image_height height of input image
+         * @param image_width  width of input image
+         * @param x            point x
+         * @param y            point y
+         * @param size         size of point
+         * @param color        0x    00|       00|       00|       00
+         *                     reserved|channel 0|channel 1|channel 2 
+         */
+        void draw_point(uint8_t *image, const uint32_t image_height, const uint32_t image_width,
+                        const uint32_t x, const uint32_t y, const uint32_t size,
+                        const uint32_t color = 0x00FF0000);
+
+        /**
+         * @brief Draw a point on RGB565 image.
+         * 
+         * @param image        pointer of input image
+         * @param image_height height of input image
+         * @param image_width  width of input image
+         * @param x            point x
+         * @param y            point y
+         * @param size         size of point
+         * @param color        0b         000|    00000|    00000|           000
+         *                     channel 1[2:0]|channel 0|channel 2|channel 1[5:3] 
+         */
+        void draw_point(uint16_t *image, const uint32_t image_height, const uint32_t image_width,
+                        const uint32_t x, const uint32_t y, const uint32_t size,
+                        uint16_t color = 0b0001111100000000);
+
+        /**
+         * @brief Draw a hollow rectangle on RGB888 image.
+         * 
+         * @param image        pointer of input image
+         * @param image_height height of input image
+         * @param image_width  width of input image
+         * @param x1           left up corner x
+         * @param y1           left up corner y
+         * @param x2           right bottom corner x
+         * @param y2           right bottom corner y
+         * @param color        0x    00|       00|       00|       00
+         *                     reserved|channel 0|channel 1|channel 2 
+         */
+        void draw_hollow_rectangle(uint8_t *image, const uint32_t image_height, const uint32_t image_width,
+                                   uint32_t x1, uint32_t y1, uint32_t x2, uint32_t y2,
+                                   uint32_t color = 0x00FF0000);
+
+        /**
+         * @brief Draw a hollow rectangle on RGB565 image.
+         * 
+         * @param image        pointer of input image
+         * @param image_height height of input image
+         * @param image_width  width of input image
+         * @param x1           left up corner x
+         * @param y1           left up corner y
+         * @param x2           right bottom corner x
+         * @param y2           right bottom corner y
+         * @param color        0b         000|    00000|    00000|           000
+         *                     channel 1[2:0]|channel 0|channel 2|channel 1[5:3] 
+         */
+        void draw_hollow_rectangle(uint16_t *image, const uint32_t image_height, const uint32_t image_width,
+                                   uint32_t x1, uint32_t y1, uint32_t x2, uint32_t y2,
+                                   const uint16_t color = 0b0001111100000000);
+
+        /**
+         * @brief Detect target moving by activated detection point number. Each cross in the figure below is a detection point.
+         * Once abs(frame_1_detection_point[i] - frame_2_detection_point[i]) > threshold, this detection point is activated.
+         * This function will return the number of activated detection point.
+         * 
+         *         __stride__________________________
+         *         |        |        |        |   |
+         *  stride |        |        |        |   |
+         *         |        |        |        |   |
+         *         |________|________|________|   |
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |________|________|________| height
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |________|________|________|   |
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |________|________|________|___|___
+         *         |                          |
+         *         |__________width___________|
+         *         |                          |
+         * 
+         * Time consumption:
+         * Frame shape = (240, 240)
+         * Both frame are in PSRAM
+         * On ESP32-S3 with CPU 240MHz, QSPI 80MHz
+         * 
+         * stride  latency
+         *      1  28316us
+         *      2   8770us
+         *      4   3622us
+         *      8   1990us
+         *     16    880us
+         *     32    260us
+         * 
+         * 
+         * In a application, outside this function, threshold of activated detection point number is needed.
+         * Once activated detection point number > number_threshold, this two frame are judged target moved.
+         * How to determine the number_threshold?
+         * Let's assume that the minimize shape of target is (target_min_height, target_max_width).
+         * Then, the number_threshold = [target_min_height / stride] * [target_max_width / stride] * ratio,
+         * where ratio is in (0, 1), the smaller the ratio is, the more sensitive the detector is, the more false detected.
+         * 
+         * 
+         * @param f1        one frame in RGB565
+         * @param f2        another frame in RGB565
+         * @param height    height of frame
+         * @param width     width of frame
+         * @param stride    stride of detection point, the smaller the stride is, the more reliable the detector is.
+         * @param threshold activation threshold of each detection point
+         * @return activated detection point number 
+         */
+        uint32_t get_moving_point_number(uint16_t *f1, uint16_t *f2, const uint32_t height, const uint32_t width, const uint32_t stride, const uint32_t threshold = 5);
+
+        /**
+         * @brief Detect target moving by activated detection point number. Each cross in the figure below is a detection point.
+         * Once abs(frame_1_detection_point[i] - frame_2_detection_point[i]) > threshold, this detection point is activated.
+         * This function will return the number of activated detection point.
+         * 
+         *         __stride__________________________
+         *         |        |        |        |   |
+         *  stride |        |        |        |   |
+         *         |        |        |        |   |
+         *         |________|________|________|   |
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |________|________|________| height
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |________|________|________|   |
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |        |        |        |   |
+         *         |________|________|________|___|___
+         *         |                          |
+         *         |__________width___________|
+         *         |                          |
+         * 
+         * 
+         * In a application, outside this function, threshold of activated detection point number is needed.
+         * Once activated detection point number > number_threshold, this two frame are judged target moved.
+         * How to determine the number_threshold?
+         * Let's assume that the minimize shape of target is (target_min_height, target_max_width).
+         * Then, the number_threshold = [target_min_height / stride] * [target_max_width / stride] * ratio,
+         * where ratio is in (0, 1), the smaller the ratio is, the more sensitive the detector is, the more false detected.
+         * 
+         * 
+         * @param f1        one frame in RGB888
+         * @param f2        another frame in RGB888
+         * @param height    height of frame
+         * @param width     width of frame
+         * @param stride    stride of detection point, the smaller the stride is, the more reliable the detector is.
+         * @param threshold activation threshold of each detection point
+         * @return activated detection point number 
+         */
+        uint32_t get_moving_point_number(uint8_t *f1, uint8_t *f2, const uint32_t height, const uint32_t width, const uint32_t stride, const uint32_t threshold = 5);
+
+        /**
+         * @brief Apply an affine transformation to an image.
+         * 
+         * @tparam T 
+         * @param input     the input image.
+         * @param output    the output image.
+         * @param M_inv     the inverse transformation matrix.
+         */
+        template <typename T>
+        void warp_affine(dl::Tensor<T> *input, dl::Tensor<T> *output, dl::math::Matrix<float> *M_inv);
+
+        /**
+         * @brief Apply an affine transformation to an image.
+         * 
+         * @tparam T 
+         * @param input    the pointer of the input image.
+         * @param shape    the shape of the input image.
+         * @param output   the output image.
+         * @param M_inv    the inverse transformation matrix.
+         */
+        template <typename T>
+        void warp_affine(uint16_t *input, std::vector<int> shape, dl::Tensor<T> *output, dl::math::Matrix<float> *M_inv);
+
+        /**
+         * @brief Get the otsu thresh object.
+         * 
+         * @param image  the gray image.
+         * @return uint8_t the otsu thresh.
+         */
+        uint8_t get_otsu_thresh(Tensor<uint8_t> &image);
+
+        /**
+         * @brief Convert RGB image to gray image
+         * 
+         * @param image  input image
+         * @param bgr    true: the image is in BGR format
+         *               false: the image is in RGB format
+         * @return Tensor<uint8_t>* output image in gray format
+         */
+        Tensor<uint8_t> *rgb2gray(Tensor<uint8_t> &image, bool bgr = false);
+
+        /**
+         * @brief Convert RGB image to LAB image
+         * 
+         * @param image  input image
+         * @param bgr    true: the image is in BGR format
+         *               false: the image is in RGB format 
+         * @param fast   true: use the fast alogrithm， but the accuracy will be reduced
+         *               false: do not use the fast alogrithm
+         * @return Tensor<uint8_t>* output image in LAB foramt
+         */
+        Tensor<uint8_t> *rgb2lab(Tensor<uint8_t> &image, bool bgr = false, bool fast = true);
+
+        /**
+         * @brief Convert RGB image to HSV image
+         * 
+         * @param image   input image
+         * @param bgr     true: the image is in BGR format
+         *                false: the image is in RGB format 
+         * @param fast    true: use the fast alogrithm， but the accuracy will be reduced
+         *                false: do not use the fast alogrithm
+         * @return Tensor<uint8_t>* output image in HSV format
+         */
+        Tensor<uint8_t> *rgb2hsv(Tensor<uint8_t> &image, bool bgr = false, bool fast = true);
+
+        /**
+         * @brief resize an image to the target shape.
+         * 
+         * @param image the input image Tensor
+         * @param target_shape the target shape of the resized image.
+         * @param resize_type one of IMAGE_RESIZE_BILINEAR or IMAGE_RESIZE_MEAN or IMAGE_RESIZE_NEAREST
+         * @return Tensor<uint8_t>* the pointer of the resized image Tensor
+         */
+        Tensor<uint8_t> *resize_image(Tensor<uint8_t> &image, std::vector<int> target_shape, resize_type_t resize_type);
+
+        /**
+         * @brief resize an image to the target shape.
+         * 
+         * @param image the input image Tensor
+         * @param resized_image the resized image Tensor
+         * @param resize_type one of IMAGE_RESIZE_BILINEAR or IMAGE_RESIZE_MEAN or IMAGE_RESIZE_NEAREST
+         */
+        void resize_image(Tensor<uint8_t> &image, Tensor<uint8_t> &resized_image, resize_type_t resize_type);
+
+       /**
+        * @brief resize an image to the target shape with nearest method.
+        * 
+        * @tparam T 
+        * @param image the pointer of the input image
+        * @param input_shape the input shape of the image
+        * @param target_shape the target shape of the resized image
+        * @return T* the pointer of the resized image
+        */
+        template <typename T>
+        T *resize_image_nearest(T *image, std::vector<int> input_shape, std::vector<int> target_shape);
+
+        /**
+         * @brief resize an image to the target shape with nearest method.
+         * 
+         * @tparam T 
+         * @param image the pointer of the input image
+         * @param input_shape the input shape of the image
+         * @param resized_image the pointer of the resized image
+         * @param target_shape the target shape of the resized image
+         */
+        template <typename T>
+        void resize_image_nearest(T *image, std::vector<int> input_shape, T *resized_image, std::vector<int> target_shape);
+
+    } // namespace image
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_add2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_add2d.hpp
new file mode 100644
index 00000000000..c43282b42de
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_add2d.hpp
@@ -0,0 +1,145 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn_add2d.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Activation(Add2D(input0, input1)).
+         * NOTE: addition is element-wise, i.e., output[i,j,k] = input0[i,j,k] + input1[i,j,k]
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class Add2D : public Layer
+        {
+        private:
+            const Activation<feature_t> *activation; /*<! activation of add2d, if you don't specify anything, no activation is applied >*/
+            const int output_exponent;               /*<! exponent of output >*/
+            Tensor<feature_t> *output;               /*<! output ptr of add2d >*/
+            bool inplace;                            /*<! true: the output will store to input0
+                                                          false: the output will store to a separate memory >*/
+            std::vector<int> output_shape;           /*<! output shape of add2d >*/
+
+        public:
+            /**
+             * @brief Construct a new Add2D object.
+             * 
+             * @param output_exponent exponent of output
+             * @param activation      activation of add2d, if you don't specify anything, no activation is applied
+             * @param name            name of add2d
+             * @param inplace         true: the output will store to input0
+             *                        false: the output will store to a separate memory
+             */
+            Add2D(const int output_exponent, const Activation<feature_t> *activation = NULL, const char *name = "Add2D", bool inplace = false) : Layer(name),
+                                                                                                                                                 activation(activation),
+                                                                                                                                                 output_exponent(output_exponent),
+                                                                                                                                                 output(NULL),
+                                                                                                                                                 inplace(inplace),
+                                                                                                                                                 output_shape({}) {}
+
+            /**
+             * @brief Destroy the Add2D object
+             */
+            ~Add2D()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape.
+             * NOTE: input0.shape must equal to input1.shape.
+             * 
+             * @param input0 as one input
+             * @param input1 as another input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input0, Tensor<feature_t> &input1, bool print_shape = false)
+            {
+                assert(input0.is_same_shape(input1));
+                this->output_shape = input0.shape;
+
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_exponent(this->output_exponent);
+                    this->output->set_shape(input0.shape);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input0;
+                }
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+            * @brief Get the output
+            * 
+            * @return Tensor<feature_t>& Add2D result
+            */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call Add2D operation.
+             * 
+             * @param input0      as one input
+             * @param input1      as another input
+             * @param assign_core not effective yet
+             * @return Tensor<feature_t>& added result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input0, Tensor<feature_t> &input1, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    this->output->malloc_element();
+                    this->output->set_exponent(this->output_exponent);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                    DL_LOG_LAYER_LATENCY_START();
+                    nn::add2d(*this->output, input0, input1, this->activation, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "add2d");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    nn::add2d(*this->output, input0, input1, this->activation, assign_core, this->output_exponent);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "add2d");
+                }
+
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_avg_pool2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_avg_pool2d.hpp
new file mode 100644
index 00000000000..57c7fb64a9a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_avg_pool2d.hpp
@@ -0,0 +1,161 @@
+#pragma once
+
+#include <vector>
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn_avg_pool2d.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief AvgPool2D(input).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class AvgPool2D : public Layer
+        {
+        private:
+            const int output_exponent;         /*<! exponent of output >*/
+            std::vector<int> filter_shape;     /*<! filter shape in [filter_height, filter_width] >*/
+            const int stride_y;                /*<! stride in height >*/
+            const int stride_x;                /*<! stride in width >*/
+            const padding_type_t padding_type; /*<! one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN >*/
+            std::vector<int> padding;          /*<! padding size needed in [top, bottom, left, right] of this operation >*/
+            Tensor<feature_t> *output;         /*<! output ptr of AvgPool2D >*/
+            std::vector<int> output_shape;     /*<! output shape of AvgPool2D >*/
+
+        public:
+            /**
+             * @brief Construct a new AvgPool2D object.
+             * 
+             * @param output_exponent exponent of output
+             * @param filter_shape    filter shape in [filter_height, filter_width]
+             * @param padding_type    one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN or PADDING_NOT_SET,
+             *                        - PADDING_VALID means no padding
+             *                        PADDING_SAME_END and PADDING_SAME_BEGIN results in padding with zeros evenly to the left/right or up/down of the input 
+             *                        such that output has the same height/width dimension as the input,
+             *                        - PADDING_SAME_END results padding in TensorFlow style
+             *                        - PADDING_SAME_BEGIN results padding in MXNET style
+             *                        - PADDING_NOT_SET means padding with the specific "padding" value below. 
+             * @param padding         if padding_type is PADDING_NOT_SET, this value will be used as padding size. 
+             *                        the shape must be 4, the value of each position is: [padding top, padding bottom, padding left, padding right]
+             * @param stride_y        stride in height
+             * @param stride_x        stride in width
+             * @param name            name of layer
+             */
+            AvgPool2D(const int output_exponent,
+                      const std::vector<int> filter_shape,
+                      const padding_type_t padding_type = PADDING_VALID,
+                      std::vector<int> padding = {},
+                      const int stride_y = 1,
+                      const int stride_x = 1,
+                      const char *name = "AvgPool2D") : Layer(name),
+                                                        output_exponent(output_exponent),
+                                                        filter_shape(filter_shape),
+                                                        stride_y(stride_y),
+                                                        stride_x(stride_x),
+                                                        padding_type(padding_type),
+                                                        padding(padding),
+                                                        output_shape({})
+            {
+                this->output = new Tensor<feature_t>;
+                if (this->padding_type == PADDING_NOT_SET)
+                {
+                    assert(this->padding.size() == 4);
+                }
+            }
+
+            /**
+            * @brief Destroy the AvgPool2D object.
+            * 
+            */
+            ~AvgPool2D()
+            {
+                if (this->output != NULL)
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape and padding.
+             * 
+             * @param input as an input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                assert(input.shape[0] > 0);
+                assert(input.shape[1] > 0);
+                assert(input.shape.size() == 3);
+
+                this->output_shape = nn::get_output_shape(input.shape, filter_shape, this->stride_y, this->stride_x, this->padding_type, false, this->padding);
+                this->output->set_shape(this->output_shape);
+                this->output->set_exponent(this->output_exponent);
+
+                if (this->padding_type != PADDING_NOT_SET)
+                {
+                    this->padding = nn::get_pad_size(this->output_shape, input.shape, filter_shape, this->stride_y, this->stride_x, this->padding_type);
+                }
+
+                this->output->free_element();
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& AvgPool2D result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call AvgPool2D operation
+             * 
+             * @param input           as an input
+             * @param autoload_enable one of true or false, 
+             *                        - true: load input and output from PSRAM to CACHE automatically
+             *                        - false: do not
+             * @return AvgPool2D result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input, uint8_t autoload_enable = 0)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                DL_LOG_LAYER_LATENCY_START();
+                if (this->output->shape != this->output_shape)
+                {
+                    this->output->set_shape(this->output_shape);
+                }
+                this->output->malloc_element();
+                this->output->set_exponent(this->output_exponent);
+                DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                if (autoload_enable)
+                {
+                    dl::tool::cache::autoload_func((uint32_t)(this->output->element), this->output->get_size() * sizeof(feature_t),
+                                                   (uint32_t)(input.element), input.get_size() * sizeof(feature_t));
+                }
+
+                DL_LOG_LAYER_LATENCY_START();
+                nn::avg_pool2d(*this->output, input, this->padding, this->filter_shape, this->stride_y, this->stride_x);
+                DL_LOG_LAYER_LATENCY_END(this->name, "avg_pool2d");
+
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_base.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_base.hpp
new file mode 100644
index 00000000000..b265b454538
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_base.hpp
@@ -0,0 +1,56 @@
+#pragma once
+#include "dl_tool.hpp"
+#include "dl_tool_cache.hpp"
+#include <iostream>
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Base class for layer.
+         * 
+         */
+        class Layer
+        {
+        public:
+            char *name; /*<! name of layer >*/
+
+            /**
+             * @brief Construct a new Layer object.
+             * 
+             * @param name name of layer.
+             */
+            Layer(const char *name = NULL);
+
+            /**
+             * @brief Destroy the Layer object. Return resource.
+             * 
+             */
+            ~Layer();
+        };
+    } // namespace layer
+} // namespace dl
+
+#if DL_LOG_LAYER_LATENCY
+/**
+ * @brief Initialize.
+ */
+#define DL_LOG_LAYER_LATENCY_INIT() dl::tool::Latency latency
+
+/**
+ * @brief Time starts.
+ */
+#define DL_LOG_LAYER_LATENCY_START() latency.start()
+
+/**
+ * @brief Time ends and printed.
+ */
+#define DL_LOG_LAYER_LATENCY_END(prefix, key) \
+    latency.end();                            \
+    latency.print(prefix, key)
+#else
+#define DL_LOG_LAYER_LATENCY_INIT()
+#define DL_LOG_LAYER_LATENCY_START()
+#define DL_LOG_LAYER_LATENCY_END(prefix, key)
+#endif
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_concat.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_concat.hpp
new file mode 100644
index 00000000000..35ebe652e53
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_concat.hpp
@@ -0,0 +1,139 @@
+#pragma once
+
+#include <assert.h>
+#include <vector>
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_tool.hpp"
+#include "dl_layer_base.hpp"
+#include "dl_nn_concat.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Concat(input1, input2, input3, ...).
+         * 
+         * @tparam feature_t support all kinds of integer and float data type
+         */
+        template <typename feature_t>
+        class Concat : Layer
+        {
+        private:
+            int output_exponent;           /*<! exponent of output >*/
+            int axis;                      /*<! The axis along which the Tensor will be concatenated. >*/
+            Tensor<feature_t> *output;     /*<! output ptr of Concat >*/
+            std::vector<int> output_shape; /*<! output shape of Concat >*/
+        public:
+            /**
+             * @brief Construct a new Concat object.
+             * 
+             * @param name name of layer
+             * @param axis The axis along which the Tensor will be concatenated.
+             */
+            Concat(int axis, const char *name = "Concat") : Layer(name), axis(axis), output_shape({})
+            {
+                this->output = new Tensor<feature_t>;
+            }
+
+            /**
+             * @brief Destroy the Concat object
+             */
+            ~Concat()
+            {
+                if (this->output != NULL)
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Collect inputs' channel and memory offset, called in Model.build().
+             * 
+             * @param args pointers of concatenated Tensor
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(std::vector<Tensor<feature_t> *> args, bool print_shape = false)
+            {
+                assert(args.size() > 1);
+                int shape_size = args[0]->shape.size();
+
+                if (this->axis < 0)
+                {
+                    this->axis = shape_size + this->axis;
+                }
+                assert((this->axis < shape_size) && (this->axis > -1));
+
+                int output_shape_axis = args[0]->shape[this->axis];
+
+                for (int i = 1; i < args.size(); i++)
+                {
+                    assert(shape_size == args[i]->shape.size());
+                    assert(args[i]->exponent == args[i - 1]->exponent);
+                    output_shape_axis += args[i]->shape[this->axis];
+
+                    for (int j = 0; j < shape_size; j++)
+                    {
+                        if (j != this->axis)
+                        {
+                            assert(args[i]->shape[j] == args[i - 1]->shape[j]);
+                        }
+                    }
+                }
+
+                this->output_exponent = args[0]->exponent;
+                this->output_shape = args[0]->shape;
+                this->output_shape[this->axis] = output_shape_axis;
+
+                this->output->set_shape(this->output_shape);
+                this->output->set_exponent(this->output_exponent);
+                this->output->free_element();
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Call Concat operation
+             * 
+             * @param inputs                the pointers of inputs 
+             * @param free_inputs           true: free the inputs after call
+             *                              false: do not free inputs
+             * @return Tensor<feature_t>&   concat result
+             */
+            Tensor<feature_t> &call(std::vector<Tensor<feature_t> *> inputs, bool free_inputs = false)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                DL_LOG_LAYER_LATENCY_START();
+                if (this->output->shape != this->output_shape)
+                {
+                    this->output->set_shape(this->output_shape);
+                }
+                this->output->malloc_element();
+                this->output->set_exponent(this->output_exponent);
+                DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                DL_LOG_LAYER_LATENCY_START();
+                nn::concat(*this->output, inputs, this->axis, free_inputs);
+                DL_LOG_LAYER_LATENCY_END(this->name, "concat");
+                return *this->output;
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>&  Concat result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_concat2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_concat2d.hpp
new file mode 100644
index 00000000000..a086f1ccfde
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_concat2d.hpp
@@ -0,0 +1,179 @@
+#pragma once
+
+#include <assert.h>
+#include <vector>
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_tool.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Concat2D(input1, input2, input3, ...).
+         * 
+         * @tparam feature_t support all kinds of integer and float data type
+         */
+        template <typename feature_t>
+        class Concat2D : Layer
+        {
+        private:
+            std::vector<Tensor<feature_t> *> output_vec; /*<! pointers of concatenated inputs >*/
+            std::vector<int> offset;                     /*<! memory offset of each concatenated inputs in entire element >*/
+            std::vector<int> channel;                    /*<! channel of concatenated inputs >*/
+            Tensor<feature_t> *output;                  /*<! output ptr of Concat2D >*/
+            int output_exponent;                        /*<! exponent of output >*/
+        public: 
+
+            /**
+             * @brief Construct a new Concat2D object.
+             * 
+             * @param name name of layer
+             */
+            Concat2D(const char *name = NULL) : Layer(name) {
+                this->output = new Tensor<feature_t>;
+            }
+
+            /**
+             * @brief Destroy the Concat2D object
+             */
+            ~Concat2D() 
+            {
+                if (this->output != NULL)
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Collect inputs' channel and memory offset, called in Model.build().
+             * 
+             * @param args pointers of concatenated Tensor
+             */
+            void build(std::vector<Tensor<feature_t> *> args)
+            {
+                assert(args.size() > 0);
+
+                this->output_vec = args;
+
+                this->offset = std::vector<int>(args.size());
+                this->channel = std::vector<int>(args.size());
+
+                this->output_exponent = args[0]->exponent;
+                this->offset[0] = 0;
+                this->channel[0] = args[0]->shape[2];
+                std::vector<int> output_shape = args[0]->shape;
+
+                for (int i = 1; i < args.size(); i++)
+                {
+                    assert(output_shape[0] == args[i]->shape[0]); // height
+                    assert(output_shape[1] == args[i]->shape[1]); // width
+                    // assert(this->output_exponent == args[i]->exponent); // exponent
+
+                    this->offset[i] = output_shape[2];
+                    this->channel[i] = args[i]->shape[2];
+                    output_shape[2] += args[i]->shape[2];
+                }
+                this->output->set_shape(output_shape);
+                this->output->set_exponent(this->output_exponent);
+                this->output->free_element();
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>&  Concat2d result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Get the maximum padding among inputs and output-> Then, set to this->output. Called at the end of Model.build().
+             * NOTE: Some special situations like C = Concat2D_1(A, B), E = Concat2D_2(C, D), where A, B, C, D, E are Tensor.
+             *         For avoiding memory copy, we apply an entire element for E, and take it apart for A, B, D. 
+             *         A, B, C, D and E will become other layer's inputs so that result different size of padding.
+             *         For get the maximum padding, we should call at the end of Model.build(),
+             *              Concat2D_1.backward();  // max_padding_temp = get_max_padding(A, B, C), padding of A, B and C are set to max_padding_temp.
+             *              Concat2D_2.backward();  // max_padding = get_max_padding(max_padding_temp, get_max_padding(D, E)) , padding of C, D and E are set to max_padding.
+             *                                         However, padding of A and B is still max_padding_temp.
+             *              Concat2D_1.backward();  // padding of A and B are set to max_padding.
+             *         Or,
+             *              Concat2D_2.backward();
+             *              Concat2D_1.backward();
+             *              Concat2D_2.backward();
+             */
+            void backward()
+            {
+                std::vector<int> max_padding = this->output->padding;
+                int max_channel_with_padding = this->output->shape_with_padding[2];
+                for (int i = 0; i < this->output_vec.size(); i++)
+                {
+                    for (int j = 0; j < max_padding.size(); j++)
+                    {
+                        max_padding[j] = DL_MAX(max_padding[j], this->output_vec[i]->padding[j]);
+                    }
+                    max_channel_with_padding = DL_MAX(max_channel_with_padding, this->output_vec[i]->shape_with_padding[2]);
+                }
+
+                this->output->set_padding_size(max_padding);
+                this->output->shape_with_padding[2] = max_channel_with_padding;
+                for (int i = 0; i < this->output_vec.size(); i++)
+                {
+                    this->output_vec[i]->set_padding_size(max_padding);
+                    this->output_vec[i]->shape_with_padding[2] = max_channel_with_padding;
+#if CONFIG_DEBUG_MODE
+                    assert(this->output->shape_with_padding[0] == this->output_vec[i]->shape_with_padding[0]);
+                    assert(this->output->shape_with_padding[1] == this->output_vec[i]->shape_with_padding[1]);
+                    assert(this->output->shape_with_padding[2] == this->output_vec[i]->shape_with_padding[2]);
+#endif
+                }
+            }
+
+            /**
+             * @brief Calloc an entire element for concatnate result. Take the entire element apart and deliver element pointers to concatenated layer.
+             * NOTE: For example, C = Concat2D(A, B). We apply an entire element for C and deliver two element pointers to A and B.
+             *       Let's assume that A result is produced first. We should call Concat2D.calloc_element() just before A result is produced
+             *       to make sure the element of A is ready and could be filled.
+             */
+            void calloc_element()
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                DL_LOG_LAYER_LATENCY_START();
+                this->output->calloc_element();
+                DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                DL_LOG_LAYER_LATENCY_START();
+                for (int i = 0; i < this->offset.size(); i++)
+                {
+                    this->output_vec[i]->element = this->output->element + this->offset[i];
+                    this->output_vec[i]->set_auto_free(false);
+                }
+                DL_LOG_LAYER_LATENCY_END(this->name, "deliver");
+            }
+
+            void apply_element()
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                DL_LOG_LAYER_LATENCY_START();
+                this->output->apply_element();
+                this->output->set_exponent(this->output_exponent);
+                DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                DL_LOG_LAYER_LATENCY_START();
+                for (int i = 0; i < this->offset.size(); i++)
+                {
+                    this->output_vec[i]->element = this->output->element + this->offset[i];
+                    this->output_vec[i]->set_auto_free(false);
+                }
+                DL_LOG_LAYER_LATENCY_END(this->name, "deliver");
+            }
+        };
+    } // namespace layer
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_conv2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_conv2d.hpp
new file mode 100644
index 00000000000..038dd6cd79f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_conv2d.hpp
@@ -0,0 +1,186 @@
+#pragma once
+
+#include "dl_nn_conv2d.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Activation(Conv2D(input, filter) + bias).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @tparam bias_t supports int16_t and int8_t, must specify when using int8 per-channel quantization
+         *         - int16_t: for int16 quantization and int8 per-channel quantization
+         *         - int8_t: for int8 per-tensor quantization
+         */
+        template <typename feature_t, typename bias_t = feature_t>
+        class Conv2D : public Layer
+        {
+        private:
+            const int output_exponent;               /*<! exponent of output >*/
+            const Filter<feature_t> *filter;         /*<! filter of Conv2D >*/
+            const int stride_y;                      /*<! stride in height >*/
+            const int stride_x;                      /*<! stride in width >*/
+            const padding_type_t padding_type;       /*<! one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN >*/
+            const Bias<bias_t> *bias;                /*<! bias of Conv2D, if you don't specify anything, no bias is added >*/
+            const Activation<feature_t> *activation; /*<! activation of Conv2D, if you don't specify anything, no activation is applied >*/
+            std::vector<int> padding;                /*<! padding size needed in [top, bottom, left, right] of this operation >*/
+            Tensor<feature_t> *output;               /*<! output ptr of Conv2D >*/
+            std::vector<int> output_shape;           /*<! output shape of Conv2D >*/
+
+        public:
+            /**
+             * @brief Construct a new Conv2D object.
+             * 
+             * @param output_exponent exponent of output
+             * @param filter          filter of Conv2D
+             * @param bias            bias of Conv2D, if you don't specify anything, no bias is added
+             * @param activation      activation of Conv2D, if you don't specify anything, no activation is applied
+             * @param padding_type    one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN or PADDING_NOT_SET,
+             *                        - PADDING_VALID means no padding
+             *                        PADDING_SAME_END and PADDING_SAME_BEGIN results in padding with zeros evenly to the left/right or up/down of the input 
+             *                        such that output has the same height/width dimension as the input,
+             *                        - PADDING_SAME_END results padding in TensorFlow style
+             *                        - PADDING_SAME_BEGIN results padding in MXNET style
+             *                        - PADDING_NOT_SET means padding with the specific "padding" value below. 
+             * @param padding         if padding_type is PADDING_NOT_SET, this value will be used as padding size. 
+             *                        the shape must be 4, the value of each position is: [padding top, padding bottom, padding left, padding right]
+             * @param stride_y        stride in height
+             * @param stride_x        stride in width
+             * @param name            name of layer
+             */
+            Conv2D(const int output_exponent,
+                   const Filter<feature_t> *filter,
+                   const Bias<bias_t> *bias = NULL,
+                   const Activation<feature_t> *activation = NULL,
+                   const padding_type_t padding_type = PADDING_VALID,
+                   std::vector<int> padding = {},
+                   const int stride_y = 1,
+                   const int stride_x = 1,
+                   const char *name = "Conv2D") : Layer(name),
+                                                  output_exponent(output_exponent),
+                                                  filter(filter),
+                                                  stride_y(stride_y),
+                                                  stride_x(stride_x),
+                                                  padding_type(padding_type),
+                                                  bias(bias),
+                                                  activation(activation),
+                                                  padding(padding),
+                                                  output_shape({})
+            {
+                this->output = new Tensor<feature_t>;
+                if (this->padding_type == PADDING_NOT_SET)
+                {
+                    assert(this->padding.size() == 4);
+                }
+            }
+
+            /**
+             * @brief Destroy the Conv2D object.
+             * 
+             */
+            ~Conv2D()
+            {
+                if (this->output != NULL)
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output padding and input padding.
+             * 
+             * @param input as an input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                assert(input.shape[0] > 0);
+                assert(input.shape[1] > 0);
+                assert(input.shape.size() == 3);
+                assert(this->filter->shape.size() == 4);
+                assert(input.shape[2] == this->filter->shape[2]);
+
+                this->output_shape = nn::get_output_shape(input.shape, this->filter->shape_with_dilation, this->stride_y, this->stride_x, this->padding_type, true, this->padding);
+                this->output->set_shape(this->output_shape);
+                this->output->set_exponent(this->output_exponent);
+                this->output->free_element();
+                if (this->padding_type != PADDING_NOT_SET)
+                {
+                    this->padding = nn::get_pad_size(this->output_shape, input.shape, this->filter->shape_with_dilation, this->stride_y, this->stride_x, this->padding_type);
+                }
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& Conv2D result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call Conv2D operation
+             * 
+             * @param input           as an input.
+             * @param autoload_enable one of true or false, 
+             *                        - true: load input and output from PSRAM to CACHE automatically
+             *                        - false: do not
+             * @param assign_core     not effective yet
+             * @return Conv2D result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input, bool autoload_enable = false, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                DL_LOG_LAYER_LATENCY_START();
+                if (this->output->shape != this->output_shape)
+                {
+                    this->output->set_shape(this->output_shape);
+                }
+                this->output->malloc_element();
+                this->output->set_exponent(this->output_exponent);
+                DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                if (autoload_enable)
+                {
+                    dl::tool::cache::autoload_func((uint32_t)(this->output->element), this->output->get_size() * sizeof(feature_t),
+                                                   (uint32_t)(input.element), input.get_size() * sizeof(feature_t));
+                }
+
+                DL_LOG_LAYER_LATENCY_START();
+                nn::conv2d(*this->output, input, this->padding, *(this->filter), this->stride_y, this->stride_x, this->bias, this->activation, assign_core);
+                DL_LOG_LAYER_LATENCY_END(this->name, "conv2d");
+                return *this->output;
+            }
+
+            /**
+             * @brief Preload the filter to Cache.
+             * NOTE: Call this layer's preload() before previous layer's call() such that filter could be loaded while previous layer is doing calculation.
+             */
+            void preload()
+            {
+                size_t size = sizeof(feature_t);
+                int shape_size = this->filter->shape.size();
+                for (int i = 0; i < shape_size; ++i)
+                {
+                    size *= filter->shape[i];
+                }
+                dl::tool::cache::preload_func((uint32_t)(this->filter->element), size);
+            }
+        };
+
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_depthwise_conv2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_depthwise_conv2d.hpp
new file mode 100644
index 00000000000..30b2c2a6c77
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_depthwise_conv2d.hpp
@@ -0,0 +1,188 @@
+#pragma once
+
+#include "dl_nn_depthwise_conv2d.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Activation(DepthwiseConv2D(filter, input) + bias).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @tparam bias_t supports int16_t and int8_t, must specify when using int8 per-channel quantization
+         *         - int16_t: for int16 quantization and int8 per-channel quantization
+         *         - int8_t: for int8 per-tensor quantization
+         */
+        template <typename feature_t, typename bias_t = feature_t>
+        class DepthwiseConv2D : public Layer
+        {
+        private:
+            const int output_exponent;               /*<! exponent of output >*/
+            const Filter<feature_t> *filter;         /*<! filter of DepthwiseConv2D >*/
+            const int stride_y;                      /*<! stride in height >*/
+            const int stride_x;                      /*<! stride in width >*/
+            const padding_type_t padding_type;       /*<! one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN >*/
+            const Bias<bias_t> *bias;                /*<! bias of DepthwiseConv2D, if you don't specify anything, no bias is added >*/
+            const Activation<feature_t> *activation; /*<! activation of DepthwiseConv2D, if you don't specify anything, no activation is applied >*/
+            std::vector<int> padding;                /*<! padding size needed in [top, bottom, left, right] of this operation >*/
+            Tensor<feature_t> *output;               /*<! output ptr of DepthwiseConv2D >*/
+            std::vector<int> output_shape;           /*<! output shape of DepthwiseConv2D >*/
+
+        public:
+            /**
+             * @brief Construct a new DepthwiseConv2D object.
+             * 
+             * @param output_exponent exponent of output
+             * @param filter          filter of DepthwiseConv2D
+             * @param bias            bias of DepthwiseConv2D, if you don't specify anything, no bias is added
+             * @param activation      activation of DepthwiseConv2D, if you don't specify anything, no activation is applied
+             * @param padding_type    one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN or PADDING_NOT_SET,
+             *                        - PADDING_VALID means no padding
+             *                        PADDING_SAME_END and PADDING_SAME_BEGIN results in padding with zeros evenly to the left/right or up/down of the input 
+             *                        such that output has the same height/width dimension as the input,
+             *                        - PADDING_SAME_END results padding in TensorFlow style
+             *                        - PADDING_SAME_BEGIN results padding in MXNET style
+             *                        - PADDING_NOT_SET means padding with the specific "padding" value below. 
+             * @param padding         if padding_type is PADDING_NOT_SET, this value will be used as padding size. 
+             *                        the shape must be 4, the value of each position is: [padding top, padding bottom, padding left, padding right]
+             * @param stride_y        - stride in height
+             * @param stride_x        - stride in width
+             * @param name            name of layer
+             */
+            DepthwiseConv2D(const int output_exponent,
+                            const Filter<feature_t> *filter,
+                            const Bias<bias_t> *bias = NULL,
+                            const Activation<feature_t> *activation = NULL,
+                            const padding_type_t padding_type = PADDING_VALID,
+                            std::vector<int> padding = {},
+                            const int stride_y = 1,
+                            const int stride_x = 1,
+                            const char *name = "DepthwiseConv2D") : Layer(name),
+                                                                    output_exponent(output_exponent),
+                                                                    filter(filter),
+                                                                    stride_y(stride_y),
+                                                                    stride_x(stride_x),
+                                                                    padding_type(padding_type),
+                                                                    bias(bias),
+                                                                    activation(activation),
+                                                                    padding(padding),
+                                                                    output_shape({})
+            {
+                this->output = new Tensor<feature_t>;
+                if (this->padding_type == PADDING_NOT_SET)
+                {
+                    assert(this->padding.size() == 4);
+                }
+            }
+
+            /**
+             * @brief Destroy the DepthwiseConv2D object.
+             * 
+             */
+            ~DepthwiseConv2D()
+            {
+                if (this->output != NULL)
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape and padding.
+             * 
+             * @param input as an input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                assert(input.shape[0] > 0);
+                assert(input.shape[1] > 0);
+                assert(input.shape.size() == 3);
+                assert(this->filter->shape.size() == 4);
+                assert(input.shape[2] == this->filter->shape[2]);
+
+                this->output_shape = nn::get_output_shape(input.shape, this->filter->shape_with_dilation, this->stride_y, this->stride_x, this->padding_type, false, this->padding);
+                this->output->set_shape(this->output_shape);
+                this->output->set_exponent(this->output_exponent);
+
+                if (this->padding_type != PADDING_NOT_SET)
+                {
+                    this->padding = nn::get_pad_size(this->output_shape, input.shape, this->filter->shape_with_dilation, this->stride_y, this->stride_x, this->padding_type);
+                }
+                this->output->free_element();
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& DepthwiseConv2D result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call DepthwiseConv2D operation.
+             * 
+             * @param input           as an input
+             * @param autoload_enable one of true or false,
+             *                        - true: load input and output from PSRAM to CACHE automatically
+             *                        - false: do not 
+             * @param assign_core     not effective yet
+             * @return DepthwiseConv2D result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input, bool autoload_enable = false, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                DL_LOG_LAYER_LATENCY_START();
+                if (this->output->shape != this->output_shape)
+                {
+                    this->output->set_shape(this->output_shape);
+                }
+
+                this->output->malloc_element();
+                this->output->set_exponent(this->output_exponent);
+                DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                if (autoload_enable)
+                {
+                    dl::tool::cache::autoload_func((uint32_t)(this->output->element), this->output->get_size() * sizeof(feature_t),
+                                                   (uint32_t)(input.element), input.get_size() * sizeof(feature_t));
+                }
+
+                DL_LOG_LAYER_LATENCY_START();
+                nn::depthwise_conv2d(*this->output, input, this->padding, *(this->filter), this->stride_y, this->stride_x, this->bias, this->activation, assign_core);
+                DL_LOG_LAYER_LATENCY_END(this->name, "depthwise_conv2d");
+
+                return *this->output;
+            }
+
+            /**
+             * @brief Preload the filter to Cache. 
+             * NOTE: Call this layer's preload() before previous layer's call() such that filter could be loaded while previous layer is calculating.
+             */
+            void preload()
+            {
+                size_t size = sizeof(feature_t);
+                int shape_size = this->filter->shape.size();
+                for (int i = 0; i < shape_size; ++i)
+                {
+                    size *= filter->shape[i];
+                }
+                dl::tool::cache::preload_func((uint32_t)(this->filter->element), size);
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_expand_dims.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_expand_dims.hpp
new file mode 100644
index 00000000000..99fdc2ed607
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_expand_dims.hpp
@@ -0,0 +1,130 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_tool.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief 
+         * 
+         * @tparam feature_t 
+         */
+        template <typename feature_t>
+        class ExpandDims : public Layer
+        {
+        private:
+            std::vector<int> output_shape; /*<! output shape of ExpandDims >*/
+            std::vector<int> axis;         /*<! position where the new axis is placed. >*/
+            Tensor<feature_t> *output;     /*<! output ptr of ExpandDims >*/
+            bool inplace;                  /*<! true: the output will store to input0
+                                                false: the output will store to a separate memory >*/
+
+        public:
+            int output_exponent;
+
+            /**
+             * @brief Construct a new ExpandDims object
+             * 
+             * @param axis position where the new axis is placed.
+             * @param name name of layer
+             * @param inplace true: the output will store to input
+             *                false: the output will store to a separate memory
+             */
+            ExpandDims(std::vector<int> axis, const char *name = "ExpandDims", bool inplace = false) : Layer(name),
+                                                                                                       output_shape({}),
+                                                                                                       axis(axis), 
+                                                                                                       output(NULL),
+                                                                                                       inplace(inplace) 
+            {
+            }
+
+            /**
+             * @brief Destroy the ExpandDims object
+             * 
+             */
+            ~ExpandDims()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+            * @brief  Update output shape.
+            * 
+            * @param input as an input.
+            * @param print_shape  whether to print the output shape.
+            */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                this->output_exponent = input.exponent;
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_exponent(this->output_exponent);
+                    this->output->set_shape(input.shape);
+                    this->output->expand_dims(this->axis);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input;
+                    this->output->expand_dims(this->axis);
+                }
+                this->output_shape = this->output->shape;
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& ExpandDims result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief call ExpandDims opeartion
+             * 
+             * @param input 
+             * @return Tensor<feature_t>& ExpandDims result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    this->output->set_exponent(input.exponent);
+                    this->output->set_shape(this->output_shape);
+                    this->output->copy_element(input, true);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "ExpandDims");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    this->output->set_shape(this->output_shape);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "ExpandDims");
+                }
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_flatten.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_flatten.hpp
new file mode 100644
index 00000000000..380df1a413b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_flatten.hpp
@@ -0,0 +1,120 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_tool.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief 
+         * 
+         * @tparam feature_t 
+         */
+        template <typename feature_t>
+        class Flatten : public Layer
+        {
+        private:
+            int output_exponent;           /*<! exponent of output >*/
+            Tensor<feature_t> *output;     /*<! output ptr of Flatten >*/
+            bool inplace;                  /*<! true: the output will store to input0
+                                                false: the output will store to a separate memory >*/
+            std::vector<int> output_shape; /*<! output shape of Flatten >*/
+
+        public:
+            /**
+             * @brief Construct a new Flatten object
+             * 
+             * @param name name of layer
+             * @param inplace true: the output will store to input0
+             *                false: the output will store to a separate memory
+             */
+            Flatten(const char *name = "Flatten", bool inplace = false) : Layer(name), output(NULL), inplace(inplace), output_shape({})
+            {}
+
+            /**
+             * @brief Destroy the Flatten object
+             * 
+             */
+            ~Flatten()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+            * @brief  Update output shape.
+            * 
+            * @param input as an input
+            * @param print_shape  whether to print the output shape. 
+            */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                this->output_exponent = input.exponent;
+                this->output_shape = {input.get_size()};
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_exponent(this->output_exponent);
+                    this->output->set_shape(this->output_shape);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input;
+                    this->output->set_shape(this->output_shape);
+                }
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& Flatten result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call Flatten operation.
+             * 
+             * @param input as an input
+             * @return Tensor<feature_t>& Flatten result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    this->output->set_exponent(input.exponent);
+                    this->output->flatten();
+                    this->output->copy_element(input, true);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "flatten");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    this->output->flatten();
+                    DL_LOG_LAYER_LATENCY_END(this->name, "flatten");
+                }
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_fullyconnected.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_fullyconnected.hpp
new file mode 100644
index 00000000000..afa7e5befba
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_fullyconnected.hpp
@@ -0,0 +1,167 @@
+#pragma once
+
+#include "dl_nn_fully_connected.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Activation(FullyConnected(input, filter) + bias).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @tparam bias_t supports int16_t and int8_t, must specify when using int8 per-channel quantization
+         *         - int16_t: for int16 quantization and int8 per-channel quantization
+         *         - int8_t: for int8 per-tensor quantization
+         */
+        template <typename feature_t, typename bias_t = feature_t>
+        class FullyConnected : public Layer
+        {
+        private:
+            const int output_exponent;               /*<! exponent of output >*/
+            const bool flatten;                      /*<! true: input shape is [x1, x2, ..., xn], filter shape is [1, 1, x1 * x2 * ... * xn, output_dim], output shape is [output_dim]
+                                                          false: input shape is [x1, x2, ..., xn, input_dim], filter shape is [1, 1, input_dim, output_dim], output shape is [x1, x2, ...., xn, output_dim] >*/
+            const Filter<feature_t> *filter;         /*<! filter of FullyConnected >*/
+            const Bias<bias_t> *bias;                /*<! bias of FullyConnected, if you don't specify anything, no bias is added >*/
+            const Activation<feature_t> *activation; /*<! activation of FullyConnected, if you don't specify anything, no activation is applied >*/
+            Tensor<feature_t> *output;               /*<! output ptr of FullyConnected >*/
+            std::vector<int> output_shape;           /*<! output shape of FullyConnected >*/
+
+        public:
+            /**
+             * @brief Construct a new FullyConnected object.
+             * 
+             * @param output_exponent exponent of output
+             * @param filter          filter of FullyConnected
+             * @param bias            bias of FullyConnected, if you don't specify anything, no bias is added
+             * @param activation      activation of FullyConnected, if you don't specify anything, no activation is applied
+             * @param flatten         true: input shape is [x1, x2, ..., xn], filter shape is [1, 1, x1 * x2 * ... * xn, output_dim], output shape is [output_dim]
+                                      false: input shape is [x1, x2, ..., xn, input_dim], filter shape is [1, 1, input_dim, output_dim], output shape is [x1, x2, ...., xn, output_dim]
+             * @param name            name of layer
+             */
+            FullyConnected(const int output_exponent,
+                           const Filter<feature_t> *filter,
+                           const Bias<bias_t> *bias = NULL,
+                           const Activation<feature_t> *activation = NULL,
+                           const bool flatten = true,
+                           const char *name = "FullyConnected") : Layer(name),
+                                                                  output_exponent(output_exponent),
+                                                                  flatten(flatten),
+                                                                  filter(filter),
+                                                                  bias(bias),
+                                                                  activation(activation),
+                                                                  output_shape({})
+            {
+                this->output = new Tensor<feature_t>;
+            }
+
+            /**
+             * @brief Destroy the FullyConnected object.
+             * 
+             */
+            ~FullyConnected()
+            {
+                if (this->output != NULL)
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output padding and input padding.
+             * 
+             * @param input as an input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                assert(this->filter->shape.size() == 4);
+                assert(this->filter->shape[0] == 1);
+                assert(this->filter->shape[1] == 1);
+                if (this->flatten)
+                {
+                    assert(input.get_size() == this->filter->shape[2]);
+                    this->output_shape = {this->filter->shape[3]};
+                }
+                else
+                {
+                    assert(input.shape.back() == this->filter->shape[2]);
+                    this->output_shape = input.shape;
+                    this->output_shape[this->output_shape.size() - 1] = this->filter->shape[3];
+                }
+                this->output->set_shape(this->output_shape);
+                this->output->set_exponent(this->output_exponent);
+                this->output->free_element();
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& FullyConnected result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call FullyConnected operation
+             * 
+             * @param input           as an input.
+             * @param autoload_enable one of true or false, 
+             *                        - true: load input and output from PSRAM to CACHE automatically
+             *                        - false: do not
+             * @param assign_core     not effective yet
+             * @return FullyConnected result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input, bool autoload_enable = false, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                DL_LOG_LAYER_LATENCY_START();
+                if (this->output->shape != this->output_shape)
+                {
+                    this->output->set_shape(this->output_shape);
+                }
+                this->output->malloc_element();
+                this->output->set_exponent(this->output_exponent);
+                DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                if (autoload_enable)
+                {
+                    dl::tool::cache::autoload_func((uint32_t)(this->output->element), this->output->get_size() * sizeof(feature_t),
+                                                   (uint32_t)(input.element), input.get_size() * sizeof(feature_t));
+                }
+
+                DL_LOG_LAYER_LATENCY_START();
+                nn::fully_connected(*this->output, input, *(this->filter), this->bias, this->activation, this->flatten, assign_core);
+                DL_LOG_LAYER_LATENCY_END(this->name, "fully_connected");
+                return *this->output;
+            }
+
+            /**
+             * @brief Preload the filter to Cache.
+             * NOTE: Call this layer's preload() before previous layer's call() such that filter could be loaded while previous layer is doing calculation.
+             */
+            void preload()
+            {
+                size_t size = sizeof(feature_t);
+                int shape_size = this->filter->shape.size();
+                for (int i = 0; i < shape_size; ++i)
+                {
+                    size *= filter->shape[i];
+                }
+                dl::tool::cache::preload_func((uint32_t)(this->filter->element), size);
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_global_avg_pool2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_global_avg_pool2d.hpp
new file mode 100644
index 00000000000..93f2d30ac89
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_global_avg_pool2d.hpp
@@ -0,0 +1,126 @@
+#pragma once
+
+#include <vector>
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn_global_avg_pool2d.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief GlobalAveragePool2D(input).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class GlobalAveragePool2D : public Layer
+        {
+        private:
+            const int output_exponent;     /*<! exponent of output >*/
+            std::vector<int> output_shape; /*<! output shape of GlobalAveragePool2D >*/
+            Tensor<feature_t> *output;     /*<! output ptr of GlobalAveragePool2D >*/
+        public:
+            /**
+             * @brief Construct a new GlobalAveragePool2D object.
+             * 
+             * @param output_exponent exponent of output
+             * @param name            name of layer
+             */
+            GlobalAveragePool2D(const int output_exponent, const char *name = "GlobalAveragePool2D") : Layer(name),
+                                                                                                       output_exponent(output_exponent),
+                                                                                                       output_shape({})
+
+            {
+                this->output = new Tensor<feature_t>;
+            }
+
+            /**
+            * @brief Destroy the GlobalAveragePool2D object.
+            * 
+            */
+            ~GlobalAveragePool2D()
+            {
+                if (this->output != NULL)
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape.
+             * 
+             * @param input as an input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                assert(input.shape[0] > 0);
+                assert(input.shape[1] > 0);
+                assert(input.shape.size() == 3);
+
+                std::vector<int> output_shape(input.shape.size(), 1);
+                output_shape[2] = input.shape[2];
+                this->output_shape = output_shape;
+                this->output->set_shape(this->output_shape);
+                this->output->set_exponent(this->output_exponent);
+                this->output->free_element();
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& GlobalAveragePool2D result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call GlobalAveragePool2D operation
+             * 
+             * @param input           as an input
+             * @param autoload_enable one of true or false, 
+             *                        - true: load input and output from PSRAM to CACHE automatically
+             *                        - false: do not
+             * @param assign_core     not effective yet
+             * @return GlobalAveragePool2D result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input, uint8_t autoload_enable = 0)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                DL_LOG_LAYER_LATENCY_START();
+                if (this->output->shape != this->output_shape)
+                {
+                    this->output->set_shape(this->output_shape);
+                }
+                this->output->malloc_element();
+                this->output->set_exponent(this->output_exponent);
+                DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                if (autoload_enable)
+                {
+                    dl::tool::cache::autoload_func((uint32_t)(this->output->element), this->output->get_size() * sizeof(feature_t),
+                                                   (uint32_t)(input.element), input.get_size() * sizeof(feature_t));
+                }
+
+                DL_LOG_LAYER_LATENCY_START();
+                nn::global_avg_pool2d(*this->output, input);
+                DL_LOG_LAYER_LATENCY_END(this->name, "global_avg_pool2d");
+
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_global_max_pool2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_global_max_pool2d.hpp
new file mode 100644
index 00000000000..f9b7f73ff8c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_global_max_pool2d.hpp
@@ -0,0 +1,121 @@
+#pragma once
+
+#include <vector>
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn_global_max_pool2d.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief GlobalMaxPool2D(input).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class GlobalMaxPool2D : public Layer
+        {
+        private:
+            Tensor<feature_t> *output;     /*<! output ptr of GlobalMaxPool2D >*/
+            std::vector<int> output_shape; /*<! output shape of GlobalMaxPool2D >*/
+        public:
+            /**
+             * @brief Construct a new GlobalMaxPool2D object.
+             * 
+             * @param name         name of layer
+             */
+            GlobalMaxPool2D(const char *name = "GlobalMaxPool2D") : Layer(name), output_shape({})
+            {
+                this->output = new Tensor<feature_t>;
+            }
+
+            /**
+             * @brief Destroy the GlobalMaxPool2D object.
+             * 
+             */
+            ~GlobalMaxPool2D()
+            {
+                if (this->output != NULL)
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape and exponent.
+             * 
+             * @param input as an input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                assert(input.shape[0] > 0);
+                assert(input.shape[1] > 0);
+                assert(input.shape.size() == 3);
+                this->output->set_exponent(input.exponent);
+
+                std::vector<int> output_shape(input.shape.size(), 1);
+                output_shape[2] = input.shape[2];
+                this->output_shape = output_shape;
+                this->output->set_shape(this->output_shape);
+                this->output->free_element();
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output 
+             * 
+             * @return Tensor<feature_t>& GlobalMaxPool2D result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call GlobalMaxPool2D operation
+             * 
+             * @param input           as an input
+             * @param autoload_enable one of true or false, 
+             *                        - true: load input and output from PSRAM to CACHE automatically
+             *                        - false: do not
+             * @param assign_core     not effective yet
+             * @return GlobalMaxPool2D result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input, uint8_t autoload_enable = 0)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                DL_LOG_LAYER_LATENCY_START();
+                if (this->output->shape != this->output_shape)
+                {
+                    this->output->set_shape(this->output_shape);
+                }
+                this->output->malloc_element();
+                this->output->set_exponent(input.exponent);
+                DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                if (autoload_enable)
+                {
+                    dl::tool::cache::autoload_func((uint32_t)(this->output->element), this->output->get_size() * sizeof(feature_t),
+                                                   (uint32_t)(input.element), input.get_size() * sizeof(feature_t));
+                }
+
+                DL_LOG_LAYER_LATENCY_START();
+                nn::global_max_pool2d(*this->output, input);
+                DL_LOG_LAYER_LATENCY_END(this->name, "global_max_pool2d");
+
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_leakyrelu.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_leakyrelu.hpp
new file mode 100644
index 00000000000..773c62430f2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_leakyrelu.hpp
@@ -0,0 +1,141 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn_leakyrelu.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief LeakyRelu(input).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class LeakyRelu : public Layer
+        {
+        private:
+            feature_t activation_alpha;    /*<! quantized alpha >*/
+            int activation_exponent;       /*<! exponent of quantized alpha >*/
+            Tensor<feature_t> *output;     /*<! output ptr of leakyrelu>*/
+            bool inplace;                  /*<! true: the output will store to input0
+                                                false: the output will store to a separate memory >*/
+            std::vector<int> output_shape; /*<! output shape of leakyrelu >*/
+        public:
+            /**
+             * @brief Construct a new LeakyRelu object
+             * 
+             * @param activation_alpha     quantized alpha
+             * @param activation_exponent  exponent of quantized alpha
+             * @param name                 name of leakyrelu
+             * @param inplace              true: the output will store to input0
+             *                             false: the output will store to a separate memory
+             */
+            LeakyRelu(const int activation_alpha, const int activation_exponent, const char *name = "LeakyRelu", bool inplace = false) : Layer(name), output(NULL), output_shape({})
+            {
+                this->activation_alpha = activation_alpha;
+                this->activation_exponent = activation_exponent;
+                this->inplace = inplace;
+            }
+
+            /**
+             * @brief Destroy the LeakyRelu object
+             * 
+             */
+            ~LeakyRelu()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape and exponent
+             * 
+             * @param input       as an input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                this->output_shape = input.shape;
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_shape(this->output_shape);
+                    this->output->set_exponent(input.exponent);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input;
+                    this->output->set_shape(this->output_shape);
+                }
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output 
+             * 
+             * @return Tensor<feature_t>& LeakyRelu result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call LeakyRelu operation.
+             * 
+             * @param input       as an input
+             * @param assign_core not effective yet
+             * @return LeakyRelu result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    this->output->malloc_element();
+                    this->output->set_exponent(input.exponent);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                    DL_LOG_LAYER_LATENCY_START();
+                    nn::leakyrelu(*this->output, input, this->activation_alpha, this->activation_exponent, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "leakyrelu");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    nn::leakyrelu(*this->output, input, this->activation_alpha, this->activation_exponent, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "leakyrelu");
+                }
+
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_max2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_max2d.hpp
new file mode 100644
index 00000000000..e7defa0b08f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_max2d.hpp
@@ -0,0 +1,143 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_tool.hpp"
+#include "dl_nn_max2d.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Max2D(input0, input1).
+         * NOTE: maximum is element-wise, i.e., output[i,j,k] = max(input0[i,j,k], input1[i,j,k])
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class Max2D : public Layer
+        {
+        private:
+            Tensor<feature_t> *output;     /*<! output ptr of max2d >*/
+            bool inplace;                  /*<! true: the output will store to input0
+                                                false: the output will store to a separate memory >*/
+            std::vector<int> output_shape; /*<! output shape of max2d >*/
+        public:
+            /**
+             * @brief Construct a new Max2D object.
+             * 
+             * @param name            name of max2d
+             * @param inplace         true: the output will store to input0
+             *                        false: the output will store to a separate memory
+             */
+            Max2D(const char *name = "Max2D", bool inplace = false) : Layer(name),
+                                                                      output(NULL), inplace(inplace), output_shape({})
+            {
+            }
+
+            /**
+             * @brief Destroy the Max2D object
+             * 
+             */
+            ~Max2D()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape and exponent
+             * NOTE: input0.shape must equal to input1.shape.
+             *       input0.exponent must equal to input1.exponent.
+             * 
+             * @param input0 as one input
+             * @param input1 as another input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input0, Tensor<feature_t> &input1, bool print_shape = false)
+            {
+                assert(input0.is_same_shape(input1));
+                assert(input0.exponent == input1.exponent);
+                this->output_shape = input0.shape;
+
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_exponent(input0.exponent);
+                    this->output->set_shape(this->output_shape);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input0;
+                }
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& Max2D result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call Max2D operation.
+             * 
+             * @param input0      as one input
+             * @param input1      as another input
+             * @param assign_core not effective yet
+             * @return Max2D result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input0, Tensor<feature_t> &input1, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    this->output->malloc_element();
+                    this->output->set_exponent(input0.exponent);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                    DL_LOG_LAYER_LATENCY_START();
+                    nn::max2d(*this->output, input0, input1, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "max2d");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    nn::max2d(*this->output, input0, input1, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "max2d");
+                }
+
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_max_pool2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_max_pool2d.hpp
new file mode 100644
index 00000000000..7c7fc69fa71
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_max_pool2d.hpp
@@ -0,0 +1,157 @@
+#pragma once
+
+#include <vector>
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn_max_pool2d.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief MaxPool2D(input).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class MaxPool2D : public Layer
+        {
+        private:
+            std::vector<int> filter_shape;     /*<! filter shape in [filter_height, filter_width] >*/
+            const int stride_y;                /*<! stride in height >*/
+            const int stride_x;                /*<! stride in width >*/
+            const padding_type_t padding_type; /*<! one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN >*/
+            std::vector<int> padding;          /*<! padding size needed in [top, bottom, left, right] of this operation >*/
+            Tensor<feature_t> *output;         /*<! output ptr of MaxPool2D >*/
+            std::vector<int> output_shape;     /*<! output shape of MaxPool2D >*/
+
+        public:
+            /**
+             * @brief Construct a new MaxPool2D object.
+             * 
+             * @param filter_shape filter shape in [filter_height, filter_width]
+             * @param padding_type one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN or PADDING_NOT_SET,
+             *                     - PADDING_VALID means no padding
+             *                     PADDING_SAME_END and PADDING_SAME_BEGIN results in padding with zeros evenly to the left/right or up/down of the input 
+             *                     such that output has the same height/width dimension as the input,
+             *                     - PADDING_SAME_END results padding in TensorFlow style
+             *                     - PADDING_SAME_BEGIN results padding in MXNET style
+             *                     - PADDING_NOT_SET means padding with the specific "padding" value below. 
+             * @param padding      if padding_type is PADDING_NOT_SET, this value will be used as padding size. 
+             *                     the shape must be 4, the value of each position is: [padding top, padding bottom, padding left, padding right]
+             * @param stride_y     stride in height
+             * @param stride_x     stride in width
+             * @param name         name of layer
+             */
+            MaxPool2D(const std::vector<int> filter_shape,
+                      const padding_type_t padding_type = PADDING_VALID,
+                      std::vector<int> padding = {},
+                      const int stride_y = 1,
+                      const int stride_x = 1,
+                      const char *name = "MaxPool2D") : Layer(name),
+                                                        filter_shape(filter_shape),
+                                                        stride_y(stride_y),
+                                                        stride_x(stride_x),
+                                                        padding_type(padding_type),
+                                                        padding(padding),
+                                                        output_shape({})
+            {
+                this->output = new Tensor<feature_t>;
+                if (this->padding_type == PADDING_NOT_SET)
+                {
+                    assert(this->padding.size() == 4);
+                }
+            }
+
+            /**
+             * @brief Destroy the MaxPool2D object.
+             * 
+             */
+            ~MaxPool2D()
+            {
+                if (this->output != NULL)
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape and padding.
+             * 
+             * @param input as an input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                assert(input.shape[0] > 0);
+                assert(input.shape[1] > 0);
+                assert(input.shape.size() == 3);
+
+                this->output->set_exponent(input.exponent);
+                this->output_shape = nn::get_output_shape(input.shape, filter_shape, this->stride_y, this->stride_x, this->padding_type, false, this->padding);
+                this->output->set_shape(this->output_shape);
+
+                if (this->padding_type != PADDING_NOT_SET)
+                {
+                    this->padding = nn::get_pad_size(this->output_shape, input.shape, filter_shape, this->stride_y, this->stride_x, this->padding_type);
+                }
+                this->output->free_element();
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& MaxPool2D result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call MaxPool2D operation
+             * 
+             * @param input           as an input
+             * @param autoload_enable one of true or false, 
+             *                        - true: load input and output from PSRAM to CACHE automatically
+             *                        - false: do not
+             * @param assign_core     not effective yet
+             * @return MaxPool2D result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input, uint8_t autoload_enable = 0)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                DL_LOG_LAYER_LATENCY_START();
+                if (this->output->shape != this->output_shape)
+                {
+                    this->output->set_shape(this->output_shape);
+                }
+                this->output->malloc_element();
+                this->output->set_exponent(input.exponent);
+                DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                if (autoload_enable)
+                {
+                    dl::tool::cache::autoload_func((uint32_t)(this->output->element), this->output->get_size() * sizeof(feature_t),
+                                                   (uint32_t)(input.element), input.get_size() * sizeof(feature_t));
+                }
+
+                DL_LOG_LAYER_LATENCY_START();
+                nn::max_pool2d(*this->output, input, this->padding, this->filter_shape, this->stride_y, this->stride_x);
+                DL_LOG_LAYER_LATENCY_END(this->name, "max_pool2d");
+
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_min2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_min2d.hpp
new file mode 100644
index 00000000000..609566348d3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_min2d.hpp
@@ -0,0 +1,143 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_tool.hpp"
+#include "dl_nn_min2d.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Min2D(input0, input1).
+         * NOTE: minimum is element-wise, i.e., output[i,j,k] = min(input0[i,j,k], input1[i,j,k])
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class Min2D : public Layer
+        {
+        private:
+            Tensor<feature_t> *output;     /*<! output of ptr min2d>*/
+            bool inplace;                  /*<! true: the output will store to input0
+                                                false: the output will store to a separate memory >*/
+            std::vector<int> output_shape; /*<! output shape of min2d >*/
+        public:
+            /**
+             * @brief Construct a new Min2D object
+             * 
+             * @param name            name of min2d
+             * @param inplace         true: the output will store to input0
+             *                        false: the output will store to a separate memory
+             */
+            Min2D(const char *name = "Min2D", bool inplace = false) : Layer(name),
+                                                                      output(NULL),
+                                                                      inplace(inplace),
+                                                                      output_shape({}) {}
+
+            /**
+             * @brief Destroy the Min2D object
+             * 
+             */
+            ~Min2D()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape and exponent
+             * NOTE: input0.shape must equal to input1.shape.
+             *       input0.exponent must equal to input1.exponent.
+             * 
+             * @param input0 as one input
+             * @param input1 as another input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input0, Tensor<feature_t> &input1, bool print_shape = false)
+            {
+                assert(input0.is_same_shape(input1));
+                assert(input0.exponent == input1.exponent);
+                this->output_shape = input0.shape;
+
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_shape(this->output_shape);
+                    this->output->set_exponent(input0.exponent);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input0;
+                }
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& Min2D result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call Min2D operation
+             * 
+             * @param input0      as one input
+             * @param input1      as another input
+             * @param assign_core not effective yet
+             * @return Min2D result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input0, Tensor<feature_t> &input1, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    this->output->malloc_element();
+                    this->output->set_exponent(input0.exponent);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                    DL_LOG_LAYER_LATENCY_START();
+                    nn::min2d(*this->output, input0, input1, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "min2d");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    nn::min2d(*this->output, input0, input1, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "min2d");
+                }
+
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_model.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_model.hpp
new file mode 100644
index 00000000000..2064ef2d33a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_model.hpp
@@ -0,0 +1,52 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Neural Network Model.
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class Model
+        {
+        private:
+            std::vector<int> input_shape; /*<! input shape in [height, width, channel] >*/
+
+        public:
+            /**
+             * @brief Destroy the Model object.
+             * 
+             */
+            virtual ~Model() {}
+
+            /**
+             * @brief Build a model including update output shape and input padding of each layer.
+             * 
+             * @param input as an input
+             */
+            virtual void build(Tensor<feature_t> &input) = 0;
+
+            /**
+             * @brief Call the model layer by layer.
+             * 
+             * @param input as an input.
+             */
+            virtual void call(Tensor<feature_t> &input) = 0;
+
+            /**
+             * @brief If input.shape changes, call Model.build(), otherwise, do not. Then call Model.call().
+             * 
+             * @param input as an input
+             */
+            void forward(Tensor<feature_t> &input);
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_mul2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_mul2d.hpp
new file mode 100644
index 00000000000..a391c790335
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_mul2d.hpp
@@ -0,0 +1,151 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn_mul2d.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Activation(Multiply2D(input0, input1)).
+         * NOTE: multiplication is element-wise, i.e., output[i,j,k] = input0[i,j,k] * input1[i,j,k]
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class Mul2D : public Layer
+        {
+        private:
+            const int output_exponent;               /*<! exponent of output >*/
+            const Activation<feature_t> *activation; /*<! activation of Mul2D, if you don't specify anything, no activation is applied >*/
+            Tensor<feature_t> *output;               /*<! output ptr of Mul2D >*/
+            bool inplace;                            /*<! true: the output will store to input0
+                                                            false: the output will store to a separate memory >*/
+            std::vector<int> output_shape;           /*<! output shape of Mul2D >*/
+        public:
+            /**
+             * @brief Construct a new Mul2D object.
+             * 
+             * @param output_exponent exponent of output
+             * @param activation      activation of Mul2D, if you don't specify anything, no activation is applied
+             * @param name            name of layer
+             * @param inplace         true: the output will store to input0
+             *                        false: the output will store to a separate memory
+             */
+            Mul2D(const int output_exponent,
+                  const Activation<feature_t> *activation = NULL,
+                  const char *name = "Mul2D",
+                  bool inplace = false) : Layer(name),
+                                          output_exponent(output_exponent),
+                                          activation(activation),
+                                          output(NULL),
+                                          inplace(inplace),
+                                          output_shape({})
+            {
+            }
+
+            /**
+             * @brief Destroy the Multiply2D object.
+             */
+            ~Mul2D()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape.
+             * NOTE: input0.shape must equal to input1.shape.
+             * 
+             * @param input0 as one input
+             * @param input1 as another input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input0, Tensor<feature_t> &input1, bool print_shape = false)
+            {
+                assert(input0.is_same_shape(input1));
+                this->output_shape = input0.shape;
+
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_exponent(this->output_exponent);
+                    this->output->set_shape(this->output_shape);
+                    this->output->free_element();
+                }
+
+                else
+                {
+                    this->output = &input0;
+                }
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& Mul2D result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call Mul2D operation.
+             * 
+             * @param input0      as one input
+             * @param input1      as another input
+             * @param assign_core not effective yet
+             * @return Mul2D result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input0, Tensor<feature_t> &input1, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    this->output->malloc_element();
+                    this->output->set_exponent(this->output_exponent);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                    DL_LOG_LAYER_LATENCY_START();
+                    nn::mul2d(*this->output, input0, input1, this->activation, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "mul2d");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    nn::mul2d(*this->output, input0, input1, this->activation, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "mul2d");
+                }
+
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_pad.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_pad.hpp
new file mode 100644
index 00000000000..4096286f07c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_pad.hpp
@@ -0,0 +1,169 @@
+#pragma once
+
+#include "dl_nn_pad.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Pad.
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class Pad : public Layer
+        {
+        private:
+            std::vector<int> paddings;
+            std::vector<feature_t> constant_values;
+            padding_mode_t mode;
+            Tensor<feature_t> *output;     /*<! output ptr of Pad >*/
+            std::vector<int> output_shape; /*<! output shape of Pad >*/
+
+        public:
+            Pad(std::vector<int> paddings,
+                std::vector<feature_t> constant_values = {0},
+                padding_mode_t mode = PADDING_CONSTANT,
+                const char *name = "Pad") : Layer(name),
+                                            paddings(paddings),
+                                            constant_values(constant_values),
+                                            mode(mode)
+            {
+                this->output = new Tensor<feature_t>;
+            }
+
+            /**
+             * @brief Destroy the Pad object.
+             * 
+             */
+            ~Pad()
+            {
+                if (this->output != NULL)
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output padding and input padding.
+             * 
+             * @param input as an input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                assert(this->paddings.size() > 0);
+                int input_dims = input.shape.size();
+                int padding_dims = input_dims * 2;
+                if (this->paddings.size() == 1)
+                {
+                    std::vector<int> _paddings(padding_dims, 0);
+                    for (int i = 0; i < padding_dims; ++i)
+                    {
+                        _paddings[i] = this->paddings[0];
+                    }
+                    this->paddings = _paddings;
+                }
+                else if (this->paddings.size() == 2)
+                {
+                    std::vector<int> _paddings(padding_dims, 0);
+                    for (int i = 0; i < input_dims; ++i)
+                    {
+                        _paddings[2 * i] = this->paddings[0];
+                        _paddings[2 * i + 1] = this->paddings[1];
+                    }
+                    this->paddings = _paddings;
+                }
+                else
+                {
+                    assert(this->paddings.size() == padding_dims);
+                }
+
+                if (this->mode == PADDING_CONSTANT)
+                {
+                    if (this->constant_values.size() == 1)
+                    {
+                        std::vector<feature_t> _constant_values(padding_dims, 0);
+                        for (int i = 0; i < padding_dims; ++i)
+                        {
+                            _constant_values[i] = this->constant_values[0];
+                        }
+                        this->constant_values = _constant_values;
+                    }
+                    else if (this->constant_values.size() == 2)
+                    {
+                        std::vector<feature_t> _constant_values(padding_dims, 0);
+                        for (int i = 0; i < input_dims; ++i)
+                        {
+                            _constant_values[2 * i] = this->constant_values[0];
+                            _constant_values[2 * i + 1] = this->constant_values[1];
+                        }
+                        this->constant_values = _constant_values;
+                    }
+                    else
+                    {
+                        assert(constant_values.size() == padding_dims);
+                    }
+                }
+                this->output_shape = input.shape;
+                for (int i = 0; i < input_dims; ++i)
+                {
+                    this->output_shape[i] += (this->paddings[2 * i] + this->paddings[2 * i + 1]);
+                }
+
+                this->output->set_shape(this->output_shape);
+                this->output->set_exponent(input.exponent);
+                this->output->free_element();
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& Pad result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call Pad operation
+             * 
+             * @param input           as an input.
+             * @param autoload_enable one of true or false, 
+             *                        - true: load input and output from PSRAM to CACHE automatically
+             *                        - false: do not
+             * @param assign_core     not effective yet
+             * @return Pad result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                DL_LOG_LAYER_LATENCY_START();
+                if (this->output->shape != this->output_shape)
+                {
+                    this->output->set_shape(this->output_shape);
+                }
+                this->output->malloc_element();
+                this->output->set_exponent(input.exponent);
+                DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                DL_LOG_LAYER_LATENCY_START();
+                nn::pad(*this->output, input, this->paddings, this->constant_values, this->mode, assign_core);
+                DL_LOG_LAYER_LATENCY_END(this->name, "pad");
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_prelu.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_prelu.hpp
new file mode 100644
index 00000000000..2141e986646
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_prelu.hpp
@@ -0,0 +1,145 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn_prelu.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief PRelu(input).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class PRelu : public Layer
+        {
+        private:
+            const feature_t *activation_element; /*<! quantized alpha elements along channel axis >*/
+            int activation_exponent;       /*<! exponent of quantized alpha elements >*/
+            Tensor<feature_t> *output;     /*<! output ptr of prelu >*/
+            bool inplace;                  /*<! true: the output will store to input0
+                                                false: the output will store to a separate memory >*/
+            std::vector<int> output_shape; /*<! output shape of prelu >*/
+        public:
+            /**
+             * @brief Construct a new PRelu object
+             * 
+             * @param activation_element   quantized alpha elements along channel axis
+             * @param activation_exponent  exponent of quantized alpha elements
+             * @param name                 name of prelu
+             * @param inplace              true: the output will store to input0
+             *                             false: the output will store to a separate memory
+             */
+            PRelu(const feature_t *activation_element,
+                  const int activation_exponent = 0,
+                  const char *name = "PRelu",
+                  bool inplace = false) : Layer(name),
+                                            activation_element(activation_element),
+                                            activation_exponent(activation_exponent),
+                                            output(NULL),
+                                            inplace(inplace),
+                                            output_shape({})
+            {
+            }
+
+            /**
+             * @brief Destroy the PRelu object
+             * 
+             */
+            ~PRelu()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape and exponent
+             * 
+             * @param input       as an input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                this->output_shape = input.shape;
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_exponent(input.exponent);
+                    this->output->set_shape(this->output_shape);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input;
+                }
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& PRelu result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call PRelu operation.
+             * 
+             * @param input       as an input
+             * @param assign_core not effective yet
+             * @return PRelu result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    this->output->set_exponent(input.exponent);
+                    this->output->malloc_element();
+                    DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                    DL_LOG_LAYER_LATENCY_START();
+                    nn::prelu(*this->output, input, this->activation_element, this->activation_exponent, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "prelu");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    nn::prelu(*this->output, input, this->activation_element, this->activation_exponent, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "prelu");
+                }
+
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_relu.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_relu.hpp
new file mode 100644
index 00000000000..dff05c7f420
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_relu.hpp
@@ -0,0 +1,135 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_tool.hpp"
+#include "dl_nn_relu.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief ReLU(input).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class Relu : public Layer
+        {
+        private:
+            Tensor<feature_t> *output;     /*<! output ptr of relu >*/
+            bool inplace;                  /*<! true: the output will store to input0
+                                                false: the output will store to a separate memory >*/
+            std::vector<int> output_shape; /*<! output shape of relu >*/
+        public:
+            /**
+             * @brief Construct a new ReLU object
+             * 
+             * @param name            name of relu
+             * @param inplace         true: the output will store to input0
+             *                        false: the output will store to a separate memory
+             */
+            Relu(const char *name = "Relu", bool inplace = false) : Layer(name),
+                                                                    output(NULL), inplace(inplace), output_shape({})
+            {
+            }
+
+            /**
+             * @brief Destroy the ReLU object
+             * 
+             */
+            ~Relu()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape and exponent
+             * 
+             * @param input       as an input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                this->output_shape = input.shape;
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_exponent(input.exponent);
+                    this->output->set_shape(this->output_shape);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input;
+                }
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& ReLU result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call ReLU operation.
+             * 
+             * @param input       as an input
+             * @param assign_core not effective yet
+             * @return ReLU result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    this->output->malloc_element();
+                    this->output->set_exponent(input.exponent);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                    DL_LOG_LAYER_LATENCY_START();
+                    nn::relu(*this->output, input, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "relu");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    nn::relu(*this->output, input, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "relu");
+                }
+
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_reshape.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_reshape.hpp
new file mode 100644
index 00000000000..2ef76ef96d8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_reshape.hpp
@@ -0,0 +1,128 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_tool.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief  Reshape(input)
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class Reshape : public Layer
+        {
+        private:
+            int output_exponent;           /*<! exponent of output >*/
+            Tensor<feature_t> *output;     /*<! output ptr of Reshape >*/
+            bool inplace;                  /*<! true: the output will store to input0
+                                                false: the output will store to a separate memory >*/
+            std::vector<int> output_shape; /*<! output shape of Reshape >*/
+        public:
+            /**
+             * @brief Construct a new Reshape object
+             * 
+             * @param shape      the target shape
+             * @param name       name of Reshape layer
+             * @param inplace    true: the output will store to input0
+             *                   false: the output will store to a separate memory
+             */
+            Reshape(std::vector<int> shape, const char *name = "Reshape", bool inplace = false) : Layer(name),
+                                                                                                  output(NULL),
+                                                                                                  inplace(inplace),
+                                                                                                  output_shape(shape)
+            {
+            }
+
+            /**
+             * @brief Destroy the Reshape object
+             * 
+             */
+            ~Reshape()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+            * @brief             Update output shape and exponent
+            * 
+            * @param input        as an input
+            * @param print_shape  whether to print the output shape.
+            */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                this->output_exponent = input.exponent;
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_exponent(this->output_exponent);
+                    this->output->set_shape(input.shape);
+                    this->output->reshape(this->output_shape);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input;
+                    this->output->reshape(this->output_shape);
+                }
+                this->output_shape = this->output->shape;
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& Reshape result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call Reshape operation.
+             * 
+             * @param input  as an input
+             * @return Tensor<feature_t>& Reshape result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    this->output->set_exponent(input.exponent);
+                    this->output->reshape(this->output_shape);
+                    this->output->copy_element(input, true);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "reshape");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    this->output->reshape(this->output_shape);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "reshape");
+                }
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_squeeze.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_squeeze.hpp
new file mode 100644
index 00000000000..710901a3d02
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_squeeze.hpp
@@ -0,0 +1,130 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_tool.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief 
+         * 
+         * @tparam feature_t 
+         */
+        template <typename feature_t>
+        class Squeeze : public Layer
+        {
+        private:
+            int output_exponent;           /*<! exponent of output >*/
+            Tensor<feature_t> *output;     /*<! output ptr of Squeeze >*/
+            bool inplace;                  /*<! true: the output will store to input0
+                                                 false: the output will store to a separate memory >*/
+            int axis;                      /*<! the dim to to be remove. make sure the length of the dim is equal to 1.
+                                            if axis == INT32_MAX, all the dims with length==1 will be removed. >*/
+            std::vector<int> output_shape; /*<! output shape of AvgPool2D >*/
+        public:
+            /**
+             * @brief Construct a new Squeeze object
+             * 
+             * @param axis the dim to to be remove. make sure the length of the dim is equal to 1.
+             *             if axis == INT32_MAX, all the dims with length==1 will be removed.
+             * @param name      name of Squeeze layer
+             * @param inplace   true: the output will store to input0
+             *                  false: the output will store to a separate memory
+             */
+            Squeeze(int axis = INT32_MAX, const char *name = "Squeeze", bool inplace = false) : Layer(name),
+                                                                                                output(NULL),
+                                                                                                inplace(inplace),
+                                                                                                axis(axis),
+                                                                                                output_shape({})
+            {
+            }
+
+            /**
+             * @brief Destroy the Squeeze object
+             * 
+             */
+            ~Squeeze()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+            * @brief Update output shape and exponent
+            * 
+            * @param input as an input
+            * @param print_shape  whether to print the output shape.
+            */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                this->output_exponent = input.exponent;
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_exponent(this->output_exponent);
+                    this->output->set_shape(input.shape);
+                    this->output->squeeze(this->axis);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input;
+                    this->output->squeeze(this->axis);
+                }
+                this->output_shape = this->output->shape;
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& Squeeze result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief  Call Squeeze operation.
+             * 
+             * @param input as an input
+             * @return Tensor<feature_t>& Squeeze result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    this->output->set_exponent(input.exponent);
+                    this->output->set_shape(this->output_shape);
+                    this->output->copy_element(input, true);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "Squeeze");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    this->output->set_shape(this->output_shape);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "Squeeze");
+                }
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_sub2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_sub2d.hpp
new file mode 100644
index 00000000000..61bcc9f2804
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_sub2d.hpp
@@ -0,0 +1,145 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn_sub2d.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief Activation(Sub2D(input0, input1)).
+         * NOTE: subtraction is element-wise, i.e., output[i,j,k] = input0[i,j,k] - input1[i,j,k]
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         */
+        template <typename feature_t>
+        class Sub2D : public Layer
+        {
+        private:
+            const int output_exponent;               /*<! exponent of output >*/
+            const Activation<feature_t> *activation; /*<! activation of Sub2D, if you don't specify anything, no activation is applied >*/
+            Tensor<feature_t> *output;               /*<! output ptr of Sub2D >*/
+            bool inplace;                            /*<! true: the output will store to input0
+                                                            false: the output will store to a separate memory >*/
+            std::vector<int> output_shape;           /*<! output shape of Sub2D >*/
+        public:
+            /**
+             * @brief Construct a new Sub2D object.
+             * 
+             * @param output_exponent exponent of output
+             * @param activation      activation of Mul2D, if you don't specify anything, no activation is applied
+             * @param name            name of layer
+             * @param inplace         true: the output will store to input0
+             *                        false: the output will store to a separate memory
+             */
+            Sub2D(const int output_exponent, const Activation<feature_t> *activation = NULL, const char *name = "Sub2D", bool inplace = false) : Layer(name),
+                                                                                                                                                 output_exponent(output_exponent), 
+                                                                                                                                                 activation(activation), 
+                                                                                                                                                 output(NULL), 
+                                                                                                                                                 inplace(inplace), 
+                                                                                                                                                 output_shape({})
+            {
+            }
+
+            /**
+             * @brief Destroy the Sub2D object.
+             */
+            ~Sub2D()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+             * @brief Update output shape.
+             * NOTE: input0.shape must equal to input1.shape.
+             * 
+             * @param input0 as one input
+             * @param input1 as another input
+             * @param print_shape  whether to print the output shape.
+             */
+            void build(Tensor<feature_t> &input0, Tensor<feature_t> &input1, bool print_shape = false)
+            {
+                assert(input0.is_same_shape(input1));
+                this->output_shape = input0.shape;
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_exponent(this->output_exponent);
+                    this->output->set_shape(this->output_shape);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input0;
+                }
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& Sub2D result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call Sub2D operation.
+             * 
+             * @param input0      as one input
+             * @param input1      as another input
+             * @param assign_core not effective yet
+             * @return Sub2D result
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input0, Tensor<feature_t> &input1, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    this->output->malloc_element();
+                    this->output->set_exponent(input0.exponent);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "apply");
+
+                    DL_LOG_LAYER_LATENCY_START();
+                    nn::sub2d(*this->output, input0, input1, this->activation, assign_core);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "sub2d");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    if (this->output->shape != this->output_shape)
+                    {
+                        this->output->set_shape(this->output_shape);
+                    }
+                    nn::sub2d(*this->output, input0, input1, this->activation, assign_core, this->output_exponent);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "sub2d");
+                }
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_transpose.hpp b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_transpose.hpp
new file mode 100644
index 00000000000..87e9cce5ce4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/layer/dl_layer_transpose.hpp
@@ -0,0 +1,141 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_tool.hpp"
+#include "dl_layer_base.hpp"
+
+namespace dl
+{
+    namespace layer
+    {
+        /**
+         * @brief 
+         * 
+         * @tparam feature_t 
+         */
+        template <typename feature_t>
+        class Transpose : public Layer
+        {
+        private:
+            int output_exponent;           /*<! exponent of output >*/
+            Tensor<feature_t> *output;     /*<! output ptr of Transpose >*/
+            bool inplace;                  /*<! true: the output will store to input0
+                                                false: the output will store to a separate memory >*/
+            std::vector<int> perm;         /*<! the new arangement of the dims. if perm == {}, the dims arangement will be reversed. >*/
+            std::vector<int> output_shape; /*<! output shape of Transpose >*/
+        public:
+            /**
+             * @brief Construct a new Transpose object
+             * 
+             * @param perm          the new arangement of the dims. if perm == {}, the dims arangement will be reversed.
+             * @param name          name of Transpose layer
+             * @param inplace       true: the output will store to input
+             *                      false: the output will store to a separate memory
+             */
+            Transpose(std::vector<int> perm = {}, const char *name = "Transpose", bool inplace = false) : Layer(name),
+                                                                                                          output(NULL),
+                                                                                                          inplace(inplace),
+                                                                                                          perm(perm),
+                                                                                                          output_shape({})
+            {
+            }
+
+            /**
+             * @brief Destroy the Transpose object
+             * 
+             */
+            ~Transpose()
+            {
+                if ((!this->inplace) && (this->output != NULL))
+                {
+                    delete this->output;
+                }
+            }
+
+            /**
+            * @brief Update output shape and exponent
+            * 
+            * @param input as an input
+            * @param print_shape  whether to print the output shape.
+            */
+            void build(Tensor<feature_t> &input, bool print_shape = false)
+            {
+                this->output_exponent = input.exponent;
+                this->output_shape = input.shape;
+                int dims = this->output_shape.size();
+                if (this->perm.size() == 0)
+                {
+                    for (int i = dims - 1; i >= 0; i--)
+                    {
+                        this->perm.push_back(i);
+                    }
+                }
+                for (int i = 0; i < dims; ++i)
+                {
+                    if (this->perm[i] < 0)
+                        this->perm[i] = dims + this->perm[i];
+                    this->output_shape[i] = input.shape[this->perm[i]];
+                }
+
+                if (!this->inplace)
+                {
+                    if (this->output == NULL)
+                    {
+                        this->output = new Tensor<feature_t>;
+                    }
+                    this->output->set_exponent(this->output_exponent);
+                    this->output->set_shape(this->output_shape);
+                    this->output->free_element();
+                }
+                else
+                {
+                    this->output = &input;
+                    this->output->set_shape(this->output_shape);
+                }
+
+                if (print_shape)
+                {
+                    std::cout << this->name << " | ";
+                    this->output->print_shape();
+                }
+            }
+
+            /**
+             * @brief Get the output
+             * 
+             * @return Tensor<feature_t>& Transpose result
+             */
+            Tensor<feature_t> &get_output()
+            {
+                return *this->output;
+            }
+
+            /**
+             * @brief Call Transpose operation.
+             * 
+             * @param input as an input.
+             * @return Tensor<feature_t>& Transpose result.
+             */
+            Tensor<feature_t> &call(Tensor<feature_t> &input)
+            {
+                DL_LOG_LAYER_LATENCY_INIT();
+
+                if (!this->inplace)
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    this->output->set_exponent(input.exponent);
+                    this->output->transpose(input, this->perm);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "transpose");
+                }
+                else
+                {
+                    DL_LOG_LAYER_LATENCY_START();
+                    this->output->transpose(this->perm);
+                    DL_LOG_LAYER_LATENCY_END(this->name, "transpose");
+                }
+                return *this->output;
+            }
+        };
+    } // namespace layer
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/math/dl_math.hpp b/tools/sdk/esp32s3/include/esp-dl/include/math/dl_math.hpp
new file mode 100644
index 00000000000..d3f2b94d3de
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/math/dl_math.hpp
@@ -0,0 +1,188 @@
+#pragma once
+
+#include "dl_define.hpp"
+
+namespace dl
+{
+    namespace math
+    {
+        /**
+         * @brief x^a.
+         * 
+         * @param x as a base
+         * @param a as an exponent
+         * @return x^a
+         */
+        inline float power(float x, int a)
+        {
+            if (a > 0)
+            {
+                return x * power(x, a - 1);
+            }
+            else if (a < 0)
+            {
+                return 1 / (x * power(x, -a - 1));
+            }
+            else
+            {
+                return 1.f;
+            }
+        }
+
+        /**
+         * @brief sqrt(x).
+         * 
+         * @param x as a base
+         * @return sqrt(x)
+         */
+        inline float sqrt_quick(float x)
+        {
+            const int result = 0x1fbb4000 + (*(int *)&x >> 1);
+            return *(float *)&result;
+        }
+
+        /**
+         * @brief 1/sqrt(x).
+         * 
+         * @param x as a base
+         * @return 1/sqrt(x)
+         */
+        inline float sqrt_reciprocal_quick(float x)
+        {
+            float xhalf = 0.5f * x;
+            int i = *(int *)&x;             // get bits for floating value
+            i = 0x5f375a86 - (i >> 1);      // gives initial guess y0
+            x = *(float *)&i;               // convert bits back to float
+            x = x * (1.5f - xhalf * x * x); // Newton step, repeating increases accuracy
+            return x;
+        }
+
+        static const float EN = 0.00001f;
+
+        /**
+         * @brief sqrt(x).
+         * 
+         * @param x as a base
+         * @return sqrt(x)
+         */
+        inline float sqrt_newton(float x)
+        {
+            /**
+            * Use Newton iteration method to find the square root
+            * */
+            if (x == 0.f)
+                return 0.f;
+            float result = x;
+            float last_value;
+            do
+            {
+                last_value = result;
+                result = (last_value + x / last_value) * 0.5;
+            } while (DL_ABS(result - last_value) > EN);
+            return result;
+        }
+
+        /**
+         * @brief n-th root of x.
+         * 
+         * @param x as a base
+         * @param n root times
+         * @return n-th root of x
+         */
+        inline float root_newton(float x, int n)
+        {
+            if (n == 2)
+                return sqrt_newton(x);
+            if (n == 0)
+                return 1.f;
+            if (n == 1)
+                return x;
+            if (x == 0.f)
+                return 0.f;
+            float result = x;
+            float last_value;
+            float _n = (float)((n - 1) * n);
+            do
+            {
+                last_value = result;
+                result = _n * last_value + x / (n * power(last_value, n - 1));
+            } while (DL_ABS(result - last_value) > EN);
+            return result;
+        }
+
+        /**
+         * @brief atan(x).
+         * 
+         * @param x as an input
+         * @return atan(x) in range [-pi/2, pi/2]
+         */
+        inline float atan(float x)
+        {
+            return x * (0.78539816 - (DL_ABS(x) - 1) * (0.2447 + 0.0663 * DL_ABS(x)));
+            // float s = x*x;
+            // return ((-0.0464964749 * s + 0.15931422) * s - 0.327622764) * s * x + x;
+        }
+
+        // TODO:@yuanjiong
+        /**
+         * @brief 
+         * 
+         * @param x
+         * @param y 
+         * @return in range [-pi, pi]
+         */
+        inline float atan2(float x, float y)
+        {
+            float ax = DL_ABS(x);
+            float ay = DL_ABS(y);
+            float eps = 1e-8;
+            float a = DL_MIN(ax, ay) / (DL_MAX(ax, ay) + eps);
+            float r = atan(a); //[0, pi/2]
+            if (ay > ax)
+                r = 1.57079633 - r;
+            if (x < 0)
+                r = 3.14159265 - r;
+            if (y < 0)
+                r = -r;
+
+            return r;
+        }
+
+        /**
+         * @brief acos(x).
+         * 
+         * @param x as an input
+         * @return acos(x) in range [-pi/2, pi/2]
+         */
+        inline float acos(float x)
+        {
+            return atan2(x, sqrt_newton(1.0 - x * x));
+        }
+
+        /**
+         * @brief asin(x).
+         * 
+         * @param x as an input
+         * @return asin(x) in range [0, pi]
+         */
+        inline float asin(float x)
+        {
+            return atan2(sqrt_newton(1.0 - x * x), x);
+        }
+
+        /**
+         * @brief e^x
+         * 
+         * @param x     exponent
+         * @param steps iteration steps
+         * @return e^x
+         */
+        inline float exp_fast(double x, int steps)
+        {
+            x = 1.0 + x / (1 << steps);
+            for (int i = 0; i < steps; i++)
+                x *= x;
+            return x;
+        }
+    }
+}
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/math/dl_math_matrix.hpp b/tools/sdk/esp32s3/include/esp-dl/include/math/dl_math_matrix.hpp
new file mode 100644
index 00000000000..30718f85c32
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/math/dl_math_matrix.hpp
@@ -0,0 +1,397 @@
+#pragma once
+
+#include <stdint.h>
+#include <stdio.h>
+#include <math.h>
+#include <vector>
+#include "dl_define.hpp"
+#include "dl_tool.hpp"
+#include "dl_variable.hpp"
+#include "esp_timer.h"
+
+namespace dl
+{
+    namespace math
+    {
+        /**
+         * @brief the Matrix class
+         * 
+         * @tparam T 
+         */
+        template <typename T>
+        class Matrix
+        {
+        public:
+            T **array;
+            int h;
+            int w;
+            Matrix() : h(0), w(0)
+            {
+                this->array = NULL;
+            }
+
+            Matrix(int h, int w) : h(h), w(w)
+            {
+                this->calloc_element();
+            }
+
+            Matrix(int h, int w, T s) : h(h), w(w)
+            {
+                this->calloc_element();
+                this->set_value(s);
+            }
+
+            Matrix(const Matrix<T> &mat) : h(mat.h), w(mat.w)
+            {
+                this->calloc_element();
+                this->set_value(mat);
+            }
+            virtual ~Matrix()
+            {
+                if (this->array != NULL)
+                {
+                    for (int i = 0; i < this->h; i++)
+                    {
+                        free(this->array[i]);
+                    }
+                    free(this->array);
+                    this->array = NULL;
+                }
+            }
+
+            /**
+             * @brief calloc the matrix element 
+             * 
+             */
+            void calloc_element()
+            {
+                if ((this->h > 0) && (this->w > 0))
+                {
+                    this->array = (T **)calloc(this->h, sizeof(T *));
+                    for (int i = 0; i < this->h; i++)
+                    {
+                        this->array[i] = (T *)calloc(this->w, sizeof(T));
+                    }
+                }
+                else
+                {
+                    this->array = NULL;
+                }
+            }
+
+            /**
+             * @brief Set the matrix element to random number.
+             * 
+             * @param thresh the max abs value of the element. 
+             */
+            void set_random(T thresh = 1)
+            {
+                unsigned int seed = esp_timer_get_time();
+                srand(seed);
+                for (int i = 0; i < this->h; i++)
+                {
+                    for (int j = 0; j < this->w; j++)
+                    {
+                        this->array[i][j] = ((T)rand()) / (T)(RAND_MAX)*thresh;
+                    }
+                }
+            }
+
+            /**
+             * @brief Set the small value to zero
+             * 
+             * @param thresh the threshold of small value 
+             */
+            void set_zero(T thresh = 1e-8)
+            {
+                for (int i = 0; i < this->h; i++)
+                {
+                    for (int j = 0; j < this->w; j++)
+                    {
+                        if (DL_ABS(this->array[i][j]) < thresh)
+                        {
+                            this->array[i][j] = 0;
+                        }
+                    }
+                }
+            }
+
+            /**
+             * @brief Set the matrix value from a vector
+             * 
+             * @tparam TT 
+             * @param mat   the input vector
+             */
+            template <typename TT>
+            void set_value(std::vector<TT> mat)
+            {
+                int area = this->w * this->h;
+                assert(area == mat.size());
+                int index = 0;
+                for (int i = 0; i < this->h; i++)
+                {
+                    for (int j = 0; j < this->w; j++)
+                    {
+                        this->array[i][j] = (T)(mat[index++]);
+                    }
+                }
+            }
+
+            /**
+             * @brief Set the matrix value from another matrix.
+             * 
+             * @tparam TT 
+             * @param mat the input matrix.
+             */
+            template <typename TT>
+            void set_value(const Matrix<TT> &mat)
+            {
+                assert((this->h == mat.h) && (this->w == mat.w));
+                for (int i = 0; i < this->h; i++)
+                {
+                    for (int j = 0; j < this->w; j++)
+                    {
+                        this->array[i][j] = (T)(mat.array[i][j]);
+                    }
+                }
+            }
+
+            /**
+             * @brief Set a part of the matrix value from another matrix.
+             * 
+             * @param h_start    the start index of height
+             * @param h_end      the end index of height
+             * @param w_start    the start index of width
+             * @param w_end      the end index of width
+             * @param mat        the input matrix
+             */
+            void set_value(int h_start, int h_end, int w_start, int w_end, const Matrix<T> &mat)
+            {
+                int h = h_end - h_start;
+                int w = w_end - w_start;
+
+                assert((h == mat.h) && (w == mat.w));
+                assert((h_end <= this->h) && (w_end <= this->w) && (h_start >= 0) && (w_start >= 0));
+                for (int i = 0; i < h; i++)
+                {
+                    for (int j = 0; j < w; j++)
+                    {
+                        this->array[i + h_start][j + w_start] = mat.array[i][j];
+                    }
+                }
+            }
+
+            /**
+             * @brief Set the matrix value to a constant.
+             * 
+             * @tparam TT 
+             * @param s  the input value.
+             */
+            template <typename TT>
+            void set_value(TT s)
+            {
+                for (int i = 0; i < this->h; i++)
+                {
+                    for (int j = 0; j < this->w; j++)
+                    {
+                        this->array[i][j] = (T)s;
+                    }
+                }
+            }
+
+            /**
+             * @brief print the matrix element.
+             * 
+             */
+            void print_value() const
+            {
+                printf("h: %d, w: %d\n", this->h, this->w);
+                for (int i = 0; i < this->h; i++)
+                {
+                    for (int j = 0; j < this->w; j++)
+                    {
+                        printf("%f ", (float)(this->array[i][j]));
+                    }
+                    printf("\n");
+                }
+            }
+
+            /**
+             * @brief  do matrix multiply
+             * 
+             * @param input     the input matrix
+             * @return Matrix<T> the output matrix
+             */
+            Matrix<T> matmul(const Matrix<T> &input) const;
+
+            /**
+             * @brief transpose the matrix
+             * 
+             * @return Matrix<T> the transposed matrix
+             */
+            Matrix<T> transpose() const;
+
+            /**
+             * @brief get the inverse matrix
+             * 
+             * @return Matrix<T> the output matrix
+             */
+            Matrix<T> inverse() const;
+
+            /**
+             * @brief get the diagonal of the matrix
+             * 
+             * @return Matrix<T> the diagonal
+             */
+            Matrix<T> diagonal() const;
+
+            /**
+             * @brief slice the matrix
+             * 
+             * @param h_start   the start index of height
+             * @param h_end     the end index of height
+             * @param w_start   the start index of width
+             * @param w_end     the end index of width
+             * @return Matrix<T> the output.
+             */
+            Matrix<T> slice(int h_start, int h_end, int w_start, int w_end) const;
+
+            /**
+             * @brief get an identity matrix
+             * 
+             * @param n     the dim of the identity matrix
+             * @return Matrix<T>  the output
+             */
+            static Matrix<T> identity(int n)
+            {
+                Matrix<T> A(n, n);
+                for (int i = 0; i < n; ++i)
+                {
+                    A.array[i][i] = 1;
+                }
+                return A;
+            }
+
+            /**
+             * @brief get a diag matrix
+             * 
+             * @param d  the diagonal value.
+             * @return Matrix<T>  the output
+             */
+            static Matrix<T> diag(const Matrix<T> &d)
+            {
+                assert(d.h == 1);
+                Matrix<T> A(d.w, d.w);
+                for (int i = 0; i < d.w; ++i)
+                {
+                    A.array[i][i] = d.array[0][i];
+                }
+                return A;
+            }
+
+
+            static Matrix<T> arange(uint32_t n)
+            {
+                Matrix<T> A(1, n);
+                for (int i = 0; i < n; ++i)
+                {
+                    A.array[0][i] = i;
+                }
+                return A;
+            }
+
+            static Matrix<T> arange(uint32_t n1, uint32_t n2)
+            {
+                int len = n2 - n1;
+                assert(len > 0);
+                Matrix<T> A(1, len);
+                for (int i = 0; i < len; ++i)
+                {
+                    A.array[0][i] = n1 + i;
+                }
+
+                return A;
+            }
+
+            /**
+             * @brief get the F_norm of the matrix
+             * 
+             * @return T the output F_norm
+             */
+            T F_norm() const
+            {
+                T f_n = 0.0;
+                for (int i = 0; i < this->h; ++i)
+                {
+                    for (int j = 0; j < this->w; ++j)
+                    {
+                        f_n += (this->array[i][j] * this->array[i][j]);
+                    }
+                }
+                f_n = sqrt_newton(f_n);
+                return f_n;
+            }
+
+            Matrix<T> &operator=(const Matrix<T> &A)
+            {
+                if ((A.h == this->h) && (A.w == this->w))
+                {
+                    for (int i = 0; i < A.h; ++i)
+                    {
+                        for (int j = 0; j < A.w; ++j)
+                        {
+                            this->array[i][j] = A.array[i][j];
+                        }
+                    }
+                }
+                else
+                {
+                    if (this->array != NULL)
+                    {
+                        for (int i = 0; i < this->h; ++i)
+                        {
+                            free(this->array[i]);
+                        }
+                        free(this->array);
+                        this->array = NULL;
+                    }
+                    this->h = A.h;
+                    this->w = A.w;
+                    if ((A.h > 0) && (A.w > 0))
+                    {
+                        this->calloc_element();
+                        this->set_value(A);
+                    }
+                }
+                return *this;
+            }
+        };
+
+        /**
+         * @brief Get the affine transform matrix
+         * 
+         * @param source_coord the source coordinates
+         * @param dest_coord   the target coordinates
+         * @return Matrix<float> the output matrix
+         */
+        Matrix<float> get_affine_transform(Matrix<float> &source_coord, Matrix<float> &dest_coord);
+        
+        /**
+         * @brief Get the similarity transform matrix
+         * 
+         * @param source_coord the source coordinates
+         * @param dest_coord the target coordinates
+         * @return Matrix<float> the output matrix
+         */
+        Matrix<float> get_similarity_transform(Matrix<float> &source_coord, Matrix<float> &dest_coord);
+        
+        /**
+         * @brief Get the perspective transform matrix
+         * 
+         * @param source_coord the source coordinates
+         * @param dest_coord   the target coordinates
+         * @return Matrix<float> the output matrix
+         */
+        Matrix<float> get_perspective_transform(Matrix<float> &source_coord, Matrix<float> &dest_coord);
+    } // namespace math
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/cat_face_detect_mn03.hpp b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/cat_face_detect_mn03.hpp
new file mode 100644
index 00000000000..6d952dc44ab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/cat_face_detect_mn03.hpp
@@ -0,0 +1,47 @@
+#pragma once
+
+#include <stdint.h>
+#include <vector>
+#include <list>
+#include "dl_detect_define.hpp"
+
+/**
+ * @brief Hardware Requirement.
+ *        - flash 310kB
+ */
+
+class CatFaceDetectMN03
+{
+private:
+    void *model;
+
+public:
+    /**
+     * @brief Construct a new Cat Face Detect MN03 object.
+     * 
+     * @param score_threshold predicted boxes with score lower than the threshold will be filtered out
+     * @param nms_threshold   predicted boxes with IoU higher than the threshold will be filtered out
+     * @param top_k           first k highest score boxes will be remained
+     * @param resize_scale    resize scale to implement on input image
+     */
+    CatFaceDetectMN03(const float score_threshold, const float nms_threshold, const int top_k, const float resize_scale);
+
+    /**
+     * @brief Destroy the Cat Face Detect MN03 object.
+     * 
+     */
+    ~CatFaceDetectMN03();
+
+    /**
+     * @brief Inference.
+     * 
+     * @tparam T supports uint8_t and uint16_t
+     *         - uint8_t: input image is RGB888
+     *         - uint16_t: input image is RGB565
+     * @param input_element pointer of input image
+     * @param input_shape   shape of input image
+     * @return detection result
+     */
+    template <typename T>
+    std::list<dl::detect::result_t> &infer(T *input_element, std::vector<int> input_shape);
+};
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/color_detector.hpp b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/color_detector.hpp
new file mode 100644
index 00000000000..f79f98c0fd2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/color_detector.hpp
@@ -0,0 +1,366 @@
+#pragma once
+
+#include "dl_image.hpp"
+
+typedef struct
+{
+    int area;                /*!< Area of connected domains >*/
+    std::vector<int> center; /*<! centroid of connected domains [x, y] >*/
+    std::vector<int> box;    /*<! [left_up_x, left_up_y, right_down_x, right_down_y] >*/
+} color_detect_result_t;
+
+typedef struct
+{
+    std::vector<int> start_col;
+    std::vector<int> end_col;
+    std::vector<int> row;
+    std::vector<int> index;
+    std::vector<int> area;
+} color_segment_result_t;
+
+typedef struct
+{
+    std::vector<uint8_t> color_thresh; /*!< threshold of colors, The threshold of each color is composed of 6 numbers >*/
+    int area_thresh;                   /*!< the area threshold of each color, 
+                                            the area that is smaller than the threshold is filtered >*/
+    std::string name;                  /*!<name of the color>*/
+} color_info_t;
+
+class ColorDetector
+{
+private:
+    std::vector<std::vector<color_detect_result_t>> detection_results; /*!< detection results >*/
+    std::vector<color_segment_result_t> segmentation_results;          /*!< segmentation results >*/
+    std::vector<color_info_t> registered_colors;                       /*!< the infomation of registered colors >*/
+    std::vector<uint8_t> color_thresh_offset;                          /*!< HSV offset of the registered colors>*/
+    std::vector<int> detection_shape;                                  /*!< the inference shape of images, the input image will be resized to this shape. 
+                                                                    if the shape == {}, the input image will not be resized >*/
+    bool bgr;                                                          /*!< true: the input image is in BGR format
+                                                                false: the input image is in RGB format >*/
+    int id_nums;                                                       /*!< the number of registered colors in history>*/
+    float h_ratio;
+    float w_ratio;
+    void color_detection_forward(dl::Tensor<uint8_t> &bin, int area_thresh);
+
+public:
+    /**
+     * @brief get the color threshold of rectangular region in the image
+     * 
+     * @param image the input image in RGB888 format.
+     * @param box   the coordinates of the rectanglar region : [left_up_x, left_up_y, right_down_x, right_down_y]
+     * @return std::vector<uint8_t> the threshold.
+     */
+    std::vector<uint8_t> cal_color_thresh(dl::Tensor<uint8_t> &image, std::vector<int> box);
+
+    /**
+     * @brief get the color threshold of rectangular region in the image
+     * 
+     * @param input the ptr of RGB565 image.
+     * @param input_shape shape of the input image.
+     * @param box the coordinates of the rectanglar region : [left_up_x, left_up_y, right_down_x, right_down_y]
+     * @return std::vector<uint8_t> the threshold.
+     */
+    std::vector<uint8_t> cal_color_thresh(uint16_t *input, std::vector<int> input_shape, std::vector<int> box);
+
+    /**
+     * @brief register a new color to the color detector
+     * 
+     * @param image the input image in RGB888 format.
+     * @param box the coordinates of the rectanglar region : [left_up_x, left_up_y, right_down_x, right_down_y]
+     * @param area_thresh the area threshold of the color
+     * @param id the index of the color
+     * @return int the number of the registered colors. if the id is not valid, return -1.
+     */
+    int register_color(dl::Tensor<uint8_t> &image, std::vector<int> box, int area_thresh = 256, std::string color_name = "", int id = -1);
+
+    /**
+     * @brief register a new color to the color detector
+     * 
+     * @param input the ptr of RGB565 image.
+     * @param input_shape shape of the input image.
+     * @param box the coordinates of the rectanglar region : [left_up_x, left_up_y, right_down_x, right_down_y]
+     * @param area_thresh the area threshold of the color
+     * @param id the index of the color
+     * @return int the number of the registered colors. if the id is not valid, return -1.
+     */
+    int register_color(uint16_t *input, std::vector<int> input_shape, std::vector<int> box, int area_thresh = 256, std::string color_name = "", int id = -1);
+
+    /**
+     * @brief register a new color to the color detector
+     * 
+     * @param color_thresh the color threshold
+     * @param area_thresh the area threshold of the color
+     * @param id the index of the color
+     * @return int the number of the registered colors. if the id is not valid, return -1.
+     */
+    int register_color(std::vector<uint8_t> color_thresh, int area_thresh = 256, std::string color_name = "", int id = -1);
+
+    /**
+     * @brief delete a registered color
+     * 
+     * @param id the index of the color
+     * @return int the number of the registered colors. if the id is not valid, return -1.
+     */
+    int delete_color(int id = -1);
+
+    /**
+     * @brief delete a registered color
+     * 
+     * @param color_name  name of the registered_color
+     * @return int the number of the registered colors. if the id is not valid, return -1.
+     */
+    int delete_color(std::string color_name);
+
+    /**
+     * @brief delete all the registered colors
+     * 
+     */
+    void clear_color();
+
+    /**
+     * @brief detect the colors based on the color thresholds
+     * 
+     * @param image the input image.
+     * @return std::vector<std::vector<color_detect_result_t>>&  detection result.
+     */
+    std::vector<std::vector<color_detect_result_t>> &detect(dl::Tensor<uint8_t> &image, std::vector<int> color_ids = {});
+
+    /**
+     * @brief 
+     * 
+     * @param input 
+     * @param input_shape 
+     * @return std::vector<std::vector<color_detect_result_t>>& 
+     */
+    std::vector<std::vector<color_detect_result_t>> &detect(uint16_t *input_shape, std::vector<int> shape, std::vector<int> color_ids = {});
+
+    /**
+     * @brief Construct a new Color Detector object
+     * 
+     * @param color_thresh_offset   HSV offset of the registered colors>
+     * @param detection_shape   the inference shape of images, the input image will be resized to this shape
+     * @param bgr           true: the input image is in BGR format
+     *                      false: the input image is in RGB format
+     */
+    ColorDetector(std::vector<uint8_t> color_thresh_offset = {}, std::vector<int> detection_shape = {}, bool bgr = true) : color_thresh_offset(color_thresh_offset),
+                                                                                                                           detection_shape(detection_shape), bgr(bgr), id_nums(0)
+    {
+    }
+
+    /**
+     * @brief Destroy the Color Detector object
+     * 
+     */
+    ~ColorDetector() {}
+
+    /**
+     * @brief Get the detection results object
+     * 
+     * @return std::vector<std::vector<color_detect_result_t>>& the detection result.
+     */
+    std::vector<std::vector<color_detect_result_t>> &get_detection_results()
+    {
+        return this->detection_results;
+    }
+
+    /**
+     * @brief Get the segmentation results object
+     * 
+     * @return std::vector<color_segment_result_t>& the segmentation result.
+     */
+    std::vector<color_segment_result_t> &get_segmentation_results()
+    {
+        return this->segmentation_results;
+    }
+
+    /**
+     * @brief Get the registered colors object
+     * 
+     * @return std::vector<color_info_t> the information of resgistered colors
+     */
+    std::vector<color_info_t> get_registered_colors()
+    {
+        return this->registered_colors;
+    }
+
+    /**
+     * @brief Set the color thresh offset object
+     * 
+     * @param color_thresh_offset the offset of color thresh for registered colors
+     * @return ColorDetector& 
+     */
+    ColorDetector &set_color_thresh_offset(std::vector<uint8_t> color_thresh_offset)
+    {
+        assert(color_thresh_offset.size() == 3);
+        this->color_thresh_offset = color_thresh_offset;
+        return *this;
+    }
+
+    /**
+     * @brief Get the color thresh offset object
+     * 
+     * @return std::vector<uint8_t> color_thresh_offset
+     */
+    std::vector<uint8_t> get_color_thresh_offset()
+    {
+        return this->color_thresh_offset;
+    }
+
+    /**
+     * @brief Set the area thresh object
+     * 
+     * @param area_thresh the area thresh for each registered colors
+     * @return ColorDetector& 
+     */
+    ColorDetector &set_area_thresh(std::vector<int> area_thresh)
+    {
+        assert((area_thresh.size() == this->registered_colors.size()) || (area_thresh.size() == 1));
+        if (area_thresh.size() == 1)
+        {
+            for (int i = 0; i < this->registered_colors.size(); ++i)
+            {
+                this->registered_colors[i].area_thresh = area_thresh[0];
+            }
+        }
+        else
+        {
+            for (int i = 0; i < this->registered_colors.size(); ++i)
+            {
+                this->registered_colors[i].area_thresh = area_thresh[i];
+            }
+        }
+        return *this;
+    }
+
+    /**
+     * @brief Set the area thresh object
+     * 
+     * @param area_thresh the area thresh for each registered colors
+     * @param id          index of the registered color
+     * @return ColorDetector& 
+     */
+    ColorDetector &set_area_thresh(int area_thresh, int id)
+    {
+        assert((id >= 0) && (id < this->registered_colors.size()));
+        this->registered_colors[id].area_thresh = area_thresh;
+        return *this;
+    }
+
+    /**
+     * @brief Set the bgr object
+     * 
+     * @param bgr 
+     * @return ColorDetector& 
+     */
+    ColorDetector &set_bgr(bool bgr)
+    {
+        this->bgr = bgr;
+        return *this;
+    }
+
+    /**
+     * @brief Get the bgr object
+     * 
+     * @return bool bgr flag
+     */
+    bool get_bgr()
+    {
+        return this->bgr;
+    }
+
+    /**
+     * @brief Get the detection shape object
+     * 
+     * @return std::vector<int> 
+     */
+    std::vector<int> get_detection_shape()
+    {
+        return this->detection_shape;
+    }
+
+    /**
+     * @brief Set the detection shape object
+     * 
+     * @param detection_shape the inference shape of images, the input image will be resized to this shape
+     * @return ColorDetector& 
+     */
+    ColorDetector &set_detection_shape(std::vector<int> detection_shape)
+    {
+        assert(detection_shape.size() == 3);
+        this->detection_shape = detection_shape;
+        return *this;
+    }
+
+    /**
+     * @brief Get the registered colors num
+     * 
+     * @return int the registered colors num
+     */
+    int get_registered_colors_num()
+    {
+        return this->registered_colors.size();
+    }
+
+    /**
+     * @brief print the detection detection results
+     * 
+     * @param tag
+     */
+    void print_detection_results(const char *tag = "RGB")
+    {
+        printf("\n%s | color detection result:\n", tag);
+        for (int i = 0; i < this->detection_results.size(); ++i)
+        {
+            printf("color %d: detected box :%d\n", i, this->detection_results[i].size());
+            for (int j = 0; j < this->detection_results[i].size(); ++j)
+            {
+                printf("center: (%d, %d)\n", this->detection_results[i][j].center[0], this->detection_results[i][j].center[1]);
+                printf("box: (%d, %d), (%d, %d)\n", this->detection_results[i][j].box[0], this->detection_results[i][j].box[1], this->detection_results[i][j].box[2], this->detection_results[i][j].box[3]);
+                printf("area: %d\n", this->detection_results[i][j].area);
+            }
+            printf("\n");
+        }
+    }
+
+    /**
+     * @brief print the segmentation results
+     * 
+     * @param tag 
+     */
+    void print_segmentation_results(const char *tag = "RGB")
+    {
+        printf("\n%s | color segmentation result:\n", tag);
+        for (int i = 0; i < this->segmentation_results.size(); ++i)
+        {
+            printf("color %d: detected box :%d\n", i, this->detection_results[i].size());
+            for (int j = 0; j < this->segmentation_results[i].index.size(); ++j)
+            {
+                printf("box_index: %d, start col: %d, end col: %d, row: %d, area: %d\n",
+                       this->segmentation_results[i].index[j], this->segmentation_results[i].start_col[j], this->segmentation_results[i].end_col[j],
+                       this->segmentation_results[i].row[j], this->segmentation_results[i].area[j]);
+            }
+            printf("\n");
+        }
+    }
+
+    /**
+     * @brief draw the color segmentation result on the input image
+     * 
+     * @param image                  the input RGB image
+     * @param draw_colors            RGB values for each detected colors
+     * @param draw_backgound         draw the background if it is true
+     * @param background_color       RGB values for the background color
+     */
+    void draw_segmentation_results(dl::Tensor<uint8_t> &image, std::vector<std::vector<uint8_t>> draw_colors, bool draw_backgound = true, std::vector<uint8_t> background_color = {0, 0, 0});
+
+    /**
+     * @brief draw the color segmentation result on the input image
+     * 
+     * @param image                 the pointer of the input RGB565 image
+     * @param image_shape           the shape of the input image
+     * @param draw_colors           RGB565 values for  each detected colors
+     * @param draw_backgound        draw the background if it is true
+     * @param background_color      RGB565 values for the background color
+     */
+    void draw_segmentation_results(uint16_t *image, std::vector<int> image_shape, std::vector<uint16_t> draw_colors, bool draw_backgound = true, uint16_t background_color = 0x0000);
+};
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognition_112_v1_s16.hpp b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognition_112_v1_s16.hpp
new file mode 100644
index 00000000000..91f7747fe3f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognition_112_v1_s16.hpp
@@ -0,0 +1,30 @@
+#pragma once
+
+#include "dl_variable.hpp"
+#include "face_recognition_tool.hpp"
+#include "face_recognizer.hpp"
+#include <vector>
+
+using namespace dl;
+
+/**
+ * @brief face recognition model v1
+ * input size: 112 x 112 x 3
+ * quantization mode: S16
+ * 
+ */
+class FaceRecognition112V1S16 : public FaceRecognizer<int16_t>
+{       
+    public:
+        /**
+         * @brief Construct a new Face_Recognition_112_V1_S16 object
+         * 
+         */
+        FaceRecognition112V1S16();
+        
+        /**
+         * @brief Destroy the Face_Recognition_112_V1_S16 object
+         * 
+         */
+        ~FaceRecognition112V1S16();
+};
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognition_112_v1_s8.hpp b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognition_112_v1_s8.hpp
new file mode 100644
index 00000000000..ba377713ca2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognition_112_v1_s8.hpp
@@ -0,0 +1,30 @@
+#pragma once
+
+#include "dl_variable.hpp"
+#include "face_recognition_tool.hpp"
+#include "face_recognizer.hpp"
+#include <vector>
+
+using namespace dl;
+
+/**
+ * @brief face recognition model v1
+ * input size: 112 x 112 x 3
+ * quantization mode: S8
+ * 
+ */
+class FaceRecognition112V1S8 : public FaceRecognizer<int8_t>
+{       
+    public:
+        /**
+         * @brief Construct a new Face_Recognition_112_V1_S8 object
+         * 
+         */
+        FaceRecognition112V1S8();
+
+        /**
+         * @brief Destroy the Face Recognition_112_V1_S8 object
+         * 
+         */
+        ~FaceRecognition112V1S8();
+};
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognition_tool.hpp b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognition_tool.hpp
new file mode 100644
index 00000000000..3adf1f62f72
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognition_tool.hpp
@@ -0,0 +1,170 @@
+#pragma once
+
+#include "dl_variable.hpp"
+#include "dl_define.hpp"
+#include "dl_tool.hpp"
+#include "dl_math.hpp"
+#include "dl_math_matrix.hpp"
+#include <vector>
+#include <list>
+#include <algorithm>
+#include <math.h>
+#include <string>
+#include "esp_partition.h"
+
+/**
+ * @brief struct of face similarity
+ * 
+ */
+typedef struct
+{
+    int id;
+    std::string name;
+    float similarity;
+} face_info_t;
+
+
+/**
+ * @brief Face ID
+ * 
+ * @tparam feature_t 
+ */
+template <typename feature_t>
+class FaceID
+{
+public:
+    int id;     /*<! id index >*/
+    dl::Tensor<feature_t> id_emb;   /*<! id embedding >*/
+    std::string name;                /*<! id name >*/
+
+    /**
+     * @brief Construct a new Face ID object
+     * 
+     * @param id        id index
+     * @param id_emb    id embedding
+     * @param name      id name
+     */
+    FaceID(int id, dl::Tensor<feature_t> &id_emb, std::string name = "");
+
+    /**
+     * @brief Construct a new Face ID which is same as input face_id
+     * 
+     * @param face_id input face_id
+     */
+    FaceID(FaceID<feature_t> &face_id);
+
+    /**
+     * @brief Destroy the Face ID object
+     * 
+     */
+    ~FaceID() {}
+
+    /**
+     * @brief print the face id information
+     * 
+     */
+    void print();
+};
+
+namespace face_recognition_tool
+{
+    /**
+     * @brief l2 normalize the feautre
+     * 
+     * @param feature 
+     */
+    void l2_norm(dl::Tensor<float> &feature);
+
+    /**
+     * @brief calculate the cosine distance of the input ids
+     * 
+     * @param id_1  id 1
+     * @param id_2  id 2
+     * @param normalized_ids true: the input ids have been normalized.
+     *                       false: the input ids have not been normlized 
+     * @param type           0: cos dist: [-1, 1]
+     *                       1: normalzied cos dist: [0, 1]
+     * @return float  the cosine distance
+     */
+    float cos_distance(dl::Tensor<float> &id_1, dl::Tensor<float> &id_2, bool normalized_ids = true, int8_t type = 0);
+
+    /**
+     * @brief transform the image to the input of a mfn model 
+     * 
+     * @tparam T 
+     * @param image             the input image.
+     * @param free_input        true: free the input image.
+     *                          false: do not free the input image.
+     * @param do_padding        true: pad the result.
+     *                          false: do not pad the result. 
+     * @return dl::Tensor<T>* 
+     */
+    template <typename T>
+    dl::Tensor<T> *transform_mfn_input(dl::Tensor<uint8_t> &image, bool free_input = false);
+
+    /**
+     * @brief  transform the image to the input of a mfn model 
+     * 
+     * @tparam T 
+     * @param image                the input image.
+     * @param output               the preprocessed image.
+     * @param free_input           true: free the input image.
+     *                             false: do not free the input image.
+     * @param do_padding           true: pad the result.
+     *                             false: do not pad the result
+     */
+    template <typename T>
+    void transform_mfn_input(dl::Tensor<uint8_t> &image, dl::Tensor<T> &output, bool free_input = false);
+
+    /**
+     * @brief transform the mfn output embedding to a floating embedding
+     * 
+     * @tparam T 
+     * @param input the input embedding. 
+     * @param norm   true: normalize the output embedding.
+     *               false: do not normalize the output embedding.
+     * @param free_input true: free the input embedding.
+     *                   false: do not free the input embedding.
+     * @return dl::Tensor<float>* 
+     */
+    template <typename T>
+    dl::Tensor<float> *transform_mfn_output(dl::Tensor<T> &input, bool norm = true, bool free_input = false);
+
+    /**
+     * @brief transform the mfn output embedding to a floating embedding
+     * 
+     * @tparam T 
+     * @param input         the input embedding. 
+     * @param output        the output embedding.
+     * @param norm          true: normalize the output embedding.
+     *                      false: do not normalize the output embedding.
+     * @param free_input    true: free the input embedding.
+     *                      false: do not free the input embedding.
+     */
+    template <typename T>
+    void transform_mfn_output(dl::Tensor<T> &input, dl::Tensor<float> &output, bool norm = true, bool free_input = false);
+
+    /**
+     * @brief get the aligned face.
+     * 
+     * @tparam T 
+     * @param input     input tensor 
+     * @param output    the output aligned face.
+     * @param landmarks the landmarks of the face.
+     */
+    template <typename T>
+    void align_face(dl::Tensor<T> *input, dl::Tensor<T> *output, std::vector<int> &landmarks);
+
+    /**
+     * @brief get the aligned face.
+     * 
+     * @tparam T 
+     * @param input     input image with rgb565 format.
+     * @param shape     the shape of the input image.
+     * @param output    the output aligned face.
+     * @param landmarks the landmarks of the face.
+     */
+    template <typename T>
+    void align_face(uint16_t *input, std::vector<int> shape, dl::Tensor<T> *output, std::vector<int> &landmarks);
+
+} // namespace face_recognition_tool
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognizer.hpp b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognizer.hpp
new file mode 100644
index 00000000000..0f6b854118b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/face_recognizer.hpp
@@ -0,0 +1,296 @@
+#pragma once
+
+#include "dl_variable.hpp"
+#include "face_recognition_tool.hpp"
+#include <vector>
+
+using namespace dl;
+
+/**
+ * @brief 
+ * 
+ * @tparam feature_t 
+ */
+template<typename feature_t>
+class FaceRecognizer
+{
+    public:
+        /**
+         * @brief Construct a new Face Recognizer object
+         * 
+         */
+        FaceRecognizer();
+
+        /**
+         * @brief Destroy the Face Recognizer object
+         * 
+         */
+        virtual ~FaceRecognizer();
+
+        void *model;
+
+        /**
+         * @brief Set the face recognition threshold [-1, 1], default thresh: 0.55
+         * Note: If the similarity of two faces is greater than the threshold, they will be judged as the same person
+         * 
+         * @param thresh 
+         */
+        void set_thresh(float thresh);
+
+        /**
+         * @brief Get the current threshold of recognizer.
+         * 
+         * @return float current threshold.
+         */
+        float get_thresh();
+
+        /**
+         * @brief Get the input shape of the recognizer.
+         * 
+         * @return std::vector<int> the input shape of the recognizer. 
+         */
+        std::vector<int> get_input_shape();
+
+        /**
+         * @brief do forward
+         * 
+         * @param model_input            the input data of the face recognition model. 
+         * Note: the input data should have been preprocessed.
+         * @return Tensor<feature_t>&    the output of the face recognition model.
+         */
+        Tensor<feature_t> &forward(Tensor<feature_t> &model_input);
+
+        /**
+         * @brief recognize face
+         * 
+         * @param image_input       the pointer of the input image with format bgr565.
+         * @param shape             the shape of the input image
+         * @param landmarks         face landmarks coordinates
+         * @return face_info_t      the recognition result.
+         */
+        face_info_t recognize(uint16_t *image_input, std::vector<int> shape, std::vector<int> &landmarks);
+        
+        /**
+         * @brief recognize face
+         * 
+         * @param image_input        the pointer of the input image with format bgr565.
+         * @param shape              the shape of the input image  
+         * @param aligned_face       the Tensor to store the intermeidate aligned face.
+         * @param landmarks          face landmarks coordinates
+         * @return face_info_t       the recognition result.
+         */
+        face_info_t recognize(uint16_t *image_input, std::vector<int> shape, Tensor<uint8_t> &aligned_face, std::vector<int> &landmarks);
+
+        /**
+         * @brief recognize face
+         * 
+         * @param image_input         the Tensor of input image with format bgr888.
+         * @param landmarks           face landmarks coordinates
+         * @return face_info_t        the recognition result.
+         */
+        face_info_t recognize(Tensor<uint8_t> &image_input, std::vector<int> &landmarks);
+
+        /**
+         * @brief recognize face
+         * 
+         * @param image_input           the Tensor of input image with format bgr888.
+         * @param aligned_face          the Tensor to store the intermeidate aligned face.
+         * @param landmarks             face landmarks coordinates
+         * @return face_info_t          the recognition result.
+         */
+        face_info_t recognize(Tensor<uint8_t> &image_input, Tensor<uint8_t> &aligned_face, std::vector<int> &landmarks);
+
+        /**
+         * @brief recognize face
+         * 
+         * @param aligned_face          the Tensor of the input aligned face with format bgr888.
+         * @return face_info_t          the recognition result.
+         */
+        face_info_t recognize(Tensor<uint8_t> &aligned_face);
+
+        /**
+         * @brief recognize the face embedding.
+         * 
+         * @param emb  the normalized face embbeding.
+         * @return face_info_t  the recognition result.
+         */
+        face_info_t recognize(Tensor<float> &emb);
+
+        /**
+         * @brief Get the index of the enrolled ids 
+         * 
+         * @return std::vector<int> a vector of face ids index
+         */
+        std::vector<face_info_t> get_enrolled_ids();
+
+        /**
+         * @brief Get the face embedding 
+         * 
+         * @param id the face id index
+         * @return Tensor<float>  the face embedding of the face id index. 
+         *                        if there is no matched id return the embedding of last input image.
+         */
+        Tensor<float> &get_face_emb(int id=-1);
+
+        /**
+         * @brief Get the number of enrolled id
+         * 
+         * @return int the number of enrolled id
+         */
+        int get_enrolled_id_num();
+
+        /**
+         * @brief enroll face id
+         * 
+         * @param image_input       the pointer of the input image with format bgr565.
+         * @param shape             the shape of the input image
+         * @param landmarks         face landmarks coordinates
+         * @param name              name of the face id.
+         * @return  int             the face id index of the enrolled embedding.
+         */
+        int enroll_id(uint16_t *image_input, std::vector<int> shape, std::vector<int> &landmarks, std::string name="", bool update_flash = false);
+        
+        /**
+         * @brief enroll face id
+         * 
+         * @param image_input        the pointer of the input image with format bgr565.
+         * @param shape              the shape of the input image  
+         * @param aligned_face       the Tensor to store the intermeidate aligned face.
+         * @param landmarks          face landmarks coordinates
+         * @param name               name of the face id.
+         * @param update_flash       true: the enrolled ids will be stored to flash
+         *                           false: the enrolled ids will not be stored to flash
+         * @return  int              the face id index of the enrolled embedding.
+         */
+        int enroll_id(uint16_t *image_input, std::vector<int> shape, Tensor<uint8_t> &aligned_face, std::vector<int> &landmarks, std::string name="", bool update_flash = false);
+
+        /**
+         * @brief enroll face id
+         * 
+         * @param image_input         the Tensor of input image with format bgr888.
+         * @param landmarks           face landmarks coordinates
+         * @param name                name of the face id.
+         * @param update_flash        true: the enrolled ids will be stored to flash
+         *                            false: the enrolled ids will not be stored to flash
+         * @return  int               the face id index of the enrolled embedding.
+         */
+        int enroll_id(Tensor<uint8_t> &image_input, std::vector<int> &landmarks, std::string name="", bool update_flash = false);
+
+        /**
+         * @brief enroll face id
+         * 
+         * @param image_input           the Tensor of input image with format bgr888.
+         * @param aligned_face          the Tensor to store the intermeidate aligned face.
+         * @param landmarks             face landmarks coordinates
+         * @param name                  name of the face id.
+         * @param update_flash       true: the enrolled ids will be stored to flash
+         *                           false: the enrolled ids will not be stored to flash
+         * @return  int                 the face id index of the enrolled embedding.
+         */
+        int enroll_id(Tensor<uint8_t> &image_input, Tensor<uint8_t> &aligned_face, std::vector<int> &landmarks, std::string name="", bool update_flash = false);
+
+        /**
+         * @brief enroll face id
+         * 
+         * @param aligned_face          the Tensor of the input aligned face with format bgr888.
+         * @param name                  name of the face id.
+         * @param update_flash          true: the enrolled ids will be stored to flash
+         *                              false: the enrolled ids will not be stored to flash
+         * @return  int                 the face id index of the enrolled embedding.
+         */
+        int enroll_id(Tensor<uint8_t> &aligned_face, std::string name="", bool update_flash = false);
+        
+        /**
+         * @brief       enroll the normalzied face embedding.
+         * 
+         * @param emb                   the normalized face embbeding.
+         * @param name                  name of the face id.
+         * @param update_flash          true: the enrolled ids will be stored to flash
+         *                              false: the enrolled ids will not be stored to flash
+         * @return int                  the face id index of the enrolled embedding.
+         */
+        int enroll_id(Tensor<float> &emb, std::string name="", bool update_flash = false);
+
+        /**
+         * @brief                    delete the last enrolled face id.
+         * @param update_flash       true:  the ids will be updated to flash
+         *                           false: the ids will not be stored to flash
+         * 
+         * @return int  the number of remained face ids.
+         *              if the face ids list is empty, return -1
+         */
+        int delete_id(bool update_flash = false);
+
+        /**
+         * @brief                       delete the face id with id index.
+         * 
+         * @param id                    face id index.
+         * @param update_flash          true:  the ids will be updated to flash
+         *                              false: the ids will not be stored to flash
+         * @return int                  the number of remained face ids.
+         *                              if there is no matched id return -1
+         */
+        int delete_id(int id, bool update_flash = false);
+
+        /**
+         * @brief Set the enrolled ids
+         * 
+         * @param ids                the ids to be set
+         * @param update_flash       true:  the ids will be updated to flash
+         *                           false: the ids will not be stored to flash
+         * @return int               the number of enrolled ids.
+         */
+        int set_ids(std::vector<FaceID<float> *> &ids, bool update_flash = false);
+
+        /**
+         * @brief Set the enrolled ids from flash
+         * 
+         * @return int              the number of enrolled ids.
+         */
+        int set_ids_from_flash();
+
+        /**
+         * @brief write the enrolled ids to flash
+         * 
+         * @return int          the number of enrolled ids.
+         */
+        int write_ids_to_flash();
+
+        /**
+         * @brief Get the enrolled ids with name object
+         * 
+         * @param name 
+         * @return std::vector<face_info_t> 
+         */
+        std::vector<face_info_t> get_enrolled_ids_with_name(std::string name);
+
+        /**
+         * @brief Check whether the Flash partition is available
+         * 
+         * @return int              -2: the partition has not been set
+         *                          -1: the data in the flash does not match the current model.
+         *                          model_check_code: the Flash partition is available.      
+         *                          number of ids in flash: The IDs in Flash and RAM does not sync.  
+         */
+        int check_partition();
+
+        /**
+         * @brief delete all the enrolled face ids.
+         * @param update_flash       true:  the ids will be updated to flash
+         *                           false: the ids will not be stored to flash
+         * 
+         */
+        void clear_id(bool update_flash = false);
+
+        /**
+         * @brief Set the partition for saving face ids to flash or reading face ids from flash. 
+         * 
+         * @param type          esp_partition_type
+         * @param subtype       esp_partition_subtype
+         * @param label         the partition label
+         * @return int          0: set the partition failed
+         *                      1: set the partition successfully
+         */
+        int set_partition(esp_partition_type_t type, esp_partition_subtype_t subtype, const char *label);
+
+};
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/human_face_detect_mnp01.hpp b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/human_face_detect_mnp01.hpp
new file mode 100644
index 00000000000..62a25f0350c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/human_face_detect_mnp01.hpp
@@ -0,0 +1,41 @@
+#pragma once
+
+#include <vector>
+#include <list>
+#include "dl_detect_define.hpp"
+
+class HumanFaceDetectMNP01
+{
+private:
+    void *model;
+
+public:
+    /**
+     * @brief Construct a new Human Face Detect MNP01 object.
+     * 
+     * @param score_threshold predicted boxes with score lower than the threshold will be filtered out
+     * @param nms_threshold   predicted boxes with IoU higher than the threshold will be filtered out
+     * @param top_k           first k highest score boxes will be remained
+     */
+    HumanFaceDetectMNP01(const float score_threshold, const float nms_threshold, const int top_k);
+
+    /**
+     * @brief Destroy the Human Face Detect MNP01 object.
+     * 
+     */
+    ~HumanFaceDetectMNP01();
+
+    /**
+     * @brief Inference.
+     * 
+     * @tparam T supports uint16_t and uint8_t,
+     *         - uint16_t: input image is RGB565
+     *         - uint8_t: input image is RGB888
+     * @param input_element pointer of input image
+     * @param input_shape   shape of input image
+     * @param candidates    candidate boxes on input image
+     * @return detection result
+     */
+    template <typename T>
+    std::list<dl::detect::result_t> &infer(T *input_element, std::vector<int> input_shape, std::list<dl::detect::result_t> &candidates);
+};
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/human_face_detect_msr01.hpp b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/human_face_detect_msr01.hpp
new file mode 100644
index 00000000000..94ba6ac909a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/model_zoo/human_face_detect_msr01.hpp
@@ -0,0 +1,40 @@
+#pragma once
+
+#include <list>
+#include <vector>
+#include "dl_detect_define.hpp"
+
+class HumanFaceDetectMSR01
+{
+private:
+    void *model;
+
+public:
+    /**
+     * @brief Construct a new Human Face Detect MSR01 object
+     * 
+     * @param score_threshold   predicted boxes with score lower than the threshold will be filtered out
+     * @param nms_threshold     predicted boxes with IoU higher than the threshold will be filtered out
+     * @param top_k             first k highest score boxes will be remained
+     * @param resize_scale      resize scale to implement on input image
+     */
+    HumanFaceDetectMSR01(const float score_threshold, const float nms_threshold, const int top_k, float resize_scale);
+
+    /**
+     * @brief Destroy the Human Face Detect MSR01 object
+     */
+    ~HumanFaceDetectMSR01();
+
+    /**
+     * @brief Inference.
+     * 
+     * @tparam T supports uint8_t and uint16_t
+     *         - uint8_t: input image is RGB888
+     *         - uint16_t: input image is RGB565
+     * @param input_element pointer of input image
+     * @param input_shape   shape of input image
+     * @return detection result
+     */
+    template <typename T>
+    std::list<dl::detect::result_t> &infer(T *input_element, std::vector<int> input_shape);
+};
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn.hpp
new file mode 100644
index 00000000000..6c737c1d341
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn.hpp
@@ -0,0 +1,61 @@
+#pragma once
+#include <vector>
+#include "dl_define.hpp"
+#include "dl_tool.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief Get the output shape object
+         * 
+         * @param input_shape  input shape
+         * @param filter_shape filter shape with dilation
+         * @param stride_y     stride in height
+         * @param stride_x     stride in width
+         * @param pad_type     one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN
+         * @param is_conv2d    one of true or false,
+         *                     - true: serve for Conv2D
+         *                     - false: serve for other operations
+         * @return std::vector<int> 
+         */
+        std::vector<int> get_output_shape(const std::vector<int> &input_shape, const std::vector<int> &filter_shape, const int stride_y, const int stride_x, const padding_type_t pad_type, const bool is_conv2d = false, std::vector<int> padding = {});
+
+        /**
+         * @brief Get the pad size object
+         * 
+         * @param output_shape output shape
+         * @param input_shape  input shape
+         * @param filter_shape filter shape with dilation
+         * @param stride_y     stride in height
+         * @param stride_x     stride in width
+         * @param padding_type one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN
+         * @return padding size
+         */
+        std::vector<int> get_pad_size(const std::vector<int> &output_shape, const std::vector<int> &input_shape, const std::vector<int> &filter_shape, const int stride_y, const int stride_x, const padding_type_t padding_type);
+    } // namespace nn
+} // namespace dl
+
+#if DL_LOG_NN_LATENCY
+/**
+ * @brief Initialize.
+ */
+#define DL_LOG_NN_LATENCY_INIT() dl::tool::Latency latency
+
+/**
+ * @brief Time starts.
+ */
+#define DL_LOG_NN_LATENCY_START() latency.start()
+
+/**
+ * @brief Time ends and printed.
+ */
+#define DL_LOG_NN_LATENCY_END(key) \
+    latency.end();                 \
+    latency.print("nn", key)
+#else
+#define DL_LOG_NN_LATENCY_INIT()
+#define DL_LOG_NN_LATENCY_START()
+#define DL_LOG_NN_LATENCY_END(key)
+#endif
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_add2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_add2d.hpp
new file mode 100644
index 00000000000..4d4daaaef05
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_add2d.hpp
@@ -0,0 +1,91 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief activation(add2d(input0, input1)).
+         * 
+         * @param output            as an output
+         * @param input0            as one input
+         * @param input1            as another input
+         * @param activation        activation of add2d, if you don't specify anything, no activation is applied
+         * @param assign_core       not effective yet
+         * @param output_exponent   exponent of output, only and must specify if inplace operation happens 
+         */
+        void add2d(Tensor<int16_t> &output,
+                   Tensor<int16_t> &input0,
+                   Tensor<int16_t> &input1,
+                   const Activation<int16_t> *const activation = NULL,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE,
+                   const int output_exponent = INT_MIN);
+
+        /**
+         * @brief activation(add2d(input0, input1)).
+         * 
+         * @param output            as an output
+         * @param input0            as one input
+         * @param input1            as another input
+         * @param activation        activation of add2d, if you don't specify anything, no activation is applied
+         * @param assign_core       not effective yet
+         * @param output_exponent   exponent of output, only and must specify if inplace operation happens 
+         */
+        void add2d(Tensor<int8_t> &output,
+                   Tensor<int8_t> &input0,
+                   Tensor<int8_t> &input1,
+                   const Activation<int8_t> *const activation = NULL,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE, const int output_exponent = INT_MIN);
+
+        /**
+         * @brief activation(add2d(input0, input1))
+         * 
+         * @tparam inplace: whether directly store the output to input0
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param output_exponent exponent of output
+         * @param input0          as one input
+         * @param input1          as another input
+         * @param activation      activation of add2d, if you don't specify anything, no activation is applied
+         * @param assign_core     not effective yet
+         * @param inplace         whether directly store the output to input0
+         * @return add2d result or no return(result store to input0)
+         */
+        template <bool inplace = false, typename feature_t>
+        auto add2d(const int output_exponent,
+                   Tensor<feature_t> &input0,
+                   Tensor<feature_t> &input1,
+                   const Activation<feature_t> *activation,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE) -> typename std::conditional<inplace, void, Tensor<feature_t>>::type
+        {
+            assert(input0.is_same_shape(input1));
+
+            DL_LOG_NN_LATENCY_INIT();
+
+            Tensor<feature_t> output;
+            if constexpr (!inplace)
+            {
+                DL_LOG_NN_LATENCY_START();
+                output.set_exponent(output_exponent).set_shape(input0.shape).malloc_element();
+                DL_LOG_NN_LATENCY_END("apply");
+
+                DL_LOG_NN_LATENCY_START();
+                add2d(output, input0, input1, activation, assign_core);
+                DL_LOG_NN_LATENCY_END("add2d");
+                return output;
+            }
+            else
+            {
+                DL_LOG_NN_LATENCY_START();
+                add2d(input0, input0, input1, activation, assign_core, output_exponent);
+                input0.set_exponent(output_exponent);
+                DL_LOG_NN_LATENCY_END("add2d");
+            }
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_avg_pool2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_avg_pool2d.hpp
new file mode 100644
index 00000000000..6e7db6ed0e0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_avg_pool2d.hpp
@@ -0,0 +1,102 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+#include <stdint.h>
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief avg_pool2d(input).
+         * 
+         * @param output        as an output
+         * @param input         as an input
+         * @param padding       padding size needed in [top, bottom, left, right] of this operation
+         * @param filter_shape  filter_shape in [filter_height, filter_width]
+         * @param stride_y      stride in height
+         * @param stride_x      stride in width
+         * @param assign_core   not effective yet
+         */
+        void avg_pool2d(Tensor<int16_t> &output,
+                        Tensor<int16_t> &input,
+                        std::vector<int> &padding,
+                        std::vector<int> &filter_shape,
+                        const int stride_y,
+                        const int stride_x,
+                        const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief avg_pool2d(input).
+         * 
+         * @param output        as an output
+         * @param input         as an input
+         * @param padding       padding size needed in [top, bottom, left, right] of this operation
+         * @param filter_shape  filter_shape in [filter_height, filter_width]
+         * @param stride_y      stride in height
+         * @param stride_x      stride in width
+         * @param assign_core   not effective yet
+         */
+        void avg_pool2d(Tensor<int8_t> &output,
+                        Tensor<int8_t> &input,
+                        std::vector<int> &padding,
+                        std::vector<int> &filter_shape,
+                        const int stride_y,
+                        const int stride_x,
+                        const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief avg_pool2d(input).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param output_exponent exponent of output
+         * @param input           as an input
+         * @param filter_shape    filter_shape in [filter_height, filter_width]
+         * @param stride_y        stride in height
+         * @param stride_x        stride in width
+         * @param padding_type    one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN,
+         *                        - PADDING_VALID: no padding
+         *                        PADDING_SAME_END and PADDING_SAME_BEGIN results in padding with zeros evenly to the left/right or up/down of the input 
+         *                        such that output has the same height/width dimension as the input,
+         *                        - PADDING_SAME_END results padding in TensorFlow style
+         *                        - PADDING_SAME_BEGIN results padding in MXNET style
+         * @param assign_core     not effective yet
+         * @return avg_pool2d result
+         */
+        template <typename feature_t>
+        Tensor<feature_t> avg_pool2d(const int output_exponent,
+                                     Tensor<feature_t> &input,
+                                     std::vector<int> filter_shape,
+                                     const int stride_y,
+                                     const int stride_x,
+                                     const padding_type_t padding_type,
+                                     const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+        {
+            DL_LOG_NN_LATENCY_INIT();
+
+            DL_LOG_NN_LATENCY_START();
+            std::vector<int> output_shape = get_output_shape(input.shape, filter_shape, stride_y, stride_x, padding_type);
+            Tensor<feature_t> output;
+            output.set_exponent(output_exponent).set_shape(output_shape).malloc_element();
+            DL_LOG_NN_LATENCY_END("apply");
+            std::vector<int> padding(4, 0);
+
+            DL_LOG_NN_LATENCY_START();
+            if (padding_type == PADDING_SAME_END || padding_type == PADDING_SAME_BEGIN)
+            {
+                padding = get_pad_size(output_shape, input.shape, filter_shape, stride_y, stride_x, padding_type);
+            }
+            DL_LOG_NN_LATENCY_END("padding");
+
+            DL_LOG_NN_LATENCY_START();
+            avg_pool2d(output, input, padding, filter_shape, stride_y, stride_x, assign_core);
+            DL_LOG_NN_LATENCY_END("avg_pool2d");
+
+            return output;
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_concat.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_concat.hpp
new file mode 100644
index 00000000000..73ed1aae905
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_concat.hpp
@@ -0,0 +1,63 @@
+#pragma once
+
+#include <vector>
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        template <typename feature_t>
+        void concat(Tensor<feature_t> &output, std::vector<Tensor<feature_t> *> &inputs, int axis, bool free_inputs = false);
+
+        template <typename feature_t>
+        Tensor<feature_t> concat(std::vector<Tensor<feature_t> *> &inputs, int axis, bool free_inputs = false)
+        {
+            DL_LOG_NN_LATENCY_INIT();
+
+            DL_LOG_NN_LATENCY_START();
+            assert(inputs.size() > 1);
+            int shape_size = inputs[0]->shape.size();
+
+            if (axis < 0)
+            {
+                axis = shape_size + axis;
+            }
+
+            assert((axis < shape_size) && (axis > -1));
+
+            int output_shape_axis = inputs[0]->shape[axis];
+
+            for (int i = 1; i < inputs.size(); i++)
+            {
+                assert(shape_size == inputs[i]->shape.size());
+                assert(inputs[i]->exponent == inputs[i - 1]->exponent);
+                output_shape_axis += inputs[i]->shape[axis];
+
+                for (int j = 0; j < shape_size; j++)
+                {
+                    if (j != axis)
+                    {
+                        assert(inputs[i]->shape[j] == inputs[i - 1]->shape[j]);
+                    }
+                }
+            }
+            DL_LOG_NN_LATENCY_END("assert");
+
+            DL_LOG_NN_LATENCY_START();
+            Tensor<feature_t> output;
+            std::vector<int> output_shape = inputs[0]->shape;
+            output_shape[axis] = output_shape_axis;
+            output.set_shape(output_shape);
+            output.set_exponent(inputs[0]->exponent);
+            output.malloc_element();
+            DL_LOG_NN_LATENCY_END("malloc");
+
+            DL_LOG_NN_LATENCY_START();
+            concat(output, inputs, axis, free_inputs);
+            DL_LOG_NN_LATENCY_END("concat");
+            return output;
+        }
+    } // namespace nn
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_concat2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_concat2d.hpp
new file mode 100644
index 00000000000..adcae1e7a7d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_concat2d.hpp
@@ -0,0 +1,22 @@
+#pragma once
+
+#include <vector>
+#include "dl_variable.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief concat2d(input_1, input_2, ...)
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param output as an output
+         * @param inputs a bundle of inputs to be concatenated
+         */
+        template <typename feature_t>
+        void concat2d(Tensor<feature_t> &output, std::vector<Tensor<feature_t>> inputs);
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_conv2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_conv2d.hpp
new file mode 100644
index 00000000000..27ba0372730
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_conv2d.hpp
@@ -0,0 +1,136 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief activation(conv2d(input, filter) + bias).
+         * 
+         * @param output      as an output
+         * @param input       as an input
+         * @param padding     padding size needed in [top, bottom, left, right] of this operation
+         * @param filter      filter of conv2d
+         * @param stride_y    stride in height
+         * @param stride_x    stride in width
+         * @param bias        bias of conv2d, if you don't specify anything, no bias is added
+         * @param activation  activation of conv2d, if you don't specify anything, no activation is applied
+         * @param assign_core not effective yet
+         */
+        void conv2d(Tensor<int16_t> &output,
+                    Tensor<int16_t> &input,
+                    std::vector<int> &padding,
+                    const Filter<int16_t> &filter,
+                    const int stride_y,
+                    const int stride_x,
+                    const Bias<int16_t> *const bias = NULL,
+                    const Activation<int16_t> *const activation = NULL,
+                    const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief activation(conv2d(input, filter) + bias).
+         * 
+         * @param output      as an output
+         * @param input       as an input
+         * @param padding     padding size needed in [top, bottom, left, right] of this operation
+         * @param filter      filter of conv2d
+         * @param stride_y    stride in height
+         * @param stride_x    stride in width
+         * @param bias        bias of conv2d, if you don't specify anything, no bias is added
+         * @param activation  activation of conv2d, if you don't specify anything, no activation is applied
+         * @param assign_core not effective yet
+         */
+        void conv2d(Tensor<int8_t> &output,
+                    Tensor<int8_t> &input,
+                    std::vector<int> &padding,
+                    const Filter<int8_t> &filter,
+                    const int stride_y,
+                    const int stride_x,
+                    const Bias<int8_t> *const bias = NULL,
+                    const Activation<int8_t> *const activation = NULL,
+                    const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief activation(conv2d(input, filter) + bias).
+         * 
+         * @param output      as an output
+         * @param input       as an input
+         * @param padding     padding size needed in [top, bottom, left, right] of this operation
+         * @param filter      filter of conv2d
+         * @param stride_y    stride in height
+         * @param stride_x    stride in width
+         * @param bias        bias of conv2d, if you don't specify anything, no bias is added
+         * @param activation  activation of conv2d, if you don't specify anything, no activation is applied
+         * @param assign_core not effective yet
+         */
+        void conv2d(Tensor<int8_t> &output,
+                    Tensor<int8_t> &input,
+                    std::vector<int> &padding,
+                    const Filter<int8_t> &filter,
+                    const int stride_y,
+                    const int stride_x,
+                    const Bias<int16_t> *const bias = NULL,
+                    const Activation<int8_t> *const activation = NULL,
+                    const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief activation(conv2d(input, filter) + bias).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param output_exponent exponent of output
+         * @param input           as an input
+         * @param filter          Filter of conv2d
+         * @param stride_y        stride in height
+         * @param stride_x        stride in width
+         * @param padding_type    one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN,
+         *                        - PADDING_VALID: no padding
+         *                        PADDING_SAME_END and PADDING_SAME_BEGIN results in padding with zeros evenly to the left/right or up/down of the input 
+         *                        such that output has the same height/width dimension as the input,
+         *                        - PADDING_SAME_END results padding in TensorFlow style
+         *                        - PADDING_SAME_BEGIN results padding in MXNET style
+         * @param bias            bias of conv2d, if you don't specify anything, no bias is added
+         * @param activation      activation of conv2d, if you don't specify anything, no activation is applied
+         * @param assign_core     not effective yet
+         * @return conv2d result
+         */
+        template <typename feature_t, typename bias_t>
+        Tensor<feature_t> conv2d(const int output_exponent,
+                                 Tensor<feature_t> &input,
+                                 const Filter<feature_t> &filter,
+                                 const int stride_y,
+                                 const int stride_x,
+                                 const padding_type_t padding_type,
+                                 const Bias<bias_t> *bias,
+                                 const Activation<feature_t> *activation,
+                                 const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+        {
+            DL_LOG_NN_LATENCY_INIT();
+
+            DL_LOG_NN_LATENCY_START();
+            std::vector<int> output_shape = get_output_shape(input.shape, filter.shape_with_dilation, stride_y, stride_x, padding_type, true);
+            Tensor<feature_t> output;
+            output.set_exponent(output_exponent).set_shape(output_shape).malloc_element();
+            DL_LOG_NN_LATENCY_END("apply");
+
+            std::vector<int> padding(4, 0);
+            DL_LOG_NN_LATENCY_START();
+            if (padding_type == PADDING_SAME_END || padding_type == PADDING_SAME_BEGIN)
+            {
+                padding = get_pad_size(output_shape, input.shape, filter.shape_with_dilation, stride_y, stride_x, padding_type);
+            }
+            DL_LOG_NN_LATENCY_END("padding");
+
+            DL_LOG_NN_LATENCY_START();
+            conv2d(output, input, padding, filter, stride_y, stride_x, bias, activation, assign_core);
+            DL_LOG_NN_LATENCY_END("conv2d");
+
+            return output;
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_depthwise_conv2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_depthwise_conv2d.hpp
new file mode 100644
index 00000000000..135815a65cb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_depthwise_conv2d.hpp
@@ -0,0 +1,137 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief activate(depthwise_conv2d(input, filter) + bias)
+         * 
+         * @param output      as an output
+         * @param input       as an input
+         * @param padding     padding size needed in [top, bottom, left, right] of this operation
+         * @param filter      Filter of depthwise_conv2d
+         * @param stride_y    stride in height
+         * @param stride_x    stride in width
+         * @param bias        bias of depthwise_conv2d, if you don't specify anything, no bias is added
+         * @param activation  activation of depthwise_conv2d, if you don't specify anything, no activation is applied
+         * @param assign_core not effective yet
+         */
+        void depthwise_conv2d(Tensor<int16_t> &output,
+                              Tensor<int16_t> &input,
+                              std::vector<int> &padding,
+                              const Filter<int16_t> &filter,
+                              const int stride_y,
+                              const int stride_x,
+                              const Bias<int16_t> *bias = NULL,
+                              const Activation<int16_t> *activation = NULL,
+                              const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief activate(depthwise_conv2d(input, filter) + bias)
+         * 
+         * @param output      as an output
+         * @param input       as an input
+         * @param padding     padding size needed in [top, bottom, left, right] of this operation
+         * @param filter      filter of depthwise_conv2d
+         * @param stride_y    stride in height
+         * @param stride_x    stride in width
+         * @param bias        bias of depthwise_conv2d, if you don't specify anything, no bias is added
+         * @param activation  activation of depthwise_conv2d, if you don't specify anything, no activation is applied
+         * @param assign_core not effective yet
+         */
+        void depthwise_conv2d(Tensor<int8_t> &output,
+                              Tensor<int8_t> &input,
+                              std::vector<int> &padding,
+                              const Filter<int8_t> &filter,
+                              const int stride_y,
+                              const int stride_x,
+                              const Bias<int8_t> *bias = NULL,
+                              const Activation<int8_t> *activation = NULL,
+                              const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief activate(depthwise_conv2d(input, filter) + bias)
+         * 
+         * @param output      as an output
+         * @param input       as an input
+         * @param padding     padding size needed in [top, bottom, left, right] of this operation
+         * @param filter      Filter of depthwise_conv2d
+         * @param stride_y    stride in height
+         * @param stride_x    stride in width
+         * @param bias        bias of depthwise_conv2d, if you don't specify anything, no bias is added
+         * @param activation  activation of depthwise_conv2d, if you don't specify anything, no activation is applied
+         * @param assign_core not effective yet
+         */
+        void depthwise_conv2d(Tensor<int8_t> &output,
+                              Tensor<int8_t> &input,
+                              std::vector<int> &padding,
+                              const Filter<int8_t> &filter,
+                              const int stride_y,
+                              const int stride_x,
+                              const Bias<int16_t> *bias = NULL,
+                              const Activation<int8_t> *activation = NULL,
+                              const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief activation(depthwise_conv2d(input, filter) + bias)
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param output_exponent exponent of output
+         * @param input           as an input
+         * @param filter          filter of depthwise_conv2d
+         * @param stride_y        stride in height
+         * @param stride_x        stride in width
+         * @param pad_type        one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN,
+         *                        - PADDING_VALID means no padding
+         *                        PADDING_SAME_END and PADDING_SAME_BEGIN results in padding with zeros evenly to the left/right or up/down of the input 
+         *                        such that output has the same height/width dimension as the input,
+         *                        - PADDING_SAME_END results padding in TensorFlow style
+         *                        - PADDING_SAME_BEGIN results padding in MXNET style
+         * @param bias            bias of depthwise_conv2d, if you don't specify anything, no bias is added
+         * @param activation      activation of depthwise_conv2d, if you don't specify anything, no activation is applied
+         * @param assign_core     not effective yet
+         * @return depthwise_conv2d result
+         */
+        template <typename feature_t, typename bias_t>
+        Tensor<feature_t> depthwise_conv2d(const int output_exponent,
+                                           Tensor<feature_t> &input,
+                                           const Filter<feature_t> &filter,
+                                           const int stride_y,
+                                           const int stride_x,
+                                           const padding_type_t padding_type,
+                                           const Bias<bias_t> *bias,
+                                           const Activation<feature_t> *activation,
+                                           const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+        {
+            DL_LOG_NN_LATENCY_INIT();
+
+            DL_LOG_NN_LATENCY_START();
+            std::vector<int> output_shape = get_output_shape(input.shape, filter.shape_with_dilation, stride_y, stride_x, padding_type);
+            Tensor<feature_t> output;
+            output.set_exponent(output_exponent).set_shape(output_shape).malloc_element();
+            DL_LOG_NN_LATENCY_END("apply");
+
+            std::vector<int> padding(4, 0);
+
+            DL_LOG_NN_LATENCY_START();
+            if (padding_type == PADDING_SAME_END || padding_type == PADDING_SAME_BEGIN)
+            {
+                padding = get_pad_size(output_shape, input.shape, filter.shape_with_dilation, stride_y, stride_x, padding_type);
+            }
+            DL_LOG_NN_LATENCY_END("padding");
+
+            DL_LOG_NN_LATENCY_START();
+            depthwise_conv2d(output, input, padding, filter, stride_y, stride_x, bias, activation, assign_core);
+            DL_LOG_NN_LATENCY_END("depthwise_conv2d");
+
+            return output;
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_fully_connected.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_fully_connected.hpp
new file mode 100644
index 00000000000..372c84825fd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_fully_connected.hpp
@@ -0,0 +1,126 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief activation(FullyConnected(input, filter) + bias).
+         * 
+         * @param output      as an output
+         * @param input       as an input
+         * @param filter      filter of FullyConnected
+         * @param bias        bias of FullyConnected, if you don't specify anything, no bias is added
+         * @param activation  activation of FullyConnected, if you don't specify anything, no activation is applied
+         * @param flatten     true: input shape is [x1, x2, ..., xn], filter shape is [1, 1, x1 * x2 * ... * xn, output_dim], output shape is [output_dim]
+         *                    false: input shape is [x1, x2, ..., xn, input_dim], filter shape is [1, 1, input_dim, output_dim], output shape is [x1, x2, ...., xn, output_dim]
+         * @param assign_core not effective yet
+         */
+        void fully_connected(Tensor<int16_t> &output,
+                             Tensor<int16_t> &input,
+                             const Filter<int16_t> &filter,
+                             const Bias<int16_t> *const bias = NULL,
+                             const Activation<int16_t> *const activation = NULL,
+                             const bool flatten = true,
+                             const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief activation(FullyConnected(input, filter) + bias).
+         * 
+         * @param output      as an output
+         * @param input       as an input
+         * @param filter      filter of FullyConnected
+         * @param bias        bias of FullyConnected, if you don't specify anything, no bias is added
+         * @param activation  activation of FullyConnected, if you don't specify anything, no activation is applied
+         * @param flatten     true: input shape is [x1, x2, ..., xn], filter shape is [1, 1, x1 * x2 * ... * xn, output_dim], output shape is [output_dim]
+         *                    false: input shape is [x1, x2, ..., xn, input_dim], filter shape is [1, 1, input_dim, output_dim], output shape is [x1, x2, ...., xn, output_dim]
+         * @param assign_core not effective yet
+         */
+        void fully_connected(Tensor<int8_t> &output,
+                             Tensor<int8_t> &input,
+                             const Filter<int8_t> &filter,
+                             const Bias<int8_t> *const bias = NULL,
+                             const Activation<int8_t> *const activation = NULL,
+                             const bool flatten = true,
+                             const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief activation(FullyConnected(input, filter) + bias).
+         * 
+         * @param output      as an output
+         * @param input       as an input
+         * @param filter      filter of FullyConnected
+         * @param bias        bias of FullyConnected, if you don't specify anything, no bias is added
+         * @param activation  activation of FullyConnected, if you don't specify anything, no activation is applied
+         * @param flatten     true: input shape is [x1, x2, ..., xn], filter shape is [1, 1, x1 * x2 * ... * xn, output_dim], output shape is [output_dim]
+         *                    false: input shape is [x1, x2, ..., xn, input_dim], filter shape is [1, 1, input_dim, output_dim], output shape is [x1, x2, ...., xn, output_dim]
+         * @param assign_core not effective yet
+         */
+        void fully_connected(Tensor<int8_t> &output,
+                             Tensor<int8_t> &input,
+                             const Filter<int8_t> &filter,
+                             const Bias<int16_t> *const bias = NULL,
+                             const Activation<int8_t> *const activation = NULL,
+                             const bool flatten = true,
+                             const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief activation(FullyConnected(input, filter) + bias).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param output_exponent exponent of output
+         * @param input           as an input
+         * @param filter          Filter of FullyConnected
+         * @param bias            bias of FullyConnected, if you don't specify anything, no bias is added
+         * @param activation      activation of FullyConnected, if you don't specify anything, no activation is applied
+         * @param flatten         true: input shape is [x1, x2, ..., xn], filter shape is [1, 1, x1 * x2 * ... * xn, output_dim], output shape is [output_dim]
+         *                        false: input shape is [x1, x2, ..., xn, input_dim], filter shape is [1, 1, input_dim, output_dim], output shape is [x1, x2, ...., xn, output_dim]
+         * @param assign_core     not effective yet
+         * @return FullyConnected result
+         */
+        template <typename feature_t>
+        Tensor<feature_t> fully_connected(const int output_exponent,
+                                          Tensor<feature_t> &input,
+                                          const Filter<feature_t> &filter,
+                                          const Bias<feature_t> *bias,
+                                          const Activation<feature_t> *activation,
+                                          const bool flatten,
+                                          const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+        {
+            DL_LOG_NN_LATENCY_INIT();
+
+            DL_LOG_NN_LATENCY_START();
+            assert(filter.shape.size() == 4);
+            assert(filter.shape[0] == 1);
+            assert(filter.shape[1] == 1);
+
+            std::vector<int> output_shape;
+            if (flatten)
+            {
+                assert(input.get_size() == filter.shape[2]);
+                output_shape = {filter.shape.back()};
+            }
+            else
+            {
+                assert(input.shape.back() == filter->shape[2]);
+                output_shape = input.shape;
+                output_shape[output_shape.size() - 1] = filter.shape.back();
+            }
+            Tensor<feature_t> output;
+            output.set_exponent(output_exponent).set_shape(output_shape).malloc_element();
+            DL_LOG_NN_LATENCY_END("apply");
+
+            DL_LOG_NN_LATENCY_START();
+            fully_connected(output, input, filter, bias, activation, flatten, assign_core);
+            DL_LOG_NN_LATENCY_END("fully_connected");
+
+            return output;
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_global_avg_pool2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_global_avg_pool2d.hpp
new file mode 100644
index 00000000000..724d3ca0952
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_global_avg_pool2d.hpp
@@ -0,0 +1,66 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+#include <stdint.h>
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief global_avg_pool2d(input).
+         * 
+         * @param output        as an output
+         * @param input         as an input
+         * @param assign_core   not effective yet
+         */
+        void global_avg_pool2d(Tensor<int16_t> &output,
+                               Tensor<int16_t> &input,
+                               const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief global_avg_pool2d(input).
+         * 
+         * @param output        as an output
+         * @param input         as an input
+         * @param assign_core   not effective yet
+         */
+        void global_avg_pool2d(Tensor<int8_t> &output,
+                               Tensor<int8_t> &input,
+                               const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief global_avg_pool2d(input).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param output_exponent exponent of output
+         * @param input           as an input
+         * @param assign_core     not effective yet
+         * @return global_avg_pool2d result
+         */
+        template <typename feature_t>
+        Tensor<feature_t> global_avg_pool2d(const int output_exponent,
+                                            Tensor<feature_t> &input,
+                                            const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+        {
+            DL_LOG_NN_LATENCY_INIT();
+
+            DL_LOG_NN_LATENCY_START();
+            std::vector<int> output_shape(input.shape.size(), 1);
+            output_shape[2] = input.shape[2];
+            Tensor<feature_t> output;
+            output.set_exponent(output_exponent).set_shape(output_shape).malloc_element();
+            DL_LOG_NN_LATENCY_END("apply");
+
+            DL_LOG_NN_LATENCY_START();
+            global_avg_pool2d(output, input, assign_core);
+            DL_LOG_NN_LATENCY_END("global_avg_pool2d");
+
+            return output;
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_global_max_pool2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_global_max_pool2d.hpp
new file mode 100644
index 00000000000..f6f15e91bd3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_global_max_pool2d.hpp
@@ -0,0 +1,64 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+#include <stdint.h>
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief global_max_pool2d(input).
+         * 
+         * @param output       as an output
+         * @param input        as an input
+         * @param assign_core  not effective yet
+         */
+        void global_max_pool2d(Tensor<int16_t> &output,
+                               Tensor<int16_t> &input,
+                               const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief global_max_pool2d(input).
+         * 
+         * @param output       as an output
+         * @param input        as an input
+         * @param assign_core  not effective yet
+         */
+        void global_max_pool2d(Tensor<int8_t> &output,
+                               Tensor<int8_t> &input,
+                               const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief global_max_pool2d(input).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param input        as an input
+         * @param assign_core  not effective yet
+         * @return global_max_pool2d result
+         */
+        template <typename feature_t>
+        Tensor<feature_t> global_max_pool2d(Tensor<feature_t> &input,
+                                            const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+        {
+            DL_LOG_NN_LATENCY_INIT();
+
+            DL_LOG_NN_LATENCY_START();
+            std::vector<int> output_shape(input.shape.size(), 1);
+            output_shape[2] = input.shape[2];
+            Tensor<feature_t> output;
+            output.set_exponent(input.exponent).set_shape(output_shape).malloc_element();
+            DL_LOG_NN_LATENCY_END("apply");
+
+            DL_LOG_NN_LATENCY_START();
+            global_max_pool2d(output, input, assign_core);
+            DL_LOG_NN_LATENCY_END("global_max_pool2d");
+
+            return output;
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_leakyrelu.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_leakyrelu.hpp
new file mode 100644
index 00000000000..c41728b1ad5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_leakyrelu.hpp
@@ -0,0 +1,82 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief leakyrelu(input).
+         * 
+         * @param output                as an output
+         * @param input                 as an input
+         * @param activation_alpha      quantized alpha
+         * @param activation_exponent   exponent of quantized alpha
+         * @param assign_core not effective yet
+         */
+        void leakyrelu(Tensor<int16_t> &output,
+                       Tensor<int16_t> &input,
+                       const int16_t activation_alpha,
+                       const int activation_exponent,
+                       const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief leakyrelu(input).
+         * 
+         * @param output                as an output
+         * @param input                 as an input
+         * @param activation_alpha      quantized alpha
+         * @param activation_exponent   exponent of quantized alpha
+         * @param assign_core not effective yet
+         */
+        void leakyrelu(Tensor<int8_t> &output,
+                       Tensor<int8_t> &input,
+                       const int8_t activation_alpha,
+                       const int activation_exponent,
+                       const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief leakyrelu(input)
+         * 
+         * @tparam inplace: whether directly store the output to input
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param input                 as an input
+         * @param activation_alpha      quantized alpha
+         * @param activation_exponent   exponent of quantized alpha
+         * @param assign_core           not effective yet
+         * @return leakyrelu result or no return(result store to input)
+         */
+        template <bool inplace = false, typename feature_t>
+        auto leakyrelu(Tensor<feature_t> &input,
+                       const int activation_alpha,
+                       const int activation_exponent,
+                       const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE) -> typename std::conditional<inplace, void, Tensor<feature_t>>::type
+        {
+            DL_LOG_NN_LATENCY_INIT();
+            Tensor<feature_t> output;
+            if constexpr (!inplace)
+            {
+                DL_LOG_NN_LATENCY_START();
+                output.set_exponent(input.exponent).set_shape(input.shape).malloc_element();
+                DL_LOG_NN_LATENCY_END("apply");
+
+                DL_LOG_NN_LATENCY_START();
+                leakyrelu(output, input, activation_alpha, activation_exponent, assign_core);
+                DL_LOG_NN_LATENCY_END("leakyrelu");
+
+                return output;
+            }
+            else
+            {
+                DL_LOG_NN_LATENCY_START();
+                leakyrelu(input, input, activation_alpha, activation_exponent, assign_core);
+                DL_LOG_NN_LATENCY_END("leakyrelu");
+            }
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_max2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_max2d.hpp
new file mode 100644
index 00000000000..466089bc386
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_max2d.hpp
@@ -0,0 +1,81 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief max2d(input0, input1) 
+         * 
+         * @param output            as an output
+         * @param input0            as one input
+         * @param input1            as another input
+         * @param assign_core       not effective yet
+         */
+        void max2d(Tensor<int16_t> &output,
+                   Tensor<int16_t> &input0,
+                   Tensor<int16_t> &input1,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief max2d(input0, input1)  
+         * 
+         * @param output            as an output
+         * @param input0            as one input
+         * @param input1            as another input
+         * @param assign_core       not effective yet 
+         * @param output_exponent   exponent of output, only and must specify if inplace operation happens
+         */
+        void max2d(Tensor<int8_t> &output,
+                   Tensor<int8_t> &input0,
+                   Tensor<int8_t> &input1,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief max2d(input0, input1)
+         *
+         * @tparam inplace: whether directly store the output to input0 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param input0          as one input
+         * @param input1          as another input
+         * @param assign_core     not effective yet
+         * @return max2d result or no return(result store to input0)
+         */
+        template <bool inplace = false, typename feature_t>
+        auto max2d(Tensor<feature_t> &input0,
+                   Tensor<feature_t> &input1,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE) -> typename std::conditional<inplace, void, Tensor<feature_t>>::type
+        {
+            assert(input0.is_same_shape(input1));
+            assert(input0.exponent == input1.exponent);
+
+            DL_LOG_NN_LATENCY_INIT();
+            Tensor<feature_t> output;
+
+            if constexpr (!inplace)
+            {
+                DL_LOG_NN_LATENCY_START();
+                output.set_exponent(input0.exponent).set_shape(input0.shape).malloc_element();
+                DL_LOG_NN_LATENCY_END("apply");
+
+                DL_LOG_NN_LATENCY_START();
+                max2d(output, input0, input1, assign_core);
+                DL_LOG_NN_LATENCY_END("max2d");
+
+                return output;
+            }
+            else
+            {
+                DL_LOG_NN_LATENCY_START();
+                max2d(input0, input0, input1, assign_core);
+                DL_LOG_NN_LATENCY_END("max2d");
+            }
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_max_pool2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_max_pool2d.hpp
new file mode 100644
index 00000000000..50d51728ce0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_max_pool2d.hpp
@@ -0,0 +1,101 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+#include <stdint.h>
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief max_pool2d(input).
+         * 
+         * @param output       as an output
+         * @param input        as an input
+         * @param padding      padding size needed in [top, bottom, left, right] of this operation
+         * @param filter_shape filter shape in [filter_height, filter_width]
+         * @param stride_y     stride in height
+         * @param stride_x     stride in width
+         * @param assign_core  not effective yet
+         */
+        void max_pool2d(Tensor<int16_t> &output,
+                        Tensor<int16_t> &input,
+                        std::vector<int> &padding,
+                        std::vector<int> &filter_shape,
+                        const int stride_y,
+                        const int stride_x,
+                        const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief max_pool2d(input).
+         * 
+         * @param output       as an output
+         * @param input        as an input
+         * @param padding      padding size needed in [top, bottom, left, right] of this operation
+         * @param filter_shape filter shape in [filter_height, filter_width]
+         * @param stride_y     stride in height
+         * @param stride_x     stride in width
+         * @param assign_core  not effective yet
+         */
+        void max_pool2d(Tensor<int8_t> &output,
+                        Tensor<int8_t> &input,
+                        std::vector<int> &padding,
+                        std::vector<int> &filter_shape,
+                        const int stride_y,
+                        const int stride_x,
+                        const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief max_pool2d(input).
+         * 
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param input        as an input
+         * @param filter_shape filter shape in [filter_height, filter_width]
+         * @param stride_y     stride in height
+         * @param stride_x     stride in width
+         * @param padding_type one of PADDING_VALID or PADDING_SAME_END or PADDING_SAME_BEGIN,
+         *                     - PADDING_VALID: no padding
+         *                     PADDING_SAME_END and PADDING_SAME_BEGIN results in padding with zeros evenly to the left/right or up/down of the input 
+         *                     such that output has the same height/width dimension as the input,
+         *                     - PADDING_SAME_END results padding in TensorFlow style
+         *                     - PADDING_SAME_BEGIN results padding in MXNET style
+         * @param assign_core  not effective yet
+         * @return max_pool2d result
+         */
+        template <typename feature_t>
+        Tensor<feature_t> max_pool2d(Tensor<feature_t> &input,
+                                     std::vector<int> filter_shape,
+                                     const int stride_y,
+                                     const int stride_x,
+                                     const padding_type_t padding_type,
+                                     const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+        {
+            DL_LOG_NN_LATENCY_INIT();
+
+            DL_LOG_NN_LATENCY_START();
+            std::vector<int> output_shape = get_output_shape(input.shape, filter_shape, stride_y, stride_x, padding_type);
+            Tensor<feature_t> output;
+            output.set_exponent(input.exponent).set_shape(output_shape).malloc_element();
+            DL_LOG_NN_LATENCY_END("apply");
+
+            std::vector<int> padding(4, 0);
+
+            DL_LOG_NN_LATENCY_START();
+            if (padding_type == PADDING_SAME_END || padding_type == PADDING_SAME_BEGIN)
+            {
+                padding = get_pad_size(output_shape, input.shape, filter_shape, stride_y, stride_x, padding_type);
+            }
+            DL_LOG_NN_LATENCY_END("padding");
+
+            DL_LOG_NN_LATENCY_START();
+            max_pool2d(output, input, padding, filter_shape, stride_y, stride_x, assign_core);
+            DL_LOG_NN_LATENCY_END("max_pool2d");
+
+            return output;
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_min2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_min2d.hpp
new file mode 100644
index 00000000000..8faddf3c228
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_min2d.hpp
@@ -0,0 +1,80 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief min2d(input0, input1) 
+         * 
+         * @param output      as an output
+         * @param input0      as one input
+         * @param input1      as another input
+         * @param assign_core 
+         */
+        void min2d(Tensor<int16_t> &output,
+                   Tensor<int16_t> &input0,
+                   Tensor<int16_t> &input1,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief min2d(input0, input1)  
+         * 
+         * @param output      as an output
+         * @param input0      as one input
+         * @param input1      as another input
+         * @param assign_core 
+         */
+        void min2d(Tensor<int8_t> &output,
+                   Tensor<int8_t> &input0,
+                   Tensor<int8_t> &input1,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief min2d(input0, input1)
+         * 
+         * @tparam inplace: whether directly store the output to input0
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param input0          as one input
+         * @param input1          as another input
+         * @param assign_core     not effective yet
+         * @return min2d result or no return(result store to input0)
+         */
+        template <bool inplace = false, typename feature_t>
+        auto min2d(Tensor<feature_t> &input0,
+                   Tensor<feature_t> &input1,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE) -> typename std::conditional<inplace, void, Tensor<feature_t>>::type
+        {
+            assert(input0.is_same_shape(input1));
+            assert(input0.exponent == input1.exponent);
+
+            DL_LOG_NN_LATENCY_INIT();
+            Tensor<feature_t> output;
+
+            if constexpr (!inplace)
+            {
+                DL_LOG_NN_LATENCY_START();
+                output.set_exponent(input0.exponent).set_shape(input0.shape).malloc_element();
+                DL_LOG_NN_LATENCY_END("apply");
+
+                DL_LOG_NN_LATENCY_START();
+                min2d(output, input0, input1, assign_core);
+                DL_LOG_NN_LATENCY_END("min2d");
+
+                return output;
+            }
+            else
+            {
+                DL_LOG_NN_LATENCY_START();
+                min2d(input0, input0, input1, assign_core);
+                DL_LOG_NN_LATENCY_END("min2d");
+            }
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_mul2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_mul2d.hpp
new file mode 100644
index 00000000000..909619a8767
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_mul2d.hpp
@@ -0,0 +1,91 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief activation(mul2d(input0, input1)).
+         * 
+         * @param output            as an output
+         * @param input0            as one input
+         * @param input1            as another input
+         * @param activation        activation of mul2d, if you don't specify anything, no activation is applied
+         * @param assign_core       not effective yet
+         * @param output_exponent   exponent of output, only and must specify if inplace operation happens
+         */
+        void mul2d(Tensor<int16_t> &output,
+                   Tensor<int16_t> &input0,
+                   Tensor<int16_t> &input1,
+                   const Activation<int16_t> *const activation = NULL,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE,
+                   const int output_exponent = INT_MIN);
+
+        /**
+         * @brief activation(mul2d(input0, input1)).
+         * 
+         * @param output            as an output
+         * @param input0            as one input
+         * @param input1            as another input
+         * @param activation        activation of mul2d, if you don't specify anything, no activation is applied
+         * @param assign_core       not effective yet
+         * @param output_exponent   exponent of output, only and must specify if inplace operation happens
+         */
+        void mul2d(Tensor<int8_t> &output,
+                   Tensor<int8_t> &input0,
+                   Tensor<int8_t> &input1,
+                   const Activation<int8_t> *const activation = NULL,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE,
+                   const int output_exponent = INT_MIN);
+
+        /**
+         * @brief activation(mul2d(input0, input1)).
+         * 
+         * @tparam inplace: whether directly store the output to input0
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param output_exponent exponent of output
+         * @param input0          as one input
+         * @param input1          as another input
+         * @param activation      activation of mul2d, if you don't specify anything, no activation is applied
+         * @param assign_core     not effective yet
+         * @return mul2d result or no return(result store to input0)
+         */
+        template <bool inplace = false, typename feature_t>
+        auto mul2d(const int output_exponent,
+                   Tensor<feature_t> &input0,
+                   Tensor<feature_t> &input1,
+                   const Activation<feature_t> *activation,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE) -> typename std::conditional<inplace, void, Tensor<feature_t>>::type
+        {
+            assert(input0.is_same_shape(input1));
+
+            DL_LOG_NN_LATENCY_INIT();
+            Tensor<feature_t> output;
+
+            if constexpr (!inplace)
+            {
+                DL_LOG_NN_LATENCY_START();
+                output.set_exponent(output_exponent).set_shape(input0.shape).malloc_element();
+                DL_LOG_NN_LATENCY_END("apply");
+
+                DL_LOG_NN_LATENCY_START();
+                mul2d(output, input0, input1, activation, assign_core);
+                DL_LOG_NN_LATENCY_END("mul2d");
+
+                return output;
+            }
+            else
+            {
+                DL_LOG_NN_LATENCY_START();
+                mul2d(input0, input0, input1, activation, assign_core, output_exponent);
+                DL_LOG_NN_LATENCY_END("mul2d");
+            }
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_pad.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_pad.hpp
new file mode 100644
index 00000000000..a3c915dadf2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_pad.hpp
@@ -0,0 +1,120 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief pad(input)
+         * 
+         * @tparam feature_t 
+         * @param output            as an output
+         * @param input             as an input
+         * @param paddings          number of values padded to the edges of each dim
+         * @param constant_values   used in PADDING_CONSTANT, the values to set the padded values for each dim
+         * @param mode              One of the following: PADDING_EMPTY, PADDING_CONSTANT, PADDING_EDGE, PADDING_REFLECT, PADDING_SYMMETRIC
+         * @param assign_core       not effective yet
+         */
+        template <typename feature_t>
+        void pad(Tensor<feature_t> &output,
+                 Tensor<feature_t> &input,
+                 std::vector<int> paddings,
+                 std::vector<feature_t> constant_values,
+                 padding_mode_t mode,
+                 const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        
+        /**
+         * @brief 
+         * 
+         * @tparam feature_t 
+         * @param input                 as an input
+         * @param paddings              number of values padded to the edges of each dim
+         * @param constant_values       used in PADDING_CONSTANT, the values to set the padded values for each dim
+         * @param mode                  One of the following: PADDING_EMPTY, PADDING_CONSTANT, PADDING_EDGE, PADDING_REFLECT, PADDING_SYMMETRIC
+         * @param assign_core           not effective yet
+         * @return Tensor<feature_t>    the padded Tensor
+         */
+        template <typename feature_t>
+        Tensor<feature_t> pad(Tensor<feature_t> &input,
+                              std::vector<int> paddings,
+                              std::vector<feature_t> constant_values,
+                              padding_mode_t mode,
+                              const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE)
+        {
+            DL_LOG_NN_LATENCY_INIT();
+
+            DL_LOG_NN_LATENCY_START();
+
+            assert(paddings.size() > 0);
+            int input_dims = input.shape.size();
+            int padding_dims = input_dims * 2;
+            std::vector<int> _paddings(padding_dims, 0);
+            if (paddings.size() == 1)
+            {
+                for (int i = 0; i < padding_dims; ++i)
+                {
+                    _paddings[i] = paddings[0];
+                }
+            }
+            else if (paddings.size() == 2)
+            {
+                for (int i = 0; i < input_dims; ++i)
+                {
+                    _paddings[2 * i] = paddings[0];
+                    _paddings[2 * i + 1] = paddings[1];
+                }
+            }
+            else
+            {
+                assert(paddings.size() == padding_dims);
+                _paddings = paddings;
+            }
+
+            std::vector<feature_t> _constant_values(padding_dims, 0);
+            if (mode == PADDING_CONSTANT)
+            {
+                if (constant_values.size() == 1)
+                {
+                    for (int i = 0; i < padding_dims; ++i)
+                    {
+                        _constant_values[i] = constant_values[0];
+                    }
+                }
+                else if (constant_values.size() == 2)
+                {
+                    for (int i = 0; i < input_dims; ++i)
+                    {
+                        _constant_values[2 * i] = constant_values[0];
+                        _constant_values[2 * i + 1] = constant_values[1];
+                    }
+                }
+                else
+                {
+                    assert(constant_values.size() == padding_dims);
+                    _constant_values = constant_values;
+                }
+            }
+
+            std::vector<int> output_shape = input.shape;
+            for (int i = 0; i < input_dims; ++i)
+            {
+                output_shape[i] += (_paddings[2 * i] + _paddings[2 * i + 1]);
+            }
+
+            Tensor<feature_t> output;
+            output.set_exponent(input.exponent).set_shape(output_shape).malloc_element();
+            DL_LOG_NN_LATENCY_END("apply");
+
+            DL_LOG_NN_LATENCY_START();
+            pad(output, input, _paddings, _constant_values, mode, assign_core);
+            DL_LOG_NN_LATENCY_END("pad");
+
+            return output;
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_prelu.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_prelu.hpp
new file mode 100644
index 00000000000..e83e8975604
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_prelu.hpp
@@ -0,0 +1,82 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief prelu(input).
+         * 
+         * @param output                as an output
+         * @param input                 as an input
+         * @param activation_element    quantized alpha elements along channel axis
+         * @param activation_exponent   exponent of quantized alpha elements
+         * @param assign_core not effective yet
+         */
+        void prelu(Tensor<int16_t> &output,
+                   Tensor<int16_t> &input,
+                   const int16_t *activation_element,
+                   const int activation_exponent,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief prelu(input).
+         * 
+         * @param output                as an output
+         * @param input                 as an input
+         * @param activation_element    quantized alpha elements along channel axis
+         * @param activation_exponent   exponent of quantized alpha elements
+         * @param assign_core not effective yet
+         */
+        void prelu(Tensor<int8_t> &output,
+                   Tensor<int8_t> &input,
+                   const int8_t *activation_element,
+                   const int activation_exponent,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief prelu(input)
+         * 
+         * @tparam inplace: whether directly store the output to input
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param input                 as an input
+         * @param activation_element    quantized alpha elements along channel axis
+         * @param activation_exponent   exponent of quantized alpha elements
+         * @param assign_core           not effective yet
+         * @return prelu result or no return(result store to input)
+         */
+        template <bool inplace = false, typename feature_t>
+        auto prelu(Tensor<feature_t> &input,
+                   const feature_t *activation_element,
+                   const int activation_exponent,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE) -> typename std::conditional<inplace, void, Tensor<feature_t>>::type
+        {
+            DL_LOG_NN_LATENCY_INIT();
+            Tensor<feature_t> output;
+            if constexpr (!inplace)
+            {
+                DL_LOG_NN_LATENCY_START();
+                output.set_exponent(input.exponent).set_shape(input.shape).malloc_element();
+                DL_LOG_NN_LATENCY_END("apply");
+
+                DL_LOG_NN_LATENCY_START();
+                prelu(output, input, activation_element, activation_exponent, assign_core);
+                DL_LOG_NN_LATENCY_END("prelu");
+
+                return output;
+            }
+            else
+            {
+                DL_LOG_NN_LATENCY_START();
+                prelu(input, input, activation_element, activation_exponent, assign_core);
+                DL_LOG_NN_LATENCY_END("prelu");
+            }
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_relu.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_relu.hpp
new file mode 100644
index 00000000000..308492dfe4b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_relu.hpp
@@ -0,0 +1,70 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief relu(input).
+         * 
+         * @param output      as an output
+         * @param input       as an input
+         * @param assign_core not effective yet
+         */
+        void relu(Tensor<int16_t> &output,
+                  Tensor<int16_t> &input,
+                  const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief relu(input).
+         * 
+         * @param output      as an output
+         * @param input       as an input
+         * @param assign_core not effective yet
+         */
+        void relu(Tensor<int8_t> &output,
+                  Tensor<int8_t> &input,
+                  const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE);
+
+        /**
+         * @brief relu(input)
+         * 
+         * @tparam inplace: whether directly store the output to input
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param input           as an input
+         * @param assign_core     not effective yet
+         * @return relu result or no return(result store to input)
+         */
+        template <bool inplace = false, typename feature_t>
+        auto relu(Tensor<feature_t> &input, const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE) -> typename std::conditional<inplace, void, Tensor<feature_t>>::type
+        {
+            DL_LOG_NN_LATENCY_INIT();
+            Tensor<feature_t> output;
+
+            if constexpr (!inplace)
+            {
+                DL_LOG_NN_LATENCY_START();
+                output.set_exponent(input.exponent).set_shape(input.shape).malloc_element();
+                DL_LOG_NN_LATENCY_END("apply");
+
+                DL_LOG_NN_LATENCY_START();
+                relu(output, input, assign_core);
+                DL_LOG_NN_LATENCY_END("relu");
+
+                return output;
+            }
+            else
+            {
+                DL_LOG_NN_LATENCY_START();
+                relu(input, input, assign_core);
+                DL_LOG_NN_LATENCY_END("relu");
+            }
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_sub2d.hpp b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_sub2d.hpp
new file mode 100644
index 00000000000..5bbd4940b10
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/nn/dl_nn_sub2d.hpp
@@ -0,0 +1,90 @@
+#pragma once
+
+#include "dl_constant.hpp"
+#include "dl_variable.hpp"
+#include "dl_nn.hpp"
+
+namespace dl
+{
+    namespace nn
+    {
+        /**
+         * @brief activation(sub2d(input0, input1)).
+         * 
+         * @param output      as an output
+         * @param input0      as one input
+         * @param input1      as another input
+         * @param activation  activation of sub2d, if you don't specify anything, no activation is applied
+         * @param assign_core not effective yet
+         * @param output_exponent   exponent of output, only and must specify if inplace operation happens 
+         */
+        void sub2d(Tensor<int16_t> &output,
+                   Tensor<int16_t> &input0,
+                   Tensor<int16_t> &input1,
+                   const Activation<int16_t> *const activation = NULL,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE,
+                   const int output_exponent = INT_MIN);
+
+        /**
+         * @brief activation(sub2d(input0, input1)).
+         * 
+         * @param output      as an output
+         * @param input0      as one input
+         * @param input1      as another input
+         * @param activation  activation of sub2d, if you don't specify anything, no activation is applied
+         * @param assign_core not effective yet
+         * @param output_exponent   exponent of output, only and must specify if inplace operation happens
+         */
+        void sub2d(Tensor<int8_t> &output,
+                   Tensor<int8_t> &input0,
+                   Tensor<int8_t> &input1,
+                   const Activation<int8_t> *const activation = NULL,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE,
+                   const int output_exponent = INT_MIN);
+
+        /**
+         * @brief activation(sub2d(input0, input1)).
+         * 
+         * @tparam inplace: whether directly store the output to input0
+         * @tparam feature_t supports int16_t and int8_t,
+         *         - int16_t: stands for operation in int16_t quantize
+         *         - int8_t: stands for operation in int8_t quantize
+         * @param output_exponent exponent of output
+         * @param input0          as one input
+         * @param input1          as another input
+         * @param activation      activation of sub2d, if you don't specify anything, no activation is applied
+         * @param assign_core     not effective yet
+         * @return sub2d result or no return(result store to input0)
+         */
+        template <bool inplace = false, typename feature_t>
+        auto sub2d(const int output_exponent,
+                   Tensor<feature_t> &input0,
+                   Tensor<feature_t> &input1,
+                   const Activation<feature_t> *activation,
+                   const std::vector<int> &assign_core = CONFIG_DEFAULT_ASSIGN_CORE) -> typename std::conditional<inplace, void, Tensor<feature_t>>::type
+        {
+            assert(input0.is_same_shape(input1));
+
+            DL_LOG_NN_LATENCY_INIT();
+            Tensor<feature_t> output;
+            if constexpr (!inplace)
+            {
+                DL_LOG_NN_LATENCY_START();
+                output.set_exponent(output_exponent).set_shape(input0.shape).malloc_element();
+                DL_LOG_NN_LATENCY_END("apply");
+
+                DL_LOG_NN_LATENCY_START();
+                sub2d(output, input0, input1, activation, assign_core);
+                DL_LOG_NN_LATENCY_END("sub2d");
+
+                return output;
+            }
+            else
+            {
+                DL_LOG_NN_LATENCY_START();
+                sub2d(input0, input0, input1, activation, assign_core, output_exponent);
+                DL_LOG_NN_LATENCY_END("sub2d");
+            }
+        }
+    } // namespace nn
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/tool/dl_tool.hpp b/tools/sdk/esp32s3/include/esp-dl/include/tool/dl_tool.hpp
new file mode 100644
index 00000000000..e5490e073d1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/tool/dl_tool.hpp
@@ -0,0 +1,427 @@
+#pragma once
+
+#include <vector>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "esp_system.h"
+#include "esp_timer.h"
+#include "freertos/FreeRTOS.h"
+
+#include "dl_define.hpp"
+
+extern "C"
+{
+#if CONFIG_TIE728_BOOST
+    void dl_tie728_memset_8b(void *ptr, const int value, const int n);
+    void dl_tie728_memset_16b(void *ptr, const int value, const int n);
+    void dl_tie728_memset_32b(void *ptr, const int value, const int n);
+#endif
+}
+
+namespace dl
+{
+    namespace tool
+    {
+        /**
+         * @brief Set memory zero.
+         * 
+         * @param ptr pointer of memory
+         * @param n   byte number
+         */
+        void set_zero(void *ptr, const int n);
+
+        /**
+         * @brief Set array value.
+         * 
+         * @tparam T supports all data type, sizeof(T) equals to 1, 2 and 4 will boost by instruction 
+         * @param ptr   pointer of array
+         * @param value value to set
+         * @param len   length of array
+         */
+        template <typename T>
+        void set_value(T *ptr, const T value, const int len)
+        {
+#if CONFIG_TIE728_BOOST
+            int *temp = (int *)&value;
+            if (sizeof(T) == 1)
+                dl_tie728_memset_8b(ptr, *temp, len);
+            else if (sizeof(T) == 2)
+                dl_tie728_memset_16b(ptr, *temp, len);
+            else if (sizeof(T) == 4)
+                dl_tie728_memset_32b(ptr, *temp, len);
+            else
+#endif
+                for (size_t i = 0; i < len; i++)
+                    ptr[i] = value;
+        }
+
+        /**
+         * @brief Copy memory.
+         * 
+         * @param dst pointer of destination
+         * @param src pointer of source
+         * @param n   byte number
+         */
+        void copy_memory(void *dst, void *src, const int n);
+
+        /**
+         * @brief Apply memory without initialized. Can use free_aligned() to free the memory.
+         * 
+         * @param number number of elements
+         * @param size   size of element
+         * @param align  number of byte aligned, e.g., 16 means 16-byte aligned
+         * @return pointer of allocated memory. NULL for failed
+         */
+        inline void *malloc_aligned(int number, int size, int align = 4)
+        {
+            assert((align > 0) && (((align & (align-1)) == 0)));
+            int total_size = number * size;
+
+            void *res = heap_caps_aligned_alloc(align, total_size, MALLOC_CAP_8BIT | MALLOC_CAP_INTERNAL);
+#if DL_SPIRAM_SUPPORT
+            if (NULL == res)
+                res = heap_caps_aligned_alloc(align, total_size, MALLOC_CAP_SPIRAM);
+#endif
+            if (NULL == res)
+            {
+                printf("Fail to malloc %d bytes from DRAM(%d bytyes) and PSRAM(%d bytes), PSRAM is %s.\n",
+                       total_size,
+                       heap_caps_get_free_size(MALLOC_CAP_8BIT | MALLOC_CAP_INTERNAL),
+                       heap_caps_get_free_size(MALLOC_CAP_SPIRAM),
+                       DL_SPIRAM_SUPPORT ? "on" : "off");
+                return NULL;
+            }
+
+            return (void *)res;
+        }
+
+        /**
+         * @brief Apply memory with zero-initialized. Can use free_aligned() to free the memory.
+         * 
+         * @param number number of elements
+         * @param size   size of element
+         * @param align  number of byte aligned, e.g., 16 means 16-byte aligned
+         * @return pointer of allocated memory. NULL for failed
+         */
+        inline void *calloc_aligned(int number, int size, int align = 4)
+        {
+
+            void *aligned = malloc_aligned(number, size, align);
+            set_zero(aligned, number * size);
+
+            return (void *)aligned;
+        }
+
+        /**
+         * @brief Free the calloc_aligned() and malloc_aligned() memory
+         * 
+         * @param address pointer of memory to free
+         */
+        inline void free_aligned(void *address)
+        {
+            if (NULL == address)
+                return;
+
+            heap_caps_free(address);
+        }
+
+        /**
+         * @brief Apply memory without initialized in preference order: internal aligned, internal, external aligned
+         * 
+         * @param number number of elements
+         * @param size   size of element
+         * @param align  number of byte aligned, e.g., 16 means 16-byte aligned
+         * @return pointer of allocated memory. NULL for failed
+         */
+        inline void *malloc_aligned_prefer(int number, int size, int align = 4)
+        {
+            assert((align > 0) && (((align & (align-1)) == 0)));
+            int total_size = number * size;
+            void *res = heap_caps_aligned_alloc(align, total_size, MALLOC_CAP_8BIT | MALLOC_CAP_INTERNAL);
+            if (NULL == res){
+                res = heap_caps_malloc(total_size, MALLOC_CAP_8BIT | MALLOC_CAP_INTERNAL);
+            }
+#if DL_SPIRAM_SUPPORT
+            if (NULL == res){
+                res = heap_caps_aligned_alloc(align, total_size, MALLOC_CAP_SPIRAM);
+            }
+#endif
+            if (NULL == res)
+            {
+                printf("Fail to malloc %d bytes from DRAM(%d bytyes) and PSRAM(%d bytes), PSRAM is %s.\n",
+                       total_size,
+                       heap_caps_get_free_size(MALLOC_CAP_8BIT | MALLOC_CAP_INTERNAL),
+                       heap_caps_get_free_size(MALLOC_CAP_SPIRAM),
+                       DL_SPIRAM_SUPPORT ? "on" : "off");
+                return NULL;
+            }
+
+            return res;
+        }
+
+        /**
+         * @brief Apply memory with zero-initialized in preference order: internal aligned, internal, external aligned
+         * 
+         * @param number number of elements
+         * @param size   size of element
+         * @param align  number of byte aligned, e.g., 16 means 16-byte aligned
+         * @return pointer of allocated memory. NULL for failed
+         */
+        inline void *calloc_aligned_prefer(int number, int size, int align = 4)
+        {
+            void *res = malloc_aligned_prefer(number, size, align);
+            set_zero(res, number * size);
+
+            return (void *)res;
+        }
+
+        /**
+         * @brief Free the calloc_aligned_prefer() and malloc_aligned_prefer() memory
+         * 
+         * @param address pointer of memory to free
+         */
+        inline void free_aligned_prefer(void *address)
+        {
+            if (NULL == address)
+                return;
+
+            heap_caps_free(address);
+        }
+
+        /**
+         * @brief Truncate the input into int8_t range.
+         * 
+         * @tparam T supports all integer types
+         * @param output as an output
+         * @param input  as an input
+         */
+        template <typename T>
+        void truncate(int8_t &output, T input)
+        {
+            if (input >= DL_Q8_MAX)
+                output = DL_Q8_MAX;
+            else if (input <= DL_Q8_MIN)
+                output = DL_Q8_MIN;
+            else
+                output = input;
+        }
+
+        /**
+         * @brief Truncate the input into int16_t range.
+         * 
+         * @tparam T supports all integer types
+         * @param output as an output
+         * @param input  as an input
+         */
+        template <typename T>
+        void truncate(int16_t &output, T input)
+        {
+            if (input >= DL_Q16_MAX)
+                output = DL_Q16_MAX;
+            else if (input <= DL_Q16_MIN)
+                output = DL_Q16_MIN;
+            else
+                output = input;
+        }
+
+        /**
+         * @brief Calculate the exponent of quantizing 1/n into max_value range.
+         * 
+         * @param n          1/n: value to be quantized
+         * @param max_value  the max_range
+         */
+        inline int calculate_exponent(int n, int max_value)
+        {
+            int exp = 0;
+            int tmp = 1 / n;
+            while (tmp < max_value)
+            {
+                exp += 1;
+                tmp = (1 << exp) / n;
+            }
+            exp -= 1;
+
+            return exp;
+        }
+
+        /**
+         * @brief Print vector in format "[x1, x2, ...]\n".
+         * 
+         * @param array to print
+         */
+        inline void print_vector(std::vector<int> &array, const char *message = NULL)
+        {
+            if (message)
+                printf("%s: ", message);
+
+            printf("[");
+            for (int i = 0; i < array.size(); i++)
+            {
+                printf(", %d" + (i ? 0 : 2), array[i]);
+            }
+            printf("]\n");
+        }
+
+        /**
+         * @brief Get the cycle object
+         * 
+         * @return cycle count
+         */
+        inline uint32_t get_cycle()
+        {
+            uint32_t ccount;
+            __asm__ __volatile__("rsr %0, ccount"
+                                 : "=a"(ccount)
+                                 :
+                                 : "memory");
+            return ccount;
+        }
+
+        class Latency
+        {
+        private:
+            const uint32_t size; /*<! size of queue */
+            uint32_t *queue;     /*<! queue for storing history period */
+            uint32_t period;     /*<! current period */
+            uint32_t sum;        /*<! sum of period */
+            uint32_t count;      /*<! the number of added period */
+            uint32_t next;       /*<! point to next element in queue */
+            uint32_t timestamp;  /*<! record the start >*/
+
+        public:
+            /**
+             * @brief Construct a new Latency object.
+             * 
+             * @param size 
+             */
+            Latency(const uint32_t size = 1) : size(size),
+                                               period(0),
+                                               sum(0),
+                                               count(0),
+                                               next(0)
+            {
+                this->queue = (this->size > 1) ? (uint32_t *)calloc(this->size, sizeof(uint32_t)) : NULL;
+            }
+
+            /**
+             * @brief Destroy the Latency object.
+             * 
+             */
+            ~Latency()
+            {
+                if (this->queue)
+                    free(this->queue);
+            }
+
+            /**
+             * @brief Record the start timestamp.
+             * 
+             */
+            void start()
+            {
+#if DL_LOG_LATENCY_UNIT
+                this->timestamp = get_cycle();
+#else
+                this->timestamp = esp_timer_get_time();
+#endif
+            }
+
+            /**
+             * @brief Record the period.
+             * 
+             */
+            void end()
+            {
+#if DL_LOG_LATENCY_UNIT
+                this->period = get_cycle() - this->timestamp;
+#else
+                this->period = esp_timer_get_time() - this->timestamp;
+#endif
+                if (this->queue)
+                {
+                    this->sum -= this->queue[this->next];
+                    this->queue[this->next] = this->period;
+                    this->sum += this->queue[this->next];
+                    this->next++;
+                    this->next = this->next % this->size;
+                    if (this->count < this->size)
+                    {
+                        this->count++;
+                    }
+                }
+            }
+
+            /**
+             * @brief Return the period.
+             * 
+             * @return this->timestamp_end - this->timestamp
+             */
+            uint32_t get_period()
+            {
+                return this->period;
+            }
+
+            /**
+             * @brief Get the average period.
+             * 
+             * @return average latency 
+             */
+            uint32_t get_average_period()
+            {
+                return this->queue ? (this->sum / this->count) : this->period;
+            }
+
+            /**
+             * @brief Clear the period
+             * 
+             */
+            void clear_period()
+            {
+                this->period = 0;
+            }
+
+            /**
+             * @brief Print in format "latency: {this->period} {unit}\n".
+             */
+            void print()
+            {
+#if DL_LOG_LATENCY_UNIT
+                printf("latency: %15u cycle\n", this->get_average_period());
+#else
+                printf("latency: %15u us\n", this->get_average_period());
+#endif
+            }
+
+            /**
+             * @brief Print in format "{message}: {this->period} {unit}\n".
+             * 
+             * @param message message of print
+             */
+            void print(const char *message)
+            {
+#if DL_LOG_LATENCY_UNIT
+                printf("%s: %15u cycle\n", message, this->get_average_period());
+#else
+                printf("%s: %15u us\n", message, this->get_average_period());
+#endif
+            }
+
+            /**
+             * @brief Print in format "{prefix}::{key}: {this->period} {unit}\n".
+             * 
+             * @param prefix prefix of print
+             * @param key    key of print
+             */
+            void print(const char *prefix, const char *key)
+            {
+#if DL_LOG_LATENCY_UNIT
+                printf("%s::%s: %u cycle\n", prefix, key, this->get_average_period());
+#else
+                printf("%s::%s: %u us\n", prefix, key, this->get_average_period());
+#endif
+            }
+        };
+    } // namespace tool
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/tool/dl_tool_cache.hpp b/tools/sdk/esp32s3/include/esp-dl/include/tool/dl_tool_cache.hpp
new file mode 100644
index 00000000000..74c81717a58
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/tool/dl_tool_cache.hpp
@@ -0,0 +1,74 @@
+#pragma once
+
+#include <stdint.h>
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/cache.h"
+#include "soc/extmem_reg.h"
+#endif
+
+namespace dl
+{
+    namespace tool
+    {
+        namespace cache
+        {
+            /**
+             * @brief Initialize preload.
+             * 
+             * @param preload One of 1 or 0,
+             *                - 1: turn on the preload
+             *                - 0: turn off the preload
+             * @return 
+             *         - 1: Initialize successfully
+             *         - 0: Initialize successfully, autoload has been turned off
+             *         - -1: Initialize failed, the chip does not support preload
+             */
+            int8_t preload_init(uint8_t preload = 1);
+
+            /**
+             * @brief Preload memory.
+             * 
+             * @param addr the start address of data to be preloaded
+             * @param size the size of the data in byte to be preloaded
+             */
+            void preload_func(uint32_t addr, uint32_t size);
+
+            /**
+             * @brief Initialize autoload. 
+             * 
+             * @param autoload  One of 1 or 0,
+             *                  - 1: turn on the autoload
+             *                  - 0: turn off the autoload
+             * @param trigger   One of 0 or 1 or 2,
+             *                  - 0: miss, TODO:@yuanjiong
+             *                  - 1: hit, TODO:@yuanjiong
+             *                  - 2: both,TODO:@yuanjiong
+             * @param line_size the number of cache lines to be autoloaded
+             * @return status,
+             *         - 1: Initialize sucessfully
+             *         - 0: Initialize suceesfully, preload has been turned off
+             *         - -1: Initialize failed, the chip does not support autoload
+             */
+            int8_t autoload_init(uint8_t autoload = 1, uint8_t trigger = 2, uint8_t line_size = 0);
+
+            /**
+             * @brief Autoload memory.           
+             * 
+             * @param addr1 the start address of data1 to be autoloaded
+             * @param size1 the size of the data1 in byte to be preloaded
+             * @param addr2 the start address of data2 to be autoloaded
+             * @param size2 the size of the data2 in byte to be preloaded
+             */
+            void autoload_func(uint32_t addr1, uint32_t size1, uint32_t addr2, uint32_t size2);
+
+            /**
+             * @brief Autoload memory.
+             * 
+             * @param addr1 the start address of data1 to be autoloaded
+             * @param size1 the size of the data1 in byte to be preloaded
+             */
+            void autoload_func(uint32_t addr1, uint32_t size1);
+        }
+    } // namespace tool
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/typedef/dl_constant.hpp b/tools/sdk/esp32s3/include/esp-dl/include/typedef/dl_constant.hpp
new file mode 100644
index 00000000000..a111817e3d6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/typedef/dl_constant.hpp
@@ -0,0 +1,129 @@
+#pragma once
+
+#include "dl_define.hpp"
+#include <vector>
+#include <stdint.h>
+
+namespace dl
+{
+    /**
+     * @brief Base class of Filter, Bias, Activation.
+     * 
+     * @tparam T supports int16_t and int8_t,
+     *         - int16_t: stands for operation in int16_t quantize,
+     *         - int8_t: stands for operation in int8_t quantize.
+     */
+    template <typename T>
+    class Constant
+    {
+    public:
+        const T *element;             /*<! point to element. >*/
+        const int exponent;           /*<! exponent of element. >*/
+        const std::vector<int> shape; /*<! shape of element. >*/
+
+        /**
+         * @brief Construct a new Constant object.
+         * 
+         * @param element  point to element.
+         * @param exponent exponent of element.
+         * @param shape    shape of Constant.
+         */
+        Constant(const T *element, const int exponent, const std::vector<int> shape);
+    };
+
+    /**
+     * @brief Filter.
+     * NOTE: The shape format of filter is fixed, but the element sequence depands on optimization method.
+     *       - 1D: reserved
+     *       - 2D: shape format is [filter_height, filter_width, input_channel, output_channel]. dilation format is [height, width]
+     *  
+     * @tparam T supports int16_t and int8_t,
+     *         - int16_t: stands for operation in int16_t quantize,
+     *         - int8_t: stands for operation in int8_t quantize.
+     */
+    template <typename T>
+    class Filter : public Constant<T>
+    {
+    public:
+        const std::vector<int> dilation;      /*<! - 1D: reserved >*/
+                                              /*<! - 2D: [dilation_in_height, dilation_in_width] >*/
+        std::vector<int> shape_with_dilation; /*<! - 1D: reserved >*/
+                                              /*<! - 2D: [filter_height_with_dilation, filter_width_with_dilation, input_channel, output_channel] >*/
+        const int8_t* channel_exponent;       /*<! exponent for per-channel >*/
+        const int channel_exponent_size;
+
+        /**
+         * @brief Construct a new Filter object. 
+         * 
+         * @param element  point to element
+         * @param exponent exponent of element
+         * @param shape    shape of Filter,
+         *                 - 1D: reserved
+         *                 - 2D: for convolution is [filter_height, filter_width, input_channel, output_channel],
+         *                       for depthwise convolution is [filter_height, filter_width, input_channel, 1]
+         * @param dilation dilation of Filter
+         *                 - 1D: reserved
+         *                 - 2D: [dilation_in_height, dilation_in_width]
+         */
+        Filter(const T *element, const int exponent, const std::vector<int> shape, const std::vector<int> dilation = {1, 1});
+
+        /**
+         * @brief Construct a new Filter object. it is only avaliable to int16_t
+         * 
+         * @param element               point to element
+         * @param channel_exponent      exponent for per-channel
+         * @param channel_exponent_size size of exponent
+         * @param shape                 shape of element
+         * @param dilation              dilation of Filter
+         *                              - 1D: reserved
+         *                              - 2D: [dilation_in_height, dilation_in_width]
+         */
+        Filter(const T *element, const int8_t* channel_exponent, const int channel_exponent_size, const std::vector<int> shape, const std::vector<int> dilation = {1, 1});
+
+        /**
+         * @brief Print the n-th filter.
+         * 
+         * @param n       index of output_channel
+         * @param message to print
+         */
+        void print2d_n(const int n, const char *message) const;
+    };
+
+    /**
+     * @brief Bias.
+     * 
+     * @tparam T supports int16_t and int8_t
+     *         - int16_t: stands for operation in int16_t quantize
+     *         - int8_t: stands for operation in int8_t quantize
+     */
+    template <typename T>
+    class Bias : public Constant<T>
+    {
+    public:
+        using Constant<T>::Constant;
+    };
+
+    /**
+     * @brief Activation.
+     * 
+     * @tparam T supports int16_t and int8_t
+     *         - int16_t: stands for operation in int16_t quantize
+     *         - int8_t: stands for operation in int8_t quantize
+     */
+    template <typename T>
+    class Activation : public Constant<T>
+    {
+    public:
+        const activation_type_t type; /*<! One of Linear or ReLU or LeakyReLU or PReLU */
+
+        /**
+         * @brief Construct a new Activation object.
+         * 
+         * @param type      One of Linear or ReLU or LeakyReLU or PReLU
+         * @param element   point to element of activation
+         * @param exponent  exponent of element
+         * @param shape     shape of element
+         */
+        Activation(const activation_type_t type, const T *element = NULL, const int exponent = 0, const std::vector<int> shape = {0});
+    };
+} // namespace dl
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dl/include/typedef/dl_variable.hpp b/tools/sdk/esp32s3/include/esp-dl/include/typedef/dl_variable.hpp
new file mode 100644
index 00000000000..118f6430575
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dl/include/typedef/dl_variable.hpp
@@ -0,0 +1,553 @@
+#pragma once
+
+#include <stdio.h>
+#include <vector>
+#include <assert.h>
+#include <iostream>
+
+#include "dl_tool.hpp"
+
+namespace dl
+{
+    /**
+     * @brief Tensor
+     * 
+     * @tparam T support uint8_t, int8_t, int16_t and float.
+     */
+    template <typename T>
+    class Tensor
+    {
+    private:
+        int size;                     /*<! size of element including padding */
+        bool auto_free;               /*<! free element when object destroy */
+        std::vector<int> axis_offset; /*<! element offset of each axis */
+
+    public:
+        T *element;             /*<! point to element */
+        int exponent;           /*<! exponent of element */
+        std::vector<int> shape; /*<! shape of Tensor */
+
+        /**
+         * @brief Construct a new Tensor object
+         * 
+         */
+        Tensor() : auto_free(true), element(NULL), exponent(0) { this->set_shape({0}); }
+
+        /**
+         * @brief Construct a new Tensor object by copying from input.
+         * 
+         * @param input an input Tensor
+         * @param deep  one of true or false
+         *              - true: apply a new memory, copy value from input.element to this new memory
+         *              - false: take over input.element to this->element
+         */
+        Tensor(Tensor<T> &input, bool deep) : size(input.size),
+                                              auto_free(input.auto_free),
+                                              exponent(input.exponent)
+        {
+            this->set_shape(input.shape);
+            if (deep && (input.element != NULL))
+            {
+                int size_real = input.get_size();
+                T *new_element = (T *)tool::calloc_aligned_prefer(size_real, sizeof(T), 16);
+                tool::copy_memory(new_element, input.element, size_real * sizeof(T));
+                this->element = new_element;
+            }
+            else
+            {
+                this->element = input.element;
+                this->auto_free = false;
+            }
+        }
+
+        /**
+         * @brief Destroy the Tensor object
+         * 
+         */
+        ~Tensor()
+        {
+            if (this->auto_free)
+                this->free_element();
+        }
+
+        /**
+         * @brief copy the element of the input Tensor.
+         * 
+         * @param input an input Tensor
+         * @param deep one of true or false
+         *              - true: apply a new memory, copy value from input.element to this new memory
+         *              - false: take over input.element to this->element
+         * @return Tensor<T>& self
+         */
+        Tensor<T> &copy_element(Tensor<T> &input, bool deep)
+        {
+            assert(this->get_size() == input.get_size());
+            assert(input.element != NULL);
+
+            this->malloc_element();
+            if (deep)
+            {
+                tool::copy_memory(this->element, input.element, this->get_size() * sizeof(T));
+            }
+            else
+            {
+                this->element = input.element;
+                this->auto_free = false;
+            }
+            return *this;
+        }
+
+        /**
+         * @brief Set the auto free object.
+         * 
+         * @param auto_free one of true or false
+         *                  - true: free element when object destroyed
+         *                  - false: do not
+         * @return self
+         */
+        Tensor<T> &set_auto_free(const bool auto_free)
+        {
+            this->auto_free = auto_free;
+            return *this;
+        }
+
+        /**
+         * @brief Set the element.
+         * 
+         * @param element point to element memory
+         * @return self
+         */
+        Tensor<T> &set_element(T *element, const bool auto_free = false)
+        {
+            assert(this->element == NULL);
+            this->element = element;
+            this->auto_free = auto_free;
+
+            return *this;
+        }
+
+        /**
+         * @brief Set the exponent.
+         * 
+         * @param exponent exponent of element
+         * @return self
+         */
+        Tensor<T> &set_exponent(const int exponent)
+        {
+            this->exponent = exponent;
+
+            return *this;
+        }
+
+        /**
+         * @brief Set the shape of Tensor.
+         * 
+         * @param shape the target shape 
+         *        
+         * @return self
+         */
+        Tensor<T> &set_shape(const std::vector<int> shape);
+
+        /**
+         * @brief print the shape of the Tensor
+         * 
+         */
+        void print_shape()
+        {
+            if (this->shape.size())
+            {
+                printf("shape = (");
+                for (int i = 0; i < this->shape.size() - 1; i++)
+                {
+                    printf("%d, ", this->shape[i]);
+                }
+                printf("%d)\n", this->shape.back());
+            }
+            else
+            {
+                printf("shape = ()\n");
+            }
+        }
+
+        /**
+         * @brief flatten the Tensor
+         * 
+         * @return Tensor<T>& self
+         */
+        Tensor<T> &flatten();
+
+        /**
+         * @brief Change a new shape to the Tensor without changing its data.
+         * 
+         * @param shape  the target shape
+         * @return Tensor<T>&  self
+         */
+        Tensor<T> &reshape(std::vector<int> shape);
+
+        /**
+         * @brief Remove dims with length==1 from Tensor
+         * 
+         * @param axis the dim to to be remove. make sure the length of the dim is equal to 1.
+         *              if axis == INT32_MAX, all the dims with length==1 will be removed.
+         * @return Tensor<T>& self 
+         */
+        Tensor<T> &squeeze(int axis = INT32_MAX);
+
+        /**
+         * @brief Insert a new dim that will appear at the axis position in the expanded Tensor shape.
+         * 
+         * @param axis the dim to be inserted
+         * @return Tensor<T>& self
+         */
+        Tensor<T> &expand_dims(int axis);
+
+        /**
+         * @brief Insert a new dim that will appear at the axis position in the expanded Tensor shape.
+         * 
+         * @param axis  the dim to be inserted
+         * @return Tensor<T>& self
+         */
+        Tensor<T> &expand_dims(std::vector<int> axis);
+
+        /**
+         * @brief Reverse or permute the axes of the Tensor
+         * 
+         * @param perm the new arangement of the dims. if perm == {}, the dims arangement will be reversed. 
+         * @return Tensor<T>& self
+         */
+        Tensor<T> &transpose(std::vector<int> perm = {});
+
+        /**
+         * @brief Reverse or permute the axes of the input Tensor
+         * 
+         * @param input the input Tensor
+         * @param perm the new arangement of the dims. if perm == {}, the dims arangement will be reversed. 
+         * @return Tensor<T>& self
+         */
+        Tensor<T> &transpose(Tensor<T> &input, std::vector<int> perm = {});
+
+        /**
+         * @brief Get the element pointer.
+         * 
+         * @return pointer to memory
+         */
+        T *get_element_ptr()
+        {
+            return this->element;
+        }
+
+        /**
+         * @brief Get the element value.
+         * 
+         * @param index   the index of each dim. 
+         * @return T element value
+         */
+        T get_element_value(const std::vector<int> index)
+        {
+            return this->element[this->get_element_index(index)];
+        }
+
+        /**
+         * @brief Get the element value.
+         * 
+         * @param index  the index of the element.
+         * @return T  element value
+         */
+        T get_element_value(int index)
+        {
+            return this->element[index];
+        }
+
+        /**
+         * @brief Set the all the element to value.
+         * 
+         * @param value  target value
+         * @return Tensor<T>& self
+         */
+        Tensor<T> &set_value(T value);
+
+        /**
+         * @brief Set the the element to value
+         * 
+         * @param value target value, it will be broadcast automatically. 
+         * @return Tensor<T>& self
+         */
+        Tensor<T> &set_value(Tensor<T> &value);
+
+        /**
+         * @brief Set the sliced element to value
+         * 
+         * @param axis_index_range range of slices
+         * @param value target value
+         * @return Tensor<T>& self
+         */
+        Tensor<T> &set_value(std::vector<int> axis_index_range, T value);
+
+        /**
+         * @brief Set the sliced element to value
+         * 
+         * @param axis_index_range range of slices
+         * @param value target value, it will be broadcast automatically. 
+         * @return Tensor<T>& self
+         */
+        Tensor<T> &set_value(std::vector<int> axis_index_range, Tensor<T> &value);
+
+        /**
+         * @brief Extracts a slice from the Tensor.
+         * 
+         * @param axis_index_range range of slices
+         * @return Tensor<T> output
+         */
+        Tensor<T> slice(std::vector<int> axis_index_range);
+
+        /**
+         * @brief Reverses specific dims of the tensor.
+         * 
+         * @param axis The dims to be reversed
+         * @return Tensor<T>& 
+         */
+        Tensor<T> &reverse(std::vector<int> axis);
+
+        /**
+         * @brief Get the size of Tensor.
+         * 
+         * @return  the size of Tensor.
+         */
+        int get_size()
+        {
+            return this->size;
+        }
+
+        /**
+         * @brief Get the axis offset
+         * 
+         * @return std::vector<int> the axis offset
+         */
+        std::vector<int> get_axis_offset()
+        {
+            return this->axis_offset;
+        }
+
+        /**
+         * @brief Apply memory with zero-initialized only if this->element is NULL.
+         * 
+         * @param auto_free one of true or false
+         *                  - true: free element when object destroyed
+         *                  - false: do not
+         * @return 
+         *         - true: on success
+         *         - false: if applying failed
+         */
+        bool calloc_element(const bool auto_free = true)
+        {
+            if (this->element != NULL)
+                return false;
+
+            this->element = (T *)dl::tool::calloc_aligned_prefer(this->get_size(), sizeof(T), 16);
+            this->auto_free = auto_free;
+
+            return true;
+        }
+
+        /**
+         * @brief Apply memory without initialized only if this->element is NULL.
+         * 
+         * @param auto_free one of true or false
+         *                  - true: free element when object destroyed
+         *                  - false: do not
+         * @return 
+         *         - true: on success
+         *         - false: if applying failed
+         */
+        bool malloc_element(const bool auto_free = true)
+        {
+            if (this->element != NULL)
+                return false;
+
+            this->element = (T *)tool::malloc_aligned_prefer(this->get_size(), sizeof(T), 16);
+            this->auto_free = auto_free;
+
+            return true;
+        }
+
+        /**
+         * @brief free element only if this->element != NULL
+         * set this->element to NULL, after free
+         * @brief Free element if this->element is not NULL.
+         */
+        void free_element()
+        {
+            if (this->auto_free && this->element)
+            {
+                tool::free_aligned_prefer(this->element);
+                this->element = NULL;
+            }
+        }
+
+        /**
+         * @brief print the element of the tensor
+         * 
+         * @param axis_index_range  the element range of each dims to be print. if axis_index_range == {}, all the element will be print. 
+         * @param message  to print  
+         */
+        void print(std::vector<int> axis_index_range = {}, const char *message = "");
+
+        /**
+         * @brief  print all the element of the Tensor.
+         * 
+         * @param message to print  
+         */
+        void print_all(const char *message = "")
+        {
+            std::cout << "\n"
+                      << message << " | ";
+            this->print_shape();
+
+            for (int i = 0; i < this->get_size(); i++)
+            {
+                std::cout << this->element[i] << " ";
+            }
+            std::cout << "\n";
+            return;
+        }
+
+        /**
+         * @brief Get the index of each dims
+         * 
+         * @param element_index the index of the element
+         * @return std::vector<int> the index of each dims
+         */
+        std::vector<int> get_axis_index(int element_index);
+
+        /**
+         * @brief Get the index of element 
+         * 
+         * @param axis_index the index of each dims
+         * @return int the index of element 
+         */
+        int get_element_index(const std::vector<int> axis_index);
+
+        /**
+         * @brief Check the element value with input ground-truth.
+         * 
+         * @param gt_element ground-truth value of element
+         * @param bias permissible error
+         * @param info one of true or false
+         *             - true:  shape and result
+         *             - false: do not
+         * @param failed_number maximum number of wrong element that will be printed
+         * 
+         * @return 
+         *         - true: in permissible error
+         *         - false: not 
+         */
+        bool check_element(T *gt_element, int bias = 2, bool info = true, int failed_number = 0)
+        {
+            int count = 0;
+            if (info)
+                this->print_shape();
+            int size = this->get_size();
+            for (int i = 0; i < size; i++)
+            {
+                if (DL_ABS(this->element[i] - gt_element[i]) > bias)
+                {
+                    std::vector<int> index = get_axis_index(i);
+                    std::cout << "element[";
+                    for (int j = 0; j < index.size() - 1; j++)
+                    {
+                        std::cout << index[j] << ", ";
+                    }
+                    std::cout << index.back() << "]: ";
+                    std::cout << +this->element[i] << " v.s. " << +gt_element[i] << "\n";
+                    count++;
+                    if (count > failed_number)
+                        return false;
+                }
+            }
+            if (count)
+                return false;
+
+            if (info)
+                printf("PASS\n");
+
+            return true;
+        }
+
+        /**
+         * @brief Check the shape is the same as the shape of input.
+         * 
+         * @param input an input tensor 
+         * @return 
+         *         - true: same shape 
+         *         - false: not 
+         */
+        bool is_same_shape(Tensor<T> &input)
+        {
+            if (input.shape.size() != this->shape.size())
+            {
+                return false;
+            }
+            for (int i = 0; i < this->shape.size(); i++)
+            {
+                if (input.shape[i] != this->shape[i])
+                {
+                    return false;
+                }
+            }
+            return true;
+        }
+
+        Tensor<T> &operator=(const Tensor<T> &input)
+        {
+            this->auto_free = input.auto_free;
+            this->exponent = input.exponent;
+            int size_real_tmp = this->size;
+            int size_input_real = input.size;
+            this->set_shape(input.shape);
+            if (input.element)
+            {
+                if (this->element)
+                {
+                    if (size_real_tmp != size_input_real)
+                    {
+                        tool::free_aligned_prefer(this->element);
+                        T *new_element = (T *)tool::malloc_aligned_prefer(size_input_real, sizeof(T), 16);
+                        tool::copy_memory(new_element, input.element, size_input_real * sizeof(T));
+                        this->element = new_element;
+                    }
+                    else
+                    {
+                        tool::copy_memory(this->element, input.element, size_input_real * sizeof(T));
+                    }
+                }
+                else
+                {
+                    T *new_element = (T *)tool::malloc_aligned_prefer(size_input_real, sizeof(T), 16);
+                    tool::copy_memory(new_element, input.element, size_input_real * sizeof(T));
+                    this->element = new_element;
+                }
+                return *this;
+            }
+            else
+            {
+                if (this->element)
+                {
+                    tool::free_aligned_prefer(this->element);
+                    this->element = NULL;
+                }
+                return *this;
+            }
+        }
+
+        static Tensor<T> arange(int size)
+        {
+            Tensor<T> output;
+            output.set_auto_free(true).set_exponent(0).set_shape({size}).malloc_element();
+            for (int i = 0; i < size; ++i)
+            {
+                output.element[i] = i;
+            }
+            return output;
+        }
+    };
+} // namespace dl
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_common.h b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_common.h
new file mode 100644
index 00000000000..da7b001f3d4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_common.h
@@ -0,0 +1,66 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsp_common_H_
+#define _dsp_common_H_
+#include <stdint.h>
+#include <stdbool.h>
+#include "dsp_err.h"
+#include "esp_idf_version.h"
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0)
+#include "esp_cpu.h"
+#else
+#include "soc/cpu.h"
+#endif
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief      check power of two
+ * The function check if the argument is power of 2.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @return
+ *      - true if x is power of two
+ *      - false if no
+ */
+bool dsp_is_power_of_two(int x);
+
+
+/**
+ * @brief      Power of two
+ * The function return power of 2 for values 2^N.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @return
+ *      - power of two
+ */
+int dsp_power_of_two(int x);
+
+#ifdef __cplusplus
+}
+#endif
+
+// esp_cpu_get_ccount function is implemented in IDF 4.1 and later
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0)
+#define dsp_get_cpu_cycle_count  esp_cpu_get_ccount
+#else
+#define dsp_get_cpu_cycle_count  xthal_get_ccount
+#endif
+
+#endif // _dsp_common_H_
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_err.h b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_err.h
new file mode 100644
index 00000000000..d769664c986
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_err.h
@@ -0,0 +1,23 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _DSP_ERR_H_
+#define _DSP_ERR_H_
+
+#include "stdint.h"
+#include "esp_err.h"
+#include "dsp_err_codes.h"
+
+#endif // _DSP_ERR_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_err_codes.h b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_err_codes.h
new file mode 100644
index 00000000000..c8827781a80
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_err_codes.h
@@ -0,0 +1,27 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsp_error_codes_H_
+#define _dsp_error_codes_H_
+
+#define DSP_OK                          0 // For internal use only. Please use ESP_OK instead
+#define ESP_ERR_DSP_BASE                0x70000
+#define ESP_ERR_DSP_INVALID_LENGTH      (ESP_ERR_DSP_BASE + 1)
+#define ESP_ERR_DSP_INVALID_PARAM       (ESP_ERR_DSP_BASE + 2)
+#define ESP_ERR_DSP_PARAM_OUTOFRANGE    (ESP_ERR_DSP_BASE + 3)
+#define ESP_ERR_DSP_UNINITIALIZED       (ESP_ERR_DSP_BASE + 4)
+#define ESP_ERR_DSP_REINITIALIZED       (ESP_ERR_DSP_BASE + 5)
+
+
+#endif // _dsp_error_codes_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_platform.h
new file mode 100644
index 00000000000..239b325bd52
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_platform.h
@@ -0,0 +1,30 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef dsp_platform_h_
+#define dsp_platform_h_
+#include "esp_idf_version.h"
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0)
+#include "esp_cpu.h"
+#else
+#include "soc/cpu.h"
+#endif
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/portable.h"
+#include "freertos/task.h"
+#include "freertos/semphr.h"
+
+#endif // dsp_platform_h_
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_tests.h b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_tests.h
new file mode 100644
index 00000000000..ea1fb422258
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_tests.h
@@ -0,0 +1,37 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _DSP_TESTS_H_
+#define _DSP_TESTS_H_
+
+#include <stdlib.h>
+#include "esp_idf_version.h"
+
+#define TEST_ASSERT_EXEC_IN_RANGE(min_exec, max_exec, actual) \
+    if (actual >= max_exec) { \
+        ESP_LOGE("", "Time error. Expected max: %i, reached: %i", (int)max_exec, (int)actual);\
+        TEST_ASSERT_MESSAGE (false, "Exec time takes more than expected! ");\
+    }\
+    if (actual < min_exec) {\
+        ESP_LOGE("", "Time error. Expected min: %i, reached: %i", (int)min_exec, (int)actual);\
+        TEST_ASSERT_MESSAGE (false, "Exec time takes less then expected!");\
+    }
+
+
+// memalign function is implemented in IDF 4.3 and later
+#if ESP_IDF_VERSION <= ESP_IDF_VERSION_VAL(4, 3, 0)
+#define memalign(align_, size_) malloc(size_)
+#endif
+
+#endif // _DSP_TESTS_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_types.h b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_types.h
new file mode 100644
index 00000000000..1f11ea4520b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/dsp_types.h
@@ -0,0 +1,39 @@
+#ifndef _dsp_types_H_
+#define _dsp_types_H_
+#include <stdint.h>
+#include <stdbool.h>
+
+// union to simplify access to the 16 bit data
+typedef union sc16_u
+{
+    struct
+    {
+        int16_t re;
+        int16_t im;
+    };
+    uint32_t data;
+}sc16_t;
+
+typedef union fc32_u
+{
+    struct
+    {
+        float re;
+        float im;
+    };
+    uint64_t data;
+}fc32_t;
+
+typedef struct image2d_s
+{
+    void* data; // could be int8_t, unt8_t, int16_t, unt16_t, float
+    int step_x; // step of elements by X
+    int step_y; // step of elements by Y, usually is 1
+    int stride_x; // stride width: size of the elements in X axis * by step_x + padding
+    int stride_y; // stride height: size of the elements in Y axis * by step_y + padding
+    // Point[x,y] = data[width*y*step_y + x*step_x];
+    // Full data size = width*height
+
+} image2d_t;
+
+#endif // _dsp_types_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/esp_dsp.h b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/esp_dsp.h
new file mode 100644
index 00000000000..419ed299965
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/common/include/esp_dsp.h
@@ -0,0 +1,64 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _esp_dsp_H_
+#define _esp_dsp_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+// Common includes
+#include "dsp_common.h"
+
+// Signal processing
+#include "dsps_dotprod.h"
+#include "dsps_math.h"
+#include "dsps_fir.h"
+#include "dsps_biquad.h"
+#include "dsps_biquad_gen.h"
+#include "dsps_wind.h"
+#include "dsps_conv.h"
+#include "dsps_corr.h"
+
+#include "dsps_d_gen.h"
+#include "dsps_h_gen.h"
+#include "dsps_tone_gen.h"
+#include "dsps_snr.h"
+#include "dsps_sfdr.h"
+
+#include "dsps_fft2r.h"
+#include "dsps_fft4r.h"
+#include "dsps_dct.h"
+
+// Matrix operations
+#include "dspm_mult.h"
+
+// Support functions
+#include "dsps_view.h"
+
+// Image processing functions:
+#include "dspi_dotprod.h"
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifdef __cplusplus
+#include "mat.h"
+#endif
+
+#endif // _esp_dsp_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_ccorr.h b/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_ccorr.h
new file mode 100644
index 00000000000..9d838e55642
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_ccorr.h
@@ -0,0 +1,63 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_ccorr_H_
+#define _dsps_ccorr_H_
+#include "dsp_err.h"
+
+#include "dsps_conv_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   Cross correlation
+ *
+ * The function make cross correlate between two ignals.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] Signal1: input array with input 1 signal values
+ * @param[in] siglen1: length of the input 1 signal array
+ * @param[in] Signal2: input array with input 2 signal values
+ * @param[in] siglen2: length of the input  signal array
+ * @param corrout: output array with result of cross correlation. The size of dest array must be (siglen1 + siglen2 - 1) !!!
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library (one of the input array are NULL, or if (siglen < patlen))
+ */
+esp_err_t dsps_ccorr_f32_ansi(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *corrout);
+esp_err_t dsps_ccorr_f32_ae32(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *corrout);
+/**}@*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+#if (dsps_ccorr_f32_ae32_enabled == 1)
+#define dsps_ccorr_f32 dsps_ccorr_f32_ae32
+#else
+#define dsps_ccorr_f32 dsps_ccorr_f32_ansi
+#endif // dsps_ccorr_f32_ae32_enabled
+#else
+#define dsps_ccorr_f32 dsps_ccorr_f32_ansi
+#endif
+
+#endif // _dsps_conv_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_conv.h b/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_conv.h
new file mode 100644
index 00000000000..07dbf7a2b30
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_conv.h
@@ -0,0 +1,65 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_conv_H_
+#define _dsps_conv_H_
+#include "dsp_err.h"
+
+#include "dsps_conv_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   Convolution
+ *
+ * The function convolve Signal array with Kernel array.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] Signal:  input array with signal
+ * @param[in] siglen:  length of the input signal
+ * @param[in] Kernel:  input array with convolution kernel
+ * @param[in] kernlen: length of the Kernel array
+ * @param convout: output array with convolution result length of (siglen + Kernel -1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_conv_f32_ae32(const float *Signal, const int siglen, const float *Kernel, const int kernlen, float *convout);
+esp_err_t dsps_conv_f32_ansi(const float *Signal, const int siglen, const float *Kernel, const int kernlen, float *convout);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+
+#if (dsps_conv_f32_ae32_enabled == 1)
+#define dsps_conv_f32 dsps_conv_f32_ae32
+#else
+#define dsps_conv_f32 dsps_conv_f32_ansi
+#endif // dsps_conv_f32_ae32_enabled
+
+#else
+#define dsps_conv_f32 dsps_conv_f32_ansi
+#endif
+
+#endif // _dsps_conv_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_conv_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_conv_platform.h
new file mode 100644
index 00000000000..02c9c8535b5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_conv_platform.h
@@ -0,0 +1,20 @@
+#ifndef _dsps_conv_platform_H_
+#define _dsps_conv_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_conv_f32_ae32_enabled  1
+#define dsps_ccorr_f32_ae32_enabled  1
+#define dsps_corr_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+#endif // _dsps_conv_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_corr.h b/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_corr.h
new file mode 100644
index 00000000000..06f62ca8d81
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/conv/include/dsps_corr.h
@@ -0,0 +1,63 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_corr_H_
+#define _dsps_corr_H_
+#include "dsp_err.h"
+
+#include "dsps_conv_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   Correlation with pattern
+ *
+ * The function correlate input sigla array with pattern array.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] Signal: input array with signal values
+ * @param[in] siglen: length of the signal array
+ * @param[in] Pattern: input array with pattern values
+ * @param[in] patlen: length of the pattern array. The siglen must be bigger then patlen!
+ * @param dest: output array with result of correlation
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library (one of the input array are NULL, or if (siglen < patlen))
+ */
+esp_err_t dsps_corr_f32_ansi(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *dest);
+esp_err_t dsps_corr_f32_ae32(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *dest);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+#if (dsps_corr_f32_ae32_enabled == 1)
+#define dsps_corr_f32 dsps_corr_f32_ae32
+#else
+#define dsps_corr_f32 dsps_corr_f32_ansi
+#endif // dsps_corr_f32_ae32_enabled
+#else
+#define dsps_corr_f32 dsps_corr_f32_ansi
+#endif
+
+#endif // _dsps_corr_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/dct/include/dsps_dct.h b/tools/sdk/esp32s3/include/esp-dsp/modules/dct/include/dsps_dct.h
new file mode 100644
index 00000000000..bc0f415c16d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/dct/include/dsps_dct.h
@@ -0,0 +1,95 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_dct_H_
+#define _dsps_dct_H_
+#include "dsp_err.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief      DCT of radix 2, unscaled
+ *
+ * DCT type II of radix 2, unscaled
+ * Function is FFT based
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output array with size of N*2. An elements located: Re[0],Re[1], , ... Re[N-1], any data... up to N*2
+ *               result of DCT will be stored to this array from 0...N-1.
+ *               Size of data array must be N*2!!!
+ * @param[in] N: Size of DCT transform. Size of data array must be N*2!!!
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dct_f32(float *data, int N);
+
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Inverce DCT of radix 2
+ *
+ * Inverce DCT type III of radix 2, unscaled
+ * Function is FFT based
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output array with size of N*2. An elements located: Re[0],Re[1], , ... Re[N-1], any data... up to N*2
+ *               result of DCT will be stored to this array from 0...N-1.
+ *               Size of data array must be N*2!!!
+ * @param[in] N: Size of DCT transform. Size of data array must be N*2!!!
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dct_inv_f32(float *data, int N);
+
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      DCTs
+ *
+ * Direct DCT type II and Inverce DCT type III, unscaled
+ * These functions used as a reference for general purpose. These functions are not optimyzed!
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] data: input/output array with size of N. An elements located: Re[0],Re[1], , ... Re[N-1]
+ * @param[in] N: Size of DCT transform. Size of data array must be N*2!!!
+ * @param[out] result: output result array with size of N.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dct_f32_ref(float *data, int N, float *result);
+esp_err_t dsps_dct_inverce_f32_ref(float *data, int N, float *result);
+/**@}*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_dct_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dspi_dotprod.h b/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dspi_dotprod.h
new file mode 100644
index 00000000000..2455cb3c897
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dspi_dotprod.h
@@ -0,0 +1,171 @@
+
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dspi_dotprod_H_
+#define _dspi_dotprod_H_
+
+#include "esp_log.h"
+#include "dsp_err.h"
+#include "dsp_types.h"
+#include "dspi_dotprod_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief      dot product of two images
+ * Dot product calculation for two floating point images: *out_value += image[i*...] * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_f32_ansi(image2d_t* in_image, image2d_t* filter, float *out_value, int count_x, int count_y);
+/**@}*/ 
+
+/**@{*/
+/**
+ * @brief      dot product of two images
+ * Dot product calculation for two floating point images: *out_value += image[i*...] * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @param[in] shift - result shift to right, by default must be 15 for int16_t or 7 for int8_t 
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_s16_ansi(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u16_ansi(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_s8_ansi(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u8_ansi(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift);
+
+esp_err_t dspi_dotprod_s16_aes3(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u16_aes3(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_s8_aes3(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u8_aes3(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift);
+
+
+/**@}*/ 
+
+/**@{*/
+/**
+ * @brief      dot product of two images with input offset
+ * Dot product calculation for two floating point images: *out_value += (image[i*...] + offset) * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @param[in] offset - input offset value.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_off_f32_ansi(image2d_t* in_image, image2d_t* filter, float *out_value, int count_x, int count_y, float offset);
+/**@}*/ 
+
+/**@{*/
+/**
+ * @brief      dot product of two images with input offset
+ * Dot product calculation for two floating point images: *out_value += (image[i*...] + offset) * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @param[in] shift - result shift to right, by default must be 15 for int16_t or 7 for int8_t 
+ * @param[in] offset - input offset value.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_off_s16_ansi(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift, int16_t offset);
+esp_err_t dspi_dotprod_off_u16_ansi(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift, uint16_t offset);
+esp_err_t dspi_dotprod_off_s8_ansi(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift, int8_t offset);
+esp_err_t dspi_dotprod_off_u8_ansi(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift, uint8_t offset);
+
+esp_err_t dspi_dotprod_off_s16_aes3(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift, int16_t offset);
+esp_err_t dspi_dotprod_off_u16_aes3(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift, uint16_t offset);
+esp_err_t dspi_dotprod_off_s8_aes3(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift, int8_t offset);
+esp_err_t dspi_dotprod_off_u8_aes3(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift, uint8_t offset);
+/**@}*/ 
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+#define dspi_dotprod_f32 dspi_dotprod_f32_ansi
+#define dspi_dotprod_off_f32 dspi_dotprod_off_f32_ansi
+    #if (dspi_dotprod_aes3_enabled == 1)
+    #define dspi_dotprod_s16 dspi_dotprod_s16_aes3
+    #define dspi_dotprod_u16 dspi_dotprod_u16_aes3
+    #define dspi_dotprod_s8 dspi_dotprod_s8_aes3
+    #define dspi_dotprod_u8 dspi_dotprod_u8_aes3
+    #define dspi_dotprod_off_s16 dspi_dotprod_off_s16_aes3
+    #define dspi_dotprod_off_s8 dspi_dotprod_off_s8_aes3
+    #define dspi_dotprod_off_u16 dspi_dotprod_off_u16_aes3
+    #define dspi_dotprod_off_u8 dspi_dotprod_off_u8_aes3
+    #else
+    #define dspi_dotprod_s16 dspi_dotprod_s16_ansi
+    #define dspi_dotprod_s8 dspi_dotprod_s8_ansi
+    #define dspi_dotprod_u16 dspi_dotprod_u16_ansi
+    #define dspi_dotprod_u8 dspi_dotprod_u8_ansi
+    #define dspi_dotprod_off_s16 dspi_dotprod_off_s16_ansi
+    #define dspi_dotprod_off_s8 dspi_dotprod_off_s8_ansi
+    #define dspi_dotprod_off_u16 dspi_dotprod_off_u16_ansi
+    #define dspi_dotprod_off_u8 dspi_dotprod_off_u8_ansi
+    #endif
+#endif
+#ifdef CONFIG_DSP_ANSI
+#define dspi_dotprod_f32 dspi_dotprod_f32_ansi
+#define dspi_dotprod_off_f32 dspi_dotprod_off_f32_ansi
+#define dspi_dotprod_s16 dspi_dotprod_s16_ansi
+#define dspi_dotprod_s8 dspi_dotprod_s8_ansi
+#define dspi_dotprod_off_s16 dspi_dotprod_off_s16_ansi
+#define dspi_dotprod_off_s8 dspi_dotprod_off_s8_ansi
+#define dspi_dotprod_u16 dspi_dotprod_u16_ansi
+#define dspi_dotprod_u8 dspi_dotprod_u8_ansi
+#define dspi_dotprod_off_u16 dspi_dotprod_off_u16_ansi
+#define dspi_dotprod_off_u8 dspi_dotprod_off_u8_ansi
+#endif
+
+
+#endif // _dspi_dotprod_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dspi_dotprod_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dspi_dotprod_platform.h
new file mode 100644
index 00000000000..3acd4d54b3d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dspi_dotprod_platform.h
@@ -0,0 +1,16 @@
+#ifndef _dspi_dotprod_platform_H_
+#define _dspi_dotprod_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#define dspi_dotprod_aes3_enabled 1
+#endif 
+#endif // __XTENSA__
+
+#endif // _dspi_dotprod_platform_H_
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dsps_dotprod.h b/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dsps_dotprod.h
new file mode 100644
index 00000000000..d2bd1857233
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dsps_dotprod.h
@@ -0,0 +1,120 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _DSPI_DOTPROD_H_
+#define _DSPI_DOTPROD_H_
+
+#include "esp_log.h"
+#include "dsp_err.h"
+
+#include "dsps_dotprod_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+// These functions calculates dotproduct of two vectors.
+
+/**@{*/
+/**
+ * @brief      dot product of two 16 bit vectors
+ * Dot product calculation for two signed 16 bit arrays: *dest += (src1[i] * src2[i]) >> (15-shift); i= [0..N)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] src1  source array 1
+ * @param[in] src2  source array 2
+ * @param dest  destination pointer
+ * @param[in] len   length of input arrays
+ * @param[in] shift shift of the result.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dotprod_s16_ansi(const int16_t *src1, const int16_t *src2, int16_t *dest, int len, int8_t shift);
+esp_err_t dsps_dotprod_s16_ae32(const int16_t *src1, const int16_t *src2, int16_t *dest, int len, int8_t shift);
+/**@}*/
+
+
+/**@{*/
+/**
+ * @brief      dot product of two float vectors
+ * Dot product calculation for two floating point arrays: *dest += (src1[i] * src2[i]); i= [0..N)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] src1  source array 1
+ * @param[in] src2  source array 2
+ * @param dest  destination pointer
+ * @param[in] len   length of input arrays
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dotprod_f32_ansi(const float *src1, const float *src2, float *dest, int len);
+esp_err_t dsps_dotprod_f32_ae32(const float *src1, const float *src2, float *dest, int len);
+esp_err_t dsps_dotprod_f32_aes3(const float *src1, const float *src2, float *dest, int len);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      dot product of two float vectors with step
+ * Dot product calculation for two floating point arrays: *dest += (src1[i*step1] * src2[i*step2]); i= [0..N)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] src1  source array 1
+ * @param[in] src2  source array 2
+ * @param dest  destination pointer
+ * @param[in] len   length of input arrays
+ * @param[in] step1 step over elements in first array
+ * @param[in] step2 step over elements in second array
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dotprode_f32_ansi(const float *src1, const float *src2, float *dest, int len, int step1, int step2);
+esp_err_t dsps_dotprode_f32_ae32(const float *src1, const float *src2, float *dest, int len, int step1, int step2);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+
+#if (dsps_dotprod_s16_ae32_enabled == 1)
+#define dsps_dotprod_s16 dsps_dotprod_s16_ae32
+#else
+#define dsps_dotprod_s16 dsps_dotprod_s16_ansi
+#endif // dsps_dotprod_s16_ae32_enabled
+
+#if (dsps_dotprod_f32_aes3_enabled == 1)
+#define dsps_dotprod_f32 dsps_dotprod_f32_aes3
+#define dsps_dotprode_f32 dsps_dotprode_f32_ae32
+#elif (dotprod_f32_ae32_enabled == 1)
+#define dsps_dotprod_f32 dsps_dotprod_f32_ae32
+#define dsps_dotprode_f32 dsps_dotprode_f32_ae32
+#else
+#define dsps_dotprod_f32 dsps_dotprod_f32_ansi
+#define dsps_dotprode_f32 dsps_dotprode_f32_ansi
+#endif // dsps_dotprod_f32_ae32_enabled
+
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_dotprod_s16 dsps_dotprod_s16_ansi
+#define dsps_dotprod_f32 dsps_dotprod_f32_ansi
+#define dsps_dotprode_f32 dsps_dotprode_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _DSPI_DOTPROD_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dsps_dotprod_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dsps_dotprod_platform.h
new file mode 100644
index 00000000000..f308262b345
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/dotprod/include/dsps_dotprod_platform.h
@@ -0,0 +1,32 @@
+#ifndef _dsps_dotprod_platform_H_
+#define _dsps_dotprod_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dotprod_f32_ae32_enabled  1
+#define dotprode_f32_ae32_enabled 1
+
+#endif // 
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dsps_dotprod_s16_ae32_enabled 1
+
+#endif //
+#endif // __XTENSA__
+
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#define dsps_dotprod_s16_aes3_enabled 1
+#define dsps_dotprod_f32_aes3_enabled 1
+#endif 
+
+
+#endif // _dsps_dotprod_platform_H_
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft2r.h b/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft2r.h
new file mode 100644
index 00000000000..e1302f83e46
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft2r.h
@@ -0,0 +1,245 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fft2r_H_
+#define _dsps_fft2r_H_
+
+#include "dsp_err.h"
+#include "sdkconfig.h"
+#include "dsps_fft_tables.h"
+#include "dsps_fft2r_platform.h"
+
+#ifndef CONFIG_DSP_MAX_FFT_SIZE
+#define CONFIG_DSP_MAX_FFT_SIZE 4096
+#endif // CONFIG_DSP_MAX_FFT_SIZE
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+extern float *dsps_fft_w_table_fc32;
+extern int dsps_fft_w_table_size;
+extern uint8_t dsps_fft2r_initialized;
+
+extern int16_t *dsps_fft_w_table_sc16;
+extern int dsps_fft_w_table_sc16_size;
+extern uint8_t dsps_fft2r_sc16_initialized;
+
+
+/**@{*/
+/**
+ * @brief      init fft tables
+ *
+ * Initialization of Complex FFT. This function initialize coefficients table.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] fft_table_buff: pointer to floating point buffer where sin/cos table will be stored
+ *                          if this parameter set to NULL, and table_size value is more then 0, then
+ *                          dsps_fft2r_init_fc32 will allocate buffer internally
+ * @param[in] table_size: size of the buffer in float words
+ *                      if fft_table_buff is NULL and table_size is not 0, buffer will be allocated internally.
+ *                      If table_size is 0, buffer will not be allocated.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_DSP_PARAM_OUTOFRANGE if table_size > CONFIG_DSP_MAX_FFT_SIZE
+ *      - ESP_ERR_DSP_REINITIALIZED if buffer already allocated internally by other function
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft2r_init_fc32(float *fft_table_buff, int table_size);
+esp_err_t dsps_fft2r_init_sc16(int16_t *fft_table_buff, int table_size);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      deinit fft tables
+ *
+ * Free resources of Complex FFT. This function delete coefficients table if it was allocated by dsps_fft2r_init_fc32.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ */
+void dsps_fft2r_deinit_fc32(void);
+void dsps_fft2r_deinit_sc16(void);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      complex FFT of radix 2
+ *
+ * Complex FFT of radix 2
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ * @param[in] w: pointer to the sin/cos table
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft2r_fc32_ansi_(float *data, int N, float *w);
+esp_err_t dsps_fft2r_fc32_ae32_(float *data, int N, float *w);
+esp_err_t dsps_fft2r_fc32_aes3_(float *data, int N, float *w);
+esp_err_t dsps_fft2r_sc16_ansi_(int16_t *data, int N, int16_t *w);
+esp_err_t dsps_fft2r_sc16_ae32_(int16_t *data, int N, int16_t *w);
+esp_err_t dsps_fft2r_sc16_aes3_(int16_t *data, int N, int16_t *w);
+/**@}*/
+// This is workaround because linker generates permanent error when assembler uses
+// direct access to the table pointer
+#define dsps_fft2r_fc32_ae32(data, N) dsps_fft2r_fc32_ae32_(data, N, dsps_fft_w_table_fc32)
+#define dsps_fft2r_fc32_aes3(data, N) dsps_fft2r_fc32_aes3_(data, N, dsps_fft_w_table_fc32)
+#define dsps_fft2r_sc16_ae32(data, N) dsps_fft2r_sc16_ae32_(data, N, dsps_fft_w_table_sc16)
+#define dsps_fft2r_sc16_aes3(data, N) dsps_fft2r_sc16_aes3_(data, N, dsps_fft_w_table_sc16)
+#define dsps_fft2r_fc32_ansi(data, N) dsps_fft2r_fc32_ansi_(data, N, dsps_fft_w_table_fc32)
+#define dsps_fft2r_sc16_ansi(data, N) dsps_fft2r_sc16_ansi_(data, N, dsps_fft_w_table_sc16)
+
+
+/**@{*/
+/**
+ * @brief      bit reverse operation for the complex input array
+ *
+ * Bit reverse operation for the complex input array
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: input/ complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_bit_rev_fc32_ansi(float *data, int N);
+esp_err_t dsps_bit_rev_sc16_ansi(int16_t *data, int N);
+esp_err_t dsps_bit_rev2r_fc32(float *data, int N);
+/**@}*/
+
+esp_err_t dsps_bit_rev_lookup_fc32_ansi(float *data, int reverse_size, uint16_t *reverse_tab);
+esp_err_t dsps_bit_rev_lookup_fc32_ae32(float *data, int reverse_size, uint16_t *reverse_tab);
+esp_err_t dsps_bit_rev_lookup_fc32_aes3(float *data, int reverse_size, uint16_t *reverse_tab);
+
+/**@{*/
+/**
+ * @brief      Generate coefficients table for the FFT radix 2
+ *
+ * Generate coefficients table for the FFT radix 2. This function called inside init.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] w: memory location to store coefficients.
+ *           By default coefficients will be stored to the dsps_fft_w_table_fc32.
+ *           Maximum size of the FFT must be setup in menuconfig
+ * @param[in] N: maximum size of the FFT that will be used
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_gen_w_r2_fc32(float *w, int N);
+esp_err_t dsps_gen_w_r2_sc16(int16_t *w, int N);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Convert complex array to two real arrays
+ *
+ * Convert complex array to two real arrays in case if input was two real arrays.
+ * This function have to be used if FFT used to process real data.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: Input complex array and result of FFT2R.
+ *               input has size of 2*N, because contains real and imaginary part.
+ *               result will be stored to the same array.
+ *               Input1: input[0..N-1], Input2: input[N..2*N-1]
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_cplx2reC_fc32_ansi(float *data, int N);
+esp_err_t dsps_cplx2reC_sc16(int16_t *data, int N);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Convert complex FFT result to real array
+ *
+ * Convert FFT result of complex FFT for resl input to real array.
+ * This function have to be used if FFT used to process real data.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: Input complex array and result of FFT2R.
+ *               input has size of 2*N, because contains real and imaginary part.
+ *               result will be stored to the same array.
+ *               Input1: input[0..N-1], Input2: input[N..2*N-1]
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_cplx2real_sc16_ansi(int16_t *data, int N);
+/**@}*/
+esp_err_t dsps_cplx2real256_fc32_ansi(float *data);
+
+esp_err_t dsps_gen_bitrev2r_table(int N, int step, char *name_ext);
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#define dsps_bit_rev_fc32 dsps_bit_rev_fc32_ansi
+#define dsps_cplx2reC_fc32 dsps_cplx2reC_fc32_ansi
+
+#if (dsps_fft2r_fc32_aes3_enabled == 1)
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_aes3
+#elif (dsps_fft2r_fc32_ae32_enabled == 1)
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_ae32
+#else
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_ansi
+#endif
+
+#if (dsps_fft2r_sc16_aes3_enabled == 1)
+#define dsps_fft2r_sc16 dsps_fft2r_sc16_aes3
+#elif (dsps_fft2r_sc16_ae32_enabled == 1)
+#define dsps_fft2r_sc16 dsps_fft2r_sc16_ae32
+#else
+#define dsps_fft2r_sc16 dsps_fft2r_sc16_ansi
+#endif
+
+#if (dsps_bit_rev_lookup_fc32_ae32_enabled == 1)
+#if (dsps_fft2r_fc32_aes3_enabled)
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_aes3
+#else
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ae32
+#endif // dsps_fft2r_fc32_aes3_enabled
+#else
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ansi
+#endif
+
+#else // CONFIG_DSP_OPTIMIZED
+
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_ansi
+#define dsps_bit_rev_fc32 dsps_bit_rev_fc32_ansi
+#define dsps_cplx2reC_fc32 dsps_cplx2reC_fc32_ansi
+#define dsps_bit_rev_sc16 dsps_bit_rev_sc16_ansi
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ansi
+
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_fft2r_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h
new file mode 100644
index 00000000000..04e088d87aa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h
@@ -0,0 +1,36 @@
+#ifndef _dsps_fft2r_platform_H_
+#define _dsps_fft2r_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_fft2r_fc32_ae32_enabled 1
+
+#endif // 
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dsps_fft2r_sc16_ae32_enabled 1
+
+#endif //
+
+#if (XCHAL_HAVE_LOOPS == 1)
+
+#define dsps_bit_rev_lookup_fc32_ae32_enabled 1
+
+#endif //
+#endif // __XTENSA__
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#define dsps_fft2r_fc32_aes3_enabled 1
+#define dsps_fft2r_sc16_aes3_enabled 1
+#endif
+
+
+#endif // _dsps_fft2r_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft4r.h b/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft4r.h
new file mode 100644
index 00000000000..6443dc80d18
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft4r.h
@@ -0,0 +1,177 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fft4r_H_
+#define _dsps_fft4r_H_
+#include "dsp_err.h"
+#include "sdkconfig.h"
+
+#include "dsps_fft_tables.h"
+#include "dsps_fft4r_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+extern float *dsps_fft4r_w_table_fc32;
+extern int dsps_fft4r_w_table_size;
+extern uint8_t dsps_fft4r_initialized;
+
+extern int16_t *dsps_fft4r_w_table_sc16;
+extern int dsps_fft4r_w_table_sc16_size;
+extern uint8_t dsps_fft4r_sc16_initialized;
+
+/**@{*/
+/**
+ * @brief      init fft tables
+ *
+ * Initialization of Complex FFT Radix-4. This function initialize coefficients table.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] fft_table_buff: pointer to floating point buffer where sin/cos table will be stored
+ *                          if this parameter set to NULL, and table_size value is more then 0, then
+ *                          dsps_fft4r_init_fc32 will allocate buffer internally
+ * @param[in] max_fft_size: maximum fft size. The buffer for sin/cos table that will be used for radix-4 it's
+ *                          four times maximum length of FFT.
+ *                          if fft_table_buff is NULL and table_size is not 0, buffer will be allocated internally.
+ *                          If table_size is 0, buffer will not be allocated.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_DSP_PARAM_OUTOFRANGE if table_size > CONFIG_DSP_MAX_FFT_SIZE
+ *      - ESP_ERR_DSP_REINITIALIZED if buffer already allocated internally by other function
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft4r_init_fc32(float *fft_table_buff, int max_fft_size);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      deinit fft tables
+ *
+ * Free resources of Complex FFT Radix-4. This function delete coefficients table if it was allocated by dsps_fft4r_init_fc32.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ *
+ */
+void dsps_fft4r_deinit_fc32(void);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      complex FFT of radix 4
+ *
+ * Complex FFT of radix 4
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ * @param[in] table: pointer to sin/cos table
+ * @param[in] table_size: size of the sin/cos table
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft4r_fc32_ansi_(float *data, int N, float *table, int table_size);
+esp_err_t dsps_fft4r_fc32_ae32_(float *data, int N, float *table, int table_size);
+/**@}*/
+// This is workaround because linker generates permanent error when assembler uses
+// direct access to the table pointer
+#define dsps_fft4r_fc32_ansi(data, N) dsps_fft4r_fc32_ansi_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+#define dsps_fft4r_fc32_ae32(data, N) dsps_fft4r_fc32_ae32_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+
+/**@{*/
+/**
+ * @brief      bit reverse operation for the complex input array radix-4
+ *
+ * Bit reverse operation for the complex input array
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: input/ complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_bit_rev4r_fc32(float *data, int N);
+esp_err_t dsps_bit_rev4r_fc32_ae32(float *data, int N);
+esp_err_t dsps_bit_rev4r_direct_fc32_ansi(float *data, int N);
+esp_err_t dsps_bit_rev4r_sc16_ansi(int16_t *data, int N);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Convert complex FFT result to real array
+ *
+ * Convert FFT result of complex FFT for real input to real array.
+ * This function have to be used if FFT used to process real data.
+ * This function use tabels inside and can be used only it dsps_fft4r_init_fc32(...) was
+ * called and FFT4 was initialized.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: Input complex array and result of FFT2R/FFT4R.
+ *               input has size of 2*N, because contains real and imaginary part.
+ *               result will be stored to the same array.
+ *               Input1: input[0..N-1], Input2: input[N..2*N-1]
+ * @param[in] N: Number of complex elements in input array
+ * @param[in] table: pointer to sin/cos table
+ * @param[in] table_size: size of the sin/cos table
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_cplx2real_fc32_ansi_(float *data, int N, float *table, int table_size);
+esp_err_t dsps_cplx2real_fc32_ae32_(float *data, int N, float *table, int table_size);
+/**@}*/
+#define dsps_cplx2real_fc32_ansi(data, N) dsps_cplx2real_fc32_ansi_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+#define dsps_cplx2real_fc32_ae32(data, N) dsps_cplx2real_fc32_ae32_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+
+
+esp_err_t dsps_gen_bitrev4r_table(int N, int step, char *name_ext);
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_fft4r_fc32_ae32_enabled == 1)
+#define dsps_fft4r_fc32 dsps_fft4r_fc32_ae32
+#else
+#define dsps_fft4r_fc32 dsps_fft4r_fc32_ansi
+#endif // dsps_fft4r_fc32_ae32_enabled
+
+#define dsps_fft4r_sc16 dsps_fft4r_sc16_ae32
+#define dsps_bit_rev4r_fc32 dsps_bit_rev4r_fc32_ae32
+
+#if (dsps_cplx2real_fc32_ae32_enabled == 1)
+#define dsps_cplx2real_fc32 dsps_cplx2real_fc32_ae32
+#else
+#define dsps_cplx2real_fc32 dsps_cplx2real_fc32_ansi
+#endif // dsps_cplx2real_fc32_ae32_enabled
+
+#else
+#define dsps_fft4r_fc32 dsps_fft4r_fc32_ansi
+#define dsps_fft4r_sc16 dsps_fft4r_sc16_ansi
+#define dsps_bit_rev4r_fc32 dsps_bit_rev4r_fc32
+#define dsps_cplx2real_fc32 dsps_cplx2real_fc32_ansi
+#endif
+
+#endif // _dsps_fft4r_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft4r_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft4r_platform.h
new file mode 100644
index 00000000000..a777bdccdc1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft4r_platform.h
@@ -0,0 +1,34 @@
+#ifndef _dsps_fft4r_platform_H_
+#define _dsps_fft4r_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_fft4r_fc32_ae32_enabled 1
+#define dsps_cplx2real_fc32_ae32_enabled 1
+
+#endif // 
+
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dsps_fft2r_sc16_ae32_enabled 1
+
+#endif //
+
+#if (XCHAL_HAVE_LOOPS == 1)
+
+#define dsps_bit_rev_lookup_fc32_ae32_enabled 1
+
+#endif //
+#endif // __XTENSA__
+
+
+
+#endif // _dsps_fft4r_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft_tables.h b/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft_tables.h
new file mode 100644
index 00000000000..94fbab501d0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/fft/include/dsps_fft_tables.h
@@ -0,0 +1,89 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fft_tables_H_
+#define _dsps_fft_tables_H_
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+extern const uint16_t bitrev2r_table_16_fc32[];
+extern const uint16_t bitrev2r_table_16_fc32_size;
+
+extern const uint16_t bitrev2r_table_32_fc32[];
+extern const uint16_t bitrev2r_table_32_fc32_size;
+
+extern const uint16_t bitrev2r_table_64_fc32[];
+extern const uint16_t bitrev2r_table_64_fc32_size;
+
+extern const uint16_t bitrev2r_table_128_fc32[];
+extern const uint16_t bitrev2r_table_128_fc32_size;
+
+extern const uint16_t bitrev2r_table_256_fc32[];
+extern const uint16_t bitrev2r_table_256_fc32_size;
+
+extern const uint16_t bitrev2r_table_512_fc32[];
+extern const uint16_t bitrev2r_table_512_fc32_size;
+
+extern const uint16_t bitrev2r_table_1024_fc32[];
+extern const uint16_t bitrev2r_table_1024_fc32_size;
+
+extern const uint16_t bitrev2r_table_2048_fc32[];
+extern const uint16_t bitrev2r_table_2048_fc32_size;
+
+extern const uint16_t bitrev2r_table_4096_fc32[];
+extern const uint16_t bitrev2r_table_4096_fc32_size;
+
+void dsps_fft2r_rev_tables_init_fc32(void);
+extern uint16_t *dsps_fft2r_rev_tables_fc32[];
+extern const uint16_t dsps_fft2r_rev_tables_fc32_size[];
+
+extern const uint16_t bitrev4r_table_16_fc32[];
+extern const uint16_t bitrev4r_table_16_fc32_size;
+
+extern const uint16_t bitrev4r_table_32_fc32[];
+extern const uint16_t bitrev4r_table_32_fc32_size;
+
+extern const uint16_t bitrev4r_table_64_fc32[];
+extern const uint16_t bitrev4r_table_64_fc32_size;
+
+extern const uint16_t bitrev4r_table_128_fc32[];
+extern const uint16_t bitrev4r_table_128_fc32_size;
+
+extern const uint16_t bitrev4r_table_256_fc32[];
+extern const uint16_t bitrev4r_table_256_fc32_size;
+
+extern const uint16_t bitrev4r_table_512_fc32[];
+extern const uint16_t bitrev4r_table_512_fc32_size;
+
+extern const uint16_t bitrev4r_table_1024_fc32[];
+extern const uint16_t bitrev4r_table_1024_fc32_size;
+
+extern const uint16_t bitrev4r_table_2048_fc32[];
+extern const uint16_t bitrev4r_table_2048_fc32_size;
+
+extern const uint16_t bitrev4r_table_4096_fc32[];
+extern const uint16_t bitrev4r_table_4096_fc32_size;
+
+void dsps_fft4r_rev_tables_init_fc32(void);
+extern uint16_t *dsps_fft4r_rev_tables_fc32[];
+extern const uint16_t dsps_fft4r_rev_tables_fc32_size[];
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_fft_tables_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/fir/include/dsps_fir.h b/tools/sdk/esp32s3/include/esp-dsp/modules/fir/include/dsps_fir.h
new file mode 100644
index 00000000000..b9fb44884ec
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/fir/include/dsps_fir.h
@@ -0,0 +1,147 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fir_H_
+#define _dsps_fir_H_
+
+
+#include "dsp_err.h"
+
+#include "dsps_fir_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief Data struct of f32 fir filter
+ *
+ * This structure used by filter internally. User should access this structure only in case of
+ * extensions for the DSP Library.
+ * All fields of this structure initialized by dsps_fir_init_f32(...) function.
+ */
+typedef struct fir_f32_s {
+    float  *coeffs;     /*!< Pointer to the coefficient buffer.*/
+    float  *delay;      /*!< Pointer to the delay line buffer.*/
+    int     N;          /*!< FIR filter coefficients amount.*/
+    int     pos;        /*!< Position in delay line.*/
+    int     decim;      /*!< Decimation factor.*/
+    int     d_pos;      /*!< Actual decimation counter.*/
+} fir_f32_t;
+
+/**
+ * @brief   initialize structure for 32 bit FIR filter
+ *
+ * Function initialize structure for 32 bit floating point FIR filter
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param fir: pointer to fir filter structure, that must be preallocated
+ * @param coeffs: array with FIR filter coefficients. Must be length N
+ * @param delay: array for FIR filter delay line. Must be length N
+ * @param N: FIR filter length. Length of coeffs and delay arrays.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fir_init_f32(fir_f32_t *fir, float *coeffs, float *delay, int N);
+
+/**
+ * @brief   initialize structure for 32 bit Decimation FIR filter
+ * Function initialize structure for 32 bit floating point FIR filter with decimation
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param fir: pointer to fir filter structure, that must be preallocated
+ * @param coeffs: array with FIR filter coefficients. Must be length N
+ * @param delay: array for FIR filter delay line. Must be length N
+ * @param N: FIR filter length. Length of coeffs and delay arrays.
+ * @param decim: decimation factor.
+ * @param start_pos: initial value of decimation counter. Must be [0..d)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fird_init_f32(fir_f32_t *fir, float *coeffs, float *delay, int N, int decim, int start_pos);
+
+
+/**@{*/
+/**
+ * @brief   FIR filter
+ *
+ * Function implements FIR filter
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param fir: pointer to fir filter structure, that must be initialized before
+ * @param[in] input: input array
+ * @param[out] output: array with result of FIR filter
+ * @param[in] len: length of input and result arrays
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fir_f32_ansi(fir_f32_t *fir, const float *input, float *output, int len);
+esp_err_t dsps_fir_f32_ae32(fir_f32_t *fir, const float *input, float *output, int len);
+esp_err_t dsps_fir_f32_aes3(fir_f32_t *fir, const float *input, float *output, int len);
+/**@}*/
+
+/**@{*/
+/**
+ *  @brief   Decimation FIR filter
+ *
+ * Function implements FIR filter with decimation
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param fir: pointer to fir filter structure, that must be initialized before
+ * @param input: input array
+ * @param output: array with result of FIR filter
+ * @param len: length of input and result arrays
+ *
+ * @return: function returns amount of samples stored to the output array
+ *          depends on the previous state value could be [0..len/decimation]
+ */
+int dsps_fird_f32_ansi(fir_f32_t *fir, const float *input, float *output, int len);
+int dsps_fird_f32_ae32(fir_f32_t *fir, const float *input, float *output, int len);
+/**@}*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#if CONFIG_DSP_OPTIMIZED
+
+#if (dsps_fir_f32_ae32_enabled == 1)
+#define dsps_fir_f32 dsps_fir_f32_ae32
+#else
+#define dsps_fir_f32 dsps_fir_f32_ansi
+#endif
+
+#if (dsps_fird_f32_ae32_enabled == 1)
+#define dsps_fird_f32 dsps_fird_f32_ae32
+#else
+#define dsps_fird_f32 dsps_fird_f32_ansi
+#endif
+
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_fir_f32 dsps_fir_f32_ansi
+#define dsps_fird_f32 dsps_fird_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_fir_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/fir/include/dsps_fir_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/fir/include/dsps_fir_platform.h
new file mode 100644
index 00000000000..fab2656878f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/fir/include/dsps_fir_platform.h
@@ -0,0 +1,19 @@
+#ifndef _dsps_fir_platform_H_
+#define _dsps_fir_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_fir_f32_ae32_enabled  1
+#define dsps_fird_f32_ae32_enabled  1
+
+#endif // 
+#endif // __XTENSA__
+
+#endif // _dsps_fir_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/iir/include/dsps_biquad.h b/tools/sdk/esp32s3/include/esp-dsp/modules/iir/include/dsps_biquad.h
new file mode 100644
index 00000000000..718a2cc5db0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/iir/include/dsps_biquad.h
@@ -0,0 +1,67 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_biquad_H_
+#define _dsps_biquad_H_
+
+#include "dsp_err.h"
+
+#include "dsps_biquad_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief   IIR filter
+ *
+ * IIR filter 2nd order direct form II (bi quad)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] input: input array
+ * @param output: output array
+ * @param len: length of input and output vectors
+ * @param coef: array of coefficients. b0,b1,b2,a1,a2
+ *              expected that a0 = 1. b0..b2 - numerator, a0..a2 - denominator
+ * @param w: delay line w0,w1. Length of 2.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_f32_ansi(const float *input, float *output, int len, float *coef, float *w);
+esp_err_t dsps_biquad_f32_ae32(const float *input, float *output, int len, float *coef, float *w);
+esp_err_t dsps_biquad_f32_aes3(const float *input, float *output, int len, float *coef, float *w);
+/**@}*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_biquad_f32_ae32_enabled == 1)
+#define dsps_biquad_f32 dsps_biquad_f32_ae32
+#else
+#define dsps_biquad_f32 dsps_biquad_f32_ansi
+#endif
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_biquad_f32 dsps_biquad_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+
+#endif // _dsps_biquad_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/iir/include/dsps_biquad_gen.h b/tools/sdk/esp32s3/include/esp-dsp/modules/iir/include/dsps_biquad_gen.h
new file mode 100644
index 00000000000..750dc4dff99
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/iir/include/dsps_biquad_gen.h
@@ -0,0 +1,200 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_biquad_gen_H_
+#define _dsps_biquad_gen_H_
+
+#include "dsp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+// Common rules for all generated coefficients.
+// The coefficients placed to the array as follows:
+// coeffs[0] = b0;
+// coeffs[1] = b1;
+// coeffs[2] = b2;
+// coeffs[3] = a1;
+// coeffs[4] = a2;
+// a0 - are not placed and expected always as == 1
+
+/**
+ * @brief   LPF IIR filter coefficients
+ * Coefficients for low pass 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter cut off frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_lpf_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   HPF IIR filter coefficients
+ *
+ * Coefficients for high pass 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter cut off frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_hpf_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   BPF IIR filter coefficients
+ *
+ * Coefficients for band pass 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter center frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_bpf_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   0 dB BPF IIR filter coefficients
+ *
+ * Coefficients for band pass 2nd order IIR filter (bi-quad) with 0 dB gain in passband
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter center frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_bpf0db_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   Notch IIR filter coefficients
+ *
+ * Coefficients for notch 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param gain: gain in stopband in dB
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_notch_f32(float *coeffs, float f, float gain, float qFactor);
+
+/**
+ * @brief   Allpass 360 degree IIR filter coefficients
+ *
+ * Coefficients for all pass 2nd order IIR filter (bi-quad) with 360 degree phase shift
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_allpass360_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   Allpass 180 degree IIR filter coefficients
+ *
+ * Coefficients for all pass 2nd order IIR filter (bi-quad) with 180 degree phase shift
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_allpass180_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   peak IIR filter coefficients
+ *
+ * Coefficients for peak 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_peakingEQ_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   low shelf IIR filter coefficients
+ *
+ * Coefficients for low pass Shelf 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param gain: gain in stopband in dB
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_lowShelf_f32(float *coeffs, float f, float gain, float qFactor);
+
+/**
+ * @brief   high shelf IIR filter coefficients
+ *
+ * Coefficients for high pass Shelf 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param gain: gain in stopband in dB
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_highShelf_f32(float *coeffs, float f, float gain, float qFactor);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_biquad_gen_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/iir/include/dsps_biquad_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/iir/include/dsps_biquad_platform.h
new file mode 100644
index 00000000000..e39e851a11f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/iir/include/dsps_biquad_platform.h
@@ -0,0 +1,18 @@
+#ifndef _dsps_biquad_platform_H_
+#define _dsps_biquad_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_biquad_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+
+#endif // _dsps_biquad_platform_H_
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/kalman/ekf/include/ekf.h b/tools/sdk/esp32s3/include/esp-dsp/modules/kalman/ekf/include/ekf.h
new file mode 100644
index 00000000000..4941ae851c3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/kalman/ekf/include/ekf.h
@@ -0,0 +1,208 @@
+// Copyright 2020-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _ekf_h_
+#define _ekf_h_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <math.h>
+#include <stdint.h>
+#include <mat.h>
+
+class ekf {
+public:
+    // x - amount of states in EKF. x[n] = F*x[n-1] + G*u + W. Size of matrix F
+    // w - amount of control measurements and noise inputs. Size of matrix G
+
+    ekf(int x, int w);
+
+    virtual ~ekf();
+    virtual void Process(float *u, float dt);
+
+    virtual void Init() = 0;
+    // x[n] = F*x[n-1] + G*u + W
+    int NUMX; // number of states, X is the state vector (size of F matrix)
+    int NUMW; // size of G matrix
+
+    // System state vector
+    dspm::Mat &X;
+
+    // linearized system matrices
+    dspm::Mat &F;
+    dspm::Mat &G;
+
+    // covariance matrix and state vector
+    dspm::Mat &P;
+
+    // input noise and measurement noise variances
+    dspm::Mat &Q;
+
+    /**
+     * Runge-Kutta state update method.
+	 * The method calculates derivatives of input vector x and control measurements u
+     * Re
+     * @param[in] x: state vector
+     * @param[in] u: control measurement
+     * @param[in] dt: time interval from last update in seconds
+     */
+    void RungeKutta(dspm::Mat &x, float *u, float dt);
+
+    // System Dependent methods:
+
+    /**
+     * Derivative of state vector X
+     * Re
+     * @param[in] x: state vector
+     * @param[in] u: control measurement
+     * @return
+     *      - derivative of input vector x and u
+     */
+    virtual dspm::Mat StateXdot(dspm::Mat &x, float *u) = 0;
+    /**
+     * Calculation of system state matrices F and G
+     * @param[in] x: state vector
+     * @param[in] u: control measurement
+     */
+    virtual void LinearizeFG(dspm::Mat &x, float *u) = 0;
+    //
+
+    // System independent methods
+
+    /**
+     * Calculates covariance prediction matrux P.
+	 * Update matrix P
+     * @param[in] dt: time interval from last update
+     */
+    virtual void CovariancePrediction(float dt);
+
+    /**
+     * Update of current state by measured values.
+     * Optimized method for non correlated values
+	 * Calculate Kalman gain and update matrix P and vector X. 
+     * @param[in] H: derivative matrix
+     * @param[in] measured: array of measured values
+     * @param[in] expected: array of expected values
+     * @param[in] R: measurement noise covariance values
+     */
+    virtual void Update(dspm::Mat &H, float *measured, float *expected, float *R);
+    /**
+     * Update of current state by measured values.
+     * This method just as a reference for research purpose.
+     * Not used in real calculations.
+     * @param[in] H: derivative matrix
+     * @param[in] measured: array of measured values
+     * @param[in] expected: array of expected values
+     * @param[in] R: measurement noise covariance values
+     */
+    virtual void UpdateRef(dspm::Mat &H, float *measured, float *expected, float *R);
+
+
+    float *HP;
+    float *Km;
+
+public:
+    // Additional universal helper methods
+    /**
+     * Convert quaternion to rotation matrix.
+     * @param[in] q: quaternion
+     *
+     * @return
+     *      - rotation matrix 3x3
+     */
+    static dspm::Mat quat2rotm(float q[4]);
+
+    /**
+     * Convert rotation matrix to quaternion.
+     * @param[in] R: rotation matrix
+     *
+     * @return
+     *      - quaternion 4x1
+     */
+    static dspm::Mat rotm2quat(dspm::Mat &R);
+
+    /**
+     * Convert quaternion to Euler angels.
+     * @param[in] R: quaternion
+     *
+     * @return
+     *      - Euler angels 3x1
+     */
+    static dspm::Mat quat2eul(const float q[4]);
+    /**
+     * Convert Euler angels to rotation matrix.
+     * @param[in] xyz: Euler angels
+     *
+     * @return
+     *      - rotation matrix 3x3
+     */
+    static dspm::Mat eul2rotm(float xyz[3]);
+
+    /**
+     * Convert rotation matrix to Euler angels.
+     * @param[in] rotm: rotation matrix
+     *
+     * @return
+     *      - Euler angels 3x1
+     */
+    static dspm::Mat rotm2eul(dspm::Mat &rotm);
+
+    /**
+     * Df/dq:  Derivative of vector by quaternion.
+     * @param[in] vector: input vector
+     * @param[in] quat: quaternion
+     *
+     * @return
+     *      - Derivative matrix 3x4
+     */
+    static dspm::Mat dFdq(dspm::Mat &vector, dspm::Mat &quat);
+
+    /**
+     * Df/dq: Derivative of vector by inverted quaternion.
+     * @param[in] vector: input vector
+     * @param[in] quat: quaternion
+     *
+     * @return
+     *      - Derivative matrix 3x4
+     */
+    static dspm::Mat dFdq_inv(dspm::Mat &vector, dspm::Mat &quat);
+
+    /**
+     * Make skew-symmetric matrix of vector.
+     * @param[in] w: source vector
+     *
+     * @return
+     *      - skew-symmetric matrix 4x4
+     */
+    static dspm::Mat SkewSym4x4(float *w);
+
+    // q product
+    // Rl = [q(1) - q(2) - q(3) - q(4); ...
+    //      q(2)  q(1) - q(4)  q(3); ...
+    //      q(3)  q(4)  q(1) - q(2); ...
+    //      q(4) - q(3)  q(2)  q(1); ...
+
+    /**
+     * Make right quaternion-product matrices.
+     * @param[in] q: source quaternion
+     *
+     * @return
+     *      - right quaternion-product matrix 4x4
+     */
+    static dspm::Mat qProduct(float *q);
+
+};
+
+#endif // _ekf_h_
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/kalman/ekf_imu13states/include/ekf_imu13states.h b/tools/sdk/esp32s3/include/esp-dsp/modules/kalman/ekf_imu13states/include/ekf_imu13states.h
new file mode 100644
index 00000000000..e9525e898eb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/kalman/ekf_imu13states/include/ekf_imu13states.h
@@ -0,0 +1,83 @@
+// Copyright 2020-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ekf_imu13states_H_
+#define _ekf_imu13states_H_
+
+#include "ekf.h"
+
+/**
+* @brief This class is used to process and calculate attitude from imu sensors.
+*
+*   The class use state vector with 13 follows values
+*   X[0..3] - attitude quaternion
+*   X[4..6] - gyroscope bias error, rad/sec
+*   X[7..9] - magnetometer vector value - magn_ampl
+*   X[10..12] - magnetometer offset value - magn_offset
+*
+*   where, reference magnetometer value = magn_ampl*rotation_matrix' + magn_offset
+*/
+class ekf_imu13states: public ekf {
+public:
+    ekf_imu13states();
+    virtual ~ekf_imu13states();
+    virtual void Init();
+
+    // Method calculates Xdot values depends on U
+    // U - gyroscope values in radian per seconds (rad/sec)
+    virtual dspm::Mat StateXdot(dspm::Mat &x, float *u);
+    virtual void LinearizeFG(dspm::Mat &x, float *u);
+
+    // Methods for tests only.
+    void Test();
+    void TestFull(bool enable_att);
+
+    // Initial reference valies magnetometer and accelerometer
+    dspm::Mat mag0;
+    dspm::Mat accel0;
+
+    int NUMU; // number of control measurements
+
+    /**
+     * Update part of system state by reference measurements accelerometer and magnetometer.
+     * Only attitude and gyro bias will be updated.
+     * This method should be used as main method after calibration.
+     * 
+     * @param[in] accel_data: accelerometer measurement vector XYZ in g, where 1 g ~ 9.81 m/s^2
+     * @param[in] magn_data: magnetometer measurement vector XYZ
+     * @param[in] R: measurement noise covariance values for diagonal covariance matrix. Then smaller value, then more you trust them.
+     */
+    void UpdateRefMeasurement(float *accel_data, float *magn_data, float R[6]);
+    /**
+     * Update full system state by reference measurements accelerometer and magnetometer.
+     * This method should be used at calibration phase.
+     * 
+     * @param[in] accel_data: accelerometer measurement vector XYZ in g, where 1 g ~ 9.81 m/s^2
+     * @param[in] magn_data: magnetometer measurement vector XYZ
+     * @param[in] R: measurement noise covariance values for diagonal covariance matrix. Then smaller value, then more you trust them.
+     */
+    void UpdateRefMeasurementMagn(float *accel_data, float *magn_data, float R[6]);
+    /**
+     * Update system state by reference measurements accelerometer, magnetometer and attitude quaternion.
+     * This method could be used when system on constant state or in initialization phase.
+     * @param[in] accel_data: accelerometer measurement vector XYZ in g, where 1 g ~ 9.81 m/s^2
+     * @param[in] magn_data: magnetometer measurement vector XYZ
+     * @param[in] attitude: attitude quaternion
+     * @param[in] R: measurement noise covariance values for diagonal covariance matrix. Then smaller value, then more you trust them.
+     */
+    void UpdateRefMeasurement(float *accel_data, float *magn_data, float *attitude, float R[10]);
+
+};
+
+#endif // _ekf_imu13states_H_
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/add/include/dsps_add.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/add/include/dsps_add.h
new file mode 100644
index 00000000000..32a15eb2f09
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/add/include/dsps_add.h
@@ -0,0 +1,78 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_add_H_
+#define _dsps_add_H_
+#include "dsp_err.h"
+
+#include "dsps_add_platform.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   add two arrays
+ *
+ * The function add one input array to another
+ * out[i*step_out] = input1[i*step1] + input2[i*step2]; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input1: input array 1
+ * @param[in] input2: input array 2
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param step1: step over input array 1 (by default should be 1)
+ * @param step2: step over input array 2 (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_add_f32_ansi(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+esp_err_t dsps_add_f32_ae32(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+
+esp_err_t dsps_add_s16_ansi(const int16_t *input1, const int16_t *input2, int16_t *output, int len, int step1, int step2, int step_out, int shift);
+esp_err_t dsps_add_s16_ae32(const int16_t *input1, const int16_t *input2, int16_t *output, int len, int step1, int step2, int step_out, int shift);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+
+#if (dsps_add_f32_ae32_enabled == 1)
+#define dsps_add_f32 dsps_add_f32_ae32
+#else
+#define dsps_add_f32 dsps_add_f32_ansi
+#endif
+
+#if (dsps_add_s16_ae32_enabled == 1)
+#define dsps_add_s16 dsps_add_s16_ae32
+#else
+#define dsps_add_s16 dsps_add_s16_ansi
+#endif
+
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_add_f32 dsps_add_f32_ansi
+#define dsps_add_s16 dsps_add_s16_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_add_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/add/include/dsps_add_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/add/include/dsps_add_platform.h
new file mode 100644
index 00000000000..2b7b835b0c7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/add/include/dsps_add_platform.h
@@ -0,0 +1,23 @@
+#ifndef _dsps_add_platform_H_
+#define _dsps_add_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_add_f32_ae32_enabled  1
+
+#endif
+
+#if (XCHAL_HAVE_LOOPS == 1)
+#define dsps_add_s16_ae32_enabled  1
+#endif
+#endif // __XTENSA__
+
+
+#endif // _dsps_add_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/addc/include/dsps_addc.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/addc/include/dsps_addc.h
new file mode 100644
index 00000000000..595320d52ab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/addc/include/dsps_addc.h
@@ -0,0 +1,65 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_addc_H_
+#define _dsps_addc_H_
+#include "dsp_err.h"
+
+#include "dsps_addc_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   add constant
+ *
+ * The function adds constant to the input array
+ * x[i*step_out] = y[i*step_in] + C; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input: input array
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param C: constant value
+ * @param step_in: step over input array (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_addc_f32_ansi(const float *input, float *output, int len, float C, int step_in, int step_out);
+esp_err_t dsps_addc_f32_ae32(const float *input, float *output, int len, float C, int step_in, int step_out);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_addc_f32_ae32_enabled == 1)
+#define dsps_addc_f32 dsps_addc_f32_ae32
+#else
+#define dsps_addc_f32 dsps_addc_f32_ansi
+#endif
+#else
+#define dsps_addc_f32 dsps_addc_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_addc_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/addc/include/dsps_addc_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/addc/include/dsps_addc_platform.h
new file mode 100644
index 00000000000..70cad5f9629
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/addc/include/dsps_addc_platform.h
@@ -0,0 +1,19 @@
+#ifndef _dsps_addc_platform_H_
+#define _dsps_addc_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_addc_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+
+#endif // _dsps_addc_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/include/dsps_math.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/include/dsps_math.h
new file mode 100644
index 00000000000..878f34d661a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/include/dsps_math.h
@@ -0,0 +1,25 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_math_H_
+#define _dsps_math_H_
+
+#include "dsps_add.h"
+#include "dsps_sub.h"
+#include "dsps_mul.h"
+#include "dsps_addc.h"
+#include "dsps_mulc.h"
+#include "dsps_sqrt.h"
+
+#endif // _dsps_math_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/mul/include/dsps_mul.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/mul/include/dsps_mul.h
new file mode 100644
index 00000000000..303da36bd24
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/mul/include/dsps_mul.h
@@ -0,0 +1,92 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_mul_H_
+#define _dsps_mul_H_
+#include "dsp_err.h"
+
+#include "dsps_mul_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   Multiply two arrays
+ *
+ * The function multiply one input array to another and store result to other array
+ * out[i*step_out] = input1[i*step1] * input2[i*step2]; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input1: input array 1
+ * @param[in] input2: input array 2
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param step1: step over input array 1 (by default should be 1)
+ * @param step2: step over input array 2 (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_mul_f32_ansi(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+esp_err_t dsps_mul_f32_ae32(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+/**@}*/
+
+
+/**@{*/
+/**
+ * @brief   Multiply two arrays
+ *
+ * The function multiply one input array to another and store result to other array
+ * out[i*step_out] = input1[i*step1] * input2[i*step2]; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input1: input array 1
+ * @param[in] input2: input array 2
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param step1: step over input array 1 (by default should be 1)
+ * @param step2: step over input array 2 (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ * @param shift: output shift after multiplication (by default should be 15)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_mul_s16_ansi(const int16_t *input1, const int16_t *input2, int16_t *output, int len, int step1, int step2, int step_out, int shift);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_mul_f32_ae32_enabled == 1)
+#define dsps_mul_f32 dsps_mul_f32_ae32
+#else
+#define dsps_mul_f32 dsps_mul_f32_ansi
+#endif //
+#define dsps_mul_s16 dsps_mul_s16_ansi
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_mul_f32 dsps_mul_f32_ansi
+#define dsps_mul_s16 dsps_mul_s16_ansi
+#endif
+#endif // _dsps_mul_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/mul/include/dsps_mul_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/mul/include/dsps_mul_platform.h
new file mode 100644
index 00000000000..3eb8824076a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/mul/include/dsps_mul_platform.h
@@ -0,0 +1,18 @@
+#ifndef _dsps_mul_platform_H_
+#define _dsps_mul_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_mul_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+#endif // _dsps_mul_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/mulc/include/dsps_mulc.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/mulc/include/dsps_mulc.h
new file mode 100644
index 00000000000..6b8ff167259
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/mulc/include/dsps_mulc.h
@@ -0,0 +1,75 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_mulc_H_
+#define _dsps_mulc_H_
+#include "dsp_err.h"
+
+#include "dsps_mulc_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief   multiply constant
+ *
+ * The function multiplies input array to the constant value
+ * x[i*step_out] = y[i*step_in]*C; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input: input array
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param C: constant value
+ * @param step_in: step over input array (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_mulc_f32_ansi(const float *input, float *output, int len, float C, int step_in, int step_out);
+esp_err_t dsps_mulc_f32_ae32(const float *input, float *output, int len, float C, int step_in, int step_out);
+
+esp_err_t dsps_mulc_s16_ae32(const int16_t *input, int16_t *output, int len, int16_t C, int step_in, int step_out);
+esp_err_t dsps_mulc_s16_ansi(const int16_t *input, int16_t *output, int len, int16_t C, int step_in, int step_out);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_mulc_f32_ae32_enabled == 1)
+#define dsps_mulc_f32 dsps_mulc_f32_ae32
+#else //
+#define dsps_mulc_f32 dsps_mulc_f32_ansi
+#endif
+#if (dsps_mulc_s16_ae32_enabled == 1)
+#define dsps_mulc_s16 dsps_mulc_s16_ae32
+#else
+#define dsps_mulc_s16 dsps_mulc_s16_ansi
+#endif // dsps_mulc_s16_ae32_enabled
+
+#else
+#define dsps_mulc_f32 dsps_mulc_f32_ansi
+#define dsps_mulc_s16 dsps_mulc_s16_ansi
+#endif
+
+
+#endif // _dsps_mulc_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/mulc/include/dsps_mulc_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/mulc/include/dsps_mulc_platform.h
new file mode 100644
index 00000000000..9a7ca118bcf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/mulc/include/dsps_mulc_platform.h
@@ -0,0 +1,25 @@
+#ifndef _dsps_mulc_platform_H_
+#define _dsps_mulc_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_mulc_f32_ae32_enabled  1
+
+#endif
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dsps_mulc_s16_ae32_enabled 1
+
+#endif //
+#endif // __XTENSA__
+
+
+#endif // _dsps_mulc_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/sqrt/include/dsps_sqrt.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/sqrt/include/dsps_sqrt.h
new file mode 100644
index 00000000000..31edc643ef4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/sqrt/include/dsps_sqrt.h
@@ -0,0 +1,91 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_sqrt_H_
+#define _dsps_sqrt_H_
+#include "dsp_err.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief   square root approximation
+ *
+ * The function takes square root approximation
+ * x[i] ~ sqrt(y[i]); i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input: input array
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_sqrt_f32_ansi(const float *input, float *output, int len);
+//esp_err_t dsps_sqrt_s32_ansi(const int32_t *input, int16_t *output, int len);
+
+/**@{*/
+/**
+ * @brief   square root approximation
+ *
+ * The function takes square root approximation
+ * x ~ sqrt(y);
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] data: input value
+ *
+ * @return
+ *      - square root value
+ */
+float dsps_sqrtf_f32_ansi(const float data);
+
+
+/**@{*/
+/**
+ * @brief   inverted square root approximation
+ *
+ * The function takes inverted square root approximation
+ * x ~ 1/sqrt(y);
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] data: input value
+ *
+ * @return
+ *      - inverted square root value
+ */
+float dsps_inverted_sqrtf_f32_ansi(float data );
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+#define dsps_sqrt_f32 dsps_sqrt_f32_ansi
+#define dsps_sqrtf_f32 dsps_sqrtf_f32_ansi
+#define dsps_inverted_sqrtf_f32 dsps_inverted_sqrtf_f32_ansi
+#else
+#define dsps_sqrt_f32 dsps_sqrt_f32_ansi
+#define dsps_sqrtf_f32 dsps_sqrtf_f32_ansi
+#define dsps_inverted_sqrtf_f32 dsps_inverted_sqrtf_f32_ansi
+#endif
+
+#endif // _dsps_sqrt_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/sub/include/dsps_sub.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/sub/include/dsps_sub.h
new file mode 100644
index 00000000000..2dc1adf3395
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/sub/include/dsps_sub.h
@@ -0,0 +1,67 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_sub_H_
+#define _dsps_sub_H_
+#include "dsp_err.h"
+
+#include "dsps_sub_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   sub arrays
+ *
+ * The function subtract one array from another
+ * out[i*step_out] = input1[i*step1] - input2[i*step2]; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input1: input array 1
+ * @param[in] input2: input array 2
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param step1: step over input array 1 (by default should be 1)
+ * @param step2: step over input array 2 (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_sub_f32_ansi(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+esp_err_t dsps_sub_f32_ae32(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+
+#if (dsps_sub_f32_ae32_enabled == 1)
+#define dsps_sub_f32 dsps_sub_f32_ae32
+#else
+#define dsps_sub_f32 dsps_sub_f32_ansi
+#endif
+#else
+#define dsps_sub_f32 dsps_sub_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+
+#endif // _dsps_sub_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/math/sub/include/dsps_sub_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/math/sub/include/dsps_sub_platform.h
new file mode 100644
index 00000000000..6c67f307414
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/math/sub/include/dsps_sub_platform.h
@@ -0,0 +1,18 @@
+#ifndef _dsps_sub_platform_H_
+#define _dsps_sub_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_sub_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+#endif // _dsps_sub_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/matrix/include/dspm_mult.h b/tools/sdk/esp32s3/include/esp-dsp/modules/matrix/include/dspm_mult.h
new file mode 100644
index 00000000000..fd1198da55e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/matrix/include/dspm_mult.h
@@ -0,0 +1,192 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dspm_mult_H_
+#define _dspm_mult_H_
+
+#include "dsp_err.h"
+#include "dspm_mult_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief   Matrix multiplication
+ *
+ * Matrix multiplication for two floating point matrices: C[m][k] = A[m][n] * B[n][k]
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[m][n]
+ * @param[in] B  input matrix B[n][k]
+ * @param C  result matrix C[m][k]
+ * @param[in] m  matrix dimension
+ * @param[in] n  matrix dimension
+ * @param[in] k  matrix dimension
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspm_mult_f32_ansi(const float *A, const float *B, float *C, int m, int n, int k);
+esp_err_t dspm_mult_f32_ae32(const float *A, const float *B, float *C, int m, int n, int k);
+esp_err_t dspm_mult_f32_aes3(const float *A, const float *B, float *C, int m, int n, int k);
+/**@}*/
+
+
+/**
+ * @brief   Matrix multiplication A[3x3]xB[3x1]
+ *
+ * Matrix multiplication for two floating point matrices 3x3 and 3x1: C[1][3] = A[3][3] * B[3][1]
+ * The implementation is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[3][3]
+ * @param[in] B  input matrix/vector B[3][1]
+ * @param C  result matrix/vector C[3][3]
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspm_mult_3x3x1_f32_ae32(const float *A, const float *B, float *C);
+
+/**
+ * @brief   Matrix multiplication A[3x3]xB[3x3]
+ *
+ * Matrix multiplication for two square 3x3 floating point matrices: C[3][3] = A[3][3] * B[3][3]
+ * The implementation is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[3][3]
+ * @param[in] B  input matrix B[3][3]
+ * @param C  result matrix C[3][3]
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspm_mult_3x3x3_f32_ae32(const float *A, const float *B, float *C);
+
+/**
+ * @brief   Matrix multiplication A[4x4]xB[4x1]
+ *
+ * Matrix multiplication for two floating point matrices 4x4 and 4x1: C[1][4] = A[4][4] * B[4][1]
+ * The implementation is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[4][4]
+ * @param[in] B  input matrix/vector B[4][1]
+ * @param C  result matrix/vector C[4][4]
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+
+esp_err_t dspm_mult_4x4x1_f32_ae32(const float *A, const float *B, float *C);
+
+/**
+ * @brief   Matrix multiplication A[4x4]xB[4x4]
+ *
+ * Matrix multiplication for two square 3x3 floating point matrices: C[4][4] = A[4][4] * B[4][4]
+ * The implementation is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[4][4]
+ * @param[in] B  input matrix B[4][4]
+ * @param C  result matrix C[4][4]
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspm_mult_4x4x4_f32_ae32(const float *A, const float *B, float *C);
+
+/**@{*/
+/**
+ * @brief   Matrix multiplication 16 bit signeg int
+ *
+ * Matrix multiplication for two signed 16 bit fixed point matrices: C[m][k] = (A[m][n] * B[n][k]) >> (15- shift)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] A  input matrix A[m][n]
+ * @param[in] B  input matrix B[n][k]
+ * @param C  result matrix C[m][k]
+ * @param[in] m  matrix dimension
+ * @param[in] n  matrix dimension
+ * @param[in] k  matrix dimension
+ * @param[in] shift every result will be shifted and stored as 16 bit signed value.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspm_mult_s16_ansi(const int16_t *A, const int16_t *B, int16_t *C, int m, int n, int k, int shift);
+esp_err_t dspm_mult_s16_ae32(const int16_t *A, const int16_t *B, int16_t *C, int m, int n, int k, int shift);
+esp_err_t dspm_mult_s16_aes3(const int16_t *A, const int16_t *B, int16_t *C, int m, int n, int k, int shift);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+
+
+    #if (dspm_mult_s16_aes3_enabled == 1)
+        #define dspm_mult_s16 dspm_mult_s16_aes3
+    #elif (dspm_mult_s16_ae32_enabled == 1)
+        #define dspm_mult_s16 dspm_mult_s16_ae32
+    #else
+        #define dspm_mult_s16 dspm_mult_s16_ansi
+    #endif
+
+    #if (dspm_mult_f32_aes3_enabled == 1)
+        #define dspm_mult_f32 dspm_mult_f32_aes3
+    #elif (dspm_mult_f32_ae32_enabled == 1)
+        #define dspm_mult_f32 dspm_mult_f32_ae32
+    #else
+        #define dspm_mult_f32 dspm_mult_f32_ansi
+    #endif
+
+    #if (dspm_mult_3x3x1_f32_ae32_enabled == 1)
+        #define dspm_mult_3x3x1_f32 dspm_mult_3x3x1_f32_ae32
+    #else
+        #define dspm_mult_3x3x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 3, 3, 1)
+    #endif
+    #if (dspm_mult_3x3x3_f32_ae32_enabled == 1)
+        #define dspm_mult_3x3x3_f32(A,B,C) dspm_mult_3x3x3_f32_ae32(A,B,C)
+    #else
+        #define dspm_mult_3x3x3_f32(A,B,C) dspm_mult_f32_ansi(A,B,B,3,3,3);
+    #endif
+    #if (dspm_mult_4x4x1_f32_ae32_enabled == 1)
+    #define dspm_mult_4x4x1_f32(A,B,C) dspm_mult_4x4x1_f32_ae32(A,B,C)
+    #else
+    #define dspm_mult_4x4x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 1)
+    #endif
+
+    #if (dspm_mult_f32_aes3_enabled == 1)
+    #define dspm_mult_4x4x4_f32(A,B,C) dspm_mult_f32_aes3(A,B,C, 4, 4, 4)
+    #elif (dspm_mult_4x4x4_f32_ae32_enabled == 1)
+    #define dspm_mult_4x4x4_f32 dspm_mult_4x4x4_f32_ae32
+    #else
+    #define dspm_mult_4x4x4_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 4)
+    #endif
+
+#else
+    #define dspm_mult_s16 dspm_mult_s16_ansi
+    #define dspm_mult_f32 dspm_mult_f32_ansi
+    #define dspm_mult_3x3x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 3, 3, 1)
+    #define dsps_sub_f32 dsps_sub_f32_ansi
+    #define dsps_add_f32 dsps_add_f32_ansi
+    #define dspm_mult_4x4x4_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 4)
+#endif // CONFIG_DSP_OPTIMIZED
+
+
+#endif // _dspm_mult_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/matrix/include/dspm_mult_platform.h b/tools/sdk/esp32s3/include/esp-dsp/modules/matrix/include/dspm_mult_platform.h
new file mode 100644
index 00000000000..ccc037c5cef
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/matrix/include/dspm_mult_platform.h
@@ -0,0 +1,33 @@
+#ifndef _dspm_mult_platform_H_
+#define _dspm_mult_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dspm_mult_f32_ae32_enabled 1
+#define dspm_mult_3x3x1_f32_ae32_enabled 1
+#define dspm_mult_3x3x3_f32_ae32_enabled 1
+#define dspm_mult_4x4x1_f32_ae32_enabled 1
+#define dspm_mult_4x4x4_f32_ae32_enabled 1
+
+#endif
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dspm_mult_s16_ae32_enabled 1
+
+#endif
+#endif // __XTENSA__
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#define dspm_mult_f32_aes3_enabled 1
+#define dspm_mult_s16_aes3_enabled 1
+#endif 
+
+#endif // _dspm_mult_platform_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/matrix/include/mat.h b/tools/sdk/esp32s3/include/esp-dsp/modules/matrix/include/mat.h
new file mode 100644
index 00000000000..0d1530b427a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/matrix/include/mat.h
@@ -0,0 +1,533 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dspm_mat_h_
+#define _dspm_mat_h_
+#include <iostream>
+
+/**
+ * @brief   DSP matrix namespace
+ *
+ * DSP library matrix namespace.
+ */
+namespace dspm {
+/**
+ * @brief   Matrix
+ *
+ * The Mat class provides basic matrix operations on single-precision floating point values.
+ */
+class Mat {
+public:
+    /**
+     * Constructor allocate internal buffer.
+     * @param[in] rows: amount of matrix rows
+     * @param[in] cols: amount of matrix columns
+     */
+    Mat(int rows, int cols);
+    /**
+    * Constructor use external buffer.
+     * @param[in] data: external buffer with row-major matrix data
+     * @param[in] rows: amount of matrix rows
+     * @param[in] cols: amount of matrix columns
+    */
+    Mat(float *data, int rows, int cols);
+    /**
+     * Allocate matrix with undefined size.
+     */
+    Mat();
+    virtual ~Mat();
+    /**
+     * Make copy of matrix.
+     * @param[in] src: source matrix
+     */
+    Mat(const Mat &src);
+
+    /**
+     * Make copy of matrix.
+     * @param[in] src: source matrix
+     * @param[in] row_pos: start row position of destination matrix
+     * @param[in] col_pos: start col position of destination matrix
+     */
+    void Copy(const Mat &src, int row_pos, int col_pos);
+
+    /**
+     * Make copy of matrix.
+     * @param[in] row_start: start row position of source matrix to copy
+     * @param[in] row_size: size of wor elements of source matrix to copy
+     * @param[in] col_start: start col position of source matrix to copy
+     * @param[in] col_size: size of wor elements of source matrix to copy
+     * 
+     * @return
+     *      - result matrix size row_size x col_size 
+     */
+    Mat Get(int row_start, int row_size, int col_start, int col_size);
+
+    /**
+     * Copy operator
+     *
+     * @param[in] src: source matrix
+     *
+     * @return
+     *      - matrix copy
+     */
+    Mat &operator=(const Mat &src);
+
+    bool ext_buff; /*!< Flag indicates that matrix use external buffer*/
+
+    /**
+     * Access to the matrix elements.
+     * @param[in] row: row position
+     * @param[in] col: column position
+     *
+     * @return
+     *      - element of matrix M[row][col]
+     */
+    inline float &operator()(int row, int col)
+    {
+        return data[row * this->cols + col];
+    }
+    /**
+     * Access to the matrix elements.
+     * @param[in] row: row position
+     * @param[in] col: column position
+     *
+     * @return
+     *      - element of matrix M[row][col]
+     */
+    inline const float &operator()(int row, int col) const
+    {
+        return data[row * this->cols + col];
+    }
+
+    /**
+     * += operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] A: source matrix
+     *
+     * @return
+     *      - result matrix: result += A
+     */
+    Mat &operator+=(const Mat &A);
+
+    /**
+     * += operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] C: constant
+     *
+     * @return
+     *      - result matrix: result += C
+     */
+    Mat &operator+=(float C);
+    /**
+     * -= operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] A: source matrix
+     *
+     * @return
+     *      - result matrix: result -= A
+     */
+    Mat &operator-=(const Mat &A);
+
+    /**
+     * -= operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] C: constant
+     *
+     * @return
+     *      - result matrix: result -= C
+     */
+    Mat &operator-=(float C);
+
+    /**
+     * *= operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] A: source matrix
+     *
+     * @return
+     *      - result matrix: result -= A
+     */
+    Mat &operator*=(const Mat &A);
+    /**
+     * += with constant operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] C: constant value
+     *
+     * @return
+     *      - result matrix: result *= C
+     */
+    Mat &operator*=(float C);
+    /**
+     * /= with constant operator
+     * The operator use DSP optimized implementation of multiplication.
+     *
+     * @param[in] C: constant value
+     *
+     * @return
+     *      - result matrix: result /= C
+     */
+    Mat &operator/=(float C);
+    /**
+     * /= operator
+     *
+     * @param[in] B: source matrix
+     *
+     * @return
+     *      - result matrix: result[i,j] = result[i,j]/B[i,j]
+     */
+    Mat &operator/=(const Mat &B);
+    /**
+     * ^= xor with constant operator
+     * The operator use DSP optimized implementation of multiplication.
+     * @param[in] C: constant value
+     *
+     * @return
+     *      - result matrix: result ^= C
+     */
+    Mat  operator^(int C);
+
+    /**
+     * Swap two rows between each other.
+     * @param[in] row1: position of first row
+     * @param[in] row2: position of second row
+     */
+    void swapRows(int row1, int row2);
+    /**
+     * Matrix transpose.
+     * Change rows and columns between each other.
+     *
+     * @return
+     *      - transposed matrix
+     */
+    Mat t();
+
+    /**
+     * Create identity matrix.
+     * Create a square matrix and fill diagonal with 1.
+     *
+     * @param[in] size: matrix size
+     *
+     * @return
+     *      - matrix [N]x[N] with 1 in diagonal
+     */
+    static Mat eye(int size);
+
+    /**
+     * Create matrix with all elements 1.
+     * Create a square matrix and fill all elements with 1.
+     *
+     * @param[in] size: matrix size
+     *
+     * @return
+     *      - matrix [N]x[N] with 1 in all elements
+     */
+    static Mat ones(int size);
+
+    /**
+     * Return part of matrix from defined position (startRow, startCol) as a matrix[blockRows x blockCols].
+     *
+     * @param[in] startRow: start row position
+     * @param[in] startCol: start column position
+     * @param[in] blockRows: amount of rows in result matrix
+     * @param[in] blockCols: amount of columns in the result matrix
+     *
+     * @return
+     *      - matrix [blockRows]x[blockCols]
+     */
+    Mat block(int startRow, int startCol, int blockRows, int blockCols);
+
+    /**
+     * Normalizes the vector, i.e. divides it by its own norm.
+     * If it's matrix, calculate matrix norm
+     *
+     */
+    void normalize(void);
+
+    /**
+     * Return  norm of the vector.
+     * If it's matrix, calculate matrix norm
+     *
+     * @return
+     *      - matrix norm
+     */
+    float norm(void);
+
+    /**
+     * The method fill 0 to the matrix structure.
+     *
+     */
+    void clear(void);
+
+    /**
+     * @brief   Solve the matrix
+     *
+     * Solve matrix. Find roots for the matrix A*x = b
+     *
+     * @param[in] A: matrix [N]x[N] with input coefficients
+     * @param[in] b: vector [N]x[1] with result values
+     *
+     * @return
+     *      - matrix [N]x[1] with roots
+     */
+    static Mat solve(Mat A, Mat b);
+    /**
+     * @brief   Band solve the matrix
+     *
+     * Solve band matrix. Find roots for the matrix A*x = b with bandwidth k.
+     *
+     * @param[in] A: matrix [N]x[N] with input coefficients
+     * @param[in] b: vector [N]x[1] with result values
+     * @param[in] k: upper bandwidth value
+     *
+     * @return
+     *      - matrix [N]x[1] with roots
+     */
+    static Mat bandSolve(Mat A, Mat b, int k);
+    /**
+     * @brief   Solve the matrix
+     *
+     * Different way to solve the matrix. Find roots for the matrix A*x = y
+     *
+     * @param[in] A: matrix [N]x[N] with input coefficients
+     * @param[in] y: vector [N]x[1] with result values
+     *
+     * @return
+     *      - matrix [N]x[1] with roots
+     */
+    static Mat roots(Mat A, Mat y);
+
+    /**
+     * @brief   Dotproduct of two vectors
+     *
+     * The method returns dotproduct of two vectors
+     *
+     * @param[in] A: Input vector A Nx1
+     * @param[in] B: Input vector B Nx1
+     *
+     * @return
+     *      - dotproduct value
+     */
+    static float dotProduct(Mat A, Mat B);
+
+    /**
+     * @brief   Augmented matrices
+     *
+     * Augmented matrices
+     *
+     * @param[in] A: Input vector A MxN
+     * @param[in] B: Input vector B MxK
+     *
+     * @return
+     *      - Augmented matrix Mx(N+K)
+     */
+    static Mat augment(Mat A, Mat B);
+    /**
+     * @brief   Gaussian Elimination
+     *
+     * Gaussian Elimination of matrix
+     *
+     * @return
+     *      - result matrix
+     */
+    Mat gaussianEliminate();
+
+    /**
+     * Row reduction for Gaussian elimination
+     *
+     * @return
+     *      - result matrix
+     */
+    Mat rowReduceFromGaussian();
+
+    /**
+     * Find the inverse matrix
+     *
+     * @return
+     *      - inverse matrix
+     */
+    Mat inverse();
+
+    /**
+     * Find pseudo inverse matrix
+     *
+     * @return
+     *      - inverse matrix
+     */
+    Mat pinv();
+
+    int rows; /*!< Amount of rows*/
+    int cols; /*!< Amount of columns*/
+    float *data; /*!< Buffer with matrix data*/
+    int length; /*!< Total amount of data in data array*/
+
+    static float abs_tol; /*!< Max acceptable absolute tolerance*/
+
+    /**
+     * Find determinant
+     * @param[in] n: element number in first row
+     *
+     * @return
+     *      - determinant value
+     */
+	float det(int n);
+private:
+	Mat cofactor(int row, int col, int n);
+	Mat adjoint();
+
+    void allocate(); // Allocate buffer
+    Mat expHelper(const Mat &m, int num);
+};
+/**
+ * Print matrix to the standard iostream.
+ * @param[in] os: output stream
+ * @param[in] m: matrix to print
+ *
+ * @return
+ *      - output stream
+ */
+std::ostream &operator<<(std::ostream &os, const Mat &m);
+/**
+ * Fill the matrix from iostream.
+ * @param[in] is: input stream
+ * @param[in] m: matrix to fill
+ *
+ * @return
+ *      - input stream
+ */
+std::istream &operator>>(std::istream &is, Mat &m);
+
+/**
+ * + operator, sum of two matrices
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] B: Input matrix B
+ *
+ * @return
+ *     - result matrix A+B
+*/
+Mat operator+(const Mat &A, const Mat &B);
+/**
+ * + operator, sum of matrix with constant
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] C: Input constant
+ *
+ * @return
+ *     - result matrix A+C
+*/
+Mat operator+(const Mat &A, float C);
+
+/**
+ * - operator, subtraction of two matrices
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] B: Input matrix B
+ *
+ * @return
+ *     - result matrix A-B
+*/
+Mat operator-(const Mat &A, const Mat &B);
+/**
+ * - operator, sum of matrix with constant
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] C: Input constant
+ *
+ * @return
+ *     - result matrix A+C
+*/
+Mat operator-(const Mat &A, float C);
+
+/**
+ * * operator, multiplication of two matrices.
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] B: Input matrix B
+ *
+ * @return
+ *     - result matrix A*B
+*/
+Mat operator*(const Mat &A, const Mat &B);
+
+/**
+ * * operator, multiplication of matrix with constant
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] C: floating point value
+ *
+ * @return
+ *     - result matrix A*B
+*/
+Mat operator*(const Mat &A, float C);
+
+/**
+ * * operator, multiplication of matrix with constant
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] C: floating point value
+ * @param[in] A: Input matrix A
+ *
+ * @return
+ *     - result matrix A*B
+*/
+Mat operator*(float C, const Mat &A);
+
+/**
+ * / operator, divide of matrix by constant
+ * The operator use DSP optimized implementation of multiplication.
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] C: floating point value
+ *
+ * @return
+ *     - result matrix A*B
+*/
+Mat operator/(const Mat &A, float C);
+
+/**
+ * / operator, divide matrix A by matrix B
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] B: Input matrix B
+ *
+ * @return
+ *     - result matrix C, where C[i,j] = A[i,j]/B[i,j]
+*/
+Mat operator/(const Mat &A, const Mat &B);
+
+/**
+ * == operator, compare two matrices
+ *
+ * @param[in] A: Input matrix A
+ * @param[in] B: Input matrix B
+ *
+ * @return
+ *      - true if matrices are the same
+ *      - false if matrices are different
+*/
+bool operator==(const Mat &A, const Mat &B);
+
+}
+#endif //_dspm_mat_h_
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_d_gen.h b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_d_gen.h
new file mode 100644
index 00000000000..8eacae8650b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_d_gen.h
@@ -0,0 +1,47 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_d_gen_H_
+#define _dsps_d_gen_H_
+#include "dsp_err.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   delta function 
+ * 
+ * The function generate delta function.
+ * output[i]=0, if i=[0..N)
+ * output[i]=1, if i=pos, pos: [0..N-1)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param output: output array.
+ * @param len: length of the input signal
+ * @param pos: delta function position
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_d_gen_f32(float *output, int len, int pos);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_d_gen_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_h_gen.h b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_h_gen.h
new file mode 100644
index 00000000000..a19bef1b7e1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_h_gen.h
@@ -0,0 +1,48 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_h_gen_H_
+#define _dsps_h_gen_H_
+#include "dsp_err.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Heviside function 
+ * 
+ * The Heviside function.
+ * output[i]=0, if i=[0..pos)
+ * output[i]=1, if i=[pos..N)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param output: output array.
+ * @param len: length of the input signal
+ * @param pos: heviside function position
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+
+esp_err_t dsps_h_gen_f32(float *output, int len, int pos);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_h_gen_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_sfdr.h b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_sfdr.h
new file mode 100644
index 00000000000..1b7decc0b47
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_sfdr.h
@@ -0,0 +1,51 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_sfdr_H_
+#define _dsps_sfdr_H_
+
+
+#include "dsp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   SFDR
+ * 
+ * The function calculates Spurious-Free Dynamic Range.
+ * The function makes FFT of the input, then search a spectrum maximum, and then compare
+ * maximum value with all others. Result calculated as minimum value.
+ * This function have to be used for debug and unit tests only. It's not optimized for real-time processing.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input: input array.
+ * @param len: length of the input signal
+ * @param use_dc: this parameter define will be DC value used for calculation or not.
+ *                0 - SNR will not include DC power
+ *                1 - SNR will include DC power
+ *
+ * @return
+ *      - SFDR in DB
+ */
+float dsps_sfdr_f32(const float *input, int32_t len, int8_t use_dc);
+float dsps_sfdr_fc32(const float *input, int32_t len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_sfdr_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_snr.h b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_snr.h
new file mode 100644
index 00000000000..163df4decee
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_snr.h
@@ -0,0 +1,51 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _DSP_SNR_H_
+#define _DSP_SNR_H_
+
+#include "dsp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   SNR
+ * 
+ * The function calculates signal to noise ration in case if signal is sine tone.
+ * The function makes FFT of the input, then search a spectrum maximum, and then calculated
+ * SNR as sum of all harmonics to the maximum value.
+ * This function have to be used for debug and unit tests only. It's not optimized for real-time processing.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param input: input array.
+ * @param len: length of the input signal
+ * @param use_dc: this parameter define will be DC value used for calculation or not.
+ *                0 - SNR will not include DC power
+ *                1 - SNR will include DC power
+ *
+ * @return
+ *      - SNR in dB
+ */
+float dsps_snr_f32(const float *input, int32_t len, uint8_t use_dc);
+float dsps_snr_fc32(const float *input, int32_t len);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _DSP_SNR_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_tone_gen.h b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_tone_gen.h
new file mode 100644
index 00000000000..281e3b6b070
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_tone_gen.h
@@ -0,0 +1,48 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_tone_gen_H_
+#define _dsps_tone_gen_H_
+#include "dsp_err.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   tone
+ * 
+ * The function generate a tone signal.
+ * x[i]=A*sin(2*PI*i + ph/180*PI)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param output: output array.
+ * @param len: length of the input signal
+ * @param Ampl: amplitude
+ * @param freq: Naiquist frequency -1..1
+ * @param phase: phase in degree
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_tone_gen_f32(float *output, int len, float Ampl, float freq, float phase);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_tone_gen_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_view.h b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_view.h
new file mode 100644
index 00000000000..49c3022cbe2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/support/include/dsps_view.h
@@ -0,0 +1,64 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_view_H_
+#define _dsps_view_H_
+
+#include "dsp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief   plot view
+ * 
+ * Generic view function.
+ * This function takes input samples and show then in console view as a plot.
+ * The main purpose to give and draft debug information to the DSP developer.
+ *
+ * @param[in] data: array with input samples.
+ * @param len: length of the input array
+ * @param width: plot width in symbols
+ * @param height: plot height in lines
+ * @param min: minimum value that will be limited by Axis Y.
+ * @param max: maximum value that will be limited by Axis Y.
+ * @param view_char: character to draw the plot calues ('.' or '|' etc)
+ *
+ */
+void dsps_view(const float *data, int32_t len, int width, int height, float min, float max, char view_char);
+void dsps_view_s16(const int16_t *data, int32_t len, int width, int height, float min, float max, char view_char);
+/**@}*/ 
+
+/**
+ * @brief   spectrum view
+ * 
+ * The view function to show spectrum values  in 64x10 screen.
+ * The function based on dsps_view.
+ *
+ * @param[in] data: array with input samples.
+ * @param len: length of the input array
+ * @param min: minimum value that will be limited by Axis Y.
+ * @param max: maximum value that will be limited by Axis Y.
+ *
+ */
+void dsps_view_spectrum(const float *data, int32_t len, float min, float max);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_view_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/windows/blackman/include/dsps_wind_blackman.h b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/blackman/include/dsps_wind_blackman.h
new file mode 100644
index 00000000000..4c7475a519a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/blackman/include/dsps_wind_blackman.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_blackman_H_
+#define _dsps_wind_blackman_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Blackman window
+ * 
+ * The function generates Blackman window for plpha = 0.16.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_blackman_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_blackman_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/windows/blackman_harris/include/dsps_wind_blackman_harris.h b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/blackman_harris/include/dsps_wind_blackman_harris.h
new file mode 100644
index 00000000000..5f93a7b639c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/blackman_harris/include/dsps_wind_blackman_harris.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_blackman_harris_H_
+#define _dsps_wind_blackman_harris_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Blackman-Harris window
+ * 
+ * The function generates Blackman-Harris window.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_blackman_harris_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_blackman_harris_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/windows/blackman_nuttall/include/dsps_wind_blackman_nuttall.h b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/blackman_nuttall/include/dsps_wind_blackman_nuttall.h
new file mode 100644
index 00000000000..10b525785ec
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/blackman_nuttall/include/dsps_wind_blackman_nuttall.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_blackman_nuttall_H_
+#define _dsps_wind_blackman_nuttall_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Blackman-Nuttall window
+ * 
+ * The function generates Blackman-Nuttall window.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_blackman_nuttall_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_blackman_nuttall_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/windows/flat_top/include/dsps_wind_flat_top.h b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/flat_top/include/dsps_wind_flat_top.h
new file mode 100644
index 00000000000..85d83e50670
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/flat_top/include/dsps_wind_flat_top.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_flat_top_H_
+#define _dsps_wind_flat_top_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Flat-Top window
+ * 
+ * The function generates Flat-Top window.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_flat_top_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_flat_top_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/windows/hann/include/dsps_wind_hann.h b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/hann/include/dsps_wind_hann.h
new file mode 100644
index 00000000000..2c682570136
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/hann/include/dsps_wind_hann.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_hann_H_
+#define _dsps_wind_hann_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Hann window
+ * 
+ * The function generates Hann window.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_hann_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_hann_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/windows/include/dsps_wind.h b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/include/dsps_wind.h
new file mode 100644
index 00000000000..c8e3404a44f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/include/dsps_wind.h
@@ -0,0 +1,26 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_H_
+#define _dsps_wind_H_
+
+#include "dsps_wind_hann.h"
+#include "dsps_wind_blackman.h"
+#include "dsps_wind_blackman_harris.h"
+#include "dsps_wind_blackman_nuttall.h"
+#include "dsps_wind_nuttall.h"
+#include "dsps_wind_flat_top.h"
+
+#endif // _dsps_wind_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-dsp/modules/windows/nuttall/include/dsps_wind_nuttall.h b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/nuttall/include/dsps_wind_nuttall.h
new file mode 100644
index 00000000000..180cb923300
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-dsp/modules/windows/nuttall/include/dsps_wind_nuttall.h
@@ -0,0 +1,38 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_wind_nuttall_H_
+#define _dsps_wind_nuttall_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   Nuttall window
+ * 
+ * The function generates Nuttall window.
+ *
+ * @param window: buffer to store window array.
+ * @param len: length of the window array
+ *
+ */
+void dsps_wind_nuttall_f32(float *window, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _dsps_wind_nuttall_H_
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts.h b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts.h
new file mode 100644
index 00000000000..ad800303a17
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts.h
@@ -0,0 +1,135 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_TTS_H_
+#define _ESP_TTS_H_
+
+#include "stdlib.h"
+#include "stdio.h"
+#include "esp_tts_voice.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+	NONE_MODE      = 0,    //do not play any word before playing a specific number
+	ALI_PAY_MODE,          //play zhi fu bao shou kuan before playing a specific number
+	WEIXIN_PAY_MODE        //play wei xin shou kuan before playing a specific number
+} pay_mode_t;
+
+typedef void * esp_tts_handle_t;
+
+
+/**
+ * @brief Init an instance of the TTS voice set structure.
+ *
+ * @param template      The const esp_tts_voice_template.
+ * @param data          The customize voice data
+ * @return
+ *         - NULL: Init failed
+ *         - Others: The instance of voice set
+ */
+esp_tts_voice_t *esp_tts_voice_set_init(const esp_tts_voice_t *template, void *data);
+
+/**
+ * @brief Init an instance of the TTS voice set structure.
+ *
+ * @param template      The const esp_tts_voice_template.
+ * @param data          The customize voice data
+ * @return
+ *         - NULL: Init failed
+ *         - Others: The instance of voice set
+ */
+void esp_tts_voice_set_free(esp_tts_voice_t *voice);
+
+/**
+ * @brief Creates an instance of the TTS structure.
+ *
+ * @param voice      Voice set containing all basic phonemes.
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of TTS structure
+ */
+esp_tts_handle_t esp_tts_create(esp_tts_voice_t *voice);
+
+/**
+ * @brief parse money pronuciation.
+ *
+ * @param tts_handle   Instance of TTS
+ * @param yuan         The number of yuan    
+ * @param jiao         The number of jiao
+ * @param fen          The number of fen   
+ * @param mode         The pay mode: please refer to pay_mode_t
+ * @return
+ *        - 0: failed
+ *        - 1: succeeded
+ */
+int esp_tts_parse_money(esp_tts_handle_t tts_handle, int yuan, int jiao, int fen, pay_mode_t mode);
+
+/**
+ * @brief parse Chinese PinYin pronuciation.
+ *
+ * @param tts_handle   Instance of TTS
+ * @param pinyin       PinYin string, like this "da4 jia1 hao3"    
+ * @return
+ *         - 0: failed
+ *         - 1: succeeded
+ */
+int esp_tts_parse_pinyin(esp_tts_handle_t tts_handle, const char *pinyin);
+
+/**
+ * @brief parse Chinese string.
+ *
+ * @param tts_handle   Instance of TTS
+ * @param str          Chinese string, like this "大家好"    
+ * @return
+ *         - 0: failed
+ *         - 1: succeeded
+ */
+int esp_tts_parse_chinese(esp_tts_handle_t tts_handle, const char *str);
+
+/**
+ * @brief output TTS voice data by stream.
+ *
+ * @Warning The output data should not be freed. 
+            Once the output length is 0, the all voice data has been output.  
+ *
+ * @param tts_handle   Instance of TTS
+ * @param len          The length of output data 
+ * @param speed        The speech speed speed of synthesized speech, 
+                       range:0~5, 0: the slowest speed, 5: the fastest speech 
+ * @return
+ *        - voice raw data
+ */
+short* esp_tts_stream_play(esp_tts_handle_t tts_handle, int *len, unsigned int speed);
+
+/**
+ * @brief reset tts stream and clean all cache of TTS instance.
+ *
+ * @param tts_handle   Instance of TTS
+ */
+void esp_tts_stream_reset(esp_tts_handle_t tts_handle);
+
+/**
+ * @brief Free the TTS instance
+ *
+ * @param tts_handle The instance of TTS. 
+ */
+void esp_tts_destroy(esp_tts_handle_t tts_handle);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_parser.h b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_parser.h
new file mode 100644
index 00000000000..ce71b04e319
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_parser.h
@@ -0,0 +1,25 @@
+#ifndef _ESP_TTS_PARSER_H_
+#define _ESP_TTS_PARSER_H_
+
+#include "stdlib.h"
+#include "esp_tts_voice.h"
+
+
+typedef struct {
+	int *syll_idx;
+	int syll_num;
+	int total_num;
+	esp_tts_voice_t *voice;
+}esp_tts_utt_t;
+
+esp_tts_utt_t* esp_tts_parser_chinese   (const char* str, esp_tts_voice_t *voice);
+
+esp_tts_utt_t* esp_tts_parser_money(char *play_tag, int yuan, int jiao, int fen, esp_tts_voice_t *voice);
+
+esp_tts_utt_t* esp_tts_parser_pinyin(char* pinyin, esp_tts_voice_t *voice);
+
+esp_tts_utt_t* esp_tts_utt_alloc(int syll_num, esp_tts_voice_t *voice);
+
+void esp_tts_utt_free(esp_tts_utt_t *utt);
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_player.h b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_player.h
new file mode 100644
index 00000000000..2070011af41
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_player.h
@@ -0,0 +1,67 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_TTS_PLAYER_H_
+#define _ESP_TTS_PLAYER_H_
+
+#include "stdlib.h"
+#include "stdio.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+typedef void * esp_tts_player_handle_t;
+
+/**
+ * @brief Creates an instance of the TTS Player structure.
+ *
+ * @param mode      mode of player, default:0 
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of  TTS Player
+ */
+esp_tts_player_handle_t esp_tts_player_create(int mode);
+
+
+
+/**
+ * @brief Concatenate audio files. 
+ *
+ * @Warning Just support mono audio data.
+ *
+ * @param player       The handle of TTS player
+ * @param file_list    The dir of files
+ * @param file_num     The number of file    
+ * @param len          The length of return audio buffer 
+ * @param sample_rate  The sample rate of input audio file
+ * @param sample_width The sample width of input audio file, sample_width=1:8-bit, sample_width=2:16-bit,...
+ * @return
+ *        - audio data buffer
+ */
+unsigned char* esp_tts_stream_play_by_concat(esp_tts_player_handle_t player, const char **file_list, int file_num, int *len, int *sample_rate, int *sample_width);
+
+
+/**
+ * @brief Free the TTS Player instance
+ *
+ * @param player The instance of TTS Player. 
+ */
+void esp_tts_player_destroy(esp_tts_player_handle_t player);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_stretcher.h b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_stretcher.h
new file mode 100644
index 00000000000..ab47b272c0d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_stretcher.h
@@ -0,0 +1,48 @@
+////////////////////////////////////////////////////////////////////////////
+//                        **** AUDIO-STRETCH ****                         //
+//                      Time Domain Harmonic Scaler                       //
+//                    Copyright (c) 2019 David Bryant                     //
+//                          All Rights Reserved.                          //
+//      Distributed under the BSD Software License (see license.txt)      //
+////////////////////////////////////////////////////////////////////////////
+
+// stretch.h
+
+// Time Domain Harmonic Compression and Expansion
+//
+// This library performs time domain harmonic scaling with pitch detection
+// to stretch the timing of a 16-bit PCM signal (either mono or stereo) from
+// 1/2 to 2 times its original length. This is done without altering any of
+// its tonal characteristics.
+
+#ifndef STRETCH_H
+#define STRETCH_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void *StretchHandle;
+
+/* extern function */
+StretchHandle stretch_init (int shortest_period, int longest_period, int num_chans, int fast_mode);
+int stretch_samples (StretchHandle handle, short *samples, int num_samples, short *output, float ratio);
+int stretch_flush (StretchHandle handle, short *output);
+void stretch_deinit (StretchHandle handle);
+
+/* internel function */
+StretchHandle stretcher_init_internal(int shortest_period, int longest_period, int buff_len);
+void stretcher_deinit (StretchHandle handle);
+int stretcher_is_empty(StretchHandle handle);
+int stretcher_is_full(StretchHandle handle, int num_samples);
+int stretcher_push_data(StretchHandle handle, short *samples, int num_samples);
+int stretcher_stretch_samples(StretchHandle handle, short *output, float ratio);
+int stretcher_stretch_samples_flash(StretchHandle handle, short *output, float ratio, const short *period_data, 
+                                    int *start_idx, int end_idx);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice.h b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice.h
new file mode 100644
index 00000000000..77f263e3935
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice.h
@@ -0,0 +1,20 @@
+#ifndef _ESP_TTS_VOICE_H_
+#define _ESP_TTS_VOICE_H_
+
+typedef struct {
+	char *voice_name;       // voice set name 
+	char *format;           // the format of voice data, currently support pcm and amrwb
+	int sample_rate;        // the sample rate of voice data, just for pcm format
+	int bit_width;          // the bit width of voice data, just for pcm format
+	int syll_num;           // the syllable mumber 
+	char **sylls;           // the syllable names
+	int *syll_pos;          // the position of syllable in syllable audio data array
+	short *pinyin_idx;      // the index of pinyin
+	short *phrase_dict;     // the pinyin dictionary of common phrase
+	short *extern_idx;      // the idx of extern phrases 
+	short *extern_dict;     // the extern phrase dictionary
+	unsigned char *data;    // the audio data of all syllables
+} esp_tts_voice_t;
+
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_template.h b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_template.h
new file mode 100644
index 00000000000..ce5f5b6f455
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_template.h
@@ -0,0 +1,5 @@
+#pragma once
+
+
+#include "esp_tts.h"
+extern const esp_tts_voice_t  esp_tts_voice_template;
diff --git a/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_xiaole.h b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_xiaole.h
new file mode 100644
index 00000000000..f87866ae6cb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/esp-tts/esp_tts_chinese/include/esp_tts_voice_xiaole.h
@@ -0,0 +1,5 @@
+#pragma once
+
+
+#include "esp_tts.h"
+extern const esp_tts_voice_t  esp_tts_voice_xiaole;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/customized_word_wn5.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/customized_word_wn5.h
new file mode 100644
index 00000000000..57199e5abe0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/customized_word_wn5.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_customized_word_wn5;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib.h
new file mode 100644
index 00000000000..d7b6d8fbe77
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib.h
@@ -0,0 +1,411 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_H
+#define DL_LIB_H
+
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+
+#ifdef ESP_PLATFORM
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "esp_system.h"
+#include "esp_heap_caps.h"
+#include "sdkconfig.h"
+#define DL_SPIRAM_SUPPORT 1
+#endif
+
+#ifdef CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/cache.h"
+#endif
+
+typedef int padding_state;
+
+// /**
+//  * @brief Allocate a chunk of memory which has the given capabilities.
+//  *        Equivalent semantics to libc malloc(), for capability-aware memory.
+//  *        In IDF, malloc(p) is equivalent to heap_caps_malloc(p, MALLOC_CAP_8BIT).
+//  * 
+//  * @param size  In bytes, of the amount of memory to allocate
+//  * @param caps  Bitwise OR of MALLOC_CAP_* flags indicating the type of memory to be returned
+//  *              MALLOC_CAP_SPIRAM:   Memory must be in SPI RAM
+//  *              MALLOC_CAP_INTERNAL: Memory must be internal; specifically it should not disappear when flash/spiram cache is switched off
+//  *              MALLOC_CAP_DMA:      Memory must be able to accessed by DMA
+//  *              MALLOC_CAP_DEFAULT:  Memory can be returned in a non-capability-specific memory allocation
+//  * @return Pointer to currently allocated heap memory
+//  **/
+// void *heap_caps_malloc(size_t size, uint32_t caps);
+
+/**
+ * @brief Allocate aligned memory from internal memory or external memory.
+ *        if cnt*size > CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL, allocate memory from internal RAM
+ *        else, allocate memory from PSRAM
+ *
+ * @param cnt    Number of continuing chunks of memory to allocate
+ * @param size   Size, in bytes, of a chunk of memory to allocate     
+ * @param align  Aligned size, in bits
+ * @return Pointer to currently allocated heap memory
+ */
+void *dl_lib_calloc(int cnt, int size, int align);
+
+/**
+ * @brief Always allocate aligned memory from external memory.
+ *
+ * @param cnt    Number of continuing chunks of memory to allocate
+ * @param size   Size, in bytes, of a chunk of memory to allocate     
+ * @param align  Aligned size, in bits
+ * @return Pointer to currently aligned heap memory
+ */
+void *dl_lib_calloc_psram(int cnt, int size, int align);
+
+/**
+ * @brief Free aligned memory allocated by `dl_lib_calloc` or `dl_lib_calloc_psram` 
+ * 
+ * @param prt    Pointer to free
+ */
+void dl_lib_free(void *ptr);
+
+/**
+ * @brief Does a fast version of the exp() operation on a floating point number.
+ *
+ * As described in https://codingforspeed.com/using-faster-exponential-approximation/
+ * Should be good til an input of 5 or so with a steps factor of 8.
+ *
+ * @param in Floating point input
+ * @param steps Approximation steps. More is more precise. 8 or 10 should be good enough for most purposes.
+ * @return Exp()'ed output
+ */
+fptp_t fast_exp(double x, int steps);
+
+/**
+ * @brief Does a fast version of the exp() operation on a floating point number.
+ *
+ * @param in Floating point input
+ * @return Exp()'ed output
+ */
+double fast_exp_pro(double x);
+
+/**
+ * @brief Does a softmax operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_softmax(const dl_matrix2d_t *in, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Does a softmax operation on a quantized matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_softmax_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a sigmoid operation on a floating point number
+ *
+ * @param in Floating point input
+ * @return Sigmoid output
+ */
+
+fptp_t dl_sigmoid_op(fptp_t in);
+
+
+/**
+ * @brief Does a sigmoid operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_sigmoid(const dl_matrix2d_t *in, dl_matrix2d_t *out);
+
+/**
+ * @brief Does a tanh operation on a floating point number
+ *
+ * @param in        Floating point input number
+ * @return Tanh value
+ */
+fptp_t dl_tanh_op(fptp_t v);
+
+/**
+ * @brief Does a tanh operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_tanh(const dl_matrix2d_t *in, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Does a relu (Rectifier Linear Unit) operation on a floating point number
+ *
+ * @param in        Floating point input
+ * @param clip      If value is higher than this, it will be clipped to this value
+ * @return Relu output
+ */
+fptp_t dl_relu_op(fptp_t in, fptp_t clip);
+
+/**
+ * @brief Does a ReLu operation on a matrix.
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_relu(const dl_matrix2d_t *in, fptp_t clip, dl_matrix2d_t *out);
+
+/**
+ * @brief Fully connected layer operation
+ *
+ * @param in        Input vector
+ * @param weight    Weights of the neurons
+ * @param bias      Biases for the neurons. Can be NULL if a bias of 0 is required.
+ * @param out       Output array. Outputs are placed here. Needs to be an initialized, weight->w by in->h in size, matrix.
+ */
+void dl_fully_connect_layer(const dl_matrix2d_t *in, const dl_matrix2d_t *weight, const dl_matrix2d_t *bias, dl_matrix2d_t *out);
+
+/**
+ * @brief Pre-calculate the sqrtvari variable for the batch_normalize function.
+ * The sqrtvari matrix depends on the variance and epsilon values, which normally are constant. Hence,
+ * this matrix only needs to be calculated once. This function does that.
+ *
+ * @param 
+ * @return
+ */
+void dl_batch_normalize_get_sqrtvar(const dl_matrix2d_t *variance, fptp_t epsilon, dl_matrix2d_t *out);
+
+/**
+ * @brief Batch-normalize a matrix
+ *
+ * @param m         The matrix to normalize
+ * @param offset    Offset matrix
+ * @param scale     Scale matrix
+ * @param mean      Mean matrix
+ * @param sqrtvari  Matrix precalculated using dl_batch_normalize_get_sqrtvar
+ * @return
+ */
+void dl_batch_normalize(dl_matrix2d_t *m, const dl_matrix2d_t *offset, const dl_matrix2d_t *scale, 
+                        const dl_matrix2d_t *mean, const dl_matrix2d_t *sqrtvari);
+
+/**
+ * @brief Do a basic LSTM layer pass.
+ *
+ * @warning Returns state_h pointer, so do not free result.
+
+ * @param in        Input vector
+ * @param state_c   Internal state of the LSTM network
+ * @param state_h   Internal state (previous output values) of the LSTM network
+ * @param weights   Weights for the neurons
+ * @param bias      Bias for the neurons. Can be NULL if no bias is required
+ * @return          Output values of the neurons
+ */
+dl_matrix2d_t *dl_basic_lstm_layer(const dl_matrix2d_t *in, dl_matrix2d_t *state_c, dl_matrix2d_t *state_h, 
+                const dl_matrix2d_t *weight, const dl_matrix2d_t *bias);
+
+/**
+ * @brief Do a basic LSTM layer pass, partial quantized version.
+ * This LSTM function accepts 16-bit fixed-point weights and 32-bit float-point bias. 
+ *
+ * @warning Returns state_h pointer, so do not free result.
+
+ * @param in		Input vector
+ * @param state_c	Internal state of the LSTM network
+ * @param state_h	Internal state (previous output values) of the LSTM network
+ * @param weights	Weights for the neurons, need to be quantised 
+ * @param bias		Bias for the neurons. Can be NULL if no bias is required
+ * @return			Output values of the neurons
+ */
+dl_matrix2dq_t *dl_basic_lstm_layer_quantised_weights(const dl_matrix2d_t *in, dl_matrix2d_t *state_c, dl_matrix2d_t *state_h,
+				const dl_matrix2dq_t *weight, const dl_matrix2d_t *bias);
+
+/**
+ * @brief Do a fully-connected layer pass, fully-quantized version.
+ *
+ * @param in        Input vector
+ * @param weight    Weights of the neurons
+ * @param bias      Bias values of the neurons. Can be NULL if no bias is needed.
+ * @param shift     Number of bits to shift the result back by. See dl_lib_matrixq.h for more info
+ * @return          Output values of the neurons
+ */
+void dl_fully_connect_layer_q(const dl_matrix2dq_t *in, const dl_matrix2dq_t *weight, const dl_matrix2dq_t *bias, dl_matrix2dq_t *out, int shift);
+
+/**
+ * @brief Do a basic LSTM layer pass, fully-quantized version
+ *
+ * @warning Returns state_h pointer, so do not free result.
+
+ * @param in        Input vector
+ * @param state_c   Internal state of the LSTM network
+ * @param state_h   Internal state (previous output values) of the LSTM network
+ * @param weights   Weights for the neurons
+ * @param bias      Bias for the neurons. Can be NULL if no bias is required
+ * @param shift     Number of bits to shift the result back by. See dl_lib_matrixq.h for more info
+ * @return          Output values of the neurons
+ */
+dl_matrix2dq_t *dl_basic_lstm_layer_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *state_c, dl_matrix2dq_t *state_h,
+                const dl_matrix2dq_t *weight, const dl_matrix2dq_t *bias, int shift);
+
+/**
+ * @brief Batch-normalize a matrix, fully-quantized version
+ *
+ * @param m         The matrix to normalize
+ * @param offset    Offset matrix
+ * @param scale     Scale matrix
+ * @param mean      Mean matrix
+ * @param sqrtvari  Matrix precalculated using dl_batch_normalize_get_sqrtvar
+ * @param shift     Number of bits to shift the result back by. See dl_lib_matrixq.h for more info
+ * @return
+ */
+void dl_batch_normalize_q(dl_matrix2dq_t *m, const dl_matrix2dq_t *offset, const dl_matrix2dq_t *scale, 
+                        const dl_matrix2dq_t *mean, const dl_matrix2dq_t *sqrtvari, int shift);
+
+/**
+ * @brief Does a relu (Rectifier Linear Unit) operation on a fixed-point number
+ * This accepts and returns fixed-point 32-bit number with the last 15 bits being the bits after the decimal
+ * point. (Equivalent to a mantissa in a quantized matrix with exponent -15.)
+ *
+ * @param in        Fixed-point input
+ * @param clip      If value is higher than this, it will be clipped to this value
+ * @return Relu output
+ */
+qtp_t dl_relu_q_op(qtp_t in, qtp_t clip);
+
+/**
+ * @brief Does a ReLu operation on a matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_relu_q(const dl_matrix2dq_t *in, fptp_t clip, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a sigmoid operation on a fixed-point number.
+ * This accepts and returns a fixed-point 32-bit number with the last 15 bits being the bits after the decimal
+ * point. (Equivalent to a mantissa in a quantized matrix with exponent -15.)
+ *
+ * @param in Fixed-point input
+ * @return Sigmoid output
+ */
+int dl_sigmoid_op_q(const int in);
+int16_t dl_sigmoid_op_q8(const int16_t in);
+/**
+ * @brief Does a sigmoid operation on a matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_sigmoid_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a tanh operation on a matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_tanh_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+/**
+ * @brief Does a tanh operation on a fixed-point number.
+ * This accepts and returns a fixed-point 32-bit number with the last 15 bits being the bits after the decimal
+ * point. (Equivalent to a mantissa in a quantized matrix with exponent -15.)
+ *
+ * @param in Fixed-point input
+ * @return tanh output
+ */
+int dl_tanh_op_q(int v);
+int16_t dl_tanh_op_q8(int16_t v);
+
+void load_mat_psram_mn4(void);
+void load_mat_psram_mn3(void);
+void free_mat_psram_mn4(void);
+void free_mat_psram_mn3(void);
+qtp_t dl_hard_sigmoid_op(qtp_t in, int exponent);
+qtp_t dl_hard_tanh_op(qtp_t in, int exponent);
+
+int16_t dl_table_tanh_op(int16_t in, int exponent);
+int16_t dl_table_sigmoid_op(int16_t in, int exponent);
+
+void dl_hard_sigmoid_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+void dl_hard_tanh_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+void dl_table_sigmoid_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+void dl_table_tanh_q(const dl_matrix2dq_t *in, dl_matrix2dq_t *out);
+
+
+/**
+ * @brief Filter out the number greater than clip in the matrix, quantized version
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_minimum(const dl_matrix2d_t *in, fptp_t clip, dl_matrix2d_t *out);
+
+/**
+ * @brief Filter out the number greater than clip in the matrix, float version
+ *
+ * @param in        Input matrix
+ * @param clip      If values are higher than this, they will be clipped to this value
+ * @param out       Output matrix. Can be the same as the input matrix; if so, output results overwrite the input.
+ */
+void dl_minimum_q(const dl_matrix2dq_t *in, fptp_t clip, dl_matrix2dq_t *out);
+/**
+ * @brief Do a basic CNN layer pass.
+ *
+ * @Warning This just supports the single channel input image, and the output is single row matrix.
+            That is to say, the height of output is 1, and the weight of output is out_channels*out_image_width*out_image_height
+ *
+ * @param in             Input single channel image 
+ * @param weight         Weights of the neurons, weight->w = out_channels, weight->h = filter_width*filter_height
+ * @param bias           Bias for the CNN layer.
+ * @param filter_height  The height of convolution kernel
+ * @param filter_width   The width of convolution kernel
+ * @param out_channels   The number of output channels of convolution kernel
+ * @param stride_x       The step length of the convolution window in x(width) direction
+ * @param stride_y       The step length of the convolution window in y(height) direction
+ * @param pad            One of `"VALID"` or `"SAME"`, 0 is "VALID" and the other is "SAME"
+ * @param out            The result of CNN layer, out->h=1.
+ * @return               The result of CNN layer.
+ */
+dl_matrix2d_t *dl_basic_conv_layer(const dl_matrix2d_t *in, const dl_matrix2d_t *weight, const dl_matrix2d_t *bias, int filter_width, int filter_height, 
+                                   const int out_channels, const int stride_x, const int stride_y,  padding_state pad, const dl_matrix2d_t* out);
+
+
+/**
+ * @brief Do a basic CNN layer pass, quantised wersion.
+ *
+ * @Warning This just supports the single channel input image, and the output is single row matrix.
+            That is to say, the height of output is 1, and the weight of output is out_channels*out_image_width*out_image_height
+ *
+ * @param in             Input single channel image 
+ * @param weight         Weights of the neurons, weight->w = out_channels, weight->h = filter_width*filter_height,
+ * @param bias           Bias of the neurons.
+ * @param filter_height  The height of convolution kernel
+ * @param filter_width   The width of convolution kernel
+ * @param out_channels   The number of output channels of convolution kernel
+ * @param stride_x       The step length of the convolution window in x(width) direction
+ * @param stride_y       The step length of the convolution window in y(height) direction
+ * @param pad            One of `"VALID"` or `"SAME"`, 0 is "VALID" and the other is "SAME"
+ * @param out            The result of CNN layer, out->h=1
+ * @return               The result of CNN layer
+ */
+dl_matrix2d_t *dl_basic_conv_layer_quantised_weight(const dl_matrix2d_t *in, const dl_matrix2dq_t *weight, const dl_matrix2d_t *bias, int filter_width, int filter_height, 
+                                                     const int out_channels, const int stride_x, const int stride_y,  padding_state pad, const dl_matrix2d_t* out);
+
+#endif
+
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_coefgetter_if.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_coefgetter_if.h
new file mode 100644
index 00000000000..f1a937343bf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_coefgetter_if.h
@@ -0,0 +1,72 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_COEFGETTER_IF_H
+#define DL_LIB_COEFGETTER_IF_H
+
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+#include "cJSON.h"
+
+//Set this if the coefficient requested is a batch-normalization popvar matrix which needs to be preprocessed by
+//dl_batch_normalize_get_sqrtvar first.
+#define COEF_GETTER_HINT_BNVAR (1<<0)
+
+/*
+This struct describes the basic information of model data: 
+word_num: the number of wake words or speech commands
+word_list: the name list of wake words or speech commands
+thres_list: the threshold list of wake words or speech commands
+info_str: the string used to reflect the version and information of model data
+          which consist of the architecture of network, the version of model data, wake words and their threshold
+*/
+typedef struct {
+    int word_num;
+    char **word_list;
+    int *win_list;
+    float *thresh_list;
+    char *info_str;
+} model_info_t;
+
+/*
+Alphabet struct describes the basic grapheme or phoneme.
+item_num: the number of baisc item(grapheme or phonemr)
+items: the list of basic item
+*/
+typedef struct {
+    int item_num;
+    char **items;
+}alphabet_t;
+
+/*
+This struct describes a generic coefficient getter: a way to get the constant coefficients needed for a neural network.
+For the two getters, the name describes the name of the coefficient matrix, usually the same as the Numpy filename the
+coefficient was originally stored in. The arg argument can be used to optionally pass an additional user-defined argument
+to the getter (e.g. the directory to look for files in the case of the Numpy file loader getter). The hint argument
+is a bitwise OR of the COEF_GETTER_HINT_* flags or 0 when none is needed. Use the free_f/free_q functions to release the
+memory for the returned matrices, when applicable.
+*/
+typedef struct {
+    const dl_matrix2d_t* (*getter_f)(const char *name, void *arg, int hint);
+    const dl_matrix2dq_t* (*getter_q)(const char *name, void *arg, int hint);
+    const dl_matrix2dq8_t* (*getter_q8)(const char *name, void *arg, int hint);
+    void (*free_f)(const dl_matrix2d_t *m);
+    void (*free_q)(const dl_matrix2dq_t *m);
+    void (*free_q8)(const dl_matrix2dq8_t *m);
+    const model_info_t* (*getter_info)(void *arg);
+    const alphabet_t* (*getter_alphabet)(void *arg);
+    const cJSON* (*getter_config)(void *arg);
+} model_coeff_getter_t;
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_conv_queue.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_conv_queue.h
new file mode 100644
index 00000000000..e0ca0a1d457
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_conv_queue.h
@@ -0,0 +1,164 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_CONV_QUEUE_H
+#define DL_LIB_CONV_QUEUE_H
+
+
+#include "dl_lib_matrix.h"
+typedef float fptp_t;
+
+
+//Flags for matrices
+#define DL_MF_FOREIGNDATA (1<<0)  /*< Matrix *item data actually points to another matrix and should not be freed */
+
+//Float convolution FIFO queue. 
+typedef struct {
+    int n;          /*< the length of queue */
+    int c;          /*< the channel number of queue element*/
+    int front;      /*< the front(top) position of queue */
+    int flag;       /*< not used*/
+    fptp_t *item;   /*< Pointer to item array */
+} dl_conv_queue_t;
+
+/**
+ * @brief Allocate a convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The channel number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_conv_queue_t *dl_conv_queue_alloc(int n, int c);
+
+/**
+ * @brief Free a convolution queue
+ *
+ * @param cq     The convolution queue to free
+ */
+void dl_conv_queue_free(dl_conv_queue_t *cq);
+
+void dl_conv_to_matrix2d(dl_conv_queue_t *cq, dl_matrix2d_t* out);
+
+/**
+ * @brief Move the front pointer of queue forward, 
+          the First(oldest) element become the last(newest) element, 
+ *
+ * @param cq    Input convolution queue
+ * @return      Pointer of oldest element  
+ */
+fptp_t *dl_conv_queue_pop(dl_conv_queue_t *cq);
+
+/**
+ * @brief  Remove the oldest element, then insert the input element at the end of queue
+ *
+ * @param cq     Input convolution queue
+ * @param item   The new element
+ */
+void dl_conv_queue_push(dl_conv_queue_t *cq, fptp_t* item);
+
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_get_queue_item(dl_conv_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a sigmoid operation on the one of element in the convolution queue.
+ * Gets the pointer of element in the convolution queue by offset, and does a sigmoid operation
+ * by this pointer, then return the pointer      
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_sigmoid_step(dl_conv_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a tanh operation on the one of element in the convolution queue.
+ * Gets the pointer of element in the convolution queue by offset, and does a tanh operation
+ * by this pointer, then return the pointer  
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_tanh_step(dl_conv_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a softmax operation on the one of element in the convolution queue.
+ * Gets the pointer of element in the convolution queue by offset, and does a softmax operation
+ * by this pointer, then return the pointer 
+ *
+ * @param cq      Input convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+fptp_t *dl_softmax_step(dl_conv_queue_t *cq, int offset);
+
+fptp_t *dl_relu_step(dl_conv_queue_t *cq, int offset);
+fptp_t *dl_relu_look(dl_matrix2d_t *cq, int offset);
+dl_matrix2d_t *dl_matrix_concat1(const dl_conv_queue_t *a, const dl_matrix2d_t *b);
+dl_matrix2d_t *dl_basic_lstm_layer1(const dl_conv_queue_t *in, dl_matrix2d_t *state_c, dl_matrix2d_t *state_h,
+                                   const dl_matrix2d_t *weight, const dl_matrix2d_t *bias);
+/**
+ * @brief Fast implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is first element of output queue and should not be freed separately.
+ *
+ * @param in       Input convolution queue
+ * @param out      Output convolution queue
+ * @param rate     A positive int, the stride with which we sample input value 
+ * @param size     A positive int, the size of 1D-filter
+ * @param kernel   The kernel matrix of filter
+ * @param bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @return         The result of atrous convolution
+ */
+fptp_t *dl_atrous_conv1d_step(dl_conv_queue_t *in, dl_conv_queue_t *out, int rate, int size,
+                              dl_matrix2d_t* kernel, dl_matrix2d_t* bias);
+fptp_t *dl_look_conv_step(dl_conv_queue_t *in, dl_matrix2d_t *out, int rate, int size,
+                         dl_matrix2d_t* kernel, dl_matrix2d_t* bias);
+
+/**
+ * @brief Fast implement of dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is first element of output queue and should not be freed separately.
+ *
+ * @param in              Input convolution queue
+ * @param out             Output convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @return                The result of dilation layer
+ */
+fptp_t *dl_dilation_layer(dl_conv_queue_t *in, dl_conv_queue_t *out, int rate, int size,
+                          dl_matrix2d_t* filter_kernel, dl_matrix2d_t* filter_bias,
+                          dl_matrix2d_t* gate_kernel, dl_matrix2d_t* gate_bias);
+
+
+void test_atrous_conv(int size, int rate, int in_channel, int out_channel);
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_convq8_queue.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_convq8_queue.h
new file mode 100644
index 00000000000..c5964195f81
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_convq8_queue.h
@@ -0,0 +1,251 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_CONVQ8_QUEUE_H
+#define DL_LIB_CONVQ8_QUEUE_H
+
+
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+#include "dl_lib_conv_queue.h"
+#include "dl_lib_convq_queue.h"
+
+//[nch, n, c]
+typedef struct {
+    int n;           /*< the length of queue */
+    int c;           /*< the number of queue element*/
+    int front;       /*< the front(top) position of queue */
+    int nch;         /*< the channel of queue */
+    int exponent;    /*< The values in items should be multiplied by pow(2,exponent) 
+                         to get the real values */
+    q8tp_t *itemq;    /*< Pointer to item array */
+} dl_convq8_queue_t;
+
+/**
+ * @brief Allocate a fixed-point convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq8_queue_t *dl_convq8_queue_alloc(int n, int c);
+
+/**
+ * @brief Allocate a fixed-point convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param c     The channel of queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq8_queue_t *dl_convq8_queue_alloc_mc(int n, int c, int nch);
+
+/**
+ * @brief Free a fixed-point convolution queue
+ *
+ * @param cq     The fixed-point convolution queue to free
+ */
+void dl_convq8_queue_free(dl_convq8_queue_t *cq);
+
+/**
+ * @brief Set itemq of convolution queue to 0
+ *
+ * @param cq     The fixed-point convolution queue to free
+ */
+void dl_convq8_queue_bzero(dl_convq8_queue_t *cqm);
+
+/**
+ * @brief  Insert the float-point element at the end of queue.
+ *         The precision of fixed-point numbers is described by the Qm.f notation,  
+ *
+ * @param cq     Input fixed-point convolution queue
+ * @param item   The float-point element
+ * @param m_bit  The number of integer bits including the sign bits
+ * @param f_bit  The number of fractional bits
+ */
+void dl_convq8_queue_push_by_qmf(dl_convq8_queue_t *cq, fptp_t* item, int m_bit, int f_bit);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+q8tp_t *dl_get_queue_itemq8(dl_convq8_queue_t *cq, int offset);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @param ch      Channel index of queue
+ * @return        Pointer of the element
+ */
+q8tp_t *dl_get_queue_itemq8_mc(dl_convq8_queue_t *cq, int offset, int ch);
+
+/**
+ * @brief Fast and quantised implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param kernel          Kernel matrix of filter
+ * @param bias            The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param out_exponent    Shift ratio used in dot operation between two 16-bit fixed point vector 
+ * @param offset          Offset used to calculate the beginning of input conv queue  
+ * @param prenum          The num to control the parameter size of preload operation  
+ * @return                The result of atrous convolution
+ */
+void dl_atrous_conv1dq8_steps(dl_convq8_queue_t *in, dl_convq8_queue_t *out, int rate, int size,
+                            dl_matrix2dq8_t* kernel, dl_matrix2dq8_t* bias, 
+                            int out_exponent, int offset, int prenum);
+
+/**
+ * @brief Fast implement of dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param offset          Offset used to calculate the beginning of input conv queue  
+ * @param prenum          The num to control the parameter size of preload operation  
+ * @return                The result of dilation layer
+ */
+void dl_dilation_layerq8_steps(dl_convq8_queue_t *in, dl_convq8_queue_t *out, int rate, int size,
+                                dl_matrix2dq8_t* filter_kernel, dl_matrix2dq8_t* filter_bias,
+                                dl_matrix2dq8_t* gate_kernel, dl_matrix2dq8_t* gate_bias,
+                                int offset, int prenum);
+
+
+
+
+dl_conv_queue_t *dl_convq8_queue_add(dl_convq8_queue_t *cq1, dl_convq8_queue_t *cq2);
+
+int8_t dl_sigmoid_lutq8(int in);
+/**
+ * @brief Allocate a 8-bit fixed-point Multi-Channel convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param nch　　The channel number
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq8_queue_t **dl_convq8_queue_mc_alloc(int n, int c, int nch);
+
+/**
+ * @brief Free a 8-bit fixed-point Multi-Channel convolution queue
+ *
+ * @param cqm     The fixed-point convolution queue to free
+ * @param nch     The channel number
+ */
+void dl_convq8_queue_mc_free(dl_convq8_queue_t **cqm, int nch);
+
+/**
+ * @brief Tanh activation function for 8-bit fixed-point Multi-Channel convolution queue input
+ *
+ * @param cqm     Input 8-bit fixed-point Multi-Channel convolution queue
+ * @param offset  Offset used to calculate the beginning of input conv queue 
+ * @param nch     The channel number
+ */
+void dl_tanh_convq8_mc(dl_convq8_queue_t **cqm, int offset, int nch);
+
+/**
+ * @brief Fast and quantised 16-bit implement for Multi-channel 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        Usually, this layer is used as first layer for 8-bit network.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          Input is a 16-bit queue point, Output is an 8-bit queue point.
+ *
+ * @param in              Input 16bit fixed-point convolution queue array
+ * @param out             Output 8bit fixed-point convolution queue array
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param kernel          The kernel matrix of filter
+ * @param bias            The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param out_exponent    Exponent of output
+ * @param offset          Offset used to calculate the beginning of input conv queue  
+ * @param prenum          The num to control the parameter size of preload operation            
+ */
+void dl_atrous_conv1dq8_16in_mc_steps(dl_convq_queue_t **in, dl_convq8_queue_t **out, int nch, int rate, int size,
+                                        dl_matrix2dq_t* kernel, dl_matrix2dq_t* bias, int out_exponent, int offset, int prenum);
+
+/**
+ * @brief Fast and quantised 8-bit implement for Multi-channel 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input 8bit fixed-point convolution queue array
+ * @param out             Output 8bit fixed-point convolution queue array
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param kernel          The kernel matrix of filter
+ * @param bias            The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param out_exponent    Exponent of output
+ * @param offset          Offset used to calculate the beginning of input conv queue 
+ * @param prenum          The num to control the parameter size of preload operation            
+ */
+void dl_atrous_conv1dq8_mc_steps(dl_convq8_queue_t **in, dl_convq8_queue_t **out,
+                                int nch, int rate, int size,
+                                dl_matrix2dq8_t* kernel, dl_matrix2dq8_t* bias, 
+                                int out_exponent, int offset, int prenum);
+
+/**
+ * @brief Fast implement of 8-bit dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input 8-bit fixed-point convolution queue
+ * @param out             Output 8-bit fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param offset          Offset used to calculate the beginning of input conv queue 
+ * @param prenum          The num to control the parameter size of preload operation
+ */
+void dl_dilation_layerq8_mc_steps(dl_convq8_queue_t **in, dl_convq8_queue_t **out, int nch, int rate, int size,
+                                    dl_matrix2dq8_t* filter_kernel, dl_matrix2dq8_t* filter_bias,
+                                    dl_matrix2dq8_t* gate_kernel, dl_matrix2dq8_t* gate_bias,
+                                    int offset, int prenum);    
+
+void dl_convq8_queue_mc_bzero(dl_convq8_queue_t **cqm, int nch);
+
+void print_convq8(dl_convq8_queue_t *cq, int offset);
+void print_convq(dl_convq_queue_t *cq, int offset);
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_convq_queue.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_convq_queue.h
new file mode 100644
index 00000000000..80693718f95
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_convq_queue.h
@@ -0,0 +1,375 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_CONVQ_QUEUE_H
+#define DL_LIB_CONVQ_QUEUE_H
+
+#include "dl_lib_matrixq.h"
+#include "dl_lib_conv_queue.h"
+#include "dl_lib.h"
+
+
+//fixed-point convolution FIFO queue. 
+//[nch, n, c]
+typedef struct {
+    int n;           /*< the length of queue */
+    int c;           /*< the number of queue element*/
+    int front;       /*< the front(top) position of queue */
+    int nch;         /*< the multiple of queue*/
+    int exponent;    /*< The values in items should be multiplied by pow(2,exponent) 
+                         to get the real values */
+    qtp_t *itemq;    /*< Pointer to item array */
+} dl_convq_queue_t;
+
+/**
+ * @brief Allocate a fixed-point convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc(int n, int c);
+
+/**
+ * @brief Allocate a fixed-point convolution queue from PSRAM
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc_from_psram(int n, int c);
+
+/**
+ * @brief Allocate a fixed-point multi-channel convolution queue
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param nch   The channel of conv queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc_mc(int n, int c, int nch);
+
+/**
+ * @brief Allocate a fixed-point multi-channel convolution queue from PSRAM
+ *
+ * @param n     The length of queue
+ * @param c     The number of elements in the queue
+ * @param nch   The channel of conv queue
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t *dl_convq_queue_alloc_mc_from_psram(int n, int c, int nch);
+
+
+void dl_convq_to_matrix2dq(dl_convq_queue_t *cq, dl_matrix2dq_t* out, int row);
+
+/**
+ * @brief Free a fixed-point convolution queue
+ *
+ * @param cq     The fixed-point convolution queue to free
+ */
+void dl_convq_queue_free(dl_convq_queue_t *cq);
+
+/**
+ * @brief Set itemq of convolution queue to 0
+ *
+ * @param cq     The fixed-point convolution queue point
+ */
+void dl_convq_queue_bzero(dl_convq_queue_t *cq);
+
+/**
+ * @brief Move the front pointer of queue forward, 
+          the First(oldest) element become the last(newest) element, 
+ *
+ * @param cq    Input fixed-point convolution queue
+ * @return      Pointer of oldest element  
+ */
+inline qtp_t *dl_convq_queue_pop(dl_convq_queue_t *cq);
+inline qtp_t *dl_convq_queue_popn(dl_convq_queue_t *cq, int n);
+/**
+ * @brief  Remove the oldest element, then insert the input element at the end of queue
+ *
+ * @param cq     Input fixed-point convolution queue
+ * @param item   The new element
+ */
+void dl_convq_queue_push(dl_convq_queue_t *cq, dl_matrix2dq_t *a, int shift);
+
+/**
+ * @brief  Insert the float-point element at the end of queue.
+ *         The precision of fixed-point numbers is described by the Qm.f notation,  
+ *
+ * @param cq     Input fixed-point convolution queue
+ * @param item   The float-point element
+ * @param m_bit  The number of integer bits including the sign bits
+ * @param f_bit  The number of fractional bits
+ */
+void dl_convq_queue_push_by_qmf(dl_convq_queue_t *cq, fptp_t* item, int m_bit, int f_bit);
+
+void dl_convq16_queue_push_by_qmf(dl_convq_queue_t *cq, fptp_t* item, int m_bit, int f_bit);
+
+dl_conv_queue_t *dl_queue_from_convq(dl_convq_queue_t *cq1);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq        Input fixed-point convolution queue
+ * @param last_num  Offset from the front of the queue
+ * @return          Pointer of the element
+ */
+inline qtp_t *dl_get_queue_itemq(dl_convq_queue_t *cq, int last_num);
+
+/**
+ * @brief   Get the pointer of element in the queue by offset
+ *
+ * @param cq        Input fixed-point convolution queue
+ * @param offset    Offset from the front of the queue
+ * @param ch        Channel index of convolution queue 
+ * @return          Pointer of the element
+ */
+qtp_t *dl_get_queue_itemq_mc(dl_convq_queue_t *cq, int offset, int ch);
+
+/**
+ * @brief   Does a tanh operation on the one of element in the convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, and does a 
+ *          tanh operation by this pointer, then return the pointer 
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+void dl_tanh_convq(dl_convq_queue_t *cq, int offset);
+
+/**
+ * @brief   Does a tanh operation on the one of element in multi channel convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, and does a 
+ *          tanh operation by this pointer, then return the pointer 
+ *
+ * @param cq      Input fixed-point multi channnel convolution queue
+ * @param offset  Offset from the front of the queue
+ * @param nch     The channel number of cqm
+ * @return        Pointer of the element
+ */
+void dl_tanh_convq_mc(dl_convq_queue_t **cqm, int offset, int nch);
+
+/**
+ * @brief   Does a relu operation on the one of element in the convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, and does a 
+ *          relu operation by this pointer, then return the pointer 
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @return        Pointer of the element
+ */
+void dl_relu_convq(dl_convq_queue_t *cq, fptp_t clip, int last_num);
+
+/**
+ * @brief   Does a softmax operation on the one of element in the convolution queue.
+ *          Gets the pointer of element in the convolution queue by offset, input data
+            stay as it is. Results are saved into the *out* array. 
+ *
+ * @param cq      Input fixed-point convolution queue
+ * @param offset  Offset from the front of the queue
+ * @param out     Old array to re-use. Passing NULL will allocate a new matrix.
+ * @return        softmax results
+ */
+fptp_t * dl_softmax_step_q(dl_convq_queue_t *cq, int offset, fptp_t *out);
+
+/**
+ * @brief Fast and quantised implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in       Input fixed-point convolution queue
+ * @param out      Output fixed-point convolution queue
+ * @param rate     A positive int, the stride with which we sample input value 
+ * @param size     A positive int, the size of 1D-filter
+ * @param kernel   The kernel matrix of filter
+ * @param bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param shift    Shift ratio used in dot operation between two 16-bit fixed point vector 
+ * @return         The result of atrous convolution
+ */
+qtp_t * dl_atrous_conv1dq(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                          dl_matrix2dq_t* kernel, dl_matrix2dq_t* bias, int shift, int prenum);
+
+/**
+ * @brief Fast implement of dilation layer as follows
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param filter_shift          Shift ratio used in filter operation between two 16-bit fixed point vector
+ * @param gate_shift            Shift ratio used in gate operation between two 16-bit fixed point vector
+ * @return                The result of dilation layer
+ */
+qtp_t *dl_dilation_layerq_steps(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+   dl_matrix2dq_t* filter_kernel, dl_matrix2dq_t* filter_bias,
+   dl_matrix2dq_t* gate_kernel, dl_matrix2dq_t* gate_bias,
+   int filter_shift, int gate_shift, int offset, int prenum);
+
+
+qtp_t *dl_dilation_layerq(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                          dl_matrix2dq_t* filter_kernel, dl_matrix2dq_t* filter_bias,
+                          dl_matrix2dq_t* gate_kernel, dl_matrix2dq_t* gate_bias,
+                          int filter_shift, int gate_shift, int prenum);
+
+qtp_t *dl_dilation_layerq16(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                             dl_matrix2dq_t* filter_kernel, dl_matrix2dq_t* filter_bias,
+                             dl_matrix2dq_t* gate_kernel, dl_matrix2dq_t* gate_bias, int prenum);
+
+
+qtp_t *dl_atrous_conv1dq_steps(dl_convq_queue_t *in, dl_convq_queue_t *out, int rate, int size,
+                                 dl_matrix2dq_t* kernel, dl_matrix2dq_t* bias, int shift, int offset, int prenum);
+
+/**
+ * @brief Add a pair of fixed-point convolution queue item-by-item, and return float-point convolution queue
+ *
+ * @param cq1      First fixed-point convolution queue
+ * @param cq2      Seconf fixed-point convolution queue
+ * @return         The result of float-point convolution queue
+ */
+dl_conv_queue_t *dl_convq_queue_add(dl_convq_queue_t *cq1, dl_convq_queue_t *cq2);
+
+/**
+ * @brief Fast implement of LSTM layer by dl_atrous_conv1dq function
+ *
+ * @Warning LSTM kernel is split into two part, the first part input is the last layer output, 
+ *           and kernel is parameter *in_weight*. The second part input is the last frame LSTM output,
+ *           the kernel is parameters *h_weight*.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param state_c         Internal state of the LSTM network
+ * @param state_h         Internal state (previous output values) of the LSTM network
+ * @param in_weight       the LSTM kernel needed by first part
+ * @param h_weight        the LSTM kernel needed by second part
+ * @param bias            The bias matrix of LSTM. Can be NULL if a bias of 0 is required.
+ * @in_shift              Shift ratio used in first part
+ * @h_shift               Shift ratio used in second part
+ * @return                The result of LSTM layer
+ */
+dl_matrix2dq_t *dl_convq_lstm_layer(const dl_convq_queue_t *in, dl_convq_queue_t *out, dl_matrix2dq_t *state_c,
+                                    dl_matrix2dq_t *state_h, const dl_matrix2dq_t *in_weight, const dl_matrix2dq_t *h_weight,
+                                    const dl_matrix2dq_t *bias, int in_shift, int h_shift, int prenum);
+dl_matrix2dq_t *dl_basic_lstm_layer1_q(const dl_convq_queue_t *in, dl_matrix2dq_t *state_c, dl_matrix2dq_t *state_h,
+                                       const dl_matrix2dq_t *weight, const dl_matrix2dq_t *bias, int step, int shift);
+
+dl_matrix2dq_t *dl_convq16_lstm_layer(const dl_convq_queue_t *in, dl_convq_queue_t *out, dl_matrix2dq_t *state_c,
+                                       dl_matrix2dq_t *state_h, const dl_matrix2dq_t *in_weight, const dl_matrix2dq_t *h_weight,
+                                       const dl_matrix2dq_t *bias, int prenum);
+
+/**
+ * @brief Allocate a fixed-point multi channel convolution queue 
+ *
+ * @param n     The length of queue
+ * @param c     The channel number of elements in the queue
+ * @param nch   the channel numbet of convolution queue 
+ * @return      The convolution queue, or NULL if out of memory
+ */
+dl_convq_queue_t **dl_convq_queue_mc_alloc(int n, int c, int nch);
+
+/**
+ * @brief Free a fixed-point multi channel convolution queue
+ *
+ * @param cqm     The fixed-point convolution queue to free
+ * @param nch     The channel number of cqm
+ */
+void dl_convq_queue_mc_free(dl_convq_queue_t **cqm, int nch);
+
+/**
+ * @brief Fast and quantised implement for 1D atrous convolution (a.k.a. convolution with holes or dilated convolution)
+ *        based on convolution queue.
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in       Input fixed-point convolution queue
+ * @param out      Output fixed-point convolution queue
+ * @param nch      The channel number of input 
+ * @param rate     A positive int, the stride with which we sample input value 
+ * @param size     A positive int, the size of 1D-filter
+ * @param kernel   The kernel matrix of filter
+ * @param bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param shift    Shift ratio used in dot operation between two 16-bit fixed point vector 
+ * @param offset   the offset to calculate input convq
+ * @param prenum   the preload size, 0: do not use preload function
+ * @return         The result of atrous convolution
+ */
+qtp_t *dl_atrous_conv1dq_mc_steps(  dl_convq_queue_t **in,
+                                    dl_convq_queue_t **out,
+									int nch,
+									int rate,
+									int size,
+                                    dl_matrix2dq_t* kernel,
+									dl_matrix2dq_t* bias,
+									int shift,
+									int offset,
+									int prenum);
+
+/**
+ * @brief Fast implement of dilation layer as follows for multi channel input
+ *
+ *               |-> [gate(sigmoid)] -|        
+ *      input -  |                    |-> (*) - output
+ *               |-> [filter(tanh)]  -|   
+ *
+ * @Warning All input and output convolution queue and matrix should be allocated. The return pointer
+ *          is last element of output queue and should not be freed separately.
+ *
+ * @param in              Input fixed-point convolution queue
+ * @param out             Output fixed-point convolution queue
+ * @param nch             The channel number of input 
+ * @param rate            A positive int, the stride with which we sample input value 
+ * @param size            A positive int, the size of 1D-filter
+ * @param filter_kernel   The kernel matrix of filter
+ * @param filter_bias     The bias matrix of filter. Can be NULL if a bias of 0 is required.
+ * @param gate_kernel     The kernel matrix of gate
+ * @param gate_bias       The bias matrix of gate. Can be NULL if a bias of 0 is required.
+ * @param filter_shift    Shift ratio used in filter operation between two 16-bit fixed point vector
+ * @param gate_shift      Shift ratio used in gate operation between two 16-bit fixed point vector
+ * @param offset          The offset to calculate input convq
+ * @param prenum          The preload size, 0: do not use preload function
+ * @return                The result of dilation layer
+ */
+qtp_t *dl_dilation_layerq_mc_steps( dl_convq_queue_t **in, 
+									dl_convq_queue_t **out,
+									int nch,
+									int rate,
+									int size,
+                                    dl_matrix2dq_t* filter_kernel,
+									dl_matrix2dq_t* filter_bias,
+                                    dl_matrix2dq_t* gate_kernel,
+									dl_matrix2dq_t* gate_bias,
+                                    int filter_shift,
+									int gate_shift,
+									int offset,
+									int prenum);
+
+void test_atrous_convq(int size, int rate, int in_channel, int out_channel);
+void test_lstm_convq(int size, int in_dim, int lstm_cell);
+void dl_nn_tanh_i162(dl_convq_queue_t **cqm, int offset, int nch);
+void dl_copy_queue_item_by_qmf(dl_convq_queue_t *cq, fptp_t* item, int m_bit, int f_bit, int offset, int ch);
+void dl_convq_queue_mc_bzero(dl_convq_queue_t **cqm, int nch);
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_matrix.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_matrix.h
new file mode 100644
index 00000000000..d046e2452f7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_matrix.h
@@ -0,0 +1,252 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_MATRIX_H
+#define DL_LIB_MATRIX_H
+
+#ifdef ESP_PLATFORM
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "esp_system.h"
+#endif
+
+// #ifdef CONFIG_IDF_TARGET_ESP32S3
+// #include "dl_tie728_bzero.h"
+// #endif
+
+typedef float fptp_t;
+
+#if CONFIG_BT_SHARE_MEM_REUSE
+extern multi_heap_handle_t gst_heap;
+#endif
+
+//Flags for matrices
+#define DL_MF_FOREIGNDATA (1<<0)  /*< Matrix *item data actually points to another matrix and should not be freed */
+
+//'Normal' float matrix
+typedef struct {
+    int w;          /*< Width */
+    int h;          /*< Height */
+    int stride;     /*< Row stride, essentially how many items to skip to get to the same position in the next row */
+    int flags;      /*< Flags. OR of DL_MF_* values */
+    fptp_t *item;   /*< Pointer to item array */
+} dl_matrix2d_t;
+
+//Macro to quickly access the raw items in a matrix
+#define DL_ITM(m, x, y) m->item[(x)+(y)*m->stride]
+
+
+/**
+ * @brief Allocate a matrix
+ *
+ * @param w     Width of the matrix
+ * @param h     Height of the matrix
+ * @return The matrix, or NULL if out of memory
+ */
+dl_matrix2d_t *dl_matrix_alloc(int w, int h);
+
+
+/**
+ * @brief Free a matrix
+ * Frees the matrix structure and (if it doesn't have the DL_MF_FOREIGNDATA flag set) the m->items space as well.
+ *
+ * @param m     Matrix to free
+ */
+void dl_matrix_free(dl_matrix2d_t *m);
+
+/**
+ * @brief Zero out the matrix
+ * Sets all entries in the matrix to 0.
+ *
+ * @param m     Matrix to zero
+ */
+void dl_matrix_zero(dl_matrix2d_t *m);
+
+/**
+ * @brief Copy the matrix into psram
+ * Copy the matrix from flash or iram/psram into psram
+ *
+ * @param m     Matrix to zero
+ */
+dl_matrix2d_t *dl_matrix_copy_to_psram(const dl_matrix2d_t *m);
+
+/**
+ * @brief Generate a new matrix using a range of items from an existing matrix.
+ * When using this, the data of the new matrix is not allocated/copied but it re-uses a pointer
+ * to the existing data. Changing the data in the resulting matrix, as a result, will also change
+ * the data in the existing matrix that has been sliced.
+ *
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix (with foreign data) to re-use. Passing NULL will allocate a new matrix.
+ * @return The resulting slice matrix, or NULL if out of memory
+ */
+dl_matrix2d_t *dl_matrix_slice(const dl_matrix2d_t *src, int x, int y, int w, int h, dl_matrix2d_t *in);
+
+/**
+ * @brief select a range of items from an existing matrix and flatten them into one dimension.
+ *
+ * @Warning The results are flattened in row-major order.
+ *   
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix to re-use. Passing NULL will allocate a new matrix.
+ * @return  The resulting flatten matrix, or NULL if out of memory
+ */
+dl_matrix2d_t *dl_matrix_flatten(const dl_matrix2d_t *src, int x, int y, int w, int h, dl_matrix2d_t *in);
+
+/**
+ * @brief Generate a matrix from existing floating-point data
+ *
+ * @param w     Width of resulting matrix
+ * @param h     Height of resulting matrix
+ * @param data  Data to populate matrix with
+ * @return A newaly allocated matrix populated with the given input data, or NULL if out of memory.
+ */
+dl_matrix2d_t *dl_matrix_from_data(int w, int h, int stride, const void *data);
+
+
+/**
+ * @brief Multiply a pair of matrices item-by-item: res=a*b
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Multiplicated data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_mul(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Do a dotproduct of two matrices : res=a.b
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrix_dot(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Add a pair of matrices item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Added data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_add(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Divide a pair of matrices item-by-item: res=a/b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Divided data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_div(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *out);
+
+/**
+ * @brief Subtract a matrix from another, item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Subtracted data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrix_sub(const dl_matrix2d_t *a, const dl_matrix2d_t *b, dl_matrix2d_t *out);
+
+/**
+ * @brief Add a constant to every item of the matrix
+ *
+ * @param subj  Matrix to add the constant to
+ * @param add   The constant
+ */
+void dl_matrix_add_const(dl_matrix2d_t *subj, const fptp_t add);
+
+
+/**
+ * @brief Concatenate the rows of two matrices into a new matrix
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @return A newly allocated array with as avlues a|b
+ */
+dl_matrix2d_t *dl_matrix_concat(const dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+dl_matrix2d_t *dl_matrix_concat_h( dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+/**
+ * @brief Print the contents of a matrix to stdout. Used for debugging.
+ *
+ * @param a     The matrix to print.
+ */
+void dl_printmatrix(const dl_matrix2d_t *a);
+
+/**
+ * @brief Return the average square error given a correct and a test matrix.
+ *
+ * ...Well, more or less. If anything, it gives an indication of the error between
+ * the two. Check the code for the exact implementation.
+ *
+ * @param a     First of the two matrices to compare
+ * @param b     Second of the two matrices to compare
+ * @return value indicating the relative difference between matrices
+ */
+float dl_matrix_get_avg_sq_err(const dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+
+
+/**
+ * @brief Check if two matrices have the same shape, that is, the same amount of rows and columns
+ *
+ * @param a     First of the two matrices to compare
+ * @param b     Second of the two matrices to compare
+ * @return true if the two matrices are shaped the same, false otherwise.
+ */
+int dl_matrix_same_shape(const dl_matrix2d_t *a, const dl_matrix2d_t *b);
+
+
+/**
+ * @brief Get a specific item from the matrix
+ *
+ * Please use these for external matrix access instead of DL_ITM
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @return Value in that position
+ */
+inline static fptp_t dl_matrix_get(const dl_matrix2d_t *m, const int x, const int y) { 
+    return DL_ITM(m, x, y);
+}
+
+/**
+ * @brief Set a specific item in the matrix to the given value
+ *
+ * Please use these for external matrix access instead of DL_ITM
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @param val   Value to write to that position
+ */
+inline static void dl_matrix_set(dl_matrix2d_t *m, const int x, const int y, fptp_t val) { 
+    DL_ITM(m, x, y)=val;
+}
+
+void matrix_get_range(const dl_matrix2d_t *m, fptp_t *rmin, fptp_t *rmax);
+
+#endif
+
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_matrixq.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_matrixq.h
new file mode 100644
index 00000000000..5f0474a08fd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_matrixq.h
@@ -0,0 +1,378 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_MATRIXQ_H
+#define DL_LIB_MATRIXQ_H
+
+#include <stdint.h>
+#include "dl_lib_matrix.h"
+
+typedef int16_t qtp_t;
+
+//Quantized matrix. Uses fixed numbers and has the storage for the rows/columns inverted 
+//for easy use as a multiplicand without stressing out the flash cache too much.
+typedef struct {
+    int w;
+    int h;
+    int stride; //Normally equals h, not w!
+    int flags;
+    int exponent; //The values in items should be multiplied by pow(2,exponent) to get the real values.
+    qtp_t *itemq;
+} dl_matrix2dq_t;
+
+#define DL_QTP_SHIFT 15
+#define DL_QTP_RANGE ((1<<DL_QTP_SHIFT)-1)
+#define DL_ITMQ(m, x, y) m->itemq[(y)+(x)*m->stride]
+#define DL_QTP_EXP_NA 255 //non-applicable exponent because matrix is null
+
+#define DL_SHIFT_AUTO 32
+
+/**
+ * @info About quantized matrices and shift values
+ *
+ * Grab a coffee (or tea, or hot water)  and sit down when you read this for the first 
+ * time. Quantized matrices can speed up your operations, but come with some quirks, and
+ * it's good to understand how they work before using them.
+ *
+ * The data in the quantized matrix type is stored similarily to floating-point types:
+ * when storing a real value, the value is stored as a mantissa (base number) and an
+ * exponent. The 'real' value that can be re-derived from those two numbers is something
+ * similar to mantissa*2^exponent. Up to this point, there's not that much difference from 
+ * the standard floating point implementations like e.g. IEEE-754.
+ *
+ * The difference with respect to quantized matrices is that for a quantized matrix, it is 
+ * assumed all values stored have more-or-less the same order of magnitude. This allows the
+ * matrix to only store all the mantissas, while the exponents are shared; there is only one 
+ * exponent for the entire matrix. This makes it quicker to handle matrix operations - the
+ * logic to fix the exponents only needs to happen once, while the rest can be done in simple
+ * integer arithmetic. It also nets us some memory savings - while normally a floating point
+ * number is 32-bit, storing only 16-bit mantissas as the matrix items almost halves the 
+ * memory requirements.
+ *
+ * While most of the details of handling the intricacies of the quantized matrixes are done
+ * transparently by the code in dl_lib_matrixq.c, some implementation details leak out, 
+ * specifically in places where addition/subtraction/division happens.
+ *
+ * The problem is that the routines do not know what the size of the resulting operation is. For
+ * instance, when adding two matrices of numbers, the resulting numbers *could* be large enough
+ * to overflow the mantissa of the result if the exponent is the same. However, if by default we
+ * assume the mantissas needs to be scaled back, we may lose precision.
+ *
+ * In order to counter this, all operations that have this issue have a ``shift`` argument. If 
+ * the argument is zero, the routine will be conservative, that is, increase the exponent of 
+ * the result to such an extent it's mathematically impossible a value in the result will exceed
+ * the maximum value that can be stored. However, when this argument is larger than zero, the
+ * algorithm will hold back on this scaling by the indicated amount of bits, preserving precision
+ * but increasing the chance of some of the calculated values not fitting in the mantissa anymore.
+ * If this happens, the value will be clipped to the largest (or, for negative values, smallest)
+ * value possible. (Neural networks usually are okay with this happening for a limited amount
+ * of matrix indices).
+ *
+ * For deciding on these shift values, it is recommended to start with a shift value of one, then
+ * use dl_matrixq_check_sanity on the result. If this indicates clipping, lower the shift value. 
+ * If it indicates bits are under-used, increase it. Note that for adding and subtraction, only
+ * shift values of 0 or 1 make sense; these routines will error out if you try to do something
+ * else.
+ *
+ * For neural networks and other noise-tolerant applications, note that even when 
+ * dl_matrixq_check_sanity does not indicate any problems, twiddling with the shift value may lead
+ * to slightly improved precision. Feel free to experiment.
+ **/
+
+
+/**
+ * @brief Allocate a matrix
+ *
+ * @param w     Width of the matrix
+ * @param h     Height of the matrix
+ * @return The matrix, or NULL if out of memory
+ */
+dl_matrix2dq_t *dl_matrixq_alloc(int w, int h);
+dl_matrix2dq_t *dl_matrixq_alloc_psram(int w, int h);
+/**
+ * @brief Convert a floating-point matrix to a quantized matrix
+ *
+ * @param m     Floating-point matrix to convert
+ * @param out   Quantized matrix to re-use. If NULL, allocate a new one.
+ * @Return The quantized version of the floating-point matrix
+ */
+dl_matrix2dq_t *dl_matrixq_from_matrix2d(const dl_matrix2d_t *m, dl_matrix2dq_t *out);
+
+/**
+ * TODO: DESCRIBE THIS FUNCTION
+ */
+dl_matrix2dq_t *dl_matrixq_from_matrix2d_by_qmf(const dl_matrix2d_t *m, dl_matrix2dq_t *out, int m_bit, int f_bit);
+
+
+/**
+ * @brief Convert a quantized matrix to a floating-point one.
+ *
+ * @param m     Floating-point matrix to convert
+ * @param out   Quantized matrix to re-use. If NULL, allocate a new one.
+ * @Return The quantized version of the floating-point matrix
+ **/
+dl_matrix2d_t *dl_matrix2d_from_matrixq(const dl_matrix2dq_t *m, dl_matrix2d_t *out);
+
+
+/**
+ * @brief Free a quantized matrix
+ * Frees the matrix structure and (if it doesn't have the DL_MF_FOREIGNDATA flag set) the m->items space as well.
+ *
+ * @param m     Matrix to free
+ */
+void dl_matrixq_free(dl_matrix2dq_t *m);
+
+/**
+ * @brief Zero out the matrix
+ * Sets all entries in the matrix to 0.
+ *
+ * @param m     Matrix to zero
+ */
+void dl_matrixq_zero(dl_matrix2dq_t *m);
+
+/**
+ * @brief Copy the matrix into psram
+ * Copy the matrix from flash or iram/psram into psram
+ *
+ * @param m     Matrix to copy
+ */
+dl_matrix2dq_t *dl_matrixq_copy_to_psram(const dl_matrix2dq_t *m);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices : res=a.b, Result is a fixed-point matrix.
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ * @param shift Shift ratio
+ */
+void dl_matrixq_dot(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices: res=a.b, Result is a floating-point matrix.
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrixq_dot_matrix_out(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices : res=a.b. This always uses the simple & stupid C algo for the dot product.
+ *
+ * Result is a fixed-point matrix. 
+ *
+ * Use this only if you expect something is wrong with the accelerated routines that dl_matrixq_dot calls; this function can be
+ * much slower than dl_matrixq_dot .
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ * @param shift Shift ratio
+ */
+void dl_matrixq_dot_c_impl(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Do a dotproduct of two quantized matrices : res=a.b. This always uses the simple & stupid C algo for the dot product. 
+ *
+ * Result is a floating-point matrix. 
+ *
+ * Use this only if you expect something is wrong with the accelerated routines that dl_matrixq_dot_matrix_out calls; this function can be
+ * much slower than dl_matrixq_dot_matrix_out.
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Dotproduct data. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrixq_dot_matrix_out_c_impl(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2d_t *res);
+
+/**
+ * @brief Do a dotproduct of a floating point and a quantized matrix. Result is a floating-point matrix.
+ *
+ * @param a     First multiplicand; float matrix
+ * @param b     Second multiplicand; quantized matrix
+ * @param res   Dotproduct data; float matrix. *Must* be a *different* matrix from a or b!
+ */
+void dl_matrix_matrixq_dot(const dl_matrix2d_t *a, const dl_matrix2dq_t *b, dl_matrix2d_t *res);
+
+
+/**
+ * @brief Print the contents of a quantized matrix to stdout. Used for debugging.
+ *
+ * @param a     The matrix to print.
+ */
+void dl_printmatrixq(const dl_matrix2dq_t *a);
+
+
+/**
+ * @brief Add a pair of quantizedmatrices item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Added data. Can be equal to a or b to overwrite that.
+ * @param shift Shift value. Only 0 or 1 makes sense here. <ToDo: check>
+ */
+void dl_matrixq_add(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Generate a new matrix using a range of items from an existing matrix.
+ * When using this, the data of the new matrix is not allocated/copied but it re-uses a pointer
+ * to the existing data. Changing the data in the resulting matrix, as a result, will also change
+ * the data in the existing matrix that has been sliced.
+ *
+ * @Warning In contrast to the floating point equivalent of this function, the fixed-point version
+ * of this has the issue that as soon as the output exponent of one of the slices changes, the data
+ * in the sliced matrix gets corrupted (because the exponent of that matrix is still the same.) If you
+ * use this function, either treat the slices as read-only, or assume the sliced matrix contains
+ * garbage after modifying the data in one of the slices.
+ *
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix (with foreign data) to re-use. Passing NULL will allocate a new matrix.
+ * @return The resulting slice matrix, or NULL if out of memory
+ */
+dl_matrix2dq_t *dl_matrixq_slice(const dl_matrix2dq_t *src, int x, int y, int w, int h, dl_matrix2dq_t *in);
+
+/**
+ * @brief select a range of items from an existing matrix and flatten them into one dimension.
+ *
+ * @Warning The results are flattened in row-major order.
+ *   
+ * @param x     X-offset of the origin of the returned matrix within the sliced matrix
+ * @param y     Y-offset of the origin of the returned matrix within the sliced matrix
+ * @param w     Width of the resulting matrix
+ * @param h     Height of the resulting matrix
+ * @param in    Old matrix to re-use. Passing NULL will allocate a new matrix.
+ * @return The resulting flatten matrix, or NULL if out of memory
+ */
+dl_matrix2dq_t *dl_matrixq_flatten(const dl_matrix2dq_t *src, int x, int y, int w, int h, dl_matrix2dq_t *in);
+
+/**
+ * @brief Subtract a quantized matrix from another, item-by-item: res=a-b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Subtracted data. Can be equal to a or b to overwrite that.
+ * @param shift Shift value. Only 0 or 1 makes sense here. <ToDo: check>
+ */
+void dl_matrixq_sub(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *res, int shift);
+
+/**
+ * @brief Multiply a pair of quantized matrices item-by-item: res=a*b
+ *
+ * @param a     First multiplicand
+ * @param b     Second multiplicand
+ * @param res   Multiplicated data. Can be equal to a or b to overwrite that matrix.
+ */
+void dl_matrixq_mul( dl_matrix2dq_t *a,  dl_matrix2dq_t *b, dl_matrix2dq_t *res);
+
+/**
+ * @brief Divide a pair of quantized matrices item-by-item: res=a/b
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @param res   Divided data. Can be equal to a or b to overwrite that.
+ */
+void dl_matrixq_div(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b, dl_matrix2dq_t *out, int shift);
+
+/**
+ * @brief Check if two quantized matrices have the same shape, that is, the same amount of 
+ * rows and columns
+ *
+ * @param a     First of the two matrices to compare
+ * @param b     Second of the two matrices to compare
+ * @return true if the two matrices are shaped the same, false otherwise.
+ */
+int dl_matrixq_same_shape(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b);
+
+/**
+ * @brief Concatenate the rows of two quantized matrices into a new matrix
+ *
+ * @param a     First matrix
+ * @param b     Second matrix
+ * @return A newly allocated quantized matrix with as values a|b
+ */
+dl_matrix2dq_t *dl_matrixq_concat(const dl_matrix2dq_t *a, const dl_matrix2dq_t *b);
+
+/**
+ * @brief Add a constant to every item of the quantized matrix
+ *
+ * @param subj  Matrix to add the constant to
+ * @param add   The constant
+ */
+void dl_matrixq_add_const(dl_matrix2dq_t *subj, const fptp_t add, int shift);
+
+/**
+ * @brief Check the sanity of a quantized matrix
+ *
+ * Due to the nature of quantized matrices, depending on the calculations a quantized
+ * matrix is the result of and the shift values chosen in those calculations, a quantized
+ * matrix may have an exponent and mantissas that lead to a loss of precision, either because
+ * most significant mantissa bits are unused, or because a fair amount of mantissas are 
+ * clipped. This function checks if this is the case and will report a message to stdout
+ * if significant loss of precision is detected.
+ *
+ * @param m     The quantized matrix to check
+ * @param name  A string to be displayed in the message if the sanity check fails
+ * @return True if matrix is sane, false otherwise
+ **/
+
+int dl_matrixq_check_sanity(dl_matrix2dq_t *m, const char *name);
+
+/**
+ * @brief re-adjust the exponent of the matrix to fit the mantissa better
+ *
+ * This function will shift up all the data in the mantissas so there are no
+ * most-significant bits that are unused in all mantissas. It will also adjust
+ * the exponent to keep the actua values in the matrix the same.
+ *
+ * Some operations done on a matrix, especially operations that re-use the
+ * result of earlier operations done in the same way, can lead to the loss of
+ * data because the exponent of the quantized matrix is never re-adjusted. You
+ * can do that implicitely by calling this function.
+ *
+ * @param m     The matrix to re-adjust
+**/
+void dl_matrixq_readjust_exp(dl_matrix2dq_t *m);
+
+
+
+/**
+ * @brief Get the floating-point value of a specific item from the quantized matrix
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @return Value in that position
+ */
+fptp_t dl_matrixq_get(const dl_matrix2dq_t *m, const int x, const int y);
+
+/**
+ * @brief Set a specific item in the quantized matrix to the given 
+ * floating-point value
+ *
+ * @warning If the given value is more than the exponent in the quantized matrix
+ * allows for, all mantissas in the matrix will be shifted down to make the value
+ * 'fit'. If, however, the exponent is such that the value would result in a
+ * quantized mantissa of 0, nothing is done.
+ *
+ * @param m     Matrix to access
+ * @param x     Column address
+ * @param y     Row address
+ * @param val   Value to write to that position
+ */
+void dl_matrixq_set(dl_matrix2dq_t *m, const int x, const int y, fptp_t val);
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_matrixq8.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_matrixq8.h
new file mode 100644
index 00000000000..579b1c08aaf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/dl_lib_matrixq8.h
@@ -0,0 +1,71 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef DL_LIB_MATRIXQ8_H
+#define DL_LIB_MATRIXQ8_H
+
+#include <stdint.h>
+#include "dl_lib_matrix.h"
+#include "dl_lib.h"
+#include "dl_lib_matrixq.h"
+
+typedef int8_t q8tp_t;
+
+typedef struct {
+    int w;
+    int h;
+    int stride; //Normally equals h, not w!
+    int flags;
+    int exponent; //The values in items should be multiplied by pow(2,exponent) to get the real values.
+    q8tp_t *itemq;
+} dl_matrix2dq8_t;
+
+#define DL_Q8TP_SHIFT 7
+#define DL_Q8TP_RANGE ((1<<DL_Q8TP_SHIFT)-1)
+#define DL_ITMQ8(m, x, y) m->itemq[(y)+(x)*m->stride]
+
+/**
+ * @brief Allocate a matrix
+ *
+ * @param w     Width of the matrix
+ * @param h     Height of the matrix
+ * @return The matrix, or NULL if out of memory
+ */
+dl_matrix2dq8_t *dl_matrixq8_alloc(int w, int h);
+
+/**
+ * @brief Free a quantized matrix
+ * Frees the matrix structure and (if it doesn't have the DL_MF_FOREIGNDATA flag set) the m->items space as well.
+ *
+ * @param m     Matrix to free
+ */
+void dl_matrixq8_free(dl_matrix2dq8_t *m);
+
+/**
+ * @brief Copy a quantized matrix
+ * Copy a quantized matrix from flash or iram/psram
+ *
+ * @param m     Matrix to copy
+ */
+dl_matrix2dq8_t *dl_matrixq8_copy_to_psram(const dl_matrix2dq8_t *m);
+
+/**
+ * @brief Convert a floating-point matrix to a quantized matrix
+ *
+ * @param m     Floating-point matrix to convert
+ * @param out   Quantized matrix to re-use. If NULL, allocate a new one.
+ * @Return The quantized version of the floating-point matrix
+ */
+dl_matrix2dq8_t *dl_matrixq8_from_matrix2d(const dl_matrix2d_t *m, dl_matrix2dq8_t *out);
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_aec.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_aec.h
new file mode 100644
index 00000000000..03afc90ff04
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_aec.h
@@ -0,0 +1,112 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_AEC_H_
+#define _ESP_AEC_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define USE_AEC_FFT                      // Not kiss_fft
+#define AEC_USE_SPIRAM      0
+#define AEC_SAMPLE_RATE     16000        // Only Support 16000Hz
+#define AEC_FRAME_LENGTH_MS 16
+#define AEC_FILTER_LENGTH   1200         // Number of samples of echo to cancel
+
+typedef void* aec_handle_t;
+
+/**
+ * @brief Creates an instance to the AEC structure.
+ * 
+ * @deprecated This API will be deprecated after version 1.0, please use aec_pro_create
+ *
+ * @param sample_rate       The Sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_length      The length of the audio processing must be 16ms.
+ *
+ * @param filter_length     Number of samples of echo to cancel.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of AEC
+ */
+aec_handle_t aec_create(int sample_rate, int frame_length, int filter_length);
+
+/**
+ * @brief Creates an instance to the AEC structure.
+ * 
+ * @deprecated This API will be deprecated after version 1.0, please use aec_pro_create
+ *
+ * @param sample_rate       The Sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_length      The length of the audio processing must be 16ms.
+ *
+ * @param filter_length     Number of samples of echo to cancel.
+ * 
+ * @param nch               Number of input signal channel.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of AEC
+ */
+aec_handle_t aec_create_multimic(int sample_rate, int frame_length, int filter_length, int nch);
+
+/**
+ * @brief Creates an instance of more powerful AEC.
+ *
+ * @param frame_length      Length of input signal. Must be 16ms if mode is 0; otherwise could be 16ms or 32ms. Length of input signal to aec_process must be modified accordingly.
+ *
+ * @param nch               Number of microphones.
+ *
+ * @param mode              Mode of AEC (0 to 5), indicating aggressiveness and RAM allocation. 0: mild; 1 or 2: medium (1: internal RAM, 2: SPIRAM); 3 and 4: aggressive (3: internal RAM, 4: SPIRAM); 5: agressive, accelerated for ESP32-S3.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: An Instance of AEC
+ */
+aec_handle_t aec_pro_create(int frame_length, int nch, int mode);
+
+/**
+ * @brief Performs echo cancellation a frame, based on the audio sent to the speaker and frame from mic.
+ *
+ * @param inst        The instance of AEC.
+ *
+ * @param indata      An array of 16-bit signed audio samples from mic.
+ *
+ * @param refdata     An array of 16-bit signed audio samples sent to the speaker.
+ *
+ * @param outdata     Returns near-end signal with echo removed.
+ *
+ * @return None
+ *
+ */
+void aec_process(const aec_handle_t inst, int16_t *indata, int16_t *refdata, int16_t *outdata);
+
+/**
+ * @brief Free the AEC instance
+ *
+ * @param inst The instance of AEC.
+ *
+ * @return None
+ *
+ */
+void aec_destroy(aec_handle_t inst);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_AEC_H_
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_afe_sr_iface.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_afe_sr_iface.h
new file mode 100644
index 00000000000..73f60c3c11f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_afe_sr_iface.h
@@ -0,0 +1,245 @@
+#pragma once
+#include "stdint.h"
+#include "esp_wn_iface.h"
+#include "esp_wn_models.h"
+
+//AFE: Audio Front-End 
+//SR:  Speech Recognition
+//afe_sr/AFE_SR: the audio front-end for speech recognition
+
+//Opaque AFE_SR data container
+typedef struct esp_afe_sr_data_t esp_afe_sr_data_t;
+
+//Set AFE_SR mode
+typedef enum {
+    SR_MODE_LOW_COST = 0,
+    SR_MODE_HIGH_PERF = 1
+} afe_sr_mode_t;
+
+// the output state of fetch function
+typedef enum {
+    AFE_FETCH_CHANNEL_VERIFIED = -2,  // wwe state: output channel is verified
+    AFE_FETCH_NOISE = -1,             // vad state: noise or silence
+    AFE_FETCH_SPEECH = 0,             // vad state: speech
+    AFE_FETCH_WWE_DETECTED = 1        // wwe state: wake word is detected
+} afe_fetch_mode_t;
+
+typedef enum {
+    AFE_PSRAM_LOW_COST = 1,
+    AFE_PSRAM_MEDIA_COST = 2,
+    AFE_PSRAM_HIGH_COST = 3
+} afe_use_psram_mode_t;
+
+typedef struct {
+    bool aec_init;
+    bool se_init;
+    bool vad_init;
+    bool wakenet_init;
+    int vad_mode;
+    const esp_wn_iface_t *wakenet_model;
+    const model_coeff_getter_t *wakenet_coeff;
+    det_mode_t wakenet_mode;
+    afe_sr_mode_t afe_mode;
+    int afe_perferred_core;
+    int afe_perferred_priority;
+    int afe_ringbuf_size;
+    int alloc_from_psram;
+    int agc_mode;
+} afe_config_t;
+
+
+#if CONFIG_IDF_TARGET_ESP32
+#define AFE_CONFIG_DEFAULT() { \
+    .aec_init = true, \
+    .se_init = true, \
+    .vad_init = true, \
+    .wakenet_init = true, \
+    .vad_mode = 3, \
+    .wakenet_model = &WAKENET_MODEL, \
+    .wakenet_coeff = &WAKENET_COEFF, \
+    .wakenet_mode = DET_MODE_90, \
+    .afe_mode = SR_MODE_HIGH_PERF, \
+    .afe_perferred_core = 0, \
+    .afe_perferred_priority = 5, \
+    .afe_ringbuf_size = 50, \
+    .alloc_from_psram = 1, \
+    .agc_mode = 2, \
+}
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define AFE_CONFIG_DEFAULT() { \
+    .aec_init = true, \
+    .se_init = true, \
+    .vad_init = true, \
+    .wakenet_init = true, \
+    .vad_mode = 3, \
+    .wakenet_model = &WAKENET_MODEL, \
+    .wakenet_coeff = &WAKENET_COEFF, \
+    .wakenet_mode = DET_MODE_2CH_90, \
+    .afe_mode = SR_MODE_LOW_COST, \
+    .afe_perferred_core = 0, \
+    .afe_perferred_priority = 5, \
+    .afe_ringbuf_size = 50, \
+    .alloc_from_psram = AFE_PSRAM_MEDIA_COST, \
+    .agc_mode = 2, \
+}
+#endif
+/**
+ * @brief Function to initialze a AFE_SR instance with a specified mode
+ * 
+ * @param mode              The mode of AFE_SR 
+ * @param perferred_core    The perferred core to be pinned. 
+ *                          If all task in AFE_SR can not run in real time by only one core, the another core would be used. 
+ * @returns Handle to the AFE_SR data
+ */
+typedef esp_afe_sr_data_t* (*esp_afe_sr_iface_op_create_t)(afe_sr_mode_t mode, int perferred_cor);
+
+/**
+ * @brief Function to initialze a AFE_SR instance
+ * 
+ * @param afe_config        The config of AFE_SR
+ * @returns Handle to the AFE_SR data
+ */
+typedef esp_afe_sr_data_t* (*esp_afe_sr_iface_op_create_from_config_t)(afe_config_t *afe_config);
+
+/**
+ * @brief Get the amount of each channel samples per frame that need to be passed to the function
+ *
+ * Every speech enhancement AFE_SR processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param afe The AFE_SR object to query
+ * @return The amount of samples to feed the fetch function
+ */
+typedef int (*esp_afe_sr_iface_op_get_samp_chunksize_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Get the channel number of samples that need to be passed to the fetch function
+ * 
+ * @param afe The AFE_SR object to query
+ * @return The amount of samples to feed the fetch function
+ */
+typedef int (*esp_afe_sr_iface_op_get_channel_num_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Get the sample rate of the samples to feed to the function
+ *
+ * @param afe The AFE_SR object to query
+ * @return The sample rate, in hz
+ */
+typedef int (*esp_afe_sr_iface_op_get_samp_rate_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Feed samples of an audio stream to the AFE_SR
+ *
+ * @Warning  The input data should be arranged in the format of [CH0_0, CH1_0, ..., CHN_0, CH0_1, CH1_1, ..., CHN_1, ...].
+ *           The last channel is reference signal or far-end signal.
+ *
+ * @param afe   The AFE_SR object to queryq
+ * 
+ * @param in    The input microphone signal, only support signed 16-bit @ 16 KHZ. The frame size can be queried by the 
+ *              `get_samp_chunksize`. The channel number can be queried `get_channel_num`.
+ * @return      The size of input
+ */
+typedef int (*esp_afe_sr_iface_op_feed_t)(esp_afe_sr_data_t *afe, const int16_t* in);
+
+/**
+ * @brief fetch enhanced samples of an audio stream from the AFE_SR
+ *
+ * @Warning  The output is single channel data, no matter how many channels the input is.
+ *
+ * @param afe   The AFE_SR object to query
+ * @param out   The output enhanced signal. The frame size can be queried by the `get_samp_chunksize`.
+ * @return      The state of output, please refer to the definition of `afe_fetch_mode_t`
+ */
+typedef afe_fetch_mode_t (*esp_afe_sr_iface_op_fetch_t)(esp_afe_sr_data_t *afe, int16_t* out);
+
+/**
+ * @brief Initial wakenet and wake words coefficient, or reset wakenet and wake words coefficient 
+ *        when wakenet has been initialized.  
+ *
+ * @param afe          The AFE_SR object to query
+ * @param wakenet      The pointer of wakenet
+ * @param model_coeff  The coefficient of wake word model
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_set_wakenet_t)(esp_afe_sr_data_t *afe,
+                                                  esp_wn_iface_t *wakenet, 
+                                                  const model_coeff_getter_t *model_coeff);
+
+/**
+ * @brief Disable wakenet model.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_disable_wakenet_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Enable wakenet model.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_enable_wakenet_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Disable AEC algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_disable_aec_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Enable AEC algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_enable_aec_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Disable SE algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_disable_se_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Enable SE algorithm.
+ *
+ * @param afe          The AFE_SR object to query
+ * @return             0: fail, 1: success
+ */
+typedef int (*esp_afe_sr_iface_op_enable_se_t)(esp_afe_sr_data_t *afe);
+
+/**
+ * @brief Destroy a AFE_SR instance
+ *
+ * @param afe         AFE_SR object to destroy
+ */
+typedef void (*esp_afe_sr_iface_op_destroy_t)(esp_afe_sr_data_t *afe);
+
+
+/**
+ * This structure contains the functions used to do operations on a AFE_SR.
+ */
+typedef struct {
+    esp_afe_sr_iface_op_create_t create;
+    esp_afe_sr_iface_op_create_from_config_t create_from_config;
+    esp_afe_sr_iface_op_feed_t feed;
+    esp_afe_sr_iface_op_fetch_t fetch;
+    esp_afe_sr_iface_op_get_samp_chunksize_t get_feed_chunksize;
+    esp_afe_sr_iface_op_get_samp_chunksize_t get_fetch_chunksize;
+    esp_afe_sr_iface_op_get_channel_num_t get_channel_num;
+    esp_afe_sr_iface_op_get_samp_rate_t get_samp_rate;
+    esp_afe_sr_iface_op_set_wakenet_t  set_wakenet; 
+    esp_afe_sr_iface_op_disable_wakenet_t disable_wakenet;
+    esp_afe_sr_iface_op_enable_wakenet_t enable_wakenet;
+    esp_afe_sr_iface_op_disable_aec_t disable_aec;
+    esp_afe_sr_iface_op_enable_aec_t enable_aec;
+    esp_afe_sr_iface_op_disable_se_t disable_se;
+    esp_afe_sr_iface_op_enable_se_t enable_se;
+    esp_afe_sr_iface_op_destroy_t destroy;
+} esp_afe_sr_iface_t;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_afe_sr_models.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_afe_sr_models.h
new file mode 100644
index 00000000000..5424134ab1e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_afe_sr_models.h
@@ -0,0 +1,6 @@
+#pragma once
+#include "esp_afe_sr_iface.h"
+
+extern const esp_afe_sr_iface_t esp_afe_sr_2mic;
+extern const esp_afe_sr_iface_t esp_afe_sr_1mic;
+
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_agc.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_agc.h
new file mode 100644
index 00000000000..20b0e3f2259
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_agc.h
@@ -0,0 +1,39 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_AGC_H_
+#define _ESP_AGC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+////all positive value is valid, negective is error
+typedef enum {
+    ESP_AGC_SUCCESS = 0,   ////success
+    ESP_AGC_FAIL = -1, ////agc fail
+    ESP_AGC_SAMPLE_RATE_ERROR = -2,  ///sample rate can be only 8khz, 16khz, 32khz
+    ESP_AGC_FRAME_SIZE_ERROR = -3,   ////the input frame size should be only 10ms, so should together with sample-rate to get the frame size
+} ESP_AGE_ERR;
+
+
+void *esp_agc_open(int agc_mode, int sample_rate);
+void set_agc_config(void *agc_handle, int gain_dB, int limiter_enable, int target_level_dbfs);
+int esp_agc_process(void *agc_handle, short *in_pcm, short *out_pcm, int frame_size, int sample_rate);
+void esp_agc_close(void *agc_handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_AGC_H_
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_map.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_map.h
new file mode 100644
index 00000000000..794afdc54c8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_map.h
@@ -0,0 +1,90 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_MAP_H_
+#define _ESP_MAP_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MAP_SAMPLE_RATE 16000        // Supports 16kHz only
+#define MAP_FRAME_SIZE 16            // Supports 16ms only
+#define MAP_MIC_DISTANCE 50          // According to physical design of mic-array
+#define MAP_AEC_ON true              
+#define MAP_AEC_OFF false            
+#define MAP_AEC_FILTER_LENGTH   1200 // Number of samples of echo to cancel
+
+/**
+ * @brief Sets mic-array type, currently 2-mic line array and 3-mic circular array 
+ * are supported.
+ */
+typedef enum {
+    TWO_MIC_LINE = 0,
+    THREE_MIC_CIRCLE = 1
+} map_mic_array_type_t;
+
+typedef void* mic_array_processor_t;
+
+/**
+ * @brief Creates an instance to the MAP structure.
+ *
+ * @param sample_rate       The sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_size        The length of the audio processing must be 16ms.
+ *
+ * @param array_type        '0' for 2-mic line array and '1' for 3-mic circular array.
+ *
+ * @param mic_distance      The distance between neiboring microphones in mm.
+ * 
+ * @param aec_on            Decides whether to turn on AEC.
+ *
+ * @param filter_length     Number of samples of echo to cancel, effective when AEC is on.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: An instance of MAP
+ */
+mic_array_processor_t map_create(int fs, int frame_size, int array_type, float mic_distance, bool aec_on, int filter_length);
+
+/**
+ * @brief Performs mic array processing for one frame.
+ *
+ * @param inst        The instance of MAP.
+ *
+ * @param in          An array of 16-bit signed audio samples from mic.
+ *
+ * @param far_end     An array of 16-bit signed audio samples sent to the speaker, can be none when AEC is turned off.
+ *
+ * @param dsp_out     Returns enhanced signal.
+ *
+ * @return None
+ *
+ */
+void map_process(mic_array_processor_t st, int16_t *in, int16_t *far_end, int16_t *dsp_out);
+
+/**
+ * @brief Free the MAP instance
+ *
+ * @param inst The instance of MAP.
+ *
+ * @return None
+ *
+ */
+void map_destory(mic_array_processor_t st);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_mase.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_mase.h
new file mode 100644
index 00000000000..3cf403f5646
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_mase.h
@@ -0,0 +1,94 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+
+#ifndef _ESP_MASE_H_
+#define _ESP_MASE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MASE_SAMPLE_RATE 16000        // Supports 16kHz only
+#define MASE_FRAME_SIZE 16            // Supports 16ms only
+#define MASE_MIC_DISTANCE 65          // According to physical design of mic-array
+
+/**
+ * @brief Sets mic-array type, currently 2-mic line array and 3-mic circular array 
+ * are supported.
+ */
+typedef enum {
+    TWO_MIC_LINE = 0,
+    THREE_MIC_CIRCLE = 1
+} mase_mic_array_type_t;
+
+/**
+ * @brief Sets operating mode, supporting normal mode and wake-up enhancement mode
+ */
+typedef enum {
+    NORMAL_ENHANCEMENT_MODE = 0,
+    WAKE_UP_ENHANCEMENT_MODE = 1
+} mase_op_mode_t;
+
+typedef void* mase_handle_t;
+
+/**
+ * @brief Creates an instance to the MASE structure.
+ *
+ * @param sample_rate       The sampling frequency (Hz) must be 16000.
+ *
+ * @param frame_size        The length of the audio processing must be 16ms.
+ *
+ * @param array_type        '0' for 2-mic line array and '1' for 3-mic circular array.
+ *
+ * @param mic_distance      The distance between neiboring microphones in mm.
+ *
+ * @param operating_mode	'0' for normal mode and '1' for wake-up enhanced mode.
+ *
+ * @param filter_strength	Strengh of the mic-array speech enhancement, must be 0, 1, 2 or 3.
+ * 
+ * @return
+ *         - NULL: Create failed
+ *         - Others: An instance of MASE
+ */
+mase_handle_t mase_create(int fs, int frame_size, int array_type, float mic_distance, int operating_mode, int filter_strength);
+
+/**
+ * @brief Performs mic array processing for one frame.
+ *
+ * @param inst        The instance of MASE.
+ *
+ * @param in          An array of 16-bit signed audio samples from mic.
+ *
+ * @param dsp_out     Returns enhanced signal.
+ *
+ * @return None
+ *
+ */
+void mase_process(mase_handle_t st, int16_t *in, int16_t *dsp_out);
+
+/**
+ * @brief Free the MASE instance
+ *
+ * @param inst The instance of MASE.
+ *
+ * @return None
+ *
+ */
+void mase_destory(mase_handle_t st);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_mn_iface.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_mn_iface.h
new file mode 100644
index 00000000000..79fa9572930
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_mn_iface.h
@@ -0,0 +1,139 @@
+#pragma once
+#include "stdint.h"
+// #include "esp_err.h"
+#include "dl_lib_coefgetter_if.h"
+#include "esp_wn_iface.h"
+// //Opaque model data container
+// typedef struct model_iface_data_t model_iface_data_t;
+
+/**
+ * @brief Initialze a model instance with specified model coefficient.
+ *
+ * @param coeff       The wakenet model coefficient.
+ * @param coeff        The wakenet model coefficient.
+ * @parm sample_length Audio length for speech recognition, in ms.
+ * @returns Handle to the model data.
+ */
+typedef model_iface_data_t* (*esp_mn_iface_op_create_t)(const model_coeff_getter_t *coeff, int sample_length);
+
+
+/**
+ * @brief Callback function type to fetch the amount of samples that need to be passed to the detect function
+ *
+ * Every speech recognition model processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param model       The model object to query
+ * @return The amount of samples to feed the detect function
+ */
+typedef int (*esp_mn_iface_op_get_samp_chunksize_t)(model_iface_data_t *model);
+
+/**
+ * @brief Callback function type to fetch the number of frames recognized by the command word
+ *
+ * @param model       The model object to query
+ * @return The number of the frames recognized by the command word
+ */
+typedef int (*esp_mn_iface_op_get_samp_chunknum_t)(model_iface_data_t *model);
+
+/**
+ * @brief Set the detection threshold to manually abjust the probability 
+ *
+ * @param model The model object to query
+ * @param det_treshold The threshold to trigger speech commands, the range of det_threshold is 0.0~0.9999
+ */
+typedef int (*esp_mn_iface_op_set_det_threshold_t)(model_iface_data_t *model, float det_threshold);
+/**
+ * @brief Set the detection threshold to manually abjust the probability 
+ *
+ * @param model The model object to query
+ * @param phrase_id The ID of speech command phrase
+ * @param det_treshold The threshold to trigger speech command phrases
+ */
+typedef void (*esp_mn_iface_op_set_command_det_threshold_t)(model_iface_data_t *model, int phrase_id, float det_threshold);
+
+/**
+ * @brief Get the detection threshold by phrase ID 
+ *
+ * @param model The model object to query
+ * @param phrase_id The ID of speech command phrase
+ * 
+ * @return The threshold of speech command phrases
+ */
+typedef float (*esp_mn_iface_op_get_command_det_threshold_t)(model_iface_data_t *model, int phrase_id);
+
+/**
+ * @brief Get the sample rate of the samples to feed to the detect function
+ *
+ * @param model       The model object to query
+ * @return The sample rate, in hz
+ */
+typedef int (*esp_mn_iface_op_get_samp_rate_t)(model_iface_data_t *model);
+
+/**
+ * @brief Feed samples of an audio stream to the speech recognition model and detect if there is a speech command found.
+ *
+ * @param model       The model object to query.
+ * @param samples     An array of 16-bit signed audio samples. The array size used can be queried by the 
+ *                    get_samp_chunksize function.
+ * @return The command id, return 0 if no command word is detected,
+ */
+typedef int (*esp_mn_iface_op_detect_t)(model_iface_data_t *model, int16_t *samples);
+
+/**
+ * @brief Get the phrase if command word is detected
+ *
+ * @param model       The model object to query.
+ * 
+ * @return The phrase id, return the phrase if command word is detected.
+ */
+typedef int (*esp_mn_iface_op_get_det_phrase_id_t)(model_iface_data_t *model);
+
+/**
+ * @brief Destroy a speech commands recognition model
+ *
+ * @param model       The Model object to destroy
+ */
+typedef void (*esp_mn_iface_op_destroy_t)(model_iface_data_t *model);
+
+/**
+ * @brief Reset the speech commands
+ *
+ * @param model_data       The model object to query.
+ * @param command_str      The string of new commands.
+ * @param err_phrase_id    Wrong phrase ID string.
+ *
+ */
+typedef void (*esp_mn_iface_op_reset_t)(model_iface_data_t *model_data, char *command_str, char *err_phrase_id);
+
+/**
+ * @brief Reset the speech commands recognition model
+ *
+ * @param model_data       The model object to query.
+ *
+ */
+typedef void (*esp_mn_iface_op_wakenet_reset_t)(model_iface_data_t *model_data);
+
+/**
+ * @brief Close the log print
+ *
+ * @param model_data       The model object to query.
+ *
+ */
+typedef void (*esp_mn_iface_op_close_log_t)(model_iface_data_t *model_data);
+
+typedef struct {
+    esp_mn_iface_op_create_t create;
+    esp_mn_iface_op_get_samp_rate_t get_samp_rate;
+    esp_mn_iface_op_get_samp_chunksize_t get_samp_chunksize;
+    esp_mn_iface_op_get_samp_chunknum_t get_samp_chunknum;
+    esp_mn_iface_op_set_det_threshold_t set_det_threshold;
+    esp_mn_iface_op_set_command_det_threshold_t set_command_det_threshold;
+    esp_mn_iface_op_get_command_det_threshold_t get_command_det_threshold;
+    esp_mn_iface_op_get_det_phrase_id_t get_det_phrase_id;
+    esp_mn_iface_op_detect_t detect; 
+    esp_mn_iface_op_destroy_t destroy;
+    esp_mn_iface_op_reset_t reset;
+    esp_mn_iface_op_wakenet_reset_t wakenet_reset;
+    esp_mn_iface_op_close_log_t close_log;
+} esp_mn_iface_t;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_mn_models.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_mn_models.h
new file mode 100644
index 00000000000..2ead4d494d7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_mn_models.h
@@ -0,0 +1,80 @@
+#pragma once
+#include "esp_mn_iface.h"
+
+//Contains declarations of all available speech recognion models. Pair this up with the right coefficients and you have a model that can recognize
+//a specific phrase or word.
+extern const esp_mn_iface_t esp_sr_multinet1_single_quantized_en;
+extern const esp_mn_iface_t esp_sr_multinet3_single_quantized_en;
+extern const esp_mn_iface_t esp_sr_multinet2_single_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet3_single_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet4_single_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet3_continuous_quantized_cn;
+extern const esp_mn_iface_t esp_sr_multinet5_quantized;
+extern const esp_mn_iface_t esp_sr_multinet5_quantized8;
+
+/*
+ Configure wake word to use based on what's selected in menuconfig.
+*/
+#if defined CONFIG_USE_MULTINET
+#ifdef CONFIG_SR_MN_EN_MULTINET1_SINGLE_RECOGNITION
+#include "multinet1_en.h"
+#define MULTINET_MODEL esp_sr_multinet1_single_quantized_en
+#define MULTINET_COEFF get_coeff_multinet1_en
+#elif CONFIG_SR_MN_EN_MULTINET3_SINGLE_RECOGNITION
+#include "multinet3_en.h"
+#define MULTINET_MODEL esp_sr_multinet3_single_quantized_en
+#define MULTINET_COEFF get_coeff_multinet3_en
+#elif CONFIG_SR_MN_CN_MULTINET2_SINGLE_RECOGNITION
+#include "multinet2_ch.h"
+#define MULTINET_MODEL esp_sr_multinet2_single_quantized_cn
+#define MULTINET_COEFF get_coeff_multinet2_ch
+#elif CONFIG_SR_MN_CN_MULTINET2_CONTINUOUS_RECOGNITION
+
+#elif CONFIG_SR_MN_CN_MULTINET3_SINGLE_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet3_single_quantized_cn
+#define MULTINET_COEFF "mn3cn"
+#elif CONFIG_SR_MN_CN_MULTINET4_SINGLE_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet4_single_quantized_cn
+#define MULTINET_COEFF "mn4cn"
+#elif CONFIG_SR_MN_CN_MULTINET3_CONTINUOUS_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet3_continuous_quantized_cn
+#define MULTINET_COEFF "mn3cn"
+#elif CONFIG_SR_MN_CN_MULTINET4_5_SINGLE_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet4_single_quantized_cn
+#define MULTINET_COEFF "mn4_5cn"
+#elif CONFIG_SR_MN_EN_MULTINET5_SINGLE_RECOGNITION
+#define MULTINET_MODEL esp_sr_multinet5_quantized
+#define MULTINET_COEFF "mn5en"
+#elif CONFIG_SR_MN_EN_MULTINET5_SINGLE_RECOGNITION_QUANT8
+#define MULTINET_MODEL esp_sr_multinet5_quantized8
+#define MULTINET_COEFF "mn5q8en"
+#else
+#error No valid wake word selected.
+#endif
+#else
+#define MULTINET_MODEL "NULL"
+#define MULTINET_COEFF "NULL"
+#endif
+/* example
+
+static const esp_mn_iface_t *multinet = &MULTINET_MODEL;
+
+//Initialize MultiNet model data
+model_iface_data_t *model_data = multinet->create(&MULTINET_COEFF);
+add_speech_commands(multinet, model_data);
+
+//Set parameters of buffer
+int audio_chunksize=model->get_samp_chunksize(model_data);
+int frequency = model->get_samp_rate(model_data);
+int16_t *buffer=malloc(audio_chunksize*sizeof(int16_t));
+
+//Detect
+int r=model->detect(model_data, buffer);
+if (r>0) {
+    printf("Detection triggered output %d.\n",  r);
+}
+
+//Destroy model
+model->destroy(model_data)
+
+*/
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_ns.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_ns.h
new file mode 100644
index 00000000000..1932600b72f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_ns.h
@@ -0,0 +1,85 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_NS_H_
+#define _ESP_NS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define NS_USE_SPIARM       0
+#define NS_FRAME_LENGTH_MS     10          //Supports 10ms, 20ms, 30ms
+
+/**
+* The Sampling frequency (Hz) must be 16000Hz
+*/
+
+typedef void* ns_handle_t;
+
+/**
+ * @brief Creates an instance to the NS structure.
+ *
+ * @param frame_length   The length of the audio processing can be 10ms, 20ms, 30ms.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of NS
+ */
+ns_handle_t ns_create(int frame_length);
+
+/**
+ * @brief Creates an instance of the more powerful noise suppression algorithm.
+ * 
+ * @warning frame_length only supports be 10 ms.
+ *
+ * @param frame_length    The length of the audio processing can only be 10ms.
+ * @param mode            0: Mild, 1: Medium, 2: Aggressive  
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of NS
+ */
+ns_handle_t ns_pro_create(int frame_length, int mode);
+
+/**
+ * @brief Feed samples of an audio stream to the NS and get the audio stream after Noise suppression.
+ *
+ * @param inst        The instance of NS.
+ *
+ * @param indata      An array of 16-bit signed audio samples.
+ *
+ * @param outdata     An array of 16-bit signed audio samples after noise suppression.
+ *
+ * @return None
+ *
+ */
+void ns_process(ns_handle_t inst, int16_t *indata, int16_t *outdata);
+
+/**
+ * @brief Free the NS instance
+ *
+ * @param inst The instance of NS.
+ *
+ * @return None
+ *
+ */
+void ns_destroy(ns_handle_t inst);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_NS_H_
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_vad.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_vad.h
new file mode 100644
index 00000000000..e1a76cf4072
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_vad.h
@@ -0,0 +1,104 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+#ifndef _ESP_VAD_H_
+#define _ESP_VAD_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SAMPLE_RATE_HZ 16000      //Supports 32000, 16000, 8000
+#define VAD_FRAME_LENGTH_MS 30    //Supports 10ms, 20ms, 30ms
+
+/**
+ * @brief Sets the VAD operating mode. A more aggressive (higher mode) VAD is more
+ * restrictive in reporting speech.
+ */
+typedef enum {
+    VAD_MODE_0 = 0,
+    VAD_MODE_1,
+    VAD_MODE_2,
+    VAD_MODE_3,
+    VAD_MODE_4
+} vad_mode_t;
+
+typedef enum {
+    VAD_SILENCE = 0,
+    VAD_SPEECH
+} vad_state_t;
+
+typedef void* vad_handle_t;
+
+/**
+ * @brief Creates an instance to the VAD structure.
+ *
+ * @param vad_mode          Sets the VAD operating mode.
+ *
+ * @param sample_rate_hz    The Sampling frequency (Hz) can be 32000, 16000, 8000, default: 16000.
+ *
+ * @param one_frame_ms      The length of the audio processing can be 10ms, 20ms, 30ms, default: 30.
+ *
+ * @return
+ *         - NULL: Create failed
+ *         - Others: The instance of VAD
+ */
+vad_handle_t vad_create(vad_mode_t vad_mode, int sample_rate_hz, int one_frame_ms);
+
+/**
+ * @brief Feed samples of an audio stream to the VAD and check if there is someone speaking.
+ *
+ * @param inst      The instance of VAD.
+ *
+ * @param data      An array of 16-bit signed audio samples.
+ *
+ * @return
+ *         - VAD_SILENCE if no voice
+ *         - VAD_SPEECH  if voice is detected
+ *
+ */
+vad_state_t vad_process(vad_handle_t inst, int16_t *data);
+
+/**
+ * @brief Free the VAD instance
+ *
+ * @param inst The instance of VAD.
+ *
+ * @return None
+ *
+ */
+void vad_destroy(vad_handle_t inst);
+
+/*
+* Programming Guide:
+*
+* @code{c}
+* vad_handle_t vad_inst = vad_create(VAD_MODE_3, SAMPLE_RATE_HZ, VAD_FRAME_LENGTH_MS);     // Creates an instance to the VAD structure.
+*
+* while (1) {
+*    //Use buffer to receive the audio data from MIC.
+*    vad_state_t vad_state = vad_process(vad_inst, buffer);      // Feed samples to the VAD process and get the result.
+* }
+*
+* vad_destroy(vad_inst);   // Free the VAD instance at the end of whole VAD process
+*
+* @endcode
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_VAD_H_
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_wn_iface.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_wn_iface.h
new file mode 100644
index 00000000000..6843af19d5d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_wn_iface.h
@@ -0,0 +1,164 @@
+#pragma once
+#include "stdint.h"
+#include "dl_lib_coefgetter_if.h"
+
+//Opaque model data container
+typedef struct model_iface_data_t model_iface_data_t;
+
+//Set wake words recognition operating mode
+//The probability of being wake words is increased with increasing mode, 
+//As a consequence also the false alarm rate goes up
+typedef enum {
+	DET_MODE_90 = 0,       // Normal
+	DET_MODE_95 = 1,       // Aggressive
+    DET_MODE_2CH_90 = 2,
+    DET_MODE_2CH_95 = 3,
+    DET_MODE_3CH_90 = 4,
+    DET_MODE_3CH_95 = 5,
+} det_mode_t;
+
+typedef struct {
+    int wake_word_num;     //The number of all wake words
+    char **wake_word_list; //The name list of wake words  
+} wake_word_info_t;
+
+/**
+ * @brief Easy function type to initialze a model instance with a detection mode and specified wake word coefficient
+ *
+ * @param det_mode    The wake words detection mode to trigger wake words, DET_MODE_90 or DET_MODE_95
+ * @param model_coeff The specified wake word model coefficient
+ * @returns Handle to the model data
+ */
+typedef model_iface_data_t* (*esp_wn_iface_op_create_t)(const model_coeff_getter_t *model_coeff, det_mode_t det_mode);
+
+/**
+ * @brief Callback function type to fetch the amount of samples that need to be passed to the detect function
+ *
+ * Every speech recognition model processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param model The model object to query
+ * @return The amount of samples to feed the detect function
+ */
+typedef int (*esp_wn_iface_op_get_samp_chunksize_t)(model_iface_data_t *model);
+
+/**
+ * @brief Callback function type to fetch the channel number of samples that need to be passed to the detect function
+ *
+ * Every speech recognition model processes a certain number of samples at the same time. This function
+ * can be used to query that amount. Note that the returned amount is in 16-bit samples, not in bytes.
+ *
+ * @param model The model object to query
+ * @return The amount of samples to feed the detect function
+ */
+typedef int (*esp_wn_iface_op_get_channel_num_t)(model_iface_data_t *model);
+
+
+/**
+ * @brief Get the sample rate of the samples to feed to the detect function
+ *
+ * @param model The model object to query
+ * @return The sample rate, in hz
+ */
+typedef int (*esp_wn_iface_op_get_samp_rate_t)(model_iface_data_t *model);
+
+/**
+ * @brief Get the number of wake words
+ *
+ * @param model The model object to query
+ * @returns the number of wake words
+ */
+typedef int (*esp_wn_iface_op_get_word_num_t)(model_iface_data_t *model);
+
+/**
+ * @brief Get the name of wake word by index
+ *
+ * @Warning The index of wake word start with 1
+
+ * @param model The model object to query
+ * @param word_index The index of wake word
+ * @returns the detection threshold
+ */
+typedef char* (*esp_wn_iface_op_get_word_name_t)(model_iface_data_t *model, int word_index);
+
+/**
+ * @brief Set the detection threshold to manually abjust the probability 
+ *
+ * @param model The model object to query
+ * @param det_treshold The threshold to trigger wake words, the range of det_threshold is 0.5~0.9999
+ * @param word_index The index of wake word
+ * @return 0: setting failed, 1: setting success
+ */
+typedef int (*esp_wn_iface_op_set_det_threshold_t)(model_iface_data_t *model, float det_threshold, int word_index);
+
+/**
+ * @brief Get the wake word detection threshold of different modes
+ *
+ * @param model The model object to query
+ * @param word_index The index of wake word
+ * @returns the detection threshold
+ */
+typedef float (*esp_wn_iface_op_get_det_threshold_t)(model_iface_data_t *model, int word_index);
+
+/**
+ * @brief Feed samples of an audio stream to the keyword detection model and detect if there is a keyword found.
+ *
+ * @Warning The index of wake word start with 1, 0 means no wake words is detected.
+ *
+ * @param model The model object to query
+ * @param samples An array of 16-bit signed audio samples. The array size used can be queried by the 
+ *        get_samp_chunksize function.
+ * @return The index of wake words, return 0 if no wake word is detected, else the index of the wake words.
+ */
+typedef int (*esp_wn_iface_op_detect_t)(model_iface_data_t *model, int16_t *samples);
+
+/**
+ * @brief Get the volume gain
+ *
+ * @param model The model object to query
+ * @param target_db  The target dB to calculate volume gain
+ * @returns the volume gain
+ */
+typedef float (*esp_wn_iface_op_get_vol_gain_t)(model_iface_data_t *model, float target_db);
+
+/**
+ * @brief Get the triggered channel index. Channel index starts from zero
+ *
+ * @param model The model object to query
+ * @return The channel index
+ */
+typedef int (*esp_wn_iface_op_get_triggered_channel_t)(model_iface_data_t *model);
+
+/**
+ * @brief Clean all states of model
+ *
+ * @param model The model object to query
+ */
+typedef void (*esp_wn_iface_op_clean_t)(model_iface_data_t *model);
+
+/**
+ * @brief Destroy a speech recognition model
+ *
+ * @param model Model object to destroy
+ */
+typedef void (*esp_wn_iface_op_destroy_t)(model_iface_data_t *model);
+
+
+/**
+ * This structure contains the functions used to do operations on a wake word detection model.
+ */
+typedef struct {
+    esp_wn_iface_op_create_t create;
+    esp_wn_iface_op_get_samp_chunksize_t get_samp_chunksize;
+    esp_wn_iface_op_get_channel_num_t get_channel_num;
+    esp_wn_iface_op_get_samp_rate_t get_samp_rate;
+    esp_wn_iface_op_get_word_num_t get_word_num;
+    esp_wn_iface_op_get_word_name_t get_word_name;
+    esp_wn_iface_op_set_det_threshold_t set_det_threshold;
+    esp_wn_iface_op_get_det_threshold_t get_det_threshold;
+    esp_wn_iface_op_get_triggered_channel_t  get_triggered_channel;
+    esp_wn_iface_op_get_vol_gain_t get_vol_gain;
+    esp_wn_iface_op_detect_t detect;
+    esp_wn_iface_op_clean_t clean;
+    esp_wn_iface_op_destroy_t destroy;
+} esp_wn_iface_t;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_wn_models.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_wn_models.h
new file mode 100644
index 00000000000..225456fc728
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/esp_wn_models.h
@@ -0,0 +1,127 @@
+#pragma once
+#include "esp_wn_iface.h"
+
+//Contains declarations of all available speech recognion models. Pair this up with the right coefficients and you have a model that can recognize
+//a specific phrase or word.
+
+extern const esp_wn_iface_t esp_sr_wakenet5_quantized;
+extern const esp_wn_iface_t esp_sr_wakenet7_quantized;
+extern const esp_wn_iface_t esp_sr_wakenet7_quantized8;
+extern const esp_wn_iface_t esp_sr_wakenet8_quantized;
+extern const esp_wn_iface_t esp_sr_wakenet8_quantized8;
+/*
+ Configure network to use based on what's selected in menuconfig.
+*/
+#if defined CONFIG_USE_WAKENET
+#if CONFIG_SR_WN_MODEL_WN5_QUANT
+#define WAKENET_MODEL esp_sr_wakenet5_quantized
+#elif CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_MODEL esp_sr_wakenet7_quantized
+#elif CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_MODEL esp_sr_wakenet7_quantized8
+#elif CONFIG_SR_WN_MODEL_WN8_QUANT
+#define WAKENET_MODEL esp_sr_wakenet8_quantized
+#elif CONFIG_SR_WN_MODEL_WN8_QUANT8
+#define WAKENET_MODEL esp_sr_wakenet8_quantized8
+#else
+#error No valid neural network model selected.
+#endif
+
+/*
+ Configure wake word to use based on what's selected in menuconfig.
+*/
+#if CONFIG_SR_WN_WN5_HILEXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hilexin_wn5.h"
+#define WAKENET_COEFF get_coeff_hilexin_wn5
+
+#elif CONFIG_SR_WN_WN5X2_HILEXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hilexin_wn5X2.h"
+#define WAKENET_COEFF get_coeff_hilexin_wn5X2
+
+#elif CONFIG_SR_WN_WN5X3_HILEXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hilexin_wn5X3.h"
+#define WAKENET_COEFF get_coeff_hilexin_wn5X3
+
+#elif CONFIG_SR_WN_WN5_NIHAOXIAOZHI & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaozhi_wn5.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaozhi_wn5
+
+#elif CONFIG_SR_WN_WN5X2_NIHAOXIAOZHI & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaozhi_wn5X2.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaozhi_wn5X2
+
+#elif CONFIG_SR_WN_WN5X3_NIHAOXIAOZHI & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaozhi_wn5X3.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaozhi_wn5X3
+
+#elif CONFIG_SR_WN_WN5X3_NIHAOXIAOXIN & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "nihaoxiaoxin_wn5X3.h"
+#define WAKENET_COEFF get_coeff_nihaoxiaoxin_wn5X3
+
+#elif CONFIG_SR_WN_WN5X3_HIJESON & CONFIG_SR_WN_MODEL_WN5_QUANT
+#include "hijeson_wn5X3.h"
+#define WAKENET_COEFF get_coeff_hijeson_wn5X3
+
+#elif CONFIG_SR_WN_WN5_CUSTOMIZED_WORD
+#include "customized_word_wn5.h"
+#define WAKENET_COEFF get_coeff_customized_word_wn5
+
+#elif CONFIG_SR_WN_WN7_CUSTOMIZED_WORD
+#define WAKENET_COEFF "custom7"
+
+#elif CONFIG_SR_WN_WN7_XIAOAITONGXUE & CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_COEFF "xiaoaitongxue7"
+
+#elif CONFIG_SR_WN_WN7_XIAOAITONGXUE & CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_COEFF "xiaoaitongxue7q8"
+
+#elif CONFIG_SR_WN_WN7_HILEXIN & CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_COEFF "hilexin7"
+
+#elif CONFIG_SR_WN_WN7_HILEXIN & CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_COEFF "hilexin7q8"
+
+#elif CONFIG_SR_WN_WN7_ALEXA & CONFIG_SR_WN_MODEL_WN7_QUANT
+#define WAKENET_COEFF "alexa7"
+
+#elif CONFIG_SR_WN_WN8_ALEXA & CONFIG_SR_WN_MODEL_WN8_QUANT
+#define WAKENET_COEFF "alexa8"
+
+#elif CONFIG_SR_WN_WN7_ALEXA & CONFIG_SR_WN_MODEL_WN7_QUANT8
+#define WAKENET_COEFF "alexa7q8"
+
+#elif CONFIG_SR_WN_WN8_HIESP & CONFIG_SR_WN_MODEL_WN8_QUANT
+#define WAKENET_COEFF "hiesp8"
+
+#elif CONFIG_SR_WN_WN8_HIESP & CONFIG_SR_WN_MODEL_WN8_QUANT8
+#define WAKENET_COEFF "hiesp8q8"
+
+#else
+#error No valid wake word selected.
+#endif
+#else
+#define WAKENET_MODEL "NULL"
+#define WAKENET_COEFF "NULL"
+#endif
+/* example
+
+static const sr_model_iface_t *model = &WAKENET_MODEL;
+
+//Initialize wakeNet model data
+static model_iface_data_t *model_data=model->create(DET_MODE_90);
+
+//Set parameters of buffer
+int audio_chunksize=model->get_samp_chunksize(model_data);
+int frequency = model->get_samp_rate(model_data);
+int16_t *buffer=malloc(audio_chunksize*sizeof(int16_t));
+
+//Detect
+int r=model->detect(model_data, buffer);
+if (r>0) {
+    printf("Detection triggered output %d.\n",  r);
+}
+
+//Destroy model
+model->destroy(model_data)
+
+*/
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hijeson_wn5X3.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hijeson_wn5X3.h
new file mode 100644
index 00000000000..c2e343880ed
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hijeson_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hijeson_wn5X3;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hilexin_wn5.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hilexin_wn5.h
new file mode 100644
index 00000000000..d922a6aaed4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hilexin_wn5.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hilexin_wn5;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hilexin_wn5X2.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hilexin_wn5X2.h
new file mode 100644
index 00000000000..5ca6bbca5ba
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hilexin_wn5X2.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hilexin_wn5X2;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hilexin_wn5X3.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hilexin_wn5X3.h
new file mode 100644
index 00000000000..c78a64d2b77
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/hilexin_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_hilexin_wn5X3;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/mn_process_commands.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/mn_process_commands.h
new file mode 100644
index 00000000000..692137a3b78
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/mn_process_commands.h
@@ -0,0 +1,408 @@
+#pragma once
+#include "esp_mn_iface.h"
+#define SPEECH_COMMANDS_NUM 99
+#if CONFIG_SR_MN_CHINESE
+#define MN_SPEECH_COMMAND_ID0   CONFIG_CN_SPEECH_COMMAND_ID0
+#define MN_SPEECH_COMMAND_ID1   CONFIG_CN_SPEECH_COMMAND_ID1
+#define MN_SPEECH_COMMAND_ID2   CONFIG_CN_SPEECH_COMMAND_ID2
+#define MN_SPEECH_COMMAND_ID3   CONFIG_CN_SPEECH_COMMAND_ID3
+#define MN_SPEECH_COMMAND_ID4   CONFIG_CN_SPEECH_COMMAND_ID4
+#define MN_SPEECH_COMMAND_ID5   CONFIG_CN_SPEECH_COMMAND_ID5
+#define MN_SPEECH_COMMAND_ID6   CONFIG_CN_SPEECH_COMMAND_ID6
+#define MN_SPEECH_COMMAND_ID7   CONFIG_CN_SPEECH_COMMAND_ID7
+#define MN_SPEECH_COMMAND_ID8   CONFIG_CN_SPEECH_COMMAND_ID8
+#define MN_SPEECH_COMMAND_ID9   CONFIG_CN_SPEECH_COMMAND_ID9
+#define MN_SPEECH_COMMAND_ID10   CONFIG_CN_SPEECH_COMMAND_ID10
+#define MN_SPEECH_COMMAND_ID11   CONFIG_CN_SPEECH_COMMAND_ID11
+#define MN_SPEECH_COMMAND_ID12   CONFIG_CN_SPEECH_COMMAND_ID12
+#define MN_SPEECH_COMMAND_ID13   CONFIG_CN_SPEECH_COMMAND_ID13
+#define MN_SPEECH_COMMAND_ID14   CONFIG_CN_SPEECH_COMMAND_ID14
+#define MN_SPEECH_COMMAND_ID15   CONFIG_CN_SPEECH_COMMAND_ID15
+#define MN_SPEECH_COMMAND_ID16   CONFIG_CN_SPEECH_COMMAND_ID16
+#define MN_SPEECH_COMMAND_ID17   CONFIG_CN_SPEECH_COMMAND_ID17
+#define MN_SPEECH_COMMAND_ID18   CONFIG_CN_SPEECH_COMMAND_ID18
+#define MN_SPEECH_COMMAND_ID19   CONFIG_CN_SPEECH_COMMAND_ID19
+#define MN_SPEECH_COMMAND_ID20   CONFIG_CN_SPEECH_COMMAND_ID20
+#define MN_SPEECH_COMMAND_ID21   CONFIG_CN_SPEECH_COMMAND_ID21
+#define MN_SPEECH_COMMAND_ID22   CONFIG_CN_SPEECH_COMMAND_ID22
+#define MN_SPEECH_COMMAND_ID23   CONFIG_CN_SPEECH_COMMAND_ID23
+#define MN_SPEECH_COMMAND_ID24   CONFIG_CN_SPEECH_COMMAND_ID24
+#define MN_SPEECH_COMMAND_ID25   CONFIG_CN_SPEECH_COMMAND_ID25
+#define MN_SPEECH_COMMAND_ID26   CONFIG_CN_SPEECH_COMMAND_ID26
+#define MN_SPEECH_COMMAND_ID27   CONFIG_CN_SPEECH_COMMAND_ID27
+#define MN_SPEECH_COMMAND_ID28   CONFIG_CN_SPEECH_COMMAND_ID28
+#define MN_SPEECH_COMMAND_ID29   CONFIG_CN_SPEECH_COMMAND_ID29
+#define MN_SPEECH_COMMAND_ID30   CONFIG_CN_SPEECH_COMMAND_ID30
+#define MN_SPEECH_COMMAND_ID31   CONFIG_CN_SPEECH_COMMAND_ID31
+#define MN_SPEECH_COMMAND_ID32   CONFIG_CN_SPEECH_COMMAND_ID32
+#define MN_SPEECH_COMMAND_ID33   CONFIG_CN_SPEECH_COMMAND_ID33
+#define MN_SPEECH_COMMAND_ID34   CONFIG_CN_SPEECH_COMMAND_ID34
+#define MN_SPEECH_COMMAND_ID35   CONFIG_CN_SPEECH_COMMAND_ID35
+#define MN_SPEECH_COMMAND_ID36   CONFIG_CN_SPEECH_COMMAND_ID36
+#define MN_SPEECH_COMMAND_ID37   CONFIG_CN_SPEECH_COMMAND_ID37
+#define MN_SPEECH_COMMAND_ID38   CONFIG_CN_SPEECH_COMMAND_ID38
+#define MN_SPEECH_COMMAND_ID39   CONFIG_CN_SPEECH_COMMAND_ID39
+#define MN_SPEECH_COMMAND_ID40   CONFIG_CN_SPEECH_COMMAND_ID40
+#define MN_SPEECH_COMMAND_ID41   CONFIG_CN_SPEECH_COMMAND_ID41
+#define MN_SPEECH_COMMAND_ID42   CONFIG_CN_SPEECH_COMMAND_ID42
+#define MN_SPEECH_COMMAND_ID43   CONFIG_CN_SPEECH_COMMAND_ID43
+#define MN_SPEECH_COMMAND_ID44   CONFIG_CN_SPEECH_COMMAND_ID44
+#define MN_SPEECH_COMMAND_ID45   CONFIG_CN_SPEECH_COMMAND_ID45
+#define MN_SPEECH_COMMAND_ID46   CONFIG_CN_SPEECH_COMMAND_ID46
+#define MN_SPEECH_COMMAND_ID47   CONFIG_CN_SPEECH_COMMAND_ID47
+#define MN_SPEECH_COMMAND_ID48   CONFIG_CN_SPEECH_COMMAND_ID48
+#define MN_SPEECH_COMMAND_ID49   CONFIG_CN_SPEECH_COMMAND_ID49
+#define MN_SPEECH_COMMAND_ID50   CONFIG_CN_SPEECH_COMMAND_ID50
+#define MN_SPEECH_COMMAND_ID51   CONFIG_CN_SPEECH_COMMAND_ID51
+#define MN_SPEECH_COMMAND_ID52   CONFIG_CN_SPEECH_COMMAND_ID52
+#define MN_SPEECH_COMMAND_ID53   CONFIG_CN_SPEECH_COMMAND_ID53
+#define MN_SPEECH_COMMAND_ID54   CONFIG_CN_SPEECH_COMMAND_ID54
+#define MN_SPEECH_COMMAND_ID55   CONFIG_CN_SPEECH_COMMAND_ID55
+#define MN_SPEECH_COMMAND_ID56   CONFIG_CN_SPEECH_COMMAND_ID56
+#define MN_SPEECH_COMMAND_ID57   CONFIG_CN_SPEECH_COMMAND_ID57
+#define MN_SPEECH_COMMAND_ID58   CONFIG_CN_SPEECH_COMMAND_ID58
+#define MN_SPEECH_COMMAND_ID59   CONFIG_CN_SPEECH_COMMAND_ID59
+#define MN_SPEECH_COMMAND_ID60   CONFIG_CN_SPEECH_COMMAND_ID60
+#define MN_SPEECH_COMMAND_ID61   CONFIG_CN_SPEECH_COMMAND_ID61
+#define MN_SPEECH_COMMAND_ID62   CONFIG_CN_SPEECH_COMMAND_ID62
+#define MN_SPEECH_COMMAND_ID63   CONFIG_CN_SPEECH_COMMAND_ID63
+#define MN_SPEECH_COMMAND_ID64   CONFIG_CN_SPEECH_COMMAND_ID64
+#define MN_SPEECH_COMMAND_ID65   CONFIG_CN_SPEECH_COMMAND_ID65
+#define MN_SPEECH_COMMAND_ID66   CONFIG_CN_SPEECH_COMMAND_ID66
+#define MN_SPEECH_COMMAND_ID67   CONFIG_CN_SPEECH_COMMAND_ID67
+#define MN_SPEECH_COMMAND_ID68   CONFIG_CN_SPEECH_COMMAND_ID68
+#define MN_SPEECH_COMMAND_ID69   CONFIG_CN_SPEECH_COMMAND_ID69
+#define MN_SPEECH_COMMAND_ID70   CONFIG_CN_SPEECH_COMMAND_ID70
+#define MN_SPEECH_COMMAND_ID71   CONFIG_CN_SPEECH_COMMAND_ID71
+#define MN_SPEECH_COMMAND_ID72   CONFIG_CN_SPEECH_COMMAND_ID72
+#define MN_SPEECH_COMMAND_ID73   CONFIG_CN_SPEECH_COMMAND_ID73
+#define MN_SPEECH_COMMAND_ID74   CONFIG_CN_SPEECH_COMMAND_ID74
+#define MN_SPEECH_COMMAND_ID75   CONFIG_CN_SPEECH_COMMAND_ID75
+#define MN_SPEECH_COMMAND_ID76   CONFIG_CN_SPEECH_COMMAND_ID76
+#define MN_SPEECH_COMMAND_ID77   CONFIG_CN_SPEECH_COMMAND_ID77
+#define MN_SPEECH_COMMAND_ID78   CONFIG_CN_SPEECH_COMMAND_ID78
+#define MN_SPEECH_COMMAND_ID79   CONFIG_CN_SPEECH_COMMAND_ID79
+#define MN_SPEECH_COMMAND_ID80   CONFIG_CN_SPEECH_COMMAND_ID80
+#define MN_SPEECH_COMMAND_ID81   CONFIG_CN_SPEECH_COMMAND_ID81
+#define MN_SPEECH_COMMAND_ID82   CONFIG_CN_SPEECH_COMMAND_ID82
+#define MN_SPEECH_COMMAND_ID83   CONFIG_CN_SPEECH_COMMAND_ID83
+#define MN_SPEECH_COMMAND_ID84   CONFIG_CN_SPEECH_COMMAND_ID84
+#define MN_SPEECH_COMMAND_ID85   CONFIG_CN_SPEECH_COMMAND_ID85
+#define MN_SPEECH_COMMAND_ID86   CONFIG_CN_SPEECH_COMMAND_ID86
+#define MN_SPEECH_COMMAND_ID87   CONFIG_CN_SPEECH_COMMAND_ID87
+#define MN_SPEECH_COMMAND_ID88   CONFIG_CN_SPEECH_COMMAND_ID88
+#define MN_SPEECH_COMMAND_ID89   CONFIG_CN_SPEECH_COMMAND_ID89
+#define MN_SPEECH_COMMAND_ID90   CONFIG_CN_SPEECH_COMMAND_ID90
+#define MN_SPEECH_COMMAND_ID91   CONFIG_CN_SPEECH_COMMAND_ID91
+#define MN_SPEECH_COMMAND_ID92   CONFIG_CN_SPEECH_COMMAND_ID92
+#define MN_SPEECH_COMMAND_ID93   CONFIG_CN_SPEECH_COMMAND_ID93
+#define MN_SPEECH_COMMAND_ID94   CONFIG_CN_SPEECH_COMMAND_ID94
+#define MN_SPEECH_COMMAND_ID95   CONFIG_CN_SPEECH_COMMAND_ID95
+#define MN_SPEECH_COMMAND_ID96   CONFIG_CN_SPEECH_COMMAND_ID96
+#define MN_SPEECH_COMMAND_ID97   CONFIG_CN_SPEECH_COMMAND_ID97
+#define MN_SPEECH_COMMAND_ID98   CONFIG_CN_SPEECH_COMMAND_ID98
+#define MN_SPEECH_COMMAND_ID99   CONFIG_CN_SPEECH_COMMAND_ID99
+#define MN_SPEECH_COMMAND_ID100   CONFIG_CN_SPEECH_COMMAND_ID100
+#define MN_SPEECH_COMMAND_ID101   CONFIG_CN_SPEECH_COMMAND_ID101
+#define MN_SPEECH_COMMAND_ID102   CONFIG_CN_SPEECH_COMMAND_ID102
+#define MN_SPEECH_COMMAND_ID103   CONFIG_CN_SPEECH_COMMAND_ID103
+#define MN_SPEECH_COMMAND_ID104   CONFIG_CN_SPEECH_COMMAND_ID104
+#define MN_SPEECH_COMMAND_ID105   CONFIG_CN_SPEECH_COMMAND_ID105
+#define MN_SPEECH_COMMAND_ID106   CONFIG_CN_SPEECH_COMMAND_ID106
+#define MN_SPEECH_COMMAND_ID107   CONFIG_CN_SPEECH_COMMAND_ID107
+#define MN_SPEECH_COMMAND_ID108   CONFIG_CN_SPEECH_COMMAND_ID108
+#define MN_SPEECH_COMMAND_ID109   CONFIG_CN_SPEECH_COMMAND_ID109
+#define MN_SPEECH_COMMAND_ID110   CONFIG_CN_SPEECH_COMMAND_ID110
+#define MN_SPEECH_COMMAND_ID111   CONFIG_CN_SPEECH_COMMAND_ID111
+#define MN_SPEECH_COMMAND_ID112   CONFIG_CN_SPEECH_COMMAND_ID112
+#define MN_SPEECH_COMMAND_ID113   CONFIG_CN_SPEECH_COMMAND_ID113
+#define MN_SPEECH_COMMAND_ID114   CONFIG_CN_SPEECH_COMMAND_ID114
+#define MN_SPEECH_COMMAND_ID115   CONFIG_CN_SPEECH_COMMAND_ID115
+#define MN_SPEECH_COMMAND_ID116   CONFIG_CN_SPEECH_COMMAND_ID116
+#define MN_SPEECH_COMMAND_ID117   CONFIG_CN_SPEECH_COMMAND_ID117
+#define MN_SPEECH_COMMAND_ID118   CONFIG_CN_SPEECH_COMMAND_ID118
+#define MN_SPEECH_COMMAND_ID119   CONFIG_CN_SPEECH_COMMAND_ID119
+#define MN_SPEECH_COMMAND_ID120   CONFIG_CN_SPEECH_COMMAND_ID120
+#define MN_SPEECH_COMMAND_ID121   CONFIG_CN_SPEECH_COMMAND_ID121
+#define MN_SPEECH_COMMAND_ID122   CONFIG_CN_SPEECH_COMMAND_ID122
+#define MN_SPEECH_COMMAND_ID123   CONFIG_CN_SPEECH_COMMAND_ID123
+#define MN_SPEECH_COMMAND_ID124   CONFIG_CN_SPEECH_COMMAND_ID124
+#define MN_SPEECH_COMMAND_ID125   CONFIG_CN_SPEECH_COMMAND_ID125
+#define MN_SPEECH_COMMAND_ID126   CONFIG_CN_SPEECH_COMMAND_ID126
+#define MN_SPEECH_COMMAND_ID127   CONFIG_CN_SPEECH_COMMAND_ID127
+#define MN_SPEECH_COMMAND_ID128   CONFIG_CN_SPEECH_COMMAND_ID128
+#define MN_SPEECH_COMMAND_ID129   CONFIG_CN_SPEECH_COMMAND_ID129
+#define MN_SPEECH_COMMAND_ID130   CONFIG_CN_SPEECH_COMMAND_ID130
+#define MN_SPEECH_COMMAND_ID131   CONFIG_CN_SPEECH_COMMAND_ID131
+#define MN_SPEECH_COMMAND_ID132   CONFIG_CN_SPEECH_COMMAND_ID132
+#define MN_SPEECH_COMMAND_ID133   CONFIG_CN_SPEECH_COMMAND_ID133
+#define MN_SPEECH_COMMAND_ID134   CONFIG_CN_SPEECH_COMMAND_ID134
+#define MN_SPEECH_COMMAND_ID135   CONFIG_CN_SPEECH_COMMAND_ID135
+#define MN_SPEECH_COMMAND_ID136   CONFIG_CN_SPEECH_COMMAND_ID136
+#define MN_SPEECH_COMMAND_ID137   CONFIG_CN_SPEECH_COMMAND_ID137
+#define MN_SPEECH_COMMAND_ID138   CONFIG_CN_SPEECH_COMMAND_ID138
+#define MN_SPEECH_COMMAND_ID139   CONFIG_CN_SPEECH_COMMAND_ID139
+#define MN_SPEECH_COMMAND_ID140   CONFIG_CN_SPEECH_COMMAND_ID140
+#define MN_SPEECH_COMMAND_ID141   CONFIG_CN_SPEECH_COMMAND_ID141
+#define MN_SPEECH_COMMAND_ID142   CONFIG_CN_SPEECH_COMMAND_ID142
+#define MN_SPEECH_COMMAND_ID143   CONFIG_CN_SPEECH_COMMAND_ID143
+#define MN_SPEECH_COMMAND_ID144   CONFIG_CN_SPEECH_COMMAND_ID144
+#define MN_SPEECH_COMMAND_ID145   CONFIG_CN_SPEECH_COMMAND_ID145
+#define MN_SPEECH_COMMAND_ID146   CONFIG_CN_SPEECH_COMMAND_ID146
+#define MN_SPEECH_COMMAND_ID147   CONFIG_CN_SPEECH_COMMAND_ID147
+#define MN_SPEECH_COMMAND_ID148   CONFIG_CN_SPEECH_COMMAND_ID148
+#define MN_SPEECH_COMMAND_ID149   CONFIG_CN_SPEECH_COMMAND_ID149
+#define MN_SPEECH_COMMAND_ID150   CONFIG_CN_SPEECH_COMMAND_ID150
+#define MN_SPEECH_COMMAND_ID151   CONFIG_CN_SPEECH_COMMAND_ID151
+#define MN_SPEECH_COMMAND_ID152   CONFIG_CN_SPEECH_COMMAND_ID152
+#define MN_SPEECH_COMMAND_ID153   CONFIG_CN_SPEECH_COMMAND_ID153
+#define MN_SPEECH_COMMAND_ID154   CONFIG_CN_SPEECH_COMMAND_ID154
+#define MN_SPEECH_COMMAND_ID155   CONFIG_CN_SPEECH_COMMAND_ID155
+#define MN_SPEECH_COMMAND_ID156   CONFIG_CN_SPEECH_COMMAND_ID156
+#define MN_SPEECH_COMMAND_ID157   CONFIG_CN_SPEECH_COMMAND_ID157
+#define MN_SPEECH_COMMAND_ID158   CONFIG_CN_SPEECH_COMMAND_ID158
+#define MN_SPEECH_COMMAND_ID159   CONFIG_CN_SPEECH_COMMAND_ID159
+#define MN_SPEECH_COMMAND_ID160   CONFIG_CN_SPEECH_COMMAND_ID160
+#define MN_SPEECH_COMMAND_ID161   CONFIG_CN_SPEECH_COMMAND_ID161
+#define MN_SPEECH_COMMAND_ID162   CONFIG_CN_SPEECH_COMMAND_ID162
+#define MN_SPEECH_COMMAND_ID163   CONFIG_CN_SPEECH_COMMAND_ID163
+#define MN_SPEECH_COMMAND_ID164   CONFIG_CN_SPEECH_COMMAND_ID164
+#define MN_SPEECH_COMMAND_ID165   CONFIG_CN_SPEECH_COMMAND_ID165
+#define MN_SPEECH_COMMAND_ID166   CONFIG_CN_SPEECH_COMMAND_ID166
+#define MN_SPEECH_COMMAND_ID167   CONFIG_CN_SPEECH_COMMAND_ID167
+#define MN_SPEECH_COMMAND_ID168   CONFIG_CN_SPEECH_COMMAND_ID168
+#define MN_SPEECH_COMMAND_ID169   CONFIG_CN_SPEECH_COMMAND_ID169
+#define MN_SPEECH_COMMAND_ID170   CONFIG_CN_SPEECH_COMMAND_ID170
+#define MN_SPEECH_COMMAND_ID171   CONFIG_CN_SPEECH_COMMAND_ID171
+#define MN_SPEECH_COMMAND_ID172   CONFIG_CN_SPEECH_COMMAND_ID172
+#define MN_SPEECH_COMMAND_ID173   CONFIG_CN_SPEECH_COMMAND_ID173
+#define MN_SPEECH_COMMAND_ID174   CONFIG_CN_SPEECH_COMMAND_ID174
+#define MN_SPEECH_COMMAND_ID175   CONFIG_CN_SPEECH_COMMAND_ID175
+#define MN_SPEECH_COMMAND_ID176   CONFIG_CN_SPEECH_COMMAND_ID176
+#define MN_SPEECH_COMMAND_ID177   CONFIG_CN_SPEECH_COMMAND_ID177
+#define MN_SPEECH_COMMAND_ID178   CONFIG_CN_SPEECH_COMMAND_ID178
+#define MN_SPEECH_COMMAND_ID179   CONFIG_CN_SPEECH_COMMAND_ID179
+#define MN_SPEECH_COMMAND_ID180   CONFIG_CN_SPEECH_COMMAND_ID180
+#define MN_SPEECH_COMMAND_ID181   CONFIG_CN_SPEECH_COMMAND_ID181
+#define MN_SPEECH_COMMAND_ID182   CONFIG_CN_SPEECH_COMMAND_ID182
+#define MN_SPEECH_COMMAND_ID183   CONFIG_CN_SPEECH_COMMAND_ID183
+#define MN_SPEECH_COMMAND_ID184   CONFIG_CN_SPEECH_COMMAND_ID184
+#define MN_SPEECH_COMMAND_ID185   CONFIG_CN_SPEECH_COMMAND_ID185
+#define MN_SPEECH_COMMAND_ID186   CONFIG_CN_SPEECH_COMMAND_ID186
+#define MN_SPEECH_COMMAND_ID187   CONFIG_CN_SPEECH_COMMAND_ID187
+#define MN_SPEECH_COMMAND_ID188   CONFIG_CN_SPEECH_COMMAND_ID188
+#define MN_SPEECH_COMMAND_ID189   CONFIG_CN_SPEECH_COMMAND_ID189
+#define MN_SPEECH_COMMAND_ID190   CONFIG_CN_SPEECH_COMMAND_ID190
+#define MN_SPEECH_COMMAND_ID191   CONFIG_CN_SPEECH_COMMAND_ID191
+#define MN_SPEECH_COMMAND_ID192   CONFIG_CN_SPEECH_COMMAND_ID192
+#define MN_SPEECH_COMMAND_ID193   CONFIG_CN_SPEECH_COMMAND_ID193
+#define MN_SPEECH_COMMAND_ID194   CONFIG_CN_SPEECH_COMMAND_ID194
+#define MN_SPEECH_COMMAND_ID195   CONFIG_CN_SPEECH_COMMAND_ID195
+#define MN_SPEECH_COMMAND_ID196   CONFIG_CN_SPEECH_COMMAND_ID196
+#define MN_SPEECH_COMMAND_ID197   CONFIG_CN_SPEECH_COMMAND_ID197
+#define MN_SPEECH_COMMAND_ID198   CONFIG_CN_SPEECH_COMMAND_ID198
+#define MN_SPEECH_COMMAND_ID199   CONFIG_CN_SPEECH_COMMAND_ID199
+#elif CONFIG_SR_MN_ENGLISH
+#define MN_SPEECH_COMMAND_ID0   CONFIG_EN_SPEECH_COMMAND_ID0
+#define MN_SPEECH_COMMAND_ID1   CONFIG_EN_SPEECH_COMMAND_ID1
+#define MN_SPEECH_COMMAND_ID2   CONFIG_EN_SPEECH_COMMAND_ID2
+#define MN_SPEECH_COMMAND_ID3   CONFIG_EN_SPEECH_COMMAND_ID3
+#define MN_SPEECH_COMMAND_ID4   CONFIG_EN_SPEECH_COMMAND_ID4
+#define MN_SPEECH_COMMAND_ID5   CONFIG_EN_SPEECH_COMMAND_ID5
+#define MN_SPEECH_COMMAND_ID6   CONFIG_EN_SPEECH_COMMAND_ID6
+#define MN_SPEECH_COMMAND_ID7   CONFIG_EN_SPEECH_COMMAND_ID7
+#define MN_SPEECH_COMMAND_ID8   CONFIG_EN_SPEECH_COMMAND_ID8
+#define MN_SPEECH_COMMAND_ID9   CONFIG_EN_SPEECH_COMMAND_ID9
+#define MN_SPEECH_COMMAND_ID10   CONFIG_EN_SPEECH_COMMAND_ID10
+#define MN_SPEECH_COMMAND_ID11   CONFIG_EN_SPEECH_COMMAND_ID11
+#define MN_SPEECH_COMMAND_ID12   CONFIG_EN_SPEECH_COMMAND_ID12
+#define MN_SPEECH_COMMAND_ID13   CONFIG_EN_SPEECH_COMMAND_ID13
+#define MN_SPEECH_COMMAND_ID14   CONFIG_EN_SPEECH_COMMAND_ID14
+#define MN_SPEECH_COMMAND_ID15   CONFIG_EN_SPEECH_COMMAND_ID15
+#define MN_SPEECH_COMMAND_ID16   CONFIG_EN_SPEECH_COMMAND_ID16
+#define MN_SPEECH_COMMAND_ID17   CONFIG_EN_SPEECH_COMMAND_ID17
+#define MN_SPEECH_COMMAND_ID18   CONFIG_EN_SPEECH_COMMAND_ID18
+#define MN_SPEECH_COMMAND_ID19   CONFIG_EN_SPEECH_COMMAND_ID19
+#define MN_SPEECH_COMMAND_ID20   CONFIG_EN_SPEECH_COMMAND_ID20
+#define MN_SPEECH_COMMAND_ID21   CONFIG_EN_SPEECH_COMMAND_ID21
+#define MN_SPEECH_COMMAND_ID22   CONFIG_EN_SPEECH_COMMAND_ID22
+#define MN_SPEECH_COMMAND_ID23   CONFIG_EN_SPEECH_COMMAND_ID23
+#define MN_SPEECH_COMMAND_ID24   CONFIG_EN_SPEECH_COMMAND_ID24
+#define MN_SPEECH_COMMAND_ID25   CONFIG_EN_SPEECH_COMMAND_ID25
+#define MN_SPEECH_COMMAND_ID26   CONFIG_EN_SPEECH_COMMAND_ID26
+#define MN_SPEECH_COMMAND_ID27   CONFIG_EN_SPEECH_COMMAND_ID27
+#define MN_SPEECH_COMMAND_ID28   CONFIG_EN_SPEECH_COMMAND_ID28
+#define MN_SPEECH_COMMAND_ID29   CONFIG_EN_SPEECH_COMMAND_ID29
+#define MN_SPEECH_COMMAND_ID30   CONFIG_EN_SPEECH_COMMAND_ID30
+#define MN_SPEECH_COMMAND_ID31   CONFIG_EN_SPEECH_COMMAND_ID31
+#define MN_SPEECH_COMMAND_ID32   CONFIG_EN_SPEECH_COMMAND_ID32
+#define MN_SPEECH_COMMAND_ID33   CONFIG_EN_SPEECH_COMMAND_ID33
+#define MN_SPEECH_COMMAND_ID34   CONFIG_EN_SPEECH_COMMAND_ID34
+#define MN_SPEECH_COMMAND_ID35   CONFIG_EN_SPEECH_COMMAND_ID35
+#define MN_SPEECH_COMMAND_ID36   CONFIG_EN_SPEECH_COMMAND_ID36
+#define MN_SPEECH_COMMAND_ID37   CONFIG_EN_SPEECH_COMMAND_ID37
+#define MN_SPEECH_COMMAND_ID38   CONFIG_EN_SPEECH_COMMAND_ID38
+#define MN_SPEECH_COMMAND_ID39   CONFIG_EN_SPEECH_COMMAND_ID39
+#define MN_SPEECH_COMMAND_ID40   CONFIG_EN_SPEECH_COMMAND_ID40
+#define MN_SPEECH_COMMAND_ID41   CONFIG_EN_SPEECH_COMMAND_ID41
+#define MN_SPEECH_COMMAND_ID42   CONFIG_EN_SPEECH_COMMAND_ID42
+#define MN_SPEECH_COMMAND_ID43   CONFIG_EN_SPEECH_COMMAND_ID43
+#define MN_SPEECH_COMMAND_ID44   CONFIG_EN_SPEECH_COMMAND_ID44
+#define MN_SPEECH_COMMAND_ID45   CONFIG_EN_SPEECH_COMMAND_ID45
+#define MN_SPEECH_COMMAND_ID46   CONFIG_EN_SPEECH_COMMAND_ID46
+#define MN_SPEECH_COMMAND_ID47   CONFIG_EN_SPEECH_COMMAND_ID47
+#define MN_SPEECH_COMMAND_ID48   CONFIG_EN_SPEECH_COMMAND_ID48
+#define MN_SPEECH_COMMAND_ID49   CONFIG_EN_SPEECH_COMMAND_ID49
+#define MN_SPEECH_COMMAND_ID50   CONFIG_EN_SPEECH_COMMAND_ID50
+#define MN_SPEECH_COMMAND_ID51   CONFIG_EN_SPEECH_COMMAND_ID51
+#define MN_SPEECH_COMMAND_ID52   CONFIG_EN_SPEECH_COMMAND_ID52
+#define MN_SPEECH_COMMAND_ID53   CONFIG_EN_SPEECH_COMMAND_ID53
+#define MN_SPEECH_COMMAND_ID54   CONFIG_EN_SPEECH_COMMAND_ID54
+#define MN_SPEECH_COMMAND_ID55   CONFIG_EN_SPEECH_COMMAND_ID55
+#define MN_SPEECH_COMMAND_ID56   CONFIG_EN_SPEECH_COMMAND_ID56
+#define MN_SPEECH_COMMAND_ID57   CONFIG_EN_SPEECH_COMMAND_ID57
+#define MN_SPEECH_COMMAND_ID58   CONFIG_EN_SPEECH_COMMAND_ID58
+#define MN_SPEECH_COMMAND_ID59   CONFIG_EN_SPEECH_COMMAND_ID59
+#define MN_SPEECH_COMMAND_ID60   CONFIG_EN_SPEECH_COMMAND_ID60
+#define MN_SPEECH_COMMAND_ID61   CONFIG_EN_SPEECH_COMMAND_ID61
+#define MN_SPEECH_COMMAND_ID62   CONFIG_EN_SPEECH_COMMAND_ID62
+#define MN_SPEECH_COMMAND_ID63   CONFIG_EN_SPEECH_COMMAND_ID63
+#define MN_SPEECH_COMMAND_ID64   CONFIG_EN_SPEECH_COMMAND_ID64
+#define MN_SPEECH_COMMAND_ID65   CONFIG_EN_SPEECH_COMMAND_ID65
+#define MN_SPEECH_COMMAND_ID66   CONFIG_EN_SPEECH_COMMAND_ID66
+#define MN_SPEECH_COMMAND_ID67   CONFIG_EN_SPEECH_COMMAND_ID67
+#define MN_SPEECH_COMMAND_ID68   CONFIG_EN_SPEECH_COMMAND_ID68
+#define MN_SPEECH_COMMAND_ID69   CONFIG_EN_SPEECH_COMMAND_ID69
+#define MN_SPEECH_COMMAND_ID70   CONFIG_EN_SPEECH_COMMAND_ID70
+#define MN_SPEECH_COMMAND_ID71   CONFIG_EN_SPEECH_COMMAND_ID71
+#define MN_SPEECH_COMMAND_ID72   CONFIG_EN_SPEECH_COMMAND_ID72
+#define MN_SPEECH_COMMAND_ID73   CONFIG_EN_SPEECH_COMMAND_ID73
+#define MN_SPEECH_COMMAND_ID74   CONFIG_EN_SPEECH_COMMAND_ID74
+#define MN_SPEECH_COMMAND_ID75   CONFIG_EN_SPEECH_COMMAND_ID75
+#define MN_SPEECH_COMMAND_ID76   CONFIG_EN_SPEECH_COMMAND_ID76
+#define MN_SPEECH_COMMAND_ID77   CONFIG_EN_SPEECH_COMMAND_ID77
+#define MN_SPEECH_COMMAND_ID78   CONFIG_EN_SPEECH_COMMAND_ID78
+#define MN_SPEECH_COMMAND_ID79   CONFIG_EN_SPEECH_COMMAND_ID79
+#define MN_SPEECH_COMMAND_ID80   CONFIG_EN_SPEECH_COMMAND_ID80
+#define MN_SPEECH_COMMAND_ID81   CONFIG_EN_SPEECH_COMMAND_ID81
+#define MN_SPEECH_COMMAND_ID82   CONFIG_EN_SPEECH_COMMAND_ID82
+#define MN_SPEECH_COMMAND_ID83   CONFIG_EN_SPEECH_COMMAND_ID83
+#define MN_SPEECH_COMMAND_ID84   CONFIG_EN_SPEECH_COMMAND_ID84
+#define MN_SPEECH_COMMAND_ID85   CONFIG_EN_SPEECH_COMMAND_ID85
+#define MN_SPEECH_COMMAND_ID86   CONFIG_EN_SPEECH_COMMAND_ID86
+#define MN_SPEECH_COMMAND_ID87   CONFIG_EN_SPEECH_COMMAND_ID87
+#define MN_SPEECH_COMMAND_ID88   CONFIG_EN_SPEECH_COMMAND_ID88
+#define MN_SPEECH_COMMAND_ID89   CONFIG_EN_SPEECH_COMMAND_ID89
+#define MN_SPEECH_COMMAND_ID90   CONFIG_EN_SPEECH_COMMAND_ID90
+#define MN_SPEECH_COMMAND_ID91   CONFIG_EN_SPEECH_COMMAND_ID91
+#define MN_SPEECH_COMMAND_ID92   CONFIG_EN_SPEECH_COMMAND_ID92
+#define MN_SPEECH_COMMAND_ID93   CONFIG_EN_SPEECH_COMMAND_ID93
+#define MN_SPEECH_COMMAND_ID94   CONFIG_EN_SPEECH_COMMAND_ID94
+#define MN_SPEECH_COMMAND_ID95   CONFIG_EN_SPEECH_COMMAND_ID95
+#define MN_SPEECH_COMMAND_ID96   CONFIG_EN_SPEECH_COMMAND_ID96
+#define MN_SPEECH_COMMAND_ID97   CONFIG_EN_SPEECH_COMMAND_ID97
+#define MN_SPEECH_COMMAND_ID98   CONFIG_EN_SPEECH_COMMAND_ID98
+#define MN_SPEECH_COMMAND_ID99   CONFIG_EN_SPEECH_COMMAND_ID99
+#define MN_SPEECH_COMMAND_ID100   CONFIG_EN_SPEECH_COMMAND_ID100
+#define MN_SPEECH_COMMAND_ID101   CONFIG_EN_SPEECH_COMMAND_ID101
+#define MN_SPEECH_COMMAND_ID102   CONFIG_EN_SPEECH_COMMAND_ID102
+#define MN_SPEECH_COMMAND_ID103   CONFIG_EN_SPEECH_COMMAND_ID103
+#define MN_SPEECH_COMMAND_ID104   CONFIG_EN_SPEECH_COMMAND_ID104
+#define MN_SPEECH_COMMAND_ID105   CONFIG_EN_SPEECH_COMMAND_ID105
+#define MN_SPEECH_COMMAND_ID106   CONFIG_EN_SPEECH_COMMAND_ID106
+#define MN_SPEECH_COMMAND_ID107   CONFIG_EN_SPEECH_COMMAND_ID107
+#define MN_SPEECH_COMMAND_ID108   CONFIG_EN_SPEECH_COMMAND_ID108
+#define MN_SPEECH_COMMAND_ID109   CONFIG_EN_SPEECH_COMMAND_ID109
+#define MN_SPEECH_COMMAND_ID110   CONFIG_EN_SPEECH_COMMAND_ID110
+#define MN_SPEECH_COMMAND_ID111   CONFIG_EN_SPEECH_COMMAND_ID111
+#define MN_SPEECH_COMMAND_ID112   CONFIG_EN_SPEECH_COMMAND_ID112
+#define MN_SPEECH_COMMAND_ID113   CONFIG_EN_SPEECH_COMMAND_ID113
+#define MN_SPEECH_COMMAND_ID114   CONFIG_EN_SPEECH_COMMAND_ID114
+#define MN_SPEECH_COMMAND_ID115   CONFIG_EN_SPEECH_COMMAND_ID115
+#define MN_SPEECH_COMMAND_ID116   CONFIG_EN_SPEECH_COMMAND_ID116
+#define MN_SPEECH_COMMAND_ID117   CONFIG_EN_SPEECH_COMMAND_ID117
+#define MN_SPEECH_COMMAND_ID118   CONFIG_EN_SPEECH_COMMAND_ID118
+#define MN_SPEECH_COMMAND_ID119   CONFIG_EN_SPEECH_COMMAND_ID119
+#define MN_SPEECH_COMMAND_ID120   CONFIG_EN_SPEECH_COMMAND_ID120
+#define MN_SPEECH_COMMAND_ID121   CONFIG_EN_SPEECH_COMMAND_ID121
+#define MN_SPEECH_COMMAND_ID122   CONFIG_EN_SPEECH_COMMAND_ID122
+#define MN_SPEECH_COMMAND_ID123   CONFIG_EN_SPEECH_COMMAND_ID123
+#define MN_SPEECH_COMMAND_ID124   CONFIG_EN_SPEECH_COMMAND_ID124
+#define MN_SPEECH_COMMAND_ID125   CONFIG_EN_SPEECH_COMMAND_ID125
+#define MN_SPEECH_COMMAND_ID126   CONFIG_EN_SPEECH_COMMAND_ID126
+#define MN_SPEECH_COMMAND_ID127   CONFIG_EN_SPEECH_COMMAND_ID127
+#define MN_SPEECH_COMMAND_ID128   CONFIG_EN_SPEECH_COMMAND_ID128
+#define MN_SPEECH_COMMAND_ID129   CONFIG_EN_SPEECH_COMMAND_ID129
+#define MN_SPEECH_COMMAND_ID130   CONFIG_EN_SPEECH_COMMAND_ID130
+#define MN_SPEECH_COMMAND_ID131   CONFIG_EN_SPEECH_COMMAND_ID131
+#define MN_SPEECH_COMMAND_ID132   CONFIG_EN_SPEECH_COMMAND_ID132
+#define MN_SPEECH_COMMAND_ID133   CONFIG_EN_SPEECH_COMMAND_ID133
+#define MN_SPEECH_COMMAND_ID134   CONFIG_EN_SPEECH_COMMAND_ID134
+#define MN_SPEECH_COMMAND_ID135   CONFIG_EN_SPEECH_COMMAND_ID135
+#define MN_SPEECH_COMMAND_ID136   CONFIG_EN_SPEECH_COMMAND_ID136
+#define MN_SPEECH_COMMAND_ID137   CONFIG_EN_SPEECH_COMMAND_ID137
+#define MN_SPEECH_COMMAND_ID138   CONFIG_EN_SPEECH_COMMAND_ID138
+#define MN_SPEECH_COMMAND_ID139   CONFIG_EN_SPEECH_COMMAND_ID139
+#define MN_SPEECH_COMMAND_ID140   CONFIG_EN_SPEECH_COMMAND_ID140
+#define MN_SPEECH_COMMAND_ID141   CONFIG_EN_SPEECH_COMMAND_ID141
+#define MN_SPEECH_COMMAND_ID142   CONFIG_EN_SPEECH_COMMAND_ID142
+#define MN_SPEECH_COMMAND_ID143   CONFIG_EN_SPEECH_COMMAND_ID143
+#define MN_SPEECH_COMMAND_ID144   CONFIG_EN_SPEECH_COMMAND_ID144
+#define MN_SPEECH_COMMAND_ID145   CONFIG_EN_SPEECH_COMMAND_ID145
+#define MN_SPEECH_COMMAND_ID146   CONFIG_EN_SPEECH_COMMAND_ID146
+#define MN_SPEECH_COMMAND_ID147   CONFIG_EN_SPEECH_COMMAND_ID147
+#define MN_SPEECH_COMMAND_ID148   CONFIG_EN_SPEECH_COMMAND_ID148
+#define MN_SPEECH_COMMAND_ID149   CONFIG_EN_SPEECH_COMMAND_ID149
+#define MN_SPEECH_COMMAND_ID150   CONFIG_EN_SPEECH_COMMAND_ID150
+#define MN_SPEECH_COMMAND_ID151   CONFIG_EN_SPEECH_COMMAND_ID151
+#define MN_SPEECH_COMMAND_ID152   CONFIG_EN_SPEECH_COMMAND_ID152
+#define MN_SPEECH_COMMAND_ID153   CONFIG_EN_SPEECH_COMMAND_ID153
+#define MN_SPEECH_COMMAND_ID154   CONFIG_EN_SPEECH_COMMAND_ID154
+#define MN_SPEECH_COMMAND_ID155   CONFIG_EN_SPEECH_COMMAND_ID155
+#define MN_SPEECH_COMMAND_ID156   CONFIG_EN_SPEECH_COMMAND_ID156
+#define MN_SPEECH_COMMAND_ID157   CONFIG_EN_SPEECH_COMMAND_ID157
+#define MN_SPEECH_COMMAND_ID158   CONFIG_EN_SPEECH_COMMAND_ID158
+#define MN_SPEECH_COMMAND_ID159   CONFIG_EN_SPEECH_COMMAND_ID159
+#define MN_SPEECH_COMMAND_ID160   CONFIG_EN_SPEECH_COMMAND_ID160
+#define MN_SPEECH_COMMAND_ID161   CONFIG_EN_SPEECH_COMMAND_ID161
+#define MN_SPEECH_COMMAND_ID162   CONFIG_EN_SPEECH_COMMAND_ID162
+#define MN_SPEECH_COMMAND_ID163   CONFIG_EN_SPEECH_COMMAND_ID163
+#define MN_SPEECH_COMMAND_ID164   CONFIG_EN_SPEECH_COMMAND_ID164
+#define MN_SPEECH_COMMAND_ID165   CONFIG_EN_SPEECH_COMMAND_ID165
+#define MN_SPEECH_COMMAND_ID166   CONFIG_EN_SPEECH_COMMAND_ID166
+#define MN_SPEECH_COMMAND_ID167   CONFIG_EN_SPEECH_COMMAND_ID167
+#define MN_SPEECH_COMMAND_ID168   CONFIG_EN_SPEECH_COMMAND_ID168
+#define MN_SPEECH_COMMAND_ID169   CONFIG_EN_SPEECH_COMMAND_ID169
+#define MN_SPEECH_COMMAND_ID170   CONFIG_EN_SPEECH_COMMAND_ID170
+#define MN_SPEECH_COMMAND_ID171   CONFIG_EN_SPEECH_COMMAND_ID171
+#define MN_SPEECH_COMMAND_ID172   CONFIG_EN_SPEECH_COMMAND_ID172
+#define MN_SPEECH_COMMAND_ID173   CONFIG_EN_SPEECH_COMMAND_ID173
+#define MN_SPEECH_COMMAND_ID174   CONFIG_EN_SPEECH_COMMAND_ID174
+#define MN_SPEECH_COMMAND_ID175   CONFIG_EN_SPEECH_COMMAND_ID175
+#define MN_SPEECH_COMMAND_ID176   CONFIG_EN_SPEECH_COMMAND_ID176
+#define MN_SPEECH_COMMAND_ID177   CONFIG_EN_SPEECH_COMMAND_ID177
+#define MN_SPEECH_COMMAND_ID178   CONFIG_EN_SPEECH_COMMAND_ID178
+#define MN_SPEECH_COMMAND_ID179   CONFIG_EN_SPEECH_COMMAND_ID179
+#define MN_SPEECH_COMMAND_ID180   CONFIG_EN_SPEECH_COMMAND_ID180
+#define MN_SPEECH_COMMAND_ID181   CONFIG_EN_SPEECH_COMMAND_ID181
+#define MN_SPEECH_COMMAND_ID182   CONFIG_EN_SPEECH_COMMAND_ID182
+#define MN_SPEECH_COMMAND_ID183   CONFIG_EN_SPEECH_COMMAND_ID183
+#define MN_SPEECH_COMMAND_ID184   CONFIG_EN_SPEECH_COMMAND_ID184
+#define MN_SPEECH_COMMAND_ID185   CONFIG_EN_SPEECH_COMMAND_ID185
+#define MN_SPEECH_COMMAND_ID186   CONFIG_EN_SPEECH_COMMAND_ID186
+#define MN_SPEECH_COMMAND_ID187   CONFIG_EN_SPEECH_COMMAND_ID187
+#define MN_SPEECH_COMMAND_ID188   CONFIG_EN_SPEECH_COMMAND_ID188
+#define MN_SPEECH_COMMAND_ID189   CONFIG_EN_SPEECH_COMMAND_ID189
+#define MN_SPEECH_COMMAND_ID190   CONFIG_EN_SPEECH_COMMAND_ID190
+#define MN_SPEECH_COMMAND_ID191   CONFIG_EN_SPEECH_COMMAND_ID191
+#define MN_SPEECH_COMMAND_ID192   CONFIG_EN_SPEECH_COMMAND_ID192
+#define MN_SPEECH_COMMAND_ID193   CONFIG_EN_SPEECH_COMMAND_ID193
+#define MN_SPEECH_COMMAND_ID194   CONFIG_EN_SPEECH_COMMAND_ID194
+#define MN_SPEECH_COMMAND_ID195   CONFIG_EN_SPEECH_COMMAND_ID195
+#define MN_SPEECH_COMMAND_ID196   CONFIG_EN_SPEECH_COMMAND_ID196
+#define MN_SPEECH_COMMAND_ID197   CONFIG_EN_SPEECH_COMMAND_ID197
+#define MN_SPEECH_COMMAND_ID198   CONFIG_EN_SPEECH_COMMAND_ID198
+#define MN_SPEECH_COMMAND_ID199   CONFIG_EN_SPEECH_COMMAND_ID199
+#endif
+char *get_id_name(int i);
+void reset_speech_commands(model_iface_data_t *model_data, char* command_str, char *err_phrase_id);
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/model_path.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/model_path.h
new file mode 100644
index 00000000000..b9cdc302ad8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/model_path.h
@@ -0,0 +1,3 @@
+#pragma once
+char *get_model_base_path(void);
+void srmodel_spiffs_init(void);
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/multinet2_ch.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/multinet2_ch.h
new file mode 100644
index 00000000000..2cee215dca7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/multinet2_ch.h
@@ -0,0 +1,9 @@
+//Generated by mkmodel_py
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+#include "dl_lib_matrixq8.h"
+
+extern const model_coeff_getter_t get_coeff_multinet2_ch;
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaoxin_wn5X3.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaoxin_wn5X3.h
new file mode 100644
index 00000000000..b767bfc435d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaoxin_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaoxin_wn5X3;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaoxin_wn6.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaoxin_wn6.h
new file mode 100644
index 00000000000..c365e6d97df
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaoxin_wn6.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaoxin_wn6;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaozhi_wn5.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaozhi_wn5.h
new file mode 100644
index 00000000000..04fa268d1f9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaozhi_wn5.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaozhi_wn5;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaozhi_wn5X2.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaozhi_wn5X2.h
new file mode 100644
index 00000000000..6c5f2b39e8d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaozhi_wn5X2.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaozhi_wn5X2;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaozhi_wn5X3.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaozhi_wn5X3.h
new file mode 100644
index 00000000000..190556e1bab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/nihaoxiaozhi_wn5X3.h
@@ -0,0 +1,8 @@
+//Generated by mkmodel
+#pragma once
+#include <string.h>
+#include "dl_lib_coefgetter_if.h"
+#include "dl_lib_matrix.h"
+#include "dl_lib_matrixq.h"
+
+extern const model_coeff_getter_t get_coeff_nihaoxiaozhi_wn5X3;
diff --git a/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/sr_flash.h b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/sr_flash.h
new file mode 100644
index 00000000000..6c97e51e574
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-sr/include/esp32s3/sr_flash.h
@@ -0,0 +1,12 @@
+#pragma once
+
+#define SR_FLASH_TYPE   32
+#define SR_FLASH_SUBTYPE   32
+#define SR_FLASH_PARTITION_NAME "fr"
+#define SR_FLASH_INFO_FLAG 12138
+
+int8_t speech_command_flash_init(void);
+int8_t enroll_speech_command_to_flash_with_id(char *phrase, int mn_command_id);
+int get_use_flag_from_flash();
+int get_enroll_num_from_flash();
+char *read_speech_command_from_flash(int i);
\ No newline at end of file
diff --git a/tools/sdk/esp32s3/include/esp-tls/esp-tls-crypto/esp_tls_crypto.h b/tools/sdk/esp32s3/include/esp-tls/esp-tls-crypto/esp_tls_crypto.h
new file mode 100644
index 00000000000..803023ecdd8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-tls/esp-tls-crypto/esp_tls_crypto.h
@@ -0,0 +1,60 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _ESP_TLS_CRYPTO_H
+#define _ESP_TLS_CRYPTO_H
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Calculate sha1 sum
+ * esp-tls abstraction for crypto sha1 API, calculates the sha1 sum(digest) of
+ * the data provided in input which is of ilen size and returns
+ * a 20 char sha1 sum
+ * @param[in]   input   Input array
+ * @param[in]   ilen    Length of Input array
+ * @param[out]  output  calculated sha1 sum
+ *
+ * @return
+ * mbedtls stack:-
+ *              - MBEDTLS_ERR_SHA1_BAD_INPUT_DATA   on BAD INPUT.
+ *              -  0 on success.
+ * wolfssl stack:-
+ *              - -1    on failure.
+ *              -  0    on success.
+ */
+int esp_crypto_sha1(const unsigned char *input,
+                    size_t ilen,
+                    unsigned char output[20]);
+
+/**
+ * @brief Do Base64 encode of the src data
+ *
+ * @param[in]   dst   destination buffer
+ * @param[in]   dlen  length of destination buffer
+ * @param[out]  olen  number of bytes written
+ * @param[in]   src   src buffer to be encoded
+ * @param[in]   slen  src buffer len
+ *
+ * @return
+ * mbedtls stack:-
+ *               - MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL  if buffer is of insufficient size.
+ *               -  0   if successful.
+ * wolfssl stack:-
+ *               - <0   on failure.
+ *               -  0   if succcessful.
+ */
+int esp_crypto_base64_encode(unsigned char *dst, size_t dlen,
+                             size_t *olen, const unsigned char *src,
+                             size_t slen);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _ESP_TLS_CRYPTO_H */
diff --git a/tools/sdk/esp32s3/include/esp-tls/esp_tls.h b/tools/sdk/esp32s3/include/esp-tls/esp_tls.h
new file mode 100644
index 00000000000..588f70d83f9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-tls/esp_tls.h
@@ -0,0 +1,696 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _ESP_TLS_H_
+#define _ESP_TLS_H_
+
+#include <stdbool.h>
+#include <sys/socket.h>
+#include <fcntl.h>
+#include "esp_err.h"
+#include "esp_tls_errors.h"
+#ifdef CONFIG_ESP_TLS_USING_MBEDTLS
+#include "mbedtls/platform.h"
+#include "mbedtls/net_sockets.h"
+#include "mbedtls/esp_debug.h"
+#include "mbedtls/ssl.h"
+#include "mbedtls/entropy.h"
+#include "mbedtls/ctr_drbg.h"
+#include "mbedtls/error.h"
+#include "mbedtls/certs.h"
+#ifdef CONFIG_ESP_TLS_SERVER_SESSION_TICKETS
+#include "mbedtls/ssl_ticket.h"
+#endif
+#elif CONFIG_ESP_TLS_USING_WOLFSSL
+#include "wolfssl/wolfcrypt/settings.h"
+#include "wolfssl/ssl.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *  @brief ESP-TLS Connection State
+ */
+typedef enum esp_tls_conn_state {
+    ESP_TLS_INIT = 0,
+    ESP_TLS_CONNECTING,
+    ESP_TLS_HANDSHAKE,
+    ESP_TLS_FAIL,
+    ESP_TLS_DONE,
+} esp_tls_conn_state_t;
+
+typedef enum esp_tls_role {
+    ESP_TLS_CLIENT = 0,
+    ESP_TLS_SERVER,
+} esp_tls_role_t;
+
+/**
+ *  @brief ESP-TLS preshared key and hint structure
+ */
+typedef struct psk_key_hint {
+    const uint8_t* key;                     /*!< key in PSK authentication mode in binary format */
+    const size_t   key_size;                /*!< length of the key */
+    const char* hint;                       /*!< hint in PSK authentication mode in string format */
+} psk_hint_key_t;
+
+/**
+ * @brief esp-tls client session ticket ctx
+ */
+#ifdef CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS
+typedef struct esp_tls_client_session {
+    mbedtls_ssl_session saved_session;
+} esp_tls_client_session_t;
+#endif /* CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS */
+
+/**
+*  @brief Keep alive parameters structure
+*/
+typedef struct tls_keep_alive_cfg {
+    bool keep_alive_enable;               /*!< Enable keep-alive timeout */
+    int keep_alive_idle;                  /*!< Keep-alive idle time (second) */
+    int keep_alive_interval;              /*!< Keep-alive interval time (second) */
+    int keep_alive_count;                 /*!< Keep-alive packet retry send count */
+} tls_keep_alive_cfg_t;
+
+/**
+ * @brief      ESP-TLS configuration parameters
+ *
+ * @note       Note about format of certificates:
+ *             - This structure includes certificates of a Certificate Authority, of client or server as well
+ *             as private keys, which may be of PEM or DER format. In case of PEM format, the buffer must be
+ *             NULL terminated (with NULL character included in certificate size).
+ *             - Certificate Authority's certificate may be a chain of certificates in case of PEM format,
+ *             but could be only one certificate in case of DER format
+ *             - Variables names of certificates and private key buffers and sizes are defined as unions providing
+ *             backward compatibility for legacy *_pem_buf and *_pem_bytes names which suggested only PEM format
+ *             was supported. It is encouraged to use generic names such as cacert_buf and cacert_bytes.
+ */
+typedef struct esp_tls_cfg {
+    const char **alpn_protos;               /*!< Application protocols required for HTTP2.
+                                                 If HTTP2/ALPN support is required, a list
+                                                 of protocols that should be negotiated.
+                                                 The format is length followed by protocol
+                                                 name.
+                                                 For the most common cases the following is ok:
+                                                 const char **alpn_protos = { "h2", NULL };
+                                                 - where 'h2' is the protocol name */
+
+    union {
+    const unsigned char *cacert_buf;        /*!< Certificate Authority's certificate in a buffer.
+                                                 Format may be PEM or DER, depending on mbedtls-support
+                                                 This buffer should be NULL terminated in case of PEM */
+    const unsigned char *cacert_pem_buf;    /*!< CA certificate buffer legacy name */
+    };
+
+    union {
+    unsigned int cacert_bytes;              /*!< Size of Certificate Authority certificate
+                                                 pointed to by cacert_buf
+                                                 (including NULL-terminator in case of PEM format) */
+    unsigned int cacert_pem_bytes;          /*!< Size of Certificate Authority certificate legacy name */
+    };
+
+    union {
+    const unsigned char *clientcert_buf;    /*!< Client certificate in a buffer
+                                                 Format may be PEM or DER, depending on mbedtls-support
+                                                 This buffer should be NULL terminated in case of PEM */
+    const unsigned char *clientcert_pem_buf;     /*!< Client certificate legacy name */
+    };
+
+    union {
+    unsigned int clientcert_bytes;          /*!< Size of client certificate pointed to by
+                                                 clientcert_pem_buf
+                                                 (including NULL-terminator in case of PEM format) */
+    unsigned int clientcert_pem_bytes;      /*!< Size of client certificate legacy name */
+    };
+
+    union {
+    const unsigned char *clientkey_buf;     /*!< Client key in a buffer
+                                                 Format may be PEM or DER, depending on mbedtls-support
+                                                 This buffer should be NULL terminated in case of PEM */
+    const unsigned char *clientkey_pem_buf; /*!< Client key legacy name */
+    };
+
+    union {
+    unsigned int clientkey_bytes;           /*!< Size of client key pointed to by
+                                                 clientkey_pem_buf
+                                                 (including NULL-terminator in case of PEM format) */
+    unsigned int clientkey_pem_bytes;       /*!< Size of client key legacy name */
+    };
+
+    const unsigned char *clientkey_password;/*!< Client key decryption password string */
+
+    unsigned int clientkey_password_len;    /*!< String length of the password pointed to by
+                                                 clientkey_password */
+
+    bool non_block;                         /*!< Configure non-blocking mode. If set to true the
+                                                 underneath socket will be configured in non
+                                                 blocking mode after tls session is established */
+
+    bool use_secure_element;                /*!< Enable this option to use secure element or
+                                                 atecc608a chip ( Integrated with ESP32-WROOM-32SE ) */
+
+    int timeout_ms;                         /*!< Network timeout in milliseconds */
+
+    bool use_global_ca_store;               /*!< Use a global ca_store for all the connections in which
+                                                 this bool is set. */
+
+    const char *common_name;                /*!< If non-NULL, server certificate CN must match this name.
+                                                 If NULL, server certificate CN must match hostname. */
+
+    bool skip_common_name;                  /*!< Skip any validation of server certificate CN field */
+
+    tls_keep_alive_cfg_t *keep_alive_cfg;   /*!< Enable TCP keep-alive timeout for SSL connection */
+
+    const psk_hint_key_t* psk_hint_key;     /*!< Pointer to PSK hint and key. if not NULL (and certificates are NULL)
+                                                 then PSK authentication is enabled with configured setup.
+                                                 Important note: the pointer must be valid for connection */
+
+    esp_err_t (*crt_bundle_attach)(void *conf);
+                                            /*!< Function pointer to esp_crt_bundle_attach. Enables the use of certification
+                                                 bundle for server verification, must be enabled in menuconfig */
+
+    void *ds_data;                          /*!< Pointer for digital signature peripheral context */
+    bool is_plain_tcp;                      /*!< Use non-TLS connection: When set to true, the esp-tls uses
+                                                 plain TCP transport rather then TLS/SSL connection.
+                                                 Note, that it is possible to connect using a plain tcp transport
+                                                 directly with esp_tls_plain_tcp_connect() API */
+
+    struct ifreq *if_name;                  /*!< The name of interface for data to go through. Use the default interface without setting */
+
+#ifdef CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS
+    esp_tls_client_session_t *client_session; /*! Pointer for the client session ticket context. */
+#endif /* CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS */
+} esp_tls_cfg_t;
+
+#ifdef CONFIG_ESP_TLS_SERVER
+#if defined(CONFIG_ESP_TLS_SERVER_SESSION_TICKETS)
+/**
+ * @brief Data structures necessary to support TLS session tickets according to RFC5077
+ */
+typedef struct esp_tls_server_session_ticket_ctx {
+    mbedtls_entropy_context entropy;                                            /*!< mbedTLS entropy context structure */
+
+    mbedtls_ctr_drbg_context ctr_drbg;                                          /*!< mbedTLS ctr drbg context structure.
+                                                                                     CTR_DRBG is deterministic random
+                                                                                     bit generation based on AES-256 */
+    mbedtls_ssl_ticket_context ticket_ctx;                                     /*!< Session ticket generation context */
+} esp_tls_server_session_ticket_ctx_t;
+#endif
+
+typedef struct esp_tls_cfg_server {
+    const char **alpn_protos;                   /*!< Application protocols required for HTTP2.
+                                                     If HTTP2/ALPN support is required, a list
+                                                     of protocols that should be negotiated.
+                                                     The format is length followed by protocol
+                                                     name.
+                                                     For the most common cases the following is ok:
+                                                     const char **alpn_protos = { "h2", NULL };
+                                                     - where 'h2' is the protocol name */
+
+    union {
+    const unsigned char *cacert_buf;        /*!< Client CA certificate in a buffer.
+                                                     This buffer should be NULL terminated */
+    const unsigned char *cacert_pem_buf;    /*!< Client CA certificate legacy name */
+    };
+
+    union {
+    unsigned int cacert_bytes;              /*!< Size of client CA certificate
+                                                     pointed to by cacert_pem_buf */
+    unsigned int cacert_pem_bytes;          /*!< Size of client CA certificate legacy name */
+    };
+
+    union {
+    const unsigned char *servercert_buf;        /*!< Server certificate in a buffer
+                                                     This buffer should be NULL terminated */
+    const unsigned char *servercert_pem_buf;    /*!< Server certificate legacy name */
+    };
+
+    union {
+    unsigned int servercert_bytes;             /*!< Size of server certificate pointed to by
+                                                     servercert_pem_buf */
+    unsigned int servercert_pem_bytes;          /*!< Size of server certificate legacy name */
+    };
+
+    union {
+    const unsigned char *serverkey_buf;         /*!< Server key in a buffer
+                                                     This buffer should be NULL terminated */
+    const unsigned char *serverkey_pem_buf;     /*!< Server key legacy name */
+    };
+
+    union {
+    unsigned int serverkey_bytes;               /*!< Size of server key pointed to by
+                                                     serverkey_pem_buf */
+    unsigned int serverkey_pem_bytes;           /*!< Size of server key legacy name */
+    };
+
+    const unsigned char *serverkey_password;    /*!< Server key decryption password string */
+
+    unsigned int serverkey_password_len;        /*!< String length of the password pointed to by
+                                                     serverkey_password */
+
+#if defined(CONFIG_ESP_TLS_SERVER_SESSION_TICKETS)
+    esp_tls_server_session_ticket_ctx_t * ticket_ctx; /*!< Session ticket generation context.
+                                                    You have to call esp_tls_cfg_server_session_tickets_init
+                                                    to use it.
+                                                    Call esp_tls_cfg_server_session_tickets_free
+                                                    to free the data associated with this context. */
+#endif
+} esp_tls_cfg_server_t;
+
+/**
+ * @brief Initialize the server side TLS session ticket context
+ *
+ * This function initializes the server side tls session ticket context
+ * which holds all necessary data structures to enable tls session tickets
+ * according to RFC5077.
+ * Use esp_tls_cfg_server_session_tickets_free to free the data.
+ *
+ * @param[in]  cfg server configuration as esp_tls_cfg_server_t
+ * @return
+ *             ESP_OK if setup succeeded
+ *             ESP_ERR_INVALID_ARG if context is already initialized
+ *             ESP_ERR_NO_MEM if memory allocation failed
+ *             ESP_ERR_NOT_SUPPORTED if session tickets are not available due to build configuration
+ *             ESP_FAIL if setup failed
+ */
+esp_err_t esp_tls_cfg_server_session_tickets_init(esp_tls_cfg_server_t *cfg);
+
+/**
+ * @brief Free the server side TLS session ticket context
+ *
+ * @param cfg server configuration as esp_tls_cfg_server_t
+ */
+void esp_tls_cfg_server_session_tickets_free(esp_tls_cfg_server_t *cfg);
+#endif /* ! CONFIG_ESP_TLS_SERVER */
+
+/**
+ * @brief      ESP-TLS Connection Handle
+ */
+typedef struct esp_tls {
+#ifdef CONFIG_ESP_TLS_USING_MBEDTLS
+    mbedtls_ssl_context ssl;                                                    /*!< TLS/SSL context */
+
+    mbedtls_entropy_context entropy;                                            /*!< mbedTLS entropy context structure */
+
+    mbedtls_ctr_drbg_context ctr_drbg;                                          /*!< mbedTLS ctr drbg context structure.
+                                                                                     CTR_DRBG is deterministic random
+                                                                                     bit generation based on AES-256 */
+
+    mbedtls_ssl_config conf;                                                    /*!< TLS/SSL configuration to be shared
+                                                                                     between mbedtls_ssl_context
+                                                                                     structures */
+
+    mbedtls_net_context server_fd;                                              /*!< mbedTLS wrapper type for sockets */
+
+    mbedtls_x509_crt cacert;                                                    /*!< Container for the X.509 CA certificate */
+
+    mbedtls_x509_crt *cacert_ptr;                                               /*!< Pointer to the cacert being used. */
+
+    mbedtls_x509_crt clientcert;                                                /*!< Container for the X.509 client certificate */
+
+    mbedtls_pk_context clientkey;                                               /*!< Container for the private key of the client
+                                                                                     certificate */
+#ifdef CONFIG_ESP_TLS_SERVER
+    mbedtls_x509_crt servercert;                                                /*!< Container for the X.509 server certificate */
+
+    mbedtls_pk_context serverkey;                                               /*!< Container for the private key of the server
+                                                                                   certificate */
+#endif
+#elif CONFIG_ESP_TLS_USING_WOLFSSL
+    void *priv_ctx;
+    void *priv_ssl;
+#endif
+    int sockfd;                                                                 /*!< Underlying socket file descriptor. */
+
+    ssize_t (*read)(struct esp_tls  *tls, char *data, size_t datalen);          /*!< Callback function for reading data from TLS/SSL
+                                                                                     connection. */
+
+    ssize_t (*write)(struct esp_tls *tls, const char *data, size_t datalen);    /*!< Callback function for writing data to TLS/SSL
+                                                                                     connection. */
+
+    esp_tls_conn_state_t  conn_state;                                           /*!< ESP-TLS Connection state */
+
+    fd_set rset;                                                                /*!< read file descriptors */
+
+    fd_set wset;                                                                /*!< write file descriptors */
+
+    bool is_tls;                                                                /*!< indicates connection type (TLS or NON-TLS) */
+
+    esp_tls_role_t role;                                                        /*!< esp-tls role
+                                                                                     - ESP_TLS_CLIENT
+                                                                                     - ESP_TLS_SERVER */
+
+    esp_tls_error_handle_t error_handle;                                        /*!< handle to error descriptor */
+
+} esp_tls_t;
+
+
+/**
+ * @brief      Create TLS connection
+ *
+ * This function allocates and initializes esp-tls structure handle.
+ *
+ * @return      tls     Pointer to esp-tls as esp-tls handle if successfully initialized,
+ *                      NULL if allocation error
+ */
+esp_tls_t *esp_tls_init(void);
+
+
+
+
+/**
+ * @brief      Create a new blocking TLS/SSL connection
+ *
+ * This function establishes a TLS/SSL connection with the specified host in blocking manner.
+ *
+ * Note: This API is present for backward compatibility reasons. Alternative function
+ * with the same functionality is `esp_tls_conn_new_sync` (and its asynchronous version
+ * `esp_tls_conn_new_async`)
+ *
+ * @param[in]  hostname  Hostname of the host.
+ * @param[in]  hostlen   Length of hostname.
+ * @param[in]  port      Port number of the host.
+ * @param[in]  cfg       TLS configuration as esp_tls_cfg_t. If you wish to open
+ *                       non-TLS connection, keep this NULL. For TLS connection,
+ *                       a pass pointer to esp_tls_cfg_t. At a minimum, this
+ *                       structure should be zero-initialized.
+ *
+ * @return pointer to esp_tls_t, or NULL if connection couldn't be opened.
+ */
+esp_tls_t *esp_tls_conn_new(const char *hostname, int hostlen, int port, const esp_tls_cfg_t *cfg)  __attribute__ ((deprecated));
+
+/**
+ * @brief      Create a new blocking TLS/SSL connection
+ *
+ * This function establishes a TLS/SSL connection with the specified host in blocking manner.
+ *
+ * @param[in]  hostname  Hostname of the host.
+ * @param[in]  hostlen   Length of hostname.
+ * @param[in]  port      Port number of the host.
+ * @param[in]  cfg       TLS configuration as esp_tls_cfg_t. If you wish to open
+ *                       non-TLS connection, keep this NULL. For TLS connection,
+ *                       a pass pointer to esp_tls_cfg_t. At a minimum, this
+ *                       structure should be zero-initialized.
+ * @param[in]  tls       Pointer to esp-tls as esp-tls handle.
+ *
+ * @return
+ *             - -1      If connection establishment fails.
+ *             -  1      If connection establishment is successful.
+ *             -  0      If connection state is in progress.
+ */
+int esp_tls_conn_new_sync(const char *hostname, int hostlen, int port, const esp_tls_cfg_t *cfg, esp_tls_t *tls);
+
+/**
+ * @brief      Create a new blocking TLS/SSL connection with a given "HTTP" url
+ *
+ * The behaviour is same as esp_tls_conn_new() API. However this API accepts host's url.
+ *
+ * @param[in]  url  url of host.
+ * @param[in]  cfg  TLS configuration as esp_tls_cfg_t. If you wish to open
+ *                  non-TLS connection, keep this NULL. For TLS connection,
+ *                  a pass pointer to 'esp_tls_cfg_t'. At a minimum, this
+ *                  structure should be zero-initialized.
+ * @return pointer to esp_tls_t, or NULL if connection couldn't be opened.
+ */
+esp_tls_t *esp_tls_conn_http_new(const char *url, const esp_tls_cfg_t *cfg);
+
+/**
+ * @brief      Create a new non-blocking TLS/SSL connection
+ *
+ * This function initiates a non-blocking TLS/SSL connection with the specified host, but due to
+ * its non-blocking nature, it doesn't wait for the connection to get established.
+ *
+ * @param[in]  hostname  Hostname of the host.
+ * @param[in]  hostlen   Length of hostname.
+ * @param[in]  port      Port number of the host.
+ * @param[in]  cfg       TLS configuration as esp_tls_cfg_t. `non_block` member of
+ *                       this structure should be set to be true.
+ * @param[in]  tls       pointer to esp-tls as esp-tls handle.
+ *
+ * @return
+ *             - -1      If connection establishment fails.
+ *             -  0      If connection establishment is in progress.
+ *             -  1      If connection establishment is successful.
+ */
+int esp_tls_conn_new_async(const char *hostname, int hostlen, int port, const esp_tls_cfg_t *cfg, esp_tls_t *tls);
+
+/**
+ * @brief      Create a new non-blocking TLS/SSL connection with a given "HTTP" url
+ *
+ * The behaviour is same as esp_tls_conn_new() API. However this API accepts host's url.
+ *
+ * @param[in]  url     url of host.
+ * @param[in]  cfg     TLS configuration as esp_tls_cfg_t.
+ * @param[in]  tls     pointer to esp-tls as esp-tls handle.
+ *
+ * @return
+ *             - -1     If connection establishment fails.
+ *             -  0     If connection establishment is in progress.
+ *             -  1     If connection establishment is successful.
+ */
+int esp_tls_conn_http_new_async(const char *url, const esp_tls_cfg_t *cfg, esp_tls_t *tls);
+
+/**
+ * @brief      Write from buffer 'data' into specified tls connection.
+ *
+ * @param[in]  tls      pointer to esp-tls as esp-tls handle.
+ * @param[in]  data     Buffer from which data will be written.
+ * @param[in]  datalen  Length of data buffer.
+ *
+ * @return
+ *             - >=0  if write operation was successful, the return value is the number
+ *                   of bytes actually written to the TLS/SSL connection.
+ *             - <0  if write operation was not successful, because either an
+ *                   error occured or an action must be taken by the calling process.
+ *             - ESP_TLS_ERR_SSL_WANT_READ/
+ *               ESP_TLS_ERR_SSL_WANT_WRITE.
+ *                  if the handshake is incomplete and waiting for data to be available for reading.
+ *                  In this case this functions needs to be called again when the underlying transport is ready for operation.
+ */
+static inline ssize_t esp_tls_conn_write(esp_tls_t *tls, const void *data, size_t datalen)
+{
+    return tls->write(tls, (char *)data, datalen);
+}
+
+/**
+ * @brief      Read from specified tls connection into the buffer 'data'.
+ *
+ * @param[in]  tls      pointer to esp-tls as esp-tls handle.
+ * @param[in]  data     Buffer to hold read data.
+ * @param[in]  datalen  Length of data buffer.
+ *
+ * @return
+ *             - >0  if read operation was successful, the return value is the number
+ *                   of bytes actually read from the TLS/SSL connection.
+ *             -  0  if read operation was not successful. The underlying
+ *                   connection was closed.
+ *             - <0  if read operation was not successful, because either an
+ *                   error occured or an action must be taken by the calling process.
+ */
+static inline ssize_t esp_tls_conn_read(esp_tls_t *tls, void  *data, size_t datalen)
+{
+    return tls->read(tls, (char *)data, datalen);
+}
+
+/**
+ * @brief      Compatible version of esp_tls_conn_destroy() to close the TLS/SSL connection
+ *
+ * @note This API will be removed in IDFv5.0
+ *
+ * @param[in]  tls  pointer to esp-tls as esp-tls handle.
+ */
+void esp_tls_conn_delete(esp_tls_t *tls);
+
+/**
+ * @brief      Close the TLS/SSL connection and free any allocated resources.
+ *
+ * This function should be called to close each tls connection opened with esp_tls_conn_new() or
+ * esp_tls_conn_http_new() APIs.
+ *
+ * @param[in]  tls  pointer to esp-tls as esp-tls handle.
+ *
+ * @return    - 0 on success
+ *            - -1 if socket error or an invalid argument
+ */
+int esp_tls_conn_destroy(esp_tls_t *tls);
+
+/**
+ * @brief      Return the number of application data bytes remaining to be
+ *             read from the current record
+ *
+ * This API is a wrapper over mbedtls's mbedtls_ssl_get_bytes_avail() API.
+ *
+ * @param[in]  tls  pointer to esp-tls as esp-tls handle.
+ *
+ * @return
+ *            - -1  in case of invalid arg
+ *            - bytes available in the application data
+ *              record read buffer
+ */
+ssize_t esp_tls_get_bytes_avail(esp_tls_t *tls);
+
+/**
+ * @brief       Returns the connection socket file descriptor from esp_tls session
+ *
+ * @param[in]   tls          handle to esp_tls context
+ *
+ * @param[out]  sockfd       int pointer to sockfd value.
+ *
+ * @return     - ESP_OK on success and value of sockfd will be updated with socket file descriptor for connection
+ *             - ESP_ERR_INVALID_ARG if (tls == NULL || sockfd == NULL)
+ */
+esp_err_t esp_tls_get_conn_sockfd(esp_tls_t *tls, int *sockfd);
+
+/**
+ * @brief      Create a global CA store, initially empty.
+ *
+ * This function should be called if the application wants to use the same CA store for multiple connections.
+ * This function initialises the global CA store which can be then set by calling esp_tls_set_global_ca_store().
+ * To be effective, this function must be called before any call to esp_tls_set_global_ca_store().
+ *
+ * @return
+ *             - ESP_OK             if creating global CA store was successful.
+ *             - ESP_ERR_NO_MEM     if an error occured when allocating the mbedTLS resources.
+ */
+esp_err_t esp_tls_init_global_ca_store(void);
+
+/**
+ * @brief      Set the global CA store with the buffer provided in pem format.
+ *
+ * This function should be called if the application wants to set the global CA store for
+ * multiple connections i.e. to add the certificates in the provided buffer to the certificate chain.
+ * This function implicitly calls esp_tls_init_global_ca_store() if it has not already been called.
+ * The application must call this function before calling esp_tls_conn_new().
+ *
+ * @param[in]  cacert_pem_buf    Buffer which has certificates in pem format. This buffer
+ *                               is used for creating a global CA store, which can be used
+ *                               by other tls connections.
+ * @param[in]  cacert_pem_bytes  Length of the buffer.
+ *
+ * @return
+ *             - ESP_OK  if adding certificates was successful.
+ *             - Other   if an error occured or an action must be taken by the calling process.
+ */
+esp_err_t esp_tls_set_global_ca_store(const unsigned char *cacert_pem_buf, const unsigned int cacert_pem_bytes);
+
+/**
+ * @brief      Free the global CA store currently being used.
+ *
+ * The memory being used by the global CA store to store all the parsed certificates is
+ * freed up. The application can call this API if it no longer needs the global CA store.
+ */
+void esp_tls_free_global_ca_store(void);
+
+/**
+ * @brief      Returns last error in esp_tls with detailed mbedtls related error codes.
+ *             The error information is cleared internally upon return
+ *
+ * @param[in]  h              esp-tls error handle.
+ * @param[out] esp_tls_code   last error code returned from mbedtls api (set to zero if none)
+ *                            This pointer could be NULL if caller does not care about esp_tls_code
+ * @param[out] esp_tls_flags  last certification verification flags (set to zero if none)
+ *                            This pointer could be NULL if caller does not care about esp_tls_code
+ *
+ * @return
+ *            - ESP_ERR_INVALID_STATE if invalid parameters
+ *            - ESP_OK (0) if no error occurred
+ *            - specific error code (based on ESP_ERR_ESP_TLS_BASE) otherwise
+ */
+esp_err_t esp_tls_get_and_clear_last_error(esp_tls_error_handle_t h, int *esp_tls_code, int *esp_tls_flags);
+
+/**
+ * @brief      Returns the last error captured in esp_tls of a specific type
+ *             The error information is cleared internally upon return
+ *
+ * @param[in]  h              esp-tls error handle.
+ * @param[in]  err_type       specific error type
+ * @param[out] error_code     last error code returned from mbedtls api (set to zero if none)
+ *                            This pointer could be NULL if caller does not care about esp_tls_code
+ * @return
+ *            - ESP_ERR_INVALID_STATE if invalid parameters
+ *            - ESP_OK if a valid error returned and was cleared
+ */
+esp_err_t esp_tls_get_and_clear_error_type(esp_tls_error_handle_t h, esp_tls_error_type_t err_type, int *error_code);
+
+#if CONFIG_ESP_TLS_USING_MBEDTLS
+/**
+ * @brief      Get the pointer to the global CA store currently being used.
+ *
+ * The application must first call esp_tls_set_global_ca_store(). Then the same
+ * CA store could be used by the application for APIs other than esp_tls.
+ *
+ * @note       Modifying the pointer might cause a failure in verifying the certificates.
+ *
+ * @return
+ *             - Pointer to the global CA store currently being used    if successful.
+ *             - NULL                                                   if there is no global CA store set.
+ */
+mbedtls_x509_crt *esp_tls_get_global_ca_store(void);
+
+#endif /* CONFIG_ESP_TLS_USING_MBEDTLS */
+#ifdef CONFIG_ESP_TLS_SERVER
+/**
+ * @brief      Create TLS/SSL server session
+ *
+ * This function creates a TLS/SSL server context for already accepted client connection
+ * and performs TLS/SSL handshake with the client
+ *
+ * @param[in]  cfg      Pointer to esp_tls_cfg_server_t
+ * @param[in]  sockfd   FD of accepted connection
+ * @param[out] tls      Pointer to allocated esp_tls_t
+ *
+ * @return
+ *          - 0  if successful
+ *          - <0 in case of error
+ *
+ */
+int esp_tls_server_session_create(esp_tls_cfg_server_t *cfg, int sockfd, esp_tls_t *tls);
+
+/**
+ * @brief      Close the server side TLS/SSL connection and free any allocated resources.
+ *
+ * This function should be called to close each tls connection opened with esp_tls_server_session_create()
+ *
+ * @param[in]  tls  pointer to esp_tls_t
+ */
+void esp_tls_server_session_delete(esp_tls_t *tls);
+#endif /* ! CONFIG_ESP_TLS_SERVER */
+
+/**
+ * @brief Creates a plain TCP connection, returning a valid socket fd on success or an error handle
+ *
+ * @param[in]  host      Hostname of the host.
+ * @param[in]  hostlen   Length of hostname.
+ * @param[in]  port      Port number of the host.
+ * @param[in]  cfg       ESP-TLS configuration as esp_tls_cfg_t.
+ * @param[out] error_handle ESP-TLS error handle holding potential errors occurred during connection
+ * @param[out] sockfd    Socket descriptor if successfully connected on TCP layer
+ * @return     ESP_OK   on success
+ *             ESP_ERR_INVALID_ARG if invalid output parameters
+ *             ESP-TLS based error codes on failure
+ */
+esp_err_t esp_tls_plain_tcp_connect(const char *host, int hostlen, int port, const esp_tls_cfg_t *cfg, esp_tls_error_handle_t error_handle, int *sockfd);
+
+#ifdef CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS
+/**
+ * @brief Obtain the client session ticket
+ *
+ * This function should be called when the TLS connection is already established.
+ * This can be passed again in the esp_tls_cfg_t structure, to appropriate tls session create (e.g. esp_tls_conn_http_new) API for session resumption.
+ *
+ * @param[in]  esp_tls context as esp_tls_t
+ * @return
+ *             Pointer to the saved client session.
+ *             NULL     on Failure
+ */
+esp_tls_client_session_t *esp_tls_get_client_session(esp_tls_t *tls);
+#endif /* CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! _ESP_TLS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp-tls/esp_tls_errors.h b/tools/sdk/esp32s3/include/esp-tls/esp_tls_errors.h
new file mode 100644
index 00000000000..ad104895aaf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-tls/esp_tls_errors.h
@@ -0,0 +1,99 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_TLS_ERRORS_H_
+#define _ESP_TLS_ERRORS_H_
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_ERR_ESP_TLS_BASE           0x8000             /*!< Starting number of ESP-TLS error codes */
+
+/* generic esp-tls error codes */
+#define ESP_ERR_ESP_TLS_CANNOT_RESOLVE_HOSTNAME           (ESP_ERR_ESP_TLS_BASE + 0x01)  /*!< Error if hostname couldn't be resolved upon tls connection */
+#define ESP_ERR_ESP_TLS_CANNOT_CREATE_SOCKET              (ESP_ERR_ESP_TLS_BASE + 0x02)  /*!< Failed to create socket */
+#define ESP_ERR_ESP_TLS_UNSUPPORTED_PROTOCOL_FAMILY       (ESP_ERR_ESP_TLS_BASE + 0x03)  /*!< Unsupported protocol family */
+#define ESP_ERR_ESP_TLS_FAILED_CONNECT_TO_HOST            (ESP_ERR_ESP_TLS_BASE + 0x04)  /*!< Failed to connect to host */
+#define ESP_ERR_ESP_TLS_SOCKET_SETOPT_FAILED              (ESP_ERR_ESP_TLS_BASE + 0x05)  /*!< failed to set/get socket option */
+#define ESP_ERR_ESP_TLS_CONNECTION_TIMEOUT                (ESP_ERR_ESP_TLS_BASE + 0x06)  /*!< new connection in esp_tls_low_level_conn connection timeouted */
+#define ESP_ERR_ESP_TLS_SE_FAILED                         (ESP_ERR_ESP_TLS_BASE + 0x07)  /*< esp-tls use Secure Element returned failed */
+#define ESP_ERR_ESP_TLS_TCP_CLOSED_FIN                    (ESP_ERR_ESP_TLS_BASE + 0x08)  /*< esp-tls's TPC transport connection has benn closed (in a clean way) */
+
+/* mbedtls specific error codes */
+#define ESP_ERR_MBEDTLS_CERT_PARTLY_OK                    (ESP_ERR_ESP_TLS_BASE + 0x10)  /*!< mbedtls parse certificates was partly successful */
+#define ESP_ERR_MBEDTLS_CTR_DRBG_SEED_FAILED              (ESP_ERR_ESP_TLS_BASE + 0x11)  /*!< mbedtls api returned error */
+#define ESP_ERR_MBEDTLS_SSL_SET_HOSTNAME_FAILED           (ESP_ERR_ESP_TLS_BASE + 0x12)  /*!< mbedtls api returned error */
+#define ESP_ERR_MBEDTLS_SSL_CONFIG_DEFAULTS_FAILED        (ESP_ERR_ESP_TLS_BASE + 0x13)  /*!< mbedtls api returned error */
+#define ESP_ERR_MBEDTLS_SSL_CONF_ALPN_PROTOCOLS_FAILED    (ESP_ERR_ESP_TLS_BASE + 0x14)  /*!< mbedtls api returned error */
+#define ESP_ERR_MBEDTLS_X509_CRT_PARSE_FAILED             (ESP_ERR_ESP_TLS_BASE + 0x15)  /*!< mbedtls api returned error */
+#define ESP_ERR_MBEDTLS_SSL_CONF_OWN_CERT_FAILED          (ESP_ERR_ESP_TLS_BASE + 0x16)  /*!< mbedtls api returned error */
+#define ESP_ERR_MBEDTLS_SSL_SETUP_FAILED                  (ESP_ERR_ESP_TLS_BASE + 0x17)  /*!< mbedtls api returned error */
+#define ESP_ERR_MBEDTLS_SSL_WRITE_FAILED                  (ESP_ERR_ESP_TLS_BASE + 0x18)  /*!< mbedtls api returned error */
+#define ESP_ERR_MBEDTLS_PK_PARSE_KEY_FAILED               (ESP_ERR_ESP_TLS_BASE + 0x19)  /*!< mbedtls api returned failed  */
+#define ESP_ERR_MBEDTLS_SSL_HANDSHAKE_FAILED              (ESP_ERR_ESP_TLS_BASE + 0x1A)  /*!< mbedtls api returned failed  */
+#define ESP_ERR_MBEDTLS_SSL_CONF_PSK_FAILED               (ESP_ERR_ESP_TLS_BASE + 0x1B)  /*!< mbedtls api returned failed  */
+#define ESP_ERR_MBEDTLS_SSL_TICKET_SETUP_FAILED           (ESP_ERR_ESP_TLS_BASE + 0x1C)  /*!< mbedtls api returned failed  */
+
+/* wolfssl specific error codes */
+#define ESP_ERR_WOLFSSL_SSL_SET_HOSTNAME_FAILED           (ESP_ERR_ESP_TLS_BASE + 0x31)  /*!< wolfSSL api returned error */
+#define ESP_ERR_WOLFSSL_SSL_CONF_ALPN_PROTOCOLS_FAILED    (ESP_ERR_ESP_TLS_BASE + 0x32)  /*!< wolfSSL api returned error */
+#define ESP_ERR_WOLFSSL_CERT_VERIFY_SETUP_FAILED          (ESP_ERR_ESP_TLS_BASE + 0x33)  /*!< wolfSSL api returned error */
+#define ESP_ERR_WOLFSSL_KEY_VERIFY_SETUP_FAILED           (ESP_ERR_ESP_TLS_BASE + 0x34)  /*!< wolfSSL api returned error */
+#define ESP_ERR_WOLFSSL_SSL_HANDSHAKE_FAILED              (ESP_ERR_ESP_TLS_BASE + 0x35)  /*!< wolfSSL api returned failed  */
+#define ESP_ERR_WOLFSSL_CTX_SETUP_FAILED                  (ESP_ERR_ESP_TLS_BASE + 0x36)  /*!< wolfSSL api returned failed */
+#define ESP_ERR_WOLFSSL_SSL_SETUP_FAILED                  (ESP_ERR_ESP_TLS_BASE + 0x37)  /*!< wolfSSL api returned failed */
+#define ESP_ERR_WOLFSSL_SSL_WRITE_FAILED                  (ESP_ERR_ESP_TLS_BASE + 0x38)  /*!< wolfSSL api returned failed */
+
+
+/**
+* Definition of errors reported from IO API (potentially non-blocking) in case of error:
+* - esp_tls_conn_read()
+* - esp_tls_conn_write()
+*/
+#ifdef CONFIG_ESP_TLS_USING_MBEDTLS
+#define ESP_TLS_ERR_SSL_WANT_READ                          MBEDTLS_ERR_SSL_WANT_READ
+#define ESP_TLS_ERR_SSL_WANT_WRITE                         MBEDTLS_ERR_SSL_WANT_WRITE
+#define ESP_TLS_ERR_SSL_TIMEOUT                            MBEDTLS_ERR_SSL_TIMEOUT
+#elif CONFIG_ESP_TLS_USING_WOLFSSL /* CONFIG_ESP_TLS_USING_MBEDTLS */
+#define ESP_TLS_ERR_SSL_WANT_READ                          -0x6900
+#define ESP_TLS_ERR_SSL_WANT_WRITE                         -0x6880
+#define ESP_TLS_ERR_SSL_TIMEOUT                            WOLFSSL_CBIO_ERR_TIMEOUT
+#endif /*CONFIG_ESP_TLS_USING_WOLFSSL */
+
+/**
+* Definition of different types/sources of error codes reported
+* from different components
+*/
+typedef enum {
+    ESP_TLS_ERR_TYPE_UNKNOWN = 0,
+    ESP_TLS_ERR_TYPE_SYSTEM,                /*!< System error -- errno */
+    ESP_TLS_ERR_TYPE_MBEDTLS,               /*!< Error code from mbedTLS library */
+    ESP_TLS_ERR_TYPE_MBEDTLS_CERT_FLAGS,    /*!< Certificate flags defined in mbedTLS */
+    ESP_TLS_ERR_TYPE_ESP,                   /*!< ESP-IDF error type -- esp_err_t  */
+    ESP_TLS_ERR_TYPE_WOLFSSL,               /*!< Error code from wolfSSL library */
+    ESP_TLS_ERR_TYPE_WOLFSSL_CERT_FLAGS,    /*!< Certificate flags defined in wolfSSL */
+    ESP_TLS_ERR_TYPE_MAX,                   /*!< Last err type -- invalid entry */
+} esp_tls_error_type_t;
+
+typedef struct esp_tls_last_error* esp_tls_error_handle_t;
+
+/**
+*  @brief Error structure containing relevant errors in case tls error occurred
+*/
+typedef struct esp_tls_last_error {
+    esp_err_t last_error;               /*!< error code (based on ESP_ERR_ESP_TLS_BASE) of the last occurred error */
+    int       esp_tls_error_code;       /*!< esp_tls error code from last esp_tls failed api */
+    int       esp_tls_flags;            /*!< last certification verification flags */
+} esp_tls_last_error_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_TLS_ERRORS_H_
diff --git a/tools/sdk/esp32s3/include/esp-tls/private_include/esp_tls_error_capture_internal.h b/tools/sdk/esp32s3/include/esp-tls/private_include/esp_tls_error_capture_internal.h
new file mode 100644
index 00000000000..a59a3b7b344
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-tls/private_include/esp_tls_error_capture_internal.h
@@ -0,0 +1,54 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __ESP_TLS_ERROR_CAPTURE_INTERNAL_H__
+#define __ESP_TLS_ERROR_CAPTURE_INTERNAL_H__
+/**
+* Note: this is an implementation placeholder for error logger.
+* This version is internal to esp-tls component and only saves single esp_err of last occurred error
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Error tracker logging macro to enable mapping tracking errors internally
+ * or using an external/global implementation
+ */
+#define ESP_INT_EVENT_TRACKER_CAPTURE(h, type, code)    esp_tls_internal_event_tracker_capture(h, type, code)
+
+/**
+ * @brief Internal tracker capture error
+ *
+ * This implementation saves latest errors of available types
+ *
+ * @param[in]  h        esp-tls error handle
+ * @param[in]  err_type Specific error type
+ * @param[int] code     Error code to capture
+ *
+ */
+void esp_tls_internal_event_tracker_capture(esp_tls_error_handle_t h, uint32_t type, int code);
+
+/**
+ * @brief Create internal tracker storage
+ *
+ * @return Error tracker handle if success or NULL if allocation error
+ */
+esp_tls_error_handle_t esp_tls_internal_event_tracker_create(void);
+
+/**
+ * @brief Destroy internal tracker storage
+ *
+ * @param[in]  h        esp-tls error handle
+ */
+ void esp_tls_internal_event_tracker_destroy(esp_tls_error_handle_t h);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //__ESP_TLS_ERROR_CAPTURE_INTERNAL_H__
diff --git a/tools/sdk/esp32s3/include/esp-tls/private_include/esp_tls_mbedtls.h b/tools/sdk/esp32s3/include/esp-tls/private_include/esp_tls_mbedtls.h
new file mode 100644
index 00000000000..c1c5d4f3288
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-tls/private_include/esp_tls_mbedtls.h
@@ -0,0 +1,127 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_tls.h"
+
+/**
+ * Internal Callback API for mbedtls_ssl_read
+ */
+ssize_t esp_mbedtls_read(esp_tls_t *tls, char *data, size_t datalen);
+
+/**
+ * Internal callback API for mbedtls_ssl_write
+ */
+ssize_t esp_mbedtls_write(esp_tls_t *tls, const char *data, size_t datalen);
+
+/**
+ * Internal Callback for mbedtls_handshake
+ */
+int esp_mbedtls_handshake(esp_tls_t *tls, const esp_tls_cfg_t *cfg);
+
+/**
+ * Internal Callback for mbedtls_cleanup , frees up all the memory used by mbedtls
+ */
+void esp_mbedtls_cleanup(esp_tls_t *tls);
+
+/**
+ * Internal Callback for Certificate verification for mbedtls
+ */
+void esp_mbedtls_verify_certificate(esp_tls_t *tls);
+
+/**
+ * Internal Callback for deleting the mbedtls connection
+ */
+void esp_mbedtls_conn_delete(esp_tls_t *tls);
+
+/**
+ * Internal Callback for mbedtls_get_bytes_avail
+ */
+ssize_t esp_mbedtls_get_bytes_avail(esp_tls_t *tls);
+
+/**
+ * Internal Callback for creating ssl handle for mbedtls
+ */
+esp_err_t esp_create_mbedtls_handle(const char *hostname, size_t hostlen, const void *cfg, esp_tls_t *tls);
+
+/**
+ * mbedTLS function for Initializing socket wrappers
+ */
+static inline void esp_mbedtls_net_init(esp_tls_t *tls)
+{
+    mbedtls_net_init(&tls->server_fd);
+}
+
+#ifdef CONFIG_ESP_TLS_SERVER
+/**
+ * Internal Callback for set_server_config
+ *
+ * /note :- can only be used with mbedtls ssl library
+ */
+esp_err_t set_server_config(esp_tls_cfg_server_t *cfg, esp_tls_t *tls);
+
+/**
+ * Internal Callback for mbedtls_server_session_create
+ *
+ * /note :- The function can only be used with mbedtls ssl library
+ */
+int esp_mbedtls_server_session_create(esp_tls_cfg_server_t *cfg, int sockfd, esp_tls_t *tls);
+
+/**
+ * Internal Callback for mbedtls_server_session_delete
+ *
+ * /note :- The function can only be used with mbedtls ssl library
+ */
+void esp_mbedtls_server_session_delete(esp_tls_t *tls);
+
+#ifdef CONFIG_ESP_TLS_SERVER_SESSION_TICKETS
+/**
+ * Internal function to setup server side session ticket context
+ *
+ * /note :- The function can only be used with mbedtls ssl library
+ */
+esp_err_t esp_mbedtls_server_session_ticket_ctx_init(esp_tls_server_session_ticket_ctx_t *cfg);
+
+/**
+ * Internal function to free server side session ticket context
+ *
+ * /note :- The function can only be used with mbedtls ssl library
+ */
+void esp_mbedtls_server_session_ticket_ctx_free(esp_tls_server_session_ticket_ctx_t *cfg);
+#endif
+#endif
+
+/**
+ * Internal Callback for set_client_config_function
+ */
+esp_err_t set_client_config(const char *hostname, size_t hostlen, esp_tls_cfg_t *cfg, esp_tls_t *tls);
+
+#ifdef CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS
+/**
+ * Internal Callback for mbedtls_get_client_session
+ */
+esp_tls_client_session_t *esp_mbedtls_get_client_session(esp_tls_t *tls);
+#endif
+
+/**
+ * Internal Callback for mbedtls_init_global_ca_store
+ */
+esp_err_t esp_mbedtls_init_global_ca_store(void);
+
+/**
+ * Callback function for setting global CA store data for TLS/SSL using mbedtls
+ */
+esp_err_t esp_mbedtls_set_global_ca_store(const unsigned char *cacert_pem_buf, const unsigned int cacert_pem_bytes);
+
+/**
+ * Internal Callback for esp_tls_global_ca_store
+ */
+mbedtls_x509_crt *esp_mbedtls_get_global_ca_store(void);
+
+/**
+ * Callback function for freeing global ca store for TLS/SSL using mbedtls
+ */
+void esp_mbedtls_free_global_ca_store(void);
diff --git a/tools/sdk/esp32s3/include/esp-tls/private_include/esp_tls_wolfssl.h b/tools/sdk/esp32s3/include/esp-tls/private_include/esp_tls_wolfssl.h
new file mode 100644
index 00000000000..a0c86730b7d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp-tls/private_include/esp_tls_wolfssl.h
@@ -0,0 +1,85 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_tls.h"
+
+/**
+ * Internal Callback for creating ssl handle for wolfssl
+ */
+int esp_create_wolfssl_handle(const char *hostname, size_t hostlen, const void *cfg, esp_tls_t *tls);
+
+/**
+ * Internal Callback for wolfssl_handshake
+ */
+int esp_wolfssl_handshake(esp_tls_t *tls, const esp_tls_cfg_t *cfg);
+
+/**
+ * Internal Callback API for wolfssl_ssl_read
+ */
+ssize_t esp_wolfssl_read(esp_tls_t *tls, char *data, size_t datalen);
+
+/**
+ * Internal callback API for wolfssl_ssl_write
+ */
+ssize_t esp_wolfssl_write(esp_tls_t *tls, const char *data, size_t datalen);
+
+/**
+ * Internal Callback for wolfssl_cleanup , frees up all the memory used by wolfssl
+ */
+void esp_wolfssl_cleanup(esp_tls_t *tls);
+
+/**
+ * Internal Callback for Certificate verification for wolfssl
+ */
+void esp_wolfssl_verify_certificate(esp_tls_t *tls);
+
+/**
+ * Internal Callback for deleting the wolfssl connection
+ */
+void esp_wolfssl_conn_delete(esp_tls_t *tls);
+
+/**
+ * Internal Callback for wolfssl_get_bytes_avail
+ */
+ssize_t esp_wolfssl_get_bytes_avail(esp_tls_t *tls);
+
+/**
+ * Callback function for setting global CA store data for TLS/SSL using wolfssl
+ */
+esp_err_t esp_wolfssl_set_global_ca_store(const unsigned char *cacert_pem_buf, const unsigned int cacert_pem_bytes);
+
+/**
+ * Callback function for freeing global ca store for TLS/SSL using wolfssl
+ */
+void esp_wolfssl_free_global_ca_store(void);
+
+/**
+ *
+ * Callback function for Initializing the global ca store for TLS?SSL using wolfssl
+ */
+esp_err_t esp_wolfssl_init_global_ca_store(void);
+
+/**
+ * wolfSSL function for Initializing socket wrappers (no-operation for wolfSSL)
+ */
+static inline void esp_wolfssl_net_init(esp_tls_t *tls)
+{
+}
+
+#ifdef CONFIG_ESP_TLS_SERVER
+
+/**
+ * Function to Create ESP-TLS Server session with wolfssl Stack
+ */
+int esp_wolfssl_server_session_create(esp_tls_cfg_server_t *cfg, int sockfd, esp_tls_t *tls);
+
+/*
+ * Delete Server Session
+ */
+void esp_wolfssl_server_session_delete(esp_tls_t *tls);
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp32-camera/conversions/include/esp_jpg_decode.h b/tools/sdk/esp32s3/include/esp32-camera/conversions/include/esp_jpg_decode.h
new file mode 100644
index 00000000000..f13536edf4d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp32-camera/conversions/include/esp_jpg_decode.h
@@ -0,0 +1,43 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ESP_JPG_DECODE_H_
+#define _ESP_JPG_DECODE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+typedef enum {
+    JPG_SCALE_NONE,
+    JPG_SCALE_2X,
+    JPG_SCALE_4X,
+    JPG_SCALE_8X,
+    JPG_SCALE_MAX = JPG_SCALE_8X
+} jpg_scale_t;
+
+typedef size_t (* jpg_reader_cb)(void * arg, size_t index, uint8_t *buf, size_t len);
+typedef bool (* jpg_writer_cb)(void * arg, uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint8_t *data);
+
+esp_err_t esp_jpg_decode(size_t len, jpg_scale_t scale, jpg_reader_cb reader, jpg_writer_cb writer, void * arg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_JPG_DECODE_H_ */
diff --git a/tools/sdk/esp32s3/include/esp32-camera/conversions/include/img_converters.h b/tools/sdk/esp32s3/include/esp32-camera/conversions/include/img_converters.h
new file mode 100644
index 00000000000..f736200a9b2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp32-camera/conversions/include/img_converters.h
@@ -0,0 +1,130 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _IMG_CONVERTERS_H_
+#define _IMG_CONVERTERS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_camera.h"
+#include "esp_jpg_decode.h"
+
+typedef size_t (* jpg_out_cb)(void * arg, size_t index, const void* data, size_t len);
+
+/**
+ * @brief Convert image buffer to JPEG
+ *
+ * @param src       Source buffer in RGB565, RGB888, YUYV or GRAYSCALE format
+ * @param src_len   Length in bytes of the source buffer
+ * @param width     Width in pixels of the source image
+ * @param height    Height in pixels of the source image
+ * @param format    Format of the source image
+ * @param quality   JPEG quality of the resulting image
+ * @param cp        Callback to be called to write the bytes of the output JPEG
+ * @param arg       Pointer to be passed to the callback
+ *
+ * @return true on success
+ */
+bool fmt2jpg_cb(uint8_t *src, size_t src_len, uint16_t width, uint16_t height, pixformat_t format, uint8_t quality, jpg_out_cb cb, void * arg);
+
+/**
+ * @brief Convert camera frame buffer to JPEG
+ *
+ * @param fb        Source camera frame buffer
+ * @param quality   JPEG quality of the resulting image
+ * @param cp        Callback to be called to write the bytes of the output JPEG
+ * @param arg       Pointer to be passed to the callback
+ *
+ * @return true on success
+ */
+bool frame2jpg_cb(camera_fb_t * fb, uint8_t quality, jpg_out_cb cb, void * arg);
+
+/**
+ * @brief Convert image buffer to JPEG buffer
+ *
+ * @param src       Source buffer in RGB565, RGB888, YUYV or GRAYSCALE format
+ * @param src_len   Length in bytes of the source buffer
+ * @param width     Width in pixels of the source image
+ * @param height    Height in pixels of the source image
+ * @param format    Format of the source image
+ * @param quality   JPEG quality of the resulting image
+ * @param out       Pointer to be populated with the address of the resulting buffer.
+ *                  You MUST free the pointer once you are done with it.
+ * @param out_len   Pointer to be populated with the length of the output buffer
+ *
+ * @return true on success
+ */
+bool fmt2jpg(uint8_t *src, size_t src_len, uint16_t width, uint16_t height, pixformat_t format, uint8_t quality, uint8_t ** out, size_t * out_len);
+
+/**
+ * @brief Convert camera frame buffer to JPEG buffer
+ *
+ * @param fb        Source camera frame buffer
+ * @param quality   JPEG quality of the resulting image
+ * @param out       Pointer to be populated with the address of the resulting buffer
+ * @param out_len   Pointer to be populated with the length of the output buffer
+ *
+ * @return true on success
+ */
+bool frame2jpg(camera_fb_t * fb, uint8_t quality, uint8_t ** out, size_t * out_len);
+
+/**
+ * @brief Convert image buffer to BMP buffer
+ *
+ * @param src       Source buffer in JPEG, RGB565, RGB888, YUYV or GRAYSCALE format
+ * @param src_len   Length in bytes of the source buffer
+ * @param width     Width in pixels of the source image
+ * @param height    Height in pixels of the source image
+ * @param format    Format of the source image
+ * @param out       Pointer to be populated with the address of the resulting buffer
+ * @param out_len   Pointer to be populated with the length of the output buffer
+ *
+ * @return true on success
+ */
+bool fmt2bmp(uint8_t *src, size_t src_len, uint16_t width, uint16_t height, pixformat_t format, uint8_t ** out, size_t * out_len);
+
+/**
+ * @brief Convert camera frame buffer to BMP buffer
+ *
+ * @param fb        Source camera frame buffer
+ * @param out       Pointer to be populated with the address of the resulting buffer
+ * @param out_len   Pointer to be populated with the length of the output buffer
+ *
+ * @return true on success
+ */
+bool frame2bmp(camera_fb_t * fb, uint8_t ** out, size_t * out_len);
+
+/**
+ * @brief Convert image buffer to RGB888 buffer (used for face detection)
+ *
+ * @param src       Source buffer in JPEG, RGB565, RGB888, YUYV or GRAYSCALE format
+ * @param src_len   Length in bytes of the source buffer
+ * @param format    Format of the source image
+ * @param rgb_buf   Pointer to the output buffer (width * height * 3)
+ *
+ * @return true on success
+ */
+bool fmt2rgb888(const uint8_t *src_buf, size_t src_len, pixformat_t format, uint8_t * rgb_buf);
+
+bool jpg2rgb565(const uint8_t *src, size_t src_len, uint8_t * out, jpg_scale_t scale);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _IMG_CONVERTERS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp32-camera/driver/include/esp_camera.h b/tools/sdk/esp32s3/include/esp32-camera/driver/include/esp_camera.h
new file mode 100755
index 00000000000..b6047d312ae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp32-camera/driver/include/esp_camera.h
@@ -0,0 +1,214 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+/*
+ * Example Use
+ *
+    static camera_config_t camera_example_config = {
+        .pin_pwdn       = PIN_PWDN,
+        .pin_reset      = PIN_RESET,
+        .pin_xclk       = PIN_XCLK,
+        .pin_sscb_sda   = PIN_SIOD,
+        .pin_sscb_scl   = PIN_SIOC,
+        .pin_d7         = PIN_D7,
+        .pin_d6         = PIN_D6,
+        .pin_d5         = PIN_D5,
+        .pin_d4         = PIN_D4,
+        .pin_d3         = PIN_D3,
+        .pin_d2         = PIN_D2,
+        .pin_d1         = PIN_D1,
+        .pin_d0         = PIN_D0,
+        .pin_vsync      = PIN_VSYNC,
+        .pin_href       = PIN_HREF,
+        .pin_pclk       = PIN_PCLK,
+
+        .xclk_freq_hz   = 20000000,
+        .ledc_timer     = LEDC_TIMER_0,
+        .ledc_channel   = LEDC_CHANNEL_0,
+        .pixel_format   = PIXFORMAT_JPEG,
+        .frame_size     = FRAMESIZE_SVGA,
+        .jpeg_quality   = 10,
+        .fb_count       = 2,
+        .grab_mode      = CAMERA_GRAB_WHEN_EMPTY
+    };
+
+    esp_err_t camera_example_init(){
+        return esp_camera_init(&camera_example_config);
+    }
+
+    esp_err_t camera_example_capture(){
+        //capture a frame
+        camera_fb_t * fb = esp_camera_fb_get();
+        if (!fb) {
+            ESP_LOGE(TAG, "Frame buffer could not be acquired");
+            return ESP_FAIL;
+        }
+
+        //replace this with your own function
+        display_image(fb->width, fb->height, fb->pixformat, fb->buf, fb->len);
+
+        //return the frame buffer back to be reused
+        esp_camera_fb_return(fb);
+
+        return ESP_OK;
+    }
+*/
+
+#pragma once
+
+#include "esp_err.h"
+#include "driver/ledc.h"
+#include "sensor.h"
+#include "sys/time.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configuration structure for camera initialization
+ */
+typedef enum {
+    CAMERA_GRAB_WHEN_EMPTY,         /*!< Fills buffers when they are empty. Less resources but first 'fb_count' frames might be old */
+    CAMERA_GRAB_LATEST              /*!< Except when 1 frame buffer is used, queue will always contain the last 'fb_count' frames */
+} camera_grab_mode_t;
+
+/**
+ * @brief Camera frame buffer location 
+ */
+typedef enum {
+    CAMERA_FB_IN_PSRAM,         /*!< Frame buffer is placed in external PSRAM */
+    CAMERA_FB_IN_DRAM           /*!< Frame buffer is placed in internal DRAM */
+} camera_fb_location_t;
+
+/**
+ * @brief Configuration structure for camera initialization
+ */
+typedef struct {
+    int pin_pwdn;                   /*!< GPIO pin for camera power down line */
+    int pin_reset;                  /*!< GPIO pin for camera reset line */
+    int pin_xclk;                   /*!< GPIO pin for camera XCLK line */
+    int pin_sscb_sda;               /*!< GPIO pin for camera SDA line */
+    int pin_sscb_scl;               /*!< GPIO pin for camera SCL line */
+    int pin_d7;                     /*!< GPIO pin for camera D7 line */
+    int pin_d6;                     /*!< GPIO pin for camera D6 line */
+    int pin_d5;                     /*!< GPIO pin for camera D5 line */
+    int pin_d4;                     /*!< GPIO pin for camera D4 line */
+    int pin_d3;                     /*!< GPIO pin for camera D3 line */
+    int pin_d2;                     /*!< GPIO pin for camera D2 line */
+    int pin_d1;                     /*!< GPIO pin for camera D1 line */
+    int pin_d0;                     /*!< GPIO pin for camera D0 line */
+    int pin_vsync;                  /*!< GPIO pin for camera VSYNC line */
+    int pin_href;                   /*!< GPIO pin for camera HREF line */
+    int pin_pclk;                   /*!< GPIO pin for camera PCLK line */
+
+    int xclk_freq_hz;               /*!< Frequency of XCLK signal, in Hz. EXPERIMENTAL: Set to 16MHz on ESP32-S2 or ESP32-S3 to enable EDMA mode */
+
+    ledc_timer_t ledc_timer;        /*!< LEDC timer to be used for generating XCLK  */
+    ledc_channel_t ledc_channel;    /*!< LEDC channel to be used for generating XCLK  */
+
+    pixformat_t pixel_format;       /*!< Format of the pixel data: PIXFORMAT_ + YUV422|GRAYSCALE|RGB565|JPEG  */
+    framesize_t frame_size;         /*!< Size of the output image: FRAMESIZE_ + QVGA|CIF|VGA|SVGA|XGA|SXGA|UXGA  */
+
+    int jpeg_quality;               /*!< Quality of JPEG output. 0-63 lower means higher quality  */
+    size_t fb_count;                /*!< Number of frame buffers to be allocated. If more than one, then each frame will be acquired (double speed)  */
+    camera_fb_location_t fb_location; /*!< The location where the frame buffer will be allocated */
+    camera_grab_mode_t grab_mode;   /*!< When buffers should be filled */
+} camera_config_t;
+
+/**
+ * @brief Data structure of camera frame buffer
+ */
+typedef struct {
+    uint8_t * buf;              /*!< Pointer to the pixel data */
+    size_t len;                 /*!< Length of the buffer in bytes */
+    size_t width;               /*!< Width of the buffer in pixels */
+    size_t height;              /*!< Height of the buffer in pixels */
+    pixformat_t format;         /*!< Format of the pixel data */
+    struct timeval timestamp;   /*!< Timestamp since boot of the first DMA buffer of the frame */
+} camera_fb_t;
+
+#define ESP_ERR_CAMERA_BASE 0x20000
+#define ESP_ERR_CAMERA_NOT_DETECTED             (ESP_ERR_CAMERA_BASE + 1)
+#define ESP_ERR_CAMERA_FAILED_TO_SET_FRAME_SIZE (ESP_ERR_CAMERA_BASE + 2)
+#define ESP_ERR_CAMERA_FAILED_TO_SET_OUT_FORMAT (ESP_ERR_CAMERA_BASE + 3)
+#define ESP_ERR_CAMERA_NOT_SUPPORTED            (ESP_ERR_CAMERA_BASE + 4)
+
+/**
+ * @brief Initialize the camera driver
+ *
+ * @note call camera_probe before calling this function
+ *
+ * This function detects and configures camera over I2C interface,
+ * allocates framebuffer and DMA buffers,
+ * initializes parallel I2S input, and sets up DMA descriptors.
+ *
+ * Currently this function can only be called once and there is
+ * no way to de-initialize this module.
+ *
+ * @param config  Camera configuration parameters
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_camera_init(const camera_config_t* config);
+
+/**
+ * @brief Deinitialize the camera driver
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if the driver hasn't been initialized yet
+ */
+esp_err_t esp_camera_deinit();
+
+/**
+ * @brief Obtain pointer to a frame buffer.
+ *
+ * @return pointer to the frame buffer
+ */
+camera_fb_t* esp_camera_fb_get();
+
+/**
+ * @brief Return the frame buffer to be reused again.
+ *
+ * @param fb    Pointer to the frame buffer
+ */
+void esp_camera_fb_return(camera_fb_t * fb);
+
+/**
+ * @brief Get a pointer to the image sensor control structure
+ *
+ * @return pointer to the sensor
+ */
+sensor_t * esp_camera_sensor_get();
+
+/**
+ * @brief Save camera settings to non-volatile-storage (NVS)
+ * 
+ * @param key   A unique nvs key name for the camera settings 
+ */
+esp_err_t esp_camera_save_to_nvs(const char *key);
+
+/**
+ * @brief Load camera settings from non-volatile-storage (NVS)
+ * 
+ * @param key   A unique nvs key name for the camera settings 
+ */
+esp_err_t esp_camera_load_from_nvs(const char *key);
+
+#ifdef __cplusplus
+}
+#endif
+
+#include "img_converters.h"
+
diff --git a/tools/sdk/esp32s3/include/esp32-camera/driver/include/sensor.h b/tools/sdk/esp32s3/include/esp32-camera/driver/include/sensor.h
new file mode 100755
index 00000000000..26afeec3fd5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp32-camera/driver/include/sensor.h
@@ -0,0 +1,251 @@
+/*
+ * This file is part of the OpenMV project.
+ * Copyright (c) 2013/2014 Ibrahim Abdelkader <i.abdalkader@gmail.com>
+ * This work is licensed under the MIT license, see the file LICENSE for details.
+ *
+ * Sensor abstraction layer.
+ *
+ */
+#ifndef __SENSOR_H__
+#define __SENSOR_H__
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    OV9650_PID = 0x96,
+    OV7725_PID = 0x77,
+    OV2640_PID = 0x26,
+    OV3660_PID = 0x3660,
+    OV5640_PID = 0x5640,
+    OV7670_PID = 0x76,
+    NT99141_PID = 0x1410,
+    GC2145_PID = 0x2145,
+    GC032A_PID = 0x232a,
+    GC0308_PID = 0x9b,
+    BF3005_PID = 0x30,
+    BF20A6_PID = 0x20a6,
+} camera_pid_t;
+
+typedef enum {
+    CAMERA_OV7725,
+    CAMERA_OV2640,
+    CAMERA_OV3660,
+    CAMERA_OV5640,
+    CAMERA_OV7670,
+    CAMERA_NT99141,
+    CAMERA_GC2145,
+    CAMERA_GC032A,
+    CAMERA_GC0308,
+    CAMERA_BF3005,
+    CAMERA_BF20A6,
+    CAMERA_MODEL_MAX,
+    CAMERA_NONE,
+} camera_model_t;
+
+typedef enum {
+    OV2640_SCCB_ADDR   = 0x30,// 0x60 >> 1
+    OV5640_SCCB_ADDR   = 0x3C,// 0x78 >> 1
+    OV3660_SCCB_ADDR   = 0x3C,// 0x78 >> 1
+    OV7725_SCCB_ADDR   = 0x21,// 0x42 >> 1
+    OV7670_SCCB_ADDR   = 0x21,// 0x42 >> 1
+    NT99141_SCCB_ADDR  = 0x2A,// 0x54 >> 1
+    GC2145_SCCB_ADDR   = 0x3C,// 0x78 >> 1
+    GC032A_SCCB_ADDR   = 0x21,// 0x42 >> 1
+    GC0308_SCCB_ADDR   = 0x21,// 0x42 >> 1
+    BF3005_SCCB_ADDR   = 0x6E,
+    BF20A6_SCCB_ADDR   = 0x6E,
+} camera_sccb_addr_t;
+
+typedef enum {
+    PIXFORMAT_RGB565,    // 2BPP/RGB565
+    PIXFORMAT_YUV422,    // 2BPP/YUV422
+    PIXFORMAT_GRAYSCALE, // 1BPP/GRAYSCALE
+    PIXFORMAT_JPEG,      // JPEG/COMPRESSED
+    PIXFORMAT_RGB888,    // 3BPP/RGB888
+    PIXFORMAT_RAW,       // RAW
+    PIXFORMAT_RGB444,    // 3BP2P/RGB444
+    PIXFORMAT_RGB555,    // 3BP2P/RGB555
+} pixformat_t;
+
+typedef enum {
+    FRAMESIZE_96X96,    // 96x96
+    FRAMESIZE_QQVGA,    // 160x120
+    FRAMESIZE_QCIF,     // 176x144
+    FRAMESIZE_HQVGA,    // 240x176
+    FRAMESIZE_240X240,  // 240x240
+    FRAMESIZE_QVGA,     // 320x240
+    FRAMESIZE_CIF,      // 400x296
+    FRAMESIZE_HVGA,     // 480x320
+    FRAMESIZE_VGA,      // 640x480
+    FRAMESIZE_SVGA,     // 800x600
+    FRAMESIZE_XGA,      // 1024x768
+    FRAMESIZE_HD,       // 1280x720
+    FRAMESIZE_SXGA,     // 1280x1024
+    FRAMESIZE_UXGA,     // 1600x1200
+    // 3MP Sensors
+    FRAMESIZE_FHD,      // 1920x1080
+    FRAMESIZE_P_HD,     //  720x1280
+    FRAMESIZE_P_3MP,    //  864x1536
+    FRAMESIZE_QXGA,     // 2048x1536
+    // 5MP Sensors
+    FRAMESIZE_QHD,      // 2560x1440
+    FRAMESIZE_WQXGA,    // 2560x1600
+    FRAMESIZE_P_FHD,    // 1080x1920
+    FRAMESIZE_QSXGA,    // 2560x1920
+    FRAMESIZE_INVALID
+} framesize_t;
+
+typedef struct {
+    const camera_model_t model;
+    const char *name;
+    const camera_sccb_addr_t sccb_addr;
+    const camera_pid_t pid;
+    const framesize_t max_size;
+    const bool support_jpeg;
+} camera_sensor_info_t;
+
+typedef enum {
+    ASPECT_RATIO_4X3,
+    ASPECT_RATIO_3X2,
+    ASPECT_RATIO_16X10,
+    ASPECT_RATIO_5X3,
+    ASPECT_RATIO_16X9,
+    ASPECT_RATIO_21X9,
+    ASPECT_RATIO_5X4,
+    ASPECT_RATIO_1X1,
+    ASPECT_RATIO_9X16
+} aspect_ratio_t;
+
+typedef enum {
+    GAINCEILING_2X,
+    GAINCEILING_4X,
+    GAINCEILING_8X,
+    GAINCEILING_16X,
+    GAINCEILING_32X,
+    GAINCEILING_64X,
+    GAINCEILING_128X,
+} gainceiling_t;
+
+typedef struct {
+        uint16_t max_width;
+        uint16_t max_height;
+        uint16_t start_x;
+        uint16_t start_y;
+        uint16_t end_x;
+        uint16_t end_y;
+        uint16_t offset_x;
+        uint16_t offset_y;
+        uint16_t total_x;
+        uint16_t total_y;
+} ratio_settings_t;
+
+typedef struct {
+        const uint16_t width;
+        const uint16_t height;
+        const aspect_ratio_t aspect_ratio;
+} resolution_info_t;
+
+// Resolution table (in sensor.c)
+extern const resolution_info_t resolution[];
+// camera sensor table (in sensor.c)
+extern const camera_sensor_info_t camera_sensor[];
+
+typedef struct {
+    uint8_t MIDH;
+    uint8_t MIDL;
+    uint16_t PID;
+    uint8_t VER;
+} sensor_id_t;
+
+typedef struct {
+    framesize_t framesize;//0 - 10
+    bool scale;
+    bool binning;
+    uint8_t quality;//0 - 63
+    int8_t brightness;//-2 - 2
+    int8_t contrast;//-2 - 2
+    int8_t saturation;//-2 - 2
+    int8_t sharpness;//-2 - 2
+    uint8_t denoise;
+    uint8_t special_effect;//0 - 6
+    uint8_t wb_mode;//0 - 4
+    uint8_t awb;
+    uint8_t awb_gain;
+    uint8_t aec;
+    uint8_t aec2;
+    int8_t ae_level;//-2 - 2
+    uint16_t aec_value;//0 - 1200
+    uint8_t agc;
+    uint8_t agc_gain;//0 - 30
+    uint8_t gainceiling;//0 - 6
+    uint8_t bpc;
+    uint8_t wpc;
+    uint8_t raw_gma;
+    uint8_t lenc;
+    uint8_t hmirror;
+    uint8_t vflip;
+    uint8_t dcw;
+    uint8_t colorbar;
+} camera_status_t;
+
+typedef struct _sensor sensor_t;
+typedef struct _sensor {
+    sensor_id_t id;             // Sensor ID.
+    uint8_t  slv_addr;          // Sensor I2C slave address.
+    pixformat_t pixformat;
+    camera_status_t status;
+    int xclk_freq_hz;
+
+    // Sensor function pointers
+    int  (*init_status)         (sensor_t *sensor);
+    int  (*reset)               (sensor_t *sensor);
+    int  (*set_pixformat)       (sensor_t *sensor, pixformat_t pixformat);
+    int  (*set_framesize)       (sensor_t *sensor, framesize_t framesize);
+    int  (*set_contrast)        (sensor_t *sensor, int level);
+    int  (*set_brightness)      (sensor_t *sensor, int level);
+    int  (*set_saturation)      (sensor_t *sensor, int level);
+    int  (*set_sharpness)       (sensor_t *sensor, int level);
+    int  (*set_denoise)         (sensor_t *sensor, int level);
+    int  (*set_gainceiling)     (sensor_t *sensor, gainceiling_t gainceiling);
+    int  (*set_quality)         (sensor_t *sensor, int quality);
+    int  (*set_colorbar)        (sensor_t *sensor, int enable);
+    int  (*set_whitebal)        (sensor_t *sensor, int enable);
+    int  (*set_gain_ctrl)       (sensor_t *sensor, int enable);
+    int  (*set_exposure_ctrl)   (sensor_t *sensor, int enable);
+    int  (*set_hmirror)         (sensor_t *sensor, int enable);
+    int  (*set_vflip)           (sensor_t *sensor, int enable);
+
+    int  (*set_aec2)            (sensor_t *sensor, int enable);
+    int  (*set_awb_gain)        (sensor_t *sensor, int enable);
+    int  (*set_agc_gain)        (sensor_t *sensor, int gain);
+    int  (*set_aec_value)       (sensor_t *sensor, int gain);
+
+    int  (*set_special_effect)  (sensor_t *sensor, int effect);
+    int  (*set_wb_mode)         (sensor_t *sensor, int mode);
+    int  (*set_ae_level)        (sensor_t *sensor, int level);
+
+    int  (*set_dcw)             (sensor_t *sensor, int enable);
+    int  (*set_bpc)             (sensor_t *sensor, int enable);
+    int  (*set_wpc)             (sensor_t *sensor, int enable);
+
+    int  (*set_raw_gma)         (sensor_t *sensor, int enable);
+    int  (*set_lenc)            (sensor_t *sensor, int enable);
+
+    int  (*get_reg)             (sensor_t *sensor, int reg, int mask);
+    int  (*set_reg)             (sensor_t *sensor, int reg, int mask, int value);
+    int  (*set_res_raw)         (sensor_t *sensor, int startX, int startY, int endX, int endY, int offsetX, int offsetY, int totalX, int totalY, int outputX, int outputY, bool scale, bool binning);
+    int  (*set_pll)             (sensor_t *sensor, int bypass, int mul, int sys, int root, int pre, int seld5, int pclken, int pclk);
+    int  (*set_xclk)            (sensor_t *sensor, int timer, int xclk);
+} sensor_t;
+
+camera_sensor_info_t *esp_camera_sensor_get_info(sensor_id_t *id);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __SENSOR_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_adc_cal/include/esp_adc_cal.h b/tools/sdk/esp32s3/include/esp_adc_cal/include/esp_adc_cal.h
new file mode 100644
index 00000000000..445b7f65d34
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_adc_cal/include/esp_adc_cal.h
@@ -0,0 +1,135 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __ESP_ADC_CAL_H__
+#define __ESP_ADC_CAL_H__
+
+#include <stdint.h>
+#include "esp_err.h"
+#include "driver/adc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Type of calibration value used in characterization
+ */
+typedef enum {
+    ESP_ADC_CAL_VAL_EFUSE_VREF = 0,         /**< Characterization based on reference voltage stored in eFuse*/
+    ESP_ADC_CAL_VAL_EFUSE_TP = 1,           /**< Characterization based on Two Point values stored in eFuse*/
+    ESP_ADC_CAL_VAL_DEFAULT_VREF = 2,       /**< Characterization based on default reference voltage*/
+    ESP_ADC_CAL_VAL_EFUSE_TP_FIT = 3,       /**< Characterization based on Two Point values and fitting curve coefficients stored in eFuse */
+    ESP_ADC_CAL_VAL_MAX,
+    ESP_ADC_CAL_VAL_NOT_SUPPORTED = ESP_ADC_CAL_VAL_MAX,
+} esp_adc_cal_value_t;
+
+/**
+ * @brief Structure storing characteristics of an ADC
+ *
+ * @note Call esp_adc_cal_characterize() to initialize the structure
+ */
+typedef struct {
+    adc_unit_t adc_num;                     /**< ADC number*/
+    adc_atten_t atten;                      /**< ADC attenuation*/
+    adc_bits_width_t bit_width;             /**< ADC bit width */
+    uint32_t coeff_a;                       /**< Gradient of ADC-Voltage curve*/
+    uint32_t coeff_b;                       /**< Offset of ADC-Voltage curve*/
+    uint32_t vref;                          /**< Vref used by lookup table*/
+    const uint32_t *low_curve;              /**< Pointer to low Vref curve of lookup table (NULL if unused)*/
+    const uint32_t *high_curve;             /**< Pointer to high Vref curve of lookup table (NULL if unused)*/
+    uint8_t version;                        /**< ADC Calibration */
+} esp_adc_cal_characteristics_t;
+
+/**
+ * @brief Checks if ADC calibration values are burned into eFuse
+ *
+ * This function checks if ADC reference voltage or Two Point values have been
+ * burned to the eFuse of the current ESP32
+ *
+ * @param   value_type  Type of calibration value (ESP_ADC_CAL_VAL_EFUSE_VREF or ESP_ADC_CAL_VAL_EFUSE_TP)
+ * @note in ESP32S2, only ESP_ADC_CAL_VAL_EFUSE_TP is supported. Some old ESP32S2s do not support this, either.
+ * In which case you have to calibrate it manually, possibly by performing your own two-point calibration on the chip.
+ *
+ * @return
+ *      - ESP_OK: The calibration mode is supported in eFuse
+ *      - ESP_ERR_NOT_SUPPORTED: Error, eFuse values are not burned
+ *      - ESP_ERR_INVALID_ARG: Error, invalid argument (ESP_ADC_CAL_VAL_DEFAULT_VREF)
+ */
+esp_err_t esp_adc_cal_check_efuse(esp_adc_cal_value_t value_type);
+
+/**
+ * @brief Characterize an ADC at a particular attenuation
+ *
+ * This function will characterize the ADC at a particular attenuation and generate
+ * the ADC-Voltage curve in the form of [y = coeff_a * x + coeff_b].
+ * Characterization can be based on Two Point values, eFuse Vref, or default Vref
+ * and the calibration values will be prioritized in that order.
+ *
+ * @note
+ * For ESP32, Two Point values and eFuse Vref calibration can be enabled/disabled using menuconfig.
+ * For ESP32s2, only Two Point values calibration and only ADC_WIDTH_BIT_13 is supported. The parameter default_vref is unused.
+ *
+ *
+ * @param[in]   adc_num         ADC to characterize (ADC_UNIT_1 or ADC_UNIT_2)
+ * @param[in]   atten           Attenuation to characterize
+ * @param[in]   bit_width       Bit width configuration of ADC
+ * @param[in]   default_vref    Default ADC reference voltage in mV (Only in ESP32, used if eFuse values is not available)
+ * @param[out]  chars           Pointer to empty structure used to store ADC characteristics
+ *
+ * @return
+ *      - ESP_ADC_CAL_VAL_EFUSE_VREF: eFuse Vref used for characterization
+ *      - ESP_ADC_CAL_VAL_EFUSE_TP: Two Point value used for characterization (only in Linear Mode)
+ *      - ESP_ADC_CAL_VAL_DEFAULT_VREF: Default Vref used for characterization
+ */
+esp_adc_cal_value_t esp_adc_cal_characterize(adc_unit_t adc_num,
+                                             adc_atten_t atten,
+                                             adc_bits_width_t bit_width,
+                                             uint32_t default_vref,
+                                             esp_adc_cal_characteristics_t *chars);
+
+/**
+ * @brief   Convert an ADC reading to voltage in mV
+ *
+ * This function converts an ADC reading to a voltage in mV based on the ADC's
+ * characteristics.
+ *
+ * @note    Characteristics structure must be initialized before this function
+ *          is called (call esp_adc_cal_characterize())
+ *
+ * @param[in]   adc_reading     ADC reading
+ * @param[in]   chars           Pointer to initialized structure containing ADC characteristics
+ *
+ * @return      Voltage in mV
+ */
+uint32_t esp_adc_cal_raw_to_voltage(uint32_t adc_reading, const esp_adc_cal_characteristics_t *chars);
+
+/**
+ * @brief   Reads an ADC and converts the reading to a voltage in mV
+ *
+ * This function reads an ADC then converts the raw reading to a voltage in mV
+ * based on the characteristics provided. The ADC that is read is also
+ * determined by the characteristics.
+ *
+ * @note    The Characteristics structure must be initialized before this
+ *          function is called (call esp_adc_cal_characterize())
+ *
+ * @param[in]   channel     ADC Channel to read
+ * @param[in]   chars       Pointer to initialized ADC characteristics structure
+ * @param[out]  voltage     Pointer to store converted voltage
+ *
+ * @return
+ *      - ESP_OK: ADC read and converted to mV
+ *      - ESP_ERR_INVALID_ARG: Error due to invalid arguments
+ *      - ESP_ERR_INVALID_STATE: Reading result is invalid. Try to read again.
+ */
+esp_err_t esp_adc_cal_get_voltage(adc_channel_t channel, const esp_adc_cal_characteristics_t *chars, uint32_t *voltage);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_ADC_CAL_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_common/include/esp_assert.h b/tools/sdk/esp32s3/include/esp_common/include/esp_assert.h
new file mode 100644
index 00000000000..39d6a32843f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_common/include/esp_assert.h
@@ -0,0 +1,37 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef __ESP_ASSERT_H__
+#define __ESP_ASSERT_H__
+
+#include "assert.h"
+
+/* Assert at compile time if possible, runtime otherwise */
+#ifndef __cplusplus
+/* __builtin_choose_expr() is only in C, makes this a lot cleaner */
+#define TRY_STATIC_ASSERT(CONDITION, MSG) do {                                                              \
+            _Static_assert(__builtin_choose_expr(__builtin_constant_p(CONDITION), (CONDITION), 1), #MSG);   \
+            assert(#MSG && (CONDITION));                                                                    \
+        } while(0)
+#else
+/* for C++, use __attribute__((error)) - works almost as well as _Static_assert */
+#define TRY_STATIC_ASSERT(CONDITION, MSG) do {                                                              \
+            if (__builtin_constant_p(CONDITION) && !(CONDITION)) {          \
+                extern __attribute__((error(#MSG))) void failed_compile_time_assert(void);      \
+                failed_compile_time_assert();                                                   \
+            }                                                                                   \
+            assert(#MSG && (CONDITION));                                                                    \
+        } while(0)
+#endif /* __cplusplus */
+
+#endif /* __ESP_ASSERT_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_common/include/esp_attr.h b/tools/sdk/esp32s3/include/esp_common/include/esp_attr.h
new file mode 100644
index 00000000000..106a686b5e4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_common/include/esp_attr.h
@@ -0,0 +1,166 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __ESP_ATTR_H__
+#define __ESP_ATTR_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "sdkconfig.h"
+
+#define ROMFN_ATTR
+
+//Normally, the linker script will put all code and rodata in flash,
+//and all variables in shared RAM. These macros can be used to redirect
+//particular functions/variables to other memory regions.
+
+// Forces code into IRAM instead of flash
+#define IRAM_ATTR _SECTION_ATTR_IMPL(".iram1", __COUNTER__)
+
+// Forces data into DRAM instead of flash
+#define DRAM_ATTR _SECTION_ATTR_IMPL(".dram1", __COUNTER__)
+
+// IRAM can only be accessed as an 8-bit memory on ESP32, when CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY is set
+#define IRAM_8BIT_ACCESSIBLE (CONFIG_IDF_TARGET_ESP32 && CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY)
+
+// Make sure that IRAM is accessible as an 8-bit memory on ESP32.
+// If that's not the case, coredump cannot dump data from IRAM.
+#if IRAM_8BIT_ACCESSIBLE
+// Forces data into IRAM instead of DRAM
+#define IRAM_DATA_ATTR __attribute__((section(".iram.data")))
+
+// Forces data into IRAM instead of DRAM and map it to coredump
+#define COREDUMP_IRAM_DATA_ATTR _SECTION_ATTR_IMPL(".iram2.coredump", __COUNTER__)
+
+// Forces bss into IRAM instead of DRAM
+#define IRAM_BSS_ATTR __attribute__((section(".iram.bss")))
+#else
+
+// IRAM is not accessible as an 8-bit memory, put IRAM coredump variables in DRAM
+#define COREDUMP_IRAM_DATA_ATTR COREDUMP_DRAM_ATTR
+#define IRAM_DATA_ATTR
+
+#define IRAM_BSS_ATTR
+#endif
+
+// Forces data to be 4 bytes aligned
+#define WORD_ALIGNED_ATTR __attribute__((aligned(4)))
+
+// Forces data to be placed to DMA-capable places
+#define DMA_ATTR WORD_ALIGNED_ATTR DRAM_ATTR
+
+// Forces a function to be inlined
+#define FORCE_INLINE_ATTR static inline __attribute__((always_inline))
+
+// Forces a string into DRAM instead of flash
+// Use as esp_rom_printf(DRAM_STR("Hello world!\n"));
+#define DRAM_STR(str) (__extension__({static const DRAM_ATTR char __c[] = (str); (const char *)&__c;}))
+
+// Forces code into RTC fast memory. See "docs/deep-sleep-stub.rst"
+#define RTC_IRAM_ATTR _SECTION_ATTR_IMPL(".rtc.text", __COUNTER__)
+
+#if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
+// Forces bss variable into external memory. "
+#define EXT_RAM_ATTR _SECTION_ATTR_IMPL(".ext_ram.bss", __COUNTER__)
+#else
+#define EXT_RAM_ATTR
+#endif
+
+// Forces data into RTC slow memory. See "docs/deep-sleep-stub.rst"
+// Any variable marked with this attribute will keep its value
+// during a deep sleep / wake cycle.
+#define RTC_DATA_ATTR _SECTION_ATTR_IMPL(".rtc.data", __COUNTER__)
+
+// Forces read-only data into RTC memory. See "docs/deep-sleep-stub.rst"
+#define RTC_RODATA_ATTR _SECTION_ATTR_IMPL(".rtc.rodata", __COUNTER__)
+
+// Allows to place data into RTC_SLOW memory.
+#define RTC_SLOW_ATTR _SECTION_ATTR_IMPL(".rtc.force_slow", __COUNTER__)
+
+// Allows to place data into RTC_FAST memory.
+#define RTC_FAST_ATTR _SECTION_ATTR_IMPL(".rtc.force_fast", __COUNTER__)
+
+// Forces data into noinit section to avoid initialization after restart.
+#define __NOINIT_ATTR _SECTION_ATTR_IMPL(".noinit", __COUNTER__)
+
+#if CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY
+// Forces data into external memory noinit section to avoid initialization after restart.
+#define EXT_RAM_NOINIT_ATTR _SECTION_ATTR_IMPL(".ext_ram_noinit", __COUNTER__)
+#else
+// Place in internal noinit section
+#define EXT_RAM_NOINIT_ATTR __NOINIT_ATTR
+#endif
+
+// Forces data into RTC slow memory of .noinit section.
+// Any variable marked with this attribute will keep its value
+// after restart or during a deep sleep / wake cycle.
+#define RTC_NOINIT_ATTR  _SECTION_ATTR_IMPL(".rtc_noinit", __COUNTER__)
+
+// Forces code into DRAM instead of flash and map it to coredump
+// Use dram2 instead of dram1 to make sure this section will not be included
+// by dram1 section in the linker script
+#define COREDUMP_DRAM_ATTR _SECTION_ATTR_IMPL(".dram2.coredump", __COUNTER__)
+
+// Forces data into RTC memory and map it to coredump
+#define COREDUMP_RTC_DATA_ATTR _SECTION_ATTR_IMPL(".rtc.coredump", __COUNTER__)
+
+// Allows to place data into RTC_FAST memory and map it to coredump
+#define COREDUMP_RTC_FAST_ATTR _SECTION_ATTR_IMPL(".rtc.fast.coredump", __COUNTER__)
+
+// Forces to not inline function
+#define NOINLINE_ATTR __attribute__((noinline))
+
+// This allows using enum as flags in C++
+// Format: FLAG_ATTR(flag_enum_t)
+#ifdef __cplusplus
+
+// Inline is required here to avoid multiple definition error in linker
+#define FLAG_ATTR_IMPL(TYPE, INT_TYPE) \
+FORCE_INLINE_ATTR constexpr TYPE operator~ (TYPE a) { return (TYPE)~(INT_TYPE)a; } \
+FORCE_INLINE_ATTR constexpr TYPE operator| (TYPE a, TYPE b) { return (TYPE)((INT_TYPE)a | (INT_TYPE)b); } \
+FORCE_INLINE_ATTR constexpr TYPE operator& (TYPE a, TYPE b) { return (TYPE)((INT_TYPE)a & (INT_TYPE)b); } \
+FORCE_INLINE_ATTR constexpr TYPE operator^ (TYPE a, TYPE b) { return (TYPE)((INT_TYPE)a ^ (INT_TYPE)b); } \
+FORCE_INLINE_ATTR constexpr TYPE operator>> (TYPE a, int b) { return (TYPE)((INT_TYPE)a >> b); } \
+FORCE_INLINE_ATTR constexpr TYPE operator<< (TYPE a, int b) { return (TYPE)((INT_TYPE)a << b); } \
+FORCE_INLINE_ATTR TYPE& operator|=(TYPE& a, TYPE b) { a = a | b; return a; } \
+FORCE_INLINE_ATTR TYPE& operator&=(TYPE& a, TYPE b) { a = a & b; return a; } \
+FORCE_INLINE_ATTR TYPE& operator^=(TYPE& a, TYPE b) { a = a ^ b; return a; } \
+FORCE_INLINE_ATTR TYPE& operator>>=(TYPE& a, int b) { a >>= b; return a; } \
+FORCE_INLINE_ATTR TYPE& operator<<=(TYPE& a, int b) { a <<= b; return a; }
+
+#define FLAG_ATTR_U32(TYPE) FLAG_ATTR_IMPL(TYPE, uint32_t)
+#define FLAG_ATTR FLAG_ATTR_U32
+
+#else
+#define FLAG_ATTR(TYPE)
+#endif
+
+// Implementation for a unique custom section
+//
+// This prevents gcc producing "x causes a section type conflict with y"
+// errors if two variables in the same source file have different linkage (maybe const & non-const) but are placed in the same custom section
+//
+// Using unique sections also means --gc-sections can remove unused
+// data with a custom section type set
+#define _SECTION_ATTR_IMPL(SECTION, COUNTER) __attribute__((section(SECTION "." _COUNTER_STRINGIFY(COUNTER))))
+
+#define _COUNTER_STRINGIFY(COUNTER) #COUNTER
+
+/* Use IDF_DEPRECATED attribute to mark anything deprecated from use in
+   ESP-IDF's own source code, but not deprecated for external users.
+*/
+#ifdef IDF_CI_BUILD
+#define IDF_DEPRECATED(REASON) __attribute__((deprecated(REASON)))
+#else
+#define IDF_DEPRECATED(REASON)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ESP_ATTR_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_common/include/esp_bit_defs.h b/tools/sdk/esp32s3/include/esp_common/include/esp_bit_defs.h
new file mode 100644
index 00000000000..6c1600b69bc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_common/include/esp_bit_defs.h
@@ -0,0 +1,96 @@
+// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+//Register Bits{{
+#define BIT31   0x80000000
+#define BIT30   0x40000000
+#define BIT29   0x20000000
+#define BIT28   0x10000000
+#define BIT27   0x08000000
+#define BIT26   0x04000000
+#define BIT25   0x02000000
+#define BIT24   0x01000000
+#define BIT23   0x00800000
+#define BIT22   0x00400000
+#define BIT21   0x00200000
+#define BIT20   0x00100000
+#define BIT19   0x00080000
+#define BIT18   0x00040000
+#define BIT17   0x00020000
+#define BIT16   0x00010000
+#define BIT15   0x00008000
+#define BIT14   0x00004000
+#define BIT13   0x00002000
+#define BIT12   0x00001000
+#define BIT11   0x00000800
+#define BIT10   0x00000400
+#define BIT9     0x00000200
+#define BIT8     0x00000100
+#define BIT7     0x00000080
+#define BIT6     0x00000040
+#define BIT5     0x00000020
+#define BIT4     0x00000010
+#define BIT3     0x00000008
+#define BIT2     0x00000004
+#define BIT1     0x00000002
+#define BIT0     0x00000001
+//}}
+
+#define BIT63    (0x80000000ULL << 32)
+#define BIT62    (0x40000000ULL << 32)
+#define BIT61    (0x20000000ULL << 32)
+#define BIT60    (0x10000000ULL << 32)
+#define BIT59    (0x08000000ULL << 32)
+#define BIT58    (0x04000000ULL << 32)
+#define BIT57    (0x02000000ULL << 32)
+#define BIT56    (0x01000000ULL << 32)
+#define BIT55    (0x00800000ULL << 32)
+#define BIT54    (0x00400000ULL << 32)
+#define BIT53    (0x00200000ULL << 32)
+#define BIT52    (0x00100000ULL << 32)
+#define BIT51    (0x00080000ULL << 32)
+#define BIT50    (0x00040000ULL << 32)
+#define BIT49    (0x00020000ULL << 32)
+#define BIT48    (0x00010000ULL << 32)
+#define BIT47    (0x00008000ULL << 32)
+#define BIT46    (0x00004000ULL << 32)
+#define BIT45    (0x00002000ULL << 32)
+#define BIT44    (0x00001000ULL << 32)
+#define BIT43    (0x00000800ULL << 32)
+#define BIT42    (0x00000400ULL << 32)
+#define BIT41    (0x00000200ULL << 32)
+#define BIT40    (0x00000100ULL << 32)
+#define BIT39    (0x00000080ULL << 32)
+#define BIT38    (0x00000040ULL << 32)
+#define BIT37    (0x00000020ULL << 32)
+#define BIT36    (0x00000010ULL << 32)
+#define BIT35    (0x00000008ULL << 32)
+#define BIT34    (0x00000004ULL << 32)
+#define BIT33    (0x00000002ULL << 32)
+#define BIT32    (0x00000001ULL << 32)
+
+#ifndef __ASSEMBLER__
+#ifndef BIT
+#define BIT(nr)                 (1UL << (nr))
+#endif
+#ifndef BIT64
+#define BIT64(nr)               (1ULL << (nr))
+#endif
+#else
+#ifndef BIT
+#define BIT(nr)                 (1 << (nr))
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_common/include/esp_check.h b/tools/sdk/esp32s3/include/esp_common/include/esp_check.h
new file mode 100644
index 00000000000..d0e09cf28f0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_common/include/esp_check.h
@@ -0,0 +1,317 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "esp_err.h"
+#include "esp_log.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message and returns.
+ */
+#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
+#define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                       \
+        (void)log_tag;                                                                          \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            return err_rc_;                                                                     \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
+        (void)log_tag;                                                                          \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            return err_rc_;                                                                     \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
+ * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
+        (void)log_tag;                                                                          \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ret = err_rc_;                                                                      \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
+        (void)log_tag;                                                                          \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ret = err_rc_;                                                                      \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
+ * and returns with the supplied 'err_code'.
+ */
+#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
+        (void)log_tag;                                                                          \
+        if (unlikely(!(a))) {                                                                   \
+            return err_code;                                                                    \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
+        (void)log_tag;                                                                          \
+        if (unlikely(!(a))) {                                                                   \
+            return err_code;                                                                    \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
+ * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
+        (void)log_tag;                                                                          \
+        if (unlikely(!(a))) {                                                                   \
+            ret = err_code;                                                                     \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while (0)
+
+/**
+ * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
+        (void)log_tag;                                                                          \
+        if (unlikely(!(a))) {                                                                   \
+            ret = err_code;                                                                     \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while (0)
+
+#else // !CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT
+
+/**
+ * In the future, we want to switch to C++20. We also want to become compatible with clang.
+ * Hence, we provide two versions of the following macros. The first one is using the GNU extension \#\#__VA_ARGS__.
+ * The second one is using the C++20 feature __VA_OPT__(,). This allows users to compile their code with
+ * standard C++20 enabled instead of the GNU extension. Below C++20, we haven't found any good alternative to
+ * using \#\#__VA_ARGS__.
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message and returns.
+ */
+#define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                                  \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_rc_;                                                                                \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                              \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            return err_rc_;                                                                                \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
+ * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                                          \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            ret = err_rc_;                                                                                 \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                                      \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            ret = err_rc_;                                                                                 \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
+ * and returns with the supplied 'err_code'.
+ */
+#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                                        \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_code;                                                                               \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                                    \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            return err_code;                                                                               \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
+ * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                                \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            ret = err_code;                                                                                \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while (0)
+
+/**
+ * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                            \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            ret = err_code;                                                                                \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while (0)
+
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message and returns.
+ */
+#define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                       \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);        \
+            return err_rc_;                                                                     \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);  \
+            return err_rc_;                                                                     \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
+ * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);        \
+            ret = err_rc_;                                                                      \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);  \
+            ret = err_rc_;                                                                      \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
+ * and returns with the supplied 'err_code'.
+ */
+#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
+        if (unlikely(!(a))) {                                                                   \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);        \
+            return err_code;                                                                    \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
+        if (unlikely(!(a))) {                                                                   \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);  \
+            return err_code;                                                                    \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
+ * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
+        if (unlikely(!(a))) {                                                                   \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);        \
+            ret = err_code;                                                                     \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while (0)
+
+/**
+ * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
+        if (unlikely(!(a))) {                                                                   \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);  \
+            ret = err_code;                                                                     \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while (0)
+
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
+
+#endif // !CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_common/include/esp_compiler.h b/tools/sdk/esp32s3/include/esp_common/include/esp_compiler.h
new file mode 100644
index 00000000000..917c6602535
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_common/include/esp_compiler.h
@@ -0,0 +1,59 @@
+// Copyright 2016-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef __ESP_COMPILER_H
+#define __ESP_COMPILER_H
+
+/*
+ * The likely and unlikely macro pairs:
+ * These macros are useful to place when application
+ * knows the majority ocurrence of a decision paths,
+ * placing one of these macros can hint the compiler
+ * to reorder instructions producing more optimized
+ * code.
+ */
+#if (CONFIG_COMPILER_OPTIMIZATION_PERF)
+#ifndef likely
+#define likely(x)      __builtin_expect(!!(x), 1)
+#endif
+#ifndef unlikely
+#define unlikely(x)    __builtin_expect(!!(x), 0)
+#endif
+#else
+#ifndef likely
+#define likely(x)      (x)
+#endif
+#ifndef unlikely
+#define unlikely(x)    (x)
+#endif
+#endif
+
+/*
+ * Utility macros used for designated initializers, which work differently
+ * in C99 and C++ standards mainly for aggregate types.
+ * The member separator, comma, is already part of the macro, please omit the trailing comma.
+ * Usage example:
+ *   struct config_t { char* pchr; char arr[SIZE]; } config = {
+ *              ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(pchr)
+ *              ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_STR(arr, "Value")
+ *          };
+ */
+#ifdef __cplusplus
+#define ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_STR(member, value)  { .member = value },
+#define ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(member) .member = { },
+#else
+#define ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_STR(member, value)  .member = value,
+#define ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(member)
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_common/include/esp_err.h b/tools/sdk/esp32s3/include/esp_common/include/esp_err.h
new file mode 100644
index 00000000000..f317f8a09f5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_common/include/esp_err.h
@@ -0,0 +1,147 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdio.h>
+#include <assert.h>
+#include "esp_compiler.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef int esp_err_t;
+
+/* Definitions for error constants. */
+#define ESP_OK          0       /*!< esp_err_t value indicating success (no error) */
+#define ESP_FAIL        -1      /*!< Generic esp_err_t code indicating failure */
+
+#define ESP_ERR_NO_MEM              0x101   /*!< Out of memory */
+#define ESP_ERR_INVALID_ARG         0x102   /*!< Invalid argument */
+#define ESP_ERR_INVALID_STATE       0x103   /*!< Invalid state */
+#define ESP_ERR_INVALID_SIZE        0x104   /*!< Invalid size */
+#define ESP_ERR_NOT_FOUND           0x105   /*!< Requested resource not found */
+#define ESP_ERR_NOT_SUPPORTED       0x106   /*!< Operation or feature not supported */
+#define ESP_ERR_TIMEOUT             0x107   /*!< Operation timed out */
+#define ESP_ERR_INVALID_RESPONSE    0x108   /*!< Received response was invalid */
+#define ESP_ERR_INVALID_CRC         0x109   /*!< CRC or checksum was invalid */
+#define ESP_ERR_INVALID_VERSION     0x10A   /*!< Version was invalid */
+#define ESP_ERR_INVALID_MAC         0x10B   /*!< MAC address was invalid */
+#define ESP_ERR_NOT_FINISHED        0x10C   /*!< There are items remained to retrieve */
+
+
+#define ESP_ERR_WIFI_BASE           0x3000  /*!< Starting number of WiFi error codes */
+#define ESP_ERR_MESH_BASE           0x4000  /*!< Starting number of MESH error codes */
+#define ESP_ERR_FLASH_BASE          0x6000  /*!< Starting number of flash error codes */
+#define ESP_ERR_HW_CRYPTO_BASE      0xc000  /*!< Starting number of HW cryptography module error codes */
+#define ESP_ERR_MEMPROT_BASE        0xd000  /*!< Starting number of Memory Protection API error codes */
+
+/**
+  * @brief Returns string for esp_err_t error codes
+  *
+  * This function finds the error code in a pre-generated lookup-table and
+  * returns its string representation.
+  *
+  * The function is generated by the Python script
+  * tools/gen_esp_err_to_name.py which should be run each time an esp_err_t
+  * error is modified, created or removed from the IDF project.
+  *
+  * @param code esp_err_t error code
+  * @return string error message
+  */
+const char *esp_err_to_name(esp_err_t code);
+
+/**
+  * @brief Returns string for esp_err_t and system error codes
+  *
+  * This function finds the error code in a pre-generated lookup-table of
+  * esp_err_t errors and returns its string representation. If the error code
+  * is not found then it is attempted to be found among system errors.
+  *
+  * The function is generated by the Python script
+  * tools/gen_esp_err_to_name.py which should be run each time an esp_err_t
+  * error is modified, created or removed from the IDF project.
+  *
+  * @param code esp_err_t error code
+  * @param[out] buf buffer where the error message should be written
+  * @param buflen Size of buffer buf. At most buflen bytes are written into the buf buffer (including the terminating null byte).
+  * @return buf containing the string error message
+  */
+const char *esp_err_to_name_r(esp_err_t code, char *buf, size_t buflen);
+
+/** @cond */
+void _esp_error_check_failed(esp_err_t rc, const char *file, int line, const char *function, const char *expression) __attribute__((noreturn));
+
+/** @cond */
+void _esp_error_check_failed_without_abort(esp_err_t rc, const char *file, int line, const char *function, const char *expression);
+
+#ifndef __ASSERT_FUNC
+/* This won't happen on IDF, which defines __ASSERT_FUNC in assert.h, but it does happen when building on the host which
+   uses /usr/include/assert.h or equivalent.
+*/
+#ifdef __ASSERT_FUNCTION
+#define __ASSERT_FUNC __ASSERT_FUNCTION /* used in glibc assert.h */
+#else
+#define __ASSERT_FUNC "??"
+#endif
+#endif
+/** @endcond */
+
+/**
+ * Macro which can be used to check the error code,
+ * and terminate the program in case the code is not ESP_OK.
+ * Prints the error code, error location, and the failed statement to serial output.
+ *
+ * Disabled if assertions are disabled.
+ */
+#ifdef NDEBUG
+#define ESP_ERROR_CHECK(x) do {                                         \
+        esp_err_t err_rc_ = (x);                                        \
+        (void) sizeof(err_rc_);                                         \
+    } while(0)
+#elif defined(CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT)
+#define ESP_ERROR_CHECK(x) do {                                         \
+        esp_err_t err_rc_ = (x);                                        \
+        if (unlikely(err_rc_ != ESP_OK)) {                              \
+            abort();                                                    \
+        }                                                               \
+    } while(0)
+#else
+#define ESP_ERROR_CHECK(x) do {                                         \
+        esp_err_t err_rc_ = (x);                                        \
+        if (unlikely(err_rc_ != ESP_OK)) {                              \
+            _esp_error_check_failed(err_rc_, __FILE__, __LINE__,        \
+                                    __ASSERT_FUNC, #x);                 \
+        }                                                               \
+    } while(0)
+#endif
+
+/**
+ * Macro which can be used to check the error code. Prints the error code, error location, and the failed statement to
+ * serial output.
+ * In comparison with ESP_ERROR_CHECK(), this prints the same error message but isn't terminating the program.
+ */
+#if defined NDEBUG || defined CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT
+#define ESP_ERROR_CHECK_WITHOUT_ABORT(x) ({                                         \
+        esp_err_t err_rc_ = (x);                                                    \
+        err_rc_;                                                                    \
+    })
+#else
+#define ESP_ERROR_CHECK_WITHOUT_ABORT(x) ({                                         \
+        esp_err_t err_rc_ = (x);                                                    \
+        if (unlikely(err_rc_ != ESP_OK)) {                                          \
+            _esp_error_check_failed_without_abort(err_rc_, __FILE__, __LINE__,      \
+                                                  __ASSERT_FUNC, #x);               \
+        }                                                                           \
+        err_rc_;                                                                    \
+    })
+#endif //NDEBUG
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_common/include/esp_idf_version.h b/tools/sdk/esp32s3/include/esp_common/include/esp_idf_version.h
new file mode 100644
index 00000000000..db04f85f90a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_common/include/esp_idf_version.h
@@ -0,0 +1,62 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Major version number (X.x.x) */
+#define ESP_IDF_VERSION_MAJOR   4
+/** Minor version number (x.X.x) */
+#define ESP_IDF_VERSION_MINOR   4
+/** Patch version number (x.x.X) */
+#define ESP_IDF_VERSION_PATCH   1
+
+/**
+ * Macro to convert IDF version number into an integer
+ *
+ * To be used in comparisons, such as ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 0, 0)
+ */
+#define ESP_IDF_VERSION_VAL(major, minor, patch) ((major << 16) | (minor << 8) | (patch))
+
+/**
+ * Current IDF version, as an integer
+ *
+ * To be used in comparisons, such as ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 0, 0)
+ */
+#define ESP_IDF_VERSION  ESP_IDF_VERSION_VAL(ESP_IDF_VERSION_MAJOR, \
+                                             ESP_IDF_VERSION_MINOR, \
+                                             ESP_IDF_VERSION_PATCH)
+
+#ifndef __ASSEMBLER__
+
+/**
+ * Return full IDF version string, same as 'git describe' output.
+ *
+ * @note If you are printing the ESP-IDF version in a log file or other information,
+ * this function provides more information than using the numerical version macros.
+ * For example, numerical version macros don't differentiate between development,
+ * pre-release and release versions, but the output of this function does.
+ *
+ * @return constant string from IDF_VER
+ */
+const char* esp_get_idf_version(void);
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_common/include/esp_types.h b/tools/sdk/esp32s3/include/esp_common/include/esp_types.h
new file mode 100644
index 00000000000..547024e3f75
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_common/include/esp_types.h
@@ -0,0 +1,25 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_TYPES_H__
+#define __ESP_TYPES_H__
+
+#ifdef __GNUC__
+#include <sys/cdefs.h>
+#endif /*__GNUC__*/
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+
+#endif /* __ESP_TYPES_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_eth/include/esp_eth.h b/tools/sdk/esp32s3/include/esp_eth/include/esp_eth.h
new file mode 100644
index 00000000000..6aea512a692
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_eth/include/esp_eth.h
@@ -0,0 +1,316 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "esp_eth_com.h"
+#include "esp_eth_mac.h"
+#include "esp_eth_phy.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief Handle of Ethernet driver
+*
+*/
+typedef void *esp_eth_handle_t;
+
+/**
+* @brief Configuration of Ethernet driver
+*
+*/
+typedef struct {
+    /**
+    * @brief Ethernet MAC object
+    *
+    */
+    esp_eth_mac_t *mac;
+
+    /**
+    * @brief Ethernet PHY object
+    *
+    */
+    esp_eth_phy_t *phy;
+
+    /**
+    * @brief Period time of checking Ethernet link status
+    *
+    */
+    uint32_t check_link_period_ms;
+
+    /**
+    * @brief Input frame buffer to user's stack
+    *
+    * @param[in] eth_handle: handle of Ethernet driver
+    * @param[in] buffer: frame buffer that will get input to upper stack
+    * @param[in] length: length of the frame buffer
+    *
+    * @return
+    *      - ESP_OK: input frame buffer to upper stack successfully
+    *      - ESP_FAIL: error occurred when inputting buffer to upper stack
+    *
+    */
+    esp_err_t (*stack_input)(esp_eth_handle_t eth_handle, uint8_t *buffer, uint32_t length, void *priv);
+
+    /**
+    * @brief Callback function invoked when lowlevel initialization is finished
+    *
+    * @param[in] eth_handle: handle of Ethernet driver
+    *
+    * @return
+    *       - ESP_OK: process extra lowlevel initialization successfully
+    *       - ESP_FAIL: error occurred when processing extra lowlevel initialization
+    */
+    esp_err_t (*on_lowlevel_init_done)(esp_eth_handle_t eth_handle);
+
+    /**
+    * @brief Callback function invoked when lowlevel deinitialization is finished
+    *
+    * @param[in] eth_handle: handle of Ethernet driver
+    *
+    * @return
+    *       - ESP_OK: process extra lowlevel deinitialization successfully
+    *       - ESP_FAIL: error occurred when processing extra lowlevel deinitialization
+    */
+    esp_err_t (*on_lowlevel_deinit_done)(esp_eth_handle_t eth_handle);
+
+    /**
+    * @brief Read PHY register
+    *
+    * @note Usually the PHY register read/write function is provided by MAC (SMI interface),
+    *       but if the PHY device is managed by other interface (e.g. I2C), then user needs to
+    *       implement the corresponding read/write.
+    *       Setting this to NULL means your PHY device is managed by MAC's SMI interface.
+    *
+    * @param[in] eth_handle: handle of Ethernet driver
+    * @param[in] phy_addr: PHY chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[out] reg_value: PHY register value
+    *
+    * @return
+    *      - ESP_OK: read PHY register successfully
+    *      - ESP_ERR_INVALID_ARG: read PHY register failed because of invalid argument
+    *      - ESP_ERR_TIMEOUT: read PHY register failed because of timeout
+    *      - ESP_FAIL: read PHY register failed because some other error occurred
+    */
+    esp_err_t (*read_phy_reg)(esp_eth_handle_t eth_handle, uint32_t phy_addr, uint32_t phy_reg, uint32_t *reg_value);
+
+    /**
+    * @brief Write PHY register
+    *
+    * @note Usually the PHY register read/write function is provided by MAC (SMI interface),
+    *       but if the PHY device is managed by other interface (e.g. I2C), then user needs to
+    *       implement the corresponding read/write.
+    *       Setting this to NULL means your PHY device is managed by MAC's SMI interface.
+    *
+    * @param[in] eth_handle: handle of Ethernet driver
+    * @param[in] phy_addr: PHY chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[in] reg_value: PHY register value
+    *
+    * @return
+    *      - ESP_OK: write PHY register successfully
+    *      - ESP_ERR_INVALID_ARG: read PHY register failed because of invalid argument
+    *      - ESP_ERR_TIMEOUT: write PHY register failed because of timeout
+    *      - ESP_FAIL: write PHY register failed because some other error occurred
+    */
+    esp_err_t (*write_phy_reg)(esp_eth_handle_t eth_handle, uint32_t phy_addr, uint32_t phy_reg, uint32_t reg_value);
+} esp_eth_config_t;
+
+/**
+ * @brief Default configuration for Ethernet driver
+ *
+ */
+#define ETH_DEFAULT_CONFIG(emac, ephy)   \
+    {                                    \
+        .mac = emac,                     \
+        .phy = ephy,                     \
+        .check_link_period_ms = 2000,    \
+        .stack_input = NULL,             \
+        .on_lowlevel_init_done = NULL,   \
+        .on_lowlevel_deinit_done = NULL, \
+        .read_phy_reg = NULL,            \
+        .write_phy_reg = NULL,           \
+    }
+
+/**
+* @brief Install Ethernet driver
+*
+* @param[in]  config: configuration of the Ethernet driver
+* @param[out] out_hdl: handle of Ethernet driver
+*
+* @return
+*       - ESP_OK: install esp_eth driver successfully
+*       - ESP_ERR_INVALID_ARG: install esp_eth driver failed because of some invalid argument
+*       - ESP_ERR_NO_MEM: install esp_eth driver failed because there's no memory for driver
+*       - ESP_FAIL: install esp_eth driver failed because some other error occurred
+*/
+esp_err_t esp_eth_driver_install(const esp_eth_config_t *config, esp_eth_handle_t *out_hdl);
+
+/**
+* @brief Uninstall Ethernet driver
+* @note It's not recommended to uninstall Ethernet driver unless it won't get used any more in application code.
+*       To uninstall Ethernet driver, you have to make sure, all references to the driver are released.
+*       Ethernet driver can only be uninstalled successfully when reference counter equals to one.
+*
+* @param[in] hdl: handle of Ethernet driver
+*
+* @return
+*       - ESP_OK: uninstall esp_eth driver successfully
+*       - ESP_ERR_INVALID_ARG: uninstall esp_eth driver failed because of some invalid argument
+*       - ESP_ERR_INVALID_STATE: uninstall esp_eth driver failed because it has more than one reference
+*       - ESP_FAIL: uninstall esp_eth driver failed because some other error occurred
+*/
+esp_err_t esp_eth_driver_uninstall(esp_eth_handle_t hdl);
+
+/**
+* @brief Start Ethernet driver **ONLY** in standalone mode (i.e. without TCP/IP stack)
+*
+* @note This API will start driver state machine and internal software timer (for checking link status).
+*
+* @param[in] hdl handle of Ethernet driver
+*
+* @return
+*       - ESP_OK: start esp_eth driver successfully
+*       - ESP_ERR_INVALID_ARG: start esp_eth driver failed because of some invalid argument
+*       - ESP_ERR_INVALID_STATE: start esp_eth driver failed because driver has started already
+*       - ESP_FAIL: start esp_eth driver failed because some other error occurred
+*/
+esp_err_t esp_eth_start(esp_eth_handle_t hdl);
+
+/**
+* @brief Stop Ethernet driver
+*
+* @note This function does the oppsite operation of `esp_eth_start`.
+*
+* @param[in] hdl handle of Ethernet driver
+* @return
+*       - ESP_OK: stop esp_eth driver successfully
+*       - ESP_ERR_INVALID_ARG: stop esp_eth driver failed because of some invalid argument
+*       - ESP_ERR_INVALID_STATE: stop esp_eth driver failed because driver has not started yet
+*       - ESP_FAIL: stop esp_eth driver failed because some other error occurred
+*/
+esp_err_t esp_eth_stop(esp_eth_handle_t hdl);
+
+/**
+* @brief Update Ethernet data input path (i.e. specify where to pass the input buffer)
+*
+* @note After install driver, Ethernet still don't know where to deliver the input buffer.
+*       In fact, this API registers a callback function which get invoked when Ethernet received new packets.
+*
+* @param[in] hdl handle of Ethernet driver
+* @param[in] stack_input function pointer, which does the actual process on incoming packets
+* @param[in] priv private resource, which gets passed to `stack_input` callback without any modification
+* @return
+*       - ESP_OK: update input path successfully
+*       - ESP_ERR_INVALID_ARG: update input path failed because of some invalid argument
+*       - ESP_FAIL: update input path failed because some other error occurred
+*/
+esp_err_t esp_eth_update_input_path(
+    esp_eth_handle_t hdl,
+    esp_err_t (*stack_input)(esp_eth_handle_t hdl, uint8_t *buffer, uint32_t length, void *priv),
+    void *priv);
+
+/**
+* @brief General Transmit
+*
+* @param[in] hdl: handle of Ethernet driver
+* @param[in] buf: buffer of the packet to transfer
+* @param[in] length: length of the buffer to transfer
+*
+* @return
+*       - ESP_OK: transmit frame buffer successfully
+*       - ESP_ERR_INVALID_ARG: transmit frame buffer failed because of some invalid argument
+*       - ESP_FAIL: transmit frame buffer failed because some other error occurred
+*/
+esp_err_t esp_eth_transmit(esp_eth_handle_t hdl, void *buf, size_t length);
+
+/**
+* @brief General Receive is deprecated and shall not be accessed from app code,
+*        as polling is not supported by Ethernet.
+*
+* @param[in] hdl: handle of Ethernet driver
+* @param[out] buf: buffer to preserve the received packet
+* @param[out] length: length of the received packet
+*
+* @note Before this function got invoked, the value of "length" should set by user, equals the size of buffer.
+*       After the function returned, the value of "length" means the real length of received data.
+* @note This API was exposed by accident, users should not use this API in their applications.
+*       Ethernet driver is interrupt driven, and doesn't support polling mode.
+*       Instead, users should register input callback with ``esp_eth_update_input_path``.
+*
+* @return
+*       - ESP_OK: receive frame buffer successfully
+*       - ESP_ERR_INVALID_ARG: receive frame buffer failed because of some invalid argument
+*       - ESP_ERR_INVALID_SIZE: input buffer size is not enough to hold the incoming data.
+*                               in this case, value of returned "length" indicates the real size of incoming data.
+*       - ESP_FAIL: receive frame buffer failed because some other error occurred
+*/
+esp_err_t esp_eth_receive(esp_eth_handle_t hdl, uint8_t *buf, uint32_t *length) __attribute__((deprecated("Ethernet driver is interrupt driven only, please register input callback with esp_eth_update_input_path")));
+
+/**
+* @brief Misc IO function of Etherent driver
+*
+* @param[in] hdl: handle of Ethernet driver
+* @param[in] cmd: IO control command
+* @param[in, out] data: address of data for `set` command or address where to store the data when used with `get` command
+*
+* @return
+*       - ESP_OK: process io command successfully
+*       - ESP_ERR_INVALID_ARG: process io command failed because of some invalid argument
+*       - ESP_FAIL: process io command failed because some other error occurred
+*
+* The following IO control commands are supported:
+* @li @c ETH_CMD_S_MAC_ADDR sets Ethernet interface MAC address. @c data argument is pointer to MAC address buffer with expected size of 6 bytes.
+* @li @c ETH_CMD_G_MAC_ADDR gets Ethernet interface MAC address. @c data argument is pointer to a buffer to which MAC address is to be copied. The buffer size must be at least 6 bytes.
+* @li @c ETH_CMD_S_PHY_ADDR sets PHY address in range of <0-31>. @c data argument is pointer to memory of uint32_t datatype from where the configuration option is read.
+* @li @c ETH_CMD_G_PHY_ADDR gets PHY address. @c data argument is pointer to memory of uint32_t datatype to which the PHY address is to be stored.
+* @li @c ETH_CMD_G_SPEED gets current Ethernet link speed. @c data argument is pointer to memory of eth_speed_t datatype to which the speed is to be stored.
+* @li @c ETH_CMD_S_PROMISCUOUS sets/resets Ethernet interface promiscuous mode. @c data argument is pointer to memory of bool datatype from which the configuration option is read.
+* @li @c ETH_CMD_S_FLOW_CTRL sets/resets Ethernet interface flow control. @c data argument is pointer to memory of bool datatype from which the configuration option is read.
+* @li @c ETH_CMD_G_DUPLEX_MODE gets current Ethernet link duplex mode.  @c data argument is pointer to memory of eth_duplex_t datatype to which the duplex mode is to be stored.
+* @li @c ETH_CMD_S_PHY_LOOPBACK sets/resets PHY to/from loopback mode. @c data argument is pointer to memory of bool datatype from which the configuration option is read.
+*
+*/
+esp_err_t esp_eth_ioctl(esp_eth_handle_t hdl, esp_eth_io_cmd_t cmd, void *data);
+
+/**
+* @brief Increase Ethernet driver reference
+* @note Ethernet driver handle can be obtained by os timer, netif, etc.
+*       It's dangerous when thread A is using Ethernet but thread B uninstall the driver.
+*       Using reference counter can prevent such risk, but care should be taken, when you obtain Ethernet driver,
+*       this API must be invoked so that the driver won't be uninstalled during your using time.
+*
+*
+* @param[in] hdl: handle of Ethernet driver
+* @return
+*       - ESP_OK: increase reference successfully
+*       - ESP_ERR_INVALID_ARG: increase reference failed because of some invalid argument
+*/
+esp_err_t esp_eth_increase_reference(esp_eth_handle_t hdl);
+
+/**
+* @brief Decrease Ethernet driver reference
+*
+* @param[in] hdl: handle of Ethernet driver
+* @return
+*       - ESP_OK: increase reference successfully
+*       - ESP_ERR_INVALID_ARG: increase reference failed because of some invalid argument
+*/
+esp_err_t esp_eth_decrease_reference(esp_eth_handle_t hdl);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_com.h b/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_com.h
new file mode 100644
index 00000000000..7ce0538fbe8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_com.h
@@ -0,0 +1,196 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "esp_err.h"
+#include "esp_event_base.h"
+#include "hal/eth_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Maximum Ethernet payload size
+ *
+ */
+#define ETH_MAX_PAYLOAD_LEN (1500)
+
+/**
+ * @brief Minimum Ethernet payload size
+ *
+ */
+#define ETH_MIN_PAYLOAD_LEN (46)
+
+/**
+ * @brief Ethernet frame header size: Dest addr(6 Bytes) + Src addr(6 Bytes) + length/type(2 Bytes)
+ *
+ */
+#define ETH_HEADER_LEN (14)
+
+/**
+ * @brief Optional 802.1q VLAN Tag length
+ *
+ */
+#define ETH_VLAN_TAG_LEN (4)
+
+/**
+ * @brief Jumbo frame payload size
+ *
+ */
+#define ETH_JUMBO_FRAME_PAYLOAD_LEN (9000)
+
+/**
+ * @brief Maximum frame size (1522 Bytes)
+ *
+ */
+#define ETH_MAX_PACKET_SIZE (ETH_HEADER_LEN + ETH_VLAN_TAG_LEN + ETH_MAX_PAYLOAD_LEN + ETH_CRC_LEN)
+
+/**
+ * @brief Minimum frame size (64 Bytes)
+ *
+ */
+#define ETH_MIN_PACKET_SIZE (ETH_HEADER_LEN + ETH_MIN_PAYLOAD_LEN + ETH_CRC_LEN)
+
+/**
+* @brief Ethernet driver state
+*
+*/
+typedef enum {
+    ETH_STATE_LLINIT, /*!< Lowlevel init done */
+    ETH_STATE_DEINIT, /*!< Deinit done */
+    ETH_STATE_LINK,   /*!< Link status changed */
+    ETH_STATE_SPEED,  /*!< Speed updated */
+    ETH_STATE_DUPLEX, /*!< Duplex updated */
+    ETH_STATE_PAUSE,  /*!< Pause ability updated */
+} esp_eth_state_t;
+
+/**
+* @brief Command list for ioctl API
+*
+*/
+typedef enum {
+    ETH_CMD_G_MAC_ADDR,    /*!< Get MAC address */
+    ETH_CMD_S_MAC_ADDR,    /*!< Set MAC address */
+    ETH_CMD_G_PHY_ADDR,    /*!< Get PHY address */
+    ETH_CMD_S_PHY_ADDR,    /*!< Set PHY address */
+    ETH_CMD_G_SPEED,       /*!< Get Speed */
+    ETH_CMD_S_PROMISCUOUS, /*!< Set promiscuous mode */
+    ETH_CMD_S_FLOW_CTRL,   /*!< Set flow control */
+    ETH_CMD_G_DUPLEX_MODE, /*!< Get Duplex mode */
+    ETH_CMD_S_PHY_LOOPBACK,/*!< Set PHY loopback */
+} esp_eth_io_cmd_t;
+
+/**
+* @brief Ethernet mediator
+*
+*/
+typedef struct esp_eth_mediator_s esp_eth_mediator_t;
+
+/**
+* @brief Ethernet mediator
+*
+*/
+struct esp_eth_mediator_s {
+    /**
+    * @brief Read PHY register
+    *
+    * @param[in] eth: mediator of Ethernet driver
+    * @param[in] phy_addr: PHY Chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[out] reg_value: PHY register value
+    *
+    * @return
+    *       - ESP_OK: read PHY register successfully
+    *       - ESP_FAIL: read PHY register failed because some error occurred
+    *
+    */
+    esp_err_t (*phy_reg_read)(esp_eth_mediator_t *eth, uint32_t phy_addr, uint32_t phy_reg, uint32_t *reg_value);
+
+    /**
+    * @brief Write PHY register
+    *
+    * @param[in] eth: mediator of Ethernet driver
+    * @param[in] phy_addr: PHY Chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[in] reg_value: PHY register value
+    *
+    * @return
+    *       - ESP_OK: write PHY register successfully
+    *       - ESP_FAIL: write PHY register failed because some error occurred
+    */
+    esp_err_t (*phy_reg_write)(esp_eth_mediator_t *eth, uint32_t phy_addr, uint32_t phy_reg, uint32_t reg_value);
+
+    /**
+    * @brief Deliver packet to upper stack
+    *
+    * @param[in] eth: mediator of Ethernet driver
+    * @param[in] buffer: packet buffer
+    * @param[in] length: length of the packet
+    *
+    * @return
+    *       - ESP_OK: deliver packet to upper stack successfully
+    *       - ESP_FAIL: deliver packet failed because some error occurred
+    *
+    */
+    esp_err_t (*stack_input)(esp_eth_mediator_t *eth, uint8_t *buffer, uint32_t length);
+
+    /**
+    * @brief Callback on Ethernet state changed
+    *
+    * @param[in] eth: mediator of Ethernet driver
+    * @param[in] state: new state
+    * @param[in] args: optional argument for the new state
+    *
+    * @return
+    *       - ESP_OK: process the new state successfully
+    *       - ESP_FAIL: process the new state failed because some error occurred
+    *
+    */
+    esp_err_t (*on_state_changed)(esp_eth_mediator_t *eth, esp_eth_state_t state, void *args);
+};
+
+/**
+* @brief Ethernet event declarations
+*
+*/
+typedef enum {
+    ETHERNET_EVENT_START,        /*!< Ethernet driver start */
+    ETHERNET_EVENT_STOP,         /*!< Ethernet driver stop */
+    ETHERNET_EVENT_CONNECTED,    /*!< Ethernet got a valid link */
+    ETHERNET_EVENT_DISCONNECTED, /*!< Ethernet lost a valid link */
+} eth_event_t;
+
+/**
+* @brief Ethernet event base declaration
+*
+*/
+ESP_EVENT_DECLARE_BASE(ETH_EVENT);
+
+/**
+* @brief Detect PHY address
+*
+* @param[in] eth: mediator of Ethernet driver
+* @param[out] detected_addr: a valid address after detection
+* @return
+*       - ESP_OK: detect phy address successfully
+*       - ESP_ERR_INVALID_ARG: invalid parameter
+*       - ESP_ERR_NOT_FOUND: can't detect any PHY device
+*       - ESP_FAIL: detect phy address failed because some error occurred
+*/
+esp_err_t esp_eth_detect_phy_addr(esp_eth_mediator_t *eth, int *detected_addr);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_mac.h b/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_mac.h
new file mode 100644
index 00000000000..db462728a18
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_mac.h
@@ -0,0 +1,537 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdbool.h>
+#include "esp_eth_com.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief Ethernet MAC
+*
+*/
+typedef struct esp_eth_mac_s esp_eth_mac_t;
+
+/**
+* @brief Ethernet MAC
+*
+*/
+struct esp_eth_mac_s {
+    /**
+    * @brief Set mediator for Ethernet MAC
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[in] eth: Ethernet mediator
+    *
+    * @return
+    *      - ESP_OK: set mediator for Ethernet MAC successfully
+    *      - ESP_ERR_INVALID_ARG: set mediator for Ethernet MAC failed because of invalid argument
+    *
+    */
+    esp_err_t (*set_mediator)(esp_eth_mac_t *mac, esp_eth_mediator_t *eth);
+
+    /**
+    * @brief Initialize Ethernet MAC
+    *
+    * @param[in] mac: Ethernet MAC instance
+    *
+    * @return
+    *      - ESP_OK: initialize Ethernet MAC successfully
+    *      - ESP_ERR_TIMEOUT: initialize Ethernet MAC failed because of timeout
+    *      - ESP_FAIL: initialize Ethernet MAC failed because some other error occurred
+    *
+    */
+    esp_err_t (*init)(esp_eth_mac_t *mac);
+
+    /**
+    * @brief Deinitialize Ethernet MAC
+    *
+    * @param[in] mac: Ethernet MAC instance
+    *
+    * @return
+    *      - ESP_OK: deinitialize Ethernet MAC successfully
+    *      - ESP_FAIL: deinitialize Ethernet MAC failed because some error occurred
+    *
+    */
+    esp_err_t (*deinit)(esp_eth_mac_t *mac);
+
+    /**
+    * @brief Start Ethernet MAC
+    *
+    * @param[in] mac: Ethernet MAC instance
+    *
+    * @return
+    *      - ESP_OK: start Ethernet MAC successfully
+    *      - ESP_FAIL: start Ethernet MAC failed because some other error occurred
+    *
+    */
+    esp_err_t (*start)(esp_eth_mac_t *mac);
+
+    /**
+    * @brief Stop Ethernet MAC
+    *
+    * @param[in] mac: Ethernet MAC instance
+    *
+    * @return
+    *      - ESP_OK: stop Ethernet MAC successfully
+    *      - ESP_FAIL: stop Ethernet MAC failed because some error occurred
+    *
+    */
+    esp_err_t (*stop)(esp_eth_mac_t *mac);
+
+    /**
+    * @brief Transmit packet from Ethernet MAC
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[in] buf: packet buffer to transmit
+    * @param[in] length: length of packet
+    *
+    * @return
+    *      - ESP_OK: transmit packet successfully
+    *      - ESP_ERR_INVALID_ARG: transmit packet failed because of invalid argument
+    *      - ESP_ERR_INVALID_STATE: transmit packet failed because of wrong state of MAC
+    *      - ESP_FAIL: transmit packet failed because some other error occurred
+    *
+    */
+    esp_err_t (*transmit)(esp_eth_mac_t *mac, uint8_t *buf, uint32_t length);
+
+    /**
+    * @brief Receive packet from Ethernet MAC
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[out] buf: packet buffer which will preserve the received frame
+    * @param[out] length: length of the received packet
+    *
+    * @note Memory of buf is allocated in the Layer2, make sure it get free after process.
+    * @note Before this function got invoked, the value of "length" should set by user, equals the size of buffer.
+    *       After the function returned, the value of "length" means the real length of received data.
+    *
+    * @return
+    *      - ESP_OK: receive packet successfully
+    *      - ESP_ERR_INVALID_ARG: receive packet failed because of invalid argument
+    *      - ESP_ERR_INVALID_SIZE: input buffer size is not enough to hold the incoming data.
+    *                              in this case, value of returned "length" indicates the real size of incoming data.
+    *      - ESP_FAIL: receive packet failed because some other error occurred
+    *
+    */
+    esp_err_t (*receive)(esp_eth_mac_t *mac, uint8_t *buf, uint32_t *length);
+
+    /**
+    * @brief Read PHY register
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[in] phy_addr: PHY chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[out] reg_value: PHY register value
+    *
+    * @return
+    *      - ESP_OK: read PHY register successfully
+    *      - ESP_ERR_INVALID_ARG: read PHY register failed because of invalid argument
+    *      - ESP_ERR_INVALID_STATE: read PHY register failed because of wrong state of MAC
+    *      - ESP_ERR_TIMEOUT: read PHY register failed because of timeout
+    *      - ESP_FAIL: read PHY register failed because some other error occurred
+    *
+    */
+    esp_err_t (*read_phy_reg)(esp_eth_mac_t *mac, uint32_t phy_addr, uint32_t phy_reg, uint32_t *reg_value);
+
+    /**
+    * @brief Write PHY register
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[in] phy_addr: PHY chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[in] reg_value: PHY register value
+    *
+    * @return
+    *      - ESP_OK: write PHY register successfully
+    *      - ESP_ERR_INVALID_STATE: write PHY register failed because of wrong state of MAC
+    *      - ESP_ERR_TIMEOUT: write PHY register failed because of timeout
+    *      - ESP_FAIL: write PHY register failed because some other error occurred
+    *
+    */
+    esp_err_t (*write_phy_reg)(esp_eth_mac_t *mac, uint32_t phy_addr, uint32_t phy_reg, uint32_t reg_value);
+
+    /**
+    * @brief Set MAC address
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[in] addr: MAC address
+    *
+    * @return
+    *      - ESP_OK: set MAC address successfully
+    *      - ESP_ERR_INVALID_ARG: set MAC address failed because of invalid argument
+    *      - ESP_FAIL: set MAC address failed because some other error occurred
+    *
+    */
+    esp_err_t (*set_addr)(esp_eth_mac_t *mac, uint8_t *addr);
+
+    /**
+    * @brief Get MAC address
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[out] addr: MAC address
+    *
+    * @return
+    *      - ESP_OK: get MAC address successfully
+    *      - ESP_ERR_INVALID_ARG: get MAC address failed because of invalid argument
+    *      - ESP_FAIL: get MAC address failed because some other error occurred
+    *
+    */
+    esp_err_t (*get_addr)(esp_eth_mac_t *mac, uint8_t *addr);
+
+    /**
+    * @brief Set speed of MAC
+    *
+    * @param[in] ma:c Ethernet MAC instance
+    * @param[in] speed: MAC speed
+    *
+    * @return
+    *      - ESP_OK: set MAC speed successfully
+    *      - ESP_ERR_INVALID_ARG: set MAC speed failed because of invalid argument
+    *      - ESP_FAIL: set MAC speed failed because some other error occurred
+    *
+    */
+    esp_err_t (*set_speed)(esp_eth_mac_t *mac, eth_speed_t speed);
+
+    /**
+    * @brief Set duplex mode of MAC
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[in] duplex: MAC duplex
+    *
+    * @return
+    *      - ESP_OK: set MAC duplex mode successfully
+    *      - ESP_ERR_INVALID_ARG: set MAC duplex failed because of invalid argument
+    *      - ESP_FAIL: set MAC duplex failed because some other error occurred
+    *
+    */
+    esp_err_t (*set_duplex)(esp_eth_mac_t *mac, eth_duplex_t duplex);
+
+    /**
+    * @brief Set link status of MAC
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[in] link: Link status
+    *
+    * @return
+    *      - ESP_OK: set link status successfully
+    *      - ESP_ERR_INVALID_ARG: set link status failed because of invalid argument
+    *      - ESP_FAIL: set link status failed because some other error occurred
+    *
+    */
+    esp_err_t (*set_link)(esp_eth_mac_t *mac, eth_link_t link);
+
+    /**
+    * @brief Set promiscuous of MAC
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[in] enable: set true to enable promiscuous mode; set false to disable promiscuous mode
+    *
+    * @return
+    *      - ESP_OK: set promiscuous mode successfully
+    *      - ESP_FAIL: set promiscuous mode failed because some error occurred
+    *
+    */
+    esp_err_t (*set_promiscuous)(esp_eth_mac_t *mac, bool enable);
+
+    /**
+    * @brief Enable flow control on MAC layer or not
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[in] enable: set true to enable flow control; set false to disable flow control
+    *
+    * @return
+    *      - ESP_OK: set flow control successfully
+    *      - ESP_FAIL: set flow control failed because some error occurred
+    *
+    */
+    esp_err_t (*enable_flow_ctrl)(esp_eth_mac_t *mac, bool enable);
+
+    /**
+    * @brief Set the PAUSE ability of peer node
+    *
+    * @param[in] mac: Ethernet MAC instance
+    * @param[in] ability: zero indicates that pause function is supported by link partner; non-zero indicates that pause function is not supported by link partner
+    *
+    * @return
+    *      - ESP_OK: set peer pause ability successfully
+    *      - ESP_FAIL: set peer pause ability failed because some error occurred
+    */
+    esp_err_t (*set_peer_pause_ability)(esp_eth_mac_t *mac, uint32_t ability);
+
+    /**
+    * @brief Free memory of Ethernet MAC
+    *
+    * @param[in] mac: Ethernet MAC instance
+    *
+    * @return
+    *      - ESP_OK: free Ethernet MAC instance successfully
+    *      - ESP_FAIL: free Ethernet MAC instance failed because some error occurred
+    *
+    */
+    esp_err_t (*del)(esp_eth_mac_t *mac);
+};
+
+/**
+ * @brief RMII Clock Mode Options
+ *
+ */
+typedef enum {
+    /**
+     * @brief Default values configured using Kconfig are going to be used when "Default" selected.
+     *
+     */
+    EMAC_CLK_DEFAULT,
+
+    /**
+     * @brief Input RMII Clock from external. EMAC Clock GPIO number needs to be configured when this option is selected.
+     *
+     * @note MAC will get RMII clock from outside. Note that ESP32 only supports GPIO0 to input the RMII clock.
+     *
+     */
+    EMAC_CLK_EXT_IN,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock. EMAC Clock GPIO number needs to be configured when this option is selected.
+     *
+     */
+    EMAC_CLK_OUT
+} emac_rmii_clock_mode_t;
+
+/**
+ * @brief RMII Clock GPIO number Options
+ *
+ */
+typedef enum {
+    /**
+     * @brief MAC will get RMII clock from outside at this GPIO.
+     *
+     * @note ESP32 only supports GPIO0 to input the RMII clock.
+     *
+     */
+    EMAC_CLK_IN_GPIO = 0,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock available at GPIO0
+     *
+     * @note GPIO0 can be set to output a pre-divided PLL clock (test only!). Enabling this option will configure GPIO0 to output a 50MHz clock.
+     * In fact this clock doesn’t have directly relationship with EMAC peripheral. Sometimes this clock won’t work well with your PHY chip.
+     * You might need to add some extra devices after GPIO0 (e.g. inverter). Note that outputting RMII clock on GPIO0 is an experimental practice.
+     * If you want the Ethernet to work with WiFi, don’t select GPIO0 output mode for stability.
+     *
+     */
+    EMAC_APPL_CLK_OUT_GPIO = 0,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock available at GPIO16
+     *
+     */
+    EMAC_CLK_OUT_GPIO = 16,
+
+    /**
+     * @brief Inverted Output RMII Clock from internal APLL Clock available at GPIO17
+     *
+     */
+    EMAC_CLK_OUT_180_GPIO = 17
+} emac_rmii_clock_gpio_t;
+
+/**
+ * @brief Ethernet MAC Clock Configuration
+ *
+ */
+typedef union {
+    struct {
+        // MII interface is not fully implemented...
+        // Reserved for GPIO number, clock source, etc. in MII mode
+    } mii; /*!< EMAC MII Clock Configuration */
+    struct {
+        emac_rmii_clock_mode_t clock_mode; /*!< RMII Clock Mode Configuration */
+        emac_rmii_clock_gpio_t clock_gpio; /*!< RMII Clock GPIO Configuration */
+    } rmii; /*!< EMAC RMII Clock Configuration */
+} eth_mac_clock_config_t;
+
+
+/**
+* @brief Configuration of Ethernet MAC object
+*
+*/
+typedef struct {
+    uint32_t sw_reset_timeout_ms;        /*!< Software reset timeout value (Unit: ms) */
+    uint32_t rx_task_stack_size;         /*!< Stack size of the receive task */
+    uint32_t rx_task_prio;               /*!< Priority of the receive task */
+    int smi_mdc_gpio_num;                /*!< SMI MDC GPIO number, set to -1 could bypass the SMI GPIO configuration */
+    int smi_mdio_gpio_num;               /*!< SMI MDIO GPIO number, set to -1 could bypass the SMI GPIO configuration */
+    uint32_t flags;                      /*!< Flags that specify extra capability for mac driver */
+    eth_data_interface_t interface;      /*!< EMAC Data interface to PHY (MII/RMII) */
+    eth_mac_clock_config_t clock_config; /*!< EMAC Interface clock configuration */
+} eth_mac_config_t;
+
+#define ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE (1 << 0) /*!< MAC driver can work when cache is disabled */
+#define ETH_MAC_FLAG_PIN_TO_CORE (1 << 1)             /*!< Pin MAC task to the CPU core where driver installation happened */
+
+/**
+ * @brief Default configuration for Ethernet MAC object
+ *
+ */
+#define ETH_MAC_DEFAULT_CONFIG()                          \
+    {                                                     \
+        .sw_reset_timeout_ms = 100,                       \
+        .rx_task_stack_size = 2048,                       \
+        .rx_task_prio = 15,                               \
+        .smi_mdc_gpio_num = 23,                           \
+        .smi_mdio_gpio_num = 18,                          \
+        .flags = 0,                                       \
+        .interface = EMAC_DATA_INTERFACE_RMII,            \
+        .clock_config =                                   \
+        {                                                 \
+            .rmii =                                       \
+            {                                             \
+                .clock_mode = EMAC_CLK_DEFAULT,           \
+                .clock_gpio = EMAC_CLK_IN_GPIO            \
+            }                                             \
+        }                                                 \
+    }
+
+#if CONFIG_ETH_USE_ESP32_EMAC
+/**
+* @brief Create ESP32 Ethernet MAC instance
+*
+* @param config: Ethernet MAC configuration
+*
+* @return
+*      - instance: create MAC instance successfully
+*      - NULL: create MAC instance failed because some error occurred
+*/
+esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config);
+#endif // CONFIG_ETH_USE_ESP32_EMAC
+
+#if CONFIG_ETH_SPI_ETHERNET_DM9051
+/**
+ * @brief DM9051 specific configuration
+ *
+ */
+typedef struct {
+    void *spi_hdl;     /*!< Handle of SPI device driver */
+    int int_gpio_num;  /*!< Interrupt GPIO number */
+} eth_dm9051_config_t;
+
+/**
+ * @brief Default DM9051 specific configuration
+ *
+ */
+#define ETH_DM9051_DEFAULT_CONFIG(spi_device) \
+    {                                         \
+        .spi_hdl = spi_device,                \
+        .int_gpio_num = 4,                    \
+    }
+
+/**
+* @brief Create DM9051 Ethernet MAC instance
+*
+* @param dm9051_config: DM9051 specific configuration
+* @param mac_config: Ethernet MAC configuration
+*
+* @return
+*      - instance: create MAC instance successfully
+*      - NULL: create MAC instance failed because some error occurred
+*/
+esp_eth_mac_t *esp_eth_mac_new_dm9051(const eth_dm9051_config_t *dm9051_config, const eth_mac_config_t *mac_config);
+#endif // CONFIG_ETH_SPI_ETHERNET_DM9051
+
+#if CONFIG_ETH_SPI_ETHERNET_W5500
+/**
+ * @brief W5500 specific configuration
+ *
+ */
+typedef struct {
+    void *spi_hdl;     /*!< Handle of SPI device driver */
+    int int_gpio_num;  /*!< Interrupt GPIO number */
+} eth_w5500_config_t;
+
+/**
+ * @brief Default W5500 specific configuration
+ *
+ */
+#define ETH_W5500_DEFAULT_CONFIG(spi_device) \
+    {                                        \
+        .spi_hdl = spi_device,               \
+        .int_gpio_num = 4,                   \
+    }
+
+/**
+* @brief Create W5500 Ethernet MAC instance
+*
+* @param w5500_config: W5500 specific configuration
+* @param mac_config: Ethernet MAC configuration
+*
+* @return
+*      - instance: create MAC instance successfully
+*      - NULL: create MAC instance failed because some error occurred
+*/
+esp_eth_mac_t *esp_eth_mac_new_w5500(const eth_w5500_config_t *w5500_config, const eth_mac_config_t *mac_config);
+#endif // CONFIG_ETH_SPI_ETHERNET_W5500
+
+#if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
+/**
+ * @brief KSZ8851SNL specific configuration
+ *
+ */
+typedef struct {
+    void *spi_hdl;     /*!< Handle of SPI device driver */
+    int int_gpio_num;  /*!< Interrupt GPIO number */
+} eth_ksz8851snl_config_t;
+
+/**
+ * @brief Default KSZ8851SNL specific configuration
+ *
+ */
+#define ETH_KSZ8851SNL_DEFAULT_CONFIG(spi_device) \
+    {                                        \
+        .spi_hdl = spi_device,               \
+        .int_gpio_num = 14,                   \
+    }
+
+/**
+* @brief Create KSZ8851SNL Ethernet MAC instance
+*
+* @param ksz8851snl_config: KSZ8851SNL specific configuration
+* @param mac_config: Ethernet MAC configuration
+*
+* @return
+*      - instance: create MAC instance successfully
+*      - NULL: create MAC instance failed because some error occurred
+*/
+esp_eth_mac_t *esp_eth_mac_new_ksz8851snl(const eth_ksz8851snl_config_t *ksz8851snl_config, const eth_mac_config_t *mac_config);
+#endif // CONFIG_ETH_SPI_ETHERNET_KSZ8851
+
+#if CONFIG_ETH_USE_OPENETH
+/**
+* @brief Create OpenCores Ethernet MAC instance
+*
+* @param config: Ethernet MAC configuration
+*
+* @return
+*      - instance: create MAC instance successfully
+*      - NULL: create MAC instance failed because some error occurred
+*/
+esp_eth_mac_t *esp_eth_mac_new_openeth(const eth_mac_config_t *config);
+#endif // CONFIG_ETH_USE_OPENETH
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_netif_glue.h b/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_netif_glue.h
new file mode 100644
index 00000000000..d577fc00b7b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_netif_glue.h
@@ -0,0 +1,78 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "esp_eth.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Handle of netif glue - an intermediate layer between netif and Ethernet driver
+ *
+ */
+typedef struct esp_eth_netif_glue_t* esp_eth_netif_glue_handle_t;
+
+/**
+ * @brief Create a netif glue for Ethernet driver
+ * @note netif glue is used to attach io driver to TCP/IP netif
+ *
+ * @param eth_hdl Ethernet driver handle
+ * @return glue object, which inherits esp_netif_driver_base_t
+ */
+esp_eth_netif_glue_handle_t esp_eth_new_netif_glue(esp_eth_handle_t eth_hdl);
+
+/**
+ * @brief Delete netif glue of Ethernet driver
+ *
+ * @param eth_netif_glue netif glue
+ * @return -ESP_OK: delete netif glue successfully
+ */
+esp_err_t esp_eth_del_netif_glue(esp_eth_netif_glue_handle_t eth_netif_glue);
+
+/**
+ * @brief Register default IP layer handlers for Ethernet
+ *
+ * @note: Ethernet handle might not yet properly initialized when setting up these default handlers
+ * @warning: This function is deprecated and is kept here only for compatibility reasons. Registration
+ *           of default IP layer handlers for Ethernet is now handled automatically. Do not call this
+ *           function if you want to use multiple Ethernet instances at a time.
+ *
+ * @param[in] esp_netif esp network interface handle created for Ethernet driver
+ * @return
+ *      - ESP_ERR_INVALID_ARG: invalid parameter (esp_netif is NULL)
+ *      - ESP_OK: set default IP layer handlers successfully
+ *      - others: other failure occurred during register esp_event handler
+ */
+esp_err_t esp_eth_set_default_handlers(void *esp_netif)  __attribute__ ((deprecated));
+
+/**
+ * @brief Unregister default IP layer handlers for Ethernet
+ *
+ * @warning: This function is deprecated and is kept here only for compatibility reasons. Unregistration
+ *           of default IP layer handlers for Ethernet is now handled automatically if not registered
+ *           by calling esp_eth_set_default_handlers.
+ *
+ * @param[in] esp_netif esp network interface handle created for Ethernet driver
+ * @return
+ *      - ESP_ERR_INVALID_ARG: invalid parameter (esp_netif is NULL)
+ *      - ESP_OK: clear default IP layer handlers successfully
+ *      - others: other failure occurred during unregister esp_event handler
+ */
+esp_err_t esp_eth_clear_default_handlers(void *esp_netif);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_phy.h b/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_phy.h
new file mode 100644
index 00000000000..f85b7d43043
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_eth/include/esp_eth_phy.h
@@ -0,0 +1,347 @@
+// Copyright 2019-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdbool.h>
+#include "esp_eth_com.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_ETH_PHY_ADDR_AUTO (-1)
+
+/**
+* @brief Ethernet PHY
+*
+*/
+typedef struct esp_eth_phy_s esp_eth_phy_t;
+
+/**
+* @brief Ethernet PHY
+*
+*/
+struct esp_eth_phy_s {
+    /**
+    * @brief Set mediator for PHY
+    *
+    * @param[in] phy: Ethernet PHY instance
+    * @param[in] mediator: mediator of Ethernet driver
+    *
+    * @return
+    *      - ESP_OK: set mediator for Ethernet PHY instance successfully
+    *      - ESP_ERR_INVALID_ARG: set mediator for Ethernet PHY instance failed because of some invalid arguments
+    *
+    */
+    esp_err_t (*set_mediator)(esp_eth_phy_t *phy, esp_eth_mediator_t *mediator);
+
+    /**
+    * @brief Software Reset Ethernet PHY
+    *
+    * @param[in] phy: Ethernet PHY instance
+    *
+    * @return
+    *      - ESP_OK: reset Ethernet PHY successfully
+    *      - ESP_FAIL: reset Ethernet PHY failed because some error occurred
+    *
+    */
+    esp_err_t (*reset)(esp_eth_phy_t *phy);
+
+    /**
+    * @brief Hardware Reset Ethernet PHY
+    *
+    * @note Hardware reset is mostly done by pull down and up PHY's nRST pin
+    *
+    * @param[in] phy: Ethernet PHY instance
+    *
+    * @return
+    *      - ESP_OK: reset Ethernet PHY successfully
+    *      - ESP_FAIL: reset Ethernet PHY failed because some error occurred
+    *
+    */
+    esp_err_t (*reset_hw)(esp_eth_phy_t *phy);
+
+    /**
+    * @brief Initialize Ethernet PHY
+    *
+    * @param[in] phy: Ethernet PHY instance
+    *
+    * @return
+    *      - ESP_OK: initialize Ethernet PHY successfully
+    *      - ESP_FAIL: initialize Ethernet PHY failed because some error occurred
+    *
+    */
+    esp_err_t (*init)(esp_eth_phy_t *phy);
+
+    /**
+    * @brief Deinitialize Ethernet PHY
+    *
+    * @param[in] phyL Ethernet PHY instance
+    *
+    * @return
+    *      - ESP_OK: deinitialize Ethernet PHY successfully
+    *      - ESP_FAIL: deinitialize Ethernet PHY failed because some error occurred
+    *
+    */
+    esp_err_t (*deinit)(esp_eth_phy_t *phy);
+
+    /**
+    * @brief Start auto negotiation
+    *
+    * @param[in] phy: Ethernet PHY instance
+    *
+    * @return
+    *      - ESP_OK: restart auto negotiation successfully
+    *      - ESP_FAIL: restart auto negotiation failed because some error occurred
+    *
+    */
+    esp_err_t (*negotiate)(esp_eth_phy_t *phy);
+
+    /**
+    * @brief Get Ethernet PHY link status
+    *
+    * @param[in] phy: Ethernet PHY instance
+    *
+    * @return
+    *      - ESP_OK: get Ethernet PHY link status successfully
+    *      - ESP_FAIL: get Ethernet PHY link status failed because some error occurred
+    *
+    */
+    esp_err_t (*get_link)(esp_eth_phy_t *phy);
+
+    /**
+    * @brief Power control of Ethernet PHY
+    *
+    * @param[in] phy: Ethernet PHY instance
+    * @param[in] enable: set true to power on Ethernet PHY; ser false to power off Ethernet PHY
+    *
+    * @return
+    *      - ESP_OK: control Ethernet PHY power successfully
+    *      - ESP_FAIL: control Ethernet PHY power failed because some error occurred
+    *
+    */
+    esp_err_t (*pwrctl)(esp_eth_phy_t *phy, bool enable);
+
+    /**
+    * @brief Set PHY chip address
+    *
+    * @param[in] phy: Ethernet PHY instance
+    * @param[in] addr: PHY chip address
+    *
+    * @return
+    *      - ESP_OK: set Ethernet PHY address successfully
+    *      - ESP_FAIL: set Ethernet PHY address failed because some error occurred
+    *
+    */
+    esp_err_t (*set_addr)(esp_eth_phy_t *phy, uint32_t addr);
+
+    /**
+    * @brief Get PHY chip address
+    *
+    * @param[in] phy: Ethernet PHY instance
+    * @param[out] addr: PHY chip address
+    *
+    * @return
+    *      - ESP_OK: get Ethernet PHY address successfully
+    *      - ESP_ERR_INVALID_ARG: get Ethernet PHY address failed because of invalid argument
+    *
+    */
+    esp_err_t (*get_addr)(esp_eth_phy_t *phy, uint32_t *addr);
+
+    /**
+    * @brief Advertise pause function supported by MAC layer
+    *
+    * @param[in] phy: Ethernet PHY instance
+    * @param[out] addr: Pause ability
+    *
+    * @return
+    *      - ESP_OK: Advertise pause ability successfully
+    *      - ESP_ERR_INVALID_ARG: Advertise pause ability failed because of invalid argument
+    *
+    */
+    esp_err_t (*advertise_pause_ability)(esp_eth_phy_t *phy, uint32_t ability);
+
+    /**
+    * @brief
+    *
+    * @param[in] phy: Ethernet PHY instance
+    * @param[in] enable: enables or disables PHY loopback
+    *
+    * @return
+    *      - ESP_OK: configures PHY instance loopback function successfully
+    *      - ESP_FAIL: PHY instance loopback configuration failed because some error occurred
+    *
+    */
+    esp_err_t (*loopback)(esp_eth_phy_t *phy, bool enable);
+
+    /**
+    * @brief Free memory of Ethernet PHY instance
+    *
+    * @param[in] phy: Ethernet PHY instance
+    *
+    * @return
+    *      - ESP_OK: free PHY instance successfully
+    *      - ESP_FAIL: free PHY instance failed because some error occurred
+    *
+    */
+    esp_err_t (*del)(esp_eth_phy_t *phy);
+};
+
+/**
+* @brief Ethernet PHY configuration
+*
+*/
+typedef struct {
+    int32_t phy_addr;             /*!< PHY address, set -1 to enable PHY address detection at initialization stage */
+    uint32_t reset_timeout_ms;    /*!< Reset timeout value (Unit: ms) */
+    uint32_t autonego_timeout_ms; /*!< Auto-negotiation timeout value (Unit: ms) */
+    int reset_gpio_num;           /*!< Reset GPIO number, -1 means no hardware reset */
+} eth_phy_config_t;
+
+/**
+ * @brief Default configuration for Ethernet PHY object
+ *
+ */
+#define ETH_PHY_DEFAULT_CONFIG()           \
+    {                                      \
+        .phy_addr = ESP_ETH_PHY_ADDR_AUTO, \
+        .reset_timeout_ms = 100,           \
+        .autonego_timeout_ms = 4000,       \
+        .reset_gpio_num = 5,               \
+    }
+
+/**
+* @brief Create a PHY instance of IP101
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_ip101(const eth_phy_config_t *config);
+
+/**
+* @brief Create a PHY instance of RTL8201
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_rtl8201(const eth_phy_config_t *config);
+
+/**
+* @brief Create a PHY instance of LAN87xx
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_lan87xx(const eth_phy_config_t *config);
+
+/**
+* @brief Create a PHY instance of LAN8720
+*
+* @note For ESP-IDF backwards compatibility reasons. In all other cases, use esp_eth_phy_new_lan87xx instead.
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+static inline esp_eth_phy_t *esp_eth_phy_new_lan8720(const eth_phy_config_t *config)
+{
+    return esp_eth_phy_new_lan87xx(config);
+}
+
+/**
+* @brief Create a PHY instance of DP83848
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_dp83848(const eth_phy_config_t *config);
+
+/**
+* @brief Create a PHY instance of KSZ8041
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_ksz8041(const eth_phy_config_t *config);
+
+/**
+* @brief Create a PHY instance of KSZ8081
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_ksz8081(const eth_phy_config_t *config);
+
+#if CONFIG_ETH_SPI_ETHERNET_DM9051
+/**
+* @brief Create a PHY instance of DM9051
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_dm9051(const eth_phy_config_t *config);
+#endif
+
+#if CONFIG_ETH_SPI_ETHERNET_W5500
+/**
+* @brief Create a PHY instance of W5500
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_w5500(const eth_phy_config_t *config);
+#endif
+
+#if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
+/**
+* @brief Create a PHY instance of KSZ8851SNL
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_ksz8851snl(const eth_phy_config_t *config);
+#endif
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_eth/include/eth_phy_regs_struct.h b/tools/sdk/esp32s3/include/esp_eth/include/eth_phy_regs_struct.h
new file mode 100644
index 00000000000..e725333e52f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_eth/include/eth_phy_regs_struct.h
@@ -0,0 +1,163 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************Basic PHY Registers*******************/
+
+/**
+ * @brief BMCR(Basic Mode Control Register)
+ *
+ */
+typedef union {
+    struct {
+        uint32_t reserved : 7;          /*!< Reserved */
+        uint32_t collision_test : 1;    /*!< Collision test */
+        uint32_t duplex_mode : 1;       /*!< Duplex mode:Full Duplex(1) and Half Duplex(0) */
+        uint32_t restart_auto_nego : 1; /*!< Restart auto-negotiation */
+        uint32_t isolate : 1;           /*!< Isolate the PHY from MII except the SMI interface */
+        uint32_t power_down : 1;        /*!< Power off PHY except SMI interface */
+        uint32_t en_auto_nego : 1;      /*!< Enable auto negotiation */
+        uint32_t speed_select : 1;      /*!< Select speed: 100Mbps(1) and 10Mbps(0) */
+        uint32_t en_loopback : 1;       /*!< Enables transmit data to be routed to the receive path */
+        uint32_t reset : 1;             /*!< Reset PHY registers. This bit is self-clearing. */
+    };
+    uint32_t val;
+} bmcr_reg_t;
+#define ETH_PHY_BMCR_REG_ADDR (0x00)
+
+/**
+ * @brief BMSR(Basic Mode Status Register)
+ *
+ */
+typedef union {
+    struct {
+        uint32_t ext_capability : 1;       /*!< Extended register capability */
+        uint32_t jabber_detect : 1;        /*!< Jabber condition detected */
+        uint32_t link_status : 1;          /*!< Link status */
+        uint32_t auto_nego_ability : 1;    /*!< Auto negotiation ability */
+        uint32_t remote_fault : 1;         /*!< Remote fault detected */
+        uint32_t auto_nego_complete : 1;   /*!< Auto negotiation completed */
+        uint32_t mf_preamble_suppress : 1; /*!< Preamble suppression capability for management frame */
+        uint32_t reserved : 1;             /*!< Reserved */
+        uint32_t ext_status : 1;           /*!< Extended Status */
+        uint32_t base100_t2_hdx : 1;       /*!< 100Base-T2 Half Duplex capability */
+        uint32_t base100_t2_fdx : 1;       /*!< 100Base-T2 Full Duplex capability */
+        uint32_t base10_t_hdx : 1;         /*!< 10Base-T Half Duplex capability */
+        uint32_t base10_t_fdx : 1;         /*!< 10Base-T Full Duplex capability */
+        uint32_t base100_tx_hdx : 1;       /*!< 100Base-Tx Half Duplex capability */
+        uint32_t base100_tx_fdx : 1;       /*!< 100Base-Tx Full Duplex capability */
+        uint32_t based100_t4 : 1;          /*!< 100Base-T4 capability */
+    };
+    uint32_t val;
+} bmsr_reg_t;
+#define ETH_PHY_BMSR_REG_ADDR (0x01)
+
+/**
+ * @brief PHYIDR1(PHY Identifier Register 1)
+ *
+ */
+typedef union {
+    struct {
+        uint32_t oui_msb : 16; /*!< Organizationally Unique Identifier(OUI) most significant bits */
+    };
+    uint32_t val;
+} phyidr1_reg_t;
+#define ETH_PHY_IDR1_REG_ADDR (0x02)
+
+/**
+ * @brief PHYIDR2(PHY Identifier Register 2)
+ *
+ */
+typedef union {
+    struct {
+        uint32_t model_revision : 4; /*!< Model revision number */
+        uint32_t vendor_model : 6;   /*!< Vendor model number */
+        uint32_t oui_lsb : 6;        /*!< Organizationally Unique Identifier(OUI) least significant bits */
+    };
+    uint32_t val;
+} phyidr2_reg_t;
+#define ETH_PHY_IDR2_REG_ADDR (0x03)
+
+/**
+ * @brief ANAR(Auto-Negotiation Advertisement Register)
+ *
+ */
+typedef union {
+    struct {
+        uint32_t protocol_select : 5;  /*!< Binary encoded selector supported by this PHY */
+        uint32_t base10_t : 1;         /*!< 10Base-T support */
+        uint32_t base10_t_fd : 1;      /*!< 10Base-T full duplex support */
+        uint32_t base100_tx : 1;       /*!< 100Base-TX support */
+        uint32_t base100_tx_fd : 1;    /*!< 100Base-TX full duplex support */
+        uint32_t base100_t4 : 1;       /*!< 100Base-T4 support */
+        uint32_t symmetric_pause : 1;  /*!< Symmetric pause support for full duplex links */
+        uint32_t asymmetric_pause : 1; /*!< Asymmetric pause support for full duplex links */
+        uint32_t reserved1 : 1;        /*!< Reserved */
+        uint32_t remote_fault : 1;     /*!< Advertise remote fault detection capability */
+        uint32_t acknowledge : 1;      /*!< Link partner ability data reception acknowledged */
+        uint32_t next_page : 1;        /*!< Next page indication, if set, next page transfer is desired */
+    };
+    uint32_t val;
+} anar_reg_t;
+#define ETH_PHY_ANAR_REG_ADDR (0x04)
+
+/**
+ * @brief ANLPAR(Auto-Negotiation Link Partner Ability Register)
+ *
+ */
+typedef union {
+    struct {
+        uint32_t protocol_select : 5;  /*!< Link Partner’s binary encoded node selector */
+        uint32_t base10_t : 1;         /*!< 10Base-T support */
+        uint32_t base10_t_fd : 1;      /*!< 10Base-T full duplex support */
+        uint32_t base100_tx : 1;       /*!< 100Base-TX support */
+        uint32_t base100_tx_fd : 1;    /*!< 100Base-TX full duplex support */
+        uint32_t base100_t4 : 1;       /*!< 100Base-T4 support */
+        uint32_t symmetric_pause : 1;  /*!< Symmetric pause supported by Link Partner */
+        uint32_t asymmetric_pause : 1; /*!< Asymmetric pause supported by Link Partner */
+        uint32_t reserved : 1;         /*!< Reserved */
+        uint32_t remote_fault : 1;     /*!< Link partner is indicating a remote fault */
+        uint32_t acknowledge : 1;      /*!< Acknowledges from link partner */
+        uint32_t next_page : 1;        /*!< Next page indication */
+    };
+    uint32_t val;
+} anlpar_reg_t;
+#define ETH_PHY_ANLPAR_REG_ADDR (0x05)
+
+/**
+ * @brief ANER(Auto-Negotiate Expansion Register)
+ *
+ */
+typedef union {
+    struct {
+        uint32_t link_partner_auto_nego_able : 1; /*!< Link partner auto-negotiation ability */
+        uint32_t link_page_received : 1;          /*!< Link code word page has received */
+        uint32_t next_page_able : 1;              /*!< Next page ablility */
+        uint32_t link_partner_next_page_able : 1; /*!< Link partner next page ability */
+        uint32_t parallel_detection_fault : 1;    /*!< Parallel detection fault */
+        uint32_t reserved : 11;                   /*!< Reserved */
+    };
+    uint32_t val;
+} aner_reg_t;
+#define ETH_PHY_ANER_REG_ADDR (0x06)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_event/include/esp_event.h b/tools/sdk/esp32s3/include/esp_event/include/esp_event.h
new file mode 100644
index 00000000000..2c069b0c684
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_event/include/esp_event.h
@@ -0,0 +1,527 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//         http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef ESP_EVENT_H_
+#define ESP_EVENT_H_
+
+#include "esp_err.h"
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "freertos/semphr.h"
+
+#include "esp_event_base.h"
+// Legacy event loop not implemented on Linux target
+#if !CONFIG_IDF_TARGET_LINUX
+#include "esp_event_legacy.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Configuration for creating event loops
+typedef struct {
+    int32_t queue_size;                         /**< size of the event loop queue */
+    const char *task_name;                      /**< name of the event loop task; if NULL,
+                                                        a dedicated task is not created for event loop*/
+    UBaseType_t task_priority;                  /**< priority of the event loop task, ignored if task name is NULL */
+    uint32_t task_stack_size;                   /**< stack size of the event loop task, ignored if task name is NULL */
+    BaseType_t task_core_id;                    /**< core to which the event loop task is pinned to,
+                                                        ignored if task name is NULL */
+} esp_event_loop_args_t;
+
+/**
+ * @brief Create a new event loop.
+ *
+ * @param[in] event_loop_args configuration structure for the event loop to create
+ * @param[out] event_loop handle to the created event loop
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_INVALID_ARG: event_loop_args or event_loop was NULL
+ *  - ESP_ERR_NO_MEM: Cannot allocate memory for event loops list
+ *  - ESP_FAIL: Failed to create task loop
+ *  - Others: Fail
+ */
+esp_err_t esp_event_loop_create(const esp_event_loop_args_t *event_loop_args, esp_event_loop_handle_t *event_loop);
+
+/**
+ * @brief Delete an existing event loop.
+ *
+ * @param[in] event_loop event loop to delete, must not be NULL
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - Others: Fail
+ */
+esp_err_t esp_event_loop_delete(esp_event_loop_handle_t event_loop);
+
+/**
+ * @brief Create default event loop
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_NO_MEM: Cannot allocate memory for event loops list
+ *  - ESP_FAIL: Failed to create task loop
+ *  - Others: Fail
+ */
+esp_err_t esp_event_loop_create_default(void);
+
+/**
+ * @brief Delete the default event loop
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - Others: Fail
+ */
+esp_err_t esp_event_loop_delete_default(void);
+
+/**
+ * @brief Dispatch events posted to an event loop.
+ *
+ * This function is used to dispatch events posted to a loop with no dedicated task, i.e task name was set to NULL
+ * in event_loop_args argument during loop creation. This function includes an argument to limit the amount of time
+ * it runs, returning control to the caller when that time expires (or some time afterwards). There is no guarantee
+ * that a call to this function will exit at exactly the time of expiry. There is also no guarantee that events have
+ * been dispatched during the call, as the function might have spent all of the alloted time waiting on the event queue.
+ * Once an event has been unqueued, however, it is guaranteed to be dispatched. This guarantee contributes to not being
+ * able to exit exactly at time of expiry as (1) blocking on internal mutexes is necessary for dispatching the unqueued
+ * event, and (2) during  dispatch of the unqueued event there is no way to control the time occupied by handler code
+ * execution. The guaranteed time of exit is therefore the alloted time + amount of time required to dispatch
+ * the last unqueued event.
+ *
+ * In cases where waiting on the queue times out, ESP_OK is returned and not ESP_ERR_TIMEOUT, since it is
+ * normal behavior.
+ *
+ * @param[in] event_loop event loop to dispatch posted events from, must not be NULL
+ * @param[in] ticks_to_run number of ticks to run the loop
+ *
+ * @note encountering an unknown event that has been posted to the loop will only generate a warning, not an error.
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - Others: Fail
+ */
+esp_err_t esp_event_loop_run(esp_event_loop_handle_t event_loop, TickType_t ticks_to_run);
+
+/**
+ * @brief Register an event handler to the system event loop (legacy).
+ *
+ * @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_register()
+ *       instead.
+ *
+ * This function can be used to register a handler for either: (1) specific events,
+ * (2) all events of a certain event base, or (3) all events known by the system event loop.
+ *
+ *  - specific events: specify exact event_base and event_id
+ *  - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id
+ *  - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id
+ *
+ * Registering multiple handlers to events is possible. Registering a single handler to multiple events is
+ * also possible. However, registering the same handler to the same event multiple times would cause the
+ * previous registrations to be overwritten.
+ *
+ * @param[in] event_base the base id of the event to register the handler for
+ * @param[in] event_id the id of the event to register the handler for
+ * @param[in] event_handler the handler function which gets called when the event is dispatched
+ * @param[in] event_handler_arg data, aside from event data, that is passed to the handler when it is called
+ *
+ * @note the event loop library does not maintain a copy of event_handler_arg, therefore the user should
+ * ensure that event_handler_arg still points to a valid location by the time the handler gets called
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_NO_MEM: Cannot allocate memory for the handler
+ *  - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id
+ *  - Others: Fail
+ */
+esp_err_t esp_event_handler_register(esp_event_base_t event_base,
+                                     int32_t event_id,
+                                     esp_event_handler_t event_handler,
+                                     void *event_handler_arg);
+
+/**
+ * @brief Register an event handler to a specific loop (legacy).
+ *
+ * @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_register_with()
+ *       instead.
+ *
+ * This function behaves in the same manner as esp_event_handler_register, except the additional
+ * specification of the event loop to register the handler to.
+ *
+ * @param[in] event_loop the event loop to register this handler function to, must not be NULL
+ * @param[in] event_base the base id of the event to register the handler for
+ * @param[in] event_id the id of the event to register the handler for
+ * @param[in] event_handler the handler function which gets called when the event is dispatched
+ * @param[in] event_handler_arg data, aside from event data, that is passed to the handler when it is called
+ *
+ * @note the event loop library does not maintain a copy of event_handler_arg, therefore the user should
+ * ensure that event_handler_arg still points to a valid location by the time the handler gets called
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_NO_MEM: Cannot allocate memory for the handler
+ *  - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id
+ *  - Others: Fail
+ */
+esp_err_t esp_event_handler_register_with(esp_event_loop_handle_t event_loop,
+                                          esp_event_base_t event_base,
+                                          int32_t event_id,
+                                          esp_event_handler_t event_handler,
+                                          void *event_handler_arg);
+
+/**
+ * @brief Register an instance of event handler to a specific loop.
+ *
+ * This function can be used to register a handler for either: (1) specific events,
+ * (2) all events of a certain event base, or (3) all events known by the system event loop.
+ *
+ *  - specific events: specify exact event_base and event_id
+ *  - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id
+ *  - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id
+ *
+ * Besides the error, the function returns an instance object as output parameter to identify each registration.
+ * This is necessary to remove (unregister) the registration before the event loop is deleted.
+ *
+ * Registering multiple handlers to events, registering a single handler to multiple events as well as registering
+ * the same handler to the same event multiple times is possible.
+ * Each registration yields a distinct instance object which identifies it over the registration
+ * lifetime.
+ *
+ * @param[in] event_loop the event loop to register this handler function to, must not be NULL
+ * @param[in] event_base the base id of the event to register the handler for
+ * @param[in] event_id the id of the event to register the handler for
+ * @param[in] event_handler the handler function which gets called when the event is dispatched
+ * @param[in] event_handler_arg data, aside from event data, that is passed to the handler when it is called
+ * @param[out] instance An event handler instance object related to the registered event handler and data, can be NULL.
+ *             This needs to be kept if the specific callback instance should be unregistered before deleting the whole
+ *             event loop. Registering the same event handler multiple times is possible and yields distinct instance
+ *             objects. The data can be the same for all registrations.
+ *             If no unregistration is needed but the handler should be deleted when the event loop is deleted,
+ *             instance can be NULL.
+ *
+ * @note the event loop library does not maintain a copy of event_handler_arg, therefore the user should
+ * ensure that event_handler_arg still points to a valid location by the time the handler gets called
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_NO_MEM: Cannot allocate memory for the handler
+ *  - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id or instance is NULL
+ *  - Others: Fail
+ */
+esp_err_t esp_event_handler_instance_register_with(esp_event_loop_handle_t event_loop,
+                                                  esp_event_base_t event_base,
+                                                  int32_t event_id,
+                                                  esp_event_handler_t event_handler,
+                                                  void *event_handler_arg,
+                                                  esp_event_handler_instance_t *instance);
+
+/**
+ * @brief Register an instance of event handler to the default loop.
+ *
+ * This function does the same as esp_event_handler_instance_register_with, except that it registers the
+ * handler to the default event loop.
+ *
+ * @param[in] event_base the base id of the event to register the handler for
+ * @param[in] event_id the id of the event to register the handler for
+ * @param[in] event_handler the handler function which gets called when the event is dispatched
+ * @param[in] event_handler_arg data, aside from event data, that is passed to the handler when it is called
+ * @param[out] instance An event handler instance object related to the registered event handler and data, can be NULL.
+ *             This needs to be kept if the specific callback instance should be unregistered before deleting the whole
+ *             event loop. Registering the same event handler multiple times is possible and yields distinct instance
+ *             objects. The data can be the same for all registrations.
+ *             If no unregistration is needed but the handler should be deleted when the event loop is deleted,
+ *             instance can be NULL.
+ *
+ * @note the event loop library does not maintain a copy of event_handler_arg, therefore the user should
+ * ensure that event_handler_arg still points to a valid location by the time the handler gets called
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_NO_MEM: Cannot allocate memory for the handler
+ *  - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id or instance is NULL
+ *  - Others: Fail
+ */
+esp_err_t esp_event_handler_instance_register(esp_event_base_t event_base,
+                                             int32_t event_id,
+                                             esp_event_handler_t event_handler,
+                                             void *event_handler_arg,
+                                             esp_event_handler_instance_t *instance);
+
+/**
+ * @brief Unregister a handler with the system event loop (legacy).
+ *
+ * @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_unregister()
+ *       instead.
+ *
+ * Unregisters a handler so it will no longer be called during dispatch.
+ * Handlers can be unregistered for any combination of event_base and event_id which were previously registered.
+ * To unregister a handler, the event_base and event_id arguments must match exactly the arguments passed to
+ * esp_event_handler_register() when that handler was registered. Passing ESP_EVENT_ANY_BASE and/or ESP_EVENT_ANY_ID
+ * will only unregister handlers that were registered with the same wildcard arguments.
+ *
+ * @note When using ESP_EVENT_ANY_ID, handlers registered to specific event IDs using the same base will not be
+ *       unregistered. When using ESP_EVENT_ANY_BASE, events registered to specific bases will also not be
+ *       unregistered. This avoids accidental unregistration of handlers registered by other users or components.
+ *
+ * @param[in] event_base the base of the event with which to unregister the handler
+ * @param[in] event_id the id of the event with which to unregister the handler
+ * @param[in] event_handler the handler to unregister
+ *
+ * @return ESP_OK success
+ * @return ESP_ERR_INVALID_ARG invalid combination of event base and event id
+ * @return others fail
+ */
+esp_err_t esp_event_handler_unregister(esp_event_base_t event_base,
+                                       int32_t event_id,
+                                       esp_event_handler_t event_handler);
+
+/**
+ * @brief Unregister a handler from a specific event loop (legacy).
+ *
+ * @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_unregister_with()
+ *       instead.
+ *
+ * This function behaves in the same manner as esp_event_handler_unregister, except the additional specification of
+ * the event loop to unregister the handler with.
+ *
+ * @param[in] event_loop the event loop with which to unregister this handler function, must not be NULL
+ * @param[in] event_base the base of the event with which to unregister the handler
+ * @param[in] event_id the id of the event with which to unregister the handler
+ * @param[in] event_handler the handler to unregister
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id
+ *  - Others: Fail
+ */
+esp_err_t esp_event_handler_unregister_with(esp_event_loop_handle_t event_loop,
+                                            esp_event_base_t event_base,
+                                            int32_t event_id,
+                                            esp_event_handler_t event_handler);
+
+/**
+ * @brief Unregister a handler instance from a specific event loop.
+ *
+ * Unregisters a handler instance so it will no longer be called during dispatch.
+ * Handler instances can be unregistered for any combination of event_base and event_id which were previously
+ * registered. To unregister a handler instance, the event_base and event_id arguments must match exactly the
+ * arguments passed to esp_event_handler_instance_register() when that handler instance was registered.
+ * Passing ESP_EVENT_ANY_BASE and/or ESP_EVENT_ANY_ID will only unregister handler instances that were registered
+ * with the same wildcard arguments.
+ *
+ * @note When using ESP_EVENT_ANY_ID, handlers registered to specific event IDs using the same base will not be
+ *       unregistered. When using ESP_EVENT_ANY_BASE, events registered to specific bases will also not be
+ *       unregistered. This avoids accidental unregistration of handlers registered by other users or components.
+ *
+ * @param[in] event_loop the event loop with which to unregister this handler function, must not be NULL
+ * @param[in] event_base the base of the event with which to unregister the handler
+ * @param[in] event_id the id of the event with which to unregister the handler
+ * @param[in] instance the instance object of the registration to be unregistered
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id
+ *  - Others: Fail
+ */
+esp_err_t esp_event_handler_instance_unregister_with(esp_event_loop_handle_t event_loop,
+                                                     esp_event_base_t event_base,
+                                                     int32_t event_id,
+                                                     esp_event_handler_instance_t instance);
+
+/**
+ * @brief Unregister a handler from the system event loop.
+ *
+ * This function does the same as esp_event_handler_instance_unregister_with, except that it unregisters the
+ * handler instance from the default event loop.
+ *
+ * @param[in] event_base the base of the event with which to unregister the handler
+ * @param[in] event_id the id of the event with which to unregister the handler
+ * @param[in] instance the instance object of the registration to be unregistered
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id
+ *  - Others: Fail
+ */
+esp_err_t esp_event_handler_instance_unregister(esp_event_base_t event_base,
+                                                int32_t event_id,
+                                                esp_event_handler_instance_t instance);
+
+/**
+ * @brief Posts an event to the system default event loop. The event loop library keeps a copy of event_data and manages
+ * the copy's lifetime automatically (allocation + deletion); this ensures that the data the
+ * handler recieves is always valid.
+ *
+ * @param[in] event_base the event base that identifies the event
+ * @param[in] event_id the event id that identifies the event
+ * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
+ * @param[in] event_data_size the size of the event data
+ * @param[in] ticks_to_wait number of ticks to block on a full event queue
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_TIMEOUT: Time to wait for event queue to unblock expired,
+ *                      queue full when posting from ISR
+ *  - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id
+ *  - Others: Fail
+ */
+esp_err_t esp_event_post(esp_event_base_t event_base,
+                         int32_t event_id,
+                         void *event_data,
+                         size_t event_data_size,
+                         TickType_t ticks_to_wait);
+
+/**
+ * @brief Posts an event to the specified event loop. The event loop library keeps a copy of event_data and manages
+ * the copy's lifetime automatically (allocation + deletion); this ensures that the data the
+ * handler recieves is always valid.
+ *
+ * This function behaves in the same manner as esp_event_post_to, except the additional specification of the event loop
+ * to post the event to.
+ *
+ * @param[in] event_loop the event loop to post to, must not be NULL
+ * @param[in] event_base the event base that identifies the event
+ * @param[in] event_id the event id that identifies the event
+ * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
+ * @param[in] event_data_size the size of the event data
+ * @param[in] ticks_to_wait number of ticks to block on a full event queue
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_TIMEOUT: Time to wait for event queue to unblock expired,
+ *                      queue full when posting from ISR
+ *  - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id
+ *  - Others: Fail
+ */
+esp_err_t esp_event_post_to(esp_event_loop_handle_t event_loop,
+                            esp_event_base_t event_base,
+                            int32_t event_id,
+                            void *event_data,
+                            size_t event_data_size,
+                            TickType_t ticks_to_wait);
+
+#if CONFIG_ESP_EVENT_POST_FROM_ISR
+/**
+ * @brief Special variant of esp_event_post for posting events from interrupt handlers.
+ *
+ * @param[in] event_base the event base that identifies the event
+ * @param[in] event_id the event id that identifies the event
+ * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
+ * @param[in] event_data_size the size of the event data; max is 4 bytes
+ * @param[out] task_unblocked an optional parameter (can be NULL) which indicates that an event task with
+ *                            higher priority than currently running task has been unblocked by the posted event;
+ *                            a context switch should be requested before the interrupt is existed.
+ *
+ * @note this function is only available when CONFIG_ESP_EVENT_POST_FROM_ISR is enabled
+ * @note when this function is called from an interrupt handler placed in IRAM, this function should
+ *       be placed in IRAM as well by enabling CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_FAIL: Event queue for the default event loop full
+ *  - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id,
+ *                          data size of more than 4 bytes
+ *  - Others: Fail
+ */
+esp_err_t esp_event_isr_post(esp_event_base_t event_base,
+                             int32_t event_id,
+                             void *event_data,
+                             size_t event_data_size,
+                             BaseType_t *task_unblocked);
+
+/**
+ * @brief Special variant of esp_event_post_to for posting events from interrupt handlers
+ *
+ * @param[in] event_loop the event loop to post to, must not be NULL
+ * @param[in] event_base the event base that identifies the event
+ * @param[in] event_id the event id that identifies the event
+ * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
+ * @param[in] event_data_size the size of the event data
+ * @param[out] task_unblocked an optional parameter (can be NULL) which indicates that an event task with
+ *                            higher priority than currently running task has been unblocked by the posted event;
+ *                            a context switch should be requested before the interrupt is existed.
+ *
+ * @note this function is only available when CONFIG_ESP_EVENT_POST_FROM_ISR is enabled
+ * @note when this function is called from an interrupt handler placed in IRAM, this function should
+ *       be placed in IRAM as well by enabling CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_FAIL: Event queue for the loop full
+ *  - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id,
+ *                          data size of more than 4 bytes
+ *  - Others: Fail
+ */
+esp_err_t esp_event_isr_post_to(esp_event_loop_handle_t event_loop,
+                                esp_event_base_t event_base,
+                                int32_t event_id,
+                                void *event_data,
+                                size_t event_data_size,
+                                BaseType_t *task_unblocked);
+#endif
+
+/**
+ * @brief Dumps statistics of all event loops.
+ *
+ * Dumps event loop info in the format:
+ *
+ @verbatim
+       event loop
+           handler
+           handler
+           ...
+       event loop
+           handler
+           handler
+           ...
+
+  where:
+
+   event loop
+       format: address,name rx:total_recieved dr:total_dropped
+       where:
+           address - memory address of the event loop
+           name - name of the event loop, 'none' if no dedicated task
+           total_recieved - number of successfully posted events
+           total_dropped - number of events unsuccessfully posted due to queue being full
+
+   handler
+       format: address ev:base,id inv:total_invoked run:total_runtime
+       where:
+           address - address of the handler function
+           base,id - the event specified by event base and id this handler executes
+           total_invoked - number of times this handler has been invoked
+           total_runtime - total amount of time used for invoking this handler
+
+ @endverbatim
+ *
+ * @param[in] file the file stream to output to
+ *
+ * @note this function is a noop when CONFIG_ESP_EVENT_LOOP_PROFILING is disabled
+ *
+ * @return
+ *  - ESP_OK: Success
+ *  - ESP_ERR_NO_MEM: Cannot allocate memory for event loops list
+ *  - Others: Fail
+ */
+esp_err_t esp_event_dump(FILE *file);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif // #ifndef ESP_EVENT_H_
diff --git a/tools/sdk/esp32s3/include/esp_event/include/esp_event_base.h b/tools/sdk/esp32s3/include/esp_event/include/esp_event_base.h
new file mode 100644
index 00000000000..fc5a1deb020
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_event/include/esp_event_base.h
@@ -0,0 +1,43 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//         http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef ESP_EVENT_BASE_H_
+#define ESP_EVENT_BASE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Defines for declaring and defining event base
+#define ESP_EVENT_DECLARE_BASE(id) extern esp_event_base_t id
+#define ESP_EVENT_DEFINE_BASE(id) esp_event_base_t id = #id
+
+// Event loop library types
+typedef const char*  esp_event_base_t; /**< unique pointer to a subsystem that exposes events */
+typedef void*        esp_event_loop_handle_t; /**< a number that identifies an event with respect to a base */
+typedef void         (*esp_event_handler_t)(void* event_handler_arg,
+                                        esp_event_base_t event_base,
+                                        int32_t event_id,
+                                        void* event_data); /**< function called when an event is posted to the queue */
+typedef void*        esp_event_handler_instance_t; /**< context identifying an instance of a registered event handler */
+
+// Defines for registering/unregistering event handlers
+#define ESP_EVENT_ANY_BASE     NULL             /**< register handler for any event base */
+#define ESP_EVENT_ANY_ID       -1               /**< register handler for any event id */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // #ifndef ESP_EVENT_BASE_H_
diff --git a/tools/sdk/esp32s3/include/esp_event/include/esp_event_legacy.h b/tools/sdk/esp32s3/include/esp_event/include/esp_event_legacy.h
new file mode 100644
index 00000000000..dbeeced674b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_event/include/esp_event_legacy.h
@@ -0,0 +1,261 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_err.h"
+#include "esp_wifi_types.h"
+#include "esp_netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** System event types enumeration */
+typedef enum {
+    SYSTEM_EVENT_WIFI_READY = 0,           /*!< ESP32 WiFi ready */
+    SYSTEM_EVENT_SCAN_DONE,                /*!< ESP32 finish scanning AP */
+    SYSTEM_EVENT_STA_START,                /*!< ESP32 station start */
+    SYSTEM_EVENT_STA_STOP,                 /*!< ESP32 station stop */
+    SYSTEM_EVENT_STA_CONNECTED,            /*!< ESP32 station connected to AP */
+    SYSTEM_EVENT_STA_DISCONNECTED,         /*!< ESP32 station disconnected from AP */
+    SYSTEM_EVENT_STA_AUTHMODE_CHANGE,      /*!< the auth mode of AP connected by ESP32 station changed */
+    SYSTEM_EVENT_STA_GOT_IP,               /*!< ESP32 station got IP from connected AP */
+    SYSTEM_EVENT_STA_LOST_IP,              /*!< ESP32 station lost IP and the IP is reset to 0 */
+    SYSTEM_EVENT_STA_BSS_RSSI_LOW,         /*!< ESP32 station connected BSS rssi goes below threshold */
+    SYSTEM_EVENT_STA_WPS_ER_SUCCESS,       /*!< ESP32 station wps succeeds in enrollee mode */
+    SYSTEM_EVENT_STA_WPS_ER_FAILED,        /*!< ESP32 station wps fails in enrollee mode */
+    SYSTEM_EVENT_STA_WPS_ER_TIMEOUT,       /*!< ESP32 station wps timeout in enrollee mode */
+    SYSTEM_EVENT_STA_WPS_ER_PIN,           /*!< ESP32 station wps pin code in enrollee mode */
+    SYSTEM_EVENT_STA_WPS_ER_PBC_OVERLAP,   /*!< ESP32 station wps overlap in enrollee mode */
+    SYSTEM_EVENT_AP_START,                 /*!< ESP32 soft-AP start */
+    SYSTEM_EVENT_AP_STOP,                  /*!< ESP32 soft-AP stop */
+    SYSTEM_EVENT_AP_STACONNECTED,          /*!< a station connected to ESP32 soft-AP */
+    SYSTEM_EVENT_AP_STADISCONNECTED,       /*!< a station disconnected from ESP32 soft-AP */
+    SYSTEM_EVENT_AP_STAIPASSIGNED,         /*!< ESP32 soft-AP assign an IP to a connected station */
+    SYSTEM_EVENT_AP_PROBEREQRECVED,        /*!< Receive probe request packet in soft-AP interface */
+    SYSTEM_EVENT_ACTION_TX_STATUS,         /*!< Receive status of Action frame transmitted */
+    SYSTEM_EVENT_ROC_DONE,                 /*!< Indicates the completion of Remain-on-Channel operation status */
+    SYSTEM_EVENT_STA_BEACON_TIMEOUT,       /*!< ESP32 station beacon timeout */
+    SYSTEM_EVENT_FTM_REPORT,               /*!< Receive report of FTM procedure */
+    SYSTEM_EVENT_GOT_IP6,                  /*!< ESP32 station or ap or ethernet interface v6IP addr is preferred */
+    SYSTEM_EVENT_ETH_START,                /*!< ESP32 ethernet start */
+    SYSTEM_EVENT_ETH_STOP,                 /*!< ESP32 ethernet stop */
+    SYSTEM_EVENT_ETH_CONNECTED,            /*!< ESP32 ethernet phy link up */
+    SYSTEM_EVENT_ETH_DISCONNECTED,         /*!< ESP32 ethernet phy link down */
+    SYSTEM_EVENT_ETH_GOT_IP,               /*!< ESP32 ethernet got IP from connected AP */
+    SYSTEM_EVENT_ETH_LOST_IP,              /*!< ESP32 ethernet lost IP and the IP is reset to 0 */
+    SYSTEM_EVENT_MAX                       /*!< Number of members in this enum */
+} system_event_id_t;
+
+/* add this macro define for compatible with old IDF version */
+#ifndef SYSTEM_EVENT_AP_STA_GOT_IP6
+#define SYSTEM_EVENT_AP_STA_GOT_IP6 SYSTEM_EVENT_GOT_IP6
+#endif
+
+
+/** Argument structure of SYSTEM_EVENT_STA_WPS_ER_FAILED event */
+typedef wifi_event_sta_wps_fail_reason_t system_event_sta_wps_fail_reason_t;
+
+/** Argument structure of SYSTEM_EVENT_SCAN_DONE event */
+typedef wifi_event_sta_scan_done_t system_event_sta_scan_done_t;
+
+/** Argument structure of SYSTEM_EVENT_STA_CONNECTED event */
+typedef wifi_event_sta_connected_t system_event_sta_connected_t;
+
+/** Argument structure of SYSTEM_EVENT_STA_DISCONNECTED event */
+typedef wifi_event_sta_disconnected_t system_event_sta_disconnected_t;
+
+/** Argument structure of SYSTEM_EVENT_STA_AUTHMODE_CHANGE event */
+typedef wifi_event_sta_authmode_change_t system_event_sta_authmode_change_t;
+
+/** Argument structure of SYSTEM_EVENT_STA_WPS_ER_PIN event */
+typedef wifi_event_sta_wps_er_pin_t system_event_sta_wps_er_pin_t;
+
+/** Argument structure of SYSTEM_EVENT_STA_WPS_ER_PIN event */
+typedef wifi_event_sta_wps_er_success_t system_event_sta_wps_er_success_t;
+
+/** Argument structure of  event */
+typedef wifi_event_ap_staconnected_t system_event_ap_staconnected_t;
+
+/** Argument structure of  event */
+typedef wifi_event_ap_stadisconnected_t system_event_ap_stadisconnected_t;
+
+/** Argument structure of  event */
+typedef wifi_event_ap_probe_req_rx_t system_event_ap_probe_req_rx_t;
+
+/** Argument structure of SYSTEM_EVENT_FTM_REPORT event */
+typedef wifi_event_ftm_report_t system_event_ftm_report_t;
+
+/** Argument structure of  event */
+typedef ip_event_ap_staipassigned_t system_event_ap_staipassigned_t;
+
+/** Argument structure of  event */
+typedef ip_event_got_ip_t system_event_sta_got_ip_t;
+
+/** Argument structure of  event */
+typedef ip_event_got_ip6_t system_event_got_ip6_t;
+
+/** Union of all possible system_event argument structures */
+typedef union {
+    system_event_sta_connected_t               connected;          /*!< ESP32 station connected to AP */
+    system_event_sta_disconnected_t            disconnected;       /*!< ESP32 station disconnected to AP */
+    system_event_sta_scan_done_t               scan_done;          /*!< ESP32 station scan (APs) done */
+    system_event_sta_authmode_change_t         auth_change;        /*!< the auth mode of AP ESP32 station connected to changed */
+    system_event_sta_got_ip_t                  got_ip;             /*!< ESP32 station got IP, first time got IP or when IP is changed */
+    system_event_sta_wps_er_pin_t              sta_er_pin;         /*!< ESP32 station WPS enrollee mode PIN code received */
+    system_event_sta_wps_fail_reason_t         sta_er_fail_reason; /*!< ESP32 station WPS enrollee mode failed reason code received */
+    system_event_sta_wps_er_success_t          sta_er_success;     /*!< ESP32 station WPS enrollee success */
+    system_event_ap_staconnected_t             sta_connected;      /*!< a station connected to ESP32 soft-AP */
+    system_event_ap_stadisconnected_t          sta_disconnected;   /*!< a station disconnected to ESP32 soft-AP */
+    system_event_ap_probe_req_rx_t             ap_probereqrecved;  /*!< ESP32 soft-AP receive probe request packet */
+    system_event_ftm_report_t                  ftm_report;         /*!< Report of FTM procedure */
+    system_event_ap_staipassigned_t            ap_staipassigned;   /**< ESP32 soft-AP assign an IP to the station*/
+    system_event_got_ip6_t                     got_ip6;            /*!< ESP32 station　or ap or ethernet ipv6 addr state change to preferred */
+} system_event_info_t;
+
+/** Event, as a tagged enum */
+typedef struct {
+    system_event_id_t     event_id;      /*!< event ID */
+    system_event_info_t   event_info;    /*!< event information */
+} system_event_t;
+
+/** Event handler function type */
+typedef esp_err_t (*system_event_handler_t)(esp_event_base_t event_base,
+                                            int32_t event_id,
+                                            void* event_data,
+                                            size_t event_data_size,
+                                            TickType_t ticks_to_wait);
+
+/**
+  * @brief  Send a event to event task
+  *
+  * @note This API is part of the legacy event system. New code should use event library API in esp_event.h
+  *
+  * Other task/modules, such as the tcpip_adapter, can call this API to send an event to event task
+  *
+  * @param event Event to send
+  *
+  * @return ESP_OK : succeed
+  * @return others : fail
+  */
+esp_err_t esp_event_send(system_event_t *event) __attribute__ ((deprecated));
+
+/**
+  * @brief  Send a event to event task
+  *
+  * @note This API is used by WiFi Driver only.
+  *
+  * Other task/modules, such as the tcpip_adapter, can call this API to send an event to event task
+  *
+  * @param[in] event_base the event base that identifies the event
+  * @param[in] event_id the event id that identifies the event
+  * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
+  * @param[in] event_data_size the size of the event data
+  * @param[in] ticks_to_wait number of ticks to block on a full event queue
+  *
+  * @return ESP_OK : succeed
+  * @return others : fail
+  */
+esp_err_t esp_event_send_internal(esp_event_base_t event_base,
+                            int32_t event_id,
+                            void* event_data,
+                            size_t event_data_size,
+                            TickType_t ticks_to_wait);
+
+/**
+ * @brief  Default event handler for system events
+ *
+ * @note This API is part of the legacy event system. New code should use event library API in esp_event.h
+ *
+ * This function performs default handling of system events.
+ * When using esp_event_loop APIs, it is called automatically before invoking the user-provided
+ * callback function.
+ *
+ * Applications which implement a custom event loop must call this function
+ * as part of event processing.
+ *
+ * @param  event   pointer to event to be handled
+ * @return ESP_OK if an event was handled successfully
+ */
+esp_err_t esp_event_process_default(system_event_t *event) __attribute__ ((deprecated));
+
+/**
+  * @brief  Install default event handlers for Ethernet interface
+  *
+  * @note This API is part of the legacy event system. New code should use event library API in esp_event.h
+  *
+  */
+void esp_event_set_default_eth_handlers(void);
+
+/**
+  * @brief  Install default event handlers for Wi-Fi interfaces (station and AP)
+  *
+  * @note This API is part of the legacy event system. New code should use event library API in esp_event.h
+  */
+void esp_event_set_default_wifi_handlers(void) __attribute__ ((deprecated));
+
+/**
+ * @brief  Application specified event callback function
+ *
+ * @note This API is part of the legacy event system. New code should use event library API in esp_event.h
+ *
+ *
+ * @param  ctx    reserved for user
+ * @param  event  event type defined in this file
+ *
+ * @return
+ *    - ESP_OK: succeed
+ *    - others: fail
+ */
+typedef esp_err_t (*system_event_cb_t)(void *ctx, system_event_t *event);
+
+/**
+ * @brief  Initialize event loop
+ *
+ * @note This API is part of the legacy event system. New code should use event library API in esp_event.h
+ *
+ * Create the event handler and task
+ *
+ * @param  cb   application specified event callback, it can be modified by call esp_event_set_cb
+ * @param  ctx  reserved for user
+ *
+ * @return
+ *    - ESP_OK: succeed
+ *    - others: fail
+ */
+esp_err_t esp_event_loop_init(system_event_cb_t cb, void *ctx) __attribute__ ((deprecated));
+
+/**
+ * @brief  Set application specified event callback function
+ *
+ * @note This API is part of the legacy event system. New code should use event library API in esp_event.h
+ *
+ * @attention 1. If cb is NULL, means application don't need to handle
+ *               If cb is not NULL, it will be call when an event is received, after the default event callback is completed
+ *
+ * @param  cb   application callback function
+ * @param  ctx  argument to be passed to callback
+ *
+ *
+ * @return old callback
+ */
+system_event_cb_t esp_event_loop_set_cb(system_event_cb_t cb, void *ctx) __attribute__ ((deprecated));
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_event/include/esp_event_loop.h b/tools/sdk/esp32s3/include/esp_event/include/esp_event_loop.h
new file mode 100644
index 00000000000..14ab627e511
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_event/include/esp_event_loop.h
@@ -0,0 +1,3 @@
+#pragma once
+#warning "esp_event_loop.h is deprecated, please include esp_event.h instead"
+#include "esp_event.h"
diff --git a/tools/sdk/esp32s3/include/esp_gdbstub/esp32s3/gdbstub_target_config.h b/tools/sdk/esp32s3/include/esp_gdbstub/esp32s3/gdbstub_target_config.h
new file mode 100644
index 00000000000..c4adad70693
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_gdbstub/esp32s3/gdbstub_target_config.h
@@ -0,0 +1,18 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/* Number of extra TIE defined registers, not listed in the XCHAL */
+#define GDBSTUB_EXTRA_TIE_SIZE    1
diff --git a/tools/sdk/esp32s3/include/esp_gdbstub/include/esp_gdbstub.h b/tools/sdk/esp32s3/include/esp_gdbstub/include/esp_gdbstub.h
new file mode 100644
index 00000000000..f1e7921de6b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_gdbstub/include/esp_gdbstub.h
@@ -0,0 +1,26 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void esp_gdbstub_init(void);
+void esp_gdbstub_panic_handler(void *frame);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_gdbstub/xtensa/esp_gdbstub_arch.h b/tools/sdk/esp32s3/include/esp_gdbstub/xtensa/esp_gdbstub_arch.h
new file mode 100644
index 00000000000..18b119cb3fd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_gdbstub/xtensa/esp_gdbstub_arch.h
@@ -0,0 +1,91 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include "freertos/xtensa_context.h"
+#include "gdbstub_target_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef XtExcFrame esp_gdbstub_frame_t;
+
+/* GDB regfile structure, configuration dependent */
+typedef struct {
+    uint32_t pc;
+    uint32_t a[XCHAL_NUM_AREGS];
+
+#if XCHAL_HAVE_LOOPS
+    uint32_t lbeg;
+    uint32_t lend;
+    uint32_t lcount;
+#endif
+
+    uint32_t sar;
+
+#if XCHAL_HAVE_WINDOWED
+    uint32_t windowbase;
+    uint32_t windowstart;
+#endif
+
+    uint32_t configid0;
+    uint32_t configid1;
+    uint32_t ps;
+
+#if XCHAL_HAVE_THREADPTR
+    uint32_t threadptr;
+#endif
+
+#if XCHAL_HAVE_BOOLEANS
+    uint32_t br;
+#endif
+
+#if XCHAL_HAVE_S32C1I
+    uint32_t scompare1;
+#endif
+
+#if XCHAL_HAVE_MAC16
+    uint32_t acclo;
+    uint32_t acchi;
+    uint32_t m0;
+    uint32_t m1;
+    uint32_t m2;
+    uint32_t m3;
+#endif
+
+#if XCHAL_HAVE_DFP_ACCEL
+    uint32_t expstate;
+    uint32_t f64r_lo;
+    uint32_t f64r_hi;
+    uint32_t f64s;
+#endif
+
+#if XCHAL_HAVE_FP
+    uint32_t f[16];
+    uint32_t fcr;
+    uint32_t fsr;
+#endif
+
+#if GDBSTUB_EXTRA_TIE_SIZE > 0
+    uint32_t tie[GDBSTUB_EXTRA_TIE_SIZE];
+#endif
+
+} esp_gdbstub_gdb_regfile_t;
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hid/include/esp_hid_common.h b/tools/sdk/esp32s3/include/esp_hid/include/esp_hid_common.h
new file mode 100644
index 00000000000..d7582cbc841
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hid/include/esp_hid_common.h
@@ -0,0 +1,272 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+#include <stdio.h>
+
+/* HID Report Map Values */
+#define HID_RM_INPUT                        0x80
+#define HID_RM_OUTPUT                       0x90
+#define HID_RM_FEATURE                      0xb0
+#define HID_RM_COLLECTION                   0xa0
+#define HID_RM_END_COLLECTION               0xc0
+#define HID_RM_USAGE_PAGE                   0x04
+#define HID_RM_LOGICAL_MINIMUM              0x14
+#define HID_RM_LOGICAL_MAXIMUM              0x24
+#define HID_RM_PHYSICAL_MINIMUM             0x34
+#define HID_RM_PHYSICAL_MAXIMUM             0x44
+#define HID_RM_UNIT_EXPONENT                0x54
+#define HID_RM_UNIT                         0x64
+#define HID_RM_REPORT_SIZE                  0x74
+#define HID_RM_REPORT_ID                    0x84
+#define HID_RM_REPORT_COUNT                 0x94
+#define HID_RM_PUSH                         0xa4
+#define HID_RM_POP                          0xb4
+#define HID_RM_USAGE                        0x08
+#define HID_RM_USAGE_MINIMUM                0x18
+#define HID_RM_USAGE_MAXIMUM                0x28
+#define HID_RM_DESIGNATOR_INDEX             0x38
+#define HID_RM_DESIGNATOR_MINIMUM           0x48
+#define HID_RM_DESIGNATOR_MAXIMUM           0x58
+#define HID_RM_STRING_INDEX                 0x78
+#define HID_RM_STRING_MINIMUM               0x88
+#define HID_RM_STRING_MAXIMUM               0x98
+#define HID_RM_DELIMITER                    0xa8
+
+/* HID Usage Pages and Usages */
+#define HID_USAGE_PAGE_GENERIC_DESKTOP      0x01
+#define HID_USAGE_KEYBOARD                  0x06
+#define HID_USAGE_MOUSE                     0x02
+#define HID_USAGE_JOYSTICK                  0x04
+#define HID_USAGE_GAMEPAD                   0x05
+
+#define HID_USAGE_PAGE_CONSUMER_DEVICE      0x0C
+#define HID_USAGE_CONSUMER_CONTROL          0x01
+
+/* HID BT COD Peripheral Min Values Main Role */
+#define ESP_HID_COD_MIN_KEYBOARD            0x10
+#define ESP_HID_COD_MIN_MOUSE               0x20
+
+/* HID BLE Appearances */
+#define ESP_HID_APPEARANCE_GENERIC          0x03C0
+#define ESP_HID_APPEARANCE_KEYBOARD         0x03C1
+#define ESP_HID_APPEARANCE_MOUSE            0x03C2
+#define ESP_HID_APPEARANCE_JOYSTICK         0x03C3
+#define ESP_HID_APPEARANCE_GAMEPAD          0x03C4
+
+/* HID Report Types */
+#define ESP_HID_REPORT_TYPE_INPUT           1
+#define ESP_HID_REPORT_TYPE_OUTPUT          2
+#define ESP_HID_REPORT_TYPE_FEATURE         3
+
+/* HID Protocol Modes */
+#define ESP_HID_PROTOCOL_MODE_BOOT          0x00      // Boot Protocol Mode
+#define ESP_HID_PROTOCOL_MODE_REPORT        0x01      // Report Protocol Mode
+
+/* HID information flags */
+#define ESP_HID_FLAGS_REMOTE_WAKE           0x01      // RemoteWake
+#define ESP_HID_FLAGS_NORMALLY_CONNECTABLE  0x02      // NormallyConnectable
+
+/* Control point commands */
+#define ESP_HID_CONTROL_SUSPEND             0x00      // Suspend
+#define ESP_HID_CONTROL_EXIT_SUSPEND        0x01      // Exit Suspend
+
+/* Client Characteristic Configuration values */
+#define ESP_HID_CCC_NOTIFICATIONS_ENABLED   0x01      // Notifications enabled
+#define ESP_HID_CCC_INDICATIONS_ENABLED     0x02      // Indications enabled
+
+/* HID Transports */
+typedef enum {
+    ESP_HID_TRANSPORT_BT,
+    ESP_HID_TRANSPORT_BLE,
+    ESP_HID_TRANSPORT_USB,
+    ESP_HID_TRANSPORT_MAX
+} esp_hid_transport_t;
+
+/* HID Usage Types */
+typedef enum {
+    ESP_HID_USAGE_GENERIC  = 0,
+    ESP_HID_USAGE_KEYBOARD = 1,
+    ESP_HID_USAGE_MOUSE    = 2,
+    ESP_HID_USAGE_JOYSTICK = 4,
+    ESP_HID_USAGE_GAMEPAD  = 8,
+    ESP_HID_USAGE_TABLET   = 16,
+    ESP_HID_USAGE_CCONTROL = 32,
+    ESP_HID_USAGE_VENDOR   = 64
+} esp_hid_usage_t;
+
+/* HID BT COD Peripheral Min Values. Mask of (keyboard|mouse|ESP_HIDH_COD_*) */
+typedef enum {
+    ESP_HID_COD_MIN_GENERIC,
+    ESP_HID_COD_MIN_JOYSTICK,
+    ESP_HID_COD_MIN_GAMEPAD,
+    ESP_HID_COD_MIN_REMOTE,
+    ESP_HID_COD_MIN_SENSOR,
+    ESP_HID_COD_MIN_TABLET,
+    ESP_HID_COD_MIN_CARD_READER,
+    ESP_HID_COD_MIN_MAX
+} esp_hid_cod_min_t;
+
+/* HID transaction Types */
+typedef enum {
+    ESP_HID_TRANS_HANDSHAKE = 0,
+    ESP_HID_TRANS_CONTROL = 1,
+    ESP_HID_TRANS_GET_REPORT = 4,
+    ESP_HID_TRANS_SET_REPORT = 5,
+    ESP_HID_TRANS_GET_PROTOCOL = 6,
+    ESP_HID_TRANS_SET_PROTOCOL = 7,
+    ESP_HID_TRANS_GET_IDLE = 8,
+    ESP_HID_TRANS_SET_IDLE = 9,
+    ESP_HID_TRANS_DATA = 10,
+    ESP_HID_TRANS_DATAC = 11,
+    ESP_HID_TRANS_MAX
+} esp_hid_trans_type_t;
+
+/**
+ * @brief HID report item structure
+ */
+typedef struct {
+    uint8_t map_index;              /*!< HID report map index */
+    uint8_t report_id;              /*!< HID report id */
+    uint8_t report_type;            /*!< HID report type */
+    uint8_t protocol_mode;          /*!< HID protocol mode */
+    esp_hid_usage_t usage;          /*!< HID usage type */
+    uint16_t value_len;             /*!< HID report length in bytes */
+} esp_hid_report_item_t;
+
+/**
+ * @brief HID parsed report map structure
+ */
+typedef struct {
+    esp_hid_usage_t usage;              /*!< Dominant HID usage. (keyboard > mouse > joystick > gamepad > generic) */
+    uint16_t appearance;                /*!< Calculated HID Appearance based on the dominant usage */
+    uint8_t reports_len;                /*!< Number of reports discovered in the report map */
+    esp_hid_report_item_t *reports;     /*!< Reports discovered in the report map */
+} esp_hid_report_map_t;
+
+/**
+ * @brief HID raw report map structure
+ */
+typedef struct {
+    const uint8_t *data;                /*!< Pointer to the HID report map data */
+    uint16_t len;                       /*!< HID report map data length */
+} esp_hid_raw_report_map_t;
+
+/**
+ * @brief HID device config structure
+ */
+typedef struct {
+    uint16_t vendor_id;                     /*!< HID Vendor ID */
+    uint16_t product_id;                    /*!< HID Product ID */
+    uint16_t version;                       /*!< HID Product Version */
+    const char *device_name;                /*!< HID Device Name */
+    const char *manufacturer_name;          /*!< HID Manufacturer */
+    const char *serial_number;              /*!< HID Serial Number */
+    esp_hid_raw_report_map_t *report_maps;  /*!< Array of the raw HID report maps */
+    uint8_t report_maps_len;                /*!< number of raw report maps in the array */
+} esp_hid_device_config_t;
+
+/*
+ * @brief Parse RAW HID report map
+ *        It is a responsibility of the user to free the parsed report map,
+ *        when it's no longer needed. Use esp_hid_free_report_map
+ * @param hid_rm      : pointer to the hid report map data
+ * @param hid_rm_len  : length to the hid report map data
+ *
+ * @return: pointer to the parsed report map
+ */
+esp_hid_report_map_t *esp_hid_parse_report_map(const uint8_t *hid_rm, size_t hid_rm_len);
+
+/*
+ * @brief Free parsed HID report map
+ * @param map      : pointer to the parsed hid report map
+ */
+void esp_hid_free_report_map(esp_hid_report_map_t *map);
+
+/**
+ * @brief Calculate the HID Device usage type from the BLE Apperance
+ * @param appearance : BLE Apperance value
+ *
+ * @return: the hid usage type
+ */
+esp_hid_usage_t esp_hid_usage_from_appearance(uint16_t appearance);
+
+/**
+ * @brief Calculate the HID Device usage type from the BT CoD
+ * @param cod : BT CoD value
+ *
+ * @return: the hid usage type
+ */
+esp_hid_usage_t esp_hid_usage_from_cod(uint32_t cod);
+
+/**
+ * @brief Convert device usage type to string
+ * @param usage : The HID usage type to convert
+ *
+ * @return: a pointer to the string or NULL
+ */
+const char *esp_hid_usage_str(esp_hid_usage_t usage);
+
+/**
+ * @brief Convert HID protocol mode to string
+ * @param protocol_mode : The HID protocol mode to convert
+ *                        BOOT/REPORT
+ *
+ * @return: a pointer to the string or NULL
+ */
+const char *esp_hid_protocol_mode_str(uint8_t protocol_mode);
+
+/**
+ * @brief Convert HID report type to string
+ * @param report_type : The HID report type to convert
+ *                      INPUT/OUTPUT/FEATURE
+ *
+ * @return: a pointer to the string or NULL
+ */
+const char *esp_hid_report_type_str(uint8_t report_type);
+
+/**
+ * @brief Convert BT CoD major to string
+ * @param cod_major : The CoD major value to convert
+ *
+ * @return: a pointer to the string or NULL
+ */
+const char *esp_hid_cod_major_str(uint8_t cod_major);
+
+/**
+ * @brief Print BT CoD minor value
+ * @param cod_min : The CoD minor value to print
+ * @param fp      : pointer to the output file
+ */
+void esp_hid_cod_minor_print(uint8_t cod_min, FILE *fp);
+
+/**
+ * @brief Convert BLE disconnect reason to string
+ * @param reason : The value of the reason
+ *
+ * @return: a pointer to the string or NULL
+ */
+const char *esp_hid_disconnect_reason_str(esp_hid_transport_t transport, int reason);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hid/include/esp_hidd.h b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidd.h
new file mode 100644
index 00000000000..3e1bfc2c06f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidd.h
@@ -0,0 +1,226 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "sdkconfig.h"
+#include "esp_err.h"
+#include "esp_event.h"
+#include "esp_hid_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "esp_hidd_transport.h"
+
+ESP_EVENT_DECLARE_BASE(ESP_HIDD_EVENTS);        // Declare the event base for HID device
+
+/**
+ * @brief HIDD callback events enum
+ */
+typedef enum {
+    ESP_HIDD_ANY_EVENT = ESP_EVENT_ANY_ID,      /*!< HID device any event */
+    ESP_HIDD_START_EVENT = 0,                   /*!< HID device stack started */
+    ESP_HIDD_CONNECT_EVENT,                     /*!< HID device connected */
+    ESP_HIDD_PROTOCOL_MODE_EVENT,               /*!< HID device protocol mode change */
+    ESP_HIDD_CONTROL_EVENT,                     /*!< HID device control request */
+    ESP_HIDD_OUTPUT_EVENT,                      /*!< HID device output report event */
+    ESP_HIDD_FEATURE_EVENT,                     /*!< HID device feature report event */
+    ESP_HIDD_DISCONNECT_EVENT,                  /*!< HID device disconnected */
+    ESP_HIDD_STOP_EVENT,                        /*!< HID device stack stopped */
+    ESP_HIDD_MAX_EVENT,                         /*!< HID events end marker */
+} esp_hidd_event_t;
+
+/**
+ * @brief HIDD structure forward declaration
+ */
+struct esp_hidd_dev_s;
+typedef struct esp_hidd_dev_s esp_hidd_dev_t;
+
+/**
+ * @brief HIDD callback parameters union
+ */
+typedef union {
+    /**
+     * @brief ESP_HIDD_START_EVENT
+     * @note Used only for Classic Bluetooth.
+     */
+    struct {
+        esp_err_t status;                       /*!< HID device operation status */
+    } start;                                    /*!< HID callback param of ESP_HIDD_START_EVENT */
+
+    /**
+     * @brief ESP_HIDD_STOP_EVENT
+     * @note Used only for Classic Bluetooth.
+     */
+    struct {
+        esp_err_t status;                       /*!< HID device operation status */
+    } stop;                                     /*!< HID callback param of ESP_HIDD_STOP_EVENT */
+
+    /**
+     * @brief ESP_HIDD_CONNECT_EVENT
+     */
+    struct {
+        esp_hidd_dev_t *dev;                    /*!< HID device structure */
+        esp_err_t status;                       /*!< HID device operation status, used only for Classic Bluetooth */
+    } connect;                                  /*!< HID callback param of ESP_HIDD_CONNECT_EVENT */
+
+    /**
+     * @brief ESP_HIDD_DISCONNECT_EVENT
+     */
+    struct {
+        esp_hidd_dev_t *dev;                    /*!< HID device structure */
+        int reason;                             /*!< Indicate the reason of disconnection */
+        esp_err_t status;                       /*!< HID device operation status, used only for Classic Bluetooth */
+    } disconnect;                               /*!< HID callback param of ESP_HIDD_DISCONNECT_EVENT */
+
+    /**
+     * @brief ESP_HIDD_OUTPUT_EVENT
+     */
+    struct {
+        esp_hidd_dev_t *dev;                    /*!< HID device structure */
+        esp_hid_usage_t usage;                  /*!< HID report usage */
+        uint16_t report_id;                     /*!< HID report index */
+        uint16_t length;                        /*!< data length */
+        uint8_t  *data;                         /*!< The pointer to the data */
+        uint8_t map_index;                      /*!< HID config report map index */
+    } output;                                   /*!< HID callback param of ESP_HIDD_OUTPUT_EVENT */
+
+    /**
+     * @brief ESP_HIDD_FEATURE_EVENT
+     */
+    struct {
+        esp_hidd_dev_t *dev;                    /*!< HID device structure */
+        esp_hid_usage_t usage;                  /*!< HID report usage */
+        uint16_t report_id;                     /*!< HID report index */
+        uint16_t length;                        /*!< data length */
+        uint8_t  *data;                         /*!< The pointer to the data */
+        uint8_t map_index;                      /*!< HID config report map index */
+        uint8_t trans_type;                     /*!< HID device feature transaction type, used only for Classic Bluetooth */
+        uint8_t report_type;                    /*!< HID device feature report type, used only for Classic Bluetooth */
+    } feature;                                  /*!< HID callback param of ESP_HIDD_FEATURE_EVENT */
+
+    /**
+     * @brief ESP_HIDD_PROTOCOL_MODE_EVENT
+     */
+    struct {
+        esp_hidd_dev_t *dev;                    /*!< HID device structure */
+        uint8_t protocol_mode;                  /*!< HID Protocol Mode */
+        uint8_t map_index;                      /*!< HID config report map index */
+    } protocol_mode;                            /*!< HID callback param of ESP_HIDD_PROTOCOL_MODE_EVENT */
+
+    /**
+     * @brief ESP_HIDD_CONTROL_EVENT
+     */
+    struct {
+        esp_hidd_dev_t *dev;                    /*!< HID device structure */
+        uint8_t control;                        /*!< HID Control Point */
+        uint8_t map_index;                      /*!< HID config report map index */
+    } control;                                  /*!< HID callback param of ESP_HIDD_CONTROL_EVENT */
+
+} esp_hidd_event_data_t;
+
+/**
+ * @brief Init HID Device
+ * @param       config   : configuration for the device
+ * @param       transport: protocol that the device will use (ESP_HID_TRANSPORT_BLE/BT/USB)
+ * @param       callback : function to call when events for this device are generated.
+ *                         Can be NULL, but will miss the START event.
+ * @param[out]  dev      : location to return the pointer to the device structure
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidd_dev_init(const esp_hid_device_config_t *config, esp_hid_transport_t transport, esp_event_handler_t callback, esp_hidd_dev_t **dev);
+
+/**
+ * @brief Deinit HID Device
+ * @param dev : pointer to the device to deinit
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidd_dev_deinit(esp_hidd_dev_t *dev);
+
+/**
+ * @brief Get the HID Device Transport
+ * @param dev : pointer to the HID Device
+ *
+ * @return: the transport of the connected device or ESP_HID_TRANSPORT_MAX
+ */
+esp_hid_transport_t esp_hidd_dev_transport_get(esp_hidd_dev_t *dev);
+
+/**
+ * @brief Check if HID Device is connected
+ * @param dev : pointer to the device
+ *
+ * @return: true if the device is connected
+ */
+bool esp_hidd_dev_connected(esp_hidd_dev_t *dev);
+
+/**
+ * @brief Set the battery level reported by the HID Device
+ * @param dev   : pointer to the device
+ * @param level : battery level (0-100)
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidd_dev_battery_set(esp_hidd_dev_t *dev, uint8_t level);
+
+/**
+ * @brief Send an INPUT report to the host
+ * @param dev       : pointer to the device
+ * @param map_index : index of the device report map in the init config
+ * @param report_id : id of the HID INPUT report
+ * @param data      : pointer to the data to send
+ * @param length    : length of the data to send
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidd_dev_input_set(esp_hidd_dev_t *dev, size_t map_index, size_t report_id, uint8_t *data, size_t length);
+
+/**
+ * @brief Send a FEATURE report to the host
+ * @param dev       : pointer to the device
+ * @param map_index : index of the device report map in the init config
+ * @param report_id : id of the HID FEATURE report
+ * @param data      : pointer to the data to send
+ * @param length    : length of the data to send
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidd_dev_feature_set(esp_hidd_dev_t *dev, size_t map_index, size_t report_id, uint8_t *data, size_t length);
+
+/**
+ * @brief Register function to listen for device events
+ * @param dev       : pointer to the device
+ * @param callback  : event handler function
+ * @param event     : event to listen for (ESP_HIDD_ANY_EVENT for all)
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidd_dev_event_handler_register(esp_hidd_dev_t *dev, esp_event_handler_t callback, esp_hidd_event_t event);
+
+/**
+ * @brief Unregister function that is listening for device events
+ * @param dev       : pointer to the device
+ * @param callback  : event handler function
+ * @param event     : event that is listening for (ESP_HIDD_ANY_EVENT for all)
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidd_dev_event_handler_unregister(esp_hidd_dev_t *dev, esp_event_handler_t callback, esp_hidd_event_t event);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hid/include/esp_hidd_gatts.h b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidd_gatts.h
new file mode 100644
index 00000000000..732ab1a96a1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidd_gatts.h
@@ -0,0 +1,40 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "sdkconfig.h"
+
+#if CONFIG_GATTS_ENABLE
+
+#include "esp_gatts_api.h" //for the callback
+
+/**
+ * @brief HID BLE GATTS System Callback. Attach it in your code
+ *        or call it from your gatts event handler to allow the HID stack to function
+ * @param event     : Event type
+ * @param gatts_if  : GATTS Interface ID
+ * @param param     : Point to callback parameter, currently is union type
+ */
+void esp_hidd_gatts_event_handler(esp_gatts_cb_event_t event, esp_gatt_if_t gatts_if, esp_ble_gatts_cb_param_t *param);
+
+#endif /* CONFIG_GATTS_ENABLE */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hid/include/esp_hidd_transport.h b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidd_transport.h
new file mode 100644
index 00000000000..ee8d681be4a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidd_transport.h
@@ -0,0 +1,31 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "sdkconfig.h"
+
+#if CONFIG_GATTS_ENABLE
+#include "esp_hidd_gatts.h"
+#else
+typedef int esp_gatt_conn_reason_t;
+#endif /* CONFIG_GATTS_ENABLE */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh.h b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh.h
new file mode 100644
index 00000000000..d49f76e6807
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh.h
@@ -0,0 +1,400 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "sdkconfig.h"
+#include "esp_err.h"
+#include "esp_log.h"
+#include "esp_event.h"
+#include "esp_hid_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief HIDH structure forward declaration
+ */
+struct esp_hidh_dev_s;
+typedef struct esp_hidh_dev_s esp_hidh_dev_t;
+
+ESP_EVENT_DECLARE_BASE(ESP_HIDH_EVENTS);
+
+/**
+ * @brief HIDH callback events enum
+ */
+typedef enum {
+    ESP_HIDH_ANY_EVENT = ESP_EVENT_ANY_ID,          /*!< HID device any event */
+    ESP_HIDH_OPEN_EVENT = 0,                        /*!< HID device opened */
+    ESP_HIDH_BATTERY_EVENT,                         /*!< HID device battery level changed */
+    ESP_HIDH_INPUT_EVENT,                           /*!< Received HID device INPUT report */
+    ESP_HIDH_FEATURE_EVENT,                         /*!< Received HID device FEATURE report */
+    ESP_HIDH_CLOSE_EVENT,                           /*!< HID device closed */
+    ESP_HIDH_START_EVENT,                           /*!< HID host stack started, used only for Classic Bluetooth */
+    ESP_HIDH_STOP_EVENT,                            /*!< HID host stack stopped, used only for Classic Bluetooth */
+    ESP_HIDH_MAX_EVENT,                             /*!< HID events end marker */
+} esp_hidh_event_t;
+
+/**
+ * @brief HIDH callback parameters union
+ */
+typedef union {
+    /**
+     * @brief ESP_HIDH_START_EVENT
+     * @note Used only for Classic Bluetooth.
+     */
+    struct {
+        esp_err_t status;                           /*!< HID host operation status */
+    } start;                                         /*!< HID callback param of ESP_HIDH_START_EVENT */
+
+    /**
+     * @brief ESP_HIDH_STOP_EVENT
+     * @note Used only for Classic Bluetooth.
+     */
+    struct {
+        esp_err_t status;                           /*!< HID host operation status */
+    } stop;                                        /*!< HID callback param of ESP_HIDH_STOP_EVENT */
+
+    /**
+     * @brief ESP_HIDH_OPEN_EVENT
+     */
+    struct {
+        esp_hidh_dev_t *dev;                        /*!< HID Remote bluetooth device */
+        esp_err_t status;                           /*!< HID host operation status, used only for Classic Bluetooth */
+    } open;                                         /*!< HID callback param of ESP_HIDH_OPEN_EVENT */
+
+    /**
+     * @brief ESP_HIDH_CLOSE_EVENT
+     */
+    struct {
+        esp_hidh_dev_t *dev;                        /*!< HID Remote bluetooth device. */
+        int reason;                                 /*!< Reason why the connection was closed. BLE Only */
+        esp_err_t status;                           /*!< HID host operation status, used only for Classic Bluetooth */
+    } close;                                        /*!< HID callback param of ESP_HIDH_CLOSE_EVENT */
+
+    /**
+     * @brief ESP_HIDH_BATTERY_EVENT
+     */
+    struct {
+        esp_hidh_dev_t *dev;                        /*!< HID Remote bluetooth device */
+        uint8_t level;                              /*!< Battery Level (0-100%) */
+        esp_err_t status;                           /*!< HID host operation status */
+    } battery;                                      /*!< HID callback param of ESP_HIDH_BATTERY_EVENT */
+
+    /**
+     * @brief ESP_HIDH_INPUT_EVENT
+     */
+    struct {
+        esp_hidh_dev_t *dev;                        /*!< HID Remote bluetooth device */
+        esp_hid_usage_t usage;                      /*!< HID report usage */
+        uint16_t report_id;                         /*!< HID report index */
+        uint16_t length;                            /*!< HID data length */
+        uint8_t *data;                              /*!< The pointer to the HID data */
+        uint8_t map_index;                          /*!< HID report map index */
+    } input;                                        /*!< HID callback param of ESP_HIDH_INPUT_EVENT */
+
+    /**
+     * @brief ESP_HIDH_FEATURE_EVENT
+     */
+    struct {
+        esp_hidh_dev_t *dev;                        /*!< HID Remote bluetooth device */
+        esp_hid_usage_t usage;                      /*!< HID report usage */
+        uint16_t report_id;                         /*!< HID report index */
+        uint16_t length;                            /*!< HID data length */
+        uint8_t *data;                              /*!< The pointer to the HID data */
+        uint8_t map_index;                          /*!< HID report map index */
+        esp_err_t status;                           /*!< HID host operation status, used only for Classic Bluetooth */
+        esp_hid_trans_type_t trans_type;            /*!< HID host feature transaction type, used only for Classic Bluetooth */
+    } feature;                                      /*!< HID callback param of ESP_HIDH_FEATURE_EVENT */
+
+} esp_hidh_event_data_t;
+
+typedef struct {
+    esp_event_handler_t callback;
+    uint16_t event_stack_size;
+    void *callback_arg;
+} esp_hidh_config_t;
+
+/**
+ * @brief Initialize the HID Host component
+ * @param config           : pointer to esp_hidh_config_t structure
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_init(const esp_hidh_config_t *config);
+
+/**
+ * @brief De-initialize the HID Host component
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_deinit(void);
+
+/**
+ * @brief Close HID Device
+ * @param dev : pointer to the device
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_close(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Free HID Device Memory
+ *        This function MUST be called when handling ESP_HIDH_CLOSE_EVENT
+ *        Only then all memory used for the device will be freed.
+ * @param dev : pointer to the device
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_free(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Check if the device still exists.
+ * @param dev : pointer to the device
+ *
+ * @return: true if exists
+ */
+bool esp_hidh_dev_exists(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Send an OUTPUT report to the device
+ * @param dev       : pointer to the device
+ * @param map_index : index of the device report map
+ * @param report_id : id of the HID OUTPUT report
+ * @param data      : pointer to the data to send
+ * @param length    : length of the data to send
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_output_set(esp_hidh_dev_t *dev, size_t map_index, size_t report_id, uint8_t *data, size_t length);
+
+/**
+ * @brief Send a FEATURE report to the device
+ * @param dev       : pointer to the device
+ * @param map_index : index of the device report map
+ * @param report_id : id of the HID FEATURE report
+ * @param data      : pointer to the data to send
+ * @param length    : length of the data to send
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_feature_set(esp_hidh_dev_t *dev, size_t map_index, size_t report_id, uint8_t *data, size_t length);
+
+/**
+ * @brief Get the value a FEATURE report from the device
+ * @param dev       : pointer to the device
+ * @param map_index : index of the device report map
+ * @param report_id : id of the HID FEATURE report
+ * @param max_len   : size of the buffer that will hold the data
+ * @param data      : pointer to the data buffer
+ * @param length    : pointer to the value that will be set to the number of bytes received
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_feature_get(esp_hidh_dev_t *dev, size_t map_index, size_t report_id, size_t max_len, uint8_t *data, size_t *length);
+
+/**
+ * @brief Set_Report command.
+ * @note For now, this function used only for Classic Bluetooth.
+ *
+ * @param dev           : pointer to the device
+ * @param map_index     : index of the device report map
+ * @param report_id     : id of the HID FEATURE report
+ * @param report_type   : report type, defines in `esp_hid_common.h`
+ * @param data          : pointer to the data to send
+ * @param length        : length of the data to send
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_set_report(esp_hidh_dev_t *dev, size_t map_index, size_t report_id, int report_type,
+                                  uint8_t *data, size_t length);
+
+/**
+ * @brief Get_Report command.
+ * @note For now, this function used only for Classic Bluetooth.
+ *
+ * @param dev           : pointer to the device
+ * @param map_index     : index of the device report map
+ * @param report_id     : id of the HID FEATURE report
+ * @param report_type   : report type, defines in `esp_hid_common.h`
+ * @param max_len       : size of the buffer that will hold the data
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_get_report(esp_hidh_dev_t *dev, size_t map_index, size_t report_id, int report_type,
+                                  size_t max_len);
+
+/**
+ * @brief Get_Idle Command.
+ * @note For now, this function used only for Classic Bluetooth.
+ *
+ * @param dev               : pointer to the device
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_get_idle(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Set_Idle Command.
+ * @note For now, this function used only for Classic Bluetooth.
+ *
+ * @param dev           : pointer to the device
+ * @param idle_time     : idle_time
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_set_idle(esp_hidh_dev_t *dev, uint8_t idle_time);
+
+/**
+ * @brief Get_Protocol Command.
+ * @note For now, this function used only for Classic Bluetooth.
+ *
+ * @param dev               : pointer to the device
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_get_protocol(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Set_Protocol Command.
+ * @note For now, this function used only for Classic Bluetooth.
+ *
+ * @param dev           : pointer to the device
+ * @param protocol_mode : protocol_mode
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_set_protocol(esp_hidh_dev_t *dev, uint8_t protocol_mode);
+
+/**
+ * @brief Dump the properties of HID Device to UART
+ * @param dev : pointer to the HID Device
+ * @param fp  : pointer to the output file
+ */
+void esp_hidh_dev_dump(esp_hidh_dev_t *dev, FILE *fp);
+
+/**
+ * @brief Get the BT Device Address of a HID Device
+ * @param dev : pointer to the HID Device
+ *
+ * @return: pointer to the BDA byte array or NULL
+ */
+const uint8_t *esp_hidh_dev_bda_get(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Get the HID Device Transport
+ * @param dev : pointer to the HID Device
+ *
+ * @return: the transport of the connected device or ESP_HID_TRANSPORT_MAX
+ */
+esp_hid_transport_t esp_hidh_dev_transport_get(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Get the HID Device Cofiguration
+ * @param dev : pointer to the HID Device
+ *
+ * @return: pointer to the config structure or NULL
+ */
+const esp_hid_device_config_t *esp_hidh_dev_config_get(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Get the name of a HID Device
+ * @param dev : pointer to the HID Device
+ *
+ * @return: pointer to the character array or NULL
+ */
+const char *esp_hidh_dev_name_get(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Get the manufacturer of a HID Device
+ * @param dev : pointer to the HID Device
+ *
+ * @return: pointer to the character array
+ */
+const char *esp_hidh_dev_manufacturer_get(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Get the serial number of a HID Device
+ * @param dev : pointer to the HID Device
+ *
+ * @return: pointer to the character array or NULL
+ */
+const char *esp_hidh_dev_serial_get(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Get the VID of a HID Device
+ * @param dev : pointer to the HID Device
+ *
+ * @return: the VID value
+ */
+uint16_t esp_hidh_dev_vendor_id_get(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Get the PID of a HID Device
+ * @param dev : pointer to the HID Device
+ *
+ * @return: the PID value
+ */
+uint16_t esp_hidh_dev_product_id_get(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Get the version HID Device
+ * @param dev : pointer to the HID Device
+ *
+ * @return: the version value
+ */
+uint16_t esp_hidh_dev_version_get(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Get the appearance of BLE HID Device
+ * @param dev : pointer to the BLE HID Device
+ *
+ * @return: the appearance value
+ */
+uint16_t esp_hidh_dev_appearance_get(esp_hidh_dev_t *dev); //BLE Only
+
+/**
+ * @brief Get the calculated HID Device usage type
+ * @param dev : pointer to the HID Device
+ *
+ * @return: the hid usage type
+ */
+esp_hid_usage_t esp_hidh_dev_usage_get(esp_hidh_dev_t *dev);
+
+/**
+ * @brief Get an array of all reports found on a device
+ * @param dev           : pointer to the device
+ * @param num_reports   : pointer to the value that will be set to the number of reports
+ * @param reports       : location to set to the pointer of the reports array
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_reports_get(esp_hidh_dev_t *dev, size_t *num_reports, esp_hid_report_item_t **reports);
+
+/**
+ * @brief Get an array of the report maps found on a device
+ * @param dev        : pointer to the device
+ * @param num_maps   : pointer to the value that will be set to the number of report maps found
+ * @param maps       : location to set to the pointer of the report maps array
+ *
+ * @return: ESP_OK on success
+ */
+esp_err_t esp_hidh_dev_report_maps_get(esp_hidh_dev_t *dev, size_t *num_maps, esp_hid_raw_report_map_t **maps);
+
+#include "esp_hidh_transport.h"
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh_bluedroid.h b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh_bluedroid.h
new file mode 100644
index 00000000000..e89d0b40318
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh_bluedroid.h
@@ -0,0 +1,41 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "sdkconfig.h"
+
+#if CONFIG_BLUEDROID_ENABLED
+
+#include "esp_bt_defs.h"
+
+/**
+ * @brief Open BlueTooth HID Device using BlueDroid
+ * @param bda               : BT Device Address
+ * @param transport         : BT Device Protocol (Classic/HID)
+ * @param remote_addr_type  : BLE Remote address type
+ *
+ * @return: ESP_OK on success
+ */
+esp_hidh_dev_t *esp_hidh_dev_open(esp_bd_addr_t bda, esp_hid_transport_t transport, uint8_t remote_addr_type);
+
+#endif /* CONFIG_BLUEDROID_ENABLED */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh_gattc.h b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh_gattc.h
new file mode 100644
index 00000000000..e58141dca0f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh_gattc.h
@@ -0,0 +1,40 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "sdkconfig.h"
+
+#if CONFIG_GATTC_ENABLE
+
+#include "esp_gattc_api.h" //for the callback
+
+/**
+ * @brief HID BLE GATTC System Callback. Attach it in your code
+ *        or call it from your gattc event handler to allow the HID stack to function
+ * @param event     : Event type
+ * @param gattc_if  : GATTC Interface ID
+ * @param param     : Point to callback parameter, currently is union type
+ */
+void esp_hidh_gattc_event_handler(esp_gattc_cb_event_t event, esp_gatt_if_t gattc_if, esp_ble_gattc_cb_param_t *param);
+
+#endif /* CONFIG_GATTC_ENABLE */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh_transport.h b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh_transport.h
new file mode 100644
index 00000000000..22138aef8ec
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hid/include/esp_hidh_transport.h
@@ -0,0 +1,33 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "sdkconfig.h"
+
+#if CONFIG_GATTC_ENABLE
+#include "esp_hidh_gattc.h"
+#endif
+
+#if CONFIG_BLUEDROID_ENABLED
+#include "esp_hidh_bluedroid.h"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_http_client/include/esp_http_client.h b/tools/sdk/esp32s3/include/esp_http_client/include/esp_http_client.h
new file mode 100644
index 00000000000..d1b530a42e3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_http_client/include/esp_http_client.h
@@ -0,0 +1,609 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_HTTP_CLIENT_H
+#define _ESP_HTTP_CLIENT_H
+
+#include "freertos/FreeRTOS.h"
+#include "http_parser.h"
+#include "sdkconfig.h"
+#include "esp_err.h"
+#include <sys/socket.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define DEFAULT_HTTP_BUF_SIZE (512)
+
+typedef struct esp_http_client *esp_http_client_handle_t;
+typedef struct esp_http_client_event *esp_http_client_event_handle_t;
+
+/**
+ * @brief   HTTP Client events id
+ */
+typedef enum {
+    HTTP_EVENT_ERROR = 0,       /*!< This event occurs when there are any errors during execution */
+    HTTP_EVENT_ON_CONNECTED,    /*!< Once the HTTP has been connected to the server, no data exchange has been performed */
+    HTTP_EVENT_HEADERS_SENT,     /*!< After sending all the headers to the server */
+    HTTP_EVENT_HEADER_SENT = HTTP_EVENT_HEADERS_SENT, /*!< This header has been kept for backward compatability
+                                                           and will be deprecated in future versions esp-idf */
+    HTTP_EVENT_ON_HEADER,       /*!< Occurs when receiving each header sent from the server */
+    HTTP_EVENT_ON_DATA,         /*!< Occurs when receiving data from the server, possibly multiple portions of the packet */
+    HTTP_EVENT_ON_FINISH,       /*!< Occurs when finish a HTTP session */
+    HTTP_EVENT_DISCONNECTED,    /*!< The connection has been disconnected */
+} esp_http_client_event_id_t;
+
+/**
+ * @brief      HTTP Client events data
+ */
+typedef struct esp_http_client_event {
+    esp_http_client_event_id_t event_id;    /*!< event_id, to know the cause of the event */
+    esp_http_client_handle_t client;        /*!< esp_http_client_handle_t context */
+    void *data;                             /*!< data of the event */
+    int data_len;                           /*!< data length of data */
+    void *user_data;                        /*!< user_data context, from esp_http_client_config_t user_data */
+    char *header_key;                       /*!< For HTTP_EVENT_ON_HEADER event_id, it's store current http header key */
+    char *header_value;                     /*!< For HTTP_EVENT_ON_HEADER event_id, it's store current http header value */
+} esp_http_client_event_t;
+
+
+/**
+ * @brief      HTTP Client transport
+ */
+typedef enum {
+    HTTP_TRANSPORT_UNKNOWN = 0x0,   /*!< Unknown */
+    HTTP_TRANSPORT_OVER_TCP,        /*!< Transport over tcp */
+    HTTP_TRANSPORT_OVER_SSL,        /*!< Transport over ssl */
+} esp_http_client_transport_t;
+
+typedef esp_err_t (*http_event_handle_cb)(esp_http_client_event_t *evt);
+
+/**
+ * @brief HTTP method
+ */
+typedef enum {
+    HTTP_METHOD_GET = 0,    /*!< HTTP GET Method */
+    HTTP_METHOD_POST,       /*!< HTTP POST Method */
+    HTTP_METHOD_PUT,        /*!< HTTP PUT Method */
+    HTTP_METHOD_PATCH,      /*!< HTTP PATCH Method */
+    HTTP_METHOD_DELETE,     /*!< HTTP DELETE Method */
+    HTTP_METHOD_HEAD,       /*!< HTTP HEAD Method */
+    HTTP_METHOD_NOTIFY,     /*!< HTTP NOTIFY Method */
+    HTTP_METHOD_SUBSCRIBE,  /*!< HTTP SUBSCRIBE Method */
+    HTTP_METHOD_UNSUBSCRIBE,/*!< HTTP UNSUBSCRIBE Method */
+    HTTP_METHOD_OPTIONS,    /*!< HTTP OPTIONS Method */
+    HTTP_METHOD_COPY,       /*!< HTTP COPY Method */
+    HTTP_METHOD_MOVE,       /*!< HTTP MOVE Method */
+    HTTP_METHOD_LOCK,       /*!< HTTP LOCK Method */
+    HTTP_METHOD_UNLOCK,     /*!< HTTP UNLOCK Method */
+    HTTP_METHOD_PROPFIND,   /*!< HTTP PROPFIND Method */
+    HTTP_METHOD_PROPPATCH,  /*!< HTTP PROPPATCH Method */
+    HTTP_METHOD_MKCOL,      /*!< HTTP MKCOL Method */
+    HTTP_METHOD_MAX,
+} esp_http_client_method_t;
+
+/**
+ * @brief HTTP Authentication type
+ */
+typedef enum {
+    HTTP_AUTH_TYPE_NONE = 0,    /*!< No authention */
+    HTTP_AUTH_TYPE_BASIC,       /*!< HTTP Basic authentication */
+    HTTP_AUTH_TYPE_DIGEST,      /*!< HTTP Disgest authentication */
+} esp_http_client_auth_type_t;
+
+/**
+ * @brief HTTP configuration
+ */
+typedef struct {
+    const char                  *url;                /*!< HTTP URL, the information on the URL is most important, it overrides the other fields below, if any */
+    const char                  *host;               /*!< Domain or IP as string */
+    int                         port;                /*!< Port to connect, default depend on esp_http_client_transport_t (80 or 443) */
+    const char                  *username;           /*!< Using for Http authentication */
+    const char                  *password;           /*!< Using for Http authentication */
+    esp_http_client_auth_type_t auth_type;           /*!< Http authentication type, see `esp_http_client_auth_type_t` */
+    const char                  *path;               /*!< HTTP Path, if not set, default is `/` */
+    const char                  *query;              /*!< HTTP query */
+    const char                  *cert_pem;           /*!< SSL server certification, PEM format as string, if the client requires to verify server */
+    size_t                      cert_len;            /*!< Length of the buffer pointed to by cert_pem. May be 0 for null-terminated pem */
+    const char                  *client_cert_pem;    /*!< SSL client certification, PEM format as string, if the server requires to verify client */
+    size_t                      client_cert_len;     /*!< Length of the buffer pointed to by client_cert_pem. May be 0 for null-terminated pem */
+    const char                  *client_key_pem;     /*!< SSL client key, PEM format as string, if the server requires to verify client */
+    size_t                      client_key_len;      /*!< Length of the buffer pointed to by client_key_pem. May be 0 for null-terminated pem */
+    const char                  *client_key_password;      /*!< Client key decryption password string */
+    size_t                      client_key_password_len;   /*!< String length of the password pointed to by client_key_password */
+    const char                  *user_agent;         /*!< The User Agent string to send with HTTP requests */
+    esp_http_client_method_t    method;                   /*!< HTTP Method */
+    int                         timeout_ms;               /*!< Network timeout in milliseconds */
+    bool                        disable_auto_redirect;    /*!< Disable HTTP automatic redirects */
+    int                         max_redirection_count;    /*!< Max number of redirections on receiving HTTP redirect status code, using default value if zero*/
+    int                         max_authorization_retries;    /*!< Max connection retries on receiving HTTP unauthorized status code, using default value if zero. Disables authorization retry if -1*/
+    http_event_handle_cb        event_handler;             /*!< HTTP Event Handle */
+    esp_http_client_transport_t transport_type;           /*!< HTTP transport type, see `esp_http_client_transport_t` */
+    int                         buffer_size;              /*!< HTTP receive buffer size */
+    int                         buffer_size_tx;           /*!< HTTP transmit buffer size */
+    void                        *user_data;               /*!< HTTP user_data context */
+    bool                        is_async;                 /*!< Set asynchronous mode, only supported with HTTPS for now */
+    bool                        use_global_ca_store;      /*!< Use a global ca_store for all the connections in which this bool is set. */
+    bool                        skip_cert_common_name_check;    /*!< Skip any validation of server certificate CN field */
+    esp_err_t (*crt_bundle_attach)(void *conf);      /*!< Function pointer to esp_crt_bundle_attach. Enables the use of certification
+                                                          bundle for server verification, must be enabled in menuconfig */
+    bool                        keep_alive_enable;   /*!< Enable keep-alive timeout */
+    int                         keep_alive_idle;     /*!< Keep-alive idle time. Default is 5 (second) */
+    int                         keep_alive_interval; /*!< Keep-alive interval time. Default is 5 (second) */
+    int                         keep_alive_count;    /*!< Keep-alive packet retry send count. Default is 3 counts */
+    struct ifreq                *if_name;            /*!< The name of interface for data to go through. Use the default interface without setting */
+} esp_http_client_config_t;
+
+/**
+ * Enum for the HTTP status codes.
+ */
+typedef enum {
+    /* 2xx - Success */
+    HttpStatus_Ok                = 200,
+
+    /* 3xx - Redirection */
+    HttpStatus_MultipleChoices   = 300,
+    HttpStatus_MovedPermanently  = 301,
+    HttpStatus_Found             = 302,
+    HttpStatus_TemporaryRedirect = 307,
+
+    /* 4xx - Client Error */
+    HttpStatus_BadRequest        = 400,
+    HttpStatus_Unauthorized      = 401,
+    HttpStatus_Forbidden         = 403,
+    HttpStatus_NotFound          = 404,
+
+    /* 5xx - Server Error */
+    HttpStatus_InternalError     = 500
+} HttpStatus_Code;
+
+#define ESP_ERR_HTTP_BASE               (0x7000)                    /*!< Starting number of HTTP error codes */
+#define ESP_ERR_HTTP_MAX_REDIRECT       (ESP_ERR_HTTP_BASE + 1)     /*!< The error exceeds the number of HTTP redirects */
+#define ESP_ERR_HTTP_CONNECT            (ESP_ERR_HTTP_BASE + 2)     /*!< Error open the HTTP connection */
+#define ESP_ERR_HTTP_WRITE_DATA         (ESP_ERR_HTTP_BASE + 3)     /*!< Error write HTTP data */
+#define ESP_ERR_HTTP_FETCH_HEADER       (ESP_ERR_HTTP_BASE + 4)     /*!< Error read HTTP header from server */
+#define ESP_ERR_HTTP_INVALID_TRANSPORT  (ESP_ERR_HTTP_BASE + 5)     /*!< There are no transport support for the input scheme */
+#define ESP_ERR_HTTP_CONNECTING         (ESP_ERR_HTTP_BASE + 6)     /*!< HTTP connection hasn't been established yet */
+#define ESP_ERR_HTTP_EAGAIN             (ESP_ERR_HTTP_BASE + 7)     /*!< Mapping of errno EAGAIN to esp_err_t */
+#define ESP_ERR_HTTP_CONNECTION_CLOSED  (ESP_ERR_HTTP_BASE + 8)     /*!< Read FIN from peer and the connection closed */
+
+/**
+ * @brief      Start a HTTP session
+ *             This function must be the first function to call,
+ *             and it returns a esp_http_client_handle_t that you must use as input to other functions in the interface.
+ *             This call MUST have a corresponding call to esp_http_client_cleanup when the operation is complete.
+ *
+ * @param[in]  config   The configurations, see `http_client_config_t`
+ *
+ * @return
+ *     - `esp_http_client_handle_t`
+ *     - NULL if any errors
+ */
+esp_http_client_handle_t esp_http_client_init(const esp_http_client_config_t *config);
+
+/**
+ * @brief      Invoke this function after `esp_http_client_init` and all the options calls are made, and will perform the
+ *             transfer as described in the options. It must be called with the same esp_http_client_handle_t as input as the esp_http_client_init call returned.
+ *             esp_http_client_perform performs the entire request in either blocking or non-blocking manner. By default, the API performs request in a blocking manner and returns when done,
+ *             or if it failed, and in non-blocking manner, it returns if EAGAIN/EWOULDBLOCK or EINPROGRESS is encountered, or if it failed. And in case of non-blocking request,
+ *             the user may call this API multiple times unless request & response is complete or there is a failure. To enable non-blocking esp_http_client_perform(), `is_async` member of esp_http_client_config_t
+ *             must be set while making a call to esp_http_client_init() API.
+ *             You can do any amount of calls to esp_http_client_perform while using the same esp_http_client_handle_t. The underlying connection may be kept open if the server allows it.
+ *             If you intend to transfer more than one file, you are even encouraged to do so.
+ *             esp_http_client will then attempt to re-use the same connection for the following transfers, thus making the operations faster, less CPU intense and using less network resources.
+ *             Just note that you will have to use `esp_http_client_set_**` between the invokes to set options for the following esp_http_client_perform.
+ *
+ * @note       You must never call this function simultaneously from two places using the same client handle.
+ *             Let the function return first before invoking it another time.
+ *             If you want parallel transfers, you must use several esp_http_client_handle_t.
+ *             This function include `esp_http_client_open` -> `esp_http_client_write` -> `esp_http_client_fetch_headers` -> `esp_http_client_read` (and option) `esp_http_client_close`.
+ *
+ * @param      client  The esp_http_client handle
+ *
+ * @return
+ *  - ESP_OK on successful
+ *  - ESP_FAIL on error
+ */
+esp_err_t esp_http_client_perform(esp_http_client_handle_t client);
+
+/**
+ * @brief      Set URL for client, when performing this behavior, the options in the URL will replace the old ones
+ *
+ * @param[in]  client  The esp_http_client handle
+ * @param[in]  url     The url
+ *
+ * @return
+ *  - ESP_OK
+ *  - ESP_FAIL
+ */
+esp_err_t esp_http_client_set_url(esp_http_client_handle_t client, const char *url);
+
+/**
+ * @brief      Set post data, this function must be called before `esp_http_client_perform`.
+ *             Note: The data parameter passed to this function is a pointer and this function will not copy the data
+ *
+ * @param[in]  client  The esp_http_client handle
+ * @param[in]  data    post data pointer
+ * @param[in]  len     post length
+ *
+ * @return
+ *  - ESP_OK
+ *  - ESP_FAIL
+ */
+esp_err_t esp_http_client_set_post_field(esp_http_client_handle_t client, const char *data, int len);
+
+/**
+ * @brief      Get current post field information
+ *
+ * @param[in]  client  The client
+ * @param[out] data    Point to post data pointer
+ *
+ * @return     Size of post data
+ */
+int esp_http_client_get_post_field(esp_http_client_handle_t client, char **data);
+
+/**
+ * @brief      Set http request header, this function must be called after esp_http_client_init and before any
+ *             perform function
+ *
+ * @param[in]  client  The esp_http_client handle
+ * @param[in]  key     The header key
+ * @param[in]  value   The header value
+ *
+ * @return
+ *  - ESP_OK
+ *  - ESP_FAIL
+ */
+esp_err_t esp_http_client_set_header(esp_http_client_handle_t client, const char *key, const char *value);
+
+/**
+ * @brief      Get http request header.
+ *             The value parameter will be set to NULL if there is no header which is same as
+ *             the key specified, otherwise the address of header value will be assigned to value parameter.
+ *             This function must be called after `esp_http_client_init`.
+ *
+ * @param[in]  client  The esp_http_client handle
+ * @param[in]  key     The header key
+ * @param[out] value   The header value
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_FAIL
+ */
+esp_err_t esp_http_client_get_header(esp_http_client_handle_t client, const char *key, char **value);
+
+/**
+ * @brief      Get http request username.
+ *             The address of username buffer will be assigned to value parameter.
+ *             This function must be called after `esp_http_client_init`.
+ *
+ * @param[in]  client  The esp_http_client handle
+ * @param[out] value   The username value
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t esp_http_client_get_username(esp_http_client_handle_t client, char **value);
+
+/**
+ * @brief      Set http request username.
+ *             The value of username parameter will be assigned to username buffer.
+ *             If the username parameter is NULL then username buffer will be freed.
+ *
+ * @param[in]  client    The esp_http_client handle
+ * @param[in]  username  The username value
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t esp_http_client_set_username(esp_http_client_handle_t client, const char *username);
+
+/**
+ * @brief      Get http request password.
+ *             The address of password buffer will be assigned to value parameter.
+ *             This function must be called after `esp_http_client_init`.
+ *
+ * @param[in]  client  The esp_http_client handle
+ * @param[out] value   The password value
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t esp_http_client_get_password(esp_http_client_handle_t client, char **value);
+
+/**
+ * @brief      Set http request password.
+ *             The value of password parameter will be assigned to password buffer.
+ *             If the password parameter is NULL then password buffer will be freed.
+ *
+ * @param[in]  client    The esp_http_client handle
+ * @param[in]  password  The password value
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t esp_http_client_set_password(esp_http_client_handle_t client, const char *password);
+
+/**
+ * @brief      Set http request auth_type.
+ *
+ * @param[in]  client    The esp_http_client handle
+ * @param[in]  auth_type The esp_http_client auth type
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t esp_http_client_set_authtype(esp_http_client_handle_t client, esp_http_client_auth_type_t auth_type);
+
+/**
+ * @brief      Get HTTP client session errno
+ *
+ * @param[in]  client  The esp_http_client handle
+ *
+ * @return
+ *         - (-1) if invalid argument
+ *         - errno
+ */
+int esp_http_client_get_errno(esp_http_client_handle_t client);
+
+/**
+ * @brief      Set http request method
+ *
+ * @param[in]  client  The esp_http_client handle
+ * @param[in]  method  The method
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t esp_http_client_set_method(esp_http_client_handle_t client, esp_http_client_method_t method);
+
+/**
+ * @brief      Set http request timeout
+ *
+ * @param[in]  client      The esp_http_client handle
+ * @param[in]  timeout_ms  The timeout value
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t esp_http_client_set_timeout_ms(esp_http_client_handle_t client, int timeout_ms);
+
+/**
+ * @brief      Delete http request header
+ *
+ * @param[in]  client  The esp_http_client handle
+ * @param[in]  key     The key
+ *
+ * @return
+ *  - ESP_OK
+ *  - ESP_FAIL
+ */
+esp_err_t esp_http_client_delete_header(esp_http_client_handle_t client, const char *key);
+
+/**
+ * @brief      This function will be open the connection, write all header strings and return
+ *
+ * @param[in]  client     The esp_http_client handle
+ * @param[in]  write_len  HTTP Content length need to write to the server
+ *
+ * @return
+ *  - ESP_OK
+ *  - ESP_FAIL
+ */
+esp_err_t esp_http_client_open(esp_http_client_handle_t client, int write_len);
+
+/**
+ * @brief     This function will write data to the HTTP connection previously opened by esp_http_client_open()
+ *
+ * @param[in]  client  The esp_http_client handle
+ * @param      buffer  The buffer
+ * @param[in]  len     This value must not be larger than the write_len parameter provided to esp_http_client_open()
+ *
+ * @return
+ *     - (-1) if any errors
+ *     - Length of data written
+ */
+int esp_http_client_write(esp_http_client_handle_t client, const char *buffer, int len);
+
+/**
+ * @brief      This function need to call after esp_http_client_open, it will read from http stream, process all receive headers
+ *
+ * @param[in]  client  The esp_http_client handle
+ *
+ * @return
+ *     - (0) if stream doesn't contain content-length header, or chunked encoding (checked by `esp_http_client_is_chunked` response)
+ *     - (-1: ESP_FAIL) if any errors
+ *     - Download data length defined by content-length header
+ */
+int esp_http_client_fetch_headers(esp_http_client_handle_t client);
+
+
+/**
+ * @brief      Check response data is chunked
+ *
+ * @param[in]  client  The esp_http_client handle
+ *
+ * @return     true or false
+ */
+bool esp_http_client_is_chunked_response(esp_http_client_handle_t client);
+
+/**
+ * @brief      Read data from http stream
+ *
+ * @param[in]  client  The esp_http_client handle
+ * @param      buffer  The buffer
+ * @param[in]  len     The length
+ *
+ * @return
+ *     - (-1) if any errors
+ *     - Length of data was read
+ */
+int esp_http_client_read(esp_http_client_handle_t client, char *buffer, int len);
+
+
+/**
+ * @brief      Get http response status code, the valid value if this function invoke after `esp_http_client_perform`
+ *
+ * @param[in]  client  The esp_http_client handle
+ *
+ * @return     Status code
+ */
+int esp_http_client_get_status_code(esp_http_client_handle_t client);
+
+/**
+ * @brief      Get http response content length (from header Content-Length)
+ *             the valid value if this function invoke after `esp_http_client_perform`
+ *
+ * @param[in]  client  The esp_http_client handle
+ *
+ * @return
+ *     - (-1) Chunked transfer
+ *     - Content-Length value as bytes
+ */
+int esp_http_client_get_content_length(esp_http_client_handle_t client);
+
+/**
+ * @brief      Close http connection, still kept all http request resources
+ *
+ * @param[in]  client  The esp_http_client handle
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_FAIL
+ */
+esp_err_t esp_http_client_close(esp_http_client_handle_t client);
+
+/**
+ * @brief      This function must be the last function to call for an session.
+ *             It is the opposite of the esp_http_client_init function and must be called with the same handle as input that a esp_http_client_init call returned.
+ *             This might close all connections this handle has used and possibly has kept open until now.
+ *             Don't call this function if you intend to transfer more files, re-using handles is a key to good performance with esp_http_client.
+ *
+ * @param[in]  client  The esp_http_client handle
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_FAIL
+ */
+esp_err_t esp_http_client_cleanup(esp_http_client_handle_t client);
+
+/**
+ * @brief      Get transport type
+ *
+ * @param[in]  client   The esp_http_client handle
+ *
+ * @return
+ *     - HTTP_TRANSPORT_UNKNOWN
+ *     - HTTP_TRANSPORT_OVER_TCP
+ *     - HTTP_TRANSPORT_OVER_SSL
+ */
+esp_http_client_transport_t esp_http_client_get_transport_type(esp_http_client_handle_t client);
+
+/**
+ * @brief      Set redirection URL.
+ *             When received the 30x code from the server, the client stores the redirect URL provided by the server.
+ *             This function will set the current URL to redirect to enable client to execute the redirection request.
+ *
+ * @param[in]  client  The esp_http_client handle
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_FAIL
+ */
+esp_err_t esp_http_client_set_redirection(esp_http_client_handle_t client);
+
+/**
+ * @brief      On receiving HTTP Status code 401, this API can be invoked to add authorization
+ *             information.
+ *
+ * @note       There is a possibility of receiving body message with redirection status codes, thus make sure
+ *             to flush off body data after calling this API.
+ *
+ * @param[in]  client   The esp_http_client handle
+ */
+void esp_http_client_add_auth(esp_http_client_handle_t client);
+
+/**
+ * @brief      Checks if entire data in the response has been read without any error.
+ *
+ * @param[in]  client   The esp_http_client handle
+ *
+ * @return
+ *     - true
+ *     - false
+ */
+bool esp_http_client_is_complete_data_received(esp_http_client_handle_t client);
+
+/**
+ * @brief      Helper API to read larger data chunks
+ *             This is a helper API which internally calls `esp_http_client_read` multiple times till the end of data is reached or till the buffer gets full.
+ *
+ * @param[in]  client   The esp_http_client handle
+ * @param      buffer   The buffer
+ * @param[in]  len      The buffer length
+ *
+ * @return
+ *     - Length of data was read
+ */
+
+int esp_http_client_read_response(esp_http_client_handle_t client, char *buffer, int len);
+
+/**
+ * @brief       Process all remaining response data
+ *              This uses an internal buffer to repeatedly receive, parse, and discard response data until complete data is processed.
+ *              As no additional user-supplied buffer is required, this may be preferrable to `esp_http_client_read_response` in situations where the content of the response may be ignored.
+ *
+ * @param[in]  client  The esp_http_client handle
+ * @param      len     Length of data discarded
+ *
+ * @return
+ *     - ESP_OK                 If successful, len will have discarded length
+ *     - ESP_FAIL               If failed to read response
+ *     - ESP_ERR_INVALID_ARG    If the client is NULL
+ */
+esp_err_t esp_http_client_flush_response(esp_http_client_handle_t client, int *len);
+
+/**
+ * @brief          Get URL from client
+ *
+ * @param[in]      client   The esp_http_client handle
+ * @param[inout]   url      The buffer to store URL
+ * @param[in]      len      The buffer length
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_FAIL
+ */
+
+esp_err_t esp_http_client_get_url(esp_http_client_handle_t client, char *url, const int len);
+
+/**
+ * @brief          Get Chunk-Length from client
+ *
+ * @param[in]      client   The esp_http_client handle
+ * @param[out]     len      Variable to store length
+ *
+ * @return
+ *     - ESP_OK                 If successful, len will have length of current chunk
+ *     - ESP_FAIL               If the server is not a chunked server
+ *     - ESP_ERR_INVALID_ARG    If the client or len are NULL
+ */
+esp_err_t esp_http_client_get_chunk_length(esp_http_client_handle_t client, int *len);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_http_server/include/esp_http_server.h b/tools/sdk/esp32s3/include/esp_http_server/include/esp_http_server.h
new file mode 100644
index 00000000000..1c8b78583ff
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_http_server/include/esp_http_server.h
@@ -0,0 +1,1709 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_HTTP_SERVER_H_
+#define _ESP_HTTP_SERVER_H_
+
+#include <stdio.h>
+#include <string.h>
+#include <freertos/FreeRTOS.h>
+#include <freertos/task.h>
+#include <http_parser.h>
+#include <sdkconfig.h>
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+note: esp_https_server.h includes a customized copy of this
+initializer that should be kept in sync
+*/
+#define HTTPD_DEFAULT_CONFIG() {                        \
+        .task_priority      = tskIDLE_PRIORITY+5,       \
+        .stack_size         = 4096,                     \
+        .core_id            = tskNO_AFFINITY,           \
+        .server_port        = 80,                       \
+        .ctrl_port          = 32768,                    \
+        .max_open_sockets   = 7,                        \
+        .max_uri_handlers   = 8,                        \
+        .max_resp_headers   = 8,                        \
+        .backlog_conn       = 5,                        \
+        .lru_purge_enable   = false,                    \
+        .recv_wait_timeout  = 5,                        \
+        .send_wait_timeout  = 5,                        \
+        .global_user_ctx = NULL,                        \
+        .global_user_ctx_free_fn = NULL,                \
+        .global_transport_ctx = NULL,                   \
+        .global_transport_ctx_free_fn = NULL,           \
+        .open_fn = NULL,                                \
+        .close_fn = NULL,                               \
+        .uri_match_fn = NULL                            \
+}
+
+#define ESP_ERR_HTTPD_BASE              (0xb000)                    /*!< Starting number of HTTPD error codes */
+#define ESP_ERR_HTTPD_HANDLERS_FULL     (ESP_ERR_HTTPD_BASE +  1)   /*!< All slots for registering URI handlers have been consumed */
+#define ESP_ERR_HTTPD_HANDLER_EXISTS    (ESP_ERR_HTTPD_BASE +  2)   /*!< URI handler with same method and target URI already registered */
+#define ESP_ERR_HTTPD_INVALID_REQ       (ESP_ERR_HTTPD_BASE +  3)   /*!< Invalid request pointer */
+#define ESP_ERR_HTTPD_RESULT_TRUNC      (ESP_ERR_HTTPD_BASE +  4)   /*!< Result string truncated */
+#define ESP_ERR_HTTPD_RESP_HDR          (ESP_ERR_HTTPD_BASE +  5)   /*!< Response header field larger than supported */
+#define ESP_ERR_HTTPD_RESP_SEND         (ESP_ERR_HTTPD_BASE +  6)   /*!< Error occured while sending response packet */
+#define ESP_ERR_HTTPD_ALLOC_MEM         (ESP_ERR_HTTPD_BASE +  7)   /*!< Failed to dynamically allocate memory for resource */
+#define ESP_ERR_HTTPD_TASK              (ESP_ERR_HTTPD_BASE +  8)   /*!< Failed to launch server task/thread */
+
+/* Symbol to be used as length parameter in httpd_resp_send APIs
+ * for setting buffer length to string length */
+#define HTTPD_RESP_USE_STRLEN -1
+
+/* ************** Group: Initialization ************** */
+/** @name Initialization
+ * APIs related to the Initialization of the web server
+ * @{
+ */
+
+/**
+ * @brief   HTTP Server Instance Handle
+ *
+ * Every instance of the server will have a unique handle.
+ */
+typedef void* httpd_handle_t;
+
+/**
+ * @brief   HTTP Method Type wrapper over "enum http_method"
+ *          available in "http_parser" library
+ */
+typedef enum http_method httpd_method_t;
+
+/**
+ * @brief  Prototype for freeing context data (if any)
+ * @param[in] ctx   object to free
+ */
+typedef void (*httpd_free_ctx_fn_t)(void *ctx);
+
+/**
+ * @brief  Function prototype for opening a session.
+ *
+ * Called immediately after the socket was opened to set up the send/recv functions and
+ * other parameters of the socket.
+ *
+ * @param[in] hd       server instance
+ * @param[in] sockfd   session socket file descriptor
+ * @return
+ *  - ESP_OK   : On success
+ *  - Any value other than ESP_OK will signal the server to close the socket immediately
+ */
+typedef esp_err_t (*httpd_open_func_t)(httpd_handle_t hd, int sockfd);
+
+/**
+ * @brief  Function prototype for closing a session.
+ *
+ * @note   It's possible that the socket descriptor is invalid at this point, the function
+ *         is called for all terminated sessions. Ensure proper handling of return codes.
+ *
+ * @param[in] hd   server instance
+ * @param[in] sockfd   session socket file descriptor
+ */
+typedef void (*httpd_close_func_t)(httpd_handle_t hd, int sockfd);
+
+/**
+ * @brief  Function prototype for URI matching.
+ *
+ * @param[in] reference_uri   URI/template with respect to which the other URI is matched
+ * @param[in] uri_to_match    URI/template being matched to the reference URI/template
+ * @param[in] match_upto      For specifying the actual length of `uri_to_match` up to
+ *                            which the matching algorithm is to be applied (The maximum
+ *                            value is `strlen(uri_to_match)`, independent of the length
+ *                            of `reference_uri`)
+ * @return true on match
+ */
+typedef bool (*httpd_uri_match_func_t)(const char *reference_uri,
+                                       const char *uri_to_match,
+                                       size_t match_upto);
+
+/**
+ * @brief   HTTP Server Configuration Structure
+ *
+ * @note    Use HTTPD_DEFAULT_CONFIG() to initialize the configuration
+ *          to a default value and then modify only those fields that are
+ *          specifically determined by the use case.
+ */
+typedef struct httpd_config {
+    unsigned    task_priority;      /*!< Priority of FreeRTOS task which runs the server */
+    size_t      stack_size;         /*!< The maximum stack size allowed for the server task */
+    BaseType_t  core_id;            /*!< The core the HTTP server task will run on */
+
+    /**
+     * TCP Port number for receiving and transmitting HTTP traffic
+     */
+    uint16_t    server_port;
+
+    /**
+     * UDP Port number for asynchronously exchanging control signals
+     * between various components of the server
+     */
+    uint16_t    ctrl_port;
+
+    uint16_t    max_open_sockets;   /*!< Max number of sockets/clients connected at any time*/
+    uint16_t    max_uri_handlers;   /*!< Maximum allowed uri handlers */
+    uint16_t    max_resp_headers;   /*!< Maximum allowed additional headers in HTTP response */
+    uint16_t    backlog_conn;       /*!< Number of backlog connections */
+    bool        lru_purge_enable;   /*!< Purge "Least Recently Used" connection */
+    uint16_t    recv_wait_timeout;  /*!< Timeout for recv function (in seconds)*/
+    uint16_t    send_wait_timeout;  /*!< Timeout for send function (in seconds)*/
+
+    /**
+     * Global user context.
+     *
+     * This field can be used to store arbitrary user data within the server context.
+     * The value can be retrieved using the server handle, available e.g. in the httpd_req_t struct.
+     *
+     * When shutting down, the server frees up the user context by
+     * calling free() on the global_user_ctx field. If you wish to use a custom
+     * function for freeing the global user context, please specify that here.
+     */
+    void * global_user_ctx;
+
+    /**
+     * Free function for global user context
+     */
+    httpd_free_ctx_fn_t global_user_ctx_free_fn;
+
+    /**
+     * Global transport context.
+     *
+     * Similar to global_user_ctx, but used for session encoding or encryption (e.g. to hold the SSL context).
+     * It will be freed using free(), unless global_transport_ctx_free_fn is specified.
+     */
+    void * global_transport_ctx;
+
+    /**
+     * Free function for global transport context
+     */
+    httpd_free_ctx_fn_t global_transport_ctx_free_fn;
+
+    /**
+     * Custom session opening callback.
+     *
+     * Called on a new session socket just after accept(), but before reading any data.
+     *
+     * This is an opportunity to set up e.g. SSL encryption using global_transport_ctx
+     * and the send/recv/pending session overrides.
+     *
+     * If a context needs to be maintained between these functions, store it in the session using
+     * httpd_sess_set_transport_ctx() and retrieve it later with httpd_sess_get_transport_ctx()
+     *
+     * Returning a value other than ESP_OK will immediately close the new socket.
+     */
+    httpd_open_func_t open_fn;
+
+    /**
+     * Custom session closing callback.
+     *
+     * Called when a session is deleted, before freeing user and transport contexts and before
+     * closing the socket. This is a place for custom de-init code common to all sockets.
+     *
+     * Set the user or transport context to NULL if it was freed here, so the server does not
+     * try to free it again.
+     *
+     * This function is run for all terminated sessions, including sessions where the socket
+     * was closed by the network stack - that is, the file descriptor may not be valid anymore.
+     */
+    httpd_close_func_t close_fn;
+
+    /**
+     * URI matcher function.
+     *
+     * Called when searching for a matching URI:
+     *     1) whose request handler is to be executed right
+     *        after an HTTP request is successfully parsed
+     *     2) in order to prevent duplication while registering
+     *        a new URI handler using `httpd_register_uri_handler()`
+     *
+     * Available options are:
+     *     1) NULL : Internally do basic matching using `strncmp()`
+     *     2) `httpd_uri_match_wildcard()` : URI wildcard matcher
+     *
+     * Users can implement their own matching functions (See description
+     * of the `httpd_uri_match_func_t` function prototype)
+     */
+    httpd_uri_match_func_t uri_match_fn;
+} httpd_config_t;
+
+/**
+ * @brief Starts the web server
+ *
+ * Create an instance of HTTP server and allocate memory/resources for it
+ * depending upon the specified configuration.
+ *
+ * Example usage:
+ * @code{c}
+ *
+ * //Function for starting the webserver
+ * httpd_handle_t start_webserver(void)
+ * {
+ *      // Generate default configuration
+ *      httpd_config_t config = HTTPD_DEFAULT_CONFIG();
+ *
+ *      // Empty handle to http_server
+ *      httpd_handle_t server = NULL;
+ *
+ *      // Start the httpd server
+ *      if (httpd_start(&server, &config) == ESP_OK) {
+ *          // Register URI handlers
+ *          httpd_register_uri_handler(server, &uri_get);
+ *          httpd_register_uri_handler(server, &uri_post);
+ *      }
+ *      // If server failed to start, handle will be NULL
+ *      return server;
+ * }
+ *
+ * @endcode
+ *
+ * @param[in]  config   Configuration for new instance of the server
+ * @param[out] handle   Handle to newly created instance of the server. NULL on error
+ * @return
+ *  - ESP_OK    : Instance created successfully
+ *  - ESP_ERR_INVALID_ARG      : Null argument(s)
+ *  - ESP_ERR_HTTPD_ALLOC_MEM  : Failed to allocate memory for instance
+ *  - ESP_ERR_HTTPD_TASK       : Failed to launch server task
+ */
+esp_err_t  httpd_start(httpd_handle_t *handle, const httpd_config_t *config);
+
+/**
+ * @brief Stops the web server
+ *
+ * Deallocates memory/resources used by an HTTP server instance and
+ * deletes it. Once deleted the handle can no longer be used for accessing
+ * the instance.
+ *
+ * Example usage:
+ * @code{c}
+ *
+ * // Function for stopping the webserver
+ * void stop_webserver(httpd_handle_t server)
+ * {
+ *      // Ensure handle is non NULL
+ *      if (server != NULL) {
+ *          // Stop the httpd server
+ *          httpd_stop(server);
+ *      }
+ * }
+ *
+ * @endcode
+ *
+ * @param[in] handle Handle to server returned by httpd_start
+ * @return
+ *  - ESP_OK : Server stopped successfully
+ *  - ESP_ERR_INVALID_ARG : Handle argument is Null
+ */
+esp_err_t httpd_stop(httpd_handle_t handle);
+
+/** End of Group Initialization
+ * @}
+ */
+
+/* ************** Group: URI Handlers ************** */
+/** @name URI Handlers
+ * APIs related to the URI handlers
+ * @{
+ */
+
+/* Max supported HTTP request header length */
+#define HTTPD_MAX_REQ_HDR_LEN CONFIG_HTTPD_MAX_REQ_HDR_LEN
+
+/* Max supported HTTP request URI length */
+#define HTTPD_MAX_URI_LEN CONFIG_HTTPD_MAX_URI_LEN
+
+/**
+ * @brief HTTP Request Data Structure
+ */
+typedef struct httpd_req {
+    httpd_handle_t  handle;                     /*!< Handle to server instance */
+    int             method;                     /*!< The type of HTTP request, -1 if unsupported method */
+    const char      uri[HTTPD_MAX_URI_LEN + 1]; /*!< The URI of this request (1 byte extra for null termination) */
+    size_t          content_len;                /*!< Length of the request body */
+    void           *aux;                        /*!< Internally used members */
+
+    /**
+     * User context pointer passed during URI registration.
+     */
+    void *user_ctx;
+
+    /**
+     * Session Context Pointer
+     *
+     * A session context. Contexts are maintained across 'sessions' for a
+     * given open TCP connection. One session could have multiple request
+     * responses. The web server will ensure that the context persists
+     * across all these request and responses.
+     *
+     * By default, this is NULL. URI Handlers can set this to any meaningful
+     * value.
+     *
+     * If the underlying socket gets closed, and this pointer is non-NULL,
+     * the web server will free up the context by calling free(), unless
+     * free_ctx function is set.
+     */
+    void *sess_ctx;
+
+    /**
+     * Pointer to free context hook
+     *
+     * Function to free session context
+     *
+     * If the web server's socket closes, it frees up the session context by
+     * calling free() on the sess_ctx member. If you wish to use a custom
+     * function for freeing the session context, please specify that here.
+     */
+    httpd_free_ctx_fn_t free_ctx;
+
+    /**
+     * Flag indicating if Session Context changes should be ignored
+     *
+     * By default, if you change the sess_ctx in some URI handler, the http server
+     * will internally free the earlier context (if non NULL), after the URI handler
+     * returns. If you want to manage the allocation/reallocation/freeing of
+     * sess_ctx yourself, set this flag to true, so that the server will not
+     * perform any checks on it. The context will be cleared by the server
+     * (by calling free_ctx or free()) only if the socket gets closed.
+     */
+    bool ignore_sess_ctx_changes;
+} httpd_req_t;
+
+/**
+ * @brief Structure for URI handler
+ */
+typedef struct httpd_uri {
+    const char       *uri;    /*!< The URI to handle */
+    httpd_method_t    method; /*!< Method supported by the URI */
+
+    /**
+     * Handler to call for supported request method. This must
+     * return ESP_OK, or else the underlying socket will be closed.
+     */
+    esp_err_t (*handler)(httpd_req_t *r);
+
+    /**
+     * Pointer to user context data which will be available to handler
+     */
+    void *user_ctx;
+
+#ifdef CONFIG_HTTPD_WS_SUPPORT
+    /**
+     * Flag for indicating a WebSocket endpoint.
+     * If this flag is true, then method must be HTTP_GET. Otherwise the handshake will not be handled.
+     */
+    bool is_websocket;
+
+    /**
+     * Flag indicating that control frames (PING, PONG, CLOSE) are also passed to the handler
+     * This is used if a custom processing of the control frames is needed
+     */
+    bool handle_ws_control_frames;
+
+    /**
+     * Pointer to subprotocol supported by URI
+     */
+    const char *supported_subprotocol;
+#endif
+} httpd_uri_t;
+
+/**
+ * @brief   Registers a URI handler
+ *
+ * @note    URI handlers can be registered in real time as long as the
+ *          server handle is valid.
+ *
+ * Example usage:
+ * @code{c}
+ *
+ * esp_err_t my_uri_handler(httpd_req_t* req)
+ * {
+ *     // Recv , Process and Send
+ *     ....
+ *     ....
+ *     ....
+ *
+ *     // Fail condition
+ *     if (....) {
+ *         // Return fail to close session //
+ *         return ESP_FAIL;
+ *     }
+ *
+ *     // On success
+ *     return ESP_OK;
+ * }
+ *
+ * // URI handler structure
+ * httpd_uri_t my_uri {
+ *     .uri      = "/my_uri/path/xyz",
+ *     .method   = HTTPD_GET,
+ *     .handler  = my_uri_handler,
+ *     .user_ctx = NULL
+ * };
+ *
+ * // Register handler
+ * if (httpd_register_uri_handler(server_handle, &my_uri) != ESP_OK) {
+ *    // If failed to register handler
+ *    ....
+ * }
+ *
+ * @endcode
+ *
+ * @param[in] handle      handle to HTTPD server instance
+ * @param[in] uri_handler pointer to handler that needs to be registered
+ *
+ * @return
+ *  - ESP_OK : On successfully registering the handler
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_HTTPD_HANDLERS_FULL  : If no slots left for new handler
+ *  - ESP_ERR_HTTPD_HANDLER_EXISTS : If handler with same URI and
+ *                                   method is already registered
+ */
+esp_err_t httpd_register_uri_handler(httpd_handle_t handle,
+                                     const httpd_uri_t *uri_handler);
+
+/**
+ * @brief   Unregister a URI handler
+ *
+ * @param[in] handle    handle to HTTPD server instance
+ * @param[in] uri       URI string
+ * @param[in] method    HTTP method
+ *
+ * @return
+ *  - ESP_OK : On successfully deregistering the handler
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_NOT_FOUND   : Handler with specified URI and method not found
+ */
+esp_err_t httpd_unregister_uri_handler(httpd_handle_t handle,
+                                       const char *uri, httpd_method_t method);
+
+/**
+ * @brief   Unregister all URI handlers with the specified uri string
+ *
+ * @param[in] handle   handle to HTTPD server instance
+ * @param[in] uri      uri string specifying all handlers that need
+ *                     to be deregisterd
+ *
+ * @return
+ *  - ESP_OK : On successfully deregistering all such handlers
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_NOT_FOUND   : No handler registered with specified uri string
+ */
+esp_err_t httpd_unregister_uri(httpd_handle_t handle, const char* uri);
+
+/** End of URI Handlers
+ * @}
+ */
+
+/* ************** Group: HTTP Error ************** */
+/** @name HTTP Error
+ * Prototype for HTTP errors and error handling functions
+ * @{
+ */
+
+/**
+ * @brief Error codes sent as HTTP response in case of errors
+ *        encountered during processing of an HTTP request
+ */
+typedef enum {
+    /* For any unexpected errors during parsing, like unexpected
+     * state transitions, or unhandled errors.
+     */
+    HTTPD_500_INTERNAL_SERVER_ERROR = 0,
+
+    /* For methods not supported by http_parser. Presently
+     * http_parser halts parsing when such methods are
+     * encountered and so the server responds with 400 Bad
+     * Request error instead.
+     */
+    HTTPD_501_METHOD_NOT_IMPLEMENTED,
+
+    /* When HTTP version is not 1.1 */
+    HTTPD_505_VERSION_NOT_SUPPORTED,
+
+    /* Returned when http_parser halts parsing due to incorrect
+     * syntax of request, unsupported method in request URI or
+     * due to chunked encoding / upgrade field present in headers
+     */
+    HTTPD_400_BAD_REQUEST,
+
+    /* This response means the client must authenticate itself
+     * to get the requested response.
+     */
+    HTTPD_401_UNAUTHORIZED,
+
+    /* The client does not have access rights to the content,
+     * so the server is refusing to give the requested resource.
+     * Unlike 401, the client's identity is known to the server.
+     */
+    HTTPD_403_FORBIDDEN,
+
+    /* When requested URI is not found */
+    HTTPD_404_NOT_FOUND,
+
+    /* When URI found, but method has no handler registered */
+    HTTPD_405_METHOD_NOT_ALLOWED,
+
+    /* Intended for recv timeout. Presently it's being sent
+     * for other recv errors as well. Client should expect the
+     * server to immediately close the connection after
+     * responding with this.
+     */
+    HTTPD_408_REQ_TIMEOUT,
+
+    /* Intended for responding to chunked encoding, which is
+     * not supported currently. Though unhandled http_parser
+     * callback for chunked request returns "400 Bad Request"
+     */
+    HTTPD_411_LENGTH_REQUIRED,
+
+    /* URI length greater than CONFIG_HTTPD_MAX_URI_LEN */
+    HTTPD_414_URI_TOO_LONG,
+
+    /* Headers section larger than CONFIG_HTTPD_MAX_REQ_HDR_LEN */
+    HTTPD_431_REQ_HDR_FIELDS_TOO_LARGE,
+
+    /* Used internally for retrieving the total count of errors */
+    HTTPD_ERR_CODE_MAX
+} httpd_err_code_t;
+
+/**
+ * @brief  Function prototype for HTTP error handling.
+ *
+ * This function is executed upon HTTP errors generated during
+ * internal processing of an HTTP request. This is used to override
+ * the default behavior on error, which is to send HTTP error response
+ * and close the underlying socket.
+ *
+ * @note
+ *  - If implemented, the server will not automatically send out HTTP
+ *    error response codes, therefore, httpd_resp_send_err() must be
+ *    invoked inside this function if user wishes to generate HTTP
+ *    error responses.
+ *  - When invoked, the validity of `uri`, `method`, `content_len`
+ *    and `user_ctx` fields of the httpd_req_t parameter is not
+ *    guaranteed as the HTTP request may be partially received/parsed.
+ *  - The function must return ESP_OK if underlying socket needs to
+ *    be kept open. Any other value will ensure that the socket is
+ *    closed. The return value is ignored when error is of type
+ *    `HTTPD_500_INTERNAL_SERVER_ERROR` and the socket closed anyway.
+ *
+ * @param[in] req    HTTP request for which the error needs to be handled
+ * @param[in] error  Error type
+ *
+ * @return
+ *  - ESP_OK   : error handled successful
+ *  - ESP_FAIL : failure indicates that the underlying socket needs to be closed
+ */
+typedef esp_err_t (*httpd_err_handler_func_t)(httpd_req_t *req,
+                                              httpd_err_code_t error);
+
+/**
+ * @brief  Function for registering HTTP error handlers
+ *
+ * This function maps a handler function to any supported error code
+ * given by `httpd_err_code_t`. See prototype `httpd_err_handler_func_t`
+ * above for details.
+ *
+ * @param[in] handle     HTTP server handle
+ * @param[in] error      Error type
+ * @param[in] handler_fn User implemented handler function
+ *                       (Pass NULL to unset any previously set handler)
+ *
+ * @return
+ *  - ESP_OK : handler registered successfully
+ *  - ESP_ERR_INVALID_ARG : invalid error code or server handle
+ */
+esp_err_t httpd_register_err_handler(httpd_handle_t handle,
+                                     httpd_err_code_t error,
+                                     httpd_err_handler_func_t handler_fn);
+
+/** End of HTTP Error
+ * @}
+ */
+
+/* ************** Group: TX/RX ************** */
+/** @name TX / RX
+ * Prototype for HTTPDs low-level send/recv functions
+ * @{
+ */
+
+#define HTTPD_SOCK_ERR_FAIL      -1
+#define HTTPD_SOCK_ERR_INVALID   -2
+#define HTTPD_SOCK_ERR_TIMEOUT   -3
+
+/**
+ * @brief  Prototype for HTTPDs low-level send function
+ *
+ * @note   User specified send function must handle errors internally,
+ *         depending upon the set value of errno, and return specific
+ *         HTTPD_SOCK_ERR_ codes, which will eventually be conveyed as
+ *         return value of httpd_send() function
+ *
+ * @param[in] hd        server instance
+ * @param[in] sockfd    session socket file descriptor
+ * @param[in] buf       buffer with bytes to send
+ * @param[in] buf_len   data size
+ * @param[in] flags     flags for the send() function
+ * @return
+ *  - Bytes : The number of bytes sent successfully
+ *  - HTTPD_SOCK_ERR_INVALID  : Invalid arguments
+ *  - HTTPD_SOCK_ERR_TIMEOUT  : Timeout/interrupted while calling socket send()
+ *  - HTTPD_SOCK_ERR_FAIL     : Unrecoverable error while calling socket send()
+ */
+typedef int (*httpd_send_func_t)(httpd_handle_t hd, int sockfd, const char *buf, size_t buf_len, int flags);
+
+/**
+ * @brief  Prototype for HTTPDs low-level recv function
+ *
+ * @note   User specified recv function must handle errors internally,
+ *         depending upon the set value of errno, and return specific
+ *         HTTPD_SOCK_ERR_ codes, which will eventually be conveyed as
+ *         return value of httpd_req_recv() function
+ *
+ * @param[in] hd        server instance
+ * @param[in] sockfd    session socket file descriptor
+ * @param[in] buf       buffer with bytes to send
+ * @param[in] buf_len   data size
+ * @param[in] flags     flags for the send() function
+ * @return
+ *  - Bytes : The number of bytes received successfully
+ *  - 0     : Buffer length parameter is zero / connection closed by peer
+ *  - HTTPD_SOCK_ERR_INVALID  : Invalid arguments
+ *  - HTTPD_SOCK_ERR_TIMEOUT  : Timeout/interrupted while calling socket recv()
+ *  - HTTPD_SOCK_ERR_FAIL     : Unrecoverable error while calling socket recv()
+ */
+typedef int (*httpd_recv_func_t)(httpd_handle_t hd, int sockfd, char *buf, size_t buf_len, int flags);
+
+/**
+ * @brief  Prototype for HTTPDs low-level "get pending bytes" function
+ *
+ * @note   User specified pending function must handle errors internally,
+ *         depending upon the set value of errno, and return specific
+ *         HTTPD_SOCK_ERR_ codes, which will be handled accordingly in
+ *         the server task.
+ *
+ * @param[in] hd       server instance
+ * @param[in] sockfd   session socket file descriptor
+ * @return
+ *  - Bytes : The number of bytes waiting to be received
+ *  - HTTPD_SOCK_ERR_INVALID  : Invalid arguments
+ *  - HTTPD_SOCK_ERR_TIMEOUT  : Timeout/interrupted while calling socket pending()
+ *  - HTTPD_SOCK_ERR_FAIL     : Unrecoverable error while calling socket pending()
+ */
+typedef int (*httpd_pending_func_t)(httpd_handle_t hd, int sockfd);
+
+/** End of TX / RX
+ * @}
+ */
+
+/* ************** Group: Request/Response ************** */
+/** @name Request / Response
+ * APIs related to the data send/receive by URI handlers.
+ * These APIs are supposed to be called only from the context of
+ * a URI handler where httpd_req_t* request pointer is valid.
+ * @{
+ */
+
+/**
+ * @brief   Override web server's receive function (by session FD)
+ *
+ * This function overrides the web server's receive function. This same function is
+ * used to read HTTP request packets.
+ *
+ * @note    This API is supposed to be called either from the context of
+ *          - an http session APIs where sockfd is a valid parameter
+ *          - a URI handler where sockfd is obtained using httpd_req_to_sockfd()
+ *
+ * @param[in] hd        HTTPD instance handle
+ * @param[in] sockfd    Session socket FD
+ * @param[in] recv_func The receive function to be set for this session
+ *
+ * @return
+ *  - ESP_OK : On successfully registering override
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ */
+esp_err_t httpd_sess_set_recv_override(httpd_handle_t hd, int sockfd, httpd_recv_func_t recv_func);
+
+/**
+ * @brief   Override web server's send function (by session FD)
+ *
+ * This function overrides the web server's send function. This same function is
+ * used to send out any response to any HTTP request.
+ *
+ * @note    This API is supposed to be called either from the context of
+ *          - an http session APIs where sockfd is a valid parameter
+ *          - a URI handler where sockfd is obtained using httpd_req_to_sockfd()
+ *
+ * @param[in] hd        HTTPD instance handle
+ * @param[in] sockfd    Session socket FD
+ * @param[in] send_func The send function to be set for this session
+ *
+ * @return
+ *  - ESP_OK : On successfully registering override
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ */
+esp_err_t httpd_sess_set_send_override(httpd_handle_t hd, int sockfd, httpd_send_func_t send_func);
+
+/**
+ * @brief   Override web server's pending function (by session FD)
+ *
+ * This function overrides the web server's pending function. This function is
+ * used to test for pending bytes in a socket.
+ *
+ * @note    This API is supposed to be called either from the context of
+ *          - an http session APIs where sockfd is a valid parameter
+ *          - a URI handler where sockfd is obtained using httpd_req_to_sockfd()
+ *
+ * @param[in] hd           HTTPD instance handle
+ * @param[in] sockfd       Session socket FD
+ * @param[in] pending_func The receive function to be set for this session
+ *
+ * @return
+ *  - ESP_OK : On successfully registering override
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ */
+esp_err_t httpd_sess_set_pending_override(httpd_handle_t hd, int sockfd, httpd_pending_func_t pending_func);
+
+/**
+ * @brief   Get the Socket Descriptor from the HTTP request
+ *
+ * This API will return the socket descriptor of the session for
+ * which URI handler was executed on reception of HTTP request.
+ * This is useful when user wants to call functions that require
+ * session socket fd, from within a URI handler, ie. :
+ *      httpd_sess_get_ctx(),
+ *      httpd_sess_trigger_close(),
+ *      httpd_sess_update_lru_counter().
+ *
+ * @note    This API is supposed to be called only from the context of
+ *          a URI handler where httpd_req_t* request pointer is valid.
+ *
+ * @param[in] r The request whose socket descriptor should be found
+ *
+ * @return
+ *  - Socket descriptor : The socket descriptor for this request
+ *  - -1 : Invalid/NULL request pointer
+ */
+int httpd_req_to_sockfd(httpd_req_t *r);
+
+/**
+ * @brief   API to read content data from the HTTP request
+ *
+ * This API will read HTTP content data from the HTTP request into
+ * provided buffer. Use content_len provided in httpd_req_t structure
+ * to know the length of data to be fetched. If content_len is too
+ * large for the buffer then user may have to make multiple calls to
+ * this function, each time fetching 'buf_len' number of bytes,
+ * while the pointer to content data is incremented internally by
+ * the same number.
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - If an error is returned, the URI handler must further return an error.
+ *    This will ensure that the erroneous socket is closed and cleaned up by
+ *    the web server.
+ *  - Presently Chunked Encoding is not supported
+ *
+ * @param[in] r         The request being responded to
+ * @param[in] buf       Pointer to a buffer that the data will be read into
+ * @param[in] buf_len   Length of the buffer
+ *
+ * @return
+ *  - Bytes : Number of bytes read into the buffer successfully
+ *  - 0     : Buffer length parameter is zero / connection closed by peer
+ *  - HTTPD_SOCK_ERR_INVALID  : Invalid arguments
+ *  - HTTPD_SOCK_ERR_TIMEOUT  : Timeout/interrupted while calling socket recv()
+ *  - HTTPD_SOCK_ERR_FAIL     : Unrecoverable error while calling socket recv()
+ */
+int httpd_req_recv(httpd_req_t *r, char *buf, size_t buf_len);
+
+/**
+ * @brief   Search for a field in request headers and
+ *          return the string length of it's value
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - Once httpd_resp_send() API is called all request headers
+ *    are purged, so request headers need be copied into separate
+ *    buffers if they are required later.
+ *
+ * @param[in]  r        The request being responded to
+ * @param[in]  field    The header field to be searched in the request
+ *
+ * @return
+ *  - Length    : If field is found in the request URL
+ *  - Zero      : Field not found / Invalid request / Null arguments
+ */
+size_t httpd_req_get_hdr_value_len(httpd_req_t *r, const char *field);
+
+/**
+ * @brief   Get the value string of a field from the request headers
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - Once httpd_resp_send() API is called all request headers
+ *    are purged, so request headers need be copied into separate
+ *    buffers if they are required later.
+ *  - If output size is greater than input, then the value is truncated,
+ *    accompanied by truncation error as return value.
+ *  - Use httpd_req_get_hdr_value_len() to know the right buffer length
+ *
+ * @param[in]  r        The request being responded to
+ * @param[in]  field    The field to be searched in the header
+ * @param[out] val      Pointer to the buffer into which the value will be copied if the field is found
+ * @param[in]  val_size Size of the user buffer "val"
+ *
+ * @return
+ *  - ESP_OK : Field found in the request header and value string copied
+ *  - ESP_ERR_NOT_FOUND          : Key not found
+ *  - ESP_ERR_INVALID_ARG        : Null arguments
+ *  - ESP_ERR_HTTPD_INVALID_REQ  : Invalid HTTP request pointer
+ *  - ESP_ERR_HTTPD_RESULT_TRUNC : Value string truncated
+ */
+esp_err_t httpd_req_get_hdr_value_str(httpd_req_t *r, const char *field, char *val, size_t val_size);
+
+/**
+ * @brief   Get Query string length from the request URL
+ *
+ * @note    This API is supposed to be called only from the context of
+ *          a URI handler where httpd_req_t* request pointer is valid
+ *
+ * @param[in]  r    The request being responded to
+ *
+ * @return
+ *  - Length    : Query is found in the request URL
+ *  - Zero      : Query not found / Null arguments / Invalid request
+ */
+size_t httpd_req_get_url_query_len(httpd_req_t *r);
+
+/**
+ * @brief   Get Query string from the request URL
+ *
+ * @note
+ *  - Presently, the user can fetch the full URL query string, but decoding
+ *    will have to be performed by the user. Request headers can be read using
+ *    httpd_req_get_hdr_value_str() to know the 'Content-Type' (eg. Content-Type:
+ *    application/x-www-form-urlencoded) and then the appropriate decoding
+ *    algorithm needs to be applied.
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid
+ *  - If output size is greater than input, then the value is truncated,
+ *    accompanied by truncation error as return value
+ *  - Prior to calling this function, one can use httpd_req_get_url_query_len()
+ *    to know the query string length beforehand and hence allocate the buffer
+ *    of right size (usually query string length + 1 for null termination)
+ *    for storing the query string
+ *
+ * @param[in]  r         The request being responded to
+ * @param[out] buf       Pointer to the buffer into which the query string will be copied (if found)
+ * @param[in]  buf_len   Length of output buffer
+ *
+ * @return
+ *  - ESP_OK : Query is found in the request URL and copied to buffer
+ *  - ESP_ERR_NOT_FOUND          : Query not found
+ *  - ESP_ERR_INVALID_ARG        : Null arguments
+ *  - ESP_ERR_HTTPD_INVALID_REQ  : Invalid HTTP request pointer
+ *  - ESP_ERR_HTTPD_RESULT_TRUNC : Query string truncated
+ */
+esp_err_t httpd_req_get_url_query_str(httpd_req_t *r, char *buf, size_t buf_len);
+
+/**
+ * @brief   Helper function to get a URL query tag from a query
+ *          string of the type param1=val1&param2=val2
+ *
+ * @note
+ *  - The components of URL query string (keys and values) are not URLdecoded.
+ *    The user must check for 'Content-Type' field in the request headers and
+ *    then depending upon the specified encoding (URLencoded or otherwise) apply
+ *    the appropriate decoding algorithm.
+ *  - If actual value size is greater than val_size, then the value is truncated,
+ *    accompanied by truncation error as return value.
+ *
+ * @param[in]  qry       Pointer to query string
+ * @param[in]  key       The key to be searched in the query string
+ * @param[out] val       Pointer to the buffer into which the value will be copied if the key is found
+ * @param[in]  val_size  Size of the user buffer "val"
+ *
+ * @return
+ *  - ESP_OK : Key is found in the URL query string and copied to buffer
+ *  - ESP_ERR_NOT_FOUND          : Key not found
+ *  - ESP_ERR_INVALID_ARG        : Null arguments
+ *  - ESP_ERR_HTTPD_RESULT_TRUNC : Value string truncated
+ */
+esp_err_t httpd_query_key_value(const char *qry, const char *key, char *val, size_t val_size);
+
+/**
+ * @brief   Get the value string of a cookie value from the "Cookie" request headers by cookie name.
+ *
+ * @param[in]       req             Pointer to the HTTP request
+ * @param[in]       cookie_name     The cookie name to be searched in the request
+ * @param[out]      val             Pointer to the buffer into which the value of cookie will be copied if the cookie is found
+ * @param[inout]    val_size        Pointer to size of the user buffer "val". This variable will contain cookie length if
+ *                                  ESP_OK is returned and required buffer length incase ESP_ERR_HTTPD_RESULT_TRUNC is returned.
+ *
+ * @return
+ *  - ESP_OK : Key is found in the cookie string and copied to buffer
+ *  - ESP_ERR_NOT_FOUND          : Key not found
+ *  - ESP_ERR_INVALID_ARG        : Null arguments
+ *  - ESP_ERR_HTTPD_RESULT_TRUNC : Value string truncated
+ *  - ESP_ERR_NO_MEM             : Memory allocation failure
+ */
+esp_err_t httpd_req_get_cookie_val(httpd_req_t *req, const char *cookie_name, char *val, size_t *val_size);
+
+/**
+ * @brief Test if a URI matches the given wildcard template.
+ *
+ * Template may end with "?" to make the previous character optional (typically a slash),
+ * "*" for a wildcard match, and "?*" to make the previous character optional, and if present,
+ * allow anything to follow.
+ *
+ * Example:
+ *   - * matches everything
+ *   - /foo/? matches /foo and /foo/
+ *   - /foo/\* (sans the backslash) matches /foo/ and /foo/bar, but not /foo or /fo
+ *   - /foo/?* or /foo/\*?  (sans the backslash) matches /foo/, /foo/bar, and also /foo, but not /foox or /fo
+ *
+ * The special characters "?" and "*" anywhere else in the template will be taken literally.
+ *
+ * @param[in] uri_template   URI template (pattern)
+ * @param[in] uri_to_match   URI to be matched
+ * @param[in] match_upto     how many characters of the URI buffer to test
+ *                          (there may be trailing query string etc.)
+ *
+ * @return true if a match was found
+ */
+bool httpd_uri_match_wildcard(const char *uri_template, const char *uri_to_match, size_t match_upto);
+
+/**
+ * @brief   API to send a complete HTTP response.
+ *
+ * This API will send the data as an HTTP response to the request.
+ * This assumes that you have the entire response ready in a single
+ * buffer. If you wish to send response in incremental chunks use
+ * httpd_resp_send_chunk() instead.
+ *
+ * If no status code and content-type were set, by default this
+ * will send 200 OK status code and content type as text/html.
+ * You may call the following functions before this API to configure
+ * the response headers :
+ *      httpd_resp_set_status() - for setting the HTTP status string,
+ *      httpd_resp_set_type()   - for setting the Content Type,
+ *      httpd_resp_set_hdr()    - for appending any additional field
+ *                                value entries in the response header
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - Once this API is called, the request has been responded to.
+ *  - No additional data can then be sent for the request.
+ *  - Once this API is called, all request headers are purged, so
+ *    request headers need be copied into separate buffers if
+ *    they are required later.
+ *
+ * @param[in] r         The request being responded to
+ * @param[in] buf       Buffer from where the content is to be fetched
+ * @param[in] buf_len   Length of the buffer, HTTPD_RESP_USE_STRLEN to use strlen()
+ *
+ * @return
+ *  - ESP_OK : On successfully sending the response packet
+ *  - ESP_ERR_INVALID_ARG : Null request pointer
+ *  - ESP_ERR_HTTPD_RESP_HDR    : Essential headers are too large for internal buffer
+ *  - ESP_ERR_HTTPD_RESP_SEND   : Error in raw send
+ *  - ESP_ERR_HTTPD_INVALID_REQ : Invalid request
+ */
+esp_err_t httpd_resp_send(httpd_req_t *r, const char *buf, ssize_t buf_len);
+
+/**
+ * @brief   API to send one HTTP chunk
+ *
+ * This API will send the data as an HTTP response to the
+ * request. This API will use chunked-encoding and send the response
+ * in the form of chunks. If you have the entire response contained in
+ * a single buffer, please use httpd_resp_send() instead.
+ *
+ * If no status code and content-type were set, by default this will
+ * send 200 OK status code and content type as text/html. You may
+ * call the following functions before this API to configure the
+ * response headers
+ *      httpd_resp_set_status() - for setting the HTTP status string,
+ *      httpd_resp_set_type()   - for setting the Content Type,
+ *      httpd_resp_set_hdr()    - for appending any additional field
+ *                                value entries in the response header
+ *
+ * @note
+ * - This API is supposed to be called only from the context of
+ *   a URI handler where httpd_req_t* request pointer is valid.
+ * - When you are finished sending all your chunks, you must call
+ *   this function with buf_len as 0.
+ * - Once this API is called, all request headers are purged, so
+ *   request headers need be copied into separate buffers if they
+ *   are required later.
+ *
+ * @param[in] r         The request being responded to
+ * @param[in] buf       Pointer to a buffer that stores the data
+ * @param[in] buf_len   Length of the buffer, HTTPD_RESP_USE_STRLEN to use strlen()
+ *
+ * @return
+ *  - ESP_OK : On successfully sending the response packet chunk
+ *  - ESP_ERR_INVALID_ARG : Null request pointer
+ *  - ESP_ERR_HTTPD_RESP_HDR    : Essential headers are too large for internal buffer
+ *  - ESP_ERR_HTTPD_RESP_SEND   : Error in raw send
+ *  - ESP_ERR_HTTPD_INVALID_REQ : Invalid request pointer
+ */
+esp_err_t httpd_resp_send_chunk(httpd_req_t *r, const char *buf, ssize_t buf_len);
+
+/**
+ * @brief   API to send a complete string as HTTP response.
+ *
+ * This API simply calls http_resp_send with buffer length
+ * set to string length assuming the buffer contains a null
+ * terminated string
+ *
+ * @param[in] r         The request being responded to
+ * @param[in] str       String to be sent as response body
+ *
+ * @return
+ *  - ESP_OK : On successfully sending the response packet
+ *  - ESP_ERR_INVALID_ARG : Null request pointer
+ *  - ESP_ERR_HTTPD_RESP_HDR    : Essential headers are too large for internal buffer
+ *  - ESP_ERR_HTTPD_RESP_SEND   : Error in raw send
+ *  - ESP_ERR_HTTPD_INVALID_REQ : Invalid request
+ */
+static inline esp_err_t httpd_resp_sendstr(httpd_req_t *r, const char *str) {
+    return httpd_resp_send(r, str, (str == NULL) ? 0 : HTTPD_RESP_USE_STRLEN);
+}
+
+/**
+ * @brief   API to send a string as an HTTP response chunk.
+ *
+ * This API simply calls http_resp_send_chunk with buffer length
+ * set to string length assuming the buffer contains a null
+ * terminated string
+ *
+ * @param[in] r    The request being responded to
+ * @param[in] str  String to be sent as response body (NULL to finish response packet)
+ *
+ * @return
+ *  - ESP_OK : On successfully sending the response packet
+ *  - ESP_ERR_INVALID_ARG : Null request pointer
+ *  - ESP_ERR_HTTPD_RESP_HDR    : Essential headers are too large for internal buffer
+ *  - ESP_ERR_HTTPD_RESP_SEND   : Error in raw send
+ *  - ESP_ERR_HTTPD_INVALID_REQ : Invalid request
+ */
+static inline esp_err_t httpd_resp_sendstr_chunk(httpd_req_t *r, const char *str) {
+    return httpd_resp_send_chunk(r, str, (str == NULL) ? 0 : HTTPD_RESP_USE_STRLEN);
+}
+
+/* Some commonly used status codes */
+#define HTTPD_200      "200 OK"                     /*!< HTTP Response 200 */
+#define HTTPD_204      "204 No Content"             /*!< HTTP Response 204 */
+#define HTTPD_207      "207 Multi-Status"           /*!< HTTP Response 207 */
+#define HTTPD_400      "400 Bad Request"            /*!< HTTP Response 400 */
+#define HTTPD_404      "404 Not Found"              /*!< HTTP Response 404 */
+#define HTTPD_408      "408 Request Timeout"        /*!< HTTP Response 408 */
+#define HTTPD_500      "500 Internal Server Error"  /*!< HTTP Response 500 */
+
+/**
+ * @brief   API to set the HTTP status code
+ *
+ * This API sets the status of the HTTP response to the value specified.
+ * By default, the '200 OK' response is sent as the response.
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - This API only sets the status to this value. The status isn't
+ *    sent out until any of the send APIs is executed.
+ *  - Make sure that the lifetime of the status string is valid till
+ *    send function is called.
+ *
+ * @param[in] r         The request being responded to
+ * @param[in] status    The HTTP status code of this response
+ *
+ * @return
+ *  - ESP_OK : On success
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_HTTPD_INVALID_REQ : Invalid request pointer
+ */
+esp_err_t httpd_resp_set_status(httpd_req_t *r, const char *status);
+
+/* Some commonly used content types */
+#define HTTPD_TYPE_JSON   "application/json"            /*!< HTTP Content type JSON */
+#define HTTPD_TYPE_TEXT   "text/html"                   /*!< HTTP Content type text/HTML */
+#define HTTPD_TYPE_OCTET  "application/octet-stream"    /*!< HTTP Content type octext-stream */
+
+/**
+ * @brief   API to set the HTTP content type
+ *
+ * This API sets the 'Content Type' field of the response.
+ * The default content type is 'text/html'.
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - This API only sets the content type to this value. The type
+ *    isn't sent out until any of the send APIs is executed.
+ *  - Make sure that the lifetime of the type string is valid till
+ *    send function is called.
+ *
+ * @param[in] r     The request being responded to
+ * @param[in] type  The Content Type of the response
+ *
+ * @return
+ *  - ESP_OK   : On success
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_HTTPD_INVALID_REQ : Invalid request pointer
+ */
+esp_err_t httpd_resp_set_type(httpd_req_t *r, const char *type);
+
+/**
+ * @brief   API to append any additional headers
+ *
+ * This API sets any additional header fields that need to be sent in the response.
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - The header isn't sent out until any of the send APIs is executed.
+ *  - The maximum allowed number of additional headers is limited to
+ *    value of max_resp_headers in config structure.
+ *  - Make sure that the lifetime of the field value strings are valid till
+ *    send function is called.
+ *
+ * @param[in] r     The request being responded to
+ * @param[in] field The field name of the HTTP header
+ * @param[in] value The value of this HTTP header
+ *
+ * @return
+ *  - ESP_OK : On successfully appending new header
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_HTTPD_RESP_HDR    : Total additional headers exceed max allowed
+ *  - ESP_ERR_HTTPD_INVALID_REQ : Invalid request pointer
+ */
+esp_err_t httpd_resp_set_hdr(httpd_req_t *r, const char *field, const char *value);
+
+/**
+ * @brief   For sending out error code in response to HTTP request.
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - Once this API is called, all request headers are purged, so
+ *    request headers need be copied into separate buffers if
+ *    they are required later.
+ *  - If you wish to send additional data in the body of the
+ *    response, please use the lower-level functions directly.
+ *
+ * @param[in] req     Pointer to the HTTP request for which the response needs to be sent
+ * @param[in] error   Error type to send
+ * @param[in] msg     Error message string (pass NULL for default message)
+ *
+ * @return
+ *  - ESP_OK : On successfully sending the response packet
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_HTTPD_RESP_SEND   : Error in raw send
+ *  - ESP_ERR_HTTPD_INVALID_REQ : Invalid request pointer
+ */
+esp_err_t httpd_resp_send_err(httpd_req_t *req, httpd_err_code_t error, const char *msg);
+
+/**
+ * @brief   Helper function for HTTP 404
+ *
+ * Send HTTP 404 message. If you wish to send additional data in the body of the
+ * response, please use the lower-level functions directly.
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - Once this API is called, all request headers are purged, so
+ *    request headers need be copied into separate buffers if
+ *    they are required later.
+ *
+ * @param[in] r The request being responded to
+ *
+ * @return
+ *  - ESP_OK : On successfully sending the response packet
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_HTTPD_RESP_SEND   : Error in raw send
+ *  - ESP_ERR_HTTPD_INVALID_REQ : Invalid request pointer
+ */
+static inline esp_err_t httpd_resp_send_404(httpd_req_t *r) {
+    return httpd_resp_send_err(r, HTTPD_404_NOT_FOUND, NULL);
+}
+
+/**
+ * @brief   Helper function for HTTP 408
+ *
+ * Send HTTP 408 message. If you wish to send additional data in the body of the
+ * response, please use the lower-level functions directly.
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - Once this API is called, all request headers are purged, so
+ *    request headers need be copied into separate buffers if
+ *    they are required later.
+ *
+ * @param[in] r The request being responded to
+ *
+ * @return
+ *  - ESP_OK : On successfully sending the response packet
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_HTTPD_RESP_SEND   : Error in raw send
+ *  - ESP_ERR_HTTPD_INVALID_REQ : Invalid request pointer
+ */
+static inline esp_err_t httpd_resp_send_408(httpd_req_t *r) {
+    return httpd_resp_send_err(r, HTTPD_408_REQ_TIMEOUT, NULL);
+}
+
+/**
+ * @brief   Helper function for HTTP 500
+ *
+ * Send HTTP 500 message. If you wish to send additional data in the body of the
+ * response, please use the lower-level functions directly.
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - Once this API is called, all request headers are purged, so
+ *    request headers need be copied into separate buffers if
+ *    they are required later.
+ *
+ * @param[in] r The request being responded to
+ *
+ * @return
+ *  - ESP_OK : On successfully sending the response packet
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_HTTPD_RESP_SEND   : Error in raw send
+ *  - ESP_ERR_HTTPD_INVALID_REQ : Invalid request pointer
+ */
+static inline esp_err_t httpd_resp_send_500(httpd_req_t *r) {
+    return httpd_resp_send_err(r, HTTPD_500_INTERNAL_SERVER_ERROR, NULL);
+}
+
+/**
+ * @brief   Raw HTTP send
+ *
+ * Call this API if you wish to construct your custom response packet.
+ * When using this, all essential header, eg. HTTP version, Status Code,
+ * Content Type and Length, Encoding, etc. will have to be constructed
+ * manually, and HTTP delimeters (CRLF) will need to be placed correctly
+ * for separating sub-sections of the HTTP response packet.
+ *
+ * If the send override function is set, this API will end up
+ * calling that function eventually to send data out.
+ *
+ * @note
+ *  - This API is supposed to be called only from the context of
+ *    a URI handler where httpd_req_t* request pointer is valid.
+ *  - Unless the response has the correct HTTP structure (which the
+ *    user must now ensure) it is not guaranteed that it will be
+ *    recognized by the client. For most cases, you wouldn't have
+ *    to call this API, but you would rather use either of :
+ *          httpd_resp_send(),
+ *          httpd_resp_send_chunk()
+ *
+ * @param[in] r         The request being responded to
+ * @param[in] buf       Buffer from where the fully constructed packet is to be read
+ * @param[in] buf_len   Length of the buffer
+ *
+ * @return
+ *  - Bytes : Number of bytes that were sent successfully
+ *  - HTTPD_SOCK_ERR_INVALID  : Invalid arguments
+ *  - HTTPD_SOCK_ERR_TIMEOUT  : Timeout/interrupted while calling socket send()
+ *  - HTTPD_SOCK_ERR_FAIL     : Unrecoverable error while calling socket send()
+ */
+int httpd_send(httpd_req_t *r, const char *buf, size_t buf_len);
+
+/**
+ * A low level API to send data on a given socket
+ *
+ * @note This API is not recommended to be used in any request handler.
+ * Use this only for advanced use cases, wherein some asynchronous
+ * data is to be sent over a socket.
+ *
+ * This internally calls the default send function, or the function registered by
+ * httpd_sess_set_send_override().
+ *
+ * @param[in] hd        server instance
+ * @param[in] sockfd    session socket file descriptor
+ * @param[in] buf       buffer with bytes to send
+ * @param[in] buf_len   data size
+ * @param[in] flags     flags for the send() function
+ * @return
+ *  - Bytes : The number of bytes sent successfully
+ *  - HTTPD_SOCK_ERR_INVALID  : Invalid arguments
+ *  - HTTPD_SOCK_ERR_TIMEOUT  : Timeout/interrupted while calling socket send()
+ *  - HTTPD_SOCK_ERR_FAIL     : Unrecoverable error while calling socket send()
+ */
+int httpd_socket_send(httpd_handle_t hd, int sockfd, const char *buf, size_t buf_len, int flags);
+
+/**
+ * A low level API to receive data from a given socket
+ *
+ * @note This API is not recommended to be used in any request handler.
+ * Use this only for advanced use cases, wherein some asynchronous
+ * communication is required.
+ *
+ * This internally calls the default recv function, or the function registered by
+ * httpd_sess_set_recv_override().
+ *
+ * @param[in] hd        server instance
+ * @param[in] sockfd    session socket file descriptor
+ * @param[in] buf       buffer with bytes to send
+ * @param[in] buf_len   data size
+ * @param[in] flags     flags for the send() function
+ * @return
+ *  - Bytes : The number of bytes received successfully
+ *  - 0     : Buffer length parameter is zero / connection closed by peer
+ *  - HTTPD_SOCK_ERR_INVALID  : Invalid arguments
+ *  - HTTPD_SOCK_ERR_TIMEOUT  : Timeout/interrupted while calling socket recv()
+ *  - HTTPD_SOCK_ERR_FAIL     : Unrecoverable error while calling socket recv()
+ */
+int httpd_socket_recv(httpd_handle_t hd, int sockfd, char *buf, size_t buf_len, int flags);
+
+/** End of Request / Response
+ * @}
+ */
+
+/* ************** Group: Session ************** */
+/** @name Session
+ * Functions for controlling sessions and accessing context data
+ * @{
+ */
+
+/**
+ * @brief   Get session context from socket descriptor
+ *
+ * Typically if a session context is created, it is available to URI handlers
+ * through the httpd_req_t structure. But, there are cases where the web
+ * server's send/receive functions may require the context (for example, for
+ * accessing keying information etc). Since the send/receive function only have
+ * the socket descriptor at their disposal, this API provides them with a way to
+ * retrieve the session context.
+ *
+ * @param[in] handle    Handle to server returned by httpd_start
+ * @param[in] sockfd    The socket descriptor for which the context should be extracted.
+ *
+ * @return
+ *  - void* : Pointer to the context associated with this session
+ *  - NULL  : Empty context / Invalid handle / Invalid socket fd
+ */
+void *httpd_sess_get_ctx(httpd_handle_t handle, int sockfd);
+
+/**
+ * @brief   Set session context by socket descriptor
+ *
+ * @param[in] handle    Handle to server returned by httpd_start
+ * @param[in] sockfd    The socket descriptor for which the context should be extracted.
+ * @param[in] ctx       Context object to assign to the session
+ * @param[in] free_fn   Function that should be called to free the context
+ */
+void httpd_sess_set_ctx(httpd_handle_t handle, int sockfd, void *ctx, httpd_free_ctx_fn_t free_fn);
+
+/**
+ * @brief   Get session 'transport' context by socket descriptor
+ * @see     httpd_sess_get_ctx()
+ *
+ * This context is used by the send/receive functions, for example to manage SSL context.
+ *
+ * @param[in] handle    Handle to server returned by httpd_start
+ * @param[in] sockfd    The socket descriptor for which the context should be extracted.
+ * @return
+ *  - void* : Pointer to the transport context associated with this session
+ *  - NULL  : Empty context / Invalid handle / Invalid socket fd
+ */
+void *httpd_sess_get_transport_ctx(httpd_handle_t handle, int sockfd);
+
+/**
+ * @brief   Set session 'transport' context by socket descriptor
+ * @see     httpd_sess_set_ctx()
+ *
+ * @param[in] handle    Handle to server returned by httpd_start
+ * @param[in] sockfd    The socket descriptor for which the context should be extracted.
+ * @param[in] ctx       Transport context object to assign to the session
+ * @param[in] free_fn   Function that should be called to free the transport context
+ */
+void httpd_sess_set_transport_ctx(httpd_handle_t handle, int sockfd, void *ctx, httpd_free_ctx_fn_t free_fn);
+
+/**
+ * @brief   Get HTTPD global user context (it was set in the server config struct)
+ *
+ * @param[in] handle    Handle to server returned by httpd_start
+ * @return global user context
+ */
+void *httpd_get_global_user_ctx(httpd_handle_t handle);
+
+/**
+ * @brief   Get HTTPD global transport context (it was set in the server config struct)
+ *
+ * @param[in] handle    Handle to server returned by httpd_start
+ * @return global transport context
+ */
+void *httpd_get_global_transport_ctx(httpd_handle_t handle);
+
+/**
+ * @brief   Trigger an httpd session close externally
+ *
+ * @note    Calling this API is only required in special circumstances wherein
+ *          some application requires to close an httpd client session asynchronously.
+ *
+ * @param[in] handle    Handle to server returned by httpd_start
+ * @param[in] sockfd    The socket descriptor of the session to be closed
+ *
+ * @return
+ *  - ESP_OK    : On successfully initiating closure
+ *  - ESP_FAIL  : Failure to queue work
+ *  - ESP_ERR_NOT_FOUND   : Socket fd not found
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ */
+esp_err_t httpd_sess_trigger_close(httpd_handle_t handle, int sockfd);
+
+/**
+ * @brief   Update LRU counter for a given socket
+ *
+ * LRU Counters are internally associated with each session to monitor
+ * how recently a session exchanged traffic. When LRU purge is enabled,
+ * if a client is requesting for connection but maximum number of
+ * sockets/sessions is reached, then the session having the earliest
+ * LRU counter is closed automatically.
+ *
+ * Updating the LRU counter manually prevents the socket from being purged
+ * due to the Least Recently Used (LRU) logic, even though it might not
+ * have received traffic for some time. This is useful when all open
+ * sockets/session are frequently exchanging traffic but the user specifically
+ * wants one of the sessions to be kept open, irrespective of when it last
+ * exchanged a packet.
+ *
+ * @note    Calling this API is only necessary if the LRU Purge Enable option
+ *          is enabled.
+ *
+ * @param[in] handle    Handle to server returned by httpd_start
+ * @param[in] sockfd    The socket descriptor of the session for which LRU counter
+ *                      is to be updated
+ *
+ * @return
+ *  - ESP_OK : Socket found and LRU counter updated
+ *  - ESP_ERR_NOT_FOUND   : Socket not found
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ */
+esp_err_t httpd_sess_update_lru_counter(httpd_handle_t handle, int sockfd);
+
+/**
+ * @brief   Returns list of current socket descriptors of active sessions
+ *
+ * @param[in] handle    Handle to server returned by httpd_start
+ * @param[in,out] fds   In: Size of provided client_fds array
+ *                      Out: Number of valid client fds returned in client_fds,
+ * @param[out] client_fds  Array of client fds
+ *
+ * @note Size of provided array has to be equal or greater then maximum number of opened
+ *       sockets, configured upon initialization with max_open_sockets field in
+ *       httpd_config_t structure.
+ *
+ * @return
+ *  - ESP_OK              : Successfully retrieved session list
+ *  - ESP_ERR_INVALID_ARG : Wrong arguments or list is longer than provided array
+ */
+esp_err_t httpd_get_client_list(httpd_handle_t handle, size_t *fds, int *client_fds);
+
+/** End of Session
+ * @}
+ */
+
+/* ************** Group: Work Queue ************** */
+/** @name Work Queue
+ * APIs related to the HTTPD Work Queue
+ * @{
+ */
+
+/**
+ * @brief   Prototype of the HTTPD work function
+ *          Please refer to httpd_queue_work() for more details.
+ * @param[in] arg   The arguments for this work function
+ */
+typedef void (*httpd_work_fn_t)(void *arg);
+
+/**
+ * @brief   Queue execution of a function in HTTPD's context
+ *
+ * This API queues a work function for asynchronous execution
+ *
+ * @note    Some protocols require that the web server generate some asynchronous data
+ *          and send it to the persistently opened connection. This facility is for use
+ *          by such protocols.
+ *
+ * @param[in] handle    Handle to server returned by httpd_start
+ * @param[in] work      Pointer to the function to be executed in the HTTPD's context
+ * @param[in] arg       Pointer to the arguments that should be passed to this function
+ *
+ * @return
+ *  - ESP_OK   : On successfully queueing the work
+ *  - ESP_FAIL : Failure in ctrl socket
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ */
+esp_err_t httpd_queue_work(httpd_handle_t handle, httpd_work_fn_t work, void *arg);
+
+/** End of Group Work Queue
+ * @}
+ */
+
+/* ************** Group: WebSocket ************** */
+/** @name WebSocket
+ * Functions and structs for WebSocket server
+ * @{
+ */
+#ifdef CONFIG_HTTPD_WS_SUPPORT
+/**
+ * @brief Enum for WebSocket packet types (Opcode in the header)
+ * @note Please refer to RFC6455 Section 5.4 for more details
+ */
+typedef enum {
+    HTTPD_WS_TYPE_CONTINUE   = 0x0,
+    HTTPD_WS_TYPE_TEXT       = 0x1,
+    HTTPD_WS_TYPE_BINARY     = 0x2,
+    HTTPD_WS_TYPE_CLOSE      = 0x8,
+    HTTPD_WS_TYPE_PING       = 0x9,
+    HTTPD_WS_TYPE_PONG       = 0xA
+} httpd_ws_type_t;
+
+/**
+ * @brief Enum for client info description
+ */
+typedef enum {
+    HTTPD_WS_CLIENT_INVALID        = 0x0,
+    HTTPD_WS_CLIENT_HTTP           = 0x1,
+    HTTPD_WS_CLIENT_WEBSOCKET      = 0x2,
+} httpd_ws_client_info_t;
+
+/**
+ * @brief WebSocket frame format
+ */
+typedef struct httpd_ws_frame {
+    bool final;                 /*!< Final frame:
+                                     For received frames this field indicates whether the `FIN` flag was set.
+                                     For frames to be transmitted, this field is only used if the `fragmented`
+                                         option is set as well. If `fragmented` is false, the `FIN` flag is set
+                                         by default, marking the ws_frame as a complete/unfragmented message
+                                         (esp_http_server doesn't automatically fragment messages) */
+    bool fragmented;            /*!< Indication that the frame allocated for transmission is a message fragment,
+                                     so the `FIN` flag is set manually according to the `final` option.
+                                     This flag is never set for received messages */
+    httpd_ws_type_t type;       /*!< WebSocket frame type */
+    uint8_t *payload;           /*!< Pre-allocated data buffer */
+    size_t len;                 /*!< Length of the WebSocket data */
+} httpd_ws_frame_t;
+
+/**
+ * @brief Transfer complete callback
+ */
+typedef void (*transfer_complete_cb)(esp_err_t err, int socket, void *arg);
+
+/**
+ * @brief Receive and parse a WebSocket frame
+ *
+ * @note    Calling httpd_ws_recv_frame() with max_len as 0 will give actual frame size in pkt->len.
+ *          The user can dynamically allocate space for pkt->payload as per this length and call httpd_ws_recv_frame() again to get the actual data.
+ *          Please refer to the corresponding example for usage.
+ *
+ * @param[in]   req         Current request
+ * @param[out]  pkt         WebSocket packet
+ * @param[in]   max_len     Maximum length for receive
+ * @return
+ *  - ESP_OK                    : On successful
+ *  - ESP_FAIL                  : Socket errors occurs
+ *  - ESP_ERR_INVALID_STATE     : Handshake was already done beforehand
+ *  - ESP_ERR_INVALID_ARG       : Argument is invalid (null or non-WebSocket)
+ */
+esp_err_t httpd_ws_recv_frame(httpd_req_t *req, httpd_ws_frame_t *pkt, size_t max_len);
+
+/**
+ * @brief Construct and send a WebSocket frame
+ * @param[in]   req     Current request
+ * @param[in]   pkt     WebSocket frame
+ * @return
+ *  - ESP_OK                    : On successful
+ *  - ESP_FAIL                  : When socket errors occurs
+ *  - ESP_ERR_INVALID_STATE     : Handshake was already done beforehand
+ *  - ESP_ERR_INVALID_ARG       : Argument is invalid (null or non-WebSocket)
+ */
+esp_err_t httpd_ws_send_frame(httpd_req_t *req, httpd_ws_frame_t *pkt);
+
+/**
+ * @brief Low level send of a WebSocket frame out of the scope of current request
+ * using internally configured httpd send function
+ *
+ * This API should rarely be called directly, with an exception of asynchronous send using httpd_queue_work.
+ *
+ * @param[in] hd      Server instance data
+ * @param[in] fd      Socket descriptor for sending data
+ * @param[in] frame     WebSocket frame
+ * @return
+ *  - ESP_OK                    : On successful
+ *  - ESP_FAIL                  : When socket errors occurs
+ *  - ESP_ERR_INVALID_STATE     : Handshake was already done beforehand
+ *  - ESP_ERR_INVALID_ARG       : Argument is invalid (null or non-WebSocket)
+ */
+esp_err_t httpd_ws_send_frame_async(httpd_handle_t hd, int fd, httpd_ws_frame_t *frame);
+
+/**
+ * @brief Checks the supplied socket descriptor if it belongs to any active client
+ * of this server instance and if the websoket protocol is active
+ *
+ * @param[in] hd      Server instance data
+ * @param[in] fd      Socket descriptor
+ * @return
+ *  - HTTPD_WS_CLIENT_INVALID   : This fd is not a client of this httpd
+ *  - HTTPD_WS_CLIENT_HTTP      : This fd is an active client, protocol is not WS
+ *  - HTTPD_WS_CLIENT_WEBSOCKET : This fd is an active client, protocol is WS
+ */
+httpd_ws_client_info_t httpd_ws_get_fd_info(httpd_handle_t hd, int fd);
+
+/**
+ * @brief Sends data to to specified websocket synchronously
+ *
+ * @param[in] handle  Server instance data
+ * @param[in] socket  Socket descriptor
+ * @param[in] frame   Websocket frame
+ * @return
+ *  - ESP_OK                    : On successful
+ *  - ESP_FAIL                  : When socket errors occurs
+ *  - ESP_ERR_NO_MEM            : Unable to allocate memory
+ */
+esp_err_t httpd_ws_send_data(httpd_handle_t handle, int socket, httpd_ws_frame_t *frame);
+
+/**
+ * @brief Sends data to to specified websocket asynchronously
+ *
+ * @param[in] handle    Server instance data
+ * @param[in] socket    Socket descriptor
+ * @param[in] frame     Websocket frame
+ * @param[in] callback  Callback invoked after sending data
+ * @param[in] arg       User data passed to provided callback
+ * @return
+ *  - ESP_OK                    : On successful
+ *  - ESP_FAIL                  : When socket errors occurs
+ *  - ESP_ERR_NO_MEM            : Unable to allocate memory
+ */
+esp_err_t httpd_ws_send_data_async(httpd_handle_t handle, int socket, httpd_ws_frame_t *frame,
+                                   transfer_complete_cb callback, void *arg);
+
+#endif /* CONFIG_HTTPD_WS_SUPPORT */
+/** End of WebSocket related stuff
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! _ESP_HTTP_SERVER_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_http_server/include/http_server.h b/tools/sdk/esp32s3/include/esp_http_server/include/http_server.h
new file mode 100644
index 00000000000..e28eb0af68d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_http_server/include/http_server.h
@@ -0,0 +1,7 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#warning http_server.h has been renamed to esp_http_server.h, please update include directives
+#include "esp_http_server.h"
diff --git a/tools/sdk/esp32s3/include/esp_https_ota/include/esp_https_ota.h b/tools/sdk/esp32s3/include/esp_https_ota/include/esp_https_ota.h
new file mode 100644
index 00000000000..a87ba8df0ac
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_https_ota/include/esp_https_ota.h
@@ -0,0 +1,221 @@
+// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <esp_http_client.h>
+#include <bootloader_common.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void *esp_https_ota_handle_t;
+typedef esp_err_t(*http_client_init_cb_t)(esp_http_client_handle_t);
+
+/**
+ * @brief ESP HTTPS OTA configuration
+ */
+typedef struct {
+    const esp_http_client_config_t *http_config;   /*!< ESP HTTP client configuration */
+    http_client_init_cb_t http_client_init_cb;     /*!< Callback after ESP HTTP client is initialised */
+    bool bulk_flash_erase;                         /*!< Erase entire flash partition during initialization. By default flash partition is erased during write operation and in chunk of 4K sector size */
+    bool partial_http_download;                    /*!< Enable Firmware image to be downloaded over multiple HTTP requests */
+    int max_http_request_size;                     /*!< Maximum request size for partial HTTP download */
+} esp_https_ota_config_t;
+
+#define ESP_ERR_HTTPS_OTA_BASE            (0x9000)
+#define ESP_ERR_HTTPS_OTA_IN_PROGRESS     (ESP_ERR_HTTPS_OTA_BASE + 1)  /* OTA operation in progress */
+
+/**
+ * @brief    HTTPS OTA Firmware upgrade.
+ *
+ * This function allocates HTTPS OTA Firmware upgrade context, establishes HTTPS connection,
+ * reads image data from HTTP stream and writes it to OTA partition and
+ * finishes HTTPS OTA Firmware upgrade operation.
+ * This API supports URL redirection, but if CA cert of URLs differ then it
+ * should be appended to `cert_pem` member of `config`.
+ *
+ * @param[in]  config       pointer to esp_http_client_config_t structure.
+ *
+ * @note     This API handles the entire OTA operation, so if this API is being used
+ *           then no other APIs from `esp_https_ota` component should be called.
+ *           If more information and control is needed during the HTTPS OTA process,
+ *           then one can use `esp_https_ota_begin` and subsequent APIs. If this API returns
+ *           successfully, esp_restart() must be called to boot from the new firmware image.
+ *
+ * @return
+ *    - ESP_OK: OTA data updated, next reboot will use specified partition.
+ *    - ESP_FAIL: For generic failure.
+ *    - ESP_ERR_INVALID_ARG: Invalid argument
+ *    - ESP_ERR_OTA_VALIDATE_FAILED: Invalid app image
+ *    - ESP_ERR_NO_MEM: Cannot allocate memory for OTA operation.
+ *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
+ *    - For other return codes, refer OTA documentation in esp-idf's app_update component.
+ */
+esp_err_t esp_https_ota(const esp_http_client_config_t *config);
+
+/**
+ * @brief    Start HTTPS OTA Firmware upgrade
+ *
+ * This function initializes ESP HTTPS OTA context and establishes HTTPS connection.
+ * This function must be invoked first. If this function returns successfully, then `esp_https_ota_perform` should be
+ * called to continue with the OTA process and there should be a call to `esp_https_ota_finish` on
+ * completion of OTA operation or on failure in subsequent operations.
+ * This API supports URL redirection, but if CA cert of URLs differ then it
+ * should be appended to `cert_pem` member of `http_config`, which is a part of `ota_config`.
+ * In case of error, this API explicitly sets `handle` to NULL.
+ *
+ * @param[in]   ota_config       pointer to esp_https_ota_config_t structure
+ * @param[out]  handle           pointer to an allocated data of type `esp_https_ota_handle_t`
+ *                               which will be initialised in this function
+ *
+ * @note     This API is blocking, so setting `is_async` member of `http_config` structure will
+ *           result in an error.
+ *
+ * @return
+ *    - ESP_OK: HTTPS OTA Firmware upgrade context initialised and HTTPS connection established
+ *    - ESP_FAIL: For generic failure.
+ *    - ESP_ERR_INVALID_ARG: Invalid argument (missing/incorrect config, certificate, etc.)
+ *    - For other return codes, refer documentation in app_update component and esp_http_client
+ *      component in esp-idf.
+ */
+esp_err_t esp_https_ota_begin(esp_https_ota_config_t *ota_config, esp_https_ota_handle_t *handle);
+
+/**
+ * @brief    Read image data from HTTP stream and write it to OTA partition
+ *
+ * This function reads image data from HTTP stream and writes it to OTA partition. This function
+ * must be called only if esp_https_ota_begin() returns successfully.
+ * This function must be called in a loop since it returns after every HTTP read operation thus
+ * giving you the flexibility to stop OTA operation midway.
+ *
+ * @param[in]  https_ota_handle  pointer to esp_https_ota_handle_t structure
+ *
+ * @return
+ *    - ESP_ERR_HTTPS_OTA_IN_PROGRESS: OTA update is in progress, call this API again to continue.
+ *    - ESP_OK: OTA update was successful
+ *    - ESP_FAIL: OTA update failed
+ *    - ESP_ERR_INVALID_ARG: Invalid argument
+ *    - ESP_ERR_OTA_VALIDATE_FAILED: Invalid app image
+ *    - ESP_ERR_NO_MEM: Cannot allocate memory for OTA operation.
+ *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
+ *    - For other return codes, refer OTA documentation in esp-idf's app_update component.
+ */
+esp_err_t esp_https_ota_perform(esp_https_ota_handle_t https_ota_handle);
+
+/**
+ * @brief   Checks if complete data was received or not
+ *
+ * @note    This API can be called just before esp_https_ota_finish() to validate if the complete image was indeed received.
+ *
+ * @param[in]   https_ota_handle pointer to esp_https_ota_handle_t structure
+ *
+ * @return
+ *    - false
+ *    - true
+ */
+bool esp_https_ota_is_complete_data_received(esp_https_ota_handle_t https_ota_handle);
+
+/**
+ * @brief    Clean-up HTTPS OTA Firmware upgrade and close HTTPS connection
+ *
+ * This function closes the HTTP connection and frees the ESP HTTPS OTA context.
+ * This function switches the boot partition to the OTA partition containing the
+ * new firmware image.
+ *
+ * @note     If this API returns successfully, esp_restart() must be called to
+ *           boot from the new firmware image
+ *           esp_https_ota_finish should not be called after calling esp_https_ota_abort
+ *
+ * @param[in]  https_ota_handle   pointer to esp_https_ota_handle_t structure
+ *
+ * @return
+ *    - ESP_OK: Clean-up successful
+ *    - ESP_ERR_INVALID_STATE
+ *    - ESP_ERR_INVALID_ARG: Invalid argument
+ *    - ESP_ERR_OTA_VALIDATE_FAILED: Invalid app image
+ */
+esp_err_t esp_https_ota_finish(esp_https_ota_handle_t https_ota_handle);
+
+
+/**
+ * @brief Clean-up HTTPS OTA Firmware upgrade and close HTTPS connection
+ *
+ * This function closes the HTTP connection and frees the ESP HTTPS OTA context.
+ *
+ * @note     esp_https_ota_abort should not be called after calling esp_https_ota_finish
+ *
+ * @param[in]  https_ota_handle   pointer to esp_https_ota_handle_t structure
+ *
+ * @return
+ *    - ESP_OK: Clean-up successful
+ *    - ESP_ERR_INVALID_STATE: Invalid ESP HTTPS OTA state
+ *    - ESP_FAIL: OTA not started
+ *    - ESP_ERR_NOT_FOUND: OTA handle not found
+ *    - ESP_ERR_INVALID_ARG: Invalid argument
+ */
+esp_err_t esp_https_ota_abort(esp_https_ota_handle_t https_ota_handle);
+
+
+/**
+ * @brief   Reads app description from image header. The app description provides information
+ *          like the "Firmware version" of the image.
+ *
+ * @note    This API can be called only after esp_https_ota_begin() and before esp_https_ota_perform().
+ *          Calling this API is not mandatory.
+ *
+ * @param[in]   https_ota_handle   pointer to esp_https_ota_handle_t structure
+ * @param[out]  new_app_info       pointer to an allocated esp_app_desc_t structure
+ *
+ * @return
+ *    - ESP_ERR_INVALID_ARG: Invalid arguments
+ *    - ESP_FAIL: Failed to read image descriptor
+ *    - ESP_OK: Successfully read image descriptor
+ */
+esp_err_t esp_https_ota_get_img_desc(esp_https_ota_handle_t https_ota_handle, esp_app_desc_t *new_app_info);
+
+
+/**
+* @brief  This function returns OTA image data read so far.
+*
+* @note   This API should be called only if `esp_https_ota_perform()` has been called atleast once or
+*         if `esp_https_ota_get_img_desc` has been called before.
+*
+* @param[in]   https_ota_handle   pointer to esp_https_ota_handle_t structure
+*
+* @return
+*    - -1    On failure
+*    - total bytes read so far
+*/
+int esp_https_ota_get_image_len_read(esp_https_ota_handle_t https_ota_handle);
+
+
+/**
+* @brief  This function returns OTA image total size.
+*
+* @note   This API should be called after esp_https_ota_begin() has been already called.
+*         This can be used to create some sort of progress indication
+*         (in combination with esp_https_ota_get_image_len_read())
+*
+* @param[in]   https_ota_handle   pointer to esp_https_ota_handle_t structure
+*
+* @return
+*    - -1    On failure or chunked encoding
+*    - total bytes of image
+*/
+int esp_https_ota_get_image_size(esp_https_ota_handle_t https_ota_handle);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_https_server/include/esp_https_server.h b/tools/sdk/esp32s3/include/esp_https_server/include/esp_https_server.h
new file mode 100644
index 00000000000..efe726e9e70
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_https_server/include/esp_https_server.h
@@ -0,0 +1,160 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_HTTPS_SERVER_H_
+#define _ESP_HTTPS_SERVER_H_
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_http_server.h"
+#include "esp_tls.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    HTTPD_SSL_TRANSPORT_SECURE,      // SSL Enabled
+    HTTPD_SSL_TRANSPORT_INSECURE     // SSL disabled
+} httpd_ssl_transport_mode_t;
+
+/**
+ * @brief Callback data struct, contains the ESP-TLS connection handle
+ */
+typedef struct esp_https_server_user_cb_arg {
+    const esp_tls_t *tls;
+} esp_https_server_user_cb_arg_t;
+
+/**
+ * @brief Callback function prototype
+ * Can be used to get connection or client information (SSL context)
+ * E.g. Client certificate, Socket FD, Connection state, etc.
+ *
+ * @param user_cb Callback data struct
+ */
+typedef void esp_https_server_user_cb(esp_https_server_user_cb_arg_t *user_cb);
+
+/**
+ * HTTPS server config struct
+ *
+ * Please use HTTPD_SSL_CONFIG_DEFAULT() to initialize it.
+ */
+struct httpd_ssl_config {
+    /**
+     * Underlying HTTPD server config
+     *
+     * Parameters like task stack size and priority can be adjusted here.
+     */
+    httpd_config_t httpd;
+
+    /** CA certificate (here it is treated as server cert)
+     * Todo: Fix this change in release/v5.0 as it would be a breaking change
+     * i.e. Rename the nomenclature of variables holding different certs in https_server component as well as example
+     * 1)The cacert variable should hold the CA which is used to authenticate clients (should inherit current role of client_verify_cert_pem var)
+     * 2)There should be another variable servercert which whould hold servers own certificate (should inherit current role of cacert var) */
+    const uint8_t *cacert_pem;
+
+    /** CA certificate byte length */
+    size_t cacert_len;
+
+    /** Client verify authority certificate (CA used to sign clients, or client cert itself */
+    const uint8_t *client_verify_cert_pem;
+
+    /** Client verify authority cert len */
+    size_t client_verify_cert_len;
+
+    /** Private key */
+    const uint8_t *prvtkey_pem;
+
+    /** Private key byte length */
+    size_t prvtkey_len;
+
+    /** Transport Mode (default secure) */
+    httpd_ssl_transport_mode_t transport_mode;
+
+    /** Port used when transport mode is secure (default 443) */
+    uint16_t port_secure;
+
+    /** Port used when transport mode is insecure (default 80) */
+    uint16_t port_insecure;
+
+    /** Enable tls session tickets */
+    bool session_tickets;
+
+    /** User callback for esp_https_server */
+    esp_https_server_user_cb *user_cb;
+};
+
+typedef struct httpd_ssl_config httpd_ssl_config_t;
+
+/**
+ * Default config struct init
+ *
+ * (http_server default config had to be copied for customization)
+ *
+ * Notes:
+ * - port is set when starting the server, according to 'transport_mode'
+ * - one socket uses ~ 40kB RAM with SSL, we reduce the default socket count to 4
+ * - SSL sockets are usually long-lived, closing LRU prevents pool exhaustion DOS
+ * - Stack size may need adjustments depending on the user application
+ */
+#define HTTPD_SSL_CONFIG_DEFAULT() {              \
+    .httpd = {                                    \
+        .task_priority      = tskIDLE_PRIORITY+5, \
+        .stack_size         = 10240,              \
+        .core_id            = tskNO_AFFINITY,     \
+        .server_port        = 0,                  \
+        .ctrl_port          = 32768,              \
+        .max_open_sockets   = 4,                  \
+        .max_uri_handlers   = 8,                  \
+        .max_resp_headers   = 8,                  \
+        .backlog_conn       = 5,                  \
+        .lru_purge_enable   = true,               \
+        .recv_wait_timeout  = 5,                  \
+        .send_wait_timeout  = 5,                  \
+        .global_user_ctx = NULL,                  \
+        .global_user_ctx_free_fn = NULL,          \
+        .global_transport_ctx = NULL,             \
+        .global_transport_ctx_free_fn = NULL,     \
+        .open_fn = NULL,                          \
+        .close_fn = NULL,                         \
+        .uri_match_fn = NULL                      \
+    },                                            \
+    .cacert_pem = NULL,                           \
+    .cacert_len = 0,                              \
+    .client_verify_cert_pem = NULL,               \
+    .client_verify_cert_len = 0,                  \
+    .prvtkey_pem = NULL,                          \
+    .prvtkey_len = 0,                             \
+    .transport_mode = HTTPD_SSL_TRANSPORT_SECURE, \
+    .port_secure = 443,                           \
+    .port_insecure = 80,                          \
+    .session_tickets = false,                     \
+    .user_cb = NULL,                              \
+}
+
+/**
+ * Create a SSL capable HTTP server (secure mode may be disabled in config)
+ *
+ * @param[in,out] config - server config, must not be const. Does not have to stay valid after
+ *                         calling this function.
+ * @param[out] handle - storage for the server handle, must be a valid pointer
+ * @return success
+ */
+esp_err_t httpd_ssl_start(httpd_handle_t *handle, httpd_ssl_config_t *config);
+
+/**
+ * Stop the server. Blocks until the server is shut down.
+ *
+ * @param[in] handle
+ */
+void httpd_ssl_stop(httpd_handle_t handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_HTTPS_SERVER_H_
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_async_memcpy.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_async_memcpy.h
new file mode 100644
index 00000000000..c45c61b2d15
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_async_memcpy.h
@@ -0,0 +1,111 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+/**
+ * @brief Type of async memcpy handle
+ *
+ */
+typedef struct async_memcpy_context_t *async_memcpy_t;
+
+/**
+ * @brief Type of async memcpy event object
+ *
+ */
+typedef struct {
+    void *data; /*!< Event data */
+} async_memcpy_event_t;
+
+/**
+ * @brief Type of async memcpy interrupt callback function
+ *
+ * @param mcp_hdl Handle of async memcpy
+ * @param event Event object, which contains related data, reserved for future
+ * @param cb_args User defined arguments, passed from esp_async_memcpy function
+ * @return Whether a high priority task is woken up by the callback function
+ *
+ * @note User can call OS primitives (semaphore, mutex, etc) in the callback function.
+ *       Keep in mind, if any OS primitive wakes high priority task up, the callback should return true.
+ */
+typedef bool (*async_memcpy_isr_cb_t)(async_memcpy_t mcp_hdl, async_memcpy_event_t *event, void *cb_args);
+
+/**
+ * @brief Type of async memcpy configuration
+ *
+ */
+typedef struct {
+    uint32_t backlog;          /*!< Maximum number of streams that can be handled simultaneously */
+    size_t sram_trans_align;   /*!< DMA transfer alignment (both in size and address) for SRAM memory */
+    size_t psram_trans_align;  /*!< DMA transfer alignment (both in size and address) for PSRAM memory */
+    uint32_t flags;            /*!< Extra flags to control async memcpy feature */
+} async_memcpy_config_t;
+
+/**
+ * @brief Default configuration for async memcpy
+ *
+ */
+#define ASYNC_MEMCPY_DEFAULT_CONFIG() \
+    {                                 \
+        .backlog = 8,                 \
+        .sram_trans_align = 0,        \
+        .psram_trans_align = 0,       \
+        .flags = 0,                   \
+    }
+
+/**
+ * @brief Install async memcpy driver
+ *
+ * @param[in] config Configuration of async memcpy
+ * @param[out] asmcp Handle of async memcpy that returned from this API. If driver installation is failed, asmcp would be assigned to NULL.
+ * @return
+ *      - ESP_OK: Install async memcpy driver successfully
+ *      - ESP_ERR_INVALID_ARG: Install async memcpy driver failed because of invalid argument
+ *      - ESP_ERR_NO_MEM: Install async memcpy driver failed because out of memory
+ *      - ESP_FAIL: Install async memcpy driver failed because of other error
+ */
+esp_err_t esp_async_memcpy_install(const async_memcpy_config_t *config, async_memcpy_t *asmcp);
+
+/**
+ * @brief Uninstall async memcpy driver
+ *
+ * @param[in] asmcp Handle of async memcpy driver that returned from esp_async_memcpy_install
+ * @return
+ *      - ESP_OK: Uninstall async memcpy driver successfully
+ *      - ESP_ERR_INVALID_ARG: Uninstall async memcpy driver failed because of invalid argument
+ *      - ESP_FAIL: Uninstall async memcpy driver failed because of other error
+ */
+esp_err_t esp_async_memcpy_uninstall(async_memcpy_t asmcp);
+
+/**
+ * @brief Send an asynchronous memory copy request
+ *
+ * @param[in] asmcp Handle of async memcpy driver that returned from esp_async_memcpy_install
+ * @param[in] dst Destination address (copy to)
+ * @param[in] src Source address (copy from)
+ * @param[in] n Number of bytes to copy
+ * @param[in] cb_isr Callback function, which got invoked in interrupt context. Set to NULL can bypass the callback.
+ * @param[in] cb_args User defined argument to be passed to the callback function
+ * @return
+ *      - ESP_OK: Send memory copy request successfully
+ *      - ESP_ERR_INVALID_ARG: Send memory copy request failed because of invalid argument
+ *      - ESP_FAIL: Send memory copy request failed because of other error
+ *
+ * @note The callback function is invoked in interrupt context, never do blocking jobs in the callback.
+ */
+esp_err_t esp_async_memcpy(async_memcpy_t asmcp, void *dst, void *src, size_t n, async_memcpy_isr_cb_t cb_isr, void *cb_args);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_chip_info.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_chip_info.h
new file mode 100644
index 00000000000..0b081d37e1b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_chip_info.h
@@ -0,0 +1,67 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "sdkconfig.h"
+#include "esp_bit_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @brief Chip models
+ */
+typedef enum {
+    CHIP_ESP32  = 1, //!< ESP32
+    CHIP_ESP32S2 = 2, //!< ESP32-S2
+    CHIP_ESP32S3 = 9, //!< ESP32-S3
+    CHIP_ESP32C3 = 5, //!< ESP32-C3
+    CHIP_ESP32H2 = 6, //!< ESP32-H2
+} esp_chip_model_t;
+
+/* Chip feature flags, used in esp_chip_info_t */
+#define CHIP_FEATURE_EMB_FLASH      BIT(0)      //!< Chip has embedded flash memory
+#define CHIP_FEATURE_WIFI_BGN       BIT(1)      //!< Chip has 2.4GHz WiFi
+#define CHIP_FEATURE_BLE            BIT(4)      //!< Chip has Bluetooth LE
+#define CHIP_FEATURE_BT             BIT(5)      //!< Chip has Bluetooth Classic
+#define CHIP_FEATURE_IEEE802154     BIT(6)      //!< Chip has IEEE 802.15.4
+#define CHIP_FEATURE_EMB_PSRAM      BIT(7)      //!< Chip has embedded psram
+
+/**
+ * @brief The structure represents information about the chip
+ */
+typedef struct {
+    esp_chip_model_t model;  //!< chip model, one of esp_chip_model_t
+    uint32_t features;       //!< bit mask of CHIP_FEATURE_x feature flags
+    uint8_t cores;           //!< number of CPU cores
+    uint8_t revision;        //!< chip revision number
+} esp_chip_info_t;
+
+/**
+ * @brief Fill an esp_chip_info_t structure with information about the chip
+ * @param[out] out_info structure to be filled
+ */
+void esp_chip_info(esp_chip_info_t* out_info);
+
+#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
+/**
+ * @brief Cache lock bug exists or not
+ *
+ * @return
+ *          - ture : bug exists
+ *          - false : bug not exists
+ */
+bool soc_has_cache_lock_bug(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_clk.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_clk.h
new file mode 100644
index 00000000000..920f310c920
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_clk.h
@@ -0,0 +1,2 @@
+#warning esp_clk.h has been replaced by esp32/clk.h, please include esp32/clk.h instead
+#include "esp32/clk.h"
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_cpu.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_cpu.h
new file mode 100644
index 00000000000..2a810aba440
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_cpu.h
@@ -0,0 +1,101 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_CPU_H
+#define _ESP_CPU_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+
+#include "hal/cpu_hal.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_WATCHPOINT_LOAD 0x40000000
+#define ESP_WATCHPOINT_STORE 0x80000000
+#define ESP_WATCHPOINT_ACCESS 0xC0000000
+
+typedef uint32_t esp_cpu_ccount_t;
+
+/** @brief Read current stack pointer address
+ *
+ */
+static inline void *esp_cpu_get_sp(void)
+{
+    return cpu_hal_get_sp();
+}
+
+/**
+ * @brief Stall CPU using RTC controller
+ * @param cpu_id ID of the CPU to stall (0 = PRO, 1 = APP)
+ */
+void esp_cpu_stall(int cpu_id);
+
+/**
+ * @brief Un-stall CPU using RTC controller
+ * @param cpu_id ID of the CPU to un-stall (0 = PRO, 1 = APP)
+ */
+void esp_cpu_unstall(int cpu_id);
+
+/**
+ * @brief Reset CPU using RTC controller
+ * @param cpu_id ID of the CPU to reset (0 = PRO, 1 = APP)
+ */
+void esp_cpu_reset(int cpu_id);
+
+/**
+ * @brief Returns true if a JTAG debugger is attached to CPU
+ * OCD (on chip debug) port.
+ *
+ * @note If "Make exception and panic handlers JTAG/OCD aware"
+ * is disabled, this function always returns false.
+ */
+bool esp_cpu_in_ocd_debug_mode(void);
+
+static inline esp_cpu_ccount_t esp_cpu_get_ccount(void)
+{
+    return cpu_hal_get_cycle_count();
+}
+
+static inline void esp_cpu_set_ccount(esp_cpu_ccount_t val)
+{
+    cpu_hal_set_cycle_count(val);
+}
+
+/**
+ * @brief Set a watchpoint to break/panic when a certain memory range is accessed.
+ *
+ * @param no Watchpoint number. On the ESP32, this can be 0 or 1.
+ * @param adr Base address to watch
+ * @param size Size of the region, starting at the base address, to watch. Must
+ *             be one of 2^n, with n in [0..6].
+ * @param flags One of ESP_WATCHPOINT_* flags
+ *
+ * @return ESP_ERR_INVALID_ARG on invalid arg, ESP_OK otherwise
+ *
+ * @warning The ESP32 watchpoint hardware watches a region of bytes by effectively
+ *          masking away the lower n bits for a region with size 2^n. If adr does
+ *          not have zero for these lower n bits, you may not be watching the
+ *          region you intended.
+ */
+esp_err_t esp_cpu_set_watchpoint(int no, void *adr, int size, int flags);
+
+/**
+ * @brief Clear a watchpoint
+ *
+ * @param no Watchpoint to clear
+ *
+ */
+void esp_cpu_clear_watchpoint(int no);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_CPU_H
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_crc.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_crc.h
new file mode 100644
index 00000000000..f12dcf767dd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_crc.h
@@ -0,0 +1,97 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+// This header is only a wrapper on ROM CRC API
+#include "esp_rom_crc.h"
+
+/**
+* @brief CRC32 value in little endian.
+*
+* @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+* @param buf: Data buffer that used to calculate the CRC value
+* @param len: Length of the data buffer
+* @return CRC32 value
+*/
+static inline uint32_t esp_crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len)
+{
+    return esp_rom_crc32_le(crc, buf, len);
+}
+
+/**
+* @brief CRC32 value in big endian.
+*
+* @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+* @param buf: Data buffer that used to calculate the CRC value
+* @param len: Length of the data buffer
+* @return CRC32 value
+*/
+static inline uint32_t esp_crc32_be(uint32_t crc, uint8_t const *buf, uint32_t len)
+{
+    return esp_rom_crc32_be(crc, buf, len);
+}
+
+/**
+* @brief CRC16 value in little endian.
+*
+* @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+* @param buf: Data buffer that used to calculate the CRC value
+* @param len: Length of the data buffer
+* @return CRC16 value
+*/
+static inline uint16_t esp_crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len)
+{
+    return esp_rom_crc16_le(crc, buf, len);
+}
+
+/**
+* @brief CRC16 value in big endian.
+*
+* @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+* @param buf: Data buffer that used to calculate the CRC value
+* @param len: Length of the data buffer
+* @return CRC16 value
+*/
+static inline uint16_t esp_crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len)
+{
+    return esp_rom_crc16_be(crc, buf, len);
+}
+
+/**
+* @brief CRC8 value in little endian.
+*
+* @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+* @param buf: Data buffer that used to calculate the CRC value
+* @param len: Length of the data buffer
+* @return CRC8 value
+*/
+static inline uint8_t esp_crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len)
+{
+    return esp_rom_crc8_le(crc, buf, len);
+}
+
+/**
+* @brief CRC8 value in big endian.
+*
+* @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+* @param buf: Data buffer that used to calculate the CRC value
+* @param len: Length of the data buffer
+* @return CRC8 value
+*/
+static inline uint8_t esp_crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len)
+{
+    return esp_rom_crc8_be(crc, buf, len);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_fault.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_fault.h
new file mode 100644
index 00000000000..910ba59d06c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_fault.h
@@ -0,0 +1,91 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include "sdkconfig.h"
+#include "soc/rtc_cntl_reg.h"
+#include "esp_rom_sys.h"
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Assert a condition is true, in a way that should be resistant to fault injection for
+ * single fault attacks.
+ *
+ * - Expands CONDITION multiple times (condition must have no side effects)
+ * - Compiler is told all registers are invalid before evaluating CONDITION each time, to avoid a fault
+ *   causing a misread of a register used in all three evaluations of CONDITION.
+ * - If CONDITION is ever false, a system reset is triggered.
+ *
+ * @note Place this macro after a "normal" check of CONDITION that will fail with a normal error
+ * message. This is the fallback in case a fault injection attack skips or corrupts the result of
+ * that check. (Although ensure that an attacker can't use fault injection to skip past the "normal"
+ * error message, to avoid this check entirely.)
+ *
+ * @note This macro increases binary size and is slow and should be used sparingly.
+ *
+ * @note This macro does not guarantee fault injection resistance. In particular CONDITION must be
+ * chosen carefully - a fault injection attack which sets CONDITION to true will not be detected by
+ * this macro. Care must also be taken that an attacker can't use a fault to completely bypass calling
+ * whatever function tests ESP_FAULT_ASSERT.
+ *
+ * @note This is difficult to debug as a failure triggers an instant software reset, and UART output
+ * is often truncated (as FIFO is not flushed). Define the ESP_FAULT_ASSERT_DEBUG macro to debug any
+ * failures of this macro due to software bugs.
+ *
+ * @param CONDITION A condition which will evaluate true unless an attacker used fault injection to skip or corrupt some other critical system calculation.
+ *
+ */
+#define ESP_FAULT_ASSERT(CONDITION) do {                \
+        asm volatile ("" ::: "memory");                 \
+        if(!(CONDITION)) _ESP_FAULT_RESET();            \
+        asm volatile ("" ::: "memory");                 \
+        if(!(CONDITION)) _ESP_FAULT_RESET();            \
+        asm volatile ("" ::: "memory");                 \
+        if(!(CONDITION)) _ESP_FAULT_RESET();            \
+} while(0)
+
+#ifndef CONFIG_IDF_TARGET_ARCH_RISCV
+#define _ESP_FAULT_ILLEGAL_INSTRUCTION asm volatile("ill.n; ill.n; ill.n; ill.n; ill.n; ill.n; ill.n;")
+#else
+#define _ESP_FAULT_ILLEGAL_INSTRUCTION asm volatile("unimp; unimp; unimp; unimp; unimp;")
+#endif
+
+// Uncomment this macro to get debug output if ESP_FAULT_ASSERT() fails
+//
+// Note that uncommenting this macro reduces the anti-FI effectiveness
+//
+//#define ESP_FAULT_ASSERT_DEBUG
+
+/* Internal macro, purpose is to trigger a system reset if an inconsistency due to fault injection
+   is detected.
+
+   Illegal instruction opcodes are there as a fallback to crash the CPU in case it doesn't
+   reset as expected.
+*/
+#ifndef ESP_FAULT_ASSERT_DEBUG
+
+#define _ESP_FAULT_RESET()  do {                                \
+        REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);  \
+        _ESP_FAULT_ILLEGAL_INSTRUCTION;                         \
+    } while(0)
+
+#else // ESP_FAULT_ASSERT_DEBUG
+
+#warning "Enabling ESP_FAULT_ASSERT_DEBUG makes ESP_FAULT_ASSERT() less effective"
+
+#define _ESP_FAULT_RESET()  do {                                        \
+        esp_rom_printf("ESP_FAULT_ASSERT %s:%d\n", __FILE__, __LINE__); \
+        _ESP_FAULT_ILLEGAL_INSTRUCTION;                                 \
+    } while(0)
+
+#endif // ESP_FAULT_ASSERT_DEBUG
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_interface.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_interface.h
new file mode 100644
index 00000000000..fdb4c0056ce
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_interface.h
@@ -0,0 +1,29 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef __ESP_INTERFACE_H__
+#define __ESP_INTERFACE_H__
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ESP_IF_WIFI_STA = 0,     /**< ESP32 station interface */
+    ESP_IF_WIFI_AP,          /**< ESP32 soft-AP interface */
+    ESP_IF_ETH,              /**< ESP32 ethernet interface */
+    ESP_IF_MAX
+} esp_interface_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __ESP_INTERFACE_TYPES_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_intr.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_intr.h
new file mode 100644
index 00000000000..0818ed3feab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_intr.h
@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#warning esp_intr.h is deprecated, please include esp_intr_alloc.h instead
+#include "esp_intr_alloc.h"
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_intr_alloc.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_intr_alloc.h
new file mode 100644
index 00000000000..a26fde9394f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_intr_alloc.h
@@ -0,0 +1,314 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/** @addtogroup Intr_Alloc
+  * @{
+  */
+
+
+/** @brief Interrupt allocation flags
+ *
+ * These flags can be used to specify which interrupt qualities the
+ * code calling esp_intr_alloc* needs.
+ *
+ */
+
+//Keep the LEVELx values as they are here; they match up with (1<<level)
+#define ESP_INTR_FLAG_LEVEL1        (1<<1)  ///< Accept a Level 1 interrupt vector (lowest priority)
+#define ESP_INTR_FLAG_LEVEL2        (1<<2)  ///< Accept a Level 2 interrupt vector
+#define ESP_INTR_FLAG_LEVEL3        (1<<3)  ///< Accept a Level 3 interrupt vector
+#define ESP_INTR_FLAG_LEVEL4        (1<<4)  ///< Accept a Level 4 interrupt vector
+#define ESP_INTR_FLAG_LEVEL5        (1<<5)  ///< Accept a Level 5 interrupt vector
+#define ESP_INTR_FLAG_LEVEL6        (1<<6)  ///< Accept a Level 6 interrupt vector
+#define ESP_INTR_FLAG_NMI           (1<<7)  ///< Accept a Level 7 interrupt vector (highest priority)
+#define ESP_INTR_FLAG_SHARED        (1<<8)  ///< Interrupt can be shared between ISRs
+#define ESP_INTR_FLAG_EDGE          (1<<9)  ///< Edge-triggered interrupt
+#define ESP_INTR_FLAG_IRAM          (1<<10) ///< ISR can be called if cache is disabled
+#define ESP_INTR_FLAG_INTRDISABLED  (1<<11) ///< Return with this interrupt disabled
+
+#define ESP_INTR_FLAG_LOWMED    (ESP_INTR_FLAG_LEVEL1|ESP_INTR_FLAG_LEVEL2|ESP_INTR_FLAG_LEVEL3) ///< Low and medium prio interrupts. These can be handled in C.
+#define ESP_INTR_FLAG_HIGH      (ESP_INTR_FLAG_LEVEL4|ESP_INTR_FLAG_LEVEL5|ESP_INTR_FLAG_LEVEL6|ESP_INTR_FLAG_NMI) ///< High level interrupts. Need to be handled in assembly.
+
+#define ESP_INTR_FLAG_LEVELMASK (ESP_INTR_FLAG_LEVEL1|ESP_INTR_FLAG_LEVEL2|ESP_INTR_FLAG_LEVEL3| \
+                                 ESP_INTR_FLAG_LEVEL4|ESP_INTR_FLAG_LEVEL5|ESP_INTR_FLAG_LEVEL6| \
+                                 ESP_INTR_FLAG_NMI) ///< Mask for all level flags
+
+
+/** @addtogroup Intr_Alloc_Pseudo_Src
+  * @{
+  */
+
+/**
+ * The esp_intr_alloc* functions can allocate an int for all ETS_*_INTR_SOURCE interrupt sources that
+ * are routed through the interrupt mux. Apart from these sources, each core also has some internal
+ * sources that do not pass through the interrupt mux. To allocate an interrupt for these sources,
+ * pass these pseudo-sources to the functions.
+ */
+#define ETS_INTERNAL_TIMER0_INTR_SOURCE     -1 ///< Platform timer 0 interrupt source
+#define ETS_INTERNAL_TIMER1_INTR_SOURCE     -2 ///< Platform timer 1 interrupt source
+#define ETS_INTERNAL_TIMER2_INTR_SOURCE     -3 ///< Platform timer 2 interrupt source
+#define ETS_INTERNAL_SW0_INTR_SOURCE        -4 ///< Software int source 1
+#define ETS_INTERNAL_SW1_INTR_SOURCE        -5 ///< Software int source 2
+#define ETS_INTERNAL_PROFILING_INTR_SOURCE  -6 ///< Int source for profiling
+
+/**@}*/
+
+/** Provides SystemView with positive IRQ IDs, otherwise scheduler events are not shown properly
+ */
+#define ETS_INTERNAL_INTR_SOURCE_OFF        (-ETS_INTERNAL_PROFILING_INTR_SOURCE)
+
+/** Enable interrupt by interrupt number */
+#define ESP_INTR_ENABLE(inum)  esp_intr_enable_source(inum)
+
+/** Disable interrupt by interrupt number */
+#define ESP_INTR_DISABLE(inum) esp_intr_disable_source(inum)
+
+/** Function prototype for interrupt handler function */
+typedef void (*intr_handler_t)(void *arg);
+
+/** Interrupt handler associated data structure */
+typedef struct intr_handle_data_t intr_handle_data_t;
+
+/** Handle to an interrupt handler */
+typedef intr_handle_data_t *intr_handle_t ;
+
+/**
+ * @brief Mark an interrupt as a shared interrupt
+ *
+ * This will mark a certain interrupt on the specified CPU as
+ * an interrupt that can be used to hook shared interrupt handlers
+ * to.
+ *
+ * @param intno The number of the interrupt (0-31)
+ * @param cpu CPU on which the interrupt should be marked as shared (0 or 1)
+ * @param is_in_iram Shared interrupt is for handlers that reside in IRAM and
+ *                   the int can be left enabled while the flash cache is disabled.
+ *
+ * @return ESP_ERR_INVALID_ARG if cpu or intno is invalid
+ *         ESP_OK otherwise
+ */
+esp_err_t esp_intr_mark_shared(int intno, int cpu, bool is_in_iram);
+
+/**
+ * @brief Reserve an interrupt to be used outside of this framework
+ *
+ * This will mark a certain interrupt on the specified CPU as
+ * reserved, not to be allocated for any reason.
+ *
+ * @param intno The number of the interrupt (0-31)
+ * @param cpu CPU on which the interrupt should be marked as shared (0 or 1)
+ *
+ * @return ESP_ERR_INVALID_ARG if cpu or intno is invalid
+ *         ESP_OK otherwise
+ */
+esp_err_t esp_intr_reserve(int intno, int cpu);
+
+/**
+ * @brief Allocate an interrupt with the given parameters.
+ *
+ * This finds an interrupt that matches the restrictions as given in the flags
+ * parameter, maps the given interrupt source to it and hooks up the given
+ * interrupt handler (with optional argument) as well. If needed, it can return
+ * a handle for the interrupt as well.
+ *
+ * The interrupt will always be allocated on the core that runs this function.
+ *
+ * If ESP_INTR_FLAG_IRAM flag is used, and handler address is not in IRAM or
+ * RTC_FAST_MEM, then ESP_ERR_INVALID_ARG is returned.
+ *
+ * @param source The interrupt source. One of the ETS_*_INTR_SOURCE interrupt mux
+ *               sources, as defined in soc/soc.h, or one of the internal
+ *               ETS_INTERNAL_*_INTR_SOURCE sources as defined in this header.
+ * @param flags An ORred mask of the ESP_INTR_FLAG_* defines. These restrict the
+ *               choice of interrupts that this routine can choose from. If this value
+ *               is 0, it will default to allocating a non-shared interrupt of level
+ *               1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared
+ *               interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
+ *               from this function with the interrupt disabled.
+ * @param handler The interrupt handler. Must be NULL when an interrupt of level >3
+ *               is requested, because these types of interrupts aren't C-callable.
+ * @param arg    Optional argument for passed to the interrupt handler
+ * @param ret_handle Pointer to an intr_handle_t to store a handle that can later be
+ *               used to request details or free the interrupt. Can be NULL if no handle
+ *               is required.
+ *
+ * @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
+ *         ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
+ *         ESP_OK otherwise
+ */
+esp_err_t esp_intr_alloc(int source, int flags, intr_handler_t handler, void *arg, intr_handle_t *ret_handle);
+
+
+/**
+ * @brief Allocate an interrupt with the given parameters.
+ *
+ *
+ * This essentially does the same as esp_intr_alloc, but allows specifying a register and mask
+ * combo. For shared interrupts, the handler is only called if a read from the specified
+ * register, ANDed with the mask, returns non-zero. By passing an interrupt status register
+ * address and a fitting mask, this can be used to accelerate interrupt handling in the case
+ * a shared interrupt is triggered; by checking the interrupt statuses first, the code can
+ * decide which ISRs can be skipped
+ *
+ * @param source The interrupt source. One of the ETS_*_INTR_SOURCE interrupt mux
+ *               sources, as defined in soc/soc.h, or one of the internal
+ *               ETS_INTERNAL_*_INTR_SOURCE sources as defined in this header.
+ * @param flags An ORred mask of the ESP_INTR_FLAG_* defines. These restrict the
+ *               choice of interrupts that this routine can choose from. If this value
+ *               is 0, it will default to allocating a non-shared interrupt of level
+ *               1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared
+ *               interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
+ *               from this function with the interrupt disabled.
+ * @param intrstatusreg The address of an interrupt status register
+ * @param intrstatusmask A mask. If a read of address intrstatusreg has any of the bits
+ *               that are 1 in the mask set, the ISR will be called. If not, it will be
+ *               skipped.
+ * @param handler The interrupt handler. Must be NULL when an interrupt of level >3
+ *               is requested, because these types of interrupts aren't C-callable.
+ * @param arg    Optional argument for passed to the interrupt handler
+ * @param ret_handle Pointer to an intr_handle_t to store a handle that can later be
+ *               used to request details or free the interrupt. Can be NULL if no handle
+ *               is required.
+ *
+ * @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
+ *         ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
+ *         ESP_OK otherwise
+ */
+esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusreg, uint32_t intrstatusmask, intr_handler_t handler, void *arg, intr_handle_t *ret_handle);
+
+
+/**
+ * @brief Disable and free an interrupt.
+ *
+ * Use an interrupt handle to disable the interrupt and release the resources associated with it.
+ * If the current core is not the core that registered this interrupt, this routine will be assigned to
+ * the core that allocated this interrupt, blocking and waiting until the resource is successfully released.
+ *
+ * @note
+ * When the handler shares its source with other handlers, the interrupt status
+ * bits it's responsible for should be managed properly before freeing it. see
+ * ``esp_intr_disable`` for more details. Please do not call this function in ``esp_ipc_call_blocking``.
+ *
+ * @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
+ *
+ * @return ESP_ERR_INVALID_ARG the handle is NULL
+ *         ESP_FAIL failed to release this handle
+ *         ESP_OK otherwise
+ */
+esp_err_t esp_intr_free(intr_handle_t handle);
+
+
+/**
+ * @brief Get CPU number an interrupt is tied to
+ *
+ * @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
+ *
+ * @return The core number where the interrupt is allocated
+ */
+int esp_intr_get_cpu(intr_handle_t handle);
+
+/**
+ * @brief Get the allocated interrupt for a certain handle
+ *
+ * @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
+ *
+ * @return The interrupt number
+ */
+int esp_intr_get_intno(intr_handle_t handle);
+
+/**
+ * @brief Disable the interrupt associated with the handle
+ *
+ * @note
+ * 1. For local interrupts (ESP_INTERNAL_* sources), this function has to be called on the
+ * CPU the interrupt is allocated on. Other interrupts have no such restriction.
+ * 2. When several handlers sharing a same interrupt source, interrupt status bits, which are
+ * handled in the handler to be disabled, should be masked before the disabling, or handled
+ * in other enabled interrupts properly. Miss of interrupt status handling will cause infinite
+ * interrupt calls and finally system crash.
+ *
+ * @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
+ *
+ * @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
+ *         ESP_OK otherwise
+ */
+esp_err_t esp_intr_disable(intr_handle_t handle);
+
+/**
+ * @brief Enable the interrupt associated with the handle
+ *
+ * @note For local interrupts (ESP_INTERNAL_* sources), this function has to be called on the
+ *       CPU the interrupt is allocated on. Other interrupts have no such restriction.
+ *
+ * @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
+ *
+ * @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
+ *         ESP_OK otherwise
+ */
+esp_err_t esp_intr_enable(intr_handle_t handle);
+
+/**
+ * @brief Set the "in IRAM" status of the handler.
+ *
+ * @note Does not work on shared interrupts.
+ *
+ * @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
+ * @param is_in_iram Whether the handler associated with this handle resides in IRAM.
+ *                   Handlers residing in IRAM can be called when cache is disabled.
+ *
+ * @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
+ *         ESP_OK otherwise
+ */
+esp_err_t esp_intr_set_in_iram(intr_handle_t handle, bool is_in_iram);
+
+/**
+ * @brief Disable interrupts that aren't specifically marked as running from IRAM
+ */
+void esp_intr_noniram_disable(void);
+
+/**
+ * @brief Re-enable interrupts disabled by esp_intr_noniram_disable
+ */
+void esp_intr_noniram_enable(void);
+
+/**
+ * @brief enable the interrupt source based on its number
+ * @param inum interrupt number from 0 to 31
+ */
+void esp_intr_enable_source(int inum);
+
+/**
+ * @brief disable the interrupt source based on its number
+ * @param inum interrupt number from 0 to 31
+ */
+void esp_intr_disable_source(int inum);
+
+/**
+ * @brief Get the lowest interrupt level from the flags
+ * @param flags The same flags that pass to `esp_intr_alloc_intrstatus` API
+ */
+static inline int esp_intr_flags_to_level(int flags)
+{
+    return __builtin_ffs((flags & ESP_INTR_FLAG_LEVELMASK) >> 1) + 1;
+}
+
+/**@}*/
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_mac.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_mac.h
new file mode 100644
index 00000000000..f0efddfc2f7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_mac.h
@@ -0,0 +1,153 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_err.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ESP_MAC_WIFI_STA,
+    ESP_MAC_WIFI_SOFTAP,
+    ESP_MAC_BT,
+    ESP_MAC_ETH,
+    ESP_MAC_IEEE802154,
+} esp_mac_type_t;
+
+/** @cond */
+#define TWO_UNIVERSAL_MAC_ADDR 2
+#define FOUR_UNIVERSAL_MAC_ADDR 4
+#if CONFIG_IDF_TARGET_ESP32
+#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES
+#elif CONFIG_IDF_TARGET_ESP32S2
+#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES
+#elif CONFIG_IDF_TARGET_ESP32C3
+#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES
+#elif CONFIG_IDF_TARGET_ESP32H2
+#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32H2_UNIVERSAL_MAC_ADDRESSES
+#endif
+/** @endcond */
+
+
+/**
+  * @brief  Set base MAC address with the MAC address which is stored in BLK3 of EFUSE or
+  *         external storage e.g. flash and EEPROM.
+  *
+  * Base MAC address is used to generate the MAC addresses used by network interfaces.
+  *
+  * If using a custom base MAC address, call this API before initializing any network interfaces.
+  * Refer to the ESP-IDF Programming Guide for details about how the Base MAC is used.
+  *
+  * @note Base MAC must be a unicast MAC (least significant bit of first byte must be zero).
+  *
+  * @note If not using a valid OUI, set the "locally administered" bit
+  *       (bit value 0x02 in the first byte) to avoid collisions.
+  *
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
+  *
+  * @return ESP_OK on success
+  *         ESP_ERR_INVALID_ARG If mac is NULL or is not a unicast MAC
+  */
+esp_err_t esp_base_mac_addr_set(const uint8_t *mac);
+
+/**
+  * @brief  Return base MAC address which is set using esp_base_mac_addr_set.
+  *
+  * @note If no custom Base MAC has been set, this returns the pre-programmed Espressif base MAC address.
+  *
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
+  *
+  * @return ESP_OK on success
+  *         ESP_ERR_INVALID_ARG mac is NULL
+  *         ESP_ERR_INVALID_MAC base MAC address has not been set
+  */
+esp_err_t esp_base_mac_addr_get(uint8_t *mac);
+
+/**
+  * @brief  Return base MAC address which was previously written to BLK3 of EFUSE.
+  *
+  * Base MAC address is used to generate the MAC addresses used by the networking interfaces.
+  * This API returns the custom base MAC address which was previously written to EFUSE BLK3 in
+  * a specified format.
+  *
+  * Writing this EFUSE allows setting of a different (non-Espressif) base MAC address. It is also
+  * possible to store a custom base MAC address elsewhere, see esp_base_mac_addr_set() for details.
+  *
+  * @note This function is currently only supported on ESP32.
+  *
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
+  *
+  * @return ESP_OK on success
+  *         ESP_ERR_INVALID_ARG mac is NULL
+  *         ESP_ERR_INVALID_MAC CUSTOM_MAC address has not been set, all zeros (for esp32-xx)
+  *         ESP_ERR_INVALID_VERSION An invalid MAC version field was read from BLK3 of EFUSE (for esp32)
+  *         ESP_ERR_INVALID_CRC An invalid MAC CRC was read from BLK3 of EFUSE (for esp32)
+  */
+esp_err_t esp_efuse_mac_get_custom(uint8_t *mac);
+
+/**
+  * @brief  Return base MAC address which is factory-programmed by Espressif in EFUSE.
+  *
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
+  *
+  * @return ESP_OK on success
+  *         ESP_ERR_INVALID_ARG mac is NULL
+  */
+esp_err_t esp_efuse_mac_get_default(uint8_t *mac);
+
+/**
+  * @brief  Read base MAC address and set MAC address of the interface.
+  *
+  * This function first get base MAC address using esp_base_mac_addr_get().
+  * Then calculates the MAC address of the specific interface requested,
+  * refer to ESP-IDF Programming Guide for the algorithm.
+  *
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
+  * @param  type Type of MAC address to return
+  *
+  * @return ESP_OK on success
+  */
+esp_err_t esp_read_mac(uint8_t *mac, esp_mac_type_t type);
+
+/**
+  * @brief Derive local MAC address from universal MAC address.
+  *
+  * This function copies a universal MAC address and then sets the "locally
+  * administered" bit (bit 0x2) in the first octet, creating a locally
+  * administered MAC address.
+  *
+  * If the universal MAC address argument is already a locally administered MAC
+  * address, then the first octet is XORed with 0x4 in order to create a different
+  * locally administered MAC address.
+  *
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
+  * @param  universal_mac  Source universal MAC address, length: 6 bytes.
+  *
+  * @return ESP_OK on success
+  */
+esp_err_t esp_derive_local_mac(uint8_t *local_mac, const uint8_t *universal_mac);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_memprot.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_memprot.h
new file mode 100644
index 00000000000..c9557eae935
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_memprot.h
@@ -0,0 +1,199 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/////////////////////////////////////////////////////////////////////////////////////////
+// ESP Memory Protection API (PMS)
+// - allows configuration and violation-interrupt handling of the PMS module operations
+// - not intended for public use.
+
+#pragma once
+
+#include "sdkconfig.h"
+#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_err.h"
+#include "esp_memprot_err.h"
+#include "soc_memprot_types.h"
+#include "esp_memprot_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_MEMPROT_ERR_CHECK(retval, fnc) if ((retval=fnc) != ESP_OK) { return retval; }
+
+/**
+* @brief Basic PMS interrupt source info
+*/
+typedef struct {
+    esp_mprot_mem_t mem_type;   /*!< Memory type containing the faulting address  */
+    int core;                   /*!< CPU/Core ID running the faulting instruction  */
+} esp_memp_intr_source_t;
+
+/**
+ * @brief Clears current interrupt ON flag for given Memory type and CPU/Core ID
+ *
+ * This operation is non-atomic for some chips by PMS module design
+ * In such a case the interrupt clearing happens in two steps:
+ *      1. Interrupt CLR flag is set (clears interrupt-ON status and inhibits linked interrupt processing)
+ *      2. Interrupt CLR flag is reset (resumes the interrupt monitoring)
+ *
+ * @param mem_type Memory type (see esp_mprot_mem_t enum)
+ * @param core Target CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_monitor_clear_intr(const esp_mprot_mem_t mem_type, int const *const core);
+
+/**
+ * @brief Checks whether any of the PMS settings is locked
+ *
+ * @param[out] locked Any lock on? (true/false)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid locked ptr
+ *         Other failures: error code of any failing esp_mprot_get_*_lock() routine (called internally)
+ */
+esp_err_t esp_mprot_is_conf_locked_any(bool *locked);
+
+/**
+ * @brief Checks whether any PMS violation-interrupt monitoring is enabled
+ *
+ * @param[out] locked Any PMS violation interrupt monitor is enabled (true/false)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid enabled ptr
+ *         Other failures: error code of esp_mprot_get_monitor_en() routine (called internally for all Memory types)
+ */
+esp_err_t esp_mprot_is_intr_ena_any(bool *enabled);
+
+/**
+ * @brief Returns active PMS violation-interrupt Memory type if any (MEMPROT_TYPE_NONE when none detected)
+ * and the CPU/CoreID which was running the faulty code (-1 when no interrupt available)
+ *
+ * If there are more interrupts indicated on (shouldn't happen), the order of precedence is given by 'esp_mprot_mem_t' enum definition (low->high)
+ *
+ * @param[out] mem_type Out-pointer for Memory type given by the faulting address (see esp_mprot_mem_t enum)
+ * @param[out] core Out-pointer for CPU/Core ID (see *_CPU_NUM defs in soc.h)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer(s)
+ */
+esp_err_t esp_mprot_get_active_intr(esp_memp_intr_source_t *active_memp_intr);
+
+/**
+ * @brief Returns the address which caused the violation interrupt for given Memory type and CPU/Core ID.
+ * This function is to be called after a basic resolving of (current) interrupt's parameters (ie corresponding
+ * Memory type and CPU ID see esp_mprot_get_active_intr()). This is to minimize processing time of actual exception
+ * as this API is typicaly used in a panic-handling code.
+ * If there is no active interrupt available for the Memory type/CPU ID required, fault_addr is set to NULL.
+ *
+ * @param mem_type memory type
+ * @param[out] fault_addr Address of the operation which caused the PMS violation interrupt
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid fault_addr pointer
+ */
+esp_err_t esp_mprot_get_violate_addr(const esp_mprot_mem_t mem_type, void **fault_addr, int const *const core);
+
+/**
+ * @brief Returns PMS World identifier of the code causing the violation interrupt
+ *
+ * The value is read from appropriate PMS violation status register and thus might be 0 if the interrupt is not currently active.
+ *
+ * @param mem_type Memory type
+ * @param[out] world PMS World type (see esp_mprot_pms_world_t)
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on passing invalid pointer(s)
+ *         ESP_ERR_MEMPROT_WORLD_INVALID on invalid World identifier fetched from the register
+ */
+esp_err_t esp_mprot_get_violate_world(const esp_mprot_mem_t mem_type, esp_mprot_pms_world_t *world, int const *const core);
+
+/**
+ * @brief Returns an operation type which caused the violation interrupt
+ *
+ * The operation resolving is processed over various PMS status register flags, according to given Memory type argument.
+ * If the interrupt is not active the result returned is irrelevant (likely evaluated to MEMPROT_OP_READ).
+ *
+ * @param mem_type Memory type
+ * @param[out] oper Operation type (see MEMPROT_OP_* defines)
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid oper pointer
+ */
+esp_err_t esp_mprot_get_violate_operation(const esp_mprot_mem_t mem_type, uint32_t *oper, int const *const core);
+
+/**
+ * @brief Checks whether given memory type supports byte-enables info
+ *
+ * Byte-enables status is available only for DMA/DRAM operations
+  *
+ * @param mem_type memory type
+ *
+ * @return byte-enables info available true/false
+ */
+bool esp_mprot_has_byte_enables(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Returns byte-enables for the address which caused the violation interrupt
+ *
+ * The value is taken from appropriate PMS violation status register, based on given Memory type
+ *
+ * @param mem_type Memory type (MEMPROT_TYPE_DRAM0_SRAM)
+ * @param[out] byte_en Byte-enables bits
+ * @param core Faulting instruction CPU/Core ID (see *_CPU_NUM defs in soc.h). Can be NULL on 1-CPU systems
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARGUMENT on invalid byte_en pointer
+ */
+esp_err_t esp_mprot_get_violate_byte_enables(const esp_mprot_mem_t mem_type, uint32_t *byte_en, int const *const core);
+
+/**
+ * @brief Convenient routine for setting the PMS defaults
+ *
+ * Called on system startup, depending on ESP_SYSTEM_MEMPROT_FEATURE Kconfig value
+ *
+ * @param memp_config pointer to Memprot configuration structure (esp_memp_config_t). The structure si chip-specific,
+ * for details and defaults see appropriate [target-chip]/soc_memprot_types.h
+ *
+ * @return ESP_OK on success
+ *         Other failures: error code of the failing routine called internally. No specific error processing provided in such a case
+ *         due to large number of embedded calls (ie no global unique error table is provided and thus one error code can have different meanings,
+ *         depending on the routine issuing the error)
+ */
+esp_err_t esp_mprot_set_prot(const esp_memp_config_t *memp_config);
+
+/**
+ * @brief Generates PMS configuration string of actual device (diagnostics)
+ *
+ * The functions generates a string from current configuration, control and status registers of the PMS (or similar) module of actual device.
+ * The values are fetched using HAL LL calls to help finding possible errors in the Memprot API implementation
+ *
+ * @param[out] dump_info_string configuration string buffer pointer. The string is allocated by the callee and must be freed by the caller.
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_NO_MEM on buffer allocation failure
+ *         ESP_ERR_INVALID_ARGUMENT on invalid dump_info_string pointer
+ */
+esp_err_t esp_mprot_dump_configuration(char **dump_info_string);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_memprot_err.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_memprot_err.h
new file mode 100644
index 00000000000..5556d2c8894
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_memprot_err.h
@@ -0,0 +1,28 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+*
+* SPDX-License-Identifier: Apache-2.0
+*/
+
+#pragma once
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief ESP Memprot API error code definition
+*/
+#define ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID     (ESP_ERR_MEMPROT_BASE + 1)   /**< Memory type invalid in given context */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID      (ESP_ERR_MEMPROT_BASE + 2)   /**< Splitting address invalid in given context */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_OUT_OF_RANGE (ESP_ERR_MEMPROT_BASE + 3)   /**< Splitting address out of range */
+#define ESP_ERR_MEMPROT_SPLIT_ADDR_UNALIGNED    (ESP_ERR_MEMPROT_BASE + 4)   /**< Splitting address not aligned to required boundaries */
+#define ESP_ERR_MEMPROT_UNIMGMT_BLOCK_INVALID   (ESP_ERR_MEMPROT_BASE + 5)   /**< Required unified-management block is not valid */
+#define ESP_ERR_MEMPROT_WORLD_INVALID           (ESP_ERR_MEMPROT_BASE + 6)   /**< Required World identifier is not valid */
+#define ESP_ERR_MEMPROT_AREA_INVALID            (ESP_ERR_MEMPROT_BASE + 7)   /**< Required Area identifier is not valid */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_memprot_types.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_memprot_types.h
new file mode 100644
index 00000000000..e37fee54578
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_memprot_types.h
@@ -0,0 +1,36 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief PMS World type (attribute per PMS area, similar to x86 Ring scheme)
+ */
+typedef enum {
+    MEMPROT_PMS_WORLD_NONE                      = 0x00000000,
+    MEMPROT_PMS_WORLD_0                         = 0x00000001,
+    MEMPROT_PMS_WORLD_1                         = 0x00000002,
+    MEMPROT_PMS_WORLD_2                         = 0x00000004,
+    MEMPROT_PMS_WORLD_ALL                       = 0x7FFFFFFF,
+    MEMPROT_PMS_WORLD_INVALID                   = 0x80000000
+} esp_mprot_pms_world_t;
+
+/**
+ * @brief Memory operation/permission type recognized by PMS
+ */
+#define MEMPROT_OP_NONE                         0x00000000
+#define MEMPROT_OP_READ                         0x00000001
+#define MEMPROT_OP_WRITE                        0x00000002
+#define MEMPROT_OP_EXEC                         0x00000004
+#define MEMPROT_OP_INVALID                      0x80000000
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/esp_clk.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/esp_clk.h
new file mode 100644
index 00000000000..5a4666fdddf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/esp_clk.h
@@ -0,0 +1,87 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp_clk.h
+ *
+ * This file contains declarations of clock related functions.
+ */
+
+/**
+ * @brief Get the calibration value of RTC slow clock
+ *
+ * The value is in the same format as returned by rtc_clk_cal (microseconds,
+ * in Q13.19 fixed-point format).
+ *
+ * @return the calibration value obtained using rtc_clk_cal, at startup time
+ */
+uint32_t esp_clk_slowclk_cal_get(void);
+
+/**
+ * @brief Update the calibration value of RTC slow clock
+ *
+ * The value has to be in the same format as returned by rtc_clk_cal (microseconds,
+ * in Q13.19 fixed-point format).
+ * This value is used by timekeeping functions (such as gettimeofday) to
+ * calculate current time based on RTC counter value.
+ * @param value calibration value obtained using rtc_clk_cal
+ */
+void esp_clk_slowclk_cal_set(uint32_t value);
+
+/**
+ * @brief Return current CPU clock frequency
+ * When frequency switching is performed, this frequency may change.
+ * However it is guaranteed that the frequency never changes with a critical
+ * section.
+ *
+ * @return CPU clock frequency, in Hz
+ */
+int esp_clk_cpu_freq(void);
+
+/**
+ * @brief Return current APB clock frequency
+ *
+ * When frequency switching is performed, this frequency may change.
+ * However it is guaranteed that the frequency never changes with a critical
+ * section.
+ *
+ * @return APB clock frequency, in Hz
+ */
+int esp_clk_apb_freq(void);
+
+/**
+ * @brief Return frequency of the main XTAL
+ *
+ * Frequency of the main XTAL can be either auto-detected or set at compile
+ * time (see CONFIG_ESP32_XTAL_FREQ_SEL sdkconfig option). In both cases, this
+ * function returns the actual value at run time.
+ *
+ * @return XTAL frequency, in Hz
+ */
+int esp_clk_xtal_freq(void);
+
+
+/**
+ * @brief Read value of RTC counter, converting it to microseconds
+ * @attention The value returned by this function may change abruptly when
+ * calibration value of RTC counter is updated via esp_clk_slowclk_cal_set
+ * function. This should not happen unless application calls esp_clk_slowclk_cal_set.
+ * In ESP-IDF, esp_clk_slowclk_cal_set is only called in startup code.
+ *
+ * @return Value or RTC counter, expressed in microseconds
+ */
+uint64_t esp_clk_rtc_time(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/esp_memprot_internal.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/esp_memprot_internal.h
new file mode 100644
index 00000000000..caeb7584862
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/esp_memprot_internal.h
@@ -0,0 +1,199 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_err.h"
+#include "esp_memprot_err.h"
+#include "hal/memprot_types.h"
+#include "soc_memprot_types.h"
+#include "esp_memprot_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief Convert Memprot low level errors to esp_err_t
+*/
+esp_err_t esp_mprot_ll_err_to_esp_err(const memprot_ll_err_t err);
+
+/**
+ * @brief Convert Memprot low level PMS World IDs to esp_mprot_pms_world_t
+ */
+esp_mprot_pms_world_t esp_mprot_ll_world_to_hl_world(const memprot_ll_world_t world);
+
+/**
+ * @brief Converts operation type to string, no combination of operations allowed
+ *
+ * @param oper_type PMS operation type
+ */
+const char *esp_mprot_oper_type_to_str(const uint32_t oper_type);
+
+/**
+ * @brief Converts PMS World type to string
+ *
+ * @param area_type PMS World type
+ */
+const char *esp_mprot_pms_world_to_str(const esp_mprot_pms_world_t world_type);
+
+/**
+ * @brief Sets splitting address for given line type in the target Memory type
+ *
+ * @param mem_type memory type
+ * @param line_type split address type
+ * @param line_addr target address from a memory range relevant to given line_addr
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID on invalid line_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_OUT_OF_RANGE on splitting line out of given memory-type range
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_UNALIGNED on splitting line not aligned to PMS-required boundaries
+ */
+esp_err_t esp_mprot_set_split_addr(const esp_mprot_mem_t mem_type, const esp_mprot_split_addr_t line_type, const void *line_addr);
+
+/**
+ * @brief Gets PMS splitting address for given split_addr type
+ *
+ * The value is read from the PMS configuration registers
+ *
+ * @param mem_type memory type
+ * @param line_type Split line type (see esp_mprot_split_addr_t enum)
+ * @param[out] line_addr Split line address from the configuration register
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on line_addr is pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID on invalid line_type
+ */
+esp_err_t esp_mprot_get_split_addr(const esp_mprot_mem_t mem_type, const esp_mprot_split_addr_t line_type, void **line_addr);
+
+/**
+ * @brief Returns default main I/D splitting address for given Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] def_split_addr Main I/D splitting address of required mem_type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on invalid def_split_addr pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_get_default_main_split_addr(const esp_mprot_mem_t mem_type, void **def_split_addr);
+
+/**
+ * @brief Sets a lock for the main IRAM/DRAM splitting addresses
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_split_addr_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for the splitting address configuration of given Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARGUMENT on invalid locked pointer
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_get_split_addr_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Sets a lock for PMS Area settings of required Memory type
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_pms_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS Area settings of required Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARGUMENT on invalid locked pointer
+ */
+esp_err_t esp_mprot_get_pms_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Sets permissions for given PMS Area
+ *
+ * @param area_type PMS area type
+ * @param flags combination of MEMPROT_OP_* defines
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_pms_area(const esp_mprot_pms_area_t area_type, const uint32_t flags);
+
+/**
+ * @brief Gets current permissions for given PMS Area
+ *
+ * @param area_type PMS area type
+ * @param[out] flags combination of MEMPROT_OP_* defines
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid flags pointer
+ */
+esp_err_t esp_mprot_get_pms_area(const esp_mprot_pms_area_t area_type, uint32_t *flags);
+
+/**
+ * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type memory type (see esp_mprot_mem_t enum)
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_monitor_lock(const esp_mprot_mem_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type memory type
+ * @param[out] locked mem_type related lock status
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on invalid locked pointer
+ */
+esp_err_t esp_mprot_get_monitor_lock(const esp_mprot_mem_t mem_type, bool *locked);
+
+/**
+ * @brief Enable PMS violation interrupt monitoring of required Memory type
+ *
+ * @param mem_type memory type
+ * @param enable enable/disable violation interrupt monitoring
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID on invalid mem_type
+ */
+esp_err_t esp_mprot_set_monitor_en(const esp_mprot_mem_t mem_type, const bool enable);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //CONFIG_ESP_SYSTEM_MEMPROT_FEATURE || CONFIG_ESP_SYSTEM_MEMPROT_TEST
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/sleep_gpio.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/sleep_gpio.h
new file mode 100644
index 00000000000..abab21871a4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/sleep_gpio.h
@@ -0,0 +1,46 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdint.h>
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file sleep_gpio.h
+ *
+ * This file contains declarations of GPIO related functions in light sleep mode.
+ */
+
+#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
+
+/**
+ * @brief Save GPIO pull-up and pull-down configuration information in the wake-up state
+ *
+ * In light sleep mode, the pull-up and pull-down resistors of GPIO will cause
+ * leakage current when the system sleeps. In order to reduce the power
+ * consumption of system sleep, it needs to save the configuration information
+ * of all GPIO pull-up and pull-down resistors and disable the pull-up and
+ * pull-down resistors of GPIO before the system enters sleep.
+ */
+void gpio_sleep_mode_config_apply(void);
+
+/**
+ * @brief Restore GPIO pull-up and pull-down configuration information in the wake-up state
+ *
+ * In light sleep mode, after the system wakes up, it needs to restore all GPIO
+ * pull-up and pull-down configurations before the last sleep.
+ */
+void gpio_sleep_mode_config_unapply(void);
+
+#endif // SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/sleep_mac_bb.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/sleep_mac_bb.h
new file mode 100644
index 00000000000..6b4019639d8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/sleep_mac_bb.h
@@ -0,0 +1,43 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdint.h>
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file sleep_mac_bb.h
+ *
+ * This file contains declarations of MAC and baseband power consumption related functions in light sleep mode.
+ */
+
+#if CONFIG_MAC_BB_PD
+
+/**
+ * @brief A callback function completes MAC and baseband power down operation
+ *
+ * In light sleep mode, execute Wi-Fi and Bluetooth module MAC and baseband
+ * power down and backup register configuration information operations.
+ */
+void mac_bb_power_down_cb_execute(void);
+
+/**
+ * @brief A callback function completes MAC and baseband power up operation
+ *
+ * In light sleep mode, execute Wi-Fi and Bluetooth module MAC and baseband
+ * power up and restore register configuration information operations.
+ */
+void mac_bb_power_up_cb_execute(void);
+
+#endif // CONFIG_MAC_BB_PD
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/sleep_retention.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/sleep_retention.h
new file mode 100644
index 00000000000..001e559c0c7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_private/sleep_retention.h
@@ -0,0 +1,55 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdint.h>
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file sleep_retention.h
+ *
+ * This file contains declarations of memory retention related functions in light sleeo mode.
+ */
+
+#if SOC_PM_SUPPORT_CPU_PD
+
+/**
+ * @brief Whether to allow the cpu power domain to be powered off.
+ *
+ * In light sleep mode, only when the system can provide enough memory
+ * for cpu retention, the cpu power domain can be powered off.
+ */
+bool cpu_domain_pd_allowed(void);
+
+#endif
+
+#if SOC_PM_SUPPORT_CPU_PD || SOC_PM_SUPPORT_TAGMEM_PD
+
+/**
+ * @brief Enable memory retention of some modules.
+ *
+ * In light sleep mode, before the system goes to sleep, enable the memory
+ * retention of modules such as CPU and I/D-cache tag memory.
+ */
+void sleep_enable_memory_retention(void);
+
+/**
+ * @brief Disable memory retention of some modules.
+ *
+ * In light sleep mode, after the system exits sleep, disable the memory
+ * retention of moudles such as CPU and I/D-cache tag memory.
+ */
+void sleep_disable_memory_retention(void);
+
+#endif // SOC_PM_SUPPORT_CPU_PD || SOC_PM_SUPPORT_TAGMEM_PD
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_random.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_random.h
new file mode 100644
index 00000000000..a6b8a884b69
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_random.h
@@ -0,0 +1,44 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stddef.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief  Get one random 32-bit word from hardware RNG
+ *
+ * If Wi-Fi or Bluetooth are enabled, this function returns true random numbers. In other
+ * situations, if true random numbers are required then consult the ESP-IDF Programming
+ * Guide "Random Number Generation" section for necessary prerequisites.
+ *
+ * This function automatically busy-waits to ensure enough external entropy has been
+ * introduced into the hardware RNG state, before returning a new random number. This delay
+ * is very short (always less than 100 CPU cycles).
+ *
+ * @return Random value between 0 and UINT32_MAX
+ */
+uint32_t esp_random(void);
+
+/**
+ * @brief Fill a buffer with random bytes from hardware RNG
+ *
+ * @note This function is implemented via calls to esp_random(), so the same
+ * constraints apply.
+ *
+ * @param buf Pointer to buffer to fill with random numbers.
+ * @param len Length of buffer in bytes
+ */
+void esp_fill_random(void *buf, size_t len);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/esp_sleep.h b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_sleep.h
new file mode 100644
index 00000000000..75d2f9726c3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/esp_sleep.h
@@ -0,0 +1,518 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_err.h"
+
+#include "hal/touch_sensor_types.h"
+#include "hal/gpio_types.h"
+
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Logic function used for EXT1 wakeup mode.
+ */
+typedef enum {
+    ESP_EXT1_WAKEUP_ALL_LOW = 0,    //!< Wake the chip when all selected GPIOs go low
+    ESP_EXT1_WAKEUP_ANY_HIGH = 1    //!< Wake the chip when any of the selected GPIOs go high
+} esp_sleep_ext1_wakeup_mode_t;
+
+#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+typedef enum {
+    ESP_GPIO_WAKEUP_GPIO_LOW = 0,
+    ESP_GPIO_WAKEUP_GPIO_HIGH = 1
+} esp_deepsleep_gpio_wake_up_mode_t;
+#endif
+
+/**
+ * @brief Power domains which can be powered down in sleep mode
+ */
+typedef enum {
+    ESP_PD_DOMAIN_RTC_PERIPH,      //!< RTC IO, sensors and ULP co-processor
+    ESP_PD_DOMAIN_RTC_SLOW_MEM,    //!< RTC slow memory
+    ESP_PD_DOMAIN_RTC_FAST_MEM,    //!< RTC fast memory
+    ESP_PD_DOMAIN_XTAL,            //!< XTAL oscillator
+#if SOC_PM_SUPPORT_CPU_PD
+    ESP_PD_DOMAIN_CPU,             //!< CPU core
+#endif
+    ESP_PD_DOMAIN_RTC8M,           //!< Internal 8M oscillator
+    ESP_PD_DOMAIN_VDDSDIO,         //!< VDD_SDIO
+    ESP_PD_DOMAIN_MAX              //!< Number of domains
+} esp_sleep_pd_domain_t;
+
+/**
+ * @brief Power down options
+ */
+typedef enum {
+    ESP_PD_OPTION_OFF,      //!< Power down the power domain in sleep mode
+    ESP_PD_OPTION_ON,       //!< Keep power domain enabled during sleep mode
+    ESP_PD_OPTION_AUTO      //!< Keep power domain enabled in sleep mode, if it is needed by one of the wakeup options. Otherwise power it down.
+} esp_sleep_pd_option_t;
+
+/**
+ * @brief Sleep wakeup cause
+ */
+typedef enum {
+    ESP_SLEEP_WAKEUP_UNDEFINED,    //!< In case of deep sleep, reset was not caused by exit from deep sleep
+    ESP_SLEEP_WAKEUP_ALL,          //!< Not a wakeup cause, used to disable all wakeup sources with esp_sleep_disable_wakeup_source
+    ESP_SLEEP_WAKEUP_EXT0,         //!< Wakeup caused by external signal using RTC_IO
+    ESP_SLEEP_WAKEUP_EXT1,         //!< Wakeup caused by external signal using RTC_CNTL
+    ESP_SLEEP_WAKEUP_TIMER,        //!< Wakeup caused by timer
+    ESP_SLEEP_WAKEUP_TOUCHPAD,     //!< Wakeup caused by touchpad
+    ESP_SLEEP_WAKEUP_ULP,          //!< Wakeup caused by ULP program
+    ESP_SLEEP_WAKEUP_GPIO,         //!< Wakeup caused by GPIO (light sleep only)
+    ESP_SLEEP_WAKEUP_UART,         //!< Wakeup caused by UART (light sleep only)
+    ESP_SLEEP_WAKEUP_WIFI,              //!< Wakeup caused by WIFI (light sleep only)
+    ESP_SLEEP_WAKEUP_COCPU,             //!< Wakeup caused by COCPU int
+    ESP_SLEEP_WAKEUP_COCPU_TRAP_TRIG,   //!< Wakeup caused by COCPU crash
+    ESP_SLEEP_WAKEUP_BT,           //!< Wakeup caused by BT (light sleep only)
+} esp_sleep_source_t;
+
+/* Leave this type define for compatibility */
+typedef esp_sleep_source_t esp_sleep_wakeup_cause_t;
+
+/**
+ * @brief Disable wakeup source
+ *
+ * This function is used to deactivate wake up trigger for source
+ * defined as parameter of the function.
+ *
+ * @note This function does not modify wake up configuration in RTC.
+ *       It will be performed in esp_sleep_start function.
+ *
+ * See docs/sleep-modes.rst for details.
+ *
+ * @param source - number of source to disable of type esp_sleep_source_t
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if trigger was not active
+ */
+esp_err_t esp_sleep_disable_wakeup_source(esp_sleep_source_t source);
+
+#if SOC_ULP_SUPPORTED
+/**
+ * @brief Enable wakeup by ULP coprocessor
+ * @note In revisions 0 and 1 of the ESP32, ULP wakeup source
+ *       cannot be used when RTC_PERIPH power domain is forced
+ *       to be powered on (ESP_PD_OPTION_ON) or when
+ *       ext0 wakeup source is used.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
+ *      - ESP_ERR_INVALID_STATE if ULP co-processor is not enabled or if wakeup triggers conflict
+ */
+esp_err_t esp_sleep_enable_ulp_wakeup(void);
+
+#endif // SOC_ULP_SUPPORTED
+
+/**
+ * @brief Enable wakeup by timer
+ * @param time_in_us  time before wakeup, in microseconds
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if value is out of range (TBD)
+ */
+esp_err_t esp_sleep_enable_timer_wakeup(uint64_t time_in_us);
+
+#if SOC_TOUCH_SENSOR_NUM > 0
+
+/**
+ * @brief Enable wakeup by touch sensor
+ *
+ * @note In revisions 0 and 1 of the ESP32, touch wakeup source
+ *       can not be used when RTC_PERIPH power domain is forced
+ *       to be powered on (ESP_PD_OPTION_ON) or when ext0 wakeup
+ *       source is used.
+ *
+ * @note The FSM mode of the touch button should be configured
+ *       as the timer trigger mode.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
+ *      - ESP_ERR_INVALID_STATE if wakeup triggers conflict
+ */
+esp_err_t esp_sleep_enable_touchpad_wakeup(void);
+
+/**
+ * @brief Get the touch pad which caused wakeup
+ *
+ * If wakeup was caused by another source, this function will return TOUCH_PAD_MAX;
+ *
+ * @return touch pad which caused wakeup
+ */
+touch_pad_t esp_sleep_get_touchpad_wakeup_status(void);
+
+#endif // SOC_TOUCH_SENSOR_NUM > 0
+
+/**
+ * @brief Returns true if a GPIO number is valid for use as wakeup source.
+ *
+ * @note For SoCs with RTC IO capability, this can be any valid RTC IO input pin.
+ *
+ * @param gpio_num Number of the GPIO to test for wakeup source capability
+ *
+ * @return True if this GPIO number will be accepted as a sleep wakeup source.
+ */
+bool esp_sleep_is_valid_wakeup_gpio(gpio_num_t gpio_num);
+
+#if SOC_PM_SUPPORT_EXT_WAKEUP
+
+/**
+ * @brief Enable wakeup using a pin
+ *
+ * This function uses external wakeup feature of RTC_IO peripheral.
+ * It will work only if RTC peripherals are kept on during sleep.
+ *
+ * This feature can monitor any pin which is an RTC IO. Once the pin transitions
+ * into the state given by level argument, the chip will be woken up.
+ *
+ * @note This function does not modify pin configuration. The pin is
+ *       configured in esp_sleep_start, immediately before entering sleep mode.
+ *
+ * @note In revisions 0 and 1 of the ESP32, ext0 wakeup source
+ *       can not be used together with touch or ULP wakeup sources.
+ *
+ * @param gpio_num  GPIO number used as wakeup source. Only GPIOs which are have RTC
+ *             functionality can be used: 0,2,4,12-15,25-27,32-39.
+ * @param level  input level which will trigger wakeup (0=low, 1=high)
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if the selected GPIO is not an RTC GPIO,
+ *        or the mode is invalid
+ *      - ESP_ERR_INVALID_STATE if wakeup triggers conflict
+ */
+esp_err_t esp_sleep_enable_ext0_wakeup(gpio_num_t gpio_num, int level);
+
+/**
+ * @brief Enable wakeup using multiple pins
+ *
+ * This function uses external wakeup feature of RTC controller.
+ * It will work even if RTC peripherals are shut down during sleep.
+ *
+ * This feature can monitor any number of pins which are in RTC IOs.
+ * Once any of the selected pins goes into the state given by mode argument,
+ * the chip will be woken up.
+ *
+ * @note This function does not modify pin configuration. The pins are
+ *       configured in esp_sleep_start, immediately before
+ *       entering sleep mode.
+ *
+ * @note internal pullups and pulldowns don't work when RTC peripherals are
+ *       shut down. In this case, external resistors need to be added.
+ *       Alternatively, RTC peripherals (and pullups/pulldowns) may be
+ *       kept enabled using esp_sleep_pd_config function.
+ *
+ * @param mask  bit mask of GPIO numbers which will cause wakeup. Only GPIOs
+ *              which are have RTC functionality can be used in this bit map:
+ *              0,2,4,12-15,25-27,32-39.
+ * @param mode select logic function used to determine wakeup condition:
+ *            - ESP_EXT1_WAKEUP_ALL_LOW: wake up when all selected GPIOs are low
+ *            - ESP_EXT1_WAKEUP_ANY_HIGH: wake up when any of the selected GPIOs is high
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if any of the selected GPIOs is not an RTC GPIO,
+ *        or mode is invalid
+ */
+esp_err_t esp_sleep_enable_ext1_wakeup(uint64_t mask, esp_sleep_ext1_wakeup_mode_t mode);
+
+#endif // SOC_PM_SUPPORT_EXT_WAKEUP
+
+#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+/**
+ * @brief Enable wakeup using specific gpio pins
+ *
+ * This function enables an IO pin to wake the chip from deep sleep
+ *
+ * @note This function does not modify pin configuration. The pins are
+ *       configured in esp_sleep_start, immediately before
+ *       entering sleep mode.
+ *
+ * @note You don't need to care to pull-up or pull-down before using this
+ *       function, because this will be done in esp_sleep_start based on
+ *       param mask you give. BTW, when you use low level to wake up the
+ *       chip, we strongly recommand you to add external registors(pull-up).
+ *
+ * @param gpio_pin_mask  Bit mask of GPIO numbers which will cause wakeup. Only GPIOs
+ *              which are have RTC functionality can be used in this bit map.
+ * @param mode Select logic function used to determine wakeup condition:
+ *            - ESP_GPIO_WAKEUP_GPIO_LOW: wake up when the gpio turn to low.
+ *            - ESP_GPIO_WAKEUP_GPIO_HIGH: wake up when the gpio turn to high.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if gpio num is more than 5 or mode is invalid,
+ */
+esp_err_t esp_deep_sleep_enable_gpio_wakeup(uint64_t gpio_pin_mask, esp_deepsleep_gpio_wake_up_mode_t mode);
+#endif
+/**
+ * @brief Enable wakeup from light sleep using GPIOs
+ *
+ * Each GPIO supports wakeup function, which can be triggered on either low level
+ * or high level. Unlike EXT0 and EXT1 wakeup sources, this method can be used
+ * both for all IOs: RTC IOs and digital IOs. It can only be used to wakeup from
+ * light sleep though.
+ *
+ * To enable wakeup, first call gpio_wakeup_enable, specifying gpio number and
+ * wakeup level, for each GPIO which is used for wakeup.
+ * Then call this function to enable wakeup feature.
+ *
+ * @note In revisions 0 and 1 of the ESP32, GPIO wakeup source
+ *       can not be used together with touch or ULP wakeup sources.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if wakeup triggers conflict
+ */
+esp_err_t esp_sleep_enable_gpio_wakeup(void);
+
+/**
+ * @brief Enable wakeup from light sleep using UART
+ *
+ * Use uart_set_wakeup_threshold function to configure UART wakeup threshold.
+ *
+ * Wakeup from light sleep takes some time, so not every character sent
+ * to the UART can be received by the application.
+ *
+ * @note ESP32 does not support wakeup from UART2.
+ *
+ * @param uart_num  UART port to wake up from
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if wakeup from given UART is not supported
+ */
+esp_err_t esp_sleep_enable_uart_wakeup(int uart_num);
+
+/**
+ * @brief Enable wakeup by WiFi MAC
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t esp_sleep_enable_wifi_wakeup(void);
+
+/**
+ * @brief Disable wakeup by WiFi MAC
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t esp_sleep_disable_wifi_wakeup(void);
+
+/**
+ * @brief Get the bit mask of GPIOs which caused wakeup (ext1)
+ *
+ * If wakeup was caused by another source, this function will return 0.
+ *
+ * @return bit mask, if GPIOn caused wakeup, BIT(n) will be set
+ */
+uint64_t esp_sleep_get_ext1_wakeup_status(void);
+
+#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+/**
+ * @brief Get the bit mask of GPIOs which caused wakeup (gpio)
+ *
+ * If wakeup was caused by another source, this function will return 0.
+ *
+ * @return bit mask, if GPIOn caused wakeup, BIT(n) will be set
+ */
+uint64_t esp_sleep_get_gpio_wakeup_status(void);
+#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+
+/**
+ * @brief Set power down mode for an RTC power domain in sleep mode
+ *
+ * If not set set using this API, all power domains default to ESP_PD_OPTION_AUTO.
+ *
+ * @param domain  power domain to configure
+ * @param option  power down option (ESP_PD_OPTION_OFF, ESP_PD_OPTION_ON, or ESP_PD_OPTION_AUTO)
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if either of the arguments is out of range
+ */
+esp_err_t esp_sleep_pd_config(esp_sleep_pd_domain_t domain,
+                                   esp_sleep_pd_option_t option);
+
+/**
+ * @brief Enter deep sleep with the configured wakeup options
+ *
+ * This function does not return.
+ */
+void esp_deep_sleep_start(void) __attribute__((noreturn));
+
+/**
+ * @brief Enter light sleep with the configured wakeup options
+ *
+ * @return
+ *  - ESP_OK on success (returned after wakeup)
+ *  - ESP_ERR_INVALID_STATE if WiFi or BT is not stopped
+ */
+esp_err_t esp_light_sleep_start(void);
+
+/**
+ * @brief Enter deep-sleep mode
+ *
+ * The device will automatically wake up after the deep-sleep time
+ * Upon waking up, the device calls deep sleep wake stub, and then proceeds
+ * to load application.
+ *
+ * Call to this function is equivalent to a call to esp_deep_sleep_enable_timer_wakeup
+ * followed by a call to esp_deep_sleep_start.
+ *
+ * esp_deep_sleep does not shut down WiFi, BT, and higher level protocol
+ * connections gracefully.
+ * Make sure relevant WiFi and BT stack functions are called to close any
+ * connections and deinitialize the peripherals. These include:
+ *     - esp_bluedroid_disable
+ *     - esp_bt_controller_disable
+ *     - esp_wifi_stop
+ *
+ * This function does not return.
+ *
+ * @note The device will wake up immediately if the deep-sleep time is set to 0
+ *
+ * @param time_in_us  deep-sleep time, unit: microsecond
+ */
+void esp_deep_sleep(uint64_t time_in_us) __attribute__((noreturn));
+
+
+/**
+ * @brief Get the wakeup source which caused wakeup from sleep
+ *
+ * @return cause of wake up from last sleep (deep sleep or light sleep)
+ */
+esp_sleep_wakeup_cause_t esp_sleep_get_wakeup_cause(void);
+
+
+/**
+ * @brief Default stub to run on wake from deep sleep.
+ *
+ * Allows for executing code immediately on wake from sleep, before
+ * the software bootloader or ESP-IDF app has started up.
+ *
+ * This function is weak-linked, so you can implement your own version
+ * to run code immediately when the chip wakes from
+ * sleep.
+ *
+ * See docs/deep-sleep-stub.rst for details.
+ */
+void esp_wake_deep_sleep(void);
+
+/**
+ * @brief Function type for stub to run on wake from sleep.
+ *
+ */
+typedef void (*esp_deep_sleep_wake_stub_fn_t)(void);
+
+/**
+ * @brief Install a new stub at runtime to run on wake from deep sleep
+ *
+ * If implementing esp_wake_deep_sleep() then it is not necessary to
+ * call this function.
+ *
+ * However, it is possible to call this function to substitute a
+ * different deep sleep stub. Any function used as a deep sleep stub
+ * must be marked RTC_IRAM_ATTR, and must obey the same rules given
+ * for esp_wake_deep_sleep().
+ */
+void esp_set_deep_sleep_wake_stub(esp_deep_sleep_wake_stub_fn_t new_stub);
+
+/**
+ * @brief Get current wake from deep sleep stub
+ * @return Return current wake from deep sleep stub, or NULL if
+ *         no stub is installed.
+ */
+esp_deep_sleep_wake_stub_fn_t esp_get_deep_sleep_wake_stub(void);
+
+/**
+ *  @brief The default esp-idf-provided esp_wake_deep_sleep() stub.
+ *
+ *  See docs/deep-sleep-stub.rst for details.
+ */
+void esp_default_wake_deep_sleep(void);
+
+/**
+ * @brief Disable logging from the ROM code after deep sleep.
+ *
+ * Using LSB of RTC_STORE4.
+ */
+void esp_deep_sleep_disable_rom_logging(void);
+
+#ifdef SOC_PM_SUPPORT_CPU_PD
+/**
+ * @brief CPU Power down low-level initialize
+ *
+ * @param enable  enable or disable CPU power down during light sleep
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NO_MEM not enough retention memory
+ */
+esp_err_t esp_sleep_cpu_pd_low_init(bool enable);
+#endif
+
+#if SOC_GPIO_SUPPORT_SLP_SWITCH
+/**
+ * @brief Configure to isolate all GPIO pins in sleep state
+ */
+void esp_sleep_config_gpio_isolate(void);
+
+/**
+ * @brief Enable or disable GPIO pins status switching between slept status and waked status.
+ * @param enable decide whether to switch status or not
+ */
+void esp_sleep_enable_gpio_switch(bool enable);
+#endif
+
+#if CONFIG_MAC_BB_PD
+/**
+ * @brief Function type for stub to run mac bb power down.
+ */
+typedef void (* mac_bb_power_down_cb_t)(void);
+
+/**
+ * @brief Function type for stub to run mac bb power up.
+ */
+typedef void (* mac_bb_power_up_cb_t)(void);
+
+/**
+ * @brief  Registet mac bb power down callback.
+ * @param  cb mac bb power down callback.
+ * @return
+ *  - ESP_OK on success
+ */
+esp_err_t esp_register_mac_bb_pd_callback(mac_bb_power_down_cb_t cb);
+
+/**
+ * @brief  Unregistet mac bb power down callback.
+ * @param  cb mac bb power down callback.
+ * @return
+ *  - ESP_OK on success
+ */
+esp_err_t esp_unregister_mac_bb_pd_callback(mac_bb_power_down_cb_t cb);
+
+/**
+ * @brief  Registet mac bb power up callback.
+ * @param  cb mac bb power up callback.
+ * @return
+ *  - ESP_OK on success
+ */
+esp_err_t esp_register_mac_bb_pu_callback(mac_bb_power_up_cb_t cb);
+
+/**
+ * @brief  Unregistet mac bb power up callback.
+ * @param  cb mac bb power up callback.
+ * @return
+ *  - ESP_OK on success
+ */
+esp_err_t esp_unregister_mac_bb_pu_callback(mac_bb_power_up_cb_t cb);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/clk_ctrl_os.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/clk_ctrl_os.h
new file mode 100644
index 00000000000..b5eff46930c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/clk_ctrl_os.h
@@ -0,0 +1,42 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "soc/rtc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief This function is used to enable the digital 8m rtc clock,
+ *        to support the peripherals.
+ *
+ * @note If this function is called a number of times, the `periph_rtc_dig_clk8m_disable`
+ *       function needs to be called same times to disable.
+ *
+ * @return true: success for enable the rtc 8M clock, false: rtc 8M clock enable failed
+ */
+bool periph_rtc_dig_clk8m_enable(void);
+
+/**
+ * @brief This function is used to disable the rtc digital clock, which should be called
+ *        with the `periph_rtc_dig_clk8m_enable` pairedly
+ *
+ * @note If this function is called a number of times, the `periph_rtc_dig_clk8m_disable`
+ *       function needs to be called same times to disable.
+ */
+void periph_rtc_dig_clk8m_disable(void);
+
+/**
+ * @brief This function is used to get the real clock frequency value of the rtc clock
+ *
+ * @return The real clock value
+ */
+uint32_t periph_rtc_dig_clk8m_get_freq(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/compare_set.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/compare_set.h
new file mode 100644
index 00000000000..b5a35fa701a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/compare_set.h
@@ -0,0 +1,66 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/cpu.h"
+#include "soc/soc_memory_types.h"
+
+#if __XTENSA__
+#include "xtensa/xtruntime.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline void __attribute__((always_inline)) compare_and_set_native(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
+{
+#if (XCHAL_HAVE_S32C1I > 0)
+    __asm__ __volatile__ (
+        "WSR 	    %2,SCOMPARE1 \n"
+        "S32C1I     %0, %1, 0	 \n"
+        :"=r"(*set)
+        :"r"(addr), "r"(compare), "0"(*set)
+    );
+#else
+    uint32_t old_value;
+
+#ifdef __XTENSA__
+    // No S32C1I, so do this by disabling and re-enabling interrupts (slower)
+    uint32_t intlevel;
+    __asm__ __volatile__ ("rsil %0, " XTSTR(XCHAL_EXCM_LEVEL) "\n"
+                          : "=r"(intlevel));
+#else
+    unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
+#endif
+
+    old_value = *addr;
+    if (old_value == compare) {
+        *addr = *set;
+    }
+
+#ifdef __XTENSA__
+    __asm__ __volatile__ ("memw \n"
+                          "wsr %0, ps\n"
+                          :: "r"(intlevel));
+
+#else
+    RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
+#endif
+
+    *set = old_value;
+#endif
+}
+
+
+void compare_and_set_extram(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/cpu.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/cpu.h
new file mode 100644
index 00000000000..526171bc1ce
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/cpu.h
@@ -0,0 +1,58 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _SOC_CPU_H
+#define _SOC_CPU_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+
+#include "esp_cpu.h"
+
+#if __XTENSA__
+#include "xt_instr_macros.h"
+// [refactor-todo] not actually needed in this header now,
+// but kept for compatibility
+#include "xtensa/corebits.h"
+#include "xtensa/config/core.h"
+
+#include "xtensa/config/specreg.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @brief Read current stack pointer address.
+ * Superseded by esp_cpu_get_sp in esp_cpu.h.
+ */
+static inline __attribute__((deprecated)) void *get_sp(void)
+{
+    return esp_cpu_get_sp();
+}
+
+static inline uint32_t esp_cpu_process_stack_pc(uint32_t pc)
+{
+    if (pc & 0x80000000) {
+        //Top two bits of a0 (return address) specify window increment. Overwrite to map to address space.
+        pc = (pc & 0x3fffffff) | 0x40000000;
+    }
+    //Minus 3 to get PC of previous instruction (i.e. instruction executed before return address)
+    return pc - 3;
+}
+
+/**
+ * @brief Configure CPU to disable access to invalid memory regions
+ *
+ */
+void esp_cpu_configure_region_protection(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/clk.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/clk.h
new file mode 100644
index 00000000000..a9ed3028527
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/clk.h
@@ -0,0 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_private/esp_clk.h"
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/dport_access.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/dport_access.h
new file mode 100644
index 00000000000..8e04674951a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/dport_access.h
@@ -0,0 +1,44 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <sdkconfig.h>
+#include "xtensa/xtruntime.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void esp_dport_access_stall_other_cpu_start(void) __attribute__ ((deprecated));
+void esp_dport_access_stall_other_cpu_end(void) __attribute__ ((deprecated));
+void esp_dport_access_int_init(void) __attribute__ ((deprecated));
+void esp_dport_access_int_pause(void) __attribute__ ((deprecated));
+void esp_dport_access_int_resume(void) __attribute__ ((deprecated));
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+uint32_t esp_dport_access_reg_read(uint32_t reg);
+uint32_t esp_dport_access_sequence_reg_read(uint32_t reg);
+//This routine does not stop the dport routines in any way that is recoverable. Please
+//only call in case of panic().
+void esp_dport_access_int_abort(void) __attribute__ ((deprecated));
+
+#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM)
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+#else
+#include "esp_ipc_isr.h"
+#define DPORT_STALL_OTHER_CPU_START()   esp_ipc_isr_stall_other_cpu()
+#define DPORT_STALL_OTHER_CPU_END()     esp_ipc_isr_release_other_cpu()
+#define DPORT_INTERRUPT_DISABLE()       unsigned int intLvl = XTOS_SET_INTLEVEL(CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL)
+#define DPORT_INTERRUPT_RESTORE()       XTOS_RESTORE_JUST_INTLEVEL(intLvl)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/himem.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/himem.h
new file mode 100644
index 00000000000..e3e85a4ba76
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/himem.h
@@ -0,0 +1,143 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stddef.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//Opaque pointers as handles for ram/range data
+typedef struct esp_himem_ramdata_t *esp_himem_handle_t;
+typedef struct esp_himem_rangedata_t *esp_himem_rangehandle_t;
+
+//ESP32 MMU block size
+#define ESP_HIMEM_BLKSZ (0x8000)
+
+#define ESP_HIMEM_MAPFLAG_RO 1 /*!< Indicates that a mapping will only be read from. Note that this is unused for now. */
+
+/**
+ * @brief Allocate a block in high memory
+ *
+ * @param size Size of the to-be-allocated block, in bytes. Note that this needs to be
+ *             a multiple of the external RAM mmu block size (32K).
+ * @param[out] handle_out Handle to be returned
+ * @returns - ESP_OK if succesful
+ *          - ESP_ERR_NO_MEM if out of memory
+ *          - ESP_ERR_INVALID_SIZE if size is not a multiple of 32K
+ */
+esp_err_t esp_himem_alloc(size_t size, esp_himem_handle_t *handle_out);
+
+
+/**
+ * @brief Allocate a memory region to map blocks into
+ *
+ * This allocates a contiguous CPU memory region that can be used to map blocks
+ * of physical memory into.
+ *
+ * @param size Size of the range to be allocated. Note this needs to be a multiple of
+ *             the external RAM mmu block size (32K).
+ * @param[out] handle_out Handle to be returned
+ * @returns - ESP_OK if succesful
+ *          - ESP_ERR_NO_MEM if out of memory or address space
+ *          - ESP_ERR_INVALID_SIZE if size is not a multiple of 32K
+ */
+esp_err_t esp_himem_alloc_map_range(size_t size, esp_himem_rangehandle_t *handle_out);
+
+/**
+ * @brief Map a block of high memory into the CPUs address space
+ *
+ * This effectively makes the block available for read/write operations.
+ *
+ * @note The region to be mapped needs to have offsets and sizes that are aligned to the
+ *       SPI RAM MMU block size (32K)
+ *
+ * @param handle Handle to the block of memory, as given by esp_himem_alloc
+ * @param range Range handle to map the memory in
+ * @param ram_offset Offset into the block of physical memory of the block to map
+ * @param range_offset Offset into the address range where the block will be mapped
+ * @param len Length of region to map
+ * @param flags One of ESP_HIMEM_MAPFLAG_*
+ * @param[out] out_ptr Pointer to variable to store resulting memory pointer in
+ * @returns - ESP_OK if the memory could be mapped
+ *          - ESP_ERR_INVALID_ARG if offset, range or len aren't MMU-block-aligned (32K)
+ *          - ESP_ERR_INVALID_SIZE if the offsets/lengths don't fit in the allocated memory or range
+ *          - ESP_ERR_INVALID_STATE if a block in the selected ram offset/length is already mapped, or
+ *                                  if a block in the selected range offset/length already has a mapping.
+ */
+esp_err_t esp_himem_map(esp_himem_handle_t handle, esp_himem_rangehandle_t range, size_t ram_offset, size_t range_offset, size_t len, int flags, void **out_ptr);
+
+
+/**
+ * @brief Free a block of physical memory
+ *
+ * This clears out the associated handle making the memory available for re-allocation again.
+ * This will only succeed if none of the memory blocks currently have a mapping.
+ *
+ * @param handle Handle to the block of memory, as given by esp_himem_alloc
+ * @returns - ESP_OK if the memory is succesfully freed
+ *          - ESP_ERR_INVALID_ARG if the handle still is (partially) mapped
+ */
+esp_err_t esp_himem_free(esp_himem_handle_t handle);
+
+
+
+/**
+ * @brief Free a mapping range
+ *
+ * This clears out the associated handle making the range available for re-allocation again.
+ * This will only succeed if none of the range blocks currently are used for a mapping.
+ *
+ * @param handle Handle to the range block, as given by esp_himem_alloc_map_range
+ * @returns - ESP_OK if the memory is succesfully freed
+ *          - ESP_ERR_INVALID_ARG if the handle still is (partially) mapped to
+ */
+esp_err_t esp_himem_free_map_range(esp_himem_rangehandle_t handle);
+
+
+/**
+ * @brief Unmap a region
+ *
+ * @param range Range handle
+ * @param ptr Pointer returned by esp_himem_map
+ * @param len Length of the block to be unmapped. Must be aligned to the SPI RAM MMU blocksize (32K)
+ * @returns - ESP_OK if the memory is succesfully unmapped,
+ *          - ESP_ERR_INVALID_ARG if ptr or len are invalid.
+ */
+esp_err_t esp_himem_unmap(esp_himem_rangehandle_t range, void *ptr, size_t len);
+
+
+/**
+ * @brief Get total amount of memory under control of himem API
+ *
+ * @returns Amount of memory, in bytes
+ */
+size_t esp_himem_get_phys_size(void);
+
+/**
+ * @brief Get free amount of memory under control of himem API
+ *
+ * @returns Amount of free memory, in bytes
+ */
+size_t esp_himem_get_free_size(void);
+
+
+/**
+ * @brief Get amount of SPI memory address space needed for bankswitching
+ *
+ * @note This is also weakly defined in esp32/spiram.c and returns 0 there, so
+ *       if no other function in this file is used, no memory is reserved.
+ *
+ * @returns Amount of reserved area, in bytes
+ */
+size_t esp_himem_reserved_area_size(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/rtc.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/rtc.h
new file mode 100644
index 00000000000..4149546fdad
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/rtc.h
@@ -0,0 +1,31 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/spiram.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/spiram.h
new file mode 100644
index 00000000000..a6086f3d311
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32/spiram.h
@@ -0,0 +1,124 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef __ESP_SPIRAM_H
+#define __ESP_SPIRAM_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ESP_SPIRAM_SIZE_16MBITS = 0,   /*!< SPI RAM size is 16 MBits */
+    ESP_SPIRAM_SIZE_32MBITS = 1,   /*!< SPI RAM size is 32 MBits */
+    ESP_SPIRAM_SIZE_64MBITS = 2,   /*!< SPI RAM size is 64 MBits */
+    ESP_SPIRAM_SIZE_INVALID,       /*!< SPI RAM size is invalid */
+} esp_spiram_size_t;
+
+/**
+ * @brief get SPI RAM size
+ * @return
+ *     - ESP_SPIRAM_SIZE_INVALID if SPI RAM not enabled or not valid
+ *     - SPI RAM size
+ */
+esp_spiram_size_t esp_spiram_get_chip_size(void);
+
+/**
+ * @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_spiram_init(void);
+
+/**
+ * @brief Configure Cache/MMU for access to external SPI RAM.
+ *
+ * Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
+ * option is enabled. Applications which need to enable SPI RAM at run time
+ * can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
+ *
+ * @attention this function must be called with flash cache disabled.
+ */
+void esp_spiram_init_cache(void);
+
+
+/**
+ * @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
+ * (in case of a dual-core system) the app CPU is online. This test overwrites the
+ * memory with crap, so do not call after e.g. the heap allocator has stored important
+ * stuff in SPI RAM.
+ *
+ * @return true on success, false on failed memory test
+ */
+bool esp_spiram_test(void);
+
+
+/**
+ * @brief Add the initialized SPI RAM to the heap allocator.
+ */
+esp_err_t esp_spiram_add_to_heapalloc(void);
+
+
+/**
+ * @brief Get the size of the attached SPI RAM chip selected in menuconfig
+ *
+ * @return Size in bytes, or 0 if no external RAM chip support compiled in.
+ */
+size_t esp_spiram_get_size(void);
+
+
+/**
+ * @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
+ * cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
+ * RAM cache.
+ *
+ * This is meant for use from within the SPI flash code.
+ */
+void esp_spiram_writeback_cache(void);
+
+/**
+ * @brief get psram CS IO
+ *
+ * This interface should be called after PSRAM is enabled, otherwise it will
+ * return an invalid value -1/0xff.
+ *
+ * @return psram CS IO or -1/0xff if psram not enabled
+ */
+uint8_t esp_spiram_get_cs_io(void);
+
+
+/**
+ * @brief Reserve a pool of internal memory for specific DMA/internal allocations
+ *
+ * @param size Size of reserved pool in bytes
+ *
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NO_MEM when no memory available for pool
+ */
+esp_err_t esp_spiram_reserve_dma_pool(size_t size);
+
+
+/**
+ * @brief If SPI RAM(PSRAM) has been initialized
+ *
+ * @return
+ *          - true SPI RAM has been initialized successfully
+ *          - false SPI RAM hasn't been initialized or initialized failed
+ */
+bool esp_spiram_is_initialized(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //  __ESP_SPIRAM_H
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/clk.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/clk.h
new file mode 100644
index 00000000000..a9ed3028527
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/clk.h
@@ -0,0 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_private/esp_clk.h"
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/dport_access.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/dport_access.h
new file mode 100644
index 00000000000..e5aedd2e1b1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/dport_access.h
@@ -0,0 +1,34 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/esp_crypto_lock.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/esp_crypto_lock.h
new file mode 100644
index 00000000000..67a08741b51
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/esp_crypto_lock.h
@@ -0,0 +1,68 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Acquire lock for HMAC cryptography peripheral
+ *
+ * Internally also locks the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_acquire(void);
+
+/**
+ * @brief Release lock for HMAC cryptography peripheral
+ *
+ * Internally also releases the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_release(void);
+
+/**
+ * @brief Acquire lock for DS cryptography peripheral
+ *
+ * Internally also locks the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_acquire(void);
+
+/**
+ * @brief Release lock for DS cryptography peripheral
+ *
+ * Internally also releases the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_release(void);
+
+/**
+ * @brief Acquire lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_acquire(void);
+
+/**
+ * @brief Release lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_release(void);
+
+
+/**
+ * @brief Acquire lock for the mpi cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * @brief Release lock for the mpi/rsa cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/esp_ds.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/esp_ds.h
new file mode 100644
index 00000000000..9d59aa71c6f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/esp_ds.h
@@ -0,0 +1,210 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_hmac.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP32C3_ERR_HW_CRYPTO_DS_HMAC_FAIL           ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
+#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_KEY         ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
+                                                                                HMAC peripheral problem */
+#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_DIGEST      ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
+                                                                                result is invalid */
+#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_PADDING     ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
+                                                                                   is produced anyway and can be read*/
+
+#define ESP_DS_IV_BIT_LEN 128
+#define ESP_DS_IV_LEN (ESP_DS_IV_BIT_LEN / 8)
+#define ESP_DS_SIGNATURE_MAX_BIT_LEN 3072
+#define ESP_DS_SIGNATURE_MD_BIT_LEN 256
+#define ESP_DS_SIGNATURE_M_PRIME_BIT_LEN 32
+#define ESP_DS_SIGNATURE_L_BIT_LEN 32
+#define ESP_DS_SIGNATURE_PADDING_BIT_LEN 64
+
+/* Length of parameter 'C' stored in flash, in bytes
+   - Operands Y, M and r_bar; each 3072 bits
+   - Operand MD (message digest); 256 bits
+   - Operands M' and L; each 32 bits
+   - Operand beta (padding value; 64 bits
+*/
+#define ESP_DS_C_LEN (((ESP_DS_SIGNATURE_MAX_BIT_LEN * 3 \
+        + ESP_DS_SIGNATURE_MD_BIT_LEN   \
+        + ESP_DS_SIGNATURE_M_PRIME_BIT_LEN   \
+        + ESP_DS_SIGNATURE_L_BIT_LEN   \
+        + ESP_DS_SIGNATURE_PADDING_BIT_LEN) / 8))
+
+typedef struct esp_ds_context esp_ds_context_t;
+
+typedef enum {
+    ESP_DS_RSA_1024 = (1024 / 32) - 1,
+    ESP_DS_RSA_2048 = (2048 / 32) - 1,
+    ESP_DS_RSA_3072 = (3072 / 32) - 1
+} esp_digital_signature_length_t;
+
+/**
+ * Encrypted private key data. Recommended to store in flash in this format.
+ *
+ * @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
+ */
+typedef struct esp_digital_signature_data {
+    /**
+     * RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 3072).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     *
+     * @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
+     *       See the ROM code for the original declaration of struct \c ets_ds_data_t.
+     */
+    esp_digital_signature_length_t rsa_length;
+
+    /**
+     * IV value used to encrypt 'c'
+     */
+    uint32_t iv[ESP_DS_IV_BIT_LEN / 32];
+
+    /**
+     * Encrypted Digital Signature parameters. Result of AES-CBC encryption
+     * of plaintext values. Includes an encrypted message digest.
+     */
+    uint8_t c[ESP_DS_C_LEN];
+} esp_ds_data_t;
+
+/**
+ * Plaintext parameters used by Digital Signature.
+ *
+ * This is only used for encrypting the RSA parameters by calling esp_ds_encrypt_params().
+ * Afterwards, the result can be stored in flash or in other persistent memory.
+ * The encryption is a prerequisite step before any signature operation can be done.
+ */
+typedef struct {
+    uint32_t  Y[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA exponent
+    uint32_t  M[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA modulus
+    uint32_t Rb[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA r inverse operand
+    uint32_t M_prime;                               //!< RSA M prime operand
+    uint32_t length;                                //!< RSA length in words (32 bit)
+} esp_ds_p_data_t;
+
+/**
+ * @brief Sign the message with a hardware key from specific key slot.
+ *
+ * This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
+ * in parallel.
+ * It blocks until the signing is finished and then returns the signature.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ *
+ * @return
+ *      - ESP_OK if successful, the signature was written to the parameter \c signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        void *signature);
+
+/**
+ * @brief Start the signing process.
+ *
+ * This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
+ * process.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
+ *       \c esp_ds_finish_sign() in a timely manner.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param esp_ds_ctx the context object which is needed for finishing the signing process later
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ */
+esp_err_t esp_ds_start_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        esp_ds_context_t **esp_ds_ctx);
+
+/**
+ * Return true if the DS peripheral is busy, otherwise false.
+ *
+ * @note Only valid if \c esp_ds_start_sign() was called before.
+ */
+bool esp_ds_is_busy(void);
+
+/**
+ * @brief Finish the signing process.
+ *
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ * @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *        This means that the encrypted RSA key parameters are invalid, indicating that they may have been tampered
+ *        with or indicating a flash error, etc.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches (see TRM for more details).
+ */
+esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
+
+/**
+ * @brief Encrypt the private key parameters.
+ *
+ * The encryption is a prerequisite step before any signature operation can be done.
+ * It is not strictly necessary to use this encryption function, the encryption could also happen on an external
+ * device.
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ *        The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
+ *        at run time.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
+ *        is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
+ *        corresponding HMAC key will be stored to efuse and then permanently erased.
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
+ */
+esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
+        const void *iv,
+        const esp_ds_p_data_t *p_data,
+        const void *key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/esp_hmac.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/esp_hmac.h
new file mode 100644
index 00000000000..26e2bc71a05
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/esp_hmac.h
@@ -0,0 +1,88 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_HMAC_H_
+#define _ESP_HMAC_H_
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The possible efuse keys for the HMAC peripheral
+ */
+typedef enum {
+    HMAC_KEY0 = 0,
+    HMAC_KEY1,
+    HMAC_KEY2,
+    HMAC_KEY3,
+    HMAC_KEY4,
+    HMAC_KEY5,
+    HMAC_KEY_MAX
+} hmac_key_id_t;
+
+/**
+ * @brief
+ * Calculate the HMAC of a given message.
+ *
+ * Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
+ * SHA256 is used for the calculation (fixed on ESP32S2).
+ *
+ * @note Uses the HMAC peripheral in "upstream" mode.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
+ *        The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
+ * @param message the message for which to calculate the HMAC
+ * @param message_len message length
+ *             return ESP_ERR_INVALID_STATE if unsuccessful
+ * @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *      * ESP_FAIL, if the hmac calculation failed
+ */
+esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
+        const void *message,
+        size_t message_len,
+        uint8_t *hmac);
+
+/**
+ * @brief Use HMAC peripheral in Downstream mode to re-enable the JTAG, if it is not permanently disabled by HW.
+ *        In downstream mode, HMAC calculations performed by peripheral are used internally and not provided back to user.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calculation.
+ *        The corresponding purpose field of the key block in the efuse must be set to HMAC downstream purpose.
+ *
+ * @param token Pre calculated HMAC value of the 32-byte 0x00 using SHA-256 and the known private HMAC key. The key is already
+ *        programmed to a eFuse key block. The key block number is provided as the first parameter to this function.
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *                if the calculated HMAC value matches with provided token,
+ *                JTAG will be re-enable otherwise JTAG will remain disabled.
+ *                Return value does not indicate the JTAG status.
+ *      * ESP_FAIL, if the hmac calculation failed or JTAG is permanently disabled by EFUSE_HARD_DIS_JTAG eFuse parameter.
+ *      * ESP_ERR_INVALID_ARG, invalid input arguments
+ */
+esp_err_t esp_hmac_jtag_enable(hmac_key_id_t key_id, const uint8_t *token);
+
+/**
+ *  @brief Disable the JTAG which might be enabled using the HMAC downstream mode. This function just clears the result generated
+ *         by calling esp_hmac_jtag_enable() API.
+ *
+ *  @return
+ *       * ESP_OK return ESP_OK after writing the HMAC_SET_INVALIDATE_JTAG_REG with value 1.
+ */
+esp_err_t esp_hmac_jtag_disable(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_HMAC_H_
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/rtc.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/rtc.h
new file mode 100644
index 00000000000..4d46831ded3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/rtc.h
@@ -0,0 +1,32 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32c3/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h
new file mode 100644
index 00000000000..318c6109617
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32c3/soc_memprot_types.h
@@ -0,0 +1,175 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-C3 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_IRAM0_SRAM                     = 0x00000001,
+    MEMPROT_TYPE_DRAM0_SRAM                     = 0x00000002,
+    MEMPROT_TYPE_IRAM0_RTCFAST                  = 0x00000004,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000,
+    MEMPROT_TYPE_IRAM0_ANY                      = MEMPROT_TYPE_IRAM0_SRAM | MEMPROT_TYPE_IRAM0_RTCFAST
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_IRAM0_DRAM0              = 0x00000001,
+    MEMPROT_SPLIT_ADDR_IRAM0_LINE_0             = 0x00000002,
+    MEMPROT_SPLIT_ADDR_IRAM0_LINE_1             = 0x00000004,
+    MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_0         = 0x00000008,
+    MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_1         = 0x00000010,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000,
+    MEMPROT_SPLIT_ADDR_MAIN                     = MEMPROT_SPLIT_ADDR_IRAM0_DRAM0
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_IRAM0_0                    = 0x00000001,
+    MEMPROT_PMS_AREA_IRAM0_1                    = 0x00000002,
+    MEMPROT_PMS_AREA_IRAM0_2                    = 0x00000004,
+    MEMPROT_PMS_AREA_IRAM0_3                    = 0x00000008,
+    MEMPROT_PMS_AREA_DRAM0_0                    = 0x00000010,
+    MEMPROT_PMS_AREA_DRAM0_1                    = 0x00000020,
+    MEMPROT_PMS_AREA_DRAM0_2                    = 0x00000040,
+    MEMPROT_PMS_AREA_DRAM0_3                    = 0x00000080,
+    MEMPROT_PMS_AREA_IRAM0_RTCFAST_LO           = 0x00000100,
+    MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI           = 0x00000200,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "NONE";
+    case MEMPROT_TYPE_IRAM0_SRAM:
+        return "IRAM0_SRAM";
+    case MEMPROT_TYPE_DRAM0_SRAM:
+        return "DRAM0_SRAM";
+    case MEMPROT_TYPE_IRAM0_RTCFAST:
+        return "IRAM0_RTCFAST";
+    case MEMPROT_TYPE_IRAM0_ANY:
+        return "IRAM0_ANY";
+    case MEMPROT_TYPE_ALL:
+        return "ALL";
+    default:
+        return "INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_IRAM0_DRAM0:
+        return "SPLIT_ADDR_IRAM0_DRAM0";
+    case MEMPROT_SPLIT_ADDR_IRAM0_LINE_0:
+        return "SPLIT_ADDR_IRAM0_LINE_0";
+    case MEMPROT_SPLIT_ADDR_IRAM0_LINE_1:
+        return "SPLIT_ADDR_IRAM0_LINE_1";
+    case MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_0:
+        return "SPLIT_ADDR_DRAM0_DMA_LINE_0";
+    case MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_1:
+        return "SPLIT_ADDR_DRAM0_DMA_LINE_1";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "SPLIT_ADDR_ALL";
+    default:
+        return "SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_IRAM0_0:
+        return "PMS_AREA_IRAM0_0";
+    case MEMPROT_PMS_AREA_IRAM0_1:
+        return "PMS_AREA_IRAM0_1";
+    case MEMPROT_PMS_AREA_IRAM0_2:
+        return "PMS_AREA_IRAM0_2";
+    case MEMPROT_PMS_AREA_IRAM0_3:
+        return "PMS_AREA_IRAM0_3";
+    case MEMPROT_PMS_AREA_DRAM0_0:
+        return "PMS_AREA_DRAM0_0";
+    case MEMPROT_PMS_AREA_DRAM0_1:
+        return "PMS_AREA_DRAM0_1";
+    case MEMPROT_PMS_AREA_DRAM0_2:
+        return "PMS_AREA_DRAM0_2";
+    case MEMPROT_PMS_AREA_DRAM0_3:
+        return "PMS_AREA_DRAM0_3";
+    case MEMPROT_PMS_AREA_IRAM0_RTCFAST_LO:
+        return "PMS_AREA_IRAM0_RTCFAST_LO";
+    case MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI:
+        return "PMS_AREA_IRAM0_RTCFAST_HI";
+    case MEMPROT_PMS_AREA_ALL:
+        return "PMS_AREA_ALL";
+    default:
+        return "PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/clk.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/clk.h
new file mode 100644
index 00000000000..a9ed3028527
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/clk.h
@@ -0,0 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_private/esp_clk.h"
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/dport_access.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/dport_access.h
new file mode 100644
index 00000000000..e5aedd2e1b1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/dport_access.h
@@ -0,0 +1,34 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h
new file mode 100644
index 00000000000..67a08741b51
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h
@@ -0,0 +1,68 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Acquire lock for HMAC cryptography peripheral
+ *
+ * Internally also locks the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_acquire(void);
+
+/**
+ * @brief Release lock for HMAC cryptography peripheral
+ *
+ * Internally also releases the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_release(void);
+
+/**
+ * @brief Acquire lock for DS cryptography peripheral
+ *
+ * Internally also locks the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_acquire(void);
+
+/**
+ * @brief Release lock for DS cryptography peripheral
+ *
+ * Internally also releases the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_release(void);
+
+/**
+ * @brief Acquire lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_acquire(void);
+
+/**
+ * @brief Release lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_release(void);
+
+
+/**
+ * @brief Acquire lock for the mpi cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * @brief Release lock for the mpi/rsa cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/esp_ds.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/esp_ds.h
new file mode 100644
index 00000000000..6bad7075587
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/esp_ds.h
@@ -0,0 +1,210 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_hmac.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP32H2_ERR_HW_CRYPTO_DS_HMAC_FAIL           ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_KEY         ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
+                                                                                HMAC peripheral problem */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_DIGEST      ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
+                                                                                result is invalid */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_PADDING     ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
+                                                                                   is produced anyway and can be read*/
+
+#define ESP_DS_IV_BIT_LEN 128
+#define ESP_DS_IV_LEN (ESP_DS_IV_BIT_LEN / 8)
+#define ESP_DS_SIGNATURE_MAX_BIT_LEN 3072
+#define ESP_DS_SIGNATURE_MD_BIT_LEN 256
+#define ESP_DS_SIGNATURE_M_PRIME_BIT_LEN 32
+#define ESP_DS_SIGNATURE_L_BIT_LEN 32
+#define ESP_DS_SIGNATURE_PADDING_BIT_LEN 64
+
+/* Length of parameter 'C' stored in flash, in bytes
+   - Operands Y, M and r_bar; each 3072 bits
+   - Operand MD (message digest); 256 bits
+   - Operands M' and L; each 32 bits
+   - Operand beta (padding value; 64 bits
+*/
+#define ESP_DS_C_LEN (((ESP_DS_SIGNATURE_MAX_BIT_LEN * 3 \
+        + ESP_DS_SIGNATURE_MD_BIT_LEN   \
+        + ESP_DS_SIGNATURE_M_PRIME_BIT_LEN   \
+        + ESP_DS_SIGNATURE_L_BIT_LEN   \
+        + ESP_DS_SIGNATURE_PADDING_BIT_LEN) / 8))
+
+typedef struct esp_ds_context esp_ds_context_t;
+
+typedef enum {
+    ESP_DS_RSA_1024 = (1024 / 32) - 1,
+    ESP_DS_RSA_2048 = (2048 / 32) - 1,
+    ESP_DS_RSA_3072 = (3072 / 32) - 1
+} esp_digital_signature_length_t;
+
+/**
+ * Encrypted private key data. Recommended to store in flash in this format.
+ *
+ * @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
+ */
+typedef struct esp_digital_signature_data {
+    /**
+     * RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 3072).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     *
+     * @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
+     *       See the ROM code for the original declaration of struct \c ets_ds_data_t.
+     */
+    esp_digital_signature_length_t rsa_length;
+
+    /**
+     * IV value used to encrypt 'c'
+     */
+    uint32_t iv[ESP_DS_IV_BIT_LEN / 32];
+
+    /**
+     * Encrypted Digital Signature parameters. Result of AES-CBC encryption
+     * of plaintext values. Includes an encrypted message digest.
+     */
+    uint8_t c[ESP_DS_C_LEN];
+} esp_ds_data_t;
+
+/**
+ * Plaintext parameters used by Digital Signature.
+ *
+ * This is only used for encrypting the RSA parameters by calling esp_ds_encrypt_params().
+ * Afterwards, the result can be stored in flash or in other persistent memory.
+ * The encryption is a prerequisite step before any signature operation can be done.
+ */
+typedef struct {
+    uint32_t  Y[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA exponent
+    uint32_t  M[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA modulus
+    uint32_t Rb[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA r inverse operand
+    uint32_t M_prime;                               //!< RSA M prime operand
+    uint32_t length;                                //!< RSA length in words (32 bit)
+} esp_ds_p_data_t;
+
+/**
+ * @brief Sign the message with a hardware key from specific key slot.
+ *
+ * This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
+ * in parallel.
+ * It blocks until the signing is finished and then returns the signature.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ *
+ * @return
+ *      - ESP_OK if successful, the signature was written to the parameter \c signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        void *signature);
+
+/**
+ * @brief Start the signing process.
+ *
+ * This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
+ * process.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
+ *       \c esp_ds_finish_sign() in a timely manner.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param esp_ds_ctx the context object which is needed for finishing the signing process later
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ */
+esp_err_t esp_ds_start_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        esp_ds_context_t **esp_ds_ctx);
+
+/**
+ * Return true if the DS peripheral is busy, otherwise false.
+ *
+ * @note Only valid if \c esp_ds_start_sign() was called before.
+ */
+bool esp_ds_is_busy(void);
+
+/**
+ * @brief Finish the signing process.
+ *
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ * @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *        This means that the encrypted RSA key parameters are invalid, indicating that they may have been tampered
+ *        with or indicating a flash error, etc.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches (see TRM for more details).
+ */
+esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
+
+/**
+ * @brief Encrypt the private key parameters.
+ *
+ * The encryption is a prerequisite step before any signature operation can be done.
+ * It is not strictly necessary to use this encryption function, the encryption could also happen on an external
+ * device.
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ *        The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
+ *        at run time.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
+ *        is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
+ *        corresponding HMAC key will be stored to efuse and then permanently erased.
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
+ */
+esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
+        const void *iv,
+        const esp_ds_p_data_t *p_data,
+        const void *key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h
new file mode 100644
index 00000000000..26e2bc71a05
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h
@@ -0,0 +1,88 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_HMAC_H_
+#define _ESP_HMAC_H_
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The possible efuse keys for the HMAC peripheral
+ */
+typedef enum {
+    HMAC_KEY0 = 0,
+    HMAC_KEY1,
+    HMAC_KEY2,
+    HMAC_KEY3,
+    HMAC_KEY4,
+    HMAC_KEY5,
+    HMAC_KEY_MAX
+} hmac_key_id_t;
+
+/**
+ * @brief
+ * Calculate the HMAC of a given message.
+ *
+ * Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
+ * SHA256 is used for the calculation (fixed on ESP32S2).
+ *
+ * @note Uses the HMAC peripheral in "upstream" mode.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
+ *        The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
+ * @param message the message for which to calculate the HMAC
+ * @param message_len message length
+ *             return ESP_ERR_INVALID_STATE if unsuccessful
+ * @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *      * ESP_FAIL, if the hmac calculation failed
+ */
+esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
+        const void *message,
+        size_t message_len,
+        uint8_t *hmac);
+
+/**
+ * @brief Use HMAC peripheral in Downstream mode to re-enable the JTAG, if it is not permanently disabled by HW.
+ *        In downstream mode, HMAC calculations performed by peripheral are used internally and not provided back to user.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calculation.
+ *        The corresponding purpose field of the key block in the efuse must be set to HMAC downstream purpose.
+ *
+ * @param token Pre calculated HMAC value of the 32-byte 0x00 using SHA-256 and the known private HMAC key. The key is already
+ *        programmed to a eFuse key block. The key block number is provided as the first parameter to this function.
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *                if the calculated HMAC value matches with provided token,
+ *                JTAG will be re-enable otherwise JTAG will remain disabled.
+ *                Return value does not indicate the JTAG status.
+ *      * ESP_FAIL, if the hmac calculation failed or JTAG is permanently disabled by EFUSE_HARD_DIS_JTAG eFuse parameter.
+ *      * ESP_ERR_INVALID_ARG, invalid input arguments
+ */
+esp_err_t esp_hmac_jtag_enable(hmac_key_id_t key_id, const uint8_t *token);
+
+/**
+ *  @brief Disable the JTAG which might be enabled using the HMAC downstream mode. This function just clears the result generated
+ *         by calling esp_hmac_jtag_enable() API.
+ *
+ *  @return
+ *       * ESP_OK return ESP_OK after writing the HMAC_SET_INVALIDATE_JTAG_REG with value 1.
+ */
+esp_err_t esp_hmac_jtag_disable(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_HMAC_H_
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/rtc.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/rtc.h
new file mode 100644
index 00000000000..75460416c7d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/rtc.h
@@ -0,0 +1,32 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32h2/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h
new file mode 100644
index 00000000000..3048088eba4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-H2 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() {\
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/clk.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/clk.h
new file mode 100644
index 00000000000..a9ed3028527
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/clk.h
@@ -0,0 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_private/esp_clk.h"
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/dport_access.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/dport_access.h
new file mode 100644
index 00000000000..e5aedd2e1b1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/dport_access.h
@@ -0,0 +1,34 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/esp_crypto_lock.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/esp_crypto_lock.h
new file mode 100644
index 00000000000..2c337c93714
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/esp_crypto_lock.h
@@ -0,0 +1,43 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * This API should be used by all components which use the SHA, AES, HMAC and DS crypto hardware on the ESP32S2.
+ * They can not be used in parallel because they use the same DMA or are calling each other.
+ * E.g., HMAC uses SHA or DS uses HMAC and AES. See the ESP32S2 Technical Reference Manual for more details.
+ *
+ * Other unrelated components must not use it.
+ */
+
+/**
+ * Acquire lock for the AES and SHA cryptography peripherals, which both use the crypto DMA.
+ */
+void esp_crypto_dma_lock_acquire(void);
+
+/**
+ * Release lock for the AES and SHA cryptography peripherals, which both use the crypto DMA.
+ */
+void esp_crypto_dma_lock_release(void);
+
+/**
+ * Acquire lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * Release lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/esp_ds.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/esp_ds.h
new file mode 100644
index 00000000000..2ef0bd00fbe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/esp_ds.h
@@ -0,0 +1,190 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_hmac.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL           ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
+#define ESP_ERR_HW_CRYPTO_DS_INVALID_KEY         ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
+                                                                                HMAC peripheral problem */
+#define ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST      ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
+                                                                                result is invalid */
+#define ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING     ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
+                                                                                   is produced anyway and can be read*/
+
+#define ESP_DS_IV_LEN 16
+
+/* Length of parameter 'C' stored in flash */
+#define ESP_DS_C_LEN (12672 / 8)
+
+typedef struct esp_ds_context esp_ds_context_t;
+
+typedef enum {
+    ESP_DS_RSA_1024 = (1024 / 32) - 1,
+    ESP_DS_RSA_2048 = (2048 / 32) - 1,
+    ESP_DS_RSA_3072 = (3072 / 32) - 1,
+    ESP_DS_RSA_4096 = (4096 / 32) - 1
+} esp_digital_signature_length_t;
+
+/**
+ * Encrypted private key data. Recommended to store in flash in this format.
+ *
+ * @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
+ */
+typedef struct esp_digital_signature_data {
+    /**
+     * RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 4096).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     *
+     * @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
+     *       See the ROM code for the original declaration of struct \c ets_ds_data_t.
+     */
+    esp_digital_signature_length_t rsa_length;
+
+    /**
+     * IV value used to encrypt 'c'
+     */
+    uint8_t iv[ESP_DS_IV_LEN];
+
+    /**
+     * Encrypted Digital Signature parameters. Result of AES-CBC encryption
+     * of plaintext values. Includes an encrypted message digest.
+     */
+    uint8_t c[ESP_DS_C_LEN];
+} esp_ds_data_t;
+
+/** Plaintext parameters used by Digital Signature.
+ *
+ * Not used for signing with DS peripheral, but can be encrypted
+ * in-device by calling esp_ds_encrypt_params()
+ *
+ * @note This documentation is mostly taken from the ROM code.
+ */
+typedef struct {
+    uint32_t Y[4096/32];                    //!< RSA exponent
+    uint32_t M[4096/32];                    //!< RSA modulus
+    uint32_t Rb[4096/32];                   //!< RSA r inverse operand
+    uint32_t M_prime;                       //!< RSA M prime operand
+    esp_digital_signature_length_t length;  //!< RSA length
+} esp_ds_p_data_t;
+
+/**
+ * Sign the message.
+ *
+ * This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
+ * in parallel.
+ * It blocks until the signing is finished and then returns the signature.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ *
+ * @return
+ *      - ESP_OK if successful, the signature was written to the parameter \c signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        void *signature);
+
+/**
+ * Start the signing process.
+ *
+ * This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
+ * process.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
+ *       \c esp_ds_finish_sign() in a timely manner.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param esp_ds_ctx the context object which is needed for finishing the signing process later
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ */
+esp_err_t esp_ds_start_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        esp_ds_context_t **esp_ds_ctx);
+
+/**
+ * Return true if the DS peripheral is busy, otherwise false.
+ *
+ * @note Only valid if \c esp_ds_start_sign() was called before.
+ */
+bool esp_ds_is_busy(void);
+
+/**
+ * Finish the signing process.
+ *
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ * @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
+
+/**
+ * Encrypt the private key parameters.
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ *        The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
+ *        at run time.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
+ *        is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
+ *        corresponding HMAC key will be stored to efuse and then permanently erased.
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
+ */
+esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
+        const void *iv,
+        const esp_ds_p_data_t *p_data,
+        const void *key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/esp_hmac.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/esp_hmac.h
new file mode 100644
index 00000000000..409217c06bc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/esp_hmac.h
@@ -0,0 +1,91 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_HMAC_H_
+#define _ESP_HMAC_H_
+
+#include "esp_err.h"
+#include "stdbool.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The possible efuse keys for the HMAC peripheral
+ */
+typedef enum {
+    HMAC_KEY0 = 0,
+    HMAC_KEY1,
+    HMAC_KEY2,
+    HMAC_KEY3,
+    HMAC_KEY4,
+    HMAC_KEY5,
+    HMAC_KEY_MAX
+} hmac_key_id_t;
+
+/**
+ * @brief
+ * Calculate the HMAC of a given message.
+ *
+ * Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
+ * SHA256 is used for the calculation (fixed on ESP32S2).
+ *
+ * @note Uses the HMAC peripheral in "upstream" mode.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
+ *        The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
+ * @param message the message for which to calculate the HMAC
+ * @param message_len message length
+ *             return ESP_ERR_INVALID_STATE if unsuccessful
+ * @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *      * ESP_FAIL, if the hmac calculation failed
+ */
+esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
+        const void *message,
+        size_t message_len,
+        uint8_t *hmac);
+
+/**
+ * @brief
+ * Use HMAC peripheral in Downstream mode to re-enable the JTAG, if it is not permanently disable by HW.
+ * In downstream mode HMAC calculations perfomred by peripheral used internally and not provided back to user.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calculation.
+ *        The corresponding purpose field of the key block in the efuse must be set to HMAC downstream purpose.
+ *
+ * @param token Pre calculated HMAC value of the 32-byte 0x00 using SHA-256 and the known private HMAC key. The key is already
+ *        programmed to a eFuse key block. The key block number is provided as the first parameter to this function.
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *                if the calculated HMAC value matches with provided token,
+ *                JTAG will be re-enable otherwise JTAG will remain disabled.
+ *                Return value does not indicate the JTAG status.
+ *      * ESP_FAIL, if the hmac calculation failed or JTAG is permanently disabled by EFUSE_HARD_DIS_JTAG eFuse parameter.
+ *      * ESP_ERR_INVALID_ARG, invalid input arguments
+ */
+esp_err_t esp_hmac_jtag_enable(hmac_key_id_t key_id,
+        const uint8_t *token);
+
+/**
+ *  @brief
+ *  Disable the JTAG which might be enable using the HMAC downstream mode. This function just clear the result generated by
+ *  JTAG key by calling esp_hmac_jtag_enable() API.
+ *
+ *  @return
+ *       * ESP_OK return ESP_OK after writing the HMAC_SET_INVALIDATE_JTAG_REG with value 1.
+ */
+esp_err_t esp_hmac_jtag_disable(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_HMAC_H_
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/memprot.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/memprot.h
similarity index 59%
rename from tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/memprot.h
rename to tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/memprot.h
index 948e0676680..0ebd6474578 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/memprot.h
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/memprot.h
@@ -4,7 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-
 /* INTERNAL API
  * generic interface to MMU memory protection features
  */
@@ -13,20 +12,49 @@
 #include <stdbool.h>
 #include <stdint.h>
 #include "esp_attr.h"
+#include "esp_err.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+//convenient constants for better code readabilty
+#define RD_ENA                  true
+#define RD_DIS                  false
+#define WR_ENA                  true
+#define WR_DIS                  false
+#define EX_ENA                  true
+#define EX_DIS                  false
+#define RD_LOW_ENA              true
+#define RD_LOW_DIS              false
+#define WR_LOW_ENA              true
+#define WR_LOW_DIS              false
+#define EX_LOW_ENA              true
+#define EX_LOW_DIS              false
+#define RD_HIGH_ENA             true
+#define RD_HIGH_DIS             false
+#define WR_HIGH_ENA             true
+#define WR_HIGH_DIS             false
+#define EX_HIGH_ENA             true
+#define EX_HIGH_DIS             false
+#define PANIC_HNDL_ON           true
+#define PANIC_HNDL_OFF          false
+#define MEMPROT_LOCK            true
+#define MEMPROT_UNLOCK          false
+#define DEF_SPLIT_LINE          NULL
+
+#define MEMPROT_INVALID_ADDRESS -1
+
+//memory range types
 typedef enum {
     MEMPROT_NONE =              0x00000000,
-    MEMPROT_IRAM0_SRAM =        0x00000001,
-    MEMPROT_DRAM0_SRAM =        0x00000002,
-    MEMPROT_IRAM0_RTCFAST =     0x00000004,
-    MEMPROT_DRAM0_RTCFAST =     0x00000008,
-    MEMPROT_PERI1_RTCSLOW =     0x00000010,
-    MEMPROT_PERI2_RTCSLOW_0 =   0x00000020,
-    MEMPROT_PERI2_RTCSLOW_1 =   0x00000040,
+    MEMPROT_IRAM0_SRAM =        0x00000001, //0x40020000-0x4006FFFF, RWX
+    MEMPROT_DRAM0_SRAM =        0x00000002, //0x3FFB0000-0x3FFFFFFF, RW
+    MEMPROT_IRAM0_RTCFAST =     0x00000004, //0x40070000-0x40071FFF, RWX
+    MEMPROT_DRAM0_RTCFAST =     0x00000008, //0x3FF9E000-0x3FF9FFFF, RW
+    MEMPROT_PERI1_RTCSLOW =     0x00000010, //0x3F421000-0x3F423000, RW
+    MEMPROT_PERI2_RTCSLOW_0 =   0x00000020, //0x50001000-0x50003000, RWX
+    MEMPROT_PERI2_RTCSLOW_1 =   0x00000040, //0x60002000-0x60004000, RWX
     MEMPROT_ALL =               0xFFFFFFFF
 } mem_type_prot_t;
 
@@ -43,23 +71,27 @@ typedef enum {
 uint32_t *IRAM_ATTR esp_memprot_get_split_addr(mem_type_prot_t mem_type);
 
 /**
- * @brief Initializes illegal memory access control (MMU) for required memory section.
+ * @brief Initializes illegal memory access control for required memory section.
  *
  * All memory access interrupts share ETS_MEMACCESS_ERR_INUM input channel, it is caller's
  * responsibility to properly detect actual intr. source as well as possible prioritization in case
  * of multiple source reported during one intr.handling routine run
  *
- *  @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)\
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_intr_init(mem_type_prot_t mem_type);
+esp_err_t esp_memprot_intr_init(mem_type_prot_t mem_type);
 
 /**
  * @brief Enable/disable the memory protection interrupt
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
  * @param enable enable/disable
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_intr_ena(mem_type_prot_t mem_type, bool enable);
+esp_err_t esp_memprot_intr_ena(mem_type_prot_t mem_type, bool enable);
 
 /**
  * @brief Sets a request for clearing interrupt-on flag for specified memory region (register write)
@@ -68,8 +100,10 @@ void esp_memprot_intr_ena(mem_type_prot_t mem_type, bool enable);
  * Should be used only after the real interrupt appears, typically as the last step in interrupt handler's routine.
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_clear_intr(mem_type_prot_t mem_type);
+esp_err_t esp_memprot_clear_intr(mem_type_prot_t mem_type);
 
 /**
  * @brief Detects which memory protection interrupt is active
@@ -88,10 +122,11 @@ mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
  * @brief Gets interrupt status register contents for specified memory region
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param fault_reg_val Contents of status register
  *
- * @return Contents of status register
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-uint32_t esp_memprot_get_fault_reg(mem_type_prot_t mem_type);
+esp_err_t esp_memprot_get_fault_reg(mem_type_prot_t mem_type, uint32_t *fault_reg_val);
 
 /**
  * @brief Get details of given interrupt status
@@ -104,8 +139,9 @@ uint32_t esp_memprot_get_fault_reg(mem_type_prot_t mem_type);
  * @param op_subtype Additional info for op_type [out]
  *               IRAM0: 0 - instruction segment access, 1 - data segment access
  *               DRAM0: 0 - non-atomic operation, 1 - atomic operation
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void IRAM_ATTR esp_memprot_get_fault_status(mem_type_prot_t mem_type, uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype);
+esp_err_t IRAM_ATTR esp_memprot_get_fault_status(mem_type_prot_t mem_type, uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype);
 
 /**
  * @brief Gets string representation of required memory region identifier
@@ -129,26 +165,30 @@ bool esp_memprot_is_locked_any(void);
  * Locks can be unlocked only by digital system reset
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_set_lock(mem_type_prot_t mem_type);
+esp_err_t esp_memprot_set_lock(mem_type_prot_t mem_type);
 
 /**
  * @brief Gets lock status for required memory region
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param locked Settings locked: true/false (locked/unlocked)
  *
- * @return true/false (locked/unlocked)
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-bool esp_memprot_get_lock(mem_type_prot_t mem_type);
+esp_err_t esp_memprot_get_lock(mem_type_prot_t mem_type, bool *locked);
 
 /**
  * @brief Gets permission control configuration register contents for required memory region
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param conf_reg_val Permission control register contents
  *
- * @return Permission control register contents
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-uint32_t esp_memprot_get_conf_reg(mem_type_prot_t mem_type);
+esp_err_t esp_memprot_get_conf_reg(mem_type_prot_t mem_type, uint32_t *conf_reg_val);
 
 /**
  * @brief Gets interrupt permission settings for unified management block
@@ -156,21 +196,23 @@ uint32_t esp_memprot_get_conf_reg(mem_type_prot_t mem_type);
  * Gets interrupt permission settings register contents for required memory region, returns settings for unified management blocks
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param perm_reg Permission settings register contents
  *
- * @return Permission settings register contents
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-uint32_t esp_memprot_get_perm_uni_reg(mem_type_prot_t mem_type);
+esp_err_t esp_memprot_get_perm_uni_reg(mem_type_prot_t mem_type, uint32_t *perm_reg);
 
 /**
  * @brief Gets interrupt permission settings for split management block
  *
- * Gets interrupt permission settings register contents for required memory region, returns settings for split management blocks
+ * Gets interrupt permission settings register contents for required memory region (unified management blocks)
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @return split_reg Unified management settings register contents
  *
- * @return Permission settings register contents
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-uint32_t esp_memprot_get_perm_split_reg(mem_type_prot_t mem_type);
+esp_err_t esp_memprot_get_perm_split_reg(mem_type_prot_t mem_type, uint32_t *split_reg);
 
 /**
  * @brief Detects whether any of the memory protection interrupts is enabled
@@ -183,28 +225,30 @@ bool esp_memprot_is_intr_ena_any(void);
  * @brief Gets interrupt-enabled flag for given memory region
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param enable_bit Interrupt-enabled flag
  *
- * @return Interrupt-enabled value
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-uint32_t esp_memprot_get_intr_ena_bit(mem_type_prot_t mem_type);
+esp_err_t esp_memprot_get_intr_ena_bit(mem_type_prot_t mem_type, uint32_t *enable_bit);
 
 /**
  * @brief Gets interrupt-active flag for given memory region
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param intr_on_bit Interrupt-active flag
  *
- * @return Interrupt-active value
- */
-uint32_t esp_memprot_get_intr_on_bit(mem_type_prot_t mem_type);
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure */
+esp_err_t esp_memprot_get_intr_on_bit(mem_type_prot_t mem_type, uint32_t *intr_on_bit);
 
 /**
  * @brief Gets interrupt-clear request flag for given memory region
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param clear_bit Interrupt-clear request flag
  *
- * @return Interrupt-clear request value
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-uint32_t esp_memprot_get_intr_clr_bit(mem_type_prot_t mem_type);
+esp_err_t esp_memprot_get_intr_clr_bit(mem_type_prot_t mem_type, uint32_t *clear_bit);
 
 /**
  * @brief Gets read permission value for specified block and memory region
@@ -214,10 +258,11 @@ uint32_t esp_memprot_get_intr_clr_bit(mem_type_prot_t mem_type);
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
  * @param block Memory block identifier (0-3)
+ * @param read_bit Read permission value for required block
  *
- * @return Read permission value for required block
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-uint32_t esp_memprot_get_uni_block_read_bit(mem_type_prot_t mem_type, uint32_t block);
+esp_err_t esp_memprot_get_uni_block_read_bit(mem_type_prot_t mem_type, uint32_t block, uint32_t *read_bit);
 
 /**
  * @brief Gets write permission value for specified block and memory region
@@ -227,10 +272,11 @@ uint32_t esp_memprot_get_uni_block_read_bit(mem_type_prot_t mem_type, uint32_t b
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
  * @param block Memory block identifier (0-3)
+ * @param write_bit Write permission value for required block
  *
- * @return Write permission value for required block
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-uint32_t esp_memprot_get_uni_block_write_bit(mem_type_prot_t mem_type, uint32_t block);
+esp_err_t esp_memprot_get_uni_block_write_bit(mem_type_prot_t mem_type, uint32_t block, uint32_t *write_bit);
 
 /**
  * @brief Gets execute permission value for specified block and memory region
@@ -240,10 +286,11 @@ uint32_t esp_memprot_get_uni_block_write_bit(mem_type_prot_t mem_type, uint32_t
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
  * @param block Memory block identifier (0-3)
+ * @param exec_bit Execute permission value for required block
  *
- * @return Execute permission value for required block
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-uint32_t esp_memprot_get_uni_block_exec_bit(mem_type_prot_t mem_type, uint32_t block);
+esp_err_t esp_memprot_get_uni_block_exec_bit(mem_type_prot_t mem_type, uint32_t block, uint32_t *exec_bit);
 
 /**
  * @brief Sets permissions for specified block in DRAM region
@@ -255,8 +302,10 @@ uint32_t esp_memprot_get_uni_block_exec_bit(mem_type_prot_t mem_type, uint32_t b
  * @param block Memory block identifier (0-3)
  * @param write_perm Write permission flag
  * @param read_perm Read permission flag
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_set_uni_block_perm_dram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm);
+esp_err_t esp_memprot_set_uni_block_perm_dram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm);
 
 /**
  * @brief Sets permissions for high and low memory segment in DRAM region
@@ -271,8 +320,10 @@ void esp_memprot_set_uni_block_perm_dram(mem_type_prot_t mem_type, uint32_t bloc
  * @param lr Low segment Read permission flag
  * @param hw High segment Write permission flag
  * @param hr High segment Read permission flag
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_set_prot_dram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+esp_err_t esp_memprot_set_prot_dram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
 
 /**
  * @brief Sets permissions for specified block in IRAM region
@@ -280,12 +331,17 @@ void esp_memprot_set_prot_dram(mem_type_prot_t mem_type, uint32_t *split_addr, b
  * Sets Read, Write and Execute permission for specified unified-management block (0-3) in given memory region.
  * Applicable only to IRAM memory types
  *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param mem_type Memory protection area type (MEMPROT_IRAM0_SRAM)
  * @param block Memory block identifier (0-3)
  * @param write_perm Write permission flag
+ * @param read_perm Read permission flag
  * @param exec_perm Execute permission flag
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_NOT_SUPPORTED on invalid mem_type
+ *         ESP_ERR_INVALID_ARG on incorrect block number
  */
-void esp_memprot_set_uni_block_perm_iram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm, bool exec_perm);
+esp_err_t esp_memprot_set_uni_block_perm_iram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm, bool exec_perm);
 
 /**
  * @brief Sets permissions for high and low memory segment in IRAM region
@@ -302,8 +358,10 @@ void esp_memprot_set_uni_block_perm_iram(mem_type_prot_t mem_type, uint32_t bloc
  * @param hw High segment Write permission flag
  * @param hr High segment Read permission flag
  * @param hx High segment Execute permission flag
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_set_prot_iram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+esp_err_t esp_memprot_set_prot_iram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
 
 /**
  * @brief Activates memory protection for all supported memory region types
@@ -313,8 +371,10 @@ void esp_memprot_set_prot_iram(mem_type_prot_t mem_type, uint32_t *split_addr, b
  * @param invoke_panic_handler map mem.prot interrupt to ETS_MEMACCESS_ERR_INUM and thus invokes panic handler when fired ('true' not suitable for testing)
  * @param lock_feature sets LOCK bit, see esp_memprot_set_lock() ('true' not suitable for testing)
  * @param mem_type_mask holds a set of required memory protection types (bitmask built of mem_type_prot_t). NULL means default (MEMPROT_ALL in this version)
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
+esp_err_t esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
 
 /**
  * @brief Get permission settings bits for IRAM0 split mgmt. Only IRAM0 memory types allowed
@@ -326,8 +386,10 @@ void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t
  * @param hw High segment Write permission flag
  * @param hr High segment Read permission flag
  * @param hx High segment Execute permission flag
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_get_perm_split_bits_iram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+esp_err_t esp_memprot_get_perm_split_bits_iram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
 
 /**
  * @brief Get permission settings bits for DRAM0 split mgmt. Only DRAM0 memory types allowed
@@ -337,8 +399,10 @@ void esp_memprot_get_perm_split_bits_iram(mem_type_prot_t mem_type, bool *lw, bo
  * @param lr Low segment Read permission flag
  * @param hw High segment Write permission flag
  * @param hr High segment Read permission flag
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_get_perm_split_bits_dram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+esp_err_t esp_memprot_get_perm_split_bits_dram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
 
 /**
  * @brief Sets permissions for high and low memory segment in PERIBUS1 region
@@ -352,8 +416,10 @@ void esp_memprot_get_perm_split_bits_dram(mem_type_prot_t mem_type, bool *lw, bo
  * @param lr Low segment Read permission flag
  * @param hw High segment Write permission flag
  * @param hr High segment Read permission flag
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_set_prot_peri1(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+esp_err_t esp_memprot_set_prot_peri1(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
 
 /**
  * @brief Get permission settings bits for PERIBUS1 split mgmt. Only PERIBUS1 memory types allowed
@@ -363,8 +429,10 @@ void esp_memprot_set_prot_peri1(mem_type_prot_t mem_type, uint32_t *split_addr,
  * @param lr Low segment Read permission flag
  * @param hw High segment Write permission flag
  * @param hr High segment Read permission flag
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_get_perm_split_bits_peri1(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+esp_err_t esp_memprot_get_perm_split_bits_peri1(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
 
 /**
  * @brief Get permission settings bits for PERIBUS2 split mgmt. Only PERIBUS2 memory types allowed
@@ -376,25 +444,32 @@ void esp_memprot_get_perm_split_bits_peri1(mem_type_prot_t mem_type, bool *lw, b
  * @param hw High segment Write permission flag
  * @param hr High segment Read permission flag
  * @param hx High segment Execute permission flag
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG on failure
  */
-void esp_memprot_get_perm_split_bits_peri2(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+esp_err_t esp_memprot_get_perm_split_bits_peri2(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
 
 /**
- * @brief Sets permissions for high and low memory segment in PERIBUS2 region
+ * @brief Configures the memory protection for high and low segment in PERIBUS2 region
  *
  * Sets Read Write permission for both low and high memory segments given by splitting address.
  * Applicable only to PERIBUS2 memory types
  *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param split_addr Address to split the memory region to lower and higher segment
+ * @param mem_type Memory protection area type (MEMPROT_PERI2_RTCSLOW_0, MEMPROT_PERI2_RTCSLOW_1)
+ * @param split_addr Address to split the memory region to lower and higher segment (32bit aligned)
  * @param lw Low segment Write permission flag
  * @param lr Low segment Read permission flag
  * @param lx Low segment Execute permission flag
  * @param hw High segment Write permission flag
  * @param hr High segment Read permission flag
  * @param hx High segment Execute permission flag
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_NOT_SUPPORTED on invalid mem_type
+ *         ESP_ERR_INVALID_STATE on splitting address out of PERIBUS2 range
+ *         ESP_ERR_INVALID_SIZE on splitting address not 32-bit aligned
  */
-void esp_memprot_set_prot_peri2(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+esp_err_t esp_memprot_set_prot_peri2(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
 
 /**
  * @brief Get permissions for specified memory type. Irrelevant bits are ignored
@@ -406,8 +481,12 @@ void esp_memprot_set_prot_peri2(mem_type_prot_t mem_type, uint32_t *split_addr,
  * @param hw High segment Write permission flag
  * @param hr High segment Read permission flag
  * @param hx High segment Execute permission flag
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on NULL lw/lr/lx/hw/hr/hx args
+ *         ESP_ERR_NOT_SUPPORTED on invalid mem_type
  */
-void esp_memprot_get_permissions(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+esp_err_t esp_memprot_get_permissions(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
 
 /**
  * @brief Get Read permission settings for low and high regions of given memory type
@@ -415,8 +494,12 @@ void esp_memprot_get_permissions(mem_type_prot_t mem_type, bool *lw, bool *lr, b
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
  * @param lr Low segment Read permission flag
  * @param hr High segment Read permission flag
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on NULL lr/hr args
+ *         ESP_ERR_NOT_SUPPORTED on invalid mem_type
  */
-void esp_memprot_get_perm_read(mem_type_prot_t mem_type, bool *lr, bool *hr);
+esp_err_t esp_memprot_get_perm_read(mem_type_prot_t mem_type, bool *lr, bool *hr);
 
 /**
  * @brief Get Write permission settings for low and high regions of given memory type
@@ -424,23 +507,33 @@ void esp_memprot_get_perm_read(mem_type_prot_t mem_type, bool *lr, bool *hr);
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
  * @param lr Low segment Write permission flag
  * @param hr High segment Write permission flag
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on NULL lw/hw args
+ *         ESP_ERR_NOT_SUPPORTED on invalid mem_type
  */
-void esp_memprot_get_perm_write(mem_type_prot_t mem_type, bool *lw, bool *hw);
+esp_err_t esp_memprot_get_perm_write(mem_type_prot_t mem_type, bool *lw, bool *hw);
 
 /**
  * @brief Get Execute permission settings for low and high regions of given memory type
  * Applicable only to IBUS-compatible memory types
  *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
- * @param lr Low segment Exec permission flag
- * @param hr High segment Exec permission flag
+ * @param mem_type Memory protection area type (MEMPROT_IRAM0_SRAM, MEMPROT_IRAM0_RTCFAST, MEMPROT_PERI2_RTCSLOW_0, MEMPROT_PERI2_RTCSLOW_1)
+ * @param lx Low segment Exec permission flag
+ * @param hx High segment Exec permission flag
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on NULL lx/hx args
+ *         ESP_ERR_NOT_SUPPORTED on invalid mem_type
  */
-void esp_memprot_get_perm_exec(mem_type_prot_t mem_type, bool *lx, bool *hx);
+esp_err_t esp_memprot_get_perm_exec(mem_type_prot_t mem_type, bool *lx, bool *hx);
 
 /**
  * @brief Returns the lowest address in required memory region
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Required address or MEMPROT_INVALID_ADDRESS for invalid mem_type
  */
 uint32_t esp_memprot_get_low_limit(mem_type_prot_t mem_type);
 
@@ -448,6 +541,8 @@ uint32_t esp_memprot_get_low_limit(mem_type_prot_t mem_type);
  * @brief Returns the highest address in required memory region
  *
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Required address or MEMPROT_INVALID_ADDRESS for invalid mem_type
  */
 uint32_t esp_memprot_get_high_limit(mem_type_prot_t mem_type);
 
@@ -457,8 +552,11 @@ uint32_t esp_memprot_get_high_limit(mem_type_prot_t mem_type);
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
  * @param lr Low segment Read permission flag
  * @param hr High segment Read permission flag
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_NOT_SUPPORTED on invalid mem_type
  */
-void esp_memprot_set_read_perm(mem_type_prot_t mem_type, bool lr, bool hr);
+esp_err_t esp_memprot_set_read_perm(mem_type_prot_t mem_type, bool lr, bool hr);
 
 /**
  * @brief Sets WRITE permission bit for required memory region
@@ -466,17 +564,23 @@ void esp_memprot_set_read_perm(mem_type_prot_t mem_type, bool lr, bool hr);
  * @param mem_type Memory protection area type (see mem_type_prot_t enum)
  * @param lr Low segment Write permission flag
  * @param hr High segment Write permission flag
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_NOT_SUPPORTED on invalid mem_type
  */
-void esp_memprot_set_write_perm(mem_type_prot_t mem_type, bool lw, bool hw);
+esp_err_t esp_memprot_set_write_perm(mem_type_prot_t mem_type, bool lw, bool hw);
 
 /**
  * @brief Sets EXECUTE permission bit for required memory region
  *
- * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param mem_type Memory protection area type (MEMPROT_IRAM0_SRAM, MEMPROT_IRAM0_RTCFAST, MEMPROT_PERI2_RTCSLOW_0, MEMPROT_PERI2_RTCSLOW_1)
  * @param lr Low segment Exec permission flag
  * @param hr High segment Exec permission flag
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_NOT_SUPPORTED on invalid mem_type
  */
-void esp_memprot_set_exec_perm(mem_type_prot_t mem_type, bool lx, bool hx);
+esp_err_t esp_memprot_set_exec_perm(mem_type_prot_t mem_type, bool lx, bool hx);
 
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/rtc.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/rtc.h
new file mode 100644
index 00000000000..3ab96b37872
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/rtc.h
@@ -0,0 +1,31 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32s2/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h
new file mode 100644
index 00000000000..f17e2143133
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/soc_memprot_types.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-S2 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/spiram.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/spiram.h
new file mode 100644
index 00000000000..70d07e61a85
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s2/spiram.h
@@ -0,0 +1,156 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef __ESP_SPIRAM_H
+#define __ESP_SPIRAM_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_spiram_init(void);
+
+/**
+ * @brief Configure Cache/MMU for access to external SPI RAM.
+ *
+ * Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
+ * option is enabled. Applications which need to enable SPI RAM at run time
+ * can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
+ *
+ * @attention this function must be called with flash cache disabled.
+ */
+void esp_spiram_init_cache(void);
+
+
+/**
+ * @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
+ * (in case of a dual-core system) the app CPU is online. This test overwrites the
+ * memory with crap, so do not call after e.g. the heap allocator has stored important
+ * stuff in SPI RAM.
+ *
+ * @return true on success, false on failed memory test
+ */
+bool esp_spiram_test(void);
+
+
+/**
+ * @brief Add the initialized SPI RAM to the heap allocator.
+ */
+esp_err_t esp_spiram_add_to_heapalloc(void);
+
+
+/**
+ * @brief Get the size of the attached SPI RAM chip selected in menuconfig
+ *
+ * @return Size in bytes, or 0 if no external RAM chip support compiled in.
+ */
+size_t esp_spiram_get_size(void);
+
+
+/**
+ * @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
+ * cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
+ * RAM cache.
+ *
+ * This is meant for use from within the SPI flash code.
+ */
+void esp_spiram_writeback_cache(void);
+
+/**
+ * @brief get psram CS IO
+ *
+ * This interface should be called after PSRAM is enabled, otherwise it will
+ * return an invalid value -1/0xff.
+ *
+ * @return psram CS IO or -1/0xff if psram not enabled
+ */
+uint8_t esp_spiram_get_cs_io(void);
+
+
+/**
+ * @brief Reserve a pool of internal memory for specific DMA/internal allocations
+ *
+ * @param size Size of reserved pool in bytes
+ *
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NO_MEM when no memory available for pool
+ */
+esp_err_t esp_spiram_reserve_dma_pool(size_t size);
+
+/**
+ * @brief If SPI RAM(PSRAM) has been initialized
+ *
+ * @return
+ *          - true SPI RAM has been initialized successfully
+ *          - false SPI RAM hasn't been initialized or initialized failed
+ */
+bool esp_spiram_is_initialized(void);
+
+#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
+
+extern int _instruction_reserved_start, _instruction_reserved_end;
+
+/**
+ * @brief Get the start page number of the instruction in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t instruction_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the instruction in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t instruction_flash_end_page_get(void);
+/**
+ * @brief Get the offset of instruction from SPI flash to SPI RAM
+ *
+ * @return instruction offset
+ */
+int instruction_flash2spiram_offset(void);
+#endif
+
+#if CONFIG_SPIRAM_RODATA
+
+extern int _rodata_reserved_start, _rodata_reserved_end;
+
+/**
+ * @brief Get the start page number of the rodata in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t rodata_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the rodata in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t rodata_flash_end_page_get(void);
+/**
+ * @brief Get the offset number of rodata from SPI flash to SPI RAM
+ *
+ * @return rodata offset
+ */
+int rodata_flash2spiram_offset(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/clk.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/clk.h
new file mode 100644
index 00000000000..a9ed3028527
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/clk.h
@@ -0,0 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_private/esp_clk.h"
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/dport_access.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/dport_access.h
new file mode 100644
index 00000000000..e5aedd2e1b1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/dport_access.h
@@ -0,0 +1,34 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h
new file mode 100644
index 00000000000..074754a86b2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h
@@ -0,0 +1,73 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * This API should be used by all components which use the SHA, AES, HMAC and DS crypto hardware on the ESP32S3.
+ * Not all of them can be used in parallel because they use the same underlying module.
+ * E.g., HMAC uses SHA or DS uses HMAC and AES. See the ESP32S3 Technical Reference Manual for more details.
+ *
+ * Other unrelated components must not use it.
+ */
+
+/**
+ * @brief Acquire lock for Digital Signature(DS) cryptography peripheral
+ *
+ * Internally also takes the HMAC lock, as the DS depends on the HMAC peripheral
+ */
+void esp_crypto_ds_lock_acquire(void);
+
+/**
+ * @brief Release lock for Digital Signature(DS) cryptography peripheral
+ *
+ * Internally also releases the HMAC lock, as the DS depends on the HMAC peripheral
+ */
+void esp_crypto_ds_lock_release(void);
+
+/**
+ * @brief Acquire lock for HMAC cryptography peripheral
+ *
+ * Internally also takes the SHA & AES lock, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_acquire(void);
+
+/**
+ * @brief Release lock for HMAC cryptography peripheral
+ *
+ * Internally also releases the SHA & AES lock, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_release(void);
+
+/**
+ * @brief Acquire lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_acquire(void);
+
+/**
+ * @brief Release lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_release(void);
+
+/**
+ * Acquire lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * Release lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/esp_ds.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/esp_ds.h
new file mode 100644
index 00000000000..46a1d22a543
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/esp_ds.h
@@ -0,0 +1,192 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdbool.h>
+
+#include "esp_hmac.h"
+#include "esp_err.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP32S3_ERR_HW_CRYPTO_DS_HMAC_FAIL           ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
+#define ESP32S3_ERR_HW_CRYPTO_DS_INVALID_KEY         ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
+                                                                                 HMAC peripheral problem */
+#define ESP32S3_ERR_HW_CRYPTO_DS_INVALID_DIGEST      ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
+                                                                                 result is invalid */
+#define ESP32S3_ERR_HW_CRYPTO_DS_INVALID_PADDING     ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
+                                                                                 is produced anyway and can be read*/
+
+#define ESP_DS_IV_LEN 16
+
+/* Length of parameter 'C' stored in flash */
+#define ESP_DS_C_LEN (12672 / 8)
+
+typedef struct esp_ds_context esp_ds_context_t;
+
+typedef enum {
+    ESP_DS_RSA_1024 = (1024 / 32) - 1,
+    ESP_DS_RSA_2048 = (2048 / 32) - 1,
+    ESP_DS_RSA_3072 = (3072 / 32) - 1,
+    ESP_DS_RSA_4096 = (4096 / 32) - 1
+} esp_digital_signature_length_t;
+
+/**
+ * Encrypted private key data. Recommended to store in flash in this format.
+ *
+ * @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
+ */
+typedef struct esp_digital_signature_data {
+    /**
+     * RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 4096).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     *
+     * @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
+     *       See the ROM code for the original declaration of struct \c ets_ds_data_t.
+     */
+    esp_digital_signature_length_t rsa_length;
+
+    /**
+     * IV value used to encrypt 'c'
+     */
+    uint8_t iv[ESP_DS_IV_LEN];
+
+    /**
+     * Encrypted Digital Signature parameters. Result of AES-CBC encryption
+     * of plaintext values. Includes an encrypted message digest.
+     */
+    uint8_t c[ESP_DS_C_LEN];
+} esp_ds_data_t;
+
+/** Plaintext parameters used by Digital Signature.
+ *
+ * Not used for signing with DS peripheral, but can be encrypted
+ * in-device by calling esp_ds_encrypt_params()
+ *
+ * @note This documentation is mostly taken from the ROM code.
+ */
+typedef struct {
+    uint32_t Y[SOC_RSA_MAX_BIT_LEN / 32];   //!< RSA exponent
+    uint32_t M[SOC_RSA_MAX_BIT_LEN / 32];   //!< RSA modulus
+    uint32_t Rb[SOC_RSA_MAX_BIT_LEN / 32];  //!< RSA r inverse operand
+    uint32_t M_prime;                                //!< RSA M prime operand
+    esp_digital_signature_length_t length;           //!< RSA length
+} esp_ds_p_data_t;
+
+/**
+ * Sign the message.
+ *
+ * This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
+ * in parallel.
+ * It blocks until the signing is finished and then returns the signature.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ *
+ * @return
+ *      - ESP_OK if successful, the signature was written to the parameter \c signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_sign(const void *message,
+                      const esp_ds_data_t *data,
+                      hmac_key_id_t key_id,
+                      void *signature);
+
+/**
+ * Start the signing process.
+ *
+ * This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
+ * process.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
+ *       \c esp_ds_finish_sign() in a timely manner.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param esp_ds_ctx the context object which is needed for finishing the signing process later
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ */
+esp_err_t esp_ds_start_sign(const void *message,
+                            const esp_ds_data_t *data,
+                            hmac_key_id_t key_id,
+                            esp_ds_context_t **esp_ds_ctx);
+
+/**
+ * Return true if the DS peripheral is busy, otherwise false.
+ *
+ * @note Only valid if \c esp_ds_start_sign() was called before.
+ */
+bool esp_ds_is_busy(void);
+
+/**
+ * Finish the signing process.
+ *
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ * @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
+
+/**
+ * Encrypt the private key parameters.
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ *        The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
+ *        at run time.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
+ *        is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
+ *        corresponding HMAC key will be stored to efuse and then permanently erased.
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
+ */
+esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
+                                const void *iv,
+                                const esp_ds_p_data_t *p_data,
+                                const void *key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/esp_hmac.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/esp_hmac.h
new file mode 100644
index 00000000000..101dce556b6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/esp_hmac.h
@@ -0,0 +1,84 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The possible efuse keys for the HMAC peripheral
+ */
+typedef enum {
+    HMAC_KEY0 = 0,
+    HMAC_KEY1,
+    HMAC_KEY2,
+    HMAC_KEY3,
+    HMAC_KEY4,
+    HMAC_KEY5,
+    HMAC_KEY_MAX
+} hmac_key_id_t;
+
+/**
+ * @brief
+ * Calculate the HMAC of a given message.
+ *
+ * Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
+ * SHA256 is used for the calculation (fixed on ESP32S3).
+ *
+ * @note Uses the HMAC peripheral in "upstream" mode.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
+ *        The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
+ * @param message the message for which to calculate the HMAC
+ * @param message_len message length
+ * @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *      * ESP_ERR_INVALID_ARG if message or hmac is a nullptr or if key_id out of range
+ *      * ESP_FAIL, if the hmac calculation failed
+ */
+esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
+        const void *message,
+        size_t message_len,
+        uint8_t *hmac);
+
+/**
+ * @brief Use HMAC peripheral in Downstream mode to re-enable the JTAG, if it is not permanently disabled by HW.
+ *        In downstream mode, HMAC calculations performed by peripheral are used internally and not provided back to user.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calculation.
+ *        The corresponding purpose field of the key block in the efuse must be set to HMAC downstream purpose.
+ *
+ * @param token Pre calculated HMAC value of the 32-byte 0x00 using SHA-256 and the known private HMAC key. The key is already
+ *        programmed to a eFuse key block. The key block number is provided as the first parameter to this function.
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *                if the calculated HMAC value matches with provided token,
+ *                JTAG will be re-enable otherwise JTAG will remain disabled.
+ *                Return value does not indicate the JTAG status.
+ *      * ESP_FAIL, if the hmac calculation failed or JTAG is permanently disabled by EFUSE_HARD_DIS_JTAG eFuse parameter.
+ *      * ESP_ERR_INVALID_ARG, invalid input arguments
+ */
+esp_err_t esp_hmac_jtag_enable(hmac_key_id_t key_id, const uint8_t *token);
+
+/**
+ *  @brief Disable the JTAG which might be enabled using the HMAC downstream mode. This function just clears the result generated
+ *         by calling esp_hmac_jtag_enable() API.
+ *
+ *  @return
+ *       * ESP_OK return ESP_OK after writing the HMAC_SET_INVALIDATE_JTAG_REG with value 1.
+ */
+esp_err_t esp_hmac_jtag_disable(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/rtc.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/rtc.h
new file mode 100644
index 00000000000..3ab96b37872
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/rtc.h
@@ -0,0 +1,31 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32s2/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h
new file mode 100644
index 00000000000..06dde33ffad
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h
@@ -0,0 +1,119 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//////////////////////////////////////////////////////////
+// ESP32-S3 PMS memory protection types
+//
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memory types recognized by PMS
+ */
+typedef enum {
+    MEMPROT_TYPE_NONE                           = 0x00000000,
+    MEMPROT_TYPE_ALL                            = 0x7FFFFFFF,
+    MEMPROT_TYPE_INVALID                        = 0x80000000
+} esp_mprot_mem_t;
+
+/**
+ * @brief Splitting address (line) type
+ */
+typedef enum {
+    MEMPROT_SPLIT_ADDR_NONE                     = 0x00000000,
+    MEMPROT_SPLIT_ADDR_ALL                      = 0x7FFFFFFF,
+    MEMPROT_SPLIT_ADDR_INVALID                  = 0x80000000
+} esp_mprot_split_addr_t;
+
+/**
+ * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address)
+ */
+typedef enum {
+    MEMPROT_PMS_AREA_NONE                       = 0x00000000,
+    MEMPROT_PMS_AREA_ALL                        = 0x7FFFFFFF,
+    MEMPROT_PMS_AREA_INVALID                    = 0x80000000
+} esp_mprot_pms_area_t;
+
+/**
+* @brief Memory protection configuration
+*/
+typedef struct {
+    bool invoke_panic_handler;  /*!< Register PMS violation interrupt for panic-handling */
+    bool lock_feature;          /*!< Lock all PMS settings */
+    void *split_addr;           /*!< Main I/D splitting address */
+    uint32_t mem_type_mask;     /*!< Memory types required to protect. See esp_mprot_mem_t enum */
+    int target_cpu[];           /*!< Array of CPU/core IDs required to receive given PMS protection */
+} esp_memp_config_t;
+
+#define ESP_MEMPROT_DEFAULT_CONFIG() { \
+    .invoke_panic_handler = true, \
+    .lock_feature = true, \
+    .split_addr = NULL, \
+    .mem_type_mask = MEMPROT_TYPE_ALL,\
+    .target_cpu[] = {PRO_CPU_NUM, APP_CPU_NUM} \
+}
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type
+ */
+static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type)
+{
+    switch (mem_type) {
+    case MEMPROT_TYPE_NONE:
+        return "MEMPROT_TYPE_NONE";
+    case MEMPROT_TYPE_ALL:
+        return "MEMPROT_TYPE_ALL";
+    default:
+        return "MEMPROT_TYPE_INVALID";
+    }
+}
+
+/**
+ * @brief Converts Splitting address type to string
+ *
+ * @param line_type Split line type
+ */
+static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type)
+{
+    switch (line_type) {
+    case MEMPROT_SPLIT_ADDR_NONE:
+        return "MEMPROT_SPLIT_ADDR_NONE";
+    case MEMPROT_SPLIT_ADDR_ALL:
+        return "MEMPROT_SPLIT_ADDR_ALL";
+    default:
+        return "MEMPROT_SPLIT_ADDR_INVALID";
+    }
+}
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type
+ */
+static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type)
+{
+    switch (area_type) {
+    case MEMPROT_PMS_AREA_NONE:
+        return "MEMPROT_PMS_AREA_NONE";
+    case MEMPROT_PMS_AREA_ALL:
+        return "MEMPROT_PMS_AREA_ALL";
+    default:
+        return "MEMPROT_PMS_AREA_INVALID";
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/spiram.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/spiram.h
new file mode 100644
index 00000000000..067c3d27bf8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp32s3/spiram.h
@@ -0,0 +1,164 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef __ESP_SPIRAM_H
+#define __ESP_SPIRAM_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_spiram_init(void);
+
+/**
+ * @brief Configure Cache/MMU for access to external SPI RAM.
+ *
+ * Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
+ * option is enabled. Applications which need to enable SPI RAM at run time
+ * can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
+ *
+ * @attention this function must be called with flash cache disabled.
+ */
+void esp_spiram_init_cache(void);
+
+
+/**
+ * @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
+ * (in case of a dual-core system) the app CPU is online. This test overwrites the
+ * memory with crap, so do not call after e.g. the heap allocator has stored important
+ * stuff in SPI RAM.
+ *
+ * @return true on success, false on failed memory test
+ */
+bool esp_spiram_test(void);
+
+
+/**
+ * @brief Add the initialized SPI RAM to the heap allocator.
+ */
+esp_err_t esp_spiram_add_to_heapalloc(void);
+
+
+/**
+ * @brief Get the size of the attached SPI RAM chip selected in menuconfig
+ *
+ * @return Size in bytes, or 0 if no external RAM chip support compiled in.
+ */
+size_t esp_spiram_get_size(void);
+
+
+/**
+ * @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
+ * cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
+ * RAM cache.
+ *
+ * This is meant for use from within the SPI flash code.
+ */
+void esp_spiram_writeback_cache(void);
+
+/**
+ * @brief If SPI RAM(PSRAM) has been initialized
+ *
+ * @return
+ *          - true SPI RAM has been initialized successfully
+ *          - false SPI RAM hasn't been initialized or initialized failed
+ */
+bool esp_spiram_is_initialized(void);
+
+/**
+ * @brief get psram CS IO
+ *
+ * This interface should be called after PSRAM is enabled, otherwise it will
+ * return an invalid value -1/0xff.
+ *
+ * @return psram CS IO or -1/0xff if psram not enabled
+ */
+uint8_t esp_spiram_get_cs_io(void);
+
+/**
+ * @brief Reserve a pool of internal memory for specific DMA/internal allocations
+ *
+ * @param size Size of reserved pool in bytes
+ *
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NO_MEM when no memory available for pool
+ */
+esp_err_t esp_spiram_reserve_dma_pool(size_t size);
+
+/**
+ * @brief If SPI RAM(PSRAM) has been initialized
+ *
+ * @return
+ *          - true SPI RAM has been initialized successfully
+ *          - false SPI RAM hasn't been initialized or initialized failed
+ */
+bool esp_spiram_is_initialized(void);
+
+#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
+
+extern int _instruction_reserved_start, _instruction_reserved_end;
+
+/**
+ * @brief Get the start page number of the instruction in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t instruction_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the instruction in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t instruction_flash_end_page_get(void);
+/**
+ * @brief Get the offset of instruction from SPI flash to SPI RAM
+ *
+ * @return instruction offset
+ */
+int instruction_flash2spiram_offset(void);
+#endif
+
+#if CONFIG_SPIRAM_RODATA
+
+extern int _rodata_reserved_start, _rodata_reserved_end;
+
+/**
+ * @brief Get the start page number of the rodata in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t rodata_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the rodata in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t rodata_flash_end_page_get(void);
+/**
+ * @brief Get the offset number of rodata from SPI flash to SPI RAM
+ *
+ * @return rodata offset
+ */
+int rodata_flash2spiram_offset(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp_himem.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp_himem.h
new file mode 100644
index 00000000000..c3ac9f52eb1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp_himem.h
@@ -0,0 +1,2 @@
+#warning esp_himem.h has been replaced by esp32/himem.h, please include esp32/himem.h instead
+#include "esp32/himem.h"
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp_spiram.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp_spiram.h
new file mode 100644
index 00000000000..eabd6b6b351
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/esp_spiram.h
@@ -0,0 +1,2 @@
+#warning esp_spiram.h has been replaced by esp32/spiram.h, please include esp32/spiram.h instead
+#include "esp32/spiram.h"
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/rtc_wdt.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/rtc_wdt.h
new file mode 100644
index 00000000000..97d1d8425bd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/rtc_wdt.h
@@ -0,0 +1,190 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Recommendation of using API RTC_WDT.
+1) Setting and enabling rtc_wdt:
+@code
+    rtc_wdt_protect_off();
+    rtc_wdt_disable();
+    rtc_wdt_set_length_of_reset_signal(RTC_WDT_SYS_RESET_SIG, RTC_WDT_LENGTH_3_2us);
+    rtc_wdt_set_stage(RTC_WDT_STAGE0, RTC_WDT_STAGE_ACTION_RESET_SYSTEM); //RTC_WDT_STAGE_ACTION_RESET_SYSTEM or RTC_WDT_STAGE_ACTION_RESET_RTC
+    rtc_wdt_set_time(RTC_WDT_STAGE0, 7000);     // timeout rtd_wdt 7000ms.
+    rtc_wdt_enable();
+    rtc_wdt_protect_on();
+ @endcode
+
+* If you use this option RTC_WDT_STAGE_ACTION_RESET_SYSTEM then after reset you can see these messages.
+They can help to understand where the CPUs were when the WDT was triggered.
+    W (30) boot: PRO CPU has been reset by WDT.
+	W (30) boot: WDT reset info: PRO CPU PC=0x400xxxxx
+	... function where it happened
+
+	W (31) boot: WDT reset info: APP CPU PC=0x400xxxxx
+	... function where it happened
+
+* If you use this option RTC_WDT_STAGE_ACTION_RESET_RTC then you will see message (rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT))
+without description where were CPUs when it happened.
+
+2) Reset counter of rtc_wdt:
+@code
+    rtc_wdt_feed();
+@endcode
+
+3) Disable rtc_wdt:
+@code
+    rtc_wdt_disable();
+@endcode
+ */
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/rtc_periph.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/// List of stage of rtc watchdog. WDT has 4 stage.
+typedef enum {
+    RTC_WDT_STAGE0 = 0,     /*!< Stage 0 */
+    RTC_WDT_STAGE1 = 1,     /*!< Stage 1 */
+    RTC_WDT_STAGE2 = 2,     /*!< Stage 2 */
+    RTC_WDT_STAGE3 = 3      /*!< Stage 3 */
+} rtc_wdt_stage_t;
+
+/// List of action. When the time of stage expires this action will be triggered.
+typedef enum {
+    RTC_WDT_STAGE_ACTION_OFF            = RTC_WDT_STG_SEL_OFF,          /*!< Disabled. This stage will have no effects on the system. */
+    RTC_WDT_STAGE_ACTION_INTERRUPT      = RTC_WDT_STG_SEL_INT,          /*!< Trigger an interrupt. When the stage expires an interrupt is triggered. */
+    RTC_WDT_STAGE_ACTION_RESET_CPU      = RTC_WDT_STG_SEL_RESET_CPU,    /*!< Reset a CPU core. */
+    RTC_WDT_STAGE_ACTION_RESET_SYSTEM   = RTC_WDT_STG_SEL_RESET_SYSTEM, /*!< Reset the main system includes the CPU and all peripherals. The RTC is an exception to this, and it will not be reset. */
+    RTC_WDT_STAGE_ACTION_RESET_RTC      = RTC_WDT_STG_SEL_RESET_RTC     /*!< Reset the main system and the RTC. */
+} rtc_wdt_stage_action_t;
+
+/// Type of reset signal
+typedef enum {
+    RTC_WDT_SYS_RESET_SIG = 0,     /*!< System reset signal length selection */
+    RTC_WDT_CPU_RESET_SIG = 1      /*!< CPU reset signal length selection */
+} rtc_wdt_reset_sig_t;
+
+/// Length of reset signal
+typedef enum {
+    RTC_WDT_LENGTH_100ns = 0,     /*!< 100 ns */
+    RTC_WDT_LENGTH_200ns = 1,     /*!< 200 ns */
+    RTC_WDT_LENGTH_300ns = 2,     /*!< 300 ns */
+    RTC_WDT_LENGTH_400ns = 3,     /*!< 400 ns */
+    RTC_WDT_LENGTH_500ns = 4,     /*!< 500 ns */
+    RTC_WDT_LENGTH_800ns = 5,     /*!< 800 ns */
+    RTC_WDT_LENGTH_1_6us = 6,     /*!< 1.6 us */
+    RTC_WDT_LENGTH_3_2us = 7      /*!< 3.2 us */
+} rtc_wdt_length_sig_t;
+
+/**
+ * @brief Get status of protect of rtc_wdt.
+ *
+ * @return
+ *         - True if the protect of RTC_WDT is set
+ */
+bool rtc_wdt_get_protect_status(void);
+
+/**
+ * @brief Set protect of rtc_wdt.
+ */
+void rtc_wdt_protect_on(void);
+
+/**
+ * @brief Reset protect of rtc_wdt.
+ */
+void rtc_wdt_protect_off(void);
+
+/**
+ * @brief Enable rtc_wdt.
+ */
+void rtc_wdt_enable(void);
+
+/**
+ * @brief Enable the flash boot protection procedure for WDT.
+ *
+ * Do not recommend to use it in the app.
+ * This function was added to be compatibility with the old bootloaders.
+ * This mode is disabled in bootloader or using rtc_wdt_disable() function.
+ */
+void rtc_wdt_flashboot_mode_enable(void);
+
+/**
+ * @brief Disable rtc_wdt.
+ */
+void rtc_wdt_disable(void);
+
+/**
+ * @brief Reset counter rtc_wdt.
+ *
+ * It returns to stage 0 and its expiry counter restarts from 0.
+ */
+void rtc_wdt_feed(void);
+
+/**
+ * @brief Set time for required stage.
+ *
+ * @param[in] stage Stage of rtc_wdt.
+ * @param[in] timeout_ms Timeout for this stage.
+ *
+ * @return
+ *         - ESP_OK In case of success
+ *         - ESP_ERR_INVALID_ARG If stage has invalid value
+ */
+esp_err_t rtc_wdt_set_time(rtc_wdt_stage_t stage, unsigned int timeout_ms);
+
+/**
+ * @brief Get the timeout set for the required stage.
+ *
+ * @param[in]  stage Stage of rtc_wdt.
+ * @param[out] timeout_ms Timeout set for this stage. (not elapsed time).
+ *
+ * @return
+ *         - ESP_OK In case of success
+ *         - ESP_ERR_INVALID_ARG If stage has invalid value
+ */
+esp_err_t rtc_wdt_get_timeout(rtc_wdt_stage_t stage, unsigned int* timeout_ms);
+
+/**
+ * @brief Set an action for required stage.
+ *
+ * @param[in] stage Stage of rtc_wdt.
+ * @param[in] stage_sel Action for this stage. When the time of stage expires this action will be triggered.
+ *
+ * @return
+ *         - ESP_OK In case of success
+ *         - ESP_ERR_INVALID_ARG If stage or stage_sel have invalid value
+ */
+esp_err_t rtc_wdt_set_stage(rtc_wdt_stage_t stage, rtc_wdt_stage_action_t stage_sel);
+
+/**
+ * @brief Set a length of reset signal.
+ *
+ * @param[in] reset_src Type of reset signal.
+ * @param[in] reset_signal_length A length of reset signal.
+ *
+ * @return
+ *         - ESP_OK In case of success
+ *         - ESP_ERR_INVALID_ARG If reset_src  or reset_signal_length have invalid value
+ */
+esp_err_t rtc_wdt_set_length_of_reset_signal(rtc_wdt_reset_sig_t reset_src, rtc_wdt_length_sig_t reset_signal_length);
+
+/**
+ * @brief Return true if rtc_wdt is enabled.
+ *
+ * @return
+ *         - True rtc_wdt is enabled
+ */
+bool rtc_wdt_is_on(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc/spinlock.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/spinlock.h
new file mode 100644
index 00000000000..fbeff5054b4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc/spinlock.h
@@ -0,0 +1,173 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "sdkconfig.h"
+#include "soc/cpu.h"
+#include "hal/cpu_hal.h"
+#include "soc/compare_set.h"
+
+#if __XTENSA__
+#include "xtensa/xtruntime.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_SPIRAM_WORKAROUND_NEED_VOLATILE_SPINLOCK
+#define NEED_VOLATILE_MUX volatile
+#else
+#define NEED_VOLATILE_MUX
+#endif
+
+#define SPINLOCK_FREE          0xB33FFFFF
+#define SPINLOCK_WAIT_FOREVER  (-1)
+#define SPINLOCK_NO_WAIT        0
+#define SPINLOCK_INITIALIZER   {.owner = SPINLOCK_FREE,.count = 0}
+#define CORE_ID_REGVAL_XOR_SWAP (0xCDCD ^ 0xABAB)
+
+typedef struct {
+    NEED_VOLATILE_MUX uint32_t owner;
+    NEED_VOLATILE_MUX uint32_t count;
+}spinlock_t;
+
+/**
+ * @brief Initialize a lock to its default state - unlocked
+ * @param lock - spinlock object to initialize
+ */
+static inline void __attribute__((always_inline)) spinlock_initialize(spinlock_t *lock)
+{
+    assert(lock);
+#if !CONFIG_FREERTOS_UNICORE
+    lock->owner = SPINLOCK_FREE;
+    lock->count = 0;
+#endif
+}
+
+/**
+ * @brief Top level spinlock acquire function, spins until get the lock
+ *
+ * This function will:
+ * - Save current interrupt state, then disable interrupts
+ * - Spin until lock is acquired or until timeout occurs
+ * - Restore interrupt state
+ *
+ * @note Spinlocks alone do no constitute true critical sections (as this
+ *       function reenables interrupts once the spinlock is acquired). For critical
+ *       sections, use the interface provided by the operating system.
+ * @param lock - target spinlock object
+ * @param timeout - cycles to wait, passing SPINLOCK_WAIT_FOREVER blocs indefinitely
+ */
+static inline bool __attribute__((always_inline)) spinlock_acquire(spinlock_t *lock, int32_t timeout)
+{
+#if !CONFIG_FREERTOS_UNICORE && !BOOTLOADER_BUILD
+    uint32_t result;
+    uint32_t irq_status;
+    uint32_t ccount_start;
+    uint32_t core_id, other_core_id;
+
+    assert(lock);
+    irq_status = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
+
+    if(timeout != SPINLOCK_WAIT_FOREVER){
+        RSR(CCOUNT, ccount_start);
+    }
+
+    /*spin until we own a core */
+    RSR(PRID, core_id);
+
+    /* Note: coreID is the full 32 bit core ID (CORE_ID_REGVAL_PRO/CORE_ID_REGVAL_APP) */
+
+    other_core_id = CORE_ID_REGVAL_XOR_SWAP ^ core_id;
+    do {
+
+        /* lock->owner should be one of SPINLOCK_FREE, CORE_ID_REGVAL_PRO,
+         * CORE_ID_REGVAL_APP:
+         *  - If SPINLOCK_FREE, we want to atomically set to 'core_id'.
+         *  - If "our" core_id, we can drop through immediately.
+         *  - If "other_core_id", we spin here.
+         */
+        result = core_id;
+
+#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+        if (esp_ptr_external_ram(lock)) {
+            compare_and_set_extram(&lock->owner, SPINLOCK_FREE, &result);
+        } else {
+#endif
+        compare_and_set_native(&lock->owner, SPINLOCK_FREE, &result);
+#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+        }
+#endif
+        if(result != other_core_id) {
+            break;
+        }
+
+        if (timeout != SPINLOCK_WAIT_FOREVER) {
+            uint32_t ccount_now;
+            ccount_now = cpu_hal_get_cycle_count();
+            if (ccount_now - ccount_start > (unsigned)timeout) {
+                XTOS_RESTORE_INTLEVEL(irq_status);
+                return false;
+            }
+        }
+    }while(1);
+
+    /* any other value implies memory corruption or uninitialized mux */
+    assert(result == core_id || result == SPINLOCK_FREE);
+    assert((result == SPINLOCK_FREE) == (lock->count == 0)); /* we're first to lock iff count is zero */
+    assert(lock->count < 0xFF); /* Bad count value implies memory corruption */
+
+    lock->count++;
+    XTOS_RESTORE_INTLEVEL(irq_status);
+    return true;
+
+#else  // !CONFIG_FREERTOS_UNICORE
+    return true;
+#endif
+}
+
+/**
+ * @brief Top level spinlock unlock function, unlocks a previously locked spinlock
+ *
+ * This function will:
+ * - Save current interrupt state, then disable interrupts
+ * - Release the spinlock
+ * - Restore interrupt state
+ *
+ * @note Spinlocks alone do no constitute true critical sections (as this
+ *       function reenables interrupts once the spinlock is acquired). For critical
+ *       sections, use the interface provided by the operating system.
+ * @param lock - target, locked before, spinlock object
+ */
+static inline void __attribute__((always_inline)) spinlock_release(spinlock_t *lock)
+{
+#if !CONFIG_FREERTOS_UNICORE && !BOOTLOADER_BUILD
+    uint32_t irq_status;
+    uint32_t core_id;
+
+    assert(lock);
+    irq_status = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
+
+    RSR(PRID, core_id);
+    assert(core_id == lock->owner); // This is a mutex we didn't lock, or it's corrupt
+    lock->count--;
+
+    if(!lock->count) {
+        lock->owner = SPINLOCK_FREE;
+    } else {
+        assert(lock->count < 0x100); // Indicates memory corruption
+    }
+
+    XTOS_RESTORE_INTLEVEL(irq_status);
+#endif
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/include/soc_log.h b/tools/sdk/esp32s3/include/esp_hw_support/include/soc_log.h
new file mode 100644
index 00000000000..64268433fb9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/include/soc_log.h
@@ -0,0 +1,45 @@
+/*
+ * SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_rom_sys.h"
+
+/**
+ * @file soc_log.h
+ * @brief SOC library logging functions
+ *
+ * To make SOC library compatible with environments which don't use ESP-IDF,
+ * this header file provides wrappers for logging functions.
+ */
+
+#ifdef ESP_PLATFORM
+#include "esp_log.h"
+#define SOC_LOGE(tag, fmt, ...) ESP_EARLY_LOGE(tag, fmt, ##__VA_ARGS__)
+#define SOC_LOGW(tag, fmt, ...) ESP_EARLY_LOGW(tag, fmt, ##__VA_ARGS__)
+#define SOC_LOGI(tag, fmt, ...) ESP_EARLY_LOGI(tag, fmt, ##__VA_ARGS__)
+#define SOC_LOGD(tag, fmt, ...) ESP_EARLY_LOGD(tag, fmt, ##__VA_ARGS__)
+#define SOC_LOGV(tag, fmt, ...) ESP_EARLY_LOGV(tag, fmt, ##__VA_ARGS__)
+
+#else
+#include "sdkconfig.h"
+#ifdef CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/ets_sys.h"  // will be removed in idf v5.0
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/ets_sys.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/ets_sys.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/ets_sys.h"
+#elif CONFIG_IDF_TARGET_ESP32H2
+#include "esp32h2/rom/ets_sys.h"
+#endif
+
+#define SOC_LOGE(tag, fmt, ...) esp_rom_printf("%s(err): " fmt, tag, ##__VA_ARGS__)
+#define SOC_LOGW(tag, fmt, ...) esp_rom_printf("%s(warn): " fmt, tag, ##__VA_ARGS__)
+#define SOC_LOGI(tag, fmt, ...) esp_rom_printf("%s(info): " fmt, tag, ##__VA_ARGS__)
+#define SOC_LOGD(tag, fmt, ...) esp_rom_printf("%s(dbg): " fmt, tag, ##__VA_ARGS__)
+#define SOC_LOGV(tag, fmt, ...) esp_rom_printf("%s: " fmt, tag, ##__VA_ARGS__)
+#endif //ESP_PLATFORM
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_bbpll.h b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_bbpll.h
new file mode 100644
index 00000000000..9df0dd12c24
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_bbpll.h
@@ -0,0 +1,175 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_bbpll.h
+ * @brief Register definitions for digital PLL (BBPLL)
+ *
+ * This file lists register fields of BBPLL, located on an internal configuration
+ * bus. These definitions are used via macros defined in regi2c_ctrl.h, by
+ * rtc_clk_cpu_freq_set function in rtc_clk.c.
+ */
+
+#define I2C_BBPLL           0x66
+#define I2C_BBPLL_HOSTID    1
+
+#define I2C_BBPLL_IR_CAL_DELAY        0
+#define I2C_BBPLL_IR_CAL_DELAY_MSB    3
+#define I2C_BBPLL_IR_CAL_DELAY_LSB    0
+
+#define I2C_BBPLL_IR_CAL_CK_DIV        0
+#define I2C_BBPLL_IR_CAL_CK_DIV_MSB    7
+#define I2C_BBPLL_IR_CAL_CK_DIV_LSB    4
+
+#define I2C_BBPLL_IR_CAL_EXT_CAP        1
+#define I2C_BBPLL_IR_CAL_EXT_CAP_MSB    3
+#define I2C_BBPLL_IR_CAL_EXT_CAP_LSB    0
+
+#define I2C_BBPLL_IR_CAL_ENX_CAP        1
+#define I2C_BBPLL_IR_CAL_ENX_CAP_MSB    4
+#define I2C_BBPLL_IR_CAL_ENX_CAP_LSB    4
+
+#define I2C_BBPLL_IR_CAL_RSTB        1
+#define I2C_BBPLL_IR_CAL_RSTB_MSB    5
+#define I2C_BBPLL_IR_CAL_RSTB_LSB    5
+
+#define I2C_BBPLL_IR_CAL_START        1
+#define I2C_BBPLL_IR_CAL_START_MSB    6
+#define I2C_BBPLL_IR_CAL_START_LSB    6
+
+#define I2C_BBPLL_IR_CAL_UNSTOP        1
+#define I2C_BBPLL_IR_CAL_UNSTOP_MSB    7
+#define I2C_BBPLL_IR_CAL_UNSTOP_LSB    7
+
+#define I2C_BBPLL_OC_REF_DIV        2
+#define I2C_BBPLL_OC_REF_DIV_MSB    3
+#define I2C_BBPLL_OC_REF_DIV_LSB    0
+
+#define I2C_BBPLL_OC_DCHGP        2
+#define I2C_BBPLL_OC_DCHGP_MSB    6
+#define I2C_BBPLL_OC_DCHGP_LSB    4
+
+#define I2C_BBPLL_OC_ENB_FCAL        2
+#define I2C_BBPLL_OC_ENB_FCAL_MSB    7
+#define I2C_BBPLL_OC_ENB_FCAL_LSB    7
+
+#define I2C_BBPLL_OC_DIV_7_0        3
+#define I2C_BBPLL_OC_DIV_7_0_MSB    7
+#define I2C_BBPLL_OC_DIV_7_0_LSB    0
+
+#define I2C_BBPLL_RSTB_DIV_ADC        4
+#define I2C_BBPLL_RSTB_DIV_ADC_MSB    0
+#define I2C_BBPLL_RSTB_DIV_ADC_LSB    0
+
+#define I2C_BBPLL_MODE_HF        4
+#define I2C_BBPLL_MODE_HF_MSB    1
+#define I2C_BBPLL_MODE_HF_LSB    1
+
+#define I2C_BBPLL_DIV_ADC        4
+#define I2C_BBPLL_DIV_ADC_MSB    3
+#define I2C_BBPLL_DIV_ADC_LSB    2
+
+#define I2C_BBPLL_DIV_DAC        4
+#define I2C_BBPLL_DIV_DAC_MSB    4
+#define I2C_BBPLL_DIV_DAC_LSB    4
+
+#define I2C_BBPLL_DIV_CPU        4
+#define I2C_BBPLL_DIV_CPU_MSB    5
+#define I2C_BBPLL_DIV_CPU_LSB    5
+
+#define I2C_BBPLL_OC_ENB_VCON        4
+#define I2C_BBPLL_OC_ENB_VCON_MSB    6
+#define I2C_BBPLL_OC_ENB_VCON_LSB    6
+
+#define I2C_BBPLL_OC_TSCHGP        4
+#define I2C_BBPLL_OC_TSCHGP_MSB    7
+#define I2C_BBPLL_OC_TSCHGP_LSB    7
+
+#define I2C_BBPLL_OC_DR1        5
+#define I2C_BBPLL_OC_DR1_MSB    2
+#define I2C_BBPLL_OC_DR1_LSB    0
+
+#define I2C_BBPLL_OC_DR3        5
+#define I2C_BBPLL_OC_DR3_MSB    6
+#define I2C_BBPLL_OC_DR3_LSB    4
+
+#define I2C_BBPLL_EN_USB        5
+#define I2C_BBPLL_EN_USB_MSB    7
+#define I2C_BBPLL_EN_USB_LSB    7
+
+#define I2C_BBPLL_OC_DCUR        6
+#define I2C_BBPLL_OC_DCUR_MSB    2
+#define I2C_BBPLL_OC_DCUR_LSB    0
+
+#define I2C_BBPLL_INC_CUR        6
+#define I2C_BBPLL_INC_CUR_MSB    3
+#define I2C_BBPLL_INC_CUR_LSB    3
+
+#define I2C_BBPLL_OC_DHREF_SEL        6
+#define I2C_BBPLL_OC_DHREF_SEL_MSB    5
+#define I2C_BBPLL_OC_DHREF_SEL_LSB    4
+
+#define I2C_BBPLL_OC_DLREF_SEL        6
+#define I2C_BBPLL_OC_DLREF_SEL_MSB    7
+#define I2C_BBPLL_OC_DLREF_SEL_LSB    6
+
+#define I2C_BBPLL_OR_CAL_CAP        8
+#define I2C_BBPLL_OR_CAL_CAP_MSB    3
+#define I2C_BBPLL_OR_CAL_CAP_LSB    0
+
+#define I2C_BBPLL_OR_CAL_UDF        8
+#define I2C_BBPLL_OR_CAL_UDF_MSB    4
+#define I2C_BBPLL_OR_CAL_UDF_LSB    4
+
+#define I2C_BBPLL_OR_CAL_OVF        8
+#define I2C_BBPLL_OR_CAL_OVF_MSB    5
+#define I2C_BBPLL_OR_CAL_OVF_LSB    5
+
+#define I2C_BBPLL_OR_CAL_END        8
+#define I2C_BBPLL_OR_CAL_END_MSB    6
+#define I2C_BBPLL_OR_CAL_END_LSB    6
+
+#define I2C_BBPLL_OR_LOCK        8
+#define I2C_BBPLL_OR_LOCK_MSB    7
+#define I2C_BBPLL_OR_LOCK_LSB    7
+
+#define I2C_BBPLL_OC_VCO_DBIAS        9
+#define I2C_BBPLL_OC_VCO_DBIAS_MSB    1
+#define I2C_BBPLL_OC_VCO_DBIAS_LSB    0
+
+#define I2C_BBPLL_BBADC_DELAY2        9
+#define I2C_BBPLL_BBADC_DELAY2_MSB    3
+#define I2C_BBPLL_BBADC_DELAY2_LSB    2
+
+#define I2C_BBPLL_BBADC_DVDD        9
+#define I2C_BBPLL_BBADC_DVDD_MSB    5
+#define I2C_BBPLL_BBADC_DVDD_LSB    4
+
+#define I2C_BBPLL_BBADC_DREF        9
+#define I2C_BBPLL_BBADC_DREF_MSB    7
+#define I2C_BBPLL_BBADC_DREF_LSB    6
+
+#define I2C_BBPLL_BBADC_DCUR        10
+#define I2C_BBPLL_BBADC_DCUR_MSB    1
+#define I2C_BBPLL_BBADC_DCUR_LSB    0
+
+#define I2C_BBPLL_BBADC_INPUT_SHORT        10
+#define I2C_BBPLL_BBADC_INPUT_SHORT_MSB    2
+#define I2C_BBPLL_BBADC_INPUT_SHORT_LSB    2
+
+#define I2C_BBPLL_ENT_PLL        10
+#define I2C_BBPLL_ENT_PLL_MSB    3
+#define I2C_BBPLL_ENT_PLL_LSB    3
+
+#define I2C_BBPLL_DTEST        10
+#define I2C_BBPLL_DTEST_MSB    5
+#define I2C_BBPLL_DTEST_LSB    4
+
+#define I2C_BBPLL_ENT_ADC        10
+#define I2C_BBPLL_ENT_ADC_MSB    7
+#define I2C_BBPLL_ENT_ADC_LSB    6
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_brownout.h b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_brownout.h
new file mode 100644
index 00000000000..8073b72a27d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_brownout.h
@@ -0,0 +1,22 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_brownout.h
+ * @brief Register definitions for brownout detector
+ *
+ * This file lists register fields of the brownout detector, located on an internal configuration
+ * bus. These definitions are used via macros defined in regi2c_ctrl.h.
+ */
+
+#define I2C_BOD            0x61
+#define I2C_BOD_HOSTID     1
+
+#define I2C_BOD_THRESHOLD           0x5
+#define I2C_BOD_THRESHOLD_MSB       2
+#define I2C_BOD_THRESHOLD_LSB       0
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_dig_reg.h b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_dig_reg.h
new file mode 100644
index 00000000000..146077dcfa4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_dig_reg.h
@@ -0,0 +1,60 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_dig_reg.h
+ * @brief Register definitions for digital to get rtc voltage & digital voltage by setting rtc_dbias_Wak & dig_dbias_wak or by analog self-calibration.
+ *
+ */
+
+#define I2C_DIG_REG 0x6D
+#define I2C_DIG_REG_HOSTID 1
+
+#define I2C_DIG_REG_EXT_RTC_DREG    4
+#define I2C_DIG_REG_EXT_RTC_DREG_MSB    4
+#define I2C_DIG_REG_EXT_RTC_DREG_LSB    0
+
+#define I2C_DIG_REG_ENX_RTC_DREG    4
+#define I2C_DIG_REG_ENX_RTC_DREG_MSB    7
+#define I2C_DIG_REG_ENX_RTC_DREG_LSB    7
+
+#define I2C_DIG_REG_EXT_RTC_DREG_SLEEP    5
+#define I2C_DIG_REG_EXT_RTC_DREG_SLEEP_MSB    4
+#define I2C_DIG_REG_EXT_RTC_DREG_SLEEP_LSB    0
+
+#define I2C_DIG_REG_ENX_RTC_DREG_SLEEP    5
+#define I2C_DIG_REG_ENX_RTC_DREG_SLEEP_MSB    7
+#define I2C_DIG_REG_ENX_RTC_DREG_SLEEP_LSB    7
+
+#define I2C_DIG_REG_EXT_DIG_DREG    6
+#define I2C_DIG_REG_EXT_DIG_DREG_MSB    4
+#define I2C_DIG_REG_EXT_DIG_DREG_LSB    0
+
+#define I2C_DIG_REG_ENX_DIG_DREG    6
+#define I2C_DIG_REG_ENX_DIG_DREG_MSB    7
+#define I2C_DIG_REG_ENX_DIG_DREG_LSB    7
+
+#define I2C_DIG_REG_EXT_DIG_DREG_SLEEP    7
+#define I2C_DIG_REG_EXT_DIG_DREG_SLEEP_MSB    4
+#define I2C_DIG_REG_EXT_DIG_DREG_SLEEP_LSB    0
+
+#define I2C_DIG_REG_ENX_DIG_DREG_SLEEP    7
+#define I2C_DIG_REG_ENX_DIG_DREG_SLEEP_MSB    7
+#define I2C_DIG_REG_ENX_DIG_DREG_SLEEP_LSB    7
+
+#define I2C_DIG_REG_OR_EN_CONT_CAL 9
+#define I2C_DIG_REG_OR_EN_CONT_CAL_MSB 7
+#define I2C_DIG_REG_OR_EN_CONT_CAL_LSB 7
+
+#define I2C_DIG_REG_XPD_RTC_REG 13
+#define I2C_DIG_REG_XPD_RTC_REG_MSB 2
+#define I2C_DIG_REG_XPD_RTC_REG_LSB 2
+
+#define I2C_DIG_REG_XPD_DIG_REG 13
+#define I2C_DIG_REG_XPD_DIG_REG_MSB 3
+#define I2C_DIG_REG_XPD_DIG_REG_LSB 3
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_lp_bias.h b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_lp_bias.h
new file mode 100644
index 00000000000..0a19262dcda
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_lp_bias.h
@@ -0,0 +1,21 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_lp_bias.h
+ * @brief Register definitions for analog to calibrate o_code for getting a more precise voltage.
+ */
+
+#define I2C_ULP_IR_FORCE_CODE 5
+#define I2C_ULP_IR_FORCE_CODE_MSB 6
+#define I2C_ULP_IR_FORCE_CODE_LSB 6
+
+//register for OCode
+#define I2C_ULP_EXT_CODE 6
+#define I2C_ULP_EXT_CODE_MSB 7
+#define I2C_ULP_EXT_CODE_LSB 0
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_saradc.h b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_saradc.h
new file mode 100644
index 00000000000..2c3738a2210
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_saradc.h
@@ -0,0 +1,82 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_saradc.h
+ * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC.
+ *
+ * This file lists register fields of SAR, located on an internal configuration
+ * bus. These definitions are used via macros defined in regi2c_ctrl.h, by
+ * function in adc_ll.h.
+ */
+
+#define I2C_SAR_ADC            0X69
+#define I2C_SAR_ADC_HOSTID     1
+
+#define ADC_SAR1_ENCAL_GND_ADDR 0x7
+#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5
+#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5
+
+#define ADC_SAR2_ENCAL_GND_ADDR 0x7
+#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7
+#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7
+
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0
+
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR  0x0
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB  0x7
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB  0x0
+
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0
+
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR  0x3
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB  0x7
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB  0x0
+
+#define ADC_SAR1_DREF_ADDR  0x2
+#define ADC_SAR1_DREF_ADDR_MSB  0x6
+#define ADC_SAR1_DREF_ADDR_LSB  0x4
+
+#define ADC_SAR2_DREF_ADDR  0x5
+#define ADC_SAR2_DREF_ADDR_MSB  0x6
+#define ADC_SAR2_DREF_ADDR_LSB  0x4
+
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0
+
+#define ADC_SARADC_DTEST_RTC_ADDR 0x7
+#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1
+#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0
+
+#define ADC_SARADC_ENT_TSENS_ADDR 0x7
+#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2
+#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2
+
+#define ADC_SARADC_ENT_RTC_ADDR 0x7
+#define ADC_SARADC_ENT_RTC_ADDR_MSB 3
+#define ADC_SARADC_ENT_RTC_ADDR_LSB 3
+
+#define ADC_SARADC_ENCAL_REF_ADDR 0x7
+#define ADC_SARADC_ENCAL_REF_ADDR_MSB 4
+#define ADC_SARADC_ENCAL_REF_ADDR_LSB 4
+
+#define I2C_SARADC_TSENS_DAC 0x6
+#define I2C_SARADC_TSENS_DAC_MSB 3
+#define I2C_SARADC_TSENS_DAC_LSB 0
+
+/**
+ * Restore regi2c analog calibration related configuration registers.
+ * This is a workaround, and is fixed on later chips
+ */
+#define REGI2C_ANA_CALI_PD_WORKAROUND    1
+#define REGI2C_ANA_CALI_BYTE_NUM         8
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_ulp.h b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_ulp.h
new file mode 100644
index 00000000000..898a5bfa8af
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/private_include/regi2c_ulp.h
@@ -0,0 +1,31 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_ulp.h
+ * @brief Register definitions for analog to calibrate o_code for getting a more precise voltage.
+ *
+ * This file lists register fields of ULP, located on an internal configuration
+ * bus. These definitions are used via macros defined in regi2c_ctrl.h, by
+ * rtc_init function in rtc_init.c.
+ */
+
+#define I2C_ULP 0x61
+#define I2C_ULP_HOSTID 1
+
+#define I2C_ULP_IR_RESETB 0
+#define I2C_ULP_IR_RESETB_MSB 0
+#define I2C_ULP_IR_RESETB_LSB 0
+
+#define I2C_ULP_O_DONE_FLAG 3
+#define I2C_ULP_O_DONE_FLAG_MSB 0
+#define I2C_ULP_O_DONE_FLAG_LSB 0
+
+#define I2C_ULP_BG_O_DONE_FLAG 3
+#define I2C_ULP_BG_O_DONE_FLAG_MSB 3
+#define I2C_ULP_BG_O_DONE_FLAG_LSB 3
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/regi2c_ctrl.h b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/regi2c_ctrl.h
new file mode 100644
index 00000000000..a4a3cbce202
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/regi2c_ctrl.h
@@ -0,0 +1,99 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "regi2c_bbpll.h"
+#include "regi2c_dig_reg.h"
+#include "regi2c_lp_bias.h"
+#include "regi2c_saradc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Analog function control register */
+#define I2C_MST_ANA_CONF0_REG  0x6000E040
+#define I2C_MST_BBPLL_STOP_FORCE_HIGH  (BIT(2))
+#define I2C_MST_BBPLL_STOP_FORCE_LOW  (BIT(3))
+
+#define ANA_CONFIG_REG  0x6000E044
+#define ANA_CONFIG_S    (8)
+#define ANA_CONFIG_M    (0x3FF)
+/* Clear to enable APLL */
+#define I2C_APLL_M      (BIT(14))
+/* Clear to enable BBPLL */
+#define I2C_BBPLL_M     (BIT(17))
+/* Clear to enable SAR */
+#define I2C_SAR_M       (BIT(18))
+
+#define ANA_CONFIG2_REG 0x6000E048
+#define ANA_SAR_CFG2_M  (BIT(16))
+
+/* ROM functions which read/write internal control bus */
+uint8_t rom_i2c_readReg(uint8_t block, uint8_t host_id, uint8_t reg_add);
+uint8_t rom_i2c_readReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb);
+void rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
+void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
+
+#ifdef BOOTLOADER_BUILD
+
+/**
+ * If compiling for the bootloader, ROM functions can be called directly,
+ * without the need of a lock.
+ */
+#define regi2c_ctrl_read_reg         rom_i2c_readReg
+#define regi2c_ctrl_read_reg_mask    rom_i2c_readReg_Mask
+#define regi2c_ctrl_write_reg        rom_i2c_writeReg
+#define regi2c_ctrl_write_reg_mask   rom_i2c_writeReg_Mask
+
+#else
+
+#define i2c_read_reg_raw        rom_i2c_readReg
+#define i2c_read_reg_mask_raw   rom_i2c_readReg_Mask
+#define i2c_write_reg_raw       rom_i2c_writeReg
+#define i2c_write_reg_mask_raw  rom_i2c_writeReg_Mask
+
+uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add);
+uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb);
+void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
+void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
+
+/* enter the critical section that protects internal registers. Don't use it in SDK. Use the functions above. */
+void regi2c_enter_critical(void);
+void regi2c_exit_critical(void);
+
+#endif // BOOTLOADER_BUILD
+
+/* Convenience macros for the above functions, these use register definitions
+ * from regi2c_bbpll.h/regi2c_dig_reg.h/regi2c_ulp.h header files.
+ */
+#define REGI2C_WRITE_MASK(block, reg_add, indata) \
+      regi2c_ctrl_write_reg_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
+
+#define REGI2C_READ_MASK(block, reg_add) \
+      regi2c_ctrl_read_reg_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB)
+
+#define REGI2C_WRITE(block, reg_add, indata) \
+      regi2c_ctrl_write_reg(block, block##_HOSTID,  reg_add, indata)
+
+#define REGI2C_READ(block, reg_add) \
+      regi2c_ctrl_read_reg(block, block##_HOSTID,  reg_add)
+
+
+/**
+ * Restore regi2c analog calibration related configuration registers.
+ * This is a workaround, and is fixed on later chips
+ */
+#if REGI2C_ANA_CALI_PD_WORKAROUND
+void regi2c_analog_cali_reg_read(void);
+void regi2c_analog_cali_reg_write(void);
+#endif   //#if ADC_CALI_PD_WORKAROUND
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/rtc_clk_common.h b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/rtc_clk_common.h
new file mode 100644
index 00000000000..01b3c1cea23
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/rtc_clk_common.h
@@ -0,0 +1,52 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#define MHZ (1000000)
+
+#define DPORT_CPUPERIOD_SEL_80      0
+#define DPORT_CPUPERIOD_SEL_160     1
+#define DPORT_CPUPERIOD_SEL_240     2
+
+#define DPORT_SOC_CLK_SEL_XTAL    0
+#define DPORT_SOC_CLK_SEL_PLL    1
+#define DPORT_SOC_CLK_SEL_8M     2
+
+#define RTC_FAST_CLK_FREQ_8M        8500000
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void rtc_clk_cpu_freq_to_xtal(int freq, int div);
+
+/* Value of RTC_XTAL_FREQ_REG is stored as two copies in lower and upper 16-bit
+ * halves. These are the routines to work with that representation.
+ */
+static inline bool clk_val_is_valid(uint32_t val)
+{
+    return (val & 0xffff) == ((val >> 16) & 0xffff) &&
+           val != 0 &&
+           val != UINT32_MAX;
+}
+
+static inline uint32_t reg_val_to_clk_val(uint32_t val)
+{
+    return val & UINT16_MAX;
+}
+
+static inline uint32_t clk_val_to_reg_val(uint32_t val)
+{
+    return (val & UINT16_MAX) | ((val & UINT16_MAX) << 16);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/spiram_psram.h b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/spiram_psram.h
new file mode 100644
index 00000000000..06128ccfcc7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_hw_support/port/esp32s3/spiram_psram.h
@@ -0,0 +1,78 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef _PSRAM_H
+#define _PSRAM_H
+#include "soc/spi_mem_reg.h"
+#include "esp_err.h"
+#include "sdkconfig.h"
+
+typedef enum {
+    PSRAM_CACHE_S80M = 1,
+    PSRAM_CACHE_S40M,
+    PSRAM_CACHE_MAX,
+} psram_cache_mode_t;
+
+typedef enum {
+    PSRAM_SIZE_16MBITS  = 0,
+    PSRAM_SIZE_32MBITS  = 1,
+    PSRAM_SIZE_64MBITS  = 2,
+    PSRAM_SIZE_128MBITS = 3,
+    PSRAM_SIZE_256MBITS = 4,
+    PSRAM_SIZE_MAX,
+} psram_size_t;
+
+/*
+See the TRM, chapter PID/MPU/MMU, header 'External RAM' for the definitions of these modes.
+
+Important is that NORMAL works with the app CPU cache disabled, but gives huge cache coherency
+issues when both app and pro CPU are enabled. LOWHIGH and EVENODD do not have these coherency
+issues but cannot be used when the app CPU cache is disabled.
+*/
+typedef enum {
+    PSRAM_VADDR_MODE_NORMAL=0, ///< App and pro CPU use their own flash cache for external RAM access
+    PSRAM_VADDR_MODE_LOWHIGH,  ///< App and pro CPU share external RAM caches: pro CPU has low 2M, app CPU has high 2M
+    PSRAM_VADDR_MODE_EVENODD,  ///< App and pro CPU share external RAM caches: pro CPU does even 32yte ranges, app does odd ones.
+} psram_vaddr_mode_t;
+
+/**
+ * @brief get psram size
+ * @return
+ *     - PSRAM_SIZE_MAX if psram not enabled or not valid
+ *     - PSRAM size
+ */
+psram_size_t psram_get_size(void);
+
+/**
+ * @brief psram cache enable function
+ *
+ * Esp-idf uses this to initialize cache for psram, mapping it into the main memory
+ * address space.
+ *
+ * @param mode       SPI mode to access psram in
+ * @param vaddrmode  Mode the psram cache works in.
+ * @return ESP_OK on success, ESP_ERR_INVALID_STATE when VSPI peripheral is needed but cannot be claimed.
+ */
+esp_err_t psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vaddrmode);
+
+typedef enum {
+    SPIRAM_WRAP_MODE_16B,
+    SPIRAM_WRAP_MODE_32B,
+    SPIRAM_WRAP_MODE_64B,
+    SPIRAM_WRAP_MODE_DISABLE
+} spiram_wrap_mode_t;
+
+esp_err_t esp_spiram_wrap_set(spiram_wrap_mode_t mode);
+
+/**
+ * @brief get psram CS IO
+ *
+ * @return psram CS IO
+ */
+uint8_t psram_get_cs_io(void);
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_ipc/include/esp_ipc.h b/tools/sdk/esp32s3/include/esp_ipc/include/esp_ipc.h
new file mode 100644
index 00000000000..5307cbcdab1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_ipc/include/esp_ipc.h
@@ -0,0 +1,87 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(CONFIG_FREERTOS_UNICORE) || defined(CONFIG_APPTRACE_GCOV_ENABLE)
+
+/*
+ * Inter-processor call APIs
+ *
+ * FreeRTOS provides several APIs which can be used to communicate between different tasks, including tasks running on
+ * different CPUs. This module provides additional APIs to run some code on the other CPU. These APIs can only be used
+ * when FreeRTOS scheduler is running.
+ */
+
+/**
+ * @brief IPC Callback
+ *
+ * A callback of this type should be provided as an argument when calling esp_ipc_call() or esp_ipc_call_blocking().
+ */
+typedef void (*esp_ipc_func_t)(void* arg);
+
+/**
+ * @brief Execute a callback on a given CPU
+ *
+ * Execute a given callback on a particular CPU. The callback must be of type "esp_ipc_func_t" and will be invoked in
+ * the context of the target CPU's IPC task.
+ *
+ * - This function will block the target CPU's IPC task has begun execution of the callback
+ * - If another IPC call is ongoing, this function will block until the ongoing IPC call completes
+ * - The stack size of the IPC task can be configured via the CONFIG_ESP_IPC_TASK_STACK_SIZE option
+ *
+ * @note In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
+ *
+ * @param[in]   cpu_id  CPU where the given function should be executed (0 or 1)
+ * @param[in]   func    Pointer to a function of type void func(void* arg) to be executed
+ * @param[in]   arg     Arbitrary argument of type void* to be passed into the function
+ *
+ * @return
+ *      - ESP_ERR_INVALID_ARG if cpu_id is invalid
+ *      - ESP_ERR_INVALID_STATE if the FreeRTOS scheduler is not running
+ *      - ESP_OK otherwise
+ */
+esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
+
+
+/**
+ * @brief Execute a callback on a given CPU until and block until it completes
+ *
+ * This function is identical to esp_ipc_call() except that this function will block until the execution of the callback
+ * completes.
+ *
+ * @note    In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
+ *
+ * @param[in]   cpu_id  CPU where the given function should be executed (0 or 1)
+ * @param[in]   func    Pointer to a function of type void func(void* arg) to be executed
+ * @param[in]   arg     Arbitrary argument of type void* to be passed into the function
+ *
+ * @return
+ *      - ESP_ERR_INVALID_ARG if cpu_id is invalid
+ *      - ESP_ERR_INVALID_STATE if the FreeRTOS scheduler is not running
+ *      - ESP_OK otherwise
+ */
+esp_err_t esp_ipc_call_blocking(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
+
+#endif // !defined(CONFIG_FREERTOS_UNICORE) || defined(CONFIG_APPTRACE_GCOV_ENABLE)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_ipc/include/esp_ipc_isr.h b/tools/sdk/esp32s3/include/esp_ipc/include/esp_ipc_isr.h
new file mode 100644
index 00000000000..22fa5b10b03
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_ipc/include/esp_ipc_isr.h
@@ -0,0 +1,120 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_ESP_IPC_ISR_ENABLE
+
+/**
+ * @brief IPC ISR Callback
+ *
+ * A callback of this type should be provided as an argument when calling esp_ipc_isr_asm_call() or
+ * esp_ipc_isr_asm_call_blocking().
+ */
+typedef void (*esp_ipc_isr_func_t)(void* arg);
+
+/**
+ * @brief Execute an assembly callback on the other CPU
+ *
+ * Execute a given callback on the other CPU in the context of a High Priority Interrupt.
+ *
+ * - This function will busy-wait in a critical section until the other CPU has started execution of the callback
+ * - The callback must be written in assembly, is invoked using a CALLX0 instruction, and has a2, a3, a4 as scratch
+ *   registers. See docs for more details
+ *
+ * @note This function is not available in single-core mode.
+ *
+ * @param[in]   func    Pointer to a function of type void func(void* arg) to be executed
+ * @param[in]   arg     Arbitrary argument of type void* to be passed into the function
+ */
+void esp_ipc_isr_asm_call(esp_ipc_isr_func_t func, void* arg);
+
+/**
+ * @brief Execute an assembly callback on the other CPU and busy-wait until it completes
+ *
+ * This function is identical to esp_ipc_isr_asm_call() except that this function will busy-wait until the execution of
+ * the callback completes.
+ *
+ * @note This function is not available in single-core mode.
+ *
+ * @param[in]   func    Pointer to a function of type void func(void* arg) to be executed
+ * @param[in]   arg     Arbitrary argument of type void* to be passed into the function
+ */
+void esp_ipc_isr_asm_call_blocking(esp_ipc_isr_func_t func, void* arg);
+
+/**
+ * @brief Stall the other CPU
+ *
+ * This function will stall the other CPU. The other CPU is stalled by busy-waiting in the context of a High Priority
+ * Interrupt. The other CPU will not be resumed until esp_ipc_isr_release_other_cpu() is called.
+ *
+ * - This function is internally implemented using IPC ISR
+ * - This function is used for DPORT workaround.
+ * - If the stall feature is paused using esp_ipc_isr_stall_pause(), this function will have no effect
+ *
+ * @note This function is not available in single-core mode.
+ */
+void esp_ipc_isr_stall_other_cpu(void);
+
+/**
+ * @brief Release the other CPU
+ *
+ * This function will release the other CPU that was previously stalled from calling esp_ipc_isr_stall_other_cpu()
+ *
+ * - This function is used for DPORT workaround.
+ * - If the stall feature is paused using esp_ipc_isr_stall_pause(), this function will have no effect
+ *
+ * @note This function is not available in single-core mode.
+ */
+void esp_ipc_isr_release_other_cpu(void);
+
+/**
+ * @brief Puase the CPU stall feature
+ *
+ * This function will pause the CPU stall feature. Once paused, calls to esp_ipc_isr_stall_other_cpu() and
+ * esp_ipc_isr_release_other_cpu() will have no effect. If a IPC ISR call is already in progress, this function will
+ * busy-wait until the call completes before pausing the CPU stall feature.
+ */
+void esp_ipc_isr_stall_pause(void);
+
+/**
+ * @brief Abort a CPU stall
+ *
+ * This function will abort any stalling routine of the other CPU due to a pervious call to
+ * esp_ipc_isr_stall_other_cpu(). This function aborts the stall in a non-recoverable manner, thus should only be called
+ * in case of a panic().
+ *
+ * - This function is used in panic handling code
+ */
+void esp_ipc_isr_stall_abort(void);
+
+/**
+ * @brief Resume the CPU stall feature
+ *
+ * This function will resume the CPU stall feature that was previously paused by calling esp_ipc_isr_stall_pause(). Once
+ * resumed, calls to esp_ipc_isr_stall_other_cpu() and esp_ipc_isr_release_other_cpu() will have effect again.
+ */
+void esp_ipc_isr_stall_resume(void);
+
+#else // CONFIG_ESP_IPC_ISR_ENABLE
+
+#define esp_ipc_isr_stall_other_cpu()
+#define esp_ipc_isr_release_other_cpu()
+#define esp_ipc_isr_stall_pause()
+#define esp_ipc_isr_stall_abort()
+#define esp_ipc_isr_stall_resume()
+
+#endif // CONFIG_ESP_IPC_ISR_ENABLE
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_commands.h b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_commands.h
new file mode 100644
index 00000000000..091ef1cffef
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_commands.h
@@ -0,0 +1,54 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+/* Common LCD panel commands */
+#define LCD_CMD_NOP          0x00 // This command is empty command
+#define LCD_CMD_SWRESET      0x01 // Software reset registers (the built-in frame buffer is not affected)
+#define LCD_CMD_RDDID        0x04 // Read 24-bit display ID
+#define LCD_CMD_RDDST        0x09 // Read display status
+#define LCD_CMD_RDDPM        0x0A // Read display power mode
+#define LCD_CMD_RDD_MADCTL   0x0B // Read display MADCTL
+#define LCD_CMD_RDD_COLMOD   0x0C // Read display pixel format
+#define LCD_CMD_RDDIM        0x0D // Read display image mode
+#define LCD_CMD_RDDSM        0x0E // Read display signal mode
+#define LCD_CMD_RDDSR        0x0F // Read display self-diagnostic result
+#define LCD_CMD_SLPIN        0x10 // Go into sleep mode (DC/DC, oscillator, scanning stopped, but memory keeps content)
+#define LCD_CMD_SLPOUT       0x11 // Exit sleep mode
+#define LCD_CMD_PTLON        0x12 // Turns on partial display mode
+#define LCD_CMD_NORON        0x13 // Turns on normal display mode
+#define LCD_CMD_INVOFF       0x20 // Recover from display inversion mode
+#define LCD_CMD_INVON        0x21 // Go into display inversion mode
+#define LCD_CMD_GAMSET       0x26 // Select Gamma curve for current display
+#define LCD_CMD_DISPOFF      0x28 // Display off (disable frame buffer output)
+#define LCD_CMD_DISPON       0x29 // Display on (enable frame buffer output)
+#define LCD_CMD_CASET        0x2A // Set column address
+#define LCD_CMD_RASET        0x2B // Set row address
+#define LCD_CMD_RAMWR        0x2C // Write frame memory
+#define LCD_CMD_RAMRD        0x2E // Read frame memory
+#define LCD_CMD_PTLAR        0x30 // Define the partial area
+#define LCD_CMD_VSCRDEF      0x33 // Vertical scrolling definition
+#define LCD_CMD_TEOFF        0x34 // Turns of tearing effect
+#define LCD_CMD_TEON         0x35 // Turns on tearing effect
+
+#define LCD_CMD_MADCTL       0x36     // Memory data access control
+#define LCD_CMD_MH_BIT       (1 << 2) // Display data latch order, 0: refresh left to right, 1: refresh right to left
+#define LCD_CMD_BGR_BIT      (1 << 3) // RGB/BGR order, 0: RGB, 1: BGR
+#define LCD_CMD_ML_BIT       (1 << 4) // Line address order, 0: refresh top to bottom, 1: refresh bottom to top
+#define LCD_CMD_MV_BIT       (1 << 5) // Row/Column order, 0: normal mode, 1: reverse mode
+#define LCD_CMD_MX_BIT       (1 << 6) // Column address order, 0: left to right, 1: right to left
+#define LCD_CMD_MY_BIT       (1 << 7) // Row address order, 0: top to bottom, 1: bottom to top
+
+#define LCD_CMD_VSCSAD       0x37 // Vertical scroll start address
+#define LCD_CMD_IDMOFF       0x38 // Recover from IDLE mode
+#define LCD_CMD_IDMON        0x39 // Fall into IDLE mode (8 color depth is displayed)
+#define LCD_CMD_COLMOD       0x3A // Defines the format of RGB picture data
+#define LCD_CMD_RAMWRC       0x3C // Memory write continue
+#define LCD_CMD_RAMRDC       0x3E // Memory read continue
+#define LCD_CMD_STE          0x44 // Set tear scanline, tearing effect output signal when display module reaches line N
+#define LCD_CMD_GDCAN        0x45 // Get scanline
+#define LCD_CMD_WRDISBV      0x51 // Write display brightness
+#define LCD_CMD_RDDISBV      0x52 // Read display brightness value
diff --git a/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_io.h b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_io.h
new file mode 100644
index 00000000000..330f4d9a165
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_io.h
@@ -0,0 +1,224 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+#include "soc/soc_caps.h"
+#include "hal/lcd_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void *esp_lcd_spi_bus_handle_t;                       /*!< Type of LCD SPI bus handle */
+typedef void *esp_lcd_i2c_bus_handle_t;                       /*!< Type of LCD I2C bus handle */
+typedef struct esp_lcd_i80_bus_t *esp_lcd_i80_bus_handle_t;   /*!< Type of LCD intel 8080 bus handle */
+
+/**
+ * @brief Transmit LCD command and corresponding parameters
+ *
+ * @note Commands sent by this function are short, so they are sent using polling transactions.
+ *       The function does not return before the command tranfer is completed.
+ *       If any queued transactions sent by `esp_lcd_panel_io_tx_color()` are still pending when this function is called,
+ *       this function will wait until they are finished and the queue is empty before sending the command(s).
+ *
+ * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+ * @param[in] lcd_cmd The specific LCD command
+ * @param[in] param Buffer that holds the command specific parameters, set to NULL if no parameter is needed for the command
+ * @param[in] param_size Size of `param` in memory, in bytes, set to zero if no parameter is needed for the command
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_tx_param(esp_lcd_panel_io_handle_t io, int lcd_cmd, const void *param, size_t param_size);
+
+/**
+ * @brief Transmit LCD RGB data
+ *
+ * @note This function will package the command and RGB data into a transaction, and push into a queue.
+ *       The real transmission is performed in the background (DMA+interrupt).
+ *       The caller should take care of the lifecycle of the `color` buffer.
+ *       Recycling of color buffer should be done in the callback `on_color_trans_done()`.
+ *
+ * @param[in] io LCD panel IO handle, which is created by factory API like `esp_lcd_new_panel_io_spi()`
+ * @param[in] lcd_cmd The specific LCD command
+ * @param[in] color Buffer that holds the RGB color data
+ * @param[in] color_size Size of `color` in memory, in bytes
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_tx_color(esp_lcd_panel_io_handle_t io, int lcd_cmd, const void *color, size_t color_size);
+
+/**
+ * @brief Destory LCD panel IO handle (deinitialize panel and free all corresponding resource)
+ *
+ * @param[in] io LCD panel IO handle, which is created by factory API like `esp_lcd_new_panel_io_spi()`
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_del(esp_lcd_panel_io_handle_t io);
+
+/**
+ * @brief Type of LCD panel IO event data
+ */
+typedef struct {
+} esp_lcd_panel_io_event_data_t;
+
+/**
+ * @brief Declare the prototype of the function that will be invoked when panel IO finishes transferring color data
+ *
+ * @param[in] panel_io LCD panel IO handle, which is created by factory API like `esp_lcd_new_panel_io_spi()`
+ * @param[in] edata Panel IO event data, fed by driver
+ * @param[in] user_ctx User data, passed from `esp_lcd_panel_io_xxx_config_t`
+ * @return Whether a high priority task has been waken up by this function
+ */
+typedef bool (*esp_lcd_panel_io_color_trans_done_cb_t)(esp_lcd_panel_io_handle_t panel_io, esp_lcd_panel_io_event_data_t *edata, void *user_ctx);
+
+/**
+ * @brief Panel IO configuration structure, for SPI interface
+ */
+typedef struct {
+    int cs_gpio_num; /*!< GPIO used for CS line */
+    int dc_gpio_num; /*!< GPIO used to select the D/C line, set this to -1 if the D/C line not controlled by manually pulling high/low GPIO */
+    int spi_mode;    /*!< Traditional SPI mode (0~3) */
+    unsigned int pclk_hz;    /*!< Frequency of pixel clock */
+    size_t trans_queue_depth; /*!< Size of internal transaction queue */
+    esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done; /*!< Callback invoked when color data transfer has finished */
+    void *user_ctx;    /*!< User private data, passed directly to on_color_trans_done's user_ctx */
+    int lcd_cmd_bits;   /*!< Bit-width of LCD command */
+    int lcd_param_bits; /*!< Bit-width of LCD parameter */
+    struct {
+        unsigned int dc_as_cmd_phase: 1; /*!< D/C line value is encoded into SPI transaction command phase */
+        unsigned int dc_low_on_data: 1;  /*!< If this flag is enabled, DC line = 0 means transfer data, DC line = 1 means transfer command; vice versa */
+        unsigned int octal_mode: 1;      /*!< transmit with octal mode (8 data lines), this mode is used to simulate Intel 8080 timing */
+    } flags;
+} esp_lcd_panel_io_spi_config_t;
+
+/**
+ * @brief Create LCD panel IO handle, for SPI interface
+ *
+ * @param[in] bus SPI bus handle
+ * @param[in] io_config IO configuration, for SPI interface
+ * @param[out] ret_io Returned IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_spi(esp_lcd_spi_bus_handle_t bus, const esp_lcd_panel_io_spi_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+typedef struct {
+    uint32_t dev_addr; /*!< I2C device address */
+    esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done; /*!< Callback invoked when color data transfer has finished */
+    void *user_ctx; /*!< User private data, passed directly to on_color_trans_done's user_ctx */
+    size_t control_phase_bytes; /*!< I2C LCD panel will encode control information (e.g. D/C seclection) into control phase, in several bytes */
+    unsigned int dc_bit_offset; /*!< Offset of the D/C selection bit in control phase */
+    int lcd_cmd_bits;           /*!< Bit-width of LCD command */
+    int lcd_param_bits;         /*!< Bit-width of LCD parameter */
+    struct {
+        unsigned int dc_low_on_data: 1;  /*!< If this flag is enabled, DC line = 0 means transfer data, DC line = 1 means transfer command; vice versa */
+    } flags;
+} esp_lcd_panel_io_i2c_config_t;
+
+/**
+ * @brief Create LCD panel IO handle, for I2C interface
+ *
+ * @param[in] bus I2C bus handle
+ * @param[in] io_config IO configuration, for I2C interface
+ * @param[out] ret_io Returned IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_i2c(esp_lcd_i2c_bus_handle_t bus, const esp_lcd_panel_io_i2c_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+#if SOC_LCD_I80_SUPPORTED
+/**
+ * @brief LCD Intel 8080 bus configuration structure
+ */
+typedef struct {
+    int dc_gpio_num; /*!< GPIO used for D/C line */
+    int wr_gpio_num; /*!< GPIO used for WR line */
+    lcd_clock_source_t clk_src; /*!< Clock source for the I80 LCD peripheral */
+    int data_gpio_nums[SOC_LCD_I80_BUS_WIDTH]; /*!< GPIOs used for data lines */
+    size_t bus_width;          /*!< Number of data lines, 8 or 16 */
+    size_t max_transfer_bytes; /*!< Maximum transfer size, this determines the length of internal DMA link */
+} esp_lcd_i80_bus_config_t;
+
+/**
+ * @brief Create Intel 8080 bus handle
+ *
+ * @param[in] bus_config Bus configuration
+ * @param[out] ret_bus Returned bus handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_ERR_NOT_FOUND     if no free bus is available
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lcd_i80_bus_handle_t *ret_bus);
+
+/**
+ * @brief Destory Intel 8080 bus handle
+ *
+ * @param[in] bus Intel 8080 bus handle, created by `esp_lcd_new_i80_bus()`
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_INVALID_STATE if there still be some device attached to the bus
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_del_i80_bus(esp_lcd_i80_bus_handle_t bus);
+
+/**
+ * @brief Panel IO configuration structure, for intel 8080 interface
+ */
+typedef struct {
+    int cs_gpio_num;         /*!< GPIO used for CS line, set to -1 will declaim exclusively use of I80 bus */
+    unsigned int pclk_hz;    /*!< Frequency of pixel clock */
+    size_t trans_queue_depth; /*!< Transaction queue size, larger queue, higher throughput */
+    esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done; /*!< Callback invoked when color data was tranferred done */
+    void *user_ctx;    /*!< User private data, passed directly to on_color_trans_done's user_ctx */
+    int lcd_cmd_bits;   /*!< Bit-width of LCD command */
+    int lcd_param_bits; /*!< Bit-width of LCD parameter */
+    struct {
+        unsigned int dc_idle_level: 1;  /*!< Level of DC line in IDLE phase */
+        unsigned int dc_cmd_level: 1;   /*!< Level of DC line in CMD phase */
+        unsigned int dc_dummy_level: 1; /*!< Level of DC line in DUMMY phase */
+        unsigned int dc_data_level: 1;  /*!< Level of DC line in DATA phase */
+    } dc_levels; /*!< Each i80 device might have its own D/C control logic */
+    struct {
+        unsigned int cs_active_high: 1;     /*!< If set, a high level of CS line will select the device, otherwise, CS line is low level active */
+        unsigned int reverse_color_bits: 1; /*!< Reverse the data bits, D[N:0] -> D[0:N] */
+        unsigned int swap_color_bytes: 1;   /*!< Swap adjacent two color bytes */
+        unsigned int pclk_active_neg: 1;    /*!< The display will write data lines when there's a falling edge on WR signal (a.k.a the PCLK) */
+        unsigned int pclk_idle_low: 1;      /*!< The WR signal (a.k.a the PCLK) stays at low level in IDLE phase */
+    } flags;
+} esp_lcd_panel_io_i80_config_t;
+
+/**
+ * @brief Create LCD panel IO, for Intel 8080 interface
+ *
+ * @param[in] bus Intel 8080 bus handle, created by `esp_lcd_new_i80_bus()`
+ * @param[in] io_config IO configuration, for i80 interface
+ * @param[out] ret_io Returned panel IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NOT_SUPPORTED if some configuration can't be satisfied, e.g. pixel clock out of the range
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_panel_io_i80_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+#endif // SOC_LCD_I80_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_ops.h b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_ops.h
new file mode 100644
index 00000000000..5099233ce83
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_ops.h
@@ -0,0 +1,126 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Reset LCD panel
+ *
+ * @note Panel reset must be called before attempting to initialize the panel using `esp_lcd_panel_init()`.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_reset(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Initialize LCD panel
+ *
+ * @note Before calling this function, make sure the LCD panel has finished the `reset` stage by `esp_lcd_panel_reset()`.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_init(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Deinitialize the LCD panel
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_del(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Draw bitmap on LCD panel
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] x_start Start index on x-axis (x_start included)
+ * @param[in] y_start Start index on y-axis (y_start included)
+ * @param[in] x_end End index on x-axis (x_end not included)
+ * @param[in] y_end End index on y-axis (y_end not included)
+ * @param[in] color_data RGB color data that will be dumped to the specific window range
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_draw_bitmap(esp_lcd_panel_handle_t panel, int x_start, int y_start, int x_end, int y_end, const void *color_data);
+
+/**
+ * @brief Mirror the LCD panel on specific axis
+ *
+ * @note Combined with `esp_lcd_panel_swap_xy()`, one can realize screen rotation
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] mirror_x Whether the panel will be mirrored about the x axis
+ * @param[in] mirror_y Whether the panel will be mirrored about the y axis
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_mirror(esp_lcd_panel_handle_t panel, bool mirror_x, bool mirror_y);
+
+/**
+ * @brief Swap/Exchange x and y axis
+ *
+ * @note Combined with `esp_lcd_panel_mirror()`, one can realize screen rotation
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] swap_axes Whether to swap the x and y axis
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_swap_xy(esp_lcd_panel_handle_t panel, bool swap_axes);
+
+/**
+ * @brief Set extra gap in x and y axis
+ *
+ * The gap is the space (in pixels) between the left/top sides of the LCD panel and the first row/column respectively of the actual contents displayed.
+ *
+ * @note Setting a gap is useful when positioning or centering a frame that is smaller than the LCD.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] x_gap Extra gap on x axis, in pixels
+ * @param[in] y_gap Extra gap on y axis, in pixels
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_set_gap(esp_lcd_panel_handle_t panel, int x_gap, int y_gap);
+
+/**
+ * @brief Invert the color (bit-wise invert the color data line)
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] invert_color_data Whether to invert the color data
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_invert_color(esp_lcd_panel_handle_t panel, bool invert_color_data);
+
+/**
+ * @brief Turn off the display
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] off Whether to turn off the screen
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_disp_off(esp_lcd_panel_handle_t panel, bool off);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_rgb.h b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_rgb.h
new file mode 100644
index 00000000000..6f06deb8165
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_rgb.h
@@ -0,0 +1,129 @@
+/*
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+#include "soc/soc_caps.h"
+#include "hal/lcd_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_LCD_RGB_SUPPORTED
+/**
+ * @brief LCD RGB timing structure
+ * @verbatim
+ *                                                 Total Width
+ *                             <--------------------------------------------------->
+ *                       HSYNC width HBP             Active Width                HFP
+ *                             <---><--><--------------------------------------><--->
+ *                         ____    ____|_______________________________________|____|
+ *                             |___|   |                                       |    |
+ *                                     |                                       |    |
+ *                         __|         |                                       |    |
+ *            /|\    /|\  |            |                                       |    |
+ *             | VSYNC|   |            |                                       |    |
+ *             |Width\|/  |__          |                                       |    |
+ *             |     /|\     |         |                                       |    |
+ *             |  VBP |      |         |                                       |    |
+ *             |     \|/_____|_________|_______________________________________|    |
+ *             |     /|\     |         | / / / / / / / / / / / / / / / / / / / |    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *    Total    |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *    Height   |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |Active|      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |Heigh |      |         |/ / / / / / Active Display Area / / / /|    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |     \|/_____|_________|_______________________________________|    |
+ *             |     /|\     |                                                      |
+ *             |  VFP |      |                                                      |
+ *            \|/    \|/_____|______________________________________________________|
+ * @endverbatim
+ */
+typedef struct {
+    unsigned int pclk_hz;           /*!< Frequency of pixel clock */
+    unsigned int h_res;             /*!< Horizontal resolution, i.e. the number of pixels in a line */
+    unsigned int v_res;             /*!< Vertical resolution, i.e. the number of lines in the frame  */
+    unsigned int hsync_pulse_width; /*!< Horizontal sync width, unit: PCLK period */
+    unsigned int hsync_back_porch;  /*!< Horizontal back porch, number of PCLK between hsync and start of line active data */
+    unsigned int hsync_front_porch; /*!< Horizontal front porch, number of PCLK between the end of active data and the next hsync */
+    unsigned int vsync_pulse_width; /*!< Vertical sync width, unit: number of lines */
+    unsigned int vsync_back_porch;  /*!< Vertical back porch, number of invalid lines between vsync and start of frame */
+    unsigned int vsync_front_porch; /*!< Vertical front porch, number of invalid lines between then end of frame and the next vsync */
+    struct {
+        unsigned int hsync_idle_low: 1;  /*!< The hsync signal is low in IDLE state */
+        unsigned int vsync_idle_low: 1;  /*!< The vsync signal is low in IDLE state */
+        unsigned int de_idle_high: 1;    /*!< The de signal is high in IDLE state */
+        unsigned int pclk_active_neg: 1; /*!< Whether the display data is clocked out at the falling edge of PCLK */
+        unsigned int pclk_idle_high: 1;  /*!< The PCLK stays at high level in IDLE phase */
+    } flags;
+} esp_lcd_rgb_timing_t;
+
+/**
+ * @brief Type of RGB LCD panel event data
+ */
+typedef struct {
+} esp_lcd_rgb_panel_event_data_t;
+
+/**
+ * @brief Declare the prototype of the function that will be invoked when panel IO finishes transferring color data
+ *
+ * @param[in] panel LCD panel handle, returned from `esp_lcd_new_rgb_panel`
+ * @param[in] edata Panel event data, fed by driver
+ * @param[in] user_ctx User data, passed from `esp_lcd_rgb_panel_config_t`
+ * @return Whether a high priority task has been waken up by this function
+ */
+typedef bool (*esp_lcd_rgb_panel_frame_trans_done_cb_t)(esp_lcd_panel_handle_t panel, esp_lcd_rgb_panel_event_data_t *edata, void *user_ctx);
+
+/**
+ * @brief LCD RGB panel configuration structure
+ */
+typedef struct {
+    lcd_clock_source_t clk_src;   /*!< Clock source for the RGB LCD peripheral */
+    esp_lcd_rgb_timing_t timings; /*!< RGB timing parameters */
+    size_t data_width;            /*!< Number of data lines */
+    size_t sram_trans_align;      /*!< Alignment for framebuffer that allocated in SRAM */
+    size_t psram_trans_align;     /*!< Alignment for framebuffer that allocated in PSRAM */
+    int hsync_gpio_num;           /*!< GPIO used for HSYNC signal */
+    int vsync_gpio_num;           /*!< GPIO used for VSYNC signal */
+    int de_gpio_num;              /*!< GPIO used for DE signal, set to -1 if it's not used */
+    int pclk_gpio_num;            /*!< GPIO used for PCLK signal */
+    int data_gpio_nums[SOC_LCD_RGB_DATA_WIDTH]; /*!< GPIOs used for data lines */
+    int disp_gpio_num; /*!< GPIO used for display control signal, set to -1 if it's not used */
+    esp_lcd_rgb_panel_frame_trans_done_cb_t on_frame_trans_done; /*!< Callback invoked when one frame buffer has transferred done */
+    void *user_ctx; /*!< User data which would be passed to on_frame_trans_done's user_ctx */
+    struct {
+        unsigned int disp_active_low: 1; /*!< If this flag is enabled, a low level of display control signal can turn the screen on; vice versa */
+        unsigned int relax_on_idle: 1;   /*!< If this flag is enabled, the host won't refresh the LCD if nothing changed in host's frame buffer (this is usefull for LCD with built-in GRAM) */
+        unsigned int fb_in_psram: 1;     /*!< If this flag is enabled, the frame buffer will be allocated from PSRAM preferentially */
+    } flags;
+} esp_lcd_rgb_panel_config_t;
+
+/**
+ * @brief Create RGB LCD panel
+ *
+ * @param rgb_panel_config RGB panel configuration
+ * @param ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_ERR_NOT_FOUND     if no free RGB panel is available
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_rgb_panel(const esp_lcd_rgb_panel_config_t *rgb_panel_config, esp_lcd_panel_handle_t *ret_panel);
+
+#endif // SOC_LCD_RGB_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_vendor.h b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_vendor.h
new file mode 100644
index 00000000000..dde8be68d3b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_panel_vendor.h
@@ -0,0 +1,70 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configuration structure for panel device
+ */
+typedef struct {
+    int reset_gpio_num; /*!< GPIO used to reset the LCD panel, set to -1 if it's not used */
+    esp_lcd_color_space_t color_space; /*!< Set the color space used by the LCD panel */
+    unsigned int bits_per_pixel;       /*!< Color depth, in bpp */
+    struct {
+        unsigned int reset_active_high: 1; /*!< Setting this if the panel reset is high level active */
+    } flags;
+    void *vendor_config; /* vendor specific configuration, optional, left as NULL if not used */
+} esp_lcd_panel_dev_config_t;
+
+/**
+ * @brief Create LCD panel for model ST7789
+ *
+ * @param[in] io LCD panel IO handle
+ * @param[in] panel_dev_config general panel device configuration
+ * @param[out] ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_st7789(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel);
+
+/**
+ * @brief Create LCD panel for model NT35510
+ *
+ * @param[in] io LCD panel IO handle
+ * @param[in] panel_dev_config general panel device configuration
+ * @param[out] ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_nt35510(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel);
+
+/**
+ * @brief Create LCD panel for model SSD1306
+ *
+ * @param[in] io LCD panel IO handle
+ * @param[in] panel_dev_config general panel device configuration
+ * @param[out] ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_ssd1306(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_types.h b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_types.h
new file mode 100644
index 00000000000..7d4953247fb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_lcd/include/esp_lcd_types.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_io_t *esp_lcd_panel_io_handle_t; /*!< Type of LCD panel IO handle */
+typedef struct esp_lcd_panel_t *esp_lcd_panel_handle_t;       /*!< Type of LCD panel handle */
+
+/**
+ * @brief LCD color space type definition
+ */
+typedef enum {
+    ESP_LCD_COLOR_SPACE_RGB,        /*!< Color space: RGB */
+    ESP_LCD_COLOR_SPACE_BGR,        /*!< Color space: BGR */
+    ESP_LCD_COLOR_SPACE_MONOCHROME, /*!< Color space: monochrome */
+} esp_lcd_color_space_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_lcd/interface/esp_lcd_panel_interface.h b/tools/sdk/esp32s3/include/esp_lcd/interface/esp_lcd_panel_interface.h
new file mode 100644
index 00000000000..0705b145a25
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_lcd/interface/esp_lcd_panel_interface.h
@@ -0,0 +1,126 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_t esp_lcd_panel_t;  /*!< Type of LCD panel */
+
+/**
+ * @brief LCD panel interface
+ */
+struct esp_lcd_panel_t {
+    /**
+     * @brief Reset LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*reset)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Initialize LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*init)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Destory LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*del)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Draw bitmap on LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_start Start index on x-axis (x_start included)
+     * @param[in] y_start Start index on y-axis (y_start included)
+     * @param[in] x_end End index on x-axis (x_end not included)
+     * @param[in] y_end End index on y-axis (y_end not included)
+     * @param[in] color_data RGB color data that will be dumped to the specific window range
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*draw_bitmap)(esp_lcd_panel_t *panel, int x_start, int y_start, int x_end, int y_end, const void *color_data);
+
+    /**
+     * @brief Mirror the LCD panel on specific axis
+     *
+     * @note Combine this function with `swap_xy`, one can realize screen rotatation
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_axis Whether the panel will be mirrored about the x_axis
+     * @param[in] y_axis Whether the panel will be mirrored about the y_axis
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*mirror)(esp_lcd_panel_t *panel, bool x_axis, bool y_axis);
+
+    /**
+     * @brief Swap/Exchange x and y axis
+     *
+     * @note Combine this function with `mirror`, one can realize screen rotatation
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] swap_axes Whether to swap the x and y axis
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*swap_xy)(esp_lcd_panel_t *panel, bool swap_axes);
+
+    /**
+     * @brief Set extra gap in x and y axis
+     *
+     * @note The gap is only used for calculating the real coordinates.
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_gap Extra gap on x axis, in pixels
+     * @param[in] y_gap Extra gap on y axis, in pixels
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*set_gap)(esp_lcd_panel_t *panel, int x_gap, int y_gap);
+
+    /**
+     * @brief Invert the color (bit 1 -> 0 for color data line, and vice versa)
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] invert_color_data Whether to invert the color data
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*invert_color)(esp_lcd_panel_t *panel, bool invert_color_data);
+
+    /**
+     * @brief Turn off the display
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] off Whether to turn off the screen
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*disp_off)(esp_lcd_panel_t *panel, bool off);
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_lcd/interface/esp_lcd_panel_io_interface.h b/tools/sdk/esp32s3/include/esp_lcd/interface/esp_lcd_panel_io_interface.h
new file mode 100644
index 00000000000..2faa6fab268
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_lcd/interface/esp_lcd_panel_io_interface.h
@@ -0,0 +1,64 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_io_t esp_lcd_panel_io_t; /*!< Type of LCD panel IO */
+
+/**
+ * @brief LCD panel IO interface
+ */
+struct esp_lcd_panel_io_t {
+    /**
+     * @brief Transmit LCD command and corresponding parameters
+     *
+     * @note This is the panel-specific interface called by function `esp_lcd_panel_io_tx_param()`.
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @param[in] lcd_cmd The specific LCD command
+     * @param[in] param Buffer that holds the command specific parameters, set to NULL if no parameter is needed for the command
+     * @param[in] param_size Size of `param` in memory, in bytes, set to zero if no parameter is needed for the command
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*tx_param)(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size);
+
+    /**
+     * @brief Transmit LCD RGB data
+     *
+     * @note This is the panel-specific interface called by function `esp_lcd_panel_io_tx_color()`.
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @param[in] lcd_cmd The specific LCD command
+     * @param[in] color Buffer that holds the RGB color data
+     * @param[in] color_size Size of `color` in memory, in bytes
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*tx_color)(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size);
+
+    /**
+     * @brief Destory LCD panel IO handle (deinitialize all and free resource)
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*del)(esp_lcd_panel_io_t *io);
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_littlefs/include/esp_littlefs.h b/tools/sdk/esp32s3/include/esp_littlefs/include/esp_littlefs.h
new file mode 100644
index 00000000000..07f35231291
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_littlefs/include/esp_littlefs.h
@@ -0,0 +1,103 @@
+#ifndef ESP_LITTLEFS_H__
+#define ESP_LITTLEFS_H__
+
+#include "esp_err.h"
+#include "littlefs/lfs.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Last Modified Time
+ *
+ * Use 't' for LITTLEFS_ATTR_MTIME to match example:
+ *     https://github.com/ARMmbed/littlefs/issues/23#issuecomment-482293539
+ * And to match other external tools such as:
+ *     https://github.com/earlephilhower/mklittlefs
+ */
+#define LITTLEFS_ATTR_MTIME ((uint8_t) 't')
+
+/**
+ *Configuration structure for esp_vfs_littlefs_register.
+ */
+typedef struct {
+    const char *base_path;            /**< Mounting point. */
+    const char *partition_label;      /**< Label of partition to use. */
+    uint8_t format_if_mount_failed:1; /**< Format the file system if it fails to mount. */
+    uint8_t dont_mount:1;             /**< Don't attempt to mount or format. Overrides format_if_mount_failed */
+} esp_vfs_littlefs_conf_t;
+
+/**
+ * Register and mount littlefs to VFS with given path prefix.
+ *
+ * @param   conf                      Pointer to esp_vfs_littlefs_conf_t configuration structure
+ *
+ * @return  
+ *          - ESP_OK                  if success
+ *          - ESP_ERR_NO_MEM          if objects could not be allocated
+ *          - ESP_ERR_INVALID_STATE   if already mounted or partition is encrypted
+ *          - ESP_ERR_NOT_FOUND       if partition for littlefs was not found
+ *          - ESP_FAIL                if mount or format fails
+ */
+esp_err_t esp_vfs_littlefs_register(const esp_vfs_littlefs_conf_t * conf);
+
+/**
+ * Unregister and unmount littlefs from VFS
+ *
+ * @param partition_label  Label of the partition to unregister.
+ *
+ * @return  
+ *          - ESP_OK if successful
+ *          - ESP_ERR_INVALID_STATE already unregistered
+ */
+esp_err_t esp_vfs_littlefs_unregister(const char* partition_label);
+
+/**
+ * Check if littlefs is mounted
+ *
+ * @param partition_label  Label of the partition to check.
+ *
+ * @return  
+ *          - true    if mounted
+ *          - false   if not mounted
+ */
+bool esp_littlefs_mounted(const char* partition_label);
+
+/**
+ * Format the littlefs partition
+ *
+ * @param partition_label  Label of the partition to format.
+ * @return  
+ *          - ESP_OK      if successful
+ *          - ESP_FAIL    on error
+ */
+esp_err_t esp_littlefs_format(const char* partition_label);
+
+/**
+ * Get information for littlefs
+ *
+ * @param partition_label           Optional, label of the partition to get info for.
+ * @param[out] total_bytes          Size of the file system
+ * @param[out] used_bytes           Current used bytes in the file system
+ *
+ * @return  
+ *          - ESP_OK                  if success
+ *          - ESP_ERR_INVALID_STATE   if not mounted
+ */
+esp_err_t esp_littlefs_info(const char* partition_label, size_t *total_bytes, size_t *used_bytes);
+
+#if CONFIG_LITTLEFS_HUMAN_READABLE
+/**
+ * @brief converts an enumerated lfs error into a string.
+ * @param lfs_errno The enumerated littlefs error.
+ */
+const char * esp_littlefs_errno(enum lfs_error lfs_errno);
+#endif
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_littlefs/src/lfs_config.h b/tools/sdk/esp32s3/include/esp_littlefs/src/lfs_config.h
new file mode 100644
index 00000000000..809d2ccc517
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_littlefs/src/lfs_config.h
@@ -0,0 +1,232 @@
+/*
+ * lfs utility functions
+ *
+ * Copyright (c) 2017, Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef LFS_CFG_H
+#define LFS_CFG_H
+
+// System includes
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+#include <inttypes.h>
+#include "esp_heap_caps.h"
+
+#ifndef LFS_NO_MALLOC
+#include <stdlib.h>
+#endif
+#ifndef LFS_NO_ASSERT
+#include <assert.h>
+#endif
+#if !defined(LFS_NO_DEBUG) || \
+        !defined(LFS_NO_WARN) || \
+        !defined(LFS_NO_ERROR) || \
+        defined(LFS_YES_TRACE)
+#include <stdio.h>
+#endif
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+// Macros, may be replaced by system specific wrappers. Arguments to these
+// macros must not have side-effects as the macros can be removed for a smaller
+// code footprint
+
+// Logging functions
+#ifndef LFS_TRACE
+#ifdef LFS_YES_TRACE
+#define LFS_TRACE_(fmt, ...) \
+    printf("%s:%d:trace: " fmt "%s\n", __FILE__, __LINE__, __VA_ARGS__)
+#define LFS_TRACE(...) LFS_TRACE_(__VA_ARGS__, "")
+#else
+#define LFS_TRACE(...)
+#endif
+#endif
+
+#ifndef LFS_DEBUG
+#ifndef LFS_NO_DEBUG
+#define LFS_DEBUG_(fmt, ...) \
+    printf("%s:%d:debug: " fmt "%s\n", __FILE__, __LINE__, __VA_ARGS__)
+#define LFS_DEBUG(...) LFS_DEBUG_(__VA_ARGS__, "")
+#else
+#define LFS_DEBUG(...)
+#endif
+#endif
+
+#ifndef LFS_WARN
+#ifndef LFS_NO_WARN
+#define LFS_WARN_(fmt, ...) \
+    printf("%s:%d:warn: " fmt "%s\n", __FILE__, __LINE__, __VA_ARGS__)
+#define LFS_WARN(...) LFS_WARN_(__VA_ARGS__, "")
+#else
+#define LFS_WARN(...)
+#endif
+#endif
+
+#ifndef LFS_ERROR
+#ifndef LFS_NO_ERROR
+#define LFS_ERROR_(fmt, ...) \
+    printf("%s:%d:error: " fmt "%s\n", __FILE__, __LINE__, __VA_ARGS__)
+#define LFS_ERROR(...) LFS_ERROR_(__VA_ARGS__, "")
+#else
+#define LFS_ERROR(...)
+#endif
+#endif
+
+// Runtime assertions
+#ifndef LFS_ASSERT
+#ifndef LFS_NO_ASSERT
+#define LFS_ASSERT(test) assert(test)
+#else
+#define LFS_ASSERT(test)
+#endif
+#endif
+
+
+// Builtin functions, these may be replaced by more efficient
+// toolchain-specific implementations. LFS_NO_INTRINSICS falls back to a more
+// expensive basic C implementation for debugging purposes
+
+// Min/max functions for unsigned 32-bit numbers
+static inline uint32_t lfs_max(uint32_t a, uint32_t b) {
+    return (a > b) ? a : b;
+}
+
+static inline uint32_t lfs_min(uint32_t a, uint32_t b) {
+    return (a < b) ? a : b;
+}
+
+// Align to nearest multiple of a size
+static inline uint32_t lfs_aligndown(uint32_t a, uint32_t alignment) {
+    return a - (a % alignment);
+}
+
+static inline uint32_t lfs_alignup(uint32_t a, uint32_t alignment) {
+    return lfs_aligndown(a + alignment-1, alignment);
+}
+
+// Find the smallest power of 2 greater than or equal to a
+static inline uint32_t lfs_npw2(uint32_t a) {
+#if !defined(LFS_NO_INTRINSICS) && (defined(__GNUC__) || defined(__CC_ARM))
+    return 32 - __builtin_clz(a-1);
+#else
+    uint32_t r = 0;
+    uint32_t s;
+    a -= 1;
+    s = (a > 0xffff) << 4; a >>= s; r |= s;
+    s = (a > 0xff  ) << 3; a >>= s; r |= s;
+    s = (a > 0xf   ) << 2; a >>= s; r |= s;
+    s = (a > 0x3   ) << 1; a >>= s; r |= s;
+    return (r | (a >> 1)) + 1;
+#endif
+}
+
+// Count the number of trailing binary zeros in a
+// lfs_ctz(0) may be undefined
+static inline uint32_t lfs_ctz(uint32_t a) {
+#if !defined(LFS_NO_INTRINSICS) && defined(__GNUC__)
+    return __builtin_ctz(a);
+#else
+    return lfs_npw2((a & -a) + 1) - 1;
+#endif
+}
+
+// Count the number of binary ones in a
+static inline uint32_t lfs_popc(uint32_t a) {
+#if !defined(LFS_NO_INTRINSICS) && (defined(__GNUC__) || defined(__CC_ARM))
+    return __builtin_popcount(a);
+#else
+    a = a - ((a >> 1) & 0x55555555);
+    a = (a & 0x33333333) + ((a >> 2) & 0x33333333);
+    return (((a + (a >> 4)) & 0xf0f0f0f) * 0x1010101) >> 24;
+#endif
+}
+
+// Find the sequence comparison of a and b, this is the distance
+// between a and b ignoring overflow
+static inline int lfs_scmp(uint32_t a, uint32_t b) {
+    return (int)(unsigned)(a - b);
+}
+
+// Convert between 32-bit little-endian and native order
+static inline uint32_t lfs_fromle32(uint32_t a) {
+#if !defined(LFS_NO_INTRINSICS) && ( \
+    (defined(  BYTE_ORDER  ) && defined(  ORDER_LITTLE_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_LITTLE_ENDIAN  ) || \
+    (defined(__BYTE_ORDER  ) && defined(__ORDER_LITTLE_ENDIAN  ) && __BYTE_ORDER   == __ORDER_LITTLE_ENDIAN  ) || \
+    (defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__))
+    return a;
+#elif !defined(LFS_NO_INTRINSICS) && ( \
+    (defined(  BYTE_ORDER  ) && defined(  ORDER_BIG_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_BIG_ENDIAN  ) || \
+    (defined(__BYTE_ORDER  ) && defined(__ORDER_BIG_ENDIAN  ) && __BYTE_ORDER   == __ORDER_BIG_ENDIAN  ) || \
+    (defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
+    return __builtin_bswap32(a);
+#else
+    return (((uint8_t*)&a)[0] <<  0) |
+           (((uint8_t*)&a)[1] <<  8) |
+           (((uint8_t*)&a)[2] << 16) |
+           (((uint8_t*)&a)[3] << 24);
+#endif
+}
+
+static inline uint32_t lfs_tole32(uint32_t a) {
+    return lfs_fromle32(a);
+}
+
+// Convert between 32-bit big-endian and native order
+static inline uint32_t lfs_frombe32(uint32_t a) {
+#if !defined(LFS_NO_INTRINSICS) && ( \
+    (defined(  BYTE_ORDER  ) && defined(  ORDER_LITTLE_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_LITTLE_ENDIAN  ) || \
+    (defined(__BYTE_ORDER  ) && defined(__ORDER_LITTLE_ENDIAN  ) && __BYTE_ORDER   == __ORDER_LITTLE_ENDIAN  ) || \
+    (defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__))
+    return __builtin_bswap32(a);
+#elif !defined(LFS_NO_INTRINSICS) && ( \
+    (defined(  BYTE_ORDER  ) && defined(  ORDER_BIG_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_BIG_ENDIAN  ) || \
+    (defined(__BYTE_ORDER  ) && defined(__ORDER_BIG_ENDIAN  ) && __BYTE_ORDER   == __ORDER_BIG_ENDIAN  ) || \
+    (defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
+    return a;
+#else
+    return (((uint8_t*)&a)[0] << 24) |
+           (((uint8_t*)&a)[1] << 16) |
+           (((uint8_t*)&a)[2] <<  8) |
+           (((uint8_t*)&a)[3] <<  0);
+#endif
+}
+
+static inline uint32_t lfs_tobe32(uint32_t a) {
+    return lfs_frombe32(a);
+}
+
+// Calculate CRC-32 with polynomial = 0x04c11db7
+uint32_t lfs_crc(uint32_t crc, const void *buffer, size_t size);
+
+// Allocate memory, only used if buffers are not provided to littlefs
+// Note, memory must be 64-bit aligned
+static inline void *lfs_malloc(size_t size) {
+#ifndef LFS_NO_MALLOC
+    return heap_caps_malloc(size, MALLOC_CAP_8BIT | MALLOC_CAP_INTERNAL);
+#else
+    (void)size;
+    return NULL;
+#endif
+}
+
+// Deallocate memory, only used if buffers are not provided to littlefs
+static inline void lfs_free(void *p) {
+#ifndef LFS_NO_MALLOC
+    free(p);
+#else
+    (void)p;
+#endif
+}
+
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/bd/lfs_filebd.h b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/bd/lfs_filebd.h
new file mode 100644
index 00000000000..0d56434aa15
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/bd/lfs_filebd.h
@@ -0,0 +1,73 @@
+/*
+ * Block device emulated in a file
+ *
+ * Copyright (c) 2017, Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef LFS_FILEBD_H
+#define LFS_FILEBD_H
+
+#include "lfs.h"
+#include "lfs_util.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+// Block device specific tracing
+#ifdef LFS_FILEBD_YES_TRACE
+#define LFS_FILEBD_TRACE(...) LFS_TRACE(__VA_ARGS__)
+#else
+#define LFS_FILEBD_TRACE(...)
+#endif
+
+// filebd config (optional)
+struct lfs_filebd_config {
+    // 8-bit erase value to use for simulating erases. -1 does not simulate
+    // erases, which can speed up testing by avoiding all the extra block-device
+    // operations to store the erase value.
+    int32_t erase_value;
+};
+
+// filebd state
+typedef struct lfs_filebd {
+    int fd;
+    const struct lfs_filebd_config *cfg;
+} lfs_filebd_t;
+
+
+// Create a file block device using the geometry in lfs_config
+int lfs_filebd_create(const struct lfs_config *cfg, const char *path);
+int lfs_filebd_createcfg(const struct lfs_config *cfg, const char *path,
+        const struct lfs_filebd_config *bdcfg);
+
+// Clean up memory associated with block device
+int lfs_filebd_destroy(const struct lfs_config *cfg);
+
+// Read a block
+int lfs_filebd_read(const struct lfs_config *cfg, lfs_block_t block,
+        lfs_off_t off, void *buffer, lfs_size_t size);
+
+// Program a block
+//
+// The block must have previously been erased.
+int lfs_filebd_prog(const struct lfs_config *cfg, lfs_block_t block,
+        lfs_off_t off, const void *buffer, lfs_size_t size);
+
+// Erase a block
+//
+// A block must be erased before being programmed. The
+// state of an erased block is undefined.
+int lfs_filebd_erase(const struct lfs_config *cfg, lfs_block_t block);
+
+// Sync the block device
+int lfs_filebd_sync(const struct lfs_config *cfg);
+
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/bd/lfs_rambd.h b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/bd/lfs_rambd.h
new file mode 100644
index 00000000000..56a45ce90d5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/bd/lfs_rambd.h
@@ -0,0 +1,75 @@
+/*
+ * Block device emulated in RAM
+ *
+ * Copyright (c) 2017, Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef LFS_RAMBD_H
+#define LFS_RAMBD_H
+
+#include "lfs.h"
+#include "lfs_util.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+// Block device specific tracing
+#ifdef LFS_RAMBD_YES_TRACE
+#define LFS_RAMBD_TRACE(...) LFS_TRACE(__VA_ARGS__)
+#else
+#define LFS_RAMBD_TRACE(...)
+#endif
+
+// rambd config (optional)
+struct lfs_rambd_config {
+    // 8-bit erase value to simulate erasing with. -1 indicates no erase
+    // occurs, which is still a valid block device
+    int32_t erase_value;
+
+    // Optional statically allocated buffer for the block device.
+    void *buffer;
+};
+
+// rambd state
+typedef struct lfs_rambd {
+    uint8_t *buffer;
+    const struct lfs_rambd_config *cfg;
+} lfs_rambd_t;
+
+
+// Create a RAM block device using the geometry in lfs_config
+int lfs_rambd_create(const struct lfs_config *cfg);
+int lfs_rambd_createcfg(const struct lfs_config *cfg,
+        const struct lfs_rambd_config *bdcfg);
+
+// Clean up memory associated with block device
+int lfs_rambd_destroy(const struct lfs_config *cfg);
+
+// Read a block
+int lfs_rambd_read(const struct lfs_config *cfg, lfs_block_t block,
+        lfs_off_t off, void *buffer, lfs_size_t size);
+
+// Program a block
+//
+// The block must have previously been erased.
+int lfs_rambd_prog(const struct lfs_config *cfg, lfs_block_t block,
+        lfs_off_t off, const void *buffer, lfs_size_t size);
+
+// Erase a block
+//
+// A block must be erased before being programmed. The
+// state of an erased block is undefined.
+int lfs_rambd_erase(const struct lfs_config *cfg, lfs_block_t block);
+
+// Sync the block device
+int lfs_rambd_sync(const struct lfs_config *cfg);
+
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/bd/lfs_testbd.h b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/bd/lfs_testbd.h
new file mode 100644
index 00000000000..b1fb2e924e6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/bd/lfs_testbd.h
@@ -0,0 +1,141 @@
+/*
+ * Testing block device, wraps filebd and rambd while providing a bunch
+ * of hooks for testing littlefs in various conditions.
+ *
+ * Copyright (c) 2017, Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef LFS_TESTBD_H
+#define LFS_TESTBD_H
+
+#include "lfs.h"
+#include "lfs_util.h"
+#include "bd/lfs_rambd.h"
+#include "bd/lfs_filebd.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+// Block device specific tracing
+#ifdef LFS_TESTBD_YES_TRACE
+#define LFS_TESTBD_TRACE(...) LFS_TRACE(__VA_ARGS__)
+#else
+#define LFS_TESTBD_TRACE(...)
+#endif
+
+// Mode determining how "bad blocks" behave during testing. This simulates
+// some real-world circumstances such as progs not sticking (prog-noop),
+// a readonly disk (erase-noop), and ECC failures (read-error).
+//
+// Not that read-noop is not allowed. Read _must_ return a consistent (but
+// may be arbitrary) value on every read.
+enum lfs_testbd_badblock_behavior {
+    LFS_TESTBD_BADBLOCK_PROGERROR,
+    LFS_TESTBD_BADBLOCK_ERASEERROR,
+    LFS_TESTBD_BADBLOCK_READERROR,
+    LFS_TESTBD_BADBLOCK_PROGNOOP,
+    LFS_TESTBD_BADBLOCK_ERASENOOP,
+};
+
+// Type for measuring wear
+typedef uint32_t lfs_testbd_wear_t;
+typedef int32_t  lfs_testbd_swear_t;
+
+// testbd config, this is required for testing
+struct lfs_testbd_config {
+    // 8-bit erase value to use for simulating erases. -1 does not simulate
+    // erases, which can speed up testing by avoiding all the extra block-device
+    // operations to store the erase value.
+    int32_t erase_value;
+
+    // Number of erase cycles before a block becomes "bad". The exact behavior
+    // of bad blocks is controlled by the badblock_mode.
+    uint32_t erase_cycles;
+
+    // The mode determining how bad blocks fail
+    uint8_t badblock_behavior;
+
+    // Number of write operations (erase/prog) before forcefully killing
+    // the program with exit. Simulates power-loss. 0 disables.
+    uint32_t power_cycles;
+
+    // Optional buffer for RAM block device.
+    void *buffer;
+
+    // Optional buffer for wear
+    void *wear_buffer;
+};
+
+// testbd state
+typedef struct lfs_testbd {
+    union {
+        struct {
+            lfs_filebd_t bd;
+            struct lfs_filebd_config cfg;
+        } file;
+        struct {
+            lfs_rambd_t bd;
+            struct lfs_rambd_config cfg;
+        } ram;
+    } u;
+
+    bool persist;
+    uint32_t power_cycles;
+    lfs_testbd_wear_t *wear;
+
+    const struct lfs_testbd_config *cfg;
+} lfs_testbd_t;
+
+
+/// Block device API ///
+
+// Create a test block device using the geometry in lfs_config
+//
+// Note that filebd is used if a path is provided, if path is NULL
+// testbd will use rambd which can be much faster.
+int lfs_testbd_create(const struct lfs_config *cfg, const char *path);
+int lfs_testbd_createcfg(const struct lfs_config *cfg, const char *path,
+        const struct lfs_testbd_config *bdcfg);
+
+// Clean up memory associated with block device
+int lfs_testbd_destroy(const struct lfs_config *cfg);
+
+// Read a block
+int lfs_testbd_read(const struct lfs_config *cfg, lfs_block_t block,
+        lfs_off_t off, void *buffer, lfs_size_t size);
+
+// Program a block
+//
+// The block must have previously been erased.
+int lfs_testbd_prog(const struct lfs_config *cfg, lfs_block_t block,
+        lfs_off_t off, const void *buffer, lfs_size_t size);
+
+// Erase a block
+//
+// A block must be erased before being programmed. The
+// state of an erased block is undefined.
+int lfs_testbd_erase(const struct lfs_config *cfg, lfs_block_t block);
+
+// Sync the block device
+int lfs_testbd_sync(const struct lfs_config *cfg);
+
+
+/// Additional extended API for driving test features ///
+
+// Get simulated wear on a given block
+lfs_testbd_swear_t lfs_testbd_getwear(const struct lfs_config *cfg,
+        lfs_block_t block);
+
+// Manually set simulated wear on a given block
+int lfs_testbd_setwear(const struct lfs_config *cfg,
+        lfs_block_t block, lfs_testbd_wear_t wear);
+
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/lfs.h b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/lfs.h
new file mode 100644
index 00000000000..ad491627fe1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/lfs.h
@@ -0,0 +1,695 @@
+/*
+ * The little filesystem
+ *
+ * Copyright (c) 2017, Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef LFS_H
+#define LFS_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "lfs_util.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/// Version info ///
+
+// Software library version
+// Major (top-nibble), incremented on backwards incompatible changes
+// Minor (bottom-nibble), incremented on feature additions
+#define LFS_VERSION 0x00020004
+#define LFS_VERSION_MAJOR (0xffff & (LFS_VERSION >> 16))
+#define LFS_VERSION_MINOR (0xffff & (LFS_VERSION >>  0))
+
+// Version of On-disk data structures
+// Major (top-nibble), incremented on backwards incompatible changes
+// Minor (bottom-nibble), incremented on feature additions
+#define LFS_DISK_VERSION 0x00020000
+#define LFS_DISK_VERSION_MAJOR (0xffff & (LFS_DISK_VERSION >> 16))
+#define LFS_DISK_VERSION_MINOR (0xffff & (LFS_DISK_VERSION >>  0))
+
+
+/// Definitions ///
+
+// Type definitions
+typedef uint32_t lfs_size_t;
+typedef uint32_t lfs_off_t;
+
+typedef int32_t  lfs_ssize_t;
+typedef int32_t  lfs_soff_t;
+
+typedef uint32_t lfs_block_t;
+
+// Maximum name size in bytes, may be redefined to reduce the size of the
+// info struct. Limited to <= 1022. Stored in superblock and must be
+// respected by other littlefs drivers.
+#ifndef LFS_NAME_MAX
+#define LFS_NAME_MAX 255
+#endif
+
+// Maximum size of a file in bytes, may be redefined to limit to support other
+// drivers. Limited on disk to <= 4294967296. However, above 2147483647 the
+// functions lfs_file_seek, lfs_file_size, and lfs_file_tell will return
+// incorrect values due to using signed integers. Stored in superblock and
+// must be respected by other littlefs drivers.
+#ifndef LFS_FILE_MAX
+#define LFS_FILE_MAX 2147483647
+#endif
+
+// Maximum size of custom attributes in bytes, may be redefined, but there is
+// no real benefit to using a smaller LFS_ATTR_MAX. Limited to <= 1022.
+#ifndef LFS_ATTR_MAX
+#define LFS_ATTR_MAX 1022
+#endif
+
+// Possible error codes, these are negative to allow
+// valid positive return values
+enum lfs_error {
+    LFS_ERR_OK          = 0,    // No error
+    LFS_ERR_IO          = -5,   // Error during device operation
+    LFS_ERR_CORRUPT     = -84,  // Corrupted
+    LFS_ERR_NOENT       = -2,   // No directory entry
+    LFS_ERR_EXIST       = -17,  // Entry already exists
+    LFS_ERR_NOTDIR      = -20,  // Entry is not a dir
+    LFS_ERR_ISDIR       = -21,  // Entry is a dir
+    LFS_ERR_NOTEMPTY    = -39,  // Dir is not empty
+    LFS_ERR_BADF        = -9,   // Bad file number
+    LFS_ERR_FBIG        = -27,  // File too large
+    LFS_ERR_INVAL       = -22,  // Invalid parameter
+    LFS_ERR_NOSPC       = -28,  // No space left on device
+    LFS_ERR_NOMEM       = -12,  // No more memory available
+    LFS_ERR_NOATTR      = -61,  // No data/attr available
+    LFS_ERR_NAMETOOLONG = -36,  // File name too long
+};
+
+// File types
+enum lfs_type {
+    // file types
+    LFS_TYPE_REG            = 0x001,
+    LFS_TYPE_DIR            = 0x002,
+
+    // internally used types
+    LFS_TYPE_SPLICE         = 0x400,
+    LFS_TYPE_NAME           = 0x000,
+    LFS_TYPE_STRUCT         = 0x200,
+    LFS_TYPE_USERATTR       = 0x300,
+    LFS_TYPE_FROM           = 0x100,
+    LFS_TYPE_TAIL           = 0x600,
+    LFS_TYPE_GLOBALS        = 0x700,
+    LFS_TYPE_CRC            = 0x500,
+
+    // internally used type specializations
+    LFS_TYPE_CREATE         = 0x401,
+    LFS_TYPE_DELETE         = 0x4ff,
+    LFS_TYPE_SUPERBLOCK     = 0x0ff,
+    LFS_TYPE_DIRSTRUCT      = 0x200,
+    LFS_TYPE_CTZSTRUCT      = 0x202,
+    LFS_TYPE_INLINESTRUCT   = 0x201,
+    LFS_TYPE_SOFTTAIL       = 0x600,
+    LFS_TYPE_HARDTAIL       = 0x601,
+    LFS_TYPE_MOVESTATE      = 0x7ff,
+
+    // internal chip sources
+    LFS_FROM_NOOP           = 0x000,
+    LFS_FROM_MOVE           = 0x101,
+    LFS_FROM_USERATTRS      = 0x102,
+};
+
+// File open flags
+enum lfs_open_flags {
+    // open flags
+    LFS_O_RDONLY = 1,         // Open a file as read only
+#ifndef LFS_READONLY
+    LFS_O_WRONLY = 2,         // Open a file as write only
+    LFS_O_RDWR   = 3,         // Open a file as read and write
+    LFS_O_CREAT  = 0x0100,    // Create a file if it does not exist
+    LFS_O_EXCL   = 0x0200,    // Fail if a file already exists
+    LFS_O_TRUNC  = 0x0400,    // Truncate the existing file to zero size
+    LFS_O_APPEND = 0x0800,    // Move to end of file on every write
+#endif
+
+    // internally used flags
+#ifndef LFS_READONLY
+    LFS_F_DIRTY   = 0x010000, // File does not match storage
+    LFS_F_WRITING = 0x020000, // File has been written since last flush
+#endif
+    LFS_F_READING = 0x040000, // File has been read since last flush
+#ifndef LFS_READONLY
+    LFS_F_ERRED   = 0x080000, // An error occurred during write
+#endif
+    LFS_F_INLINE  = 0x100000, // Currently inlined in directory entry
+};
+
+// File seek flags
+enum lfs_whence_flags {
+    LFS_SEEK_SET = 0,   // Seek relative to an absolute position
+    LFS_SEEK_CUR = 1,   // Seek relative to the current file position
+    LFS_SEEK_END = 2,   // Seek relative to the end of the file
+};
+
+
+// Configuration provided during initialization of the littlefs
+struct lfs_config {
+    // Opaque user provided context that can be used to pass
+    // information to the block device operations
+    void *context;
+
+    // Read a region in a block. Negative error codes are propogated
+    // to the user.
+    int (*read)(const struct lfs_config *c, lfs_block_t block,
+            lfs_off_t off, void *buffer, lfs_size_t size);
+
+    // Program a region in a block. The block must have previously
+    // been erased. Negative error codes are propogated to the user.
+    // May return LFS_ERR_CORRUPT if the block should be considered bad.
+    int (*prog)(const struct lfs_config *c, lfs_block_t block,
+            lfs_off_t off, const void *buffer, lfs_size_t size);
+
+    // Erase a block. A block must be erased before being programmed.
+    // The state of an erased block is undefined. Negative error codes
+    // are propogated to the user.
+    // May return LFS_ERR_CORRUPT if the block should be considered bad.
+    int (*erase)(const struct lfs_config *c, lfs_block_t block);
+
+    // Sync the state of the underlying block device. Negative error codes
+    // are propogated to the user.
+    int (*sync)(const struct lfs_config *c);
+
+#ifdef LFS_THREADSAFE
+    // Lock the underlying block device. Negative error codes
+    // are propogated to the user.
+    int (*lock)(const struct lfs_config *c);
+
+    // Unlock the underlying block device. Negative error codes
+    // are propogated to the user.
+    int (*unlock)(const struct lfs_config *c);
+#endif
+
+    // Minimum size of a block read. All read operations will be a
+    // multiple of this value.
+    lfs_size_t read_size;
+
+    // Minimum size of a block program. All program operations will be a
+    // multiple of this value.
+    lfs_size_t prog_size;
+
+    // Size of an erasable block. This does not impact ram consumption and
+    // may be larger than the physical erase size. However, non-inlined files
+    // take up at minimum one block. Must be a multiple of the read
+    // and program sizes.
+    lfs_size_t block_size;
+
+    // Number of erasable blocks on the device.
+    lfs_size_t block_count;
+
+    // Number of erase cycles before littlefs evicts metadata logs and moves
+    // the metadata to another block. Suggested values are in the
+    // range 100-1000, with large values having better performance at the cost
+    // of less consistent wear distribution.
+    //
+    // Set to -1 to disable block-level wear-leveling.
+    int32_t block_cycles;
+
+    // Size of block caches. Each cache buffers a portion of a block in RAM.
+    // The littlefs needs a read cache, a program cache, and one additional
+    // cache per file. Larger caches can improve performance by storing more
+    // data and reducing the number of disk accesses. Must be a multiple of
+    // the read and program sizes, and a factor of the block size.
+    lfs_size_t cache_size;
+
+    // Size of the lookahead buffer in bytes. A larger lookahead buffer
+    // increases the number of blocks found during an allocation pass. The
+    // lookahead buffer is stored as a compact bitmap, so each byte of RAM
+    // can track 8 blocks. Must be a multiple of 8.
+    lfs_size_t lookahead_size;
+
+    // Optional statically allocated read buffer. Must be cache_size.
+    // By default lfs_malloc is used to allocate this buffer.
+    void *read_buffer;
+
+    // Optional statically allocated program buffer. Must be cache_size.
+    // By default lfs_malloc is used to allocate this buffer.
+    void *prog_buffer;
+
+    // Optional statically allocated lookahead buffer. Must be lookahead_size
+    // and aligned to a 32-bit boundary. By default lfs_malloc is used to
+    // allocate this buffer.
+    void *lookahead_buffer;
+
+    // Optional upper limit on length of file names in bytes. No downside for
+    // larger names except the size of the info struct which is controlled by
+    // the LFS_NAME_MAX define. Defaults to LFS_NAME_MAX when zero. Stored in
+    // superblock and must be respected by other littlefs drivers.
+    lfs_size_t name_max;
+
+    // Optional upper limit on files in bytes. No downside for larger files
+    // but must be <= LFS_FILE_MAX. Defaults to LFS_FILE_MAX when zero. Stored
+    // in superblock and must be respected by other littlefs drivers.
+    lfs_size_t file_max;
+
+    // Optional upper limit on custom attributes in bytes. No downside for
+    // larger attributes size but must be <= LFS_ATTR_MAX. Defaults to
+    // LFS_ATTR_MAX when zero.
+    lfs_size_t attr_max;
+
+    // Optional upper limit on total space given to metadata pairs in bytes. On
+    // devices with large blocks (e.g. 128kB) setting this to a low size (2-8kB)
+    // can help bound the metadata compaction time. Must be <= block_size.
+    // Defaults to block_size when zero.
+    lfs_size_t metadata_max;
+};
+
+// File info structure
+struct lfs_info {
+    // Type of the file, either LFS_TYPE_REG or LFS_TYPE_DIR
+    uint8_t type;
+
+    // Size of the file, only valid for REG files. Limited to 32-bits.
+    lfs_size_t size;
+
+    // Name of the file stored as a null-terminated string. Limited to
+    // LFS_NAME_MAX+1, which can be changed by redefining LFS_NAME_MAX to
+    // reduce RAM. LFS_NAME_MAX is stored in superblock and must be
+    // respected by other littlefs drivers.
+    char name[LFS_NAME_MAX+1];
+};
+
+// Custom attribute structure, used to describe custom attributes
+// committed atomically during file writes.
+struct lfs_attr {
+    // 8-bit type of attribute, provided by user and used to
+    // identify the attribute
+    uint8_t type;
+
+    // Pointer to buffer containing the attribute
+    void *buffer;
+
+    // Size of attribute in bytes, limited to LFS_ATTR_MAX
+    lfs_size_t size;
+};
+
+// Optional configuration provided during lfs_file_opencfg
+struct lfs_file_config {
+    // Optional statically allocated file buffer. Must be cache_size.
+    // By default lfs_malloc is used to allocate this buffer.
+    void *buffer;
+
+    // Optional list of custom attributes related to the file. If the file
+    // is opened with read access, these attributes will be read from disk
+    // during the open call. If the file is opened with write access, the
+    // attributes will be written to disk every file sync or close. This
+    // write occurs atomically with update to the file's contents.
+    //
+    // Custom attributes are uniquely identified by an 8-bit type and limited
+    // to LFS_ATTR_MAX bytes. When read, if the stored attribute is smaller
+    // than the buffer, it will be padded with zeros. If the stored attribute
+    // is larger, then it will be silently truncated. If the attribute is not
+    // found, it will be created implicitly.
+    struct lfs_attr *attrs;
+
+    // Number of custom attributes in the list
+    lfs_size_t attr_count;
+};
+
+
+/// internal littlefs data structures ///
+typedef struct lfs_cache {
+    lfs_block_t block;
+    lfs_off_t off;
+    lfs_size_t size;
+    uint8_t *buffer;
+} lfs_cache_t;
+
+typedef struct lfs_mdir {
+    lfs_block_t pair[2];
+    uint32_t rev;
+    lfs_off_t off;
+    uint32_t etag;
+    uint16_t count;
+    bool erased;
+    bool split;
+    lfs_block_t tail[2];
+} lfs_mdir_t;
+
+// littlefs directory type
+typedef struct lfs_dir {
+    struct lfs_dir *next;
+    uint16_t id;
+    uint8_t type;
+    lfs_mdir_t m;
+
+    lfs_off_t pos;
+    lfs_block_t head[2];
+} lfs_dir_t;
+
+// littlefs file type
+typedef struct lfs_file {
+    struct lfs_file *next;
+    uint16_t id;
+    uint8_t type;
+    lfs_mdir_t m;
+
+    struct lfs_ctz {
+        lfs_block_t head;
+        lfs_size_t size;
+    } ctz;
+
+    uint32_t flags;
+    lfs_off_t pos;
+    lfs_block_t block;
+    lfs_off_t off;
+    lfs_cache_t cache;
+
+    const struct lfs_file_config *cfg;
+} lfs_file_t;
+
+typedef struct lfs_superblock {
+    uint32_t version;
+    lfs_size_t block_size;
+    lfs_size_t block_count;
+    lfs_size_t name_max;
+    lfs_size_t file_max;
+    lfs_size_t attr_max;
+} lfs_superblock_t;
+
+typedef struct lfs_gstate {
+    uint32_t tag;
+    lfs_block_t pair[2];
+} lfs_gstate_t;
+
+// The littlefs filesystem type
+typedef struct lfs {
+    lfs_cache_t rcache;
+    lfs_cache_t pcache;
+
+    lfs_block_t root[2];
+    struct lfs_mlist {
+        struct lfs_mlist *next;
+        uint16_t id;
+        uint8_t type;
+        lfs_mdir_t m;
+    } *mlist;
+    uint32_t seed;
+
+    lfs_gstate_t gstate;
+    lfs_gstate_t gdisk;
+    lfs_gstate_t gdelta;
+
+    struct lfs_free {
+        lfs_block_t off;
+        lfs_block_t size;
+        lfs_block_t i;
+        lfs_block_t ack;
+        uint32_t *buffer;
+    } free;
+
+    const struct lfs_config *cfg;
+    lfs_size_t name_max;
+    lfs_size_t file_max;
+    lfs_size_t attr_max;
+
+#ifdef LFS_MIGRATE
+    struct lfs1 *lfs1;
+#endif
+} lfs_t;
+
+
+/// Filesystem functions ///
+
+#ifndef LFS_READONLY
+// Format a block device with the littlefs
+//
+// Requires a littlefs object and config struct. This clobbers the littlefs
+// object, and does not leave the filesystem mounted. The config struct must
+// be zeroed for defaults and backwards compatibility.
+//
+// Returns a negative error code on failure.
+int lfs_format(lfs_t *lfs, const struct lfs_config *config);
+#endif
+
+// Mounts a littlefs
+//
+// Requires a littlefs object and config struct. Multiple filesystems
+// may be mounted simultaneously with multiple littlefs objects. Both
+// lfs and config must be allocated while mounted. The config struct must
+// be zeroed for defaults and backwards compatibility.
+//
+// Returns a negative error code on failure.
+int lfs_mount(lfs_t *lfs, const struct lfs_config *config);
+
+// Unmounts a littlefs
+//
+// Does nothing besides releasing any allocated resources.
+// Returns a negative error code on failure.
+int lfs_unmount(lfs_t *lfs);
+
+/// General operations ///
+
+#ifndef LFS_READONLY
+// Removes a file or directory
+//
+// If removing a directory, the directory must be empty.
+// Returns a negative error code on failure.
+int lfs_remove(lfs_t *lfs, const char *path);
+#endif
+
+#ifndef LFS_READONLY
+// Rename or move a file or directory
+//
+// If the destination exists, it must match the source in type.
+// If the destination is a directory, the directory must be empty.
+//
+// Returns a negative error code on failure.
+int lfs_rename(lfs_t *lfs, const char *oldpath, const char *newpath);
+#endif
+
+// Find info about a file or directory
+//
+// Fills out the info structure, based on the specified file or directory.
+// Returns a negative error code on failure.
+int lfs_stat(lfs_t *lfs, const char *path, struct lfs_info *info);
+
+// Get a custom attribute
+//
+// Custom attributes are uniquely identified by an 8-bit type and limited
+// to LFS_ATTR_MAX bytes. When read, if the stored attribute is smaller than
+// the buffer, it will be padded with zeros. If the stored attribute is larger,
+// then it will be silently truncated. If no attribute is found, the error
+// LFS_ERR_NOATTR is returned and the buffer is filled with zeros.
+//
+// Returns the size of the attribute, or a negative error code on failure.
+// Note, the returned size is the size of the attribute on disk, irrespective
+// of the size of the buffer. This can be used to dynamically allocate a buffer
+// or check for existance.
+lfs_ssize_t lfs_getattr(lfs_t *lfs, const char *path,
+        uint8_t type, void *buffer, lfs_size_t size);
+
+#ifndef LFS_READONLY
+// Set custom attributes
+//
+// Custom attributes are uniquely identified by an 8-bit type and limited
+// to LFS_ATTR_MAX bytes. If an attribute is not found, it will be
+// implicitly created.
+//
+// Returns a negative error code on failure.
+int lfs_setattr(lfs_t *lfs, const char *path,
+        uint8_t type, const void *buffer, lfs_size_t size);
+#endif
+
+#ifndef LFS_READONLY
+// Removes a custom attribute
+//
+// If an attribute is not found, nothing happens.
+//
+// Returns a negative error code on failure.
+int lfs_removeattr(lfs_t *lfs, const char *path, uint8_t type);
+#endif
+
+
+/// File operations ///
+
+// Open a file
+//
+// The mode that the file is opened in is determined by the flags, which
+// are values from the enum lfs_open_flags that are bitwise-ored together.
+//
+// Returns a negative error code on failure.
+int lfs_file_open(lfs_t *lfs, lfs_file_t *file,
+        const char *path, int flags);
+
+// Open a file with extra configuration
+//
+// The mode that the file is opened in is determined by the flags, which
+// are values from the enum lfs_open_flags that are bitwise-ored together.
+//
+// The config struct provides additional config options per file as described
+// above. The config struct must be allocated while the file is open, and the
+// config struct must be zeroed for defaults and backwards compatibility.
+//
+// Returns a negative error code on failure.
+int lfs_file_opencfg(lfs_t *lfs, lfs_file_t *file,
+        const char *path, int flags,
+        const struct lfs_file_config *config);
+
+// Close a file
+//
+// Any pending writes are written out to storage as though
+// sync had been called and releases any allocated resources.
+//
+// Returns a negative error code on failure.
+int lfs_file_close(lfs_t *lfs, lfs_file_t *file);
+
+// Synchronize a file on storage
+//
+// Any pending writes are written out to storage.
+// Returns a negative error code on failure.
+int lfs_file_sync(lfs_t *lfs, lfs_file_t *file);
+
+// Read data from file
+//
+// Takes a buffer and size indicating where to store the read data.
+// Returns the number of bytes read, or a negative error code on failure.
+lfs_ssize_t lfs_file_read(lfs_t *lfs, lfs_file_t *file,
+        void *buffer, lfs_size_t size);
+
+#ifndef LFS_READONLY
+// Write data to file
+//
+// Takes a buffer and size indicating the data to write. The file will not
+// actually be updated on the storage until either sync or close is called.
+//
+// Returns the number of bytes written, or a negative error code on failure.
+lfs_ssize_t lfs_file_write(lfs_t *lfs, lfs_file_t *file,
+        const void *buffer, lfs_size_t size);
+#endif
+
+// Change the position of the file
+//
+// The change in position is determined by the offset and whence flag.
+// Returns the new position of the file, or a negative error code on failure.
+lfs_soff_t lfs_file_seek(lfs_t *lfs, lfs_file_t *file,
+        lfs_soff_t off, int whence);
+
+#ifndef LFS_READONLY
+// Truncates the size of the file to the specified size
+//
+// Returns a negative error code on failure.
+int lfs_file_truncate(lfs_t *lfs, lfs_file_t *file, lfs_off_t size);
+#endif
+
+// Return the position of the file
+//
+// Equivalent to lfs_file_seek(lfs, file, 0, LFS_SEEK_CUR)
+// Returns the position of the file, or a negative error code on failure.
+lfs_soff_t lfs_file_tell(lfs_t *lfs, lfs_file_t *file);
+
+// Change the position of the file to the beginning of the file
+//
+// Equivalent to lfs_file_seek(lfs, file, 0, LFS_SEEK_SET)
+// Returns a negative error code on failure.
+int lfs_file_rewind(lfs_t *lfs, lfs_file_t *file);
+
+// Return the size of the file
+//
+// Similar to lfs_file_seek(lfs, file, 0, LFS_SEEK_END)
+// Returns the size of the file, or a negative error code on failure.
+lfs_soff_t lfs_file_size(lfs_t *lfs, lfs_file_t *file);
+
+
+/// Directory operations ///
+
+#ifndef LFS_READONLY
+// Create a directory
+//
+// Returns a negative error code on failure.
+int lfs_mkdir(lfs_t *lfs, const char *path);
+#endif
+
+// Open a directory
+//
+// Once open a directory can be used with read to iterate over files.
+// Returns a negative error code on failure.
+int lfs_dir_open(lfs_t *lfs, lfs_dir_t *dir, const char *path);
+
+// Close a directory
+//
+// Releases any allocated resources.
+// Returns a negative error code on failure.
+int lfs_dir_close(lfs_t *lfs, lfs_dir_t *dir);
+
+// Read an entry in the directory
+//
+// Fills out the info structure, based on the specified file or directory.
+// Returns a positive value on success, 0 at the end of directory,
+// or a negative error code on failure.
+int lfs_dir_read(lfs_t *lfs, lfs_dir_t *dir, struct lfs_info *info);
+
+// Change the position of the directory
+//
+// The new off must be a value previous returned from tell and specifies
+// an absolute offset in the directory seek.
+//
+// Returns a negative error code on failure.
+int lfs_dir_seek(lfs_t *lfs, lfs_dir_t *dir, lfs_off_t off);
+
+// Return the position of the directory
+//
+// The returned offset is only meant to be consumed by seek and may not make
+// sense, but does indicate the current position in the directory iteration.
+//
+// Returns the position of the directory, or a negative error code on failure.
+lfs_soff_t lfs_dir_tell(lfs_t *lfs, lfs_dir_t *dir);
+
+// Change the position of the directory to the beginning of the directory
+//
+// Returns a negative error code on failure.
+int lfs_dir_rewind(lfs_t *lfs, lfs_dir_t *dir);
+
+
+/// Filesystem-level filesystem operations
+
+// Finds the current size of the filesystem
+//
+// Note: Result is best effort. If files share COW structures, the returned
+// size may be larger than the filesystem actually is.
+//
+// Returns the number of allocated blocks, or a negative error code on failure.
+lfs_ssize_t lfs_fs_size(lfs_t *lfs);
+
+// Traverse through all blocks in use by the filesystem
+//
+// The provided callback will be called with each block address that is
+// currently in use by the filesystem. This can be used to determine which
+// blocks are in use or how much of the storage is available.
+//
+// Returns a negative error code on failure.
+int lfs_fs_traverse(lfs_t *lfs, int (*cb)(void*, lfs_block_t), void *data);
+
+#ifndef LFS_READONLY
+#ifdef LFS_MIGRATE
+// Attempts to migrate a previous version of littlefs
+//
+// Behaves similarly to the lfs_format function. Attempts to mount
+// the previous version of littlefs and update the filesystem so it can be
+// mounted with the current version of littlefs.
+//
+// Requires a littlefs object and config struct. This clobbers the littlefs
+// object, and does not leave the filesystem mounted. The config struct must
+// be zeroed for defaults and backwards compatibility.
+//
+// Returns a negative error code on failure.
+int lfs_migrate(lfs_t *lfs, const struct lfs_config *cfg);
+#endif
+#endif
+
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/lfs_util.h b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/lfs_util.h
new file mode 100644
index 00000000000..fc1b0c2ae86
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs/lfs_util.h
@@ -0,0 +1,244 @@
+/*
+ * lfs utility functions
+ *
+ * Copyright (c) 2017, Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef LFS_UTIL_H
+#define LFS_UTIL_H
+
+// Users can override lfs_util.h with their own configuration by defining
+// LFS_CONFIG as a header file to include (-DLFS_CONFIG=lfs_config.h).
+//
+// If LFS_CONFIG is used, none of the default utils will be emitted and must be
+// provided by the config file. To start, I would suggest copying lfs_util.h
+// and modifying as needed.
+#ifdef LFS_CONFIG
+#define LFS_STRINGIZE(x) LFS_STRINGIZE2(x)
+#define LFS_STRINGIZE2(x) #x
+#include LFS_STRINGIZE(LFS_CONFIG)
+#else
+
+// System includes
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+#include <inttypes.h>
+
+#ifndef LFS_NO_MALLOC
+#include <stdlib.h>
+#endif
+#ifndef LFS_NO_ASSERT
+#include <assert.h>
+#endif
+#if !defined(LFS_NO_DEBUG) || \
+        !defined(LFS_NO_WARN) || \
+        !defined(LFS_NO_ERROR) || \
+        defined(LFS_YES_TRACE)
+#include <stdio.h>
+#endif
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+// Macros, may be replaced by system specific wrappers. Arguments to these
+// macros must not have side-effects as the macros can be removed for a smaller
+// code footprint
+
+// Logging functions
+#ifndef LFS_TRACE
+#ifdef LFS_YES_TRACE
+#define LFS_TRACE_(fmt, ...) \
+    printf("%s:%d:trace: " fmt "%s\n", __FILE__, __LINE__, __VA_ARGS__)
+#define LFS_TRACE(...) LFS_TRACE_(__VA_ARGS__, "")
+#else
+#define LFS_TRACE(...)
+#endif
+#endif
+
+#ifndef LFS_DEBUG
+#ifndef LFS_NO_DEBUG
+#define LFS_DEBUG_(fmt, ...) \
+    printf("%s:%d:debug: " fmt "%s\n", __FILE__, __LINE__, __VA_ARGS__)
+#define LFS_DEBUG(...) LFS_DEBUG_(__VA_ARGS__, "")
+#else
+#define LFS_DEBUG(...)
+#endif
+#endif
+
+#ifndef LFS_WARN
+#ifndef LFS_NO_WARN
+#define LFS_WARN_(fmt, ...) \
+    printf("%s:%d:warn: " fmt "%s\n", __FILE__, __LINE__, __VA_ARGS__)
+#define LFS_WARN(...) LFS_WARN_(__VA_ARGS__, "")
+#else
+#define LFS_WARN(...)
+#endif
+#endif
+
+#ifndef LFS_ERROR
+#ifndef LFS_NO_ERROR
+#define LFS_ERROR_(fmt, ...) \
+    printf("%s:%d:error: " fmt "%s\n", __FILE__, __LINE__, __VA_ARGS__)
+#define LFS_ERROR(...) LFS_ERROR_(__VA_ARGS__, "")
+#else
+#define LFS_ERROR(...)
+#endif
+#endif
+
+// Runtime assertions
+#ifndef LFS_ASSERT
+#ifndef LFS_NO_ASSERT
+#define LFS_ASSERT(test) assert(test)
+#else
+#define LFS_ASSERT(test)
+#endif
+#endif
+
+
+// Builtin functions, these may be replaced by more efficient
+// toolchain-specific implementations. LFS_NO_INTRINSICS falls back to a more
+// expensive basic C implementation for debugging purposes
+
+// Min/max functions for unsigned 32-bit numbers
+static inline uint32_t lfs_max(uint32_t a, uint32_t b) {
+    return (a > b) ? a : b;
+}
+
+static inline uint32_t lfs_min(uint32_t a, uint32_t b) {
+    return (a < b) ? a : b;
+}
+
+// Align to nearest multiple of a size
+static inline uint32_t lfs_aligndown(uint32_t a, uint32_t alignment) {
+    return a - (a % alignment);
+}
+
+static inline uint32_t lfs_alignup(uint32_t a, uint32_t alignment) {
+    return lfs_aligndown(a + alignment-1, alignment);
+}
+
+// Find the smallest power of 2 greater than or equal to a
+static inline uint32_t lfs_npw2(uint32_t a) {
+#if !defined(LFS_NO_INTRINSICS) && (defined(__GNUC__) || defined(__CC_ARM))
+    return 32 - __builtin_clz(a-1);
+#else
+    uint32_t r = 0;
+    uint32_t s;
+    a -= 1;
+    s = (a > 0xffff) << 4; a >>= s; r |= s;
+    s = (a > 0xff  ) << 3; a >>= s; r |= s;
+    s = (a > 0xf   ) << 2; a >>= s; r |= s;
+    s = (a > 0x3   ) << 1; a >>= s; r |= s;
+    return (r | (a >> 1)) + 1;
+#endif
+}
+
+// Count the number of trailing binary zeros in a
+// lfs_ctz(0) may be undefined
+static inline uint32_t lfs_ctz(uint32_t a) {
+#if !defined(LFS_NO_INTRINSICS) && defined(__GNUC__)
+    return __builtin_ctz(a);
+#else
+    return lfs_npw2((a & -a) + 1) - 1;
+#endif
+}
+
+// Count the number of binary ones in a
+static inline uint32_t lfs_popc(uint32_t a) {
+#if !defined(LFS_NO_INTRINSICS) && (defined(__GNUC__) || defined(__CC_ARM))
+    return __builtin_popcount(a);
+#else
+    a = a - ((a >> 1) & 0x55555555);
+    a = (a & 0x33333333) + ((a >> 2) & 0x33333333);
+    return (((a + (a >> 4)) & 0xf0f0f0f) * 0x1010101) >> 24;
+#endif
+}
+
+// Find the sequence comparison of a and b, this is the distance
+// between a and b ignoring overflow
+static inline int lfs_scmp(uint32_t a, uint32_t b) {
+    return (int)(unsigned)(a - b);
+}
+
+// Convert between 32-bit little-endian and native order
+static inline uint32_t lfs_fromle32(uint32_t a) {
+#if !defined(LFS_NO_INTRINSICS) && ( \
+    (defined(  BYTE_ORDER  ) && defined(  ORDER_LITTLE_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_LITTLE_ENDIAN  ) || \
+    (defined(__BYTE_ORDER  ) && defined(__ORDER_LITTLE_ENDIAN  ) && __BYTE_ORDER   == __ORDER_LITTLE_ENDIAN  ) || \
+    (defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__))
+    return a;
+#elif !defined(LFS_NO_INTRINSICS) && ( \
+    (defined(  BYTE_ORDER  ) && defined(  ORDER_BIG_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_BIG_ENDIAN  ) || \
+    (defined(__BYTE_ORDER  ) && defined(__ORDER_BIG_ENDIAN  ) && __BYTE_ORDER   == __ORDER_BIG_ENDIAN  ) || \
+    (defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
+    return __builtin_bswap32(a);
+#else
+    return (((uint8_t*)&a)[0] <<  0) |
+           (((uint8_t*)&a)[1] <<  8) |
+           (((uint8_t*)&a)[2] << 16) |
+           (((uint8_t*)&a)[3] << 24);
+#endif
+}
+
+static inline uint32_t lfs_tole32(uint32_t a) {
+    return lfs_fromle32(a);
+}
+
+// Convert between 32-bit big-endian and native order
+static inline uint32_t lfs_frombe32(uint32_t a) {
+#if !defined(LFS_NO_INTRINSICS) && ( \
+    (defined(  BYTE_ORDER  ) && defined(  ORDER_LITTLE_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_LITTLE_ENDIAN  ) || \
+    (defined(__BYTE_ORDER  ) && defined(__ORDER_LITTLE_ENDIAN  ) && __BYTE_ORDER   == __ORDER_LITTLE_ENDIAN  ) || \
+    (defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__))
+    return __builtin_bswap32(a);
+#elif !defined(LFS_NO_INTRINSICS) && ( \
+    (defined(  BYTE_ORDER  ) && defined(  ORDER_BIG_ENDIAN  ) &&   BYTE_ORDER   ==   ORDER_BIG_ENDIAN  ) || \
+    (defined(__BYTE_ORDER  ) && defined(__ORDER_BIG_ENDIAN  ) && __BYTE_ORDER   == __ORDER_BIG_ENDIAN  ) || \
+    (defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
+    return a;
+#else
+    return (((uint8_t*)&a)[0] << 24) |
+           (((uint8_t*)&a)[1] << 16) |
+           (((uint8_t*)&a)[2] <<  8) |
+           (((uint8_t*)&a)[3] <<  0);
+#endif
+}
+
+static inline uint32_t lfs_tobe32(uint32_t a) {
+    return lfs_frombe32(a);
+}
+
+// Calculate CRC-32 with polynomial = 0x04c11db7
+uint32_t lfs_crc(uint32_t crc, const void *buffer, size_t size);
+
+// Allocate memory, only used if buffers are not provided to littlefs
+// Note, memory must be 64-bit aligned
+static inline void *lfs_malloc(size_t size) {
+#ifndef LFS_NO_MALLOC
+    return malloc(size);
+#else
+    (void)size;
+    return NULL;
+#endif
+}
+
+// Deallocate memory, only used if buffers are not provided to littlefs
+static inline void lfs_free(void *p) {
+#ifndef LFS_NO_MALLOC
+    free(p);
+#else
+    (void)p;
+#endif
+}
+
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs_api.h b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs_api.h
new file mode 100644
index 00000000000..135b05972d0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_littlefs/src/littlefs_api.h
@@ -0,0 +1,106 @@
+#ifndef ESP_LITTLEFS_API_H__
+#define ESP_LITTLEFS_API_H__
+
+#include <stdint.h>
+#include <stddef.h>
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/semphr.h"
+#include "esp_vfs.h"
+#include "esp_partition.h"
+#include "littlefs/lfs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief a file descriptor
+ * That's also a singly linked list used for keeping tracks of all opened file descriptor 
+ *
+ * Shortcomings/potential issues of 32-bit hash (when CONFIG_LITTLEFS_USE_ONLY_HASH) listed here:
+ *     * unlink - If a different file is open that generates a hash collision, it will report an
+ *                error that it cannot unlink an open file.
+ *     * rename - If a different file is open that generates a hash collision with
+ *                src or dst, it will report an error that it cannot rename an open file.
+ * Potential consequences:
+ *    1. A file cannot be deleted while a collision-geneating file is open.
+ *       Worst-case, if the other file is always open during the lifecycle
+ *       of your app, it's collision file cannot be deleted, which in the 
+ *       worst-case could cause storage-capacity issues.
+ *    2. Same as (1), but for renames
+ */
+typedef struct _vfs_littlefs_file_t {
+    lfs_file_t file;
+    uint32_t   hash;
+    struct _vfs_littlefs_file_t * next;       /*!< Pointer to next file in Singly Linked List */
+#ifndef CONFIG_LITTLEFS_USE_ONLY_HASH
+    char     * path;
+#endif
+} vfs_littlefs_file_t;
+
+/**
+ * @brief littlefs definition structure
+ */
+typedef struct {
+    lfs_t *fs;                                /*!< Handle to the underlying littlefs */
+    SemaphoreHandle_t lock;                   /*!< FS lock */
+    const esp_partition_t* partition;         /*!< The partition on which littlefs is located */
+    char base_path[ESP_VFS_PATH_MAX+1];       /*!< Mount point */
+
+    struct lfs_config cfg;                    /*!< littlefs Mount configuration */
+
+    vfs_littlefs_file_t *file;                /*!< Singly Linked List of files */
+
+    vfs_littlefs_file_t **cache;              /*!< A cache of pointers to the opened files */
+    uint16_t             cache_size;          /*!< The cache allocated size (in pointers) */
+    uint16_t             fd_count;            /*!< The count of opened file descriptor used to speed up computation */
+} esp_littlefs_t;
+
+/**
+ * @brief Read a region in a block.
+ *
+ * Negative error codes are propogated to the user.
+ *
+ * @return errorcode. 0 on success.
+ */
+int littlefs_api_read(const struct lfs_config *c, lfs_block_t block,
+        lfs_off_t off, void *buffer, lfs_size_t size);
+
+/**
+ * @brief Program a region in a block.
+ *
+ * The block must have previously been erased. 
+ * Negative error codes are propogated to the user.
+ * May return LFS_ERR_CORRUPT if the block should be considered bad.
+ *
+ * @return errorcode. 0 on success.
+ */
+int littlefs_api_prog(const struct lfs_config *c, lfs_block_t block,
+        lfs_off_t off, const void *buffer, lfs_size_t size);
+
+/**
+ * @brief Erase a block.
+ *
+ * A block must be erased before being programmed.
+ * The state of an erased block is undefined.
+ * Negative error codes are propogated to the user.
+ * May return LFS_ERR_CORRUPT if the block should be considered bad.
+ * @return errorcode. 0 on success.
+ */
+int littlefs_api_erase(const struct lfs_config *c, lfs_block_t block);
+
+/**
+ * @brief Sync the state of the underlying block device.
+ *
+ * Negative error codes are propogated to the user.
+ *
+ * @return errorcode. 0 on success.
+ */
+int littlefs_api_sync(const struct lfs_config *c);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_local_ctrl/include/esp_local_ctrl.h b/tools/sdk/esp32s3/include/esp_local_ctrl/include/esp_local_ctrl.h
new file mode 100644
index 00000000000..8322412eb3a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_local_ctrl/include/esp_local_ctrl.h
@@ -0,0 +1,375 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <protocomm.h>
+
+/**
+ * @brief   Property description data structure, which is to be populated
+ *          and passed to the `esp_local_ctrl_add_property()` function
+ *
+ * Once a property is added, its structure is available for read-only access
+ * inside `get_prop_values()` and `set_prop_values()` handlers.
+ */
+typedef struct esp_local_ctrl_prop {
+    /**
+     * Unique name of property
+     */
+    char *name;
+
+    /**
+     * Type of property. This may be set to application defined enums
+     */
+    uint32_t type;
+
+    /**
+     * Size of the property value, which:
+     * - if zero, the property can have values of variable size
+     * - if non-zero, the property can have values of fixed size only,
+     *   therefore, checks are performed internally by esp_local_ctrl
+     *   when setting the value of such a property
+     */
+    size_t size;
+
+    /**
+     * Flags set for this property. This could be a bit field.
+     * A flag may indicate property behavior, e.g. read-only / constant
+     */
+    uint32_t flags;
+
+    /**
+     * Pointer to some context data relevant for this property. This will
+     * be available for use inside the `get_prop_values` and `set_prop_values`
+     * handlers as a part of this property structure. When set, this is valid
+     * throughout the lifetime of a property, till either the property is
+     * removed or the esp_local_ctrl service is stopped.
+     */
+    void *ctx;
+
+    /**
+     * Function used by esp_local_ctrl to internally free the property
+     * context when `esp_local_ctrl_remove_property()` or
+     * `esp_local_ctrl_stop()` is called.
+     */
+    void (*ctx_free_fn)(void *ctx);
+} esp_local_ctrl_prop_t;
+
+/**
+ * @brief   Property value data structure. This gets passed to the
+ *          `get_prop_values()` and `set_prop_values()` handlers for
+ *          the purpose of retrieving or setting the present value
+ *          of a property.
+ */
+typedef struct esp_local_ctrl_prop_val {
+    /**
+     * Pointer to memory holding property value
+     */
+    void *data;
+
+    /**
+     * Size of property value
+     */
+    size_t size;
+
+    /**
+     * This may be set by the application in `get_prop_values()` handler
+     * to tell `esp_local_ctrl` to call this function on the data pointer
+     * above, for freeing its resources after sending the `get_prop_values`
+     * response.
+     */
+    void (*free_fn)(void *data);
+} esp_local_ctrl_prop_val_t;
+
+/**
+ * @brief   Handlers for receiving and responding to local
+ *          control commands for getting and setting properties.
+ */
+typedef struct esp_local_ctrl_handlers {
+    /**
+     * @brief Handler function to be implemented for retrieving current
+     *        values of properties
+     *
+     * @note  If any of the properties have fixed sizes, the size field of
+     * corresponding element in `prop_values` need to be set
+     *
+     * @param[in]  props_count  Total elements in the props array
+     * @param[in]  props        Array of properties, the current values for which
+     *                          have been requested by the client
+     * @param[out] prop_values  Array of empty property values, the elements of
+     *                          which need to be populated with the current values
+     *                          of those properties specified by props argument
+     * @param[in]  usr_ctx      This provides value of the `usr_ctx` field of
+     *                          `esp_local_ctrl_handlers_t` structure
+     *
+     * @return Returning different error codes will convey the corresponding
+     *         protocol level errors to the client :
+     *         - ESP_OK : Success
+     *         - ESP_ERR_INVALID_ARG   : InvalidArgument
+     *         - ESP_ERR_INVALID_STATE : InvalidProto
+     *         - All other error codes : InternalError
+     */
+    esp_err_t (*get_prop_values)(size_t props_count,
+                                 const esp_local_ctrl_prop_t props[],
+                                 esp_local_ctrl_prop_val_t prop_values[],
+                                 void *usr_ctx);
+
+    /**
+     * @brief Handler function to be implemented for changing values of properties
+     *
+     * @note  If any of the properties have variable sizes, the size field
+     * of the corresponding element in `prop_values` must be checked
+     * explicitly before making any assumptions on the size.
+     *
+     * @param[in]  props_count  Total elements in the props array
+     * @param[in]  props        Array of properties, the values for which the
+     *                          client requests to change
+     * @param[in]  prop_values  Array of property values, the elements of which
+     *                          need to be used for updating those properties
+     *                          specified by props argument
+     * @param[in]  usr_ctx      This provides value of the `usr_ctx` field of
+     *                          `esp_local_ctrl_handlers_t` structure
+     *
+     * @return Returning different error codes will convey the corresponding
+     *         protocol level errors to the client :
+     *         - ESP_OK : Success
+     *         - ESP_ERR_INVALID_ARG   : InvalidArgument
+     *         - ESP_ERR_INVALID_STATE : InvalidProto
+     *         - All other error codes : InternalError
+     */
+    esp_err_t (*set_prop_values)(size_t props_count,
+                                 const esp_local_ctrl_prop_t props[],
+                                 const esp_local_ctrl_prop_val_t prop_values[],
+                                 void *usr_ctx);
+
+    /**
+     * Context pointer to be passed to above handler functions upon invocation.
+     * This is different from the property level context, as this is valid
+     * throughout the lifetime of the `esp_local_ctrl` service, and freed only
+     * when the service is stopped.
+     */
+    void *usr_ctx;
+
+    /**
+     * Pointer to function which will be internally invoked on `usr_ctx` for
+     * freeing the context resources when `esp_local_ctrl_stop()` is called.
+     */
+    void (*usr_ctx_free_fn)(void *usr_ctx);
+} esp_local_ctrl_handlers_t;
+
+/**
+ * @brief   Transport mode (BLE / HTTPD) over which the service will be provided
+ *
+ * This is forward declaration of a private structure, implemented internally
+ * by `esp_local_ctrl`.
+ */
+typedef struct esp_local_ctrl_transport esp_local_ctrl_transport_t;
+
+/**
+ * @brief   Function for obtaining BLE transport mode
+ */
+const esp_local_ctrl_transport_t *esp_local_ctrl_get_transport_ble(void);
+
+/**
+ * @brief   Function for obtaining HTTPD transport mode
+ */
+const esp_local_ctrl_transport_t *esp_local_ctrl_get_transport_httpd(void);
+
+#define ESP_LOCAL_CTRL_TRANSPORT_BLE   esp_local_ctrl_get_transport_ble()
+#define ESP_LOCAL_CTRL_TRANSPORT_HTTPD esp_local_ctrl_get_transport_httpd()
+
+/**
+ * @brief   Configuration for transport mode BLE
+ *
+ * This is a forward declaration for `protocomm_ble_config_t`.
+ * To use this, application must set CONFIG_BT_BLUEDROID_ENABLED
+ * and include `protocomm_ble.h`.
+ */
+typedef struct protocomm_ble_config esp_local_ctrl_transport_config_ble_t;
+
+/**
+ * @brief   Configuration for transport mode HTTPD
+ *
+ * This is a forward declaration for `httpd_ssl_config_t`.
+ * To use this, application must set CONFIG_ESP_HTTPS_SERVER_ENABLE
+ * and include `esp_https_server.h`
+ */
+typedef struct httpd_ssl_config esp_local_ctrl_transport_config_httpd_t;
+
+/**
+ * @brief   Transport mode (BLE / HTTPD) configuration
+ */
+typedef union {
+    /**
+     * This is same as `protocomm_ble_config_t`. See `protocomm_ble.h` for
+     * available configuration parameters.
+     */
+    esp_local_ctrl_transport_config_ble_t *ble;
+
+    /**
+     * This is same as `httpd_ssl_config_t`. See `esp_https_server.h` for
+     * available configuration parameters.
+     */
+    esp_local_ctrl_transport_config_httpd_t *httpd;
+} esp_local_ctrl_transport_config_t;
+
+/**
+ * @brief   Security types for esp_local_control
+ */
+typedef enum esp_local_ctrl_proto_sec {
+    PROTOCOM_SEC0 = 0,
+    PROTOCOM_SEC1,
+    PROTOCOM_SEC_CUSTOM,
+} esp_local_ctrl_proto_sec_t;
+
+/**
+ * Protocom security configs
+ */
+typedef struct esp_local_ctrl_proto_sec_cfg {
+     /**
+     * This sets protocom security version, sec0/sec1 or custom
+     * If custom, user must provide handle via `proto_sec_custom_handle` below
+     */
+    esp_local_ctrl_proto_sec_t version;
+
+    /**
+     * Custom security handle if security is set custom via `proto_sec` above
+     * This handle must follow `protocomm_security_t` signature
+     */
+    void *custom_handle;
+
+    /**
+     * Proof of possession to be used for local control. Could be NULL.
+     */
+    void *pop;
+} esp_local_ctrl_proto_sec_cfg_t;
+
+/**
+ * @brief   Configuration structure to pass to `esp_local_ctrl_start()`
+ */
+typedef struct esp_local_ctrl_config {
+    /**
+     * Transport layer over which service will be provided
+     */
+    const esp_local_ctrl_transport_t *transport;
+
+    /**
+     * Transport layer over which service will be provided
+     */
+    esp_local_ctrl_transport_config_t transport_config;
+
+    /**
+     * Security version and POP
+     */
+    esp_local_ctrl_proto_sec_cfg_t proto_sec;
+
+    /**
+     * Register handlers for responding to get/set requests on properties
+     */
+    esp_local_ctrl_handlers_t handlers;
+
+    /**
+     * This limits the number of properties that are available at a time
+     */
+    size_t max_properties;
+} esp_local_ctrl_config_t;
+
+/**
+ * @brief   Start local control service
+ *
+ * @param[in] config    Pointer to configuration structure
+ *
+ * @return
+ *  - ESP_OK      : Success
+ *  - ESP_FAIL    : Failure
+ */
+esp_err_t esp_local_ctrl_start(const esp_local_ctrl_config_t *config);
+
+/**
+ * @brief   Stop local control service
+ */
+esp_err_t esp_local_ctrl_stop(void);
+
+/**
+ * @brief   Add a new property
+ *
+ * This adds a new property and allocates internal resources for it.
+ * The total number of properties that could be added is limited by
+ * configuration option `max_properties`
+ *
+ * @param[in] prop    Property description structure
+ *
+ * @return
+ *  - ESP_OK      : Success
+ *  - ESP_FAIL    : Failure
+ */
+esp_err_t esp_local_ctrl_add_property(const esp_local_ctrl_prop_t *prop);
+
+/**
+ * @brief   Remove a property
+ *
+ * This finds a property by name, and releases the internal resources
+ * which are associated with it.
+ *
+ * @param[in] name    Name of the property to remove
+ *
+ * @return
+ *  - ESP_OK      : Success
+ *  - ESP_ERR_NOT_FOUND : Failure
+ */
+esp_err_t esp_local_ctrl_remove_property(const char *name);
+
+/**
+ * @brief   Get property description structure by name
+ *
+ * This API may be used to get a property's context structure
+ * `esp_local_ctrl_prop_t` when its name is known
+ *
+ * @param[in] name    Name of the property to find
+ *
+ * @return
+ *  - Pointer to property
+ *  - NULL if not found
+ */
+const esp_local_ctrl_prop_t *esp_local_ctrl_get_property(const char *name);
+
+/**
+ * @brief   Register protocomm handler for a custom endpoint
+ *
+ * This API can be called by the application to register a protocomm handler
+ * for an endpoint after the local control service has started.
+ *
+ * @note In case of BLE transport the names and uuids of all custom
+ * endpoints must be provided beforehand as a part of the `protocomm_ble_config_t`
+ * structure set in `esp_local_ctrl_config_t`, and passed to `esp_local_ctrl_start()`.
+ *
+ * @param[in] ep_name   Name of the endpoint
+ * @param[in] handler   Endpoint handler function
+ * @param[in] user_ctx  User data
+ *
+ * @return
+ *  - ESP_OK      : Success
+ *  - ESP_FAIL    : Failure
+ */
+esp_err_t esp_local_ctrl_set_handler(const char *ep_name,
+                                     protocomm_req_handler_t handler,
+                                     void *user_ctx);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_netif/include/esp_netif.h b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif.h
new file mode 100644
index 00000000000..92c937c1294
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif.h
@@ -0,0 +1,916 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_NETIF_H_
+#define _ESP_NETIF_H_
+
+#include <stdint.h>
+#include "sdkconfig.h"
+#include "esp_wifi_types.h"
+#include "esp_netif_ip_addr.h"
+#include "esp_netif_types.h"
+#include "esp_netif_defaults.h"
+
+#if CONFIG_ETH_ENABLED
+#include "esp_eth_netif_glue.h"
+#endif
+
+//
+// Note: tcpip_adapter legacy API has to be included by default to provide full compatibility
+//  for applications that used tcpip_adapter API without explicit inclusion of tcpip_adapter.h
+//
+#if CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER
+#define _ESP_NETIF_SUPPRESS_LEGACY_WARNING_
+#include "tcpip_adapter.h"
+#undef _ESP_NETIF_SUPPRESS_LEGACY_WARNING_
+#endif // CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup ESP_NETIF_INIT_API ESP-NETIF Initialization API
+ * @brief Initialization and deinitialization of underlying TCP/IP stack and esp-netif instances
+ *
+ */
+
+/** @addtogroup ESP_NETIF_INIT_API
+ * @{
+ */
+
+/**
+ * @brief  Initialize the underlying TCP/IP stack
+ *
+ * @return
+ *         - ESP_OK on success
+ *         - ESP_FAIL if initializing failed
+
+ * @note This function should be called exactly once from application code, when the application starts up.
+ */
+esp_err_t esp_netif_init(void);
+
+/**
+ * @brief  Deinitialize the esp-netif component (and the underlying TCP/IP stack)
+ *
+ *          Note: Deinitialization is not supported yet
+ *
+ * @return
+ *         - ESP_ERR_INVALID_STATE if esp_netif not initialized
+ *         - ESP_ERR_NOT_SUPPORTED otherwise
+ */
+esp_err_t esp_netif_deinit(void);
+
+/**
+ * @brief   Creates an instance of new esp-netif object based on provided config
+ *
+ * @param[in]     esp_netif_config pointer esp-netif configuration
+ *
+ * @return
+ *         - pointer to esp-netif object on success
+ *         - NULL otherwise
+ */
+esp_netif_t *esp_netif_new(const esp_netif_config_t *esp_netif_config);
+
+/**
+ * @brief   Destroys the esp_netif object
+ *
+ * @param[in]  esp_netif pointer to the object to be deleted
+ */
+void esp_netif_destroy(esp_netif_t *esp_netif);
+
+/**
+ * @brief   Configures driver related options of esp_netif object
+ *
+ * @param[inout]  esp_netif pointer to the object to be configured
+ * @param[in]     driver_config pointer esp-netif io driver related configuration
+ * @return
+ *         - ESP_OK on success
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS if invalid parameters provided
+ *
+ */
+esp_err_t esp_netif_set_driver_config(esp_netif_t *esp_netif,
+                                      const esp_netif_driver_ifconfig_t *driver_config);
+
+/**
+ * @brief   Attaches esp_netif instance to the io driver handle
+ *
+ * Calling this function enables connecting specific esp_netif object
+ * with already initialized io driver to update esp_netif object with driver
+ * specific configuration (i.e. calls post_attach callback, which typically
+ * sets io driver callbacks to esp_netif instance and starts the driver)
+ *
+ * @param[inout]  esp_netif pointer to esp_netif object to be attached
+ * @param[in]  driver_handle pointer to the driver handle
+ * @return
+ *         - ESP_OK on success
+ *         - ESP_ERR_ESP_NETIF_DRIVER_ATTACH_FAILED if driver's pot_attach callback failed
+ */
+esp_err_t esp_netif_attach(esp_netif_t *esp_netif, esp_netif_iodriver_handle driver_handle);
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup ESP_NETIF_DATA_IO_API ESP-NETIF Input Output API
+ * @brief Input and Output functions to pass data packets from communication media (IO driver)
+ * to TCP/IP stack.
+ *
+ * These functions are usually not directly called from user code, but installed, or registered
+ * as callbacks in either IO driver on one hand or TCP/IP stack on the other. More specifically
+ * esp_netif_receive is typically called from io driver on reception callback to input the packets
+ * to TCP/IP stack. Similarly esp_netif_transmit is called from the TCP/IP stack whenever
+ * a packet ought to output to the communication media.
+ *
+ * @note These IO functions are registerd (installed) automatically for default interfaces
+ * (interfaces with the keys such as WIFI_STA_DEF, WIFI_AP_DEF, ETH_DEF). Custom interface
+ * has to register these IO functions when creating interface using @ref esp_netif_new
+ *
+ */
+
+/** @addtogroup ESP_NETIF_DATA_IO_API
+ * @{
+ */
+
+/**
+ * @brief  Passes the raw packets from communication media to the appropriate TCP/IP stack
+ *
+ * This function is called from the configured (peripheral) driver layer.
+ * The data are then forwarded as frames to the TCP/IP stack.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[in]  buffer Received data
+ * @param[in]  len Length of the data frame
+ * @param[in]  eb Pointer to internal buffer (used in Wi-Fi driver)
+ *
+ * @return
+ *         - ESP_OK
+ */
+esp_err_t esp_netif_receive(esp_netif_t *esp_netif, void *buffer, size_t len, void *eb);
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup ESP_NETIF_LIFECYCLE ESP-NETIF Lifecycle control
+ * @brief These APIS define basic building blocks to control network interface lifecycle, i.e.
+ * start, stop, set_up or set_down. These functions can be directly used as event handlers
+ * registered to follow the events from communication media.
+ */
+
+/** @addtogroup ESP_NETIF_LIFECYCLE
+ * @{
+ */
+
+/**
+ * @brief Default building block for network interface action upon IO driver start event
+ * Creates network interface, if AUTOUP enabled turns the interface on,
+ * if DHCPS enabled starts dhcp server
+ *
+ * @note This API can be directly used as event handler
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param base
+ * @param event_id
+ * @param data
+ */
+void esp_netif_action_start(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
+
+/**
+ * @brief Default building block for network interface action upon IO driver stop event
+ *
+ * @note This API can be directly used as event handler
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param base
+ * @param event_id
+ * @param data
+ */
+void esp_netif_action_stop(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
+
+/**
+ * @brief Default building block for network interface action upon IO driver connected event
+ *
+ * @note This API can be directly used as event handler
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param base
+ * @param event_id
+ * @param data
+ */
+void esp_netif_action_connected(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
+
+/**
+ * @brief Default building block for network interface action upon IO driver disconnected event
+ *
+ * @note This API can be directly used as event handler
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param base
+ * @param event_id
+ * @param data
+ */
+void esp_netif_action_disconnected(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
+
+/**
+ * @brief Default building block for network interface action upon network got IP event
+ *
+ * @note This API can be directly used as event handler
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param base
+ * @param event_id
+ * @param data
+ */
+void esp_netif_action_got_ip(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
+
+/**
+ * @brief Default building block for network interface action upon IPv6 multicast group join
+ *
+ * @note This API can be directly used as event handler
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param base
+ * @param event_id
+ * @param data
+ */
+void esp_netif_action_join_ip6_multicast_group(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
+
+/**
+ * @brief Default building block for network interface action upon IPv6 multicast group leave
+ *
+ * @note This API can be directly used as event handler
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param base
+ * @param event_id
+ * @param data
+ */
+void esp_netif_action_leave_ip6_multicast_group(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
+
+/**
+ * @brief Default building block for network interface action upon IPv6 address added by the underlying stack
+ *
+ * @note This API can be directly used as event handler
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param base
+ * @param event_id
+ * @param data
+ */
+void esp_netif_action_add_ip6_address(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
+
+/**
+ * @brief Default building block for network interface action upon IPv6 address removed by the underlying stack
+ *
+ * @note This API can be directly used as event handler
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param base
+ * @param event_id
+ * @param data
+ */
+void esp_netif_action_remove_ip6_address(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup ESP_NETIF_GET_SET ESP-NETIF Runtime configuration
+ * @brief Getters and setters for various TCP/IP related parameters
+ */
+
+/** @addtogroup ESP_NETIF_GET_SET
+ * @{
+ */
+
+/**
+ * @brief Set the mac address for the interface instance
+
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[in]  mac Desired mac address for the related network interface
+ * @return
+ *         - ESP_OK - success
+ *         - ESP_ERR_ESP_NETIF_IF_NOT_READY - interface status error
+ *         - ESP_ERR_NOT_SUPPORTED - mac not supported on this interface
+ */
+esp_err_t esp_netif_set_mac(esp_netif_t *esp_netif, uint8_t mac[]);
+
+/**
+ * @brief Get the mac address for the interface instance
+
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[out]  mac Resultant mac address for the related network interface
+ * @return
+ *         - ESP_OK - success
+ *         - ESP_ERR_ESP_NETIF_IF_NOT_READY - interface status error
+ *         - ESP_ERR_NOT_SUPPORTED - mac not supported on this interface
+ */
+esp_err_t esp_netif_get_mac(esp_netif_t *esp_netif, uint8_t mac[]);
+
+/**
+ * @brief  Set the hostname of an interface
+ *
+ * The configured hostname overrides the default configuration value CONFIG_LWIP_LOCAL_HOSTNAME.
+ * Please note that when the hostname is altered after interface started/connected the changes
+ * would only be reflected once the interface restarts/reconnects
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[in]   hostname New hostname for the interface. Maximum length 32 bytes.
+ *
+ * @return
+ *         - ESP_OK - success
+ *         - ESP_ERR_ESP_NETIF_IF_NOT_READY - interface status error
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS - parameter error
+ */
+esp_err_t esp_netif_set_hostname(esp_netif_t *esp_netif, const char *hostname);
+
+/**
+ * @brief  Get interface hostname.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[out]   hostname Returns a pointer to the hostname. May be NULL if no hostname is set. If set non-NULL, pointer remains valid (and string may change if the hostname changes).
+ *
+ * @return
+ *         - ESP_OK - success
+ *         - ESP_ERR_ESP_NETIF_IF_NOT_READY - interface status error
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS - parameter error
+ */
+esp_err_t esp_netif_get_hostname(esp_netif_t *esp_netif, const char **hostname);
+
+/**
+ * @brief  Test if supplied interface is up or down
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return
+ *         - true - Interface is up
+ *         - false - Interface is down
+ */
+bool esp_netif_is_netif_up(esp_netif_t *esp_netif);
+
+/**
+ * @brief  Get interface's IP address information
+ *
+ * If the interface is up, IP information is read directly from the TCP/IP stack.
+ * If the interface is down, IP information is read from a copy kept in the ESP-NETIF instance
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[out]  ip_info If successful, IP information will be returned in this argument.
+ *
+ * @return
+ *         - ESP_OK
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ */
+esp_err_t esp_netif_get_ip_info(esp_netif_t *esp_netif, esp_netif_ip_info_t *ip_info);
+
+/**
+ * @brief  Get interface's old IP information
+ *
+ * Returns an "old" IP address previously stored for the interface when the valid IP changed.
+ *
+ * If the IP lost timer has expired (meaning the interface was down for longer than the configured interval)
+ * then the old IP information will be zero.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[out]  ip_info If successful, IP information will be returned in this argument.
+ *
+ * @return
+ *         - ESP_OK
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ */
+esp_err_t esp_netif_get_old_ip_info(esp_netif_t *esp_netif, esp_netif_ip_info_t *ip_info);
+
+/**
+ * @brief  Set interface's IP address information
+ *
+ * This function is mainly used to set a static IP on an interface.
+ *
+ * If the interface is up, the new IP information is set directly in the TCP/IP stack.
+ *
+ * The copy of IP information kept in the ESP-NETIF instance is also updated (this
+ * copy is returned if the IP is queried while the interface is still down.)
+ *
+ * @note DHCP client/server must be stopped (if enabled for this interface) before setting new IP information.
+ *
+ * @note Calling this interface for may generate a SYSTEM_EVENT_STA_GOT_IP or SYSTEM_EVENT_ETH_GOT_IP event.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[in] ip_info IP information to set on the specified interface
+ *
+ * @return
+ *      - ESP_OK
+ *      - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ *      - ESP_ERR_ESP_NETIF_DHCP_NOT_STOPPED If DHCP server or client is still running
+ */
+esp_err_t esp_netif_set_ip_info(esp_netif_t *esp_netif, const esp_netif_ip_info_t *ip_info);
+
+/**
+ * @brief  Set interface old IP information
+ *
+ * This function is called from the DHCP client (if enabled), before a new IP is set.
+ * It is also called from the default handlers for the SYSTEM_EVENT_STA_CONNECTED and SYSTEM_EVENT_ETH_CONNECTED events.
+ *
+ * Calling this function stores the previously configured IP, which can be used to determine if the IP changes in the future.
+ *
+ * If the interface is disconnected or down for too long, the "IP lost timer" will expire (after the configured interval) and set the old IP information to zero.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[in]  ip_info Store the old IP information for the specified interface
+ *
+ * @return
+ *         - ESP_OK
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ */
+esp_err_t esp_netif_set_old_ip_info(esp_netif_t *esp_netif, const esp_netif_ip_info_t *ip_info);
+
+/**
+ * @brief  Get net interface index from network stack implementation
+ *
+ * @note This index could be used in `setsockopt()` to bind socket with multicast interface
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return
+ *         implementation specific index of interface represented with supplied esp_netif
+ */
+int esp_netif_get_netif_impl_index(esp_netif_t *esp_netif);
+
+/**
+ * @brief  Get net interface name from network stack implementation
+ *
+ * @note This name could be used in `setsockopt()` to bind socket with appropriate interface
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[out]  name Interface name as specified in underlying TCP/IP stack. Note that the
+ * actual name will be copied to the specified buffer, which must be allocated to hold
+ * maximum interface name size (6 characters for lwIP)
+ *
+ * @return
+ *         - ESP_OK
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+*/
+esp_err_t esp_netif_get_netif_impl_name(esp_netif_t *esp_netif, char* name);
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup ESP_NETIF_NET_DHCP ESP-NETIF DHCP Settings
+ * @brief Network stack related interface to DHCP client and server
+ */
+
+/** @addtogroup ESP_NETIF_NET_DHCP
+ * @{
+ */
+
+/**
+ * @brief  Set or Get DHCP server option
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[in] opt_op ESP_NETIF_OP_SET to set an option, ESP_NETIF_OP_GET to get an option.
+ * @param[in] opt_id Option index to get or set, must be one of the supported enum values.
+ * @param[inout] opt_val Pointer to the option parameter.
+ * @param[in] opt_len Length of the option parameter.
+ *
+ * @return
+ *         - ESP_OK
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ *         - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED
+ *         - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED
+ */
+esp_err_t
+esp_netif_dhcps_option(esp_netif_t *esp_netif, esp_netif_dhcp_option_mode_t opt_op, esp_netif_dhcp_option_id_t opt_id,
+                       void *opt_val, uint32_t opt_len);
+
+/**
+ * @brief  Set or Get DHCP client option
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[in] opt_op ESP_NETIF_OP_SET to set an option, ESP_NETIF_OP_GET to get an option.
+ * @param[in] opt_id Option index to get or set, must be one of the supported enum values.
+ * @param[inout] opt_val Pointer to the option parameter.
+ * @param[in] opt_len Length of the option parameter.
+ *
+ * @return
+ *         - ESP_OK
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ *         - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED
+ *         - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED
+ */
+esp_err_t
+esp_netif_dhcpc_option(esp_netif_t *esp_netif, esp_netif_dhcp_option_mode_t opt_op, esp_netif_dhcp_option_id_t opt_id,
+                       void *opt_val, uint32_t opt_len);
+
+/**
+ * @brief Start DHCP client (only if enabled in interface object)
+ *
+ * @note The default event handlers for the SYSTEM_EVENT_STA_CONNECTED and SYSTEM_EVENT_ETH_CONNECTED events call this function.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return
+ *         - ESP_OK
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ *         - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED
+ *         - ESP_ERR_ESP_NETIF_DHCPC_START_FAILED
+ */
+esp_err_t esp_netif_dhcpc_start(esp_netif_t *esp_netif);
+
+/**
+ * @brief  Stop DHCP client (only if enabled in interface object)
+ *
+ * @note Calling action_netif_stop() will also stop the DHCP Client if it is running.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return
+ *      - ESP_OK
+ *      - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ *      - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED
+ *      - ESP_ERR_ESP_NETIF_IF_NOT_READY
+ */
+esp_err_t esp_netif_dhcpc_stop(esp_netif_t *esp_netif);
+
+/**
+ * @brief  Get DHCP client status
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[out] status If successful, the status of DHCP client will be returned in this argument.
+ *
+ * @return
+ *         - ESP_OK
+ */
+esp_err_t esp_netif_dhcpc_get_status(esp_netif_t *esp_netif, esp_netif_dhcp_status_t *status);
+
+/**
+ * @brief  Get DHCP Server status
+ *
+ * @param[in]   esp_netif Handle to esp-netif instance
+ * @param[out]  status If successful, the status of the DHCP server will be returned in this argument.
+ *
+ * @return
+ *         - ESP_OK
+ */
+esp_err_t esp_netif_dhcps_get_status(esp_netif_t *esp_netif, esp_netif_dhcp_status_t *status);
+
+/**
+ * @brief  Start DHCP server (only if enabled in interface object)
+ *
+ * @param[in]   esp_netif Handle to esp-netif instance
+ *
+ * @return
+ *         - ESP_OK
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ *         - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED
+ */
+esp_err_t esp_netif_dhcps_start(esp_netif_t *esp_netif);
+
+/**
+ * @brief  Stop DHCP server (only if enabled in interface object)
+ *
+ * @param[in]   esp_netif Handle to esp-netif instance
+ *
+ * @return
+ *      - ESP_OK
+ *      - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ *      - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED
+ *      - ESP_ERR_ESP_NETIF_IF_NOT_READY
+ */
+esp_err_t esp_netif_dhcps_stop(esp_netif_t *esp_netif);
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup ESP_NETIF_NET_DNS ESP-NETIF DNS Settings
+ * @brief Network stack related interface to NDS
+ */
+
+/** @addtogroup ESP_NETIF_NET_DNS
+ * @{
+ */
+
+/**
+ * @brief  Set DNS Server information
+ *
+ * This function behaves differently if DHCP server or client is enabled
+ *
+ *   If DHCP client is enabled, main and backup DNS servers will be updated automatically
+ *   from the DHCP lease if the relevant DHCP options are set. Fallback DNS Server is never updated from the DHCP lease
+ *   and is designed to be set via this API.
+ *   If DHCP client is disabled, all DNS server types can be set via this API only.
+ *
+ *   If DHCP server is enabled, the Main DNS Server setting is used by the DHCP server to provide a DNS Server option
+ *   to DHCP clients (Wi-Fi stations).
+ *   - The default Main DNS server is typically the IP of the Wi-Fi AP interface itself.
+ *   - This function can override it by setting server type ESP_NETIF_DNS_MAIN.
+ *   - Other DNS Server types are not supported for the Wi-Fi AP interface.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[in]  type Type of DNS Server to set: ESP_NETIF_DNS_MAIN, ESP_NETIF_DNS_BACKUP, ESP_NETIF_DNS_FALLBACK
+ * @param[in]  dns  DNS Server address to set
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_ESP_NETIF_INVALID_PARAMS invalid params
+ */
+esp_err_t esp_netif_set_dns_info(esp_netif_t *esp_netif, esp_netif_dns_type_t type, esp_netif_dns_info_t *dns);
+
+/**
+ * @brief  Get DNS Server information
+ *
+ * Return the currently configured DNS Server address for the specified interface and Server type.
+ *
+ * This may be result of a previous call to esp_netif_set_dns_info(). If the interface's DHCP client is enabled,
+ * the Main or Backup DNS Server may be set by the current DHCP lease.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[in]  type Type of DNS Server to get: ESP_NETIF_DNS_MAIN, ESP_NETIF_DNS_BACKUP, ESP_NETIF_DNS_FALLBACK
+ * @param[out] dns  DNS Server result is written here on success
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_ESP_NETIF_INVALID_PARAMS invalid params
+ */
+esp_err_t esp_netif_get_dns_info(esp_netif_t *esp_netif, esp_netif_dns_type_t type, esp_netif_dns_info_t *dns);
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup ESP_NETIF_NET_IP ESP-NETIF IP address related interface
+ * @brief Network stack related interface to IP
+ */
+
+/** @addtogroup ESP_NETIF_NET_IP
+ * @{
+ */
+#if CONFIG_LWIP_IPV6
+/**
+ * @brief  Create interface link-local IPv6 address
+ *
+ * Cause the TCP/IP stack to create a link-local IPv6 address for the specified interface.
+ *
+ * This function also registers a callback for the specified interface, so that if the link-local address becomes
+ * verified as the preferred address then a SYSTEM_EVENT_GOT_IP6 event will be sent.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return
+ *         - ESP_OK
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ */
+esp_err_t esp_netif_create_ip6_linklocal(esp_netif_t *esp_netif);
+
+/**
+ * @brief  Get interface link-local IPv6 address
+ *
+ * If the specified interface is up and a preferred link-local IPv6 address
+ * has been created for the interface, return a copy of it.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[out] if_ip6 IPv6 information will be returned in this argument if successful.
+ *
+ * @return
+ *      - ESP_OK
+ *      - ESP_FAIL If interface is down, does not have a link-local IPv6 address,
+ *        or the link-local IPv6 address is not a preferred address.
+ */
+esp_err_t esp_netif_get_ip6_linklocal(esp_netif_t *esp_netif, esp_ip6_addr_t *if_ip6);
+
+/**
+ * @brief  Get interface global IPv6 address
+ *
+ * If the specified interface is up and a preferred global IPv6 address
+ * has been created for the interface, return a copy of it.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[out] if_ip6 IPv6 information will be returned in this argument if successful.
+ *
+ * @return
+ *      - ESP_OK
+ *      - ESP_FAIL If interface is down, does not have a global IPv6 address,
+ *        or the global IPv6 address is not a preferred address.
+ */
+esp_err_t esp_netif_get_ip6_global(esp_netif_t *esp_netif, esp_ip6_addr_t *if_ip6);
+
+/**
+ * @brief  Get all IPv6 addresses of the specified interface
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[out] if_ip6 Array of IPv6 addresses will be copied to the argument
+ *
+ * @return
+ *      number of returned IPv6 addresses
+ */
+int esp_netif_get_all_ip6(esp_netif_t *esp_netif, esp_ip6_addr_t if_ip6[]);
+#endif
+
+/**
+ * @brief Sets IPv4 address to the specified octets
+ *
+ * @param[out] addr IP address to be set
+ * @param a the first octet (127 for IP 127.0.0.1)
+ * @param b
+ * @param c
+ * @param d
+ */
+void esp_netif_set_ip4_addr(esp_ip4_addr_t *addr, uint8_t a, uint8_t b, uint8_t c, uint8_t d);
+
+
+/**
+ * @brief Converts numeric IP address into decimal dotted ASCII representation.
+ *
+ * @param addr ip address in network order to convert
+ * @param buf target buffer where the string is stored
+ * @param buflen length of buf
+ * @return either pointer to buf which now holds the ASCII
+ *         representation of addr or NULL if buf was too small
+ */
+char *esp_ip4addr_ntoa(const esp_ip4_addr_t *addr, char *buf, int buflen);
+
+/**
+ * @brief Ascii internet address interpretation routine
+ * The value returned is in network order.
+ *
+ * @param addr IP address in ascii representation (e.g. "127.0.0.1")
+ * @return ip address in network order
+*/
+uint32_t esp_ip4addr_aton(const char *addr);
+
+/**
+ * @brief Converts Ascii internet IPv4 address into esp_ip4_addr_t
+ *
+ * @param[in] src IPv4 address in ascii representation (e.g. "127.0.0.1")
+ * @param[out] dst Address of the target esp_ip4_addr_t structure to receive converted address
+ * @return
+ *         - ESP_OK on success
+ *         - ESP_FAIL if conversion failed
+ *         - ESP_ERR_INVALID_ARG if invalid parameter is passed into
+ */
+esp_err_t esp_netif_str_to_ip4(const char *src, esp_ip4_addr_t *dst);
+
+/**
+ * @brief Converts Ascii internet IPv6 address into esp_ip4_addr_t
+ * Zeros in the IP address can be stripped or completely ommited: "2001:db8:85a3:0:0:0:2:1" or "2001:db8::2:1")
+ *
+ * @param[in] src IPv6 address in ascii representation (e.g. ""2001:0db8:85a3:0000:0000:0000:0002:0001")
+ * @param[out] dst Address of the target esp_ip6_addr_t structure to receive converted address
+ * @return
+ *         - ESP_OK on success
+ *         - ESP_FAIL if conversion failed
+ *         - ESP_ERR_INVALID_ARG if invalid parameter is passed into
+ */
+esp_err_t esp_netif_str_to_ip6(const char *src, esp_ip6_addr_t *dst);
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup ESP_NETIF_CONVERT ESP-NETIF Conversion utilities
+ * @brief  ESP-NETIF conversion utilities to related keys, flags, implementation handle
+ */
+
+/** @addtogroup ESP_NETIF_CONVERT
+ * @{
+ */
+
+/**
+ * @brief Gets media driver handle for this esp-netif instance
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return opaque pointer of related IO driver
+ */
+esp_netif_iodriver_handle esp_netif_get_io_driver(esp_netif_t *esp_netif);
+
+/**
+ * @brief Searches over a list of created objects to find an instance with supplied if key
+ *
+ * @param if_key Textual description of network interface
+ *
+ * @return Handle to esp-netif instance
+ */
+esp_netif_t *esp_netif_get_handle_from_ifkey(const char *if_key);
+
+/**
+ * @brief Returns configured flags for this interface
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return Configuration flags
+ */
+esp_netif_flags_t esp_netif_get_flags(esp_netif_t *esp_netif);
+
+/**
+ * @brief Returns configured interface key for this esp-netif instance
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return Textual description of related interface
+ */
+const char *esp_netif_get_ifkey(esp_netif_t *esp_netif);
+
+/**
+ * @brief Returns configured interface type for this esp-netif instance
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return Enumerated type of this interface, such as station, AP, ethernet
+ */
+const char *esp_netif_get_desc(esp_netif_t *esp_netif);
+
+/**
+ * @brief Returns configured routing priority number
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return Integer representing the instance's route-prio, or -1 if invalid paramters
+ */
+int esp_netif_get_route_prio(esp_netif_t *esp_netif);
+
+/**
+ * @brief Returns configured event for this esp-netif instance and supplied event type
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @param event_type (either get or lost IP)
+ *
+ * @return specific event id which is configured to be raised if the interface lost or acquired IP address
+ *         -1 if supplied event_type is not known
+ */
+int32_t esp_netif_get_event_id(esp_netif_t *esp_netif, esp_netif_ip_event_type_t event_type);
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup ESP_NETIF_LIST ESP-NETIF List of interfaces
+ * @brief  APIs to enumerate all registered interfaces
+ */
+
+/** @addtogroup ESP_NETIF_LIST
+ * @{
+ */
+
+/**
+ * @brief Iterates over list of interfaces. Returns first netif if NULL given as parameter
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return First netif from the list if supplied parameter is NULL, next one otherwise
+ */
+esp_netif_t *esp_netif_next(esp_netif_t *esp_netif);
+
+/**
+ * @brief Returns number of registered esp_netif objects
+ *
+ * @return Number of esp_netifs
+ */
+size_t esp_netif_get_nr_of_ifs(void);
+
+/**
+ * @brief increase the reference counter of net stack buffer
+ *
+ * @param[in]  netstack_buf the net stack buffer
+ *
+ */
+void esp_netif_netstack_buf_ref(void *netstack_buf);
+
+/**
+ * @brief free the netstack buffer
+ *
+ * @param[in]  netstack_buf the net stack buffer
+ *
+ */
+void esp_netif_netstack_buf_free(void *netstack_buf);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*  _ESP_NETIF_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_defaults.h b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_defaults.h
new file mode 100644
index 00000000000..b8276068e9a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_defaults.h
@@ -0,0 +1,241 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_NETIF_DEFAULTS_H
+#define _ESP_NETIF_DEFAULTS_H
+
+#include "esp_compiler.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//
+// Macros to assemble master configs with partial configs from netif, stack and driver
+//
+
+#define ESP_NETIF_INHERENT_DEFAULT_WIFI_STA() \
+    {   \
+        .flags = (esp_netif_flags_t)(ESP_NETIF_DHCP_CLIENT | ESP_NETIF_FLAG_GARP | ESP_NETIF_FLAG_EVENT_IP_MODIFIED), \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \
+        .get_ip_event = IP_EVENT_STA_GOT_IP, \
+        .lost_ip_event = IP_EVENT_STA_LOST_IP, \
+        .if_key = "WIFI_STA_DEF", \
+        .if_desc = "sta", \
+        .route_prio = 100 \
+     }  \
+
+#ifdef CONFIG_ESP_WIFI_SOFTAP_SUPPORT
+#define ESP_NETIF_INHERENT_DEFAULT_WIFI_AP() \
+    {   \
+        .flags = (esp_netif_flags_t)(ESP_NETIF_DHCP_SERVER | ESP_NETIF_FLAG_AUTOUP), \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \
+        .ip_info = &_g_esp_netif_soft_ap_ip, \
+        .get_ip_event = 0, \
+        .lost_ip_event = 0, \
+        .if_key = "WIFI_AP_DEF", \
+        .if_desc = "ap", \
+        .route_prio = 10 \
+    };
+#endif
+
+#define ESP_NETIF_INHERENT_DEFAULT_ETH() \
+    {   \
+        .flags = (esp_netif_flags_t)(ESP_NETIF_DHCP_CLIENT | ESP_NETIF_FLAG_GARP | ESP_NETIF_FLAG_EVENT_IP_MODIFIED), \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \
+        .get_ip_event = IP_EVENT_ETH_GOT_IP, \
+        .lost_ip_event = IP_EVENT_ETH_LOST_IP, \
+        .if_key = "ETH_DEF", \
+        .if_desc = "eth", \
+        .route_prio = 50 \
+    };
+
+#define ESP_NETIF_INHERENT_DEFAULT_PPP() \
+    {   \
+        .flags = ESP_NETIF_FLAG_IS_PPP, \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \
+        .get_ip_event = IP_EVENT_PPP_GOT_IP,    \
+        .lost_ip_event = IP_EVENT_PPP_LOST_IP,  \
+        .if_key = "PPP_DEF",    \
+        .if_desc = "ppp",   \
+        .route_prio = 20   \
+};
+
+#define ESP_NETIF_INHERENT_DEFAULT_OPENTHREAD() \
+    {   \
+        .flags = 0, \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \
+        .get_ip_event = 0,    \
+        .lost_ip_event = 0,   \
+        .if_key = "OT_DEF",  \
+        .if_desc = "openthread",    \
+        .route_prio = 15      \
+};
+
+#define ESP_NETIF_INHERENT_DEFAULT_SLIP() \
+    {   \
+        .flags = ESP_NETIF_FLAG_IS_SLIP, \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \
+        .get_ip_event = 0,    \
+        .lost_ip_event = 0,   \
+        .if_key = "SLP_DEF",  \
+        .if_desc = "slip",    \
+        .route_prio = 16      \
+};
+
+
+/**
+ * @brief  Default configuration reference of ethernet interface
+ */
+#define ESP_NETIF_DEFAULT_ETH()                  \
+    {                                            \
+        .base = ESP_NETIF_BASE_DEFAULT_ETH,      \
+        .driver = NULL,                          \
+        .stack = ESP_NETIF_NETSTACK_DEFAULT_ETH, \
+    }
+
+#ifdef CONFIG_ESP_WIFI_SOFTAP_SUPPORT
+/**
+ * @brief  Default configuration reference of WIFI AP
+ */
+#define ESP_NETIF_DEFAULT_WIFI_AP()                  \
+    {                                                \
+        .base = ESP_NETIF_BASE_DEFAULT_WIFI_AP,      \
+        .driver = NULL,                              \
+        .stack = ESP_NETIF_NETSTACK_DEFAULT_WIFI_AP, \
+    }
+#endif
+
+/**
+* @brief  Default configuration reference of WIFI STA
+*/
+#define ESP_NETIF_DEFAULT_WIFI_STA()                  \
+    {                                                 \
+        .base = ESP_NETIF_BASE_DEFAULT_WIFI_STA,      \
+        .driver = NULL,                               \
+        .stack = ESP_NETIF_NETSTACK_DEFAULT_WIFI_STA, \
+    }
+
+/**
+* @brief  Default configuration reference of PPP client
+*/
+#define ESP_NETIF_DEFAULT_PPP()                       \
+    {                                                 \
+        .base = ESP_NETIF_BASE_DEFAULT_PPP,           \
+        .driver = NULL,                               \
+        .stack = ESP_NETIF_NETSTACK_DEFAULT_PPP,      \
+    }
+
+/**
+* @brief  Default configuration reference of SLIP client
+*/
+#define ESP_NETIF_DEFAULT_SLIP()                       \
+    {                                                  \
+        .base = ESP_NETIF_BASE_DEFAULT_SLIP,           \
+        .driver = NULL,                                \
+        .stack = ESP_NETIF_NETSTACK_DEFAULT_SLIP,      \
+    }
+
+
+/**
+ * @brief  Default base config (esp-netif inherent) of WIFI STA
+ */
+#define ESP_NETIF_BASE_DEFAULT_WIFI_STA        &_g_esp_netif_inherent_sta_config
+
+#ifdef CONFIG_ESP_WIFI_SOFTAP_SUPPORT
+/**
+ * @brief  Default base config (esp-netif inherent) of WIFI AP
+ */
+#define ESP_NETIF_BASE_DEFAULT_WIFI_AP         &_g_esp_netif_inherent_ap_config
+#endif
+
+/**
+ * @brief  Default base config (esp-netif inherent) of ethernet interface
+ */
+#define ESP_NETIF_BASE_DEFAULT_ETH             &_g_esp_netif_inherent_eth_config
+
+/**
+ * @brief  Default base config (esp-netif inherent) of ppp interface
+ */
+#define ESP_NETIF_BASE_DEFAULT_PPP             &_g_esp_netif_inherent_ppp_config
+
+/**
+ * @brief  Default base config (esp-netif inherent) of slip interface
+ */
+#define ESP_NETIF_BASE_DEFAULT_SLIP             &_g_esp_netif_inherent_slip_config
+
+
+#define ESP_NETIF_NETSTACK_DEFAULT_ETH          _g_esp_netif_netstack_default_eth
+#define ESP_NETIF_NETSTACK_DEFAULT_WIFI_STA     _g_esp_netif_netstack_default_wifi_sta
+#ifdef CONFIG_ESP_WIFI_SOFTAP_SUPPORT
+#define ESP_NETIF_NETSTACK_DEFAULT_WIFI_AP      _g_esp_netif_netstack_default_wifi_ap
+#endif
+#define ESP_NETIF_NETSTACK_DEFAULT_PPP          _g_esp_netif_netstack_default_ppp
+#define ESP_NETIF_NETSTACK_DEFAULT_SLIP         _g_esp_netif_netstack_default_slip
+#define ESP_NETIF_NETSTACK_DEFAULT_OPENTHREAD   _g_esp_netif_netstack_default_openthread
+
+//
+// Include default network stacks configs
+//  - Network stack configurations are provided in a specific network stack
+//      implementation that is invisible to user API
+//  - Here referenced only as opaque pointers
+//
+extern const esp_netif_netstack_config_t *_g_esp_netif_netstack_default_eth;
+extern const esp_netif_netstack_config_t *_g_esp_netif_netstack_default_wifi_sta;
+#ifdef CONFIG_ESP_WIFI_SOFTAP_SUPPORT
+extern const esp_netif_netstack_config_t *_g_esp_netif_netstack_default_wifi_ap;
+#endif
+extern const esp_netif_netstack_config_t *_g_esp_netif_netstack_default_ppp;
+extern const esp_netif_netstack_config_t *_g_esp_netif_netstack_default_slip;
+
+//
+// Include default common configs inherent to esp-netif
+//  - These inherent configs are defined in esp_netif_defaults.c and describe
+//    common behavioural patterns for common interfaces such as STA, AP, ETH, PPP
+//
+extern const esp_netif_inherent_config_t _g_esp_netif_inherent_sta_config;
+#ifdef CONFIG_ESP_WIFI_SOFTAP_SUPPORT
+extern const esp_netif_inherent_config_t _g_esp_netif_inherent_ap_config;
+#endif
+extern const esp_netif_inherent_config_t _g_esp_netif_inherent_eth_config;
+extern const esp_netif_inherent_config_t _g_esp_netif_inherent_ppp_config;
+extern const esp_netif_inherent_config_t _g_esp_netif_inherent_slip_config;
+
+#ifdef CONFIG_ESP_WIFI_SOFTAP_SUPPORT
+extern const esp_netif_ip_info_t _g_esp_netif_soft_ap_ip;
+#endif
+
+#if CONFIG_OPENTHREAD_ENABLED
+/**
+* @brief  Default configuration reference of SLIP client
+*/
+#define ESP_NETIF_DEFAULT_OPENTHREAD()                  \
+    {                                                   \
+        .base = ESP_NETIF_BASE_DEFAULT_OPENTHREAD,      \
+        .driver = NULL,                                 \
+        .stack = ESP_NETIF_NETSTACK_DEFAULT_OPENTHREAD, \
+    }
+
+/**
+ * @brief  Default base config (esp-netif inherent) of openthread interface
+ */
+#define ESP_NETIF_BASE_DEFAULT_OPENTHREAD       &_g_esp_netif_inherent_openthread_config
+
+extern const esp_netif_netstack_config_t *_g_esp_netif_netstack_default_openthread;
+extern const esp_netif_inherent_config_t _g_esp_netif_inherent_openthread_config;
+
+#endif // CONFIG_OPENTHREAD_ENABLED
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_NETIF_DEFAULTS_H
diff --git a/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_ip_addr.h b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_ip_addr.h
new file mode 100644
index 00000000000..25b877d359d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_ip_addr.h
@@ -0,0 +1,151 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_NETIF_IP_ADDR_H_
+#define _ESP_NETIF_IP_ADDR_H_
+
+#include <stdint.h>
+#include <machine/endian.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if BYTE_ORDER == BIG_ENDIAN
+#define esp_netif_htonl(x) ((uint32_t)(x))
+#else
+#define esp_netif_htonl(x) ((((x) & (uint32_t)0x000000ffUL) << 24) | \
+                      (((x) & (uint32_t)0x0000ff00UL) <<  8) | \
+                      (((x) & (uint32_t)0x00ff0000UL) >>  8) | \
+                      (((x) & (uint32_t)0xff000000UL) >> 24))
+#endif
+
+#define esp_netif_ip4_makeu32(a,b,c,d) (((uint32_t)((a) & 0xff) << 24) | \
+                               ((uint32_t)((b) & 0xff) << 16) | \
+                               ((uint32_t)((c) & 0xff) << 8)  | \
+                                (uint32_t)((d) & 0xff))
+
+// Access address in 16-bit block
+#define ESP_IP6_ADDR_BLOCK1(ip6addr) ((uint16_t)((esp_netif_htonl((ip6addr)->addr[0]) >> 16) & 0xffff))
+#define ESP_IP6_ADDR_BLOCK2(ip6addr) ((uint16_t)((esp_netif_htonl((ip6addr)->addr[0])) & 0xffff))
+#define ESP_IP6_ADDR_BLOCK3(ip6addr) ((uint16_t)((esp_netif_htonl((ip6addr)->addr[1]) >> 16) & 0xffff))
+#define ESP_IP6_ADDR_BLOCK4(ip6addr) ((uint16_t)((esp_netif_htonl((ip6addr)->addr[1])) & 0xffff))
+#define ESP_IP6_ADDR_BLOCK5(ip6addr) ((uint16_t)((esp_netif_htonl((ip6addr)->addr[2]) >> 16) & 0xffff))
+#define ESP_IP6_ADDR_BLOCK6(ip6addr) ((uint16_t)((esp_netif_htonl((ip6addr)->addr[2])) & 0xffff))
+#define ESP_IP6_ADDR_BLOCK7(ip6addr) ((uint16_t)((esp_netif_htonl((ip6addr)->addr[3]) >> 16) & 0xffff))
+#define ESP_IP6_ADDR_BLOCK8(ip6addr) ((uint16_t)((esp_netif_htonl((ip6addr)->addr[3])) & 0xffff))
+
+#define IPSTR "%d.%d.%d.%d"
+#define esp_ip4_addr_get_byte(ipaddr, idx) (((const uint8_t*)(&(ipaddr)->addr))[idx])
+#define esp_ip4_addr1(ipaddr) esp_ip4_addr_get_byte(ipaddr, 0)
+#define esp_ip4_addr2(ipaddr) esp_ip4_addr_get_byte(ipaddr, 1)
+#define esp_ip4_addr3(ipaddr) esp_ip4_addr_get_byte(ipaddr, 2)
+#define esp_ip4_addr4(ipaddr) esp_ip4_addr_get_byte(ipaddr, 3)
+
+
+#define esp_ip4_addr1_16(ipaddr) ((uint16_t)esp_ip4_addr1(ipaddr))
+#define esp_ip4_addr2_16(ipaddr) ((uint16_t)esp_ip4_addr2(ipaddr))
+#define esp_ip4_addr3_16(ipaddr) ((uint16_t)esp_ip4_addr3(ipaddr))
+#define esp_ip4_addr4_16(ipaddr) ((uint16_t)esp_ip4_addr4(ipaddr))
+
+#define IP2STR(ipaddr) esp_ip4_addr1_16(ipaddr), \
+    esp_ip4_addr2_16(ipaddr), \
+    esp_ip4_addr3_16(ipaddr), \
+    esp_ip4_addr4_16(ipaddr)
+
+#define IPV6STR "%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x"
+
+#define IPV62STR(ipaddr) ESP_IP6_ADDR_BLOCK1(&(ipaddr)),     \
+    ESP_IP6_ADDR_BLOCK2(&(ipaddr)),     \
+    ESP_IP6_ADDR_BLOCK3(&(ipaddr)),     \
+    ESP_IP6_ADDR_BLOCK4(&(ipaddr)),     \
+    ESP_IP6_ADDR_BLOCK5(&(ipaddr)),     \
+    ESP_IP6_ADDR_BLOCK6(&(ipaddr)),     \
+    ESP_IP6_ADDR_BLOCK7(&(ipaddr)),     \
+    ESP_IP6_ADDR_BLOCK8(&(ipaddr))
+
+#define ESP_IPADDR_TYPE_V4                0U
+#define ESP_IPADDR_TYPE_V6                6U
+#define ESP_IPADDR_TYPE_ANY               46U
+
+#define ESP_IP4TOUINT32(a,b,c,d) (((uint32_t)((a) & 0xffU) << 24) | \
+                               ((uint32_t)((b) & 0xffU) << 16) | \
+                               ((uint32_t)((c) & 0xffU) << 8)  | \
+                                (uint32_t)((d) & 0xffU))
+
+#define ESP_IP4TOADDR(a,b,c,d) esp_netif_htonl(ESP_IP4TOUINT32(a, b, c, d))
+
+#define ESP_IP4ADDR_INIT(a, b, c, d)  { .type = ESP_IPADDR_TYPE_V4, .u_addr = { .ip4 = { .addr = ESP_IP4TOADDR(a, b, c, d) }}};
+#define ESP_IP6ADDR_INIT(a, b, c, d)  { .type = ESP_IPADDR_TYPE_V6, .u_addr = { .ip6 = { .addr = { a, b, c, d }, .zone = 0 }}};
+
+struct esp_ip6_addr {
+    uint32_t addr[4];
+    uint8_t zone;
+};
+
+struct esp_ip4_addr {
+    uint32_t addr;
+};
+
+typedef struct esp_ip4_addr esp_ip4_addr_t;
+
+typedef struct esp_ip6_addr esp_ip6_addr_t;
+
+typedef struct _ip_addr {
+    union {
+        esp_ip6_addr_t ip6;
+        esp_ip4_addr_t ip4;
+    } u_addr;
+    uint8_t type;
+} esp_ip_addr_t;
+
+typedef enum {
+    ESP_IP6_ADDR_IS_UNKNOWN,
+    ESP_IP6_ADDR_IS_GLOBAL,
+    ESP_IP6_ADDR_IS_LINK_LOCAL,
+    ESP_IP6_ADDR_IS_SITE_LOCAL,
+    ESP_IP6_ADDR_IS_UNIQUE_LOCAL,
+    ESP_IP6_ADDR_IS_IPV4_MAPPED_IPV6
+} esp_ip6_addr_type_t;
+
+/**
+ * @brief  Get the IPv6 address type
+ *
+ * @param[in]  ip6_addr IPv6 type
+ *
+ * @return IPv6 type in form of enum esp_ip6_addr_type_t
+ */
+esp_ip6_addr_type_t esp_netif_ip6_get_addr_type(esp_ip6_addr_t* ip6_addr);
+
+/**
+ * @brief  Copy IP addresses
+ *
+ * @param[out] dest destination IP
+ * @param[in]  src source IP
+ */
+static inline void esp_netif_ip_addr_copy(esp_ip_addr_t *dest, const esp_ip_addr_t *src)
+{
+    dest->type = src->type;
+    if (src->type == ESP_IPADDR_TYPE_V6) {
+        dest->u_addr.ip6.addr[0] = src->u_addr.ip6.addr[0];
+        dest->u_addr.ip6.addr[1] = src->u_addr.ip6.addr[1];
+        dest->u_addr.ip6.addr[2] = src->u_addr.ip6.addr[2];
+        dest->u_addr.ip6.addr[3] = src->u_addr.ip6.addr[3];
+        dest->u_addr.ip6.zone = src->u_addr.ip6.zone;
+    } else {
+        dest->u_addr.ip4.addr = src->u_addr.ip4.addr;
+        dest->u_addr.ip6.addr[1] = 0;
+        dest->u_addr.ip6.addr[2] = 0;
+        dest->u_addr.ip6.addr[3] = 0;
+        dest->u_addr.ip6.zone = 0;
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_NETIF_IP_ADDR_H_
diff --git a/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_net_stack.h b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_net_stack.h
new file mode 100644
index 00000000000..ab6d6a07fdc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_net_stack.h
@@ -0,0 +1,106 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_NETIF_NET_STACK_H_
+#define _ESP_NETIF_NET_STACK_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//
+// Network stack API: This ESP-NETIF API are supposed to be called only from internals of TCP/IP stack
+//
+
+/** @addtogroup ESP_NETIF_CONVERT
+ * @{
+ */
+
+/**
+ * @brief Returns esp-netif handle
+ *
+ * @param[in] dev opaque ptr to network interface of specific TCP/IP stack
+ *
+ * @return    handle to related esp-netif instance
+ */
+esp_netif_t* esp_netif_get_handle_from_netif_impl(void *dev);
+
+/**
+ * @brief Returns network stack specific implementation handle (if supported)
+ *
+ * Note that it is not supported to acquire PPP netif impl pointer and
+ * this function will return NULL for esp_netif instances configured to PPP mode
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ *
+ * @return    handle to related network stack netif handle
+ */
+void* esp_netif_get_netif_impl(esp_netif_t *esp_netif);
+
+/**
+ * @}
+ */
+
+/** @addtogroup ESP_NETIF_DATA_IO_API
+ * @{
+ */
+
+/**
+  * @brief  Outputs packets from the TCP/IP stack to the media to be transmitted
+  *
+  * This function gets called from network stack to output packets to IO driver.
+  *
+  * @param[in]  esp_netif Handle to esp-netif instance
+  * @param[in]  data Data to be transmitted
+  * @param[in]  len Length of the data frame
+  *
+  * @return   ESP_OK on success, an error passed from the I/O driver otherwise
+  */
+esp_err_t esp_netif_transmit(esp_netif_t *esp_netif, void* data, size_t len);
+
+/**
+  * @brief  Outputs packets from the TCP/IP stack to the media to be transmitted
+  *
+  * This function gets called from network stack to output packets to IO driver.
+  *
+  * @param[in]  esp_netif Handle to esp-netif instance
+  * @param[in]  data Data to be transmitted
+  * @param[in]  len Length of the data frame
+  * @param[in]  netstack_buf net stack buffer
+  *
+  * @return   ESP_OK on success, an error passed from the I/O driver otherwise
+  */
+esp_err_t esp_netif_transmit_wrap(esp_netif_t *esp_netif, void *data, size_t len, void *netstack_buf);
+
+/**
+  * @brief  Free the rx buffer allocated by the media driver
+  *
+  * This function gets called from network stack when the rx buffer to be freed in IO driver context,
+  * i.e. to deallocate a buffer owned by io driver (when data packets were passed to higher levels
+  * to avoid copying)
+  *
+  * @param[in]  esp_netif Handle to esp-netif instance
+  * @param[in]  buffer Rx buffer pointer
+  */
+void esp_netif_free_rx_buffer(void *esp_netif, void* buffer);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_NETIF_NET_STACK_H_
diff --git a/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_ppp.h b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_ppp.h
new file mode 100644
index 00000000000..159388e80ea
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_ppp.h
@@ -0,0 +1,127 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+
+#ifndef _ESP_NETIF_PPP_H_
+#define _ESP_NETIF_PPP_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @brief PPP event base */
+ESP_EVENT_DECLARE_BASE(NETIF_PPP_STATUS);
+
+/** @brief Configuration structure for PPP network interface
+ *
+ */
+typedef struct esp_netif_ppp_config {
+    bool ppp_phase_event_enabled;  /**< Enables events coming from PPP PHASE change */
+    bool ppp_error_event_enabled;  /**< Enables events from main PPP state machine producing errors */
+} esp_netif_ppp_config_t;
+
+/** @brief event id offset for PHASE related events
+ *
+ * All PPP related events are produced from esp-netif under `NETIF_PPP_STATUS`, this offset defines
+ * helps distinguish between error and phase events
+ */
+#define NETIF_PP_PHASE_OFFSET (0x100)
+
+/** @brief event id offset for internal errors
+ *
+ */
+#define NETIF_PPP_INTERNAL_ERR_OFFSET (0x200)
+
+/** @brief event ids for different PPP related events
+ *
+ */
+typedef enum {
+    NETIF_PPP_ERRORNONE        = 0,  /* No error. */
+    NETIF_PPP_ERRORPARAM       = 1,  /* Invalid parameter. */
+    NETIF_PPP_ERROROPEN        = 2,  /* Unable to open PPP session. */
+    NETIF_PPP_ERRORDEVICE      = 3,  /* Invalid I/O device for PPP. */
+    NETIF_PPP_ERRORALLOC       = 4,  /* Unable to allocate resources. */
+    NETIF_PPP_ERRORUSER        = 5,  /* User interrupt. */
+    NETIF_PPP_ERRORCONNECT     = 6,  /* Connection lost. */
+    NETIF_PPP_ERRORAUTHFAIL    = 7,  /* Failed authentication challenge. */
+    NETIF_PPP_ERRORPROTOCOL    = 8,  /* Failed to meet protocol. */
+    NETIF_PPP_ERRORPEERDEAD    = 9,  /* Connection timeout */
+    NETIF_PPP_ERRORIDLETIMEOUT = 10, /* Idle Timeout */
+    NETIF_PPP_ERRORCONNECTTIME = 11, /* Max connect time reached */
+    NETIF_PPP_ERRORLOOPBACK    = 12, /* Loopback detected */
+    NETIF_PPP_PHASE_DEAD         = NETIF_PP_PHASE_OFFSET +  0,
+    NETIF_PPP_PHASE_MASTER       = NETIF_PP_PHASE_OFFSET +  1,
+    NETIF_PPP_PHASE_HOLDOFF      = NETIF_PP_PHASE_OFFSET +  2,
+    NETIF_PPP_PHASE_INITIALIZE   = NETIF_PP_PHASE_OFFSET +  3,
+    NETIF_PPP_PHASE_SERIALCONN   = NETIF_PP_PHASE_OFFSET +  4,
+    NETIF_PPP_PHASE_DORMANT      = NETIF_PP_PHASE_OFFSET +  5,
+    NETIF_PPP_PHASE_ESTABLISH    = NETIF_PP_PHASE_OFFSET +  6,
+    NETIF_PPP_PHASE_AUTHENTICATE = NETIF_PP_PHASE_OFFSET +  7,
+    NETIF_PPP_PHASE_CALLBACK     = NETIF_PP_PHASE_OFFSET +  8,
+    NETIF_PPP_PHASE_NETWORK      = NETIF_PP_PHASE_OFFSET +  9,
+    NETIF_PPP_PHASE_RUNNING      = NETIF_PP_PHASE_OFFSET +  10,
+    NETIF_PPP_PHASE_TERMINATE    = NETIF_PP_PHASE_OFFSET +  11,
+    NETIF_PPP_PHASE_DISCONNECT   = NETIF_PP_PHASE_OFFSET +  12,
+    NETIF_PPP_CONNECT_FAILED     = NETIF_PPP_INTERNAL_ERR_OFFSET + 0,
+} esp_netif_ppp_status_event_t;
+
+/** @brief definitions of different authorisation types
+ *
+ */
+typedef enum {
+    NETIF_PPP_AUTHTYPE_NONE =      0x00,
+    NETIF_PPP_AUTHTYPE_PAP =       0x01,
+    NETIF_PPP_AUTHTYPE_CHAP =      0x02,
+    NETIF_PPP_AUTHTYPE_MSCHAP =    0x04,
+    NETIF_PPP_AUTHTYPE_MSCHAP_V2 = 0x08,
+    NETIF_PPP_AUTHTYPE_EAP =       0x10,
+} esp_netif_auth_type_t;
+
+/** @brief Sets the auth parameters for the supplied esp-netif.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[in]  authtype Authorisation type
+ * @param[in]  user User name
+ * @param[in]  passwd Password
+ *
+ * @return     ESP_OK on success,
+ *             ESP_ERR_ESP_NETIF_INVALID_PARAMS if the supplied netif is not of PPP type, or netif is null
+ */
+esp_err_t esp_netif_ppp_set_auth(esp_netif_t *netif, esp_netif_auth_type_t authtype, const char *user, const char *passwd);
+
+/** @brief Sets common parameters for the supplied esp-netif.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[in]  config Pointer to PPP netif configuration structure
+ *
+ * @return     ESP_OK on success,
+ *             ESP_ERR_ESP_NETIF_INVALID_PARAMS if the supplied netif is not of PPP type, or netif is null
+ */
+esp_err_t esp_netif_ppp_set_params(esp_netif_t *netif, const esp_netif_ppp_config_t *config);
+
+/** @brief Gets parameters configured in the supplied esp-netif.
+ *
+ * @param[in]  esp_netif Handle to esp-netif instance
+ * @param[out]  config Pointer to PPP netif configuration structure
+ *
+ * @return     ESP_OK on success,
+ *             ESP_ERR_ESP_NETIF_INVALID_PARAMS if the supplied netif is not of PPP type, or netif is null
+ */
+esp_err_t esp_netif_ppp_get_params(esp_netif_t *netif, esp_netif_ppp_config_t *config);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_NETIF_PPP_H_
diff --git a/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_slip.h b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_slip.h
new file mode 100644
index 00000000000..5cad14ea284
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_slip.h
@@ -0,0 +1,82 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+
+#ifndef _ESP_NETIF_SLIP_H_
+#define _ESP_NETIF_SLIP_H_
+
+#include "esp_netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @brief Configuration structure for SLIP network interface
+ *
+ */
+typedef struct esp_netif_slip_config {
+    esp_ip6_addr_t ip6_addr;        /* Local IP6 address */
+
+} esp_netif_slip_config_t;
+
+
+/** @brief Sets common parameters for the supplied esp-netif.
+ *
+ * @param[in]  esp_netif handle to slip esp-netif instance
+ * @param[in]  config Pointer to SLIP netif configuration structure
+ *
+ * @return     ESP_OK on success, ESP_ERR_ESP_NETIF_INVALID_PARAMS if netif null or not SLIP
+ */
+esp_err_t esp_netif_slip_set_params(esp_netif_t *netif, const esp_netif_slip_config_t *config);
+
+#if CONFIG_LWIP_IPV6
+/** @brief Sets IPV6 address for the supplied esp-netif.
+ *
+ * @param[in]  netif handle to slip esp-netif instance
+ * @param[in]  ipv6 IPv6 address of the SLIP interface
+ *
+ * @return     ESP_OK on success, ESP_ERR_ESP_NETIF_INVALID_PARAMS if netif null or not SLIP
+ */
+esp_err_t esp_netif_slip_set_ipv6(esp_netif_t *netif, const esp_ip6_addr_t *ipv6);
+#endif
+
+/**
+ * @brief  Data path API to write raw packet ous the SLIP interface
+ *
+ * This API is typically used when implementing user defined methods
+ *
+ * @param[in]    esp_netif handle to slip esp-netif instance
+ * @param[in]    buffer pointer to the outgoing data
+ * @param[in]    len length of the data
+ *
+ * @return
+ *         - ESP_OK on success
+ */
+void esp_netif_lwip_slip_raw_output(esp_netif_t *netif, void *buffer, size_t len);
+
+/**
+ * @brief  Fetch IP6 address attached to the SLIP interface
+ *
+ * @param[in]    esp_netif handle to slip esp-netif instance
+ * @param[in]    address index (unused)
+ *
+ * @return
+ *         - pointer to the internal ip6 address object
+ */
+const esp_ip6_addr_t *esp_slip_get_ip6(esp_netif_t *slip_netif);
+
+#ifdef __cplusplus
+}
+#endif
+#endif //_ESP_NETIF_SLIP_H_
diff --git a/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_sta_list.h b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_sta_list.h
new file mode 100644
index 00000000000..d464132ace8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_sta_list.h
@@ -0,0 +1,71 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_NETIF_STA_LIST_H_
+#define _ESP_NETIF_STA_LIST_H_
+
+#include "esp_netif_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief station list info element
+ */
+typedef struct {
+    uint8_t mac[6]; /**< Station MAC address */
+    esp_ip4_addr_t ip;  /**< Station assigned IP address */
+} esp_netif_sta_info_t;
+
+/**
+ * @brief station list structure
+ */
+typedef struct {
+    esp_netif_sta_info_t sta[ESP_WIFI_MAX_CONN_NUM]; /**< Connected stations */
+    int num; /**< Number of connected stations */
+} esp_netif_sta_list_t;
+
+/**
+ * @defgroup ESP_NETIF_STA_LIST ESP-NETIF STA list api
+ * @brief List of stations for Wi-Fi AP interface
+ *
+ */
+
+/** @addtogroup ESP_NETIF_STA_LIST
+ * @{
+ */
+
+/**
+ * @brief  Get IP information for stations connected to the Wi-Fi AP interface
+ *
+ * @param[in]   wifi_sta_list Wi-Fi station info list, returned from esp_wifi_ap_get_sta_list()
+ * @param[out]  netif_sta_list IP layer station info list, corresponding to MAC addresses provided in wifi_sta_list
+ *
+ * @return
+ *         - ESP_OK
+ *         - ESP_ERR_ESP_NETIF_NO_MEM
+ *         - ESP_ERR_ESP_NETIF_INVALID_PARAMS
+ */
+esp_err_t esp_netif_get_sta_list(const wifi_sta_list_t *wifi_sta_list, esp_netif_sta_list_t *netif_sta_list);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_NETIF_STA_LIST_H_
diff --git a/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_types.h b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_types.h
new file mode 100644
index 00000000000..cc7a37b9c49
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_netif/include/esp_netif_types.h
@@ -0,0 +1,229 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_NETIF_TYPES_H_
+#define _ESP_NETIF_TYPES_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_event_base.h"
+#include "esp_err.h"
+#include "esp_netif_ip_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Definition of ESP-NETIF based errors
+ */
+#define ESP_ERR_ESP_NETIF_BASE                  0x5000
+#define ESP_ERR_ESP_NETIF_INVALID_PARAMS        ESP_ERR_ESP_NETIF_BASE + 0x01
+#define ESP_ERR_ESP_NETIF_IF_NOT_READY          ESP_ERR_ESP_NETIF_BASE + 0x02
+#define ESP_ERR_ESP_NETIF_DHCPC_START_FAILED    ESP_ERR_ESP_NETIF_BASE + 0x03
+#define ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED  ESP_ERR_ESP_NETIF_BASE + 0x04
+#define ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED  ESP_ERR_ESP_NETIF_BASE + 0x05
+#define ESP_ERR_ESP_NETIF_NO_MEM                ESP_ERR_ESP_NETIF_BASE + 0x06
+#define ESP_ERR_ESP_NETIF_DHCP_NOT_STOPPED      ESP_ERR_ESP_NETIF_BASE + 0x07
+#define ESP_ERR_ESP_NETIF_DRIVER_ATTACH_FAILED   ESP_ERR_ESP_NETIF_BASE + 0x08
+#define ESP_ERR_ESP_NETIF_INIT_FAILED           ESP_ERR_ESP_NETIF_BASE + 0x09
+#define ESP_ERR_ESP_NETIF_DNS_NOT_CONFIGURED    ESP_ERR_ESP_NETIF_BASE + 0x0A
+#define ESP_ERR_ESP_NETIF_MLD6_FAILED           ESP_ERR_ESP_NETIF_BASE + 0x0B
+#define ESP_ERR_ESP_NETIF_IP6_ADDR_FAILED       ESP_ERR_ESP_NETIF_BASE + 0x0C
+
+
+/** @brief Type of esp_netif_object server */
+struct esp_netif_obj;
+
+typedef struct esp_netif_obj esp_netif_t;
+
+
+/** @brief Type of DNS server */
+typedef enum {
+    ESP_NETIF_DNS_MAIN= 0,       /**< DNS main server address*/
+    ESP_NETIF_DNS_BACKUP,        /**< DNS backup server address (Wi-Fi STA and Ethernet only) */
+    ESP_NETIF_DNS_FALLBACK,      /**< DNS fallback server address (Wi-Fi STA and Ethernet only) */
+    ESP_NETIF_DNS_MAX
+} esp_netif_dns_type_t;
+
+/** @brief DNS server info */
+typedef struct {
+    esp_ip_addr_t ip; /**< IPV4 address of DNS server */
+} esp_netif_dns_info_t;
+
+/** @brief Status of DHCP client or DHCP server */
+typedef enum {
+    ESP_NETIF_DHCP_INIT = 0,    /**< DHCP client/server is in initial state (not yet started) */
+    ESP_NETIF_DHCP_STARTED,     /**< DHCP client/server has been started */
+    ESP_NETIF_DHCP_STOPPED,     /**< DHCP client/server has been stopped */
+    ESP_NETIF_DHCP_STATUS_MAX
+} esp_netif_dhcp_status_t;
+
+
+/** @brief Mode for DHCP client or DHCP server option functions */
+typedef enum{
+    ESP_NETIF_OP_START = 0,
+    ESP_NETIF_OP_SET,           /**< Set option */
+    ESP_NETIF_OP_GET,           /**< Get option */
+    ESP_NETIF_OP_MAX
+} esp_netif_dhcp_option_mode_t;
+
+/** @brief Supported options for DHCP client or DHCP server */
+typedef enum{
+    ESP_NETIF_SUBNET_MASK                   = 1,    /**< Network mask */
+    ESP_NETIF_DOMAIN_NAME_SERVER            = 6,    /**< Domain name server */
+    ESP_NETIF_ROUTER_SOLICITATION_ADDRESS   = 32,   /**< Solicitation router address */
+    ESP_NETIF_REQUESTED_IP_ADDRESS          = 50,   /**< Request specific IP address */
+    ESP_NETIF_IP_ADDRESS_LEASE_TIME         = 51,   /**< Request IP address lease time */
+    ESP_NETIF_IP_REQUEST_RETRY_TIME         = 52,   /**< Request IP address retry counter */
+    ESP_NETIF_VENDOR_CLASS_IDENTIFIER       = 60,   /**< Vendor Class Identifier of a DHCP client */
+    ESP_NETIF_VENDOR_SPECIFIC_INFO          = 43,   /**< Vendor Specific Information of a DHCP server */
+} esp_netif_dhcp_option_id_t;
+
+/** IP event declarations */
+typedef enum {
+    IP_EVENT_STA_GOT_IP,               /*!< station got IP from connected AP */
+    IP_EVENT_STA_LOST_IP,              /*!< station lost IP and the IP is reset to 0 */
+    IP_EVENT_AP_STAIPASSIGNED,         /*!< soft-AP assign an IP to a connected station */
+    IP_EVENT_GOT_IP6,                  /*!< station or ap or ethernet interface v6IP addr is preferred */
+    IP_EVENT_ETH_GOT_IP,               /*!< ethernet got IP from connected AP */
+    IP_EVENT_ETH_LOST_IP,              /*!< ethernet lost IP and the IP is reset to 0 */
+    IP_EVENT_PPP_GOT_IP,               /*!< PPP interface got IP */
+    IP_EVENT_PPP_LOST_IP,              /*!< PPP interface lost IP */
+} ip_event_t;
+
+/** @brief IP event base declaration */
+ESP_EVENT_DECLARE_BASE(IP_EVENT);
+
+/** Event structure for IP_EVENT_STA_GOT_IP, IP_EVENT_ETH_GOT_IP events  */
+
+typedef struct {
+    esp_ip4_addr_t ip;      /**< Interface IPV4 address */
+    esp_ip4_addr_t netmask; /**< Interface IPV4 netmask */
+    esp_ip4_addr_t gw;      /**< Interface IPV4 gateway address */
+} esp_netif_ip_info_t;
+
+/** @brief IPV6 IP address information
+ */
+typedef struct {
+    esp_ip6_addr_t ip; /**< Interface IPV6 address */
+} esp_netif_ip6_info_t;
+
+typedef struct {
+    int if_index;                    /*!< Interface index for which the event is received (left for legacy compilation) */
+    esp_netif_t *esp_netif;          /*!< Pointer to corresponding esp-netif object */
+    esp_netif_ip_info_t ip_info;     /*!< IP address, netmask, gatway IP address */
+    bool ip_changed;                 /*!< Whether the assigned IP has changed or not */
+} ip_event_got_ip_t;
+
+/** Event structure for IP_EVENT_GOT_IP6 event */
+typedef struct {
+    int if_index;                    /*!< Interface index for which the event is received (left for legacy compilation) */
+    esp_netif_t *esp_netif;          /*!< Pointer to corresponding esp-netif object */
+    esp_netif_ip6_info_t ip6_info;   /*!< IPv6 address of the interface */
+    int ip_index;                    /*!< IPv6 address index */
+} ip_event_got_ip6_t;
+
+/** Event structure for ADD_IP6 event */
+typedef struct {
+    esp_ip6_addr_t addr;            /*!< The address to be added to the interface */
+    bool preferred;                 /*!< The default preference of the address */
+} ip_event_add_ip6_t;
+
+/** Event structure for IP_EVENT_AP_STAIPASSIGNED event */
+typedef struct {
+    esp_ip4_addr_t ip; /*!< IP address which was assigned to the station */
+} ip_event_ap_staipassigned_t;
+
+
+
+
+typedef enum esp_netif_flags {
+    ESP_NETIF_DHCP_CLIENT = 1 << 0,
+    ESP_NETIF_DHCP_SERVER = 1 << 1,
+    ESP_NETIF_FLAG_AUTOUP = 1 << 2,
+    ESP_NETIF_FLAG_GARP   = 1 << 3,
+    ESP_NETIF_FLAG_EVENT_IP_MODIFIED = 1 << 4,
+    ESP_NETIF_FLAG_IS_PPP = 1 << 5,
+    ESP_NETIF_FLAG_IS_SLIP = 1 << 6,
+} esp_netif_flags_t;
+
+typedef enum esp_netif_ip_event_type {
+    ESP_NETIF_IP_EVENT_GOT_IP = 1,
+    ESP_NETIF_IP_EVENT_LOST_IP = 2,
+} esp_netif_ip_event_type_t;
+
+
+//
+//    ESP-NETIF interface configuration:
+//      1) general (behavioral) config (esp_netif_config_t)
+//      2) (peripheral) driver specific config (esp_netif_driver_ifconfig_t)
+//      3) network stack specific config (esp_netif_net_stack_ifconfig_t) -- no publicly available
+//
+
+typedef struct esp_netif_inherent_config {
+    esp_netif_flags_t flags;         /*!< flags that define esp-netif behavior */
+    uint8_t mac[6];                  /*!< initial mac address for this interface */
+    const esp_netif_ip_info_t* ip_info;    /*!< initial ip address for this interface */
+    uint32_t get_ip_event;           /*!< event id to be raised when interface gets an IP */
+    uint32_t lost_ip_event;          /*!< event id to be raised when interface losts its IP */
+    const char * if_key;             /*!< string identifier of the interface */
+    const char * if_desc;            /*!< textual description of the interface */
+    int route_prio;                  /*!< numeric priority of this interface to become a default
+                                          routing if (if other netifs are up).
+                                          A higher value of route_prio indicates
+                                          a higher priority */
+} esp_netif_inherent_config_t;
+
+typedef struct esp_netif_config esp_netif_config_t;
+
+/**
+ * @brief  IO driver handle type
+ */
+typedef void * esp_netif_iodriver_handle;
+
+typedef struct esp_netif_driver_base_s {
+    esp_err_t (*post_attach)(esp_netif_t *netif, esp_netif_iodriver_handle h);
+    esp_netif_t *netif;
+} esp_netif_driver_base_t;
+
+/**
+ * @brief  Specific IO driver configuration
+ */
+struct esp_netif_driver_ifconfig {
+    esp_netif_iodriver_handle handle;
+    esp_err_t (*transmit)(void *h, void *buffer, size_t len);
+    esp_err_t (*transmit_wrap)(void *h, void *buffer, size_t len, void *netstack_buffer);
+    void (*driver_free_rx_buffer)(void *h, void* buffer);
+};
+
+typedef struct esp_netif_driver_ifconfig esp_netif_driver_ifconfig_t;
+
+/**
+ * @brief  Specific L3 network stack configuration
+ */
+
+typedef struct esp_netif_netstack_config esp_netif_netstack_config_t;
+
+/**
+ * @brief  Generic esp_netif configuration
+ */
+struct esp_netif_config {
+    const esp_netif_inherent_config_t *base;
+    const esp_netif_driver_ifconfig_t *driver;
+    const esp_netif_netstack_config_t *stack;
+};
+
+/**
+ * @brief  ESP-NETIF Receive function type
+ */
+typedef esp_err_t (*esp_netif_receive_t)(esp_netif_t *esp_netif, void *buffer, size_t len, void *eb);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_NETIF_TYPES_H_
diff --git a/tools/sdk/esp32s3/include/esp_phy/esp32s3/include/phy_init_data.h b/tools/sdk/esp32s3/include/esp_phy/esp32s3/include/phy_init_data.h
new file mode 100644
index 00000000000..88f56282d58
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_phy/esp32s3/include/phy_init_data.h
@@ -0,0 +1,182 @@
+/*
+ * SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef PHY_INIT_DATA_H
+#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */
+#include "esp_phy_init.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// constrain a value between 'low' and 'high', inclusive
+#define LIMIT(val, low, high) ((val < low) ? low : (val > high) ? high : val)
+
+#define PHY_INIT_MAGIC "PHYINIT"
+
+// define the lowest tx power as LOWEST_PHY_TX_POWER
+#define PHY_TX_POWER_LOWEST LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 52)
+#define PHY_TX_POWER_OFFSET 44
+#define PHY_TX_POWER_NUM    5
+
+#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
+#define PHY_CRC_ALGORITHM 1
+#define PHY_COUNTRY_CODE_LEN 2
+#define PHY_INIT_DATA_TYPE_OFFSET 126
+#define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125
+#endif
+
+static const char phy_init_magic_pre[] = PHY_INIT_MAGIC;
+
+/**
+ * @brief Structure containing default recommended PHY initialization parameters.
+ */
+static const esp_phy_init_data_t phy_init_data= { {
+        0x00,
+        0x00,
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x44),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4a),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x46),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x46),
+        LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x42),
+        0x00,
+        0x00,
+        0x00,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0x74
+} };
+
+static const char phy_init_magic_post[] = PHY_INIT_MAGIC;
+
+#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
+/**
+ * @brief PHY init data control infomation structure
+ */
+typedef struct {
+    uint8_t control_info_checksum[4];     /*!< 4-byte control infomation checksum */
+    uint8_t multiple_bin_checksum[4];     /*!< 4-byte multiple bin checksum */
+    uint8_t check_algorithm;              /*!< check algorithm */
+    uint8_t version;                      /*!< PHY init data bin version */
+    uint8_t number;                       /*!< PHY init data bin number */
+    uint8_t length[2];                    /*!< Length of each PHY init data bin */
+    uint8_t reserved[19];                 /*!< 19-byte reserved  */
+} __attribute__ ((packed)) phy_control_info_data_t;
+
+/**
+ * @brief Country corresponds to PHY init data type structure
+ */
+typedef struct {
+    char cc[PHY_COUNTRY_CODE_LEN];
+    uint8_t type;
+} phy_country_to_bin_type_t;
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PHY_INIT_DATA_H */
diff --git a/tools/sdk/esp32s3/include/esp_phy/include/esp_phy_init.h b/tools/sdk/esp32s3/include/esp_phy/include/esp_phy_init.h
new file mode 100644
index 00000000000..04068c7f38d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_phy/include/esp_phy_init.h
@@ -0,0 +1,232 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file PHY init parameters and API
+ */
+
+
+/**
+ * @brief Structure holding PHY init parameters
+ */
+typedef struct {
+	uint8_t params[128];                    /*!< opaque PHY initialization parameters */
+} esp_phy_init_data_t;
+
+/**
+ * @brief Opaque PHY calibration data
+ */
+typedef struct {
+    uint8_t version[4];                     /*!< PHY version */
+    uint8_t mac[6];                         /*!< The MAC address of the station */
+    uint8_t opaque[1894];                   /*!< calibration data */
+} esp_phy_calibration_data_t;
+
+typedef enum {
+    PHY_RF_CAL_PARTIAL = 0x00000000,        /*!< Do part of RF calibration. This should be used after power-on reset. */
+    PHY_RF_CAL_NONE    = 0x00000001,        /*!< Don't do any RF calibration. This mode is only suggested to be used after deep sleep reset. */
+    PHY_RF_CAL_FULL    = 0x00000002         /*!< Do full RF calibration. Produces best results, but also consumes a lot of time and current. Suggested to be used once. */
+} esp_phy_calibration_mode_t;
+
+#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
+/**
+ * @brief PHY init data type
+ */
+typedef enum {
+    ESP_PHY_INIT_DATA_TYPE_DEFAULT = 0,
+    ESP_PHY_INIT_DATA_TYPE_SRRC,
+    ESP_PHY_INIT_DATA_TYPE_FCC,
+    ESP_PHY_INIT_DATA_TYPE_CE,
+    ESP_PHY_INIT_DATA_TYPE_NCC,
+    ESP_PHY_INIT_DATA_TYPE_KCC,
+    ESP_PHY_INIT_DATA_TYPE_MIC,
+    ESP_PHY_INIT_DATA_TYPE_IC,
+    ESP_PHY_INIT_DATA_TYPE_ACMA,
+    ESP_PHY_INIT_DATA_TYPE_ANATEL,
+    ESP_PHY_INIT_DATA_TYPE_ISED,
+    ESP_PHY_INIT_DATA_TYPE_WPC,
+    ESP_PHY_INIT_DATA_TYPE_OFCA,
+    ESP_PHY_INIT_DATA_TYPE_IFETEL,
+    ESP_PHY_INIT_DATA_TYPE_RCM,
+    ESP_PHY_INIT_DATA_TYPE_NUMBER,
+} phy_init_data_type_t;
+#endif
+
+/**
+ * @brief Get PHY init data
+ *
+ * If "Use a partition to store PHY init data" option is set in menuconfig,
+ * This function will load PHY init data from a partition. Otherwise,
+ * PHY init data will be compiled into the application itself, and this function
+ * will return a pointer to PHY init data located in read-only memory (DROM).
+ *
+ * If "Use a partition to store PHY init data" option is enabled, this function
+ * may return NULL if the data loaded from flash is not valid.
+ *
+ * @note Call esp_phy_release_init_data to release the pointer obtained using
+ * this function after the call to esp_wifi_init.
+ *
+ * @return pointer to PHY init data structure
+ */
+const esp_phy_init_data_t* esp_phy_get_init_data(void);
+
+/**
+ * @brief Release PHY init data
+ * @param data  pointer to PHY init data structure obtained from
+ *              esp_phy_get_init_data function
+ */
+void esp_phy_release_init_data(const esp_phy_init_data_t* data);
+
+/**
+ * @brief Function called by esp_phy_init to load PHY calibration data
+ *
+ * This is a convenience function which can be used to load PHY calibration
+ * data from NVS. Data can be stored to NVS using esp_phy_store_cal_data_to_nvs
+ * function.
+ *
+ * If calibration data is not present in the NVS, or
+ * data is not valid (was obtained for a chip with a different MAC address,
+ * or obtained for a different version of software), this function will
+ * return an error.
+ *
+ * If "Initialize PHY in startup code" option is set in menuconfig, this
+ * function will be used to load calibration data. To provide a different
+ * mechanism for loading calibration data, disable
+ * "Initialize PHY in startup code" option in menuconfig and call esp_phy_init
+ * function from the application. For an example usage of esp_phy_init and
+ * this function, see esp_phy_store_cal_data_to_nvs function in cpu_start.c
+ *
+ * @param out_cal_data pointer to calibration data structure to be filled with
+ *                     loaded data.
+ * @return ESP_OK on success
+ */
+esp_err_t esp_phy_load_cal_data_from_nvs(esp_phy_calibration_data_t* out_cal_data);
+
+/**
+ * @brief Function called by esp_phy_init to store PHY calibration data
+ *
+ * This is a convenience function which can be used to store PHY calibration
+ * data to the NVS. Calibration data is returned by esp_phy_init function.
+ * Data saved using this function to the NVS can later be loaded using
+ * esp_phy_store_cal_data_to_nvs function.
+ *
+ * If "Initialize PHY in startup code" option is set in menuconfig, this
+ * function will be used to store calibration data. To provide a different
+ * mechanism for storing calibration data, disable
+ * "Initialize PHY in startup code" option in menuconfig and call esp_phy_init
+ * function from the application.
+ *
+ * @param cal_data pointer to calibration data which has to be saved.
+ * @return ESP_OK on success
+ */
+esp_err_t esp_phy_store_cal_data_to_nvs(const esp_phy_calibration_data_t* cal_data);
+
+/**
+ * @brief Erase PHY calibration data which is stored in the NVS
+ *
+ * This is a function which can be used to trigger full calibration as a last-resort remedy
+ * if partial calibration is used. It can be called in the application based on some conditions
+ * (e.g. an option provided in some diagnostic mode).
+ *
+ * @return ESP_OK on success
+ * @return others on fail. Please refer to NVS API return value error number.
+ */
+esp_err_t esp_phy_erase_cal_data_in_nvs(void);
+
+/**
+ * @brief Enable PHY and RF module
+ *
+ * PHY and RF module should be enabled in order to use WiFi or BT.
+ * Now PHY and RF enabling job is done automatically when start WiFi or BT. Users should not
+ * call this API in their application.
+ *
+ */
+void esp_phy_enable(void);
+
+/**
+ * @brief Disable PHY and RF module
+ *
+ * PHY module should be disabled in order to shutdown WiFi or BT.
+ * Now PHY and RF disabling job is done automatically when stop WiFi or BT. Users should not
+ * call this API in their application.
+ *
+ */
+void esp_phy_disable(void);
+
+/**
+ * @brief Load calibration data from NVS and initialize PHY and RF module
+ */
+void esp_phy_load_cal_and_init(void);
+
+#if CONFIG_MAC_BB_PD
+/**
+ * @brief Initialize backup memory for MAC and Baseband power up/down
+ */
+void esp_mac_bb_pd_mem_init(void);
+
+/**
+ * @brief Power up MAC and Baseband
+ */
+void esp_mac_bb_power_up(void);
+
+/**
+ * @brief Power down MAC and Baseband
+ */
+void esp_mac_bb_power_down(void);
+#endif
+
+/**
+ * @brief Enable WiFi/BT common clock
+ *
+ */
+void esp_phy_common_clock_enable(void);
+
+/**
+ * @brief Disable WiFi/BT common clock
+ *
+ */
+void esp_phy_common_clock_disable(void);
+
+/**
+ * @brief            Get the time stamp when PHY/RF was switched on
+ * @return           return 0 if PHY/RF is never switched on. Otherwise return time in
+ *                   microsecond since boot when phy/rf was last switched on
+*/
+int64_t esp_phy_rf_get_on_ts(void);
+
+/**
+ * @brief Update the corresponding PHY init type according to the country code of Wi-Fi.
+ */
+esp_err_t esp_phy_update_country_info(const char *country);
+
+
+#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
+/**
+ * @brief Apply PHY init bin to PHY
+ * @return ESP_OK on success.
+ * @return ESP_FAIL on fail.
+ */
+esp_err_t esp_phy_apply_phy_init_data(uint8_t *init_data);
+#endif
+
+/**
+ * @brief Get PHY lib version
+ * @return PHY lib version.
+ */
+char * get_phy_version_str(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_phy/include/phy.h b/tools/sdk/esp32s3/include/esp_phy/include/phy.h
new file mode 100644
index 00000000000..c8d1018288d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_phy/include/phy.h
@@ -0,0 +1,111 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_phy_init.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_CAL_DATA_CHECK_FAIL 1
+
+/**
+ * @file phy.h
+ * @brief Declarations for functions provided by libphy.a
+ */
+
+/**
+ * @brief Return ROM function pointer table from PHY library.
+ */
+void phy_get_romfunc_addr(void);
+
+/**
+ * @brief Initialize PHY module and do RF calibration
+ * @param[in] init_data Initialization parameters to be used by the PHY
+ * @param[inout] cal_data As input, calibration data previously obtained. As output, will contain new calibration data.
+ * @param[in] cal_mode  RF calibration mode
+ * @return ESP_CAL_DATA_CHECK_FAIL if calibration data checksum fails, other values are reserved for future use
+ */
+int register_chipv7_phy(const esp_phy_init_data_t* init_data, esp_phy_calibration_data_t *cal_data, esp_phy_calibration_mode_t cal_mode);
+
+/**
+ * @brief Get the format version of calibration data used by PHY library.
+ * @return Format version number, OR'ed with BIT(16) if PHY is in WIFI only mode.
+ */
+uint32_t phy_get_rf_cal_version(void);
+
+/**
+ * @brief Set RF/BB for only WIFI mode or coexist(WIFI & BT) mode
+ * @param[in] true is for only WIFI mode, false is for coexist mode. default is 0.
+ * @return NULL
+ */
+void phy_set_wifi_mode_only(bool wifi_only);
+
+/**
+ * @brief Set BT the highest priority in coexist mode.
+ * @return NULL
+ */
+void coex_bt_high_prio(void);
+
+/**
+ * @brief Open PHY and RF.
+ */
+void phy_wakeup_init(void);
+
+/**
+ * @brief Shutdown PHY and RF.
+ */
+void phy_close_rf(void);
+
+#if !CONFIG_IDF_TARGET_ESP32
+/**
+ * @brief Disable PHY temperature sensor.
+ */
+void phy_xpd_tsens(void);
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32C3
+/**
+ * @brief Update internal state of PHY when wifi deinit powers off the wifi power domain.
+ */
+void phy_init_flag(void);
+#endif
+
+/**
+ * @brief Store and load PHY digital registers.
+ *
+ * @param     backup_en  if backup_en is true, store PHY digital registers to memory. Otherwise load PHY digital registers from memory
+ * @param     mem_addr   Memory address to store and load PHY digital registers
+ *
+ * @return    memory size
+ */
+uint8_t phy_dig_reg_backup(bool backup_en, uint32_t *mem_addr);
+
+#if CONFIG_MAC_BB_PD
+/**
+ * @brief Store and load baseband registers.
+ */
+void phy_freq_mem_backup(bool backup_en, uint32_t *mem);
+#endif
+
+#if CONFIG_ESP_PHY_ENABLE_USB
+/**
+ * @brief Enable or disable USB when phy init.
+ */
+void phy_bbpll_en_usb(bool en);
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32S2
+/**
+ * @brief Phy version select for ESP32S2
+ */
+void phy_eco_version_sel(uint8_t chip_ver);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_pm/include/esp32/pm.h b/tools/sdk/esp32s3/include/esp_pm/include/esp32/pm.h
new file mode 100644
index 00000000000..8c3682cc7ec
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_pm/include/esp32/pm.h
@@ -0,0 +1,42 @@
+// Copyright 2016-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#include "soc/rtc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @brief Power management config for ESP32
+ *
+ * Pass a pointer to this structure as an argument to esp_pm_configure function.
+ */
+typedef struct {
+    int max_freq_mhz;   /*!< Maximum CPU frequency, in MHz */
+    int min_freq_mhz;   /*!< Minimum CPU frequency to use when no locks are taken, in MHz */
+    bool light_sleep_enable;        /*!< Enter light sleep when no locks are taken */
+} esp_pm_config_esp32_t;
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_pm/include/esp32c3/pm.h b/tools/sdk/esp32s3/include/esp_pm/include/esp32c3/pm.h
new file mode 100644
index 00000000000..7ceecd12c1f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_pm/include/esp32c3/pm.h
@@ -0,0 +1,42 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#include "soc/rtc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @brief Power management config for ESP32C3
+ *
+ * Pass a pointer to this structure as an argument to esp_pm_configure function.
+ */
+typedef struct {
+    int max_freq_mhz;   /*!< Maximum CPU frequency, in MHz */
+    int min_freq_mhz;   /*!< Minimum CPU frequency to use when no locks are taken, in MHz */
+    bool light_sleep_enable;        /*!< Enter light sleep when no locks are taken */
+} esp_pm_config_esp32c3_t;
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_pm/include/esp32h2/pm.h b/tools/sdk/esp32s3/include/esp_pm/include/esp32h2/pm.h
new file mode 100644
index 00000000000..ce09d8a2b63
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_pm/include/esp32h2/pm.h
@@ -0,0 +1,42 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#include "soc/rtc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @brief Power management config for ESP32H2
+ *
+ * Pass a pointer to this structure as an argument to esp_pm_configure function.
+ */
+typedef struct {
+    int max_freq_mhz;   /*!< Maximum CPU frequency, in MHz */
+    int min_freq_mhz;   /*!< Minimum CPU frequency to use when no locks are taken, in MHz */
+    bool light_sleep_enable;        /*!< Enter light sleep when no locks are taken */
+} esp_pm_config_esp32h2_t;
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_pm/include/esp32s2/pm.h b/tools/sdk/esp32s3/include/esp_pm/include/esp32s2/pm.h
new file mode 100644
index 00000000000..dac31e0c9c2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_pm/include/esp32s2/pm.h
@@ -0,0 +1,42 @@
+// Copyright 2016-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#include "soc/rtc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @brief Power management config for ESP32
+ *
+ * Pass a pointer to this structure as an argument to esp_pm_configure function.
+ */
+typedef struct {
+    int max_freq_mhz;   /*!< Maximum CPU frequency, in MHz */
+    int min_freq_mhz;   /*!< Minimum CPU frequency to use when no locks are taken, in MHz */
+    bool light_sleep_enable;        /*!< Enter light sleep when no locks are taken */
+} esp_pm_config_esp32s2_t;
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_pm/include/esp32s3/pm.h b/tools/sdk/esp32s3/include/esp_pm/include/esp32s3/pm.h
new file mode 100644
index 00000000000..0b29c66abad
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_pm/include/esp32s3/pm.h
@@ -0,0 +1,42 @@
+// Copyright 2016-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#include "soc/rtc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @brief Power management config for ESP32
+ *
+ * Pass a pointer to this structure as an argument to esp_pm_configure function.
+ */
+typedef struct {
+    int max_freq_mhz;   /*!< Maximum CPU frequency, in MHz */
+    int min_freq_mhz;   /*!< Minimum CPU frequency to use when no locks are taken, in MHz */
+    bool light_sleep_enable;        /*!< Enter light sleep when no locks are taken */
+} esp_pm_config_esp32s3_t;
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_pm/include/esp_pm.h b/tools/sdk/esp32s3/include/esp_pm/include/esp_pm.h
new file mode 100644
index 00000000000..5bd2bd1b112
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_pm/include/esp_pm.h
@@ -0,0 +1,194 @@
+// Copyright 2016-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "sdkconfig.h"
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/pm.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/pm.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/pm.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/pm.h"
+#elif CONFIG_IDF_TARGET_ESP32H2
+#include "esp32h2/pm.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Power management constraints
+ */
+typedef enum {
+    /**
+     * Require CPU frequency to be at the maximum value set via esp_pm_configure.
+     * Argument is unused and should be set to 0.
+     */
+    ESP_PM_CPU_FREQ_MAX,
+    /**
+     * Require APB frequency to be at the maximum value supported by the chip.
+     * Argument is unused and should be set to 0.
+     */
+    ESP_PM_APB_FREQ_MAX,
+    /**
+     * Prevent the system from going into light sleep.
+     * Argument is unused and should be set to 0.
+     */
+    ESP_PM_NO_LIGHT_SLEEP,
+} esp_pm_lock_type_t;
+
+/**
+ * @brief Set implementation-specific power management configuration
+ * @param config pointer to implementation-specific configuration structure (e.g. esp_pm_config_esp32)
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if the configuration values are not correct
+ *      - ESP_ERR_NOT_SUPPORTED if certain combination of values is not supported,
+ *        or if CONFIG_PM_ENABLE is not enabled in sdkconfig
+ */
+esp_err_t esp_pm_configure(const void* config);
+
+/**
+ * @brief Get implementation-specific power management configuration
+ * @param config pointer to implementation-specific configuration structure (e.g. esp_pm_config_esp32)
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if the pointer is null
+ */
+esp_err_t esp_pm_get_configuration(void* config);
+
+/**
+ * @brief Opaque handle to the power management lock
+ */
+typedef struct esp_pm_lock* esp_pm_lock_handle_t;
+
+
+/**
+ * @brief Initialize a lock handle for certain power management parameter
+ *
+ * When lock is created, initially it is not taken.
+ * Call esp_pm_lock_acquire to take the lock.
+ *
+ * This function must not be called from an ISR.
+ *
+ * @param lock_type Power management constraint which the lock should control
+ * @param arg argument, value depends on lock_type, see esp_pm_lock_type_t
+ * @param name arbitrary string identifying the lock (e.g. "wifi" or "spi").
+ *             Used by the esp_pm_dump_locks function to list existing locks.
+ *             May be set to NULL. If not set to NULL, must point to a string which is valid
+ *             for the lifetime of the lock.
+ * @param[out] out_handle  handle returned from this function. Use this handle when calling
+ *                         esp_pm_lock_delete, esp_pm_lock_acquire, esp_pm_lock_release.
+ *                         Must not be NULL.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NO_MEM if the lock structure can not be allocated
+ *      - ESP_ERR_INVALID_ARG if out_handle is NULL or type argument is not valid
+ *      - ESP_ERR_NOT_SUPPORTED if CONFIG_PM_ENABLE is not enabled in sdkconfig
+ */
+esp_err_t esp_pm_lock_create(esp_pm_lock_type_t lock_type, int arg,
+        const char* name, esp_pm_lock_handle_t* out_handle);
+
+/**
+ * @brief Take a power management lock
+ *
+ * Once the lock is taken, power management algorithm will not switch to the
+ * mode specified in a call to esp_pm_lock_create, or any of the lower power
+ * modes (higher numeric values of 'mode').
+ *
+ * The lock is recursive, in the sense that if esp_pm_lock_acquire is called
+ * a number of times, esp_pm_lock_release has to be called the same number of
+ * times in order to release the lock.
+ *
+ * This function may be called from an ISR.
+ *
+ * This function is not thread-safe w.r.t. calls to other esp_pm_lock_*
+ * functions for the same handle.
+ *
+ * @param handle handle obtained from esp_pm_lock_create function
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if the handle is invalid
+ *      - ESP_ERR_NOT_SUPPORTED if CONFIG_PM_ENABLE is not enabled in sdkconfig
+ */
+esp_err_t esp_pm_lock_acquire(esp_pm_lock_handle_t handle);
+
+/**
+ * @brief Release the lock taken using esp_pm_lock_acquire.
+ *
+ * Call to this functions removes power management restrictions placed when
+ * taking the lock.
+ *
+ * Locks are recursive, so if esp_pm_lock_acquire is called a number of times,
+ * esp_pm_lock_release has to be called the same number of times in order to
+ * actually release the lock.
+ *
+ * This function may be called from an ISR.
+ *
+ * This function is not thread-safe w.r.t. calls to other esp_pm_lock_*
+ * functions for the same handle.
+ *
+ * @param handle handle obtained from esp_pm_lock_create function
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if the handle is invalid
+ *      - ESP_ERR_INVALID_STATE if lock is not acquired
+ *      - ESP_ERR_NOT_SUPPORTED if CONFIG_PM_ENABLE is not enabled in sdkconfig
+ */
+esp_err_t esp_pm_lock_release(esp_pm_lock_handle_t handle);
+
+/**
+ * @brief Delete a lock created using esp_pm_lock
+ *
+ * The lock must be released before calling this function.
+ *
+ * This function must not be called from an ISR.
+ *
+ * @param handle handle obtained from esp_pm_lock_create function
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if the handle argument is NULL
+ *      - ESP_ERR_INVALID_STATE if the lock is still acquired
+ *      - ESP_ERR_NOT_SUPPORTED if CONFIG_PM_ENABLE is not enabled in sdkconfig
+ */
+esp_err_t esp_pm_lock_delete(esp_pm_lock_handle_t handle);
+
+/**
+ * Dump the list of all locks to stderr
+ *
+ * This function dumps debugging information about locks created using
+ * esp_pm_lock_create to an output stream.
+ *
+ * This function must not be called from an ISR. If esp_pm_lock_acquire/release
+ * are called while this function is running, inconsistent results may be
+ * reported.
+ *
+ * @param stream stream to print information to; use stdout or stderr to print
+ *               to the console; use fmemopen/open_memstream to print to a
+ *               string buffer.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_SUPPORTED if CONFIG_PM_ENABLE is not enabled in sdkconfig
+ */
+esp_err_t esp_pm_dump_locks(FILE* stream);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_pm/include/esp_private/pm_impl.h b/tools/sdk/esp32s3/include/esp_pm/include/esp_private/pm_impl.h
new file mode 100644
index 00000000000..e208d2bcf59
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_pm/include/esp_private/pm_impl.h
@@ -0,0 +1,217 @@
+// Copyright 2016-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/**
+ * @file esp_private/pm_impl.h
+ *
+ * This header file defines interface between PM lock functions (pm_locks.c)
+ * and the chip-specific power management (DFS/light sleep) implementation.
+ */
+
+#include "soc/rtc.h"
+#include "esp_pm.h"
+#include "esp_timer.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * This is an enum of possible power modes supported by the implementation
+ */
+typedef enum {
+    PM_MODE_LIGHT_SLEEP,//!< Light sleep
+    PM_MODE_APB_MIN,    //!< Idle (no CPU frequency or APB frequency locks)
+    PM_MODE_APB_MAX,    //!< Maximum APB frequency mode
+    PM_MODE_CPU_MAX,    //!< Maximum CPU frequency mode
+    PM_MODE_COUNT       //!< Number of items
+} pm_mode_t;
+
+/**
+ * @brief Get the mode corresponding to a certain lock
+ * @param type lock type
+ * @param arg argument value for this lock (passed to esp_pm_lock_create)
+ * @return lowest power consumption mode which meets the constraints of the lock
+ */
+pm_mode_t esp_pm_impl_get_mode(esp_pm_lock_type_t type, int arg);
+
+/**
+ * @brief Get CPU clock frequency by power mode
+ * @param mode power mode
+ * @return CPU clock frequency
+ */
+int esp_pm_impl_get_cpu_freq(pm_mode_t mode);
+
+/**
+ * If profiling is enabled, this data type will be used to store microsecond
+ * timestamps.
+ */
+typedef int64_t pm_time_t;
+
+/**
+ * See \ref esp_pm_impl_switch_mode
+ */
+typedef enum {
+    MODE_LOCK,
+    MODE_UNLOCK
+} pm_mode_switch_t;
+
+/**
+ * @brief Switch between power modes when lock is taken or released
+ * @param mode pm_mode_t corresponding to the lock being taken or released,
+ *             as returned by \ref esp_pm_impl_get_mode
+ * @param lock_or_unlock
+ *              - MODE_LOCK: lock was taken. Implementation needs to make sure
+ *                that the constraints of the lock are met by switching to the
+ *                given 'mode' or any of the higher power ones.
+ *              - MODE_UNLOCK: lock was released. If all the locks for given
+ *                mode are released, and no locks for higher power modes are
+ *                taken, implementation can switch to one of lower power modes.
+ * @param now timestamp when the lock was taken or released. Passed as
+ *            a minor optimization, so that the implementation does not need to
+ *            call pm_get_time again.
+ */
+void esp_pm_impl_switch_mode(pm_mode_t mode, pm_mode_switch_t lock_or_unlock, pm_time_t now);
+
+/**
+ * @brief Call once at startup to initialize pm implementation
+ */
+void esp_pm_impl_init(void);
+
+/**
+ * @brief Hook function for the idle task
+ * Must be called from the IDLE task on each CPU before entering waiti state.
+ */
+void esp_pm_impl_idle_hook(void);
+
+/**
+ * @brief Hook function for the interrupt dispatcher
+ * Must be called soon after entering the ISR
+ */
+void esp_pm_impl_isr_hook(void);
+
+/**
+ * @brief Dump the information about time spent in each of the pm modes.
+ *
+ * Prints three columns:
+ * mode name, total time in mode (in microseconds), percentage of time in mode
+ *
+ * @param out stream to dump the information to
+ */
+void esp_pm_impl_dump_stats(FILE* out);
+
+/**
+ * @brief Hook function implementing `waiti` instruction, should be invoked from idle task context
+ */
+void esp_pm_impl_waiti(void);
+
+/**
+ * @brief Callback function type for peripherals to skip light sleep.
+ *
+ */
+typedef bool (* skip_light_sleep_cb_t)(void);
+
+/**
+  * @brief  Register peripherals skip light sleep callback
+  *
+  * This function allows you to register a callback that gets the result
+  * that if light sleep should be skipped by peripherals.
+  * @param cb function to get the result
+  * @return
+  *   - ESP_OK on success
+  *   - ESP_ERR_NO_MEM if no more callback slots are available
+  */
+esp_err_t esp_pm_register_skip_light_sleep_callback(skip_light_sleep_cb_t cb);
+
+/**
+  * @brief  Unregisterperipherals skip light sleep callback
+  *
+  * This function allows you to unregister a callback which was previously
+  * registered using esp_register_skip_light_sleep_callback.
+  * @param cb function to get the result
+  * @return
+  *   - ESP_OK on success
+  *   - ESP_ERR_INVALID_STATE if the given callback hasn't been registered before
+  */
+esp_err_t esp_pm_unregister_skip_light_sleep_callback(skip_light_sleep_cb_t cb);
+
+/**
+ * @brief Callback function type for peripherals to know light sleep wakeup overhead.
+ *
+ */
+typedef void (* inform_out_light_sleep_overhead_cb_t)(uint32_t);
+
+/**
+  * @brief  Register informing peripherals light sleep wakeup overhead time callback
+  *
+  * This function allows you to register a callback that informs the peripherals of
+  * the wakeup overhead time of light sleep.
+  * @param cb function to inform time
+  * @return
+  *   - ESP_OK on success
+  *   - ESP_ERR_NO_MEM if no more callback slots are available
+  */
+esp_err_t esp_pm_register_inform_out_light_sleep_overhead_callback(inform_out_light_sleep_overhead_cb_t cb);
+
+/**
+  * @brief  Unregister informing peripherals light sleep wakeup overhead time callback
+  *
+  * This function allows you to unregister a callback that informs the peripherals of
+  * the wakeup overhead time of light sleep.
+  * @param cb function to inform time
+  * @return
+  *   - ESP_OK on success
+  *   - ESP_ERR_INVALID_STATE if the given callback hasn't been registered before
+  */
+esp_err_t esp_pm_unregister_inform_out_light_sleep_overhead_callback(inform_out_light_sleep_overhead_cb_t cb);
+
+/**
+ * @brief Callback function type for peripherals to know light sleep default parameters
+ */
+typedef void (* update_light_sleep_default_params_config_cb_t)(int, int);
+
+/**
+ * @brief  Register peripherals light sleep default parameters configure callback
+ *
+ * This function allows you to register a callback that configure the peripherals
+ * of default parameters of light sleep
+ * @param cb function to update default parameters
+ */
+void esp_pm_register_light_sleep_default_params_config_callback(update_light_sleep_default_params_config_cb_t cb);
+
+/**
+ * @brief  Unregister peripherals light sleep default parameters configure Callback
+ *
+ * This function allows you to unregister a callback that configure the peripherals
+ * of default parameters of light sleep
+ */
+void esp_pm_unregister_light_sleep_default_params_config_callback(void);
+
+#ifdef CONFIG_PM_PROFILING
+#define WITH_PROFILING
+#endif
+
+#ifdef WITH_PROFILING
+static inline pm_time_t IRAM_ATTR pm_get_time(void)
+{
+    return esp_timer_get_time();
+}
+#endif // WITH_PROFILING
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_pm/include/esp_private/pm_trace.h b/tools/sdk/esp32s3/include/esp_pm/include/esp_private/pm_trace.h
new file mode 100644
index 00000000000..e6cb7b92338
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_pm/include/esp_private/pm_trace.h
@@ -0,0 +1,53 @@
+// Copyright 2016-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ESP_PM_TRACE_IDLE,
+    ESP_PM_TRACE_TICK,
+    ESP_PM_TRACE_FREQ_SWITCH,
+    ESP_PM_TRACE_CCOMPARE_UPDATE,
+    ESP_PM_TRACE_ISR_HOOK,
+    ESP_PM_TRACE_SLEEP,
+    ESP_PM_TRACE_TYPE_MAX
+} esp_pm_trace_event_t;
+
+void esp_pm_trace_init(void);
+void esp_pm_trace_enter(esp_pm_trace_event_t event, int core_id);
+void esp_pm_trace_exit(esp_pm_trace_event_t event, int core_id);
+
+#ifdef CONFIG_PM_TRACE
+
+#define ESP_PM_TRACE_ENTER(event, core_id)   \
+            esp_pm_trace_enter(ESP_PM_TRACE_ ## event, core_id)
+#define ESP_PM_TRACE_EXIT(event, core_id)    \
+            esp_pm_trace_exit(ESP_PM_TRACE_ ## event, core_id)
+
+#else // CONFIG_PM_TRACE
+
+#define ESP_PM_TRACE_ENTER(type, core_id) do { (void) core_id; } while(0)
+#define ESP_PM_TRACE_EXIT(type, core_id)  do { (void) core_id; } while(0)
+
+#endif // CONFIG_PM_TRACE
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_console.h b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_console.h
new file mode 100644
index 00000000000..70c02ffeae0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_console.h
@@ -0,0 +1,52 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Initialize console
+ *
+ * Initializes serial console and adds basic commands.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failures.
+ */
+esp_err_t esp_rmaker_console_init(void);
+
+/* Reference for adding custom console commands:
+#include <esp_console.h>
+
+static int command_console_handler(int argc, char *argv[])
+{
+    // Command code here
+}
+
+static void register_console_command()
+{
+    const esp_console_cmd_t cmd = {
+        .command = "<command_name>",
+        .help = "<help_details>",
+        .func = &command_console_handler,
+    };
+    ESP_ERROR_CHECK(esp_console_cmd_register(&cmd));
+}
+*/
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_core.h b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_core.h
new file mode 100644
index 00000000000..9dbdbae658b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_core.h
@@ -0,0 +1,897 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_event.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define ESP_RMAKER_CONFIG_VERSION    "2020-03-20"
+
+/* Maximum length of the alert message that can be passed to esp_rmaker_raise_alert() */
+#define ESP_RMAKER_MAX_ALERT_LEN    100
+
+/** @cond **/
+/** ESP RainMaker Event Base */
+ESP_EVENT_DECLARE_BASE(RMAKER_EVENT);
+/** @endcond **/
+
+/** ESP RainMaker Events */
+typedef enum {
+    /** RainMaker Core Initialisation Done */
+    RMAKER_EVENT_INIT_DONE = 1,
+    /** Self Claiming Started */
+    RMAKER_EVENT_CLAIM_STARTED,
+    /** Self Claiming was Successful */
+    RMAKER_EVENT_CLAIM_SUCCESSFUL,
+    /** Self Claiming Failed */
+    RMAKER_EVENT_CLAIM_FAILED,
+    /** Node side communication for User-Node mapping done.
+     * Actual mapping state will be managed by the ESP RainMaker cloud based on the user side communication.
+     * Associated data is the NULL terminated user id.
+     */
+    RMAKER_EVENT_USER_NODE_MAPPING_DONE,
+    /** Local control started. Associated data is the NULL terminated Service Name */
+    RMAKER_EVENT_LOCAL_CTRL_STARTED,
+    /* User reset request successfully sent to ESP RainMaker Cloud */
+    RMAKER_EVENT_USER_NODE_MAPPING_RESET,
+} esp_rmaker_event_t;
+
+/** ESP RainMaker Node information */
+typedef struct {
+    /** Name of the Node */
+    char *name;
+    /** Type of the Node */
+    char *type;
+    /** Firmware Version (Optional). If not set, PROJECT_VER is used as default (recommended)*/
+    char *fw_version;
+    /** Model (Optional). If not set, PROJECT_NAME is used as default (recommended)*/
+    char *model;
+} esp_rmaker_node_info_t;
+
+/** ESP RainMaker Configuration */
+typedef struct {
+    /** Enable Time Sync
+     * Setting this true will enable SNTP and fetch the current time before
+     * attempting to connect to the ESP RainMaker service
+     */
+    bool enable_time_sync;
+} esp_rmaker_config_t;
+
+/** ESP RainMaker Parameter Value type */
+typedef enum {
+    /** Invalid */
+    RMAKER_VAL_TYPE_INVALID = 0,
+    /** Boolean */
+    RMAKER_VAL_TYPE_BOOLEAN,
+    /** Integer. Mapped to a 32 bit signed integer */
+    RMAKER_VAL_TYPE_INTEGER,
+    /** Floating point number */
+    RMAKER_VAL_TYPE_FLOAT,
+    /** NULL terminated string */
+    RMAKER_VAL_TYPE_STRING,
+    /** NULL terminated JSON Object string Eg. {"name":"value"} */
+    RMAKER_VAL_TYPE_OBJECT,
+    /** NULL terminated JSON Array string Eg. [1,2,3] */
+    RMAKER_VAL_TYPE_ARRAY,
+} esp_rmaker_val_type_t;
+
+/** ESP RainMaker Value */
+typedef union {
+    /** Boolean */
+    bool b;
+    /** Integer */
+    int i;
+    /** Float */
+    float f;
+    /** NULL terminated string */
+    char *s;
+} esp_rmaker_val_t;
+
+/** ESP RainMaker Parameter Value */
+typedef struct {
+    /** Type of Value */
+    esp_rmaker_val_type_t type;
+    /** Actual value. Depends on the type */
+    esp_rmaker_val_t val;
+} esp_rmaker_param_val_t;
+
+/** Param property flags */
+typedef enum {
+    PROP_FLAG_WRITE = (1 << 0),
+    PROP_FLAG_READ = (1 << 1),
+    PROP_FLAG_TIME_SERIES = (1 << 2),
+    PROP_FLAG_PERSIST = (1 << 3)
+} esp_param_property_flags_t;
+
+/** System Service Reboot Flag */
+#define SYSTEM_SERV_FLAG_REBOOT         (1 << 0)
+
+/** System Service Factory Reset Flag */
+#define SYSTEM_SERV_FLAG_FACTORY_RESET  (1 << 1)
+
+/** System Service Wi-Fi Reset Flag */
+#define SYSTEM_SERV_FLAG_WIFI_RESET     (1 << 2)
+
+/** System Service All Flags */
+#define SYSTEM_SERV_FLAGS_ALL   (SYSTEM_SERV_FLAG_REBOOT | SYSTEM_SERV_FLAG_FACTORY_RESET | SYSTEM_SERV_FLAG_WIFI_RESET)
+
+/** Generic ESP RainMaker handle */
+typedef size_t esp_rmaker_handle_t;
+
+/**  ESP RainMaker Node Handle */
+typedef esp_rmaker_handle_t esp_rmaker_node_t;
+
+/**  ESP RainMaker Device Handle */
+typedef esp_rmaker_handle_t esp_rmaker_device_t;
+
+/** ESP RainMaker Parameter Handle */
+typedef esp_rmaker_handle_t esp_rmaker_param_t;
+
+/** Parameter read/write request source */
+typedef enum {
+    /** Request triggered in the init sequence i.e. when a value is found
+     * in persistent memory for parameters with PROP_FLAG_PERSIST.
+     */
+    ESP_RMAKER_REQ_SRC_INIT,
+    /** Request received from cloud */
+    ESP_RMAKER_REQ_SRC_CLOUD,
+    /** Request received when a schedule has triggered */
+    ESP_RMAKER_REQ_SRC_SCHEDULE,
+    /** Request received when a scene has been activated */
+    ESP_RMAKER_REQ_SRC_SCENE_ACTIVATE,
+    /** Request received when a scene has been deactivated */
+    ESP_RMAKER_REQ_SRC_SCENE_DEACTIVATE,
+    /** Request received from a local controller */
+    ESP_RMAKER_REQ_SRC_LOCAL,
+    /** This will always be the last value. Any value equal to or
+     * greater than this should be considered invalid.
+     */
+    ESP_RMAKER_REQ_SRC_MAX,
+} esp_rmaker_req_src_t;
+
+/** Write request Context */
+typedef struct {
+    /** Source of request */
+    esp_rmaker_req_src_t src;
+} esp_rmaker_write_ctx_t;
+
+/** Read request context */
+typedef struct {
+    /** Source of request */
+    esp_rmaker_req_src_t src;
+} esp_rmaker_read_ctx_t;
+
+/** System service configuration */
+typedef struct {
+    /** Logical OR of system service flags (SYSTEM_SERV_FLAG_REBOOT,
+     * SYSTEM_SERV_FLAG_FACTORY_RESET, SYSTEM_SERV_FLAG_WIFI_RESET) as required
+     * or SYSTEM_SERV_FLAGS_ALL.
+     */
+    uint16_t flags;
+    /** Time in seconds after which the device should reboot.
+     * Value of zero would trigger an immediate reboot if a write is received for
+     * the Reboot parameter.
+     * Recommended value: 2
+     */
+    int8_t reboot_seconds;
+    /** Time in seconds after which the device should reset (Wi-Fi or factory).
+     * Value of zero would trigger an immediate action if a write is received for
+     * the Wi-Fi reset or Factory reset parameter.
+     * Recommended value: 2
+     */
+    int8_t reset_seconds;
+    /** Time in seconds after which the device should reboot after it has been reset.
+     * Value of zero would mean that there won't be any reboot after the reset.
+     * Recommended value: 2
+     */
+    int8_t reset_reboot_seconds;
+} esp_rmaker_system_serv_config_t;
+
+/** Callback for parameter value write requests.
+ *
+ * The callback should call the esp_rmaker_param_update_and_report() API if the new value is to be set
+ * and reported back.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ * @param[in] param Pointer to \ref esp_rmaker_param_val_t. Use appropriate elements as per the value type.
+ * @param[in] priv_data Pointer to the private data paassed while creating the device.
+ * @param[in] ctx Context associated with the request.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+typedef esp_err_t (*esp_rmaker_device_write_cb_t)(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param,
+        const esp_rmaker_param_val_t val, void *priv_data, esp_rmaker_write_ctx_t *ctx);
+
+/** Callback for parameter value changes
+ *
+ * The callback should call the esp_rmaker_param_update_and_report() API if the new value is to be set
+ * and reported back.
+ *
+ * @note Currently, the read callback never gets invoked as the communication between clients (mobile phones, CLI, etc.)
+ * and node is asynchronous. So, the read request does not reach the node. This callback will however be used in future.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ * @param[in] priv_data Pointer to the private data passed while creating the device.
+ * @param[in] ctx Context associated with the request.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+typedef esp_err_t (*esp_rmaker_device_read_cb_t)(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param,
+        void *priv_data, esp_rmaker_read_ctx_t *ctx);
+
+/** Convert device callback source to string
+ *
+ * Device read/write callback can be via different sources. This is a helper API
+ * to give the source in string format for printing.
+ *
+ * Example Usage:
+ * @code{c}
+ * static esp_err_t write_cb(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param,
+ * const esp_rmaker_param_val_t val, void *priv_data, esp_rmaker_write_ctx_t *ctx)
+{
+    if (ctx) {
+        ESP_LOGI(TAG, "Received write request via : %s", esp_rmaker_device_cb_src_to_str(ctx->src));
+    }
+ * @endcode
+ *
+ * @param[in] src The src field as received in the callback context.
+ *
+ * @return NULL terminated source string on success
+ * @return NULL on failure
+ */
+const char *esp_rmaker_device_cb_src_to_str(esp_rmaker_req_src_t src);
+
+/**
+ * Initialise a Boolean value
+ *
+ * @param[in] bval Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_bool(bool bval);
+
+/**
+ * Initialise an Integer value
+ *
+ * @param[in] ival Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_int(int ival);
+
+/**
+ * Initialise a Float value
+ *
+ * @param[in] fval Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_float(float fval);
+
+/**
+ * Initialise a String value
+ *
+ * @param[in] sval Initialising value.
+ *
+ * @return Value structure.
+ */
+esp_rmaker_param_val_t esp_rmaker_str(const char *sval);
+
+/**
+ * Initialise a json object value
+ *
+ * @note the object will not be validated internally. it is the application's
+ * responsibility to ensure that the object is a valid json object.
+ * eg. esp_rmaker_obj("{\"name\":\"value\"}");
+ *
+ * param[in] val initialising value
+ *
+ * return value structure
+ */
+esp_rmaker_param_val_t esp_rmaker_obj(const char *val);
+
+/**
+ * Initialise a json array value
+ *
+ * @note the array will not be validated internally. it is the application's
+ * responsibility to ensure that the array is a valid json array.
+ * eg. esp_rmaker_array("[1,2,3]");
+ *
+ * param[in] val initialising value
+ *
+ * return value structure
+ */
+esp_rmaker_param_val_t esp_rmaker_array(const char *val);
+
+
+/** Initialize ESP RainMaker Node
+ *
+ * This initializes the ESP RainMaker agent and creates the node.
+ * The model and firmware version for the node are set internally as per
+ * the project name and version. These can be overridden (but not recommended) using the
+ * esp_rmaker_node_add_fw_version() and esp_rmaker_node_add_model() APIs.
+ *
+ * @note This should be the first call before using any other ESP RainMaker API.
+ *
+ * @param[in] config Configuration to be used by the ESP RainMaker.
+ * @param[in] name Name of the node.
+ * @param[in] type Type of the node.
+ *
+ * @return Node handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_node_t *esp_rmaker_node_init(const esp_rmaker_config_t *config, const char *name, const char *type);
+
+/** Start ESP RainMaker Agent
+ *
+ * This call starts the actual ESP RainMaker thread. This should preferably be called after a
+ * successful Wi-Fi connection in order to avoid unnecessary failures.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_start(void);
+
+/** Stop ESP RainMaker Agent
+ *
+ * This call stops the ESP RainMaker Agent instance started earlier by esp_rmaker_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_stop(void);
+
+/** Deinitialize ESP RainMaker Node
+ *
+ * This API deinitializes the ESP RainMaker agent and the node created using esp_rmaker_node_init().
+ *
+ * @note This should be called after rainmaker has stopped.
+ *
+ * @param[in] node Node Handle returned by esp_rmaker_node_init().
+ *
+ * @retur ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_deinit(const esp_rmaker_node_t *node);
+
+/** Get a handle to the Node
+ *
+ * This API returns handle to a node created using esp_rmaker_node_init().
+ *
+ * @return Node handle on success.
+ * @return NULL in case of failure.
+ */
+const esp_rmaker_node_t *esp_rmaker_get_node(void);
+
+/** Get Node Id
+ *
+ * Returns pointer to the NULL terminated Node ID string.
+ *
+ * @return Pointer to a NULL terminated Node ID string.
+ */
+char *esp_rmaker_get_node_id(void);
+
+/** Get Node Info
+ *
+ * Returns pointer to the node info as configured during initialisation.
+ *
+ * @param node Node handle.
+ *
+ * @return Pointer to the node info on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_node_info_t *esp_rmaker_node_get_info(const esp_rmaker_node_t *node);
+
+/** Add Node attribute
+ *
+ * Adds a new attribute as the metadata for the node. For the sake of simplicity,
+ * only string values are allowed.
+ *
+ * @param node Node handle.
+ * @param[in] attr_name Name of the attribute.
+ * @param[in] val Value for the attribute.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_attribute(const esp_rmaker_node_t *node, const char *attr_name, const char *val);
+
+/** Add FW version for a node (Not recommended)
+ *
+ * FW version is set internally to the project version. This API can be used to
+ * override that version.
+ *
+ * @param node Node handle.
+ * @param[in] fw_version New firmware version.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_fw_version(const esp_rmaker_node_t *node, const char *fw_version);
+
+/** Add model for a node (Not recommended)
+ *
+ * Model is set internally to the project name. This API can be used to
+ * override that name.
+ *
+ * @param node Node handle.
+ * @param[in] model New model string.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_model(const esp_rmaker_node_t *node, const char *model);
+
+/**
+ * Create a Device
+ *
+ * This API will create a virtual "Device".
+ * This could be something like a Switch, Lightbulb, etc.
+ *
+ * @note The device created needs to be added to a node using esp_rmaker_node_add_device().
+ *
+ * @param[in] dev_name The unique device name.
+ * @param[in] type Optional device type. Can be kept NULL.
+ * @param[in] priv_data (Optional) Private data associated with the device. This will be passed to callbacks.
+ * It should stay allocated throughout the lifetime of the device.
+ *
+ * @return Device handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_device_create(const char *dev_name, const char *type, void *priv_data);
+
+/**
+ * Create a Service
+ *
+ * This API will create a "Service". It is exactly same like a device in terms of structure and so, all
+ * APIs for device are also valid for a service.
+ * A service could be something like OTA, diagnostics, etc.
+ *
+ * @note Name of a service should not clash with name of a device.
+ * @note The service created needs to be added to a node using esp_rmaker_node_add_device().
+ *
+ * @param[in] serv_name The unique service name.
+ * @param[in] type Optional service type. Can be kept NULL.
+ * @param[in] priv_data (Optional) Private data associated with the service. This will be passed to callbacks.
+ * It should stay allocated throughout the lifetime of the device.
+ *
+ * @return Device handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_service_create(const char *serv_name, const char *type, void *priv_data);
+
+/**
+ * Delete a Device/Service
+ *
+ * This API will delete a device created using esp_rmaker_device_create().
+ *
+ * @note The device should first be removed from the node using esp_rmaker_node_remove_device() before deleting.
+ *
+ * @param[in] device Device handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_delete(const esp_rmaker_device_t *device);
+
+/**
+ * Add callbacks for a device/service
+ *
+ * Add read/write callbacks for a device that will be invoked as per requests received from the cloud (or other paths
+ * as may be added in future).
+ *
+ * @param[in] device Device handle.
+ * @param[in] write_cb Write callback.
+ * @param[in] read_cb Read callback.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_cb(const esp_rmaker_device_t *device, esp_rmaker_device_write_cb_t write_cb, esp_rmaker_device_read_cb_t read_cb);
+
+/**
+ * Add a device to a node
+ *
+ * @param[in] node Node handle.
+ * @param[in] device Device handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_add_device(const esp_rmaker_node_t *node, const esp_rmaker_device_t *device);
+
+/**
+ * Remove a device from a node
+ *
+ * @param[in] node Node handle.
+ * @param[in] device Device handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_node_remove_device(const esp_rmaker_node_t *node, const esp_rmaker_device_t *device);
+
+/** Get device by name
+ *
+ * Get handle for a device based on the name.
+ *
+ * @param[in] node Node handle.
+ * @param[in] device_name Device name to search.
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_device_t *esp_rmaker_node_get_device_by_name(const esp_rmaker_node_t *node, const char *device_name);
+
+/** Add a Device attribute
+ *
+ * @note Device attributes are reported only once after a boot-up as part of the node
+ * configuration.
+ * Eg. Serial Number
+ *
+ * @param[in] device Device handle.
+ * @param[in] attr_name Name of the attribute.
+ * @param[in] val Value of the attribute.
+ *
+ * @return ESP_OK if the attribute was added successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_attribute(const esp_rmaker_device_t *device, const char *attr_name, const char *val);
+
+/** Add a Device subtype
+ *
+ * This can be something like esp.subtype.rgb-light for a device of type esp.device.lightbulb.
+ * This would primarily be used by the phone apps to render different icons for the same device type.
+ *
+ * @param[in] device Device handle.
+ * @param[in] subtype String describing the sub type.
+ *
+ * @return ESP_OK if the subtype was added successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_subtype(const esp_rmaker_device_t *device, const char *subtype);
+
+/** Get device name from handle
+ *
+ * @param[in] device Device handle.
+ *
+ * @return NULL terminated device name string on success.
+ * @return NULL in case of failure.
+ */
+char *esp_rmaker_device_get_name(const esp_rmaker_device_t *device);
+
+/** Get device type from handle
+ *
+ * @param[in] device Device handle.
+ *
+ * @return NULL terminated device type string on success.
+ * @return NULL in case of failure, or if the type wasn't provided while creating the device.
+ */
+char *esp_rmaker_device_get_type(const esp_rmaker_device_t *device);
+
+/**
+ * Add a parameter to a device/service
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_add_param(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param);
+
+
+/** Get parameter by type
+ *
+ * Get handle for a parameter based on the type.
+ *
+ * @note If there are multiple parameters with the same type, this will return the first one. The API
+ * esp_rmaker_device_get_param_by_name() can be used to get a specific parameter, because the parameter
+ * names in a device are unique.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param_type Parameter type to search.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_t *esp_rmaker_device_get_param_by_type(const esp_rmaker_device_t *device, const char *param_type);
+
+/** Get parameter by name
+ *
+ * Get handle for a parameter based on the name.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param_name Parameter name to search.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_t *esp_rmaker_device_get_param_by_name(const esp_rmaker_device_t *device, const char *param_name);
+
+/** Assign a primary parameter
+ *
+ * Assign a parameter (already added using esp_rmaker_device_add_param()) as a primary parameter,
+ * which can be used by clients (phone apps specifically) to give prominence to it.
+ *
+ * @param[in] device Device handle.
+ * @param[in] param Parameter handle.
+ *
+ * @return ESP_OK if the parameter was assigned as the primary successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_device_assign_primary_param(const esp_rmaker_device_t *device, const esp_rmaker_param_t *param);
+
+/**
+ * Create a Parameter
+ *
+ * Parameter can be something like Temperature, Outlet state, Lightbulb brightness, etc.
+ *
+ * Any changes should be reported using the esp_rmaker_param_update_and_report() API.
+ * Any remote changes will be reported to the application via the device callback, if registered.
+ *
+ * @note The parameter created needs to be added to a device using esp_rmaker_device_add_param().
+ * Parameter name should be unique in a given device.
+ *
+ * @param[in] param_name Name of the parameter.
+ a* @param[in] type Optional parameter type. Can be kept NULL.
+ * @param[in] val Value of the parameter. This also specifies the type that will be assigned
+ * to this parameter. You can use esp_rmaker_bool(), esp_rmaker_int(), esp_rmaker_float()
+ * or esp_rmaker_str() functions as the argument here. Eg, esp_rmaker_bool(true).
+ * @param[in] properties Properties of the parameter, which will be a logical OR of flags in
+ *  \ref esp_param_property_flags_t.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_t *esp_rmaker_param_create(const char *param_name, const char *type,
+        esp_rmaker_param_val_t val, uint8_t properties);
+
+/**
+ * Add a UI Type to a parameter
+ *
+ * This will be used by the Phone apps (or other clients) to render appropriate UI for the given
+ * parameter. Please refer the RainMaker documetation for supported UI Types.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] ui_type String describing the UI Type.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_ui_type(const esp_rmaker_param_t *param, const char *ui_type);
+
+/**
+ * Add bounds for an integer/float parameter
+ *
+ * This can be used to add bounds (min/max values) for a given integer parameter. Eg. brightness
+ * will have bounds as 0 and 100 if it is a percentage.
+ * Eg. esp_rmaker_param_add_bounds(brightness_param, esp_rmaker_int(0), esp_rmaker_int(100), esp_rmaker_int(5));
+ *
+ * @note The RainMaker core does not check the bounds. It is upto the application to handle it.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] min Minimum allowed value.
+ * @param[in] max Maximum allowed value.
+ * @param[in] step Minimum stepping (set to 0 if no specific value is desired).
+ *
+ * @return ESP_OK on success.
+ * return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_bounds(const esp_rmaker_param_t *param,
+    esp_rmaker_param_val_t min, esp_rmaker_param_val_t max, esp_rmaker_param_val_t step);
+
+/**
+ * Add a list of valid strings for a string parameter
+ *
+ * This can be used to add a list of valid strings for a given string parameter.
+ *
+ * Eg.
+ * static const char *valid_strs[] = {"None","Yes","No","Can't Say"};
+ * esp_rmaker_param_add_valid_str_list(param, valid_strs, 4);
+ *
+ * @note The RainMaker core does not check the values. It is upto the application to handle it.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] strs Pointer to an array of strings. Note that this memory should stay allocated
+ * throughout the lifetime of this parameter.
+ * @param[in] count Number of strings in the above array.
+ *
+ * @return ESP_OK on success.
+ * return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_valid_str_list(const esp_rmaker_param_t *param, const char *strs[], uint8_t count);
+
+/** Add max count for an array parameter
+ *
+ * This can be used to put a limit on the maximum number of elements in an array.
+ *
+ * @note The RainMaker core does not check the values. It is upto the application to handle it.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] count Max number of elements allowed in the array.
+ *
+ * @return ESP_OK on success.
+ * return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_add_array_max_count(const esp_rmaker_param_t *param, int count);
+
+
+/* Update a parameter
+ *
+ * This will just update the value of a parameter with esp rainmaker core, without actually reporting
+ * it. This can be used when multiple parameters need to be reported together.
+ * Eg. If x parameters are to be reported, this API can be used for the first x -1 parameters
+ * and the last one can be updated using esp_rmaker_param_update_and_report().
+ * This will report all parameters which were updated prior to this call.
+ *
+ * Sample:
+ *
+ * esp_rmaker_param_update(param1, esp_rmaker_float(10.2));
+ * esp_rmaker_param_update(param2, esp_rmaker_int(55));
+ * esp_rmaker_param_update(param3, esp_rmaker_int(95));
+ * esp_rmaker_param_update_and_report(param1, esp_rmaker_bool(true));
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] val New value of the parameter.
+ *
+ * @return ESP_OK if the parameter was updated successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_update(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
+
+/** Update and report a parameter
+ *
+ * Calling this API will update the parameter and report it to ESP RainMaker cloud.
+ * This should be used whenever there is any local change.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] val New value of the parameter.
+ *
+ * @return ESP_OK if the parameter was updated successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_update_and_report(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
+
+/** Update and notify a parameter
+ *
+ * Calling this API will update the parameter and report it to ESP RainMaker cloud similar to
+ * esp_rmaker_param_update_and_report(). However, additionally, it will also trigger a notification
+ * on the phone apps (if enabled).
+ *
+ * @note This should be used only when some local change requires explicit notification even when the
+ * phone app is in background, not otherwise.
+ * Eg. Alarm got triggered, temperature exceeded some threshold, etc.
+ *
+ * Alternatively, the esp_rmaker_raise_alert() API can also be used to trigger notification
+ * on the phone apps with pre-formatted text.
+ *
+ * @param[in] param Parameter handle.
+ * @param[in] val New value of the parameter.
+ *
+ * @return ESP_OK if the parameter was updated successfully.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_param_update_and_notify(const esp_rmaker_param_t *param, esp_rmaker_param_val_t val);
+
+/** Trigger an alert on the phone app
+ *
+ * This API will trigger a notification alert on the phone apps (if enabled) using the formatted text
+ * provided. Note that this does not send a notification directly to the phone, but reports the alert
+ * to the ESP RainMaker cloud which then uses the Notification framework to send notifications to the
+ * phone apps. The value does not get stored anywhere, nor is it linked to any node parameters.
+ *
+ * @note This should be used only if some event requires explicitly alerting the user even when the
+ * phone app is in background, not otherwise.
+ * Eg. "Motion Detected", "Fire alarm triggered"
+ *
+ * @param[in] alert_str NULL terminated pre-formatted alert string.
+ *     Maximum length can be ESP_RMAKER_MAX_ALERT_LEN, excluding NULL character.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_raise_alert(const char *alert_str);
+
+/** Get parameter name from handle
+ *
+ * @param[in] param Parameter handle.
+ *
+ * @return NULL terminated parameter name string on success.
+ * @return NULL in case of failure.
+ */
+char *esp_rmaker_param_get_name(const esp_rmaker_param_t *param);
+
+/** Get parameter type from handle
+ *
+ * @param[in] param Parameter handle.
+ *
+ * @return NULL terminated parameter type string on success.
+ * @return NULL in case of failure, or if the type wasn't provided while creating the parameter.
+ */
+char *esp_rmaker_param_get_type(const esp_rmaker_param_t *param);
+
+/** Get parameter value
+ *
+ * This gives the parameter value that is stored in the RainMaker core.
+ *
+ * @note This does not call any explicit functions to read value from hardware/driver.
+ *
+ * @param[in] param Parameter handle
+ *
+ * @return Pointer to parameter value on success.
+ * @return NULL in case of failure.
+ */
+esp_rmaker_param_val_t *esp_rmaker_param_get_val(esp_rmaker_param_t *param);
+
+/** Report the node details to the cloud
+ *
+ * This API reports node details i.e. the node configuration and values of all the parameters to the ESP RainMaker cloud.
+ * Eg. If a new device is created (with some parameters and attributes), then this API should be called after that
+ * to send the node details to the cloud again and the changes to be reflected in the clients (like phone apps).
+ *
+ * @note Please use this API only if you need to create or delete devices after esp_rmaker_start() has already
+ * been called, for use cases like bridges or hubs.
+ *
+ * @return ESP_OK if the node details are successfully queued to be published.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_report_node_details(void);
+
+/** Enable Timezone Service
+ *
+ * This enables the ESP RainMaker standard timezone service which can be used to set
+ * timezone, either in POSIX or location string format. Please refer the specifications
+ * for additional details.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_timezone_service_enable(void);
+
+/** Enable System Service
+ *
+ * This enables the ESP RainMaker standard system service which can be
+ * used for operations like reboot, factory reset and Wi-Fi reset.
+ *
+ * Please refer the specifications for additional details.
+ *
+ * @param[in] config Configuration for the system service.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_system_service_enable(esp_rmaker_system_serv_config_t *config);
+
+/**
+ * Check if local_ctrl service has started
+ *
+ * @return true if service has started
+ * @return false if the service has not started
+ */
+bool esp_rmaker_local_ctrl_service_started(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_mqtt.h b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_mqtt.h
new file mode 100644
index 00000000000..1cc6cd5156e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_mqtt.h
@@ -0,0 +1,90 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_rmaker_mqtt_glue.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+esp_rmaker_mqtt_conn_params_t *esp_rmaker_mqtt_get_conn_params(void);
+   
+/** Initialize ESP RainMaker MQTT
+ *
+ * @param[in] config The MQTT configuration data
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_init(esp_rmaker_mqtt_conn_params_t *conn_params);
+
+/** MQTT Connect
+ *
+ * Starts the connection attempts to the MQTT broker as per the configuration
+ * provided during initializing.
+ * This should ideally be called after successful network connection.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_connect(void);
+
+/** MQTT Disconnect
+ *
+ * Disconnects from the MQTT broker.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_disconnect(void);
+
+/** Publish MQTT Message
+ *
+ * @param[in] topic The MQTT topic on which the message should be published.
+ * @param[in] data Data to be published
+ * @param[in] data_len Length of the data
+ * @param[in] qos Quality of Service for the Publish. Can be 0, 1 or 2. Also depends on what the MQTT broker supports.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_publish(const char *topic, void *data, size_t data_len, uint8_t qos, int *msg_id);
+
+/** Subscribe to MQTT topic
+ *
+ * @param[in] topic The topic to be subscribed to.
+ * @param[in] cb The callback to be invoked when a message is received on the given topic.
+ * @param[in] priv_data Optional private data to be passed to the callback
+ * @param[in] qos Quality of Service for the Subscription. Can be 0, 1 or 2. Also depends on what the MQTT broker supports.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_subscribe(const char *topic, esp_rmaker_mqtt_subscribe_cb_t cb, uint8_t qos, void *priv_data);
+
+/** Unsubscribe from MQTT topic
+ *
+ * @param[in] topic Topic from which to unsubscribe.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_unsubscribe(const char *topic);
+esp_err_t esp_rmaker_mqtt_setup(esp_rmaker_mqtt_config_t mqtt_config);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_ota.h b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_ota.h
new file mode 100644
index 00000000000..e66b95705bc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_ota.h
@@ -0,0 +1,150 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Default ESP RainMaker OTA Server Certificate */
+extern const char *ESP_RMAKER_OTA_DEFAULT_SERVER_CERT;
+
+/** OTA Status to be reported to ESP RainMaker Cloud */
+typedef enum {
+    /** OTA is in Progress. This can be reported multiple times as the OTA progresses. */
+    OTA_STATUS_IN_PROGRESS = 1,
+    /** OTA Succeeded. This should be reported only once, at the end of OTA. */
+    OTA_STATUS_SUCCESS,
+    /** OTA Failed. This should be reported only once, at the end of OTA. */
+    OTA_STATUS_FAILED,
+    /** OTA was delayed by the application */
+    OTA_STATUS_DELAYED,
+} ota_status_t;
+
+/** OTA Workflow type */
+typedef enum {
+    /** OTA will be performed using services and parameters. */
+    OTA_USING_PARAMS = 1,
+    /** OTA will be performed using pre-defined MQTT topics. */
+    OTA_USING_TOPICS
+} esp_rmaker_ota_type_t;
+
+/** The OTA Handle to be used by the OTA callback */
+typedef void *esp_rmaker_ota_handle_t;
+
+/** OTA Data */
+typedef struct {
+    /** The OTA URL received from ESP RainMaker Cloud */
+    char *url;
+    /** Size of the OTA File. Can be 0 if the file size isn't received from
+     * the ESP RainMaker Cloud */
+    int filesize;
+    /** The server certificate passed in esp_rmaker_enable_ota() */
+    const char *server_cert;
+    /** The private data passed in esp_rmaker_enable_ota() */
+    char *priv;
+} esp_rmaker_ota_data_t;
+
+/** Function prototype for OTA Callback
+ *
+ * This function will be invoked by the ESP RainMaker core whenever an OTA is available.
+ * The esp_rmaker_report_ota_status() API should be used to indicate the progress and
+ * success/fail status.
+ *
+ * @param[in] handle An OTA handle assigned by the ESP RainMaker Core
+ * @param[in] ota_data The data to be used for the OTA
+ *
+ * @return ESP_OK if the OTA was successful
+ * @return ESP_FAIL if the OTA failed.
+ */
+typedef esp_err_t (*esp_rmaker_ota_cb_t) (esp_rmaker_ota_handle_t handle,
+            esp_rmaker_ota_data_t *ota_data);
+
+/** Function Prototype for Post OTA Diagnostics
+ *
+ * If the Application rollback feature is enabled, this callback will be invoked
+ * as soon as you call esp_rmaker_ota_enable(), if it is the first
+ * boot after an OTA. You may perform some application specific diagnostics and
+ * report the status which will decide whether to roll back or not.
+ *
+ * @return true if diagnostics are successful, meaning that the new firmware is fine.
+ * @return false if diagnostics fail and a roolback to previous firmware is required.
+ */
+typedef bool (*esp_rmaker_post_ota_diag_t)(void);
+
+/** ESP RainMaker OTA Configuration */
+typedef struct {
+    /** OTA Callback.
+     * The callback to be invoked when an OTA Job is available.
+     * If kept NULL, the internal default callback will be used (Recommended).
+     */
+    esp_rmaker_ota_cb_t ota_cb;
+    /** OTA Diagnostics Callback.
+     * A post OTA diagnostic handler to be invoked if app rollback feature is enabled.
+     * If kept NULL, the new firmware will be assumed to be fine,
+     * and no rollback will be performed.
+     */
+    esp_rmaker_post_ota_diag_t ota_diag;
+    /** Server Certificate.
+     * The certificate to be passed to the OTA callback for server authentication.
+     * This is mandatory, unless you have disabled it in ESP HTTPS OTA config option.
+     * If you are using the ESP RainMaker OTA Service, you can just set this to
+     * `ESP_RMAKER_OTA_DEFAULT_SERVER_CERT`.
+     */
+    const char *server_cert;
+    /** Private Data.
+     * Optional private data to be passed to the OTA callback.
+     */
+    void *priv;
+} esp_rmaker_ota_config_t;
+
+/** Enable OTA
+ *
+ * Calling this API enables OTA as per the ESP RainMaker specification.
+ * Please check the various ESP RainMaker configuration options to
+ * use the different variants of OTA. Refer the documentation for
+ * additional details.
+ *
+ * @param[in] ota_config Pointer to an OTA configuration structure
+ * @param[in] type The OTA workflow type
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_ota_enable(esp_rmaker_ota_config_t *ota_config, esp_rmaker_ota_type_t type);
+
+/** Report OTA Status
+ *
+ * This API must be called from the OTA Callback to indicate the status of the OTA. The OTA_STATUS_IN_PROGRESS
+ * can be reported multiple times with appropriate additional information. The final success/failure should
+ * be reported only once, at the end.
+ *
+ * This can be ignored if you are using the default internal OTA callback.
+ *
+ * @param[in] ota_handle The OTA handle received by the callback
+ * @param[in] status Status to be reported
+ * @param[in] additional_info NULL terminated string indicating additional information for the status
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_ota_report_status(esp_rmaker_ota_handle_t ota_handle, ota_status_t status, char *additional_info);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_scenes.h b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_scenes.h
new file mode 100644
index 00000000000..f2f81f51a02
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_scenes.h
@@ -0,0 +1,38 @@
+// Copyright 2022 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <esp_err.h>
+
+/** Enable Scenes
+ *
+ * This API enables the scenes service for the node. For more information,
+ * check [here](https://rainmaker.espressif.com/docs/scenes.html)
+ *
+ * @note This API should be called after esp_rmaker_node_init() but before esp_rmaker_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_scenes_enable(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_schedule.h b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_schedule.h
new file mode 100644
index 00000000000..383c0949188
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_schedule.h
@@ -0,0 +1,38 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Enable Schedules
+ *
+ * This API enables the scheduling service for the node. For more information,
+ * check [here](https://rainmaker.espressif.com/docs/scheduling.html)
+ *
+ * It is recommended to set the timezone while using schedules. Check [here](https://rainmaker.espressif.com/docs/time-service.html#time-zone) for more information on timezones
+ *
+ * @note This API should be called after esp_rmaker_node_init() but before esp_rmaker_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_schedule_enable(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_devices.h b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_devices.h
new file mode 100644
index 00000000000..db9480672ba
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_devices.h
@@ -0,0 +1,96 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_rmaker_core.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Create a standard Switch device
+ *
+ * This creates a Switch device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * #@param[in] power Default value of the mandatory parameter "power"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_switch_device_create(const char *dev_name,
+            void *priv_data, bool power);
+
+/** Create a standard Lightbulb device
+ *
+ * This creates a Lightbulb device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * @param[in] power Default value of the mandatory parameter "power"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_lightbulb_device_create(const char *dev_name,
+            void *priv_data, bool power);
+
+/** Create a standard Fan device
+ *
+ * This creates a Fan device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * @param[in] power Default value of the mandatory parameter "power"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_fan_device_create(const char *dev_name,
+            void *priv_data, bool power);
+
+/** Create a standard Temperature Sensor device
+ *
+ * This creates a Temperature Sensor device with the mandatory parameters and also assigns
+ * the primary parameter. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] dev_name The unique device name
+ * @param[in] priv_data (Optional) Private data associated with the device. This should stay
+ * allocated throughout the lifetime of the device
+ * @param[in] temperature Default value of the mandatory parameter "temperature"
+ *
+ * @return Device handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_device_t *esp_rmaker_temp_sensor_device_create(const char *dev_name,
+            void *priv_data, float temperature);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_params.h b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_params.h
new file mode 100644
index 00000000000..944118c0f68
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_params.h
@@ -0,0 +1,350 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_rmaker_core.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/* Suggested default names for the parameters.
+ * These will also be used by default if you use any standard device helper APIs.
+ *
+ * @note These names are not mandatory. You can use the ESP RainMaker Core APIs
+ * to create your own parameters with custom names, if required.
+ */
+
+#define ESP_RMAKER_DEF_NAME_PARAM           "Name"
+#define ESP_RMAKER_DEF_POWER_NAME           "Power"
+#define ESP_RMAKER_DEF_BRIGHTNESS_NAME      "Brightness"
+#define ESP_RMAKER_DEF_HUE_NAME             "Hue"
+#define ESP_RMAKER_DEF_SATURATION_NAME      "Saturation"
+#define ESP_RMAKER_DEF_INTENSITY_NAME       "Intensity"
+#define ESP_RMAKER_DEF_CCT_NAME             "CCT"
+#define ESP_RMAKER_DEF_DIRECTION_NAME       "Direction"
+#define ESP_RMAKER_DEF_SPEED_NAME           "Speed"
+#define ESP_RMAKER_DEF_TEMPERATURE_NAME     "Temperature"
+#define ESP_RMAKER_DEF_OTA_STATUS_NAME      "Status"
+#define ESP_RMAKER_DEF_OTA_INFO_NAME        "Info"
+#define ESP_RMAKER_DEF_OTA_URL_NAME         "URL"
+#define ESP_RMAKER_DEF_TIMEZONE_NAME        "TZ"
+#define ESP_RMAKER_DEF_TIMEZONE_POSIX_NAME  "TZ-POSIX"
+#define ESP_RMAKER_DEF_SCHEDULE_NAME        "Schedules"
+#define ESP_RMAKER_DEF_SCENES_NAME          "Scenes"
+#define ESP_RMAKER_DEF_REBOOT_NAME          "Reboot"
+#define ESP_RMAKER_DEF_FACTORY_RESET_NAME   "Factory-Reset"
+#define ESP_RMAKER_DEF_WIFI_RESET_NAME      "Wi-Fi-Reset"
+#define ESP_RMAKER_DEF_LOCAL_CONTROL_POP    "POP"
+#define ESP_RMAKER_DEF_LOCAL_CONTROL_TYPE   "Type"
+
+/**
+ * Create standard name param
+ *
+ * This will create the standard name parameter.
+ * This should be added to all devices for which you want a user customisable name.
+ * The value should be same as the device name.
+ *
+ * All standard device creation APIs will add this internally.
+ * No application registered callback will be called for this parameter,
+ * and changes will be managed internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_name_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard Power param
+ *
+ * This will create the standard power parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_power_param_create(const char *param_name, bool val);
+
+/**
+ * Create standard Brightness param
+ *
+ * This will create the standard brightness parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_brightness_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Hue param
+ *
+ * This will create the standard hue parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_hue_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Saturation param
+ *
+ * This will create the standard saturation parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_saturation_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Intensity param
+ *
+ * This will create the standard intensity parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_intensity_param_create(const char *param_name, int val);
+
+/**
+ * Create standard CCT param
+ *
+ * This will create the standard cct parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_cct_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Direction param
+ *
+ * This will create the standard direction parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_direction_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Speed param
+ *
+ * This will create the standard speed parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_speed_param_create(const char *param_name, int val);
+
+/**
+ * Create standard Temperature param
+ *
+ * This will create the standard temperature parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_temperature_param_create(const char *param_name, float val);
+
+/**
+ * Create standard OTA Status param
+ *
+ * This will create the standard ota status parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_ota_status_param_create(const char *param_name);
+
+/**
+ * Create standard OTA Info param
+ *
+ * This will create the standard ota info parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_ota_info_param_create(const char *param_name);
+
+/**
+ * Create standard OTA URL param
+ *
+ * This will create the standard ota url parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_ota_url_param_create(const char *param_name);
+
+/**
+ * Create standard Timezone param
+ *
+ * This will create the standard timezone parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter (Eg. "Asia/Shanghai"). Can be kept NULL.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_timezone_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard POSIX Timezone param
+ *
+ * This will create the standard posix timezone parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter (Eg. "CST-8"). Can be kept NULL.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_timezone_posix_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard Schedules param
+ *
+ * This will create the standard schedules parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] max_schedules Maximum number of schedules allowed
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_schedules_param_create(const char *param_name, int max_schedules);
+
+/**
+ * Create standard Scenes param
+ *
+ * This will create the standard scenes parameter. Default value
+ * is set internally.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] max_scenes Maximum number of scenes allowed
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_scenes_param_create(const char *param_name, int max_scenes);
+
+/**
+ * Create standard Reboot param
+ *
+ * This will create the standard reboot parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_reboot_param_create(const char *param_name);
+
+/**
+ * Create standard Factory Reset param
+ *
+ * This will create the standard factory reset parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_factory_reset_param_create(const char *param_name);
+
+/**
+ * Create standard Wi-Fi Reset param
+ *
+ * This will create the standard Wi-Fi Reset parameter.
+ * Set value to true (via write param) for the action to trigger.
+ *
+ * @param[in] param_name Name of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_wifi_reset_param_create(const char *param_name);
+
+/**
+ * Create standard Local Control POP param
+ *
+ * This will create the standard Local Control POP parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter (Eg. "abcd1234"). Can be kept NULL.
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_local_control_pop_param_create(const char *param_name, const char *val);
+
+/**
+ * Create standard Local Control Type param
+ *
+ * This will create the standard Local Control security type parameter.
+ *
+ * @param[in] param_name Name of the parameter
+ * @param[in] val Default Value of the parameter
+ *
+ * @return Parameter handle on success.
+ * @return NULL in case of failures.
+ */
+esp_rmaker_param_t *esp_rmaker_local_control_type_param_create(const char *param_name, int val);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_services.h b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_services.h
new file mode 100644
index 00000000000..687df733f46
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_services.h
@@ -0,0 +1,124 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_err.h>
+#include <esp_rmaker_core.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Create a standard OTA service
+ *
+ * This creates an OTA service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_ota_service_create(const char *serv_name, void *priv_data);
+
+/** Create a standard OTA service
+ *
+ * This creates an OTA service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] timezone Default value of timezone string (Eg. "Asia/Shanghai"). Can be kept NULL.
+ * @param[in] timezone_posix Default value of posix timezone string (Eg. "CST-8"). Can be kept NULL.
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_time_service_create(const char *serv_name, const char *timezone,
+        const char *timezone_posix, void *priv_data);
+
+/** Create a standard Schedule service
+ *
+ * This creates a Schedule service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] write_cb Write callback.
+ * @param[in] read_cb Read callback.
+ * @param[in] max_schedules Maximum number of schedules supported.
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_create_schedule_service(const char *serv_name, esp_rmaker_device_write_cb_t write_cb, esp_rmaker_device_read_cb_t read_cb, int max_schedules, void *priv_data);
+
+/** Create a standard Scenes service
+ *
+ * This creates a Scenes service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] write_cb Write callback.
+ * @param[in] read_cb Read callback.
+ * @param[in] max_scenes Maximum number of scenes supported.
+ * @param[in] deactivation_support Deactivation callback support.
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_create_scenes_service(const char *serv_name, esp_rmaker_device_write_cb_t write_cb, esp_rmaker_device_read_cb_t read_cb, int max_scenes, bool deactivation_support, void *priv_data);
+
+/** Create a standard System service
+ *
+ * This creates an empty System service. Appropriate parameters should be added by the caller.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+
+esp_rmaker_device_t *esp_rmaker_create_system_service(const char *serv_name, void *priv_data);
+
+/** Create a standard Local Control service
+ *
+ * This creates a Local Control service with the mandatory parameters. The default parameter names will be used.
+ * Refer \ref esp_rmaker_standard_params.h for default names.
+ *
+ * @param[in] serv_name The unique service name
+ * @param[in] pop Proof of possession
+ * @param[in] sec_type Security type
+ * @param[in] priv_data (Optional) Private data associated with the service. This should stay
+ * allocated throughout the lifetime of the service.
+ *
+ * @return service_handle on success.
+ * @return NULL in case of any error.
+ */
+esp_rmaker_device_t *esp_rmaker_create_local_control_service(const char *serv_name, const char *pop, int sec_type, void *priv_data);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_types.h b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_types.h
new file mode 100644
index 00000000000..4dc99eab401
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_standard_types.h
@@ -0,0 +1,73 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/********** STANDARD UI TYPES **********/
+
+#define ESP_RMAKER_UI_TOGGLE            "esp.ui.toggle"
+#define ESP_RMAKER_UI_SLIDER            "esp.ui.slider"
+#define ESP_RMAKER_UI_DROPDOWN          "esp.ui.dropdown"
+#define ESP_RMAKER_UI_TEXT              "esp.ui.text"
+#define ESP_RMAKER_UI_HUE_SLIDER        "esp.ui.hue-slider"
+
+/********** STANDARD PARAM TYPES **********/
+
+#define ESP_RMAKER_PARAM_NAME           "esp.param.name"
+#define ESP_RMAKER_PARAM_POWER          "esp.param.power"
+#define ESP_RMAKER_PARAM_BRIGHTNESS     "esp.param.brightness"
+#define ESP_RMAKER_PARAM_HUE            "esp.param.hue"
+#define ESP_RMAKER_PARAM_SATURATION     "esp.param.saturation"
+#define ESP_RMAKER_PARAM_INTENSITY      "esp.param.intensity"
+#define ESP_RMAKER_PARAM_CCT            "esp.param.cct"
+#define ESP_RMAKER_PARAM_SPEED          "esp.param.speed"
+#define ESP_RMAKER_PARAM_DIRECTION      "esp.param.direction"
+#define ESP_RMAKER_PARAM_TEMPERATURE    "esp.param.temperature"
+#define ESP_RMAKER_PARAM_OTA_STATUS     "esp.param.ota_status"
+#define ESP_RMAKER_PARAM_OTA_INFO       "esp.param.ota_info"
+#define ESP_RMAKER_PARAM_OTA_URL        "esp.param.ota_url"
+#define ESP_RMAKER_PARAM_TIMEZONE       "esp.param.tz"
+#define ESP_RMAKER_PARAM_TIMEZONE_POSIX       "esp.param.tz_posix"
+#define ESP_RMAKER_PARAM_SCHEDULES      "esp.param.schedules"
+#define ESP_RMAKER_PARAM_SCENES         "esp.param.scenes"
+#define ESP_RMAKER_PARAM_REBOOT         "esp.param.reboot"
+#define ESP_RMAKER_PARAM_FACTORY_RESET  "esp.param.factory-reset"
+#define ESP_RMAKER_PARAM_WIFI_RESET     "esp.param.wifi-reset"
+#define ESP_RMAKER_PARAM_LOCAL_CONTROL_POP      "esp.param.local_control_pop"
+#define ESP_RMAKER_PARAM_LOCAL_CONTROL_TYPE     "esp.param.local_control_type"
+
+
+/********** STANDARD DEVICE TYPES **********/
+
+#define ESP_RMAKER_DEVICE_SWITCH        "esp.device.switch"
+#define ESP_RMAKER_DEVICE_LIGHTBULB     "esp.device.lightbulb"
+#define ESP_RMAKER_DEVICE_FAN           "esp.device.fan"
+#define ESP_RMAKER_DEVICE_TEMP_SENSOR   "esp.device.temperature-sensor"
+
+
+/********** STANDARD SERVICE TYPES **********/
+#define ESP_RMAKER_SERVICE_OTA          "esp.service.ota"
+#define ESP_RMAKER_SERVICE_TIME         "esp.service.time"
+#define ESP_RMAKER_SERVICE_SCHEDULE     "esp.service.schedule"
+#define ESP_RMAKER_SERVICE_SCENES       "esp.service.scenes"
+#define ESP_RMAKER_SERVICE_SYSTEM       "esp.service.system"
+#define ESP_RMAKER_SERVICE_LOCAL_CONTROL    "esp.service.local_control"
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_user_mapping.h b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_user_mapping.h
new file mode 100644
index 00000000000..77a153b02f2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rainmaker/include/esp_rmaker_user_mapping.h
@@ -0,0 +1,83 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** User-Node Mapping states */
+typedef enum {
+    /** Mapping does not exist or is not initialized */
+    ESP_RMAKER_USER_MAPPING_RESET = 0,
+    /** Mapping has started */
+    ESP_RMAKER_USER_MAPPING_STARTED,
+    /** Mapping is done */
+    ESP_RMAKER_USER_MAPPING_DONE,
+} esp_rmaker_user_mapping_state_t;
+
+/**
+ * Get User-Node mapping state
+ *
+ * This returns the current user-node mapping state.
+ *
+ * @return user mapping state
+ */
+esp_rmaker_user_mapping_state_t esp_rmaker_user_node_mapping_get_state(void);
+
+/**
+ * Create User Mapping Endpoint
+ *
+ * This will create a custom provisioning endpoint for user-node mapping.
+ * This should be called after wifi_prov_mgr_init() but before
+ * wifi_prov_mgr_start_provisioning()
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_user_mapping_endpoint_create(void);
+
+/**
+ * Register User Mapping Endpoint
+ *
+ * This will register the callback for the custom provisioning endpoint
+ * for user-node mapping which was created with esp_rmaker_user_mapping_endpoint_create().
+ * This should be called immediately after wifi_prov_mgr_start_provisioning().
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_user_mapping_endpoint_register(void);
+
+/** Add User-Node mapping
+ *
+ * This call will start the user-node mapping workflow on the node.
+ * This is automatically called if you have used esp_rmaker_user_mapping_endpoint_register().
+ * Use this API only if you want to trigger the user-node mapping after the Wi-Fi provisioning
+ * has already been done.
+ *
+ * @param[in] user_id The User identifier received from the client (Phone app/CLI)
+ * @param[in] secret_key The Secret key received from the client (Phone app/CLI)
+ *
+ * @return ESP_OK if the workflow was successfully triggered. This does not guarantee success
+ * of the actual mapping. The mapping status needs to be checked separately by the clients.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_start_user_node_mapping(char *user_id, char *secret_key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_ringbuf/include/freertos/ringbuf.h b/tools/sdk/esp32s3/include/esp_ringbuf/include/freertos/ringbuf.h
new file mode 100644
index 00000000000..df6cc7a6add
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_ringbuf/include/freertos/ringbuf.h
@@ -0,0 +1,518 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef FREERTOS_RINGBUF_H
+#define FREERTOS_RINGBUF_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h" must appear in source files before "include ringbuf.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <freertos/queue.h>
+
+/**
+ * Type by which ring buffers are referenced. For example, a call to xRingbufferCreate()
+ * returns a RingbufHandle_t variable that can then be used as a parameter to
+ * xRingbufferSend(), xRingbufferReceive(), etc.
+ */
+typedef void * RingbufHandle_t;
+
+typedef enum {
+    /**
+     * No-split buffers will only store an item in contiguous memory and will
+     * never split an item. Each item requires an 8 byte overhead for a header
+     * and will always internally occupy a 32-bit aligned size of space.
+     */
+    RINGBUF_TYPE_NOSPLIT = 0,
+    /**
+     * Allow-split buffers will split an item into two parts if necessary in
+     * order to store it. Each item requires an 8 byte overhead for a header,
+     * splitting incurs an extra header. Each item will always internally occupy
+     * a 32-bit aligned size of space.
+     */
+    RINGBUF_TYPE_ALLOWSPLIT,
+    /**
+     * Byte buffers store data as a sequence of bytes and do not maintain separate
+     * items, therefore byte buffers have no overhead. All data is stored as a
+     * sequence of byte and any number of bytes can be sent or retrieved each
+     * time.
+     */
+    RINGBUF_TYPE_BYTEBUF,
+    RINGBUF_TYPE_MAX,
+} RingbufferType_t;
+
+/**
+ * @brief Struct that is equivalent in size to the ring buffer's data structure
+ *
+ * The contents of this struct are not meant to be used directly. This
+ * structure is meant to be used when creating a statically allocated ring
+ * buffer where this struct is of the exact size required to store a ring
+ * buffer's control data structure.
+ *
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1)
+typedef struct xSTATIC_RINGBUFFER {
+    /** @cond */    //Doxygen command to hide this structure from API Reference
+    size_t xDummy1[2];
+    UBaseType_t uxDummy2;
+    BaseType_t xDummy3;
+    void *pvDummy4[11];
+    StaticSemaphore_t xDummy5[2];
+    portMUX_TYPE muxDummy;
+    /** @endcond */
+} StaticRingbuffer_t;
+#endif
+
+/**
+ * @brief       Create a ring buffer
+ *
+ * @param[in]   xBufferSize Size of the buffer in bytes. Note that items require
+ *              space for overhead in no-split/allow-split buffers
+ * @param[in]   xBufferType Type of ring buffer, see documentation.
+ *
+ * @note    xBufferSize of no-split/allow-split buffers will be rounded up to the nearest 32-bit aligned size.
+ *
+ * @return  A handle to the created ring buffer, or NULL in case of error.
+ */
+RingbufHandle_t xRingbufferCreate(size_t xBufferSize, RingbufferType_t xBufferType);
+
+/**
+ * @brief Create a ring buffer of type RINGBUF_TYPE_NOSPLIT for a fixed item_size
+ *
+ * This API is similar to xRingbufferCreate(), but it will internally allocate
+ * additional space for the headers.
+ *
+ * @param[in]   xItemSize   Size of each item to be put into the ring buffer
+ * @param[in]   xItemNum    Maximum number of items the buffer needs to hold simultaneously
+ *
+ * @return  A RingbufHandle_t handle to the created ring buffer, or NULL in case of error.
+ */
+RingbufHandle_t xRingbufferCreateNoSplit(size_t xItemSize, size_t xItemNum);
+
+
+/**
+ * @brief       Create a ring buffer but manually provide the required memory
+ *
+ * @param[in]   xBufferSize Size of the buffer in bytes.
+ * @param[in]   xBufferType Type of ring buffer, see documentation
+ * @param[in]   pucRingbufferStorage Pointer to the ring buffer's storage area.
+ *              Storage area must of the same size as specified by xBufferSize
+ * @param[in]   pxStaticRingbuffer Pointed to a struct of type StaticRingbuffer_t
+ *              which will be used to hold the ring buffer's data structure
+ *
+ * @note    xBufferSize of no-split/allow-split buffers MUST be 32-bit aligned.
+ *
+ * @return  A handle to the created ring buffer
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1)
+RingbufHandle_t xRingbufferCreateStatic(size_t xBufferSize,
+                                        RingbufferType_t xBufferType,
+                                        uint8_t *pucRingbufferStorage,
+                                        StaticRingbuffer_t *pxStaticRingbuffer);
+#endif
+
+/**
+ * @brief       Insert an item into the ring buffer
+ *
+ * Attempt to insert an item into the ring buffer. This function will block until
+ * enough free space is available or until it times out.
+ *
+ * @param[in]   xRingbuffer     Ring buffer to insert the item into
+ * @param[in]   pvItem          Pointer to data to insert. NULL is allowed if xItemSize is 0.
+ * @param[in]   xItemSize       Size of data to insert.
+ * @param[in]   xTicksToWait    Ticks to wait for room in the ring buffer.
+ *
+ * @note    For no-split/allow-split ring buffers, the actual size of memory that
+ *          the item will occupy will be rounded up to the nearest 32-bit aligned
+ *          size. This is done to ensure all items are always stored in 32-bit
+ *          aligned fashion.
+ *
+ * @return
+ *      - pdTRUE if succeeded
+ *      - pdFALSE on time-out or when the data is larger than the maximum permissible size of the buffer
+ */
+BaseType_t xRingbufferSend(RingbufHandle_t xRingbuffer,
+                           const void *pvItem,
+                           size_t xItemSize,
+                           TickType_t xTicksToWait);
+
+/**
+ * @brief       Insert an item into the ring buffer in an ISR
+ *
+ * Attempt to insert an item into the ring buffer from an ISR. This function
+ * will return immediately if there is insufficient free space in the buffer.
+ *
+ * @param[in]   xRingbuffer Ring buffer to insert the item into
+ * @param[in]   pvItem      Pointer to data to insert. NULL is allowed if xItemSize is 0.
+ * @param[in]   xItemSize   Size of data to insert.
+ * @param[out]  pxHigherPriorityTaskWoken   Value pointed to will be set to pdTRUE if the function woke up a higher priority task.
+ *
+ * @note    For no-split/allow-split ring buffers, the actual size of memory that
+ *          the item will occupy will be rounded up to the nearest 32-bit aligned
+ *          size. This is done to ensure all items are always stored in 32-bit
+ *          aligned fashion.
+ *
+ * @return
+ *      - pdTRUE if succeeded
+ *      - pdFALSE when the ring buffer does not have space.
+ */
+BaseType_t xRingbufferSendFromISR(RingbufHandle_t xRingbuffer,
+                                  const void *pvItem,
+                                  size_t xItemSize,
+                                  BaseType_t *pxHigherPriorityTaskWoken);
+
+/**
+ * @brief Acquire memory from the ring buffer to be written to by an external
+ *        source and to be sent later.
+ *
+ * Attempt to allocate buffer for an item to be sent into the ring buffer. This
+ * function will block until enough free space is available or until it
+ * timesout.
+ *
+ * The item, as well as the following items ``SendAcquire`` or ``Send`` after it,
+ * will not be able to be read from the ring buffer until this item is actually
+ * sent into the ring buffer.
+ *
+ * @param[in]   xRingbuffer     Ring buffer to allocate the memory
+ * @param[out]  ppvItem         Double pointer to memory acquired (set to NULL if no memory were retrieved)
+ * @param[in]   xItemSize       Size of item to acquire.
+ * @param[in]   xTicksToWait    Ticks to wait for room in the ring buffer.
+ *
+ * @note Only applicable for no-split ring buffers now, the actual size of
+ *       memory that the item will occupy will be rounded up to the nearest 32-bit
+ *       aligned size. This is done to ensure all items are always stored in 32-bit
+ *       aligned fashion.
+ *
+ * @return
+ *      - pdTRUE if succeeded
+ *      - pdFALSE on time-out or when the data is larger than the maximum permissible size of the buffer
+ */
+BaseType_t xRingbufferSendAcquire(RingbufHandle_t xRingbuffer, void **ppvItem, size_t xItemSize, TickType_t xTicksToWait);
+
+/**
+ * @brief       Actually send an item into the ring buffer allocated before by
+ *              ``xRingbufferSendAcquire``.
+ *
+ * @param[in]   xRingbuffer     Ring buffer to insert the item into
+ * @param[in]   pvItem          Pointer to item in allocated memory to insert.
+ *
+ * @note Only applicable for no-split ring buffers. Only call for items
+ *       allocated by ``xRingbufferSendAcquire``.
+ *
+ * @return
+ *      - pdTRUE if succeeded
+ *      - pdFALSE if fail for some reason.
+ */
+BaseType_t xRingbufferSendComplete(RingbufHandle_t xRingbuffer, void *pvItem);
+
+/**
+ * @brief   Retrieve an item from the ring buffer
+ *
+ * Attempt to retrieve an item from the ring buffer. This function will block
+ * until an item is available or until it times out.
+ *
+ * @param[in]   xRingbuffer     Ring buffer to retrieve the item from
+ * @param[out]  pxItemSize      Pointer to a variable to which the size of the retrieved item will be written.
+ * @param[in]   xTicksToWait    Ticks to wait for items in the ring buffer.
+ *
+ * @note    A call to vRingbufferReturnItem() is required after this to free the item retrieved.
+ *
+ * @return
+ *      - Pointer to the retrieved item on success; *pxItemSize filled with the length of the item.
+ *      - NULL on timeout, *pxItemSize is untouched in that case.
+ */
+void *xRingbufferReceive(RingbufHandle_t xRingbuffer, size_t *pxItemSize, TickType_t xTicksToWait);
+
+/**
+ * @brief   Retrieve an item from the ring buffer in an ISR
+ *
+ * Attempt to retrieve an item from the ring buffer. This function returns immediately
+ * if there are no items available for retrieval
+ *
+ * @param[in]   xRingbuffer     Ring buffer to retrieve the item from
+ * @param[out]  pxItemSize      Pointer to a variable to which the size of the
+ *                              retrieved item will be written.
+ *
+ * @note    A call to vRingbufferReturnItemFromISR() is required after this to free the item retrieved.
+ * @note    Byte buffers do not allow multiple retrievals before returning an item
+ * @note    Two calls to RingbufferReceiveFromISR() are required if the bytes wrap around the end of the ring buffer.
+ *
+ * @return
+ *      - Pointer to the retrieved item on success; *pxItemSize filled with the length of the item.
+ *      - NULL when the ring buffer is empty, *pxItemSize is untouched in that case.
+ */
+void *xRingbufferReceiveFromISR(RingbufHandle_t xRingbuffer, size_t *pxItemSize);
+
+/**
+ * @brief   Retrieve a split item from an allow-split ring buffer
+ *
+ * Attempt to retrieve a split item from an allow-split ring buffer. If the item
+ * is not split, only a single item is retried. If the item is split, both parts
+ * will be retrieved. This function will block until an item is available or
+ * until it times out.
+ *
+ * @param[in]   xRingbuffer     Ring buffer to retrieve the item from
+ * @param[out]  ppvHeadItem     Double pointer to first part (set to NULL if no items were retrieved)
+ * @param[out]  ppvTailItem     Double pointer to second part (set to NULL if item is not split)
+ * @param[out]  pxHeadItemSize  Pointer to size of first part (unmodified if no items were retrieved)
+ * @param[out]  pxTailItemSize  Pointer to size of second part (unmodified if item is not split)
+ * @param[in]   xTicksToWait    Ticks to wait for items in the ring buffer.
+ *
+ * @note    Call(s) to vRingbufferReturnItem() is required after this to free up the item(s) retrieved.
+ * @note    This function should only be called on allow-split buffers
+ *
+ * @return
+ *      - pdTRUE if an item (split or unsplit) was retrieved
+ *      - pdFALSE when no item was retrieved
+ */
+BaseType_t xRingbufferReceiveSplit(RingbufHandle_t xRingbuffer,
+                                   void **ppvHeadItem,
+                                   void **ppvTailItem,
+                                   size_t *pxHeadItemSize,
+                                   size_t *pxTailItemSize,
+                                   TickType_t xTicksToWait);
+
+/**
+ * @brief   Retrieve a split item from an allow-split ring buffer in an ISR
+ *
+ * Attempt to retrieve a split item from an allow-split ring buffer. If the item
+ * is not split, only a single item is retried. If the item is split, both parts
+ * will be retrieved. This function returns immediately if there are no items
+ * available for retrieval
+ *
+ * @param[in]   xRingbuffer     Ring buffer to retrieve the item from
+ * @param[out]  ppvHeadItem     Double pointer to first part (set to NULL if no items were retrieved)
+ * @param[out]  ppvTailItem     Double pointer to second part (set to NULL if item is not split)
+ * @param[out]  pxHeadItemSize  Pointer to size of first part (unmodified if no items were retrieved)
+ * @param[out]  pxTailItemSize  Pointer to size of second part (unmodified if item is not split)
+ *
+ * @note    Calls to vRingbufferReturnItemFromISR() is required after this to free up the item(s) retrieved.
+ * @note    This function should only be called on allow-split buffers
+ *
+ * @return
+ *      - pdTRUE if an item (split or unsplit) was retrieved
+ *      - pdFALSE when no item was retrieved
+ */
+BaseType_t xRingbufferReceiveSplitFromISR(RingbufHandle_t xRingbuffer,
+                                          void **ppvHeadItem,
+                                          void **ppvTailItem,
+                                          size_t *pxHeadItemSize,
+                                          size_t *pxTailItemSize);
+
+/**
+ * @brief   Retrieve bytes from a byte buffer, specifying the maximum amount of bytes to retrieve
+ *
+ * Attempt to retrieve data from a byte buffer whilst specifying a maximum number
+ * of bytes to retrieve. This function will block until there is data available
+ * for retrieval or until it times out.
+ *
+ * @param[in]   xRingbuffer     Ring buffer to retrieve the item from
+ * @param[out]  pxItemSize      Pointer to a variable to which the size of the retrieved item will be written.
+ * @param[in]   xTicksToWait    Ticks to wait for items in the ring buffer.
+ * @param[in]   xMaxSize        Maximum number of bytes to return.
+ *
+ * @note    A call to vRingbufferReturnItem() is required after this to free up the data retrieved.
+ * @note    This function should only be called on byte buffers
+ * @note    Byte buffers do not allow multiple retrievals before returning an item
+ * @note    Two calls to RingbufferReceiveUpTo() are required if the bytes wrap around the end of the ring buffer.
+ *
+ * @return
+ *      - Pointer to the retrieved item on success; *pxItemSize filled with
+ *        the length of the item.
+ *      - NULL on timeout, *pxItemSize is untouched in that case.
+ */
+void *xRingbufferReceiveUpTo(RingbufHandle_t xRingbuffer,
+                             size_t *pxItemSize,
+                             TickType_t xTicksToWait,
+                             size_t xMaxSize);
+
+/**
+ * @brief   Retrieve bytes from a byte buffer, specifying the maximum amount of
+ *          bytes to retrieve. Call this from an ISR.
+ *
+ * Attempt to retrieve bytes from a byte buffer whilst specifying a maximum number
+ * of bytes to retrieve. This function will return immediately if there is no data
+ * available for retrieval.
+ *
+ * @param[in]   xRingbuffer Ring buffer to retrieve the item from
+ * @param[out]  pxItemSize  Pointer to a variable to which the size of the retrieved item will be written.
+ * @param[in]   xMaxSize    Maximum number of bytes to return.
+ *
+ * @note    A call to vRingbufferReturnItemFromISR() is required after this to free up the data received.
+ * @note    This function should only be called on byte buffers
+ * @note    Byte buffers do not allow multiple retrievals before returning an item
+ *
+ * @return
+ *      - Pointer to the retrieved item on success; *pxItemSize filled with
+ *        the length of the item.
+ *      - NULL when the ring buffer is empty, *pxItemSize is untouched in that case.
+ */
+void *xRingbufferReceiveUpToFromISR(RingbufHandle_t xRingbuffer, size_t *pxItemSize, size_t xMaxSize);
+
+/**
+ * @brief   Return a previously-retrieved item to the ring buffer
+ *
+ * @param[in]   xRingbuffer Ring buffer the item was retrieved from
+ * @param[in]   pvItem      Item that was received earlier
+ *
+ * @note    If a split item is retrieved, both parts should be returned by calling this function twice
+ */
+void vRingbufferReturnItem(RingbufHandle_t xRingbuffer, void *pvItem);
+
+/**
+ * @brief   Return a previously-retrieved item to the ring buffer from an ISR
+ *
+ * @param[in]   xRingbuffer Ring buffer the item was retrieved from
+ * @param[in]   pvItem      Item that was received earlier
+ * @param[out]  pxHigherPriorityTaskWoken   Value pointed to will be set to pdTRUE
+ *                                          if the function woke up a higher priority task.
+ *
+ * @note    If a split item is retrieved, both parts should be returned by calling this function twice
+ */
+void vRingbufferReturnItemFromISR(RingbufHandle_t xRingbuffer, void *pvItem, BaseType_t *pxHigherPriorityTaskWoken);
+
+/**
+ * @brief   Delete a ring buffer
+ *
+ * @param[in]   xRingbuffer     Ring buffer to delete
+ *
+ * @note    This function will not deallocate any memory if the ring buffer was
+ *          created using xRingbufferCreateStatic(). Deallocation must be done
+ *          manually be the user.
+ */
+void vRingbufferDelete(RingbufHandle_t xRingbuffer);
+
+/**
+ * @brief   Get maximum size of an item that can be placed in the ring buffer
+ *
+ * This function returns the maximum size an item can have if it was placed in
+ * an empty ring buffer.
+ *
+ * @param[in]   xRingbuffer     Ring buffer to query
+ *
+ * @note    The max item size for a no-split buffer is limited to
+ *          ((buffer_size/2)-header_size). This limit is imposed so that an item
+ *          of max item size can always be sent to the an empty no-split buffer
+ *          regardless of the internal positions of the buffer's read/write/free
+ *          pointers.
+ *
+ * @return  Maximum size, in bytes, of an item that can be placed in a ring buffer.
+ */
+size_t xRingbufferGetMaxItemSize(RingbufHandle_t xRingbuffer);
+
+/**
+ * @brief   Get current free size available for an item/data in the buffer
+ *
+ * This gives the real time free space available for an item/data in the ring
+ * buffer. This represents the maximum size an item/data can have if it was
+ * currently sent to the ring buffer.
+ *
+ * @warning This API is not thread safe. So, if multiple threads are accessing
+ *          the same ring buffer, it is the application's responsibility to
+ *          ensure atomic access to this API and the subsequent Send
+ *
+ * @note    An empty no-split buffer has a max current free size for an item
+ *          that is limited to ((buffer_size/2)-header_size). See API reference
+ *          for xRingbufferGetMaxItemSize().
+ *
+ * @param[in]   xRingbuffer     Ring buffer to query
+ *
+ * @return  Current free size, in bytes, available for an entry
+ */
+size_t xRingbufferGetCurFreeSize(RingbufHandle_t xRingbuffer);
+
+/**
+ * @brief   Add the ring buffer's read semaphore to a queue set.
+ *
+ * The ring buffer's read semaphore indicates that data has been written
+ * to the ring buffer. This function adds the ring buffer's read semaphore to
+ * a queue set.
+ *
+ * @param[in]   xRingbuffer     Ring buffer to add to the queue set
+ * @param[in]   xQueueSet       Queue set to add the ring buffer's read semaphore to
+ *
+ * @return
+ *      - pdTRUE on success, pdFALSE otherwise
+ */
+BaseType_t xRingbufferAddToQueueSetRead(RingbufHandle_t xRingbuffer, QueueSetHandle_t xQueueSet);
+
+
+/**
+ * @brief   Check if the selected queue set member is the ring buffer's read semaphore
+ *
+ * This API checks if queue set member returned from xQueueSelectFromSet()
+ * is the read semaphore of this ring buffer. If so, this indicates the ring buffer
+ * has items waiting to be retrieved.
+ *
+ * @param[in]   xRingbuffer     Ring buffer which should be checked
+ * @param[in]   xMember         Member returned from xQueueSelectFromSet
+ *
+ * @return
+ *      - pdTRUE when semaphore belongs to ring buffer
+ *      - pdFALSE otherwise.
+ */
+BaseType_t xRingbufferCanRead(RingbufHandle_t xRingbuffer, QueueSetMemberHandle_t xMember);
+
+/**
+ * @brief   Remove the ring buffer's read semaphore from a queue set.
+ *
+ * This specifically removes a ring buffer's read semaphore from a queue set. The
+ * read semaphore is used to indicate when data has been written to the ring buffer
+ *
+ * @param[in]   xRingbuffer     Ring buffer to remove from the queue set
+ * @param[in]   xQueueSet       Queue set to remove the ring buffer's read semaphore from
+ *
+ * @return
+ *      - pdTRUE on success
+ *      - pdFALSE otherwise
+ */
+BaseType_t xRingbufferRemoveFromQueueSetRead(RingbufHandle_t xRingbuffer, QueueSetHandle_t xQueueSet);
+
+/**
+ * @brief   Get information about ring buffer status
+ *
+ * Get information of the a ring buffer's current status such as
+ * free/read/write pointer positions, and number of items waiting to be retrieved.
+ * Arguments can be set to NULL if they are not required.
+ *
+ * @param[in]   xRingbuffer     Ring buffer to remove from the queue set
+ * @param[out]  uxFree          Pointer use to store free pointer position
+ * @param[out]  uxRead          Pointer use to store read pointer position
+ * @param[out]  uxWrite         Pointer use to store write pointer position
+ * @param[out]  uxAcquire       Pointer use to store acquire pointer position
+ * @param[out]  uxItemsWaiting  Pointer use to store number of items (bytes for byte buffer) waiting to be retrieved
+ */
+void vRingbufferGetInfo(RingbufHandle_t xRingbuffer,
+                        UBaseType_t *uxFree,
+                        UBaseType_t *uxRead,
+                        UBaseType_t *uxWrite,
+                        UBaseType_t *uxAcquire,
+                        UBaseType_t *uxItemsWaiting);
+
+/**
+ * @brief   Debugging function to print the internal pointers in the ring buffer
+ *
+ * @param   xRingbuffer Ring buffer to show
+ */
+void xRingbufferPrintInfo(RingbufHandle_t xRingbuffer);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* FREERTOS_RINGBUF_H */
diff --git a/tools/sdk/esp32s3/include/esp_rom/esp32s3/esp_rom_caps.h b/tools/sdk/esp32s3/include/esp_rom/esp32s3/esp_rom_caps.h
new file mode 100644
index 00000000000..5955f2c371e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/esp32s3/esp_rom_caps.h
@@ -0,0 +1,24 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define ESP_ROM_HAS_CRC_LE                  (1) // ROM CRC library supports Little Endian
+#define ESP_ROM_HAS_CRC_BE                  (1) // ROM CRC library supports Big Endian
+#define ESP_ROM_HAS_JPEG_DECODE             (1) // ROM has JPEG decode library
+#define ESP_ROM_SUPPORT_MULTIPLE_UART       (1) // ROM has multiple UARTs available for logging
+#define ESP_ROM_UART_CLK_IS_XTAL            (1) // UART clock source is selected to XTAL in ROM
+#define ESP_ROM_HAS_RETARGETABLE_LOCKING    (1) // ROM was built with retargetable locking
+#define ESP_ROM_USB_SERIAL_DEVICE_NUM       (4) // The serial port ID (UART, USB, ...) of USB_SERIAL_JTAG in the ROM.
+#define ESP_ROM_HAS_ERASE_0_REGION_BUG      (1) // ROM has esp_flash_erase_region(size=0) bug
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/aes.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/aes.h
new file mode 100644
index 00000000000..bbe13d22e47
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/aes.h
@@ -0,0 +1,57 @@
+/*
+  ROM functions for hardware AES support.
+
+  It is not recommended to use these functions directly,
+  use the wrapper functions in esp32/aes.h instead.
+
+ */
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_AES_H_
+#define _ROM_AES_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//TODO, add comment for aes apis
+enum AES_BITS {
+    AES128,
+    AES192,
+    AES256
+};
+
+void ets_aes_enable(void);
+
+void ets_aes_disable(void);
+
+void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap,
+                        bool in_word_swap, bool in_byte_swap,
+                        bool out_word_swap, bool out_byte_swap);
+
+bool ets_aes_setkey_enc(const uint8_t *key, enum AES_BITS bits);
+
+bool ets_aes_setkey_dec(const uint8_t *key, enum AES_BITS bits);
+
+void ets_aes_crypt(const uint8_t input[16], uint8_t output[16]);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_AES_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/bigint.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/bigint.h
new file mode 100644
index 00000000000..97ad72202a3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/bigint.h
@@ -0,0 +1,62 @@
+/*
+  ROM functions for hardware bigint support.
+
+  It is not recommended to use these functions directly,
+  use the wrapper functions in hwcrypto/mpi.h instead.
+
+ */
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_BIGINT_H_
+#define _ROM_BIGINT_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//TODO: add comment here
+void ets_bigint_enable(void);
+
+void ets_bigint_disable(void);
+
+void ets_bigint_wait_finish(void);
+
+bool ets_bigint_mod_power_prepare(uint32_t *x, uint32_t *y, uint32_t *m,
+                                  uint32_t m_dash, uint32_t *rb, uint32_t len, bool again);
+
+bool ets_bigint_mod_power_getz(uint32_t *z, uint32_t len);
+
+bool ets_bigint_mult_prepare(uint32_t *x, uint32_t *y, uint32_t len);
+
+bool ets_bigint_mult_getz(uint32_t *z, uint32_t len);
+
+bool ets_bigint_montgomery_mult_prepare(uint32_t *x, uint32_t *y, uint32_t *m,
+                                        uint32_t m_dash, uint32_t len, bool again);
+
+bool ets_bigint_montgomery_mult_getz(uint32_t *z, uint32_t len);
+
+bool ets_bigint_mod_mult_prepare(uint32_t *x, uint32_t *y, uint32_t *m,
+                                 uint32_t m_dash, uint32_t *rb, uint32_t len, bool again);
+
+bool ets_bigint_mod_mult_getz(uint32_t *m, uint32_t *z, uint32_t len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_BIGINT_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/cache.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/cache.h
new file mode 100644
index 00000000000..4b923e669d7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/cache.h
@@ -0,0 +1,186 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_CACHE_H_
+#define _ROM_CACHE_H_
+
+#include "soc/dport_access.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup uart_apis, uart configuration and communication related apis
+  * @brief uart apis
+  */
+
+/** @addtogroup uart_apis
+  * @{
+  */
+
+/**
+  * @brief Initialise cache mmu, mark all entries as invalid.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  int cpu_no : 0 for PRO cpu, 1 for APP cpu.
+  *
+  * @return None
+  */
+void mmu_init(int cpu_no);
+
+/**
+  * @brief Set Flash-Cache mmu mapping.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  int cpu_no : CPU number, 0 for PRO cpu, 1 for APP cpu.
+  *
+  * @param  int pod : process identifier. Range 0~7.
+  *
+  * @param  unsigned int vaddr : virtual address in CPU address space.
+  *                              Can be IRam0, IRam1, IRom0 and DRom0 memory address.
+  *                              Should be aligned by psize.
+  *
+  * @param  unsigned int paddr : physical address in Flash.
+  *                              Should be aligned by psize.
+  *
+  * @param  int psize : page size of flash, in kilobytes. Should be 64 here.
+  *
+  * @param  int num : pages to be set.
+  *
+  * @return unsigned int: error status
+  *                   0 : mmu set success
+  *                   1 : vaddr or paddr is not aligned
+  *                   2 : pid error
+  *                   3 : psize error
+  *                   4 : mmu table to be written is out of range
+  *                   5 : vaddr is out of range
+  */
+static inline unsigned int IRAM_ATTR cache_flash_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr,  int psize, int num)
+{
+    extern unsigned int cache_flash_mmu_set_rom(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr,  int psize, int num);
+
+    unsigned int ret;
+
+    DPORT_STALL_OTHER_CPU_START();
+    ret = cache_flash_mmu_set_rom(cpu_no, pid, vaddr, paddr, psize, num);
+    DPORT_STALL_OTHER_CPU_END();
+
+    return ret;
+}
+
+/**
+  * @brief Set Ext-SRAM-Cache mmu mapping.
+  *        Please do not call this function in your SDK application.
+  *
+  * Note that this code lives in IRAM and has a bugfix in respect to the ROM version
+  * of this function (which erroneously refused a vaddr > 2MiB
+  *
+  * @param  int cpu_no : CPU number, 0 for PRO cpu, 1 for APP cpu.
+  *
+  * @param  int pod : process identifier. Range 0~7.
+  *
+  * @param  unsigned int vaddr : virtual address in CPU address space.
+  *                              Can be IRam0, IRam1, IRom0 and DRom0 memory address.
+  *                              Should be aligned by psize.
+  *
+  * @param  unsigned int paddr : physical address in Ext-SRAM.
+  *                              Should be aligned by psize.
+  *
+  * @param  int psize : page size of flash, in kilobytes. Should be 32 here.
+  *
+  * @param  int num : pages to be set.
+  *
+  * @return unsigned int: error status
+  *                   0 : mmu set success
+  *                   1 : vaddr or paddr is not aligned
+  *                   2 : pid error
+  *                   3 : psize error
+  *                   4 : mmu table to be written is out of range
+  *                   5 : vaddr is out of range
+  */
+unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num);
+
+/**
+  * @brief Initialise cache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  int cpu_no : 0 for PRO cpu, 1 for APP cpu.
+  *
+  * @return None
+  */
+static inline void IRAM_ATTR Cache_Read_Init(int cpu_no)
+{
+    extern void Cache_Read_Init_rom(int cpu_no);
+    DPORT_STALL_OTHER_CPU_START();
+    Cache_Read_Init_rom(cpu_no);
+    DPORT_STALL_OTHER_CPU_END();
+}
+
+/**
+  * @brief Flush the cache value for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  int cpu_no : 0 for PRO cpu, 1 for APP cpu.
+  *
+  * @return None
+  */
+static inline void IRAM_ATTR Cache_Flush(int cpu_no)
+{
+    extern void Cache_Flush_rom(int cpu_no);
+    DPORT_STALL_OTHER_CPU_START();
+    Cache_Flush_rom(cpu_no);
+    DPORT_STALL_OTHER_CPU_END();
+}
+
+/**
+  * @brief Disable Cache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  int cpu_no : 0 for PRO cpu, 1 for APP cpu.
+  *
+  * @return None
+  */
+static inline void IRAM_ATTR Cache_Read_Disable(int cpu_no)
+{
+    extern void Cache_Read_Disable_rom(int cpu_no);
+    DPORT_STALL_OTHER_CPU_START();
+    Cache_Read_Disable_rom(cpu_no);
+    DPORT_STALL_OTHER_CPU_END();
+}
+
+/**
+  * @brief Enable Cache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  int cpu_no : 0 for PRO cpu, 1 for APP cpu.
+  *
+  * @return None
+  */
+static inline void IRAM_ATTR Cache_Read_Enable(int cpu_no)
+{
+    extern void Cache_Read_Enable_rom(int cpu_no);
+    DPORT_STALL_OTHER_CPU_START();
+    Cache_Read_Enable_rom(cpu_no);
+    DPORT_STALL_OTHER_CPU_END();
+}
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_CACHE_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/crc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/crc.h
new file mode 100644
index 00000000000..a570361176b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/crc.h
@@ -0,0 +1,160 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef ROM_CRC_H
+#define ROM_CRC_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup uart_apis, uart configuration and communication related apis
+  * @brief uart apis
+  */
+
+/** @addtogroup uart_apis
+  * @{
+  */
+
+
+/*           Notes about CRC APIs usage
+ * The ESP32 ROM include some CRC tables and CRC APIs to speed up CRC calculation.
+ * The CRC APIs include CRC8, CRC16, CRC32 algorithms for both little endian and big endian modes.
+ * Here are the polynomials for the algorithms:
+ * CRC-8        x8+x2+x1+1                                              0x07
+ * CRC16-CCITT  x16+x12+x5+1                                            0x1021
+ * CRC32        x32+x26+x23+x22+x16+x12+x11+x10+x8+x7+x5+x4+x2+x1+1     0x04c11db7
+ *
+ * These group of CRC APIs are designed to calculate the data in buffers either continuous or not.
+ * To make it easy, we had added a `~` at the beginning and the end of the functions.
+ * To calculate non-continuous buffers, we can write the code like this:
+ *     init = ~init;
+ *     crc = crc32_le(init, buf0, length0);
+ *     crc = crc32_le(crc, buf1, length1);
+ *     crc = ~crc;
+ *
+ * However, it is not easy to select which API to use and give the correct parameters.
+ * A specific CRC algorithm will include this parameters: width, polynomials, init, refin, refout, xorout
+ *     refin and refout show the endian of the algorithm:
+ *         if both of them are true, please use the little endian API.
+ *         if both of them are false, please use the big endian API.
+ *     xorout is the value which you need to be xored to the raw result.
+ * However, these group of APIs need one '~' before and after the APIs.
+ *
+ * Here are some examples for CRC16:
+ * CRC-16/CCITT, poly = 0x1021, init = 0x0000, refin = true, refout = true, xorout = 0x0000
+ *     crc = ~crc16_le((uint16_t)~0x0000, buf, length);
+ *
+ * CRC-16/CCITT-FALSE, poly = 0x1021, init = 0xffff, refin = false, refout = false, xorout = 0x0000
+ *     crc = ~crc16_be((uint16_t)~0xffff, buf, length);
+ *
+ * CRC-16/X25, poly = 0x1021, init = 0xffff, refin = true, refout = true, xorout = 0xffff
+ *     crc = (~crc16_le((uint16_t)~(0xffff), buf, length))^0xffff;
+ *
+ * CRC-16/XMODEM, poly= 0x1021, init = 0x0000, refin = false, refout = false, xorout = 0x0000
+ *     crc = ~crc16_be((uint16_t)~0x0000, buf, length);
+ *
+ *
+ */
+
+/**
+  * @brief CRC32 value that is in little endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint32_t crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief CRC32 value that is in big endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint32_t crc32_be(uint32_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief CRC16 value that is in little endian.
+  *
+  * @param  uint16_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint16_t crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief CRC16 value that is in big endian.
+  *
+  * @param  uint16_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint16_t crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief CRC8 value that is in little endian.
+  *
+  * @param  uint8_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint8_t crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief CRC8 value that is in big endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint8_t crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/efuse.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/efuse.h
new file mode 100644
index 00000000000..337227ab0d4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/efuse.h
@@ -0,0 +1,117 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_EFUSE_H_
+#define _ROM_EFUSE_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup efuse_APIs efuse APIs
+  * @brief     ESP32 efuse read/write APIs
+  * @attention
+  *
+  */
+
+/** @addtogroup efuse_APIs
+  * @{
+  */
+
+/**
+  * @brief  Do a efuse read operation, to update the efuse value to efuse read registers.
+  *
+  * @param  null
+  *
+  * @return null
+  */
+void ets_efuse_read_op(void);
+
+/**
+  * @brief  Do a efuse write operation, to update efuse write registers to efuse, then you need call ets_efuse_read_op again.
+  *
+  * @param  null
+  *
+  * @return null
+  */
+void ets_efuse_program_op(void);
+
+/**
+  * @brief  Read 8M Analog Clock value(8 bit) in efuse, the analog clock will not change with temperature.
+  *         It can be used to test the external xtal frequency, do not touch this efuse field.
+  *
+  * @param  null
+  *
+  * @return u32: 1 for 100KHZ, range is 0 to 255.
+  */
+uint32_t ets_efuse_get_8M_clock(void);
+
+/**
+  * @brief  Read spi flash pin configuration from Efuse
+  *
+  * @return
+  * - 0 for default SPI pins.
+  * - 1 for default HSPI pins.
+  * - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
+  *   EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
+  *   WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
+  */
+uint32_t ets_efuse_get_spiconfig(void);
+
+#define EFUSE_SPICONFIG_SPI_DEFAULTS 0
+#define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
+
+#define EFUSE_SPICONFIG_RET_SPICLK_MASK         0x3f
+#define EFUSE_SPICONFIG_RET_SPICLK_SHIFT        0
+#define EFUSE_SPICONFIG_RET_SPICLK(ret)         (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPIQ_MASK           0x3f
+#define EFUSE_SPICONFIG_RET_SPIQ_SHIFT          6
+#define EFUSE_SPICONFIG_RET_SPIQ(ret)           (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPID_MASK           0x3f
+#define EFUSE_SPICONFIG_RET_SPID_SHIFT          12
+#define EFUSE_SPICONFIG_RET_SPID(ret)           (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPICS0_MASK         0x3f
+#define EFUSE_SPICONFIG_RET_SPICS0_SHIFT        18
+#define EFUSE_SPICONFIG_RET_SPICS0(ret)         (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
+
+
+#define EFUSE_SPICONFIG_RET_SPIHD_MASK          0x3f
+#define EFUSE_SPICONFIG_RET_SPIHD_SHIFT         24
+#define EFUSE_SPICONFIG_RET_SPIHD(ret)          (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
+
+/**
+  * @brief  A crc8 algorithm used in efuse check.
+  *
+  * @param  unsigned char const *p : Pointer to original data.
+  *
+  * @param  unsigned int len : Data length in byte.
+  *
+  * @return unsigned char: Crc value.
+  */
+unsigned char esp_crc8(unsigned char const *p, unsigned int len);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_EFUSE_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/ets_sys.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/ets_sys.h
new file mode 100644
index 00000000000..3485f0d406f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/ets_sys.h
@@ -0,0 +1,654 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_ETS_SYS_H_
+#define _ROM_ETS_SYS_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdlib.h>
+
+#include "sdkconfig.h"
+
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
+#include "soc/soc.h"
+#endif
+
+#ifndef CONFIG_IDF_TARGET_ESP32
+#error "This header should only be included when building for ESP32"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup ets_sys_apis, ets system related apis
+  * @brief ets system apis
+  */
+
+/** @addtogroup ets_sys_apis
+  * @{
+  */
+
+/************************************************************************
+  *                                NOTE
+  *   Many functions in this header files can't be run in FreeRTOS.
+  *   Please see the comment of the Functions.
+  *   There are also some functions that doesn't work on FreeRTOS
+  *   without listed in the header, such as:
+  *   xtos functions start with "_xtos_" in ld file.
+  *
+  ***********************************************************************
+  */
+
+/** \defgroup ets_apis, Espressif Task Scheduler related apis
+  * @brief ets apis
+  */
+
+/** @addtogroup ets_apis
+  * @{
+  */
+
+typedef enum {
+    ETS_OK     = 0, /**< return successful in ets*/
+    ETS_FAILED = 1  /**< return failed in ets*/
+} ETS_STATUS;
+
+typedef uint32_t ETSSignal;
+typedef uint32_t ETSParam;
+
+typedef struct ETSEventTag ETSEvent;    /**< Event transmit/receive in ets*/
+
+struct ETSEventTag {
+    ETSSignal sig;  /**< Event signal, in same task, different Event with different signal*/
+    ETSParam  par;  /**< Event parameter, sometimes without usage, then will be set as 0*/
+};
+
+typedef void (*ETSTask)(ETSEvent *e);       /**< Type of the Task processer*/
+typedef void (* ets_idle_cb_t)(void *arg);  /**< Type of the system idle callback*/
+
+/**
+  * @brief  Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.
+  *
+  * @param  none
+  *
+  * @return none
+  */
+void ets_run(void);
+
+/**
+  * @brief  Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.
+  *
+  * @param  ets_idle_cb_t func : The callback function.
+  *
+  * @param  void *arg : Argument of the callback.
+  *
+  * @return None
+  */
+void ets_set_idle_cb(ets_idle_cb_t func, void *arg);
+
+/**
+  * @brief  Init a task with processer, priority, queue to receive Event, queue length.
+  *
+  * @param  ETSTask task : The task processer.
+  *
+  * @param  uint8_t prio : Task priority, 0-31, bigger num with high priority, one priority with one task.
+  *
+  * @param  ETSEvent *queue : Queue belongs to the task, task always receives Events, Queue is circular used.
+  *
+  * @param  uint8_t qlen : Queue length.
+  *
+  * @return None
+  */
+void ets_task(ETSTask task, uint8_t prio, ETSEvent *queue, uint8_t qlen);
+
+/**
+  * @brief  Post an event to an Task.
+  *
+  * @param  uint8_t prio : Priority of the Task.
+  *
+  * @param  ETSSignal sig : Event signal.
+  *
+  * @param  ETSParam  par : Event parameter
+  *
+  * @return ETS_OK     : post successful
+  * @return ETS_FAILED : post failed
+  */
+ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_boot_apis, Boot routing related apis
+  * @brief ets boot apis
+  */
+
+/** @addtogroup ets_apis
+  * @{
+  */
+
+extern const char *const exc_cause_table[40];   ///**< excption cause that defined by the core.*/
+
+/**
+  * @brief  Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed.
+  *         When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.
+  *
+  * @param  uint32_t start : the PRO Entry code address value in uint32_t
+  *
+  * @return None
+  */
+void ets_set_user_start(uint32_t start);
+
+/**
+  * @brief  Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code.
+  *         When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.
+  *
+  * @param  uint32_t callback : the Startup code address value in uint32_t
+  *
+  * @return None     : post successful
+  */
+void ets_set_startup_callback(uint32_t callback);
+
+/**
+  * @brief  Set App cpu Entry code, code can be called in PRO CPU.
+  *         When APP booting is completed, APP CPU will call the Entry code if not NULL.
+  *
+  * @param  uint32_t start : the APP Entry code address value in uint32_t, stored in register APPCPU_CTRL_REG_D.
+  *
+  * @return None
+  */
+void ets_set_appcpu_boot_addr(uint32_t start);
+
+/**
+  * @brief  unpack the image in flash to iram and dram, no using cache.
+  *
+  * @param  uint32_t pos : Flash physical address.
+  *
+  * @param  uint32_t *entry_addr: the pointer of an variable that can store Entry code address.
+  *
+  * @param  bool jump : Jump into the code in the function or not.
+  *
+  * @param  bool config : Config the flash when unpacking the image, config should be done only once.
+  *
+  * @return ETS_OK     : unpack successful
+  * @return ETS_FAILED : unpack failed
+  */
+ETS_STATUS ets_unpack_flash_code_legacy(uint32_t pos, uint32_t *entry_addr, bool jump, bool config);
+
+/**
+  * @brief  unpack the image in flash to iram and dram, using cache, maybe decrypting.
+  *
+  * @param  uint32_t pos : Flash physical address.
+  *
+  * @param  uint32_t *entry_addr: the pointer of an variable that can store Entry code address.
+  *
+  * @param  bool jump : Jump into the code in the function or not.
+  *
+  * @param  bool sb_need_check : Do security boot check or not.
+  *
+  * @param  bool config : Config the flash when unpacking the image, config should be done only once.
+  *
+  * @return ETS_OK     : unpack successful
+  * @return ETS_FAILED : unpack failed
+  */
+ETS_STATUS ets_unpack_flash_code(uint32_t pos, uint32_t *entry_addr, bool jump, bool sb_need_check, bool config);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_printf_apis, ets_printf related apis used in ets
+  * @brief ets printf apis
+  */
+
+/** @addtogroup ets_printf_apis
+  * @{
+  */
+
+/**
+  * @brief  Printf the strings to uart or other devices, similar with printf, simple than printf.
+  *         Can not print float point data format, or longlong data format.
+  *         So we maybe only use this in ROM.
+  *
+  * @param  const char *fmt : See printf.
+  *
+  * @param  ... : See printf.
+  *
+  * @return int : the length printed to the output device.
+  */
+int ets_printf(const char *fmt, ...);
+
+/**
+  * @brief  Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function.
+  *         Can not print float point data format, or longlong data format
+  *
+  * @param  char c : char to output.
+  *
+  * @return None
+  */
+void ets_write_char_uart(char c);
+
+/**
+  * @brief  Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
+  *         To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.
+  *
+  * @param  void (*)(char) p: Output function to install.
+  *
+  * @return None
+  */
+void ets_install_putc1(void (*p)(char c));
+
+/**
+  * @brief  Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
+  *         To install putc2, which is defaulted installed as NULL.
+  *
+  * @param  void (*)(char) p: Output function to install.
+  *
+  * @return None
+  */
+void ets_install_putc2(void (*p)(char c));
+
+/**
+  * @brief  Install putc1 as ets_write_char_uart.
+  *         In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_install_uart_printf(void);
+
+#define ETS_PRINTF(...) ets_printf(...)
+
+#define ETS_ASSERT(v) do { \
+    if (!(v)) {             \
+        ets_printf("%s %u \n", __FILE__, __LINE__); \
+        while (1) {};   \
+    }                   \
+} while (0)
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_timer_apis, ets_timer related apis used in ets
+  * @brief ets timer apis
+  */
+
+/** @addtogroup ets_timer_apis
+  * @{
+  */
+typedef void ETSTimerFunc(void *timer_arg);/**< timer handler*/
+
+typedef struct _ETSTIMER_ {
+    struct _ETSTIMER_    *timer_next;   /**< timer linker*/
+    uint32_t              timer_expire; /**< abstruct time when timer expire*/
+    uint32_t              timer_period; /**< timer period, 0 means timer is not periodic repeated*/
+    ETSTimerFunc         *timer_func;   /**< timer handler*/
+    void                 *timer_arg;    /**< timer handler argument*/
+} ETSTimer;
+
+/**
+  * @brief  Init ets timer, this timer range is 640 us to 429496 ms
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_timer_init(void);
+
+/**
+  * @brief  In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_timer_deinit(void);
+
+/**
+  * @brief  Arm an ets timer, this timer range is 640 us to 429496 ms.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  uint32_t tmout : Timer value in ms, range is 1 to 429496.
+  *
+  * @param  bool repeat : Timer is periodic repeated.
+  *
+  * @return None
+  */
+void ets_timer_arm(ETSTimer *timer, uint32_t tmout, bool repeat);
+
+/**
+  * @brief  Arm an ets timer, this timer range is 640 us to 429496 ms.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  uint32_t tmout : Timer value in us, range is 1 to 429496729.
+  *
+  * @param  bool repeat : Timer is periodic repeated.
+  *
+  * @return None
+  */
+void ets_timer_arm_us(ETSTimer *ptimer, uint32_t us, bool repeat);
+
+/**
+  * @brief  Disarm an ets timer.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @return None
+  */
+void ets_timer_disarm(ETSTimer *timer);
+
+/**
+  * @brief  Set timer callback and argument.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  ETSTimerFunc *pfunction : Timer callback.
+  *
+  * @param  void *parg : Timer callback argument.
+  *
+  * @return None
+  */
+void ets_timer_setfn(ETSTimer *ptimer, ETSTimerFunc *pfunction, void *parg);
+
+/**
+  * @brief  Unset timer callback and argument to NULL.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @return None
+  */
+void ets_timer_done(ETSTimer *ptimer);
+
+/**
+  * @brief  CPU do while loop for some time.
+  *         In FreeRTOS task, please call FreeRTOS apis.
+  *
+  * @param  uint32_t us : Delay time in us.
+  *
+  * @return None
+  */
+void ets_delay_us(uint32_t us);
+
+/**
+  * @brief  Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
+  *         Call this function when CPU frequency is changed.
+  *
+  * @param  uint32_t ticks_per_us : CPU ticks per us.
+  *
+  * @return None
+  */
+void ets_update_cpu_frequency(uint32_t ticks_per_us);
+
+/**
+  * @brief  Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
+  *
+  * @note This function only sets the tick rate for the current CPU. It is located in ROM,
+  *       so the deep sleep stub can use it even if IRAM is not initialized yet.
+  *
+  * @param  uint32_t ticks_per_us : CPU ticks per us.
+  *
+  * @return None
+  */
+void ets_update_cpu_frequency_rom(uint32_t ticks_per_us);
+
+/**
+  * @brief  Get the real CPU ticks per us to the ets.
+  *         This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.
+  *
+  * @param  None
+  *
+  * @return uint32_t : CPU ticks per us record in ets.
+  */
+uint32_t ets_get_cpu_frequency(void);
+
+/**
+  * @brief  Get xtal_freq/analog_8M*256 value calibrated in rtc module.
+  *
+  * @param  None
+  *
+  * @return uint32_t : xtal_freq/analog_8M*256.
+  */
+uint32_t ets_get_xtal_scale(void);
+
+/**
+  * @brief  Get xtal_freq value, If value not stored in RTC_STORE5, than store.
+  *
+  * @param  None
+  *
+  * @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register.
+  *                         clock = (REG_READ(RTC_STORE5) & 0xffff) << 12;
+  *            else if analog_8M in efuse
+  *                         clock = ets_get_xtal_scale() * 15625 * ets_efuse_get_8M_clock() / 40;
+  *                    else clock = 26M.
+  */
+uint32_t ets_get_detected_xtal_freq(void);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_intr_apis, ets interrupt configure related apis
+  * @brief ets intr apis
+  */
+
+/** @addtogroup ets_intr_apis
+  * @{
+  */
+
+typedef void (* ets_isr_t)(void *);/**< interrupt handler type*/
+
+/**
+  * @brief  Attach a interrupt handler to a CPU interrupt number.
+  *         This function equals to _xtos_set_interrupt_handler_arg(i, func, arg).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  int i : CPU interrupt number.
+  *
+  * @param  ets_isr_t func : Interrupt handler.
+  *
+  * @param  void *arg : argument of the handler.
+  *
+  * @return None
+  */
+void ets_isr_attach(int i, ets_isr_t func, void *arg);
+
+/**
+  * @brief  Mask the interrupts which show in mask bits.
+  *         This function equals to _xtos_ints_off(mask).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  uint32_t mask : BIT(i) means mask CPU interrupt number i.
+  *
+  * @return None
+  */
+void ets_isr_mask(uint32_t mask);
+
+/**
+  * @brief  Unmask the interrupts which show in mask bits.
+  *         This function equals to _xtos_ints_on(mask).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  uint32_t mask : BIT(i) means mask CPU interrupt number i.
+  *
+  * @return None
+  */
+void ets_isr_unmask(uint32_t unmask);
+
+/**
+  * @brief  Lock the interrupt to level 2.
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_intr_lock(void);
+
+/**
+  * @brief  Unlock the interrupt to level 0.
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_intr_unlock(void);
+
+/**
+  * @brief  Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt).
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_waiti0(void);
+
+/**
+  * @brief  Attach an CPU interrupt to a hardware source.
+  *         We have 4 steps to use an interrupt:
+  *         1.Attach hardware interrupt source to CPU.  intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);
+  *         2.Set interrupt handler.                    xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);
+  *         3.Enable interrupt for CPU.                 xt_ints_on(1 << ETS_WMAC_INUM);
+  *         4.Enable interrupt in the module.
+  *
+  * @param  int cpu_no : The CPU which the interrupt number belongs.
+  *
+  * @param  uint32_t model_num : The interrupt hardware source number, please see the interrupt hardware source table.
+  *
+  * @param  uint32_t intr_num : The interrupt number CPU, please see the interrupt cpu using table.
+  *
+  * @return None
+  */
+void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
+
+#define _ETSTR(v) # v
+#define _ETS_SET_INTLEVEL(intlevel)        ({ unsigned __tmp; \
+            __asm__ __volatile__(   "rsil   %0, " _ETSTR(intlevel) "\n" \
+                        : "=a" (__tmp) : : "memory" ); \
+            })
+
+#ifdef CONFIG_NONE_OS
+#define ETS_INTR_LOCK() \
+        ets_intr_lock()
+
+#define ETS_INTR_UNLOCK() \
+        ets_intr_unlock()
+
+#define ETS_ISR_ATTACH \
+        ets_isr_attach
+
+#define ETS_INTR_ENABLE(inum) \
+        ets_isr_unmask((1<<inum))
+
+#define ETS_INTR_DISABLE(inum) \
+        ets_isr_mask((1<<inum))
+
+#define ETS_WMAC_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_WMAC_INUM, (func), (void *)(arg))
+
+#define ETS_TG0_T0_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_TG0_T0_INUM, (func), (void *)(arg))
+
+#define ETS_GPIO_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_GPIO_INUM, (func), (void *)(arg))
+
+#define ETS_UART0_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_UART0_INUM, (func), (void *)(arg))
+
+#define ETS_WDT_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_WDT_INUM, (func), (void *)(arg))
+
+#define ETS_SLC_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_SLC_INUM, (func), (void *)(arg))
+
+#define ETS_BB_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_BB_INUM)
+
+#define ETS_BB_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_BB_INUM)
+
+#define ETS_UART0_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_UART0_INUM)
+
+#define ETS_UART0_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_UART0_INUM)
+
+#define ETS_GPIO_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_GPIO_INUM)
+
+#define ETS_GPIO_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_GPIO_INUM)
+
+#define ETS_WDT_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_WDT_INUM)
+
+#define ETS_WDT_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_WDT_INUM)
+
+#define ETS_TG0_T0_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_TG0_T0_INUM)
+
+#define ETS_TG0_T0_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_TG0_T0_INUM)
+
+#define ETS_SLC_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_SLC_INUM)
+
+#define ETS_SLC_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_SLC_INUM)
+#endif
+
+/**
+  * @}
+  */
+
+#ifndef MAC2STR
+#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
+#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
+#endif
+
+#define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
+
+typedef enum {
+    OK = 0,
+    FAIL,
+    PENDING,
+    BUSY,
+    CANCEL,
+} STATUS;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_ETS_SYS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/gpio.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/gpio.h
new file mode 100644
index 00000000000..ef6e3c512a7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/gpio.h
@@ -0,0 +1,308 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_GPIO_H_
+#define _ROM_GPIO_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_attr.h"
+
+#include "sdkconfig.h"
+
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
+#include "soc/gpio_reg.h"
+#include "soc/soc_caps.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup gpio_apis, uart configuration and communication related apis
+  * @brief gpio apis
+  */
+
+/** @addtogroup gpio_apis
+  * @{
+  */
+
+#define GPIO_REG_READ(reg)              READ_PERI_REG(reg)
+#define GPIO_REG_WRITE(reg, val)        WRITE_PERI_REG(reg, val)
+#define GPIO_ID_PIN0                    0
+#define GPIO_ID_PIN(n)                  (GPIO_ID_PIN0+(n))
+#define GPIO_PIN_ADDR(i)                (GPIO_PIN0_REG + i*4)
+
+#define GPIO_FUNC_IN_HIGH               0x38
+#define GPIO_FUNC_IN_LOW                0x30
+
+#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
+    ((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
+
+#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
+
+typedef enum {
+    GPIO_PIN_INTR_DISABLE = 0,
+    GPIO_PIN_INTR_POSEDGE = 1,
+    GPIO_PIN_INTR_NEGEDGE = 2,
+    GPIO_PIN_INTR_ANYEDGE = 3,
+    GPIO_PIN_INTR_LOLEVEL = 4,
+    GPIO_PIN_INTR_HILEVEL = 5
+} GPIO_INT_TYPE;
+
+#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
+        ((gpio_no < 32) ? gpio_output_set(bit_value<<gpio_no, (bit_value ? 0 : 1)<<gpio_no, 1<<gpio_no,0) : \
+                         gpio_output_set_high(bit_value<<(gpio_no - 32), (bit_value ? 0 : 1)<<(gpio_no - 32), 1<<(gpio_no -32),0))
+#define GPIO_DIS_OUTPUT(gpio_no)    ((gpio_no < 32) ? gpio_output_set(0,0,0, 1<<gpio_no) : gpio_output_set_high(0,0,0, 1<<(gpio_no - 32)))
+#define GPIO_INPUT_GET(gpio_no)     ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))&BIT0))
+
+/* GPIO interrupt handler, registered through gpio_intr_handler_register */
+typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
+
+/**
+  * @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
+  *        to initialize "output enables" and pin configurations for each gpio pin.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void gpio_init(void);
+
+/**
+  * @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
+  *         There is no particular ordering guaranteed; so if the order of writes is significant,
+  *         calling code should divide a single call into multiple calls.
+  *
+  * @param  uint32_t set_mask : the gpios that need high level.
+  *
+  * @param  uint32_t clear_mask : the gpios that need low level.
+  *
+  * @param  uint32_t enable_mask : the gpios that need be changed.
+  *
+  * @param  uint32_t disable_mask : the gpios that need diable output.
+  *
+  * @return None
+  */
+void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
+
+/**
+  * @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
+  *         There is no particular ordering guaranteed; so if the order of writes is significant,
+  *         calling code should divide a single call into multiple calls.
+  *
+  * @param  uint32_t set_mask : the gpios that need high level.
+  *
+  * @param  uint32_t clear_mask : the gpios that need low level.
+  *
+  * @param  uint32_t enable_mask : the gpios that need be changed.
+  *
+  * @param  uint32_t disable_mask : the gpios that need diable output.
+  *
+  * @return None
+  */
+void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
+
+/**
+  * @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
+  */
+uint32_t gpio_input_get(void);
+
+/**
+  * @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32.
+  */
+uint32_t gpio_input_get_high(void);
+
+/**
+  * @brief Register an application-specific interrupt handler for GPIO pin interrupts.
+  *        Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
+  *        Please do not call this function in SDK.
+  *
+  * @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler
+  *
+  * @param void *arg : gpio application-specific interrupt handler argument.
+  *
+  * @return None
+  */
+void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
+
+/**
+  * @brief Get gpio interrupts which happens but not processed.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
+  */
+uint32_t gpio_intr_pending(void);
+
+/**
+  * @brief Get gpio interrupts which happens but not processed.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
+  */
+uint32_t gpio_intr_pending_high(void);
+
+/**
+  * @brief Ack gpio interrupts to process pending interrupts.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
+  *
+  * @return None
+  */
+void gpio_intr_ack(uint32_t ack_mask);
+
+/**
+  * @brief Ack gpio interrupts to process pending interrupts.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
+  *
+  * @return None
+  */
+void gpio_intr_ack_high(uint32_t ack_mask);
+
+/**
+  * @brief Set GPIO to wakeup the ESP32.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t i: gpio number.
+  *
+  * @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
+  *
+  * @return None
+  */
+void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
+
+/**
+  * @brief disable GPIOs to wakeup the ESP32.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void gpio_pin_wakeup_disable(void);
+
+/**
+  * @brief set gpio input to a signal, one gpio can input to several signals.
+  *
+  * @param uint32_t gpio : gpio number, 0~0x27
+  *                        gpio == 0x30, input 0 to signal
+  *                        gpio == 0x34, ???
+  *                        gpio == 0x38, input 1 to signal
+  *
+  * @param uint32_t signal_idx : signal index.
+  *
+  * @param bool inv : the signal is inv or not
+  *
+  * @return None
+  */
+void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
+
+/**
+  * @brief set signal output to gpio, one signal can output to several gpios.
+  *
+  * @param uint32_t gpio : gpio number, 0~0x27
+  *
+  * @param uint32_t signal_idx : signal index.
+  *                        signal_idx == 0x100, cancel output put to the gpio
+  *
+  * @param bool out_inv : the signal output is inv or not
+  *
+  * @param bool oen_inv : the signal output enable is inv or not
+  *
+  * @return None
+  */
+void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv);
+
+/**
+  * @brief Select pad as a gpio function from IOMUX.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x27
+  *
+  * @return None
+  */
+void gpio_pad_select_gpio(uint8_t gpio_num);
+
+/**
+  * @brief Set pad driver capability.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x27
+  *
+  * @param uint8_t drv : 0-3
+  *
+  * @return None
+  */
+void gpio_pad_set_drv(uint8_t gpio_num, uint8_t drv);
+
+/**
+  * @brief Pull up the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x27
+  *
+  * @return None
+  */
+void gpio_pad_pullup(uint8_t gpio_num);
+
+/**
+  * @brief Pull down the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x27
+  *
+  * @return None
+  */
+void gpio_pad_pulldown(uint8_t gpio_num);
+
+/**
+  * @brief Unhold the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x27
+  *
+  * @return None
+  */
+void gpio_pad_unhold(uint8_t gpio_num);
+
+/**
+  * @brief Hold the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x27
+  *
+  * @return None
+  */
+void gpio_pad_hold(uint8_t gpio_num);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_GPIO_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/libc_stubs.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/libc_stubs.h
new file mode 100644
index 00000000000..47e75bcb33b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/libc_stubs.h
@@ -0,0 +1,89 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ROM_LIBC_STUBS_H_
+#define _ROM_LIBC_STUBS_H_
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <reent.h>
+#include <errno.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ESP32 ROM code contains implementations of some of C library functions.
+Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall
+implementation defined in the following struct.
+
+The table itself, by default, is not allocated in RAM. There are two pointers, `syscall_table_ptr_pro` and
+`syscall_table_ptr_app`, which can be set to point to the locations of syscall tables of CPU 0 (aka PRO CPU)
+and CPU 1 (aka APP CPU). Location of these pointers in .bss segment of ROM code is defined in linker script.
+
+So, before using any of the C library functions (except for pure functions and memcpy/memset functions),
+application must allocate syscall table structure for each CPU being used, and populate it with pointers
+to actual implementations of corresponding syscalls.
+*/
+
+struct syscall_stub_table
+{
+    struct _reent* (*__getreent)(void);
+    void* (*_malloc_r)(struct _reent *r, size_t);
+    void (*_free_r)(struct _reent *r, void*);
+    void* (*_realloc_r)(struct _reent *r, void*, size_t);
+    void* (*_calloc_r)(struct _reent *r, size_t, size_t);
+    void (*_abort)(void);
+    int (*_system_r)(struct _reent *r, const char*);
+    int (*_rename_r)(struct _reent *r, const char*, const char*);
+    clock_t (*_times_r)(struct _reent *r, struct tms *);
+    int (*_gettimeofday_r) (struct _reent *r, struct timeval *, void *);
+    void (*_raise_r)(struct _reent *r); /* function signature is incorrect in ROM */
+    int (*_unlink_r)(struct _reent *r, const char*);
+    int (*_link_r)(struct _reent *r, const char*, const char*);
+    int (*_stat_r)(struct _reent *r, const char*, struct stat *);
+    int (*_fstat_r)(struct _reent *r, int, struct stat *);
+    void* (*_sbrk_r)(struct _reent *r, ptrdiff_t);
+    int (*_getpid_r)(struct _reent *r);
+    int (*_kill_r)(struct _reent *r, int, int);
+    void (*_exit_r)(struct _reent *r, int);
+    int (*_close_r)(struct _reent *r, int);
+    int (*_open_r)(struct _reent *r, const char *, int, int);
+    int (*_write_r)(struct _reent *r, int, const void *, int);
+    int (*_lseek_r)(struct _reent *r, int, int, int);
+    int (*_read_r)(struct _reent *r, int, void *, int);
+    void (*_lock_init)(_lock_t *lock);
+    void (*_lock_init_recursive)(_lock_t *lock);
+    void (*_lock_close)(_lock_t *lock);
+    void (*_lock_close_recursive)(_lock_t *lock);
+    void (*_lock_acquire)(_lock_t *lock);
+    void (*_lock_acquire_recursive)(_lock_t *lock);
+    int (*_lock_try_acquire)(_lock_t *lock);
+    int (*_lock_try_acquire_recursive)(_lock_t *lock);
+    void (*_lock_release)(_lock_t *lock);
+    void (*_lock_release_recursive)(_lock_t *lock);
+    int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
+    int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
+};
+
+extern struct syscall_stub_table* syscall_table_ptr_pro;
+extern struct syscall_stub_table* syscall_table_ptr_app;
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif /* _ROM_LIBC_STUBS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/lldesc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/lldesc.h
new file mode 100644
index 00000000000..ae5b4160ba1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/lldesc.h
@@ -0,0 +1,176 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_LLDESC_H_
+#define _ROM_LLDESC_H_
+
+#include <stdint.h>
+
+#include "sys/queue.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LLDESC_TX_MBLK_SIZE                 268 /* */
+#define LLDESC_RX_SMBLK_SIZE                64  /* small block size, for small mgmt frame */
+#define LLDESC_RX_MBLK_SIZE                 524 /* rx is large sinec we want to contain mgmt frame in one block*/
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_SIZE    64  /* it is a small buffer which is a cycle link*/
+#define LLDESC_RX_AMPDU_LEN_MBLK_SIZE      256 /*for ampdu entry*/
+#ifdef ESP_MAC_5
+#define LLDESC_TX_MBLK_NUM                  116  /* 64K / 256 */
+#define LLDESC_RX_MBLK_NUM                  82 /* 64K / 512 MAX 172*/
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM     4
+#define LLDESC_RX_AMPDU_LEN_MLBK_NUM       12
+#else
+#ifdef SBUF_RXTX
+#define LLDESC_TX_MBLK_NUM_MAX    (2 * 48) /* 23K / 260 - 8 */
+#define LLDESC_RX_MBLK_NUM_MAX    (2 * 48) /* 23K / 524 */
+#define LLDESC_TX_MBLK_NUM_MIN    (2 * 16) /* 23K / 260 - 8 */
+#define LLDESC_RX_MBLK_NUM_MIN    (2 * 16) /* 23K / 524 */
+#endif
+#define LLDESC_TX_MBLK_NUM      10      //(2 * 32) /* 23K / 260 - 8 */
+
+#ifdef IEEE80211_RX_AMPDU
+#define LLDESC_RX_MBLK_NUM      30
+#else
+#define LLDESC_RX_MBLK_NUM      10
+#endif /*IEEE80211_RX_AMPDU*/
+
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM  4
+#define LLDESC_RX_AMPDU_LEN_MLBK_NUM    8
+#endif /* !ESP_MAC_5 */
+/*
+ *  SLC2 DMA Desc struct, aka lldesc_t
+ *
+ * --------------------------------------------------------------
+ * | own | EoF | sub_sof | 5'b0   | length [11:0] | size [11:0] |
+ * --------------------------------------------------------------
+ * |            buf_ptr [31:0]                                  |
+ * --------------------------------------------------------------
+ * |            next_desc_ptr [31:0]                            |
+ * --------------------------------------------------------------
+ */
+
+/* this bitfield is start from the LSB!!! */
+typedef struct lldesc_s {
+    volatile uint32_t size  :12,
+                        length:12,
+                        offset: 5, /* h/w reserved 5bit, s/w use it as offset in buffer */
+                        sosf  : 1, /* start of sub-frame */
+                        eof   : 1, /* end of frame */
+                        owner : 1; /* hw or sw */
+    volatile uint8_t *buf;       /* point to buffer data */
+    union{
+        volatile uint32_t empty;
+        STAILQ_ENTRY(lldesc_s) qe;  /* pointing to the next desc */
+    };
+} lldesc_t;
+
+typedef struct tx_ampdu_entry_s{
+    uint32_t sub_len  :12,
+              dili_num : 7,
+                       : 1,
+              null_byte: 2,
+              data     : 1,
+              enc      : 1,
+              seq      : 8;
+} tx_ampdu_entry_t;
+
+typedef struct lldesc_chain_s {
+    lldesc_t *head;
+    lldesc_t *tail;
+} lldesc_chain_t;
+
+#ifdef SBUF_RXTX
+enum sbuf_mask_s  {
+    SBUF_MOVE_NO = 0,
+    SBUF_MOVE_TX2RX,
+    SBUF_MOVE_RX2TX,
+} ;
+
+#define SBUF_MOVE_STEP 8
+#endif
+#define LLDESC_SIZE  sizeof(struct lldesc_s)
+
+/* SLC Descriptor  */
+#define LLDESC_OWNER_MASK                  0x80000000
+#define LLDESC_OWNER_SHIFT                         31
+#define LLDESC_SW_OWNED                             0
+#define LLDESC_HW_OWNED                             1
+
+#define LLDESC_EOF_MASK                    0x40000000
+#define LLDESC_EOF_SHIFT                           30
+
+#define LLDESC_SOSF_MASK                   0x20000000
+#define LLDESC_SOSF_SHIFT                          29
+
+#define LLDESC_LENGTH_MASK                 0x00fff000
+#define LLDESC_LENGTH_SHIFT                        12
+
+#define LLDESC_SIZE_MASK                   0x00000fff
+#define LLDESC_SIZE_SHIFT                           0
+
+#define LLDESC_ADDR_MASK                    0x000fffff
+
+void lldesc_build_chain(uint8_t *descptr, uint32_t desclen, uint8_t * mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
+                          lldesc_t **head,
+#ifdef TO_HOST_RESTART
+                          lldesc_t ** one_before_tail,
+#endif
+                          lldesc_t **tail);
+
+lldesc_t *lldesc_num2link(lldesc_t * head, uint16_t nblks);
+
+lldesc_t *lldesc_set_owner(lldesc_t * head, uint16_t nblks, uint8_t owner);
+
+static inline uint32_t lldesc_get_chain_length(lldesc_t *head)
+{
+    lldesc_t *ds = head;
+    uint32_t len = 0;
+
+    while (ds) {
+        len += ds->length;
+        ds = STAILQ_NEXT(ds, qe);
+    }
+
+    return len;
+}
+
+static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t len)
+{
+    ds->owner  = owner;
+    ds->eof    = eof;
+    ds->sosf   = sosf;
+    ds->length = len;
+}
+
+#define LLDESC_CONFIG(_desc, _owner, _eof, _sosf, _len)        do { \
+        (_desc)->owner  = (_owner); \
+        (_desc)->eof    = (_eof);   \
+        (_desc)->sosf   = (_sosf);  \
+        (_desc)->length = (_len);   \
+} while(0)
+
+#define LLDESC_FROM_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
+
+#define LLDESC_MAC_RX_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, (ds)->size)
+
+#define LLDESC_TO_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_LLDESC_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/md5_hash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/md5_hash.h
new file mode 100644
index 00000000000..f116f1e670f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/md5_hash.h
@@ -0,0 +1,38 @@
+/*
+ * MD5 internal definitions
+ * Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Alternatively, this software may be distributed under the terms of BSD
+ * license.
+ *
+ * See README and COPYING for more details.
+ */
+
+#ifndef _ROM_MD5_HASH_H_
+#define _ROM_MD5_HASH_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct MD5Context {
+	uint32_t buf[4];
+	uint32_t bits[2];
+	uint8_t in[64];
+};
+
+void MD5Init(struct MD5Context *context);
+void MD5Update(struct MD5Context *context, unsigned char const *buf, unsigned len);
+void MD5Final(unsigned char digest[16], struct MD5Context *context);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_MD5_HASH_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/miniz.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/miniz.h
new file mode 100644
index 00000000000..7661f804468
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/miniz.h
@@ -0,0 +1,791 @@
+#ifndef MINIZ_HEADER_INCLUDED
+#define MINIZ_HEADER_INCLUDED
+
+#include <stdlib.h>
+
+// Defines to completely disable specific portions of miniz.c:
+// If all macros here are defined the only functionality remaining will be CRC-32, adler-32, tinfl, and tdefl.
+
+// Define MINIZ_NO_STDIO to disable all usage and any functions which rely on stdio for file I/O.
+#define MINIZ_NO_STDIO
+
+// If MINIZ_NO_TIME is specified then the ZIP archive functions will not be able to get the current time, or
+// get/set file times, and the C run-time funcs that get/set times won't be called.
+// The current downside is the times written to your archives will be from 1979.
+#define MINIZ_NO_TIME
+
+// Define MINIZ_NO_ARCHIVE_APIS to disable all ZIP archive API's.
+#define MINIZ_NO_ARCHIVE_APIS
+
+// Define MINIZ_NO_ARCHIVE_APIS to disable all writing related ZIP archive API's.
+#define MINIZ_NO_ARCHIVE_WRITING_APIS
+
+// Define MINIZ_NO_ZLIB_APIS to remove all ZLIB-style compression/decompression API's.
+#define MINIZ_NO_ZLIB_APIS
+
+// Define MINIZ_NO_ZLIB_COMPATIBLE_NAME to disable zlib names, to prevent conflicts against stock zlib.
+#define MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+
+// Define MINIZ_NO_MALLOC to disable all calls to malloc, free, and realloc.
+// Note if MINIZ_NO_MALLOC is defined then the user must always provide custom user alloc/free/realloc
+// callbacks to the zlib and archive API's, and a few stand-alone helper API's which don't provide custom user
+// functions (such as tdefl_compress_mem_to_heap() and tinfl_decompress_mem_to_heap()) won't work.
+#define MINIZ_NO_MALLOC
+
+#if defined(__TINYC__) && (defined(__linux) || defined(__linux__))
+  // TODO: Work around "error: include file 'sys\utime.h' when compiling with tcc on Linux
+  #define MINIZ_NO_TIME
+#endif
+
+#if !defined(MINIZ_NO_TIME) && !defined(MINIZ_NO_ARCHIVE_APIS)
+  #include <time.h>
+#endif
+
+//Hardcoded options for Xtensa - JD
+#define MINIZ_X86_OR_X64_CPU 0
+#define MINIZ_LITTLE_ENDIAN 1
+#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 0
+#define MINIZ_HAS_64BIT_REGISTERS 0
+#define TINFL_USE_64BIT_BITBUF 0
+
+
+#if defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || defined(__i386) || defined(__i486__) || defined(__i486) || defined(i386) || defined(__ia64__) || defined(__x86_64__)
+// MINIZ_X86_OR_X64_CPU is only used to help set the below macros.
+#define MINIZ_X86_OR_X64_CPU 1
+#endif
+
+#if (__BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) || MINIZ_X86_OR_X64_CPU
+// Set MINIZ_LITTLE_ENDIAN to 1 if the processor is little endian.
+#define MINIZ_LITTLE_ENDIAN 1
+#endif
+
+#if MINIZ_X86_OR_X64_CPU
+// Set MINIZ_USE_UNALIGNED_LOADS_AND_STORES to 1 on CPU's that permit efficient integer loads and stores from unaligned addresses.
+#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 1
+#endif
+
+#if defined(_M_X64) || defined(_WIN64) || defined(__MINGW64__) || defined(_LP64) || defined(__LP64__) || defined(__ia64__) || defined(__x86_64__)
+// Set MINIZ_HAS_64BIT_REGISTERS to 1 if operations on 64-bit integers are reasonably fast (and don't involve compiler generated calls to helper functions).
+#define MINIZ_HAS_64BIT_REGISTERS 1
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ------------------- zlib-style API Definitions.
+
+// For more compatibility with zlib, miniz.c uses unsigned long for some parameters/struct members. Beware: mz_ulong can be either 32 or 64-bits!
+typedef unsigned long mz_ulong;
+
+// mz_free() internally uses the MZ_FREE() macro (which by default calls free() unless you've modified the MZ_MALLOC macro) to release a block allocated from the heap.
+void mz_free(void *p);
+
+#define MZ_ADLER32_INIT (1)
+// mz_adler32() returns the initial adler-32 value to use when called with ptr==NULL.
+mz_ulong mz_adler32(mz_ulong adler, const unsigned char *ptr, size_t buf_len);
+
+#define MZ_CRC32_INIT (0)
+// mz_crc32() returns the initial CRC-32 value to use when called with ptr==NULL.
+mz_ulong mz_crc32(mz_ulong crc, const unsigned char *ptr, size_t buf_len);
+
+// Compression strategies.
+enum { MZ_DEFAULT_STRATEGY = 0, MZ_FILTERED = 1, MZ_HUFFMAN_ONLY = 2, MZ_RLE = 3, MZ_FIXED = 4 };
+
+// Method
+#define MZ_DEFLATED 8
+
+#ifndef MINIZ_NO_ZLIB_APIS
+
+// Heap allocation callbacks.
+// Note that mz_alloc_func parameter types purpsosely differ from zlib's: items/size is size_t, not unsigned long.
+typedef void *(*mz_alloc_func)(void *opaque, size_t items, size_t size);
+typedef void (*mz_free_func)(void *opaque, void *address);
+typedef void *(*mz_realloc_func)(void *opaque, void *address, size_t items, size_t size);
+
+#define MZ_VERSION          "9.1.15"
+#define MZ_VERNUM           0x91F0
+#define MZ_VER_MAJOR        9
+#define MZ_VER_MINOR        1
+#define MZ_VER_REVISION     15
+#define MZ_VER_SUBREVISION  0
+
+// Flush values. For typical usage you only need MZ_NO_FLUSH and MZ_FINISH. The other values are for advanced use (refer to the zlib docs).
+enum { MZ_NO_FLUSH = 0, MZ_PARTIAL_FLUSH = 1, MZ_SYNC_FLUSH = 2, MZ_FULL_FLUSH = 3, MZ_FINISH = 4, MZ_BLOCK = 5 };
+
+// Return status codes. MZ_PARAM_ERROR is non-standard.
+enum { MZ_OK = 0, MZ_STREAM_END = 1, MZ_NEED_DICT = 2, MZ_ERRNO = -1, MZ_STREAM_ERROR = -2, MZ_DATA_ERROR = -3, MZ_MEM_ERROR = -4, MZ_BUF_ERROR = -5, MZ_VERSION_ERROR = -6, MZ_PARAM_ERROR = -10000 };
+
+// Compression levels: 0-9 are the standard zlib-style levels, 10 is best possible compression (not zlib compatible, and may be very slow), MZ_DEFAULT_COMPRESSION=MZ_DEFAULT_LEVEL.
+enum { MZ_NO_COMPRESSION = 0, MZ_BEST_SPEED = 1, MZ_BEST_COMPRESSION = 9, MZ_UBER_COMPRESSION = 10, MZ_DEFAULT_LEVEL = 6, MZ_DEFAULT_COMPRESSION = -1 };
+
+// Window bits
+#define MZ_DEFAULT_WINDOW_BITS 15
+
+struct mz_internal_state;
+
+// Compression/decompression stream struct.
+typedef struct mz_stream_s
+{
+  const unsigned char *next_in;     // pointer to next byte to read
+  unsigned int avail_in;            // number of bytes available at next_in
+  mz_ulong total_in;                // total number of bytes consumed so far
+
+  unsigned char *next_out;          // pointer to next byte to write
+  unsigned int avail_out;           // number of bytes that can be written to next_out
+  mz_ulong total_out;               // total number of bytes produced so far
+
+  char *msg;                        // error msg (unused)
+  struct mz_internal_state *state;  // internal state, allocated by zalloc/zfree
+
+  mz_alloc_func zalloc;             // optional heap allocation function (defaults to malloc)
+  mz_free_func zfree;               // optional heap free function (defaults to free)
+  void *opaque;                     // heap alloc function user pointer
+
+  int data_type;                    // data_type (unused)
+  mz_ulong adler;                   // adler32 of the source or uncompressed data
+  mz_ulong reserved;                // not used
+} mz_stream;
+
+typedef mz_stream *mz_streamp;
+
+// Returns the version string of miniz.c.
+const char *mz_version(void);
+
+// mz_deflateInit() initializes a compressor with default options:
+// Parameters:
+//  pStream must point to an initialized mz_stream struct.
+//  level must be between [MZ_NO_COMPRESSION, MZ_BEST_COMPRESSION].
+//  level 1 enables a specially optimized compression function that's been optimized purely for performance, not ratio.
+//  (This special func. is currently only enabled when MINIZ_USE_UNALIGNED_LOADS_AND_STORES and MINIZ_LITTLE_ENDIAN are defined.)
+// Return values:
+//  MZ_OK on success.
+//  MZ_STREAM_ERROR if the stream is bogus.
+//  MZ_PARAM_ERROR if the input parameters are bogus.
+//  MZ_MEM_ERROR on out of memory.
+int mz_deflateInit(mz_streamp pStream, int level);
+
+// mz_deflateInit2() is like mz_deflate(), except with more control:
+// Additional parameters:
+//   method must be MZ_DEFLATED
+//   window_bits must be MZ_DEFAULT_WINDOW_BITS (to wrap the deflate stream with zlib header/adler-32 footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate/no header or footer)
+//   mem_level must be between [1, 9] (it's checked but ignored by miniz.c)
+int mz_deflateInit2(mz_streamp pStream, int level, int method, int window_bits, int mem_level, int strategy);
+
+// Quickly resets a compressor without having to reallocate anything. Same as calling mz_deflateEnd() followed by mz_deflateInit()/mz_deflateInit2().
+int mz_deflateReset(mz_streamp pStream);
+
+// mz_deflate() compresses the input to output, consuming as much of the input and producing as much output as possible.
+// Parameters:
+//   pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
+//   flush may be MZ_NO_FLUSH, MZ_PARTIAL_FLUSH/MZ_SYNC_FLUSH, MZ_FULL_FLUSH, or MZ_FINISH.
+// Return values:
+//   MZ_OK on success (when flushing, or if more input is needed but not available, and/or there's more output to be written but the output buffer is full).
+//   MZ_STREAM_END if all input has been consumed and all output bytes have been written. Don't call mz_deflate() on the stream anymore.
+//   MZ_STREAM_ERROR if the stream is bogus.
+//   MZ_PARAM_ERROR if one of the parameters is invalid.
+//   MZ_BUF_ERROR if no forward progress is possible because the input and/or output buffers are empty. (Fill up the input buffer or free up some output space and try again.)
+int mz_deflate(mz_streamp pStream, int flush);
+
+// mz_deflateEnd() deinitializes a compressor:
+// Return values:
+//  MZ_OK on success.
+//  MZ_STREAM_ERROR if the stream is bogus.
+int mz_deflateEnd(mz_streamp pStream);
+
+// mz_deflateBound() returns a (very) conservative upper bound on the amount of data that could be generated by deflate(), assuming flush is set to only MZ_NO_FLUSH or MZ_FINISH.
+mz_ulong mz_deflateBound(mz_streamp pStream, mz_ulong source_len);
+
+// Single-call compression functions mz_compress() and mz_compress2():
+// Returns MZ_OK on success, or one of the error codes from mz_deflate() on failure.
+int mz_compress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
+int mz_compress2(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len, int level);
+
+// mz_compressBound() returns a (very) conservative upper bound on the amount of data that could be generated by calling mz_compress().
+mz_ulong mz_compressBound(mz_ulong source_len);
+
+// Initializes a decompressor.
+int mz_inflateInit(mz_streamp pStream);
+
+// mz_inflateInit2() is like mz_inflateInit() with an additional option that controls the window size and whether or not the stream has been wrapped with a zlib header/footer:
+// window_bits must be MZ_DEFAULT_WINDOW_BITS (to parse zlib header/footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate).
+int mz_inflateInit2(mz_streamp pStream, int window_bits);
+
+// Decompresses the input stream to the output, consuming only as much of the input as needed, and writing as much to the output as possible.
+// Parameters:
+//   pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
+//   flush may be MZ_NO_FLUSH, MZ_SYNC_FLUSH, or MZ_FINISH.
+//   On the first call, if flush is MZ_FINISH it's assumed the input and output buffers are both sized large enough to decompress the entire stream in a single call (this is slightly faster).
+//   MZ_FINISH implies that there are no more source bytes available beside what's already in the input buffer, and that the output buffer is large enough to hold the rest of the decompressed data.
+// Return values:
+//   MZ_OK on success. Either more input is needed but not available, and/or there's more output to be written but the output buffer is full.
+//   MZ_STREAM_END if all needed input has been consumed and all output bytes have been written. For zlib streams, the adler-32 of the decompressed data has also been verified.
+//   MZ_STREAM_ERROR if the stream is bogus.
+//   MZ_DATA_ERROR if the deflate stream is invalid.
+//   MZ_PARAM_ERROR if one of the parameters is invalid.
+//   MZ_BUF_ERROR if no forward progress is possible because the input buffer is empty but the inflater needs more input to continue, or if the output buffer is not large enough. Call mz_inflate() again
+//   with more input data, or with more room in the output buffer (except when using single call decompression, described above).
+int mz_inflate(mz_streamp pStream, int flush);
+
+// Deinitializes a decompressor.
+int mz_inflateEnd(mz_streamp pStream);
+
+// Single-call decompression.
+// Returns MZ_OK on success, or one of the error codes from mz_inflate() on failure.
+int mz_uncompress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
+
+// Returns a string description of the specified error code, or NULL if the error code is invalid.
+const char *mz_error(int err);
+
+// Redefine zlib-compatible names to miniz equivalents, so miniz.c can be used as a drop-in replacement for the subset of zlib that miniz.c supports.
+// Define MINIZ_NO_ZLIB_COMPATIBLE_NAMES to disable zlib-compatibility if you use zlib in the same project.
+#ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+  typedef unsigned char Byte;
+  typedef unsigned int uInt;
+  typedef mz_ulong uLong;
+  typedef Byte Bytef;
+  typedef uInt uIntf;
+  typedef char charf;
+  typedef int intf;
+  typedef void *voidpf;
+  typedef uLong uLongf;
+  typedef void *voidp;
+  typedef void *const voidpc;
+  #define Z_NULL                0
+  #define Z_NO_FLUSH            MZ_NO_FLUSH
+  #define Z_PARTIAL_FLUSH       MZ_PARTIAL_FLUSH
+  #define Z_SYNC_FLUSH          MZ_SYNC_FLUSH
+  #define Z_FULL_FLUSH          MZ_FULL_FLUSH
+  #define Z_FINISH              MZ_FINISH
+  #define Z_BLOCK               MZ_BLOCK
+  #define Z_OK                  MZ_OK
+  #define Z_STREAM_END          MZ_STREAM_END
+  #define Z_NEED_DICT           MZ_NEED_DICT
+  #define Z_ERRNO               MZ_ERRNO
+  #define Z_STREAM_ERROR        MZ_STREAM_ERROR
+  #define Z_DATA_ERROR          MZ_DATA_ERROR
+  #define Z_MEM_ERROR           MZ_MEM_ERROR
+  #define Z_BUF_ERROR           MZ_BUF_ERROR
+  #define Z_VERSION_ERROR       MZ_VERSION_ERROR
+  #define Z_PARAM_ERROR         MZ_PARAM_ERROR
+  #define Z_NO_COMPRESSION      MZ_NO_COMPRESSION
+  #define Z_BEST_SPEED          MZ_BEST_SPEED
+  #define Z_BEST_COMPRESSION    MZ_BEST_COMPRESSION
+  #define Z_DEFAULT_COMPRESSION MZ_DEFAULT_COMPRESSION
+  #define Z_DEFAULT_STRATEGY    MZ_DEFAULT_STRATEGY
+  #define Z_FILTERED            MZ_FILTERED
+  #define Z_HUFFMAN_ONLY        MZ_HUFFMAN_ONLY
+  #define Z_RLE                 MZ_RLE
+  #define Z_FIXED               MZ_FIXED
+  #define Z_DEFLATED            MZ_DEFLATED
+  #define Z_DEFAULT_WINDOW_BITS MZ_DEFAULT_WINDOW_BITS
+  #define alloc_func            mz_alloc_func
+  #define free_func             mz_free_func
+  #define internal_state        mz_internal_state
+  #define z_stream              mz_stream
+  #define deflateInit           mz_deflateInit
+  #define deflateInit2          mz_deflateInit2
+  #define deflateReset          mz_deflateReset
+  #define deflate               mz_deflate
+  #define deflateEnd            mz_deflateEnd
+  #define deflateBound          mz_deflateBound
+  #define compress              mz_compress
+  #define compress2             mz_compress2
+  #define compressBound         mz_compressBound
+  #define inflateInit           mz_inflateInit
+  #define inflateInit2          mz_inflateInit2
+  #define inflate               mz_inflate
+  #define inflateEnd            mz_inflateEnd
+  #define uncompress            mz_uncompress
+  #define crc32                 mz_crc32
+  #define adler32               mz_adler32
+  #define MAX_WBITS             15
+  #define MAX_MEM_LEVEL         9
+  #define zError                mz_error
+  #define ZLIB_VERSION          MZ_VERSION
+  #define ZLIB_VERNUM           MZ_VERNUM
+  #define ZLIB_VER_MAJOR        MZ_VER_MAJOR
+  #define ZLIB_VER_MINOR        MZ_VER_MINOR
+  #define ZLIB_VER_REVISION     MZ_VER_REVISION
+  #define ZLIB_VER_SUBREVISION  MZ_VER_SUBREVISION
+  #define zlibVersion           mz_version
+  #define zlib_version          mz_version()
+#endif // #ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+
+#endif // MINIZ_NO_ZLIB_APIS
+
+// ------------------- Types and macros
+
+typedef unsigned char mz_uint8;
+typedef signed short mz_int16;
+typedef unsigned short mz_uint16;
+typedef unsigned int mz_uint32;
+typedef unsigned int mz_uint;
+typedef long long mz_int64;
+typedef unsigned long long mz_uint64;
+typedef int mz_bool;
+
+#define MZ_FALSE (0)
+#define MZ_TRUE (1)
+
+// An attempt to work around MSVC's spammy "warning C4127: conditional expression is constant" message.
+#ifdef _MSC_VER
+   #define MZ_MACRO_END while (0, 0)
+#else
+   #define MZ_MACRO_END while (0)
+#endif
+
+// ------------------- ZIP archive reading/writing
+
+#ifndef MINIZ_NO_ARCHIVE_APIS
+
+enum
+{
+  MZ_ZIP_MAX_IO_BUF_SIZE = 64*1024,
+  MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE = 260,
+  MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE = 256
+};
+
+typedef struct
+{
+  mz_uint32 m_file_index;
+  mz_uint32 m_central_dir_ofs;
+  mz_uint16 m_version_made_by;
+  mz_uint16 m_version_needed;
+  mz_uint16 m_bit_flag;
+  mz_uint16 m_method;
+#ifndef MINIZ_NO_TIME
+  time_t m_time;
+#endif
+  mz_uint32 m_crc32;
+  mz_uint64 m_comp_size;
+  mz_uint64 m_uncomp_size;
+  mz_uint16 m_internal_attr;
+  mz_uint32 m_external_attr;
+  mz_uint64 m_local_header_ofs;
+  mz_uint32 m_comment_size;
+  char m_filename[MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE];
+  char m_comment[MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE];
+} mz_zip_archive_file_stat;
+
+typedef size_t (*mz_file_read_func)(void *pOpaque, mz_uint64 file_ofs, void *pBuf, size_t n);
+typedef size_t (*mz_file_write_func)(void *pOpaque, mz_uint64 file_ofs, const void *pBuf, size_t n);
+
+struct mz_zip_internal_state_tag;
+typedef struct mz_zip_internal_state_tag mz_zip_internal_state;
+
+typedef enum
+{
+  MZ_ZIP_MODE_INVALID = 0,
+  MZ_ZIP_MODE_READING = 1,
+  MZ_ZIP_MODE_WRITING = 2,
+  MZ_ZIP_MODE_WRITING_HAS_BEEN_FINALIZED = 3
+} mz_zip_mode;
+
+typedef struct mz_zip_archive_tag
+{
+  mz_uint64 m_archive_size;
+  mz_uint64 m_central_directory_file_ofs;
+  mz_uint m_total_files;
+  mz_zip_mode m_zip_mode;
+
+  mz_uint m_file_offset_alignment;
+
+  mz_alloc_func m_pAlloc;
+  mz_free_func m_pFree;
+  mz_realloc_func m_pRealloc;
+  void *m_pAlloc_opaque;
+
+  mz_file_read_func m_pRead;
+  mz_file_write_func m_pWrite;
+  void *m_pIO_opaque;
+
+  mz_zip_internal_state *m_pState;
+
+} mz_zip_archive;
+
+typedef enum
+{
+  MZ_ZIP_FLAG_CASE_SENSITIVE                = 0x0100,
+  MZ_ZIP_FLAG_IGNORE_PATH                   = 0x0200,
+  MZ_ZIP_FLAG_COMPRESSED_DATA               = 0x0400,
+  MZ_ZIP_FLAG_DO_NOT_SORT_CENTRAL_DIRECTORY = 0x0800
+} mz_zip_flags;
+
+// ZIP archive reading
+
+// Inits a ZIP archive reader.
+// These functions read and validate the archive's central directory.
+mz_bool mz_zip_reader_init(mz_zip_archive *pZip, mz_uint64 size, mz_uint32 flags);
+mz_bool mz_zip_reader_init_mem(mz_zip_archive *pZip, const void *pMem, size_t size, mz_uint32 flags);
+
+#ifndef MINIZ_NO_STDIO
+mz_bool mz_zip_reader_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint32 flags);
+#endif
+
+// Returns the total number of files in the archive.
+mz_uint mz_zip_reader_get_num_files(mz_zip_archive *pZip);
+
+// Returns detailed information about an archive file entry.
+mz_bool mz_zip_reader_file_stat(mz_zip_archive *pZip, mz_uint file_index, mz_zip_archive_file_stat *pStat);
+
+// Determines if an archive file entry is a directory entry.
+mz_bool mz_zip_reader_is_file_a_directory(mz_zip_archive *pZip, mz_uint file_index);
+mz_bool mz_zip_reader_is_file_encrypted(mz_zip_archive *pZip, mz_uint file_index);
+
+// Retrieves the filename of an archive file entry.
+// Returns the number of bytes written to pFilename, or if filename_buf_size is 0 this function returns the number of bytes needed to fully store the filename.
+mz_uint mz_zip_reader_get_filename(mz_zip_archive *pZip, mz_uint file_index, char *pFilename, mz_uint filename_buf_size);
+
+// Attempts to locates a file in the archive's central directory.
+// Valid flags: MZ_ZIP_FLAG_CASE_SENSITIVE, MZ_ZIP_FLAG_IGNORE_PATH
+// Returns -1 if the file cannot be found.
+int mz_zip_reader_locate_file(mz_zip_archive *pZip, const char *pName, const char *pComment, mz_uint flags);
+
+// Extracts a archive file to a memory buffer using no memory allocation.
+mz_bool mz_zip_reader_extract_to_mem_no_alloc(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
+mz_bool mz_zip_reader_extract_file_to_mem_no_alloc(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
+
+// Extracts a archive file to a memory buffer.
+mz_bool mz_zip_reader_extract_to_mem(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_mem(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags);
+
+// Extracts a archive file to a dynamically allocated heap buffer.
+void *mz_zip_reader_extract_to_heap(mz_zip_archive *pZip, mz_uint file_index, size_t *pSize, mz_uint flags);
+void *mz_zip_reader_extract_file_to_heap(mz_zip_archive *pZip, const char *pFilename, size_t *pSize, mz_uint flags);
+
+// Extracts a archive file using a callback function to output the file's data.
+mz_bool mz_zip_reader_extract_to_callback(mz_zip_archive *pZip, mz_uint file_index, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_callback(mz_zip_archive *pZip, const char *pFilename, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
+
+#ifndef MINIZ_NO_STDIO
+// Extracts a archive file to a disk file and sets its last accessed and modified times.
+// This function only extracts files, not archive directory records.
+mz_bool mz_zip_reader_extract_to_file(mz_zip_archive *pZip, mz_uint file_index, const char *pDst_filename, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_file(mz_zip_archive *pZip, const char *pArchive_filename, const char *pDst_filename, mz_uint flags);
+#endif
+
+// Ends archive reading, freeing all allocations, and closing the input archive file if mz_zip_reader_init_file() was used.
+mz_bool mz_zip_reader_end(mz_zip_archive *pZip);
+
+// ZIP archive writing
+
+#ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
+
+// Inits a ZIP archive writer.
+mz_bool mz_zip_writer_init(mz_zip_archive *pZip, mz_uint64 existing_size);
+mz_bool mz_zip_writer_init_heap(mz_zip_archive *pZip, size_t size_to_reserve_at_beginning, size_t initial_allocation_size);
+
+#ifndef MINIZ_NO_STDIO
+mz_bool mz_zip_writer_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint64 size_to_reserve_at_beginning);
+#endif
+
+// Converts a ZIP archive reader object into a writer object, to allow efficient in-place file appends to occur on an existing archive.
+// For archives opened using mz_zip_reader_init_file, pFilename must be the archive's filename so it can be reopened for writing. If the file can't be reopened, mz_zip_reader_end() will be called.
+// For archives opened using mz_zip_reader_init_mem, the memory block must be growable using the realloc callback (which defaults to realloc unless you've overridden it).
+// Finally, for archives opened using mz_zip_reader_init, the mz_zip_archive's user provided m_pWrite function cannot be NULL.
+// Note: In-place archive modification is not recommended unless you know what you're doing, because if execution stops or something goes wrong before
+// the archive is finalized the file's central directory will be hosed.
+mz_bool mz_zip_writer_init_from_reader(mz_zip_archive *pZip, const char *pFilename);
+
+// Adds the contents of a memory buffer to an archive. These functions record the current local time into the archive.
+// To add a directory entry, call this method with an archive name ending in a forwardslash with empty buffer.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_writer_add_mem(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, mz_uint level_and_flags);
+mz_bool mz_zip_writer_add_mem_ex(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags, mz_uint64 uncomp_size, mz_uint32 uncomp_crc32);
+
+#ifndef MINIZ_NO_STDIO
+// Adds the contents of a disk file to an archive. This function also records the disk file's modified time into the archive.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_writer_add_file(mz_zip_archive *pZip, const char *pArchive_name, const char *pSrc_filename, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
+#endif
+
+// Adds a file to an archive by fully cloning the data from another archive.
+// This function fully clones the source file's compressed data (no recompression), along with its full filename, extra data, and comment fields.
+mz_bool mz_zip_writer_add_from_zip_reader(mz_zip_archive *pZip, mz_zip_archive *pSource_zip, mz_uint file_index);
+
+// Finalizes the archive by writing the central directory records followed by the end of central directory record.
+// After an archive is finalized, the only valid call on the mz_zip_archive struct is mz_zip_writer_end().
+// An archive must be manually finalized by calling this function for it to be valid.
+mz_bool mz_zip_writer_finalize_archive(mz_zip_archive *pZip);
+mz_bool mz_zip_writer_finalize_heap_archive(mz_zip_archive *pZip, void **pBuf, size_t *pSize);
+
+// Ends archive writing, freeing all allocations, and closing the output file if mz_zip_writer_init_file() was used.
+// Note for the archive to be valid, it must have been finalized before ending.
+mz_bool mz_zip_writer_end(mz_zip_archive *pZip);
+
+// Misc. high-level helper functions:
+
+// mz_zip_add_mem_to_archive_file_in_place() efficiently (but not atomically) appends a memory blob to a ZIP archive.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_add_mem_to_archive_file_in_place(const char *pZip_filename, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
+
+// Reads a single file from an archive into a heap block.
+// Returns NULL on failure.
+//
+// Note: Due to MINIZ_NO_MALLOC, this function will not work.
+//
+void *mz_zip_extract_archive_file_to_heap(const char *pZip_filename, const char *pArchive_name, size_t *pSize, mz_uint zip_flags)  __attribute__((warning("miniz is compiled without malloc so this function does not work")));
+
+#endif // #ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
+
+#endif // #ifndef MINIZ_NO_ARCHIVE_APIS
+
+// ------------------- Low-level Decompression API Definitions
+
+// Decompression flags used by tinfl_decompress().
+// TINFL_FLAG_PARSE_ZLIB_HEADER: If set, the input has a valid zlib header and ends with an adler32 checksum (it's a valid zlib stream). Otherwise, the input is a raw deflate stream.
+// TINFL_FLAG_HAS_MORE_INPUT: If set, there are more input bytes available beyond the end of the supplied input buffer. If clear, the input buffer contains all remaining input.
+// TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF: If set, the output buffer is large enough to hold the entire decompressed stream. If clear, the output buffer is at least the size of the dictionary (typically 32KB).
+// TINFL_FLAG_COMPUTE_ADLER32: Force adler-32 checksum computation of the decompressed bytes.
+enum
+{
+  TINFL_FLAG_PARSE_ZLIB_HEADER = 1,
+  TINFL_FLAG_HAS_MORE_INPUT = 2,
+  TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF = 4,
+  TINFL_FLAG_COMPUTE_ADLER32 = 8
+};
+
+// High level decompression functions:
+// tinfl_decompress_mem_to_heap() decompresses a block in memory to a heap block allocated via malloc().
+// On entry:
+//  pSrc_buf, src_buf_len: Pointer and size of the Deflate or zlib source data to decompress.
+// On return:
+//  Function returns a pointer to the decompressed data, or NULL on failure.
+//  *pOut_len will be set to the decompressed data's size, which could be larger than src_buf_len on uncompressible data.
+//  The caller must call mz_free() on the returned block when it's no longer needed.
+//
+// Note: Due to MINIZ_NO_MALLOC, this function will not work.
+//
+void *tinfl_decompress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags) __attribute__((warning("miniz is compiled without malloc so this function does not work")));
+
+// tinfl_decompress_mem_to_mem() decompresses a block in memory to another block in memory.
+// Returns TINFL_DECOMPRESS_MEM_TO_MEM_FAILED on failure, or the number of bytes written on success.
+#define TINFL_DECOMPRESS_MEM_TO_MEM_FAILED ((size_t)(-1))
+size_t tinfl_decompress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
+
+// tinfl_decompress_mem_to_callback() decompresses a block in memory to an internal 32KB buffer, and a user provided callback function will be called to flush the buffer.
+//
+// Note: Due to MINIZ_NO_MALLOC, this function will not work.
+//
+// Returns 1 on success or 0 or -1 on failure.
+typedef int (*tinfl_put_buf_func_ptr)(const void* pBuf, int len, void *pUser);
+int tinfl_decompress_mem_to_callback(const void *pIn_buf, size_t *pIn_buf_size, tinfl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags) __attribute__((warning("miniz is compiled without malloc so this function does not work")));;
+
+struct tinfl_decompressor_tag; typedef struct tinfl_decompressor_tag tinfl_decompressor;
+
+// Max size of LZ dictionary.
+#define TINFL_LZ_DICT_SIZE 32768
+
+// Return status.
+typedef enum
+{
+  TINFL_STATUS_BAD_PARAM = -3,
+  TINFL_STATUS_ADLER32_MISMATCH = -2,
+  TINFL_STATUS_FAILED = -1,
+  TINFL_STATUS_DONE = 0,
+  TINFL_STATUS_NEEDS_MORE_INPUT = 1,
+  TINFL_STATUS_HAS_MORE_OUTPUT = 2
+} tinfl_status;
+
+// Initializes the decompressor to its initial state.
+#define tinfl_init(r) do { (r)->m_state = 0; } MZ_MACRO_END
+#define tinfl_get_adler32(r) (r)->m_check_adler32
+
+// Main low-level decompressor coroutine function. This is the only function actually needed for decompression. All the other functions are just high-level helpers for improved usability.
+// This is a universal API, i.e. it can be used as a building block to build any desired higher level decompression API. In the limit case, it can be called once per every byte input or output.
+tinfl_status tinfl_decompress(tinfl_decompressor *r, const mz_uint8 *pIn_buf_next, size_t *pIn_buf_size, mz_uint8 *pOut_buf_start, mz_uint8 *pOut_buf_next, size_t *pOut_buf_size, const mz_uint32 decomp_flags);
+
+// Internal/private bits follow.
+enum
+{
+  TINFL_MAX_HUFF_TABLES = 3, TINFL_MAX_HUFF_SYMBOLS_0 = 288, TINFL_MAX_HUFF_SYMBOLS_1 = 32, TINFL_MAX_HUFF_SYMBOLS_2 = 19,
+  TINFL_FAST_LOOKUP_BITS = 10, TINFL_FAST_LOOKUP_SIZE = 1 << TINFL_FAST_LOOKUP_BITS
+};
+
+typedef struct
+{
+  mz_uint8 m_code_size[TINFL_MAX_HUFF_SYMBOLS_0];
+  mz_int16 m_look_up[TINFL_FAST_LOOKUP_SIZE], m_tree[TINFL_MAX_HUFF_SYMBOLS_0 * 2];
+} tinfl_huff_table;
+
+#if MINIZ_HAS_64BIT_REGISTERS
+  #define TINFL_USE_64BIT_BITBUF 1
+#endif
+
+#if TINFL_USE_64BIT_BITBUF
+  typedef mz_uint64 tinfl_bit_buf_t;
+  #define TINFL_BITBUF_SIZE (64)
+#else
+  typedef mz_uint32 tinfl_bit_buf_t;
+  #define TINFL_BITBUF_SIZE (32)
+#endif
+
+struct tinfl_decompressor_tag
+{
+  mz_uint32 m_state, m_num_bits, m_zhdr0, m_zhdr1, m_z_adler32, m_final, m_type, m_check_adler32, m_dist, m_counter, m_num_extra, m_table_sizes[TINFL_MAX_HUFF_TABLES];
+  tinfl_bit_buf_t m_bit_buf;
+  size_t m_dist_from_out_buf_start;
+  tinfl_huff_table m_tables[TINFL_MAX_HUFF_TABLES];
+  mz_uint8 m_raw_header[4], m_len_codes[TINFL_MAX_HUFF_SYMBOLS_0 + TINFL_MAX_HUFF_SYMBOLS_1 + 137];
+};
+
+// ------------------- Low-level Compression API Definitions
+
+// Set TDEFL_LESS_MEMORY to 1 to use less memory (compression will be slightly slower, and raw/dynamic blocks will be output more frequently).
+#define TDEFL_LESS_MEMORY 1
+
+// tdefl_init() compression flags logically OR'd together (low 12 bits contain the max. number of probes per dictionary search):
+// TDEFL_DEFAULT_MAX_PROBES: The compressor defaults to 128 dictionary probes per dictionary search. 0=Huffman only, 1=Huffman+LZ (fastest/crap compression), 4095=Huffman+LZ (slowest/best compression).
+enum
+{
+  TDEFL_HUFFMAN_ONLY = 0, TDEFL_DEFAULT_MAX_PROBES = 128, TDEFL_MAX_PROBES_MASK = 0xFFF
+};
+
+// TDEFL_WRITE_ZLIB_HEADER: If set, the compressor outputs a zlib header before the deflate data, and the Adler-32 of the source data at the end. Otherwise, you'll get raw deflate data.
+// TDEFL_COMPUTE_ADLER32: Always compute the adler-32 of the input data (even when not writing zlib headers).
+// TDEFL_GREEDY_PARSING_FLAG: Set to use faster greedy parsing, instead of more efficient lazy parsing.
+// TDEFL_NONDETERMINISTIC_PARSING_FLAG: Enable to decrease the compressor's initialization time to the minimum, but the output may vary from run to run given the same input (depending on the contents of memory).
+// TDEFL_RLE_MATCHES: Only look for RLE matches (matches with a distance of 1)
+// TDEFL_FILTER_MATCHES: Discards matches <= 5 chars if enabled.
+// TDEFL_FORCE_ALL_STATIC_BLOCKS: Disable usage of optimized Huffman tables.
+// TDEFL_FORCE_ALL_RAW_BLOCKS: Only use raw (uncompressed) deflate blocks.
+// The low 12 bits are reserved to control the max # of hash probes per dictionary lookup (see TDEFL_MAX_PROBES_MASK).
+enum
+{
+  TDEFL_WRITE_ZLIB_HEADER             = 0x01000,
+  TDEFL_COMPUTE_ADLER32               = 0x02000,
+  TDEFL_GREEDY_PARSING_FLAG           = 0x04000,
+  TDEFL_NONDETERMINISTIC_PARSING_FLAG = 0x08000,
+  TDEFL_RLE_MATCHES                   = 0x10000,
+  TDEFL_FILTER_MATCHES                = 0x20000,
+  TDEFL_FORCE_ALL_STATIC_BLOCKS       = 0x40000,
+  TDEFL_FORCE_ALL_RAW_BLOCKS          = 0x80000
+};
+
+// High level compression functions:
+// tdefl_compress_mem_to_heap() compresses a block in memory to a heap block allocated via malloc().
+// On entry:
+//  pSrc_buf, src_buf_len: Pointer and size of source block to compress.
+//  flags: The max match finder probes (default is 128) logically OR'd against the above flags. Higher probes are slower but improve compression.
+// On return:
+//  Function returns a pointer to the compressed data, or NULL on failure.
+//  *pOut_len will be set to the compressed data's size, which could be larger than src_buf_len on uncompressible data.
+//  The caller must free() the returned block when it's no longer needed.
+//
+// Note: Due to MINIZ_NO_MALLOC, this function will not work.
+//
+void *tdefl_compress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags)  __attribute__((warning("miniz is compiled without malloc so this function does not work")));;
+
+// tdefl_compress_mem_to_mem() compresses a block in memory to another block in memory.
+// Returns 0 on failure.
+size_t tdefl_compress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
+
+// Compresses an image to a compressed PNG file in memory.
+// On entry:
+//  pImage, w, h, and num_chans describe the image to compress. num_chans may be 1, 2, 3, or 4.
+//  The image pitch in bytes per scanline will be w*num_chans. The leftmost pixel on the top scanline is stored first in memory.
+//  level may range from [0,10], use MZ_NO_COMPRESSION, MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc. or a decent default is MZ_DEFAULT_LEVEL
+//  If flip is true, the image will be flipped on the Y axis (useful for OpenGL apps).
+// On return:
+//  Function returns a pointer to the compressed data, or NULL on failure.
+//  *pLen_out will be set to the size of the PNG image file.
+//  The caller must mz_free() the returned heap block (which will typically be larger than *pLen_out) when it's no longer needed.
+void *tdefl_write_image_to_png_file_in_memory_ex(const void *pImage, int w, int h, int num_chans, size_t *pLen_out, mz_uint level, mz_bool flip);
+void *tdefl_write_image_to_png_file_in_memory(const void *pImage, int w, int h, int num_chans, size_t *pLen_out);
+
+// Output stream interface. The compressor uses this interface to write compressed data. It'll typically be called TDEFL_OUT_BUF_SIZE at a time.
+typedef mz_bool (*tdefl_put_buf_func_ptr)(const void* pBuf, int len, void *pUser);
+
+// tdefl_compress_mem_to_output() compresses a block to an output stream. The above helpers use this function internally.
+//
+// Note: Due to MINIZ_NO_MALLOC, this function will not work.
+//
+mz_bool tdefl_compress_mem_to_output(const void *pBuf, size_t buf_len, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags)  __attribute__((warning("miniz is compiled without malloc so this function does not work")));;
+
+enum { TDEFL_MAX_HUFF_TABLES = 3, TDEFL_MAX_HUFF_SYMBOLS_0 = 288, TDEFL_MAX_HUFF_SYMBOLS_1 = 32, TDEFL_MAX_HUFF_SYMBOLS_2 = 19, TDEFL_LZ_DICT_SIZE = 32768, TDEFL_LZ_DICT_SIZE_MASK = TDEFL_LZ_DICT_SIZE - 1, TDEFL_MIN_MATCH_LEN = 3, TDEFL_MAX_MATCH_LEN = 258 };
+
+// TDEFL_OUT_BUF_SIZE MUST be large enough to hold a single entire compressed output block (using static/fixed Huffman codes).
+#if TDEFL_LESS_MEMORY
+enum { TDEFL_LZ_CODE_BUF_SIZE = 24 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 12, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
+#else
+enum { TDEFL_LZ_CODE_BUF_SIZE = 64 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 15, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
+#endif
+
+// The low-level tdefl functions below may be used directly if the above helper functions aren't flexible enough. The low-level functions don't make any heap allocations, unlike the above helper functions.
+typedef enum
+{
+  TDEFL_STATUS_BAD_PARAM = -2,
+  TDEFL_STATUS_PUT_BUF_FAILED = -1,
+  TDEFL_STATUS_OKAY = 0,
+  TDEFL_STATUS_DONE = 1,
+} tdefl_status;
+
+// Must map to MZ_NO_FLUSH, MZ_SYNC_FLUSH, etc. enums
+typedef enum
+{
+  TDEFL_NO_FLUSH = 0,
+  TDEFL_SYNC_FLUSH = 2,
+  TDEFL_FULL_FLUSH = 3,
+  TDEFL_FINISH = 4
+} tdefl_flush;
+
+// tdefl's compression state structure.
+typedef struct
+{
+  tdefl_put_buf_func_ptr m_pPut_buf_func;
+  void *m_pPut_buf_user;
+  mz_uint m_flags, m_max_probes[2];
+  int m_greedy_parsing;
+  mz_uint m_adler32, m_lookahead_pos, m_lookahead_size, m_dict_size;
+  mz_uint8 *m_pLZ_code_buf, *m_pLZ_flags, *m_pOutput_buf, *m_pOutput_buf_end;
+  mz_uint m_num_flags_left, m_total_lz_bytes, m_lz_code_buf_dict_pos, m_bits_in, m_bit_buffer;
+  mz_uint m_saved_match_dist, m_saved_match_len, m_saved_lit, m_output_flush_ofs, m_output_flush_remaining, m_finished, m_block_index, m_wants_to_finish;
+  tdefl_status m_prev_return_status;
+  const void *m_pIn_buf;
+  void *m_pOut_buf;
+  size_t *m_pIn_buf_size, *m_pOut_buf_size;
+  tdefl_flush m_flush;
+  const mz_uint8 *m_pSrc;
+  size_t m_src_buf_left, m_out_buf_ofs;
+  mz_uint8 m_dict[TDEFL_LZ_DICT_SIZE + TDEFL_MAX_MATCH_LEN - 1];
+  mz_uint16 m_huff_count[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+  mz_uint16 m_huff_codes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+  mz_uint8 m_huff_code_sizes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+  mz_uint8 m_lz_code_buf[TDEFL_LZ_CODE_BUF_SIZE];
+  mz_uint16 m_next[TDEFL_LZ_DICT_SIZE];
+  mz_uint16 m_hash[TDEFL_LZ_HASH_SIZE];
+  mz_uint8 m_output_buf[TDEFL_OUT_BUF_SIZE];
+} tdefl_compressor;
+
+// Initializes the compressor.
+// There is no corresponding deinit() function because the tdefl API's do not dynamically allocate memory.
+// pBut_buf_func: If NULL, output data will be supplied to the specified callback. In this case, the user should call the tdefl_compress_buffer() API for compression.
+// If pBut_buf_func is NULL the user should always call the tdefl_compress() API.
+// flags: See the above enums (TDEFL_HUFFMAN_ONLY, TDEFL_WRITE_ZLIB_HEADER, etc.)
+tdefl_status tdefl_init(tdefl_compressor *d, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+// Compresses a block of data, consuming as much of the specified input buffer as possible, and writing as much compressed data to the specified output buffer as possible.
+tdefl_status tdefl_compress(tdefl_compressor *d, const void *pIn_buf, size_t *pIn_buf_size, void *pOut_buf, size_t *pOut_buf_size, tdefl_flush flush);
+
+// tdefl_compress_buffer() is only usable when the tdefl_init() is called with a non-NULL tdefl_put_buf_func_ptr.
+// tdefl_compress_buffer() always consumes the entire input buffer.
+tdefl_status tdefl_compress_buffer(tdefl_compressor *d, const void *pIn_buf, size_t in_buf_size, tdefl_flush flush);
+
+tdefl_status tdefl_get_prev_return_status(tdefl_compressor *d);
+mz_uint32 tdefl_get_adler32(tdefl_compressor *d);
+
+// Can't use tdefl_create_comp_flags_from_zip_params if MINIZ_NO_ZLIB_APIS isn't defined, because it uses some of its macros.
+#ifndef MINIZ_NO_ZLIB_APIS
+// Create tdefl_compress() flags given zlib-style compression parameters.
+// level may range from [0,10] (where 10 is absolute max compression, but may be much slower on some files)
+// window_bits may be -15 (raw deflate) or 15 (zlib)
+// strategy may be either MZ_DEFAULT_STRATEGY, MZ_FILTERED, MZ_HUFFMAN_ONLY, MZ_RLE, or MZ_FIXED
+mz_uint tdefl_create_comp_flags_from_zip_params(int level, int window_bits, int strategy);
+#endif // #ifndef MINIZ_NO_ZLIB_APIS
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // MINIZ_HEADER_INCLUDED
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/rsa_pss.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/rsa_pss.h
new file mode 100644
index 00000000000..bfc1e68cdab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/rsa_pss.h
@@ -0,0 +1,50 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "sdkconfig.h"
+#ifdef CONFIG_ESP32_REV_MIN_3
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ETS_SIG_LEN 384 /* Bytes */
+#define ETS_DIGEST_LEN 32 /* SHA-256, bytes */
+
+/* Secure Boot Version 2 - Public Key format */
+typedef struct {
+    uint8_t n[384]; /* Public key modulus */
+    uint32_t e;     /* Public key exponent */
+    uint8_t rinv[384];
+    uint32_t mdash;
+} ets_rsa_pubkey_t;
+
+
+bool ets_rsa_pss_verify(const ets_rsa_pubkey_t *key, const uint8_t *sig, const uint8_t *digest, uint8_t *verified_digest);
+
+void ets_mgf1_sha256(const uint8_t *mgfSeed, size_t seedLen, size_t maskLen, uint8_t *mask);
+
+bool ets_emsa_pss_verify(const uint8_t *encoded_message, const uint8_t *mhash, uint8_t *verified_digest);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // CONFIG_ESP32_REV_MIN_3
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/rtc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/rtc.h
new file mode 100644
index 00000000000..2be040aa99d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/rtc.h
@@ -0,0 +1,251 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_RTC_H_
+#define _ROM_RTC_H_
+
+#include "ets_sys.h"
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "soc/soc.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup rtc_apis, rtc registers and memory related apis
+  * @brief rtc apis
+  */
+
+/** @addtogroup rtc_apis
+  * @{
+  */
+
+/**************************************************************************************
+  *                                       Note:                                       *
+  *       Some Rtc memory and registers are used, in ROM or in internal library.      *
+  *          Please do not use reserved or used rtc memory or registers.              *
+  *                                                                                   *
+  *************************************************************************************
+  *                          RTC  Memory & Store Register usage
+  *************************************************************************************
+  *     rtc memory addr         type    size            usage
+  *     0x3ff61000(0x50000000)  Slow    SIZE_CP         Co-Processor code/Reset Entry
+  *     0x3ff61000+SIZE_CP      Slow    8192-SIZE_CP
+  *
+  *     0x3ff80000(0x400c0000)  Fast    8192            deep sleep entry code
+  *
+  *************************************************************************************
+  *     RTC store registers     usage
+  *     RTC_CNTL_STORE0_REG     Reserved
+  *     RTC_CNTL_STORE1_REG     RTC_SLOW_CLK calibration value
+  *     RTC_CNTL_STORE2_REG     Boot time, low word
+  *     RTC_CNTL_STORE3_REG     Boot time, high word
+  *     RTC_CNTL_STORE4_REG     External XTAL frequency. The frequency must necessarily be even, otherwise there will be a conflict with the low bit, which is used to disable logs in the ROM code.
+  *     RTC_CNTL_STORE5_REG     APB bus frequency
+  *     RTC_CNTL_STORE6_REG     FAST_RTC_MEMORY_ENTRY
+  *     RTC_CNTL_STORE7_REG     FAST_RTC_MEMORY_CRC
+  *************************************************************************************
+  */
+
+#define RTC_SLOW_CLK_CAL_REG    RTC_CNTL_STORE1_REG
+#define RTC_BOOT_TIME_LOW_REG   RTC_CNTL_STORE2_REG
+#define RTC_BOOT_TIME_HIGH_REG  RTC_CNTL_STORE3_REG
+#define RTC_XTAL_FREQ_REG       RTC_CNTL_STORE4_REG
+#define RTC_APB_FREQ_REG        RTC_CNTL_STORE5_REG
+#define RTC_ENTRY_ADDR_REG      RTC_CNTL_STORE6_REG
+#define RTC_RESET_CAUSE_REG     RTC_CNTL_STORE6_REG
+#define RTC_MEMORY_CRC_REG      RTC_CNTL_STORE7_REG
+
+#define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
+
+typedef enum {
+    AWAKE = 0,             //<CPU ON
+    LIGHT_SLEEP = BIT0,    //CPU waiti, PLL ON.  We don't need explicitly set this mode.
+    DEEP_SLEEP  = BIT1     //CPU OFF, PLL OFF, only specific timer could wake up
+} SLEEP_MODE;
+
+typedef enum {
+    NO_MEAN                =  0,
+    POWERON_RESET          =  1,    /**<1, Vbat power on reset*/
+    SW_RESET               =  3,    /**<3, Software reset digital core*/
+    OWDT_RESET             =  4,    /**<4, Legacy watch dog reset digital core*/
+    DEEPSLEEP_RESET        =  5,    /**<3, Deep Sleep reset digital core*/
+    SDIO_RESET             =  6,    /**<6, Reset by SLC module, reset digital core*/
+    TG0WDT_SYS_RESET       =  7,    /**<7, Timer Group0 Watch dog reset digital core*/
+    TG1WDT_SYS_RESET       =  8,    /**<8, Timer Group1 Watch dog reset digital core*/
+    RTCWDT_SYS_RESET       =  9,    /**<9, RTC Watch dog Reset digital core*/
+    INTRUSION_RESET        = 10,    /**<10, Instrusion tested to reset CPU*/
+    TGWDT_CPU_RESET        = 11,    /**<11, Time Group reset CPU*/
+    SW_CPU_RESET           = 12,    /**<12, Software reset CPU*/
+    RTCWDT_CPU_RESET       = 13,    /**<13, RTC Watch dog Reset CPU*/
+    EXT_CPU_RESET          = 14,    /**<14, for APP CPU, reseted by PRO CPU*/
+    RTCWDT_BROWN_OUT_RESET = 15,    /**<15, Reset when the vdd voltage is not stable*/
+    RTCWDT_RTC_RESET       = 16     /**<16, RTC Watch dog reset digital core and rtc module*/
+} RESET_REASON;
+
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)SW_RESET == RESET_REASON_CORE_SW, "SW_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TGWDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TGWDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)SW_CPU_RESET == RESET_REASON_CPU0_SW, "SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+
+typedef enum {
+    NO_SLEEP        = 0,
+    EXT_EVENT0_TRIG = BIT0,
+    EXT_EVENT1_TRIG = BIT1,
+    GPIO_TRIG       = BIT2,
+    TIMER_EXPIRE    = BIT3,
+    SDIO_TRIG       = BIT4,
+    MAC_TRIG        = BIT5,
+    UART0_TRIG      = BIT6,
+    UART1_TRIG      = BIT7,
+    TOUCH_TRIG      = BIT8,
+    SAR_TRIG        = BIT9,
+    BT_TRIG         = BIT10
+} WAKEUP_REASON;
+
+typedef enum {
+    DISEN_WAKEUP       = NO_SLEEP,
+    EXT_EVENT0_TRIG_EN = EXT_EVENT0_TRIG,
+    EXT_EVENT1_TRIG_EN = EXT_EVENT1_TRIG,
+    GPIO_TRIG_EN       = GPIO_TRIG,
+    TIMER_EXPIRE_EN    = TIMER_EXPIRE,
+    SDIO_TRIG_EN       = SDIO_TRIG,
+    MAC_TRIG_EN        = MAC_TRIG,
+    UART0_TRIG_EN      = UART0_TRIG,
+    UART1_TRIG_EN      = UART1_TRIG,
+    TOUCH_TRIG_EN      = TOUCH_TRIG,
+    SAR_TRIG_EN        = SAR_TRIG,
+    BT_TRIG_EN         = BT_TRIG
+} WAKEUP_ENABLE;
+
+typedef enum {
+    NO_INT             = 0,
+    WAKEUP_INT         = BIT0,
+    REJECT_INT         = BIT1,
+    SDIO_IDLE_INT      = BIT2,
+    RTC_WDT_INT        = BIT3,
+    RTC_TIME_VALID_INT = BIT4
+} RTC_INT_REASON;
+
+typedef enum {
+    DISEN_INT             = 0,
+    WAKEUP_INT_EN         = WAKEUP_INT,
+    REJECT_INT_EN         = REJECT_INT,
+    SDIO_IDLE_INT_EN      = SDIO_IDLE_INT,
+    RTC_WDT_INT_EN        = RTC_WDT_INT,
+    RTC_TIME_VALID_INT_EN = RTC_TIME_VALID_INT
+} RTC_INT_EN;
+
+/**
+  * @brief  Get the reset reason for CPU.
+  *
+  * @param  int cpu_no : CPU no.
+  *
+  * @return RESET_REASON
+  */
+RESET_REASON rtc_get_reset_reason(int cpu_no);
+
+/**
+  * @brief  Get the wakeup cause for CPU.
+  *
+  * @param  int cpu_no : CPU no.
+  *
+  * @return WAKEUP_REASON
+  */
+WAKEUP_REASON rtc_get_wakeup_cause(void);
+
+/**
+  * @brief Get CRC for Fast RTC Memory.
+  *
+  * @param  uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory.
+  *
+  * @param  uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte.
+  *
+  * @return uint32_t : CRC32 result
+  */
+uint32_t calc_rtc_memory_crc(uint32_t start_addr, uint32_t crc_len);
+
+/**
+  * @brief Set CRC of Fast RTC memory 0-0x7ff into RTC STORE7.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void set_rtc_memory_crc(void);
+
+/**
+  * @brief Suppress ROM log by setting specific RTC control register.
+  * @note This is not a permanent disable of ROM logging since the RTC register can not retain after chip reset.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+static inline void rtc_suppress_rom_log(void)
+{
+    /* To disable logging in the ROM, only the least significant bit of the register is used,
+     * but since this register is also used to store the frequency of the main crystal (RTC_XTAL_FREQ_REG),
+     * you need to write to this register in the same format.
+     * Namely, the upper 16 bits and lower should be the same.
+     */
+    REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
+}
+
+/**
+  * @brief Software Reset digital core.
+  *
+  * It is not recommended to use this function in esp-idf, use
+  * esp_restart() instead.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void __attribute__((noreturn)) software_reset(void);
+
+/**
+  * @brief Software Reset digital core.
+  *
+  * It is not recommended to use this function in esp-idf, use
+  * esp_restart() instead.
+  *
+  * @param  int cpu_no : The CPU to reset, 0 for PRO CPU, 1 for APP CPU.
+  *
+  * @return None
+  */
+void software_reset_cpu(int cpu_no);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_RTC_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/secure_boot.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/secure_boot.h
new file mode 100644
index 00000000000..50a3fcd4948
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/secure_boot.h
@@ -0,0 +1,121 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "sdkconfig.h"
+
+#pragma once
+
+#include <stdint.h>
+#include "ets_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void ets_secure_boot_start(void);
+
+void ets_secure_boot_finish(void);
+
+void ets_secure_boot_hash(const uint32_t *buf);
+
+void ets_secure_boot_obtain(void);
+
+int ets_secure_boot_check(uint32_t *buf);
+
+void ets_secure_boot_rd_iv(uint32_t *buf);
+
+void ets_secure_boot_rd_abstract(uint32_t *buf);
+
+bool ets_secure_boot_check_start(uint8_t abs_index, uint32_t iv_addr);
+
+int ets_secure_boot_check_finish(uint32_t *abstract);
+
+#ifdef CONFIG_ESP32_REV_MIN_3
+#include "rsa_pss.h"
+
+#define SECURE_BOOT_NUM_BLOCKS 1
+
+#define CRC_SIGN_BLOCK_LEN 1196
+#define SIG_BLOCK_PADDING 4096
+#define ETS_SECURE_BOOT_V2_SIGNATURE_MAGIC 0xE7
+
+// Anti-FI measure: use full words for success/fail internally, instead of 0/non-zero
+typedef enum {
+    SBV2_SUCCESS = 0x3A5A5AA5,
+    SB_SUCCESS   = 0x3A5A5AA5,
+    SBV2_FAILED = 0xA533885A,
+    SB_FAILED   = 0xA533885A,
+} secure_boot_v2_status_t;
+
+/* Secure Boot Version 2 signature format for ESP32 ECO3 */
+typedef struct {
+    uint8_t magic_byte;
+    uint8_t version;
+    uint8_t _reserved1;
+    uint8_t _reserved2;
+    uint8_t image_digest[32];
+    ets_rsa_pubkey_t key;
+    uint8_t signature[384];
+    uint32_t block_crc;
+    uint8_t _padding[16];
+} ets_secure_boot_sig_block_t;
+_Static_assert(sizeof(ets_secure_boot_sig_block_t) == 1216, "invalid sig block size");
+
+/* ROM supports up to 3, but IDF only checks the first one (SECURE_BOOT_NUM_BLOCKS) */
+#define SECURE_BOOT_MAX_APPENDED_SIGN_BLOCKS_TO_IMAGE 3
+
+/* Multiple key block support */
+typedef struct {
+    ets_secure_boot_sig_block_t block[SECURE_BOOT_MAX_APPENDED_SIGN_BLOCKS_TO_IMAGE];
+    uint8_t _padding[4096 - (sizeof(ets_secure_boot_sig_block_t) * SECURE_BOOT_MAX_APPENDED_SIGN_BLOCKS_TO_IMAGE)];
+} ets_secure_boot_signature_t;
+
+_Static_assert(sizeof(ets_secure_boot_signature_t) == 4096, "invalid sig sector size");
+
+typedef struct {
+    const void *key_digests[SECURE_BOOT_NUM_BLOCKS];
+} ets_secure_boot_key_digests_t;
+
+/** @brief Verifies the signature block appended to a firmware image. Implemented in the ROM.
+ *
+ * This function is used to verify the bootloader before burning its public key hash into Efuse.
+ * Also, it is used to verify the app on loading the image on boot and on OTA.
+ *
+ * @param sig The signature block flashed aligned 4096 bytes from the firmware. (ROM implementation expects 3 blocks, sig->block[3]).
+ * @param image_digest The SHA-256 Digest of the firmware to be verified
+ * @param trusted_key_digest The SHA-256 Digest of the public key (ets_rsa_pubkey_t) of a single signature block.
+ * @param verified_digest RSA-PSS signature of image_digest. Pass an uninitialised array.
+ *
+ * @return SBV2_SUCCESS if signature is valid
+ * SBV2_FAILED for failures.
+ */
+secure_boot_v2_status_t ets_secure_boot_verify_signature(const ets_secure_boot_signature_t *sig, const uint8_t *image_digest, const uint8_t *trusted_key_digest, uint8_t *verified_digest);
+
+/** @brief This function verifies the 1st stage bootloader. Implemented in the ROM.
+ *  Reboots post verification. It reads the Efuse key for verification of the public key.
+ *
+ * This function is not used in the current workflow.
+ *
+ */
+void ets_secure_boot_verify_boot_bootloader(void);
+
+/** @brief Confirms if the secure boot V2 has been enabled. Implemented in the ROM.
+ *
+ * In ESP32-ECO3 - It checks the value of ABS_DONE_1 in EFuse.
+ *
+ * @return true if is Secure boot v2 has been enabled
+ * False if Secure boot v2 has not been enabled.
+ */
+bool ets_use_secure_boot_v2(void);
+
+#else
+#define SECURE_BOOT_NUM_BLOCKS 0
+
+#endif /* CONFIG_ESP32_REV_MIN_3 */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/sha.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/sha.h
new file mode 100644
index 00000000000..f43c19d16ac
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/sha.h
@@ -0,0 +1,65 @@
+/*
+  ROM functions for hardware SHA support.
+
+  It is not recommended to use these functions directly.  If using
+  them from esp-idf then use the esp_sha_lock_engine() and
+  esp_sha_lock_memory_block() functions in esp32/sha.h to ensure
+  exclusive access.
+ */
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ROM_SHA_H_
+#define _ROM_SHA_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct SHAContext {
+    bool start;
+    uint32_t total_input_bits[4];
+} SHA_CTX;
+
+enum SHA_TYPE {
+    SHA1 = 0,
+    SHA2_256,
+    SHA2_384,
+    SHA2_512,
+
+
+    SHA_INVALID = -1,
+};
+
+/* Do not use these function in multi core mode due to
+ * inside they have no safe implementation (without DPORT workaround).
+*/
+void ets_sha_init(SHA_CTX *ctx);
+
+void ets_sha_enable(void);
+
+void ets_sha_disable(void);
+
+void ets_sha_update(SHA_CTX *ctx, enum SHA_TYPE type, const uint8_t *input, size_t input_bits);
+
+void ets_sha_finish(SHA_CTX *ctx, enum SHA_TYPE type, uint8_t *output);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_SHA_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/spi_flash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/spi_flash.h
new file mode 100644
index 00000000000..500ba300cbb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/spi_flash.h
@@ -0,0 +1,569 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_SPI_FLASH_H_
+#define _ROM_SPI_FLASH_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_attr.h"
+
+#include "sdkconfig.h"
+
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
+#include "soc/spi_reg.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup spi_flash_apis, spi flash operation related apis
+  * @brief spi_flash apis
+  */
+
+/** @addtogroup spi_flash_apis
+  * @{
+  */
+
+/*************************************************************
+ *                            Note
+ *************************************************************
+ * 1. ESP32 chip have 4 SPI slave/master, however, SPI0 is
+ *    used as an SPI master to access Flash and ext-SRAM by
+ *    Cache module. It will support Decryto read for Flash,
+ *    read/write for ext-SRAM. And SPI1 is also used as an
+ *    SPI master for Flash read/write and ext-SRAM read/write.
+ *    It will support Encrypto write for Flash.
+ * 2. As an SPI master, SPI support Highest clock to 80M,
+ *    however, Flash with 80M Clock should be configured
+ *    for different Flash chips. If you want to use 80M
+ *    clock We should use the SPI that is certified by
+ *    Espressif. However, the certification is not started
+ *    at the time, so please use 40M clock at the moment.
+ * 3. SPI Flash can use 2 lines or 4 lines mode. If you
+ *    use 2 lines mode, you can save two pad SPIHD and
+ *    SPIWP for gpio. ESP32 support configured SPI pad for
+ *    Flash, the configuration is stored in efuse and flash.
+ *    However, the configurations of pads should be certified
+ *    by Espressif. If you use this function, please use 40M
+ *    clock at the moment.
+ * 4. ESP32 support to use Common SPI command to configure
+ *    Flash to QIO mode, if you failed to configure with fix
+ *    command. With Common SPI Command, ESP32 can also provide
+ *    a way to use same Common SPI command groups on different
+ *    Flash chips.
+ * 5. This functions are not protected by packeting, Please use the
+ *************************************************************
+ */
+
+#define PERIPHS_SPI_FLASH_CMD                 SPI_CMD_REG(1)
+#define PERIPHS_SPI_FLASH_ADDR                SPI_ADDR_REG(1)
+#define PERIPHS_SPI_FLASH_CTRL                SPI_CTRL_REG(1)
+#define PERIPHS_SPI_FLASH_CTRL1               SPI_CTRL1_REG(1)
+#define PERIPHS_SPI_FLASH_STATUS              SPI_RD_STATUS_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG              SPI_USER_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG1             SPI_USER1_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG2             SPI_USER2_REG(1)
+#define PERIPHS_SPI_FLASH_C0                  SPI_W0_REG(1)
+#define PERIPHS_SPI_FLASH_C1                  SPI_W1_REG(1)
+#define PERIPHS_SPI_FLASH_C2                  SPI_W2_REG(1)
+#define PERIPHS_SPI_FLASH_C3                  SPI_W3_REG(1)
+#define PERIPHS_SPI_FLASH_C4                  SPI_W4_REG(1)
+#define PERIPHS_SPI_FLASH_C5                  SPI_W5_REG(1)
+#define PERIPHS_SPI_FLASH_C6                  SPI_W6_REG(1)
+#define PERIPHS_SPI_FLASH_C7                  SPI_W7_REG(1)
+#define PERIPHS_SPI_FLASH_TX_CRC              SPI_TX_CRC_REG(1)
+
+#define SPI0_R_QIO_DUMMY_CYCLELEN             3
+#define SPI0_R_QIO_ADDR_BITSLEN               31
+#define SPI0_R_FAST_DUMMY_CYCLELEN            7
+#define SPI0_R_DIO_DUMMY_CYCLELEN             1
+#define SPI0_R_DIO_ADDR_BITSLEN               27
+#define SPI0_R_FAST_ADDR_BITSLEN              23
+#define SPI0_R_SIO_ADDR_BITSLEN               23
+
+#define SPI1_R_QIO_DUMMY_CYCLELEN             3
+#define SPI1_R_QIO_ADDR_BITSLEN               31
+#define SPI1_R_FAST_DUMMY_CYCLELEN            7
+#define SPI1_R_DIO_DUMMY_CYCLELEN             3
+#define SPI1_R_DIO_ADDR_BITSLEN               31
+#define SPI1_R_FAST_ADDR_BITSLEN              23
+#define SPI1_R_SIO_ADDR_BITSLEN               23
+
+#define ESP_ROM_SPIFLASH_W_SIO_ADDR_BITSLEN   23
+
+#define ESP_ROM_SPIFLASH_TWO_BYTE_STATUS_EN   SPI_WRSR_2B
+
+//SPI address register
+#define ESP_ROM_SPIFLASH_BYTES_LEN            24
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_WRITE_NUM  32
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM   64
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_BITS  0x3f
+
+//SPI status register
+#define ESP_ROM_SPIFLASH_BUSY_FLAG            BIT0
+#define ESP_ROM_SPIFLASH_WRENABLE_FLAG        BIT1
+#define ESP_ROM_SPIFLASH_BP0                  BIT2
+#define ESP_ROM_SPIFLASH_BP1                  BIT3
+#define ESP_ROM_SPIFLASH_BP2                  BIT4
+#define ESP_ROM_SPIFLASH_WR_PROTECT           (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
+#define ESP_ROM_SPIFLASH_QE                   BIT9
+#define ESP_ROM_SPIFLASH_BP_MASK_ISSI         (BIT7 | BIT5 | BIT4 | BIT3 | BIT2)
+
+//Extra dummy for flash read
+#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_20M   0
+#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_26M   0
+#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_40M   1
+#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_80M   2
+
+#define FLASH_ID_GD25LQ32C  0xC86016
+
+typedef enum {
+    ESP_ROM_SPIFLASH_QIO_MODE = 0,
+    ESP_ROM_SPIFLASH_QOUT_MODE,
+    ESP_ROM_SPIFLASH_DIO_MODE,
+    ESP_ROM_SPIFLASH_DOUT_MODE,
+    ESP_ROM_SPIFLASH_FASTRD_MODE,
+    ESP_ROM_SPIFLASH_SLOWRD_MODE
+} esp_rom_spiflash_read_mode_t;
+
+typedef enum {
+    ESP_ROM_SPIFLASH_RESULT_OK,
+    ESP_ROM_SPIFLASH_RESULT_ERR,
+    ESP_ROM_SPIFLASH_RESULT_TIMEOUT
+} esp_rom_spiflash_result_t;
+
+typedef struct {
+    uint32_t device_id;
+    uint32_t chip_size;    // chip size in bytes
+    uint32_t block_size;
+    uint32_t sector_size;
+    uint32_t page_size;
+    uint32_t status_mask;
+} esp_rom_spiflash_chip_t;
+
+typedef struct {
+    uint8_t  data_length;
+    uint8_t  read_cmd0;
+    uint8_t  read_cmd1;
+    uint8_t  write_cmd;
+    uint16_t data_mask;
+    uint16_t data;
+} esp_rom_spiflash_common_cmd_t;
+
+/**
+  * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write).
+  *
+  * @param  uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv);
+
+/**
+  * @brief Select SPI Flash to QIO mode when WP pad is read from Flash.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t wp_gpio_num: WP gpio number.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @return None
+  */
+void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi);
+
+/**
+  * @brief Set SPI Flash pad drivers.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t wp_gpio_num: WP gpio number.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @param  uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid
+  *            drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp.
+  *                        Values usually read from falsh by rom code, function usually callde by rom code.
+  *                        if value with bit(3) set, the value is valid, bit[2:0] is the real value.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs);
+
+/**
+  * @brief Select SPI Flash function for pads.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @return None
+  */
+void esp_rom_spiflash_select_padsfunc(uint32_t ishspi);
+
+/**
+  * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @param  uint8_t legacy: In legacy mode, more SPI command is used in line.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy);
+
+/**
+  * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR).
+  *    Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t *status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status);
+
+/**
+  * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t *status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status);
+
+/**
+  * @brief Write status to Flash status register.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t status_value : Value to .
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value);
+
+/**
+  * @brief Use a command to Read Flash status register.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t*status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd);
+
+/**
+  * @brief Config SPI Flash read mode when init.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD.
+  *
+  * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode);
+
+/**
+  * @brief Config SPI Flash clock divisor.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t freqdiv: clock divisor.
+  *
+  * @param  uint8_t spi: 0 for SPI0, 1 for SPI1.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi);
+
+/**
+  * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command.
+  *
+  * @return uint16_t  0 : do not send command any more.
+  *                   1 : go to the next command.
+  *                   n > 1 : skip (n - 1) commands.
+  */
+uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd);
+
+/**
+  * @brief Unlock SPI write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void);
+
+/**
+  * @brief SPI write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Lock error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_lock(void);
+
+/**
+  * @brief Update SPI Flash parameter.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t deviceId : Device ID read from SPI, the low 32 bit.
+  *
+  * @param  uint32_t chip_size : The Flash size.
+  *
+  * @param  uint32_t block_size : The Flash block size.
+  *
+  * @param  uint32_t sector_size : The Flash sector size.
+  *
+  * @param  uint32_t page_size : The Flash page size.
+  *
+  * @param  uint32_t status_mask : The Mask used when read status from Flash(use single CMD).
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Update error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size,
+                                                        uint32_t sector_size, uint32_t page_size, uint32_t status_mask);
+
+/**
+  * @brief Erase whole flash chip.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void);
+
+/**
+  * @brief Erase a 64KB block of flash
+  *        Uses SPI flash command D8H.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t block_num : Which block to erase.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num);
+
+/**
+  * @brief Erase a sector of flash.
+  *        Uses SPI flash command 20H.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t sector_num : Which sector to erase.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num);
+
+/**
+  * @brief Erase some sectors.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t start_addr : Start addr to erase, should be sector aligned.
+  *
+  * @param  uint32_t area_len : Length to erase, should be sector aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len);
+
+/**
+  * @brief Write Data to Flash, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t dest_addr : Address to write, should be 4 bytes aligned.
+  *
+  * @param  const uint32_t *src : The pointer to data which is to write.
+  *
+  * @param  uint32_t len : Length to write, should be 4 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len);
+
+/**
+  * @brief Read Data from Flash, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t src_addr : Address to read, should be 4 bytes aligned.
+  *
+  * @param  uint32_t *dest : The buf to read the data.
+  *
+  * @param  uint32_t len : Length to read, should be 4 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len);
+
+/**
+  * @brief SPI1 go into encrypto mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void esp_rom_spiflash_write_encrypted_enable(void);
+
+/**
+  * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t flash_addr : Address to write, should be 32 bytes aligned.
+  *
+  * @param  uint32_t *data : The pointer to data which is to write.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data);
+
+/**
+  * @brief SPI1 go out of encrypto mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void esp_rom_spiflash_write_encrypted_disable(void);
+
+/**
+  * @brief Write data to flash with transparent encryption.
+  * @note Sectors to be written should already be erased.
+  *
+  * @note Please do not call this function in SDK.
+  *
+  * @param  uint32_t flash_addr : Address to write, should be 32 byte aligned.
+  *
+  * @param  uint32_t *data : The pointer to data to write. Note, this pointer must
+  *                          be 32 bit aligned and the content of the data will be
+  *                          modified by the encryption function.
+  *
+  * @param  uint32_t len : Length to write, should be 32 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len);
+
+
+/** @brief Wait until SPI flash write operation is complete
+ *
+ * @note Please do not call this function in SDK.
+ *
+ * Reads the Write In Progress bit of the SPI flash status register,
+ * repeats until this bit is zero (indicating write complete).
+ *
+ * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete
+ *         ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status.
+ */
+esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi);
+
+
+/** @brief Enable Quad I/O pin functions
+ *
+ * @note Please do not call this function in SDK.
+ *
+ * Sets the HD & WP pin functions for Quad I/O modes, based on the
+ * efuse SPI pin configuration.
+ *
+ * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O.
+ *
+ * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig().
+ * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored.
+ * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored.
+ * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used
+ *   to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI).
+ *   Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral.
+ */
+void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
+
+/**
+ * @brief Clear WEL bit unconditionally.
+ *
+ * @return always ESP_ROM_SPIFLASH_RESULT_OK
+ */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
+
+/** @brief Global esp_rom_spiflash_chip_t structure used by ROM functions
+ *
+ */
+extern esp_rom_spiflash_chip_t g_rom_flashchip;
+
+extern uint8_t g_rom_spiflash_dummy_len_plus[];
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_SPI_FLASH_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/tbconsole.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/tbconsole.h
new file mode 100644
index 00000000000..d6ca069cc75
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/tbconsole.h
@@ -0,0 +1,27 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ROM_TBCONSOLE_H_
+#define _ROM_TBCONSOLE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void start_tb_console(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_TBCONSOLE_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/tjpgd.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/tjpgd.h
new file mode 100644
index 00000000000..3c110a13028
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/tjpgd.h
@@ -0,0 +1,99 @@
+/*----------------------------------------------------------------------------/
+/ TJpgDec - Tiny JPEG Decompressor include file               (C)ChaN, 2012
+/----------------------------------------------------------------------------*/
+#ifndef _TJPGDEC
+#define _TJPGDEC
+/*---------------------------------------------------------------------------*/
+/* System Configurations */
+
+#define	JD_SZBUF		512	/* Size of stream input buffer */
+#define JD_FORMAT		0	/* Output pixel format 0:RGB888 (3 BYTE/pix), 1:RGB565 (1 WORD/pix) */
+#define	JD_USE_SCALE	1	/* Use descaling feature for output */
+#define JD_TBLCLIP		1	/* Use table for saturation (might be a bit faster but increases 1K bytes of code size) */
+
+/*---------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* These types must be 16-bit, 32-bit or larger integer */
+typedef int				INT;
+typedef unsigned int	UINT;
+
+/* These types must be 8-bit integer */
+typedef char			CHAR;
+typedef unsigned char	UCHAR;
+typedef unsigned char	BYTE;
+
+/* These types must be 16-bit integer */
+typedef short			SHORT;
+typedef unsigned short	USHORT;
+typedef unsigned short	WORD;
+typedef unsigned short	WCHAR;
+
+/* These types must be 32-bit integer */
+typedef long			LONG;
+typedef unsigned long	ULONG;
+typedef unsigned long	DWORD;
+
+
+/* Error code */
+typedef enum {
+	JDR_OK = 0,	/* 0: Succeeded */
+	JDR_INTR,	/* 1: Interrupted by output function */
+	JDR_INP,	/* 2: Device error or wrong termination of input stream */
+	JDR_MEM1,	/* 3: Insufficient memory pool for the image */
+	JDR_MEM2,	/* 4: Insufficient stream input buffer */
+	JDR_PAR,	/* 5: Parameter error */
+	JDR_FMT1,	/* 6: Data format error (may be damaged data) */
+	JDR_FMT2,	/* 7: Right format but not supported */
+	JDR_FMT3	/* 8: Not supported JPEG standard */
+} JRESULT;
+
+
+
+/* Rectangular structure */
+typedef struct {
+	WORD left, right, top, bottom;
+} JRECT;
+
+
+
+/* Decompressor object structure */
+typedef struct JDEC JDEC;
+struct JDEC {
+	UINT dctr;				/* Number of bytes available in the input buffer */
+	BYTE* dptr;				/* Current data read ptr */
+	BYTE* inbuf;			/* Bit stream input buffer */
+	BYTE dmsk;				/* Current bit in the current read byte */
+	BYTE scale;				/* Output scaling ratio */
+	BYTE msx, msy;			/* MCU size in unit of block (width, height) */
+	BYTE qtid[3];			/* Quantization table ID of each component */
+	SHORT dcv[3];			/* Previous DC element of each component */
+	WORD nrst;				/* Restart inverval */
+	UINT width, height;		/* Size of the input image (pixel) */
+	BYTE* huffbits[2][2];	/* Huffman bit distribution tables [id][dcac] */
+	WORD* huffcode[2][2];	/* Huffman code word tables [id][dcac] */
+	BYTE* huffdata[2][2];	/* Huffman decoded data tables [id][dcac] */
+	LONG* qttbl[4];			/* Dequaitizer tables [id] */
+	void* workbuf;			/* Working buffer for IDCT and RGB output */
+	BYTE* mcubuf;			/* Working buffer for the MCU */
+	void* pool;				/* Pointer to available memory pool */
+	UINT sz_pool;			/* Size of momory pool (bytes available) */
+	UINT (*infunc)(JDEC*, BYTE*, UINT);/* Pointer to jpeg stream input function */
+	void* device;			/* Pointer to I/O device identifiler for the session */
+};
+
+
+
+/* TJpgDec API functions */
+JRESULT jd_prepare (JDEC*, UINT(*)(JDEC*,BYTE*,UINT), void*, UINT, void*);
+JRESULT jd_decomp (JDEC*, UINT(*)(JDEC*,void*,JRECT*), BYTE);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TJPGDEC */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/uart.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/uart.h
new file mode 100644
index 00000000000..49d0e8cf71b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32/rom/uart.h
@@ -0,0 +1,420 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_UART_H_
+#define _ROM_UART_H_
+
+#include "esp_types.h"
+#include "esp_attr.h"
+#include "ets_sys.h"
+#include "soc/soc.h"
+#include "soc/uart_periph.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup uart_apis, uart configuration and communication related apis
+  * @brief uart apis
+  */
+
+/** @addtogroup uart_apis
+  * @{
+  */
+
+#define RX_BUFF_SIZE                     0x100
+#define TX_BUFF_SIZE                     100
+
+//uart int enable register ctrl bits
+#define UART_RCV_INTEN                   BIT0
+#define UART_TRX_INTEN                   BIT1
+#define UART_LINE_STATUS_INTEN           BIT2
+
+//uart int identification ctrl bits
+#define UART_INT_FLAG_MASK               0x0E
+
+//uart fifo ctrl bits
+#define UART_CLR_RCV_FIFO                BIT1
+#define UART_CLR_TRX_FIFO                BIT2
+#define UART_RCVFIFO_TRG_LVL_BITS        BIT6
+
+//uart line control bits
+#define  UART_DIV_LATCH_ACCESS_BIT       BIT7
+
+//uart line status bits
+#define  UART_RCV_DATA_RDY_FLAG          BIT0
+#define  UART_RCV_OVER_FLOW_FLAG         BIT1
+#define  UART_RCV_PARITY_ERR_FLAG        BIT2
+#define  UART_RCV_FRAME_ERR_FLAG         BIT3
+#define  UART_BRK_INT_FLAG               BIT4
+#define  UART_TRX_FIFO_EMPTY_FLAG        BIT5
+#define  UART_TRX_ALL_EMPTY_FLAG         BIT6   // include fifo and shift reg
+#define  UART_RCV_ERR_FLAG               BIT7
+
+//send and receive message frame head
+#define FRAME_FLAG                       0x7E
+
+typedef enum {
+    UART_LINE_STATUS_INT_FLAG  = 0x06,
+    UART_RCV_FIFO_INT_FLAG     = 0x04,
+    UART_RCV_TMOUT_INT_FLAG    = 0x0C,
+    UART_TXBUFF_EMPTY_INT_FLAG = 0x02
+} UartIntType;   //consider bit0 for int_flag
+
+typedef enum {
+    RCV_ONE_BYTE      = 0x0,
+    RCV_FOUR_BYTE     = 0x1,
+    RCV_EIGHT_BYTE    = 0x2,
+    RCV_FOURTEEN_BYTE = 0x3
+} UartRcvFifoTrgLvl;
+
+typedef enum {
+    FIVE_BITS  = 0x0,
+    SIX_BITS   = 0x1,
+    SEVEN_BITS = 0x2,
+    EIGHT_BITS = 0x3
+} UartBitsNum4Char;
+
+typedef enum {
+    ONE_STOP_BIT      = 1,
+    ONE_HALF_STOP_BIT = 2,
+    TWO_STOP_BIT      = 3
+} UartStopBitsNum;
+
+typedef enum {
+    NONE_BITS = 0,
+    ODD_BITS  = 2,
+    EVEN_BITS = 3
+
+} UartParityMode;
+
+typedef enum {
+    STICK_PARITY_DIS = 0,
+    STICK_PARITY_EN  = 2
+} UartExistParity;
+
+typedef enum {
+    BIT_RATE_9600   = 9600,
+    BIT_RATE_19200  = 19200,
+    BIT_RATE_38400  = 38400,
+    BIT_RATE_57600  = 57600,
+    BIT_RATE_115200 = 115200,
+    BIT_RATE_230400 = 230400,
+    BIT_RATE_460800 = 460800,
+    BIT_RATE_921600 = 921600
+} UartBautRate;
+
+typedef enum {
+    NONE_CTRL,
+    HARDWARE_CTRL,
+    XON_XOFF_CTRL
+} UartFlowCtrl;
+
+typedef enum {
+    EMPTY,
+    UNDER_WRITE,
+    WRITE_OVER
+} RcvMsgBuffState;
+
+typedef struct {
+    uint8_t *pRcvMsgBuff;
+    uint8_t *pWritePos;
+    uint8_t *pReadPos;
+    uint8_t  TrigLvl;
+    RcvMsgBuffState BuffState;
+} RcvMsgBuff;
+
+typedef struct {
+    uint32_t  TrxBuffSize;
+    uint8_t  *pTrxBuff;
+} TrxMsgBuff;
+
+typedef enum {
+    BAUD_RATE_DET,
+    WAIT_SYNC_FRM,
+    SRCH_MSG_HEAD,
+    RCV_MSG_BODY,
+    RCV_ESC_CHAR,
+} RcvMsgState;
+
+typedef struct {
+    UartBautRate     baut_rate;
+    UartBitsNum4Char data_bits;
+    UartExistParity  exist_parity;
+    UartParityMode   parity;    // chip size in byte
+    UartStopBitsNum  stop_bits;
+    UartFlowCtrl     flow_ctrl;
+    uint8_t          buff_uart_no;  //indicate which uart use tx/rx buffer
+    uint8_t          tx_uart_no;
+    RcvMsgBuff       rcv_buff;
+//    TrxMsgBuff       trx_buff;
+    RcvMsgState      rcv_state;
+    int              received;
+} UartDevice;
+
+/**
+  * @brief Init uart device struct value and reset uart0/uart1 rx.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void uartAttach(void);
+
+/**
+  * @brief Init uart0 or uart1 for UART download booting mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, else for UART1.
+  *
+  * @param  uint32_t clock : clock used by uart module, to adjust baudrate.
+  *
+  * @return None
+  */
+void Uart_Init(uint8_t uart_no, uint32_t clock);
+
+/**
+  * @brief Modify uart baudrate.
+  *        This function will reset RX/TX fifo for uart.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @param  uint32_t DivLatchValue : (clock << 4)/baudrate.
+  *
+  * @return None
+  */
+void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue);
+
+/**
+  * @brief Init uart0 or uart1 for UART download booting mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module, easy to detect, wait until detected;
+  *                           1, two UART modules, hard to detect, detect and return.
+  *
+  * @return None
+  */
+int uart_baudrate_detect(uint8_t uart_no, uint8_t is_sync);
+
+/**
+  * @brief Switch printf channel of uart_tx_one_char.
+  *        Please do not call this function when printf.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None
+  */
+void uart_tx_switch(uint8_t uart_no);
+
+/**
+  * @brief Switch message exchange channel for UART download booting.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None
+  */
+void uart_buff_switch(uint8_t uart_no);
+
+/**
+  * @brief Output a char to printf channel, wait until fifo not full.
+  *
+  * @param  None
+  *
+  * @return OK.
+  */
+STATUS uart_tx_one_char(uint8_t TxChar);
+
+/**
+  * @brief Output a char to message exchange channel, wait until fifo not full.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return OK.
+  */
+STATUS uart_tx_one_char2(uint8_t TxChar);
+
+/**
+  * @brief Wait until uart tx full empty.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None.
+  */
+void uart_tx_flush(uint8_t uart_no);
+
+/**
+  * @brief Wait until uart tx full empty and the last char send ok.
+  *
+  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2
+  *
+  * The function defined in ROM code has a bug, so we define the correct version
+  * here for compatibility.
+  */
+static inline void IRAM_ATTR uart_tx_wait_idle(uint8_t uart_no) {
+    uint32_t status;
+    do {
+        status = READ_PERI_REG(UART_STATUS_REG(uart_no));
+        /* either tx count or state is non-zero */
+    } while ((status & (UART_ST_UTX_OUT_M | UART_TXFIFO_CNT_M)) != 0);
+}
+
+/**
+  * @brief Get an input char from message channel.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pRxChar : the pointer to store the char.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS uart_rx_one_char(uint8_t *pRxChar);
+
+/**
+  * @brief Get an input char from message channel, wait until successful.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return char : input char value.
+  */
+char uart_rx_one_char_block(void);
+
+/**
+  * @brief Get an input string line from message channel.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pString : the pointer to store the string.
+  *
+  * @param  uint8_t MaxStrlen : the max string length, include '\0'.
+  *
+  * @return OK.
+  */
+STATUS UartRxString(uint8_t *pString, uint8_t MaxStrlen);
+
+/**
+  * @brief Process uart received information in the interrupt handler.
+  *        Please do not call this function in SDK.
+  *
+  * @param  void *para : the message receive buffer.
+  *
+  * @return None
+  */
+void uart_rx_intr_handler(void *para);
+
+/**
+  * @brief Get an char from receive buffer.
+  *        Please do not call this function in SDK.
+  *
+  * @param  RcvMsgBuff *pRxBuff : the pointer to the struct that include receive buffer.
+  *
+  * @param  uint8_t *pRxByte : the pointer to store the char.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS uart_rx_readbuff( RcvMsgBuff *pRxBuff, uint8_t *pRxByte);
+
+/**
+  * @brief Get all chars from receive buffer.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pCmdLn : the pointer to store the string.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS UartGetCmdLn(uint8_t *pCmdLn);
+
+/**
+  * @brief Get uart configuration struct.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return UartDevice * : uart configuration struct pointer.
+  */
+UartDevice *GetUartDevice(void);
+
+/**
+  * @brief Send an packet to download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *p : the pointer to output string.
+  *
+  * @param  int len : the string length.
+  *
+  * @return None.
+  */
+void send_packet(uint8_t *p, int len);
+
+/**
+  * @brief Receive an packet from download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *p : the pointer to input string.
+  *
+  * @param  int len : If string length > len, the string will be truncated.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module;
+  *                           1, two UART modules.
+  *
+  * @return int : the length of the string.
+  */
+int recv_packet(uint8_t *p, int len, uint8_t is_sync);
+
+/**
+  * @brief Send an packet to download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pData : the pointer to input string.
+  *
+  * @param  uint16_t DataLen : the string length.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS SendMsg(uint8_t *pData, uint16_t DataLen);
+
+/**
+  * @brief Receive an packet from download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pData : the pointer to input string.
+  *
+  * @param  uint16_t MaxDataLen : If string length > MaxDataLen, the string will be truncated.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module;
+  *                           1, two UART modules.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS RcvMsg(uint8_t *pData, uint16_t MaxDataLen, uint8_t is_sync);
+
+extern UartDevice UartDev;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_UART_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/aes.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/aes.h
new file mode 100644
index 00000000000..d8002ef58cb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/aes.h
@@ -0,0 +1,58 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_AES_H_
+#define _ROM_AES_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AES_BLOCK_SIZE 16
+
+enum AES_TYPE {
+    AES_ENC,
+    AES_DEC,
+};
+
+enum AES_BITS {
+    AES128,
+    AES192,
+    AES256
+};
+
+void ets_aes_enable(void);
+
+void ets_aes_disable(void);
+
+void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap,
+                        bool in_word_swap, bool in_byte_swap,
+                        bool out_word_swap, bool out_byte_swap);
+
+int ets_aes_setkey(enum AES_TYPE type, const void *key, enum AES_BITS bits);
+
+int ets_aes_setkey_enc(const void *key, enum AES_BITS bits);
+
+int ets_aes_setkey_dec(const void *key, enum AES_BITS bits);
+
+void ets_aes_block(const void *input, void *output);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_AES_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/apb_backup_dma.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/apb_backup_dma.h
new file mode 100644
index 00000000000..d4e709b742b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/apb_backup_dma.h
@@ -0,0 +1,25 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void ets_apb_backup_init_lock_func(void(* _apb_backup_lock)(void), void(* _apb_backup_unlock)(void));
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/bigint.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/bigint.h
new file mode 100644
index 00000000000..b63172ea7f7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/bigint.h
@@ -0,0 +1,43 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_BIGINT_H_
+#define _ROM_BIGINT_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void ets_bigint_enable(void);
+
+void ets_bigint_disable(void);
+
+int ets_bigint_multiply(const uint32_t *x, const uint32_t *y, uint32_t len_words);
+
+int ets_bigint_modmult(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, uint32_t len_words);
+
+int ets_bigint_modexp(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, bool constant_time, uint32_t len_words);
+
+void ets_bigint_wait_finish(void);
+
+int ets_bigint_getz(uint32_t *z, uint32_t len_words);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_BIGINT_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/cache.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/cache.h
new file mode 100644
index 00000000000..487143e695d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/cache.h
@@ -0,0 +1,796 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_CACHE_H_
+#define _ROM_CACHE_H_
+
+#include <stdint.h>
+#include "esp_bit_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup cache_apis, cache operation related apis
+  * @brief cache apis
+  */
+
+/** @addtogroup cache_apis
+  * @{
+  */
+#define MIN_ICACHE_SIZE                 16384
+#define MAX_ICACHE_SIZE                 16384
+#define MIN_ICACHE_WAYS                 8
+#define MAX_ICACHE_WAYS                 8
+#define MAX_CACHE_WAYS                  8
+#define MIN_CACHE_LINE_SIZE             32
+#define TAG_SIZE                        4
+#define MIN_ICACHE_BANK_NUM             1
+#define MAX_ICACHE_BANK_NUM             1
+#define CACHE_MEMORY_BANK_NUM           1
+#define CACHE_MEMORY_IBANK_SIZE         0x4000
+
+#define MAX_ITAG_BANK_ITEMS             (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MIN_CACHE_LINE_SIZE)
+#define MAX_ITAG_BLOCK_ITEMS            (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MAX_ICACHE_WAYS / MIN_CACHE_LINE_SIZE)
+#define MAX_ITAG_BANK_SIZE              (MAX_ITAG_BANK_ITEMS * TAG_SIZE)
+#define MAX_ITAG_BLOCK_SIZE             (MAX_ITAG_BLOCK_ITEMS * TAG_SIZE)
+
+typedef enum {
+    CACHE_DCACHE = 0,
+    CACHE_ICACHE0 = 1,
+    CACHE_ICACHE1 = 2,
+} cache_t;
+
+typedef enum {
+    CACHE_MEMORY_INVALID = 0,
+    CACHE_MEMORY_IBANK0 = BIT(0),
+    CACHE_MEMORY_IBANK1 = BIT(1),
+    CACHE_MEMORY_IBANK2 = BIT(2),
+    CACHE_MEMORY_IBANK3 = BIT(3),
+    CACHE_MEMORY_DBANK0 = BIT(0),
+    CACHE_MEMORY_DBANK1 = BIT(1),
+    CACHE_MEMORY_DBANK2 = BIT(2),
+    CACHE_MEMORY_DBANK3 = BIT(3),
+} cache_array_t;
+
+#define ICACHE_SIZE_16KB  CACHE_SIZE_HALF
+#define ICACHE_SIZE_32KB  CACHE_SIZE_FULL
+#define DCACHE_SIZE_32KB  CACHE_SIZE_HALF
+#define DCACHE_SIZE_64KB  CACHE_SIZE_FULL
+
+typedef enum {
+    CACHE_SIZE_HALF = 0,                /*!< 8KB for icache and dcache */
+    CACHE_SIZE_FULL = 1,                /*!< 16KB for icache and dcache */
+} cache_size_t;
+
+typedef enum {
+    CACHE_4WAYS_ASSOC = 0,              /*!< 4 way associated cache */
+    CACHE_8WAYS_ASSOC = 1,              /*!< 8 way associated cache */
+} cache_ways_t;
+
+typedef enum {
+    CACHE_LINE_SIZE_16B = 0,            /*!< 16 Byte cache line size */
+    CACHE_LINE_SIZE_32B = 1,            /*!< 32 Byte cache line size */
+    CACHE_LINE_SIZE_64B = 2,            /*!< 64 Byte cache line size */
+} cache_line_size_t;
+
+typedef enum {
+    CACHE_AUTOLOAD_POSITIVE = 0,        /*!< cache autoload step is positive */
+    CACHE_AUTOLOAD_NEGATIVE = 1,        /*!< cache autoload step is negative */
+} cache_autoload_order_t;
+
+#define CACHE_AUTOLOAD_STEP(i) ((i) - 1)
+
+typedef enum {
+    CACHE_AUTOLOAD_MISS_TRIGGER = 0,    /*!< autoload only triggered by cache miss */
+    CACHE_AUTOLOAD_HIT_TRIGGER  = 1,    /*!< autoload only triggered by cache hit */
+    CACHE_AUTOLOAD_BOTH_TRIGGER = 2,    /*!< autoload triggered both by cache miss and hit */
+} cache_autoload_trigger_t;
+
+typedef enum {
+    CACHE_FREEZE_ACK_BUSY = 0,          /*!< in this mode, cache ack busy to CPU if a cache miss happens*/
+    CACHE_FREEZE_ACK_ERROR  = 1,        /*!< in this mode, cache ack wrong data to CPU and trigger an error if a cache miss happens */
+} cache_freeze_mode_t;
+
+struct cache_mode {
+    uint32_t cache_size;                /*!< cache size in byte */
+    uint16_t cache_line_size;           /*!< cache line size in byte */
+    uint8_t cache_ways;                 /*!< cache ways, always 4 */
+    uint8_t ibus;                     /*!< the cache index, 0 for dcache, 1 for icache */
+};
+
+struct icache_tag_item {
+    uint32_t valid:1;                   /*!< the tag item is valid or not */
+    uint32_t lock:1;                    /*!< the cache line is locked or not */
+    uint32_t fifo_cnt:3;                /*!< fifo cnt, 0 ~ 3 for 4 ways cache */
+    uint32_t tag:13;                    /*!< the tag is the high part of the cache address, however is only 16MB (8MB Ibus + 8MB Dbus) range, and without low part */
+    uint32_t reserved:14;
+};
+
+struct autoload_config {
+    uint8_t order;                      /*!< autoload step is positive or negative */
+    uint8_t trigger;                    /*!< autoload trigger */
+    uint8_t ena0;                       /*!< autoload region0 enable */
+    uint8_t ena1;                       /*!< autoload region1 enable */
+    uint32_t addr0;                     /*!< autoload region0 start address */
+    uint32_t size0;                     /*!< autoload region0 size */
+    uint32_t addr1;                     /*!< autoload region1 start address */
+    uint32_t size1;                     /*!< autoload region1 size */
+};
+
+struct tag_group_info {
+    struct cache_mode mode;                         /*!< cache and cache mode */
+    uint32_t filter_addr;                           /*!< the address that used to generate the struct */
+    uint32_t vaddr_offset;                          /*!< virtual address offset of the cache ways */
+    uint32_t tag_addr[MAX_CACHE_WAYS];              /*!< tag memory address, only [0~mode.ways-1] is valid to use */
+    uint32_t cache_memory_offset[MAX_CACHE_WAYS];   /*!< cache memory address, only [0~mode.ways-1] is valid to use */
+};
+
+struct lock_config {
+    uint32_t addr;                                  /*!< manual lock address*/
+    uint16_t size;                                  /*!< manual lock size*/
+    uint16_t group;                                 /*!< manual lock group, 0 or 1*/
+};
+
+struct cache_internal_stub_table {
+    uint32_t (* icache_line_size)(void);
+    uint32_t (* icache_addr)(uint32_t addr);
+    uint32_t (* dcache_addr)(uint32_t addr);
+    void (* invalidate_icache_items)(uint32_t addr, uint32_t items);
+    void (* lock_icache_items)(uint32_t addr, uint32_t items);
+    void (* unlock_icache_items)(uint32_t addr, uint32_t items);
+    uint32_t (* suspend_icache_autoload)(void);
+    void (* resume_icache_autoload)(uint32_t autoload);
+    void (* freeze_icache_enable)(cache_freeze_mode_t mode);
+    void (* freeze_icache_disable)(void);
+    int (* op_addr)(uint32_t start_addr, uint32_t size, uint32_t cache_line_size, uint32_t max_sync_num, void(* cache_Iop)(uint32_t, uint32_t));
+};
+
+/* Defined in the interface file, default value is rom_default_cache_internal_table */
+extern const struct cache_internal_stub_table* rom_cache_internal_table_ptr;
+
+typedef void (* cache_op_start)(void);
+typedef void (* cache_op_end)(void);
+
+typedef struct {
+    cache_op_start start;
+    cache_op_end end;
+} cache_op_cb_t;
+
+/* Defined in the interface file, default value is NULL */
+extern const cache_op_cb_t* rom_cache_op_cb;
+
+#define ESP_ROM_ERR_INVALID_ARG         1
+#define MMU_SET_ADDR_ALIGNED_ERROR      2
+#define MMU_SET_PASE_SIZE_ERROR         3
+#define MMU_SET_VADDR_OUT_RANGE         4
+
+#define CACHE_OP_ICACHE_Y               1
+#define CACHE_OP_ICACHE_N               0
+
+/**
+  * @brief Initialise cache mmu, mark all entries as invalid.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_MMU_Init(void);
+
+/**
+  * @brief Set ICache mmu mapping.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In
+  *                 esp32c3, external memory is always flash
+  *
+  * @param  uint32_t vaddr : virtual address in CPU address space.
+  *                              Can be Iram0,Iram1,Irom0,Drom0 and AHB buses address.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t paddr : physical address in external memory.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t psize : page size of ICache, in kilobytes. Should be 64 here.
+  *
+  * @param  uint32_t num : pages to be set.
+  *
+  * @param  uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
+  *
+  * @return uint32_t: error status
+  *                   0 : mmu set success
+  *                   2 : vaddr or paddr is not aligned
+  *                   3 : psize error
+  *                   4 : vaddr is out of range
+  */
+int Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr,  uint32_t psize, uint32_t num, uint32_t fixed);
+
+/**
+  * @brief Set DCache mmu mapping.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In
+  *                 esp32c3, external memory is always flash
+  *
+  * @param  uint32_t vaddr : virtual address in CPU address space.
+  *                              Can be DRam0, DRam1, DRom0, DPort and AHB buses address.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t paddr : physical address in external memory.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t psize : page size of DCache, in kilobytes. Should be 64 here.
+  *
+  * @param  uint32_t num : pages to be set.
+
+  * @param  uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
+  *
+  * @return uint32_t: error status
+  *                   0 : mmu set success
+  *                   2 : vaddr or paddr is not aligned
+  *                   3 : psize error
+  *                   4 : vaddr is out of range
+  */
+int Cache_Dbus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
+
+/**
+  * @brief Count the pages in the bus room address which map to Flash.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t bus : the bus to count with.
+  *
+  * @param uint32_t * page0_mapped : value should be initial by user, 0 for not mapped, other for mapped count.
+  *
+  * return uint32_t : the number of pages which map to Flash.
+  */
+uint32_t Cache_Count_Flash_Pages(uint32_t bus, uint32_t * page0_mapped);
+
+/**
+  * @brief allocate memory to used by ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_array_t icache_low : the data array bank used by icache low part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, CACHE_MEMORY_IBANK0
+  *
+  * return none
+  */
+void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low);
+
+/**
+  * @brief Get cache mode of ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct cache_mode * mode : the pointer of cache mode struct, caller should set the icache field
+  *
+  * return none
+  */
+void Cache_Get_Mode(struct cache_mode * mode);
+
+/**
+  * @brief set ICache modes: cache size, associate ways and cache line size.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
+  *
+  * @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
+  *
+  * @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
+  *
+  * return none
+  */
+void Cache_Set_ICache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
+
+/**
+  * @brief set DCache modes: cache size, associate ways and cache line size.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_8KB and CACHE_SIZE_16KB
+  *
+  * @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
+  *
+  * @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
+  *
+  * return none
+  */
+void Cache_Set_DCache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
+
+/**
+  * @brief check if the address is accessed through ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : the address to check.
+  *
+  * @return 1 if the address is accessed through ICache, 0 if not.
+  */
+uint32_t Cache_Address_Through_ICache(uint32_t addr);
+
+/**
+  * @brief check if the address is accessed through DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : the address to check.
+  *
+  * @return 1 if the address is accessed through DCache, 0 if not.
+  */
+uint32_t Cache_Address_Through_DCache(uint32_t addr);
+
+/**
+  * @brief Init mmu owner register to make i/d cache use half mmu entries.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Owner_Init(void);
+
+/**
+  * @brief Invalidate the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to invalidate
+  *
+  * @param  uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Invalidate_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Invalidate the Cache items in the region from ICache or DCache.
+  *        If the region is not in Cache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : invalidated region start address.
+  *
+  * @param  uint32_t size : invalidated region size.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Invalidate_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Invalidate all cache items in ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Invalidate_ICache_All(void);
+
+/**
+  * @brief Mask all buses through ICache and DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Mask_All(void);
+
+/**
+  * @brief Suspend ICache auto preload operation, then you can resume it after some ICache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for ICache not auto preload before suspend.
+  */
+uint32_t Cache_Suspend_ICache_Autoload(void);
+
+/**
+  * @brief Resume ICache auto preload operation after some ICache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for ICache not auto preload before suspend.
+  *
+  * @return None.
+  */
+void Cache_Resume_ICache_Autoload(uint32_t autoload);
+
+/**
+  * @brief Start an ICache manual preload, will suspend auto preload of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of the preload region.
+  *
+  * @param uint32_t size : size of the preload region, should not exceed the size of ICache.
+  *
+  * @param uint32_t order : the preload order, 0 for positive, other for negative
+  *
+  * @return uint32_t : 0 for ICache not auto preload before manual preload.
+  */
+uint32_t Cache_Start_ICache_Preload(uint32_t addr, uint32_t size, uint32_t order);
+
+/**
+  * @brief Return if the ICache manual preload done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for ICache manual preload not done.
+  */
+uint32_t Cache_ICache_Preload_Done(void);
+
+/**
+  * @brief End the ICache manual preload to resume auto preload of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for ICache not auto preload before manual preload.
+  *
+  * @return None
+  */
+void Cache_End_ICache_Preload(uint32_t autoload);
+
+/**
+  * @brief Config autoload parameters of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct autoload_config * config : autoload parameters.
+  *
+  * @return None
+  */
+void Cache_Config_ICache_Autoload(const struct autoload_config * config);
+
+/**
+  * @brief Enable auto preload for ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Enable_ICache_Autoload(void);
+
+/**
+  * @brief Disable auto preload for ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Disable_ICache_Autoload(void);
+
+/**
+  * @brief Config a group of prelock parameters of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct lock_config * config : a group of lock parameters.
+  *
+  * @return None
+  */
+
+void Cache_Enable_ICache_PreLock(const struct lock_config *config);
+
+/**
+  * @brief Disable a group of prelock parameters for ICache.
+  *        However, the locked data will not be released.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint16_t group : 0 for group0, 1 for group1.
+  *
+  * @return None
+  */
+void Cache_Disable_ICache_PreLock(uint16_t group);
+
+/**
+  * @brief Lock the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to lock
+  *
+  * @param  uint32_t items: cache lines to lock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Lock_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Unlock the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to unlock
+  *
+  * @param  uint32_t items: cache lines to unlock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Unlock_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Lock the cache items in tag memory for ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of lock region.
+  *
+  * @param uint32_t size : size of lock region.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Lock_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Unlock the cache items in tag memory for ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of unlock region.
+  *
+  * @param uint32_t size : size of unlock region.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Unlock_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Disable ICache access for the cpu.
+  *        This operation will make all ICache tag memory invalid, CPU can't access ICache, ICache will keep idle.
+  *        Please do not call this function in your SDK application.
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Disable_ICache(void);
+
+/**
+  * @brief Enable ICache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : ICache will preload then.
+  *
+  * @return None
+  */
+void Cache_Enable_ICache(uint32_t autoload);
+
+/**
+  * @brief Suspend ICache access for the cpu.
+  *        The ICache tag memory is still there, CPU can't access ICache, ICache will keep idle.
+  *        Please do not change MMU, cache mode or tag memory(tag memory can be changed in some special case).
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Suspend_ICache(void);
+
+/**
+  * @brief Resume ICache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : ICache will preload then.
+  *
+  * @return None
+  */
+void Cache_Resume_ICache(uint32_t autoload);
+
+/**
+  * @brief Get ICache cache line size
+  *
+  * @param  None
+  *
+  * @return uint32_t: 16, 32, 64 Byte
+  */
+uint32_t Cache_Get_ICache_Line_Size(void);
+
+/**
+  * @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Set_Default_Mode(void);
+
+/**
+  * @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Enable_Defalut_ICache_Mode(void);
+
+/**
+  * @brief Enable freeze for ICache.
+  *        Any miss request will be rejected, including cpu miss and preload/autoload miss.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_freeze_mode_t mode : 0 for assert busy 1 for assert hit
+  *
+  * @return None
+  */
+void Cache_Freeze_ICache_Enable(cache_freeze_mode_t mode);
+
+/**
+  * @brief Disable freeze for ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @return None
+  */
+void Cache_Freeze_ICache_Disable(void);
+
+/**
+  * @brief Travel tag memory to run a call back function.
+  *        ICache and DCache are suspend when doing this.
+  *        The callback will get the parameter tag_group_info, which will include a group of tag memory addresses and cache memory addresses.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to check and the cache mode.
+  *
+  * @param  uint32_t filter_addr : only the cache lines which may include the filter_address will be returned to the call back function.
+  *                                0 for do not filter, all cache lines will be returned.
+  *
+  * @param  void (* process)(struct tag_group_info *) : call back function, which may be called many times, a group(the addresses in the group are in the same position in the cache ways) a time.
+  *
+  * @return None
+  */
+void Cache_Travel_Tag_Memory(struct cache_mode * mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
+
+/**
+  * @brief Get the virtual address from cache mode, cache tag and the virtual address offset of cache ways.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
+  *
+  * @param  uint32_t tag : the tag part fo a tag item, 12-14 bits.
+  *
+  * @param  uint32_t addr_offset : the virtual address offset of the cache ways.
+  *
+  * @return uint32_t : the virtual address.
+  */
+uint32_t Cache_Get_Virtual_Addr(struct cache_mode *mode, uint32_t tag, uint32_t vaddr_offset);
+
+/**
+  * @brief Get cache memory block base address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t icache : 0 for dcache, other for icache.
+  *
+  * @param  uint32_t bank_no : 0 ~ 3 bank.
+  *
+  * @return uint32_t : the cache memory block base address, 0 if the block not used.
+  */
+uint32_t Cache_Get_Memory_BaseAddr(uint32_t icache, uint32_t bank_no);
+
+/**
+  * @brief Get the cache memory address from cache mode, cache memory offset and the virtual address offset of cache ways.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
+  *
+  * @param  uint32_t cache_memory_offset : the cache memory offset of the whole cache (ICache or DCache) for the cache line.
+  *
+  * @param  uint32_t addr_offset : the virtual address offset of the cache ways.
+  *
+  * @return uint32_t : the virtual address.
+  */
+uint32_t Cache_Get_Memory_Addr(struct cache_mode *mode, uint32_t cache_memory_offset, uint32_t vaddr_offset);
+
+/**
+  * @brief Get the cache memory value by DRAM address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t cache_memory_addr : DRAM address for the cache memory, should be 4 byte aligned for IBus address.
+  *
+  * @return uint32_t : the word value of the address.
+  */
+uint32_t Cache_Get_Memory_value(uint32_t cache_memory_addr);
+/**
+  * @}
+  */
+
+/**
+  * @brief Get the cache MMU IROM end address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  void
+  *
+  * @return uint32_t : the word value of the address.
+  */
+uint32_t Cache_Get_IROM_MMU_End(void);
+
+/**
+  * @brief Get the cache MMU DROM end address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  void
+  *
+  * @return uint32_t : the word value of the address.
+  */
+uint32_t Cache_Get_DROM_MMU_End(void);
+
+/**
+  * @brief  Lock the permission control section configuration. After lock, any
+  *         configuration modification will be bypass. Digital reset will clear the lock!
+  *         Please do not call this function in your SDK application.
+  *
+  * @param  int ibus : 1 for lock ibus pms, 0 for lock dbus pms
+  *
+  * @return None
+  */
+void Cache_Pms_Lock(int ibus);
+
+/**
+  * @brief  Set three ibus pms boundary address, which will determine pms reject section and section 1/2.
+  *         Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t ibus_boundary0_addr : vaddress for split line0
+  *
+  * @param  uint32_t ibus_boundary1_addr : vaddress for split line1
+  *
+  * @param  uint32_t ibus_boundary2_addr : vaddress for split line2
+  *
+  * @return int : ESP_ROM_ERR_INVALID_ARG for invalid address, 0 for success
+  */
+int Cache_Ibus_Pms_Set_Addr(uint32_t ibus_boundary0_addr, uint32_t ibus_boundary1_addr, uint32_t ibus_boundary2_addr);
+
+/**
+  * @brief  Set three ibus pms attribute, which will determine pms in different section and world.
+  *         Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t ibus_pms_sct2_attr : attr for section2
+  *
+  * @param  uint32_t ibus_pms_sct1_attr : attr for section1
+  *
+  * @return None
+  */
+void Cache_Ibus_Pms_Set_Attr(uint32_t ibus_pms_sct2_attr, uint32_t ibus_pms_sct1_attr);
+
+/**
+  * @brief  Set three dbus pms boundary address, which will determine pms reject section and section 1/2.
+  *         Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t dbus_boundary0_addr : vaddress for split line0
+  *
+  * @param  uint32_t dbus_boundary1_addr : vaddress for split line1
+  *
+  * @param  uint32_t dbus_boundary2_addr : vaddress for split line2
+  *
+  * @return int : ESP_ROM_ERR_INVALID_ARG for invalid address, 0 for success
+  */
+int Cache_Dbus_Pms_Set_Addr(uint32_t dbus_boundary0_addr, uint32_t dbus_boundary1_addr, uint32_t dbus_boundary2_addr);
+
+/**
+  * @brief  Set three dbus pms attribute, which will determine pms in different section and world.
+  *         Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t dbus_pms_sct2_attr : attr for section2
+  *
+  * @param  uint32_t dbus_pms_sct1_attr : attr for section1
+  *
+  * @return None
+  */
+void Cache_Dbus_Pms_Set_Attr(uint32_t dbus_pms_sct2_attr, uint32_t dbus_pms_sct1_attr);
+
+/**
+  * @brief Used by SPI flash mmap
+  *
+  */
+uint32_t flash_instr_rodata_start_page(uint32_t bus);
+uint32_t flash_instr_rodata_end_page(uint32_t bus);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_CACHE_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/crc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/crc.h
new file mode 100644
index 00000000000..e683f4fd419
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/crc.h
@@ -0,0 +1,127 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef ROM_CRC_H
+#define ROM_CRC_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup crc_apis, uart configuration and communication related apis
+  * @brief crc apis
+  */
+
+/** @addtogroup crc_apis
+  * @{
+  */
+
+
+/* Standard CRC8/16/32 algorithms. */
+// CRC-8        x8+x2+x1+1              0x07
+// CRC16-CCITT  x16+x12+x5+1   1021   ISO HDLC, ITU X.25, V.34/V.41/V.42, PPP-FCS
+// CRC32:
+//G(x) = x32 +x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x1 + 1
+//If your buf is not continuous, you can use the first result to be the second parameter.
+
+/**
+  * @brief Crc32 value that is in little endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint32_t crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc32 value that is in big endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint32_t crc32_be(uint32_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc16 value that is in little endian.
+  *
+  * @param  uint16_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint16_t crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc16 value that is in big endian.
+  *
+  * @param  uint16_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint16_t crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc8 value that is in little endian.
+  *
+  * @param  uint8_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint8_t crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc8 value that is in big endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint8_t crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/digital_signature.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/digital_signature.h
new file mode 100644
index 00000000000..54c01681d40
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/digital_signature.h
@@ -0,0 +1,150 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#define ETS_DS_MAX_BITS 3072
+
+#define ETS_DS_IV_LEN 16
+
+/* Length of parameter 'C' stored in flash (not including IV)
+
+   Comprises encrypted Y, M, rinv, md (32), mprime (4), length (4), padding (8)
+
+   Note that if ETS_DS_MAX_BITS<4096, 'C' needs to be split up when writing to hardware
+*/
+#define ETS_DS_C_LEN ((ETS_DS_MAX_BITS * 3 / 8) + 32 + 8 + 8)
+
+/* Encrypted ETS data. Recommended to store in flash in this format.
+ */
+typedef struct {
+    /* RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     */
+    unsigned rsa_length;
+
+    /* IV value used to encrypt 'c' */
+    uint8_t iv[ETS_DS_IV_LEN];
+
+    /* Encrypted Digital Signature parameters. Result of AES-CBC encryption
+       of plaintext values. Includes an encrypted message digest.
+    */
+    uint8_t c[ETS_DS_C_LEN];
+} ets_ds_data_t;
+
+typedef enum {
+    ETS_DS_OK,
+    ETS_DS_INVALID_PARAM,   /* Supplied parameters are invalid */
+    ETS_DS_INVALID_KEY,     /* HMAC peripheral failed to supply key */
+    ETS_DS_INVALID_PADDING, /* 'c' decrypted with invalid padding */
+    ETS_DS_INVALID_DIGEST,  /* 'c' decrypted with invalid digest */
+} ets_ds_result_t;
+
+void ets_ds_enable(void);
+
+void ets_ds_disable(void);
+
+
+/*
+ * @brief Start signing a message (or padded message digest) using the Digital Signature peripheral
+ *
+ * - @param message Pointer to message (or padded digest) containing the message to sign. Should be
+ *   (data->rsa_length + 1)*4 bytes long.  @param data Pointer to DS data. Can be a pointer to data
+ *   in flash.
+ *
+ * Caller must have already called ets_ds_enable() and ets_hmac_calculate_downstream() before calling
+ * this function, and is responsible for calling ets_ds_finish_sign() and then
+ * ets_hmac_invalidate_downstream() afterwards.
+ *
+ * @return ETS_DS_OK if signature is in progress, ETS_DS_INVALID_PARAM if param is invalid,
+ * EST_DS_INVALID_KEY if key or HMAC peripheral is configured incorrectly.
+ */
+ets_ds_result_t ets_ds_start_sign(const void *message, const ets_ds_data_t *data);
+
+
+/*
+ * @brief Returns true if the DS peripheral is busy following a call to ets_ds_start_sign()
+ *
+ * A result of false indicates that a call to ets_ds_finish_sign() will not block.
+ *
+ * Only valid if ets_ds_enable() has been called.
+ */
+bool ets_ds_is_busy(void);
+
+
+/* @brief Finish signing a message using the Digital Signature peripheral
+ *
+ * Must be called after ets_ds_start_sign(). Can use ets_ds_busy() to wait until
+ * peripheral is no longer busy.
+ *
+ * - @param signature Pointer to buffer to contain the signature. Should be
+ *   (data->rsa_length + 1)*4 bytes long.
+ * - @param data Should match the 'data' parameter passed to ets_ds_start_sign()
+ *
+ * @param ETS_DS_OK if signing succeeded, ETS_DS_INVALID_PARAM if param is invalid,
+ * ETS_DS_INVALID_DIGEST or ETS_DS_INVALID_PADDING if there is a problem with the
+ * encrypted data digest or padding bytes (in case of ETS_DS_INVALID_PADDING, a
+ * digest is produced anyhow.)
+ */
+ets_ds_result_t ets_ds_finish_sign(void *signature, const ets_ds_data_t *data);
+
+
+/* Plaintext parameters used by Digital Signature.
+
+   Not used for signing with DS peripheral, but can be encrypted
+   in-device by calling ets_ds_encrypt_params()
+*/
+typedef struct {
+    uint32_t Y[ETS_DS_MAX_BITS / 32];
+    uint32_t M[ETS_DS_MAX_BITS / 32];
+    uint32_t Rb[ETS_DS_MAX_BITS / 32];
+    uint32_t M_prime;
+    uint32_t length;
+} ets_ds_p_data_t;
+
+typedef enum {
+    ETS_DS_KEY_HMAC, /* The HMAC key (as stored in efuse) */
+    ETS_DS_KEY_AES,  /* The AES key (as derived from HMAC key by HMAC peripheral in downstream mode) */
+} ets_ds_key_t;
+
+/* @brief Encrypt DS parameters suitable for storing and later use with DS peripheral
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the corresponding HMAC key will be stored to efuse and then permanently erased.
+ * @param key_type Type of key stored in 'key' (either the AES-256 DS key, or an HMAC DS key from which the AES DS key is derived using HMAC peripheral)
+ *
+ * @return ETS_DS_INVALID_PARAM if any parameter is invalid, or ETS_DS_OK if 'data' is successfully generated from the input parameters.
+ */
+ets_ds_result_t ets_ds_encrypt_params(ets_ds_data_t *data, const void *iv, const ets_ds_p_data_t *p_data, const void *key, ets_ds_key_t key_type);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/efuse.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/efuse.h
new file mode 100644
index 00000000000..9da1525f969
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/efuse.h
@@ -0,0 +1,392 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_EFUSE_H_
+#define _ROM_EFUSE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+/** \defgroup efuse_APIs efuse APIs
+  * @brief     ESP32 efuse read/write APIs
+  * @attention
+  *
+  */
+
+/** @addtogroup efuse_APIs
+  * @{
+  */
+
+typedef enum {
+    ETS_EFUSE_KEY_PURPOSE_USER = 0,
+    ETS_EFUSE_KEY_PURPOSE_RESERVED = 1,
+    ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_UP = 8,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
+    ETS_EFUSE_KEY_PURPOSE_MAX,
+} ets_efuse_purpose_t;
+
+typedef enum {
+    ETS_EFUSE_BLOCK0 = 0,
+    ETS_EFUSE_MAC_SPI_SYS_0 = 1,
+    ETS_EFUSE_BLOCK_SYS_DATA = 2,
+    ETS_EFUSE_BLOCK_USR_DATA = 3,
+    ETS_EFUSE_BLOCK_KEY0 = 4,
+    ETS_EFUSE_BLOCK_KEY1 = 5,
+    ETS_EFUSE_BLOCK_KEY2 = 6,
+    ETS_EFUSE_BLOCK_KEY3 = 7,
+    ETS_EFUSE_BLOCK_KEY4 = 8,
+    ETS_EFUSE_BLOCK_KEY5 = 9,
+    ETS_EFUSE_BLOCK_KEY6 = 10,
+    ETS_EFUSE_BLOCK_MAX,
+} ets_efuse_block_t;
+
+/**
+ * @brief set timing accroding the apb clock, so no read error or write error happens.
+ *
+ * @param clock: apb clock in HZ, only accept 5M(in FPGA), 10M(in FPGA), 20M, 40M, 80M.
+ *
+ * @return : 0 if success, others if clock not accepted
+ */
+int ets_efuse_set_timing(uint32_t clock);
+
+/**
+ * @brief Enable efuse subsystem. Called after reset. Doesn't need to be called again.
+ */
+void ets_efuse_start(void);
+
+/**
+  * @brief  Efuse read operation: copies data from physical efuses to efuse read registers.
+  *
+  * @param  null
+  *
+  * @return : 0 if success, others if apb clock is not accepted
+  */
+int ets_efuse_read(void);
+
+/**
+  * @brief  Efuse write operation: Copies data from efuse write registers to efuse. Operates on a single block of efuses at a time.
+  *
+  * @note This function does not update read efuses, call ets_efuse_read() once all programming is complete.
+  *
+  * @return : 0 if success, others if apb clock is not accepted
+  */
+int ets_efuse_program(ets_efuse_block_t block);
+
+/**
+ * @brief Set all Efuse program registers to zero.
+ *
+ * Call this before writing new data to the program registers.
+ */
+void ets_efuse_clear_program_registers(void);
+
+/**
+ * @brief Program a block of key data to an efuse block
+ *
+ * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6. Key block must be unused (@ref ets_efuse_key_block_unused).
+ * @param purpose Purpose to set for this key. Purpose must be already unset.
+ * @param data Pointer to data to write.
+ * @param data_len Length of data to write.
+ *
+ * @note This function also calls ets_efuse_program() for the specified block, and for block 0 (setting the purpose)
+ */
+int ets_efuse_write_key(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose, const void *data, size_t data_len);
+
+
+/* @brief Return the address of a particular efuse block's first read register
+ *
+ * @param block Index of efuse block to look up
+ *
+ * @return 0 if block is invalid, otherwise a numeric read register address
+ * of the first word in the block.
+ */
+uint32_t ets_efuse_get_read_register_address(ets_efuse_block_t block);
+
+/**
+ * @brief Return the current purpose set for an efuse key block
+ *
+ * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6.
+ */
+ets_efuse_purpose_t ets_efuse_get_key_purpose(ets_efuse_block_t key_block);
+
+/**
+ * @brief Find a key block with the particular purpose set
+ *
+ * @param purpose Purpose to search for.
+ * @param[out] key_block Pointer which will be set to the key block if found. Can be NULL, if only need to test the key block exists.
+ * @return true if found, false if not found. If false, value at key_block pointer is unchanged.
+ */
+bool ets_efuse_find_purpose(ets_efuse_purpose_t purpose, ets_efuse_block_t *key_block);
+
+/**
+ * Return true if the key block is unused, false otherwise.
+ *
+ * An unused key block is all zero content, not read or write protected,
+ * and has purpose 0 (ETS_EFUSE_KEY_PURPOSE_USER)
+ *
+ * @param key_block key block to check.
+ *
+ * @return true if key block is unused, false if key block or used
+ * or the specified block index is not a key block.
+ */
+bool ets_efuse_key_block_unused(ets_efuse_block_t key_block);
+
+
+/**
+ * @brief Search for an unused key block and return the first one found.
+ *
+ * See @ref ets_efuse_key_block_unused for a description of an unused key block.
+ *
+ * @return First unused key block, or ETS_EFUSE_BLOCK_MAX if no unused key block is found.
+ */
+ets_efuse_block_t ets_efuse_find_unused_key_block(void);
+
+/**
+ * @brief Return the number of unused efuse key blocks (0-6)
+ */
+unsigned ets_efuse_count_unused_key_blocks(void);
+
+/**
+ * @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
+ *
+ * @param data Pointer to data buffer (length 32 bytes)
+ * @param rs_values Pointer to write encoded data to (length 12 bytes)
+ */
+void ets_efuse_rs_calculate(const void *data, void *rs_values);
+
+/**
+  * @brief  Read spi flash pads configuration from Efuse
+  *
+  * @return
+  * - 0 for default SPI pins.
+  * - 1 for default HSPI pins.
+  * - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
+  *   EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
+  *   WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
+  */
+uint32_t ets_efuse_get_spiconfig(void);
+
+/**
+  * @brief  Read spi flash wp pad from Efuse
+  *
+  * @return
+  * - 0x3f for invalid.
+  * - 0~46 is valid.
+  */
+uint32_t ets_efuse_get_wp_pad(void);
+
+/**
+ * @brief Read opi flash pads configuration from Efuse
+ *
+ * @return
+ * - 0 for default SPI pins.
+ * - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for:
+ *   DQS, D4, D5, D6, D7 accordingly.
+ */
+uint32_t ets_efuse_get_opiconfig(void);
+
+/**
+  * @brief  Read if download mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable download mode.
+  * - false for efuse doesn't disable download mode.
+  */
+bool ets_efuse_download_modes_disabled(void);
+
+/**
+  * @brief  Read if legacy spi flash boot mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable legacy spi flash boot mode.
+  * - false for efuse doesn't disable legacy spi flash boot mode.
+  */
+bool ets_efuse_legacy_spi_boot_mode_disabled(void);
+
+/**
+  * @brief  Read if uart print control value from Efuse
+  *
+  * @return
+  * - 0 for uart force print.
+  * - 1 for uart print when GPIO8 is low when digital reset.
+  *   2 for uart print when GPIO8 is high when digital reset.
+  *   3 for uart force slient
+  */
+uint32_t ets_efuse_get_uart_print_control(void);
+
+/**
+  * @brief  Read which channel will used by ROM to print
+  *
+  * @return
+  * - 0 for UART0.
+  * - 1 for UART1.
+  */
+uint32_t ets_efuse_get_uart_print_channel(void);
+
+/**
+  * @brief  Read if usb download mode disabled from Efuse
+  *
+  * (Also returns true if security download mode is enabled, as this mode
+  * disables USB download.)
+  *
+  * @return
+  * - true for efuse disable usb download mode.
+  * - false for efuse doesn't disable usb download mode.
+  */
+bool ets_efuse_usb_download_mode_disabled(void);
+
+/**
+  * @brief  Read if tiny basic mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable tiny basic mode.
+  * - false for efuse doesn't disable tiny basic mode.
+  */
+bool ets_efuse_tiny_basic_mode_disabled(void);
+
+/**
+  * @brief  Read if usb module disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable usb module.
+  * - false for efuse doesn't disable usb module.
+  */
+bool ets_efuse_usb_module_disabled(void);
+
+/**
+  * @brief  Read if security download modes enabled from Efuse
+  *
+  * @return
+  * - true for efuse enable security download mode.
+  * - false for efuse doesn't enable security download mode.
+  */
+bool ets_efuse_security_download_modes_enabled(void);
+
+/**
+ * @brief Return true if secure boot is enabled in EFuse
+ */
+bool ets_efuse_secure_boot_enabled(void);
+
+/**
+ * @brief Return true if secure boot aggressive revoke is enabled in EFuse
+ */
+bool ets_efuse_secure_boot_aggressive_revoke_enabled(void);
+
+/**
+ * @brief Return true if cache encryption (flash, etc) is enabled from boot via EFuse
+ */
+bool ets_efuse_cache_encryption_enabled(void);
+
+/**
+ * @brief Return true if EFuse indicates an external phy needs to be used for USB
+ */
+bool ets_efuse_usb_use_ext_phy(void);
+
+/**
+ * @brief Return true if EFuse indicates USB device persistence is disabled
+ */
+bool ets_efuse_usb_force_nopersist(void);
+
+/**
+ * @brief Return true if OPI pins GPIO33-37 are powered by VDDSPI, otherwise by VDD33CPU
+ */
+bool ets_efuse_flash_opi_5pads_power_sel_vddspi(void);
+
+/**
+ * @brief Return true if EFuse indicates an opi flash is attached.
+ */
+bool ets_efuse_flash_opi_mode(void);
+
+/**
+ * @brief Return true if EFuse indicates to send a flash resume command.
+ */
+bool ets_efuse_force_send_resume(void);
+
+/**
+  * @brief  return the time in us ROM boot need wait flash to power on from Efuse
+  *
+  * @return
+  * - uint32_t the time in us.
+  */
+uint32_t ets_efuse_get_flash_delay_us(void);
+
+#define EFUSE_SPICONFIG_SPI_DEFAULTS 0
+#define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
+
+#define EFUSE_SPICONFIG_RET_SPICLK_MASK         0x3f
+#define EFUSE_SPICONFIG_RET_SPICLK_SHIFT        0
+#define EFUSE_SPICONFIG_RET_SPICLK(ret)         (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPIQ_MASK           0x3f
+#define EFUSE_SPICONFIG_RET_SPIQ_SHIFT          6
+#define EFUSE_SPICONFIG_RET_SPIQ(ret)           (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPID_MASK           0x3f
+#define EFUSE_SPICONFIG_RET_SPID_SHIFT          12
+#define EFUSE_SPICONFIG_RET_SPID(ret)           (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPICS0_MASK         0x3f
+#define EFUSE_SPICONFIG_RET_SPICS0_SHIFT        18
+#define EFUSE_SPICONFIG_RET_SPICS0(ret)         (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
+
+
+#define EFUSE_SPICONFIG_RET_SPIHD_MASK          0x3f
+#define EFUSE_SPICONFIG_RET_SPIHD_SHIFT         24
+#define EFUSE_SPICONFIG_RET_SPIHD(ret)          (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
+
+/**
+ * @brief Enable JTAG temporarily by writing a JTAG HMAC "key" into
+ * the JTAG_CTRL registers.
+ *
+ * Works if JTAG has been "soft" disabled by burning the EFUSE_SOFT_DIS_JTAG efuse.
+ *
+ * Will enable the HMAC module to generate a "downstream" HMAC value from a key already saved in efuse, and then write the JTAG HMAC "key" which will enable JTAG if the two keys match.
+ *
+ * @param jtag_hmac_key Pointer to a 32 byte array containing a valid key. Supplied by user.
+ * @param key_block Index of a key block containing the source for this key.
+ *
+ * @return ETS_FAILED if HMAC operation fails or invalid parameter, ETS_OK otherwise. ETS_OK doesn't necessarily mean that JTAG was enabled.
+ */
+int ets_jtag_enable_temporarily(const uint8_t *jtag_hmac_key, ets_efuse_block_t key_block);
+
+/**
+  * @brief  A crc8 algorithm used for MAC addresses in efuse
+  *
+  * @param  unsigned char const *p : Pointer to original data.
+  *
+  * @param  unsigned int len : Data length in byte.
+  *
+  * @return unsigned char: Crc value.
+  */
+unsigned char esp_crc8(unsigned char const *p, unsigned int len);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_EFUSE_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/esp_flash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/esp_flash.h
new file mode 100644
index 00000000000..40e5872c090
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/esp_flash.h
@@ -0,0 +1,54 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Note: Most of esp_flash APIs in ROM are compatible with headers in ESP-IDF, this function
+   just adds ROM-specific parts
+*/
+
+struct spi_flash_chip_t;
+typedef struct esp_flash_t esp_flash_t;
+
+/* Structure to wrap "global" data used by esp_flash in ROM */
+typedef struct {
+    /* Default SPI flash chip, ie main chip attached to the MCU
+       This chip is used if the 'chip' argument passed to esp_flash_xxx API functions is ever NULL
+    */
+    esp_flash_t *default_chip;
+
+    /* Global API OS notification start/end/chip_check functions
+
+       These are used by ROM if no other host functions are configured.
+    */
+    struct {
+        esp_err_t (*start)(esp_flash_t *chip);
+        esp_err_t (*end)(esp_flash_t *chip, esp_err_t err);
+        esp_err_t (*chip_check)(esp_flash_t **inout_chip);
+    } api_funcs;
+} esp_flash_rom_global_data_t;
+
+/** Access a pointer to the global data used by the ROM spi_flash driver
+ */
+esp_flash_rom_global_data_t *esp_flash_get_rom_global_data(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/ets_sys.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/ets_sys.h
new file mode 100644
index 00000000000..b2567e925e7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/ets_sys.h
@@ -0,0 +1,563 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_ETS_SYS_H_
+#define _ROM_ETS_SYS_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup ets_sys_apis, ets system related apis
+  * @brief ets system apis
+  */
+
+/** @addtogroup ets_sys_apis
+  * @{
+  */
+
+/************************************************************************
+  *                                NOTE
+  *   Many functions in this header files can't be run in FreeRTOS.
+  *   Please see the comment of the Functions.
+  *   There are also some functions that doesn't work on FreeRTOS
+  *   without listed in the header, such as:
+  *   xtos functions start with "_xtos_" in ld file.
+  *
+  ***********************************************************************
+  */
+
+/** \defgroup ets_apis, Espressif Task Scheduler related apis
+  * @brief ets apis
+  */
+
+/** @addtogroup ets_apis
+  * @{
+  */
+
+typedef enum {
+    ETS_OK     = 0, /**< return successful in ets*/
+    ETS_FAILED = 1  /**< return failed in ets*/
+} ETS_STATUS;
+
+typedef ETS_STATUS ets_status_t;
+
+typedef uint32_t ETSSignal;
+typedef uint32_t ETSParam;
+
+typedef struct ETSEventTag ETSEvent;    /**< Event transmit/receive in ets*/
+
+struct ETSEventTag {
+    ETSSignal sig;  /**< Event signal, in same task, different Event with different signal*/
+    ETSParam  par;  /**< Event parameter, sometimes without usage, then will be set as 0*/
+};
+
+typedef void (*ETSTask)(ETSEvent *e);       /**< Type of the Task processer*/
+typedef void (* ets_idle_cb_t)(void *arg);  /**< Type of the system idle callback*/
+
+/**
+  * @brief  Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.
+  *
+  * @param  none
+  *
+  * @return none
+  */
+void ets_run(void);
+
+/**
+  * @brief  Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.
+  *
+  * @param  ets_idle_cb_t func : The callback function.
+  *
+  * @param  void *arg : Argument of the callback.
+  *
+  * @return None
+  */
+void ets_set_idle_cb(ets_idle_cb_t func, void *arg);
+
+/**
+  * @brief  Init a task with processer, priority, queue to receive Event, queue length.
+  *
+  * @param  ETSTask task : The task processer.
+  *
+  * @param  uint8_t prio : Task priority, 0-31, bigger num with high priority, one priority with one task.
+  *
+  * @param  ETSEvent *queue : Queue belongs to the task, task always receives Events, Queue is circular used.
+  *
+  * @param  uint8_t qlen : Queue length.
+  *
+  * @return None
+  */
+void ets_task(ETSTask task, uint8_t prio, ETSEvent *queue, uint8_t qlen);
+
+/**
+  * @brief  Post an event to an Task.
+  *
+  * @param  uint8_t prio : Priority of the Task.
+  *
+  * @param  ETSSignal sig : Event signal.
+  *
+  * @param  ETSParam  par : Event parameter
+  *
+  * @return ETS_OK     : post successful
+  * @return ETS_FAILED : post failed
+  */
+ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_boot_apis, Boot routing related apis
+  * @brief ets boot apis
+  */
+
+/** @addtogroup ets_apis
+  * @{
+  */
+
+extern const char *const exc_cause_table[40];   ///**< excption cause that defined by the core.*/
+
+/**
+  * @brief  Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed.
+  *         When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.
+  *
+  * @param  uint32_t start : the PRO Entry code address value in uint32_t
+  *
+  * @return None
+  */
+void ets_set_user_start(uint32_t start);
+
+/**
+  * @brief  Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code.
+  *         When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.
+  *
+  * @param  uint32_t callback : the Startup code address value in uint32_t
+  *
+  * @return None     : post successful
+  */
+void ets_set_startup_callback(uint32_t callback);
+
+/**
+  * @brief  Set App cpu Entry code, code can be called in PRO CPU.
+  *         When APP booting is completed, APP CPU will call the Entry code if not NULL.
+  *
+  * @param  uint32_t start : the APP Entry code address value in uint32_t, stored in register APPCPU_CTRL_REG_D.
+  *
+  * @return None
+  */
+void ets_set_appcpu_boot_addr(uint32_t start);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_printf_apis, ets_printf related apis used in ets
+  * @brief ets printf apis
+  */
+
+/** @addtogroup ets_printf_apis
+  * @{
+  */
+
+/**
+  * @brief  Printf the strings to uart or other devices, similar with printf, simple than printf.
+  *         Can not print float point data format, or longlong data format.
+  *         So we maybe only use this in ROM.
+  *
+  * @param  const char *fmt : See printf.
+  *
+  * @param  ... : See printf.
+  *
+  * @return int : the length printed to the output device.
+  */
+int ets_printf(const char *fmt, ...);
+
+/**
+  * @brief  Set the uart channel of ets_printf(uart_tx_one_char).
+  *         ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
+  *
+  * @param  uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None
+  */
+void ets_set_printf_channel(uint8_t uart_no);
+
+/**
+  * @brief Get the uart channel of ets_printf(uart_tx_one_char).
+  *
+  * @return uint8_t uart channel used by ets_printf(uart_tx_one_char).
+  */
+uint8_t ets_get_printf_channel(void);
+
+/**
+  * @brief  Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function.
+  *         Can not print float point data format, or longlong data format
+  *
+  * @param  char c : char to output.
+  *
+  * @return None
+  */
+void ets_write_char_uart(char c);
+
+/**
+  * @brief  Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
+  *         To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.
+  *
+  * @param  void (*)(char) p: Output function to install.
+  *
+  * @return None
+  */
+void ets_install_putc1(void (*p)(char c));
+
+/**
+  * @brief  Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
+  *         To install putc2, which is defaulted installed as NULL.
+  *
+  * @param  void (*)(char) p: Output function to install.
+  *
+  * @return None
+  */
+void ets_install_putc2(void (*p)(char c));
+
+/**
+  * @brief  Install putc1 as ets_write_char_uart.
+  *         In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_install_uart_printf(void);
+
+#define ETS_PRINTF(...) ets_printf(...)
+
+#define ETS_ASSERT(v) do { \
+    if (!(v)) {             \
+        ets_printf("%s %u \n", __FILE__, __LINE__); \
+        while (1) {};   \
+    }                   \
+} while (0);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_timer_apis, ets_timer related apis used in ets
+  * @brief ets timer apis
+  */
+
+/** @addtogroup ets_timer_apis
+  * @{
+  */
+typedef void ETSTimerFunc(void *timer_arg);/**< timer handler*/
+
+typedef struct _ETSTIMER_ {
+    struct _ETSTIMER_    *timer_next;   /**< timer linker*/
+    uint32_t              timer_expire; /**< abstruct time when timer expire*/
+    uint32_t              timer_period; /**< timer period, 0 means timer is not periodic repeated*/
+    ETSTimerFunc         *timer_func;   /**< timer handler*/
+    void                 *timer_arg;    /**< timer handler argument*/
+} ETSTimer;
+
+/**
+  * @brief  Init ets timer, this timer range is 640 us to 429496 ms
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_timer_init(void);
+
+/**
+  * @brief  In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_timer_deinit(void);
+
+/**
+  * @brief  Arm an ets timer, this timer range is 640 us to 429496 ms.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  uint32_t tmout : Timer value in ms, range is 1 to 429496.
+  *
+  * @param  bool repeat : Timer is periodic repeated.
+  *
+  * @return None
+  */
+void ets_timer_arm(ETSTimer *timer, uint32_t tmout, bool repeat);
+
+/**
+  * @brief  Arm an ets timer, this timer range is 640 us to 429496 ms.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  uint32_t tmout : Timer value in us, range is 1 to 429496729.
+  *
+  * @param  bool repeat : Timer is periodic repeated.
+  *
+  * @return None
+  */
+void ets_timer_arm_us(ETSTimer *ptimer, uint32_t us, bool repeat);
+
+/**
+  * @brief  Disarm an ets timer.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @return None
+  */
+void ets_timer_disarm(ETSTimer *timer);
+
+/**
+  * @brief  Set timer callback and argument.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  ETSTimerFunc *pfunction : Timer callback.
+  *
+  * @param  void *parg : Timer callback argument.
+  *
+  * @return None
+  */
+void ets_timer_setfn(ETSTimer *ptimer, ETSTimerFunc *pfunction, void *parg);
+
+/**
+  * @brief  Unset timer callback and argument to NULL.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @return None
+  */
+void ets_timer_done(ETSTimer *ptimer);
+
+/**
+  * @brief  CPU do while loop for some time.
+  *         In FreeRTOS task, please call FreeRTOS apis.
+  *
+  * @param  uint32_t us : Delay time in us.
+  *
+  * @return None
+  */
+void ets_delay_us(uint32_t us);
+
+/**
+  * @brief  Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
+  *         Call this function when CPU frequency is changed.
+  *
+  * @param  uint32_t ticks_per_us : CPU ticks per us.
+  *
+  * @return None
+  */
+void ets_update_cpu_frequency(uint32_t ticks_per_us);
+
+/**
+  * @brief  Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
+  *
+  * @note This function only sets the tick rate for the current CPU. It is located in ROM,
+  *       so the deep sleep stub can use it even if IRAM is not initialized yet.
+  *
+  * @param  uint32_t ticks_per_us : CPU ticks per us.
+  *
+  * @return None
+  */
+void ets_update_cpu_frequency_rom(uint32_t ticks_per_us);
+
+/**
+  * @brief  Get the real CPU ticks per us to the ets.
+  *         This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.
+  *
+  * @param  None
+  *
+  * @return uint32_t : CPU ticks per us record in ets.
+  */
+uint32_t ets_get_cpu_frequency(void);
+
+/**
+  * @brief  Get xtal_freq value, If value not stored in RTC_STORE5, than store.
+  *
+  * @param  None
+  *
+  * @return uint32_t : if stored in efuse(not 0)
+  *                         clock = ets_efuse_get_xtal_freq() * 1000000;
+  *                    else if analog_8M in efuse
+  *                         clock = ets_get_xtal_scale() * 625 / 16 * ets_efuse_get_8M_clock();
+  *                    else clock = 40M.
+  */
+uint32_t ets_get_xtal_freq(void);
+
+/**
+  * @brief  Get the apb divior by xtal frequency.
+  *         When any types of reset happen, the default value is 2.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 1 or 2.
+  */
+uint32_t ets_get_xtal_div(void);
+
+/**
+  * @brief  Get apb_freq value, If value not stored in RTC_STORE5, than store.
+  *
+  * @param  None
+  *
+  * @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register.
+  *                         clock = (REG_READ(RTC_STORE5) & 0xffff) << 12;
+  *                    else store ets_get_detected_xtal_freq() in.
+  */
+uint32_t ets_get_apb_freq(void);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_intr_apis, ets interrupt configure related apis
+  * @brief ets intr apis
+  */
+
+/** @addtogroup ets_intr_apis
+  * @{
+  */
+
+typedef void (* ets_isr_t)(void *);/**< interrupt handler type*/
+
+/**
+  * @brief  Attach a interrupt handler to a CPU interrupt number.
+  *         This function equals to _xtos_set_interrupt_handler_arg(i, func, arg).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  int i : CPU interrupt number.
+  *
+  * @param  ets_isr_t func : Interrupt handler.
+  *
+  * @param  void *arg : argument of the handler.
+  *
+  * @return None
+  */
+void ets_isr_attach(int i, ets_isr_t func, void *arg);
+
+/**
+  * @brief  Mask the interrupts which show in mask bits.
+  *         This function equals to _xtos_ints_off(mask).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  uint32_t mask : BIT(i) means mask CPU interrupt number i.
+  *
+  * @return None
+  */
+void ets_isr_mask(uint32_t mask);
+
+/**
+  * @brief  Unmask the interrupts which show in mask bits.
+  *         This function equals to _xtos_ints_on(mask).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  uint32_t mask : BIT(i) means mask CPU interrupt number i.
+  *
+  * @return None
+  */
+void ets_isr_unmask(uint32_t unmask);
+
+/**
+  * @brief  Lock the interrupt to level 2.
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_intr_lock(void);
+
+/**
+  * @brief  Unlock the interrupt to level 0.
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_intr_unlock(void);
+
+/**
+  * @brief  Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt).
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_waiti0(void);
+
+/**
+  * @brief  Attach an CPU interrupt to a hardware source.
+  *         We have 4 steps to use an interrupt:
+  *         1.Attach hardware interrupt source to CPU.  intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);
+  *         2.Set interrupt handler.                    xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);
+  *         3.Enable interrupt for CPU.                 xt_ints_on(1 << ETS_WMAC_INUM);
+  *         4.Enable interrupt in the module.
+  *
+  * @param  int cpu_no : The CPU which the interrupt number belongs.
+  *
+  * @param  uint32_t model_num : The interrupt hardware source number, please see the interrupt hardware source table.
+  *
+  * @param  uint32_t intr_num : The interrupt number CPU, please see the interrupt cpu using table.
+  *
+  * @return None
+  */
+void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
+
+/**
+  * @}
+  */
+
+#ifndef MAC2STR
+#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
+#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
+#endif
+
+#define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
+
+typedef enum {
+    OK = 0,
+    FAIL,
+    PENDING,
+    BUSY,
+    CANCEL,
+} STATUS;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_ETS_SYS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/gpio.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/gpio.h
new file mode 100644
index 00000000000..2969d14fc00
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/gpio.h
@@ -0,0 +1,311 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_GPIO_H_
+#define _ROM_GPIO_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_attr.h"
+#include "soc/gpio_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup gpio_apis, uart configuration and communication related apis
+  * @brief gpio apis
+  */
+
+/** @addtogroup gpio_apis
+  * @{
+  */
+
+#define GPIO_REG_READ(reg)              READ_PERI_REG(reg)
+#define GPIO_REG_WRITE(reg, val)        WRITE_PERI_REG(reg, val)
+#define GPIO_ID_PIN0                    0
+#define GPIO_ID_PIN(n)                  (GPIO_ID_PIN0+(n))
+#define GPIO_PIN_ADDR(i)                (GPIO_PIN0_REG + i*4)
+
+#define GPIO_FUNC_IN_HIGH               0x38
+#define GPIO_FUNC_IN_LOW                0x3C
+
+#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
+    ((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
+
+#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
+
+typedef enum {
+    GPIO_PIN_INTR_DISABLE = 0,
+    GPIO_PIN_INTR_POSEDGE = 1,
+    GPIO_PIN_INTR_NEGEDGE = 2,
+    GPIO_PIN_INTR_ANYEDGE = 3,
+    GPIO_PIN_INTR_LOLEVEL = 4,
+    GPIO_PIN_INTR_HILEVEL = 5
+} GPIO_INT_TYPE;
+
+#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
+        ((gpio_no < 32) ? gpio_output_set(bit_value<<gpio_no, (bit_value ? 0 : 1)<<gpio_no, 1<<gpio_no,0) : \
+                         gpio_output_set_high(bit_value<<(gpio_no - 32), (bit_value ? 0 : 1)<<(gpio_no - 32), 1<<(gpio_no -32),0))
+#define GPIO_DIS_OUTPUT(gpio_no)    ((gpio_no < 32) ? gpio_output_set(0,0,0, 1<<gpio_no) : gpio_output_set_high(0,0,0, 1<<(gpio_no - 32)))
+#define GPIO_INPUT_GET(gpio_no)     ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))&BIT0))
+
+/* GPIO interrupt handler, registered through gpio_intr_handler_register */
+typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
+
+/**
+  * @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
+  *        to initialize "output enables" and pin configurations for each gpio pin.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void gpio_init(void);
+
+/**
+  * @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
+  *         There is no particular ordering guaranteed; so if the order of writes is significant,
+  *         calling code should divide a single call into multiple calls.
+  *
+  * @param  uint32_t set_mask : the gpios that need high level.
+  *
+  * @param  uint32_t clear_mask : the gpios that need low level.
+  *
+  * @param  uint32_t enable_mask : the gpios that need be changed.
+  *
+  * @param  uint32_t disable_mask : the gpios that need diable output.
+  *
+  * @return None
+  */
+void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
+
+/**
+  * @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
+  *         There is no particular ordering guaranteed; so if the order of writes is significant,
+  *         calling code should divide a single call into multiple calls.
+  *
+  * @param  uint32_t set_mask : the gpios that need high level.
+  *
+  * @param  uint32_t clear_mask : the gpios that need low level.
+  *
+  * @param  uint32_t enable_mask : the gpios that need be changed.
+  *
+  * @param  uint32_t disable_mask : the gpios that need diable output.
+  *
+  * @return None
+  */
+void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
+
+/**
+  * @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
+  */
+uint32_t gpio_input_get(void);
+
+/**
+  * @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32.
+  */
+uint32_t gpio_input_get_high(void);
+
+/**
+  * @brief Register an application-specific interrupt handler for GPIO pin interrupts.
+  *        Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
+  *        Please do not call this function in SDK.
+  *
+  * @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler
+  *
+  * @param void *arg : gpio application-specific interrupt handler argument.
+  *
+  * @return None
+  */
+void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
+
+/**
+  * @brief Get gpio interrupts which happens but not processed.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
+  */
+uint32_t gpio_intr_pending(void);
+
+/**
+  * @brief Get gpio interrupts which happens but not processed.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
+  */
+uint32_t gpio_intr_pending_high(void);
+
+/**
+  * @brief Ack gpio interrupts to process pending interrupts.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
+  *
+  * @return None
+  */
+void gpio_intr_ack(uint32_t ack_mask);
+
+/**
+  * @brief Ack gpio interrupts to process pending interrupts.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
+  *
+  * @return None
+  */
+void gpio_intr_ack_high(uint32_t ack_mask);
+
+/**
+  * @brief Set GPIO to wakeup the ESP32.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t i: gpio number.
+  *
+  * @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
+  *
+  * @return None
+  */
+void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
+
+/**
+  * @brief disable GPIOs to wakeup the ESP32.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void gpio_pin_wakeup_disable(void);
+
+/**
+  * @brief set gpio input to a signal, one gpio can input to several signals.
+  *
+  * @param uint32_t gpio : gpio number, 0~0x2f
+  *                        gpio == 0x3C, input 0 to signal
+  *                        gpio == 0x3A, input nothing to signal
+  *                        gpio == 0x38, input 1 to signal
+  *
+  * @param uint32_t signal_idx : signal index.
+  *
+  * @param bool inv : the signal is inv or not
+  *
+  * @return None
+  */
+void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
+
+/**
+  * @brief set signal output to gpio, one signal can output to several gpios.
+  *
+  * @param uint32_t gpio : gpio number, 0~0x2f
+  *
+  * @param uint32_t signal_idx : signal index.
+  *                        signal_idx == 0x100, cancel output put to the gpio
+  *
+  * @param bool out_inv : the signal output is invert or not
+  *
+  * @param bool oen_inv : the signal output enable is invert or not
+  *
+  * @return None
+  */
+void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv);
+
+/**
+  * @brief Select pad as a gpio function from IOMUX.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_select_gpio(uint32_t gpio_num);
+
+/**
+  * @brief Set pad driver capability.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @param uint32_t drv : 0-3
+  *
+  * @return None
+  */
+void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
+
+/**
+  * @brief Pull up the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_pullup(uint32_t gpio_num);
+
+/**
+  * @brief Pull down the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_pulldown(uint32_t gpio_num);
+
+/**
+  * @brief Unhold the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_unhold(uint32_t gpio_num);
+
+/**
+  * @brief Hold the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_hold(uint32_t gpio_num);
+
+/**
+  * @brief enable gpio pad input.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_input_enable(uint32_t gpio_num);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_GPIO_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/hmac.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/hmac.h
new file mode 100644
index 00000000000..223fe884a3d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/hmac.h
@@ -0,0 +1,63 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_HMAC_H_
+#define _ROM_HMAC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdlib.h>
+#include "efuse.h"
+
+void ets_hmac_enable(void);
+
+void ets_hmac_disable(void);
+
+/* Use the "upstream" HMAC key (ETS_EFUSE_KEY_PURPOSE_HMAC_UP)
+   to digest a message.
+*/
+int ets_hmac_calculate_message(ets_efuse_block_t key_block, const void *message, size_t message_len, uint8_t *hmac);
+
+/* Calculate a downstream HMAC message to temporarily enable JTAG, or
+   to generate a Digital Signature data decryption key.
+
+   - purpose must be ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE
+     or ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG
+
+   - key_block must be in range ETS_EFUSE_BLOCK_KEY0 toETS_EFUSE_BLOCK_KEY6.
+     This efuse block must have the corresponding purpose set in "purpose", or
+     ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL.
+
+   The result of this HMAC calculation is only made available "downstream" to the
+   corresponding hardware module, and cannot be accessed by software.
+*/
+int ets_hmac_calculate_downstream(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose);
+
+/* Invalidate a downstream HMAC value previously calculated by ets_hmac_calculate_downstream().
+ *
+ * - purpose must match a previous call to ets_hmac_calculate_downstream().
+ *
+ * After this function is called, the corresponding internal operation (JTAG or DS) will no longer
+ * have access to the generated key.
+ */
+int ets_hmac_invalidate_downstream(ets_efuse_purpose_t purpose);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ROM_HMAC_H_
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/libc_stubs.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/libc_stubs.h
new file mode 100644
index 00000000000..233355e9c29
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/libc_stubs.h
@@ -0,0 +1,91 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ROM_LIBC_STUBS_H_
+#define _ROM_LIBC_STUBS_H_
+
+#include <sys/lock.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <reent.h>
+#include <errno.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ESP32-C3 ROM code contains implementations of some of C library functions.
+Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall
+implementation defined in the following struct.
+
+The table itself, by default, is not allocated in RAM. A global pointer syscall_table_ptr is used to
+set the address
+
+So, before using any of the C library functions (except for pure functions and memcpy/memset functions),
+application must allocate syscall table structure for each CPU being used, and populate it with pointers
+to actual implementations of corresponding syscalls.
+*/
+
+struct syscall_stub_table
+{
+    struct _reent* (*__getreent)(void);
+    void* (*_malloc_r)(struct _reent *r, size_t);
+    void (*_free_r)(struct _reent *r, void*);
+    void* (*_realloc_r)(struct _reent *r, void*, size_t);
+    void* (*_calloc_r)(struct _reent *r, size_t, size_t);
+    void (*_abort)(void);
+    int (*_system_r)(struct _reent *r, const char*);
+    int (*_rename_r)(struct _reent *r, const char*, const char*);
+    clock_t (*_times_r)(struct _reent *r, struct tms *);
+    int (*_gettimeofday_r) (struct _reent *r, struct timeval *, void *);
+    void (*_raise_r)(struct _reent *r);
+    int (*_unlink_r)(struct _reent *r, const char*);
+    int (*_link_r)(struct _reent *r, const char*, const char*);
+    int (*_stat_r)(struct _reent *r, const char*, struct stat *);
+    int (*_fstat_r)(struct _reent *r, int, struct stat *);
+    void* (*_sbrk_r)(struct _reent *r, ptrdiff_t);
+    int (*_getpid_r)(struct _reent *r);
+    int (*_kill_r)(struct _reent *r, int, int);
+    void (*_exit_r)(struct _reent *r, int);
+    int (*_close_r)(struct _reent *r, int);
+    int (*_open_r)(struct _reent *r, const char *, int, int);
+    int (*_write_r)(struct _reent *r, int, const void *, int);
+    int (*_lseek_r)(struct _reent *r, int, int, int);
+    int (*_read_r)(struct _reent *r, int, void *, int);
+    void (*_retarget_lock_init)(_LOCK_T *lock);
+    void (*_retarget_lock_init_recursive)(_LOCK_T *lock);
+    void (*_retarget_lock_close)(_LOCK_T lock);
+    void (*_retarget_lock_close_recursive)(_LOCK_T lock);
+    void (*_retarget_lock_acquire)(_LOCK_T lock);
+    void (*_retarget_lock_acquire_recursive)(_LOCK_T lock);
+    int (*_retarget_lock_try_acquire)(_LOCK_T lock);
+    int (*_retarget_lock_try_acquire_recursive)(_LOCK_T lock);
+    void (*_retarget_lock_release)(_LOCK_T lock);
+    void (*_retarget_lock_release_recursive)(_LOCK_T lock);
+    int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
+    int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
+    void (*__assert_func) (const char *file, int line, const char * func, const char *failedexpr) __attribute__((noreturn));
+    void (*__sinit) (struct _reent *r);
+    void (*_cleanup_r) (struct _reent* r);
+};
+
+extern struct syscall_stub_table *syscall_table_ptr;
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif /* _ROM_LIBC_STUBS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/lldesc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/lldesc.h
new file mode 100644
index 00000000000..d4c5d92a306
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/lldesc.h
@@ -0,0 +1,176 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_LLDESC_H_
+#define _ROM_LLDESC_H_
+
+#include <stdint.h>
+
+#include "sys/queue.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LLDESC_TX_MBLK_SIZE                 268 /* */
+#define LLDESC_RX_SMBLK_SIZE                64  /* small block size, for small mgmt frame */
+#define LLDESC_RX_MBLK_SIZE                 524 /* rx is large sinec we want to contain mgmt frame in one block*/
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_SIZE    64  /* it is a small buffer which is a cycle link*/
+#define LLDESC_RX_AMPDU_LEN_MBLK_SIZE      256 /*for ampdu entry*/
+#ifdef ESP_MAC_5
+#define LLDESC_TX_MBLK_NUM                  116  /* 64K / 256 */
+#define LLDESC_RX_MBLK_NUM                  82 /* 64K / 512 MAX 172*/
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM     4
+#define LLDESC_RX_AMPDU_LEN_MLBK_NUM       12
+#else
+#ifdef SBUF_RXTX
+#define LLDESC_TX_MBLK_NUM_MAX    (2 * 48) /* 23K / 260 - 8 */
+#define LLDESC_RX_MBLK_NUM_MAX    (2 * 48) /* 23K / 524 */
+#define LLDESC_TX_MBLK_NUM_MIN    (2 * 16) /* 23K / 260 - 8 */
+#define LLDESC_RX_MBLK_NUM_MIN    (2 * 16) /* 23K / 524 */
+#endif
+#define LLDESC_TX_MBLK_NUM      10      //(2 * 32) /* 23K / 260 - 8 */
+
+#ifdef IEEE80211_RX_AMPDU
+#define LLDESC_RX_MBLK_NUM      30
+#else
+#define LLDESC_RX_MBLK_NUM      10
+#endif /*IEEE80211_RX_AMPDU*/
+
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM  4
+#define LLDESC_RX_AMPDU_LEN_MLBK_NUM    8
+#endif /* !ESP_MAC_5 */
+/*
+ *  SLC2 DMA Desc struct, aka lldesc_t
+ *
+ * --------------------------------------------------------------
+ * | own | EoF | sub_sof | 5'b0   | length [11:0] | size [11:0] |
+ * --------------------------------------------------------------
+ * |            buf_ptr [31:0]                                  |
+ * --------------------------------------------------------------
+ * |            next_desc_ptr [31:0]                            |
+ * --------------------------------------------------------------
+ */
+
+/* this bitfield is start from the LSB!!! */
+typedef struct lldesc_s {
+    volatile uint32_t size  : 12,
+             length: 12,
+             offset: 5, /* h/w reserved 5bit, s/w use it as offset in buffer */
+             sosf  : 1, /* start of sub-frame */
+             eof   : 1, /* end of frame */
+             owner : 1; /* hw or sw */
+    volatile const uint8_t *buf;       /* point to buffer data */
+    union {
+        volatile uint32_t empty;
+        STAILQ_ENTRY(lldesc_s) qe;  /* pointing to the next desc */
+    };
+} lldesc_t;
+
+typedef struct tx_ampdu_entry_s {
+    uint32_t sub_len  : 12,
+             dili_num : 7,
+             : 1,
+             null_byte: 2,
+             data     : 1,
+             enc      : 1,
+             seq      : 8;
+} tx_ampdu_entry_t;
+
+typedef struct lldesc_chain_s {
+    lldesc_t *head;
+    lldesc_t *tail;
+} lldesc_chain_t;
+
+#ifdef SBUF_RXTX
+enum sbuf_mask_s  {
+    SBUF_MOVE_NO = 0,
+    SBUF_MOVE_TX2RX,
+    SBUF_MOVE_RX2TX,
+} ;
+
+#define SBUF_MOVE_STEP 8
+#endif
+#define LLDESC_SIZE  sizeof(struct lldesc_s)
+
+/* SLC Descriptor  */
+#define LLDESC_OWNER_MASK                  0x80000000
+#define LLDESC_OWNER_SHIFT                         31
+#define LLDESC_SW_OWNED                             0
+#define LLDESC_HW_OWNED                             1
+
+#define LLDESC_EOF_MASK                    0x40000000
+#define LLDESC_EOF_SHIFT                           30
+
+#define LLDESC_SOSF_MASK                   0x20000000
+#define LLDESC_SOSF_SHIFT                          29
+
+#define LLDESC_LENGTH_MASK                 0x00fff000
+#define LLDESC_LENGTH_SHIFT                        12
+
+#define LLDESC_SIZE_MASK                   0x00000fff
+#define LLDESC_SIZE_SHIFT                           0
+
+#define LLDESC_ADDR_MASK                    0x000fffff
+
+void lldesc_build_chain(uint8_t *descptr, uint32_t desclen, uint8_t *mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
+                        lldesc_t **head,
+#ifdef TO_HOST_RESTART
+                        lldesc_t **one_before_tail,
+#endif
+                        lldesc_t **tail);
+
+lldesc_t *lldesc_num2link(lldesc_t *head, uint16_t nblks);
+
+lldesc_t *lldesc_set_owner(lldesc_t *head, uint16_t nblks, uint8_t owner);
+
+static inline uint32_t lldesc_get_chain_length(lldesc_t *head)
+{
+    lldesc_t *ds = head;
+    uint32_t len = 0;
+
+    while (ds) {
+        len += ds->length;
+        ds = STAILQ_NEXT(ds, qe);
+    }
+
+    return len;
+}
+
+static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t len)
+{
+    ds->owner  = owner;
+    ds->eof    = eof;
+    ds->sosf   = sosf;
+    ds->length = len;
+}
+
+#define LLDESC_CONFIG(_desc, _owner, _eof, _sosf, _len)        do { \
+        (_desc)->owner  = (_owner); \
+        (_desc)->eof    = (_eof);   \
+        (_desc)->sosf   = (_sosf);  \
+        (_desc)->length = (_len);   \
+} while(0)
+
+#define LLDESC_FROM_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
+
+#define LLDESC_MAC_RX_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, (ds)->size)
+
+#define LLDESC_TO_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_LLDESC_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/md5_hash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/md5_hash.h
new file mode 100644
index 00000000000..63ce15857b5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/md5_hash.h
@@ -0,0 +1,38 @@
+/*
+ * MD5 internal definitions
+ * Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Alternatively, this software may be distributed under the terms of BSD
+ * license.
+ *
+ * See README and COPYING for more details.
+ */
+
+#ifndef _ROM_MD5_HASH_H_
+#define _ROM_MD5_HASH_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct MD5Context {
+    uint32_t buf[4];
+    uint32_t bits[2];
+    uint8_t in[64];
+};
+
+void MD5Init(struct MD5Context *context);
+void MD5Update(struct MD5Context *context, unsigned char const *buf, unsigned len);
+void MD5Final(unsigned char digest[16], struct MD5Context *context);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_MD5_HASH_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/miniz.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/miniz.h
new file mode 100644
index 00000000000..4c8cb7a421d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/miniz.h
@@ -0,0 +1,760 @@
+#ifndef MINIZ_HEADER_INCLUDED
+#define MINIZ_HEADER_INCLUDED
+
+#include <stdlib.h>
+
+// Defines to completely disable specific portions of miniz.c:
+// If all macros here are defined the only functionality remaining will be CRC-32, adler-32, tinfl, and tdefl.
+
+// Define MINIZ_NO_STDIO to disable all usage and any functions which rely on stdio for file I/O.
+#define MINIZ_NO_STDIO
+
+// If MINIZ_NO_TIME is specified then the ZIP archive functions will not be able to get the current time, or
+// get/set file times, and the C run-time funcs that get/set times won't be called.
+// The current downside is the times written to your archives will be from 1979.
+#define MINIZ_NO_TIME
+
+// Define MINIZ_NO_ARCHIVE_APIS to disable all ZIP archive API's.
+#define MINIZ_NO_ARCHIVE_APIS
+
+// Define MINIZ_NO_ARCHIVE_APIS to disable all writing related ZIP archive API's.
+#define MINIZ_NO_ARCHIVE_WRITING_APIS
+
+// Define MINIZ_NO_ZLIB_APIS to remove all ZLIB-style compression/decompression API's.
+#define MINIZ_NO_ZLIB_APIS
+
+// Define MINIZ_NO_ZLIB_COMPATIBLE_NAME to disable zlib names, to prevent conflicts against stock zlib.
+#define MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+
+// Define MINIZ_NO_MALLOC to disable all calls to malloc, free, and realloc.
+// Note if MINIZ_NO_MALLOC is defined then the user must always provide custom user alloc/free/realloc
+// callbacks to the zlib and archive API's, and a few stand-alone helper API's which don't provide custom user
+// functions (such as tdefl_compress_mem_to_heap() and tinfl_decompress_mem_to_heap()) won't work.
+#define MINIZ_NO_MALLOC
+
+#if defined(__TINYC__) && (defined(__linux) || defined(__linux__))
+// TODO: Work around "error: include file 'sys\utime.h' when compiling with tcc on Linux
+#define MINIZ_NO_TIME
+#endif
+
+#if !defined(MINIZ_NO_TIME) && !defined(MINIZ_NO_ARCHIVE_APIS)
+#include <time.h>
+#endif
+
+//Hardcoded options for Xtensa - JD
+#define MINIZ_X86_OR_X64_CPU 0
+#define MINIZ_LITTLE_ENDIAN 1
+#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 0
+#define MINIZ_HAS_64BIT_REGISTERS 0
+#define TINFL_USE_64BIT_BITBUF 0
+
+
+#if defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || defined(__i386) || defined(__i486__) || defined(__i486) || defined(i386) || defined(__ia64__) || defined(__x86_64__)
+// MINIZ_X86_OR_X64_CPU is only used to help set the below macros.
+#define MINIZ_X86_OR_X64_CPU 1
+#endif
+
+#if (__BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) || MINIZ_X86_OR_X64_CPU
+// Set MINIZ_LITTLE_ENDIAN to 1 if the processor is little endian.
+#define MINIZ_LITTLE_ENDIAN 1
+#endif
+
+#if MINIZ_X86_OR_X64_CPU
+// Set MINIZ_USE_UNALIGNED_LOADS_AND_STORES to 1 on CPU's that permit efficient integer loads and stores from unaligned addresses.
+#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 1
+#endif
+
+#if defined(_M_X64) || defined(_WIN64) || defined(__MINGW64__) || defined(_LP64) || defined(__LP64__) || defined(__ia64__) || defined(__x86_64__)
+// Set MINIZ_HAS_64BIT_REGISTERS to 1 if operations on 64-bit integers are reasonably fast (and don't involve compiler generated calls to helper functions).
+#define MINIZ_HAS_64BIT_REGISTERS 1
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ------------------- zlib-style API Definitions.
+
+// For more compatibility with zlib, miniz.c uses unsigned long for some parameters/struct members. Beware: mz_ulong can be either 32 or 64-bits!
+typedef unsigned long mz_ulong;
+
+// mz_free() internally uses the MZ_FREE() macro (which by default calls free() unless you've modified the MZ_MALLOC macro) to release a block allocated from the heap.
+void mz_free(void *p);
+
+#define MZ_ADLER32_INIT (1)
+// mz_adler32() returns the initial adler-32 value to use when called with ptr==NULL.
+mz_ulong mz_adler32(mz_ulong adler, const unsigned char *ptr, size_t buf_len);
+
+#define MZ_CRC32_INIT (0)
+// mz_crc32() returns the initial CRC-32 value to use when called with ptr==NULL.
+mz_ulong mz_crc32(mz_ulong crc, const unsigned char *ptr, size_t buf_len);
+
+// Compression strategies.
+enum { MZ_DEFAULT_STRATEGY = 0, MZ_FILTERED = 1, MZ_HUFFMAN_ONLY = 2, MZ_RLE = 3, MZ_FIXED = 4 };
+
+// Method
+#define MZ_DEFLATED 8
+
+#ifndef MINIZ_NO_ZLIB_APIS
+
+// Heap allocation callbacks.
+// Note that mz_alloc_func parameter types purpsosely differ from zlib's: items/size is size_t, not unsigned long.
+typedef void *(*mz_alloc_func)(void *opaque, size_t items, size_t size);
+typedef void (*mz_free_func)(void *opaque, void *address);
+typedef void *(*mz_realloc_func)(void *opaque, void *address, size_t items, size_t size);
+
+#define MZ_VERSION          "9.1.15"
+#define MZ_VERNUM           0x91F0
+#define MZ_VER_MAJOR        9
+#define MZ_VER_MINOR        1
+#define MZ_VER_REVISION     15
+#define MZ_VER_SUBREVISION  0
+
+// Flush values. For typical usage you only need MZ_NO_FLUSH and MZ_FINISH. The other values are for advanced use (refer to the zlib docs).
+enum { MZ_NO_FLUSH = 0, MZ_PARTIAL_FLUSH = 1, MZ_SYNC_FLUSH = 2, MZ_FULL_FLUSH = 3, MZ_FINISH = 4, MZ_BLOCK = 5 };
+
+// Return status codes. MZ_PARAM_ERROR is non-standard.
+enum { MZ_OK = 0, MZ_STREAM_END = 1, MZ_NEED_DICT = 2, MZ_ERRNO = -1, MZ_STREAM_ERROR = -2, MZ_DATA_ERROR = -3, MZ_MEM_ERROR = -4, MZ_BUF_ERROR = -5, MZ_VERSION_ERROR = -6, MZ_PARAM_ERROR = -10000 };
+
+// Compression levels: 0-9 are the standard zlib-style levels, 10 is best possible compression (not zlib compatible, and may be very slow), MZ_DEFAULT_COMPRESSION=MZ_DEFAULT_LEVEL.
+enum { MZ_NO_COMPRESSION = 0, MZ_BEST_SPEED = 1, MZ_BEST_COMPRESSION = 9, MZ_UBER_COMPRESSION = 10, MZ_DEFAULT_LEVEL = 6, MZ_DEFAULT_COMPRESSION = -1 };
+
+// Window bits
+#define MZ_DEFAULT_WINDOW_BITS 15
+
+struct mz_internal_state;
+
+// Compression/decompression stream struct.
+typedef struct mz_stream_s {
+    const unsigned char *next_in;     // pointer to next byte to read
+    unsigned int avail_in;            // number of bytes available at next_in
+    mz_ulong total_in;                // total number of bytes consumed so far
+
+    unsigned char *next_out;          // pointer to next byte to write
+    unsigned int avail_out;           // number of bytes that can be written to next_out
+    mz_ulong total_out;               // total number of bytes produced so far
+
+    char *msg;                        // error msg (unused)
+    struct mz_internal_state *state;  // internal state, allocated by zalloc/zfree
+
+    mz_alloc_func zalloc;             // optional heap allocation function (defaults to malloc)
+    mz_free_func zfree;               // optional heap free function (defaults to free)
+    void *opaque;                     // heap alloc function user pointer
+
+    int data_type;                    // data_type (unused)
+    mz_ulong adler;                   // adler32 of the source or uncompressed data
+    mz_ulong reserved;                // not used
+} mz_stream;
+
+typedef mz_stream *mz_streamp;
+
+// Returns the version string of miniz.c.
+const char *mz_version(void);
+
+// mz_deflateInit() initializes a compressor with default options:
+// Parameters:
+//  pStream must point to an initialized mz_stream struct.
+//  level must be between [MZ_NO_COMPRESSION, MZ_BEST_COMPRESSION].
+//  level 1 enables a specially optimized compression function that's been optimized purely for performance, not ratio.
+//  (This special func. is currently only enabled when MINIZ_USE_UNALIGNED_LOADS_AND_STORES and MINIZ_LITTLE_ENDIAN are defined.)
+// Return values:
+//  MZ_OK on success.
+//  MZ_STREAM_ERROR if the stream is bogus.
+//  MZ_PARAM_ERROR if the input parameters are bogus.
+//  MZ_MEM_ERROR on out of memory.
+int mz_deflateInit(mz_streamp pStream, int level);
+
+// mz_deflateInit2() is like mz_deflate(), except with more control:
+// Additional parameters:
+//   method must be MZ_DEFLATED
+//   window_bits must be MZ_DEFAULT_WINDOW_BITS (to wrap the deflate stream with zlib header/adler-32 footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate/no header or footer)
+//   mem_level must be between [1, 9] (it's checked but ignored by miniz.c)
+int mz_deflateInit2(mz_streamp pStream, int level, int method, int window_bits, int mem_level, int strategy);
+
+// Quickly resets a compressor without having to reallocate anything. Same as calling mz_deflateEnd() followed by mz_deflateInit()/mz_deflateInit2().
+int mz_deflateReset(mz_streamp pStream);
+
+// mz_deflate() compresses the input to output, consuming as much of the input and producing as much output as possible.
+// Parameters:
+//   pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
+//   flush may be MZ_NO_FLUSH, MZ_PARTIAL_FLUSH/MZ_SYNC_FLUSH, MZ_FULL_FLUSH, or MZ_FINISH.
+// Return values:
+//   MZ_OK on success (when flushing, or if more input is needed but not available, and/or there's more output to be written but the output buffer is full).
+//   MZ_STREAM_END if all input has been consumed and all output bytes have been written. Don't call mz_deflate() on the stream anymore.
+//   MZ_STREAM_ERROR if the stream is bogus.
+//   MZ_PARAM_ERROR if one of the parameters is invalid.
+//   MZ_BUF_ERROR if no forward progress is possible because the input and/or output buffers are empty. (Fill up the input buffer or free up some output space and try again.)
+int mz_deflate(mz_streamp pStream, int flush);
+
+// mz_deflateEnd() deinitializes a compressor:
+// Return values:
+//  MZ_OK on success.
+//  MZ_STREAM_ERROR if the stream is bogus.
+int mz_deflateEnd(mz_streamp pStream);
+
+// mz_deflateBound() returns a (very) conservative upper bound on the amount of data that could be generated by deflate(), assuming flush is set to only MZ_NO_FLUSH or MZ_FINISH.
+mz_ulong mz_deflateBound(mz_streamp pStream, mz_ulong source_len);
+
+// Single-call compression functions mz_compress() and mz_compress2():
+// Returns MZ_OK on success, or one of the error codes from mz_deflate() on failure.
+int mz_compress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
+int mz_compress2(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len, int level);
+
+// mz_compressBound() returns a (very) conservative upper bound on the amount of data that could be generated by calling mz_compress().
+mz_ulong mz_compressBound(mz_ulong source_len);
+
+// Initializes a decompressor.
+int mz_inflateInit(mz_streamp pStream);
+
+// mz_inflateInit2() is like mz_inflateInit() with an additional option that controls the window size and whether or not the stream has been wrapped with a zlib header/footer:
+// window_bits must be MZ_DEFAULT_WINDOW_BITS (to parse zlib header/footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate).
+int mz_inflateInit2(mz_streamp pStream, int window_bits);
+
+// Decompresses the input stream to the output, consuming only as much of the input as needed, and writing as much to the output as possible.
+// Parameters:
+//   pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
+//   flush may be MZ_NO_FLUSH, MZ_SYNC_FLUSH, or MZ_FINISH.
+//   On the first call, if flush is MZ_FINISH it's assumed the input and output buffers are both sized large enough to decompress the entire stream in a single call (this is slightly faster).
+//   MZ_FINISH implies that there are no more source bytes available beside what's already in the input buffer, and that the output buffer is large enough to hold the rest of the decompressed data.
+// Return values:
+//   MZ_OK on success. Either more input is needed but not available, and/or there's more output to be written but the output buffer is full.
+//   MZ_STREAM_END if all needed input has been consumed and all output bytes have been written. For zlib streams, the adler-32 of the decompressed data has also been verified.
+//   MZ_STREAM_ERROR if the stream is bogus.
+//   MZ_DATA_ERROR if the deflate stream is invalid.
+//   MZ_PARAM_ERROR if one of the parameters is invalid.
+//   MZ_BUF_ERROR if no forward progress is possible because the input buffer is empty but the inflater needs more input to continue, or if the output buffer is not large enough. Call mz_inflate() again
+//   with more input data, or with more room in the output buffer (except when using single call decompression, described above).
+int mz_inflate(mz_streamp pStream, int flush);
+
+// Deinitializes a decompressor.
+int mz_inflateEnd(mz_streamp pStream);
+
+// Single-call decompression.
+// Returns MZ_OK on success, or one of the error codes from mz_inflate() on failure.
+int mz_uncompress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
+
+// Returns a string description of the specified error code, or NULL if the error code is invalid.
+const char *mz_error(int err);
+
+// Redefine zlib-compatible names to miniz equivalents, so miniz.c can be used as a drop-in replacement for the subset of zlib that miniz.c supports.
+// Define MINIZ_NO_ZLIB_COMPATIBLE_NAMES to disable zlib-compatibility if you use zlib in the same project.
+#ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+typedef unsigned char Byte;
+typedef unsigned int uInt;
+typedef mz_ulong uLong;
+typedef Byte Bytef;
+typedef uInt uIntf;
+typedef char charf;
+typedef int intf;
+typedef void *voidpf;
+typedef uLong uLongf;
+typedef void *voidp;
+typedef void *const voidpc;
+#define Z_NULL                0
+#define Z_NO_FLUSH            MZ_NO_FLUSH
+#define Z_PARTIAL_FLUSH       MZ_PARTIAL_FLUSH
+#define Z_SYNC_FLUSH          MZ_SYNC_FLUSH
+#define Z_FULL_FLUSH          MZ_FULL_FLUSH
+#define Z_FINISH              MZ_FINISH
+#define Z_BLOCK               MZ_BLOCK
+#define Z_OK                  MZ_OK
+#define Z_STREAM_END          MZ_STREAM_END
+#define Z_NEED_DICT           MZ_NEED_DICT
+#define Z_ERRNO               MZ_ERRNO
+#define Z_STREAM_ERROR        MZ_STREAM_ERROR
+#define Z_DATA_ERROR          MZ_DATA_ERROR
+#define Z_MEM_ERROR           MZ_MEM_ERROR
+#define Z_BUF_ERROR           MZ_BUF_ERROR
+#define Z_VERSION_ERROR       MZ_VERSION_ERROR
+#define Z_PARAM_ERROR         MZ_PARAM_ERROR
+#define Z_NO_COMPRESSION      MZ_NO_COMPRESSION
+#define Z_BEST_SPEED          MZ_BEST_SPEED
+#define Z_BEST_COMPRESSION    MZ_BEST_COMPRESSION
+#define Z_DEFAULT_COMPRESSION MZ_DEFAULT_COMPRESSION
+#define Z_DEFAULT_STRATEGY    MZ_DEFAULT_STRATEGY
+#define Z_FILTERED            MZ_FILTERED
+#define Z_HUFFMAN_ONLY        MZ_HUFFMAN_ONLY
+#define Z_RLE                 MZ_RLE
+#define Z_FIXED               MZ_FIXED
+#define Z_DEFLATED            MZ_DEFLATED
+#define Z_DEFAULT_WINDOW_BITS MZ_DEFAULT_WINDOW_BITS
+#define alloc_func            mz_alloc_func
+#define free_func             mz_free_func
+#define internal_state        mz_internal_state
+#define z_stream              mz_stream
+#define deflateInit           mz_deflateInit
+#define deflateInit2          mz_deflateInit2
+#define deflateReset          mz_deflateReset
+#define deflate               mz_deflate
+#define deflateEnd            mz_deflateEnd
+#define deflateBound          mz_deflateBound
+#define compress              mz_compress
+#define compress2             mz_compress2
+#define compressBound         mz_compressBound
+#define inflateInit           mz_inflateInit
+#define inflateInit2          mz_inflateInit2
+#define inflate               mz_inflate
+#define inflateEnd            mz_inflateEnd
+#define uncompress            mz_uncompress
+#define crc32                 mz_crc32
+#define adler32               mz_adler32
+#define MAX_WBITS             15
+#define MAX_MEM_LEVEL         9
+#define zError                mz_error
+#define ZLIB_VERSION          MZ_VERSION
+#define ZLIB_VERNUM           MZ_VERNUM
+#define ZLIB_VER_MAJOR        MZ_VER_MAJOR
+#define ZLIB_VER_MINOR        MZ_VER_MINOR
+#define ZLIB_VER_REVISION     MZ_VER_REVISION
+#define ZLIB_VER_SUBREVISION  MZ_VER_SUBREVISION
+#define zlibVersion           mz_version
+#define zlib_version          mz_version()
+#endif // #ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+
+#endif // MINIZ_NO_ZLIB_APIS
+
+// ------------------- Types and macros
+
+typedef unsigned char mz_uint8;
+typedef signed short mz_int16;
+typedef unsigned short mz_uint16;
+typedef unsigned int mz_uint32;
+typedef unsigned int mz_uint;
+typedef long long mz_int64;
+typedef unsigned long long mz_uint64;
+typedef int mz_bool;
+
+#define MZ_FALSE (0)
+#define MZ_TRUE (1)
+
+// An attempt to work around MSVC's spammy "warning C4127: conditional expression is constant" message.
+#ifdef _MSC_VER
+#define MZ_MACRO_END while (0, 0)
+#else
+#define MZ_MACRO_END while (0)
+#endif
+
+// ------------------- ZIP archive reading/writing
+
+#ifndef MINIZ_NO_ARCHIVE_APIS
+
+enum {
+    MZ_ZIP_MAX_IO_BUF_SIZE = 64 * 1024,
+    MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE = 260,
+    MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE = 256
+};
+
+typedef struct {
+    mz_uint32 m_file_index;
+    mz_uint32 m_central_dir_ofs;
+    mz_uint16 m_version_made_by;
+    mz_uint16 m_version_needed;
+    mz_uint16 m_bit_flag;
+    mz_uint16 m_method;
+#ifndef MINIZ_NO_TIME
+    time_t m_time;
+#endif
+    mz_uint32 m_crc32;
+    mz_uint64 m_comp_size;
+    mz_uint64 m_uncomp_size;
+    mz_uint16 m_internal_attr;
+    mz_uint32 m_external_attr;
+    mz_uint64 m_local_header_ofs;
+    mz_uint32 m_comment_size;
+    char m_filename[MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE];
+    char m_comment[MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE];
+} mz_zip_archive_file_stat;
+
+typedef size_t (*mz_file_read_func)(void *pOpaque, mz_uint64 file_ofs, void *pBuf, size_t n);
+typedef size_t (*mz_file_write_func)(void *pOpaque, mz_uint64 file_ofs, const void *pBuf, size_t n);
+
+struct mz_zip_internal_state_tag;
+typedef struct mz_zip_internal_state_tag mz_zip_internal_state;
+
+typedef enum {
+    MZ_ZIP_MODE_INVALID = 0,
+    MZ_ZIP_MODE_READING = 1,
+    MZ_ZIP_MODE_WRITING = 2,
+    MZ_ZIP_MODE_WRITING_HAS_BEEN_FINALIZED = 3
+} mz_zip_mode;
+
+typedef struct mz_zip_archive_tag {
+    mz_uint64 m_archive_size;
+    mz_uint64 m_central_directory_file_ofs;
+    mz_uint m_total_files;
+    mz_zip_mode m_zip_mode;
+
+    mz_uint m_file_offset_alignment;
+
+    mz_alloc_func m_pAlloc;
+    mz_free_func m_pFree;
+    mz_realloc_func m_pRealloc;
+    void *m_pAlloc_opaque;
+
+    mz_file_read_func m_pRead;
+    mz_file_write_func m_pWrite;
+    void *m_pIO_opaque;
+
+    mz_zip_internal_state *m_pState;
+
+} mz_zip_archive;
+
+typedef enum {
+    MZ_ZIP_FLAG_CASE_SENSITIVE                = 0x0100,
+    MZ_ZIP_FLAG_IGNORE_PATH                   = 0x0200,
+    MZ_ZIP_FLAG_COMPRESSED_DATA               = 0x0400,
+    MZ_ZIP_FLAG_DO_NOT_SORT_CENTRAL_DIRECTORY = 0x0800
+} mz_zip_flags;
+
+// ZIP archive reading
+
+// Inits a ZIP archive reader.
+// These functions read and validate the archive's central directory.
+mz_bool mz_zip_reader_init(mz_zip_archive *pZip, mz_uint64 size, mz_uint32 flags);
+mz_bool mz_zip_reader_init_mem(mz_zip_archive *pZip, const void *pMem, size_t size, mz_uint32 flags);
+
+#ifndef MINIZ_NO_STDIO
+mz_bool mz_zip_reader_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint32 flags);
+#endif
+
+// Returns the total number of files in the archive.
+mz_uint mz_zip_reader_get_num_files(mz_zip_archive *pZip);
+
+// Returns detailed information about an archive file entry.
+mz_bool mz_zip_reader_file_stat(mz_zip_archive *pZip, mz_uint file_index, mz_zip_archive_file_stat *pStat);
+
+// Determines if an archive file entry is a directory entry.
+mz_bool mz_zip_reader_is_file_a_directory(mz_zip_archive *pZip, mz_uint file_index);
+mz_bool mz_zip_reader_is_file_encrypted(mz_zip_archive *pZip, mz_uint file_index);
+
+// Retrieves the filename of an archive file entry.
+// Returns the number of bytes written to pFilename, or if filename_buf_size is 0 this function returns the number of bytes needed to fully store the filename.
+mz_uint mz_zip_reader_get_filename(mz_zip_archive *pZip, mz_uint file_index, char *pFilename, mz_uint filename_buf_size);
+
+// Attempts to locates a file in the archive's central directory.
+// Valid flags: MZ_ZIP_FLAG_CASE_SENSITIVE, MZ_ZIP_FLAG_IGNORE_PATH
+// Returns -1 if the file cannot be found.
+int mz_zip_reader_locate_file(mz_zip_archive *pZip, const char *pName, const char *pComment, mz_uint flags);
+
+// Extracts a archive file to a memory buffer using no memory allocation.
+mz_bool mz_zip_reader_extract_to_mem_no_alloc(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
+mz_bool mz_zip_reader_extract_file_to_mem_no_alloc(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
+
+// Extracts a archive file to a memory buffer.
+mz_bool mz_zip_reader_extract_to_mem(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_mem(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags);
+
+// Extracts a archive file to a dynamically allocated heap buffer.
+void *mz_zip_reader_extract_to_heap(mz_zip_archive *pZip, mz_uint file_index, size_t *pSize, mz_uint flags);
+void *mz_zip_reader_extract_file_to_heap(mz_zip_archive *pZip, const char *pFilename, size_t *pSize, mz_uint flags);
+
+// Extracts a archive file using a callback function to output the file's data.
+mz_bool mz_zip_reader_extract_to_callback(mz_zip_archive *pZip, mz_uint file_index, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_callback(mz_zip_archive *pZip, const char *pFilename, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
+
+#ifndef MINIZ_NO_STDIO
+// Extracts a archive file to a disk file and sets its last accessed and modified times.
+// This function only extracts files, not archive directory records.
+mz_bool mz_zip_reader_extract_to_file(mz_zip_archive *pZip, mz_uint file_index, const char *pDst_filename, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_file(mz_zip_archive *pZip, const char *pArchive_filename, const char *pDst_filename, mz_uint flags);
+#endif
+
+// Ends archive reading, freeing all allocations, and closing the input archive file if mz_zip_reader_init_file() was used.
+mz_bool mz_zip_reader_end(mz_zip_archive *pZip);
+
+// ZIP archive writing
+
+#ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
+
+// Inits a ZIP archive writer.
+mz_bool mz_zip_writer_init(mz_zip_archive *pZip, mz_uint64 existing_size);
+mz_bool mz_zip_writer_init_heap(mz_zip_archive *pZip, size_t size_to_reserve_at_beginning, size_t initial_allocation_size);
+
+#ifndef MINIZ_NO_STDIO
+mz_bool mz_zip_writer_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint64 size_to_reserve_at_beginning);
+#endif
+
+// Converts a ZIP archive reader object into a writer object, to allow efficient in-place file appends to occur on an existing archive.
+// For archives opened using mz_zip_reader_init_file, pFilename must be the archive's filename so it can be reopened for writing. If the file can't be reopened, mz_zip_reader_end() will be called.
+// For archives opened using mz_zip_reader_init_mem, the memory block must be growable using the realloc callback (which defaults to realloc unless you've overridden it).
+// Finally, for archives opened using mz_zip_reader_init, the mz_zip_archive's user provided m_pWrite function cannot be NULL.
+// Note: In-place archive modification is not recommended unless you know what you're doing, because if execution stops or something goes wrong before
+// the archive is finalized the file's central directory will be hosed.
+mz_bool mz_zip_writer_init_from_reader(mz_zip_archive *pZip, const char *pFilename);
+
+// Adds the contents of a memory buffer to an archive. These functions record the current local time into the archive.
+// To add a directory entry, call this method with an archive name ending in a forwardslash with empty buffer.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_writer_add_mem(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, mz_uint level_and_flags);
+mz_bool mz_zip_writer_add_mem_ex(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags, mz_uint64 uncomp_size, mz_uint32 uncomp_crc32);
+
+#ifndef MINIZ_NO_STDIO
+// Adds the contents of a disk file to an archive. This function also records the disk file's modified time into the archive.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_writer_add_file(mz_zip_archive *pZip, const char *pArchive_name, const char *pSrc_filename, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
+#endif
+
+// Adds a file to an archive by fully cloning the data from another archive.
+// This function fully clones the source file's compressed data (no recompression), along with its full filename, extra data, and comment fields.
+mz_bool mz_zip_writer_add_from_zip_reader(mz_zip_archive *pZip, mz_zip_archive *pSource_zip, mz_uint file_index);
+
+// Finalizes the archive by writing the central directory records followed by the end of central directory record.
+// After an archive is finalized, the only valid call on the mz_zip_archive struct is mz_zip_writer_end().
+// An archive must be manually finalized by calling this function for it to be valid.
+mz_bool mz_zip_writer_finalize_archive(mz_zip_archive *pZip);
+mz_bool mz_zip_writer_finalize_heap_archive(mz_zip_archive *pZip, void **pBuf, size_t *pSize);
+
+// Ends archive writing, freeing all allocations, and closing the output file if mz_zip_writer_init_file() was used.
+// Note for the archive to be valid, it must have been finalized before ending.
+mz_bool mz_zip_writer_end(mz_zip_archive *pZip);
+
+// Misc. high-level helper functions:
+
+// mz_zip_add_mem_to_archive_file_in_place() efficiently (but not atomically) appends a memory blob to a ZIP archive.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_add_mem_to_archive_file_in_place(const char *pZip_filename, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
+
+// Reads a single file from an archive into a heap block.
+// Returns NULL on failure.
+void *mz_zip_extract_archive_file_to_heap(const char *pZip_filename, const char *pArchive_name, size_t *pSize, mz_uint zip_flags);
+
+#endif // #ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
+
+#endif // #ifndef MINIZ_NO_ARCHIVE_APIS
+
+// ------------------- Low-level Decompression API Definitions
+
+// Decompression flags used by tinfl_decompress().
+// TINFL_FLAG_PARSE_ZLIB_HEADER: If set, the input has a valid zlib header and ends with an adler32 checksum (it's a valid zlib stream). Otherwise, the input is a raw deflate stream.
+// TINFL_FLAG_HAS_MORE_INPUT: If set, there are more input bytes available beyond the end of the supplied input buffer. If clear, the input buffer contains all remaining input.
+// TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF: If set, the output buffer is large enough to hold the entire decompressed stream. If clear, the output buffer is at least the size of the dictionary (typically 32KB).
+// TINFL_FLAG_COMPUTE_ADLER32: Force adler-32 checksum computation of the decompressed bytes.
+enum {
+    TINFL_FLAG_PARSE_ZLIB_HEADER = 1,
+    TINFL_FLAG_HAS_MORE_INPUT = 2,
+    TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF = 4,
+    TINFL_FLAG_COMPUTE_ADLER32 = 8
+};
+
+// High level decompression functions:
+// tinfl_decompress_mem_to_heap() decompresses a block in memory to a heap block allocated via malloc().
+// On entry:
+//  pSrc_buf, src_buf_len: Pointer and size of the Deflate or zlib source data to decompress.
+// On return:
+//  Function returns a pointer to the decompressed data, or NULL on failure.
+//  *pOut_len will be set to the decompressed data's size, which could be larger than src_buf_len on uncompressible data.
+//  The caller must call mz_free() on the returned block when it's no longer needed.
+void *tinfl_decompress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
+
+// tinfl_decompress_mem_to_mem() decompresses a block in memory to another block in memory.
+// Returns TINFL_DECOMPRESS_MEM_TO_MEM_FAILED on failure, or the number of bytes written on success.
+#define TINFL_DECOMPRESS_MEM_TO_MEM_FAILED ((size_t)(-1))
+size_t tinfl_decompress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
+
+// tinfl_decompress_mem_to_callback() decompresses a block in memory to an internal 32KB buffer, and a user provided callback function will be called to flush the buffer.
+// Returns 1 on success or 0 on failure.
+typedef int (*tinfl_put_buf_func_ptr)(const void *pBuf, int len, void *pUser);
+int tinfl_decompress_mem_to_callback(const void *pIn_buf, size_t *pIn_buf_size, tinfl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+struct tinfl_decompressor_tag; typedef struct tinfl_decompressor_tag tinfl_decompressor;
+
+// Max size of LZ dictionary.
+#define TINFL_LZ_DICT_SIZE 32768
+
+// Return status.
+typedef enum {
+    TINFL_STATUS_BAD_PARAM = -3,
+    TINFL_STATUS_ADLER32_MISMATCH = -2,
+    TINFL_STATUS_FAILED = -1,
+    TINFL_STATUS_DONE = 0,
+    TINFL_STATUS_NEEDS_MORE_INPUT = 1,
+    TINFL_STATUS_HAS_MORE_OUTPUT = 2
+} tinfl_status;
+
+// Initializes the decompressor to its initial state.
+#define tinfl_init(r) do { (r)->m_state = 0; } MZ_MACRO_END
+#define tinfl_get_adler32(r) (r)->m_check_adler32
+
+// Main low-level decompressor coroutine function. This is the only function actually needed for decompression. All the other functions are just high-level helpers for improved usability.
+// This is a universal API, i.e. it can be used as a building block to build any desired higher level decompression API. In the limit case, it can be called once per every byte input or output.
+tinfl_status tinfl_decompress(tinfl_decompressor *r, const mz_uint8 *pIn_buf_next, size_t *pIn_buf_size, mz_uint8 *pOut_buf_start, mz_uint8 *pOut_buf_next, size_t *pOut_buf_size, const mz_uint32 decomp_flags);
+
+// Internal/private bits follow.
+enum {
+    TINFL_MAX_HUFF_TABLES = 3, TINFL_MAX_HUFF_SYMBOLS_0 = 288, TINFL_MAX_HUFF_SYMBOLS_1 = 32, TINFL_MAX_HUFF_SYMBOLS_2 = 19,
+    TINFL_FAST_LOOKUP_BITS = 10, TINFL_FAST_LOOKUP_SIZE = 1 << TINFL_FAST_LOOKUP_BITS
+};
+
+typedef struct {
+    mz_uint8 m_code_size[TINFL_MAX_HUFF_SYMBOLS_0];
+    mz_int16 m_look_up[TINFL_FAST_LOOKUP_SIZE], m_tree[TINFL_MAX_HUFF_SYMBOLS_0 * 2];
+} tinfl_huff_table;
+
+#if MINIZ_HAS_64BIT_REGISTERS
+#define TINFL_USE_64BIT_BITBUF 1
+#endif
+
+#if TINFL_USE_64BIT_BITBUF
+typedef mz_uint64 tinfl_bit_buf_t;
+#define TINFL_BITBUF_SIZE (64)
+#else
+typedef mz_uint32 tinfl_bit_buf_t;
+#define TINFL_BITBUF_SIZE (32)
+#endif
+
+struct tinfl_decompressor_tag {
+    mz_uint32 m_state, m_num_bits, m_zhdr0, m_zhdr1, m_z_adler32, m_final, m_type, m_check_adler32, m_dist, m_counter, m_num_extra, m_table_sizes[TINFL_MAX_HUFF_TABLES];
+    tinfl_bit_buf_t m_bit_buf;
+    size_t m_dist_from_out_buf_start;
+    tinfl_huff_table m_tables[TINFL_MAX_HUFF_TABLES];
+    mz_uint8 m_raw_header[4], m_len_codes[TINFL_MAX_HUFF_SYMBOLS_0 + TINFL_MAX_HUFF_SYMBOLS_1 + 137];
+};
+
+// ------------------- Low-level Compression API Definitions
+
+// Set TDEFL_LESS_MEMORY to 1 to use less memory (compression will be slightly slower, and raw/dynamic blocks will be output more frequently).
+#define TDEFL_LESS_MEMORY 1
+
+// tdefl_init() compression flags logically OR'd together (low 12 bits contain the max. number of probes per dictionary search):
+// TDEFL_DEFAULT_MAX_PROBES: The compressor defaults to 128 dictionary probes per dictionary search. 0=Huffman only, 1=Huffman+LZ (fastest/crap compression), 4095=Huffman+LZ (slowest/best compression).
+enum {
+    TDEFL_HUFFMAN_ONLY = 0, TDEFL_DEFAULT_MAX_PROBES = 128, TDEFL_MAX_PROBES_MASK = 0xFFF
+};
+
+// TDEFL_WRITE_ZLIB_HEADER: If set, the compressor outputs a zlib header before the deflate data, and the Adler-32 of the source data at the end. Otherwise, you'll get raw deflate data.
+// TDEFL_COMPUTE_ADLER32: Always compute the adler-32 of the input data (even when not writing zlib headers).
+// TDEFL_GREEDY_PARSING_FLAG: Set to use faster greedy parsing, instead of more efficient lazy parsing.
+// TDEFL_NONDETERMINISTIC_PARSING_FLAG: Enable to decrease the compressor's initialization time to the minimum, but the output may vary from run to run given the same input (depending on the contents of memory).
+// TDEFL_RLE_MATCHES: Only look for RLE matches (matches with a distance of 1)
+// TDEFL_FILTER_MATCHES: Discards matches <= 5 chars if enabled.
+// TDEFL_FORCE_ALL_STATIC_BLOCKS: Disable usage of optimized Huffman tables.
+// TDEFL_FORCE_ALL_RAW_BLOCKS: Only use raw (uncompressed) deflate blocks.
+// The low 12 bits are reserved to control the max # of hash probes per dictionary lookup (see TDEFL_MAX_PROBES_MASK).
+enum {
+    TDEFL_WRITE_ZLIB_HEADER             = 0x01000,
+    TDEFL_COMPUTE_ADLER32               = 0x02000,
+    TDEFL_GREEDY_PARSING_FLAG           = 0x04000,
+    TDEFL_NONDETERMINISTIC_PARSING_FLAG = 0x08000,
+    TDEFL_RLE_MATCHES                   = 0x10000,
+    TDEFL_FILTER_MATCHES                = 0x20000,
+    TDEFL_FORCE_ALL_STATIC_BLOCKS       = 0x40000,
+    TDEFL_FORCE_ALL_RAW_BLOCKS          = 0x80000
+};
+
+// High level compression functions:
+// tdefl_compress_mem_to_heap() compresses a block in memory to a heap block allocated via malloc().
+// On entry:
+//  pSrc_buf, src_buf_len: Pointer and size of source block to compress.
+//  flags: The max match finder probes (default is 128) logically OR'd against the above flags. Higher probes are slower but improve compression.
+// On return:
+//  Function returns a pointer to the compressed data, or NULL on failure.
+//  *pOut_len will be set to the compressed data's size, which could be larger than src_buf_len on uncompressible data.
+//  The caller must free() the returned block when it's no longer needed.
+void *tdefl_compress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
+
+// tdefl_compress_mem_to_mem() compresses a block in memory to another block in memory.
+// Returns 0 on failure.
+size_t tdefl_compress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
+
+// Compresses an image to a compressed PNG file in memory.
+// On entry:
+//  pImage, w, h, and num_chans describe the image to compress. num_chans may be 1, 2, 3, or 4.
+//  The image pitch in bytes per scanline will be w*num_chans. The leftmost pixel on the top scanline is stored first in memory.
+//  level may range from [0,10], use MZ_NO_COMPRESSION, MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc. or a decent default is MZ_DEFAULT_LEVEL
+//  If flip is true, the image will be flipped on the Y axis (useful for OpenGL apps).
+// On return:
+//  Function returns a pointer to the compressed data, or NULL on failure.
+//  *pLen_out will be set to the size of the PNG image file.
+//  The caller must mz_free() the returned heap block (which will typically be larger than *pLen_out) when it's no longer needed.
+void *tdefl_write_image_to_png_file_in_memory_ex(const void *pImage, int w, int h, int num_chans, size_t *pLen_out, mz_uint level, mz_bool flip);
+void *tdefl_write_image_to_png_file_in_memory(const void *pImage, int w, int h, int num_chans, size_t *pLen_out);
+
+// Output stream interface. The compressor uses this interface to write compressed data. It'll typically be called TDEFL_OUT_BUF_SIZE at a time.
+typedef mz_bool (*tdefl_put_buf_func_ptr)(const void *pBuf, int len, void *pUser);
+
+// tdefl_compress_mem_to_output() compresses a block to an output stream. The above helpers use this function internally.
+mz_bool tdefl_compress_mem_to_output(const void *pBuf, size_t buf_len, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+enum { TDEFL_MAX_HUFF_TABLES = 3, TDEFL_MAX_HUFF_SYMBOLS_0 = 288, TDEFL_MAX_HUFF_SYMBOLS_1 = 32, TDEFL_MAX_HUFF_SYMBOLS_2 = 19, TDEFL_LZ_DICT_SIZE = 32768, TDEFL_LZ_DICT_SIZE_MASK = TDEFL_LZ_DICT_SIZE - 1, TDEFL_MIN_MATCH_LEN = 3, TDEFL_MAX_MATCH_LEN = 258 };
+
+// TDEFL_OUT_BUF_SIZE MUST be large enough to hold a single entire compressed output block (using static/fixed Huffman codes).
+#if TDEFL_LESS_MEMORY
+enum { TDEFL_LZ_CODE_BUF_SIZE = 24 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 12, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
+#else
+enum { TDEFL_LZ_CODE_BUF_SIZE = 64 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 15, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
+#endif
+
+// The low-level tdefl functions below may be used directly if the above helper functions aren't flexible enough. The low-level functions don't make any heap allocations, unlike the above helper functions.
+typedef enum {
+    TDEFL_STATUS_BAD_PARAM = -2,
+    TDEFL_STATUS_PUT_BUF_FAILED = -1,
+    TDEFL_STATUS_OKAY = 0,
+    TDEFL_STATUS_DONE = 1,
+} tdefl_status;
+
+// Must map to MZ_NO_FLUSH, MZ_SYNC_FLUSH, etc. enums
+typedef enum {
+    TDEFL_NO_FLUSH = 0,
+    TDEFL_SYNC_FLUSH = 2,
+    TDEFL_FULL_FLUSH = 3,
+    TDEFL_FINISH = 4
+} tdefl_flush;
+
+// tdefl's compression state structure.
+typedef struct {
+    tdefl_put_buf_func_ptr m_pPut_buf_func;
+    void *m_pPut_buf_user;
+    mz_uint m_flags, m_max_probes[2];
+    int m_greedy_parsing;
+    mz_uint m_adler32, m_lookahead_pos, m_lookahead_size, m_dict_size;
+    mz_uint8 *m_pLZ_code_buf, *m_pLZ_flags, *m_pOutput_buf, *m_pOutput_buf_end;
+    mz_uint m_num_flags_left, m_total_lz_bytes, m_lz_code_buf_dict_pos, m_bits_in, m_bit_buffer;
+    mz_uint m_saved_match_dist, m_saved_match_len, m_saved_lit, m_output_flush_ofs, m_output_flush_remaining, m_finished, m_block_index, m_wants_to_finish;
+    tdefl_status m_prev_return_status;
+    const void *m_pIn_buf;
+    void *m_pOut_buf;
+    size_t *m_pIn_buf_size, *m_pOut_buf_size;
+    tdefl_flush m_flush;
+    const mz_uint8 *m_pSrc;
+    size_t m_src_buf_left, m_out_buf_ofs;
+    mz_uint8 m_dict[TDEFL_LZ_DICT_SIZE + TDEFL_MAX_MATCH_LEN - 1];
+    mz_uint16 m_huff_count[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+    mz_uint16 m_huff_codes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+    mz_uint8 m_huff_code_sizes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+    mz_uint8 m_lz_code_buf[TDEFL_LZ_CODE_BUF_SIZE];
+    mz_uint16 m_next[TDEFL_LZ_DICT_SIZE];
+    mz_uint16 m_hash[TDEFL_LZ_HASH_SIZE];
+    mz_uint8 m_output_buf[TDEFL_OUT_BUF_SIZE];
+} tdefl_compressor;
+
+// Initializes the compressor.
+// There is no corresponding deinit() function because the tdefl API's do not dynamically allocate memory.
+// pBut_buf_func: If NULL, output data will be supplied to the specified callback. In this case, the user should call the tdefl_compress_buffer() API for compression.
+// If pBut_buf_func is NULL the user should always call the tdefl_compress() API.
+// flags: See the above enums (TDEFL_HUFFMAN_ONLY, TDEFL_WRITE_ZLIB_HEADER, etc.)
+tdefl_status tdefl_init(tdefl_compressor *d, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+// Compresses a block of data, consuming as much of the specified input buffer as possible, and writing as much compressed data to the specified output buffer as possible.
+tdefl_status tdefl_compress(tdefl_compressor *d, const void *pIn_buf, size_t *pIn_buf_size, void *pOut_buf, size_t *pOut_buf_size, tdefl_flush flush);
+
+// tdefl_compress_buffer() is only usable when the tdefl_init() is called with a non-NULL tdefl_put_buf_func_ptr.
+// tdefl_compress_buffer() always consumes the entire input buffer.
+tdefl_status tdefl_compress_buffer(tdefl_compressor *d, const void *pIn_buf, size_t in_buf_size, tdefl_flush flush);
+
+tdefl_status tdefl_get_prev_return_status(tdefl_compressor *d);
+mz_uint32 tdefl_get_adler32(tdefl_compressor *d);
+
+// Can't use tdefl_create_comp_flags_from_zip_params if MINIZ_NO_ZLIB_APIS isn't defined, because it uses some of its macros.
+#ifndef MINIZ_NO_ZLIB_APIS
+// Create tdefl_compress() flags given zlib-style compression parameters.
+// level may range from [0,10] (where 10 is absolute max compression, but may be much slower on some files)
+// window_bits may be -15 (raw deflate) or 15 (zlib)
+// strategy may be either MZ_DEFAULT_STRATEGY, MZ_FILTERED, MZ_HUFFMAN_ONLY, MZ_RLE, or MZ_FIXED
+mz_uint tdefl_create_comp_flags_from_zip_params(int level, int window_bits, int strategy);
+#endif // #ifndef MINIZ_NO_ZLIB_APIS
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // MINIZ_HEADER_INCLUDED
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/rom_layout.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/rom_layout.h
new file mode 100644
index 00000000000..cd1730c840e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/rom_layout.h
@@ -0,0 +1,86 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SUPPORT_BTDM            1
+#define SUPPORT_WIFI            1
+
+/* Structure and functions for returning ROM global layout
+ *
+ * This is for address symbols defined in the linker script, which may change during ECOs.
+ */
+typedef struct {
+    void *dram0_stack_shared_mem_start;
+    void *dram0_rtos_reserved_start;
+    void *stack_sentry;
+    void *stack;
+    void *stack_sentry_app;
+    void *stack_app;
+
+    /* BTDM data */
+    void *data_start_btdm;
+    void *data_end_btdm;
+    void *bss_start_btdm;
+    void *bss_end_btdm;
+    void *data_start_btdm_rom;
+    void *data_end_btdm_rom;
+    void *data_start_interface_btdm;
+    void *data_end_interface_btdm;
+    void *bss_start_interface_btdm;
+    void *bss_end_interface_btdm;
+
+    /* Other DRAM ranges */
+#if SUPPORT_BTDM || SUPPORT_WIFI
+    void *dram_start_phyrom;
+    void *dram_end_phyrom;
+#endif
+#if SUPPORT_WIFI
+    void *dram_start_coexist;
+    void *dram_end_coexist;
+    void *dram_start_net80211;
+    void *dram_end_net80211;
+    void *dram_start_pp;
+    void *dram_end_pp;
+    void *data_start_interface_coexist;
+    void *data_end_interface_coexist;
+    void *bss_start_interface_coexist;
+    void *bss_end_interface_coexist;
+    void *data_start_interface_net80211;
+    void *data_end_interface_net80211;
+    void *bss_start_interface_net80211;
+    void *bss_end_interface_net80211;
+    void *data_start_interface_pp;
+    void *data_end_interface_pp;
+    void *bss_start_interface_pp;
+    void *bss_end_interface_pp;
+#endif
+    void *dram_start_usbdev_rom;
+    void *dram_end_usbdev_rom;
+    void *dram_start_uart_rom;
+    void *dram_end_uart_rom;
+
+} ets_rom_layout_t;
+
+extern const ets_rom_layout_t * const ets_rom_layout_p;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/rsa_pss.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/rsa_pss.h
new file mode 100644
index 00000000000..4a838071e76
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/rsa_pss.h
@@ -0,0 +1,46 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_RSA_PSS_H_
+#define _ROM_RSA_PSS_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ETS_SIG_LEN 384 /* Bytes */
+#define ETS_DIGEST_LEN 32 /* SHA-256, bytes */
+
+typedef struct {
+    uint8_t n[384]; /* Public key modulus */
+    uint32_t e;     /* Public key exponent */
+    uint8_t rinv[384];
+    uint32_t mdash;
+} ets_rsa_pubkey_t;
+
+bool ets_rsa_pss_verify(const ets_rsa_pubkey_t *key, const uint8_t *sig, const uint8_t *digest, uint8_t *verified_digest);
+
+void ets_mgf1_sha256(const uint8_t *mgfSeed, size_t seedLen, size_t maskLen, uint8_t *mask);
+
+bool ets_emsa_pss_verify(const uint8_t *encoded_message, const uint8_t *mhash);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/rtc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/rtc.h
new file mode 100644
index 00000000000..2a7f6cb6140
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/rtc.h
@@ -0,0 +1,264 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_RTC_H_
+#define _ROM_RTC_H_
+
+#include "ets_sys.h"
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "soc/soc.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup rtc_apis, rtc registers and memory related apis
+  * @brief rtc apis
+  */
+
+/** @addtogroup rtc_apis
+  * @{
+  */
+
+/**************************************************************************************
+  *                                       Note:                                       *
+  *       Some Rtc memory and registers are used, in ROM or in internal library.      *
+  *          Please do not use reserved or used rtc memory or registers.              *
+  *                                                                                   *
+  *************************************************************************************
+  *                          RTC  Memory & Store Register usage
+  *************************************************************************************
+  *     rtc memory addr         type    size            usage
+  *     0x3f421000(0x50000000)  Slow    SIZE_CP         Co-Processor code/Reset Entry
+  *     0x3f421000+SIZE_CP      Slow    8192-SIZE_CP
+  *
+  *     0x3ff80000(0x40070000)  Fast    8192            deep sleep entry code
+  *
+  *************************************************************************************
+  *     RTC store registers     usage
+  *     RTC_CNTL_STORE0_REG     Reserved
+  *     RTC_CNTL_STORE1_REG     RTC_SLOW_CLK calibration value
+  *     RTC_CNTL_STORE2_REG     Boot time, low word
+  *     RTC_CNTL_STORE3_REG     Boot time, high word
+  *     RTC_CNTL_STORE4_REG     External XTAL frequency
+  *     RTC_CNTL_STORE5_REG     APB bus frequency
+  *     RTC_CNTL_STORE6_REG     FAST_RTC_MEMORY_ENTRY
+  *     RTC_CNTL_STORE7_REG     FAST_RTC_MEMORY_CRC
+  *************************************************************************************
+  */
+
+#define RTC_SLOW_CLK_CAL_REG    RTC_CNTL_STORE1_REG
+#define RTC_BOOT_TIME_LOW_REG   RTC_CNTL_STORE2_REG
+#define RTC_BOOT_TIME_HIGH_REG  RTC_CNTL_STORE3_REG
+#define RTC_XTAL_FREQ_REG       RTC_CNTL_STORE4_REG
+#define RTC_APB_FREQ_REG        RTC_CNTL_STORE5_REG
+#define RTC_ENTRY_ADDR_REG      RTC_CNTL_STORE6_REG
+#define RTC_RESET_CAUSE_REG     RTC_CNTL_STORE6_REG
+#define RTC_MEMORY_CRC_REG      RTC_CNTL_STORE7_REG
+
+#define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
+
+
+typedef enum {
+    AWAKE = 0,             //<CPU ON
+    LIGHT_SLEEP = BIT0,    //CPU waiti, PLL ON.  We don't need explicitly set this mode.
+    DEEP_SLEEP  = BIT1     //CPU OFF, PLL OFF, only specific timer could wake up
+} SLEEP_MODE;
+
+typedef enum {
+    NO_MEAN                =  0,
+    POWERON_RESET          =  1,    /**<1, Vbat power on reset*/
+    RTC_SW_SYS_RESET       =  3,    /**<3, Software reset digital core*/
+    DEEPSLEEP_RESET        =  5,    /**<5, Deep Sleep reset digital core*/
+    TG0WDT_SYS_RESET       =  7,    /**<7, Timer Group0 Watch dog reset digital core*/
+    TG1WDT_SYS_RESET       =  8,    /**<8, Timer Group1 Watch dog reset digital core*/
+    RTCWDT_SYS_RESET       =  9,    /**<9, RTC Watch dog Reset digital core*/
+    INTRUSION_RESET        = 10,    /**<10, Instrusion tested to reset CPU*/
+    TG0WDT_CPU_RESET       = 11,    /**<11, Time Group0 reset CPU*/
+    RTC_SW_CPU_RESET       = 12,    /**<12, Software reset CPU*/
+    RTCWDT_CPU_RESET       = 13,    /**<13, RTC Watch dog Reset CPU*/
+    RTCWDT_BROWN_OUT_RESET = 15,    /**<15, Reset when the vdd voltage is not stable*/
+    RTCWDT_RTC_RESET       = 16,    /**<16, RTC Watch dog reset digital core and rtc module*/
+    TG1WDT_CPU_RESET       = 17,    /**<17, Time Group1 reset CPU*/
+    SUPER_WDT_RESET        = 18,    /**<18, super watchdog reset digital core and rtc module*/
+    GLITCH_RTC_RESET       = 19,    /**<19, glitch reset digital core and rtc module*/
+    EFUSE_RESET            = 20,    /**<20, efuse reset digital core*/
+    USB_UART_CHIP_RESET    = 21,    /**<21, usb uart reset digital core */
+    USB_JTAG_CHIP_RESET    = 22,    /**<22, usb jtag reset digital core */
+    POWER_GLITCH_RESET     = 23,    /**<23, power glitch reset digital core and rtc module*/
+} RESET_REASON;
+
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESET != RESET_REASON_CPU0_MWDT1");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
+_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
+_Static_assert((soc_reset_reason_t)USB_UART_CHIP_RESET == RESET_REASON_CORE_USB_UART, "USB_UART_CHIP_RESET != RESET_REASON_CORE_USB_UART");
+_Static_assert((soc_reset_reason_t)USB_JTAG_CHIP_RESET == RESET_REASON_CORE_USB_JTAG, "USB_JTAG_CHIP_RESET != RESET_REASON_CORE_USB_JTAG");
+_Static_assert((soc_reset_reason_t)POWER_GLITCH_RESET == RESET_REASON_CORE_PWR_GLITCH, "POWER_GLITCH_RESET != RESET_REASON_CORE_PWR_GLITCH");
+
+typedef enum {
+    NO_SLEEP        = 0,
+    EXT_EVENT0_TRIG = BIT0,
+    EXT_EVENT1_TRIG = BIT1,
+    GPIO_TRIG       = BIT2,
+    TIMER_EXPIRE    = BIT3,
+    SDIO_TRIG       = BIT4,
+    MAC_TRIG        = BIT5,
+    UART0_TRIG      = BIT6,
+    UART1_TRIG      = BIT7,
+    TOUCH_TRIG      = BIT8,
+    SAR_TRIG        = BIT9,
+    BT_TRIG         = BIT10,
+    RISCV_TRIG      = BIT11,
+    XTAL_DEAD_TRIG  = BIT12,
+    RISCV_TRAP_TRIG = BIT13,
+    USB_TRIG        = BIT14
+} WAKEUP_REASON;
+
+typedef enum {
+    DISEN_WAKEUP       = NO_SLEEP,
+    EXT_EVENT0_TRIG_EN = EXT_EVENT0_TRIG,
+    EXT_EVENT1_TRIG_EN = EXT_EVENT1_TRIG,
+    GPIO_TRIG_EN       = GPIO_TRIG,
+    TIMER_EXPIRE_EN    = TIMER_EXPIRE,
+    SDIO_TRIG_EN       = SDIO_TRIG,
+    MAC_TRIG_EN        = MAC_TRIG,
+    UART0_TRIG_EN      = UART0_TRIG,
+    UART1_TRIG_EN      = UART1_TRIG,
+    TOUCH_TRIG_EN      = TOUCH_TRIG,
+    SAR_TRIG_EN        = SAR_TRIG,
+    BT_TRIG_EN         = BT_TRIG,
+    RISCV_TRIG_EN      = RISCV_TRIG,
+    XTAL_DEAD_TRIG_EN  = XTAL_DEAD_TRIG,
+    RISCV_TRAP_TRIG_EN = RISCV_TRAP_TRIG,
+    USB_TRIG_EN        = USB_TRIG
+} WAKEUP_ENABLE;
+
+/**
+  * @brief  Get the reset reason for CPU.
+  *
+  * @param  int cpu_no : CPU no.
+  *
+  * @return RESET_REASON
+  */
+RESET_REASON rtc_get_reset_reason(int cpu_no);
+
+/**
+  * @brief  Get the wakeup cause for CPU.
+  *
+  * @param  int cpu_no : CPU no.
+  *
+  * @return WAKEUP_REASON
+  */
+WAKEUP_REASON rtc_get_wakeup_cause(void);
+
+/**
+  * @brief Get CRC for Fast RTC Memory.
+  *
+  * @param  uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory.
+  *
+  * @param  uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte.
+  *
+  * @return uint32_t : CRC32 result
+  */
+uint32_t calc_rtc_memory_crc(uint32_t start_addr, uint32_t crc_len);
+
+/**
+  * @brief Suppress ROM log by setting specific RTC control register.
+  * @note This is not a permanent disable of ROM logging since the RTC register can not retain after chip reset.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+static inline void rtc_suppress_rom_log(void)
+{
+    /* To disable logging in the ROM, only the least significant bit of the register is used,
+     * but since this register is also used to store the frequency of the main crystal (RTC_XTAL_FREQ_REG),
+     * you need to write to this register in the same format.
+     * Namely, the upper 16 bits and lower should be the same.
+     */
+    REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
+}
+
+/**
+  * @brief Set CRC of Fast RTC memory 0-0x7ff into RTC STORE7.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void set_rtc_memory_crc(void);
+
+/**
+  * @brief Fetch entry from RTC memory and RTC STORE reg
+  *
+  * @param uint32_t * entry_addr : the address to save entry
+  *
+  * @param RESET_REASON reset_reason : reset reason this time
+  *
+  * @return None
+  */
+void rtc_boot_control(uint32_t *entry_addr, RESET_REASON reset_reason);
+
+/**
+  * @brief Software Reset digital core.
+  *
+  * It is not recommended to use this function in esp-idf, use
+  * esp_restart() instead.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void software_reset(void);
+
+/**
+  * @brief Software Reset digital core.
+  *
+  * It is not recommended to use this function in esp-idf, use
+  * esp_restart() instead.
+  *
+  * @param  int cpu_no : The CPU to reset, 0 for PRO CPU, 1 for APP CPU.
+  *
+  * @return None
+  */
+void software_reset_cpu(int cpu_no);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_RTC_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/secure_boot.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/secure_boot.h
new file mode 100644
index 00000000000..a9d417283b7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/secure_boot.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "ets_sys.h"
+#include "rsa_pss.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
+typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
+typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
+
+/* Anti-FI measure: use full words for success/fail, instead of
+   0/non-zero
+*/
+typedef enum {
+    SB_SUCCESS = 0x3A5A5AA5,
+    SB_FAILED = 0x7533885E,
+} ets_secure_boot_status_t;
+
+
+/* Verify and stage-load the bootloader image
+   (reconfigures cache to map, loads trusted key digests from efuse,
+   copies the bootloader into the staging buffer.)
+
+   If allow_key_revoke is true and aggressive revoke efuse is set,
+   any failed signature has its associated key revoked in efuse.
+
+   If result is SB_SUCCESS, the "simple hash" of the bootloader
+   is copied into verified_hash.
+*/
+ets_secure_boot_status_t ets_secure_boot_verify_stage_bootloader(uint8_t *verified_hash, bool allow_key_revoke);
+
+/* Verify bootloader image (reconfigures cache to map),
+   with key digests provided as parameters.)
+
+   Can be used to verify secure boot status before enabling
+   secure boot permanently.
+
+   If stage_load parameter is true, bootloader is copied into staging
+   buffer in RAM at the same time.
+
+   If result is SB_SUCCESS, the "simple hash" of the bootloader is
+   copied into verified_hash.
+*/
+ets_secure_boot_status_t ets_secure_boot_verify_bootloader_with_keys(uint8_t *verified_hash, const ets_secure_boot_key_digests_t *trusted_keys, bool stage_load);
+
+/* Read key digests from efuse. Any revoked/missing digests will be
+   marked as NULL
+*/
+ETS_STATUS ets_secure_boot_read_key_digests(ets_secure_boot_key_digests_t *trusted_keys);
+
+/* Verify supplied signature against supplied digest, using
+   supplied trusted key digests.
+
+   Doesn't reconfigure cache or any other hardware access except for RSA peripheral.
+
+   If result is SB_SUCCESS, the image_digest value is copied into verified_digest.
+*/
+ets_secure_boot_status_t ets_secure_boot_verify_signature(const ets_secure_boot_signature_t *sig, const uint8_t *image_digest, const ets_secure_boot_key_digests_t *trusted_keys, uint8_t *verified_digest);
+
+/* Revoke a public key digest in efuse.
+   @param index Digest to revoke. Must be 0, 1 or 2.
+ */
+void ets_secure_boot_revoke_public_key_digest(int index);
+
+#define CRC_SIGN_BLOCK_LEN 1196
+#define SIG_BLOCK_PADDING 4096
+#define ETS_SECURE_BOOT_V2_SIGNATURE_MAGIC 0xE7
+
+/* Secure Boot V2 signature block
+
+   (Up to 3 in a signature sector are appended to the image)
+ */
+struct ets_secure_boot_sig_block {
+    uint8_t magic_byte;
+    uint8_t version;
+    uint8_t _reserved1;
+    uint8_t _reserved2;
+    uint8_t image_digest[32];
+    ets_rsa_pubkey_t key;
+    uint8_t signature[384];
+    uint32_t block_crc;
+    uint8_t _padding[16];
+};
+
+_Static_assert(sizeof(ets_secure_boot_sig_block_t) == 1216, "invalid sig block size");
+
+#define SECURE_BOOT_NUM_BLOCKS 3
+
+/* V2 Secure boot signature sector (up to 3 blocks) */
+struct ets_secure_boot_signature {
+    ets_secure_boot_sig_block_t block[SECURE_BOOT_NUM_BLOCKS];
+    uint8_t _padding[4096 - (sizeof(ets_secure_boot_sig_block_t) * SECURE_BOOT_NUM_BLOCKS)];
+};
+
+_Static_assert(sizeof(ets_secure_boot_signature_t) == 4096, "invalid sig sector size");
+
+#define MAX_KEY_DIGESTS 3
+
+struct ets_secure_boot_key_digests {
+    const void *key_digests[MAX_KEY_DIGESTS];
+    bool allow_key_revoke;
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/sha.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/sha.h
new file mode 100644
index 00000000000..54b1b21676a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/sha.h
@@ -0,0 +1,61 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ROM_SHA_H_
+#define _ROM_SHA_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "ets_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    SHA1 = 0,
+    SHA2_224,
+    SHA2_256,
+    SHA_TYPE_MAX
+} SHA_TYPE;
+
+typedef struct SHAContext {
+    bool start;
+    bool in_hardware;               // Is this context currently in peripheral? Needs to be manually cleared if multiple SHAs are interleaved
+    SHA_TYPE type;
+    uint32_t state[16];             // For SHA1/SHA224/SHA256, used 8, other used 16
+    unsigned char buffer[128];      // For SHA1/SHA224/SHA256, used 64, other used 128
+    uint32_t total_bits[4];
+} SHA_CTX;
+
+void ets_sha_enable(void);
+
+void ets_sha_disable(void);
+
+ets_status_t ets_sha_init(SHA_CTX *ctx, SHA_TYPE type);
+
+ets_status_t ets_sha_starts(SHA_CTX *ctx, uint16_t sha512_t);
+
+void ets_sha_get_state(SHA_CTX *ctx);
+
+void ets_sha_process(SHA_CTX *ctx, const unsigned char *input);
+
+void ets_sha_update(SHA_CTX *ctx, const unsigned char *input, uint32_t input_bytes, bool update_ctx);
+
+ets_status_t ets_sha_finish(SHA_CTX *ctx, unsigned char *output);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_SHA_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/spi_flash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/spi_flash.h
new file mode 100644
index 00000000000..b591d4000f0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/spi_flash.h
@@ -0,0 +1,570 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_SPI_FLASH_H_
+#define _ROM_SPI_FLASH_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup spi_flash_apis, spi flash operation related apis
+  * @brief spi_flash apis
+  */
+
+/** @addtogroup spi_flash_apis
+  * @{
+  */
+
+#define PERIPHS_SPI_FLASH_CMD                 SPI_MEM_CMD_REG(1)
+#define PERIPHS_SPI_FLASH_ADDR                SPI_MEM_ADDR_REG(1)
+#define PERIPHS_SPI_FLASH_CTRL                SPI_MEM_CTRL_REG(1)
+#define PERIPHS_SPI_FLASH_CTRL1               SPI_MEM_CTRL1_REG(1)
+#define PERIPHS_SPI_FLASH_STATUS              SPI_MEM_RD_STATUS_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG              SPI_MEM_USER_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG1             SPI_MEM_USER1_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG2             SPI_MEM_USER2_REG(1)
+#define PERIPHS_SPI_FLASH_C0                  SPI_MEM_W0_REG(1)
+#define PERIPHS_SPI_FLASH_C1                  SPI_MEM_W1_REG(1)
+#define PERIPHS_SPI_FLASH_C2                  SPI_MEM_W2_REG(1)
+#define PERIPHS_SPI_FLASH_C3                  SPI_MEM_W3_REG(1)
+#define PERIPHS_SPI_FLASH_C4                  SPI_MEM_W4_REG(1)
+#define PERIPHS_SPI_FLASH_C5                  SPI_MEM_W5_REG(1)
+#define PERIPHS_SPI_FLASH_C6                  SPI_MEM_W6_REG(1)
+#define PERIPHS_SPI_FLASH_C7                  SPI_MEM_W7_REG(1)
+#define PERIPHS_SPI_FLASH_TX_CRC              SPI_MEM_TX_CRC_REG(1)
+
+#define SPI0_R_QIO_DUMMY_CYCLELEN             5
+#define SPI0_R_QIO_ADDR_BITSLEN               23
+#define SPI0_R_FAST_DUMMY_CYCLELEN            7
+#define SPI0_R_DIO_DUMMY_CYCLELEN             3
+#define SPI0_R_FAST_ADDR_BITSLEN              23
+#define SPI0_R_SIO_ADDR_BITSLEN               23
+
+#define SPI1_R_QIO_DUMMY_CYCLELEN             5
+#define SPI1_R_QIO_ADDR_BITSLEN               23
+#define SPI1_R_FAST_DUMMY_CYCLELEN            7
+#define SPI1_R_DIO_DUMMY_CYCLELEN             3
+#define SPI1_R_DIO_ADDR_BITSLEN               23
+#define SPI1_R_FAST_ADDR_BITSLEN              23
+#define SPI1_R_SIO_ADDR_BITSLEN               23
+
+#define ESP_ROM_SPIFLASH_W_SIO_ADDR_BITSLEN   23
+
+#define ESP_ROM_SPIFLASH_TWO_BYTE_STATUS_EN   SPI_MEM_WRSR_2B
+
+//SPI address register
+#define ESP_ROM_SPIFLASH_BYTES_LEN            24
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_WRITE_NUM  32
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM   16
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_BITS  0xf
+
+//SPI status register
+#define  ESP_ROM_SPIFLASH_BUSY_FLAG           BIT0
+#define  ESP_ROM_SPIFLASH_WRENABLE_FLAG       BIT1
+#define  ESP_ROM_SPIFLASH_BP0                 BIT2
+#define  ESP_ROM_SPIFLASH_BP1                 BIT3
+#define  ESP_ROM_SPIFLASH_BP2                 BIT4
+#define  ESP_ROM_SPIFLASH_WR_PROTECT          (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
+#define  ESP_ROM_SPIFLASH_QE                  BIT9
+
+#define FLASH_ID_GD25LQ32C  0xC86016
+
+typedef enum {
+    ESP_ROM_SPIFLASH_QIO_MODE = 0,
+    ESP_ROM_SPIFLASH_QOUT_MODE,
+    ESP_ROM_SPIFLASH_DIO_MODE,
+    ESP_ROM_SPIFLASH_DOUT_MODE,
+    ESP_ROM_SPIFLASH_FASTRD_MODE,
+    ESP_ROM_SPIFLASH_SLOWRD_MODE
+} esp_rom_spiflash_read_mode_t;
+
+typedef enum {
+    ESP_ROM_SPIFLASH_RESULT_OK,
+    ESP_ROM_SPIFLASH_RESULT_ERR,
+    ESP_ROM_SPIFLASH_RESULT_TIMEOUT
+} esp_rom_spiflash_result_t;
+
+typedef struct {
+    uint32_t device_id;
+    uint32_t chip_size;    // chip size in bytes
+    uint32_t block_size;
+    uint32_t sector_size;
+    uint32_t page_size;
+    uint32_t status_mask;
+} esp_rom_spiflash_chip_t;
+
+typedef struct {
+    uint8_t  data_length;
+    uint8_t  read_cmd0;
+    uint8_t  read_cmd1;
+    uint8_t  write_cmd;
+    uint16_t data_mask;
+    uint16_t data;
+} esp_rom_spiflash_common_cmd_t;
+
+/**
+  * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write).
+  *
+  * @param  uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv);
+
+/**
+  * @brief Select SPI Flash to QIO mode when WP pad is read from Flash.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t wp_gpio_num: WP gpio number.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @return None
+  */
+void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi);
+
+/**
+  * @brief Set SPI Flash pad drivers.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t wp_gpio_num: WP gpio number.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @param  uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid
+  *            drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp.
+  *                        Values usually read from falsh by rom code, function usually callde by rom code.
+  *                        if value with bit(3) set, the value is valid, bit[2:0] is the real value.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs);
+
+/**
+  * @brief Select SPI Flash function for pads.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @return None
+  */
+void esp_rom_spiflash_select_padsfunc(uint32_t ishspi);
+
+/**
+  * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @param  uint8_t legacy: In legacy mode, more SPI command is used in line.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy);
+
+/**
+  * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR).
+  *    Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t *status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status);
+
+/**
+  * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t *status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status);
+
+/**
+  * @brief Write status to Falsh status register.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t status_value : Value to .
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value);
+
+/**
+  * @brief Use a command to Read Flash status register.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t*status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd);
+
+/**
+  * @brief Config SPI Flash read mode when init.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD.
+  *
+  * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode);
+
+/**
+  * @brief Config SPI Flash clock divisor.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t freqdiv: clock divisor.
+  *
+  * @param  uint8_t spi: 0 for SPI0, 1 for SPI1.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi);
+
+/**
+  * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command.
+  *
+  * @return uint16_t  0 : do not send command any more.
+  *                   1 : go to the next command.
+  *                   n > 1 : skip (n - 1) commands.
+  */
+uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd);
+
+/**
+  * @brief Unlock SPI write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void);
+
+/**
+  * @brief SPI write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Lock error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_lock(void);
+
+/**
+  * @brief Update SPI Flash parameter.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t deviceId : Device ID read from SPI, the low 32 bit.
+  *
+  * @param  uint32_t chip_size : The Flash size.
+  *
+  * @param  uint32_t block_size : The Flash block size.
+  *
+  * @param  uint32_t sector_size : The Flash sector size.
+  *
+  * @param  uint32_t page_size : The Flash page size.
+  *
+  * @param  uint32_t status_mask : The Mask used when read status from Flash(use single CMD).
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Update error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size,
+        uint32_t sector_size, uint32_t page_size, uint32_t status_mask);
+
+/**
+  * @brief Erase whole flash chip.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void);
+
+/**
+  * @brief Erase a 64KB block of flash
+  *        Uses SPI flash command D8H.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t block_num : Which block to erase.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num);
+
+/**
+  * @brief Erase a sector of flash.
+  *        Uses SPI flash command 20H.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t sector_num : Which sector to erase.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num);
+
+/**
+  * @brief Erase some sectors.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t start_addr : Start addr to erase, should be sector aligned.
+  *
+  * @param  uint32_t area_len : Length to erase, should be sector aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len);
+
+/**
+  * @brief Write Data to Flash, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t dest_addr : Address to write, should be 4 bytes aligned.
+  *
+  * @param  const uint32_t *src : The pointer to data which is to write.
+  *
+  * @param  uint32_t len : Length to write, should be 4 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len);
+
+/**
+  * @brief Read Data from Flash, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t src_addr : Address to read, should be 4 bytes aligned.
+  *
+  * @param  uint32_t *dest : The buf to read the data.
+  *
+  * @param  uint32_t len : Length to read, should be 4 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len);
+
+/**
+  * @brief SPI1 go into encrypto mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void esp_rom_spiflash_write_encrypted_enable(void);
+
+/**
+  * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t flash_addr : Address to write, should be 32 bytes aligned.
+  *
+  * @param  uint32_t *data : The pointer to data which is to write.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data);
+
+/**
+  * @brief SPI1 go out of encrypto mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void esp_rom_spiflash_write_encrypted_disable(void);
+
+/**
+  * @brief Write data to flash with transparent encryption.
+  * @note Sectors to be written should already be erased.
+  *
+  * @note Please do not call this function in SDK.
+  *
+  * @param  uint32_t flash_addr : Address to write, should be 32 byte aligned.
+  *
+  * @param  uint32_t *data : The pointer to data to write. Note, this pointer must
+  *                          be 32 bit aligned and the content of the data will be
+  *                          modified by the encryption function.
+  *
+  * @param  uint32_t len : Length to write, should be 32 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len);
+
+
+/* TODO: figure out how to map these to their new names */
+typedef enum {
+    SPI_ENCRYPT_DESTINATION_FLASH,
+} SpiEncryptDest;
+
+typedef esp_rom_spiflash_result_t SpiFlashOpResult;
+
+SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void *data, uint32_t len);
+SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void *data, uint32_t len);
+void SPI_Write_Encrypt_Enable(void);
+void SPI_Write_Encrypt_Disable(void);
+
+/** @brief Wait until SPI flash write operation is complete
+ *
+ * @note Please do not call this function in SDK.
+ *
+ * Reads the Write In Progress bit of the SPI flash status register,
+ * repeats until this bit is zero (indicating write complete).
+ *
+ * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete
+ *         ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status.
+ */
+esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi);
+
+
+/** @brief Enable Quad I/O pin functions
+ *
+ * @note Please do not call this function in SDK.
+ *
+ * Sets the HD & WP pin functions for Quad I/O modes, based on the
+ * efuse SPI pin configuration.
+ *
+ * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O.
+ *
+ * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig().
+ * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored.
+ * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored.
+ * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used
+ *   to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI).
+ *   Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral.
+ */
+void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
+
+
+typedef void (* spi_flash_func_t)(void);
+typedef SpiFlashOpResult (* spi_flash_op_t)(void);
+typedef SpiFlashOpResult (* spi_flash_erase_t)(uint32_t);
+typedef SpiFlashOpResult (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
+typedef SpiFlashOpResult (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
+typedef SpiFlashOpResult (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
+typedef SpiFlashOpResult (* spi_flash_wren_t)(void*);
+
+typedef struct {
+    uint32_t read_sub_len;
+    uint32_t write_sub_len;
+    spi_flash_op_t unlock;
+    spi_flash_erase_t erase_sector;
+    spi_flash_erase_t erase_block;
+    spi_flash_rd_t read;
+    spi_flash_wr_t write;
+    spi_flash_ewr_t encrypt_write;
+    spi_flash_func_t check_sus;
+    spi_flash_wren_t wren;
+    spi_flash_op_t wait_idle;
+} spiflash_legacy_funcs_t;
+
+
+extern const spiflash_legacy_funcs_t *rom_spiflash_legacy_funcs;
+
+/** @brief Global ROM spiflash data, as used by legacy
+    SPI flash functions
+*/
+typedef struct {
+    esp_rom_spiflash_chip_t chip;
+    uint8_t dummy_len_plus[3];
+    uint8_t sig_matrix;
+} spiflash_legacy_data_t;
+
+extern spiflash_legacy_data_t *rom_spiflash_legacy_data;
+
+/* Defines to make the C3 ROM legacvy data access compatible with previous chips */
+#define g_rom_flashchip (rom_spiflash_legacy_data->chip)
+#define g_rom_spiflash_dummy_len_plus (rom_spiflash_legacy_data->dummy_len_plus)
+
+/**
+ * @brief Clear WEL bit unconditionally.
+ *
+ * @return always ESP_ROM_SPIFLASH_RESULT_OK
+ */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_SPI_FLASH_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/tjpgd.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/tjpgd.h
new file mode 100644
index 00000000000..80d346a1cb1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/tjpgd.h
@@ -0,0 +1,99 @@
+/*----------------------------------------------------------------------------/
+/ TJpgDec - Tiny JPEG Decompressor include file               (C)ChaN, 2012
+/----------------------------------------------------------------------------*/
+#ifndef _TJPGDEC
+#define _TJPGDEC
+/*---------------------------------------------------------------------------*/
+/* System Configurations */
+
+#define JD_SZBUF        512 /* Size of stream input buffer */
+#define JD_FORMAT       0   /* Output pixel format 0:RGB888 (3 BYTE/pix), 1:RGB565 (1 WORD/pix) */
+#define JD_USE_SCALE    1   /* Use descaling feature for output */
+#define JD_TBLCLIP      1   /* Use table for saturation (might be a bit faster but increases 1K bytes of code size) */
+
+/*---------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* These types must be 16-bit, 32-bit or larger integer */
+typedef int             INT;
+typedef unsigned int    UINT;
+
+/* These types must be 8-bit integer */
+typedef char            CHAR;
+typedef unsigned char   UCHAR;
+typedef unsigned char   BYTE;
+
+/* These types must be 16-bit integer */
+typedef short           SHORT;
+typedef unsigned short  USHORT;
+typedef unsigned short  WORD;
+typedef unsigned short  WCHAR;
+
+/* These types must be 32-bit integer */
+typedef long            LONG;
+typedef unsigned long   ULONG;
+typedef unsigned long   DWORD;
+
+
+/* Error code */
+typedef enum {
+    JDR_OK = 0, /* 0: Succeeded */
+    JDR_INTR,   /* 1: Interrupted by output function */
+    JDR_INP,    /* 2: Device error or wrong termination of input stream */
+    JDR_MEM1,   /* 3: Insufficient memory pool for the image */
+    JDR_MEM2,   /* 4: Insufficient stream input buffer */
+    JDR_PAR,    /* 5: Parameter error */
+    JDR_FMT1,   /* 6: Data format error (may be damaged data) */
+    JDR_FMT2,   /* 7: Right format but not supported */
+    JDR_FMT3    /* 8: Not supported JPEG standard */
+} JRESULT;
+
+
+
+/* Rectangular structure */
+typedef struct {
+    WORD left, right, top, bottom;
+} JRECT;
+
+
+
+/* Decompressor object structure */
+typedef struct JDEC JDEC;
+struct JDEC {
+    UINT dctr;              /* Number of bytes available in the input buffer */
+    BYTE *dptr;             /* Current data read ptr */
+    BYTE *inbuf;            /* Bit stream input buffer */
+    BYTE dmsk;              /* Current bit in the current read byte */
+    BYTE scale;             /* Output scaling ratio */
+    BYTE msx, msy;          /* MCU size in unit of block (width, height) */
+    BYTE qtid[3];           /* Quantization table ID of each component */
+    SHORT dcv[3];           /* Previous DC element of each component */
+    WORD nrst;              /* Restart inverval */
+    UINT width, height;     /* Size of the input image (pixel) */
+    BYTE *huffbits[2][2];   /* Huffman bit distribution tables [id][dcac] */
+    WORD *huffcode[2][2];   /* Huffman code word tables [id][dcac] */
+    BYTE *huffdata[2][2];   /* Huffman decoded data tables [id][dcac] */
+    LONG *qttbl[4];         /* Dequaitizer tables [id] */
+    void *workbuf;          /* Working buffer for IDCT and RGB output */
+    BYTE *mcubuf;           /* Working buffer for the MCU */
+    void *pool;             /* Pointer to available memory pool */
+    UINT sz_pool;           /* Size of momory pool (bytes available) */
+    UINT (*infunc)(JDEC *, BYTE *, UINT); /* Pointer to jpeg stream input function */
+    void *device;           /* Pointer to I/O device identifiler for the session */
+};
+
+
+
+/* TJpgDec API functions */
+JRESULT jd_prepare (JDEC *, UINT(*)(JDEC *, BYTE *, UINT), void *, UINT, void *);
+JRESULT jd_decomp (JDEC *, UINT(*)(JDEC *, void *, JRECT *), BYTE);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TJPGDEC */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/uart.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/uart.h
new file mode 100644
index 00000000000..4e7e5b8ee62
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32c3/rom/uart.h
@@ -0,0 +1,440 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_UART_H_
+#define _ROM_UART_H_
+
+#include "esp_types.h"
+#include "esp_attr.h"
+#include "ets_sys.h"
+#include "soc/soc.h"
+#include "soc/uart_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup uart_apis, uart configuration and communication related apis
+  * @brief uart apis
+  */
+
+/** @addtogroup uart_apis
+  * @{
+  */
+
+#define RX_BUFF_SIZE                     0x400
+#define TX_BUFF_SIZE                     100
+
+//uart int enalbe register ctrl bits
+#define UART_RCV_INTEN                   BIT0
+#define UART_TRX_INTEN                   BIT1
+#define UART_LINE_STATUS_INTEN           BIT2
+
+//uart int identification ctrl bits
+#define UART_INT_FLAG_MASK               0x0E
+
+//uart fifo ctrl bits
+#define UART_CLR_RCV_FIFO                BIT1
+#define UART_CLR_TRX_FIFO                BIT2
+#define UART_RCVFIFO_TRG_LVL_BITS        BIT6
+
+//uart line control bits
+#define  UART_DIV_LATCH_ACCESS_BIT       BIT7
+
+//uart line status bits
+#define  UART_RCV_DATA_RDY_FLAG          BIT0
+#define  UART_RCV_OVER_FLOW_FLAG         BIT1
+#define  UART_RCV_PARITY_ERR_FLAG        BIT2
+#define  UART_RCV_FRAME_ERR_FLAG         BIT3
+#define  UART_BRK_INT_FLAG               BIT4
+#define  UART_TRX_FIFO_EMPTY_FLAG        BIT5
+#define  UART_TRX_ALL_EMPTY_FLAG         BIT6   // include fifo and shift reg
+#define  UART_RCV_ERR_FLAG               BIT7
+
+//send and receive message frame head
+#define FRAME_FLAG                       0x7E
+
+typedef enum {
+    UART_LINE_STATUS_INT_FLAG  = 0x06,
+    UART_RCV_FIFO_INT_FLAG     = 0x04,
+    UART_RCV_TMOUT_INT_FLAG    = 0x0C,
+    UART_TXBUFF_EMPTY_INT_FLAG = 0x02
+} UartIntType;   //consider bit0 for int_flag
+
+typedef enum {
+    RCV_ONE_BYTE      = 0x0,
+    RCV_FOUR_BYTE     = 0x1,
+    RCV_EIGHT_BYTE    = 0x2,
+    RCV_FOURTEEN_BYTE = 0x3
+} UartRcvFifoTrgLvl;
+
+typedef enum {
+    FIVE_BITS  = 0x0,
+    SIX_BITS   = 0x1,
+    SEVEN_BITS = 0x2,
+    EIGHT_BITS = 0x3
+} UartBitsNum4Char;
+
+typedef enum {
+    ONE_STOP_BIT      = 1,
+    ONE_HALF_STOP_BIT = 2,
+    TWO_STOP_BIT      = 3
+} UartStopBitsNum;
+
+typedef enum {
+    NONE_BITS = 0,
+    ODD_BITS  = 2,
+    EVEN_BITS = 3
+
+} UartParityMode;
+
+typedef enum {
+    STICK_PARITY_DIS = 0,
+    STICK_PARITY_EN  = 2
+} UartExistParity;
+
+typedef enum {
+    BIT_RATE_9600   = 9600,
+    BIT_RATE_19200  = 19200,
+    BIT_RATE_38400  = 38400,
+    BIT_RATE_57600  = 57600,
+    BIT_RATE_115200 = 115200,
+    BIT_RATE_230400 = 230400,
+    BIT_RATE_460800 = 460800,
+    BIT_RATE_921600 = 921600
+} UartBautRate;
+
+typedef enum {
+    NONE_CTRL,
+    HARDWARE_CTRL,
+    XON_XOFF_CTRL
+} UartFlowCtrl;
+
+typedef enum {
+    EMPTY,
+    UNDER_WRITE,
+    WRITE_OVER
+} RcvMsgBuffState;
+
+typedef struct {
+    uint8_t *pRcvMsgBuff;
+    uint8_t *pWritePos;
+    uint8_t *pReadPos;
+    uint8_t  TrigLvl;
+    RcvMsgBuffState BuffState;
+} RcvMsgBuff;
+
+typedef struct {
+    uint32_t  TrxBuffSize;
+    uint8_t  *pTrxBuff;
+} TrxMsgBuff;
+
+typedef enum {
+    BAUD_RATE_DET,
+    WAIT_SYNC_FRM,
+    SRCH_MSG_HEAD,
+    RCV_MSG_BODY,
+    RCV_ESC_CHAR,
+} RcvMsgState;
+
+typedef struct {
+    UartBautRate     baut_rate;
+    UartBitsNum4Char data_bits;
+    UartExistParity  exist_parity;
+    UartParityMode   parity;    // chip size in byte
+    UartStopBitsNum  stop_bits;
+    UartFlowCtrl     flow_ctrl;
+    uint8_t          buff_uart_no;  //indicate which uart use tx/rx buffer
+    RcvMsgBuff       rcv_buff;
+//    TrxMsgBuff       trx_buff;
+    RcvMsgState      rcv_state;
+    int              received;
+} UartDevice;
+
+/**
+  * @brief Init uart device struct value and reset uart0/uart1 rx.
+  *        Please do not call this function in SDK.
+  *
+  * @param  rxBuffer, must be a pointer to RX_BUFF_SIZE bytes or NULL
+  *
+  * @return None
+  */
+void uartAttach(void *rxBuffer);
+
+/**
+  * @brief Init uart0 or uart1 for UART download booting mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, else for UART1.
+  *
+  * @param  uint32_t clock : clock used by uart module, to adjust baudrate.
+  *
+  * @return None
+  */
+void Uart_Init(uint8_t uart_no, uint32_t clock);
+
+/**
+  * @brief Modify uart baudrate.
+  *        This function will reset RX/TX fifo for uart.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @param  uint32_t DivLatchValue : (clock << 4)/baudrate.
+  *
+  * @return None
+  */
+void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue);
+
+/**
+  * @brief Init uart0 or uart1 for UART download booting mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module, easy to detect, wait until detected;
+  *                           1, two UART modules, hard to detect, detect and return.
+  *
+  * @return None
+  */
+int uart_baudrate_detect(uint8_t uart_no, uint8_t is_sync);
+
+/**
+  * @brief Switch printf channel of uart_tx_one_char.
+  *        Please do not call this function when printf.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None
+  */
+void uart_tx_switch(uint8_t uart_no);
+
+/**
+  * @brief Switch message exchange channel for UART download booting.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None
+  */
+void uart_buff_switch(uint8_t uart_no);
+
+/**
+  * @brief Output a char to printf channel, wait until fifo not full.
+  *
+  * @param  None
+  *
+  * @return OK.
+  */
+STATUS uart_tx_one_char(uint8_t TxChar);
+
+/**
+  * @brief Output a char to message exchange channel, wait until fifo not full.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return OK.
+  */
+STATUS uart_tx_one_char2(uint8_t TxChar);
+
+/**
+  * @brief Wait until uart tx full empty.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None.
+  */
+void uart_tx_flush(uint8_t uart_no);
+
+/**
+  * @brief Wait until uart tx full empty and the last char send ok.
+  *
+  * @param  uart_no : 0 for UART0, 1 for UART1
+  *
+  * The function defined in ROM code has a bug, so we define the correct version
+  * here for compatibility.
+  */
+void uart_tx_wait_idle(uint8_t uart_no);
+
+/**
+  * @brief Get an input char from message channel.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pRxChar : the pointer to store the char.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS uart_rx_one_char(uint8_t *pRxChar);
+
+/**
+  * @brief Get an input char from message channel, wait until successful.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return char : input char value.
+  */
+char uart_rx_one_char_block(void);
+
+/**
+  * @brief Get an input string line from message channel.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pString : the pointer to store the string.
+  *
+  * @param  uint8_t MaxStrlen : the max string length, incude '\0'.
+  *
+  * @return OK.
+  */
+STATUS UartRxString(uint8_t *pString, uint8_t MaxStrlen);
+
+/**
+  * @brief Process uart recevied information in the interrupt handler.
+  *        Please do not call this function in SDK.
+  *
+  * @param  void *para : the message receive buffer.
+  *
+  * @return None
+  */
+void uart_rx_intr_handler(void *para);
+
+/**
+  * @brief Get an char from receive buffer.
+  *        Please do not call this function in SDK.
+  *
+  * @param  RcvMsgBuff *pRxBuff : the pointer to the struct that include receive buffer.
+  *
+  * @param  uint8_t *pRxByte : the pointer to store the char.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS uart_rx_readbuff( RcvMsgBuff *pRxBuff, uint8_t *pRxByte);
+
+/**
+  * @brief Get all chars from receive buffer.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pCmdLn : the pointer to store the string.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS UartGetCmdLn(uint8_t *pCmdLn);
+
+/**
+  * @brief Get uart configuration struct.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return UartDevice * : uart configuration struct pointer.
+  */
+UartDevice *GetUartDevice(void);
+
+/**
+  * @brief Send an packet to download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *p : the pointer to output string.
+  *
+  * @param  int len : the string length.
+  *
+  * @return None.
+  */
+void send_packet(uint8_t *p, int len);
+
+/**
+  * @brief Receive an packet from download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *p : the pointer to input string.
+  *
+  * @param  int len : If string length > len, the string will be truncated.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module;
+  *                           1, two UART modules.
+  *
+  * @return int : the length of the string.
+  */
+int recv_packet(uint8_t *p, int len, uint8_t is_sync);
+
+/**
+  * @brief Send an packet to download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pData : the pointer to input string.
+  *
+  * @param  uint16_t DataLen : the string length.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS SendMsg(uint8_t *pData, uint16_t DataLen);
+
+/**
+  * @brief Receive an packet from download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pData : the pointer to input string.
+  *
+  * @param  uint16_t MaxDataLen : If string length > MaxDataLen, the string will be truncated.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module;
+  *                           1, two UART modules.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS RcvMsg(uint8_t *pData, uint16_t MaxDataLen, uint8_t is_sync);
+
+/**
+  * @brief Check if this UART is in download connection.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return ETS_NO_BOOT = 0 for no.
+  *         SEL_UART_BOOT = BIT(1) for yes.
+  */
+uint8_t UartConnCheck(uint8_t uart_no);
+
+/**
+  * @brief Initialize the USB ACM UART
+  * Needs to be fed a buffer of at least 128 bytes, plus any rx buffer you may want to have.
+  *
+  * @param cdc_acm_work_mem Pointer to work mem for CDC-ACM code
+  * @param cdc_acm_work_mem_len Length of work mem
+  */
+void Uart_Init_USB(void *cdc_acm_work_mem, int cdc_acm_work_mem_len);
+
+
+/**
+  * @brief Install handler to reset the chip when a RTS change has been detected on the CDC-ACM 'UART'.
+  */
+void uart_usb_enable_reset_on_rts(void);
+
+
+extern UartDevice UartDev;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_UART_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/aes.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/aes.h
new file mode 100644
index 00000000000..d8002ef58cb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/aes.h
@@ -0,0 +1,58 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_AES_H_
+#define _ROM_AES_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AES_BLOCK_SIZE 16
+
+enum AES_TYPE {
+    AES_ENC,
+    AES_DEC,
+};
+
+enum AES_BITS {
+    AES128,
+    AES192,
+    AES256
+};
+
+void ets_aes_enable(void);
+
+void ets_aes_disable(void);
+
+void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap,
+                        bool in_word_swap, bool in_byte_swap,
+                        bool out_word_swap, bool out_byte_swap);
+
+int ets_aes_setkey(enum AES_TYPE type, const void *key, enum AES_BITS bits);
+
+int ets_aes_setkey_enc(const void *key, enum AES_BITS bits);
+
+int ets_aes_setkey_dec(const void *key, enum AES_BITS bits);
+
+void ets_aes_block(const void *input, void *output);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_AES_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/apb_backup_dma.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/apb_backup_dma.h
new file mode 100644
index 00000000000..d4e709b742b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/apb_backup_dma.h
@@ -0,0 +1,25 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void ets_apb_backup_init_lock_func(void(* _apb_backup_lock)(void), void(* _apb_backup_unlock)(void));
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/bigint.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/bigint.h
new file mode 100644
index 00000000000..b63172ea7f7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/bigint.h
@@ -0,0 +1,43 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_BIGINT_H_
+#define _ROM_BIGINT_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void ets_bigint_enable(void);
+
+void ets_bigint_disable(void);
+
+int ets_bigint_multiply(const uint32_t *x, const uint32_t *y, uint32_t len_words);
+
+int ets_bigint_modmult(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, uint32_t len_words);
+
+int ets_bigint_modexp(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, bool constant_time, uint32_t len_words);
+
+void ets_bigint_wait_finish(void);
+
+int ets_bigint_getz(uint32_t *z, uint32_t len_words);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_BIGINT_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/cache.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/cache.h
new file mode 100644
index 00000000000..587871a9a2e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/cache.h
@@ -0,0 +1,796 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_CACHE_H_
+#define _ROM_CACHE_H_
+
+#include <stdint.h>
+#include "esp_bit_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup cache_apis, cache operation related apis
+  * @brief cache apis
+  */
+
+/** @addtogroup cache_apis
+  * @{
+  */
+#define MIN_ICACHE_SIZE                 16384
+#define MAX_ICACHE_SIZE                 16384
+#define MIN_ICACHE_WAYS                 8
+#define MAX_ICACHE_WAYS                 8
+#define MAX_CACHE_WAYS                  8
+#define MIN_CACHE_LINE_SIZE             32
+#define TAG_SIZE                        4
+#define MIN_ICACHE_BANK_NUM             1
+#define MAX_ICACHE_BANK_NUM             1
+#define CACHE_MEMORY_BANK_NUM           1
+#define CACHE_MEMORY_IBANK_SIZE         0x4000
+
+#define MAX_ITAG_BANK_ITEMS             (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MIN_CACHE_LINE_SIZE)
+#define MAX_ITAG_BLOCK_ITEMS            (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MAX_ICACHE_WAYS / MIN_CACHE_LINE_SIZE)
+#define MAX_ITAG_BANK_SIZE              (MAX_ITAG_BANK_ITEMS * TAG_SIZE)
+#define MAX_ITAG_BLOCK_SIZE             (MAX_ITAG_BLOCK_ITEMS * TAG_SIZE)
+
+typedef enum {
+    CACHE_DCACHE = 0,
+    CACHE_ICACHE0 = 1,
+    CACHE_ICACHE1 = 2,
+} cache_t;
+
+typedef enum {
+    CACHE_MEMORY_INVALID = 0,
+    CACHE_MEMORY_IBANK0 = BIT(0),
+    CACHE_MEMORY_IBANK1 = BIT(1),
+    CACHE_MEMORY_IBANK2 = BIT(2),
+    CACHE_MEMORY_IBANK3 = BIT(3),
+    CACHE_MEMORY_DBANK0 = BIT(0),
+    CACHE_MEMORY_DBANK1 = BIT(1),
+    CACHE_MEMORY_DBANK2 = BIT(2),
+    CACHE_MEMORY_DBANK3 = BIT(3),
+} cache_array_t;
+
+#define ICACHE_SIZE_16KB  CACHE_SIZE_HALF
+#define ICACHE_SIZE_32KB  CACHE_SIZE_FULL
+#define DCACHE_SIZE_32KB  CACHE_SIZE_HALF
+#define DCACHE_SIZE_64KB  CACHE_SIZE_FULL
+
+typedef enum {
+    CACHE_SIZE_HALF = 0,                /*!< 8KB for icache and dcache */
+    CACHE_SIZE_FULL = 1,                /*!< 16KB for icache and dcache */
+} cache_size_t;
+
+typedef enum {
+    CACHE_4WAYS_ASSOC = 0,              /*!< 4 way associated cache */
+    CACHE_8WAYS_ASSOC = 1,              /*!< 8 way associated cache */
+} cache_ways_t;
+
+typedef enum {
+    CACHE_LINE_SIZE_16B = 0,            /*!< 16 Byte cache line size */
+    CACHE_LINE_SIZE_32B = 1,            /*!< 32 Byte cache line size */
+    CACHE_LINE_SIZE_64B = 2,            /*!< 64 Byte cache line size */
+} cache_line_size_t;
+
+typedef enum {
+    CACHE_AUTOLOAD_POSITIVE = 0,        /*!< cache autoload step is positive */
+    CACHE_AUTOLOAD_NEGATIVE = 1,        /*!< cache autoload step is negative */
+} cache_autoload_order_t;
+
+#define CACHE_AUTOLOAD_STEP(i) ((i) - 1)
+
+typedef enum {
+    CACHE_AUTOLOAD_MISS_TRIGGER = 0,    /*!< autoload only triggered by cache miss */
+    CACHE_AUTOLOAD_HIT_TRIGGER  = 1,    /*!< autoload only triggered by cache hit */
+    CACHE_AUTOLOAD_BOTH_TRIGGER = 2,    /*!< autoload triggered both by cache miss and hit */
+} cache_autoload_trigger_t;
+
+typedef enum {
+    CACHE_FREEZE_ACK_BUSY = 0,          /*!< in this mode, cache ack busy to CPU if a cache miss happens*/
+    CACHE_FREEZE_ACK_ERROR  = 1,        /*!< in this mode, cache ack wrong data to CPU and trigger an error if a cache miss happens */
+} cache_freeze_mode_t;
+
+struct cache_mode {
+    uint32_t cache_size;                /*!< cache size in byte */
+    uint16_t cache_line_size;           /*!< cache line size in byte */
+    uint8_t cache_ways;                 /*!< cache ways, always 4 */
+    uint8_t ibus;                     /*!< the cache index, 0 for dcache, 1 for icache */
+};
+
+struct icache_tag_item {
+    uint32_t valid:1;                   /*!< the tag item is valid or not */
+    uint32_t lock:1;                    /*!< the cache line is locked or not */
+    uint32_t fifo_cnt:3;                /*!< fifo cnt, 0 ~ 3 for 4 ways cache */
+    uint32_t tag:13;                    /*!< the tag is the high part of the cache address, however is only 16MB (8MB Ibus + 8MB Dbus) range, and without low part */
+    uint32_t reserved:14;
+};
+
+struct autoload_config {
+    uint8_t order;                      /*!< autoload step is positive or negative */
+    uint8_t trigger;                    /*!< autoload trigger */
+    uint8_t ena0;                       /*!< autoload region0 enable */
+    uint8_t ena1;                       /*!< autoload region1 enable */
+    uint32_t addr0;                     /*!< autoload region0 start address */
+    uint32_t size0;                     /*!< autoload region0 size */
+    uint32_t addr1;                     /*!< autoload region1 start address */
+    uint32_t size1;                     /*!< autoload region1 size */
+};
+
+struct tag_group_info {
+    struct cache_mode mode;                         /*!< cache and cache mode */
+    uint32_t filter_addr;                           /*!< the address that used to generate the struct */
+    uint32_t vaddr_offset;                          /*!< virtual address offset of the cache ways */
+    uint32_t tag_addr[MAX_CACHE_WAYS];              /*!< tag memory address, only [0~mode.ways-1] is valid to use */
+    uint32_t cache_memory_offset[MAX_CACHE_WAYS];   /*!< cache memory address, only [0~mode.ways-1] is valid to use */
+};
+
+struct lock_config {
+    uint32_t addr;                                  /*!< manual lock address*/
+    uint16_t size;                                  /*!< manual lock size*/
+    uint16_t group;                                 /*!< manual lock group, 0 or 1*/
+};
+
+struct cache_internal_stub_table {
+    uint32_t (* icache_line_size)(void);
+    uint32_t (* icache_addr)(uint32_t addr);
+    uint32_t (* dcache_addr)(uint32_t addr);
+    void (* invalidate_icache_items)(uint32_t addr, uint32_t items);
+    void (* lock_icache_items)(uint32_t addr, uint32_t items);
+    void (* unlock_icache_items)(uint32_t addr, uint32_t items);
+    uint32_t (* suspend_icache_autoload)(void);
+    void (* resume_icache_autoload)(uint32_t autoload);
+    void (* freeze_icache_enable)(cache_freeze_mode_t mode);
+    void (* freeze_icache_disable)(void);
+    int (* op_addr)(uint32_t start_addr, uint32_t size, uint32_t cache_line_size, uint32_t max_sync_num, void(* cache_Iop)(uint32_t, uint32_t));
+};
+
+/* Defined in the interface file, default value is rom_default_cache_internal_table */
+extern const struct cache_internal_stub_table* rom_cache_internal_table_ptr;
+
+typedef void (* cache_op_start)(void);
+typedef void (* cache_op_end)(void);
+
+typedef struct {
+    cache_op_start start;
+    cache_op_end end;
+} cache_op_cb_t;
+
+/* Defined in the interface file, default value is NULL */
+extern const cache_op_cb_t* rom_cache_op_cb;
+
+#define ESP_ROM_ERR_INVALID_ARG         1
+#define MMU_SET_ADDR_ALIGNED_ERROR      2
+#define MMU_SET_PASE_SIZE_ERROR         3
+#define MMU_SET_VADDR_OUT_RANGE         4
+
+#define CACHE_OP_ICACHE_Y               1
+#define CACHE_OP_ICACHE_N               0
+
+/**
+  * @brief Initialise cache mmu, mark all entries as invalid.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_MMU_Init(void);
+
+/**
+  * @brief Set ICache mmu mapping.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In
+  *                 esp32h2, external memory is always flash
+  *
+  * @param  uint32_t vaddr : virtual address in CPU address space.
+  *                              Can be Iram0,Iram1,Irom0,Drom0 and AHB buses address.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t paddr : physical address in external memory.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t psize : page size of ICache, in kilobytes. Should be 64 here.
+  *
+  * @param  uint32_t num : pages to be set.
+  *
+  * @param  uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
+  *
+  * @return uint32_t: error status
+  *                   0 : mmu set success
+  *                   2 : vaddr or paddr is not aligned
+  *                   3 : psize error
+  *                   4 : vaddr is out of range
+  */
+int Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr,  uint32_t psize, uint32_t num, uint32_t fixed);
+
+/**
+  * @brief Set DCache mmu mapping.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In
+  *                 esp32h2, external memory is always flash
+  *
+  * @param  uint32_t vaddr : virtual address in CPU address space.
+  *                              Can be DRam0, DRam1, DRom0, DPort and AHB buses address.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t paddr : physical address in external memory.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t psize : page size of DCache, in kilobytes. Should be 64 here.
+  *
+  * @param  uint32_t num : pages to be set.
+
+  * @param  uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
+  *
+  * @return uint32_t: error status
+  *                   0 : mmu set success
+  *                   2 : vaddr or paddr is not aligned
+  *                   3 : psize error
+  *                   4 : vaddr is out of range
+  */
+int Cache_Dbus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
+
+/**
+  * @brief Count the pages in the bus room address which map to Flash.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t bus : the bus to count with.
+  *
+  * @param uint32_t * page0_mapped : value should be initial by user, 0 for not mapped, other for mapped count.
+  *
+  * return uint32_t : the number of pages which map to Flash.
+  */
+uint32_t Cache_Count_Flash_Pages(uint32_t bus, uint32_t * page0_mapped);
+
+/**
+  * @brief allocate memory to used by ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_array_t icache_low : the data array bank used by icache low part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, CACHE_MEMORY_IBANK0
+  *
+  * return none
+  */
+void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low);
+
+/**
+  * @brief Get cache mode of ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct cache_mode * mode : the pointer of cache mode struct, caller should set the icache field
+  *
+  * return none
+  */
+void Cache_Get_Mode(struct cache_mode * mode);
+
+/**
+  * @brief set ICache modes: cache size, associate ways and cache line size.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
+  *
+  * @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
+  *
+  * @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
+  *
+  * return none
+  */
+void Cache_Set_ICache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
+
+/**
+  * @brief set DCache modes: cache size, associate ways and cache line size.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_8KB and CACHE_SIZE_16KB
+  *
+  * @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
+  *
+  * @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
+  *
+  * return none
+  */
+void Cache_Set_DCache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
+
+/**
+  * @brief check if the address is accessed through ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : the address to check.
+  *
+  * @return 1 if the address is accessed through ICache, 0 if not.
+  */
+uint32_t Cache_Address_Through_ICache(uint32_t addr);
+
+/**
+  * @brief check if the address is accessed through DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : the address to check.
+  *
+  * @return 1 if the address is accessed through DCache, 0 if not.
+  */
+uint32_t Cache_Address_Through_DCache(uint32_t addr);
+
+/**
+  * @brief Init mmu owner register to make i/d cache use half mmu entries.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Owner_Init(void);
+
+/**
+  * @brief Invalidate the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to invalidate
+  *
+  * @param  uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Invalidate_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Invalidate the Cache items in the region from ICache or DCache.
+  *        If the region is not in Cache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : invalidated region start address.
+  *
+  * @param  uint32_t size : invalidated region size.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Invalidate_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Invalidate all cache items in ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Invalidate_ICache_All(void);
+
+/**
+  * @brief Mask all buses through ICache and DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Mask_All(void);
+
+/**
+  * @brief Suspend ICache auto preload operation, then you can resume it after some ICache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for ICache not auto preload before suspend.
+  */
+uint32_t Cache_Suspend_ICache_Autoload(void);
+
+/**
+  * @brief Resume ICache auto preload operation after some ICache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for ICache not auto preload before suspend.
+  *
+  * @return None.
+  */
+void Cache_Resume_ICache_Autoload(uint32_t autoload);
+
+/**
+  * @brief Start an ICache manual preload, will suspend auto preload of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of the preload region.
+  *
+  * @param uint32_t size : size of the preload region, should not exceed the size of ICache.
+  *
+  * @param uint32_t order : the preload order, 0 for positive, other for negative
+  *
+  * @return uint32_t : 0 for ICache not auto preload before manual preload.
+  */
+uint32_t Cache_Start_ICache_Preload(uint32_t addr, uint32_t size, uint32_t order);
+
+/**
+  * @brief Return if the ICache manual preload done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for ICache manual preload not done.
+  */
+uint32_t Cache_ICache_Preload_Done(void);
+
+/**
+  * @brief End the ICache manual preload to resume auto preload of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for ICache not auto preload before manual preload.
+  *
+  * @return None
+  */
+void Cache_End_ICache_Preload(uint32_t autoload);
+
+/**
+  * @brief Config autoload parameters of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct autoload_config * config : autoload parameters.
+  *
+  * @return None
+  */
+void Cache_Config_ICache_Autoload(const struct autoload_config * config);
+
+/**
+  * @brief Enable auto preload for ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Enable_ICache_Autoload(void);
+
+/**
+  * @brief Disable auto preload for ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Disable_ICache_Autoload(void);
+
+/**
+  * @brief Config a group of prelock parameters of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct lock_config * config : a group of lock parameters.
+  *
+  * @return None
+  */
+
+void Cache_Enable_ICache_PreLock(const struct lock_config *config);
+
+/**
+  * @brief Disable a group of prelock parameters for ICache.
+  *        However, the locked data will not be released.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint16_t group : 0 for group0, 1 for group1.
+  *
+  * @return None
+  */
+void Cache_Disable_ICache_PreLock(uint16_t group);
+
+/**
+  * @brief Lock the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to lock
+  *
+  * @param  uint32_t items: cache lines to lock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Lock_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Unlock the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to unlock
+  *
+  * @param  uint32_t items: cache lines to unlock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Unlock_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Lock the cache items in tag memory for ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of lock region.
+  *
+  * @param uint32_t size : size of lock region.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Lock_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Unlock the cache items in tag memory for ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of unlock region.
+  *
+  * @param uint32_t size : size of unlock region.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Unlock_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Disable ICache access for the cpu.
+  *        This operation will make all ICache tag memory invalid, CPU can't access ICache, ICache will keep idle.
+  *        Please do not call this function in your SDK application.
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Disable_ICache(void);
+
+/**
+  * @brief Enable ICache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : ICache will preload then.
+  *
+  * @return None
+  */
+void Cache_Enable_ICache(uint32_t autoload);
+
+/**
+  * @brief Suspend ICache access for the cpu.
+  *        The ICache tag memory is still there, CPU can't access ICache, ICache will keep idle.
+  *        Please do not change MMU, cache mode or tag memory(tag memory can be changed in some special case).
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Suspend_ICache(void);
+
+/**
+  * @brief Resume ICache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : ICache will preload then.
+  *
+  * @return None
+  */
+void Cache_Resume_ICache(uint32_t autoload);
+
+/**
+  * @brief Get ICache cache line size
+  *
+  * @param  None
+  *
+  * @return uint32_t: 16, 32, 64 Byte
+  */
+uint32_t Cache_Get_ICache_Line_Size(void);
+
+/**
+  * @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Set_Default_Mode(void);
+
+/**
+  * @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Enable_Defalut_ICache_Mode(void);
+
+/**
+  * @brief Enable freeze for ICache.
+  *        Any miss request will be rejected, including cpu miss and preload/autoload miss.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_freeze_mode_t mode : 0 for assert busy 1 for assert hit
+  *
+  * @return None
+  */
+void Cache_Freeze_ICache_Enable(cache_freeze_mode_t mode);
+
+/**
+  * @brief Disable freeze for ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @return None
+  */
+void Cache_Freeze_ICache_Disable(void);
+
+/**
+  * @brief Travel tag memory to run a call back function.
+  *        ICache and DCache are suspend when doing this.
+  *        The callback will get the parameter tag_group_info, which will include a group of tag memory addresses and cache memory addresses.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to check and the cache mode.
+  *
+  * @param  uint32_t filter_addr : only the cache lines which may include the filter_address will be returned to the call back function.
+  *                                0 for do not filter, all cache lines will be returned.
+  *
+  * @param  void (* process)(struct tag_group_info *) : call back function, which may be called many times, a group(the addresses in the group are in the same position in the cache ways) a time.
+  *
+  * @return None
+  */
+void Cache_Travel_Tag_Memory(struct cache_mode * mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
+
+/**
+  * @brief Get the virtual address from cache mode, cache tag and the virtual address offset of cache ways.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
+  *
+  * @param  uint32_t tag : the tag part fo a tag item, 12-14 bits.
+  *
+  * @param  uint32_t addr_offset : the virtual address offset of the cache ways.
+  *
+  * @return uint32_t : the virtual address.
+  */
+uint32_t Cache_Get_Virtual_Addr(struct cache_mode *mode, uint32_t tag, uint32_t vaddr_offset);
+
+/**
+  * @brief Get cache memory block base address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t icache : 0 for dcache, other for icache.
+  *
+  * @param  uint32_t bank_no : 0 ~ 3 bank.
+  *
+  * @return uint32_t : the cache memory block base address, 0 if the block not used.
+  */
+uint32_t Cache_Get_Memory_BaseAddr(uint32_t icache, uint32_t bank_no);
+
+/**
+  * @brief Get the cache memory address from cache mode, cache memory offset and the virtual address offset of cache ways.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
+  *
+  * @param  uint32_t cache_memory_offset : the cache memory offset of the whole cache (ICache or DCache) for the cache line.
+  *
+  * @param  uint32_t addr_offset : the virtual address offset of the cache ways.
+  *
+  * @return uint32_t : the virtual address.
+  */
+uint32_t Cache_Get_Memory_Addr(struct cache_mode *mode, uint32_t cache_memory_offset, uint32_t vaddr_offset);
+
+/**
+  * @brief Get the cache memory value by DRAM address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t cache_memory_addr : DRAM address for the cache memory, should be 4 byte aligned for IBus address.
+  *
+  * @return uint32_t : the word value of the address.
+  */
+uint32_t Cache_Get_Memory_value(uint32_t cache_memory_addr);
+/**
+  * @}
+  */
+
+/**
+  * @brief Get the cache MMU IROM end address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  void
+  *
+  * @return uint32_t : the word value of the address.
+  */
+uint32_t Cache_Get_IROM_MMU_End(void);
+
+/**
+  * @brief Get the cache MMU DROM end address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  void
+  *
+  * @return uint32_t : the word value of the address.
+  */
+uint32_t Cache_Get_DROM_MMU_End(void);
+
+/**
+  * @brief  Lock the permission control section configuration. After lock, any
+  *         configuration modification will be bypass. Digital reset will clear the lock!
+  *         Please do not call this function in your SDK application.
+  *
+  * @param  int ibus : 1 for lock ibus pms, 0 for lock dbus pms
+  *
+  * @return None
+  */
+void Cache_Pms_Lock(int ibus);
+
+/**
+  * @brief  Set three ibus pms boundary address, which will determine pms reject section and section 1/2.
+  *         Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t ibus_boundary0_addr : vaddress for split line0
+  *
+  * @param  uint32_t ibus_boundary1_addr : vaddress for split line1
+  *
+  * @param  uint32_t ibus_boundary2_addr : vaddress for split line2
+  *
+  * @return int : ESP_ROM_ERR_INVALID_ARG for invalid address, 0 for success
+  */
+int Cache_Ibus_Pms_Set_Addr(uint32_t ibus_boundary0_addr, uint32_t ibus_boundary1_addr, uint32_t ibus_boundary2_addr);
+
+/**
+  * @brief  Set three ibus pms attribute, which will determine pms in different section and world.
+  *         Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t ibus_pms_sct2_attr : attr for section2
+  *
+  * @param  uint32_t ibus_pms_sct1_attr : attr for section1
+  *
+  * @return None
+  */
+void Cache_Ibus_Pms_Set_Attr(uint32_t ibus_pms_sct2_attr, uint32_t ibus_pms_sct1_attr);
+
+/**
+  * @brief  Set three dbus pms boundary address, which will determine pms reject section and section 1/2.
+  *         Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t dbus_boundary0_addr : vaddress for split line0
+  *
+  * @param  uint32_t dbus_boundary1_addr : vaddress for split line1
+  *
+  * @param  uint32_t dbus_boundary2_addr : vaddress for split line2
+  *
+  * @return int : ESP_ROM_ERR_INVALID_ARG for invalid address, 0 for success
+  */
+int Cache_Dbus_Pms_Set_Addr(uint32_t dbus_boundary0_addr, uint32_t dbus_boundary1_addr, uint32_t dbus_boundary2_addr);
+
+/**
+  * @brief  Set three dbus pms attribute, which will determine pms in different section and world.
+  *         Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t dbus_pms_sct2_attr : attr for section2
+  *
+  * @param  uint32_t dbus_pms_sct1_attr : attr for section1
+  *
+  * @return None
+  */
+void Cache_Dbus_Pms_Set_Attr(uint32_t dbus_pms_sct2_attr, uint32_t dbus_pms_sct1_attr);
+
+/**
+  * @brief Used by SPI flash mmap
+  *
+  */
+uint32_t flash_instr_rodata_start_page(uint32_t bus);
+uint32_t flash_instr_rodata_end_page(uint32_t bus);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_CACHE_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/crc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/crc.h
new file mode 100644
index 00000000000..e683f4fd419
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/crc.h
@@ -0,0 +1,127 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef ROM_CRC_H
+#define ROM_CRC_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup crc_apis, uart configuration and communication related apis
+  * @brief crc apis
+  */
+
+/** @addtogroup crc_apis
+  * @{
+  */
+
+
+/* Standard CRC8/16/32 algorithms. */
+// CRC-8        x8+x2+x1+1              0x07
+// CRC16-CCITT  x16+x12+x5+1   1021   ISO HDLC, ITU X.25, V.34/V.41/V.42, PPP-FCS
+// CRC32:
+//G(x) = x32 +x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x1 + 1
+//If your buf is not continuous, you can use the first result to be the second parameter.
+
+/**
+  * @brief Crc32 value that is in little endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint32_t crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc32 value that is in big endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint32_t crc32_be(uint32_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc16 value that is in little endian.
+  *
+  * @param  uint16_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint16_t crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc16 value that is in big endian.
+  *
+  * @param  uint16_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint16_t crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc8 value that is in little endian.
+  *
+  * @param  uint8_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint8_t crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc8 value that is in big endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint8_t crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/digital_signature.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/digital_signature.h
new file mode 100644
index 00000000000..54c01681d40
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/digital_signature.h
@@ -0,0 +1,150 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#define ETS_DS_MAX_BITS 3072
+
+#define ETS_DS_IV_LEN 16
+
+/* Length of parameter 'C' stored in flash (not including IV)
+
+   Comprises encrypted Y, M, rinv, md (32), mprime (4), length (4), padding (8)
+
+   Note that if ETS_DS_MAX_BITS<4096, 'C' needs to be split up when writing to hardware
+*/
+#define ETS_DS_C_LEN ((ETS_DS_MAX_BITS * 3 / 8) + 32 + 8 + 8)
+
+/* Encrypted ETS data. Recommended to store in flash in this format.
+ */
+typedef struct {
+    /* RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     */
+    unsigned rsa_length;
+
+    /* IV value used to encrypt 'c' */
+    uint8_t iv[ETS_DS_IV_LEN];
+
+    /* Encrypted Digital Signature parameters. Result of AES-CBC encryption
+       of plaintext values. Includes an encrypted message digest.
+    */
+    uint8_t c[ETS_DS_C_LEN];
+} ets_ds_data_t;
+
+typedef enum {
+    ETS_DS_OK,
+    ETS_DS_INVALID_PARAM,   /* Supplied parameters are invalid */
+    ETS_DS_INVALID_KEY,     /* HMAC peripheral failed to supply key */
+    ETS_DS_INVALID_PADDING, /* 'c' decrypted with invalid padding */
+    ETS_DS_INVALID_DIGEST,  /* 'c' decrypted with invalid digest */
+} ets_ds_result_t;
+
+void ets_ds_enable(void);
+
+void ets_ds_disable(void);
+
+
+/*
+ * @brief Start signing a message (or padded message digest) using the Digital Signature peripheral
+ *
+ * - @param message Pointer to message (or padded digest) containing the message to sign. Should be
+ *   (data->rsa_length + 1)*4 bytes long.  @param data Pointer to DS data. Can be a pointer to data
+ *   in flash.
+ *
+ * Caller must have already called ets_ds_enable() and ets_hmac_calculate_downstream() before calling
+ * this function, and is responsible for calling ets_ds_finish_sign() and then
+ * ets_hmac_invalidate_downstream() afterwards.
+ *
+ * @return ETS_DS_OK if signature is in progress, ETS_DS_INVALID_PARAM if param is invalid,
+ * EST_DS_INVALID_KEY if key or HMAC peripheral is configured incorrectly.
+ */
+ets_ds_result_t ets_ds_start_sign(const void *message, const ets_ds_data_t *data);
+
+
+/*
+ * @brief Returns true if the DS peripheral is busy following a call to ets_ds_start_sign()
+ *
+ * A result of false indicates that a call to ets_ds_finish_sign() will not block.
+ *
+ * Only valid if ets_ds_enable() has been called.
+ */
+bool ets_ds_is_busy(void);
+
+
+/* @brief Finish signing a message using the Digital Signature peripheral
+ *
+ * Must be called after ets_ds_start_sign(). Can use ets_ds_busy() to wait until
+ * peripheral is no longer busy.
+ *
+ * - @param signature Pointer to buffer to contain the signature. Should be
+ *   (data->rsa_length + 1)*4 bytes long.
+ * - @param data Should match the 'data' parameter passed to ets_ds_start_sign()
+ *
+ * @param ETS_DS_OK if signing succeeded, ETS_DS_INVALID_PARAM if param is invalid,
+ * ETS_DS_INVALID_DIGEST or ETS_DS_INVALID_PADDING if there is a problem with the
+ * encrypted data digest or padding bytes (in case of ETS_DS_INVALID_PADDING, a
+ * digest is produced anyhow.)
+ */
+ets_ds_result_t ets_ds_finish_sign(void *signature, const ets_ds_data_t *data);
+
+
+/* Plaintext parameters used by Digital Signature.
+
+   Not used for signing with DS peripheral, but can be encrypted
+   in-device by calling ets_ds_encrypt_params()
+*/
+typedef struct {
+    uint32_t Y[ETS_DS_MAX_BITS / 32];
+    uint32_t M[ETS_DS_MAX_BITS / 32];
+    uint32_t Rb[ETS_DS_MAX_BITS / 32];
+    uint32_t M_prime;
+    uint32_t length;
+} ets_ds_p_data_t;
+
+typedef enum {
+    ETS_DS_KEY_HMAC, /* The HMAC key (as stored in efuse) */
+    ETS_DS_KEY_AES,  /* The AES key (as derived from HMAC key by HMAC peripheral in downstream mode) */
+} ets_ds_key_t;
+
+/* @brief Encrypt DS parameters suitable for storing and later use with DS peripheral
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the corresponding HMAC key will be stored to efuse and then permanently erased.
+ * @param key_type Type of key stored in 'key' (either the AES-256 DS key, or an HMAC DS key from which the AES DS key is derived using HMAC peripheral)
+ *
+ * @return ETS_DS_INVALID_PARAM if any parameter is invalid, or ETS_DS_OK if 'data' is successfully generated from the input parameters.
+ */
+ets_ds_result_t ets_ds_encrypt_params(ets_ds_data_t *data, const void *iv, const ets_ds_p_data_t *p_data, const void *key, ets_ds_key_t key_type);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/efuse.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/efuse.h
new file mode 100644
index 00000000000..9da1525f969
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/efuse.h
@@ -0,0 +1,392 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_EFUSE_H_
+#define _ROM_EFUSE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+/** \defgroup efuse_APIs efuse APIs
+  * @brief     ESP32 efuse read/write APIs
+  * @attention
+  *
+  */
+
+/** @addtogroup efuse_APIs
+  * @{
+  */
+
+typedef enum {
+    ETS_EFUSE_KEY_PURPOSE_USER = 0,
+    ETS_EFUSE_KEY_PURPOSE_RESERVED = 1,
+    ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_UP = 8,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
+    ETS_EFUSE_KEY_PURPOSE_MAX,
+} ets_efuse_purpose_t;
+
+typedef enum {
+    ETS_EFUSE_BLOCK0 = 0,
+    ETS_EFUSE_MAC_SPI_SYS_0 = 1,
+    ETS_EFUSE_BLOCK_SYS_DATA = 2,
+    ETS_EFUSE_BLOCK_USR_DATA = 3,
+    ETS_EFUSE_BLOCK_KEY0 = 4,
+    ETS_EFUSE_BLOCK_KEY1 = 5,
+    ETS_EFUSE_BLOCK_KEY2 = 6,
+    ETS_EFUSE_BLOCK_KEY3 = 7,
+    ETS_EFUSE_BLOCK_KEY4 = 8,
+    ETS_EFUSE_BLOCK_KEY5 = 9,
+    ETS_EFUSE_BLOCK_KEY6 = 10,
+    ETS_EFUSE_BLOCK_MAX,
+} ets_efuse_block_t;
+
+/**
+ * @brief set timing accroding the apb clock, so no read error or write error happens.
+ *
+ * @param clock: apb clock in HZ, only accept 5M(in FPGA), 10M(in FPGA), 20M, 40M, 80M.
+ *
+ * @return : 0 if success, others if clock not accepted
+ */
+int ets_efuse_set_timing(uint32_t clock);
+
+/**
+ * @brief Enable efuse subsystem. Called after reset. Doesn't need to be called again.
+ */
+void ets_efuse_start(void);
+
+/**
+  * @brief  Efuse read operation: copies data from physical efuses to efuse read registers.
+  *
+  * @param  null
+  *
+  * @return : 0 if success, others if apb clock is not accepted
+  */
+int ets_efuse_read(void);
+
+/**
+  * @brief  Efuse write operation: Copies data from efuse write registers to efuse. Operates on a single block of efuses at a time.
+  *
+  * @note This function does not update read efuses, call ets_efuse_read() once all programming is complete.
+  *
+  * @return : 0 if success, others if apb clock is not accepted
+  */
+int ets_efuse_program(ets_efuse_block_t block);
+
+/**
+ * @brief Set all Efuse program registers to zero.
+ *
+ * Call this before writing new data to the program registers.
+ */
+void ets_efuse_clear_program_registers(void);
+
+/**
+ * @brief Program a block of key data to an efuse block
+ *
+ * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6. Key block must be unused (@ref ets_efuse_key_block_unused).
+ * @param purpose Purpose to set for this key. Purpose must be already unset.
+ * @param data Pointer to data to write.
+ * @param data_len Length of data to write.
+ *
+ * @note This function also calls ets_efuse_program() for the specified block, and for block 0 (setting the purpose)
+ */
+int ets_efuse_write_key(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose, const void *data, size_t data_len);
+
+
+/* @brief Return the address of a particular efuse block's first read register
+ *
+ * @param block Index of efuse block to look up
+ *
+ * @return 0 if block is invalid, otherwise a numeric read register address
+ * of the first word in the block.
+ */
+uint32_t ets_efuse_get_read_register_address(ets_efuse_block_t block);
+
+/**
+ * @brief Return the current purpose set for an efuse key block
+ *
+ * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6.
+ */
+ets_efuse_purpose_t ets_efuse_get_key_purpose(ets_efuse_block_t key_block);
+
+/**
+ * @brief Find a key block with the particular purpose set
+ *
+ * @param purpose Purpose to search for.
+ * @param[out] key_block Pointer which will be set to the key block if found. Can be NULL, if only need to test the key block exists.
+ * @return true if found, false if not found. If false, value at key_block pointer is unchanged.
+ */
+bool ets_efuse_find_purpose(ets_efuse_purpose_t purpose, ets_efuse_block_t *key_block);
+
+/**
+ * Return true if the key block is unused, false otherwise.
+ *
+ * An unused key block is all zero content, not read or write protected,
+ * and has purpose 0 (ETS_EFUSE_KEY_PURPOSE_USER)
+ *
+ * @param key_block key block to check.
+ *
+ * @return true if key block is unused, false if key block or used
+ * or the specified block index is not a key block.
+ */
+bool ets_efuse_key_block_unused(ets_efuse_block_t key_block);
+
+
+/**
+ * @brief Search for an unused key block and return the first one found.
+ *
+ * See @ref ets_efuse_key_block_unused for a description of an unused key block.
+ *
+ * @return First unused key block, or ETS_EFUSE_BLOCK_MAX if no unused key block is found.
+ */
+ets_efuse_block_t ets_efuse_find_unused_key_block(void);
+
+/**
+ * @brief Return the number of unused efuse key blocks (0-6)
+ */
+unsigned ets_efuse_count_unused_key_blocks(void);
+
+/**
+ * @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
+ *
+ * @param data Pointer to data buffer (length 32 bytes)
+ * @param rs_values Pointer to write encoded data to (length 12 bytes)
+ */
+void ets_efuse_rs_calculate(const void *data, void *rs_values);
+
+/**
+  * @brief  Read spi flash pads configuration from Efuse
+  *
+  * @return
+  * - 0 for default SPI pins.
+  * - 1 for default HSPI pins.
+  * - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
+  *   EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
+  *   WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
+  */
+uint32_t ets_efuse_get_spiconfig(void);
+
+/**
+  * @brief  Read spi flash wp pad from Efuse
+  *
+  * @return
+  * - 0x3f for invalid.
+  * - 0~46 is valid.
+  */
+uint32_t ets_efuse_get_wp_pad(void);
+
+/**
+ * @brief Read opi flash pads configuration from Efuse
+ *
+ * @return
+ * - 0 for default SPI pins.
+ * - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for:
+ *   DQS, D4, D5, D6, D7 accordingly.
+ */
+uint32_t ets_efuse_get_opiconfig(void);
+
+/**
+  * @brief  Read if download mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable download mode.
+  * - false for efuse doesn't disable download mode.
+  */
+bool ets_efuse_download_modes_disabled(void);
+
+/**
+  * @brief  Read if legacy spi flash boot mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable legacy spi flash boot mode.
+  * - false for efuse doesn't disable legacy spi flash boot mode.
+  */
+bool ets_efuse_legacy_spi_boot_mode_disabled(void);
+
+/**
+  * @brief  Read if uart print control value from Efuse
+  *
+  * @return
+  * - 0 for uart force print.
+  * - 1 for uart print when GPIO8 is low when digital reset.
+  *   2 for uart print when GPIO8 is high when digital reset.
+  *   3 for uart force slient
+  */
+uint32_t ets_efuse_get_uart_print_control(void);
+
+/**
+  * @brief  Read which channel will used by ROM to print
+  *
+  * @return
+  * - 0 for UART0.
+  * - 1 for UART1.
+  */
+uint32_t ets_efuse_get_uart_print_channel(void);
+
+/**
+  * @brief  Read if usb download mode disabled from Efuse
+  *
+  * (Also returns true if security download mode is enabled, as this mode
+  * disables USB download.)
+  *
+  * @return
+  * - true for efuse disable usb download mode.
+  * - false for efuse doesn't disable usb download mode.
+  */
+bool ets_efuse_usb_download_mode_disabled(void);
+
+/**
+  * @brief  Read if tiny basic mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable tiny basic mode.
+  * - false for efuse doesn't disable tiny basic mode.
+  */
+bool ets_efuse_tiny_basic_mode_disabled(void);
+
+/**
+  * @brief  Read if usb module disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable usb module.
+  * - false for efuse doesn't disable usb module.
+  */
+bool ets_efuse_usb_module_disabled(void);
+
+/**
+  * @brief  Read if security download modes enabled from Efuse
+  *
+  * @return
+  * - true for efuse enable security download mode.
+  * - false for efuse doesn't enable security download mode.
+  */
+bool ets_efuse_security_download_modes_enabled(void);
+
+/**
+ * @brief Return true if secure boot is enabled in EFuse
+ */
+bool ets_efuse_secure_boot_enabled(void);
+
+/**
+ * @brief Return true if secure boot aggressive revoke is enabled in EFuse
+ */
+bool ets_efuse_secure_boot_aggressive_revoke_enabled(void);
+
+/**
+ * @brief Return true if cache encryption (flash, etc) is enabled from boot via EFuse
+ */
+bool ets_efuse_cache_encryption_enabled(void);
+
+/**
+ * @brief Return true if EFuse indicates an external phy needs to be used for USB
+ */
+bool ets_efuse_usb_use_ext_phy(void);
+
+/**
+ * @brief Return true if EFuse indicates USB device persistence is disabled
+ */
+bool ets_efuse_usb_force_nopersist(void);
+
+/**
+ * @brief Return true if OPI pins GPIO33-37 are powered by VDDSPI, otherwise by VDD33CPU
+ */
+bool ets_efuse_flash_opi_5pads_power_sel_vddspi(void);
+
+/**
+ * @brief Return true if EFuse indicates an opi flash is attached.
+ */
+bool ets_efuse_flash_opi_mode(void);
+
+/**
+ * @brief Return true if EFuse indicates to send a flash resume command.
+ */
+bool ets_efuse_force_send_resume(void);
+
+/**
+  * @brief  return the time in us ROM boot need wait flash to power on from Efuse
+  *
+  * @return
+  * - uint32_t the time in us.
+  */
+uint32_t ets_efuse_get_flash_delay_us(void);
+
+#define EFUSE_SPICONFIG_SPI_DEFAULTS 0
+#define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
+
+#define EFUSE_SPICONFIG_RET_SPICLK_MASK         0x3f
+#define EFUSE_SPICONFIG_RET_SPICLK_SHIFT        0
+#define EFUSE_SPICONFIG_RET_SPICLK(ret)         (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPIQ_MASK           0x3f
+#define EFUSE_SPICONFIG_RET_SPIQ_SHIFT          6
+#define EFUSE_SPICONFIG_RET_SPIQ(ret)           (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPID_MASK           0x3f
+#define EFUSE_SPICONFIG_RET_SPID_SHIFT          12
+#define EFUSE_SPICONFIG_RET_SPID(ret)           (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPICS0_MASK         0x3f
+#define EFUSE_SPICONFIG_RET_SPICS0_SHIFT        18
+#define EFUSE_SPICONFIG_RET_SPICS0(ret)         (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
+
+
+#define EFUSE_SPICONFIG_RET_SPIHD_MASK          0x3f
+#define EFUSE_SPICONFIG_RET_SPIHD_SHIFT         24
+#define EFUSE_SPICONFIG_RET_SPIHD(ret)          (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
+
+/**
+ * @brief Enable JTAG temporarily by writing a JTAG HMAC "key" into
+ * the JTAG_CTRL registers.
+ *
+ * Works if JTAG has been "soft" disabled by burning the EFUSE_SOFT_DIS_JTAG efuse.
+ *
+ * Will enable the HMAC module to generate a "downstream" HMAC value from a key already saved in efuse, and then write the JTAG HMAC "key" which will enable JTAG if the two keys match.
+ *
+ * @param jtag_hmac_key Pointer to a 32 byte array containing a valid key. Supplied by user.
+ * @param key_block Index of a key block containing the source for this key.
+ *
+ * @return ETS_FAILED if HMAC operation fails or invalid parameter, ETS_OK otherwise. ETS_OK doesn't necessarily mean that JTAG was enabled.
+ */
+int ets_jtag_enable_temporarily(const uint8_t *jtag_hmac_key, ets_efuse_block_t key_block);
+
+/**
+  * @brief  A crc8 algorithm used for MAC addresses in efuse
+  *
+  * @param  unsigned char const *p : Pointer to original data.
+  *
+  * @param  unsigned int len : Data length in byte.
+  *
+  * @return unsigned char: Crc value.
+  */
+unsigned char esp_crc8(unsigned char const *p, unsigned int len);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_EFUSE_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/esp_flash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/esp_flash.h
new file mode 100644
index 00000000000..40e5872c090
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/esp_flash.h
@@ -0,0 +1,54 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Note: Most of esp_flash APIs in ROM are compatible with headers in ESP-IDF, this function
+   just adds ROM-specific parts
+*/
+
+struct spi_flash_chip_t;
+typedef struct esp_flash_t esp_flash_t;
+
+/* Structure to wrap "global" data used by esp_flash in ROM */
+typedef struct {
+    /* Default SPI flash chip, ie main chip attached to the MCU
+       This chip is used if the 'chip' argument passed to esp_flash_xxx API functions is ever NULL
+    */
+    esp_flash_t *default_chip;
+
+    /* Global API OS notification start/end/chip_check functions
+
+       These are used by ROM if no other host functions are configured.
+    */
+    struct {
+        esp_err_t (*start)(esp_flash_t *chip);
+        esp_err_t (*end)(esp_flash_t *chip, esp_err_t err);
+        esp_err_t (*chip_check)(esp_flash_t **inout_chip);
+    } api_funcs;
+} esp_flash_rom_global_data_t;
+
+/** Access a pointer to the global data used by the ROM spi_flash driver
+ */
+esp_flash_rom_global_data_t *esp_flash_get_rom_global_data(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/ets_sys.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/ets_sys.h
new file mode 100644
index 00000000000..b3780248849
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/ets_sys.h
@@ -0,0 +1,563 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_ETS_SYS_H_
+#define _ROM_ETS_SYS_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup ets_sys_apis, ets system related apis
+  * @brief ets system apis
+  */
+
+/** @addtogroup ets_sys_apis
+  * @{
+  */
+
+/************************************************************************
+  *                                NOTE
+  *   Many functions in this header files can't be run in FreeRTOS.
+  *   Please see the comment of the Functions.
+  *   There are also some functions that doesn't work on FreeRTOS
+  *   without listed in the header, such as:
+  *   xtos functions start with "_xtos_" in ld file.
+  *
+  ***********************************************************************
+  */
+
+/** \defgroup ets_apis, Espressif Task Scheduler related apis
+  * @brief ets apis
+  */
+
+/** @addtogroup ets_apis
+  * @{
+  */
+
+typedef enum {
+    ETS_OK     = 0, /**< return successful in ets*/
+    ETS_FAILED = 1  /**< return failed in ets*/
+} ETS_STATUS;
+
+typedef ETS_STATUS ets_status_t;
+
+typedef uint32_t ETSSignal;
+typedef uint32_t ETSParam;
+
+typedef struct ETSEventTag ETSEvent;    /**< Event transmit/receive in ets*/
+
+struct ETSEventTag {
+    ETSSignal sig;  /**< Event signal, in same task, different Event with different signal*/
+    ETSParam  par;  /**< Event parameter, sometimes without usage, then will be set as 0*/
+};
+
+typedef void (*ETSTask)(ETSEvent *e);       /**< Type of the Task processer*/
+typedef void (* ets_idle_cb_t)(void *arg);  /**< Type of the system idle callback*/
+
+/**
+  * @brief  Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.
+  *
+  * @param  none
+  *
+  * @return none
+  */
+void ets_run(void);
+
+/**
+  * @brief  Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.
+  *
+  * @param  ets_idle_cb_t func : The callback function.
+  *
+  * @param  void *arg : Argument of the callback.
+  *
+  * @return None
+  */
+void ets_set_idle_cb(ets_idle_cb_t func, void *arg);
+
+/**
+  * @brief  Init a task with processer, priority, queue to receive Event, queue length.
+  *
+  * @param  ETSTask task : The task processer.
+  *
+  * @param  uint8_t prio : Task priority, 0-31, bigger num with high priority, one priority with one task.
+  *
+  * @param  ETSEvent *queue : Queue belongs to the task, task always receives Events, Queue is circular used.
+  *
+  * @param  uint8_t qlen : Queue length.
+  *
+  * @return None
+  */
+void ets_task(ETSTask task, uint8_t prio, ETSEvent *queue, uint8_t qlen);
+
+/**
+  * @brief  Post an event to an Task.
+  *
+  * @param  uint8_t prio : Priority of the Task.
+  *
+  * @param  ETSSignal sig : Event signal.
+  *
+  * @param  ETSParam  par : Event parameter
+  *
+  * @return ETS_OK     : post successful
+  * @return ETS_FAILED : post failed
+  */
+ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_boot_apis, Boot routing related apis
+  * @brief ets boot apis
+  */
+
+/** @addtogroup ets_apis
+  * @{
+  */
+
+extern const char *const exc_cause_table[40];   ///**< excption cause that defined by the core.*/
+
+/**
+  * @brief  Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed.
+  *         When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.
+  *
+  * @param  uint32_t start : the PRO Entry code address value in uint32_t
+  *
+  * @return None
+  */
+void ets_set_user_start(uint32_t start);
+
+/**
+  * @brief  Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code.
+  *         When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.
+  *
+  * @param  uint32_t callback : the Startup code address value in uint32_t
+  *
+  * @return None     : post successful
+  */
+void ets_set_startup_callback(uint32_t callback);
+
+/**
+  * @brief  Set App cpu Entry code, code can be called in PRO CPU.
+  *         When APP booting is completed, APP CPU will call the Entry code if not NULL.
+  *
+  * @param  uint32_t start : the APP Entry code address value in uint32_t, stored in register APPCPU_CTRL_REG_D.
+  *
+  * @return None
+  */
+void ets_set_appcpu_boot_addr(uint32_t start);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_printf_apis, ets_printf related apis used in ets
+  * @brief ets printf apis
+  */
+
+/** @addtogroup ets_printf_apis
+  * @{
+  */
+
+/**
+  * @brief  Printf the strings to uart or other devices, similar with printf, simple than printf.
+  *         Can not print float point data format, or longlong data format.
+  *         So we maybe only use this in ROM.
+  *
+  * @param  const char *fmt : See printf.
+  *
+  * @param  ... : See printf.
+  *
+  * @return int : the length printed to the output device.
+  */
+int ets_printf(const char *fmt, ...);
+
+/**
+  * @brief  Set the uart channel of ets_printf(uart_tx_one_char).
+  *         ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
+  *
+  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2.
+  *
+  * @return None
+  */
+void ets_set_printf_channel(uint8_t uart_no);
+
+/**
+  * @brief Get the uart channel of ets_printf(uart_tx_one_char).
+  *
+  * @return uint8_t uart channel used by ets_printf(uart_tx_one_char).
+  */
+uint8_t ets_get_printf_channel(void);
+
+/**
+  * @brief  Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function.
+  *         Can not print float point data format, or longlong data format
+  *
+  * @param  char c : char to output.
+  *
+  * @return None
+  */
+void ets_write_char_uart(char c);
+
+/**
+  * @brief  Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
+  *         To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.
+  *
+  * @param  void (*)(char) p: Output function to install.
+  *
+  * @return None
+  */
+void ets_install_putc1(void (*p)(char c));
+
+/**
+  * @brief  Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
+  *         To install putc2, which is defaulted installed as NULL.
+  *
+  * @param  void (*)(char) p: Output function to install.
+  *
+  * @return None
+  */
+void ets_install_putc2(void (*p)(char c));
+
+/**
+  * @brief  Install putc1 as ets_write_char_uart.
+  *         In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_install_uart_printf(void);
+
+#define ETS_PRINTF(...) ets_printf(...)
+
+#define ETS_ASSERT(v) do { \
+    if (!(v)) {             \
+        ets_printf("%s %u \n", __FILE__, __LINE__); \
+        while (1) {};   \
+    }                   \
+} while (0);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_timer_apis, ets_timer related apis used in ets
+  * @brief ets timer apis
+  */
+
+/** @addtogroup ets_timer_apis
+  * @{
+  */
+typedef void ETSTimerFunc(void *timer_arg);/**< timer handler*/
+
+typedef struct _ETSTIMER_ {
+    struct _ETSTIMER_    *timer_next;   /**< timer linker*/
+    uint32_t              timer_expire; /**< abstruct time when timer expire*/
+    uint32_t              timer_period; /**< timer period, 0 means timer is not periodic repeated*/
+    ETSTimerFunc         *timer_func;   /**< timer handler*/
+    void                 *timer_arg;    /**< timer handler argument*/
+} ETSTimer;
+
+/**
+  * @brief  Init ets timer, this timer range is 640 us to 429496 ms
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_timer_init(void);
+
+/**
+  * @brief  In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_timer_deinit(void);
+
+/**
+  * @brief  Arm an ets timer, this timer range is 640 us to 429496 ms.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  uint32_t tmout : Timer value in ms, range is 1 to 429496.
+  *
+  * @param  bool repeat : Timer is periodic repeated.
+  *
+  * @return None
+  */
+void ets_timer_arm(ETSTimer *timer, uint32_t tmout, bool repeat);
+
+/**
+  * @brief  Arm an ets timer, this timer range is 640 us to 429496 ms.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  uint32_t tmout : Timer value in us, range is 1 to 429496729.
+  *
+  * @param  bool repeat : Timer is periodic repeated.
+  *
+  * @return None
+  */
+void ets_timer_arm_us(ETSTimer *ptimer, uint32_t us, bool repeat);
+
+/**
+  * @brief  Disarm an ets timer.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @return None
+  */
+void ets_timer_disarm(ETSTimer *timer);
+
+/**
+  * @brief  Set timer callback and argument.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  ETSTimerFunc *pfunction : Timer callback.
+  *
+  * @param  void *parg : Timer callback argument.
+  *
+  * @return None
+  */
+void ets_timer_setfn(ETSTimer *ptimer, ETSTimerFunc *pfunction, void *parg);
+
+/**
+  * @brief  Unset timer callback and argument to NULL.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @return None
+  */
+void ets_timer_done(ETSTimer *ptimer);
+
+/**
+  * @brief  CPU do while loop for some time.
+  *         In FreeRTOS task, please call FreeRTOS apis.
+  *
+  * @param  uint32_t us : Delay time in us.
+  *
+  * @return None
+  */
+void ets_delay_us(uint32_t us);
+
+/**
+  * @brief  Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
+  *         Call this function when CPU frequency is changed.
+  *
+  * @param  uint32_t ticks_per_us : CPU ticks per us.
+  *
+  * @return None
+  */
+void ets_update_cpu_frequency(uint32_t ticks_per_us);
+
+/**
+  * @brief  Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
+  *
+  * @note This function only sets the tick rate for the current CPU. It is located in ROM,
+  *       so the deep sleep stub can use it even if IRAM is not initialized yet.
+  *
+  * @param  uint32_t ticks_per_us : CPU ticks per us.
+  *
+  * @return None
+  */
+void ets_update_cpu_frequency_rom(uint32_t ticks_per_us);
+
+/**
+  * @brief  Get the real CPU ticks per us to the ets.
+  *         This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.
+  *
+  * @param  None
+  *
+  * @return uint32_t : CPU ticks per us record in ets.
+  */
+uint32_t ets_get_cpu_frequency(void);
+
+/**
+  * @brief  Get xtal_freq value, If value not stored in RTC_STORE5, than store.
+  *
+  * @param  None
+  *
+  * @return uint32_t : if stored in efuse(not 0)
+  *                         clock = ets_efuse_get_xtal_freq() * 1000000;
+  *                    else if analog_8M in efuse
+  *                         clock = ets_get_xtal_scale() * 625 / 16 * ets_efuse_get_8M_clock();
+  *                    else clock = 40M.
+  */
+uint32_t ets_get_xtal_freq(void);
+
+/**
+  * @brief  Get the apb divior by xtal frequency.
+  *         When any types of reset happen, the default value is 2.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 1 or 2.
+  */
+uint32_t ets_get_xtal_div(void);
+
+/**
+  * @brief  Get apb_freq value, If value not stored in RTC_STORE5, than store.
+  *
+  * @param  None
+  *
+  * @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register.
+  *                         clock = (REG_READ(RTC_STORE5) & 0xffff) << 12;
+  *                    else store ets_get_detected_xtal_freq() in.
+  */
+uint32_t ets_get_apb_freq(void);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_intr_apis, ets interrupt configure related apis
+  * @brief ets intr apis
+  */
+
+/** @addtogroup ets_intr_apis
+  * @{
+  */
+
+typedef void (* ets_isr_t)(void *);/**< interrupt handler type*/
+
+/**
+  * @brief  Attach a interrupt handler to a CPU interrupt number.
+  *         This function equals to _xtos_set_interrupt_handler_arg(i, func, arg).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  int i : CPU interrupt number.
+  *
+  * @param  ets_isr_t func : Interrupt handler.
+  *
+  * @param  void *arg : argument of the handler.
+  *
+  * @return None
+  */
+void ets_isr_attach(int i, ets_isr_t func, void *arg);
+
+/**
+  * @brief  Mask the interrupts which show in mask bits.
+  *         This function equals to _xtos_ints_off(mask).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  uint32_t mask : BIT(i) means mask CPU interrupt number i.
+  *
+  * @return None
+  */
+void ets_isr_mask(uint32_t mask);
+
+/**
+  * @brief  Unmask the interrupts which show in mask bits.
+  *         This function equals to _xtos_ints_on(mask).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  uint32_t mask : BIT(i) means mask CPU interrupt number i.
+  *
+  * @return None
+  */
+void ets_isr_unmask(uint32_t unmask);
+
+/**
+  * @brief  Lock the interrupt to level 2.
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_intr_lock(void);
+
+/**
+  * @brief  Unlock the interrupt to level 0.
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_intr_unlock(void);
+
+/**
+  * @brief  Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt).
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_waiti0(void);
+
+/**
+  * @brief  Attach an CPU interrupt to a hardware source.
+  *         We have 4 steps to use an interrupt:
+  *         1.Attach hardware interrupt source to CPU.  intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);
+  *         2.Set interrupt handler.                    xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);
+  *         3.Enable interrupt for CPU.                 xt_ints_on(1 << ETS_WMAC_INUM);
+  *         4.Enable interrupt in the module.
+  *
+  * @param  int cpu_no : The CPU which the interrupt number belongs.
+  *
+  * @param  uint32_t model_num : The interrupt hardware source number, please see the interrupt hardware source table.
+  *
+  * @param  uint32_t intr_num : The interrupt number CPU, please see the interrupt cpu using table.
+  *
+  * @return None
+  */
+void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
+
+/**
+  * @}
+  */
+
+#ifndef MAC2STR
+#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
+#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
+#endif
+
+#define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
+
+typedef enum {
+    OK = 0,
+    FAIL,
+    PENDING,
+    BUSY,
+    CANCEL,
+} STATUS;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_ETS_SYS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/gpio.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/gpio.h
new file mode 100644
index 00000000000..2969d14fc00
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/gpio.h
@@ -0,0 +1,311 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_GPIO_H_
+#define _ROM_GPIO_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_attr.h"
+#include "soc/gpio_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup gpio_apis, uart configuration and communication related apis
+  * @brief gpio apis
+  */
+
+/** @addtogroup gpio_apis
+  * @{
+  */
+
+#define GPIO_REG_READ(reg)              READ_PERI_REG(reg)
+#define GPIO_REG_WRITE(reg, val)        WRITE_PERI_REG(reg, val)
+#define GPIO_ID_PIN0                    0
+#define GPIO_ID_PIN(n)                  (GPIO_ID_PIN0+(n))
+#define GPIO_PIN_ADDR(i)                (GPIO_PIN0_REG + i*4)
+
+#define GPIO_FUNC_IN_HIGH               0x38
+#define GPIO_FUNC_IN_LOW                0x3C
+
+#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
+    ((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
+
+#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
+
+typedef enum {
+    GPIO_PIN_INTR_DISABLE = 0,
+    GPIO_PIN_INTR_POSEDGE = 1,
+    GPIO_PIN_INTR_NEGEDGE = 2,
+    GPIO_PIN_INTR_ANYEDGE = 3,
+    GPIO_PIN_INTR_LOLEVEL = 4,
+    GPIO_PIN_INTR_HILEVEL = 5
+} GPIO_INT_TYPE;
+
+#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
+        ((gpio_no < 32) ? gpio_output_set(bit_value<<gpio_no, (bit_value ? 0 : 1)<<gpio_no, 1<<gpio_no,0) : \
+                         gpio_output_set_high(bit_value<<(gpio_no - 32), (bit_value ? 0 : 1)<<(gpio_no - 32), 1<<(gpio_no -32),0))
+#define GPIO_DIS_OUTPUT(gpio_no)    ((gpio_no < 32) ? gpio_output_set(0,0,0, 1<<gpio_no) : gpio_output_set_high(0,0,0, 1<<(gpio_no - 32)))
+#define GPIO_INPUT_GET(gpio_no)     ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))&BIT0))
+
+/* GPIO interrupt handler, registered through gpio_intr_handler_register */
+typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
+
+/**
+  * @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
+  *        to initialize "output enables" and pin configurations for each gpio pin.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void gpio_init(void);
+
+/**
+  * @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
+  *         There is no particular ordering guaranteed; so if the order of writes is significant,
+  *         calling code should divide a single call into multiple calls.
+  *
+  * @param  uint32_t set_mask : the gpios that need high level.
+  *
+  * @param  uint32_t clear_mask : the gpios that need low level.
+  *
+  * @param  uint32_t enable_mask : the gpios that need be changed.
+  *
+  * @param  uint32_t disable_mask : the gpios that need diable output.
+  *
+  * @return None
+  */
+void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
+
+/**
+  * @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
+  *         There is no particular ordering guaranteed; so if the order of writes is significant,
+  *         calling code should divide a single call into multiple calls.
+  *
+  * @param  uint32_t set_mask : the gpios that need high level.
+  *
+  * @param  uint32_t clear_mask : the gpios that need low level.
+  *
+  * @param  uint32_t enable_mask : the gpios that need be changed.
+  *
+  * @param  uint32_t disable_mask : the gpios that need diable output.
+  *
+  * @return None
+  */
+void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
+
+/**
+  * @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
+  */
+uint32_t gpio_input_get(void);
+
+/**
+  * @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32.
+  */
+uint32_t gpio_input_get_high(void);
+
+/**
+  * @brief Register an application-specific interrupt handler for GPIO pin interrupts.
+  *        Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
+  *        Please do not call this function in SDK.
+  *
+  * @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler
+  *
+  * @param void *arg : gpio application-specific interrupt handler argument.
+  *
+  * @return None
+  */
+void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
+
+/**
+  * @brief Get gpio interrupts which happens but not processed.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
+  */
+uint32_t gpio_intr_pending(void);
+
+/**
+  * @brief Get gpio interrupts which happens but not processed.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
+  */
+uint32_t gpio_intr_pending_high(void);
+
+/**
+  * @brief Ack gpio interrupts to process pending interrupts.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
+  *
+  * @return None
+  */
+void gpio_intr_ack(uint32_t ack_mask);
+
+/**
+  * @brief Ack gpio interrupts to process pending interrupts.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
+  *
+  * @return None
+  */
+void gpio_intr_ack_high(uint32_t ack_mask);
+
+/**
+  * @brief Set GPIO to wakeup the ESP32.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t i: gpio number.
+  *
+  * @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
+  *
+  * @return None
+  */
+void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
+
+/**
+  * @brief disable GPIOs to wakeup the ESP32.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void gpio_pin_wakeup_disable(void);
+
+/**
+  * @brief set gpio input to a signal, one gpio can input to several signals.
+  *
+  * @param uint32_t gpio : gpio number, 0~0x2f
+  *                        gpio == 0x3C, input 0 to signal
+  *                        gpio == 0x3A, input nothing to signal
+  *                        gpio == 0x38, input 1 to signal
+  *
+  * @param uint32_t signal_idx : signal index.
+  *
+  * @param bool inv : the signal is inv or not
+  *
+  * @return None
+  */
+void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
+
+/**
+  * @brief set signal output to gpio, one signal can output to several gpios.
+  *
+  * @param uint32_t gpio : gpio number, 0~0x2f
+  *
+  * @param uint32_t signal_idx : signal index.
+  *                        signal_idx == 0x100, cancel output put to the gpio
+  *
+  * @param bool out_inv : the signal output is invert or not
+  *
+  * @param bool oen_inv : the signal output enable is invert or not
+  *
+  * @return None
+  */
+void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv);
+
+/**
+  * @brief Select pad as a gpio function from IOMUX.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_select_gpio(uint32_t gpio_num);
+
+/**
+  * @brief Set pad driver capability.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @param uint32_t drv : 0-3
+  *
+  * @return None
+  */
+void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
+
+/**
+  * @brief Pull up the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_pullup(uint32_t gpio_num);
+
+/**
+  * @brief Pull down the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_pulldown(uint32_t gpio_num);
+
+/**
+  * @brief Unhold the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_unhold(uint32_t gpio_num);
+
+/**
+  * @brief Hold the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_hold(uint32_t gpio_num);
+
+/**
+  * @brief enable gpio pad input.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_input_enable(uint32_t gpio_num);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_GPIO_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/hmac.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/hmac.h
new file mode 100644
index 00000000000..223fe884a3d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/hmac.h
@@ -0,0 +1,63 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_HMAC_H_
+#define _ROM_HMAC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdlib.h>
+#include "efuse.h"
+
+void ets_hmac_enable(void);
+
+void ets_hmac_disable(void);
+
+/* Use the "upstream" HMAC key (ETS_EFUSE_KEY_PURPOSE_HMAC_UP)
+   to digest a message.
+*/
+int ets_hmac_calculate_message(ets_efuse_block_t key_block, const void *message, size_t message_len, uint8_t *hmac);
+
+/* Calculate a downstream HMAC message to temporarily enable JTAG, or
+   to generate a Digital Signature data decryption key.
+
+   - purpose must be ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE
+     or ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG
+
+   - key_block must be in range ETS_EFUSE_BLOCK_KEY0 toETS_EFUSE_BLOCK_KEY6.
+     This efuse block must have the corresponding purpose set in "purpose", or
+     ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL.
+
+   The result of this HMAC calculation is only made available "downstream" to the
+   corresponding hardware module, and cannot be accessed by software.
+*/
+int ets_hmac_calculate_downstream(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose);
+
+/* Invalidate a downstream HMAC value previously calculated by ets_hmac_calculate_downstream().
+ *
+ * - purpose must match a previous call to ets_hmac_calculate_downstream().
+ *
+ * After this function is called, the corresponding internal operation (JTAG or DS) will no longer
+ * have access to the generated key.
+ */
+int ets_hmac_invalidate_downstream(ets_efuse_purpose_t purpose);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ROM_HMAC_H_
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/libc_stubs.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/libc_stubs.h
new file mode 100644
index 00000000000..df78851c1bd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/libc_stubs.h
@@ -0,0 +1,104 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ROM_LIBC_STUBS_H_
+#define _ROM_LIBC_STUBS_H_
+
+#include <sys/lock.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <reent.h>
+#include <errno.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ESP32 ROM code contains implementations of some of C library functions.
+Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall
+implementation defined in the following struct.
+
+The table itself, by default, is not allocated in RAM. A global pointer syscall_table_ptr is used to
+set the address
+
+So, before using any of the C library functions (except for pure functions and memcpy/memset functions),
+application must allocate syscall table structure for each CPU being used, and populate it with pointers
+to actual implementations of corresponding syscalls.
+*/
+
+struct syscall_stub_table
+{
+    struct _reent* (*__getreent)(void);
+    void* (*_malloc_r)(struct _reent *r, size_t);
+    void (*_free_r)(struct _reent *r, void*);
+    void* (*_realloc_r)(struct _reent *r, void*, size_t);
+    void* (*_calloc_r)(struct _reent *r, size_t, size_t);
+    void (*_abort)(void);
+    int (*_system_r)(struct _reent *r, const char*);
+    int (*_rename_r)(struct _reent *r, const char*, const char*);
+    clock_t (*_times_r)(struct _reent *r, struct tms *);
+    int (*_gettimeofday_r) (struct _reent *r, struct timeval *, void *);
+    void (*_raise_r)(struct _reent *r);
+    int (*_unlink_r)(struct _reent *r, const char*);
+    int (*_link_r)(struct _reent *r, const char*, const char*);
+    int (*_stat_r)(struct _reent *r, const char*, struct stat *);
+    int (*_fstat_r)(struct _reent *r, int, struct stat *);
+    void* (*_sbrk_r)(struct _reent *r, ptrdiff_t);
+    int (*_getpid_r)(struct _reent *r);
+    int (*_kill_r)(struct _reent *r, int, int);
+    void (*_exit_r)(struct _reent *r, int);
+    int (*_close_r)(struct _reent *r, int);
+    int (*_open_r)(struct _reent *r, const char *, int, int);
+    int (*_write_r)(struct _reent *r, int, const void *, int);
+    int (*_lseek_r)(struct _reent *r, int, int, int);
+    int (*_read_r)(struct _reent *r, int, void *, int);
+#ifdef _RETARGETABLE_LOCKING
+    void (*_retarget_lock_init)(_LOCK_T *lock);
+    void (*_retarget_lock_init_recursive)(_LOCK_T *lock);
+    void (*_retarget_lock_close)(_LOCK_T lock);
+    void (*_retarget_lock_close_recursive)(_LOCK_T lock);
+    void (*_retarget_lock_acquire)(_LOCK_T lock);
+    void (*_retarget_lock_acquire_recursive)(_LOCK_T lock);
+    int (*_retarget_lock_try_acquire)(_LOCK_T lock);
+    int (*_retarget_lock_try_acquire_recursive)(_LOCK_T lock);
+    void (*_retarget_lock_release)(_LOCK_T lock);
+    void (*_retarget_lock_release_recursive)(_LOCK_T lock);
+#else
+    void (*_lock_init)(_lock_t *lock);
+    void (*_lock_init_recursive)(_lock_t *lock);
+    void (*_lock_close)(_lock_t *lock);
+    void (*_lock_close_recursive)(_lock_t *lock);
+    void (*_lock_acquire)(_lock_t *lock);
+    void (*_lock_acquire_recursive)(_lock_t *lock);
+    int (*_lock_try_acquire)(_lock_t *lock);
+    int (*_lock_try_acquire_recursive)(_lock_t *lock);
+    void (*_lock_release)(_lock_t *lock);
+    void (*_lock_release_recursive)(_lock_t *lock);
+#endif
+    int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
+    int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
+    void (*__assert_func) (const char *file, int line, const char * func, const char *failedexpr) __attribute__((noreturn));
+    void (*__sinit) (struct _reent *r);
+    void (*_cleanup_r) (struct _reent* r);
+};
+
+extern struct syscall_stub_table *syscall_table_ptr;
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif /* _ROM_LIBC_STUBS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/lldesc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/lldesc.h
new file mode 100644
index 00000000000..d4c5d92a306
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/lldesc.h
@@ -0,0 +1,176 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_LLDESC_H_
+#define _ROM_LLDESC_H_
+
+#include <stdint.h>
+
+#include "sys/queue.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LLDESC_TX_MBLK_SIZE                 268 /* */
+#define LLDESC_RX_SMBLK_SIZE                64  /* small block size, for small mgmt frame */
+#define LLDESC_RX_MBLK_SIZE                 524 /* rx is large sinec we want to contain mgmt frame in one block*/
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_SIZE    64  /* it is a small buffer which is a cycle link*/
+#define LLDESC_RX_AMPDU_LEN_MBLK_SIZE      256 /*for ampdu entry*/
+#ifdef ESP_MAC_5
+#define LLDESC_TX_MBLK_NUM                  116  /* 64K / 256 */
+#define LLDESC_RX_MBLK_NUM                  82 /* 64K / 512 MAX 172*/
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM     4
+#define LLDESC_RX_AMPDU_LEN_MLBK_NUM       12
+#else
+#ifdef SBUF_RXTX
+#define LLDESC_TX_MBLK_NUM_MAX    (2 * 48) /* 23K / 260 - 8 */
+#define LLDESC_RX_MBLK_NUM_MAX    (2 * 48) /* 23K / 524 */
+#define LLDESC_TX_MBLK_NUM_MIN    (2 * 16) /* 23K / 260 - 8 */
+#define LLDESC_RX_MBLK_NUM_MIN    (2 * 16) /* 23K / 524 */
+#endif
+#define LLDESC_TX_MBLK_NUM      10      //(2 * 32) /* 23K / 260 - 8 */
+
+#ifdef IEEE80211_RX_AMPDU
+#define LLDESC_RX_MBLK_NUM      30
+#else
+#define LLDESC_RX_MBLK_NUM      10
+#endif /*IEEE80211_RX_AMPDU*/
+
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM  4
+#define LLDESC_RX_AMPDU_LEN_MLBK_NUM    8
+#endif /* !ESP_MAC_5 */
+/*
+ *  SLC2 DMA Desc struct, aka lldesc_t
+ *
+ * --------------------------------------------------------------
+ * | own | EoF | sub_sof | 5'b0   | length [11:0] | size [11:0] |
+ * --------------------------------------------------------------
+ * |            buf_ptr [31:0]                                  |
+ * --------------------------------------------------------------
+ * |            next_desc_ptr [31:0]                            |
+ * --------------------------------------------------------------
+ */
+
+/* this bitfield is start from the LSB!!! */
+typedef struct lldesc_s {
+    volatile uint32_t size  : 12,
+             length: 12,
+             offset: 5, /* h/w reserved 5bit, s/w use it as offset in buffer */
+             sosf  : 1, /* start of sub-frame */
+             eof   : 1, /* end of frame */
+             owner : 1; /* hw or sw */
+    volatile const uint8_t *buf;       /* point to buffer data */
+    union {
+        volatile uint32_t empty;
+        STAILQ_ENTRY(lldesc_s) qe;  /* pointing to the next desc */
+    };
+} lldesc_t;
+
+typedef struct tx_ampdu_entry_s {
+    uint32_t sub_len  : 12,
+             dili_num : 7,
+             : 1,
+             null_byte: 2,
+             data     : 1,
+             enc      : 1,
+             seq      : 8;
+} tx_ampdu_entry_t;
+
+typedef struct lldesc_chain_s {
+    lldesc_t *head;
+    lldesc_t *tail;
+} lldesc_chain_t;
+
+#ifdef SBUF_RXTX
+enum sbuf_mask_s  {
+    SBUF_MOVE_NO = 0,
+    SBUF_MOVE_TX2RX,
+    SBUF_MOVE_RX2TX,
+} ;
+
+#define SBUF_MOVE_STEP 8
+#endif
+#define LLDESC_SIZE  sizeof(struct lldesc_s)
+
+/* SLC Descriptor  */
+#define LLDESC_OWNER_MASK                  0x80000000
+#define LLDESC_OWNER_SHIFT                         31
+#define LLDESC_SW_OWNED                             0
+#define LLDESC_HW_OWNED                             1
+
+#define LLDESC_EOF_MASK                    0x40000000
+#define LLDESC_EOF_SHIFT                           30
+
+#define LLDESC_SOSF_MASK                   0x20000000
+#define LLDESC_SOSF_SHIFT                          29
+
+#define LLDESC_LENGTH_MASK                 0x00fff000
+#define LLDESC_LENGTH_SHIFT                        12
+
+#define LLDESC_SIZE_MASK                   0x00000fff
+#define LLDESC_SIZE_SHIFT                           0
+
+#define LLDESC_ADDR_MASK                    0x000fffff
+
+void lldesc_build_chain(uint8_t *descptr, uint32_t desclen, uint8_t *mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
+                        lldesc_t **head,
+#ifdef TO_HOST_RESTART
+                        lldesc_t **one_before_tail,
+#endif
+                        lldesc_t **tail);
+
+lldesc_t *lldesc_num2link(lldesc_t *head, uint16_t nblks);
+
+lldesc_t *lldesc_set_owner(lldesc_t *head, uint16_t nblks, uint8_t owner);
+
+static inline uint32_t lldesc_get_chain_length(lldesc_t *head)
+{
+    lldesc_t *ds = head;
+    uint32_t len = 0;
+
+    while (ds) {
+        len += ds->length;
+        ds = STAILQ_NEXT(ds, qe);
+    }
+
+    return len;
+}
+
+static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t len)
+{
+    ds->owner  = owner;
+    ds->eof    = eof;
+    ds->sosf   = sosf;
+    ds->length = len;
+}
+
+#define LLDESC_CONFIG(_desc, _owner, _eof, _sosf, _len)        do { \
+        (_desc)->owner  = (_owner); \
+        (_desc)->eof    = (_eof);   \
+        (_desc)->sosf   = (_sosf);  \
+        (_desc)->length = (_len);   \
+} while(0)
+
+#define LLDESC_FROM_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
+
+#define LLDESC_MAC_RX_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, (ds)->size)
+
+#define LLDESC_TO_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_LLDESC_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/md5_hash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/md5_hash.h
new file mode 100644
index 00000000000..63ce15857b5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/md5_hash.h
@@ -0,0 +1,38 @@
+/*
+ * MD5 internal definitions
+ * Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Alternatively, this software may be distributed under the terms of BSD
+ * license.
+ *
+ * See README and COPYING for more details.
+ */
+
+#ifndef _ROM_MD5_HASH_H_
+#define _ROM_MD5_HASH_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct MD5Context {
+    uint32_t buf[4];
+    uint32_t bits[2];
+    uint8_t in[64];
+};
+
+void MD5Init(struct MD5Context *context);
+void MD5Update(struct MD5Context *context, unsigned char const *buf, unsigned len);
+void MD5Final(unsigned char digest[16], struct MD5Context *context);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_MD5_HASH_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/miniz.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/miniz.h
new file mode 100644
index 00000000000..4c8cb7a421d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/miniz.h
@@ -0,0 +1,760 @@
+#ifndef MINIZ_HEADER_INCLUDED
+#define MINIZ_HEADER_INCLUDED
+
+#include <stdlib.h>
+
+// Defines to completely disable specific portions of miniz.c:
+// If all macros here are defined the only functionality remaining will be CRC-32, adler-32, tinfl, and tdefl.
+
+// Define MINIZ_NO_STDIO to disable all usage and any functions which rely on stdio for file I/O.
+#define MINIZ_NO_STDIO
+
+// If MINIZ_NO_TIME is specified then the ZIP archive functions will not be able to get the current time, or
+// get/set file times, and the C run-time funcs that get/set times won't be called.
+// The current downside is the times written to your archives will be from 1979.
+#define MINIZ_NO_TIME
+
+// Define MINIZ_NO_ARCHIVE_APIS to disable all ZIP archive API's.
+#define MINIZ_NO_ARCHIVE_APIS
+
+// Define MINIZ_NO_ARCHIVE_APIS to disable all writing related ZIP archive API's.
+#define MINIZ_NO_ARCHIVE_WRITING_APIS
+
+// Define MINIZ_NO_ZLIB_APIS to remove all ZLIB-style compression/decompression API's.
+#define MINIZ_NO_ZLIB_APIS
+
+// Define MINIZ_NO_ZLIB_COMPATIBLE_NAME to disable zlib names, to prevent conflicts against stock zlib.
+#define MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+
+// Define MINIZ_NO_MALLOC to disable all calls to malloc, free, and realloc.
+// Note if MINIZ_NO_MALLOC is defined then the user must always provide custom user alloc/free/realloc
+// callbacks to the zlib and archive API's, and a few stand-alone helper API's which don't provide custom user
+// functions (such as tdefl_compress_mem_to_heap() and tinfl_decompress_mem_to_heap()) won't work.
+#define MINIZ_NO_MALLOC
+
+#if defined(__TINYC__) && (defined(__linux) || defined(__linux__))
+// TODO: Work around "error: include file 'sys\utime.h' when compiling with tcc on Linux
+#define MINIZ_NO_TIME
+#endif
+
+#if !defined(MINIZ_NO_TIME) && !defined(MINIZ_NO_ARCHIVE_APIS)
+#include <time.h>
+#endif
+
+//Hardcoded options for Xtensa - JD
+#define MINIZ_X86_OR_X64_CPU 0
+#define MINIZ_LITTLE_ENDIAN 1
+#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 0
+#define MINIZ_HAS_64BIT_REGISTERS 0
+#define TINFL_USE_64BIT_BITBUF 0
+
+
+#if defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || defined(__i386) || defined(__i486__) || defined(__i486) || defined(i386) || defined(__ia64__) || defined(__x86_64__)
+// MINIZ_X86_OR_X64_CPU is only used to help set the below macros.
+#define MINIZ_X86_OR_X64_CPU 1
+#endif
+
+#if (__BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) || MINIZ_X86_OR_X64_CPU
+// Set MINIZ_LITTLE_ENDIAN to 1 if the processor is little endian.
+#define MINIZ_LITTLE_ENDIAN 1
+#endif
+
+#if MINIZ_X86_OR_X64_CPU
+// Set MINIZ_USE_UNALIGNED_LOADS_AND_STORES to 1 on CPU's that permit efficient integer loads and stores from unaligned addresses.
+#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 1
+#endif
+
+#if defined(_M_X64) || defined(_WIN64) || defined(__MINGW64__) || defined(_LP64) || defined(__LP64__) || defined(__ia64__) || defined(__x86_64__)
+// Set MINIZ_HAS_64BIT_REGISTERS to 1 if operations on 64-bit integers are reasonably fast (and don't involve compiler generated calls to helper functions).
+#define MINIZ_HAS_64BIT_REGISTERS 1
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ------------------- zlib-style API Definitions.
+
+// For more compatibility with zlib, miniz.c uses unsigned long for some parameters/struct members. Beware: mz_ulong can be either 32 or 64-bits!
+typedef unsigned long mz_ulong;
+
+// mz_free() internally uses the MZ_FREE() macro (which by default calls free() unless you've modified the MZ_MALLOC macro) to release a block allocated from the heap.
+void mz_free(void *p);
+
+#define MZ_ADLER32_INIT (1)
+// mz_adler32() returns the initial adler-32 value to use when called with ptr==NULL.
+mz_ulong mz_adler32(mz_ulong adler, const unsigned char *ptr, size_t buf_len);
+
+#define MZ_CRC32_INIT (0)
+// mz_crc32() returns the initial CRC-32 value to use when called with ptr==NULL.
+mz_ulong mz_crc32(mz_ulong crc, const unsigned char *ptr, size_t buf_len);
+
+// Compression strategies.
+enum { MZ_DEFAULT_STRATEGY = 0, MZ_FILTERED = 1, MZ_HUFFMAN_ONLY = 2, MZ_RLE = 3, MZ_FIXED = 4 };
+
+// Method
+#define MZ_DEFLATED 8
+
+#ifndef MINIZ_NO_ZLIB_APIS
+
+// Heap allocation callbacks.
+// Note that mz_alloc_func parameter types purpsosely differ from zlib's: items/size is size_t, not unsigned long.
+typedef void *(*mz_alloc_func)(void *opaque, size_t items, size_t size);
+typedef void (*mz_free_func)(void *opaque, void *address);
+typedef void *(*mz_realloc_func)(void *opaque, void *address, size_t items, size_t size);
+
+#define MZ_VERSION          "9.1.15"
+#define MZ_VERNUM           0x91F0
+#define MZ_VER_MAJOR        9
+#define MZ_VER_MINOR        1
+#define MZ_VER_REVISION     15
+#define MZ_VER_SUBREVISION  0
+
+// Flush values. For typical usage you only need MZ_NO_FLUSH and MZ_FINISH. The other values are for advanced use (refer to the zlib docs).
+enum { MZ_NO_FLUSH = 0, MZ_PARTIAL_FLUSH = 1, MZ_SYNC_FLUSH = 2, MZ_FULL_FLUSH = 3, MZ_FINISH = 4, MZ_BLOCK = 5 };
+
+// Return status codes. MZ_PARAM_ERROR is non-standard.
+enum { MZ_OK = 0, MZ_STREAM_END = 1, MZ_NEED_DICT = 2, MZ_ERRNO = -1, MZ_STREAM_ERROR = -2, MZ_DATA_ERROR = -3, MZ_MEM_ERROR = -4, MZ_BUF_ERROR = -5, MZ_VERSION_ERROR = -6, MZ_PARAM_ERROR = -10000 };
+
+// Compression levels: 0-9 are the standard zlib-style levels, 10 is best possible compression (not zlib compatible, and may be very slow), MZ_DEFAULT_COMPRESSION=MZ_DEFAULT_LEVEL.
+enum { MZ_NO_COMPRESSION = 0, MZ_BEST_SPEED = 1, MZ_BEST_COMPRESSION = 9, MZ_UBER_COMPRESSION = 10, MZ_DEFAULT_LEVEL = 6, MZ_DEFAULT_COMPRESSION = -1 };
+
+// Window bits
+#define MZ_DEFAULT_WINDOW_BITS 15
+
+struct mz_internal_state;
+
+// Compression/decompression stream struct.
+typedef struct mz_stream_s {
+    const unsigned char *next_in;     // pointer to next byte to read
+    unsigned int avail_in;            // number of bytes available at next_in
+    mz_ulong total_in;                // total number of bytes consumed so far
+
+    unsigned char *next_out;          // pointer to next byte to write
+    unsigned int avail_out;           // number of bytes that can be written to next_out
+    mz_ulong total_out;               // total number of bytes produced so far
+
+    char *msg;                        // error msg (unused)
+    struct mz_internal_state *state;  // internal state, allocated by zalloc/zfree
+
+    mz_alloc_func zalloc;             // optional heap allocation function (defaults to malloc)
+    mz_free_func zfree;               // optional heap free function (defaults to free)
+    void *opaque;                     // heap alloc function user pointer
+
+    int data_type;                    // data_type (unused)
+    mz_ulong adler;                   // adler32 of the source or uncompressed data
+    mz_ulong reserved;                // not used
+} mz_stream;
+
+typedef mz_stream *mz_streamp;
+
+// Returns the version string of miniz.c.
+const char *mz_version(void);
+
+// mz_deflateInit() initializes a compressor with default options:
+// Parameters:
+//  pStream must point to an initialized mz_stream struct.
+//  level must be between [MZ_NO_COMPRESSION, MZ_BEST_COMPRESSION].
+//  level 1 enables a specially optimized compression function that's been optimized purely for performance, not ratio.
+//  (This special func. is currently only enabled when MINIZ_USE_UNALIGNED_LOADS_AND_STORES and MINIZ_LITTLE_ENDIAN are defined.)
+// Return values:
+//  MZ_OK on success.
+//  MZ_STREAM_ERROR if the stream is bogus.
+//  MZ_PARAM_ERROR if the input parameters are bogus.
+//  MZ_MEM_ERROR on out of memory.
+int mz_deflateInit(mz_streamp pStream, int level);
+
+// mz_deflateInit2() is like mz_deflate(), except with more control:
+// Additional parameters:
+//   method must be MZ_DEFLATED
+//   window_bits must be MZ_DEFAULT_WINDOW_BITS (to wrap the deflate stream with zlib header/adler-32 footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate/no header or footer)
+//   mem_level must be between [1, 9] (it's checked but ignored by miniz.c)
+int mz_deflateInit2(mz_streamp pStream, int level, int method, int window_bits, int mem_level, int strategy);
+
+// Quickly resets a compressor without having to reallocate anything. Same as calling mz_deflateEnd() followed by mz_deflateInit()/mz_deflateInit2().
+int mz_deflateReset(mz_streamp pStream);
+
+// mz_deflate() compresses the input to output, consuming as much of the input and producing as much output as possible.
+// Parameters:
+//   pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
+//   flush may be MZ_NO_FLUSH, MZ_PARTIAL_FLUSH/MZ_SYNC_FLUSH, MZ_FULL_FLUSH, or MZ_FINISH.
+// Return values:
+//   MZ_OK on success (when flushing, or if more input is needed but not available, and/or there's more output to be written but the output buffer is full).
+//   MZ_STREAM_END if all input has been consumed and all output bytes have been written. Don't call mz_deflate() on the stream anymore.
+//   MZ_STREAM_ERROR if the stream is bogus.
+//   MZ_PARAM_ERROR if one of the parameters is invalid.
+//   MZ_BUF_ERROR if no forward progress is possible because the input and/or output buffers are empty. (Fill up the input buffer or free up some output space and try again.)
+int mz_deflate(mz_streamp pStream, int flush);
+
+// mz_deflateEnd() deinitializes a compressor:
+// Return values:
+//  MZ_OK on success.
+//  MZ_STREAM_ERROR if the stream is bogus.
+int mz_deflateEnd(mz_streamp pStream);
+
+// mz_deflateBound() returns a (very) conservative upper bound on the amount of data that could be generated by deflate(), assuming flush is set to only MZ_NO_FLUSH or MZ_FINISH.
+mz_ulong mz_deflateBound(mz_streamp pStream, mz_ulong source_len);
+
+// Single-call compression functions mz_compress() and mz_compress2():
+// Returns MZ_OK on success, or one of the error codes from mz_deflate() on failure.
+int mz_compress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
+int mz_compress2(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len, int level);
+
+// mz_compressBound() returns a (very) conservative upper bound on the amount of data that could be generated by calling mz_compress().
+mz_ulong mz_compressBound(mz_ulong source_len);
+
+// Initializes a decompressor.
+int mz_inflateInit(mz_streamp pStream);
+
+// mz_inflateInit2() is like mz_inflateInit() with an additional option that controls the window size and whether or not the stream has been wrapped with a zlib header/footer:
+// window_bits must be MZ_DEFAULT_WINDOW_BITS (to parse zlib header/footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate).
+int mz_inflateInit2(mz_streamp pStream, int window_bits);
+
+// Decompresses the input stream to the output, consuming only as much of the input as needed, and writing as much to the output as possible.
+// Parameters:
+//   pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
+//   flush may be MZ_NO_FLUSH, MZ_SYNC_FLUSH, or MZ_FINISH.
+//   On the first call, if flush is MZ_FINISH it's assumed the input and output buffers are both sized large enough to decompress the entire stream in a single call (this is slightly faster).
+//   MZ_FINISH implies that there are no more source bytes available beside what's already in the input buffer, and that the output buffer is large enough to hold the rest of the decompressed data.
+// Return values:
+//   MZ_OK on success. Either more input is needed but not available, and/or there's more output to be written but the output buffer is full.
+//   MZ_STREAM_END if all needed input has been consumed and all output bytes have been written. For zlib streams, the adler-32 of the decompressed data has also been verified.
+//   MZ_STREAM_ERROR if the stream is bogus.
+//   MZ_DATA_ERROR if the deflate stream is invalid.
+//   MZ_PARAM_ERROR if one of the parameters is invalid.
+//   MZ_BUF_ERROR if no forward progress is possible because the input buffer is empty but the inflater needs more input to continue, or if the output buffer is not large enough. Call mz_inflate() again
+//   with more input data, or with more room in the output buffer (except when using single call decompression, described above).
+int mz_inflate(mz_streamp pStream, int flush);
+
+// Deinitializes a decompressor.
+int mz_inflateEnd(mz_streamp pStream);
+
+// Single-call decompression.
+// Returns MZ_OK on success, or one of the error codes from mz_inflate() on failure.
+int mz_uncompress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
+
+// Returns a string description of the specified error code, or NULL if the error code is invalid.
+const char *mz_error(int err);
+
+// Redefine zlib-compatible names to miniz equivalents, so miniz.c can be used as a drop-in replacement for the subset of zlib that miniz.c supports.
+// Define MINIZ_NO_ZLIB_COMPATIBLE_NAMES to disable zlib-compatibility if you use zlib in the same project.
+#ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+typedef unsigned char Byte;
+typedef unsigned int uInt;
+typedef mz_ulong uLong;
+typedef Byte Bytef;
+typedef uInt uIntf;
+typedef char charf;
+typedef int intf;
+typedef void *voidpf;
+typedef uLong uLongf;
+typedef void *voidp;
+typedef void *const voidpc;
+#define Z_NULL                0
+#define Z_NO_FLUSH            MZ_NO_FLUSH
+#define Z_PARTIAL_FLUSH       MZ_PARTIAL_FLUSH
+#define Z_SYNC_FLUSH          MZ_SYNC_FLUSH
+#define Z_FULL_FLUSH          MZ_FULL_FLUSH
+#define Z_FINISH              MZ_FINISH
+#define Z_BLOCK               MZ_BLOCK
+#define Z_OK                  MZ_OK
+#define Z_STREAM_END          MZ_STREAM_END
+#define Z_NEED_DICT           MZ_NEED_DICT
+#define Z_ERRNO               MZ_ERRNO
+#define Z_STREAM_ERROR        MZ_STREAM_ERROR
+#define Z_DATA_ERROR          MZ_DATA_ERROR
+#define Z_MEM_ERROR           MZ_MEM_ERROR
+#define Z_BUF_ERROR           MZ_BUF_ERROR
+#define Z_VERSION_ERROR       MZ_VERSION_ERROR
+#define Z_PARAM_ERROR         MZ_PARAM_ERROR
+#define Z_NO_COMPRESSION      MZ_NO_COMPRESSION
+#define Z_BEST_SPEED          MZ_BEST_SPEED
+#define Z_BEST_COMPRESSION    MZ_BEST_COMPRESSION
+#define Z_DEFAULT_COMPRESSION MZ_DEFAULT_COMPRESSION
+#define Z_DEFAULT_STRATEGY    MZ_DEFAULT_STRATEGY
+#define Z_FILTERED            MZ_FILTERED
+#define Z_HUFFMAN_ONLY        MZ_HUFFMAN_ONLY
+#define Z_RLE                 MZ_RLE
+#define Z_FIXED               MZ_FIXED
+#define Z_DEFLATED            MZ_DEFLATED
+#define Z_DEFAULT_WINDOW_BITS MZ_DEFAULT_WINDOW_BITS
+#define alloc_func            mz_alloc_func
+#define free_func             mz_free_func
+#define internal_state        mz_internal_state
+#define z_stream              mz_stream
+#define deflateInit           mz_deflateInit
+#define deflateInit2          mz_deflateInit2
+#define deflateReset          mz_deflateReset
+#define deflate               mz_deflate
+#define deflateEnd            mz_deflateEnd
+#define deflateBound          mz_deflateBound
+#define compress              mz_compress
+#define compress2             mz_compress2
+#define compressBound         mz_compressBound
+#define inflateInit           mz_inflateInit
+#define inflateInit2          mz_inflateInit2
+#define inflate               mz_inflate
+#define inflateEnd            mz_inflateEnd
+#define uncompress            mz_uncompress
+#define crc32                 mz_crc32
+#define adler32               mz_adler32
+#define MAX_WBITS             15
+#define MAX_MEM_LEVEL         9
+#define zError                mz_error
+#define ZLIB_VERSION          MZ_VERSION
+#define ZLIB_VERNUM           MZ_VERNUM
+#define ZLIB_VER_MAJOR        MZ_VER_MAJOR
+#define ZLIB_VER_MINOR        MZ_VER_MINOR
+#define ZLIB_VER_REVISION     MZ_VER_REVISION
+#define ZLIB_VER_SUBREVISION  MZ_VER_SUBREVISION
+#define zlibVersion           mz_version
+#define zlib_version          mz_version()
+#endif // #ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+
+#endif // MINIZ_NO_ZLIB_APIS
+
+// ------------------- Types and macros
+
+typedef unsigned char mz_uint8;
+typedef signed short mz_int16;
+typedef unsigned short mz_uint16;
+typedef unsigned int mz_uint32;
+typedef unsigned int mz_uint;
+typedef long long mz_int64;
+typedef unsigned long long mz_uint64;
+typedef int mz_bool;
+
+#define MZ_FALSE (0)
+#define MZ_TRUE (1)
+
+// An attempt to work around MSVC's spammy "warning C4127: conditional expression is constant" message.
+#ifdef _MSC_VER
+#define MZ_MACRO_END while (0, 0)
+#else
+#define MZ_MACRO_END while (0)
+#endif
+
+// ------------------- ZIP archive reading/writing
+
+#ifndef MINIZ_NO_ARCHIVE_APIS
+
+enum {
+    MZ_ZIP_MAX_IO_BUF_SIZE = 64 * 1024,
+    MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE = 260,
+    MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE = 256
+};
+
+typedef struct {
+    mz_uint32 m_file_index;
+    mz_uint32 m_central_dir_ofs;
+    mz_uint16 m_version_made_by;
+    mz_uint16 m_version_needed;
+    mz_uint16 m_bit_flag;
+    mz_uint16 m_method;
+#ifndef MINIZ_NO_TIME
+    time_t m_time;
+#endif
+    mz_uint32 m_crc32;
+    mz_uint64 m_comp_size;
+    mz_uint64 m_uncomp_size;
+    mz_uint16 m_internal_attr;
+    mz_uint32 m_external_attr;
+    mz_uint64 m_local_header_ofs;
+    mz_uint32 m_comment_size;
+    char m_filename[MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE];
+    char m_comment[MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE];
+} mz_zip_archive_file_stat;
+
+typedef size_t (*mz_file_read_func)(void *pOpaque, mz_uint64 file_ofs, void *pBuf, size_t n);
+typedef size_t (*mz_file_write_func)(void *pOpaque, mz_uint64 file_ofs, const void *pBuf, size_t n);
+
+struct mz_zip_internal_state_tag;
+typedef struct mz_zip_internal_state_tag mz_zip_internal_state;
+
+typedef enum {
+    MZ_ZIP_MODE_INVALID = 0,
+    MZ_ZIP_MODE_READING = 1,
+    MZ_ZIP_MODE_WRITING = 2,
+    MZ_ZIP_MODE_WRITING_HAS_BEEN_FINALIZED = 3
+} mz_zip_mode;
+
+typedef struct mz_zip_archive_tag {
+    mz_uint64 m_archive_size;
+    mz_uint64 m_central_directory_file_ofs;
+    mz_uint m_total_files;
+    mz_zip_mode m_zip_mode;
+
+    mz_uint m_file_offset_alignment;
+
+    mz_alloc_func m_pAlloc;
+    mz_free_func m_pFree;
+    mz_realloc_func m_pRealloc;
+    void *m_pAlloc_opaque;
+
+    mz_file_read_func m_pRead;
+    mz_file_write_func m_pWrite;
+    void *m_pIO_opaque;
+
+    mz_zip_internal_state *m_pState;
+
+} mz_zip_archive;
+
+typedef enum {
+    MZ_ZIP_FLAG_CASE_SENSITIVE                = 0x0100,
+    MZ_ZIP_FLAG_IGNORE_PATH                   = 0x0200,
+    MZ_ZIP_FLAG_COMPRESSED_DATA               = 0x0400,
+    MZ_ZIP_FLAG_DO_NOT_SORT_CENTRAL_DIRECTORY = 0x0800
+} mz_zip_flags;
+
+// ZIP archive reading
+
+// Inits a ZIP archive reader.
+// These functions read and validate the archive's central directory.
+mz_bool mz_zip_reader_init(mz_zip_archive *pZip, mz_uint64 size, mz_uint32 flags);
+mz_bool mz_zip_reader_init_mem(mz_zip_archive *pZip, const void *pMem, size_t size, mz_uint32 flags);
+
+#ifndef MINIZ_NO_STDIO
+mz_bool mz_zip_reader_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint32 flags);
+#endif
+
+// Returns the total number of files in the archive.
+mz_uint mz_zip_reader_get_num_files(mz_zip_archive *pZip);
+
+// Returns detailed information about an archive file entry.
+mz_bool mz_zip_reader_file_stat(mz_zip_archive *pZip, mz_uint file_index, mz_zip_archive_file_stat *pStat);
+
+// Determines if an archive file entry is a directory entry.
+mz_bool mz_zip_reader_is_file_a_directory(mz_zip_archive *pZip, mz_uint file_index);
+mz_bool mz_zip_reader_is_file_encrypted(mz_zip_archive *pZip, mz_uint file_index);
+
+// Retrieves the filename of an archive file entry.
+// Returns the number of bytes written to pFilename, or if filename_buf_size is 0 this function returns the number of bytes needed to fully store the filename.
+mz_uint mz_zip_reader_get_filename(mz_zip_archive *pZip, mz_uint file_index, char *pFilename, mz_uint filename_buf_size);
+
+// Attempts to locates a file in the archive's central directory.
+// Valid flags: MZ_ZIP_FLAG_CASE_SENSITIVE, MZ_ZIP_FLAG_IGNORE_PATH
+// Returns -1 if the file cannot be found.
+int mz_zip_reader_locate_file(mz_zip_archive *pZip, const char *pName, const char *pComment, mz_uint flags);
+
+// Extracts a archive file to a memory buffer using no memory allocation.
+mz_bool mz_zip_reader_extract_to_mem_no_alloc(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
+mz_bool mz_zip_reader_extract_file_to_mem_no_alloc(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
+
+// Extracts a archive file to a memory buffer.
+mz_bool mz_zip_reader_extract_to_mem(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_mem(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags);
+
+// Extracts a archive file to a dynamically allocated heap buffer.
+void *mz_zip_reader_extract_to_heap(mz_zip_archive *pZip, mz_uint file_index, size_t *pSize, mz_uint flags);
+void *mz_zip_reader_extract_file_to_heap(mz_zip_archive *pZip, const char *pFilename, size_t *pSize, mz_uint flags);
+
+// Extracts a archive file using a callback function to output the file's data.
+mz_bool mz_zip_reader_extract_to_callback(mz_zip_archive *pZip, mz_uint file_index, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_callback(mz_zip_archive *pZip, const char *pFilename, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
+
+#ifndef MINIZ_NO_STDIO
+// Extracts a archive file to a disk file and sets its last accessed and modified times.
+// This function only extracts files, not archive directory records.
+mz_bool mz_zip_reader_extract_to_file(mz_zip_archive *pZip, mz_uint file_index, const char *pDst_filename, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_file(mz_zip_archive *pZip, const char *pArchive_filename, const char *pDst_filename, mz_uint flags);
+#endif
+
+// Ends archive reading, freeing all allocations, and closing the input archive file if mz_zip_reader_init_file() was used.
+mz_bool mz_zip_reader_end(mz_zip_archive *pZip);
+
+// ZIP archive writing
+
+#ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
+
+// Inits a ZIP archive writer.
+mz_bool mz_zip_writer_init(mz_zip_archive *pZip, mz_uint64 existing_size);
+mz_bool mz_zip_writer_init_heap(mz_zip_archive *pZip, size_t size_to_reserve_at_beginning, size_t initial_allocation_size);
+
+#ifndef MINIZ_NO_STDIO
+mz_bool mz_zip_writer_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint64 size_to_reserve_at_beginning);
+#endif
+
+// Converts a ZIP archive reader object into a writer object, to allow efficient in-place file appends to occur on an existing archive.
+// For archives opened using mz_zip_reader_init_file, pFilename must be the archive's filename so it can be reopened for writing. If the file can't be reopened, mz_zip_reader_end() will be called.
+// For archives opened using mz_zip_reader_init_mem, the memory block must be growable using the realloc callback (which defaults to realloc unless you've overridden it).
+// Finally, for archives opened using mz_zip_reader_init, the mz_zip_archive's user provided m_pWrite function cannot be NULL.
+// Note: In-place archive modification is not recommended unless you know what you're doing, because if execution stops or something goes wrong before
+// the archive is finalized the file's central directory will be hosed.
+mz_bool mz_zip_writer_init_from_reader(mz_zip_archive *pZip, const char *pFilename);
+
+// Adds the contents of a memory buffer to an archive. These functions record the current local time into the archive.
+// To add a directory entry, call this method with an archive name ending in a forwardslash with empty buffer.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_writer_add_mem(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, mz_uint level_and_flags);
+mz_bool mz_zip_writer_add_mem_ex(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags, mz_uint64 uncomp_size, mz_uint32 uncomp_crc32);
+
+#ifndef MINIZ_NO_STDIO
+// Adds the contents of a disk file to an archive. This function also records the disk file's modified time into the archive.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_writer_add_file(mz_zip_archive *pZip, const char *pArchive_name, const char *pSrc_filename, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
+#endif
+
+// Adds a file to an archive by fully cloning the data from another archive.
+// This function fully clones the source file's compressed data (no recompression), along with its full filename, extra data, and comment fields.
+mz_bool mz_zip_writer_add_from_zip_reader(mz_zip_archive *pZip, mz_zip_archive *pSource_zip, mz_uint file_index);
+
+// Finalizes the archive by writing the central directory records followed by the end of central directory record.
+// After an archive is finalized, the only valid call on the mz_zip_archive struct is mz_zip_writer_end().
+// An archive must be manually finalized by calling this function for it to be valid.
+mz_bool mz_zip_writer_finalize_archive(mz_zip_archive *pZip);
+mz_bool mz_zip_writer_finalize_heap_archive(mz_zip_archive *pZip, void **pBuf, size_t *pSize);
+
+// Ends archive writing, freeing all allocations, and closing the output file if mz_zip_writer_init_file() was used.
+// Note for the archive to be valid, it must have been finalized before ending.
+mz_bool mz_zip_writer_end(mz_zip_archive *pZip);
+
+// Misc. high-level helper functions:
+
+// mz_zip_add_mem_to_archive_file_in_place() efficiently (but not atomically) appends a memory blob to a ZIP archive.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_add_mem_to_archive_file_in_place(const char *pZip_filename, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
+
+// Reads a single file from an archive into a heap block.
+// Returns NULL on failure.
+void *mz_zip_extract_archive_file_to_heap(const char *pZip_filename, const char *pArchive_name, size_t *pSize, mz_uint zip_flags);
+
+#endif // #ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
+
+#endif // #ifndef MINIZ_NO_ARCHIVE_APIS
+
+// ------------------- Low-level Decompression API Definitions
+
+// Decompression flags used by tinfl_decompress().
+// TINFL_FLAG_PARSE_ZLIB_HEADER: If set, the input has a valid zlib header and ends with an adler32 checksum (it's a valid zlib stream). Otherwise, the input is a raw deflate stream.
+// TINFL_FLAG_HAS_MORE_INPUT: If set, there are more input bytes available beyond the end of the supplied input buffer. If clear, the input buffer contains all remaining input.
+// TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF: If set, the output buffer is large enough to hold the entire decompressed stream. If clear, the output buffer is at least the size of the dictionary (typically 32KB).
+// TINFL_FLAG_COMPUTE_ADLER32: Force adler-32 checksum computation of the decompressed bytes.
+enum {
+    TINFL_FLAG_PARSE_ZLIB_HEADER = 1,
+    TINFL_FLAG_HAS_MORE_INPUT = 2,
+    TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF = 4,
+    TINFL_FLAG_COMPUTE_ADLER32 = 8
+};
+
+// High level decompression functions:
+// tinfl_decompress_mem_to_heap() decompresses a block in memory to a heap block allocated via malloc().
+// On entry:
+//  pSrc_buf, src_buf_len: Pointer and size of the Deflate or zlib source data to decompress.
+// On return:
+//  Function returns a pointer to the decompressed data, or NULL on failure.
+//  *pOut_len will be set to the decompressed data's size, which could be larger than src_buf_len on uncompressible data.
+//  The caller must call mz_free() on the returned block when it's no longer needed.
+void *tinfl_decompress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
+
+// tinfl_decompress_mem_to_mem() decompresses a block in memory to another block in memory.
+// Returns TINFL_DECOMPRESS_MEM_TO_MEM_FAILED on failure, or the number of bytes written on success.
+#define TINFL_DECOMPRESS_MEM_TO_MEM_FAILED ((size_t)(-1))
+size_t tinfl_decompress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
+
+// tinfl_decompress_mem_to_callback() decompresses a block in memory to an internal 32KB buffer, and a user provided callback function will be called to flush the buffer.
+// Returns 1 on success or 0 on failure.
+typedef int (*tinfl_put_buf_func_ptr)(const void *pBuf, int len, void *pUser);
+int tinfl_decompress_mem_to_callback(const void *pIn_buf, size_t *pIn_buf_size, tinfl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+struct tinfl_decompressor_tag; typedef struct tinfl_decompressor_tag tinfl_decompressor;
+
+// Max size of LZ dictionary.
+#define TINFL_LZ_DICT_SIZE 32768
+
+// Return status.
+typedef enum {
+    TINFL_STATUS_BAD_PARAM = -3,
+    TINFL_STATUS_ADLER32_MISMATCH = -2,
+    TINFL_STATUS_FAILED = -1,
+    TINFL_STATUS_DONE = 0,
+    TINFL_STATUS_NEEDS_MORE_INPUT = 1,
+    TINFL_STATUS_HAS_MORE_OUTPUT = 2
+} tinfl_status;
+
+// Initializes the decompressor to its initial state.
+#define tinfl_init(r) do { (r)->m_state = 0; } MZ_MACRO_END
+#define tinfl_get_adler32(r) (r)->m_check_adler32
+
+// Main low-level decompressor coroutine function. This is the only function actually needed for decompression. All the other functions are just high-level helpers for improved usability.
+// This is a universal API, i.e. it can be used as a building block to build any desired higher level decompression API. In the limit case, it can be called once per every byte input or output.
+tinfl_status tinfl_decompress(tinfl_decompressor *r, const mz_uint8 *pIn_buf_next, size_t *pIn_buf_size, mz_uint8 *pOut_buf_start, mz_uint8 *pOut_buf_next, size_t *pOut_buf_size, const mz_uint32 decomp_flags);
+
+// Internal/private bits follow.
+enum {
+    TINFL_MAX_HUFF_TABLES = 3, TINFL_MAX_HUFF_SYMBOLS_0 = 288, TINFL_MAX_HUFF_SYMBOLS_1 = 32, TINFL_MAX_HUFF_SYMBOLS_2 = 19,
+    TINFL_FAST_LOOKUP_BITS = 10, TINFL_FAST_LOOKUP_SIZE = 1 << TINFL_FAST_LOOKUP_BITS
+};
+
+typedef struct {
+    mz_uint8 m_code_size[TINFL_MAX_HUFF_SYMBOLS_0];
+    mz_int16 m_look_up[TINFL_FAST_LOOKUP_SIZE], m_tree[TINFL_MAX_HUFF_SYMBOLS_0 * 2];
+} tinfl_huff_table;
+
+#if MINIZ_HAS_64BIT_REGISTERS
+#define TINFL_USE_64BIT_BITBUF 1
+#endif
+
+#if TINFL_USE_64BIT_BITBUF
+typedef mz_uint64 tinfl_bit_buf_t;
+#define TINFL_BITBUF_SIZE (64)
+#else
+typedef mz_uint32 tinfl_bit_buf_t;
+#define TINFL_BITBUF_SIZE (32)
+#endif
+
+struct tinfl_decompressor_tag {
+    mz_uint32 m_state, m_num_bits, m_zhdr0, m_zhdr1, m_z_adler32, m_final, m_type, m_check_adler32, m_dist, m_counter, m_num_extra, m_table_sizes[TINFL_MAX_HUFF_TABLES];
+    tinfl_bit_buf_t m_bit_buf;
+    size_t m_dist_from_out_buf_start;
+    tinfl_huff_table m_tables[TINFL_MAX_HUFF_TABLES];
+    mz_uint8 m_raw_header[4], m_len_codes[TINFL_MAX_HUFF_SYMBOLS_0 + TINFL_MAX_HUFF_SYMBOLS_1 + 137];
+};
+
+// ------------------- Low-level Compression API Definitions
+
+// Set TDEFL_LESS_MEMORY to 1 to use less memory (compression will be slightly slower, and raw/dynamic blocks will be output more frequently).
+#define TDEFL_LESS_MEMORY 1
+
+// tdefl_init() compression flags logically OR'd together (low 12 bits contain the max. number of probes per dictionary search):
+// TDEFL_DEFAULT_MAX_PROBES: The compressor defaults to 128 dictionary probes per dictionary search. 0=Huffman only, 1=Huffman+LZ (fastest/crap compression), 4095=Huffman+LZ (slowest/best compression).
+enum {
+    TDEFL_HUFFMAN_ONLY = 0, TDEFL_DEFAULT_MAX_PROBES = 128, TDEFL_MAX_PROBES_MASK = 0xFFF
+};
+
+// TDEFL_WRITE_ZLIB_HEADER: If set, the compressor outputs a zlib header before the deflate data, and the Adler-32 of the source data at the end. Otherwise, you'll get raw deflate data.
+// TDEFL_COMPUTE_ADLER32: Always compute the adler-32 of the input data (even when not writing zlib headers).
+// TDEFL_GREEDY_PARSING_FLAG: Set to use faster greedy parsing, instead of more efficient lazy parsing.
+// TDEFL_NONDETERMINISTIC_PARSING_FLAG: Enable to decrease the compressor's initialization time to the minimum, but the output may vary from run to run given the same input (depending on the contents of memory).
+// TDEFL_RLE_MATCHES: Only look for RLE matches (matches with a distance of 1)
+// TDEFL_FILTER_MATCHES: Discards matches <= 5 chars if enabled.
+// TDEFL_FORCE_ALL_STATIC_BLOCKS: Disable usage of optimized Huffman tables.
+// TDEFL_FORCE_ALL_RAW_BLOCKS: Only use raw (uncompressed) deflate blocks.
+// The low 12 bits are reserved to control the max # of hash probes per dictionary lookup (see TDEFL_MAX_PROBES_MASK).
+enum {
+    TDEFL_WRITE_ZLIB_HEADER             = 0x01000,
+    TDEFL_COMPUTE_ADLER32               = 0x02000,
+    TDEFL_GREEDY_PARSING_FLAG           = 0x04000,
+    TDEFL_NONDETERMINISTIC_PARSING_FLAG = 0x08000,
+    TDEFL_RLE_MATCHES                   = 0x10000,
+    TDEFL_FILTER_MATCHES                = 0x20000,
+    TDEFL_FORCE_ALL_STATIC_BLOCKS       = 0x40000,
+    TDEFL_FORCE_ALL_RAW_BLOCKS          = 0x80000
+};
+
+// High level compression functions:
+// tdefl_compress_mem_to_heap() compresses a block in memory to a heap block allocated via malloc().
+// On entry:
+//  pSrc_buf, src_buf_len: Pointer and size of source block to compress.
+//  flags: The max match finder probes (default is 128) logically OR'd against the above flags. Higher probes are slower but improve compression.
+// On return:
+//  Function returns a pointer to the compressed data, or NULL on failure.
+//  *pOut_len will be set to the compressed data's size, which could be larger than src_buf_len on uncompressible data.
+//  The caller must free() the returned block when it's no longer needed.
+void *tdefl_compress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
+
+// tdefl_compress_mem_to_mem() compresses a block in memory to another block in memory.
+// Returns 0 on failure.
+size_t tdefl_compress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
+
+// Compresses an image to a compressed PNG file in memory.
+// On entry:
+//  pImage, w, h, and num_chans describe the image to compress. num_chans may be 1, 2, 3, or 4.
+//  The image pitch in bytes per scanline will be w*num_chans. The leftmost pixel on the top scanline is stored first in memory.
+//  level may range from [0,10], use MZ_NO_COMPRESSION, MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc. or a decent default is MZ_DEFAULT_LEVEL
+//  If flip is true, the image will be flipped on the Y axis (useful for OpenGL apps).
+// On return:
+//  Function returns a pointer to the compressed data, or NULL on failure.
+//  *pLen_out will be set to the size of the PNG image file.
+//  The caller must mz_free() the returned heap block (which will typically be larger than *pLen_out) when it's no longer needed.
+void *tdefl_write_image_to_png_file_in_memory_ex(const void *pImage, int w, int h, int num_chans, size_t *pLen_out, mz_uint level, mz_bool flip);
+void *tdefl_write_image_to_png_file_in_memory(const void *pImage, int w, int h, int num_chans, size_t *pLen_out);
+
+// Output stream interface. The compressor uses this interface to write compressed data. It'll typically be called TDEFL_OUT_BUF_SIZE at a time.
+typedef mz_bool (*tdefl_put_buf_func_ptr)(const void *pBuf, int len, void *pUser);
+
+// tdefl_compress_mem_to_output() compresses a block to an output stream. The above helpers use this function internally.
+mz_bool tdefl_compress_mem_to_output(const void *pBuf, size_t buf_len, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+enum { TDEFL_MAX_HUFF_TABLES = 3, TDEFL_MAX_HUFF_SYMBOLS_0 = 288, TDEFL_MAX_HUFF_SYMBOLS_1 = 32, TDEFL_MAX_HUFF_SYMBOLS_2 = 19, TDEFL_LZ_DICT_SIZE = 32768, TDEFL_LZ_DICT_SIZE_MASK = TDEFL_LZ_DICT_SIZE - 1, TDEFL_MIN_MATCH_LEN = 3, TDEFL_MAX_MATCH_LEN = 258 };
+
+// TDEFL_OUT_BUF_SIZE MUST be large enough to hold a single entire compressed output block (using static/fixed Huffman codes).
+#if TDEFL_LESS_MEMORY
+enum { TDEFL_LZ_CODE_BUF_SIZE = 24 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 12, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
+#else
+enum { TDEFL_LZ_CODE_BUF_SIZE = 64 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 15, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
+#endif
+
+// The low-level tdefl functions below may be used directly if the above helper functions aren't flexible enough. The low-level functions don't make any heap allocations, unlike the above helper functions.
+typedef enum {
+    TDEFL_STATUS_BAD_PARAM = -2,
+    TDEFL_STATUS_PUT_BUF_FAILED = -1,
+    TDEFL_STATUS_OKAY = 0,
+    TDEFL_STATUS_DONE = 1,
+} tdefl_status;
+
+// Must map to MZ_NO_FLUSH, MZ_SYNC_FLUSH, etc. enums
+typedef enum {
+    TDEFL_NO_FLUSH = 0,
+    TDEFL_SYNC_FLUSH = 2,
+    TDEFL_FULL_FLUSH = 3,
+    TDEFL_FINISH = 4
+} tdefl_flush;
+
+// tdefl's compression state structure.
+typedef struct {
+    tdefl_put_buf_func_ptr m_pPut_buf_func;
+    void *m_pPut_buf_user;
+    mz_uint m_flags, m_max_probes[2];
+    int m_greedy_parsing;
+    mz_uint m_adler32, m_lookahead_pos, m_lookahead_size, m_dict_size;
+    mz_uint8 *m_pLZ_code_buf, *m_pLZ_flags, *m_pOutput_buf, *m_pOutput_buf_end;
+    mz_uint m_num_flags_left, m_total_lz_bytes, m_lz_code_buf_dict_pos, m_bits_in, m_bit_buffer;
+    mz_uint m_saved_match_dist, m_saved_match_len, m_saved_lit, m_output_flush_ofs, m_output_flush_remaining, m_finished, m_block_index, m_wants_to_finish;
+    tdefl_status m_prev_return_status;
+    const void *m_pIn_buf;
+    void *m_pOut_buf;
+    size_t *m_pIn_buf_size, *m_pOut_buf_size;
+    tdefl_flush m_flush;
+    const mz_uint8 *m_pSrc;
+    size_t m_src_buf_left, m_out_buf_ofs;
+    mz_uint8 m_dict[TDEFL_LZ_DICT_SIZE + TDEFL_MAX_MATCH_LEN - 1];
+    mz_uint16 m_huff_count[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+    mz_uint16 m_huff_codes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+    mz_uint8 m_huff_code_sizes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+    mz_uint8 m_lz_code_buf[TDEFL_LZ_CODE_BUF_SIZE];
+    mz_uint16 m_next[TDEFL_LZ_DICT_SIZE];
+    mz_uint16 m_hash[TDEFL_LZ_HASH_SIZE];
+    mz_uint8 m_output_buf[TDEFL_OUT_BUF_SIZE];
+} tdefl_compressor;
+
+// Initializes the compressor.
+// There is no corresponding deinit() function because the tdefl API's do not dynamically allocate memory.
+// pBut_buf_func: If NULL, output data will be supplied to the specified callback. In this case, the user should call the tdefl_compress_buffer() API for compression.
+// If pBut_buf_func is NULL the user should always call the tdefl_compress() API.
+// flags: See the above enums (TDEFL_HUFFMAN_ONLY, TDEFL_WRITE_ZLIB_HEADER, etc.)
+tdefl_status tdefl_init(tdefl_compressor *d, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+// Compresses a block of data, consuming as much of the specified input buffer as possible, and writing as much compressed data to the specified output buffer as possible.
+tdefl_status tdefl_compress(tdefl_compressor *d, const void *pIn_buf, size_t *pIn_buf_size, void *pOut_buf, size_t *pOut_buf_size, tdefl_flush flush);
+
+// tdefl_compress_buffer() is only usable when the tdefl_init() is called with a non-NULL tdefl_put_buf_func_ptr.
+// tdefl_compress_buffer() always consumes the entire input buffer.
+tdefl_status tdefl_compress_buffer(tdefl_compressor *d, const void *pIn_buf, size_t in_buf_size, tdefl_flush flush);
+
+tdefl_status tdefl_get_prev_return_status(tdefl_compressor *d);
+mz_uint32 tdefl_get_adler32(tdefl_compressor *d);
+
+// Can't use tdefl_create_comp_flags_from_zip_params if MINIZ_NO_ZLIB_APIS isn't defined, because it uses some of its macros.
+#ifndef MINIZ_NO_ZLIB_APIS
+// Create tdefl_compress() flags given zlib-style compression parameters.
+// level may range from [0,10] (where 10 is absolute max compression, but may be much slower on some files)
+// window_bits may be -15 (raw deflate) or 15 (zlib)
+// strategy may be either MZ_DEFAULT_STRATEGY, MZ_FILTERED, MZ_HUFFMAN_ONLY, MZ_RLE, or MZ_FIXED
+mz_uint tdefl_create_comp_flags_from_zip_params(int level, int window_bits, int strategy);
+#endif // #ifndef MINIZ_NO_ZLIB_APIS
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // MINIZ_HEADER_INCLUDED
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/rom_layout.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/rom_layout.h
new file mode 100644
index 00000000000..cd1730c840e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/rom_layout.h
@@ -0,0 +1,86 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SUPPORT_BTDM            1
+#define SUPPORT_WIFI            1
+
+/* Structure and functions for returning ROM global layout
+ *
+ * This is for address symbols defined in the linker script, which may change during ECOs.
+ */
+typedef struct {
+    void *dram0_stack_shared_mem_start;
+    void *dram0_rtos_reserved_start;
+    void *stack_sentry;
+    void *stack;
+    void *stack_sentry_app;
+    void *stack_app;
+
+    /* BTDM data */
+    void *data_start_btdm;
+    void *data_end_btdm;
+    void *bss_start_btdm;
+    void *bss_end_btdm;
+    void *data_start_btdm_rom;
+    void *data_end_btdm_rom;
+    void *data_start_interface_btdm;
+    void *data_end_interface_btdm;
+    void *bss_start_interface_btdm;
+    void *bss_end_interface_btdm;
+
+    /* Other DRAM ranges */
+#if SUPPORT_BTDM || SUPPORT_WIFI
+    void *dram_start_phyrom;
+    void *dram_end_phyrom;
+#endif
+#if SUPPORT_WIFI
+    void *dram_start_coexist;
+    void *dram_end_coexist;
+    void *dram_start_net80211;
+    void *dram_end_net80211;
+    void *dram_start_pp;
+    void *dram_end_pp;
+    void *data_start_interface_coexist;
+    void *data_end_interface_coexist;
+    void *bss_start_interface_coexist;
+    void *bss_end_interface_coexist;
+    void *data_start_interface_net80211;
+    void *data_end_interface_net80211;
+    void *bss_start_interface_net80211;
+    void *bss_end_interface_net80211;
+    void *data_start_interface_pp;
+    void *data_end_interface_pp;
+    void *bss_start_interface_pp;
+    void *bss_end_interface_pp;
+#endif
+    void *dram_start_usbdev_rom;
+    void *dram_end_usbdev_rom;
+    void *dram_start_uart_rom;
+    void *dram_end_uart_rom;
+
+} ets_rom_layout_t;
+
+extern const ets_rom_layout_t * const ets_rom_layout_p;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/rsa_pss.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/rsa_pss.h
new file mode 100644
index 00000000000..4a838071e76
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/rsa_pss.h
@@ -0,0 +1,46 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_RSA_PSS_H_
+#define _ROM_RSA_PSS_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ETS_SIG_LEN 384 /* Bytes */
+#define ETS_DIGEST_LEN 32 /* SHA-256, bytes */
+
+typedef struct {
+    uint8_t n[384]; /* Public key modulus */
+    uint32_t e;     /* Public key exponent */
+    uint8_t rinv[384];
+    uint32_t mdash;
+} ets_rsa_pubkey_t;
+
+bool ets_rsa_pss_verify(const ets_rsa_pubkey_t *key, const uint8_t *sig, const uint8_t *digest, uint8_t *verified_digest);
+
+void ets_mgf1_sha256(const uint8_t *mgfSeed, size_t seedLen, size_t maskLen, uint8_t *mask);
+
+bool ets_emsa_pss_verify(const uint8_t *encoded_message, const uint8_t *mhash);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/rtc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/rtc.h
new file mode 100644
index 00000000000..e3a8d9d63e2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/rtc.h
@@ -0,0 +1,258 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ROM_RTC_H_
+#define _ROM_RTC_H_
+
+#include "ets_sys.h"
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "soc/soc.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup rtc_apis, rtc registers and memory related apis
+  * @brief rtc apis
+  */
+
+/** @addtogroup rtc_apis
+  * @{
+  */
+
+/**************************************************************************************
+  *                                       Note:                                       *
+  *       Some Rtc memory and registers are used, in ROM or in internal library.      *
+  *          Please do not use reserved or used rtc memory or registers.              *
+  *                                                                                   *
+  *************************************************************************************
+  *                          RTC  Memory & Store Register usage
+  *************************************************************************************
+  *     rtc memory addr         type    size            usage
+  *     0x3f421000(0x50000000)  Slow    SIZE_CP         Co-Processor code/Reset Entry
+  *     0x3f421000+SIZE_CP      Slow    8192-SIZE_CP
+  *
+  *     0x3ff80000(0x40070000)  Fast    8192            deep sleep entry code
+  *
+  *************************************************************************************
+  *     RTC store registers     usage
+  *     RTC_CNTL_STORE0_REG     Reserved
+  *     RTC_CNTL_STORE1_REG     RTC_SLOW_CLK calibration value
+  *     RTC_CNTL_STORE2_REG     Boot time, low word
+  *     RTC_CNTL_STORE3_REG     Boot time, high word
+  *     RTC_CNTL_STORE4_REG     External XTAL frequency
+  *     RTC_CNTL_STORE5_REG     APB bus frequency
+  *     RTC_CNTL_STORE6_REG     FAST_RTC_MEMORY_ENTRY
+  *     RTC_CNTL_STORE7_REG     FAST_RTC_MEMORY_CRC
+  *************************************************************************************
+  */
+
+#define RTC_SLOW_CLK_CAL_REG    RTC_CNTL_STORE1_REG
+#define RTC_BOOT_TIME_LOW_REG   RTC_CNTL_STORE2_REG
+#define RTC_BOOT_TIME_HIGH_REG  RTC_CNTL_STORE3_REG
+#define RTC_XTAL_FREQ_REG       RTC_CNTL_STORE4_REG
+#define RTC_APB_FREQ_REG        RTC_CNTL_STORE5_REG
+#define RTC_ENTRY_ADDR_REG      RTC_CNTL_STORE6_REG
+#define RTC_RESET_CAUSE_REG     RTC_CNTL_STORE6_REG
+#define RTC_MEMORY_CRC_REG      RTC_CNTL_STORE7_REG
+
+#define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
+
+
+typedef enum {
+    AWAKE = 0,             //<CPU ON
+    LIGHT_SLEEP = BIT0,    //CPU waiti, PLL ON.  We don't need explicitly set this mode.
+    DEEP_SLEEP  = BIT1     //CPU OFF, PLL OFF, only specific timer could wake up
+} SLEEP_MODE;
+
+typedef enum {
+    NO_MEAN                =  0,
+    POWERON_RESET          =  1,    /**<1, Vbat power on reset*/
+    RTC_SW_SYS_RESET       =  3,    /**<3, Software reset digital core*/
+    DEEPSLEEP_RESET        =  5,    /**<5, Deep Sleep reset digital core*/
+    TG0WDT_SYS_RESET       =  7,    /**<7, Timer Group0 Watch dog reset digital core*/
+    TG1WDT_SYS_RESET       =  8,    /**<8, Timer Group1 Watch dog reset digital core*/
+    RTCWDT_SYS_RESET       =  9,    /**<9, RTC Watch dog Reset digital core*/
+    INTRUSION_RESET        = 10,    /**<10, Instrusion tested to reset CPU*/
+    TG0WDT_CPU_RESET       = 11,    /**<11, Time Group0 reset CPU*/
+    RTC_SW_CPU_RESET       = 12,    /**<12, Software reset CPU*/
+    RTCWDT_CPU_RESET       = 13,    /**<13, RTC Watch dog Reset CPU*/
+    RTCWDT_BROWN_OUT_RESET = 15,    /**<15, Reset when the vdd voltage is not stable*/
+    RTCWDT_RTC_RESET       = 16,    /**<16, RTC Watch dog reset digital core and rtc module*/
+    TG1WDT_CPU_RESET       = 17,    /**<17, Time Group1 reset CPU*/
+    SUPER_WDT_RESET        = 18,    /**<18, super watchdog reset digital core and rtc module*/
+    GLITCH_RTC_RESET       = 19,    /**<19, glitch reset digital core and rtc module*/
+    EFUSE_RESET            = 20,    /**<20, efuse reset digital core*/
+    USB_UART_CHIP_RESET    = 21,    /**<21, usb uart reset digital core */
+    USB_JTAG_CHIP_RESET    = 22,    /**<22, usb jtag reset digital core */
+    POWER_GLITCH_RESET     = 23,    /**<23, power glitch reset digital core and rtc module*/
+    JTAG_RESET             = 24,    /**<24, jtag reset CPU*/
+} RESET_REASON;
+
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESET != RESET_REASON_CPU0_MWDT1");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
+_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
+_Static_assert((soc_reset_reason_t)USB_UART_CHIP_RESET == RESET_REASON_CORE_USB_UART, "USB_UART_CHIP_RESET != RESET_REASON_CORE_USB_UART");
+_Static_assert((soc_reset_reason_t)USB_JTAG_CHIP_RESET == RESET_REASON_CORE_USB_JTAG, "USB_JTAG_CHIP_RESET != RESET_REASON_CORE_USB_JTAG");
+_Static_assert((soc_reset_reason_t)POWER_GLITCH_RESET == RESET_REASON_CORE_PWR_GLITCH, "POWER_GLITCH_RESET != RESET_REASON_CORE_PWR_GLITCH");
+_Static_assert((soc_reset_reason_t)JTAG_RESET == RESET_REASON_CPU0_JTAG, "JTAG_RESET != RESET_REASON_CPU0_JTAG");
+
+typedef enum {
+    NO_SLEEP        = 0,
+    EXT_EVENT0_TRIG = BIT0,
+    EXT_EVENT1_TRIG = BIT1,
+    GPIO_TRIG       = BIT2,
+    TIMER_EXPIRE    = BIT3,
+    SDIO_TRIG       = BIT4,
+    MAC_TRIG        = BIT5,
+    UART0_TRIG      = BIT6,
+    UART1_TRIG      = BIT7,
+    TOUCH_TRIG      = BIT8,
+    SAR_TRIG        = BIT9,
+    BT_TRIG         = BIT10,
+    RISCV_TRIG      = BIT11,
+    XTAL_DEAD_TRIG  = BIT12,
+    RISCV_TRAP_TRIG = BIT13,
+    USB_TRIG        = BIT14
+} WAKEUP_REASON;
+
+typedef enum {
+    DISEN_WAKEUP       = NO_SLEEP,
+    EXT_EVENT0_TRIG_EN = EXT_EVENT0_TRIG,
+    EXT_EVENT1_TRIG_EN = EXT_EVENT1_TRIG,
+    GPIO_TRIG_EN       = GPIO_TRIG,
+    TIMER_EXPIRE_EN    = TIMER_EXPIRE,
+    SDIO_TRIG_EN       = SDIO_TRIG,
+    MAC_TRIG_EN        = MAC_TRIG,
+    UART0_TRIG_EN      = UART0_TRIG,
+    UART1_TRIG_EN      = UART1_TRIG,
+    TOUCH_TRIG_EN      = TOUCH_TRIG,
+    SAR_TRIG_EN        = SAR_TRIG,
+    BT_TRIG_EN         = BT_TRIG,
+    RISCV_TRIG_EN      = RISCV_TRIG,
+    XTAL_DEAD_TRIG_EN  = XTAL_DEAD_TRIG,
+    RISCV_TRAP_TRIG_EN = RISCV_TRAP_TRIG,
+    USB_TRIG_EN        = USB_TRIG
+} WAKEUP_ENABLE;
+
+/**
+  * @brief  Get the reset reason for CPU.
+  *
+  * @param  int cpu_no : CPU no.
+  *
+  * @return RESET_REASON
+  */
+RESET_REASON rtc_get_reset_reason(int cpu_no);
+
+/**
+  * @brief  Get the wakeup cause for CPU.
+  *
+  * @param  int cpu_no : CPU no.
+  *
+  * @return WAKEUP_REASON
+  */
+WAKEUP_REASON rtc_get_wakeup_cause(void);
+
+/**
+  * @brief Get CRC for Fast RTC Memory.
+  *
+  * @param  uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory.
+  *
+  * @param  uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte.
+  *
+  * @return uint32_t : CRC32 result
+  */
+uint32_t calc_rtc_memory_crc(uint32_t start_addr, uint32_t crc_len);
+
+/**
+  * @brief Suppress ROM log by setting specific RTC control register.
+  * @note This is not a permanent disable of ROM logging since the RTC register can not retain after chip reset.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+static inline void rtc_suppress_rom_log(void)
+{
+    /* To disable logging in the ROM, only the least significant bit of the register is used,
+     * but since this register is also used to store the frequency of the main crystal (RTC_XTAL_FREQ_REG),
+     * you need to write to this register in the same format.
+     * Namely, the upper 16 bits and lower should be the same.
+     */
+    REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
+}
+
+/**
+  * @brief Set CRC of Fast RTC memory 0-0x7ff into RTC STORE7.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void set_rtc_memory_crc(void);
+
+/**
+  * @brief Fetch entry from RTC memory and RTC STORE reg
+  *
+  * @param uint32_t * entry_addr : the address to save entry
+  *
+  * @param RESET_REASON reset_reason : reset reason this time
+  *
+  * @return None
+  */
+void rtc_boot_control(uint32_t *entry_addr, RESET_REASON reset_reason);
+
+/**
+  * @brief Software Reset digital core.
+  *
+  * It is not recommended to use this function in esp-idf, use
+  * esp_restart() instead.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void software_reset(void);
+
+/**
+  * @brief Software Reset digital core.
+  *
+  * It is not recommended to use this function in esp-idf, use
+  * esp_restart() instead.
+  *
+  * @param  int cpu_no : The CPU to reset, 0 for PRO CPU, 1 for APP CPU.
+  *
+  * @return None
+  */
+void software_reset_cpu(int cpu_no);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_RTC_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/secure_boot.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/secure_boot.h
new file mode 100644
index 00000000000..36a490d8584
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/secure_boot.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "ets_sys.h"
+#include "rsa_pss.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
+typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
+typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
+
+/* Anti-FI measure: use full words for success/fail, instead of
+   0/non-zero
+*/
+typedef enum {
+    SB_SUCCESS = 0x3A5A5AA5,
+    SB_FAILED = 0x7533885E,
+} ets_secure_boot_status_t;
+
+
+/* Verify and stage-load the bootloader image
+   (reconfigures cache to map, loads trusted key digests from efuse,
+   copies the bootloader into the staging buffer.)
+
+   If allow_key_revoke is true and aggressive revoke efuse is set,
+   any failed signature has its associated key revoked in efuse.
+
+   If result is SB_SUCCESS, the "simple hash" of the bootloader
+   is copied into verified_hash.
+*/
+ets_secure_boot_status_t ets_secure_boot_verify_stage_bootloader(uint8_t *verified_hash, bool allow_key_revoke);
+
+/* Verify bootloader image (reconfigures cache to map),
+   with key digests provided as parameters.)
+
+   Can be used to verify secure boot status before enabling
+   secure boot permanently.
+
+   If stage_load parameter is true, bootloader is copied into staging
+   buffer in RAM at the same time.
+
+   If result is SB_SUCCESS, the "simple hash" of the bootloader is
+   copied into verified_hash.
+*/
+ets_secure_boot_status_t ets_secure_boot_verify_bootloader_with_keys(uint8_t *verified_hash, const ets_secure_boot_key_digests_t *trusted_keys, bool stage_load);
+
+/* Read key digests from efuse. Any revoked/missing digests will be
+   marked as NULL
+*/
+ETS_STATUS ets_secure_boot_read_key_digests(ets_secure_boot_key_digests_t *trusted_keys);
+
+/* Verify supplied signature against supplied digest, using
+   supplied trusted key digests.
+
+   Doesn't reconfigure cache or any other hardware access except for RSA peripheral.
+
+   If result is SB_SUCCESS, the image_digest value is copied into verified_digest.
+*/
+ets_secure_boot_status_t ets_secure_boot_verify_signature(const ets_secure_boot_signature_t *sig, const uint8_t *image_digest, const ets_secure_boot_key_digests_t *trusted_keys, uint8_t *verified_digest);
+
+/* Revoke a public key digest in efuse.
+   @param index Digest to revoke. Must be 0, 1 or 2.
+ */
+void ets_secure_boot_revoke_public_key_digest(int index);
+
+#define CRC_SIGN_BLOCK_LEN 1196
+#define SIG_BLOCK_PADDING 4096
+#define ETS_SECURE_BOOT_V2_SIGNATURE_MAGIC 0xE7
+
+/* Secure Boot V2 signature block
+
+   (Up to 3 in a signature sector are appended to the image)
+ */
+struct ets_secure_boot_sig_block {
+    uint8_t magic_byte;
+    uint8_t version;
+    uint8_t _reserved1;
+    uint8_t _reserved2;
+    uint8_t image_digest[32];
+    ets_rsa_pubkey_t key;
+    uint8_t signature[384];
+    uint32_t block_crc;
+    uint8_t _padding[16];
+};
+
+_Static_assert(sizeof(ets_secure_boot_sig_block_t) == 1216, "invalid sig block size");
+
+#define SECURE_BOOT_NUM_BLOCKS 3
+
+/* V2 Secure boot signature sector (up to 3 blocks) */
+struct ets_secure_boot_signature {
+    ets_secure_boot_sig_block_t block[SECURE_BOOT_NUM_BLOCKS];
+    uint8_t _padding[4096 - (sizeof(ets_secure_boot_sig_block_t) * SECURE_BOOT_NUM_BLOCKS)];
+};
+
+_Static_assert(sizeof(ets_secure_boot_signature_t) == 4096, "invalid sig sector size");
+
+#define MAX_KEY_DIGESTS 3
+
+struct ets_secure_boot_key_digests {
+    const void *key_digests[MAX_KEY_DIGESTS];
+    bool allow_key_revoke;
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/sha.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/sha.h
new file mode 100644
index 00000000000..54b1b21676a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/sha.h
@@ -0,0 +1,61 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ROM_SHA_H_
+#define _ROM_SHA_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "ets_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    SHA1 = 0,
+    SHA2_224,
+    SHA2_256,
+    SHA_TYPE_MAX
+} SHA_TYPE;
+
+typedef struct SHAContext {
+    bool start;
+    bool in_hardware;               // Is this context currently in peripheral? Needs to be manually cleared if multiple SHAs are interleaved
+    SHA_TYPE type;
+    uint32_t state[16];             // For SHA1/SHA224/SHA256, used 8, other used 16
+    unsigned char buffer[128];      // For SHA1/SHA224/SHA256, used 64, other used 128
+    uint32_t total_bits[4];
+} SHA_CTX;
+
+void ets_sha_enable(void);
+
+void ets_sha_disable(void);
+
+ets_status_t ets_sha_init(SHA_CTX *ctx, SHA_TYPE type);
+
+ets_status_t ets_sha_starts(SHA_CTX *ctx, uint16_t sha512_t);
+
+void ets_sha_get_state(SHA_CTX *ctx);
+
+void ets_sha_process(SHA_CTX *ctx, const unsigned char *input);
+
+void ets_sha_update(SHA_CTX *ctx, const unsigned char *input, uint32_t input_bytes, bool update_ctx);
+
+ets_status_t ets_sha_finish(SHA_CTX *ctx, unsigned char *output);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_SHA_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/spi_flash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/spi_flash.h
new file mode 100644
index 00000000000..139aee50664
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/spi_flash.h
@@ -0,0 +1,570 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_SPI_FLASH_H_
+#define _ROM_SPI_FLASH_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup spi_flash_apis, spi flash operation related apis
+  * @brief spi_flash apis
+  */
+
+/** @addtogroup spi_flash_apis
+  * @{
+  */
+
+#define PERIPHS_SPI_FLASH_CMD                 SPI_MEM_CMD_REG(1)
+#define PERIPHS_SPI_FLASH_ADDR                SPI_MEM_ADDR_REG(1)
+#define PERIPHS_SPI_FLASH_CTRL                SPI_MEM_CTRL_REG(1)
+#define PERIPHS_SPI_FLASH_CTRL1               SPI_MEM_CTRL1_REG(1)
+#define PERIPHS_SPI_FLASH_STATUS              SPI_MEM_RD_STATUS_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG              SPI_MEM_USER_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG1             SPI_MEM_USER1_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG2             SPI_MEM_USER2_REG(1)
+#define PERIPHS_SPI_FLASH_C0                  SPI_MEM_W0_REG(1)
+#define PERIPHS_SPI_FLASH_C1                  SPI_MEM_W1_REG(1)
+#define PERIPHS_SPI_FLASH_C2                  SPI_MEM_W2_REG(1)
+#define PERIPHS_SPI_FLASH_C3                  SPI_MEM_W3_REG(1)
+#define PERIPHS_SPI_FLASH_C4                  SPI_MEM_W4_REG(1)
+#define PERIPHS_SPI_FLASH_C5                  SPI_MEM_W5_REG(1)
+#define PERIPHS_SPI_FLASH_C6                  SPI_MEM_W6_REG(1)
+#define PERIPHS_SPI_FLASH_C7                  SPI_MEM_W7_REG(1)
+#define PERIPHS_SPI_FLASH_TX_CRC              SPI_MEM_TX_CRC_REG(1)
+
+#define SPI0_R_QIO_DUMMY_CYCLELEN             5
+#define SPI0_R_QIO_ADDR_BITSLEN               23
+#define SPI0_R_FAST_DUMMY_CYCLELEN            7
+#define SPI0_R_DIO_DUMMY_CYCLELEN             3
+#define SPI0_R_FAST_ADDR_BITSLEN              23
+#define SPI0_R_SIO_ADDR_BITSLEN               23
+
+#define SPI1_R_QIO_DUMMY_CYCLELEN             5
+#define SPI1_R_QIO_ADDR_BITSLEN               23
+#define SPI1_R_FAST_DUMMY_CYCLELEN            7
+#define SPI1_R_DIO_DUMMY_CYCLELEN             3
+#define SPI1_R_DIO_ADDR_BITSLEN               23
+#define SPI1_R_FAST_ADDR_BITSLEN              23
+#define SPI1_R_SIO_ADDR_BITSLEN               23
+
+#define ESP_ROM_SPIFLASH_W_SIO_ADDR_BITSLEN   23
+
+#define ESP_ROM_SPIFLASH_TWO_BYTE_STATUS_EN   SPI_MEM_WRSR_2B
+
+//SPI address register
+#define ESP_ROM_SPIFLASH_BYTES_LEN            24
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_WRITE_NUM  32
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM   16
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_BITS  0xf
+
+//SPI status register
+#define  ESP_ROM_SPIFLASH_BUSY_FLAG           BIT0
+#define  ESP_ROM_SPIFLASH_WRENABLE_FLAG       BIT1
+#define  ESP_ROM_SPIFLASH_BP0                 BIT2
+#define  ESP_ROM_SPIFLASH_BP1                 BIT3
+#define  ESP_ROM_SPIFLASH_BP2                 BIT4
+#define  ESP_ROM_SPIFLASH_WR_PROTECT          (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
+#define  ESP_ROM_SPIFLASH_QE                  BIT9
+
+#define FLASH_ID_GD25LQ32C  0xC86016
+
+typedef enum {
+    ESP_ROM_SPIFLASH_QIO_MODE = 0,
+    ESP_ROM_SPIFLASH_QOUT_MODE,
+    ESP_ROM_SPIFLASH_DIO_MODE,
+    ESP_ROM_SPIFLASH_DOUT_MODE,
+    ESP_ROM_SPIFLASH_FASTRD_MODE,
+    ESP_ROM_SPIFLASH_SLOWRD_MODE
+} esp_rom_spiflash_read_mode_t;
+
+typedef enum {
+    ESP_ROM_SPIFLASH_RESULT_OK,
+    ESP_ROM_SPIFLASH_RESULT_ERR,
+    ESP_ROM_SPIFLASH_RESULT_TIMEOUT
+} esp_rom_spiflash_result_t;
+
+typedef struct {
+    uint32_t device_id;
+    uint32_t chip_size;    // chip size in bytes
+    uint32_t block_size;
+    uint32_t sector_size;
+    uint32_t page_size;
+    uint32_t status_mask;
+} esp_rom_spiflash_chip_t;
+
+typedef struct {
+    uint8_t  data_length;
+    uint8_t  read_cmd0;
+    uint8_t  read_cmd1;
+    uint8_t  write_cmd;
+    uint16_t data_mask;
+    uint16_t data;
+} esp_rom_spiflash_common_cmd_t;
+
+/**
+  * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write).
+  *
+  * @param  uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv);
+
+/**
+  * @brief Select SPI Flash to QIO mode when WP pad is read from Flash.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t wp_gpio_num: WP gpio number.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @return None
+  */
+void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi);
+
+/**
+  * @brief Set SPI Flash pad drivers.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t wp_gpio_num: WP gpio number.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @param  uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid
+  *            drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp.
+  *                        Values usually read from falsh by rom code, function usually callde by rom code.
+  *                        if value with bit(3) set, the value is valid, bit[2:0] is the real value.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs);
+
+/**
+  * @brief Select SPI Flash function for pads.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @return None
+  */
+void esp_rom_spiflash_select_padsfunc(uint32_t ishspi);
+
+/**
+  * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @param  uint8_t legacy: In legacy mode, more SPI command is used in line.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy);
+
+/**
+  * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR).
+  *    Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t *status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status);
+
+/**
+  * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t *status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status);
+
+/**
+  * @brief Write status to Falsh status register.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t status_value : Value to .
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value);
+
+/**
+  * @brief Use a command to Read Flash status register.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t*status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd);
+
+/**
+  * @brief Config SPI Flash read mode when init.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD.
+  *
+  * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode);
+
+/**
+  * @brief Config SPI Flash clock divisor.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t freqdiv: clock divisor.
+  *
+  * @param  uint8_t spi: 0 for SPI0, 1 for SPI1.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi);
+
+/**
+  * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command.
+  *
+  * @return uint16_t  0 : do not send command any more.
+  *                   1 : go to the next command.
+  *                   n > 1 : skip (n - 1) commands.
+  */
+uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd);
+
+/**
+  * @brief Unlock SPI write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void);
+
+/**
+  * @brief SPI write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Lock error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_lock(void);
+
+/**
+  * @brief Update SPI Flash parameter.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t deviceId : Device ID read from SPI, the low 32 bit.
+  *
+  * @param  uint32_t chip_size : The Flash size.
+  *
+  * @param  uint32_t block_size : The Flash block size.
+  *
+  * @param  uint32_t sector_size : The Flash sector size.
+  *
+  * @param  uint32_t page_size : The Flash page size.
+  *
+  * @param  uint32_t status_mask : The Mask used when read status from Flash(use single CMD).
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Update error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size,
+        uint32_t sector_size, uint32_t page_size, uint32_t status_mask);
+
+/**
+  * @brief Erase whole flash chip.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void);
+
+/**
+  * @brief Erase a 64KB block of flash
+  *        Uses SPI flash command D8H.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t block_num : Which block to erase.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num);
+
+/**
+  * @brief Erase a sector of flash.
+  *        Uses SPI flash command 20H.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t sector_num : Which sector to erase.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num);
+
+/**
+  * @brief Erase some sectors.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t start_addr : Start addr to erase, should be sector aligned.
+  *
+  * @param  uint32_t area_len : Length to erase, should be sector aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len);
+
+/**
+  * @brief Write Data to Flash, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t dest_addr : Address to write, should be 4 bytes aligned.
+  *
+  * @param  const uint32_t *src : The pointer to data which is to write.
+  *
+  * @param  uint32_t len : Length to write, should be 4 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len);
+
+/**
+  * @brief Read Data from Flash, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t src_addr : Address to read, should be 4 bytes aligned.
+  *
+  * @param  uint32_t *dest : The buf to read the data.
+  *
+  * @param  uint32_t len : Length to read, should be 4 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len);
+
+/**
+  * @brief SPI1 go into encrypto mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void esp_rom_spiflash_write_encrypted_enable(void);
+
+/**
+  * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t flash_addr : Address to write, should be 32 bytes aligned.
+  *
+  * @param  uint32_t *data : The pointer to data which is to write.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data);
+
+/**
+  * @brief SPI1 go out of encrypto mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void esp_rom_spiflash_write_encrypted_disable(void);
+
+/**
+  * @brief Write data to flash with transparent encryption.
+  * @note Sectors to be written should already be erased.
+  *
+  * @note Please do not call this function in SDK.
+  *
+  * @param  uint32_t flash_addr : Address to write, should be 32 byte aligned.
+  *
+  * @param  uint32_t *data : The pointer to data to write. Note, this pointer must
+  *                          be 32 bit aligned and the content of the data will be
+  *                          modified by the encryption function.
+  *
+  * @param  uint32_t len : Length to write, should be 32 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len);
+
+
+/* TODO: figure out how to map these to their new names */
+typedef enum {
+    SPI_ENCRYPT_DESTINATION_FLASH,
+} SpiEncryptDest;
+
+typedef esp_rom_spiflash_result_t SpiFlashOpResult;
+
+SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void *data, uint32_t len);
+SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void *data, uint32_t len);
+void SPI_Write_Encrypt_Enable(void);
+void SPI_Write_Encrypt_Disable(void);
+
+/** @brief Wait until SPI flash write operation is complete
+ *
+ * @note Please do not call this function in SDK.
+ *
+ * Reads the Write In Progress bit of the SPI flash status register,
+ * repeats until this bit is zero (indicating write complete).
+ *
+ * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete
+ *         ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status.
+ */
+esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi);
+
+
+/** @brief Enable Quad I/O pin functions
+ *
+ * @note Please do not call this function in SDK.
+ *
+ * Sets the HD & WP pin functions for Quad I/O modes, based on the
+ * efuse SPI pin configuration.
+ *
+ * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O.
+ *
+ * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig().
+ * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored.
+ * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored.
+ * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used
+ *   to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI).
+ *   Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral.
+ */
+void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
+
+
+typedef void (* spi_flash_func_t)(void);
+typedef SpiFlashOpResult (* spi_flash_op_t)(void);
+typedef SpiFlashOpResult (* spi_flash_erase_t)(uint32_t);
+typedef SpiFlashOpResult (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
+typedef SpiFlashOpResult (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
+typedef SpiFlashOpResult (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
+typedef SpiFlashOpResult (* spi_flash_wren_t)(void*);
+
+typedef struct {
+    uint32_t read_sub_len;
+    uint32_t write_sub_len;
+    spi_flash_op_t unlock;
+    spi_flash_erase_t erase_sector;
+    spi_flash_erase_t erase_block;
+    spi_flash_rd_t read;
+    spi_flash_wr_t write;
+    spi_flash_ewr_t encrypt_write;
+    spi_flash_func_t check_sus;
+    spi_flash_wren_t wren;
+    spi_flash_op_t wait_idle;
+} spiflash_legacy_funcs_t;
+
+
+extern const spiflash_legacy_funcs_t *rom_spiflash_legacy_funcs;
+
+/** @brief Global ROM spiflash data, as used by legacy
+    SPI flash functions
+*/
+typedef struct {
+    esp_rom_spiflash_chip_t chip;
+    uint8_t dummy_len_plus[3];
+    uint8_t sig_matrix;
+} spiflash_legacy_data_t;
+
+extern spiflash_legacy_data_t *rom_spiflash_legacy_data;
+
+/* Defines to make the H2 ROM legacvy data access compatible with previous chips */
+#define g_rom_flashchip (rom_spiflash_legacy_data->chip)
+#define g_rom_spiflash_dummy_len_plus (rom_spiflash_legacy_data->dummy_len_plus)
+
+/**
+ * @brief Clear WEL bit unconditionally.
+ *
+ * @return always ESP_ROM_SPIFLASH_RESULT_OK
+ */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_SPI_FLASH_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/tjpgd.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/tjpgd.h
new file mode 100644
index 00000000000..80d346a1cb1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/tjpgd.h
@@ -0,0 +1,99 @@
+/*----------------------------------------------------------------------------/
+/ TJpgDec - Tiny JPEG Decompressor include file               (C)ChaN, 2012
+/----------------------------------------------------------------------------*/
+#ifndef _TJPGDEC
+#define _TJPGDEC
+/*---------------------------------------------------------------------------*/
+/* System Configurations */
+
+#define JD_SZBUF        512 /* Size of stream input buffer */
+#define JD_FORMAT       0   /* Output pixel format 0:RGB888 (3 BYTE/pix), 1:RGB565 (1 WORD/pix) */
+#define JD_USE_SCALE    1   /* Use descaling feature for output */
+#define JD_TBLCLIP      1   /* Use table for saturation (might be a bit faster but increases 1K bytes of code size) */
+
+/*---------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* These types must be 16-bit, 32-bit or larger integer */
+typedef int             INT;
+typedef unsigned int    UINT;
+
+/* These types must be 8-bit integer */
+typedef char            CHAR;
+typedef unsigned char   UCHAR;
+typedef unsigned char   BYTE;
+
+/* These types must be 16-bit integer */
+typedef short           SHORT;
+typedef unsigned short  USHORT;
+typedef unsigned short  WORD;
+typedef unsigned short  WCHAR;
+
+/* These types must be 32-bit integer */
+typedef long            LONG;
+typedef unsigned long   ULONG;
+typedef unsigned long   DWORD;
+
+
+/* Error code */
+typedef enum {
+    JDR_OK = 0, /* 0: Succeeded */
+    JDR_INTR,   /* 1: Interrupted by output function */
+    JDR_INP,    /* 2: Device error or wrong termination of input stream */
+    JDR_MEM1,   /* 3: Insufficient memory pool for the image */
+    JDR_MEM2,   /* 4: Insufficient stream input buffer */
+    JDR_PAR,    /* 5: Parameter error */
+    JDR_FMT1,   /* 6: Data format error (may be damaged data) */
+    JDR_FMT2,   /* 7: Right format but not supported */
+    JDR_FMT3    /* 8: Not supported JPEG standard */
+} JRESULT;
+
+
+
+/* Rectangular structure */
+typedef struct {
+    WORD left, right, top, bottom;
+} JRECT;
+
+
+
+/* Decompressor object structure */
+typedef struct JDEC JDEC;
+struct JDEC {
+    UINT dctr;              /* Number of bytes available in the input buffer */
+    BYTE *dptr;             /* Current data read ptr */
+    BYTE *inbuf;            /* Bit stream input buffer */
+    BYTE dmsk;              /* Current bit in the current read byte */
+    BYTE scale;             /* Output scaling ratio */
+    BYTE msx, msy;          /* MCU size in unit of block (width, height) */
+    BYTE qtid[3];           /* Quantization table ID of each component */
+    SHORT dcv[3];           /* Previous DC element of each component */
+    WORD nrst;              /* Restart inverval */
+    UINT width, height;     /* Size of the input image (pixel) */
+    BYTE *huffbits[2][2];   /* Huffman bit distribution tables [id][dcac] */
+    WORD *huffcode[2][2];   /* Huffman code word tables [id][dcac] */
+    BYTE *huffdata[2][2];   /* Huffman decoded data tables [id][dcac] */
+    LONG *qttbl[4];         /* Dequaitizer tables [id] */
+    void *workbuf;          /* Working buffer for IDCT and RGB output */
+    BYTE *mcubuf;           /* Working buffer for the MCU */
+    void *pool;             /* Pointer to available memory pool */
+    UINT sz_pool;           /* Size of momory pool (bytes available) */
+    UINT (*infunc)(JDEC *, BYTE *, UINT); /* Pointer to jpeg stream input function */
+    void *device;           /* Pointer to I/O device identifiler for the session */
+};
+
+
+
+/* TJpgDec API functions */
+JRESULT jd_prepare (JDEC *, UINT(*)(JDEC *, BYTE *, UINT), void *, UINT, void *);
+JRESULT jd_decomp (JDEC *, UINT(*)(JDEC *, void *, JRECT *), BYTE);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TJPGDEC */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/uart.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/uart.h
new file mode 100644
index 00000000000..adbae64d000
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32h2/rom/uart.h
@@ -0,0 +1,440 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_UART_H_
+#define _ROM_UART_H_
+
+#include "esp_types.h"
+#include "esp_attr.h"
+#include "ets_sys.h"
+#include "soc/soc.h"
+#include "soc/uart_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup uart_apis, uart configuration and communication related apis
+  * @brief uart apis
+  */
+
+/** @addtogroup uart_apis
+  * @{
+  */
+
+#define RX_BUFF_SIZE                     0x400
+#define TX_BUFF_SIZE                     100
+
+//uart int enalbe register ctrl bits
+#define UART_RCV_INTEN                   BIT0
+#define UART_TRX_INTEN                   BIT1
+#define UART_LINE_STATUS_INTEN           BIT2
+
+//uart int identification ctrl bits
+#define UART_INT_FLAG_MASK               0x0E
+
+//uart fifo ctrl bits
+#define UART_CLR_RCV_FIFO                BIT1
+#define UART_CLR_TRX_FIFO                BIT2
+#define UART_RCVFIFO_TRG_LVL_BITS        BIT6
+
+//uart line control bits
+#define  UART_DIV_LATCH_ACCESS_BIT       BIT7
+
+//uart line status bits
+#define  UART_RCV_DATA_RDY_FLAG          BIT0
+#define  UART_RCV_OVER_FLOW_FLAG         BIT1
+#define  UART_RCV_PARITY_ERR_FLAG        BIT2
+#define  UART_RCV_FRAME_ERR_FLAG         BIT3
+#define  UART_BRK_INT_FLAG               BIT4
+#define  UART_TRX_FIFO_EMPTY_FLAG        BIT5
+#define  UART_TRX_ALL_EMPTY_FLAG         BIT6   // include fifo and shift reg
+#define  UART_RCV_ERR_FLAG               BIT7
+
+//send and receive message frame head
+#define FRAME_FLAG                       0x7E
+
+typedef enum {
+    UART_LINE_STATUS_INT_FLAG  = 0x06,
+    UART_RCV_FIFO_INT_FLAG     = 0x04,
+    UART_RCV_TMOUT_INT_FLAG    = 0x0C,
+    UART_TXBUFF_EMPTY_INT_FLAG = 0x02
+} UartIntType;   //consider bit0 for int_flag
+
+typedef enum {
+    RCV_ONE_BYTE      = 0x0,
+    RCV_FOUR_BYTE     = 0x1,
+    RCV_EIGHT_BYTE    = 0x2,
+    RCV_FOURTEEN_BYTE = 0x3
+} UartRcvFifoTrgLvl;
+
+typedef enum {
+    FIVE_BITS  = 0x0,
+    SIX_BITS   = 0x1,
+    SEVEN_BITS = 0x2,
+    EIGHT_BITS = 0x3
+} UartBitsNum4Char;
+
+typedef enum {
+    ONE_STOP_BIT      = 1,
+    ONE_HALF_STOP_BIT = 2,
+    TWO_STOP_BIT      = 3
+} UartStopBitsNum;
+
+typedef enum {
+    NONE_BITS = 0,
+    ODD_BITS  = 2,
+    EVEN_BITS = 3
+
+} UartParityMode;
+
+typedef enum {
+    STICK_PARITY_DIS = 0,
+    STICK_PARITY_EN  = 2
+} UartExistParity;
+
+typedef enum {
+    BIT_RATE_9600   = 9600,
+    BIT_RATE_19200  = 19200,
+    BIT_RATE_38400  = 38400,
+    BIT_RATE_57600  = 57600,
+    BIT_RATE_115200 = 115200,
+    BIT_RATE_230400 = 230400,
+    BIT_RATE_460800 = 460800,
+    BIT_RATE_921600 = 921600
+} UartBautRate;
+
+typedef enum {
+    NONE_CTRL,
+    HARDWARE_CTRL,
+    XON_XOFF_CTRL
+} UartFlowCtrl;
+
+typedef enum {
+    EMPTY,
+    UNDER_WRITE,
+    WRITE_OVER
+} RcvMsgBuffState;
+
+typedef struct {
+    uint8_t *pRcvMsgBuff;
+    uint8_t *pWritePos;
+    uint8_t *pReadPos;
+    uint8_t  TrigLvl;
+    RcvMsgBuffState BuffState;
+} RcvMsgBuff;
+
+typedef struct {
+    uint32_t  TrxBuffSize;
+    uint8_t  *pTrxBuff;
+} TrxMsgBuff;
+
+typedef enum {
+    BAUD_RATE_DET,
+    WAIT_SYNC_FRM,
+    SRCH_MSG_HEAD,
+    RCV_MSG_BODY,
+    RCV_ESC_CHAR,
+} RcvMsgState;
+
+typedef struct {
+    UartBautRate     baut_rate;
+    UartBitsNum4Char data_bits;
+    UartExistParity  exist_parity;
+    UartParityMode   parity;    // chip size in byte
+    UartStopBitsNum  stop_bits;
+    UartFlowCtrl     flow_ctrl;
+    uint8_t          buff_uart_no;  //indicate which uart use tx/rx buffer
+    RcvMsgBuff       rcv_buff;
+//    TrxMsgBuff       trx_buff;
+    RcvMsgState      rcv_state;
+    int              received;
+} UartDevice;
+
+/**
+  * @brief Init uart device struct value and reset uart0/uart1 rx.
+  *        Please do not call this function in SDK.
+  *
+  * @param  rxBuffer, must be a pointer to RX_BUFF_SIZE bytes or NULL
+  *
+  * @return None
+  */
+void uartAttach(void *rxBuffer);
+
+/**
+  * @brief Init uart0 or uart1 for UART download booting mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, else for UART1.
+  *
+  * @param  uint32_t clock : clock used by uart module, to adjust baudrate.
+  *
+  * @return None
+  */
+void Uart_Init(uint8_t uart_no, uint32_t clock);
+
+/**
+  * @brief Modify uart baudrate.
+  *        This function will reset RX/TX fifo for uart.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @param  uint32_t DivLatchValue : (clock << 4)/baudrate.
+  *
+  * @return None
+  */
+void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue);
+
+/**
+  * @brief Init uart0 or uart1 for UART download booting mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module, easy to detect, wait until detected;
+  *                           1, two UART modules, hard to detect, detect and return.
+  *
+  * @return None
+  */
+int uart_baudrate_detect(uint8_t uart_no, uint8_t is_sync);
+
+/**
+  * @brief Switch printf channel of uart_tx_one_char.
+  *        Please do not call this function when printf.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None
+  */
+void uart_tx_switch(uint8_t uart_no);
+
+/**
+  * @brief Switch message exchange channel for UART download booting.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None
+  */
+void uart_buff_switch(uint8_t uart_no);
+
+/**
+  * @brief Output a char to printf channel, wait until fifo not full.
+  *
+  * @param  None
+  *
+  * @return OK.
+  */
+STATUS uart_tx_one_char(uint8_t TxChar);
+
+/**
+  * @brief Output a char to message exchange channel, wait until fifo not full.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return OK.
+  */
+STATUS uart_tx_one_char2(uint8_t TxChar);
+
+/**
+  * @brief Wait until uart tx full empty.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None.
+  */
+void uart_tx_flush(uint8_t uart_no);
+
+/**
+  * @brief Wait until uart tx full empty and the last char send ok.
+  *
+  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2
+  *
+  * The function defined in ROM code has a bug, so we define the correct version
+  * here for compatibility.
+  */
+void uart_tx_wait_idle(uint8_t uart_no);
+
+/**
+  * @brief Get an input char from message channel.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pRxChar : the pointer to store the char.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS uart_rx_one_char(uint8_t *pRxChar);
+
+/**
+  * @brief Get an input char from message channel, wait until successful.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return char : input char value.
+  */
+char uart_rx_one_char_block(void);
+
+/**
+  * @brief Get an input string line from message channel.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pString : the pointer to store the string.
+  *
+  * @param  uint8_t MaxStrlen : the max string length, incude '\0'.
+  *
+  * @return OK.
+  */
+STATUS UartRxString(uint8_t *pString, uint8_t MaxStrlen);
+
+/**
+  * @brief Process uart recevied information in the interrupt handler.
+  *        Please do not call this function in SDK.
+  *
+  * @param  void *para : the message receive buffer.
+  *
+  * @return None
+  */
+void uart_rx_intr_handler(void *para);
+
+/**
+  * @brief Get an char from receive buffer.
+  *        Please do not call this function in SDK.
+  *
+  * @param  RcvMsgBuff *pRxBuff : the pointer to the struct that include receive buffer.
+  *
+  * @param  uint8_t *pRxByte : the pointer to store the char.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS uart_rx_readbuff( RcvMsgBuff *pRxBuff, uint8_t *pRxByte);
+
+/**
+  * @brief Get all chars from receive buffer.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pCmdLn : the pointer to store the string.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS UartGetCmdLn(uint8_t *pCmdLn);
+
+/**
+  * @brief Get uart configuration struct.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return UartDevice * : uart configuration struct pointer.
+  */
+UartDevice *GetUartDevice(void);
+
+/**
+  * @brief Send an packet to download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *p : the pointer to output string.
+  *
+  * @param  int len : the string length.
+  *
+  * @return None.
+  */
+void send_packet(uint8_t *p, int len);
+
+/**
+  * @brief Receive an packet from download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *p : the pointer to input string.
+  *
+  * @param  int len : If string length > len, the string will be truncated.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module;
+  *                           1, two UART modules.
+  *
+  * @return int : the length of the string.
+  */
+int recv_packet(uint8_t *p, int len, uint8_t is_sync);
+
+/**
+  * @brief Send an packet to download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pData : the pointer to input string.
+  *
+  * @param  uint16_t DataLen : the string length.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS SendMsg(uint8_t *pData, uint16_t DataLen);
+
+/**
+  * @brief Receive an packet from download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pData : the pointer to input string.
+  *
+  * @param  uint16_t MaxDataLen : If string length > MaxDataLen, the string will be truncated.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module;
+  *                           1, two UART modules.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS RcvMsg(uint8_t *pData, uint16_t MaxDataLen, uint8_t is_sync);
+
+/**
+  * @brief Check if this UART is in download connection.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return ETS_NO_BOOT = 0 for no.
+  *         SEL_UART_BOOT = BIT(1) for yes.
+  */
+uint8_t UartConnCheck(uint8_t uart_no);
+
+/**
+  * @brief Initialize the USB ACM UART
+  * Needs to be fed a buffer of at least 128 bytes, plus any rx buffer you may want to have.
+  *
+  * @param cdc_acm_work_mem Pointer to work mem for CDC-ACM code
+  * @param cdc_acm_work_mem_len Length of work mem
+  */
+void Uart_Init_USB(void *cdc_acm_work_mem, int cdc_acm_work_mem_len);
+
+
+/**
+  * @brief Install handler to reset the chip when a RTS change has been detected on the CDC-ACM 'UART'.
+  */
+void uart_usb_enable_reset_on_rts(void);
+
+
+extern UartDevice UartDev;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_UART_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/aes.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/aes.h
new file mode 100644
index 00000000000..9350e2511ea
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/aes.h
@@ -0,0 +1,62 @@
+/*
+  ROM functions for hardware AES support.
+
+  It is not recommended to use these functions directly,
+  use the wrapper functions in hwcrypto/aes.h instead.
+
+ */
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AES_BLOCK_SIZE 16
+
+enum AES_TYPE {
+    AES_ENC,
+    AES_DEC,
+};
+
+enum AES_BITS {
+    AES128,
+    AES192,
+    AES256
+};
+
+void ets_aes_enable(void);
+
+void ets_aes_disable(void);
+
+void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap,
+                        bool in_word_swap, bool in_byte_swap,
+                        bool out_word_swap, bool out_byte_swap);
+
+int ets_aes_setkey(enum AES_TYPE type, const void *key, enum AES_BITS bits);
+
+int ets_aes_setkey_enc(const void *key, enum AES_BITS bits);
+
+int ets_aes_setkey_dec(const void *key, enum AES_BITS bits);
+
+void ets_aes_block(const void *input, void *output);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/bigint.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/bigint.h
new file mode 100644
index 00000000000..eee19d46bbf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/bigint.h
@@ -0,0 +1,50 @@
+/*
+  ROM functions for hardware bigint support.
+
+  It is not recommended to use these functions directly,
+  use the wrapper functions in hwcrypto/mpi.h instead.
+
+ */
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_BIGINT_H_
+#define _ROM_BIGINT_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void ets_bigint_enable(void);
+
+void ets_bigint_disable(void);
+
+int ets_bigint_multiply(const uint32_t *x, const uint32_t *y, uint32_t len_words);
+
+int ets_bigint_modmult(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, uint32_t len_words);
+
+int ets_bigint_modexp(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, bool constant_time, uint32_t len_words);
+
+void ets_bigint_wait_finish(void);
+
+int ets_bigint_getz(uint32_t *z, uint32_t len_words);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_BIGINT_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/cache.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/cache.h
new file mode 100644
index 00000000000..cc85512fbd1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/cache.h
@@ -0,0 +1,947 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_CACHE_H_
+#define _ROM_CACHE_H_
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup cache_apis, cache operation related apis
+  * @brief cache apis
+  */
+
+/** @addtogroup cache_apis
+  * @{
+  */
+
+#define MIN_CACHE_SIZE                  8192
+#define MAX_CACHE_SIZE                  16384
+#define MIN_CACHE_WAYS                  4
+#define MAX_CACHE_WAYS                  4
+#define MIN_CACHE_LINE_SIZE             16
+//normally should be (MAX_CACHE_SIZE / MIN_CACHE_WAYS / MIN_CACHE_LINE_SIZE), however, the items not all in one tag memory block.
+#define MAX_TAG_BLOCK_ITEMS             (MAX_CACHE_SIZE / 8 / MIN_CACHE_LINE_SIZE)
+#define TAG_SIZE                        4
+#define MAX_TAG_BLOCK_SIZE              (MAX_TAG_BLOCK_ITEMS * TAG_SIZE)
+
+#define INVALID_PHY_PAGE 0xffff
+#define ESP_CACHE_TEMP_ADDR DROM0_ADDRESS_LOW
+#define CACHE_MAX_OPERATION_SIZE BUS_ADDR_SIZE
+
+
+typedef enum {
+    CACHE_DCACHE = 0,
+    CACHE_ICACHE = 1,
+} cache_t;
+
+typedef enum {
+    CACHE_MEMORY_INVALID = 0,
+    CACHE_MEMORY_ICACHE_LOW = 1<<0,
+    CACHE_MEMORY_ICACHE_HIGH = 1<<1,
+    CACHE_MEMORY_DCACHE_LOW = 1<<2,
+    CACHE_MEMORY_DCACHE_HIGH = 1<<3,
+} cache_layout_t;
+
+#define CACHE_SIZE_8KB  CACHE_SIZE_HALF
+#define CACHE_SIZE_16KB CACHE_SIZE_FULL
+typedef enum {
+    CACHE_SIZE_HALF = 0,                /*!< 8KB for icache and dcache */
+    CACHE_SIZE_FULL = 1,                /*!< 16KB for icache and dcache */
+} cache_size_t;
+
+typedef enum {
+    CACHE_4WAYS_ASSOC = 0,              /*!< 4 way associated cache */
+} cache_ways_t;
+
+typedef enum {
+    CACHE_LINE_SIZE_16B = 0,            /*!< 16 Byte cache line size */
+    CACHE_LINE_SIZE_32B = 1,            /*!< 32 Byte cache line size */
+} cache_line_size_t;
+
+typedef enum {
+    CACHE_AUTOLOAD_POSITIVE = 0,        /*!< cache autoload step is positive */
+    CACHE_AUTOLOAD_NEGATIVE = 1,        /*!< cache autoload step is negative */
+} cache_autoload_order_t;
+
+#define CACHE_AUTOLOAD_STEP(i) ((i) - 1)
+
+typedef enum {
+    CACHE_AUTOLOAD_MISS_TRIGGER = 0,    /*!< autoload only triggered by cache miss */
+    CACHE_AUTOLOAD_HIT_TRIGGER  = 1,    /*!< autoload only triggered by cache hit */
+    CACHE_AUTOLOAD_BOTH_TRIGGER = 2,    /*!< autoload triggered both by cache miss and hit */
+} cache_autoload_trigger_t;
+
+struct cache_mode {
+    uint32_t cache_size;                /*!< cache size in byte */
+    uint16_t cache_line_size;           /*!< cache line size in byte */
+    uint8_t cache_ways;                 /*!< cache ways, always 4 */
+    uint8_t icache;                     /*!< the cache index, 0 for dcache, 1 for icache */
+};
+
+struct tag_item {
+    uint32_t dirty:1;                   /*!< the cache line value is dirty or not */
+    uint32_t tag:14;                    /*!< the tag is the high part of the cache address, however is only 16MB range, and with out low part */
+    uint32_t valid:1;                   /*!< the tag item is valid or not */
+    uint32_t fifo_cnt:3;                /*!< fifo cnt, 0 ~ 3 for 4 ways cache, 0 ~ 7 for 8 ways cache */
+    uint32_t lock:1;                    /*!< the cache line is locked or not */
+    uint32_t attr:3;                    /*!< the attribute of the external memory physical address */
+    uint32_t access:1;                  /*!< software accessable, used by hardware */
+    uint32_t reserved:8;
+};
+
+struct autoload_config {
+    uint8_t order;                      /*!< autoload step is positive or negative */
+    uint8_t trigger;                    /*!< autoload trigger */
+    uint8_t ena0;                       /*!< autoload region0 enable */
+    uint8_t ena1;                       /*!< autoload region1 enable */
+    uint32_t addr0;                     /*!< autoload region0 start address */
+    uint32_t size0;                     /*!< autoload region0 size */
+    uint32_t addr1;                     /*!< autoload region1 start address */
+    uint32_t size1;                     /*!< autoload region1 size */
+};
+
+struct tag_group_info {
+    struct cache_mode mode;                         /*!< cache and cache mode */
+    uint32_t filter_addr;                           /*!< the address that used to generate the struct */
+    uint32_t vaddr_offset;		            /*!< virtual address offset of the cache ways */
+    uint32_t tag_addr[MAX_CACHE_WAYS];              /*!< tag memory address, only [0~mode.ways-1] is valid to use */
+    uint32_t cache_memory_offset[MAX_CACHE_WAYS];   /*!< cache memory address, only [0~mode.ways-1] is valid to use */
+};
+
+struct lock_config {
+    uint32_t addr;                                  /*!< manual lock address*/
+    uint16_t size;                                  /*!< manual lock size*/
+    uint16_t group;                                 /*!< manual lock group, 0 or 1*/
+};
+
+#define ESP_ROM_ERR_INVALID_ARG         1
+#define MMU_SET_ADDR_ALIGNED_ERROR      2
+#define MMU_SET_PASE_SIZE_ERROR         3
+#define MMU_SET_VADDR_OUT_RANGE         4
+
+/**
+  * @brief Initialise cache mmu, mark all entries as invalid.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_MMU_Init(void);
+
+/**
+  * @brief Set ICache mmu mapping.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_ACCESS_SPIRAM for spiram, DPORT_MMU_INVALID for invalid.
+  *
+  * @param  uint32_t vaddr : virtual address in CPU address space.
+  *                              Can be Iram0,Iram1,Irom0,Drom0 and AHB buses address.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t paddr : physical address in external memory.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t psize : page size of ICache, in kilobytes. Should be 64 here.
+  *
+  * @param  uint32_t num : pages to be set.
+  *
+  * @param  uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
+  *
+  * @return uint32_t: error status
+  *                   0 : mmu set success
+  *                   2 : vaddr or paddr is not aligned
+  *                   3 : psize error
+  *                   4 : vaddr is out of range
+  */
+int Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr,  uint32_t psize, uint32_t num, uint32_t fixed);
+
+/**
+  * @brief Set DCache mmu mapping.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_ACCESS_SPIRAM for spiram, DPORT_MMU_INVALID for invalid.
+  *
+  * @param  uint32_t vaddr : virtual address in CPU address space.
+  *                              Can be DRam0, DRam1, DRom0, DPort and AHB buses address.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t paddr : physical address in external memory.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t psize : page size of DCache, in kilobytes. Should be 64 here.
+  *
+  * @param  uint32_t num : pages to be set.
+
+  * @param  uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
+  *
+  * @return uint32_t: error status
+  *                   0 : mmu set success
+  *                   2 : vaddr or paddr is not aligned
+  *                   3 : psize error
+  *                   4 : vaddr is out of range
+  */
+int Cache_Dbus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
+
+/**
+  * @brief Count the pages in the bus room address which map to Flash.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t bus : the bus to count with.
+  *
+  * @param uint32_t * page0_mapped : value should be initial by user, 0 for not mapped, other for mapped count.
+  *
+  * return uint32_t : the number of pages which map to Flash.
+  */
+uint32_t Cache_Count_Flash_Pages(uint32_t bus, uint32_t * page0_mapped);
+
+/**
+  * @brief Copy Instruction or rodata from Flash to SPIRAM, and remap to SPIRAM.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t bus : the bus which need to copy to SPIRAM.
+  *
+  * @param uint32_t bus_start_addr : the start virtual address for the bus.
+  *
+  * @param uint32_t start_page : the start (64KB) page number in SPIRAM.
+  *
+  * @param uint32_t * page0_page : the flash page0 in SPIRAM page number, 0xffff for invalid.
+  *
+  * return uint32_t : the next start page number for SPIRAM not mapped.
+  */
+uint32_t Cache_Flash_To_SPIRAM_Copy(uint32_t bus, uint32_t bus_start_addr, uint32_t start_page, uint32_t * page0_page);
+
+
+/**
+  * @brief allocate memory to used by ICache and DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_layout_t sram0_layout : the usage of first 8KB internal memory block, can be CACHE_MEMORY_INVALID, CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_ICACHE_HIGH, CACHE_MEMORY_DCACHE_LOW and CACHE_MEMORY_DCACHE_HIGH
+  *
+  * @param cache_layout_t sram1_layout : the usage of second 8KB internal memory block
+  *
+  * @param cache_layout_t sram2_layout : the usage of third 8KB internal memory block
+  *
+  * @param cache_layout_t sram3_layout : the usage of forth 8KB internal memory block
+  *
+  * return none
+  */
+void Cache_Allocate_SRAM(cache_layout_t sram0_layout, cache_layout_t sram1_layout, cache_layout_t sram2_layout, cache_layout_t sram3_layout);
+
+/**
+  * @brief Get cache mode of ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct cache_mode * mode : the pointer of cache mode struct, caller should set the icache field
+  *
+  * return none
+  */
+void Cache_Get_Mode(struct cache_mode * mode);
+
+/**
+  * @brief set ICache modes: cache size, associate ways and cache line size.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
+  *
+  * @param cache_ways_t ways : the associate ways of cache, can only be CACHE_4WAYS_ASSOC
+  *
+  * @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B
+  *
+  * return none
+  */
+void Cache_Set_ICache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
+
+/**
+  * @brief set DCache modes: cache size, associate ways and cache line size.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
+  *
+  * @param cache_ways_t ways : the associate ways of cache, can only be CACHE_4WAYS_ASSOC
+  *
+  * @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B
+  *
+  * return none
+  */
+void Cache_Set_DCache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
+
+/**
+  * @brief check if the address is accessed through ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : the address to check.
+  *
+  * @return 1 if the address is accessed through ICache, 0 if not.
+  */
+uint32_t Cache_Address_Through_ICache(uint32_t addr);
+
+/**
+  * @brief check if the address is accessed through DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : the address to check.
+  *
+  * @return 1 if the address is accessed through DCache, 0 if not.
+  */
+uint32_t Cache_Address_Through_DCache(uint32_t addr);
+
+/**
+  * @brief Invalidate the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to invalidate
+  *
+  * @param  uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(4MB)
+  *
+  * @return None
+  */
+void Cache_Invalidate_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Invalidate the cache items for DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to invalidate
+  *
+  * @param  uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(4MB)
+  *
+  * @return None
+  */
+void Cache_Invalidate_DCache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Clean the dirty bit of cache Items of DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to Clean
+  *
+  * @param  uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(4MB)
+  *
+  * @return None
+  */
+void Cache_Clean_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Write back the cache items of DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to write back
+  *
+  * @param  uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(4MB)
+  *
+  * @return None
+  */
+void Cache_WriteBack_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Invalidate the Cache items in the region from ICache or DCache.
+  *        If the region is not in Cache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : invalidated region start address.
+  *
+  * @param  uint32_t size : invalidated region size.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Invalidate_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Clean the dirty bit of Cache items in the region from DCache.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : cleaned region start address.
+  *
+  * @param  uint32_t size : cleaned region size.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Clean_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Writeback the Cache items(also clean the dirty bit) in the region from DCache.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : writeback region start address.
+  *
+  * @param  uint32_t size : writeback region size.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_WriteBack_Addr(uint32_t addr, uint32_t size);
+
+
+/**
+  * @brief Invalidate all cache items in ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Invalidate_ICache_All(void);
+
+/**
+  * @brief Invalidate all cache items in DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Invalidate_DCache_All(void);
+
+/**
+  * @brief Clean the dirty bit of all cache items in DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Clean_All(void);
+
+/**
+  * @brief WriteBack all cache items in DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_WriteBack_All(void);
+
+/**
+  * @brief Mask all buses through ICache and DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Mask_All(void);
+
+/**
+  * @brief UnMask DRom0 bus through ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_UnMask_Drom0(void);
+
+/**
+  * @brief Suspend ICache auto preload operation, then you can resume it after some ICache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for ICache not auto preload before suspend.
+  */
+uint32_t Cache_Suspend_ICache_Autoload(void);
+
+/**
+  * @brief Resume ICache auto preload operation after some ICache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for ICache not auto preload before suspend.
+  *
+  * @return None.
+  */
+void Cache_Resume_ICache_Autoload(uint32_t autoload);
+
+/**
+  * @brief Suspend DCache auto preload operation, then you can resume it after some DCache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for DCache not auto preload before suspend.
+  */
+uint32_t Cache_Suspend_DCache_Autoload(void);
+
+/**
+  * @brief Resume DCache auto preload operation after some DCache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for DCache not auto preload before suspend.
+  *
+  * @return None.
+  */
+void Cache_Resume_DCache_Autoload(uint32_t autoload);
+
+/**
+  * @brief Start an ICache manual preload, will suspend auto preload of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of the preload region.
+  *
+  * @param uint32_t size : size of the preload region, should not exceed the size of ICache.
+  *
+  * @param uint32_t order : the preload order, 0 for positive, other for negative
+  *
+  * @return uint32_t : 0 for ICache not auto preload before manual preload.
+  */
+uint32_t Cache_Start_ICache_Preload(uint32_t addr, uint32_t size, uint32_t order);
+
+/**
+  * @brief Return if the ICache manual preload done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for ICache manual preload not done.
+  */
+uint32_t Cache_ICache_Preload_Done(void);
+
+/**
+  * @brief End the ICache manual preload to resume auto preload of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for ICache not auto preload before manual preload.
+  *
+  * @return None
+  */
+void Cache_End_ICache_Preload(uint32_t autoload);
+
+/**
+  * @brief Start an DCache manual preload, will suspend auto preload of DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of the preload region.
+  *
+  * @param uint32_t size : size of the preload region, should not exceed the size of DCache.
+  *
+  * @param uint32_t order : the preload order, 0 for positive, other for negative
+  *
+  * @return uint32_t : 0 for DCache not auto preload before manual preload.
+  */
+uint32_t Cache_Start_DCache_Preload(uint32_t addr, uint32_t size, uint32_t order);
+
+/**
+  * @brief Return if the DCache manual preload done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for DCache manual preload not done.
+  */
+uint32_t Cache_DCache_Preload_Done(void);
+
+/**
+  * @brief End the DCache manual preload to resume auto preload of DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for DCache not auto preload before manual preload.
+  *
+  * @return None
+  */
+void Cache_End_DCache_Preload(uint32_t autoload);
+
+/**
+  * @brief Config autoload parameters of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct autoload_config * config : autoload parameters.
+  *
+  * @return None
+  */
+void Cache_Config_ICache_Autoload(const struct autoload_config * config);
+
+/**
+  * @brief Enable auto preload for ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Enable_ICache_Autoload(void);
+
+/**
+  * @brief Disable auto preload for ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Disable_ICache_Autoload(void);
+
+/**
+  * @brief Config autoload parameters of DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct autoload_config * config : autoload parameters.
+  *
+  * @return None
+  */
+void Cache_Config_DCache_Autoload(const struct autoload_config * config);
+
+/**
+  * @brief Enable auto preload for DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Enable_DCache_Autoload(void);
+
+/**
+  * @brief Disable auto preload for DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Disable_DCache_Autoload(void);
+
+/**
+  * @brief Config a group of prelock parameters of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct lock_config * config : a group of lock parameters.
+  *
+  * @return None
+  */
+
+void Cache_Enable_ICache_PreLock(const struct lock_config *config);
+
+/**
+  * @brief Disable a group of prelock parameters for ICache.
+  *        However, the locked data will not be released.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint16_t group : 0 for group0, 1 for group1.
+  *
+  * @return None
+  */
+void Cache_Disable_ICache_PreLock(uint16_t group);
+
+/**
+  * @brief Lock the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to lock
+  *
+  * @param  uint32_t items: cache lines to lock, items * cache_line_size should not exceed the bus address size(4MB)
+  *
+  * @return None
+  */
+void Cache_Lock_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Unlock the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to unlock
+  *
+  * @param  uint32_t items: cache lines to unlock, items * cache_line_size should not exceed the bus address size(4MB)
+  *
+  * @return None
+  */
+void Cache_Unlock_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Config a group of prelock parameters of DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct lock_config * config : a group of lock parameters.
+  *
+  * @return None
+  */
+void Cache_Enable_DCache_PreLock(const struct lock_config *config);
+
+/**
+  * @brief Disable a group of prelock parameters for DCache.
+  *        However, the locked data will not be released.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint16_t group : 0 for group0, 1 for group1.
+  *
+  * @return None
+  */
+void Cache_Disable_DCache_PreLock(uint16_t group);
+
+/**
+  * @brief Lock the cache items for DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to lock
+  *
+  * @param  uint32_t items: cache lines to lock, items * cache_line_size should not exceed the bus address size(4MB)
+  *
+  * @return None
+  */
+void Cache_Lock_DCache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Unlock the cache items for DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to unlock
+  *
+  * @param  uint32_t items: cache lines to unlock, items * cache_line_size should not exceed the bus address size(4MB)
+  *
+  * @return None
+  */
+void Cache_Unlock_DCache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Lock the cache items in tag memory for ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of lock region.
+  *
+  * @param uint32_t size : size of lock region.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Lock_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Unlock the cache items in tag memory for ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of unlock region.
+  *
+  * @param uint32_t size : size of unlock region.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Unlock_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Disable ICache access for the cpu.
+  *        This operation will make all ICache tag memory invalid, CPU can't access ICache, ICache will keep idle.
+  *        Please do not call this function in your SDK application.
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Disable_ICache(void);
+
+/**
+  * @brief Enable ICache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : ICache will preload then.
+  *
+  * @return None
+  */
+void Cache_Enable_ICache(uint32_t autoload);
+
+/**
+  * @brief Disable DCache access for the cpu.
+  *        This operation will make all DCache tag memory invalid, CPU can't access DCache, DCache will keep idle
+  *        Please do not call this function in your SDK application.
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Disable_DCache(void);
+
+/**
+  * @brief Enable DCache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : DCache will preload then.
+  *
+  * @return None
+  */
+void Cache_Enable_DCache(uint32_t autoload);
+
+/**
+  * @brief Suspend ICache access for the cpu.
+  *        The ICache tag memory is still there, CPU can't access ICache, ICache will keep idle.
+  *        Please do not change MMU, cache mode or tag memory(tag memory can be changed in some special case).
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Suspend_ICache(void);
+
+/**
+  * @brief Resume ICache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : ICache will preload then.
+  *
+  * @return None
+  */
+void Cache_Resume_ICache(uint32_t autoload);
+
+/**
+  * @brief Suspend DCache access for the cpu.
+  *        The ICache tag memory is still there, CPU can't access DCache, DCache will keep idle.
+  ×        Please do not change MMU, cache mode or tag memory(tag memory can be changed in some special case).
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Suspend_DCache(void);
+
+/**
+  * @brief Resume DCache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : DCache will preload then.
+  *
+  * @return None
+  */
+void Cache_Resume_DCache(uint32_t autoload);
+
+/**
+  * @brief Get ICache cache line size
+  *
+  * @param  None
+  *
+  * @return uint32_t: 16, 32 Byte
+  */
+uint32_t Cache_Get_ICache_Line_Size(void);
+
+/**
+  * @brief Get DCache cache line size
+  *
+  * @param  None
+  *
+  * @return uint32_t: 16, 32 Byte
+  */
+uint32_t Cache_Get_DCache_Line_Size(void);
+
+/**
+  * @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Set_Default_Mode(void);
+
+/**
+  * @brief Set default mode from boot, 8KB DCache, 16Byte cache line size.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Enable_Defalut_DCache_Mode(void);
+
+/**
+  * @brief Travel tag memory to run a call back function.
+  *        ICache and DCache are suspend when doing this.
+  *        The callback will get the parameter tag_group_info, which will include a group of tag memory addresses and cache memory addresses.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to check and the cache mode.
+  *
+  * @param  uint32_t filter_addr : only the cache lines which may include the filter_address will be returned to the call back function.
+  *                                0 for do not filter, all cache lines will be returned.
+  *
+  * @param  void (* process)(struct tag_group_info *) : call back function, which may be called many times, a group(the addresses in the group are in the same position in the cache ways) a time.
+  *
+  * @return None
+  */
+void Cache_Travel_Tag_Memory(struct cache_mode * mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
+
+/**
+  * @brief Get the virtual address from cache mode, cache tag and the virtual address offset of cache ways.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
+  *
+  * @param  uint32_t tag : the tag part fo a tag item, 12-14 bits.
+  *
+  * @param  uint32_t addr_offset : the virtual address offset of the cache ways.
+  *
+  * @return uint32_t : the virtual address.
+  */
+uint32_t Cache_Get_Virtual_Addr(struct cache_mode *mode, uint32_t tag, uint32_t vaddr_offset);
+
+/**
+  * @brief Get cache memory block base address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t icache : 0 for dcache, other for icache.
+  *
+  * @param  uint32_t high : 0 for low part block, 1 for high part block.
+  *
+  * @return uint32_t : the cache memory block base address, 0 if the block not used.
+  */
+uint32_t Cache_Get_Memory_BaseAddr(uint32_t icache, uint32_t high);
+
+/**
+  * @brief Get the cache memory address from cache mode, cache memory offset and the virtual address offset of cache ways.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
+  *
+  * @param  uint32_t cache_memory_offset : the cache memory offset of the whole cache (ICache or DCache) for the cache line.
+  *
+  * @param  uint32_t addr_offset : the virtual address offset of the cache ways.
+  *
+  * @return uint32_t : the virtual address.
+  */
+uint32_t Cache_Get_Memory_Addr(struct cache_mode *mode, uint32_t cache_memory_offset, uint32_t vaddr_offset);
+
+/**
+  * @brief Get the cache memory value by DRAM address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t cache_memory_addr : DRAM address for the cache memory.
+  *
+  * @return uint32_t : the word value of the address.
+  */
+uint32_t Cache_Get_Memory_value(uint32_t cache_memory_addr);
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_CACHE_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/crc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/crc.h
new file mode 100644
index 00000000000..0d139795761
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/crc.h
@@ -0,0 +1,88 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef ROM_CRC_H
+#define ROM_CRC_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup crc_apis, uart configuration and communication related apis
+  * @brief crc apis
+  */
+
+/** @addtogroup crc_apis
+  * @{
+  */
+
+
+/* Standard CRC8/16/32 algorithms. */
+// CRC-8        x8+x2+x1+1              0x07
+// CRC16-CCITT  x16+x12+x5+1   1021   ISO HDLC, ITU X.25, V.34/V.41/V.42, PPP-FCS
+// CRC32:
+//G(x) = x32 +x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x1 + 1
+//If your buf is not continuous, you can use the first result to be the second parameter.
+
+/**
+  * @brief Crc32 value that is in little endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint32_t crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc16 value that is in little endian.
+  *
+  * @param  uint16_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint16_t crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc8 value that is in little endian.
+  *
+  * @param  uint8_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint8_t crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/digital_signature.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/digital_signature.h
new file mode 100644
index 00000000000..9f23a5d6b86
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/digital_signature.h
@@ -0,0 +1,147 @@
+/*
+  ROM functions for hardware Digital Signature peripheral verification
+*/
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#define ETS_DS_IV_LEN 16
+
+/* Length of parameter 'C' stored in flash */
+#define ETS_DS_C_LEN (12672 / 8)
+
+/* Encrypted ETS data. Recommended to store in flash in this format.
+ */
+typedef struct {
+    /* RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 4096).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     */
+    unsigned rsa_length;
+
+    /* IV value used to encrypt 'c' */
+    uint8_t iv[ETS_DS_IV_LEN];
+
+    /* Encrypted Digital Signature parameters. Result of AES-CBC encryption
+       of plaintext values. Includes an encrypted message digest.
+    */
+    uint8_t c[ETS_DS_C_LEN];
+} ets_ds_data_t;
+
+typedef enum {
+    ETS_DS_OK,
+    ETS_DS_INVALID_PARAM,   /* Supplied parameters are invalid */
+    ETS_DS_INVALID_KEY,     /* HMAC peripheral failed to supply key */
+    ETS_DS_INVALID_PADDING, /* 'c' decrypted with invalid padding */
+    ETS_DS_INVALID_DIGEST,  /* 'c' decrypted with invalid digest */
+} ets_ds_result_t;
+
+void ets_ds_enable(void);
+
+void ets_ds_disable(void);
+
+
+/*
+ * @brief Start signing a message (or padded message digest) using the Digital Signature peripheral
+ *
+ * - @param message Pointer to message (or padded digest) containing the message to sign. Should be
+ *   (data->rsa_length + 1)*4 bytes long.  @param data Pointer to DS data. Can be a pointer to data
+ *   in flash.
+ *
+ * Caller must have already called ets_ds_enable() and ets_hmac_calculate_downstream() before calling
+ * this function, and is responsible for calling ets_ds_finish_sign() and then
+ * ets_hmac_invalidate_downstream() afterwards.
+ *
+ * @return ETS_DS_OK if signature is in progress, ETS_DS_INVALID_PARAM if param is invalid,
+ * EST_DS_INVALID_KEY if key or HMAC peripheral is configured incorrectly.
+ */
+ets_ds_result_t ets_ds_start_sign(const void *message, const ets_ds_data_t *data);
+
+
+/*
+ * @brief Returns true if the DS peripheral is busy following a call to ets_ds_start_sign()
+ *
+ * A result of false indicates that a call to ets_ds_finish_sign() will not block.
+ *
+ * Only valid if ets_ds_enable() has been called.
+ */
+bool ets_ds_is_busy(void);
+
+
+/* @brief Finish signing a message using the Digital Signature peripheral
+ *
+ * Must be called after ets_ds_start_sign(). Can use ets_ds_busy() to wait until
+ * peripheral is no longer busy.
+ *
+ * - @param signature Pointer to buffer to contain the signature. Should be
+ *   (data->rsa_length + 1)*4 bytes long.
+ * - @param data Should match the 'data' parameter passed to ets_ds_start_sign()
+ *
+ * @param ETS_DS_OK if signing succeeded, ETS_DS_INVALID_PARAM if param is invalid,
+ * ETS_DS_INVALID_DIGEST or ETS_DS_INVALID_PADDING if there is a problem with the
+ * encrypted data digest or padding bytes (in case of ETS_DS_INVALID_PADDING, a
+ * digest is produced anyhow.)
+ */
+ets_ds_result_t ets_ds_finish_sign(void *signature, const ets_ds_data_t *data);
+
+
+/* Plaintext parameters used by Digital Signature.
+
+   Not used for signing with DS peripheral, but can be encrypted
+   in-device by calling ets_ds_encrypt_params()
+*/
+typedef struct {
+    uint32_t Y[4096/32];
+    uint32_t M[4096/32];
+    uint32_t Rb[4096/32];
+    uint32_t M_prime;
+    uint32_t length;
+} ets_ds_p_data_t;
+
+typedef enum {
+    ETS_DS_KEY_HMAC, /* The HMAC key (as stored in efuse) */
+    ETS_DS_KEY_AES,  /* The AES key (as derived from HMAC key by HMAC peripheral in downstream mode) */
+} ets_ds_key_t;
+
+/* @brief Encrypt DS parameters suitable for storing and later use with DS peripheral
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the corresponding HMAC key will be stored to efuse and then permanently erased.
+ * @param key_type Type of key stored in 'key' (either the AES-256 DS key, or an HMAC DS key from which the AES DS key is derived using HMAC peripheral)
+ *
+ * @return ETS_DS_INVALID_PARAM if any parameter is invalid, or ETS_DS_OK if 'data' is successfully generated from the input parameters.
+ */
+ets_ds_result_t ets_ds_encrypt_params(ets_ds_data_t *data, const void *iv, const ets_ds_p_data_t *p_data, const void *key, ets_ds_key_t key_type);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/efuse.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/efuse.h
new file mode 100644
index 00000000000..ae887278bdf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/efuse.h
@@ -0,0 +1,393 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_EFUSE_H_
+#define _ROM_EFUSE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdlib.h>
+#include <stdbool.h>
+
+/** \defgroup efuse_APIs efuse APIs
+  * @brief     ESP32 efuse read/write APIs
+  * @attention
+  *
+  */
+
+/** @addtogroup efuse_APIs
+  * @{
+  */
+
+typedef enum {
+    ETS_EFUSE_KEY_PURPOSE_USER = 0,
+    ETS_EFUSE_KEY_PURPOSE_RESERVED = 1,
+    ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 = 2,
+    ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 = 3,
+    ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_UP = 8,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
+    ETS_EFUSE_KEY_PURPOSE_MAX,
+} ets_efuse_purpose_t;
+
+typedef enum {
+    ETS_EFUSE_BLOCK0 = 0,
+    ETS_EFUSE_MAC_SPI_SYS_0 = 1,
+    ETS_EFUSE_BLOCK_SYS_DATA = 2,
+    ETS_EFUSE_BLOCK_USR_DATA = 3,
+    ETS_EFUSE_BLOCK_KEY0 = 4,
+    ETS_EFUSE_BLOCK_KEY1 = 5,
+    ETS_EFUSE_BLOCK_KEY2 = 6,
+    ETS_EFUSE_BLOCK_KEY3 = 7,
+    ETS_EFUSE_BLOCK_KEY4 = 8,
+    ETS_EFUSE_BLOCK_KEY5 = 9,
+    ETS_EFUSE_BLOCK_KEY6 = 10,
+    ETS_EFUSE_BLOCK_MAX,
+} ets_efuse_block_t;
+
+/**
+ * @brief set timing accroding the apb clock, so no read error or write error happens.
+ *
+ * @param clock: apb clock in HZ, only accept 20M, 40M, 80M.
+ *
+ * @return : 0 if success, others if clock not accepted
+ */
+int ets_efuse_set_timing(uint32_t clock);
+
+/**
+ * @brief Enable efuse subsystem. Called after reset. Doesn't need to be called again.
+ */
+void ets_efuse_start(void);
+
+/**
+  * @brief  Efuse read operation: copies data from physical efuses to efuse read registers.
+  *
+  * @param  null
+  *
+  * @return : 0 is success, others if apb clock is not accepted
+  */
+int  ets_efuse_read(void);
+
+/**
+  * @brief  Efuse write operation: Copies data from efuse write registers to efuse. Operates on a single block of efuses at a time.
+  *
+  * @note This function does not update read efuses, call ets_efuse_read() once all programming is complete.
+  *
+  * @return : 0 is success, others if apb clock is not accepted
+  */
+int ets_efuse_program(ets_efuse_block_t block);
+
+/**
+ * @brief Set all Efuse program registers to zero.
+ *
+ * Call this before writing new data to the program registers.
+ */
+void ets_efuse_clear_program_registers(void);
+
+/**
+ * @brief Program a block of key data to an efuse block
+ *
+ * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6. Key block must be unused (@ref ets_efuse_key_block_unused).
+ * @param purpose Purpose to set for this key. Purpose must be already unset.
+ * @param data Pointer to data to write.
+ * @param data_len Length of data to write.
+ *
+ * @note This function also calls ets_efuse_program() for the specified block, and for block 0 (setting the purpose)
+ */
+int ets_efuse_write_key(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose, const void *data, size_t data_len);
+
+
+/* @brief Return the address of a particular efuse block's first read register
+ *
+ * @param block Index of efuse block to look up
+ *
+ * @return 0 if block is invalid, otherwise a numeric read register address
+ * of the first word in the block.
+ */
+uint32_t ets_efuse_get_read_register_address(ets_efuse_block_t block);
+
+/**
+ * @brief Return the current purpose set for an efuse key block
+ *
+ * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6.
+ */
+ets_efuse_purpose_t ets_efuse_get_key_purpose(ets_efuse_block_t key_block);
+
+/**
+ * @brief Find a key block with the particular purpose set
+ *
+ * @param purpose Purpose to search for.
+ * @param[out] key_block Pointer which will be set to the key block if found. Can be NULL, if only need to test the key block exists.
+ * @return true if found, false if not found. If false, value at key_block pointer is unchanged.
+ */
+bool ets_efuse_find_purpose(ets_efuse_purpose_t purpose, ets_efuse_block_t *key_block);
+
+/**
+ * Return true if the key block is unused, false otherwise.
+ *
+ * An unused key block is all zero content, not read or write protected,
+ * and has purpose 0 (ETS_EFUSE_KEY_PURPOSE_USER)
+ *
+ * @param key_block key block to check.
+ *
+ * @return true if key block is unused, false if key block or used
+ * or the specified block index is not a key block.
+ */
+bool ets_efuse_key_block_unused(ets_efuse_block_t key_block);
+
+
+/**
+ * @brief Search for an unused key block and return the first one found.
+ *
+ * See @ref ets_efuse_key_block_unused for a description of an unused key block.
+ *
+ * @return First unused key block, or ETS_EFUSE_BLOCK_MAX if no unused key block is found.
+ */
+ets_efuse_block_t ets_efuse_find_unused_key_block(void);
+
+/**
+ * @brief Return the number of unused efuse key blocks (0-6)
+ */
+unsigned ets_efuse_count_unused_key_blocks(void);
+
+/**
+ * @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
+ *
+ * @param data Pointer to data buffer (length 32 bytes)
+ * @param rs_values Pointer to write encoded data to (length 12 bytes)
+ */
+void ets_efuse_rs_calculate(const void *data, void *rs_values);
+
+/**
+  * @brief  Read spi flash pads configuration from Efuse
+  *
+  * @return
+  * - 0 for default SPI pins.
+  * - 1 for default HSPI pins.
+  * - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
+  *   EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
+  *   WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
+  */
+uint32_t ets_efuse_get_spiconfig(void);
+
+/**
+  * @brief  Read spi flash wp pad from Efuse
+  *
+  * @return
+  * - 0x3f for invalid.
+  * - 0~46 is valid.
+  */
+uint32_t ets_efuse_get_wp_pad(void);
+
+/**
+ * @brief Read opi flash pads configuration from Efuse
+ *
+ * @return
+ * - 0 for default SPI pins.
+ * - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for:
+ *   DQS, D4, D5, D6, D7 accordingly.
+ */
+uint32_t ets_efuse_get_opiconfig(void);
+
+/**
+  * @brief  Read if download mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable download mode.
+  * - false for efuse doesn't disable download mode.
+  */
+bool ets_efuse_download_modes_disabled(void);
+
+/**
+  * @brief  Read if legacy spi flash boot mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable legacy spi flash boot mode.
+  * - false for efuse doesn't disable legacy spi flash boot mode.
+  */
+bool ets_efuse_legacy_spi_boot_mode_disabled(void);
+
+/**
+  * @brief  Read if uart print control value from Efuse
+  *
+  * @return
+  * - 0 for uart force print.
+  * - 1 for uart print when GPIO46 is low when digital reset.
+  *   2 for uart print when GPIO46 is high when digital reset.
+  *   3 for uart force slient
+  */
+uint32_t ets_efuse_get_uart_print_control(void);
+
+/**
+  * @brief  Read which channel will used by ROM to print
+  *
+  * @return
+  * - 0 for UART0.
+  * - 1 for UART1.
+  */
+uint32_t ets_efuse_get_uart_print_channel(void);
+
+/**
+  * @brief  Read if usb download mode disabled from Efuse
+  *
+  * (Also returns true if security download mode is enabled, as this mode
+  * disables USB download.)
+  *
+  * @return
+  * - true for efuse disable usb download mode.
+  * - false for efuse doesn't disable usb download mode.
+  */
+bool ets_efuse_usb_download_mode_disabled(void);
+
+/**
+  * @brief  Read if tiny basic mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable tiny basic mode.
+  * - false for efuse doesn't disable tiny basic mode.
+  */
+bool ets_efuse_tiny_basic_mode_disabled(void);
+
+/**
+  * @brief  Read if usb module disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable usb module.
+  * - false for efuse doesn't disable usb module.
+  */
+bool ets_efuse_usb_module_disabled(void);
+
+/**
+  * @brief  Read if security download modes enabled from Efuse
+  *
+  * @return
+  * - true for efuse enable security download mode.
+  * - false for efuse doesn't enable security download mode.
+  */
+bool ets_efuse_security_download_modes_enabled(void);
+
+/**
+ * @brief Return true if secure boot is enabled in EFuse
+ */
+bool ets_efuse_secure_boot_enabled(void);
+
+/**
+ * @brief Return true if secure boot aggressive revoke is enabled in EFuse
+ */
+bool ets_efuse_secure_boot_aggressive_revoke_enabled(void);
+
+/**
+ * @brief Return true if cache encryption (flash, PSRAM, etc) is enabled from boot via EFuse
+ */
+bool ets_efuse_cache_encryption_enabled(void);
+
+/**
+ * @brief Return true if EFuse indicates an external phy needs to be used for USB
+ */
+bool ets_efuse_usb_use_ext_phy(void);
+
+/**
+ * @brief Return true if EFuse indicates USB device persistence is disabled
+ */
+bool ets_efuse_usb_force_nopersist(void);
+
+/**
+ * @brief Return true if OPI pins GPIO33-37 are powered by VDDSPI, otherwise by VDD33CPU
+ */
+bool ets_efuse_flash_opi_5pads_power_sel_vddspi(void);
+
+/**
+ * @brief Return true if EFuse indicates an opi flash is attached.
+ */
+bool ets_efuse_flash_opi_mode(void);
+
+/**
+ * @brief Return true if EFuse indicates to send a flash resume command.
+ */
+bool ets_efuse_force_send_resume(void);
+
+/**
+  * @brief  return the time in us ROM boot need wait flash to power on from Efuse
+  *
+  * @return
+  * - uint32_t the time in us.
+  */
+uint32_t ets_efuse_get_flash_delay_us(void);
+
+#define EFUSE_SPICONFIG_SPI_DEFAULTS 0
+#define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
+
+#define EFUSE_SPICONFIG_RET_SPICLK_MASK         0x3f
+#define EFUSE_SPICONFIG_RET_SPICLK_SHIFT        0
+#define EFUSE_SPICONFIG_RET_SPICLK(ret)         (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPIQ_MASK           0x3f
+#define EFUSE_SPICONFIG_RET_SPIQ_SHIFT          6
+#define EFUSE_SPICONFIG_RET_SPIQ(ret)           (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPID_MASK           0x3f
+#define EFUSE_SPICONFIG_RET_SPID_SHIFT          12
+#define EFUSE_SPICONFIG_RET_SPID(ret)           (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPICS0_MASK         0x3f
+#define EFUSE_SPICONFIG_RET_SPICS0_SHIFT        18
+#define EFUSE_SPICONFIG_RET_SPICS0(ret)         (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
+
+
+#define EFUSE_SPICONFIG_RET_SPIHD_MASK          0x3f
+#define EFUSE_SPICONFIG_RET_SPIHD_SHIFT         24
+#define EFUSE_SPICONFIG_RET_SPIHD(ret)          (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
+
+/**
+ * @brief Enable JTAG temporarily by writing a JTAG HMAC "key" into
+ * the JTAG_CTRL registers.
+ *
+ * Works if JTAG has been "soft" disabled by burning the EFUSE_SOFT_DIS_JTAG efuse.
+ *
+ * Will enable the HMAC module to generate a "downstream" HMAC value from a key already saved in efuse, and then write the JTAG HMAC "key" which will enable JTAG if the two keys match.
+ *
+ * @param jtag_hmac_key Pointer to a 32 byte array containing a valid key. Supplied by user.
+ * @param key_block Index of a key block containing the source for this key.
+ *
+ * @return ETS_FAILED if HMAC operation fails or invalid parameter, ETS_OK otherwise. ETS_OK doesn't necessarily mean that JTAG was enabled.
+ */
+int ets_jtag_enable_temporarily(const uint8_t *jtag_hmac_key, ets_efuse_block_t key_block);
+
+/**
+  * @brief  A crc8 algorithm used for MAC addresses in efuse
+  *
+  * @param  unsigned char const *p : Pointer to original data.
+  *
+  * @param  unsigned int len : Data length in byte.
+  *
+  * @return unsigned char: Crc value.
+  */
+unsigned char esp_crc8(unsigned char const *p, unsigned int len);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_EFUSE_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/ets_sys.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/ets_sys.h
new file mode 100644
index 00000000000..1d4763dbf99
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/ets_sys.h
@@ -0,0 +1,658 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_ETS_SYS_H_
+#define _ROM_ETS_SYS_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "soc/soc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup ets_sys_apis, ets system related apis
+  * @brief ets system apis
+  */
+
+/** @addtogroup ets_sys_apis
+  * @{
+  */
+
+/************************************************************************
+  *                                NOTE
+  *   Many functions in this header files can't be run in FreeRTOS.
+  *   Please see the comment of the Functions.
+  *   There are also some functions that doesn't work on FreeRTOS
+  *   without listed in the header, such as:
+  *   xtos functions start with "_xtos_" in ld file.
+  *
+  ***********************************************************************
+  */
+
+/** \defgroup ets_apis, Espressif Task Scheduler related apis
+  * @brief ets apis
+  */
+
+/** @addtogroup ets_apis
+  * @{
+  */
+
+typedef enum {
+    ETS_OK     = 0, /**< return successful in ets*/
+    ETS_FAILED = 1  /**< return failed in ets*/
+} ETS_STATUS;
+
+typedef ETS_STATUS ets_status_t;
+
+typedef uint32_t ETSSignal;
+typedef uint32_t ETSParam;
+
+typedef struct ETSEventTag ETSEvent;    /**< Event transmit/receive in ets*/
+
+struct ETSEventTag {
+    ETSSignal sig;  /**< Event signal, in same task, different Event with different signal*/
+    ETSParam  par;  /**< Event parameter, sometimes without usage, then will be set as 0*/
+};
+
+typedef void (*ETSTask)(ETSEvent *e);       /**< Type of the Task processer*/
+typedef void (* ets_idle_cb_t)(void *arg);  /**< Type of the system idle callback*/
+
+/**
+  * @brief  Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.
+  *
+  * @param  none
+  *
+  * @return none
+  */
+void ets_run(void);
+
+/**
+  * @brief  Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.
+  *
+  * @param  ets_idle_cb_t func : The callback function.
+  *
+  * @param  void *arg : Argument of the callback.
+  *
+  * @return None
+  */
+void ets_set_idle_cb(ets_idle_cb_t func, void *arg);
+
+/**
+  * @brief  Init a task with processer, priority, queue to receive Event, queue length.
+  *
+  * @param  ETSTask task : The task processer.
+  *
+  * @param  uint8_t prio : Task priority, 0-31, bigger num with high priority, one priority with one task.
+  *
+  * @param  ETSEvent *queue : Queue belongs to the task, task always receives Events, Queue is circular used.
+  *
+  * @param  uint8_t qlen : Queue length.
+  *
+  * @return None
+  */
+void ets_task(ETSTask task, uint8_t prio, ETSEvent *queue, uint8_t qlen);
+
+/**
+  * @brief  Post an event to an Task.
+  *
+  * @param  uint8_t prio : Priority of the Task.
+  *
+  * @param  ETSSignal sig : Event signal.
+  *
+  * @param  ETSParam  par : Event parameter
+  *
+  * @return ETS_OK     : post successful
+  * @return ETS_FAILED : post failed
+  */
+ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_boot_apis, Boot routing related apis
+  * @brief ets boot apis
+  */
+
+/** @addtogroup ets_apis
+  * @{
+  */
+
+extern const char *const exc_cause_table[40];   ///**< excption cause that defined by the core.*/
+
+/**
+  * @brief  Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed.
+  *         When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.
+  *
+  * @param  uint32_t start : the PRO Entry code address value in uint32_t
+  *
+  * @return None
+  */
+void ets_set_user_start(uint32_t start);
+
+/**
+  * @brief  Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code.
+  *         When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.
+  *
+  * @param  uint32_t callback : the Startup code address value in uint32_t
+  *
+  * @return None     : post successful
+  */
+void ets_set_startup_callback(uint32_t callback);
+
+/**
+  * @brief  Set App cpu Entry code, code can be called in PRO CPU.
+  *         When APP booting is completed, APP CPU will call the Entry code if not NULL.
+  *
+  * @param  uint32_t start : the APP Entry code address value in uint32_t, stored in register APPCPU_CTRL_REG_D.
+  *
+  * @return None
+  */
+void ets_set_appcpu_boot_addr(uint32_t start);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_printf_apis, ets_printf related apis used in ets
+  * @brief ets printf apis
+  */
+
+/** @addtogroup ets_printf_apis
+  * @{
+  */
+
+/**
+  * @brief  Printf the strings to uart or other devices, similar with printf, simple than printf.
+  *         Can not print float point data format, or longlong data format.
+  *         So we maybe only use this in ROM.
+  *
+  * @param  const char *fmt : See printf.
+  *
+  * @param  ... : See printf.
+  *
+  * @return int : the length printed to the output device.
+  */
+int ets_printf(const char *fmt, ...);
+
+/**
+  * @brief  Set the uart channel of ets_printf(uart_tx_one_char).
+  *         ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
+  *
+  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2.
+  *
+  * @return None
+  */
+void ets_set_printf_channel(uint8_t uart_no);
+
+/**
+  * @brief Get the uart channel of ets_printf(uart_tx_one_char).
+  *
+  * @return uint8_t uart channel used by ets_printf(uart_tx_one_char).
+  */
+uint8_t ets_get_printf_channel(void);
+
+/**
+  * @brief  Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function.
+  *         Can not print float point data format, or longlong data format
+  *
+  * @param  char c : char to output.
+  *
+  * @return None
+  */
+void ets_write_char_uart(char c);
+
+/**
+  * @brief  Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
+  *         To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.
+  *
+  * @param  void (*)(char) p: Output function to install.
+  *
+  * @return None
+  */
+void ets_install_putc1(void (*p)(char c));
+
+/**
+  * @brief  Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
+  *         To install putc2, which is defaulted installed as NULL.
+  *
+  * @param  void (*)(char) p: Output function to install.
+  *
+  * @return None
+  */
+void ets_install_putc2(void (*p)(char c));
+
+/**
+  * @brief  Install putc1 as ets_write_char_uart.
+  *         In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_install_uart_printf(void);
+
+#define ETS_PRINTF(...) ets_printf(...)
+
+#define ETS_ASSERT(v) do { \
+    if (!(v)) {             \
+        ets_printf("%s %u \n", __FILE__, __LINE__); \
+        while (1) {};   \
+    }                   \
+} while (0);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_timer_apis, ets_timer related apis used in ets
+  * @brief ets timer apis
+  */
+
+/** @addtogroup ets_timer_apis
+  * @{
+  */
+typedef void ETSTimerFunc(void *timer_arg);/**< timer handler*/
+
+typedef struct _ETSTIMER_ {
+    struct _ETSTIMER_    *timer_next;   /**< timer linker*/
+    uint32_t              timer_expire; /**< abstruct time when timer expire*/
+    uint32_t              timer_period; /**< timer period, 0 means timer is not periodic repeated*/
+    ETSTimerFunc         *timer_func;   /**< timer handler*/
+    void                 *timer_arg;    /**< timer handler argument*/
+} ETSTimer;
+
+/**
+  * @brief  Init ets timer, this timer range is 640 us to 429496 ms
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_timer_init(void);
+
+/**
+  * @brief  In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_timer_deinit(void);
+
+/**
+  * @brief  Arm an ets timer, this timer range is 640 us to 429496 ms.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  uint32_t tmout : Timer value in ms, range is 1 to 429496.
+  *
+  * @param  bool repeat : Timer is periodic repeated.
+  *
+  * @return None
+  */
+void ets_timer_arm(ETSTimer *timer, uint32_t tmout, bool repeat);
+
+/**
+  * @brief  Arm an ets timer, this timer range is 640 us to 429496 ms.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  uint32_t tmout : Timer value in us, range is 1 to 429496729.
+  *
+  * @param  bool repeat : Timer is periodic repeated.
+  *
+  * @return None
+  */
+void ets_timer_arm_us(ETSTimer *ptimer, uint32_t us, bool repeat);
+
+/**
+  * @brief  Disarm an ets timer.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @return None
+  */
+void ets_timer_disarm(ETSTimer *timer);
+
+/**
+  * @brief  Set timer callback and argument.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  ETSTimerFunc *pfunction : Timer callback.
+  *
+  * @param  void *parg : Timer callback argument.
+  *
+  * @return None
+  */
+void ets_timer_setfn(ETSTimer *ptimer, ETSTimerFunc *pfunction, void *parg);
+
+/**
+  * @brief  Unset timer callback and argument to NULL.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @return None
+  */
+void ets_timer_done(ETSTimer *ptimer);
+
+/**
+  * @brief  CPU do while loop for some time.
+  *         In FreeRTOS task, please call FreeRTOS apis.
+  *
+  * @param  uint32_t us : Delay time in us.
+  *
+  * @return None
+  */
+void ets_delay_us(uint32_t us);
+
+/**
+  * @brief  Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
+  *         Call this function when CPU frequency is changed.
+  *
+  * @param  uint32_t ticks_per_us : CPU ticks per us.
+  *
+  * @return None
+  */
+void ets_update_cpu_frequency(uint32_t ticks_per_us);
+
+/**
+  * @brief  Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
+  *
+  * @note This function only sets the tick rate for the current CPU. It is located in ROM,
+  *       so the deep sleep stub can use it even if IRAM is not initialized yet.
+  *
+  * @param  uint32_t ticks_per_us : CPU ticks per us.
+  *
+  * @return None
+  */
+void ets_update_cpu_frequency_rom(uint32_t ticks_per_us);
+
+/**
+  * @brief  Get the real CPU ticks per us to the ets.
+  *         This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.
+  *
+  * @param  None
+  *
+  * @return uint32_t : CPU ticks per us record in ets.
+  */
+uint32_t ets_get_cpu_frequency(void);
+
+/**
+  * @brief  Get xtal_freq value, If value not stored in RTC_STORE5, than store.
+  *
+  * @param  None
+  *
+  * @return uint32_t : if stored in efuse(not 0)
+  *                         clock = ets_efuse_get_xtal_freq() * 1000000;
+  *                    else if analog_8M in efuse
+  *                         clock = ets_get_xtal_scale() * 625 / 16 * ets_efuse_get_8M_clock();
+  *                    else clock = 40M.
+  */
+uint32_t ets_get_xtal_freq(void);
+
+/**
+  * @brief  Get the apb divisor. The xtal frequency gets divided
+  *         by this value to generate the APB clock.
+  *         When any types of reset happens, the default value is 2.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 1 or 2.
+  */
+uint32_t ets_get_xtal_div(void);
+
+
+/**
+  * @brief  Modifies the apb divisor. The xtal frequency gets divided by this to
+  *         generate the APB clock.
+  *
+  * @note The xtal frequency divisor is 2 by default as the glitch detector
+  *       doesn't properly stop glitches when it is 1. Please do not set the
+  *       divisor to 1 before the PLL is active without being aware that you
+  *       may be introducing a security risk.
+  *
+  * @param  div Divisor. 1 = xtal freq, 2 = 1/2th xtal freq.
+  */
+void ets_set_xtal_div(int div);
+
+
+/**
+  * @brief  Get apb_freq value, If value not stored in RTC_STORE5, than store.
+  *
+  * @param  None
+  *
+  * @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register.
+  *                         clock = (REG_READ(RTC_STORE5) & 0xffff) << 12;
+  *                    else store ets_get_detected_xtal_freq() in.
+  */
+uint32_t ets_get_apb_freq(void);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_intr_apis, ets interrupt configure related apis
+  * @brief ets intr apis
+  */
+
+/** @addtogroup ets_intr_apis
+  * @{
+  */
+
+typedef void (* ets_isr_t)(void *);/**< interrupt handler type*/
+
+/**
+  * @brief  Attach a interrupt handler to a CPU interrupt number.
+  *         This function equals to _xtos_set_interrupt_handler_arg(i, func, arg).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  int i : CPU interrupt number.
+  *
+  * @param  ets_isr_t func : Interrupt handler.
+  *
+  * @param  void *arg : argument of the handler.
+  *
+  * @return None
+  */
+void ets_isr_attach(int i, ets_isr_t func, void *arg);
+
+/**
+  * @brief  Mask the interrupts which show in mask bits.
+  *         This function equals to _xtos_ints_off(mask).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  uint32_t mask : BIT(i) means mask CPU interrupt number i.
+  *
+  * @return None
+  */
+void ets_isr_mask(uint32_t mask);
+
+/**
+  * @brief  Unmask the interrupts which show in mask bits.
+  *         This function equals to _xtos_ints_on(mask).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  uint32_t mask : BIT(i) means mask CPU interrupt number i.
+  *
+  * @return None
+  */
+void ets_isr_unmask(uint32_t unmask);
+
+/**
+  * @brief  Lock the interrupt to level 2.
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_intr_lock(void);
+
+/**
+  * @brief  Unlock the interrupt to level 0.
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_intr_unlock(void);
+
+/**
+  * @brief  Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt).
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_waiti0(void);
+
+/**
+  * @brief  Attach an CPU interrupt to a hardware source.
+  *         We have 4 steps to use an interrupt:
+  *         1.Attach hardware interrupt source to CPU.  intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);
+  *         2.Set interrupt handler.                    xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);
+  *         3.Enable interrupt for CPU.                 xt_ints_on(1 << ETS_WMAC_INUM);
+  *         4.Enable interrupt in the module.
+  *
+  * @param  int cpu_no : The CPU which the interrupt number belongs.
+  *
+  * @param  uint32_t model_num : The interrupt hardware source number, please see the interrupt hardware source table.
+  *
+  * @param  uint32_t intr_num : The interrupt number CPU, please see the interrupt cpu using table.
+  *
+  * @return None
+  */
+void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
+
+#define _ETSTR(v) # v
+#define _ETS_SET_INTLEVEL(intlevel)        ({ unsigned __tmp; \
+            __asm__ __volatile__(   "rsil   %0, " _ETSTR(intlevel) "\n" \
+                        : "=a" (__tmp) : : "memory" ); \
+            })
+
+#ifdef CONFIG_NONE_OS
+#define ETS_INTR_LOCK() \
+        ets_intr_lock()
+
+#define ETS_INTR_UNLOCK() \
+        ets_intr_unlock()
+
+#define ETS_ISR_ATTACH \
+        ets_isr_attach
+
+#define ETS_INTR_ENABLE(inum) \
+        ets_isr_unmask((1<<inum))
+
+#define ETS_INTR_DISABLE(inum) \
+        ets_isr_mask((1<<inum))
+
+#define ETS_WMAC_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_WMAC_INUM, (func), (void *)(arg))
+
+#define ETS_TG0_T0_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_TG0_T0_INUM, (func), (void *)(arg))
+
+#define ETS_GPIO_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_GPIO_INUM, (func), (void *)(arg))
+
+#define ETS_UART0_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_UART0_INUM, (func), (void *)(arg))
+
+#define ETS_WDT_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_WDT_INUM, (func), (void *)(arg))
+
+#define ETS_SLC_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_SLC_INUM, (func), (void *)(arg))
+
+#define ETS_BB_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_BB_INUM)
+
+#define ETS_BB_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_BB_INUM)
+
+#define ETS_UART0_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_UART0_INUM)
+
+#define ETS_UART0_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_UART0_INUM)
+
+#define ETS_GPIO_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_GPIO_INUM)
+
+#define ETS_GPIO_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_GPIO_INUM)
+
+#define ETS_WDT_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_WDT_INUM)
+
+#define ETS_WDT_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_WDT_INUM)
+
+#define ETS_TG0_T0_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_TG0_T0_INUM)
+
+#define ETS_TG0_T0_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_TG0_T0_INUM)
+
+#define ETS_SLC_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_SLC_INUM)
+
+#define ETS_SLC_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_SLC_INUM)
+#endif
+
+/**
+  * @}
+  */
+
+#ifndef MAC2STR
+#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
+#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
+#endif
+
+#define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
+
+typedef enum {
+    OK = 0,
+    FAIL,
+    PENDING,
+    BUSY,
+    CANCEL,
+} STATUS;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_ETS_SYS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/gpio.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/gpio.h
new file mode 100644
index 00000000000..eaf46da2e9e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/gpio.h
@@ -0,0 +1,320 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_GPIO_H_
+#define _ROM_GPIO_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_attr.h"
+#include "soc/gpio_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup gpio_apis, uart configuration and communication related apis
+  * @brief gpio apis
+  */
+
+/** @addtogroup gpio_apis
+  * @{
+  */
+
+#define GPIO_REG_READ(reg)              READ_PERI_REG(reg)
+#define GPIO_REG_WRITE(reg, val)        WRITE_PERI_REG(reg, val)
+#define GPIO_ID_PIN0                    0
+#define GPIO_ID_PIN(n)                  (GPIO_ID_PIN0+(n))
+#define GPIO_PIN_ADDR(i)                (GPIO_PIN0_REG + i*4)
+
+#define GPIO_FUNC_IN_HIGH               0x38
+#define GPIO_FUNC_IN_LOW                0x3C
+
+#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
+    ((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
+
+#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
+
+typedef enum {
+    GPIO_PIN_INTR_DISABLE = 0,
+    GPIO_PIN_INTR_POSEDGE = 1,
+    GPIO_PIN_INTR_NEGEDGE = 2,
+    GPIO_PIN_INTR_ANYEDGE = 3,
+    GPIO_PIN_INTR_LOLEVEL = 4,
+    GPIO_PIN_INTR_HILEVEL = 5
+} GPIO_INT_TYPE;
+
+#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
+        ((gpio_no < 32) ? gpio_output_set(bit_value<<gpio_no, (bit_value ? 0 : 1)<<gpio_no, 1<<gpio_no,0) : \
+                         gpio_output_set_high(bit_value<<(gpio_no - 32), (bit_value ? 0 : 1)<<(gpio_no - 32), 1<<(gpio_no -32),0))
+#define GPIO_DIS_OUTPUT(gpio_no)    ((gpio_no < 32) ? gpio_output_set(0,0,0, 1<<gpio_no) : gpio_output_set_high(0,0,0, 1<<(gpio_no - 32)))
+#define GPIO_INPUT_GET(gpio_no)     ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))&BIT0))
+
+/* GPIO interrupt handler, registered through gpio_intr_handler_register */
+typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
+
+/**
+  * @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
+  *        to initialize "output enables" and pin configurations for each gpio pin.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void gpio_init(void);
+
+/**
+  * @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
+  *         There is no particular ordering guaranteed; so if the order of writes is significant,
+  *         calling code should divide a single call into multiple calls.
+  *
+  * @param  uint32_t set_mask : the gpios that need high level.
+  *
+  * @param  uint32_t clear_mask : the gpios that need low level.
+  *
+  * @param  uint32_t enable_mask : the gpios that need be changed.
+  *
+  * @param  uint32_t disable_mask : the gpios that need diable output.
+  *
+  * @return None
+  */
+void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
+
+/**
+  * @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
+  *         There is no particular ordering guaranteed; so if the order of writes is significant,
+  *         calling code should divide a single call into multiple calls.
+  *
+  * @param  uint32_t set_mask : the gpios that need high level.
+  *
+  * @param  uint32_t clear_mask : the gpios that need low level.
+  *
+  * @param  uint32_t enable_mask : the gpios that need be changed.
+  *
+  * @param  uint32_t disable_mask : the gpios that need diable output.
+  *
+  * @return None
+  */
+void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
+
+/**
+  * @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
+  */
+uint32_t gpio_input_get(void);
+
+/**
+  * @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32.
+  */
+uint32_t gpio_input_get_high(void);
+
+/**
+  * @brief Register an application-specific interrupt handler for GPIO pin interrupts.
+  *        Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
+  *        Please do not call this function in SDK.
+  *
+  * @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler
+  *
+  * @param void *arg : gpio application-specific interrupt handler argument.
+  *
+  * @return None
+  */
+void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
+
+/**
+  * @brief Get gpio interrupts which happens but not processed.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
+  */
+uint32_t gpio_intr_pending(void);
+
+/**
+  * @brief Get gpio interrupts which happens but not processed.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
+  */
+uint32_t gpio_intr_pending_high(void);
+
+/**
+  * @brief Ack gpio interrupts to process pending interrupts.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
+  *
+  * @return None
+  */
+void gpio_intr_ack(uint32_t ack_mask);
+
+/**
+  * @brief Ack gpio interrupts to process pending interrupts.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
+  *
+  * @return None
+  */
+void gpio_intr_ack_high(uint32_t ack_mask);
+
+/**
+  * @brief Set GPIO to wakeup the ESP32.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t i: gpio number.
+  *
+  * @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
+  *
+  * @return None
+  */
+void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
+
+/**
+  * @brief disable GPIOs to wakeup the ESP32.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void gpio_pin_wakeup_disable(void);
+
+/**
+  * @brief set gpio input to a signal, one gpio can input to several signals.
+  *
+  * @param uint32_t gpio : gpio number, 0~0x2f
+  *                        gpio == 0x3C, input 0 to signal
+  *                        gpio == 0x3A, input nothing to signal
+  *                        gpio == 0x38, input 1 to signal
+  *
+  * @param uint32_t signal_idx : signal index.
+  *
+  * @param bool inv : the signal is inv or not
+  *
+  * @return None
+  */
+void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
+
+/**
+  * @brief set signal output to gpio, one signal can output to several gpios.
+  *
+  * @param uint32_t gpio : gpio number, 0~0x2f
+  *
+  * @param uint32_t signal_idx : signal index.
+  *                        signal_idx == 0x100, cancel output put to the gpio
+  *
+  * @param bool out_inv : the signal output is invert or not
+  *
+  * @param bool oen_inv : the signal output enable is invert or not
+  *
+  * @return None
+  */
+void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv);
+
+/**
+  * @brief Select pad as a gpio function from IOMUX.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_select_gpio(uint32_t gpio_num);
+
+/**
+  * @brief Set pad driver capability.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @param uint32_t drv : 0-3
+  *
+  * @return None
+  */
+void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
+
+/**
+  * @brief Pull up the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_pullup(uint32_t gpio_num);
+
+/**
+  * @brief Pull down the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_pulldown(uint32_t gpio_num);
+
+/**
+  * @brief Unhold the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_unhold(uint32_t gpio_num);
+
+/**
+  * @brief Hold the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_hold(uint32_t gpio_num);
+
+/**
+  * @brief enable gpio pad input.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_input_enable(uint32_t gpio_num);
+
+/**
+  * @brief disable gpio pad input.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_input_disable(uint32_t gpio_num);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_GPIO_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/hmac.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/hmac.h
new file mode 100644
index 00000000000..f5f82d5b239
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/hmac.h
@@ -0,0 +1,63 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_HMAC_H_
+#define _ROM_HMAC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdlib.h>
+#include "efuse.h"
+
+void ets_hmac_enable(void);
+
+void ets_hmac_disable(void);
+
+/* Use the "upstream" HMAC key (ETS_EFUSE_KEY_PURPOSE_HMAC_UP)
+   to digest a message.
+*/
+int ets_hmac_calculate_message(ets_efuse_block_t key_block, const void *message, size_t message_len, uint8_t *hmac);
+
+/* Calculate a downstream HMAC message to temporarily enable JTAG, or
+   to generate a Digital Signature data decryption key.
+
+   - purpose must be ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE
+     or ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG
+
+   - key_block must be in range ETS_EFUSE_BLOCK_KEY0 toETS_EFUSE_BLOCK_KEY6.
+     This efuse block must have the corresponding purpose set in "purpose", or
+     ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL.
+
+   The result of this HMAC calculation is only made available "downstream" to the
+   corresponding hardware module, and cannot be accessed by software.
+*/
+int ets_hmac_calculate_downstream(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose);
+
+/* Invalidate a downstream HMAC value previously calculated by ets_hmac_calculate_downstream().
+ *
+ * - purpose must match a previous call to ets_hmac_calculate_downstream().
+ *
+ * After this function is called, the corresponding internal operation (JTAG or DS) will no longer
+ * have access to the generated key.
+ */
+int ets_hmac_invalidate_downstream(ets_efuse_purpose_t purpose);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ROM_HMAC_H_
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/libc_stubs.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/libc_stubs.h
new file mode 100644
index 00000000000..5e514e18033
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/libc_stubs.h
@@ -0,0 +1,88 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ROM_LIBC_STUBS_H_
+#define _ROM_LIBC_STUBS_H_
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <reent.h>
+#include <errno.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ESP32-S2 ROM code contains implementations of some of C library functions.
+Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall
+implementation defined in the following struct.
+
+The table itself, by default, is not allocated in RAM. There is a pointer, `syscall_table_ptr_pro`,
+which can be set to point to the locations of syscall tables of CPU 0 (aka PRO CPU).
+Location of this pointer in .bss segment of ROM code is defined in linker script.
+
+So, before using any of the C library functions (except for pure functions and memcpy/memset functions),
+application must allocate syscall table structure for each CPU being used, and populate it with pointers
+to actual implementations of corresponding syscalls.
+*/
+
+struct syscall_stub_table
+{
+    struct _reent* (*__getreent)(void);
+    void* (*_malloc_r)(struct _reent *r, size_t);
+    void (*_free_r)(struct _reent *r, void*);
+    void* (*_realloc_r)(struct _reent *r, void*, size_t);
+    void* (*_calloc_r)(struct _reent *r, size_t, size_t);
+    void (*_abort)(void);
+    int (*_system_r)(struct _reent *r, const char*);
+    int (*_rename_r)(struct _reent *r, const char*, const char*);
+    clock_t (*_times_r)(struct _reent *r, struct tms *);
+    int (*_gettimeofday_r) (struct _reent *r, struct timeval *, void *);
+    void (*_raise_r)(struct _reent *r);
+    int (*_unlink_r)(struct _reent *r, const char*);
+    int (*_link_r)(struct _reent *r, const char*, const char*);
+    int (*_stat_r)(struct _reent *r, const char*, struct stat *);
+    int (*_fstat_r)(struct _reent *r, int, struct stat *);
+    void* (*_sbrk_r)(struct _reent *r, ptrdiff_t);
+    int (*_getpid_r)(struct _reent *r);
+    int (*_kill_r)(struct _reent *r, int, int);
+    void (*_exit_r)(struct _reent *r, int);
+    int (*_close_r)(struct _reent *r, int);
+    int (*_open_r)(struct _reent *r, const char *, int, int);
+    int (*_write_r)(struct _reent *r, int, const void *, int);
+    int (*_lseek_r)(struct _reent *r, int, int, int);
+    int (*_read_r)(struct _reent *r, int, void *, int);
+    void (*_lock_init)(_lock_t *lock);
+    void (*_lock_init_recursive)(_lock_t *lock);
+    void (*_lock_close)(_lock_t *lock);
+    void (*_lock_close_recursive)(_lock_t *lock);
+    void (*_lock_acquire)(_lock_t *lock);
+    void (*_lock_acquire_recursive)(_lock_t *lock);
+    int (*_lock_try_acquire)(_lock_t *lock);
+    int (*_lock_try_acquire_recursive)(_lock_t *lock);
+    void (*_lock_release)(_lock_t *lock);
+    void (*_lock_release_recursive)(_lock_t *lock);
+    int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
+    int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
+};
+
+extern struct syscall_stub_table* syscall_table_ptr_pro;
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif /* _ROM_LIBC_STUBS_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/lldesc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/lldesc.h
new file mode 100644
index 00000000000..a11be3767f8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/lldesc.h
@@ -0,0 +1,176 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_LLDESC_H_
+#define _ROM_LLDESC_H_
+
+#include <stdint.h>
+
+#include "sys/queue.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LLDESC_TX_MBLK_SIZE                 268 /* */
+#define LLDESC_RX_SMBLK_SIZE                64  /* small block size, for small mgmt frame */
+#define LLDESC_RX_MBLK_SIZE                 524 /* rx is large sinec we want to contain mgmt frame in one block*/
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_SIZE    64  /* it is a small buffer which is a cycle link*/
+#define LLDESC_RX_AMPDU_LEN_MBLK_SIZE      256 /*for ampdu entry*/
+#ifdef ESP_MAC_5
+#define LLDESC_TX_MBLK_NUM                  116  /* 64K / 256 */
+#define LLDESC_RX_MBLK_NUM                  82 /* 64K / 512 MAX 172*/
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM     4
+#define LLDESC_RX_AMPDU_LEN_MLBK_NUM       12
+#else
+#ifdef SBUF_RXTX
+#define LLDESC_TX_MBLK_NUM_MAX    (2 * 48) /* 23K / 260 - 8 */
+#define LLDESC_RX_MBLK_NUM_MAX    (2 * 48) /* 23K / 524 */
+#define LLDESC_TX_MBLK_NUM_MIN    (2 * 16) /* 23K / 260 - 8 */
+#define LLDESC_RX_MBLK_NUM_MIN    (2 * 16) /* 23K / 524 */
+#endif
+#define LLDESC_TX_MBLK_NUM      10      //(2 * 32) /* 23K / 260 - 8 */
+
+#ifdef IEEE80211_RX_AMPDU
+#define LLDESC_RX_MBLK_NUM      30
+#else
+#define LLDESC_RX_MBLK_NUM      10
+#endif /*IEEE80211_RX_AMPDU*/
+
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM  4
+#define LLDESC_RX_AMPDU_LEN_MLBK_NUM    8
+#endif /* !ESP_MAC_5 */
+/*
+ *  SLC2 DMA Desc struct, aka lldesc_t
+ *
+ * --------------------------------------------------------------
+ * | own | EoF | sub_sof | 5'b0   | length [11:0] | size [11:0] |
+ * --------------------------------------------------------------
+ * |            buf_ptr [31:0]                                  |
+ * --------------------------------------------------------------
+ * |            next_desc_ptr [31:0]                            |
+ * --------------------------------------------------------------
+ */
+
+/* this bitfield is start from the LSB!!! */
+typedef struct lldesc_s {
+    volatile uint32_t size  :12,
+                        length:12,
+                        offset: 5, /* h/w reserved 5bit, s/w use it as offset in buffer */
+                        sosf  : 1, /* start of sub-frame */
+                        eof   : 1, /* end of frame */
+                        owner : 1; /* hw or sw */
+    volatile const uint8_t *buf;       /* point to buffer data */
+    union{
+        volatile uint32_t empty;
+        STAILQ_ENTRY(lldesc_s) qe;  /* pointing to the next desc */
+    };
+} lldesc_t;
+
+typedef struct tx_ampdu_entry_s{
+    uint32_t sub_len  :12,
+              dili_num : 7,
+                       : 1,
+              null_byte: 2,
+              data     : 1,
+              enc      : 1,
+              seq      : 8;
+} tx_ampdu_entry_t;
+
+typedef struct lldesc_chain_s {
+    lldesc_t *head;
+    lldesc_t *tail;
+} lldesc_chain_t;
+
+#ifdef SBUF_RXTX
+enum sbuf_mask_s  {
+    SBUF_MOVE_NO = 0,
+    SBUF_MOVE_TX2RX,
+    SBUF_MOVE_RX2TX,
+} ;
+
+#define SBUF_MOVE_STEP 8
+#endif
+#define LLDESC_SIZE  sizeof(struct lldesc_s)
+
+/* SLC Descriptor  */
+#define LLDESC_OWNER_MASK                  0x80000000
+#define LLDESC_OWNER_SHIFT                         31
+#define LLDESC_SW_OWNED                             0
+#define LLDESC_HW_OWNED                             1
+
+#define LLDESC_EOF_MASK                    0x40000000
+#define LLDESC_EOF_SHIFT                           30
+
+#define LLDESC_SOSF_MASK                   0x20000000
+#define LLDESC_SOSF_SHIFT                          29
+
+#define LLDESC_LENGTH_MASK                 0x00fff000
+#define LLDESC_LENGTH_SHIFT                        12
+
+#define LLDESC_SIZE_MASK                   0x00000fff
+#define LLDESC_SIZE_SHIFT                           0
+
+#define LLDESC_ADDR_MASK                    0x000fffff
+
+void lldesc_build_chain(uint8_t *descptr, uint32_t desclen, uint8_t * mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
+                          lldesc_t **head,
+#ifdef TO_HOST_RESTART
+                          lldesc_t ** one_before_tail,
+#endif
+                          lldesc_t **tail);
+
+lldesc_t *lldesc_num2link(lldesc_t * head, uint16_t nblks);
+
+lldesc_t *lldesc_set_owner(lldesc_t * head, uint16_t nblks, uint8_t owner);
+
+static inline uint32_t lldesc_get_chain_length(lldesc_t *head)
+{
+    lldesc_t *ds = head;
+    uint32_t len = 0;
+
+    while (ds) {
+        len += ds->length;
+        ds = STAILQ_NEXT(ds, qe);
+    }
+
+    return len;
+}
+
+static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t len)
+{
+    ds->owner  = owner;
+    ds->eof    = eof;
+    ds->sosf   = sosf;
+    ds->length = len;
+}
+
+#define LLDESC_CONFIG(_desc, _owner, _eof, _sosf, _len)        do { \
+        (_desc)->owner  = (_owner); \
+        (_desc)->eof    = (_eof);   \
+        (_desc)->sosf   = (_sosf);  \
+        (_desc)->length = (_len);   \
+} while(0)
+
+#define LLDESC_FROM_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
+
+#define LLDESC_MAC_RX_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, (ds)->size)
+
+#define LLDESC_TO_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_LLDESC_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/md5_hash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/md5_hash.h
new file mode 100644
index 00000000000..f116f1e670f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/md5_hash.h
@@ -0,0 +1,38 @@
+/*
+ * MD5 internal definitions
+ * Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Alternatively, this software may be distributed under the terms of BSD
+ * license.
+ *
+ * See README and COPYING for more details.
+ */
+
+#ifndef _ROM_MD5_HASH_H_
+#define _ROM_MD5_HASH_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct MD5Context {
+	uint32_t buf[4];
+	uint32_t bits[2];
+	uint8_t in[64];
+};
+
+void MD5Init(struct MD5Context *context);
+void MD5Update(struct MD5Context *context, unsigned char const *buf, unsigned len);
+void MD5Final(unsigned char digest[16], struct MD5Context *context);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_MD5_HASH_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/miniz.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/miniz.h
new file mode 100644
index 00000000000..b9b9202aaa7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/miniz.h
@@ -0,0 +1,776 @@
+#ifndef MINIZ_HEADER_INCLUDED
+#define MINIZ_HEADER_INCLUDED
+
+#include <stdlib.h>
+
+// Defines to completely disable specific portions of miniz.c:
+// If all macros here are defined the only functionality remaining will be CRC-32, adler-32, tinfl, and tdefl.
+
+// Define MINIZ_NO_STDIO to disable all usage and any functions which rely on stdio for file I/O.
+#define MINIZ_NO_STDIO
+
+// If MINIZ_NO_TIME is specified then the ZIP archive functions will not be able to get the current time, or
+// get/set file times, and the C run-time funcs that get/set times won't be called.
+// The current downside is the times written to your archives will be from 1979.
+#define MINIZ_NO_TIME
+
+// Define MINIZ_NO_ARCHIVE_APIS to disable all ZIP archive API's.
+#define MINIZ_NO_ARCHIVE_APIS
+
+// Define MINIZ_NO_ARCHIVE_APIS to disable all writing related ZIP archive API's.
+#define MINIZ_NO_ARCHIVE_WRITING_APIS
+
+// Define MINIZ_NO_ZLIB_APIS to remove all ZLIB-style compression/decompression API's.
+#define MINIZ_NO_ZLIB_APIS
+
+// Define MINIZ_NO_ZLIB_COMPATIBLE_NAME to disable zlib names, to prevent conflicts against stock zlib.
+#define MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+
+// Define MINIZ_NO_MALLOC to disable all calls to malloc, free, and realloc.
+// Note if MINIZ_NO_MALLOC is defined then the user must always provide custom user alloc/free/realloc
+// callbacks to the zlib and archive API's, and a few stand-alone helper API's which don't provide custom user
+// functions (such as tdefl_compress_mem_to_heap() and tinfl_decompress_mem_to_heap()) won't work.
+#define MINIZ_NO_MALLOC
+
+#if defined(__TINYC__) && (defined(__linux) || defined(__linux__))
+  // TODO: Work around "error: include file 'sys\utime.h' when compiling with tcc on Linux
+  #define MINIZ_NO_TIME
+#endif
+
+#if !defined(MINIZ_NO_TIME) && !defined(MINIZ_NO_ARCHIVE_APIS)
+  #include <time.h>
+#endif
+
+//Hardcoded options for Xtensa - JD
+#define MINIZ_X86_OR_X64_CPU 0
+#define MINIZ_LITTLE_ENDIAN 1
+#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 0
+#define MINIZ_HAS_64BIT_REGISTERS 0
+#define TINFL_USE_64BIT_BITBUF 0
+
+
+#if defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || defined(__i386) || defined(__i486__) || defined(__i486) || defined(i386) || defined(__ia64__) || defined(__x86_64__)
+// MINIZ_X86_OR_X64_CPU is only used to help set the below macros.
+#define MINIZ_X86_OR_X64_CPU 1
+#endif
+
+#if (__BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) || MINIZ_X86_OR_X64_CPU
+// Set MINIZ_LITTLE_ENDIAN to 1 if the processor is little endian.
+#define MINIZ_LITTLE_ENDIAN 1
+#endif
+
+#if MINIZ_X86_OR_X64_CPU
+// Set MINIZ_USE_UNALIGNED_LOADS_AND_STORES to 1 on CPU's that permit efficient integer loads and stores from unaligned addresses.
+#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 1
+#endif
+
+#if defined(_M_X64) || defined(_WIN64) || defined(__MINGW64__) || defined(_LP64) || defined(__LP64__) || defined(__ia64__) || defined(__x86_64__)
+// Set MINIZ_HAS_64BIT_REGISTERS to 1 if operations on 64-bit integers are reasonably fast (and don't involve compiler generated calls to helper functions).
+#define MINIZ_HAS_64BIT_REGISTERS 1
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ------------------- zlib-style API Definitions.
+
+// For more compatibility with zlib, miniz.c uses unsigned long for some parameters/struct members. Beware: mz_ulong can be either 32 or 64-bits!
+typedef unsigned long mz_ulong;
+
+// mz_free() internally uses the MZ_FREE() macro (which by default calls free() unless you've modified the MZ_MALLOC macro) to release a block allocated from the heap.
+void mz_free(void *p);
+
+#define MZ_ADLER32_INIT (1)
+// mz_adler32() returns the initial adler-32 value to use when called with ptr==NULL.
+mz_ulong mz_adler32(mz_ulong adler, const unsigned char *ptr, size_t buf_len);
+
+#define MZ_CRC32_INIT (0)
+// mz_crc32() returns the initial CRC-32 value to use when called with ptr==NULL.
+mz_ulong mz_crc32(mz_ulong crc, const unsigned char *ptr, size_t buf_len);
+
+// Compression strategies.
+enum { MZ_DEFAULT_STRATEGY = 0, MZ_FILTERED = 1, MZ_HUFFMAN_ONLY = 2, MZ_RLE = 3, MZ_FIXED = 4 };
+
+// Method
+#define MZ_DEFLATED 8
+
+#ifndef MINIZ_NO_ZLIB_APIS
+
+// Heap allocation callbacks.
+// Note that mz_alloc_func parameter types purpsosely differ from zlib's: items/size is size_t, not unsigned long.
+typedef void *(*mz_alloc_func)(void *opaque, size_t items, size_t size);
+typedef void (*mz_free_func)(void *opaque, void *address);
+typedef void *(*mz_realloc_func)(void *opaque, void *address, size_t items, size_t size);
+
+#define MZ_VERSION          "9.1.15"
+#define MZ_VERNUM           0x91F0
+#define MZ_VER_MAJOR        9
+#define MZ_VER_MINOR        1
+#define MZ_VER_REVISION     15
+#define MZ_VER_SUBREVISION  0
+
+// Flush values. For typical usage you only need MZ_NO_FLUSH and MZ_FINISH. The other values are for advanced use (refer to the zlib docs).
+enum { MZ_NO_FLUSH = 0, MZ_PARTIAL_FLUSH = 1, MZ_SYNC_FLUSH = 2, MZ_FULL_FLUSH = 3, MZ_FINISH = 4, MZ_BLOCK = 5 };
+
+// Return status codes. MZ_PARAM_ERROR is non-standard.
+enum { MZ_OK = 0, MZ_STREAM_END = 1, MZ_NEED_DICT = 2, MZ_ERRNO = -1, MZ_STREAM_ERROR = -2, MZ_DATA_ERROR = -3, MZ_MEM_ERROR = -4, MZ_BUF_ERROR = -5, MZ_VERSION_ERROR = -6, MZ_PARAM_ERROR = -10000 };
+
+// Compression levels: 0-9 are the standard zlib-style levels, 10 is best possible compression (not zlib compatible, and may be very slow), MZ_DEFAULT_COMPRESSION=MZ_DEFAULT_LEVEL.
+enum { MZ_NO_COMPRESSION = 0, MZ_BEST_SPEED = 1, MZ_BEST_COMPRESSION = 9, MZ_UBER_COMPRESSION = 10, MZ_DEFAULT_LEVEL = 6, MZ_DEFAULT_COMPRESSION = -1 };
+
+// Window bits
+#define MZ_DEFAULT_WINDOW_BITS 15
+
+struct mz_internal_state;
+
+// Compression/decompression stream struct.
+typedef struct mz_stream_s
+{
+  const unsigned char *next_in;     // pointer to next byte to read
+  unsigned int avail_in;            // number of bytes available at next_in
+  mz_ulong total_in;                // total number of bytes consumed so far
+
+  unsigned char *next_out;          // pointer to next byte to write
+  unsigned int avail_out;           // number of bytes that can be written to next_out
+  mz_ulong total_out;               // total number of bytes produced so far
+
+  char *msg;                        // error msg (unused)
+  struct mz_internal_state *state;  // internal state, allocated by zalloc/zfree
+
+  mz_alloc_func zalloc;             // optional heap allocation function (defaults to malloc)
+  mz_free_func zfree;               // optional heap free function (defaults to free)
+  void *opaque;                     // heap alloc function user pointer
+
+  int data_type;                    // data_type (unused)
+  mz_ulong adler;                   // adler32 of the source or uncompressed data
+  mz_ulong reserved;                // not used
+} mz_stream;
+
+typedef mz_stream *mz_streamp;
+
+// Returns the version string of miniz.c.
+const char *mz_version(void);
+
+// mz_deflateInit() initializes a compressor with default options:
+// Parameters:
+//  pStream must point to an initialized mz_stream struct.
+//  level must be between [MZ_NO_COMPRESSION, MZ_BEST_COMPRESSION].
+//  level 1 enables a specially optimized compression function that's been optimized purely for performance, not ratio.
+//  (This special func. is currently only enabled when MINIZ_USE_UNALIGNED_LOADS_AND_STORES and MINIZ_LITTLE_ENDIAN are defined.)
+// Return values:
+//  MZ_OK on success.
+//  MZ_STREAM_ERROR if the stream is bogus.
+//  MZ_PARAM_ERROR if the input parameters are bogus.
+//  MZ_MEM_ERROR on out of memory.
+int mz_deflateInit(mz_streamp pStream, int level);
+
+// mz_deflateInit2() is like mz_deflate(), except with more control:
+// Additional parameters:
+//   method must be MZ_DEFLATED
+//   window_bits must be MZ_DEFAULT_WINDOW_BITS (to wrap the deflate stream with zlib header/adler-32 footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate/no header or footer)
+//   mem_level must be between [1, 9] (it's checked but ignored by miniz.c)
+int mz_deflateInit2(mz_streamp pStream, int level, int method, int window_bits, int mem_level, int strategy);
+
+// Quickly resets a compressor without having to reallocate anything. Same as calling mz_deflateEnd() followed by mz_deflateInit()/mz_deflateInit2().
+int mz_deflateReset(mz_streamp pStream);
+
+// mz_deflate() compresses the input to output, consuming as much of the input and producing as much output as possible.
+// Parameters:
+//   pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
+//   flush may be MZ_NO_FLUSH, MZ_PARTIAL_FLUSH/MZ_SYNC_FLUSH, MZ_FULL_FLUSH, or MZ_FINISH.
+// Return values:
+//   MZ_OK on success (when flushing, or if more input is needed but not available, and/or there's more output to be written but the output buffer is full).
+//   MZ_STREAM_END if all input has been consumed and all output bytes have been written. Don't call mz_deflate() on the stream anymore.
+//   MZ_STREAM_ERROR if the stream is bogus.
+//   MZ_PARAM_ERROR if one of the parameters is invalid.
+//   MZ_BUF_ERROR if no forward progress is possible because the input and/or output buffers are empty. (Fill up the input buffer or free up some output space and try again.)
+int mz_deflate(mz_streamp pStream, int flush);
+
+// mz_deflateEnd() deinitializes a compressor:
+// Return values:
+//  MZ_OK on success.
+//  MZ_STREAM_ERROR if the stream is bogus.
+int mz_deflateEnd(mz_streamp pStream);
+
+// mz_deflateBound() returns a (very) conservative upper bound on the amount of data that could be generated by deflate(), assuming flush is set to only MZ_NO_FLUSH or MZ_FINISH.
+mz_ulong mz_deflateBound(mz_streamp pStream, mz_ulong source_len);
+
+// Single-call compression functions mz_compress() and mz_compress2():
+// Returns MZ_OK on success, or one of the error codes from mz_deflate() on failure.
+int mz_compress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
+int mz_compress2(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len, int level);
+
+// mz_compressBound() returns a (very) conservative upper bound on the amount of data that could be generated by calling mz_compress().
+mz_ulong mz_compressBound(mz_ulong source_len);
+
+// Initializes a decompressor.
+int mz_inflateInit(mz_streamp pStream);
+
+// mz_inflateInit2() is like mz_inflateInit() with an additional option that controls the window size and whether or not the stream has been wrapped with a zlib header/footer:
+// window_bits must be MZ_DEFAULT_WINDOW_BITS (to parse zlib header/footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate).
+int mz_inflateInit2(mz_streamp pStream, int window_bits);
+
+// Decompresses the input stream to the output, consuming only as much of the input as needed, and writing as much to the output as possible.
+// Parameters:
+//   pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
+//   flush may be MZ_NO_FLUSH, MZ_SYNC_FLUSH, or MZ_FINISH.
+//   On the first call, if flush is MZ_FINISH it's assumed the input and output buffers are both sized large enough to decompress the entire stream in a single call (this is slightly faster).
+//   MZ_FINISH implies that there are no more source bytes available beside what's already in the input buffer, and that the output buffer is large enough to hold the rest of the decompressed data.
+// Return values:
+//   MZ_OK on success. Either more input is needed but not available, and/or there's more output to be written but the output buffer is full.
+//   MZ_STREAM_END if all needed input has been consumed and all output bytes have been written. For zlib streams, the adler-32 of the decompressed data has also been verified.
+//   MZ_STREAM_ERROR if the stream is bogus.
+//   MZ_DATA_ERROR if the deflate stream is invalid.
+//   MZ_PARAM_ERROR if one of the parameters is invalid.
+//   MZ_BUF_ERROR if no forward progress is possible because the input buffer is empty but the inflater needs more input to continue, or if the output buffer is not large enough. Call mz_inflate() again
+//   with more input data, or with more room in the output buffer (except when using single call decompression, described above).
+int mz_inflate(mz_streamp pStream, int flush);
+
+// Deinitializes a decompressor.
+int mz_inflateEnd(mz_streamp pStream);
+
+// Single-call decompression.
+// Returns MZ_OK on success, or one of the error codes from mz_inflate() on failure.
+int mz_uncompress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
+
+// Returns a string description of the specified error code, or NULL if the error code is invalid.
+const char *mz_error(int err);
+
+// Redefine zlib-compatible names to miniz equivalents, so miniz.c can be used as a drop-in replacement for the subset of zlib that miniz.c supports.
+// Define MINIZ_NO_ZLIB_COMPATIBLE_NAMES to disable zlib-compatibility if you use zlib in the same project.
+#ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+  typedef unsigned char Byte;
+  typedef unsigned int uInt;
+  typedef mz_ulong uLong;
+  typedef Byte Bytef;
+  typedef uInt uIntf;
+  typedef char charf;
+  typedef int intf;
+  typedef void *voidpf;
+  typedef uLong uLongf;
+  typedef void *voidp;
+  typedef void *const voidpc;
+  #define Z_NULL                0
+  #define Z_NO_FLUSH            MZ_NO_FLUSH
+  #define Z_PARTIAL_FLUSH       MZ_PARTIAL_FLUSH
+  #define Z_SYNC_FLUSH          MZ_SYNC_FLUSH
+  #define Z_FULL_FLUSH          MZ_FULL_FLUSH
+  #define Z_FINISH              MZ_FINISH
+  #define Z_BLOCK               MZ_BLOCK
+  #define Z_OK                  MZ_OK
+  #define Z_STREAM_END          MZ_STREAM_END
+  #define Z_NEED_DICT           MZ_NEED_DICT
+  #define Z_ERRNO               MZ_ERRNO
+  #define Z_STREAM_ERROR        MZ_STREAM_ERROR
+  #define Z_DATA_ERROR          MZ_DATA_ERROR
+  #define Z_MEM_ERROR           MZ_MEM_ERROR
+  #define Z_BUF_ERROR           MZ_BUF_ERROR
+  #define Z_VERSION_ERROR       MZ_VERSION_ERROR
+  #define Z_PARAM_ERROR         MZ_PARAM_ERROR
+  #define Z_NO_COMPRESSION      MZ_NO_COMPRESSION
+  #define Z_BEST_SPEED          MZ_BEST_SPEED
+  #define Z_BEST_COMPRESSION    MZ_BEST_COMPRESSION
+  #define Z_DEFAULT_COMPRESSION MZ_DEFAULT_COMPRESSION
+  #define Z_DEFAULT_STRATEGY    MZ_DEFAULT_STRATEGY
+  #define Z_FILTERED            MZ_FILTERED
+  #define Z_HUFFMAN_ONLY        MZ_HUFFMAN_ONLY
+  #define Z_RLE                 MZ_RLE
+  #define Z_FIXED               MZ_FIXED
+  #define Z_DEFLATED            MZ_DEFLATED
+  #define Z_DEFAULT_WINDOW_BITS MZ_DEFAULT_WINDOW_BITS
+  #define alloc_func            mz_alloc_func
+  #define free_func             mz_free_func
+  #define internal_state        mz_internal_state
+  #define z_stream              mz_stream
+  #define deflateInit           mz_deflateInit
+  #define deflateInit2          mz_deflateInit2
+  #define deflateReset          mz_deflateReset
+  #define deflate               mz_deflate
+  #define deflateEnd            mz_deflateEnd
+  #define deflateBound          mz_deflateBound
+  #define compress              mz_compress
+  #define compress2             mz_compress2
+  #define compressBound         mz_compressBound
+  #define inflateInit           mz_inflateInit
+  #define inflateInit2          mz_inflateInit2
+  #define inflate               mz_inflate
+  #define inflateEnd            mz_inflateEnd
+  #define uncompress            mz_uncompress
+  #define crc32                 mz_crc32
+  #define adler32               mz_adler32
+  #define MAX_WBITS             15
+  #define MAX_MEM_LEVEL         9
+  #define zError                mz_error
+  #define ZLIB_VERSION          MZ_VERSION
+  #define ZLIB_VERNUM           MZ_VERNUM
+  #define ZLIB_VER_MAJOR        MZ_VER_MAJOR
+  #define ZLIB_VER_MINOR        MZ_VER_MINOR
+  #define ZLIB_VER_REVISION     MZ_VER_REVISION
+  #define ZLIB_VER_SUBREVISION  MZ_VER_SUBREVISION
+  #define zlibVersion           mz_version
+  #define zlib_version          mz_version()
+#endif // #ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+
+#endif // MINIZ_NO_ZLIB_APIS
+
+// ------------------- Types and macros
+
+typedef unsigned char mz_uint8;
+typedef signed short mz_int16;
+typedef unsigned short mz_uint16;
+typedef unsigned int mz_uint32;
+typedef unsigned int mz_uint;
+typedef long long mz_int64;
+typedef unsigned long long mz_uint64;
+typedef int mz_bool;
+
+#define MZ_FALSE (0)
+#define MZ_TRUE (1)
+
+// An attempt to work around MSVC's spammy "warning C4127: conditional expression is constant" message.
+#ifdef _MSC_VER
+   #define MZ_MACRO_END while (0, 0)
+#else
+   #define MZ_MACRO_END while (0)
+#endif
+
+// ------------------- ZIP archive reading/writing
+
+#ifndef MINIZ_NO_ARCHIVE_APIS
+
+enum
+{
+  MZ_ZIP_MAX_IO_BUF_SIZE = 64*1024,
+  MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE = 260,
+  MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE = 256
+};
+
+typedef struct
+{
+  mz_uint32 m_file_index;
+  mz_uint32 m_central_dir_ofs;
+  mz_uint16 m_version_made_by;
+  mz_uint16 m_version_needed;
+  mz_uint16 m_bit_flag;
+  mz_uint16 m_method;
+#ifndef MINIZ_NO_TIME
+  time_t m_time;
+#endif
+  mz_uint32 m_crc32;
+  mz_uint64 m_comp_size;
+  mz_uint64 m_uncomp_size;
+  mz_uint16 m_internal_attr;
+  mz_uint32 m_external_attr;
+  mz_uint64 m_local_header_ofs;
+  mz_uint32 m_comment_size;
+  char m_filename[MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE];
+  char m_comment[MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE];
+} mz_zip_archive_file_stat;
+
+typedef size_t (*mz_file_read_func)(void *pOpaque, mz_uint64 file_ofs, void *pBuf, size_t n);
+typedef size_t (*mz_file_write_func)(void *pOpaque, mz_uint64 file_ofs, const void *pBuf, size_t n);
+
+struct mz_zip_internal_state_tag;
+typedef struct mz_zip_internal_state_tag mz_zip_internal_state;
+
+typedef enum
+{
+  MZ_ZIP_MODE_INVALID = 0,
+  MZ_ZIP_MODE_READING = 1,
+  MZ_ZIP_MODE_WRITING = 2,
+  MZ_ZIP_MODE_WRITING_HAS_BEEN_FINALIZED = 3
+} mz_zip_mode;
+
+typedef struct mz_zip_archive_tag
+{
+  mz_uint64 m_archive_size;
+  mz_uint64 m_central_directory_file_ofs;
+  mz_uint m_total_files;
+  mz_zip_mode m_zip_mode;
+
+  mz_uint m_file_offset_alignment;
+
+  mz_alloc_func m_pAlloc;
+  mz_free_func m_pFree;
+  mz_realloc_func m_pRealloc;
+  void *m_pAlloc_opaque;
+
+  mz_file_read_func m_pRead;
+  mz_file_write_func m_pWrite;
+  void *m_pIO_opaque;
+
+  mz_zip_internal_state *m_pState;
+
+} mz_zip_archive;
+
+typedef enum
+{
+  MZ_ZIP_FLAG_CASE_SENSITIVE                = 0x0100,
+  MZ_ZIP_FLAG_IGNORE_PATH                   = 0x0200,
+  MZ_ZIP_FLAG_COMPRESSED_DATA               = 0x0400,
+  MZ_ZIP_FLAG_DO_NOT_SORT_CENTRAL_DIRECTORY = 0x0800
+} mz_zip_flags;
+
+// ZIP archive reading
+
+// Inits a ZIP archive reader.
+// These functions read and validate the archive's central directory.
+mz_bool mz_zip_reader_init(mz_zip_archive *pZip, mz_uint64 size, mz_uint32 flags);
+mz_bool mz_zip_reader_init_mem(mz_zip_archive *pZip, const void *pMem, size_t size, mz_uint32 flags);
+
+#ifndef MINIZ_NO_STDIO
+mz_bool mz_zip_reader_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint32 flags);
+#endif
+
+// Returns the total number of files in the archive.
+mz_uint mz_zip_reader_get_num_files(mz_zip_archive *pZip);
+
+// Returns detailed information about an archive file entry.
+mz_bool mz_zip_reader_file_stat(mz_zip_archive *pZip, mz_uint file_index, mz_zip_archive_file_stat *pStat);
+
+// Determines if an archive file entry is a directory entry.
+mz_bool mz_zip_reader_is_file_a_directory(mz_zip_archive *pZip, mz_uint file_index);
+mz_bool mz_zip_reader_is_file_encrypted(mz_zip_archive *pZip, mz_uint file_index);
+
+// Retrieves the filename of an archive file entry.
+// Returns the number of bytes written to pFilename, or if filename_buf_size is 0 this function returns the number of bytes needed to fully store the filename.
+mz_uint mz_zip_reader_get_filename(mz_zip_archive *pZip, mz_uint file_index, char *pFilename, mz_uint filename_buf_size);
+
+// Attempts to locates a file in the archive's central directory.
+// Valid flags: MZ_ZIP_FLAG_CASE_SENSITIVE, MZ_ZIP_FLAG_IGNORE_PATH
+// Returns -1 if the file cannot be found.
+int mz_zip_reader_locate_file(mz_zip_archive *pZip, const char *pName, const char *pComment, mz_uint flags);
+
+// Extracts a archive file to a memory buffer using no memory allocation.
+mz_bool mz_zip_reader_extract_to_mem_no_alloc(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
+mz_bool mz_zip_reader_extract_file_to_mem_no_alloc(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
+
+// Extracts a archive file to a memory buffer.
+mz_bool mz_zip_reader_extract_to_mem(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_mem(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags);
+
+// Extracts a archive file to a dynamically allocated heap buffer.
+void *mz_zip_reader_extract_to_heap(mz_zip_archive *pZip, mz_uint file_index, size_t *pSize, mz_uint flags);
+void *mz_zip_reader_extract_file_to_heap(mz_zip_archive *pZip, const char *pFilename, size_t *pSize, mz_uint flags);
+
+// Extracts a archive file using a callback function to output the file's data.
+mz_bool mz_zip_reader_extract_to_callback(mz_zip_archive *pZip, mz_uint file_index, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_callback(mz_zip_archive *pZip, const char *pFilename, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
+
+#ifndef MINIZ_NO_STDIO
+// Extracts a archive file to a disk file and sets its last accessed and modified times.
+// This function only extracts files, not archive directory records.
+mz_bool mz_zip_reader_extract_to_file(mz_zip_archive *pZip, mz_uint file_index, const char *pDst_filename, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_file(mz_zip_archive *pZip, const char *pArchive_filename, const char *pDst_filename, mz_uint flags);
+#endif
+
+// Ends archive reading, freeing all allocations, and closing the input archive file if mz_zip_reader_init_file() was used.
+mz_bool mz_zip_reader_end(mz_zip_archive *pZip);
+
+// ZIP archive writing
+
+#ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
+
+// Inits a ZIP archive writer.
+mz_bool mz_zip_writer_init(mz_zip_archive *pZip, mz_uint64 existing_size);
+mz_bool mz_zip_writer_init_heap(mz_zip_archive *pZip, size_t size_to_reserve_at_beginning, size_t initial_allocation_size);
+
+#ifndef MINIZ_NO_STDIO
+mz_bool mz_zip_writer_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint64 size_to_reserve_at_beginning);
+#endif
+
+// Converts a ZIP archive reader object into a writer object, to allow efficient in-place file appends to occur on an existing archive.
+// For archives opened using mz_zip_reader_init_file, pFilename must be the archive's filename so it can be reopened for writing. If the file can't be reopened, mz_zip_reader_end() will be called.
+// For archives opened using mz_zip_reader_init_mem, the memory block must be growable using the realloc callback (which defaults to realloc unless you've overridden it).
+// Finally, for archives opened using mz_zip_reader_init, the mz_zip_archive's user provided m_pWrite function cannot be NULL.
+// Note: In-place archive modification is not recommended unless you know what you're doing, because if execution stops or something goes wrong before
+// the archive is finalized the file's central directory will be hosed.
+mz_bool mz_zip_writer_init_from_reader(mz_zip_archive *pZip, const char *pFilename);
+
+// Adds the contents of a memory buffer to an archive. These functions record the current local time into the archive.
+// To add a directory entry, call this method with an archive name ending in a forwardslash with empty buffer.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_writer_add_mem(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, mz_uint level_and_flags);
+mz_bool mz_zip_writer_add_mem_ex(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags, mz_uint64 uncomp_size, mz_uint32 uncomp_crc32);
+
+#ifndef MINIZ_NO_STDIO
+// Adds the contents of a disk file to an archive. This function also records the disk file's modified time into the archive.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_writer_add_file(mz_zip_archive *pZip, const char *pArchive_name, const char *pSrc_filename, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
+#endif
+
+// Adds a file to an archive by fully cloning the data from another archive.
+// This function fully clones the source file's compressed data (no recompression), along with its full filename, extra data, and comment fields.
+mz_bool mz_zip_writer_add_from_zip_reader(mz_zip_archive *pZip, mz_zip_archive *pSource_zip, mz_uint file_index);
+
+// Finalizes the archive by writing the central directory records followed by the end of central directory record.
+// After an archive is finalized, the only valid call on the mz_zip_archive struct is mz_zip_writer_end().
+// An archive must be manually finalized by calling this function for it to be valid.
+mz_bool mz_zip_writer_finalize_archive(mz_zip_archive *pZip);
+mz_bool mz_zip_writer_finalize_heap_archive(mz_zip_archive *pZip, void **pBuf, size_t *pSize);
+
+// Ends archive writing, freeing all allocations, and closing the output file if mz_zip_writer_init_file() was used.
+// Note for the archive to be valid, it must have been finalized before ending.
+mz_bool mz_zip_writer_end(mz_zip_archive *pZip);
+
+// Misc. high-level helper functions:
+
+// mz_zip_add_mem_to_archive_file_in_place() efficiently (but not atomically) appends a memory blob to a ZIP archive.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_add_mem_to_archive_file_in_place(const char *pZip_filename, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
+
+// Reads a single file from an archive into a heap block.
+// Returns NULL on failure.
+void *mz_zip_extract_archive_file_to_heap(const char *pZip_filename, const char *pArchive_name, size_t *pSize, mz_uint zip_flags);
+
+#endif // #ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
+
+#endif // #ifndef MINIZ_NO_ARCHIVE_APIS
+
+// ------------------- Low-level Decompression API Definitions
+
+// Decompression flags used by tinfl_decompress().
+// TINFL_FLAG_PARSE_ZLIB_HEADER: If set, the input has a valid zlib header and ends with an adler32 checksum (it's a valid zlib stream). Otherwise, the input is a raw deflate stream.
+// TINFL_FLAG_HAS_MORE_INPUT: If set, there are more input bytes available beyond the end of the supplied input buffer. If clear, the input buffer contains all remaining input.
+// TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF: If set, the output buffer is large enough to hold the entire decompressed stream. If clear, the output buffer is at least the size of the dictionary (typically 32KB).
+// TINFL_FLAG_COMPUTE_ADLER32: Force adler-32 checksum computation of the decompressed bytes.
+enum
+{
+  TINFL_FLAG_PARSE_ZLIB_HEADER = 1,
+  TINFL_FLAG_HAS_MORE_INPUT = 2,
+  TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF = 4,
+  TINFL_FLAG_COMPUTE_ADLER32 = 8
+};
+
+// High level decompression functions:
+// tinfl_decompress_mem_to_heap() decompresses a block in memory to a heap block allocated via malloc().
+// On entry:
+//  pSrc_buf, src_buf_len: Pointer and size of the Deflate or zlib source data to decompress.
+// On return:
+//  Function returns a pointer to the decompressed data, or NULL on failure.
+//  *pOut_len will be set to the decompressed data's size, which could be larger than src_buf_len on uncompressible data.
+//  The caller must call mz_free() on the returned block when it's no longer needed.
+void *tinfl_decompress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
+
+// tinfl_decompress_mem_to_mem() decompresses a block in memory to another block in memory.
+// Returns TINFL_DECOMPRESS_MEM_TO_MEM_FAILED on failure, or the number of bytes written on success.
+#define TINFL_DECOMPRESS_MEM_TO_MEM_FAILED ((size_t)(-1))
+size_t tinfl_decompress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
+
+// tinfl_decompress_mem_to_callback() decompresses a block in memory to an internal 32KB buffer, and a user provided callback function will be called to flush the buffer.
+// Returns 1 on success or 0 on failure.
+typedef int (*tinfl_put_buf_func_ptr)(const void* pBuf, int len, void *pUser);
+int tinfl_decompress_mem_to_callback(const void *pIn_buf, size_t *pIn_buf_size, tinfl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+struct tinfl_decompressor_tag; typedef struct tinfl_decompressor_tag tinfl_decompressor;
+
+// Max size of LZ dictionary.
+#define TINFL_LZ_DICT_SIZE 32768
+
+// Return status.
+typedef enum
+{
+  TINFL_STATUS_BAD_PARAM = -3,
+  TINFL_STATUS_ADLER32_MISMATCH = -2,
+  TINFL_STATUS_FAILED = -1,
+  TINFL_STATUS_DONE = 0,
+  TINFL_STATUS_NEEDS_MORE_INPUT = 1,
+  TINFL_STATUS_HAS_MORE_OUTPUT = 2
+} tinfl_status;
+
+// Initializes the decompressor to its initial state.
+#define tinfl_init(r) do { (r)->m_state = 0; } MZ_MACRO_END
+#define tinfl_get_adler32(r) (r)->m_check_adler32
+
+// Main low-level decompressor coroutine function. This is the only function actually needed for decompression. All the other functions are just high-level helpers for improved usability.
+// This is a universal API, i.e. it can be used as a building block to build any desired higher level decompression API. In the limit case, it can be called once per every byte input or output.
+tinfl_status tinfl_decompress(tinfl_decompressor *r, const mz_uint8 *pIn_buf_next, size_t *pIn_buf_size, mz_uint8 *pOut_buf_start, mz_uint8 *pOut_buf_next, size_t *pOut_buf_size, const mz_uint32 decomp_flags);
+
+// Internal/private bits follow.
+enum
+{
+  TINFL_MAX_HUFF_TABLES = 3, TINFL_MAX_HUFF_SYMBOLS_0 = 288, TINFL_MAX_HUFF_SYMBOLS_1 = 32, TINFL_MAX_HUFF_SYMBOLS_2 = 19,
+  TINFL_FAST_LOOKUP_BITS = 10, TINFL_FAST_LOOKUP_SIZE = 1 << TINFL_FAST_LOOKUP_BITS
+};
+
+typedef struct
+{
+  mz_uint8 m_code_size[TINFL_MAX_HUFF_SYMBOLS_0];
+  mz_int16 m_look_up[TINFL_FAST_LOOKUP_SIZE], m_tree[TINFL_MAX_HUFF_SYMBOLS_0 * 2];
+} tinfl_huff_table;
+
+#if MINIZ_HAS_64BIT_REGISTERS
+  #define TINFL_USE_64BIT_BITBUF 1
+#endif
+
+#if TINFL_USE_64BIT_BITBUF
+  typedef mz_uint64 tinfl_bit_buf_t;
+  #define TINFL_BITBUF_SIZE (64)
+#else
+  typedef mz_uint32 tinfl_bit_buf_t;
+  #define TINFL_BITBUF_SIZE (32)
+#endif
+
+struct tinfl_decompressor_tag
+{
+  mz_uint32 m_state, m_num_bits, m_zhdr0, m_zhdr1, m_z_adler32, m_final, m_type, m_check_adler32, m_dist, m_counter, m_num_extra, m_table_sizes[TINFL_MAX_HUFF_TABLES];
+  tinfl_bit_buf_t m_bit_buf;
+  size_t m_dist_from_out_buf_start;
+  tinfl_huff_table m_tables[TINFL_MAX_HUFF_TABLES];
+  mz_uint8 m_raw_header[4], m_len_codes[TINFL_MAX_HUFF_SYMBOLS_0 + TINFL_MAX_HUFF_SYMBOLS_1 + 137];
+};
+
+// ------------------- Low-level Compression API Definitions
+
+// Set TDEFL_LESS_MEMORY to 1 to use less memory (compression will be slightly slower, and raw/dynamic blocks will be output more frequently).
+#define TDEFL_LESS_MEMORY 1
+
+// tdefl_init() compression flags logically OR'd together (low 12 bits contain the max. number of probes per dictionary search):
+// TDEFL_DEFAULT_MAX_PROBES: The compressor defaults to 128 dictionary probes per dictionary search. 0=Huffman only, 1=Huffman+LZ (fastest/crap compression), 4095=Huffman+LZ (slowest/best compression).
+enum
+{
+  TDEFL_HUFFMAN_ONLY = 0, TDEFL_DEFAULT_MAX_PROBES = 128, TDEFL_MAX_PROBES_MASK = 0xFFF
+};
+
+// TDEFL_WRITE_ZLIB_HEADER: If set, the compressor outputs a zlib header before the deflate data, and the Adler-32 of the source data at the end. Otherwise, you'll get raw deflate data.
+// TDEFL_COMPUTE_ADLER32: Always compute the adler-32 of the input data (even when not writing zlib headers).
+// TDEFL_GREEDY_PARSING_FLAG: Set to use faster greedy parsing, instead of more efficient lazy parsing.
+// TDEFL_NONDETERMINISTIC_PARSING_FLAG: Enable to decrease the compressor's initialization time to the minimum, but the output may vary from run to run given the same input (depending on the contents of memory).
+// TDEFL_RLE_MATCHES: Only look for RLE matches (matches with a distance of 1)
+// TDEFL_FILTER_MATCHES: Discards matches <= 5 chars if enabled.
+// TDEFL_FORCE_ALL_STATIC_BLOCKS: Disable usage of optimized Huffman tables.
+// TDEFL_FORCE_ALL_RAW_BLOCKS: Only use raw (uncompressed) deflate blocks.
+// The low 12 bits are reserved to control the max # of hash probes per dictionary lookup (see TDEFL_MAX_PROBES_MASK).
+enum
+{
+  TDEFL_WRITE_ZLIB_HEADER             = 0x01000,
+  TDEFL_COMPUTE_ADLER32               = 0x02000,
+  TDEFL_GREEDY_PARSING_FLAG           = 0x04000,
+  TDEFL_NONDETERMINISTIC_PARSING_FLAG = 0x08000,
+  TDEFL_RLE_MATCHES                   = 0x10000,
+  TDEFL_FILTER_MATCHES                = 0x20000,
+  TDEFL_FORCE_ALL_STATIC_BLOCKS       = 0x40000,
+  TDEFL_FORCE_ALL_RAW_BLOCKS          = 0x80000
+};
+
+// High level compression functions:
+// tdefl_compress_mem_to_heap() compresses a block in memory to a heap block allocated via malloc().
+// On entry:
+//  pSrc_buf, src_buf_len: Pointer and size of source block to compress.
+//  flags: The max match finder probes (default is 128) logically OR'd against the above flags. Higher probes are slower but improve compression.
+// On return:
+//  Function returns a pointer to the compressed data, or NULL on failure.
+//  *pOut_len will be set to the compressed data's size, which could be larger than src_buf_len on uncompressible data.
+//  The caller must free() the returned block when it's no longer needed.
+void *tdefl_compress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
+
+// tdefl_compress_mem_to_mem() compresses a block in memory to another block in memory.
+// Returns 0 on failure.
+size_t tdefl_compress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
+
+// Compresses an image to a compressed PNG file in memory.
+// On entry:
+//  pImage, w, h, and num_chans describe the image to compress. num_chans may be 1, 2, 3, or 4.
+//  The image pitch in bytes per scanline will be w*num_chans. The leftmost pixel on the top scanline is stored first in memory.
+//  level may range from [0,10], use MZ_NO_COMPRESSION, MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc. or a decent default is MZ_DEFAULT_LEVEL
+//  If flip is true, the image will be flipped on the Y axis (useful for OpenGL apps).
+// On return:
+//  Function returns a pointer to the compressed data, or NULL on failure.
+//  *pLen_out will be set to the size of the PNG image file.
+//  The caller must mz_free() the returned heap block (which will typically be larger than *pLen_out) when it's no longer needed.
+void *tdefl_write_image_to_png_file_in_memory_ex(const void *pImage, int w, int h, int num_chans, size_t *pLen_out, mz_uint level, mz_bool flip);
+void *tdefl_write_image_to_png_file_in_memory(const void *pImage, int w, int h, int num_chans, size_t *pLen_out);
+
+// Output stream interface. The compressor uses this interface to write compressed data. It'll typically be called TDEFL_OUT_BUF_SIZE at a time.
+typedef mz_bool (*tdefl_put_buf_func_ptr)(const void* pBuf, int len, void *pUser);
+
+// tdefl_compress_mem_to_output() compresses a block to an output stream. The above helpers use this function internally.
+mz_bool tdefl_compress_mem_to_output(const void *pBuf, size_t buf_len, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+enum { TDEFL_MAX_HUFF_TABLES = 3, TDEFL_MAX_HUFF_SYMBOLS_0 = 288, TDEFL_MAX_HUFF_SYMBOLS_1 = 32, TDEFL_MAX_HUFF_SYMBOLS_2 = 19, TDEFL_LZ_DICT_SIZE = 32768, TDEFL_LZ_DICT_SIZE_MASK = TDEFL_LZ_DICT_SIZE - 1, TDEFL_MIN_MATCH_LEN = 3, TDEFL_MAX_MATCH_LEN = 258 };
+
+// TDEFL_OUT_BUF_SIZE MUST be large enough to hold a single entire compressed output block (using static/fixed Huffman codes).
+#if TDEFL_LESS_MEMORY
+enum { TDEFL_LZ_CODE_BUF_SIZE = 24 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 12, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
+#else
+enum { TDEFL_LZ_CODE_BUF_SIZE = 64 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 15, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
+#endif
+
+// The low-level tdefl functions below may be used directly if the above helper functions aren't flexible enough. The low-level functions don't make any heap allocations, unlike the above helper functions.
+typedef enum
+{
+  TDEFL_STATUS_BAD_PARAM = -2,
+  TDEFL_STATUS_PUT_BUF_FAILED = -1,
+  TDEFL_STATUS_OKAY = 0,
+  TDEFL_STATUS_DONE = 1,
+} tdefl_status;
+
+// Must map to MZ_NO_FLUSH, MZ_SYNC_FLUSH, etc. enums
+typedef enum
+{
+  TDEFL_NO_FLUSH = 0,
+  TDEFL_SYNC_FLUSH = 2,
+  TDEFL_FULL_FLUSH = 3,
+  TDEFL_FINISH = 4
+} tdefl_flush;
+
+// tdefl's compression state structure.
+typedef struct
+{
+  tdefl_put_buf_func_ptr m_pPut_buf_func;
+  void *m_pPut_buf_user;
+  mz_uint m_flags, m_max_probes[2];
+  int m_greedy_parsing;
+  mz_uint m_adler32, m_lookahead_pos, m_lookahead_size, m_dict_size;
+  mz_uint8 *m_pLZ_code_buf, *m_pLZ_flags, *m_pOutput_buf, *m_pOutput_buf_end;
+  mz_uint m_num_flags_left, m_total_lz_bytes, m_lz_code_buf_dict_pos, m_bits_in, m_bit_buffer;
+  mz_uint m_saved_match_dist, m_saved_match_len, m_saved_lit, m_output_flush_ofs, m_output_flush_remaining, m_finished, m_block_index, m_wants_to_finish;
+  tdefl_status m_prev_return_status;
+  const void *m_pIn_buf;
+  void *m_pOut_buf;
+  size_t *m_pIn_buf_size, *m_pOut_buf_size;
+  tdefl_flush m_flush;
+  const mz_uint8 *m_pSrc;
+  size_t m_src_buf_left, m_out_buf_ofs;
+  mz_uint8 m_dict[TDEFL_LZ_DICT_SIZE + TDEFL_MAX_MATCH_LEN - 1];
+  mz_uint16 m_huff_count[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+  mz_uint16 m_huff_codes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+  mz_uint8 m_huff_code_sizes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+  mz_uint8 m_lz_code_buf[TDEFL_LZ_CODE_BUF_SIZE];
+  mz_uint16 m_next[TDEFL_LZ_DICT_SIZE];
+  mz_uint16 m_hash[TDEFL_LZ_HASH_SIZE];
+  mz_uint8 m_output_buf[TDEFL_OUT_BUF_SIZE];
+} tdefl_compressor;
+
+// Initializes the compressor.
+// There is no corresponding deinit() function because the tdefl API's do not dynamically allocate memory.
+// pBut_buf_func: If NULL, output data will be supplied to the specified callback. In this case, the user should call the tdefl_compress_buffer() API for compression.
+// If pBut_buf_func is NULL the user should always call the tdefl_compress() API.
+// flags: See the above enums (TDEFL_HUFFMAN_ONLY, TDEFL_WRITE_ZLIB_HEADER, etc.)
+tdefl_status tdefl_init(tdefl_compressor *d, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+// Compresses a block of data, consuming as much of the specified input buffer as possible, and writing as much compressed data to the specified output buffer as possible.
+tdefl_status tdefl_compress(tdefl_compressor *d, const void *pIn_buf, size_t *pIn_buf_size, void *pOut_buf, size_t *pOut_buf_size, tdefl_flush flush);
+
+// tdefl_compress_buffer() is only usable when the tdefl_init() is called with a non-NULL tdefl_put_buf_func_ptr.
+// tdefl_compress_buffer() always consumes the entire input buffer.
+tdefl_status tdefl_compress_buffer(tdefl_compressor *d, const void *pIn_buf, size_t in_buf_size, tdefl_flush flush);
+
+tdefl_status tdefl_get_prev_return_status(tdefl_compressor *d);
+mz_uint32 tdefl_get_adler32(tdefl_compressor *d);
+
+// Can't use tdefl_create_comp_flags_from_zip_params if MINIZ_NO_ZLIB_APIS isn't defined, because it uses some of its macros.
+#ifndef MINIZ_NO_ZLIB_APIS
+// Create tdefl_compress() flags given zlib-style compression parameters.
+// level may range from [0,10] (where 10 is absolute max compression, but may be much slower on some files)
+// window_bits may be -15 (raw deflate) or 15 (zlib)
+// strategy may be either MZ_DEFAULT_STRATEGY, MZ_FILTERED, MZ_HUFFMAN_ONLY, MZ_RLE, or MZ_FIXED
+mz_uint tdefl_create_comp_flags_from_zip_params(int level, int window_bits, int strategy);
+#endif // #ifndef MINIZ_NO_ZLIB_APIS
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // MINIZ_HEADER_INCLUDED
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/opi_flash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/opi_flash.h
new file mode 100644
index 00000000000..bb209f67f05
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/opi_flash.h
@@ -0,0 +1,299 @@
+/*
+ * copyright (c) Espressif System 2019
+ *
+ */
+
+#ifndef _ROM_OPI_FLASH_H_
+#define _ROM_OPI_FLASH_H_
+#include <stdio.h>
+#include <string.h>
+#include <stdint.h>
+#include "spi_flash.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    uint16_t cmd;                /*!< Command value */
+    uint16_t cmdBitLen;          /*!< Command byte length*/
+    uint32_t *addr;              /*!< Point to address value*/
+    uint32_t addrBitLen;         /*!< Address byte length*/
+    uint32_t *txData;            /*!< Point to send data buffer*/
+    uint32_t txDataBitLen;       /*!< Send data byte length.*/
+    uint32_t *rxData;            /*!< Point to recevie data buffer*/
+    uint32_t rxDataBitLen;       /*!< Recevie Data byte length.*/
+    uint32_t dummyBitLen;
+} esp_rom_spi_cmd_t;
+
+#define ESP_ROM_OPIFLASH_MUX_TAKE()
+#define ESP_ROM_OPIFLASH_MUX_GIVE()
+#define ESP_ROM_OPIFLASH_SEL_CS0     (BIT(0))
+#define ESP_ROM_OPIFLASH_SEL_CS1     (BIT(1))
+
+// Definition of MX25UM25645G Octa Flash
+// SPI status register
+#define ESP_ROM_SPIFLASH_BUSY_FLAG     BIT0
+#define ESP_ROM_SPIFLASH_WRENABLE_FLAG BIT1
+#define ESP_ROM_SPIFLASH_BP0           BIT2
+#define ESP_ROM_SPIFLASH_BP1           BIT3
+#define ESP_ROM_SPIFLASH_BP2           BIT4
+#define ESP_ROM_SPIFLASH_WR_PROTECT    (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
+#define ESP_ROM_SPIFLASH_QE            BIT9
+
+#define FLASH_OP_MODE_RDCMD_DOUT       0x3B
+#define ESP_ROM_FLASH_SECTOR_SIZE      0x1000
+#define ESP_ROM_FLASH_BLOCK_SIZE_64K   0x10000
+#define ESP_ROM_FLASH_PAGE_SIZE        256
+
+// FLASH commands
+#define ROM_FLASH_CMD_RDID             0x9F
+#define ROM_FLASH_CMD_WRSR             0x01
+#define ROM_FLASH_CMD_WRSR2            0x31 /* Not all SPI flash uses this command */
+#define ROM_FLASH_CMD_WREN             0x06
+#define ROM_FLASH_CMD_WRDI             0x04
+#define ROM_FLASH_CMD_RDSR             0x05
+#define ROM_FLASH_CMD_RDSR2            0x35 /* Not all SPI flash uses this command */
+#define ROM_FLASH_CMD_ERASE_SEC        0x20
+#define ROM_FLASH_CMD_ERASE_BLK_32K    0x52
+#define ROM_FLASH_CMD_ERASE_BLK_64K    0xD8
+#define ROM_FLASH_CMD_OTPEN            0x3A /* Enable OTP mode, not all SPI flash uses this command */
+#define ROM_FLASH_CMD_RSTEN            0x66
+#define ROM_FLASH_CMD_RST              0x99
+
+#define ROM_FLASH_CMD_SE4B             0x21
+#define ROM_FLASH_CMD_SE4B_OCT         0xDE21
+#define ROM_FLASH_CMD_BE4B             0xDC
+#define ROM_FLASH_CMD_BE4B_OCT         0x23DC
+#define ROM_FLASH_CMD_RSTEN_OCT        0x9966
+#define ROM_FLASH_CMD_RST_OCT          0x6699
+
+#define ROM_FLASH_CMD_FSTRD4B_STR      0x13EC
+#define ROM_FLASH_CMD_FSTRD4B_DTR      0x11EE
+#define ROM_FLASH_CMD_FSTRD4B          0x0C
+#define ROM_FLASH_CMD_PP4B             0x12
+#define ROM_FLASH_CMD_PP4B_OCT         0xED12
+
+#define ROM_FLASH_CMD_RDID_OCT         0x609F
+#define ROM_FLASH_CMD_WREN_OCT         0xF906
+#define ROM_FLASH_CMD_RDSR_OCT         0xFA05
+#define ROM_FLASH_CMD_RDCR2            0x71
+#define ROM_FLASH_CMD_RDCR2_OCT        0x8E71
+#define ROM_FLASH_CMD_WRCR2            0x72
+#define ROM_FLASH_CMD_WRCR2_OCT        0x8D72
+
+// Definitions for GigaDevice GD25LX256E Flash
+#define ROM_FLASH_CMD_RDFSR_GD            0x70
+#define ROM_FLASH_CMD_RD_GD               0x03
+#define ROM_FLASH_CMD_RD4B_GD             0x13
+#define ROM_FLASH_CMD_FSTRD_GD            0x0B
+#define ROM_FLASH_CMD_FSTRD4B_GD          0x0C
+#define ROM_FLASH_CMD_FSTRD_OOUT_GD       0x8B
+#define ROM_FLASH_CMD_FSTRD4B_OOUT_GD     0x7C
+#define ROM_FLASH_CMD_FSTRD_OIOSTR_GD     0xCB
+#define ROM_FLASH_CMD_FSTRD4B_OIOSTR_GD   0xCC
+#define ROM_FLASH_CMD_FSTRD4B_OIODTR_GD   0xFD
+
+#define ROM_FLASH_CMD_PP_GD               0x02
+#define ROM_FLASH_CMD_PP4B_GD             0x12
+#define ROM_FLASH_CMD_PP_OOUT_GD          0x82
+#define ROM_FLASH_CMD_PP4B_OOUT_GD        0x84
+#define ROM_FLASH_CMD_PP_OIO_GD           0xC2
+#define ROM_FLASH_CMD_PP4B_OIOSTR_GD      0x8E
+
+#define ROM_FLASH_CMD_SE_GD               0x20
+#define ROM_FLASH_CMD_SE4B_GD             0x21
+#define ROM_FLASH_CMD_BE32K_GD            0x52
+#define ROM_FLASH_CMD_BE32K4B_GD          0x5C
+#define ROM_FLASH_CMD_BE64K_GD            0xD8
+#define ROM_FLASH_CMD_BE64K4B_GD          0xDC
+
+#define ROM_FLASH_CMD_EN4B_GD             0xB7
+#define ROM_FLASH_CMD_DIS4B_GD            0xE9
+
+// spi user mode command config
+
+/**
+ * @brief Config the spi user command
+ * @param spi_num spi port
+ * @param pcmd pointer to accept the spi command struct
+ */
+void esp_rom_spi_cmd_config(int spi_num, esp_rom_spi_cmd_t* pcmd);
+
+/**
+ * @brief Start a spi user command sequence
+ * @param spi_num spi port
+ * @param rx_buf buffer pointer to receive data
+ * @param rx_len receive data length in byte
+ * @param cs_en_mask decide which cs to use, 0 for cs0, 1 for cs1
+ * @param is_write_erase to indicate whether this is a write or erase operation, since the CPU would check permission
+ */
+void esp_rom_spi_cmd_start(int spi_num, uint8_t* rx_buf, uint16_t rx_len, uint8_t cs_en_mask, bool is_write_erase);
+
+/**
+ * @brief Config opi flash pads according to efuse settings.
+ */
+void esp_rom_opiflash_pin_config(void);
+
+// set SPI read/write mode
+/**
+ * @brief Set SPI operation mode
+ * @param spi_num spi port
+ * @param mode Flash Read Mode
+ */
+void esp_rom_spi_set_op_mode(int spi_num, esp_rom_spiflash_read_mode_t mode);
+
+/**
+ * @brief Set data swap mode in DTR(DDR) mode
+ * @param spi_num spi port
+ * @param wr_swap to decide whether to swap fifo data in dtr write operation
+ * @param rd_swap to decide whether to swap fifo data in dtr read operation
+ */
+void esp_rom_spi_set_dtr_swap_mode(int spi, bool wr_swap, bool rd_swap);
+
+
+/**
+ * @brief to send reset command in spi/opi-str/opi-dtr mode(for MX25UM25645G)
+ * @param spi_num spi port
+ */
+void esp_rom_opiflash_mode_reset(int spi_num);
+
+#if 0
+// MX25UM25645G opi flash interface
+/**
+ * @brief To execute a flash operation command
+ * @param spi_num spi port
+ * @param mode Flash Read Mode
+ * @param cmd data to send in command field
+ * @param cmd_bit_len bit length of command field
+ * @param addr data to send in address field
+ * @param addr_bit_len bit length of address field
+ * @param dummy_bits bit length of dummy field
+ * @param mosi_data data buffer to be sent in mosi field
+ * @param mosi_bit_len bit length of data buffer to be sent in mosi field
+ * @param miso_data data buffer to accept data in miso field
+ * @param miso_bit_len bit length of data buffer to accept data in miso field
+ * @param cs_mark decide which cs pin to use. 0: cs0, 1: cs1
+ * @param is_write_erase_operation to indicate whether this a write or erase flash operation
+ */
+void esp_rom_opiflash_exec_cmd(int spi_num, esp_rom_spiflash_read_mode_t mode,
+                                  uint32_t cmd, int cmd_bit_len,
+                                  uint32_t addr, int addr_bit_len,
+                                  int dummy_bits,
+                                  uint8_t* mosi_data, int mosi_bit_len,
+                                  uint8_t* miso_data, int miso_bit_len,
+                                  uint32_t cs_mask,
+                                  bool is_write_erase_operation);
+
+/**
+ * @brief send reset command to opi flash
+ * @param spi_num spi port
+ * @param mode Flash Operation Mode
+ */
+void esp_rom_opiflash_soft_reset(int spi_num, esp_rom_spiflash_read_mode_t mode);
+
+/**
+ * @brief to read opi flash ID(for MX25UM25645G)
+ * @param spi_num spi port
+ * @param mode Flash Operation Mode
+ * @return opi flash id
+ */
+uint32_t esp_rom_opiflash_read_id(int spi_num, esp_rom_spiflash_read_mode_t mode);
+
+/**
+ * @brief to read opi flash status register(for MX25UM25645G)
+ * @param spi_num spi port
+ * @param mode Flash Operation Mode
+ * @return opi flash status value
+ */
+uint8_t esp_rom_opiflash_rdsr(int spi_num, esp_rom_spiflash_read_mode_t mode);
+
+/**
+ * @brief wait opi flash status register to be idle
+ * @param spi_num spi port
+ * @param mode Flash Operation Mode
+ */
+void esp_rom_opiflash_wait_idle(int spi_num, esp_rom_spiflash_read_mode_t mode);
+
+/**
+ * @brief to read the config register2(for MX25UM25645G)
+ * @param spi_num spi port
+ * @param mode Flash Operation Mode
+ * @param addr the address of configure register
+ * @return value of config register2
+ */
+uint8_t esp_rom_opiflash_rdcr2(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t addr);
+
+/**
+ * @brief to write the config register2(for MX25UM25645G)
+ * @param spi_num spi port
+ * @param mode Flash Operation Mode
+ * @param addr the address of config register
+ * @param val the value to write
+ */
+void esp_rom_opiflash_wrcr2(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t addr, uint8_t val);
+
+/**
+ * @brief to erase flash sector(for MX25UM25645G)
+ * @param spi_num spi port
+ * @param address the sector address to be erased
+ * @param mode Flash operation mode
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_erase_sector(int spi_num, uint32_t address, esp_rom_spiflash_read_mode_t mode);
+
+/**
+ * @brief to erase flash block(for MX25UM25645G)
+ * @param spi_num spi port
+ * @param address the block address to be erased
+ * @param mode Flash operation mode
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_erase_block_64k(int spi_num, uint32_t address, esp_rom_spiflash_read_mode_t mode);
+
+/**
+ * @brief to erase a flash area define by start address and length(for MX25UM25645G)
+ * @param spi_num spi port
+ * @param start_addr the start address to be erased
+ * @param area_len the erea length to be erased
+ * @param mode flash operation mode
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_erase_area(int spi_num, uint32_t start_addr, uint32_t area_len, esp_rom_spiflash_read_mode_t mode);
+
+/**
+ * @brief to read data from opi flash(for MX25UM25645G)
+ * @param spi_num spi port
+ * @param mode flash operation mode
+ * @param flash_addr flash address to read data from
+ * @param data_addr data buffer to accept the data
+ * @param len data length to be read
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_read(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t flash_addr, uint8_t *data_addr, int len);
+
+/**
+ * @brief to write data to opi flash(for MX25UM25645G)
+ * @param spi_num spi port
+ * @param mode flash operation mode
+ * @param flash_addr flash address to write data to
+ * @param data_addr data buffer to write to flash
+ * @param len data length to write
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_write(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t flash_addr, uint8_t *data_addr, uint32_t len);
+
+/**
+ * @brief to set opi flash operation mode(for MX25UM25645G)
+ * @param spi_num spi port
+ * @param cur_mode current operation mode
+ * @param target the target operation mode to be set
+ */
+void esp_rom_opiflash_set_mode(int spi_num, esp_rom_spiflash_read_mode_t cur_mode, esp_rom_spiflash_read_mode_t target_mode);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/rsa_pss.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/rsa_pss.h
new file mode 100644
index 00000000000..bfbaeb6a41d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/rsa_pss.h
@@ -0,0 +1,45 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_RSA_PSS_H_
+#define _ROM_RSA_PSS_H_
+
+#include <stdint.h>
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ETS_SIG_LEN 384 /* Bytes */
+#define ETS_DIGEST_LEN 32 /* SHA-256, bytes */
+
+typedef struct {
+    uint8_t n[384]; /* Public key modulus */
+    uint32_t e;     /* Public key exponent */
+    uint8_t rinv[384];
+    uint32_t mdash;
+} ets_rsa_pubkey_t;
+
+bool ets_rsa_pss_verify(const ets_rsa_pubkey_t *key, const uint8_t *sig, const uint8_t *digest, uint8_t *verified_digest);
+
+void ets_mgf1_sha256(const uint8_t *mgfSeed, size_t seedLen, size_t maskLen, uint8_t *mask);
+
+bool ets_emsa_pss_verify(const uint8_t *encoded_message, const uint8_t *mhash);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/rtc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/rtc.h
new file mode 100644
index 00000000000..d46e5d7baa2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/rtc.h
@@ -0,0 +1,254 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_RTC_H_
+#define _ROM_RTC_H_
+
+#include "ets_sys.h"
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "soc/soc.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup rtc_apis, rtc registers and memory related apis
+  * @brief rtc apis
+  */
+
+/** @addtogroup rtc_apis
+  * @{
+  */
+
+/**************************************************************************************
+  *                                       Note:                                       *
+  *       Some Rtc memory and registers are used, in ROM or in internal library.      *
+  *          Please do not use reserved or used rtc memory or registers.              *
+  *                                                                                   *
+  *************************************************************************************
+  *                          RTC  Memory & Store Register usage
+  *************************************************************************************
+  *     rtc memory addr         type    size            usage
+  *     0x3f421000(0x50000000)  Slow    SIZE_CP         Co-Processor code/Reset Entry
+  *     0x3f421000+SIZE_CP      Slow    8192-SIZE_CP
+  *
+  *     0x3ff80000(0x40070000)  Fast    8192            deep sleep entry code
+  *
+  *************************************************************************************
+  *     RTC store registers     usage
+  *     RTC_CNTL_STORE0_REG     Reserved
+  *     RTC_CNTL_STORE1_REG     RTC_SLOW_CLK calibration value
+  *     RTC_CNTL_STORE2_REG     Boot time, low word
+  *     RTC_CNTL_STORE3_REG     Boot time, high word
+  *     RTC_CNTL_STORE4_REG     External XTAL frequency
+  *     RTC_CNTL_STORE5_REG     APB bus frequency
+  *     RTC_CNTL_STORE6_REG     FAST_RTC_MEMORY_ENTRY
+  *     RTC_CNTL_STORE7_REG     FAST_RTC_MEMORY_CRC
+  *************************************************************************************
+  */
+
+#define RTC_SLOW_CLK_CAL_REG    RTC_CNTL_STORE1_REG
+#define RTC_BOOT_TIME_LOW_REG   RTC_CNTL_STORE2_REG
+#define RTC_BOOT_TIME_HIGH_REG  RTC_CNTL_STORE3_REG
+#define RTC_XTAL_FREQ_REG       RTC_CNTL_STORE4_REG
+#define RTC_APB_FREQ_REG        RTC_CNTL_STORE5_REG
+#define RTC_ENTRY_ADDR_REG      RTC_CNTL_STORE6_REG
+#define RTC_RESET_CAUSE_REG     RTC_CNTL_STORE6_REG
+#define RTC_MEMORY_CRC_REG      RTC_CNTL_STORE7_REG
+
+#define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
+
+typedef enum {
+    AWAKE = 0,             //<CPU ON
+    LIGHT_SLEEP = BIT0,    //CPU waiti, PLL ON.  We don't need explicitly set this mode.
+    DEEP_SLEEP  = BIT1     //CPU OFF, PLL OFF, only specific timer could wake up
+} SLEEP_MODE;
+
+typedef enum {
+    NO_MEAN                =  0,
+    POWERON_RESET          =  1,    /**<1, Vbat power on reset*/
+    RTC_SW_SYS_RESET       =  3,    /**<3, Software reset digital core*/
+    DEEPSLEEP_RESET        =  5,    /**<5, Deep Sleep reset digital core*/
+    TG0WDT_SYS_RESET       =  7,    /**<7, Timer Group0 Watch dog reset digital core*/
+    TG1WDT_SYS_RESET       =  8,    /**<8, Timer Group1 Watch dog reset digital core*/
+    RTCWDT_SYS_RESET       =  9,    /**<9, RTC Watch dog Reset digital core*/
+    INTRUSION_RESET        = 10,    /**<10, Instrusion tested to reset CPU*/
+    TG0WDT_CPU_RESET       = 11,    /**<11, Time Group0 reset CPU*/
+    RTC_SW_CPU_RESET       = 12,    /**<12, Software reset CPU*/
+    RTCWDT_CPU_RESET       = 13,    /**<13, RTC Watch dog Reset CPU*/
+    RTCWDT_BROWN_OUT_RESET = 15,    /**<15, Reset when the vdd voltage is not stable*/
+    RTCWDT_RTC_RESET       = 16,    /**<16, RTC Watch dog reset digital core and rtc module*/
+    TG1WDT_CPU_RESET       = 17,    /**<17, Time Group1 reset CPU*/
+    SUPER_WDT_RESET        = 18,    /**<18, super watchdog reset digital core and rtc module*/
+    GLITCH_RTC_RESET       = 19,    /**<19, glitch reset digital core and rtc module*/
+} RESET_REASON;
+
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
+
+typedef enum {
+    NO_SLEEP        = 0,
+    EXT_EVENT0_TRIG = BIT0,
+    EXT_EVENT1_TRIG = BIT1,
+    GPIO_TRIG       = BIT2,
+    TIMER_EXPIRE    = BIT3,
+    SDIO_TRIG       = BIT4,
+    MAC_TRIG        = BIT5,
+    UART0_TRIG      = BIT6,
+    UART1_TRIG      = BIT7,
+    TOUCH_TRIG      = BIT8,
+    SAR_TRIG        = BIT9,
+    BT_TRIG         = BIT10,
+    RISCV_TRIG      = BIT11,
+    XTAL_DEAD_TRIG  = BIT12,
+    RISCV_TRAP_TRIG = BIT13,
+    USB_TRIG        = BIT14
+} WAKEUP_REASON;
+
+typedef enum {
+    DISEN_WAKEUP       = NO_SLEEP,
+    EXT_EVENT0_TRIG_EN = EXT_EVENT0_TRIG,
+    EXT_EVENT1_TRIG_EN = EXT_EVENT1_TRIG,
+    GPIO_TRIG_EN       = GPIO_TRIG,
+    TIMER_EXPIRE_EN    = TIMER_EXPIRE,
+    SDIO_TRIG_EN       = SDIO_TRIG,
+    MAC_TRIG_EN        = MAC_TRIG,
+    UART0_TRIG_EN      = UART0_TRIG,
+    UART1_TRIG_EN      = UART1_TRIG,
+    TOUCH_TRIG_EN      = TOUCH_TRIG,
+    SAR_TRIG_EN        = SAR_TRIG,
+    BT_TRIG_EN         = BT_TRIG,
+    RISCV_TRIG_EN      = RISCV_TRIG,
+    XTAL_DEAD_TRIG_EN  = XTAL_DEAD_TRIG,
+    RISCV_TRAP_TRIG_EN = RISCV_TRAP_TRIG,
+    USB_TRIG_EN        = USB_TRIG
+} WAKEUP_ENABLE;
+
+/**
+  * @brief  Get the reset reason for CPU.
+  *
+  * @param  int cpu_no : CPU no.
+  *
+  * @return RESET_REASON
+  */
+RESET_REASON rtc_get_reset_reason(int cpu_no);
+
+/**
+  * @brief  Get the wakeup cause for CPU.
+  *
+  * @param  int cpu_no : CPU no.
+  *
+  * @return WAKEUP_REASON
+  */
+WAKEUP_REASON rtc_get_wakeup_cause(void);
+
+/**
+  * @brief Get CRC for Fast RTC Memory.
+  *
+  * @param  uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory.
+  *
+  * @param  uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte.
+  *
+  * @return uint32_t : CRC32 result
+  */
+uint32_t calc_rtc_memory_crc(uint32_t start_addr, uint32_t crc_len);
+
+/**
+  * @brief Set CRC of Fast RTC memory 0-0x7ff into RTC STORE7.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void set_rtc_memory_crc(void);
+
+/**
+  * @brief Suppress ROM log by setting specific RTC control register.
+  * @note This is not a permanent disable of ROM logging since the RTC register can not retain after chip reset.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+static inline void rtc_suppress_rom_log(void)
+{
+    /* To disable logging in the ROM, only the least significant bit of the register is used,
+     * but since this register is also used to store the frequency of the main crystal (RTC_XTAL_FREQ_REG),
+     * you need to write to this register in the same format.
+     * Namely, the upper 16 bits and lower should be the same.
+     */
+    REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
+}
+
+/**
+  * @brief Fetch entry from RTC memory and RTC STORE reg
+  *
+  * @param uint32_t * entry_addr : the address to save entry
+  *
+  * @param RESET_REASON reset_reason : reset reason this time
+  *
+  * @return None
+  */
+void rtc_boot_control(uint32_t * entry_addr, RESET_REASON reset_reason);
+
+/**
+  * @brief Software Reset digital core.
+  *
+  * It is not recommended to use this function in esp-idf, use
+  * esp_restart() instead.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void software_reset(void);
+
+/**
+  * @brief Software Reset digital core.
+  *
+  * It is not recommended to use this function in esp-idf, use
+  * esp_restart() instead.
+  *
+  * @param  int cpu_no : The CPU to reset, 0 for PRO CPU, 1 for APP CPU.
+  *
+  * @return None
+  */
+void software_reset_cpu(int cpu_no);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_RTC_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/secure_boot.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/secure_boot.h
new file mode 100644
index 00000000000..a0fcecfd3c5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/secure_boot.h
@@ -0,0 +1,116 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "ets_sys.h"
+#include "rsa_pss.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
+typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
+typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
+
+/* Anti-FI measure: use full words for success/fail, instead of
+   0/non-zero
+*/
+typedef enum {
+    SB_SUCCESS = 0x3A5A5AA5,
+    SB_FAILED = 0x7533885E,
+} ets_secure_boot_status_t;
+
+
+/* Verify and stage-load the bootloader image
+   (reconfigures cache to map, loads trusted key digests from efuse,
+   copies the bootloader into the staging buffer.)
+
+   If allow_key_revoke is true and aggressive revoke efuse is set,
+   any failed signature has its associated key revoked in efuse.
+
+   If result is SB_SUCCESS, the "simple hash" of the bootloader
+   is copied into verified_hash.
+*/
+ets_secure_boot_status_t ets_secure_boot_verify_stage_bootloader(uint8_t *verified_hash, bool allow_key_revoke);
+
+/* Verify bootloader image (reconfigures cache to map),
+   with key digests provided as parameters.)
+
+   Can be used to verify secure boot status before enabling
+   secure boot permanently.
+
+   If stage_load parameter is true, bootloader is copied into staging
+   buffer in RAM at the same time.
+
+   If result is SB_SUCCESS, the "simple hash" of the bootloader is
+   copied into verified_hash.
+*/
+ets_secure_boot_status_t ets_secure_boot_verify_bootloader_with_keys(uint8_t *verified_hash, const ets_secure_boot_key_digests_t *trusted_keys, bool stage_load);
+
+/* Read key digests from efuse. Any revoked/missing digests will be
+   marked as NULL
+*/
+ETS_STATUS ets_secure_boot_read_key_digests(ets_secure_boot_key_digests_t *trusted_keys);
+
+/* Verify supplied signature against supplied digest, using
+   supplied trusted key digests.
+
+   Doesn't reconfigure cache or any other hardware access except for RSA peripheral.
+
+   If result is SB_SUCCESS, the image_digest value is copied into verified_digest.
+*/
+ets_secure_boot_status_t ets_secure_boot_verify_signature(const ets_secure_boot_signature_t *sig, const uint8_t *image_digest, const ets_secure_boot_key_digests_t *trusted_keys, uint8_t *verified_digest);
+
+/* Revoke a public key digest in efuse.
+   @param index Digest to revoke. Must be 0, 1 or 2.
+ */
+void ets_secure_boot_revoke_public_key_digest(int index);
+
+#define CRC_SIGN_BLOCK_LEN 1196
+#define SIG_BLOCK_PADDING 4096
+#define ETS_SECURE_BOOT_V2_SIGNATURE_MAGIC 0xE7
+
+/* Secure Boot V2 signature block
+
+   (Up to 3 in a signature sector are appended to the image)
+ */
+struct ets_secure_boot_sig_block {
+    uint8_t magic_byte;
+    uint8_t version;
+    uint8_t _reserved1;
+    uint8_t _reserved2;
+    uint8_t image_digest[32];
+    ets_rsa_pubkey_t key;
+    uint8_t signature[384];
+    uint32_t block_crc;
+    uint8_t _padding[16];
+};
+
+_Static_assert(sizeof(ets_secure_boot_sig_block_t) == 1216, "invalid sig block size");
+
+#define SECURE_BOOT_NUM_BLOCKS 3
+
+/* V2 Secure boot signature sector (up to 3 blocks) */
+struct ets_secure_boot_signature {
+    ets_secure_boot_sig_block_t block[SECURE_BOOT_NUM_BLOCKS];
+    uint8_t _padding[4096 - (sizeof(ets_secure_boot_sig_block_t) * SECURE_BOOT_NUM_BLOCKS)];
+};
+
+_Static_assert(sizeof(ets_secure_boot_signature_t) == 4096, "invalid sig sector size");
+
+#define MAX_KEY_DIGESTS 3
+
+struct ets_secure_boot_key_digests {
+    const void *key_digests[MAX_KEY_DIGESTS];
+    bool allow_key_revoke;
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/sha.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/sha.h
new file mode 100644
index 00000000000..f04e9aec507
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/sha.h
@@ -0,0 +1,74 @@
+/*
+  ROM functions for hardware SHA support.
+
+  It is not recommended to use these functions directly.  If using
+  them from esp-idf then use the esp_sha_lock_engine() and
+  esp_sha_lock_memory_block() functions in hwcrypto/sha.h to ensure
+  exclusive access.
+ */
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ROM_SHA_H_
+#define _ROM_SHA_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "ets_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    SHA1 = 0,
+    SHA2_224,
+    SHA2_256,
+    SHA2_384,
+    SHA2_512,
+    SHA2_512224,
+    SHA2_512256,
+    SHA2_512T,
+    SHA_TYPE_MAX
+} SHA_TYPE;
+
+typedef struct SHAContext {
+    bool start;
+    bool in_hardware;               // Is this context currently in peripheral? Needs to be manually cleared if multiple SHAs are interleaved
+    SHA_TYPE type;
+    uint32_t state[16];             // For SHA1/SHA224/SHA256, used 8, other used 16
+    unsigned char buffer[128];      // For SHA1/SHA224/SHA256, used 64, other used 128
+    uint32_t total_bits[4];
+} SHA_CTX;
+
+void ets_sha_enable(void);
+
+void ets_sha_disable(void);
+
+ets_status_t ets_sha_init(SHA_CTX *ctx, SHA_TYPE type);
+
+ets_status_t ets_sha_starts(SHA_CTX *ctx, uint16_t sha512_t);
+
+void ets_sha_get_state(SHA_CTX *ctx);
+
+void ets_sha_process(SHA_CTX *ctx, const unsigned char *input);
+
+void ets_sha_update(SHA_CTX *ctx, const unsigned char *input, uint32_t input_bytes, bool update_ctx);
+
+ets_status_t ets_sha_finish(SHA_CTX *ctx, unsigned char *output);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_SHA_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/spi_flash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/spi_flash.h
new file mode 100644
index 00000000000..beb2fcdf309
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/spi_flash.h
@@ -0,0 +1,578 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_SPI_FLASH_H_
+#define _ROM_SPI_FLASH_H_
+
+#ifndef CONFIG_IDF_TARGET_ESP32S2
+#error This file should only be included for ESP32-S2 target
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_attr.h"
+#include "soc/spi_mem_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup spi_flash_apis, spi flash operation related apis
+  * @brief spi_flash apis
+  */
+
+/** @addtogroup spi_flash_apis
+  * @{
+  */
+
+/*************************************************************
+ *                            Note
+ *************************************************************
+ * 1. ESP32 chip have 4 SPI slave/master, however, SPI0 is
+ *    used as an SPI master to access Flash and ext-SRAM by
+ *    Cache module. It will support Decryto read for Flash,
+ *    read/write for ext-SRAM. And SPI1 is also used as an
+ *    SPI master for Flash read/write and ext-SRAM read/write.
+ *    It will support Encrypto write for Flash.
+ * 2. As an SPI master, SPI support Highest clock to 80M,
+ *    however, Flash with 80M Clock should be configured
+ *    for different Flash chips. If you want to use 80M
+ *    clock We should use the SPI that is certified by
+ *    Espressif. However, the certification is not started
+ *    at the time, so please use 40M clock at the moment.
+ * 3. SPI Flash can use 2 lines or 4 lines mode. If you
+ *    use 2 lines mode, you can save two pad SPIHD and
+ *    SPIWP for gpio. ESP32 support configured SPI pad for
+ *    Flash, the configuration is stored in efuse and flash.
+ *    However, the configurations of pads should be certified
+ *    by Espressif. If you use this function, please use 40M
+ *    clock at the moment.
+ * 4. ESP32 support to use Common SPI command to configure
+ *    Flash to QIO mode, if you failed to configure with fix
+ *    command. With Common SPI Command, ESP32 can also provide
+ *    a way to use same Common SPI command groups on different
+ *    Flash chips.
+ * 5. This functions are not protected by packeting, Please use the
+ *************************************************************
+ */
+
+#define PERIPHS_SPI_FLASH_CMD                 SPI_MEM_CMD_REG(1)
+#define PERIPHS_SPI_FLASH_ADDR                SPI_MEM_ADDR_REG(1)
+#define PERIPHS_SPI_FLASH_CTRL                SPI_MEM_CTRL_REG(1)
+#define PERIPHS_SPI_FLASH_CTRL1               SPI_MEM_CTRL1_REG(1)
+#define PERIPHS_SPI_FLASH_STATUS              SPI_MEM_RD_STATUS_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG              SPI_MEM_USER_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG1             SPI_MEM_USER1_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG2             SPI_MEM_USER2_REG(1)
+#define PERIPHS_SPI_FLASH_C0                  SPI_MEM_W0_REG(1)
+#define PERIPHS_SPI_FLASH_C1                  SPI_MEM_W1_REG(1)
+#define PERIPHS_SPI_FLASH_C2                  SPI_MEM_W2_REG(1)
+#define PERIPHS_SPI_FLASH_C3                  SPI_MEM_W3_REG(1)
+#define PERIPHS_SPI_FLASH_C4                  SPI_MEM_W4_REG(1)
+#define PERIPHS_SPI_FLASH_C5                  SPI_MEM_W5_REG(1)
+#define PERIPHS_SPI_FLASH_C6                  SPI_MEM_W6_REG(1)
+#define PERIPHS_SPI_FLASH_C7                  SPI_MEM_W7_REG(1)
+#define PERIPHS_SPI_FLASH_TX_CRC              SPI_MEM_TX_CRC_REG(1)
+
+#define SPI0_R_QIO_DUMMY_CYCLELEN             5
+#define SPI0_R_QIO_ADDR_BITSLEN               23
+#define SPI0_R_FAST_DUMMY_CYCLELEN            7
+#define SPI0_R_DIO_DUMMY_CYCLELEN             3
+#define SPI0_R_FAST_ADDR_BITSLEN              23
+#define SPI0_R_SIO_ADDR_BITSLEN               23
+
+#define SPI1_R_QIO_DUMMY_CYCLELEN             5
+#define SPI1_R_QIO_ADDR_BITSLEN               23
+#define SPI1_R_FAST_DUMMY_CYCLELEN            7
+#define SPI1_R_DIO_DUMMY_CYCLELEN             3
+#define SPI1_R_DIO_ADDR_BITSLEN               23
+#define SPI1_R_FAST_ADDR_BITSLEN              23
+#define SPI1_R_SIO_ADDR_BITSLEN               23
+
+#define ESP_ROM_SPIFLASH_W_SIO_ADDR_BITSLEN   23
+
+#define ESP_ROM_SPIFLASH_TWO_BYTE_STATUS_EN   SPI_MEM_WRSR_2B
+
+//SPI address register
+#define ESP_ROM_SPIFLASH_BYTES_LEN            24
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_WRITE_NUM  32
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM   16
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_BITS  0xf
+
+//SPI status register
+#define  ESP_ROM_SPIFLASH_BUSY_FLAG           BIT0
+#define  ESP_ROM_SPIFLASH_WRENABLE_FLAG       BIT1
+#define  ESP_ROM_SPIFLASH_BP0                 BIT2
+#define  ESP_ROM_SPIFLASH_BP1                 BIT3
+#define  ESP_ROM_SPIFLASH_BP2                 BIT4
+#define  ESP_ROM_SPIFLASH_WR_PROTECT          (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
+#define  ESP_ROM_SPIFLASH_QE                  BIT9
+
+#define FLASH_ID_GD25LQ32C  0xC86016
+
+typedef enum {
+    ESP_ROM_SPIFLASH_QIO_MODE = 0,
+    ESP_ROM_SPIFLASH_QOUT_MODE,
+    ESP_ROM_SPIFLASH_DIO_MODE,
+    ESP_ROM_SPIFLASH_DOUT_MODE,
+    ESP_ROM_SPIFLASH_FASTRD_MODE,
+    ESP_ROM_SPIFLASH_SLOWRD_MODE,
+    ESP_ROM_SPIFLASH_OPI_STR_MODE,
+    ESP_ROM_SPIFLASH_OPI_DTR_MODE,
+    ESP_ROM_SPIFLASH_OOUT_MODE,
+    ESP_ROM_SPIFLASH_OIO_STR_MODE,
+    ESP_ROM_SPIFLASH_OIO_DTR_MODE,
+} esp_rom_spiflash_read_mode_t;
+
+typedef enum {
+    ESP_ROM_SPIFLASH_RESULT_OK,
+    ESP_ROM_SPIFLASH_RESULT_ERR,
+    ESP_ROM_SPIFLASH_RESULT_TIMEOUT
+} esp_rom_spiflash_result_t;
+
+typedef struct {
+    uint32_t device_id;
+    uint32_t chip_size;    // chip size in bytes
+    uint32_t block_size;
+    uint32_t sector_size;
+    uint32_t page_size;
+    uint32_t status_mask;
+} esp_rom_spiflash_chip_t;
+
+typedef struct {
+    uint8_t  data_length;
+    uint8_t  read_cmd0;
+    uint8_t  read_cmd1;
+    uint8_t  write_cmd;
+    uint16_t data_mask;
+    uint16_t data;
+} esp_rom_spiflash_common_cmd_t;
+
+/**
+  * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write).
+  *
+  * @param  uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv);
+
+/**
+  * @brief Select SPI Flash to QIO mode when WP pad is read from Flash.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t wp_gpio_num: WP gpio number.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @return None
+  */
+void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi);
+
+/**
+  * @brief Set SPI Flash pad drivers.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t wp_gpio_num: WP gpio number.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @param  uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid
+  *            drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp.
+  *                        Values usually read from falsh by rom code, function usually callde by rom code.
+  *                        if value with bit(3) set, the value is valid, bit[2:0] is the real value.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs);
+
+/**
+  * @brief Select SPI Flash function for pads.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @return None
+  */
+void esp_rom_spiflash_select_padsfunc(uint32_t ishspi);
+
+/**
+  * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @param  uint8_t legacy: In legacy mode, more SPI command is used in line.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy);
+
+/**
+  * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR).
+  *    Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t *status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status);
+
+/**
+  * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t *status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status);
+
+/**
+  * @brief Write status to Falsh status register.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t status_value : Value to .
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value);
+
+/**
+  * @brief Use a command to Read Flash status register.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t*status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd);
+
+/**
+  * @brief Config SPI Flash read mode when init.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD.
+  *
+  * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode);
+
+/**
+  * @brief Config SPI Flash clock divisor.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t freqdiv: clock divisor.
+  *
+  * @param  uint8_t spi: 0 for SPI0, 1 for SPI1.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi);
+
+/**
+  * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command.
+  *
+  * @return uint16_t  0 : do not send command any more.
+  *                   1 : go to the next command.
+  *                   n > 1 : skip (n - 1) commands.
+  */
+uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd);
+
+/**
+  * @brief Unlock SPI write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void);
+
+/**
+  * @brief SPI write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Lock error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_lock(void);
+
+/**
+  * @brief Update SPI Flash parameter.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t deviceId : Device ID read from SPI, the low 32 bit.
+  *
+  * @param  uint32_t chip_size : The Flash size.
+  *
+  * @param  uint32_t block_size : The Flash block size.
+  *
+  * @param  uint32_t sector_size : The Flash sector size.
+  *
+  * @param  uint32_t page_size : The Flash page size.
+  *
+  * @param  uint32_t status_mask : The Mask used when read status from Flash(use single CMD).
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Update error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size,
+                                                        uint32_t sector_size, uint32_t page_size, uint32_t status_mask);
+
+/**
+  * @brief Erase whole flash chip.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void);
+
+/**
+  * @brief Erase a 64KB block of flash
+  *        Uses SPI flash command D8H.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t block_num : Which block to erase.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num);
+
+/**
+  * @brief Erase a sector of flash.
+  *        Uses SPI flash command 20H.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t sector_num : Which sector to erase.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num);
+
+/**
+  * @brief Erase some sectors.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t start_addr : Start addr to erase, should be sector aligned.
+  *
+  * @param  uint32_t area_len : Length to erase, should be sector aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len);
+
+/**
+  * @brief Write Data to Flash, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t dest_addr : Address to write, should be 4 bytes aligned.
+  *
+  * @param  const uint32_t *src : The pointer to data which is to write.
+  *
+  * @param  uint32_t len : Length to write, should be 4 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len);
+
+/**
+  * @brief Read Data from Flash, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t src_addr : Address to read, should be 4 bytes aligned.
+  *
+  * @param  uint32_t *dest : The buf to read the data.
+  *
+  * @param  uint32_t len : Length to read, should be 4 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len);
+
+/**
+  * @brief SPI1 go into encrypto mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void esp_rom_spiflash_write_encrypted_enable(void);
+
+/**
+  * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t flash_addr : Address to write, should be 32 bytes aligned.
+  *
+  * @param  uint32_t *data : The pointer to data which is to write.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data);
+
+/**
+  * @brief SPI1 go out of encrypto mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void esp_rom_spiflash_write_encrypted_disable(void);
+
+/**
+  * @brief Write data to flash with transparent encryption.
+  * @note Sectors to be written should already be erased.
+  *
+  * @note Please do not call this function in SDK.
+  *
+  * @param  uint32_t flash_addr : Address to write, should be 32 byte aligned.
+  *
+  * @param  uint32_t *data : The pointer to data to write. Note, this pointer must
+  *                          be 32 bit aligned and the content of the data will be
+  *                          modified by the encryption function.
+  *
+  * @param  uint32_t len : Length to write, should be 32 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len);
+
+
+/* TODO: figure out how to map these to their new names */
+typedef enum {
+    SPI_ENCRYPT_DESTINATION_FLASH,
+    SPI_ENCRYPT_DESTINATION_PSRAM,
+} SpiEncryptDest;
+
+typedef esp_rom_spiflash_result_t SpiFlashOpResult;
+
+SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void* data, uint32_t len);
+SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void* data, uint32_t len);
+void SPI_Write_Encrypt_Enable(void);
+void SPI_Write_Encrypt_Disable(void);
+
+/** @brief Wait until SPI flash write operation is complete
+ *
+ * @note Please do not call this function in SDK.
+ *
+ * Reads the Write In Progress bit of the SPI flash status register,
+ * repeats until this bit is zero (indicating write complete).
+ *
+ * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete
+ *         ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status.
+ */
+esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi);
+
+
+/** @brief Enable Quad I/O pin functions
+ *
+ * @note Please do not call this function in SDK.
+ *
+ * Sets the HD & WP pin functions for Quad I/O modes, based on the
+ * efuse SPI pin configuration.
+ *
+ * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O.
+ *
+ * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig().
+ * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored.
+ * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored.
+ * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used
+ *   to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI).
+ *   Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral.
+ */
+void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
+
+/**
+ * @brief Clear WEL bit unconditionally.
+ *
+ * @return always ESP_ROM_SPIFLASH_RESULT_OK
+ */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
+
+/** @brief Global esp_rom_spiflash_chip_t structure used by ROM functions
+ *
+ */
+extern esp_rom_spiflash_chip_t g_rom_flashchip;
+
+extern uint8_t g_rom_spiflash_dummy_len_plus[];
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_SPI_FLASH_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/uart.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/uart.h
new file mode 100644
index 00000000000..899413f3171
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/uart.h
@@ -0,0 +1,456 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ROM_UART_H_
+#define _ROM_UART_H_
+
+#include "esp_types.h"
+#include "esp_attr.h"
+#include "ets_sys.h"
+#include "soc/soc.h"
+#include "soc/uart_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup uart_apis, uart configuration and communication related apis
+  * @brief uart apis
+  */
+
+/** @addtogroup uart_apis
+  * @{
+  */
+
+#define RX_BUFF_SIZE                     0x400
+#define TX_BUFF_SIZE                     100
+
+//uart int enalbe register ctrl bits
+#define UART_RCV_INTEN                   BIT0
+#define UART_TRX_INTEN                   BIT1
+#define UART_LINE_STATUS_INTEN           BIT2
+
+//uart int identification ctrl bits
+#define UART_INT_FLAG_MASK               0x0E
+
+//uart fifo ctrl bits
+#define UART_CLR_RCV_FIFO                BIT1
+#define UART_CLR_TRX_FIFO                BIT2
+#define UART_RCVFIFO_TRG_LVL_BITS        BIT6
+
+//uart line control bits
+#define  UART_DIV_LATCH_ACCESS_BIT       BIT7
+
+//uart line status bits
+#define  UART_RCV_DATA_RDY_FLAG          BIT0
+#define  UART_RCV_OVER_FLOW_FLAG         BIT1
+#define  UART_RCV_PARITY_ERR_FLAG        BIT2
+#define  UART_RCV_FRAME_ERR_FLAG         BIT3
+#define  UART_BRK_INT_FLAG               BIT4
+#define  UART_TRX_FIFO_EMPTY_FLAG        BIT5
+#define  UART_TRX_ALL_EMPTY_FLAG         BIT6   // include fifo and shift reg
+#define  UART_RCV_ERR_FLAG               BIT7
+
+//send and receive message frame head
+#define FRAME_FLAG                       0x7E
+
+typedef enum {
+    UART_LINE_STATUS_INT_FLAG  = 0x06,
+    UART_RCV_FIFO_INT_FLAG     = 0x04,
+    UART_RCV_TMOUT_INT_FLAG    = 0x0C,
+    UART_TXBUFF_EMPTY_INT_FLAG = 0x02
+} UartIntType;   //consider bit0 for int_flag
+
+typedef enum {
+    RCV_ONE_BYTE      = 0x0,
+    RCV_FOUR_BYTE     = 0x1,
+    RCV_EIGHT_BYTE    = 0x2,
+    RCV_FOURTEEN_BYTE = 0x3
+} UartRcvFifoTrgLvl;
+
+typedef enum {
+    FIVE_BITS  = 0x0,
+    SIX_BITS   = 0x1,
+    SEVEN_BITS = 0x2,
+    EIGHT_BITS = 0x3
+} UartBitsNum4Char;
+
+typedef enum {
+    ONE_STOP_BIT      = 1,
+    ONE_HALF_STOP_BIT = 2,
+    TWO_STOP_BIT      = 3
+} UartStopBitsNum;
+
+typedef enum {
+    NONE_BITS = 0,
+    ODD_BITS  = 2,
+    EVEN_BITS = 3
+
+} UartParityMode;
+
+typedef enum {
+    STICK_PARITY_DIS = 0,
+    STICK_PARITY_EN  = 2
+} UartExistParity;
+
+typedef enum {
+    BIT_RATE_9600   = 9600,
+    BIT_RATE_19200  = 19200,
+    BIT_RATE_38400  = 38400,
+    BIT_RATE_57600  = 57600,
+    BIT_RATE_115200 = 115200,
+    BIT_RATE_230400 = 230400,
+    BIT_RATE_460800 = 460800,
+    BIT_RATE_921600 = 921600
+} UartBautRate;
+
+typedef enum {
+    NONE_CTRL,
+    HARDWARE_CTRL,
+    XON_XOFF_CTRL
+} UartFlowCtrl;
+
+typedef enum {
+    EMPTY,
+    UNDER_WRITE,
+    WRITE_OVER
+} RcvMsgBuffState;
+
+typedef struct {
+    uint8_t *pRcvMsgBuff;
+    uint8_t *pWritePos;
+    uint8_t *pReadPos;
+    uint8_t  TrigLvl;
+    RcvMsgBuffState BuffState;
+} RcvMsgBuff;
+
+typedef struct {
+    uint32_t  TrxBuffSize;
+    uint8_t  *pTrxBuff;
+} TrxMsgBuff;
+
+typedef enum {
+    BAUD_RATE_DET,
+    WAIT_SYNC_FRM,
+    SRCH_MSG_HEAD,
+    RCV_MSG_BODY,
+    RCV_ESC_CHAR,
+} RcvMsgState;
+
+typedef struct {
+    UartBautRate     baut_rate;
+    UartBitsNum4Char data_bits;
+    UartExistParity  exist_parity;
+    UartParityMode   parity;    // chip size in byte
+    UartStopBitsNum  stop_bits;
+    UartFlowCtrl     flow_ctrl;
+    uint8_t          buff_uart_no;  //indicate which uart use tx/rx buffer
+    RcvMsgBuff       rcv_buff;
+//    TrxMsgBuff       trx_buff;
+    RcvMsgState      rcv_state;
+    int              received;
+} UartDevice;
+
+/**
+  * @brief Init uart device struct value and reset uart0/uart1 rx.
+  *        Please do not call this function in SDK.
+  *
+  * @param  rxBuffer, must be a pointer to RX_BUFF_SIZE bytes or NULL
+  *
+  * @return None
+  */
+void uartAttach(void *rxBuffer);
+
+/**
+  * @brief Init uart0 or uart1 for UART download booting mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, else for UART1.
+  *
+  * @param  uint32_t clock : clock used by uart module, to adjust baudrate.
+  *
+  * @return None
+  */
+void Uart_Init(uint8_t uart_no, uint32_t clock);
+
+/**
+  * @brief Modify uart baudrate.
+  *        This function will reset RX/TX fifo for uart.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @param  uint32_t DivLatchValue : (clock << 4)/baudrate.
+  *
+  * @return None
+  */
+void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue);
+
+
+/**
+  * @brief Re-calculate UART baudrate divisor for a given (changed)
+  *        clock speed.
+  *        This function will not reset RX/TX fifo for uart.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @param  uint32_t clock : clock used by uart module, to adjust baudrate.
+  *
+  * @return None
+  */
+void uart_div_reinit(uint8_t uart_no, uint32_t clock);
+
+
+/**
+  * @brief Init uart0 or uart1 for UART download booting mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module, easy to detect, wait until detected;
+  *                           1, two UART modules, hard to detect, detect and return.
+  *
+  * @return None
+  */
+int uart_baudrate_detect(uint8_t uart_no, uint8_t is_sync);
+
+/**
+  * @brief Switch printf channel of uart_tx_one_char.
+  *        Please do not call this function when printf.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None
+  */
+void uart_tx_switch(uint8_t uart_no);
+
+/**
+  * @brief Switch message exchange channel for UART download booting.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None
+  */
+void uart_buff_switch(uint8_t uart_no);
+
+/**
+  * @brief Output a char to printf channel, wait until fifo not full.
+  *
+  * @param  None
+  *
+  * @return OK.
+  */
+STATUS uart_tx_one_char(uint8_t TxChar);
+
+/**
+  * @brief Output a char to message exchange channel, wait until fifo not full.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return OK.
+  */
+STATUS uart_tx_one_char2(uint8_t TxChar);
+
+/**
+  * @brief Wait until uart tx full empty.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None.
+  */
+void uart_tx_flush(uint8_t uart_no);
+
+/**
+  * @brief Wait until uart tx full empty and the last char send ok.
+  *
+  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2
+  *
+  * The function defined in ROM code has a bug, so we define the correct version
+  * here for compatibility.
+  */
+void uart_tx_wait_idle(uint8_t uart_no);
+
+/**
+  * @brief Get an input char from message channel.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pRxChar : the pointer to store the char.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS uart_rx_one_char(uint8_t *pRxChar);
+
+/**
+  * @brief Get an input char from message channel, wait until successful.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return char : input char value.
+  */
+char uart_rx_one_char_block(void);
+
+/**
+  * @brief Get an input string line from message channel.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pString : the pointer to store the string.
+  *
+  * @param  uint8_t MaxStrlen : the max string length, incude '\0'.
+  *
+  * @return OK.
+  */
+STATUS UartRxString(uint8_t *pString, uint8_t MaxStrlen);
+
+/**
+  * @brief Process uart recevied information in the interrupt handler.
+  *        Please do not call this function in SDK.
+  *
+  * @param  void *para : the message receive buffer.
+  *
+  * @return None
+  */
+void uart_rx_intr_handler(void *para);
+
+/**
+  * @brief Get an char from receive buffer.
+  *        Please do not call this function in SDK.
+  *
+  * @param  RcvMsgBuff *pRxBuff : the pointer to the struct that include receive buffer.
+  *
+  * @param  uint8_t *pRxByte : the pointer to store the char.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS uart_rx_readbuff( RcvMsgBuff *pRxBuff, uint8_t *pRxByte);
+
+/**
+  * @brief Get all chars from receive buffer.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pCmdLn : the pointer to store the string.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS UartGetCmdLn(uint8_t *pCmdLn);
+
+/**
+  * @brief Get uart configuration struct.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return UartDevice * : uart configuration struct pointer.
+  */
+UartDevice *GetUartDevice(void);
+
+/**
+  * @brief Send an packet to download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *p : the pointer to output string.
+  *
+  * @param  int len : the string length.
+  *
+  * @return None.
+  */
+void send_packet(uint8_t *p, int len);
+
+/**
+  * @brief Receive an packet from download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *p : the pointer to input string.
+  *
+  * @param  int len : If string length > len, the string will be truncated.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module;
+  *                           1, two UART modules.
+  *
+  * @return int : the length of the string.
+  */
+int recv_packet(uint8_t *p, int len, uint8_t is_sync);
+
+/**
+  * @brief Send an packet to download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pData : the pointer to input string.
+  *
+  * @param  uint16_t DataLen : the string length.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS SendMsg(uint8_t *pData, uint16_t DataLen);
+
+/**
+  * @brief Receive an packet from download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pData : the pointer to input string.
+  *
+  * @param  uint16_t MaxDataLen : If string length > MaxDataLen, the string will be truncated.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module;
+  *                           1, two UART modules.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS RcvMsg(uint8_t *pData, uint16_t MaxDataLen, uint8_t is_sync);
+
+/**
+  * @brief Check if this UART is in download connection.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return ETS_NO_BOOT = 0 for no.
+  *         SEL_UART_BOOT = BIT(1) for yes.
+  */
+uint8_t UartConnCheck(uint8_t uart_no);
+
+/**
+  * @brief Initialize the USB ACM UART
+  * Needs to be fed a buffer of at least 128 bytes (ESP_ROM_CDC_ACM_WORK_BUF_MIN),
+  * plus any rx buffer you may want to have.
+  *
+  * @param cdc_acm_work_mem Pointer to work mem for CDC-ACM code
+  * @param cdc_acm_work_mem_len Length of work mem
+  */
+void Uart_Init_USB(void *cdc_acm_work_mem, int cdc_acm_work_mem_len);
+
+
+/**
+  * @brief Install handler to reset the chip when a RTS change has been detected on the CDC-ACM 'UART'.
+  */
+void uart_usb_enable_reset_on_rts(void);
+
+
+extern UartDevice UartDev;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ROM_UART_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/cdc_acm.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/cdc_acm.h
new file mode 100644
index 00000000000..90d71e81772
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/cdc_acm.h
@@ -0,0 +1,262 @@
+/*******************************************************************************
+ *
+ * Copyright(c) 2015,2016 Intel Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************/
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void cdc_acm_device;
+extern cdc_acm_device *uart_acm_dev;
+
+#define ACM_BYTES_PER_TX  64
+
+//ACM statuses are negative to distinguish from USB_DC_* status codes
+#define ACM_STATUS_LINESTATE_CHANGED -1
+#define ACM_STATUS_LINECODING_CHANGED -2
+#define ACM_STATUS_TX -3
+#define ACM_STATUS_RX -4
+
+typedef void(*uart_irq_callback_t)(cdc_acm_device *dev, int status);
+
+/**
+ * @brief Get amount of received characters in buffer
+ *
+ * @returns character count
+ */
+
+int cdc_acm_rx_fifo_cnt(cdc_acm_device *dev);
+
+
+/*
+ * @brief Poll the device for input.
+ *
+ * @return -ENOTSUP Since underlying USB device controller always uses
+ * interrupts, polled mode UART APIs are not implemented for the UART interface
+ * exported by CDC ACM driver. Apps should use fifo_read API instead.
+ */
+
+int cdc_acm_poll_in(cdc_acm_device *dev, unsigned char *c);
+
+/*
+ * @brief Output a character in polled mode.
+ *
+ * The UART poll method for USB UART is simulated by waiting till
+ * we get the next BULK In upcall from the USB device controller or 100 ms.
+ *
+ * @return the same character which is sent
+ */
+unsigned char cdc_acm_poll_out(cdc_acm_device *dev, unsigned char c);
+
+/**
+ * @brief Fill FIFO with data
+ *
+ * @param dev     CDC ACM device struct.
+ * @param tx_data Data to transmit.
+ * @param len     Number of bytes to send.
+ *
+ * @return Number of bytes sent.
+ */
+int cdc_acm_fifo_fill(cdc_acm_device *dev, const uint8_t *tx_data, int len);
+
+/**
+ * @brief Read data from FIFO
+ *
+ * @param dev     CDC ACM device struct.
+ * @param rx_data Pointer to data container.
+ * @param size    Container size.
+ *
+ * @return Number of bytes read.
+ */
+int cdc_acm_fifo_read(cdc_acm_device *dev, uint8_t *rx_data, const int size);
+
+/**
+ * @brief Enable TX interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A.
+ */
+void cdc_acm_irq_tx_enable(cdc_acm_device *dev);
+
+/**
+ * @brief Disable TX interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A.
+ */
+void cdc_acm_irq_tx_disable(cdc_acm_device *dev);
+
+/**
+ * @brief Check if Tx IRQ has been raised
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return 1 if a Tx IRQ is pending, 0 otherwise.
+ */
+int cdc_acm_irq_tx_ready(cdc_acm_device *dev);
+
+/**
+ * @brief Enable RX interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A
+ */
+void cdc_acm_irq_rx_enable(cdc_acm_device *dev);
+
+/**
+ * @brief Disable RX interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A.
+ */
+void cdc_acm_irq_rx_disable(cdc_acm_device *dev);
+
+/**
+ * @brief Enable line state interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A.
+ */
+void cdc_acm_irq_state_enable(cdc_acm_device *dev);
+
+/**
+ * @brief Disable line state interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A.
+ */
+void cdc_acm_irq_state_disable(cdc_acm_device *dev);
+
+
+/**
+ * @brief Check if Rx IRQ has been raised
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return 1 if an IRQ is ready, 0 otherwise.
+ */
+int cdc_acm_irq_rx_ready(cdc_acm_device *dev);
+
+/**
+ * @brief Check if Tx or Rx IRQ is pending
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return 1 if a Tx or Rx IRQ is pending, 0 otherwise.
+ */
+int cdc_acm_irq_is_pending(cdc_acm_device *dev);
+
+/**
+ * @brief Set the callback function pointer for IRQ.
+ *
+ * @param dev CDC ACM device struct.
+ * @param cb  Callback function pointer.
+ *
+ * @return N/A
+ */
+void cdc_acm_irq_callback_set(cdc_acm_device *dev, uart_irq_callback_t cb);
+
+/**
+ * @brief Manipulate line control for UART.
+ *
+ * @param dev CDC ACM device struct
+ * @param ctrl The line control to be manipulated
+ * @param val Value to set the line control
+ *
+ * @return 0 if successful, failed otherwise.
+ */
+int cdc_acm_line_ctrl_set(cdc_acm_device *dev, uint32_t ctrl, uint32_t val);
+
+/**
+ * @brief Manipulate line control for UART.
+ *
+ * @param dev CDC ACM device struct
+ * @param ctrl The line control to be manipulated
+ * @param val Value to set the line control
+ *
+ * @return 0 if successful, failed otherwise.
+ */
+int cdc_acm_line_ctrl_get(cdc_acm_device *dev, uint32_t ctrl, uint32_t *val);
+
+
+/**
+ * @brief Initialize UART channel
+ *
+ * This routine is called to reset the chip in a quiescent state.
+ * It is assumed that this function is called only once per UART.
+ *
+ * @param mem_chunk Memory chunk to use for internal use
+ * @param mem_chunk_size Size of the memory chunk in bytes
+ *
+ * @return dev or NULL
+ */
+cdc_acm_device *cdc_acm_init(void *mem_chunk, int mem_chunk_size);
+
+
+/** Common line controls for UART.*/
+#define LINE_CTRL_BAUD_RATE (1 << 0)
+#define LINE_CTRL_RTS       (1 << 1)
+#define LINE_CTRL_DTR       (1 << 2)
+#define LINE_CTRL_DCD       (1 << 3)
+#define LINE_CTRL_DSR       (1 << 4)
+
+/* Common communication errors for UART.*/
+
+/** @brief Overrun error */
+#define UART_ERROR_OVERRUN  (1 << 0)
+
+/** @brief Parity error */
+#define UART_ERROR_PARITY   (1 << 1)
+
+/** @brief Framing error */
+#define UART_ERROR_FRAMING  (1 << 2)
+
+/**
+ * @brief Break interrupt error:
+ *
+ * A break interrupt was received. This happens when the serial input is
+ * held at a logic '0' state for longer than the sum of start time + data bits
+ * + parity + stop bits.
+ */
+#define UART_ERROR_BREAK    (1 << 3)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/chip_usb_dw_wrapper.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/chip_usb_dw_wrapper.h
new file mode 100644
index 00000000000..a7c50643593
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/chip_usb_dw_wrapper.h
@@ -0,0 +1,30 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int chip_usb_dw_init(void);
+int chip_usb_dw_did_persist(void);
+void chip_usb_dw_prepare_persist(void);
+uint32_t chip_usb_get_persist_flags(void);
+void chip_usb_set_persist_flags(uint32_t flags);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/cpio.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/cpio.h
new file mode 100644
index 00000000000..886b5080fb4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/cpio.h
@@ -0,0 +1,180 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/**
+ * Archive to parse cpio data in the newc and crc formats. Generate a cpio archive like that by e.g.
+ * find . | cpio -o -H newc > archive.cpio
+ */
+
+#pragma once
+
+#include <stdio.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CPIO_MODE_FILETYPE_MASK     0xF000
+#define CPIO_MODE_FILETYPE_SOCKET   0xC000
+#define CPIO_MODE_FILETYPE_SYMLINK  0xA000
+#define CPIO_MODE_FILETYPE_REGULAR  0x8000
+#define CPIO_MODE_FILETYPE_BLOCKDEV 0x6000
+#define CPIO_MODE_FILETYPE_DIR      0x4000
+#define CPIO_MODE_FILETYPE_CHARDEV  0x2000
+#define CPIO_MODE_FILETYPE_FIFO     0x1000
+#define CPIO_MODE_SUID              0x0800
+#define CPIO_MODE_SGID              0x0400
+#define CPIO_MODE_STICKY            0x0200
+
+typedef struct {
+    size_t filesize;
+    char *name;
+    uint32_t mode;
+    uint32_t check;
+} cpio_file_t;
+
+typedef enum {
+    CPIO_RET_MORE = 0,
+    CPIO_RET_DONE,
+    CPIO_RET_ERR
+} cpio_ret_t;
+
+typedef struct cpio_handle_data_t cpio_handle_data_t;
+typedef cpio_handle_data_t *cpio_handle_t;
+
+typedef enum {
+    CPIO_RSN_FILE_ALL = 0,
+    CPIO_RSN_FILE_INITIAL,
+    CPIO_RSN_FILE_MORE,
+    CPIO_RSN_FILE_END
+} cpio_callback_reason_t;
+
+
+/**
+ * Callback for cpio file data.
+ *
+ * This callback will be called by the library to indicate data for a file is available.
+ *
+ * For files in the cpio archive that fit entirely in the internal buffer, or when no internal
+ * buffer is available, are entirely contained in the buffer fed to cpio_feed(), this callback
+ * is only called once, with reason=CPIO_RNS_FILE_ALL. fileinfo will contain the information
+ * for that specific file (name, size, ...), buff_offset will be 0, buff_len is the file
+ * size and buff contains all the information for the file.
+ *
+ * For files that do not fit in the buffer, this callback will be called multiple times.
+ * The initial time with reason=CPIO_RSN_FILE_INITIAL, when more data is available with
+ * CPIO_RSN_FILE_MORE and finally with CPIO_RSN_FILE_END. For these calls, fileinfo
+ * will again contain file information. buff will be the information contained in the
+ * file at offset buff_offset, and the length of this buffer will be in buff_len.
+ *
+ * The library guarantees to feed all file data to the callback consequitively, so
+ * within the same file, the buff_offset from a call will always be (buff_offset+buff_len)
+ * from the call before that. If cpio_start is
+ *
+ * The library also guarantees every file in the cpio archive will either generate a single
+ * callback call with CPIO_RSN_ALL, or multiple with in sequence CPIO_RSN_FILE_INITIAL, 0 or
+ * more CPIO_RSN_FILE_MORE and finally a CPIO_RSN_FILE_END.
+ *
+ * When a non-zero buffer size is passed to cpio_start, the library guarantees that all callback
+ * calls with a reason of CPIO_RSN_FILE_INITIAL and CPIO_RSN_FILE_MORE will have a buffer
+ * filled with exactly this amount of bytes.
+ *
+ */
+typedef void (*cpio_callback_t)(cpio_callback_reason_t reason, cpio_file_t *fileinfo, size_t buff_offset, size_t buff_len, char *buff, void *arg);
+
+
+/**
+ * @brief      Initialize a cpio handle.
+ *
+ * Call this to start parsing a cpio archive. You can set the callback that handles the
+ * files/data here.
+ *
+ * @param  callback The callback that will handle the data of the files inside the cpio archive
+ *
+ * @param  cbarg User-supplied argument. The callback will be called with this as an argument.
+ *
+ * @param  buflen Length of internal buffer used.
+ *                If this is zero, the callback will be called with data that lives in the data buffer
+ *                supplied to the cpio library by whomever called cpio_feed(). Because this library has
+ *                no power over that buffer, the callback can be passed as little as 1 and as many as
+ *                INT_MAX bytes at a time.
+ *                If this is non-zero, the library will allocate an internal buffer of this size. All
+ *                cpio_feed()-calls will be rebuffered, and the callback is guaranteed to only be called
+ *                with this many bytes in the buffer, given there's enough data in the file to fill it.
+ *
+ * @param memchunk Chunk of memory to allocate everything (handle, I/O buffer, filename buffer) in. Minimum size
+ *                 (estimate) is 160+buflen+sizeof(largest filename/path).
+ * @param memchunklen Size of the mem chunk
+ *
+ * @return
+ *     - Success: A pointer to a cpio handle
+ *     - Error: NULL
+ *
+ */
+cpio_handle_t cpio_start(cpio_callback_t callback, void *cbarg, size_t buflen, void *memchunk, int memchunklen);
+
+/**
+ * @brief      Feed data from a cpio archive into the library
+ *
+ * This routine is used to feed consecutive data of the cpio archive into the library. While processing,
+ * the library can call the callback function one or more times if needed.
+ *
+ * @param  cpio Handle obtained by calling cpio_start()
+ *
+ * @param  buffer Pointer to buffer containing cpio archive data
+ *
+ * @param  len Length of the buffer, in bytes
+ *
+ * @return
+ *     - CPIO_RET_MORE: CPIO archive isn't done yet, please feed more data.
+ *     - CPIO_RET_DONE: CPUI archive is finished.
+ *     - CPIO_RET_ERR: Invalid CPIO archive data; decoding aborted.
+ *
+ */
+cpio_ret_t cpio_feed(cpio_handle_t cpio, char *buffer, int len);
+
+/**
+ * @brief      Indicate there is no more cpio data to be fed into the archive
+ *
+ * This call is to be called when the source data is exhausted. Normally, the library can find the end of the
+ * cpio archive by looking for the end marker,
+ *
+ * @param  timer_conf Pointer of LEDC timer configure struct
+ *
+ *
+ * @return
+ *     - CPIO_RET_DONE on success
+ *     - CPIO_RET_ERR when cpio archive is invalid
+ *
+ */
+cpio_ret_t cpio_done(cpio_handle_t cpio);
+
+
+/**
+ * @brief      Free the memory allocated for a cpio handle.
+ *
+ * @param  cpio Handle obtained by calling cpio_start()
+ *
+ * @return
+ *     - CPIO_RET_DONE on success
+ *
+ */
+cpio_ret_t cpio_destroy(cpio_handle_t cpio);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_cdc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_cdc.h
new file mode 100644
index 00000000000..c241bcfe065
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_cdc.h
@@ -0,0 +1,174 @@
+/* usb_cdc.h - USB CDC-ACM and CDC-ECM public header */
+
+/*
+ * Copyright (c) 2017 PHYTEC Messtechnik GmbH
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+/**
+ * @file
+ * @brief USB Communications Device Class (CDC) public header
+ *
+ * Header follows the Class Definitions for
+ * Communications Devices Specification (CDC120-20101103-track.pdf),
+ * PSTN Devices Specification (PSTN120.pdf) and
+ * Ethernet Control Model Devices Specification (ECM120.pdf).
+ * Header is limited to ACM and ECM Subclasses.
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <sys/cdefs.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** CDC Specification release number in BCD format */
+#define CDC_SRN_1_20            0x0120
+
+/** Communications Class Subclass Codes */
+#define ACM_SUBCLASS            0x02
+#define ECM_SUBCLASS            0x06
+#define EEM_SUBCLASS            0x0c
+
+/** Communications Class Protocol Codes */
+#define AT_CMD_V250_PROTOCOL        0x01
+#define EEM_PROTOCOL            0x07
+
+/**
+ * @brief Data Class Interface Codes
+ * @note CDC120-20101103-track.pdf, 4.5, Table 6
+ */
+#define DATA_INTERFACE_CLASS        0x0A
+
+/**
+ * @brief Values for the bDescriptorType Field
+ * @note CDC120-20101103-track.pdf, 5.2.3, Table 12
+ */
+#define CS_INTERFACE            0x24
+#define CS_ENDPOINT         0x25
+
+/**
+ * @brief bDescriptor SubType for Communications
+ * Class Functional Descriptors
+ * @note CDC120-20101103-track.pdf, 5.2.3, Table 13
+ */
+#define HEADER_FUNC_DESC        0x00
+#define CALL_MANAGEMENT_FUNC_DESC   0x01
+#define ACM_FUNC_DESC           0x02
+#define UNION_FUNC_DESC         0x06
+#define ETHERNET_FUNC_DESC      0x0F
+
+/**
+ * @brief PSTN Subclass Specific Requests
+ * for ACM devices
+ * @note PSTN120.pdf, 6.3, Table 13
+ */
+#define CDC_SEND_ENC_CMD        0x00
+#define CDC_GET_ENC_RSP         0x01
+#define SET_LINE_CODING         0x20
+#define GET_LINE_CODING         0x21
+#define SET_CONTROL_LINE_STATE      0x22
+
+/** Control Signal Bitmap Values for SetControlLineState */
+#define SET_CONTROL_LINE_STATE_RTS  0x02
+#define SET_CONTROL_LINE_STATE_DTR  0x01
+
+/** UART State Bitmap Values */
+#define SERIAL_STATE_OVERRUN        0x40
+#define SERIAL_STATE_PARITY     0x20
+#define SERIAL_STATE_FRAMING        0x10
+#define SERIAL_STATE_RING       0x08
+#define SERIAL_STATE_BREAK      0x04
+#define SERIAL_STATE_TX_CARRIER     0x02
+#define SERIAL_STATE_RX_CARRIER     0x01
+
+/**
+ * @brief Class-Specific Request Codes for Ethernet subclass
+ * @note ECM120.pdf, 6.2, Table 6
+ */
+#define SET_ETHERNET_MULTICAST_FILTERS  0x40
+#define SET_ETHERNET_PM_FILTER      0x41
+#define GET_ETHERNET_PM_FILTER      0x42
+#define SET_ETHERNET_PACKET_FILTER  0x43
+#define GET_ETHERNET_STATISTIC      0x44
+
+/** Ethernet Packet Filter Bitmap */
+#define PACKET_TYPE_MULTICAST       0x10
+#define PACKET_TYPE_BROADCAST       0x08
+#define PACKET_TYPE_DIRECTED        0x04
+#define PACKET_TYPE_ALL_MULTICAST   0x02
+#define PACKET_TYPE_PROMISCUOUS     0x01
+
+/** Header Functional Descriptor */
+struct cdc_header_descriptor {
+    uint8_t bFunctionLength;
+    uint8_t bDescriptorType;
+    uint8_t bDescriptorSubtype;
+    uint16_t bcdCDC;
+} __packed;
+
+/** Union Interface Functional Descriptor */
+struct cdc_union_descriptor {
+    uint8_t bFunctionLength;
+    uint8_t bDescriptorType;
+    uint8_t bDescriptorSubtype;
+    uint8_t bControlInterface;
+    uint8_t bSubordinateInterface0;
+} __packed;
+
+/** Call Management Functional Descriptor */
+struct cdc_cm_descriptor {
+    uint8_t bFunctionLength;
+    uint8_t bDescriptorType;
+    uint8_t bDescriptorSubtype;
+    uint8_t bmCapabilities;
+    uint8_t bDataInterface;
+} __packed;
+
+/** Abstract Control Management Functional Descriptor */
+struct cdc_acm_descriptor {
+    uint8_t bFunctionLength;
+    uint8_t bDescriptorType;
+    uint8_t bDescriptorSubtype;
+    uint8_t bmCapabilities;
+} __packed;
+
+
+/** Data structure for GET_LINE_CODING / SET_LINE_CODING class requests */
+struct cdc_acm_line_coding {
+    uint32_t dwDTERate;
+    uint8_t bCharFormat;
+    uint8_t bParityType;
+    uint8_t bDataBits;
+} __packed;
+
+/** Data structure for the notification about SerialState */
+struct cdc_acm_notification {
+    uint8_t bmRequestType;
+    uint8_t bNotificationType;
+    uint16_t wValue;
+    uint16_t wIndex;
+    uint16_t wLength;
+    uint16_t data;
+} __packed;
+
+/** Ethernet Networking Functional Descriptor */
+struct cdc_ecm_descriptor {
+    uint8_t bFunctionLength;
+    uint8_t bDescriptorType;
+    uint8_t bDescriptorSubtype;
+    uint8_t iMACAddress;
+    uint32_t bmEthernetStatistics;
+    uint16_t wMaxSegmentSize;
+    uint16_t wNumberMCFilters;
+    uint8_t bNumberPowerFilters;
+} __packed;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_common.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_common.h
new file mode 100644
index 00000000000..796a77bc000
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_common.h
@@ -0,0 +1,249 @@
+/***************************************************************************
+ *
+ *
+ * Copyright(c) 2015,2016 Intel Corporation.
+ * Copyright(c) 2017 PHYTEC Messtechnik GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ***************************************************************************/
+
+/**
+ * @file
+ * @brief useful constants and macros for the USB application
+ *
+ * This file contains useful constants and macros for the USB applications.
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <sys/cdefs.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BCD(x) ((((x) / 10) << 4) | ((x) / 10))
+
+/* Descriptor size in bytes */
+#define USB_DEVICE_DESC_SIZE        18
+#define USB_CONFIGURATION_DESC_SIZE 9
+#define USB_INTERFACE_DESC_SIZE     9
+#define USB_ENDPOINT_DESC_SIZE      7
+#define USB_STRING_DESC_SIZE        4
+#define USB_HID_DESC_SIZE       9
+#define USB_DFU_DESC_SIZE       9
+#define USB_DEVICE_QUAL_DESC_SIZE   10
+#define USB_INTERFACE_ASSOC_DESC_SIZE   8
+
+/* Descriptor type */
+#define USB_DEVICE_DESC         0x01
+#define USB_CONFIGURATION_DESC      0x02
+#define USB_STRING_DESC         0x03
+#define USB_INTERFACE_DESC      0x04
+#define USB_ENDPOINT_DESC       0x05
+#define USB_DEVICE_QUAL_DESC        0x06
+#define USB_INTERFACE_ASSOC_DESC    0x0B
+#define USB_DEVICE_CAPABILITY_DESC  0x10
+#define USB_HID_DESC            0x21
+#define USB_HID_REPORT_DESC     0x22
+#define USB_DFU_FUNCTIONAL_DESC     0x21
+#define USB_ASSOCIATION_DESC        0x0B
+#define USB_BINARY_OBJECT_STORE_DESC    0x0F
+
+/* Useful define */
+#define USB_1_1             0x0110
+#define USB_2_0             0x0200
+/* Set USB version to 2.1 so that the host will request the BOS descriptor */
+#define USB_2_1             0x0210
+
+#define BCDDEVICE_RELNUM        (BCD(KERNEL_VERSION_MAJOR) << 8 | \
+                    BCD(KERNEL_VERSION_MINOR))
+
+/* 100mA max power, per 2mA units */
+/* USB 1.1 spec indicates 100mA(max) per unit load, up to 5 loads */
+#define MAX_LOW_POWER           0x32
+#define MAX_HIGH_POWER          0xFA
+
+/* bmAttributes:
+ * D7:Reserved, always 1,
+ * D6:Self-Powered -> 1,
+ * D5:Remote Wakeup -> 0,
+ * D4...0:Reserved -> 0
+ */
+#define USB_CONFIGURATION_ATTRIBUTES    0xC0
+
+/* Classes */
+#define COMMUNICATION_DEVICE_CLASS  0x02
+#define COMMUNICATION_DEVICE_CLASS_DATA 0x0A
+#define HID_CLASS           0x03
+#define MASS_STORAGE_CLASS      0x08
+#define WIRELESS_DEVICE_CLASS       0xE0
+#define MISC_CLASS          0xEF
+#define CUSTOM_CLASS            0xFF
+#define DFU_DEVICE_CLASS        0xFE
+
+/* Sub-classes */
+#define CDC_NCM_SUBCLASS        0x0d
+#define BOOT_INTERFACE_SUBCLASS     0x01
+#define SCSI_TRANSPARENT_SUBCLASS   0x06
+#define DFU_INTERFACE_SUBCLASS      0x01
+#define RF_SUBCLASS         0x01
+#define CUSTOM_SUBCLASS         0xFF
+#define COMMON_SUBCLASS         0x02
+/* Misc subclasses */
+#define MISC_RNDIS_SUBCLASS     0x04
+#define CDC_ABSTRACT_CONTROL_MODEL 0x02
+
+/* Protocols */
+#define V25TER_PROTOCOL         0x01
+#define MOUSE_PROTOCOL          0x02
+#define BULK_ONLY_PROTOCOL      0x50
+#define DFU_RUNTIME_PROTOCOL        0x01
+#define DFU_MODE_PROTOCOL       0x02
+#define BLUETOOTH_PROTOCOL      0x01
+/* CDC ACM protocols */
+#define ACM_VENDOR_PROTOCOL     0xFF
+/* Misc protocols */
+#define MISC_ETHERNET_PROTOCOL      0x01
+#define IAD_PROTOCOL            0x01
+
+/** Standard Device Descriptor */
+struct usb_device_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint16_t bcdUSB;
+    uint8_t bDeviceClass;
+    uint8_t bDeviceSubClass;
+    uint8_t bDeviceProtocol;
+    uint8_t bMaxPacketSize0;
+    uint16_t idVendor;
+    uint16_t idProduct;
+    uint16_t bcdDevice;
+    uint8_t iManufacturer;
+    uint8_t iProduct;
+    uint8_t iSerialNumber;
+    uint8_t bNumConfigurations;
+} __packed;
+
+/** Unicode (UTF16LE) String Descriptor */
+struct usb_string_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint16_t bString;
+} __packed;
+
+/** Association Descriptor */
+struct usb_association_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint8_t bFirstInterface;
+    uint8_t bInterfaceCount;
+    uint8_t bFunctionClass;
+    uint8_t bFunctionSubClass;
+    uint8_t bFunctionProtocol;
+    uint8_t iFunction;
+} __packed;
+
+/** Standard Configuration Descriptor */
+struct usb_cfg_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint16_t wTotalLength;
+    uint8_t bNumInterfaces;
+    uint8_t bConfigurationValue;
+    uint8_t iConfiguration;
+    uint8_t bmAttributes;
+    uint8_t bMaxPower;
+} __packed;
+
+/** Standard Interface Descriptor */
+struct usb_if_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint8_t bInterfaceNumber;
+    uint8_t bAlternateSetting;
+    uint8_t bNumEndpoints;
+    uint8_t bInterfaceClass;
+    uint8_t bInterfaceSubClass;
+    uint8_t bInterfaceProtocol;
+    uint8_t iInterface;
+} __packed;
+
+/** Standard Endpoint Descriptor */
+struct usb_ep_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint8_t bEndpointAddress;
+    uint8_t bmAttributes;
+    uint16_t wMaxPacketSize;
+    uint8_t bInterval;
+} __packed;
+
+struct string_descriptor_zero {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint16_t wBcdLang[];
+} __packed;
+
+struct string_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint16_t bString[];
+} __packed;
+
+#define ROM_MAX_CFG_DESC_CNT 1
+
+struct rom_usb_descriptors {
+    const struct usb_device_descriptor *device_descr;
+    const void *config_descr[ROM_MAX_CFG_DESC_CNT];
+    int string_count; // including string_descriptor_zero
+    const struct string_descriptor_zero *string0_descr;
+    const struct string_descriptor *string_descrs[];
+};
+
+/* Descriptors defined in the ROM */
+extern struct usb_device_descriptor general_device_descr;
+extern const void* acm_config_descr;
+extern const void* dfu_config_descr;
+extern const struct string_descriptor str_manu_descr;
+extern const struct string_descriptor str_prod_descr;
+extern const struct string_descriptor_zero string0_descr;
+extern const struct rom_usb_descriptors acm_usb_descriptors;
+extern const struct rom_usb_descriptors dfu_usb_descriptors;
+extern const struct rom_usb_descriptors *rom_usb_curr_desc;
+
+/* ROM patch: set the ACM descriptor with the correct serial number.
+ * Only needed on ESP32-S2, on later chips the ROM descriptor is correct.
+ */
+void rom_usb_cdc_set_descriptor_patch(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_dc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_dc.h
new file mode 100644
index 00000000000..f20e897c71a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_dc.h
@@ -0,0 +1,392 @@
+/* usb_dc.h - USB device controller driver interface */
+
+/*
+ * Copyright (c) 2016 Intel Corporation.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief USB device controller APIs
+ *
+ * This file contains the USB device controller APIs. All device controller
+ * drivers should implement the APIs described in this file.
+ */
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * USB endpoint direction and number.
+ */
+
+#define USB_EP_DIR_MASK 0x80
+#define USB_EP_DIR_IN   0x80
+#define USB_EP_DIR_OUT  0x00
+
+/**
+ * USB Driver Status Codes
+ */
+enum usb_dc_status_code {
+    USB_DC_ERROR,        /* USB error reported by the controller */
+    USB_DC_RESET,        /* USB reset */
+    /* USB connection established, hardware enumeration is completed */
+    USB_DC_CONNECTED,
+    USB_DC_CONFIGURED,   /* USB configuration done */
+    USB_DC_DISCONNECTED, /* USB connection lost */
+    USB_DC_SUSPEND,      /* USB connection suspended by the HOST */
+    USB_DC_RESUME,       /* USB connection resumed by the HOST */
+    USB_DC_INTERFACE,    /* USB interface selected */
+    USB_DC_SET_HALT,     /* Set Feature ENDPOINT_HALT received */
+    USB_DC_CLEAR_HALT,   /* Clear Feature ENDPOINT_HALT received */
+    USB_DC_UNKNOWN       /* Initial USB connection status */
+};
+
+/**
+ * USB Endpoint Callback Status Codes
+ */
+enum usb_dc_ep_cb_status_code {
+    USB_DC_EP_SETUP,    /* SETUP received */
+    /* Out transaction on this EP, data is available for read */
+    USB_DC_EP_DATA_OUT,
+    USB_DC_EP_DATA_IN,  /* In transaction done on this EP */
+};
+
+/**
+ * USB Endpoint type
+ */
+enum usb_dc_ep_type {
+    USB_DC_EP_CONTROL = 0,  /* Control type endpoint */
+    USB_DC_EP_ISOCHRONOUS,  /* Isochronous type endpoint */
+    USB_DC_EP_BULK,         /* Bulk type endpoint */
+    USB_DC_EP_INTERRUPT     /* Interrupt type endpoint  */
+};
+
+/**
+ * USB Endpoint Configuration.
+ */
+struct usb_dc_ep_cfg_data {
+    /** The number associated with the EP in the device
+     *  configuration structure
+     *       IN  EP = 0x80 | \<endpoint number\>
+     *       OUT EP = 0x00 | \<endpoint number\>
+     */
+    uint8_t ep_addr;
+    uint16_t ep_mps;             /** Endpoint max packet size */
+    enum usb_dc_ep_type ep_type; /** Endpoint type */
+};
+
+/**
+ * Callback function signature for the USB Endpoint status
+ */
+typedef void (*usb_dc_ep_callback)(uint8_t ep,
+                                   enum usb_dc_ep_cb_status_code cb_status);
+
+/**
+ * Callback function signature for the device
+ */
+typedef void (*usb_dc_status_callback)(enum usb_dc_status_code cb_status,
+                                       uint8_t *param);
+
+/**
+ * @brief attach USB for device connection
+ *
+ * Function to attach USB for device connection. Upon success, the USB PLL
+ * is enabled, and the USB device is now capable of transmitting and receiving
+ * on the USB bus and of generating interrupts.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_attach(void);
+
+/**
+ * @brief detach the USB device
+ *
+ * Function to detach the USB device. Upon success, the USB hardware PLL
+ * is powered down and USB communication is disabled.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_detach(void);
+
+/**
+ * @brief reset the USB device
+ *
+ * This function returns the USB device and firmware back to it's initial state.
+ * N.B. the USB PLL is handled by the usb_detach function
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_reset(void);
+
+/**
+ * @brief set USB device address
+ *
+ * @param[in] addr device address
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_set_address(const uint8_t addr);
+
+/**
+ * @brief set USB device controller status callback
+ *
+ * Function to set USB device controller status callback. The registered
+ * callback is used to report changes in the status of the device controller.
+ *
+ * @param[in] cb callback function
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_set_status_callback(const usb_dc_status_callback cb);
+
+/**
+ * @brief check endpoint capabilities
+ *
+ * Function to check capabilities of an endpoint. usb_dc_ep_cfg_data structure
+ * provides the endpoint configuration parameters: endpoint address,
+ * endpoint maximum packet size and endpoint type.
+ * The driver should check endpoint capabilities and return 0 if the
+ * endpoint configuration is possible.
+ *
+ * @param[in] cfg Endpoint config
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_check_cap(const struct usb_dc_ep_cfg_data *const cfg);
+
+/**
+ * @brief configure endpoint
+ *
+ * Function to configure an endpoint. usb_dc_ep_cfg_data structure provides
+ * the endpoint configuration parameters: endpoint address, endpoint maximum
+ * packet size and endpoint type.
+ *
+ * @param[in] cfg Endpoint config
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_configure(const struct usb_dc_ep_cfg_data *const cfg);
+
+/**
+ * @brief set stall condition for the selected endpoint
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_set_stall(const uint8_t ep);
+
+/**
+ * @brief clear stall condition for the selected endpoint
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_clear_stall(const uint8_t ep);
+
+/**
+ * @brief check if selected endpoint is stalled
+ *
+ * @param[in]  ep       Endpoint address corresponding to the one
+ *                      listed in the device configuration table
+ * @param[out] stalled  Endpoint stall status
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_is_stalled(const uint8_t ep, uint8_t *const stalled);
+
+/**
+ * @brief halt the selected endpoint
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_halt(const uint8_t ep);
+
+/**
+ * @brief enable the selected endpoint
+ *
+ * Function to enable the selected endpoint. Upon success interrupts are
+ * enabled for the corresponding endpoint and the endpoint is ready for
+ * transmitting/receiving data.
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_enable(const uint8_t ep);
+
+/**
+ * @brief disable the selected endpoint
+ *
+ * Function to disable the selected endpoint. Upon success interrupts are
+ * disabled for the corresponding endpoint and the endpoint is no longer able
+ * for transmitting/receiving data.
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_disable(const uint8_t ep);
+
+/**
+ * @brief flush the selected endpoint
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_flush(const uint8_t ep);
+
+/**
+ * @brief write data to the specified endpoint
+ *
+ * This function is called to write data to the specified endpoint. The supplied
+ * usb_ep_callback function will be called when data is transmitted out.
+ *
+ * @param[in]  ep        Endpoint address corresponding to the one
+ *                       listed in the device configuration table
+ * @param[in]  data      pointer to data to write
+ * @param[in]  data_len  length of data requested to write. This may
+ *                       be zero for a zero length status packet.
+ * @param[out] ret_bytes bytes scheduled for transmission. This value
+ *                       may be NULL if the application expects all
+ *                       bytes to be written
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_write(const uint8_t ep, const uint8_t *const data,
+                    const uint32_t data_len, uint32_t *const ret_bytes);
+
+
+
+/**
+ * @brief Indicate if the write to an IN endpoint (using usb_dc_ep_write) would block
+ * to wait until the endpoint has enoug space
+ *
+ * @param[in]  ep        Endpoint address corresponding to the one
+ *                       listed in the device configuration table
+ *
+ * @return 0 when writable, 0 when not, negative errno code on fail.
+ */
+int usb_dc_ep_write_would_block(const uint8_t ep);
+
+
+/**
+ * @brief read data from the specified endpoint
+ *
+ * This function is called by the Endpoint handler function, after an OUT
+ * interrupt has been received for that EP. The application must only call this
+ * function through the supplied usb_ep_callback function. This function clears
+ * the ENDPOINT NAK, if all data in the endpoint FIFO has been read,
+ * so as to accept more data from host.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         pointer to data buffer to write to
+ * @param[in]  max_data_len max length of data to read
+ * @param[out] read_bytes   Number of bytes read. If data is NULL and
+ *                          max_data_len is 0 the number of bytes
+ *                          available for read should be returned.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_read(const uint8_t ep, uint8_t *const data,
+                   const uint32_t max_data_len, uint32_t *const read_bytes);
+
+/**
+ * @brief set callback function for the specified endpoint
+ *
+ * Function to set callback function for notification of data received and
+ * available to application or transmit done on the selected endpoint,
+ * NULL if callback not required by application code.
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ * @param[in] cb callback function
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_set_callback(const uint8_t ep, const usb_dc_ep_callback cb);
+
+/**
+ * @brief read data from the specified endpoint
+ *
+ * This is similar to usb_dc_ep_read, the difference being that, it doesn't
+ * clear the endpoint NAKs so that the consumer is not bogged down by further
+ * upcalls till he is done with the processing of the data. The caller should
+ * reactivate ep by invoking usb_dc_ep_read_continue() do so.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         pointer to data buffer to write to
+ * @param[in]  max_data_len max length of data to read
+ * @param[out] read_bytes   Number of bytes read. If data is NULL and
+ *                          max_data_len is 0 the number of bytes
+ *                          available for read should be returned.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
+                        uint32_t *read_bytes);
+
+
+/**
+ * @brief Continue reading data from the endpoint
+ *
+ * Clear the endpoint NAK and enable the endpoint to accept more data
+ * from the host. Usually called after usb_dc_ep_read_wait() when the consumer
+ * is fine to accept more data. Thus these calls together acts as flow control
+ * mechanism.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_read_continue(uint8_t ep);
+
+/**
+ * @brief Get endpoint max packet size
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ *
+ * @return enpoint max packet size (mps)
+ */
+int usb_dc_ep_mps(uint8_t ep);
+
+
+
+//Hack - fake interrupts by pollinfg
+void usb_dc_check_poll_for_interrupts(void);
+
+
+//Prepare for USB persist. You should reboot after this.
+int usb_dc_prepare_persist(void);
+
+
+void usb_dw_isr_handler(void);
+
+
+int usb_dc_ep_write_would_block(const uint8_t ep);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_descriptor.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_descriptor.h
new file mode 100644
index 00000000000..1b20ef80f0c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_descriptor.h
@@ -0,0 +1,34 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define USB_DESCRIPTOR_TYPE_ACM 0
+#define USB_DESCRIPTOR_TYPE_DFU 1
+
+void usb_set_current_descriptor(int descriptor_type);
+
+bool usb_get_descriptor(uint16_t type_index, uint16_t lang_id,
+                        int32_t *len, uint8_t **data);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_device.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_device.h
new file mode 100644
index 00000000000..5564d41e92f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_device.h
@@ -0,0 +1,401 @@
+/*
+ *  LPCUSB, an USB device driver for LPC microcontrollers
+ *  Copyright (C) 2006 Bertrik Sikken (bertrik@sikken.nl)
+ *  Copyright (c) 2016 Intel Corporation
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ *  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ *  OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief USB device core layer APIs and structures
+ *
+ * This file contains the USB device core layer APIs and structures.
+ */
+
+#pragma once
+
+#include <stddef.h>
+#include <sys/cdefs.h>
+#include "usb_dc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*************************************************************************
+ *  USB configuration
+ **************************************************************************/
+
+#define MAX_PACKET_SIZE0    64        /**< maximum packet size for EP 0 */
+//Note: for FS this should be 8, 16, 32, 64 bytes. HS can go up to 512.
+
+/*************************************************************************
+ *  USB application interface
+ **************************************************************************/
+
+/** setup packet definitions */
+struct usb_setup_packet {
+    uint8_t bmRequestType;  /**< characteristics of the specific request */
+    uint8_t bRequest;       /**< specific request */
+    uint16_t wValue;        /**< request specific parameter */
+    uint16_t wIndex;        /**< request specific parameter */
+    uint16_t wLength;       /**< length of data transferred in data phase */
+} __packed;
+
+
+_Static_assert(sizeof(struct usb_setup_packet) == 8, "USB setup packet struct size error");
+
+/**
+ * Callback function signature for the device
+ */
+typedef void (*usb_status_callback)(enum usb_dc_status_code status_code,
+                                    uint8_t *param);
+
+/**
+ * Callback function signature for the USB Endpoint status
+ */
+typedef void (*usb_ep_callback)(uint8_t ep,
+                                enum usb_dc_ep_cb_status_code cb_status);
+
+/**
+ * Function which handles Class specific requests corresponding to an
+ * interface number specified in the device descriptor table
+ */
+typedef int (*usb_request_handler) (struct usb_setup_packet *detup,
+                                    int32_t *transfer_len, uint8_t **payload_data);
+
+/**
+ * Function for interface runtime configuration
+ */
+typedef void (*usb_interface_config)(uint8_t bInterfaceNumber);
+
+/*
+ * USB Endpoint Configuration
+ */
+struct usb_ep_cfg_data {
+    /**
+     * Callback function for notification of data received and
+     * available to application or transmit done, NULL if callback
+     * not required by application code
+     */
+    usb_ep_callback ep_cb;
+    /**
+     * The number associated with the EP in the device configuration
+     * structure
+     *   IN  EP = 0x80 | \<endpoint number\>
+     *   OUT EP = 0x00 | \<endpoint number\>
+     */
+    uint8_t ep_addr;
+};
+
+/**
+ * USB Interface Configuration
+ */
+struct usb_interface_cfg_data {
+    /** Handler for USB Class specific Control (EP 0) communications */
+    usb_request_handler class_handler;
+    /** Handler for USB Vendor specific commands */
+    usb_request_handler vendor_handler;
+    /**
+     * The custom request handler gets a first chance at handling
+     * the request before it is handed over to the 'chapter 9' request
+     * handler
+     */
+    usb_request_handler custom_handler;
+    /**
+     * This data area, allocated by the application, is used to store
+     * Class specific command data and must be large enough to store the
+     * largest payload associated with the largest supported Class'
+     * command set. This data area may be used for USB IN or OUT
+     * communications
+     */
+    uint8_t *payload_data;
+    /**
+     * This data area, allocated by the application, is used to store
+     * Vendor specific payload
+     */
+    uint8_t *vendor_data;
+};
+
+/*
+ * @brief USB device configuration
+ *
+ * The Application instantiates this with given parameters added
+ * using the "usb_set_config" function. Once this function is called
+ * changes to this structure will result in undefined behaviour. This structure
+ * may only be updated after calls to usb_deconfig
+ */
+struct usb_cfg_data {
+    /**
+     * USB device description, see
+     * http://www.beyondlogic.org/usbnutshell/usb5.shtml#DeviceDescriptors
+     */
+    const uint8_t *usb_device_description;
+    /** Pointer to interface descriptor */
+    const void *interface_descriptor;
+    /** Function for interface runtime configuration */
+    usb_interface_config interface_config;
+    /** Callback to be notified on USB connection status change */
+    usb_status_callback cb_usb_status;
+    /** USB interface (Class) handler and storage space */
+    struct usb_interface_cfg_data interface;
+    /** Number of individual endpoints in the device configuration */
+    uint8_t num_endpoints;
+    /**
+     * Pointer to an array of endpoint structs of length equal to the
+     * number of EP associated with the device description,
+     * not including control endpoints
+     */
+    struct usb_ep_cfg_data *endpoint;
+};
+
+/*
+ * @brief configure USB controller
+ *
+ * Function to configure USB controller.
+ * Configuration parameters must be valid or an error is returned
+ *
+ * @param[in] config Pointer to configuration structure
+ *
+ * @return 0 on success, negative errno code on fail
+ */
+int usb_set_config(struct usb_cfg_data *config);
+
+/*
+ * @brief return the USB device to it's initial state
+ *
+ * @return 0 on success, negative errno code on fail
+ */
+int usb_deconfig(void);
+
+/*
+ * @brief enable USB for host/device connection
+ *
+ * Function to enable USB for host/device connection.
+ * Upon success, the USB module is no longer clock gated in hardware,
+ * it is now capable of transmitting and receiving on the USB bus and
+ * of generating interrupts.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_enable(struct usb_cfg_data *config);
+
+/*
+ * @brief disable the USB device.
+ *
+ * Function to disable the USB device.
+ * Upon success, the specified USB interface is clock gated in hardware,
+ * it is no longer capable of generating interrupts.
+ *
+ * @return 0 on success, negative errno code on fail
+ */
+int usb_disable(void);
+
+/*
+ * @brief Check if a write to an in ep would block until there is enough space
+ * in the fifo
+ *
+ * @param[in]  ep        Endpoint address corresponding to the one listed in the
+ *                       device configuration table
+ *
+ * @return 0 if free to write, 1 if a write would block, negative errno code on fail
+ */
+int usb_write_would_block(uint8_t ep);
+
+/*
+ * @brief write data to the specified endpoint
+ *
+ * Function to write data to the specified endpoint. The supplied
+ * usb_ep_callback will be called when transmission is done.
+ *
+ * @param[in]  ep        Endpoint address corresponding to the one listed in the
+ *                       device configuration table
+ * @param[in]  data      Pointer to data to write
+ * @param[in]  data_len  Length of data requested to write. This may be zero for
+ *                       a zero length status packet.
+ * @param[out] bytes_ret Bytes written to the EP FIFO. This value may be NULL if
+ *                       the application expects all bytes to be written
+ *
+ * @return 0 on success, negative errno code on fail
+ */
+int usb_write(uint8_t ep, const uint8_t *data, uint32_t data_len,
+              uint32_t *bytes_ret);
+
+/*
+ * @brief read data from the specified endpoint
+ *
+ * This function is called by the Endpoint handler function, after an
+ * OUT interrupt has been received for that EP. The application must
+ * only call this function through the supplied usb_ep_callback function.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one listed in
+ *                          the device configuration table
+ * @param[in]  data         Pointer to data buffer to write to
+ * @param[in]  max_data_len Max length of data to read
+ * @param[out] ret_bytes    Number of bytes read. If data is NULL and
+ *                          max_data_len is 0 the number of bytes available
+ *                          for read is returned.
+ *
+ * @return  0 on success, negative errno code on fail
+ */
+int usb_read(uint8_t ep, uint8_t *data, uint32_t max_data_len,
+             uint32_t *ret_bytes);
+
+/*
+ * @brief set STALL condition on the specified endpoint
+ *
+ * This function is called by USB device class handler code to set stall
+ * conditionin on endpoint.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one listed in
+ *                          the device configuration table
+ *
+ * @return  0 on success, negative errno code on fail
+ */
+int usb_ep_set_stall(uint8_t ep);
+
+
+/*
+ * @brief clears STALL condition on the specified endpoint
+ *
+ * This function is called by USB device class handler code to clear stall
+ * conditionin on endpoint.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one listed in
+ *                          the device configuration table
+ *
+ * @return  0 on success, negative errno code on fail
+ */
+int usb_ep_clear_stall(uint8_t ep);
+
+/**
+ * @brief read data from the specified endpoint
+ *
+ * This is similar to usb_ep_read, the difference being that, it doesn't
+ * clear the endpoint NAKs so that the consumer is not bogged down by further
+ * upcalls till he is done with the processing of the data. The caller should
+ * reactivate ep by invoking usb_ep_read_continue() do so.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         pointer to data buffer to write to
+ * @param[in]  max_data_len max length of data to read
+ * @param[out] read_bytes   Number of bytes read. If data is NULL and
+ *                          max_data_len is 0 the number of bytes
+ *                          available for read should be returned.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
+                     uint32_t *read_bytes);
+
+
+/**
+ * @brief Continue reading data from the endpoint
+ *
+ * Clear the endpoint NAK and enable the endpoint to accept more data
+ * from the host. Usually called after usb_ep_read_wait() when the consumer
+ * is fine to accept more data. Thus these calls together acts as flow control
+ * mechanism.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_ep_read_continue(uint8_t ep);
+
+/**
+ * Callback function signature for transfer completion.
+ */
+typedef void (*usb_transfer_callback)(uint8_t ep, int tsize, void *priv);
+
+/* USB transfer flags */
+#define USB_TRANS_READ       BIT(0)   /** Read transfer flag */
+#define USB_TRANS_WRITE      BIT(1)   /** Write transfer flag */
+#define USB_TRANS_NO_ZLP     BIT(2)   /** No zero-length packet flag */
+
+/**
+ * @brief Transfer management endpoint callback
+ *
+ * If a USB class driver wants to use high-level transfer functions, driver
+ * needs to register this callback as usb endpoint callback.
+ */
+void usb_transfer_ep_callback(uint8_t ep, enum usb_dc_ep_cb_status_code);
+
+/**
+ * @brief Start a transfer
+ *
+ * Start a usb transfer to/from the data buffer. This function is asynchronous
+ * and can be executed in IRQ context. The provided callback will be called
+ * on transfer completion (or error) in thread context.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         Pointer to data buffer to write-to/read-from
+ * @param[in]  dlen         Size of data buffer
+ * @param[in]  flags        Transfer flags (USB_TRANS_READ, USB_TRANS_WRITE...)
+ * @param[in]  cb           Function called on transfer completion/failure
+ * @param[in]  priv         Data passed back to the transfer completion callback
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_transfer(uint8_t ep, uint8_t *data, size_t dlen, unsigned int flags,
+                 usb_transfer_callback cb, void *priv);
+
+/**
+ * @brief Start a transfer and block-wait for completion
+ *
+ * Synchronous version of usb_transfer, wait for transfer completion before
+ * returning.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         Pointer to data buffer to write-to/read-from
+ * @param[in]  dlen         Size of data buffer
+ * @param[in]  flags        Transfer flags
+
+ *
+ * @return number of bytes transferred on success, negative errno code on fail.
+ */
+int usb_transfer_sync(uint8_t ep, uint8_t *data, size_t dlen, unsigned int flags);
+
+/**
+ * @brief Cancel any ongoing transfer on the specified endpoint
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+void usb_cancel_transfer(uint8_t ep);
+
+
+void usb_dev_resume(int configuration);
+int usb_dev_get_configuration(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_dfu.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_dfu.h
new file mode 100644
index 00000000000..dec7ea93a39
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_dfu.h
@@ -0,0 +1,147 @@
+/***************************************************************************
+ *
+ * Copyright(c) 2015,2016 Intel Corporation.
+ * Copyright(c) 2017 PHYTEC Messtechnik GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ***************************************************************************/
+
+/**
+ * @file
+ * @brief USB Device Firmware Upgrade (DFU) public header
+ *
+ * Header follows the Device Class Specification for
+ * Device Firmware Upgrade Version 1.1
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stddef.h>
+#include "usb_device.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** DFU Class Subclass */
+#define DFU_SUBCLASS            0x01
+
+/** DFU Class runtime Protocol */
+#define DFU_RT_PROTOCOL         0x01
+
+/** DFU Class DFU mode Protocol */
+#define DFU_MODE_PROTOCOL       0x02
+
+/**
+ * @brief DFU Class Specific Requests
+ */
+#define DFU_DETACH          0x00
+#define DFU_DNLOAD          0x01
+#define DFU_UPLOAD          0x02
+#define DFU_GETSTATUS           0x03
+#define DFU_CLRSTATUS           0x04
+#define DFU_GETSTATE            0x05
+#define DFU_ABORT           0x06
+
+/** DFU FUNCTIONAL descriptor type */
+#define DFU_FUNC_DESC           0x21
+
+/** DFU attributes DFU Functional Descriptor */
+#define DFU_ATTR_WILL_DETACH        0x08
+#define DFU_ATTR_MANIFESTATION_TOLERANT 0x04
+#define DFU_ATTR_CAN_UPLOAD     0x02
+#define DFU_ATTR_CAN_DNLOAD     0x01
+
+/** DFU Specification release */
+#define DFU_VERSION         0x0110
+
+/** Run-Time Functional Descriptor */
+struct dfu_runtime_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint8_t bmAttributes;
+    uint16_t wDetachTimeOut;
+    uint16_t wTransferSize;
+    uint16_t bcdDFUVersion;
+} __packed;
+
+/** bStatus values for the DFU_GETSTATUS response */
+enum dfu_status {
+    statusOK,
+    errTARGET,
+    errFILE,
+    errWRITE,
+    errERASE,
+    errCHECK_ERASED,
+    errPROG,
+    errVERIFY,
+    errADDRESS,
+    errNOTDONE,
+    errFIRMWARE,
+    errVENDOR,
+    errUSB,
+    errPOR,
+    errUNKNOWN,
+    errSTALLEDPKT
+};
+
+/** bState values for the DFU_GETSTATUS response */
+enum dfu_state {
+    appIDLE,
+    appDETACH,
+    dfuIDLE,
+    dfuDNLOAD_SYNC,
+    dfuDNBUSY,
+    dfuDNLOAD_IDLE,
+    dfuMANIFEST_SYNC,
+    dfuMANIFEST,
+    dfuMANIFEST_WAIT_RST,
+    dfuUPLOAD_IDLE,
+    dfuERROR,
+};
+
+/*
+ These callbacks are made public so the ACM driver can call them to handle the switch to DFU.
+*/
+
+int dfu_class_handle_req(struct usb_setup_packet *pSetup,
+                         int32_t *data_len, uint8_t **data);
+void dfu_status_cb(enum usb_dc_status_code status, uint8_t *param);
+int usb_dfu_init(void);
+int dfu_custom_handle_req(struct usb_setup_packet *pSetup,
+                          int32_t *data_len, uint8_t **data);
+
+
+typedef void(*usb_dfu_detach_routine_t)(int delay);
+void usb_dfu_set_detach_cb(usb_dfu_detach_routine_t cb);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_os_glue.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_os_glue.h
new file mode 100644
index 00000000000..74d9b2a778e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_os_glue.h
@@ -0,0 +1,40 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+typedef void(*usb_osglue_intdisena_routine_t)(void);
+typedef int(*usb_osglue_wait_routine_t)(int delay_us);
+
+typedef struct {
+    /* Disable USB interrupt */
+    usb_osglue_intdisena_routine_t int_dis_proc;
+    /* Enable USB interrupt */
+    usb_osglue_intdisena_routine_t int_ena_proc;
+    /* Wait for a set amount of uS. Return the amount actually waited. If delay_us is 0, just yield.*/
+    usb_osglue_wait_routine_t wait_proc;
+} usb_osglue_data_t;
+
+extern usb_osglue_data_t rom_usb_osglue;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_persist.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_persist.h
new file mode 100644
index 00000000000..bcf11b7c48c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s2/rom/usb/usb_persist.h
@@ -0,0 +1,50 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// USB persistence flags.
+
+//This bit indicates persistence has been enabled, that is, the USB initialization routines should not
+//reset the USB device as the device still is initialized and the host detected it with the same cdcacm/dfu
+//descriptor as the ROM uses; we can just re-initialize the software side and have at 'er.
+#define USBDC_PERSIST_ENA (1<<31)
+
+//This bit indicates to the ROM that we rebooted because of a request to go into DFU mode; the ROM should
+//honour this request.
+#define USBDC_BOOT_DFU (1<<30)
+
+
+//This being non-0 indicates a memory location where a 'testament' is stored, aka a piece of text that should be output
+//after a reboot. Can contain core dump info or something.
+#define USBDC_TESTAMENT_LOC_MASK 0x7FFFF //bits 19-0; this is added to a base address of 0x3FF80000.
+
+//The testament is a FIFO. The ROM will output all data between textstart and textend; if textend is lower than textstart it will
+//output everything from textstart to memend, then memstart to textend.
+typedef struct {
+    char *memstart; //start of memory region
+    char *memend;   //end of memory region
+    char *textstart; //start of text to output
+    char *textend;
+} usbdc_testament_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/aes.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/aes.h
new file mode 100644
index 00000000000..1df00a1d6d8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/aes.h
@@ -0,0 +1,53 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum AES_TYPE {
+    AES_ENC,
+    AES_DEC,
+};
+
+enum AES_BITS {
+    AES128,
+    AES192,
+    AES256
+};
+
+void ets_aes_enable(void);
+
+void ets_aes_disable(void);
+
+void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap,
+                        bool in_word_swap, bool in_byte_swap,
+                        bool out_word_swap, bool out_byte_swap);
+
+int ets_aes_setkey(enum AES_TYPE type, const void *key, enum AES_BITS bits);
+
+int ets_aes_setkey_enc(const void *key, enum AES_BITS bits);
+
+int ets_aes_setkey_dec(const void *key, enum AES_BITS bits);
+
+void ets_aes_block(const void *input, void *output);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/apb_backup_dma.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/apb_backup_dma.h
new file mode 100644
index 00000000000..324135cb836
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/apb_backup_dma.h
@@ -0,0 +1,17 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void ets_apb_backup_init_lock_func(void(* _apb_backup_lock)(void), void(* _apb_backup_unlock)(void));
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/bigint.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/bigint.h
new file mode 100644
index 00000000000..2ab022d87d2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/bigint.h
@@ -0,0 +1,40 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void ets_bigint_enable(void);
+
+void ets_bigint_disable(void);
+
+int ets_bigint_multiply(const uint32_t *x, const uint32_t *y, uint32_t len_words);
+
+int ets_bigint_modmult(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, uint32_t len_words);
+
+int ets_bigint_modexp(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, bool constant_time, uint32_t len_words);
+
+void ets_bigint_wait_finish(void);
+
+int ets_bigint_getz(uint32_t *z, uint32_t len_words);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/cache.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/cache.h
new file mode 100644
index 00000000000..27780446fe0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/cache.h
@@ -0,0 +1,1178 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef BIT
+#define BIT(nr)  (1 << (nr))
+#endif
+
+/** \defgroup cache_apis, cache operation related apis
+  * @brief cache apis
+  */
+
+/** @addtogroup cache_apis
+  * @{
+  */
+#define MIN_ICACHE_SIZE                 16384
+#define MAX_ICACHE_SIZE                 32768
+#define MIN_DCACHE_SIZE                 32768
+#define MAX_DCACHE_SIZE                 65536
+#define MIN_ICACHE_WAYS                 4
+#define MAX_ICACHE_WAYS                 8
+#define MIN_DCACHE_WAYS                 4
+#define MAX_DCACHE_WAYS                 4
+#define MAX_CACHE_WAYS                  8
+#define MIN_CACHE_LINE_SIZE             16
+#define TAG_SIZE                        4
+#define MIN_ICACHE_BANK_NUM             1
+#define MAX_ICACHE_BANK_NUM             2
+#define MIN_DCACHE_BANK_NUM             1
+#define MAX_DCACHE_BANK_NUM             2
+#define CACHE_MEMORY_BANK_NUM           4
+#define CACHE_MEMORY_IBANK_SIZE         0x4000
+#define CACHE_MEMORY_DBANK_SIZE         0x8000
+
+#define MAX_ITAG_BANK_ITEMS             (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MIN_CACHE_LINE_SIZE)
+#define MAX_ITAG_BLOCK_ITEMS            (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MAX_ICACHE_WAYS / MIN_CACHE_LINE_SIZE)
+#define MAX_ITAG_BANK_SIZE              (MAX_ITAG_BANK_ITEMS * TAG_SIZE)
+#define MAX_ITAG_BLOCK_SIZE             (MAX_ITAG_BLOCK_ITEMS * TAG_SIZE)
+#define MAX_DTAG_BANK_ITEMS             (MAX_DCACHE_SIZE / MAX_DCACHE_BANK_NUM /  MIN_CACHE_LINE_SIZE)
+#define MAX_DTAG_BLOCK_ITEMS            (MAX_DCACHE_SIZE / MAX_DCACHE_BANK_NUM / MAX_DCACHE_WAYS / MIN_CACHE_LINE_SIZE)
+#define MAX_DTAG_BANK_SIZE              (MAX_DTAG_BANK_ITEMS * TAG_SIZE)
+#define MAX_DTAG_BLOCK_SIZE             (MAX_DTAG_BLOCK_ITEMS * TAG_SIZE)
+
+typedef enum {
+    CACHE_DCACHE = 0,
+    CACHE_ICACHE0 = 1,
+    CACHE_ICACHE1 = 2,
+} cache_t;
+
+typedef enum {
+    CACHE_MEMORY_INVALID = 0,
+    CACHE_MEMORY_IBANK0 = BIT(0),
+    CACHE_MEMORY_IBANK1 = BIT(1),
+    CACHE_MEMORY_IBANK2 = BIT(2),
+    CACHE_MEMORY_IBANK3 = BIT(3),
+    CACHE_MEMORY_DBANK0 = BIT(0),
+    CACHE_MEMORY_DBANK1 = BIT(1),
+    CACHE_MEMORY_DBANK2 = BIT(2),
+    CACHE_MEMORY_DBANK3 = BIT(3),
+} cache_array_t;
+
+#define ICACHE_SIZE_16KB  CACHE_SIZE_HALF
+#define ICACHE_SIZE_32KB  CACHE_SIZE_FULL
+#define DCACHE_SIZE_32KB  CACHE_SIZE_HALF
+#define DCACHE_SIZE_64KB  CACHE_SIZE_FULL
+
+typedef enum {
+    CACHE_SIZE_HALF = 0,                /*!< 8KB for icache and dcache */
+    CACHE_SIZE_FULL = 1,                /*!< 16KB for icache and dcache */
+} cache_size_t;
+
+typedef enum {
+    CACHE_4WAYS_ASSOC = 0,              /*!< 4 way associated cache */
+    CACHE_8WAYS_ASSOC = 1,              /*!< 8 way associated cache */
+} cache_ways_t;
+
+typedef enum {
+    CACHE_LINE_SIZE_16B = 0,            /*!< 16 Byte cache line size */
+    CACHE_LINE_SIZE_32B = 1,            /*!< 32 Byte cache line size */
+    CACHE_LINE_SIZE_64B = 2,            /*!< 64 Byte cache line size */
+} cache_line_size_t;
+
+typedef enum {
+    CACHE_AUTOLOAD_POSITIVE = 0,        /*!< cache autoload step is positive */
+    CACHE_AUTOLOAD_NEGATIVE = 1,        /*!< cache autoload step is negative */
+} cache_autoload_order_t;
+
+typedef enum {
+    CACHE_AUTOLOAD_REGION0 = 0,         /*!< cache autoload region0 */
+    CACHE_AUTOLOAD_REGION1 = 1,         /*!< cache autoload region1 */
+} cache_autoload_region_t;
+
+#define CACHE_AUTOLOAD_STEP(i) ((i) - 1)
+
+typedef enum {
+    CACHE_AUTOLOAD_MISS_TRIGGER = 0,    /*!< autoload only triggered by cache miss */
+    CACHE_AUTOLOAD_HIT_TRIGGER  = 1,    /*!< autoload only triggered by cache hit */
+    CACHE_AUTOLOAD_BOTH_TRIGGER = 2,    /*!< autoload triggered both by cache miss and hit */
+} cache_autoload_trigger_t;
+
+typedef enum {
+    CACHE_FREEZE_ACK_BUSY = 0,          /*!< in this mode, cache ack busy to CPU if a cache miss happens*/
+    CACHE_FREEZE_ACK_ERROR  = 1,        /*!< in this mode, cache ack wrong data to CPU and trigger an error if a cache miss happens */
+} cache_freeze_mode_t;
+
+struct cache_mode {
+    uint32_t cache_size;                /*!< cache size in byte */
+    uint16_t cache_line_size;           /*!< cache line size in byte */
+    uint8_t cache_ways;                 /*!< cache ways, always 4 */
+    uint8_t icache;                     /*!< the cache index, 0 for dcache, 1 for icache */
+};
+
+struct icache_tag_item {
+    uint32_t valid: 1;                  /*!< the tag item is valid or not */
+    uint32_t lock: 1;                   /*!< the cache line is locked or not */
+    uint32_t attr: 4;                   /*!< the attribute of the external memory physical address */
+    uint32_t fifo_cnt: 3;               /*!< fifo cnt, 0 ~ 3 for 4 ways cache */
+    uint32_t tag: 14;                   /*!< the tag is the high part of the cache address, however is only 64MB range, and without low part */
+    uint32_t reserved: 9;
+};
+
+struct dcache_tag_item {
+    uint32_t dirty: 1;                  /*!< the cache line value is dirty or not */
+    uint32_t valid: 1;                  /*!< the tag item is valid or not */
+    uint32_t lock: 1;                   /*!< the cache line is locked or not */
+    uint32_t occupy: 1;                 /*!< the cache line is occupied as internal sram */
+    uint32_t attr: 4;                   /*!< the attribute of the external memory physical address */
+    uint32_t fifo_cnt: 2;               /*!< fifo cnt, 0 ~ 3 for 4 ways cache */
+    uint32_t tag: 13;                   /*!< the tag is the high part of the cache address, however is only 64MB range, and without low part */
+    uint32_t reserved: 9;
+};
+
+struct autoload_config {
+    uint8_t ena;                        /*!< autoload enable */
+    uint8_t order;                      /*!< autoload step is positive or negative */
+    uint8_t trigger;                    /*!< autoload trigger */
+    uint8_t size;                       /*!< autoload size */
+};
+
+struct autoload_region_config {
+    uint8_t region;                     /*!< autoload region*/
+    uint8_t ena;                        /*!< autoload region enable */
+    uint32_t addr;                      /*!< autoload region start address */
+    uint32_t size;                      /*!< autoload region size */
+};
+
+struct tag_group_info {
+    struct cache_mode mode;                         /*!< cache and cache mode */
+    uint32_t filter_addr;                           /*!< the address that used to generate the struct */
+    uint32_t vaddr_offset;                          /*!< virtual address offset of the cache ways */
+    uint32_t tag_addr[MAX_CACHE_WAYS];              /*!< tag memory address, only [0~mode.ways-1] is valid to use */
+    uint32_t cache_memory_offset[MAX_CACHE_WAYS];   /*!< cache memory address, only [0~mode.ways-1] is valid to use */
+    uint8_t use_legacy;                             /*!< 1 for using legacy tag api, 0 for using 2rd tag api */
+};
+
+struct lock_config {
+    uint32_t addr;                                  /*!< manual lock address*/
+    uint16_t size;                                  /*!< manual lock size*/
+    uint16_t group;                                 /*!< manual lock group, 0 or 1*/
+};
+
+struct cache_internal_stub_table {
+    uint32_t (* icache_line_size)(void);
+    uint32_t (* dcache_line_size)(void);
+    uint32_t (* icache_addr)(uint32_t addr);
+    uint32_t (* dcache_addr)(uint32_t addr);
+    void (* invalidate_icache_items)(uint32_t addr, uint32_t items);
+    void (* invalidate_dcache_items)(uint32_t addr, uint32_t items);
+    void (* clean_items)(uint32_t addr, uint32_t items);
+    void (* writeback_items)(uint32_t addr, uint32_t items);
+    void (* lock_icache_items)(uint32_t addr, uint32_t items);
+    void (* lock_dcache_items)(uint32_t addr, uint32_t items);
+    void (* unlock_icache_items)(uint32_t addr, uint32_t items);
+    void (* unlock_dcache_items)(uint32_t addr, uint32_t items);
+    void (* occupy_items)(uint32_t addr, uint32_t items);
+    uint32_t (* suspend_icache_autoload)(void);
+    void (* resume_icache_autoload)(uint32_t autoload);
+    uint32_t (* suspend_dcache_autoload)(void);
+    void (* resume_dcache_autoload)(uint32_t autoload);
+    void (* freeze_icache_enable)(cache_freeze_mode_t mode);
+    void (* freeze_icache_disable)(void);
+    void (* freeze_dcache_enable)(cache_freeze_mode_t mode);
+    void (* freeze_dcache_disable)(void);
+    int (* op_addr)(uint32_t op_icache, uint32_t start_addr, uint32_t size, uint32_t cache_line_size, uint32_t max_sync_num, void(* cache_Iop)(uint32_t, uint32_t), void(* cache_Dop)(uint32_t, uint32_t));
+};
+
+typedef void (* cache_op_start)(void);
+typedef void (* cache_op_end)(void);
+
+typedef struct {
+    cache_op_start start;
+    cache_op_end end;
+} cache_op_cb_t;
+
+#define ESP_ROM_ERR_INVALID_ARG         1
+#define MMU_SET_ADDR_ALIGNED_ERROR      2
+#define MMU_SET_PASE_SIZE_ERROR         3
+#define MMU_SET_VADDR_OUT_RANGE         4
+
+#define CACHE_OP_ICACHE_Y               1
+#define CACHE_OP_ICACHE_N               0
+
+/**
+  * @brief Initialise cache mmu, mark all entries as invalid.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_MMU_Init(void);
+
+/**
+  * @brief Set ICache mmu mapping.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t ext_ram : MMU_ACCESS_FLASH for flash, MMU_ACCESS_SPIRAM for spiram, MMU_INVALID for invalid.
+  *
+  * @param  uint32_t vaddr : virtual address in CPU address space.
+  *                              Can be Iram0,Iram1,Irom0,Drom0 and AHB buses address.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t paddr : physical address in external memory.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t psize : page size of ICache, in kilobytes. Should be 64 here.
+  *
+  * @param  uint32_t num : pages to be set.
+  *
+  * @param  uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
+  *
+  * @return uint32_t: error status
+  *                   0 : mmu set success
+  *                   2 : vaddr or paddr is not aligned
+  *                   3 : psize error
+  *                   4 : vaddr is out of range
+  */
+int Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr,  uint32_t psize, uint32_t num, uint32_t fixed);
+
+/**
+  * @brief Set DCache mmu mapping.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t ext_ram : MMU_ACCESS_FLASH for flash, MMU_ACCESS_SPIRAM for spiram, MMU_INVALID for invalid.
+  *
+  * @param  uint32_t vaddr : virtual address in CPU address space.
+  *                              Can be DRam0, DRam1, DRom0, DPort and AHB buses address.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t paddr : physical address in external memory.
+  *                              Should be aligned by psize.
+  *
+  * @param  uint32_t psize : page size of DCache, in kilobytes. Should be 64 here.
+  *
+  * @param  uint32_t num : pages to be set.
+
+  * @param  uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
+  *
+  * @return uint32_t: error status
+  *                   0 : mmu set success
+  *                   2 : vaddr or paddr is not aligned
+  *                   3 : psize error
+  *                   4 : vaddr is out of range
+  */
+int Cache_Dbus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
+
+/**
+  * @brief Count the pages in the bus room address which map to Flash.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t bus : the bus to count with.
+  *
+  * @param uint32_t * page0_mapped : value should be initial by user, 0 for not mapped, other for mapped count.
+  *
+  * return uint32_t : the number of pages which map to Flash.
+  */
+uint32_t Cache_Count_Flash_Pages(uint32_t bus, uint32_t *page0_mapped);
+
+/**
+  * @brief Copy Instruction or rodata from Flash to SPIRAM, and remap to SPIRAM.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t bus : the bus which need to copy to SPIRAM.
+  *
+  * @param uint32_t bus_start_addr : the start virtual address for the bus.
+  *
+  * @param uint32_t start_page : the start (64KB) page number in SPIRAM.
+  *
+  * @param uint32_t * page0_page : the flash page0 in SPIRAM page number, 0xffff for invalid.
+  *
+  * return uint32_t : the next start page number for SPIRAM not mapped.
+  */
+uint32_t Cache_Flash_To_SPIRAM_Copy(uint32_t bus, uint32_t bus_start_addr, uint32_t start_page, uint32_t *page0_page);
+
+/**
+  * @brief allocate memory to used by ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_array_t icache_low : the data array bank used by icache low part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, CACHE_MEMORY_IBANK0
+  *
+  * @param cache_array_t icache_high : the data array bank used by icache high part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, or CACHE_MEMORY_IBANK1 only if icache_low and icache_high is CACHE_MEMORY_IBANK0
+  *
+  * return none
+  */
+void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low, cache_array_t icache_high);
+
+/**
+  * @brief allocate memory to used by DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_array_t dcache_low : the data array bank used by dcache low part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, CACHE_MEMORY_DBANK1
+  *
+  * @param cache_array_t dcache1_high : the data array bank used by dcache high part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, or CACHE_MEMORY_DBANK0 only if dcache_low0 and dcache_low1 is CACHE_MEMORY_DBANK1
+  *
+  * return none
+  */
+void Cache_Occupy_DCache_MEMORY(cache_array_t dcache_low, cache_array_t dcache_high);
+
+/**
+  * @brief Get cache mode of ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct cache_mode * mode : the pointer of cache mode struct, caller should set the icache field
+  *
+  * return none
+  */
+void Cache_Get_Mode(struct cache_mode *mode);
+
+/**
+  * @brief set ICache modes: cache size, associate ways and cache line size.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
+  *
+  * @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
+  *
+  * @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B and CACHE_LINE_SIZE_32B
+  *
+  * return none
+  */
+void Cache_Set_ICache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
+
+/**
+  * @brief set DCache modes: cache size, associate ways and cache line size.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
+  *
+  * @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC, only CACHE_4WAYS_ASSOC works
+  *
+  * @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
+  *
+  * return none
+  */
+void Cache_Set_DCache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
+
+/**
+  * @brief check if the address is accessed through ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : the address to check.
+  *
+  * @return 1 if the address is accessed through ICache, 0 if not.
+  */
+uint32_t Cache_Address_Through_ICache(uint32_t addr);
+
+/**
+  * @brief check if the address is accessed through DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : the address to check.
+  *
+  * @return 1 if the address is accessed through DCache, 0 if not.
+  */
+uint32_t Cache_Address_Through_DCache(uint32_t addr);
+
+/**
+  * @brief Init Cache for ROM boot, including resetting the Dcache, initializing Owner, MMU, setting DCache mode, Enabling DCache, unmasking bus.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Owner_Init(void);
+
+/**
+  * @brief Invalidate the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to invalidate
+  *
+  * @param  uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Invalidate_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Invalidate the cache items for DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to invalidate
+  *
+  * @param  uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Invalidate_DCache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Clean the dirty bit of cache Items of DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to Clean
+  *
+  * @param  uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Clean_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Write back the cache items of DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to write back
+  *
+  * @param  uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_WriteBack_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Invalidate the Cache items in the region from ICache or DCache.
+  *        If the region is not in Cache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : invalidated region start address.
+  *
+  * @param  uint32_t size : invalidated region size.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Invalidate_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Clean the dirty bit of Cache items in the region from DCache.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : cleaned region start address.
+  *
+  * @param  uint32_t size : cleaned region size.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Clean_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Writeback the Cache items(also clean the dirty bit) in the region from DCache.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr : writeback region start address.
+  *
+  * @param  uint32_t size : writeback region size.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_WriteBack_Addr(uint32_t addr, uint32_t size);
+
+
+/**
+  * @brief Invalidate all cache items in ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Invalidate_ICache_All(void);
+
+/**
+  * @brief Invalidate all cache items in DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Invalidate_DCache_All(void);
+
+/**
+  * @brief Clean the dirty bit of all cache items in DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Clean_All(void);
+
+/**
+  * @brief WriteBack all cache items in DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_WriteBack_All(void);
+
+/**
+  * @brief Mask all buses through ICache and DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Mask_All(void);
+
+/**
+  * @brief UnMask DRam0 bus through DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_UnMask_Dram0(void);
+
+/**
+  * @brief Suspend ICache auto preload operation, then you can resume it after some ICache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for ICache not auto preload before suspend.
+  */
+uint32_t Cache_Suspend_ICache_Autoload(void);
+
+/**
+  * @brief Resume ICache auto preload operation after some ICache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for ICache not auto preload before suspend.
+  *
+  * @return None.
+  */
+void Cache_Resume_ICache_Autoload(uint32_t autoload);
+
+/**
+  * @brief Suspend DCache auto preload operation, then you can resume it after some DCache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for DCache not auto preload before suspend.
+  */
+uint32_t Cache_Suspend_DCache_Autoload(void);
+
+/**
+  * @brief Resume DCache auto preload operation after some DCache operations.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for DCache not auto preload before suspend.
+  *
+  * @return None.
+  */
+void Cache_Resume_DCache_Autoload(uint32_t autoload);
+
+/**
+  * @brief Start an ICache manual preload, will suspend auto preload of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of the preload region.
+  *
+  * @param uint32_t size : size of the preload region, should not exceed the size of ICache.
+  *
+  * @param uint32_t order : the preload order, 0 for positive, other for negative
+  *
+  * @return uint32_t : 0 for ICache not auto preload before manual preload.
+  */
+uint32_t Cache_Start_ICache_Preload(uint32_t addr, uint32_t size, uint32_t order);
+
+/**
+  * @brief Return if the ICache manual preload done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for ICache manual preload not done.
+  */
+uint32_t Cache_ICache_Preload_Done(void);
+
+/**
+  * @brief End the ICache manual preload to resume auto preload of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for ICache not auto preload before manual preload.
+  *
+  * @return None
+  */
+void Cache_End_ICache_Preload(uint32_t autoload);
+
+/**
+  * @brief Start an DCache manual preload, will suspend auto preload of DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of the preload region.
+  *
+  * @param uint32_t size : size of the preload region, should not exceed the size of DCache.
+  *
+  * @param uint32_t order : the preload order, 0 for positive, other for negative
+  *
+  * @return uint32_t : 0 for DCache not auto preload before manual preload.
+  */
+uint32_t Cache_Start_DCache_Preload(uint32_t addr, uint32_t size, uint32_t order);
+
+/**
+  * @brief Return if the DCache manual preload done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 0 for DCache manual preload not done.
+  */
+uint32_t Cache_DCache_Preload_Done(void);
+
+/**
+  * @brief End the DCache manual preload to resume auto preload of DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t autoload : 0 for DCache not auto preload before manual preload.
+  *
+  * @return None
+  */
+void Cache_End_DCache_Preload(uint32_t autoload);
+
+/**
+  * @brief Config autoload parameters of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct autoload_config * config : autoload parameters.
+  *
+  * @return None
+  */
+void Cache_Config_ICache_Autoload(const struct autoload_config *config);
+
+/**
+  * @brief Config region autoload parameters of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct autoload_region_config * config : region autoload parameters.
+  *
+  * @return ESP_ROM_ERR_INVALID_ARG : invalid param, 0 : success
+  */
+int Cache_Config_ICache_Region_Autoload(const struct autoload_region_config *config);
+
+/**
+  * @brief Enable auto preload for ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Enable_ICache_Autoload(void);
+
+/**
+  * @brief Disable auto preload for ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Disable_ICache_Autoload(void);
+
+/**
+  * @brief Config autoload parameters of DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct autoload_config * config : autoload parameters.
+  *
+  * @return None
+  */
+void Cache_Config_DCache_Autoload(const struct autoload_config *config);
+
+/**
+  * @brief Config region autoload parameters of DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct autoload_region_config * config : region autoload parameters.
+  *
+  * @return ESP_ROM_ERR_INVALID_ARG : invalid param, 0 : success
+  */
+int Cache_Config_DCache_Region_Autoload(const struct autoload_region_config *config);
+
+/**
+  * @brief Enable auto preload for DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Enable_DCache_Autoload(void);
+
+/**
+  * @brief Disable auto preload for DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Disable_DCache_Autoload(void);
+
+/**
+  * @brief Config a group of prelock parameters of ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct lock_config * config : a group of lock parameters.
+  *
+  * @return None
+  */
+
+void Cache_Enable_ICache_PreLock(const struct lock_config *config);
+
+/**
+  * @brief Disable a group of prelock parameters for ICache.
+  *        However, the locked data will not be released.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint16_t group : 0 for group0, 1 for group1.
+  *
+  * @return None
+  */
+void Cache_Disable_ICache_PreLock(uint16_t group);
+
+/**
+  * @brief Lock the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to lock
+  *
+  * @param  uint32_t items: cache lines to lock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Lock_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Unlock the cache items for ICache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in ICache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to unlock
+  *
+  * @param  uint32_t items: cache lines to unlock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Unlock_ICache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Config a group of prelock parameters of DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param struct lock_config * config : a group of lock parameters.
+  *
+  * @return None
+  */
+void Cache_Enable_DCache_PreLock(const struct lock_config *config);
+
+/**
+  * @brief Disable a group of prelock parameters for DCache.
+  *        However, the locked data will not be released.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint16_t group : 0 for group0, 1 for group1.
+  *
+  * @return None
+  */
+void Cache_Disable_DCache_PreLock(uint16_t group);
+
+/**
+  * @brief Lock the cache items for DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to lock
+  *
+  * @param  uint32_t items: cache lines to lock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Lock_DCache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Unlock the cache items for DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t addr: start address to unlock
+  *
+  * @param  uint32_t items: cache lines to unlock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
+  *
+  * @return None
+  */
+void Cache_Unlock_DCache_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Lock the cache items in tag memory for ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of lock region.
+  *
+  * @param uint32_t size : size of lock region.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Lock_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Unlock the cache items in tag memory for ICache or DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of unlock region.
+  *
+  * @param uint32_t size : size of unlock region.
+  *
+  * @return 0 for success
+  *         1 for invalid argument
+  */
+int Cache_Unlock_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Disable ICache access for the cpu.
+  *        This operation will make all ICache tag memory invalid, CPU can't access ICache, ICache will keep idle.
+  *        Please do not call this function in your SDK application.
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Disable_ICache(void);
+
+/**
+  * @brief Enable ICache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : ICache will preload then.
+  *
+  * @return None
+  */
+void Cache_Enable_ICache(uint32_t autoload);
+
+/**
+  * @brief Disable DCache access for the cpu.
+  *        This operation will make all DCache tag memory invalid, CPU can't access DCache, DCache will keep idle
+  *        Please do not call this function in your SDK application.
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Disable_DCache(void);
+
+/**
+  * @brief Enable DCache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : DCache will preload then.
+  *
+  * @return None
+  */
+void Cache_Enable_DCache(uint32_t autoload);
+
+/**
+  * @brief Suspend ICache access for the cpu.
+  *        The ICache tag memory is still there, CPU can't access ICache, ICache will keep idle.
+  *        Please do not change MMU, cache mode or tag memory(tag memory can be changed in some special case).
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Suspend_ICache(void);
+
+/**
+  * @brief Resume ICache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : ICache will preload then.
+  *
+  * @return None
+  */
+void Cache_Resume_ICache(uint32_t autoload);
+
+/**
+  * @brief Suspend DCache access for the cpu.
+  *        The ICache tag memory is still there, CPU can't access DCache, DCache will keep idle.
+  ×        Please do not change MMU, cache mode or tag memory(tag memory can be changed in some special case).
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  None
+  *
+  * @return uint32_t : auto preload enabled before
+  */
+uint32_t Cache_Suspend_DCache(void);
+
+/**
+  * @brief Resume DCache access for the cpu.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t autoload : DCache will preload then.
+  *
+  * @return None
+  */
+void Cache_Resume_DCache(uint32_t autoload);
+
+/**
+  * @brief Get ICache cache line size
+  *
+  * @param  None
+  *
+  * @return uint32_t: 16, 32, 64 Byte
+  */
+uint32_t Cache_Get_ICache_Line_Size(void);
+
+/**
+  * @brief Get DCache cache line size
+  *
+  * @param  None
+  *
+  * @return uint32_t: 16, 32, 64 Byte
+  */
+uint32_t Cache_Get_DCache_Line_Size(void);
+
+/**
+  * @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void Cache_Set_Default_Mode(void);
+
+/**
+  * @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void Cache_Enable_Defalut_ICache_Mode(void);
+
+/**
+  * @brief Occupy the cache items for DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of occupy region
+  *
+  * @param uint32_t items : cache lines to occupy, items * cache_line_size should not exceed the cache_size
+  *
+  * @return None
+  */
+void Cache_Occupy_Items(uint32_t addr, uint32_t items);
+
+/**
+  * @brief Occupy the cache addr for DCache.
+  *        Operation will be done CACHE_LINE_SIZE aligned.
+  *        If the region is not in DCache addr room, nothing will be done.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param uint32_t addr : start address of occupy region
+  *
+  * @param uint32_t size : size of occupy region, size should not exceed the cache_size
+  */
+int Cache_Occupy_Addr(uint32_t addr, uint32_t size);
+
+/**
+  * @brief Enable freeze for ICache.
+  *        Any miss request will be rejected, including cpu miss and preload/autoload miss.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_freeze_mode_t mode : 0 for assert busy 1 for assert hit
+  *
+  * @return None
+  */
+void Cache_Freeze_ICache_Enable(cache_freeze_mode_t mode);
+
+/**
+  * @brief Disable freeze for ICache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @return None
+  */
+void Cache_Freeze_ICache_Disable(void);
+
+/**
+  * @brief Enable freeze for DCache.
+  *        Any miss request will be rejected, including cpu miss and preload/autoload miss.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param cache_freeze_mode_t mode : 0 for assert busy 1 for assert hit
+  *
+  * @return None
+  */
+void Cache_Freeze_DCache_Enable(cache_freeze_mode_t mode);
+
+/**
+  * @brief Disable freeze for DCache.
+  *        Please do not call this function in your SDK application.
+  *
+  * @return None
+  */
+void Cache_Freeze_DCache_Disable(void);
+
+/**
+  * @brief Travel tag memory to run a call back function.
+  *        ICache and DCache are suspend when doing this.
+  *        The callback will get the parameter tag_group_info, which will include a group of tag memory addresses and cache memory addresses.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to check and the cache mode.
+  *
+  * @param  uint32_t filter_addr : only the cache lines which may include the filter_address will be returned to the call back function.
+  *                                0 for do not filter, all cache lines will be returned.
+  *
+  * @param  void (* process)(struct tag_group_info *) : call back function, which may be called many times, a group(the addresses in the group are in the same position in the cache ways) a time.
+  *
+  * @return None
+  */
+void Cache_Travel_Tag_Memory(struct cache_mode * mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
+
+/**
+  * @brief Travel tag memory to run a call back function, using 2nd tag registers.
+  *        ICache and DCache are suspend when doing this.
+  *        The callback will get the parameter tag_group_info, which will include a group of tag memory addresses and cache memory addresses.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to check and the cache mode.
+  *
+  * @param  uint32_t filter_addr : only the cache lines which may include the filter_address will be returned to the call back function.
+  *                                0 for do not filter, all cache lines will be returned.
+  *
+  * @param  void (* process)(struct tag_group_info *) : call back function, which may be called many times, a group(the addresses in the group are in the same position in the cache ways) a time.
+  *
+  * @return None
+  */
+void Cache_Travel_Tag_Memory2(struct cache_mode * mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
+
+/**
+  * @brief Get the virtual address from cache mode, cache tag and the virtual address offset of cache ways.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
+  *
+  * @param  uint32_t tag : the tag part fo a tag item, 12-14 bits.
+  *
+  * @param  uint32_t addr_offset : the virtual address offset of the cache ways.
+  *
+  * @return uint32_t : the virtual address.
+  */
+uint32_t Cache_Get_Virtual_Addr(struct cache_mode *mode, uint32_t tag, uint32_t vaddr_offset);
+
+/**
+  * @brief Get cache memory block base address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t icache : 0 for dcache, other for icache.
+  *
+  * @param  uint32_t bank_no : 0 ~ 3 bank.
+  *
+  * @return uint32_t : the cache memory block base address, 0 if the block not used.
+  */
+uint32_t Cache_Get_Memory_BaseAddr(uint32_t icache, uint32_t bank_no);
+
+/**
+  * @brief Get the cache memory address from cache mode, cache memory offset and the virtual address offset of cache ways.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
+  *
+  * @param  uint32_t cache_memory_offset : the cache memory offset of the whole cache (ICache or DCache) for the cache line.
+  *
+  * @param  uint32_t addr_offset : the virtual address offset of the cache ways.
+  *
+  * @return uint32_t : the virtual address.
+  */
+uint32_t Cache_Get_Memory_Addr(struct cache_mode *mode, uint32_t cache_memory_offset, uint32_t vaddr_offset);
+
+/**
+  * @brief Get the cache memory value by DRAM address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  uint32_t cache_memory_addr : DRAM address for the cache memory, should be 4 byte aligned for IBus address.
+  *
+  * @return uint32_t : the word value of the address.
+  */
+uint32_t Cache_Get_Memory_value(uint32_t cache_memory_addr);
+/**
+  * @}
+  */
+
+/**
+  * @brief Get the cache MMU IROM end address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  void
+  *
+  * @return uint32_t : the word value of the address.
+  */
+uint32_t Cache_Get_IROM_MMU_End(void);
+
+/**
+  * @brief Get the cache MMU DROM end address.
+  *        Please do not call this function in your SDK application.
+  *
+  * @param  void
+  *
+  * @return uint32_t : the word value of the address.
+  */
+uint32_t Cache_Get_DROM_MMU_End(void);
+
+/**
+  * @brief Used by SPI flash mmap
+  *
+  */
+int flash2spiram_instruction_offset(void);
+int flash2spiram_rodata_offset(void);
+uint32_t flash_instr_rodata_start_page(uint32_t bus);
+uint32_t flash_instr_rodata_end_page(uint32_t bus);
+
+extern struct cache_internal_stub_table* rom_cache_internal_table_ptr;
+extern cache_op_cb_t rom_cache_op_cb;
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/crc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/crc.h
new file mode 100644
index 00000000000..e47a2ff580a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/crc.h
@@ -0,0 +1,122 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup crc_apis, uart configuration and communication related apis
+  * @brief crc apis
+  */
+
+/** @addtogroup crc_apis
+  * @{
+  */
+
+/* Standard CRC8/16/32 algorithms. */
+// CRC-8        x8+x2+x1+1              0x07
+// CRC16-CCITT  x16+x12+x5+1   1021   ISO HDLC, ITU X.25, V.34/V.41/V.42, PPP-FCS
+// CRC32:
+//G(x) = x32 +x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x1 + 1
+//If your buf is not continuous, you can use the first result to be the second parameter.
+
+/**
+  * @brief Crc32 value that is in little endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint32_t crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc32 value that is in big endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint32_t crc32_be(uint32_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc16 value that is in little endian.
+  *
+  * @param  uint16_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint16_t crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc16 value that is in big endian.
+  *
+  * @param  uint16_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint16_t crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc8 value that is in little endian.
+  *
+  * @param  uint8_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint8_t crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @brief Crc8 value that is in big endian.
+  *
+  * @param  uint32_t crc : init crc value, use 0 at the first use.
+  *
+  * @param  uint8_t const *buf : buffer to start calculate crc.
+  *
+  * @param  uint32_t len : buffer length in byte.
+  *
+  * @return None
+  */
+uint8_t crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/digital_signature.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/digital_signature.h
new file mode 100644
index 00000000000..36e71e7c4f3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/digital_signature.h
@@ -0,0 +1,142 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#define ETS_DS_IV_LEN 16
+
+/* Length of parameter 'C' stored in flash */
+#define ETS_DS_C_LEN (12672 / 8)
+
+/* Encrypted ETS data. Recommended to store in flash in this format.
+ */
+typedef struct {
+    /* RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 4096).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     */
+    unsigned rsa_length;
+
+    /* IV value used to encrypt 'c' */
+    uint8_t iv[ETS_DS_IV_LEN];
+
+    /* Encrypted Digital Signature parameters. Result of AES-CBC encryption
+       of plaintext values. Includes an encrypted message digest.
+    */
+    uint8_t c[ETS_DS_C_LEN];
+} ets_ds_data_t;
+
+typedef enum {
+    ETS_DS_OK,
+    ETS_DS_INVALID_PARAM,   /* Supplied parameters are invalid */
+    ETS_DS_INVALID_KEY,     /* HMAC peripheral failed to supply key */
+    ETS_DS_INVALID_PADDING, /* 'c' decrypted with invalid padding */
+    ETS_DS_INVALID_DIGEST,  /* 'c' decrypted with invalid digest */
+} ets_ds_result_t;
+
+void ets_ds_enable(void);
+
+void ets_ds_disable(void);
+
+/*
+ * @brief Start signing a message (or padded message digest) using the Digital Signature peripheral
+ *
+ * - @param message Pointer to message (or padded digest) containing the message to sign. Should be
+ *   (data->rsa_length + 1)*4 bytes long.  @param data Pointer to DS data. Can be a pointer to data
+ *   in flash.
+ *
+ * Caller must have already called ets_ds_enable() and ets_hmac_calculate_downstream() before calling
+ * this function, and is responsible for calling ets_ds_finish_sign() and then
+ * ets_hmac_invalidate_downstream() afterwards.
+ *
+ * @return ETS_DS_OK if signature is in progress, ETS_DS_INVALID_PARAM if param is invalid,
+ * EST_DS_INVALID_KEY if key or HMAC peripheral is configured incorrectly.
+ */
+ets_ds_result_t ets_ds_start_sign(const void *message, const ets_ds_data_t *data);
+
+
+/*
+ * @brief Returns true if the DS peripheral is busy following a call to ets_ds_start_sign()
+ *
+ * A result of false indicates that a call to ets_ds_finish_sign() will not block.
+ *
+ * Only valid if ets_ds_enable() has been called.
+ */
+bool ets_ds_is_busy(void);
+
+
+/* @brief Finish signing a message using the Digital Signature peripheral
+ *
+ * Must be called after ets_ds_start_sign(). Can use ets_ds_busy() to wait until
+ * peripheral is no longer busy.
+ *
+ * - @param signature Pointer to buffer to contain the signature. Should be
+ *   (data->rsa_length + 1)*4 bytes long.
+ * - @param data Should match the 'data' parameter passed to ets_ds_start_sign()
+ *
+ * @param ETS_DS_OK if signing succeeded, ETS_DS_INVALID_PARAM if param is invalid,
+ * ETS_DS_INVALID_DIGEST or ETS_DS_INVALID_PADDING if there is a problem with the
+ * encrypted data digest or padding bytes (in case of ETS_DS_INVALID_PADDING, a
+ * digest is produced anyhow.)
+ */
+ets_ds_result_t ets_ds_finish_sign(void *signature, const ets_ds_data_t *data);
+
+
+/* Plaintext parameters used by Digital Signature.
+
+   Not used for signing with DS peripheral, but can be encrypted
+   in-device by calling ets_ds_encrypt_params()
+*/
+typedef struct {
+    uint32_t Y[4096 / 32];
+    uint32_t M[4096 / 32];
+    uint32_t Rb[4096 / 32];
+    uint32_t M_prime;
+    uint32_t length;
+} ets_ds_p_data_t;
+
+typedef enum {
+    ETS_DS_KEY_HMAC, /* The HMAC key (as stored in efuse) */
+    ETS_DS_KEY_AES,  /* The AES key (as derived from HMAC key by HMAC peripheral in downstream mode) */
+} ets_ds_key_t;
+
+/* @brief Encrypt DS parameters suitable for storing and later use with DS peripheral
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the corresponding HMAC key will be stored to efuse and then permanently erased.
+ * @param key_type Type of key stored in 'key' (either the AES-256 DS key, or an HMAC DS key from which the AES DS key is derived using HMAC peripheral)
+ *
+ * @return ETS_DS_INVALID_PARAM if any parameter is invalid, or ETS_DS_OK if 'data' is successfully generated from the input parameters.
+ */
+ets_ds_result_t ets_ds_encrypt_params(ets_ds_data_t *data, const void *iv, const ets_ds_p_data_t *p_data, const void *key, ets_ds_key_t key_type);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/efuse.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/efuse.h
new file mode 100644
index 00000000000..cbe38e6a55e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/efuse.h
@@ -0,0 +1,391 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+/** \defgroup efuse_APIs efuse APIs
+  * @brief     ESP32 efuse read/write APIs
+  * @attention
+  *
+  */
+
+/** @addtogroup efuse_APIs
+  * @{
+  */
+
+typedef enum {
+    ETS_EFUSE_KEY_PURPOSE_USER = 0,
+    ETS_EFUSE_KEY_PURPOSE_RESERVED = 1,
+    ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 = 2,
+    ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 = 3,
+    ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,
+    ETS_EFUSE_KEY_PURPOSE_HMAC_UP = 8,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
+    ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
+    ETS_EFUSE_KEY_PURPOSE_MAX,
+} ets_efuse_purpose_t;
+
+typedef enum {
+    ETS_EFUSE_BLOCK0 = 0,
+    ETS_EFUSE_MAC_SPI_SYS_0 = 1,
+    ETS_EFUSE_BLOCK_SYS_DATA = 2,
+    ETS_EFUSE_BLOCK_USR_DATA = 3,
+    ETS_EFUSE_BLOCK_KEY0 = 4,
+    ETS_EFUSE_BLOCK_KEY1 = 5,
+    ETS_EFUSE_BLOCK_KEY2 = 6,
+    ETS_EFUSE_BLOCK_KEY3 = 7,
+    ETS_EFUSE_BLOCK_KEY4 = 8,
+    ETS_EFUSE_BLOCK_KEY5 = 9,
+    ETS_EFUSE_BLOCK_KEY6 = 10,
+    ETS_EFUSE_BLOCK_MAX,
+} ets_efuse_block_t;
+
+/**
+ * @brief set timing accroding the apb clock, so no read error or write error happens.
+ *
+ * @param clock: apb clock in HZ, only accept 5M(in FPGA), 10M(in FPGA), 20M, 40M, 80M.
+ *
+ * @return : 0 if success, others if clock not accepted
+ */
+int ets_efuse_set_timing(uint32_t clock);
+
+/**
+ * @brief Enable efuse subsystem. Called after reset. Doesn't need to be called again.
+ */
+void ets_efuse_start(void);
+
+/**
+  * @brief  Efuse read operation: copies data from physical efuses to efuse read registers.
+  *
+  * @param  null
+  *
+  * @return : 0 if success, others if apb clock is not accepted
+  */
+int ets_efuse_read(void);
+
+/**
+  * @brief  Efuse write operation: Copies data from efuse write registers to efuse. Operates on a single block of efuses at a time.
+  *
+  * @note This function does not update read efuses, call ets_efuse_read() once all programming is complete.
+  *
+  * @return : 0 if success, others if apb clock is not accepted
+  */
+int ets_efuse_program(ets_efuse_block_t block);
+
+/**
+ * @brief Set all Efuse program registers to zero.
+ *
+ * Call this before writing new data to the program registers.
+ */
+void ets_efuse_clear_program_registers(void);
+
+/**
+ * @brief Program a block of key data to an efuse block
+ *
+ * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6. Key block must be unused (@ref ets_efuse_key_block_unused).
+ * @param purpose Purpose to set for this key. Purpose must be already unset.
+ * @param data Pointer to data to write.
+ * @param data_len Length of data to write.
+ *
+ * @note This function also calls ets_efuse_program() for the specified block, and for block 0 (setting the purpose)
+ */
+int ets_efuse_write_key(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose, const void *data, size_t data_len);
+
+
+/* @brief Return the address of a particular efuse block's first read register
+ *
+ * @param block Index of efuse block to look up
+ *
+ * @return 0 if block is invalid, otherwise a numeric read register address
+ * of the first word in the block.
+ */
+uint32_t ets_efuse_get_read_register_address(ets_efuse_block_t block);
+
+/**
+ * @brief Return the current purpose set for an efuse key block
+ *
+ * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6.
+ */
+ets_efuse_purpose_t ets_efuse_get_key_purpose(ets_efuse_block_t key_block);
+
+/**
+ * @brief Find a key block with the particular purpose set
+ *
+ * @param purpose Purpose to search for.
+ * @param[out] key_block Pointer which will be set to the key block if found. Can be NULL, if only need to test the key block exists.
+ * @return true if found, false if not found. If false, value at key_block pointer is unchanged.
+ */
+bool ets_efuse_find_purpose(ets_efuse_purpose_t purpose, ets_efuse_block_t *key_block);
+
+/**
+ * Return true if the key block is unused, false otherwise.
+ *
+ * An unused key block is all zero content, not read or write protected,
+ * and has purpose 0 (ETS_EFUSE_KEY_PURPOSE_USER)
+ *
+ * @param key_block key block to check.
+ *
+ * @return true if key block is unused, false if key block or used
+ * or the specified block index is not a key block.
+ */
+bool ets_efuse_key_block_unused(ets_efuse_block_t key_block);
+
+
+/**
+ * @brief Search for an unused key block and return the first one found.
+ *
+ * See @ref ets_efuse_key_block_unused for a description of an unused key block.
+ *
+ * @return First unused key block, or ETS_EFUSE_BLOCK_MAX if no unused key block is found.
+ */
+ets_efuse_block_t ets_efuse_find_unused_key_block(void);
+
+/**
+ * @brief Return the number of unused efuse key blocks (0-6)
+ */
+unsigned ets_efuse_count_unused_key_blocks(void);
+
+/**
+ * @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
+ *
+ * @param data Pointer to data buffer (length 32 bytes)
+ * @param rs_values Pointer to write encoded data to (length 12 bytes)
+ */
+void ets_efuse_rs_calculate(const void *data, void *rs_values);
+
+/**
+  * @brief  Read spi flash pads configuration from Efuse
+  *
+  * @return
+  * - 0 for default SPI pins.
+  * - 1 for default HSPI pins.
+  * - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
+  *   EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
+  *   WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
+  */
+uint32_t ets_efuse_get_spiconfig(void);
+
+/**
+  * @brief  Read spi flash wp pad from Efuse
+  *
+  * @return
+  * - 0x3f for invalid.
+  * - 0~46 is valid.
+  */
+uint32_t ets_efuse_get_wp_pad(void);
+
+/**
+ * @brief Read opi flash pads configuration from Efuse
+ *
+ * @return
+ * - 0 for default SPI pins.
+ * - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for:
+ *   DQS, D4, D5, D6, D7 accordingly.
+ */
+uint32_t ets_efuse_get_opiconfig(void);
+
+/**
+  * @brief  Read if download mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable download mode.
+  * - false for efuse doesn't disable download mode.
+  */
+bool ets_efuse_download_modes_disabled(void);
+
+/**
+  * @brief  Read if legacy spi flash boot mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable legacy spi flash boot mode.
+  * - false for efuse doesn't disable legacy spi flash boot mode.
+  */
+bool ets_efuse_legacy_spi_boot_mode_disabled(void);
+
+/**
+  * @brief  Read if uart print control value from Efuse
+  *
+  * @return
+  * - 0 for uart force print.
+  * - 1 for uart print when GPIO46 is low when digital reset.
+  *   2 for uart print when GPIO46 is high when digital reset.
+  *   3 for uart force slient
+  */
+uint32_t ets_efuse_get_uart_print_control(void);
+
+/**
+  * @brief  Read which channel will used by ROM to print
+  *
+  * @return
+  * - 0 for UART0.
+  * - 1 for UART1.
+  */
+uint32_t ets_efuse_get_uart_print_channel(void);
+
+/**
+  * @brief  Read if usb download mode disabled from Efuse
+  *
+  * (Also returns true if security download mode is enabled, as this mode
+  * disables USB download.)
+  *
+  * @return
+  * - true for efuse disable usb download mode.
+  * - false for efuse doesn't disable usb download mode.
+  */
+bool ets_efuse_usb_download_mode_disabled(void);
+
+/**
+  * @brief  Read if tiny basic mode disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable tiny basic mode.
+  * - false for efuse doesn't disable tiny basic mode.
+  */
+bool ets_efuse_tiny_basic_mode_disabled(void);
+
+/**
+  * @brief  Read if usb module disabled from Efuse
+  *
+  * @return
+  * - true for efuse disable usb module.
+  * - false for efuse doesn't disable usb module.
+  */
+bool ets_efuse_usb_module_disabled(void);
+
+/**
+  * @brief  Read if security download modes enabled from Efuse
+  *
+  * @return
+  * - true for efuse enable security download mode.
+  * - false for efuse doesn't enable security download mode.
+  */
+bool ets_efuse_security_download_modes_enabled(void);
+
+/**
+ * @brief Return true if secure boot is enabled in EFuse
+ */
+bool ets_efuse_secure_boot_enabled(void);
+
+/**
+ * @brief Return true if secure boot aggressive revoke is enabled in EFuse
+ */
+bool ets_efuse_secure_boot_aggressive_revoke_enabled(void);
+
+/**
+ * @brief Return true if cache encryption (flash, PSRAM, etc) is enabled from boot via EFuse
+ */
+bool ets_efuse_cache_encryption_enabled(void);
+
+/**
+ * @brief Return true if EFuse indicates an external phy needs to be used for USB
+ */
+bool ets_efuse_usb_use_ext_phy(void);
+
+/**
+ * @brief Return true if EFuse indicates USB device persistence is disabled
+ */
+bool ets_efuse_usb_force_nopersist(void);
+
+/**
+ * @brief Return true if OPI pins GPIO33-37 are powered by VDDSPI, otherwise by VDD33CPU
+ */
+bool ets_efuse_flash_opi_5pads_power_sel_vddspi(void);
+
+/**
+ * @brief Return true if EFuse indicates an opi flash is attached.
+ */
+bool ets_efuse_flash_opi_mode(void);
+
+/**
+ * @brief Return true if EFuse indicates to send a flash resume command.
+ */
+bool ets_efuse_force_send_resume(void);
+
+/**
+  * @brief  return the time in us ROM boot need wait flash to power on from Efuse
+  *
+  * @return
+  * - uint32_t the time in us.
+  */
+uint32_t ets_efuse_get_flash_delay_us(void);
+
+#define EFUSE_SPICONFIG_SPI_DEFAULTS 0
+#define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
+
+#define EFUSE_SPICONFIG_RET_SPICLK_MASK         0x3f
+#define EFUSE_SPICONFIG_RET_SPICLK_SHIFT        0
+#define EFUSE_SPICONFIG_RET_SPICLK(ret)         (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPIQ_MASK           0x3f
+#define EFUSE_SPICONFIG_RET_SPIQ_SHIFT          6
+#define EFUSE_SPICONFIG_RET_SPIQ(ret)           (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPID_MASK           0x3f
+#define EFUSE_SPICONFIG_RET_SPID_SHIFT          12
+#define EFUSE_SPICONFIG_RET_SPID(ret)           (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
+
+#define EFUSE_SPICONFIG_RET_SPICS0_MASK         0x3f
+#define EFUSE_SPICONFIG_RET_SPICS0_SHIFT        18
+#define EFUSE_SPICONFIG_RET_SPICS0(ret)         (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
+
+
+#define EFUSE_SPICONFIG_RET_SPIHD_MASK          0x3f
+#define EFUSE_SPICONFIG_RET_SPIHD_SHIFT         24
+#define EFUSE_SPICONFIG_RET_SPIHD(ret)          (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
+
+/**
+ * @brief Enable JTAG temporarily by writing a JTAG HMAC "key" into
+ * the JTAG_CTRL registers.
+ *
+ * Works if JTAG has been "soft" disabled by burning the EFUSE_SOFT_DIS_JTAG efuse.
+ *
+ * Will enable the HMAC module to generate a "downstream" HMAC value from a key already saved in efuse, and then write the JTAG HMAC "key" which will enable JTAG if the two keys match.
+ *
+ * @param jtag_hmac_key Pointer to a 32 byte array containing a valid key. Supplied by user.
+ * @param key_block Index of a key block containing the source for this key.
+ *
+ * @return ETS_FAILED if HMAC operation fails or invalid parameter, ETS_OK otherwise. ETS_OK doesn't necessarily mean that JTAG was enabled.
+ */
+int ets_jtag_enable_temporarily(const uint8_t *jtag_hmac_key, ets_efuse_block_t key_block);
+
+/**
+  * @brief  A crc8 algorithm used for MAC addresses in efuse
+  *
+  * @param  unsigned char const *p : Pointer to original data.
+  *
+  * @param  unsigned int len : Data length in byte.
+  *
+  * @return unsigned char: Crc value.
+  */
+unsigned char esp_crc8(unsigned char const *p, unsigned int len);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/ets_sys.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/ets_sys.h
new file mode 100644
index 00000000000..edf9627c68f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/ets_sys.h
@@ -0,0 +1,654 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup ets_sys_apis, ets system related apis
+  * @brief ets system apis
+  */
+
+/** @addtogroup ets_sys_apis
+  * @{
+  */
+
+/************************************************************************
+  *                                NOTE
+  *   Many functions in this header files can't be run in FreeRTOS.
+  *   Please see the comment of the Functions.
+  *   There are also some functions that doesn't work on FreeRTOS
+  *   without listed in the header, such as:
+  *   xtos functions start with "_xtos_" in ld file.
+  *
+  ***********************************************************************
+  */
+
+/** \defgroup ets_apis, Espressif Task Scheduler related apis
+  * @brief ets apis
+  */
+
+/** @addtogroup ets_apis
+  * @{
+  */
+
+typedef enum {
+    ETS_OK     = 0, /**< return successful in ets*/
+    ETS_FAILED = 1  /**< return failed in ets*/
+} ETS_STATUS;
+
+typedef ETS_STATUS ets_status_t;
+
+typedef uint32_t ETSSignal;
+typedef uint32_t ETSParam;
+
+typedef struct ETSEventTag ETSEvent;    /**< Event transmit/receive in ets*/
+
+struct ETSEventTag {
+    ETSSignal sig;  /**< Event signal, in same task, different Event with different signal*/
+    ETSParam  par;  /**< Event parameter, sometimes without usage, then will be set as 0*/
+};
+
+typedef void (*ETSTask)(ETSEvent *e);       /**< Type of the Task processer*/
+typedef void (* ets_idle_cb_t)(void *arg);  /**< Type of the system idle callback*/
+
+/**
+  * @brief  Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.
+  *
+  * @param  none
+  *
+  * @return none
+  */
+void ets_run(void);
+
+/**
+  * @brief  Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.
+  *
+  * @param  ets_idle_cb_t func : The callback function.
+  *
+  * @param  void *arg : Argument of the callback.
+  *
+  * @return None
+  */
+void ets_set_idle_cb(ets_idle_cb_t func, void *arg);
+
+/**
+  * @brief  Init a task with processer, priority, queue to receive Event, queue length.
+  *
+  * @param  ETSTask task : The task processer.
+  *
+  * @param  uint8_t prio : Task priority, 0-31, bigger num with high priority, one priority with one task.
+  *
+  * @param  ETSEvent *queue : Queue belongs to the task, task always receives Events, Queue is circular used.
+  *
+  * @param  uint8_t qlen : Queue length.
+  *
+  * @return None
+  */
+void ets_task(ETSTask task, uint8_t prio, ETSEvent *queue, uint8_t qlen);
+
+/**
+  * @brief  Post an event to an Task.
+  *
+  * @param  uint8_t prio : Priority of the Task.
+  *
+  * @param  ETSSignal sig : Event signal.
+  *
+  * @param  ETSParam  par : Event parameter
+  *
+  * @return ETS_OK     : post successful
+  * @return ETS_FAILED : post failed
+  */
+ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_boot_apis, Boot routing related apis
+  * @brief ets boot apis
+  */
+
+/** @addtogroup ets_apis
+  * @{
+  */
+
+extern const char *const exc_cause_table[40];   ///**< excption cause that defined by the core.*/
+
+/**
+  * @brief  Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed.
+  *         When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.
+  *
+  * @param  uint32_t start : the PRO Entry code address value in uint32_t
+  *
+  * @return None
+  */
+void ets_set_user_start(uint32_t start);
+
+/**
+  * @brief  Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code.
+  *         When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.
+  *
+  * @param  uint32_t callback : the Startup code address value in uint32_t
+  *
+  * @return None     : post successful
+  */
+void ets_set_startup_callback(uint32_t callback);
+
+/**
+  * @brief  Set App cpu Entry code, code can be called in PRO CPU.
+  *         When APP booting is completed, APP CPU will call the Entry code if not NULL.
+  *
+  * @param  uint32_t start : the APP Entry code address value in uint32_t, stored in register APPCPU_CTRL_REG_D.
+  *
+  * @return None
+  */
+void ets_set_appcpu_boot_addr(uint32_t start);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_printf_apis, ets_printf related apis used in ets
+  * @brief ets printf apis
+  */
+
+/** @addtogroup ets_printf_apis
+  * @{
+  */
+
+/**
+  * @brief  Printf the strings to uart or other devices, similar with printf, simple than printf.
+  *         Can not print float point data format, or longlong data format.
+  *         So we maybe only use this in ROM.
+  *
+  * @param  const char *fmt : See printf.
+  *
+  * @param  ... : See printf.
+  *
+  * @return int : the length printed to the output device.
+  */
+int ets_printf(const char *fmt, ...);
+
+/**
+  * @brief  Set the uart channel of ets_printf(uart_tx_one_char).
+  *         ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
+  *
+  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2.
+  *
+  * @return None
+  */
+void ets_set_printf_channel(uint8_t uart_no);
+
+/**
+  * @brief Get the uart channel of ets_printf(uart_tx_one_char).
+  *
+  * @return uint8_t uart channel used by ets_printf(uart_tx_one_char).
+  */
+uint8_t ets_get_printf_channel(void);
+
+/**
+  * @brief  Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function.
+  *         Can not print float point data format, or longlong data format
+  *
+  * @param  char c : char to output.
+  *
+  * @return None
+  */
+void ets_write_char_uart(char c);
+
+/**
+  * @brief  Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
+  *         To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.
+  *
+  * @param  void (*)(char) p: Output function to install.
+  *
+  * @return None
+  */
+void ets_install_putc1(void (*p)(char c));
+
+/**
+  * @brief  Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
+  *         To install putc2, which is defaulted installed as NULL.
+  *
+  * @param  void (*)(char) p: Output function to install.
+  *
+  * @return None
+  */
+void ets_install_putc2(void (*p)(char c));
+
+/**
+  * @brief  Install putc1 as ets_write_char_uart.
+  *         In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_install_uart_printf(void);
+
+#define ETS_PRINTF(...) ets_printf(...)
+
+#define ETS_ASSERT(v) do { \
+    if (!(v)) {             \
+        ets_printf("%s %u \n", __FILE__, __LINE__); \
+        while (1) {};   \
+    }                   \
+} while (0);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_timer_apis, ets_timer related apis used in ets
+  * @brief ets timer apis
+  */
+
+/** @addtogroup ets_timer_apis
+  * @{
+  */
+typedef void ETSTimerFunc(void *timer_arg);/**< timer handler*/
+
+typedef struct _ETSTIMER_ {
+    struct _ETSTIMER_    *timer_next;   /**< timer linker*/
+    uint32_t              timer_expire; /**< abstruct time when timer expire*/
+    uint32_t              timer_period; /**< timer period, 0 means timer is not periodic repeated*/
+    ETSTimerFunc         *timer_func;   /**< timer handler*/
+    void                 *timer_arg;    /**< timer handler argument*/
+} ETSTimer;
+
+/**
+  * @brief  Init ets timer, this timer range is 640 us to 429496 ms
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_timer_init(void);
+
+/**
+  * @brief  In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_timer_deinit(void);
+
+/**
+  * @brief  Arm an ets timer, this timer range is 640 us to 429496 ms.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  uint32_t tmout : Timer value in ms, range is 1 to 429496.
+  *
+  * @param  bool repeat : Timer is periodic repeated.
+  *
+  * @return None
+  */
+void ets_timer_arm(ETSTimer *timer, uint32_t tmout, bool repeat);
+
+/**
+  * @brief  Arm an ets timer, this timer range is 640 us to 429496 ms.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  uint32_t tmout : Timer value in us, range is 1 to 429496729.
+  *
+  * @param  bool repeat : Timer is periodic repeated.
+  *
+  * @return None
+  */
+void ets_timer_arm_us(ETSTimer *ptimer, uint32_t us, bool repeat);
+
+/**
+  * @brief  Disarm an ets timer.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @return None
+  */
+void ets_timer_disarm(ETSTimer *timer);
+
+/**
+  * @brief  Set timer callback and argument.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @param  ETSTimerFunc *pfunction : Timer callback.
+  *
+  * @param  void *parg : Timer callback argument.
+  *
+  * @return None
+  */
+void ets_timer_setfn(ETSTimer *ptimer, ETSTimerFunc *pfunction, void *parg);
+
+/**
+  * @brief  Unset timer callback and argument to NULL.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  ETSTimer *timer : Timer struct pointer.
+  *
+  * @return None
+  */
+void ets_timer_done(ETSTimer *ptimer);
+
+/**
+  * @brief  CPU do while loop for some time.
+  *         In FreeRTOS task, please call FreeRTOS apis.
+  *
+  * @param  uint32_t us : Delay time in us.
+  *
+  * @return None
+  */
+void ets_delay_us(uint32_t us);
+
+/**
+  * @brief  Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
+  *         Call this function when CPU frequency is changed.
+  *
+  * @param  uint32_t ticks_per_us : CPU ticks per us.
+  *
+  * @return None
+  */
+void ets_update_cpu_frequency(uint32_t ticks_per_us);
+
+/**
+  * @brief  Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
+  *
+  * @note This function only sets the tick rate for the current CPU. It is located in ROM,
+  *       so the deep sleep stub can use it even if IRAM is not initialized yet.
+  *
+  * @param  uint32_t ticks_per_us : CPU ticks per us.
+  *
+  * @return None
+  */
+void ets_update_cpu_frequency_rom(uint32_t ticks_per_us);
+
+/**
+  * @brief  Get the real CPU ticks per us to the ets.
+  *         This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.
+  *
+  * @param  None
+  *
+  * @return uint32_t : CPU ticks per us record in ets.
+  */
+uint32_t ets_get_cpu_frequency(void);
+
+/**
+  * @brief  Get xtal_freq value, If value not stored in RTC_STORE5, than store.
+  *
+  * @param  None
+  *
+  * @return uint32_t : if stored in efuse(not 0)
+  *                         clock = ets_efuse_get_xtal_freq() * 1000000;
+  *                    else if analog_8M in efuse
+  *                         clock = ets_get_xtal_scale() * 625 / 16 * ets_efuse_get_8M_clock();
+  *                    else clock = 40M.
+  */
+uint32_t ets_get_xtal_freq(void);
+
+/**
+  * @brief  Get the apb divisor. The xtal frequency gets divided
+  *         by this value to generate the APB clock.
+  *         When any types of reset happens, the default value is 2.
+  *
+  * @param  None
+  *
+  * @return uint32_t : 1 or 2.
+  */
+uint32_t ets_get_xtal_div(void);
+
+
+/**
+  * @brief  Modifies the apb divisor. The xtal frequency gets divided by this to
+  *         generate the APB clock.
+  *
+  * @note The xtal frequency divisor is 2 by default as the glitch detector
+  *       doesn't properly stop glitches when it is 1. Please do not set the
+  *       divisor to 1 before the PLL is active without being aware that you
+  *       may be introducing a security risk.
+  *
+  * @param  div Divisor. 1 = xtal freq, 2 = 1/2th xtal freq.
+  */
+void ets_set_xtal_div(int div);
+
+
+/**
+  * @brief  Get apb_freq value, If value not stored in RTC_STORE5, than store.
+  *
+  * @param  None
+  *
+  * @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register.
+  *                         clock = (REG_READ(RTC_STORE5) & 0xffff) << 12;
+  *                    else store ets_get_detected_xtal_freq() in.
+  */
+uint32_t ets_get_apb_freq(void);
+
+/**
+  * @}
+  */
+
+/** \defgroup ets_intr_apis, ets interrupt configure related apis
+  * @brief ets intr apis
+  */
+
+/** @addtogroup ets_intr_apis
+  * @{
+  */
+
+typedef void (* ets_isr_t)(void *);/**< interrupt handler type*/
+
+/**
+  * @brief  Attach a interrupt handler to a CPU interrupt number.
+  *         This function equals to _xtos_set_interrupt_handler_arg(i, func, arg).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  int i : CPU interrupt number.
+  *
+  * @param  ets_isr_t func : Interrupt handler.
+  *
+  * @param  void *arg : argument of the handler.
+  *
+  * @return None
+  */
+void ets_isr_attach(int i, ets_isr_t func, void *arg);
+
+/**
+  * @brief  Mask the interrupts which show in mask bits.
+  *         This function equals to _xtos_ints_off(mask).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  uint32_t mask : BIT(i) means mask CPU interrupt number i.
+  *
+  * @return None
+  */
+void ets_isr_mask(uint32_t mask);
+
+/**
+  * @brief  Unmask the interrupts which show in mask bits.
+  *         This function equals to _xtos_ints_on(mask).
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  uint32_t mask : BIT(i) means mask CPU interrupt number i.
+  *
+  * @return None
+  */
+void ets_isr_unmask(uint32_t unmask);
+
+/**
+  * @brief  Lock the interrupt to level 2.
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_intr_lock(void);
+
+/**
+  * @brief  Unlock the interrupt to level 0.
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_intr_unlock(void);
+
+/**
+  * @brief  Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt).
+  *         This function direct set the CPU registers.
+  *         In FreeRTOS, please call FreeRTOS apis, never call this api.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void ets_waiti0(void);
+
+/**
+  * @brief  Attach an CPU interrupt to a hardware source.
+  *         We have 4 steps to use an interrupt:
+  *         1.Attach hardware interrupt source to CPU.  intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);
+  *         2.Set interrupt handler.                    xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);
+  *         3.Enable interrupt for CPU.                 xt_ints_on(1 << ETS_WMAC_INUM);
+  *         4.Enable interrupt in the module.
+  *
+  * @param  int cpu_no : The CPU which the interrupt number belongs.
+  *
+  * @param  uint32_t model_num : The interrupt hardware source number, please see the interrupt hardware source table.
+  *
+  * @param  uint32_t intr_num : The interrupt number CPU, please see the interrupt cpu using table.
+  *
+  * @return None
+  */
+void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
+
+#define _ETSTR(v) # v
+#define _ETS_SET_INTLEVEL(intlevel)        ({ unsigned __tmp; \
+            __asm__ __volatile__(   "rsil   %0, " _ETSTR(intlevel) "\n" \
+                        : "=a" (__tmp) : : "memory" ); \
+            })
+
+#ifdef CONFIG_NONE_OS
+#define ETS_INTR_LOCK() \
+        ets_intr_lock()
+
+#define ETS_INTR_UNLOCK() \
+        ets_intr_unlock()
+
+#define ETS_ISR_ATTACH \
+        ets_isr_attach
+
+#define ETS_INTR_ENABLE(inum) \
+        ets_isr_unmask((1<<inum))
+
+#define ETS_INTR_DISABLE(inum) \
+        ets_isr_mask((1<<inum))
+
+#define ETS_WMAC_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_WMAC_INUM, (func), (void *)(arg))
+
+#define ETS_TG0_T0_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_TG0_T0_INUM, (func), (void *)(arg))
+
+#define ETS_GPIO_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_GPIO_INUM, (func), (void *)(arg))
+
+#define ETS_UART0_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_UART0_INUM, (func), (void *)(arg))
+
+#define ETS_WDT_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_WDT_INUM, (func), (void *)(arg))
+
+#define ETS_SLC_INTR_ATTACH(func, arg) \
+        ETS_ISR_ATTACH(ETS_SLC_INUM, (func), (void *)(arg))
+
+#define ETS_BB_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_BB_INUM)
+
+#define ETS_BB_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_BB_INUM)
+
+#define ETS_UART0_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_UART0_INUM)
+
+#define ETS_UART0_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_UART0_INUM)
+
+#define ETS_GPIO_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_GPIO_INUM)
+
+#define ETS_GPIO_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_GPIO_INUM)
+
+#define ETS_WDT_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_WDT_INUM)
+
+#define ETS_WDT_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_WDT_INUM)
+
+#define ETS_TG0_T0_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_TG0_T0_INUM)
+
+#define ETS_TG0_T0_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_TG0_T0_INUM)
+
+#define ETS_SLC_INTR_ENABLE() \
+        ETS_INTR_ENABLE(ETS_SLC_INUM)
+
+#define ETS_SLC_INTR_DISABLE() \
+        ETS_INTR_DISABLE(ETS_SLC_INUM)
+#endif
+
+/**
+  * @}
+  */
+
+#ifndef MAC2STR
+#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
+#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
+#endif
+
+#define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
+
+typedef enum {
+    OK = 0,
+    FAIL,
+    PENDING,
+    BUSY,
+    CANCEL,
+} STATUS;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/gpio.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/gpio.h
new file mode 100644
index 00000000000..79b62239336
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/gpio.h
@@ -0,0 +1,306 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/gpio_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup gpio_apis, uart configuration and communication related apis
+  * @brief gpio apis
+  */
+
+/** @addtogroup gpio_apis
+  * @{
+  */
+
+#define GPIO_REG_READ(reg)              READ_PERI_REG(reg)
+#define GPIO_REG_WRITE(reg, val)        WRITE_PERI_REG(reg, val)
+#define GPIO_ID_PIN0                    0
+#define GPIO_ID_PIN(n)                  (GPIO_ID_PIN0+(n))
+#define GPIO_PIN_ADDR(i)                (GPIO_PIN0_REG + i*4)
+
+#define GPIO_FUNC_IN_HIGH               0x38
+#define GPIO_FUNC_IN_LOW                0x3C
+
+#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
+    ((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
+
+#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
+
+typedef enum {
+    GPIO_PIN_INTR_DISABLE = 0,
+    GPIO_PIN_INTR_POSEDGE = 1,
+    GPIO_PIN_INTR_NEGEDGE = 2,
+    GPIO_PIN_INTR_ANYEDGE = 3,
+    GPIO_PIN_INTR_LOLEVEL = 4,
+    GPIO_PIN_INTR_HILEVEL = 5
+} GPIO_INT_TYPE;
+
+#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
+        ((gpio_no < 32) ? gpio_output_set(bit_value<<gpio_no, (bit_value ? 0 : 1)<<gpio_no, 1<<gpio_no,0) : \
+                         gpio_output_set_high(bit_value<<(gpio_no - 32), (bit_value ? 0 : 1)<<(gpio_no - 32), 1<<(gpio_no -32),0))
+#define GPIO_DIS_OUTPUT(gpio_no)    ((gpio_no < 32) ? gpio_output_set(0,0,0, 1<<gpio_no) : gpio_output_set_high(0,0,0, 1<<(gpio_no - 32)))
+#define GPIO_INPUT_GET(gpio_no)     ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))&BIT0))
+
+/* GPIO interrupt handler, registered through gpio_intr_handler_register */
+typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
+
+/**
+  * @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
+  *        to initialize "output enables" and pin configurations for each gpio pin.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void gpio_init(void);
+
+/**
+  * @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
+  *         There is no particular ordering guaranteed; so if the order of writes is significant,
+  *         calling code should divide a single call into multiple calls.
+  *
+  * @param  uint32_t set_mask : the gpios that need high level.
+  *
+  * @param  uint32_t clear_mask : the gpios that need low level.
+  *
+  * @param  uint32_t enable_mask : the gpios that need be changed.
+  *
+  * @param  uint32_t disable_mask : the gpios that need diable output.
+  *
+  * @return None
+  */
+void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
+
+/**
+  * @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
+  *         There is no particular ordering guaranteed; so if the order of writes is significant,
+  *         calling code should divide a single call into multiple calls.
+  *
+  * @param  uint32_t set_mask : the gpios that need high level.
+  *
+  * @param  uint32_t clear_mask : the gpios that need low level.
+  *
+  * @param  uint32_t enable_mask : the gpios that need be changed.
+  *
+  * @param  uint32_t disable_mask : the gpios that need diable output.
+  *
+  * @return None
+  */
+void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
+
+/**
+  * @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
+  */
+uint32_t gpio_input_get(void);
+
+/**
+  * @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32.
+  */
+uint32_t gpio_input_get_high(void);
+
+/**
+  * @brief Register an application-specific interrupt handler for GPIO pin interrupts.
+  *        Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
+  *        Please do not call this function in SDK.
+  *
+  * @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler
+  *
+  * @param void *arg : gpio application-specific interrupt handler argument.
+  *
+  * @return None
+  */
+void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
+
+/**
+  * @brief Get gpio interrupts which happens but not processed.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
+  */
+uint32_t gpio_intr_pending(void);
+
+/**
+  * @brief Get gpio interrupts which happens but not processed.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
+  */
+uint32_t gpio_intr_pending_high(void);
+
+/**
+  * @brief Ack gpio interrupts to process pending interrupts.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
+  *
+  * @return None
+  */
+void gpio_intr_ack(uint32_t ack_mask);
+
+/**
+  * @brief Ack gpio interrupts to process pending interrupts.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
+  *
+  * @return None
+  */
+void gpio_intr_ack_high(uint32_t ack_mask);
+
+/**
+  * @brief Set GPIO to wakeup the ESP32.
+  *        Please do not call this function in SDK.
+  *
+  * @param uint32_t i: gpio number.
+  *
+  * @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
+  *
+  * @return None
+  */
+void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
+
+/**
+  * @brief disable GPIOs to wakeup the ESP32.
+  *        Please do not call this function in SDK.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void gpio_pin_wakeup_disable(void);
+
+/**
+  * @brief set gpio input to a signal, one gpio can input to several signals.
+  *
+  * @param uint32_t gpio : gpio number, 0~0x2f
+  *                        gpio == 0x3C, input 0 to signal
+  *                        gpio == 0x3A, input nothing to signal
+  *                        gpio == 0x38, input 1 to signal
+  *
+  * @param uint32_t signal_idx : signal index.
+  *
+  * @param bool inv : the signal is inv or not
+  *
+  * @return None
+  */
+void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
+
+/**
+  * @brief set signal output to gpio, one signal can output to several gpios.
+  *
+  * @param uint32_t gpio : gpio number, 0~0x2f
+  *
+  * @param uint32_t signal_idx : signal index.
+  *                        signal_idx == 0x100, cancel output put to the gpio
+  *
+  * @param bool out_inv : the signal output is invert or not
+  *
+  * @param bool oen_inv : the signal output enable is invert or not
+  *
+  * @return None
+  */
+void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv);
+
+/**
+  * @brief Select pad as a gpio function from IOMUX.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_select_gpio(uint32_t gpio_num);
+
+/**
+  * @brief Set pad driver capability.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @param uint32_t drv : 0-3
+  *
+  * @return None
+  */
+void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
+
+/**
+  * @brief Pull up the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_pullup(uint32_t gpio_num);
+
+/**
+  * @brief Pull down the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_pulldown(uint32_t gpio_num);
+
+/**
+  * @brief Unhold the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_unhold(uint32_t gpio_num);
+
+/**
+  * @brief Hold the pad from gpio number.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_hold(uint32_t gpio_num);
+
+/**
+  * @brief enable gpio pad input.
+  *
+  * @param uint32_t gpio_num : gpio number, 0~0x2f
+  *
+  * @return None
+  */
+void gpio_pad_input_enable(uint32_t gpio_num);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/hmac.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/hmac.h
new file mode 100644
index 00000000000..ac7ddf358ed
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/hmac.h
@@ -0,0 +1,59 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include "efuse.h"
+
+void ets_hmac_enable(void);
+
+void ets_hmac_disable(void);
+
+/* Use the "upstream" HMAC key (ETS_EFUSE_KEY_PURPOSE_HMAC_UP)
+   to digest a message.
+*/
+int ets_hmac_calculate_message(ets_efuse_block_t key_block, const void *message, size_t message_len, uint8_t *hmac);
+
+/* Calculate a downstream HMAC message to temporarily enable JTAG, or
+   to generate a Digital Signature data decryption key.
+
+   - purpose must be ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE
+     or ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG
+
+   - key_block must be in range ETS_EFUSE_BLOCK_KEY0 toETS_EFUSE_BLOCK_KEY6.
+     This efuse block must have the corresponding purpose set in "purpose", or
+     ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL.
+
+   The result of this HMAC calculation is only made available "downstream" to the
+   corresponding hardware module, and cannot be accessed by software.
+*/
+int ets_hmac_calculate_downstream(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose);
+
+/* Invalidate a downstream HMAC value previously calculated by ets_hmac_calculate_downstream().
+ *
+ * - purpose must match a previous call to ets_hmac_calculate_downstream().
+ *
+ * After this function is called, the corresponding internal operation (JTAG or DS) will no longer
+ * have access to the generated key.
+ */
+int ets_hmac_invalidate_downstream(ets_efuse_purpose_t purpose);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/libc_stubs.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/libc_stubs.h
new file mode 100644
index 00000000000..1298eeda55d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/libc_stubs.h
@@ -0,0 +1,92 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <sys/lock.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <reent.h>
+#include <errno.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief ESP32-S3 ROM code contains implementations of some of C library functions.
+ * Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall
+ * implementation defined in the following struct.
+ *
+ * The table itself, by default, is not allocated in RAM. There are two pointers, `syscall_table_ptr_pro` and
+ * `syscall_table_ptr_app`, which can be set to point to the locations of syscall tables of CPU 0 (aka PRO CPU)
+ * and CPU 1 (aka APP CPU). Location of these pointers in .bss segment of ROM code is defined in linker script.
+ *
+ * So, before using any of the C library functions (except for pure functions and memcpy/memset functions),
+ * application must allocate syscall table structure for each CPU being used, and populate it with pointers
+ * to actual implementations of corresponding syscalls.
+ *
+ */
+struct syscall_stub_table
+{
+    struct _reent* (*__getreent)(void);
+    void* (*_malloc_r)(struct _reent *r, size_t);
+    void (*_free_r)(struct _reent *r, void*);
+    void* (*_realloc_r)(struct _reent *r, void*, size_t);
+    void* (*_calloc_r)(struct _reent *r, size_t, size_t);
+    void (*_abort)(void);
+    int (*_system_r)(struct _reent *r, const char*);
+    int (*_rename_r)(struct _reent *r, const char*, const char*);
+    clock_t (*_times_r)(struct _reent *r, struct tms *);
+    int (*_gettimeofday_r) (struct _reent *r, struct timeval *, void *);
+    void (*_raise_r)(struct _reent *r);
+    int (*_unlink_r)(struct _reent *r, const char*);
+    int (*_link_r)(struct _reent *r, const char*, const char*);
+    int (*_stat_r)(struct _reent *r, const char*, struct stat *);
+    int (*_fstat_r)(struct _reent *r, int, struct stat *);
+    void* (*_sbrk_r)(struct _reent *r, ptrdiff_t);
+    int (*_getpid_r)(struct _reent *r);
+    int (*_kill_r)(struct _reent *r, int, int);
+    void (*_exit_r)(struct _reent *r, int);
+    int (*_close_r)(struct _reent *r, int);
+    int (*_open_r)(struct _reent *r, const char *, int, int);
+    int (*_write_r)(struct _reent *r, int, const void *, int);
+    int (*_lseek_r)(struct _reent *r, int, int, int);
+    int (*_read_r)(struct _reent *r, int, void *, int);
+    void (*_retarget_lock_init)(_LOCK_T *lock);
+    void (*_retarget_lock_init_recursive)(_LOCK_T *lock);
+    void (*_retarget_lock_close)(_LOCK_T lock);
+    void (*_retarget_lock_close_recursive)(_LOCK_T lock);
+    void (*_retarget_lock_acquire)(_LOCK_T lock);
+    void (*_retarget_lock_acquire_recursive)(_LOCK_T lock);
+    int (*_retarget_lock_try_acquire)(_LOCK_T lock);
+    int (*_retarget_lock_try_acquire_recursive)(_LOCK_T lock);
+    void (*_retarget_lock_release)(_LOCK_T lock);
+    void (*_retarget_lock_release_recursive)(_LOCK_T lock);
+    int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
+    int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
+    void (*__assert_func) (const char *file, int line, const char * func, const char *failedexpr) __attribute__((noreturn));
+    void (*__sinit) (struct _reent *r);
+    void (*_cleanup_r) (struct _reent* r);
+};
+
+extern struct syscall_stub_table *syscall_table_ptr;
+#define syscall_table_ptr_pro syscall_table_ptr
+#define syscall_table_ptr_app syscall_table_ptr
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/lldesc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/lldesc.h
new file mode 100644
index 00000000000..ebd02016bbd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/lldesc.h
@@ -0,0 +1,173 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "sys/queue.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LLDESC_TX_MBLK_SIZE                 268 /* */
+#define LLDESC_RX_SMBLK_SIZE                64  /* small block size, for small mgmt frame */
+#define LLDESC_RX_MBLK_SIZE                 524 /* rx is large sinec we want to contain mgmt frame in one block*/
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_SIZE    64  /* it is a small buffer which is a cycle link*/
+#define LLDESC_RX_AMPDU_LEN_MBLK_SIZE      256 /*for ampdu entry*/
+#ifdef ESP_MAC_5
+#define LLDESC_TX_MBLK_NUM                  116  /* 64K / 256 */
+#define LLDESC_RX_MBLK_NUM                  82 /* 64K / 512 MAX 172*/
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM     4
+#define LLDESC_RX_AMPDU_LEN_MLBK_NUM       12
+#else
+#ifdef SBUF_RXTX
+#define LLDESC_TX_MBLK_NUM_MAX    (2 * 48) /* 23K / 260 - 8 */
+#define LLDESC_RX_MBLK_NUM_MAX    (2 * 48) /* 23K / 524 */
+#define LLDESC_TX_MBLK_NUM_MIN    (2 * 16) /* 23K / 260 - 8 */
+#define LLDESC_RX_MBLK_NUM_MIN    (2 * 16) /* 23K / 524 */
+#endif
+#define LLDESC_TX_MBLK_NUM      10      //(2 * 32) /* 23K / 260 - 8 */
+
+#ifdef IEEE80211_RX_AMPDU
+#define LLDESC_RX_MBLK_NUM      30
+#else
+#define LLDESC_RX_MBLK_NUM      10
+#endif /*IEEE80211_RX_AMPDU*/
+
+#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM  4
+#define LLDESC_RX_AMPDU_LEN_MLBK_NUM    8
+#endif /* !ESP_MAC_5 */
+/*
+ *  SLC2 DMA Desc struct, aka lldesc_t
+ *
+ * --------------------------------------------------------------
+ * | own | EoF | sub_sof | 5'b0   | length [11:0] | size [11:0] |
+ * --------------------------------------------------------------
+ * |            buf_ptr [31:0]                                  |
+ * --------------------------------------------------------------
+ * |            next_desc_ptr [31:0]                            |
+ * --------------------------------------------------------------
+ */
+
+/* this bitfield is start from the LSB!!! */
+typedef struct lldesc_s {
+    volatile uint32_t size  : 12,
+             length: 12,
+             offset: 5, /* h/w reserved 5bit, s/w use it as offset in buffer */
+             sosf  : 1, /* start of sub-frame */
+             eof   : 1, /* end of frame */
+             owner : 1; /* hw or sw */
+    volatile uint8_t *buf;       /* point to buffer data */
+    union {
+        volatile uint32_t empty;
+        STAILQ_ENTRY(lldesc_s) qe;  /* pointing to the next desc */
+    };
+} lldesc_t;
+
+typedef struct tx_ampdu_entry_s {
+    uint32_t sub_len  : 12,
+             dili_num : 7,
+             : 1,
+             null_byte: 2,
+             data     : 1,
+             enc      : 1,
+             seq      : 8;
+} tx_ampdu_entry_t;
+
+typedef struct lldesc_chain_s {
+    lldesc_t *head;
+    lldesc_t *tail;
+} lldesc_chain_t;
+
+#ifdef SBUF_RXTX
+enum sbuf_mask_s  {
+    SBUF_MOVE_NO = 0,
+    SBUF_MOVE_TX2RX,
+    SBUF_MOVE_RX2TX,
+} ;
+
+#define SBUF_MOVE_STEP 8
+#endif
+#define LLDESC_SIZE  sizeof(struct lldesc_s)
+
+/* SLC Descriptor  */
+#define LLDESC_OWNER_MASK                  0x80000000
+#define LLDESC_OWNER_SHIFT                         31
+#define LLDESC_SW_OWNED                             0
+#define LLDESC_HW_OWNED                             1
+
+#define LLDESC_EOF_MASK                    0x40000000
+#define LLDESC_EOF_SHIFT                           30
+
+#define LLDESC_SOSF_MASK                   0x20000000
+#define LLDESC_SOSF_SHIFT                          29
+
+#define LLDESC_LENGTH_MASK                 0x00fff000
+#define LLDESC_LENGTH_SHIFT                        12
+
+#define LLDESC_SIZE_MASK                   0x00000fff
+#define LLDESC_SIZE_SHIFT                           0
+
+#define LLDESC_ADDR_MASK                    0x000fffff
+
+void lldesc_build_chain(uint8_t *descptr, uint32_t desclen, uint8_t *mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
+                        lldesc_t **head,
+#ifdef TO_HOST_RESTART
+                        lldesc_t **one_before_tail,
+#endif
+                        lldesc_t **tail);
+
+lldesc_t *lldesc_num2link(lldesc_t *head, uint16_t nblks);
+
+lldesc_t *lldesc_set_owner(lldesc_t *head, uint16_t nblks, uint8_t owner);
+
+static inline uint32_t lldesc_get_chain_length(lldesc_t *head)
+{
+    lldesc_t *ds = head;
+    uint32_t len = 0;
+
+    while (ds) {
+        len += ds->length;
+        ds = STAILQ_NEXT(ds, qe);
+    }
+
+    return len;
+}
+
+static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t len)
+{
+    ds->owner  = owner;
+    ds->eof    = eof;
+    ds->sosf   = sosf;
+    ds->length = len;
+}
+
+#define LLDESC_CONFIG(_desc, _owner, _eof, _sosf, _len)  \
+    do {                                                 \
+            (_desc)->owner  = (_owner);                  \
+            (_desc)->eof    = (_eof);                    \
+            (_desc)->sosf   = (_sosf);                   \
+            (_desc)->length = (_len);                    \
+    } while(0)
+
+#define LLDESC_FROM_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
+
+#define LLDESC_MAC_RX_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, (ds)->size)
+
+#define LLDESC_TO_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/md5_hash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/md5_hash.h
new file mode 100644
index 00000000000..8676ace2b10
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/md5_hash.h
@@ -0,0 +1,35 @@
+/*
+ * MD5 internal definitions
+ * Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Alternatively, this software may be distributed under the terms of BSD
+ * license.
+ *
+ * See README and COPYING for more details.
+ */
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct MD5Context {
+    uint32_t buf[4];
+    uint32_t bits[2];
+    uint8_t in[64];
+};
+
+void MD5Init(struct MD5Context *context);
+void MD5Update(struct MD5Context *context, unsigned char const *buf, unsigned len);
+void MD5Final(unsigned char digest[16], struct MD5Context *context);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/miniz.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/miniz.h
new file mode 100644
index 00000000000..7553511349e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/miniz.h
@@ -0,0 +1,757 @@
+#pragma once
+
+#include <stdlib.h>
+
+// Defines to completely disable specific portions of miniz.c:
+// If all macros here are defined the only functionality remaining will be CRC-32, adler-32, tinfl, and tdefl.
+
+// Define MINIZ_NO_STDIO to disable all usage and any functions which rely on stdio for file I/O.
+#define MINIZ_NO_STDIO
+
+// If MINIZ_NO_TIME is specified then the ZIP archive functions will not be able to get the current time, or
+// get/set file times, and the C run-time funcs that get/set times won't be called.
+// The current downside is the times written to your archives will be from 1979.
+#define MINIZ_NO_TIME
+
+// Define MINIZ_NO_ARCHIVE_APIS to disable all ZIP archive API's.
+#define MINIZ_NO_ARCHIVE_APIS
+
+// Define MINIZ_NO_ARCHIVE_APIS to disable all writing related ZIP archive API's.
+#define MINIZ_NO_ARCHIVE_WRITING_APIS
+
+// Define MINIZ_NO_ZLIB_APIS to remove all ZLIB-style compression/decompression API's.
+#define MINIZ_NO_ZLIB_APIS
+
+// Define MINIZ_NO_ZLIB_COMPATIBLE_NAME to disable zlib names, to prevent conflicts against stock zlib.
+#define MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+
+// Define MINIZ_NO_MALLOC to disable all calls to malloc, free, and realloc.
+// Note if MINIZ_NO_MALLOC is defined then the user must always provide custom user alloc/free/realloc
+// callbacks to the zlib and archive API's, and a few stand-alone helper API's which don't provide custom user
+// functions (such as tdefl_compress_mem_to_heap() and tinfl_decompress_mem_to_heap()) won't work.
+#define MINIZ_NO_MALLOC
+
+#if defined(__TINYC__) && (defined(__linux) || defined(__linux__))
+// TODO: Work around "error: include file 'sys\utime.h' when compiling with tcc on Linux
+#define MINIZ_NO_TIME
+#endif
+
+#if !defined(MINIZ_NO_TIME) && !defined(MINIZ_NO_ARCHIVE_APIS)
+#include <time.h>
+#endif
+
+//Hardcoded options for Xtensa - JD
+#define MINIZ_X86_OR_X64_CPU 0
+#define MINIZ_LITTLE_ENDIAN 1
+#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 0
+#define MINIZ_HAS_64BIT_REGISTERS 0
+#define TINFL_USE_64BIT_BITBUF 0
+
+
+#if defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || defined(__i386) || defined(__i486__) || defined(__i486) || defined(i386) || defined(__ia64__) || defined(__x86_64__)
+// MINIZ_X86_OR_X64_CPU is only used to help set the below macros.
+#define MINIZ_X86_OR_X64_CPU 1
+#endif
+
+#if (__BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) || MINIZ_X86_OR_X64_CPU
+// Set MINIZ_LITTLE_ENDIAN to 1 if the processor is little endian.
+#define MINIZ_LITTLE_ENDIAN 1
+#endif
+
+#if MINIZ_X86_OR_X64_CPU
+// Set MINIZ_USE_UNALIGNED_LOADS_AND_STORES to 1 on CPU's that permit efficient integer loads and stores from unaligned addresses.
+#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 1
+#endif
+
+#if defined(_M_X64) || defined(_WIN64) || defined(__MINGW64__) || defined(_LP64) || defined(__LP64__) || defined(__ia64__) || defined(__x86_64__)
+// Set MINIZ_HAS_64BIT_REGISTERS to 1 if operations on 64-bit integers are reasonably fast (and don't involve compiler generated calls to helper functions).
+#define MINIZ_HAS_64BIT_REGISTERS 1
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ------------------- zlib-style API Definitions.
+
+// For more compatibility with zlib, miniz.c uses unsigned long for some parameters/struct members. Beware: mz_ulong can be either 32 or 64-bits!
+typedef unsigned long mz_ulong;
+
+// mz_free() internally uses the MZ_FREE() macro (which by default calls free() unless you've modified the MZ_MALLOC macro) to release a block allocated from the heap.
+void mz_free(void *p);
+
+#define MZ_ADLER32_INIT (1)
+// mz_adler32() returns the initial adler-32 value to use when called with ptr==NULL.
+mz_ulong mz_adler32(mz_ulong adler, const unsigned char *ptr, size_t buf_len);
+
+#define MZ_CRC32_INIT (0)
+// mz_crc32() returns the initial CRC-32 value to use when called with ptr==NULL.
+mz_ulong mz_crc32(mz_ulong crc, const unsigned char *ptr, size_t buf_len);
+
+// Compression strategies.
+enum { MZ_DEFAULT_STRATEGY = 0, MZ_FILTERED = 1, MZ_HUFFMAN_ONLY = 2, MZ_RLE = 3, MZ_FIXED = 4 };
+
+// Method
+#define MZ_DEFLATED 8
+
+#ifndef MINIZ_NO_ZLIB_APIS
+
+// Heap allocation callbacks.
+// Note that mz_alloc_func parameter types purpsosely differ from zlib's: items/size is size_t, not unsigned long.
+typedef void *(*mz_alloc_func)(void *opaque, size_t items, size_t size);
+typedef void (*mz_free_func)(void *opaque, void *address);
+typedef void *(*mz_realloc_func)(void *opaque, void *address, size_t items, size_t size);
+
+#define MZ_VERSION          "9.1.15"
+#define MZ_VERNUM           0x91F0
+#define MZ_VER_MAJOR        9
+#define MZ_VER_MINOR        1
+#define MZ_VER_REVISION     15
+#define MZ_VER_SUBREVISION  0
+
+// Flush values. For typical usage you only need MZ_NO_FLUSH and MZ_FINISH. The other values are for advanced use (refer to the zlib docs).
+enum { MZ_NO_FLUSH = 0, MZ_PARTIAL_FLUSH = 1, MZ_SYNC_FLUSH = 2, MZ_FULL_FLUSH = 3, MZ_FINISH = 4, MZ_BLOCK = 5 };
+
+// Return status codes. MZ_PARAM_ERROR is non-standard.
+enum { MZ_OK = 0, MZ_STREAM_END = 1, MZ_NEED_DICT = 2, MZ_ERRNO = -1, MZ_STREAM_ERROR = -2, MZ_DATA_ERROR = -3, MZ_MEM_ERROR = -4, MZ_BUF_ERROR = -5, MZ_VERSION_ERROR = -6, MZ_PARAM_ERROR = -10000 };
+
+// Compression levels: 0-9 are the standard zlib-style levels, 10 is best possible compression (not zlib compatible, and may be very slow), MZ_DEFAULT_COMPRESSION=MZ_DEFAULT_LEVEL.
+enum { MZ_NO_COMPRESSION = 0, MZ_BEST_SPEED = 1, MZ_BEST_COMPRESSION = 9, MZ_UBER_COMPRESSION = 10, MZ_DEFAULT_LEVEL = 6, MZ_DEFAULT_COMPRESSION = -1 };
+
+// Window bits
+#define MZ_DEFAULT_WINDOW_BITS 15
+
+struct mz_internal_state;
+
+// Compression/decompression stream struct.
+typedef struct mz_stream_s {
+    const unsigned char *next_in;     // pointer to next byte to read
+    unsigned int avail_in;            // number of bytes available at next_in
+    mz_ulong total_in;                // total number of bytes consumed so far
+
+    unsigned char *next_out;          // pointer to next byte to write
+    unsigned int avail_out;           // number of bytes that can be written to next_out
+    mz_ulong total_out;               // total number of bytes produced so far
+
+    char *msg;                        // error msg (unused)
+    struct mz_internal_state *state;  // internal state, allocated by zalloc/zfree
+
+    mz_alloc_func zalloc;             // optional heap allocation function (defaults to malloc)
+    mz_free_func zfree;               // optional heap free function (defaults to free)
+    void *opaque;                     // heap alloc function user pointer
+
+    int data_type;                    // data_type (unused)
+    mz_ulong adler;                   // adler32 of the source or uncompressed data
+    mz_ulong reserved;                // not used
+} mz_stream;
+
+typedef mz_stream *mz_streamp;
+
+// Returns the version string of miniz.c.
+const char *mz_version(void);
+
+// mz_deflateInit() initializes a compressor with default options:
+// Parameters:
+//  pStream must point to an initialized mz_stream struct.
+//  level must be between [MZ_NO_COMPRESSION, MZ_BEST_COMPRESSION].
+//  level 1 enables a specially optimized compression function that's been optimized purely for performance, not ratio.
+//  (This special func. is currently only enabled when MINIZ_USE_UNALIGNED_LOADS_AND_STORES and MINIZ_LITTLE_ENDIAN are defined.)
+// Return values:
+//  MZ_OK on success.
+//  MZ_STREAM_ERROR if the stream is bogus.
+//  MZ_PARAM_ERROR if the input parameters are bogus.
+//  MZ_MEM_ERROR on out of memory.
+int mz_deflateInit(mz_streamp pStream, int level);
+
+// mz_deflateInit2() is like mz_deflate(), except with more control:
+// Additional parameters:
+//   method must be MZ_DEFLATED
+//   window_bits must be MZ_DEFAULT_WINDOW_BITS (to wrap the deflate stream with zlib header/adler-32 footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate/no header or footer)
+//   mem_level must be between [1, 9] (it's checked but ignored by miniz.c)
+int mz_deflateInit2(mz_streamp pStream, int level, int method, int window_bits, int mem_level, int strategy);
+
+// Quickly resets a compressor without having to reallocate anything. Same as calling mz_deflateEnd() followed by mz_deflateInit()/mz_deflateInit2().
+int mz_deflateReset(mz_streamp pStream);
+
+// mz_deflate() compresses the input to output, consuming as much of the input and producing as much output as possible.
+// Parameters:
+//   pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
+//   flush may be MZ_NO_FLUSH, MZ_PARTIAL_FLUSH/MZ_SYNC_FLUSH, MZ_FULL_FLUSH, or MZ_FINISH.
+// Return values:
+//   MZ_OK on success (when flushing, or if more input is needed but not available, and/or there's more output to be written but the output buffer is full).
+//   MZ_STREAM_END if all input has been consumed and all output bytes have been written. Don't call mz_deflate() on the stream anymore.
+//   MZ_STREAM_ERROR if the stream is bogus.
+//   MZ_PARAM_ERROR if one of the parameters is invalid.
+//   MZ_BUF_ERROR if no forward progress is possible because the input and/or output buffers are empty. (Fill up the input buffer or free up some output space and try again.)
+int mz_deflate(mz_streamp pStream, int flush);
+
+// mz_deflateEnd() deinitializes a compressor:
+// Return values:
+//  MZ_OK on success.
+//  MZ_STREAM_ERROR if the stream is bogus.
+int mz_deflateEnd(mz_streamp pStream);
+
+// mz_deflateBound() returns a (very) conservative upper bound on the amount of data that could be generated by deflate(), assuming flush is set to only MZ_NO_FLUSH or MZ_FINISH.
+mz_ulong mz_deflateBound(mz_streamp pStream, mz_ulong source_len);
+
+// Single-call compression functions mz_compress() and mz_compress2():
+// Returns MZ_OK on success, or one of the error codes from mz_deflate() on failure.
+int mz_compress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
+int mz_compress2(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len, int level);
+
+// mz_compressBound() returns a (very) conservative upper bound on the amount of data that could be generated by calling mz_compress().
+mz_ulong mz_compressBound(mz_ulong source_len);
+
+// Initializes a decompressor.
+int mz_inflateInit(mz_streamp pStream);
+
+// mz_inflateInit2() is like mz_inflateInit() with an additional option that controls the window size and whether or not the stream has been wrapped with a zlib header/footer:
+// window_bits must be MZ_DEFAULT_WINDOW_BITS (to parse zlib header/footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate).
+int mz_inflateInit2(mz_streamp pStream, int window_bits);
+
+// Decompresses the input stream to the output, consuming only as much of the input as needed, and writing as much to the output as possible.
+// Parameters:
+//   pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
+//   flush may be MZ_NO_FLUSH, MZ_SYNC_FLUSH, or MZ_FINISH.
+//   On the first call, if flush is MZ_FINISH it's assumed the input and output buffers are both sized large enough to decompress the entire stream in a single call (this is slightly faster).
+//   MZ_FINISH implies that there are no more source bytes available beside what's already in the input buffer, and that the output buffer is large enough to hold the rest of the decompressed data.
+// Return values:
+//   MZ_OK on success. Either more input is needed but not available, and/or there's more output to be written but the output buffer is full.
+//   MZ_STREAM_END if all needed input has been consumed and all output bytes have been written. For zlib streams, the adler-32 of the decompressed data has also been verified.
+//   MZ_STREAM_ERROR if the stream is bogus.
+//   MZ_DATA_ERROR if the deflate stream is invalid.
+//   MZ_PARAM_ERROR if one of the parameters is invalid.
+//   MZ_BUF_ERROR if no forward progress is possible because the input buffer is empty but the inflater needs more input to continue, or if the output buffer is not large enough. Call mz_inflate() again
+//   with more input data, or with more room in the output buffer (except when using single call decompression, described above).
+int mz_inflate(mz_streamp pStream, int flush);
+
+// Deinitializes a decompressor.
+int mz_inflateEnd(mz_streamp pStream);
+
+// Single-call decompression.
+// Returns MZ_OK on success, or one of the error codes from mz_inflate() on failure.
+int mz_uncompress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
+
+// Returns a string description of the specified error code, or NULL if the error code is invalid.
+const char *mz_error(int err);
+
+// Redefine zlib-compatible names to miniz equivalents, so miniz.c can be used as a drop-in replacement for the subset of zlib that miniz.c supports.
+// Define MINIZ_NO_ZLIB_COMPATIBLE_NAMES to disable zlib-compatibility if you use zlib in the same project.
+#ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+typedef unsigned char Byte;
+typedef unsigned int uInt;
+typedef mz_ulong uLong;
+typedef Byte Bytef;
+typedef uInt uIntf;
+typedef char charf;
+typedef int intf;
+typedef void *voidpf;
+typedef uLong uLongf;
+typedef void *voidp;
+typedef void *const voidpc;
+#define Z_NULL                0
+#define Z_NO_FLUSH            MZ_NO_FLUSH
+#define Z_PARTIAL_FLUSH       MZ_PARTIAL_FLUSH
+#define Z_SYNC_FLUSH          MZ_SYNC_FLUSH
+#define Z_FULL_FLUSH          MZ_FULL_FLUSH
+#define Z_FINISH              MZ_FINISH
+#define Z_BLOCK               MZ_BLOCK
+#define Z_OK                  MZ_OK
+#define Z_STREAM_END          MZ_STREAM_END
+#define Z_NEED_DICT           MZ_NEED_DICT
+#define Z_ERRNO               MZ_ERRNO
+#define Z_STREAM_ERROR        MZ_STREAM_ERROR
+#define Z_DATA_ERROR          MZ_DATA_ERROR
+#define Z_MEM_ERROR           MZ_MEM_ERROR
+#define Z_BUF_ERROR           MZ_BUF_ERROR
+#define Z_VERSION_ERROR       MZ_VERSION_ERROR
+#define Z_PARAM_ERROR         MZ_PARAM_ERROR
+#define Z_NO_COMPRESSION      MZ_NO_COMPRESSION
+#define Z_BEST_SPEED          MZ_BEST_SPEED
+#define Z_BEST_COMPRESSION    MZ_BEST_COMPRESSION
+#define Z_DEFAULT_COMPRESSION MZ_DEFAULT_COMPRESSION
+#define Z_DEFAULT_STRATEGY    MZ_DEFAULT_STRATEGY
+#define Z_FILTERED            MZ_FILTERED
+#define Z_HUFFMAN_ONLY        MZ_HUFFMAN_ONLY
+#define Z_RLE                 MZ_RLE
+#define Z_FIXED               MZ_FIXED
+#define Z_DEFLATED            MZ_DEFLATED
+#define Z_DEFAULT_WINDOW_BITS MZ_DEFAULT_WINDOW_BITS
+#define alloc_func            mz_alloc_func
+#define free_func             mz_free_func
+#define internal_state        mz_internal_state
+#define z_stream              mz_stream
+#define deflateInit           mz_deflateInit
+#define deflateInit2          mz_deflateInit2
+#define deflateReset          mz_deflateReset
+#define deflate               mz_deflate
+#define deflateEnd            mz_deflateEnd
+#define deflateBound          mz_deflateBound
+#define compress              mz_compress
+#define compress2             mz_compress2
+#define compressBound         mz_compressBound
+#define inflateInit           mz_inflateInit
+#define inflateInit2          mz_inflateInit2
+#define inflate               mz_inflate
+#define inflateEnd            mz_inflateEnd
+#define uncompress            mz_uncompress
+#define crc32                 mz_crc32
+#define adler32               mz_adler32
+#define MAX_WBITS             15
+#define MAX_MEM_LEVEL         9
+#define zError                mz_error
+#define ZLIB_VERSION          MZ_VERSION
+#define ZLIB_VERNUM           MZ_VERNUM
+#define ZLIB_VER_MAJOR        MZ_VER_MAJOR
+#define ZLIB_VER_MINOR        MZ_VER_MINOR
+#define ZLIB_VER_REVISION     MZ_VER_REVISION
+#define ZLIB_VER_SUBREVISION  MZ_VER_SUBREVISION
+#define zlibVersion           mz_version
+#define zlib_version          mz_version()
+#endif // #ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
+
+#endif // MINIZ_NO_ZLIB_APIS
+
+// ------------------- Types and macros
+
+typedef unsigned char mz_uint8;
+typedef signed short mz_int16;
+typedef unsigned short mz_uint16;
+typedef unsigned int mz_uint32;
+typedef unsigned int mz_uint;
+typedef long long mz_int64;
+typedef unsigned long long mz_uint64;
+typedef int mz_bool;
+
+#define MZ_FALSE (0)
+#define MZ_TRUE (1)
+
+// An attempt to work around MSVC's spammy "warning C4127: conditional expression is constant" message.
+#ifdef _MSC_VER
+#define MZ_MACRO_END while (0, 0)
+#else
+#define MZ_MACRO_END while (0)
+#endif
+
+// ------------------- ZIP archive reading/writing
+
+#ifndef MINIZ_NO_ARCHIVE_APIS
+
+enum {
+    MZ_ZIP_MAX_IO_BUF_SIZE = 64 * 1024,
+    MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE = 260,
+    MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE = 256
+};
+
+typedef struct {
+    mz_uint32 m_file_index;
+    mz_uint32 m_central_dir_ofs;
+    mz_uint16 m_version_made_by;
+    mz_uint16 m_version_needed;
+    mz_uint16 m_bit_flag;
+    mz_uint16 m_method;
+#ifndef MINIZ_NO_TIME
+    time_t m_time;
+#endif
+    mz_uint32 m_crc32;
+    mz_uint64 m_comp_size;
+    mz_uint64 m_uncomp_size;
+    mz_uint16 m_internal_attr;
+    mz_uint32 m_external_attr;
+    mz_uint64 m_local_header_ofs;
+    mz_uint32 m_comment_size;
+    char m_filename[MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE];
+    char m_comment[MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE];
+} mz_zip_archive_file_stat;
+
+typedef size_t (*mz_file_read_func)(void *pOpaque, mz_uint64 file_ofs, void *pBuf, size_t n);
+typedef size_t (*mz_file_write_func)(void *pOpaque, mz_uint64 file_ofs, const void *pBuf, size_t n);
+
+struct mz_zip_internal_state_tag;
+typedef struct mz_zip_internal_state_tag mz_zip_internal_state;
+
+typedef enum {
+    MZ_ZIP_MODE_INVALID = 0,
+    MZ_ZIP_MODE_READING = 1,
+    MZ_ZIP_MODE_WRITING = 2,
+    MZ_ZIP_MODE_WRITING_HAS_BEEN_FINALIZED = 3
+} mz_zip_mode;
+
+typedef struct mz_zip_archive_tag {
+    mz_uint64 m_archive_size;
+    mz_uint64 m_central_directory_file_ofs;
+    mz_uint m_total_files;
+    mz_zip_mode m_zip_mode;
+
+    mz_uint m_file_offset_alignment;
+
+    mz_alloc_func m_pAlloc;
+    mz_free_func m_pFree;
+    mz_realloc_func m_pRealloc;
+    void *m_pAlloc_opaque;
+
+    mz_file_read_func m_pRead;
+    mz_file_write_func m_pWrite;
+    void *m_pIO_opaque;
+
+    mz_zip_internal_state *m_pState;
+
+} mz_zip_archive;
+
+typedef enum {
+    MZ_ZIP_FLAG_CASE_SENSITIVE                = 0x0100,
+    MZ_ZIP_FLAG_IGNORE_PATH                   = 0x0200,
+    MZ_ZIP_FLAG_COMPRESSED_DATA               = 0x0400,
+    MZ_ZIP_FLAG_DO_NOT_SORT_CENTRAL_DIRECTORY = 0x0800
+} mz_zip_flags;
+
+// ZIP archive reading
+
+// Inits a ZIP archive reader.
+// These functions read and validate the archive's central directory.
+mz_bool mz_zip_reader_init(mz_zip_archive *pZip, mz_uint64 size, mz_uint32 flags);
+mz_bool mz_zip_reader_init_mem(mz_zip_archive *pZip, const void *pMem, size_t size, mz_uint32 flags);
+
+#ifndef MINIZ_NO_STDIO
+mz_bool mz_zip_reader_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint32 flags);
+#endif
+
+// Returns the total number of files in the archive.
+mz_uint mz_zip_reader_get_num_files(mz_zip_archive *pZip);
+
+// Returns detailed information about an archive file entry.
+mz_bool mz_zip_reader_file_stat(mz_zip_archive *pZip, mz_uint file_index, mz_zip_archive_file_stat *pStat);
+
+// Determines if an archive file entry is a directory entry.
+mz_bool mz_zip_reader_is_file_a_directory(mz_zip_archive *pZip, mz_uint file_index);
+mz_bool mz_zip_reader_is_file_encrypted(mz_zip_archive *pZip, mz_uint file_index);
+
+// Retrieves the filename of an archive file entry.
+// Returns the number of bytes written to pFilename, or if filename_buf_size is 0 this function returns the number of bytes needed to fully store the filename.
+mz_uint mz_zip_reader_get_filename(mz_zip_archive *pZip, mz_uint file_index, char *pFilename, mz_uint filename_buf_size);
+
+// Attempts to locates a file in the archive's central directory.
+// Valid flags: MZ_ZIP_FLAG_CASE_SENSITIVE, MZ_ZIP_FLAG_IGNORE_PATH
+// Returns -1 if the file cannot be found.
+int mz_zip_reader_locate_file(mz_zip_archive *pZip, const char *pName, const char *pComment, mz_uint flags);
+
+// Extracts a archive file to a memory buffer using no memory allocation.
+mz_bool mz_zip_reader_extract_to_mem_no_alloc(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
+mz_bool mz_zip_reader_extract_file_to_mem_no_alloc(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
+
+// Extracts a archive file to a memory buffer.
+mz_bool mz_zip_reader_extract_to_mem(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_mem(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags);
+
+// Extracts a archive file to a dynamically allocated heap buffer.
+void *mz_zip_reader_extract_to_heap(mz_zip_archive *pZip, mz_uint file_index, size_t *pSize, mz_uint flags);
+void *mz_zip_reader_extract_file_to_heap(mz_zip_archive *pZip, const char *pFilename, size_t *pSize, mz_uint flags);
+
+// Extracts a archive file using a callback function to output the file's data.
+mz_bool mz_zip_reader_extract_to_callback(mz_zip_archive *pZip, mz_uint file_index, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_callback(mz_zip_archive *pZip, const char *pFilename, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
+
+#ifndef MINIZ_NO_STDIO
+// Extracts a archive file to a disk file and sets its last accessed and modified times.
+// This function only extracts files, not archive directory records.
+mz_bool mz_zip_reader_extract_to_file(mz_zip_archive *pZip, mz_uint file_index, const char *pDst_filename, mz_uint flags);
+mz_bool mz_zip_reader_extract_file_to_file(mz_zip_archive *pZip, const char *pArchive_filename, const char *pDst_filename, mz_uint flags);
+#endif
+
+// Ends archive reading, freeing all allocations, and closing the input archive file if mz_zip_reader_init_file() was used.
+mz_bool mz_zip_reader_end(mz_zip_archive *pZip);
+
+// ZIP archive writing
+
+#ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
+
+// Inits a ZIP archive writer.
+mz_bool mz_zip_writer_init(mz_zip_archive *pZip, mz_uint64 existing_size);
+mz_bool mz_zip_writer_init_heap(mz_zip_archive *pZip, size_t size_to_reserve_at_beginning, size_t initial_allocation_size);
+
+#ifndef MINIZ_NO_STDIO
+mz_bool mz_zip_writer_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint64 size_to_reserve_at_beginning);
+#endif
+
+// Converts a ZIP archive reader object into a writer object, to allow efficient in-place file appends to occur on an existing archive.
+// For archives opened using mz_zip_reader_init_file, pFilename must be the archive's filename so it can be reopened for writing. If the file can't be reopened, mz_zip_reader_end() will be called.
+// For archives opened using mz_zip_reader_init_mem, the memory block must be growable using the realloc callback (which defaults to realloc unless you've overridden it).
+// Finally, for archives opened using mz_zip_reader_init, the mz_zip_archive's user provided m_pWrite function cannot be NULL.
+// Note: In-place archive modification is not recommended unless you know what you're doing, because if execution stops or something goes wrong before
+// the archive is finalized the file's central directory will be hosed.
+mz_bool mz_zip_writer_init_from_reader(mz_zip_archive *pZip, const char *pFilename);
+
+// Adds the contents of a memory buffer to an archive. These functions record the current local time into the archive.
+// To add a directory entry, call this method with an archive name ending in a forwardslash with empty buffer.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_writer_add_mem(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, mz_uint level_and_flags);
+mz_bool mz_zip_writer_add_mem_ex(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags, mz_uint64 uncomp_size, mz_uint32 uncomp_crc32);
+
+#ifndef MINIZ_NO_STDIO
+// Adds the contents of a disk file to an archive. This function also records the disk file's modified time into the archive.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_writer_add_file(mz_zip_archive *pZip, const char *pArchive_name, const char *pSrc_filename, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
+#endif
+
+// Adds a file to an archive by fully cloning the data from another archive.
+// This function fully clones the source file's compressed data (no recompression), along with its full filename, extra data, and comment fields.
+mz_bool mz_zip_writer_add_from_zip_reader(mz_zip_archive *pZip, mz_zip_archive *pSource_zip, mz_uint file_index);
+
+// Finalizes the archive by writing the central directory records followed by the end of central directory record.
+// After an archive is finalized, the only valid call on the mz_zip_archive struct is mz_zip_writer_end().
+// An archive must be manually finalized by calling this function for it to be valid.
+mz_bool mz_zip_writer_finalize_archive(mz_zip_archive *pZip);
+mz_bool mz_zip_writer_finalize_heap_archive(mz_zip_archive *pZip, void **pBuf, size_t *pSize);
+
+// Ends archive writing, freeing all allocations, and closing the output file if mz_zip_writer_init_file() was used.
+// Note for the archive to be valid, it must have been finalized before ending.
+mz_bool mz_zip_writer_end(mz_zip_archive *pZip);
+
+// Misc. high-level helper functions:
+
+// mz_zip_add_mem_to_archive_file_in_place() efficiently (but not atomically) appends a memory blob to a ZIP archive.
+// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
+mz_bool mz_zip_add_mem_to_archive_file_in_place(const char *pZip_filename, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
+
+// Reads a single file from an archive into a heap block.
+// Returns NULL on failure.
+void *mz_zip_extract_archive_file_to_heap(const char *pZip_filename, const char *pArchive_name, size_t *pSize, mz_uint zip_flags);
+
+#endif // #ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
+
+#endif // #ifndef MINIZ_NO_ARCHIVE_APIS
+
+// ------------------- Low-level Decompression API Definitions
+
+// Decompression flags used by tinfl_decompress().
+// TINFL_FLAG_PARSE_ZLIB_HEADER: If set, the input has a valid zlib header and ends with an adler32 checksum (it's a valid zlib stream). Otherwise, the input is a raw deflate stream.
+// TINFL_FLAG_HAS_MORE_INPUT: If set, there are more input bytes available beyond the end of the supplied input buffer. If clear, the input buffer contains all remaining input.
+// TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF: If set, the output buffer is large enough to hold the entire decompressed stream. If clear, the output buffer is at least the size of the dictionary (typically 32KB).
+// TINFL_FLAG_COMPUTE_ADLER32: Force adler-32 checksum computation of the decompressed bytes.
+enum {
+    TINFL_FLAG_PARSE_ZLIB_HEADER = 1,
+    TINFL_FLAG_HAS_MORE_INPUT = 2,
+    TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF = 4,
+    TINFL_FLAG_COMPUTE_ADLER32 = 8
+};
+
+// High level decompression functions:
+// tinfl_decompress_mem_to_heap() decompresses a block in memory to a heap block allocated via malloc().
+// On entry:
+//  pSrc_buf, src_buf_len: Pointer and size of the Deflate or zlib source data to decompress.
+// On return:
+//  Function returns a pointer to the decompressed data, or NULL on failure.
+//  *pOut_len will be set to the decompressed data's size, which could be larger than src_buf_len on uncompressible data.
+//  The caller must call mz_free() on the returned block when it's no longer needed.
+void *tinfl_decompress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
+
+// tinfl_decompress_mem_to_mem() decompresses a block in memory to another block in memory.
+// Returns TINFL_DECOMPRESS_MEM_TO_MEM_FAILED on failure, or the number of bytes written on success.
+#define TINFL_DECOMPRESS_MEM_TO_MEM_FAILED ((size_t)(-1))
+size_t tinfl_decompress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
+
+// tinfl_decompress_mem_to_callback() decompresses a block in memory to an internal 32KB buffer, and a user provided callback function will be called to flush the buffer.
+// Returns 1 on success or 0 on failure.
+typedef int (*tinfl_put_buf_func_ptr)(const void *pBuf, int len, void *pUser);
+int tinfl_decompress_mem_to_callback(const void *pIn_buf, size_t *pIn_buf_size, tinfl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+struct tinfl_decompressor_tag; typedef struct tinfl_decompressor_tag tinfl_decompressor;
+
+// Max size of LZ dictionary.
+#define TINFL_LZ_DICT_SIZE 32768
+
+// Return status.
+typedef enum {
+    TINFL_STATUS_BAD_PARAM = -3,
+    TINFL_STATUS_ADLER32_MISMATCH = -2,
+    TINFL_STATUS_FAILED = -1,
+    TINFL_STATUS_DONE = 0,
+    TINFL_STATUS_NEEDS_MORE_INPUT = 1,
+    TINFL_STATUS_HAS_MORE_OUTPUT = 2
+} tinfl_status;
+
+// Initializes the decompressor to its initial state.
+#define tinfl_init(r) do { (r)->m_state = 0; } MZ_MACRO_END
+#define tinfl_get_adler32(r) (r)->m_check_adler32
+
+// Main low-level decompressor coroutine function. This is the only function actually needed for decompression. All the other functions are just high-level helpers for improved usability.
+// This is a universal API, i.e. it can be used as a building block to build any desired higher level decompression API. In the limit case, it can be called once per every byte input or output.
+tinfl_status tinfl_decompress(tinfl_decompressor *r, const mz_uint8 *pIn_buf_next, size_t *pIn_buf_size, mz_uint8 *pOut_buf_start, mz_uint8 *pOut_buf_next, size_t *pOut_buf_size, const mz_uint32 decomp_flags);
+
+// Internal/private bits follow.
+enum {
+    TINFL_MAX_HUFF_TABLES = 3, TINFL_MAX_HUFF_SYMBOLS_0 = 288, TINFL_MAX_HUFF_SYMBOLS_1 = 32, TINFL_MAX_HUFF_SYMBOLS_2 = 19,
+    TINFL_FAST_LOOKUP_BITS = 10, TINFL_FAST_LOOKUP_SIZE = 1 << TINFL_FAST_LOOKUP_BITS
+};
+
+typedef struct {
+    mz_uint8 m_code_size[TINFL_MAX_HUFF_SYMBOLS_0];
+    mz_int16 m_look_up[TINFL_FAST_LOOKUP_SIZE], m_tree[TINFL_MAX_HUFF_SYMBOLS_0 * 2];
+} tinfl_huff_table;
+
+#if MINIZ_HAS_64BIT_REGISTERS
+#define TINFL_USE_64BIT_BITBUF 1
+#endif
+
+#if TINFL_USE_64BIT_BITBUF
+typedef mz_uint64 tinfl_bit_buf_t;
+#define TINFL_BITBUF_SIZE (64)
+#else
+typedef mz_uint32 tinfl_bit_buf_t;
+#define TINFL_BITBUF_SIZE (32)
+#endif
+
+struct tinfl_decompressor_tag {
+    mz_uint32 m_state, m_num_bits, m_zhdr0, m_zhdr1, m_z_adler32, m_final, m_type, m_check_adler32, m_dist, m_counter, m_num_extra, m_table_sizes[TINFL_MAX_HUFF_TABLES];
+    tinfl_bit_buf_t m_bit_buf;
+    size_t m_dist_from_out_buf_start;
+    tinfl_huff_table m_tables[TINFL_MAX_HUFF_TABLES];
+    mz_uint8 m_raw_header[4], m_len_codes[TINFL_MAX_HUFF_SYMBOLS_0 + TINFL_MAX_HUFF_SYMBOLS_1 + 137];
+};
+
+// ------------------- Low-level Compression API Definitions
+
+// Set TDEFL_LESS_MEMORY to 1 to use less memory (compression will be slightly slower, and raw/dynamic blocks will be output more frequently).
+#define TDEFL_LESS_MEMORY 1
+
+// tdefl_init() compression flags logically OR'd together (low 12 bits contain the max. number of probes per dictionary search):
+// TDEFL_DEFAULT_MAX_PROBES: The compressor defaults to 128 dictionary probes per dictionary search. 0=Huffman only, 1=Huffman+LZ (fastest/crap compression), 4095=Huffman+LZ (slowest/best compression).
+enum {
+    TDEFL_HUFFMAN_ONLY = 0, TDEFL_DEFAULT_MAX_PROBES = 128, TDEFL_MAX_PROBES_MASK = 0xFFF
+};
+
+// TDEFL_WRITE_ZLIB_HEADER: If set, the compressor outputs a zlib header before the deflate data, and the Adler-32 of the source data at the end. Otherwise, you'll get raw deflate data.
+// TDEFL_COMPUTE_ADLER32: Always compute the adler-32 of the input data (even when not writing zlib headers).
+// TDEFL_GREEDY_PARSING_FLAG: Set to use faster greedy parsing, instead of more efficient lazy parsing.
+// TDEFL_NONDETERMINISTIC_PARSING_FLAG: Enable to decrease the compressor's initialization time to the minimum, but the output may vary from run to run given the same input (depending on the contents of memory).
+// TDEFL_RLE_MATCHES: Only look for RLE matches (matches with a distance of 1)
+// TDEFL_FILTER_MATCHES: Discards matches <= 5 chars if enabled.
+// TDEFL_FORCE_ALL_STATIC_BLOCKS: Disable usage of optimized Huffman tables.
+// TDEFL_FORCE_ALL_RAW_BLOCKS: Only use raw (uncompressed) deflate blocks.
+// The low 12 bits are reserved to control the max # of hash probes per dictionary lookup (see TDEFL_MAX_PROBES_MASK).
+enum {
+    TDEFL_WRITE_ZLIB_HEADER             = 0x01000,
+    TDEFL_COMPUTE_ADLER32               = 0x02000,
+    TDEFL_GREEDY_PARSING_FLAG           = 0x04000,
+    TDEFL_NONDETERMINISTIC_PARSING_FLAG = 0x08000,
+    TDEFL_RLE_MATCHES                   = 0x10000,
+    TDEFL_FILTER_MATCHES                = 0x20000,
+    TDEFL_FORCE_ALL_STATIC_BLOCKS       = 0x40000,
+    TDEFL_FORCE_ALL_RAW_BLOCKS          = 0x80000
+};
+
+// High level compression functions:
+// tdefl_compress_mem_to_heap() compresses a block in memory to a heap block allocated via malloc().
+// On entry:
+//  pSrc_buf, src_buf_len: Pointer and size of source block to compress.
+//  flags: The max match finder probes (default is 128) logically OR'd against the above flags. Higher probes are slower but improve compression.
+// On return:
+//  Function returns a pointer to the compressed data, or NULL on failure.
+//  *pOut_len will be set to the compressed data's size, which could be larger than src_buf_len on uncompressible data.
+//  The caller must free() the returned block when it's no longer needed.
+void *tdefl_compress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
+
+// tdefl_compress_mem_to_mem() compresses a block in memory to another block in memory.
+// Returns 0 on failure.
+size_t tdefl_compress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
+
+// Compresses an image to a compressed PNG file in memory.
+// On entry:
+//  pImage, w, h, and num_chans describe the image to compress. num_chans may be 1, 2, 3, or 4.
+//  The image pitch in bytes per scanline will be w*num_chans. The leftmost pixel on the top scanline is stored first in memory.
+//  level may range from [0,10], use MZ_NO_COMPRESSION, MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc. or a decent default is MZ_DEFAULT_LEVEL
+//  If flip is true, the image will be flipped on the Y axis (useful for OpenGL apps).
+// On return:
+//  Function returns a pointer to the compressed data, or NULL on failure.
+//  *pLen_out will be set to the size of the PNG image file.
+//  The caller must mz_free() the returned heap block (which will typically be larger than *pLen_out) when it's no longer needed.
+void *tdefl_write_image_to_png_file_in_memory_ex(const void *pImage, int w, int h, int num_chans, size_t *pLen_out, mz_uint level, mz_bool flip);
+void *tdefl_write_image_to_png_file_in_memory(const void *pImage, int w, int h, int num_chans, size_t *pLen_out);
+
+// Output stream interface. The compressor uses this interface to write compressed data. It'll typically be called TDEFL_OUT_BUF_SIZE at a time.
+typedef mz_bool (*tdefl_put_buf_func_ptr)(const void *pBuf, int len, void *pUser);
+
+// tdefl_compress_mem_to_output() compresses a block to an output stream. The above helpers use this function internally.
+mz_bool tdefl_compress_mem_to_output(const void *pBuf, size_t buf_len, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+enum { TDEFL_MAX_HUFF_TABLES = 3, TDEFL_MAX_HUFF_SYMBOLS_0 = 288, TDEFL_MAX_HUFF_SYMBOLS_1 = 32, TDEFL_MAX_HUFF_SYMBOLS_2 = 19, TDEFL_LZ_DICT_SIZE = 32768, TDEFL_LZ_DICT_SIZE_MASK = TDEFL_LZ_DICT_SIZE - 1, TDEFL_MIN_MATCH_LEN = 3, TDEFL_MAX_MATCH_LEN = 258 };
+
+// TDEFL_OUT_BUF_SIZE MUST be large enough to hold a single entire compressed output block (using static/fixed Huffman codes).
+#if TDEFL_LESS_MEMORY
+enum { TDEFL_LZ_CODE_BUF_SIZE = 24 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 12, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
+#else
+enum { TDEFL_LZ_CODE_BUF_SIZE = 64 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 15, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
+#endif
+
+// The low-level tdefl functions below may be used directly if the above helper functions aren't flexible enough. The low-level functions don't make any heap allocations, unlike the above helper functions.
+typedef enum {
+    TDEFL_STATUS_BAD_PARAM = -2,
+    TDEFL_STATUS_PUT_BUF_FAILED = -1,
+    TDEFL_STATUS_OKAY = 0,
+    TDEFL_STATUS_DONE = 1,
+} tdefl_status;
+
+// Must map to MZ_NO_FLUSH, MZ_SYNC_FLUSH, etc. enums
+typedef enum {
+    TDEFL_NO_FLUSH = 0,
+    TDEFL_SYNC_FLUSH = 2,
+    TDEFL_FULL_FLUSH = 3,
+    TDEFL_FINISH = 4
+} tdefl_flush;
+
+// tdefl's compression state structure.
+typedef struct {
+    tdefl_put_buf_func_ptr m_pPut_buf_func;
+    void *m_pPut_buf_user;
+    mz_uint m_flags, m_max_probes[2];
+    int m_greedy_parsing;
+    mz_uint m_adler32, m_lookahead_pos, m_lookahead_size, m_dict_size;
+    mz_uint8 *m_pLZ_code_buf, *m_pLZ_flags, *m_pOutput_buf, *m_pOutput_buf_end;
+    mz_uint m_num_flags_left, m_total_lz_bytes, m_lz_code_buf_dict_pos, m_bits_in, m_bit_buffer;
+    mz_uint m_saved_match_dist, m_saved_match_len, m_saved_lit, m_output_flush_ofs, m_output_flush_remaining, m_finished, m_block_index, m_wants_to_finish;
+    tdefl_status m_prev_return_status;
+    const void *m_pIn_buf;
+    void *m_pOut_buf;
+    size_t *m_pIn_buf_size, *m_pOut_buf_size;
+    tdefl_flush m_flush;
+    const mz_uint8 *m_pSrc;
+    size_t m_src_buf_left, m_out_buf_ofs;
+    mz_uint8 m_dict[TDEFL_LZ_DICT_SIZE + TDEFL_MAX_MATCH_LEN - 1];
+    mz_uint16 m_huff_count[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+    mz_uint16 m_huff_codes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+    mz_uint8 m_huff_code_sizes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
+    mz_uint8 m_lz_code_buf[TDEFL_LZ_CODE_BUF_SIZE];
+    mz_uint16 m_next[TDEFL_LZ_DICT_SIZE];
+    mz_uint16 m_hash[TDEFL_LZ_HASH_SIZE];
+    mz_uint8 m_output_buf[TDEFL_OUT_BUF_SIZE];
+} tdefl_compressor;
+
+// Initializes the compressor.
+// There is no corresponding deinit() function because the tdefl API's do not dynamically allocate memory.
+// pBut_buf_func: If NULL, output data will be supplied to the specified callback. In this case, the user should call the tdefl_compress_buffer() API for compression.
+// If pBut_buf_func is NULL the user should always call the tdefl_compress() API.
+// flags: See the above enums (TDEFL_HUFFMAN_ONLY, TDEFL_WRITE_ZLIB_HEADER, etc.)
+tdefl_status tdefl_init(tdefl_compressor *d, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
+
+// Compresses a block of data, consuming as much of the specified input buffer as possible, and writing as much compressed data to the specified output buffer as possible.
+tdefl_status tdefl_compress(tdefl_compressor *d, const void *pIn_buf, size_t *pIn_buf_size, void *pOut_buf, size_t *pOut_buf_size, tdefl_flush flush);
+
+// tdefl_compress_buffer() is only usable when the tdefl_init() is called with a non-NULL tdefl_put_buf_func_ptr.
+// tdefl_compress_buffer() always consumes the entire input buffer.
+tdefl_status tdefl_compress_buffer(tdefl_compressor *d, const void *pIn_buf, size_t in_buf_size, tdefl_flush flush);
+
+tdefl_status tdefl_get_prev_return_status(tdefl_compressor *d);
+mz_uint32 tdefl_get_adler32(tdefl_compressor *d);
+
+// Can't use tdefl_create_comp_flags_from_zip_params if MINIZ_NO_ZLIB_APIS isn't defined, because it uses some of its macros.
+#ifndef MINIZ_NO_ZLIB_APIS
+// Create tdefl_compress() flags given zlib-style compression parameters.
+// level may range from [0,10] (where 10 is absolute max compression, but may be much slower on some files)
+// window_bits may be -15 (raw deflate) or 15 (zlib)
+// strategy may be either MZ_DEFAULT_STRATEGY, MZ_FILTERED, MZ_HUFFMAN_ONLY, MZ_RLE, or MZ_FIXED
+mz_uint tdefl_create_comp_flags_from_zip_params(int level, int window_bits, int strategy);
+#endif // #ifndef MINIZ_NO_ZLIB_APIS
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/opi_flash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/opi_flash.h
new file mode 100644
index 00000000000..8976e7b53e7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/opi_flash.h
@@ -0,0 +1,323 @@
+/*
+ * copyright (c) Espressif System 2019
+ *
+ */
+
+#ifndef _ROM_OPI_FLASH_H_
+#define _ROM_OPI_FLASH_H_
+#include <stdio.h>
+#include <string.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "spi_flash.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+typedef struct {
+    uint8_t mode;
+    uint8_t cmd_bit_len;
+    uint16_t cmd;
+    uint32_t addr;
+    uint8_t addr_bit_len;
+    uint8_t dummy_bit_len;
+    uint8_t data_bit_len;
+    uint8_t cs_sel: 4;
+    uint8_t is_pe: 4;
+} esp_rom_opiflash_cmd_t;
+
+typedef struct {
+    uint8_t addr_bit_len;
+    uint8_t dummy_bit_len;
+    uint16_t cmd;
+    uint8_t cmd_bit_len;
+    uint8_t var_dummy_en;
+} esp_rom_opiflash_spi0rd_t;
+
+typedef struct {
+    esp_rom_opiflash_cmd_t rdid;
+    esp_rom_opiflash_cmd_t rdsr;
+    esp_rom_opiflash_cmd_t wren;
+    esp_rom_opiflash_cmd_t se;
+    esp_rom_opiflash_cmd_t be64k;
+    esp_rom_opiflash_cmd_t read;
+    esp_rom_opiflash_cmd_t pp;
+    esp_rom_opiflash_spi0rd_t cache_rd_cmd;
+} esp_rom_opiflash_def_t;
+
+typedef struct {
+    uint16_t cmd;                /*!< Command value */
+    uint16_t cmdBitLen;          /*!< Command byte length*/
+    uint32_t *addr;              /*!< Point to address value*/
+    uint32_t addrBitLen;         /*!< Address byte length*/
+    uint32_t *txData;            /*!< Point to send data buffer*/
+    uint32_t txDataBitLen;       /*!< Send data byte length.*/
+    uint32_t *rxData;            /*!< Point to recevie data buffer*/
+    uint32_t rxDataBitLen;       /*!< Recevie Data byte length.*/
+    uint32_t dummyBitLen;
+} esp_rom_spi_cmd_t;
+
+#define ESP_ROM_OPIFLASH_MUX_TAKE()
+#define ESP_ROM_OPIFLASH_MUX_GIVE()
+#define ESP_ROM_OPIFLASH_SEL_CS0     (BIT(0))
+#define ESP_ROM_OPIFLASH_SEL_CS1     (BIT(1))
+
+// Definition of MX25UM25645G Octa Flash
+// SPI status register
+#define ESP_ROM_SPIFLASH_BUSY_FLAG     BIT0
+#define ESP_ROM_SPIFLASH_WRENABLE_FLAG BIT1
+#define ESP_ROM_SPIFLASH_BP0           BIT2
+#define ESP_ROM_SPIFLASH_BP1           BIT3
+#define ESP_ROM_SPIFLASH_BP2           BIT4
+#define ESP_ROM_SPIFLASH_WR_PROTECT    (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
+#define ESP_ROM_SPIFLASH_QE            BIT9
+
+#define FLASH_OP_MODE_RDCMD_DOUT       0x3B
+#define ESP_ROM_FLASH_SECTOR_SIZE      0x1000
+#define ESP_ROM_FLASH_BLOCK_SIZE_64K   0x10000
+#define ESP_ROM_FLASH_PAGE_SIZE        256
+
+// FLASH commands
+#define ROM_FLASH_CMD_RDID             0x9F
+#define ROM_FLASH_CMD_WRSR             0x01
+#define ROM_FLASH_CMD_WRSR2            0x31 /* Not all SPI flash uses this command */
+#define ROM_FLASH_CMD_WREN             0x06
+#define ROM_FLASH_CMD_WRDI             0x04
+#define ROM_FLASH_CMD_RDSR             0x05
+#define ROM_FLASH_CMD_RDSR2            0x35 /* Not all SPI flash uses this command */
+#define ROM_FLASH_CMD_ERASE_SEC        0x20
+#define ROM_FLASH_CMD_ERASE_BLK_32K    0x52
+#define ROM_FLASH_CMD_ERASE_BLK_64K    0xD8
+#define ROM_FLASH_CMD_OTPEN            0x3A /* Enable OTP mode, not all SPI flash uses this command */
+#define ROM_FLASH_CMD_RSTEN            0x66
+#define ROM_FLASH_CMD_RST              0x99
+
+#define ROM_FLASH_CMD_SE4B             0x21
+#define ROM_FLASH_CMD_SE4B_OCT         0xDE21
+#define ROM_FLASH_CMD_BE4B             0xDC
+#define ROM_FLASH_CMD_BE4B_OCT         0x23DC
+#define ROM_FLASH_CMD_RSTEN_OCT        0x9966
+#define ROM_FLASH_CMD_RST_OCT          0x6699
+
+#define ROM_FLASH_CMD_FSTRD4B_STR      0x13EC
+#define ROM_FLASH_CMD_FSTRD4B_DTR      0x11EE
+#define ROM_FLASH_CMD_FSTRD4B          0x0C
+#define ROM_FLASH_CMD_PP4B             0x12
+#define ROM_FLASH_CMD_PP4B_OCT         0xED12
+
+#define ROM_FLASH_CMD_RDID_OCT         0x609F
+#define ROM_FLASH_CMD_WREN_OCT         0xF906
+#define ROM_FLASH_CMD_RDSR_OCT         0xFA05
+#define ROM_FLASH_CMD_RDCR2            0x71
+#define ROM_FLASH_CMD_RDCR2_OCT        0x8E71
+#define ROM_FLASH_CMD_WRCR2            0x72
+#define ROM_FLASH_CMD_WRCR2_OCT        0x8D72
+
+// Definitions for GigaDevice GD25LX256E Flash
+#define ROM_FLASH_CMD_RDFSR_GD            0x70
+#define ROM_FLASH_CMD_RD_GD               0x03
+#define ROM_FLASH_CMD_RD4B_GD             0x13
+#define ROM_FLASH_CMD_FSTRD_GD            0x0B
+#define ROM_FLASH_CMD_FSTRD4B_GD          0x0C
+#define ROM_FLASH_CMD_FSTRD_OOUT_GD       0x8B
+#define ROM_FLASH_CMD_FSTRD4B_OOUT_GD     0x7C
+#define ROM_FLASH_CMD_FSTRD_OIOSTR_GD     0xCB
+#define ROM_FLASH_CMD_FSTRD4B_OIOSTR_GD   0xCC
+#define ROM_FLASH_CMD_FSTRD4B_OIODTR_GD   0xFD
+
+#define ROM_FLASH_CMD_PP_GD               0x02
+#define ROM_FLASH_CMD_PP4B_GD             0x12
+#define ROM_FLASH_CMD_PP_OOUT_GD          0x82
+#define ROM_FLASH_CMD_PP4B_OOUT_GD        0x84
+#define ROM_FLASH_CMD_PP_OIO_GD           0xC2
+#define ROM_FLASH_CMD_PP4B_OIOSTR_GD      0x8E
+
+#define ROM_FLASH_CMD_SE_GD               0x20
+#define ROM_FLASH_CMD_SE4B_GD             0x21
+#define ROM_FLASH_CMD_BE32K_GD            0x52
+#define ROM_FLASH_CMD_BE32K4B_GD          0x5C
+#define ROM_FLASH_CMD_BE64K_GD            0xD8
+#define ROM_FLASH_CMD_BE64K4B_GD          0xDC
+
+#define ROM_FLASH_CMD_EN4B_GD             0xB7
+#define ROM_FLASH_CMD_DIS4B_GD            0xE9
+
+extern const esp_rom_opiflash_def_t *rom_opiflash_cmd_def;
+
+/**
+ * @brief init legacy driver for Octal Flash
+ */
+void esp_rom_opiflash_legacy_driver_init(const esp_rom_opiflash_def_t *flash_cmd_def);
+
+// spi user mode command config
+/**
+ * @brief Config the spi user command
+ * @param spi_num spi port
+ * @param pcmd pointer to accept the spi command struct
+ */
+void esp_rom_spi_cmd_config(int spi_num, esp_rom_spi_cmd_t* pcmd);
+
+/**
+ * @brief Start a spi user command sequence
+ * @param spi_num spi port
+ * @param rx_buf buffer pointer to receive data
+ * @param rx_len receive data length in byte
+ * @param cs_en_mask decide which cs to use, 0 for cs0, 1 for cs1
+ * @param is_write_erase to indicate whether this is a write or erase operation, since the CPU would check permission
+ */
+void esp_rom_spi_cmd_start(int spi_num, uint8_t* rx_buf, uint16_t rx_len, uint8_t cs_en_mask, bool is_write_erase);
+
+/**
+ * @brief Config opi flash pads according to efuse settings.
+ */
+void esp_rom_opiflash_pin_config(void);
+
+// set SPI read/write mode
+/**
+ * @brief Set SPI operation mode
+ * @param spi_num spi port
+ * @param mode Flash Read Mode
+ */
+void esp_rom_spi_set_op_mode(int spi_num, esp_rom_spiflash_read_mode_t mode);
+
+/**
+ * @brief Set data swap mode in DTR(DDR) mode
+ * @param spi_num spi port
+ * @param wr_swap to decide whether to swap fifo data in dtr write operation
+ * @param rd_swap to decide whether to swap fifo data in dtr read operation
+ */
+void esp_rom_spi_set_dtr_swap_mode(int spi, bool wr_swap, bool rd_swap);
+
+
+/**
+ * @brief to send reset command in spi/opi-str/opi-dtr mode(for MX25UM25645G)
+ * @param spi_num spi port
+ */
+void esp_rom_opiflash_mode_reset(int spi_num);
+
+/**
+ * @brief To execute a flash operation command
+ * @param spi_num spi port
+ * @param mode Flash Read Mode
+ * @param cmd data to send in command field
+ * @param cmd_bit_len bit length of command field
+ * @param addr data to send in address field
+ * @param addr_bit_len bit length of address field
+ * @param dummy_bits bit length of dummy field
+ * @param mosi_data data buffer to be sent in mosi field
+ * @param mosi_bit_len bit length of data buffer to be sent in mosi field
+ * @param miso_data data buffer to accept data in miso field
+ * @param miso_bit_len bit length of data buffer to accept data in miso field
+ * @param cs_mark decide which cs pin to use. 0: cs0, 1: cs1
+ * @param is_write_erase_operation to indicate whether this a write or erase flash operation
+ */
+void esp_rom_opiflash_exec_cmd(int spi_num, esp_rom_spiflash_read_mode_t mode,
+                                  uint32_t cmd, int cmd_bit_len,
+                                  uint32_t addr, int addr_bit_len,
+                                  int dummy_bits,
+                                  uint8_t* mosi_data, int mosi_bit_len,
+                                  uint8_t* miso_data, int miso_bit_len,
+                                  uint32_t cs_mask,
+                                  bool is_write_erase_operation);
+
+/**
+ * @brief send reset command to opi flash
+ * @param spi_num spi port
+ * @param mode Flash Operation Mode
+ */
+void esp_rom_opiflash_soft_reset(int spi_num, esp_rom_spiflash_read_mode_t mode);
+
+
+/**
+ * @brief to read opi flash ID
+ * @note command format would be defined in initialization
+ * @param[out] out_id buffer to accept id
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_read_id(uint8_t *out_id);
+
+/**
+ * @brief to read opi flash status register
+ * @note command format would be defined in initialization
+ * @return opi flash status value
+ */
+uint8_t esp_rom_opiflash_rdsr(void);
+
+/**
+ * @brief wait opi flash status register to be idle
+ * @note command format would be defined in initialization
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_wait_idle(void);
+
+/**
+ * @brief to erase flash sector
+ * @note command format would be defined in initialization
+ * @param sector_num the sector to be erased
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_erase_sector(uint32_t sector_num);
+
+/**
+ * @brief to erase flash block
+ * @note command format would be defined in initialization
+ * @param block_num the block to be erased
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_erase_block_64k(uint32_t block_num);
+
+/**
+ * @brief to erase a flash area define by start address and length
+ * @note command format would be defined in initialization
+ * @param start_addr the start address to be erased
+ * @param area_len the erea length to be erased
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_erase_area(uint32_t start_addr, uint32_t area_len);
+
+/**
+ * @brief to read data from opi flash
+ * @note command format would be defined in initialization
+ * @param flash_addr flash address to read data from
+ * @param data_addr data buffer to accept the data
+ * @param len data length to be read
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_read(uint32_t flash_addr, void *data_addr, int len);
+
+/**
+ * @brief to write data to opi flash
+ * @note command format would be defined in initialization
+ * @param flash_addr flash address to write data to
+ * @param data_addr data buffer to write to flash
+ * @param len data length to write
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_write(uint32_t flash_addr, const uint32_t *data_addr, int len);
+
+/**
+ * @brief send WREN command
+ * @note command format would be defined in initialization
+ * @param arg not used, set to NULL
+ * @return flash operation result
+ */
+esp_rom_spiflash_result_t esp_rom_opiflash_wren(void* arg);
+
+/**
+ * @brief to configure SPI0 read flash command format for cache
+ * @note command format would be defined in initialization
+ *
+ */
+void esp_rom_opiflash_cache_mode_config(esp_rom_spiflash_read_mode_t mode, const esp_rom_opiflash_spi0rd_t *cache);
+
+esp_rom_spiflash_result_t esp_rom_opiflash_read_raw(uint32_t flash_addr, uint8_t* buf, int len);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/rom_layout.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/rom_layout.h
new file mode 100644
index 00000000000..289fbd60baf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/rom_layout.h
@@ -0,0 +1,84 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SUPPORT_WIFI 1
+#define SUPPORT_BTDM 1
+/* Structure and functions for returning ROM global layout
+ *
+ * This is for address symbols defined in the linker script, which may change during ECOs.
+ */
+typedef struct {
+    void *dram0_stack_shared_mem_start;
+    void *dram0_rtos_reserved_start;
+    void *stack_sentry;
+    void *stack;
+    void *stack_sentry_app;
+    void *stack_app;
+
+    /* BTDM data */
+    void *data_start_btdm;
+    void *data_end_btdm;
+    void *bss_start_btdm;
+    void *bss_end_btdm;
+    void *data_start_btdm_rom;
+    void *data_end_btdm_rom;
+    void *data_start_interface_btdm;
+    void *data_end_interface_btdm;
+    void *bss_start_interface_btdm;
+    void *bss_end_interface_btdm;
+
+    /* Other DRAM ranges */
+#if SUPPORT_BTDM || SUPPORT_WIFI
+    void *dram_start_phyrom;
+    void *dram_end_phyrom;
+#endif
+#if SUPPORT_WIFI
+    void *dram_start_coexist;
+    void *dram_end_coexist;
+    void *dram_start_net80211;
+    void *dram_end_net80211;
+    void *dram_start_pp;
+    void *dram_end_pp;
+    void *data_start_interface_coexist;
+    void *data_end_interface_coexist;
+    void *bss_start_interface_coexist;
+    void *bss_end_interface_coexist;
+    void *data_start_interface_net80211;
+    void *data_end_interface_net80211;
+    void *bss_start_interface_net80211;
+    void *bss_end_interface_net80211;
+    void *data_start_interface_pp;
+    void *data_end_interface_pp;
+    void *bss_start_interface_pp;
+    void *bss_end_interface_pp;
+#endif
+    void *dram_start_usbdev_rom;
+    void *dram_end_usbdev_rom;
+    void *dram_start_uart_rom;
+    void *dram_end_uart_rom;
+
+} ets_rom_layout_t;
+
+extern const ets_rom_layout_t * const ets_rom_layout_p;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/rsa_pss.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/rsa_pss.h
new file mode 100644
index 00000000000..71ae5892263
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/rsa_pss.h
@@ -0,0 +1,43 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ETS_SIG_LEN 384   /* Bytes */
+#define ETS_DIGEST_LEN 32 /* SHA-256, bytes */
+
+typedef struct {
+    uint8_t n[384]; /* Public key modulus */
+    uint32_t e;     /* Public key exponent */
+    uint8_t rinv[384];
+    uint32_t mdash;
+} ets_rsa_pubkey_t;
+
+bool ets_rsa_pss_verify(const ets_rsa_pubkey_t *key, const uint8_t *sig, const uint8_t *digest, uint8_t *verified_digest);
+
+void ets_mgf1_sha256(const uint8_t *mgfSeed, size_t seedLen, size_t maskLen, uint8_t *mask);
+
+bool ets_emsa_pss_verify(const uint8_t *encoded_message, const uint8_t *mhash);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/rtc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/rtc.h
new file mode 100644
index 00000000000..d395ce3976e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/rtc.h
@@ -0,0 +1,243 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup rtc_apis, rtc registers and memory related apis
+  * @brief rtc apis
+  */
+
+/** @addtogroup rtc_apis
+  * @{
+  */
+
+/**************************************************************************************
+  *                                       Note:                                       *
+  *       Some Rtc memory and registers are used, in ROM or in internal library.      *
+  *          Please do not use reserved or used rtc memory or registers.              *
+  *                                                                                   *
+  *************************************************************************************
+  *                          RTC  Memory & Store Register usage
+  *************************************************************************************
+  *     rtc memory addr         type    size            usage
+  *     0x3f421000(0x50000000)  Slow    SIZE_CP         Co-Processor code/Reset Entry
+  *     0x3f421000+SIZE_CP      Slow    8192-SIZE_CP
+  *
+  *     0x3ff80000(0x40070000)  Fast    8192            deep sleep entry code
+  *
+  *************************************************************************************
+  *     RTC store registers     usage
+  *     RTC_CNTL_STORE0_REG     Reserved
+  *     RTC_CNTL_STORE1_REG     RTC_SLOW_CLK calibration value
+  *     RTC_CNTL_STORE2_REG     Boot time, low word
+  *     RTC_CNTL_STORE3_REG     Boot time, high word
+  *     RTC_CNTL_STORE4_REG     External XTAL frequency
+  *     RTC_CNTL_STORE5_REG     FAST_RTC_MEMORY_LENGTH
+  *     RTC_CNTL_STORE6_REG     FAST_RTC_MEMORY_ENTRY
+  *     RTC_CNTL_STORE7_REG     FAST_RTC_MEMORY_CRC
+  *************************************************************************************
+  */
+
+#define RTC_SLOW_CLK_CAL_REG    RTC_CNTL_STORE1_REG
+#define RTC_BOOT_TIME_LOW_REG   RTC_CNTL_STORE2_REG
+#define RTC_BOOT_TIME_HIGH_REG  RTC_CNTL_STORE3_REG
+#define RTC_XTAL_FREQ_REG       RTC_CNTL_STORE4_REG
+#define RTC_ENTRY_LENGTH_REG    RTC_CNTL_STORE5_REG
+#define RTC_ENTRY_ADDR_REG      RTC_CNTL_STORE6_REG
+#define RTC_RESET_CAUSE_REG     RTC_CNTL_STORE6_REG
+#define RTC_MEMORY_CRC_REG      RTC_CNTL_STORE7_REG
+
+#define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
+
+typedef enum {
+    AWAKE = 0,             //<CPU ON
+    LIGHT_SLEEP = BIT0,    //CPU waiti, PLL ON.  We don't need explicitly set this mode.
+    DEEP_SLEEP  = BIT1     //CPU OFF, PLL OFF, only specific timer could wake up
+} SLEEP_MODE;
+
+typedef enum {
+    NO_MEAN                =  0,
+    POWERON_RESET          =  1,    /**<1, Vbat power on reset*/
+    RTC_SW_SYS_RESET       =  3,    /**<3, Software reset digital core*/
+    DEEPSLEEP_RESET        =  5,    /**<5, Deep Sleep reset digital core*/
+    TG0WDT_SYS_RESET       =  7,    /**<7, Timer Group0 Watch dog reset digital core*/
+    TG1WDT_SYS_RESET       =  8,    /**<8, Timer Group1 Watch dog reset digital core*/
+    RTCWDT_SYS_RESET       =  9,    /**<9, RTC Watch dog Reset digital core*/
+    INTRUSION_RESET        = 10,    /**<10, Instrusion tested to reset CPU*/
+    TG0WDT_CPU_RESET       = 11,    /**<11, Time Group0 reset CPU*/
+    RTC_SW_CPU_RESET       = 12,    /**<12, Software reset CPU*/
+    RTCWDT_CPU_RESET       = 13,    /**<13, RTC Watch dog Reset CPU*/
+    RTCWDT_BROWN_OUT_RESET = 15,    /**<15, Reset when the vdd voltage is not stable*/
+    RTCWDT_RTC_RESET       = 16,    /**<16, RTC Watch dog reset digital core and rtc module*/
+    TG1WDT_CPU_RESET       = 17,    /**<17, Time Group1 reset CPU*/
+    SUPER_WDT_RESET        = 18,    /**<18, super watchdog reset digital core and rtc module*/
+    GLITCH_RTC_RESET       = 19,    /**<19, glitch reset digital core and rtc module*/
+    EFUSE_RESET            = 20,    /**<20, efuse reset digital core*/
+    USB_UART_CHIP_RESET    = 21,    /**<21, usb uart reset digital core */
+    USB_JTAG_CHIP_RESET    = 22,    /**<22, usb jtag reset digital core */
+    POWER_GLITCH_RESET     = 23,    /**<23, power glitch reset digital core and rtc module*/
+} RESET_REASON;
+
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESET != RESET_REASON_CPU0_MWDT1");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
+_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
+_Static_assert((soc_reset_reason_t)USB_UART_CHIP_RESET == RESET_REASON_CORE_USB_UART, "USB_UART_CHIP_RESET != RESET_REASON_CORE_USB_UART");
+_Static_assert((soc_reset_reason_t)USB_JTAG_CHIP_RESET == RESET_REASON_CORE_USB_JTAG, "USB_JTAG_CHIP_RESET != RESET_REASON_CORE_USB_JTAG");
+_Static_assert((soc_reset_reason_t)POWER_GLITCH_RESET == RESET_REASON_CORE_PWR_GLITCH, "POWER_GLITCH_RESET != RESET_REASON_CORE_PWR_GLITCH");
+
+typedef enum {
+    NO_SLEEP        = 0,
+    EXT_EVENT0_TRIG = BIT0,
+    EXT_EVENT1_TRIG = BIT1,
+    GPIO_TRIG       = BIT2,
+    TIMER_EXPIRE    = BIT3,
+    SDIO_TRIG       = BIT4,
+    MAC_TRIG        = BIT5,
+    UART0_TRIG      = BIT6,
+    UART1_TRIG      = BIT7,
+    TOUCH_TRIG      = BIT8,
+    SAR_TRIG        = BIT9,
+    BT_TRIG         = BIT10,
+    RISCV_TRIG      = BIT11,
+    XTAL_DEAD_TRIG  = BIT12,
+    RISCV_TRAP_TRIG = BIT13,
+    USB_TRIG        = BIT14
+} WAKEUP_REASON;
+
+typedef enum {
+    DISEN_WAKEUP       = NO_SLEEP,
+    EXT_EVENT0_TRIG_EN = EXT_EVENT0_TRIG,
+    EXT_EVENT1_TRIG_EN = EXT_EVENT1_TRIG,
+    GPIO_TRIG_EN       = GPIO_TRIG,
+    TIMER_EXPIRE_EN    = TIMER_EXPIRE,
+    SDIO_TRIG_EN       = SDIO_TRIG,
+    MAC_TRIG_EN        = MAC_TRIG,
+    UART0_TRIG_EN      = UART0_TRIG,
+    UART1_TRIG_EN      = UART1_TRIG,
+    TOUCH_TRIG_EN      = TOUCH_TRIG,
+    SAR_TRIG_EN        = SAR_TRIG,
+    BT_TRIG_EN         = BT_TRIG,
+    RISCV_TRIG_EN      = RISCV_TRIG,
+    XTAL_DEAD_TRIG_EN  = XTAL_DEAD_TRIG,
+    RISCV_TRAP_TRIG_EN = RISCV_TRAP_TRIG,
+    USB_TRIG_EN        = USB_TRIG
+} WAKEUP_ENABLE;
+
+/**
+  * @brief  Get the reset reason for CPU.
+  *
+  * @param  int cpu_no : CPU no.
+  *
+  * @return RESET_REASON
+  */
+RESET_REASON rtc_get_reset_reason(int cpu_no);
+
+/**
+  * @brief  Get the wakeup cause for CPU.
+  *
+  * @param  int cpu_no : CPU no.
+  *
+  * @return WAKEUP_REASON
+  */
+WAKEUP_REASON rtc_get_wakeup_cause(void);
+
+typedef void (* esp_rom_wake_func_t)(void);
+
+/**
+  * @brief Read stored RTC wake function address
+  *
+  * Returns pointer to wake address if a value is set in RTC registers, and stored length & CRC all valid.
+  *
+  * @param  None
+  *
+  * @return esp_rom_wake_func_t : Returns pointer to wake address if a value is set in RTC registers
+  */
+esp_rom_wake_func_t esp_rom_get_rtc_wake_addr(void);
+
+/**
+  * @brief Store new RTC wake function address
+  *
+  * Set a new RTC wake address function. If a non-NULL function pointer is set then the function
+  * memory is calculated and stored also.
+  *
+  * @param entry_addr Address of function. If NULL, length is ignored and all registers are cleared to 0.
+  * @param length of function in RTC fast memory. cannot be larger than RTC Fast memory size.
+  *
+  * @return None
+  */
+void esp_rom_set_rtc_wake_addr(esp_rom_wake_func_t entry_addr, size_t length);
+
+/**
+  * @brief Suppress ROM log by setting specific RTC control register.
+  * @note This is not a permanent disable of ROM logging since the RTC register can not retain after chip reset.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+static inline void rtc_suppress_rom_log(void)
+{
+    /* To disable logging in the ROM, only the least significant bit of the register is used,
+     * but since this register is also used to store the frequency of the main crystal (RTC_XTAL_FREQ_REG),
+     * you need to write to this register in the same format.
+     * Namely, the upper 16 bits and lower should be the same.
+     */
+    REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
+}
+
+/**
+  * @brief Software Reset digital core.
+  *
+  * It is not recommended to use this function in esp-idf, use
+  * esp_restart() instead.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void software_reset(void);
+
+/**
+  * @brief Software Reset digital core.
+  *
+  * It is not recommended to use this function in esp-idf, use
+  * esp_restart() instead.
+  *
+  * @param  int cpu_no : The CPU to reset, 0 for PRO CPU, 1 for APP CPU.
+  *
+  * @return None
+  */
+void software_reset_cpu(int cpu_no);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/secure_boot.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/secure_boot.h
new file mode 100644
index 00000000000..a372517b7a1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/secure_boot.h
@@ -0,0 +1,104 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "ets_sys.h"
+#include "rsa_pss.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
+typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
+typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
+
+/* Anti-FI measure: use full words for success/fail, instead of
+   0/non-zero
+*/
+typedef enum {
+    SB_SUCCESS = 0x3A5A5AA5,
+    SB_FAILED = 0x7533885E,
+} secure_boot_status_t;
+
+/* Verify bootloader image (reconfigures cache to map,
+ loads trusted key digests from efuse)
+
+ If allow_key_revoke is true and aggressive revoke efuse is set,
+ any failed signature has its associated key revoked in efuse.
+
+ If result is ETS_OK, the "simple hash" of the bootloader
+ is copied into verified_hash.
+*/
+int ets_secure_boot_verify_bootloader(uint8_t *verified_hash, bool allow_key_revoke);
+
+/* Verify bootloader image (reconfigures cache to map), with
+   key digests provided as parameters.)
+
+   Can be used to verify secure boot status before enabling
+   secure boot permanently.
+
+   If result is ETS_OK, the "simple hash" of the bootloader is
+   copied into verified_hash.
+*/
+secure_boot_status_t ets_secure_boot_verify_bootloader_with_keys(uint8_t *verified_hash, const ets_secure_boot_key_digests_t *trusted_keys, bool stage_load);
+
+/* Verify supplied signature against supplied digest, using
+   supplied trusted key digests.
+
+   Doesn't reconfigure cache or any other hardware access.
+*/
+secure_boot_status_t ets_secure_boot_verify_signature(const ets_secure_boot_signature_t *sig, const uint8_t *image_digest, const ets_secure_boot_key_digests_t *trusted_keys, uint8_t *verified_digest);
+
+/* Read key digests from efuse. Any revoked/missing digests will be
+   marked as NULL
+
+   Returns 0 if at least one valid digest was found.
+*/
+ETS_STATUS ets_secure_boot_read_key_digests(ets_secure_boot_key_digests_t *trusted_keys);
+
+#define CRC_SIGN_BLOCK_LEN 1196
+#define SIG_BLOCK_PADDING 4096
+#define ETS_SECURE_BOOT_V2_SIGNATURE_MAGIC 0xE7
+
+/* Secure Boot V2 signature block (up to 3 can be appended) */
+struct ets_secure_boot_sig_block {
+    uint8_t magic_byte;
+    uint8_t version;
+    uint8_t _reserved1;
+    uint8_t _reserved2;
+    uint8_t image_digest[32];
+    ets_rsa_pubkey_t key;
+    uint8_t signature[384];
+    uint32_t block_crc;
+    uint8_t _padding[16];
+};
+
+_Static_assert(sizeof(ets_secure_boot_sig_block_t) == 1216, "ets_secure_boot_sig_block_t should occupy 1216 Bytes in memory");
+
+#define SECURE_BOOT_NUM_BLOCKS 3
+
+/* V2 Secure boot signature sector (up to 3 blocks) */
+struct ets_secure_boot_signature {
+    ets_secure_boot_sig_block_t block[SECURE_BOOT_NUM_BLOCKS];
+    uint8_t _padding[4096 - (sizeof(ets_secure_boot_sig_block_t) * SECURE_BOOT_NUM_BLOCKS)];
+};
+
+_Static_assert(sizeof(ets_secure_boot_signature_t) == 4096, "ets_secure_boot_signature_t should occupy 4096 Bytes in memory");
+
+#define MAX_KEY_DIGESTS 3
+
+struct ets_secure_boot_key_digests {
+    const void *key_digests[MAX_KEY_DIGESTS];
+    bool allow_key_revoke;
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/sha.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/sha.h
new file mode 100644
index 00000000000..4d8fe901955
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/sha.h
@@ -0,0 +1,63 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "ets_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    SHA1 = 0,
+    SHA2_224,
+    SHA2_256,
+    SHA2_384,
+    SHA2_512,
+    SHA2_512224,
+    SHA2_512256,
+    SHA2_512T,
+    SHA_TYPE_MAX
+} SHA_TYPE;
+
+typedef struct SHAContext {
+    bool start;
+    bool in_hardware;               // Is this context currently in peripheral? Needs to be manually cleared if multiple SHAs are interleaved
+    SHA_TYPE type;
+    uint32_t state[16];             // For SHA1/SHA224/SHA256, used 8, other used 16
+    unsigned char buffer[128];      // For SHA1/SHA224/SHA256, used 64, other used 128
+    uint32_t total_bits[4];
+} SHA_CTX;
+
+void ets_sha_enable(void);
+
+void ets_sha_disable(void);
+
+ets_status_t ets_sha_init(SHA_CTX *ctx, SHA_TYPE type);
+
+ets_status_t ets_sha_starts(SHA_CTX *ctx, uint16_t sha512_t);
+
+void ets_sha_get_state(SHA_CTX *ctx);
+
+void ets_sha_process(SHA_CTX *ctx, const unsigned char *input);
+
+void ets_sha_update(SHA_CTX *ctx, const unsigned char *input, uint32_t input_bytes, bool update_ctx);
+
+ets_status_t ets_sha_finish(SHA_CTX *ctx, unsigned char *output);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/spi_flash.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/spi_flash.h
new file mode 100644
index 00000000000..293306c9b97
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/spi_flash.h
@@ -0,0 +1,596 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup spi_flash_apis, spi flash operation related apis
+  * @brief spi_flash apis
+  */
+
+/** @addtogroup spi_flash_apis
+  * @{
+  */
+
+/*************************************************************
+ *                            Note
+ *************************************************************
+ * 1. ESP32 chip have 4 SPI slave/master, however, SPI0 is
+ *    used as an SPI master to access Flash and ext-SRAM by
+ *    Cache module. It will support Decryto read for Flash,
+ *    read/write for ext-SRAM. And SPI1 is also used as an
+ *    SPI master for Flash read/write and ext-SRAM read/write.
+ *    It will support Encrypto write for Flash.
+ * 2. As an SPI master, SPI support Highest clock to 80M,
+ *    however, Flash with 80M Clock should be configured
+ *    for different Flash chips. If you want to use 80M
+ *    clock We should use the SPI that is certified by
+ *    Espressif. However, the certification is not started
+ *    at the time, so please use 40M clock at the moment.
+ * 3. SPI Flash can use 2 lines or 4 lines mode. If you
+ *    use 2 lines mode, you can save two pad SPIHD and
+ *    SPIWP for gpio. ESP32 support configured SPI pad for
+ *    Flash, the configuration is stored in efuse and flash.
+ *    However, the configurations of pads should be certified
+ *    by Espressif. If you use this function, please use 40M
+ *    clock at the moment.
+ * 4. ESP32 support to use Common SPI command to configure
+ *    Flash to QIO mode, if you failed to configure with fix
+ *    command. With Common SPI Command, ESP32 can also provide
+ *    a way to use same Common SPI command groups on different
+ *    Flash chips.
+ * 5. This functions are not protected by packeting, Please use the
+ *************************************************************
+ */
+
+#define PERIPHS_SPI_FLASH_CMD                 SPI_MEM_CMD_REG(1)
+#define PERIPHS_SPI_FLASH_ADDR                SPI_MEM_ADDR_REG(1)
+#define PERIPHS_SPI_FLASH_CTRL                SPI_MEM_CTRL_REG(1)
+#define PERIPHS_SPI_FLASH_CTRL1               SPI_MEM_CTRL1_REG(1)
+#define PERIPHS_SPI_FLASH_STATUS              SPI_MEM_RD_STATUS_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG              SPI_MEM_USER_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG1             SPI_MEM_USER1_REG(1)
+#define PERIPHS_SPI_FLASH_USRREG2             SPI_MEM_USER2_REG(1)
+#define PERIPHS_SPI_FLASH_C0                  SPI_MEM_W0_REG(1)
+#define PERIPHS_SPI_FLASH_C1                  SPI_MEM_W1_REG(1)
+#define PERIPHS_SPI_FLASH_C2                  SPI_MEM_W2_REG(1)
+#define PERIPHS_SPI_FLASH_C3                  SPI_MEM_W3_REG(1)
+#define PERIPHS_SPI_FLASH_C4                  SPI_MEM_W4_REG(1)
+#define PERIPHS_SPI_FLASH_C5                  SPI_MEM_W5_REG(1)
+#define PERIPHS_SPI_FLASH_C6                  SPI_MEM_W6_REG(1)
+#define PERIPHS_SPI_FLASH_C7                  SPI_MEM_W7_REG(1)
+#define PERIPHS_SPI_FLASH_TX_CRC              SPI_MEM_TX_CRC_REG(1)
+
+#define SPI0_R_QIO_DUMMY_CYCLELEN             5
+#define SPI0_R_QIO_ADDR_BITSLEN               23
+#define SPI0_R_FAST_DUMMY_CYCLELEN            7
+#define SPI0_R_DIO_DUMMY_CYCLELEN             3
+#define SPI0_R_FAST_ADDR_BITSLEN              23
+#define SPI0_R_SIO_ADDR_BITSLEN               23
+
+#define SPI1_R_QIO_DUMMY_CYCLELEN             5
+#define SPI1_R_QIO_ADDR_BITSLEN               23
+#define SPI1_R_FAST_DUMMY_CYCLELEN            7
+#define SPI1_R_DIO_DUMMY_CYCLELEN             3
+#define SPI1_R_DIO_ADDR_BITSLEN               23
+#define SPI1_R_FAST_ADDR_BITSLEN              23
+#define SPI1_R_SIO_ADDR_BITSLEN               23
+
+#define ESP_ROM_SPIFLASH_W_SIO_ADDR_BITSLEN   23
+
+#define ESP_ROM_SPIFLASH_TWO_BYTE_STATUS_EN   SPI_MEM_WRSR_2B
+
+//SPI address register
+#define ESP_ROM_SPIFLASH_BYTES_LEN            24
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_WRITE_NUM  32
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM   16
+#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_BITS  0xf
+
+//SPI status register
+#define  ESP_ROM_SPIFLASH_BUSY_FLAG           BIT0
+#define  ESP_ROM_SPIFLASH_WRENABLE_FLAG       BIT1
+#define  ESP_ROM_SPIFLASH_BP0                 BIT2
+#define  ESP_ROM_SPIFLASH_BP1                 BIT3
+#define  ESP_ROM_SPIFLASH_BP2                 BIT4
+#define  ESP_ROM_SPIFLASH_WR_PROTECT          (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
+#define  ESP_ROM_SPIFLASH_QE                  BIT9
+
+#define FLASH_ID_GD25LQ32C  0xC86016
+
+typedef enum {
+    ESP_ROM_SPIFLASH_QIO_MODE = 0,
+    ESP_ROM_SPIFLASH_QOUT_MODE,
+    ESP_ROM_SPIFLASH_DIO_MODE,
+    ESP_ROM_SPIFLASH_DOUT_MODE,
+    ESP_ROM_SPIFLASH_FASTRD_MODE,
+    ESP_ROM_SPIFLASH_SLOWRD_MODE,
+    ESP_ROM_SPIFLASH_OPI_STR_MODE,
+    ESP_ROM_SPIFLASH_OPI_DTR_MODE,
+    ESP_ROM_SPIFLASH_OOUT_MODE,
+    ESP_ROM_SPIFLASH_OIO_STR_MODE,
+    ESP_ROM_SPIFLASH_OIO_DTR_MODE,
+} esp_rom_spiflash_read_mode_t;
+
+typedef enum {
+    ESP_ROM_SPIFLASH_RESULT_OK,
+    ESP_ROM_SPIFLASH_RESULT_ERR,
+    ESP_ROM_SPIFLASH_RESULT_TIMEOUT
+} esp_rom_spiflash_result_t;
+
+typedef struct {
+    uint32_t device_id;
+    uint32_t chip_size;    // chip size in bytes
+    uint32_t block_size;
+    uint32_t sector_size;
+    uint32_t page_size;
+    uint32_t status_mask;
+} esp_rom_spiflash_chip_t;
+
+typedef struct {
+    uint8_t  data_length;
+    uint8_t  read_cmd0;
+    uint8_t  read_cmd1;
+    uint8_t  write_cmd;
+    uint16_t data_mask;
+    uint16_t data;
+} esp_rom_spiflash_common_cmd_t;
+
+typedef void (*spi_flash_func_t)(void);
+typedef esp_rom_spiflash_result_t (*spi_flash_op_t)(void);
+typedef esp_rom_spiflash_result_t (*spi_flash_erase_t)(uint32_t);
+typedef esp_rom_spiflash_result_t (*spi_flash_rd_t)(uint32_t, void*, int);
+typedef esp_rom_spiflash_result_t (*spi_flash_wr_t)(uint32_t, const uint32_t*, int);
+typedef esp_rom_spiflash_result_t (*spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
+typedef esp_rom_spiflash_result_t (*spi_flash_wren_t)(void*);
+typedef esp_rom_spiflash_result_t (* spi_flash_erase_area_t)(uint32_t, uint32_t);
+
+typedef struct {
+    uint8_t pp_addr_bit_len;
+    uint8_t se_addr_bit_len;
+    uint8_t be_addr_bit_len;
+    uint8_t rd_addr_bit_len;
+    uint32_t read_sub_len;
+    uint32_t write_sub_len;
+    spi_flash_op_t unlock;
+    spi_flash_erase_t erase_sector;
+    spi_flash_erase_t erase_block;
+    spi_flash_rd_t read;
+    spi_flash_wr_t write;
+    spi_flash_ewr_t encrypt_write;
+    spi_flash_func_t check_sus;
+    spi_flash_wren_t wren;
+    spi_flash_op_t wait_idle;
+    spi_flash_erase_area_t erase_area;
+} spiflash_legacy_funcs_t;
+
+
+/**
+  * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write).
+  *
+  * @param  uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv);
+
+/**
+  * @brief Select SPI Flash to QIO mode when WP pad is read from Flash.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t wp_gpio_num: WP gpio number.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @return None
+  */
+void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi);
+
+/**
+  * @brief Set SPI Flash pad drivers.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint8_t wp_gpio_num: WP gpio number.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @param  uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid
+  *            drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp.
+  *                        Values usually read from falsh by rom code, function usually callde by rom code.
+  *                        if value with bit(3) set, the value is valid, bit[2:0] is the real value.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs);
+
+/**
+  * @brief Select SPI Flash function for pads.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @return None
+  */
+void esp_rom_spiflash_select_padsfunc(uint32_t ishspi);
+
+/**
+  * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode.
+  *    Please do not call this function in SDK.
+  *
+  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
+  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
+  *
+  * @param  uint8_t legacy: In legacy mode, more SPI command is used in line.
+  *
+  * @return None
+  */
+void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy);
+
+/**
+  * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR).
+  *    Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t *status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status);
+
+/**
+  * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t *status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status);
+
+/**
+  * @brief Write status to Falsh status register.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t status_value : Value to .
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value);
+
+/**
+  * @brief Use a command to Read Flash status register.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
+  *
+  * @param  uint32_t*status : The pointer to which to return the Flash status value.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd);
+
+/**
+  * @brief Config SPI Flash read mode when init.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD.
+  *
+  * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode);
+
+/**
+  * @brief Config SPI Flash clock divisor.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t freqdiv: clock divisor.
+  *
+  * @param  uint8_t spi: 0 for SPI0, 1 for SPI1.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi);
+
+/**
+  * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD.
+  *        Please do not call this function in SDK.
+  *
+  * @param  esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command.
+  *
+  * @return uint16_t  0 : do not send command any more.
+  *                   1 : go to the next command.
+  *                   n > 1 : skip (n - 1) commands.
+  */
+uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd);
+
+/**
+  * @brief Unlock SPI write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void);
+
+/**
+  * @brief SPI write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Lock error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_lock(void);
+
+/**
+  * @brief Update SPI Flash parameter.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t deviceId : Device ID read from SPI, the low 32 bit.
+  *
+  * @param  uint32_t chip_size : The Flash size.
+  *
+  * @param  uint32_t block_size : The Flash block size.
+  *
+  * @param  uint32_t sector_size : The Flash sector size.
+  *
+  * @param  uint32_t page_size : The Flash page size.
+  *
+  * @param  uint32_t status_mask : The Mask used when read status from Flash(use single CMD).
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Update error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size,
+        uint32_t sector_size, uint32_t page_size, uint32_t status_mask);
+
+/**
+  * @brief Erase whole flash chip.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void);
+
+/**
+  * @brief Erase a 64KB block of flash
+  *        Uses SPI flash command D8H.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t block_num : Which block to erase.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num);
+
+/**
+  * @brief Erase a sector of flash.
+  *        Uses SPI flash command 20H.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t sector_num : Which sector to erase.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num);
+
+/**
+  * @brief Erase some sectors.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t start_addr : Start addr to erase, should be sector aligned.
+  *
+  * @param  uint32_t area_len : Length to erase, should be sector aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len);
+
+/**
+  * @brief Write Data to Flash, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t dest_addr : Address to write, should be 4 bytes aligned.
+  *
+  * @param  const uint32_t *src : The pointer to data which is to write.
+  *
+  * @param  uint32_t len : Length to write, should be 4 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len);
+
+/**
+  * @brief Read Data from Flash, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t src_addr : Address to read, should be 4 bytes aligned.
+  *
+  * @param  uint32_t *dest : The buf to read the data.
+  *
+  * @param  uint32_t len : Length to read, should be 4 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Read error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len);
+
+/**
+  * @brief SPI1 go into encrypto mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void esp_rom_spiflash_write_encrypted_enable(void);
+
+/**
+  * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint32_t flash_addr : Address to write, should be 32 bytes aligned.
+  *
+  * @param  uint32_t *data : The pointer to data which is to write.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data);
+
+/**
+  * @brief SPI1 go out of encrypto mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return None
+  */
+void esp_rom_spiflash_write_encrypted_disable(void);
+
+/**
+  * @brief Write data to flash with transparent encryption.
+  * @note Sectors to be written should already be erased.
+  *
+  * @note Please do not call this function in SDK.
+  *
+  * @param  uint32_t flash_addr : Address to write, should be 32 byte aligned.
+  *
+  * @param  uint32_t *data : The pointer to data to write. Note, this pointer must
+  *                          be 32 bit aligned and the content of the data will be
+  *                          modified by the encryption function.
+  *
+  * @param  uint32_t len : Length to write, should be 32 bytes aligned.
+  *
+  * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully.
+  *         ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error.
+  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout.
+  */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len);
+
+
+/* TODO: figure out how to map these to their new names */
+typedef enum {
+    SPI_ENCRYPT_DESTINATION_FLASH,
+    SPI_ENCRYPT_DESTINATION_PSRAM,
+} SpiEncryptDest;
+
+typedef esp_rom_spiflash_result_t SpiFlashOpResult;
+
+SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void *data, uint32_t len);
+SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void *data, uint32_t len);
+void SPI_Write_Encrypt_Enable(void);
+void SPI_Write_Encrypt_Disable(void);
+
+/** @brief Wait until SPI flash write operation is complete
+ *
+ * @note Please do not call this function in SDK.
+ *
+ * Reads the Write In Progress bit of the SPI flash status register,
+ * repeats until this bit is zero (indicating write complete).
+ *
+ * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete
+ *         ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status.
+ */
+esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi);
+
+
+/** @brief Enable Quad I/O pin functions
+ *
+ * @note Please do not call this function in SDK.
+ *
+ * Sets the HD & WP pin functions for Quad I/O modes, based on the
+ * efuse SPI pin configuration.
+ *
+ * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O.
+ *
+ * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig().
+ * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored.
+ * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored.
+ * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used
+ *   to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI).
+ *   Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral.
+ */
+void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
+
+/**
+ * @brief Clear WEL bit unconditionally.
+ *
+ * @return always ESP_ROM_SPIFLASH_RESULT_OK
+ */
+esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
+typedef struct {
+    esp_rom_spiflash_chip_t chip;
+    uint8_t dummy_len_plus[3];
+    uint8_t sig_matrix;
+} spiflash_legacy_data_t;
+
+extern spiflash_legacy_data_t *rom_spiflash_legacy_data;
+
+#define g_rom_flashchip (rom_spiflash_legacy_data->chip)
+#define g_rom_spiflash_dummy_len_plus (rom_spiflash_legacy_data->dummy_len_plus)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/tjpgd.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/tjpgd.h
new file mode 100644
index 00000000000..40340dea58c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/tjpgd.h
@@ -0,0 +1,97 @@
+/*----------------------------------------------------------------------------/
+/ TJpgDec - Tiny JPEG Decompressor include file               (C)ChaN, 2012
+/----------------------------------------------------------------------------*/
+#ifndef _TJPGDEC
+#define _TJPGDEC
+/*---------------------------------------------------------------------------*/
+/* System Configurations */
+
+#define JD_SZBUF        512 /* Size of stream input buffer */
+#define JD_FORMAT       0   /* Output pixel format 0:RGB888 (3 BYTE/pix), 1:RGB565 (1 WORD/pix) */
+#define JD_USE_SCALE    1   /* Use descaling feature for output */
+#define JD_TBLCLIP      1   /* Use table for saturation (might be a bit faster but increases 1K bytes of code size) */
+
+/*---------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* These types must be 16-bit, 32-bit or larger integer */
+typedef int             INT;
+typedef unsigned int    UINT;
+
+/* These types must be 8-bit integer */
+typedef char            CHAR;
+typedef unsigned char   UCHAR;
+typedef unsigned char   BYTE;
+
+/* These types must be 16-bit integer */
+typedef short           SHORT;
+typedef unsigned short  USHORT;
+typedef unsigned short  WORD;
+typedef unsigned short  WCHAR;
+
+/* These types must be 32-bit integer */
+typedef long            LONG;
+typedef unsigned long   ULONG;
+typedef unsigned long   DWORD;
+
+
+/* Error code */
+typedef enum {
+    JDR_OK = 0, /* 0: Succeeded */
+    JDR_INTR,   /* 1: Interrupted by output function */
+    JDR_INP,    /* 2: Device error or wrong termination of input stream */
+    JDR_MEM1,   /* 3: Insufficient memory pool for the image */
+    JDR_MEM2,   /* 4: Insufficient stream input buffer */
+    JDR_PAR,    /* 5: Parameter error */
+    JDR_FMT1,   /* 6: Data format error (may be damaged data) */
+    JDR_FMT2,   /* 7: Right format but not supported */
+    JDR_FMT3    /* 8: Not supported JPEG standard */
+} JRESULT;
+
+
+
+/* Rectangular structure */
+typedef struct {
+    WORD left, right, top, bottom;
+} JRECT;
+
+
+
+/* Decompressor object structure */
+typedef struct JDEC JDEC;
+struct JDEC {
+    UINT dctr;              /* Number of bytes available in the input buffer */
+    BYTE *dptr;             /* Current data read ptr */
+    BYTE *inbuf;            /* Bit stream input buffer */
+    BYTE dmsk;              /* Current bit in the current read byte */
+    BYTE scale;             /* Output scaling ratio */
+    BYTE msx, msy;          /* MCU size in unit of block (width, height) */
+    BYTE qtid[3];           /* Quantization table ID of each component */
+    SHORT dcv[3];           /* Previous DC element of each component */
+    WORD nrst;              /* Restart inverval */
+    UINT width, height;     /* Size of the input image (pixel) */
+    BYTE *huffbits[2][2];   /* Huffman bit distribution tables [id][dcac] */
+    WORD *huffcode[2][2];   /* Huffman code word tables [id][dcac] */
+    BYTE *huffdata[2][2];   /* Huffman decoded data tables [id][dcac] */
+    LONG *qttbl[4];         /* Dequaitizer tables [id] */
+    void *workbuf;          /* Working buffer for IDCT and RGB output */
+    BYTE *mcubuf;           /* Working buffer for the MCU */
+    void *pool;             /* Pointer to available memory pool */
+    UINT sz_pool;           /* Size of momory pool (bytes available) */
+    UINT (*infunc)(JDEC *, BYTE *, UINT); /* Pointer to jpeg stream input function */
+    void *device;           /* Pointer to I/O device identifiler for the session */
+};
+
+/* TJpgDec API functions */
+JRESULT jd_prepare (JDEC *, UINT(*)(JDEC *, BYTE *, UINT), void *, UINT, void *);
+JRESULT jd_decomp (JDEC *, UINT(*)(JDEC *, void *, JRECT *), BYTE);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TJPGDEC */
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/uart.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/uart.h
new file mode 100644
index 00000000000..0c45e92cb3f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/uart.h
@@ -0,0 +1,436 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "ets_sys.h"
+#include "soc/soc.h"
+#include "soc/uart_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup uart_apis, uart configuration and communication related apis
+  * @brief uart apis
+  */
+
+/** @addtogroup uart_apis
+  * @{
+  */
+
+#define RX_BUFF_SIZE                     0x400
+#define TX_BUFF_SIZE                     100
+
+//uart int enalbe register ctrl bits
+#define UART_RCV_INTEN                   BIT0
+#define UART_TRX_INTEN                   BIT1
+#define UART_LINE_STATUS_INTEN           BIT2
+
+//uart int identification ctrl bits
+#define UART_INT_FLAG_MASK               0x0E
+
+//uart fifo ctrl bits
+#define UART_CLR_RCV_FIFO                BIT1
+#define UART_CLR_TRX_FIFO                BIT2
+#define UART_RCVFIFO_TRG_LVL_BITS        BIT6
+
+//uart line control bits
+#define  UART_DIV_LATCH_ACCESS_BIT       BIT7
+
+//uart line status bits
+#define  UART_RCV_DATA_RDY_FLAG          BIT0
+#define  UART_RCV_OVER_FLOW_FLAG         BIT1
+#define  UART_RCV_PARITY_ERR_FLAG        BIT2
+#define  UART_RCV_FRAME_ERR_FLAG         BIT3
+#define  UART_BRK_INT_FLAG               BIT4
+#define  UART_TRX_FIFO_EMPTY_FLAG        BIT5
+#define  UART_TRX_ALL_EMPTY_FLAG         BIT6   // include fifo and shift reg
+#define  UART_RCV_ERR_FLAG               BIT7
+
+//send and receive message frame head
+#define FRAME_FLAG                       0x7E
+
+typedef enum {
+    UART_LINE_STATUS_INT_FLAG  = 0x06,
+    UART_RCV_FIFO_INT_FLAG     = 0x04,
+    UART_RCV_TMOUT_INT_FLAG    = 0x0C,
+    UART_TXBUFF_EMPTY_INT_FLAG = 0x02
+} UartIntType;   //consider bit0 for int_flag
+
+typedef enum {
+    RCV_ONE_BYTE      = 0x0,
+    RCV_FOUR_BYTE     = 0x1,
+    RCV_EIGHT_BYTE    = 0x2,
+    RCV_FOURTEEN_BYTE = 0x3
+} UartRcvFifoTrgLvl;
+
+typedef enum {
+    FIVE_BITS  = 0x0,
+    SIX_BITS   = 0x1,
+    SEVEN_BITS = 0x2,
+    EIGHT_BITS = 0x3
+} UartBitsNum4Char;
+
+typedef enum {
+    ONE_STOP_BIT      = 1,
+    ONE_HALF_STOP_BIT = 2,
+    TWO_STOP_BIT      = 3
+} UartStopBitsNum;
+
+typedef enum {
+    NONE_BITS = 0,
+    ODD_BITS  = 2,
+    EVEN_BITS = 3
+
+} UartParityMode;
+
+typedef enum {
+    STICK_PARITY_DIS = 0,
+    STICK_PARITY_EN  = 2
+} UartExistParity;
+
+typedef enum {
+    BIT_RATE_9600   = 9600,
+    BIT_RATE_19200  = 19200,
+    BIT_RATE_38400  = 38400,
+    BIT_RATE_57600  = 57600,
+    BIT_RATE_115200 = 115200,
+    BIT_RATE_230400 = 230400,
+    BIT_RATE_460800 = 460800,
+    BIT_RATE_921600 = 921600
+} UartBautRate;
+
+typedef enum {
+    NONE_CTRL,
+    HARDWARE_CTRL,
+    XON_XOFF_CTRL
+} UartFlowCtrl;
+
+typedef enum {
+    EMPTY,
+    UNDER_WRITE,
+    WRITE_OVER
+} RcvMsgBuffState;
+
+typedef struct {
+    uint8_t *pRcvMsgBuff;
+    uint8_t *pWritePos;
+    uint8_t *pReadPos;
+    uint8_t  TrigLvl;
+    RcvMsgBuffState BuffState;
+} RcvMsgBuff;
+
+typedef struct {
+    uint32_t  TrxBuffSize;
+    uint8_t  *pTrxBuff;
+} TrxMsgBuff;
+
+typedef enum {
+    BAUD_RATE_DET,
+    WAIT_SYNC_FRM,
+    SRCH_MSG_HEAD,
+    RCV_MSG_BODY,
+    RCV_ESC_CHAR,
+} RcvMsgState;
+
+typedef struct {
+    UartBautRate     baut_rate;
+    UartBitsNum4Char data_bits;
+    UartExistParity  exist_parity;
+    UartParityMode   parity;    // chip size in byte
+    UartStopBitsNum  stop_bits;
+    UartFlowCtrl     flow_ctrl;
+    uint8_t          buff_uart_no;  //indicate which uart use tx/rx buffer
+    RcvMsgBuff       rcv_buff;
+//    TrxMsgBuff       trx_buff;
+    RcvMsgState      rcv_state;
+    int              received;
+} UartDevice;
+
+/**
+  * @brief Init uart device struct value and reset uart0/uart1 rx.
+  *        Please do not call this function in SDK.
+  *
+  * @param  rxBuffer, must be a pointer to RX_BUFF_SIZE bytes or NULL
+  *
+  * @return None
+  */
+void uartAttach(void *rxBuffer);
+
+/**
+  * @brief Init uart0 or uart1 for UART download booting mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, else for UART1.
+  *
+  * @param  uint32_t clock : clock used by uart module, to adjust baudrate.
+  *
+  * @return None
+  */
+void Uart_Init(uint8_t uart_no, uint32_t clock);
+
+/**
+  * @brief Modify uart baudrate.
+  *        This function will reset RX/TX fifo for uart.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @param  uint32_t DivLatchValue : (clock << 4)/baudrate.
+  *
+  * @return None
+  */
+void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue);
+
+/**
+  * @brief Init uart0 or uart1 for UART download booting mode.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module, easy to detect, wait until detected;
+  *                           1, two UART modules, hard to detect, detect and return.
+  *
+  * @return None
+  */
+int uart_baudrate_detect(uint8_t uart_no, uint8_t is_sync);
+
+/**
+  * @brief Switch printf channel of uart_tx_one_char.
+  *        Please do not call this function when printf.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None
+  */
+void uart_tx_switch(uint8_t uart_no);
+
+/**
+  * @brief Switch message exchange channel for UART download booting.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None
+  */
+void uart_buff_switch(uint8_t uart_no);
+
+/**
+  * @brief Output a char to printf channel, wait until fifo not full.
+  *
+  * @param  None
+  *
+  * @return OK.
+  */
+STATUS uart_tx_one_char(uint8_t TxChar);
+
+/**
+  * @brief Output a char to message exchange channel, wait until fifo not full.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return OK.
+  */
+STATUS uart_tx_one_char2(uint8_t TxChar);
+
+/**
+  * @brief Wait until uart tx full empty.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return None.
+  */
+void uart_tx_flush(uint8_t uart_no);
+
+/**
+  * @brief Wait until uart tx full empty and the last char send ok.
+  *
+  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2
+  *
+  * The function defined in ROM code has a bug, so we define the correct version
+  * here for compatibility.
+  */
+void uart_tx_wait_idle(uint8_t uart_no);
+
+/**
+  * @brief Get an input char from message channel.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pRxChar : the pointer to store the char.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS uart_rx_one_char(uint8_t *pRxChar);
+
+/**
+  * @brief Get an input char from message channel, wait until successful.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return char : input char value.
+  */
+char uart_rx_one_char_block(void);
+
+/**
+  * @brief Get an input string line from message channel.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pString : the pointer to store the string.
+  *
+  * @param  uint8_t MaxStrlen : the max string length, incude '\0'.
+  *
+  * @return OK.
+  */
+STATUS UartRxString(uint8_t *pString, uint8_t MaxStrlen);
+
+/**
+  * @brief Process uart recevied information in the interrupt handler.
+  *        Please do not call this function in SDK.
+  *
+  * @param  void *para : the message receive buffer.
+  *
+  * @return None
+  */
+void uart_rx_intr_handler(void *para);
+
+/**
+  * @brief Get an char from receive buffer.
+  *        Please do not call this function in SDK.
+  *
+  * @param  RcvMsgBuff *pRxBuff : the pointer to the struct that include receive buffer.
+  *
+  * @param  uint8_t *pRxByte : the pointer to store the char.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS uart_rx_readbuff( RcvMsgBuff *pRxBuff, uint8_t *pRxByte);
+
+/**
+  * @brief Get all chars from receive buffer.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pCmdLn : the pointer to store the string.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS UartGetCmdLn(uint8_t *pCmdLn);
+
+/**
+  * @brief Get uart configuration struct.
+  *        Please do not call this function in SDK.
+  *
+  * @param  None
+  *
+  * @return UartDevice * : uart configuration struct pointer.
+  */
+UartDevice *GetUartDevice(void);
+
+/**
+  * @brief Send an packet to download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *p : the pointer to output string.
+  *
+  * @param  int len : the string length.
+  *
+  * @return None.
+  */
+void send_packet(uint8_t *p, int len);
+
+/**
+  * @brief Receive an packet from download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *p : the pointer to input string.
+  *
+  * @param  int len : If string length > len, the string will be truncated.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module;
+  *                           1, two UART modules.
+  *
+  * @return int : the length of the string.
+  */
+int recv_packet(uint8_t *p, int len, uint8_t is_sync);
+
+/**
+  * @brief Send an packet to download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pData : the pointer to input string.
+  *
+  * @param  uint16_t DataLen : the string length.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS SendMsg(uint8_t *pData, uint16_t DataLen);
+
+/**
+  * @brief Receive an packet from download tool, with SLIP escaping.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t *pData : the pointer to input string.
+  *
+  * @param  uint16_t MaxDataLen : If string length > MaxDataLen, the string will be truncated.
+  *
+  * @param  uint8_t is_sync : 0, only one UART module;
+  *                           1, two UART modules.
+  *
+  * @return OK for successful.
+  *         FAIL for failed.
+  */
+STATUS RcvMsg(uint8_t *pData, uint16_t MaxDataLen, uint8_t is_sync);
+
+/**
+  * @brief Check if this UART is in download connection.
+  *        Please do not call this function in SDK.
+  *
+  * @param  uint8_t uart_no : 0 for UART0, 1 for UART1.
+  *
+  * @return ETS_NO_BOOT = 0 for no.
+  *         SEL_UART_BOOT = BIT(1) for yes.
+  */
+uint8_t UartConnCheck(uint8_t uart_no);
+
+/**
+  * @brief Initialize the USB ACM UART
+  * Needs to be fed a buffer of at least 128 bytes, plus any rx buffer you may want to have.
+  *
+  * @param cdc_acm_work_mem Pointer to work mem for CDC-ACM code
+  * @param cdc_acm_work_mem_len Length of work mem
+  */
+void Uart_Init_USB(void *cdc_acm_work_mem, int cdc_acm_work_mem_len);
+
+
+/**
+  * @brief Install handler to reset the chip when a RTS change has been detected on the CDC-ACM 'UART'.
+  */
+void uart_usb_enable_reset_on_rts(void);
+
+
+extern UartDevice UartDev;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/cdc_acm.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/cdc_acm.h
new file mode 100644
index 00000000000..90d71e81772
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/cdc_acm.h
@@ -0,0 +1,262 @@
+/*******************************************************************************
+ *
+ * Copyright(c) 2015,2016 Intel Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************/
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void cdc_acm_device;
+extern cdc_acm_device *uart_acm_dev;
+
+#define ACM_BYTES_PER_TX  64
+
+//ACM statuses are negative to distinguish from USB_DC_* status codes
+#define ACM_STATUS_LINESTATE_CHANGED -1
+#define ACM_STATUS_LINECODING_CHANGED -2
+#define ACM_STATUS_TX -3
+#define ACM_STATUS_RX -4
+
+typedef void(*uart_irq_callback_t)(cdc_acm_device *dev, int status);
+
+/**
+ * @brief Get amount of received characters in buffer
+ *
+ * @returns character count
+ */
+
+int cdc_acm_rx_fifo_cnt(cdc_acm_device *dev);
+
+
+/*
+ * @brief Poll the device for input.
+ *
+ * @return -ENOTSUP Since underlying USB device controller always uses
+ * interrupts, polled mode UART APIs are not implemented for the UART interface
+ * exported by CDC ACM driver. Apps should use fifo_read API instead.
+ */
+
+int cdc_acm_poll_in(cdc_acm_device *dev, unsigned char *c);
+
+/*
+ * @brief Output a character in polled mode.
+ *
+ * The UART poll method for USB UART is simulated by waiting till
+ * we get the next BULK In upcall from the USB device controller or 100 ms.
+ *
+ * @return the same character which is sent
+ */
+unsigned char cdc_acm_poll_out(cdc_acm_device *dev, unsigned char c);
+
+/**
+ * @brief Fill FIFO with data
+ *
+ * @param dev     CDC ACM device struct.
+ * @param tx_data Data to transmit.
+ * @param len     Number of bytes to send.
+ *
+ * @return Number of bytes sent.
+ */
+int cdc_acm_fifo_fill(cdc_acm_device *dev, const uint8_t *tx_data, int len);
+
+/**
+ * @brief Read data from FIFO
+ *
+ * @param dev     CDC ACM device struct.
+ * @param rx_data Pointer to data container.
+ * @param size    Container size.
+ *
+ * @return Number of bytes read.
+ */
+int cdc_acm_fifo_read(cdc_acm_device *dev, uint8_t *rx_data, const int size);
+
+/**
+ * @brief Enable TX interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A.
+ */
+void cdc_acm_irq_tx_enable(cdc_acm_device *dev);
+
+/**
+ * @brief Disable TX interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A.
+ */
+void cdc_acm_irq_tx_disable(cdc_acm_device *dev);
+
+/**
+ * @brief Check if Tx IRQ has been raised
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return 1 if a Tx IRQ is pending, 0 otherwise.
+ */
+int cdc_acm_irq_tx_ready(cdc_acm_device *dev);
+
+/**
+ * @brief Enable RX interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A
+ */
+void cdc_acm_irq_rx_enable(cdc_acm_device *dev);
+
+/**
+ * @brief Disable RX interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A.
+ */
+void cdc_acm_irq_rx_disable(cdc_acm_device *dev);
+
+/**
+ * @brief Enable line state interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A.
+ */
+void cdc_acm_irq_state_enable(cdc_acm_device *dev);
+
+/**
+ * @brief Disable line state interrupt
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return N/A.
+ */
+void cdc_acm_irq_state_disable(cdc_acm_device *dev);
+
+
+/**
+ * @brief Check if Rx IRQ has been raised
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return 1 if an IRQ is ready, 0 otherwise.
+ */
+int cdc_acm_irq_rx_ready(cdc_acm_device *dev);
+
+/**
+ * @brief Check if Tx or Rx IRQ is pending
+ *
+ * @param dev CDC ACM device struct.
+ *
+ * @return 1 if a Tx or Rx IRQ is pending, 0 otherwise.
+ */
+int cdc_acm_irq_is_pending(cdc_acm_device *dev);
+
+/**
+ * @brief Set the callback function pointer for IRQ.
+ *
+ * @param dev CDC ACM device struct.
+ * @param cb  Callback function pointer.
+ *
+ * @return N/A
+ */
+void cdc_acm_irq_callback_set(cdc_acm_device *dev, uart_irq_callback_t cb);
+
+/**
+ * @brief Manipulate line control for UART.
+ *
+ * @param dev CDC ACM device struct
+ * @param ctrl The line control to be manipulated
+ * @param val Value to set the line control
+ *
+ * @return 0 if successful, failed otherwise.
+ */
+int cdc_acm_line_ctrl_set(cdc_acm_device *dev, uint32_t ctrl, uint32_t val);
+
+/**
+ * @brief Manipulate line control for UART.
+ *
+ * @param dev CDC ACM device struct
+ * @param ctrl The line control to be manipulated
+ * @param val Value to set the line control
+ *
+ * @return 0 if successful, failed otherwise.
+ */
+int cdc_acm_line_ctrl_get(cdc_acm_device *dev, uint32_t ctrl, uint32_t *val);
+
+
+/**
+ * @brief Initialize UART channel
+ *
+ * This routine is called to reset the chip in a quiescent state.
+ * It is assumed that this function is called only once per UART.
+ *
+ * @param mem_chunk Memory chunk to use for internal use
+ * @param mem_chunk_size Size of the memory chunk in bytes
+ *
+ * @return dev or NULL
+ */
+cdc_acm_device *cdc_acm_init(void *mem_chunk, int mem_chunk_size);
+
+
+/** Common line controls for UART.*/
+#define LINE_CTRL_BAUD_RATE (1 << 0)
+#define LINE_CTRL_RTS       (1 << 1)
+#define LINE_CTRL_DTR       (1 << 2)
+#define LINE_CTRL_DCD       (1 << 3)
+#define LINE_CTRL_DSR       (1 << 4)
+
+/* Common communication errors for UART.*/
+
+/** @brief Overrun error */
+#define UART_ERROR_OVERRUN  (1 << 0)
+
+/** @brief Parity error */
+#define UART_ERROR_PARITY   (1 << 1)
+
+/** @brief Framing error */
+#define UART_ERROR_FRAMING  (1 << 2)
+
+/**
+ * @brief Break interrupt error:
+ *
+ * A break interrupt was received. This happens when the serial input is
+ * held at a logic '0' state for longer than the sum of start time + data bits
+ * + parity + stop bits.
+ */
+#define UART_ERROR_BREAK    (1 << 3)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/chip_usb_dw_wrapper.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/chip_usb_dw_wrapper.h
new file mode 100644
index 00000000000..a7c50643593
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/chip_usb_dw_wrapper.h
@@ -0,0 +1,30 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int chip_usb_dw_init(void);
+int chip_usb_dw_did_persist(void);
+void chip_usb_dw_prepare_persist(void);
+uint32_t chip_usb_get_persist_flags(void);
+void chip_usb_set_persist_flags(uint32_t flags);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/cpio.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/cpio.h
new file mode 100644
index 00000000000..886b5080fb4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/cpio.h
@@ -0,0 +1,180 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/**
+ * Archive to parse cpio data in the newc and crc formats. Generate a cpio archive like that by e.g.
+ * find . | cpio -o -H newc > archive.cpio
+ */
+
+#pragma once
+
+#include <stdio.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CPIO_MODE_FILETYPE_MASK     0xF000
+#define CPIO_MODE_FILETYPE_SOCKET   0xC000
+#define CPIO_MODE_FILETYPE_SYMLINK  0xA000
+#define CPIO_MODE_FILETYPE_REGULAR  0x8000
+#define CPIO_MODE_FILETYPE_BLOCKDEV 0x6000
+#define CPIO_MODE_FILETYPE_DIR      0x4000
+#define CPIO_MODE_FILETYPE_CHARDEV  0x2000
+#define CPIO_MODE_FILETYPE_FIFO     0x1000
+#define CPIO_MODE_SUID              0x0800
+#define CPIO_MODE_SGID              0x0400
+#define CPIO_MODE_STICKY            0x0200
+
+typedef struct {
+    size_t filesize;
+    char *name;
+    uint32_t mode;
+    uint32_t check;
+} cpio_file_t;
+
+typedef enum {
+    CPIO_RET_MORE = 0,
+    CPIO_RET_DONE,
+    CPIO_RET_ERR
+} cpio_ret_t;
+
+typedef struct cpio_handle_data_t cpio_handle_data_t;
+typedef cpio_handle_data_t *cpio_handle_t;
+
+typedef enum {
+    CPIO_RSN_FILE_ALL = 0,
+    CPIO_RSN_FILE_INITIAL,
+    CPIO_RSN_FILE_MORE,
+    CPIO_RSN_FILE_END
+} cpio_callback_reason_t;
+
+
+/**
+ * Callback for cpio file data.
+ *
+ * This callback will be called by the library to indicate data for a file is available.
+ *
+ * For files in the cpio archive that fit entirely in the internal buffer, or when no internal
+ * buffer is available, are entirely contained in the buffer fed to cpio_feed(), this callback
+ * is only called once, with reason=CPIO_RNS_FILE_ALL. fileinfo will contain the information
+ * for that specific file (name, size, ...), buff_offset will be 0, buff_len is the file
+ * size and buff contains all the information for the file.
+ *
+ * For files that do not fit in the buffer, this callback will be called multiple times.
+ * The initial time with reason=CPIO_RSN_FILE_INITIAL, when more data is available with
+ * CPIO_RSN_FILE_MORE and finally with CPIO_RSN_FILE_END. For these calls, fileinfo
+ * will again contain file information. buff will be the information contained in the
+ * file at offset buff_offset, and the length of this buffer will be in buff_len.
+ *
+ * The library guarantees to feed all file data to the callback consequitively, so
+ * within the same file, the buff_offset from a call will always be (buff_offset+buff_len)
+ * from the call before that. If cpio_start is
+ *
+ * The library also guarantees every file in the cpio archive will either generate a single
+ * callback call with CPIO_RSN_ALL, or multiple with in sequence CPIO_RSN_FILE_INITIAL, 0 or
+ * more CPIO_RSN_FILE_MORE and finally a CPIO_RSN_FILE_END.
+ *
+ * When a non-zero buffer size is passed to cpio_start, the library guarantees that all callback
+ * calls with a reason of CPIO_RSN_FILE_INITIAL and CPIO_RSN_FILE_MORE will have a buffer
+ * filled with exactly this amount of bytes.
+ *
+ */
+typedef void (*cpio_callback_t)(cpio_callback_reason_t reason, cpio_file_t *fileinfo, size_t buff_offset, size_t buff_len, char *buff, void *arg);
+
+
+/**
+ * @brief      Initialize a cpio handle.
+ *
+ * Call this to start parsing a cpio archive. You can set the callback that handles the
+ * files/data here.
+ *
+ * @param  callback The callback that will handle the data of the files inside the cpio archive
+ *
+ * @param  cbarg User-supplied argument. The callback will be called with this as an argument.
+ *
+ * @param  buflen Length of internal buffer used.
+ *                If this is zero, the callback will be called with data that lives in the data buffer
+ *                supplied to the cpio library by whomever called cpio_feed(). Because this library has
+ *                no power over that buffer, the callback can be passed as little as 1 and as many as
+ *                INT_MAX bytes at a time.
+ *                If this is non-zero, the library will allocate an internal buffer of this size. All
+ *                cpio_feed()-calls will be rebuffered, and the callback is guaranteed to only be called
+ *                with this many bytes in the buffer, given there's enough data in the file to fill it.
+ *
+ * @param memchunk Chunk of memory to allocate everything (handle, I/O buffer, filename buffer) in. Minimum size
+ *                 (estimate) is 160+buflen+sizeof(largest filename/path).
+ * @param memchunklen Size of the mem chunk
+ *
+ * @return
+ *     - Success: A pointer to a cpio handle
+ *     - Error: NULL
+ *
+ */
+cpio_handle_t cpio_start(cpio_callback_t callback, void *cbarg, size_t buflen, void *memchunk, int memchunklen);
+
+/**
+ * @brief      Feed data from a cpio archive into the library
+ *
+ * This routine is used to feed consecutive data of the cpio archive into the library. While processing,
+ * the library can call the callback function one or more times if needed.
+ *
+ * @param  cpio Handle obtained by calling cpio_start()
+ *
+ * @param  buffer Pointer to buffer containing cpio archive data
+ *
+ * @param  len Length of the buffer, in bytes
+ *
+ * @return
+ *     - CPIO_RET_MORE: CPIO archive isn't done yet, please feed more data.
+ *     - CPIO_RET_DONE: CPUI archive is finished.
+ *     - CPIO_RET_ERR: Invalid CPIO archive data; decoding aborted.
+ *
+ */
+cpio_ret_t cpio_feed(cpio_handle_t cpio, char *buffer, int len);
+
+/**
+ * @brief      Indicate there is no more cpio data to be fed into the archive
+ *
+ * This call is to be called when the source data is exhausted. Normally, the library can find the end of the
+ * cpio archive by looking for the end marker,
+ *
+ * @param  timer_conf Pointer of LEDC timer configure struct
+ *
+ *
+ * @return
+ *     - CPIO_RET_DONE on success
+ *     - CPIO_RET_ERR when cpio archive is invalid
+ *
+ */
+cpio_ret_t cpio_done(cpio_handle_t cpio);
+
+
+/**
+ * @brief      Free the memory allocated for a cpio handle.
+ *
+ * @param  cpio Handle obtained by calling cpio_start()
+ *
+ * @return
+ *     - CPIO_RET_DONE on success
+ *
+ */
+cpio_ret_t cpio_destroy(cpio_handle_t cpio);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_cdc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_cdc.h
new file mode 100644
index 00000000000..c241bcfe065
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_cdc.h
@@ -0,0 +1,174 @@
+/* usb_cdc.h - USB CDC-ACM and CDC-ECM public header */
+
+/*
+ * Copyright (c) 2017 PHYTEC Messtechnik GmbH
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+/**
+ * @file
+ * @brief USB Communications Device Class (CDC) public header
+ *
+ * Header follows the Class Definitions for
+ * Communications Devices Specification (CDC120-20101103-track.pdf),
+ * PSTN Devices Specification (PSTN120.pdf) and
+ * Ethernet Control Model Devices Specification (ECM120.pdf).
+ * Header is limited to ACM and ECM Subclasses.
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <sys/cdefs.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** CDC Specification release number in BCD format */
+#define CDC_SRN_1_20            0x0120
+
+/** Communications Class Subclass Codes */
+#define ACM_SUBCLASS            0x02
+#define ECM_SUBCLASS            0x06
+#define EEM_SUBCLASS            0x0c
+
+/** Communications Class Protocol Codes */
+#define AT_CMD_V250_PROTOCOL        0x01
+#define EEM_PROTOCOL            0x07
+
+/**
+ * @brief Data Class Interface Codes
+ * @note CDC120-20101103-track.pdf, 4.5, Table 6
+ */
+#define DATA_INTERFACE_CLASS        0x0A
+
+/**
+ * @brief Values for the bDescriptorType Field
+ * @note CDC120-20101103-track.pdf, 5.2.3, Table 12
+ */
+#define CS_INTERFACE            0x24
+#define CS_ENDPOINT         0x25
+
+/**
+ * @brief bDescriptor SubType for Communications
+ * Class Functional Descriptors
+ * @note CDC120-20101103-track.pdf, 5.2.3, Table 13
+ */
+#define HEADER_FUNC_DESC        0x00
+#define CALL_MANAGEMENT_FUNC_DESC   0x01
+#define ACM_FUNC_DESC           0x02
+#define UNION_FUNC_DESC         0x06
+#define ETHERNET_FUNC_DESC      0x0F
+
+/**
+ * @brief PSTN Subclass Specific Requests
+ * for ACM devices
+ * @note PSTN120.pdf, 6.3, Table 13
+ */
+#define CDC_SEND_ENC_CMD        0x00
+#define CDC_GET_ENC_RSP         0x01
+#define SET_LINE_CODING         0x20
+#define GET_LINE_CODING         0x21
+#define SET_CONTROL_LINE_STATE      0x22
+
+/** Control Signal Bitmap Values for SetControlLineState */
+#define SET_CONTROL_LINE_STATE_RTS  0x02
+#define SET_CONTROL_LINE_STATE_DTR  0x01
+
+/** UART State Bitmap Values */
+#define SERIAL_STATE_OVERRUN        0x40
+#define SERIAL_STATE_PARITY     0x20
+#define SERIAL_STATE_FRAMING        0x10
+#define SERIAL_STATE_RING       0x08
+#define SERIAL_STATE_BREAK      0x04
+#define SERIAL_STATE_TX_CARRIER     0x02
+#define SERIAL_STATE_RX_CARRIER     0x01
+
+/**
+ * @brief Class-Specific Request Codes for Ethernet subclass
+ * @note ECM120.pdf, 6.2, Table 6
+ */
+#define SET_ETHERNET_MULTICAST_FILTERS  0x40
+#define SET_ETHERNET_PM_FILTER      0x41
+#define GET_ETHERNET_PM_FILTER      0x42
+#define SET_ETHERNET_PACKET_FILTER  0x43
+#define GET_ETHERNET_STATISTIC      0x44
+
+/** Ethernet Packet Filter Bitmap */
+#define PACKET_TYPE_MULTICAST       0x10
+#define PACKET_TYPE_BROADCAST       0x08
+#define PACKET_TYPE_DIRECTED        0x04
+#define PACKET_TYPE_ALL_MULTICAST   0x02
+#define PACKET_TYPE_PROMISCUOUS     0x01
+
+/** Header Functional Descriptor */
+struct cdc_header_descriptor {
+    uint8_t bFunctionLength;
+    uint8_t bDescriptorType;
+    uint8_t bDescriptorSubtype;
+    uint16_t bcdCDC;
+} __packed;
+
+/** Union Interface Functional Descriptor */
+struct cdc_union_descriptor {
+    uint8_t bFunctionLength;
+    uint8_t bDescriptorType;
+    uint8_t bDescriptorSubtype;
+    uint8_t bControlInterface;
+    uint8_t bSubordinateInterface0;
+} __packed;
+
+/** Call Management Functional Descriptor */
+struct cdc_cm_descriptor {
+    uint8_t bFunctionLength;
+    uint8_t bDescriptorType;
+    uint8_t bDescriptorSubtype;
+    uint8_t bmCapabilities;
+    uint8_t bDataInterface;
+} __packed;
+
+/** Abstract Control Management Functional Descriptor */
+struct cdc_acm_descriptor {
+    uint8_t bFunctionLength;
+    uint8_t bDescriptorType;
+    uint8_t bDescriptorSubtype;
+    uint8_t bmCapabilities;
+} __packed;
+
+
+/** Data structure for GET_LINE_CODING / SET_LINE_CODING class requests */
+struct cdc_acm_line_coding {
+    uint32_t dwDTERate;
+    uint8_t bCharFormat;
+    uint8_t bParityType;
+    uint8_t bDataBits;
+} __packed;
+
+/** Data structure for the notification about SerialState */
+struct cdc_acm_notification {
+    uint8_t bmRequestType;
+    uint8_t bNotificationType;
+    uint16_t wValue;
+    uint16_t wIndex;
+    uint16_t wLength;
+    uint16_t data;
+} __packed;
+
+/** Ethernet Networking Functional Descriptor */
+struct cdc_ecm_descriptor {
+    uint8_t bFunctionLength;
+    uint8_t bDescriptorType;
+    uint8_t bDescriptorSubtype;
+    uint8_t iMACAddress;
+    uint32_t bmEthernetStatistics;
+    uint16_t wMaxSegmentSize;
+    uint16_t wNumberMCFilters;
+    uint8_t bNumberPowerFilters;
+} __packed;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_common.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_common.h
new file mode 100644
index 00000000000..c3bd52cfb94
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_common.h
@@ -0,0 +1,243 @@
+/***************************************************************************
+ *
+ *
+ * Copyright(c) 2015,2016 Intel Corporation.
+ * Copyright(c) 2017 PHYTEC Messtechnik GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ***************************************************************************/
+
+/**
+ * @file
+ * @brief useful constants and macros for the USB application
+ *
+ * This file contains useful constants and macros for the USB applications.
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <sys/cdefs.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BCD(x) ((((x) / 10) << 4) | ((x) / 10))
+
+/* Descriptor size in bytes */
+#define USB_DEVICE_DESC_SIZE        18
+#define USB_CONFIGURATION_DESC_SIZE 9
+#define USB_INTERFACE_DESC_SIZE     9
+#define USB_ENDPOINT_DESC_SIZE      7
+#define USB_STRING_DESC_SIZE        4
+#define USB_HID_DESC_SIZE       9
+#define USB_DFU_DESC_SIZE       9
+#define USB_DEVICE_QUAL_DESC_SIZE   10
+#define USB_INTERFACE_ASSOC_DESC_SIZE   8
+
+/* Descriptor type */
+#define USB_DEVICE_DESC         0x01
+#define USB_CONFIGURATION_DESC      0x02
+#define USB_STRING_DESC         0x03
+#define USB_INTERFACE_DESC      0x04
+#define USB_ENDPOINT_DESC       0x05
+#define USB_DEVICE_QUAL_DESC        0x06
+#define USB_INTERFACE_ASSOC_DESC    0x0B
+#define USB_DEVICE_CAPABILITY_DESC  0x10
+#define USB_HID_DESC            0x21
+#define USB_HID_REPORT_DESC     0x22
+#define USB_DFU_FUNCTIONAL_DESC     0x21
+#define USB_ASSOCIATION_DESC        0x0B
+#define USB_BINARY_OBJECT_STORE_DESC    0x0F
+
+/* Useful define */
+#define USB_1_1             0x0110
+#define USB_2_0             0x0200
+/* Set USB version to 2.1 so that the host will request the BOS descriptor */
+#define USB_2_1             0x0210
+
+#define BCDDEVICE_RELNUM        (BCD(KERNEL_VERSION_MAJOR) << 8 | \
+                    BCD(KERNEL_VERSION_MINOR))
+
+/* 100mA max power, per 2mA units */
+/* USB 1.1 spec indicates 100mA(max) per unit load, up to 5 loads */
+#define MAX_LOW_POWER           0x32
+#define MAX_HIGH_POWER          0xFA
+
+/* bmAttributes:
+ * D7:Reserved, always 1,
+ * D6:Self-Powered -> 1,
+ * D5:Remote Wakeup -> 0,
+ * D4...0:Reserved -> 0
+ */
+#define USB_CONFIGURATION_ATTRIBUTES    0xC0
+
+/* Classes */
+#define COMMUNICATION_DEVICE_CLASS  0x02
+#define COMMUNICATION_DEVICE_CLASS_DATA 0x0A
+#define HID_CLASS           0x03
+#define MASS_STORAGE_CLASS      0x08
+#define WIRELESS_DEVICE_CLASS       0xE0
+#define MISC_CLASS          0xEF
+#define CUSTOM_CLASS            0xFF
+#define DFU_DEVICE_CLASS        0xFE
+
+/* Sub-classes */
+#define CDC_NCM_SUBCLASS        0x0d
+#define BOOT_INTERFACE_SUBCLASS     0x01
+#define SCSI_TRANSPARENT_SUBCLASS   0x06
+#define DFU_INTERFACE_SUBCLASS      0x01
+#define RF_SUBCLASS         0x01
+#define CUSTOM_SUBCLASS         0xFF
+#define COMMON_SUBCLASS         0x02
+/* Misc subclasses */
+#define MISC_RNDIS_SUBCLASS     0x04
+#define CDC_ABSTRACT_CONTROL_MODEL 0x02
+
+/* Protocols */
+#define V25TER_PROTOCOL         0x01
+#define MOUSE_PROTOCOL          0x02
+#define BULK_ONLY_PROTOCOL      0x50
+#define DFU_RUNTIME_PROTOCOL        0x01
+#define DFU_MODE_PROTOCOL       0x02
+#define BLUETOOTH_PROTOCOL      0x01
+/* CDC ACM protocols */
+#define ACM_VENDOR_PROTOCOL     0xFF
+/* Misc protocols */
+#define MISC_ETHERNET_PROTOCOL      0x01
+#define IAD_PROTOCOL            0x01
+
+/** Standard Device Descriptor */
+struct usb_device_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint16_t bcdUSB;
+    uint8_t bDeviceClass;
+    uint8_t bDeviceSubClass;
+    uint8_t bDeviceProtocol;
+    uint8_t bMaxPacketSize0;
+    uint16_t idVendor;
+    uint16_t idProduct;
+    uint16_t bcdDevice;
+    uint8_t iManufacturer;
+    uint8_t iProduct;
+    uint8_t iSerialNumber;
+    uint8_t bNumConfigurations;
+} __packed;
+
+/** Unicode (UTF16LE) String Descriptor */
+struct usb_string_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint16_t bString;
+} __packed;
+
+/** Association Descriptor */
+struct usb_association_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint8_t bFirstInterface;
+    uint8_t bInterfaceCount;
+    uint8_t bFunctionClass;
+    uint8_t bFunctionSubClass;
+    uint8_t bFunctionProtocol;
+    uint8_t iFunction;
+} __packed;
+
+/** Standard Configuration Descriptor */
+struct usb_cfg_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint16_t wTotalLength;
+    uint8_t bNumInterfaces;
+    uint8_t bConfigurationValue;
+    uint8_t iConfiguration;
+    uint8_t bmAttributes;
+    uint8_t bMaxPower;
+} __packed;
+
+/** Standard Interface Descriptor */
+struct usb_if_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint8_t bInterfaceNumber;
+    uint8_t bAlternateSetting;
+    uint8_t bNumEndpoints;
+    uint8_t bInterfaceClass;
+    uint8_t bInterfaceSubClass;
+    uint8_t bInterfaceProtocol;
+    uint8_t iInterface;
+} __packed;
+
+/** Standard Endpoint Descriptor */
+struct usb_ep_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint8_t bEndpointAddress;
+    uint8_t bmAttributes;
+    uint16_t wMaxPacketSize;
+    uint8_t bInterval;
+} __packed;
+
+struct string_descriptor_zero {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint16_t wBcdLang[];
+} __packed;
+
+struct string_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint16_t bString[];
+} __packed;
+
+#define ROM_MAX_CFG_DESC_CNT 1
+
+struct rom_usb_descriptors {
+    const struct usb_device_descriptor *device_descr;
+    const void *config_descr[ROM_MAX_CFG_DESC_CNT];
+    int string_count; // including string_descriptor_zero
+    const struct string_descriptor_zero *string0_descr;
+    const struct string_descriptor *string_descrs[];
+};
+
+/* Descriptors defined in the ROM */
+extern struct usb_device_descriptor general_device_descr;
+extern const void* acm_config_descr;
+extern const void* dfu_config_descr;
+extern const struct string_descriptor str_manu_descr;
+extern const struct string_descriptor str_prod_descr;
+extern const struct string_descriptor_zero string0_descr;
+extern const struct rom_usb_descriptors acm_usb_descriptors;
+extern const struct rom_usb_descriptors dfu_usb_descriptors;
+extern const struct rom_usb_descriptors *rom_usb_curr_desc;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_dc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_dc.h
new file mode 100644
index 00000000000..f20e897c71a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_dc.h
@@ -0,0 +1,392 @@
+/* usb_dc.h - USB device controller driver interface */
+
+/*
+ * Copyright (c) 2016 Intel Corporation.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief USB device controller APIs
+ *
+ * This file contains the USB device controller APIs. All device controller
+ * drivers should implement the APIs described in this file.
+ */
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * USB endpoint direction and number.
+ */
+
+#define USB_EP_DIR_MASK 0x80
+#define USB_EP_DIR_IN   0x80
+#define USB_EP_DIR_OUT  0x00
+
+/**
+ * USB Driver Status Codes
+ */
+enum usb_dc_status_code {
+    USB_DC_ERROR,        /* USB error reported by the controller */
+    USB_DC_RESET,        /* USB reset */
+    /* USB connection established, hardware enumeration is completed */
+    USB_DC_CONNECTED,
+    USB_DC_CONFIGURED,   /* USB configuration done */
+    USB_DC_DISCONNECTED, /* USB connection lost */
+    USB_DC_SUSPEND,      /* USB connection suspended by the HOST */
+    USB_DC_RESUME,       /* USB connection resumed by the HOST */
+    USB_DC_INTERFACE,    /* USB interface selected */
+    USB_DC_SET_HALT,     /* Set Feature ENDPOINT_HALT received */
+    USB_DC_CLEAR_HALT,   /* Clear Feature ENDPOINT_HALT received */
+    USB_DC_UNKNOWN       /* Initial USB connection status */
+};
+
+/**
+ * USB Endpoint Callback Status Codes
+ */
+enum usb_dc_ep_cb_status_code {
+    USB_DC_EP_SETUP,    /* SETUP received */
+    /* Out transaction on this EP, data is available for read */
+    USB_DC_EP_DATA_OUT,
+    USB_DC_EP_DATA_IN,  /* In transaction done on this EP */
+};
+
+/**
+ * USB Endpoint type
+ */
+enum usb_dc_ep_type {
+    USB_DC_EP_CONTROL = 0,  /* Control type endpoint */
+    USB_DC_EP_ISOCHRONOUS,  /* Isochronous type endpoint */
+    USB_DC_EP_BULK,         /* Bulk type endpoint */
+    USB_DC_EP_INTERRUPT     /* Interrupt type endpoint  */
+};
+
+/**
+ * USB Endpoint Configuration.
+ */
+struct usb_dc_ep_cfg_data {
+    /** The number associated with the EP in the device
+     *  configuration structure
+     *       IN  EP = 0x80 | \<endpoint number\>
+     *       OUT EP = 0x00 | \<endpoint number\>
+     */
+    uint8_t ep_addr;
+    uint16_t ep_mps;             /** Endpoint max packet size */
+    enum usb_dc_ep_type ep_type; /** Endpoint type */
+};
+
+/**
+ * Callback function signature for the USB Endpoint status
+ */
+typedef void (*usb_dc_ep_callback)(uint8_t ep,
+                                   enum usb_dc_ep_cb_status_code cb_status);
+
+/**
+ * Callback function signature for the device
+ */
+typedef void (*usb_dc_status_callback)(enum usb_dc_status_code cb_status,
+                                       uint8_t *param);
+
+/**
+ * @brief attach USB for device connection
+ *
+ * Function to attach USB for device connection. Upon success, the USB PLL
+ * is enabled, and the USB device is now capable of transmitting and receiving
+ * on the USB bus and of generating interrupts.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_attach(void);
+
+/**
+ * @brief detach the USB device
+ *
+ * Function to detach the USB device. Upon success, the USB hardware PLL
+ * is powered down and USB communication is disabled.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_detach(void);
+
+/**
+ * @brief reset the USB device
+ *
+ * This function returns the USB device and firmware back to it's initial state.
+ * N.B. the USB PLL is handled by the usb_detach function
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_reset(void);
+
+/**
+ * @brief set USB device address
+ *
+ * @param[in] addr device address
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_set_address(const uint8_t addr);
+
+/**
+ * @brief set USB device controller status callback
+ *
+ * Function to set USB device controller status callback. The registered
+ * callback is used to report changes in the status of the device controller.
+ *
+ * @param[in] cb callback function
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_set_status_callback(const usb_dc_status_callback cb);
+
+/**
+ * @brief check endpoint capabilities
+ *
+ * Function to check capabilities of an endpoint. usb_dc_ep_cfg_data structure
+ * provides the endpoint configuration parameters: endpoint address,
+ * endpoint maximum packet size and endpoint type.
+ * The driver should check endpoint capabilities and return 0 if the
+ * endpoint configuration is possible.
+ *
+ * @param[in] cfg Endpoint config
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_check_cap(const struct usb_dc_ep_cfg_data *const cfg);
+
+/**
+ * @brief configure endpoint
+ *
+ * Function to configure an endpoint. usb_dc_ep_cfg_data structure provides
+ * the endpoint configuration parameters: endpoint address, endpoint maximum
+ * packet size and endpoint type.
+ *
+ * @param[in] cfg Endpoint config
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_configure(const struct usb_dc_ep_cfg_data *const cfg);
+
+/**
+ * @brief set stall condition for the selected endpoint
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_set_stall(const uint8_t ep);
+
+/**
+ * @brief clear stall condition for the selected endpoint
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_clear_stall(const uint8_t ep);
+
+/**
+ * @brief check if selected endpoint is stalled
+ *
+ * @param[in]  ep       Endpoint address corresponding to the one
+ *                      listed in the device configuration table
+ * @param[out] stalled  Endpoint stall status
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_is_stalled(const uint8_t ep, uint8_t *const stalled);
+
+/**
+ * @brief halt the selected endpoint
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_halt(const uint8_t ep);
+
+/**
+ * @brief enable the selected endpoint
+ *
+ * Function to enable the selected endpoint. Upon success interrupts are
+ * enabled for the corresponding endpoint and the endpoint is ready for
+ * transmitting/receiving data.
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_enable(const uint8_t ep);
+
+/**
+ * @brief disable the selected endpoint
+ *
+ * Function to disable the selected endpoint. Upon success interrupts are
+ * disabled for the corresponding endpoint and the endpoint is no longer able
+ * for transmitting/receiving data.
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_disable(const uint8_t ep);
+
+/**
+ * @brief flush the selected endpoint
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_flush(const uint8_t ep);
+
+/**
+ * @brief write data to the specified endpoint
+ *
+ * This function is called to write data to the specified endpoint. The supplied
+ * usb_ep_callback function will be called when data is transmitted out.
+ *
+ * @param[in]  ep        Endpoint address corresponding to the one
+ *                       listed in the device configuration table
+ * @param[in]  data      pointer to data to write
+ * @param[in]  data_len  length of data requested to write. This may
+ *                       be zero for a zero length status packet.
+ * @param[out] ret_bytes bytes scheduled for transmission. This value
+ *                       may be NULL if the application expects all
+ *                       bytes to be written
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_write(const uint8_t ep, const uint8_t *const data,
+                    const uint32_t data_len, uint32_t *const ret_bytes);
+
+
+
+/**
+ * @brief Indicate if the write to an IN endpoint (using usb_dc_ep_write) would block
+ * to wait until the endpoint has enoug space
+ *
+ * @param[in]  ep        Endpoint address corresponding to the one
+ *                       listed in the device configuration table
+ *
+ * @return 0 when writable, 0 when not, negative errno code on fail.
+ */
+int usb_dc_ep_write_would_block(const uint8_t ep);
+
+
+/**
+ * @brief read data from the specified endpoint
+ *
+ * This function is called by the Endpoint handler function, after an OUT
+ * interrupt has been received for that EP. The application must only call this
+ * function through the supplied usb_ep_callback function. This function clears
+ * the ENDPOINT NAK, if all data in the endpoint FIFO has been read,
+ * so as to accept more data from host.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         pointer to data buffer to write to
+ * @param[in]  max_data_len max length of data to read
+ * @param[out] read_bytes   Number of bytes read. If data is NULL and
+ *                          max_data_len is 0 the number of bytes
+ *                          available for read should be returned.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_read(const uint8_t ep, uint8_t *const data,
+                   const uint32_t max_data_len, uint32_t *const read_bytes);
+
+/**
+ * @brief set callback function for the specified endpoint
+ *
+ * Function to set callback function for notification of data received and
+ * available to application or transmit done on the selected endpoint,
+ * NULL if callback not required by application code.
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ * @param[in] cb callback function
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_set_callback(const uint8_t ep, const usb_dc_ep_callback cb);
+
+/**
+ * @brief read data from the specified endpoint
+ *
+ * This is similar to usb_dc_ep_read, the difference being that, it doesn't
+ * clear the endpoint NAKs so that the consumer is not bogged down by further
+ * upcalls till he is done with the processing of the data. The caller should
+ * reactivate ep by invoking usb_dc_ep_read_continue() do so.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         pointer to data buffer to write to
+ * @param[in]  max_data_len max length of data to read
+ * @param[out] read_bytes   Number of bytes read. If data is NULL and
+ *                          max_data_len is 0 the number of bytes
+ *                          available for read should be returned.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
+                        uint32_t *read_bytes);
+
+
+/**
+ * @brief Continue reading data from the endpoint
+ *
+ * Clear the endpoint NAK and enable the endpoint to accept more data
+ * from the host. Usually called after usb_dc_ep_read_wait() when the consumer
+ * is fine to accept more data. Thus these calls together acts as flow control
+ * mechanism.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_dc_ep_read_continue(uint8_t ep);
+
+/**
+ * @brief Get endpoint max packet size
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ *
+ * @return enpoint max packet size (mps)
+ */
+int usb_dc_ep_mps(uint8_t ep);
+
+
+
+//Hack - fake interrupts by pollinfg
+void usb_dc_check_poll_for_interrupts(void);
+
+
+//Prepare for USB persist. You should reboot after this.
+int usb_dc_prepare_persist(void);
+
+
+void usb_dw_isr_handler(void);
+
+
+int usb_dc_ep_write_would_block(const uint8_t ep);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_descriptor.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_descriptor.h
new file mode 100644
index 00000000000..1b20ef80f0c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_descriptor.h
@@ -0,0 +1,34 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define USB_DESCRIPTOR_TYPE_ACM 0
+#define USB_DESCRIPTOR_TYPE_DFU 1
+
+void usb_set_current_descriptor(int descriptor_type);
+
+bool usb_get_descriptor(uint16_t type_index, uint16_t lang_id,
+                        int32_t *len, uint8_t **data);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_device.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_device.h
new file mode 100644
index 00000000000..5564d41e92f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_device.h
@@ -0,0 +1,401 @@
+/*
+ *  LPCUSB, an USB device driver for LPC microcontrollers
+ *  Copyright (C) 2006 Bertrik Sikken (bertrik@sikken.nl)
+ *  Copyright (c) 2016 Intel Corporation
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ *  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ *  OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief USB device core layer APIs and structures
+ *
+ * This file contains the USB device core layer APIs and structures.
+ */
+
+#pragma once
+
+#include <stddef.h>
+#include <sys/cdefs.h>
+#include "usb_dc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*************************************************************************
+ *  USB configuration
+ **************************************************************************/
+
+#define MAX_PACKET_SIZE0    64        /**< maximum packet size for EP 0 */
+//Note: for FS this should be 8, 16, 32, 64 bytes. HS can go up to 512.
+
+/*************************************************************************
+ *  USB application interface
+ **************************************************************************/
+
+/** setup packet definitions */
+struct usb_setup_packet {
+    uint8_t bmRequestType;  /**< characteristics of the specific request */
+    uint8_t bRequest;       /**< specific request */
+    uint16_t wValue;        /**< request specific parameter */
+    uint16_t wIndex;        /**< request specific parameter */
+    uint16_t wLength;       /**< length of data transferred in data phase */
+} __packed;
+
+
+_Static_assert(sizeof(struct usb_setup_packet) == 8, "USB setup packet struct size error");
+
+/**
+ * Callback function signature for the device
+ */
+typedef void (*usb_status_callback)(enum usb_dc_status_code status_code,
+                                    uint8_t *param);
+
+/**
+ * Callback function signature for the USB Endpoint status
+ */
+typedef void (*usb_ep_callback)(uint8_t ep,
+                                enum usb_dc_ep_cb_status_code cb_status);
+
+/**
+ * Function which handles Class specific requests corresponding to an
+ * interface number specified in the device descriptor table
+ */
+typedef int (*usb_request_handler) (struct usb_setup_packet *detup,
+                                    int32_t *transfer_len, uint8_t **payload_data);
+
+/**
+ * Function for interface runtime configuration
+ */
+typedef void (*usb_interface_config)(uint8_t bInterfaceNumber);
+
+/*
+ * USB Endpoint Configuration
+ */
+struct usb_ep_cfg_data {
+    /**
+     * Callback function for notification of data received and
+     * available to application or transmit done, NULL if callback
+     * not required by application code
+     */
+    usb_ep_callback ep_cb;
+    /**
+     * The number associated with the EP in the device configuration
+     * structure
+     *   IN  EP = 0x80 | \<endpoint number\>
+     *   OUT EP = 0x00 | \<endpoint number\>
+     */
+    uint8_t ep_addr;
+};
+
+/**
+ * USB Interface Configuration
+ */
+struct usb_interface_cfg_data {
+    /** Handler for USB Class specific Control (EP 0) communications */
+    usb_request_handler class_handler;
+    /** Handler for USB Vendor specific commands */
+    usb_request_handler vendor_handler;
+    /**
+     * The custom request handler gets a first chance at handling
+     * the request before it is handed over to the 'chapter 9' request
+     * handler
+     */
+    usb_request_handler custom_handler;
+    /**
+     * This data area, allocated by the application, is used to store
+     * Class specific command data and must be large enough to store the
+     * largest payload associated with the largest supported Class'
+     * command set. This data area may be used for USB IN or OUT
+     * communications
+     */
+    uint8_t *payload_data;
+    /**
+     * This data area, allocated by the application, is used to store
+     * Vendor specific payload
+     */
+    uint8_t *vendor_data;
+};
+
+/*
+ * @brief USB device configuration
+ *
+ * The Application instantiates this with given parameters added
+ * using the "usb_set_config" function. Once this function is called
+ * changes to this structure will result in undefined behaviour. This structure
+ * may only be updated after calls to usb_deconfig
+ */
+struct usb_cfg_data {
+    /**
+     * USB device description, see
+     * http://www.beyondlogic.org/usbnutshell/usb5.shtml#DeviceDescriptors
+     */
+    const uint8_t *usb_device_description;
+    /** Pointer to interface descriptor */
+    const void *interface_descriptor;
+    /** Function for interface runtime configuration */
+    usb_interface_config interface_config;
+    /** Callback to be notified on USB connection status change */
+    usb_status_callback cb_usb_status;
+    /** USB interface (Class) handler and storage space */
+    struct usb_interface_cfg_data interface;
+    /** Number of individual endpoints in the device configuration */
+    uint8_t num_endpoints;
+    /**
+     * Pointer to an array of endpoint structs of length equal to the
+     * number of EP associated with the device description,
+     * not including control endpoints
+     */
+    struct usb_ep_cfg_data *endpoint;
+};
+
+/*
+ * @brief configure USB controller
+ *
+ * Function to configure USB controller.
+ * Configuration parameters must be valid or an error is returned
+ *
+ * @param[in] config Pointer to configuration structure
+ *
+ * @return 0 on success, negative errno code on fail
+ */
+int usb_set_config(struct usb_cfg_data *config);
+
+/*
+ * @brief return the USB device to it's initial state
+ *
+ * @return 0 on success, negative errno code on fail
+ */
+int usb_deconfig(void);
+
+/*
+ * @brief enable USB for host/device connection
+ *
+ * Function to enable USB for host/device connection.
+ * Upon success, the USB module is no longer clock gated in hardware,
+ * it is now capable of transmitting and receiving on the USB bus and
+ * of generating interrupts.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_enable(struct usb_cfg_data *config);
+
+/*
+ * @brief disable the USB device.
+ *
+ * Function to disable the USB device.
+ * Upon success, the specified USB interface is clock gated in hardware,
+ * it is no longer capable of generating interrupts.
+ *
+ * @return 0 on success, negative errno code on fail
+ */
+int usb_disable(void);
+
+/*
+ * @brief Check if a write to an in ep would block until there is enough space
+ * in the fifo
+ *
+ * @param[in]  ep        Endpoint address corresponding to the one listed in the
+ *                       device configuration table
+ *
+ * @return 0 if free to write, 1 if a write would block, negative errno code on fail
+ */
+int usb_write_would_block(uint8_t ep);
+
+/*
+ * @brief write data to the specified endpoint
+ *
+ * Function to write data to the specified endpoint. The supplied
+ * usb_ep_callback will be called when transmission is done.
+ *
+ * @param[in]  ep        Endpoint address corresponding to the one listed in the
+ *                       device configuration table
+ * @param[in]  data      Pointer to data to write
+ * @param[in]  data_len  Length of data requested to write. This may be zero for
+ *                       a zero length status packet.
+ * @param[out] bytes_ret Bytes written to the EP FIFO. This value may be NULL if
+ *                       the application expects all bytes to be written
+ *
+ * @return 0 on success, negative errno code on fail
+ */
+int usb_write(uint8_t ep, const uint8_t *data, uint32_t data_len,
+              uint32_t *bytes_ret);
+
+/*
+ * @brief read data from the specified endpoint
+ *
+ * This function is called by the Endpoint handler function, after an
+ * OUT interrupt has been received for that EP. The application must
+ * only call this function through the supplied usb_ep_callback function.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one listed in
+ *                          the device configuration table
+ * @param[in]  data         Pointer to data buffer to write to
+ * @param[in]  max_data_len Max length of data to read
+ * @param[out] ret_bytes    Number of bytes read. If data is NULL and
+ *                          max_data_len is 0 the number of bytes available
+ *                          for read is returned.
+ *
+ * @return  0 on success, negative errno code on fail
+ */
+int usb_read(uint8_t ep, uint8_t *data, uint32_t max_data_len,
+             uint32_t *ret_bytes);
+
+/*
+ * @brief set STALL condition on the specified endpoint
+ *
+ * This function is called by USB device class handler code to set stall
+ * conditionin on endpoint.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one listed in
+ *                          the device configuration table
+ *
+ * @return  0 on success, negative errno code on fail
+ */
+int usb_ep_set_stall(uint8_t ep);
+
+
+/*
+ * @brief clears STALL condition on the specified endpoint
+ *
+ * This function is called by USB device class handler code to clear stall
+ * conditionin on endpoint.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one listed in
+ *                          the device configuration table
+ *
+ * @return  0 on success, negative errno code on fail
+ */
+int usb_ep_clear_stall(uint8_t ep);
+
+/**
+ * @brief read data from the specified endpoint
+ *
+ * This is similar to usb_ep_read, the difference being that, it doesn't
+ * clear the endpoint NAKs so that the consumer is not bogged down by further
+ * upcalls till he is done with the processing of the data. The caller should
+ * reactivate ep by invoking usb_ep_read_continue() do so.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         pointer to data buffer to write to
+ * @param[in]  max_data_len max length of data to read
+ * @param[out] read_bytes   Number of bytes read. If data is NULL and
+ *                          max_data_len is 0 the number of bytes
+ *                          available for read should be returned.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
+                     uint32_t *read_bytes);
+
+
+/**
+ * @brief Continue reading data from the endpoint
+ *
+ * Clear the endpoint NAK and enable the endpoint to accept more data
+ * from the host. Usually called after usb_ep_read_wait() when the consumer
+ * is fine to accept more data. Thus these calls together acts as flow control
+ * mechanism.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_ep_read_continue(uint8_t ep);
+
+/**
+ * Callback function signature for transfer completion.
+ */
+typedef void (*usb_transfer_callback)(uint8_t ep, int tsize, void *priv);
+
+/* USB transfer flags */
+#define USB_TRANS_READ       BIT(0)   /** Read transfer flag */
+#define USB_TRANS_WRITE      BIT(1)   /** Write transfer flag */
+#define USB_TRANS_NO_ZLP     BIT(2)   /** No zero-length packet flag */
+
+/**
+ * @brief Transfer management endpoint callback
+ *
+ * If a USB class driver wants to use high-level transfer functions, driver
+ * needs to register this callback as usb endpoint callback.
+ */
+void usb_transfer_ep_callback(uint8_t ep, enum usb_dc_ep_cb_status_code);
+
+/**
+ * @brief Start a transfer
+ *
+ * Start a usb transfer to/from the data buffer. This function is asynchronous
+ * and can be executed in IRQ context. The provided callback will be called
+ * on transfer completion (or error) in thread context.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         Pointer to data buffer to write-to/read-from
+ * @param[in]  dlen         Size of data buffer
+ * @param[in]  flags        Transfer flags (USB_TRANS_READ, USB_TRANS_WRITE...)
+ * @param[in]  cb           Function called on transfer completion/failure
+ * @param[in]  priv         Data passed back to the transfer completion callback
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usb_transfer(uint8_t ep, uint8_t *data, size_t dlen, unsigned int flags,
+                 usb_transfer_callback cb, void *priv);
+
+/**
+ * @brief Start a transfer and block-wait for completion
+ *
+ * Synchronous version of usb_transfer, wait for transfer completion before
+ * returning.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         Pointer to data buffer to write-to/read-from
+ * @param[in]  dlen         Size of data buffer
+ * @param[in]  flags        Transfer flags
+
+ *
+ * @return number of bytes transferred on success, negative errno code on fail.
+ */
+int usb_transfer_sync(uint8_t ep, uint8_t *data, size_t dlen, unsigned int flags);
+
+/**
+ * @brief Cancel any ongoing transfer on the specified endpoint
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+void usb_cancel_transfer(uint8_t ep);
+
+
+void usb_dev_resume(int configuration);
+int usb_dev_get_configuration(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_dfu.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_dfu.h
new file mode 100644
index 00000000000..dec7ea93a39
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_dfu.h
@@ -0,0 +1,147 @@
+/***************************************************************************
+ *
+ * Copyright(c) 2015,2016 Intel Corporation.
+ * Copyright(c) 2017 PHYTEC Messtechnik GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ***************************************************************************/
+
+/**
+ * @file
+ * @brief USB Device Firmware Upgrade (DFU) public header
+ *
+ * Header follows the Device Class Specification for
+ * Device Firmware Upgrade Version 1.1
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stddef.h>
+#include "usb_device.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** DFU Class Subclass */
+#define DFU_SUBCLASS            0x01
+
+/** DFU Class runtime Protocol */
+#define DFU_RT_PROTOCOL         0x01
+
+/** DFU Class DFU mode Protocol */
+#define DFU_MODE_PROTOCOL       0x02
+
+/**
+ * @brief DFU Class Specific Requests
+ */
+#define DFU_DETACH          0x00
+#define DFU_DNLOAD          0x01
+#define DFU_UPLOAD          0x02
+#define DFU_GETSTATUS           0x03
+#define DFU_CLRSTATUS           0x04
+#define DFU_GETSTATE            0x05
+#define DFU_ABORT           0x06
+
+/** DFU FUNCTIONAL descriptor type */
+#define DFU_FUNC_DESC           0x21
+
+/** DFU attributes DFU Functional Descriptor */
+#define DFU_ATTR_WILL_DETACH        0x08
+#define DFU_ATTR_MANIFESTATION_TOLERANT 0x04
+#define DFU_ATTR_CAN_UPLOAD     0x02
+#define DFU_ATTR_CAN_DNLOAD     0x01
+
+/** DFU Specification release */
+#define DFU_VERSION         0x0110
+
+/** Run-Time Functional Descriptor */
+struct dfu_runtime_descriptor {
+    uint8_t bLength;
+    uint8_t bDescriptorType;
+    uint8_t bmAttributes;
+    uint16_t wDetachTimeOut;
+    uint16_t wTransferSize;
+    uint16_t bcdDFUVersion;
+} __packed;
+
+/** bStatus values for the DFU_GETSTATUS response */
+enum dfu_status {
+    statusOK,
+    errTARGET,
+    errFILE,
+    errWRITE,
+    errERASE,
+    errCHECK_ERASED,
+    errPROG,
+    errVERIFY,
+    errADDRESS,
+    errNOTDONE,
+    errFIRMWARE,
+    errVENDOR,
+    errUSB,
+    errPOR,
+    errUNKNOWN,
+    errSTALLEDPKT
+};
+
+/** bState values for the DFU_GETSTATUS response */
+enum dfu_state {
+    appIDLE,
+    appDETACH,
+    dfuIDLE,
+    dfuDNLOAD_SYNC,
+    dfuDNBUSY,
+    dfuDNLOAD_IDLE,
+    dfuMANIFEST_SYNC,
+    dfuMANIFEST,
+    dfuMANIFEST_WAIT_RST,
+    dfuUPLOAD_IDLE,
+    dfuERROR,
+};
+
+/*
+ These callbacks are made public so the ACM driver can call them to handle the switch to DFU.
+*/
+
+int dfu_class_handle_req(struct usb_setup_packet *pSetup,
+                         int32_t *data_len, uint8_t **data);
+void dfu_status_cb(enum usb_dc_status_code status, uint8_t *param);
+int usb_dfu_init(void);
+int dfu_custom_handle_req(struct usb_setup_packet *pSetup,
+                          int32_t *data_len, uint8_t **data);
+
+
+typedef void(*usb_dfu_detach_routine_t)(int delay);
+void usb_dfu_set_detach_cb(usb_dfu_detach_routine_t cb);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_os_glue.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_os_glue.h
new file mode 100644
index 00000000000..9abad6d0b96
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_os_glue.h
@@ -0,0 +1,40 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+typedef void(*usb_osglue_intdisena_routine_t)(void);
+typedef int(*usb_osglue_wait_routine_t)(int delay_us);
+
+typedef struct {
+    /* Disable USB interrupt */
+    usb_osglue_intdisena_routine_t int_dis_proc;
+    /* Enable USB interrupt */
+    usb_osglue_intdisena_routine_t int_ena_proc;
+    /* Wait for a set amount of uS. Return the amount actually waited. If delay_us is 0, just yield.*/
+    usb_osglue_wait_routine_t wait_proc;
+} usb_osglue_data_t;
+
+extern usb_osglue_data_t s_usb_osglue;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_persist.h b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_persist.h
new file mode 100644
index 00000000000..bcf11b7c48c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp32s3/rom/usb/usb_persist.h
@@ -0,0 +1,50 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// USB persistence flags.
+
+//This bit indicates persistence has been enabled, that is, the USB initialization routines should not
+//reset the USB device as the device still is initialized and the host detected it with the same cdcacm/dfu
+//descriptor as the ROM uses; we can just re-initialize the software side and have at 'er.
+#define USBDC_PERSIST_ENA (1<<31)
+
+//This bit indicates to the ROM that we rebooted because of a request to go into DFU mode; the ROM should
+//honour this request.
+#define USBDC_BOOT_DFU (1<<30)
+
+
+//This being non-0 indicates a memory location where a 'testament' is stored, aka a piece of text that should be output
+//after a reboot. Can contain core dump info or something.
+#define USBDC_TESTAMENT_LOC_MASK 0x7FFFF //bits 19-0; this is added to a base address of 0x3FF80000.
+
+//The testament is a FIFO. The ROM will output all data between textstart and textend; if textend is lower than textstart it will
+//output everything from textstart to memend, then memstart to textend.
+typedef struct {
+    char *memstart; //start of memory region
+    char *memend;   //end of memory region
+    char *textstart; //start of text to output
+    char *textend;
+} usbdc_testament_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_crc.h b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_crc.h
new file mode 100644
index 00000000000..39787ed1402
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_crc.h
@@ -0,0 +1,124 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**           Notes about CRC API
+ * The ESP32 ROM include some CRC tables and CRC APIs to speed up CRC calculation.
+ * The CRC APIs include CRC8, CRC16, CRC32 algorithms for both little endian and big endian modes.
+ * Here are the polynomials for the algorithms:
+ * CRC-8        x8+x2+x1+1                                              0x07
+ * CRC16-CCITT  x16+x12+x5+1                                            0x1021
+ * CRC32        x32+x26+x23+x22+x16+x12+x11+x10+x8+x7+x5+x4+x2+x1+1     0x04c11db7
+ *
+ * These group of CRC APIs are designed to calculate the data in buffers either continuous or not.
+ * To make it easy, we had added a `~` at the beginning and the end of the functions.
+ * To calculate non-continuous buffers, we can write the code like this:
+ *     init = ~init;
+ *     crc = crc32_le(init, buf0, length0);
+ *     crc = crc32_le(crc, buf1, length1);
+ *     crc = ~crc;
+ *
+ * However, it is not easy to select which API to use and give the correct parameters.
+ * A specific CRC algorithm will include this parameters: width, polynomials, init, refin, refout, xorout
+ *     refin and refout show the endian of the algorithm:
+ *         if both of them are true, please use the little endian API.
+ *         if both of them are false, please use the big endian API.
+ *     xorout is the value which you need to be xored to the raw result.
+ * However, these group of APIs need one '~' before and after the APIs.
+ *
+ * Here are some examples for CRC16:
+ * CRC-16/CCITT, poly = 0x1021, init = 0x0000, refin = true, refout = true, xorout = 0x0000
+ *     crc = ~crc16_le((uint16_t)~0x0000, buf, length);
+ *
+ * CRC-16/CCITT-FALSE, poly = 0x1021, init = 0xffff, refin = false, refout = false, xorout = 0x0000
+ *     crc = ~crc16_be((uint16_t)~0xffff, buf, length);
+ *
+ * CRC-16/X25, poly = 0x1021, init = 0xffff, refin = true, refout = true, xorout = 0xffff
+ *     crc = (~crc16_le((uint16_t)~(0xffff), buf, length))^0xffff;
+ *
+ * CRC-16/XMODEM, poly= 0x1021, init = 0x0000, refin = false, refout = false, xorout = 0x0000
+ *     crc = ~crc16_be((uint16_t)~0x0000, buf, length);
+ *
+ */
+
+/**
+ * @brief CRC32 value in little endian.
+ *
+ * @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+ * @param buf: Data buffer that used to calculate the CRC value
+ * @param len: Length of the data buffer
+ * @return CRC32 value
+ */
+uint32_t esp_rom_crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+ * @brief CRC32 value in big endian.
+ *
+ * @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+ * @param buf: Data buffer that used to calculate the CRC value
+ * @param len: Length of the data buffer
+ * @return CRC32 value
+ */
+uint32_t esp_rom_crc32_be(uint32_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+ * @brief CRC16 value in little endian.
+ *
+ * @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+ * @param buf: Data buffer that used to calculate the CRC value
+ * @param len: Length of the data buffer
+ * @return CRC16 value
+ */
+uint16_t esp_rom_crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+ * @brief CRC16 value in big endian.
+ *
+ * @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+ * @param buf: Data buffer that used to calculate the CRC value
+ * @param len: Length of the data buffer
+ * @return CRC16 value
+ */
+uint16_t esp_rom_crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+ * @brief CRC8 value in little endian.
+ *
+ * @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+ * @param buf: Data buffer that used to calculate the CRC value
+ * @param len: Length of the data buffer
+ * @return CRC8 value
+ */
+uint8_t esp_rom_crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len);
+
+/**
+ * @brief CRC8 value in big endian.
+ *
+ * @param crc: Initial CRC value (result of last calculation or 0 for the first time)
+ * @param buf: Data buffer that used to calculate the CRC value
+ * @param len: Length of the data buffer
+ * @return CRC8 value
+ */
+uint8_t esp_rom_crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_efuse.h b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_efuse.h
new file mode 100644
index 00000000000..907e175ecad
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_efuse.h
@@ -0,0 +1,68 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#define ESP_ROM_EFUSE_FLASH_DEFAULT_SPI  (0)
+#define ESP_ROM_EFUSE_FLASH_DEFAULT_HSPI (1)
+
+/**
+ * @brief A CRC8 algorithm used for MAC addresses stored in eFuse
+ *
+ * @param data Pointer to the original data
+ * @param len Data length in byte
+ * @return uint8_t CRC value
+ */
+uint8_t esp_rom_efuse_mac_address_crc8(const uint8_t *data, uint32_t len);
+
+/**
+ * @brief Get SPI Flash GPIO pin configurations from eFuse
+ *
+ * @return uint32_t
+ *          - 0: default SPI pins (ESP_ROM_EFUSE_FLASH_DEFAULT_SPI)
+ *          - 1: default HSPI pins (ESP_ROM_EFUSE_FLASH_DEFAULT_HSPI)
+ *          - Others: Customized pin configuration mask. Pins are encoded as per the
+ *                    EFUSE_SPICONFIG_RET_SPICLK, EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID,
+ *                    EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
+ *
+ * @note WP pin (for quad I/O modes) is not saved in eFuse and not returned by this function.
+ */
+uint32_t esp_rom_efuse_get_flash_gpio_info(void);
+
+/**
+ * @brief Get SPI Flash WP pin information from eFuse
+ *
+ * @return uint32_t
+ *      - 0x3F: invalid GPIO number
+ *      - 0~46: valid GPIO number
+ */
+uint32_t esp_rom_efuse_get_flash_wp_gpio(void);
+
+/**
+ * @brief Read eFuse to check whether secure boot has been enabled or not
+ *
+ * @return true if secure boot is enabled, otherwise false
+ */
+bool esp_rom_efuse_is_secure_boot_enabled(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_gpio.h b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_gpio.h
new file mode 100644
index 00000000000..ce4bb765168
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_gpio.h
@@ -0,0 +1,87 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/gpio_pins.h"  //for GPIO_MATRIX_CONST_ONE_INPUT, GPIO_MATRIX_CONST_ZERO_INPUT
+
+/**
+ * @brief Configure IO Pad as General Purpose IO,
+ *        so that it can be connected to internal Matrix,
+ *        then combined with one or more peripheral signals.
+ *
+ * @param iopad_num IO Pad number
+ */
+void esp_rom_gpio_pad_select_gpio(uint32_t iopad_num);
+
+/**
+ * @brief Enable internal pull up, and disable internal pull down.
+ *
+ * @param iopad_num IO Pad number
+ */
+void esp_rom_gpio_pad_pullup_only(uint32_t iopad_num);
+
+/**
+ * @brief Unhold the IO Pad.
+ * @note When the Pad is set to hold, the state is latched at that moment and won't get changed.
+ *
+ * @param iopad_num IP Pad number
+ */
+void esp_rom_gpio_pad_unhold(uint32_t gpio_num);
+
+/**
+ * @brief Set IO Pad current drive capability.
+ *
+ * @param iopad_num IO Pad number
+ * @param drv Numeric to indicate the capability of current drive
+ *      - 0: 5mA
+ *      - 1: 10mA
+ *      - 2: 20mA
+ *      - 3: 40mA
+ */
+void esp_rom_gpio_pad_set_drv(uint32_t iopad_num, uint32_t drv);
+
+/**
+ * @brief Combine a GPIO input with a peripheral signal, which tagged as input attribute.
+ *
+ * @note There's no limitation on the number of signals that a GPIO can combine with.
+ *
+ * @param gpio_num GPIO number, especially, `GPIO_MATRIX_CONST_ZERO_INPUT` means connect logic 0 to signal
+ *                                          `GPIO_MATRIX_CONST_ONE_INPUT` means connect logic 1 to signal
+ * @param signal_idx Peripheral signal index (tagged as input attribute)
+ * @param inv  Whether the GPIO input to be inverted or not
+ */
+void esp_rom_gpio_connect_in_signal(uint32_t gpio_num, uint32_t signal_idx, bool inv);
+
+/**
+ * @brief Combine a peripheral signal which tagged as output attribute with a GPIO.
+ *
+ * @note There's no limitation on the number of signals that a GPIO can combine with.
+ *
+ * @param gpio_num GPIO number
+ * @param signal_idx Peripheral signal index (tagged as output attribute)
+ * @param out_inv Whether to signal to be inverted or not
+ * @param oen_inv Whether the output enable control is inverted or not
+ */
+void esp_rom_gpio_connect_out_signal(uint32_t gpio_num, uint32_t signal_idx, bool out_inv, bool oen_inv);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_md5.h b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_md5.h
new file mode 100644
index 00000000000..0deaca47148
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_md5.h
@@ -0,0 +1,65 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * The MD5 functions calculate a 128-bit cryptographic digest for any number of input bytes.
+ */
+
+/**
+ * @brief Type defined for MD5 context
+ *
+ */
+typedef struct MD5Context {
+    uint32_t buf[4];
+    uint32_t bits[2];
+    uint8_t in[64];
+} md5_context_t;
+
+#define ESP_ROM_MD5_DIGEST_LEN 16
+
+/**
+ * @brief Initialize the MD5 context
+ *
+ * @param context Context object allocated by user
+ */
+void esp_rom_md5_init(md5_context_t *context);
+
+/**
+ * @brief Running MD5 algorithm over input data
+ *
+ * @param context MD5 context which has been initialized by `MD5Init`
+ * @param buf Input buffer
+ * @param len Buffer length in bytes
+ */
+void esp_rom_md5_update(md5_context_t *context, const void *buf, uint32_t len);
+
+/**
+ * @brief Extract the MD5 result, and erase the context
+ *
+ * @param digest Where to store the 128-bit digest value
+ * @param context MD5 context
+ */
+void esp_rom_md5_final(uint8_t *digest, md5_context_t *context);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_sys.h b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_sys.h
new file mode 100644
index 00000000000..946cb7af791
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_sys.h
@@ -0,0 +1,65 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "sdkconfig.h"
+#include <stdint.h>
+#include "soc/reset_reasons.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Print formated string to console device
+ * @note float and long long data are not supported!
+ *
+ * @param fmt Format string
+ * @param ... Additional arguments, depending on the format string
+ * @return int: Total number of characters written on success; A negative number on failure.
+ */
+int esp_rom_printf(const char *fmt, ...);
+
+/**
+ * @brief Pauses execution for us microseconds
+ *
+ * @param us Number of microseconds to pause
+ */
+void esp_rom_delay_us(uint32_t us);
+
+/**
+ * @brief esp_rom_printf can print message to different channels simultaneously.
+ *        This function can help install the low level putc function for esp_rom_printf.
+ *
+ * @param channel Channel number (startting from 1)
+ * @param putc Function pointer to the putc implementation. Set NULL can disconnect esp_rom_printf with putc.
+ */
+void esp_rom_install_channel_putc(int channel, void (*putc)(char c));
+
+/**
+ * @brief Install UART1 as the default console channel, equivalent to `esp_rom_install_channel_putc(1, esp_rom_uart_putc)`
+ */
+void esp_rom_install_uart_printf(void);
+
+/**
+ * @brief Get reset reason of CPU
+ *
+ * @param cpu_no CPU number
+ * @return Reset reason code (see in soc/reset_reasons.h)
+ */
+soc_reset_reason_t esp_rom_get_reset_reason(int cpu_no);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_tjpgd.h b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_tjpgd.h
new file mode 100644
index 00000000000..318519ba749
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_tjpgd.h
@@ -0,0 +1,152 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*-----------------------------------------------------------------------------/
+/ TJpgDec - Tiny JPEG Decompressor R0.01b                     (C)ChaN, 2012
+/-----------------------------------------------------------------------------/
+/ The TJpgDec is a generic JPEG decompressor module for tiny embedded systems.
+/ This is a free software that opened for education, research and commercial
+/  developments under license policy of following terms.
+/
+/  Copyright (C) 2012, ChaN, all right reserved.
+/
+/ * The TJpgDec module is a free software and there is NO WARRANTY.
+/ * No restriction on use. You can use, modify and redistribute it for
+/   personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
+/ * Redistributions of source code must retain the above copyright notice.
+/
+/-----------------------------------------------------------------------------*/
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Error code */
+typedef enum {
+    JDR_OK = 0, /* 0: Succeeded */
+    JDR_INTR,   /* 1: Interrupted by output function */
+    JDR_INP,    /* 2: Device error or wrong termination of input stream */
+    JDR_MEM1,   /* 3: Insufficient memory pool for the image */
+    JDR_MEM2,   /* 4: Insufficient stream input buffer */
+    JDR_PAR,    /* 5: Parameter error */
+    JDR_FMT1,   /* 6: Data format error (may be damaged data) */
+    JDR_FMT2,   /* 7: Right format but not supported */
+    JDR_FMT3    /* 8: Not supported JPEG standard */
+} esp_rom_tjpgd_result_t;
+
+/* Rectangular structure */
+typedef struct {
+    uint16_t left;  /* Left end */
+    uint16_t right; /* Right end */
+    uint16_t top;   /* Top end */
+    uint16_t bottom;/* Bottom end */
+} esp_rom_tjpgd_rect_t;
+
+typedef struct JDEC_s esp_rom_tjpgd_dec_t;
+
+/**
+ * @brief Type of user defined input function to read data from input stream
+ * @param dec Specifies the decompression object of the decompression session
+ * @param buffer Specifies the pointer to the read buffer to store the read data. A NULL specifies to remove the data from input stream
+ * @param ndata Specifies number of bytes to read/remove from the input stream
+ *
+ * @return number of bytes read/removed. When a zero is returned, the esp_rom_tjpgd_prepare and esp_rom_tjpgd_decomp function aborts with JDR_INP
+ */
+typedef uint32_t (*esp_rom_tjpgd_input_function_t)(esp_rom_tjpgd_dec_t *dec, uint8_t *buffer, uint32_t ndata);
+
+/**
+ * @brief User defined output function to write decompressed pixels to the output device
+ *
+ * This function is the data output interface of the TJpgDec module.
+ * The corresponding decompression session can be identified by the pointer to the device identifier jdec->device passed to the 5th argument of jd_prepare function.
+ * The bitmap is sent to the frame buffer or display device in this function.
+ * The first pixel in the bitmap is the left-top of the rectangular, the second one is next right and last pixel is the bottom-right of the rectangular.
+ * The size of rectangular varies from 1x1 to 16x16 depends on clipping, scaling and sampling factor of the image.
+ * If the rectangular is out of the frame buffer, it should be clipped in this function.
+ *
+ * The pixel format is currently configured to RGB888
+ *
+ * @param dec Specifies the decompression object of the decompression session
+ * @param bitmap Specifies the RGB bitmap to be output
+ * @param rect Specifies rectangular region in the image to output the RGB bitmap
+ *
+ * @return Normally returns 1. It lets TJpgDec to continue the decompressing process.
+ *         When a 0 is returned, the esp_rom_tjpgd_decomp function aborts with JDR_INTR.
+ *         This is useful to interrupt the decompression process
+ */
+typedef uint32_t (*esp_rom_tjpgd_output_function_t)(esp_rom_tjpgd_dec_t *dec, void *bitmap, esp_rom_tjpgd_rect_t *rect);
+
+struct JDEC_s {
+    uint32_t dctr;              /* Number of bytes available in the input buffer */
+    uint8_t *dptr;              /* Current data read ptr */
+    uint8_t *inbuf;             /* Bit stream input buffer */
+    uint8_t dmsk;               /* Current bit in the current read byte */
+    uint8_t scale;              /* Output scaling ratio */
+    uint8_t msx, msy;           /* MCU size in unit of block (width, height) */
+    uint8_t qtid[3];            /* Quantization table ID of each component */
+    int16_t dcv[3];             /* Previous DC element of each component */
+    uint16_t nrst;              /* Restart inverval */
+    uint32_t width, height;     /* Size of the input image (pixel) */
+    uint8_t *huffbits[2][2];    /* Huffman bit distribution tables [id][dcac] */
+    uint16_t *huffcode[2][2];   /* Huffman code word tables [id][dcac] */
+    uint8_t *huffdata[2][2];    /* Huffman decoded data tables [id][dcac] */
+    int32_t *qttbl[4];          /* Dequaitizer tables [id] */
+    void *workbuf;              /* Working buffer for IDCT and RGB output */
+    uint8_t *mcubuf;            /* Working buffer for the MCU */
+    void *pool;                 /* Pointer to available memory pool */
+    uint32_t sz_pool;           /* Size of momory pool (bytes available) */
+    esp_rom_tjpgd_input_function_t infunc; /* Pointer to jpeg stream input function */
+    void *device;               /* Pointer to I/O device identifiler for the session */
+};
+
+/* TJpgDec API functions */
+
+/**
+ * @brief Analyzes the JPEG data and create a decompression object for subsequent decompression process.
+ * @param dec Specifies the decompression object to be initialized. The decompression object is used for subsequent decompression process.
+ * @param infunc Specifies the user defined data input function.
+ * @param work Specifies pointer to the work area for this session. It should be aligned to word boundary or it can result an exception.
+ * @param sz_work Specifies size of the work area in unit of byte.
+ *                TJpgDec requires upto 3092 bytes of work area depends on the built-in parameter tables of the JPEG image.
+ *                Thus 3092 bytes of work area is sufficient for most case.
+ * @param dev Specifies pointer to the user defined device identifier for this session.
+ *            It is stored to the member device in the decompression object. It can be referred by I/O functions to identify the current session.
+ *            When I/O device is fixed in the project or this feature is not needed, set NULL and do not care about this.
+ *
+ * @return
+ *      - JDR_OK Function succeeded and decompression object is valid.
+ *      - JDR_INP An error occurred in input function due to hard error or wrong stream termination.
+ *      - JDR_MEM1 Insufficient work area for this JPEG image.
+ *      - JDR_MEM2 Insufficient input buffer for this JPEG image. JD_SZBUF may be too small.
+ *      - JDR_PAR Parameter error. Given pointer to the work area is NULL.
+ *      - JDR_FMT1 Data format error. The JPEG data can be collapsed.
+ *      - JDR_FMT2 Right format but not supported. May be a grayscale image.
+ *      - JDR_FMT3 Not supported JPEG standard. May be a progressive JPEG image.
+ */
+esp_rom_tjpgd_result_t esp_rom_tjpgd_prepare(esp_rom_tjpgd_dec_t *dec, esp_rom_tjpgd_input_function_t infunc, void *work, uint32_t sz_work, void *dev);
+
+/**
+ * @brief Decompress the JPEG image and output it as RGB data.
+ * @param dec Specifies the valid decompressor object.
+ * @param outfunc Specifies the user defined data output function. The esp_rom_tjpgd_decomp function calls this function to output the decompressed JPEG image in RGB form.
+ * @param scale Specifies scaling factor N for output. The output image is descaled to 1 / 2 ^ N (N = 0 to 3).
+ *
+ * @return
+ *      - JDR_OK Function succeeded.
+ *      - JDR_INTR The decompression process is interrupted by output function.
+ *      - JDR_INP An error occured in input function due to hard error or wrong stream termination.
+ *      - JDR_PAR Parameter error. Given scale factor is invalid.
+ *      - JDR_FMT1 Data format error. The JPEG data can be collapted.
+ */
+esp_rom_tjpgd_result_t esp_rom_tjpgd_decomp(esp_rom_tjpgd_dec_t *dec, esp_rom_tjpgd_output_function_t outfunc, uint8_t scale);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_uart.h b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_uart.h
new file mode 100644
index 00000000000..a07740c1473
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/esp_rom_uart.h
@@ -0,0 +1,109 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+#define ESP_ROM_CDC_ACM_WORK_BUF_MIN 128
+
+typedef enum {
+    ESP_ROM_UART_0,
+    ESP_ROM_UART_1,
+    ESP_ROM_UART_USB
+} esp_rom_uart_num_t;
+
+/**
+ * @brief Wait for UART TX FIFO is empty and all data has been sent out.
+ *
+ * @param uart_no UART port number
+ */
+void esp_rom_uart_tx_wait_idle(uint8_t uart_no);
+
+/**
+ * @brief Set clock source and baud rate for UART.
+ *
+ * @param uart_no UART port number
+ * @param clock_hz Source clock (in Hz)
+ * @param baud_rate Baud rate to set
+ */
+void esp_rom_uart_set_clock_baudrate(uint8_t uart_no, uint32_t clock_hz, uint32_t baud_rate);
+
+/**
+ * @brief Wait until UART TX FIFO is empty (i.e. flush TX FIFO)
+ *
+ * @param uart_no UART port number
+ */
+void esp_rom_uart_flush_tx(uint8_t uart_no);
+
+/**
+ * @brief Transmit one character to the console channel.
+ *
+ * @param c Character to send
+ * @return
+ *      - 0 on success
+ *      - 1 on failure
+ */
+int esp_rom_uart_tx_one_char(uint8_t c);
+
+/**
+ * @brief Transmit one character to the console channel.
+ * @note This function is a wrapper over esp_rom_uart_tx_one_char, it can help handle line ending issue by replacing '\n' with '\r\n'.
+ *
+ * @param c Character to send
+ */
+void esp_rom_uart_putc(char c);
+
+/**
+ * @brief Get one character from the console channel.
+ *
+ * @param c Where to store the character
+ * @return
+ *      - 0 on success
+ *      - 1 on failure or no data available
+ */
+int esp_rom_uart_rx_one_char(uint8_t *c);
+
+/**
+ * @brief Get one line of string from console channel (line ending won't be stored in the buffer).
+ *
+ * @param str Where to store the string
+ * @param max_len Maximum length of the buffer (including the NULL delimiter)
+ * @return always return 0 when on success or wait in a loop for rx data
+ */
+int esp_rom_uart_rx_string(uint8_t *str, uint8_t max_len);
+
+/**
+ * @brief Set the UART port used by ets_printf.
+ *
+ * @param uart_no UART port number
+ */
+void esp_rom_uart_set_as_console(uint8_t uart_no);
+
+/**
+ * @brief Initialize the USB ACM UART
+ * @note The ACM working memroy should be at least 128 bytes (ESP_ROM_CDC_ACM_WORK_BUF_MIN) in size.
+ *
+ * @param cdc_acm_work_mem Pointer to the work memroy used for CDC-ACM
+ * @param cdc_acm_work_mem_len Length of work memory
+ */
+void esp_rom_uart_usb_acm_init(void *cdc_acm_work_mem, int cdc_acm_work_mem_len);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_rom/include/linux/soc/reset_reasons.h b/tools/sdk/esp32s3/include/esp_rom/include/linux/soc/reset_reasons.h
new file mode 100644
index 00000000000..7cc86ffddfb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_rom/include/linux/soc/reset_reasons.h
@@ -0,0 +1,31 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Dummy to satisfy the requirement for this type on Linux targets.
+ * Look at other reset_reasons.h files in IDF.
+ */
+typedef enum {
+    RESET_REASON_CHIP_POWER_ON   = 0x01, // Power on reset
+} soc_reset_reason_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_schedule/include/esp_schedule.h b/tools/sdk/esp32s3/include/esp_schedule/include/esp_schedule.h
new file mode 100644
index 00000000000..4b611830a7d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_schedule/include/esp_schedule.h
@@ -0,0 +1,231 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/** Schedule Handle */
+typedef void *esp_schedule_handle_t;
+
+/** Maximum length of the schedule name allowed. This value cannot be more than 16 as it is used for NVS key. */
+#define MAX_SCHEDULE_NAME_LEN 16
+
+/** Callback for schedule trigger
+ *
+ * This callback is called when the schedule is triggered.
+ *
+ * @param[in] handle Schedule handle.
+ * @param[in] priv_data Pointer to the private data passed while creating/editing the schedule.
+ */
+typedef void (*esp_schedule_trigger_cb_t)(esp_schedule_handle_t handle, void *priv_data);
+
+/** Callback for schedule timestamp
+ *
+ * This callback is called when the next trigger timestamp of the schedule is changed. This might be useful to check if
+ * one time schedules have already passed while the device was powered off.
+ *
+ * @param[in] handle Schedule handle.
+ * @param[in] next_timestamp timestamp at which the schedule will trigger next.
+ * @param[in] priv_data Pointer to the user data passed while creating/editing the schedule.
+ */
+typedef void (*esp_schedule_timestamp_cb_t)(esp_schedule_handle_t handle, uint32_t next_timestamp, void *priv_data);
+
+/** Schedule type */
+typedef enum esp_schedule_type {
+    ESP_SCHEDULE_TYPE_INVALID = 0,
+    ESP_SCHEDULE_TYPE_DAYS_OF_WEEK,
+    ESP_SCHEDULE_TYPE_DATE,
+    ESP_SCHEDULE_TYPE_RELATIVE,
+} esp_schedule_type_t;
+
+/** Schedule days. Used for ESP_SCHEDULE_TYPE_DAYS_OF_WEEK. */
+typedef enum esp_schedule_days {
+    ESP_SCHEDULE_DAY_ONCE      = 0,
+    ESP_SCHEDULE_DAY_EVERYDAY  = 0b1111111,
+    ESP_SCHEDULE_DAY_MONDAY    = 1 << 0,
+    ESP_SCHEDULE_DAY_TUESDAY   = 1 << 1,
+    ESP_SCHEDULE_DAY_WEDNESDAY = 1 << 2,
+    ESP_SCHEDULE_DAY_THURSDAY  = 1 << 3,
+    ESP_SCHEDULE_DAY_FRIDAY    = 1 << 4,
+    ESP_SCHEDULE_DAY_SATURDAY  = 1 << 5,
+    ESP_SCHEDULE_DAY_SUNDAY    = 1 << 6,
+} esp_schedule_days_t;
+
+/** Schedule months. Used for ESP_SCHEDULE_TYPE_DATE. */
+typedef enum esp_schedule_months {
+    ESP_SCHEDULE_MONTH_ONCE         = 0,
+    ESP_SCHEDULE_MONTH_ALL          = 0b1111111,
+    ESP_SCHEDULE_MONTH_JANUARY      = 1 << 0,
+    ESP_SCHEDULE_MONTH_FEBRUARY     = 1 << 1,
+    ESP_SCHEDULE_MONTH_MARCH        = 1 << 2,
+    ESP_SCHEDULE_MONTH_APRIL        = 1 << 3,
+    ESP_SCHEDULE_MONTH_MAY          = 1 << 4,
+    ESP_SCHEDULE_MONTH_JUNE         = 1 << 5,
+    ESP_SCHEDULE_MONTH_JULY         = 1 << 6,
+    ESP_SCHEDULE_MONTH_AUGUST       = 1 << 7,
+    ESP_SCHEDULE_MONTH_SEPTEMBER    = 1 << 8,
+    ESP_SCHEDULE_MONTH_OCTOBER      = 1 << 9,
+    ESP_SCHEDULE_MONTH_NOVEMBER     = 1 << 10,
+    ESP_SCHEDULE_MONTH_DECEMBER     = 1 << 11,
+} esp_schedule_months_t;
+
+/** Trigger details of the schedule */
+typedef struct esp_schedule_trigger {
+    /** Type of schedule */
+    esp_schedule_type_t type;
+    /** Hours in 24 hour format. Accepted values: 0-23 */
+    uint8_t hours;
+    /** Minutes in the given hour. Accepted values: 0-59. */
+    uint8_t minutes;
+    /** For type ESP_SCHEDULE_TYPE_DAYS_OF_WEEK */
+    struct {
+        /** 'OR' list of esp_schedule_days_t */
+        uint8_t repeat_days;
+    } day;
+    /** For type ESP_SCHEDULE_TYPE_DATE */
+    struct {
+        /** Day of the month. Accepted values: 1-31. */
+        uint8_t day;
+        /* 'OR' list of esp_schedule_months_t */
+        uint16_t repeat_months;
+        /** Year */
+        uint16_t year;
+        /** If the schedule is to be repeated every year. */
+        bool repeat_every_year;
+    } date;
+    /** For type ESP_SCHEDULE_TYPE_SECONDS */
+    int relative_seconds;
+    /** Used for passing the next schedule timestamp for
+     * ESP_SCHEDULE_TYPE_RELATIVE */
+    time_t next_scheduled_time_utc;
+} esp_schedule_trigger_t;
+
+/** Schedule config */
+typedef struct esp_schedule_config {
+    /** Name of the schedule. This is like a primary key for the schedule. This is required. +1 for NULL termination. */
+    char name[MAX_SCHEDULE_NAME_LEN + 1];
+    /** Trigger details */
+    esp_schedule_trigger_t trigger;
+    /** Trigger callback */
+    esp_schedule_trigger_cb_t trigger_cb;
+    /** Timestamp callback */
+    esp_schedule_timestamp_cb_t timestamp_cb;
+    /** Private data associated with the schedule. This will be passed to callbacks. */
+    void *priv_data;
+} esp_schedule_config_t;
+
+/** Initialize ESP Schedule
+ *
+ * This initializes ESP Schedule. This must be called first before calling any of the other APIs.
+ * This API also gets all the schedules from NVS (if it has been enabled).
+ *
+ * Note: After calling this API, the pointers to the callbacks should be updated for all the schedules by calling
+ * esp_schedule_get() followed by esp_schedule_edit() with the correct callbacks.
+ *
+ * @param[in] enable_nvs If NVS is to be enabled or not.
+ * @param[in] nvs_partition (Optional) The NVS partition to be used. If NULL is passed, the default partition is used.
+ * @param[out] schedule_count Number of active schedules found in NVS.
+ *
+ * @return Array of schedule handles if any schedules have been found.
+ * @return NULL if no schedule is found in NVS (or if NVS is not enabled).
+ */
+esp_schedule_handle_t *esp_schedule_init(bool enable_nvs, char *nvs_partition, uint8_t *schedule_count);
+
+/** Create Schedule
+ *
+ * This API can be used to create a new schedule. The schedule still needs to be enabled using
+ * esp_schedule_enable().
+ *
+ * @param[in] schedule_config Configuration of the schedule to be created.
+ *
+ * @return Schedule handle if successfully created.
+ * @return NULL in case of error.
+ */
+esp_schedule_handle_t esp_schedule_create(esp_schedule_config_t *schedule_config);
+
+/** Remove Schedule
+ *
+ * This API can be used to remove an existing schedule.
+ *
+ * @param[in] handle Schedule handle for the schedule to be removed.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_delete(esp_schedule_handle_t handle);
+
+/** Edit Schedule
+ *
+ * This API can be used to edit an existing schedule.
+ * The schedule name should be same as when the schedule was created. The complete config must be provided
+ * or the previously stored config might be over-written.
+ *
+ * Note: If a schedule is edited when it is on-going, the new changes will not be reflected.
+ * You will need to disable the schedule, edit it, and then enable it again.
+ *
+ * @param[in] handle Schedule handle for the schedule to be edited.
+ * @param[in] schedule_config Configuration of the schedule to be edited.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_edit(esp_schedule_handle_t handle, esp_schedule_config_t *schedule_config);
+
+/** Enable Schedule
+ *
+ * This API can be used to enable an existing schedule.
+ * It can be used to enable a schedule after it has been created using esp_schedule_create()
+ * or if the schedule has been disabled using esp_schedule_disable().
+ *
+ * @param[in] handle Schedule handle for the schedule to be enabled.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_enable(esp_schedule_handle_t handle);
+
+/** Disable Schedule
+ *
+ * This API can be used to disable an on-going schedule.
+ * It does not remove the schedule, just stops it. The schedule can be enabled again using
+ * esp_schedule_enable().
+ *
+ * @param[in] handle Schedule handle for the schedule to be disabled.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_disable(esp_schedule_handle_t handle);
+
+/** Get Schedule
+ *
+ * This API can be used to get details of an existing schedule.
+ * The schedule_config is populated with the schedule details.
+ *
+ * @param[in] handle Schedule handle.
+ * @param[out] schedule_config Details of the schedule whose handle is passed.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_schedule_get(esp_schedule_handle_t handle, esp_schedule_config_t *schedule_config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl.h b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl.h
new file mode 100644
index 00000000000..f03274a4013
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl.h
@@ -0,0 +1,229 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "sdmmc_cmd.h"
+#include "driver/spi_master.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/semphr.h"
+
+
+struct essl_dev_t;
+/// Handle of an ESSL device
+typedef struct essl_dev_t* essl_handle_t;
+
+/**
+ * @brief Initialize the slave.
+ *
+ * @param handle Handle of an ESSL device.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ * @return
+ *        - ESP_OK:                If success
+ *        - ESP_ERR_NOT_SUPPORTED: Current device does not support this function.
+ *        - Other value returned from lower layer `init`.
+ */
+esp_err_t essl_init(essl_handle_t handle, uint32_t wait_ms);
+
+/** Wait for interrupt of an ESSL slave device.
+ *
+ * @param handle Handle of an ESSL device.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *      - ESP_OK:                If success
+ *      - ESP_ERR_NOT_SUPPORTED: Current device does not support this function.
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_wait_for_ready(essl_handle_t handle, uint32_t wait_ms);
+
+/** Get buffer num for the host to send data to the slave. The buffers are size of ``buffer_size``.
+ *
+ * @param handle Handle of a ESSL device.
+ * @param out_tx_num Output of buffer num that host can send data to ESSL slave.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *      - ESP_OK:                Success
+ *      - ESP_ERR_NOT_SUPPORTED: This API is not supported in this mode
+ *      - One of the error codes from SDMMC/SPI host controller
+ */
+esp_err_t essl_get_tx_buffer_num(essl_handle_t handle, uint32_t *out_tx_num, uint32_t wait_ms);
+
+/** Get the size, in bytes, of the data that the ESSL slave is ready to send
+ *
+ * @param handle Handle of an ESSL device.
+ * @param out_rx_size Output of data size to read from slave, in bytes
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *      - ESP_OK:                Success
+ *      - ESP_ERR_NOT_SUPPORTED: This API is not supported in this mode
+ *      - One of the error codes from SDMMC/SPI host controller
+ */
+esp_err_t essl_get_rx_data_size(essl_handle_t handle, uint32_t *out_rx_size, uint32_t wait_ms);
+
+
+/** Reset the counters of this component. Usually you don't need to do this unless you know the slave is reset.
+ *
+ * @param handle Handle of an ESSL device.
+ *
+ * @return
+ *        - ESP_OK:                Success
+ *        - ESP_ERR_NOT_SUPPORTED: This API is not supported in this mode
+ *        - ESP_ERR_INVALID_ARG:   Invalid argument, handle is not init.
+ */
+esp_err_t essl_reset_cnt(essl_handle_t handle);
+
+/** Send a packet to the ESSL Slave. The Slave receives the packet into buffers whose size is ``buffer_size`` (configured during initialization).
+ *
+ * @param handle Handle of an ESSL device.
+ * @param start Start address of the packet to send
+ * @param length Length of data to send, if the packet is over-size, the it will be divided into blocks and hold into different buffers automatically.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - ESP_ERR_INVALID_ARG:   Invalid argument, handle is not init or other argument is not valid.
+ *      - ESP_ERR_TIMEOUT:       No buffer to use, or error ftrom SDMMC host controller.
+ *      - ESP_ERR_NOT_FOUND:     Slave is not ready for receiving.
+ *      - ESP_ERR_NOT_SUPPORTED: This API is not supported in this mode
+ *      - One of the error codes from SDMMC/SPI host controller.
+ */
+esp_err_t essl_send_packet(essl_handle_t handle, const void *start, size_t length, uint32_t wait_ms);
+
+/** Get a packet from ESSL slave.
+ *
+ * @param handle Handle of an ESSL device.
+ * @param[out] out_data Data output address
+ * @param size The size of the output buffer, if the buffer is smaller than the size of data to receive from slave, the driver returns ``ESP_ERR_NOT_FINISHED``
+ * @param[out] out_length Output of length the data actually received from slave.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *     - ESP_OK Success:        All the data has been read from the slave.
+ *     - ESP_ERR_INVALID_ARG:   Invalid argument, The handle is not initialized or the other arguments are invalid.
+ *     - ESP_ERR_NOT_FINISHED:  Read was successful, but there is still data remaining.
+ *     - ESP_ERR_NOT_FOUND:     Slave is not ready to send data.
+ *     - ESP_ERR_NOT_SUPPORTED: This API is not supported in this mode
+ *     - One of the error codes from SDMMC/SPI host controller.
+ */
+esp_err_t essl_get_packet(essl_handle_t handle, void *out_data, size_t size, size_t *out_length, uint32_t wait_ms);
+
+/** Write general purpose R/W registers (8-bit) of ESSL slave.
+ *
+ * @param handle Handle of an ESSL device.
+ * @param addr Address of register to write. For SDIO, valid address: 0-59. For SPI, see ``essl_spi.h``
+ * @param value Value to write to the register.
+ * @param value_o Output of the returned written value.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @note sdio 28-31 are reserved, the lower API helps to skip.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - One of the error codes from SDMMC/SPI host controller
+ */
+esp_err_t essl_write_reg(essl_handle_t handle, uint8_t addr, uint8_t value, uint8_t *value_o, uint32_t wait_ms);
+
+/** Read general purpose R/W registers (8-bit) of ESSL slave.
+ *
+ * @param handle Handle of a ``essl`` device.
+ * @param add Address of register to read. For SDIO, Valid address: 0-27, 32-63 (28-31 reserved, return interrupt bits on read). For SPI, see ``essl_spi.h``
+ * @param value_o Output value read from the register.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - One of the error codes from SDMMC/SPI host controller
+ */
+esp_err_t essl_read_reg(essl_handle_t handle, uint8_t add, uint8_t *value_o, uint32_t wait_ms);
+
+/** wait for an interrupt of the slave
+ *
+ * @param handle Handle of an ESSL device.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *        - ESP_OK:                If interrupt is triggered.
+ *        - ESP_ERR_NOT_SUPPORTED: Current device does not support this function.
+ *        - ESP_ERR_TIMEOUT:       No interrupts before timeout.
+ */
+esp_err_t essl_wait_int(essl_handle_t handle, uint32_t wait_ms);
+
+/** Clear interrupt bits of ESSL slave. All the bits set in the mask will be cleared, while other bits will stay the same.
+ *
+ * @param handle Handle of an ESSL device.
+ * @param intr_mask Mask of interrupt bits to clear.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *        - ESP_OK:                Success
+ *        - ESP_ERR_NOT_SUPPORTED: Current device does not support this function.
+ *        - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_clear_intr(essl_handle_t handle, uint32_t intr_mask, uint32_t wait_ms);
+
+/** Get interrupt bits of ESSL slave.
+ *
+ * @param handle Handle of an ESSL device.
+ * @param intr_raw Output of the raw interrupt bits. Set to NULL if only masked bits are read.
+ * @param intr_st Output of the masked interrupt bits. set to NULL if only raw bits are read.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *        - ESP_OK:                Success
+ *        - ESP_INVALID_ARG:       If both ``intr_raw`` and ``intr_st`` are NULL.
+ *        - ESP_ERR_NOT_SUPPORTED: Current device does not support this function.
+ *        - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_get_intr(essl_handle_t handle, uint32_t *intr_raw, uint32_t *intr_st, uint32_t wait_ms);
+
+/** Set interrupt enable bits of ESSL slave. The slave only sends interrupt on the line when there is a bit both the raw status and the enable are set.
+ *
+ * @param handle Handle of an ESSL device.
+ * @param ena_mask Mask of the interrupt bits to enable.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *        - ESP_OK:                Success
+ *        - ESP_ERR_NOT_SUPPORTED: Current device does not support this function.
+ *        - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_set_intr_ena(essl_handle_t handle, uint32_t ena_mask, uint32_t wait_ms);
+
+/** Get interrupt enable bits of ESSL slave.
+ *
+ * @param handle Handle of an ESSL device.
+ * @param ena_mask_o Output of interrupt bit enable mask.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_get_intr_ena(essl_handle_t handle, uint32_t *ena_mask_o, uint32_t wait_ms);
+
+/** Send interrupts to slave. Each bit of the interrupt will be triggered.
+ *
+ * @param handle Handle of an ESSL device.
+ * @param intr_mask Mask of interrupt bits to send to slave.
+ * @param wait_ms Millisecond to wait before timeout, will not wait at all if set to 0-9.
+ *
+ * @return
+ *        - ESP_OK:                Success
+ *        - ESP_ERR_NOT_SUPPORTED: Current device does not support this function.
+ *        - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_send_slave_intr(essl_handle_t handle, uint32_t intr_mask, uint32_t wait_ms);
diff --git a/tools/sdk/esp32s3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_sdio.h b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_sdio.h
new file mode 100644
index 00000000000..c98ae0344f2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_sdio.h
@@ -0,0 +1,248 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// ESP SDIO slave link used by the ESP host to communicate with ESP SDIO slave.
+
+#pragma once
+
+#include "esp_err.h"
+#include "esp_serial_slave_link/essl.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "driver/sdmmc_defs.h"
+
+/// Configuration for the ESSL SDIO device
+typedef struct {
+    sdmmc_card_t *card;     ///< The initialized sdmmc card pointer of the slave.
+    int recv_buffer_size;   ///< The pre-negotiated recv buffer size used by both the host and the slave.
+} essl_sdio_config_t;
+
+/**
+ * @brief Initialize the ESSL SDIO device and get its handle.
+ *
+ * @param out_handle Output of the handle.
+ * @param config    Configuration for the ESSL SDIO device.
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_NO_MEM: memory exhausted.
+ */
+esp_err_t essl_sdio_init_dev(essl_handle_t *out_handle, const essl_sdio_config_t *config);
+
+/**
+ * @brief Deinitialize and free the space used by the ESSL SDIO device.
+ *
+ * @param handle Handle of the ESSL SDIO device to deinit.
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_INVALID_ARG: wrong handle passed
+ */
+esp_err_t essl_sdio_deinit_dev(essl_handle_t handle);
+
+//Please call `essl_` functions witout `sdio` instead of calling these functions directly.
+/** @cond */
+/**
+ * SDIO Initialize process of an ESSL SDIO slave device.
+ *
+ * @param arg Context of the ``essl`` component. Send to other functions later.
+ * @param wait_ms Time to wait before operation is done, in ms.
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_sdio_init(void *arg, uint32_t wait_ms);
+
+/**
+ * Wait for interrupt of an ESSL SDIO slave device.
+ *
+ * @param arg Context of the ``essl`` component.
+ * @param wait_ms Time to wait before operation is done, in ms.
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_sdio_wait_for_ready(void *arg, uint32_t wait_ms);
+
+/**
+ * Get buffer num for the host to send data to the slave. The buffers are size of ``buffer_size``.
+ *
+ * @param arg Context of the component.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - One of the error codes from SDMMC host controller
+ */
+uint32_t essl_sdio_get_tx_buffer_num(void *arg);
+
+/** Get amount of data the ESSL SDIO slave preparing to send to host.
+ *
+ * @param arg Context of the component.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - One of the error codes from SDMMC host controller
+ */
+uint32_t essl_sdio_get_rx_data_size(void *arg);
+
+/**
+ * Send a packet to the ESSL SDIO slave. The slave receive the packet into buffers whose size is ``buffer_size`` in the arg.
+ *
+ * @param arg Context of the component.
+ * @param start Start address of the packet to send
+ * @param length Length of data to send, if the packet is over-size, the it will be divided into blocks and hold into different buffers automatically.
+ * @param wait_ms Time to wait before timeout, in ms.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - ESP_ERR_TIMEOUT No buffer to use, or error ftrom SDMMC host controller
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_sdio_send_packet(void *arg, const void *start, size_t length, uint32_t wait_ms);
+
+/**
+ * Get a packet from an ESSL SDIO slave.
+ *
+ * @param arg Context of the component.
+ * @param[out] out_data Data output address
+ * @param size The size of the output buffer, if the buffer is smaller than the size of data to receive from slave, the driver returns ``ESP_ERR_NOT_FINISHED``
+ * @param wait_ms Time to wait before timeout, in ms.
+ *
+ * @return
+ *     - ESP_OK Success, all the data are read from the slave.
+ *     - ESP_ERR_NOT_FINISHED Read success, while there're data remaining.
+ *     - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_sdio_get_packet(void *arg, void *out_data, size_t size, uint32_t wait_ms);
+
+/**
+ * Wait for the interrupt from the SDIO slave.
+ *
+ * @param arg Context of the component.
+ * @param wait_ms Time to wait before timeout, in ms.
+ * @return
+ *  - ESP_ERR_NOT_SUPPORTED: if the interrupt line is not initialized properly.
+ *  - ESP_OK: if interrupt happened
+ *  - ESP_ERR_TIMEOUT: if timeout before interrupt happened.
+ *  - or other values returned from the `io_int_wait` member of the `card->host` structure.
+ */
+esp_err_t essl_sdio_wait_int(void *arg, uint32_t wait_ms);
+
+/**
+ * Clear interrupt bits of an ESSL SDIO slave. All the bits set in the mask will be cleared, while other bits will stay the same.
+ *
+ * @param arg Context of the component.
+ * @param intr_mask Mask of interrupt bits to clear.
+ * @param wait_ms Time to wait before timeout, in ms.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_sdio_clear_intr(void *arg, uint32_t intr_mask, uint32_t wait_ms);
+
+/**
+ * Get interrupt bits of an ESSL SDIO slave.
+ *
+ * @param arg Context of the component.
+ * @param intr_raw Output of the raw interrupt bits. Set to NULL if only masked bits are read.
+ * @param intr_st Output of the masked interrupt bits. set to NULL if only raw bits are read.
+ * @param wait_ms Time to wait before timeout, in ms.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - ESP_INVALID_ARG   if both ``intr_raw`` and ``intr_st`` are NULL.
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_sdio_get_intr(void *arg, uint32_t *intr_raw, uint32_t *intr_st, uint32_t wait_ms);
+
+/**
+ * Set interrupt enable bits of an ESSL SDIO slave. The slave only sends interrupt on the line when there is a bit both the raw status and the enable are set.
+ *
+ * @param arg Context of the component.
+ * @param ena_mask Mask of the interrupt bits to enable.
+ * @param wait_ms Time to wait before timeout, in ms.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_sdio_set_intr_ena(void *arg, uint32_t ena_mask, uint32_t wait_ms);
+
+/**
+ * Get interrupt enable bits of an ESSL SDIO slave.
+ *
+ * @param arg Context of the component.
+ * @param ena_mask_o Output of interrupt bit enable mask.
+ * @param wait_ms Time to wait before timeout, in ms.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_sdio_get_intr_ena(void *arg, uint32_t *ena_mask_o, uint32_t wait_ms);
+
+/**
+ * Write general purpose R/W registers (8-bit) of an ESSL SDIO slave.
+ *
+ * @param arg Context of the component.
+ * @param addr Address of register to write. Valid address: 0-27, 32-63 (28-31 reserved).
+ * @param value Value to write to the register.
+ * @param wait_ms Time to wait before timeout, in ms.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - ESP_ERR_INVALID_ARG Address not valid.
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_sdio_write_reg(void *arg, uint8_t addr, uint8_t value, uint8_t *value_o, uint32_t wait_ms);
+
+/**
+ * Read general purpose R/W registers (8-bit) of an ESSL SDIO slave.
+ *
+ * @param arg Context of the component.
+ * @param add Address of register to read. Valid address: 0-27, 32-63 (28-31 reserved, return interrupt bits on read).
+ * @param value Output value read from the register.
+ * @param wait_ms Time to wait before timeout, in ms.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - ESP_ERR_INVALID_ARG Address not valid.
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_sdio_read_reg(void *arg, uint8_t add, uint8_t *value_o, uint32_t wait_ms);
+
+/**
+ * Send interrupts to slave. Each bit of the interrupt will be triggered.
+ *
+ * @param arg Context of the component.
+ * @param intr_mask Mask of interrupt bits to send to slave.
+ * @param wait_ms Time to wait before timeout, in ms.
+ *
+ * @return
+ *      - ESP_OK Success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t essl_sdio_send_slave_intr(void *arg, uint32_t intr_mask, uint32_t wait_ms);
+
+/**
+ * @brief Reset the counter on the host side.
+ *
+ * @note Only call when you know the slave has reset its counter, or there will be inconsistent between the master and the slave.
+ *
+ * @param arg  Context of the component.
+ */
+void essl_sdio_reset_cnt(void *arg);
+
+/** @endcond */
diff --git a/tools/sdk/esp32s3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h
new file mode 100644
index 00000000000..22721d17ece
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h
@@ -0,0 +1,320 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_err.h"
+#include "esp_serial_slave_link/essl.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/// Configuration of ESSL SPI device
+typedef struct {
+    spi_device_handle_t *spi;           ///< Pointer to SPI device handle.
+    uint32_t            tx_buf_size;    ///< The pre-negotiated Master TX buffer size used by both the host and the slave.
+    uint8_t             tx_sync_reg;    ///< The pre-negotiated register ID for Master-TX-SLAVE-RX synchronization. 1 word (4 Bytes) will be reserved for the synchronization.
+    uint8_t             rx_sync_reg;    ///< The pre-negotiated register ID for Master-RX-Slave-TX synchronization. 1 word (4 Bytes) will be reserved for the synchronization.
+} essl_spi_config_t;
+
+////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+// APIs for DMA Append Mode
+// This mode has a better performance for continuous Half Duplex SPI transactions.
+//
+// * You can use the ``essl_spi_init_dev`` and ``essl_spi_deinit_dev`` together with APIs in ``essl.h`` to communicate
+//   with ESP SPI Slaves in Half Duplex DMA Append Mode. See example for SPI SLAVE HALFDUPLEX APPEND MODE.
+// * You can also use the following APIs to create your own logic.
+////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+/**
+ * @brief Initialize the ESSL SPI device function list and get its handle
+ *
+ * @param[out] out_handle    Output of the handle
+ * @param      init_config   Configuration for the ESSL SPI device
+ * @return
+ *        - ESP_OK:                On success
+ *        - ESP_ERR_NO_MEM:        Memory exhausted
+ *        - ESP_ERR_INVALID_STATE: SPI driver is not initialized
+ *        - ESP_ERR_INVALID_ARG:   Wrong register ID
+ */
+esp_err_t essl_spi_init_dev(essl_handle_t *out_handle, const essl_spi_config_t *init_config);
+
+/**
+ * @brief Deinitialize the ESSL SPI device and free the memory used by the device
+ *
+ * @param handle    Handle of the ESSL SPI device
+ * @return
+ *        - ESP_OK:                On success
+ *        - ESP_ERR_INVALID_STATE: ESSL SPI is not in use
+ */
+esp_err_t essl_spi_deinit_dev(essl_handle_t handle);
+
+/**
+ * @brief Read from the shared registers
+ *
+ * @note The registers for Master/Slave synchronization are reserved. Do not use them. (see `rx_sync_reg` in `essl_spi_config_t`)
+ *
+ * @param      arg        Context of the component. (Member ``arg`` from ``essl_handle_t``)
+ * @param      addr       Address of the shared registers. (Valid: 0 ~ SOC_SPI_MAXIMUM_BUFFER_SIZE, registers for M/S sync are reserved, see note1).
+ * @param[out] out_value  Read buffer for the shared registers.
+ * @param      wait_ms    Time to wait before timeout (reserved for future use, user should set this to 0).
+ * @return
+ *        - ESP_OK:                success
+ *        - ESP_ERR_INVALID_STATE: ESSL SPI has not been initialized.
+ *        - ESP_ERR_INVALID_ARG:   The address argument is not valid. See note 1.
+ *        - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_read_reg(void *arg, uint8_t addr, uint8_t *out_value, uint32_t wait_ms);
+
+/**
+ * @brief Get a packet from Slave
+ *
+ * @param      arg         Context of the component. (Member ``arg`` from ``essl_handle_t``)
+ * @param[out] out_data    Output data address
+ * @param      size        The size of the output data.
+ * @param      wait_ms     Time to wait before timeout (reserved for future use, user should set this to 0).
+ * @return
+ *        - ESP_OK:                On Success
+ *        - ESP_ERR_INVALID_STATE: ESSL SPI has not been initialized.
+ *        - ESP_ERR_INVALID_ARG:   The output data address is neither DMA capable nor 4 byte-aligned
+ *        - ESP_ERR_INVALID_SIZE:  Master requires ``size`` bytes of data but Slave did not load enough bytes.
+ */
+esp_err_t essl_spi_get_packet(void *arg, void *out_data, size_t size, uint32_t wait_ms);
+
+/**
+ * @brief Write to the shared registers
+ *
+ * @note The registers for Master/Slave synchronization are reserved. Do not use them. (see `tx_sync_reg` in `essl_spi_config_t`)
+ * @note Feature of checking the actual written value (``out_value``) is not supported.
+ *
+ * @param      arg        Context of the component. (Member ``arg`` from ``essl_handle_t``)
+ * @param      addr       Address of the shared registers. (Valid: 0 ~ SOC_SPI_MAXIMUM_BUFFER_SIZE, registers for M/S sync are reserved, see note1)
+ * @param      value      Buffer for data to send, should be align to 4.
+ * @param[out] out_value  Not supported, should be set to NULL.
+ * @param      wait_ms    Time to wait before timeout (reserved for future use, user should set this to 0).
+ * @return
+ *        - ESP_OK:                success
+ *        - ESP_ERR_INVALID_STATE: ESSL SPI has not been initialized.
+ *        - ESP_ERR_INVALID_ARG:   The address argument is not valid. See note 1.
+ *        - ESP_ERR_NOT_SUPPORTED: Should set ``out_value`` to NULL. See note 2.
+ *        - or other return value from :cpp:func:`spi_device_transmit`.
+ *
+ */
+esp_err_t essl_spi_write_reg(void *arg, uint8_t addr, uint8_t value, uint8_t *out_value, uint32_t wait_ms);
+
+/**
+ * @brief Send a packet to Slave
+ *
+ * @param arg        Context of the component. (Member ``arg`` from ``essl_handle_t``)
+ * @param data       Address of the data to send
+ * @param size       Size of the data to send.
+ * @param wait_ms    Time to wait before timeout (reserved for future use, user should set this to 0).
+ * @return
+ *        - ESP_OK:                On success
+ *        - ESP_ERR_INVALID_STATE: ESSL SPI has not been initialized.
+ *        - ESP_ERR_INVALID_ARG:   The data address is not DMA capable
+ *        - ESP_ERR_INVALID_SIZE:  Master will send ``size`` bytes of data but Slave did not load enough RX buffer
+ */
+esp_err_t essl_spi_send_packet(void *arg, const void *data, size_t size, uint32_t wait_ms);
+
+/**
+ * @brief Reset the counter in Master context
+ *
+ * @note Shall only be called if the slave has reset its counter. Else, Slave and Master would be desynchronized
+ *
+ * @param arg    Context of the component. (Member ``arg`` from ``essl_handle_t``)
+ */
+void essl_spi_reset_cnt(void *arg);
+
+////////////////////////////////////////////////////////////////////////////////
+// Basic commands to communicate with the SPI Slave HD on ESP32-S2
+////////////////////////////////////////////////////////////////////////////////
+/**
+ * @brief Read the shared buffer from the slave in ISR way
+ *
+ * @note The slave's HW doesn't guarantee the data in one SPI transaction is consistent. It sends data in unit of byte.
+ * In other words, if the slave SW attempts to update the shared register when a rdbuf SPI transaction is in-flight,
+ * the data got by the master will be the combination of bytes of different writes of slave SW.
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param      spi       SPI device handle representing the slave
+ * @param[out] out_data  Buffer for read data, strongly suggested to be in the DRAM and aligned to 4
+ * @param      addr      Address of the slave shared buffer
+ * @param      len       Length to read
+ * @param      flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: on success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_rdbuf(spi_device_handle_t spi, uint8_t *out_data, int addr, int len, uint32_t flags);
+
+/**
+ * @brief Read the shared buffer from the slave in polling way
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param      spi       SPI device handle representing the slave
+ * @param[out] out_data  Buffer for read data, strongly suggested to be in the DRAM and aligned to 4
+ * @param      addr      Address of the slave shared buffer
+ * @param      len       Length to read
+ * @param      flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: on success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_rdbuf_polling(spi_device_handle_t spi, uint8_t *out_data, int addr, int len, uint32_t flags);
+
+/**
+ * @brief Write the shared buffer of the slave in ISR way
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param data      Buffer for data to send, strongly suggested to be in the DRAM
+ * @param addr      Address of the slave shared buffer,
+ * @param len       Length to write
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_wrbuf(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags);
+
+/**
+ * @brief Write the shared buffer of the slave in polling way
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param data      Buffer for data to send, strongly suggested to be in the DRAM
+ * @param addr      Address of the slave shared buffer,
+ * @param len       Length to write
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_polling_transmit`.
+ */
+esp_err_t essl_spi_wrbuf_polling(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags);
+
+/**
+ * @brief Receive long buffer in segments from the slave through its DMA.
+ *
+ * @note This function combines several :cpp:func:`essl_spi_rddma_seg` and one
+ *       :cpp:func:`essl_spi_rddma_done` at the end. Used when the slave is working in segment mode.
+ *
+ * @param      spi       SPI device handle representing the slave
+ * @param[out] out_data  Buffer to hold the received data, strongly suggested to be in the DRAM and aligned to 4
+ * @param      len       Total length of data to receive.
+ * @param      seg_len Length of each segment, which is not larger than the maximum transaction length
+ *                allowed for the spi device. Suggested to be multiples of 4. When set < 0, means send
+ *                all data in one segment (the ``rddma_done`` will still be sent.)
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_rddma(spi_device_handle_t spi, uint8_t *out_data, int len, int seg_len, uint32_t flags);
+
+/**
+ * @brief Read one data segment from the slave through its DMA.
+ *
+ * @note To read long buffer, call :cpp:func:`essl_spi_rddma` instead.
+ *
+ * @param      spi       SPI device handle representing the slave
+ * @param[out] out_data  Buffer to hold the received data. strongly suggested to be in the DRAM and aligned to 4
+ * @param      seg_len   Length of this segment
+ * @param      flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_rddma_seg(spi_device_handle_t spi, uint8_t *out_data, int seg_len, uint32_t flags);
+
+/**
+ * @brief Send the ``rddma_done`` command to the slave. Upon receiving this command, the slave will
+ *        stop sending the current buffer even there are data unsent, and maybe prepare the next buffer to
+ *        send.
+ *
+ * @note This is required only when the slave is working in segment mode.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_rddma_done(spi_device_handle_t spi, uint32_t flags);
+
+/**
+ * @brief Send long buffer in segments to the slave through its DMA.
+ *
+ * @note This function combines several :cpp:func:`essl_spi_wrdma_seg` and one
+ *       :cpp:func:`essl_spi_wrdma_done` at the end. Used when the slave is working in segment mode.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param data      Buffer for data to send, strongly suggested to be in the DRAM
+ * @param len       Total length of data to send.
+ * @param seg_len Length of each segment, which is not larger than the maximum transaction length
+ *                allowed for the spi device. Suggested to be multiples of 4. When set < 0, means send
+ *                all data in one segment (the ``wrdma_done`` will still be sent.)
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_wrdma(spi_device_handle_t spi, const uint8_t *data, int len, int seg_len, uint32_t flags);
+
+/**
+ * @brief Send one data segment to the slave through its DMA.
+ *
+ * @note To send long buffer, call :cpp:func:`essl_spi_wrdma` instead.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param data      Buffer for data to send, strongly suggested to be in the DRAM
+ * @param seg_len   Length of this segment
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_wrdma_seg(spi_device_handle_t spi, const uint8_t *data, int seg_len, uint32_t flags);
+
+/**
+ * @brief Send the ``wrdma_done`` command to the slave. Upon receiving this command, the slave will
+ *        stop receiving, process the received data, and maybe prepare the next buffer to receive.
+ *
+ * @note This is required only when the slave is working in segment mode.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_wrdma_done(spi_device_handle_t spi, uint32_t flags);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_serial_slave_link/include/essl_spi/esp32c3_defs.h b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/essl_spi/esp32c3_defs.h
new file mode 100644
index 00000000000..3dfd4a14b75
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/essl_spi/esp32c3_defs.h
@@ -0,0 +1,38 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#pragma once
+
+// NOTE: From the view of master
+#define CMD_HD_WRBUF_REG    0x01
+#define CMD_HD_RDBUF_REG    0x02
+#define CMD_HD_WRDMA_REG    0x03
+#define CMD_HD_RDDMA_REG    0x04
+
+#define CMD_HD_ONEBIT_MODE  0x00
+#define CMD_HD_DOUT_MODE    0x10
+#define CMD_HD_QOUT_MODE    0x20
+#define CMD_HD_DIO_MODE     0x50
+#define CMD_HD_QIO_MODE     0xA0
+
+#define CMD_HD_SEG_END_REG  0x05
+#define CMD_HD_EN_QPI_REG   0x06
+#define CMD_HD_WR_END_REG   0x07
+#define CMD_HD_INT0_REG     0x08
+#define CMD_HD_INT1_REG     0x09
+#define CMD_HD_INT2_REG     0x0A
+#define CMD_HD_EX_QPI_REG   0xDD
+
+#define SPI_SLAVE_HD_BUFFER_SIZE 64
diff --git a/tools/sdk/esp32s3/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/essl_spi/esp32h2_defs.h
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/tools/sdk/esp32s3/include/esp_serial_slave_link/include/essl_spi/esp32s2_defs.h b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/essl_spi/esp32s2_defs.h
new file mode 100644
index 00000000000..49ba82ddf00
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/essl_spi/esp32s2_defs.h
@@ -0,0 +1,38 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#pragma once
+
+// NOTE: From the view of master
+#define CMD_HD_WRBUF_REG    0x01
+#define CMD_HD_RDBUF_REG    0x02
+#define CMD_HD_WRDMA_REG    0x03
+#define CMD_HD_RDDMA_REG    0x04
+
+#define CMD_HD_ONEBIT_MODE  0x00
+#define CMD_HD_DOUT_MODE    0x10
+#define CMD_HD_QOUT_MODE    0x20
+#define CMD_HD_DIO_MODE     0x50
+#define CMD_HD_QIO_MODE     0xA0
+
+#define CMD_HD_SEG_END_REG  0x05
+#define CMD_HD_EN_QPI_REG   0x06
+#define CMD_HD_WR_END_REG   0x07
+#define CMD_HD_INT0_REG     0x08
+#define CMD_HD_INT1_REG     0x09
+#define CMD_HD_INT2_REG     0x0A
+#define CMD_HD_EX_QPI_REG   0xDD
+
+#define SPI_SLAVE_HD_BUFFER_SIZE 72
diff --git a/tools/sdk/esp32s3/include/esp_serial_slave_link/include/essl_spi/esp32s3_defs.h b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/essl_spi/esp32s3_defs.h
new file mode 100644
index 00000000000..3dfd4a14b75
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_serial_slave_link/include/essl_spi/esp32s3_defs.h
@@ -0,0 +1,38 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#pragma once
+
+// NOTE: From the view of master
+#define CMD_HD_WRBUF_REG    0x01
+#define CMD_HD_RDBUF_REG    0x02
+#define CMD_HD_WRDMA_REG    0x03
+#define CMD_HD_RDDMA_REG    0x04
+
+#define CMD_HD_ONEBIT_MODE  0x00
+#define CMD_HD_DOUT_MODE    0x10
+#define CMD_HD_QOUT_MODE    0x20
+#define CMD_HD_DIO_MODE     0x50
+#define CMD_HD_QIO_MODE     0xA0
+
+#define CMD_HD_SEG_END_REG  0x05
+#define CMD_HD_EN_QPI_REG   0x06
+#define CMD_HD_WR_END_REG   0x07
+#define CMD_HD_INT0_REG     0x08
+#define CMD_HD_INT1_REG     0x09
+#define CMD_HD_INT2_REG     0x0A
+#define CMD_HD_EX_QPI_REG   0xDD
+
+#define SPI_SLAVE_HD_BUFFER_SIZE 64
diff --git a/tools/sdk/esp32s3/include/esp_system/include/eh_frame_parser.h b/tools/sdk/esp32s3/include/esp_system/include/eh_frame_parser.h
new file mode 100644
index 00000000000..f99f63bb774
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/eh_frame_parser.h
@@ -0,0 +1,35 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef EH_FRAME_PARSER_H
+#define EH_FRAME_PARSER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Print backtrace for the given execution frame.
+ *
+ * @param frame_or Snapshot of the CPU registers when the program stopped its
+ *                 normal execution. This frame is usually generated on the
+ *                 stack when an exception or an interrupt occurs.
+ */
+void esp_eh_frame_print_backtrace(const void *frame_or);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_debug_helpers.h b/tools/sdk/esp32s3/include/esp_system/include/esp_debug_helpers.h
new file mode 100644
index 00000000000..c64df641e1b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_debug_helpers.h
@@ -0,0 +1,141 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef __ASSEMBLER__
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "soc/soc.h"  // [refactor-todo] IDF-2297
+#include "esp_cpu.h"
+
+/*
+ * @brief   Structure used for backtracing
+ *
+ * This structure stores the backtrace information of a particular stack frame
+ * (i.e. the PC and SP). This structure is used iteratively with the
+ * esp_cpu_get_next_backtrace_frame() function to traverse each frame within a
+ * single stack. The next_pc represents the PC of the current frame's caller, thus
+ * a next_pc of 0 indicates that the current frame is the last frame on the stack.
+ *
+ * @note    Call esp_backtrace_get_start() to obtain initialization values for
+ *          this structure
+ */
+typedef struct {
+    uint32_t pc;       /* PC of the current frame */
+    uint32_t sp;       /* SP of the current frame */
+    uint32_t next_pc;  /* PC of the current frame's caller */
+    const void *exc_frame;  /* Pointer to the full frame data structure, if applicable */
+} esp_backtrace_frame_t;
+
+/**
+ * @brief If an OCD is connected over JTAG. set breakpoint 0 to the given function
+ *        address. Do nothing otherwise.
+ * @param fn  Pointer to the target breakpoint position
+ */
+void esp_set_breakpoint_if_jtag(void *fn);
+
+/**
+ * Get the first frame of the current stack's backtrace
+ *
+ * Given the following function call flow (B -> A -> X -> esp_backtrace_get_start),
+ * this function will do the following.
+ * - Flush CPU registers and window frames onto the current stack
+ * - Return PC and SP of function A (i.e. start of the stack's backtrace)
+ * - Return PC of function B (i.e. next_pc)
+ *
+ * @note This function is implemented in assembly
+ *
+ * @param[out] pc       PC of the first frame in the backtrace
+ * @param[out] sp       SP of the first frame in the backtrace
+ * @param[out] next_pc  PC of the first frame's caller
+ */
+extern void esp_backtrace_get_start(uint32_t *pc, uint32_t *sp, uint32_t *next_pc);
+
+/**
+ * Get the next frame on a stack for backtracing
+ *
+ * Given a stack frame(i), this function will obtain the next stack frame(i-1)
+ * on the same call stack (i.e. the caller of frame(i)). This function is meant to be
+ * called iteratively when doing a backtrace.
+ *
+ * Entry Conditions: Frame structure containing valid SP and next_pc
+ * Exit Conditions:
+ *  - Frame structure updated with SP and PC of frame(i-1). next_pc now points to frame(i-2).
+ *  - If a next_pc of 0 is returned, it indicates that frame(i-1) is last frame on the stack
+ *
+ * @param[inout] frame  Pointer to frame structure
+ *
+ * @return
+ *  - True if the SP and PC of the next frame(i-1) are sane
+ *  - False otherwise
+ */
+bool esp_backtrace_get_next_frame(esp_backtrace_frame_t *frame);
+
+/**
+ * @brief Print the backtrace from specified frame.
+ *
+ * @param depth The maximum number of stack frames to print (should be > 0)
+ * @param frame Starting frame to print from
+ * @param panic Indicator if backtrace print is during a system panic
+ *
+ * @note On the ESP32, users must call esp_backtrace_get_start() first to flush the stack.
+ * @note If a esp_backtrace_frame_t* frame is obtained though a call to esp_backtrace_get_start()
+ * from some example function func_a(), then frame is only valid within the frame/scope of func_a().
+ * Users should not attempt to pass/use frame other frames within the same stack of different stacks.
+ *
+ * @return
+ *      - ESP_OK    Backtrace successfully printed to completion or to depth limit
+ *      - ESP_FAIL  Backtrace is corrupted
+ */
+esp_err_t IRAM_ATTR esp_backtrace_print_from_frame(int depth, const esp_backtrace_frame_t* frame, bool panic);
+
+/**
+ * @brief Print the backtrace of the current stack
+ *
+ * @param depth The maximum number of stack frames to print (should be > 0)
+ *
+ * @return
+ *      - ESP_OK    Backtrace successfully printed to completion or to depth limit
+ *      - ESP_FAIL  Backtrace is corrupted
+ */
+esp_err_t esp_backtrace_print(int depth);
+
+/**
+ * @brief Set a watchpoint to break/panic when a certain memory range is accessed.
+ * Superseded by esp_cpu_set_watchpoint in esp_cpu.h.
+ */
+static inline __attribute__((deprecated)) esp_err_t esp_set_watchpoint(int no, void *adr, int size, int flags)
+{
+    return esp_cpu_set_watchpoint(no, adr, size, flags);
+}
+
+/**
+ * @brief Set a watchpoint to break/panic when a certain memory range is accessed.
+ * Superseded by esp_cpu_clear_watchpoint in esp_cpu.h.
+ */
+static inline __attribute__((deprecated)) void esp_clear_watchpoint(int no)
+{
+    esp_cpu_clear_watchpoint(no);
+}
+
+#endif
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_expression_with_stack.h b/tools/sdk/esp32s3/include/esp_system/include/esp_expression_with_stack.h
new file mode 100644
index 00000000000..456e5db16bd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_expression_with_stack.h
@@ -0,0 +1,49 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdbool.h>
+#include "freertos/FreeRTOS.h"
+#include "freertos/semphr.h"
+#include "freertos/task.h"
+#include "esp_debug_helpers.h"
+#include "esp_log.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void (*shared_stack_function)(void);
+
+#define ESP_EXECUTE_EXPRESSION_WITH_STACK(lock, stack, stack_size, expression) \
+    esp_execute_shared_stack_function(lock, stack, stack_size, expression)
+
+/**
+ * @brief Calls user defined shared stack space function
+ * @param lock Mutex object to protect in case of shared stack
+ * @param stack Pointer to user alocated stack
+ * @param stack_size Size of current stack in bytes
+ * @param function pointer to the shared stack function to be executed
+ * @note  if either lock, stack or stack size is invalid, the expression will
+ *          be called using the current stack.
+ */
+void esp_execute_shared_stack_function(SemaphoreHandle_t lock,
+                                      void *stack,
+                                      size_t stack_size,
+                                      shared_stack_function function);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_freertos_hooks.h b/tools/sdk/esp32s3/include/esp_system/include/esp_freertos_hooks.h
new file mode 100644
index 00000000000..290d580b1d7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_freertos_hooks.h
@@ -0,0 +1,134 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_FREERTOS_HOOKS_H__
+#define __ESP_FREERTOS_HOOKS_H__
+
+#include <stdbool.h>
+
+#include "freertos/portmacro.h"
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*
+ Definitions for the tickhook and idlehook callbacks
+*/
+typedef bool (*esp_freertos_idle_cb_t)(void);
+typedef void (*esp_freertos_tick_cb_t)(void);
+
+/**
+  * @brief  Register a callback to be called from the specified core's idle hook.
+  *         The callback should return true if it should be called by the idle hook
+  *         once per interrupt (or FreeRTOS tick), and return false if it should
+  *         be called repeatedly as fast as possible by the idle hook.
+  *
+  * @warning Idle callbacks MUST NOT, UNDER ANY CIRCUMSTANCES, CALL
+  *          A FUNCTION THAT MIGHT BLOCK.
+  *
+  * @param[in]  new_idle_cb     Callback to be called
+  * @param[in]  cpuid           id of the core
+  *
+  * @return
+  *     - ESP_OK:              Callback registered to the specified core's idle hook
+  *     - ESP_ERR_NO_MEM:      No more space on the specified core's idle hook to register callback
+  *     - ESP_ERR_INVALID_ARG: cpuid is invalid
+  */
+esp_err_t esp_register_freertos_idle_hook_for_cpu(esp_freertos_idle_cb_t new_idle_cb, UBaseType_t cpuid);
+
+/**
+  * @brief  Register a callback to the idle hook of the core that calls this function.
+  *         The callback should return true if it should be called by the idle hook
+  *         once per interrupt (or FreeRTOS tick), and return false if it should
+  *         be called repeatedly as fast as possible by the idle hook.
+  *
+  * @warning Idle callbacks MUST NOT, UNDER ANY CIRCUMSTANCES, CALL
+  *          A FUNCTION THAT MIGHT BLOCK.
+  *
+  * @param[in]  new_idle_cb     Callback to be called
+  *
+  * @return
+  *     - ESP_OK:         Callback registered to the calling core's idle hook
+  *     - ESP_ERR_NO_MEM: No more space on the calling core's idle hook to register callback
+  */
+esp_err_t esp_register_freertos_idle_hook(esp_freertos_idle_cb_t new_idle_cb);
+
+/**
+  * @brief  Register a callback to be called from the specified core's tick hook.
+  *
+  * @param[in]  new_tick_cb     Callback to be called
+  * @param[in]  cpuid           id of the core
+  *
+  * @return
+  *     - ESP_OK:              Callback registered to specified core's tick hook
+  *     - ESP_ERR_NO_MEM:      No more space on the specified core's tick hook to register the callback
+  *     - ESP_ERR_INVALID_ARG: cpuid is invalid
+  */
+esp_err_t esp_register_freertos_tick_hook_for_cpu(esp_freertos_tick_cb_t new_tick_cb, UBaseType_t cpuid);
+
+/**
+  * @brief  Register a callback to be called from the calling core's tick hook.
+  *
+  * @param[in]  new_tick_cb     Callback to be called
+  *
+  * @return
+  *     - ESP_OK:         Callback registered to the calling core's tick hook
+  *     - ESP_ERR_NO_MEM: No more space on the calling core's tick hook to register the callback
+  */
+esp_err_t esp_register_freertos_tick_hook(esp_freertos_tick_cb_t new_tick_cb);
+
+/**
+  * @brief  Unregister an idle callback from the idle hook of the specified core
+  *
+  * @param[in]  old_idle_cb     Callback to be unregistered
+  * @param[in]  cpuid           id of the core
+  */
+void esp_deregister_freertos_idle_hook_for_cpu(esp_freertos_idle_cb_t old_idle_cb, UBaseType_t cpuid);
+
+/**
+  * @brief  Unregister an idle callback. If the idle callback is registered to
+  *         the idle hooks of both cores, the idle hook will be unregistered from
+  *         both cores
+  *
+  * @param[in]  old_idle_cb     Callback to be unregistered
+  */
+void esp_deregister_freertos_idle_hook(esp_freertos_idle_cb_t old_idle_cb);
+
+/**
+  * @brief  Unregister a tick callback from the tick hook of the specified core
+  *
+  * @param[in]  old_tick_cb     Callback to be unregistered
+  * @param[in]  cpuid           id of the core
+  */
+void esp_deregister_freertos_tick_hook_for_cpu(esp_freertos_tick_cb_t old_tick_cb, UBaseType_t cpuid);
+
+/**
+  * @brief  Unregister a tick callback. If the tick callback is registered to the
+  *         tick hooks of both cores, the tick hook will be unregistered from
+  *         both cores
+  *
+  * @param[in]  old_tick_cb     Callback to be unregistered
+  */
+void esp_deregister_freertos_tick_hook(esp_freertos_tick_cb_t old_tick_cb);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_int_wdt.h b/tools/sdk/esp32s3/include/esp_system/include/esp_int_wdt.h
new file mode 100644
index 00000000000..2bda5d8557e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_int_wdt.h
@@ -0,0 +1,67 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_INT_WDT_H
+#define __ESP_INT_WDT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @addtogroup Watchdog_APIs
+  * @{
+  */
+
+/*
+This routine enables a watchdog to catch instances of processes disabling
+interrupts for too long, or code within interrupt handlers taking too long.
+It does this by setting up a watchdog which gets fed from the FreeRTOS
+task switch interrupt. When this watchdog times out, initially it will call
+a high-level interrupt routine that will panic FreeRTOS in order to allow
+for forensic examination of the state of the both CPUs. When this interrupt
+handler is not called and the watchdog times out a second time, it will
+reset the SoC.
+
+This uses the TIMERG1 WDT.
+*/
+
+
+/**
+  * @brief  Initialize the non-CPU-specific parts of interrupt watchdog.
+  *         This is called in the init code if the interrupt watchdog
+  *         is enabled in menuconfig.
+  *
+  */
+void esp_int_wdt_init(void);
+
+/**
+  * @brief  Enable the interrupt watchdog on the current CPU. This is called
+  *         in the init code by both CPUs if the interrupt watchdog is enabled
+  *         in menuconfig.
+  *
+  */
+void esp_int_wdt_cpu_init(void);
+
+
+
+/**
+  * @}
+  */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_private/crosscore_int.h b/tools/sdk/esp32s3/include/esp_system/include/esp_private/crosscore_int.h
new file mode 100644
index 00000000000..aea75644b1c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_private/crosscore_int.h
@@ -0,0 +1,76 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef __ESP_CROSSCORE_INT_H
+#define __ESP_CROSSCORE_INT_H
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Initialize the crosscore interrupt system for this CPU.
+ * This needs to be called once on every CPU that is used
+ * by FreeRTOS.
+ *
+ * If multicore FreeRTOS support is enabled, this will be
+ * called automatically by the startup code and should not
+ * be called manually.
+ */
+void esp_crosscore_int_init(void);
+
+
+/**
+ * Send an interrupt to a CPU indicating it should yield its
+ * currently running task in favour of a higher-priority task
+ * that presumably just woke up.
+ *
+ * This is used internally by FreeRTOS in multicore mode
+ * and should not be called by the user.
+ *
+ * @param core_id Core that should do the yielding
+ */
+void esp_crosscore_int_send_yield(int core_id);
+
+
+/**
+ * Send an interrupt to a CPU indicating it should update its
+ * CCOMPARE1 value due to a frequency switch.
+ *
+ * This is used internally when dynamic frequency switching is
+ * enabled, and should not be called from application code.
+ *
+ * @param core_id Core that should update its CCOMPARE1 value
+ */
+void esp_crosscore_int_send_freq_switch(int core_id);
+
+
+#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
+/**
+ * Send an interrupt to a CPU indicating it should print its current backtrace
+ *
+ * This is use internally by the Task Watchdog to dump the backtrace of the
+ * opposite core and should not be called from application code.
+ *
+ * @param core_id Core that should print its backtrace
+ */
+void esp_crosscore_int_send_print_backtrace(int core_id);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_private/dbg_stubs.h b/tools/sdk/esp32s3/include/esp_system/include/esp_private/dbg_stubs.h
new file mode 100644
index 00000000000..ead23447bc7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_private/dbg_stubs.h
@@ -0,0 +1,76 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef ESP_DBG_STUBS_H_
+#define ESP_DBG_STUBS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "esp_err.h"
+
+/**
+ * Debug stubs entries IDs
+ */
+typedef enum {
+    ESP_DBG_STUB_MAGIC_NUM,
+    ESP_DBG_STUB_TABLE_SIZE,
+    ESP_DBG_STUB_CONTROL_DATA,   ///< stubs descriptor entry
+    ESP_DBG_STUB_ENTRY_FIRST,
+    ESP_DBG_STUB_ENTRY_GCOV	///< GCOV entry
+        = ESP_DBG_STUB_ENTRY_FIRST,
+    ESP_DBG_STUB_ENTRY_CAPABILITIES,
+    ESP_DBG_STUB_ENTRY_MAX
+} esp_dbg_stub_id_t;
+
+#define ESP_DBG_STUB_MAGIC_NUM_VAL      0xFEEDBEEF
+#define ESP_DBG_STUB_CAP_GCOV_TASK      (1 << 0)
+
+/**
+ * @brief  Initializes debug stubs.
+ *
+ * @note   Must be called after esp_apptrace_init() if app tracing is enabled.
+ */
+void esp_dbg_stubs_init(void);
+
+/**
+ * @brief  Initializes application tracing module.
+ *
+ * @note   Should be called before any esp_apptrace_xxx call.
+ *
+ * @param id 	Stub ID.
+ * @param entry Stub entry. Usually it is stub entry function address,
+ *              but can be any value meaningfull for OpenOCD command/code
+ *              such as capabilities
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_dbg_stub_entry_set(esp_dbg_stub_id_t id, uint32_t entry);
+
+/**
+ * @brief   Retrives the corresponding stub entry
+ *
+ * @param id 	Stub ID.
+ * @param entry Stub entry. Usually it is stub entry function address,
+ *              but can be any value meaningfull for OpenOCD command/code
+ *              such as capabilities
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_dbg_stub_entry_get(esp_dbg_stub_id_t id, uint32_t *entry);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //ESP_DBG_STUBS_H_
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_private/esp_ipc_isr.h b/tools/sdk/esp32s3/include/esp_system/include/esp_private/esp_ipc_isr.h
new file mode 100644
index 00000000000..ccdfe1deaa2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_private/esp_ipc_isr.h
@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_ESP_IPC_ISR_ENABLE
+
+/**
+ * @brief Initialize the IPC ISR feature, must be called for each CPU
+ *
+ * @note This function is called from ipc_task().
+ *
+ * This function initializes the IPC ISR feature and must be called before any other esp_ipc_isr...() functions.
+ * The IPC ISR feature allows for callbacks (written in assembly) to be run on a particular CPU in the context of a
+ * High Priority Interrupt.
+ *
+ * - This function will register a High Priority Interrupt for a CPU where it is called. The priority of the interrupts is dependent on
+ *   the CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL option.
+ * - Callbacks written in assembly can then run in context of the registered High Priority Interrupts
+ * - Callbacks can be executed by calling esp_ipc_isr_asm_call() or esp_ipc_isr_asm_call_blocking()
+ */
+void esp_ipc_isr_init(void);
+
+#endif // CONFIG_ESP_IPC_ISR_ENABLE
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_private/panic_internal.h b/tools/sdk/esp32s3/include/esp_system/include/esp_private/panic_internal.h
new file mode 100644
index 00000000000..d43a705aba4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_private/panic_internal.h
@@ -0,0 +1,97 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "soc/soc_caps.h"
+
+#include "sdkconfig.h"
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern bool g_panic_abort;
+
+extern void *g_exc_frames[SOC_CPU_CORES_NUM];
+
+// Function to print longer amounts of information such as the details
+// and backtrace field of panic_info_t. These functions should limit themselves
+// to printing to the console and should do other more involved processing,
+// and must be aware that the main logic in panic.c has a watchdog timer active.
+typedef void (*panic_info_dump_fn_t)(const void* frame);
+
+// Non architecture specific exceptions (generally valid for all targets).
+// Can be used to convey to the main logic what exception is being
+// dealt with to perform some actions, without knowing the underlying
+// architecture/chip-specific exception.
+typedef enum {
+    PANIC_EXCEPTION_DEBUG,
+    PANIC_EXCEPTION_IWDT,
+    PANIC_EXCEPTION_TWDT,
+    PANIC_EXCEPTION_ABORT,
+    PANIC_EXCEPTION_FAULT,                  // catch-all for all types of faults
+} panic_exception_t;
+
+typedef struct {
+    int core;                               // core which triggered panic
+    panic_exception_t exception;            // non-architecture-specific exception code
+    const char* reason;                     // exception string
+    const char* description;                // short description of the exception
+    panic_info_dump_fn_t details;           // more details on the exception
+    panic_info_dump_fn_t state;             // processor state, usually the contents of the registers
+    const void* addr;                       // instruction address that triggered the exception
+    const void* frame;                      // reference to the frame
+    bool pseudo_excause;                    // flag indicating that exception cause has special meaning
+} panic_info_t;
+
+#define PANIC_INFO_DUMP(info, dump_fn)      {if ((info)->dump_fn) (*(info)->dump_fn)((info->frame));}
+
+// Create own print functions, since printf might be broken, and can be silenced
+// when CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT
+#if !CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT
+void panic_print_char(char c);
+void panic_print_str(const char *str);
+void panic_print_dec(int d);
+void panic_print_hex(int h);
+#else
+#define panic_print_char(c)
+#define panic_print_str(str)
+#define panic_print_dec(d)
+#define panic_print_hex(h)
+#endif
+
+void __attribute__((noreturn)) panic_abort(const char *details);
+
+void panic_arch_fill_info(void *frame, panic_info_t *info);
+
+void panic_soc_fill_info(void *frame, panic_info_t *info);
+
+void panic_print_registers(const void *frame, int core);
+
+void panic_print_backtrace(const void *frame, int core);
+
+uint32_t panic_get_address(const void* frame);
+
+void panic_set_address(void *frame, uint32_t addr);
+
+uint32_t panic_get_cause(const void* frame);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_private/startup_internal.h b/tools/sdk/esp32s3/include/esp_system/include/esp_private/startup_internal.h
new file mode 100644
index 00000000000..52ec6e09b37
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_private/startup_internal.h
@@ -0,0 +1,74 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_attr.h"
+
+#include "soc/soc_caps.h"
+#include "hal/cpu_hal.h"
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern bool g_spiram_ok; // [refactor-todo] better way to communicate this from port layer to common startup code
+
+// Port layer defines the entry point. It then transfer control to a `sys_startup_fn_t`, stored in this
+// array, one per core.
+typedef void (*sys_startup_fn_t)(void);
+
+/* This array of per-CPU system layer startup functions is initialized in the non-port part of esp_system */
+#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
+extern sys_startup_fn_t const g_startup_fn[SOC_CPU_CORES_NUM];
+#else
+extern sys_startup_fn_t const g_startup_fn[1];
+#endif
+
+// Utility to execute `sys_startup_fn_t` for the current core.
+#define SYS_STARTUP_FN()  ((*g_startup_fn[(cpu_hal_get_core_id())])())
+
+#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
+void startup_resume_other_cores(void);
+#endif
+
+typedef struct {
+  void (*fn)(void);
+  uint32_t cores;
+} esp_system_init_fn_t;
+
+/*
+ * Declare an component initialization function that will execute on the specified cores (ex. if BIT0 == 1, will execute
+ * on CORE0, CORE1 if BIT1 and so on).
+ *
+ * @note Initialization functions should be placed in a compilation unit where at least one other
+ * symbol is referenced 'meaningfully' in another compilation unit, otherwise this gets discarded during linking. (By
+ * 'meaningfully' we mean the reference should not itself get optimized out by the compiler/discarded by the linker).
+ */
+#define ESP_SYSTEM_INIT_FN(f, c, ...) \
+static void  __attribute__((used)) __VA_ARGS__ __esp_system_init_fn_##f(void); \
+static __attribute__((used)) esp_system_init_fn_t _SECTION_ATTR_IMPL(".esp_system_init_fn", f) \
+                    esp_system_init_fn_##f = { .fn = ( __esp_system_init_fn_##f), .cores = (c) }; \
+static __attribute__((used)) __VA_ARGS__ void __esp_system_init_fn_##f(void) // [refactor-todo] this can be made public API if we allow components to declare init functions,
+                                                                             // instead of calling them explicitly
+
+extern uint64_t g_startup_time;   // Startup time that serves as the point of origin for system time. Should be set by the entry
+                                  // function in the port layer. May be 0 as well if this is not backed by a persistent counter, in which case
+                                  // startup time = system time = 0 at the point the entry function sets this variable.
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_private/system_internal.h b/tools/sdk/esp32s3/include/esp_system/include/esp_private/system_internal.h
new file mode 100644
index 00000000000..2125fa7ff4d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_private/system_internal.h
@@ -0,0 +1,81 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "esp_system.h"
+
+#define MWDT0_TICK_PRESCALER    40000
+#define MWDT0_TICKS_PER_US      500
+#define MWDT1_TICK_PRESCALER    40000
+#define MWDT1_TICKS_PER_US      500
+
+/**
+ * @brief  Internal function to restart PRO and APP CPUs.
+ *
+ * @note This function should not be called from FreeRTOS applications.
+ *       Use esp_restart instead.
+ *
+ * This is an internal function called by esp_restart. It is called directly
+ * by the panic handler and brownout detector interrupt.
+ */
+void esp_restart_noos(void) __attribute__ ((noreturn));
+
+/**
+ * @brief Similar to esp_restart_noos, but resets all the digital peripherals.
+ */
+void esp_restart_noos_dig(void) __attribute__ ((noreturn));
+
+/**
+ * @brief  Internal function to set reset reason hint
+ *
+ * The hint is used do distinguish different reset reasons when software reset
+ * is performed.
+ *
+ * The hint is stored in RTC store register, RTC_RESET_CAUSE_REG.
+ *
+ * @param hint  Desired esp_reset_reason_t value for the real reset reason
+ */
+void esp_reset_reason_set_hint(esp_reset_reason_t hint);
+
+/**
+ * @brief  Internal function to get the reset hint value
+ * @return  - Reset hint value previously stored into RTC_RESET_CAUSE_REG using
+ *          esp_reset_reason_set_hint function
+ *          - ESP_RST_UNKNOWN if the value in RTC_RESET_CAUSE_REG is invalid
+ */
+esp_reset_reason_t esp_reset_reason_get_hint(void);
+
+/**
+ * @brief Get the time in microseconds since startup
+ *
+ * @returns time since g_startup_time; definition should be fixed by system time provider
+ * no matter the underlying timer used.
+ */
+int64_t esp_system_get_time(void);
+
+/**
+ * @brief Get the resolution of the time returned by `esp_system_get_time`.
+ *
+ * @returns the resolution in nanoseconds
+ */
+uint32_t esp_system_get_time_resolution(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_private/usb_console.h b/tools/sdk/esp32s3/include/esp_system/include/esp_private/usb_console.h
new file mode 100644
index 00000000000..1e9536f458c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_private/usb_console.h
@@ -0,0 +1,73 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file usb_console.h
+ * This file contains definitions of low-level USB console functions.
+ * These functions are not considered to be a public interface and
+ * should not be called by applications directly.
+ * Application interface to the USB console is provided either by
+ * "cdcacm" VFS driver, or by the USB CDC driver in TinyUSB.
+ */
+
+
+/**
+ * RX/TX callback function type
+ * @param arg  callback-specific context pointer
+ */
+typedef void (*esp_usb_console_cb_t)(void* arg);
+
+/**
+ * Initialize USB console output using ROM USB CDC driver.
+ * This function is called by the early startup code if USB CDC is
+ * selected as the console output option.
+ * @return
+ *  - ESP_OK on success
+ *  - ESP_ERR_NO_MEM
+ *  - other error codes from the interrupt allocator
+ */
+esp_err_t esp_usb_console_init(void);
+
+/**
+ * Write a buffer to USB CDC
+ * @param buf  data to write
+ * @param size  size of the data, in bytes
+ * @return -1 on error, otherwise the number of bytes
+ */
+ssize_t esp_usb_console_write_buf(const char* buf, size_t size);
+
+ssize_t esp_usb_console_flush(void);
+
+ssize_t esp_usb_console_read_buf(char* buf, size_t buf_size);
+
+bool esp_usb_console_read_available(void);
+
+bool esp_usb_console_write_available(void);
+
+esp_err_t esp_usb_console_set_cb(esp_usb_console_cb_t rx_cb, esp_usb_console_cb_t tx_cb, void* arg);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_system.h b/tools/sdk/esp32s3/include/esp_system/include/esp_system.h
new file mode 100644
index 00000000000..b98b7194902
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_system.h
@@ -0,0 +1,138 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_SYSTEM_H__
+#define __ESP_SYSTEM_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_attr.h"
+#include "esp_bit_defs.h"
+#include "esp_idf_version.h"
+
+#include "sdkconfig.h"
+
+// For backward compatibility. These headers
+// contains hardware operation functions and definitions
+// that were originally declared in this header.
+#include "esp_mac.h"
+#include "esp_chip_info.h"
+#include "esp_random.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Reset reasons
+ */
+typedef enum {
+    ESP_RST_UNKNOWN,    //!< Reset reason can not be determined
+    ESP_RST_POWERON,    //!< Reset due to power-on event
+    ESP_RST_EXT,        //!< Reset by external pin (not applicable for ESP32)
+    ESP_RST_SW,         //!< Software reset via esp_restart
+    ESP_RST_PANIC,      //!< Software reset due to exception/panic
+    ESP_RST_INT_WDT,    //!< Reset (software or hardware) due to interrupt watchdog
+    ESP_RST_TASK_WDT,   //!< Reset due to task watchdog
+    ESP_RST_WDT,        //!< Reset due to other watchdogs
+    ESP_RST_DEEPSLEEP,  //!< Reset after exiting deep sleep mode
+    ESP_RST_BROWNOUT,   //!< Brownout reset (software or hardware)
+    ESP_RST_SDIO,       //!< Reset over SDIO
+} esp_reset_reason_t;
+
+/**
+ * Shutdown handler type
+ */
+typedef void (*shutdown_handler_t)(void);
+
+/**
+  * @brief  Register shutdown handler
+  *
+  * This function allows you to register a handler that gets invoked before
+  * the application is restarted using esp_restart function.
+  * @param handle function to execute on restart
+  * @return
+  *   - ESP_OK on success
+  *   - ESP_ERR_INVALID_STATE if the handler has already been registered
+  *   - ESP_ERR_NO_MEM if no more shutdown handler slots are available
+  */
+esp_err_t esp_register_shutdown_handler(shutdown_handler_t handle);
+
+/**
+  * @brief  Unregister shutdown handler
+  *
+  * This function allows you to unregister a handler which was previously
+  * registered using esp_register_shutdown_handler function.
+  *   - ESP_OK on success
+  *   - ESP_ERR_INVALID_STATE if the given handler hasn't been registered before
+  */
+esp_err_t esp_unregister_shutdown_handler(shutdown_handler_t handle);
+
+
+/**
+  * @brief  Restart PRO and APP CPUs.
+  *
+  * This function can be called both from PRO and APP CPUs.
+  * After successful restart, CPU reset reason will be SW_CPU_RESET.
+  * Peripherals (except for WiFi, BT, UART0, SPI1, and legacy timers) are not reset.
+  * This function does not return.
+  */
+void esp_restart(void) __attribute__ ((noreturn));
+
+/**
+ * @brief  Get reason of last reset
+ * @return See description of esp_reset_reason_t for explanation of each value.
+ */
+esp_reset_reason_t esp_reset_reason(void);
+
+/**
+  * @brief  Get the size of available heap.
+  *
+  * Note that the returned value may be larger than the maximum contiguous block
+  * which can be allocated.
+  *
+  * @return Available heap size, in bytes.
+  */
+uint32_t esp_get_free_heap_size(void);
+
+/**
+  * @brief  Get the size of available internal heap.
+  *
+  * Note that the returned value may be larger than the maximum contiguous block
+  * which can be allocated.
+  *
+  * @return Available internal heap size, in bytes.
+  */
+uint32_t esp_get_free_internal_heap_size(void);
+
+/**
+  * @brief Get the minimum heap that has ever been available
+  *
+  * @return Minimum free heap ever available
+  */
+uint32_t esp_get_minimum_free_heap_size( void );
+
+/**
+ * @brief Trigger a software abort
+ *
+ * @param details Details that will be displayed during panic handling.
+ */
+void  __attribute__((noreturn)) esp_system_abort(const char* details);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_SYSTEM_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_task.h b/tools/sdk/esp32s3/include/esp_system/include/esp_task.h
new file mode 100644
index 00000000000..adca9cde6bc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_task.h
@@ -0,0 +1,66 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/* Notes:
+ * 1. Put all task priority and stack size definition in this file
+ * 2. If the task priority is less than 10, use ESP_TASK_PRIO_MIN + X style,
+ *    otherwise use ESP_TASK_PRIO_MAX - X style
+ * 3. If this is a daemon task, the macro prefix is ESP_TASKD_, otherwise
+ *    it's ESP_TASK_
+ * 4. If the configMAX_PRIORITIES is modified, please make all priority are
+ *    greater than 0
+ * 5. Make sure esp_task.h is consistent between wifi lib and idf
+ * 6. If changing system task priorities, please check the values documented in /api-guides/performance/speed.rst
+ * are up to date
+ */
+
+#ifndef _ESP_TASK_H_
+#define _ESP_TASK_H_
+
+#include "sdkconfig.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/FreeRTOSConfig.h"
+
+#define ESP_TASK_PRIO_MAX (configMAX_PRIORITIES)
+#define ESP_TASK_PRIO_MIN (0)
+
+/* Bt contoller Task */
+/* controller */
+#define ESP_TASK_BT_CONTROLLER_PRIO   (ESP_TASK_PRIO_MAX - 2)
+#ifdef CONFIG_NEWLIB_NANO_FORMAT
+#define TASK_EXTRA_STACK_SIZE      (0)
+#else
+#define TASK_EXTRA_STACK_SIZE      (512)
+#endif
+
+#define BT_TASK_EXTRA_STACK_SIZE      TASK_EXTRA_STACK_SIZE
+#define ESP_TASK_BT_CONTROLLER_STACK  (3584 + TASK_EXTRA_STACK_SIZE)
+
+
+/* idf task */
+#define ESP_TASK_TIMER_PRIO           (ESP_TASK_PRIO_MAX - 3)
+#define ESP_TASK_TIMER_STACK          (CONFIG_ESP_TIMER_TASK_STACK_SIZE +  TASK_EXTRA_STACK_SIZE)
+#define ESP_TASKD_EVENT_PRIO          (ESP_TASK_PRIO_MAX - 5)
+#if CONFIG_LWIP_TCPIP_CORE_LOCKING
+#define ESP_TASKD_EVENT_STACK         (CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE + TASK_EXTRA_STACK_SIZE + 2048)
+#else
+#define ESP_TASKD_EVENT_STACK         (CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE + TASK_EXTRA_STACK_SIZE)
+#endif /* CONFIG_LWIP_TCPIP_CORE_LOCKING */
+#define ESP_TASK_TCPIP_PRIO           (ESP_TASK_PRIO_MAX - 7)
+#define ESP_TASK_TCPIP_STACK          (CONFIG_LWIP_TCPIP_TASK_STACK_SIZE + TASK_EXTRA_STACK_SIZE)
+#define ESP_TASK_MAIN_PRIO            (ESP_TASK_PRIO_MIN + 1)
+#define ESP_TASK_MAIN_STACK           (CONFIG_ESP_MAIN_TASK_STACK_SIZE + TASK_EXTRA_STACK_SIZE)
+#define ESP_TASK_MAIN_CORE            CONFIG_ESP_MAIN_TASK_AFFINITY
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_task_wdt.h b/tools/sdk/esp32s3/include/esp_system/include/esp_task_wdt.h
new file mode 100644
index 00000000000..cf64cfc1477
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_task_wdt.h
@@ -0,0 +1,147 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief  Initialize the Task Watchdog Timer (TWDT)
+  *
+  * This function configures and initializes the TWDT. If the TWDT is already
+  * initialized when this function is called, this function will update the
+  * TWDT's timeout period and panic configurations instead. After initializing
+  * the TWDT, any task can elect to be watched by the TWDT by subscribing to it
+  * using esp_task_wdt_add().
+  *
+  * @param[in]  timeout     Timeout period of TWDT in seconds
+  * @param[in]  panic       Flag that controls whether the panic handler will be
+  *                         executed when the TWDT times out
+  *
+  * @return
+  *     - ESP_OK: Initialization was successful
+  *     - ESP_ERR_NO_MEM: Initialization failed due to lack of memory
+  *
+  * @note   esp_task_wdt_init() must only be called after the scheduler
+  *         started
+  */
+esp_err_t esp_task_wdt_init(uint32_t timeout, bool panic);
+
+/**
+ * @brief   Deinitialize the Task Watchdog Timer (TWDT)
+ *
+ * This function will deinitialize the TWDT. Calling this function whilst tasks
+ * are still subscribed to the TWDT, or when the TWDT is already deinitialized,
+ * will result in an error code being returned.
+ *
+ * @return
+ *      - ESP_OK: TWDT successfully deinitialized
+ *      - ESP_ERR_INVALID_STATE: Error, tasks are still subscribed to the TWDT
+ *      - ESP_ERR_NOT_FOUND: Error, TWDT has already been deinitialized
+ */
+esp_err_t esp_task_wdt_deinit(void);
+
+/**
+  * @brief  Subscribe a task to the Task Watchdog Timer (TWDT)
+  *
+  * This function subscribes a task to the TWDT. Each subscribed task must
+  * periodically call esp_task_wdt_reset() to prevent the TWDT from elapsing its
+  * timeout period. Failure to do so will result in a TWDT timeout. If the task
+  * being subscribed is one of the Idle Tasks, this function will automatically
+  * enable esp_task_wdt_reset() to called from the Idle Hook of the Idle Task.
+  * Calling this function whilst the TWDT is uninitialized or attempting to
+  * subscribe an already subscribed task will result in an error code being
+  * returned.
+  *
+  * @param[in]  handle  Handle of the task. Input NULL to subscribe the current
+  *                     running task to the TWDT
+  *
+  * @return
+  *     - ESP_OK: Successfully subscribed the task to the TWDT
+  *     - ESP_ERR_INVALID_ARG: Error, the task is already subscribed
+  *     - ESP_ERR_NO_MEM: Error, could not subscribe the task due to lack of
+  *                       memory
+  *     - ESP_ERR_INVALID_STATE: Error, the TWDT has not been initialized yet
+  */
+esp_err_t esp_task_wdt_add(TaskHandle_t handle);
+
+/**
+  * @brief  Reset the Task Watchdog Timer (TWDT) on behalf of the currently
+  *         running task
+  *
+  * This function will reset the TWDT on behalf of the currently running task.
+  * Each subscribed task must periodically call this function to prevent the
+  * TWDT from timing out. If one or more subscribed tasks fail to reset the
+  * TWDT on their own behalf, a TWDT timeout will occur. If the IDLE tasks have
+  * been subscribed to the TWDT, they will automatically call this function from
+  * their idle hooks. Calling this function from a task that has not subscribed
+  * to the TWDT, or when the TWDT is uninitialized will result in an error code
+  * being returned.
+  *
+  * @return
+  *     - ESP_OK: Successfully reset the TWDT on behalf of the currently
+  *               running task
+  *     - ESP_ERR_NOT_FOUND: Error, the current running task has not subscribed
+  *                          to the TWDT
+  *     - ESP_ERR_INVALID_STATE: Error, the TWDT has not been initialized yet
+  */
+esp_err_t esp_task_wdt_reset(void);
+
+/**
+  * @brief  Unsubscribes a task from the Task Watchdog Timer (TWDT)
+  *
+  * This function will unsubscribe a task from the TWDT. After being
+  * unsubscribed, the task should no longer call esp_task_wdt_reset(). If the
+  * task is an IDLE task, this function will automatically disable the calling
+  * of esp_task_wdt_reset() from the Idle Hook. Calling this function whilst the
+  * TWDT is uninitialized or attempting to unsubscribe an already unsubscribed
+  * task from the TWDT will result in an error code being returned.
+  *
+  * @param[in]  handle  Handle of the task. Input NULL to unsubscribe the
+  *                     current running task.
+  *
+  * @return
+  *     - ESP_OK: Successfully unsubscribed the task from the TWDT
+  *     - ESP_ERR_INVALID_ARG: Error, the task is already unsubscribed
+  *     - ESP_ERR_INVALID_STATE: Error, the TWDT has not been initialized yet
+  */
+esp_err_t esp_task_wdt_delete(TaskHandle_t handle);
+
+/**
+  * @brief   Query whether a task is subscribed to the Task Watchdog Timer (TWDT)
+  *
+  * This function will query whether a task is currently subscribed to the TWDT,
+  * or whether the TWDT is initialized.
+  *
+  * @param[in]  handle  Handle of the task. Input NULL to query the current
+  *                     running task.
+  *
+  * @return:
+  *     - ESP_OK: The task is currently subscribed to the TWDT
+  *     - ESP_ERR_NOT_FOUND: The task is currently not subscribed to the TWDT
+  *     - ESP_ERR_INVALID_STATE: The TWDT is not initialized, therefore no tasks
+  *                              can be subscribed
+  */
+esp_err_t esp_task_wdt_status(TaskHandle_t handle);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/include/esp_xt_wdt.h b/tools/sdk/esp32s3/include/esp_system/include/esp_xt_wdt.h
new file mode 100644
index 00000000000..3b39d8056dc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/include/esp_xt_wdt.h
@@ -0,0 +1,63 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+
+#include "esp_err.h"
+#include "esp_intr_alloc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief esp_xt_wdt configuration struct
+ *
+ */
+typedef struct {
+    uint8_t timeout;                /*!< Watchdog timeout */
+    bool auto_backup_clk_enable;    /*!< Enable automatic switch to backup clock at timeout */
+} esp_xt_wdt_config_t;
+
+/*  Callback function for WDT interrupt*/
+typedef void (*esp_xt_callback_t)(void *arg);
+
+/**
+ * @brief Initializes the xtal32k watchdog timer
+ *
+ * @param cfg Pointer to configuration struct
+ * @return esp_err_t
+ *      - ESP_OK: XTWDT was successfully enabled
+ *      - ESP_ERR_NO_MEM: Failed to allocate ISR
+ */
+esp_err_t esp_xt_wdt_init(const esp_xt_wdt_config_t *cfg);
+
+/**
+ * @brief Register a callback function that will be called when the watchdog
+ *        times out.
+ *
+ * @note This function will be called from an interrupt context where the cache might be disabled.
+ *       Thus the function should be placed in IRAM and must not perform any blocking operations.
+ *
+ *       Only one callback function can be registered, any call to esp_xt_wdt_register_callback
+ *       will override the previous callback function.
+ *
+ * @param func The callback function to register
+ * @param arg  Pointer to argument that will be passed to the callback function
+ */
+void esp_xt_wdt_register_callback(esp_xt_callback_t func, void *arg);
+
+/**
+ * @brief Restores the xtal32k clock and re-enables the WDT
+ *
+ */
+void esp_xt_wdt_restore_clk(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/port/public_compat/brownout.h b/tools/sdk/esp32s3/include/esp_system/port/public_compat/brownout.h
new file mode 100644
index 00000000000..397092cd440
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/port/public_compat/brownout.h
@@ -0,0 +1,31 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef __ESP_BROWNOUT_H
+#define __ESP_BROWNOUT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void esp_brownout_init(void);
+
+void esp_brownout_disable(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/port/public_compat/cache_err_int.h b/tools/sdk/esp32s3/include/esp_system/port/public_compat/cache_err_int.h
new file mode 100644
index 00000000000..d87406f80f7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/port/public_compat/cache_err_int.h
@@ -0,0 +1,45 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief initialize cache invalid access interrupt
+ *
+ * This function enables cache invalid access interrupt source and connects it
+ * to interrupt input number. It is called from the startup code.
+ *
+ * On ESP32, the interrupt input number is ETS_MEMACCESS_ERR_INUM. On other targets
+ * it is ETS_CACHEERR_INUM. See soc/soc.h for more information.
+ */
+void esp_cache_err_int_init(void);
+
+
+/**
+ * @brief get the CPU which caused cache invalid access interrupt. Helper function in
+ * panic handling.
+ * @return
+ *  - PRO_CPU_NUM, if PRO_CPU has caused cache IA interrupt
+ *  - APP_CPU_NUM, if APP_CPU has caused cache IA interrupt
+ *  - (-1) otherwise
+ */
+int esp_cache_err_get_cpuid(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/port/public_compat/trax.h b/tools/sdk/esp32s3/include/esp_system/port/public_compat/trax.h
new file mode 100644
index 00000000000..1322b7b5850
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/port/public_compat/trax.h
@@ -0,0 +1,80 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "sdkconfig.h"
+#include "esp_err.h"
+#include "eri.h"
+#include "xtensa-debug-module.h"
+#include "xt_trax.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    TRAX_DOWNCOUNT_WORDS,
+    TRAX_DOWNCOUNT_INSTRUCTIONS
+} trax_downcount_unit_t;
+
+typedef enum {
+    TRAX_ENA_NONE = 0,
+    TRAX_ENA_PRO,
+    TRAX_ENA_APP,
+    TRAX_ENA_PRO_APP,
+    TRAX_ENA_PRO_APP_SWAP
+} trax_ena_select_t;
+
+/**
+ * @brief  Enable the trax memory blocks to be used as Trax memory.
+ *
+ * @param  pro_cpu_enable : true if Trax needs to be enabled for the pro CPU
+ * @param  app_cpu_enable : true if Trax needs to be enabled for the pro CPU
+ * @param  swap_regions : Normally, the pro CPU writes to Trax mem block 0 while
+ *                        the app cpu writes to block 1. Setting this to true
+ *                        inverts this.
+ *
+ * @return esp_err_t. Fails with ESP_ERR_NO_MEM if Trax enable is requested for 2 CPUs
+ *                    but memmap only has room for 1, or if Trax memmap is disabled
+ *                    entirely.
+ */
+int trax_enable(trax_ena_select_t ena);
+
+/**
+ * @brief  Start a Trax trace on the current CPU
+ *
+ * @param  units_until_stop : Set the units of the delay that gets passed to
+ *              trax_trigger_traceend_after_delay. One of TRAX_DOWNCOUNT_WORDS
+ *              or TRAX_DOWNCOUNT_INSTRUCTIONS.
+ *
+ * @return esp_err_t. Fails with ESP_ERR_NO_MEM if Trax is disabled.
+ */
+int trax_start_trace(trax_downcount_unit_t units_until_stop);
+
+
+/**
+ * @brief  Trigger a Trax trace stop after the indicated delay. If this is called
+ *         before and the previous delay hasn't ended yet, this will overwrite
+ *         that delay with the new value. The delay will always start at the time
+ *         the function is called.
+ *
+ * @param  delay : The delay to stop the trace in, in the unit indicated to
+ *              trax_start_trace. Note: the trace memory has 4K words available.
+ *
+ * @return esp_err_t
+ */
+int trax_trigger_traceend_after_delay(int delay);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_system/port/soc/esp32/cache_err_int.h b/tools/sdk/esp32s3/include/esp_system/port/soc/esp32/cache_err_int.h
new file mode 100644
index 00000000000..07085f53090
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/port/soc/esp32/cache_err_int.h
@@ -0,0 +1,2 @@
+#pragma once
+#include "cache_err_int.h"
diff --git a/tools/sdk/esp32s3/include/esp_system/port/soc/esp32c3/cache_err_int.h b/tools/sdk/esp32s3/include/esp_system/port/soc/esp32c3/cache_err_int.h
new file mode 100644
index 00000000000..07085f53090
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/port/soc/esp32c3/cache_err_int.h
@@ -0,0 +1,2 @@
+#pragma once
+#include "cache_err_int.h"
diff --git a/tools/sdk/esp32s3/include/esp_system/port/soc/esp32h2/cache_err_int.h b/tools/sdk/esp32s3/include/esp_system/port/soc/esp32h2/cache_err_int.h
new file mode 100644
index 00000000000..07085f53090
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/port/soc/esp32h2/cache_err_int.h
@@ -0,0 +1,2 @@
+#pragma once
+#include "cache_err_int.h"
diff --git a/tools/sdk/esp32s3/include/esp_system/port/soc/esp32s2/cache_err_int.h b/tools/sdk/esp32s3/include/esp_system/port/soc/esp32s2/cache_err_int.h
new file mode 100644
index 00000000000..07085f53090
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/port/soc/esp32s2/cache_err_int.h
@@ -0,0 +1,2 @@
+#pragma once
+#include "cache_err_int.h"
diff --git a/tools/sdk/esp32s3/include/esp_system/port/soc/esp32s3/cache_err_int.h b/tools/sdk/esp32s3/include/esp_system/port/soc/esp32s3/cache_err_int.h
new file mode 100644
index 00000000000..07085f53090
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_system/port/soc/esp32s3/cache_err_int.h
@@ -0,0 +1,2 @@
+#pragma once
+#include "cache_err_int.h"
diff --git a/tools/sdk/esp32s3/include/esp_timer/include/esp_private/esp_timer_private.h b/tools/sdk/esp32s3/include/esp_timer/include/esp_private/esp_timer_private.h
new file mode 100644
index 00000000000..ecd42641115
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_timer/include/esp_private/esp_timer_private.h
@@ -0,0 +1,70 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/**
+ * @file esp_private/esp_timer_private.h
+ *
+ * @brief Interface between common and platform-specific parts of esp_timer.
+ *
+ * The functions in this header file are implemented for each supported SoC.
+ * High level functions defined in esp_timer.c call the functions here to
+ * interact with the hardware.
+ *
+ * Note: The functions from this file are marked as private and are used exclusively
+ * inside the IDF in the power management and sleep files.
+ */
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Notify esp_timer implementation that APB frequency has changed
+ *
+ * Called by the frequency switching code.
+ *
+ * @param apb_ticks_per_us new number of APB clock ticks per microsecond
+ */
+void esp_timer_private_update_apb_freq(uint32_t apb_ticks_per_us);
+
+/**
+ * @brief Adjust current esp_timer time by a certain value
+ *
+ * Called from light sleep code to synchronize esp_timer time with RTC time.
+ *
+ * @param time_us  adjustment to apply to esp_timer time, in microseconds
+ */
+void esp_timer_private_advance(int64_t time_us);
+
+/**
+ * @brief obtain internal critical section used esp_timer implementation
+ * This can be used when a sequence of calls to esp_timer has to be made,
+ * and it is necessary that the state of the timer is consistent between
+ * the calls. Should be treated in the same way as a spinlock.
+ * Call esp_timer_unlock to release the lock
+ */
+void esp_timer_private_lock(void);
+
+/**
+ * @brief counterpart of esp_timer_lock
+ */
+void esp_timer_private_unlock(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_timer/include/esp_timer.h b/tools/sdk/esp32s3/include/esp_timer/include/esp_timer.h
new file mode 100644
index 00000000000..eb4c6d707ab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_timer/include/esp_timer.h
@@ -0,0 +1,268 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file esp_timer.h
+ * @brief microsecond-precision 64-bit timer API, replacement for ets_timer
+ *
+ * esp_timer APIs allow components to receive callbacks when a hardware timer
+ * reaches certain value. The timer provides microsecond accuracy and
+ * up to 64 bit range. Note that while the timer itself provides microsecond
+ * accuracy, callbacks are dispatched from an auxiliary task. Some time is
+ * needed to notify this task from timer ISR, and then to invoke the callback.
+ * If more than one callback needs to be dispatched at any particular time,
+ * each subsequent callback will be dispatched only when the previous callback
+ * returns. Therefore, callbacks should not do much work; instead, they should
+ * use RTOS notification mechanisms (queues, semaphores, event groups, etc.) to
+ * pass information to other tasks.
+ *
+ * To be implemented: it should be possible to request the callback to be called
+ * directly from the ISR. This reduces the latency, but has potential impact on
+ * all other callbacks which need to be dispatched. This option should only be
+ * used for simple callback functions, which do not take longer than a few
+ * microseconds to run.
+ *
+ * Implementation note: on the ESP32, esp_timer APIs use the "legacy" FRC2
+ * timer. Timer callbacks are called from a task running on the PRO CPU.
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Opaque type representing a single esp_timer
+ */
+typedef struct esp_timer* esp_timer_handle_t;
+
+/**
+ * @brief Timer callback function type
+ * @param arg pointer to opaque user-specific data
+ */
+typedef void (*esp_timer_cb_t)(void* arg);
+
+
+/**
+ * @brief Method for dispatching timer callback
+ */
+typedef enum {
+    ESP_TIMER_TASK,     //!< Callback is called from timer task
+#ifdef CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
+    ESP_TIMER_ISR,      //!< Callback is called from timer ISR
+#endif
+    ESP_TIMER_MAX,      //!< Count of the methods for dispatching timer callback
+} esp_timer_dispatch_t;
+
+/**
+ * @brief Timer configuration passed to esp_timer_create
+ */
+typedef struct {
+    esp_timer_cb_t callback;        //!< Function to call when timer expires
+    void* arg;                      //!< Argument to pass to the callback
+    esp_timer_dispatch_t dispatch_method;   //!< Call the callback from task or from ISR
+    const char* name;               //!< Timer name, used in esp_timer_dump function
+    bool skip_unhandled_events;     //!< Skip unhandled events for periodic timers
+} esp_timer_create_args_t;
+
+
+/**
+ * @brief Minimal initialization of esp_timer
+ *
+ * @note This function is called from startup code. Applications do not need
+ * to call this function before using other esp_timer APIs.
+ *
+ * This function can be called very early in startup process, after this call
+ * only esp_timer_get_time function can be used.
+ *
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t esp_timer_early_init(void);
+
+/**
+ * @brief Initialize esp_timer library
+ *
+ * @note This function is called from startup code. Applications do not need
+ * to call this function before using other esp_timer APIs.
+ * Before calling this function, esp_timer_early_init must be called by the
+ * startup code.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NO_MEM if allocation has failed
+ *      - ESP_ERR_INVALID_STATE if already initialized
+ *      - other errors from interrupt allocator
+ */
+esp_err_t esp_timer_init(void);
+
+/**
+ * @brief De-initialize esp_timer library
+ *
+ * @note Normally this function should not be called from applications
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if not yet initialized
+ */
+esp_err_t esp_timer_deinit(void);
+
+/**
+ * @brief Create an esp_timer instance
+ *
+ * @note When done using the timer, delete it with esp_timer_delete function.
+ *
+ * @param create_args   Pointer to a structure with timer creation arguments.
+ *                      Not saved by the library, can be allocated on the stack.
+ * @param[out] out_handle  Output, pointer to esp_timer_handle_t variable which
+ *                         will hold the created timer handle.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if some of the create_args are not valid
+ *      - ESP_ERR_INVALID_STATE if esp_timer library is not initialized yet
+ *      - ESP_ERR_NO_MEM if memory allocation fails
+ */
+esp_err_t esp_timer_create(const esp_timer_create_args_t* create_args,
+                           esp_timer_handle_t* out_handle);
+
+/**
+ * @brief Start one-shot timer
+ *
+ * Timer should not be running when this function is called.
+ *
+ * @param timer timer handle created using esp_timer_create
+ * @param timeout_us timer timeout, in microseconds relative to the current moment
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if the handle is invalid
+ *      - ESP_ERR_INVALID_STATE if the timer is already running
+ */
+esp_err_t esp_timer_start_once(esp_timer_handle_t timer, uint64_t timeout_us);
+
+/**
+ * @brief Start a periodic timer
+ *
+ * Timer should not be running when this function is called. This function will
+ * start the timer which will trigger every 'period' microseconds.
+ *
+ * @param timer timer handle created using esp_timer_create
+ * @param period timer period, in microseconds
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if the handle is invalid
+ *      - ESP_ERR_INVALID_STATE if the timer is already running
+ */
+esp_err_t esp_timer_start_periodic(esp_timer_handle_t timer, uint64_t period);
+
+/**
+ * @brief Stop the timer
+ *
+ * This function stops the timer previously started using esp_timer_start_once
+ * or esp_timer_start_periodic.
+ *
+ * @param timer timer handle created using esp_timer_create
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if the timer is not running
+ */
+esp_err_t esp_timer_stop(esp_timer_handle_t timer);
+
+/**
+ * @brief Delete an esp_timer instance
+ *
+ * The timer must be stopped before deleting. A one-shot timer which has expired
+ * does not need to be stopped.
+ *
+ * @param timer timer handle allocated using esp_timer_create
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if the timer is running
+ */
+esp_err_t esp_timer_delete(esp_timer_handle_t timer);
+
+/**
+ * @brief Get time in microseconds since boot
+ * @return number of microseconds since underlying timer has been started
+ */
+int64_t esp_timer_get_time(void);
+
+/**
+ * @brief Get the timestamp when the next timeout is expected to occur
+ * @return Timestamp of the nearest timer event, in microseconds.
+ *         The timebase is the same as for the values returned by esp_timer_get_time.
+ */
+int64_t esp_timer_get_next_alarm(void);
+
+/**
+ * @brief Get the timestamp when the next timeout is expected to occur skipping those which have skip_unhandled_events flag
+ * @return Timestamp of the nearest timer event, in microseconds.
+ *         The timebase is the same as for the values returned by esp_timer_get_time.
+ */
+int64_t esp_timer_get_next_alarm_for_wake_up(void);
+
+/**
+ * @brief Dump the list of timers to a stream
+ *
+ * If CONFIG_ESP_TIMER_PROFILING option is enabled, this prints the list of all
+ * the existing timers. Otherwise, only the list active timers is printed.
+ *
+ * The format is:
+ *
+ *   name  period  alarm  times_armed  times_triggered  total_callback_run_time
+ *
+ * where:
+ *
+ * name — timer name (if CONFIG_ESP_TIMER_PROFILING is defined), or timer pointer
+ * period — period of timer, in microseconds, or 0 for one-shot timer
+ * alarm - time of the next alarm, in microseconds since boot, or 0 if the timer
+ *         is not started
+ *
+ * The following fields are printed if CONFIG_ESP_TIMER_PROFILING is defined:
+ *
+ * times_armed — number of times the timer was armed via esp_timer_start_X
+ * times_triggered - number of times the callback was called
+ * total_callback_run_time - total time taken by callback to execute, across all calls
+ *
+ * @param stream stream (such as stdout) to dump the information to
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NO_MEM if can not allocate temporary buffer for the output
+ */
+esp_err_t esp_timer_dump(FILE* stream);
+
+#ifdef CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
+/**
+ * @brief Requests a context switch from a timer callback function.
+ *
+ * This only works for a timer that has an ISR dispatch method.
+ * The context switch will be called after all ISR dispatch timers have been processed.
+ */
+void esp_timer_isr_dispatch_need_yield(void);
+#endif // CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
+
+/**
+ * @brief Returns status of a timer, active or not
+ *
+ * This function is used to identify if the timer is still active or not.
+ *
+ * @param timer timer handle created using esp_timer_create
+ * @return
+ *      - 1 if timer is still active
+ *      - 0 if timer is not active.
+ */
+bool esp_timer_is_active(esp_timer_handle_t timer);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_websocket_client/include/esp_websocket_client.h b/tools/sdk/esp32s3/include/esp_websocket_client/include/esp_websocket_client.h
new file mode 100644
index 00000000000..0ed6353467c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_websocket_client/include/esp_websocket_client.h
@@ -0,0 +1,279 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_WEBSOCKET_CLIENT_H_
+#define _ESP_WEBSOCKET_CLIENT_H_
+
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+#include "freertos/FreeRTOS.h"
+#include "esp_err.h"
+#include "esp_event.h"
+#include <sys/socket.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_websocket_client *esp_websocket_client_handle_t;
+
+ESP_EVENT_DECLARE_BASE(WEBSOCKET_EVENTS);         // declaration of the task events family
+
+/**
+ * @brief Websocket Client events id
+ */
+typedef enum {
+    WEBSOCKET_EVENT_ANY = -1,
+    WEBSOCKET_EVENT_ERROR = 0,      /*!< This event occurs when there are any errors during execution */
+    WEBSOCKET_EVENT_CONNECTED,      /*!< Once the Websocket has been connected to the server, no data exchange has been performed */
+    WEBSOCKET_EVENT_DISCONNECTED,   /*!< The connection has been disconnected */
+    WEBSOCKET_EVENT_DATA,           /*!< When receiving data from the server, possibly multiple portions of the packet */
+    WEBSOCKET_EVENT_CLOSED,         /*!< The connection has been closed cleanly */
+    WEBSOCKET_EVENT_MAX
+} esp_websocket_event_id_t;
+
+/**
+ * @brief Websocket event data
+ */
+typedef struct {
+    const char *data_ptr;                   /*!< Data pointer */
+    int data_len;                           /*!< Data length */
+    uint8_t op_code;                        /*!< Received opcode */
+    esp_websocket_client_handle_t client;   /*!< esp_websocket_client_handle_t context */
+    void *user_context;                     /*!< user_data context, from esp_websocket_client_config_t user_data */
+    int payload_len;                        /*!< Total payload length, payloads exceeding buffer will be posted through multiple events */
+    int payload_offset;                     /*!< Actual offset for the data associated with this event */
+} esp_websocket_event_data_t;
+
+/**
+ * @brief Websocket Client transport
+ */
+typedef enum {
+    WEBSOCKET_TRANSPORT_UNKNOWN = 0x0,  /*!< Transport unknown */
+    WEBSOCKET_TRANSPORT_OVER_TCP,       /*!< Transport over tcp */
+    WEBSOCKET_TRANSPORT_OVER_SSL,       /*!< Transport over ssl */
+} esp_websocket_transport_t;
+
+/**
+ * @brief Websocket client setup configuration
+ */
+typedef struct {
+    const char                  *uri;                       /*!< Websocket URI, the information on the URI can be overrides the other fields below, if any */
+    const char                  *host;                      /*!< Domain or IP as string */
+    int                         port;                       /*!< Port to connect, default depend on esp_websocket_transport_t (80 or 443) */
+    const char                  *username;                  /*!< Using for Http authentication - Not supported for now */
+    const char                  *password;                  /*!< Using for Http authentication - Not supported for now */
+    const char                  *path;                      /*!< HTTP Path, if not set, default is `/` */
+    bool                        disable_auto_reconnect;     /*!< Disable the automatic reconnect function when disconnected */
+    void                        *user_context;              /*!< HTTP user data context */
+    int                         task_prio;                  /*!< Websocket task priority */
+    int                         task_stack;                 /*!< Websocket task stack */
+    int                         buffer_size;                /*!< Websocket buffer size */
+    const char                  *cert_pem;                  /*!< Pointer to certificate data in PEM or DER format for server verify (with SSL), default is NULL, not required to verify the server. PEM-format must have a terminating NULL-character. DER-format requires the length to be passed in cert_len. */
+    size_t                      cert_len;                   /*!< Length of the buffer pointed to by cert_pem. May be 0 for null-terminated pem */
+    const char                  *client_cert;               /*!< Pointer to certificate data in PEM or DER format for SSL mutual authentication, default is NULL, not required if mutual authentication is not needed. If it is not NULL, also `client_key` has to be provided. PEM-format must have a terminating NULL-character. DER-format requires the length to be passed in client_cert_len. */
+    size_t                      client_cert_len;            /*!< Length of the buffer pointed to by client_cert. May be 0 for null-terminated pem */
+    const char                  *client_key;                /*!< Pointer to private key data in PEM or DER format for SSL mutual authentication, default is NULL, not required if mutual authentication is not needed. If it is not NULL, also `client_cert` has to be provided. PEM-format must have a terminating NULL-character. DER-format requires the length to be passed in client_key_len */
+    size_t                      client_key_len;             /*!< Length of the buffer pointed to by client_key_pem. May be 0 for null-terminated pem */
+    esp_websocket_transport_t   transport;                  /*!< Websocket transport type, see `esp_websocket_transport_t */
+    const char                  *subprotocol;               /*!< Websocket subprotocol */
+    const char                  *user_agent;                /*!< Websocket user-agent */
+    const char                  *headers;                   /*!< Websocket additional headers */
+    int                         pingpong_timeout_sec;       /*!< Period before connection is aborted due to no PONGs received */
+    bool                        disable_pingpong_discon;    /*!< Disable auto-disconnect due to no PONG received within pingpong_timeout_sec */
+    bool                        use_global_ca_store;        /*!< Use a global ca_store for all the connections in which this bool is set. */
+    bool                        skip_cert_common_name_check;/*!< Skip any validation of server certificate CN field */
+    bool                        keep_alive_enable;          /*!< Enable keep-alive timeout */
+    int                         keep_alive_idle;            /*!< Keep-alive idle time. Default is 5 (second) */
+    int                         keep_alive_interval;        /*!< Keep-alive interval time. Default is 5 (second) */
+    int                         keep_alive_count;           /*!< Keep-alive packet retry send count. Default is 3 counts */
+    size_t                      ping_interval_sec;          /*!< Websocket ping interval, defaults to 10 seconds if not set */
+    struct ifreq                *if_name;                   /*!< The name of interface for data to go through. Use the default interface without setting */
+} esp_websocket_client_config_t;
+
+/**
+ * @brief      Start a Websocket session
+ *             This function must be the first function to call,
+ *             and it returns a esp_websocket_client_handle_t that you must use as input to other functions in the interface.
+ *             This call MUST have a corresponding call to esp_websocket_client_destroy when the operation is complete.
+ *
+ * @param[in]  config  The configuration
+ *
+ * @return
+ *     - `esp_websocket_client_handle_t`
+ *     - NULL if any errors
+ */
+esp_websocket_client_handle_t esp_websocket_client_init(const esp_websocket_client_config_t *config);
+
+/**
+ * @brief      Set URL for client, when performing this behavior, the options in the URL will replace the old ones
+ *             Must stop the WebSocket client before set URI if the client has been connected
+ *
+ * @param[in]  client  The client
+ * @param[in]  uri     The uri
+ *
+ * @return     esp_err_t
+ */
+esp_err_t esp_websocket_client_set_uri(esp_websocket_client_handle_t client, const char *uri);
+
+/**
+ * @brief      Open the WebSocket connection
+ *
+ * @param[in]  client  The client
+ *
+ * @return     esp_err_t
+ */
+esp_err_t esp_websocket_client_start(esp_websocket_client_handle_t client);
+
+/**
+ * @brief      Stops the WebSocket connection without websocket closing handshake
+ *
+ * This API stops ws client and closes TCP connection directly without sending
+ * close frames. It is a good practice to close the connection in a clean way
+ * using esp_websocket_client_close().
+ *
+ *  Notes:
+ *  - Cannot be called from the websocket event handler
+ *
+ * @param[in]  client  The client
+ *
+ * @return     esp_err_t
+ */
+esp_err_t esp_websocket_client_stop(esp_websocket_client_handle_t client);
+
+/**
+ * @brief      Destroy the WebSocket connection and free all resources.
+ *             This function must be the last function to call for an session.
+ *             It is the opposite of the esp_websocket_client_init function and must be called with the same handle as input that a esp_websocket_client_init call returned.
+ *             This might close all connections this handle has used.
+ *
+ *  Notes:
+ *  - Cannot be called from the websocket event handler
+ *
+ * @param[in]  client  The client
+ *
+ * @return     esp_err_t
+ */
+esp_err_t esp_websocket_client_destroy(esp_websocket_client_handle_t client);
+
+/**
+ * @brief      Generic write data to the WebSocket connection; defaults to binary send
+ *
+ * @param[in]  client  The client
+ * @param[in]  data    The data
+ * @param[in]  len     The length
+ * @param[in]  timeout Write data timeout in RTOS ticks
+ *
+ * @return
+ *     - Number of data was sent
+ *     - (-1) if any errors
+ */
+int esp_websocket_client_send(esp_websocket_client_handle_t client, const char *data, int len, TickType_t timeout);
+
+/**
+ * @brief      Write binary data to the WebSocket connection (data send with WS OPCODE=02, i.e. binary)
+ *
+ * @param[in]  client  The client
+ * @param[in]  data    The data
+ * @param[in]  len     The length
+ * @param[in]  timeout Write data timeout in RTOS ticks
+ *
+ * @return
+ *     - Number of data was sent
+ *     - (-1) if any errors
+ */
+int esp_websocket_client_send_bin(esp_websocket_client_handle_t client, const char *data, int len, TickType_t timeout);
+
+/**
+ * @brief      Write textual data to the WebSocket connection (data send with WS OPCODE=01, i.e. text)
+ *
+ * @param[in]  client  The client
+ * @param[in]  data    The data
+ * @param[in]  len     The length
+ * @param[in]  timeout Write data timeout in RTOS ticks
+ *
+ * @return
+ *     - Number of data was sent
+ *     - (-1) if any errors
+ */
+int esp_websocket_client_send_text(esp_websocket_client_handle_t client, const char *data, int len, TickType_t timeout);
+
+/**
+ * @brief      Close the WebSocket connection in a clean way
+ *
+ * Sequence of clean close initiated by client:
+ * * Client sends CLOSE frame
+ * * Client waits until server echos the CLOSE frame
+ * * Client waits until server closes the connection
+ * * Client is stopped the same way as by the `esp_websocket_client_stop()`
+ *
+ *  Notes:
+ *  - Cannot be called from the websocket event handler
+ *
+ * @param[in]  client  The client
+ * @param[in]  timeout Timeout in RTOS ticks for waiting
+ *
+ * @return     esp_err_t
+ */
+esp_err_t esp_websocket_client_close(esp_websocket_client_handle_t client, TickType_t timeout);
+
+/**
+ * @brief      Close the WebSocket connection in a clean way with custom code/data
+ *             Closing sequence is the same as for esp_websocket_client_close()
+ *
+ *  Notes:
+ *  - Cannot be called from the websocket event handler
+ *
+ * @param[in]  client  The client
+ * @param[in]  code    Close status code as defined in RFC6455 section-7.4
+ * @param[in]  data    Additional data to closing message
+ * @param[in]  len     The length of the additional data
+ * @param[in]  timeout Timeout in RTOS ticks for waiting
+ *
+ * @return     esp_err_t
+ */
+esp_err_t esp_websocket_client_close_with_code(esp_websocket_client_handle_t client, int code, const char *data, int len, TickType_t timeout);
+
+/**
+ * @brief      Check the WebSocket client connection state
+ *
+ * @param[in]  client  The client handle
+ *
+ * @return
+ *     - true
+ *     - false
+ */
+bool esp_websocket_client_is_connected(esp_websocket_client_handle_t client);
+
+/**
+ * @brief Register the Websocket Events
+ *
+ * @param client            The client handle
+ * @param event             The event id
+ * @param event_handler     The callback function
+ * @param event_handler_arg User context
+ * @return esp_err_t
+ */
+esp_err_t esp_websocket_register_events(esp_websocket_client_handle_t client,
+                                        esp_websocket_event_id_t event,
+                                        esp_event_handler_t event_handler,
+                                        void *event_handler_arg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_coexist.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_coexist.h
new file mode 100644
index 00000000000..14b7c9aa506
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_coexist.h
@@ -0,0 +1,134 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __ESP_COEXIST_H__
+#define __ESP_COEXIST_H__
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief coex prefer value
+ */
+typedef enum {
+    ESP_COEX_PREFER_WIFI = 0,       /*!< Prefer to WiFi, WiFi will have more opportunity to use RF */
+    ESP_COEX_PREFER_BT,             /*!< Prefer to bluetooth, bluetooth will have more opportunity to use RF */
+    ESP_COEX_PREFER_BALANCE,        /*!< Do balance of WiFi and bluetooth */
+    ESP_COEX_PREFER_NUM,            /*!< Prefer value numbers */
+} esp_coex_prefer_t;
+
+typedef enum {
+    EXTERN_COEX_WIRE_1 = 0,
+    EXTERN_COEX_WIRE_2,
+    EXTERN_COEX_WIRE_3,
+    EXTERN_COEX_WIRE_NUM,
+} external_coex_wire_t;
+
+/**
+ * @brief coex status type
+ */
+typedef enum {
+    ESP_COEX_ST_TYPE_WIFI = 0,
+    ESP_COEX_ST_TYPE_BLE,
+    ESP_COEX_ST_TYPE_BT,
+} esp_coex_status_type_t;
+
+/**
+ * @brief external coex gpio pti
+ */
+typedef struct {
+    int32_t in_pin0;
+    int32_t in_pin1;
+    int32_t out_pin0;
+} esp_external_coex_gpio_set_t;
+
+/**
+ * @brief external coex pti level
+ */
+typedef enum {
+    EXTERN_COEX_PTI_MID = 0,
+    EXTERN_COEX_PTI_HIGH,
+    EXTERN_COEX_PTI_NUM,
+} esp_coex_pti_level_t;
+
+/**
+ * @brief external coex pti
+ */
+typedef struct {
+    uint32_t in_pti1;
+    uint32_t in_pti2;
+    uint32_t in_pti3;
+    uint32_t out_pti1;
+    uint32_t out_pti2;
+    uint32_t out_pti3;
+} esp_external_coex_pti_set_t;
+
+#define ESP_COEX_BLE_ST_MESH_CONFIG        0x08
+#define ESP_COEX_BLE_ST_MESH_TRAFFIC       0x10
+#define ESP_COEX_BLE_ST_MESH_STANDBY       0x20
+
+#define ESP_COEX_BT_ST_A2DP_STREAMING      0x10
+#define ESP_COEX_BT_ST_A2DP_PAUSED         0x20
+
+/**
+ * @brief Get software coexist version string
+ *
+ * @return : version string
+ */
+const char *esp_coex_version_get(void);
+
+/**
+ * @deprecated Use esp_coex_status_bit_set() and esp_coex_status_bit_clear() instead.
+ *  Set coexist preference of performance
+ *  For example, if prefer to bluetooth, then it will make A2DP(play audio via classic bt)
+ *  more smooth while wifi is runnning something.
+ *  If prefer to wifi, it will do similar things as prefer to bluetooth.
+ *  Default, it prefer to balance.
+ *
+ *  @param prefer : the prefer enumeration value
+ *  @return : ESP_OK - success, other - failed
+ */
+esp_err_t esp_coex_preference_set(esp_coex_prefer_t prefer);
+
+/**
+ * @brief Set coex schm status
+ * @param type : WIFI/BLE/BT
+ * @param status : WIFI/BLE/BT STATUS
+ * @return : ESP_OK - success, other - failed
+ */
+esp_err_t esp_coex_status_bit_set(esp_coex_status_type_t type, uint32_t status);
+
+/**
+ * @brief Clear coex schm status
+ * @param type : WIFI/BLE/BT
+ * @param status : WIFI/BLE/BT STATUS
+ * @return : ESP_OK - success, other - failed
+ */
+esp_err_t esp_coex_status_bit_clear(esp_coex_status_type_t type, uint32_t status);
+
+#if CONFIG_EXTERNAL_COEX_ENABLE
+/**
+ * @brief Setup gpio pin and corresponding pti level, start external coex.
+ * @param wire_type : to select the whole external coex gpio number.
+ * @param gpio_pin : gpio pin number to choose.
+ * @return : ESP_OK - success, other - failed
+ */
+esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type,
+                    esp_external_coex_gpio_set_t gpio_pin);
+
+esp_err_t esp_disable_extern_coex_gpio_pin();
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __ESP_COEXIST_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_coexist_adapter.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_coexist_adapter.h
new file mode 100644
index 00000000000..eaac86d0ce1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_coexist_adapter.h
@@ -0,0 +1,63 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_COEXIST_ADAPTER_H__
+#define __ESP_COEXIST_ADAPTER_H__
+
+#include <stdarg.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define COEX_ADAPTER_VERSION  0x00000002
+#define COEX_ADAPTER_MAGIC    0xDEADBEAF
+
+#define COEX_ADAPTER_FUNCS_TIME_BLOCKING      0xffffffff
+
+typedef struct {
+    int32_t _version;
+#if CONFIG_IDF_TARGET_ESP32
+    void *(* _spin_lock_create)(void);
+    void (* _spin_lock_delete)(void *lock);
+    uint32_t (*_int_disable)(void *mux);
+    void (*_int_enable)(void *mux, uint32_t tmp);
+#endif
+    void (*_task_yield_from_isr)(void);
+    void *(*_semphr_create)(uint32_t max, uint32_t init);
+    void (*_semphr_delete)(void *semphr);
+    int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
+    int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
+    int32_t (*_semphr_take)(void *semphr, uint32_t block_time_tick);
+    int32_t (*_semphr_give)(void *semphr);
+    int (* _is_in_isr)(void);
+    void * (* _malloc_internal)(size_t size);
+    void (* _free)(void *p);
+#if CONFIG_IDF_TARGET_ESP32
+    void (* _timer_disarm)(void *timer);
+    void (* _timer_done)(void *ptimer);
+    void (* _timer_setfn)(void *ptimer, void *pfunction, void *parg);
+    void (* _timer_arm_us)(void *ptimer, uint32_t us, bool repeat);
+#endif
+    int64_t (* _esp_timer_get_time)(void);
+    int32_t _magic;
+} coex_adapter_funcs_t;
+
+extern coex_adapter_funcs_t g_coex_adapter_funcs;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_COEXIST_ADAPTER_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_coexist_internal.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_coexist_internal.h
new file mode 100644
index 00000000000..7ba06d4c690
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_coexist_internal.h
@@ -0,0 +1,244 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __ESP_COEXIST_INTERNAL_H__
+#define __ESP_COEXIST_INTERNAL_H__
+
+#include <stdbool.h>
+#include "esp_coexist.h"
+#include "esp_coexist_adapter.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    COEX_PREFER_WIFI = 0,
+    COEX_PREFER_BT,
+    COEX_PREFER_BALANCE,
+    COEX_PREFER_NUM,
+} coex_prefer_t;
+
+typedef void (* coex_func_cb_t)(uint32_t event, int sched_cnt);
+
+/**
+ * @brief Pre-Init software coexist
+ *        extern function for internal use.
+ *
+ * @return Init ok or failed.
+ */
+esp_err_t coex_pre_init(void);
+
+/**
+ * @brief Init software coexist
+ *        extern function for internal use.
+ *
+ * @return Init ok or failed.
+ */
+esp_err_t coex_init(void);
+
+/**
+ * @brief De-init software coexist
+ *        extern function for internal use.
+ */
+void coex_deinit(void);
+
+/**
+ * @brief Enable software coexist
+ *        extern function for internal use.
+ *
+ * @return Enable ok or failed.
+ */
+esp_err_t coex_enable(void);
+
+/**
+ * @brief Disable software coexist
+ *        extern function for internal use.
+ */
+void coex_disable(void);
+
+/**
+ * @brief Get software coexist version string
+ *        extern function for internal use.
+ * @return : version string
+ */
+const char *coex_version_get(void);
+
+/**
+ * @brief Coexist performance preference set from libbt.a
+ *        extern function for internal use.
+ *
+ *  @param prefer : the prefer enumeration value
+ *  @return : ESP_OK - success, other - failed
+ */
+esp_err_t coex_preference_set(coex_prefer_t prefer);
+
+/**
+ * @brief Get software coexist status.
+ * @return : software coexist status
+ */
+uint32_t coex_status_get(void);
+
+/**
+ * @brief Set software coexist condition.
+ * @return : software coexist condition
+ */
+void coex_condition_set(uint32_t type, bool dissatisfy);
+
+/**
+ * @brief WiFi requests coexistence.
+ *
+ *  @param event : WiFi event
+ *  @param latency : WiFi will request coexistence after latency
+ *  @param duration : duration for WiFi to request coexistence
+ *  @return : 0 - success, other - failed
+ */
+int coex_wifi_request(uint32_t event, uint32_t latency, uint32_t duration);
+
+/**
+ * @brief WiFi release coexistence.
+ *
+ *  @param event : WiFi event
+ *  @return : 0 - success, other - failed
+ */
+int coex_wifi_release(uint32_t event);
+
+/**
+ * @brief Set WiFi channel to coexistence module.
+ *
+ *  @param primary : WiFi primary channel
+ *  @param secondary : WiFi secondary channel
+ *  @return : 0 - success, other - failed
+ */
+int coex_wifi_channel_set(uint8_t primary, uint8_t secondary);
+
+/**
+ * @brief Get coexistence event duration.
+ *
+ *  @param event : Coexistence event
+ *  @param duration: Coexistence event duration
+ *  @return : 0 - success, other - failed
+ */
+int coex_event_duration_get(uint32_t event, uint32_t *duration);
+
+#if SOC_COEX_HW_PTI
+/**
+ * @brief Get coexistence event priority.
+ *
+ *  @param event : Coexistence event
+ *  @param pti: Coexistence event priority
+ *  @return : 0 - success, other - failed
+ */
+int coex_pti_get(uint32_t event, uint8_t *pti);
+#endif
+
+/**
+ * @brief Clear coexistence status.
+ *
+ *  @param type : Coexistence status type
+ *  @param status: Coexistence status
+ */
+void coex_schm_status_bit_clear(uint32_t type, uint32_t status);
+
+/**
+ * @brief Set coexistence status.
+ *
+ *  @param type : Coexistence status type
+ *  @param status: Coexistence status
+ */
+void coex_schm_status_bit_set(uint32_t type, uint32_t status);
+
+/**
+ * @brief Set coexistence scheme interval.
+ *
+ *  @param interval : Coexistence scheme interval
+ *  @return : 0 - success, other - failed
+ */
+int coex_schm_interval_set(uint32_t interval);
+
+/**
+ * @brief Get coexistence scheme interval.
+ *
+ *  @return : Coexistence scheme interval
+ */
+uint32_t coex_schm_interval_get(void);
+
+/**
+ * @brief Get current coexistence scheme period.
+ *
+ *  @return : Coexistence scheme period
+ */
+uint8_t coex_schm_curr_period_get(void);
+
+/**
+ * @brief Get current coexistence scheme phase.
+ *
+ *  @return : Coexistence scheme phase
+ */
+void * coex_schm_curr_phase_get(void);
+
+/**
+ * @brief Set current coexistence scheme phase index.
+ *
+ *  @param interval : Coexistence scheme phase index
+ *  @return : 0 - success, other - failed
+ */
+int coex_schm_curr_phase_idx_set(int idx);
+
+/**
+ * @brief Get current coexistence scheme phase index.
+ *
+ *  @return : Coexistence scheme phase index
+ */
+int coex_schm_curr_phase_idx_get(void);
+
+/**
+ * @brief Register coexistence adapter functions.
+ *
+ *  @param funcs : coexistence adapter functions
+ *  @return : ESP_OK - success, other - failed
+ */
+esp_err_t esp_coex_adapter_register(coex_adapter_funcs_t *funcs);
+
+#if CONFIG_EXTERNAL_COEX_ENABLE
+/**
+  * @brief     Set external coexistence pti level and enable it.
+  *
+  * @param     level1    external coex low pti
+  * @param     level2    external coex mid pti
+  * @param     level3    external coex high pti
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_coex_external_set(esp_coex_pti_level_t level1,
+         esp_coex_pti_level_t level2, esp_coex_pti_level_t level3);
+
+/**
+  * @brief     Disable external coexist
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+void esp_coex_external_stop(void);
+#endif    /*External Coex*/
+
+/**
+  * @brief     Check the MD5 values of the coexistence adapter header files in IDF and WiFi library
+  *
+  * @attention 1. It is used for internal CI version check
+  *
+  * @return
+  *     - ESP_OK : succeed
+  *     - ESP_WIFI_INVALID_ARG : MD5 check fail
+  */
+esp_err_t esp_coex_adapter_funcs_md5_check(const char *md5);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_COEXIST_INTERNAL_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_mesh.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_mesh.h
new file mode 100644
index 00000000000..f146b5e730e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_mesh.h
@@ -0,0 +1,1695 @@
+// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*
+ *   Software Stack demonstrated:
+ *  |------------------------------------------------------------------------------|
+ *  |            |                                                                 |
+ *  |            |                          Application                            |
+ *  |            |-----------------------------------------------------------------|
+ *  |            |               | Protocols: |      |      |               |      |
+ *  |            |   Mesh Stack  | HTTP, DNS, |      |      |     Other     |      |
+ *  |   RTOS:    | (Networking,  | DHCP, ...  |      |      |   Components  |      |
+ *  | (freeRTOS) | self-healing, |------------|      |      |               |      |
+ *  |            | flow control, |  Network Stack:   |      |               |      |
+ *  |            | ...)          |      (LwIP)       |      |               |      |
+ *  |            |-----------------------------------|      |---------------|      |
+ *  |            |                                                  |              |
+ *  |            |                       Wi-Fi Driver               |              |
+ *  |            |--------------------------------------------------|              |
+ *  |            |                                                                 |
+ *  |            |                       Platform HAL                              |
+ *  |------------------------------------------------------------------------------|
+ *
+ *   System Events delivery:
+ *
+ *  |---------------|
+ *  |               |                    default handler
+ *  |  Wi-Fi stack  |     events     |---------------------|
+ *  |               | -------------> |                     |
+ *  |---------------|                |                     |
+ *                                   |      event task     |
+ *  |---------------|     events     |                     |
+ *  |               | -------------> |                     |
+ *  |  LwIP stack   |                |---------------------|
+ *  |               |--------|
+ *  |---------------|        |
+ *                           |         mesh event callback handler
+ *                           |       |----------------------------|
+ *                           |-----> |                            |
+ *  |---------------|                |        application         |
+ *  |               |     events     |            task            |
+ *  |  mesh stack   | -------------> |                            |
+ *  |               |                |----------------------------|
+ *  |---------------|
+ *
+ *
+ *  Mesh Stack
+ *
+ *  Mesh event defines almost all system events applications tasks need.
+ *  Mesh event contains Wi-Fi connection states on station interface, children connection states on softAP interface and etc..
+ *  Applications need to register a mesh event callback handler by API esp_mesh_set_config() firstly.
+ *  This handler is to receive events posted from mesh stack and LwIP stack.
+ *  Applications could add relative handler for each event.
+ *  Examples:
+ *  (1) Applications could use Wi-Fi station connect states to decide when to send data to its parent, to the root or to external IP network;
+ *  (2) Applications could use Wi-Fi softAP states to decide when to send data to its children.
+ *
+ *  In present implementation, applications are able to access mesh stack directly without having to go through LwIP stack.
+ *  Applications use esp_mesh_send() and esp_mesh_recv() to send and receive messages over the mesh network.
+ *  In mesh stack design, normal devices don't require LwIP stack. But since IDF hasn't supported system without initializing LwIP stack yet,
+ *  applications still need to do LwIP initialization and two more things are required to be done
+ *  (1) stop DHCP server on softAP interface by default
+ *  (2) stop DHCP client on station interface by default.
+ *  Examples:
+ *  tcpip_adapter_init();
+ *  tcpip_adapter_dhcps_stop(TCPIP_ADAPTER_IF_AP)；
+ *  tcpip_adapter_dhcpc_stop(TCPIP_ADAPTER_IF_STA)；
+ *
+ *  Over the mesh network, only the root is able to access external IP network.
+ *  In application mesh event handler, once a device becomes a root, start DHCP client immediately whether DHCP is chosen.
+ */
+
+#ifndef __ESP_MESH_H__
+#define __ESP_MESH_H__
+
+#include "esp_err.h"
+#include "esp_wifi.h"
+#include "esp_wifi_types.h"
+#include "esp_mesh_internal.h"
+#include "lwip/ip_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*******************************************************
+ *                Constants
+ *******************************************************/
+#define MESH_ROOT_LAYER                   (1)       /**< root layer value */
+#define MESH_MTU                          (1500)    /**< max transmit unit(in bytes) */
+#define MESH_MPS                          (1472)    /**< max payload size(in bytes) */
+/**
+ * @brief Mesh error code definition
+ */
+#define ESP_ERR_MESH_WIFI_NOT_START       (ESP_ERR_MESH_BASE + 1)    /**< Wi-Fi isn't started */
+#define ESP_ERR_MESH_NOT_INIT             (ESP_ERR_MESH_BASE + 2)    /**< mesh isn't initialized */
+#define ESP_ERR_MESH_NOT_CONFIG           (ESP_ERR_MESH_BASE + 3)    /**< mesh isn't configured */
+#define ESP_ERR_MESH_NOT_START            (ESP_ERR_MESH_BASE + 4)    /**< mesh isn't started */
+#define ESP_ERR_MESH_NOT_SUPPORT          (ESP_ERR_MESH_BASE + 5)    /**< not supported yet */
+#define ESP_ERR_MESH_NOT_ALLOWED          (ESP_ERR_MESH_BASE + 6)    /**< operation is not allowed */
+#define ESP_ERR_MESH_NO_MEMORY            (ESP_ERR_MESH_BASE + 7)    /**< out of memory */
+#define ESP_ERR_MESH_ARGUMENT             (ESP_ERR_MESH_BASE + 8)    /**< illegal argument */
+#define ESP_ERR_MESH_EXCEED_MTU           (ESP_ERR_MESH_BASE + 9)    /**< packet size exceeds MTU */
+#define ESP_ERR_MESH_TIMEOUT              (ESP_ERR_MESH_BASE + 10)   /**< timeout */
+#define ESP_ERR_MESH_DISCONNECTED         (ESP_ERR_MESH_BASE + 11)   /**< disconnected with parent on station interface */
+#define ESP_ERR_MESH_QUEUE_FAIL           (ESP_ERR_MESH_BASE + 12)   /**< queue fail */
+#define ESP_ERR_MESH_QUEUE_FULL           (ESP_ERR_MESH_BASE + 13)   /**< queue full */
+#define ESP_ERR_MESH_NO_PARENT_FOUND      (ESP_ERR_MESH_BASE + 14)   /**< no parent found to join the mesh network */
+#define ESP_ERR_MESH_NO_ROUTE_FOUND       (ESP_ERR_MESH_BASE + 15)   /**< no route found to forward the packet */
+#define ESP_ERR_MESH_OPTION_NULL          (ESP_ERR_MESH_BASE + 16)   /**< no option found */
+#define ESP_ERR_MESH_OPTION_UNKNOWN       (ESP_ERR_MESH_BASE + 17)   /**< unknown option */
+#define ESP_ERR_MESH_XON_NO_WINDOW        (ESP_ERR_MESH_BASE + 18)   /**< no window for software flow control on upstream */
+#define ESP_ERR_MESH_INTERFACE            (ESP_ERR_MESH_BASE + 19)   /**< low-level Wi-Fi interface error */
+#define ESP_ERR_MESH_DISCARD_DUPLICATE    (ESP_ERR_MESH_BASE + 20)   /**< discard the packet due to the duplicate sequence number */
+#define ESP_ERR_MESH_DISCARD              (ESP_ERR_MESH_BASE + 21)   /**< discard the packet */
+#define ESP_ERR_MESH_VOTING               (ESP_ERR_MESH_BASE + 22)   /**< vote in progress */
+#define ESP_ERR_MESH_XMIT                 (ESP_ERR_MESH_BASE + 23)   /**< XMIT */
+#define ESP_ERR_MESH_QUEUE_READ           (ESP_ERR_MESH_BASE + 24)   /**< error in reading queue */
+#define ESP_ERR_MESH_PS                   (ESP_ERR_MESH_BASE + 25)   /**< mesh PS is not specified as enable or disable */
+#define ESP_ERR_MESH_RECV_RELEASE         (ESP_ERR_MESH_BASE + 26)   /**< release esp_mesh_recv_toDS */
+
+/**
+ * @brief Flags bitmap for esp_mesh_send() and esp_mesh_recv()
+ */
+#define MESH_DATA_ENC           (0x01)  /**< data encrypted (Unimplemented) */
+#define MESH_DATA_P2P           (0x02)  /**< point-to-point delivery over the mesh network */
+#define MESH_DATA_FROMDS        (0x04)  /**< receive from external IP network */
+#define MESH_DATA_TODS          (0x08)  /**< identify this packet is target to external IP network */
+#define MESH_DATA_NONBLOCK      (0x10)  /**< esp_mesh_send() non-block */
+#define MESH_DATA_DROP          (0x20)  /**< in the situation of the root having been changed, identify this packet can be dropped by new root */
+#define MESH_DATA_GROUP         (0x40)  /**< identify this packet is target to a group address */
+
+/**
+ * @brief Option definitions for esp_mesh_send() and esp_mesh_recv()
+ */
+#define MESH_OPT_SEND_GROUP     (7)     /**< data transmission by group; used with esp_mesh_send() and shall have payload */
+#define MESH_OPT_RECV_DS_ADDR   (8)     /**< return a remote IP address; used with esp_mesh_send() and esp_mesh_recv() */
+
+/**
+ * @brief Flag of mesh networking IE
+ */
+#define MESH_ASSOC_FLAG_VOTE_IN_PROGRESS    (0x02)     /**< vote in progress */
+#define MESH_ASSOC_FLAG_NETWORK_FREE        (0x08)     /**< no root in current network */
+#define MESH_ASSOC_FLAG_ROOTS_FOUND         (0x20)     /**< root conflict is found */
+#define MESH_ASSOC_FLAG_ROOT_FIXED          (0x40)     /**< fixed root */
+
+
+/**
+ * @brief Mesh PS (Power Save) duty cycle type
+ */
+#define MESH_PS_DEVICE_DUTY_REQUEST         (0x01)    /**< requests to join a network PS without specifying a device duty cycle. After the
+                                                           device joins the network, a network duty cycle will be provided by the network */
+#define MESH_PS_DEVICE_DUTY_DEMAND          (0x04)    /**< requests to join a network PS and specifies a demanded device duty cycle */
+#define MESH_PS_NETWORK_DUTY_MASTER         (0x80)    /**< indicates the device is the NWK-DUTY-MASTER (network duty cycle master) */
+
+/**
+ * @brief Mesh PS (Power Save) duty cycle applied rule
+ */
+#define MESH_PS_NETWORK_DUTY_APPLIED_ENTIRE         (0)    /** the specified network duty is applied to the entire network <*/
+#define MESH_PS_NETWORK_DUTY_APPLIED_UPLINK         (1)    /** the specified network duty is applied to only the up-link path <*/
+
+/*******************************************************
+ *                Enumerations
+ *******************************************************/
+/**
+ * @brief Enumerated list of mesh event id
+ */
+typedef enum {
+    MESH_EVENT_STARTED,                 /**< mesh is started */
+    MESH_EVENT_STOPPED,                 /**< mesh is stopped */
+    MESH_EVENT_CHANNEL_SWITCH,          /**< channel switch */
+    MESH_EVENT_CHILD_CONNECTED,         /**< a child is connected on softAP interface */
+    MESH_EVENT_CHILD_DISCONNECTED,      /**< a child is disconnected on softAP interface */
+    MESH_EVENT_ROUTING_TABLE_ADD,       /**< routing table is changed by adding newly joined children */
+    MESH_EVENT_ROUTING_TABLE_REMOVE,    /**< routing table is changed by removing leave children */
+    MESH_EVENT_PARENT_CONNECTED,        /**< parent is connected on station interface */
+    MESH_EVENT_PARENT_DISCONNECTED,     /**< parent is disconnected on station interface */
+    MESH_EVENT_NO_PARENT_FOUND,         /**< no parent found */
+    MESH_EVENT_LAYER_CHANGE,            /**< layer changes over the mesh network */
+    MESH_EVENT_TODS_STATE,              /**< state represents whether the root is able to access external IP network */
+    MESH_EVENT_VOTE_STARTED,            /**< the process of voting a new root is started either by children or by the root */
+    MESH_EVENT_VOTE_STOPPED,            /**< the process of voting a new root is stopped */
+    MESH_EVENT_ROOT_ADDRESS,            /**< the root address is obtained. It is posted by mesh stack automatically. */
+    MESH_EVENT_ROOT_SWITCH_REQ,         /**< root switch request sent from a new voted root candidate */
+    MESH_EVENT_ROOT_SWITCH_ACK,         /**< root switch acknowledgment responds the above request sent from current root */
+    MESH_EVENT_ROOT_ASKED_YIELD,        /**< the root is asked yield by a more powerful existing root. If self organized is disabled
+                                             and this device is specified to be a root by users, users should set a new parent
+                                             for this device. if self organized is enabled, this device will find a new parent
+                                             by itself, users could ignore this event. */
+    MESH_EVENT_ROOT_FIXED,              /**< when devices join a network, if the setting of Fixed Root for one device is different
+                                             from that of its parent, the device will update the setting the same as its parent's.
+                                             Fixed Root Setting of each device is variable as that setting changes of the root. */
+    MESH_EVENT_SCAN_DONE,               /**< if self-organized networking is disabled, user can call esp_wifi_scan_start() to trigger
+                                             this event, and add the corresponding scan done handler in this event. */
+    MESH_EVENT_NETWORK_STATE,           /**< network state, such as whether current mesh network has a root. */
+    MESH_EVENT_STOP_RECONNECTION,       /**< the root stops reconnecting to the router and non-root devices stop reconnecting to their parents. */
+    MESH_EVENT_FIND_NETWORK,            /**< when the channel field in mesh configuration is set to zero, mesh stack will perform a
+                                             full channel scan to find a mesh network that can join, and return the channel value
+                                             after finding it. */
+    MESH_EVENT_ROUTER_SWITCH,           /**< if users specify BSSID of the router in mesh configuration, when the root connects to another
+                                             router with the same SSID, this event will be posted and the new router information is attached. */
+    MESH_EVENT_PS_PARENT_DUTY,          /**< parent duty */
+    MESH_EVENT_PS_CHILD_DUTY,           /**< child duty */
+    MESH_EVENT_PS_DEVICE_DUTY,          /**< device duty */
+    MESH_EVENT_MAX,
+} mesh_event_id_t;
+
+/** @brief ESP-MESH event base declaration */
+ESP_EVENT_DECLARE_BASE(MESH_EVENT);
+
+/**
+ * @brief Device type
+ */
+typedef enum {
+    MESH_IDLE,    /**< hasn't joined the mesh network yet */
+    MESH_ROOT,    /**< the only sink of the mesh network. Has the ability to access external IP network */
+    MESH_NODE,    /**< intermediate device. Has the ability to forward packets over the mesh network */
+    MESH_LEAF,    /**< has no forwarding ability */
+    MESH_STA,     /**< connect to router with a standlone Wi-Fi station mode, no network expansion capability */
+} mesh_type_t;
+
+/**
+ * @brief Protocol of transmitted application data
+ */
+typedef enum {
+    MESH_PROTO_BIN,     /**< binary */
+    MESH_PROTO_HTTP,    /**< HTTP protocol */
+    MESH_PROTO_JSON,    /**< JSON format */
+    MESH_PROTO_MQTT,    /**< MQTT protocol */
+    MESH_PROTO_AP,      /**< IP network mesh communication of node's AP interface */
+    MESH_PROTO_STA,     /**< IP network mesh communication of node's STA interface */
+} mesh_proto_t;
+
+/**
+ * @brief For reliable transmission, mesh stack provides three type of services
+ */
+typedef enum {
+    MESH_TOS_P2P,    /**< provide P2P (point-to-point) retransmission on mesh stack by default */
+    MESH_TOS_E2E,    /**< provide E2E (end-to-end) retransmission on mesh stack (Unimplemented) */
+    MESH_TOS_DEF,    /**< no retransmission on mesh stack */
+} mesh_tos_t;
+
+/**
+ * @brief Vote reason
+ */
+typedef enum {
+    MESH_VOTE_REASON_ROOT_INITIATED = 1,    /**< vote is initiated by the root */
+    MESH_VOTE_REASON_CHILD_INITIATED,       /**< vote is initiated by children */
+} mesh_vote_reason_t;
+
+/**
+ * @brief Mesh disconnect reason code
+ */
+typedef enum {
+    MESH_REASON_CYCLIC = 100,               /**< cyclic is detected */
+    MESH_REASON_PARENT_IDLE,                /**< parent is idle */
+    MESH_REASON_LEAF,                       /**< the connected device is changed to a leaf */
+    MESH_REASON_DIFF_ID,                    /**< in different mesh ID */
+    MESH_REASON_ROOTS,                      /**< root conflict is detected */
+    MESH_REASON_PARENT_STOPPED,             /**< parent has stopped the mesh */
+    MESH_REASON_SCAN_FAIL,                  /**< scan fail */
+    MESH_REASON_IE_UNKNOWN,                 /**< unknown IE */
+    MESH_REASON_WAIVE_ROOT,                 /**< waive root */
+    MESH_REASON_PARENT_WORSE,               /**< parent with very poor RSSI */
+    MESH_REASON_EMPTY_PASSWORD,             /**< use an empty password to connect to an encrypted parent */
+    MESH_REASON_PARENT_UNENCRYPTED,         /**< connect to an unencrypted parent/router */
+} mesh_disconnect_reason_t;
+
+/**
+ * @brief Mesh topology
+ */
+typedef enum {
+    MESH_TOPO_TREE,                         /**< tree topology */
+    MESH_TOPO_CHAIN,                        /**< chain topology */
+} esp_mesh_topology_t;
+
+/*******************************************************
+ *                Structures
+ *******************************************************/
+/**
+ * @brief IP address and port
+ */
+typedef struct {
+    ip4_addr_t ip4;    /**< IP address */
+    uint16_t port;     /**< port */
+} __attribute__((packed)) mip_t;
+
+/**
+ * @brief Mesh address
+ */
+typedef union {
+    uint8_t addr[6];    /**< mac address */
+    mip_t mip;          /**< mip address */
+} mesh_addr_t;
+
+/**
+ * @brief Channel switch information
+ */
+typedef struct {
+    uint8_t channel;    /**< new channel */
+} mesh_event_channel_switch_t;
+
+/**
+ * @brief Parent connected information
+ */
+typedef struct {
+    wifi_event_sta_connected_t connected; /**< parent information, same as Wi-Fi event SYSTEM_EVENT_STA_CONNECTED does */
+    uint16_t self_layer;                  /**< layer */
+    uint8_t duty;                         /**< parent duty */
+} mesh_event_connected_t;
+
+/**
+ * @brief No parent found information
+ */
+typedef struct {
+    int scan_times;    /**< scan times being through */
+} mesh_event_no_parent_found_t;
+
+/**
+ * @brief Layer change information
+ */
+typedef struct {
+    uint16_t new_layer; /**< new layer */
+} mesh_event_layer_change_t;
+
+/**
+ * @brief The reachability of the root to a DS (distribute system)
+ */
+typedef enum {
+    MESH_TODS_UNREACHABLE,    /**< the root isn't able to access external IP network */
+    MESH_TODS_REACHABLE,      /**< the root is able to access external IP network */
+} mesh_event_toDS_state_t;
+
+/**
+ * @brief vote started information
+ */
+typedef struct {
+    int reason;             /**< vote reason, vote could be initiated by children or by the root itself */
+    int attempts;           /**< max vote attempts before stopped */
+    mesh_addr_t rc_addr;    /**< root address specified by users via API esp_mesh_waive_root() */
+} mesh_event_vote_started_t;
+
+/**
+ * @brief find a mesh network that this device can join
+ */
+typedef struct {
+    uint8_t channel;            /**< channel number of the new found network */
+    uint8_t router_bssid[6];    /**< router BSSID */
+} mesh_event_find_network_t;
+
+/**
+ * @brief Root address
+ */
+typedef mesh_addr_t mesh_event_root_address_t;
+
+/**
+ * @brief Parent disconnected information
+ */
+typedef wifi_event_sta_disconnected_t mesh_event_disconnected_t;
+
+/**
+ * @brief Child connected information
+ */
+typedef wifi_event_ap_staconnected_t mesh_event_child_connected_t;
+
+/**
+ * @brief Child disconnected information
+ */
+typedef wifi_event_ap_stadisconnected_t mesh_event_child_disconnected_t;
+
+/**
+ * @brief Root switch request information
+ */
+typedef struct {
+    int reason;             /**< root switch reason, generally root switch is initialized by users via API esp_mesh_waive_root() */
+    mesh_addr_t rc_addr;    /**< the address of root switch requester */
+} mesh_event_root_switch_req_t;
+
+/**
+ * @brief Other powerful root address
+ */
+typedef struct {
+    int8_t rssi;           /**< rssi with router */
+    uint16_t capacity;     /**< the number of devices in current network */
+    uint8_t addr[6];       /**< other powerful root address */
+} mesh_event_root_conflict_t;
+
+/**
+ * @brief Routing table change
+ */
+typedef struct {
+    uint16_t rt_size_new;      /**< the new value */
+    uint16_t rt_size_change;   /**< the changed value */
+} mesh_event_routing_table_change_t;
+
+/**
+ * @brief Root fixed
+ */
+typedef struct {
+    bool is_fixed;     /**< status */
+} mesh_event_root_fixed_t;
+
+/**
+ * @brief Scan done　event information
+ */
+typedef struct {
+    uint8_t  number;     /**< the number of APs scanned */
+} mesh_event_scan_done_t;
+
+/**
+ * @brief Network state information
+ */
+typedef struct {
+    bool is_rootless;     /**< whether current mesh network has a root */
+} mesh_event_network_state_t;
+
+/**
+ * @brief New router information
+ */
+typedef wifi_event_sta_connected_t mesh_event_router_switch_t;
+
+/**
+ * @brief PS duty information
+ */
+typedef struct {
+    uint8_t duty;                                 /**< parent or child duty */
+    mesh_event_child_connected_t child_connected; /**< child info */
+} mesh_event_ps_duty_t;
+
+/**
+ * @brief Mesh event information
+ */
+typedef union {
+    mesh_event_channel_switch_t channel_switch;            /**< channel switch */
+    mesh_event_child_connected_t child_connected;          /**< child connected */
+    mesh_event_child_disconnected_t child_disconnected;    /**< child disconnected */
+    mesh_event_routing_table_change_t routing_table;       /**< routing table change */
+    mesh_event_connected_t connected;                      /**< parent connected */
+    mesh_event_disconnected_t disconnected;                /**< parent disconnected */
+    mesh_event_no_parent_found_t no_parent;                /**< no parent found */
+    mesh_event_layer_change_t layer_change;                /**< layer change */
+    mesh_event_toDS_state_t toDS_state;                    /**< toDS state, devices shall check this state firstly before trying to send packets to
+                                                                external IP network. This state indicates right now whether the root is capable of sending
+                                                                packets out. If not, devices had better to wait until this state changes to be
+                                                                MESH_TODS_REACHABLE. */
+    mesh_event_vote_started_t vote_started;                /**< vote started */
+    mesh_event_root_address_t root_addr;                   /**< root address */
+    mesh_event_root_switch_req_t switch_req;               /**< root switch request */
+    mesh_event_root_conflict_t root_conflict;              /**< other powerful root */
+    mesh_event_root_fixed_t root_fixed;                    /**< fixed root */
+    mesh_event_scan_done_t scan_done;                      /**< scan done */
+    mesh_event_network_state_t network_state;              /**< network state, such as whether current mesh network has a root. */
+    mesh_event_find_network_t find_network;                /**< network found that can join */
+    mesh_event_router_switch_t router_switch;              /**< new router information */
+    mesh_event_ps_duty_t ps_duty;                          /**< PS duty information */
+} mesh_event_info_t;
+
+/**
+ * @brief Mesh option
+ */
+typedef struct {
+    uint8_t type;    /**< option type */
+    uint16_t len;    /**< option length */
+    uint8_t *val;    /**< option value */
+} __attribute__((packed)) mesh_opt_t;
+
+/**
+ * @brief Mesh data for esp_mesh_send() and esp_mesh_recv()
+ */
+typedef struct {
+    uint8_t *data;         /**< data */
+    uint16_t size;         /**< data size */
+    mesh_proto_t proto;    /**< data protocol */
+    mesh_tos_t tos;        /**< data type of service */
+} mesh_data_t;
+
+/**
+ * @brief Router configuration
+ */
+typedef struct {
+    uint8_t ssid[32];             /**< SSID */
+    uint8_t ssid_len;             /**< length of SSID */
+    uint8_t bssid[6];             /**< BSSID, if this value is specified, users should also specify "allow_router_switch". */
+    uint8_t password[64];         /**< password */
+    bool allow_router_switch;     /**< if the BSSID is specified and this value is also set, when the router of this specified BSSID
+                                       fails to be found after "fail" (mesh_attempts_t) times, the whole network is allowed to switch
+                                       to another router with the same SSID. The new router might also be on a different channel.
+                                       The default value is false.
+                                       There is a risk that if the password is different between the new switched router and the previous
+                                       one, the mesh network could be established but the root will never connect to the new switched router. */
+} mesh_router_t;
+
+/**
+ * @brief Mesh softAP configuration
+ */
+typedef struct {
+    uint8_t password[64];              /**< mesh softAP password */
+    /**
+     * max number of stations allowed to connect in, default 6, max 10
+     * = max_connection + nonmesh_max_connection
+     */
+    uint8_t max_connection;            /**< max mesh connections */
+    uint8_t nonmesh_max_connection;    /**< max non-mesh connections */
+} mesh_ap_cfg_t;
+
+/**
+ * @brief Mesh initialization configuration
+ */
+typedef struct {
+    uint8_t channel;                            /**< channel, the mesh network on */
+    bool allow_channel_switch;                  /**< if this value is set, when "fail" (mesh_attempts_t) times is reached, device will change to
+                                                     a full channel scan for a network that could join. The default value is false. */
+    mesh_addr_t mesh_id;                        /**< mesh network identification */
+    mesh_router_t router;                       /**< router configuration */
+    mesh_ap_cfg_t mesh_ap;                      /**< mesh softAP configuration */
+    const mesh_crypto_funcs_t *crypto_funcs;    /**< crypto functions */
+} mesh_cfg_t;
+
+/**
+ * @brief Vote address configuration
+ */
+typedef union {
+    int attempts;           /**< max vote attempts before a new root is elected automatically by mesh network. (min:15, 15 by default) */
+    mesh_addr_t rc_addr;    /**< a new root address specified by users for API esp_mesh_waive_root() */
+} mesh_rc_config_t;
+
+/**
+ * @brief Vote
+ */
+typedef struct {
+    float percentage;           /**< vote percentage threshold for approval of being a root */
+    bool is_rc_specified;       /**< if true, rc_addr shall be specified (Unimplemented).
+                                     if false, attempts value shall be specified to make network start root election. */
+    mesh_rc_config_t config;    /**< vote address configuration */
+} mesh_vote_t;
+
+/**
+ * @brief The number of packets pending in the queue waiting to be sent by the mesh stack
+ */
+typedef struct {
+    int to_parent;        /**< to parent queue */
+    int to_parent_p2p;    /**< to parent (P2P) queue */
+    int to_child;         /**< to child queue */
+    int to_child_p2p;     /**< to child (P2P) queue */
+    int mgmt;             /**< management queue */
+    int broadcast;        /**< broadcast and multicast queue */
+} mesh_tx_pending_t;
+
+/**
+ * @brief The number of packets available in the queue waiting to be received by applications
+ */
+typedef struct {
+    int toDS;      /**< to external DS */
+    int toSelf;    /**< to self */
+} mesh_rx_pending_t;
+
+/*******************************************************
+ *                Variable Declaration
+ *******************************************************/
+/* mesh IE crypto callback function */
+extern const mesh_crypto_funcs_t g_wifi_default_mesh_crypto_funcs;
+
+#define MESH_INIT_CONFIG_DEFAULT() { \
+    .crypto_funcs = &g_wifi_default_mesh_crypto_funcs, \
+}
+
+/*******************************************************
+ *                Function Definitions
+ *******************************************************/
+/**
+ * @brief      Mesh initialization
+ *             - Check whether Wi-Fi is started.
+ *             - Initialize mesh global variables with default values.
+ *
+ * @attention  This API shall be called after Wi-Fi is started.
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_init(void);
+
+/**
+ * @brief      Mesh de-initialization
+ *
+ *             - Release resources and stop the mesh
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_deinit(void);
+
+/**
+ * @brief      Start mesh
+ *             - Initialize mesh IE.
+ *             - Start mesh network management service.
+ *             - Create TX and RX queues according to the configuration.
+ *             - Register mesh packets receive callback.
+ *
+ * @attention　　This API shall be called after mesh initialization and configuration.
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ *    - ESP_ERR_MESH_NOT_INIT
+ *    - ESP_ERR_MESH_NOT_CONFIG
+ *    - ESP_ERR_MESH_NO_MEMORY
+ */
+esp_err_t esp_mesh_start(void);
+
+/**
+ * @brief      Stop mesh
+ *             - Deinitialize mesh IE.
+ *             - Disconnect with current parent.
+ *             - Disassociate all currently associated children.
+ *             - Stop mesh network management service.
+ *             - Unregister mesh packets receive callback.
+ *             - Delete TX and RX queues.
+ *             - Release resources.
+ *             - Restore Wi-Fi softAP to default settings if Wi-Fi dual mode is enabled.
+ *             - Set Wi-Fi Power Save type to WIFI_PS_NONE.
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_stop(void);
+
+/**
+ * @brief      Send a packet over the mesh network
+ *             - Send a packet to any device in the mesh network.
+ *             - Send a packet to external IP network.
+ *
+ * @attention  This API is not reentrant.
+ *
+ * @param[in]  to  the address of the final destination of the packet
+ *             - If the packet is to the root, set this parameter to NULL.
+ *             - If the packet is to an external IP network, set this parameter to the IPv4:PORT combination.
+ *               This packet will be delivered to the root firstly, then the root will forward this packet to the final IP server address.
+ * @param[in]  data  pointer to a sending mesh packet
+ *             - Field size should not exceed MESH_MPS. Note that the size of one mesh packet should not exceed MESH_MTU.
+ *             - Field proto should be set to data protocol in use (default is MESH_PROTO_BIN for binary).
+ *             - Field tos should be set to transmission tos (type of service) in use (default is MESH_TOS_P2P for point-to-point reliable).
+ * @param[in]  flag  bitmap for data sent
+ *             -  Speed up the route search
+ *               - If the packet is to the root and "to" parameter is NULL, set this parameter to 0.
+ *               - If the packet is to an internal device, MESH_DATA_P2P should be set.
+ *               - If the packet is to the root ("to" parameter isn't NULL) or to external IP network, MESH_DATA_TODS should be set.
+ *               - If the packet is from the root to an internal device, MESH_DATA_FROMDS should be set.
+ *             - Specify whether this API is block or non-block, block by default
+ *               - If needs non-blocking, MESH_DATA_NONBLOCK should be set. Otherwise, may use esp_mesh_send_block_time() to specify a blocking time.
+ *             - In the situation of the root change, MESH_DATA_DROP identifies this packet can be dropped by the new root
+ *               for upstream data to external IP network, we try our best to avoid data loss caused by the root change, but
+ *               there is a risk that the new root is running out of memory because most of memory is occupied by the pending data which
+ *               isn't read out in time by esp_mesh_recv_toDS().
+ *
+ *               Generally, we suggest esp_mesh_recv_toDS() is called after a connection with IP network is created. Thus data outgoing
+ *               to external IP network via socket is just from reading esp_mesh_recv_toDS() which avoids unnecessary memory copy.
+ *
+ * @param[in]  opt  options
+ *             - In case of sending a packet to a certain group, MESH_OPT_SEND_GROUP is a good choice.
+ *               In this option, the value field should be set to the target receiver addresses in this group.
+ *             - Root sends a packet to an internal device, this packet is from external IP network in case the receiver device responds
+ *             this packet, MESH_OPT_RECV_DS_ADDR is required to attach the target DS address.
+ * @param[in]  opt_count  option count
+ *             - Currently, this API only takes one option, so opt_count is only supported to be 1.
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ *    - ESP_ERR_MESH_ARGUMENT
+ *    - ESP_ERR_MESH_NOT_START
+ *    - ESP_ERR_MESH_DISCONNECTED
+ *    - ESP_ERR_MESH_OPT_UNKNOWN
+ *    - ESP_ERR_MESH_EXCEED_MTU
+ *    - ESP_ERR_MESH_NO_MEMORY
+ *    - ESP_ERR_MESH_TIMEOUT
+ *    - ESP_ERR_MESH_QUEUE_FULL
+ *    - ESP_ERR_MESH_NO_ROUTE_FOUND
+ *    - ESP_ERR_MESH_DISCARD
+ */
+esp_err_t esp_mesh_send(const mesh_addr_t *to, const mesh_data_t *data,
+                        int flag, const mesh_opt_t opt[],  int opt_count);
+/**
+ * @brief      Set blocking time of esp_mesh_send()
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  time_ms  blocking time of esp_mesh_send(), unit:ms
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_send_block_time(uint32_t time_ms);
+
+/**
+ * @brief      Receive a packet targeted to self over the mesh network
+ *
+ * @attention  Mesh RX queue should be checked regularly to avoid running out of memory.
+ *             - Use esp_mesh_get_rx_pending() to check the number of packets available in the queue waiting
+ *             to be received by applications.
+ *
+ * @param[out] from  the address of the original source of the packet
+ * @param[out] data  pointer to the received mesh packet
+ *             - Field proto is the data protocol in use. Should follow it to parse the received data.
+ *             - Field tos is the transmission tos (type of service) in use.
+ * @param[in]  timeout_ms  wait time if a packet isn't immediately available (0:no wait, portMAX_DELAY:wait forever)
+ * @param[out] flag  bitmap for data received
+ *             - MESH_DATA_FROMDS represents data from external IP network
+ *             - MESH_DATA_TODS represents data directed upward within the mesh network
+ *
+ *             flag could be MESH_DATA_FROMDS or MESH_DATA_TODS.
+ * @param[out] opt  options desired to receive
+ *             - MESH_OPT_RECV_DS_ADDR attaches the DS address
+ * @param[in]  opt_count  option count desired to receive
+ *             - Currently, this API only takes one option, so opt_count is only supported to be 1.
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ *    - ESP_ERR_MESH_NOT_START
+ *    - ESP_ERR_MESH_TIMEOUT
+ *    - ESP_ERR_MESH_DISCARD
+ */
+esp_err_t esp_mesh_recv(mesh_addr_t *from, mesh_data_t *data, int timeout_ms,
+                        int *flag, mesh_opt_t opt[], int opt_count);
+
+/**
+ * @brief      Receive a packet targeted to external IP network
+ *             - Root uses this API to receive packets destined to external IP network
+ *             - Root forwards the received packets to the final destination via socket.
+ *             - If no socket connection is ready to send out the received packets and this esp_mesh_recv_toDS()
+ *             hasn't been called by applications, packets from the whole mesh network will be pending in toDS queue.
+ *
+ *             Use esp_mesh_get_rx_pending() to check the number of packets available in the queue waiting
+ *             to be received by applications in case of running out of memory in the root.
+ *
+ *             Using esp_mesh_set_xon_qsize() users may configure the RX queue size, default:32. If this size is too large,
+ *             and esp_mesh_recv_toDS() isn't called in time, there is a risk that a great deal of memory is occupied
+ *             by the pending packets. If this size is too small, it will impact the efficiency on upstream. How to
+ *             decide this value depends on the specific application scenarios.
+ *
+ * @attention  This API is only called by the root.
+ *
+ * @param[out] from  the address of the original source of the packet
+ * @param[out] to  the address contains remote IP address and port (IPv4:PORT)
+ * @param[out] data  pointer to the received packet
+ *             - Contain the protocol and applications should follow it to parse the data.
+ * @param[in]  timeout_ms  wait time if a packet isn't immediately available (0:no wait, portMAX_DELAY:wait forever)
+ * @param[out] flag  bitmap for data received
+ *             - MESH_DATA_TODS represents the received data target to external IP network. Root shall forward this data to external IP network via the association with router.
+ *
+ *             flag could be MESH_DATA_TODS.
+ * @param[out] opt  options desired to receive
+ * @param[in]  opt_count  option count desired to receive
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ *    - ESP_ERR_MESH_NOT_START
+ *    - ESP_ERR_MESH_TIMEOUT
+ *    - ESP_ERR_MESH_DISCARD
+ *    - ESP_ERR_MESH_RECV_RELEASE
+ */
+esp_err_t esp_mesh_recv_toDS(mesh_addr_t *from, mesh_addr_t *to,
+                             mesh_data_t *data, int timeout_ms, int *flag, mesh_opt_t opt[],
+                             int opt_count);
+
+/**
+ * @brief      Set mesh stack configuration
+ *             - Use MESH_INIT_CONFIG_DEFAULT() to initialize the default values, mesh IE is encrypted by default.
+ *             - Mesh network is established on a fixed channel (1-14).
+ *             - Mesh event callback is mandatory.
+ *             - Mesh ID is an identifier of an MBSS. Nodes with the same mesh ID can communicate with each other.
+ *             - Regarding to the router configuration, if the router is hidden, BSSID field is mandatory.
+ *
+ *             If BSSID field isn't set and there exists more than one router with same SSID, there is a risk that more
+ *             roots than one connected with different BSSID will appear. It means more than one mesh network is established
+ *             with the same mesh ID.
+ *
+ *             Root conflict function could eliminate redundant roots connected with the same BSSID, but couldn't handle roots
+ *             connected with different BSSID. Because users might have such requirements of setting up routers with same SSID
+ *             for the future replacement. But in that case, if the above situations happen, please make sure applications
+ *             implement forward functions on the root to guarantee devices in different mesh networks can communicate with each other.
+ *             max_connection of mesh softAP is limited by the max number of Wi-Fi softAP supported (max:10).
+ *
+ * @attention  This API shall be called before mesh is started after mesh is initialized.
+ *
+ * @param[in]  config  pointer to mesh stack configuration
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ *    - ESP_ERR_MESH_NOT_ALLOWED
+ */
+esp_err_t esp_mesh_set_config(const mesh_cfg_t *config);
+
+/**
+ * @brief      Get mesh stack configuration
+ *
+ * @param[out] config  pointer to mesh stack configuration
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_get_config(mesh_cfg_t *config);
+
+/**
+ * @brief      Get router configuration
+ *
+ * @attention  This API is used to dynamically modify the router configuration after mesh is configured.
+ *
+ * @param[in]  router  pointer to router configuration
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_set_router(const mesh_router_t *router);
+
+/**
+ * @brief      Get router configuration
+ *
+ * @param[out] router  pointer to router configuration
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_get_router(mesh_router_t *router);
+
+/**
+ * @brief      Set mesh network ID
+ *
+ * @attention  This API is used to dynamically modify the mesh network ID.
+ *
+ * @param[in]  id  pointer to mesh network ID
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT: invalid argument
+ */
+esp_err_t esp_mesh_set_id(const mesh_addr_t *id);
+
+/**
+ * @brief      Get mesh network ID
+ *
+ * @param[out] id  pointer to mesh network ID
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_get_id(mesh_addr_t *id);
+
+/**
+ * @brief      Designate device type over the mesh network
+ *            - MESH_IDLE: designates a device as a self-organized node for a mesh network
+ *            - MESH_ROOT: designates the root node for a mesh network
+ *            - MESH_LEAF: designates a device as a standalone Wi-Fi station that connects to a parent
+ *            - MESH_STA: designates a device as a standalone Wi-Fi station that connects to a router
+ *
+ * @param[in]  type  device type
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_NOT_ALLOWED
+ */
+esp_err_t esp_mesh_set_type(mesh_type_t type);
+
+/**
+ * @brief      Get device type over mesh network
+ *
+ * @attention  This API shall be called after having received the event MESH_EVENT_PARENT_CONNECTED.
+ *
+ * @return     mesh type
+ *
+ */
+mesh_type_t esp_mesh_get_type(void);
+
+/**
+ * @brief      Set network max layer value
+ *             - for tree topology, the max is 25.
+ *             - for chain topology, the max is 1000.
+ *             - Network max layer limits the max hop count.
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  max_layer  max layer value
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ *    - ESP_ERR_MESH_NOT_ALLOWED
+ */
+esp_err_t esp_mesh_set_max_layer(int max_layer);
+
+/**
+ * @brief      Get max layer value
+ *
+ * @return     max layer value
+ */
+int esp_mesh_get_max_layer(void);
+
+/**
+ * @brief      Set mesh softAP password
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  pwd  pointer to the password
+ * @param[in]  len  password length
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ *    - ESP_ERR_MESH_NOT_ALLOWED
+ */
+esp_err_t esp_mesh_set_ap_password(const uint8_t *pwd, int len);
+
+/**
+ * @brief      Set mesh softAP authentication mode
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  authmode  authentication mode
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ *    - ESP_ERR_MESH_NOT_ALLOWED
+ */
+esp_err_t esp_mesh_set_ap_authmode(wifi_auth_mode_t authmode);
+
+/**
+ * @brief      Get mesh softAP authentication mode
+ *
+ * @return     authentication mode
+ */
+wifi_auth_mode_t esp_mesh_get_ap_authmode(void);
+
+/**
+ * @brief      Set mesh max connection value
+ *             - Set mesh softAP max connection = mesh max connection + non-mesh max connection
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  connections  the number of max connections
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_set_ap_connections(int connections);
+
+/**
+ * @brief      Get mesh max connection configuration
+ *
+ * @return     the number of mesh max connections
+ */
+int esp_mesh_get_ap_connections(void);
+
+/**
+ * @brief      Get non-mesh max connection configuration
+ *
+ * @return     the number of non-mesh max connections
+ */
+int esp_mesh_get_non_mesh_connections(void);
+
+/**
+ * @brief      Get current layer value over the mesh network
+ *
+ * @attention  This API shall be called after having received the event MESH_EVENT_PARENT_CONNECTED.
+ *
+ * @return     layer value
+ *
+ */
+int esp_mesh_get_layer(void);
+
+/**
+ * @brief      Get the parent BSSID
+ *
+ * @attention  This API shall be called after having received the event MESH_EVENT_PARENT_CONNECTED.
+ *
+ * @param[out] bssid  pointer to parent BSSID
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_get_parent_bssid(mesh_addr_t *bssid);
+
+/**
+ * @brief      Return whether the device is the root node of the network
+ *
+ * @return     true/false
+ */
+bool esp_mesh_is_root(void);
+
+/**
+ * @brief      Enable/disable self-organized networking
+ *             - Self-organized networking has three main functions:
+ *             select the root node;
+ *             find a preferred parent;
+ *             initiate reconnection if a disconnection is detected.
+ *             - Self-organized networking is enabled by default.
+ *             - If self-organized is disabled, users should set a parent for the device via esp_mesh_set_parent().
+ *
+ * @attention  This API is used to dynamically modify whether to enable the self organizing.
+ *
+ * @param[in]  enable  enable or disable self-organized networking
+ * @param[in]  select_parent  Only valid when self-organized networking is enabled.
+ *             - if select_parent is set to true, the root will give up its mesh root status and search for a new parent
+ *             like other non-root devices.
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_set_self_organized(bool enable, bool select_parent);
+
+/**
+ * @brief      Return whether enable self-organized networking or not
+ *
+ * @return     true/false
+ */
+bool esp_mesh_get_self_organized(void);
+
+/**
+ * @brief      Cause the root device to give up (waive) its mesh root status
+ *             - A device is elected root primarily based on RSSI from the external router.
+ *             - If external router conditions change, users can call this API to perform a root switch.
+ *             - In this API, users could specify a desired root address to replace itself or specify an attempts value
+ *             to ask current root to initiate a new round of voting. During the voting, a better root candidate would
+ *             be expected to find to replace the current one.
+ *             - If no desired root candidate, the vote will try a specified number of attempts (at least 15). If no better
+ *             root candidate is found, keep the current one. If a better candidate is found, the new better one will
+ *             send a root switch request to the current root, current root will respond with a root switch acknowledgment.
+ *             - After that, the new candidate will connect to the router to be a new root, the previous root will disconnect
+ *             with the router and choose another parent instead.
+ *
+ *             Root switch is completed with minimal disruption to the whole mesh network.
+ *
+ * @attention  This API is only called by the root.
+ *
+ * @param[in]  vote  vote configuration
+ *             - If this parameter is set NULL, the vote will perform the default 15 times.
+ *
+ *             - Field percentage threshold is 0.9 by default.
+ *             - Field is_rc_specified shall be false.
+ *             - Field attempts shall be at least 15 times.
+ * @param[in]  reason  only accept MESH_VOTE_REASON_ROOT_INITIATED for now
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_QUEUE_FULL
+ *    - ESP_ERR_MESH_DISCARD
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_waive_root(const mesh_vote_t *vote, int reason);
+
+/**
+ * @brief      Set vote percentage threshold for approval of being a root (default:0.9)
+ *             - During the networking, only obtaining vote percentage reaches this threshold,
+ *             the device could be a root.
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  percentage  vote percentage threshold
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_set_vote_percentage(float percentage);
+
+/**
+ * @brief      Get vote percentage threshold for approval of being a root
+ *
+ * @return     percentage threshold
+ */
+float esp_mesh_get_vote_percentage(void);
+
+/**
+ * @brief      Set mesh softAP associate expired time (default:10 seconds)
+ *             - If mesh softAP hasn't received any data from an associated child within this time,
+ *             mesh softAP will take this child inactive and disassociate it.
+ *             - If mesh softAP is encrypted, this value should be set a greater value, such as 30 seconds.
+ *
+ * @param[in]  seconds  the expired time
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_set_ap_assoc_expire(int seconds);
+
+/**
+ * @brief      Get mesh softAP associate expired time
+ *
+ * @return     seconds
+ */
+int esp_mesh_get_ap_assoc_expire(void);
+
+/**
+ * @brief      Get total number of devices in current network (including the root)
+ *
+ * @attention  The returned value might be incorrect when the network is changing.
+ **
+ * @return     total number of devices (including the root)
+ */
+int esp_mesh_get_total_node_num(void);
+
+/**
+ * @brief      Get the number of devices in this device's sub-network (including self)
+ *
+ * @return     the number of devices over this device's sub-network (including self)
+ */
+int esp_mesh_get_routing_table_size(void);
+
+/**
+ * @brief      Get routing table of this device's sub-network (including itself)
+ *
+ * @param[out] mac  pointer to routing table
+ * @param[in]  len  routing table size(in bytes)
+ * @param[out] size  pointer to the number of devices in routing table (including itself)
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_get_routing_table(mesh_addr_t *mac, int len, int *size);
+
+/**
+ * @brief      Post the toDS state to the mesh stack
+ *
+ * @attention  This API is only for the root.
+ *
+ * @param[in]  reachable  this state represents whether the root is able to access external IP network
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_post_toDS_state(bool reachable);
+
+/**
+ * @brief      Return the number of packets pending in the queue waiting to be sent by the mesh stack
+ *
+ * @param[out] pending  pointer to the TX pending
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_get_tx_pending(mesh_tx_pending_t *pending);
+
+/**
+ * @brief      Return the number of packets available in the queue waiting to be received by applications
+ *
+ * @param[out] pending  pointer to the RX pending
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_get_rx_pending(mesh_rx_pending_t *pending);
+
+/**
+ * @brief      Return the number of packets could be accepted from the specified address
+ *
+ * @param[in]  addr  self address or an associate children address
+ * @param[out] xseqno_in  sequence number of the last received packet from the specified address
+ *
+ * @return    the number of upQ for a certain address
+ */
+int esp_mesh_available_txupQ_num(const mesh_addr_t *addr, uint32_t *xseqno_in);
+
+/**
+ * @brief      Set the number of queue
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  qsize  default:32 (min:16)
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_set_xon_qsize(int qsize);
+
+/**
+ * @brief      Get queue size
+ *
+ * @return     the number of queue
+ */
+int esp_mesh_get_xon_qsize(void);
+
+/**
+ * @brief      Set whether allow more than one root existing in one network
+ *
+ * @param[in]  allowed  allow or not
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_WIFI_ERR_NOT_INIT
+ *    - ESP_WIFI_ERR_NOT_START
+ */
+esp_err_t esp_mesh_allow_root_conflicts(bool allowed);
+
+/**
+ * @brief      Check whether allow more than one root to exist in one network
+ *
+ * @return     true/false
+ */
+bool esp_mesh_is_root_conflicts_allowed(void);
+
+/**
+ * @brief      Set group ID addresses
+ *
+ * @param[in]  addr  pointer to new group ID addresses
+ * @param[in]  num  the number of group ID addresses
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_MESH_ERR_ARGUMENT
+ */
+esp_err_t esp_mesh_set_group_id(const mesh_addr_t *addr, int num);
+
+/**
+ * @brief      Delete group ID addresses
+ *
+ * @param[in]  addr  pointer to deleted group ID address
+ * @param[in]  num  the number of group ID addresses
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_MESH_ERR_ARGUMENT
+ */
+esp_err_t esp_mesh_delete_group_id(const mesh_addr_t *addr, int num);
+
+/**
+ * @brief      Get the number of group ID addresses
+ *
+ * @return     the number of group ID addresses
+ */
+int esp_mesh_get_group_num(void);
+
+/**
+ * @brief      Get group ID addresses
+ *
+ * @param[out] addr  pointer to group ID addresses
+ * @param[in]  num  the number of group ID addresses
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_MESH_ERR_ARGUMENT
+ */
+esp_err_t esp_mesh_get_group_list(mesh_addr_t *addr, int num);
+
+/**
+ * @brief      Check whether the specified group address is my group
+ *
+ * @return     true/false
+ */
+bool esp_mesh_is_my_group(const mesh_addr_t *addr);
+
+/**
+ * @brief      Set mesh network capacity (max:1000, default:300)
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  num  mesh network capacity
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_NOT_ALLOWED
+ *    - ESP_MESH_ERR_ARGUMENT
+ */
+esp_err_t esp_mesh_set_capacity_num(int num);
+
+/**
+ * @brief      Get mesh network capacity
+ *
+ * @return     mesh network capacity
+ */
+int esp_mesh_get_capacity_num(void);
+
+/**
+ * @brief      Set mesh IE crypto functions
+ *
+ * @attention  This API can be called at any time after mesh is initialized.
+ *
+ * @param[in]  crypto_funcs  crypto functions for mesh IE
+ *           - If crypto_funcs is set to NULL, mesh IE is no longer encrypted.
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_set_ie_crypto_funcs(const mesh_crypto_funcs_t *crypto_funcs);
+
+/**
+ * @brief      Set mesh IE crypto key
+ *
+ * @attention  This API can be called at any time after mesh is initialized.
+ *
+ * @param[in]  key  ASCII crypto key
+ * @param[in]  len  length in bytes, range:8~64
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_MESH_ERR_ARGUMENT
+ */
+esp_err_t esp_mesh_set_ie_crypto_key(const char *key, int len);
+
+/**
+ * @brief      Get mesh IE crypto key
+ *
+ * @param[out] key  ASCII crypto key
+ * @param[in]  len  length in bytes, range:8~64
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_MESH_ERR_ARGUMENT
+ */
+esp_err_t esp_mesh_get_ie_crypto_key(char *key, int len);
+
+/**
+ * @brief      Set delay time before starting root healing
+ *
+ * @param[in]  delay_ms  delay time in milliseconds
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_set_root_healing_delay(int delay_ms);
+
+/**
+ * @brief      Get delay time before network starts root healing
+ *
+ * @return     delay time in milliseconds
+ */
+int esp_mesh_get_root_healing_delay(void);
+
+/**
+ * @brief      Enable network Fixed Root Setting
+ *             - Enabling fixed root disables automatic election of the root node via voting.
+ *             - All devices in the network shall use the same Fixed Root Setting (enabled or disabled).
+ *             - If Fixed Root is enabled, users should make sure a root node is designated for the network.
+ *
+ * @param[in]  enable  enable or not
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_fix_root(bool enable);
+
+/**
+ * @brief      Check whether network Fixed Root Setting is enabled
+ *             - Enable/disable network Fixed Root Setting by API esp_mesh_fix_root().
+ *             - Network Fixed Root Setting also changes with the "flag" value in parent networking IE.
+ *
+ * @return     true/false
+ */
+bool esp_mesh_is_root_fixed(void);
+
+/**
+ * @brief      Set a specified parent for the device
+ *
+ * @attention  This API can be called at any time after mesh is configured.
+ *
+ * @param[in]  parent  parent configuration, the SSID and the channel of the parent are mandatory.
+ *             - If the BSSID is set, make sure that the SSID and BSSID represent the same parent,
+ *             otherwise the device will never find this specified parent.
+ * @param[in]  parent_mesh_id  parent mesh ID,
+ *             - If this value is not set, the original mesh ID is used.
+ * @param[in]  my_type  mesh type
+ *             - MESH_STA is not supported.
+ *             - If the parent set for the device is the same as the router in the network configuration,
+ *            then my_type shall set MESH_ROOT and my_layer shall set MESH_ROOT_LAYER.
+ * @param[in]  my_layer  mesh layer
+ *             - my_layer of the device may change after joining the network.
+ *             - If my_type is set MESH_NODE, my_layer shall be greater than MESH_ROOT_LAYER.
+ *             - If my_type is set MESH_LEAF, the device becomes a standalone Wi-Fi station and no longer
+ *             has the ability to extend the network.
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_ARGUMENT
+ *    - ESP_ERR_MESH_NOT_CONFIG
+ */
+esp_err_t esp_mesh_set_parent(const wifi_config_t *parent, const mesh_addr_t *parent_mesh_id, mesh_type_t my_type, int my_layer);
+
+/**
+ * @brief      Get mesh networking IE length of one AP
+ *
+ * @param[out] len  mesh networking IE length
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_WIFI_NOT_INIT
+ *    - ESP_ERR_WIFI_ARG
+ *    - ESP_ERR_WIFI_FAIL
+ */
+esp_err_t esp_mesh_scan_get_ap_ie_len(int *len);
+
+/**
+ * @brief      Get AP record
+ *
+ * @attention  Different from esp_wifi_scan_get_ap_records(), this API only gets one of APs scanned each time.
+ *             See "manual_networking" example.
+ *
+ * @param[out] ap_record  pointer to one AP record
+ * @param[out] buffer  pointer to the mesh networking IE of this AP
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_WIFI_NOT_INIT
+ *    - ESP_ERR_WIFI_ARG
+ *    - ESP_ERR_WIFI_FAIL
+ */
+esp_err_t esp_mesh_scan_get_ap_record(wifi_ap_record_t *ap_record, void *buffer);
+
+/**
+ * @brief      Flush upstream packets pending in to_parent queue and to_parent_p2p queue
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_flush_upstream_packets(void);
+
+/**
+ * @brief      Get the number of nodes in the subnet of a specific child
+ *
+ * @param[in]  child_mac  an associated child address of this device
+ * @param[out] nodes_num  pointer to the number of nodes in the subnet of a specific child
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_NOT_START
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_get_subnet_nodes_num(const mesh_addr_t *child_mac, int *nodes_num);
+
+/**
+ * @brief      Get nodes in the subnet of a specific child
+ *
+ * @param[in]  child_mac  an associated child address of this device
+ * @param[out] nodes  pointer to nodes in the subnet of a specific child
+ * @param[in]  nodes_num  the number of nodes in the subnet of a specific child
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_NOT_START
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_get_subnet_nodes_list(const mesh_addr_t *child_mac, mesh_addr_t *nodes, int nodes_num);
+
+/**
+ * @brief      Disconnect from current parent
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_disconnect(void);
+
+/**
+ * @brief      Connect to current parent
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_connect(void);
+
+/**
+ * @brief      Flush scan result
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_flush_scan_result(void);
+
+/**
+ * @brief      Cause the root device to add Channel Switch Announcement Element (CSA IE) to beacon
+ *             - Set the new channel
+ *             - Set how many beacons with CSA IE will be sent before changing a new channel
+ *             - Enable the channel switch function
+ *
+ * @attention  This API is only called by the root.
+ *
+ * @param[in]  new_bssid  the new router BSSID if the router changes
+ * @param[in]  csa_newchan  the new channel number to which the whole network is moving
+ * @param[in]  csa_count  channel switch period(beacon count), unit is based on beacon interval of its softAP, the default value is 15.
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_switch_channel(const uint8_t *new_bssid, int csa_newchan, int csa_count);
+
+/**
+ * @brief      Get the router BSSID
+ *
+ * @param[out] router_bssid  pointer to the router BSSID
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_WIFI_NOT_INIT
+ *    - ESP_ERR_WIFI_ARG
+ */
+esp_err_t esp_mesh_get_router_bssid(uint8_t *router_bssid);
+
+/**
+ * @brief      Get the TSF time
+ *
+ * @return     the TSF time
+ */
+int64_t esp_mesh_get_tsf_time(void);
+
+/**
+ * @brief      Set mesh topology. The default value is MESH_TOPO_TREE
+ *             - MESH_TOPO_CHAIN supports up to 1000 layers
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  topo  MESH_TOPO_TREE or MESH_TOPO_CHAIN
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_MESH_ERR_ARGUMENT
+ *    - ESP_ERR_MESH_NOT_ALLOWED
+ */
+esp_err_t esp_mesh_set_topology(esp_mesh_topology_t topo);
+
+/**
+ * @brief      Get mesh topology
+ *
+ * @return     MESH_TOPO_TREE or MESH_TOPO_CHAIN
+ */
+esp_mesh_topology_t esp_mesh_get_topology(void);
+
+/**
+ * @brief      Enable mesh Power Save function
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_WIFI_NOT_INIT
+ *    - ESP_ERR_MESH_NOT_ALLOWED
+ */
+esp_err_t esp_mesh_enable_ps(void);
+
+/**
+ * @brief      Disable mesh Power Save function
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_WIFI_NOT_INIT
+ *    - ESP_ERR_MESH_NOT_ALLOWED
+ */
+esp_err_t esp_mesh_disable_ps(void);
+
+/**
+ * @brief      Check whether the mesh Power Save function is enabled
+ *
+ * @return     true/false
+ */
+bool esp_mesh_is_ps_enabled(void);
+
+/**
+ * @brief      Check whether the device is in active state
+ *             - If the device is not in active state, it will neither transmit nor receive frames.
+ *
+ * @return     true/false
+ */
+bool esp_mesh_is_device_active(void);
+
+/**
+ * @brief      Set the device duty cycle and type
+ *             - The range of dev_duty values is 1 to 100. The default value is 10.
+ *             - dev_duty = 100, the PS will be stopped.
+ *             - dev_duty is better to not less than 5.
+ *             - dev_duty_type could be MESH_PS_DEVICE_DUTY_REQUEST or MESH_PS_DEVICE_DUTY_DEMAND.
+ *             - If dev_duty_type is set to MESH_PS_DEVICE_DUTY_REQUEST, the device will use a nwk_duty provided by the network.
+ *             - If dev_duty_type is set to MESH_PS_DEVICE_DUTY_DEMAND, the device will use the specified dev_duty.
+ *
+ * @attention  This API can be called at any time after mesh is started.
+ *
+ * @param[in]  dev_duty  device duty cycle
+ * @param[in]  dev_duty_type  device PS duty cycle type, not accept MESH_PS_NETWORK_DUTY_MASTER
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_set_active_duty_cycle(int dev_duty, int dev_duty_type);
+
+/**
+ * @brief      Get device duty cycle and type
+ *
+ * @param[out] dev_duty  device duty cycle
+ * @param[out] dev_duty_type  device PS duty cycle type
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_get_active_duty_cycle(int* dev_duty, int* dev_duty_type);
+
+/**
+ * @brief      Set the network duty cycle, duration and rule
+ *             - The range of nwk_duty values is 1 to 100. The default value is 10.
+ *             - nwk_duty is the network duty cycle the entire network or the up-link path will use. A device that successfully
+ *             sets the nwk_duty is known as a NWK-DUTY-MASTER.
+ *             - duration_mins specifies how long the specified nwk_duty will be used. Once duration_mins expires, the root will take
+ *             over as the NWK-DUTY-MASTER. If an existing NWK-DUTY-MASTER leaves the network, the root will take over as the
+ *             NWK-DUTY-MASTER again.
+ *             - duration_mins = (-1) represents nwk_duty will be used until a new NWK-DUTY-MASTER with a different nwk_duty appears.
+ *             - Only the root can set duration_mins to (-1).
+ *             - If applied_rule is set to MESH_PS_NETWORK_DUTY_APPLIED_ENTIRE, the nwk_duty will be used by the entire network.
+ *             - If applied_rule is set to MESH_PS_NETWORK_DUTY_APPLIED_UPLINK, the nwk_duty will only be used by the up-link path nodes.
+ *             - The root does not accept MESH_PS_NETWORK_DUTY_APPLIED_UPLINK.
+ *             - A nwk_duty with duration_mins(-1) set by the root is the default network duty cycle used by the entire network.
+ *
+ * @attention  This API can be called at any time after mesh is started.
+ *             - In self-organized network, if this API is called before mesh is started in all devices, (1)nwk_duty shall be set to the
+ *             same value for all devices; (2)duration_mins shall be set to (-1); (3)applied_rule shall be set to
+ *             MESH_PS_NETWORK_DUTY_APPLIED_ENTIRE; after the voted root appears, the root will become the NWK-DUTY-MASTER and broadcast
+ *             the nwk_duty and its identity of NWK-DUTY-MASTER.
+ *             - If the root is specified (FIXED-ROOT), call this API in the root to provide a default nwk_duty for the entire network.
+ *             - After joins the network, any device can call this API to change the nwk_duty, duration_mins or applied_rule.
+ *
+ * @param[in]  nwk_duty  network duty cycle
+ * @param[in]  duration_mins  duration (unit: minutes)
+ * @param[in]  applied_rule  only support MESH_PS_NETWORK_DUTY_APPLIED_ENTIRE
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_set_network_duty_cycle(int nwk_duty, int duration_mins, int applied_rule);
+
+/**
+ * @brief      Get the network duty cycle, duration, type and rule
+ *
+ * @param[out] nwk_duty  current network duty cycle
+ * @param[out] duration_mins  the duration of current nwk_duty
+ * @param[out] dev_duty_type  if it includes MESH_PS_DEVICE_DUTY_MASTER, this device is the current NWK-DUTY-MASTER.
+ * @param[out] applied_rule  MESH_PS_NETWORK_DUTY_APPLIED_ENTIRE
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_get_network_duty_cycle(int* nwk_duty, int* duration_mins, int* dev_duty_type, int* applied_rule);
+
+/**
+ * @brief      Get the running active duty cycle
+ *          - The running active duty cycle of the root is 100.
+ *          - If duty type is set to MESH_PS_DEVICE_DUTY_REQUEST, the running active duty cycle is nwk_duty provided by the network.
+ *          - If duty type is set to MESH_PS_DEVICE_DUTY_DEMAND, the running active duty cycle is dev_duty specified by the users.
+ *          - In a mesh network, devices are typically working with a certain duty-cycle (transmitting, receiving and sleep) to
+ *            reduce the power consumption. The running active duty cycle decides the amount of awake time within a beacon interval.
+ *            At each start of beacon interval, all devices wake up, broadcast beacons, and transmit packets if they do have pending
+ *            packets for their parents or for their children. Note that Low-duty-cycle means devices may not be active in most of
+ *            the time, the latency of data transmission might be greater.
+ *
+ * @return     the running active duty cycle
+ */
+int esp_mesh_get_running_active_duty_cycle(void);
+
+/**
+ * @brief      Duty signaling
+ *
+ * @param[in]  fwd_times  the times of forwarding duty signaling packets
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_ps_duty_signaling(int fwd_times);
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ESP_MESH_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_mesh_internal.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_mesh_internal.h
new file mode 100644
index 00000000000..e967dbaafbc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_mesh_internal.h
@@ -0,0 +1,310 @@
+// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_MESH_INTERNAL_H__
+#define __ESP_MESH_INTERNAL_H__
+
+#include "esp_err.h"
+#include "esp_mesh.h"
+#include "esp_wifi.h"
+#include "esp_wifi_types.h"
+#include "esp_private/wifi.h"
+#include "esp_wifi_crypto_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*******************************************************
+ *                Constants
+ *******************************************************/
+
+/*******************************************************
+ *                Structures
+ *******************************************************/
+typedef struct {
+    int scan;          /**< minimum scan times before being a root, default:10 */
+    int vote;          /**< max vote times in self-healing, default:1000 */
+    int fail;          /**< parent selection fail times, if the scan times reach this value,
+                            device will disconnect with associated children and join self-healing. default:60 */
+    int monitor_ie;    /**< acceptable times of parent networking IE change before update its own networking IE. default:3 */
+} mesh_attempts_t;
+
+typedef struct {
+    int duration_ms;   /* parent weak RSSI monitor duration, if the RSSI continues to be weak during this duration_ms,
+                          device will search for a new parent. */
+    int cnx_rssi;      /* RSSI threshold for keeping a good connection with parent.
+                          If set a value greater than -120 dBm, a timer will be armed to monitor parent RSSI at a period time of duration_ms. */
+    int select_rssi;   /* RSSI threshold for parent selection. It should be a value greater than switch_rssi. */
+    int switch_rssi;   /* Disassociate with current parent and switch to a new parent when the RSSI is greater than this set threshold. */
+    int backoff_rssi;  /* RSSI threshold for connecting to the root */
+} mesh_switch_parent_t;
+
+typedef struct {
+    int high;
+    int medium;
+    int low;
+} mesh_rssi_threshold_t;
+
+/**
+ * @brief Mesh networking IE
+ */
+typedef struct {
+    /**< mesh networking IE head */
+    uint8_t eid;             /**< element ID */
+    uint8_t len;             /**< element length */
+    uint8_t oui[3];          /**< organization identifier */
+    /**< mesh networking IE content */
+    uint8_t type;            /** ESP defined IE type */
+    uint8_t encrypted : 1;   /**< whether mesh networking IE is encrypted */
+    uint8_t version : 7;     /**< mesh networking IE version */
+    /**< content */
+    uint8_t mesh_type;       /**< mesh device type */
+    uint8_t mesh_id[6];      /**< mesh ID */
+    uint8_t layer_cap;       /**< max layer */
+    uint8_t layer;           /**< current layer */
+    uint8_t assoc_cap;       /**< max connections of mesh AP */
+    uint8_t assoc;           /**< current connections */
+    uint8_t leaf_cap;        /**< leaf capacity */
+    uint8_t leaf_assoc;      /**< the number of current connected leaf */
+    uint16_t root_cap;       /**< root capacity */
+    uint16_t self_cap;       /**< self capacity */
+    uint16_t layer2_cap;     /**< layer2 capacity */
+    uint16_t scan_ap_num;    /**< the number of scanning APs */
+    int8_t rssi;             /**< RSSI of the parent */
+    int8_t router_rssi;      /**< RSSI of the router */
+    uint8_t flag;            /**< flag of networking */
+    uint8_t rc_addr[6];      /**< root address */
+    int8_t rc_rssi;          /**< root RSSI */
+    uint8_t vote_addr[6];    /**< voter address */
+    int8_t vote_rssi;        /**< vote RSSI of the router */
+    uint8_t vote_ttl;        /**< vote ttl */
+    uint16_t votes;          /**< votes */
+    uint16_t my_votes;       /**< my votes */
+    uint8_t reason;          /**< reason */
+    uint8_t child[6];        /**< child address */
+    uint8_t toDS;            /**< toDS state */
+} __attribute__((packed)) mesh_assoc_t;
+
+typedef struct {
+    uint16_t layer_cap;
+    uint16_t layer;
+} mesh_chain_layer_t;
+
+typedef struct {
+    mesh_assoc_t tree;
+    mesh_chain_layer_t chain;
+} __attribute__((packed)) mesh_chain_assoc_t;
+
+/**
+ * @brief Mesh PS duties
+ */
+typedef struct {
+    uint8_t device;
+    uint8_t parent;
+    struct {
+        bool used;
+        uint8_t duty;
+        uint8_t mac[6];
+    } child[ESP_WIFI_MAX_CONN_NUM];
+} esp_mesh_ps_duties_t;
+
+/*******************************************************
+ *                Function Definitions
+ *******************************************************/
+/**
+ * @brief      Set mesh softAP beacon interval
+ *
+ * @param[in]  interval  beacon interval (msecs) (100 msecs ~ 60000 msecs)
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ *    - ESP_ERR_WIFI_ARG
+ */
+esp_err_t esp_mesh_set_beacon_interval(int interval_ms);
+
+/**
+ * @brief      Get mesh softAP beacon interval
+ *
+ * @param[out] interval  beacon interval (msecs)
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_get_beacon_interval(int *interval_ms);
+
+/**
+ * @brief     Set attempts for mesh self-organized networking
+ *
+ * @param[in] attempts
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_set_attempts(mesh_attempts_t *attempts);
+
+/**
+ * @brief      Get attempts for mesh self-organized networking
+ *
+ * @param[out] attempts
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_get_attempts(mesh_attempts_t *attempts);
+
+/**
+ * @brief      Set parameters for parent switch
+ *
+ * @param[in]  paras  parameters for parent switch
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_set_switch_parent_paras(mesh_switch_parent_t *paras);
+
+/**
+ * @brief      Get parameters for parent switch
+ *
+ * @param[out] paras  parameters for parent switch
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_get_switch_parent_paras(mesh_switch_parent_t *paras);
+
+/**
+ * @brief      Set RSSI threshold
+ *             - The default high RSSI threshold value is -78 dBm.
+ *             - The default medium RSSI threshold value is -82 dBm.
+ *             - The default low RSSI threshold value is -85 dBm.
+ *
+ * @param[in]  threshold  RSSI threshold
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_set_rssi_threshold(const mesh_rssi_threshold_t *threshold);
+
+/**
+ * @brief      Get RSSI threshold
+ *
+ * @param[out] threshold  RSSI threshold
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_ERR_MESH_ARGUMENT
+ */
+esp_err_t esp_mesh_get_rssi_threshold(mesh_rssi_threshold_t *threshold);
+
+/**
+ * @brief      Enable the minimum rate to 6 Mbps
+ *
+ * @attention  This API shall be called before Wi-Fi is started.
+ *
+ * @param[in]  is_6m  enable or not
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_set_6m_rate(bool is_6m);
+
+/**
+ * @brief      Print the number of txQ waiting
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_print_txQ_waiting(void);
+
+/**
+ * @brief      Print the number of rxQ waiting
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ */
+esp_err_t esp_mesh_print_rxQ_waiting(void);
+
+/**
+ * @brief      Set passive scan time
+ *
+ * @param[in]  interval_ms  passive scan time (msecs)
+ *
+ * @return
+ *    - ESP_OK
+ *    - ESP_FAIL
+ *    - ESP_ERR_ARGUMENT
+ */
+esp_err_t esp_mesh_set_passive_scan_time(int time_ms);
+
+/**
+ * @brief      Get passive scan time
+ *
+ * @return     interval_ms  passive scan time (msecs)
+ */
+int esp_mesh_get_passive_scan_time(void);
+
+/**
+ * @brief      Set announce interval
+ *             - The default short interval is 500 milliseconds.
+ *             - The default long interval is 3000 milliseconds.
+ *
+ * @param[in]  short_ms  shall be greater than the default value
+ * @param[in]  long_ms  shall be greater than the default value
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_set_announce_interval(int short_ms, int long_ms);
+
+/**
+ * @brief      Get announce interval
+ *
+ * @param[out] short_ms  short interval
+ * @param[out] long_ms  long interval
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_get_announce_interval(int *short_ms, int *long_ms);
+
+/**
+  * @brief      Get the running duties of device, parent and children
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_ps_get_duties(esp_mesh_ps_duties_t* ps_duties);
+
+/**
+ * @brief      Enable mesh print scan result
+ *
+ * @param[in]  enable  enable or not
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_print_scan_result(bool enable);
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ESP_MESH_INTERNAL_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_now.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_now.h
new file mode 100644
index 00000000000..de41a879363
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_now.h
@@ -0,0 +1,334 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_NOW_H__
+#define __ESP_NOW_H__
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_wifi_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup WiFi_APIs WiFi Related APIs
+  * @brief WiFi APIs
+  */
+
+/** @addtogroup WiFi_APIs
+  * @{
+  */
+
+/** \defgroup ESPNOW_APIs  ESPNOW APIs
+  * @brief ESP32 ESPNOW APIs
+  *
+  */
+
+/** @addtogroup ESPNOW_APIs
+  * @{
+  */
+
+#define ESP_ERR_ESPNOW_BASE         (ESP_ERR_WIFI_BASE + 100) /*!< ESPNOW error number base. */
+#define ESP_ERR_ESPNOW_NOT_INIT     (ESP_ERR_ESPNOW_BASE + 1) /*!< ESPNOW is not initialized. */
+#define ESP_ERR_ESPNOW_ARG          (ESP_ERR_ESPNOW_BASE + 2) /*!< Invalid argument */
+#define ESP_ERR_ESPNOW_NO_MEM       (ESP_ERR_ESPNOW_BASE + 3) /*!< Out of memory */
+#define ESP_ERR_ESPNOW_FULL         (ESP_ERR_ESPNOW_BASE + 4) /*!< ESPNOW peer list is full */
+#define ESP_ERR_ESPNOW_NOT_FOUND    (ESP_ERR_ESPNOW_BASE + 5) /*!< ESPNOW peer is not found */
+#define ESP_ERR_ESPNOW_INTERNAL     (ESP_ERR_ESPNOW_BASE + 6) /*!< Internal error */
+#define ESP_ERR_ESPNOW_EXIST        (ESP_ERR_ESPNOW_BASE + 7) /*!< ESPNOW peer has existed */
+#define ESP_ERR_ESPNOW_IF           (ESP_ERR_ESPNOW_BASE + 8) /*!< Interface error */
+
+#define ESP_NOW_ETH_ALEN             6         /*!< Length of ESPNOW peer MAC address */
+#define ESP_NOW_KEY_LEN              16        /*!< Length of ESPNOW peer local master key */
+
+#define ESP_NOW_MAX_TOTAL_PEER_NUM   20        /*!< Maximum number of ESPNOW total peers */
+#define ESP_NOW_MAX_ENCRYPT_PEER_NUM 6         /*!< Maximum number of ESPNOW encrypted peers */
+
+#define ESP_NOW_MAX_DATA_LEN         250       /*!< Maximum length of ESPNOW data which is sent very time */
+
+/**
+ * @brief Status of sending ESPNOW data .
+ */
+typedef enum {
+    ESP_NOW_SEND_SUCCESS = 0,       /**< Send ESPNOW data successfully */
+    ESP_NOW_SEND_FAIL,              /**< Send ESPNOW data fail */
+} esp_now_send_status_t;
+
+/**
+ * @brief ESPNOW peer information parameters.
+ */
+typedef struct esp_now_peer_info {
+    uint8_t peer_addr[ESP_NOW_ETH_ALEN];    /**< ESPNOW peer MAC address that is also the MAC address of station or softap */
+    uint8_t lmk[ESP_NOW_KEY_LEN];           /**< ESPNOW peer local master key that is used to encrypt data */
+    uint8_t channel;                        /**< Wi-Fi channel that peer uses to send/receive ESPNOW data. If the value is 0,
+                                                 use the current channel which station or softap is on. Otherwise, it must be
+                                                 set as the channel that station or softap is on. */
+    wifi_interface_t ifidx;                 /**< Wi-Fi interface that peer uses to send/receive ESPNOW data */
+    bool encrypt;                           /**< ESPNOW data that this peer sends/receives is encrypted or not */
+    void *priv;                             /**< ESPNOW peer private data */
+} esp_now_peer_info_t;
+
+/**
+ * @brief Number of ESPNOW peers which exist currently.
+ */
+typedef struct esp_now_peer_num {
+    int total_num;                           /**< Total number of ESPNOW peers, maximum value is ESP_NOW_MAX_TOTAL_PEER_NUM */
+    int encrypt_num;                         /**< Number of encrypted ESPNOW peers, maximum value is ESP_NOW_MAX_ENCRYPT_PEER_NUM */
+} esp_now_peer_num_t;
+
+/**
+  * @brief     Callback function of receiving ESPNOW data
+  * @param     mac_addr peer MAC address
+  * @param     data received data
+  * @param     data_len length of received data
+  */
+typedef void (*esp_now_recv_cb_t)(const uint8_t *mac_addr, const uint8_t *data, int data_len);
+
+/**
+  * @brief     Callback function of sending ESPNOW data
+  * @param     mac_addr peer MAC address
+  * @param     status status of sending ESPNOW data (succeed or fail)
+  */
+typedef void (*esp_now_send_cb_t)(const uint8_t *mac_addr, esp_now_send_status_t status);
+
+/**
+  * @brief     Initialize ESPNOW function
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_INTERNAL : Internal error
+  */
+esp_err_t esp_now_init(void);
+
+/**
+  * @brief     De-initialize ESPNOW function
+  *
+  * @return
+  *          - ESP_OK : succeed
+  */
+esp_err_t esp_now_deinit(void);
+
+/**
+  * @brief     Get the version of ESPNOW
+  *
+  * @param     version  ESPNOW version
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_ARG : invalid argument
+  */
+esp_err_t esp_now_get_version(uint32_t *version);
+
+/**
+  * @brief     Register callback function of receiving ESPNOW data
+  *
+  * @param     cb  callback function of receiving ESPNOW data
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  *          - ESP_ERR_ESPNOW_INTERNAL : internal error
+  */
+esp_err_t esp_now_register_recv_cb(esp_now_recv_cb_t cb);
+
+/**
+  * @brief     Unregister callback function of receiving ESPNOW data
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  */
+esp_err_t esp_now_unregister_recv_cb(void);
+
+/**
+  * @brief     Register callback function of sending ESPNOW data
+  *
+  * @param     cb  callback function of sending ESPNOW data
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  *          - ESP_ERR_ESPNOW_INTERNAL : internal error
+  */
+esp_err_t esp_now_register_send_cb(esp_now_send_cb_t cb);
+
+/**
+  * @brief     Unregister callback function of sending ESPNOW data
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  */
+esp_err_t esp_now_unregister_send_cb(void);
+
+/**
+  * @brief     Send ESPNOW data
+  *
+  * @attention 1. If peer_addr is not NULL, send data to the peer whose MAC address matches peer_addr
+  * @attention 2. If peer_addr is NULL, send data to all of the peers that are added to the peer list
+  * @attention 3. The maximum length of data must be less than ESP_NOW_MAX_DATA_LEN
+  * @attention 4. The buffer pointed to by data argument does not need to be valid after esp_now_send returns
+  *
+  * @param     peer_addr  peer MAC address
+  * @param     data  data to send
+  * @param     len  length of data
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  *          - ESP_ERR_ESPNOW_ARG : invalid argument
+  *          - ESP_ERR_ESPNOW_INTERNAL : internal error
+  *          - ESP_ERR_ESPNOW_NO_MEM : out of memory
+  *          - ESP_ERR_ESPNOW_NOT_FOUND : peer is not found
+  *          - ESP_ERR_ESPNOW_IF : current WiFi interface doesn't match that of peer
+  */
+esp_err_t esp_now_send(const uint8_t *peer_addr, const uint8_t *data, size_t len);
+
+/**
+  * @brief     Add a peer to peer list
+  *
+  * @param     peer  peer information
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  *          - ESP_ERR_ESPNOW_ARG : invalid argument
+  *          - ESP_ERR_ESPNOW_FULL : peer list is full
+  *          - ESP_ERR_ESPNOW_NO_MEM : out of memory
+  *          - ESP_ERR_ESPNOW_EXIST : peer has existed
+  */
+esp_err_t esp_now_add_peer(const esp_now_peer_info_t *peer);
+
+/**
+  * @brief     Delete a peer from peer list
+  *
+  * @param     peer_addr  peer MAC address
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  *          - ESP_ERR_ESPNOW_ARG : invalid argument
+  *          - ESP_ERR_ESPNOW_NOT_FOUND : peer is not found
+  */
+esp_err_t esp_now_del_peer(const uint8_t *peer_addr);
+
+/**
+  * @brief     Modify a peer
+  *
+  * @param     peer  peer information
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  *          - ESP_ERR_ESPNOW_ARG : invalid argument
+  *          - ESP_ERR_ESPNOW_FULL : peer list is full
+  */
+esp_err_t esp_now_mod_peer(const esp_now_peer_info_t *peer);
+
+/**
+  * @brief     Get a peer whose MAC address matches peer_addr from peer list
+  *
+  * @param     peer_addr  peer MAC address
+  * @param     peer  peer information
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  *          - ESP_ERR_ESPNOW_ARG : invalid argument
+  *          - ESP_ERR_ESPNOW_NOT_FOUND : peer is not found
+  */
+esp_err_t esp_now_get_peer(const uint8_t *peer_addr, esp_now_peer_info_t *peer);
+
+/**
+  * @brief     Fetch a peer from peer list. Only return the peer which address is unicast, for the multicast/broadcast address, the function will ignore and try to find the next in the peer list.
+  *
+  * @param     from_head  fetch from head of list or not
+  * @param     peer  peer information
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  *          - ESP_ERR_ESPNOW_ARG : invalid argument
+  *          - ESP_ERR_ESPNOW_NOT_FOUND : peer is not found
+  */
+esp_err_t esp_now_fetch_peer(bool from_head, esp_now_peer_info_t *peer);
+
+/**
+  * @brief     Peer exists or not
+  *
+  * @param     peer_addr  peer MAC address
+  *
+  * @return
+  *          - true : peer exists
+  *          - false : peer not exists
+  */
+bool esp_now_is_peer_exist(const uint8_t *peer_addr);
+
+/**
+  * @brief     Get the number of peers
+  *
+  * @param     num  number of peers
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  *          - ESP_ERR_ESPNOW_ARG : invalid argument
+  */
+esp_err_t esp_now_get_peer_num(esp_now_peer_num_t *num);
+
+/**
+  * @brief     Set the primary master key
+  *
+  * @param     pmk  primary master key
+  *
+  * @attention 1. primary master key is used to encrypt local master key
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  *          - ESP_ERR_ESPNOW_ARG : invalid argument
+  */
+esp_err_t esp_now_set_pmk(const uint8_t *pmk);
+
+/**
+  * @brief     Set esp_now wake window for sta_disconnected power management
+  *
+  * @param     window  how much microsecond would the chip keep waked each interval, vary from 0 to 65535
+  *
+  * @attention 1. Only when ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is enabled, this configuration could work
+  * @attention 2. This configuration only work for station mode and disconnected status
+  * @attention 3. If more than one module has configured its wake_window, chip would choose the largest one to stay waked
+  * @attention 4. If the gap between interval and window is smaller than 5ms, the chip would keep waked all the time
+  * @attention 5. If never configured wake_window, the chip would keep waked at disconnected once it uses esp_now
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized
+  */
+esp_err_t esp_now_set_wake_window(uint16_t window);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_NOW_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/esp_wifi_private.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/esp_wifi_private.h
new file mode 100644
index 00000000000..087a4a16643
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/esp_wifi_private.h
@@ -0,0 +1,25 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_WIFI_PRIVATE_H
+#define _ESP_WIFI_PRIVATE_H
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/queue.h"
+#include "sys/queue.h"
+#include "sdkconfig.h"
+#include "esp_wifi_crypto_types.h"
+#include "esp_private/wifi_os_adapter.h"
+
+
+#endif /* _ESP_WIFI_PRIVATE_H */
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/esp_wifi_types_private.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/esp_wifi_types_private.h
new file mode 100644
index 00000000000..55c70c77ca5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/esp_wifi_types_private.h
@@ -0,0 +1,25 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_WIFI_TYPES_PRIVATE_H
+#define _ESP_WIFI_TYPES_PRIVATE_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "sys/queue.h"
+#include "esp_err.h"
+#include "esp_interface.h"
+#include "esp_event_base.h"
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/wifi.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/wifi.h
new file mode 100644
index 00000000000..957f68791bd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/wifi.h
@@ -0,0 +1,596 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * All the APIs declared here are internal only APIs, it can only be used by
+ * espressif internal modules, such as SSC, LWIP, TCPIP adapter etc, espressif
+ * customers are not recommended to use them.
+ *
+ * If someone really want to use specified APIs declared in here, please contact
+ * espressif AE/developer to make sure you know the limitations or risk of
+ * the API, otherwise you may get unexpected behavior!!!
+ *
+ */
+
+
+#ifndef __ESP_WIFI_INTERNAL_H__
+#define __ESP_WIFI_INTERNAL_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "freertos/FreeRTOS.h"
+#include "freertos/queue.h"
+#include "sys/queue.h"
+#include "esp_err.h"
+#include "esp_wifi_types.h"
+#include "esp_event.h"
+#include "esp_wifi.h"
+#include "esp_smartconfig.h"
+#include "wifi_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    QueueHandle_t handle; /**< FreeRTOS queue handler */
+    void *storage;        /**< storage for FreeRTOS queue */
+} wifi_static_queue_t;
+
+/**
+  * @brief WiFi log level
+  *
+  */
+typedef enum {
+    WIFI_LOG_NONE = 0,
+    WIFI_LOG_ERROR ,      /*enabled by default*/
+    WIFI_LOG_WARNING,     /*enabled by default*/
+    WIFI_LOG_INFO,        /*enabled by default*/
+    WIFI_LOG_DEBUG,       /*can be set in menuconfig*/
+    WIFI_LOG_VERBOSE,     /*can be set in menuconfig*/
+} wifi_log_level_t;
+
+/**
+  * @brief WiFi log module definition
+  *
+  */
+typedef enum {
+    WIFI_LOG_MODULE_ALL  = 0, /*all log modules */
+    WIFI_LOG_MODULE_WIFI, /*logs related to WiFi*/
+    WIFI_LOG_MODULE_COEX, /*logs related to WiFi and BT(or BLE) coexist*/
+    WIFI_LOG_MODULE_MESH, /*logs related to Mesh*/
+} wifi_log_module_t;
+
+/**
+  * @brief WiFi log submodule definition
+  *
+  */
+#define WIFI_LOG_SUBMODULE_ALL   (0)    /*all log submodules*/
+#define WIFI_LOG_SUBMODULE_INIT  (1)    /*logs related to initialization*/
+#define WIFI_LOG_SUBMODULE_IOCTL (1<<1) /*logs related to API calling*/
+#define WIFI_LOG_SUBMODULE_CONN  (1<<2) /*logs related to connecting*/
+#define WIFI_LOG_SUBMODULE_SCAN  (1<<3) /*logs related to scaning*/
+
+
+/**
+ * @brief Initialize Wi-Fi Driver
+ *     Alloc resource for WiFi driver, such as WiFi control structure, RX/TX buffer,
+ *     WiFi NVS structure among others.
+ *
+ * For the most part, you need not call this function directly. It gets called
+ * from esp_wifi_init().
+ *
+ * This function may be called, if you only need to initialize the Wi-Fi driver
+ * without having to use the network stack on top.
+ *
+ * @param  config provide WiFi init configuration
+ *
+ * @return
+ *    - ESP_OK: succeed
+ *    - ESP_ERR_NO_MEM: out of memory
+ *    - others: refer to error code esp_err.h
+ */
+esp_err_t esp_wifi_init_internal(const wifi_init_config_t *config);
+
+/**
+ * @brief Deinitialize Wi-Fi Driver
+ *     Free resource for WiFi driver, such as WiFi control structure, RX/TX buffer,
+ *     WiFi NVS structure among others.
+ *
+ * For the most part, you need not call this function directly. It gets called
+ * from esp_wifi_deinit().
+ *
+ * This function may be called, if you call esp_wifi_init_internal to initialize
+ * WiFi driver.
+ *
+ * @return
+ *    - ESP_OK: succeed
+ *    - others: refer to error code esp_err.h
+ */
+esp_err_t esp_wifi_deinit_internal(void);
+
+/**
+  * @brief  free the rx buffer which allocated by wifi driver
+  *
+  * @param  void* buffer: rx buffer pointer
+  */
+void esp_wifi_internal_free_rx_buffer(void* buffer);
+
+/**
+  * @brief  transmit the buffer via wifi driver
+  *
+  * This API makes a copy of the input buffer and then forwards the buffer
+  * copy to WiFi driver.
+  *
+  * @param  wifi_interface_t wifi_if : wifi interface id
+  * @param  void *buffer : the buffer to be tansmit
+  * @param  uint16_t len : the length of buffer
+  *
+  * @return
+  *    - ESP_OK  : Successfully transmit the buffer to wifi driver
+  *    - ESP_ERR_NO_MEM: out of memory
+  *    - ESP_ERR_WIFI_ARG: invalid argument
+  *    - ESP_ERR_WIFI_IF : WiFi interface is invalid
+  *    - ESP_ERR_WIFI_CONN : WiFi interface is not created, e.g. send the data to STA while WiFi mode is AP mode
+  *    - ESP_ERR_WIFI_NOT_STARTED : WiFi is not started
+  *    - ESP_ERR_WIFI_STATE : WiFi internal state is not ready, e.g. WiFi is not started
+  *    - ESP_ERR_WIFI_NOT_ASSOC : WiFi is not associated
+  *    - ESP_ERR_WIFI_TX_DISALLOW : WiFi TX is disallowed, e.g. WiFi hasn't pass the authentication
+  *    - ESP_ERR_WIFI_POST : caller fails to post event to WiFi task
+  */
+int esp_wifi_internal_tx(wifi_interface_t wifi_if, void *buffer, uint16_t len);
+
+/**
+  * @brief     The net stack buffer reference counter callback function
+  *
+  */
+typedef void (*wifi_netstack_buf_ref_cb_t)(void *netstack_buf);
+
+/**
+  * @brief     The net stack buffer free callback function
+  *
+  */
+typedef void (*wifi_netstack_buf_free_cb_t)(void *netstack_buf);
+
+/**
+  * @brief  transmit the buffer by reference via wifi driver
+  *
+  * This API firstly increases the reference counter of the input buffer and
+  * then forwards the buffer to WiFi driver. The WiFi driver will free the buffer
+  * after processing it. Use esp_wifi_internal_tx() if the uplayer buffer doesn't
+  * supports reference counter.
+  *
+  * @param  wifi_if : wifi interface id
+  * @param  buffer : the buffer to be tansmit
+  * @param  len : the length of buffer
+  * @param  netstack_buf : the netstack buffer related to bufffer
+  *
+  * @return
+  *    - ESP_OK  : Successfully transmit the buffer to wifi driver
+  *    - ESP_ERR_NO_MEM: out of memory
+  *    - ESP_ERR_WIFI_ARG: invalid argument
+  *    - ESP_ERR_WIFI_IF : WiFi interface is invalid
+  *    - ESP_ERR_WIFI_CONN : WiFi interface is not created, e.g. send the data to STA while WiFi mode is AP mode
+  *    - ESP_ERR_WIFI_NOT_STARTED : WiFi is not started
+  *    - ESP_ERR_WIFI_STATE : WiFi internal state is not ready, e.g. WiFi is not started
+  *    - ESP_ERR_WIFI_NOT_ASSOC : WiFi is not associated
+  *    - ESP_ERR_WIFI_TX_DISALLOW : WiFi TX is disallowed, e.g. WiFi hasn't pass the authentication
+  *    - ESP_ERR_WIFI_POST : caller fails to post event to WiFi task
+  */
+esp_err_t esp_wifi_internal_tx_by_ref(wifi_interface_t ifx, void *buffer, size_t len, void *netstack_buf);
+
+/**
+  * @brief     Initialize WAPI function when wpa_supplicant initialize.
+  *
+  * This API is privately used, be careful not open to external applicantion.
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_WAPI_INTERNAL : Internal error
+  */
+esp_err_t esp_wifi_internal_wapi_init(void);
+
+/**
+  * @brief     De-initialize WAPI function when wpa_supplicant de-initialize.
+  *
+  * This API is privately used, be careful not open to external applicantion.
+  *
+  * @return
+  *          - ESP_OK : succeed
+  */
+esp_err_t esp_wifi_internal_wapi_deinit(void);
+
+/**
+  * @brief  register the net stack buffer reference increasing and free callback
+  *
+  * @param  ref : net stack buffer reference callback
+  * @param  free: net stack buffer free callback
+  *
+  * @return
+  *    - ESP_OK  : Successfully transmit the buffer to wifi driver
+  *    - others  : failed to register the callback
+  */
+esp_err_t esp_wifi_internal_reg_netstack_buf_cb(wifi_netstack_buf_ref_cb_t ref, wifi_netstack_buf_free_cb_t free);
+
+
+/**
+  * @brief     The WiFi RX callback function
+  *
+  *            Each time the WiFi need to forward the packets to high layer, the callback function will be called
+  */
+typedef esp_err_t (*wifi_rxcb_t)(void *buffer, uint16_t len, void *eb);
+
+/**
+  * @brief     Set the WiFi RX callback
+  *
+  * @attention 1. Currently we support only one RX callback for each interface
+  *
+  * @param     wifi_interface_t ifx : interface
+  * @param     wifi_rxcb_t fn : WiFi RX callback
+  *
+  * @return
+  *     - ESP_OK : succeed
+  *     - others : fail
+  */
+esp_err_t esp_wifi_internal_reg_rxcb(wifi_interface_t ifx, wifi_rxcb_t fn);
+
+/**
+  * @brief     Notify WIFI driver that the station got ip successfully
+  *
+  * @return
+  *     - ESP_OK : succeed
+  *     - others : fail
+  */
+esp_err_t esp_wifi_internal_set_sta_ip(void);
+
+/**
+  * @brief  enable or disable transmitting WiFi MAC frame with fixed rate
+  *
+  * @attention 1. If fixed rate is enabled, both management and data frame are transmitted with fixed rate
+  * @attention 2. Make sure that the receiver is able to receive the frame with the fixed rate if you want the frame to be received
+  *
+  * @param  ifx : wifi interface
+  * @param  en : false - disable, true - enable
+  * @param  rate : PHY rate
+  *
+  * @return
+  *    - ERR_OK  : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_STARTED: WiFi was not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_IF : invalid WiFi interface
+  *    - ESP_ERR_INVALID_ARG : invalid rate
+  *    - ESP_ERR_NOT_SUPPORTED : do not support to set fixed rate if TX AMPDU is enabled
+  */
+esp_err_t esp_wifi_internal_set_fix_rate(wifi_interface_t ifx, bool en, wifi_phy_rate_t rate);
+
+/**
+  * @brief     Start SmartConfig, config ESP device to connect AP. You need to broadcast information by phone APP.
+  *            Device sniffer special packets from the air that containing SSID and password of target AP.
+  *
+  * @attention 1. This API can be called in station or softAP-station mode.
+  * @attention 2. Can not call esp_smartconfig_start twice before it finish, please call
+  *               esp_smartconfig_stop first.
+  *
+  * @param     config pointer to smartconfig start configure structure
+  *
+  * @return
+  *     - ESP_OK: succeed
+  *     - others: fail
+  */
+esp_err_t esp_smartconfig_internal_start(const smartconfig_start_config_t *config);
+
+/**
+  * @brief     Stop SmartConfig, free the buffer taken by esp_smartconfig_start.
+  *
+  * @attention Whether connect to AP succeed or not, this API should be called to free
+  *            memory taken by smartconfig_start.
+  *
+  * @return
+  *     - ESP_OK: succeed
+  *     - others: fail
+  */
+esp_err_t esp_smartconfig_internal_stop(void);
+
+/**
+  * @brief     Check the MD5 values of the OS adapter header files in IDF and WiFi library
+  *
+  * @attention 1. It is used for internal CI version check
+  *
+  * @return
+  *     - ESP_OK : succeed
+  *     - ESP_WIFI_INVALID_ARG : MD5 check fail
+  */
+esp_err_t esp_wifi_internal_osi_funcs_md5_check(const char *md5);
+
+/**
+  * @brief     Check the MD5 values of the crypto types header files in IDF and WiFi library
+  *
+  * @attention 1. It is used for internal CI version check
+  *
+  * @return
+  *     - ESP_OK : succeed
+  *     - ESP_WIFI_INVALID_ARG : MD5 check fail
+  */
+esp_err_t esp_wifi_internal_crypto_funcs_md5_check(const char *md5);
+
+/**
+  * @brief     Check the MD5 values of the esp_wifi_types.h in IDF and WiFi library
+  *
+  * @attention 1. It is used for internal CI version check
+  *
+  * @return
+  *     - ESP_OK : succeed
+  *     - ESP_WIFI_INVALID_ARG : MD5 check fail
+  */
+esp_err_t esp_wifi_internal_wifi_type_md5_check(const char *md5);
+
+/**
+  * @brief     Check the MD5 values of the esp_wifi.h in IDF and WiFi library
+  *
+  * @attention 1. It is used for internal CI version check
+  *
+  * @return
+  *     - ESP_OK : succeed
+  *     - ESP_WIFI_INVALID_ARG : MD5 check fail
+  */
+esp_err_t esp_wifi_internal_esp_wifi_md5_check(const char *md5);
+
+/**
+  * @brief     Allocate a chunk of memory for WiFi driver
+  *
+  * @attention This API is not used for DMA memory allocation.
+  *
+  * @param     size_t size : Size, in bytes, of the amount of memory to allocate
+  *
+  * @return    A pointer to the memory allocated on success, NULL on failure
+  */
+void *wifi_malloc( size_t size );
+
+/**
+  * @brief     Reallocate a chunk of memory for WiFi driver
+  *
+  * @attention This API is not used for DMA memory allocation.
+  *
+  * @param     void * ptr  : Pointer to previously allocated memory, or NULL for a new allocation.
+  * @param     size_t size : Size, in bytes, of the amount of memory to allocate
+  *
+  * @return    A pointer to the memory allocated on success, NULL on failure
+  */
+void *wifi_realloc( void *ptr, size_t size );
+
+/**
+  * @brief     Callocate memory for WiFi driver
+  *
+  * @attention This API is not used for DMA memory allocation.
+  *
+  * @param     size_t n    : Number of continuing chunks of memory to allocate
+  * @param     size_t size : Size, in bytes, of the amount of memory to allocate
+  *
+  * @return    A pointer to the memory allocated on success, NULL on failure
+  */
+void *wifi_calloc( size_t n, size_t size );
+
+/**
+  * @brief     Update WiFi MAC time
+  *
+  * @param     uint32_t time_delta : time duration since the WiFi/BT common clock is disabled
+  *
+  * @return    Always returns ESP_OK
+  */
+typedef esp_err_t (* wifi_mac_time_update_cb_t)( uint32_t time_delta );
+
+/**
+  * @brief     Update WiFi MAC time
+  *
+  * @param     uint32_t time_delta : time duration since the WiFi/BT common clock is disabled
+  *
+  * @return    Always returns ESP_OK
+  */
+esp_err_t esp_wifi_internal_update_mac_time( uint32_t time_delta );
+
+/**
+  * @brief     Set current WiFi log level
+  *
+  * @param     level   Log level.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_FAIL: level is invalid
+  */
+esp_err_t esp_wifi_internal_set_log_level(wifi_log_level_t level);
+
+/**
+  * @brief     Set current log module and submodule
+  *
+  * @param     module      Log module
+  * @param     submodule   Log submodule
+  * @param     enable      enable or disable
+  *            If module == 0 && enable == 0, all log modules are disabled.
+  *            If module == 0 && enable == 1, all log modules are enabled.
+  *            If submodule == 0 && enable == 0, all log submodules are disabled.
+  *            If submodule == 0 && enable == 1, all log submodules are enabled.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_ARG: invalid argument
+  */
+esp_err_t esp_wifi_internal_set_log_mod(wifi_log_module_t module, uint32_t submodule, bool enable);
+
+/**
+  * @brief     Get current WiFi log info
+  *
+  * @param     log_level  the return log level.
+  * @param     log_mod    the return log module and submodule
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_wifi_internal_get_log(wifi_log_level_t *log_level, uint32_t *log_mod);
+
+/**
+  * @brief     A general API to set/get WiFi internal configuration, it's for debug only
+  *
+  * @param     cmd : ioctl command type
+  * @param     cfg : configuration for the command
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - others: failed
+  */
+esp_err_t esp_wifi_internal_ioctl(int cmd, wifi_ioctl_config_t *cfg);
+
+/**
+  * @brief     Get the user-configured channel info
+  *
+  * @param     ifx : WiFi interface
+  * @param     primary : store the configured primary channel
+  * @param     second : store the configured second channel
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_wifi_internal_get_config_channel(wifi_interface_t ifx, uint8_t *primary, uint8_t *second);
+
+/**
+  * @brief     Get the negotiated channel info after WiFi connection established
+  *
+  * @param     ifx : WiFi interface
+  * @param     aid : the connection number when a STA connects to the softAP
+  * @param     primary : store the negotiated primary channel
+  * @param     second : store the negotiated second channel
+  * @attention the aid param is only works when the ESP32 in softAP/softAP+STA mode
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_wifi_internal_get_negotiated_channel(wifi_interface_t ifx, uint8_t aid, uint8_t *primary, uint8_t *second);
+
+/**
+  * @brief     Get the negotiated bandwidth info after WiFi connection established
+  *
+  * @param     ifx : WiFi interface
+  * @param     bw : store the negotiated bandwidth
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_wifi_internal_get_negotiated_bandwidth(wifi_interface_t ifx, uint8_t aid, uint8_t *bw);
+
+#if SOC_WIFI_HW_TSF
+/**
+  * @brief     Check if WiFi TSF is active
+  *
+  * @return
+  *    - true: Active
+  *    - false: Not active
+  */
+bool esp_wifi_internal_is_tsf_active(void);
+
+/**
+  * @brief     Update WIFI light sleep wake ahead time
+  *
+  */
+void esp_wifi_internal_update_light_sleep_wake_ahead_time(uint32_t);
+#endif
+
+/**
+ * @brief Wifi power domain power on
+ */
+void esp_wifi_power_domain_on(void);
+
+/**
+ * @brief Wifi power domain power off
+ */
+void esp_wifi_power_domain_off(void);
+
+#if CONFIG_MAC_BB_PD
+/**
+  * @brief     Enable or disable powering down MAC and baseband when Wi-Fi is sleeping.
+  *
+  * @param     enable : enable or disable
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_wifi_internal_set_mac_sleep(bool enable);
+
+/**
+ * @brief mac bb sleep.
+ */
+void pm_mac_sleep(void);
+
+/**
+ * @brief mac bb wakeup.
+ */
+void pm_mac_wakeup(void);
+#endif
+
+/**
+  * @breif    TxDone callback function type. Should be registered using esp_wifi_set_tx_done_cb()
+  *
+  * @param    ifidx The interface id that the tx callback has been triggered from
+  * @param    data Pointer to the data transmitted
+  * @param    data_len Length of the data transmitted
+  * @param    txStatus True:if the data was transmitted sucessfully False: if data transmission failed
+  */
+typedef void (* wifi_tx_done_cb_t)(uint8_t ifidx, uint8_t *data, uint16_t *data_len, bool txStatus);
+
+/**
+  * @brief    Register the txDone callback function of type wifi_tx_done_cb_t
+  *
+  * @param    cb The callback function
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start
+  */
+esp_err_t esp_wifi_set_tx_done_cb(wifi_tx_done_cb_t cb);
+
+/**
+ * @brief     Set device spp amsdu attributes
+ *
+ * @param     ifx: WiFi interface
+ * @param     spp_cap: spp amsdu capable
+ * @param     spp_req: spp amsdu require
+ *
+ * @return
+ *     - ESP_OK: succeed
+ *     - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+ *     - ESP_ERR_WIFI_IF : invalid WiFi interface
+ */
+esp_err_t esp_wifi_internal_set_spp_amsdu(wifi_interface_t ifidx, bool spp_cap, bool spp_req);
+
+/**
+ * @brief   Update WIFI light sleep default parameters
+ *
+ * @param   min_freq_mhz: minimum frequency of DFS
+ * @param   max_freq_mhz: maximum frequency of DFS
+ */
+void esp_wifi_internal_update_light_sleep_default_params(int min_freq_mhz, int max_freq_mhz);
+
+/**
+ * @brief   Set the delay time for wifi to enter the sleep state when light sleep
+ *
+ * @param   return_to_sleep_delay: minimum timeout time  for waiting to receive
+ *                      data, when no data is received during the timeout period,
+ *                      the wifi enters the sleep process.
+ */
+void esp_wifi_set_sleep_delay_time(uint32_t return_to_sleep_delay);
+
+/**
+ * @brief   Set wifi keep alive time
+ *
+ * @param   keep_alive_time: keep alive time
+ */
+void esp_wifi_set_keep_alive_time(uint32_t keep_alive_time);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_WIFI_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/wifi_os_adapter.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/wifi_os_adapter.h
new file mode 100644
index 00000000000..88d0ee54029
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/wifi_os_adapter.h
@@ -0,0 +1,156 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ESP_WIFI_OS_ADAPTER_H_
+#define ESP_WIFI_OS_ADAPTER_H_
+
+#include <stdarg.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_WIFI_OS_ADAPTER_VERSION  0x00000008
+#define ESP_WIFI_OS_ADAPTER_MAGIC    0xDEADBEAF
+
+#define OSI_FUNCS_TIME_BLOCKING      0xffffffff
+
+#define OSI_QUEUE_SEND_FRONT         0
+#define OSI_QUEUE_SEND_BACK          1
+#define OSI_QUEUE_SEND_OVERWRITE     2
+
+typedef struct {
+    int32_t _version;
+    bool (* _env_is_chip)(void);
+    void (*_set_intr)(int32_t cpu_no, uint32_t intr_source, uint32_t intr_num, int32_t intr_prio);
+    void (*_clear_intr)(uint32_t intr_source, uint32_t intr_num);
+    void (*_set_isr)(int32_t n, void *f, void *arg);
+    void (*_ints_on)(uint32_t mask);
+    void (*_ints_off)(uint32_t mask);
+    bool (* _is_from_isr)(void);
+    void *(* _spin_lock_create)(void);
+    void (* _spin_lock_delete)(void *lock);
+    uint32_t (*_wifi_int_disable)(void *wifi_int_mux);
+    void (*_wifi_int_restore)(void *wifi_int_mux, uint32_t tmp);
+    void (*_task_yield_from_isr)(void);
+    void *(*_semphr_create)(uint32_t max, uint32_t init);
+    void (*_semphr_delete)(void *semphr);
+    int32_t (*_semphr_take)(void *semphr, uint32_t block_time_tick);
+    int32_t (*_semphr_give)(void *semphr);
+    void *(*_wifi_thread_semphr_get)(void);
+    void *(*_mutex_create)(void);
+    void *(*_recursive_mutex_create)(void);
+    void (*_mutex_delete)(void *mutex);
+    int32_t (*_mutex_lock)(void *mutex);
+    int32_t (*_mutex_unlock)(void *mutex);
+    void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
+    void (* _queue_delete)(void *queue);
+    int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_tick);
+    int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
+    int32_t (* _queue_send_to_back)(void *queue, void *item, uint32_t block_time_tick);
+    int32_t (* _queue_send_to_front)(void *queue, void *item, uint32_t block_time_tick);
+    int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_tick);
+    uint32_t (* _queue_msg_waiting)(void *queue);
+    void *(* _event_group_create)(void);
+    void (* _event_group_delete)(void *event);
+    uint32_t (* _event_group_set_bits)(void *event, uint32_t bits);
+    uint32_t (* _event_group_clear_bits)(void *event, uint32_t bits);
+    uint32_t (* _event_group_wait_bits)(void *event, uint32_t bits_to_wait_for, int clear_on_exit, int wait_for_all_bits, uint32_t block_time_tick);
+    int32_t (* _task_create_pinned_to_core)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
+    int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle);
+    void (* _task_delete)(void *task_handle);
+    void (* _task_delay)(uint32_t tick);
+    int32_t (* _task_ms_to_tick)(uint32_t ms);
+    void *(* _task_get_current_task)(void);
+    int32_t (* _task_get_max_priority)(void);
+    void *(* _malloc)(unsigned int size);
+    void (* _free)(void *p);
+    int32_t (* _event_post)(const char* event_base, int32_t event_id, void* event_data, size_t event_data_size, uint32_t ticks_to_wait);
+    uint32_t (* _get_free_heap_size)(void);
+    uint32_t (* _rand)(void);
+    void (* _dport_access_stall_other_cpu_start_wrap)(void);
+    void (* _dport_access_stall_other_cpu_end_wrap)(void);
+    void (* _wifi_apb80m_request)(void);
+    void (* _wifi_apb80m_release)(void);
+    void (* _phy_disable)(void);
+    void (* _phy_enable)(void);
+#if CONFIG_IDF_TARGET_ESP32
+    void (* _phy_common_clock_enable)(void);
+    void (* _phy_common_clock_disable)(void);
+#endif
+    int (* _phy_update_country_info)(const char* country);
+    int (* _read_mac)(uint8_t* mac, uint32_t type);
+    void (* _timer_arm)(void *timer, uint32_t tmout, bool repeat);
+    void (* _timer_disarm)(void *timer);
+    void (* _timer_done)(void *ptimer);
+    void (* _timer_setfn)(void *ptimer, void *pfunction, void *parg);
+    void (* _timer_arm_us)(void *ptimer, uint32_t us, bool repeat);
+    void (* _wifi_reset_mac)(void);
+    void (* _wifi_clock_enable)(void);
+    void (* _wifi_clock_disable)(void);
+    void (* _wifi_rtc_enable_iso)(void);
+    void (* _wifi_rtc_disable_iso)(void);
+    int64_t (* _esp_timer_get_time)(void);
+    int (* _nvs_set_i8)(uint32_t handle, const char* key, int8_t value);
+    int (* _nvs_get_i8)(uint32_t handle, const char* key, int8_t* out_value);
+    int (* _nvs_set_u8)(uint32_t handle, const char* key, uint8_t value);
+    int (* _nvs_get_u8)(uint32_t handle, const char* key, uint8_t* out_value);
+    int (* _nvs_set_u16)(uint32_t handle, const char* key, uint16_t value);
+    int (* _nvs_get_u16)(uint32_t handle, const char* key, uint16_t* out_value);
+    int (* _nvs_open)(const char* name, uint32_t open_mode, uint32_t *out_handle);
+    void (* _nvs_close)(uint32_t handle);
+    int (* _nvs_commit)(uint32_t handle);
+    int (* _nvs_set_blob)(uint32_t handle, const char* key, const void* value, size_t length);
+    int (* _nvs_get_blob)(uint32_t handle, const char* key, void* out_value, size_t* length);
+    int (* _nvs_erase_key)(uint32_t handle, const char* key);
+    int (* _get_random)(uint8_t *buf, size_t len);
+    int (* _get_time)(void *t);
+    unsigned long (* _random)(void);
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
+    uint32_t (* _slowclk_cal_get)(void);
+#endif
+    void (* _log_write)(uint32_t level, const char* tag, const char* format, ...);
+    void (* _log_writev)(uint32_t level, const char* tag, const char* format, va_list args);
+    uint32_t (* _log_timestamp)(void);
+    void * (* _malloc_internal)(size_t size);
+    void * (* _realloc_internal)(void *ptr, size_t size);
+    void * (* _calloc_internal)(size_t n, size_t size);
+    void * (* _zalloc_internal)(size_t size);
+    void * (* _wifi_malloc)(size_t size);
+    void * (* _wifi_realloc)(void *ptr, size_t size);
+    void * (* _wifi_calloc)(size_t n, size_t size);
+    void * (* _wifi_zalloc)(size_t size);
+    void * (* _wifi_create_queue)(int queue_len, int item_size);
+    void (* _wifi_delete_queue)(void * queue);
+    int (* _coex_init)(void);
+    void (* _coex_deinit)(void);
+    int (* _coex_enable)(void);
+    void (* _coex_disable)(void);
+    uint32_t (* _coex_status_get)(void);
+    void (* _coex_condition_set)(uint32_t type, bool dissatisfy);
+    int (* _coex_wifi_request)(uint32_t event, uint32_t latency, uint32_t duration);
+    int (* _coex_wifi_release)(uint32_t event);
+    int (* _coex_wifi_channel_set)(uint8_t primary, uint8_t secondary);
+    int (* _coex_event_duration_get)(uint32_t event, uint32_t *duration);
+    int (* _coex_pti_get)(uint32_t event, uint8_t *pti);
+    void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
+    void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
+    int (* _coex_schm_interval_set)(uint32_t interval);
+    uint32_t (* _coex_schm_interval_get)(void);
+    uint8_t (* _coex_schm_curr_period_get)(void);
+    void * (* _coex_schm_curr_phase_get)(void);
+    int (* _coex_schm_curr_phase_idx_set)(int idx);
+    int (* _coex_schm_curr_phase_idx_get)(void);
+    int32_t _magic;
+} wifi_osi_funcs_t;
+
+extern wifi_osi_funcs_t g_wifi_osi_funcs;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ESP_WIFI_OS_ADAPTER_H_ */
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/wifi_types.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/wifi_types.h
new file mode 100644
index 00000000000..4542492c8f1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_private/wifi_types.h
@@ -0,0 +1,54 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _WIFI_TYPES_H
+#define _WIFI_TYPES_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief WiFi ioctl command type
+  *
+  */
+typedef enum {
+    WIFI_IOCTL_SET_STA_HT2040_COEX = 1, /**< Set the configuration of STA's HT2040 coexist management */
+    WIFI_IOCTL_GET_STA_HT2040_COEX,     /**< Get the configuration of STA's HT2040 coexist management */
+    WIFI_IOCTL_MAX,
+} wifi_ioctl_cmd_t;
+
+/**
+ * @brief Configuration for STA's HT2040 coexist management
+ *
+ */
+typedef struct {
+    int enable;                         /**< Indicate whether STA's HT2040 coexist management is enabled or not */
+} wifi_ht2040_coex_t;
+
+/**
+  * @brief Configuration for WiFi ioctl
+  *
+  */
+typedef struct {
+    union {
+        wifi_ht2040_coex_t ht2040_coex; /**< Configuration of STA's HT2040 coexist management */
+    } data;                             /**< Configuration of ioctl command */
+} wifi_ioctl_config_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_smartconfig.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_smartconfig.h
new file mode 100644
index 00000000000..b70d0c401af
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_smartconfig.h
@@ -0,0 +1,163 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_SMARTCONFIG_H__
+#define __ESP_SMARTCONFIG_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_event_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    SC_TYPE_ESPTOUCH = 0,       /**< protocol: ESPTouch */
+    SC_TYPE_AIRKISS,            /**< protocol: AirKiss */
+    SC_TYPE_ESPTOUCH_AIRKISS,   /**< protocol: ESPTouch and AirKiss */
+    SC_TYPE_ESPTOUCH_V2,        /**< protocol: ESPTouch v2*/
+} smartconfig_type_t;
+
+/** Smartconfig event declarations */
+typedef enum {
+    SC_EVENT_SCAN_DONE,                /*!< ESP32 station smartconfig has finished to scan for APs */
+    SC_EVENT_FOUND_CHANNEL,            /*!< ESP32 station smartconfig has found the channel of the target AP */
+    SC_EVENT_GOT_SSID_PSWD,            /*!< ESP32 station smartconfig got the SSID and password */
+    SC_EVENT_SEND_ACK_DONE,            /*!< ESP32 station smartconfig has sent ACK to cellphone */
+} smartconfig_event_t;
+
+/** @brief smartconfig event base declaration */
+ESP_EVENT_DECLARE_BASE(SC_EVENT);
+
+/** Argument structure for SC_EVENT_GOT_SSID_PSWD event */
+typedef struct {
+    uint8_t ssid[32];           /**< SSID of the AP. Null terminated string. */
+    uint8_t password[64];       /**< Password of the AP. Null terminated string. */
+    bool bssid_set;             /**< whether set MAC address of target AP or not. */
+    uint8_t bssid[6];           /**< MAC address of target AP. */
+    smartconfig_type_t type;    /**< Type of smartconfig(ESPTouch or AirKiss). */
+    uint8_t token;              /**< Token from cellphone which is used to send ACK to cellphone. */
+    uint8_t cellphone_ip[4];    /**< IP address of cellphone. */
+} smartconfig_event_got_ssid_pswd_t;
+
+/** Configure structure for esp_smartconfig_start */
+typedef struct {
+    bool enable_log;                /**< Enable smartconfig logs. */
+    bool esp_touch_v2_enable_crypt; /**< Enable ESPTouch v2 crypt. */
+    char *esp_touch_v2_key;         /**< ESPTouch v2 crypt key, len should be 16. */
+} smartconfig_start_config_t;
+
+#define SMARTCONFIG_START_CONFIG_DEFAULT() { \
+    .enable_log = false, \
+    .esp_touch_v2_enable_crypt = false,\
+    .esp_touch_v2_key = NULL \
+};
+
+/**
+  * @brief  Get the version of SmartConfig.
+  *
+  * @return
+  *     - SmartConfig version const char.
+  */
+const char *esp_smartconfig_get_version(void);
+
+/**
+  * @brief     Start SmartConfig, config ESP device to connect AP. You need to broadcast information by phone APP.
+  *            Device sniffer special packets from the air that containing SSID and password of target AP.
+  *
+  * @attention 1. This API can be called in station or softAP-station mode.
+  * @attention 2. Can not call esp_smartconfig_start twice before it finish, please call
+  *               esp_smartconfig_stop first.
+  *
+  * @param     config pointer to smartconfig start configure structure
+  *
+  * @return
+  *     - ESP_OK: succeed
+  *     - others: fail
+  */
+esp_err_t esp_smartconfig_start(const smartconfig_start_config_t *config);
+
+/**
+  * @brief     Stop SmartConfig, free the buffer taken by esp_smartconfig_start.
+  *
+  * @attention Whether connect to AP succeed or not, this API should be called to free
+  *            memory taken by smartconfig_start.
+  *
+  * @return
+  *     - ESP_OK: succeed
+  *     - others: fail
+  */
+esp_err_t esp_smartconfig_stop(void);
+
+/**
+  * @brief     Set timeout of SmartConfig process.
+  *
+  * @attention Timing starts from SC_STATUS_FIND_CHANNEL status. SmartConfig will restart if timeout.
+  *
+  * @param     time_s  range 15s~255s, offset:45s.
+  *
+  * @return
+  *     - ESP_OK: succeed
+  *     - others: fail
+  */
+esp_err_t esp_esptouch_set_timeout(uint8_t time_s);
+
+/**
+  * @brief     Set protocol type of SmartConfig.
+  *
+  * @attention If users need to set the SmartConfig type, please set it before calling
+  *            esp_smartconfig_start.
+  *
+  * @param     type  Choose from the smartconfig_type_t.
+  *
+  * @return
+  *     - ESP_OK: succeed
+  *     - others: fail
+  */
+esp_err_t esp_smartconfig_set_type(smartconfig_type_t type);
+
+/**
+  * @brief     Set mode of SmartConfig. default normal mode.
+  *
+  * @attention 1. Please call it before API esp_smartconfig_start.
+  * @attention 2. Fast mode have corresponding APP(phone).
+  * @attention 3. Two mode is compatible.
+  *
+  * @param     enable  false-disable(default); true-enable;
+  *
+  * @return
+  *     - ESP_OK: succeed
+  *     - others: fail
+  */
+esp_err_t esp_smartconfig_fast_mode(bool enable);
+
+/**
+  * @brief     Get reserved data of ESPTouch v2.
+  *
+  * @param     rvd_data  reserved  data
+  * @param     len length  of  reserved data
+  *
+  * @return
+  *     - ESP_OK: succeed
+  *     - others: fail
+  */
+esp_err_t esp_smartconfig_get_rvd_data(uint8_t *rvd_data, uint8_t len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi.h
new file mode 100644
index 00000000000..bcd10c77a10
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi.h
@@ -0,0 +1,1302 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+/*               Notes about WiFi Programming
+ *
+ *  The esp32 WiFi programming model can be depicted as following picture:
+ *
+ *
+ *                            default handler              user handler
+ *  -------------             ---------------             ---------------
+ *  |           |   event     |             | callback or |             |
+ *  |   tcpip   | --------->  |    event    | ----------> | application |
+ *  |   stack   |             |     task    |  event      |    task     |
+ *  |-----------|             |-------------|             |-------------|
+ *                                  /|\                          |
+ *                                   |                           |
+ *                            event  |                           |
+ *                                   |                           |
+ *                                   |                           |
+ *                             ---------------                   |
+ *                             |             |                   |
+ *                             | WiFi Driver |/__________________|
+ *                             |             |\     API call
+ *                             |             |
+ *                             |-------------|
+ *
+ * The WiFi driver can be consider as black box, it knows nothing about the high layer code, such as
+ * TCPIP stack, application task, event task etc, all it can do is to receive API call from high layer
+ * or post event queue to a specified Queue, which is initialized by API esp_wifi_init().
+ *
+ * The event task is a daemon task, which receives events from WiFi driver or from other subsystem, such
+ * as TCPIP stack, event task will call the default callback function on receiving the event. For example,
+ * on receiving event SYSTEM_EVENT_STA_CONNECTED, it will call tcpip_adapter_start() to start the DHCP
+ * client in it's default handler.
+ *
+ * Application can register it's own event callback function by API esp_event_init, then the application callback
+ * function will be called after the default callback. Also, if application doesn't want to execute the callback
+ * in the event task, what it needs to do is to post the related event to application task in the application callback function.
+ *
+ * The application task (code) generally mixes all these thing together, it calls APIs to init the system/WiFi and
+ * handle the events when necessary.
+ *
+ */
+
+#ifndef __ESP_WIFI_H__
+#define __ESP_WIFI_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_wifi_types.h"
+#include "esp_event.h"
+#include "esp_private/esp_wifi_private.h"
+#include "esp_wifi_default.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_ERR_WIFI_NOT_INIT    (ESP_ERR_WIFI_BASE + 1)   /*!< WiFi driver was not installed by esp_wifi_init */
+#define ESP_ERR_WIFI_NOT_STARTED (ESP_ERR_WIFI_BASE + 2)   /*!< WiFi driver was not started by esp_wifi_start */
+#define ESP_ERR_WIFI_NOT_STOPPED (ESP_ERR_WIFI_BASE + 3)   /*!< WiFi driver was not stopped by esp_wifi_stop */
+#define ESP_ERR_WIFI_IF          (ESP_ERR_WIFI_BASE + 4)   /*!< WiFi interface error */
+#define ESP_ERR_WIFI_MODE        (ESP_ERR_WIFI_BASE + 5)   /*!< WiFi mode error */
+#define ESP_ERR_WIFI_STATE       (ESP_ERR_WIFI_BASE + 6)   /*!< WiFi internal state error */
+#define ESP_ERR_WIFI_CONN        (ESP_ERR_WIFI_BASE + 7)   /*!< WiFi internal control block of station or soft-AP error */
+#define ESP_ERR_WIFI_NVS         (ESP_ERR_WIFI_BASE + 8)   /*!< WiFi internal NVS module error */
+#define ESP_ERR_WIFI_MAC         (ESP_ERR_WIFI_BASE + 9)   /*!< MAC address is invalid */
+#define ESP_ERR_WIFI_SSID        (ESP_ERR_WIFI_BASE + 10)   /*!< SSID is invalid */
+#define ESP_ERR_WIFI_PASSWORD    (ESP_ERR_WIFI_BASE + 11)  /*!< Password is invalid */
+#define ESP_ERR_WIFI_TIMEOUT     (ESP_ERR_WIFI_BASE + 12)  /*!< Timeout error */
+#define ESP_ERR_WIFI_WAKE_FAIL   (ESP_ERR_WIFI_BASE + 13)  /*!< WiFi is in sleep state(RF closed) and wakeup fail */
+#define ESP_ERR_WIFI_WOULD_BLOCK (ESP_ERR_WIFI_BASE + 14)  /*!< The caller would block */
+#define ESP_ERR_WIFI_NOT_CONNECT (ESP_ERR_WIFI_BASE + 15)  /*!< Station still in disconnect status */
+
+#define ESP_ERR_WIFI_POST        (ESP_ERR_WIFI_BASE + 18)  /*!< Failed to post the event to WiFi task */
+#define ESP_ERR_WIFI_INIT_STATE  (ESP_ERR_WIFI_BASE + 19)  /*!< Invalid WiFi state when init/deinit is called */
+#define ESP_ERR_WIFI_STOP_STATE  (ESP_ERR_WIFI_BASE + 20)  /*!< Returned when WiFi is stopping */
+#define ESP_ERR_WIFI_NOT_ASSOC   (ESP_ERR_WIFI_BASE + 21)  /*!< The WiFi connection is not associated */
+#define ESP_ERR_WIFI_TX_DISALLOW (ESP_ERR_WIFI_BASE + 22)  /*!< The WiFi TX is disallowed */
+
+/**
+ * @brief WiFi stack configuration parameters passed to esp_wifi_init call.
+ */
+typedef struct {
+    system_event_handler_t event_handler;          /**< WiFi event handler */
+    wifi_osi_funcs_t*      osi_funcs;              /**< WiFi OS functions */
+    wpa_crypto_funcs_t     wpa_crypto_funcs;       /**< WiFi station crypto functions when connect */
+    int                    static_rx_buf_num;      /**< WiFi static RX buffer number */
+    int                    dynamic_rx_buf_num;     /**< WiFi dynamic RX buffer number */
+    int                    tx_buf_type;            /**< WiFi TX buffer type */
+    int                    static_tx_buf_num;      /**< WiFi static TX buffer number */
+    int                    dynamic_tx_buf_num;     /**< WiFi dynamic TX buffer number */
+    int                    cache_tx_buf_num;       /**< WiFi TX cache buffer number */
+    int                    csi_enable;             /**< WiFi channel state information enable flag */
+    int                    ampdu_rx_enable;        /**< WiFi AMPDU RX feature enable flag */
+    int                    ampdu_tx_enable;        /**< WiFi AMPDU TX feature enable flag */
+    int                    amsdu_tx_enable;        /**< WiFi AMSDU TX feature enable flag */
+    int                    nvs_enable;             /**< WiFi NVS flash enable flag */
+    int                    nano_enable;            /**< Nano option for printf/scan family enable flag */
+    int                    rx_ba_win;              /**< WiFi Block Ack RX window size */
+    int                    wifi_task_core_id;      /**< WiFi Task Core ID */
+    int                    beacon_max_len;         /**< WiFi softAP maximum length of the beacon */
+    int                    mgmt_sbuf_num;          /**< WiFi management short buffer number, the minimum value is 6, the maximum value is 32 */
+    uint64_t               feature_caps;           /**< Enables additional WiFi features and capabilities */
+    bool                   sta_disconnected_pm;    /**< WiFi Power Management for station at disconnected status */
+    int                    magic;                  /**< WiFi init magic number, it should be the last field */
+} wifi_init_config_t;
+
+#ifdef CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM
+#define WIFI_STATIC_TX_BUFFER_NUM CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM
+#else
+#define WIFI_STATIC_TX_BUFFER_NUM 0
+#endif
+
+#if (CONFIG_ESP32_SPIRAM_SUPPORT || CONFIG_ESP32S2_SPIRAM_SUPPORT || CONFIG_ESP32S3_SPIRAM_SUPPORT)
+#define WIFI_CACHE_TX_BUFFER_NUM  CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM
+#else
+#define WIFI_CACHE_TX_BUFFER_NUM  0
+#endif
+
+#ifdef CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM
+#define WIFI_DYNAMIC_TX_BUFFER_NUM CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM
+#else
+#define WIFI_DYNAMIC_TX_BUFFER_NUM 0
+#endif
+
+#if CONFIG_ESP32_WIFI_CSI_ENABLED
+#define WIFI_CSI_ENABLED         1
+#else
+#define WIFI_CSI_ENABLED         0
+#endif
+
+#if CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED
+#define WIFI_AMPDU_RX_ENABLED        1
+#else
+#define WIFI_AMPDU_RX_ENABLED        0
+#endif
+
+#if CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED
+#define WIFI_AMPDU_TX_ENABLED        1
+#else
+#define WIFI_AMPDU_TX_ENABLED        0
+#endif
+
+#if CONFIG_ESP32_WIFI_AMSDU_TX_ENABLED
+#define WIFI_AMSDU_TX_ENABLED        1
+#else
+#define WIFI_AMSDU_TX_ENABLED        0
+#endif
+
+#if CONFIG_ESP32_WIFI_NVS_ENABLED
+#define WIFI_NVS_ENABLED          1
+#else
+#define WIFI_NVS_ENABLED          0
+#endif
+
+#if CONFIG_NEWLIB_NANO_FORMAT
+#define WIFI_NANO_FORMAT_ENABLED  1
+#else
+#define WIFI_NANO_FORMAT_ENABLED  0
+#endif
+
+extern const wpa_crypto_funcs_t g_wifi_default_wpa_crypto_funcs;
+extern uint64_t g_wifi_feature_caps;
+
+#define WIFI_INIT_CONFIG_MAGIC    0x1F2F3F4F
+
+#ifdef CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED
+#define WIFI_DEFAULT_RX_BA_WIN CONFIG_ESP32_WIFI_RX_BA_WIN
+#else
+#define WIFI_DEFAULT_RX_BA_WIN 0 /* unused if ampdu_rx_enable == false */
+#endif
+
+#if CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1
+#define WIFI_TASK_CORE_ID 1
+#else
+#define WIFI_TASK_CORE_ID 0
+#endif
+
+#ifdef CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN
+#define WIFI_SOFTAP_BEACON_MAX_LEN CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN
+#else
+#define WIFI_SOFTAP_BEACON_MAX_LEN 752
+#endif
+
+#ifdef CONFIG_ESP32_WIFI_MGMT_SBUF_NUM
+#define WIFI_MGMT_SBUF_NUM CONFIG_ESP32_WIFI_MGMT_SBUF_NUM
+#else
+#define WIFI_MGMT_SBUF_NUM 32
+#endif
+
+#if CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE
+#define WIFI_STA_DISCONNECTED_PM_ENABLED true
+#else
+#define WIFI_STA_DISCONNECTED_PM_ENABLED false
+#endif
+
+#define CONFIG_FEATURE_WPA3_SAE_BIT     (1<<0)
+#define CONFIG_FEATURE_CACHE_TX_BUF_BIT (1<<1)
+#define CONFIG_FEATURE_FTM_INITIATOR_BIT (1<<2)
+#define CONFIG_FEATURE_FTM_RESPONDER_BIT (1<<3)
+
+#define WIFI_INIT_CONFIG_DEFAULT() { \
+    .event_handler = &esp_event_send_internal, \
+    .osi_funcs = &g_wifi_osi_funcs, \
+    .wpa_crypto_funcs = g_wifi_default_wpa_crypto_funcs, \
+    .static_rx_buf_num = CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM,\
+    .dynamic_rx_buf_num = CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM,\
+    .tx_buf_type = CONFIG_ESP32_WIFI_TX_BUFFER_TYPE,\
+    .static_tx_buf_num = WIFI_STATIC_TX_BUFFER_NUM,\
+    .dynamic_tx_buf_num = WIFI_DYNAMIC_TX_BUFFER_NUM,\
+    .cache_tx_buf_num = WIFI_CACHE_TX_BUFFER_NUM,\
+    .csi_enable = WIFI_CSI_ENABLED,\
+    .ampdu_rx_enable = WIFI_AMPDU_RX_ENABLED,\
+    .ampdu_tx_enable = WIFI_AMPDU_TX_ENABLED,\
+    .amsdu_tx_enable = WIFI_AMSDU_TX_ENABLED,\
+    .nvs_enable = WIFI_NVS_ENABLED,\
+    .nano_enable = WIFI_NANO_FORMAT_ENABLED,\
+    .rx_ba_win = WIFI_DEFAULT_RX_BA_WIN,\
+    .wifi_task_core_id = WIFI_TASK_CORE_ID,\
+    .beacon_max_len = WIFI_SOFTAP_BEACON_MAX_LEN, \
+    .mgmt_sbuf_num = WIFI_MGMT_SBUF_NUM, \
+    .feature_caps = g_wifi_feature_caps, \
+    .sta_disconnected_pm = WIFI_STA_DISCONNECTED_PM_ENABLED,  \
+    .magic = WIFI_INIT_CONFIG_MAGIC\
+}
+
+/**
+  * @brief  Initialize WiFi
+  *         Allocate resource for WiFi driver, such as WiFi control structure, RX/TX buffer,
+  *         WiFi NVS structure etc. This WiFi also starts WiFi task
+  *
+  * @attention 1. This API must be called before all other WiFi API can be called
+  * @attention 2. Always use WIFI_INIT_CONFIG_DEFAULT macro to initialize the configuration to default values, this can
+  *               guarantee all the fields get correct value when more fields are added into wifi_init_config_t
+  *               in future release. If you want to set your own initial values, overwrite the default values
+  *               which are set by WIFI_INIT_CONFIG_DEFAULT. Please be notified that the field 'magic' of
+  *               wifi_init_config_t should always be WIFI_INIT_CONFIG_MAGIC!
+  *
+  * @param  config pointer to WiFi initialized configuration structure; can point to a temporary variable.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_NO_MEM: out of memory
+  *    - others: refer to error code esp_err.h
+  */
+esp_err_t esp_wifi_init(const wifi_init_config_t *config);
+
+/**
+  * @brief  Deinit WiFi
+  *         Free all resource allocated in esp_wifi_init and stop WiFi task
+  *
+  * @attention 1. This API should be called if you want to remove WiFi driver from the system
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  */
+esp_err_t esp_wifi_deinit(void);
+
+/**
+  * @brief     Set the WiFi operating mode
+  *
+  *            Set the WiFi operating mode as station, soft-AP or station+soft-AP,
+  *            The default mode is station mode.
+  *
+  * @param     mode  WiFi operating mode
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - others: refer to error code in esp_err.h
+  */
+esp_err_t esp_wifi_set_mode(wifi_mode_t mode);
+
+/**
+  * @brief  Get current operating mode of WiFi
+  *
+  * @param[out]  mode  store current WiFi mode
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_get_mode(wifi_mode_t *mode);
+
+/**
+  * @brief  Start WiFi according to current configuration
+  *         If mode is WIFI_MODE_STA, it create station control block and start station
+  *         If mode is WIFI_MODE_AP, it create soft-AP control block and start soft-AP
+  *         If mode is WIFI_MODE_APSTA, it create soft-AP and station control block and start soft-AP and station
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - ESP_ERR_NO_MEM: out of memory
+  *    - ESP_ERR_WIFI_CONN: WiFi internal error, station or soft-AP control block wrong
+  *    - ESP_FAIL: other WiFi internal errors
+  */
+esp_err_t esp_wifi_start(void);
+
+/**
+  * @brief  Stop WiFi
+  *         If mode is WIFI_MODE_STA, it stop station and free station control block
+  *         If mode is WIFI_MODE_AP, it stop soft-AP and free soft-AP control block
+  *         If mode is WIFI_MODE_APSTA, it stop station/soft-AP and free station/soft-AP control block
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  */
+esp_err_t esp_wifi_stop(void);
+
+/**
+ * @brief  Restore WiFi stack persistent settings to default values
+ *
+ * This function will reset settings made using the following APIs:
+ * - esp_wifi_set_bandwidth,
+ * - esp_wifi_set_protocol,
+ * - esp_wifi_set_config related
+ * - esp_wifi_set_mode
+ *
+ * @return
+ *    - ESP_OK: succeed
+ *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+ */
+esp_err_t esp_wifi_restore(void);
+
+/**
+  * @brief     Connect the ESP32 WiFi station to the AP.
+  *
+  * @attention 1. This API only impact WIFI_MODE_STA or WIFI_MODE_APSTA mode
+  * @attention 2. If the ESP32 is connected to an AP, call esp_wifi_disconnect to disconnect.
+  * @attention 3. The scanning triggered by esp_wifi_start_scan() will not be effective until connection between ESP32 and the AP is established.
+  *               If ESP32 is scanning and connecting at the same time, ESP32 will abort scanning and return a warning message and error
+  *               number ESP_ERR_WIFI_STATE.
+  *               If you want to do reconnection after ESP32 received disconnect event, remember to add the maximum retry time, otherwise the called
+  *               scan will not work. This is especially true when the AP doesn't exist, and you still try reconnection after ESP32 received disconnect
+  *               event with the reason code WIFI_REASON_NO_AP_FOUND.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_CONN: WiFi internal error, station or soft-AP control block wrong
+  *    - ESP_ERR_WIFI_SSID: SSID of AP which station connects is invalid
+  */
+esp_err_t esp_wifi_connect(void);
+
+/**
+  * @brief     Disconnect the ESP32 WiFi station from the AP.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi was not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_STARTED: WiFi was not started by esp_wifi_start
+  *    - ESP_FAIL: other WiFi internal errors
+  */
+esp_err_t esp_wifi_disconnect(void);
+
+/**
+  * @brief     Currently this API is just an stub API
+  *
+
+  * @return
+  *    - ESP_OK: succeed
+  *    - others: fail
+  */
+esp_err_t esp_wifi_clear_fast_connect(void);
+
+/**
+  * @brief     deauthenticate all stations or associated id equals to aid
+  *
+  * @param     aid  when aid is 0, deauthenticate all stations, otherwise deauthenticate station whose associated id is aid
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_STARTED: WiFi was not started by esp_wifi_start
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - ESP_ERR_WIFI_MODE: WiFi mode is wrong
+  */
+esp_err_t esp_wifi_deauth_sta(uint16_t aid);
+
+/**
+  * @brief     Scan all available APs.
+  *
+  * @attention If this API is called, the found APs are stored in WiFi driver dynamic allocated memory and the
+  *            will be freed in esp_wifi_scan_get_ap_records, so generally, call esp_wifi_scan_get_ap_records to cause
+  *            the memory to be freed once the scan is done
+  * @attention The values of maximum active scan time and passive scan time per channel are limited to 1500 milliseconds.
+  *            Values above 1500ms may cause station to disconnect from AP and are not recommended.
+  *
+  * @param     config  configuration of scanning
+  * @param     block if block is true, this API will block the caller until the scan is done, otherwise
+  *                         it will return immediately
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_STARTED: WiFi was not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_TIMEOUT: blocking scan is timeout
+  *    - ESP_ERR_WIFI_STATE: wifi still connecting when invoke esp_wifi_scan_start
+  *    - others: refer to error code in esp_err.h
+  */
+esp_err_t esp_wifi_scan_start(const wifi_scan_config_t *config, bool block);
+
+/**
+  * @brief     Stop the scan in process
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start
+  */
+esp_err_t esp_wifi_scan_stop(void);
+
+/**
+  * @brief     Get number of APs found in last scan
+  *
+  * @param[out] number  store number of APIs found in last scan
+  *
+  * @attention This API can only be called when the scan is completed, otherwise it may get wrong value.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_scan_get_ap_num(uint16_t *number);
+
+/**
+  * @brief     Get AP list found in last scan
+  *
+  * @param[inout]  number As input param, it stores max AP number ap_records can hold.
+  *                As output param, it receives the actual AP number this API returns.
+  * @param         ap_records  wifi_ap_record_t array to hold the found APs
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - ESP_ERR_NO_MEM: out of memory
+  */
+esp_err_t esp_wifi_scan_get_ap_records(uint16_t *number, wifi_ap_record_t *ap_records);
+
+
+/**
+  * @brief     Get information of AP which the ESP32 station is associated with
+  *
+  * @attention When the obtained country information is empty, it means that the AP does not carry country information
+  *
+  * @param     ap_info  the wifi_ap_record_t to hold AP information
+  *            sta can get the connected ap's phy mode info through the struct member
+  *            phy_11b，phy_11g，phy_11n，phy_lr in the wifi_ap_record_t struct.
+  *            For example, phy_11b = 1 imply that ap support 802.11b mode
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_CONN: The station interface don't initialized
+  *    - ESP_ERR_WIFI_NOT_CONNECT: The station is in disconnect status
+  */
+esp_err_t esp_wifi_sta_get_ap_info(wifi_ap_record_t *ap_info);
+
+/**
+  * @brief     Set current WiFi power save type
+  *
+  * @attention Default power save type is WIFI_PS_MIN_MODEM.
+  *
+  * @param     type  power save type
+  *
+  * @return    ESP_OK: succeed
+  */
+esp_err_t esp_wifi_set_ps(wifi_ps_type_t type);
+
+/**
+  * @brief     Get current WiFi power save type
+  *
+  * @attention Default power save type is WIFI_PS_MIN_MODEM.
+  *
+  * @param[out]  type: store current power save type
+  *
+  * @return    ESP_OK: succeed
+  */
+esp_err_t esp_wifi_get_ps(wifi_ps_type_t *type);
+
+/**
+  * @brief     Set protocol type of specified interface
+  *            The default protocol is (WIFI_PROTOCOL_11B|WIFI_PROTOCOL_11G|WIFI_PROTOCOL_11N)
+  *
+  * @attention Currently we only support 802.11b or 802.11bg or 802.11bgn mode
+  *
+  * @param     ifx  interfaces
+  * @param     protocol_bitmap  WiFi protocol bitmap
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_IF: invalid interface
+  *    - others: refer to error codes in esp_err.h
+  */
+esp_err_t esp_wifi_set_protocol(wifi_interface_t ifx, uint8_t protocol_bitmap);
+
+/**
+  * @brief     Get the current protocol bitmap of the specified interface
+  *
+  * @param     ifx  interface
+  * @param[out] protocol_bitmap  store current WiFi protocol bitmap of interface ifx
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_IF: invalid interface
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - others: refer to error codes in esp_err.h
+  */
+esp_err_t esp_wifi_get_protocol(wifi_interface_t ifx, uint8_t *protocol_bitmap);
+
+/**
+  * @brief     Set the bandwidth of ESP32 specified interface
+  *
+  * @attention 1. API return false if try to configure an interface that is not enabled
+  * @attention 2. WIFI_BW_HT40 is supported only when the interface support 11N
+  *
+  * @param     ifx  interface to be configured
+  * @param     bw  bandwidth
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_IF: invalid interface
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - others: refer to error codes in esp_err.h
+  */
+esp_err_t esp_wifi_set_bandwidth(wifi_interface_t ifx, wifi_bandwidth_t bw);
+
+/**
+  * @brief     Get the bandwidth of ESP32 specified interface
+  *
+  * @attention 1. API return false if try to get a interface that is not enable
+  *
+  * @param     ifx interface to be configured
+  * @param[out] bw  store bandwidth of interface ifx
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_IF: invalid interface
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_get_bandwidth(wifi_interface_t ifx, wifi_bandwidth_t *bw);
+
+/**
+  * @brief     Set primary/secondary channel of ESP32
+  *
+  * @attention 1. This API should be called after esp_wifi_start()
+  * @attention 2. When ESP32 is in STA mode, this API should not be called when STA is scanning or connecting to an external AP
+  * @attention 3. When ESP32 is in softAP mode, this API should not be called when softAP has connected to external STAs
+  * @attention 4. When ESP32 is in STA+softAP mode, this API should not be called when in the scenarios described above
+  *
+  * @param     primary  for HT20, primary is the channel number, for HT40, primary is the primary channel
+  * @param     second   for HT20, second is ignored, for HT40, second is the second channel
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_IF: invalid interface
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_set_channel(uint8_t primary, wifi_second_chan_t second);
+
+/**
+  * @brief     Get the primary/secondary channel of ESP32
+  *
+  * @attention 1. API return false if try to get a interface that is not enable
+  *
+  * @param     primary   store current primary channel
+  * @param[out]  second  store current second channel
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_get_channel(uint8_t *primary, wifi_second_chan_t *second);
+
+/**
+  * @brief     configure country info
+  *
+  * @attention 1. It is discouraged to call this API since this doesn't validate the per-country rules,
+  *               it's up to the user to fill in all fields according to local regulations.
+  *               Please use esp_wifi_set_country_code instead.
+  * @attention 2. The default country is CHINA {.cc="CN", .schan=1, .nchan=13, policy=WIFI_COUNTRY_POLICY_AUTO}
+  * @attention 3. When the country policy is WIFI_COUNTRY_POLICY_AUTO, the country info of the AP to which
+  *               the station is connected is used. E.g. if the configured country info is {.cc="USA", .schan=1, .nchan=11}
+  *               and the country info of the AP to which the station is connected is {.cc="JP", .schan=1, .nchan=14}
+  *               then the country info that will be used is {.cc="JP", .schan=1, .nchan=14}. If the station disconnected
+  *               from the AP the country info is set back to the country info of the station automatically,
+  *               {.cc="US", .schan=1, .nchan=11} in the example.
+  * @attention 4. When the country policy is WIFI_COUNTRY_POLICY_MANUAL, then the configured country info is used always.
+  * @attention 5. When the country info is changed because of configuration or because the station connects to a different
+  *               external AP, the country IE in probe response/beacon of the soft-AP is also changed.
+  * @attention 6. The country configuration is stored into flash.
+  * @attention 7. When this API is called, the PHY init data will switch to the PHY init data type corresponding to the
+  *               country info.
+  *
+  * @param     country   the configured country info
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_set_country(const wifi_country_t *country);
+
+/**
+  * @brief     get the current country info
+  *
+  * @param     country  country info
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_get_country(wifi_country_t *country);
+
+
+/**
+  * @brief     Set MAC address of the ESP32 WiFi station or the soft-AP interface.
+  *
+  * @attention 1. This API can only be called when the interface is disabled
+  * @attention 2. ESP32 soft-AP and station have different MAC addresses, do not set them to be the same.
+  * @attention 3. The bit 0 of the first byte of ESP32 MAC address can not be 1. For example, the MAC address
+  *      can set to be "1a:XX:XX:XX:XX:XX", but can not be "15:XX:XX:XX:XX:XX".
+  *
+  * @param     ifx  interface
+  * @param     mac  the MAC address
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - ESP_ERR_WIFI_IF: invalid interface
+  *    - ESP_ERR_WIFI_MAC: invalid mac address
+  *    - ESP_ERR_WIFI_MODE: WiFi mode is wrong
+  *    - others: refer to error codes in esp_err.h
+  */
+esp_err_t esp_wifi_set_mac(wifi_interface_t ifx, const uint8_t mac[6]);
+
+/**
+  * @brief     Get mac of specified interface
+  *
+  * @param      ifx  interface
+  * @param[out] mac  store mac of the interface ifx
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - ESP_ERR_WIFI_IF: invalid interface
+  */
+esp_err_t esp_wifi_get_mac(wifi_interface_t ifx, uint8_t mac[6]);
+
+/**
+  * @brief The RX callback function in the promiscuous mode.
+  *        Each time a packet is received, the callback function will be called.
+  *
+  * @param buf  Data received. Type of data in buffer (wifi_promiscuous_pkt_t or wifi_pkt_rx_ctrl_t) indicated by 'type' parameter.
+  * @param type  promiscuous packet type.
+  *
+  */
+typedef void (* wifi_promiscuous_cb_t)(void *buf, wifi_promiscuous_pkt_type_t type);
+
+/**
+  * @brief Register the RX callback function in the promiscuous mode.
+  *
+  * Each time a packet is received, the registered callback function will be called.
+  *
+  * @param cb  callback
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  */
+esp_err_t esp_wifi_set_promiscuous_rx_cb(wifi_promiscuous_cb_t cb);
+
+/**
+  * @brief     Enable the promiscuous mode.
+  *
+  * @param     en  false - disable, true - enable
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  */
+esp_err_t esp_wifi_set_promiscuous(bool en);
+
+/**
+  * @brief     Get the promiscuous mode.
+  *
+  * @param[out] en  store the current status of promiscuous mode
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_get_promiscuous(bool *en);
+
+/**
+  * @brief Enable the promiscuous mode packet type filter.
+  *
+  * @note The default filter is to filter all packets except WIFI_PKT_MISC
+  *
+  * @param filter the packet type filtered in promiscuous mode.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  */
+esp_err_t esp_wifi_set_promiscuous_filter(const wifi_promiscuous_filter_t *filter);
+
+/**
+  * @brief     Get the promiscuous filter.
+  *
+  * @param[out] filter  store the current status of promiscuous filter
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_get_promiscuous_filter(wifi_promiscuous_filter_t *filter);
+
+/**
+  * @brief Enable subtype filter of the control packet in promiscuous mode.
+  *
+  * @note The default filter is to filter none control packet.
+  *
+  * @param filter the subtype of the control packet filtered in promiscuous mode.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  */
+esp_err_t esp_wifi_set_promiscuous_ctrl_filter(const wifi_promiscuous_filter_t *filter);
+
+/**
+  * @brief     Get the subtype filter of the control packet in promiscuous mode.
+  *
+  * @param[out] filter  store the current status of subtype filter of the control packet in promiscuous mode
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_ARG: invalid argument
+  */
+esp_err_t esp_wifi_get_promiscuous_ctrl_filter(wifi_promiscuous_filter_t *filter);
+
+/**
+  * @brief     Set the configuration of the ESP32 STA or AP
+  *
+  * @attention 1. This API can be called only when specified interface is enabled, otherwise, API fail
+  * @attention 2. For station configuration, bssid_set needs to be 0; and it needs to be 1 only when users need to check the MAC address of the AP.
+  * @attention 3. ESP32 is limited to only one channel, so when in the soft-AP+station mode, the soft-AP will adjust its channel automatically to be the same as
+  *               the channel of the ESP32 station.
+  *
+  * @param     interface  interface
+  * @param     conf  station or soft-AP configuration
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - ESP_ERR_WIFI_IF: invalid interface
+  *    - ESP_ERR_WIFI_MODE: invalid mode
+  *    - ESP_ERR_WIFI_PASSWORD: invalid password
+  *    - ESP_ERR_WIFI_NVS: WiFi internal NVS error
+  *    - others: refer to the erro code in esp_err.h
+  */
+esp_err_t esp_wifi_set_config(wifi_interface_t interface, wifi_config_t *conf);
+
+/**
+  * @brief     Get configuration of specified interface
+  *
+  * @param     interface  interface
+  * @param[out]  conf  station or soft-AP configuration
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - ESP_ERR_WIFI_IF: invalid interface
+  */
+esp_err_t esp_wifi_get_config(wifi_interface_t interface, wifi_config_t *conf);
+
+/**
+  * @brief     Get STAs associated with soft-AP
+  *
+  * @attention SSC only API
+  *
+  * @param[out] sta  station list
+  *             ap can get the connected sta's phy mode info through the struct member
+  *             phy_11b，phy_11g，phy_11n，phy_lr in the wifi_sta_info_t struct.
+  *             For example, phy_11b = 1 imply that sta support 802.11b mode
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - ESP_ERR_WIFI_MODE: WiFi mode is wrong
+  *    - ESP_ERR_WIFI_CONN: WiFi internal error, the station/soft-AP control block is invalid
+  */
+esp_err_t esp_wifi_ap_get_sta_list(wifi_sta_list_t *sta);
+
+/**
+  * @brief     Get AID of STA connected with soft-AP
+  *
+  * @param     mac  STA's mac address
+  * @param[out]  aid  Store the AID corresponding to STA mac
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  *    - ESP_ERR_NOT_FOUND: Requested resource not found
+  *    - ESP_ERR_WIFI_MODE: WiFi mode is wrong
+  *    - ESP_ERR_WIFI_CONN: WiFi internal error, the station/soft-AP control block is invalid
+  */
+esp_err_t esp_wifi_ap_get_sta_aid(const uint8_t mac[6], uint16_t *aid);
+
+/**
+  * @brief     Set the WiFi API configuration storage type
+  *
+  * @attention 1. The default value is WIFI_STORAGE_FLASH
+  *
+  * @param     storage : storage type
+  *
+  * @return
+  *   - ESP_OK: succeed
+  *   - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *   - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_set_storage(wifi_storage_t storage);
+
+/**
+  * @brief     Function signature for received Vendor-Specific Information Element callback.
+  * @param     ctx Context argument, as passed to esp_wifi_set_vendor_ie_cb() when registering callback.
+  * @param     type Information element type, based on frame type received.
+  * @param     sa Source 802.11 address.
+  * @param     vnd_ie Pointer to the vendor specific element data received.
+  * @param     rssi Received signal strength indication.
+  */
+typedef void (*esp_vendor_ie_cb_t) (void *ctx, wifi_vendor_ie_type_t type, const uint8_t sa[6], const vendor_ie_data_t *vnd_ie, int rssi);
+
+/**
+  * @brief     Set 802.11 Vendor-Specific Information Element
+  *
+  * @param     enable If true, specified IE is enabled. If false, specified IE is removed.
+  * @param     type Information Element type. Determines the frame type to associate with the IE.
+  * @param     idx  Index to set or clear. Each IE type can be associated with up to two elements (indices 0 & 1).
+  * @param     vnd_ie Pointer to vendor specific element data. First 6 bytes should be a header with fields matching vendor_ie_data_t.
+  *            If enable is false, this argument is ignored and can be NULL. Data does not need to remain valid after the function returns.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init()
+  *    - ESP_ERR_INVALID_ARG: Invalid argument, including if first byte of vnd_ie is not WIFI_VENDOR_IE_ELEMENT_ID (0xDD)
+  *      or second byte is an invalid length.
+  *    - ESP_ERR_NO_MEM: Out of memory
+  */
+esp_err_t esp_wifi_set_vendor_ie(bool enable, wifi_vendor_ie_type_t type, wifi_vendor_ie_id_t idx, const void *vnd_ie);
+
+/**
+  * @brief     Register Vendor-Specific Information Element monitoring callback.
+  *
+  * @param     cb   Callback function
+  * @param     ctx  Context argument, passed to callback function.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  */
+esp_err_t esp_wifi_set_vendor_ie_cb(esp_vendor_ie_cb_t cb, void *ctx);
+
+/**
+  * @brief     Set maximum transmitting power after WiFi start.
+  *
+  * @attention 1. Maximum power before wifi startup is limited by PHY init data bin.
+  * @attention 2. The value set by this API will be mapped to the max_tx_power of the structure wifi_country_t variable.
+  * @attention 3. Mapping Table {Power, max_tx_power} = {{8,   2}, {20,  5}, {28,  7}, {34,  8}, {44, 11},
+  *                                                      {52, 13}, {56, 14}, {60, 15}, {66, 16}, {72, 18}, {80, 20}}.
+  * @attention 4. Param power unit is 0.25dBm, range is [8, 84] corresponding to 2dBm - 20dBm.
+  * @attention 5. Relationship between set value and actual value. As follows: {set value range, actual value} = {{[8,  19],8}, {[20, 27],20}, {[28, 33],28}, {[34, 43],34}, {[44, 51],44}, {[52, 55],52}, {[56, 59],56}, {[60, 65],60}, {[66, 71],66}, {[72, 79],72}, {[80, 84],80}}.
+  *
+  * @param     power  Maximum WiFi transmitting power.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_START: WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_ARG: invalid argument, e.g. parameter is out of range
+  */
+esp_err_t esp_wifi_set_max_tx_power(int8_t power);
+
+/**
+  * @brief     Get maximum transmiting power after WiFi start
+  *
+  * @param     power Maximum WiFi transmitting power, unit is 0.25dBm.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_START: WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_ARG: invalid argument
+  */
+esp_err_t esp_wifi_get_max_tx_power(int8_t *power);
+
+/**
+  * @brief     Set mask to enable or disable some WiFi events
+  *
+  * @attention 1. Mask can be created by logical OR of various WIFI_EVENT_MASK_ constants.
+  *               Events which have corresponding bit set in the mask will not be delivered to the system event handler.
+  * @attention 2. Default WiFi event mask is WIFI_EVENT_MASK_AP_PROBEREQRECVED.
+  * @attention 3. There may be lots of stations sending probe request data around.
+  *               Don't unmask this event unless you need to receive probe request data.
+  *
+  * @param     mask  WiFi event mask.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  */
+esp_err_t esp_wifi_set_event_mask(uint32_t mask);
+
+/**
+  * @brief     Get mask of WiFi events
+  *
+  * @param     mask  WiFi event mask.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_ARG: invalid argument
+  */
+esp_err_t esp_wifi_get_event_mask(uint32_t *mask);
+
+/**
+  * @brief     Send raw ieee80211 data
+  *
+  * @attention Currently only support for sending beacon/probe request/probe response/action and non-QoS
+  *            data frame
+  *
+  * @param     ifx interface if the Wi-Fi mode is Station, the ifx should be WIFI_IF_STA. If the Wi-Fi
+  *            mode is SoftAP, the ifx should be WIFI_IF_AP. If the Wi-Fi mode is Station+SoftAP, the
+  *            ifx should be WIFI_IF_STA or WIFI_IF_AP. If the ifx is wrong, the API returns ESP_ERR_WIFI_IF.
+  * @param     buffer raw ieee80211 buffer
+  * @param     len the length of raw buffer, the len must be <= 1500 Bytes and >= 24 Bytes
+  * @param     en_sys_seq indicate whether use the internal sequence number. If en_sys_seq is false, the
+  *            sequence in raw buffer is unchanged, otherwise it will be overwritten by WiFi driver with
+  *            the system sequence number.
+  *            Generally, if esp_wifi_80211_tx is called before the Wi-Fi connection has been set up, both
+  *            en_sys_seq==true and en_sys_seq==false are fine. However, if the API is called after the Wi-Fi
+  *            connection has been set up, en_sys_seq must be true, otherwise ESP_ERR_WIFI_ARG is returned.
+  *
+  * @return
+  *    - ESP_OK: success
+  *    - ESP_ERR_WIFI_IF: Invalid interface
+  *    - ESP_ERR_INVALID_ARG: Invalid parameter
+  *    - ESP_ERR_WIFI_NO_MEM: out of memory
+  */
+
+esp_err_t esp_wifi_80211_tx(wifi_interface_t ifx, const void *buffer, int len, bool en_sys_seq);
+
+/**
+  * @brief The RX callback function of Channel State Information(CSI)  data.
+  *
+  *        Each time a CSI data is received, the callback function will be called.
+  *
+  * @param ctx context argument, passed to esp_wifi_set_csi_rx_cb() when registering callback function.
+  * @param data CSI data received. The memory that it points to will be deallocated after callback function returns.
+  *
+  */
+typedef void (* wifi_csi_cb_t)(void *ctx, wifi_csi_info_t *data);
+
+
+/**
+  * @brief Register the RX callback function of CSI data.
+  *
+  *        Each time a CSI data is received, the callback function will be called.
+  *
+  * @param cb  callback
+  * @param ctx context argument, passed to callback function
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  */
+
+esp_err_t esp_wifi_set_csi_rx_cb(wifi_csi_cb_t cb, void *ctx);
+
+/**
+  * @brief Set CSI data configuration
+  *
+  * @param config configuration
+  *
+  * return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_START: WiFi is not started by esp_wifi_start or promiscuous mode is not enabled
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_set_csi_config(const wifi_csi_config_t *config);
+
+/**
+  * @brief Enable or disable CSI
+  *
+  * @param en true - enable, false - disable
+  *
+  * return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_START: WiFi is not started by esp_wifi_start or promiscuous mode is not enabled
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_set_csi(bool en);
+
+/**
+  * @brief     Set antenna GPIO configuration
+  *
+  * @param     config  Antenna GPIO configuration.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_ARG: Invalid argument, e.g. parameter is NULL, invalid GPIO number etc
+  */
+esp_err_t esp_wifi_set_ant_gpio(const wifi_ant_gpio_config_t *config);
+
+/**
+  * @brief     Get current antenna GPIO configuration
+  *
+  * @param     config  Antenna GPIO configuration.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_ARG: invalid argument, e.g. parameter is NULL
+  */
+esp_err_t esp_wifi_get_ant_gpio(wifi_ant_gpio_config_t *config);
+
+
+/**
+  * @brief     Set antenna configuration
+  *
+  * @param     config  Antenna configuration.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_ARG: Invalid argument, e.g. parameter is NULL, invalid antenna mode or invalid GPIO number
+  */
+esp_err_t esp_wifi_set_ant(const wifi_ant_config_t *config);
+
+/**
+  * @brief     Get current antenna configuration
+  *
+  * @param     config  Antenna configuration.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_ARG: invalid argument, e.g. parameter is NULL
+  */
+esp_err_t esp_wifi_get_ant(wifi_ant_config_t *config);
+
+/**
+ * @brief      Get the TSF time
+ *             In Station mode or SoftAP+Station mode if station is not connected or station doesn't receive at least
+ *             one beacon after connected, will return 0
+ *
+ * @attention  Enabling power save may cause the return value inaccurate, except WiFi modem sleep
+ *
+ * @param      interface The interface whose tsf_time is to be retrieved.
+ *
+ * @return     0 or the TSF time
+ */
+int64_t esp_wifi_get_tsf_time(wifi_interface_t interface);
+
+/**
+  * @brief     Set the inactive time of the ESP32 STA or AP
+  *
+  * @attention 1. For Station, If the station does not receive a beacon frame from the connected SoftAP during the inactive time,
+  *               disconnect from SoftAP. Default 6s.
+  * @attention 2. For SoftAP, If the softAP doesn't receive any data from the connected STA during inactive time,
+  *               the softAP will force deauth the STA. Default is 300s.
+  * @attention 3. The inactive time configuration is not stored into flash
+  *
+  * @param     ifx  interface to be configured.
+  * @param     sec  Inactive time. Unit seconds.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_ARG: invalid argument, For Station, if sec is less than 3. For SoftAP, if sec is less than 10.
+  */
+esp_err_t esp_wifi_set_inactive_time(wifi_interface_t ifx, uint16_t sec);
+
+/**
+  * @brief     Get inactive time of specified interface
+  *
+  * @param     ifx  Interface to be configured.
+  * @param     sec  Inactive time. Unit seconds.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_ARG: invalid argument
+  */
+esp_err_t esp_wifi_get_inactive_time(wifi_interface_t ifx, uint16_t *sec);
+
+/**
+  * @brief     Dump WiFi statistics
+  *
+  * @param     modules statistic modules to be dumped
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - others: failed
+  */
+esp_err_t esp_wifi_statis_dump(uint32_t modules);
+
+/**
+  * @brief      Set RSSI threshold below which APP will get an event
+  *
+  * @attention  This API needs to be called every time after WIFI_EVENT_STA_BSS_RSSI_LOW event is received.
+  *
+  * @param      rssi threshold value in dbm between -100 to 0
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_WIFI_ARG: invalid argument
+  */
+esp_err_t esp_wifi_set_rssi_threshold(int32_t rssi);
+
+/**
+  * @brief      Start an FTM Initiator session by sending FTM request
+  *             If successful, event WIFI_EVENT_FTM_REPORT is generated with the result of the FTM procedure
+  *
+  * @attention  Use this API only in Station mode
+  *
+  * @param      cfg  FTM Initiator session configuration
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - others: failed
+  */
+esp_err_t esp_wifi_ftm_initiate_session(wifi_ftm_initiator_cfg_t *cfg);
+
+/**
+  * @brief      End the ongoing FTM Initiator session
+  *
+  * @attention  This API works only on FTM Initiator
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - others: failed
+  */
+esp_err_t esp_wifi_ftm_end_session(void);
+
+/**
+  * @brief      Set offset in cm for FTM Responder. An equivalent offset is calculated in picoseconds
+  *             and added in TOD of FTM Measurement frame (T1).
+  *
+  * @attention  Use this API only in AP mode before performing FTM as responder
+  *
+  * @param      offset_cm  T1 Offset to be added in centimeters
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - others: failed
+  */
+esp_err_t esp_wifi_ftm_resp_set_offset(int16_t offset_cm);
+
+/**
+  * @brief      Enable or disable 11b rate of specified interface
+  *
+  * @attention  1. This API should be called after esp_wifi_init() and before esp_wifi_start().
+  * @attention  2. Only when really need to disable 11b rate call this API otherwise don't call this.
+  *
+  * @param      ifx  Interface to be configured.
+  * @param      disable true means disable 11b rate while false means enable 11b rate.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - others: failed
+  */
+esp_err_t esp_wifi_config_11b_rate(wifi_interface_t ifx, bool disable);
+
+/**
+  * @brief      Config ESPNOW rate of specified interface
+  *
+  * @attention  1. This API should be called after esp_wifi_init() and before esp_wifi_start().
+  *
+  * @param      ifx  Interface to be configured.
+  * @param      rate Phy rate to be configured.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - others: failed
+  */
+esp_err_t esp_wifi_config_espnow_rate(wifi_interface_t ifx, wifi_phy_rate_t rate);
+
+/**
+  * @brief      Set interval for station to wake up periodically at disconnected.
+  *
+  * @attention 1. Only when ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is enabled, this configuration could work
+  * @attention 2. This configuration only work for station mode and disconnected status
+  * @attention 3. This configuration would influence nothing until some module configure wake_window
+  * @attention 4. A sensible interval which is not too small is recommended (e.g. 100ms)
+  *
+  * @param      interval  how much micriosecond would the chip wake up, from 1 to 65535.
+  */
+esp_err_t esp_wifi_set_connectionless_wake_interval(uint16_t interval);
+
+/**
+  * @brief     configure country
+  *
+  * @attention 1. When ieee80211d_enabled, the country info of the AP to which
+  *               the station is connected is used. E.g. if the configured country is US
+  *               and the country info of the AP to which the station is connected is JP
+  *               then the country info that will be used is JP. If the station disconnected
+  *               from the AP the country info is set back to the country info of the station automatically,
+  *               US in the example.
+  * @attention 2. When ieee80211d_enabled is disabled, then the configured country info is used always.
+  * @attention 3. When the country info is changed because of configuration or because the station connects to a different
+  *               external AP, the country IE in probe response/beacon of the soft-AP is also changed.
+  * @attention 4. The country configuration is stored into flash.
+  * @attention 5. When this API is called, the PHY init data will switch to the PHY init data type corresponding to the
+  *               country info.
+  * @attention 6. Supported country codes are "01"(world safe mode) "AT","AU","BE","BG","BR",
+  *               "CA","CH","CN","CY","CZ","DE","DK","EE","ES","FI","FR","GB","GR","HK","HR","HU",
+  *               "IE","IN","IS","IT","JP","KR","LI","LT","LU","LV","MT","MX","NL","NO","NZ","PL","PT",
+  *               "RO","SE","SI","SK","TW","US"
+  *
+  * @attention 7. When country code "01" (world safe mode) is set, SoftAP mode won't contain country IE.
+  * @attention 8. The default country is "CN" and ieee80211d_enabled is TRUE.
+  *
+  * @param     country   the configured country ISO code
+  * @param     ieee80211d_enabled   802.11d is enabled or not
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_set_country_code(const char *country, bool ieee80211d_enabled);
+
+/**
+  * @brief     get the current country code
+  *
+  * @param     country  country code
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
+  *    - ESP_ERR_INVALID_ARG: invalid argument
+  */
+esp_err_t esp_wifi_get_country_code(char *country);
+
+/**
+  * @brief      Config 80211 tx rate of specified interface
+  *
+  * @attention  1. This API should be called after esp_wifi_init() and before esp_wifi_start().
+  *
+  * @param      ifx  Interface to be configured.
+  * @param      rate Phy rate to be configured.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - others: failed
+  */
+esp_err_t esp_wifi_config_80211_tx_rate(wifi_interface_t ifx, wifi_phy_rate_t rate);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_WIFI_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_crypto_types.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_crypto_types.h
new file mode 100644
index 00000000000..1249d331a6f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_crypto_types.h
@@ -0,0 +1,416 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef __ESP_WIFI_CRYPTO_TYPES_H__
+#define __ESP_WIFI_CRYPTO_TYPES_H__
+
+/* This is an internal API header for configuring the implementation used for WiFi cryptographic
+   operations.
+
+   During normal operation, you don't need to use any of these types or functions in this header.
+   See esp_wifi.h & esp_wifi_types.h instead.
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_WIFI_CRYPTO_VERSION 0x00000001
+
+/*
+ * Enumeration for hash operations.
+ * When WPA2 is connecting, this enum is used to
+ * request a hash algorithm via crypto_hash_xxx functions.
+ */
+typedef enum {
+    ESP_CRYPTO_HASH_ALG_MD5, ESP_CRYPTO_HASH_ALG_SHA1,
+    ESP_CRYPTO_HASH_ALG_HMAC_MD5, ESP_CRYPTO_HASH_ALG_HMAC_SHA1,
+    ESP_CRYPTO_HASH_ALG_SHA256, ESP_CRYPTO_HASH_ALG_HMAC_SHA256
+}esp_crypto_hash_alg_t;
+
+/*
+ * Enumeration for block cipher operations.
+ * When WPA2 is connecting, this enum is used to request a block
+ * cipher algorithm via crypto_cipher_xxx functions.
+ */
+typedef enum {
+    ESP_CRYPTO_CIPHER_NULL, ESP_CRYPTO_CIPHER_ALG_AES, ESP_CRYPTO_CIPHER_ALG_3DES,
+    ESP_CRYPTO_CIPHER_ALG_DES, ESP_CRYPTO_CIPHER_ALG_RC2, ESP_CRYPTO_CIPHER_ALG_RC4
+} esp_crypto_cipher_alg_t;
+
+/*
+ * This structure is about the algorithm when do crypto_hash operation, for detail,
+ * please reference to the structure crypto_hash.
+ */
+typedef struct crypto_hash esp_crypto_hash_t;
+
+/*
+ * This structure is about the algorithm when do crypto_cipher operation, for detail,
+ * please reference to the structure crypto_cipher.
+ */
+typedef struct crypto_cipher esp_crypto_cipher_t;
+
+/**
+  * @brief The AES callback function when do WPS connect.
+  *
+  * @param key  Encryption key.
+  * @param iv  Encryption IV for CBC mode (16 bytes).
+  * @param data  Data to encrypt in-place.
+  * @param data_len  Length of data in bytes (must be divisible by 16)
+  */
+typedef int (*esp_aes_128_encrypt_t)(const unsigned char *key, const unsigned char *iv, unsigned char *data, int data_len);
+
+/**
+  * @brief The AES callback function when do WPS connect.
+  *
+  * @param key  Decryption key.
+  * @param iv  Decryption IV for CBC mode (16 bytes).
+  * @param data  Data to decrypt in-place.
+  * @param data_len  Length of data in bytes (must be divisible by 16)
+  *
+  */
+typedef int (*esp_aes_128_decrypt_t)(const unsigned char *key, const unsigned char *iv, unsigned char *data, int data_len);
+
+/**
+  * @brief The AES callback function when do STA connect.
+  *
+  * @param kek  16-octet Key encryption key (KEK).
+  * @param n  Length of the plaintext key in 64-bit units;
+  * @param plain  Plaintext key to be wrapped, n * 64 bits
+  * @param cipher  Wrapped key, (n + 1) * 64 bits
+  *
+  */
+typedef int (*esp_aes_wrap_t)(const unsigned char *kek, int n, const unsigned char *plain, unsigned char *cipher);
+
+/**
+  * @brief The AES callback function when do STA connect.
+  *
+  * @param kek  16-octet Key decryption key (KEK).
+  * @param n  Length of the plaintext key in 64-bit units;
+  * @param cipher  Wrapped key to be unwrapped, (n + 1) * 64 bits
+  * @param plain  Plaintext key, n * 64 bits
+  *
+  */
+typedef int (*esp_aes_unwrap_t)(const unsigned char *kek, int n, const unsigned char *cipher, unsigned char *plain);
+
+/**
+  * @brief The SHA256 callback function when do WPS connect.
+  *
+  * @param key  Key for HMAC operations.
+  * @param key_len  Length of the key in bytes.
+  * @param num_elem  Number of elements in the data vector.
+  * @param addr  Pointers to the data areas.
+  * @param len  Lengths of the data blocks.
+  * @param mac  Buffer for the hash (32 bytes).
+  *
+  */
+typedef int (*esp_hmac_sha256_vector_t)(const unsigned char *key, int key_len, int num_elem,
+			                   const unsigned char *addr[], const int *len, unsigned char *mac);
+
+/**
+  * @brief The AES callback function when do STA connect.
+  *
+  * @param key  Key for PRF.
+  * @param key_len  Length of the key in bytes.
+  * @param label  A unique label for each purpose of the PRF.
+  * @param data  Extra data to bind into the key.
+  * @param data_len  Length of the data.
+  * @param buf  Buffer for the generated pseudo-random key.
+  * @param buf_len  Number of bytes of key to generate.
+  *
+  */
+typedef int (*esp_sha256_prf_t)(const unsigned char *key, int key_len, const char *label,
+	                           const unsigned char *data, int data_len, unsigned char *buf, int buf_len);
+
+/**
+ * @brief HMAC-MD5 over data buffer (RFC 2104)'
+ *
+ * @key: Key for HMAC operations
+ * @key_len: Length of the key in bytes
+ * @data: Pointers to the data area
+ * @data_len: Length of the data area
+ * @mac: Buffer for the hash (16 bytes)
+ * Returns: 0 on success, -1 on failure
+ */
+typedef int (*esp_hmac_md5_t)(const unsigned char *key, unsigned int key_len, const unsigned char *data,
+                              unsigned int data_len, unsigned char *mac);
+
+/**
+ * @brief HMAC-MD5 over data vector (RFC 2104)
+ *
+ * @key: Key for HMAC operations
+ * @key_len: Length of the key in bytes
+ * @num_elem: Number of elements in the data vector
+ * @addr: Pointers to the data areas
+ * @len: Lengths of the data blocks
+ * @mac: Buffer for the hash (16 bytes)
+ * Returns: 0 on success, -1 on failure
+ */
+typedef int (*esp_hmac_md5_vector_t)(const unsigned char *key, unsigned int key_len, unsigned int num_elem,
+                              const unsigned char *addr[], const unsigned int *len, unsigned char *mac);
+
+/**
+ * @brief HMAC-SHA1 over data buffer (RFC 2104)
+ *
+ * @key: Key for HMAC operations
+ * @key_len: Length of the key in bytes
+ * @data: Pointers to the data area
+ * @data_len: Length of the data area
+ * @mac: Buffer for the hash (20 bytes)
+ * Returns: 0 on success, -1 of failure
+ */
+typedef int (*esp_hmac_sha1_t)(const unsigned char *key, unsigned int key_len, const unsigned char *data,
+                              unsigned int data_len, unsigned char *mac);
+
+/**
+ * @brief HMAC-SHA1 over data vector (RFC 2104)
+ *
+ * @key: Key for HMAC operations
+ * @key_len: Length of the key in bytes
+ * @num_elem: Number of elements in the data vector
+ * @addr: Pointers to the data areas
+ * @len: Lengths of the data blocks
+ * @mac: Buffer for the hash (20 bytes)
+ * Returns: 0 on success, -1 on failure
+ */
+typedef int (*esp_hmac_sha1_vector_t)(const unsigned char *key, unsigned int key_len, unsigned int num_elem,
+                              const unsigned char *addr[], const unsigned int *len, unsigned char *mac);
+
+/**
+ * @brief SHA1-based Pseudo-Random Function (PRF) (IEEE 802.11i, 8.5.1.1)
+ *
+ * @key: Key for PRF
+ * @key_len: Length of the key in bytes
+ * @label: A unique label for each purpose of the PRF
+ * @data: Extra data to bind into the key
+ * @data_len: Length of the data
+ * @buf: Buffer for the generated pseudo-random key
+ * @buf_len: Number of bytes of key to generate
+ * Returns: 0 on success, -1 of failure
+ *
+ * This function is used to derive new, cryptographically separate keys from a
+ * given key (e.g., PMK in IEEE 802.11i).
+ */
+typedef int (*esp_sha1_prf_t)(const unsigned char *key, unsigned int key_len, const char *label,
+                              const unsigned char *data, unsigned int data_len, unsigned char *buf, unsigned int buf_len);
+
+/**
+ * @brief SHA-1 hash for data vector
+ *
+ * @num_elem: Number of elements in the data vector
+ * @addr: Pointers to the data areas
+ * @len: Lengths of the data blocks
+ * @mac: Buffer for the hash
+ * Returns: 0 on success, -1 on failure
+ */
+typedef int (*esp_sha1_vector_t)(unsigned int num_elem, const unsigned char *addr[], const unsigned int *len,
+                              unsigned char *mac);
+
+/**
+ * @brief SHA1-based key derivation function (PBKDF2) for IEEE 802.11i
+ *
+ * @passphrase: ASCII passphrase
+ * @ssid: SSID
+ * @ssid_len: SSID length in bytes
+ * @iterations: Number of iterations to run
+ * @buf: Buffer for the generated key
+ * @buflen: Length of the buffer in bytes
+ * Returns: 0 on success, -1 of failure
+ *
+ * This function is used to derive PSK for WPA-PSK. For this protocol,
+ * iterations is set to 4096 and buflen to 32. This function is described in
+ * IEEE Std 802.11-2004, Clause H.4. The main construction is from PKCS#5 v2.0.
+ */
+typedef int (*esp_pbkdf2_sha1_t)(const char *passphrase, const char *ssid, unsigned int ssid_len,
+                              int iterations, unsigned char *buf, unsigned int buflen);
+
+/**
+ * @brief XOR RC4 stream to given data with skip-stream-start
+ *
+ * @key: RC4 key
+ * @keylen: RC4 key length
+ * @skip: number of bytes to skip from the beginning of the RC4 stream
+ * @data: data to be XOR'ed with RC4 stream
+ * @data_len: buf length
+ * Returns: 0 on success, -1 on failure
+ *
+ * Generate RC4 pseudo random stream for the given key, skip beginning of the
+ * stream, and XOR the end result with the data buffer to perform RC4
+ * encryption/decryption.
+ */
+typedef int (*esp_rc4_skip_t)(const unsigned char *key, unsigned int keylen, unsigned int skip,
+                              unsigned char *data, unsigned int data_len);
+
+/**
+ * @brief MD5 hash for data vector
+ *
+ * @num_elem: Number of elements in the data vector
+ * @addr: Pointers to the data areas
+ * @len: Lengths of the data blocks
+ * @mac: Buffer for the hash
+ * Returns: 0 on success, -1 on failure
+ */
+typedef int (*esp_md5_vector_t)(unsigned int num_elem, const unsigned char *addr[], const unsigned int *len,
+                              unsigned char *mac);
+
+/**
+ * @brief Encrypt one AES block
+ *
+ * @ctx: Context pointer from aes_encrypt_init()
+ * @plain: Plaintext data to be encrypted (16 bytes)
+ * @crypt: Buffer for the encrypted data (16 bytes)
+ */
+typedef void (*esp_aes_encrypt_t)(void *ctx, const unsigned char *plain, unsigned char *crypt);
+
+/**
+ * @brief Initialize AES for encryption
+ *
+ * @key: Encryption key
+ * @len: Key length in bytes (usually 16, i.e., 128 bits)
+ * Returns: Pointer to context data or %NULL on failure
+ */
+typedef void * (*esp_aes_encrypt_init_t)(const unsigned char *key,  unsigned int len);
+
+/**
+ * @brief Deinitialize AES encryption
+ *
+ * @ctx: Context pointer from aes_encrypt_init()
+ */
+typedef void (*esp_aes_encrypt_deinit_t)(void *ctx);
+
+/**
+ * @brief Decrypt one AES block
+ *
+ * @ctx: Context pointer from aes_encrypt_init()
+ * @crypt: Encrypted data (16 bytes)
+ * @plain: Buffer for the decrypted data (16 bytes)
+ */
+typedef void (*esp_aes_decrypt_t)(void *ctx, const unsigned char *crypt, unsigned char *plain);
+
+/**
+ * @brief Initialize AES for decryption
+ *
+ * @key: Decryption key
+ * @len: Key length in bytes (usually 16, i.e., 128 bits)
+ * Returns: Pointer to context data or %NULL on failure
+ */
+typedef void * (*esp_aes_decrypt_init_t)(const unsigned char *key, unsigned int len);
+
+/**
+ * @brief Deinitialize AES decryption
+ *
+ * @ctx: Context pointer from aes_encrypt_init()
+ */
+typedef void (*esp_aes_decrypt_deinit_t)(void *ctx);
+
+/**
+ * @brief One-Key CBC MAC (OMAC1) hash with AES-128 for MIC computation
+ *
+ * @key: 128-bit key for the hash operation
+ * @data: Data buffer for which a MIC is computed
+ * @data_len: Length of data buffer in bytes
+ * @mic: Buffer for MIC (128 bits, i.e., 16 bytes)
+ * Returns: 0 on success, -1 on failure
+ */
+typedef int (*esp_omac1_aes_128_t)(const uint8_t *key, const uint8_t *data, size_t data_len,
+                                   uint8_t *mic);
+
+/**
+ * @brief Decrypt data using CCMP (Counter Mode CBC-MAC Protocol OR
+ *        Counter Mode Cipher Block Chaining Message Authentication
+ *        Code Protocol) which is used in IEEE 802.11i RSN standard.
+ * @tk: 128-bit Temporal Key for obtained during 4-way handshake
+ * @hdr: Pointer to IEEE802.11 frame headeri needed for AAD
+ * @data: Pointer to encrypted data buffer
+ * @data_len: Encrypted data length in bytes
+ * @decrypted_len: Length of decrypted data
+ * @espnow_pkt: Indicates if it's an ESPNOW packet
+ * Returns: Pointer to decrypted data on success, NULL on failure
+ */
+typedef uint8_t * (*esp_ccmp_decrypt_t)(const uint8_t *tk, const uint8_t *ieee80211_hdr,
+                                        const uint8_t *data, size_t data_len,
+                                        size_t *decrypted_len, bool espnow_pkt);
+
+/**
+ * @brief Encrypt data using CCMP (Counter Mode CBC-MAC Protocol OR
+ *        Counter Mode Cipher Block Chaining Message Authentication
+ *        Code Protocol) which is used in IEEE 802.11i RSN standard.
+ * @tk: 128-bit Temporal Key for obtained during 4-way handshake
+ * @frame: Pointer to IEEE802.11 frame including header
+ * @len: Length of the frame including header
+ * @hdrlen: Length of the header
+ * @pn: Packet Number counter
+ * @keyid: Key ID to be mentioned in CCMP Vector
+ * @encrypted_len: Length of the encrypted frame including header
+ */
+typedef uint8_t * (*esp_ccmp_encrypt_t)(const uint8_t *tk, uint8_t *frame, size_t len, size_t hdrlen,
+                                        uint8_t *pn, int keyid, size_t *encrypted_len);
+
+/**
+ * @brief One-Key GMAC hash with AES for MIC computation
+ *
+ * @key: key for the hash operation
+ * @keylen: key length
+ * @iv: initialization vector
+ * @iv_len: initialization vector length
+ * @aad: aad
+ * @aad_len: aad length
+ * @mic: Buffer for MIC (128 bits, i.e., 16 bytes)
+ * Returns: 0 on success, -1 on failure
+ */
+typedef int (*esp_aes_gmac_t)(const uint8_t *key, size_t keylen, const uint8_t *iv, size_t iv_len,
+                              const uint8_t *aad, size_t aad_len, uint8_t *mic);
+
+/**
+  * @brief The crypto callback function structure used when do station security connect.
+  *        The structure can be set as software crypto or the crypto optimized by ESP32
+  *        hardware.
+  */
+typedef struct {
+    uint32_t size;
+    uint32_t version;
+    esp_aes_wrap_t aes_wrap;                         /**< station connect function used when send EAPOL frame */
+    esp_aes_unwrap_t aes_unwrap;                     /**< station connect function used when decrypt key data */
+    esp_hmac_sha256_vector_t hmac_sha256_vector;     /**< station connect function used when check MIC */
+    esp_sha256_prf_t sha256_prf;                     /**< station connect function used when check MIC */
+    esp_hmac_md5_t hmac_md5;
+    esp_hmac_md5_vector_t hamc_md5_vector;
+    esp_hmac_sha1_t hmac_sha1;
+    esp_hmac_sha1_vector_t hmac_sha1_vector;
+    esp_sha1_prf_t sha1_prf;
+    esp_sha1_vector_t sha1_vector;
+    esp_pbkdf2_sha1_t pbkdf2_sha1;
+    esp_rc4_skip_t rc4_skip;
+    esp_md5_vector_t md5_vector;
+    esp_aes_encrypt_t aes_encrypt;
+    esp_aes_encrypt_init_t aes_encrypt_init;
+    esp_aes_encrypt_deinit_t aes_encrypt_deinit;
+    esp_aes_decrypt_t aes_decrypt;
+    esp_aes_decrypt_init_t aes_decrypt_init;
+    esp_aes_decrypt_deinit_t aes_decrypt_deinit;
+    esp_aes_128_encrypt_t aes_128_encrypt;
+    esp_aes_128_decrypt_t aes_128_decrypt;
+    esp_omac1_aes_128_t omac1_aes_128;
+    esp_ccmp_decrypt_t ccmp_decrypt;
+    esp_ccmp_encrypt_t ccmp_encrypt;
+    esp_aes_gmac_t aes_gmac;
+}wpa_crypto_funcs_t;
+
+/**
+  * @brief The crypto callback function structure used in mesh vendor IE encryption. The
+  *        structure can be set as software crypto or the crypto optimized by ESP32
+  *        hardware.
+  */
+typedef struct{
+    esp_aes_128_encrypt_t aes_128_encrypt;          /**< function used in mesh vendor IE encryption */
+    esp_aes_128_decrypt_t aes_128_decrypt;          /**< function used in mesh vendor IE decryption */
+} mesh_crypto_funcs_t;
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_default.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_default.h
new file mode 100644
index 00000000000..908ea2c113c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_default.h
@@ -0,0 +1,134 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_WIFI_DEFAULT_H
+#define _ESP_WIFI_DEFAULT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Attaches wifi station interface to supplied netif
+ *
+ * @param esp_netif instance to attach the wifi station to
+ *
+ * @return
+ *  - ESP_OK on success
+ *  - ESP_FAIL if attach failed
+ */
+esp_err_t esp_netif_attach_wifi_station(esp_netif_t *esp_netif);
+
+/**
+ * @brief Attaches wifi soft AP interface to supplied netif
+ *
+ * @param esp_netif instance to attach the wifi AP to
+ *
+ * @return
+ *  - ESP_OK on success
+ *  - ESP_FAIL if attach failed
+ */
+esp_err_t esp_netif_attach_wifi_ap(esp_netif_t *esp_netif);
+
+/**
+ * @brief Sets default wifi event handlers for STA interface
+ *
+ * @return
+ *  - ESP_OK on success, error returned from esp_event_handler_register if failed
+ */
+esp_err_t esp_wifi_set_default_wifi_sta_handlers(void);
+
+/**
+ * @brief Sets default wifi event handlers for AP interface
+ *
+ * @return
+ *  - ESP_OK on success, error returned from esp_event_handler_register if failed
+ */
+esp_err_t esp_wifi_set_default_wifi_ap_handlers(void);
+
+/**
+ * @brief Clears default wifi event handlers for supplied network interface
+ *
+ * @param esp_netif instance of corresponding if object
+ *
+ * @return
+ *  - ESP_OK on success, error returned from esp_event_handler_register if failed
+ */
+esp_err_t esp_wifi_clear_default_wifi_driver_and_handlers(void *esp_netif);
+
+/**
+ * @brief Creates default WIFI AP. In case of any init error this API aborts.
+ *
+ * @note The API creates esp_netif object with default WiFi access point config,
+ * attaches the netif to wifi and registers default wifi handlers.
+ *
+ * @return pointer to esp-netif instance
+ */
+esp_netif_t* esp_netif_create_default_wifi_ap(void);
+
+/**
+ * @brief Creates default WIFI STA. In case of any init error this API aborts.
+ *
+ * @note The API creates esp_netif object with default WiFi station config,
+ * attaches the netif to wifi and registers default wifi handlers.
+ *
+ * @return pointer to esp-netif instance
+ */
+esp_netif_t* esp_netif_create_default_wifi_sta(void);
+
+/**
+ * @brief Destroys default WIFI netif created with esp_netif_create_default_wifi_...() API.
+ *
+ * @param[in] esp_netif object to detach from WiFi and destroy
+ *
+ * @note This API unregisters wifi handlers and detaches the created object from the wifi.
+ * (this function is a no-operation if esp_netif is NULL)
+ */
+void esp_netif_destroy_default_wifi(void *esp_netif);
+
+/**
+ * @brief Creates esp_netif WiFi object based on the custom configuration.
+ *
+ * @attention This API DOES NOT register default handlers!
+ *
+ * @param[in] wifi_if type of wifi interface
+ * @param[in] esp_netif_config inherent esp-netif configuration pointer
+ *
+ * @return pointer to esp-netif instance
+ */
+esp_netif_t* esp_netif_create_wifi(wifi_interface_t wifi_if, esp_netif_inherent_config_t *esp_netif_config);
+
+/**
+ * @brief Creates default STA and AP network interfaces for esp-mesh.
+ *
+ * Both netifs are almost identical to the default station and softAP, but with
+ * DHCP client and server disabled. Please note that the DHCP client is typically
+ * enabled only if the device is promoted to a root node.
+ *
+ * Returns created interfaces which could be ignored setting parameters to NULL
+ * if an application code does not need to save the interface instances
+ * for further processing.
+ *
+ * @param[out] p_netif_sta pointer where the resultant STA interface is saved (if non NULL)
+ * @param[out] p_netif_ap pointer where the resultant AP interface is saved (if non NULL)
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_netif_create_default_wifi_mesh_netifs(esp_netif_t **p_netif_sta, esp_netif_t **p_netif_ap);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_WIFI_DEFAULT_H
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_netif.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_netif.h
new file mode 100644
index 00000000000..2c2243b4ea6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_netif.h
@@ -0,0 +1,91 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_WIFI_NETIF_H
+#define _ESP_WIFI_NETIF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Number of WiFi interfaces used by wifi-netif abstraction
+ */
+#define MAX_WIFI_IFS (2)
+
+/**
+ * @brief Forward declaration of WiFi interface handle
+ */
+typedef struct wifi_netif_driver* wifi_netif_driver_t;
+
+/**
+ * @brief Creates wifi driver instance to be used with esp-netif
+ *
+ * @param wifi_if wifi interface type (station, softAP)
+ *
+ * @return
+ *  - pointer to wifi interface handle on success
+ *  - NULL otherwise
+ */
+wifi_netif_driver_t esp_wifi_create_if_driver(wifi_interface_t wifi_if);
+
+/**
+ * @brief Destroys wifi driver instance
+ *
+ * @param h pointer to wifi interface handle
+ *
+ */
+void esp_wifi_destroy_if_driver(wifi_netif_driver_t h);
+
+/**
+ * @brief Return mac of specified wifi driver instance
+ *
+ * @param[in] ifx pointer to wifi interface handle
+ * @param[out] mac output mac address
+ *
+ * @return ESP_OK on success
+ *
+ */
+esp_err_t esp_wifi_get_if_mac(wifi_netif_driver_t ifx, uint8_t mac[6]);
+
+/**
+ * @brief Return true if the supplied interface instance is ready after start.
+ * Typically used when registering on receive callback, which ought to be
+ * installed as soon as AP started, but once STA gets connected.
+ *
+ * @param[in] ifx pointer to wifi interface handle
+ *
+ * @return
+ *      - true if ready after intertace started (typically Access Point type)
+ *      - false if ready once intertace connected (typically for Station type)
+ */
+bool esp_wifi_is_if_ready_when_started(wifi_netif_driver_t ifx);
+
+/**
+ * @brief Register interface receive callback function with argument
+ *
+ * @param[in] ifx pointer to wifi interface handle
+ * @param[in] fn  funtion to be registered (typically esp_netif_receive)
+ * @param[in] arg argument to be supplied to registered function (typically esp_netif ptr)
+ *
+ * @return ESP_OK on success
+ *
+ */
+esp_err_t esp_wifi_register_if_rxcb(wifi_netif_driver_t ifx, esp_netif_receive_t fn, void * arg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_WIFI_NETIF_H
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_types.h b/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_types.h
new file mode 100644
index 00000000000..47f5c79281b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/esp_wifi_types.h
@@ -0,0 +1,750 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef __ESP_WIFI_TYPES_H__
+#define __ESP_WIFI_TYPES_H__
+
+#include "esp_private/esp_wifi_types_private.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    WIFI_MODE_NULL = 0,  /**< null mode */
+    WIFI_MODE_STA,       /**< WiFi station mode */
+    WIFI_MODE_AP,        /**< WiFi soft-AP mode */
+    WIFI_MODE_APSTA,     /**< WiFi station + soft-AP mode */
+    WIFI_MODE_MAX
+} wifi_mode_t;
+
+typedef enum {
+    WIFI_IF_STA = ESP_IF_WIFI_STA,
+    WIFI_IF_AP  = ESP_IF_WIFI_AP,
+} wifi_interface_t;
+
+#define WIFI_OFFCHAN_TX_REQ      1
+#define WIFI_OFFCHAN_TX_CANCEL   0
+
+#define WIFI_ROC_REQ     1
+#define WIFI_ROC_CANCEL  0
+
+typedef enum {
+    WIFI_COUNTRY_POLICY_AUTO,   /**< Country policy is auto, use the country info of AP to which the station is connected */
+    WIFI_COUNTRY_POLICY_MANUAL, /**< Country policy is manual, always use the configured country info */
+} wifi_country_policy_t;
+
+/** @brief Structure describing WiFi country-based regional restrictions. */
+typedef struct {
+    char                  cc[3];   /**< country code string */
+    uint8_t               schan;   /**< start channel */
+    uint8_t               nchan;   /**< total channel number */
+    int8_t                max_tx_power;   /**< This field is used for getting WiFi maximum transmitting power, call esp_wifi_set_max_tx_power to set the maximum transmitting power. */
+    wifi_country_policy_t policy;  /**< country policy */
+} wifi_country_t;
+
+typedef enum {
+    WIFI_AUTH_OPEN = 0,         /**< authenticate mode : open */
+    WIFI_AUTH_WEP,              /**< authenticate mode : WEP */
+    WIFI_AUTH_WPA_PSK,          /**< authenticate mode : WPA_PSK */
+    WIFI_AUTH_WPA2_PSK,         /**< authenticate mode : WPA2_PSK */
+    WIFI_AUTH_WPA_WPA2_PSK,     /**< authenticate mode : WPA_WPA2_PSK */
+    WIFI_AUTH_WPA2_ENTERPRISE,  /**< authenticate mode : WPA2_ENTERPRISE */
+    WIFI_AUTH_WPA3_PSK,         /**< authenticate mode : WPA3_PSK */
+    WIFI_AUTH_WPA2_WPA3_PSK,    /**< authenticate mode : WPA2_WPA3_PSK */
+    WIFI_AUTH_WAPI_PSK,         /**< authenticate mode : WAPI_PSK */
+    WIFI_AUTH_MAX
+} wifi_auth_mode_t;
+
+typedef enum {
+    WIFI_REASON_UNSPECIFIED              = 1,
+    WIFI_REASON_AUTH_EXPIRE              = 2,
+    WIFI_REASON_AUTH_LEAVE               = 3,
+    WIFI_REASON_ASSOC_EXPIRE             = 4,
+    WIFI_REASON_ASSOC_TOOMANY            = 5,
+    WIFI_REASON_NOT_AUTHED               = 6,
+    WIFI_REASON_NOT_ASSOCED              = 7,
+    WIFI_REASON_ASSOC_LEAVE              = 8,
+    WIFI_REASON_ASSOC_NOT_AUTHED         = 9,
+    WIFI_REASON_DISASSOC_PWRCAP_BAD      = 10,
+    WIFI_REASON_DISASSOC_SUPCHAN_BAD     = 11,
+    WIFI_REASON_BSS_TRANSITION_DISASSOC  = 12,
+    WIFI_REASON_IE_INVALID               = 13,
+    WIFI_REASON_MIC_FAILURE              = 14,
+    WIFI_REASON_4WAY_HANDSHAKE_TIMEOUT   = 15,
+    WIFI_REASON_GROUP_KEY_UPDATE_TIMEOUT = 16,
+    WIFI_REASON_IE_IN_4WAY_DIFFERS       = 17,
+    WIFI_REASON_GROUP_CIPHER_INVALID     = 18,
+    WIFI_REASON_PAIRWISE_CIPHER_INVALID  = 19,
+    WIFI_REASON_AKMP_INVALID             = 20,
+    WIFI_REASON_UNSUPP_RSN_IE_VERSION    = 21,
+    WIFI_REASON_INVALID_RSN_IE_CAP       = 22,
+    WIFI_REASON_802_1X_AUTH_FAILED       = 23,
+    WIFI_REASON_CIPHER_SUITE_REJECTED    = 24,
+
+    WIFI_REASON_INVALID_PMKID            = 53,
+
+    WIFI_REASON_BEACON_TIMEOUT           = 200,
+    WIFI_REASON_NO_AP_FOUND              = 201,
+    WIFI_REASON_AUTH_FAIL                = 202,
+    WIFI_REASON_ASSOC_FAIL               = 203,
+    WIFI_REASON_HANDSHAKE_TIMEOUT        = 204,
+    WIFI_REASON_CONNECTION_FAIL          = 205,
+    WIFI_REASON_AP_TSF_RESET             = 206,
+    WIFI_REASON_ROAMING                  = 207,
+} wifi_err_reason_t;
+
+typedef enum {
+    WIFI_SECOND_CHAN_NONE = 0,  /**< the channel width is HT20 */
+    WIFI_SECOND_CHAN_ABOVE,     /**< the channel width is HT40 and the secondary channel is above the primary channel */
+    WIFI_SECOND_CHAN_BELOW,     /**< the channel width is HT40 and the secondary channel is below the primary channel */
+} wifi_second_chan_t;
+
+typedef enum {
+    WIFI_SCAN_TYPE_ACTIVE = 0,  /**< active scan */
+    WIFI_SCAN_TYPE_PASSIVE,     /**< passive scan */
+} wifi_scan_type_t;
+
+/** @brief Range of active scan times per channel */
+typedef struct {
+    uint32_t min;  /**< minimum active scan time per channel, units: millisecond */
+    uint32_t max;  /**< maximum active scan time per channel, units: millisecond, values above 1500ms may
+                                          cause station to disconnect from AP and are not recommended.  */
+} wifi_active_scan_time_t;
+
+/** @brief Aggregate of active & passive scan time per channel */
+typedef struct {
+    wifi_active_scan_time_t active;  /**< active scan time per channel, units: millisecond. */
+    uint32_t passive;                /**< passive scan time per channel, units: millisecond, values above 1500ms may
+                                          cause station to disconnect from AP and are not recommended. */
+} wifi_scan_time_t;
+
+/** @brief Parameters for an SSID scan. */
+typedef struct {
+    uint8_t *ssid;               /**< SSID of AP */
+    uint8_t *bssid;              /**< MAC address of AP */
+    uint8_t channel;             /**< channel, scan the specific channel */
+    bool show_hidden;            /**< enable to scan AP whose SSID is hidden */
+    wifi_scan_type_t scan_type;  /**< scan type, active or passive */
+    wifi_scan_time_t scan_time;  /**< scan time per channel */
+} wifi_scan_config_t;
+
+typedef enum {
+    WIFI_CIPHER_TYPE_NONE = 0,   /**< the cipher type is none */
+    WIFI_CIPHER_TYPE_WEP40,      /**< the cipher type is WEP40 */
+    WIFI_CIPHER_TYPE_WEP104,     /**< the cipher type is WEP104 */
+    WIFI_CIPHER_TYPE_TKIP,       /**< the cipher type is TKIP */
+    WIFI_CIPHER_TYPE_CCMP,       /**< the cipher type is CCMP */
+    WIFI_CIPHER_TYPE_TKIP_CCMP,  /**< the cipher type is TKIP and CCMP */
+    WIFI_CIPHER_TYPE_AES_CMAC128,/**< the cipher type is AES-CMAC-128 */
+    WIFI_CIPHER_TYPE_SMS4,       /**< the cipher type is SMS4 */
+    WIFI_CIPHER_TYPE_GCMP,       /**< the cipher type is GCMP */
+    WIFI_CIPHER_TYPE_GCMP256,    /**< the cipher type is GCMP-256 */
+    WIFI_CIPHER_TYPE_AES_GMAC128,/**< the cipher type is AES-GMAC-128 */
+    WIFI_CIPHER_TYPE_AES_GMAC256,/**< the cipher type is AES-GMAC-256 */
+    WIFI_CIPHER_TYPE_UNKNOWN,    /**< the cipher type is unknown */
+} wifi_cipher_type_t;
+
+/**
+  * @brief WiFi antenna
+  *
+  */
+typedef enum {
+    WIFI_ANT_ANT0,          /**< WiFi antenna 0 */
+    WIFI_ANT_ANT1,          /**< WiFi antenna 1 */
+    WIFI_ANT_MAX,           /**< Invalid WiFi antenna */
+} wifi_ant_t;
+
+/** @brief Description of a WiFi AP */
+typedef struct {
+    uint8_t bssid[6];                     /**< MAC address of AP */
+    uint8_t ssid[33];                     /**< SSID of AP */
+    uint8_t primary;                      /**< channel of AP */
+    wifi_second_chan_t second;            /**< secondary channel of AP */
+    int8_t  rssi;                         /**< signal strength of AP */
+    wifi_auth_mode_t authmode;            /**< authmode of AP */
+    wifi_cipher_type_t pairwise_cipher;   /**< pairwise cipher of AP */
+    wifi_cipher_type_t group_cipher;      /**< group cipher of AP */
+    wifi_ant_t ant;                       /**< antenna used to receive beacon from AP */
+    uint32_t phy_11b:1;                   /**< bit: 0 flag to identify if 11b mode is enabled or not */
+    uint32_t phy_11g:1;                   /**< bit: 1 flag to identify if 11g mode is enabled or not */
+    uint32_t phy_11n:1;                   /**< bit: 2 flag to identify if 11n mode is enabled or not */
+    uint32_t phy_lr:1;                    /**< bit: 3 flag to identify if low rate is enabled or not */
+    uint32_t wps:1;                       /**< bit: 4 flag to identify if WPS is supported or not */
+    uint32_t ftm_responder:1;             /**< bit: 5 flag to identify if FTM is supported in responder mode */
+    uint32_t ftm_initiator:1;             /**< bit: 6 flag to identify if FTM is supported in initiator mode */
+    uint32_t reserved:25;                 /**< bit: 7..31 reserved */
+    wifi_country_t country;               /**< country information of AP */
+} wifi_ap_record_t;
+
+typedef enum {
+    WIFI_FAST_SCAN = 0,                   /**< Do fast scan, scan will end after find SSID match AP */
+    WIFI_ALL_CHANNEL_SCAN,                /**< All channel scan, scan will end after scan all the channel */
+}wifi_scan_method_t;
+
+typedef enum {
+    WIFI_CONNECT_AP_BY_SIGNAL = 0,        /**< Sort match AP in scan list by RSSI */
+    WIFI_CONNECT_AP_BY_SECURITY,          /**< Sort match AP in scan list by security mode */
+}wifi_sort_method_t;
+
+/** @brief Structure describing parameters for a WiFi fast scan */
+typedef struct {
+    int8_t              rssi;             /**< The minimum rssi to accept in the fast scan mode */
+    wifi_auth_mode_t    authmode;         /**< The weakest authmode to accept in the fast scan mode */
+}wifi_scan_threshold_t;
+
+typedef enum {
+    WIFI_PS_NONE,        /**< No power save */
+    WIFI_PS_MIN_MODEM,   /**< Minimum modem power saving. In this mode, station wakes up to receive beacon every DTIM period */
+    WIFI_PS_MAX_MODEM,   /**< Maximum modem power saving. In this mode, interval to receive beacons is determined by the listen_interval parameter in wifi_sta_config_t */
+} wifi_ps_type_t;
+
+#define WIFI_PROTOCOL_11B         1
+#define WIFI_PROTOCOL_11G         2
+#define WIFI_PROTOCOL_11N         4
+#define WIFI_PROTOCOL_LR          8
+
+typedef enum {
+    WIFI_BW_HT20 = 1, /* Bandwidth is HT20 */
+    WIFI_BW_HT40,     /* Bandwidth is HT40 */
+} wifi_bandwidth_t;
+
+/** Configuration structure for Protected Management Frame */
+typedef struct {
+    bool capable;            /**< Deprecated variable. Device will always connect in PMF mode if other device also advertizes PMF capability. */
+    bool required;           /**< Advertizes that Protected Management Frame is required. Device will not associate to non-PMF capable devices. */
+} wifi_pmf_config_t;
+
+/** @brief Soft-AP configuration settings for the ESP32 */
+typedef struct {
+    uint8_t ssid[32];           /**< SSID of ESP32 soft-AP. If ssid_len field is 0, this must be a Null terminated string. Otherwise, length is set according to ssid_len. */
+    uint8_t password[64];       /**< Password of ESP32 soft-AP. */
+    uint8_t ssid_len;           /**< Optional length of SSID field. */
+    uint8_t channel;            /**< Channel of ESP32 soft-AP */
+    wifi_auth_mode_t authmode;  /**< Auth mode of ESP32 soft-AP. Do not support AUTH_WEP in soft-AP mode */
+    uint8_t ssid_hidden;        /**< Broadcast SSID or not, default 0, broadcast the SSID */
+    uint8_t max_connection;     /**< Max number of stations allowed to connect in, default 4, max 10 */
+    uint16_t beacon_interval;   /**< Beacon interval which should be multiples of 100. Unit: TU(time unit, 1 TU = 1024 us). Range: 100 ~ 60000. Default value: 100 */
+    wifi_cipher_type_t pairwise_cipher;   /**< pairwise cipher of SoftAP, group cipher will be derived using this. cipher values are valid starting from WIFI_CIPHER_TYPE_TKIP, enum values before that will be considered as invalid and default cipher suites(TKIP+CCMP) will be used. Valid cipher suites in softAP mode are WIFI_CIPHER_TYPE_TKIP, WIFI_CIPHER_TYPE_CCMP and WIFI_CIPHER_TYPE_TKIP_CCMP. */
+    bool ftm_responder;         /**< Enable FTM Responder mode */
+} wifi_ap_config_t;
+
+/** @brief STA configuration settings for the ESP32 */
+typedef struct {
+    uint8_t ssid[32];      /**< SSID of target AP. */
+    uint8_t password[64];  /**< Password of target AP. */
+    wifi_scan_method_t scan_method;    /**< do all channel scan or fast scan */
+    bool bssid_set;        /**< whether set MAC address of target AP or not. Generally, station_config.bssid_set needs to be 0; and it needs to be 1 only when users need to check the MAC address of the AP.*/
+    uint8_t bssid[6];     /**< MAC address of target AP*/
+    uint8_t channel;       /**< channel of target AP. Set to 1~13 to scan starting from the specified channel before connecting to AP. If the channel of AP is unknown, set it to 0.*/
+    uint16_t listen_interval;   /**< Listen interval for ESP32 station to receive beacon when WIFI_PS_MAX_MODEM is set. Units: AP beacon intervals. Defaults to 3 if set to 0. */
+    wifi_sort_method_t sort_method;    /**< sort the connect AP in the list by rssi or security mode */
+    wifi_scan_threshold_t  threshold;     /**< When sort_method is set, only APs which have an auth mode that is more secure than the selected auth mode and a signal stronger than the minimum RSSI will be used. */
+    wifi_pmf_config_t pmf_cfg;    /**< Configuration for Protected Management Frame. Will be advertized in RSN Capabilities in RSN IE. */
+    uint32_t rm_enabled:1;        /**< Whether Radio Measurements are enabled for the connection */
+    uint32_t btm_enabled:1;       /**< Whether BSS Transition Management is enabled for the connection */
+    uint32_t mbo_enabled:1;       /**< Whether MBO is enabled for the connection */
+    uint32_t reserved:29;         /**< Reserved for future feature set */
+} wifi_sta_config_t;
+
+/** @brief Configuration data for ESP32 AP or STA.
+ *
+ * The usage of this union (for ap or sta configuration) is determined by the accompanying
+ * interface argument passed to esp_wifi_set_config() or esp_wifi_get_config()
+ *
+ */
+typedef union {
+    wifi_ap_config_t  ap;  /**< configuration of AP */
+    wifi_sta_config_t sta; /**< configuration of STA */
+} wifi_config_t;
+
+/** @brief Description of STA associated with AP */
+typedef struct {
+    uint8_t mac[6];  /**< mac address */
+    int8_t  rssi;    /**< current average rssi of sta connected */
+    uint32_t phy_11b:1;      /**< bit: 0 flag to identify if 11b mode is enabled or not */
+    uint32_t phy_11g:1;      /**< bit: 1 flag to identify if 11g mode is enabled or not */
+    uint32_t phy_11n:1;      /**< bit: 2 flag to identify if 11n mode is enabled or not */
+    uint32_t phy_lr:1;       /**< bit: 3 flag to identify if low rate is enabled or not */
+    uint32_t is_mesh_child:1;/**< bit: 4 flag to identify mesh child */
+    uint32_t reserved:27;    /**< bit: 5..31 reserved */
+} wifi_sta_info_t;
+
+#define ESP_WIFI_MAX_CONN_NUM  (10)       /**< max number of stations which can connect to ESP32 soft-AP */
+
+/** @brief List of stations associated with the ESP32 Soft-AP */
+typedef struct {
+    wifi_sta_info_t sta[ESP_WIFI_MAX_CONN_NUM]; /**< station list */
+    int       num; /**< number of stations in the list (other entries are invalid) */
+} wifi_sta_list_t;
+
+typedef enum {
+    WIFI_STORAGE_FLASH,  /**< all configuration will store in both memory and flash */
+    WIFI_STORAGE_RAM,    /**< all configuration will only store in the memory */
+} wifi_storage_t;
+
+/**
+  * @brief     Vendor Information Element type
+  *
+  * Determines the frame type that the IE will be associated with.
+  */
+typedef enum {
+    WIFI_VND_IE_TYPE_BEACON,
+    WIFI_VND_IE_TYPE_PROBE_REQ,
+    WIFI_VND_IE_TYPE_PROBE_RESP,
+    WIFI_VND_IE_TYPE_ASSOC_REQ,
+    WIFI_VND_IE_TYPE_ASSOC_RESP,
+} wifi_vendor_ie_type_t;
+
+/**
+  * @brief     Vendor Information Element index
+  *
+  * Each IE type can have up to two associated vendor ID elements.
+  */
+typedef enum {
+    WIFI_VND_IE_ID_0,
+    WIFI_VND_IE_ID_1,
+} wifi_vendor_ie_id_t;
+
+#define WIFI_VENDOR_IE_ELEMENT_ID 0xDD
+
+/**
+ * @brief Vendor Information Element header
+ *
+ * The first bytes of the Information Element will match this header. Payload follows.
+ */
+typedef struct {
+    uint8_t element_id;      /**< Should be set to WIFI_VENDOR_IE_ELEMENT_ID (0xDD) */
+    uint8_t length;          /**< Length of all bytes in the element data following this field. Minimum 4. */
+    uint8_t vendor_oui[3];   /**< Vendor identifier (OUI). */
+    uint8_t vendor_oui_type; /**< Vendor-specific OUI type. */
+    uint8_t payload[0];      /**< Payload. Length is equal to value in 'length' field, minus 4. */
+} vendor_ie_data_t;
+
+/** @brief Received packet radio metadata header, this is the common header at the beginning of all promiscuous mode RX callback buffers */
+typedef struct {
+    signed rssi:8;                /**< Received Signal Strength Indicator(RSSI) of packet. unit: dBm */
+    unsigned rate:5;              /**< PHY rate encoding of the packet. Only valid for non HT(11bg) packet */
+    unsigned :1;                  /**< reserved */
+    unsigned sig_mode:2;          /**< 0: non HT(11bg) packet; 1: HT(11n) packet; 3: VHT(11ac) packet */
+    unsigned :16;                 /**< reserved */
+    unsigned mcs:7;               /**< Modulation Coding Scheme. If is HT(11n) packet, shows the modulation, range from 0 to 76(MSC0 ~ MCS76) */
+    unsigned cwb:1;               /**< Channel Bandwidth of the packet. 0: 20MHz; 1: 40MHz */
+    unsigned :16;                 /**< reserved */
+    unsigned smoothing:1;         /**< reserved */
+    unsigned not_sounding:1;      /**< reserved */
+    unsigned :1;                  /**< reserved */
+    unsigned aggregation:1;       /**< Aggregation. 0: MPDU packet; 1: AMPDU packet */
+    unsigned stbc:2;              /**< Space Time Block Code(STBC). 0: non STBC packet; 1: STBC packet */
+    unsigned fec_coding:1;        /**< Flag is set for 11n packets which are LDPC */
+    unsigned sgi:1;               /**< Short Guide Interval(SGI). 0: Long GI; 1: Short GI */
+#if CONFIG_IDF_TARGET_ESP32
+    signed noise_floor:8;         /**< noise floor of Radio Frequency Module(RF). unit: 0.25dBm*/
+#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
+    unsigned :8;                  /**< reserved */
+#endif
+    unsigned ampdu_cnt:8;         /**< ampdu cnt */
+    unsigned channel:4;           /**< primary channel on which this packet is received */
+    unsigned secondary_channel:4; /**< secondary channel on which this packet is received. 0: none; 1: above; 2: below */
+    unsigned :8;                  /**< reserved */
+    unsigned timestamp:32;        /**< timestamp. The local time when this packet is received. It is precise only if modem sleep or light sleep is not enabled. unit: microsecond */
+    unsigned :32;                 /**< reserved */
+#if CONFIG_IDF_TARGET_ESP32S2
+    unsigned :32;                 /**< reserved */
+#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
+    signed noise_floor:8;         /**< noise floor of Radio Frequency Module(RF). unit: 0.25dBm*/
+    unsigned :24;                 /**< reserved */
+    unsigned :32;                 /**< reserved */
+#endif
+    unsigned :31;                 /**< reserved */
+    unsigned ant:1;               /**< antenna number from which this packet is received. 0: WiFi antenna 0; 1: WiFi antenna 1 */
+#if CONFIG_IDF_TARGET_ESP32S2
+    signed noise_floor:8;         /**< noise floor of Radio Frequency Module(RF). unit: 0.25dBm*/
+    unsigned :24;                 /**< reserved */
+#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
+    unsigned :32;                 /**< reserved */
+    unsigned :32;                 /**< reserved */
+    unsigned :32;                 /**< reserved */
+#endif
+    unsigned sig_len:12;          /**< length of packet including Frame Check Sequence(FCS) */
+    unsigned :12;                 /**< reserved */
+    unsigned rx_state:8;          /**< state of the packet. 0: no error; others: error numbers which are not public */
+} wifi_pkt_rx_ctrl_t;
+
+/** @brief Payload passed to 'buf' parameter of promiscuous mode RX callback.
+ */
+typedef struct {
+    wifi_pkt_rx_ctrl_t rx_ctrl; /**< metadata header */
+    uint8_t payload[0];       /**< Data or management payload. Length of payload is described by rx_ctrl.sig_len. Type of content determined by packet type argument of callback. */
+} wifi_promiscuous_pkt_t;
+
+/**
+  * @brief Promiscuous frame type
+  *
+  * Passed to promiscuous mode RX callback to indicate the type of parameter in the buffer.
+  *
+  */
+typedef enum {
+    WIFI_PKT_MGMT,  /**< Management frame, indicates 'buf' argument is wifi_promiscuous_pkt_t */
+    WIFI_PKT_CTRL,  /**< Control frame, indicates 'buf' argument is wifi_promiscuous_pkt_t */
+    WIFI_PKT_DATA,  /**< Data frame, indiciates 'buf' argument is wifi_promiscuous_pkt_t */
+    WIFI_PKT_MISC,  /**< Other type, such as MIMO etc. 'buf' argument is wifi_promiscuous_pkt_t but the payload is zero length. */
+} wifi_promiscuous_pkt_type_t;
+
+
+#define WIFI_PROMIS_FILTER_MASK_ALL         (0xFFFFFFFF)  /**< filter all packets */
+#define WIFI_PROMIS_FILTER_MASK_MGMT        (1)           /**< filter the packets with type of WIFI_PKT_MGMT */
+#define WIFI_PROMIS_FILTER_MASK_CTRL        (1<<1)        /**< filter the packets with type of WIFI_PKT_CTRL */
+#define WIFI_PROMIS_FILTER_MASK_DATA        (1<<2)        /**< filter the packets with type of WIFI_PKT_DATA */
+#define WIFI_PROMIS_FILTER_MASK_MISC        (1<<3)        /**< filter the packets with type of WIFI_PKT_MISC */
+#define WIFI_PROMIS_FILTER_MASK_DATA_MPDU   (1<<4)        /**< filter the MPDU which is a kind of WIFI_PKT_DATA */
+#define WIFI_PROMIS_FILTER_MASK_DATA_AMPDU  (1<<5)        /**< filter the AMPDU which is a kind of WIFI_PKT_DATA */
+#define WIFI_PROMIS_FILTER_MASK_FCSFAIL     (1<<6)        /**< filter the FCS failed packets, do not open it in general */
+
+#define WIFI_PROMIS_CTRL_FILTER_MASK_ALL         (0xFF800000)  /**< filter all control packets */
+#define WIFI_PROMIS_CTRL_FILTER_MASK_WRAPPER     (1<<23)       /**< filter the control packets with subtype of Control Wrapper */
+#define WIFI_PROMIS_CTRL_FILTER_MASK_BAR         (1<<24)       /**< filter the control packets with subtype of Block Ack Request */
+#define WIFI_PROMIS_CTRL_FILTER_MASK_BA          (1<<25)       /**< filter the control packets with subtype of Block Ack */
+#define WIFI_PROMIS_CTRL_FILTER_MASK_PSPOLL      (1<<26)       /**< filter the control packets with subtype of PS-Poll */
+#define WIFI_PROMIS_CTRL_FILTER_MASK_RTS         (1<<27)       /**< filter the control packets with subtype of RTS */
+#define WIFI_PROMIS_CTRL_FILTER_MASK_CTS         (1<<28)       /**< filter the control packets with subtype of CTS */
+#define WIFI_PROMIS_CTRL_FILTER_MASK_ACK         (1<<29)       /**< filter the control packets with subtype of ACK */
+#define WIFI_PROMIS_CTRL_FILTER_MASK_CFEND       (1<<30)       /**< filter the control packets with subtype of CF-END */
+#define WIFI_PROMIS_CTRL_FILTER_MASK_CFENDACK    (1<<31)       /**< filter the control packets with subtype of CF-END+CF-ACK */
+
+/** @brief Mask for filtering different packet types in promiscuous mode. */
+typedef struct {
+    uint32_t filter_mask; /**< OR of one or more filter values WIFI_PROMIS_FILTER_* */
+} wifi_promiscuous_filter_t;
+
+#define WIFI_EVENT_MASK_ALL                 (0xFFFFFFFF)  /**< mask all WiFi events */
+#define WIFI_EVENT_MASK_NONE                (0)           /**< mask none of the WiFi events */
+#define WIFI_EVENT_MASK_AP_PROBEREQRECVED   (BIT(0))      /**< mask SYSTEM_EVENT_AP_PROBEREQRECVED event */
+
+/**
+  * @brief Channel state information(CSI) configuration type
+  *
+  */
+typedef struct {
+    bool lltf_en;           /**< enable to receive legacy long training field(lltf) data. Default enabled */
+    bool htltf_en;          /**< enable to receive HT long training field(htltf) data. Default enabled */
+    bool stbc_htltf2_en;    /**< enable to receive space time block code HT long training field(stbc-htltf2) data. Default enabled */
+    bool ltf_merge_en;      /**< enable to generate htlft data by averaging lltf and ht_ltf data when receiving HT packet. Otherwise, use ht_ltf data directly. Default enabled */
+    bool channel_filter_en; /**< enable to turn on channel filter to smooth adjacent sub-carrier. Disable it to keep independence of adjacent sub-carrier. Default enabled */
+    bool manu_scale;        /**< manually scale the CSI data by left shifting or automatically scale the CSI data. If set true, please set the shift bits. false: automatically. true: manually. Default false */
+    uint8_t shift;          /**< manually left shift bits of the scale of the CSI data. The range of the left shift bits is 0~15 */
+} wifi_csi_config_t;
+
+/**
+  * @brief CSI data type
+  *
+  */
+typedef struct {
+    wifi_pkt_rx_ctrl_t rx_ctrl;/**< received packet radio metadata header of the CSI data */
+    uint8_t mac[6];            /**< source MAC address of the CSI data */
+    bool first_word_invalid;   /**< first four bytes of the CSI data is invalid or not */
+    int8_t *buf;               /**< buffer of CSI data */
+    uint16_t len;              /**< length of CSI data */
+} wifi_csi_info_t;
+
+/**
+  * @brief WiFi GPIO configuration for antenna selection
+  *
+  */
+typedef struct {
+    uint8_t gpio_select: 1,           /**< Whether this GPIO is connected to external antenna switch */
+            gpio_num: 7;              /**< The GPIO number that connects to external antenna switch */
+} wifi_ant_gpio_t;
+
+/**
+  * @brief WiFi GPIOs configuration for antenna selection
+  *
+  */
+typedef struct {
+    wifi_ant_gpio_t  gpio_cfg[4];  /**< The configurations of GPIOs that connect to external antenna switch */
+} wifi_ant_gpio_config_t;
+
+/**
+  * @brief WiFi antenna mode
+  *
+  */
+typedef enum {
+    WIFI_ANT_MODE_ANT0,          /**< Enable WiFi antenna 0 only */
+    WIFI_ANT_MODE_ANT1,          /**< Enable WiFi antenna 1 only */
+    WIFI_ANT_MODE_AUTO,          /**< Enable WiFi antenna 0 and 1, automatically select an antenna */
+    WIFI_ANT_MODE_MAX,           /**< Invalid WiFi enabled antenna */
+} wifi_ant_mode_t;
+
+/**
+  * @brief WiFi antenna configuration
+  *
+  */
+typedef struct {
+    wifi_ant_mode_t rx_ant_mode;          /**< WiFi antenna mode for receiving */
+    wifi_ant_t      rx_ant_default;       /**< Default antenna mode for receiving, it's ignored if rx_ant_mode is not WIFI_ANT_MODE_AUTO */
+    wifi_ant_mode_t tx_ant_mode;          /**< WiFi antenna mode for transmission, it can be set to WIFI_ANT_MODE_AUTO only if rx_ant_mode is set to WIFI_ANT_MODE_AUTO */
+    uint8_t         enabled_ant0: 4,      /**< Index (in antenna GPIO configuration) of enabled WIFI_ANT_MODE_ANT0 */
+                    enabled_ant1: 4;      /**< Index (in antenna GPIO configuration) of enabled WIFI_ANT_MODE_ANT1 */
+} wifi_ant_config_t;
+
+/**
+  * @brief     The Rx callback function of Action Tx operations
+  *
+  * @param     hdr pointer to the IEEE 802.11 Header structure
+  * @param     payload pointer to the Payload following 802.11 Header
+  * @param     len length of the Payload
+  * @param     channel channel number the frame is received on
+  *
+  */
+typedef int (* wifi_action_rx_cb_t)(uint8_t *hdr, uint8_t *payload,
+                                    size_t len, uint8_t channel);
+
+/**
+ * @brief Action Frame Tx Request
+ *
+ *
+ */
+typedef struct {
+    wifi_interface_t ifx;       /**< WiFi interface to send request to */
+    uint8_t dest_mac[6];        /**< Destination MAC address */
+    bool no_ack;                /**< Indicates no ack required */
+    wifi_action_rx_cb_t rx_cb;  /**< Rx Callback to receive any response */
+    uint32_t data_len;          /**< Length of the appended Data */
+    uint8_t data[0];            /**< Appended Data payload */
+} wifi_action_tx_req_t;
+
+/**
+  * @brief FTM Initiator configuration
+  *
+  */
+typedef struct {
+    uint8_t resp_mac[6];        /**< MAC address of the FTM Responder */
+    uint8_t channel;            /**< Primary channel of the FTM Responder */
+    uint8_t frm_count;          /**< No. of FTM frames requested in terms of 4 or 8 bursts (allowed values - 0(No pref), 16, 24, 32, 64) */
+    uint16_t burst_period;      /**< Requested time period between consecutive FTM bursts in 100's of milliseconds (0 - No pref) */
+} wifi_ftm_initiator_cfg_t;
+
+/**
+  * @brief WiFi PHY rate encodings
+  *
+  */
+typedef enum {
+    WIFI_PHY_RATE_1M_L      = 0x00, /**< 1 Mbps with long preamble */
+    WIFI_PHY_RATE_2M_L      = 0x01, /**< 2 Mbps with long preamble */
+    WIFI_PHY_RATE_5M_L      = 0x02, /**< 5.5 Mbps with long preamble */
+    WIFI_PHY_RATE_11M_L     = 0x03, /**< 11 Mbps with long preamble */
+    WIFI_PHY_RATE_2M_S      = 0x05, /**< 2 Mbps with short preamble */
+    WIFI_PHY_RATE_5M_S      = 0x06, /**< 5.5 Mbps with short preamble */
+    WIFI_PHY_RATE_11M_S     = 0x07, /**< 11 Mbps with short preamble */
+    WIFI_PHY_RATE_48M       = 0x08, /**< 48 Mbps */
+    WIFI_PHY_RATE_24M       = 0x09, /**< 24 Mbps */
+    WIFI_PHY_RATE_12M       = 0x0A, /**< 12 Mbps */
+    WIFI_PHY_RATE_6M        = 0x0B, /**< 6 Mbps */
+    WIFI_PHY_RATE_54M       = 0x0C, /**< 54 Mbps */
+    WIFI_PHY_RATE_36M       = 0x0D, /**< 36 Mbps */
+    WIFI_PHY_RATE_18M       = 0x0E, /**< 18 Mbps */
+    WIFI_PHY_RATE_9M        = 0x0F, /**< 9 Mbps */
+    WIFI_PHY_RATE_MCS0_LGI  = 0x10, /**< MCS0 with long GI, 6.5 Mbps for 20MHz, 13.5 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS1_LGI  = 0x11, /**< MCS1 with long GI, 13 Mbps for 20MHz, 27 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS2_LGI  = 0x12, /**< MCS2 with long GI, 19.5 Mbps for 20MHz, 40.5 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS3_LGI  = 0x13, /**< MCS3 with long GI, 26 Mbps for 20MHz, 54 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS4_LGI  = 0x14, /**< MCS4 with long GI, 39 Mbps for 20MHz, 81 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS5_LGI  = 0x15, /**< MCS5 with long GI, 52 Mbps for 20MHz, 108 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS6_LGI  = 0x16, /**< MCS6 with long GI, 58.5 Mbps for 20MHz, 121.5 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS7_LGI  = 0x17, /**< MCS7 with long GI, 65 Mbps for 20MHz, 135 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS0_SGI  = 0x18, /**< MCS0 with short GI, 7.2 Mbps for 20MHz, 15 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS1_SGI  = 0x19, /**< MCS1 with short GI, 14.4 Mbps for 20MHz, 30 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS2_SGI  = 0x1A, /**< MCS2 with short GI, 21.7 Mbps for 20MHz, 45 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS3_SGI  = 0x1B, /**< MCS3 with short GI, 28.9 Mbps for 20MHz, 60 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS4_SGI  = 0x1C, /**< MCS4 with short GI, 43.3 Mbps for 20MHz, 90 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS5_SGI  = 0x1D, /**< MCS5 with short GI, 57.8 Mbps for 20MHz, 120 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS6_SGI  = 0x1E, /**< MCS6 with short GI, 65 Mbps for 20MHz, 135 Mbps for 40MHz */
+    WIFI_PHY_RATE_MCS7_SGI  = 0x1F, /**< MCS7 with short GI, 72.2 Mbps for 20MHz, 150 Mbps for 40MHz */
+    WIFI_PHY_RATE_LORA_250K = 0x29, /**< 250 Kbps */
+    WIFI_PHY_RATE_LORA_500K = 0x2A, /**< 500 Kbps */
+    WIFI_PHY_RATE_MAX,
+} wifi_phy_rate_t;
+
+
+/** WiFi event declarations */
+typedef enum {
+    WIFI_EVENT_WIFI_READY = 0,           /**< ESP32 WiFi ready */
+    WIFI_EVENT_SCAN_DONE,                /**< ESP32 finish scanning AP */
+    WIFI_EVENT_STA_START,                /**< ESP32 station start */
+    WIFI_EVENT_STA_STOP,                 /**< ESP32 station stop */
+    WIFI_EVENT_STA_CONNECTED,            /**< ESP32 station connected to AP */
+    WIFI_EVENT_STA_DISCONNECTED,         /**< ESP32 station disconnected from AP */
+    WIFI_EVENT_STA_AUTHMODE_CHANGE,      /**< the auth mode of AP connected by ESP32 station changed */
+
+    WIFI_EVENT_STA_WPS_ER_SUCCESS,       /**< ESP32 station wps succeeds in enrollee mode */
+    WIFI_EVENT_STA_WPS_ER_FAILED,        /**< ESP32 station wps fails in enrollee mode */
+    WIFI_EVENT_STA_WPS_ER_TIMEOUT,       /**< ESP32 station wps timeout in enrollee mode */
+    WIFI_EVENT_STA_WPS_ER_PIN,           /**< ESP32 station wps pin code in enrollee mode */
+    WIFI_EVENT_STA_WPS_ER_PBC_OVERLAP,   /**< ESP32 station wps overlap in enrollee mode */
+
+    WIFI_EVENT_AP_START,                 /**< ESP32 soft-AP start */
+    WIFI_EVENT_AP_STOP,                  /**< ESP32 soft-AP stop */
+    WIFI_EVENT_AP_STACONNECTED,          /**< a station connected to ESP32 soft-AP */
+    WIFI_EVENT_AP_STADISCONNECTED,       /**< a station disconnected from ESP32 soft-AP */
+    WIFI_EVENT_AP_PROBEREQRECVED,        /**< Receive probe request packet in soft-AP interface */
+
+    WIFI_EVENT_FTM_REPORT,               /**< Receive report of FTM procedure */
+
+    /* Add next events after this only */
+    WIFI_EVENT_STA_BSS_RSSI_LOW,         /**< AP's RSSI crossed configured threshold */
+    WIFI_EVENT_ACTION_TX_STATUS,         /**< Status indication of Action Tx operation */
+    WIFI_EVENT_ROC_DONE,                 /**< Remain-on-Channel operation complete */
+
+    WIFI_EVENT_STA_BEACON_TIMEOUT,       /**< ESP32 station beacon timeout */
+
+    WIFI_EVENT_MAX,                      /**< Invalid WiFi event ID */
+} wifi_event_t;
+
+/** @cond **/
+/** @brief WiFi event base declaration */
+ESP_EVENT_DECLARE_BASE(WIFI_EVENT);
+/** @endcond **/
+
+/** Argument structure for WIFI_EVENT_SCAN_DONE event */
+typedef struct {
+    uint32_t status;          /**< status of scanning APs: 0 — success, 1 - failure */
+    uint8_t  number;          /**< number of scan results */
+    uint8_t  scan_id;         /**< scan sequence number, used for block scan */
+} wifi_event_sta_scan_done_t;
+
+/** Argument structure for WIFI_EVENT_STA_CONNECTED event */
+typedef struct {
+    uint8_t ssid[32];         /**< SSID of connected AP */
+    uint8_t ssid_len;         /**< SSID length of connected AP */
+    uint8_t bssid[6];         /**< BSSID of connected AP*/
+    uint8_t channel;          /**< channel of connected AP*/
+    wifi_auth_mode_t authmode;/**< authentication mode used by AP*/
+} wifi_event_sta_connected_t;
+
+/** Argument structure for WIFI_EVENT_STA_DISCONNECTED event */
+typedef struct {
+    uint8_t ssid[32];         /**< SSID of disconnected AP */
+    uint8_t ssid_len;         /**< SSID length of disconnected AP */
+    uint8_t bssid[6];         /**< BSSID of disconnected AP */
+    uint8_t reason;           /**< reason of disconnection */
+} wifi_event_sta_disconnected_t;
+
+/** Argument structure for WIFI_EVENT_STA_AUTHMODE_CHANGE event */
+typedef struct {
+    wifi_auth_mode_t old_mode;         /**< the old auth mode of AP */
+    wifi_auth_mode_t new_mode;         /**< the new auth mode of AP */
+} wifi_event_sta_authmode_change_t;
+
+/** Argument structure for WIFI_EVENT_STA_WPS_ER_PIN event */
+typedef struct {
+    uint8_t pin_code[8];         /**< PIN code of station in enrollee mode */
+} wifi_event_sta_wps_er_pin_t;
+
+/** Argument structure for WIFI_EVENT_STA_WPS_ER_FAILED event */
+typedef enum {
+    WPS_FAIL_REASON_NORMAL = 0,     /**< ESP32 WPS normal fail reason */
+    WPS_FAIL_REASON_RECV_M2D,       /**< ESP32 WPS receive M2D frame */
+    WPS_FAIL_REASON_MAX
+} wifi_event_sta_wps_fail_reason_t;
+
+#define MAX_SSID_LEN        32
+#define MAX_PASSPHRASE_LEN  64
+#define MAX_WPS_AP_CRED     3
+
+/** Argument structure for WIFI_EVENT_STA_WPS_ER_SUCCESS event */
+typedef struct {
+    uint8_t ap_cred_cnt;                        /**< Number of AP credentials received */
+    struct {
+        uint8_t ssid[MAX_SSID_LEN];             /**< SSID of AP */
+        uint8_t passphrase[MAX_PASSPHRASE_LEN]; /**< Passphrase for the AP */
+    } ap_cred[MAX_WPS_AP_CRED];                 /**< All AP credentials received from WPS handshake */
+} wifi_event_sta_wps_er_success_t;
+
+/** Argument structure for WIFI_EVENT_AP_STACONNECTED event */
+typedef struct {
+    uint8_t mac[6];           /**< MAC address of the station connected to ESP32 soft-AP */
+    uint8_t aid;              /**< the aid that ESP32 soft-AP gives to the station connected to  */
+    bool is_mesh_child;       /**< flag to identify mesh child */
+} wifi_event_ap_staconnected_t;
+
+/** Argument structure for WIFI_EVENT_AP_STADISCONNECTED event */
+typedef struct {
+    uint8_t mac[6];           /**< MAC address of the station disconnects to ESP32 soft-AP */
+    uint8_t aid;              /**< the aid that ESP32 soft-AP gave to the station disconnects to  */
+    bool is_mesh_child;       /**< flag to identify mesh child */
+} wifi_event_ap_stadisconnected_t;
+
+/** Argument structure for WIFI_EVENT_AP_PROBEREQRECVED event */
+typedef struct {
+    int rssi;                 /**< Received probe request signal strength */
+    uint8_t mac[6];           /**< MAC address of the station which send probe request */
+} wifi_event_ap_probe_req_rx_t;
+
+/** Argument structure for WIFI_EVENT_STA_BSS_RSSI_LOW event */
+typedef struct {
+    int32_t rssi;                 /**< RSSI value of bss */
+} wifi_event_bss_rssi_low_t;
+
+/**
+  * @brief FTM operation status types
+  *
+  */
+typedef enum {
+    FTM_STATUS_SUCCESS = 0,     /**< FTM exchange is successful */
+    FTM_STATUS_UNSUPPORTED,     /**< Peer does not support FTM */
+    FTM_STATUS_CONF_REJECTED,   /**< Peer rejected FTM configuration in FTM Request */
+    FTM_STATUS_NO_RESPONSE,     /**< Peer did not respond to FTM Requests */
+    FTM_STATUS_FAIL,            /**< Unknown error during FTM exchange */
+} wifi_ftm_status_t;
+
+/** Argument structure for */
+typedef struct {
+    uint8_t dlog_token;     /**< Dialog Token of the FTM frame */
+    int8_t rssi;            /**< RSSI of the FTM frame received */
+    uint32_t rtt;           /**< Round Trip Time in pSec with a peer */
+    uint64_t t1;            /**< Time of departure of FTM frame from FTM Responder in pSec */
+    uint64_t t2;            /**< Time of arrival of FTM frame at FTM Initiator in pSec */
+    uint64_t t3;            /**< Time of departure of ACK from FTM Initiator in pSec */
+    uint64_t t4;            /**< Time of arrival of ACK at FTM Responder in pSec */
+} wifi_ftm_report_entry_t;
+
+/** Argument structure for WIFI_EVENT_FTM_REPORT event */
+typedef struct {
+    uint8_t peer_mac[6];                        /**< MAC address of the FTM Peer */
+    wifi_ftm_status_t status;                   /**< Status of the FTM operation */
+    uint32_t rtt_raw;                           /**< Raw average Round-Trip-Time with peer in Nano-Seconds */
+    uint32_t rtt_est;                           /**< Estimated Round-Trip-Time with peer in Nano-Seconds */
+    uint32_t dist_est;                          /**< Estimated one-way distance in Centi-Meters */
+    wifi_ftm_report_entry_t *ftm_report_data;   /**< Pointer to FTM Report with multiple entries, should be freed after use */
+    uint8_t ftm_report_num_entries;             /**< Number of entries in the FTM Report data */
+} wifi_event_ftm_report_t;
+
+#define WIFI_STATIS_BUFFER    (1<<0)
+#define WIFI_STATIS_RXTX      (1<<1)
+#define WIFI_STATIS_HW        (1<<2)
+#define WIFI_STATIS_DIAG      (1<<3)
+#define WIFI_STATIS_PS        (1<<4)
+#define WIFI_STATIS_ALL       (-1)
+
+/** Argument structure for WIFI_EVENT_ACTION_TX_STATUS event */
+typedef struct {
+    wifi_interface_t ifx;     /**< WiFi interface to send request to */
+    uint32_t context;         /**< Context to identify the request */
+    uint8_t da[6];            /**< Destination MAC address */
+    uint8_t status;           /**< Status of the operation */
+} wifi_event_action_tx_status_t;
+
+/** Argument structure for WIFI_EVENT_ROC_DONE event */
+typedef struct {
+    uint32_t context;         /**< Context to identify the request */
+} wifi_event_roc_done_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_WIFI_TYPES_H__ */
diff --git a/tools/sdk/esp32s3/include/esp_wifi/include/smartconfig_ack.h b/tools/sdk/esp32s3/include/esp_wifi/include/smartconfig_ack.h
new file mode 100644
index 00000000000..abfada3ffaa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/esp_wifi/include/smartconfig_ack.h
@@ -0,0 +1,44 @@
+// Copyright 2010-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef SMARTCONFIG_ACK_H
+#define SMARTCONFIG_ACK_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief  Send smartconfig ACK to cellphone.
+  *
+  * @attention The API can only be used when receiving SC_EVENT_GOT_SSID_PSWD event.
+  *
+  * @param  type: smartconfig type(ESPTouch or AirKiss);
+  *         token: token from the cellphone;
+  *         cellphone_ip: IP address of the cellphone;
+  *
+  * @return ESP_OK: succeed
+  *         others: fail
+  */
+esp_err_t sc_send_ack_start(smartconfig_type_t type, uint8_t token, uint8_t *cellphone_ip);
+
+/**
+  * @brief  Stop sending smartconfig ACK to cellphone.
+  */
+void sc_send_ack_stop(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/espcoredump/include/esp_core_dump.h b/tools/sdk/esp32s3/include/espcoredump/include/esp_core_dump.h
new file mode 100644
index 00000000000..40fd90d8b26
--- /dev/null
+++ b/tools/sdk/esp32s3/include/espcoredump/include/esp_core_dump.h
@@ -0,0 +1,166 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef ESP_CORE_DUMP_H_
+#define ESP_CORE_DUMP_H_
+
+#include "sdkconfig.h"
+#include <stddef.h>
+#include "esp_err.h"
+#include "esp_private/panic_internal.h"
+#include "esp_core_dump_summary_port.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define APP_ELF_SHA256_SZ (CONFIG_APP_RETRIEVE_LEN_ELF_SHA + 1)
+
+#if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
+
+/**
+ * @brief Core dump summary, Most meaningful contents of the core dump
+ *        are accommodated in this structure
+ */
+typedef struct {
+    uint32_t exc_tcb;                           /*!< TCB pointer to the task causing exception */
+    char exc_task[16];                          /*!< Name of the task that caused exception */
+    uint32_t exc_pc;                            /*!< Program counter for exception */
+    esp_core_dump_bt_info_t exc_bt_info;        /*!< Backtrace information for task causing exception */
+    uint32_t core_dump_version;                 /*!< Core dump version */
+    uint8_t app_elf_sha256[APP_ELF_SHA256_SZ];  /*!< Crashing application's SHA256 sum as a string */
+    esp_core_dump_summary_extra_info_t ex_info; /*!< Architecture specific extra data */
+} esp_core_dump_summary_t;
+
+#endif /* CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF */
+
+/**************************************************************************************/
+/******************************** EXCEPTION MODE API **********************************/
+/**************************************************************************************/
+
+/**
+ * @brief  Initializes core dump module internal data.
+ *
+ * @note  Should be called at system startup.
+ */
+void esp_core_dump_init(void);
+
+/**
+ * @brief  Saves core dump to flash.
+ *
+ * The structure of data stored in flash is as follows:
+ *
+ * |  TOTAL_LEN |  VERSION    | TASKS_NUM   | TCB_SIZE |
+ * | TCB_ADDR_1 | STACK_TOP_1 | STACK_END_1 | TCB_1    | STACK_1 |
+ * .            .       .         .
+ * .            .       .         .
+ * | TCB_ADDR_N | STACK_TOP_N | STACK_END_N | TCB_N    | STACK_N |
+ * |  CHECKSUM  |
+ *
+ * Core dump in flash consists of header and data for every task in the system at the moment of crash.
+ * For flash data integrity, a checksum is used at the end of core the dump data.
+ * The structure of core dump data is described below in details.
+ * 1) Core dump starts with header:
+ * 1.1) TOTAL_LEN is total length of core dump data in flash including the checksum. Size is 4 bytes.
+ * 1.2) VERSION field keeps 4 byte version of core dump.
+ * 1.2) TASKS_NUM is the number of tasks for which data are stored. Size is 4 bytes.
+ * 1.3) TCB_SIZE is the size of task's TCB structure. Size is 4 bytes.
+ * 2) Core dump header is followed by the data for every task in the system.
+ *    Task data are started with task header:
+ * 2.1) TCB_ADDR is the address of TCB in memory. Size is 4 bytes.
+ * 2.2) STACK_TOP is the top of task's stack (address of the topmost stack item). Size is 4 bytes.
+ * 2.2) STACK_END is the end of task's stack (address from which task's stack starts). Size is 4 bytes.
+ * 3) Task header is followed by TCB data. Size is TCB_SIZE bytes.
+ * 4) Task's stack is placed after TCB data. Size is (STACK_END - STACK_TOP) bytes.
+ * 5) The checksum is placed at the end of the data.
+ */
+void esp_core_dump_to_flash(panic_info_t *info);
+
+/**
+ * @brief  Print base64-encoded core dump to UART.
+ *
+ * The structure of core dump data is the same as for data stored in flash (@see esp_core_dump_to_flash) with some notes:
+ * 1) The checksum is not present in core dump printed to UART.
+ * 2) Since checksum is omitted TOTAL_LEN does not include its size.
+ * 3) Printed base64 data are surrounded with special messages to help user recognize the start and end of actual data.
+ */
+void esp_core_dump_to_uart(panic_info_t *info);
+
+/**************************************************************************************/
+/*********************************** USER MODE API ************************************/
+/**************************************************************************************/
+
+/**
+ * @brief  Check integrity of coredump data in flash.
+ *         This function reads the coredump data while calculating their checksum. If it
+ *         doesn't match the checksum written on flash, it means data are corrupted,
+ *         an error will be returned. Else, ESP_OK is returned.
+ *
+ * @return `ESP_OK` if core dump is present and valid, `ESP_ERR_NOT_FOUND` if no core dump
+ *         is stored in the partition, `ESP_ERR_INVALID_SIZE` or `ESP_ERR_INVALID_CRC`
+ *         if the core dump is corrupted, other errors when unable to access flash, in that
+ *         case please refer to \see esp_err_t
+ */
+esp_err_t esp_core_dump_image_check(void);
+
+/**
+ * @brief  Retrieves address and size of coredump data in flash.
+ *         This function is always available, even when core dump is disabled in menuconfig.
+ *
+ * @param  out_addr   pointer to store image address in flash.
+ * @param  out_size   pointer to store image size in flash (including checksum). In bytes.
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ */
+esp_err_t esp_core_dump_image_get(size_t* out_addr, size_t *out_size);
+
+/**
+ * @brief  Erases coredump data in flash. esp_core_dump_image_get() will then return
+ *         ESP_ERR_NOT_FOUND. Can be used after a coredump has been transmitted successfully.
+ *         This function is always available, even when core dump is disabled in menuconfig.
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ */
+esp_err_t esp_core_dump_image_erase(void);
+
+#if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
+
+/**
+ * @brief  Get the summary of a core dump.
+ *
+ * @param  summary   Summary of the core dump
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ *
+ * @note  This function works only if coredump is stored in flash and in ELF format
+ *
+ * Example usage:
+ * @code{c}
+ *  esp_core_dump_summary_t *summary = malloc(sizeof(esp_core_dump_summary_t));
+ *  if (summary) {
+ *      if (esp_core_dump_get_summary(summary) == ESP_OK) {
+ *          // Do stuff
+ *      }
+ *  }
+ *  free(summary);
+ * @endcode
+ */
+esp_err_t esp_core_dump_get_summary(esp_core_dump_summary_t *summary);
+
+#endif /* CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/espcoredump/include/port/riscv/esp_core_dump_summary_port.h b/tools/sdk/esp32s3/include/espcoredump/include/port/riscv/esp_core_dump_summary_port.h
new file mode 100644
index 00000000000..f2b5d0d9e61
--- /dev/null
+++ b/tools/sdk/esp32s3/include/espcoredump/include/port/riscv/esp_core_dump_summary_port.h
@@ -0,0 +1,55 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include "sdkconfig.h"
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
+
+/**
+ * @brief Backtrace information
+ *
+ * For RISCV, backtrace cannot be generated on device without including and parsing
+ * DWARF sections. Including these sections would increase the binary size so provide
+ * the stackdump that can be later used to generate backtrace with the help of GDB or by parsing the ELF file
+ * on the host machine
+ */
+typedef struct {
+    uint8_t stackdump[CONFIG_ESP_COREDUMP_SUMMARY_STACKDUMP_SIZE];    /*!< Stack dump of the crashing task. */
+    uint32_t dump_size;                                               /*!< Size (in bytes) of the stack dump */
+} esp_core_dump_bt_info_t;
+
+/**
+ * @brief RISC-V architecture specific extra information
+ */
+typedef struct {
+    uint32_t mstatus;     /* Machine Status */
+    uint32_t mtvec;       /* Machine Trap-Vector Base Address */
+    uint32_t mcause;      /* Machine Trap Cause */
+    uint32_t mtval;       /* Machine Trap Value */
+    uint32_t ra;          /* Return Address */
+    uint32_t sp;          /* Stack pointer */
+    uint32_t exc_a[8];    /* A0-A7 registers when the exception caused */
+} esp_core_dump_summary_extra_info_t;
+
+#endif /* CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/espcoredump/include/port/xtensa/esp_core_dump_summary_port.h b/tools/sdk/esp32s3/include/espcoredump/include/port/xtensa/esp_core_dump_summary_port.h
new file mode 100644
index 00000000000..815c1fff702
--- /dev/null
+++ b/tools/sdk/esp32s3/include/espcoredump/include/port/xtensa/esp_core_dump_summary_port.h
@@ -0,0 +1,54 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include "sdkconfig.h"
+#include <stdint.h>
+#include <xtensa/config/core-isa.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
+
+#define EPCx_REGISTER_COUNT XCHAL_NUM_INTLEVELS
+
+/**
+ * @brief Backtrace information.
+ *
+ * For Xtensa, backtrace can be generated on device due to windowed register ABI.
+ */
+typedef struct {
+    uint32_t bt[16];        /*!< Backtrace (array of PC) */
+    uint32_t depth;         /*!< Number of backtrace entries */
+    bool corrupted;         /*!< Status flag for backtrace is corrupt or not */
+} esp_core_dump_bt_info_t;
+
+/**
+ * @brief Xtensa architecture specific extra information
+ */
+typedef struct {
+    uint32_t exc_cause;                 /*!< Cause of exception */
+    uint32_t exc_vaddr;                 /*!< Virtual address of exception */
+    uint32_t exc_a[16];                 /*!< a register set when the exception caused */
+    uint32_t epcx[EPCx_REGISTER_COUNT]; /*!< PC register address at exception level(1 to 7) */
+    uint8_t epcx_reg_bits;              /*!< Bit mask of available EPCx registers */
+} esp_core_dump_summary_extra_info_t;
+
+#endif /* CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/ascii.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/ascii.h
new file mode 100644
index 00000000000..1f594d2e54b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/ascii.h
@@ -0,0 +1,123 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 1999-2000 Thai Open Source Software Center Ltd
+   Copyright (c) 2000      Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2002      Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
+   Copyright (c) 2007      Karl Waclawek <karl@waclawek.net>
+   Copyright (c) 2017      Sebastian Pipping <sebastian@pipping.org>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+#define ASCII_A 0x41
+#define ASCII_B 0x42
+#define ASCII_C 0x43
+#define ASCII_D 0x44
+#define ASCII_E 0x45
+#define ASCII_F 0x46
+#define ASCII_G 0x47
+#define ASCII_H 0x48
+#define ASCII_I 0x49
+#define ASCII_J 0x4A
+#define ASCII_K 0x4B
+#define ASCII_L 0x4C
+#define ASCII_M 0x4D
+#define ASCII_N 0x4E
+#define ASCII_O 0x4F
+#define ASCII_P 0x50
+#define ASCII_Q 0x51
+#define ASCII_R 0x52
+#define ASCII_S 0x53
+#define ASCII_T 0x54
+#define ASCII_U 0x55
+#define ASCII_V 0x56
+#define ASCII_W 0x57
+#define ASCII_X 0x58
+#define ASCII_Y 0x59
+#define ASCII_Z 0x5A
+
+#define ASCII_a 0x61
+#define ASCII_b 0x62
+#define ASCII_c 0x63
+#define ASCII_d 0x64
+#define ASCII_e 0x65
+#define ASCII_f 0x66
+#define ASCII_g 0x67
+#define ASCII_h 0x68
+#define ASCII_i 0x69
+#define ASCII_j 0x6A
+#define ASCII_k 0x6B
+#define ASCII_l 0x6C
+#define ASCII_m 0x6D
+#define ASCII_n 0x6E
+#define ASCII_o 0x6F
+#define ASCII_p 0x70
+#define ASCII_q 0x71
+#define ASCII_r 0x72
+#define ASCII_s 0x73
+#define ASCII_t 0x74
+#define ASCII_u 0x75
+#define ASCII_v 0x76
+#define ASCII_w 0x77
+#define ASCII_x 0x78
+#define ASCII_y 0x79
+#define ASCII_z 0x7A
+
+#define ASCII_0 0x30
+#define ASCII_1 0x31
+#define ASCII_2 0x32
+#define ASCII_3 0x33
+#define ASCII_4 0x34
+#define ASCII_5 0x35
+#define ASCII_6 0x36
+#define ASCII_7 0x37
+#define ASCII_8 0x38
+#define ASCII_9 0x39
+
+#define ASCII_TAB 0x09
+#define ASCII_SPACE 0x20
+#define ASCII_EXCL 0x21
+#define ASCII_QUOT 0x22
+#define ASCII_AMP 0x26
+#define ASCII_APOS 0x27
+#define ASCII_MINUS 0x2D
+#define ASCII_PERIOD 0x2E
+#define ASCII_COLON 0x3A
+#define ASCII_SEMI 0x3B
+#define ASCII_LT 0x3C
+#define ASCII_EQUALS 0x3D
+#define ASCII_GT 0x3E
+#define ASCII_LSQB 0x5B
+#define ASCII_RSQB 0x5D
+#define ASCII_UNDERSCORE 0x5F
+#define ASCII_LPAREN 0x28
+#define ASCII_RPAREN 0x29
+#define ASCII_FF 0x0C
+#define ASCII_SLASH 0x2F
+#define ASCII_HASH 0x23
+#define ASCII_PIPE 0x7C
+#define ASCII_COMMA 0x2C
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/asciitab.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/asciitab.h
new file mode 100644
index 00000000000..af766fb2478
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/asciitab.h
@@ -0,0 +1,66 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 1997-2000 Thai Open Source Software Center Ltd
+   Copyright (c) 2000      Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2002      Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
+   Copyright (c) 2017      Sebastian Pipping <sebastian@pipping.org>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+/* 0x00 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x04 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x08 */ BT_NONXML, BT_S, BT_LF, BT_NONXML,
+    /* 0x0C */ BT_NONXML, BT_CR, BT_NONXML, BT_NONXML,
+    /* 0x10 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x14 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x18 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x1C */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x20 */ BT_S, BT_EXCL, BT_QUOT, BT_NUM,
+    /* 0x24 */ BT_OTHER, BT_PERCNT, BT_AMP, BT_APOS,
+    /* 0x28 */ BT_LPAR, BT_RPAR, BT_AST, BT_PLUS,
+    /* 0x2C */ BT_COMMA, BT_MINUS, BT_NAME, BT_SOL,
+    /* 0x30 */ BT_DIGIT, BT_DIGIT, BT_DIGIT, BT_DIGIT,
+    /* 0x34 */ BT_DIGIT, BT_DIGIT, BT_DIGIT, BT_DIGIT,
+    /* 0x38 */ BT_DIGIT, BT_DIGIT, BT_COLON, BT_SEMI,
+    /* 0x3C */ BT_LT, BT_EQUALS, BT_GT, BT_QUEST,
+    /* 0x40 */ BT_OTHER, BT_HEX, BT_HEX, BT_HEX,
+    /* 0x44 */ BT_HEX, BT_HEX, BT_HEX, BT_NMSTRT,
+    /* 0x48 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x4C */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x50 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x54 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x58 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_LSQB,
+    /* 0x5C */ BT_OTHER, BT_RSQB, BT_OTHER, BT_NMSTRT,
+    /* 0x60 */ BT_OTHER, BT_HEX, BT_HEX, BT_HEX,
+    /* 0x64 */ BT_HEX, BT_HEX, BT_HEX, BT_NMSTRT,
+    /* 0x68 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x6C */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x70 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x74 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x78 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_OTHER,
+    /* 0x7C */ BT_VERBAR, BT_OTHER, BT_OTHER, BT_OTHER,
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/expat.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/expat.h
new file mode 100644
index 00000000000..0f021e25def
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/expat.h
@@ -0,0 +1,1050 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 1997-2000 Thai Open Source Software Center Ltd
+   Copyright (c) 2000      Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2000-2005 Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
+   Copyright (c) 2001-2002 Greg Stein <gstein@users.sourceforge.net>
+   Copyright (c) 2002-2016 Karl Waclawek <karl@waclawek.net>
+   Copyright (c) 2016-2022 Sebastian Pipping <sebastian@pipping.org>
+   Copyright (c) 2016      Cristian Rodríguez <crrodriguez@opensuse.org>
+   Copyright (c) 2016      Thomas Beutlich <tc@tbeu.de>
+   Copyright (c) 2017      Rhodri James <rhodri@wildebeest.org.uk>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+#ifndef Expat_INCLUDED
+#define Expat_INCLUDED 1
+
+#include <stdlib.h>
+#include "expat_external.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct XML_ParserStruct;
+typedef struct XML_ParserStruct *XML_Parser;
+
+typedef unsigned char XML_Bool;
+#define XML_TRUE ((XML_Bool)1)
+#define XML_FALSE ((XML_Bool)0)
+
+/* The XML_Status enum gives the possible return values for several
+   API functions.  The preprocessor #defines are included so this
+   stanza can be added to code that still needs to support older
+   versions of Expat 1.95.x:
+
+   #ifndef XML_STATUS_OK
+   #define XML_STATUS_OK    1
+   #define XML_STATUS_ERROR 0
+   #endif
+
+   Otherwise, the #define hackery is quite ugly and would have been
+   dropped.
+*/
+enum XML_Status {
+  XML_STATUS_ERROR = 0,
+#define XML_STATUS_ERROR XML_STATUS_ERROR
+  XML_STATUS_OK = 1,
+#define XML_STATUS_OK XML_STATUS_OK
+  XML_STATUS_SUSPENDED = 2
+#define XML_STATUS_SUSPENDED XML_STATUS_SUSPENDED
+};
+
+enum XML_Error {
+  XML_ERROR_NONE,
+  XML_ERROR_NO_MEMORY,
+  XML_ERROR_SYNTAX,
+  XML_ERROR_NO_ELEMENTS,
+  XML_ERROR_INVALID_TOKEN,
+  XML_ERROR_UNCLOSED_TOKEN,
+  XML_ERROR_PARTIAL_CHAR,
+  XML_ERROR_TAG_MISMATCH,
+  XML_ERROR_DUPLICATE_ATTRIBUTE,
+  XML_ERROR_JUNK_AFTER_DOC_ELEMENT,
+  XML_ERROR_PARAM_ENTITY_REF,
+  XML_ERROR_UNDEFINED_ENTITY,
+  XML_ERROR_RECURSIVE_ENTITY_REF,
+  XML_ERROR_ASYNC_ENTITY,
+  XML_ERROR_BAD_CHAR_REF,
+  XML_ERROR_BINARY_ENTITY_REF,
+  XML_ERROR_ATTRIBUTE_EXTERNAL_ENTITY_REF,
+  XML_ERROR_MISPLACED_XML_PI,
+  XML_ERROR_UNKNOWN_ENCODING,
+  XML_ERROR_INCORRECT_ENCODING,
+  XML_ERROR_UNCLOSED_CDATA_SECTION,
+  XML_ERROR_EXTERNAL_ENTITY_HANDLING,
+  XML_ERROR_NOT_STANDALONE,
+  XML_ERROR_UNEXPECTED_STATE,
+  XML_ERROR_ENTITY_DECLARED_IN_PE,
+  XML_ERROR_FEATURE_REQUIRES_XML_DTD,
+  XML_ERROR_CANT_CHANGE_FEATURE_ONCE_PARSING,
+  /* Added in 1.95.7. */
+  XML_ERROR_UNBOUND_PREFIX,
+  /* Added in 1.95.8. */
+  XML_ERROR_UNDECLARING_PREFIX,
+  XML_ERROR_INCOMPLETE_PE,
+  XML_ERROR_XML_DECL,
+  XML_ERROR_TEXT_DECL,
+  XML_ERROR_PUBLICID,
+  XML_ERROR_SUSPENDED,
+  XML_ERROR_NOT_SUSPENDED,
+  XML_ERROR_ABORTED,
+  XML_ERROR_FINISHED,
+  XML_ERROR_SUSPEND_PE,
+  /* Added in 2.0. */
+  XML_ERROR_RESERVED_PREFIX_XML,
+  XML_ERROR_RESERVED_PREFIX_XMLNS,
+  XML_ERROR_RESERVED_NAMESPACE_URI,
+  /* Added in 2.2.1. */
+  XML_ERROR_INVALID_ARGUMENT,
+  /* Added in 2.3.0. */
+  XML_ERROR_NO_BUFFER,
+  /* Added in 2.4.0. */
+  XML_ERROR_AMPLIFICATION_LIMIT_BREACH
+};
+
+enum XML_Content_Type {
+  XML_CTYPE_EMPTY = 1,
+  XML_CTYPE_ANY,
+  XML_CTYPE_MIXED,
+  XML_CTYPE_NAME,
+  XML_CTYPE_CHOICE,
+  XML_CTYPE_SEQ
+};
+
+enum XML_Content_Quant {
+  XML_CQUANT_NONE,
+  XML_CQUANT_OPT,
+  XML_CQUANT_REP,
+  XML_CQUANT_PLUS
+};
+
+/* If type == XML_CTYPE_EMPTY or XML_CTYPE_ANY, then quant will be
+   XML_CQUANT_NONE, and the other fields will be zero or NULL.
+   If type == XML_CTYPE_MIXED, then quant will be NONE or REP and
+   numchildren will contain number of elements that may be mixed in
+   and children point to an array of XML_Content cells that will be
+   all of XML_CTYPE_NAME type with no quantification.
+
+   If type == XML_CTYPE_NAME, then the name points to the name, and
+   the numchildren field will be zero and children will be NULL. The
+   quant fields indicates any quantifiers placed on the name.
+
+   CHOICE and SEQ will have name NULL, the number of children in
+   numchildren and children will point, recursively, to an array
+   of XML_Content cells.
+
+   The EMPTY, ANY, and MIXED types will only occur at top level.
+*/
+
+typedef struct XML_cp XML_Content;
+
+struct XML_cp {
+  enum XML_Content_Type type;
+  enum XML_Content_Quant quant;
+  XML_Char *name;
+  unsigned int numchildren;
+  XML_Content *children;
+};
+
+/* This is called for an element declaration. See above for
+   description of the model argument. It's the caller's responsibility
+   to free model when finished with it.
+*/
+typedef void(XMLCALL *XML_ElementDeclHandler)(void *userData,
+                                              const XML_Char *name,
+                                              XML_Content *model);
+
+XMLPARSEAPI(void)
+XML_SetElementDeclHandler(XML_Parser parser, XML_ElementDeclHandler eldecl);
+
+/* The Attlist declaration handler is called for *each* attribute. So
+   a single Attlist declaration with multiple attributes declared will
+   generate multiple calls to this handler. The "default" parameter
+   may be NULL in the case of the "#IMPLIED" or "#REQUIRED"
+   keyword. The "isrequired" parameter will be true and the default
+   value will be NULL in the case of "#REQUIRED". If "isrequired" is
+   true and default is non-NULL, then this is a "#FIXED" default.
+*/
+typedef void(XMLCALL *XML_AttlistDeclHandler)(
+    void *userData, const XML_Char *elname, const XML_Char *attname,
+    const XML_Char *att_type, const XML_Char *dflt, int isrequired);
+
+XMLPARSEAPI(void)
+XML_SetAttlistDeclHandler(XML_Parser parser, XML_AttlistDeclHandler attdecl);
+
+/* The XML declaration handler is called for *both* XML declarations
+   and text declarations. The way to distinguish is that the version
+   parameter will be NULL for text declarations. The encoding
+   parameter may be NULL for XML declarations. The standalone
+   parameter will be -1, 0, or 1 indicating respectively that there
+   was no standalone parameter in the declaration, that it was given
+   as no, or that it was given as yes.
+*/
+typedef void(XMLCALL *XML_XmlDeclHandler)(void *userData,
+                                          const XML_Char *version,
+                                          const XML_Char *encoding,
+                                          int standalone);
+
+XMLPARSEAPI(void)
+XML_SetXmlDeclHandler(XML_Parser parser, XML_XmlDeclHandler xmldecl);
+
+typedef struct {
+  void *(*malloc_fcn)(size_t size);
+  void *(*realloc_fcn)(void *ptr, size_t size);
+  void (*free_fcn)(void *ptr);
+} XML_Memory_Handling_Suite;
+
+/* Constructs a new parser; encoding is the encoding specified by the
+   external protocol or NULL if there is none specified.
+*/
+XMLPARSEAPI(XML_Parser)
+XML_ParserCreate(const XML_Char *encoding);
+
+/* Constructs a new parser and namespace processor.  Element type
+   names and attribute names that belong to a namespace will be
+   expanded; unprefixed attribute names are never expanded; unprefixed
+   element type names are expanded only if there is a default
+   namespace. The expanded name is the concatenation of the namespace
+   URI, the namespace separator character, and the local part of the
+   name.  If the namespace separator is '\0' then the namespace URI
+   and the local part will be concatenated without any separator.
+   It is a programming error to use the separator '\0' with namespace
+   triplets (see XML_SetReturnNSTriplet).
+*/
+XMLPARSEAPI(XML_Parser)
+XML_ParserCreateNS(const XML_Char *encoding, XML_Char namespaceSeparator);
+
+/* Constructs a new parser using the memory management suite referred to
+   by memsuite. If memsuite is NULL, then use the standard library memory
+   suite. If namespaceSeparator is non-NULL it creates a parser with
+   namespace processing as described above. The character pointed at
+   will serve as the namespace separator.
+
+   All further memory operations used for the created parser will come from
+   the given suite.
+*/
+XMLPARSEAPI(XML_Parser)
+XML_ParserCreate_MM(const XML_Char *encoding,
+                    const XML_Memory_Handling_Suite *memsuite,
+                    const XML_Char *namespaceSeparator);
+
+/* Prepare a parser object to be re-used.  This is particularly
+   valuable when memory allocation overhead is disproportionately high,
+   such as when a large number of small documnents need to be parsed.
+   All handlers are cleared from the parser, except for the
+   unknownEncodingHandler. The parser's external state is re-initialized
+   except for the values of ns and ns_triplets.
+
+   Added in Expat 1.95.3.
+*/
+XMLPARSEAPI(XML_Bool)
+XML_ParserReset(XML_Parser parser, const XML_Char *encoding);
+
+/* atts is array of name/value pairs, terminated by 0;
+   names and values are 0 terminated.
+*/
+typedef void(XMLCALL *XML_StartElementHandler)(void *userData,
+                                               const XML_Char *name,
+                                               const XML_Char **atts);
+
+typedef void(XMLCALL *XML_EndElementHandler)(void *userData,
+                                             const XML_Char *name);
+
+/* s is not 0 terminated. */
+typedef void(XMLCALL *XML_CharacterDataHandler)(void *userData,
+                                                const XML_Char *s, int len);
+
+/* target and data are 0 terminated */
+typedef void(XMLCALL *XML_ProcessingInstructionHandler)(void *userData,
+                                                        const XML_Char *target,
+                                                        const XML_Char *data);
+
+/* data is 0 terminated */
+typedef void(XMLCALL *XML_CommentHandler)(void *userData, const XML_Char *data);
+
+typedef void(XMLCALL *XML_StartCdataSectionHandler)(void *userData);
+typedef void(XMLCALL *XML_EndCdataSectionHandler)(void *userData);
+
+/* This is called for any characters in the XML document for which
+   there is no applicable handler.  This includes both characters that
+   are part of markup which is of a kind that is not reported
+   (comments, markup declarations), or characters that are part of a
+   construct which could be reported but for which no handler has been
+   supplied. The characters are passed exactly as they were in the XML
+   document except that they will be encoded in UTF-8 or UTF-16.
+   Line boundaries are not normalized. Note that a byte order mark
+   character is not passed to the default handler. There are no
+   guarantees about how characters are divided between calls to the
+   default handler: for example, a comment might be split between
+   multiple calls.
+*/
+typedef void(XMLCALL *XML_DefaultHandler)(void *userData, const XML_Char *s,
+                                          int len);
+
+/* This is called for the start of the DOCTYPE declaration, before
+   any DTD or internal subset is parsed.
+*/
+typedef void(XMLCALL *XML_StartDoctypeDeclHandler)(void *userData,
+                                                   const XML_Char *doctypeName,
+                                                   const XML_Char *sysid,
+                                                   const XML_Char *pubid,
+                                                   int has_internal_subset);
+
+/* This is called for the start of the DOCTYPE declaration when the
+   closing > is encountered, but after processing any external
+   subset.
+*/
+typedef void(XMLCALL *XML_EndDoctypeDeclHandler)(void *userData);
+
+/* This is called for entity declarations. The is_parameter_entity
+   argument will be non-zero if the entity is a parameter entity, zero
+   otherwise.
+
+   For internal entities (<!ENTITY foo "bar">), value will
+   be non-NULL and systemId, publicID, and notationName will be NULL.
+   The value string is NOT null-terminated; the length is provided in
+   the value_length argument. Since it is legal to have zero-length
+   values, do not use this argument to test for internal entities.
+
+   For external entities, value will be NULL and systemId will be
+   non-NULL. The publicId argument will be NULL unless a public
+   identifier was provided. The notationName argument will have a
+   non-NULL value only for unparsed entity declarations.
+
+   Note that is_parameter_entity can't be changed to XML_Bool, since
+   that would break binary compatibility.
+*/
+typedef void(XMLCALL *XML_EntityDeclHandler)(
+    void *userData, const XML_Char *entityName, int is_parameter_entity,
+    const XML_Char *value, int value_length, const XML_Char *base,
+    const XML_Char *systemId, const XML_Char *publicId,
+    const XML_Char *notationName);
+
+XMLPARSEAPI(void)
+XML_SetEntityDeclHandler(XML_Parser parser, XML_EntityDeclHandler handler);
+
+/* OBSOLETE -- OBSOLETE -- OBSOLETE
+   This handler has been superseded by the EntityDeclHandler above.
+   It is provided here for backward compatibility.
+
+   This is called for a declaration of an unparsed (NDATA) entity.
+   The base argument is whatever was set by XML_SetBase. The
+   entityName, systemId and notationName arguments will never be
+   NULL. The other arguments may be.
+*/
+typedef void(XMLCALL *XML_UnparsedEntityDeclHandler)(
+    void *userData, const XML_Char *entityName, const XML_Char *base,
+    const XML_Char *systemId, const XML_Char *publicId,
+    const XML_Char *notationName);
+
+/* This is called for a declaration of notation.  The base argument is
+   whatever was set by XML_SetBase. The notationName will never be
+   NULL.  The other arguments can be.
+*/
+typedef void(XMLCALL *XML_NotationDeclHandler)(void *userData,
+                                               const XML_Char *notationName,
+                                               const XML_Char *base,
+                                               const XML_Char *systemId,
+                                               const XML_Char *publicId);
+
+/* When namespace processing is enabled, these are called once for
+   each namespace declaration. The call to the start and end element
+   handlers occur between the calls to the start and end namespace
+   declaration handlers. For an xmlns attribute, prefix will be
+   NULL.  For an xmlns="" attribute, uri will be NULL.
+*/
+typedef void(XMLCALL *XML_StartNamespaceDeclHandler)(void *userData,
+                                                     const XML_Char *prefix,
+                                                     const XML_Char *uri);
+
+typedef void(XMLCALL *XML_EndNamespaceDeclHandler)(void *userData,
+                                                   const XML_Char *prefix);
+
+/* This is called if the document is not standalone, that is, it has an
+   external subset or a reference to a parameter entity, but does not
+   have standalone="yes". If this handler returns XML_STATUS_ERROR,
+   then processing will not continue, and the parser will return a
+   XML_ERROR_NOT_STANDALONE error.
+   If parameter entity parsing is enabled, then in addition to the
+   conditions above this handler will only be called if the referenced
+   entity was actually read.
+*/
+typedef int(XMLCALL *XML_NotStandaloneHandler)(void *userData);
+
+/* This is called for a reference to an external parsed general
+   entity.  The referenced entity is not automatically parsed.  The
+   application can parse it immediately or later using
+   XML_ExternalEntityParserCreate.
+
+   The parser argument is the parser parsing the entity containing the
+   reference; it can be passed as the parser argument to
+   XML_ExternalEntityParserCreate.  The systemId argument is the
+   system identifier as specified in the entity declaration; it will
+   not be NULL.
+
+   The base argument is the system identifier that should be used as
+   the base for resolving systemId if systemId was relative; this is
+   set by XML_SetBase; it may be NULL.
+
+   The publicId argument is the public identifier as specified in the
+   entity declaration, or NULL if none was specified; the whitespace
+   in the public identifier will have been normalized as required by
+   the XML spec.
+
+   The context argument specifies the parsing context in the format
+   expected by the context argument to XML_ExternalEntityParserCreate;
+   context is valid only until the handler returns, so if the
+   referenced entity is to be parsed later, it must be copied.
+   context is NULL only when the entity is a parameter entity.
+
+   The handler should return XML_STATUS_ERROR if processing should not
+   continue because of a fatal error in the handling of the external
+   entity.  In this case the calling parser will return an
+   XML_ERROR_EXTERNAL_ENTITY_HANDLING error.
+
+   Note that unlike other handlers the first argument is the parser,
+   not userData.
+*/
+typedef int(XMLCALL *XML_ExternalEntityRefHandler)(XML_Parser parser,
+                                                   const XML_Char *context,
+                                                   const XML_Char *base,
+                                                   const XML_Char *systemId,
+                                                   const XML_Char *publicId);
+
+/* This is called in two situations:
+   1) An entity reference is encountered for which no declaration
+      has been read *and* this is not an error.
+   2) An internal entity reference is read, but not expanded, because
+      XML_SetDefaultHandler has been called.
+   Note: skipped parameter entities in declarations and skipped general
+         entities in attribute values cannot be reported, because
+         the event would be out of sync with the reporting of the
+         declarations or attribute values
+*/
+typedef void(XMLCALL *XML_SkippedEntityHandler)(void *userData,
+                                                const XML_Char *entityName,
+                                                int is_parameter_entity);
+
+/* This structure is filled in by the XML_UnknownEncodingHandler to
+   provide information to the parser about encodings that are unknown
+   to the parser.
+
+   The map[b] member gives information about byte sequences whose
+   first byte is b.
+
+   If map[b] is c where c is >= 0, then b by itself encodes the
+   Unicode scalar value c.
+
+   If map[b] is -1, then the byte sequence is malformed.
+
+   If map[b] is -n, where n >= 2, then b is the first byte of an
+   n-byte sequence that encodes a single Unicode scalar value.
+
+   The data member will be passed as the first argument to the convert
+   function.
+
+   The convert function is used to convert multibyte sequences; s will
+   point to a n-byte sequence where map[(unsigned char)*s] == -n.  The
+   convert function must return the Unicode scalar value represented
+   by this byte sequence or -1 if the byte sequence is malformed.
+
+   The convert function may be NULL if the encoding is a single-byte
+   encoding, that is if map[b] >= -1 for all bytes b.
+
+   When the parser is finished with the encoding, then if release is
+   not NULL, it will call release passing it the data member; once
+   release has been called, the convert function will not be called
+   again.
+
+   Expat places certain restrictions on the encodings that are supported
+   using this mechanism.
+
+   1. Every ASCII character that can appear in a well-formed XML document,
+      other than the characters
+
+      $@\^`{}~
+
+      must be represented by a single byte, and that byte must be the
+      same byte that represents that character in ASCII.
+
+   2. No character may require more than 4 bytes to encode.
+
+   3. All characters encoded must have Unicode scalar values <=
+      0xFFFF, (i.e., characters that would be encoded by surrogates in
+      UTF-16 are  not allowed).  Note that this restriction doesn't
+      apply to the built-in support for UTF-8 and UTF-16.
+
+   4. No Unicode character may be encoded by more than one distinct
+      sequence of bytes.
+*/
+typedef struct {
+  int map[256];
+  void *data;
+  int(XMLCALL *convert)(void *data, const char *s);
+  void(XMLCALL *release)(void *data);
+} XML_Encoding;
+
+/* This is called for an encoding that is unknown to the parser.
+
+   The encodingHandlerData argument is that which was passed as the
+   second argument to XML_SetUnknownEncodingHandler.
+
+   The name argument gives the name of the encoding as specified in
+   the encoding declaration.
+
+   If the callback can provide information about the encoding, it must
+   fill in the XML_Encoding structure, and return XML_STATUS_OK.
+   Otherwise it must return XML_STATUS_ERROR.
+
+   If info does not describe a suitable encoding, then the parser will
+   return an XML_ERROR_UNKNOWN_ENCODING error.
+*/
+typedef int(XMLCALL *XML_UnknownEncodingHandler)(void *encodingHandlerData,
+                                                 const XML_Char *name,
+                                                 XML_Encoding *info);
+
+XMLPARSEAPI(void)
+XML_SetElementHandler(XML_Parser parser, XML_StartElementHandler start,
+                      XML_EndElementHandler end);
+
+XMLPARSEAPI(void)
+XML_SetStartElementHandler(XML_Parser parser, XML_StartElementHandler handler);
+
+XMLPARSEAPI(void)
+XML_SetEndElementHandler(XML_Parser parser, XML_EndElementHandler handler);
+
+XMLPARSEAPI(void)
+XML_SetCharacterDataHandler(XML_Parser parser,
+                            XML_CharacterDataHandler handler);
+
+XMLPARSEAPI(void)
+XML_SetProcessingInstructionHandler(XML_Parser parser,
+                                    XML_ProcessingInstructionHandler handler);
+XMLPARSEAPI(void)
+XML_SetCommentHandler(XML_Parser parser, XML_CommentHandler handler);
+
+XMLPARSEAPI(void)
+XML_SetCdataSectionHandler(XML_Parser parser,
+                           XML_StartCdataSectionHandler start,
+                           XML_EndCdataSectionHandler end);
+
+XMLPARSEAPI(void)
+XML_SetStartCdataSectionHandler(XML_Parser parser,
+                                XML_StartCdataSectionHandler start);
+
+XMLPARSEAPI(void)
+XML_SetEndCdataSectionHandler(XML_Parser parser,
+                              XML_EndCdataSectionHandler end);
+
+/* This sets the default handler and also inhibits expansion of
+   internal entities. These entity references will be passed to the
+   default handler, or to the skipped entity handler, if one is set.
+*/
+XMLPARSEAPI(void)
+XML_SetDefaultHandler(XML_Parser parser, XML_DefaultHandler handler);
+
+/* This sets the default handler but does not inhibit expansion of
+   internal entities.  The entity reference will not be passed to the
+   default handler.
+*/
+XMLPARSEAPI(void)
+XML_SetDefaultHandlerExpand(XML_Parser parser, XML_DefaultHandler handler);
+
+XMLPARSEAPI(void)
+XML_SetDoctypeDeclHandler(XML_Parser parser, XML_StartDoctypeDeclHandler start,
+                          XML_EndDoctypeDeclHandler end);
+
+XMLPARSEAPI(void)
+XML_SetStartDoctypeDeclHandler(XML_Parser parser,
+                               XML_StartDoctypeDeclHandler start);
+
+XMLPARSEAPI(void)
+XML_SetEndDoctypeDeclHandler(XML_Parser parser, XML_EndDoctypeDeclHandler end);
+
+XMLPARSEAPI(void)
+XML_SetUnparsedEntityDeclHandler(XML_Parser parser,
+                                 XML_UnparsedEntityDeclHandler handler);
+
+XMLPARSEAPI(void)
+XML_SetNotationDeclHandler(XML_Parser parser, XML_NotationDeclHandler handler);
+
+XMLPARSEAPI(void)
+XML_SetNamespaceDeclHandler(XML_Parser parser,
+                            XML_StartNamespaceDeclHandler start,
+                            XML_EndNamespaceDeclHandler end);
+
+XMLPARSEAPI(void)
+XML_SetStartNamespaceDeclHandler(XML_Parser parser,
+                                 XML_StartNamespaceDeclHandler start);
+
+XMLPARSEAPI(void)
+XML_SetEndNamespaceDeclHandler(XML_Parser parser,
+                               XML_EndNamespaceDeclHandler end);
+
+XMLPARSEAPI(void)
+XML_SetNotStandaloneHandler(XML_Parser parser,
+                            XML_NotStandaloneHandler handler);
+
+XMLPARSEAPI(void)
+XML_SetExternalEntityRefHandler(XML_Parser parser,
+                                XML_ExternalEntityRefHandler handler);
+
+/* If a non-NULL value for arg is specified here, then it will be
+   passed as the first argument to the external entity ref handler
+   instead of the parser object.
+*/
+XMLPARSEAPI(void)
+XML_SetExternalEntityRefHandlerArg(XML_Parser parser, void *arg);
+
+XMLPARSEAPI(void)
+XML_SetSkippedEntityHandler(XML_Parser parser,
+                            XML_SkippedEntityHandler handler);
+
+XMLPARSEAPI(void)
+XML_SetUnknownEncodingHandler(XML_Parser parser,
+                              XML_UnknownEncodingHandler handler,
+                              void *encodingHandlerData);
+
+/* This can be called within a handler for a start element, end
+   element, processing instruction or character data.  It causes the
+   corresponding markup to be passed to the default handler.
+*/
+XMLPARSEAPI(void)
+XML_DefaultCurrent(XML_Parser parser);
+
+/* If do_nst is non-zero, and namespace processing is in effect, and
+   a name has a prefix (i.e. an explicit namespace qualifier) then
+   that name is returned as a triplet in a single string separated by
+   the separator character specified when the parser was created: URI
+   + sep + local_name + sep + prefix.
+
+   If do_nst is zero, then namespace information is returned in the
+   default manner (URI + sep + local_name) whether or not the name
+   has a prefix.
+
+   Note: Calling XML_SetReturnNSTriplet after XML_Parse or
+     XML_ParseBuffer has no effect.
+*/
+
+XMLPARSEAPI(void)
+XML_SetReturnNSTriplet(XML_Parser parser, int do_nst);
+
+/* This value is passed as the userData argument to callbacks. */
+XMLPARSEAPI(void)
+XML_SetUserData(XML_Parser parser, void *userData);
+
+/* Returns the last value set by XML_SetUserData or NULL. */
+#define XML_GetUserData(parser) (*(void **)(parser))
+
+/* This is equivalent to supplying an encoding argument to
+   XML_ParserCreate. On success XML_SetEncoding returns non-zero,
+   zero otherwise.
+   Note: Calling XML_SetEncoding after XML_Parse or XML_ParseBuffer
+     has no effect and returns XML_STATUS_ERROR.
+*/
+XMLPARSEAPI(enum XML_Status)
+XML_SetEncoding(XML_Parser parser, const XML_Char *encoding);
+
+/* If this function is called, then the parser will be passed as the
+   first argument to callbacks instead of userData.  The userData will
+   still be accessible using XML_GetUserData.
+*/
+XMLPARSEAPI(void)
+XML_UseParserAsHandlerArg(XML_Parser parser);
+
+/* If useDTD == XML_TRUE is passed to this function, then the parser
+   will assume that there is an external subset, even if none is
+   specified in the document. In such a case the parser will call the
+   externalEntityRefHandler with a value of NULL for the systemId
+   argument (the publicId and context arguments will be NULL as well).
+   Note: For the purpose of checking WFC: Entity Declared, passing
+     useDTD == XML_TRUE will make the parser behave as if the document
+     had a DTD with an external subset.
+   Note: If this function is called, then this must be done before
+     the first call to XML_Parse or XML_ParseBuffer, since it will
+     have no effect after that.  Returns
+     XML_ERROR_CANT_CHANGE_FEATURE_ONCE_PARSING.
+   Note: If the document does not have a DOCTYPE declaration at all,
+     then startDoctypeDeclHandler and endDoctypeDeclHandler will not
+     be called, despite an external subset being parsed.
+   Note: If XML_DTD is not defined when Expat is compiled, returns
+     XML_ERROR_FEATURE_REQUIRES_XML_DTD.
+   Note: If parser == NULL, returns XML_ERROR_INVALID_ARGUMENT.
+*/
+XMLPARSEAPI(enum XML_Error)
+XML_UseForeignDTD(XML_Parser parser, XML_Bool useDTD);
+
+/* Sets the base to be used for resolving relative URIs in system
+   identifiers in declarations.  Resolving relative identifiers is
+   left to the application: this value will be passed through as the
+   base argument to the XML_ExternalEntityRefHandler,
+   XML_NotationDeclHandler and XML_UnparsedEntityDeclHandler. The base
+   argument will be copied.  Returns XML_STATUS_ERROR if out of memory,
+   XML_STATUS_OK otherwise.
+*/
+XMLPARSEAPI(enum XML_Status)
+XML_SetBase(XML_Parser parser, const XML_Char *base);
+
+XMLPARSEAPI(const XML_Char *)
+XML_GetBase(XML_Parser parser);
+
+/* Returns the number of the attribute/value pairs passed in last call
+   to the XML_StartElementHandler that were specified in the start-tag
+   rather than defaulted. Each attribute/value pair counts as 2; thus
+   this corresponds to an index into the atts array passed to the
+   XML_StartElementHandler.  Returns -1 if parser == NULL.
+*/
+XMLPARSEAPI(int)
+XML_GetSpecifiedAttributeCount(XML_Parser parser);
+
+/* Returns the index of the ID attribute passed in the last call to
+   XML_StartElementHandler, or -1 if there is no ID attribute or
+   parser == NULL.  Each attribute/value pair counts as 2; thus this
+   corresponds to an index into the atts array passed to the
+   XML_StartElementHandler.
+*/
+XMLPARSEAPI(int)
+XML_GetIdAttributeIndex(XML_Parser parser);
+
+#ifdef XML_ATTR_INFO
+/* Source file byte offsets for the start and end of attribute names and values.
+   The value indices are exclusive of surrounding quotes; thus in a UTF-8 source
+   file an attribute value of "blah" will yield:
+   info->valueEnd - info->valueStart = 4 bytes.
+*/
+typedef struct {
+  XML_Index nameStart;  /* Offset to beginning of the attribute name. */
+  XML_Index nameEnd;    /* Offset after the attribute name's last byte. */
+  XML_Index valueStart; /* Offset to beginning of the attribute value. */
+  XML_Index valueEnd;   /* Offset after the attribute value's last byte. */
+} XML_AttrInfo;
+
+/* Returns an array of XML_AttrInfo structures for the attribute/value pairs
+   passed in last call to the XML_StartElementHandler that were specified
+   in the start-tag rather than defaulted. Each attribute/value pair counts
+   as 1; thus the number of entries in the array is
+   XML_GetSpecifiedAttributeCount(parser) / 2.
+*/
+XMLPARSEAPI(const XML_AttrInfo *)
+XML_GetAttributeInfo(XML_Parser parser);
+#endif
+
+/* Parses some input. Returns XML_STATUS_ERROR if a fatal error is
+   detected.  The last call to XML_Parse must have isFinal true; len
+   may be zero for this call (or any other).
+
+   Though the return values for these functions has always been
+   described as a Boolean value, the implementation, at least for the
+   1.95.x series, has always returned exactly one of the XML_Status
+   values.
+*/
+XMLPARSEAPI(enum XML_Status)
+XML_Parse(XML_Parser parser, const char *s, int len, int isFinal);
+
+XMLPARSEAPI(void *)
+XML_GetBuffer(XML_Parser parser, int len);
+
+XMLPARSEAPI(enum XML_Status)
+XML_ParseBuffer(XML_Parser parser, int len, int isFinal);
+
+/* Stops parsing, causing XML_Parse() or XML_ParseBuffer() to return.
+   Must be called from within a call-back handler, except when aborting
+   (resumable = 0) an already suspended parser. Some call-backs may
+   still follow because they would otherwise get lost. Examples:
+   - endElementHandler() for empty elements when stopped in
+     startElementHandler(),
+   - endNameSpaceDeclHandler() when stopped in endElementHandler(),
+   and possibly others.
+
+   Can be called from most handlers, including DTD related call-backs,
+   except when parsing an external parameter entity and resumable != 0.
+   Returns XML_STATUS_OK when successful, XML_STATUS_ERROR otherwise.
+   Possible error codes:
+   - XML_ERROR_SUSPENDED: when suspending an already suspended parser.
+   - XML_ERROR_FINISHED: when the parser has already finished.
+   - XML_ERROR_SUSPEND_PE: when suspending while parsing an external PE.
+
+   When resumable != 0 (true) then parsing is suspended, that is,
+   XML_Parse() and XML_ParseBuffer() return XML_STATUS_SUSPENDED.
+   Otherwise, parsing is aborted, that is, XML_Parse() and XML_ParseBuffer()
+   return XML_STATUS_ERROR with error code XML_ERROR_ABORTED.
+
+   *Note*:
+   This will be applied to the current parser instance only, that is, if
+   there is a parent parser then it will continue parsing when the
+   externalEntityRefHandler() returns. It is up to the implementation of
+   the externalEntityRefHandler() to call XML_StopParser() on the parent
+   parser (recursively), if one wants to stop parsing altogether.
+
+   When suspended, parsing can be resumed by calling XML_ResumeParser().
+*/
+XMLPARSEAPI(enum XML_Status)
+XML_StopParser(XML_Parser parser, XML_Bool resumable);
+
+/* Resumes parsing after it has been suspended with XML_StopParser().
+   Must not be called from within a handler call-back. Returns same
+   status codes as XML_Parse() or XML_ParseBuffer().
+   Additional error code XML_ERROR_NOT_SUSPENDED possible.
+
+   *Note*:
+   This must be called on the most deeply nested child parser instance
+   first, and on its parent parser only after the child parser has finished,
+   to be applied recursively until the document entity's parser is restarted.
+   That is, the parent parser will not resume by itself and it is up to the
+   application to call XML_ResumeParser() on it at the appropriate moment.
+*/
+XMLPARSEAPI(enum XML_Status)
+XML_ResumeParser(XML_Parser parser);
+
+enum XML_Parsing { XML_INITIALIZED, XML_PARSING, XML_FINISHED, XML_SUSPENDED };
+
+typedef struct {
+  enum XML_Parsing parsing;
+  XML_Bool finalBuffer;
+} XML_ParsingStatus;
+
+/* Returns status of parser with respect to being initialized, parsing,
+   finished, or suspended and processing the final buffer.
+   XXX XML_Parse() and XML_ParseBuffer() should return XML_ParsingStatus,
+   XXX with XML_FINISHED_OK or XML_FINISHED_ERROR replacing XML_FINISHED
+*/
+XMLPARSEAPI(void)
+XML_GetParsingStatus(XML_Parser parser, XML_ParsingStatus *status);
+
+/* Creates an XML_Parser object that can parse an external general
+   entity; context is a '\0'-terminated string specifying the parse
+   context; encoding is a '\0'-terminated string giving the name of
+   the externally specified encoding, or NULL if there is no
+   externally specified encoding.  The context string consists of a
+   sequence of tokens separated by formfeeds (\f); a token consisting
+   of a name specifies that the general entity of the name is open; a
+   token of the form prefix=uri specifies the namespace for a
+   particular prefix; a token of the form =uri specifies the default
+   namespace.  This can be called at any point after the first call to
+   an ExternalEntityRefHandler so longer as the parser has not yet
+   been freed.  The new parser is completely independent and may
+   safely be used in a separate thread.  The handlers and userData are
+   initialized from the parser argument.  Returns NULL if out of memory.
+   Otherwise returns a new XML_Parser object.
+*/
+XMLPARSEAPI(XML_Parser)
+XML_ExternalEntityParserCreate(XML_Parser parser, const XML_Char *context,
+                               const XML_Char *encoding);
+
+enum XML_ParamEntityParsing {
+  XML_PARAM_ENTITY_PARSING_NEVER,
+  XML_PARAM_ENTITY_PARSING_UNLESS_STANDALONE,
+  XML_PARAM_ENTITY_PARSING_ALWAYS
+};
+
+/* Controls parsing of parameter entities (including the external DTD
+   subset). If parsing of parameter entities is enabled, then
+   references to external parameter entities (including the external
+   DTD subset) will be passed to the handler set with
+   XML_SetExternalEntityRefHandler.  The context passed will be 0.
+
+   Unlike external general entities, external parameter entities can
+   only be parsed synchronously.  If the external parameter entity is
+   to be parsed, it must be parsed during the call to the external
+   entity ref handler: the complete sequence of
+   XML_ExternalEntityParserCreate, XML_Parse/XML_ParseBuffer and
+   XML_ParserFree calls must be made during this call.  After
+   XML_ExternalEntityParserCreate has been called to create the parser
+   for the external parameter entity (context must be 0 for this
+   call), it is illegal to make any calls on the old parser until
+   XML_ParserFree has been called on the newly created parser.
+   If the library has been compiled without support for parameter
+   entity parsing (ie without XML_DTD being defined), then
+   XML_SetParamEntityParsing will return 0 if parsing of parameter
+   entities is requested; otherwise it will return non-zero.
+   Note: If XML_SetParamEntityParsing is called after XML_Parse or
+      XML_ParseBuffer, then it has no effect and will always return 0.
+   Note: If parser == NULL, the function will do nothing and return 0.
+*/
+XMLPARSEAPI(int)
+XML_SetParamEntityParsing(XML_Parser parser,
+                          enum XML_ParamEntityParsing parsing);
+
+/* Sets the hash salt to use for internal hash calculations.
+   Helps in preventing DoS attacks based on predicting hash
+   function behavior. This must be called before parsing is started.
+   Returns 1 if successful, 0 when called after parsing has started.
+   Note: If parser == NULL, the function will do nothing and return 0.
+*/
+XMLPARSEAPI(int)
+XML_SetHashSalt(XML_Parser parser, unsigned long hash_salt);
+
+/* If XML_Parse or XML_ParseBuffer have returned XML_STATUS_ERROR, then
+   XML_GetErrorCode returns information about the error.
+*/
+XMLPARSEAPI(enum XML_Error)
+XML_GetErrorCode(XML_Parser parser);
+
+/* These functions return information about the current parse
+   location.  They may be called from any callback called to report
+   some parse event; in this case the location is the location of the
+   first of the sequence of characters that generated the event.  When
+   called from callbacks generated by declarations in the document
+   prologue, the location identified isn't as neatly defined, but will
+   be within the relevant markup.  When called outside of the callback
+   functions, the position indicated will be just past the last parse
+   event (regardless of whether there was an associated callback).
+
+   They may also be called after returning from a call to XML_Parse
+   or XML_ParseBuffer.  If the return value is XML_STATUS_ERROR then
+   the location is the location of the character at which the error
+   was detected; otherwise the location is the location of the last
+   parse event, as described above.
+
+   Note: XML_GetCurrentLineNumber and XML_GetCurrentColumnNumber
+   return 0 to indicate an error.
+   Note: XML_GetCurrentByteIndex returns -1 to indicate an error.
+*/
+XMLPARSEAPI(XML_Size) XML_GetCurrentLineNumber(XML_Parser parser);
+XMLPARSEAPI(XML_Size) XML_GetCurrentColumnNumber(XML_Parser parser);
+XMLPARSEAPI(XML_Index) XML_GetCurrentByteIndex(XML_Parser parser);
+
+/* Return the number of bytes in the current event.
+   Returns 0 if the event is in an internal entity.
+*/
+XMLPARSEAPI(int)
+XML_GetCurrentByteCount(XML_Parser parser);
+
+/* If XML_CONTEXT_BYTES is defined, returns the input buffer, sets
+   the integer pointed to by offset to the offset within this buffer
+   of the current parse position, and sets the integer pointed to by size
+   to the size of this buffer (the number of input bytes). Otherwise
+   returns a NULL pointer. Also returns a NULL pointer if a parse isn't
+   active.
+
+   NOTE: The character pointer returned should not be used outside
+   the handler that makes the call.
+*/
+XMLPARSEAPI(const char *)
+XML_GetInputContext(XML_Parser parser, int *offset, int *size);
+
+/* For backwards compatibility with previous versions. */
+#define XML_GetErrorLineNumber XML_GetCurrentLineNumber
+#define XML_GetErrorColumnNumber XML_GetCurrentColumnNumber
+#define XML_GetErrorByteIndex XML_GetCurrentByteIndex
+
+/* Frees the content model passed to the element declaration handler */
+XMLPARSEAPI(void)
+XML_FreeContentModel(XML_Parser parser, XML_Content *model);
+
+/* Exposing the memory handling functions used in Expat */
+XMLPARSEAPI(void *)
+XML_ATTR_MALLOC
+XML_ATTR_ALLOC_SIZE(2)
+XML_MemMalloc(XML_Parser parser, size_t size);
+
+XMLPARSEAPI(void *)
+XML_ATTR_ALLOC_SIZE(3)
+XML_MemRealloc(XML_Parser parser, void *ptr, size_t size);
+
+XMLPARSEAPI(void)
+XML_MemFree(XML_Parser parser, void *ptr);
+
+/* Frees memory used by the parser. */
+XMLPARSEAPI(void)
+XML_ParserFree(XML_Parser parser);
+
+/* Returns a string describing the error. */
+XMLPARSEAPI(const XML_LChar *)
+XML_ErrorString(enum XML_Error code);
+
+/* Return a string containing the version number of this expat */
+XMLPARSEAPI(const XML_LChar *)
+XML_ExpatVersion(void);
+
+typedef struct {
+  int major;
+  int minor;
+  int micro;
+} XML_Expat_Version;
+
+/* Return an XML_Expat_Version structure containing numeric version
+   number information for this version of expat.
+*/
+XMLPARSEAPI(XML_Expat_Version)
+XML_ExpatVersionInfo(void);
+
+/* Added in Expat 1.95.5. */
+enum XML_FeatureEnum {
+  XML_FEATURE_END = 0,
+  XML_FEATURE_UNICODE,
+  XML_FEATURE_UNICODE_WCHAR_T,
+  XML_FEATURE_DTD,
+  XML_FEATURE_CONTEXT_BYTES,
+  XML_FEATURE_MIN_SIZE,
+  XML_FEATURE_SIZEOF_XML_CHAR,
+  XML_FEATURE_SIZEOF_XML_LCHAR,
+  XML_FEATURE_NS,
+  XML_FEATURE_LARGE_SIZE,
+  XML_FEATURE_ATTR_INFO,
+  /* Added in Expat 2.4.0. */
+  XML_FEATURE_BILLION_LAUGHS_ATTACK_PROTECTION_MAXIMUM_AMPLIFICATION_DEFAULT,
+  XML_FEATURE_BILLION_LAUGHS_ATTACK_PROTECTION_ACTIVATION_THRESHOLD_DEFAULT
+  /* Additional features must be added to the end of this enum. */
+};
+
+typedef struct {
+  enum XML_FeatureEnum feature;
+  const XML_LChar *name;
+  long int value;
+} XML_Feature;
+
+XMLPARSEAPI(const XML_Feature *)
+XML_GetFeatureList(void);
+
+#ifdef XML_DTD
+/* Added in Expat 2.4.0. */
+XMLPARSEAPI(XML_Bool)
+XML_SetBillionLaughsAttackProtectionMaximumAmplification(
+    XML_Parser parser, float maximumAmplificationFactor);
+
+/* Added in Expat 2.4.0. */
+XMLPARSEAPI(XML_Bool)
+XML_SetBillionLaughsAttackProtectionActivationThreshold(
+    XML_Parser parser, unsigned long long activationThresholdBytes);
+#endif
+
+/* Expat follows the semantic versioning convention.
+   See http://semver.org.
+*/
+#define XML_MAJOR_VERSION 2
+#define XML_MINOR_VERSION 4
+#define XML_MICRO_VERSION 3
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* not Expat_INCLUDED */
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/expat_external.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/expat_external.h
new file mode 100644
index 00000000000..8829f770910
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/expat_external.h
@@ -0,0 +1,165 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 1997-2000 Thai Open Source Software Center Ltd
+   Copyright (c) 2000      Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2000-2004 Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
+   Copyright (c) 2001-2002 Greg Stein <gstein@users.sourceforge.net>
+   Copyright (c) 2002-2006 Karl Waclawek <karl@waclawek.net>
+   Copyright (c) 2016      Cristian Rodríguez <crrodriguez@opensuse.org>
+   Copyright (c) 2016-2019 Sebastian Pipping <sebastian@pipping.org>
+   Copyright (c) 2017      Rhodri James <rhodri@wildebeest.org.uk>
+   Copyright (c) 2018      Yury Gribov <tetra2005@gmail.com>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+#ifndef Expat_External_INCLUDED
+#define Expat_External_INCLUDED 1
+
+/* External API definitions */
+
+/* Expat tries very hard to make the API boundary very specifically
+   defined.  There are two macros defined to control this boundary;
+   each of these can be defined before including this header to
+   achieve some different behavior, but doing so it not recommended or
+   tested frequently.
+
+   XMLCALL    - The calling convention to use for all calls across the
+                "library boundary."  This will default to cdecl, and
+                try really hard to tell the compiler that's what we
+                want.
+
+   XMLIMPORT  - Whatever magic is needed to note that a function is
+                to be imported from a dynamically loaded library
+                (.dll, .so, or .sl, depending on your platform).
+
+   The XMLCALL macro was added in Expat 1.95.7.  The only one which is
+   expected to be directly useful in client code is XMLCALL.
+
+   Note that on at least some Unix versions, the Expat library must be
+   compiled with the cdecl calling convention as the default since
+   system headers may assume the cdecl convention.
+*/
+#ifndef XMLCALL
+#  if defined(_MSC_VER)
+#    define XMLCALL __cdecl
+#  elif defined(__GNUC__) && defined(__i386) && ! defined(__INTEL_COMPILER)
+#    define XMLCALL __attribute__((cdecl))
+#  else
+/* For any platform which uses this definition and supports more than
+   one calling convention, we need to extend this definition to
+   declare the convention used on that platform, if it's possible to
+   do so.
+
+   If this is the case for your platform, please file a bug report
+   with information on how to identify your platform via the C
+   pre-processor and how to specify the same calling convention as the
+   platform's malloc() implementation.
+*/
+#    define XMLCALL
+#  endif
+#endif /* not defined XMLCALL */
+
+#if ! defined(XML_STATIC) && ! defined(XMLIMPORT)
+#  ifndef XML_BUILDING_EXPAT
+/* using Expat from an application */
+
+#    if defined(_MSC_EXTENSIONS) && ! defined(__BEOS__) && ! defined(__CYGWIN__)
+#      define XMLIMPORT __declspec(dllimport)
+#    endif
+
+#  endif
+#endif /* not defined XML_STATIC */
+
+#ifndef XML_ENABLE_VISIBILITY
+#  define XML_ENABLE_VISIBILITY 0
+#endif
+
+#if ! defined(XMLIMPORT) && XML_ENABLE_VISIBILITY
+#  define XMLIMPORT __attribute__((visibility("default")))
+#endif
+
+/* If we didn't define it above, define it away: */
+#ifndef XMLIMPORT
+#  define XMLIMPORT
+#endif
+
+#if defined(__GNUC__)                                                          \
+    && (__GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 96))
+#  define XML_ATTR_MALLOC __attribute__((__malloc__))
+#else
+#  define XML_ATTR_MALLOC
+#endif
+
+#if defined(__GNUC__)                                                          \
+    && ((__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3))
+#  define XML_ATTR_ALLOC_SIZE(x) __attribute__((__alloc_size__(x)))
+#else
+#  define XML_ATTR_ALLOC_SIZE(x)
+#endif
+
+#define XMLPARSEAPI(type) XMLIMPORT type XMLCALL
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef XML_UNICODE_WCHAR_T
+#  ifndef XML_UNICODE
+#    define XML_UNICODE
+#  endif
+#  if defined(__SIZEOF_WCHAR_T__) && (__SIZEOF_WCHAR_T__ != 2)
+#    error "sizeof(wchar_t) != 2; Need -fshort-wchar for both Expat and libc"
+#  endif
+#endif
+
+#ifdef XML_UNICODE /* Information is UTF-16 encoded. */
+#  ifdef XML_UNICODE_WCHAR_T
+typedef wchar_t XML_Char;
+typedef wchar_t XML_LChar;
+#  else
+typedef unsigned short XML_Char;
+typedef char XML_LChar;
+#  endif /* XML_UNICODE_WCHAR_T */
+#else    /* Information is UTF-8 encoded. */
+typedef char XML_Char;
+typedef char XML_LChar;
+#endif   /* XML_UNICODE */
+
+#ifdef XML_LARGE_SIZE /* Use large integers for file/stream positions. */
+typedef long long XML_Index;
+typedef unsigned long long XML_Size;
+#else
+typedef long XML_Index;
+typedef unsigned long XML_Size;
+#endif /* XML_LARGE_SIZE */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* not Expat_External_INCLUDED */
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/iasciitab.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/iasciitab.h
new file mode 100644
index 00000000000..5d8646f2a31
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/iasciitab.h
@@ -0,0 +1,67 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 1997-2000 Thai Open Source Software Center Ltd
+   Copyright (c) 2000      Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2002      Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
+   Copyright (c) 2017      Sebastian Pipping <sebastian@pipping.org>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+/* Like asciitab.h, except that 0xD has code BT_S rather than BT_CR */
+/* 0x00 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x04 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x08 */ BT_NONXML, BT_S, BT_LF, BT_NONXML,
+    /* 0x0C */ BT_NONXML, BT_S, BT_NONXML, BT_NONXML,
+    /* 0x10 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x14 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x18 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x1C */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0x20 */ BT_S, BT_EXCL, BT_QUOT, BT_NUM,
+    /* 0x24 */ BT_OTHER, BT_PERCNT, BT_AMP, BT_APOS,
+    /* 0x28 */ BT_LPAR, BT_RPAR, BT_AST, BT_PLUS,
+    /* 0x2C */ BT_COMMA, BT_MINUS, BT_NAME, BT_SOL,
+    /* 0x30 */ BT_DIGIT, BT_DIGIT, BT_DIGIT, BT_DIGIT,
+    /* 0x34 */ BT_DIGIT, BT_DIGIT, BT_DIGIT, BT_DIGIT,
+    /* 0x38 */ BT_DIGIT, BT_DIGIT, BT_COLON, BT_SEMI,
+    /* 0x3C */ BT_LT, BT_EQUALS, BT_GT, BT_QUEST,
+    /* 0x40 */ BT_OTHER, BT_HEX, BT_HEX, BT_HEX,
+    /* 0x44 */ BT_HEX, BT_HEX, BT_HEX, BT_NMSTRT,
+    /* 0x48 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x4C */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x50 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x54 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x58 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_LSQB,
+    /* 0x5C */ BT_OTHER, BT_RSQB, BT_OTHER, BT_NMSTRT,
+    /* 0x60 */ BT_OTHER, BT_HEX, BT_HEX, BT_HEX,
+    /* 0x64 */ BT_HEX, BT_HEX, BT_HEX, BT_NMSTRT,
+    /* 0x68 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x6C */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x70 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x74 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0x78 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_OTHER,
+    /* 0x7C */ BT_VERBAR, BT_OTHER, BT_OTHER, BT_OTHER,
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/internal.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/internal.h
new file mode 100644
index 00000000000..444eba0fb03
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/internal.h
@@ -0,0 +1,163 @@
+/* internal.h
+
+   Internal definitions used by Expat.  This is not needed to compile
+   client code.
+
+   The following calling convention macros are defined for frequently
+   called functions:
+
+   FASTCALL    - Used for those internal functions that have a simple
+                 body and a low number of arguments and local variables.
+
+   PTRCALL     - Used for functions called though function pointers.
+
+   PTRFASTCALL - Like PTRCALL, but for low number of arguments.
+
+   inline      - Used for selected internal functions for which inlining
+                 may improve performance on some platforms.
+
+   Note: Use of these macros is based on judgement, not hard rules,
+         and therefore subject to change.
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 2002-2003 Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
+   Copyright (c) 2002-2006 Karl Waclawek <karl@waclawek.net>
+   Copyright (c) 2003      Greg Stein <gstein@users.sourceforge.net>
+   Copyright (c) 2016-2021 Sebastian Pipping <sebastian@pipping.org>
+   Copyright (c) 2018      Yury Gribov <tetra2005@gmail.com>
+   Copyright (c) 2019      David Loffredo <loffredo@steptools.com>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+#if defined(__GNUC__) && defined(__i386__) && ! defined(__MINGW32__)
+/* We'll use this version by default only where we know it helps.
+
+   regparm() generates warnings on Solaris boxes.   See SF bug #692878.
+
+   Instability reported with egcs on a RedHat Linux 7.3.
+   Let's comment out:
+   #define FASTCALL __attribute__((stdcall, regparm(3)))
+   and let's try this:
+*/
+#  define FASTCALL __attribute__((regparm(3)))
+#  define PTRFASTCALL __attribute__((regparm(3)))
+#endif
+
+/* Using __fastcall seems to have an unexpected negative effect under
+   MS VC++, especially for function pointers, so we won't use it for
+   now on that platform. It may be reconsidered for a future release
+   if it can be made more effective.
+   Likely reason: __fastcall on Windows is like stdcall, therefore
+   the compiler cannot perform stack optimizations for call clusters.
+*/
+
+/* Make sure all of these are defined if they aren't already. */
+
+#ifndef FASTCALL
+#  define FASTCALL
+#endif
+
+#ifndef PTRCALL
+#  define PTRCALL
+#endif
+
+#ifndef PTRFASTCALL
+#  define PTRFASTCALL
+#endif
+
+#ifndef XML_MIN_SIZE
+#  if ! defined(__cplusplus) && ! defined(inline)
+#    ifdef __GNUC__
+#      define inline __inline
+#    endif /* __GNUC__ */
+#  endif
+#endif /* XML_MIN_SIZE */
+
+#ifdef __cplusplus
+#  define inline inline
+#else
+#  ifndef inline
+#    define inline
+#  endif
+#endif
+
+#include <limits.h> // ULONG_MAX
+
+#if defined(_WIN32) && ! defined(__USE_MINGW_ANSI_STDIO)
+#  define EXPAT_FMT_ULL(midpart) "%" midpart "I64u"
+#  if defined(_WIN64) // Note: modifiers "td" and "zu" do not work for MinGW
+#    define EXPAT_FMT_PTRDIFF_T(midpart) "%" midpart "I64d"
+#    define EXPAT_FMT_SIZE_T(midpart) "%" midpart "I64u"
+#  else
+#    define EXPAT_FMT_PTRDIFF_T(midpart) "%" midpart "d"
+#    define EXPAT_FMT_SIZE_T(midpart) "%" midpart "u"
+#  endif
+#else
+#  define EXPAT_FMT_ULL(midpart) "%" midpart "llu"
+#  if ! defined(ULONG_MAX)
+#    error Compiler did not define ULONG_MAX for us
+#  elif ULONG_MAX == 18446744073709551615u // 2^64-1
+#    define EXPAT_FMT_PTRDIFF_T(midpart) "%" midpart "ld"
+#    define EXPAT_FMT_SIZE_T(midpart) "%" midpart "lu"
+#  else
+#    define EXPAT_FMT_PTRDIFF_T(midpart) "%" midpart "d"
+#    define EXPAT_FMT_SIZE_T(midpart) "%" midpart "u"
+#  endif
+#endif
+
+#ifndef UNUSED_P
+#  define UNUSED_P(p) (void)p
+#endif
+
+/* NOTE BEGIN If you ever patch these defaults to greater values
+              for non-attack XML payload in your environment,
+              please file a bug report with libexpat.  Thank you!
+*/
+#define EXPAT_BILLION_LAUGHS_ATTACK_PROTECTION_MAXIMUM_AMPLIFICATION_DEFAULT   \
+  100.0f
+#define EXPAT_BILLION_LAUGHS_ATTACK_PROTECTION_ACTIVATION_THRESHOLD_DEFAULT    \
+  8388608 // 8 MiB, 2^23
+/* NOTE END */
+
+#include "expat.h" // so we can use type XML_Parser below
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void _INTERNAL_trim_to_complete_utf8_characters(const char *from,
+                                                const char **fromLimRef);
+
+#if defined(XML_DTD)
+unsigned long long testingAccountingGetCountBytesDirect(XML_Parser parser);
+unsigned long long testingAccountingGetCountBytesIndirect(XML_Parser parser);
+const char *unsignedCharToPrintable(unsigned char c);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/latin1tab.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/latin1tab.h
new file mode 100644
index 00000000000..b681d278af6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/latin1tab.h
@@ -0,0 +1,66 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 1997-2000 Thai Open Source Software Center Ltd
+   Copyright (c) 2000      Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2002      Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
+   Copyright (c) 2017      Sebastian Pipping <sebastian@pipping.org>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+/* 0x80 */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0x84 */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0x88 */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0x8C */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0x90 */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0x94 */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0x98 */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0x9C */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0xA0 */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0xA4 */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0xA8 */ BT_OTHER, BT_OTHER, BT_NMSTRT, BT_OTHER,
+    /* 0xAC */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0xB0 */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0xB4 */ BT_OTHER, BT_NMSTRT, BT_OTHER, BT_NAME,
+    /* 0xB8 */ BT_OTHER, BT_OTHER, BT_NMSTRT, BT_OTHER,
+    /* 0xBC */ BT_OTHER, BT_OTHER, BT_OTHER, BT_OTHER,
+    /* 0xC0 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xC4 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xC8 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xCC */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xD0 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xD4 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_OTHER,
+    /* 0xD8 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xDC */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xE0 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xE4 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xE8 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xEC */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xF0 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xF4 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_OTHER,
+    /* 0xF8 */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
+    /* 0xFC */ BT_NMSTRT, BT_NMSTRT, BT_NMSTRT, BT_NMSTRT,
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/nametab.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/nametab.h
new file mode 100644
index 00000000000..63485446b96
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/nametab.h
@@ -0,0 +1,136 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 2000 Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2017 Sebastian Pipping <sebastian@pipping.org>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+static const unsigned namingBitmap[] = {
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+    0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x04000000,
+    0x87FFFFFE, 0x07FFFFFE, 0x00000000, 0x00000000, 0xFF7FFFFF, 0xFF7FFFFF,
+    0xFFFFFFFF, 0x7FF3FFFF, 0xFFFFFDFE, 0x7FFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+    0xFFFFE00F, 0xFC31FFFF, 0x00FFFFFF, 0x00000000, 0xFFFF0000, 0xFFFFFFFF,
+    0xFFFFFFFF, 0xF80001FF, 0x00000003, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0xFFFFD740, 0xFFFFFFFB, 0x547F7FFF, 0x000FFFFD,
+    0xFFFFDFFE, 0xFFFFFFFF, 0xDFFEFFFF, 0xFFFFFFFF, 0xFFFF0003, 0xFFFFFFFF,
+    0xFFFF199F, 0x033FCFFF, 0x00000000, 0xFFFE0000, 0x027FFFFF, 0xFFFFFFFE,
+    0x0000007F, 0x00000000, 0xFFFF0000, 0x000707FF, 0x00000000, 0x07FFFFFE,
+    0x000007FE, 0xFFFE0000, 0xFFFFFFFF, 0x7CFFFFFF, 0x002F7FFF, 0x00000060,
+    0xFFFFFFE0, 0x23FFFFFF, 0xFF000000, 0x00000003, 0xFFF99FE0, 0x03C5FDFF,
+    0xB0000000, 0x00030003, 0xFFF987E0, 0x036DFDFF, 0x5E000000, 0x001C0000,
+    0xFFFBAFE0, 0x23EDFDFF, 0x00000000, 0x00000001, 0xFFF99FE0, 0x23CDFDFF,
+    0xB0000000, 0x00000003, 0xD63DC7E0, 0x03BFC718, 0x00000000, 0x00000000,
+    0xFFFDDFE0, 0x03EFFDFF, 0x00000000, 0x00000003, 0xFFFDDFE0, 0x03EFFDFF,
+    0x40000000, 0x00000003, 0xFFFDDFE0, 0x03FFFDFF, 0x00000000, 0x00000003,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xFFFFFFFE, 0x000D7FFF,
+    0x0000003F, 0x00000000, 0xFEF02596, 0x200D6CAE, 0x0000001F, 0x00000000,
+    0x00000000, 0x00000000, 0xFFFFFEFF, 0x000003FF, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0xFFFFFFFF, 0xFFFF003F, 0x007FFFFF, 0x0007DAED, 0x50000000,
+    0x82315001, 0x002C62AB, 0x40000000, 0xF580C900, 0x00000007, 0x02010800,
+    0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x0FFFFFFF, 0xFFFFFFFF,
+    0xFFFFFFFF, 0x03FFFFFF, 0x3F3FFFFF, 0xFFFFFFFF, 0xAAFF3F3F, 0x3FFFFFFF,
+    0xFFFFFFFF, 0x5FDFFFFF, 0x0FCF1FDC, 0x1FDC1FFF, 0x00000000, 0x00004C40,
+    0x00000000, 0x00000000, 0x00000007, 0x00000000, 0x00000000, 0x00000000,
+    0x00000080, 0x000003FE, 0xFFFFFFFE, 0xFFFFFFFF, 0x001FFFFF, 0xFFFFFFFE,
+    0xFFFFFFFF, 0x07FFFFFF, 0xFFFFFFE0, 0x00001FFF, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
+    0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x0000003F, 0x00000000, 0x00000000,
+    0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x0000000F,
+    0x00000000, 0x00000000, 0x00000000, 0x07FF6000, 0x87FFFFFE, 0x07FFFFFE,
+    0x00000000, 0x00800000, 0xFF7FFFFF, 0xFF7FFFFF, 0x00FFFFFF, 0x00000000,
+    0xFFFF0000, 0xFFFFFFFF, 0xFFFFFFFF, 0xF80001FF, 0x00030003, 0x00000000,
+    0xFFFFFFFF, 0xFFFFFFFF, 0x0000003F, 0x00000003, 0xFFFFD7C0, 0xFFFFFFFB,
+    0x547F7FFF, 0x000FFFFD, 0xFFFFDFFE, 0xFFFFFFFF, 0xDFFEFFFF, 0xFFFFFFFF,
+    0xFFFF007B, 0xFFFFFFFF, 0xFFFF199F, 0x033FCFFF, 0x00000000, 0xFFFE0000,
+    0x027FFFFF, 0xFFFFFFFE, 0xFFFE007F, 0xBBFFFFFB, 0xFFFF0016, 0x000707FF,
+    0x00000000, 0x07FFFFFE, 0x0007FFFF, 0xFFFF03FF, 0xFFFFFFFF, 0x7CFFFFFF,
+    0xFFEF7FFF, 0x03FF3DFF, 0xFFFFFFEE, 0xF3FFFFFF, 0xFF1E3FFF, 0x0000FFCF,
+    0xFFF99FEE, 0xD3C5FDFF, 0xB080399F, 0x0003FFCF, 0xFFF987E4, 0xD36DFDFF,
+    0x5E003987, 0x001FFFC0, 0xFFFBAFEE, 0xF3EDFDFF, 0x00003BBF, 0x0000FFC1,
+    0xFFF99FEE, 0xF3CDFDFF, 0xB0C0398F, 0x0000FFC3, 0xD63DC7EC, 0xC3BFC718,
+    0x00803DC7, 0x0000FF80, 0xFFFDDFEE, 0xC3EFFDFF, 0x00603DDF, 0x0000FFC3,
+    0xFFFDDFEC, 0xC3EFFDFF, 0x40603DDF, 0x0000FFC3, 0xFFFDDFEC, 0xC3FFFDFF,
+    0x00803DCF, 0x0000FFC3, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xFFFFFFFE, 0x07FF7FFF, 0x03FF7FFF, 0x00000000, 0xFEF02596, 0x3BFF6CAE,
+    0x03FF3F5F, 0x00000000, 0x03000000, 0xC2A003FF, 0xFFFFFEFF, 0xFFFE03FF,
+    0xFEBF0FDF, 0x02FE3FFF, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1FFF0000, 0x00000002,
+    0x000000A0, 0x003EFFFE, 0xFFFFFFFE, 0xFFFFFFFF, 0x661FFFFF, 0xFFFFFFFE,
+    0xFFFFFFFF, 0x77FFFFFF,
+};
+static const unsigned char nmstrtPages[] = {
+    0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x00, 0x00, 0x09, 0x0A, 0x0B,
+    0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x13, 0x00, 0x14, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x15, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x18,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00,
+};
+static const unsigned char namePages[] = {
+    0x19, 0x03, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x00, 0x00, 0x1F, 0x20, 0x21,
+    0x22, 0x23, 0x24, 0x25, 0x10, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x13, 0x26, 0x14, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x27, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x18,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00,
+};
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/siphash.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/siphash.h
new file mode 100644
index 00000000000..e5406d7ee9e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/siphash.h
@@ -0,0 +1,393 @@
+/* ==========================================================================
+ * siphash.h - SipHash-2-4 in a single header file
+ * --------------------------------------------------------------------------
+ * Derived by William Ahern from the reference implementation[1] published[2]
+ * by Jean-Philippe Aumasson and Daniel J. Berstein.
+ * Minimal changes by Sebastian Pipping and Victor Stinner on top, see below.
+ * Licensed under the CC0 Public Domain Dedication license.
+ *
+ * 1. https://www.131002.net/siphash/siphash24.c
+ * 2. https://www.131002.net/siphash/
+ * --------------------------------------------------------------------------
+ * HISTORY:
+ *
+ * 2020-10-03  (Sebastian Pipping)
+ *   - Drop support for Visual Studio 9.0/2008 and earlier
+ *
+ * 2019-08-03  (Sebastian Pipping)
+ *   - Mark part of sip24_valid as to be excluded from clang-format
+ *   - Re-format code using clang-format 9
+ *
+ * 2018-07-08  (Anton Maklakov)
+ *   - Add "fall through" markers for GCC's -Wimplicit-fallthrough
+ *
+ * 2017-11-03  (Sebastian Pipping)
+ *   - Hide sip_tobin and sip_binof unless SIPHASH_TOBIN macro is defined
+ *
+ * 2017-07-25  (Vadim Zeitlin)
+ *   - Fix use of SIPHASH_MAIN macro
+ *
+ * 2017-07-05  (Sebastian Pipping)
+ *   - Use _SIP_ULL macro to not require a C++11 compiler if compiled as C++
+ *   - Add const qualifiers at two places
+ *   - Ensure <=80 characters line length (assuming tab width 4)
+ *
+ * 2017-06-23  (Victor Stinner)
+ *   - Address Win64 compile warnings
+ *
+ * 2017-06-18  (Sebastian Pipping)
+ *   - Clarify license note in the header
+ *   - Address C89 issues:
+ *     - Stop using inline keyword (and let compiler decide)
+ *     - Replace _Bool by int
+ *     - Turn macro siphash24 into a function
+ *     - Address invalid conversion (void pointer) by explicit cast
+ *   - Address lack of stdint.h for Visual Studio 2003 to 2008
+ *   - Always expose sip24_valid (for self-tests)
+ *
+ * 2012-11-04 - Born.  (William Ahern)
+ * --------------------------------------------------------------------------
+ * USAGE:
+ *
+ * SipHash-2-4 takes as input two 64-bit words as the key, some number of
+ * message bytes, and outputs a 64-bit word as the message digest. This
+ * implementation employs two data structures: a struct sipkey for
+ * representing the key, and a struct siphash for representing the hash
+ * state.
+ *
+ * For converting a 16-byte unsigned char array to a key, use either the
+ * macro sip_keyof or the routine sip_tokey. The former instantiates a
+ * compound literal key, while the latter requires a key object as a
+ * parameter.
+ *
+ * 	unsigned char secret[16];
+ * 	arc4random_buf(secret, sizeof secret);
+ * 	struct sipkey *key = sip_keyof(secret);
+ *
+ * For hashing a message, use either the convenience macro siphash24 or the
+ * routines sip24_init, sip24_update, and sip24_final.
+ *
+ * 	struct siphash state;
+ * 	void *msg;
+ * 	size_t len;
+ * 	uint64_t hash;
+ *
+ * 	sip24_init(&state, key);
+ * 	sip24_update(&state, msg, len);
+ * 	hash = sip24_final(&state);
+ *
+ * or
+ *
+ * 	hash = siphash24(msg, len, key);
+ *
+ * To convert the 64-bit hash value to a canonical 8-byte little-endian
+ * binary representation, use either the macro sip_binof or the routine
+ * sip_tobin. The former instantiates and returns a compound literal array,
+ * while the latter requires an array object as a parameter.
+ * --------------------------------------------------------------------------
+ * NOTES:
+ *
+ * o Neither sip_keyof, sip_binof, nor siphash24 will work with compilers
+ *   lacking compound literal support. Instead, you must use the lower-level
+ *   interfaces which take as parameters the temporary state objects.
+ *
+ * o Uppercase macros may evaluate parameters more than once. Lowercase
+ *   macros should not exhibit any such side effects.
+ * ==========================================================================
+ */
+#ifndef SIPHASH_H
+#define SIPHASH_H
+
+#include <stddef.h> /* size_t */
+#include <stdint.h> /* uint64_t uint32_t uint8_t */
+
+/*
+ * Workaround to not require a C++11 compiler for using ULL suffix
+ * if this code is included and compiled as C++; related GCC warning is:
+ * warning: use of C++11 long long integer constant [-Wlong-long]
+ */
+#define _SIP_ULL(high, low) (((uint64_t)high << 32) | low)
+
+#define SIP_ROTL(x, b) (uint64_t)(((x) << (b)) | ((x) >> (64 - (b))))
+
+#define SIP_U32TO8_LE(p, v)                                                    \
+  (p)[0] = (uint8_t)((v) >> 0);                                                \
+  (p)[1] = (uint8_t)((v) >> 8);                                                \
+  (p)[2] = (uint8_t)((v) >> 16);                                               \
+  (p)[3] = (uint8_t)((v) >> 24);
+
+#define SIP_U64TO8_LE(p, v)                                                    \
+  SIP_U32TO8_LE((p) + 0, (uint32_t)((v) >> 0));                                \
+  SIP_U32TO8_LE((p) + 4, (uint32_t)((v) >> 32));
+
+#define SIP_U8TO64_LE(p)                                                       \
+  (((uint64_t)((p)[0]) << 0) | ((uint64_t)((p)[1]) << 8)                       \
+   | ((uint64_t)((p)[2]) << 16) | ((uint64_t)((p)[3]) << 24)                   \
+   | ((uint64_t)((p)[4]) << 32) | ((uint64_t)((p)[5]) << 40)                   \
+   | ((uint64_t)((p)[6]) << 48) | ((uint64_t)((p)[7]) << 56))
+
+#define SIPHASH_INITIALIZER                                                    \
+  { 0, 0, 0, 0, {0}, 0, 0 }
+
+struct siphash {
+  uint64_t v0, v1, v2, v3;
+
+  unsigned char buf[8], *p;
+  uint64_t c;
+}; /* struct siphash */
+
+#define SIP_KEYLEN 16
+
+struct sipkey {
+  uint64_t k[2];
+}; /* struct sipkey */
+
+#define sip_keyof(k) sip_tokey(&(struct sipkey){{0}}, (k))
+
+static struct sipkey *
+sip_tokey(struct sipkey *key, const void *src) {
+  key->k[0] = SIP_U8TO64_LE((const unsigned char *)src);
+  key->k[1] = SIP_U8TO64_LE((const unsigned char *)src + 8);
+  return key;
+} /* sip_tokey() */
+
+#ifdef SIPHASH_TOBIN
+
+#  define sip_binof(v) sip_tobin((unsigned char[8]){0}, (v))
+
+static void *
+sip_tobin(void *dst, uint64_t u64) {
+  SIP_U64TO8_LE((unsigned char *)dst, u64);
+  return dst;
+} /* sip_tobin() */
+
+#endif /* SIPHASH_TOBIN */
+
+static void
+sip_round(struct siphash *H, const int rounds) {
+  int i;
+
+  for (i = 0; i < rounds; i++) {
+    H->v0 += H->v1;
+    H->v1 = SIP_ROTL(H->v1, 13);
+    H->v1 ^= H->v0;
+    H->v0 = SIP_ROTL(H->v0, 32);
+
+    H->v2 += H->v3;
+    H->v3 = SIP_ROTL(H->v3, 16);
+    H->v3 ^= H->v2;
+
+    H->v0 += H->v3;
+    H->v3 = SIP_ROTL(H->v3, 21);
+    H->v3 ^= H->v0;
+
+    H->v2 += H->v1;
+    H->v1 = SIP_ROTL(H->v1, 17);
+    H->v1 ^= H->v2;
+    H->v2 = SIP_ROTL(H->v2, 32);
+  }
+} /* sip_round() */
+
+static struct siphash *
+sip24_init(struct siphash *H, const struct sipkey *key) {
+  H->v0 = _SIP_ULL(0x736f6d65U, 0x70736575U) ^ key->k[0];
+  H->v1 = _SIP_ULL(0x646f7261U, 0x6e646f6dU) ^ key->k[1];
+  H->v2 = _SIP_ULL(0x6c796765U, 0x6e657261U) ^ key->k[0];
+  H->v3 = _SIP_ULL(0x74656462U, 0x79746573U) ^ key->k[1];
+
+  H->p = H->buf;
+  H->c = 0;
+
+  return H;
+} /* sip24_init() */
+
+#define sip_endof(a) (&(a)[sizeof(a) / sizeof *(a)])
+
+static struct siphash *
+sip24_update(struct siphash *H, const void *src, size_t len) {
+  const unsigned char *p = (const unsigned char *)src, *pe = p + len;
+  uint64_t m;
+
+  do {
+    while (p < pe && H->p < sip_endof(H->buf))
+      *H->p++ = *p++;
+
+    if (H->p < sip_endof(H->buf))
+      break;
+
+    m = SIP_U8TO64_LE(H->buf);
+    H->v3 ^= m;
+    sip_round(H, 2);
+    H->v0 ^= m;
+
+    H->p = H->buf;
+    H->c += 8;
+  } while (p < pe);
+
+  return H;
+} /* sip24_update() */
+
+static uint64_t
+sip24_final(struct siphash *H) {
+  const char left = (char)(H->p - H->buf);
+  uint64_t b = (H->c + left) << 56;
+
+  switch (left) {
+  case 7:
+    b |= (uint64_t)H->buf[6] << 48;
+    /* fall through */
+  case 6:
+    b |= (uint64_t)H->buf[5] << 40;
+    /* fall through */
+  case 5:
+    b |= (uint64_t)H->buf[4] << 32;
+    /* fall through */
+  case 4:
+    b |= (uint64_t)H->buf[3] << 24;
+    /* fall through */
+  case 3:
+    b |= (uint64_t)H->buf[2] << 16;
+    /* fall through */
+  case 2:
+    b |= (uint64_t)H->buf[1] << 8;
+    /* fall through */
+  case 1:
+    b |= (uint64_t)H->buf[0] << 0;
+    /* fall through */
+  case 0:
+    break;
+  }
+
+  H->v3 ^= b;
+  sip_round(H, 2);
+  H->v0 ^= b;
+  H->v2 ^= 0xff;
+  sip_round(H, 4);
+
+  return H->v0 ^ H->v1 ^ H->v2 ^ H->v3;
+} /* sip24_final() */
+
+static uint64_t
+siphash24(const void *src, size_t len, const struct sipkey *key) {
+  struct siphash state = SIPHASH_INITIALIZER;
+  return sip24_final(sip24_update(sip24_init(&state, key), src, len));
+} /* siphash24() */
+
+/*
+ * SipHash-2-4 output with
+ * k = 00 01 02 ...
+ * and
+ * in = (empty string)
+ * in = 00 (1 byte)
+ * in = 00 01 (2 bytes)
+ * in = 00 01 02 (3 bytes)
+ * ...
+ * in = 00 01 02 ... 3e (63 bytes)
+ */
+static int
+sip24_valid(void) {
+  /* clang-format off */
+  static const unsigned char vectors[64][8] = {
+    { 0x31, 0x0e, 0x0e, 0xdd, 0x47, 0xdb, 0x6f, 0x72, },
+    { 0xfd, 0x67, 0xdc, 0x93, 0xc5, 0x39, 0xf8, 0x74, },
+    { 0x5a, 0x4f, 0xa9, 0xd9, 0x09, 0x80, 0x6c, 0x0d, },
+    { 0x2d, 0x7e, 0xfb, 0xd7, 0x96, 0x66, 0x67, 0x85, },
+    { 0xb7, 0x87, 0x71, 0x27, 0xe0, 0x94, 0x27, 0xcf, },
+    { 0x8d, 0xa6, 0x99, 0xcd, 0x64, 0x55, 0x76, 0x18, },
+    { 0xce, 0xe3, 0xfe, 0x58, 0x6e, 0x46, 0xc9, 0xcb, },
+    { 0x37, 0xd1, 0x01, 0x8b, 0xf5, 0x00, 0x02, 0xab, },
+    { 0x62, 0x24, 0x93, 0x9a, 0x79, 0xf5, 0xf5, 0x93, },
+    { 0xb0, 0xe4, 0xa9, 0x0b, 0xdf, 0x82, 0x00, 0x9e, },
+    { 0xf3, 0xb9, 0xdd, 0x94, 0xc5, 0xbb, 0x5d, 0x7a, },
+    { 0xa7, 0xad, 0x6b, 0x22, 0x46, 0x2f, 0xb3, 0xf4, },
+    { 0xfb, 0xe5, 0x0e, 0x86, 0xbc, 0x8f, 0x1e, 0x75, },
+    { 0x90, 0x3d, 0x84, 0xc0, 0x27, 0x56, 0xea, 0x14, },
+    { 0xee, 0xf2, 0x7a, 0x8e, 0x90, 0xca, 0x23, 0xf7, },
+    { 0xe5, 0x45, 0xbe, 0x49, 0x61, 0xca, 0x29, 0xa1, },
+    { 0xdb, 0x9b, 0xc2, 0x57, 0x7f, 0xcc, 0x2a, 0x3f, },
+    { 0x94, 0x47, 0xbe, 0x2c, 0xf5, 0xe9, 0x9a, 0x69, },
+    { 0x9c, 0xd3, 0x8d, 0x96, 0xf0, 0xb3, 0xc1, 0x4b, },
+    { 0xbd, 0x61, 0x79, 0xa7, 0x1d, 0xc9, 0x6d, 0xbb, },
+    { 0x98, 0xee, 0xa2, 0x1a, 0xf2, 0x5c, 0xd6, 0xbe, },
+    { 0xc7, 0x67, 0x3b, 0x2e, 0xb0, 0xcb, 0xf2, 0xd0, },
+    { 0x88, 0x3e, 0xa3, 0xe3, 0x95, 0x67, 0x53, 0x93, },
+    { 0xc8, 0xce, 0x5c, 0xcd, 0x8c, 0x03, 0x0c, 0xa8, },
+    { 0x94, 0xaf, 0x49, 0xf6, 0xc6, 0x50, 0xad, 0xb8, },
+    { 0xea, 0xb8, 0x85, 0x8a, 0xde, 0x92, 0xe1, 0xbc, },
+    { 0xf3, 0x15, 0xbb, 0x5b, 0xb8, 0x35, 0xd8, 0x17, },
+    { 0xad, 0xcf, 0x6b, 0x07, 0x63, 0x61, 0x2e, 0x2f, },
+    { 0xa5, 0xc9, 0x1d, 0xa7, 0xac, 0xaa, 0x4d, 0xde, },
+    { 0x71, 0x65, 0x95, 0x87, 0x66, 0x50, 0xa2, 0xa6, },
+    { 0x28, 0xef, 0x49, 0x5c, 0x53, 0xa3, 0x87, 0xad, },
+    { 0x42, 0xc3, 0x41, 0xd8, 0xfa, 0x92, 0xd8, 0x32, },
+    { 0xce, 0x7c, 0xf2, 0x72, 0x2f, 0x51, 0x27, 0x71, },
+    { 0xe3, 0x78, 0x59, 0xf9, 0x46, 0x23, 0xf3, 0xa7, },
+    { 0x38, 0x12, 0x05, 0xbb, 0x1a, 0xb0, 0xe0, 0x12, },
+    { 0xae, 0x97, 0xa1, 0x0f, 0xd4, 0x34, 0xe0, 0x15, },
+    { 0xb4, 0xa3, 0x15, 0x08, 0xbe, 0xff, 0x4d, 0x31, },
+    { 0x81, 0x39, 0x62, 0x29, 0xf0, 0x90, 0x79, 0x02, },
+    { 0x4d, 0x0c, 0xf4, 0x9e, 0xe5, 0xd4, 0xdc, 0xca, },
+    { 0x5c, 0x73, 0x33, 0x6a, 0x76, 0xd8, 0xbf, 0x9a, },
+    { 0xd0, 0xa7, 0x04, 0x53, 0x6b, 0xa9, 0x3e, 0x0e, },
+    { 0x92, 0x59, 0x58, 0xfc, 0xd6, 0x42, 0x0c, 0xad, },
+    { 0xa9, 0x15, 0xc2, 0x9b, 0xc8, 0x06, 0x73, 0x18, },
+    { 0x95, 0x2b, 0x79, 0xf3, 0xbc, 0x0a, 0xa6, 0xd4, },
+    { 0xf2, 0x1d, 0xf2, 0xe4, 0x1d, 0x45, 0x35, 0xf9, },
+    { 0x87, 0x57, 0x75, 0x19, 0x04, 0x8f, 0x53, 0xa9, },
+    { 0x10, 0xa5, 0x6c, 0xf5, 0xdf, 0xcd, 0x9a, 0xdb, },
+    { 0xeb, 0x75, 0x09, 0x5c, 0xcd, 0x98, 0x6c, 0xd0, },
+    { 0x51, 0xa9, 0xcb, 0x9e, 0xcb, 0xa3, 0x12, 0xe6, },
+    { 0x96, 0xaf, 0xad, 0xfc, 0x2c, 0xe6, 0x66, 0xc7, },
+    { 0x72, 0xfe, 0x52, 0x97, 0x5a, 0x43, 0x64, 0xee, },
+    { 0x5a, 0x16, 0x45, 0xb2, 0x76, 0xd5, 0x92, 0xa1, },
+    { 0xb2, 0x74, 0xcb, 0x8e, 0xbf, 0x87, 0x87, 0x0a, },
+    { 0x6f, 0x9b, 0xb4, 0x20, 0x3d, 0xe7, 0xb3, 0x81, },
+    { 0xea, 0xec, 0xb2, 0xa3, 0x0b, 0x22, 0xa8, 0x7f, },
+    { 0x99, 0x24, 0xa4, 0x3c, 0xc1, 0x31, 0x57, 0x24, },
+    { 0xbd, 0x83, 0x8d, 0x3a, 0xaf, 0xbf, 0x8d, 0xb7, },
+    { 0x0b, 0x1a, 0x2a, 0x32, 0x65, 0xd5, 0x1a, 0xea, },
+    { 0x13, 0x50, 0x79, 0xa3, 0x23, 0x1c, 0xe6, 0x60, },
+    { 0x93, 0x2b, 0x28, 0x46, 0xe4, 0xd7, 0x06, 0x66, },
+    { 0xe1, 0x91, 0x5f, 0x5c, 0xb1, 0xec, 0xa4, 0x6c, },
+    { 0xf3, 0x25, 0x96, 0x5c, 0xa1, 0x6d, 0x62, 0x9f, },
+    { 0x57, 0x5f, 0xf2, 0x8e, 0x60, 0x38, 0x1b, 0xe5, },
+    { 0x72, 0x45, 0x06, 0xeb, 0x4c, 0x32, 0x8a, 0x95, }
+  };
+  /* clang-format on */
+
+  unsigned char in[64];
+  struct sipkey k;
+  size_t i;
+
+  sip_tokey(&k, "\000\001\002\003\004\005\006\007\010\011"
+                "\012\013\014\015\016\017");
+
+  for (i = 0; i < sizeof in; ++i) {
+    in[i] = (unsigned char)i;
+
+    if (siphash24(in, i, &k) != SIP_U8TO64_LE(vectors[i]))
+      return 0;
+  }
+
+  return 1;
+} /* sip24_valid() */
+
+#ifdef SIPHASH_MAIN
+
+#  include <stdio.h>
+
+int
+main(void) {
+  const int ok = sip24_valid();
+
+  if (ok)
+    puts("OK");
+  else
+    puts("FAIL");
+
+  return ! ok;
+} /* main() */
+
+#endif /* SIPHASH_MAIN */
+
+#endif /* SIPHASH_H */
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/utf8tab.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/utf8tab.h
new file mode 100644
index 00000000000..88efcf91cc1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/utf8tab.h
@@ -0,0 +1,66 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 1997-2000 Thai Open Source Software Center Ltd
+   Copyright (c) 2000      Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2002      Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
+   Copyright (c) 2017      Sebastian Pipping <sebastian@pipping.org>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+/* 0x80 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0x84 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0x88 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0x8C */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0x90 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0x94 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0x98 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0x9C */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0xA0 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0xA4 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0xA8 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0xAC */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0xB0 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0xB4 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0xB8 */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0xBC */ BT_TRAIL, BT_TRAIL, BT_TRAIL, BT_TRAIL,
+    /* 0xC0 */ BT_LEAD2, BT_LEAD2, BT_LEAD2, BT_LEAD2,
+    /* 0xC4 */ BT_LEAD2, BT_LEAD2, BT_LEAD2, BT_LEAD2,
+    /* 0xC8 */ BT_LEAD2, BT_LEAD2, BT_LEAD2, BT_LEAD2,
+    /* 0xCC */ BT_LEAD2, BT_LEAD2, BT_LEAD2, BT_LEAD2,
+    /* 0xD0 */ BT_LEAD2, BT_LEAD2, BT_LEAD2, BT_LEAD2,
+    /* 0xD4 */ BT_LEAD2, BT_LEAD2, BT_LEAD2, BT_LEAD2,
+    /* 0xD8 */ BT_LEAD2, BT_LEAD2, BT_LEAD2, BT_LEAD2,
+    /* 0xDC */ BT_LEAD2, BT_LEAD2, BT_LEAD2, BT_LEAD2,
+    /* 0xE0 */ BT_LEAD3, BT_LEAD3, BT_LEAD3, BT_LEAD3,
+    /* 0xE4 */ BT_LEAD3, BT_LEAD3, BT_LEAD3, BT_LEAD3,
+    /* 0xE8 */ BT_LEAD3, BT_LEAD3, BT_LEAD3, BT_LEAD3,
+    /* 0xEC */ BT_LEAD3, BT_LEAD3, BT_LEAD3, BT_LEAD3,
+    /* 0xF0 */ BT_LEAD4, BT_LEAD4, BT_LEAD4, BT_LEAD4,
+    /* 0xF4 */ BT_LEAD4, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0xF8 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
+    /* 0xFC */ BT_NONXML, BT_NONXML, BT_MALFORM, BT_MALFORM,
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/winconfig.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/winconfig.h
new file mode 100644
index 00000000000..2ecd61b5b94
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/winconfig.h
@@ -0,0 +1,45 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 2000      Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2002      Greg Stein <gstein@users.sourceforge.net>
+   Copyright (c) 2005      Karl Waclawek <karl@waclawek.net>
+   Copyright (c) 2017-2021 Sebastian Pipping <sebastian@pipping.org>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+#ifndef WINCONFIG_H
+#define WINCONFIG_H
+
+#define WIN32_LEAN_AND_MEAN
+#include <windows.h>
+#undef WIN32_LEAN_AND_MEAN
+
+#include <memory.h>
+#include <string.h>
+
+#endif /* ndef WINCONFIG_H */
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/xmlrole.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/xmlrole.h
new file mode 100644
index 00000000000..d6e1fa150a1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/xmlrole.h
@@ -0,0 +1,142 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 1997-2000 Thai Open Source Software Center Ltd
+   Copyright (c) 2000      Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2002      Karl Waclawek <karl@waclawek.net>
+   Copyright (c) 2002      Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
+   Copyright (c) 2017      Sebastian Pipping <sebastian@pipping.org>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+#ifndef XmlRole_INCLUDED
+#define XmlRole_INCLUDED 1
+
+#ifdef __VMS
+/*      0        1         2         3      0        1         2         3
+        1234567890123456789012345678901     1234567890123456789012345678901 */
+#  define XmlPrologStateInitExternalEntity XmlPrologStateInitExternalEnt
+#endif
+
+#include "xmltok.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum {
+  XML_ROLE_ERROR = -1,
+  XML_ROLE_NONE = 0,
+  XML_ROLE_XML_DECL,
+  XML_ROLE_INSTANCE_START,
+  XML_ROLE_DOCTYPE_NONE,
+  XML_ROLE_DOCTYPE_NAME,
+  XML_ROLE_DOCTYPE_SYSTEM_ID,
+  XML_ROLE_DOCTYPE_PUBLIC_ID,
+  XML_ROLE_DOCTYPE_INTERNAL_SUBSET,
+  XML_ROLE_DOCTYPE_CLOSE,
+  XML_ROLE_GENERAL_ENTITY_NAME,
+  XML_ROLE_PARAM_ENTITY_NAME,
+  XML_ROLE_ENTITY_NONE,
+  XML_ROLE_ENTITY_VALUE,
+  XML_ROLE_ENTITY_SYSTEM_ID,
+  XML_ROLE_ENTITY_PUBLIC_ID,
+  XML_ROLE_ENTITY_COMPLETE,
+  XML_ROLE_ENTITY_NOTATION_NAME,
+  XML_ROLE_NOTATION_NONE,
+  XML_ROLE_NOTATION_NAME,
+  XML_ROLE_NOTATION_SYSTEM_ID,
+  XML_ROLE_NOTATION_NO_SYSTEM_ID,
+  XML_ROLE_NOTATION_PUBLIC_ID,
+  XML_ROLE_ATTRIBUTE_NAME,
+  XML_ROLE_ATTRIBUTE_TYPE_CDATA,
+  XML_ROLE_ATTRIBUTE_TYPE_ID,
+  XML_ROLE_ATTRIBUTE_TYPE_IDREF,
+  XML_ROLE_ATTRIBUTE_TYPE_IDREFS,
+  XML_ROLE_ATTRIBUTE_TYPE_ENTITY,
+  XML_ROLE_ATTRIBUTE_TYPE_ENTITIES,
+  XML_ROLE_ATTRIBUTE_TYPE_NMTOKEN,
+  XML_ROLE_ATTRIBUTE_TYPE_NMTOKENS,
+  XML_ROLE_ATTRIBUTE_ENUM_VALUE,
+  XML_ROLE_ATTRIBUTE_NOTATION_VALUE,
+  XML_ROLE_ATTLIST_NONE,
+  XML_ROLE_ATTLIST_ELEMENT_NAME,
+  XML_ROLE_IMPLIED_ATTRIBUTE_VALUE,
+  XML_ROLE_REQUIRED_ATTRIBUTE_VALUE,
+  XML_ROLE_DEFAULT_ATTRIBUTE_VALUE,
+  XML_ROLE_FIXED_ATTRIBUTE_VALUE,
+  XML_ROLE_ELEMENT_NONE,
+  XML_ROLE_ELEMENT_NAME,
+  XML_ROLE_CONTENT_ANY,
+  XML_ROLE_CONTENT_EMPTY,
+  XML_ROLE_CONTENT_PCDATA,
+  XML_ROLE_GROUP_OPEN,
+  XML_ROLE_GROUP_CLOSE,
+  XML_ROLE_GROUP_CLOSE_REP,
+  XML_ROLE_GROUP_CLOSE_OPT,
+  XML_ROLE_GROUP_CLOSE_PLUS,
+  XML_ROLE_GROUP_CHOICE,
+  XML_ROLE_GROUP_SEQUENCE,
+  XML_ROLE_CONTENT_ELEMENT,
+  XML_ROLE_CONTENT_ELEMENT_REP,
+  XML_ROLE_CONTENT_ELEMENT_OPT,
+  XML_ROLE_CONTENT_ELEMENT_PLUS,
+  XML_ROLE_PI,
+  XML_ROLE_COMMENT,
+#ifdef XML_DTD
+  XML_ROLE_TEXT_DECL,
+  XML_ROLE_IGNORE_SECT,
+  XML_ROLE_INNER_PARAM_ENTITY_REF,
+#endif /* XML_DTD */
+  XML_ROLE_PARAM_ENTITY_REF
+};
+
+typedef struct prolog_state {
+  int(PTRCALL *handler)(struct prolog_state *state, int tok, const char *ptr,
+                        const char *end, const ENCODING *enc);
+  unsigned level;
+  int role_none;
+#ifdef XML_DTD
+  unsigned includeLevel;
+  int documentEntity;
+  int inEntityValue;
+#endif /* XML_DTD */
+} PROLOG_STATE;
+
+void XmlPrologStateInit(PROLOG_STATE *);
+#ifdef XML_DTD
+void XmlPrologStateInitExternalEntity(PROLOG_STATE *);
+#endif /* XML_DTD */
+
+#define XmlTokenRole(state, tok, ptr, end, enc)                                \
+  (((state)->handler)(state, tok, ptr, end, enc))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* not XmlRole_INCLUDED */
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/xmltok.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/xmltok.h
new file mode 100644
index 00000000000..6f630c2f9ba
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/xmltok.h
@@ -0,0 +1,319 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 1997-2000 Thai Open Source Software Center Ltd
+   Copyright (c) 2000      Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2002      Fred L. Drake, Jr. <fdrake@users.sourceforge.net>
+   Copyright (c) 2002-2005 Karl Waclawek <karl@waclawek.net>
+   Copyright (c) 2016-2017 Sebastian Pipping <sebastian@pipping.org>
+   Copyright (c) 2017      Rhodri James <rhodri@wildebeest.org.uk>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+#ifndef XmlTok_INCLUDED
+#define XmlTok_INCLUDED 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* The following token may be returned by XmlContentTok */
+#define XML_TOK_TRAILING_RSQB                                                  \
+  -5 /* ] or ]] at the end of the scan; might be                               \
+        start of illegal ]]> sequence */
+/* The following tokens may be returned by both XmlPrologTok and
+   XmlContentTok.
+*/
+#define XML_TOK_NONE -4 /* The string to be scanned is empty */
+#define XML_TOK_TRAILING_CR                                                    \
+  -3                            /* A CR at the end of the scan;                \
+                                   might be part of CRLF sequence */
+#define XML_TOK_PARTIAL_CHAR -2 /* only part of a multibyte sequence */
+#define XML_TOK_PARTIAL -1      /* only part of a token */
+#define XML_TOK_INVALID 0
+
+/* The following tokens are returned by XmlContentTok; some are also
+   returned by XmlAttributeValueTok, XmlEntityTok, XmlCdataSectionTok.
+*/
+#define XML_TOK_START_TAG_WITH_ATTS 1
+#define XML_TOK_START_TAG_NO_ATTS 2
+#define XML_TOK_EMPTY_ELEMENT_WITH_ATTS 3 /* empty element tag <e/> */
+#define XML_TOK_EMPTY_ELEMENT_NO_ATTS 4
+#define XML_TOK_END_TAG 5
+#define XML_TOK_DATA_CHARS 6
+#define XML_TOK_DATA_NEWLINE 7
+#define XML_TOK_CDATA_SECT_OPEN 8
+#define XML_TOK_ENTITY_REF 9
+#define XML_TOK_CHAR_REF 10 /* numeric character reference */
+
+/* The following tokens may be returned by both XmlPrologTok and
+   XmlContentTok.
+*/
+#define XML_TOK_PI 11       /* processing instruction */
+#define XML_TOK_XML_DECL 12 /* XML decl or text decl */
+#define XML_TOK_COMMENT 13
+#define XML_TOK_BOM 14 /* Byte order mark */
+
+/* The following tokens are returned only by XmlPrologTok */
+#define XML_TOK_PROLOG_S 15
+#define XML_TOK_DECL_OPEN 16  /* <!foo */
+#define XML_TOK_DECL_CLOSE 17 /* > */
+#define XML_TOK_NAME 18
+#define XML_TOK_NMTOKEN 19
+#define XML_TOK_POUND_NAME 20 /* #name */
+#define XML_TOK_OR 21         /* | */
+#define XML_TOK_PERCENT 22
+#define XML_TOK_OPEN_PAREN 23
+#define XML_TOK_CLOSE_PAREN 24
+#define XML_TOK_OPEN_BRACKET 25
+#define XML_TOK_CLOSE_BRACKET 26
+#define XML_TOK_LITERAL 27
+#define XML_TOK_PARAM_ENTITY_REF 28
+#define XML_TOK_INSTANCE_START 29
+
+/* The following occur only in element type declarations */
+#define XML_TOK_NAME_QUESTION 30        /* name? */
+#define XML_TOK_NAME_ASTERISK 31        /* name* */
+#define XML_TOK_NAME_PLUS 32            /* name+ */
+#define XML_TOK_COND_SECT_OPEN 33       /* <![ */
+#define XML_TOK_COND_SECT_CLOSE 34      /* ]]> */
+#define XML_TOK_CLOSE_PAREN_QUESTION 35 /* )? */
+#define XML_TOK_CLOSE_PAREN_ASTERISK 36 /* )* */
+#define XML_TOK_CLOSE_PAREN_PLUS 37     /* )+ */
+#define XML_TOK_COMMA 38
+
+/* The following token is returned only by XmlAttributeValueTok */
+#define XML_TOK_ATTRIBUTE_VALUE_S 39
+
+/* The following token is returned only by XmlCdataSectionTok */
+#define XML_TOK_CDATA_SECT_CLOSE 40
+
+/* With namespace processing this is returned by XmlPrologTok for a
+   name with a colon.
+*/
+#define XML_TOK_PREFIXED_NAME 41
+
+#ifdef XML_DTD
+#  define XML_TOK_IGNORE_SECT 42
+#endif /* XML_DTD */
+
+#ifdef XML_DTD
+#  define XML_N_STATES 4
+#else /* not XML_DTD */
+#  define XML_N_STATES 3
+#endif /* not XML_DTD */
+
+#define XML_PROLOG_STATE 0
+#define XML_CONTENT_STATE 1
+#define XML_CDATA_SECTION_STATE 2
+#ifdef XML_DTD
+#  define XML_IGNORE_SECTION_STATE 3
+#endif /* XML_DTD */
+
+#define XML_N_LITERAL_TYPES 2
+#define XML_ATTRIBUTE_VALUE_LITERAL 0
+#define XML_ENTITY_VALUE_LITERAL 1
+
+/* The size of the buffer passed to XmlUtf8Encode must be at least this. */
+#define XML_UTF8_ENCODE_MAX 4
+/* The size of the buffer passed to XmlUtf16Encode must be at least this. */
+#define XML_UTF16_ENCODE_MAX 2
+
+typedef struct position {
+  /* first line and first column are 0 not 1 */
+  XML_Size lineNumber;
+  XML_Size columnNumber;
+} POSITION;
+
+typedef struct {
+  const char *name;
+  const char *valuePtr;
+  const char *valueEnd;
+  char normalized;
+} ATTRIBUTE;
+
+struct encoding;
+typedef struct encoding ENCODING;
+
+typedef int(PTRCALL *SCANNER)(const ENCODING *, const char *, const char *,
+                              const char **);
+
+enum XML_Convert_Result {
+  XML_CONVERT_COMPLETED = 0,
+  XML_CONVERT_INPUT_INCOMPLETE = 1,
+  XML_CONVERT_OUTPUT_EXHAUSTED
+  = 2 /* and therefore potentially input remaining as well */
+};
+
+struct encoding {
+  SCANNER scanners[XML_N_STATES];
+  SCANNER literalScanners[XML_N_LITERAL_TYPES];
+  int(PTRCALL *nameMatchesAscii)(const ENCODING *, const char *, const char *,
+                                 const char *);
+  int(PTRFASTCALL *nameLength)(const ENCODING *, const char *);
+  const char *(PTRFASTCALL *skipS)(const ENCODING *, const char *);
+  int(PTRCALL *getAtts)(const ENCODING *enc, const char *ptr, int attsMax,
+                        ATTRIBUTE *atts);
+  int(PTRFASTCALL *charRefNumber)(const ENCODING *enc, const char *ptr);
+  int(PTRCALL *predefinedEntityName)(const ENCODING *, const char *,
+                                     const char *);
+  void(PTRCALL *updatePosition)(const ENCODING *, const char *ptr,
+                                const char *end, POSITION *);
+  int(PTRCALL *isPublicId)(const ENCODING *enc, const char *ptr,
+                           const char *end, const char **badPtr);
+  enum XML_Convert_Result(PTRCALL *utf8Convert)(const ENCODING *enc,
+                                                const char **fromP,
+                                                const char *fromLim, char **toP,
+                                                const char *toLim);
+  enum XML_Convert_Result(PTRCALL *utf16Convert)(const ENCODING *enc,
+                                                 const char **fromP,
+                                                 const char *fromLim,
+                                                 unsigned short **toP,
+                                                 const unsigned short *toLim);
+  int minBytesPerChar;
+  char isUtf8;
+  char isUtf16;
+};
+
+/* Scan the string starting at ptr until the end of the next complete
+   token, but do not scan past eptr.  Return an integer giving the
+   type of token.
+
+   Return XML_TOK_NONE when ptr == eptr; nextTokPtr will not be set.
+
+   Return XML_TOK_PARTIAL when the string does not contain a complete
+   token; nextTokPtr will not be set.
+
+   Return XML_TOK_INVALID when the string does not start a valid
+   token; nextTokPtr will be set to point to the character which made
+   the token invalid.
+
+   Otherwise the string starts with a valid token; nextTokPtr will be
+   set to point to the character following the end of that token.
+
+   Each data character counts as a single token, but adjacent data
+   characters may be returned together.  Similarly for characters in
+   the prolog outside literals, comments and processing instructions.
+*/
+
+#define XmlTok(enc, state, ptr, end, nextTokPtr)                               \
+  (((enc)->scanners[state])(enc, ptr, end, nextTokPtr))
+
+#define XmlPrologTok(enc, ptr, end, nextTokPtr)                                \
+  XmlTok(enc, XML_PROLOG_STATE, ptr, end, nextTokPtr)
+
+#define XmlContentTok(enc, ptr, end, nextTokPtr)                               \
+  XmlTok(enc, XML_CONTENT_STATE, ptr, end, nextTokPtr)
+
+#define XmlCdataSectionTok(enc, ptr, end, nextTokPtr)                          \
+  XmlTok(enc, XML_CDATA_SECTION_STATE, ptr, end, nextTokPtr)
+
+#ifdef XML_DTD
+
+#  define XmlIgnoreSectionTok(enc, ptr, end, nextTokPtr)                       \
+    XmlTok(enc, XML_IGNORE_SECTION_STATE, ptr, end, nextTokPtr)
+
+#endif /* XML_DTD */
+
+/* This is used for performing a 2nd-level tokenization on the content
+   of a literal that has already been returned by XmlTok.
+*/
+#define XmlLiteralTok(enc, literalType, ptr, end, nextTokPtr)                  \
+  (((enc)->literalScanners[literalType])(enc, ptr, end, nextTokPtr))
+
+#define XmlAttributeValueTok(enc, ptr, end, nextTokPtr)                        \
+  XmlLiteralTok(enc, XML_ATTRIBUTE_VALUE_LITERAL, ptr, end, nextTokPtr)
+
+#define XmlEntityValueTok(enc, ptr, end, nextTokPtr)                           \
+  XmlLiteralTok(enc, XML_ENTITY_VALUE_LITERAL, ptr, end, nextTokPtr)
+
+#define XmlNameMatchesAscii(enc, ptr1, end1, ptr2)                             \
+  (((enc)->nameMatchesAscii)(enc, ptr1, end1, ptr2))
+
+#define XmlNameLength(enc, ptr) (((enc)->nameLength)(enc, ptr))
+
+#define XmlSkipS(enc, ptr) (((enc)->skipS)(enc, ptr))
+
+#define XmlGetAttributes(enc, ptr, attsMax, atts)                              \
+  (((enc)->getAtts)(enc, ptr, attsMax, atts))
+
+#define XmlCharRefNumber(enc, ptr) (((enc)->charRefNumber)(enc, ptr))
+
+#define XmlPredefinedEntityName(enc, ptr, end)                                 \
+  (((enc)->predefinedEntityName)(enc, ptr, end))
+
+#define XmlUpdatePosition(enc, ptr, end, pos)                                  \
+  (((enc)->updatePosition)(enc, ptr, end, pos))
+
+#define XmlIsPublicId(enc, ptr, end, badPtr)                                   \
+  (((enc)->isPublicId)(enc, ptr, end, badPtr))
+
+#define XmlUtf8Convert(enc, fromP, fromLim, toP, toLim)                        \
+  (((enc)->utf8Convert)(enc, fromP, fromLim, toP, toLim))
+
+#define XmlUtf16Convert(enc, fromP, fromLim, toP, toLim)                       \
+  (((enc)->utf16Convert)(enc, fromP, fromLim, toP, toLim))
+
+typedef struct {
+  ENCODING initEnc;
+  const ENCODING **encPtr;
+} INIT_ENCODING;
+
+int XmlParseXmlDecl(int isGeneralTextEntity, const ENCODING *enc,
+                    const char *ptr, const char *end, const char **badPtr,
+                    const char **versionPtr, const char **versionEndPtr,
+                    const char **encodingNamePtr,
+                    const ENCODING **namedEncodingPtr, int *standalonePtr);
+
+int XmlInitEncoding(INIT_ENCODING *, const ENCODING **, const char *name);
+const ENCODING *XmlGetUtf8InternalEncoding(void);
+const ENCODING *XmlGetUtf16InternalEncoding(void);
+int FASTCALL XmlUtf8Encode(int charNumber, char *buf);
+int FASTCALL XmlUtf16Encode(int charNumber, unsigned short *buf);
+int XmlSizeOfUnknownEncoding(void);
+
+typedef int(XMLCALL *CONVERTER)(void *userData, const char *p);
+
+ENCODING *XmlInitUnknownEncoding(void *mem, int *table, CONVERTER convert,
+                                 void *userData);
+
+int XmlParseXmlDeclNS(int isGeneralTextEntity, const ENCODING *enc,
+                      const char *ptr, const char *end, const char **badPtr,
+                      const char **versionPtr, const char **versionEndPtr,
+                      const char **encodingNamePtr,
+                      const ENCODING **namedEncodingPtr, int *standalonePtr);
+
+int XmlInitEncodingNS(INIT_ENCODING *, const ENCODING **, const char *name);
+const ENCODING *XmlGetUtf8InternalEncodingNS(void);
+const ENCODING *XmlGetUtf16InternalEncodingNS(void);
+ENCODING *XmlInitUnknownEncodingNS(void *mem, int *table, CONVERTER convert,
+                                   void *userData);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* not XmlTok_INCLUDED */
diff --git a/tools/sdk/esp32s3/include/expat/expat/expat/lib/xmltok_impl.h b/tools/sdk/esp32s3/include/expat/expat/expat/lib/xmltok_impl.h
new file mode 100644
index 00000000000..c518aada013
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/expat/expat/lib/xmltok_impl.h
@@ -0,0 +1,74 @@
+/*
+                            __  __            _
+                         ___\ \/ /_ __   __ _| |_
+                        / _ \\  /| '_ \ / _` | __|
+                       |  __//  \| |_) | (_| | |_
+                        \___/_/\_\ .__/ \__,_|\__|
+                                 |_| XML parser
+
+   Copyright (c) 1997-2000 Thai Open Source Software Center Ltd
+   Copyright (c) 2000      Clark Cooper <coopercc@users.sourceforge.net>
+   Copyright (c) 2017-2019 Sebastian Pipping <sebastian@pipping.org>
+   Licensed under the MIT license:
+
+   Permission is  hereby granted,  free of charge,  to any  person obtaining
+   a  copy  of  this  software   and  associated  documentation  files  (the
+   "Software"),  to  deal in  the  Software  without restriction,  including
+   without  limitation the  rights  to use,  copy,  modify, merge,  publish,
+   distribute, sublicense, and/or sell copies of the Software, and to permit
+   persons  to whom  the Software  is  furnished to  do so,  subject to  the
+   following conditions:
+
+   The above copyright  notice and this permission notice  shall be included
+   in all copies or substantial portions of the Software.
+
+   THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT  WARRANTY  OF  ANY  KIND,
+   EXPRESS  OR IMPLIED,  INCLUDING  BUT  NOT LIMITED  TO  THE WARRANTIES  OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN
+   NO EVENT SHALL THE AUTHORS OR  COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+   DAMAGES OR  OTHER LIABILITY, WHETHER  IN AN  ACTION OF CONTRACT,  TORT OR
+   OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+   USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+enum {
+  BT_NONXML,   /* e.g. noncharacter-FFFF */
+  BT_MALFORM,  /* illegal, with regard to encoding */
+  BT_LT,       /* less than = "<" */
+  BT_AMP,      /* ampersand = "&" */
+  BT_RSQB,     /* right square bracket = "[" */
+  BT_LEAD2,    /* lead byte of a 2-byte UTF-8 character */
+  BT_LEAD3,    /* lead byte of a 3-byte UTF-8 character */
+  BT_LEAD4,    /* lead byte of a 4-byte UTF-8 character */
+  BT_TRAIL,    /* trailing unit, e.g. second 16-bit unit of a 4-byte char. */
+  BT_CR,       /* carriage return = "\r" */
+  BT_LF,       /* line feed = "\n" */
+  BT_GT,       /* greater than = ">" */
+  BT_QUOT,     /* quotation character = "\"" */
+  BT_APOS,     /* aposthrophe = "'" */
+  BT_EQUALS,   /* equal sign = "=" */
+  BT_QUEST,    /* question mark = "?" */
+  BT_EXCL,     /* exclamation mark = "!" */
+  BT_SOL,      /* solidus, slash = "/" */
+  BT_SEMI,     /* semicolon = ";" */
+  BT_NUM,      /* number sign = "#" */
+  BT_LSQB,     /* left square bracket = "[" */
+  BT_S,        /* white space, e.g. "\t", " "[, "\r"] */
+  BT_NMSTRT,   /* non-hex name start letter = "G".."Z" + "g".."z" + "_" */
+  BT_COLON,    /* colon = ":" */
+  BT_HEX,      /* hex letter = "A".."F" + "a".."f" */
+  BT_DIGIT,    /* digit = "0".."9" */
+  BT_NAME,     /* dot and middle dot = "." + chr(0xb7) */
+  BT_MINUS,    /* minus = "-" */
+  BT_OTHER,    /* known not to be a name or name start character */
+  BT_NONASCII, /* might be a name or name start character */
+  BT_PERCNT,   /* percent sign = "%" */
+  BT_LPAR,     /* left parenthesis = "(" */
+  BT_RPAR,     /* right parenthesis = "(" */
+  BT_AST,      /* asterisk = "*" */
+  BT_PLUS,     /* plus sign = "+" */
+  BT_COMMA,    /* comma = "," */
+  BT_VERBAR    /* vertical bar = "|" */
+};
+
+#include <stddef.h>
diff --git a/tools/sdk/esp32s3/include/expat/port/include/expat_config.h b/tools/sdk/esp32s3/include/expat/port/include/expat_config.h
new file mode 100644
index 00000000000..468910220f4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/expat/port/include/expat_config.h
@@ -0,0 +1,103 @@
+/* expat_config.h.  Generated from expat_config.h.in by configure.  */
+/* expat_config.h.in.  Generated from configure.ac by autoheader.  */
+
+/* 1234 = LIL_ENDIAN, 4321 = BIGENDIAN */
+#define BYTEORDER 1234
+/* Define to 1 if you have the `bcopy' function. */
+#define HAVE_BCOPY 1
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#define HAVE_DLFCN_H 1
+
+/* Define to 1 if you have the <fcntl.h> header file. */
+#define HAVE_FCNTL_H 1
+
+/* Define to 1 if you have the `getpagesize' function. */
+#define HAVE_GETPAGESIZE 1
+/* Define to 1 if you have the <inttypes.h> header file. */
+#define HAVE_INTTYPES_H 1
+
+/* Define to 1 if you have the `memmove' function. */
+#define HAVE_MEMMOVE 1
+
+/* Define to 1 if you have the <memory.h> header file. */
+#define HAVE_MEMORY_H 1
+
+/* Define to 1 if you have a working `mmap' system call. */
+#define HAVE_MMAP 1
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#define HAVE_STDINT_H 1
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#define HAVE_STDLIB_H 1
+
+/* Define to 1 if you have the <strings.h> header file. */
+#define HAVE_STRINGS_H 1
+
+/* Define to 1 if you have the <string.h> header file. */
+#define HAVE_STRING_H 1
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#define HAVE_SYS_PARAM_H 1
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#define HAVE_SYS_STAT_H 1
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#define HAVE_SYS_TYPES_H 1
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#define HAVE_UNISTD_H 1
+
+/* Define to the sub-directory where libtool stores uninstalled libraries. */
+#define LT_OBJDIR ".libs/"
+
+/* Name of package */
+#define PACKAGE "expat"
+
+/* Define to the address where bug reports for this package should be sent. */
+#define PACKAGE_BUGREPORT "expat-bugs@libexpat.org"
+
+/* Define to the full name of this package. */
+#define PACKAGE_NAME "expat"
+
+/* Define to the full name and version of this package. */
+#define PACKAGE_STRING "expat 2.4.3"
+
+/* Define to the one symbol short name of this package. */
+#define PACKAGE_TARNAME "expat"
+
+/* Define to the home page for this package. */
+#define PACKAGE_URL ""
+
+/* Define to the version of this package. */
+#define PACKAGE_VERSION "2.4.3"
+
+/* Define to 1 if you have the ANSI C header files. */
+#define STDC_HEADERS 1
+
+/* Version number of package */
+#define VERSION "2.4.3"
+
+/* whether byteorder is bigendian */
+/* #undef WORDS_BIGENDIAN */
+
+/* Define to specify how much context to retain around the current parse
+   point. */
+#define XML_CONTEXT_BYTES 1024
+
+/* Define to make parameter entity parsing functionality available. */
+#define XML_DTD 1
+
+/* Define to make XML Namespaces functionality available. */
+#define XML_NS 1
+
+/* Define to empty if `const' does not conform to ANSI C. */
+/* #undef const */
+
+/* Define to `long int' if <sys/types.h> does not define. */
+/* #undef off_t */
+
+/* Define to `unsigned int' if <sys/types.h> does not define. */
+/* #undef size_t */
diff --git a/tools/sdk/esp32s3/include/fatfs/diskio/diskio_impl.h b/tools/sdk/esp32s3/include/fatfs/diskio/diskio_impl.h
new file mode 100644
index 00000000000..9d7e0124815
--- /dev/null
+++ b/tools/sdk/esp32s3/include/fatfs/diskio/diskio_impl.h
@@ -0,0 +1,72 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+typedef unsigned int UINT;
+typedef unsigned char BYTE;
+typedef uint32_t DWORD;
+
+#define FF_DRV_NOT_USED 0xFF
+
+#include "diskio.h"
+#include "esp_err.h"
+
+/**
+ * Structure of pointers to disk IO driver functions.
+ *
+ * See FatFs documentation for details about these functions
+ */
+typedef struct {
+    DSTATUS (*init) (unsigned char pdrv);    /*!< disk initialization function */
+    DSTATUS (*status) (unsigned char pdrv);  /*!< disk status check function */
+    DRESULT (*read) (unsigned char pdrv, unsigned char* buff, uint32_t sector, unsigned count);  /*!< sector read function */
+    DRESULT (*write) (unsigned char pdrv, const unsigned char* buff, uint32_t sector, unsigned count);   /*!< sector write function */
+    DRESULT (*ioctl) (unsigned char pdrv, unsigned char cmd, void* buff); /*!< function to get info about disk and do some misc operations */
+} ff_diskio_impl_t;
+
+/**
+ * Register or unregister diskio driver for given drive number.
+ *
+ * When FATFS library calls one of disk_xxx functions for driver number pdrv,
+ * corresponding function in discio_impl for given pdrv will be called.
+ *
+ * @param pdrv drive number
+ * @param discio_impl   pointer to ff_diskio_impl_t structure with diskio functions
+ *                      or NULL to unregister and free previously registered drive
+ */
+void ff_diskio_register(BYTE pdrv, const ff_diskio_impl_t* discio_impl);
+
+#define ff_diskio_unregister(pdrv_) ff_diskio_register(pdrv_, NULL)
+
+
+/**
+ * Get next available drive number
+ *
+ * @param   out_pdrv            pointer to the byte to set if successful
+ *
+ * @return  ESP_OK              on success
+ *          ESP_ERR_NOT_FOUND   if all drives are attached
+ */
+esp_err_t ff_diskio_get_drive(BYTE* out_pdrv);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/fatfs/diskio/diskio_rawflash.h b/tools/sdk/esp32s3/include/fatfs/diskio/diskio_rawflash.h
new file mode 100644
index 00000000000..73ff15f8810
--- /dev/null
+++ b/tools/sdk/esp32s3/include/fatfs/diskio/diskio_rawflash.h
@@ -0,0 +1,37 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _DISKIO_RAWFLASH_DEFINED
+#define _DISKIO_RAWFLASH_DEFINED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "esp_partition.h"
+
+/**
+ * Register spi flash partition
+ *
+ * @param pdrv  drive number
+ * @param part_handle  pointer to raw flash partition.
+ */
+esp_err_t ff_diskio_register_raw_partition(unsigned char pdrv, const esp_partition_t* part_handle);
+unsigned char ff_diskio_get_pdrv_raw(const esp_partition_t* part_handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _DISKIO_RAWFLASH_DEFINED
diff --git a/tools/sdk/esp32s3/include/fatfs/diskio/diskio_sdmmc.h b/tools/sdk/esp32s3/include/fatfs/diskio/diskio_sdmmc.h
new file mode 100644
index 00000000000..538a9c6da0b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/fatfs/diskio/diskio_sdmmc.h
@@ -0,0 +1,42 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "sdmmc_cmd.h"
+#include "driver/sdmmc_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Register SD/MMC diskio driver
+ *
+ * @param pdrv  drive number
+ * @param card  pointer to sdmmc_card_t structure describing a card; card should be initialized before calling f_mount.
+ */
+void ff_diskio_register_sdmmc(unsigned char pdrv, sdmmc_card_t* card);
+
+/**
+ * @brief Get the driver number corresponding to a card
+ *
+ * @param card The card to get its driver
+ * @return Driver number to the card
+ */
+BYTE ff_diskio_get_pdrv_card(const sdmmc_card_t* card);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/fatfs/diskio/diskio_wl.h b/tools/sdk/esp32s3/include/fatfs/diskio/diskio_wl.h
new file mode 100644
index 00000000000..619cb6b8f72
--- /dev/null
+++ b/tools/sdk/esp32s3/include/fatfs/diskio/diskio_wl.h
@@ -0,0 +1,39 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _DISKIO_WL_DEFINED
+#define _DISKIO_WL_DEFINED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "wear_levelling.h"
+
+
+/**
+ * Register spi flash partition
+ *
+ * @param pdrv  drive number
+ * @param flash_handle  handle of the wear levelling partition.
+ */
+esp_err_t ff_diskio_register_wl_partition(unsigned char pdrv, wl_handle_t flash_handle);
+unsigned char ff_diskio_get_pdrv_wl(wl_handle_t flash_handle);
+void ff_diskio_clear_pdrv_wl(wl_handle_t flash_handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _DISKIO_WL_DEFINED
diff --git a/tools/sdk/esp32s3/include/fatfs/src/diskio.h b/tools/sdk/esp32s3/include/fatfs/src/diskio.h
new file mode 100644
index 00000000000..31776b8b611
--- /dev/null
+++ b/tools/sdk/esp32s3/include/fatfs/src/diskio.h
@@ -0,0 +1,77 @@
+/*-----------------------------------------------------------------------/
+/  Low level disk interface modlue include file   (C)ChaN, 2014          /
+/-----------------------------------------------------------------------*/
+
+#ifndef _DISKIO_DEFINED
+#define _DISKIO_DEFINED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Status of Disk Functions */
+typedef BYTE	DSTATUS;
+
+/* Results of Disk Functions */
+typedef enum {
+	RES_OK = 0,		/* 0: Successful */
+	RES_ERROR,		/* 1: R/W Error */
+	RES_WRPRT,		/* 2: Write Protected */
+	RES_NOTRDY,		/* 3: Not Ready */
+	RES_PARERR		/* 4: Invalid Parameter */
+} DRESULT;
+
+
+/*---------------------------------------*/
+/* Prototypes for disk control functions */
+
+
+DSTATUS disk_initialize (BYTE pdrv);
+DSTATUS disk_status (BYTE pdrv);
+DRESULT disk_read (BYTE pdrv, BYTE* buff, DWORD sector, UINT count);
+DRESULT disk_write (BYTE pdrv, const BYTE* buff, DWORD sector, UINT count);
+DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff);
+
+
+/* Disk Status Bits (DSTATUS) */
+
+#define STA_NOINIT		0x01	/* Drive not initialized */
+#define STA_NODISK		0x02	/* No medium in the drive */
+#define STA_PROTECT		0x04	/* Write protected */
+
+
+/* Command code for disk_ioctrl fucntion */
+
+/* Generic command (Used by FatFs) */
+#define CTRL_SYNC			0	/* Complete pending write process (needed at FF_FS_READONLY == 0) */
+#define GET_SECTOR_COUNT	1	/* Get media size (needed at FF_USE_MKFS == 1) */
+#define GET_SECTOR_SIZE		2	/* Get sector size (needed at FF_MAX_SS != FF_MIN_SS) */
+#define GET_BLOCK_SIZE		3	/* Get erase block size (needed at FF_USE_MKFS == 1) */
+#define CTRL_TRIM			4	/* Inform device that the data on the block of sectors is no longer used (needed at FF_USE_TRIM == 1) */
+
+/* Generic command (Not used by FatFs) */
+#define CTRL_POWER			5	/* Get/Set power status */
+#define CTRL_LOCK			6	/* Lock/Unlock media removal */
+#define CTRL_EJECT			7	/* Eject media */
+#define CTRL_FORMAT			8	/* Create physical format on the media */
+
+/* MMC/SDC specific ioctl command */
+#define MMC_GET_TYPE		10	/* Get card type */
+#define MMC_GET_CSD			11	/* Get CSD */
+#define MMC_GET_CID			12	/* Get CID */
+#define MMC_GET_OCR			13	/* Get OCR */
+#define MMC_GET_SDSTAT		14	/* Get SD status */
+#define ISDIO_READ			55	/* Read data form SD iSDIO register */
+#define ISDIO_WRITE			56	/* Write data to SD iSDIO register */
+#define ISDIO_MRITE			57	/* Masked write data to SD iSDIO register */
+
+/* ATA/CF specific ioctl command */
+#define ATA_GET_REV			20	/* Get F/W revision */
+#define ATA_GET_MODEL		21	/* Get model name */
+#define ATA_GET_SN			22	/* Get serial number */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/fatfs/src/ff.h b/tools/sdk/esp32s3/include/fatfs/src/ff.h
new file mode 100644
index 00000000000..d8ebeb833f3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/fatfs/src/ff.h
@@ -0,0 +1,405 @@
+/*----------------------------------------------------------------------------/
+/  FatFs - Generic FAT Filesystem module  R0.13c                              /
+/-----------------------------------------------------------------------------/
+/
+/ Copyright (C) 2018, ChaN, all right reserved.
+/
+/ FatFs module is an open source software. Redistribution and use of FatFs in
+/ source and binary forms, with or without modification, are permitted provided
+/ that the following condition is met:
+
+/ 1. Redistributions of source code must retain the above copyright notice,
+/    this condition and the following disclaimer.
+/
+/ This software is provided by the copyright holder and contributors "AS IS"
+/ and any warranties related to this software are DISCLAIMED.
+/ The copyright owner or contributors be NOT LIABLE for any damages caused
+/ by use of this software.
+/
+/----------------------------------------------------------------------------*/
+
+
+#ifndef FF_DEFINED
+#define FF_DEFINED	86604	/* Revision ID */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ffconf.h"		/* FatFs configuration options */
+
+#if FF_DEFINED != FFCONF_DEF
+#error Wrong configuration file (ffconf.h).
+#endif
+
+
+/* Integer types used for FatFs API */
+
+#if defined(_WIN32)	/* Main development platform */
+#define FF_INTDEF 2
+#include <windows.h>
+typedef unsigned __int64 QWORD;
+#elif (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || defined(__cplusplus)	/* C99 or later */
+#define FF_INTDEF 2
+#include <stdint.h>
+typedef unsigned int	UINT;	/* int must be 16-bit or 32-bit */
+typedef unsigned char	BYTE;	/* char must be 8-bit */
+typedef uint16_t		WORD;	/* 16-bit unsigned integer */
+typedef uint16_t		WCHAR;	/* 16-bit unsigned integer */
+typedef uint32_t		DWORD;	/* 32-bit unsigned integer */
+typedef uint64_t		QWORD;	/* 64-bit unsigned integer */
+#else  	/* Earlier than C99 */
+#define FF_INTDEF 1
+typedef unsigned int	UINT;	/* int must be 16-bit or 32-bit */
+typedef unsigned char	BYTE;	/* char must be 8-bit */
+typedef unsigned short	WORD;	/* 16-bit unsigned integer */
+typedef unsigned short	WCHAR;	/* 16-bit unsigned integer */
+typedef unsigned long	DWORD;	/* 32-bit unsigned integer */
+#endif
+
+
+/* Definitions of volume management */
+
+#if FF_MULTI_PARTITION		/* Multiple partition configuration */
+typedef struct {
+	BYTE pd;	/* Physical drive number */
+	BYTE pt;	/* Partition: 0:Auto detect, 1-4:Forced partition) */
+} PARTITION;
+extern PARTITION VolToPart[];	/* Volume - Partition resolution table */
+#endif
+
+#if FF_STR_VOLUME_ID
+#ifndef FF_VOLUME_STRS
+extern const char* VolumeStr[FF_VOLUMES];	/* User defied volume ID */
+#endif
+#endif
+
+
+
+/* Type of path name strings on FatFs API */
+
+#ifndef _INC_TCHAR
+#define _INC_TCHAR
+
+#if FF_USE_LFN && FF_LFN_UNICODE == 1 	/* Unicode in UTF-16 encoding */
+typedef WCHAR TCHAR;
+#define _T(x) L ## x
+#define _TEXT(x) L ## x
+#elif FF_USE_LFN && FF_LFN_UNICODE == 2	/* Unicode in UTF-8 encoding */
+typedef char TCHAR;
+#define _T(x) u8 ## x
+#define _TEXT(x) u8 ## x
+#elif FF_USE_LFN && FF_LFN_UNICODE == 3	/* Unicode in UTF-32 encoding */
+typedef DWORD TCHAR;
+#define _T(x) U ## x
+#define _TEXT(x) U ## x
+#elif FF_USE_LFN && (FF_LFN_UNICODE < 0 || FF_LFN_UNICODE > 3)
+#error Wrong FF_LFN_UNICODE setting
+#else									/* ANSI/OEM code in SBCS/DBCS */
+typedef char TCHAR;
+#define _T(x) x
+#define _TEXT(x) x
+#endif
+
+#endif
+
+
+
+/* Type of file size variables */
+
+#if FF_FS_EXFAT
+#if FF_INTDEF != 2
+#error exFAT feature wants C99 or later
+#endif
+typedef QWORD FSIZE_t;
+#else
+typedef DWORD FSIZE_t;
+#endif
+
+
+
+/* Filesystem object structure (FATFS) */
+
+typedef struct {
+	BYTE	fs_type;		/* Filesystem type (0:not mounted) */
+	BYTE	pdrv;			/* Associated physical drive */
+	BYTE	n_fats;			/* Number of FATs (1 or 2) */
+	BYTE	wflag;			/* win[] flag (b0:dirty) */
+	BYTE	fsi_flag;		/* FSINFO flags (b7:disabled, b0:dirty) */
+	WORD	id;				/* Volume mount ID */
+	WORD	n_rootdir;		/* Number of root directory entries (FAT12/16) */
+	WORD	csize;			/* Cluster size [sectors] */
+#if FF_MAX_SS != FF_MIN_SS
+	WORD	ssize;			/* Sector size (512, 1024, 2048 or 4096) */
+#endif
+#if FF_USE_LFN
+	WCHAR*	lfnbuf;			/* LFN working buffer */
+#endif
+#if FF_FS_EXFAT
+	BYTE*	dirbuf;			/* Directory entry block scratchpad buffer for exFAT */
+#endif
+#if FF_FS_REENTRANT
+	FF_SYNC_t	sobj;		/* Identifier of sync object */
+#endif
+#if !FF_FS_READONLY
+	DWORD	last_clst;		/* Last allocated cluster */
+	DWORD	free_clst;		/* Number of free clusters */
+#endif
+#if FF_FS_RPATH
+	DWORD	cdir;			/* Current directory start cluster (0:root) */
+#if FF_FS_EXFAT
+	DWORD	cdc_scl;		/* Containing directory start cluster (invalid when cdir is 0) */
+	DWORD	cdc_size;		/* b31-b8:Size of containing directory, b7-b0: Chain status */
+	DWORD	cdc_ofs;		/* Offset in the containing directory (invalid when cdir is 0) */
+#endif
+#endif
+	DWORD	n_fatent;		/* Number of FAT entries (number of clusters + 2) */
+	DWORD	fsize;			/* Size of an FAT [sectors] */
+	DWORD	volbase;		/* Volume base sector */
+	DWORD	fatbase;		/* FAT base sector */
+	DWORD	dirbase;		/* Root directory base sector/cluster */
+	DWORD	database;		/* Data base sector */
+#if FF_FS_EXFAT
+	DWORD	bitbase;		/* Allocation bitmap base sector */
+#endif
+	DWORD	winsect;		/* Current sector appearing in the win[] */
+	BYTE	win[FF_MAX_SS];	/* Disk access window for Directory, FAT (and file data at tiny cfg) */
+} FATFS;
+
+
+
+/* Object ID and allocation information (FFOBJID) */
+
+typedef struct {
+	FATFS*	fs;				/* Pointer to the hosting volume of this object */
+	WORD	id;				/* Hosting volume mount ID */
+	BYTE	attr;			/* Object attribute */
+	BYTE	stat;			/* Object chain status (b1-0: =0:not contiguous, =2:contiguous, =3:fragmented in this session, b2:sub-directory stretched) */
+	DWORD	sclust;			/* Object data start cluster (0:no cluster or root directory) */
+	FSIZE_t	objsize;		/* Object size (valid when sclust != 0) */
+#if FF_FS_EXFAT
+	DWORD	n_cont;			/* Size of first fragment - 1 (valid when stat == 3) */
+	DWORD	n_frag;			/* Size of last fragment needs to be written to FAT (valid when not zero) */
+	DWORD	c_scl;			/* Containing directory start cluster (valid when sclust != 0) */
+	DWORD	c_size;			/* b31-b8:Size of containing directory, b7-b0: Chain status (valid when c_scl != 0) */
+	DWORD	c_ofs;			/* Offset in the containing directory (valid when file object and sclust != 0) */
+#endif
+#if FF_FS_LOCK
+	UINT	lockid;			/* File lock ID origin from 1 (index of file semaphore table Files[]) */
+#endif
+} FFOBJID;
+
+
+
+/* File object structure (FIL) */
+
+typedef struct {
+	FFOBJID	obj;			/* Object identifier (must be the 1st member to detect invalid object pointer) */
+	BYTE	flag;			/* File status flags */
+	BYTE	err;			/* Abort flag (error code) */
+	FSIZE_t	fptr;			/* File read/write pointer (Zeroed on file open) */
+	DWORD	clust;			/* Current cluster of fpter (invalid when fptr is 0) */
+	DWORD	sect;			/* Sector number appearing in buf[] (0:invalid) */
+#if !FF_FS_READONLY
+	DWORD	dir_sect;		/* Sector number containing the directory entry (not used at exFAT) */
+	BYTE*	dir_ptr;		/* Pointer to the directory entry in the win[] (not used at exFAT) */
+#endif
+#if FF_USE_FASTSEEK
+	DWORD*	cltbl;			/* Pointer to the cluster link map table (nulled on open, set by application) */
+#endif
+#if !FF_FS_TINY
+	BYTE	buf[FF_MAX_SS];	/* File private data read/write window */
+#endif
+} FIL;
+
+
+
+/* Directory object structure (FF_DIR) */
+
+typedef struct {
+	FFOBJID	obj;			/* Object identifier */
+	DWORD	dptr;			/* Current read/write offset */
+	DWORD	clust;			/* Current cluster */
+	DWORD	sect;			/* Current sector (0:Read operation has terminated) */
+	BYTE*	dir;			/* Pointer to the directory item in the win[] */
+	BYTE	fn[12];			/* SFN (in/out) {body[8],ext[3],status[1]} */
+#if FF_USE_LFN
+	DWORD	blk_ofs;		/* Offset of current entry block being processed (0xFFFFFFFF:Invalid) */
+#endif
+#if FF_USE_FIND
+	const TCHAR* pat;		/* Pointer to the name matching pattern */
+#endif
+} FF_DIR;
+
+
+
+/* File information structure (FILINFO) */
+
+typedef struct {
+	FSIZE_t	fsize;			/* File size */
+	WORD	fdate;			/* Modified date */
+	WORD	ftime;			/* Modified time */
+	BYTE	fattrib;		/* File attribute */
+#if FF_USE_LFN
+	TCHAR	altname[FF_SFN_BUF + 1];/* Altenative file name */
+	TCHAR	fname[FF_LFN_BUF + 1];	/* Primary file name */
+#else
+	TCHAR	fname[12 + 1];	/* File name */
+#endif
+} FILINFO;
+
+
+
+/* File function return code (FRESULT) */
+
+typedef enum {
+	FR_OK = 0,				/* (0) Succeeded */
+	FR_DISK_ERR,			/* (1) A hard error occurred in the low level disk I/O layer */
+	FR_INT_ERR,				/* (2) Assertion failed */
+	FR_NOT_READY,			/* (3) The physical drive cannot work */
+	FR_NO_FILE,				/* (4) Could not find the file */
+	FR_NO_PATH,				/* (5) Could not find the path */
+	FR_INVALID_NAME,		/* (6) The path name format is invalid */
+	FR_DENIED,				/* (7) Access denied due to prohibited access or directory full */
+	FR_EXIST,				/* (8) Access denied due to prohibited access */
+	FR_INVALID_OBJECT,		/* (9) The file/directory object is invalid */
+	FR_WRITE_PROTECTED,		/* (10) The physical drive is write protected */
+	FR_INVALID_DRIVE,		/* (11) The logical drive number is invalid */
+	FR_NOT_ENABLED,			/* (12) The volume has no work area */
+	FR_NO_FILESYSTEM,		/* (13) There is no valid FAT volume */
+	FR_MKFS_ABORTED,		/* (14) The f_mkfs() aborted due to any problem */
+	FR_TIMEOUT,				/* (15) Could not get a grant to access the volume within defined period */
+	FR_LOCKED,				/* (16) The operation is rejected according to the file sharing policy */
+	FR_NOT_ENOUGH_CORE,		/* (17) LFN working buffer could not be allocated */
+	FR_TOO_MANY_OPEN_FILES,	/* (18) Number of open files > FF_FS_LOCK */
+	FR_INVALID_PARAMETER	/* (19) Given parameter is invalid */
+} FRESULT;
+
+
+
+/*--------------------------------------------------------------*/
+/* FatFs module application interface                           */
+
+FRESULT f_open (FIL* fp, const TCHAR* path, BYTE mode);				/* Open or create a file */
+FRESULT f_close (FIL* fp);											/* Close an open file object */
+FRESULT f_read (FIL* fp, void* buff, UINT btr, UINT* br);			/* Read data from the file */
+FRESULT f_write (FIL* fp, const void* buff, UINT btw, UINT* bw);	/* Write data to the file */
+FRESULT f_lseek (FIL* fp, FSIZE_t ofs);								/* Move file pointer of the file object */
+FRESULT f_truncate (FIL* fp);										/* Truncate the file */
+FRESULT f_sync (FIL* fp);											/* Flush cached data of the writing file */
+FRESULT f_opendir (FF_DIR* dp, const TCHAR* path);						/* Open a directory */
+FRESULT f_closedir (FF_DIR* dp);										/* Close an open directory */
+FRESULT f_readdir (FF_DIR* dp, FILINFO* fno);							/* Read a directory item */
+FRESULT f_findfirst (FF_DIR* dp, FILINFO* fno, const TCHAR* path, const TCHAR* pattern);	/* Find first file */
+FRESULT f_findnext (FF_DIR* dp, FILINFO* fno);							/* Find next file */
+FRESULT f_mkdir (const TCHAR* path);								/* Create a sub directory */
+FRESULT f_unlink (const TCHAR* path);								/* Delete an existing file or directory */
+FRESULT f_rename (const TCHAR* path_old, const TCHAR* path_new);	/* Rename/Move a file or directory */
+FRESULT f_stat (const TCHAR* path, FILINFO* fno);					/* Get file status */
+FRESULT f_chmod (const TCHAR* path, BYTE attr, BYTE mask);			/* Change attribute of a file/dir */
+FRESULT f_utime (const TCHAR* path, const FILINFO* fno);			/* Change timestamp of a file/dir */
+FRESULT f_chdir (const TCHAR* path);								/* Change current directory */
+FRESULT f_chdrive (const TCHAR* path);								/* Change current drive */
+FRESULT f_getcwd (TCHAR* buff, UINT len);							/* Get current directory */
+FRESULT f_getfree (const TCHAR* path, DWORD* nclst, FATFS** fatfs);	/* Get number of free clusters on the drive */
+FRESULT f_getlabel (const TCHAR* path, TCHAR* label, DWORD* vsn);	/* Get volume label */
+FRESULT f_setlabel (const TCHAR* label);							/* Set volume label */
+FRESULT f_forward (FIL* fp, UINT(*func)(const BYTE*,UINT), UINT btf, UINT* bf);	/* Forward data to the stream */
+FRESULT f_expand (FIL* fp, FSIZE_t fsz, BYTE opt);					/* Allocate a contiguous block to the file */
+FRESULT f_mount (FATFS* fs, const TCHAR* path, BYTE opt);			/* Mount/Unmount a logical drive */
+FRESULT f_mkfs (const TCHAR* path, BYTE opt, DWORD au, void* work, UINT len);	/* Create a FAT volume */
+FRESULT f_fdisk (BYTE pdrv, const DWORD* szt, void* work);			/* Divide a physical drive into some partitions */
+FRESULT f_setcp (WORD cp);											/* Set current code page */
+int f_putc (TCHAR c, FIL* fp);										/* Put a character to the file */
+int f_puts (const TCHAR* str, FIL* cp);								/* Put a string to the file */
+int f_printf (FIL* fp, const TCHAR* str, ...);						/* Put a formatted string to the file */
+TCHAR* f_gets (TCHAR* buff, int len, FIL* fp);						/* Get a string from the file */
+
+#define f_eof(fp) ((int)((fp)->fptr == (fp)->obj.objsize))
+#define f_error(fp) ((fp)->err)
+#define f_tell(fp) ((fp)->fptr)
+#define f_size(fp) ((fp)->obj.objsize)
+#define f_rewind(fp) f_lseek((fp), 0)
+#define f_rewinddir(dp) f_readdir((dp), 0)
+#define f_rmdir(path) f_unlink(path)
+#define f_unmount(path) f_mount(0, path, 0)
+
+#ifndef EOF
+#define EOF (-1)
+#endif
+
+
+
+
+/*--------------------------------------------------------------*/
+/* Additional user defined functions                            */
+
+/* RTC function */
+#if !FF_FS_READONLY && !FF_FS_NORTC
+DWORD get_fattime (void);
+#endif
+
+/* LFN support functions */
+#if FF_USE_LFN >= 1						/* Code conversion (defined in unicode.c) */
+WCHAR ff_oem2uni (WCHAR oem, WORD cp);	/* OEM code to Unicode conversion */
+WCHAR ff_uni2oem (DWORD uni, WORD cp);	/* Unicode to OEM code conversion */
+DWORD ff_wtoupper (DWORD uni);			/* Unicode upper-case conversion */
+#endif
+#if FF_USE_LFN == 3						/* Dynamic memory allocation */
+void* ff_memalloc (UINT msize);			/* Allocate memory block */
+void ff_memfree (void* mblock);			/* Free memory block */
+#endif
+
+/* Sync functions */
+#if FF_FS_REENTRANT
+int ff_cre_syncobj (BYTE vol, FF_SYNC_t* sobj);	/* Create a sync object */
+int ff_req_grant (FF_SYNC_t sobj);		/* Lock sync object */
+void ff_rel_grant (FF_SYNC_t sobj);		/* Unlock sync object */
+int ff_del_syncobj (FF_SYNC_t sobj);	/* Delete a sync object */
+#endif
+
+
+
+
+/*--------------------------------------------------------------*/
+/* Flags and offset address                                     */
+
+
+/* File access mode and open method flags (3rd argument of f_open) */
+#define	FA_READ				0x01
+#define	FA_WRITE			0x02
+#define	FA_OPEN_EXISTING	0x00
+#define	FA_CREATE_NEW		0x04
+#define	FA_CREATE_ALWAYS	0x08
+#define	FA_OPEN_ALWAYS		0x10
+#define	FA_OPEN_APPEND		0x30
+
+/* Fast seek controls (2nd argument of f_lseek) */
+#define CREATE_LINKMAP	((FSIZE_t)0 - 1)
+
+/* Format options (2nd argument of f_mkfs) */
+#define FM_FAT		0x01
+#define FM_FAT32	0x02
+#define FM_EXFAT	0x04
+#define FM_ANY		0x07
+#define FM_SFD		0x08
+
+/* Filesystem type (FATFS.fs_type) */
+#define FS_FAT12	1
+#define FS_FAT16	2
+#define FS_FAT32	3
+#define FS_EXFAT	4
+
+/* File attribute bits for directory entry (FILINFO.fattrib) */
+#define	AM_RDO	0x01	/* Read only */
+#define	AM_HID	0x02	/* Hidden */
+#define	AM_SYS	0x04	/* System */
+#define AM_DIR	0x10	/* Directory */
+#define AM_ARC	0x20	/* Archive */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* FF_DEFINED */
diff --git a/tools/sdk/esp32s3/include/fatfs/src/ffconf.h b/tools/sdk/esp32s3/include/fatfs/src/ffconf.h
new file mode 100644
index 00000000000..6578122c5f2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/fatfs/src/ffconf.h
@@ -0,0 +1,325 @@
+#include "sdkconfig.h"
+
+/*---------------------------------------------------------------------------/
+/  FatFs Functional Configurations
+/---------------------------------------------------------------------------*/
+
+#define FFCONF_DEF	86604	/* Revision ID */
+
+/*---------------------------------------------------------------------------/
+/ Function Configurations
+/---------------------------------------------------------------------------*/
+
+#define FF_FS_READONLY	0
+/* This option switches read-only configuration. (0:Read/Write or 1:Read-only)
+/  Read-only configuration removes writing API functions, f_write(), f_sync(),
+/  f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree()
+/  and optional writing functions as well. */
+
+
+#define FF_FS_MINIMIZE	0
+/* This option defines minimization level to remove some basic API functions.
+/
+/   0: Basic functions are fully enabled.
+/   1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_truncate() and f_rename()
+/      are removed.
+/   2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1.
+/   3: f_lseek() function is removed in addition to 2. */
+
+
+#define FF_USE_STRFUNC	0
+/* This option switches string functions, f_gets(), f_putc(), f_puts() and f_printf().
+/
+/  0: Disable string functions.
+/  1: Enable without LF-CRLF conversion.
+/  2: Enable with LF-CRLF conversion. */
+
+
+#define FF_USE_FIND		0
+/* This option switches filtered directory read functions, f_findfirst() and
+/  f_findnext(). (0:Disable, 1:Enable 2:Enable with matching altname[] too) */
+
+
+#define FF_USE_MKFS		1
+/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */
+
+
+#define FF_USE_FASTSEEK	CONFIG_FATFS_USE_FASTSEEK
+/* This option switches fast seek function. (0:Disable or 1:Enable) */
+
+
+#define FF_USE_EXPAND	0
+/* This option switches f_expand function. (0:Disable or 1:Enable) */
+
+
+#define FF_USE_CHMOD	1
+/* This option switches attribute manipulation functions, f_chmod() and f_utime().
+/  (0:Disable or 1:Enable) Also FF_FS_READONLY needs to be 0 to enable this option. */
+
+
+#define FF_USE_LABEL	0
+/* This option switches volume label functions, f_getlabel() and f_setlabel().
+/  (0:Disable or 1:Enable) */
+
+
+#define FF_USE_FORWARD	0
+/* This option switches f_forward() function. (0:Disable or 1:Enable) */
+
+
+/*---------------------------------------------------------------------------/
+/ Locale and Namespace Configurations
+/---------------------------------------------------------------------------*/
+
+#define FF_CODE_PAGE	CONFIG_FATFS_CODEPAGE
+/* This option specifies the OEM code page to be used on the target system.
+/  Incorrect code page setting can cause a file open failure.
+/
+/   437 - U.S.
+/   720 - Arabic
+/   737 - Greek
+/   771 - KBL
+/   775 - Baltic
+/   850 - Latin 1
+/   852 - Latin 2
+/   855 - Cyrillic
+/   857 - Turkish
+/   860 - Portuguese
+/   861 - Icelandic
+/   862 - Hebrew
+/   863 - Canadian French
+/   864 - Arabic
+/   865 - Nordic
+/   866 - Russian
+/   869 - Greek 2
+/   932 - Japanese (DBCS)
+/   936 - Simplified Chinese (DBCS)
+/   949 - Korean (DBCS)
+/   950 - Traditional Chinese (DBCS)
+/     0 - Include all code pages above and configured by f_setcp()
+*/
+
+
+#if defined(CONFIG_FATFS_LFN_STACK)
+#define FF_USE_LFN    2
+#elif defined(CONFIG_FATFS_LFN_HEAP)
+#define FF_USE_LFN    3
+#else /* CONFIG_FATFS_LFN_NONE */
+#define FF_USE_LFN    0
+#endif
+
+#ifdef CONFIG_FATFS_MAX_LFN
+#define FF_MAX_LFN    CONFIG_FATFS_MAX_LFN
+#endif
+
+/* The FF_USE_LFN switches the support for LFN (long file name).
+/
+/   0: Disable LFN. FF_MAX_LFN has no effect.
+/   1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe.
+/   2: Enable LFN with dynamic working buffer on the STACK.
+/   3: Enable LFN with dynamic working buffer on the HEAP.
+/
+/  To enable the LFN, ffunicode.c needs to be added to the project. The LFN function
+/  requiers certain internal working buffer occupies (FF_MAX_LFN + 1) * 2 bytes and
+/  additional (FF_MAX_LFN + 44) / 15 * 32 bytes when exFAT is enabled.
+/  The FF_MAX_LFN defines size of the working buffer in UTF-16 code unit and it can
+/  be in range of 12 to 255. It is recommended to be set 255 to fully support LFN
+/  specification.
+/  When use stack for the working buffer, take care on stack overflow. When use heap
+/  memory for the working buffer, memory management functions, ff_memalloc() and
+/  ff_memfree() in ffsystem.c, need to be added to the project. */
+
+
+#ifdef CONFIG_FATFS_API_ENCODING_UTF_8
+#define FF_LFN_UNICODE      2
+#elif defined(CONFIG_FATFS_API_ENCODING_UTF_16)
+#define FF_LFN_UNICODE      1
+#else /* CONFIG_FATFS_API_ENCODING_ANSI_OEM */
+#define FF_LFN_UNICODE      0
+#endif
+/* This option switches the character encoding on the API when LFN is enabled.
+/
+/   0: ANSI/OEM in current CP (TCHAR = char)
+/   1: Unicode in UTF-16 (TCHAR = WCHAR)
+/   2: Unicode in UTF-8 (TCHAR = char)
+/   3: Unicode in UTF-32 (TCHAR = DWORD)
+/
+/  Also behavior of string I/O functions will be affected by this option.
+/  When LFN is not enabled, this option has no effect. */
+
+
+#define FF_LFN_BUF		255
+#define FF_SFN_BUF		12
+/* This set of options defines size of file name members in the FILINFO structure
+/  which is used to read out directory items. These values should be suffcient for
+/  the file names to read. The maximum possible length of the read file name depends
+/  on character encoding. When LFN is not enabled, these options have no effect. */
+
+
+#define FF_STRF_ENCODE      3
+/* When FF_LFN_UNICODE >= 1 with LFN enabled, string I/O functions, f_gets(),
+/  f_putc(), f_puts and f_printf() convert the character encoding in it.
+/  This option selects assumption of character encoding ON THE FILE to be
+/  read/written via those functions.
+/
+/   0: ANSI/OEM in current CP
+/   1: Unicode in UTF-16LE
+/   2: Unicode in UTF-16BE
+/   3: Unicode in UTF-8
+*/
+
+
+#define FF_FS_RPATH		0
+/* This option configures support for relative path.
+/
+/   0: Disable relative path and remove related functions.
+/   1: Enable relative path. f_chdir() and f_chdrive() are available.
+/   2: f_getcwd() function is available in addition to 1.
+*/
+
+
+/*---------------------------------------------------------------------------/
+/ Drive/Volume Configurations
+/---------------------------------------------------------------------------*/
+
+#define FF_VOLUMES		2
+/* Number of volumes (logical drives) to be used. (1-10) */
+
+
+#define FF_STR_VOLUME_ID	0
+#define FF_VOLUME_STRS		"RAM","NAND","CF","SD","SD2","USB","USB2","USB3"
+/* FF_STR_VOLUME_ID switches support for volume ID in arbitrary strings.
+/  When FF_STR_VOLUME_ID is set to 1 or 2, arbitrary strings can be used as drive
+/  number in the path name. FF_VOLUME_STRS defines the volume ID strings for each
+/  logical drives. Number of items must not be less than FF_VOLUMES. Valid
+/  characters for the volume ID strings are A-Z, a-z and 0-9, however, they are
+/  compared in case-insensitive. If FF_STR_VOLUME_ID >= 1 and FF_VOLUME_STRS is
+/  not defined, a user defined volume string table needs to be defined as:
+/
+/  const char* VolumeStr[FF_VOLUMES] = {"ram","flash","sd","usb",...
+*/
+
+
+#define FF_MULTI_PARTITION	1
+/* This option switches support for multiple volumes on the physical drive.
+/  By default (0), each logical drive number is bound to the same physical drive
+/  number and only an FAT volume found on the physical drive will be mounted.
+/  When this function is enabled (1), each logical drive number can be bound to
+/  arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk()
+/  funciton will be available. */
+
+/* SD card sector size */
+#define FF_SS_SDCARD      512
+/* wear_levelling library sector size */
+#define FF_SS_WL          CONFIG_WL_SECTOR_SIZE
+
+#define FF_MIN_SS     MIN(FF_SS_SDCARD, FF_SS_WL)
+#define FF_MAX_SS     MAX(FF_SS_SDCARD, FF_SS_WL)
+/* This set of options configures the range of sector size to be supported. (512,
+/  1024, 2048 or 4096) Always set both 512 for most systems, generic memory card and
+/  harddisk. But a larger value may be required for on-board flash memory and some
+/  type of optical media. When FF_MAX_SS is larger than FF_MIN_SS, FatFs is configured
+/  for variable sector size mode and disk_ioctl() function needs to implement
+/  GET_SECTOR_SIZE command. */
+
+
+#define FF_USE_TRIM		0
+/* This option switches support for ATA-TRIM. (0:Disable or 1:Enable)
+/  To enable Trim function, also CTRL_TRIM command should be implemented to the
+/  disk_ioctl() function. */
+
+
+#define FF_FS_NOFSINFO	0
+/* If you need to know correct free space on the FAT32 volume, set bit 0 of this
+/  option, and f_getfree() function at first time after volume mount will force
+/  a full FAT scan. Bit 1 controls the use of last allocated cluster number.
+/
+/  bit0=0: Use free cluster count in the FSINFO if available.
+/  bit0=1: Do not trust free cluster count in the FSINFO.
+/  bit1=0: Use last allocated cluster number in the FSINFO if available.
+/  bit1=1: Do not trust last allocated cluster number in the FSINFO.
+*/
+
+
+
+/*---------------------------------------------------------------------------/
+/ System Configurations
+/---------------------------------------------------------------------------*/
+
+#define FF_FS_TINY		(!CONFIG_FATFS_PER_FILE_CACHE)
+/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny)
+/  At the tiny configuration, size of file object (FIL) is shrinked FF_MAX_SS bytes.
+/  Instead of private sector buffer eliminated from the file object, common sector
+/  buffer in the filesystem object (FATFS) is used for the file data transfer. */
+
+
+#define FF_FS_EXFAT		0
+/* This option switches support for exFAT filesystem. (0:Disable or 1:Enable)
+/  To enable exFAT, also LFN needs to be enabled. (FF_USE_LFN >= 1)
+/  Note that enabling exFAT discards ANSI C (C89) compatibility. */
+
+
+#define FF_FS_NORTC		0
+#define FF_NORTC_MON	1
+#define FF_NORTC_MDAY	1
+#define FF_NORTC_YEAR	2018
+/* The option FF_FS_NORTC switches timestamp functiton. If the system does not have
+/  any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable
+/  the timestamp function. Every object modified by FatFs will have a fixed timestamp
+/  defined by FF_NORTC_MON, FF_NORTC_MDAY and FF_NORTC_YEAR in local time.
+/  To enable timestamp function (FF_FS_NORTC = 0), get_fattime() function need to be
+/  added to the project to read current time form real-time clock. FF_NORTC_MON,
+/  FF_NORTC_MDAY and FF_NORTC_YEAR have no effect.
+/  These options have no effect at read-only configuration (FF_FS_READONLY = 1). */
+
+
+#define FF_FS_LOCK		CONFIG_FATFS_FS_LOCK
+/* The option FF_FS_LOCK switches file lock function to control duplicated file open
+/  and illegal operation to open objects. This option must be 0 when FF_FS_READONLY
+/  is 1.
+/
+/  0:  Disable file lock function. To avoid volume corruption, application program
+/      should avoid illegal open, remove and rename to the open objects.
+/  >0: Enable file lock function. The value defines how many files/sub-directories
+/      can be opened simultaneously under file lock control. Note that the file
+/      lock control is independent of re-entrancy. */
+
+
+#define FF_FS_REENTRANT	1
+#define FF_FS_TIMEOUT	(CONFIG_FATFS_TIMEOUT_MS / portTICK_PERIOD_MS)
+#define FF_SYNC_t		SemaphoreHandle_t
+/* The option FF_FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs
+/  module itself. Note that regardless of this option, file access to different
+/  volume is always re-entrant and volume control functions, f_mount(), f_mkfs()
+/  and f_fdisk() function, are always not re-entrant. Only file/directory access
+/  to the same volume is under control of this function.
+/
+/   0: Disable re-entrancy. FF_FS_TIMEOUT and FF_SYNC_t have no effect.
+/   1: Enable re-entrancy. Also user provided synchronization handlers,
+/      ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj()
+/      function, must be added to the project. Samples are available in
+/      option/syscall.c.
+/
+/  The FF_FS_TIMEOUT defines timeout period in unit of time tick.
+/  The FF_SYNC_t defines O/S dependent sync object type. e.g. HANDLE, ID, OS_EVENT*,
+/  SemaphoreHandle_t and etc. A header file for O/S definitions needs to be
+/  included somewhere in the scope of ff.h. */
+
+#include <sys/param.h>
+#include "freertos/FreeRTOS.h"
+#include "freertos/semphr.h"
+
+/* Some memory allocation functions are declared here in addition to ff.h, so that
+   they can be used also by external code when LFN feature is disabled.
+ */
+void* ff_memalloc (unsigned msize);
+void ff_memfree(void*);
+
+
+/*--- End of configuration options ---*/
+
+/* Redefine names of disk IO functions to prevent name collisions */
+#define disk_initialize     ff_disk_initialize
+#define disk_status         ff_disk_status
+#define disk_read           ff_disk_read
+#define disk_write          ff_disk_write
+#define disk_ioctl          ff_disk_ioctl
diff --git a/tools/sdk/esp32s3/include/fatfs/vfs/esp_vfs_fat.h b/tools/sdk/esp32s3/include/fatfs/vfs/esp_vfs_fat.h
new file mode 100644
index 00000000000..a3ffe387ac4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/fatfs/vfs/esp_vfs_fat.h
@@ -0,0 +1,295 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stddef.h>
+#include "esp_err.h"
+#include "driver/gpio.h"
+#include "driver/sdmmc_types.h"
+#include "driver/sdspi_host.h"
+#include "ff.h"
+#include "wear_levelling.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Register FATFS with VFS component
+ *
+ * This function registers given FAT drive in VFS, at the specified base path.
+ * If only one drive is used, fat_drive argument can be an empty string.
+ * Refer to FATFS library documentation on how to specify FAT drive.
+ * This function also allocates FATFS structure which should be used for f_mount
+ * call.
+ *
+ * @note This function doesn't mount the drive into FATFS, it just connects
+ *       POSIX and C standard library IO function with FATFS. You need to mount
+ *       desired drive into FATFS separately.
+ *
+ * @param base_path  path prefix where FATFS should be registered
+ * @param fat_drive  FATFS drive specification; if only one drive is used, can be an empty string
+ * @param max_files  maximum number of files which can be open at the same time
+ * @param[out] out_fs  pointer to FATFS structure which can be used for FATFS f_mount call is returned via this argument.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if esp_vfs_fat_register was already called
+ *      - ESP_ERR_NO_MEM if not enough memory or too many VFSes already registered
+ */
+esp_err_t esp_vfs_fat_register(const char* base_path, const char* fat_drive,
+        size_t max_files, FATFS** out_fs);
+
+/**
+ * @brief Un-register FATFS from VFS
+ *
+ * @note FATFS structure returned by esp_vfs_fat_register is destroyed after
+ *       this call. Make sure to call f_mount function to unmount it before
+ *       calling esp_vfs_fat_unregister_ctx.
+ *       Difference between this function and the one above is that this one
+ *       will release the correct drive, while the one above will release
+ *       the last registered one
+ *
+ * @param base_path     path prefix where FATFS is registered. This is the same
+ *                      used when esp_vfs_fat_register was called
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if FATFS is not registered in VFS
+ */
+esp_err_t esp_vfs_fat_unregister_path(const char* base_path);
+
+
+/**
+ * @brief Configuration arguments for esp_vfs_fat_sdmmc_mount and esp_vfs_fat_spiflash_mount functions
+ */
+typedef struct {
+    /**
+     * If FAT partition can not be mounted, and this parameter is true,
+     * create partition table and format the filesystem.
+     */
+    bool format_if_mount_failed;
+    int max_files;                  ///< Max number of open files
+    /**
+     * If format_if_mount_failed is set, and mount fails, format the card
+     * with given allocation unit size. Must be a power of 2, between sector
+     * size and 128 * sector size.
+     * For SD cards, sector size is always 512 bytes. For wear_levelling,
+     * sector size is determined by CONFIG_WL_SECTOR_SIZE option.
+     *
+     * Using larger allocation unit size will result in higher read/write
+     * performance and higher overhead when storing small files.
+     *
+     * Setting this field to 0 will result in allocation unit set to the
+     * sector size.
+     */
+    size_t allocation_unit_size;
+} esp_vfs_fat_mount_config_t;
+
+// Compatibility definition
+typedef esp_vfs_fat_mount_config_t esp_vfs_fat_sdmmc_mount_config_t;
+
+/**
+ * @brief Convenience function to get FAT filesystem on SD card registered in VFS
+ *
+ * This is an all-in-one function which does the following:
+ * - initializes SDMMC driver or SPI driver with configuration in host_config
+ * - initializes SD card with configuration in slot_config
+ * - mounts FAT partition on SD card using FATFS library, with configuration in mount_config
+ * - registers FATFS library with VFS, with prefix given by base_prefix variable
+ *
+ * This function is intended to make example code more compact.
+ * For real world applications, developers should implement the logic of
+ * probing SD card, locating and mounting partition, and registering FATFS in VFS,
+ * with proper error checking and handling of exceptional conditions.
+ *
+ * @note Use this API to mount a card through SDSPI is deprecated. Please call
+ *       `esp_vfs_fat_sdspi_mount()` instead for that case.
+ *
+ * @param base_path     path where partition should be registered (e.g. "/sdcard")
+ * @param host_config   Pointer to structure describing SDMMC host. When using
+ *                      SDMMC peripheral, this structure can be initialized using
+ *                      SDMMC_HOST_DEFAULT() macro. When using SPI peripheral,
+ *                      this structure can be initialized using SDSPI_HOST_DEFAULT()
+ *                      macro.
+ * @param slot_config   Pointer to structure with slot configuration.
+ *                      For SDMMC peripheral, pass a pointer to sdmmc_slot_config_t
+ *                      structure initialized using SDMMC_SLOT_CONFIG_DEFAULT.
+ *                      (Deprecated) For SPI peripheral, pass a pointer to sdspi_slot_config_t
+ *                      structure initialized using SDSPI_SLOT_CONFIG_DEFAULT().
+ * @param mount_config  pointer to structure with extra parameters for mounting FATFS
+ * @param[out] out_card  if not NULL, pointer to the card information structure will be returned via this argument
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if esp_vfs_fat_sdmmc_mount was already called
+ *      - ESP_ERR_NO_MEM if memory can not be allocated
+ *      - ESP_FAIL if partition can not be mounted
+ *      - other error codes from SDMMC or SPI drivers, SDMMC protocol, or FATFS drivers
+ */
+esp_err_t esp_vfs_fat_sdmmc_mount(const char* base_path,
+    const sdmmc_host_t* host_config,
+    const void* slot_config,
+    const esp_vfs_fat_mount_config_t* mount_config,
+    sdmmc_card_t** out_card);
+
+/**
+ * @brief Convenience function to get FAT filesystem on SD card registered in VFS
+ *
+ * This is an all-in-one function which does the following:
+ * - initializes an SPI Master device based on the SPI Master driver with configuration in
+ *   slot_config, and attach it to an initialized SPI bus.
+ * - initializes SD card with configuration in host_config_input
+ * - mounts FAT partition on SD card using FATFS library, with configuration in mount_config
+ * - registers FATFS library with VFS, with prefix given by base_prefix variable
+ *
+ * This function is intended to make example code more compact.
+ * For real world applications, developers should implement the logic of
+ * probing SD card, locating and mounting partition, and registering FATFS in VFS,
+ * with proper error checking and handling of exceptional conditions.
+ *
+ * @note This function try to attach the new SD SPI device to the bus specified in host_config.
+ *       Make sure the SPI bus specified in `host_config->slot` have been initialized by
+ *       `spi_bus_initialize()` before.
+ *
+ * @param base_path     path where partition should be registered (e.g. "/sdcard")
+ * @param host_config_input Pointer to structure describing SDMMC host. This structure can be
+ *                          initialized using SDSPI_HOST_DEFAULT() macro.
+ * @param slot_config   Pointer to structure with slot configuration.
+ *                      For SPI peripheral, pass a pointer to sdspi_device_config_t
+ *                      structure initialized using SDSPI_DEVICE_CONFIG_DEFAULT().
+ * @param mount_config  pointer to structure with extra parameters for mounting FATFS
+ * @param[out] out_card If not NULL, pointer to the card information structure will be returned via
+ *                      this argument. It is suggested to hold this handle and use it to unmount the card later if
+ *                      needed. Otherwise it's not suggested to use more than one card at the same time and unmount one
+ *                      of them in your application.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if esp_vfs_fat_sdmmc_mount was already called
+ *      - ESP_ERR_NO_MEM if memory can not be allocated
+ *      - ESP_FAIL if partition can not be mounted
+ *      - other error codes from SDMMC or SPI drivers, SDMMC protocol, or FATFS drivers
+ */
+esp_err_t esp_vfs_fat_sdspi_mount(const char* base_path,
+                                  const sdmmc_host_t* host_config_input,
+                                  const sdspi_device_config_t* slot_config,
+                                  const esp_vfs_fat_mount_config_t* mount_config,
+                                  sdmmc_card_t** out_card);
+
+/**
+ * @brief Unmount FAT filesystem and release resources acquired using esp_vfs_fat_sdmmc_mount
+ *
+ * @deprecated Use `esp_vfs_fat_sdcard_unmount()` instead.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if esp_vfs_fat_sdmmc_mount hasn't been called
+ */
+esp_err_t esp_vfs_fat_sdmmc_unmount(void);
+
+/**
+ * @brief Unmount an SD card from the FAT filesystem and release resources acquired using
+ *        `esp_vfs_fat_sdmmc_mount()` or `esp_vfs_fat_sdspi_mount()`
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if the card argument is unregistered
+ *      - ESP_ERR_INVALID_STATE if esp_vfs_fat_sdmmc_mount hasn't been called
+ */
+esp_err_t esp_vfs_fat_sdcard_unmount(const char *base_path, sdmmc_card_t *card);
+
+/**
+ * @brief Convenience function to initialize FAT filesystem in SPI flash and register it in VFS
+ *
+ * This is an all-in-one function which does the following:
+ *
+ * - finds the partition with defined partition_label. Partition label should be
+ *   configured in the partition table.
+ * - initializes flash wear levelling library on top of the given partition
+ * - mounts FAT partition using FATFS library on top of flash wear levelling
+ *   library
+ * - registers FATFS library with VFS, with prefix given by base_prefix variable
+ *
+ * This function is intended to make example code more compact.
+ *
+ * @param base_path        path where FATFS partition should be mounted (e.g. "/spiflash")
+ * @param partition_label  label of the partition which should be used
+ * @param mount_config     pointer to structure with extra parameters for mounting FATFS
+ * @param[out] wl_handle   wear levelling driver handle
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_FOUND if the partition table does not contain FATFS partition with given label
+ *      - ESP_ERR_INVALID_STATE if esp_vfs_fat_spiflash_mount was already called
+ *      - ESP_ERR_NO_MEM if memory can not be allocated
+ *      - ESP_FAIL if partition can not be mounted
+ *      - other error codes from wear levelling library, SPI flash driver, or FATFS drivers
+ */
+esp_err_t esp_vfs_fat_spiflash_mount(const char* base_path,
+    const char* partition_label,
+    const esp_vfs_fat_mount_config_t* mount_config,
+    wl_handle_t* wl_handle);
+
+/**
+ * @brief Unmount FAT filesystem and release resources acquired using esp_vfs_fat_spiflash_mount
+ *
+ * @param base_path  path where partition should be registered (e.g. "/spiflash")
+ * @param wl_handle  wear levelling driver handle returned by esp_vfs_fat_spiflash_mount
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if esp_vfs_fat_spiflash_mount hasn't been called
+ */
+ esp_err_t esp_vfs_fat_spiflash_unmount(const char* base_path, wl_handle_t wl_handle);
+
+
+/**
+ * @brief Convenience function to initialize read-only FAT filesystem and register it in VFS
+ *
+ * This is an all-in-one function which does the following:
+ *
+ * - finds the partition with defined partition_label. Partition label should be
+ *   configured in the partition table.
+ * - mounts FAT partition using FATFS library
+ * - registers FATFS library with VFS, with prefix given by base_prefix variable
+ *
+ * @note Wear levelling is not used when FAT is mounted in read-only mode using this function.
+ *
+ * @param base_path        path where FATFS partition should be mounted (e.g. "/spiflash")
+ * @param partition_label  label of the partition which should be used
+ * @param mount_config     pointer to structure with extra parameters for mounting FATFS
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_FOUND if the partition table does not contain FATFS partition with given label
+ *      - ESP_ERR_INVALID_STATE if esp_vfs_fat_rawflash_mount was already called for the same partition
+ *      - ESP_ERR_NO_MEM if memory can not be allocated
+ *      - ESP_FAIL if partition can not be mounted
+ *      - other error codes from SPI flash driver, or FATFS drivers
+ */
+esp_err_t esp_vfs_fat_rawflash_mount(const char* base_path,
+    const char* partition_label,
+    const esp_vfs_fat_mount_config_t* mount_config);
+
+/**
+ * @brief Unmount FAT filesystem and release resources acquired using esp_vfs_fat_rawflash_mount
+ *
+ * @param base_path  path where partition should be registered (e.g. "/spiflash")
+ * @param partition_label label of partition to be unmounted
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if esp_vfs_fat_spiflash_mount hasn't been called
+ */
+ esp_err_t esp_vfs_fat_rawflash_unmount(const char* base_path, const char* partition_label);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/fatfs/vfs/vfs_fat_internal.h b/tools/sdk/esp32s3/include/fatfs/vfs/vfs_fat_internal.h
new file mode 100644
index 00000000000..dc3bae271ca
--- /dev/null
+++ b/tools/sdk/esp32s3/include/fatfs/vfs/vfs_fat_internal.h
@@ -0,0 +1,30 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_vfs_fat.h"
+#include <sys/param.h>
+#include <stddef.h>
+
+static inline size_t esp_vfs_fat_get_allocation_unit_size(
+        size_t sector_size, size_t requested_size)
+{
+    size_t alloc_unit_size = requested_size;
+    const size_t max_sectors_per_cylinder = 128;
+    const size_t max_size = sector_size * max_sectors_per_cylinder;
+    alloc_unit_size = MAX(alloc_unit_size, sector_size);
+    alloc_unit_size = MIN(alloc_unit_size, max_size);
+    return alloc_unit_size;
+}
diff --git a/tools/sdk/esp32s3/include/fb_gfx/include/fb_gfx.h b/tools/sdk/esp32s3/include/fb_gfx/include/fb_gfx.h
new file mode 100644
index 00000000000..158c80f6bf4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/fb_gfx/include/fb_gfx.h
@@ -0,0 +1,44 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _FB_GFX_H_
+#define _FB_GFX_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+    typedef enum {
+        FB_RGB888, FB_BGR888, FB_RGB565, FB_BGR565, FB_GRAY
+    } fb_format_t;
+
+    typedef struct {
+            int width;
+            int height;
+            int bytes_per_pixel;
+            fb_format_t format;
+            uint8_t * data;
+    } fb_data_t;
+
+    void     fb_gfx_fillRect     (fb_data_t *fb, int32_t x, int32_t y, int32_t w, int32_t h, uint32_t color);
+    void     fb_gfx_drawFastHLine(fb_data_t *fb, int32_t x, int32_t y, int32_t w, uint32_t color);
+    void     fb_gfx_drawFastVLine(fb_data_t *fb, int32_t x, int32_t y, int32_t h, uint32_t color);
+    uint8_t  fb_gfx_putc         (fb_data_t *fb, int32_t x, int32_t y, uint32_t color, unsigned char c);
+    uint32_t fb_gfx_print        (fb_data_t *fb, int32_t x, int32_t y, uint32_t color, const char * str);
+    uint32_t fb_gfx_printf       (fb_data_t *fb, int32_t x, int32_t y, uint32_t color, const char *format, ...);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _FB_GFX_H_ */
diff --git a/tools/sdk/esp32s3/include/freemodbus/common/include/esp_modbus_common.h b/tools/sdk/esp32s3/include/freemodbus/common/include/esp_modbus_common.h
new file mode 100644
index 00000000000..9c65f08b90d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freemodbus/common/include/esp_modbus_common.h
@@ -0,0 +1,173 @@
+/* Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _MB_IFACE_COMMON_H
+#define _MB_IFACE_COMMON_H
+
+#include "driver/uart.h"                    // for UART types
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if __has_include("esp_check.h")
+#include "esp_check.h"
+
+#define MB_RETURN_ON_FALSE(a, err_code, tag, format, ...) ESP_RETURN_ON_FALSE(a, err_code, tag, format __VA_OPT__(,) __VA_ARGS__)
+
+#else
+
+// if cannot include esp_check then use custom check macro
+
+#define MB_RETURN_ON_FALSE(a, err_code, tag, format, ...) do {                                         \
+        if (!(a)) {                                                                              \
+            ESP_LOGE(tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_code;                                                                               \
+        }                                                                                                  \
+} while(0)
+
+#endif
+
+#define MB_CONTROLLER_STACK_SIZE            (CONFIG_FMB_CONTROLLER_STACK_SIZE)   // Stack size for Modbus controller
+#define MB_CONTROLLER_PRIORITY              (CONFIG_FMB_PORT_TASK_PRIO - 1)    // priority of MB controller task
+
+// Default port defines
+#define MB_DEVICE_ADDRESS   (1)             // Default slave device address in Modbus
+#define MB_DEVICE_SPEED     (115200)        // Default Modbus speed for now hard defined
+#define MB_UART_PORT        (UART_NUM_MAX - 1)  // Default UART port number
+#define MB_PAR_INFO_TOUT    (10)            // Timeout for get parameter info
+#define MB_PARITY_NONE      (UART_PARITY_DISABLE)
+
+// The Macros below handle the endianness while transfer N byte data into buffer
+#define _XFER_4_RD(dst, src) { \
+    *(uint8_t *)(dst)++ = *(uint8_t*)(src + 1); \
+    *(uint8_t *)(dst)++ = *(uint8_t*)(src + 0); \
+    *(uint8_t *)(dst)++ = *(uint8_t*)(src + 3); \
+    *(uint8_t *)(dst)++ = *(uint8_t*)(src + 2); \
+    (src) += 4; \
+}
+
+#define _XFER_2_RD(dst, src) { \
+    *(uint8_t *)(dst)++ = *(uint8_t *)(src + 1); \
+    *(uint8_t *)(dst)++ = *(uint8_t *)(src + 0); \
+    (src) += 2; \
+}
+
+#define _XFER_4_WR(dst, src) { \
+    *(uint8_t *)(dst + 1) = *(uint8_t *)(src)++; \
+    *(uint8_t *)(dst + 0) = *(uint8_t *)(src)++; \
+    *(uint8_t *)(dst + 3) = *(uint8_t *)(src)++; \
+    *(uint8_t *)(dst + 2) = *(uint8_t *)(src)++ ; \
+}
+
+#define _XFER_2_WR(dst, src) { \
+    *(uint8_t *)(dst + 1) = *(uint8_t *)(src)++; \
+    *(uint8_t *)(dst + 0) = *(uint8_t *)(src)++; \
+}
+
+/**
+ * @brief Types of actual Modbus implementation
+ */
+typedef enum
+{
+    MB_PORT_SERIAL_MASTER = 0x00,   /*!< Modbus port type serial master. */
+    MB_PORT_SERIAL_SLAVE,           /*!< Modbus port type serial slave. */
+    MB_PORT_TCP_MASTER,             /*!< Modbus port type TCP master. */
+    MB_PORT_TCP_SLAVE,              /*!< Modbus port type TCP slave. */
+    MB_PORT_COUNT,                  /*!< Modbus port count. */
+    MB_PORT_INACTIVE = 0xFF
+} mb_port_type_t;
+
+/**
+ * @brief Event group for parameters notification
+ */
+typedef enum
+{
+    MB_EVENT_NO_EVENTS = 0x00,
+    MB_EVENT_HOLDING_REG_WR = BIT0,         /*!< Modbus Event Write Holding registers. */
+    MB_EVENT_HOLDING_REG_RD = BIT1,         /*!< Modbus Event Read Holding registers. */
+    MB_EVENT_INPUT_REG_RD = BIT3,           /*!< Modbus Event Read Input registers. */
+    MB_EVENT_COILS_WR = BIT4,               /*!< Modbus Event Write Coils. */
+    MB_EVENT_COILS_RD = BIT5,               /*!< Modbus Event Read Coils. */
+    MB_EVENT_DISCRETE_RD = BIT6,            /*!< Modbus Event Read Discrete bits. */
+    MB_EVENT_STACK_STARTED = BIT7           /*!< Modbus Event Stack started */
+} mb_event_group_t;
+
+/**
+ * @brief Type of Modbus parameter
+ */
+typedef enum {
+    MB_PARAM_HOLDING = 0x00,         /*!< Modbus Holding register. */
+    MB_PARAM_INPUT,                  /*!< Modbus Input register. */
+    MB_PARAM_COIL,                   /*!< Modbus Coils. */
+    MB_PARAM_DISCRETE,               /*!< Modbus Discrete bits. */
+    MB_PARAM_COUNT,
+    MB_PARAM_UNKNOWN = 0xFF
+} mb_param_type_t;
+
+/*!
+ * \brief Modbus serial transmission modes (RTU/ASCII).
+ */
+typedef enum {
+    MB_MODE_RTU,                     /*!< RTU transmission mode. */
+    MB_MODE_ASCII,                   /*!< ASCII transmission mode. */
+    MB_MODE_TCP,                     /*!< TCP communication mode. */
+    MB_MODE_UDP                      /*!< UDP communication mode. */
+} mb_mode_type_t;
+
+/*!
+ * \brief Modbus TCP type of address.
+ */
+typedef enum {
+    MB_IPV4 = 0,                     /*!< TCP IPV4 addressing */
+    MB_IPV6 = 1                      /*!< TCP IPV6 addressing */
+} mb_tcp_addr_type_t;
+
+/**
+ * @brief Device communication structure to setup Modbus controller
+ */
+typedef union {
+    // Serial communication structure
+    struct {
+        mb_mode_type_t mode;                    /*!< Modbus communication mode */
+        uint8_t slave_addr;                     /*!< Modbus slave address field (dummy for master) */
+        uart_port_t port;                       /*!< Modbus communication port (UART) number */
+        uint32_t baudrate;                      /*!< Modbus baudrate */
+        uart_parity_t parity;                   /*!< Modbus UART parity settings */
+        uint16_t dummy_port;                    /*!< Dummy field, unused */
+    };
+    // TCP/UDP communication structure
+    struct {
+        mb_mode_type_t ip_mode;                /*!< Modbus communication mode */
+        uint16_t ip_port;                      /*!< Modbus port */
+        mb_tcp_addr_type_t ip_addr_type;       /*!< Modbus address type */
+        void* ip_addr;                         /*!< Modbus address table for connection */
+        void* ip_netif_ptr;                    /*!< Modbus network interface */
+    };
+} mb_communication_info_t;
+
+/**
+ * common interface method types
+ */
+typedef esp_err_t (*iface_init)(void**);        /*!< Interface method init */
+typedef esp_err_t (*iface_destroy)(void);       /*!< Interface method destroy */
+typedef esp_err_t (*iface_setup)(void*);        /*!< Interface method setup */
+typedef esp_err_t (*iface_start)(void);         /*!< Interface method start */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _MB_IFACE_COMMON_H
diff --git a/tools/sdk/esp32s3/include/freemodbus/common/include/esp_modbus_master.h b/tools/sdk/esp32s3/include/freemodbus/common/include/esp_modbus_master.h
new file mode 100644
index 00000000000..8084e689027
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freemodbus/common/include/esp_modbus_master.h
@@ -0,0 +1,275 @@
+/* Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ESP_MB_MASTER_INTERFACE_H
+#define _ESP_MB_MASTER_INTERFACE_H
+
+#include <stdint.h>                 // for standard int types definition
+#include <stddef.h>                 // for NULL and std defines
+#include "soc/soc.h"                // for BITN definitions
+#include "esp_modbus_common.h"      // for common types
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MB_MASTER_CHECK(a, err_code, format, ...) MB_RETURN_ON_FALSE(a, err_code, TAG, format __VA_OPT__(,) __VA_ARGS__)
+
+#define MB_MASTER_ASSERT(con) do { \
+        if (!(con)) { ESP_LOGE(TAG, "assert errno:%d, errno_str: !(%s)", errno, strerror(errno)); assert(0 && #con); } \
+    } while (0)
+
+/*!
+ * \brief Modbus descriptor table parameter type defines.
+ */
+typedef enum {
+    PARAM_TYPE_U8 = 0x00,                   /*!< Unsigned 8 */
+    PARAM_TYPE_U16 = 0x01,                  /*!< Unsigned 16 */
+    PARAM_TYPE_U32 = 0x02,                  /*!< Unsigned 32 */
+    PARAM_TYPE_FLOAT = 0x03,                /*!< Float type */
+    PARAM_TYPE_ASCII = 0x04                 /*!< ASCII type */
+} mb_descr_type_t;
+
+/*!
+ * \brief Modbus descriptor table parameter size in bytes.
+ */
+typedef enum {
+    PARAM_SIZE_U8 = 0x01,                   /*!< Unsigned 8 */
+    PARAM_SIZE_U16 = 0x02,                  /*!< Unsigned 16 */
+    PARAM_SIZE_U32 = 0x04,                  /*!< Unsigned 32 */
+    PARAM_SIZE_FLOAT = 0x04,                /*!< Float size */
+    PARAM_SIZE_ASCII = 0x08,                /*!< ASCII size */
+    PARAM_SIZE_ASCII24 = 0x18,              /*!< ASCII24 size */
+    PARAM_MAX_SIZE
+} mb_descr_size_t;
+
+/*!
+ * \brief Modbus parameter options for description table
+ */
+typedef union {
+    struct {
+        int opt1;                         /*!< Parameter option1 */
+        int opt2;                         /*!< Parameter option2 */
+        int opt3;                         /*!< Parameter option3 */
+    };
+    struct {
+        int min;                          /*!< Parameter minimum value */
+        int max;                          /*!< Parameter maximum value */
+        int step;                         /*!< Step of parameter change tracking */
+    };
+} mb_parameter_opt_t;
+
+/**
+ * @brief Permissions for the characteristics
+ */
+typedef enum {
+    PAR_PERMS_READ               = 1 << BIT0,                                   /**< the characteristic of the device are readable */
+    PAR_PERMS_WRITE              = 1 << BIT1,                                   /**< the characteristic of the device are writable*/
+    PAR_PERMS_TRIGGER            = 1 << BIT2,                                   /**< the characteristic of the device are triggerable */
+    PAR_PERMS_READ_WRITE         = PAR_PERMS_READ | PAR_PERMS_WRITE,            /**< the characteristic of the device are readable & writable */
+    PAR_PERMS_READ_TRIGGER       = PAR_PERMS_READ | PAR_PERMS_TRIGGER,          /**< the characteristic of the device are readable & triggerable */
+    PAR_PERMS_WRITE_TRIGGER      = PAR_PERMS_WRITE | PAR_PERMS_TRIGGER,         /**< the characteristic of the device are writable & triggerable */
+    PAR_PERMS_READ_WRITE_TRIGGER = PAR_PERMS_READ_WRITE | PAR_PERMS_TRIGGER,    /**< the characteristic of the device are readable & writable & triggerable */
+} mb_param_perms_t;
+
+/**
+ * @brief Characteristics descriptor type is used to describe characteristic and
+ * link it with Modbus parameters that reflect its data.
+ */
+typedef struct {
+    uint16_t            cid;                /*!< Characteristic cid */
+    const char*         param_key;          /*!< The key (name) of the parameter */
+    const char*         param_units;        /*!< The physical units of the parameter */
+    uint8_t             mb_slave_addr;      /*!< Slave address of device in the Modbus segment */
+    mb_param_type_t     mb_param_type;      /*!< Type of modbus parameter */
+    uint16_t            mb_reg_start;       /*!< This is the Modbus register address. This is the 0 based value. */
+    uint16_t            mb_size;            /*!< Size of mb parameter in registers */
+    uint16_t            param_offset;       /*!< Parameter name (OFFSET in the parameter structure) */
+    mb_descr_type_t     param_type;         /*!< Float, U8, U16, U32, ASCII, etc. */
+    mb_descr_size_t     param_size;         /*!< Number of bytes in the parameter. */
+    mb_parameter_opt_t  param_opts;         /*!< Parameter options used to check limits and etc. */
+    mb_param_perms_t    access;             /*!< Access permissions based on mode */
+} mb_parameter_descriptor_t;
+
+/**
+ * @brief Modbus register request type structure
+ */
+typedef struct {
+    uint8_t slave_addr;             /*!< Modbus slave address */
+    uint8_t command;                /*!< Modbus command to send */
+    uint16_t reg_start;             /*!< Modbus start register */
+    uint16_t reg_size;              /*!< Modbus number of registers */
+} mb_param_request_t;
+
+/**
+ * @brief Initialize Modbus controller and stack for TCP port
+ *
+ * @param[out] handler handler(pointer) to master data structure
+ * @return
+ *     - ESP_OK                 Success
+ *     - ESP_ERR_NO_MEM         Parameter error
+ *     - ESP_ERR_NOT_SUPPORTED  Port type not supported
+ *     - ESP_ERR_INVALID_STATE  Initialization failure
+ */
+esp_err_t mbc_master_init_tcp(void** handler);
+
+/**
+ * @brief Initialize Modbus Master controller and stack for Serial port
+ *
+ * @param[out] handler handler(pointer) to master data structure
+ * @param[in] port_type type of stack
+ * @return
+ *     - ESP_OK                 Success
+ *     - ESP_ERR_NO_MEM         Parameter error
+ *     - ESP_ERR_NOT_SUPPORTED  Port type not supported
+ *     - ESP_ERR_INVALID_STATE  Initialization failure
+ */
+esp_err_t mbc_master_init(mb_port_type_t port_type, void** handler);
+
+/**
+ * @brief Initialize Modbus Master controller interface handle
+ *
+ * @param[in] handler - pointer to master data structure
+ */
+void mbc_master_init_iface(void* handler);
+
+/**
+ * @brief Destroy Modbus controller and stack
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_ERR_INVALID_STATE Parameter error
+ */
+esp_err_t mbc_master_destroy(void);
+
+/**
+ * @brief Start Modbus communication stack
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_ERR_INVALID_ARG Modbus stack start error
+ */
+esp_err_t mbc_master_start(void);
+
+/**
+ * @brief Set Modbus communication parameters for the controller
+ *
+ * @param comm_info Communication parameters structure.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Incorrect parameter data
+ */
+esp_err_t mbc_master_setup(void* comm_info);
+
+/***************************** Specific interface functions ********************************************
+ * Interface functions below provide basic methods to read/write access to slave devices in Modbus
+ * segment as well as API to read specific supported characteristics linked to Modbus parameters
+ * of devices in Modbus network.
+*******************************************************************************************************/
+
+/**
+ * @brief Assign parameter description table for Modbus controller interface.
+ *
+ * @param[in] descriptor pointer to parameter description table
+ * @param num_elements number of elements in the table
+ *
+ * @return
+ *     - esp_err_t ESP_OK - set descriptor successfully
+ *     - esp_err_t ESP_ERR_INVALID_ARG - invalid argument in function call
+ */
+esp_err_t mbc_master_set_descriptor(const mb_parameter_descriptor_t* descriptor, const uint16_t num_elements);
+
+/**
+ * @brief Send data request as defined in parameter request, waits response
+ *        from slave and returns status of command execution. This function provides standard way
+ *        for read/write access to Modbus devices in the network.
+ *
+ * @param[in] request pointer to request structure of type mb_param_request_t
+ * @param[in] data_ptr pointer to data buffer to send or received data (dependent of command field in request)
+ *
+ * @return
+ *     - esp_err_t ESP_OK - request was successful
+ *     - esp_err_t ESP_ERR_INVALID_ARG - invalid argument of function
+ *     - esp_err_t ESP_ERR_INVALID_RESPONSE - an invalid response from slave
+ *     - esp_err_t ESP_ERR_TIMEOUT - operation timeout or no response from slave
+ *     - esp_err_t ESP_ERR_NOT_SUPPORTED - the request command is not supported by slave
+ *     - esp_err_t ESP_FAIL - slave returned an exception or other failure
+ */
+esp_err_t mbc_master_send_request(mb_param_request_t* request, void* data_ptr);
+
+/**
+ * @brief Get information about supported characteristic defined as cid. Uses parameter description table to get
+ *        this information. The function will check if characteristic defined as a cid parameter is supported
+ *        and returns its description in param_info. Returns ESP_ERR_NOT_FOUND if characteristic is not supported.
+ *
+ * @param[in] cid characteristic id
+ * @param param_info pointer to pointer of characteristic data.
+ *
+ * @return
+ *     - esp_err_t ESP_OK - request was successful and buffer contains the supported characteristic name
+ *     - esp_err_t ESP_ERR_INVALID_ARG - invalid argument of function
+ *     - esp_err_t ESP_ERR_NOT_FOUND - the characteristic (cid) not found
+ *     - esp_err_t ESP_FAIL - unknown error during lookup table processing
+*/
+esp_err_t mbc_master_get_cid_info(uint16_t cid, const mb_parameter_descriptor_t** param_info);
+
+/**
+ * @brief Read parameter from modbus slave device whose name is defined by name and has cid.
+ *        The additional data for request is taken from parameter description (lookup) table.
+ *
+ * @param[in] cid id of the characteristic for parameter
+ * @param[in] name pointer into string name (key) of parameter (null terminated)
+ * @param[out] value pointer to data buffer of parameter
+ * @param[out] type parameter type associated with the name returned from parameter description table.
+ *
+ * @return
+ *     - esp_err_t ESP_OK - request was successful and value buffer contains
+ *                          representation of actual parameter data from slave
+ *     - esp_err_t ESP_ERR_INVALID_ARG - invalid argument of function or parameter descriptor
+ *     - esp_err_t ESP_ERR_INVALID_RESPONSE - an invalid response from slave
+ *     - esp_err_t ESP_ERR_INVALID_STATE - invalid state during data processing or allocation failure
+ *     - esp_err_t ESP_ERR_TIMEOUT - operation timed out and no response from slave
+ *     - esp_err_t ESP_ERR_NOT_SUPPORTED - the request command is not supported by slave
+ *     - esp_err_t ESP_ERR_NOT_FOUND - the parameter is not found in the parameter description table
+ *     - esp_err_t ESP_FAIL - slave returned an exception or other failure
+*/
+esp_err_t mbc_master_get_parameter(uint16_t cid, char* name, uint8_t* value, uint8_t *type);
+
+/**
+ * @brief Set characteristic's value defined as a name and cid parameter.
+ *        The additional data for cid parameter request is taken from master parameter lookup table.
+ *
+ * @param[in] cid id of the characteristic for parameter
+ * @param[in] name pointer into string name (key) of parameter (null terminated)
+ * @param[out] value pointer to data buffer of parameter (actual representation of json value field in binary form)
+ * @param[out] type pointer to parameter type associated with the name returned from parameter lookup table.
+ *
+ * @return
+ *     - esp_err_t ESP_OK - request was successful and value was saved in the slave device registers
+ *     - esp_err_t ESP_ERR_INVALID_ARG - invalid argument of function or parameter descriptor
+ *     - esp_err_t ESP_ERR_INVALID_RESPONSE - an invalid response from slave during processing of parameter
+ *     - esp_err_t ESP_ERR_INVALID_STATE - invalid state during data processing or allocation failure
+ *     - esp_err_t ESP_ERR_TIMEOUT - operation timed out and no response from slave
+ *     - esp_err_t ESP_ERR_NOT_SUPPORTED - the request command is not supported by slave
+ *     - esp_err_t ESP_FAIL - slave returned an exception or other failure
+*/
+esp_err_t mbc_master_set_parameter(uint16_t cid, char* name, uint8_t* value, uint8_t *type);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_MB_MASTER_INTERFACE_H
diff --git a/tools/sdk/esp32s3/include/freemodbus/common/include/esp_modbus_slave.h b/tools/sdk/esp32s3/include/freemodbus/common/include/esp_modbus_slave.h
new file mode 100644
index 00000000000..040d18265bf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freemodbus/common/include/esp_modbus_slave.h
@@ -0,0 +1,157 @@
+/* Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ESP_MB_SLAVE_INTERFACE_H
+#define _ESP_MB_SLAVE_INTERFACE_H
+
+// Public interface header for slave
+#include <stdint.h>                 // for standard int types definition
+#include <stddef.h>                 // for NULL and std defines
+#include "soc/soc.h"                // for BITN definitions
+#include "freertos/FreeRTOS.h"      // for task creation and queues access
+#include "freertos/event_groups.h"  // for event groups
+#include "esp_modbus_common.h"      // for common types
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MB_SLAVE_CHECK(a, err_code, format, ...) MB_RETURN_ON_FALSE(a, err_code, TAG, format __VA_OPT__(,) __VA_ARGS__)
+
+#define MB_SLAVE_ASSERT(con) do { \
+        if (!(con)) { ESP_LOGE(TAG, "assert errno:%d, errno_str: !(%s)", errno, strerror(errno)); assert(0 && #con); } \
+    } while (0)
+
+/**
+ * @brief Parameter access event information type
+ */
+typedef struct {
+    uint32_t time_stamp;                    /*!< Timestamp of Modbus Event (uS)*/
+    uint16_t mb_offset;                     /*!< Modbus register offset */
+    mb_event_group_t type;                  /*!< Modbus event type */
+    uint8_t* address;                       /*!< Modbus data storage address */
+    size_t size;                            /*!< Modbus event register size (number of registers)*/
+} mb_param_info_t;
+
+/**
+ * @brief Parameter storage area descriptor
+ */
+typedef struct {
+    uint16_t start_offset;                  /*!< Modbus start address for area descriptor */
+    mb_param_type_t type;                   /*!< Type of storage area descriptor */
+    void* address;                          /*!< Instance address for storage area descriptor */
+    size_t size;                            /*!< Instance size for area descriptor (bytes) */
+} mb_register_area_descriptor_t;
+
+/**
+ * @brief Initialize Modbus Slave controller and stack for TCP port
+ *
+ * @param[out] handler handler(pointer) to master data structure
+ * @return
+ *     - ESP_OK                 Success
+ *     - ESP_ERR_NO_MEM         Parameter error
+ *     - ESP_ERR_NOT_SUPPORTED  Port type not supported
+ *     - ESP_ERR_INVALID_STATE  Initialization failure
+ */
+esp_err_t mbc_slave_init_tcp(void** handler);
+
+/**
+ * @brief Initialize Modbus Slave controller and stack for Serial port
+ *
+ * @param[out] handler handler(pointer) to master data structure
+ * @param[in] port_type the type of port
+ * @return
+ *     - ESP_OK                 Success
+ *     - ESP_ERR_NO_MEM         Parameter error
+ *     - ESP_ERR_NOT_SUPPORTED  Port type not supported
+ *     - ESP_ERR_INVALID_STATE  Initialization failure
+ */
+esp_err_t mbc_slave_init(mb_port_type_t port_type, void** handler);
+
+/**
+ * @brief Initialize Modbus Slave controller interface handle
+ *
+ * @param[in] handler - pointer to slave interface data structure
+ */
+void mbc_slave_init_iface(void* handler);
+
+/**
+ * @brief Destroy Modbus controller and stack
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_ERR_INVALID_STATE Parameter error
+ */
+esp_err_t mbc_slave_destroy(void);
+
+/**
+ * @brief Start Modbus communication stack
+ *
+ * @return
+ *     - ESP_OK   Success
+ *     - ESP_ERR_INVALID_ARG Modbus stack start error
+ */
+esp_err_t mbc_slave_start(void);
+
+/**
+ * @brief Set Modbus communication parameters for the controller
+ *
+ * @param comm_info Communication parameters structure.
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Incorrect parameter data
+ */
+esp_err_t mbc_slave_setup(void* comm_info);
+
+/**
+ * @brief Wait for specific event on parameter change.
+ *
+ * @param group Group event bit mask to wait for change
+ *
+ * @return
+ *     - mb_event_group_t event bits triggered
+ */
+mb_event_group_t mbc_slave_check_event(mb_event_group_t group);
+
+/**
+ * @brief Get parameter information
+ *
+ * @param[out] reg_info parameter info structure
+ * @param timeout Timeout in milliseconds to read information from
+ *                parameter queue
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_TIMEOUT Can not get data from parameter queue
+ *                       or queue overflow
+ */
+esp_err_t mbc_slave_get_param_info(mb_param_info_t* reg_info, uint32_t timeout);
+
+/**
+ * @brief Set Modbus area descriptor
+ *
+ * @param descr_data Modbus registers area descriptor structure
+ *
+ * @return
+ *     - ESP_OK: The appropriate descriptor is set
+ *     - ESP_ERR_INVALID_ARG: The argument is incorrect
+ */
+esp_err_t mbc_slave_set_descriptor(mb_register_area_descriptor_t descr_data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/freemodbus/common/include/mbcontroller.h b/tools/sdk/esp32s3/include/freemodbus/common/include/mbcontroller.h
new file mode 100644
index 00000000000..08b3c183c8f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freemodbus/common/include/mbcontroller.h
@@ -0,0 +1,32 @@
+/* Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+*/
+//  mbcontroller.h
+//  mbcontroller - common Modbus controller header file
+
+#ifndef _MODBUS_CONTROLLER_COMMON
+#define _MODBUS_CONTROLLER_COMMON
+
+#include <stdint.h>                 // for standard int types definition
+#include <stddef.h>                 // for NULL and std defines
+#include "string.h"                 // for strerror()
+#include "errno.h"                  // for errno
+#include "esp_err.h"                // for error handling
+#include "driver/uart.h"            // for uart port number defines
+#include "sdkconfig.h"              // for KConfig options
+
+#include "esp_modbus_master.h"
+#include "esp_modbus_slave.h"
+
+#endif
diff --git a/tools/sdk/esp32s3/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h b/tools/sdk/esp32s3/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h
new file mode 100644
index 00000000000..6bb81894593
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/esp_additions/freertos/FreeRTOSConfig.h
@@ -0,0 +1,323 @@
+/*
+    FreeRTOS V10 - Copyright (C) 2021 Real Time Engineers Ltd.
+    All rights reserved
+
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+    This file is part of the FreeRTOS distribution.
+
+    FreeRTOS is free software; you can redistribute it and/or modify it under
+    the terms of the GNU General Public License (version 2) as published by the
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+
+	***************************************************************************
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<
+    >>!   obliged to provide the source code for proprietary components     !<<
+    >>!   outside of the FreeRTOS kernel.                                   !<<
+	***************************************************************************
+
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
+    link: http://www.freertos.org/a00114.html
+
+    ***************************************************************************
+     *                                                                       *
+     *    FreeRTOS provides completely free yet professionally developed,    *
+     *    robust, strictly quality controlled, supported, and cross          *
+     *    platform software that is more than just the market leader, it     *
+     *    is the industry's de facto standard.                               *
+     *                                                                       *
+     *    Help yourself get started quickly while simultaneously helping     *
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
+     *    tutorial book, reference manual, or both:                          *
+     *    http://www.FreeRTOS.org/Documentation                              *
+     *                                                                       *
+    ***************************************************************************
+
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
+	the FAQ page "My application does not run, what could be wrong?".  Have you
+	defined configASSERT()?
+
+	http://www.FreeRTOS.org/support - In return for receiving this top quality
+	embedded software for free we request you assist our global community by
+	participating in the support forum.
+
+	http://www.FreeRTOS.org/training - Investing in training allows your team to
+	be as productive as possible as early as possible.  Now you can receive
+	FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+	Ltd, and the world's leading authority on the world's leading RTOS.
+
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
+    licenses offer ticketed support, indemnification and commercial middleware.
+
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+    engineered and independently SIL3 certified version for use in safety and
+    mission critical applications that require provable dependability.
+
+    1 tab == 4 spaces!
+*/
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+#include "sdkconfig.h"
+
+/* for likely and unlikely */
+#include "esp_compiler.h"
+
+// The arch-specific FreeRTOSConfig_arch.h in port/<arch>/include.
+#include "freertos/FreeRTOSConfig_arch.h"
+
+#if !(defined(FREERTOS_CONFIG_XTENSA_H) \
+        || defined(FREERTOS_CONFIG_RISCV_H) \
+        || defined(FREERTOS_CONFIG_LINUX_H))
+#error "Needs architecture-speific FreeRTOSConfig.h!"
+#endif
+
+#ifndef CONFIG_FREERTOS_UNICORE
+#define portNUM_PROCESSORS                              2
+#else
+#define portNUM_PROCESSORS                              1
+#endif
+
+#define portUSING_MPU_WRAPPERS                          0
+#define configUSE_MUTEX                                 1
+
+#define configNUM_THREAD_LOCAL_STORAGE_POINTERS CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS
+#define configTHREAD_LOCAL_STORAGE_DELETE_CALLBACKS     1
+
+/* configASSERT behaviour */
+#ifndef __ASSEMBLER__
+#include <assert.h>
+
+// If CONFIG_FREERTOS_ASSERT_DISABLE is set then configASSERT is defined empty later in FreeRTOS.h and the macro
+// configASSERT_DEFINED remains unset (meaning some warnings are avoided)
+
+#if defined(CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE)
+#define configASSERT(a) if (unlikely(!(a))) {                               \
+        esp_rom_printf("%s:%d (%s)- assert failed!\n", __FILE__, __LINE__,  \
+                   __FUNCTION__);                                           \
+    }
+#elif defined(CONFIG_FREERTOS_ASSERT_FAIL_ABORT)
+#define configASSERT(a) assert(a)
+#endif
+
+#if CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION
+#define UNTESTED_FUNCTION() { esp_rom_printf("Untested FreeRTOS function %s\r\n", __FUNCTION__); configASSERT(false); } while(0)
+#else
+#define UNTESTED_FUNCTION()
+#endif
+
+#endif /* def __ASSEMBLER__ */
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * Note that the default heap size is deliberately kept small so that
+ * the build is more likely to succeed for configurations with limited
+ * memory.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *----------------------------------------------------------*/
+
+#define configUSE_PREEMPTION                            1
+#define configUSE_IDLE_HOOK                             1
+#define configUSE_TICK_HOOK                             1
+#define configRECORD_STACK_HIGH_ADDRESS                 1
+#define configTICK_RATE_HZ                              ( CONFIG_FREERTOS_HZ )
+
+/* This has impact on speed of search for highest priority */
+#define configMAX_PRIORITIES                            ( 25 )
+
+/* Various things that impact minimum stack sizes */
+
+/* Higher stack checker modes cause overhead on each function call */
+#if CONFIG_STACK_CHECK_ALL || CONFIG_STACK_CHECK_STRONG
+#define configSTACK_OVERHEAD_CHECKER                    256
+#else
+#define configSTACK_OVERHEAD_CHECKER                    0
+#endif
+
+/* with optimizations disabled, scheduler uses additional stack */
+#if CONFIG_COMPILER_OPTIMIZATION_NONE
+#define configSTACK_OVERHEAD_OPTIMIZATION               320
+#else
+#define configSTACK_OVERHEAD_OPTIMIZATION               0
+#endif
+
+/* apptrace mdule increases minimum stack usage */
+#if CONFIG_APPTRACE_ENABLE
+#define configSTACK_OVERHEAD_APPTRACE                   1280
+#else
+#define configSTACK_OVERHEAD_APPTRACE                   0
+#endif
+
+/* Stack watchpoint decreases minimum usable stack size by up to 60 bytes.
+   See FreeRTOS FREERTOS_WATCHPOINT_END_OF_STACK option in Kconfig. */
+#if CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK
+#define configSTACK_OVERHEAD_WATCHPOINT                   60
+#else
+#define configSTACK_OVERHEAD_WATCHPOINT                   0
+#endif
+
+#define configSTACK_OVERHEAD_TOTAL (                                    \
+                                    configSTACK_OVERHEAD_CHECKER +      \
+                                    configSTACK_OVERHEAD_OPTIMIZATION + \
+                                    configSTACK_OVERHEAD_APPTRACE +     \
+                                    configSTACK_OVERHEAD_WATCHPOINT     \
+                                                                        )
+
+#define configMINIMAL_STACK_SIZE                        (768 + configSTACK_OVERHEAD_TOTAL)
+
+#ifndef configIDLE_TASK_STACK_SIZE
+#define configIDLE_TASK_STACK_SIZE CONFIG_FREERTOS_IDLE_TASK_STACKSIZE
+#endif
+
+/* Minimal heap size to make sure examples can run on memory limited
+   configs. Adjust this to suit your system. */
+
+
+//We define the heap to span all of the non-statically-allocated shared RAM. ToDo: Make sure there
+//is some space left for the app and main cpu when running outside of a thread.
+#define configAPPLICATION_ALLOCATED_HEAP                1
+#define configTOTAL_HEAP_SIZE                           (&_heap_end - &_heap_start)//( ( size_t ) (64 * 1024) )
+
+#define configMAX_TASK_NAME_LEN                         ( CONFIG_FREERTOS_MAX_TASK_NAME_LEN )
+
+#ifdef CONFIG_FREERTOS_USE_TRACE_FACILITY
+#define configUSE_TRACE_FACILITY                        1       /* Used by uxTaskGetSystemState(), and other trace facility functions */
+#endif
+
+#ifdef CONFIG_FREERTOS_USE_STATS_FORMATTING_FUNCTIONS
+#define configUSE_STATS_FORMATTING_FUNCTIONS            1   /* Used by vTaskList() */
+#endif
+
+#ifdef CONFIG_FREERTOS_VTASKLIST_INCLUDE_COREID
+#define configTASKLIST_INCLUDE_COREID                   1
+#endif
+
+#ifdef CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS
+#define configGENERATE_RUN_TIME_STATS                   1       /* Used by vTaskGetRunTimeStats() */
+#endif
+
+#define configBENCHMARK                                 0
+#define configUSE_16_BIT_TICKS                          0
+#define configIDLE_SHOULD_YIELD                         0
+#define configQUEUE_REGISTRY_SIZE                       CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE
+
+#define configUSE_MUTEXES                               1
+#define configUSE_RECURSIVE_MUTEXES                     1
+#define configUSE_COUNTING_SEMAPHORES                   1
+
+#if CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE
+#define configCHECK_FOR_STACK_OVERFLOW                  0
+#elif CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL
+#define configCHECK_FOR_STACK_OVERFLOW                  1
+#elif CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY
+#define configCHECK_FOR_STACK_OVERFLOW                  2
+#endif
+
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                           0
+#define configMAX_CO_ROUTINE_PRIORITIES                 ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+   to exclude the API function. */
+
+#define INCLUDE_vTaskPrioritySet                        1
+#define INCLUDE_uxTaskPriorityGet                       1
+#define INCLUDE_vTaskDelete                             1
+#define INCLUDE_vTaskCleanUpResources                   0
+#define INCLUDE_vTaskSuspend                            1
+#define INCLUDE_vTaskDelayUntil                         1
+#define INCLUDE_vTaskDelay                              1
+#define INCLUDE_uxTaskGetStackHighWaterMark             1
+#define INCLUDE_pcTaskGetTaskName                       1
+#define INCLUDE_xTaskGetIdleTaskHandle                  1
+#define INCLUDE_pxTaskGetStackStart                     1
+#define INCLUDE_eTaskGetState                           1
+#define INCLUDE_xTaskAbortDelay                         1
+#define INCLUDE_xTaskGetHandle                          1
+#define INCLUDE_xSemaphoreGetMutexHolder                1
+#define INCLUDE_xTimerPendFunctionCall                  1
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle          0   //Currently there is no need for this API
+
+/* The priority at which the tick interrupt runs.  This should probably be
+   kept at 1. */
+#define configKERNEL_INTERRUPT_PRIORITY                 1
+
+#if !CONFIG_IDF_TARGET_LINUX
+#define configUSE_NEWLIB_REENTRANT                      1
+#endif
+
+#define configSUPPORT_DYNAMIC_ALLOCATION                1
+#define configSUPPORT_STATIC_ALLOCATION                 1
+
+#ifndef __ASSEMBLER__
+#if CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP
+extern void vPortCleanUpTCB ( void *pxTCB );
+#define portCLEAN_UP_TCB( pxTCB )           vPortCleanUpTCB( pxTCB )
+#endif
+#endif
+
+/* Test FreeRTOS timers (with timer task) and more. */
+/* Some files don't compile if this flag is disabled */
+#define configUSE_TIMERS                                1
+#define configTIMER_TASK_PRIORITY                       CONFIG_FREERTOS_TIMER_TASK_PRIORITY
+#define configTIMER_QUEUE_LENGTH                        CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
+#define configTIMER_TASK_STACK_DEPTH                    CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
+
+#define configUSE_QUEUE_SETS                            1
+
+#define configUSE_TICKLESS_IDLE                         CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#if configUSE_TICKLESS_IDLE
+#define configEXPECTED_IDLE_TIME_BEFORE_SLEEP           CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP
+#endif //configUSE_TICKLESS_IDLE
+
+
+#if CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT
+#define configENABLE_TASK_SNAPSHOT                      1
+#endif
+#ifndef configENABLE_TASK_SNAPSHOT
+#define configENABLE_TASK_SNAPSHOT                      0
+#endif
+
+#if CONFIG_SYSVIEW_ENABLE
+#ifndef __ASSEMBLER__
+#include "SEGGER_SYSVIEW_FreeRTOS.h"
+#undef INLINE // to avoid redefinition
+#endif /* def __ASSEMBLER__ */
+#endif
+
+#if CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER
+#define configCHECK_MUTEX_GIVEN_BY_OWNER                1
+#else
+#define configCHECK_MUTEX_GIVEN_BY_OWNER                0
+#endif
+
+
+#define configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H       1
+
+#define configTASK_NOTIFICATION_ARRAY_ENTRIES           1
+
+// backward compatibility for 4.4
+#define xTaskRemoveFromUnorderedEventList vTaskRemoveFromUnorderedEventList
+
+#define configNUM_CORES                                 portNUM_PROCESSORS
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/esp_additions/freertos/task_snapshot.h b/tools/sdk/esp32s3/include/freertos/include/esp_additions/freertos/task_snapshot.h
new file mode 100644
index 00000000000..1ad04cce694
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/esp_additions/freertos/task_snapshot.h
@@ -0,0 +1,90 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+
+#if ( configENABLE_TASK_SNAPSHOT == 1 )
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Check `freertos_tasks_c_additions.h` file for more info
+ * about these functions declaration.
+ */
+UBaseType_t pxTCBGetSize ( void );
+ListItem_t*	pxTCBGetStateListItem ( void *pxTCB );
+StackType_t* pxTCBGetStartOfStack ( void *pxTCB );
+StackType_t* pxTCBGetTopOfStack ( void *pxTCB );
+StackType_t* pxTCBGetEndOfStack ( void *pxTCB );
+List_t* pxListGetReadyTask ( UBaseType_t idx );
+List_t* pxListGetReadyPendingTask ( UBaseType_t idx );
+List_t* pxGetDelayedTaskList ( void );
+List_t* pxGetOverflowDelayedTaskList ( void );
+List_t* pxGetTasksWaitingTermination ( void );
+List_t* pxGetSuspendedTaskList ( void );
+
+/**
+ * Used with the uxTaskGetSnapshotAll() function to save memory snapshot of each task in the system.
+ * We need this struct because TCB_t is defined (hidden) in tasks.c.
+ */
+typedef struct xTASK_SNAPSHOT
+{
+	void        *pxTCB;         /*!< Address of task control block. */
+	StackType_t *pxTopOfStack;  /*!< Points to the location of the last item placed on the tasks stack. */
+	StackType_t *pxEndOfStack;  /*!< Points to the end of the stack. pxTopOfStack < pxEndOfStack, stack grows hi2lo
+									pxTopOfStack > pxEndOfStack, stack grows lo2hi*/
+} TaskSnapshot_t;
+
+
+/*
+ * This function fills array with TaskSnapshot_t structures for every task in the system.
+ * Used by panic handling code to get snapshots of all tasks in the system.
+ * Only available when configENABLE_TASK_SNAPSHOT is set to 1.
+ * @param pxTaskSnapshotArray Pointer to array of TaskSnapshot_t structures to store tasks snapshot data.
+ * @param uxArraySize Size of tasks snapshots array.
+ * @param pxTcbSz Pointer to store size of TCB.
+ * @return Number of elements stored in array.
+ */
+UBaseType_t uxTaskGetSnapshotAll( TaskSnapshot_t * const pxTaskSnapshotArray, const UBaseType_t uxArraySize, UBaseType_t * const pxTcbSz );
+
+/*
+ * This function iterates over all tasks in the system.
+ * Used by panic handling code to iterate over tasks in the system.
+ * Only available when configENABLE_TASK_SNAPSHOT is set to 1.
+ * @note This function should not be used while FreeRTOS is running (as it doesn't acquire any locks).
+ * @param pxTask task handle.
+ * @return Handle for the next task. If pxTask is NULL, returns hadnle for the first task.
+ */
+TaskHandle_t pxTaskGetNext( TaskHandle_t pxTask );
+
+/*
+ * This function fills TaskSnapshot_t structure for specified task.
+ * Used by panic handling code to get snapshot of a task.
+ * Only available when configENABLE_TASK_SNAPSHOT is set to 1.
+ * @note This function should not be used while FreeRTOS is running (as it doesn't acquire any locks).
+ * @param pxTask task handle.
+ * @param pxTaskSnapshot address of TaskSnapshot_t structure to fill.
+ */
+void vTaskGetSnapshot( TaskHandle_t pxTask, TaskSnapshot_t *pxTaskSnapshot );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/freertos/include/esp_additions/freertos_tasks_c_additions.h b/tools/sdk/esp32s3/include/freertos/include/esp_additions/freertos_tasks_c_additions.h
new file mode 100644
index 00000000000..464c0b3ffb9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/esp_additions/freertos_tasks_c_additions.h
@@ -0,0 +1,80 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/**
+ * This file will be included in `tasks.c` file, thus, it must NOT be included
+ * by any (other) file.
+ * The functions below only consist in getters for the static variables in
+ * `tasks.c` file.
+ * The only source files that should call these functions are the ones in
+ * `/additions` directory.
+ */
+
+#if ( configENABLE_TASK_SNAPSHOT == 1 )
+
+	UBaseType_t pxTCBGetSize ( void )
+	{
+		return sizeof(TCB_t);
+	}
+
+	ListItem_t*	pxTCBGetStateListItem ( void *pxTCB )
+	{
+		return &(((TCB_t*)pxTCB)->xStateListItem);
+	}
+
+	StackType_t* pxTCBGetStartOfStack ( void *pxTCB )
+	{
+		return (StackType_t*) ((TCB_t*)pxTCB)->pxStack;
+	}
+
+	StackType_t* pxTCBGetTopOfStack ( void *pxTCB )
+	{
+		return (StackType_t*) ((TCB_t*)pxTCB)->pxTopOfStack;
+	}
+
+	StackType_t* pxTCBGetEndOfStack ( void *pxTCB )
+	{
+		return (StackType_t*) ((TCB_t*)pxTCB)->pxEndOfStack;
+	}
+
+
+	List_t* pxListGetReadyTask ( UBaseType_t idx )
+	{
+		return &( pxReadyTasksLists[idx] );
+	}
+
+	List_t* pxListGetReadyPendingTask ( UBaseType_t idx )
+	{
+		return &( xPendingReadyList[idx] );
+	}
+
+	List_t* pxGetDelayedTaskList ( void ) {
+		return pxDelayedTaskList;
+	}
+
+	List_t* pxGetOverflowDelayedTaskList ( void ) {
+		return pxOverflowDelayedTaskList;
+	}
+
+	List_t* pxGetTasksWaitingTermination ( void ) {
+		return &xTasksWaitingTermination;
+	}
+
+	List_t* pxGetSuspendedTaskList ( void ) {
+		return &xSuspendedTaskList;
+	}
+
+#endif
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/FreeRTOS.h b/tools/sdk/esp32s3/include/freertos/include/freertos/FreeRTOS.h
new file mode 100644
index 00000000000..eb0ee6be357
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/FreeRTOS.h
@@ -0,0 +1,1393 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef INC_FREERTOS_H
+#define INC_FREERTOS_H
+
+/*
+ * Include the generic headers required for the FreeRTOS port being used.
+ */
+#include <stddef.h>
+
+/*
+ * If stdint.h cannot be located then:
+ *   + If using GCC ensure the -nostdint options is *not* being used.
+ *   + Ensure the project's include path includes the directory in which your
+ *     compiler stores stdint.h.
+ *   + Set any compiler options necessary for it to support C99, as technically
+ *     stdint.h is only mandatory with C99 (FreeRTOS does not require C99 in any
+ *     other way).
+ *   + The FreeRTOS download includes a simple stdint.h definition that can be
+ *     used in cases where none is provided by the compiler.  The files only
+ *     contains the typedefs required to build FreeRTOS.  Read the instructions
+ *     in FreeRTOS/source/stdint.readme for more information.
+ */
+#include <stdint.h>     /* READ COMMENT ABOVE. */
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/* Application specific configuration options. */
+#include "FreeRTOSConfig.h"
+
+/* Basic FreeRTOS definitions. */
+#include "projdefs.h"
+
+/* Definitions specific to the port being used. */
+#include "portable.h"
+
+/* Must be defaulted before configUSE_NEWLIB_REENTRANT is used below. */
+#ifndef configUSE_NEWLIB_REENTRANT
+    #define configUSE_NEWLIB_REENTRANT    0
+#endif
+
+/* Required if struct _reent is used. */
+#if ( configUSE_NEWLIB_REENTRANT == 1 )
+    #include <reent.h>
+#endif
+
+/*
+ * Check all the required application specific macros have been defined.
+ * These macros are application specific and (as downloaded) are defined
+ * within FreeRTOSConfig.h.
+ */
+
+#ifndef configMINIMAL_STACK_SIZE
+    #error Missing definition:  configMINIMAL_STACK_SIZE must be defined in FreeRTOSConfig.h.  configMINIMAL_STACK_SIZE defines the size (in words) of the stack allocated to the idle task.  Refer to the demo project provided for your port for a suitable value.
+#endif
+
+#ifndef configMAX_PRIORITIES
+    #error Missing definition:  configMAX_PRIORITIES must be defined in FreeRTOSConfig.h.  See the Configuration section of the FreeRTOS API documentation for details.
+#endif
+
+#if configMAX_PRIORITIES < 1
+    #error configMAX_PRIORITIES must be defined to be greater than or equal to 1.
+#endif
+
+#ifndef configUSE_PREEMPTION
+    #error Missing definition:  configUSE_PREEMPTION must be defined in FreeRTOSConfig.h as either 1 or 0.  See the Configuration section of the FreeRTOS API documentation for details.
+#endif
+
+#ifndef configUSE_IDLE_HOOK
+    #error Missing definition:  configUSE_IDLE_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0.  See the Configuration section of the FreeRTOS API documentation for details.
+#endif
+
+#ifndef configUSE_TICK_HOOK
+    #error Missing definition:  configUSE_TICK_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0.  See the Configuration section of the FreeRTOS API documentation for details.
+#endif
+
+#ifndef configUSE_16_BIT_TICKS
+    #error Missing definition:  configUSE_16_BIT_TICKS must be defined in FreeRTOSConfig.h as either 1 or 0.  See the Configuration section of the FreeRTOS API documentation for details.
+#endif
+
+#ifndef configUSE_CO_ROUTINES
+    #define configUSE_CO_ROUTINES    0
+#endif
+
+#ifndef INCLUDE_vTaskPrioritySet
+    #define INCLUDE_vTaskPrioritySet    0
+#endif
+
+#ifndef INCLUDE_uxTaskPriorityGet
+    #define INCLUDE_uxTaskPriorityGet    0
+#endif
+
+#ifndef INCLUDE_vTaskDelete
+    #define INCLUDE_vTaskDelete    0
+#endif
+
+#ifndef INCLUDE_vTaskSuspend
+    #define INCLUDE_vTaskSuspend    0
+#endif
+
+#ifdef INCLUDE_xTaskDelayUntil
+    #ifdef INCLUDE_vTaskDelayUntil
+        /* INCLUDE_vTaskDelayUntil was replaced by INCLUDE_xTaskDelayUntil.  Backward
+         * compatibility is maintained if only one or the other is defined, but
+         * there is a conflict if both are defined. */
+        #error INCLUDE_vTaskDelayUntil and INCLUDE_xTaskDelayUntil are both defined.  INCLUDE_vTaskDelayUntil is no longer required and should be removed
+    #endif
+#endif
+
+#ifndef INCLUDE_xTaskDelayUntil
+    #ifdef INCLUDE_vTaskDelayUntil
+        /* If INCLUDE_vTaskDelayUntil is set but INCLUDE_xTaskDelayUntil is not then
+         * the project's FreeRTOSConfig.h probably pre-dates the introduction of
+         * xTaskDelayUntil and setting INCLUDE_xTaskDelayUntil to whatever
+         * INCLUDE_vTaskDelayUntil is set to will ensure backward compatibility.
+         */
+        #define INCLUDE_xTaskDelayUntil INCLUDE_vTaskDelayUntil
+    #endif
+#endif
+
+#ifndef INCLUDE_xTaskDelayUntil
+    #define INCLUDE_xTaskDelayUntil    0
+#endif
+
+#ifndef INCLUDE_vTaskDelay
+    #define INCLUDE_vTaskDelay    0
+#endif
+
+#ifndef INCLUDE_xTaskGetIdleTaskHandle
+    #define INCLUDE_xTaskGetIdleTaskHandle    0
+#endif
+
+#ifndef INCLUDE_xTaskAbortDelay
+    #define INCLUDE_xTaskAbortDelay    0
+#endif
+
+#ifndef INCLUDE_xQueueGetMutexHolder
+    #define INCLUDE_xQueueGetMutexHolder    0
+#endif
+
+#ifndef INCLUDE_xSemaphoreGetMutexHolder
+    #define INCLUDE_xSemaphoreGetMutexHolder    INCLUDE_xQueueGetMutexHolder
+#endif
+
+#ifndef INCLUDE_xTaskGetHandle
+    #define INCLUDE_xTaskGetHandle    0
+#endif
+
+#ifndef INCLUDE_uxTaskGetStackHighWaterMark
+    #define INCLUDE_uxTaskGetStackHighWaterMark    0
+#endif
+
+#ifndef INCLUDE_uxTaskGetStackHighWaterMark2
+    #define INCLUDE_uxTaskGetStackHighWaterMark2    0
+#endif
+
+#ifndef INCLUDE_eTaskGetState
+    #define INCLUDE_eTaskGetState    0
+#endif
+
+#ifndef INCLUDE_xTaskResumeFromISR
+    #define INCLUDE_xTaskResumeFromISR    1
+#endif
+
+#ifndef INCLUDE_xTimerPendFunctionCall
+    #define INCLUDE_xTimerPendFunctionCall    0
+#endif
+
+#ifndef INCLUDE_xTaskGetSchedulerState
+    #define INCLUDE_xTaskGetSchedulerState    0
+#endif
+
+#ifndef INCLUDE_xTaskGetCurrentTaskHandle
+    #define INCLUDE_xTaskGetCurrentTaskHandle    0
+#endif
+
+#if configUSE_CO_ROUTINES != 0
+    #ifndef configMAX_CO_ROUTINE_PRIORITIES
+        #error configMAX_CO_ROUTINE_PRIORITIES must be greater than or equal to 1.
+    #endif
+#endif
+
+#ifndef configUSE_DAEMON_TASK_STARTUP_HOOK
+    #define configUSE_DAEMON_TASK_STARTUP_HOOK    0
+#endif
+
+#ifndef configUSE_APPLICATION_TASK_TAG
+    #define configUSE_APPLICATION_TASK_TAG    0
+#endif
+
+#ifndef configNUM_THREAD_LOCAL_STORAGE_POINTERS
+    #define configNUM_THREAD_LOCAL_STORAGE_POINTERS    0
+#endif
+
+#ifndef configUSE_RECURSIVE_MUTEXES
+    #define configUSE_RECURSIVE_MUTEXES    0
+#endif
+
+#ifndef configUSE_MUTEXES
+    #define configUSE_MUTEXES    0
+#endif
+
+#ifndef configUSE_TIMERS
+    #define configUSE_TIMERS    0
+#endif
+
+#ifndef configUSE_COUNTING_SEMAPHORES
+    #define configUSE_COUNTING_SEMAPHORES    0
+#endif
+
+#ifndef configUSE_ALTERNATIVE_API
+    #define configUSE_ALTERNATIVE_API    0
+#endif
+
+#ifndef portCRITICAL_NESTING_IN_TCB
+    #define portCRITICAL_NESTING_IN_TCB    0
+#endif
+
+#ifndef configMAX_TASK_NAME_LEN
+    #define configMAX_TASK_NAME_LEN    16
+#endif
+
+#ifndef configIDLE_SHOULD_YIELD
+    #define configIDLE_SHOULD_YIELD    1
+#endif
+
+#if configMAX_TASK_NAME_LEN < 1
+    #error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h
+#endif
+
+#ifndef configASSERT
+    #define configASSERT( x )
+    #define configASSERT_DEFINED    0
+#else
+    #define configASSERT_DEFINED    1
+#endif
+
+/* configPRECONDITION should be defined as configASSERT.
+ * The CBMC proofs need a way to track assumptions and assertions.
+ * A configPRECONDITION statement should express an implicit invariant or
+ * assumption made.  A configASSERT statement should express an invariant that must
+ * hold explicit before calling the code. */
+#ifndef configPRECONDITION
+    #define configPRECONDITION( X )    configASSERT( X )
+    #define configPRECONDITION_DEFINED    0
+#else
+    #define configPRECONDITION_DEFINED    1
+#endif
+
+#ifndef portMEMORY_BARRIER
+    #define portMEMORY_BARRIER()
+#endif
+
+#ifndef portSOFTWARE_BARRIER
+    #define portSOFTWARE_BARRIER()
+#endif
+
+/* The timers module relies on xTaskGetSchedulerState(). */
+#if configUSE_TIMERS == 1
+
+    #ifndef configTIMER_TASK_PRIORITY
+        #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_PRIORITY must also be defined.
+    #endif /* configTIMER_TASK_PRIORITY */
+
+    #ifndef configTIMER_QUEUE_LENGTH
+        #error If configUSE_TIMERS is set to 1 then configTIMER_QUEUE_LENGTH must also be defined.
+    #endif /* configTIMER_QUEUE_LENGTH */
+
+    #ifndef configTIMER_TASK_STACK_DEPTH
+        #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_STACK_DEPTH must also be defined.
+    #endif /* configTIMER_TASK_STACK_DEPTH */
+
+#endif /* configUSE_TIMERS */
+
+#ifndef portSET_INTERRUPT_MASK_FROM_ISR
+    #define portSET_INTERRUPT_MASK_FROM_ISR()    0
+#endif
+
+#ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue )    ( void ) uxSavedStatusValue
+#endif
+
+#ifndef portCLEAN_UP_TCB
+    #define portCLEAN_UP_TCB( pxTCB )    ( void ) pxTCB
+#endif
+
+#ifndef portPRE_TASK_DELETE_HOOK
+    #define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxYieldPending )
+#endif
+
+#ifndef portSETUP_TCB
+    #define portSETUP_TCB( pxTCB )    ( void ) pxTCB
+#endif
+
+#ifndef configQUEUE_REGISTRY_SIZE
+    #define configQUEUE_REGISTRY_SIZE    0U
+#endif
+
+#if ( configQUEUE_REGISTRY_SIZE < 1 )
+    #define vQueueAddToRegistry( xQueue, pcName )
+    #define vQueueUnregisterQueue( xQueue )
+    #define pcQueueGetName( xQueue )
+#endif
+
+#ifndef portPOINTER_SIZE_TYPE
+    #define portPOINTER_SIZE_TYPE    uint32_t
+#endif
+
+/* Remove any unused trace macros. */
+#ifndef traceSTART
+
+/* Used to perform any necessary initialisation - for example, open a file
+ * into which trace is to be written. */
+    #define traceSTART()
+#endif
+
+#ifndef traceEND
+
+/* Use to close a trace, for example close a file into which trace has been
+ * written. */
+    #define traceEND()
+#endif
+
+#ifndef traceTASK_SWITCHED_IN
+
+/* Called after a task has been selected to run.  pxCurrentTCB holds a pointer
+ * to the task control block of the selected task. */
+    #define traceTASK_SWITCHED_IN()
+#endif
+
+#ifndef traceINCREASE_TICK_COUNT
+
+/* Called before stepping the tick count after waking from tickless idle
+ * sleep. */
+    #define traceINCREASE_TICK_COUNT( x )
+#endif
+
+#ifndef traceLOW_POWER_IDLE_BEGIN
+    /* Called immediately before entering tickless idle. */
+    #define traceLOW_POWER_IDLE_BEGIN()
+#endif
+
+#ifndef traceLOW_POWER_IDLE_END
+    /* Called when returning to the Idle task after a tickless idle. */
+    #define traceLOW_POWER_IDLE_END()
+#endif
+
+#ifndef traceTASK_SWITCHED_OUT
+
+/* Called before a task has been selected to run.  pxCurrentTCB holds a pointer
+ * to the task control block of the task being switched out. */
+    #define traceTASK_SWITCHED_OUT()
+#endif
+
+#ifndef traceTASK_PRIORITY_INHERIT
+
+/* Called when a task attempts to take a mutex that is already held by a
+ * lower priority task.  pxTCBOfMutexHolder is a pointer to the TCB of the task
+ * that holds the mutex.  uxInheritedPriority is the priority the mutex holder
+ * will inherit (the priority of the task that is attempting to obtain the
+ * muted. */
+    #define traceTASK_PRIORITY_INHERIT( pxTCBOfMutexHolder, uxInheritedPriority )
+#endif
+
+#ifndef traceTASK_PRIORITY_DISINHERIT
+
+/* Called when a task releases a mutex, the holding of which had resulted in
+ * the task inheriting the priority of a higher priority task.
+ * pxTCBOfMutexHolder is a pointer to the TCB of the task that is releasing the
+ * mutex.  uxOriginalPriority is the task's configured (base) priority. */
+    #define traceTASK_PRIORITY_DISINHERIT( pxTCBOfMutexHolder, uxOriginalPriority )
+#endif
+
+#ifndef traceBLOCKING_ON_QUEUE_RECEIVE
+
+/* Task is about to block because it cannot read from a
+ * queue/mutex/semaphore.  pxQueue is a pointer to the queue/mutex/semaphore
+ * upon which the read was attempted.  pxCurrentTCB points to the TCB of the
+ * task that attempted the read. */
+    #define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue )
+#endif
+
+#ifndef traceBLOCKING_ON_QUEUE_PEEK
+
+/* Task is about to block because it cannot read from a
+ * queue/mutex/semaphore.  pxQueue is a pointer to the queue/mutex/semaphore
+ * upon which the read was attempted.  pxCurrentTCB points to the TCB of the
+ * task that attempted the read. */
+    #define traceBLOCKING_ON_QUEUE_PEEK( pxQueue )
+#endif
+
+#ifndef traceBLOCKING_ON_QUEUE_SEND
+
+/* Task is about to block because it cannot write to a
+ * queue/mutex/semaphore.  pxQueue is a pointer to the queue/mutex/semaphore
+ * upon which the write was attempted.  pxCurrentTCB points to the TCB of the
+ * task that attempted the write. */
+    #define traceBLOCKING_ON_QUEUE_SEND( pxQueue )
+#endif
+
+#ifndef configCHECK_FOR_STACK_OVERFLOW
+    #define configCHECK_FOR_STACK_OVERFLOW    0
+#endif
+
+#ifndef configRECORD_STACK_HIGH_ADDRESS
+    #define configRECORD_STACK_HIGH_ADDRESS    0
+#endif
+
+#ifndef configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H
+    #define configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H    0
+#endif
+
+/* The following event macros are embedded in the kernel API calls. */
+
+#ifndef traceMOVED_TASK_TO_READY_STATE
+    #define traceMOVED_TASK_TO_READY_STATE( pxTCB )
+#endif
+
+#ifndef tracePOST_MOVED_TASK_TO_READY_STATE
+    #define tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
+#endif
+
+#ifndef traceQUEUE_CREATE
+    #define traceQUEUE_CREATE( pxNewQueue )
+#endif
+
+#ifndef traceQUEUE_CREATE_FAILED
+    #define traceQUEUE_CREATE_FAILED( ucQueueType )
+#endif
+
+#ifndef traceCREATE_MUTEX
+    #define traceCREATE_MUTEX( pxNewQueue )
+#endif
+
+#ifndef traceCREATE_MUTEX_FAILED
+    #define traceCREATE_MUTEX_FAILED()
+#endif
+
+#ifndef traceGIVE_MUTEX_RECURSIVE
+    #define traceGIVE_MUTEX_RECURSIVE( pxMutex )
+#endif
+
+#ifndef traceGIVE_MUTEX_RECURSIVE_FAILED
+    #define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex )
+#endif
+
+#ifndef traceTAKE_MUTEX_RECURSIVE
+    #define traceTAKE_MUTEX_RECURSIVE( pxMutex )
+#endif
+
+#ifndef traceTAKE_MUTEX_RECURSIVE_FAILED
+    #define traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex )
+#endif
+
+#ifndef traceCREATE_COUNTING_SEMAPHORE
+    #define traceCREATE_COUNTING_SEMAPHORE()
+#endif
+
+#ifndef traceCREATE_COUNTING_SEMAPHORE_FAILED
+    #define traceCREATE_COUNTING_SEMAPHORE_FAILED()
+#endif
+
+#ifndef traceQUEUE_SET_SEND
+    #define traceQUEUE_SET_SEND    traceQUEUE_SEND
+#endif
+
+#ifdef ESP_PLATFORM
+#ifndef traceQUEUE_SEMAPHORE_RECEIVE
+    #define traceQUEUE_SEMAPHORE_RECEIVE( pxQueue )
+#endif
+#endif // ESP_PLATFORM
+
+#ifndef traceQUEUE_SEND
+    #define traceQUEUE_SEND( pxQueue )
+#endif
+
+#ifndef traceQUEUE_SEND_FAILED
+    #define traceQUEUE_SEND_FAILED( pxQueue )
+#endif
+
+#ifndef traceQUEUE_RECEIVE
+    #define traceQUEUE_RECEIVE( pxQueue )
+#endif
+
+#ifndef traceQUEUE_PEEK
+    #define traceQUEUE_PEEK( pxQueue )
+#endif
+
+#ifndef traceQUEUE_PEEK_FAILED
+    #define traceQUEUE_PEEK_FAILED( pxQueue )
+#endif
+
+#ifndef traceQUEUE_PEEK_FROM_ISR
+    #define traceQUEUE_PEEK_FROM_ISR( pxQueue )
+#endif
+
+#ifndef traceQUEUE_RECEIVE_FAILED
+    #define traceQUEUE_RECEIVE_FAILED( pxQueue )
+#endif
+
+#ifndef traceQUEUE_SEND_FROM_ISR
+    #define traceQUEUE_SEND_FROM_ISR( pxQueue )
+#endif
+
+#ifndef traceQUEUE_SEND_FROM_ISR_FAILED
+    #define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue )
+#endif
+
+#ifndef traceQUEUE_RECEIVE_FROM_ISR
+    #define traceQUEUE_RECEIVE_FROM_ISR( pxQueue )
+#endif
+
+#ifndef traceQUEUE_RECEIVE_FROM_ISR_FAILED
+    #define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue )
+#endif
+
+#ifndef traceQUEUE_PEEK_FROM_ISR_FAILED
+    #define traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue )
+#endif
+
+#ifndef traceQUEUE_DELETE
+    #define traceQUEUE_DELETE( pxQueue )
+#endif
+
+#ifdef ESP_PLATFORM
+#ifndef traceQUEUE_GIVE_FROM_ISR
+    #define traceQUEUE_GIVE_FROM_ISR( pxQueue )
+#endif
+
+#ifndef traceQUEUE_GIVE_FROM_ISR_FAILED
+    #define traceQUEUE_GIVE_FROM_ISR_FAILED( pxQueue )
+#endif
+#endif // ESP_PLATFORM
+
+#ifndef traceTASK_CREATE
+    #define traceTASK_CREATE( pxNewTCB )
+#endif
+
+#ifndef traceTASK_CREATE_FAILED
+    #define traceTASK_CREATE_FAILED()
+#endif
+
+#ifndef traceTASK_DELETE
+    #define traceTASK_DELETE( pxTaskToDelete )
+#endif
+
+#ifndef traceTASK_DELAY_UNTIL
+    #define traceTASK_DELAY_UNTIL( x )
+#endif
+
+#ifndef traceTASK_DELAY
+    #define traceTASK_DELAY()
+#endif
+
+#ifndef traceTASK_PRIORITY_SET
+    #define traceTASK_PRIORITY_SET( pxTask, uxNewPriority )
+#endif
+
+#ifndef traceTASK_SUSPEND
+    #define traceTASK_SUSPEND( pxTaskToSuspend )
+#endif
+
+#ifndef traceTASK_RESUME
+    #define traceTASK_RESUME( pxTaskToResume )
+#endif
+
+#ifndef traceTASK_RESUME_FROM_ISR
+    #define traceTASK_RESUME_FROM_ISR( pxTaskToResume )
+#endif
+
+#ifndef traceTASK_INCREMENT_TICK
+    #define traceTASK_INCREMENT_TICK( xTickCount )
+#endif
+
+#ifndef traceTIMER_CREATE
+    #define traceTIMER_CREATE( pxNewTimer )
+#endif
+
+#ifndef traceTIMER_CREATE_FAILED
+    #define traceTIMER_CREATE_FAILED()
+#endif
+
+#ifndef traceTIMER_COMMAND_SEND
+    #define traceTIMER_COMMAND_SEND( xTimer, xMessageID, xMessageValueValue, xReturn )
+#endif
+
+#ifndef traceTIMER_EXPIRED
+    #define traceTIMER_EXPIRED( pxTimer )
+#endif
+
+#ifndef traceTIMER_COMMAND_RECEIVED
+    #define traceTIMER_COMMAND_RECEIVED( pxTimer, xMessageID, xMessageValue )
+#endif
+
+#ifndef traceMALLOC
+    #define traceMALLOC( pvAddress, uiSize )
+#endif
+
+#ifndef traceFREE
+    #define traceFREE( pvAddress, uiSize )
+#endif
+
+#ifndef traceEVENT_GROUP_CREATE
+    #define traceEVENT_GROUP_CREATE( xEventGroup )
+#endif
+
+#ifndef traceEVENT_GROUP_CREATE_FAILED
+    #define traceEVENT_GROUP_CREATE_FAILED()
+#endif
+
+#ifndef traceEVENT_GROUP_SYNC_BLOCK
+    #define traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor )
+#endif
+
+#ifndef traceEVENT_GROUP_SYNC_END
+    #define traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred )    ( void ) xTimeoutOccurred
+#endif
+
+#ifndef traceEVENT_GROUP_WAIT_BITS_BLOCK
+    #define traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor )
+#endif
+
+#ifndef traceEVENT_GROUP_WAIT_BITS_END
+    #define traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred )    ( void ) xTimeoutOccurred
+#endif
+
+#ifndef traceEVENT_GROUP_CLEAR_BITS
+    #define traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear )
+#endif
+
+#ifndef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR
+    #define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear )
+#endif
+
+#ifndef traceEVENT_GROUP_SET_BITS
+    #define traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet )
+#endif
+
+#ifndef traceEVENT_GROUP_SET_BITS_FROM_ISR
+    #define traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet )
+#endif
+
+#ifndef traceEVENT_GROUP_DELETE
+    #define traceEVENT_GROUP_DELETE( xEventGroup )
+#endif
+
+#ifndef tracePEND_FUNC_CALL
+    #define tracePEND_FUNC_CALL( xFunctionToPend, pvParameter1, ulParameter2, ret )
+#endif
+
+#ifndef tracePEND_FUNC_CALL_FROM_ISR
+    #define tracePEND_FUNC_CALL_FROM_ISR( xFunctionToPend, pvParameter1, ulParameter2, ret )
+#endif
+
+#ifndef traceQUEUE_REGISTRY_ADD
+    #define traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName )
+#endif
+
+#ifndef traceTASK_NOTIFY_TAKE_BLOCK
+    #define traceTASK_NOTIFY_TAKE_BLOCK( uxIndexToWait )
+#endif
+
+#ifndef traceTASK_NOTIFY_TAKE
+    #define traceTASK_NOTIFY_TAKE( uxIndexToWait )
+#endif
+
+#ifndef traceTASK_NOTIFY_WAIT_BLOCK
+    #define traceTASK_NOTIFY_WAIT_BLOCK( uxIndexToWait )
+#endif
+
+#ifndef traceTASK_NOTIFY_WAIT
+    #define traceTASK_NOTIFY_WAIT( uxIndexToWait )
+#endif
+
+#ifndef traceTASK_NOTIFY
+    #define traceTASK_NOTIFY( uxIndexToNotify )
+#endif
+
+#ifndef traceTASK_NOTIFY_FROM_ISR
+    #define traceTASK_NOTIFY_FROM_ISR( uxIndexToNotify )
+#endif
+
+#ifndef traceTASK_NOTIFY_GIVE_FROM_ISR
+    #define traceTASK_NOTIFY_GIVE_FROM_ISR( uxIndexToNotify )
+#endif
+
+#ifndef traceSTREAM_BUFFER_CREATE_FAILED
+    #define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer )
+#endif
+
+#ifndef traceSTREAM_BUFFER_CREATE_STATIC_FAILED
+    #define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer )
+#endif
+
+#ifndef traceSTREAM_BUFFER_CREATE
+    #define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer )
+#endif
+
+#ifndef traceSTREAM_BUFFER_DELETE
+    #define traceSTREAM_BUFFER_DELETE( xStreamBuffer )
+#endif
+
+#ifndef traceSTREAM_BUFFER_RESET
+    #define traceSTREAM_BUFFER_RESET( xStreamBuffer )
+#endif
+
+#ifndef traceBLOCKING_ON_STREAM_BUFFER_SEND
+    #define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer )
+#endif
+
+#ifndef traceSTREAM_BUFFER_SEND
+    #define traceSTREAM_BUFFER_SEND( xStreamBuffer, xBytesSent )
+#endif
+
+#ifndef traceSTREAM_BUFFER_SEND_FAILED
+    #define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer )
+#endif
+
+#ifndef traceSTREAM_BUFFER_SEND_FROM_ISR
+    #define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xBytesSent )
+#endif
+
+#ifndef traceBLOCKING_ON_STREAM_BUFFER_RECEIVE
+    #define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer )
+#endif
+
+#ifndef traceSTREAM_BUFFER_RECEIVE
+    #define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength )
+#endif
+
+#ifndef traceSTREAM_BUFFER_RECEIVE_FAILED
+    #define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer )
+#endif
+
+#ifndef traceSTREAM_BUFFER_RECEIVE_FROM_ISR
+    #define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength )
+#endif
+
+#ifdef ESP_PLATFORM
+#ifndef traceISR_EXIT_TO_SCHEDULER
+    #define traceISR_EXIT_TO_SCHEDULER()
+#endif
+
+#ifndef traceISR_EXIT
+    #define traceISR_EXIT()
+#endif
+
+#ifndef traceISR_ENTER
+    #define traceISR_ENTER(_n_)
+#endif
+#endif // ESP_PLATFORM
+
+#ifndef configGENERATE_RUN_TIME_STATS
+    #define configGENERATE_RUN_TIME_STATS    0
+#endif
+
+#if ( configGENERATE_RUN_TIME_STATS == 1 )
+
+    #ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS
+        #error If configGENERATE_RUN_TIME_STATS is defined then portCONFIGURE_TIMER_FOR_RUN_TIME_STATS must also be defined.  portCONFIGURE_TIMER_FOR_RUN_TIME_STATS should call a port layer function to setup a peripheral timer/counter that can then be used as the run time counter time base.
+    #endif /* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS */
+
+    #ifndef portGET_RUN_TIME_COUNTER_VALUE
+        #ifndef portALT_GET_RUN_TIME_COUNTER_VALUE
+            #error If configGENERATE_RUN_TIME_STATS is defined then either portGET_RUN_TIME_COUNTER_VALUE or portALT_GET_RUN_TIME_COUNTER_VALUE must also be defined.  See the examples provided and the FreeRTOS web site for more information.
+        #endif /* portALT_GET_RUN_TIME_COUNTER_VALUE */
+    #endif /* portGET_RUN_TIME_COUNTER_VALUE */
+
+#endif /* configGENERATE_RUN_TIME_STATS */
+
+#ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS
+    #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
+#endif
+
+#ifndef configUSE_MALLOC_FAILED_HOOK
+    #define configUSE_MALLOC_FAILED_HOOK    0
+#endif
+
+#ifndef portPRIVILEGE_BIT
+    #define portPRIVILEGE_BIT    ( ( UBaseType_t ) 0x00 )
+#endif
+
+#ifndef portYIELD_WITHIN_API
+    #define portYIELD_WITHIN_API    portYIELD
+#endif
+
+#ifndef portSUPPRESS_TICKS_AND_SLEEP
+    #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )
+#endif
+
+#ifndef configEXPECTED_IDLE_TIME_BEFORE_SLEEP
+    #define configEXPECTED_IDLE_TIME_BEFORE_SLEEP    2
+#endif
+
+#if configEXPECTED_IDLE_TIME_BEFORE_SLEEP < 2
+    #error configEXPECTED_IDLE_TIME_BEFORE_SLEEP must not be less than 2
+#endif
+
+#ifndef configUSE_TICKLESS_IDLE
+    #define configUSE_TICKLESS_IDLE    0
+#endif
+
+#ifndef configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING
+    #define configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( x )
+#endif
+
+#ifndef configPRE_SLEEP_PROCESSING
+    #define configPRE_SLEEP_PROCESSING( x )
+#endif
+
+#ifndef configPOST_SLEEP_PROCESSING
+    #define configPOST_SLEEP_PROCESSING( x )
+#endif
+
+#ifndef configUSE_QUEUE_SETS
+    #define configUSE_QUEUE_SETS    0
+#endif
+
+#ifndef portTASK_USES_FLOATING_POINT
+    #define portTASK_USES_FLOATING_POINT()
+#endif
+
+#ifndef portALLOCATE_SECURE_CONTEXT
+    #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+#endif
+
+#ifndef portDONT_DISCARD
+    #define portDONT_DISCARD
+#endif
+
+#ifndef configUSE_TIME_SLICING
+    #define configUSE_TIME_SLICING    1
+#endif
+
+#ifndef configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
+    #define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS    0
+#endif
+
+#ifndef configUSE_STATS_FORMATTING_FUNCTIONS
+    #define configUSE_STATS_FORMATTING_FUNCTIONS    0
+#endif
+
+#ifndef portASSERT_IF_INTERRUPT_PRIORITY_INVALID
+    #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()
+#endif
+
+#ifndef configUSE_TRACE_FACILITY
+    #define configUSE_TRACE_FACILITY    0
+#endif
+
+#ifndef mtCOVERAGE_TEST_MARKER
+    #define mtCOVERAGE_TEST_MARKER()
+#endif
+
+#ifndef mtCOVERAGE_TEST_DELAY
+    #define mtCOVERAGE_TEST_DELAY()
+#endif
+
+#ifndef portASSERT_IF_IN_ISR
+    #define portASSERT_IF_IN_ISR()
+#endif
+
+#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+    #define configUSE_PORT_OPTIMISED_TASK_SELECTION    0
+#endif
+
+#ifndef configAPPLICATION_ALLOCATED_HEAP
+    #define configAPPLICATION_ALLOCATED_HEAP    0
+#endif
+
+#ifndef configUSE_TASK_NOTIFICATIONS
+    #define configUSE_TASK_NOTIFICATIONS    1
+#endif
+
+#ifndef configTASK_NOTIFICATION_ARRAY_ENTRIES
+    #define configTASK_NOTIFICATION_ARRAY_ENTRIES    1
+#endif
+
+#if configTASK_NOTIFICATION_ARRAY_ENTRIES < 1
+    #error configTASK_NOTIFICATION_ARRAY_ENTRIES must be at least 1
+#endif
+
+#ifndef configUSE_POSIX_ERRNO
+    #define configUSE_POSIX_ERRNO    0
+#endif
+
+#ifndef portTICK_TYPE_IS_ATOMIC
+    #define portTICK_TYPE_IS_ATOMIC    0
+#endif
+
+#ifndef configSUPPORT_STATIC_ALLOCATION
+    /* Defaults to 0 for backward compatibility. */
+    #define configSUPPORT_STATIC_ALLOCATION    0
+#endif
+
+#ifndef configSUPPORT_DYNAMIC_ALLOCATION
+    /* Defaults to 1 for backward compatibility. */
+    #define configSUPPORT_DYNAMIC_ALLOCATION    1
+#endif
+
+#ifndef configSTACK_ALLOCATION_FROM_SEPARATE_HEAP
+    /* Defaults to 0 for backward compatibility. */
+    #define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+#endif
+
+#ifndef configSTACK_DEPTH_TYPE
+
+/* Defaults to uint16_t for backward compatibility, but can be overridden
+ * in FreeRTOSConfig.h if uint16_t is too restrictive. */
+    #define configSTACK_DEPTH_TYPE    uint16_t
+#endif
+
+#ifndef configMESSAGE_BUFFER_LENGTH_TYPE
+
+/* Defaults to size_t for backward compatibility, but can be overridden
+ * in FreeRTOSConfig.h if lengths will always be less than the number of bytes
+ * in a size_t. */
+    #define configMESSAGE_BUFFER_LENGTH_TYPE    size_t
+#endif
+
+/* Sanity check the configuration. */
+#if ( configUSE_TICKLESS_IDLE != 0 )
+    #if ( INCLUDE_vTaskSuspend != 1 )
+        #error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0
+    #endif /* INCLUDE_vTaskSuspend */
+#endif /* configUSE_TICKLESS_IDLE */
+
+#if ( ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) )
+    #error configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION cannot both be 0, but can both be 1.
+#endif
+
+#if ( ( configUSE_RECURSIVE_MUTEXES == 1 ) && ( configUSE_MUTEXES != 1 ) )
+    #error configUSE_MUTEXES must be set to 1 to use recursive mutexes
+#endif
+
+#ifndef configINITIAL_TICK_COUNT
+    #define configINITIAL_TICK_COUNT    0
+#endif
+
+#if ( portTICK_TYPE_IS_ATOMIC == 0 )
+
+/* Either variables of tick type cannot be read atomically, or
+ * portTICK_TYPE_IS_ATOMIC was not set - map the critical sections used when
+ * the tick count is returned to the standard critical section macros. */
+    #define portTICK_TYPE_ENTER_CRITICAL(mux) portENTER_CRITICAL(mux)
+    #define portTICK_TYPE_EXIT_CRITICAL(mux) portEXIT_CRITICAL(mux)
+    #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR()         portSET_INTERRUPT_MASK_FROM_ISR()
+    #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x )    portCLEAR_INTERRUPT_MASK_FROM_ISR( ( x ) )
+#else
+
+/* The tick type can be read atomically, so critical sections used when the
+ * tick count is returned can be defined away. */
+    #define portTICK_TYPE_ENTER_CRITICAL()
+    #define portTICK_TYPE_EXIT_CRITICAL()
+    #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR()         0
+    #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x )    ( void ) x
+#endif /* if ( portTICK_TYPE_IS_ATOMIC == 0 ) */
+
+/* Definitions to allow backward compatibility with FreeRTOS versions prior to
+ * V8 if desired. */
+#ifndef configENABLE_BACKWARD_COMPATIBILITY
+    #define configENABLE_BACKWARD_COMPATIBILITY    1
+#endif
+
+#ifndef configPRINTF
+
+/* configPRINTF() was not defined, so define it away to nothing.  To use
+ * configPRINTF() then define it as follows (where MyPrintFunction() is
+ * provided by the application writer):
+ *
+ * void MyPrintFunction(const char *pcFormat, ... );
+ #define configPRINTF( X )   MyPrintFunction X
+ *
+ * Then call like a standard printf() function, but placing brackets around
+ * all parameters so they are passed as a single parameter.  For example:
+ * configPRINTF( ("Value = %d", MyVariable) ); */
+    #define configPRINTF( X )
+#endif
+
+#ifndef configMAX
+
+/* The application writer has not provided their own MAX macro, so define
+ * the following generic implementation. */
+    #define configMAX( a, b )    ( ( ( a ) > ( b ) ) ? ( a ) : ( b ) )
+#endif
+
+#ifndef configMIN
+
+/* The application writer has not provided their own MIN macro, so define
+ * the following generic implementation. */
+    #define configMIN( a, b )    ( ( ( a ) < ( b ) ) ? ( a ) : ( b ) )
+#endif
+
+#if configENABLE_BACKWARD_COMPATIBILITY == 1
+    #define eTaskStateGet                 eTaskGetState
+    #define portTickType                  TickType_t
+    #define xTaskHandle                   TaskHandle_t
+    #define xQueueHandle                  QueueHandle_t
+    #define xSemaphoreHandle              SemaphoreHandle_t
+    #define xQueueSetHandle               QueueSetHandle_t
+    #define xQueueSetMemberHandle         QueueSetMemberHandle_t
+    #define xTimeOutType                  TimeOut_t
+    #define xMemoryRegion                 MemoryRegion_t
+    #define xTaskParameters               TaskParameters_t
+    #define xTaskStatusType               TaskStatus_t
+    #define xTimerHandle                  TimerHandle_t
+    #define xCoRoutineHandle              CoRoutineHandle_t
+    #define pdTASK_HOOK_CODE              TaskHookFunction_t
+    #define portTICK_RATE_MS              portTICK_PERIOD_MS
+    #define pcTaskGetTaskName             pcTaskGetName
+    #define pcTimerGetTimerName           pcTimerGetName
+    #define pcQueueGetQueueName           pcQueueGetName
+    #define vTaskGetTaskInfo              vTaskGetInfo
+    #define xTaskGetIdleRunTimeCounter    ulTaskGetIdleRunTimeCounter
+
+/* Backward compatibility within the scheduler code only - these definitions
+ * are not really required but are included for completeness. */
+    #define tmrTIMER_CALLBACK             TimerCallbackFunction_t
+    #define pdTASK_CODE                   TaskFunction_t
+    #define xListItem                     ListItem_t
+    #define xList                         List_t
+
+/* For libraries that break the list data hiding, and access list structure
+ * members directly (which is not supposed to be done). */
+    #define pxContainer                   pvContainer
+#endif /* configENABLE_BACKWARD_COMPATIBILITY */
+
+#ifdef ESP_PLATFORM
+#ifndef configESP32_PER_TASK_DATA
+    #define configESP32_PER_TASK_DATA 1
+#endif
+#endif // ESP_PLATFORM
+
+#if ( configUSE_ALTERNATIVE_API != 0 )
+    #error The alternative API was deprecated some time ago, and was removed in FreeRTOS V9.0 0
+#endif
+
+/* Set configUSE_TASK_FPU_SUPPORT to 0 to omit floating point support even
+ * if floating point hardware is otherwise supported by the FreeRTOS port in use.
+ * This constant is not supported by all FreeRTOS ports that include floating
+ * point support. */
+#ifndef configUSE_TASK_FPU_SUPPORT
+    #define configUSE_TASK_FPU_SUPPORT    1
+#endif
+
+/* Set configENABLE_MPU to 1 to enable MPU support and 0 to disable it. This is
+ * currently used in ARMv8M ports. */
+#ifndef configENABLE_MPU
+    #define configENABLE_MPU    0
+#endif
+
+/* Set configENABLE_FPU to 1 to enable FPU support and 0 to disable it. This is
+ * currently used in ARMv8M ports. */
+#ifndef configENABLE_FPU
+    #define configENABLE_FPU    1
+#endif
+
+/* Set configENABLE_TRUSTZONE to 1 enable TrustZone support and 0 to disable it.
+ * This is currently used in ARMv8M ports. */
+#ifndef configENABLE_TRUSTZONE
+    #define configENABLE_TRUSTZONE    1
+#endif
+
+/* Set configRUN_FREERTOS_SECURE_ONLY to 1 to run the FreeRTOS ARMv8M port on
+ * the Secure Side only. */
+#ifndef configRUN_FREERTOS_SECURE_ONLY
+    #define configRUN_FREERTOS_SECURE_ONLY    0
+#endif
+
+/* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using
+ * dynamically allocated RAM, in which case when any task is deleted it is known
+ * that both the task's stack and TCB need to be freed.  Sometimes the
+ * FreeRTOSConfig.h settings only allow a task to be created using statically
+ * allocated RAM, in which case when any task is deleted it is known that neither
+ * the task's stack or TCB should be freed.  Sometimes the FreeRTOSConfig.h
+ * settings allow a task to be created using either statically or dynamically
+ * allocated RAM, in which case a member of the TCB is used to record whether the
+ * stack and/or TCB were allocated statically or dynamically, so when a task is
+ * deleted the RAM that was allocated dynamically is freed again and no attempt is
+ * made to free the RAM that was allocated statically.
+ * tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE is only true if it is possible for a
+ * task to be created using either statically or dynamically allocated RAM.  Note
+ * that if portUSING_MPU_WRAPPERS is 1 then a protected task can be created with
+ * a statically allocated stack and a dynamically allocated TCB.
+ *
+ * The following table lists various combinations of portUSING_MPU_WRAPPERS,
+ * configSUPPORT_DYNAMIC_ALLOCATION and configSUPPORT_STATIC_ALLOCATION and
+ * when it is possible to have both static and dynamic allocation:
+ *  +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+
+ * | MPU | Dynamic | Static |     Available Functions     |       Possible Allocations        | Both Dynamic and | Need Free |
+ * |     |         |        |                             |                                   | Static Possible  |           |
+ * +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+
+ * | 0   | 0       | 1      | xTaskCreateStatic           | TCB - Static, Stack - Static      | No               | No        |
+ * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------|
+ * | 0   | 1       | 0      | xTaskCreate                 | TCB - Dynamic, Stack - Dynamic    | No               | Yes       |
+ * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------|
+ * | 0   | 1       | 1      | xTaskCreate,                | 1. TCB - Dynamic, Stack - Dynamic | Yes              | Yes       |
+ * |     |         |        | xTaskCreateStatic           | 2. TCB - Static, Stack - Static   |                  |           |
+ * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------|
+ * | 1   | 0       | 1      | xTaskCreateStatic,          | TCB - Static, Stack - Static      | No               | No        |
+ * |     |         |        | xTaskCreateRestrictedStatic |                                   |                  |           |
+ * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------|
+ * | 1   | 1       | 0      | xTaskCreate,                | 1. TCB - Dynamic, Stack - Dynamic | Yes              | Yes       |
+ * |     |         |        | xTaskCreateRestricted       | 2. TCB - Dynamic, Stack - Static  |                  |           |
+ * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------|
+ * | 1   | 1       | 1      | xTaskCreate,                | 1. TCB - Dynamic, Stack - Dynamic | Yes              | Yes       |
+ * |     |         |        | xTaskCreateStatic,          | 2. TCB - Dynamic, Stack - Static  |                  |           |
+ * |     |         |        | xTaskCreateRestricted,      | 3. TCB - Static, Stack - Static   |                  |           |
+ * |     |         |        | xTaskCreateRestrictedStatic |                                   |                  |           |
+ * +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+
+ */
+#define tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE                                                                                     \
+    ( ( ( portUSING_MPU_WRAPPERS == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) || \
+      ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) )
+
+/*
+ * In line with software engineering best practice, FreeRTOS implements a strict
+ * data hiding policy, so the real structures used by FreeRTOS to maintain the
+ * state of tasks, queues, semaphores, etc. are not accessible to the application
+ * code.  However, if the application writer wants to statically allocate such
+ * an object then the size of the object needs to be known.  Dummy structures
+ * that are guaranteed to have the same size and alignment requirements of the
+ * real objects are used for this purpose.  The dummy list and list item
+ * structures below are used for inclusion in such a dummy structure.
+ */
+struct xSTATIC_LIST_ITEM
+{
+    #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 )
+        TickType_t xDummy1;
+    #endif
+    TickType_t xDummy2;
+    void * pvDummy3[ 4 ];
+    #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 )
+        TickType_t xDummy4;
+    #endif
+};
+typedef struct xSTATIC_LIST_ITEM StaticListItem_t;
+
+/* See the comments above the struct xSTATIC_LIST_ITEM definition. */
+struct xSTATIC_MINI_LIST_ITEM
+{
+    #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 )
+        TickType_t xDummy1;
+    #endif
+    TickType_t xDummy2;
+    void * pvDummy3[ 2 ];
+};
+typedef struct xSTATIC_MINI_LIST_ITEM StaticMiniListItem_t;
+
+/* See the comments above the struct xSTATIC_LIST_ITEM definition. */
+typedef struct xSTATIC_LIST
+{
+    #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 )
+        TickType_t xDummy1;
+    #endif
+    UBaseType_t uxDummy2;
+    void * pvDummy3;
+    StaticMiniListItem_t xDummy4;
+    #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 )
+        TickType_t xDummy5;
+    #endif
+} StaticList_t;
+
+/*
+ * In line with software engineering best practice, especially when supplying a
+ * library that is likely to change in future versions, FreeRTOS implements a
+ * strict data hiding policy.  This means the Task structure used internally by
+ * FreeRTOS is not accessible to application code.  However, if the application
+ * writer wants to statically allocate the memory required to create a task then
+ * the size of the task object needs to be known.  The StaticTask_t structure
+ * below is provided for this purpose.  Its sizes and alignment requirements are
+ * guaranteed to match those of the genuine structure, no matter which
+ * architecture is being used, and no matter how the values in FreeRTOSConfig.h
+ * are set.  Its contents are somewhat obfuscated in the hope users will
+ * recognise that it would be unwise to make direct use of the structure members.
+ */
+typedef struct xSTATIC_TCB
+{
+    void * pxDummy1;
+    #if ( portUSING_MPU_WRAPPERS == 1 )
+        xMPU_SETTINGS xDummy2;
+    #endif
+    StaticListItem_t xDummy3[ 2 ];
+    UBaseType_t uxDummy5;
+    void * pxDummy6;
+    uint8_t ucDummy7[ configMAX_TASK_NAME_LEN ];
+    BaseType_t xDummyCore;
+    #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )
+        void * pxDummy8;
+    #endif
+    #if ( portCRITICAL_NESTING_IN_TCB == 1 )
+        UBaseType_t uxDummy9;
+    #endif
+    #if ( configUSE_TRACE_FACILITY == 1 )
+        UBaseType_t uxDummy10[ 2 ];
+    #endif
+    #if ( configUSE_MUTEXES == 1 )
+        UBaseType_t uxDummy12[ 2 ];
+    #endif
+    #if ( configUSE_APPLICATION_TASK_TAG == 1 )
+        void * pxDummy14;
+    #endif
+    #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
+        void * pvDummy15[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
+    #if ( configTHREAD_LOCAL_STORAGE_DELETE_CALLBACKS )
+        void            *pvDummyLocalStorageCallBack[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
+    #endif
+    #endif
+    #if ( configGENERATE_RUN_TIME_STATS == 1 )
+        uint32_t ulDummy16;
+    #endif
+    #if ( configUSE_NEWLIB_REENTRANT == 1 )
+        struct  _reent xDummy17;
+    #endif
+    #if ( configUSE_TASK_NOTIFICATIONS == 1 )
+        uint32_t ulDummy18[ configTASK_NOTIFICATION_ARRAY_ENTRIES ];
+        uint8_t ucDummy19[ configTASK_NOTIFICATION_ARRAY_ENTRIES ];
+    #endif
+    #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
+        uint8_t uxDummy20;
+    #endif
+
+    #if ( INCLUDE_xTaskAbortDelay == 1 )
+        uint8_t ucDummy21;
+    #endif
+    #if ( configUSE_POSIX_ERRNO == 1 )
+        int iDummy22;
+    #endif
+} StaticTask_t;
+
+/*
+ * In line with software engineering best practice, especially when supplying a
+ * library that is likely to change in future versions, FreeRTOS implements a
+ * strict data hiding policy.  This means the Queue structure used internally by
+ * FreeRTOS is not accessible to application code.  However, if the application
+ * writer wants to statically allocate the memory required to create a queue
+ * then the size of the queue object needs to be known.  The StaticQueue_t
+ * structure below is provided for this purpose.  Its sizes and alignment
+ * requirements are guaranteed to match those of the genuine structure, no
+ * matter which architecture is being used, and no matter how the values in
+ * FreeRTOSConfig.h are set.  Its contents are somewhat obfuscated in the hope
+ * users will recognise that it would be unwise to make direct use of the
+ * structure members.
+ */
+typedef struct xSTATIC_QUEUE
+{
+    void * pvDummy1[ 3 ];
+
+    union
+    {
+        void * pvDummy2;
+        UBaseType_t uxDummy2;
+    } u;
+
+    StaticList_t xDummy3[ 2 ];
+    UBaseType_t uxDummy4[ 3 ];
+    uint8_t ucDummy5[ 2 ];
+
+    #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+        uint8_t ucDummy6;
+    #endif
+
+    #if ( configUSE_QUEUE_SETS == 1 )
+        void * pvDummy7;
+    #endif
+
+    #if ( configUSE_TRACE_FACILITY == 1 )
+        UBaseType_t uxDummy8;
+        uint8_t ucDummy9;
+    #endif
+    portMUX_TYPE xDummy10;
+} StaticQueue_t;
+typedef StaticQueue_t StaticSemaphore_t;
+
+/*
+ * In line with software engineering best practice, especially when supplying a
+ * library that is likely to change in future versions, FreeRTOS implements a
+ * strict data hiding policy.  This means the event group structure used
+ * internally by FreeRTOS is not accessible to application code.  However, if
+ * the application writer wants to statically allocate the memory required to
+ * create an event group then the size of the event group object needs to be
+ * know.  The StaticEventGroup_t structure below is provided for this purpose.
+ * Its sizes and alignment requirements are guaranteed to match those of the
+ * genuine structure, no matter which architecture is being used, and no matter
+ * how the values in FreeRTOSConfig.h are set.  Its contents are somewhat
+ * obfuscated in the hope users will recognise that it would be unwise to make
+ * direct use of the structure members.
+ */
+typedef struct xSTATIC_EVENT_GROUP
+{
+    TickType_t xDummy1;
+    StaticList_t xDummy2;
+
+    #if ( configUSE_TRACE_FACILITY == 1 )
+        UBaseType_t uxDummy3;
+    #endif
+
+    #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+        uint8_t ucDummy4;
+    #endif
+    portMUX_TYPE xDummy5;
+} StaticEventGroup_t;
+
+/*
+ * In line with software engineering best practice, especially when supplying a
+ * library that is likely to change in future versions, FreeRTOS implements a
+ * strict data hiding policy.  This means the software timer structure used
+ * internally by FreeRTOS is not accessible to application code.  However, if
+ * the application writer wants to statically allocate the memory required to
+ * create a software timer then the size of the queue object needs to be known.
+ * The StaticTimer_t structure below is provided for this purpose.  Its sizes
+ * and alignment requirements are guaranteed to match those of the genuine
+ * structure, no matter which architecture is being used, and no matter how the
+ * values in FreeRTOSConfig.h are set.  Its contents are somewhat obfuscated in
+ * the hope users will recognise that it would be unwise to make direct use of
+ * the structure members.
+ */
+typedef struct xSTATIC_TIMER
+{
+    void * pvDummy1;
+    StaticListItem_t xDummy2;
+    TickType_t xDummy3;
+    void * pvDummy5;
+    TaskFunction_t pvDummy6;
+    #if ( configUSE_TRACE_FACILITY == 1 )
+        UBaseType_t uxDummy7;
+    #endif
+    uint8_t ucDummy8;
+} StaticTimer_t;
+
+/*
+ * In line with software engineering best practice, especially when supplying a
+ * library that is likely to change in future versions, FreeRTOS implements a
+ * strict data hiding policy.  This means the stream buffer structure used
+ * internally by FreeRTOS is not accessible to application code.  However, if
+ * the application writer wants to statically allocate the memory required to
+ * create a stream buffer then the size of the stream buffer object needs to be
+ * known.  The StaticStreamBuffer_t structure below is provided for this
+ * purpose.  Its size and alignment requirements are guaranteed to match those
+ * of the genuine structure, no matter which architecture is being used, and
+ * no matter how the values in FreeRTOSConfig.h are set.  Its contents are
+ * somewhat obfuscated in the hope users will recognise that it would be unwise
+ * to make direct use of the structure members.
+ */
+typedef struct xSTATIC_STREAM_BUFFER
+{
+    size_t uxDummy1[ 4 ];
+    void * pvDummy2[ 3 ];
+    uint8_t ucDummy3;
+    #if ( configUSE_TRACE_FACILITY == 1 )
+        UBaseType_t uxDummy4;
+    #endif
+    portMUX_TYPE xDummy5;
+} StaticStreamBuffer_t;
+
+/* Message buffers are built on stream buffers. */
+typedef StaticStreamBuffer_t StaticMessageBuffer_t;
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* INC_FREERTOS_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/StackMacros.h b/tools/sdk/esp32s3/include/freertos/include/freertos/StackMacros.h
new file mode 100644
index 00000000000..8d09f10cd1d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/StackMacros.h
@@ -0,0 +1,32 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+
+#ifndef _MSC_VER /* Visual Studio doesn't support #warning. */
+    #warning The name of this file has changed to stack_macros.h.  Please update your code accordingly.  This source file (which has the original name) will be removed in future released.
+#endif
+
+#include "stack_macros.h"
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/atomic.h b/tools/sdk/esp32s3/include/freertos/include/freertos/atomic.h
new file mode 100644
index 00000000000..a47b96723cc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/atomic.h
@@ -0,0 +1,417 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/**
+ * @file atomic.h
+ * @brief FreeRTOS atomic operation support.
+ *
+ * This file implements atomic functions by disabling interrupts globally.
+ * Implementations with architecture specific atomic instructions can be
+ * provided under each compiler directory.
+ */
+
+#ifndef ATOMIC_H
+#define ATOMIC_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h must appear in source files before include atomic.h"
+#endif
+
+/* Standard includes. */
+#include <stdint.h>
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*
+ * Port specific definitions -- entering/exiting critical section.
+ * Refer template -- ./lib/FreeRTOS/portable/Compiler/Arch/portmacro.h
+ *
+ * Every call to ATOMIC_EXIT_CRITICAL() must be closely paired with
+ * ATOMIC_ENTER_CRITICAL().
+ *
+ */
+#if defined( portSET_INTERRUPT_MASK_FROM_ISR )
+
+/* Nested interrupt scheme is supported in this port. */
+    #define ATOMIC_ENTER_CRITICAL() \
+    UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR()
+
+    #define ATOMIC_EXIT_CRITICAL() \
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType )
+
+#else
+
+/* Nested interrupt scheme is NOT supported in this port. */
+    #define ATOMIC_ENTER_CRITICAL()    portENTER_CRITICAL()
+    #define ATOMIC_EXIT_CRITICAL()     portEXIT_CRITICAL()
+
+#endif /* portSET_INTERRUPT_MASK_FROM_ISR() */
+
+/*
+ * Port specific definition -- "always inline".
+ * Inline is compiler specific, and may not always get inlined depending on your
+ * optimization level.  Also, inline is considered as performance optimization
+ * for atomic.  Thus, if portFORCE_INLINE is not provided by portmacro.h,
+ * instead of resulting error, simply define it away.
+ */
+#ifndef portFORCE_INLINE
+    #define portFORCE_INLINE
+#endif
+
+#define ATOMIC_COMPARE_AND_SWAP_SUCCESS    0x1U     /**< Compare and swap succeeded, swapped. */
+#define ATOMIC_COMPARE_AND_SWAP_FAILURE    0x0U     /**< Compare and swap failed, did not swap. */
+
+/*----------------------------- Swap && CAS ------------------------------*/
+
+/**
+ * Atomic compare-and-swap
+ *
+ * @brief Performs an atomic compare-and-swap operation on the specified values.
+ *
+ * @param[in, out] pulDestination  Pointer to memory location from where value is
+ *                               to be loaded and checked.
+ * @param[in] ulExchange         If condition meets, write this value to memory.
+ * @param[in] ulComparand        Swap condition.
+ *
+ * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
+ *
+ * @note This function only swaps *pulDestination with ulExchange, if previous
+ *       *pulDestination value equals ulComparand.
+ */
+static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination,
+                                                            uint32_t ulExchange,
+                                                            uint32_t ulComparand )
+{
+    uint32_t ulReturnValue;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        if( *pulDestination == ulComparand )
+        {
+            *pulDestination = ulExchange;
+            ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
+        }
+        else
+        {
+            ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
+        }
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulReturnValue;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic swap (pointers)
+ *
+ * @brief Atomically sets the address pointed to by *ppvDestination to the value
+ *        of *pvExchange.
+ *
+ * @param[in, out] ppvDestination  Pointer to memory location from where a pointer
+ *                                 value is to be loaded and written back to.
+ * @param[in] pvExchange           Pointer value to be written to *ppvDestination.
+ *
+ * @return The initial value of *ppvDestination.
+ */
+static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination,
+                                                        void * pvExchange )
+{
+    void * pReturnValue;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        pReturnValue = *ppvDestination;
+        *ppvDestination = pvExchange;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return pReturnValue;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic compare-and-swap (pointers)
+ *
+ * @brief Performs an atomic compare-and-swap operation on the specified pointer
+ *        values.
+ *
+ * @param[in, out] ppvDestination  Pointer to memory location from where a pointer
+ *                                 value is to be loaded and checked.
+ * @param[in] pvExchange           If condition meets, write this value to memory.
+ * @param[in] pvComparand          Swap condition.
+ *
+ * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
+ *
+ * @note This function only swaps *ppvDestination with pvExchange, if previous
+ *       *ppvDestination value equals pvComparand.
+ */
+static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination,
+                                                                    void * pvExchange,
+                                                                    void * pvComparand )
+{
+    uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        if( *ppvDestination == pvComparand )
+        {
+            *ppvDestination = pvExchange;
+            ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
+        }
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulReturnValue;
+}
+
+
+/*----------------------------- Arithmetic ------------------------------*/
+
+/**
+ * Atomic add
+ *
+ * @brief Atomically adds count to the value of the specified pointer points to.
+ *
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
+ *                         loaded and written back to.
+ * @param[in] ulCount      Value to be added to *pulAddend.
+ *
+ * @return previous *pulAddend value.
+ */
+static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend,
+                                                 uint32_t ulCount )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulAddend;
+        *pulAddend += ulCount;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic subtract
+ *
+ * @brief Atomically subtracts count from the value of the specified pointer
+ *        pointers to.
+ *
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
+ *                         loaded and written back to.
+ * @param[in] ulCount      Value to be subtract from *pulAddend.
+ *
+ * @return previous *pulAddend value.
+ */
+static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend,
+                                                      uint32_t ulCount )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulAddend;
+        *pulAddend -= ulCount;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic increment
+ *
+ * @brief Atomically increments the value of the specified pointer points to.
+ *
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
+ *                         loaded and written back to.
+ *
+ * @return *pulAddend value before increment.
+ */
+static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulAddend;
+        *pulAddend += 1;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic decrement
+ *
+ * @brief Atomically decrements the value of the specified pointer points to
+ *
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
+ *                         loaded and written back to.
+ *
+ * @return *pulAddend value before decrement.
+ */
+static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulAddend;
+        *pulAddend -= 1;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+
+/*----------------------------- Bitwise Logical ------------------------------*/
+
+/**
+ * Atomic OR
+ *
+ * @brief Performs an atomic OR operation on the specified values.
+ *
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
+ *                                to be loaded and written back to.
+ * @param [in] ulValue            Value to be ORed with *pulDestination.
+ *
+ * @return The original value of *pulDestination.
+ */
+static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination,
+                                                uint32_t ulValue )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulDestination;
+        *pulDestination |= ulValue;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic AND
+ *
+ * @brief Performs an atomic AND operation on the specified values.
+ *
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
+ *                                to be loaded and written back to.
+ * @param [in] ulValue            Value to be ANDed with *pulDestination.
+ *
+ * @return The original value of *pulDestination.
+ */
+static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination,
+                                                 uint32_t ulValue )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulDestination;
+        *pulDestination &= ulValue;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic NAND
+ *
+ * @brief Performs an atomic NAND operation on the specified values.
+ *
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
+ *                                to be loaded and written back to.
+ * @param [in] ulValue            Value to be NANDed with *pulDestination.
+ *
+ * @return The original value of *pulDestination.
+ */
+static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination,
+                                                  uint32_t ulValue )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulDestination;
+        *pulDestination = ~( ulCurrent & ulValue );
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic XOR
+ *
+ * @brief Performs an atomic XOR operation on the specified values.
+ *
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
+ *                                to be loaded and written back to.
+ * @param [in] ulValue            Value to be XORed with *pulDestination.
+ *
+ * @return The original value of *pulDestination.
+ */
+static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination,
+                                                 uint32_t ulValue )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulDestination;
+        *pulDestination ^= ulValue;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* ATOMIC_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/croutine.h b/tools/sdk/esp32s3/include/freertos/include/freertos/croutine.h
new file mode 100644
index 00000000000..99322d219f2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/croutine.h
@@ -0,0 +1,787 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef CO_ROUTINE_H
+#define CO_ROUTINE_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h must appear in source files before include croutine.h"
+#endif
+
+#include "list.h"
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/* Used to hide the implementation of the co-routine control block.  The
+ * control block structure however has to be included in the header due to
+ * the macro implementation of the co-routine functionality. */
+typedef void * CoRoutineHandle_t;
+
+/* Defines the prototype to which co-routine functions must conform. */
+typedef void (* crCOROUTINE_CODE)( CoRoutineHandle_t,
+                                   UBaseType_t );
+
+typedef struct corCoRoutineControlBlock
+{
+    crCOROUTINE_CODE pxCoRoutineFunction;
+    ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */
+    ListItem_t xEventListItem;   /*< List item used to place the CRCB in event lists. */
+    UBaseType_t uxPriority;      /*< The priority of the co-routine in relation to other co-routines. */
+    UBaseType_t uxIndex;         /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */
+    uint16_t uxState;            /*< Used internally by the co-routine implementation. */
+} CRCB_t;                        /* Co-routine control block.  Note must be identical in size down to uxPriority with TCB_t. */
+
+/**
+ * @cond
+ * croutine. h
+ * @code{c}
+ * BaseType_t xCoRoutineCreate(
+ *                               crCOROUTINE_CODE pxCoRoutineCode,
+ *                               UBaseType_t uxPriority,
+ *                               UBaseType_t uxIndex
+ *                             );
+ * @endcode
+ * @endcond
+ *
+ * Create a new co-routine and add it to the list of co-routines that are
+ * ready to run.
+ *
+ * @param pxCoRoutineCode Pointer to the co-routine function.  Co-routine
+ * functions require special syntax - see the co-routine section of the WEB
+ * documentation for more information.
+ *
+ * @param uxPriority The priority with respect to other co-routines at which
+ *  the co-routine will run.
+ *
+ * @param uxIndex Used to distinguish between different co-routines that
+ * execute the same function.  See the example below and the co-routine section
+ * of the WEB documentation for further information.
+ *
+ * @return pdPASS if the co-routine was successfully created and added to a ready
+ * list, otherwise an error code defined with ProjDefs.h.
+ *
+ * Example usage:
+ * @code{c}
+ * // Co-routine to be created.
+ * void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * // This may not be necessary for const variables.
+ * static const char cLedToFlash[ 2 ] = { 5, 6 };
+ * static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };
+ *
+ *   // Must start every co-routine with a call to crSTART();
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *       // This co-routine just delays for a fixed period, then toggles
+ *       // an LED.  Two co-routines are created using this function, so
+ *       // the uxIndex parameter is used to tell the co-routine which
+ *       // LED to flash and how int32_t to delay.  This assumes xQueue has
+ *       // already been created.
+ *       vParTestToggleLED( cLedToFlash[ uxIndex ] );
+ *       crDELAY( xHandle, uxFlashRates[ uxIndex ] );
+ *   }
+ *
+ *   // Must end every co-routine with a call to crEND();
+ *   crEND();
+ * }
+ *
+ * // Function that creates two co-routines.
+ * void vOtherFunction( void )
+ * {
+ * uint8_t ucParameterToPass;
+ * TaskHandle_t xHandle;
+ *
+ *   // Create two co-routines at priority 0.  The first is given index 0
+ *   // so (from the code above) toggles LED 5 every 200 ticks.  The second
+ *   // is given index 1 so toggles LED 6 every 400 ticks.
+ *   for( uxIndex = 0; uxIndex < 2; uxIndex++ )
+ *   {
+ *       xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
+ *   }
+ * }
+ * @endcode
+ * @cond
+ * \defgroup xCoRoutineCreate xCoRoutineCreate
+ * @endcond
+ * \ingroup Tasks
+ */
+BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
+                             UBaseType_t uxPriority,
+                             UBaseType_t uxIndex );
+
+
+/**
+ * @cond
+ * croutine. h
+ * @code{c}
+ * void vCoRoutineSchedule( void );
+ * @endcode
+ * @endcond
+ * Run a co-routine.
+ *
+ * vCoRoutineSchedule() executes the highest priority co-routine that is able
+ * to run.  The co-routine will execute until it either blocks, yields or is
+ * preempted by a task.  Co-routines execute cooperatively so one
+ * co-routine cannot be preempted by another, but can be preempted by a task.
+ *
+ * If an application comprises of both tasks and co-routines then
+ * vCoRoutineSchedule should be called from the idle task (in an idle task
+ * hook).
+ *
+ * Example usage:
+ * @code{c}
+ * // This idle task hook will schedule a co-routine each time it is called.
+ * // The rest of the idle task will execute between co-routine calls.
+ * void vApplicationIdleHook( void )
+ * {
+ *  vCoRoutineSchedule();
+ * }
+ *
+ * // Alternatively, if you do not require any other part of the idle task to
+ * // execute, the idle task hook can call vCoRoutineScheduler() within an
+ * // infinite loop.
+ * void vApplicationIdleHook( void )
+ * {
+ *  for( ;; )
+ *  {
+ *      vCoRoutineSchedule();
+ *  }
+ * }
+ * @endcode
+ * @endcode
+ * @cond
+ * \defgroup vCoRoutineSchedule vCoRoutineSchedule
+ * @endcond
+ * \ingroup Tasks
+ */
+void vCoRoutineSchedule( void );
+
+/**
+ * @cond
+ * croutine. h
+ * @code{c}
+ * crSTART( CoRoutineHandle_t xHandle );
+ * @endcode
+ * @endcond
+ *
+ * This macro MUST always be called at the start of a co-routine function.
+ *
+ * Example usage:
+ * @code{c}
+ * // Co-routine to be created.
+ * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * static int32_t ulAVariable;
+ *
+ *   // Must start every co-routine with a call to crSTART();
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *        // Co-routine functionality goes here.
+ *   }
+ *
+ *   // Must end every co-routine with a call to crEND();
+ *   crEND();
+ * }
+ * @endcode
+ * @cond
+ * \defgroup crSTART crSTART
+ * @endcond
+ * \ingroup Tasks
+ */
+#define crSTART( pxCRCB )                            \
+    switch( ( ( CRCB_t * ) ( pxCRCB ) )->uxState ) { \
+        case 0:
+
+/**
+ * @cond
+ * croutine. h
+ * @code{c}
+ * crEND();
+ * @endcode
+ * @endcond
+ *
+ * This macro MUST always be called at the end of a co-routine function.
+ *
+ * Example usage:
+ * @code{c}
+ * // Co-routine to be created.
+ * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * static int32_t ulAVariable;
+ *
+ *   // Must start every co-routine with a call to crSTART();
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *        // Co-routine functionality goes here.
+ *   }
+ *
+ *   // Must end every co-routine with a call to crEND();
+ *   crEND();
+ * }
+ * @endcode
+ * @cond
+ * \defgroup crSTART crSTART
+ * @endcond
+ * \ingroup Tasks
+ */
+#define crEND()    }
+
+/*
+ * These macros are intended for internal use by the co-routine implementation
+ * only.  The macros should not be used directly by application writers.
+ */
+#define crSET_STATE0( xHandle )                                       \
+    ( ( CRCB_t * ) ( xHandle ) )->uxState = ( __LINE__ * 2 ); return; \
+    case ( __LINE__ * 2 ):
+#define crSET_STATE1( xHandle )                                               \
+    ( ( CRCB_t * ) ( xHandle ) )->uxState = ( ( __LINE__ * 2 ) + 1 ); return; \
+    case ( ( __LINE__ * 2 ) + 1 ):
+
+/**
+ * @cond
+ * croutine. h
+ * @code{c}
+ * crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );
+ * @endcode
+ * @endcond
+ *
+ * Delay a co-routine for a fixed period of time.
+ *
+ * crDELAY can only be called from the co-routine function itself - not
+ * from within a function called by the co-routine function.  This is because
+ * co-routines do not maintain their own stack.
+ *
+ * @param xHandle The handle of the co-routine to delay.  This is the xHandle
+ * parameter of the co-routine function.
+ *
+ * @param xTickToDelay The number of ticks that the co-routine should delay
+ * for.  The actual amount of time this equates to is defined by
+ * configTICK_RATE_HZ (set in FreeRTOSConfig.h).  The constant portTICK_PERIOD_MS
+ * can be used to convert ticks to milliseconds.
+ *
+ * Example usage:
+ * @code{c}
+ * // Co-routine to be created.
+ * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * // This may not be necessary for const variables.
+ * // We are to delay for 200ms.
+ * static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS;
+ *
+ *   // Must start every co-routine with a call to crSTART();
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *      // Delay for 200ms.
+ *      crDELAY( xHandle, xDelayTime );
+ *
+ *      // Do something here.
+ *   }
+ *
+ *   // Must end every co-routine with a call to crEND();
+ *   crEND();
+ * }
+ * @endcode
+ * @cond
+ * \defgroup crDELAY crDELAY
+ * @endcond
+ * \ingroup Tasks
+ */
+#define crDELAY( xHandle, xTicksToDelay )                      \
+    if( ( xTicksToDelay ) > 0 )                                \
+    {                                                          \
+        vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \
+    }                                                          \
+    crSET_STATE0( ( xHandle ) );
+
+/**
+ * @cond
+ * @code{c}
+ * crQUEUE_SEND(
+ *                CoRoutineHandle_t xHandle,
+ *                QueueHandle_t pxQueue,
+ *                void *pvItemToQueue,
+ *                TickType_t xTicksToWait,
+ *                BaseType_t *pxResult
+ *           )
+ * @endcode
+ * @endcond
+ *
+ * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
+ * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
+ *
+ * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas
+ * xQueueSend() and xQueueReceive() can only be used from tasks.
+ *
+ * crQUEUE_SEND can only be called from the co-routine function itself - not
+ * from within a function called by the co-routine function.  This is because
+ * co-routines do not maintain their own stack.
+ *
+ * See the co-routine section of the WEB documentation for information on
+ * passing data between tasks and co-routines and between ISR's and
+ * co-routines.
+ *
+ * @param xHandle The handle of the calling co-routine.  This is the xHandle
+ * parameter of the co-routine function.
+ *
+ * @param pxQueue The handle of the queue on which the data will be posted.
+ * The handle is obtained as the return value when the queue is created using
+ * the xQueueCreate() API function.
+ *
+ * @param pvItemToQueue A pointer to the data being posted onto the queue.
+ * The number of bytes of each queued item is specified when the queue is
+ * created.  This number of bytes is copied from pvItemToQueue into the queue
+ * itself.
+ *
+ * @param xTickToDelay The number of ticks that the co-routine should block
+ * to wait for space to become available on the queue, should space not be
+ * available immediately. The actual amount of time this equates to is defined
+ * by configTICK_RATE_HZ (set in FreeRTOSConfig.h).  The constant
+ * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see example
+ * below).
+ *
+ * @param pxResult The variable pointed to by pxResult will be set to pdPASS if
+ * data was successfully posted onto the queue, otherwise it will be set to an
+ * error defined within ProjDefs.h.
+ *
+ * Example usage:
+ * @code{c}
+ * // Co-routine function that blocks for a fixed period then posts a number onto
+ * // a queue.
+ * static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * static BaseType_t xNumberToPost = 0;
+ * static BaseType_t xResult;
+ *
+ *  // Co-routines must begin with a call to crSTART().
+ *  crSTART( xHandle );
+ *
+ *  for( ;; )
+ *  {
+ *      // This assumes the queue has already been created.
+ *      crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
+ *
+ *      if( xResult != pdPASS )
+ *      {
+ *          // The message was not posted!
+ *      }
+ *
+ *      // Increment the number to be posted onto the queue.
+ *      xNumberToPost++;
+ *
+ *      // Delay for 100 ticks.
+ *      crDELAY( xHandle, 100 );
+ *  }
+ *
+ *  // Co-routines must end with a call to crEND().
+ *  crEND();
+ * }
+ * @endcode
+ * @cond
+ * \defgroup crQUEUE_SEND crQUEUE_SEND
+ * @endcond
+ * \ingroup Tasks
+ */
+#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult )           \
+    {                                                                                     \
+        *( pxResult ) = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), ( xTicksToWait ) ); \
+        if( *( pxResult ) == errQUEUE_BLOCKED )                                           \
+        {                                                                                 \
+            crSET_STATE0( ( xHandle ) );                                                  \
+            *pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 );                \
+        }                                                                                 \
+        if( *pxResult == errQUEUE_YIELD )                                                 \
+        {                                                                                 \
+            crSET_STATE1( ( xHandle ) );                                                  \
+            *pxResult = pdPASS;                                                           \
+        }                                                                                 \
+    }
+
+/**
+ * @cond
+ * croutine. h
+ * @code{c}
+ * crQUEUE_RECEIVE(
+ *                   CoRoutineHandle_t xHandle,
+ *                   QueueHandle_t pxQueue,
+ *                   void *pvBuffer,
+ *                   TickType_t xTicksToWait,
+ *                   BaseType_t *pxResult
+ *               )
+ * @endcode
+ * @endcond
+ *
+ * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
+ * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
+ *
+ * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas
+ * xQueueSend() and xQueueReceive() can only be used from tasks.
+ *
+ * crQUEUE_RECEIVE can only be called from the co-routine function itself - not
+ * from within a function called by the co-routine function.  This is because
+ * co-routines do not maintain their own stack.
+ *
+ * See the co-routine section of the WEB documentation for information on
+ * passing data between tasks and co-routines and between ISR's and
+ * co-routines.
+ *
+ * @param xHandle The handle of the calling co-routine.  This is the xHandle
+ * parameter of the co-routine function.
+ *
+ * @param pxQueue The handle of the queue from which the data will be received.
+ * The handle is obtained as the return value when the queue is created using
+ * the xQueueCreate() API function.
+ *
+ * @param pvBuffer The buffer into which the received item is to be copied.
+ * The number of bytes of each queued item is specified when the queue is
+ * created.  This number of bytes is copied into pvBuffer.
+ *
+ * @param xTickToDelay The number of ticks that the co-routine should block
+ * to wait for data to become available from the queue, should data not be
+ * available immediately. The actual amount of time this equates to is defined
+ * by configTICK_RATE_HZ (set in FreeRTOSConfig.h).  The constant
+ * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see the
+ * crQUEUE_SEND example).
+ *
+ * @param pxResult The variable pointed to by pxResult will be set to pdPASS if
+ * data was successfully retrieved from the queue, otherwise it will be set to
+ * an error code as defined within ProjDefs.h.
+ *
+ * Example usage:
+ * @code{c}
+ * // A co-routine receives the number of an LED to flash from a queue.  It
+ * // blocks on the queue until the number is received.
+ * static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * static BaseType_t xResult;
+ * static UBaseType_t uxLEDToFlash;
+ *
+ *  // All co-routines must start with a call to crSTART().
+ *  crSTART( xHandle );
+ *
+ *  for( ;; )
+ *  {
+ *      // Wait for data to become available on the queue.
+ *      crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
+ *
+ *      if( xResult == pdPASS )
+ *      {
+ *          // We received the LED to flash - flash it!
+ *          vParTestToggleLED( uxLEDToFlash );
+ *      }
+ *  }
+ *
+ *  crEND();
+ * }
+ * @endcode
+ * @cond
+ * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE
+ * @endcond
+ * \ingroup Tasks
+ */
+#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult )           \
+    {                                                                                   \
+        *( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), ( xTicksToWait ) ); \
+        if( *( pxResult ) == errQUEUE_BLOCKED )                                         \
+        {                                                                               \
+            crSET_STATE0( ( xHandle ) );                                                \
+            *( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), 0 );            \
+        }                                                                               \
+        if( *( pxResult ) == errQUEUE_YIELD )                                           \
+        {                                                                               \
+            crSET_STATE1( ( xHandle ) );                                                \
+            *( pxResult ) = pdPASS;                                                     \
+        }                                                                               \
+    }
+
+/**
+ * @cond
+ * croutine. h
+ * @code{c}
+ * crQUEUE_SEND_FROM_ISR(
+ *                          QueueHandle_t pxQueue,
+ *                          void *pvItemToQueue,
+ *                          BaseType_t xCoRoutinePreviouslyWoken
+ *                     )
+ * @endcode
+ * @endcond
+ *
+ * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
+ * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
+ * functions used by tasks.
+ *
+ * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to
+ * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and
+ * xQueueReceiveFromISR() can only be used to pass data between a task and and
+ * ISR.
+ *
+ * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue
+ * that is being used from within a co-routine.
+ *
+ * See the co-routine section of the WEB documentation for information on
+ * passing data between tasks and co-routines and between ISR's and
+ * co-routines.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto
+ * the same queue multiple times from a single interrupt.  The first call
+ * should always pass in pdFALSE.  Subsequent calls should pass in
+ * the value returned from the previous call.
+ *
+ * @return pdTRUE if a co-routine was woken by posting onto the queue.  This is
+ * used by the ISR to determine if a context switch may be required following
+ * the ISR.
+ *
+ * Example usage:
+ * @code{c}
+ * // A co-routine that blocks on a queue waiting for characters to be received.
+ * static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * char cRxedChar;
+ * BaseType_t xResult;
+ *
+ *   // All co-routines must start with a call to crSTART().
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *       // Wait for data to become available on the queue.  This assumes the
+ *       // queue xCommsRxQueue has already been created!
+ *       crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
+ *
+ *       // Was a character received?
+ *       if( xResult == pdPASS )
+ *       {
+ *           // Process the character here.
+ *       }
+ *   }
+ *
+ *   // All co-routines must end with a call to crEND().
+ *   crEND();
+ * }
+ *
+ * // An ISR that uses a queue to send characters received on a serial port to
+ * // a co-routine.
+ * void vUART_ISR( void )
+ * {
+ * char cRxedChar;
+ * BaseType_t xCRWokenByPost = pdFALSE;
+ *
+ *   // We loop around reading characters until there are none left in the UART.
+ *   while( UART_RX_REG_NOT_EMPTY() )
+ *   {
+ *       // Obtain the character from the UART.
+ *       cRxedChar = UART_RX_REG;
+ *
+ *       // Post the character onto a queue.  xCRWokenByPost will be pdFALSE
+ *       // the first time around the loop.  If the post causes a co-routine
+ *       // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
+ *       // In this manner we can ensure that if more than one co-routine is
+ *       // blocked on the queue only one is woken by this ISR no matter how
+ *       // many characters are posted to the queue.
+ *       xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
+ *   }
+ * }
+ * @endcode
+ * @cond
+ * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR
+ * @endcond
+ * \ingroup Tasks
+ */
+#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) \
+    xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) )
+
+
+/**
+ * @cond
+ * croutine. h
+ * @code{c}
+ * crQUEUE_SEND_FROM_ISR(
+ *                          QueueHandle_t pxQueue,
+ *                          void *pvBuffer,
+ *                          BaseType_t * pxCoRoutineWoken
+ *                     )
+ * @endcode
+ * @endcond
+ *
+ * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
+ * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
+ * functions used by tasks.
+ *
+ * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to
+ * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and
+ * xQueueReceiveFromISR() can only be used to pass data between a task and and
+ * ISR.
+ *
+ * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data
+ * from a queue that is being used from within a co-routine (a co-routine
+ * posted to the queue).
+ *
+ * See the co-routine section of the WEB documentation for information on
+ * passing data between tasks and co-routines and between ISR's and
+ * co-routines.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvBuffer A pointer to a buffer into which the received item will be
+ * placed.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from the queue into
+ * pvBuffer.
+ *
+ * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become
+ * available on the queue.  If crQUEUE_RECEIVE_FROM_ISR causes such a
+ * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise
+ * *pxCoRoutineWoken will remain unchanged.
+ *
+ * @return pdTRUE an item was successfully received from the queue, otherwise
+ * pdFALSE.
+ *
+ * Example usage:
+ * @code{c}
+ * // A co-routine that posts a character to a queue then blocks for a fixed
+ * // period.  The character is incremented each time.
+ * static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // cChar holds its value while this co-routine is blocked and must therefore
+ * // be declared static.
+ * static char cCharToTx = 'a';
+ * BaseType_t xResult;
+ *
+ *   // All co-routines must start with a call to crSTART().
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *       // Send the next character to the queue.
+ *       crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
+ *
+ *       if( xResult == pdPASS )
+ *       {
+ *           // The character was successfully posted to the queue.
+ *       }
+ *       else
+ *       {
+ *          // Could not post the character to the queue.
+ *       }
+ *
+ *       // Enable the UART Tx interrupt to cause an interrupt in this
+ *       // hypothetical UART.  The interrupt will obtain the character
+ *       // from the queue and send it.
+ *       ENABLE_RX_INTERRUPT();
+ *
+ *       // Increment to the next character then block for a fixed period.
+ *       // cCharToTx will maintain its value across the delay as it is
+ *       // declared static.
+ *       cCharToTx++;
+ *       if( cCharToTx > 'x' )
+ *       {
+ *          cCharToTx = 'a';
+ *       }
+ *       crDELAY( 100 );
+ *   }
+ *
+ *   // All co-routines must end with a call to crEND().
+ *   crEND();
+ * }
+ *
+ * // An ISR that uses a queue to receive characters to send on a UART.
+ * void vUART_ISR( void )
+ * {
+ * char cCharToTx;
+ * BaseType_t xCRWokenByPost = pdFALSE;
+ *
+ *   while( UART_TX_REG_EMPTY() )
+ *   {
+ *       // Are there any characters in the queue waiting to be sent?
+ *       // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
+ *       // is woken by the post - ensuring that only a single co-routine is
+ *       // woken no matter how many times we go around this loop.
+ *       if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
+ *       {
+ *           SEND_CHARACTER( cCharToTx );
+ *       }
+ *   }
+ * }
+ * @endcode
+ * @cond
+ * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR
+ * @endcond
+ * \ingroup Tasks
+ */
+#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) \
+    xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) )
+
+/*
+ * This function is intended for internal use by the co-routine macros only.
+ * The macro nature of the co-routine implementation requires that the
+ * prototype appears here.  The function should not be used by application
+ * writers.
+ *
+ * Removes the current co-routine from its ready list and places it in the
+ * appropriate delayed list.
+ */
+void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay,
+                                 List_t * pxEventList );
+
+/*
+ * This function is intended for internal use by the queue implementation only.
+ * The function should not be used by application writers.
+ *
+ * Removes the highest priority co-routine from the event list and places it in
+ * the pending ready list.
+ */
+BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList );
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* CO_ROUTINE_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/deprecated_definitions.h b/tools/sdk/esp32s3/include/freertos/include/freertos/deprecated_definitions.h
new file mode 100644
index 00000000000..d3b942666d0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/deprecated_definitions.h
@@ -0,0 +1,279 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef DEPRECATED_DEFINITIONS_H
+#define DEPRECATED_DEFINITIONS_H
+
+
+/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
+ * pre-processor definition was used to ensure the pre-processor found the correct
+ * portmacro.h file for the port being used.  That scheme was deprecated in favour
+ * of setting the compiler's include path such that it found the correct
+ * portmacro.h file - removing the need for the constant and allowing the
+ * portmacro.h file to be located anywhere in relation to the port being used.  The
+ * definitions below remain in the code for backward compatibility only.  New
+ * projects should not use them. */
+
+#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT
+    #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h"
+    typedef void ( __interrupt __far * pxISR )();
+#endif
+
+#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT
+    #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h"
+    typedef void ( __interrupt __far * pxISR )();
+#endif
+
+#ifdef GCC_MEGA_AVR
+    #include "../portable/GCC/ATMega323/portmacro.h"
+#endif
+
+#ifdef IAR_MEGA_AVR
+    #include "../portable/IAR/ATMega323/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC24_PORT
+    #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
+#endif
+
+#ifdef MPLAB_DSPIC_PORT
+    #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC18F_PORT
+    #include "../../Source/portable/MPLAB/PIC18F/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC32MX_PORT
+    #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h"
+#endif
+
+#ifdef _FEDPICC
+    #include "libFreeRTOS/Include/portmacro.h"
+#endif
+
+#ifdef SDCC_CYGNAL
+    #include "../../Source/portable/SDCC/Cygnal/portmacro.h"
+#endif
+
+#ifdef GCC_ARM7
+    #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h"
+#endif
+
+#ifdef GCC_ARM7_ECLIPSE
+    #include "portmacro.h"
+#endif
+
+#ifdef ROWLEY_LPC23xx
+    #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h"
+#endif
+
+#ifdef IAR_MSP430
+    #include "..\..\Source\portable\IAR\MSP430\portmacro.h"
+#endif
+
+#ifdef GCC_MSP430
+    #include "../../Source/portable/GCC/MSP430F449/portmacro.h"
+#endif
+
+#ifdef ROWLEY_MSP430
+    #include "../../Source/portable/Rowley/MSP430F449/portmacro.h"
+#endif
+
+#ifdef ARM7_LPC21xx_KEIL_RVDS
+    #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h"
+#endif
+
+#ifdef SAM7_GCC
+    #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h"
+#endif
+
+#ifdef SAM7_IAR
+    #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h"
+#endif
+
+#ifdef SAM9XE_IAR
+    #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h"
+#endif
+
+#ifdef LPC2000_IAR
+    #include "..\..\Source\portable\IAR\LPC2000\portmacro.h"
+#endif
+
+#ifdef STR71X_IAR
+    #include "..\..\Source\portable\IAR\STR71x\portmacro.h"
+#endif
+
+#ifdef STR75X_IAR
+    #include "..\..\Source\portable\IAR\STR75x\portmacro.h"
+#endif
+
+#ifdef STR75X_GCC
+    #include "..\..\Source\portable\GCC\STR75x\portmacro.h"
+#endif
+
+#ifdef STR91X_IAR
+    #include "..\..\Source\portable\IAR\STR91x\portmacro.h"
+#endif
+
+#ifdef GCC_H8S
+    #include "../../Source/portable/GCC/H8S2329/portmacro.h"
+#endif
+
+#ifdef GCC_AT91FR40008
+    #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h"
+#endif
+
+#ifdef RVDS_ARMCM3_LM3S102
+    #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef GCC_ARMCM3_LM3S102
+    #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef GCC_ARMCM3
+    #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef IAR_ARM_CM3
+    #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef IAR_ARMCM3_LM
+    #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef HCS12_CODE_WARRIOR
+    #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h"
+#endif
+
+#ifdef MICROBLAZE_GCC
+    #include "../../Source/portable/GCC/MicroBlaze/portmacro.h"
+#endif
+
+#ifdef TERN_EE
+    #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h"
+#endif
+
+#ifdef GCC_HCS12
+    #include "../../Source/portable/GCC/HCS12/portmacro.h"
+#endif
+
+#ifdef GCC_MCF5235
+    #include "../../Source/portable/GCC/MCF5235/portmacro.h"
+#endif
+
+#ifdef COLDFIRE_V2_GCC
+    #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h"
+#endif
+
+#ifdef COLDFIRE_V2_CODEWARRIOR
+    #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h"
+#endif
+
+#ifdef GCC_PPC405
+    #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h"
+#endif
+
+#ifdef GCC_PPC440
+    #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h"
+#endif
+
+#ifdef _16FX_SOFTUNE
+    #include "..\..\Source\portable\Softune\MB96340\portmacro.h"
+#endif
+
+#ifdef BCC_INDUSTRIAL_PC_PORT
+
+/* A short file name has to be used in place of the normal
+ * FreeRTOSConfig.h when using the Borland compiler. */
+    #include "frconfig.h"
+    #include "..\portable\BCC\16BitDOS\PC\prtmacro.h"
+    typedef void ( __interrupt __far * pxISR )();
+#endif
+
+#ifdef BCC_FLASH_LITE_186_PORT
+
+/* A short file name has to be used in place of the normal
+ * FreeRTOSConfig.h when using the Borland compiler. */
+    #include "frconfig.h"
+    #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h"
+    typedef void ( __interrupt __far * pxISR )();
+#endif
+
+#ifdef __GNUC__
+    #ifdef __AVR32_AVR32A__
+        #include "portmacro.h"
+    #endif
+#endif
+
+#ifdef __ICCAVR32__
+    #ifdef __CORE__
+        #if __CORE__ == __AVR32A__
+            #include "portmacro.h"
+        #endif
+    #endif
+#endif
+
+#ifdef __91467D
+    #include "portmacro.h"
+#endif
+
+#ifdef __96340
+    #include "portmacro.h"
+#endif
+
+
+#ifdef __IAR_V850ES_Fx3__
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx3__
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx3_L__
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx2__
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Hx2__
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_78K0R_Kx3__
+    #include "../../Source/portable/IAR/78K0R/portmacro.h"
+#endif
+
+#ifdef __IAR_78K0R_Kx3L__
+    #include "../../Source/portable/IAR/78K0R/portmacro.h"
+#endif
+
+#endif /* DEPRECATED_DEFINITIONS_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/event_groups.h b/tools/sdk/esp32s3/include/freertos/include/freertos/event_groups.h
new file mode 100644
index 00000000000..9792296e566
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/event_groups.h
@@ -0,0 +1,828 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef EVENT_GROUPS_H
+#define EVENT_GROUPS_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h" must appear in source files before "include event_groups.h"
+#endif
+
+/* FreeRTOS includes. */
+#include "timers.h"
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/**
+ * An event group is a collection of bits to which an application can assign a
+ * meaning.  For example, an application may create an event group to convey
+ * the status of various CAN bus related events in which bit 0 might mean "A CAN
+ * message has been received and is ready for processing", bit 1 might mean "The
+ * application has queued a message that is ready for sending onto the CAN
+ * network", and bit 2 might mean "It is time to send a SYNC message onto the
+ * CAN network" etc.  A task can then test the bit values to see which events
+ * are active, and optionally enter the Blocked state to wait for a specified
+ * bit or a group of specified bits to be active.  To continue the CAN bus
+ * example, a CAN controlling task can enter the Blocked state (and therefore
+ * not consume any processing time) until either bit 0, bit 1 or bit 2 are
+ * active, at which time the bit that was actually active would inform the task
+ * which action it had to take (process a received message, send a message, or
+ * send a SYNC).
+ *
+ * The event groups implementation contains intelligence to avoid race
+ * conditions that would otherwise occur were an application to use a simple
+ * variable for the same purpose.  This is particularly important with respect
+ * to when a bit within an event group is to be cleared, and when bits have to
+ * be set and then tested atomically - as is the case where event groups are
+ * used to create a synchronisation point between multiple tasks (a
+ * 'rendezvous').
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup EventGroup EventGroup
+ * @endcond
+ */
+
+
+
+/**
+ * event_groups.h
+ *
+ * Type by which event groups are referenced.  For example, a call to
+ * xEventGroupCreate() returns an EventGroupHandle_t variable that can then
+ * be used as a parameter to other event group functions.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup EventGroupHandle_t EventGroupHandle_t
+ * @endcond
+ * \ingroup EventGroup
+ */
+struct EventGroupDef_t;
+#ifdef ESP_PLATFORM // IDF-3770
+typedef void * EventGroupHandle_t;
+#else
+typedef struct EventGroupDef_t * EventGroupHandle_t;
+#endif // ESP_PLATFORM
+/*
+ * The type that holds event bits always matches TickType_t - therefore the
+ * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1,
+ * 32 bits if set to 0.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup EventBits_t EventBits_t
+ * @endcond
+ * \ingroup EventGroup
+ */
+typedef TickType_t               EventBits_t;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * event_groups.h
+ * @code{c}
+ * EventGroupHandle_t xEventGroupCreate( void );
+ * @endcode
+ * @endcond
+ *
+ * Create a new event group.
+ *
+ * Internally, within the FreeRTOS implementation, event groups use a [small]
+ * block of memory, in which the event group's structure is stored.  If an event
+ * groups is created using xEventGroupCreate() then the required memory is
+ * automatically dynamically allocated inside the xEventGroupCreate() function.
+ * (see https://www.FreeRTOS.org/a00111.html).  If an event group is created
+ * using xEventGroupCreateStatic() then the application writer must instead
+ * provide the memory that will get used by the event group.
+ * xEventGroupCreateStatic() therefore allows an event group to be created
+ * without using any dynamic memory allocation.
+ *
+ * Although event groups are not related to ticks, for internal implementation
+ * reasons the number of bits available for use in an event group is dependent
+ * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h.  If
+ * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit
+ * 0 to bit 7).  If configUSE_16_BIT_TICKS is set to 0 then each event group has
+ * 24 usable bits (bit 0 to bit 23).  The EventBits_t type is used to store
+ * event bits within an event group.
+ *
+ * @return If the event group was created then a handle to the event group is
+ * returned.  If there was insufficient FreeRTOS heap available to create the
+ * event group then NULL is returned.  See https://www.FreeRTOS.org/a00111.html
+ *
+ * Example usage:
+ * @code{c}
+ *  // Declare a variable to hold the created event group.
+ *  EventGroupHandle_t xCreatedEventGroup;
+ *
+ *  // Attempt to create the event group.
+ *  xCreatedEventGroup = xEventGroupCreate();
+ *
+ *  // Was the event group created successfully?
+ *  if( xCreatedEventGroup == NULL )
+ *  {
+ *      // The event group was not created because there was insufficient
+ *      // FreeRTOS heap available.
+ *  }
+ *  else
+ *  {
+ *      // The event group was created.
+ *  }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xEventGroupCreate xEventGroupCreate
+ * @endcond
+ * \ingroup EventGroup
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * event_groups.h
+ * @code{c}
+ * EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Create a new event group.
+ *
+ * Internally, within the FreeRTOS implementation, event groups use a [small]
+ * block of memory, in which the event group's structure is stored.  If an event
+ * groups is created using xEventGroupCreate() then the required memory is
+ * automatically dynamically allocated inside the xEventGroupCreate() function.
+ * (see https://www.FreeRTOS.org/a00111.html).  If an event group is created
+ * using xEventGroupCreateStatic() then the application writer must instead
+ * provide the memory that will get used by the event group.
+ * xEventGroupCreateStatic() therefore allows an event group to be created
+ * without using any dynamic memory allocation.
+ *
+ * Although event groups are not related to ticks, for internal implementation
+ * reasons the number of bits available for use in an event group is dependent
+ * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h.  If
+ * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit
+ * 0 to bit 7).  If configUSE_16_BIT_TICKS is set to 0 then each event group has
+ * 24 usable bits (bit 0 to bit 23).  The EventBits_t type is used to store
+ * event bits within an event group.
+ *
+ * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type
+ * StaticEventGroup_t, which will be then be used to hold the event group's data
+ * structures, removing the need for the memory to be allocated dynamically.
+ *
+ * @return If the event group was created then a handle to the event group is
+ * returned.  If pxEventGroupBuffer was NULL then NULL is returned.
+ *
+ * Example usage:
+ * @code{c}
+ *  // StaticEventGroup_t is a publicly accessible structure that has the same
+ *  // size and alignment requirements as the real event group structure.  It is
+ *  // provided as a mechanism for applications to know the size of the event
+ *  // group (which is dependent on the architecture and configuration file
+ *  // settings) without breaking the strict data hiding policy by exposing the
+ *  // real event group internals.  This StaticEventGroup_t variable is passed
+ *  // into the xSemaphoreCreateEventGroupStatic() function and is used to store
+ *  // the event group's data structures
+ *  StaticEventGroup_t xEventGroupBuffer;
+ *
+ *  // Create the event group without dynamically allocating any memory.
+ *  xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );
+ * @endcode
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * event_groups.h
+ * @code{c}
+ *  EventBits_t xEventGroupWaitBits(    EventGroupHandle_t xEventGroup,
+ *                                      const EventBits_t uxBitsToWaitFor,
+ *                                      const BaseType_t xClearOnExit,
+ *                                      const BaseType_t xWaitForAllBits,
+ *                                      const TickType_t xTicksToWait );
+ * @endcode
+ * @endcond
+ *
+ * [Potentially] block to wait for one or more bits to be set within a
+ * previously created event group.
+ *
+ * This function cannot be called from an interrupt.
+ *
+ * @param xEventGroup The event group in which the bits are being tested.  The
+ * event group must have previously been created using a call to
+ * xEventGroupCreate().
+ *
+ * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test
+ * inside the event group.  For example, to wait for bit 0 and/or bit 2 set
+ * uxBitsToWaitFor to 0x05.  To wait for bits 0 and/or bit 1 and/or bit 2 set
+ * uxBitsToWaitFor to 0x07.  Etc.
+ *
+ * @param xClearOnExit If xClearOnExit is set to pdTRUE then any bits within
+ * uxBitsToWaitFor that are set within the event group will be cleared before
+ * xEventGroupWaitBits() returns if the wait condition was met (if the function
+ * returns for a reason other than a timeout).  If xClearOnExit is set to
+ * pdFALSE then the bits set in the event group are not altered when the call to
+ * xEventGroupWaitBits() returns.
+ *
+ * @param xWaitForAllBits If xWaitForAllBits is set to pdTRUE then
+ * xEventGroupWaitBits() will return when either all the bits in uxBitsToWaitFor
+ * are set or the specified block time expires.  If xWaitForAllBits is set to
+ * pdFALSE then xEventGroupWaitBits() will return when any one of the bits set
+ * in uxBitsToWaitFor is set or the specified block time expires.  The block
+ * time is specified by the xTicksToWait parameter.
+ *
+ * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait
+ * for one/all (depending on the xWaitForAllBits value) of the bits specified by
+ * uxBitsToWaitFor to become set.
+ *
+ * @return The value of the event group at the time either the bits being waited
+ * for became set, or the block time expired.  Test the return value to know
+ * which bits were set.  If xEventGroupWaitBits() returned because its timeout
+ * expired then not all the bits being waited for will be set.  If
+ * xEventGroupWaitBits() returned because the bits it was waiting for were set
+ * then the returned value is the event group value before any bits were
+ * automatically cleared in the case that xClearOnExit parameter was set to
+ * pdTRUE.
+ *
+ * Example usage:
+ * @code{c}
+ * #define BIT_0 ( 1 << 0 )
+ * #define BIT_4 ( 1 << 4 )
+ *
+ * void aFunction( EventGroupHandle_t xEventGroup )
+ * {
+ * EventBits_t uxBits;
+ * const TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
+ *
+ *      // Wait a maximum of 100ms for either bit 0 or bit 4 to be set within
+ *      // the event group.  Clear the bits before exiting.
+ *      uxBits = xEventGroupWaitBits(
+ *                  xEventGroup,    // The event group being tested.
+ *                  BIT_0 | BIT_4,  // The bits within the event group to wait for.
+ *                  pdTRUE,         // BIT_0 and BIT_4 should be cleared before returning.
+ *                  pdFALSE,        // Don't wait for both bits, either bit will do.
+ *                  xTicksToWait ); // Wait a maximum of 100ms for either bit to be set.
+ *
+ *      if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+ *      {
+ *          // xEventGroupWaitBits() returned because both bits were set.
+ *      }
+ *      else if( ( uxBits & BIT_0 ) != 0 )
+ *      {
+ *          // xEventGroupWaitBits() returned because just BIT_0 was set.
+ *      }
+ *      else if( ( uxBits & BIT_4 ) != 0 )
+ *      {
+ *          // xEventGroupWaitBits() returned because just BIT_4 was set.
+ *      }
+ *      else
+ *      {
+ *          // xEventGroupWaitBits() returned because xTicksToWait ticks passed
+ *          // without either BIT_0 or BIT_4 becoming set.
+ *      }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xEventGroupWaitBits xEventGroupWaitBits
+ * @endcond
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
+                                 const EventBits_t uxBitsToWaitFor,
+                                 const BaseType_t xClearOnExit,
+                                 const BaseType_t xWaitForAllBits,
+                                 TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * event_groups.h
+ * @code{c}
+ *  EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );
+ * @endcode
+ * @endcond
+ *
+ * Clear bits within an event group.  This function cannot be called from an
+ * interrupt.
+ *
+ * @param xEventGroup The event group in which the bits are to be cleared.
+ *
+ * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear
+ * in the event group.  For example, to clear bit 3 only, set uxBitsToClear to
+ * 0x08.  To clear bit 3 and bit 0 set uxBitsToClear to 0x09.
+ *
+ * @return The value of the event group before the specified bits were cleared.
+ *
+ * Example usage:
+ * @code{c}
+ * #define BIT_0 ( 1 << 0 )
+ * #define BIT_4 ( 1 << 4 )
+ *
+ * void aFunction( EventGroupHandle_t xEventGroup )
+ * {
+ * EventBits_t uxBits;
+ *
+ *      // Clear bit 0 and bit 4 in xEventGroup.
+ *      uxBits = xEventGroupClearBits(
+ *                              xEventGroup,    // The event group being updated.
+ *                              BIT_0 | BIT_4 );// The bits being cleared.
+ *
+ *      if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+ *      {
+ *          // Both bit 0 and bit 4 were set before xEventGroupClearBits() was
+ *          // called.  Both will now be clear (not set).
+ *      }
+ *      else if( ( uxBits & BIT_0 ) != 0 )
+ *      {
+ *          // Bit 0 was set before xEventGroupClearBits() was called.  It will
+ *          // now be clear.
+ *      }
+ *      else if( ( uxBits & BIT_4 ) != 0 )
+ *      {
+ *          // Bit 4 was set before xEventGroupClearBits() was called.  It will
+ *          // now be clear.
+ *      }
+ *      else
+ *      {
+ *          // Neither bit 0 nor bit 4 were set in the first place.
+ *      }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xEventGroupClearBits xEventGroupClearBits
+ * @endcond
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
+                                  const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * event_groups.h
+ * @code{c}
+ *  BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
+ * @endcode
+ * @endcond
+ *
+ * A version of xEventGroupClearBits() that can be called from an interrupt.
+ *
+ * Setting bits in an event group is not a deterministic operation because there
+ * are an unknown number of tasks that may be waiting for the bit or bits being
+ * set.  FreeRTOS does not allow nondeterministic operations to be performed
+ * while interrupts are disabled, so protects event groups that are accessed
+ * from tasks by suspending the scheduler rather than disabling interrupts.  As
+ * a result event groups cannot be accessed directly from an interrupt service
+ * routine.  Therefore xEventGroupClearBitsFromISR() sends a message to the
+ * timer task to have the clear operation performed in the context of the timer
+ * task.
+ *
+ * @param xEventGroup The event group in which the bits are to be cleared.
+ *
+ * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear.
+ * For example, to clear bit 3 only, set uxBitsToClear to 0x08.  To clear bit 3
+ * and bit 0 set uxBitsToClear to 0x09.
+ *
+ * @return If the request to execute the function was posted successfully then
+ * pdPASS is returned, otherwise pdFALSE is returned.  pdFALSE will be returned
+ * if the timer service queue was full.
+ *
+ * Example usage:
+ * @code{c}
+ * #define BIT_0 ( 1 << 0 )
+ * #define BIT_4 ( 1 << 4 )
+ *
+ * // An event group which it is assumed has already been created by a call to
+ * // xEventGroupCreate().
+ * EventGroupHandle_t xEventGroup;
+ *
+ * void anInterruptHandler( void )
+ * {
+ *      // Clear bit 0 and bit 4 in xEventGroup.
+ *      xResult = xEventGroupClearBitsFromISR(
+ *                          xEventGroup,     // The event group being updated.
+ *                          BIT_0 | BIT_4 ); // The bits being set.
+ *
+ *      if( xResult == pdPASS )
+ *      {
+ *          // The message was posted successfully.
+ *      }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR
+ * @endcond
+ * \ingroup EventGroup
+ */
+#if ( configUSE_TRACE_FACILITY == 1 )
+    BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup,
+                                            const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
+#else
+    #define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) \
+    xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL )
+#endif
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * event_groups.h
+ * @code{c}
+ *  EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
+ * @endcode
+ * @endcond
+ *
+ * Set bits within an event group.
+ * This function cannot be called from an interrupt.  xEventGroupSetBitsFromISR()
+ * is a version that can be called from an interrupt.
+ *
+ * Setting bits in an event group will automatically unblock tasks that are
+ * blocked waiting for the bits.
+ *
+ * @param xEventGroup The event group in which the bits are to be set.
+ *
+ * @param uxBitsToSet A bitwise value that indicates the bit or bits to set.
+ * For example, to set bit 3 only, set uxBitsToSet to 0x08.  To set bit 3
+ * and bit 0 set uxBitsToSet to 0x09.
+ *
+ * @return The value of the event group at the time the call to
+ * xEventGroupSetBits() returns.  There are two reasons why the returned value
+ * might have the bits specified by the uxBitsToSet parameter cleared.  First,
+ * if setting a bit results in a task that was waiting for the bit leaving the
+ * blocked state then it is possible the bit will be cleared automatically
+ * (see the xClearBitOnExit parameter of xEventGroupWaitBits()).  Second, any
+ * unblocked (or otherwise Ready state) task that has a priority above that of
+ * the task that called xEventGroupSetBits() will execute and may change the
+ * event group value before the call to xEventGroupSetBits() returns.
+ *
+ * Example usage:
+ * @code{c}
+ * #define BIT_0 ( 1 << 0 )
+ * #define BIT_4 ( 1 << 4 )
+ *
+ * void aFunction( EventGroupHandle_t xEventGroup )
+ * {
+ * EventBits_t uxBits;
+ *
+ *      // Set bit 0 and bit 4 in xEventGroup.
+ *      uxBits = xEventGroupSetBits(
+ *                          xEventGroup,    // The event group being updated.
+ *                          BIT_0 | BIT_4 );// The bits being set.
+ *
+ *      if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+ *      {
+ *          // Both bit 0 and bit 4 remained set when the function returned.
+ *      }
+ *      else if( ( uxBits & BIT_0 ) != 0 )
+ *      {
+ *          // Bit 0 remained set when the function returned, but bit 4 was
+ *          // cleared.  It might be that bit 4 was cleared automatically as a
+ *          // task that was waiting for bit 4 was removed from the Blocked
+ *          // state.
+ *      }
+ *      else if( ( uxBits & BIT_4 ) != 0 )
+ *      {
+ *          // Bit 4 remained set when the function returned, but bit 0 was
+ *          // cleared.  It might be that bit 0 was cleared automatically as a
+ *          // task that was waiting for bit 0 was removed from the Blocked
+ *          // state.
+ *      }
+ *      else
+ *      {
+ *          // Neither bit 0 nor bit 4 remained set.  It might be that a task
+ *          // was waiting for both of the bits to be set, and the bits were
+ *          // cleared as the task left the Blocked state.
+ *      }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xEventGroupSetBits xEventGroupSetBits
+ * @endcond
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
+                                const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * event_groups.h
+ * @code{c}
+ *  BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * A version of xEventGroupSetBits() that can be called from an interrupt.
+ *
+ * Setting bits in an event group is not a deterministic operation because there
+ * are an unknown number of tasks that may be waiting for the bit or bits being
+ * set.  FreeRTOS does not allow nondeterministic operations to be performed in
+ * interrupts or from critical sections.  Therefore xEventGroupSetBitsFromISR()
+ * sends a message to the timer task to have the set operation performed in the
+ * context of the timer task - where a scheduler lock is used in place of a
+ * critical section.
+ *
+ * @param xEventGroup The event group in which the bits are to be set.
+ *
+ * @param uxBitsToSet A bitwise value that indicates the bit or bits to set.
+ * For example, to set bit 3 only, set uxBitsToSet to 0x08.  To set bit 3
+ * and bit 0 set uxBitsToSet to 0x09.
+ *
+ * @param pxHigherPriorityTaskWoken As mentioned above, calling this function
+ * will result in a message being sent to the timer daemon task.  If the
+ * priority of the timer daemon task is higher than the priority of the
+ * currently running task (the task the interrupt interrupted) then
+ * *pxHigherPriorityTaskWoken will be set to pdTRUE by
+ * xEventGroupSetBitsFromISR(), indicating that a context switch should be
+ * requested before the interrupt exits.  For that reason
+ * *pxHigherPriorityTaskWoken must be initialised to pdFALSE.  See the
+ * example code below.
+ *
+ * @return If the request to execute the function was posted successfully then
+ * pdPASS is returned, otherwise pdFALSE is returned.  pdFALSE will be returned
+ * if the timer service queue was full.
+ *
+ * Example usage:
+ * @code{c}
+ * #define BIT_0 ( 1 << 0 )
+ * #define BIT_4 ( 1 << 4 )
+ *
+ * // An event group which it is assumed has already been created by a call to
+ * // xEventGroupCreate().
+ * EventGroupHandle_t xEventGroup;
+ *
+ * void anInterruptHandler( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken, xResult;
+ *
+ *      // xHigherPriorityTaskWoken must be initialised to pdFALSE.
+ *      xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *      // Set bit 0 and bit 4 in xEventGroup.
+ *      xResult = xEventGroupSetBitsFromISR(
+ *                          xEventGroup,    // The event group being updated.
+ *                          BIT_0 | BIT_4   // The bits being set.
+ *                          &xHigherPriorityTaskWoken );
+ *
+ *      // Was the message posted successfully?
+ *      if( xResult == pdPASS )
+ *      {
+ *          // If xHigherPriorityTaskWoken is now set to pdTRUE then a context
+ *          // switch should be requested.  The macro used is port specific and
+ *          // will be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() -
+ *          // refer to the documentation page for the port being used.
+ *          portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ *      }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR
+ * @endcond
+ * \ingroup EventGroup
+ */
+#if ( configUSE_TRACE_FACILITY == 1 )
+    BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup,
+                                          const EventBits_t uxBitsToSet,
+                                          BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+#else
+    #define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) \
+    xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken )
+#endif
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * event_groups.h
+ * @code{c}
+ *  EventBits_t xEventGroupSync(    EventGroupHandle_t xEventGroup,
+ *                                  const EventBits_t uxBitsToSet,
+ *                                  const EventBits_t uxBitsToWaitFor,
+ *                                  TickType_t xTicksToWait );
+ * @endcode
+ * @endcond
+ *
+ * Atomically set bits within an event group, then wait for a combination of
+ * bits to be set within the same event group.  This functionality is typically
+ * used to synchronise multiple tasks, where each task has to wait for the other
+ * tasks to reach a synchronisation point before proceeding.
+ *
+ * This function cannot be used from an interrupt.
+ *
+ * The function will return before its block time expires if the bits specified
+ * by the uxBitsToWait parameter are set, or become set within that time.  In
+ * this case all the bits specified by uxBitsToWait will be automatically
+ * cleared before the function returns.
+ *
+ * @param xEventGroup The event group in which the bits are being tested.  The
+ * event group must have previously been created using a call to
+ * xEventGroupCreate().
+ *
+ * @param uxBitsToSet The bits to set in the event group before determining
+ * if, and possibly waiting for, all the bits specified by the uxBitsToWait
+ * parameter are set.
+ *
+ * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test
+ * inside the event group.  For example, to wait for bit 0 and bit 2 set
+ * uxBitsToWaitFor to 0x05.  To wait for bits 0 and bit 1 and bit 2 set
+ * uxBitsToWaitFor to 0x07.  Etc.
+ *
+ * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait
+ * for all of the bits specified by uxBitsToWaitFor to become set.
+ *
+ * @return The value of the event group at the time either the bits being waited
+ * for became set, or the block time expired.  Test the return value to know
+ * which bits were set.  If xEventGroupSync() returned because its timeout
+ * expired then not all the bits being waited for will be set.  If
+ * xEventGroupSync() returned because all the bits it was waiting for were
+ * set then the returned value is the event group value before any bits were
+ * automatically cleared.
+ *
+ * Example usage:
+ * @code{c}
+ * // Bits used by the three tasks.
+ * #define TASK_0_BIT      ( 1 << 0 )
+ * #define TASK_1_BIT      ( 1 << 1 )
+ * #define TASK_2_BIT      ( 1 << 2 )
+ *
+ * #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )
+ *
+ * // Use an event group to synchronise three tasks.  It is assumed this event
+ * // group has already been created elsewhere.
+ * EventGroupHandle_t xEventBits;
+ *
+ * void vTask0( void *pvParameters )
+ * {
+ * EventBits_t uxReturn;
+ * TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
+ *
+ *   for( ;; )
+ *   {
+ *      // Perform task functionality here.
+ *
+ *      // Set bit 0 in the event flag to note this task has reached the
+ *      // sync point.  The other two tasks will set the other two bits defined
+ *      // by ALL_SYNC_BITS.  All three tasks have reached the synchronisation
+ *      // point when all the ALL_SYNC_BITS are set.  Wait a maximum of 100ms
+ *      // for this to happen.
+ *      uxReturn = xEventGroupSync( xEventBits, TASK_0_BIT, ALL_SYNC_BITS, xTicksToWait );
+ *
+ *      if( ( uxReturn & ALL_SYNC_BITS ) == ALL_SYNC_BITS )
+ *      {
+ *          // All three tasks reached the synchronisation point before the call
+ *          // to xEventGroupSync() timed out.
+ *      }
+ *  }
+ * }
+ *
+ * void vTask1( void *pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *      // Perform task functionality here.
+ *
+ *      // Set bit 1 in the event flag to note this task has reached the
+ *      // synchronisation point.  The other two tasks will set the other two
+ *      // bits defined by ALL_SYNC_BITS.  All three tasks have reached the
+ *      // synchronisation point when all the ALL_SYNC_BITS are set.  Wait
+ *      // indefinitely for this to happen.
+ *      xEventGroupSync( xEventBits, TASK_1_BIT, ALL_SYNC_BITS, portMAX_DELAY );
+ *
+ *      // xEventGroupSync() was called with an indefinite block time, so
+ *      // this task will only reach here if the synchronisation was made by all
+ *      // three tasks, so there is no need to test the return value.
+ *   }
+ * }
+ *
+ * void vTask2( void *pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *      // Perform task functionality here.
+ *
+ *      // Set bit 2 in the event flag to note this task has reached the
+ *      // synchronisation point.  The other two tasks will set the other two
+ *      // bits defined by ALL_SYNC_BITS.  All three tasks have reached the
+ *      // synchronisation point when all the ALL_SYNC_BITS are set.  Wait
+ *      // indefinitely for this to happen.
+ *      xEventGroupSync( xEventBits, TASK_2_BIT, ALL_SYNC_BITS, portMAX_DELAY );
+ *
+ *      // xEventGroupSync() was called with an indefinite block time, so
+ *      // this task will only reach here if the synchronisation was made by all
+ *      // three tasks, so there is no need to test the return value.
+ *  }
+ * }
+ *
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xEventGroupSync xEventGroupSync
+ * @endcond
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
+                             const EventBits_t uxBitsToSet,
+                             const EventBits_t uxBitsToWaitFor,
+                             TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * event_groups.h
+ * @code{c}
+ *  EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );
+ * @endcode
+ * @endcond
+ *
+ * Returns the current value of the bits in an event group.  This function
+ * cannot be used from an interrupt.
+ *
+ * @param xEventGroup The event group being queried.
+ *
+ * @return The event group bits at the time xEventGroupGetBits() was called.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xEventGroupGetBits xEventGroupGetBits
+ * @endcond
+ * \ingroup EventGroup
+ */
+#define xEventGroupGetBits( xEventGroup )    xEventGroupClearBits( xEventGroup, 0 )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * event_groups.h
+ * @code{c}
+ *  EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
+ * @endcode
+ * @endcond
+ *
+ * A version of xEventGroupGetBits() that can be called from an ISR.
+ *
+ * @param xEventGroup The event group being queried.
+ *
+ * @return The event group bits at the time xEventGroupGetBitsFromISR() was called.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR
+ * @endcond
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * event_groups.h
+ * @code{c}
+ *  void xEventGroupDelete( EventGroupHandle_t xEventGroup );
+ * @endcode
+ * @endcond
+ *
+ * Delete an event group that was previously created by a call to
+ * xEventGroupCreate().  Tasks that are blocked on the event group will be
+ * unblocked and obtain 0 as the event group's value.
+ *
+ * @param xEventGroup The event group being deleted.
+ */
+void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
+
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
+
+/* For internal use only. */
+void vEventGroupSetBitsCallback( void * pvEventGroup,
+                                 const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION;
+void vEventGroupClearBitsCallback( void * pvEventGroup,
+                                   const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;
+
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+    UBaseType_t uxEventGroupGetNumber( void * xEventGroup ) PRIVILEGED_FUNCTION;
+    void vEventGroupSetNumber( void * xEventGroup,
+                               UBaseType_t uxEventGroupNumber ) PRIVILEGED_FUNCTION;
+#endif
+
+/** @endcond */
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* EVENT_GROUPS_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/list.h b/tools/sdk/esp32s3/include/freertos/include/freertos/list.h
new file mode 100644
index 00000000000..f76328f8e03
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/list.h
@@ -0,0 +1,416 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/*
+ * This is the list implementation used by the scheduler.  While it is tailored
+ * heavily for the schedulers needs, it is also available for use by
+ * application code.
+ *
+ * list_ts can only store pointers to list_item_ts.  Each ListItem_t contains a
+ * numeric value (xItemValue).  Most of the time the lists are sorted in
+ * descending item value order.
+ *
+ * Lists are created already containing one list item.  The value of this
+ * item is the maximum possible that can be stored, it is therefore always at
+ * the end of the list and acts as a marker.  The list member pxHead always
+ * points to this marker - even though it is at the tail of the list.  This
+ * is because the tail contains a wrap back pointer to the true head of
+ * the list.
+ *
+ * In addition to it's value, each list item contains a pointer to the next
+ * item in the list (pxNext), a pointer to the list it is in (pxContainer)
+ * and a pointer to back to the object that contains it.  These later two
+ * pointers are included for efficiency of list manipulation.  There is
+ * effectively a two way link between the object containing the list item and
+ * the list item itself.
+ *
+ *
+ * \page ListIntroduction List Implementation
+ * \ingroup FreeRTOSIntro
+ */
+
+#ifndef INC_FREERTOS_H
+    #error "FreeRTOS.h must be included before list.h"
+#endif
+
+#ifndef LIST_H
+#define LIST_H
+
+/*
+ * The list structure members are modified from within interrupts, and therefore
+ * by rights should be declared volatile.  However, they are only modified in a
+ * functionally atomic way (within critical sections of with the scheduler
+ * suspended) and are either passed by reference into a function or indexed via
+ * a volatile variable.  Therefore, in all use cases tested so far, the volatile
+ * qualifier can be omitted in order to provide a moderate performance
+ * improvement without adversely affecting functional behaviour.  The assembly
+ * instructions generated by the IAR, ARM and GCC compilers when the respective
+ * compiler's options were set for maximum optimisation has been inspected and
+ * deemed to be as intended.  That said, as compiler technology advances, and
+ * especially if aggressive cross module optimisation is used (a use case that
+ * has not been exercised to any great extend) then it is feasible that the
+ * volatile qualifier will be needed for correct optimisation.  It is expected
+ * that a compiler removing essential code because, without the volatile
+ * qualifier on the list structure members and with aggressive cross module
+ * optimisation, the compiler deemed the code unnecessary will result in
+ * complete and obvious failure of the scheduler.  If this is ever experienced
+ * then the volatile qualifier can be inserted in the relevant places within the
+ * list structures by simply defining configLIST_VOLATILE to volatile in
+ * FreeRTOSConfig.h (as per the example at the bottom of this comment block).
+ * If configLIST_VOLATILE is not defined then the preprocessor directives below
+ * will simply #define configLIST_VOLATILE away completely.
+ *
+ * To use volatile list structure members then add the following line to
+ * FreeRTOSConfig.h (without the quotes):
+ * "#define configLIST_VOLATILE volatile"
+ */
+#ifndef configLIST_VOLATILE
+    #define configLIST_VOLATILE
+#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/* Macros that can be used to place known values within the list structures,
+ * then check that the known values do not get corrupted during the execution of
+ * the application.   These may catch the list data structures being overwritten in
+ * memory.  They will not catch data errors caused by incorrect configuration or
+ * use of FreeRTOS.*/
+#if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 )
+    /* Define the macros to do nothing. */
+    #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE
+    #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE
+    #define listFIRST_LIST_INTEGRITY_CHECK_VALUE
+    #define listSECOND_LIST_INTEGRITY_CHECK_VALUE
+    #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
+    #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
+    #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )
+    #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )
+    #define listTEST_LIST_ITEM_INTEGRITY( pxItem )
+    #define listTEST_LIST_INTEGRITY( pxList )
+#else /* if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) */
+    /* Define macros that add new members into the list structures. */
+    #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE     TickType_t xListItemIntegrityValue1;
+    #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE    TickType_t xListItemIntegrityValue2;
+    #define listFIRST_LIST_INTEGRITY_CHECK_VALUE          TickType_t xListIntegrityValue1;
+    #define listSECOND_LIST_INTEGRITY_CHECK_VALUE         TickType_t xListIntegrityValue2;
+
+/* Define macros that set the new structure members to known values. */
+    #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )     ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
+    #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )    ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
+    #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )              ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
+    #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )              ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
+
+/* Define macros that will assert if one of the structure members does not
+ * contain its expected value. */
+    #define listTEST_LIST_ITEM_INTEGRITY( pxItem )                      configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
+    #define listTEST_LIST_INTEGRITY( pxList )                           configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
+#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */
+
+
+/*
+ * Definition of the only type of object that a list can contain.
+ */
+struct xLIST;
+struct xLIST_ITEM
+{
+    listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE               /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    configLIST_VOLATILE TickType_t xItemValue;              /*< The value being listed.  In most cases this is used to sort the list in descending order. */
+    struct xLIST_ITEM * configLIST_VOLATILE pxNext;         /*< Pointer to the next ListItem_t in the list. */
+    struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;     /*< Pointer to the previous ListItem_t in the list. */
+    void * pvOwner;                                         /*< Pointer to the object (normally a TCB) that contains the list item.  There is therefore a two way link between the object containing the list item and the list item itself. */
+    struct xLIST * configLIST_VOLATILE pxContainer;         /*< Pointer to the list in which this list item is placed (if any). */
+    listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE              /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+};
+typedef struct xLIST_ITEM ListItem_t;                       /* For some reason lint wants this as two separate definitions. */
+
+struct xMINI_LIST_ITEM
+{
+    listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE     /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    configLIST_VOLATILE TickType_t xItemValue;
+    struct xLIST_ITEM * configLIST_VOLATILE pxNext;
+    struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
+};
+typedef struct xMINI_LIST_ITEM MiniListItem_t;
+
+/*
+ * Definition of the type of queue used by the scheduler.
+ */
+typedef struct xLIST
+{
+    listFIRST_LIST_INTEGRITY_CHECK_VALUE          /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    volatile UBaseType_t uxNumberOfItems;
+    ListItem_t * configLIST_VOLATILE pxIndex;     /*< Used to walk through the list.  Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
+    MiniListItem_t xListEnd;                      /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
+    listSECOND_LIST_INTEGRITY_CHECK_VALUE         /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+} List_t;
+
+/*
+ * Access macro to set the owner of a list item.  The owner of a list item
+ * is the object (usually a TCB) that contains the list item.
+ *
+ * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
+ * \ingroup LinkedList
+ */
+#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner )    ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) )
+
+/*
+ * Access macro to get the owner of a list item.  The owner of a list item
+ * is the object (usually a TCB) that contains the list item.
+ *
+ * \page listGET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
+ * \ingroup LinkedList
+ */
+#define listGET_LIST_ITEM_OWNER( pxListItem )             ( ( pxListItem )->pvOwner )
+
+/*
+ * Access macro to set the value of the list item.  In most cases the value is
+ * used to sort the list in descending order.
+ *
+ * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE
+ * \ingroup LinkedList
+ */
+#define listSET_LIST_ITEM_VALUE( pxListItem, xValue )     ( ( pxListItem )->xItemValue = ( xValue ) )
+
+/*
+ * Access macro to retrieve the value of the list item.  The value can
+ * represent anything - for example the priority of a task, or the time at
+ * which a task should be unblocked.
+ *
+ * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
+ * \ingroup LinkedList
+ */
+#define listGET_LIST_ITEM_VALUE( pxListItem )             ( ( pxListItem )->xItemValue )
+
+/*
+ * Access macro to retrieve the value of the list item at the head of a given
+ * list.
+ *
+ * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
+ * \ingroup LinkedList
+ */
+#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList )        ( ( ( pxList )->xListEnd ).pxNext->xItemValue )
+
+/*
+ * Return the list item at the head of the list.
+ *
+ * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY
+ * \ingroup LinkedList
+ */
+#define listGET_HEAD_ENTRY( pxList )                      ( ( ( pxList )->xListEnd ).pxNext )
+
+/*
+ * Return the next list item.
+ *
+ * \page listGET_NEXT listGET_NEXT
+ * \ingroup LinkedList
+ */
+#define listGET_NEXT( pxListItem )                        ( ( pxListItem )->pxNext )
+
+/*
+ * Return the list item that marks the end of the list
+ *
+ * \page listGET_END_MARKER listGET_END_MARKER
+ * \ingroup LinkedList
+ */
+#define listGET_END_MARKER( pxList )                      ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) )
+
+/*
+ * Access macro to determine if a list contains any items.  The macro will
+ * only have the value true if the list is empty.
+ *
+ * \page listLIST_IS_EMPTY listLIST_IS_EMPTY
+ * \ingroup LinkedList
+ */
+#define listLIST_IS_EMPTY( pxList )                       ( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE )
+
+/*
+ * Access macro to return the number of items in the list.
+ */
+#define listCURRENT_LIST_LENGTH( pxList )                 ( ( pxList )->uxNumberOfItems )
+
+/*
+ * Access function to obtain the owner of the next entry in a list.
+ *
+ * The list member pxIndex is used to walk through a list.  Calling
+ * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list
+ * and returns that entry's pxOwner parameter.  Using multiple calls to this
+ * function it is therefore possible to move through every item contained in
+ * a list.
+ *
+ * The pxOwner parameter of a list item is a pointer to the object that owns
+ * the list item.  In the scheduler this is normally a task control block.
+ * The pxOwner parameter effectively creates a two way link between the list
+ * item and its owner.
+ *
+ * @param pxTCB pxTCB is set to the address of the owner of the next list item.
+ * @param pxList The list from which the next item owner is to be returned.
+ *
+ * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY
+ * \ingroup LinkedList
+ */
+#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList )                                           \
+    {                                                                                          \
+        List_t * const pxConstList = ( pxList );                                               \
+        /* Increment the index to the next item and return the item, ensuring */               \
+        /* we don't return the marker used at the end of the list.  */                         \
+        ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext;                           \
+        if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \
+        {                                                                                      \
+            ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext;                       \
+        }                                                                                      \
+        ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner;                                         \
+    }
+
+
+/*
+ * Access function to obtain the owner of the first entry in a list.  Lists
+ * are normally sorted in ascending item value order.
+ *
+ * This function returns the pxOwner member of the first item in the list.
+ * The pxOwner parameter of a list item is a pointer to the object that owns
+ * the list item.  In the scheduler this is normally a task control block.
+ * The pxOwner parameter effectively creates a two way link between the list
+ * item and its owner.
+ *
+ * @param pxList The list from which the owner of the head item is to be
+ * returned.
+ *
+ * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY
+ * \ingroup LinkedList
+ */
+#define listGET_OWNER_OF_HEAD_ENTRY( pxList )            ( ( &( ( pxList )->xListEnd ) )->pxNext->pvOwner )
+
+/*
+ * Check to see if a list item is within a list.  The list item maintains a
+ * "container" pointer that points to the list it is in.  All this macro does
+ * is check to see if the container and the list match.
+ *
+ * @param pxList The list we want to know if the list item is within.
+ * @param pxListItem The list item we want to know if is in the list.
+ * @return pdTRUE if the list item is in the list, otherwise pdFALSE.
+ */
+#define listIS_CONTAINED_WITHIN( pxList, pxListItem )    ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) )
+
+/*
+ * Return the list a list item is contained within (referenced from).
+ *
+ * @param pxListItem The list item being queried.
+ * @return A pointer to the List_t object that references the pxListItem
+ */
+#define listLIST_ITEM_CONTAINER( pxListItem )            ( ( pxListItem )->pxContainer )
+
+/*
+ * This provides a crude means of knowing if a list has been initialised, as
+ * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise()
+ * function.
+ */
+#define listLIST_IS_INITIALISED( pxList )                ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY )
+
+/*
+ * Must be called before a list is used!  This initialises all the members
+ * of the list structure and inserts the xListEnd item into the list as a
+ * marker to the back of the list.
+ *
+ * @param pxList Pointer to the list being initialised.
+ *
+ * \page vListInitialise vListInitialise
+ * \ingroup LinkedList
+ */
+void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION;
+
+/*
+ * Must be called before a list item is used.  This sets the list container to
+ * null so the item does not think that it is already contained in a list.
+ *
+ * @param pxItem Pointer to the list item being initialised.
+ *
+ * \page vListInitialiseItem vListInitialiseItem
+ * \ingroup LinkedList
+ */
+void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;
+
+/*
+ * Insert a list item into a list.  The item will be inserted into the list in
+ * a position determined by its item value (descending item value order).
+ *
+ * @param pxList The list into which the item is to be inserted.
+ *
+ * @param pxNewListItem The item that is to be placed in the list.
+ *
+ * \page vListInsert vListInsert
+ * \ingroup LinkedList
+ */
+void vListInsert( List_t * const pxList,
+                  ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
+
+/*
+ * Insert a list item into a list.  The item will be inserted in a position
+ * such that it will be the last item within the list returned by multiple
+ * calls to listGET_OWNER_OF_NEXT_ENTRY.
+ *
+ * The list member pxIndex is used to walk through a list.  Calling
+ * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list.
+ * Placing an item in a list using vListInsertEnd effectively places the item
+ * in the list position pointed to by pxIndex.  This means that every other
+ * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before
+ * the pxIndex parameter again points to the item being inserted.
+ *
+ * @param pxList The list into which the item is to be inserted.
+ *
+ * @param pxNewListItem The list item to be inserted into the list.
+ *
+ * \page vListInsertEnd vListInsertEnd
+ * \ingroup LinkedList
+ */
+void vListInsertEnd( List_t * const pxList,
+                     ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
+
+/*
+ * Remove an item from a list.  The list item has a pointer to the list that
+ * it is in, so only the list item need be passed into the function.
+ *
+ * @param uxListRemove The item to be removed.  The item will remove itself from
+ * the list pointed to by it's pxContainer parameter.
+ *
+ * @return The number of items that remain in the list after the list item has
+ * been removed.
+ *
+ * \page uxListRemove uxListRemove
+ * \ingroup LinkedList
+ */
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION;
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* ifndef LIST_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/message_buffer.h b/tools/sdk/esp32s3/include/freertos/include/freertos/message_buffer.h
new file mode 100644
index 00000000000..af5c3290b7c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/message_buffer.h
@@ -0,0 +1,873 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+
+/*
+ * Message buffers build functionality on top of FreeRTOS stream buffers.
+ * Whereas stream buffers are used to send a continuous stream of data from one
+ * task or interrupt to another, message buffers are used to send variable
+ * length discrete messages from one task or interrupt to another.  Their
+ * implementation is light weight, making them particularly suited for interrupt
+ * to task and core to core communication scenarios.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * timeout to 0.
+ *
+ * Message buffers hold variable length messages.  To enable that, when a
+ * message is written to the message buffer an additional sizeof( size_t ) bytes
+ * are also written to store the message's length (that happens internally, with
+ * the API function).  sizeof( size_t ) is typically 4 bytes on a 32-bit
+ * architecture, so writing a 10 byte message to a message buffer on a 32-bit
+ * architecture will actually reduce the available space in the message buffer
+ * by 14 bytes (10 byte are used by the message, and 4 bytes to hold the length
+ * of the message).
+ */
+
+#ifndef FREERTOS_MESSAGE_BUFFER_H
+#define FREERTOS_MESSAGE_BUFFER_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h must appear in source files before include message_buffer.h"
+#endif
+
+/* Message buffers are built onto of stream buffers. */
+#include "stream_buffer.h"
+
+/* *INDENT-OFF* */
+#if defined( __cplusplus )
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/**
+ * Type by which message buffers are referenced.  For example, a call to
+ * xMessageBufferCreate() returns an MessageBufferHandle_t variable that can
+ * then be used as a parameter to xMessageBufferSend(), xMessageBufferReceive(),
+ * etc.
+ */
+typedef void * MessageBufferHandle_t;
+
+/*-----------------------------------------------------------*/
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ *
+ * @code{c}
+ * MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes );
+ * @endcode
+ * @endcond
+ *
+ * Creates a new message buffer using dynamically allocated memory.  See
+ * xMessageBufferCreateStatic() for a version that uses statically allocated
+ * memory (memory that is allocated at compile time).
+ *
+ * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
+ * FreeRTOSConfig.h for xMessageBufferCreate() to be available.
+ *
+ * @param xBufferSizeBytes The total number of bytes (not messages) the message
+ * buffer will be able to hold at any one time.  When a message is written to
+ * the message buffer an additional sizeof( size_t ) bytes are also written to
+ * store the message's length.  sizeof( size_t ) is typically 4 bytes on a
+ * 32-bit architecture, so on most 32-bit architectures a 10 byte message will
+ * take up 14 bytes of message buffer space.
+ *
+ * @return If NULL is returned, then the message buffer cannot be created
+ * because there is insufficient heap memory available for FreeRTOS to allocate
+ * the message buffer data structures and storage area.  A non-NULL value being
+ * returned indicates that the message buffer has been created successfully -
+ * the returned value should be stored as the handle to the created message
+ * buffer.
+ *
+ * Example use:
+ * @code{c}
+ *
+ * void vAFunction( void )
+ * {
+ * MessageBufferHandle_t xMessageBuffer;
+ * const size_t xMessageBufferSizeBytes = 100;
+ *
+ *  // Create a message buffer that can hold 100 bytes.  The memory used to hold
+ *  // both the message buffer structure and the messages themselves is allocated
+ *  // dynamically.  Each message added to the buffer consumes an additional 4
+ *  // bytes which are used to hold the lengh of the message.
+ *  xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes );
+ *
+ *  if( xMessageBuffer == NULL )
+ *  {
+ *      // There was not enough heap memory space available to create the
+ *      // message buffer.
+ *  }
+ *  else
+ *  {
+ *      // The message buffer was created successfully and can now be used.
+ *  }
+ *
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xMessageBufferCreate xMessageBufferCreate
+ * @endcond
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferCreate( xBufferSizeBytes ) \
+    ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ *
+ * @code{c}
+ * MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes,
+ *                                                uint8_t *pucMessageBufferStorageArea,
+ *                                                StaticMessageBuffer_t *pxStaticMessageBuffer );
+ * @endcode
+ * @endcond
+ * Creates a new message buffer using statically allocated memory.  See
+ * xMessageBufferCreate() for a version that uses dynamically allocated memory.
+ *
+ * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
+ * pucMessageBufferStorageArea parameter.  When a message is written to the
+ * message buffer an additional sizeof( size_t ) bytes are also written to store
+ * the message's length.  sizeof( size_t ) is typically 4 bytes on a 32-bit
+ * architecture, so on most 32-bit architecture a 10 byte message will take up
+ * 14 bytes of message buffer space.  The maximum number of bytes that can be
+ * stored in the message buffer is actually (xBufferSizeBytes - 1).
+ *
+ * @param pucMessageBufferStorageArea Must point to a uint8_t array that is at
+ * least xBufferSizeBytes + 1 big.  This is the array to which messages are
+ * copied when they are written to the message buffer.
+ *
+ * @param pxStaticMessageBuffer Must point to a variable of type
+ * StaticMessageBuffer_t, which will be used to hold the message buffer's data
+ * structure.
+ *
+ * @return If the message buffer is created successfully then a handle to the
+ * created message buffer is returned. If either pucMessageBufferStorageArea or
+ * pxStaticmessageBuffer are NULL then NULL is returned.
+ *
+ * Example use:
+ * @code{c}
+ *
+ * // Used to dimension the array used to hold the messages.  The available space
+ * // will actually be one less than this, so 999.
+ * #define STORAGE_SIZE_BYTES 1000
+ *
+ * // Defines the memory that will actually hold the messages within the message
+ * // buffer.
+ * static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
+ *
+ * // The variable used to hold the message buffer structure.
+ * StaticMessageBuffer_t xMessageBufferStruct;
+ *
+ * void MyFunction( void )
+ * {
+ * MessageBufferHandle_t xMessageBuffer;
+ *
+ *  xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ),
+ *                                               ucBufferStorage,
+ *                                               &xMessageBufferStruct );
+ *
+ *  // As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer
+ *  // parameters were NULL, xMessageBuffer will not be NULL, and can be used to
+ *  // reference the created message buffer in other message buffer API calls.
+ *
+ *  // Other code that uses the message buffer can go here.
+ * }
+ *
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic
+ * @endcond
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) \
+    ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ *
+ * @code{c}
+ * size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,
+ *                         const void *pvTxData,
+ *                         size_t xDataLengthBytes,
+ *                         TickType_t xTicksToWait );
+ * @endcode
+ * @endcond
+ *
+ * Sends a discrete message to the message buffer.  The message can be any
+ * length that fits within the buffer's free space, and is copied into the
+ * buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferSend() to write to a message buffer from a task.  Use
+ * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer to which a message is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the message that is to be copied into the
+ * message buffer.
+ *
+ * @param xDataLengthBytes The length of the message.  That is, the number of
+ * bytes to copy from pvTxData into the message buffer.  When a message is
+ * written to the message buffer an additional sizeof( size_t ) bytes are also
+ * written to store the message's length.  sizeof( size_t ) is typically 4 bytes
+ * on a 32-bit architecture, so on most 32-bit architecture setting
+ * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24
+ * bytes (20 bytes of message data and 4 bytes to hold the message length).
+ *
+ * @param xTicksToWait The maximum amount of time the calling task should remain
+ * in the Blocked state to wait for enough space to become available in the
+ * message buffer, should the message buffer have insufficient space when
+ * xMessageBufferSend() is called.  The calling task will never block if
+ * xTicksToWait is zero.  The block time is specified in tick periods, so the
+ * absolute time it represents is dependent on the tick frequency.  The macro
+ * pdMS_TO_TICKS() can be used to convert a time specified in milliseconds into
+ * a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will cause
+ * the task to wait indefinitely (without timing out), provided
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  Tasks do not use any
+ * CPU time when they are in the Blocked state.
+ *
+ * @return The number of bytes written to the message buffer.  If the call to
+ * xMessageBufferSend() times out before there was enough space to write the
+ * message into the message buffer then zero is returned.  If the call did not
+ * time out then xDataLengthBytes is returned.
+ *
+ * Example use:
+ * @code{c}
+ * void vAFunction( MessageBufferHandle_t xMessageBuffer )
+ * {
+ * size_t xBytesSent;
+ * uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
+ * char *pcStringToSend = "String to send";
+ * const TickType_t x100ms = pdMS_TO_TICKS( 100 );
+ *
+ *  // Send an array to the message buffer, blocking for a maximum of 100ms to
+ *  // wait for enough space to be available in the message buffer.
+ *  xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
+ *
+ *  if( xBytesSent != sizeof( ucArrayToSend ) )
+ *  {
+ *      // The call to xMessageBufferSend() times out before there was enough
+ *      // space in the buffer for the data to be written.
+ *  }
+ *
+ *  // Send the string to the message buffer.  Return immediately if there is
+ *  // not enough space in the buffer.
+ *  xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
+ *
+ *  if( xBytesSent != strlen( pcStringToSend ) )
+ *  {
+ *      // The string could not be added to the message buffer because there was
+ *      // not enough free space in the buffer.
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xMessageBufferSend xMessageBufferSend
+ * @endcond
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) \
+    xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ *
+ * @code{c}
+ * size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,
+ *                                const void *pvTxData,
+ *                                size_t xDataLengthBytes,
+ *                                BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * Interrupt safe version of the API function that sends a discrete message to
+ * the message buffer.  The message can be any length that fits within the
+ * buffer's free space, and is copied into the buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferSend() to write to a message buffer from a task.  Use
+ * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer to which a message is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the message that is to be copied into the
+ * message buffer.
+ *
+ * @param xDataLengthBytes The length of the message.  That is, the number of
+ * bytes to copy from pvTxData into the message buffer.  When a message is
+ * written to the message buffer an additional sizeof( size_t ) bytes are also
+ * written to store the message's length.  sizeof( size_t ) is typically 4 bytes
+ * on a 32-bit architecture, so on most 32-bit architecture setting
+ * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24
+ * bytes (20 bytes of message data and 4 bytes to hold the message length).
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a message buffer will
+ * have a task blocked on it waiting for data.  Calling
+ * xMessageBufferSendFromISR() can make data available, and so cause a task that
+ * was waiting for data to leave the Blocked state.  If calling
+ * xMessageBufferSendFromISR() causes a task to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently executing task (the
+ * task that was interrupted), then, internally, xMessageBufferSendFromISR()
+ * will set *pxHigherPriorityTaskWoken to pdTRUE.  If
+ * xMessageBufferSendFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  This will
+ * ensure that the interrupt returns directly to the highest priority Ready
+ * state task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it
+ * is passed into the function.  See the code example below for an example.
+ *
+ * @return The number of bytes actually written to the message buffer.  If the
+ * message buffer didn't have enough free space for the message to be stored
+ * then 0 is returned, otherwise xDataLengthBytes is returned.
+ *
+ * Example use:
+ * @code{c}
+ * // A message buffer that has already been created.
+ * MessageBufferHandle_t xMessageBuffer;
+ *
+ * void vAnInterruptServiceRoutine( void )
+ * {
+ * size_t xBytesSent;
+ * char *pcStringToSend = "String to send";
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
+ *
+ *  // Attempt to send the string to the message buffer.
+ *  xBytesSent = xMessageBufferSendFromISR( xMessageBuffer,
+ *                                          ( void * ) pcStringToSend,
+ *                                          strlen( pcStringToSend ),
+ *                                          &xHigherPriorityTaskWoken );
+ *
+ *  if( xBytesSent != strlen( pcStringToSend ) )
+ *  {
+ *      // The string could not be added to the message buffer because there was
+ *      // not enough free space in the buffer.
+ *  }
+ *
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
+ *  // xMessageBufferSendFromISR() then a task that has a priority above the
+ *  // priority of the currently executing task was unblocked and a context
+ *  // switch should be performed to ensure the ISR returns to the unblocked
+ *  // task.  In most FreeRTOS ports this is done by simply passing
+ *  // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
+ *  // variables value, and perform the context switch if necessary.  Check the
+ *  // documentation for the port in use for port specific instructions.
+ *  portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR
+ * @endcond
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) \
+    xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ *
+ * @code{c}
+ * size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,
+ *                            void *pvRxData,
+ *                            size_t xBufferLengthBytes,
+ *                            TickType_t xTicksToWait );
+ * @endcode
+ * @endcond
+ *
+ * Receives a discrete message from a message buffer.  Messages can be of
+ * variable length and are copied out of the buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferReceive() to read from a message buffer from a task.  Use
+ * xMessageBufferReceiveFromISR() to read from a message buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer from which a message
+ * is being received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received message is
+ * to be copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData
+ * parameter.  This sets the maximum length of the message that can be received.
+ * If xBufferLengthBytes is too small to hold the next message then the message
+ * will be left in the message buffer and 0 will be returned.
+ *
+ * @param xTicksToWait The maximum amount of time the task should remain in the
+ * Blocked state to wait for a message, should the message buffer be empty.
+ * xMessageBufferReceive() will return immediately if xTicksToWait is zero and
+ * the message buffer is empty.  The block time is specified in tick periods, so
+ * the absolute time it represents is dependent on the tick frequency.  The
+ * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds
+ * into a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will
+ * cause the task to wait indefinitely (without timing out), provided
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  Tasks do not use any
+ * CPU time when they are in the Blocked state.
+ *
+ * @return The length, in bytes, of the message read from the message buffer, if
+ * any.  If xMessageBufferReceive() times out before a message became available
+ * then zero is returned.  If the length of the message is greater than
+ * xBufferLengthBytes then the message will be left in the message buffer and
+ * zero is returned.
+ *
+ * Example use:
+ * @code{c}
+ * void vAFunction( MessageBuffer_t xMessageBuffer )
+ * {
+ * uint8_t ucRxData[ 20 ];
+ * size_t xReceivedBytes;
+ * const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
+ *
+ *  // Receive the next message from the message buffer.  Wait in the Blocked
+ *  // state (so not using any CPU processing time) for a maximum of 100ms for
+ *  // a message to become available.
+ *  xReceivedBytes = xMessageBufferReceive( xMessageBuffer,
+ *                                          ( void * ) ucRxData,
+ *                                          sizeof( ucRxData ),
+ *                                          xBlockTime );
+ *
+ *  if( xReceivedBytes > 0 )
+ *  {
+ *      // A ucRxData contains a message that is xReceivedBytes long.  Process
+ *      // the message here....
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xMessageBufferReceive xMessageBufferReceive
+ * @endcond
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) \
+    xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
+
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ *
+ * @code{c}
+ * size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,
+ *                                   void *pvRxData,
+ *                                   size_t xBufferLengthBytes,
+ *                                   BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * An interrupt safe version of the API function that receives a discrete
+ * message from a message buffer.  Messages can be of variable length and are
+ * copied out of the buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferReceive() to read from a message buffer from a task.  Use
+ * xMessageBufferReceiveFromISR() to read from a message buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer from which a message
+ * is being received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received message is
+ * to be copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData
+ * parameter.  This sets the maximum length of the message that can be received.
+ * If xBufferLengthBytes is too small to hold the next message then the message
+ * will be left in the message buffer and 0 will be returned.
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a message buffer will
+ * have a task blocked on it waiting for space to become available.  Calling
+ * xMessageBufferReceiveFromISR() can make space available, and so cause a task
+ * that is waiting for space to leave the Blocked state.  If calling
+ * xMessageBufferReceiveFromISR() causes a task to leave the Blocked state, and
+ * the unblocked task has a priority higher than the currently executing task
+ * (the task that was interrupted), then, internally,
+ * xMessageBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE.
+ * If xMessageBufferReceiveFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  That will
+ * ensure the interrupt returns directly to the highest priority Ready state
+ * task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it is
+ * passed into the function.  See the code example below for an example.
+ *
+ * @return The length, in bytes, of the message read from the message buffer, if
+ * any.
+ *
+ * Example use:
+ * @code{c}
+ * // A message buffer that has already been created.
+ * MessageBuffer_t xMessageBuffer;
+ *
+ * void vAnInterruptServiceRoutine( void )
+ * {
+ * uint8_t ucRxData[ 20 ];
+ * size_t xReceivedBytes;
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
+ *
+ *  // Receive the next message from the message buffer.
+ *  xReceivedBytes = xMessageBufferReceiveFromISR( xMessageBuffer,
+ *                                                ( void * ) ucRxData,
+ *                                                sizeof( ucRxData ),
+ *                                                &xHigherPriorityTaskWoken );
+ *
+ *  if( xReceivedBytes > 0 )
+ *  {
+ *      // A ucRxData contains a message that is xReceivedBytes long.  Process
+ *      // the message here....
+ *  }
+ *
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
+ *  // xMessageBufferReceiveFromISR() then a task that has a priority above the
+ *  // priority of the currently executing task was unblocked and a context
+ *  // switch should be performed to ensure the ISR returns to the unblocked
+ *  // task.  In most FreeRTOS ports this is done by simply passing
+ *  // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
+ *  // variables value, and perform the context switch if necessary.  Check the
+ *  // documentation for the port in use for port specific instructions.
+ *  portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR
+ * @endcond
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) \
+    xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ *
+ * @code{c}
+ * void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Deletes a message buffer that was previously created using a call to
+ * xMessageBufferCreate() or xMessageBufferCreateStatic().  If the message
+ * buffer was created using dynamic memory (that is, by xMessageBufferCreate()),
+ * then the allocated memory is freed.
+ *
+ * A message buffer handle must not be used after the message buffer has been
+ * deleted.
+ *
+ * @param xMessageBuffer The handle of the message buffer to be deleted.
+ *
+ */
+#define vMessageBufferDelete( xMessageBuffer ) \
+    vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ * @code{c}
+ * BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );
+ * @endcode
+ * @endcond
+ *
+ * Tests to see if a message buffer is full.  A message buffer is full if it
+ * cannot accept any more messages, of any size, until space is made available
+ * by a message being removed from the message buffer.
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return If the message buffer referenced by xMessageBuffer is full then
+ * pdTRUE is returned.  Otherwise pdFALSE is returned.
+ */
+#define xMessageBufferIsFull( xMessageBuffer ) \
+    xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ * @code{c}
+ * BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );
+ * @endcode
+ * @endcond
+ *
+ * Tests to see if a message buffer is empty (does not contain any messages).
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return If the message buffer referenced by xMessageBuffer is empty then
+ * pdTRUE is returned.  Otherwise pdFALSE is returned.
+ *
+ */
+#define xMessageBufferIsEmpty( xMessageBuffer ) \
+    xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ * @code{c}
+ * BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Resets a message buffer to its initial empty state, discarding any message it
+ * contained.
+ *
+ * A message buffer can only be reset if there are no tasks blocked on it.
+ *
+ * @param xMessageBuffer The handle of the message buffer being reset.
+ *
+ * @return If the message buffer was reset then pdPASS is returned.  If the
+ * message buffer could not be reset because either there was a task blocked on
+ * the message queue to wait for space to become available, or to wait for a
+ * a message to be available, then pdFAIL is returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xMessageBufferReset xMessageBufferReset
+ * @endcond
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferReset( xMessageBuffer ) \
+    xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
+
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ * @code{c}
+ * size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
+ * @endcode
+ * @endcond
+ *
+ * Returns the number of bytes of free space in the message buffer.
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return The number of bytes that can be written to the message buffer before
+ * the message buffer would be full.  When a message is written to the message
+ * buffer an additional sizeof( size_t ) bytes are also written to store the
+ * message's length.  sizeof( size_t ) is typically 4 bytes on a 32-bit
+ * architecture, so if xMessageBufferSpacesAvailable() returns 10, then the size
+ * of the largest message that can be written to the message buffer is 6 bytes.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable
+ * @endcond
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferSpaceAvailable( xMessageBuffer ) \
+    xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
+#define xMessageBufferSpacesAvailable( xMessageBuffer ) \
+    xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ * @code{c}
+ * size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ) );
+ * @endcode
+ * @endcond
+ *
+ * Returns the length (in bytes) of the next message in a message buffer.
+ * Useful if xMessageBufferReceive() returned 0 because the size of the buffer
+ * passed into xMessageBufferReceive() was too small to hold the next message.
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return The length (in bytes) of the next message in the message buffer, or 0
+ * if the message buffer is empty.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes
+ * @endcond
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferNextLengthBytes( xMessageBuffer ) \
+    xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ *
+ * @code{c}
+ * BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * For advanced users only.
+ *
+ * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is sent to a message buffer or stream buffer.  If there was a task that
+ * was blocked on the message or stream buffer waiting for data to arrive then
+ * the sbSEND_COMPLETED() macro sends a notification to the task to remove it
+ * from the Blocked state.  xMessageBufferSendCompletedFromISR() does the same
+ * thing.  It is provided to enable application writers to implement their own
+ * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xMessageBuffer The handle of the stream buffer to which data was
+ * written.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xMessageBufferSendCompletedFromISR().  If calling
+ * xMessageBufferSendCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
+    xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ *
+ * @code{c}
+ * BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * For advanced users only.
+ *
+ * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is read out of a message buffer or stream buffer.  If there was a task
+ * that was blocked on the message or stream buffer waiting for data to arrive
+ * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to
+ * remove it from the Blocked state.  xMessageBufferReceiveCompletedFromISR()
+ * does the same thing.  It is provided to enable application writers to
+ * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT
+ * ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xMessageBuffer The handle of the stream buffer from which data was
+ * read.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xMessageBufferReceiveCompletedFromISR().  If calling
+ * xMessageBufferReceiveCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
+    xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
+
+/* *INDENT-OFF* */
+#if defined( __cplusplus )
+    } /* extern "C" */
+#endif
+/* *INDENT-ON* */
+
+#endif /* !defined( FREERTOS_MESSAGE_BUFFER_H ) */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/mpu_prototypes.h b/tools/sdk/esp32s3/include/freertos/include/freertos/mpu_prototypes.h
new file mode 100644
index 00000000000..ceb74f3e5bc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/mpu_prototypes.h
@@ -0,0 +1,257 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/*
+ * When the MPU is used the standard (non MPU) API functions are mapped to
+ * equivalents that start "MPU_", the prototypes for which are defined in this
+ * header files.  This will cause the application code to call the MPU_ version
+ * which wraps the non-MPU version with privilege promoting then demoting code,
+ * so the kernel code always runs will full privileges.
+ */
+
+
+#ifndef MPU_PROTOTYPES_H
+#define MPU_PROTOTYPES_H
+
+/* MPU versions of tasks.h API functions. */
+BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
+                            const char * const pcName,
+                            const uint16_t usStackDepth,
+                            void * const pvParameters,
+                            UBaseType_t uxPriority,
+                            TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
+                                    const char * const pcName,
+                                    const uint32_t ulStackDepth,
+                                    void * const pvParameters,
+                                    UBaseType_t uxPriority,
+                                    StackType_t * const puxStackBuffer,
+                                    StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
+                          const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskGetInfo( TaskHandle_t xTask,
+                       TaskStatus_t * pxTaskStatus,
+                       BaseType_t xGetFreeStackSpace,
+                       eTaskState eState ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskPrioritySet( TaskHandle_t xTask,
+                           UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskResume( TaskHandle_t xTaskToResume ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskStartScheduler( void ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSuspendAll( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTaskGetTickCount( void ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) FREERTOS_SYSTEM_CALL;
+char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask,
+                                     TaskHookFunction_t pxHookFunction ) FREERTOS_SYSTEM_CALL;
+TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
+                                            BaseType_t xIndex,
+                                            void * pvValue ) FREERTOS_SYSTEM_CALL;
+void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
+                                               BaseType_t xIndex ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
+                                             void * pvParameter ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
+                                      const UBaseType_t uxArraySize,
+                                      uint32_t * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
+uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskList( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskGetRunTimeStats( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify,
+                                   UBaseType_t uxIndexToNotify,
+                                   uint32_t ulValue,
+                                   eNotifyAction eAction,
+                                   uint32_t * pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
+                                       uint32_t ulBitsToClearOnEntry,
+                                       uint32_t ulBitsToClearOnExit,
+                                       uint32_t * pulNotificationValue,
+                                       TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
+                                      BaseType_t xClearCountOnExit,
+                                      TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask,
+                                             UBaseType_t uxIndexToClear ) FREERTOS_SYSTEM_CALL;
+uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
+                                            UBaseType_t uxIndexToClear,
+                                            uint32_t ulBitsToClear ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskIncrementTick( void ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
+                                     TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskMissedYield( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of queue.h API functions. */
+BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue,
+                                  const void * const pvItemToQueue,
+                                  TickType_t xTicksToWait,
+                                  const BaseType_t xCopyPosition ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue,
+                              void * const pvBuffer,
+                              TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue,
+                           void * const pvBuffer,
+                           TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue,
+                                    TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
+                                           StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
+                                                 const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
+                                                       const UBaseType_t uxInitialCount,
+                                                       StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex,
+                                         TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueAddToRegistry( QueueHandle_t xQueue,
+                              const char * pcName ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength,
+                                       const UBaseType_t uxItemSize,
+                                       const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
+                                             const UBaseType_t uxItemSize,
+                                             uint8_t * pucQueueStorage,
+                                             StaticQueue_t * pxStaticQueue,
+                                             const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                               QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                                    QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
+QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
+                                                const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
+                                   BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue,
+                               UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of timers.h API functions. */
+TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName,
+                                const TickType_t xTimerPeriodInTicks,
+                                const UBaseType_t uxAutoReload,
+                                void * const pvTimerID,
+                                TimerCallbackFunction_t pxCallbackFunction ) FREERTOS_SYSTEM_CALL;
+TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName,
+                                      const TickType_t xTimerPeriodInTicks,
+                                      const UBaseType_t uxAutoReload,
+                                      void * const pvTimerID,
+                                      TimerCallbackFunction_t pxCallbackFunction,
+                                      StaticTimer_t * pxTimerBuffer ) FREERTOS_SYSTEM_CALL;
+void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTimerSetTimerID( TimerHandle_t xTimer,
+                           void * pvNewID ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
+                                       void * pvParameter1,
+                                       uint32_t ulParameter2,
+                                       TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
+                              const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerCreateTimerTask( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer,
+                                     const BaseType_t xCommandID,
+                                     const TickType_t xOptionalValue,
+                                     BaseType_t * const pxHigherPriorityTaskWoken,
+                                     const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of event_group.h API functions. */
+EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL;
+EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
+                                     const EventBits_t uxBitsToWaitFor,
+                                     const BaseType_t xClearOnExit,
+                                     const BaseType_t xWaitForAllBits,
+                                     TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup,
+                                      const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup,
+                                    const EventBits_t uxBitsToSet ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup,
+                                 const EventBits_t uxBitsToSet,
+                                 const EventBits_t uxBitsToWaitFor,
+                                 TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of message/stream_buffer.h API functions. */
+size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+                              const void * pvTxData,
+                              size_t xDataLengthBytes,
+                              TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+                                 void * pvRxData,
+                                 size_t xBufferLengthBytes,
+                                 TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
+                                             size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL;
+StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
+                                                     size_t xTriggerLevelBytes,
+                                                     BaseType_t xIsMessageBuffer ) FREERTOS_SYSTEM_CALL;
+StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
+                                                           size_t xTriggerLevelBytes,
+                                                           BaseType_t xIsMessageBuffer,
+                                                           uint8_t * const pucStreamBufferStorageArea,
+                                                           StaticStreamBuffer_t * const pxStaticStreamBuffer ) FREERTOS_SYSTEM_CALL;
+
+
+
+#endif /* MPU_PROTOTYPES_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/mpu_wrappers.h b/tools/sdk/esp32s3/include/freertos/include/freertos/mpu_wrappers.h
new file mode 100644
index 00000000000..c02dcd0c41e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/mpu_wrappers.h
@@ -0,0 +1,185 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef MPU_WRAPPERS_H
+#define MPU_WRAPPERS_H
+
+/* This file redefines API functions to be called through a wrapper macro, but
+ * only for ports that are using the MPU. */
+#if portUSING_MPU_WRAPPERS
+
+/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
+ * included from queue.c or task.c to prevent it from having an effect within
+ * those files. */
+    #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/*
+ * Map standard (non MPU) API functions to equivalents that start
+ * "MPU_".  This will cause the application code to call the MPU_
+ * version, which wraps the non-MPU version with privilege promoting
+ * then demoting code, so the kernel code always runs will full
+ * privileges.
+ */
+
+/* Map standard tasks.h API functions to the MPU equivalents. */
+        #define xTaskCreate                            MPU_xTaskCreate
+        #define xTaskCreateStatic                      MPU_xTaskCreateStatic
+        #define xTaskCreateRestricted                  MPU_xTaskCreateRestricted
+        #define vTaskAllocateMPURegions                MPU_vTaskAllocateMPURegions
+        #define vTaskDelete                            MPU_vTaskDelete
+        #define vTaskDelay                             MPU_vTaskDelay
+        #define vTaskDelayUntil                        MPU_vTaskDelayUntil
+        #define xTaskAbortDelay                        MPU_xTaskAbortDelay
+        #define uxTaskPriorityGet                      MPU_uxTaskPriorityGet
+        #define eTaskGetState                          MPU_eTaskGetState
+        #define vTaskGetInfo                           MPU_vTaskGetInfo
+        #define vTaskPrioritySet                       MPU_vTaskPrioritySet
+        #define vTaskSuspend                           MPU_vTaskSuspend
+        #define vTaskResume                            MPU_vTaskResume
+        #define vTaskSuspendAll                        MPU_vTaskSuspendAll
+        #define xTaskResumeAll                         MPU_xTaskResumeAll
+        #define xTaskGetTickCount                      MPU_xTaskGetTickCount
+        #define uxTaskGetNumberOfTasks                 MPU_uxTaskGetNumberOfTasks
+        #define pcTaskGetName                          MPU_pcTaskGetName
+        #define xTaskGetHandle                         MPU_xTaskGetHandle
+        #define uxTaskGetStackHighWaterMark            MPU_uxTaskGetStackHighWaterMark
+        #define uxTaskGetStackHighWaterMark2           MPU_uxTaskGetStackHighWaterMark2
+        #define vTaskSetApplicationTaskTag             MPU_vTaskSetApplicationTaskTag
+        #define xTaskGetApplicationTaskTag             MPU_xTaskGetApplicationTaskTag
+        // #define vTaskSetThreadLocalStoragePointer   MPU_vTaskSetThreadLocalStoragePointer
+        // #define pvTaskGetThreadLocalStoragePointer  MPU_pvTaskGetThreadLocalStoragePointer
+        #define xTaskCallApplicationTaskHook           MPU_xTaskCallApplicationTaskHook
+        #define xTaskGetIdleTaskHandle                 MPU_xTaskGetIdleTaskHandle
+        #define uxTaskGetSystemState                   MPU_uxTaskGetSystemState
+        #define vTaskList                              MPU_vTaskList
+        #define vTaskGetRunTimeStats                   MPU_vTaskGetRunTimeStats
+        #define ulTaskGetIdleRunTimeCounter            MPU_ulTaskGetIdleRunTimeCounter
+        #define xTaskGenericNotify                     MPU_xTaskGenericNotify
+        #define xTaskNotifyWait                        MPU_xTaskNotifyWait
+        #define ulTaskNotifyTake                       MPU_ulTaskNotifyTake
+        #define xTaskNotifyStateClear                  MPU_xTaskNotifyStateClear
+        #define xTaskCatchUpTicks                      MPU_xTaskCatchUpTicks
+
+        #define xTaskGetCurrentTaskHandle              MPU_xTaskGetCurrentTaskHandle
+        #define vTaskSetTimeOutState                   MPU_vTaskSetTimeOutState
+        #define xTaskCheckForTimeOut                   MPU_xTaskCheckForTimeOut
+        #define xTaskGetSchedulerState                 MPU_xTaskGetSchedulerState
+
+        /* Map standard queue.h API functions to the MPU equivalents. */
+        #define xQueueGenericSend                      MPU_xQueueGenericSend
+        #define xQueueReceive                          MPU_xQueueReceive
+        #define xQueuePeek                             MPU_xQueuePeek
+        #define xQueueSemaphoreTake                    MPU_xQueueSemaphoreTake
+        #define uxQueueMessagesWaiting                 MPU_uxQueueMessagesWaiting
+        #define uxQueueSpacesAvailable                 MPU_uxQueueSpacesAvailable
+        #define vQueueDelete                           MPU_vQueueDelete
+        #define xQueueCreateMutex                      MPU_xQueueCreateMutex
+        #define xQueueCreateMutexStatic                MPU_xQueueCreateMutexStatic
+        #define xQueueCreateCountingSemaphore          MPU_xQueueCreateCountingSemaphore
+        #define xQueueCreateCountingSemaphoreStatic    MPU_xQueueCreateCountingSemaphoreStatic
+        #define xQueueGetMutexHolder                   MPU_xQueueGetMutexHolder
+        #define xQueueTakeMutexRecursive               MPU_xQueueTakeMutexRecursive
+        #define xQueueGiveMutexRecursive               MPU_xQueueGiveMutexRecursive
+        #define xQueueGenericCreate                    MPU_xQueueGenericCreate
+        #define xQueueGenericCreateStatic              MPU_xQueueGenericCreateStatic
+        #define xQueueCreateSet                        MPU_xQueueCreateSet
+        #define xQueueAddToSet                         MPU_xQueueAddToSet
+        #define xQueueRemoveFromSet                    MPU_xQueueRemoveFromSet
+        #define xQueueSelectFromSet                    MPU_xQueueSelectFromSet
+        #define xQueueGenericReset                     MPU_xQueueGenericReset
+
+        #if ( configQUEUE_REGISTRY_SIZE > 0 )
+            #define vQueueAddToRegistry                MPU_vQueueAddToRegistry
+            #define vQueueUnregisterQueue              MPU_vQueueUnregisterQueue
+            #define pcQueueGetName                     MPU_pcQueueGetName
+        #endif
+
+/* Map standard timer.h API functions to the MPU equivalents. */
+        #define xTimerCreate                           MPU_xTimerCreate
+        #define xTimerCreateStatic                     MPU_xTimerCreateStatic
+        #define pvTimerGetTimerID                      MPU_pvTimerGetTimerID
+        #define vTimerSetTimerID                       MPU_vTimerSetTimerID
+        #define xTimerIsTimerActive                    MPU_xTimerIsTimerActive
+        #define xTimerGetTimerDaemonTaskHandle         MPU_xTimerGetTimerDaemonTaskHandle
+        #define xTimerPendFunctionCall                 MPU_xTimerPendFunctionCall
+        #define pcTimerGetName                         MPU_pcTimerGetName
+        #define vTimerSetReloadMode                    MPU_vTimerSetReloadMode
+        #define xTimerGetPeriod                        MPU_xTimerGetPeriod
+        #define xTimerGetExpiryTime                    MPU_xTimerGetExpiryTime
+        #define xTimerGenericCommand                   MPU_xTimerGenericCommand
+
+/* Map standard event_group.h API functions to the MPU equivalents. */
+        #define xEventGroupCreate                      MPU_xEventGroupCreate
+        #define xEventGroupCreateStatic                MPU_xEventGroupCreateStatic
+        #define xEventGroupWaitBits                    MPU_xEventGroupWaitBits
+        #define xEventGroupClearBits                   MPU_xEventGroupClearBits
+        #define xEventGroupSetBits                     MPU_xEventGroupSetBits
+        #define xEventGroupSync                        MPU_xEventGroupSync
+        #define vEventGroupDelete                      MPU_vEventGroupDelete
+
+/* Map standard message/stream_buffer.h API functions to the MPU
+ * equivalents. */
+        #define xStreamBufferSend                      MPU_xStreamBufferSend
+        #define xStreamBufferReceive                   MPU_xStreamBufferReceive
+        #define xStreamBufferNextMessageLengthBytes    MPU_xStreamBufferNextMessageLengthBytes
+        #define vStreamBufferDelete                    MPU_vStreamBufferDelete
+        #define xStreamBufferIsFull                    MPU_xStreamBufferIsFull
+        #define xStreamBufferIsEmpty                   MPU_xStreamBufferIsEmpty
+        #define xStreamBufferReset                     MPU_xStreamBufferReset
+        #define xStreamBufferSpacesAvailable           MPU_xStreamBufferSpacesAvailable
+        #define xStreamBufferBytesAvailable            MPU_xStreamBufferBytesAvailable
+        #define xStreamBufferSetTriggerLevel           MPU_xStreamBufferSetTriggerLevel
+        #define xStreamBufferGenericCreate             MPU_xStreamBufferGenericCreate
+        #define xStreamBufferGenericCreateStatic       MPU_xStreamBufferGenericCreateStatic
+
+
+/* Remove the privileged function macro, but keep the PRIVILEGED_DATA
+ * macro so applications can place data in privileged access sections
+ * (useful when using statically allocated objects). */
+        #define PRIVILEGED_FUNCTION
+        #define PRIVILEGED_DATA    __attribute__( ( section( "privileged_data" ) ) )
+        #define FREERTOS_SYSTEM_CALL
+
+    #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
+
+/* Ensure API functions go in the privileged execution section. */
+        #define PRIVILEGED_FUNCTION     __attribute__( ( section( "privileged_functions" ) ) )
+        #define PRIVILEGED_DATA         __attribute__( ( section( "privileged_data" ) ) )
+        #define FREERTOS_SYSTEM_CALL    __attribute__( ( section( "freertos_system_calls" ) ) )
+
+    #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
+
+#else /* portUSING_MPU_WRAPPERS */
+
+    #define PRIVILEGED_FUNCTION
+    #define PRIVILEGED_DATA
+    #define FREERTOS_SYSTEM_CALL
+    #define portUSING_MPU_WRAPPERS    0
+
+#endif /* portUSING_MPU_WRAPPERS */
+
+
+#endif /* MPU_WRAPPERS_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/portable.h b/tools/sdk/esp32s3/include/freertos/include/freertos/portable.h
new file mode 100644
index 00000000000..acc337cb968
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/portable.h
@@ -0,0 +1,241 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/*-----------------------------------------------------------
+ * Portable layer API.  Each function must be defined for each port.
+ *----------------------------------------------------------*/
+
+#ifndef PORTABLE_H
+#define PORTABLE_H
+
+/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
+ * pre-processor definition was used to ensure the pre-processor found the correct
+ * portmacro.h file for the port being used.  That scheme was deprecated in favour
+ * of setting the compiler's include path such that it found the correct
+ * portmacro.h file - removing the need for the constant and allowing the
+ * portmacro.h file to be located anywhere in relation to the port being used.
+ * Purely for reasons of backward compatibility the old method is still valid, but
+ * to make it clear that new projects should not use it, support for the port
+ * specific constants has been moved into the deprecated_definitions.h header
+ * file. */
+#include "deprecated_definitions.h"
+
+/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h
+ * did not result in a portmacro.h header file being included - and it should be
+ * included here.  In this case the path to the correct portmacro.h header file
+ * must be set in the compiler's include path. */
+#ifndef portENTER_CRITICAL
+    #include "freertos/portmacro.h"
+#endif
+
+#if portBYTE_ALIGNMENT == 32
+    #define portBYTE_ALIGNMENT_MASK    ( 0x001f )
+#endif
+
+#if portBYTE_ALIGNMENT == 16
+    #define portBYTE_ALIGNMENT_MASK    ( 0x000f )
+#endif
+
+#if portBYTE_ALIGNMENT == 8
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0007 )
+#endif
+
+#if portBYTE_ALIGNMENT == 4
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0003 )
+#endif
+
+#if portBYTE_ALIGNMENT == 2
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0001 )
+#endif
+
+#if portBYTE_ALIGNMENT == 1
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0000 )
+#endif
+
+#ifndef portBYTE_ALIGNMENT_MASK
+    #error "Invalid portBYTE_ALIGNMENT definition"
+#endif
+
+#ifndef portNUM_CONFIGURABLE_REGIONS
+    #define portNUM_CONFIGURABLE_REGIONS    1
+#endif
+
+#ifndef portHAS_STACK_OVERFLOW_CHECKING
+    #define portHAS_STACK_OVERFLOW_CHECKING    0
+#endif
+
+#ifndef portARCH_NAME
+    #define portARCH_NAME    NULL
+#endif
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+#include "mpu_wrappers.h"
+
+/*
+ * Setup the stack of a new task so it is ready to be placed under the
+ * scheduler control.  The registers have to be placed on the stack in
+ * the order that the port expects to find them.
+ *
+ */
+#if ( portUSING_MPU_WRAPPERS == 1 )
+    #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             StackType_t * pxEndOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters,
+                                             BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
+    #else
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters,
+                                             BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
+    #endif
+#else /* if ( portUSING_MPU_WRAPPERS == 1 ) */
+    #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             StackType_t * pxEndOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters ) PRIVILEGED_FUNCTION;
+    #else
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters ) PRIVILEGED_FUNCTION;
+    #endif
+#endif
+
+#ifdef configUSE_FREERTOS_PROVIDED_HEAP
+
+/* Used by heap_5.c to define the start address and size of each memory region
+ * that together comprise the total FreeRTOS heap space. */
+typedef struct HeapRegion
+{
+    uint8_t * pucStartAddress;
+    size_t xSizeInBytes;
+} HeapRegion_t;
+
+/* Used to pass information about the heap out of vPortGetHeapStats(). */
+typedef struct xHeapStats
+{
+    size_t xAvailableHeapSpaceInBytes;          /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
+    size_t xSizeOfLargestFreeBlockInBytes;      /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xSizeOfSmallestFreeBlockInBytes;     /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xNumberOfFreeBlocks;                 /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xMinimumEverFreeBytesRemaining;      /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
+    size_t xNumberOfSuccessfulAllocations;      /* The number of calls to pvPortMalloc() that have returned a valid memory block. */
+    size_t xNumberOfSuccessfulFrees;            /* The number of calls to vPortFree() that has successfully freed a block of memory. */
+} HeapStats_t;
+
+/*
+ * Used to define multiple heap regions for use by heap_5.c.  This function
+ * must be called before any calls to pvPortMalloc() - not creating a task,
+ * queue, semaphore, mutex, software timer, event group, etc. will result in
+ * pvPortMalloc being called.
+ *
+ * pxHeapRegions passes in an array of HeapRegion_t structures - each of which
+ * defines a region of memory that can be used as the heap.  The array is
+ * terminated by a HeapRegions_t structure that has a size of 0.  The region
+ * with the lowest start address must appear first in the array.
+ */
+void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
+
+/*
+ * Returns a HeapStats_t structure filled with information about the current
+ * heap state.
+ */
+void vPortGetHeapStats( HeapStats_t * pxHeapStats );
+
+/*
+ * Map to the memory management routines required for the port.
+ */
+void * pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
+void vPortFree( void * pv ) PRIVILEGED_FUNCTION;
+void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
+size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
+size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
+
+#if( configSTACK_ALLOCATION_FROM_SEPARATE_HEAP == 1 )
+    void *pvPortMallocStack( size_t xSize ) PRIVILEGED_FUNCTION;
+    void vPortFreeStack( void *pv ) PRIVILEGED_FUNCTION;
+#else
+    #define pvPortMallocStack pvPortMalloc
+    #define vPortFreeStack vPortFree
+#endif
+#else  // configUSE_FREERTOS_PROVIDED_HEAP
+
+/*
+ * Map to the memory management routines required for the port.
+ *
+ * Note that libc standard malloc/free are also available for
+ * non-FreeRTOS-specific code, and behave the same as
+ * pvPortMalloc()/vPortFree().
+ */
+#define pvPortMalloc malloc
+#define vPortFree free
+#define xPortGetFreeHeapSize esp_get_free_heap_size
+#define xPortGetMinimumEverFreeHeapSize esp_get_minimum_free_heap_size
+
+#endif
+
+/*
+ * Setup the hardware ready for the scheduler to take control.  This generally
+ * sets up a tick interrupt and sets timers for the correct tick frequency.
+ */
+BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so
+ * the hardware is left in its original condition after the scheduler stops
+ * executing.
+ */
+void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * The structures and methods of manipulating the MPU are contained within the
+ * port layer.
+ *
+ * Fills the xMPUSettings structure with the memory region information
+ * contained in xRegions.
+ */
+#if ( portUSING_MPU_WRAPPERS == 1 )
+    struct xMEMORY_REGION;
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
+#endif
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTABLE_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/projdefs.h b/tools/sdk/esp32s3/include/freertos/include/freertos/projdefs.h
new file mode 100644
index 00000000000..1949e6e30b3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/projdefs.h
@@ -0,0 +1,125 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PROJDEFS_H
+#define PROJDEFS_H
+
+/*
+ * Defines the prototype to which task functions must conform.  Defined in this
+ * file to ensure the type is known before portable.h is included.
+ */
+typedef void (* TaskFunction_t)( void * );
+
+/* Converts a time in milliseconds to a time in ticks.  This macro can be
+ * overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
+ * definition here is not suitable for your application. */
+#ifndef pdMS_TO_TICKS
+    #define pdMS_TO_TICKS( xTimeInMs )    ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000U ) )
+#endif
+#ifdef ESP_PLATFORM
+#ifndef pdTICKS_TO_MS
+    #define pdTICKS_TO_MS( xTicks )   ( ( TickType_t ) ( ( uint64_t ) ( xTicks ) * 1000 / configTICK_RATE_HZ ) )
+#endif
+#endif // ESP_PLATFORM
+
+#define pdFALSE                                  ( ( BaseType_t ) 0 )
+#define pdTRUE                                   ( ( BaseType_t ) 1 )
+
+#define pdPASS                                   ( pdTRUE )
+#define pdFAIL                                   ( pdFALSE )
+#define errQUEUE_EMPTY                           ( ( BaseType_t ) 0 )
+#define errQUEUE_FULL                            ( ( BaseType_t ) 0 )
+
+/* FreeRTOS error definitions. */
+#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY    ( -1 )
+#define errQUEUE_BLOCKED                         ( -4 )
+#define errQUEUE_YIELD                           ( -5 )
+
+/* Macros used for basic data corruption checks. */
+#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES
+    #define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES    0
+#endif
+
+#if ( configUSE_16_BIT_TICKS == 1 )
+    #define pdINTEGRITY_CHECK_VALUE    0x5a5a
+#else
+    #define pdINTEGRITY_CHECK_VALUE    0x5a5a5a5aUL
+#endif
+
+/* The following errno values are used by FreeRTOS+ components, not FreeRTOS
+ * itself. */
+#define pdFREERTOS_ERRNO_NONE             0   /* No errors */
+#define pdFREERTOS_ERRNO_ENOENT           2   /* No such file or directory */
+#define pdFREERTOS_ERRNO_EINTR            4   /* Interrupted system call */
+#define pdFREERTOS_ERRNO_EIO              5   /* I/O error */
+#define pdFREERTOS_ERRNO_ENXIO            6   /* No such device or address */
+#define pdFREERTOS_ERRNO_EBADF            9   /* Bad file number */
+#define pdFREERTOS_ERRNO_EAGAIN           11  /* No more processes */
+#define pdFREERTOS_ERRNO_EWOULDBLOCK      11  /* Operation would block */
+#define pdFREERTOS_ERRNO_ENOMEM           12  /* Not enough memory */
+#define pdFREERTOS_ERRNO_EACCES           13  /* Permission denied */
+#define pdFREERTOS_ERRNO_EFAULT           14  /* Bad address */
+#define pdFREERTOS_ERRNO_EBUSY            16  /* Mount device busy */
+#define pdFREERTOS_ERRNO_EEXIST           17  /* File exists */
+#define pdFREERTOS_ERRNO_EXDEV            18  /* Cross-device link */
+#define pdFREERTOS_ERRNO_ENODEV           19  /* No such device */
+#define pdFREERTOS_ERRNO_ENOTDIR          20  /* Not a directory */
+#define pdFREERTOS_ERRNO_EISDIR           21  /* Is a directory */
+#define pdFREERTOS_ERRNO_EINVAL           22  /* Invalid argument */
+#define pdFREERTOS_ERRNO_ENOSPC           28  /* No space left on device */
+#define pdFREERTOS_ERRNO_ESPIPE           29  /* Illegal seek */
+#define pdFREERTOS_ERRNO_EROFS            30  /* Read only file system */
+#define pdFREERTOS_ERRNO_EUNATCH          42  /* Protocol driver not attached */
+#define pdFREERTOS_ERRNO_EBADE            50  /* Invalid exchange */
+#define pdFREERTOS_ERRNO_EFTYPE           79  /* Inappropriate file type or format */
+#define pdFREERTOS_ERRNO_ENMFILE          89  /* No more files */
+#define pdFREERTOS_ERRNO_ENOTEMPTY        90  /* Directory not empty */
+#define pdFREERTOS_ERRNO_ENAMETOOLONG     91  /* File or path name too long */
+#define pdFREERTOS_ERRNO_EOPNOTSUPP       95  /* Operation not supported on transport endpoint */
+#define pdFREERTOS_ERRNO_ENOBUFS          105 /* No buffer space available */
+#define pdFREERTOS_ERRNO_ENOPROTOOPT      109 /* Protocol not available */
+#define pdFREERTOS_ERRNO_EADDRINUSE       112 /* Address already in use */
+#define pdFREERTOS_ERRNO_ETIMEDOUT        116 /* Connection timed out */
+#define pdFREERTOS_ERRNO_EINPROGRESS      119 /* Connection already in progress */
+#define pdFREERTOS_ERRNO_EALREADY         120 /* Socket already connected */
+#define pdFREERTOS_ERRNO_EADDRNOTAVAIL    125 /* Address not available */
+#define pdFREERTOS_ERRNO_EISCONN          127 /* Socket is already connected */
+#define pdFREERTOS_ERRNO_ENOTCONN         128 /* Socket is not connected */
+#define pdFREERTOS_ERRNO_ENOMEDIUM        135 /* No medium inserted */
+#define pdFREERTOS_ERRNO_EILSEQ           138 /* An invalid UTF-16 sequence was encountered. */
+#define pdFREERTOS_ERRNO_ECANCELED        140 /* Operation canceled. */
+
+/* The following endian values are used by FreeRTOS+ components, not FreeRTOS
+ * itself. */
+#define pdFREERTOS_LITTLE_ENDIAN          0
+#define pdFREERTOS_BIG_ENDIAN             1
+
+/* Re-defining endian values for generic naming. */
+#define pdLITTLE_ENDIAN                   pdFREERTOS_LITTLE_ENDIAN
+#define pdBIG_ENDIAN                      pdFREERTOS_BIG_ENDIAN
+
+
+#endif /* PROJDEFS_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/queue.h b/tools/sdk/esp32s3/include/freertos/include/freertos/queue.h
new file mode 100644
index 00000000000..05ca7de4546
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/queue.h
@@ -0,0 +1,1802 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+
+#ifndef QUEUE_H
+#define QUEUE_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h" must appear in source files before "include queue.h"
+#endif
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+#include "task.h"
+
+/**
+ * Type by which queues are referenced.  For example, a call to xQueueCreate()
+ * returns an QueueHandle_t variable that can then be used as a parameter to
+ * xQueueSend(), xQueueReceive(), etc.
+ */
+struct QueueDefinition; /* Using old naming convention so as not to break kernel aware debuggers. */
+typedef struct QueueDefinition   * QueueHandle_t;
+
+/**
+ * Type by which queue sets are referenced.  For example, a call to
+ * xQueueCreateSet() returns an xQueueSet variable that can then be used as a
+ * parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc.
+ */
+typedef struct QueueDefinition   * QueueSetHandle_t;
+
+/**
+ * Queue sets can contain both queues and semaphores, so the
+ * QueueSetMemberHandle_t is defined as a type to be used where a parameter or
+ * return value can be either an QueueHandle_t or an SemaphoreHandle_t.
+ */
+typedef struct QueueDefinition   * QueueSetMemberHandle_t;
+
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
+
+/* For internal use only. */
+#define queueSEND_TO_BACK                     ( ( BaseType_t ) 0 )
+#define queueSEND_TO_FRONT                    ( ( BaseType_t ) 1 )
+#define queueOVERWRITE                        ( ( BaseType_t ) 2 )
+
+/* For internal use only.  These definitions *must* match those in queue.c. */
+#define queueQUEUE_TYPE_BASE                  ( ( uint8_t ) 0U )
+#define queueQUEUE_TYPE_SET                   ( ( uint8_t ) 0U )
+#define queueQUEUE_TYPE_MUTEX                 ( ( uint8_t ) 1U )
+#define queueQUEUE_TYPE_COUNTING_SEMAPHORE    ( ( uint8_t ) 2U )
+#define queueQUEUE_TYPE_BINARY_SEMAPHORE      ( ( uint8_t ) 3U )
+#define queueQUEUE_TYPE_RECURSIVE_MUTEX       ( ( uint8_t ) 4U )
+
+/** @endcond */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * QueueHandle_t xQueueCreate(
+ *                            UBaseType_t uxQueueLength,
+ *                            UBaseType_t uxItemSize
+ *                        );
+ * @endcode
+ * @endcond
+ *
+ * Creates a new queue instance, and returns a handle by which the new queue
+ * can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, queues use two blocks of
+ * memory.  The first block is used to hold the queue's data structures.  The
+ * second block is used to hold items placed into the queue.  If a queue is
+ * created using xQueueCreate() then both blocks of memory are automatically
+ * dynamically allocated inside the xQueueCreate() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a queue is created using
+ * xQueueCreateStatic() then the application writer must provide the memory that
+ * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to
+ * be created without using any dynamic memory allocation.
+ *
+ * https://www.FreeRTOS.org/Embedded-RTOS-Queues.html
+ *
+ * @param uxQueueLength The maximum number of items that the queue can contain.
+ *
+ * @param uxItemSize The number of bytes each item in the queue will require.
+ * Items are queued by copy, not by reference, so this is the number of bytes
+ * that will be copied for each posted item.  Each item on the queue must be
+ * the same size.
+ *
+ * @return If the queue is successfully create then a handle to the newly
+ * created queue is returned.  If the queue cannot be created then 0 is
+ * returned.
+ *
+ * Example usage:
+ * @code{c}
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * };
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1, xQueue2;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+ *  if( xQueue1 == 0 )
+ *  {
+ *      // Queue was not created and must not be used.
+ *  }
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *  if( xQueue2 == 0 )
+ *  {
+ *      // Queue was not created and must not be used.
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueCreate xQueueCreate
+ * @endcond
+ * \ingroup QueueManagement
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    #define xQueueCreate( uxQueueLength, uxItemSize )    xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( queueQUEUE_TYPE_BASE ) )
+#endif
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * QueueHandle_t xQueueCreateStatic(
+ *                            UBaseType_t uxQueueLength,
+ *                            UBaseType_t uxItemSize,
+ *                            uint8_t *pucQueueStorageBuffer,
+ *                            StaticQueue_t *pxQueueBuffer
+ *                        );
+ * @endcode
+ * @endcond
+ * Creates a new queue instance, and returns a handle by which the new queue
+ * can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, queues use two blocks of
+ * memory.  The first block is used to hold the queue's data structures.  The
+ * second block is used to hold items placed into the queue.  If a queue is
+ * created using xQueueCreate() then both blocks of memory are automatically
+ * dynamically allocated inside the xQueueCreate() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a queue is created using
+ * xQueueCreateStatic() then the application writer must provide the memory that
+ * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to
+ * be created without using any dynamic memory allocation.
+ *
+ * https://www.FreeRTOS.org/Embedded-RTOS-Queues.html
+ *
+ * @param uxQueueLength The maximum number of items that the queue can contain.
+ *
+ * @param uxItemSize The number of bytes each item in the queue will require.
+ * Items are queued by copy, not by reference, so this is the number of bytes
+ * that will be copied for each posted item.  Each item on the queue must be
+ * the same size.
+ *
+ * @param pucQueueStorage If uxItemSize is not zero then
+ * pucQueueStorageBuffer must point to a uint8_t array that is at least large
+ * enough to hold the maximum number of items that can be in the queue at any
+ * one time - which is ( uxQueueLength * uxItemsSize ) bytes.  If uxItemSize is
+ * zero then pucQueueStorageBuffer can be NULL.
+ *
+ * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which
+ * will be used to hold the queue's data structure.
+ *
+ * @return If the queue is created then a handle to the created queue is
+ * returned.  If pxQueueBuffer is NULL then NULL is returned.
+ *
+ * Example usage:
+ * @code{c}
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * };
+ *
+ * #define QUEUE_LENGTH 10
+ * #define ITEM_SIZE sizeof( uint32_t )
+ *
+ * // xQueueBuffer will hold the queue structure.
+ * StaticQueue_t xQueueBuffer;
+ *
+ * // ucQueueStorage will hold the items posted to the queue.  Must be at least
+ * // [(queue length) * ( queue item size)] bytes long.
+ * uint8_t ucQueueStorage[ QUEUE_LENGTH * ITEM_SIZE ];
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( QUEUE_LENGTH, // The number of items the queue can hold.
+ *                          ITEM_SIZE     // The size of each item in the queue
+ *                          &( ucQueueStorage[ 0 ] ), // The buffer that will hold the items in the queue.
+ *                          &xQueueBuffer ); // The buffer that will hold the queue structure.
+ *
+ *  // The queue is guaranteed to be created successfully as no dynamic memory
+ *  // allocation is used.  Therefore xQueue1 is now a handle to a valid queue.
+ *
+ *  // ... Rest of task code.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueCreateStatic xQueueCreateStatic
+ * @endcond
+ * \ingroup QueueManagement
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    #define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer )    xQueueGenericCreateStatic( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) )
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueSendToToFront(
+ *                                 QueueHandle_t    xQueue,
+ *                                 const void       *pvItemToQueue,
+ *                                 TickType_t       xTicksToWait
+ *                             );
+ * @endcode
+ * @endcond
+ *
+ * Post an item to the front of a queue.  The item is queued by copy, not by
+ * reference.  This function must not be called from an interrupt service
+ * routine.  See xQueueSendFromISR () for an alternative which may be used
+ * in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the
+ * queue is full.  The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+ * @code{c}
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * uint32_t ulVar = 10UL;
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1, xQueue2;
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *
+ *  // ...
+ *
+ *  if( xQueue1 != 0 )
+ *  {
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
+ *      // available if necessary.
+ *      if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
+ *      {
+ *          // Failed to post the message, even after 10 ticks.
+ *      }
+ *  }
+ *
+ *  if( xQueue2 != 0 )
+ *  {
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
+ *      // queue is already full.
+ *      pxMessage = & xMessage;
+ *      xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueSend xQueueSend
+ * @endcond
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueSendToBack(
+ *                                 QueueHandle_t    xQueue,
+ *                                 const void       *pvItemToQueue,
+ *                                 TickType_t       xTicksToWait
+ *                             );
+ * @endcode
+ * @endcond
+ *
+ * This is a macro that calls xQueueGenericSend().
+ *
+ * Post an item to the back of a queue.  The item is queued by copy, not by
+ * reference.  This function must not be called from an interrupt service
+ * routine.  See xQueueSendFromISR () for an alternative which may be used
+ * in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the queue
+ * is full.  The  time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+ * @code{c}
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * uint32_t ulVar = 10UL;
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1, xQueue2;
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *
+ *  // ...
+ *
+ *  if( xQueue1 != 0 )
+ *  {
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
+ *      // available if necessary.
+ *      if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
+ *      {
+ *          // Failed to post the message, even after 10 ticks.
+ *      }
+ *  }
+ *
+ *  if( xQueue2 != 0 )
+ *  {
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
+ *      // queue is already full.
+ *      pxMessage = & xMessage;
+ *      xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueSend xQueueSend
+ * @endcond
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueSend(
+ *                            QueueHandle_t xQueue,
+ *                            const void * pvItemToQueue,
+ *                            TickType_t xTicksToWait
+ *                       );
+ * @endcode
+ * @endcond
+ *
+ * This is a macro that calls xQueueGenericSend().  It is included for
+ * backward compatibility with versions of FreeRTOS.org that did not
+ * include the xQueueSendToFront() and xQueueSendToBack() macros.  It is
+ * equivalent to xQueueSendToBack().
+ *
+ * Post an item on a queue.  The item is queued by copy, not by reference.
+ * This function must not be called from an interrupt service routine.
+ * See xQueueSendFromISR () for an alternative which may be used in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the
+ * queue is full.  The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+ * @code{c}
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * uint32_t ulVar = 10UL;
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1, xQueue2;
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *
+ *  // ...
+ *
+ *  if( xQueue1 != 0 )
+ *  {
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
+ *      // available if necessary.
+ *      if( xQueueSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
+ *      {
+ *          // Failed to post the message, even after 10 ticks.
+ *      }
+ *  }
+ *
+ *  if( xQueue2 != 0 )
+ *  {
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
+ *      // queue is already full.
+ *      pxMessage = & xMessage;
+ *      xQueueSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueSend xQueueSend
+ * @endcond
+ * \ingroup QueueManagement
+ */
+#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueOverwrite(
+ *                            QueueHandle_t xQueue,
+ *                            const void * pvItemToQueue
+ *                       );
+ * @endcode
+ * @endcond
+ *
+ * Only for use with queues that have a length of one - so the queue is either
+ * empty or full.
+ *
+ * Post an item on a queue.  If the queue is already full then overwrite the
+ * value held in the queue.  The item is queued by copy, not by reference.
+ *
+ * This function must not be called from an interrupt service routine.
+ * See xQueueOverwriteFromISR () for an alternative which may be used in an ISR.
+ *
+ * @param xQueue The handle of the queue to which the data is being sent.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @return xQueueOverwrite() is a macro that calls xQueueGenericSend(), and
+ * therefore has the same return values as xQueueSendToFront().  However, pdPASS
+ * is the only value that can be returned because xQueueOverwrite() will write
+ * to the queue even when the queue is already full.
+ *
+ * Example usage:
+ * @code{c}
+ *
+ * void vFunction( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue;
+ * uint32_t ulVarToSend, ulValReceived;
+ *
+ *  // Create a queue to hold one uint32_t value.  It is strongly
+ *  // recommended *not* to use xQueueOverwrite() on queues that can
+ *  // contain more than one value, and doing so will trigger an assertion
+ *  // if configASSERT() is defined.
+ *  xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
+ *
+ *  // Write the value 10 to the queue using xQueueOverwrite().
+ *  ulVarToSend = 10;
+ *  xQueueOverwrite( xQueue, &ulVarToSend );
+ *
+ *  // Peeking the queue should now return 10, but leave the value 10 in
+ *  // the queue.  A block time of zero is used as it is known that the
+ *  // queue holds a value.
+ *  ulValReceived = 0;
+ *  xQueuePeek( xQueue, &ulValReceived, 0 );
+ *
+ *  if( ulValReceived != 10 )
+ *  {
+ *      // Error unless the item was removed by a different task.
+ *  }
+ *
+ *  // The queue is still full.  Use xQueueOverwrite() to overwrite the
+ *  // value held in the queue with 100.
+ *  ulVarToSend = 100;
+ *  xQueueOverwrite( xQueue, &ulVarToSend );
+ *
+ *  // This time read from the queue, leaving the queue empty once more.
+ *  // A block time of 0 is used again.
+ *  xQueueReceive( xQueue, &ulValReceived, 0 );
+ *
+ *  // The value read should be the last value written, even though the
+ *  // queue was already full when the value was written.
+ *  if( ulValReceived != 100 )
+ *  {
+ *      // Error!
+ *  }
+ *
+ *  // ...
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueOverwrite xQueueOverwrite
+ * @endcond
+ * \ingroup QueueManagement
+ */
+#define xQueueOverwrite( xQueue, pvItemToQueue ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE )
+
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueGenericSend(
+ *                                  QueueHandle_t xQueue,
+ *                                  const void * pvItemToQueue,
+ *                                  TickType_t xTicksToWait
+ *                                  BaseType_t xCopyPosition
+ *                              );
+ * @endcode
+ * @endcond
+ *
+ * It is preferred that the macros xQueueSend(), xQueueSendToFront() and
+ * xQueueSendToBack() are used in place of calling this function directly.
+ *
+ * Post an item on a queue.  The item is queued by copy, not by reference.
+ * This function must not be called from an interrupt service routine.
+ * See xQueueSendFromISR () for an alternative which may be used in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the
+ * queue is full.  The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
+ * item at the back of the queue, or queueSEND_TO_FRONT to place the item
+ * at the front of the queue (for high priority messages).
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+ * @code{c}
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * uint32_t ulVar = 10UL;
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1, xQueue2;
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *
+ *  // ...
+ *
+ *  if( xQueue1 != 0 )
+ *  {
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
+ *      // available if necessary.
+ *      if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS )
+ *      {
+ *          // Failed to post the message, even after 10 ticks.
+ *      }
+ *  }
+ *
+ *  if( xQueue2 != 0 )
+ *  {
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
+ *      // queue is already full.
+ *      pxMessage = & xMessage;
+ *      xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK );
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueSend xQueueSend
+ * @endcond
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueGenericSend( QueueHandle_t xQueue,
+                              const void * const pvItemToQueue,
+                              TickType_t xTicksToWait,
+                              const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueuePeek(
+ *                           QueueHandle_t xQueue,
+ *                           void * const pvBuffer,
+ *                           TickType_t xTicksToWait
+ *                       );
+ * @endcode
+ * @endcond
+ *
+ * Receive an item from a queue without removing the item from the queue.
+ * The item is received by copy so a buffer of adequate size must be
+ * provided.  The number of bytes copied into the buffer was defined when
+ * the queue was created.
+ *
+ * Successfully received items remain on the queue so will be returned again
+ * by the next call, or a call to xQueueReceive().
+ *
+ * This macro must not be used in an interrupt service routine.  See
+ * xQueuePeekFromISR() for an alternative that can be called from an interrupt
+ * service routine.
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for an item to receive should the queue be empty at the time
+ * of the call. The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue
+ * is empty.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * Example usage:
+ * @code{c}
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * QueueHandle_t xQueue;
+ *
+ * // Task to create a queue and post a value.
+ * void vATask( void *pvParameters )
+ * {
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *  if( xQueue == 0 )
+ *  {
+ *      // Failed to create the queue.
+ *  }
+ *
+ *  // ...
+ *
+ *  // Send a pointer to a struct AMessage object.  Don't block if the
+ *  // queue is already full.
+ *  pxMessage = & xMessage;
+ *  xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
+ *
+ *  // ... Rest of task code.
+ * }
+ *
+ * // Task to peek the data from the queue.
+ * void vADifferentTask( void *pvParameters )
+ * {
+ * struct AMessage *pxRxedMessage;
+ *
+ *  if( xQueue != 0 )
+ *  {
+ *      // Peek a message on the created queue.  Block for 10 ticks if a
+ *      // message is not immediately available.
+ *      if( xQueuePeek( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
+ *      {
+ *          // pcRxedMessage now points to the struct AMessage variable posted
+ *          // by vATask, but the item still remains on the queue.
+ *      }
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueuePeek xQueuePeek
+ * @endcond
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueuePeek( QueueHandle_t xQueue,
+                       void * const pvBuffer,
+                       TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueuePeekFromISR(
+ *                                  QueueHandle_t xQueue,
+ *                                  void *pvBuffer,
+ *                              );
+ * @endcode
+ * @endcond
+ *
+ * A version of xQueuePeek() that can be called from an interrupt service
+ * routine (ISR).
+ *
+ * Receive an item from a queue without removing the item from the queue.
+ * The item is received by copy so a buffer of adequate size must be
+ * provided.  The number of bytes copied into the buffer was defined when
+ * the queue was created.
+ *
+ * Successfully received items remain on the queue so will be returned again
+ * by the next call, or a call to xQueueReceive().
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueuePeekFromISR xQueuePeekFromISR
+ * @endcond
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
+                              void * const pvBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueReceive(
+ *                               QueueHandle_t xQueue,
+ *                               void *pvBuffer,
+ *                               TickType_t xTicksToWait
+ *                          );
+ * @endcode
+ * @endcond
+ *
+ * Receive an item from a queue.  The item is received by copy so a buffer of
+ * adequate size must be provided.  The number of bytes copied into the buffer
+ * was defined when the queue was created.
+ *
+ * Successfully received items are removed from the queue.
+ *
+ * This function must not be used in an interrupt service routine.  See
+ * xQueueReceiveFromISR for an alternative that can.
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for an item to receive should the queue be empty at the time
+ * of the call. xQueueReceive() will return immediately if xTicksToWait
+ * is zero and the queue is empty.  The time is defined in tick periods so the
+ * constant portTICK_PERIOD_MS should be used to convert to real time if this is
+ * required.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * Example usage:
+ * @code{c}
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * QueueHandle_t xQueue;
+ *
+ * // Task to create a queue and post a value.
+ * void vATask( void *pvParameters )
+ * {
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *  if( xQueue == 0 )
+ *  {
+ *      // Failed to create the queue.
+ *  }
+ *
+ *  // ...
+ *
+ *  // Send a pointer to a struct AMessage object.  Don't block if the
+ *  // queue is already full.
+ *  pxMessage = & xMessage;
+ *  xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
+ *
+ *  // ... Rest of task code.
+ * }
+ *
+ * // Task to receive from the queue.
+ * void vADifferentTask( void *pvParameters )
+ * {
+ * struct AMessage *pxRxedMessage;
+ *
+ *  if( xQueue != 0 )
+ *  {
+ *      // Receive a message on the created queue.  Block for 10 ticks if a
+ *      // message is not immediately available.
+ *      if( xQueueReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
+ *      {
+ *          // pcRxedMessage now points to the struct AMessage variable posted
+ *          // by vATask.
+ *      }
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueReceive xQueueReceive
+ * @endcond
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueReceive( QueueHandle_t xQueue,
+                          void * const pvBuffer,
+                          TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue );
+ * @endcode
+ * @endcond
+ *
+ * Return the number of messages stored in a queue.
+ *
+ * @param xQueue A handle to the queue being queried.
+ *
+ * @return The number of messages available in the queue.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
+ * @endcond
+ * \ingroup QueueManagement
+ */
+UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue );
+ * @endcode
+ * @endcond
+ *
+ * Return the number of free spaces available in a queue.  This is equal to the
+ * number of items that can be sent to the queue before the queue becomes full
+ * if no items are removed.
+ *
+ * @param xQueue A handle to the queue being queried.
+ *
+ * @return The number of spaces available in the queue.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
+ * @endcond
+ * \ingroup QueueManagement
+ */
+UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * void vQueueDelete( QueueHandle_t xQueue );
+ * @endcode
+ * @endcond
+ *
+ * Delete a queue - freeing all the memory allocated for storing of items
+ * placed on the queue.
+ *
+ * @param xQueue A handle to the queue to be deleted.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vQueueDelete vQueueDelete
+ * @endcond
+ * \ingroup QueueManagement
+ */
+void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueSendToFrontFromISR(
+ *                                       QueueHandle_t xQueue,
+ *                                       const void *pvItemToQueue,
+ *                                       BaseType_t *pxHigherPriorityTaskWoken
+ *                                    );
+ * @endcode
+ * @endcond
+ *
+ * This is a macro that calls xQueueGenericSendFromISR().
+ *
+ * Post an item to the front of a queue.  It is safe to use this macro from
+ * within an interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param[out] pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueSendToFromFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+ * @code{c}
+ * void vBufferISR( void )
+ * {
+ * char cIn;
+ * BaseType_t xHigherPrioritTaskWoken;
+ *
+ *  // We have not woken a task at the start of the ISR.
+ *  xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *  // Loop until the buffer is empty.
+ *  do
+ *  {
+ *      // Obtain a byte from the buffer.
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+ *
+ *      // Post the byte.
+ *      xQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
+ *
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
+ *
+ *  // Now the buffer is empty we can switch context if necessary.
+ *  if( xHigherPriorityTaskWoken )
+ *  {
+ *      portYIELD_FROM_ISR ();
+ *  }
+ * }
+ * @endcode
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
+ * @endcond
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT )
+
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueSendToBackFromISR(
+ *                                       QueueHandle_t xQueue,
+ *                                       const void *pvItemToQueue,
+ *                                       BaseType_t *pxHigherPriorityTaskWoken
+ *                                    );
+ * @endcode
+ * @endcond
+ *
+ * This is a macro that calls xQueueGenericSendFromISR().
+ *
+ * Post an item to the back of a queue.  It is safe to use this macro from
+ * within an interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param[out] pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueSendToBackFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+ * @code{c}
+ * void vBufferISR( void )
+ * {
+ * char cIn;
+ * BaseType_t xHigherPriorityTaskWoken;
+ *
+ *  // We have not woken a task at the start of the ISR.
+ *  xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *  // Loop until the buffer is empty.
+ *  do
+ *  {
+ *      // Obtain a byte from the buffer.
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+ *
+ *      // Post the byte.
+ *      xQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
+ *
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
+ *
+ *  // Now the buffer is empty we can switch context if necessary.
+ *  if( xHigherPriorityTaskWoken )
+ *  {
+ *      portYIELD_FROM_ISR ();
+ *  }
+ * }
+ * @endcode
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
+ * @endcond
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueOverwriteFromISR(
+ *                            QueueHandle_t xQueue,
+ *                            const void * pvItemToQueue,
+ *                            BaseType_t *pxHigherPriorityTaskWoken
+ *                       );
+ * @endcode
+ * @endcond
+ *
+ * A version of xQueueOverwrite() that can be used in an interrupt service
+ * routine (ISR).
+ *
+ * Only for use with queues that can hold a single item - so the queue is either
+ * empty or full.
+ *
+ * Post an item on a queue.  If the queue is already full then overwrite the
+ * value held in the queue.  The item is queued by copy, not by reference.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param[out] pxHigherPriorityTaskWoken xQueueOverwriteFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueOverwriteFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return xQueueOverwriteFromISR() is a macro that calls
+ * xQueueGenericSendFromISR(), and therefore has the same return values as
+ * xQueueSendToFrontFromISR().  However, pdPASS is the only value that can be
+ * returned because xQueueOverwriteFromISR() will write to the queue even when
+ * the queue is already full.
+ *
+ * Example usage:
+ * @code{c}
+ *
+ * QueueHandle_t xQueue;
+ *
+ * void vFunction( void *pvParameters )
+ * {
+ *  // Create a queue to hold one uint32_t value.  It is strongly
+ *  // recommended *not* to use xQueueOverwriteFromISR() on queues that can
+ *  // contain more than one value, and doing so will trigger an assertion
+ *  // if configASSERT() is defined.
+ *  xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
+ * }
+ *
+ * void vAnInterruptHandler( void )
+ * {
+ * // xHigherPriorityTaskWoken must be set to pdFALSE before it is used.
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ * uint32_t ulVarToSend, ulValReceived;
+ *
+ *  // Write the value 10 to the queue using xQueueOverwriteFromISR().
+ *  ulVarToSend = 10;
+ *  xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
+ *
+ *  // The queue is full, but calling xQueueOverwriteFromISR() again will still
+ *  // pass because the value held in the queue will be overwritten with the
+ *  // new value.
+ *  ulVarToSend = 100;
+ *  xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
+ *
+ *  // Reading from the queue will now return 100.
+ *
+ *  // ...
+ *
+ *  if( xHigherPrioritytaskWoken == pdTRUE )
+ *  {
+ *      // Writing to the queue caused a task to unblock and the unblocked task
+ *      // has a priority higher than or equal to the priority of the currently
+ *      // executing task (the task this interrupt interrupted).  Perform a context
+ *      // switch so this interrupt returns directly to the unblocked task.
+ *      portYIELD_FROM_ISR(); // or portEND_SWITCHING_ISR() depending on the port.
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR
+ * @endcond
+ * \ingroup QueueManagement
+ */
+#define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueSendFromISR(
+ *                                   QueueHandle_t xQueue,
+ *                                   const void *pvItemToQueue,
+ *                                   BaseType_t *pxHigherPriorityTaskWoken
+ *                              );
+ * @endcode
+ * @endcond
+ *
+ * This is a macro that calls xQueueGenericSendFromISR().  It is included
+ * for backward compatibility with versions of FreeRTOS.org that did not
+ * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR()
+ * macros.
+ *
+ * Post an item to the back of a queue.  It is safe to use this function from
+ * within an interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param[out] pxHigherPriorityTaskWoken xQueueSendFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueSendFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+ * @code{c}
+ * void vBufferISR( void )
+ * {
+ * char cIn;
+ * BaseType_t xHigherPriorityTaskWoken;
+ *
+ *  // We have not woken a task at the start of the ISR.
+ *  xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *  // Loop until the buffer is empty.
+ *  do
+ *  {
+ *      // Obtain a byte from the buffer.
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+ *
+ *      // Post the byte.
+ *      xQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
+ *
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
+ *
+ *  // Now the buffer is empty we can switch context if necessary.
+ *  if( xHigherPriorityTaskWoken )
+ *  {
+ *      // Actual macro used here is port specific.
+ *      portYIELD_FROM_ISR ();
+ *  }
+ * }
+ * @endcode
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
+ * @endcond
+ * \ingroup QueueManagement
+ */
+#define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
+
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
+/**@{*/
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueGenericSendFromISR(
+ *                                         QueueHandle_t    xQueue,
+ *                                         const    void    *pvItemToQueue,
+ *                                         BaseType_t  *pxHigherPriorityTaskWoken,
+ *                                         BaseType_t  xCopyPosition
+ *                                     );
+ * @endcode
+ * @endcond
+ *
+ * It is preferred that the macros xQueueSendFromISR(),
+ * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place
+ * of calling this function directly.  xQueueGiveFromISR() is an
+ * equivalent for use by semaphores that don't actually copy any data.
+ *
+ * Post an item on a queue.  It is safe to use this function from within an
+ * interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param[out] pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueGenericSendFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
+ * item at the back of the queue, or queueSEND_TO_FRONT to place the item
+ * at the front of the queue (for high priority messages).
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+ * @code{c}
+ * void vBufferISR( void )
+ * {
+ * char cIn;
+ * BaseType_t xHigherPriorityTaskWokenByPost;
+ *
+ *  // We have not woken a task at the start of the ISR.
+ *  xHigherPriorityTaskWokenByPost = pdFALSE;
+ *
+ *  // Loop until the buffer is empty.
+ *  do
+ *  {
+ *      // Obtain a byte from the buffer.
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+ *
+ *      // Post each byte.
+ *      xQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK );
+ *
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
+ *
+ *  // Now the buffer is empty we can switch context if necessary.  Note that the
+ *  // name of the yield function required is port specific.
+ *  if( xHigherPriorityTaskWokenByPost )
+ *  {
+ *      taskYIELD_YIELD_FROM_ISR();
+ *  }
+ * }
+ * @endcode
+ *
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue,
+                                     const void * const pvItemToQueue,
+                                     BaseType_t * const pxHigherPriorityTaskWoken,
+                                     const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
+                              BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+/**@}*/
+/** @endcond */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * queue. h
+ * @code{c}
+ * BaseType_t xQueueReceiveFromISR(
+ *                                     QueueHandle_t    xQueue,
+ *                                     void             *pvBuffer,
+ *                                     BaseType_t       *pxTaskWoken
+ *                                 );
+ * @endcode
+ * @endcond
+ *
+ * Receive an item from a queue.  It is safe to use this function from within an
+ * interrupt service routine.
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @param[out] pxHigherPriorityTaskWoken A task may be blocked waiting for space to become
+ * available on the queue.  If xQueueReceiveFromISR causes such a task to
+ * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will
+ * remain unchanged.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * Example usage:
+ * @code{c}
+ *
+ * QueueHandle_t xQueue;
+ *
+ * // Function to create a queue and post some values.
+ * void vAFunction( void *pvParameters )
+ * {
+ * char cValueToPost;
+ * const TickType_t xTicksToWait = ( TickType_t )0xff;
+ *
+ *  // Create a queue capable of containing 10 characters.
+ *  xQueue = xQueueCreate( 10, sizeof( char ) );
+ *  if( xQueue == 0 )
+ *  {
+ *      // Failed to create the queue.
+ *  }
+ *
+ *  // ...
+ *
+ *  // Post some characters that will be used within an ISR.  If the queue
+ *  // is full then this task will block for xTicksToWait ticks.
+ *  cValueToPost = 'a';
+ *  xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
+ *  cValueToPost = 'b';
+ *  xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
+ *
+ *  // ... keep posting characters ... this task may block when the queue
+ *  // becomes full.
+ *
+ *  cValueToPost = 'c';
+ *  xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
+ * }
+ *
+ * // ISR that outputs all the characters received on the queue.
+ * void vISR_Routine( void )
+ * {
+ * BaseType_t xTaskWokenByReceive = pdFALSE;
+ * char cRxedChar;
+ *
+ *  while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
+ *  {
+ *      // A character was received.  Output the character now.
+ *      vOutputCharacter( cRxedChar );
+ *
+ *      // If removing the character from the queue woke the task that was
+ *      // posting onto the queue cTaskWokenByReceive will have been set to
+ *      // pdTRUE.  No matter how many times this loop iterates only one
+ *      // task will be woken.
+ *  }
+ *
+ *  if( cTaskWokenByPost != ( char ) pdFALSE;
+ *  {
+ *      taskYIELD ();
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR
+ * @endcond
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue,
+                                 void * const pvBuffer,
+                                 BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/*
+ * Utilities to query queues that are safe to use from an ISR.  These utilities
+ * should be used only from witin an ISR, or within a critical section.
+ */
+BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
+/*
+ * The functions defined above are for passing data to and from tasks.  The
+ * functions below are the equivalents for passing data to and from
+ * co-routines.
+ *
+ * These functions are called from the co-routine macro implementation and
+ * should not be called directly from application code.  Instead use the macro
+ * wrappers defined within croutine.h.
+ */
+BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue,
+                                const void * pvItemToQueue,
+                                BaseType_t xCoRoutinePreviouslyWoken );
+BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue,
+                                   void * pvBuffer,
+                                   BaseType_t * pxTaskWoken );
+BaseType_t xQueueCRSend( QueueHandle_t xQueue,
+                         const void * pvItemToQueue,
+                         TickType_t xTicksToWait );
+BaseType_t xQueueCRReceive( QueueHandle_t xQueue,
+                            void * pvBuffer,
+                            TickType_t xTicksToWait );
+
+/**
+ * For internal use only.  Use xSemaphoreCreateMutex(),
+ * xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling
+ * these functions directly.
+ */
+QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType,
+                                       StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
+QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
+                                             const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;
+QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
+                                                   const UBaseType_t uxInitialCount,
+                                                   StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue,
+                                TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+TaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
+TaskHandle_t xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
+
+/**
+ * For internal use only.  Use xSemaphoreTakeMutexRecursive() or
+ * xSemaphoreGiveMutexRecursive() instead of calling these functions directly.
+ */
+BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex,
+                                     TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
+
+/** @endcond */
+
+/**
+ * Reset a queue back to its original empty state.  The return value is now
+ * obsolete and is always set to pdPASS.
+ */
+#define xQueueReset( xQueue )    xQueueGenericReset( xQueue, pdFALSE )
+
+/**
+ * The registry is provided as a means for kernel aware debuggers to
+ * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add
+ * a queue, semaphore or mutex handle to the registry if you want the handle
+ * to be available to a kernel aware debugger.  If you are not using a kernel
+ * aware debugger then this function can be ignored.
+ *
+ * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the
+ * registry can hold.  configQUEUE_REGISTRY_SIZE must be greater than 0
+ * within FreeRTOSConfig.h for the registry to be available.  Its value
+ * does not effect the number of queues, semaphores and mutexes that can be
+ * created - just the number that the registry can hold.
+ *
+ * @param xQueue The handle of the queue being added to the registry.  This
+ * is the handle returned by a call to xQueueCreate().  Semaphore and mutex
+ * handles can also be passed in here.
+ *
+ * @param pcQueueName The name to be associated with the handle.  This is the
+ * name that the kernel aware debugger will display.  The queue registry only
+ * stores a pointer to the string - so the string must be persistent (global or
+ * preferably in ROM/Flash), not on the stack.
+ */
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
+    void vQueueAddToRegistry( QueueHandle_t xQueue,
+                              const char * pcQueueName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+#endif
+
+/**
+ * The registry is provided as a means for kernel aware debuggers to
+ * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add
+ * a queue, semaphore or mutex handle to the registry if you want the handle
+ * to be available to a kernel aware debugger, and vQueueUnregisterQueue() to
+ * remove the queue, semaphore or mutex from the register.  If you are not using
+ * a kernel aware debugger then this function can be ignored.
+ *
+ * @param xQueue The handle of the queue being removed from the registry.
+ */
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
+    void vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * The queue registry is provided as a means for kernel aware debuggers to
+ * locate queues, semaphores and mutexes.  Call pcQueueGetName() to look
+ * up and return the name of a queue in the queue registry from the queue's
+ * handle.
+ *
+ * @param xQueue The handle of the queue the name of which will be returned.
+ * @return If the queue is in the registry then a pointer to the name of the
+ * queue is returned.  If the queue is not in the registry then NULL is
+ * returned.
+ */
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
+    const char * pcQueueGetName( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+#endif
+
+/**
+ * Generic version of the function used to create a queue using dynamic memory
+ * allocation.  This is called by other functions and macros that create other
+ * RTOS objects that use the queue structure as their base.
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength,
+                                       const UBaseType_t uxItemSize,
+                                       const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * Generic version of the function used to create a queue using dynamic memory
+ * allocation.  This is called by other functions and macros that create other
+ * RTOS objects that use the queue structure as their base.
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
+                                             const UBaseType_t uxItemSize,
+                                             uint8_t * pucQueueStorage,
+                                             StaticQueue_t * pxStaticQueue,
+                                             const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * Queue sets provide a mechanism to allow a task to block (pend) on a read
+ * operation from multiple queues or semaphores simultaneously.
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * A queue set must be explicitly created using a call to xQueueCreateSet()
+ * before it can be used.  Once created, standard FreeRTOS queues and semaphores
+ * can be added to the set using calls to xQueueAddToSet().
+ * xQueueSelectFromSet() is then used to determine which, if any, of the queues
+ * or semaphores contained in the set is in a state where a queue read or
+ * semaphore take operation would be successful.
+ *
+ * Note 1:  See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html
+ * for reasons why queue sets are very rarely needed in practice as there are
+ * simpler methods of blocking on multiple objects.
+ *
+ * Note 2:  Blocking on a queue set that contains a mutex will not cause the
+ * mutex holder to inherit the priority of the blocked task.
+ *
+ * Note 3:  An additional 4 bytes of RAM is required for each space in a every
+ * queue added to a queue set.  Therefore counting semaphores that have a high
+ * maximum count value should not be added to a queue set.
+ *
+ * Note 4:  A receive (in the case of a queue) or take (in the case of a
+ * semaphore) operation must not be performed on a member of a queue set unless
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
+ *
+ * @param uxEventQueueLength Queue sets store events that occur on
+ * the queues and semaphores contained in the set.  uxEventQueueLength specifies
+ * the maximum number of events that can be queued at once.  To be absolutely
+ * certain that events are not lost uxEventQueueLength should be set to the
+ * total sum of the length of the queues added to the set, where binary
+ * semaphores and mutexes have a length of 1, and counting semaphores have a
+ * length set by their maximum count value.  Examples:
+ *  + If a queue set is to hold a queue of length 5, another queue of length 12,
+ *    and a binary semaphore, then uxEventQueueLength should be set to
+ *    (5 + 12 + 1), or 18.
+ *  + If a queue set is to hold three binary semaphores then uxEventQueueLength
+ *    should be set to (1 + 1 + 1 ), or 3.
+ *  + If a queue set is to hold a counting semaphore that has a maximum count of
+ *    5, and a counting semaphore that has a maximum count of 3, then
+ *    uxEventQueueLength should be set to (5 + 3), or 8.
+ *
+ * @return If the queue set is created successfully then a handle to the created
+ * queue set is returned.  Otherwise NULL is returned.
+ */
+QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
+
+/**
+ * Adds a queue or semaphore to a queue set that was previously created by a
+ * call to xQueueCreateSet().
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * Note 1:  A receive (in the case of a queue) or take (in the case of a
+ * semaphore) operation must not be performed on a member of a queue set unless
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
+ *
+ * @param xQueueOrSemaphore The handle of the queue or semaphore being added to
+ * the queue set (cast to an QueueSetMemberHandle_t type).
+ *
+ * @param xQueueSet The handle of the queue set to which the queue or semaphore
+ * is being added.
+ *
+ * @return If the queue or semaphore was successfully added to the queue set
+ * then pdPASS is returned.  If the queue could not be successfully added to the
+ * queue set because it is already a member of a different queue set then pdFAIL
+ * is returned.
+ */
+BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                           QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+
+/**
+ * Removes a queue or semaphore from a queue set.  A queue or semaphore can only
+ * be removed from a set if the queue or semaphore is empty.
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * @param xQueueOrSemaphore The handle of the queue or semaphore being removed
+ * from the queue set (cast to an QueueSetMemberHandle_t type).
+ *
+ * @param xQueueSet The handle of the queue set in which the queue or semaphore
+ * is included.
+ *
+ * @return If the queue or semaphore was successfully removed from the queue set
+ * then pdPASS is returned.  If the queue was not in the queue set, or the
+ * queue (or semaphore) was not empty, then pdFAIL is returned.
+ */
+BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                                QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+
+/**
+ * xQueueSelectFromSet() selects from the members of a queue set a queue or
+ * semaphore that either contains data (in the case of a queue) or is available
+ * to take (in the case of a semaphore).  xQueueSelectFromSet() effectively
+ * allows a task to block (pend) on a read operation on all the queues and
+ * semaphores in a queue set simultaneously.
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * Note 1:  See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html
+ * for reasons why queue sets are very rarely needed in practice as there are
+ * simpler methods of blocking on multiple objects.
+ *
+ * Note 2:  Blocking on a queue set that contains a mutex will not cause the
+ * mutex holder to inherit the priority of the blocked task.
+ *
+ * Note 3:  A receive (in the case of a queue) or take (in the case of a
+ * semaphore) operation must not be performed on a member of a queue set unless
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
+ *
+ * @param xQueueSet The queue set on which the task will (potentially) block.
+ *
+ * @param xTicksToWait The maximum time, in ticks, that the calling task will
+ * remain in the Blocked state (with other tasks executing) to wait for a member
+ * of the queue set to be ready for a successful queue read or semaphore take
+ * operation.
+ *
+ * @return xQueueSelectFromSet() will return the handle of a queue (cast to
+ * a QueueSetMemberHandle_t type) contained in the queue set that contains data,
+ * or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained
+ * in the queue set that is available, or NULL if no such queue or semaphore
+ * exists before before the specified block time expires.
+ */
+QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
+                                            const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * A version of xQueueSelectFromSet() that can be used from an ISR.
+ */
+QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
+
+/* Not public API functions. */
+void vQueueWaitForMessageRestricted( QueueHandle_t xQueue,
+                                     TickType_t xTicksToWait,
+                                     const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueGenericReset( QueueHandle_t xQueue,
+                               BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;
+void vQueueSetQueueNumber( QueueHandle_t xQueue,
+                           UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION;
+UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/** @endcond */
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* QUEUE_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/semphr.h b/tools/sdk/esp32s3/include/freertos/include/freertos/semphr.h
new file mode 100644
index 00000000000..2041641b91d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/semphr.h
@@ -0,0 +1,1200 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef SEMAPHORE_H
+#define SEMAPHORE_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h" must appear in source files before "include semphr.h"
+#endif
+
+#include "queue.h"
+
+typedef QueueHandle_t SemaphoreHandle_t;
+
+#define semBINARY_SEMAPHORE_QUEUE_LENGTH    ( ( uint8_t ) 1U )
+#define semSEMAPHORE_QUEUE_ITEM_LENGTH      ( ( uint8_t ) 0U )
+#define semGIVE_BLOCK_TIME                  ( ( TickType_t ) 0U )
+
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
+/**
+ * semphr. h
+ * @code{c}
+ * vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore );
+ * @endcode
+ *
+ * In many usage scenarios it is faster and more memory efficient to use a
+ * direct to task notification in place of a binary semaphore!
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
+ *
+ * This old vSemaphoreCreateBinary() macro is now deprecated in favour of the
+ * xSemaphoreCreateBinary() function.  Note that binary semaphores created using
+ * the vSemaphoreCreateBinary() macro are created in a state such that the
+ * first call to 'take' the semaphore would pass, whereas binary semaphores
+ * created using xSemaphoreCreateBinary() are created in a state such that the
+ * the semaphore must first be 'given' before it can be 'taken'.
+ *
+ * <i>Macro</i> that implements a semaphore by using the existing queue mechanism.
+ * The queue length is 1 as this is a binary semaphore.  The data size is 0
+ * as we don't want to actually store any data - we just want to know if the
+ * queue is empty or full.
+ *
+ * This type of semaphore can be used for pure synchronisation between tasks or
+ * between an interrupt and a task.  The semaphore need not be given back once
+ * obtained, so one task/interrupt can continuously 'give' the semaphore while
+ * another continuously 'takes' the semaphore.  For this reason this type of
+ * semaphore does not use a priority inheritance mechanism.  For an alternative
+ * that does use priority inheritance see xSemaphoreCreateMutex().
+ *
+ * @param xSemaphore Handle to the created semaphore.  Should be of type SemaphoreHandle_t.
+ *
+ * Example usage:
+ * @code{c}
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
+ *  // This is a macro so pass the variable in directly.
+ *  vSemaphoreCreateBinary( xSemaphore );
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      // The semaphore was created successfully.
+ *      // The semaphore can now be used.
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary
+ * @endcond
+ * \ingroup Semaphores
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    #define vSemaphoreCreateBinary( xSemaphore )                                                                                     \
+    {                                                                                                                                \
+        ( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \
+        if( ( xSemaphore ) != NULL )                                                                                                 \
+        {                                                                                                                            \
+            ( void ) xSemaphoreGive( ( xSemaphore ) );                                                                               \
+        }                                                                                                                            \
+    }
+#endif
+/** @endcond */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr. h
+ * @code{c}
+ * SemaphoreHandle_t xSemaphoreCreateBinary( void );
+ * @endcode
+ * @endcond
+ *
+ * Creates a new binary semaphore instance, and returns a handle by which the
+ * new semaphore can be referenced.
+ *
+ * In many usage scenarios it is faster and more memory efficient to use a
+ * direct to task notification in place of a binary semaphore!
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
+ *
+ * Internally, within the FreeRTOS implementation, binary semaphores use a block
+ * of memory, in which the semaphore structure is stored.  If a binary semaphore
+ * is created using xSemaphoreCreateBinary() then the required memory is
+ * automatically dynamically allocated inside the xSemaphoreCreateBinary()
+ * function.  (see https://www.FreeRTOS.org/a00111.html).  If a binary semaphore
+ * is created using xSemaphoreCreateBinaryStatic() then the application writer
+ * must provide the memory.  xSemaphoreCreateBinaryStatic() therefore allows a
+ * binary semaphore to be created without using any dynamic memory allocation.
+ *
+ * The old vSemaphoreCreateBinary() macro is now deprecated in favour of this
+ * xSemaphoreCreateBinary() function.  Note that binary semaphores created using
+ * the vSemaphoreCreateBinary() macro are created in a state such that the
+ * first call to 'take' the semaphore would pass, whereas binary semaphores
+ * created using xSemaphoreCreateBinary() are created in a state such that the
+ * the semaphore must first be 'given' before it can be 'taken'.
+ *
+ * This type of semaphore can be used for pure synchronisation between tasks or
+ * between an interrupt and a task.  The semaphore need not be given back once
+ * obtained, so one task/interrupt can continuously 'give' the semaphore while
+ * another continuously 'takes' the semaphore.  For this reason this type of
+ * semaphore does not use a priority inheritance mechanism.  For an alternative
+ * that does use priority inheritance see xSemaphoreCreateMutex().
+ *
+ * @return Handle to the created semaphore, or NULL if the memory required to
+ * hold the semaphore's data structures could not be allocated.
+ *
+ * Example usage:
+ * @code{c}
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // Semaphore cannot be used before a call to vSemaphoreCreateBinary().
+ *  // This is a macro so pass the variable in directly.
+ *  xSemaphore = xSemaphoreCreateBinary();
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      // The semaphore was created successfully.
+ *      // The semaphore can now be used.
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary
+ * @endcond
+ * \ingroup Semaphores
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateBinary()    xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE )
+#endif
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr. h
+ * @code{c}
+ * SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Creates a new binary semaphore instance, and returns a handle by which the
+ * new semaphore can be referenced.
+ *
+ * NOTE: In many usage scenarios it is faster and more memory efficient to use a
+ * direct to task notification in place of a binary semaphore!
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
+ *
+ * Internally, within the FreeRTOS implementation, binary semaphores use a block
+ * of memory, in which the semaphore structure is stored.  If a binary semaphore
+ * is created using xSemaphoreCreateBinary() then the required memory is
+ * automatically dynamically allocated inside the xSemaphoreCreateBinary()
+ * function.  (see https://www.FreeRTOS.org/a00111.html).  If a binary semaphore
+ * is created using xSemaphoreCreateBinaryStatic() then the application writer
+ * must provide the memory.  xSemaphoreCreateBinaryStatic() therefore allows a
+ * binary semaphore to be created without using any dynamic memory allocation.
+ *
+ * This type of semaphore can be used for pure synchronisation between tasks or
+ * between an interrupt and a task.  The semaphore need not be given back once
+ * obtained, so one task/interrupt can continuously 'give' the semaphore while
+ * another continuously 'takes' the semaphore.  For this reason this type of
+ * semaphore does not use a priority inheritance mechanism.  For an alternative
+ * that does use priority inheritance see xSemaphoreCreateMutex().
+ *
+ * @param pxStaticSemaphore Must point to a variable of type StaticSemaphore_t,
+ * which will then be used to hold the semaphore's data structure, removing the
+ * need for the memory to be allocated dynamically.
+ *
+ * @return If the semaphore is created then a handle to the created semaphore is
+ * returned.  If pxSemaphoreBuffer is NULL then NULL is returned.
+ *
+ * Example usage:
+ * @code{c}
+ * SemaphoreHandle_t xSemaphore = NULL;
+ * StaticSemaphore_t xSemaphoreBuffer;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateBinary() or
+ *  // xSemaphoreCreateBinaryStatic().
+ *  // The semaphore's data structures will be placed in the xSemaphoreBuffer
+ *  // variable, the address of which is passed into the function.  The
+ *  // function's parameter is not NULL, so the function will not attempt any
+ *  // dynamic memory allocation, and therefore the function will not return
+ *  // return NULL.
+ *  xSemaphore = xSemaphoreCreateBinaryStatic( &xSemaphoreBuffer );
+ *
+ *  // Rest of task code goes here.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xSemaphoreCreateBinaryStatic xSemaphoreCreateBinaryStatic
+ * @endcond
+ * \ingroup Semaphores
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateBinaryStatic( pxStaticSemaphore )    xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE )
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr. h
+ * @code{c}
+ * xSemaphoreTake(
+ *                   SemaphoreHandle_t xSemaphore,
+ *                   TickType_t xBlockTime
+ *               );
+ * @endcode
+ * @endcond
+ *
+ * <i>Macro</i> to obtain a semaphore.  The semaphore must have previously been
+ * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
+ * xSemaphoreCreateCounting().
+ *
+ * param xSemaphore A handle to the semaphore being taken - obtained when
+ * the semaphore was created.
+ *
+ * param xBlockTime The time in ticks to wait for the semaphore to become
+ * available.  The macro portTICK_PERIOD_MS can be used to convert this to a
+ * real time.  A block time of zero can be used to poll the semaphore.  A block
+ * time of portMAX_DELAY can be used to block indefinitely (provided
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h).
+ *
+ * @return pdTRUE if the semaphore was obtained.  pdFALSE
+ * if xBlockTime expired without the semaphore becoming available.
+ *
+ * Example usage:
+ * @code{c}
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ * // A task that creates a semaphore.
+ * void vATask( void * pvParameters )
+ * {
+ *  // Create the semaphore to guard a shared resource.
+ *  vSemaphoreCreateBinary( xSemaphore );
+ * }
+ *
+ * // A task that uses the semaphore.
+ * void vAnotherTask( void * pvParameters )
+ * {
+ *  // ... Do other things.
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      // See if we can obtain the semaphore.  If the semaphore is not available
+ *      // wait 10 ticks to see if it becomes free.
+ *      if( xSemaphoreTake( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
+ *      {
+ *          // We were able to obtain the semaphore and can now access the
+ *          // shared resource.
+ *
+ *          // ...
+ *
+ *          // We have finished accessing the shared resource.  Release the
+ *          // semaphore.
+ *          xSemaphoreGive( xSemaphore );
+ *      }
+ *      else
+ *      {
+ *          // We could not obtain the semaphore and can therefore not access
+ *          // the shared resource safely.
+ *      }
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xSemaphoreTake xSemaphoreTake
+ * @endcond
+ * \ingroup Semaphores
+ */
+#define xSemaphoreTake( xSemaphore, xBlockTime )    xQueueSemaphoreTake( ( xSemaphore ), ( xBlockTime ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr. h
+ * @code{c}
+ * xSemaphoreTakeRecursive(
+ *                          SemaphoreHandle_t xMutex,
+ *                          TickType_t xBlockTime
+ *                        );
+ * @endcode
+ * @endcond
+ *
+ * <i>Macro</i> to recursively obtain, or 'take', a mutex type semaphore.
+ * The mutex must have previously been created using a call to
+ * xSemaphoreCreateRecursiveMutex();
+ *
+ * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this
+ * macro to be available.
+ *
+ * This macro must not be used on mutexes created using xSemaphoreCreateMutex().
+ *
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
+ * doesn't become available again until the owner has called
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
+ * not be available to any other task until it has also  'given' the mutex back
+ * exactly five times.
+ *
+ * @param xMutex A handle to the mutex being obtained.  This is the
+ * handle returned by xSemaphoreCreateRecursiveMutex();
+ *
+ * @param xBlockTime The time in ticks to wait for the semaphore to become
+ * available.  The macro portTICK_PERIOD_MS can be used to convert this to a
+ * real time.  A block time of zero can be used to poll the semaphore.  If
+ * the task already owns the semaphore then xSemaphoreTakeRecursive() will
+ * return immediately no matter what the value of xBlockTime.
+ *
+ * @return pdTRUE if the semaphore was obtained.  pdFALSE if xBlockTime
+ * expired without the semaphore becoming available.
+ *
+ * Example usage:
+ * @code{c}
+ * SemaphoreHandle_t xMutex = NULL;
+ *
+ * // A task that creates a mutex.
+ * void vATask( void * pvParameters )
+ * {
+ *  // Create the mutex to guard a shared resource.
+ *  xMutex = xSemaphoreCreateRecursiveMutex();
+ * }
+ *
+ * // A task that uses the mutex.
+ * void vAnotherTask( void * pvParameters )
+ * {
+ *  // ... Do other things.
+ *
+ *  if( xMutex != NULL )
+ *  {
+ *      // See if we can obtain the mutex.  If the mutex is not available
+ *      // wait 10 ticks to see if it becomes free.
+ *      if( xSemaphoreTakeRecursive( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
+ *      {
+ *          // We were able to obtain the mutex and can now access the
+ *          // shared resource.
+ *
+ *          // ...
+ *          // For some reason due to the nature of the code further calls to
+ *          // xSemaphoreTakeRecursive() are made on the same mutex.  In real
+ *          // code these would not be just sequential calls as this would make
+ *          // no sense.  Instead the calls are likely to be buried inside
+ *          // a more complex call structure.
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+ *
+ *          // The mutex has now been 'taken' three times, so will not be
+ *          // available to another task until it has also been given back
+ *          // three times.  Again it is unlikely that real code would have
+ *          // these calls sequentially, but instead buried in a more complex
+ *          // call structure.  This is just for illustrative purposes.
+ *          xSemaphoreGiveRecursive( xMutex );
+ *          xSemaphoreGiveRecursive( xMutex );
+ *          xSemaphoreGiveRecursive( xMutex );
+ *
+ *          // Now the mutex can be taken by other tasks.
+ *      }
+ *      else
+ *      {
+ *          // We could not obtain the mutex and can therefore not access
+ *          // the shared resource safely.
+ *      }
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive
+ * @endcond
+ * \ingroup Semaphores
+ */
+#define xSemaphoreTakeRecursive( xMutex, xBlockTime )   xQueueTakeMutexRecursive( ( xMutex ), ( xBlockTime ) )
+
+/**
+ * <i>Macro</i> to release a semaphore.  The semaphore must have previously been
+ * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
+ * xSemaphoreCreateCounting(). and obtained using sSemaphoreTake().
+ *
+ * This macro must not be used from an ISR.  See xSemaphoreGiveFromISR () for
+ * an alternative which can be used from an ISR.
+ *
+ * This macro must also not be used on semaphores created using
+ * xSemaphoreCreateRecursiveMutex().
+ *
+ * @param xSemaphore A handle to the semaphore being released.  This is the
+ * handle returned when the semaphore was created.
+ *
+ * @return pdTRUE if the semaphore was released.  pdFALSE if an error occurred.
+ * Semaphores are implemented using queues.  An error can occur if there is
+ * no space on the queue to post a message - indicating that the
+ * semaphore was not first obtained correctly.
+ *
+ * Example usage:
+ * @code{c}
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // Create the semaphore to guard a shared resource.
+ *  vSemaphoreCreateBinary( xSemaphore );
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      if( xSemaphoreGive( xSemaphore ) != pdTRUE )
+ *      {
+ *          // We would expect this call to fail because we cannot give
+ *          // a semaphore without first "taking" it!
+ *      }
+ *
+ *      // Obtain the semaphore - don't block if the semaphore is not
+ *      // immediately available.
+ *      if( xSemaphoreTake( xSemaphore, ( TickType_t ) 0 ) )
+ *      {
+ *          // We now have the semaphore and can access the shared resource.
+ *
+ *          // ...
+ *
+ *          // We have finished accessing the shared resource so can free the
+ *          // semaphore.
+ *          if( xSemaphoreGive( xSemaphore ) != pdTRUE )
+ *          {
+ *              // We would not expect this call to fail because we must have
+ *              // obtained the semaphore to get here.
+ *          }
+ *      }
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xSemaphoreGive xSemaphoreGive
+ * @endcond
+ * \ingroup Semaphores
+ */
+#define xSemaphoreGive( xSemaphore )    xQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr. h
+ * @code{c}
+ * xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex );
+ * @endcode
+ * @endcond
+ *
+ * <i>Macro</i> to recursively release, or 'give', a mutex type semaphore.
+ * The mutex must have previously been created using a call to
+ * xSemaphoreCreateRecursiveMutex();
+ *
+ * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this
+ * macro to be available.
+ *
+ * This macro must not be used on mutexes created using xSemaphoreCreateMutex().
+ *
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
+ * doesn't become available again until the owner has called
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
+ * not be available to any other task until it has also  'given' the mutex back
+ * exactly five times.
+ *
+ * @param xMutex A handle to the mutex being released, or 'given'.  This is the
+ * handle returned by xSemaphoreCreateMutex();
+ *
+ * @return pdTRUE if the semaphore was given.
+ *
+ * Example usage:
+ * @code{c}
+ * SemaphoreHandle_t xMutex = NULL;
+ *
+ * // A task that creates a mutex.
+ * void vATask( void * pvParameters )
+ * {
+ *  // Create the mutex to guard a shared resource.
+ *  xMutex = xSemaphoreCreateRecursiveMutex();
+ * }
+ *
+ * // A task that uses the mutex.
+ * void vAnotherTask( void * pvParameters )
+ * {
+ *  // ... Do other things.
+ *
+ *  if( xMutex != NULL )
+ *  {
+ *      // See if we can obtain the mutex.  If the mutex is not available
+ *      // wait 10 ticks to see if it becomes free.
+ *      if( xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ) == pdTRUE )
+ *      {
+ *          // We were able to obtain the mutex and can now access the
+ *          // shared resource.
+ *
+ *          // ...
+ *          // For some reason due to the nature of the code further calls to
+ *          // xSemaphoreTakeRecursive() are made on the same mutex.  In real
+ *          // code these would not be just sequential calls as this would make
+ *          // no sense.  Instead the calls are likely to be buried inside
+ *          // a more complex call structure.
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+ *
+ *          // The mutex has now been 'taken' three times, so will not be
+ *          // available to another task until it has also been given back
+ *          // three times.  Again it is unlikely that real code would have
+ *          // these calls sequentially, it would be more likely that the calls
+ *          // to xSemaphoreGiveRecursive() would be called as a call stack
+ *          // unwound.  This is just for demonstrative purposes.
+ *          xSemaphoreGiveRecursive( xMutex );
+ *          xSemaphoreGiveRecursive( xMutex );
+ *          xSemaphoreGiveRecursive( xMutex );
+ *
+ *          // Now the mutex can be taken by other tasks.
+ *      }
+ *      else
+ *      {
+ *          // We could not obtain the mutex and can therefore not access
+ *          // the shared resource safely.
+ *      }
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive
+ * @endcond
+ * \ingroup Semaphores
+ */
+#define xSemaphoreGiveRecursive( xMutex )   xQueueGiveMutexRecursive( ( xMutex ) )
+
+/**
+ * <i>Macro</i> to  release a semaphore.  The semaphore must have previously been
+ * created with a call to xSemaphoreCreateBinary() or xSemaphoreCreateCounting().
+ *
+ * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex())
+ * must not be used with this macro.
+ *
+ * This macro can be used from an ISR.
+ *
+ * @param xSemaphore A handle to the semaphore being released.  This is the
+ * handle returned when the semaphore was created.
+ *
+ * @param pxHigherPriorityTaskWoken xSemaphoreGiveFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if giving the semaphore caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xSemaphoreGiveFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+ * @code{c}
+ * #define LONG_TIME 0xffff
+ * #define TICKS_TO_WAIT  10
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ * // Repetitive task.
+ * void vATask( void * pvParameters )
+ * {
+ *  for( ;; )
+ *  {
+ *      // We want this task to run every 10 ticks of a timer.  The semaphore
+ *      // was created before this task was started.
+ *
+ *      // Block waiting for the semaphore to become available.
+ *      if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
+ *      {
+ *          // It is time to execute.
+ *
+ *          // ...
+ *
+ *          // We have finished our task.  Return to the top of the loop where
+ *          // we will block on the semaphore until it is time to execute
+ *          // again.  Note when using the semaphore for synchronisation with an
+ *          // ISR in this manner there is no need to 'give' the semaphore back.
+ *      }
+ *  }
+ * }
+ *
+ * // Timer ISR
+ * void vTimerISR( void * pvParameters )
+ * {
+ * static uint8_t ucLocalTickCount = 0;
+ * static BaseType_t xHigherPriorityTaskWoken;
+ *
+ *  // A timer tick has occurred.
+ *
+ *  // ... Do other time functions.
+ *
+ *  // Is it time for vATask () to run?
+ *  xHigherPriorityTaskWoken = pdFALSE;
+ *  ucLocalTickCount++;
+ *  if( ucLocalTickCount >= TICKS_TO_WAIT )
+ *  {
+ *      // Unblock the task by releasing the semaphore.
+ *      xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
+ *
+ *      // Reset the count so we release the semaphore again in 10 ticks time.
+ *      ucLocalTickCount = 0;
+ *  }
+ *
+ *  if( xHigherPriorityTaskWoken != pdFALSE )
+ *  {
+ *      // We can force a context switch here.  Context switching from an
+ *      // ISR uses port specific syntax.  Check the demo task for your port
+ *      // to find the syntax required.
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR
+ * @endcond
+ * \ingroup Semaphores
+ */
+#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken )    xQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), ( pxHigherPriorityTaskWoken ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr. h
+ * @code{c}
+ * xSemaphoreTakeFromISR(
+ *                        SemaphoreHandle_t xSemaphore,
+ *                        BaseType_t *pxHigherPriorityTaskWoken
+ *                    );
+ * @endcode
+ * @endcond
+ *
+ * <i>Macro</i> to  take a semaphore from an ISR.  The semaphore must have
+ * previously been created with a call to xSemaphoreCreateBinary() or
+ * xSemaphoreCreateCounting().
+ *
+ * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex())
+ * must not be used with this macro.
+ *
+ * This macro can be used from an ISR, however taking a semaphore from an ISR
+ * is not a common operation.  It is likely to only be useful when taking a
+ * counting semaphore when an interrupt is obtaining an object from a resource
+ * pool (when the semaphore count indicates the number of resources available).
+ *
+ * @param xSemaphore A handle to the semaphore being taken.  This is the
+ * handle returned when the semaphore was created.
+ *
+ * @param[out] pxHigherPriorityTaskWoken xSemaphoreTakeFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if taking the semaphore caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xSemaphoreTakeFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the semaphore was successfully taken, otherwise
+ * pdFALSE
+ */
+#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken )    xQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr. h
+ * @code{c}
+ * SemaphoreHandle_t xSemaphoreCreateMutex( void );
+ * @endcode
+ * @endcond
+ *
+ * Creates a new mutex type semaphore instance, and returns a handle by which
+ * the new mutex can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, mutex semaphores use a block
+ * of memory, in which the mutex structure is stored.  If a mutex is created
+ * using xSemaphoreCreateMutex() then the required memory is automatically
+ * dynamically allocated inside the xSemaphoreCreateMutex() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a mutex is created using
+ * xSemaphoreCreateMutexStatic() then the application writer must provided the
+ * memory.  xSemaphoreCreateMutexStatic() therefore allows a mutex to be created
+ * without using any dynamic memory allocation.
+ *
+ * Mutexes created using this function can be accessed using the xSemaphoreTake()
+ * and xSemaphoreGive() macros.  The xSemaphoreTakeRecursive() and
+ * xSemaphoreGiveRecursive() macros must not be used.
+ *
+ * This type of semaphore uses a priority inheritance mechanism so a task
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
+ * semaphore it is no longer required.
+ *
+ * Mutex type semaphores cannot be used from within interrupt service routines.
+ *
+ * See xSemaphoreCreateBinary() for an alternative implementation that can be
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
+ * service routines.
+ *
+ * @return If the mutex was successfully created then a handle to the created
+ * semaphore is returned.  If there was not enough heap to allocate the mutex
+ * data structures then NULL is returned.
+ *
+ * Example usage:
+ * @code{c}
+ * SemaphoreHandle_t xSemaphore;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
+ *  // This is a macro so pass the variable in directly.
+ *  xSemaphore = xSemaphoreCreateMutex();
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      // The semaphore was created successfully.
+ *      // The semaphore can now be used.
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex
+ * @endcond
+ * \ingroup Semaphores
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateMutex()    xQueueCreateMutex( queueQUEUE_TYPE_MUTEX )
+#endif
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr. h
+ * @code{c}
+ * SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Creates a new mutex type semaphore instance, and returns a handle by which
+ * the new mutex can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, mutex semaphores use a block
+ * of memory, in which the mutex structure is stored.  If a mutex is created
+ * using xSemaphoreCreateMutex() then the required memory is automatically
+ * dynamically allocated inside the xSemaphoreCreateMutex() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a mutex is created using
+ * xSemaphoreCreateMutexStatic() then the application writer must provided the
+ * memory.  xSemaphoreCreateMutexStatic() therefore allows a mutex to be created
+ * without using any dynamic memory allocation.
+ *
+ * Mutexes created using this function can be accessed using the xSemaphoreTake()
+ * and xSemaphoreGive() macros.  The xSemaphoreTakeRecursive() and
+ * xSemaphoreGiveRecursive() macros must not be used.
+ *
+ * This type of semaphore uses a priority inheritance mechanism so a task
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
+ * semaphore it is no longer required.
+ *
+ * Mutex type semaphores cannot be used from within interrupt service routines.
+ *
+ * See xSemaphoreCreateBinary() for an alternative implementation that can be
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
+ * service routines.
+ *
+ * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t,
+ * which will be used to hold the mutex's data structure, removing the need for
+ * the memory to be allocated dynamically.
+ *
+ * @return If the mutex was successfully created then a handle to the created
+ * mutex is returned.  If pxMutexBuffer was NULL then NULL is returned.
+ *
+ * Example usage:
+ * @code{c}
+ * SemaphoreHandle_t xSemaphore;
+ * StaticSemaphore_t xMutexBuffer;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // A mutex cannot be used before it has been created.  xMutexBuffer is
+ *  // into xSemaphoreCreateMutexStatic() so no dynamic memory allocation is
+ *  // attempted.
+ *  xSemaphore = xSemaphoreCreateMutexStatic( &xMutexBuffer );
+ *
+ *  // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
+ *  // so there is no need to check it.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xSemaphoreCreateMutexStatic xSemaphoreCreateMutexStatic
+ * @endcond
+ * \ingroup Semaphores
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateMutexStatic( pxMutexBuffer )    xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) )
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+
+/**
+ * Creates a new recursive mutex type semaphore instance, and returns a handle
+ * by which the new recursive mutex can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, recursive mutexs use a block
+ * of memory, in which the mutex structure is stored.  If a recursive mutex is
+ * created using xSemaphoreCreateRecursiveMutex() then the required memory is
+ * automatically dynamically allocated inside the
+ * xSemaphoreCreateRecursiveMutex() function.  (see
+ * http://www.freertos.org/a00111.html).  If a recursive mutex is created using
+ * xSemaphoreCreateRecursiveMutexStatic() then the application writer must
+ * provide the memory that will get used by the mutex.
+ * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to
+ * be created without using any dynamic memory allocation.
+ *
+ * Mutexes created using this macro can be accessed using the
+ * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros.  The
+ * xSemaphoreTake() and xSemaphoreGive() macros must not be used.
+ *
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
+ * doesn't become available again until the owner has called
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
+ * not be available to any other task until it has also  'given' the mutex back
+ * exactly five times.
+ *
+ * This type of semaphore uses a priority inheritance mechanism so a task
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
+ * semaphore it is no longer required.
+ *
+ * Mutex type semaphores cannot be used from within interrupt service routines.
+ *
+ * See vSemaphoreCreateBinary() for an alternative implementation that can be
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
+ * service routines.
+ *
+ * @return xSemaphore Handle to the created mutex semaphore.  Should be of type
+ *      SemaphoreHandle_t.
+ *
+ * Example usage:
+ * @code{c}
+ *  SemaphoreHandle_t xSemaphore;
+ *
+ *  void vATask( void * pvParameters )
+ *  {
+ *     // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
+ *     // This is a macro so pass the variable in directly.
+ *     xSemaphore = xSemaphoreCreateRecursiveMutex();
+ *
+ *     if( xSemaphore != NULL )
+ *     {
+ *         // The semaphore was created successfully.
+ *         // The semaphore can now be used.
+ *     }
+ *  }
+ * @endcode
+ * \ingroup Semaphores
+ */
+#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )
+    #define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX )
+#endif
+
+/**
+ * Creates a new recursive mutex type semaphore instance, and returns a handle
+ * by which the new recursive mutex can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, recursive mutexs use a block
+ * of memory, in which the mutex structure is stored.  If a recursive mutex is
+ * created using xSemaphoreCreateRecursiveMutex() then the required memory is
+ * automatically dynamically allocated inside the
+ * xSemaphoreCreateRecursiveMutex() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a recursive mutex is created using
+ * xSemaphoreCreateRecursiveMutexStatic() then the application writer must
+ * provide the memory that will get used by the mutex.
+ * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to
+ * be created without using any dynamic memory allocation.
+ *
+ * Mutexes created using this macro can be accessed using the
+ * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros.  The
+ * xSemaphoreTake() and xSemaphoreGive() macros must not be used.
+ *
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
+ * doesn't become available again until the owner has called
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
+ * not be available to any other task until it has also  'given' the mutex back
+ * exactly five times.
+ *
+ * This type of semaphore uses a priority inheritance mechanism so a task
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
+ * semaphore it is no longer required.
+ *
+ * Mutex type semaphores cannot be used from within interrupt service routines.
+ *
+ * See xSemaphoreCreateBinary() for an alternative implementation that can be
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
+ * service routines.
+ *
+ * @param pxStaticSemaphore Must point to a variable of type StaticSemaphore_t,
+ * which will then be used to hold the recursive mutex's data structure,
+ * removing the need for the memory to be allocated dynamically.
+ *
+ * @return If the recursive mutex was successfully created then a handle to the
+ * created recursive mutex is returned.  If pxMutexBuffer was NULL then NULL is
+ * returned.
+ *
+ * Example usage:
+ * @code{c}
+ *  SemaphoreHandle_t xSemaphore;
+ *  StaticSemaphore_t xMutexBuffer;
+ *
+ *  void vATask( void * pvParameters )
+ *  {
+ *     // A recursive semaphore cannot be used before it is created.  Here a
+ *     // recursive mutex is created using xSemaphoreCreateRecursiveMutexStatic().
+ *     // The address of xMutexBuffer is passed into the function, and will hold
+ *     // the mutexes data structures - so no dynamic memory allocation will be
+ *     // attempted.
+ *     xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xMutexBuffer );
+ *
+ *     // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
+ *     // so there is no need to check it.
+ *  }
+ * @endcode
+ * \ingroup Semaphores
+ */
+#if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )
+    #define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore )    xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore )
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr. h
+ * @code{c}
+ * SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount );
+ * @endcode
+ * @endcond
+ *
+ * Creates a new counting semaphore instance, and returns a handle by which the
+ * new counting semaphore can be referenced.
+ *
+ * In many usage scenarios it is faster and more memory efficient to use a
+ * direct to task notification in place of a counting semaphore!
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
+ *
+ * Internally, within the FreeRTOS implementation, counting semaphores use a
+ * block of memory, in which the counting semaphore structure is stored.  If a
+ * counting semaphore is created using xSemaphoreCreateCounting() then the
+ * required memory is automatically dynamically allocated inside the
+ * xSemaphoreCreateCounting() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a counting semaphore is created
+ * using xSemaphoreCreateCountingStatic() then the application writer can
+ * instead optionally provide the memory that will get used by the counting
+ * semaphore.  xSemaphoreCreateCountingStatic() therefore allows a counting
+ * semaphore to be created without using any dynamic memory allocation.
+ *
+ * Counting semaphores are typically used for two things:
+ *
+ * 1) Counting events.
+ *
+ *    In this usage scenario an event handler will 'give' a semaphore each time
+ *    an event occurs (incrementing the semaphore count value), and a handler
+ *    task will 'take' a semaphore each time it processes an event
+ *    (decrementing the semaphore count value).  The count value is therefore
+ *    the difference between the number of events that have occurred and the
+ *    number that have been processed.  In this case it is desirable for the
+ *    initial count value to be zero.
+ *
+ * 2) Resource management.
+ *
+ *    In this usage scenario the count value indicates the number of resources
+ *    available.  To obtain control of a resource a task must first obtain a
+ *    semaphore - decrementing the semaphore count value.  When the count value
+ *    reaches zero there are no free resources.  When a task finishes with the
+ *    resource it 'gives' the semaphore back - incrementing the semaphore count
+ *    value.  In this case it is desirable for the initial count value to be
+ *    equal to the maximum count value, indicating that all resources are free.
+ *
+ * @param uxMaxCount The maximum count value that can be reached.  When the
+ *        semaphore reaches this value it can no longer be 'given'.
+ *
+ * @param uxInitialCount The count value assigned to the semaphore when it is
+ *        created.
+ *
+ * @return Handle to the created semaphore.  Null if the semaphore could not be
+ *         created.
+ *
+ * Example usage:
+ * @code{c}
+ * SemaphoreHandle_t xSemaphore;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateCounting().
+ *  // The max value to which the semaphore can count should be 10, and the
+ *  // initial value assigned to the count should be 0.
+ *  xSemaphore = xSemaphoreCreateCounting( 10, 0 );
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      // The semaphore was created successfully.
+ *      // The semaphore can now be used.
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting
+ * @endcond
+ * \ingroup Semaphores
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount )    xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) )
+#endif
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr. h
+ * @code{c}
+ * SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Creates a new counting semaphore instance, and returns a handle by which the
+ * new counting semaphore can be referenced.
+ *
+ * In many usage scenarios it is faster and more memory efficient to use a
+ * direct to task notification in place of a counting semaphore!
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
+ *
+ * Internally, within the FreeRTOS implementation, counting semaphores use a
+ * block of memory, in which the counting semaphore structure is stored.  If a
+ * counting semaphore is created using xSemaphoreCreateCounting() then the
+ * required memory is automatically dynamically allocated inside the
+ * xSemaphoreCreateCounting() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a counting semaphore is created
+ * using xSemaphoreCreateCountingStatic() then the application writer must
+ * provide the memory.  xSemaphoreCreateCountingStatic() therefore allows a
+ * counting semaphore to be created without using any dynamic memory allocation.
+ *
+ * Counting semaphores are typically used for two things:
+ *
+ * 1) Counting events.
+ *
+ *    In this usage scenario an event handler will 'give' a semaphore each time
+ *    an event occurs (incrementing the semaphore count value), and a handler
+ *    task will 'take' a semaphore each time it processes an event
+ *    (decrementing the semaphore count value).  The count value is therefore
+ *    the difference between the number of events that have occurred and the
+ *    number that have been processed.  In this case it is desirable for the
+ *    initial count value to be zero.
+ *
+ * 2) Resource management.
+ *
+ *    In this usage scenario the count value indicates the number of resources
+ *    available.  To obtain control of a resource a task must first obtain a
+ *    semaphore - decrementing the semaphore count value.  When the count value
+ *    reaches zero there are no free resources.  When a task finishes with the
+ *    resource it 'gives' the semaphore back - incrementing the semaphore count
+ *    value.  In this case it is desirable for the initial count value to be
+ *    equal to the maximum count value, indicating that all resources are free.
+ *
+ * @param uxMaxCount The maximum count value that can be reached.  When the
+ *        semaphore reaches this value it can no longer be 'given'.
+ *
+ * @param uxInitialCount The count value assigned to the semaphore when it is
+ *        created.
+ *
+ * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t,
+ * which will then be used to hold the semaphore's data structure, removing the
+ * need for the memory to be allocated dynamically.
+ *
+ * @return If the counting semaphore was successfully created then a handle to
+ * the created counting semaphore is returned.  If pxSemaphoreBuffer was NULL
+ * then NULL is returned.
+ *
+ * Example usage:
+ * @code{c}
+ * SemaphoreHandle_t xSemaphore;
+ * StaticSemaphore_t xSemaphoreBuffer;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ *  // Counting semaphore cannot be used before they have been created.  Create
+ *  // a counting semaphore using xSemaphoreCreateCountingStatic().  The max
+ *  // value to which the semaphore can count is 10, and the initial value
+ *  // assigned to the count will be 0.  The address of xSemaphoreBuffer is
+ *  // passed in and will be used to hold the semaphore structure, so no dynamic
+ *  // memory allocation will be used.
+ *  xSemaphore = xSemaphoreCreateCounting( 10, 0, &xSemaphoreBuffer );
+ *
+ *  // No memory allocation was attempted so xSemaphore cannot be NULL, so there
+ *  // is no need to check its value.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xSemaphoreCreateCountingStatic xSemaphoreCreateCountingStatic
+ * @endcond
+ * \ingroup Semaphores
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer )    xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) )
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr. h
+ * @code{c}
+ * void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );
+ * @endcode
+ * @endcond
+ *
+ * Delete a semaphore.  This function must be used with care.  For example,
+ * do not delete a mutex type semaphore if the mutex is held by a task.
+ *
+ * @param xSemaphore A handle to the semaphore to be deleted.
+ *
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * \defgroup vSemaphoreDelete vSemaphoreDelete
+ * @endcond
+ * \ingroup Semaphores
+ */
+#define vSemaphoreDelete( xSemaphore )                   vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr.h
+ * @code{c}
+ * TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );
+ * @endcode
+ * @endcond
+ *
+ * If xMutex is indeed a mutex type semaphore, return the current mutex holder.
+ * If xMutex is not a mutex type semaphore, or the mutex is available (not held
+ * by a task), return NULL.
+ *
+ * Note: This is a good way of determining if the calling task is the mutex
+ * holder, but not a good way of determining the identity of the mutex holder as
+ * the holder may change between the function exiting and the returned value
+ * being tested.
+ */
+#define xSemaphoreGetMutexHolder( xSemaphore )           xQueueGetMutexHolder( ( xSemaphore ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr.h
+ * @code{c}
+ * TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex );
+ * @endcode
+ * @endcond
+ *
+ * If xMutex is indeed a mutex type semaphore, return the current mutex holder.
+ * If xMutex is not a mutex type semaphore, or the mutex is available (not held
+ * by a task), return NULL.
+ *
+ */
+#define xSemaphoreGetMutexHolderFromISR( xSemaphore )    xQueueGetMutexHolderFromISR( ( xSemaphore ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * semphr.h
+ * @code{c}
+ * UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );
+ * @endcode
+ * @endcond
+ *
+ * If the semaphore is a counting semaphore then uxSemaphoreGetCount() returns
+ * its current count value.  If the semaphore is a binary semaphore then
+ * uxSemaphoreGetCount() returns 1 if the semaphore is available, and 0 if the
+ * semaphore is not available.
+ *
+ */
+#define uxSemaphoreGetCount( xSemaphore )                uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) )
+
+#endif /* SEMAPHORE_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/stack_macros.h b/tools/sdk/esp32s3/include/freertos/include/freertos/stack_macros.h
new file mode 100644
index 00000000000..249c4ef840d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/stack_macros.h
@@ -0,0 +1,139 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef STACK_MACROS_H
+#define STACK_MACROS_H
+
+/*
+ * Call the stack overflow hook function if the stack of the task being swapped
+ * out is currently overflowed, or looks like it might have overflowed in the
+ * past.
+ *
+ * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
+ * the current stack state only - comparing the current top of stack value to
+ * the stack limit.  Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
+ * will also cause the last few stack bytes to be checked to ensure the value
+ * to which the bytes were set when the task was created have not been
+ * overwritten.  Note this second test does not guarantee that an overflowed
+ * stack will always be recognised.
+ */
+
+/*-----------------------------------------------------------*/
+
+#if( configCHECK_FOR_STACK_OVERFLOW == 0 )
+
+    /* FreeRTOSConfig.h is not set to check for stack overflows. */
+    #define taskFIRST_CHECK_FOR_STACK_OVERFLOW()
+    #define taskSECOND_CHECK_FOR_STACK_OVERFLOW()
+
+#endif /* configCHECK_FOR_STACK_OVERFLOW == 0 */
+/*-----------------------------------------------------------*/
+
+#if( configCHECK_FOR_STACK_OVERFLOW == 1 )
+
+    /* FreeRTOSConfig.h is only set to use the first method of
+    overflow checking. */
+    #define taskSECOND_CHECK_FOR_STACK_OVERFLOW()
+
+#endif
+/*-----------------------------------------------------------*/
+
+#if( ( configCHECK_FOR_STACK_OVERFLOW > 0 ) && ( portSTACK_GROWTH < 0 ) )
+
+/* Only the current stack state is to be checked. */
+    #define taskFIRST_CHECK_FOR_STACK_OVERFLOW()                                                        \
+    {                                                                                                 \
+        /* Is the currently saved stack pointer within the stack limit? */                            \
+        if( pxCurrentTCB[ xPortGetCoreID() ]->pxTopOfStack <= pxCurrentTCB[ xPortGetCoreID() ]->pxStack )                                       \
+        {                                                                                             \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB[ xPortGetCoreID() ], pxCurrentTCB[ xPortGetCoreID() ]->pcTaskName );   \
+        }                                                                                             \
+    }
+
+#endif /* configCHECK_FOR_STACK_OVERFLOW > 0 */
+/*-----------------------------------------------------------*/
+
+#if( ( configCHECK_FOR_STACK_OVERFLOW > 0 ) && ( portSTACK_GROWTH > 0 ) )
+
+/* Only the current stack state is to be checked. */
+    #define taskFIRST_CHECK_FOR_STACK_OVERFLOW()                                                        \
+    {                                                                                                 \
+                                                                                                      \
+        /* Is the currently saved stack pointer within the stack limit? */                            \
+        if( pxCurrentTCB[ xPortGetCoreID() ]->pxTopOfStack >= pxCurrentTCB[ xPortGetCoreID() ]->pxEndOfStack )                                  \
+        {                                                                                             \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB[ xPortGetCoreID() ], pxCurrentTCB[ xPortGetCoreID() ]->pcTaskName );   \
+        }                                                                                             \
+    }
+
+#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
+/*-----------------------------------------------------------*/
+
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
+
+    #define taskSECOND_CHECK_FOR_STACK_OVERFLOW()                                                                                       \
+    {                                                                                                 \
+    static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,     \
+                                                    tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,     \
+                                                    tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,     \
+                                                    tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,     \
+                                                    tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE };   \
+                                                                                                      \
+                                                                                                                                        \
+        /* Has the extremity of the task stack ever been written over? */                                                               \
+        if( memcmp( ( void * ) pxCurrentTCB[ xPortGetCoreID() ]->pxStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )          \
+        {                                                                                             \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB[ xPortGetCoreID() ], pxCurrentTCB[ xPortGetCoreID() ]->pcTaskName );                                   \
+        }                                                                                             \
+    }
+
+#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
+/*-----------------------------------------------------------*/
+
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
+
+    #define taskSECOND_CHECK_FOR_STACK_OVERFLOW()                                                                                       \
+    {                                                                                                                                     \
+        int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB[ xPortGetCoreID() ]->pxEndOfStack;                                                                     \
+        static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
+                                                                                                                                          \
+                                                                                                                                          \
+        pcEndOfStack -= sizeof( ucExpectedStackBytes );                                                                                   \
+                                                                                                                                          \
+        /* Has the extremity of the task stack ever been written over? */                                                                 \
+        if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )                     \
+        {                                                                                                                                 \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB[ xPortGetCoreID() ], pxCurrentTCB[ xPortGetCoreID() ]->pcTaskName );                                   \
+        }                                                                                                                                 \
+    }
+
+#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
+
+#endif /* STACK_MACROS_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/stream_buffer.h b/tools/sdk/esp32s3/include/freertos/include/freertos/stream_buffer.h
new file mode 100644
index 00000000000..a20dcf0375e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/stream_buffer.h
@@ -0,0 +1,931 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/*
+ * Stream buffers are used to send a continuous stream of data from one task or
+ * interrupt to another.  Their implementation is light weight, making them
+ * particularly suited for interrupt to task and core to core communication
+ * scenarios.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferReceive()) inside a critical section section and set the
+ * receive block time to 0.
+ *
+ */
+
+#ifndef STREAM_BUFFER_H
+#define STREAM_BUFFER_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h must appear in source files before include stream_buffer.h"
+#endif
+
+/* *INDENT-OFF* */
+#if defined( __cplusplus )
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/**
+ * Type by which stream buffers are referenced.  For example, a call to
+ * xStreamBufferCreate() returns an StreamBufferHandle_t variable that can
+ * then be used as a parameter to xStreamBufferSend(), xStreamBufferReceive(),
+ * etc.
+ */
+struct StreamBufferDef_t;
+typedef struct StreamBufferDef_t * StreamBufferHandle_t;
+
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * message_buffer.h
+ *
+ * @code{c}
+ * StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes );
+ * @endcode
+ * @endcond
+ *
+ * Creates a new stream buffer using dynamically allocated memory.  See
+ * xStreamBufferCreateStatic() for a version that uses statically allocated
+ * memory (memory that is allocated at compile time).
+ *
+ * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
+ * FreeRTOSConfig.h for xStreamBufferCreate() to be available.
+ *
+ * @param xBufferSizeBytes The total number of bytes the stream buffer will be
+ * able to hold at any one time.
+ *
+ * @param xTriggerLevelBytes The number of bytes that must be in the stream
+ * buffer before a task that is blocked on the stream buffer to wait for data is
+ * moved out of the blocked state.  For example, if a task is blocked on a read
+ * of an empty stream buffer that has a trigger level of 1 then the task will be
+ * unblocked when a single byte is written to the buffer or the task's block
+ * time expires.  As another example, if a task is blocked on a read of an empty
+ * stream buffer that has a trigger level of 10 then the task will not be
+ * unblocked until the stream buffer contains at least 10 bytes or the task's
+ * block time expires.  If a reading task's block time expires before the
+ * trigger level is reached then the task will still receive however many bytes
+ * are actually available.  Setting a trigger level of 0 will result in a
+ * trigger level of 1 being used.  It is not valid to specify a trigger level
+ * that is greater than the buffer size.
+ *
+ * @return If NULL is returned, then the stream buffer cannot be created
+ * because there is insufficient heap memory available for FreeRTOS to allocate
+ * the stream buffer data structures and storage area.  A non-NULL value being
+ * returned indicates that the stream buffer has been created successfully -
+ * the returned value should be stored as the handle to the created stream
+ * buffer.
+ *
+ * Example use:
+ * @code{c}
+ *
+ * void vAFunction( void )
+ * {
+ * StreamBufferHandle_t xStreamBuffer;
+ * const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10;
+ *
+ *  // Create a stream buffer that can hold 100 bytes.  The memory used to hold
+ *  // both the stream buffer structure and the data in the stream buffer is
+ *  // allocated dynamically.
+ *  xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel );
+ *
+ *  if( xStreamBuffer == NULL )
+ *  {
+ *      // There was not enough heap memory space available to create the
+ *      // stream buffer.
+ *  }
+ *  else
+ *  {
+ *      // The stream buffer was created successfully and can now be used.
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferCreate xStreamBufferCreate
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes )    xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,
+ *                                              size_t xTriggerLevelBytes,
+ *                                              uint8_t *pucStreamBufferStorageArea,
+ *                                              StaticStreamBuffer_t *pxStaticStreamBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Creates a new stream buffer using statically allocated memory.  See
+ * xStreamBufferCreate() for a version that uses dynamically allocated memory.
+ *
+ * configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h for
+ * xStreamBufferCreateStatic() to be available.
+ *
+ * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
+ * pucStreamBufferStorageArea parameter.
+ *
+ * @param xTriggerLevelBytes The number of bytes that must be in the stream
+ * buffer before a task that is blocked on the stream buffer to wait for data is
+ * moved out of the blocked state.  For example, if a task is blocked on a read
+ * of an empty stream buffer that has a trigger level of 1 then the task will be
+ * unblocked when a single byte is written to the buffer or the task's block
+ * time expires.  As another example, if a task is blocked on a read of an empty
+ * stream buffer that has a trigger level of 10 then the task will not be
+ * unblocked until the stream buffer contains at least 10 bytes or the task's
+ * block time expires.  If a reading task's block time expires before the
+ * trigger level is reached then the task will still receive however many bytes
+ * are actually available.  Setting a trigger level of 0 will result in a
+ * trigger level of 1 being used.  It is not valid to specify a trigger level
+ * that is greater than the buffer size.
+ *
+ * @param pucStreamBufferStorageArea Must point to a uint8_t array that is at
+ * least xBufferSizeBytes + 1 big.  This is the array to which streams are
+ * copied when they are written to the stream buffer.
+ *
+ * @param pxStaticStreamBuffer Must point to a variable of type
+ * StaticStreamBuffer_t, which will be used to hold the stream buffer's data
+ * structure.
+ *
+ * @return If the stream buffer is created successfully then a handle to the
+ * created stream buffer is returned. If either pucStreamBufferStorageArea or
+ * pxStaticstreamBuffer are NULL then NULL is returned.
+ *
+ * Example use:
+ * @code{c}
+ *
+ * // Used to dimension the array used to hold the streams.  The available space
+ * // will actually be one less than this, so 999.
+ * #define STORAGE_SIZE_BYTES 1000
+ *
+ * // Defines the memory that will actually hold the streams within the stream
+ * // buffer.
+ * static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
+ *
+ * // The variable used to hold the stream buffer structure.
+ * StaticStreamBuffer_t xStreamBufferStruct;
+ *
+ * void MyFunction( void )
+ * {
+ * StreamBufferHandle_t xStreamBuffer;
+ * const size_t xTriggerLevel = 1;
+ *
+ *  xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ),
+ *                                             xTriggerLevel,
+ *                                             ucBufferStorage,
+ *                                             &xStreamBufferStruct );
+ *
+ *  // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer
+ *  // parameters were NULL, xStreamBuffer will not be NULL, and can be used to
+ *  // reference the created stream buffer in other stream buffer API calls.
+ *
+ *  // Other code that uses the stream buffer can go here.
+ * }
+ *
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) \
+    xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+ *                        const void *pvTxData,
+ *                        size_t xDataLengthBytes,
+ *                        TickType_t xTicksToWait );
+ * @endcode
+ * @endcond
+ *
+ * Sends bytes to a stream buffer.  The bytes are copied into the stream buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferReceive()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xStreamBufferSend() to write to a stream buffer from a task.  Use
+ * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer to which a stream is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the buffer that holds the bytes to be copied
+ * into the stream buffer.
+ *
+ * @param xDataLengthBytes   The maximum number of bytes to copy from pvTxData
+ * into the stream buffer.
+ *
+ * @param xTicksToWait The maximum amount of time the task should remain in the
+ * Blocked state to wait for enough space to become available in the stream
+ * buffer, should the stream buffer contain too little space to hold the
+ * another xDataLengthBytes bytes.  The block time is specified in tick periods,
+ * so the absolute time it represents is dependent on the tick frequency.  The
+ * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds
+ * into a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will
+ * cause the task to wait indefinitely (without timing out), provided
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  If a task times out
+ * before it can write all xDataLengthBytes into the buffer it will still write
+ * as many bytes as possible.  A task does not use any CPU time when it is in
+ * the blocked state.
+ *
+ * @return The number of bytes written to the stream buffer.  If a task times
+ * out before it can write all xDataLengthBytes into the buffer it will still
+ * write as many bytes as possible.
+ *
+ * Example use:
+ * @code{c}
+ * void vAFunction( StreamBufferHandle_t xStreamBuffer )
+ * {
+ * size_t xBytesSent;
+ * uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
+ * char *pcStringToSend = "String to send";
+ * const TickType_t x100ms = pdMS_TO_TICKS( 100 );
+ *
+ *  // Send an array to the stream buffer, blocking for a maximum of 100ms to
+ *  // wait for enough space to be available in the stream buffer.
+ *  xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
+ *
+ *  if( xBytesSent != sizeof( ucArrayToSend ) )
+ *  {
+ *      // The call to xStreamBufferSend() times out before there was enough
+ *      // space in the buffer for the data to be written, but it did
+ *      // successfully write xBytesSent bytes.
+ *  }
+ *
+ *  // Send the string to the stream buffer.  Return immediately if there is not
+ *  // enough space in the buffer.
+ *  xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
+ *
+ *  if( xBytesSent != strlen( pcStringToSend ) )
+ *  {
+ *      // The entire string could not be added to the stream buffer because
+ *      // there was not enough free space in the buffer, but xBytesSent bytes
+ *      // were sent.  Could try again to send the remaining bytes.
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferSend xStreamBufferSend
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+                          const void * pvTxData,
+                          size_t xDataLengthBytes,
+                          TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
+ *                               const void *pvTxData,
+ *                               size_t xDataLengthBytes,
+ *                               BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * Interrupt safe version of the API function that sends a stream of bytes to
+ * the stream buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferReceive()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xStreamBufferSend() to write to a stream buffer from a task.  Use
+ * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer to which a stream is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the data that is to be copied into the stream
+ * buffer.
+ *
+ * @param xDataLengthBytes The maximum number of bytes to copy from pvTxData
+ * into the stream buffer.
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a stream buffer will
+ * have a task blocked on it waiting for data.  Calling
+ * xStreamBufferSendFromISR() can make data available, and so cause a task that
+ * was waiting for data to leave the Blocked state.  If calling
+ * xStreamBufferSendFromISR() causes a task to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently executing task (the
+ * task that was interrupted), then, internally, xStreamBufferSendFromISR()
+ * will set *pxHigherPriorityTaskWoken to pdTRUE.  If
+ * xStreamBufferSendFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  This will
+ * ensure that the interrupt returns directly to the highest priority Ready
+ * state task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it
+ * is passed into the function.  See the example code below for an example.
+ *
+ * @return The number of bytes actually written to the stream buffer, which will
+ * be less than xDataLengthBytes if the stream buffer didn't have enough free
+ * space for all the bytes to be written.
+ *
+ * Example use:
+ * @code{c}
+ * // A stream buffer that has already been created.
+ * StreamBufferHandle_t xStreamBuffer;
+ *
+ * void vAnInterruptServiceRoutine( void )
+ * {
+ * size_t xBytesSent;
+ * char *pcStringToSend = "String to send";
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
+ *
+ *  // Attempt to send the string to the stream buffer.
+ *  xBytesSent = xStreamBufferSendFromISR( xStreamBuffer,
+ *                                         ( void * ) pcStringToSend,
+ *                                         strlen( pcStringToSend ),
+ *                                         &xHigherPriorityTaskWoken );
+ *
+ *  if( xBytesSent != strlen( pcStringToSend ) )
+ *  {
+ *      // There was not enough free space in the stream buffer for the entire
+ *      // string to be written, ut xBytesSent bytes were written.
+ *  }
+ *
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
+ *  // xStreamBufferSendFromISR() then a task that has a priority above the
+ *  // priority of the currently executing task was unblocked and a context
+ *  // switch should be performed to ensure the ISR returns to the unblocked
+ *  // task.  In most FreeRTOS ports this is done by simply passing
+ *  // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
+ *  // variables value, and perform the context switch if necessary.  Check the
+ *  // documentation for the port in use for port specific instructions.
+ *  taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
+                                 const void * pvTxData,
+                                 size_t xDataLengthBytes,
+                                 BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+ *                           void *pvRxData,
+ *                           size_t xBufferLengthBytes,
+ *                           TickType_t xTicksToWait );
+ * @endcode
+ * @endcond
+ *
+ * Receives bytes from a stream buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferReceive()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xStreamBufferReceive() to read from a stream buffer from a task.  Use
+ * xStreamBufferReceiveFromISR() to read from a stream buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer from which bytes are to
+ * be received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received bytes will be
+ * copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the
+ * pvRxData parameter.  This sets the maximum number of bytes to receive in one
+ * call.  xStreamBufferReceive will return as many bytes as possible up to a
+ * maximum set by xBufferLengthBytes.
+ *
+ * @param xTicksToWait The maximum amount of time the task should remain in the
+ * Blocked state to wait for data to become available if the stream buffer is
+ * empty.  xStreamBufferReceive() will return immediately if xTicksToWait is
+ * zero.  The block time is specified in tick periods, so the absolute time it
+ * represents is dependent on the tick frequency.  The macro pdMS_TO_TICKS() can
+ * be used to convert a time specified in milliseconds into a time specified in
+ * ticks.  Setting xTicksToWait to portMAX_DELAY will cause the task to wait
+ * indefinitely (without timing out), provided INCLUDE_vTaskSuspend is set to 1
+ * in FreeRTOSConfig.h.  A task does not use any CPU time when it is in the
+ * Blocked state.
+ *
+ * @return The number of bytes actually read from the stream buffer, which will
+ * be less than xBufferLengthBytes if the call to xStreamBufferReceive() timed
+ * out before xBufferLengthBytes were available.
+ *
+ * Example use:
+ * @code{c}
+ * void vAFunction( StreamBuffer_t xStreamBuffer )
+ * {
+ * uint8_t ucRxData[ 20 ];
+ * size_t xReceivedBytes;
+ * const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
+ *
+ *  // Receive up to another sizeof( ucRxData ) bytes from the stream buffer.
+ *  // Wait in the Blocked state (so not using any CPU processing time) for a
+ *  // maximum of 100ms for the full sizeof( ucRxData ) number of bytes to be
+ *  // available.
+ *  xReceivedBytes = xStreamBufferReceive( xStreamBuffer,
+ *                                         ( void * ) ucRxData,
+ *                                         sizeof( ucRxData ),
+ *                                         xBlockTime );
+ *
+ *  if( xReceivedBytes > 0 )
+ *  {
+ *      // A ucRxData contains another xRecievedBytes bytes of data, which can
+ *      // be processed here....
+ *  }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferReceive xStreamBufferReceive
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+                             void * pvRxData,
+                             size_t xBufferLengthBytes,
+                             TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
+ *                                  void *pvRxData,
+ *                                  size_t xBufferLengthBytes,
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * An interrupt safe version of the API function that receives bytes from a
+ * stream buffer.
+ *
+ * Use xStreamBufferReceive() to read bytes from a stream buffer from a task.
+ * Use xStreamBufferReceiveFromISR() to read bytes from a stream buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer from which a stream
+ * is being received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received bytes are
+ * copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the
+ * pvRxData parameter.  This sets the maximum number of bytes to receive in one
+ * call.  xStreamBufferReceive will return as many bytes as possible up to a
+ * maximum set by xBufferLengthBytes.
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a stream buffer will
+ * have a task blocked on it waiting for space to become available.  Calling
+ * xStreamBufferReceiveFromISR() can make space available, and so cause a task
+ * that is waiting for space to leave the Blocked state.  If calling
+ * xStreamBufferReceiveFromISR() causes a task to leave the Blocked state, and
+ * the unblocked task has a priority higher than the currently executing task
+ * (the task that was interrupted), then, internally,
+ * xStreamBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE.
+ * If xStreamBufferReceiveFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  That will
+ * ensure the interrupt returns directly to the highest priority Ready state
+ * task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it is
+ * passed into the function.  See the code example below for an example.
+ *
+ * @return The number of bytes read from the stream buffer, if any.
+ *
+ * Example use:
+ * @code{c}
+ * // A stream buffer that has already been created.
+ * StreamBuffer_t xStreamBuffer;
+ *
+ * void vAnInterruptServiceRoutine( void )
+ * {
+ * uint8_t ucRxData[ 20 ];
+ * size_t xReceivedBytes;
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
+ *
+ *  // Receive the next stream from the stream buffer.
+ *  xReceivedBytes = xStreamBufferReceiveFromISR( xStreamBuffer,
+ *                                                ( void * ) ucRxData,
+ *                                                sizeof( ucRxData ),
+ *                                                &xHigherPriorityTaskWoken );
+ *
+ *  if( xReceivedBytes > 0 )
+ *  {
+ *      // ucRxData contains xReceivedBytes read from the stream buffer.
+ *      // Process the stream here....
+ *  }
+ *
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
+ *  // xStreamBufferReceiveFromISR() then a task that has a priority above the
+ *  // priority of the currently executing task was unblocked and a context
+ *  // switch should be performed to ensure the ISR returns to the unblocked
+ *  // task.  In most FreeRTOS ports this is done by simply passing
+ *  // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
+ *  // variables value, and perform the context switch if necessary.  Check the
+ *  // documentation for the port in use for port specific instructions.
+ *  taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
+                                    void * pvRxData,
+                                    size_t xBufferLengthBytes,
+                                    BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Deletes a stream buffer that was previously created using a call to
+ * xStreamBufferCreate() or xStreamBufferCreateStatic().  If the stream
+ * buffer was created using dynamic memory (that is, by xStreamBufferCreate()),
+ * then the allocated memory is freed.
+ *
+ * A stream buffer handle must not be used after the stream buffer has been
+ * deleted.
+ *
+ * @param xStreamBuffer The handle of the stream buffer to be deleted.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vStreamBufferDelete vStreamBufferDelete
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Queries a stream buffer to see if it is full.  A stream buffer is full if it
+ * does not have any free space, and therefore cannot accept any more data.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return If the stream buffer is full then pdTRUE is returned.  Otherwise
+ * pdFALSE is returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferIsFull xStreamBufferIsFull
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Queries a stream buffer to see if it is empty.  A stream buffer is empty if
+ * it does not contain any data.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return If the stream buffer is empty then pdTRUE is returned.  Otherwise
+ * pdFALSE is returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferIsEmpty xStreamBufferIsEmpty
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Resets a stream buffer to its initial, empty, state.  Any data that was in
+ * the stream buffer is discarded.  A stream buffer can only be reset if there
+ * are no tasks blocked waiting to either send to or receive from the stream
+ * buffer.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being reset.
+ *
+ * @return If the stream buffer is reset then pdPASS is returned.  If there was
+ * a task blocked waiting to send to or read from the stream buffer then the
+ * stream buffer is not reset and pdFAIL is returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferReset xStreamBufferReset
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Queries a stream buffer to see how much free space it contains, which is
+ * equal to the amount of data that can be sent to the stream buffer before it
+ * is full.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return The number of bytes that can be written to the stream buffer before
+ * the stream buffer would be full.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferSpacesAvailable xStreamBufferSpacesAvailable
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer );
+ * @endcode
+ * @endcond
+ *
+ * Queries a stream buffer to see how much data it contains, which is equal to
+ * the number of bytes that can be read from the stream buffer before the stream
+ * buffer would be empty.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return The number of bytes that can be read from the stream buffer before
+ * the stream buffer would be empty.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferBytesAvailable xStreamBufferBytesAvailable
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel );
+ * @endcode
+ * @endcond
+ *
+ * A stream buffer's trigger level is the number of bytes that must be in the
+ * stream buffer before a task that is blocked on the stream buffer to
+ * wait for data is moved out of the blocked state.  For example, if a task is
+ * blocked on a read of an empty stream buffer that has a trigger level of 1
+ * then the task will be unblocked when a single byte is written to the buffer
+ * or the task's block time expires.  As another example, if a task is blocked
+ * on a read of an empty stream buffer that has a trigger level of 10 then the
+ * task will not be unblocked until the stream buffer contains at least 10 bytes
+ * or the task's block time expires.  If a reading task's block time expires
+ * before the trigger level is reached then the task will still receive however
+ * many bytes are actually available.  Setting a trigger level of 0 will result
+ * in a trigger level of 1 being used.  It is not valid to specify a trigger
+ * level that is greater than the buffer size.
+ *
+ * A trigger level is set when the stream buffer is created, and can be modified
+ * using xStreamBufferSetTriggerLevel().
+ *
+ * @param xStreamBuffer The handle of the stream buffer being updated.
+ *
+ * @param xTriggerLevel The new trigger level for the stream buffer.
+ *
+ * @return If xTriggerLevel was less than or equal to the stream buffer's length
+ * then the trigger level will be updated and pdTRUE is returned.  Otherwise
+ * pdFALSE is returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
+                                         size_t xTriggerLevel ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * For advanced users only.
+ *
+ * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is sent to a message buffer or stream buffer.  If there was a task that
+ * was blocked on the message or stream buffer waiting for data to arrive then
+ * the sbSEND_COMPLETED() macro sends a notification to the task to remove it
+ * from the Blocked state.  xStreamBufferSendCompletedFromISR() does the same
+ * thing.  It is provided to enable application writers to implement their own
+ * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xStreamBuffer The handle of the stream buffer to which data was
+ * written.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xStreamBufferSendCompletedFromISR().  If calling
+ * xStreamBufferSendCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
+                                              BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * stream_buffer.h
+ *
+ * @code{c}
+ * BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * For advanced users only.
+ *
+ * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is read out of a message buffer or stream buffer.  If there was a task
+ * that was blocked on the message or stream buffer waiting for data to arrive
+ * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to
+ * remove it from the Blocked state.  xStreamBufferReceiveCompletedFromISR()
+ * does the same thing.  It is provided to enable application writers to
+ * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT
+ * ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xStreamBuffer The handle of the stream buffer from which data was
+ * read.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xStreamBufferReceiveCompletedFromISR().  If calling
+ * xStreamBufferReceiveCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR
+ * @endcond
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
+                                                 BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
+/* Functions below here are not part of the public API. */
+StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
+                                                 size_t xTriggerLevelBytes,
+                                                 BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION;
+
+StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
+                                                       size_t xTriggerLevelBytes,
+                                                       BaseType_t xIsMessageBuffer,
+                                                       uint8_t * const pucStreamBufferStorageArea,
+                                                       StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
+
+size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+    void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer,
+                                             UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION;
+    UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+    uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+#endif
+
+/** @endcond */
+
+/* *INDENT-OFF* */
+#if defined( __cplusplus )
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* !defined( STREAM_BUFFER_H ) */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/task.h b/tools/sdk/esp32s3/include/freertos/include/freertos/task.h
new file mode 100644
index 00000000000..125a924d061
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/task.h
@@ -0,0 +1,3512 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+
+#ifndef INC_TASK_H
+#define INC_TASK_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h must appear in source files before include task.h"
+#endif
+
+#include "list.h"
+#ifdef ESP_PLATFORM // IDF-3793
+#include "freertos/portmacro.h"
+#endif // ESP_PLATFORM
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*-----------------------------------------------------------
+ * MACROS AND DEFINITIONS
+ *----------------------------------------------------------*/
+
+#define tskKERNEL_VERSION_NUMBER       "V10.4.3"
+#define tskKERNEL_VERSION_MAJOR        10
+#define tskKERNEL_VERSION_MINOR        4
+#define tskKERNEL_VERSION_BUILD        3
+
+/* MPU region parameters passed in ulParameters
+ * of MemoryRegion_t struct. */
+#define tskMPU_REGION_READ_ONLY        ( 1UL << 0UL )
+#define tskMPU_REGION_READ_WRITE       ( 1UL << 1UL )
+#define tskMPU_REGION_EXECUTE_NEVER    ( 1UL << 2UL )
+#define tskMPU_REGION_NORMAL_MEMORY    ( 1UL << 3UL )
+#define tskMPU_REGION_DEVICE_MEMORY    ( 1UL << 4UL )
+
+/* The direct to task notification feature used to have only a single notification
+ * per task.  Now there is an array of notifications per task that is dimensioned by
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES.  For backward compatibility, any use of the
+ * original direct to task notification defaults to using the first index in the
+ * array. */
+#define tskDEFAULT_INDEX_TO_NOTIFY     ( 0 )
+
+#define tskNO_AFFINITY  ( 0x7FFFFFFF )
+
+/**
+ * task. h
+ *
+ * Type by which tasks are referenced.  For example, a call to xTaskCreate
+ * returns (via a pointer parameter) an TaskHandle_t variable that can then
+ * be used as a parameter to vTaskDelete to delete the task.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup TaskHandle_t TaskHandle_t
+ * @endcond
+ * \ingroup Tasks
+ */
+struct tskTaskControlBlock;     /* The old naming convention is used to prevent breaking kernel aware debuggers. */
+#ifdef ESP_PLATFORM // IDF-3769
+typedef void* TaskHandle_t;
+#else
+typedef struct tskTaskControlBlock* TaskHandle_t;
+#endif // ESP_PLATFORM
+/**
+ * Defines the prototype to which the application task hook function must
+ * conform.
+ */
+typedef BaseType_t (* TaskHookFunction_t)( void * );
+
+/** Task states returned by eTaskGetState. */
+typedef enum
+{
+    eRunning = 0,     /* A task is querying the state of itself, so must be running. */
+    eReady,           /* The task being queried is in a read or pending ready list. */
+    eBlocked,         /* The task being queried is in the Blocked state. */
+    eSuspended,       /* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */
+    eDeleted,         /* The task being queried has been deleted, but its TCB has not yet been freed. */
+    eInvalid          /* Used as an 'invalid state' value. */
+} eTaskState;
+
+/* Actions that can be performed when vTaskNotify() is called. */
+typedef enum
+{
+    eNoAction = 0,                /* Notify the task without updating its notify value. */
+    eSetBits,                     /* Set bits in the task's notification value. */
+    eIncrement,                   /* Increment the task's notification value. */
+    eSetValueWithOverwrite,       /* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */
+    eSetValueWithoutOverwrite     /* Set the task's notification value if the previous value has been read by the task. */
+} eNotifyAction;
+
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
+/**
+ * Used internally only.
+ */
+typedef struct xTIME_OUT
+{
+    BaseType_t xOverflowCount;
+    TickType_t xTimeOnEntering;
+} TimeOut_t;
+
+/**
+ * Defines the memory ranges allocated to the task when an MPU is used.
+ */
+typedef struct xMEMORY_REGION
+{
+    void * pvBaseAddress;
+    uint32_t ulLengthInBytes;
+    uint32_t ulParameters;
+} MemoryRegion_t;
+
+/*
+ * Parameters required to create an MPU protected task.
+ */
+typedef struct xTASK_PARAMETERS
+{
+    TaskFunction_t pvTaskCode;
+    const char * const pcName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    configSTACK_DEPTH_TYPE usStackDepth;
+    void * pvParameters;
+    UBaseType_t uxPriority;
+    StackType_t * puxStackBuffer;
+    MemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ];
+    #if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+        StaticTask_t * const pxTaskBuffer;
+    #endif
+} TaskParameters_t;
+
+/* Used with the uxTaskGetSystemState() function to return the state of each task
+ * in the system. */
+typedef struct xTASK_STATUS
+{
+    TaskHandle_t xHandle;                            /* The handle of the task to which the rest of the information in the structure relates. */
+    const char * pcTaskName;                         /* A pointer to the task's name.  This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    UBaseType_t xTaskNumber;                         /* A number unique to the task. */
+    eTaskState eCurrentState;                        /* The state in which the task existed when the structure was populated. */
+    UBaseType_t uxCurrentPriority;                   /* The priority at which the task was running (may be inherited) when the structure was populated. */
+    UBaseType_t uxBasePriority;                      /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex.  Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */
+    uint32_t ulRunTimeCounter;                       /* The total run time allocated to the task so far, as defined by the run time stats clock.  See https://www.FreeRTOS.org/rtos-run-time-stats.html.  Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */
+    StackType_t * pxStackBase;                       /* Points to the lowest address of the task's stack area. */
+    configSTACK_DEPTH_TYPE usStackHighWaterMark;     /* The minimum amount of stack space that has remained for the task since the task was created.  The closer this value is to zero the closer the task has come to overflowing its stack. */
+#if configTASKLIST_INCLUDE_COREID
+    BaseType_t xCoreID;                              /*!< Core this task is pinned to (0, 1, or -1 for tskNO_AFFINITY). This field is present if CONFIG_FREERTOS_VTASKLIST_INCLUDE_COREID is set. */
+#endif
+} TaskStatus_t;
+
+/** @endcond */
+
+/**
+ * Possible return values for eTaskConfirmSleepModeStatus().
+ */
+typedef enum
+{
+    eAbortSleep = 0,           /* A task has been made ready or a context switch pended since portSUPPORESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */
+    eStandardSleep,            /* Enter a sleep mode that will not last any longer than the expected idle time. */
+    eNoTasksWaitingTimeout     /* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */
+} eSleepModeStatus;
+
+/**
+ * Defines the priority used by the idle task.  This must not be modified.
+ *
+ * \ingroup TaskUtils
+ */
+#define tskIDLE_PRIORITY    ( ( UBaseType_t ) 0U )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @endcond
+ *
+ * Macro for forcing a context switch.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup taskYIELD taskYIELD
+ * @endcond
+ * \ingroup SchedulerControl
+ */
+#define taskYIELD()                        portYIELD()
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @endcond
+ *
+ * Macro to mark the start of a critical code region.  Preemptive context
+ * switches cannot occur when in a critical region.
+ *
+ * @note This may alter the stack (depending on the portable implementation)
+ * so must be used with care!
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup taskENTER_CRITICAL taskENTER_CRITICAL
+ * @endcond
+ * \ingroup SchedulerControl
+ */
+#ifdef ESP_PLATFORM
+#define taskENTER_CRITICAL( x )   portENTER_CRITICAL( x )
+#else
+#define taskENTER_CRITICAL( )     portENTER_CRITICAL( )
+#endif //  ESP_PLATFORM
+#define taskENTER_CRITICAL_FROM_ISR( ) portSET_INTERRUPT_MASK_FROM_ISR()
+
+#ifdef ESP_PLATFORM
+#define taskENTER_CRITICAL_ISR( x )   portENTER_CRITICAL_ISR( x )
+#else
+#define taskENTER_CRITICAL_ISR( )     portENTER_CRITICAL_ISR( )
+#endif //  ESP_PLATFORM
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @endcond
+ *
+ * Macro to mark the end of a critical code region.  Preemptive context
+ * switches cannot occur when in a critical region.
+ *
+ * @note This may alter the stack (depending on the portable implementation)
+ * so must be used with care!
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup taskEXIT_CRITICAL taskEXIT_CRITICAL
+ * @endcond
+ * \ingroup SchedulerControl
+ */
+
+#ifdef ESP_PLATFORM
+#define taskEXIT_CRITICAL( x )          portEXIT_CRITICAL( x )
+#else
+#define taskEXIT_CRITICAL( )            portEXIT_CRITICAL( )
+#endif // ESP_PLATFORM
+#define taskEXIT_CRITICAL_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( x )
+
+#ifdef ESP_PLATFORM
+#define taskEXIT_CRITICAL_ISR( x )      portEXIT_CRITICAL_ISR( x )
+#else
+#define taskEXIT_CRITICAL_ISR( )        portEXIT_CRITICAL_ISR( )
+#endif // ESP_PLATFORM
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @endcond
+ *
+ * Macro to disable all maskable interrupts.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS
+ * @endcond
+ * \ingroup SchedulerControl
+ */
+#define taskDISABLE_INTERRUPTS()           portDISABLE_INTERRUPTS()
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @endcond
+ *
+ * Macro to enable microcontroller interrupts.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS
+ * @endcond
+ * \ingroup SchedulerControl
+ */
+#define taskENABLE_INTERRUPTS()            portENABLE_INTERRUPTS()
+
+/* Definitions returned by xTaskGetSchedulerState().  taskSCHEDULER_SUSPENDED is
+ * 0 to generate more optimal code when configASSERT() is defined as the constant
+ * is used in assert() statements. */
+#define taskSCHEDULER_SUSPENDED      ( ( BaseType_t ) 0 )
+#define taskSCHEDULER_NOT_STARTED    ( ( BaseType_t ) 1 )
+#define taskSCHEDULER_RUNNING        ( ( BaseType_t ) 2 )
+
+
+/*-----------------------------------------------------------
+ * TASK CREATION API
+ *----------------------------------------------------------*/
+
+/**
+ * Create a new task with a specified affinity.
+ *
+ * This function is similar to xTaskCreate, but allows setting task affinity
+ * in SMP system.
+ *
+ * @param pvTaskCode Pointer to the task entry function.  Tasks
+ * must be implemented to never return (i.e. continuous loop), or should be
+ * terminated using vTaskDelete function.
+ *
+ * @param pcName A descriptive name for the task.  This is mainly used to
+ * facilitate debugging.  Max length defined by configMAX_TASK_NAME_LEN - default
+ * is 16.
+ *
+ * @param usStackDepth The size of the task stack specified as the number of
+ * bytes. Note that this differs from vanilla FreeRTOS.
+ *
+ * @param pvParameters Pointer that will be used as the parameter for the task
+ * being created.
+ *
+ * @param uxPriority The priority at which the task should run.  Systems that
+ * include MPU support can optionally create tasks in a privileged (system)
+ * mode by setting bit portPRIVILEGE_BIT of the priority parameter.  For
+ * example, to create a privileged task at priority 2 the uxPriority parameter
+ * should be set to ( 2 | portPRIVILEGE_BIT ).
+ *
+ * @param pvCreatedTask Used to pass back a handle by which the created task
+ * can be referenced.
+ *
+ * @param xCoreID If the value is tskNO_AFFINITY, the created task is not
+ * pinned to any CPU, and the scheduler can run it on any core available.
+ * Values 0 or 1 indicate the index number of the CPU which the task should
+ * be pinned to. Specifying values larger than (portNUM_PROCESSORS - 1) will
+ * cause the function to fail.
+ *
+ * @return pdPASS if the task was successfully created and added to a ready
+ * list, otherwise an error code defined in the file projdefs.h
+ *
+ * \ingroup Tasks
+ */
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    BaseType_t xTaskCreatePinnedToCore( TaskFunction_t pvTaskCode,
+                                        const char * const pcName,
+                                        const uint32_t usStackDepth,
+                                        void * const pvParameters,
+                                        UBaseType_t uxPriority,
+                                        TaskHandle_t * const pvCreatedTask,
+                                        const BaseType_t xCoreID);
+
+#endif
+
+/**
+ * Create a new task and add it to the list of tasks that are ready to run.
+ *
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
+ * memory.  The first block is used to hold the task's data structures.  The
+ * second block is used by the task as its stack.  If a task is created using
+ * xTaskCreate() then both blocks of memory are automatically dynamically
+ * allocated inside the xTaskCreate() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a task is created using
+ * xTaskCreateStatic() then the application writer must provide the required
+ * memory.  xTaskCreateStatic() therefore allows a task to be created without
+ * using any dynamic memory allocation.
+ *
+ * See xTaskCreateStatic() for a version that does not use any dynamic memory
+ * allocation.
+ *
+ * xTaskCreate() can only be used to create a task that has unrestricted
+ * access to the entire microcontroller memory map.  Systems that include MPU
+ * support can alternatively create an MPU constrained task using
+ * xTaskCreateRestricted().
+ *
+ * @param pvTaskCode Pointer to the task entry function.  Tasks
+ * must be implemented to never return (i.e. continuous loop), or should be
+ * terminated using vTaskDelete function.
+ *
+ * @param pcName A descriptive name for the task.  This is mainly used to
+ * facilitate debugging.  Max length defined by configMAX_TASK_NAME_LEN - default
+ * is 16.
+ *
+ * @param usStackDepth The size of the task stack specified as the number of
+ * bytes. Note that this differs from vanilla FreeRTOS.
+ *
+ * @param pvParameters Pointer that will be used as the parameter for the task
+ * being created.
+ *
+ * @param uxPriority The priority at which the task should run.  Systems that
+ * include MPU support can optionally create tasks in a privileged (system)
+ * mode by setting bit portPRIVILEGE_BIT of the priority parameter.  For
+ * example, to create a privileged task at priority 2 the uxPriority parameter
+ * should be set to ( 2 | portPRIVILEGE_BIT ).
+ *
+ * @param pvCreatedTask Used to pass back a handle by which the created task
+ * can be referenced.
+ *
+ * @return pdPASS if the task was successfully created and added to a ready
+ * list, otherwise an error code defined in the file projdefs.h
+ *
+ * @note If program uses thread local variables (ones specified with "__thread" keyword)
+ * then storage for them will be allocated on the task's stack.
+ *
+ * Example usage:
+ * @code{c}
+ * // Task to be created.
+ * void vTaskCode( void * pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *       // Task code goes here.
+ *   }
+ * }
+ *
+ * // Function that creates a task.
+ * void vOtherFunction( void )
+ * {
+ * static uint8_t ucParameterToPass;
+ * TaskHandle_t xHandle = NULL;
+ *
+ *   // Create the task, storing the handle.  Note that the passed parameter ucParameterToPass
+ *   // must exist for the lifetime of the task, so in this case is declared static.  If it was just an
+ *   // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time
+ *   // the new task attempts to access it.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
+ *   configASSERT( xHandle );
+ *
+ *   // Use the handle to delete the task.
+ *   if( xHandle != NULL )
+ *   {
+ *      vTaskDelete( xHandle );
+ *   }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskCreate xTaskCreate
+ * @endcond
+ * \ingroup Tasks
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+
+    static inline IRAM_ATTR BaseType_t xTaskCreate(
+                            TaskFunction_t pvTaskCode,
+                            const char * const pcName,     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                            const uint32_t usStackDepth,
+                            void * const pvParameters,
+                            UBaseType_t uxPriority,
+                            TaskHandle_t * const pxCreatedTask) PRIVILEGED_FUNCTION
+    {
+        return xTaskCreatePinnedToCore( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, tskNO_AFFINITY );
+    }
+
+#endif
+
+
+
+
+/**
+ * Create a new task with a specified affinity.
+ *
+ * This function is similar to xTaskCreateStatic, but allows specifying
+ * task affinity in an SMP system.
+ *
+ * @param pvTaskCode Pointer to the task entry function.  Tasks
+ * must be implemented to never return (i.e. continuous loop), or should be
+ * terminated using vTaskDelete function.
+ *
+ * @param pcName A descriptive name for the task.  This is mainly used to
+ * facilitate debugging.  The maximum length of the string is defined by
+ * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h.
+ *
+ * @param ulStackDepth The size of the task stack specified as the number of
+ * bytes. Note that this differs from vanilla FreeRTOS.
+ *
+ * @param pvParameters Pointer that will be used as the parameter for the task
+ * being created.
+ *
+ * @param uxPriority The priority at which the task will run.
+ *
+ * @param pxStackBuffer Must point to a StackType_t array that has at least
+ * ulStackDepth indexes - the array will then be used as the task's stack,
+ * removing the need for the stack to be allocated dynamically.
+ *
+ * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will
+ * then be used to hold the task's data structures, removing the need for the
+ * memory to be allocated dynamically.
+ *
+ * @param xCoreID If the value is tskNO_AFFINITY, the created task is not
+ * pinned to any CPU, and the scheduler can run it on any core available.
+ * Values 0 or 1 indicate the index number of the CPU which the task should
+ * be pinned to. Specifying values larger than (portNUM_PROCESSORS - 1) will
+ * cause the function to fail.
+ *
+ * @return If neither pxStackBuffer or pxTaskBuffer are NULL, then the task will
+ * be created and pdPASS is returned.  If either pxStackBuffer or pxTaskBuffer
+ * are NULL then the task will not be created and
+ * errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY is returned.
+ *
+ * \ingroup Tasks
+ */
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+    TaskHandle_t xTaskCreateStaticPinnedToCore( TaskFunction_t pvTaskCode,
+                                                const char * const pcName,
+                                                const uint32_t ulStackDepth,
+                                                void * const pvParameters,
+                                                UBaseType_t uxPriority,
+                                                StackType_t * const pxStackBuffer,
+                                                StaticTask_t * const pxTaskBuffer,
+                                                const BaseType_t xCoreID );
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * Create a new task and add it to the list of tasks that are ready to run.
+ *
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
+ * memory.  The first block is used to hold the task's data structures.  The
+ * second block is used by the task as its stack.  If a task is created using
+ * xTaskCreate() then both blocks of memory are automatically dynamically
+ * allocated inside the xTaskCreate() function.  (see
+ * http://www.freertos.org/a00111.html).  If a task is created using
+ * xTaskCreateStatic() then the application writer must provide the required
+ * memory.  xTaskCreateStatic() therefore allows a task to be created without
+ * using any dynamic memory allocation.
+ *
+ * @param pvTaskCode Pointer to the task entry function.  Tasks
+ * must be implemented to never return (i.e. continuous loop), or should be
+ * terminated using vTaskDelete function.
+ *
+ * @param pcName A descriptive name for the task.  This is mainly used to
+ * facilitate debugging.  The maximum length of the string is defined by
+ * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h.
+ *
+ * @param ulStackDepth The size of the task stack specified as the number of
+ * bytes. Note that this differs from vanilla FreeRTOS.
+ *
+ * @param pvParameters Pointer that will be used as the parameter for the task
+ * being created.
+ *
+ * @param uxPriority The priority at which the task will run.
+ *
+ * @param pxStackBuffer Must point to a StackType_t array that has at least
+ * ulStackDepth indexes - the array will then be used as the task's stack,
+ * removing the need for the stack to be allocated dynamically.
+ *
+ * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will
+ * then be used to hold the task's data structures, removing the need for the
+ * memory to be allocated dynamically.
+ *
+ * @return If neither pxStackBuffer or pxTaskBuffer are NULL, then the task will
+ * be created and pdPASS is returned.  If either pxStackBuffer or pxTaskBuffer
+ * are NULL then the task will not be created and
+ * errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY is returned.
+ *
+ * @note If program uses thread local variables (ones specified with "__thread" keyword)
+ * then storage for them will be allocated on the task's stack.
+ *
+ * Example usage:
+ * @code{c}
+ *
+ *  // Dimensions the buffer that the task being created will use as its stack.
+ *  // NOTE:  This is the number of bytes the stack will hold, not the number of
+ *  // words as found in vanilla FreeRTOS.
+ * #define STACK_SIZE 200
+ *
+ *  // Structure that will hold the TCB of the task being created.
+ *  StaticTask_t xTaskBuffer;
+ *
+ *  // Buffer that the task being created will use as its stack.  Note this is
+ *  // an array of StackType_t variables.  The size of StackType_t is dependent on
+ *  // the RTOS port.
+ *  StackType_t xStack[ STACK_SIZE ];
+ *
+ *  // Function that implements the task being created.
+ *  void vTaskCode( void * pvParameters )
+ *  {
+ *      // The parameter value is expected to be 1 as 1 is passed in the
+ *      // pvParameters value in the call to xTaskCreateStatic().
+ *      configASSERT( ( uint32_t ) pvParameters == 1UL );
+ *
+ *      for( ;; )
+ *      {
+ *          // Task code goes here.
+ *      }
+ *  }
+ *
+ *  // Function that creates a task.
+ *  void vOtherFunction( void )
+ *  {
+ *      TaskHandle_t xHandle = NULL;
+ *
+ *      // Create the task without using any dynamic memory allocation.
+ *      xHandle = xTaskCreateStatic(
+ *                    vTaskCode,       // Function that implements the task.
+ *                    "NAME",          // Text name for the task.
+ *                    STACK_SIZE,      // Stack size in bytes, not words.
+ *                    ( void * ) 1,    // Parameter passed into the task.
+ *                    tskIDLE_PRIORITY,// Priority at which the task is created.
+ *                    xStack,          // Array to use as the task's stack.
+ *                    &xTaskBuffer );  // Variable to hold the task's data structure.
+ *
+ *      // puxStackBuffer and pxTaskBuffer were not NULL, so the task will have
+ *      // been created, and xHandle will be the task's handle.  Use the handle
+ *      // to suspend the task.
+ *      vTaskSuspend( xHandle );
+ *  }
+ * @endcode
+ * \ingroup Tasks
+ */
+
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+    static inline IRAM_ATTR TaskHandle_t xTaskCreateStatic(
+                                    TaskFunction_t pvTaskCode,
+                                    const char * const pcName,     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                    const uint32_t ulStackDepth,
+                                    void * const pvParameters,
+                                    UBaseType_t uxPriority,
+                                    StackType_t * const puxStackBuffer,
+                                    StaticTask_t * const pxTaskBuffer) PRIVILEGED_FUNCTION
+    {
+        return xTaskCreateStaticPinnedToCore( pvTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer, tskNO_AFFINITY );
+    }
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
+ * @endcode
+ * @endcond
+ *
+ * Only available when configSUPPORT_DYNAMIC_ALLOCATION is set to 1.
+ *
+ * xTaskCreateRestricted() should only be used in systems that include an MPU
+ * implementation.
+ *
+ * Create a new task and add it to the list of tasks that are ready to run.
+ * The function parameters define the memory regions and associated access
+ * permissions allocated to the task.
+ *
+ * See xTaskCreateRestrictedStatic() for a version that does not use any
+ * dynamic memory allocation.
+ *
+ * @param pxTaskDefinition Pointer to a structure that contains a member
+ * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API
+ * documentation) plus an optional stack buffer and the memory region
+ * definitions.
+ *
+ * @param pxCreatedTask Used to pass back a handle by which the created task
+ * can be referenced.
+ *
+ * return pdPASS if the task was successfully created and added to a ready
+ * list, otherwise an error code defined in the file projdefs.h
+ *
+ * Example usage:
+ * @code{c}
+ * // Create an TaskParameters_t structure that defines the task to be created.
+ * static const TaskParameters_t xCheckTaskParameters =
+ * {
+ *  vATask,     // pvTaskCode - the function that implements the task.
+ *  "ATask",    // pcName - just a text name for the task to assist debugging.
+ *  100,        // usStackDepth - the stack size DEFINED IN WORDS.
+ *  NULL,       // pvParameters - passed into the task function as the function parameters.
+ *  ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
+ *  cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
+ *
+ *  // xRegions - Allocate up to three separate memory regions for access by
+ *  // the task, with appropriate access permissions.  Different processors have
+ *  // different memory alignment requirements - refer to the FreeRTOS documentation
+ *  // for full information.
+ *  {
+ *      // Base address                 Length  Parameters
+ *      { cReadWriteArray,              32,     portMPU_REGION_READ_WRITE },
+ *      { cReadOnlyArray,               32,     portMPU_REGION_READ_ONLY },
+ *      { cPrivilegedOnlyAccessArray,   128,    portMPU_REGION_PRIVILEGED_READ_WRITE }
+ *  }
+ * };
+ *
+ * int main( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *  // Create a task from the const structure defined above.  The task handle
+ *  // is requested (the second parameter is not NULL) but in this case just for
+ *  // demonstration purposes as its not actually used.
+ *  xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
+ *
+ *  // Start the scheduler.
+ *  vTaskStartScheduler();
+ *
+ *  // Will only get here if there was insufficient memory to create the idle
+ *  // and/or timer task.
+ *  for( ;; );
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskCreateRestricted xTaskCreateRestricted
+ * @endcond
+ * \ingroup Tasks
+ */
+#if ( portUSING_MPU_WRAPPERS == 1 )
+    BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
+                                      TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskCreateRestrictedStatic( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
+ * @endcode
+ * @endcond
+ *
+ * Only available when configSUPPORT_STATIC_ALLOCATION is set to 1.
+ *
+ * xTaskCreateRestrictedStatic() should only be used in systems that include an
+ * MPU implementation.
+ *
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
+ * memory.  The first block is used to hold the task's data structures.  The
+ * second block is used by the task as its stack.  If a task is created using
+ * xTaskCreateRestricted() then the stack is provided by the application writer,
+ * and the memory used to hold the task's data structure is automatically
+ * dynamically allocated inside the xTaskCreateRestricted() function.  If a task
+ * is created using xTaskCreateRestrictedStatic() then the application writer
+ * must provide the memory used to hold the task's data structures too.
+ * xTaskCreateRestrictedStatic() therefore allows a memory protected task to be
+ * created without using any dynamic memory allocation.
+ *
+ * @param pxTaskDefinition Pointer to a structure that contains a member
+ * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API
+ * documentation) plus an optional stack buffer and the memory region
+ * definitions.  If configSUPPORT_STATIC_ALLOCATION is set to 1 the structure
+ * contains an additional member, which is used to point to a variable of type
+ * StaticTask_t - which is then used to hold the task's data structure.
+ *
+ * @param pxCreatedTask Used to pass back a handle by which the created task
+ * can be referenced.
+ *
+ * return pdPASS if the task was successfully created and added to a ready
+ * list, otherwise an error code defined in the file projdefs.h
+ *
+ * Example usage:
+ * @code{c}
+ * // Create an TaskParameters_t structure that defines the task to be created.
+ * // The StaticTask_t variable is only included in the structure when
+ * // configSUPPORT_STATIC_ALLOCATION is set to 1.  The PRIVILEGED_DATA macro can
+ * // be used to force the variable into the RTOS kernel's privileged data area.
+ * static PRIVILEGED_DATA StaticTask_t xTaskBuffer;
+ * static const TaskParameters_t xCheckTaskParameters =
+ * {
+ *  vATask,     // pvTaskCode - the function that implements the task.
+ *  "ATask",    // pcName - just a text name for the task to assist debugging.
+ *   100,       // usStackDepth - the stack size DEFINED IN BYTES.
+ *  NULL,       // pvParameters - passed into the task function as the function parameters.
+ *  ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
+ *  cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
+ *
+ *  // xRegions - Allocate up to three separate memory regions for access by
+ *  // the task, with appropriate access permissions.  Different processors have
+ *  // different memory alignment requirements - refer to the FreeRTOS documentation
+ *  // for full information.
+ *  {
+ *      // Base address                 Length  Parameters
+ *      { cReadWriteArray,              32,     portMPU_REGION_READ_WRITE },
+ *      { cReadOnlyArray,               32,     portMPU_REGION_READ_ONLY },
+ *      { cPrivilegedOnlyAccessArray,   128,    portMPU_REGION_PRIVILEGED_READ_WRITE }
+ *  }
+ *
+ *  &xTaskBuffer; // Holds the task's data structure.
+ * };
+ *
+ * int main( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *  // Create a task from the const structure defined above.  The task handle
+ *  // is requested (the second parameter is not NULL) but in this case just for
+ *  // demonstration purposes as its not actually used.
+ *  xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
+ *
+ *  // Start the scheduler.
+ *  vTaskStartScheduler();
+ *
+ *  // Will only get here if there was insufficient memory to create the idle
+ *  // and/or timer task.
+ *  for( ;; );
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskCreateRestrictedStatic xTaskCreateRestrictedStatic
+ * @endcond
+ * \ingroup Tasks
+ */
+#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+    BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
+                                            TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );
+ * @endcode
+ * @endcond
+ *
+ * Memory regions are assigned to a restricted task when the task is created by
+ * a call to xTaskCreateRestricted().  These regions can be redefined using
+ * vTaskAllocateMPURegions().
+ *
+ * @param xTask The handle of the task being updated.
+ *
+ * @param pxRegions A pointer to an MemoryRegion_t structure that contains the
+ * new memory region definitions.
+ *
+ * Example usage:
+ * @code{c}
+ * // Define an array of MemoryRegion_t structures that configures an MPU region
+ * // allowing read/write access for 1024 bytes starting at the beginning of the
+ * // ucOneKByte array.  The other two of the maximum 3 definable regions are
+ * // unused so set to zero.
+ * static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =
+ * {
+ *  // Base address     Length      Parameters
+ *  { ucOneKByte,       1024,       portMPU_REGION_READ_WRITE },
+ *  { 0,                0,          0 },
+ *  { 0,                0,          0 }
+ * };
+ *
+ * void vATask( void *pvParameters )
+ * {
+ *  // This task was created such that it has access to certain regions of
+ *  // memory as defined by the MPU configuration.  At some point it is
+ *  // desired that these MPU regions are replaced with that defined in the
+ *  // xAltRegions const struct above.  Use a call to vTaskAllocateMPURegions()
+ *  // for this purpose.  NULL is used as the task handle to indicate that this
+ *  // function should modify the MPU regions of the calling task.
+ *  vTaskAllocateMPURegions( NULL, xAltRegions );
+ *
+ *  // Now the task can continue its function, but from this point on can only
+ *  // access its stack and the ucOneKByte array (unless any other statically
+ *  // defined or shared regions have been declared elsewhere).
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskCreateRestricted xTaskCreateRestricted
+ * @endcond
+ * \ingroup Tasks
+ */
+void vTaskAllocateMPURegions( TaskHandle_t xTask,
+                              const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void vTaskDelete( TaskHandle_t xTask );
+ * @endcode
+ * @endcond
+ *
+ * INCLUDE_vTaskDelete must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Remove a task from the RTOS real time kernel's management.  The task being
+ * deleted will be removed from all ready, blocked, suspended and event lists.
+ *
+ * NOTE:  The idle task is responsible for freeing the kernel allocated
+ * memory from tasks that have been deleted.  It is therefore important that
+ * the idle task is not starved of microcontroller processing time if your
+ * application makes any calls to vTaskDelete ().  Memory allocated by the
+ * task code is not automatically freed, and should be freed before the task
+ * is deleted.
+ *
+ * See the demo application file death.c for sample code that utilises
+ * vTaskDelete ().
+ *
+ * @param xTaskToDelete The handle of the task to be deleted.  Passing NULL will
+ * cause the calling task to be deleted.
+ *
+ * Example usage:
+ * @code{c}
+ * void vOtherFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *   // Create the task, storing the handle.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+ *
+ *   // Use the handle to delete the task.
+ *   vTaskDelete( xHandle );
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskDelete vTaskDelete
+ * @endcond
+ * \ingroup Tasks
+ */
+void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
+
+/*-----------------------------------------------------------
+ * TASK CONTROL API
+ *----------------------------------------------------------*/
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void vTaskDelay( const TickType_t xTicksToDelay );
+ * @endcode
+ * @endcond
+ *
+ * Delay a task for a given number of ticks.  The actual time that the
+ * task remains blocked depends on the tick rate.  The constant
+ * portTICK_PERIOD_MS can be used to calculate real time from the tick
+ * rate - with the resolution of one tick period.
+ *
+ * INCLUDE_vTaskDelay must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ *
+ * vTaskDelay() specifies a time at which the task wishes to unblock relative to
+ * the time at which vTaskDelay() is called.  For example, specifying a block
+ * period of 100 ticks will cause the task to unblock 100 ticks after
+ * vTaskDelay() is called.  vTaskDelay() does not therefore provide a good method
+ * of controlling the frequency of a periodic task as the path taken through the
+ * code, as well as other task and interrupt activity, will effect the frequency
+ * at which vTaskDelay() gets called and therefore the time at which the task
+ * next executes.  See xTaskDelayUntil() for an alternative API function designed
+ * to facilitate fixed frequency execution.  It does this by specifying an
+ * absolute time (rather than a relative time) at which the calling task should
+ * unblock.
+ *
+ * @param xTicksToDelay The amount of time, in tick periods, that
+ * the calling task should block.
+ *
+ * Example usage:
+ * @code{c}
+ * void vTaskFunction( void * pvParameters )
+ * {
+ * // Block for 500ms.
+ * const TickType_t xDelay = 500 / portTICK_PERIOD_MS;
+ *
+ *   for( ;; )
+ *   {
+ *       // Simply toggle the LED every 500ms, blocking between each toggle.
+ *       vToggleLED();
+ *       vTaskDelay( xDelay );
+ *   }
+ * }
+ * @endcode
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskDelay vTaskDelay
+ * @endcond
+ * \ingroup TaskCtrl
+ */
+void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement );
+ * @endcode
+ * @endcond
+ *
+ * INCLUDE_xTaskDelayUntil must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Delay a task until a specified time.  This function can be used by periodic
+ * tasks to ensure a constant execution frequency.
+ *
+ * This function differs from vTaskDelay () in one important aspect:  vTaskDelay () will
+ * cause a task to block for the specified number of ticks from the time vTaskDelay () is
+ * called.  It is therefore difficult to use vTaskDelay () by itself to generate a fixed
+ * execution frequency as the time between a task starting to execute and that task
+ * calling vTaskDelay () may not be fixed [the task may take a different path though the
+ * code between calls, or may get interrupted or preempted a different number of times
+ * each time it executes].
+ *
+ * Whereas vTaskDelay () specifies a wake time relative to the time at which the function
+ * is called, xTaskDelayUntil () specifies the absolute (exact) time at which it wishes to
+ * unblock.
+ *
+ * The macro pdMS_TO_TICKS() can be used to calculate the number of ticks from a
+ * time specified in milliseconds with a resolution of one tick period.
+ *
+ * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the
+ * task was last unblocked.  The variable must be initialised with the current time
+ * prior to its first use (see the example below).  Following this the variable is
+ * automatically updated within xTaskDelayUntil ().
+ *
+ * @param xTimeIncrement The cycle time period.  The task will be unblocked at
+ * time *pxPreviousWakeTime + xTimeIncrement.  Calling xTaskDelayUntil with the
+ * same xTimeIncrement parameter value will cause the task to execute with
+ * a fixed interface period.
+ *
+ * @return Value which can be used to check whether the task was actually delayed.
+ * Will be pdTRUE if the task way delayed and pdFALSE otherwise.  A task will not
+ * be delayed if the next expected wake time is in the past.
+ *
+ * Example usage:
+ * @code{c}
+ * // Perform an action every 10 ticks.
+ * void vTaskFunction( void * pvParameters )
+ * {
+ * TickType_t xLastWakeTime;
+ * const TickType_t xFrequency = 10;
+ * BaseType_t xWasDelayed;
+ *
+ *     // Initialise the xLastWakeTime variable with the current time.
+ *     xLastWakeTime = xTaskGetTickCount ();
+ *     for( ;; )
+ *     {
+ *         // Wait for the next cycle.
+ *         xWasDelayed = xTaskDelayUntil( &xLastWakeTime, xFrequency );
+ *
+ *         // Perform action here. xWasDelayed value can be used to determine
+ *         // whether a deadline was missed if the code here took too long.
+ *     }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskDelayUntil xTaskDelayUntil
+ * @endcond
+ * \ingroup TaskCtrl
+ */
+BaseType_t xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
+                            const TickType_t xTimeIncrement ) PRIVILEGED_FUNCTION;
+
+/*
+ * vTaskDelayUntil() is the older version of xTaskDelayUntil() and does not
+ * return a value.
+ */
+#define vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement )       \
+{                                                                   \
+    ( void ) xTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); \
+}
+
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskAbortDelay( TaskHandle_t xTask );
+ * @endcode
+ * @endcond
+ *
+ * INCLUDE_xTaskAbortDelay must be defined as 1 in FreeRTOSConfig.h for this
+ * function to be available.
+ *
+ * A task will enter the Blocked state when it is waiting for an event.  The
+ * event it is waiting for can be a temporal event (waiting for a time), such
+ * as when vTaskDelay() is called, or an event on an object, such as when
+ * xQueueReceive() or ulTaskNotifyTake() is called.  If the handle of a task
+ * that is in the Blocked state is used in a call to xTaskAbortDelay() then the
+ * task will leave the Blocked state, and return from whichever function call
+ * placed the task into the Blocked state.
+ *
+ * There is no 'FromISR' version of this function as an interrupt would need to
+ * know which object a task was blocked on in order to know which actions to
+ * take.  For example, if the task was blocked on a queue the interrupt handler
+ * would then need to know if the queue was locked.
+ *
+ * @param xTask The handle of the task to remove from the Blocked state.
+ *
+ * @return If the task referenced by xTask was not in the Blocked state then
+ * pdFAIL is returned.  Otherwise pdPASS is returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskAbortDelay xTaskAbortDelay
+ * @endcond
+ * \ingroup TaskCtrl
+ */
+BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask );
+ * @endcode
+ * @endcond
+ *
+ * INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Obtain the priority of any task.
+ *
+ * @param xTask Handle of the task to be queried.  Passing a NULL
+ * handle results in the priority of the calling task being returned.
+ *
+ * @return The priority of xTask.
+ *
+ * Example usage:
+ * @code{c}
+ * void vAFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *   // Create a task, storing the handle.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+ *
+ *   // ...
+ *
+ *   // Use the handle to obtain the priority of the created task.
+ *   // It was created with tskIDLE_PRIORITY, but may have changed
+ *   // it itself.
+ *   if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
+ *   {
+ *       // The task has changed it's priority.
+ *   }
+ *
+ *   // ...
+ *
+ *   // Is our priority higher than the created task?
+ *   if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
+ *   {
+ *       // Our priority (obtained using NULL handle) is higher.
+ *   }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup uxTaskPriorityGet uxTaskPriorityGet
+ * @endcond
+ * \ingroup TaskCtrl
+ */
+UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask );
+ * @endcode
+ * @endcond
+ *
+ * A version of uxTaskPriorityGet() that can be used from an ISR.
+ */
+UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * eTaskState eTaskGetState( TaskHandle_t xTask );
+ * @endcode
+ * @endcond
+ *
+ * INCLUDE_eTaskGetState must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Obtain the state of any task.  States are encoded by the eTaskState
+ * enumerated type.
+ *
+ * @param xTask Handle of the task to be queried.
+ *
+ * @return The state of xTask at the time the function was called.  Note the
+ * state of the task might change between the function being called, and the
+ * functions return value being tested by the calling task.
+ */
+eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState );
+ * @endcode
+ * @endcond
+ *
+ * configUSE_TRACE_FACILITY must be defined as 1 for this function to be
+ * available.  See the configuration section for more information.
+ *
+ * Populates a TaskStatus_t structure with information about a task.
+ *
+ * @param xTask Handle of the task being queried.  If xTask is NULL then
+ * information will be returned about the calling task.
+ *
+ * @param pxTaskStatus A pointer to the TaskStatus_t structure that will be
+ * filled with information about the task referenced by the handle passed using
+ * the xTask parameter.
+ *
+ * @param xGetFreeStackSpace The TaskStatus_t structure contains a member to report
+ * the stack high water mark of the task being queried.  Calculating the stack
+ * high water mark takes a relatively long time, and can make the system
+ * temporarily unresponsive - so the xGetFreeStackSpace parameter is provided to
+ * allow the high water mark checking to be skipped.  The high watermark value
+ * will only be written to the TaskStatus_t structure if xGetFreeStackSpace is
+ * not set to pdFALSE;
+ *
+ * @param eState The TaskStatus_t structure contains a member to report the
+ * state of the task being queried.  Obtaining the task state is not as fast as
+ * a simple assignment - so the eState parameter is provided to allow the state
+ * information to be omitted from the TaskStatus_t structure.  To obtain state
+ * information then set eState to eInvalid - otherwise the value passed in
+ * eState will be reported as the task state in the TaskStatus_t structure.
+ *
+ * Example usage:
+ * @code{c}
+ * void vAFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ * TaskStatus_t xTaskDetails;
+ *
+ *  // Obtain the handle of a task from its name.
+ *  xHandle = xTaskGetHandle( "Task_Name" );
+ *
+ *  // Check the handle is not NULL.
+ *  configASSERT( xHandle );
+ *
+ *  // Use the handle to obtain further information about the task.
+ *  vTaskGetInfo( xHandle,
+ *                &xTaskDetails,
+ *                pdTRUE, // Include the high water mark in xTaskDetails.
+ *                eInvalid ); // Include the task state in xTaskDetails.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskGetInfo vTaskGetInfo
+ * @endcond
+ * \ingroup TaskCtrl
+ */
+void vTaskGetInfo( TaskHandle_t xTask,
+                   TaskStatus_t * pxTaskStatus,
+                   BaseType_t xGetFreeStackSpace,
+                   eTaskState eState ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );
+ * @endcode
+ * @endcond
+ *
+ * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Set the priority of any task.
+ *
+ * A context switch will occur before the function returns if the priority
+ * being set is higher than the currently executing task.
+ *
+ * @param xTask Handle to the task for which the priority is being set.
+ * Passing a NULL handle results in the priority of the calling task being set.
+ *
+ * @param uxNewPriority The priority to which the task will be set.
+ *
+ * Example usage:
+ * @code{c}
+ * void vAFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *   // Create a task, storing the handle.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+ *
+ *   // ...
+ *
+ *   // Use the handle to raise the priority of the created task.
+ *   vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
+ *
+ *   // ...
+ *
+ *   // Use a NULL handle to raise our priority to the same value.
+ *   vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskPrioritySet vTaskPrioritySet
+ * @endcond
+ * \ingroup TaskCtrl
+ */
+void vTaskPrioritySet( TaskHandle_t xTask,
+                       UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void vTaskSuspend( TaskHandle_t xTaskToSuspend );
+ * @endcode
+ * @endcond
+ *
+ * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Suspend any task.  When suspended a task will never get any microcontroller
+ * processing time, no matter what its priority.
+ *
+ * Calls to vTaskSuspend are not accumulative -
+ * i.e. calling vTaskSuspend () twice on the same task still only requires one
+ * call to vTaskResume () to ready the suspended task.
+ *
+ * @param xTaskToSuspend Handle to the task being suspended.  Passing a NULL
+ * handle will cause the calling task to be suspended.
+ *
+ * Example usage:
+ * @code{c}
+ * void vAFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *   // Create a task, storing the handle.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+ *
+ *   // ...
+ *
+ *   // Use the handle to suspend the created task.
+ *   vTaskSuspend( xHandle );
+ *
+ *   // ...
+ *
+ *   // The created task will not run during this period, unless
+ *   // another task calls vTaskResume( xHandle ).
+ *
+ *   //...
+ *
+ *
+ *   // Suspend ourselves.
+ *   vTaskSuspend( NULL );
+ *
+ *   // We cannot get here unless another task calls vTaskResume
+ *   // with our handle as the parameter.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskSuspend vTaskSuspend
+ * @endcond
+ * \ingroup TaskCtrl
+ */
+void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void vTaskResume( TaskHandle_t xTaskToResume );
+ * @endcode
+ * @endcond
+ *
+ * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Resumes a suspended task.
+ *
+ * A task that has been suspended by one or more calls to vTaskSuspend ()
+ * will be made available for running again by a single call to
+ * vTaskResume ().
+ *
+ * @param xTaskToResume Handle to the task being readied.
+ *
+ * Example usage:
+ * @code{c}
+ * void vAFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *   // Create a task, storing the handle.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+ *
+ *   // ...
+ *
+ *   // Use the handle to suspend the created task.
+ *   vTaskSuspend( xHandle );
+ *
+ *   // ...
+ *
+ *   // The created task will not run during this period, unless
+ *   // another task calls vTaskResume( xHandle ).
+ *
+ *   //...
+ *
+ *
+ *   // Resume the suspended task ourselves.
+ *   vTaskResume( xHandle );
+ *
+ *   // The created task will once again get microcontroller processing
+ *   // time in accordance with its priority within the system.
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskResume vTaskResume
+ * @endcond
+ * \ingroup TaskCtrl
+ */
+void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void xTaskResumeFromISR( TaskHandle_t xTaskToResume );
+ * @endcode
+ * @endcond
+ *
+ * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be
+ * available.  See the configuration section for more information.
+ *
+ * An implementation of vTaskResume() that can be called from within an ISR.
+ *
+ * A task that has been suspended by one or more calls to vTaskSuspend ()
+ * will be made available for running again by a single call to
+ * xTaskResumeFromISR ().
+ *
+ * xTaskResumeFromISR() should not be used to synchronise a task with an
+ * interrupt if there is a chance that the interrupt could arrive prior to the
+ * task being suspended - as this can lead to interrupts being missed. Use of a
+ * semaphore as a synchronisation mechanism would avoid this eventuality.
+ *
+ * @param xTaskToResume Handle to the task being readied.
+ *
+ * @return pdTRUE if resuming the task should result in a context switch,
+ * otherwise pdFALSE. This is used by the ISR to determine if a context switch
+ * may be required following the ISR.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskResumeFromISR vTaskResumeFromISR
+ * @endcond
+ * \ingroup TaskCtrl
+ */
+BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
+
+/*-----------------------------------------------------------
+ * SCHEDULER CONTROL
+ *----------------------------------------------------------*/
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void vTaskStartScheduler( void );
+ * @endcode
+ * @endcond
+ *
+ * Starts the real time kernel tick processing.  After calling the kernel
+ * has control over which tasks are executed and when.
+
+ * NOTE: In ESP-IDF the scheduler is started automatically during
+ * application startup, vTaskStartScheduler() should not be called from
+ * ESP-IDF applications.
+ *
+ * See the demo application file main.c for an example of creating
+ * tasks and starting the kernel.
+ *
+ * Example usage:
+ * @code{c}
+ * void vAFunction( void )
+ * {
+ *   // Create at least one task before starting the kernel.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
+ *
+ *   // Start the real time kernel with preemption.
+ *   vTaskStartScheduler ();
+ *
+ *   // Will not get here unless a task calls vTaskEndScheduler ()
+ * }
+ * @endcode
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskStartScheduler vTaskStartScheduler
+ * @endcond
+ * \ingroup SchedulerControl
+ */
+void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void vTaskEndScheduler( void );
+ * @endcode
+ * @endcond
+ *
+ * NOTE:  At the time of writing only the x86 real mode port, which runs on a PC
+ * in place of DOS, implements this function.
+ *
+ * Stops the real time kernel tick.  All created tasks will be automatically
+ * deleted and multitasking (either preemptive or cooperative) will
+ * stop.  Execution then resumes from the point where vTaskStartScheduler ()
+ * was called, as if vTaskStartScheduler () had just returned.
+ *
+ * See the demo application file main. c in the demo/PC directory for an
+ * example that uses vTaskEndScheduler ().
+ *
+ * vTaskEndScheduler () requires an exit function to be defined within the
+ * portable layer (see vPortEndScheduler () in port. c for the PC port).  This
+ * performs hardware specific operations such as stopping the kernel tick.
+ *
+ * vTaskEndScheduler () will cause all of the resources allocated by the
+ * kernel to be freed - but will not free resources allocated by application
+ * tasks.
+ *
+ * Example usage:
+ * @code{c}
+ * void vTaskCode( void * pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *       // Task code goes here.
+ *
+ *       // At some point we want to end the real time kernel processing
+ *       // so call ...
+ *       vTaskEndScheduler ();
+ *   }
+ * }
+ *
+ * void vAFunction( void )
+ * {
+ *   // Create at least one task before starting the kernel.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
+ *
+ *   // Start the real time kernel with preemption.
+ *   vTaskStartScheduler ();
+ *
+ *   // Will only get here when the vTaskCode () task has called
+ *   // vTaskEndScheduler ().  When we get here we are back to single task
+ *   // execution.
+ * }
+ * @endcode
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskEndScheduler vTaskEndScheduler
+ * @endcond
+ * \ingroup SchedulerControl
+ */
+void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION;
+
+/** @endcond */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void vTaskSuspendAll( void );
+ * @endcode
+ * @endcond
+ *
+ * Suspends the scheduler without disabling interrupts.  Context switches will
+ * not occur while the scheduler is suspended.
+ *
+ * After calling vTaskSuspendAll () the calling task will continue to execute
+ * without risk of being swapped out until a call to xTaskResumeAll () has been
+ * made.
+ *
+ * API functions that have the potential to cause a context switch (for example,
+ * vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler
+ * is suspended.
+ *
+ * Example usage:
+ * @code{c}
+ * void vTask1( void * pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *       // Task code goes here.
+ *
+ *       // ...
+ *
+ *       // At some point the task wants to perform a long operation during
+ *       // which it does not want to get swapped out.  It cannot use
+ *       // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
+ *       // operation may cause interrupts to be missed - including the
+ *       // ticks.
+ *
+ *       // Prevent the real time kernel swapping out the task.
+ *       vTaskSuspendAll ();
+ *
+ *       // Perform the operation here.  There is no need to use critical
+ *       // sections as we have all the microcontroller processing time.
+ *       // During this time interrupts will still operate and the kernel
+ *       // tick count will be maintained.
+ *
+ *       // ...
+ *
+ *       // The operation is complete.  Restart the kernel.
+ *       xTaskResumeAll ();
+ *   }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskSuspendAll vTaskSuspendAll
+ * @endcond
+ * \ingroup SchedulerControl
+ */
+void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskResumeAll( void );
+ * @endcode
+ * @endcond
+ *
+ * Resumes scheduler activity after it was suspended by a call to
+ * vTaskSuspendAll().
+ *
+ * xTaskResumeAll() only resumes the scheduler.  It does not unsuspend tasks
+ * that were previously suspended by a call to vTaskSuspend().
+ *
+ * @return If resuming the scheduler caused a context switch then pdTRUE is
+ *         returned, otherwise pdFALSE is returned.
+ *
+ * Example usage:
+ * @code{c}
+ * void vTask1( void * pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *       // Task code goes here.
+ *
+ *       // ...
+ *
+ *       // At some point the task wants to perform a long operation during
+ *       // which it does not want to get swapped out.  It cannot use
+ *       // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
+ *       // operation may cause interrupts to be missed - including the
+ *       // ticks.
+ *
+ *       // Prevent the real time kernel swapping out the task.
+ *       vTaskSuspendAll ();
+ *
+ *       // Perform the operation here.  There is no need to use critical
+ *       // sections as we have all the microcontroller processing time.
+ *       // During this time interrupts will still operate and the real
+ *       // time kernel tick count will be maintained.
+ *
+ *       // ...
+ *
+ *       // The operation is complete.  Restart the kernel.  We want to force
+ *       // a context switch - but there is no point if resuming the scheduler
+ *       // caused a context switch already.
+ *       if( !xTaskResumeAll () )
+ *       {
+ *            taskYIELD ();
+ *       }
+ *   }
+ * }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskResumeAll xTaskResumeAll
+ * @endcond
+ * \ingroup SchedulerControl
+ */
+BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION;
+
+/*-----------------------------------------------------------
+ * TASK UTILITIES
+ *----------------------------------------------------------*/
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * TickType_t xTaskGetTickCount( void );
+ * @endcode
+ * @endcond
+ *
+ * @return The count of ticks since vTaskStartScheduler was called.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskGetTickCount xTaskGetTickCount
+ * @endcond
+ * \ingroup TaskUtils
+ */
+TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * TickType_t xTaskGetTickCountFromISR( void );
+ * @endcode
+ * @endcond
+ *
+ * @return The count of ticks since vTaskStartScheduler was called.
+ *
+ * This is a version of xTaskGetTickCount() that is safe to be called from an
+ * ISR - provided that TickType_t is the natural word size of the
+ * microcontroller being used or interrupt nesting is either not supported or
+ * not being used.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR
+ * @endcond
+ * \ingroup TaskUtils
+ */
+TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * uint16_t uxTaskGetNumberOfTasks( void );
+ * @endcode
+ * @endcond
+ *
+ * @return The number of tasks that the real time kernel is currently managing.
+ * This includes all ready, blocked and suspended tasks.  A task that
+ * has been deleted but not yet freed by the idle task will also be
+ * included in the count.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks
+ * @endcond
+ * \ingroup TaskUtils
+ */
+UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * char *pcTaskGetName( TaskHandle_t xTaskToQuery );
+ * @endcode
+ * @endcond
+ *
+ * @return The text (human readable) name of the task referenced by the handle
+ * xTaskToQuery.  A task can query its own name by either passing in its own
+ * handle, or by setting xTaskToQuery to NULL.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup pcTaskGetName pcTaskGetName
+ * @endcond
+ * \ingroup TaskUtils
+ */
+char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * TaskHandle_t xTaskGetHandle( const char *pcNameToQuery );
+ * @endcode
+ * @endcond
+ *
+ * NOTE:  This function takes a relatively long time to complete and should be
+ * used sparingly.
+ *
+ * @return The handle of the task that has the human readable name pcNameToQuery.
+ * NULL is returned if no matching name is found.  INCLUDE_xTaskGetHandle
+ * must be set to 1 in FreeRTOSConfig.h for pcTaskGetHandle() to be available.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup pcTaskGetHandle pcTaskGetHandle
+ * @endcond
+ * \ingroup TaskUtils
+ */
+TaskHandle_t xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * Returns the high water mark of the stack associated with xTask.
+ *
+ * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for
+ * this function to be available.
+ *
+ * Returns the high water mark of the stack associated with xTask.  That is,
+ * the minimum free stack space there has been (in bytes not words, unlike vanilla
+ * FreeRTOS) since the task started.  The smaller the returned
+ * number the closer the task has come to overflowing its stack.
+ *
+ * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
+ * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
+ * user to determine the return type.  It gets around the problem of the value
+ * overflowing on 8-bit types without breaking backward compatibility for
+ * applications that expect an 8-bit return type.
+ *
+ * @param xTask Handle of the task associated with the stack to be checked.
+ * Set xTask to NULL to check the stack of the calling task.
+ *
+ * @return The smallest amount of free stack space there has been (in bytes not words,
+ * unlike vanilla FreeRTOS) since the task referenced by
+ * xTask was created.
+ */
+UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * Returns the start of the stack associated with xTask.
+ *
+ * INCLUDE_uxTaskGetStackHighWaterMark2 must be set to 1 in FreeRTOSConfig.h for
+ * this function to be available.
+ *
+ * Returns the high water mark of the stack associated with xTask.  That is,
+ * the minimum free stack space there has been (in words, so on a 32 bit machine
+ * a value of 1 means 4 bytes) since the task started.  The smaller the returned
+ * number the closer the task has come to overflowing its stack.
+ *
+ * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
+ * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
+ * user to determine the return type.  It gets around the problem of the value
+ * overflowing on 8-bit types without breaking backward compatibility for
+ * applications that expect an 8-bit return type.
+ *
+ * @param xTask Handle of the task associated with the stack to be checked.
+ * Set xTask to NULL to check the stack of the calling task.
+ *
+ * @return The smallest amount of free stack space there has been (in words, so
+ * actual spaces on the stack rather than bytes) since the task referenced by
+ * xTask was created.
+ */
+configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * Returns the start of the stack associated with xTask.
+ *
+ * INCLUDE_pxTaskGetStackStart must be set to 1 in FreeRTOSConfig.h for
+ * this function to be available.
+ *
+ * Returns the lowest stack memory address, regardless of whether the stack grows up or down.
+ *
+ * @param xTask Handle of the task associated with the stack returned.
+ * Set xTask to NULL to return the stack of the calling task.
+ *
+ * @return A pointer to the start of the stack.
+ */
+uint8_t* pxTaskGetStackStart( TaskHandle_t xTask) PRIVILEGED_FUNCTION;
+
+/* When using trace macros it is sometimes necessary to include task.h before
+ * FreeRTOS.h.  When this is done TaskHookFunction_t will not yet have been defined,
+ * so the following two prototypes will cause a compilation error.  This can be
+ * fixed by simply guarding against the inclusion of these two prototypes unless
+ * they are explicitly required by the configUSE_APPLICATION_TASK_TAG configuration
+ * constant. */
+#ifdef configUSE_APPLICATION_TASK_TAG
+    #if configUSE_APPLICATION_TASK_TAG == 1
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task.h
+ * @code{c}
+ * void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction );
+ * @endcode
+ * @endcond
+ *
+ * Sets pxHookFunction to be the task hook function used by the task xTask.
+ * @param xTask Handle of the task to set the hook function for
+ *              Passing xTask as NULL has the effect of setting the calling
+ *              tasks hook function.
+ * @param pxHookFunction  Pointer to the hook function.
+ */
+        void vTaskSetApplicationTaskTag( TaskHandle_t xTask,
+                                         TaskHookFunction_t pxHookFunction ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task.h
+ * @code{c}
+ * void xTaskGetApplicationTaskTag( TaskHandle_t xTask );
+ * @endcode
+ * @endcond
+ *
+ * Returns the pxHookFunction value assigned to the task xTask.  Do not
+ * call from an interrupt service routine - call
+ * xTaskGetApplicationTaskTagFromISR() instead.
+ */
+        TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task.h
+ * @code{c}
+ * void xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask );
+ * @endcode
+ * @endcond
+ *
+ * Returns the pxHookFunction value assigned to the task xTask.  Can
+ * be called from an interrupt service routine.
+ */
+        TaskHookFunction_t xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+    #endif /* configUSE_APPLICATION_TASK_TAG ==1 */
+#endif /* ifdef configUSE_APPLICATION_TASK_TAG */
+
+#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
+
+    /**
+     * Set local storage pointer specific to the given task.
+     *
+     * Each task contains an array of pointers that is dimensioned by the
+     * configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h.
+     * The kernel does not use the pointers itself, so the application writer
+     * can use the pointers for any purpose they wish.
+     *
+     * @param xTaskToSet  Task to set thread local storage pointer for
+     * @param xIndex The index of the pointer to set, from 0 to
+     *               configNUM_THREAD_LOCAL_STORAGE_POINTERS - 1.
+     * @param pvValue  Pointer value to set.
+     */
+    void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
+                                            BaseType_t xIndex,
+                                            void * pvValue ) PRIVILEGED_FUNCTION;
+
+
+    /**
+     * Get local storage pointer specific to the given task.
+     *
+     * Each task contains an array of pointers that is dimensioned by the
+     * configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h.
+     * The kernel does not use the pointers itself, so the application writer
+     * can use the pointers for any purpose they wish.
+     *
+     * @param xTaskToQuery  Task to get thread local storage pointer for
+     * @param xIndex The index of the pointer to get, from 0 to
+     *               configNUM_THREAD_LOCAL_STORAGE_POINTERS - 1.
+     * @return  Pointer value
+     */
+    void * pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
+                                               BaseType_t xIndex ) PRIVILEGED_FUNCTION;
+
+    #if ( configTHREAD_LOCAL_STORAGE_DELETE_CALLBACKS )
+
+        /**
+         * Prototype of local storage pointer deletion callback.
+         */
+        typedef void (*TlsDeleteCallbackFunction_t)( int, void * );
+
+        /**
+         * Set local storage pointer and deletion callback.
+         *
+         * Each task contains an array of pointers that is dimensioned by the
+         * configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h.
+         * The kernel does not use the pointers itself, so the application writer
+         * can use the pointers for any purpose they wish.
+         *
+         * Local storage pointers set for a task can reference dynamically
+         * allocated resources. This function is similar to
+         * vTaskSetThreadLocalStoragePointer, but provides a way to release
+         * these resources when the task gets deleted. For each pointer,
+         * a callback function can be set. This function will be called
+         * when task is deleted, with the local storage pointer index
+         * and value as arguments.
+         *
+         * @param xTaskToSet  Task to set thread local storage pointer for
+         * @param xIndex The index of the pointer to set, from 0 to
+         *               configNUM_THREAD_LOCAL_STORAGE_POINTERS - 1.
+         * @param pvValue  Pointer value to set.
+         * @param pvDelCallback  Function to call to dispose of the local
+         *                       storage pointer when the task is deleted.
+         */
+        void vTaskSetThreadLocalStoragePointerAndDelCallback( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue, TlsDeleteCallbackFunction_t pvDelCallback);
+    #endif
+
+#endif
+
+#if ( configCHECK_FOR_STACK_OVERFLOW > 0 )
+
+     /**
+      * @cond !DOC_EXCLUDE_HEADER_SECTION
+      * task.h
+      * @code{c}
+      * void vApplicationStackOverflowHook( TaskHandle_t xTask char *pcTaskName);
+      * @endcode
+      * @endcond
+      * The application stack overflow hook is called when a stack overflow is detected for a task.
+      *
+      * Details on stack overflow detection can be found here: https://www.FreeRTOS.org/Stacks-and-stack-overflow-checking.html
+      *
+      * @param xTask the task that just exceeded its stack boundaries.
+      * @param pcTaskName A character string containing the name of the offending task.
+      */
+     void vApplicationStackOverflowHook( TaskHandle_t xTask,
+                                               char * pcTaskName );
+
+#endif
+
+#if  (  configUSE_TICK_HOOK > 0 )
+    /**
+     * @cond !DOC_EXCLUDE_HEADER_SECTION
+     *  task.h
+     * @code{c}
+     * void vApplicationTickHook( void );
+     * @endcode
+     * @endcond
+     *
+     * This hook function is called in the system tick handler after any OS work is completed.
+     */
+    void vApplicationTickHook( void ); /*lint !e526 Symbol not defined as it is an application callback. */
+
+#endif
+
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    /**
+     * @cond !DOC_EXCLUDE_HEADER_SECTION
+     * task.h
+     * @code{c}
+     * void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, StackType_t ** ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
+     * @endcode
+     * @endcond
+     * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Idle Task TCB.  This function is required when
+     * configSUPPORT_STATIC_ALLOCATION is set.  For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
+     *
+     * @param ppxIdleTaskTCBBuffer A handle to a statically allocated TCB buffer
+     * @param ppxIdleTaskStackBuffer A handle to a statically allocated Stack buffer for thie idle task
+     * @param pulIdleTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
+     */
+    void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer,
+                                               StackType_t ** ppxIdleTaskStackBuffer,
+                                               uint32_t * pulIdleTaskStackSize ); /*lint !e526 Symbol not defined as it is an application callback. */
+#endif
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task.h
+ * @code{c}
+ * BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );
+ * @endcode
+ * @endcond
+ *
+ * Calls the hook function associated with xTask.  Passing xTask as NULL has
+ * the effect of calling the Running tasks (the calling task) hook function.
+ *
+ * @param xTask  Handle of the task to call the hook for.
+ * @param pvParameter  Parameter passed to the hook function for the task to interpret as it
+ * wants.  The return value is the value returned by the task hook function
+ * registered by the user.
+ */
+BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask,
+                                         void * pvParameter ) PRIVILEGED_FUNCTION;
+
+/**
+ * xTaskGetIdleTaskHandle() is only available if
+ * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h.
+ *
+ * Simply returns the handle of the idle task.  It is not valid to call
+ * xTaskGetIdleTaskHandle() before the scheduler has been started.
+ */
+TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for
+ * uxTaskGetSystemState() to be available.
+ *
+ * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in
+ * the system.  TaskStatus_t structures contain, among other things, members
+ * for the task handle, task name, task priority, task state, and total amount
+ * of run time consumed by the task.  See the TaskStatus_t structure
+ * definition in this file for the full member list.
+ *
+ * NOTE: This function is intended for debugging use only as its use results in
+ * the scheduler remaining suspended for an extended period.
+ *
+ * @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures.
+ * The array must contain at least one TaskStatus_t structure for each task
+ * that is under the control of the RTOS.  The number of tasks under the control
+ * of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function.
+ *
+ * @param uxArraySize The size of the array pointed to by the pxTaskStatusArray
+ * parameter.  The size is specified as the number of indexes in the array, or
+ * the number of TaskStatus_t structures contained in the array, not by the
+ * number of bytes in the array.
+ *
+ * @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in
+ * FreeRTOSConfig.h then *pulTotalRunTime is set by uxTaskGetSystemState() to the
+ * total run time (as defined by the run time stats clock, see
+ * https://www.FreeRTOS.org/rtos-run-time-stats.html) since the target booted.
+ * pulTotalRunTime can be set to NULL to omit the total run time information.
+ *
+ * @return The number of TaskStatus_t structures that were populated by
+ * uxTaskGetSystemState().  This should equal the number returned by the
+ * uxTaskGetNumberOfTasks() API function, but will be zero if the value passed
+ * in the uxArraySize parameter was too small.
+ *
+ * Example usage:
+ * @code{c}
+ *  // This example demonstrates how a human readable table of run time stats
+ *  // information is generated from raw data provided by uxTaskGetSystemState().
+ *  // The human readable table is written to pcWriteBuffer
+ *  void vTaskGetRunTimeStats( char *pcWriteBuffer )
+ *  {
+ *  TaskStatus_t *pxTaskStatusArray;
+ *  volatile UBaseType_t uxArraySize, x;
+ *  uint32_t ulTotalRunTime, ulStatsAsPercentage;
+ *
+ *      // Make sure the write buffer does not contain a string.
+ * *pcWriteBuffer = 0x00;
+ *
+ *      // Take a snapshot of the number of tasks in case it changes while this
+ *      // function is executing.
+ *      uxArraySize = uxTaskGetNumberOfTasks();
+ *
+ *      // Allocate a TaskStatus_t structure for each task.  An array could be
+ *      // allocated statically at compile time.
+ *      pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) );
+ *
+ *      if( pxTaskStatusArray != NULL )
+ *      {
+ *          // Generate raw status information about each task.
+ *          uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime );
+ *
+ *          // For percentage calculations.
+ *          ulTotalRunTime /= 100UL;
+ *
+ *          // Avoid divide by zero errors.
+ *          if( ulTotalRunTime > 0 )
+ *          {
+ *              // For each populated position in the pxTaskStatusArray array,
+ *              // format the raw data as human readable ASCII data
+ *              for( x = 0; x < uxArraySize; x++ )
+ *              {
+ *                  // What percentage of the total run time has the task used?
+ *                  // This will always be rounded down to the nearest integer.
+ *                  // ulTotalRunTimeDiv100 has already been divided by 100.
+ *                  ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime;
+ *
+ *                  if( ulStatsAsPercentage > 0UL )
+ *                  {
+ *                      sprintf( pcWriteBuffer, "%s\t\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
+ *                  }
+ *                  else
+ *                  {
+ *                      // If the percentage is zero here then the task has
+ *                      // consumed less than 1% of the total run time.
+ *                      sprintf( pcWriteBuffer, "%s\t\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter );
+ *                  }
+ *
+ *                  pcWriteBuffer += strlen( ( char * ) pcWriteBuffer );
+ *              }
+ *          }
+ *
+ *          // The array is no longer needed, free the memory it consumes.
+ *          vPortFree( pxTaskStatusArray );
+ *      }
+ *  }
+ *  @endcode
+ */
+UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
+                                  const UBaseType_t uxArraySize,
+                                  uint32_t * const pulTotalRunTime ) PRIVILEGED_FUNCTION;
+
+/**
+ * List all the current tasks.
+ *
+ * configUSE_TRACE_FACILITY and configUSE_STATS_FORMATTING_FUNCTIONS must
+ * both be defined as 1 for this function to be available.  See the
+ * configuration section of the FreeRTOS.org website for more information.
+ *
+ * NOTE 1: This function will disable interrupts for its duration.  It is
+ * not intended for normal application runtime use but as a debug aid.
+ *
+ * Lists all the current tasks, along with their current state and stack
+ * usage high water mark.
+ *
+ * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or
+ * suspended ('S').
+ *
+ * PLEASE NOTE:
+ *
+ * This function is provided for convenience only, and is used by many of the
+ * demo applications.  Do not consider it to be part of the scheduler.
+ *
+ * vTaskList() calls uxTaskGetSystemState(), then formats part of the
+ * uxTaskGetSystemState() output into a human readable table that displays task
+ * names, states and stack usage.
+ *
+ * vTaskList() has a dependency on the sprintf() C library function that might
+ * bloat the code size, use a lot of stack, and provide different results on
+ * different platforms.  An alternative, tiny, third party, and limited
+ * functionality implementation of sprintf() is provided in many of the
+ * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note
+ * printf-stdarg.c does not provide a full snprintf() implementation!).
+ *
+ * It is recommended that production systems call uxTaskGetSystemState()
+ * directly to get access to raw stats data, rather than indirectly through a
+ * call to vTaskList().
+ *
+ * @param pcWriteBuffer A buffer into which the above mentioned details
+ * will be written, in ASCII form.  This buffer is assumed to be large
+ * enough to contain the generated report.  Approximately 40 bytes per
+ * task should be sufficient.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskList vTaskList
+ * @endcond
+ * \ingroup TaskUtils
+ */
+void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * Get the state of running tasks as a string
+ *
+ * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS
+ * must both be defined as 1 for this function to be available.  The application
+ * must also then provide definitions for
+ * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()
+ * to configure a peripheral timer/counter and return the timers current count
+ * value respectively.  The counter should be at least 10 times the frequency of
+ * the tick count.
+ *
+ * NOTE 1: This function will disable interrupts for its duration.  It is
+ * not intended for normal application runtime use but as a debug aid.
+ *
+ * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total
+ * accumulated execution time being stored for each task.  The resolution
+ * of the accumulated time value depends on the frequency of the timer
+ * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
+ * Calling vTaskGetRunTimeStats() writes the total execution time of each
+ * task into a buffer, both as an absolute count value and as a percentage
+ * of the total system execution time.
+ *
+ * NOTE 2:
+ *
+ * This function is provided for convenience only, and is used by many of the
+ * demo applications.  Do not consider it to be part of the scheduler.
+ *
+ * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part of the
+ * uxTaskGetSystemState() output into a human readable table that displays the
+ * amount of time each task has spent in the Running state in both absolute and
+ * percentage terms.
+ *
+ * vTaskGetRunTimeStats() has a dependency on the sprintf() C library function
+ * that might bloat the code size, use a lot of stack, and provide different
+ * results on different platforms.  An alternative, tiny, third party, and
+ * limited functionality implementation of sprintf() is provided in many of the
+ * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note
+ * printf-stdarg.c does not provide a full snprintf() implementation!).
+ *
+ * It is recommended that production systems call uxTaskGetSystemState() directly
+ * to get access to raw stats data, rather than indirectly through a call to
+ * vTaskGetRunTimeStats().
+ *
+ * @param pcWriteBuffer A buffer into which the execution times will be
+ * written, in ASCII form.  This buffer is assumed to be large enough to
+ * contain the generated report.  Approximately 40 bytes per task should
+ * be sufficient.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats
+ * @endcond
+ * \ingroup TaskUtils
+ */
+void vTaskGetRunTimeStats( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code
+ * uint32_t ulTaskGetIdleRunTimeCounter( void );
+ * @endcode
+ * @endcond
+ *
+ * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS
+ * must both be defined as 1 for this function to be available.  The application
+ * must also then provide definitions for
+ * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()
+ * to configure a peripheral timer/counter and return the timers current count
+ * value respectively.  The counter should be at least 10 times the frequency of
+ * the tick count.
+ *
+ * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total
+ * accumulated execution time being stored for each task.  The resolution
+ * of the accumulated time value depends on the frequency of the timer
+ * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
+ * While uxTaskGetSystemState() and vTaskGetRunTimeStats() writes the total
+ * execution time of each task into a buffer, ulTaskGetIdleRunTimeCounter()
+ * returns the total execution time of just the idle task.
+ *
+ * @return The total run time of the idle task.  This is the amount of time the
+ * idle task has actually been executing.  The unit of time is dependent on the
+ * frequency configured using the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and
+ * portGET_RUN_TIME_COUNTER_VALUE() macros.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup ulTaskGetIdleRunTimeCounter ulTaskGetIdleRunTimeCounter
+ * @endcond
+ * \ingroup TaskUtils
+ */
+uint32_t ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskNotifyIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction );
+ * BaseType_t xTaskNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction );
+ * @endcode
+ * @endcond
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
+ * functions to be available.
+ *
+ * Sends a direct to task notification to a task, with an optional value and
+ * action.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * A task can use xTaskNotifyWaitIndexed() to [optionally] block to wait for a
+ * notification to be pending, or ulTaskNotifyTakeIndexed() to [optionally] block
+ * to wait for a notification value to have a non-zero value.  The task does
+ * not consume any CPU time while it is in the Blocked state.
+ *
+ * A notification sent to a task will remain pending until it is cleared by the
+ * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their
+ * un-indexed equivalents).  If the task was already in the Blocked state to
+ * wait for a notification when the notification arrives then the task will
+ * automatically be removed from the Blocked state (unblocked) and the
+ * notification cleared.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotify() is the original API function, and remains backward
+ * compatible by always operating on the notification value at index 0 in the
+ * array. Calling xTaskNotify() is equivalent to calling xTaskNotifyIndexed()
+ * with the uxIndexToNotify parameter set to 0.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @param uxIndexToNotify The index within the target task's array of
+ * notification values to which the notification is to be sent.  uxIndexToNotify
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotify() does
+ * not have this parameter and always sends notifications to index 0.
+ *
+ * @param ulValue Data that can be sent with the notification.  How the data is
+ * used depends on the value of the eAction parameter.
+ *
+ * @param eAction Specifies how the notification updates the task's notification
+ * value, if at all.  Valid values for eAction are as follows:
+ *
+ * eSetBits -
+ * The target notification value is bitwise ORed with ulValue.
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
+ *
+ * eIncrement -
+ * The target notification value is incremented.  ulValue is not used and
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
+ *
+ * eSetValueWithOverwrite -
+ * The target notification value is set to the value of ulValue, even if the
+ * task being notified had not yet processed the previous notification at the
+ * same array index (the task already had a notification pending at that index).
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
+ *
+ * eSetValueWithoutOverwrite -
+ * If the task being notified did not already have a notification pending at the
+ * same array index then the target notification value is set to ulValue and
+ * xTaskNotifyIndexed() will return pdPASS.  If the task being notified already
+ * had a notification pending at the same array index then no action is
+ * performed and pdFAIL is returned.
+ *
+ * eNoAction -
+ * The task receives a notification at the specified array index without the
+ * notification value at that index being updated.  ulValue is not used and
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
+ *
+ * pulPreviousNotificationValue -
+ * Can be used to pass out the subject task's notification value before any
+ * bits are modified by the notify function.
+ *
+ * @return Dependent on the value of eAction.  See the description of the
+ * eAction parameter.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskNotifyIndexed xTaskNotifyIndexed
+ * @endcond
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify,
+                               UBaseType_t uxIndexToNotify,
+                               uint32_t ulValue,
+                               eNotifyAction eAction,
+                               uint32_t * pulPreviousNotificationValue ) PRIVILEGED_FUNCTION;
+#define xTaskNotify( xTaskToNotify, ulValue, eAction ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL )
+#define xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskNotifyAndQueryIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotifyValue );
+ * BaseType_t xTaskNotifyAndQuery( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotifyValue );
+ * @endcode
+ * @endcond
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * xTaskNotifyAndQueryIndexed() performs the same operation as
+ * xTaskNotifyIndexed() with the addition that it also returns the subject
+ * task's prior notification value (the notification value at the time the
+ * function is called rather than when the function returns) in the additional
+ * pulPreviousNotifyValue parameter.
+ *
+ * xTaskNotifyAndQuery() performs the same operation as xTaskNotify() with the
+ * addition that it also returns the subject task's prior notification value
+ * (the notification value as it was at the time the function is called, rather
+ * than when the function returns) in the additional pulPreviousNotifyValue
+ * parameter.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskNotifyAndQueryIndexed xTaskNotifyAndQueryIndexed
+ * @endcond
+ * \ingroup TaskNotifications
+ */
+#define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
+#define xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotifyValue ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskNotifyIndexedFromISR( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );
+ * BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
+ * functions to be available.
+ *
+ * A version of xTaskNotifyIndexed() that can be used from an interrupt service
+ * routine (ISR).
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * A task can use xTaskNotifyWaitIndexed() to [optionally] block to wait for a
+ * notification to be pending, or ulTaskNotifyTakeIndexed() to [optionally] block
+ * to wait for a notification value to have a non-zero value.  The task does
+ * not consume any CPU time while it is in the Blocked state.
+ *
+ * A notification sent to a task will remain pending until it is cleared by the
+ * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their
+ * un-indexed equivalents).  If the task was already in the Blocked state to
+ * wait for a notification when the notification arrives then the task will
+ * automatically be removed from the Blocked state (unblocked) and the
+ * notification cleared.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotifyFromISR() is the original API function, and remains
+ * backward compatible by always operating on the notification value at index 0
+ * within the array. Calling xTaskNotifyFromISR() is equivalent to calling
+ * xTaskNotifyIndexedFromISR() with the uxIndexToNotify parameter set to 0.
+ *
+ * @param uxIndexToNotify The index within the target task's array of
+ * notification values to which the notification is to be sent.  uxIndexToNotify
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyFromISR()
+ * does not have this parameter and always sends notifications to index 0.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @param ulValue Data that can be sent with the notification.  How the data is
+ * used depends on the value of the eAction parameter.
+ *
+ * @param eAction Specifies how the notification updates the task's notification
+ * value, if at all.  Valid values for eAction are as follows:
+ *
+ * eSetBits -
+ * The task's notification value is bitwise ORed with ulValue.  xTaskNotify()
+ * always returns pdPASS in this case.
+ *
+ * eIncrement -
+ * The task's notification value is incremented.  ulValue is not used and
+ * xTaskNotify() always returns pdPASS in this case.
+ *
+ * eSetValueWithOverwrite -
+ * The task's notification value is set to the value of ulValue, even if the
+ * task being notified had not yet processed the previous notification (the
+ * task already had a notification pending).  xTaskNotify() always returns
+ * pdPASS in this case.
+ *
+ * eSetValueWithoutOverwrite -
+ * If the task being notified did not already have a notification pending then
+ * the task's notification value is set to ulValue and xTaskNotify() will
+ * return pdPASS.  If the task being notified already had a notification
+ * pending then no action is performed and pdFAIL is returned.
+ *
+ * eNoAction -
+ * The task receives a notification without its notification value being
+ * updated.  ulValue is not used and xTaskNotify() always returns pdPASS in
+ * this case.
+ *
+ * @param pxHigherPriorityTaskWoken  xTaskNotifyFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
+ * task to which the notification was sent to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently running task.  If
+ * xTaskNotifyFromISR() sets this value to pdTRUE then a context switch should
+ * be requested before the interrupt is exited.  How a context switch is
+ * requested from an ISR is dependent on the port - see the documentation page
+ * for the port in use.
+ *
+ * @return Dependent on the value of eAction.  See the description of the
+ * eAction parameter.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskNotifyIndexedFromISR xTaskNotifyIndexedFromISR
+ * @endcond
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
+                                      UBaseType_t uxIndexToNotify,
+                                      uint32_t ulValue,
+                                      eNotifyAction eAction,
+                                      uint32_t * pulPreviousNotificationValue,
+                                      BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) \
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
+#define xTaskNotifyIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) \
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskNotifyAndQueryIndexedFromISR( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken );
+ * BaseType_t xTaskNotifyAndQueryFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * xTaskNotifyAndQueryIndexedFromISR() performs the same operation as
+ * xTaskNotifyIndexedFromISR() with the addition that it also returns the
+ * subject task's prior notification value (the notification value at the time
+ * the function is called rather than at the time the function returns) in the
+ * additional pulPreviousNotifyValue parameter.
+ *
+ * xTaskNotifyAndQueryFromISR() performs the same operation as
+ * xTaskNotifyFromISR() with the addition that it also returns the subject
+ * task's prior notification value (the notification value at the time the
+ * function is called rather than at the time the function returns) in the
+ * additional pulPreviousNotifyValue parameter.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskNotifyAndQueryIndexedFromISR xTaskNotifyAndQueryIndexedFromISR
+ * @endcond
+ * \ingroup TaskNotifications
+ */
+#define xTaskNotifyAndQueryIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) \
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
+#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) \
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskNotifyWaitIndexed( UBaseType_t uxIndexToWaitOn, uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
+ *
+ * BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
+ * @endcode
+ * @endcond
+ *
+ * Waits for a direct to task notification to be pending at a given index within
+ * an array of direct to task notifications.
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
+ * function to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * A notification sent to a task will remain pending until it is cleared by the
+ * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their
+ * un-indexed equivalents).  If the task was already in the Blocked state to
+ * wait for a notification when the notification arrives then the task will
+ * automatically be removed from the Blocked state (unblocked) and the
+ * notification cleared.
+ *
+ * A task can use xTaskNotifyWaitIndexed() to [optionally] block to wait for a
+ * notification to be pending, or ulTaskNotifyTakeIndexed() to [optionally] block
+ * to wait for a notification value to have a non-zero value.  The task does
+ * not consume any CPU time while it is in the Blocked state.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotifyWait() is the original API function, and remains backward
+ * compatible by always operating on the notification value at index 0 in the
+ * array. Calling xTaskNotifyWait() is equivalent to calling
+ * xTaskNotifyWaitIndexed() with the uxIndexToWaitOn parameter set to 0.
+ *
+ * @param uxIndexToWaitOn The index within the calling task's array of
+ * notification values on which the calling task will wait for a notification to
+ * be received.  uxIndexToWaitOn must be less than
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyWait() does
+ * not have this parameter and always waits for notifications on index 0.
+ *
+ * @param ulBitsToClearOnEntry Bits that are set in ulBitsToClearOnEntry value
+ * will be cleared in the calling task's notification value before the task
+ * checks to see if any notifications are pending, and optionally blocks if no
+ * notifications are pending.  Setting ulBitsToClearOnEntry to ULONG_MAX (if
+ * limits.h is included) or 0xffffffffUL (if limits.h is not included) will have
+ * the effect of resetting the task's notification value to 0.  Setting
+ * ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged.
+ *
+ * @param ulBitsToClearOnExit If a notification is pending or received before
+ * the calling task exits the xTaskNotifyWait() function then the task's
+ * notification value (see the xTaskNotify() API function) is passed out using
+ * the pulNotificationValue parameter.  Then any bits that are set in
+ * ulBitsToClearOnExit will be cleared in the task's notification value (note
+ * *pulNotificationValue is set before any bits are cleared).  Setting
+ * ulBitsToClearOnExit to ULONG_MAX (if limits.h is included) or 0xffffffffUL
+ * (if limits.h is not included) will have the effect of resetting the task's
+ * notification value to 0 before the function exits.  Setting
+ * ulBitsToClearOnExit to 0 will leave the task's notification value unchanged
+ * when the function exits (in which case the value passed out in
+ * pulNotificationValue will match the task's notification value).
+ *
+ * @param pulNotificationValue Used to pass the task's notification value out
+ * of the function.  Note the value passed out will not be effected by the
+ * clearing of any bits caused by ulBitsToClearOnExit being non-zero.
+ *
+ * @param xTicksToWait The maximum amount of time that the task should wait in
+ * the Blocked state for a notification to be received, should a notification
+ * not already be pending when xTaskNotifyWait() was called.  The task
+ * will not consume any processing time while it is in the Blocked state.  This
+ * is specified in kernel ticks, the macro pdMS_TO_TICKS( value_in_ms ) can be
+ * used to convert a time specified in milliseconds to a time specified in
+ * ticks.
+ *
+ * @return If a notification was received (including notifications that were
+ * already pending when xTaskNotifyWait was called) then pdPASS is
+ * returned.  Otherwise pdFAIL is returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskNotifyWaitIndexed xTaskNotifyWaitIndexed
+ * @endcond
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
+                                   uint32_t ulBitsToClearOnEntry,
+                                   uint32_t ulBitsToClearOnExit,
+                                   uint32_t * pulNotificationValue,
+                                   TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+#define xTaskNotifyWait( ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ) \
+    xTaskGenericNotifyWait( tskDEFAULT_INDEX_TO_NOTIFY, ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) )
+#define xTaskNotifyWaitIndexed( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ) \
+    xTaskGenericNotifyWait( ( uxIndexToWaitOn ), ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskNotifyGiveIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify );
+ * BaseType_t xTaskNotifyGive( TaskHandle_t xTaskToNotify );
+ * @endcode
+ * @endcond
+ *
+ * Sends a direct to task notification to a particular index in the target
+ * task's notification array in a manner similar to giving a counting semaphore.
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
+ * macros to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * xTaskNotifyGiveIndexed() is a helper macro intended for use when task
+ * notifications are used as light weight and faster binary or counting
+ * semaphore equivalents.  Actual FreeRTOS semaphores are given using the
+ * xSemaphoreGive() API function, the equivalent action that instead uses a task
+ * notification is xTaskNotifyGiveIndexed().
+ *
+ * When task notifications are being used as a binary or counting semaphore
+ * equivalent then the task being notified should wait for the notification
+ * using the ulTaskNotificationTakeIndexed() API function rather than the
+ * xTaskNotifyWaitIndexed() API function.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotifyGive() is the original API function, and remains backward
+ * compatible by always operating on the notification value at index 0 in the
+ * array. Calling xTaskNotifyGive() is equivalent to calling
+ * xTaskNotifyGiveIndexed() with the uxIndexToNotify parameter set to 0.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @param uxIndexToNotify The index within the target task's array of
+ * notification values to which the notification is to be sent.  uxIndexToNotify
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyGive()
+ * does not have this parameter and always sends notifications to index 0.
+ *
+ * @return xTaskNotifyGive() is a macro that calls xTaskNotify() with the
+ * eAction parameter set to eIncrement - so pdPASS is always returned.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskNotifyGiveIndexed xTaskNotifyGiveIndexed
+ * @endcond
+ * \ingroup TaskNotifications
+ */
+#define xTaskNotifyGive( xTaskToNotify ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( 0 ), eIncrement, NULL )
+#define xTaskNotifyGiveIndexed( xTaskToNotify, uxIndexToNotify ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( 0 ), eIncrement, NULL )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * void vTaskNotifyGiveIndexedFromISR( TaskHandle_t xTaskHandle, UBaseType_t uxIndexToNotify, BaseType_t *pxHigherPriorityTaskWoken );
+ * void vTaskNotifyGiveFromISR( TaskHandle_t xTaskHandle, BaseType_t *pxHigherPriorityTaskWoken );
+ * @endcode
+ * @endcond
+ *
+ * A version of xTaskNotifyGiveIndexed() that can be called from an interrupt
+ * service routine (ISR).
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro
+ * to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * vTaskNotifyGiveIndexedFromISR() is intended for use when task notifications
+ * are used as light weight and faster binary or counting semaphore equivalents.
+ * Actual FreeRTOS semaphores are given from an ISR using the
+ * xSemaphoreGiveFromISR() API function, the equivalent action that instead uses
+ * a task notification is vTaskNotifyGiveIndexedFromISR().
+ *
+ * When task notifications are being used as a binary or counting semaphore
+ * equivalent then the task being notified should wait for the notification
+ * using the ulTaskNotificationTakeIndexed() API function rather than the
+ * xTaskNotifyWaitIndexed() API function.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotifyFromISR() is the original API function, and remains
+ * backward compatible by always operating on the notification value at index 0
+ * within the array. Calling xTaskNotifyGiveFromISR() is equivalent to calling
+ * xTaskNotifyGiveIndexedFromISR() with the uxIndexToNotify parameter set to 0.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @param uxIndexToNotify The index within the target task's array of
+ * notification values to which the notification is to be sent.  uxIndexToNotify
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.
+ * xTaskNotifyGiveFromISR() does not have this parameter and always sends
+ * notifications to index 0.
+ *
+ * @param pxHigherPriorityTaskWoken  vTaskNotifyGiveFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
+ * task to which the notification was sent to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently running task.  If
+ * vTaskNotifyGiveFromISR() sets this value to pdTRUE then a context switch
+ * should be requested before the interrupt is exited.  How a context switch is
+ * requested from an ISR is dependent on the port - see the documentation page
+ * for the port in use.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup vTaskNotifyGiveIndexedFromISR vTaskNotifyGiveIndexedFromISR
+ * @endcond
+ * \ingroup TaskNotifications
+ */
+void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
+                                    UBaseType_t uxIndexToNotify,
+                                    BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+#define vTaskNotifyGiveFromISR( xTaskToNotify, pxHigherPriorityTaskWoken ) \
+    vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( pxHigherPriorityTaskWoken ) );
+#define vTaskNotifyGiveIndexedFromISR( xTaskToNotify, uxIndexToNotify, pxHigherPriorityTaskWoken ) \
+    vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( pxHigherPriorityTaskWoken ) );
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * uint32_t ulTaskNotifyTakeIndexed( UBaseType_t uxIndexToWaitOn, BaseType_t xClearCountOnExit, TickType_t xTicksToWait );
+ *
+ * uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );
+ * @endcode
+ * @endcond
+ *
+ * Waits for a direct to task notification on a particular index in the calling
+ * task's notification array in a manner similar to taking a counting semaphore.
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
+ * function to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * ulTaskNotifyTakeIndexed() is intended for use when a task notification is
+ * used as a faster and lighter weight binary or counting semaphore alternative.
+ * Actual FreeRTOS semaphores are taken using the xSemaphoreTake() API function,
+ * the equivalent action that instead uses a task notification is
+ * ulTaskNotifyTakeIndexed().
+ *
+ * When a task is using its notification value as a binary or counting semaphore
+ * other tasks should send notifications to it using the xTaskNotifyGiveIndexed()
+ * macro, or xTaskNotifyIndex() function with the eAction parameter set to
+ * eIncrement.
+ *
+ * ulTaskNotifyTakeIndexed() can either clear the task's notification value at
+ * the array index specified by the uxIndexToWaitOn parameter to zero on exit,
+ * in which case the notification value acts like a binary semaphore, or
+ * decrement the notification value on exit, in which case the notification
+ * value acts like a counting semaphore.
+ *
+ * A task can use ulTaskNotifyTakeIndexed() to [optionally] block to wait for
+ * the task's notification value to be non-zero.  The task does not consume any
+ * CPU time while it is in the Blocked state.
+ *
+ * Where as xTaskNotifyWaitIndexed() will return when a notification is pending,
+ * ulTaskNotifyTakeIndexed() will return when the task's notification value is
+ * not zero.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  ulTaskNotifyTake() is the original API function, and remains backward
+ * compatible by always operating on the notification value at index 0 in the
+ * array. Calling ulTaskNotifyTake() is equivalent to calling
+ * ulTaskNotifyTakeIndexed() with the uxIndexToWaitOn parameter set to 0.
+ *
+ * @param uxIndexToWaitOn The index within the calling task's array of
+ * notification values on which the calling task will wait for a notification to
+ * be non-zero.  uxIndexToWaitOn must be less than
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyTake() does
+ * not have this parameter and always waits for notifications on index 0.
+ *
+ * @param xClearCountOnExit if xClearCountOnExit is pdFALSE then the task's
+ * notification value is decremented when the function exits.  In this way the
+ * notification value acts like a counting semaphore.  If xClearCountOnExit is
+ * not pdFALSE then the task's notification value is cleared to zero when the
+ * function exits.  In this way the notification value acts like a binary
+ * semaphore.
+ *
+ * @param xTicksToWait The maximum amount of time that the task should wait in
+ * the Blocked state for the task's notification value to be greater than zero,
+ * should the count not already be greater than zero when
+ * ulTaskNotifyTake() was called.  The task will not consume any processing
+ * time while it is in the Blocked state.  This is specified in kernel ticks,
+ * the macro pdMS_TO_TICKS( value_in_ms ) can be used to convert a time
+ * specified in milliseconds to a time specified in ticks.
+ *
+ * @return The task's notification count before it is either cleared to zero or
+ * decremented (see the xClearCountOnExit parameter).
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup ulTaskNotifyTakeIndexed ulTaskNotifyTakeIndexed
+ * @endcond
+ * \ingroup TaskNotifications
+ */
+uint32_t ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
+                                  BaseType_t xClearCountOnExit,
+                                  TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+#define ulTaskNotifyTake( xClearCountOnExit, xTicksToWait ) \
+    ulTaskGenericNotifyTake( ( tskDEFAULT_INDEX_TO_NOTIFY ), ( xClearCountOnExit ), ( xTicksToWait ) )
+#define ulTaskNotifyTakeIndexed( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ) \
+    ulTaskGenericNotifyTake( ( uxIndexToWaitOn ), ( xClearCountOnExit ), ( xTicksToWait ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * BaseType_t xTaskNotifyStateClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToCLear );
+ *
+ * BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );
+ * @endcode
+ * @endcond
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
+ * functions to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * If a notification is sent to an index within the array of notifications then
+ * the notification at that index is said to be 'pending' until it is read or
+ * explicitly cleared by the receiving task.  xTaskNotifyStateClearIndexed()
+ * is the function that clears a pending notification without reading the
+ * notification value.  The notification value at the same array index is not
+ * altered.  Set xTask to NULL to clear the notification state of the calling
+ * task.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotifyStateClear() is the original API function, and remains
+ * backward compatible by always operating on the notification value at index 0
+ * within the array. Calling xTaskNotifyStateClear() is equivalent to calling
+ * xTaskNotifyStateClearIndexed() with the uxIndexToNotify parameter set to 0.
+ *
+ * @param xTask The handle of the RTOS task that will have a notification state
+ * cleared.  Set xTask to NULL to clear a notification state in the calling
+ * task.  To obtain a task's handle create the task using xTaskCreate() and
+ * make use of the pxCreatedTask parameter, or create the task using
+ * xTaskCreateStatic() and store the returned value, or use the task's name in
+ * a call to xTaskGetHandle().
+ *
+ * @param uxIndexToClear The index within the target task's array of
+ * notification values to act upon.  For example, setting uxIndexToClear to 1
+ * will clear the state of the notification at index 1 within the array.
+ * uxIndexToClear must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.
+ * ulTaskNotifyStateClear() does not have this parameter and always acts on the
+ * notification at index 0.
+ *
+ * @return pdTRUE if the task's notification state was set to
+ * eNotWaitingNotification, otherwise pdFALSE.
+ *
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskNotifyStateClearIndexed xTaskNotifyStateClearIndexed
+ * @endcond
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskGenericNotifyStateClear( TaskHandle_t xTask,
+                                         UBaseType_t uxIndexToClear ) PRIVILEGED_FUNCTION;
+#define xTaskNotifyStateClear( xTask ) \
+    xTaskGenericNotifyStateClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ) )
+#define xTaskNotifyStateClearIndexed( xTask, uxIndexToClear ) \
+    xTaskGenericNotifyStateClear( ( xTask ), ( uxIndexToClear ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task. h
+ * @code{c}
+ * uint32_t ulTaskNotifyValueClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToClear, uint32_t ulBitsToClear );
+ *
+ * uint32_t ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear );
+ * @endcode
+ * @endcond
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
+ * functions to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * ulTaskNotifyValueClearIndexed() clears the bits specified by the
+ * ulBitsToClear bit mask in the notification value at array index uxIndexToClear
+ * of the task referenced by xTask.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  ulTaskNotifyValueClear() is the original API function, and remains
+ * backward compatible by always operating on the notification value at index 0
+ * within the array. Calling ulTaskNotifyValueClear() is equivalent to calling
+ * ulTaskNotifyValueClearIndexed() with the uxIndexToClear parameter set to 0.
+ *
+ * @param xTask The handle of the RTOS task that will have bits in one of its
+ * notification values cleared. Set xTask to NULL to clear bits in a
+ * notification value of the calling task.  To obtain a task's handle create the
+ * task using xTaskCreate() and make use of the pxCreatedTask parameter, or
+ * create the task using xTaskCreateStatic() and store the returned value, or
+ * use the task's name in a call to xTaskGetHandle().
+ *
+ * @param uxIndexToClear The index within the target task's array of
+ * notification values in which to clear the bits.  uxIndexToClear
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.
+ * ulTaskNotifyValueClear() does not have this parameter and always clears bits
+ * in the notification value at index 0.
+ *
+ * @param ulBitsToClear Bit mask of the bits to clear in the notification value of
+ * xTask. Set a bit to 1 to clear the corresponding bits in the task's notification
+ * value. Set ulBitsToClear to 0xffffffff (UINT_MAX on 32-bit architectures) to clear
+ * the notification value to 0.  Set ulBitsToClear to 0 to query the task's
+ * notification value without clearing any bits.
+ *
+ *
+ * @return The value of the target task's notification value before the bits
+ * specified by ulBitsToClear were cleared.
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup ulTaskNotifyValueClear ulTaskNotifyValueClear
+ * @endcond
+ * \ingroup TaskNotifications
+ */
+uint32_t ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
+                                        UBaseType_t uxIndexToClear,
+                                        uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;
+#define ulTaskNotifyValueClear( xTask, ulBitsToClear ) \
+    ulTaskGenericNotifyValueClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulBitsToClear ) )
+#define ulTaskNotifyValueClearIndexed( xTask, uxIndexToClear, ulBitsToClear ) \
+    ulTaskGenericNotifyValueClear( ( xTask ), ( uxIndexToClear ), ( ulBitsToClear ) )
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task.h
+ * @code{c}
+ * void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut );
+ * @endcode
+ * @endcond
+ *
+ * Capture the current time for future use with xTaskCheckForTimeOut().
+ *
+ * @param pxTimeOut Pointer to a timeout object into which the current time
+ * is to be captured.  The captured time includes the tick count and the number
+ * of times the tick count has overflowed since the system first booted.
+ * \defgroup vTaskSetTimeOutState vTaskSetTimeOutState
+ * @cond !DOC_SINGLE_GROUP
+ * \ingroup TaskCtrl
+ * @endcond
+ */
+void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task.h
+ * @code
+ * BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait );
+ * @endcode
+ * @endcond
+ *
+ * Determines if pxTicksToWait ticks has passed since a time was captured
+ * using a call to vTaskSetTimeOutState().  The captured time includes the tick
+ * count and the number of times the tick count has overflowed.
+ *
+ * @param pxTimeOut The time status as captured previously using
+ * vTaskSetTimeOutState. If the timeout has not yet occurred, it is updated
+ * to reflect the current time status.
+ * @param pxTicksToWait The number of ticks to check for timeout i.e. if
+ * pxTicksToWait ticks have passed since pxTimeOut was last updated (either by
+ * vTaskSetTimeOutState() or xTaskCheckForTimeOut()), the timeout has occurred.
+ * If the timeout has not occurred, pxTicksToWait is updated to reflect the
+ * number of remaining ticks.
+ *
+ * @return If timeout has occurred, pdTRUE is returned. Otherwise pdFALSE is
+ * returned and pxTicksToWait is updated to reflect the number of remaining
+ * ticks.
+ *
+ * @see https://www.FreeRTOS.org/xTaskCheckForTimeOut.html
+ *
+ * Example Usage:
+ * @code
+ *  // Driver library function used to receive uxWantedBytes from an Rx buffer
+ *  // that is filled by a UART interrupt. If there are not enough bytes in the
+ *  // Rx buffer then the task enters the Blocked state until it is notified that
+ *  // more data has been placed into the buffer. If there is still not enough
+ *  // data then the task re-enters the Blocked state, and xTaskCheckForTimeOut()
+ *  // is used to re-calculate the Block time to ensure the total amount of time
+ *  // spent in the Blocked state does not exceed MAX_TIME_TO_WAIT. This
+ *  // continues until either the buffer contains at least uxWantedBytes bytes,
+ *  // or the total amount of time spent in the Blocked state reaches
+ *  // MAX_TIME_TO_WAIT – at which point the task reads however many bytes are
+ *  // available up to a maximum of uxWantedBytes.
+ *
+ *  size_t xUART_Receive( uint8_t *pucBuffer, size_t uxWantedBytes )
+ *  {
+ *  size_t uxReceived = 0;
+ *  TickType_t xTicksToWait = MAX_TIME_TO_WAIT;
+ *  TimeOut_t xTimeOut;
+ *
+ *      // Initialize xTimeOut.  This records the time at which this function
+ *      // was entered.
+ *      vTaskSetTimeOutState( &xTimeOut );
+ *
+ *      // Loop until the buffer contains the wanted number of bytes, or a
+ *      // timeout occurs.
+ *      while( UART_bytes_in_rx_buffer( pxUARTInstance ) < uxWantedBytes )
+ *      {
+ *          // The buffer didn't contain enough data so this task is going to
+ *          // enter the Blocked state. Adjusting xTicksToWait to account for
+ *          // any time that has been spent in the Blocked state within this
+ *          // function so far to ensure the total amount of time spent in the
+ *          // Blocked state does not exceed MAX_TIME_TO_WAIT.
+ *          if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) != pdFALSE )
+ *          {
+ *              //Timed out before the wanted number of bytes were available,
+ *              // exit the loop.
+ *              break;
+ *          }
+ *
+ *          // Wait for a maximum of xTicksToWait ticks to be notified that the
+ *          // receive interrupt has placed more data into the buffer.
+ *          ulTaskNotifyTake( pdTRUE, xTicksToWait );
+ *      }
+ *
+ *      // Attempt to read uxWantedBytes from the receive buffer into pucBuffer.
+ *      // The actual number of bytes read (which might be less than
+ *      // uxWantedBytes) is returned.
+ *      uxReceived = UART_read_from_receive_buffer( pxUARTInstance,
+ *                                                  pucBuffer,
+ *                                                  uxWantedBytes );
+ *
+ *      return uxReceived;
+ *  }
+ * @endcode
+ * @cond !DOC_SINGLE_GROUP
+ * \defgroup xTaskCheckForTimeOut xTaskCheckForTimeOut
+ * @endcond
+ * \ingroup TaskCtrl
+ */
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
+                                 TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * task.h
+ * @code{c}
+ * BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp );
+ * @endcode
+ * @endcond
+ *
+ * This function corrects the tick count value after the application code has held
+ * interrupts disabled for an extended period resulting in tick interrupts having
+ * been missed.
+ *
+ * This function is similar to vTaskStepTick(), however, unlike
+ * vTaskStepTick(), xTaskCatchUpTicks() may move the tick count forward past a
+ * time at which a task should be removed from the blocked state.  That means
+ * tasks may have to be removed from the blocked state as the tick count is
+ * moved.
+ *
+ * @param xTicksToCatchUp The number of tick interrupts that have been missed due to
+ * interrupts being disabled.  Its value is not computed automatically, so must be
+ * computed by the application writer.
+ *
+ * @return pdTRUE if moving the tick count forward resulted in a task leaving the
+ * blocked state and a context switch being performed.  Otherwise pdFALSE.
+ *
+ * \defgroup xTaskCatchUpTicks xTaskCatchUpTicks
+ * @cond !DOC_SINGLE_GROUP
+ * \ingroup TaskCtrl
+ * @endcond
+ */
+BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) PRIVILEGED_FUNCTION;
+
+
+/*-----------------------------------------------------------
+ * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
+ *----------------------------------------------------------*/
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
+/*
+ * Return the handle of the task running on a certain CPU. Because of
+ * the nature of SMP processing, there is no guarantee that this
+ * value will still be valid on return and should only be used for
+ * debugging purposes.
+ */
+TaskHandle_t xTaskGetCurrentTaskHandleForCPU( BaseType_t cpuid );
+
+/**
+ * Get the handle of idle task for the given CPU.
+ *
+ * xTaskGetIdleTaskHandleForCPU() is only available if
+ * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h.
+ *
+ * @param cpuid The CPU to get the handle for
+ *
+ * @return Idle task handle of a given cpu. It is not valid to call
+ * xTaskGetIdleTaskHandleForCPU() before the scheduler has been started.
+ */
+TaskHandle_t xTaskGetIdleTaskHandleForCPU( UBaseType_t cpuid );
+
+/*
+ * Get the current core affinity of a task
+ */
+BaseType_t xTaskGetAffinity( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
+ * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
+ * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * Called from the real time kernel tick (either preemptive or cooperative),
+ * this increments the tick count and checks if any tasks that are blocked
+ * for a finite period required removing from a blocked list and placing on
+ * a ready list.  If a non-zero value is returned then a context switch is
+ * required because either:
+ *   + A task was removed from a blocked list because its timeout had expired,
+ *     or
+ *   + Time slicing is in use and there is a task of equal priority to the
+ *     currently running task.
+ */
+BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
+ *
+ * Removes the calling task from the ready list and places it both
+ * on the list of tasks waiting for a particular event, and the
+ * list of delayed tasks.  The task will be removed from both lists
+ * and replaced on the ready list should either the event occur (and
+ * there be no higher priority tasks waiting on the same event) or
+ * the delay period expires.
+ *
+ * The 'unordered' version replaces the event list item value with the
+ * xItemValue value, and inserts the list item at the end of the list.
+ *
+ * The 'ordered' version uses the existing event list item value (which is the
+ * owning task's priority) to insert the list item into the event list in task
+ * priority order.
+ *
+ * @param pxEventList The list containing tasks that are blocked waiting
+ * for the event to occur.
+ *
+ * @param xItemValue The item value to use for the event list item when the
+ * event list is not ordered by task priority.
+ *
+ * @param xTicksToWait The maximum amount of time that the task should wait
+ * for the event to occur.  This is specified in kernel ticks, the constant
+ * portTICK_PERIOD_MS can be used to convert kernel ticks into a real time
+ * period.
+ */
+void vTaskPlaceOnEventList( List_t * const pxEventList,
+                            const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+void vTaskPlaceOnUnorderedEventList( List_t * pxEventList,
+                                     const TickType_t xItemValue,
+                                     const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
+ *
+ * This function performs nearly the same function as vTaskPlaceOnEventList().
+ * The difference being that this function does not permit tasks to block
+ * indefinitely, whereas vTaskPlaceOnEventList() does.
+ *
+ */
+void vTaskPlaceOnEventListRestricted( List_t * const pxEventList,
+                                      TickType_t xTicksToWait,
+                                      const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
+ *
+ * Removes a task from both the specified event list and the list of blocked
+ * tasks, and places it on a ready queue.
+ *
+ * xTaskRemoveFromEventList()/vTaskRemoveFromUnorderedEventList() will be called
+ * if either an event occurs to unblock a task, or the block timeout period
+ * expires.
+ *
+ * xTaskRemoveFromEventList() is used when the event list is in task priority
+ * order.  It removes the list item from the head of the event list as that will
+ * have the highest priority owning task of all the tasks on the event list.
+ * vTaskRemoveFromUnorderedEventList() is used when the event list is not
+ * ordered and the event list items hold something other than the owning tasks
+ * priority.  In this case the event list item value is updated to the value
+ * passed in the xItemValue parameter.
+ *
+ * @return pdTRUE if the task being removed has a higher priority than the task
+ * making the call, otherwise pdFALSE.
+ */
+BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION;
+void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem,
+                                        const TickType_t xItemValue ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
+ * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
+ * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * Sets the pointer to the current TCB to the TCB of the highest priority task
+ * that is ready to run.
+ */
+portDONT_DISCARD void vTaskSwitchContext( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * THESE FUNCTIONS MUST NOT BE USED FROM APPLICATION CODE.  THEY ARE USED BY
+ * THE EVENT BITS MODULE.
+ */
+TickType_t uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Return the handle of the calling task.
+ */
+TaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Shortcut used by the queue implementation to prevent unnecessary call to
+ * taskYIELD();
+ */
+void vTaskMissedYield( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Returns the scheduler state as taskSCHEDULER_RUNNING,
+ * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED.
+ */
+BaseType_t xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Raises the priority of the mutex holder to that of the calling task should
+ * the mutex holder have a priority less than the calling task.
+ */
+BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
+
+/*
+ * Set the priority of a task back to its proper priority in the case that it
+ * inherited a higher priority while it was holding a semaphore.
+ */
+BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
+
+/*
+ * If a higher priority task attempting to obtain a mutex caused a lower
+ * priority task to inherit the higher priority task's priority - but the higher
+ * priority task then timed out without obtaining the mutex, then the lower
+ * priority task will disinherit the priority again - but only down as far as
+ * the highest priority task that is still waiting for the mutex (if there were
+ * more than one task waiting for the mutex).
+ */
+void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder,
+                                          UBaseType_t uxHighestPriorityWaitingTask ) PRIVILEGED_FUNCTION;
+
+/*
+ * Get the uxTCBNumber assigned to the task referenced by the xTask parameter.
+ */
+UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/*
+ * Set the uxTaskNumber of the task referenced by the xTask parameter to
+ * uxHandle.
+ */
+void vTaskSetTaskNumber( TaskHandle_t xTask,
+                         const UBaseType_t uxHandle ) PRIVILEGED_FUNCTION;
+
+/*
+ * Only available when configUSE_TICKLESS_IDLE is set to 1.
+ * If tickless mode is being used, or a low power mode is implemented, then
+ * the tick interrupt will not execute during idle periods.  When this is the
+ * case, the tick count value maintained by the scheduler needs to be kept up
+ * to date with the actual execution time by being skipped forward by a time
+ * equal to the idle period.
+ */
+void vTaskStepTick( const TickType_t xTicksToJump ) PRIVILEGED_FUNCTION;
+
+/*
+ * Only available when configUSE_TICKLESS_IDLE is set to 1.
+ * Provided for use within portSUPPRESS_TICKS_AND_SLEEP() to allow the port
+ * specific sleep function to determine if it is ok to proceed with the sleep,
+ * and if it is ok to proceed, if it is ok to sleep indefinitely.
+ *
+ * This function is necessary because portSUPPRESS_TICKS_AND_SLEEP() is only
+ * called with the scheduler suspended, not from within a critical section.  It
+ * is therefore possible for an interrupt to request a context switch between
+ * portSUPPRESS_TICKS_AND_SLEEP() and the low power mode actually being
+ * entered.  eTaskConfirmSleepModeStatus() should be called from a short
+ * critical section between the timer being stopped and the sleep mode being
+ * entered to ensure it is ok to proceed into the sleep mode.
+ */
+eSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * For internal use only.  Increment the mutex held count when a mutex is
+ * taken and return the handle of the task that has taken the mutex.
+ */
+TaskHandle_t pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * For internal use only.  Same as vTaskSetTimeOutState(), but without a critical
+ * section.
+ */
+void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
+
+#ifdef ESP_PLATFORM
+/* TODO: IDF-3683 */
+#include "freertos/task_snapshot.h"
+#endif // ESP_PLATFORM
+
+/** @endcond */
+
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+#endif /* INC_TASK_H */
diff --git a/tools/sdk/esp32s3/include/freertos/include/freertos/timers.h b/tools/sdk/esp32s3/include/freertos/include/freertos/timers.h
new file mode 100644
index 00000000000..af6dcb23501
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/include/freertos/timers.h
@@ -0,0 +1,1367 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+
+#ifndef TIMERS_H
+#define TIMERS_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h must appear in source files before include timers.h"
+#endif
+
+/*lint -save -e537 This headers are only multiply included if the application code
+ * happens to also be including task.h. */
+#include "task.h"
+/*lint -restore */
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*-----------------------------------------------------------
+ * MACROS AND DEFINITIONS
+ *----------------------------------------------------------*/
+
+/* IDs for commands that can be sent/received on the timer queue.  These are to
+ * be used solely through the macros that make up the public software timer API,
+ * as defined below.  The commands that are sent from interrupts must use the
+ * highest numbers as tmrFIRST_FROM_ISR_COMMAND is used to determine if the task
+ * or interrupt version of the queue send function should be used. */
+#define tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR    ( ( BaseType_t ) -2 )
+#define tmrCOMMAND_EXECUTE_CALLBACK             ( ( BaseType_t ) -1 )
+#define tmrCOMMAND_START_DONT_TRACE             ( ( BaseType_t ) 0 )
+#define tmrCOMMAND_START                        ( ( BaseType_t ) 1 )
+#define tmrCOMMAND_RESET                        ( ( BaseType_t ) 2 )
+#define tmrCOMMAND_STOP                         ( ( BaseType_t ) 3 )
+#define tmrCOMMAND_CHANGE_PERIOD                ( ( BaseType_t ) 4 )
+#define tmrCOMMAND_DELETE                       ( ( BaseType_t ) 5 )
+
+#define tmrFIRST_FROM_ISR_COMMAND               ( ( BaseType_t ) 6 )
+#define tmrCOMMAND_START_FROM_ISR               ( ( BaseType_t ) 6 )
+#define tmrCOMMAND_RESET_FROM_ISR               ( ( BaseType_t ) 7 )
+#define tmrCOMMAND_STOP_FROM_ISR                ( ( BaseType_t ) 8 )
+#define tmrCOMMAND_CHANGE_PERIOD_FROM_ISR       ( ( BaseType_t ) 9 )
+
+
+/**
+ * Type by which software timers are referenced.  For example, a call to
+ * xTimerCreate() returns an TimerHandle_t variable that can then be used to
+ * reference the subject timer in calls to other software timer API functions
+ * (for example, xTimerStart(), xTimerReset(), etc.).
+ */
+struct tmrTimerControl; /* The old naming convention is used to prevent breaking kernel aware debuggers. */
+#ifdef ESP_PLATFORM // IDF-3768
+typedef void* TimerHandle_t;
+#else
+typedef struct tmrTimerControl * TimerHandle_t;
+#endif // ESP_PLATFORM
+/*
+ * Defines the prototype to which timer callback functions must conform.
+ */
+typedef void (* TimerCallbackFunction_t)( TimerHandle_t xTimer );
+
+/*
+ * Defines the prototype to which functions used with the
+ * xTimerPendFunctionCallFromISR() function must conform.
+ */
+typedef void (* PendedFunction_t)( void *,
+                                   uint32_t );
+
+/**
+ * TimerHandle_t xTimerCreate(  const char * const pcTimerName,
+ *                              TickType_t xTimerPeriodInTicks,
+ *                              UBaseType_t uxAutoReload,
+ *                              void * pvTimerID,
+ *                              TimerCallbackFunction_t pxCallbackFunction );
+ *
+ * Creates a new software timer instance, and returns a handle by which the
+ * created software timer can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, software timers use a block
+ * of memory, in which the timer data structure is stored.  If a software timer
+ * is created using xTimerCreate() then the required memory is automatically
+ * dynamically allocated inside the xTimerCreate() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a software timer is created using
+ * xTimerCreateStatic() then the application writer must provide the memory that
+ * will get used by the software timer.  xTimerCreateStatic() therefore allows a
+ * software timer to be created without using any dynamic memory allocation.
+ *
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a
+ * timer into the active state.
+ *
+ * @param pcTimerName A text name that is assigned to the timer.  This is done
+ * purely to assist debugging.  The kernel itself only ever references a timer
+ * by its handle, and never by its name.
+ *
+ * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
+ * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
+ * has been specified in milliseconds.  For example, if the timer must expire
+ * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
+ * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
+ * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
+ * equal to 1000.  Time timer period must be greater than 0.
+ *
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
+ * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
+ * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
+ * enter the dormant state after it expires.
+ *
+ * @param pvTimerID An identifier that is assigned to the timer being created.
+ * Typically this would be used in the timer callback function to identify which
+ * timer expired when the same callback function is assigned to more than one
+ * timer.
+ *
+ * @param pxCallbackFunction The function to call when the timer expires.
+ * Callback functions must have the prototype defined by TimerCallbackFunction_t,
+ * which is "void vCallbackFunction( TimerHandle_t xTimer );".
+ *
+ * @return If the timer is successfully created then a handle to the newly
+ * created timer is returned.  If the timer cannot be created (because either
+ * there is insufficient FreeRTOS heap remaining to allocate the timer
+ * structures, or the timer period was set to 0) then NULL is returned.
+ *
+ * Example usage:
+ * @verbatim
+ * #define NUM_TIMERS 5
+ *
+ * // An array to hold handles to the created timers.
+ * TimerHandle_t xTimers[ NUM_TIMERS ];
+ *
+ * // An array to hold a count of the number of times each timer expires.
+ * int32_t lExpireCounters[ NUM_TIMERS ] = { 0 };
+ *
+ * // Define a callback function that will be used by multiple timer instances.
+ * // The callback function does nothing but count the number of times the
+ * // associated timer expires, and stop the timer once the timer has expired
+ * // 10 times.
+ * void vTimerCallback( TimerHandle_t pxTimer )
+ * {
+ * int32_t lArrayIndex;
+ * const int32_t xMaxExpiryCountBeforeStopping = 10;
+ *
+ *     // Optionally do something if the pxTimer parameter is NULL.
+ *     configASSERT( pxTimer );
+ *
+ *     // Which timer expired?
+ *     lArrayIndex = ( int32_t ) pvTimerGetTimerID( pxTimer );
+ *
+ *     // Increment the number of times that pxTimer has expired.
+ *     lExpireCounters[ lArrayIndex ] += 1;
+ *
+ *     // If the timer has expired 10 times then stop it from running.
+ *     if( lExpireCounters[ lArrayIndex ] == xMaxExpiryCountBeforeStopping )
+ *     {
+ *         // Do not use a block time if calling a timer API function from a
+ *         // timer callback function, as doing so could cause a deadlock!
+ *         xTimerStop( pxTimer, 0 );
+ *     }
+ * }
+ *
+ * void main( void )
+ * {
+ * int32_t x;
+ *
+ *     // Create then start some timers.  Starting the timers before the scheduler
+ *     // has been started means the timers will start running immediately that
+ *     // the scheduler starts.
+ *     for( x = 0; x < NUM_TIMERS; x++ )
+ *     {
+ *         xTimers[ x ] = xTimerCreate(    "Timer",       // Just a text name, not used by the kernel.
+ *                                         ( 100 * x ),   // The timer period in ticks.
+ *                                         pdTRUE,        // The timers will auto-reload themselves when they expire.
+ *                                         ( void * ) x,  // Assign each timer a unique id equal to its array index.
+ *                                         vTimerCallback // Each timer calls the same callback when it expires.
+ *                                     );
+ *
+ *         if( xTimers[ x ] == NULL )
+ *         {
+ *             // The timer was not created.
+ *         }
+ *         else
+ *         {
+ *             // Start the timer.  No block time is specified, and even if one was
+ *             // it would be ignored because the scheduler has not yet been
+ *             // started.
+ *             if( xTimerStart( xTimers[ x ], 0 ) != pdPASS )
+ *             {
+ *                 // The timer could not be set into the Active state.
+ *             }
+ *         }
+ *     }
+ *
+ *     // ...
+ *     // Create tasks here.
+ *     // ...
+ *
+ *     // Starting the scheduler will start the timers running as they have already
+ *     // been set into the active state.
+ *     vTaskStartScheduler();
+ *
+ *     // Should not reach here.
+ *     for( ;; );
+ * }
+ * @endverbatim
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    TimerHandle_t xTimerCreate( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                const TickType_t xTimerPeriodInTicks,
+                                const UBaseType_t uxAutoReload,
+                                void * const pvTimerID,
+                                TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * TimerHandle_t xTimerCreateStatic(const char * const pcTimerName,
+ *                                  TickType_t xTimerPeriodInTicks,
+ *                                  UBaseType_t uxAutoReload,
+ *                                  void * pvTimerID,
+ *                                  TimerCallbackFunction_t pxCallbackFunction,
+ *                                  StaticTimer_t *pxTimerBuffer );
+ *
+ * Creates a new software timer instance, and returns a handle by which the
+ * created software timer can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, software timers use a block
+ * of memory, in which the timer data structure is stored.  If a software timer
+ * is created using xTimerCreate() then the required memory is automatically
+ * dynamically allocated inside the xTimerCreate() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a software timer is created using
+ * xTimerCreateStatic() then the application writer must provide the memory that
+ * will get used by the software timer.  xTimerCreateStatic() therefore allows a
+ * software timer to be created without using any dynamic memory allocation.
+ *
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a
+ * timer into the active state.
+ *
+ * @param pcTimerName A text name that is assigned to the timer.  This is done
+ * purely to assist debugging.  The kernel itself only ever references a timer
+ * by its handle, and never by its name.
+ *
+ * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
+ * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
+ * has been specified in milliseconds.  For example, if the timer must expire
+ * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
+ * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
+ * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
+ * equal to 1000.  The timer period must be greater than 0.
+ *
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
+ * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
+ * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
+ * enter the dormant state after it expires.
+ *
+ * @param pvTimerID An identifier that is assigned to the timer being created.
+ * Typically this would be used in the timer callback function to identify which
+ * timer expired when the same callback function is assigned to more than one
+ * timer.
+ *
+ * @param pxCallbackFunction The function to call when the timer expires.
+ * Callback functions must have the prototype defined by TimerCallbackFunction_t,
+ * which is "void vCallbackFunction( TimerHandle_t xTimer );".
+ *
+ * @param pxTimerBuffer Must point to a variable of type StaticTimer_t, which
+ * will be then be used to hold the software timer's data structures, removing
+ * the need for the memory to be allocated dynamically.
+ *
+ * @return If the timer is created then a handle to the created timer is
+ * returned.  If pxTimerBuffer was NULL then NULL is returned.
+ *
+ * Example usage:
+ * @verbatim
+ *
+ * // The buffer used to hold the software timer's data structure.
+ * static StaticTimer_t xTimerBuffer;
+ *
+ * // A variable that will be incremented by the software timer's callback
+ * // function.
+ * UBaseType_t uxVariableToIncrement = 0;
+ *
+ * // A software timer callback function that increments a variable passed to
+ * // it when the software timer was created.  After the 5th increment the
+ * // callback function stops the software timer.
+ * static void prvTimerCallback( TimerHandle_t xExpiredTimer )
+ * {
+ * UBaseType_t *puxVariableToIncrement;
+ * BaseType_t xReturned;
+ *
+ *     // Obtain the address of the variable to increment from the timer ID.
+ *     puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer );
+ *
+ *     // Increment the variable to show the timer callback has executed.
+ *     ( *puxVariableToIncrement )++;
+ *
+ *     // If this callback has executed the required number of times, stop the
+ *     // timer.
+ *     if( *puxVariableToIncrement == 5 )
+ *     {
+ *         // This is called from a timer callback so must not block.
+ *         xTimerStop( xExpiredTimer, staticDONT_BLOCK );
+ *     }
+ * }
+ *
+ *
+ * void main( void )
+ * {
+ *     // Create the software time.  xTimerCreateStatic() has an extra parameter
+ *     // than the normal xTimerCreate() API function.  The parameter is a pointer
+ *     // to the StaticTimer_t structure that will hold the software timer
+ *     // structure.  If the parameter is passed as NULL then the structure will be
+ *     // allocated dynamically, just as if xTimerCreate() had been called.
+ *     xTimer = xTimerCreateStatic( "T1",             // Text name for the task.  Helps debugging only.  Not used by FreeRTOS.
+ *                                  xTimerPeriod,     // The period of the timer in ticks.
+ *                                  pdTRUE,           // This is an auto-reload timer.
+ *                                  ( void * ) &uxVariableToIncrement,    // A variable incremented by the software timer's callback function
+ *                                  prvTimerCallback, // The function to execute when the timer expires.
+ *                                  &xTimerBuffer );  // The buffer that will hold the software timer structure.
+ *
+ *     // The scheduler has not started yet so a block time is not used.
+ *     xReturned = xTimerStart( xTimer, 0 );
+ *
+ *     // ...
+ *     // Create tasks here.
+ *     // ...
+ *
+ *     // Starting the scheduler will start the timers running as they have already
+ *     // been set into the active state.
+ *     vTaskStartScheduler();
+ *
+ *     // Should not reach here.
+ *     for( ;; );
+ * }
+ * @endverbatim
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    TimerHandle_t xTimerCreateStatic( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                      const TickType_t xTimerPeriodInTicks,
+                                      const UBaseType_t uxAutoReload,
+                                      void * const pvTimerID,
+                                      TimerCallbackFunction_t pxCallbackFunction,
+                                      StaticTimer_t * pxTimerBuffer ) PRIVILEGED_FUNCTION;
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * void *pvTimerGetTimerID( TimerHandle_t xTimer );
+ *
+ * Returns the ID assigned to the timer.
+ *
+ * IDs are assigned to timers using the pvTimerID parameter of the call to
+ * xTimerCreated() that was used to create the timer, and by calling the
+ * vTimerSetTimerID() API function.
+ *
+ * If the same callback function is assigned to multiple timers then the timer
+ * ID can be used as time specific (timer local) storage.
+ *
+ * @param xTimer The timer being queried.
+ *
+ * @return The ID assigned to the timer being queried.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ */
+void * pvTimerGetTimerID( const TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/**
+ * void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID );
+ *
+ * Sets the ID assigned to the timer.
+ *
+ * IDs are assigned to timers using the pvTimerID parameter of the call to
+ * xTimerCreated() that was used to create the timer.
+ *
+ * If the same callback function is assigned to multiple timers then the timer
+ * ID can be used as time specific (timer local) storage.
+ *
+ * @param xTimer The timer being updated.
+ *
+ * @param pvNewID The ID to assign to the timer.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ */
+void vTimerSetTimerID( TimerHandle_t xTimer,
+                       void * pvNewID ) PRIVILEGED_FUNCTION;
+
+/**
+ * BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer );
+ *
+ * Queries a timer to see if it is active or dormant.
+ *
+ * A timer will be dormant if:
+ *     1) It has been created but not started, or
+ *     2) It is an expired one-shot timer that has not been restarted.
+ *
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the
+ * active state.
+ *
+ * @param xTimer The timer being queried.
+ *
+ * @return pdFALSE will be returned if the timer is dormant.  A value other than
+ * pdFALSE will be returned if the timer is active.
+ *
+ * Example usage:
+ * @verbatim
+ * // This function assumes xTimer has already been created.
+ * void vAFunction( TimerHandle_t xTimer )
+ * {
+ *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
+ *     {
+ *         // xTimer is active, do something.
+ *     }
+ *     else
+ *     {
+ *         // xTimer is not active, do something else.
+ *     }
+ * }
+ * @endverbatim
+ */
+BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
+ * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );
+ * @endcond
+ *
+ * xTimerGetTimerDaemonTaskHandle() is only available if
+ * INCLUDE_xTimerGetTimerDaemonTaskHandle is set to 1 in FreeRTOSConfig.h.
+ *
+ * Simply returns the handle of the timer service/daemon task.  It it not valid
+ * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started.
+ */
+TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerStart() starts a timer that was previously created using the
+ * xTimerCreate() API function.  If the timer had already been started and was
+ * already in the active state, then xTimerStart() has equivalent functionality
+ * to the xTimerReset() API function.
+ *
+ * Starting a timer ensures the timer is in the active state.  If the timer
+ * is not stopped, deleted, or reset in the mean time, the callback function
+ * associated with the timer will get called 'n' ticks after xTimerStart() was
+ * called, where 'n' is the timers defined period.
+ *
+ * It is valid to call xTimerStart() before the scheduler has been started, but
+ * when this is done the timer will not actually start until the scheduler is
+ * started, and the timers expiry time will be relative to when the scheduler is
+ * started, not relative to when xTimerStart() was called.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStart()
+ * to be available.
+ *
+ * @param xTimer The handle of the timer being started/restarted.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the start command to be successfully
+ * sent to the timer command queue, should the queue already be full when
+ * xTimerStart() was called.  xTicksToWait is ignored if xTimerStart() is called
+ * before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the start command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system, although the
+ * timers expiry time is relative to when xTimerStart() is actually called.  The
+ * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ *
+ */
+#define xTimerStart( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerStop() stops a timer that was previously started using either of the
+ * The xTimerStart(), xTimerReset(), xTimerStartFromISR(), xTimerResetFromISR(),
+ * xTimerChangePeriod() or xTimerChangePeriodFromISR() API functions.
+ *
+ * Stopping a timer ensures the timer is not in the active state.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStop()
+ * to be available.
+ *
+ * @param xTimer The handle of the timer being stopped.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the stop command to be successfully
+ * sent to the timer command queue, should the queue already be full when
+ * xTimerStop() was called.  xTicksToWait is ignored if xTimerStop() is called
+ * before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the stop command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system.  The timer
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ *
+ */
+#define xTimerStop( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerChangePeriod(   TimerHandle_t xTimer,
+ *                                  TickType_t xNewPeriod,
+ *                                  TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerChangePeriod() changes the period of a timer that was previously
+ * created using the xTimerCreate() API function.
+ *
+ * xTimerChangePeriod() can be called to change the period of an active or
+ * dormant state timer.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for
+ * xTimerChangePeriod() to be available.
+ *
+ * @param xTimer The handle of the timer that is having its period changed.
+ *
+ * @param xNewPeriod The new period for xTimer. Timer periods are specified in
+ * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
+ * that has been specified in milliseconds.  For example, if the timer must
+ * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
+ * if the timer must expire after 500ms, then xNewPeriod can be set to
+ * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
+ * or equal to 1000.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the change period command to be
+ * successfully sent to the timer command queue, should the queue already be
+ * full when xTimerChangePeriod() was called.  xTicksToWait is ignored if
+ * xTimerChangePeriod() is called before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the change period command could not be
+ * sent to the timer command queue even after xTicksToWait ticks had passed.
+ * pdPASS will be returned if the command was successfully sent to the timer
+ * command queue.  When the command is actually processed will depend on the
+ * priority of the timer service/daemon task relative to other tasks in the
+ * system.  The timer service/daemon task priority is set by the
+ * configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This function assumes xTimer has already been created.  If the timer
+ * // referenced by xTimer is already active when it is called, then the timer
+ * // is deleted.  If the timer referenced by xTimer is not active when it is
+ * // called, then the period of the timer is set to 500ms and the timer is
+ * // started.
+ * void vAFunction( TimerHandle_t xTimer )
+ * {
+ *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
+ *     {
+ *         // xTimer is already active - delete it.
+ *         xTimerDelete( xTimer );
+ *     }
+ *     else
+ *     {
+ *         // xTimer is not active, change its period to 500ms.  This will also
+ *         // cause the timer to start.  Block for a maximum of 100 ticks if the
+ *         // change period command cannot immediately be sent to the timer
+ *         // command queue.
+ *         if( xTimerChangePeriod( xTimer, 500 / portTICK_PERIOD_MS, 100 ) == pdPASS )
+ *         {
+ *             // The command was successfully sent.
+ *         }
+ *         else
+ *         {
+ *             // The command could not be sent, even after waiting for 100 ticks
+ *             // to pass.  Take appropriate action here.
+ *         }
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerDelete() deletes a timer that was previously created using the
+ * xTimerCreate() API function.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for
+ * xTimerDelete() to be available.
+ *
+ * @param xTimer The handle of the timer being deleted.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the delete command to be
+ * successfully sent to the timer command queue, should the queue already be
+ * full when xTimerDelete() was called.  xTicksToWait is ignored if xTimerDelete()
+ * is called before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the delete command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system.  The timer
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ *
+ * See the xTimerChangePeriod() API function example usage scenario.
+ */
+#define xTimerDelete( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerReset() re-starts a timer that was previously created using the
+ * xTimerCreate() API function.  If the timer had already been started and was
+ * already in the active state, then xTimerReset() will cause the timer to
+ * re-evaluate its expiry time so that it is relative to when xTimerReset() was
+ * called.  If the timer was in the dormant state then xTimerReset() has
+ * equivalent functionality to the xTimerStart() API function.
+ *
+ * Resetting a timer ensures the timer is in the active state.  If the timer
+ * is not stopped, deleted, or reset in the mean time, the callback function
+ * associated with the timer will get called 'n' ticks after xTimerReset() was
+ * called, where 'n' is the timers defined period.
+ *
+ * It is valid to call xTimerReset() before the scheduler has been started, but
+ * when this is done the timer will not actually start until the scheduler is
+ * started, and the timers expiry time will be relative to when the scheduler is
+ * started, not relative to when xTimerReset() was called.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerReset()
+ * to be available.
+ *
+ * @param xTimer The handle of the timer being reset/started/restarted.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the reset command to be successfully
+ * sent to the timer command queue, should the queue already be full when
+ * xTimerReset() was called.  xTicksToWait is ignored if xTimerReset() is called
+ * before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the reset command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system, although the
+ * timers expiry time is relative to when xTimerStart() is actually called.  The
+ * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // When a key is pressed, an LCD back-light is switched on.  If 5 seconds pass
+ * // without a key being pressed, then the LCD back-light is switched off.  In
+ * // this case, the timer is a one-shot timer.
+ *
+ * TimerHandle_t xBacklightTimer = NULL;
+ *
+ * // The callback function assigned to the one-shot timer.  In this case the
+ * // parameter is not used.
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
+ * {
+ *     // The timer expired, therefore 5 seconds must have passed since a key
+ *     // was pressed.  Switch off the LCD back-light.
+ *     vSetBacklightState( BACKLIGHT_OFF );
+ * }
+ *
+ * // The key press event handler.
+ * void vKeyPressEventHandler( char cKey )
+ * {
+ *     // Ensure the LCD back-light is on, then reset the timer that is
+ *     // responsible for turning the back-light off after 5 seconds of
+ *     // key inactivity.  Wait 10 ticks for the command to be successfully sent
+ *     // if it cannot be sent immediately.
+ *     vSetBacklightState( BACKLIGHT_ON );
+ *     if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )
+ *     {
+ *         // The reset command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // Perform the rest of the key processing here.
+ * }
+ *
+ * void main( void )
+ * {
+ * int32_t x;
+ *
+ *     // Create then start the one-shot timer that is responsible for turning
+ *     // the back-light off if no keys are pressed within a 5 second period.
+ *     xBacklightTimer = xTimerCreate( "BacklightTimer",           // Just a text name, not used by the kernel.
+ *                                     ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks.
+ *                                     pdFALSE,                    // The timer is a one-shot timer.
+ *                                     0,                          // The id is not used by the callback so can take any value.
+ *                                     vBacklightTimerCallback     // The callback function that switches the LCD back-light off.
+ *                                   );
+ *
+ *     if( xBacklightTimer == NULL )
+ *     {
+ *         // The timer was not created.
+ *     }
+ *     else
+ *     {
+ *         // Start the timer.  No block time is specified, and even if one was
+ *         // it would be ignored because the scheduler has not yet been
+ *         // started.
+ *         if( xTimerStart( xBacklightTimer, 0 ) != pdPASS )
+ *         {
+ *             // The timer could not be set into the Active state.
+ *         }
+ *     }
+ *
+ *     // ...
+ *     // Create tasks here.
+ *     // ...
+ *
+ *     // Starting the scheduler will start the timer running as it has already
+ *     // been set into the active state.
+ *     vTaskStartScheduler();
+ *
+ *     // Should not reach here.
+ *     for( ;; );
+ * }
+ * @endverbatim
+ */
+#define xTimerReset( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerStartFromISR(   TimerHandle_t xTimer,
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerStart() that can be called from an interrupt service
+ * routine.
+ *
+ * @param xTimer The handle of the timer being started/restarted.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerStartFromISR() writes a message to the timer
+ * command queue, so has the potential to transition the timer service/daemon
+ * task out of the Blocked state.  If calling xTimerStartFromISR() causes the
+ * timer service/daemon task to leave the Blocked state, and the timer service/
+ * daemon task has a priority equal to or greater than the currently executing
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
+ * get set to pdTRUE internally within the xTimerStartFromISR() function.  If
+ * xTimerStartFromISR() sets this value to pdTRUE then a context switch should
+ * be performed before the interrupt exits.
+ *
+ * @return pdFAIL will be returned if the start command could not be sent to
+ * the timer command queue.  pdPASS will be returned if the command was
+ * successfully sent to the timer command queue.  When the command is actually
+ * processed will depend on the priority of the timer service/daemon task
+ * relative to other tasks in the system, although the timers expiry time is
+ * relative to when xTimerStartFromISR() is actually called.  The timer
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xBacklightTimer has already been created.  When a
+ * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
+ * // without a key being pressed, then the LCD back-light is switched off.  In
+ * // this case, the timer is a one-shot timer, and unlike the example given for
+ * // the xTimerReset() function, the key press event handler is an interrupt
+ * // service routine.
+ *
+ * // The callback function assigned to the one-shot timer.  In this case the
+ * // parameter is not used.
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
+ * {
+ *     // The timer expired, therefore 5 seconds must have passed since a key
+ *     // was pressed.  Switch off the LCD back-light.
+ *     vSetBacklightState( BACKLIGHT_OFF );
+ * }
+ *
+ * // The key press interrupt service routine.
+ * void vKeyPressEventInterruptHandler( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // Ensure the LCD back-light is on, then restart the timer that is
+ *     // responsible for turning the back-light off after 5 seconds of
+ *     // key inactivity.  This is an interrupt service routine so can only
+ *     // call FreeRTOS API functions that end in "FromISR".
+ *     vSetBacklightState( BACKLIGHT_ON );
+ *
+ *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
+ *     // as both cause the timer to re-calculate its expiry time.
+ *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
+ *     // declared (in this function).
+ *     if( xTimerStartFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The start command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // Perform the rest of the key processing here.
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
+
+/**
+ * BaseType_t xTimerStopFromISR(    TimerHandle_t xTimer,
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerStop() that can be called from an interrupt service
+ * routine.
+ *
+ * @param xTimer The handle of the timer being stopped.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerStopFromISR() writes a message to the timer
+ * command queue, so has the potential to transition the timer service/daemon
+ * task out of the Blocked state.  If calling xTimerStopFromISR() causes the
+ * timer service/daemon task to leave the Blocked state, and the timer service/
+ * daemon task has a priority equal to or greater than the currently executing
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
+ * get set to pdTRUE internally within the xTimerStopFromISR() function.  If
+ * xTimerStopFromISR() sets this value to pdTRUE then a context switch should
+ * be performed before the interrupt exits.
+ *
+ * @return pdFAIL will be returned if the stop command could not be sent to
+ * the timer command queue.  pdPASS will be returned if the command was
+ * successfully sent to the timer command queue.  When the command is actually
+ * processed will depend on the priority of the timer service/daemon task
+ * relative to other tasks in the system.  The timer service/daemon task
+ * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xTimer has already been created and started.  When
+ * // an interrupt occurs, the timer should be simply stopped.
+ *
+ * // The interrupt service routine that stops the timer.
+ * void vAnExampleInterruptServiceRoutine( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // The interrupt has occurred - simply stop the timer.
+ *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
+ *     // (within this function).  As this is an interrupt service routine, only
+ *     // FreeRTOS API functions that end in "FromISR" can be used.
+ *     if( xTimerStopFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The stop command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U )
+
+/**
+ * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer,
+ *                                       TickType_t xNewPeriod,
+ *                                       BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerChangePeriod() that can be called from an interrupt
+ * service routine.
+ *
+ * @param xTimer The handle of the timer that is having its period changed.
+ *
+ * @param xNewPeriod The new period for xTimer. Timer periods are specified in
+ * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
+ * that has been specified in milliseconds.  For example, if the timer must
+ * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
+ * if the timer must expire after 500ms, then xNewPeriod can be set to
+ * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
+ * or equal to 1000.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerChangePeriodFromISR() writes a message to the
+ * timer command queue, so has the potential to transition the timer service/
+ * daemon task out of the Blocked state.  If calling xTimerChangePeriodFromISR()
+ * causes the timer service/daemon task to leave the Blocked state, and the
+ * timer service/daemon task has a priority equal to or greater than the
+ * currently executing task (the task that was interrupted), then
+ * *pxHigherPriorityTaskWoken will get set to pdTRUE internally within the
+ * xTimerChangePeriodFromISR() function.  If xTimerChangePeriodFromISR() sets
+ * this value to pdTRUE then a context switch should be performed before the
+ * interrupt exits.
+ *
+ * @return pdFAIL will be returned if the command to change the timers period
+ * could not be sent to the timer command queue.  pdPASS will be returned if the
+ * command was successfully sent to the timer command queue.  When the command
+ * is actually processed will depend on the priority of the timer service/daemon
+ * task relative to other tasks in the system.  The timer service/daemon task
+ * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xTimer has already been created and started.  When
+ * // an interrupt occurs, the period of xTimer should be changed to 500ms.
+ *
+ * // The interrupt service routine that changes the period of xTimer.
+ * void vAnExampleInterruptServiceRoutine( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // The interrupt has occurred - change the period of xTimer to 500ms.
+ *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
+ *     // (within this function).  As this is an interrupt service routine, only
+ *     // FreeRTOS API functions that end in "FromISR" can be used.
+ *     if( xTimerChangePeriodFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The command to change the timers period was not executed
+ *         // successfully.  Take appropriate action here.
+ *     }
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )
+
+/**
+ * BaseType_t xTimerResetFromISR(   TimerHandle_t xTimer,
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerReset() that can be called from an interrupt service
+ * routine.
+ *
+ * @param xTimer The handle of the timer that is to be started, reset, or
+ * restarted.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerResetFromISR() writes a message to the timer
+ * command queue, so has the potential to transition the timer service/daemon
+ * task out of the Blocked state.  If calling xTimerResetFromISR() causes the
+ * timer service/daemon task to leave the Blocked state, and the timer service/
+ * daemon task has a priority equal to or greater than the currently executing
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
+ * get set to pdTRUE internally within the xTimerResetFromISR() function.  If
+ * xTimerResetFromISR() sets this value to pdTRUE then a context switch should
+ * be performed before the interrupt exits.
+ *
+ * @return pdFAIL will be returned if the reset command could not be sent to
+ * the timer command queue.  pdPASS will be returned if the command was
+ * successfully sent to the timer command queue.  When the command is actually
+ * processed will depend on the priority of the timer service/daemon task
+ * relative to other tasks in the system, although the timers expiry time is
+ * relative to when xTimerResetFromISR() is actually called.  The timer service/daemon
+ * task priority is set by the configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xBacklightTimer has already been created.  When a
+ * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
+ * // without a key being pressed, then the LCD back-light is switched off.  In
+ * // this case, the timer is a one-shot timer, and unlike the example given for
+ * // the xTimerReset() function, the key press event handler is an interrupt
+ * // service routine.
+ *
+ * // The callback function assigned to the one-shot timer.  In this case the
+ * // parameter is not used.
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
+ * {
+ *     // The timer expired, therefore 5 seconds must have passed since a key
+ *     // was pressed.  Switch off the LCD back-light.
+ *     vSetBacklightState( BACKLIGHT_OFF );
+ * }
+ *
+ * // The key press interrupt service routine.
+ * void vKeyPressEventInterruptHandler( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // Ensure the LCD back-light is on, then reset the timer that is
+ *     // responsible for turning the back-light off after 5 seconds of
+ *     // key inactivity.  This is an interrupt service routine so can only
+ *     // call FreeRTOS API functions that end in "FromISR".
+ *     vSetBacklightState( BACKLIGHT_ON );
+ *
+ *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
+ *     // as both cause the timer to re-calculate its expiry time.
+ *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
+ *     // declared (in this function).
+ *     if( xTimerResetFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The reset command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // Perform the rest of the key processing here.
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
+
+
+/**
+ * BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
+ *                                          void *pvParameter1,
+ *                                          uint32_t ulParameter2,
+ *                                          BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ *
+ * Used from application interrupt service routines to defer the execution of a
+ * function to the RTOS daemon task (the timer service task, hence this function
+ * is implemented in timers.c and is prefixed with 'Timer').
+ *
+ * Ideally an interrupt service routine (ISR) is kept as short as possible, but
+ * sometimes an ISR either has a lot of processing to do, or needs to perform
+ * processing that is not deterministic.  In these cases
+ * xTimerPendFunctionCallFromISR() can be used to defer processing of a function
+ * to the RTOS daemon task.
+ *
+ * A mechanism is provided that allows the interrupt to return directly to the
+ * task that will subsequently execute the pended callback function.  This
+ * allows the callback function to execute contiguously in time with the
+ * interrupt - just as if the callback had executed in the interrupt itself.
+ *
+ * @param xFunctionToPend The function to execute from the timer service/
+ * daemon task.  The function must conform to the PendedFunction_t
+ * prototype.
+ *
+ * @param pvParameter1 The value of the callback function's first parameter.
+ * The parameter has a void * type to allow it to be used to pass any type.
+ * For example, unsigned longs can be cast to a void *, or the void * can be
+ * used to point to a structure.
+ *
+ * @param ulParameter2 The value of the callback function's second parameter.
+ *
+ * @param pxHigherPriorityTaskWoken As mentioned above, calling this function
+ * will result in a message being sent to the timer daemon task.  If the
+ * priority of the timer daemon task (which is set using
+ * configTIMER_TASK_PRIORITY in FreeRTOSConfig.h) is higher than the priority of
+ * the currently running task (the task the interrupt interrupted) then
+ * *pxHigherPriorityTaskWoken will be set to pdTRUE within
+ * xTimerPendFunctionCallFromISR(), indicating that a context switch should be
+ * requested before the interrupt exits.  For that reason
+ * *pxHigherPriorityTaskWoken must be initialised to pdFALSE.  See the
+ * example code below.
+ *
+ * @return pdPASS is returned if the message was successfully sent to the
+ * timer daemon task, otherwise pdFALSE is returned.
+ *
+ * Example usage:
+ * @verbatim
+ *
+ *  // The callback function that will execute in the context of the daemon task.
+ *  // Note callback functions must all use this same prototype.
+ *  void vProcessInterface( void *pvParameter1, uint32_t ulParameter2 )
+ *  {
+ *      BaseType_t xInterfaceToService;
+ *
+ *      // The interface that requires servicing is passed in the second
+ *      // parameter.  The first parameter is not used in this case.
+ *      xInterfaceToService = ( BaseType_t ) ulParameter2;
+ *
+ *      // ...Perform the processing here...
+ *  }
+ *
+ *  // An ISR that receives data packets from multiple interfaces
+ *  void vAnISR( void )
+ *  {
+ *      BaseType_t xInterfaceToService, xHigherPriorityTaskWoken;
+ *
+ *      // Query the hardware to determine which interface needs processing.
+ *      xInterfaceToService = prvCheckInterfaces();
+ *
+ *      // The actual processing is to be deferred to a task.  Request the
+ *      // vProcessInterface() callback function is executed, passing in the
+ *      // number of the interface that needs processing.  The interface to
+ *      // service is passed in the second parameter.  The first parameter is
+ *      // not used in this case.
+ *      xHigherPriorityTaskWoken = pdFALSE;
+ *      xTimerPendFunctionCallFromISR( vProcessInterface, NULL, ( uint32_t ) xInterfaceToService, &xHigherPriorityTaskWoken );
+ *
+ *      // If xHigherPriorityTaskWoken is now set to pdTRUE then a context
+ *      // switch should be requested.  The macro used is port specific and will
+ *      // be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() - refer to
+ *      // the documentation page for the port being used.
+ *      portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ *
+ *  }
+ * @endverbatim
+ */
+BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
+                                          void * pvParameter1,
+                                          uint32_t ulParameter2,
+                                          BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
+ *                                    void *pvParameter1,
+ *                                    uint32_t ulParameter2,
+ *                                    TickType_t xTicksToWait );
+ *
+ *
+ * Used to defer the execution of a function to the RTOS daemon task (the timer
+ * service task, hence this function is implemented in timers.c and is prefixed
+ * with 'Timer').
+ *
+ * @param xFunctionToPend The function to execute from the timer service/
+ * daemon task.  The function must conform to the PendedFunction_t
+ * prototype.
+ *
+ * @param pvParameter1 The value of the callback function's first parameter.
+ * The parameter has a void * type to allow it to be used to pass any type.
+ * For example, unsigned longs can be cast to a void *, or the void * can be
+ * used to point to a structure.
+ *
+ * @param ulParameter2 The value of the callback function's second parameter.
+ *
+ * @param xTicksToWait Calling this function will result in a message being
+ * sent to the timer daemon task on a queue.  xTicksToWait is the amount of
+ * time the calling task should remain in the Blocked state (so not using any
+ * processing time) for space to become available on the timer queue if the
+ * queue is found to be full.
+ *
+ * @return pdPASS is returned if the message was successfully sent to the
+ * timer daemon task, otherwise pdFALSE is returned.
+ *
+ */
+BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
+                                   void * pvParameter1,
+                                   uint32_t ulParameter2,
+                                   TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * const char * const pcTimerGetName( TimerHandle_t xTimer );
+ *
+ * Returns the name that was assigned to a timer when the timer was created.
+ *
+ * @param xTimer The handle of the timer being queried.
+ *
+ * @return The name assigned to the timer specified by the xTimer parameter.
+ */
+const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * void vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload );
+ *
+ * Updates a timer to be either an auto-reload timer, in which case the timer
+ * automatically resets itself each time it expires, or a one-shot timer, in
+ * which case the timer will only expire once unless it is manually restarted.
+ *
+ * @param xTimer The handle of the timer being updated.
+ *
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
+ * expire repeatedly with a frequency set by the timer's period (see the
+ * xTimerPeriodInTicks parameter of the xTimerCreate() API function).  If
+ * uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
+ * enter the dormant state after it expires.
+ */
+void vTimerSetReloadMode( TimerHandle_t xTimer,
+                          const UBaseType_t uxAutoReload ) PRIVILEGED_FUNCTION;
+
+/**
+ * UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer );
+ *
+ * Queries a timer to determine if it is an auto-reload timer, in which case the timer
+ * automatically resets itself each time it expires, or a one-shot timer, in
+ * which case the timer will only expire once unless it is manually restarted.
+ *
+ * @param xTimer The handle of the timer being queried.
+ *
+ * @return If the timer is an auto-reload timer then pdTRUE is returned, otherwise
+ * pdFALSE is returned.
+ */
+UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/**
+ * TickType_t xTimerGetPeriod( TimerHandle_t xTimer );
+ *
+ * Returns the period of a timer.
+ *
+ * @param xTimer The handle of the timer being queried.
+ *
+ * @return The period of the timer in ticks.
+ */
+TickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/**
+ * TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer );
+ *
+ * Returns the time in ticks at which the timer will expire.  If this is less
+ * than the current tick count then the expiry time has overflowed from the
+ * current time.
+ *
+ * @param xTimer The handle of the timer being queried.
+ *
+ * @return If the timer is running then the time in ticks at which the timer
+ * will next expire is returned.  If the timer is not running then the return
+ * value is undefined.
+ */
+TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
+
+/*
+ * Functions beyond this part are not part of the public API and are intended
+ * for use by the kernel only.
+ */
+BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;
+BaseType_t xTimerGenericCommand( TimerHandle_t xTimer,
+                                 const BaseType_t xCommandID,
+                                 const TickType_t xOptionalValue,
+                                 BaseType_t * const pxHigherPriorityTaskWoken,
+                                 const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+    void vTimerSetTimerNumber( TimerHandle_t xTimer,
+                               UBaseType_t uxTimerNumber ) PRIVILEGED_FUNCTION;
+    UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+#endif
+
+/** @endcond */
+
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+
+    /**
+     * @cond !DOC_EXCLUDE_HEADER_SECTION
+     * task.h
+     * @code{c}
+     * void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize )
+     * @endcode
+     * @endcond
+     *
+     * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Timer Task TCB.  This function is required when
+     * configSUPPORT_STATIC_ALLOCATION is set.  For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
+     *
+     * @param ppxTimerTaskTCBBuffer   A handle to a statically allocated TCB buffer
+     * @param ppxTimerTaskStackBuffer A handle to a statically allocated Stack buffer for thie idle task
+     * @param pulTimerTaskStackSize   A pointer to the number of elements that will fit in the allocated stack buffer
+     */
+    void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer,
+                                          StackType_t ** ppxTimerTaskStackBuffer,
+                                              uint32_t * pulTimerTaskStackSize );
+
+#endif
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+#endif /* TIMERS_H */
diff --git a/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/FreeRTOSConfig_arch.h b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/FreeRTOSConfig_arch.h
new file mode 100644
index 00000000000..f2aab51ccfc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/FreeRTOSConfig_arch.h
@@ -0,0 +1,166 @@
+/*
+    FreeRTOS V10 - Copyright (C) 2021 Real Time Engineers Ltd.
+    All rights reserved
+
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+    This file is part of the FreeRTOS distribution.
+
+    FreeRTOS is free software; you can redistribute it and/or modify it under
+    the terms of the GNU General Public License (version 2) as published by the
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+
+	***************************************************************************
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<
+    >>!   obliged to provide the source code for proprietary components     !<<
+    >>!   outside of the FreeRTOS kernel.                                   !<<
+	***************************************************************************
+
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
+    link: http://www.freertos.org/a00114.html
+
+    ***************************************************************************
+     *                                                                       *
+     *    FreeRTOS provides completely free yet professionally developed,    *
+     *    robust, strictly quality controlled, supported, and cross          *
+     *    platform software that is more than just the market leader, it     *
+     *    is the industry's de facto standard.                               *
+     *                                                                       *
+     *    Help yourself get started quickly while simultaneously helping     *
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
+     *    tutorial book, reference manual, or both:                          *
+     *    http://www.FreeRTOS.org/Documentation                              *
+     *                                                                       *
+    ***************************************************************************
+
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
+	the FAQ page "My application does not run, what could be wrong?".  Have you
+	defined configASSERT()?
+
+	http://www.FreeRTOS.org/support - In return for receiving this top quality
+	embedded software for free we request you assist our global community by
+	participating in the support forum.
+
+	http://www.FreeRTOS.org/training - Investing in training allows your team to
+	be as productive as possible as early as possible.  Now you can receive
+	FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+	Ltd, and the world's leading authority on the world's leading RTOS.
+
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
+    licenses offer ticketed support, indemnification and commercial middleware.
+
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+    engineered and independently SIL3 certified version for use in safety and
+    mission critical applications that require provable dependability.
+
+    1 tab == 4 spaces!
+*/
+
+#ifndef FREERTOS_CONFIG_XTENSA_H
+#define FREERTOS_CONFIG_XTENSA_H
+
+#include "sdkconfig.h"
+
+/* enable use of optimized task selection by the scheduler */
+#ifdef CONFIG_FREERTOS_OPTIMIZED_SCHEDULER
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION         1
+#endif
+
+#define XT_USE_THREAD_SAFE_CLIB                         0
+#undef XT_USE_SWPRI
+
+#if CONFIG_FREERTOS_CORETIMER_0
+#define XT_TIMER_INDEX                                  0
+#elif CONFIG_FREERTOS_CORETIMER_1
+#define XT_TIMER_INDEX                                  1
+#endif
+
+#ifndef __ASSEMBLER__
+/**
+ * This function is defined to provide a deprecation warning whenever
+ * XT_CLOCK_FREQ macro is used.
+ * Update the code to use esp_clk_cpu_freq function instead.
+ * @return current CPU clock frequency, in Hz
+ */
+int xt_clock_freq(void) __attribute__((deprecated));
+
+#define XT_CLOCK_FREQ   (xt_clock_freq())
+
+#endif // __ASSEMBLER__
+
+/* Required for configuration-dependent settings */
+#include <freertos/xtensa_config.h>
+
+/* configASSERT behaviour */
+#ifndef __ASSEMBLER__
+#include <assert.h>
+#include "esp_rom_sys.h"
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/ets_sys.h"  // will be removed in idf v5.0
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/ets_sys.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/ets_sys.h"
+#endif
+#endif // __ASSEMBLER__
+
+// If CONFIG_FREERTOS_ASSERT_DISABLE is set then configASSERT is defined empty later in FreeRTOS.h and the macro
+// configASSERT_DEFINED remains unset (meaning some warnings are avoided)
+
+#if defined(CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE)
+#define configASSERT(a) if (unlikely(!(a))) {                           \
+        esp_rom_printf("%s:%d (%s)- assert failed!\n", __FILE__, __LINE__,  \
+                   __FUNCTION__);                                           \
+    }
+#elif defined(CONFIG_FREERTOS_ASSERT_FAIL_ABORT)
+#define configASSERT(a) assert(a)
+#endif
+
+#if CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION
+#define UNTESTED_FUNCTION() { esp_rom_printf("Untested FreeRTOS function %s\r\n", __FUNCTION__); configASSERT(false); } while(0)
+#else
+#define UNTESTED_FUNCTION()
+#endif
+
+#define configXT_BOARD                                  1   /* Board mode */
+#define configXT_SIMULATOR                              0
+
+/* The maximum interrupt priority from which FreeRTOS.org API functions can
+   be called.  Only API functions that end in ...FromISR() can be used within
+   interrupts. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY	XCHAL_EXCM_LEVEL
+
+/* Stack alignment, architecture specifc. Must be a power of two. */
+#define configSTACK_ALIGNMENT                           16
+
+
+/* The Xtensa port uses a separate interrupt stack. Adjust the stack size
+ * to suit the needs of your specific application.
+ * Size needs to be aligned to the stack increment, since the location of
+ * the stack for the 2nd CPU will be calculated using configISR_STACK_SIZE.
+ */
+#ifndef configISR_STACK_SIZE
+#define configISR_STACK_SIZE                            ((CONFIG_FREERTOS_ISR_STACKSIZE + configSTACK_ALIGNMENT - 1) & (~(configSTACK_ALIGNMENT - 1)))
+#endif
+
+#ifndef __ASSEMBLER__
+#if CONFIG_APPTRACE_SV_ENABLE
+extern uint32_t port_switch_flag[];
+#define os_task_switch_is_pended(_cpu_) (port_switch_flag[_cpu_])
+#else
+#define os_task_switch_is_pended(_cpu_) (false)
+#endif
+#endif
+
+#endif // FREERTOS_CONFIG_XTENSA_H
diff --git a/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/portbenchmark.h b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/portbenchmark.h
new file mode 100644
index 00000000000..4ce41d3dad8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/portbenchmark.h
@@ -0,0 +1,46 @@
+/*******************************************************************************
+// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+--------------------------------------------------------------------------------
+*/
+
+/*
+ * This utility helps benchmarking interrupt latency and context switches.
+ * In order to enable it, set configBENCHMARK to 1 in FreeRTOSConfig.h.
+ * You will also need to download the FreeRTOS_trace patch that contains
+ * portbenchmark.c and the complete version of portbenchmark.h
+ */
+
+#ifndef PORTBENCHMARK_H
+#define PORTBENCHMARK_H
+
+#if configBENCHMARK
+    #error "You need to download the FreeRTOS_trace patch that overwrites this file"
+#endif
+
+#define portbenchmarkINTERRUPT_DISABLE()
+#define portbenchmarkINTERRUPT_RESTORE(newstate)
+#define portbenchmarkIntLatency()
+#define portbenchmarkIntWait()
+#define portbenchmarkReset()
+#define portbenchmarkPrint()
+
+#endif /* PORTBENCHMARK */
diff --git a/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/portmacro.h b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/portmacro.h
new file mode 100644
index 00000000000..2ee4c12c2b8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/portmacro.h
@@ -0,0 +1,761 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+#ifndef __ASSEMBLER__
+
+#include "sdkconfig.h"
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <stdarg.h>
+#include <xtensa/config/core.h>
+#include <xtensa/hal.h>             /* required for xthal_get_ccount. [refactor-todo] use cpu_hal instead */
+#include <xtensa/xtruntime.h>       /* required for XTOS_SET_INTLEVEL. [refactor-todo] add common intr functions to esp_hw_support */
+#include "xt_instr_macros.h"
+#include "soc/spinlock.h"
+#include "hal/cpu_hal.h"
+#include "esp_private/crosscore_int.h"
+#include "esp_attr.h"
+#include "esp_timer.h"              /* required for esp_timer_get_time. [refactor-todo] make this common between archs */
+#include "esp_newlib.h"             /* required for esp_reent_init() in tasks.c */
+#include "esp_heap_caps.h"
+#include "esp_rom_sys.h"
+#include "esp_system.h"             /* required by esp_get_...() functions in portable.h. [refactor-todo] Update portable.h */
+#include "portbenchmark.h"
+
+/* [refactor-todo] These includes are not directly used in this file. They are kept into to prevent a breaking change. Remove these. */
+#include <limits.h>
+#include <xtensa/config/system.h>
+#include <xtensa/xtensa_api.h>
+#include "soc/cpu.h"
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
+#include "soc/soc_memory_layout.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+/* --------------------------------------------------- Port Types ------------------------------------------------------
+ * - Port specific types.
+ * - The settings in this file configure FreeRTOS correctly for the given hardware and compiler.
+ * - These settings should not be altered.
+ * - The port types must come before first as they are used further down the file
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+#define portCHAR                    int8_t
+#define portFLOAT                   float
+#define portDOUBLE                  double
+#define portLONG                    int32_t
+#define portSHORT                   int16_t
+#define portSTACK_TYPE              uint8_t
+#define portBASE_TYPE               int
+
+typedef portSTACK_TYPE              StackType_t;
+typedef portBASE_TYPE               BaseType_t;
+typedef unsigned portBASE_TYPE      UBaseType_t;
+
+#if( configUSE_16_BIT_TICKS == 1 )
+typedef uint16_t TickType_t;
+#define portMAX_DELAY ( TickType_t ) 0xffff
+#else
+typedef uint32_t TickType_t;
+#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+#endif
+
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )  void vFunction( void *pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters )        void vFunction( void *pvParameters )
+
+
+
+/* ----------------------------------------------- Port Configurations -------------------------------------------------
+ * - Configurations values supplied by each port
+ * - Required by FreeRTOS
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+#define portCRITICAL_NESTING_IN_TCB     0
+#define portSTACK_GROWTH                ( -1 )
+#define portTICK_PERIOD_MS              ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portBYTE_ALIGNMENT              4
+#define portNOP()                       XT_NOP()
+
+
+
+/* ---------------------------------------------- Forward Declarations -------------------------------------------------
+ * - Forward declarations of all the port functions and macros need to implement the FreeRTOS porting interface
+ * - These must come before definition/declaration of the FreeRTOS porting interface
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// --------------------- Interrupts ------------------------
+
+/**
+ * @brief Checks if the current core is in an ISR context
+ *
+ * - ISR context consist of Low/Mid priority ISR, or time tick ISR
+ * - High priority ISRs aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
+ *
+ * @note [refactor-todo] Check if this should be inlined
+ * @return
+ *  - pdTRUE if in ISR
+ *  - pdFALSE otherwise
+ */
+BaseType_t xPortInIsrContext(void);
+
+/**
+ * @brief Asserts if in ISR context
+ *
+ * - Asserts on xPortInIsrContext() internally
+ *
+ * @note [refactor-todo] Check if this API is still required
+ * @note [refactor-todo] Check if this should be inlined
+ */
+void vPortAssertIfInISR(void);
+
+/**
+ * @brief Check if in ISR context from High priority ISRs
+ *
+ * - Called from High priority ISR
+ * - Checks if the previous context (before high priority interrupt) was in ISR context (meaning low/med priority)
+ *
+ * @note [refactor-todo] Check if this should be inlined
+ * @return
+ *  - pdTRUE if in previous in ISR context
+ *  - pdFALSE otherwise
+ */
+BaseType_t xPortInterruptedFromISRContext(void);
+
+/**
+ * @brief Disable interrupts in a nested manner (meant to be called from ISRs)
+ *
+ * @warning Only applies to current CPU.
+ * @return UBaseType_t Previous interrupt level
+ */
+static inline UBaseType_t xPortSetInterruptMaskFromISR(void);
+
+/**
+ * @brief Reenable interrupts in a nested manner (meant to be called from ISRs)
+ *
+ * @warning Only applies to current CPU.
+ * @param prev_level Previous interrupt level
+ */
+static inline void vPortClearInterruptMaskFromISR(UBaseType_t prev_level);
+
+/* ---------------------- Spinlocks ------------------------
+ * - Modifications made to critical sections to support SMP
+ * - See "Critical Sections & Disabling Interrupts" in docs/api-guides/freertos-smp.rst for more details
+ * - Remark: For the ESP32, portENTER_CRITICAL and portENTER_CRITICAL_ISR both alias vPortEnterCritical, meaning that
+ *           either function can be called both from ISR as well as task context. This is not standard FreeRTOS
+ *           behaviorr; please keep this in mind if you need any compatibility with other FreeRTOS implementations.
+ * @note [refactor-todo] Check if these comments are still true
+ * ------------------------------------------------------ */
+
+typedef spinlock_t                          portMUX_TYPE;               /**< Spinlock type used by FreeRTOS critical sections */
+#define portMUX_INITIALIZER_UNLOCKED        SPINLOCK_INITIALIZER        /**< Spinlock initializer */
+#define portMUX_FREE_VAL                    SPINLOCK_FREE               /**< Spinlock is free. [refactor-todo] check if this is still required */
+#define portMUX_NO_TIMEOUT                  SPINLOCK_WAIT_FOREVER       /**< When passed for 'timeout_cycles', spin forever if necessary. [refactor-todo] check if this is still required */
+#define portMUX_TRY_LOCK                    SPINLOCK_NO_WAIT            /**< Try to acquire the spinlock a single time only. [refactor-todo] check if this is still required */
+#define portMUX_INITIALIZE(mux)             spinlock_initialize(mux)    /*< Initialize a spinlock to its unlocked state */
+
+// ------------------ Critical Sections --------------------
+
+/**
+ * @brief Enter a SMP critical section with a timeout
+ *
+ * This function enters an SMP critical section by disabling interrupts then
+ * taking a spinlock with a specified timeout.
+ *
+ * This function can be called in a nested manner.
+ *
+ * @note This function is made non-inline on purpose to reduce code size
+ * @param mux Spinlock
+ * @param timeout Timeout to wait for spinlock in number of CPU cycles.
+ *                Use portMUX_NO_TIMEOUT to wait indefinitely
+ *                Use portMUX_TRY_LOCK to only getting the spinlock a single time
+ * @retval pdPASS Critical section entered (spinlock taken)
+ * @retval pdFAIL If timed out waiting for spinlock (will not occur if using portMUX_NO_TIMEOUT)
+ */
+BaseType_t xPortEnterCriticalTimeout(portMUX_TYPE *mux, BaseType_t timeout);
+
+/**
+ * @brief Enter a SMP critical section
+ *
+ * This function enters an SMP critical section by disabling interrupts then
+ * taking a spinlock with an unlimited timeout.
+ *
+ * This function can be called in a nested manner
+ *
+ * @param[in] mux Spinlock
+ */
+static inline void __attribute__((always_inline)) vPortEnterCritical(portMUX_TYPE *mux);
+
+/**
+ * @brief Exit a SMP critical section
+ *
+ * This function can be called in a nested manner. On the outer most level of nesting, this function will:
+ *
+ * - Release the spinlock
+ * - Restore the previous interrupt level before the critical section was entered
+ *
+ * If still nesting, this function simply decrements a critical nesting count
+ *
+ * @note This function is made non-inline on purpose to reduce code size
+ * @param[in] mux Spinlock
+ */
+void vPortExitCritical(portMUX_TYPE *mux);
+
+/**
+ * @brief FreeRTOS Compliant version of xPortEnterCriticalTimeout()
+ *
+ * Compliant version of xPortEnterCriticalTimeout() will ensure that this is
+ * called from a task context only. An abort is called otherwise.
+ *
+ * @note This function is made non-inline on purpose to reduce code size
+ *
+ * @param mux Spinlock
+ * @param timeout Timeout
+ * @return BaseType_t
+ */
+BaseType_t xPortEnterCriticalTimeoutCompliance(portMUX_TYPE *mux, BaseType_t timeout);
+
+/**
+ * @brief FreeRTOS compliant version of vPortEnterCritical()
+ *
+ * Compliant version of vPortEnterCritical() will ensure that this is
+ * called from a task context only. An abort is called otherwise.
+ *
+ * @param[in] mux Spinlock
+ */
+static inline void __attribute__((always_inline)) vPortEnterCriticalCompliance(portMUX_TYPE *mux);
+
+/**
+ * @brief FreeRTOS compliant version of vPortExitCritical()
+ *
+ * Compliant version of vPortExitCritical() will ensure that this is
+ * called from a task context only. An abort is called otherwise.
+ *
+ * @note This function is made non-inline on purpose to reduce code size
+ * @param[in] mux Spinlock
+ */
+void vPortExitCriticalCompliance(portMUX_TYPE *mux);
+
+/**
+ * @brief Safe version of enter critical timeout
+ *
+ * Safe version of enter critical will automatically select between
+ * portTRY_ENTER_CRITICAL() and portTRY_ENTER_CRITICAL_ISR()
+ *
+ * @param mux Spinlock
+ * @param timeout Timeout
+ * @return BaseType_t
+ */
+static inline BaseType_t __attribute__((always_inline)) xPortEnterCriticalTimeoutSafe(portMUX_TYPE *mux, BaseType_t timeout);
+
+/**
+ * @brief Safe version of enter critical
+ *
+ * Safe version of enter critical will automatically select between
+ * portENTER_CRITICAL() and portENTER_CRITICAL_ISR()
+ *
+ * @param[in] mux Spinlock
+ */
+static inline void __attribute__((always_inline)) vPortEnterCriticalSafe(portMUX_TYPE *mux);
+
+/**
+ * @brief Safe version of exit critical
+ *
+ * Safe version of enter critical will automatically select between
+ * portEXIT_CRITICAL() and portEXIT_CRITICAL_ISR()
+ *
+ * @param[in] mux Spinlock
+ */
+static inline void __attribute__((always_inline)) vPortExitCriticalSafe(portMUX_TYPE *mux);
+
+// ---------------------- Yielding -------------------------
+
+/**
+ * @brief Perform a solicited context switch
+ *
+ * - Defined in portasm.S
+ *
+ * @note [refactor-todo] The rest of ESP-IDF should call taskYield() instead
+ */
+void vPortYield( void );
+
+/**
+ * @brief
+ *
+ * @note [refactor-todo] Refactor this to avoid va_args
+ * @param argc
+ * @param ... Variable arguments to allow for IDF prototype without arguments, and vanilla version WITH argument
+ */
+void vPortEvaluateYieldFromISR(int argc, ...);
+
+/**
+ * @brief Yields the other core
+ *
+ * - Send an interrupt to another core in order to make the task running on it yield for a higher-priority task.
+ * - Can be used to yield current core as well
+ *
+ * @note [refactor-todo] Put this into private macros as its only called from task.c and is not public API
+ * @param coreid ID of core to yield
+ */
+void vPortYieldOtherCore(BaseType_t coreid);
+
+/**
+ * @brief Checks if the current core can yield
+ *
+ * - A core cannot yield if its in an ISR or in a critical section
+ *
+ * @note [refactor-todo] See if this can be separated from port macro
+ * @return true Core can yield
+ * @return false Core cannot yield
+ */
+static inline bool IRAM_ATTR xPortCanYield(void);
+
+// ------------------- Hook Functions ----------------------
+
+extern void esp_vApplicationIdleHook(void);     /* Required by tasks.c */
+extern void esp_vApplicationTickHook(void);     /* Required by tasks.c */
+
+/**
+ * @brief Hook function called on entry to tickless idle
+ *
+ * - Implemented in pm_impl.c
+ *
+ * @param xExpectedIdleTime Expected idle time
+ */
+void vApplicationSleep(TickType_t xExpectedIdleTime);
+
+// ----------------------- System --------------------------
+
+/**
+ * @brief Get the tick rate per second
+ *
+ * @note [refactor-todo] make this inline
+ * @return uint32_t Tick rate in Hz
+ */
+uint32_t xPortGetTickRateHz(void);
+
+/**
+ * @brief Set a watchpoint to watch the last 32 bytes of the stack
+ *
+ * Callback to set a watchpoint on the end of the stack. Called every context switch to change the stack watchpoint
+ * around.
+ *
+ * @param pxStackStart Pointer to the start of the stack
+ */
+void vPortSetStackWatchpoint( void *pxStackStart );
+
+/**
+ * @brief Get the current core's ID
+ *
+ * @note [refactor-todo] IDF should call a FreeRTOS like macro instead of port function directly
+ * @return BaseType_t Core ID
+ */
+static inline BaseType_t IRAM_ATTR xPortGetCoreID(void);
+
+/**
+ * @brief Wrapper for atomic compare-and-set instruction
+ *
+ * This subroutine will atomically compare *addr to 'compare'. If *addr == compare, *addr is set to *set. *set is
+ * updated with the previous value of *addr (either 'compare' or some other value.)
+ *
+ * @warning From the ISA docs: in some (unspecified) cases, the s32c1i instruction may return the "bitwise inverse" of
+ *          the old mem if the mem wasn't written. This doesn't seem to happen on the ESP32 (portMUX assertions would
+ *          fail).
+ *
+ * @note [refactor-todo] Check if this can be deprecated
+ * @note [refactor-todo] Check if this function should be renamed (due to void return type)
+ *
+ * @param[inout] addr Pointer to target address
+ * @param[in] compare Compare value
+ * @param[inout] set Pointer to set value
+ */
+static inline void __attribute__((always_inline)) uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
+
+/**
+ * @brief Wrapper for atomic compare-and-set instruction in external RAM
+ *
+ * Atomic compare-and-set but the target address is placed in external RAM
+ *
+ * @note [refactor-todo] Check if this can be deprecated
+ *
+ * @param[inout] addr Pointer to target address
+ * @param[in] compare Compare value
+ * @param[inout] set Pointer to set value
+ */
+static inline void __attribute__((always_inline)) uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
+
+
+
+/* ------------------------------------------- FreeRTOS Porting Interface ----------------------------------------------
+ * - Contains all the mappings of the macros required by FreeRTOS
+ * - Most come after forward declare as porting macros map to declared functions
+ * - Maps to forward declared functions
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// ----------------------- Memory --------------------------
+
+/**
+ * @brief Task memory allocation macros
+ *
+ * @note Because the ROM routines don't necessarily handle a stack in external RAM correctly, we force the stack
+ * memory to always be internal.
+ * @note [refactor-todo] Update portable.h to match v10.4.3 to use new malloc prototypes
+ */
+#define portTcbMemoryCaps               (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
+#define portStackMemoryCaps             (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
+#define pvPortMallocTcbMem(size)        heap_caps_malloc(size, portTcbMemoryCaps)
+#define pvPortMallocStackMem(size)      heap_caps_malloc(size, portStackMemoryCaps)
+
+// --------------------- Interrupts ------------------------
+
+/**
+ * - Only applies to current core
+ * - These cannot be nested. They should be used with a lot of care and cannot be called from interrupt level.
+ *
+ * @note [refactor-todo] replace XTOS_SET_INTLEVEL with more efficient version, if any?
+ */
+#define portDISABLE_INTERRUPTS()            do { XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL); portbenchmarkINTERRUPT_DISABLE(); } while (0)
+#define portENABLE_INTERRUPTS()             do { portbenchmarkINTERRUPT_RESTORE(0); XTOS_SET_INTLEVEL(0); } while (0)
+
+/**
+ * ISR versions to enable/disable interrupts
+ */
+#define portSET_INTERRUPT_MASK_FROM_ISR()                   xPortSetInterruptMaskFromISR()
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(prev_level)       vPortClearInterruptMaskFromISR(prev_level)
+
+#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
+
+// ------------------ Critical Sections --------------------
+
+/**
+ * @brief FreeRTOS critical section macros
+ *
+ * - Added a spinlock argument for SMP
+ * - Can be nested
+ * - Compliance versions will assert if regular critical section API is used in ISR context
+ * - Safe versions can be called from either contexts
+ */
+#ifdef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
+#define portTRY_ENTER_CRITICAL(mux, timeout)        xPortEnterCriticalTimeoutCompliance(mux, timeout)
+#define portENTER_CRITICAL(mux)                     vPortEnterCriticalCompliance(mux)
+#define portEXIT_CRITICAL(mux)                      vPortExitCriticalCompliance(mux)
+#else
+#define portTRY_ENTER_CRITICAL(mux, timeout)        xPortEnterCriticalTimeout(mux, timeout)
+#define portENTER_CRITICAL(mux)                     vPortEnterCritical(mux)
+#define portEXIT_CRITICAL(mux)                      vPortExitCritical(mux)
+#endif /* CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE */
+
+#define portTRY_ENTER_CRITICAL_ISR(mux, timeout)    xPortEnterCriticalTimeout(mux, timeout)
+#define portENTER_CRITICAL_ISR(mux)                 vPortEnterCritical(mux)
+#define portEXIT_CRITICAL_ISR(mux)                  vPortExitCritical(mux)
+
+#define portTRY_ENTER_CRITICAL_SAFE(mux, timeout)   xPortEnterCriticalTimeoutSafe(mux)
+#define portENTER_CRITICAL_SAFE(mux)                vPortEnterCriticalSafe(mux)
+#define portEXIT_CRITICAL_SAFE(mux)                 vPortExitCriticalSafe(mux)
+
+// ---------------------- Yielding -------------------------
+
+#define portYIELD() vPortYield()
+
+/**
+ * @note    The macro below could be used when passing a single argument, or without any argument,
+ *          it was developed to support both usages of portYIELD inside of an ISR. Any other usage form
+ *          might result in undesired behavior
+ *
+ * @note [refactor-todo] Refactor this to avoid va_args
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define portYIELD_FROM_ISR(...) vPortEvaluateYieldFromISR(portGET_ARGUMENT_COUNT(__VA_ARGS__) __VA_OPT__(,) __VA_ARGS__)
+#else
+#define portYIELD_FROM_ISR(...) vPortEvaluateYieldFromISR(portGET_ARGUMENT_COUNT(__VA_ARGS__), ##__VA_ARGS__)
+#endif
+
+/* Yielding within an API call (when interrupts are off), means the yield should be delayed
+   until interrupts are re-enabled.
+
+   To do this, we use the "cross-core" interrupt as a trigger to yield on this core when interrupts are re-enabled.This
+   is the same interrupt & code path which is used to trigger a yield between CPUs, although in this case the yield is
+   happening on the same CPU.
+*/
+#define portYIELD_WITHIN_API() esp_crosscore_int_send_yield(xPortGetCoreID())
+
+// ------------------- Hook Functions ----------------------
+
+#ifndef CONFIG_FREERTOS_LEGACY_HOOKS
+#define vApplicationIdleHook esp_vApplicationIdleHook
+#define vApplicationTickHook esp_vApplicationTickHook
+#endif /* !CONFIG_FREERTOS_LEGACY_HOOKS */
+
+#define portSUPPRESS_TICKS_AND_SLEEP(idleTime) vApplicationSleep(idleTime)
+
+// ------------------- Run Time Stats ----------------------
+
+#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
+
+/**
+ * - Fine resolution uses ccount
+ * - ALT is coarse and uses esp_timer
+ * @note [refactor-todo] Make fine and alt timers mutually exclusive
+ */
+#define portGET_RUN_TIME_COUNTER_VALUE() xthal_get_ccount()
+#ifdef CONFIG_FREERTOS_RUN_TIME_STATS_USING_ESP_TIMER
+#define portALT_GET_RUN_TIME_COUNTER_VALUE(x) do {x = (uint32_t)esp_timer_get_time();} while(0)
+#endif
+
+// -------------- Optimized Task Selection -----------------
+
+#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+/* Check the configuration. */
+#if( configMAX_PRIORITIES > 32 )
+#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 different priorities as tasks that share a priority will time slice.
+#endif
+
+/* Store/clear the ready priorities in a bit map. */
+#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( ( uxReadyPriorities ) ) )
+#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+
+
+
+/* --------------------------------------------- Inline Implementations ------------------------------------------------
+ * - Implementation of inline functions of the forward declares
+ * - Should come after forward declare and FreeRTOS Porting interface, as implementation may use both.
+ * - For implementation of non-inlined functions, see port.c
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// --------------------- Interrupts ------------------------
+
+static inline UBaseType_t __attribute__((always_inline)) xPortSetInterruptMaskFromISR(void)
+{
+    UBaseType_t prev_int_level = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
+    portbenchmarkINTERRUPT_DISABLE();
+    return prev_int_level;
+}
+
+static inline void __attribute__((always_inline)) vPortClearInterruptMaskFromISR(UBaseType_t prev_level)
+{
+    portbenchmarkINTERRUPT_RESTORE(prev_level);
+    XTOS_RESTORE_JUST_INTLEVEL(prev_level);
+}
+
+// ------------------ Critical Sections --------------------
+
+static inline void __attribute__((always_inline)) vPortEnterCritical(portMUX_TYPE *mux)
+{
+    xPortEnterCriticalTimeout(mux, portMUX_NO_TIMEOUT);
+}
+
+static inline void __attribute__((always_inline)) vPortEnterCriticalCompliance(portMUX_TYPE *mux)
+{
+    xPortEnterCriticalTimeoutCompliance(mux, portMUX_NO_TIMEOUT);
+}
+
+static inline BaseType_t __attribute__((always_inline)) xPortEnterCriticalTimeoutSafe(portMUX_TYPE *mux, BaseType_t timeout)
+{
+    BaseType_t ret;
+    if (xPortInIsrContext()) {
+        ret = portTRY_ENTER_CRITICAL_ISR(mux, timeout);
+    } else {
+        ret = portTRY_ENTER_CRITICAL(mux, timeout);
+    }
+    return ret;
+}
+
+static inline void __attribute__((always_inline)) vPortEnterCriticalSafe(portMUX_TYPE *mux)
+{
+    xPortEnterCriticalTimeoutSafe(mux, portMUX_NO_TIMEOUT);
+}
+
+static inline void __attribute__((always_inline)) vPortExitCriticalSafe(portMUX_TYPE *mux)
+{
+    if (xPortInIsrContext()) {
+        portEXIT_CRITICAL_ISR(mux);
+    } else {
+        portEXIT_CRITICAL(mux);
+    }
+}
+
+// ---------------------- Yielding -------------------------
+
+static inline bool IRAM_ATTR xPortCanYield(void)
+{
+    uint32_t ps_reg = 0;
+
+    //Get the current value of PS (processor status) register
+    RSR(PS, ps_reg);
+
+    /*
+     * intlevel = (ps_reg & 0xf);
+     * excm  = (ps_reg >> 4) & 0x1;
+     * CINTLEVEL is max(excm * EXCMLEVEL, INTLEVEL), where EXCMLEVEL is 3.
+     * However, just return true, only intlevel is zero.
+     */
+
+    return ((ps_reg & PS_INTLEVEL_MASK) == 0);
+}
+
+// ----------------------- System --------------------------
+
+static inline BaseType_t IRAM_ATTR xPortGetCoreID(void)
+{
+    return (uint32_t) cpu_hal_get_core_id();
+}
+
+static inline void __attribute__((always_inline)) uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
+{
+    compare_and_set_native(addr, compare, set);
+}
+
+static inline void __attribute__((always_inline)) uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
+{
+#ifdef CONFIG_SPIRAM
+    compare_and_set_extram(addr, compare, set);
+#endif
+}
+
+
+
+/* ------------------------------------------------------ Misc ---------------------------------------------------------
+ * - Miscellaneous porting macros
+ * - These are not port of the FreeRTOS porting interface, but are used by other FreeRTOS dependent components
+ * - [refactor-todo] Remove dependency on MPU wrappers by modifying TCB
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// -------------------- Co-Processor -----------------------
+
+// When coprocessors are defined, we maintain a pointer to coprocessors area.
+// We currently use a hack: redefine field xMPU_SETTINGS in TCB block as a structure that can hold:
+// MPU wrappers, coprocessor area pointer, trace code structure, and more if needed.
+// The field is normally used for memory protection. FreeRTOS should create another general purpose field.
+typedef struct {
+#if XCHAL_CP_NUM > 0
+    volatile StackType_t *coproc_area; // Pointer to coprocessor save area; MUST BE FIRST
+#endif
+
+#if portUSING_MPU_WRAPPERS
+    // Define here mpu_settings, which is port dependent
+    int mpu_setting; // Just a dummy example here; MPU not ported to Xtensa yet
+#endif
+} xMPU_SETTINGS;
+
+// Main hack to use MPU_wrappers even when no MPU is defined (warning: mpu_setting should not be accessed; otherwise move this above xMPU_SETTINGS)
+#if (XCHAL_CP_NUM > 0) && !portUSING_MPU_WRAPPERS   // If MPU wrappers not used, we still need to allocate coproc area
+#undef portUSING_MPU_WRAPPERS
+#define portUSING_MPU_WRAPPERS 1   // Enable it to allocate coproc area
+#define MPU_WRAPPERS_H             // Override mpu_wrapper.h to disable unwanted code
+#define PRIVILEGED_FUNCTION
+#define PRIVILEGED_DATA
+#endif
+
+void _xt_coproc_release(volatile void *coproc_sa_base);
+
+/*
+ * The structures and methods of manipulating the MPU are contained within the
+ * port layer.
+ *
+ * Fills the xMPUSettings structure with the memory region information
+ * contained in xRegions.
+ */
+#if( portUSING_MPU_WRAPPERS == 1 )
+struct xMEMORY_REGION;
+void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION *const xRegions, StackType_t *pxBottomOfStack, uint32_t usStackDepth ) PRIVILEGED_FUNCTION;
+void vPortReleaseTaskMPUSettings( xMPU_SETTINGS *xMPUSettings );
+#endif
+
+// -------------------- VA_ARGS Yield ----------------------
+
+/**
+ * Macro to count number of arguments of a __VA_ARGS__ used to support portYIELD_FROM_ISR with,
+ * or without arguments. The macro counts only 0 or 1 arguments.
+ *
+ * In the future, we want to switch to C++20. We also want to become compatible with clang.
+ * Hence, we provide two versions of the following macros which are using variadic arguments.
+ * The first one is using the GNU extension ##__VA_ARGS__. The second one is using the C++20 feature __VA_OPT__(,).
+ * This allows users to compile their code with standard C++20 enabled instead of the GNU extension.
+ * Below C++20, we haven't found any good alternative to using ##__VA_ARGS__.
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define portGET_ARGUMENT_COUNT(...) portGET_ARGUMENT_COUNT_INNER(0 __VA_OPT__(,) __VA_ARGS__,1,0)
+#else
+#define portGET_ARGUMENT_COUNT(...) portGET_ARGUMENT_COUNT_INNER(0, ##__VA_ARGS__,1,0)
+#endif
+#define portGET_ARGUMENT_COUNT_INNER(zero, one, count, ...) count
+
+_Static_assert(portGET_ARGUMENT_COUNT() == 0, "portGET_ARGUMENT_COUNT() result does not match for 0 arguments");
+_Static_assert(portGET_ARGUMENT_COUNT(1) == 1, "portGET_ARGUMENT_COUNT() result does not match for 1 argument");
+
+// -------------------- Heap Related -----------------------
+
+/**
+ * @brief Checks if a given piece of memory can be used to store a task's TCB
+ *
+ * - Defined in port_common.c
+ *
+ * @param ptr Pointer to memory
+ * @return true Memory can be used to store a TCB
+ * @return false Otherwise
+ */
+bool xPortCheckValidTCBMem(const void *ptr);
+
+/**
+ * @brief Checks if a given piece of memory can be used to store a task's stack
+ *
+ * - Defined in port_common.c
+ *
+ * @param ptr Pointer to memory
+ * @return true Memory can be used to store a task stack
+ * @return false Otherwise
+ */
+bool xPortcheckValidStackMem(const void *ptr);
+
+#define portVALID_TCB_MEM(ptr) xPortCheckValidTCBMem(ptr)
+#define portVALID_STACK_MEM(ptr) xPortcheckValidStackMem(ptr)
+
+
+
+/* ---------------------------------------------------- Deprecate ------------------------------------------------------
+ * - Pull in header containing deprecated macros here
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+#include "portmacro_deprecated.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ASSEMBLER__
+
+#endif /* PORTMACRO_H */
diff --git a/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/portmacro_deprecated.h b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/portmacro_deprecated.h
new file mode 100644
index 00000000000..378617c73aa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/portmacro_deprecated.h
@@ -0,0 +1,93 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* ---------------------------------------------------- Deprecate ------------------------------------------------------
+ * - Macros or functions that should be deprecated in v5.0, then removed in the next major release
+ * - Kept as not to cause a breaking change
+ * - Include this header at the end of portmacro.h
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+/**
+ * @brief Disable interrupts in a nested manner
+ *
+ * Does the exact same thing as portSET_INTERRUPT_MASK_FROM_ISR()
+ *
+ * @deprecated This function is deprecated. Call portSET_INTERRUPT_MASK_FROM_ISR() instead
+ */
+static inline __attribute__((deprecated)) UBaseType_t portENTER_CRITICAL_NESTED(void) {
+    return portSET_INTERRUPT_MASK_FROM_ISR();
+}
+
+/**
+ * @brief Reenables interrupts in a nested manner
+ *
+ * Does the exact same thing as portCLEAR_INTERRUPT_MASK_FROM_ISR()
+ *
+ * @deprecated This function is deprecated. Call portCLEAR_INTERRUPT_MASK_FROM_ISR() instead
+ */
+static inline void __attribute__((deprecated)) portEXIT_CRITICAL_NESTED(UBaseType_t prev_level)
+{
+    portCLEAR_INTERRUPT_MASK_FROM_ISR(prev_level);
+}
+
+/* ---------------------- Spinlocks --------------------- */
+
+/**
+ * @brief Initialize a spinlock
+ *
+ * Does the exact same thing as spinlock_initialize();
+ *
+ * @deprecated This function is deprecated. Call spinlock_initialize() instead
+ * @param[in] mux Spinlock
+ */
+static inline void __attribute__((deprecated)) __attribute__((always_inline)) vPortCPUInitializeMutex(portMUX_TYPE *mux)
+{
+    spinlock_initialize(mux);
+}
+
+/**
+ * @brief Acquire a spinlock
+ *
+ * Does the exact same thing as spinlock_acquire() with unlimited timeout
+ *
+ * @deprecated This function is deprecated. Call spinlock_acquire() instead
+ * @param[in] mux Spinlock
+ */
+static inline void __attribute__((deprecated)) __attribute__((always_inline)) vPortCPUAcquireMutex(portMUX_TYPE *mux)
+{
+    spinlock_acquire(mux, portMUX_NO_TIMEOUT);
+}
+
+/**
+ * @brief Acquire a spinlock
+ *
+ * Does the exact same thing as spinlock_acquire() with a specified timeout
+ *
+ * @deprecated This function is deprecated. Call spinlock_acquire() instead
+ * @note Does not have deprecated attribute due to usage in app_trace_util.c
+ * @param[in] mux Spinlock
+ * @param timeout
+ * @return true Spinlock acquired
+ * @return false Timed out
+ */
+static inline bool __attribute__((always_inline)) vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout)
+{
+    return (spinlock_acquire(mux, timeout));
+}
+
+/**
+ * @brief Release a spinlock
+ *
+ * Does the exact same thing as spinlock_release()
+ *
+ * @deprecated This function is deprecated. Call spinlock_release() instead
+ * @note Does not have deprecated attribute due to usage in app_trace_util.c
+ * @param[in] mux Spinlock
+ */
+static inline void __attribute__((always_inline)) vPortCPUReleaseMutex(portMUX_TYPE *mux)
+{
+    spinlock_release(mux);
+}
diff --git a/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_api.h b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_api.h
new file mode 100644
index 00000000000..bd2bfeb2080
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_api.h
@@ -0,0 +1,2 @@
+/* This header file has been moved, please include <xtensa/xtensa_api.h> in future */
+#include <xtensa/xtensa_api.h>
diff --git a/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_config.h b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_config.h
new file mode 100644
index 00000000000..be8125c46a8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_config.h
@@ -0,0 +1,145 @@
+/*******************************************************************************
+// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+--------------------------------------------------------------------------------
+
+  Configuration-specific information for Xtensa build. This file must be
+  included in FreeRTOSConfig.h to properly set up the config-dependent
+  parameters correctly.
+
+  NOTE: To enable thread-safe C library support, XT_USE_THREAD_SAFE_CLIB must
+  be defined to be > 0 somewhere above or on the command line.
+
+*******************************************************************************/
+
+#ifndef XTENSA_CONFIG_H
+#define XTENSA_CONFIG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <xtensa/hal.h>
+#include <xtensa/config/core.h>
+#include <xtensa/config/system.h>	/* required for XSHAL_CLIB */
+
+#include "xtensa_context.h"
+
+
+/*-----------------------------------------------------------------------------
+*                                 STACK REQUIREMENTS
+*
+* This section defines the minimum stack size, and the extra space required to
+* be allocated for saving coprocessor state and/or C library state information
+* (if thread safety is enabled for the C library). The sizes are in bytes.
+*
+* Stack sizes for individual tasks should be derived from these minima based on
+* the maximum call depth of the task and the maximum level of interrupt nesting.
+* A minimum stack size is defined by XT_STACK_MIN_SIZE. This minimum is based
+* on the requirement for a task that calls nothing else but can be interrupted.
+* This assumes that interrupt handlers do not call more than a few levels deep.
+* If this is not true, i.e. one or more interrupt handlers make deep calls then
+* the minimum must be increased.
+*
+* If the Xtensa processor configuration includes coprocessors, then space is
+* allocated to save the coprocessor state on the stack.
+*
+* If thread safety is enabled for the C runtime library, (XT_USE_THREAD_SAFE_CLIB
+* is defined) then space is allocated to save the C library context in the TCB.
+*
+* Allocating insufficient stack space is a common source of hard-to-find errors.
+* During development, it is best to enable the FreeRTOS stack checking features.
+*
+* Usage:
+*
+* XT_USE_THREAD_SAFE_CLIB -- Define this to a nonzero value to enable thread-safe
+*                            use of the C library. This will require extra stack
+*                            space to be allocated for tasks that use the C library
+*                            reentrant functions. See below for more information.
+*
+* NOTE: The Xtensa toolchain supports multiple C libraries and not all of them
+* support thread safety. Check your core configuration to see which C library
+* was chosen for your system.
+*
+* XT_STACK_MIN_SIZE       -- The minimum stack size for any task. It is recommended
+*                            that you do not use a stack smaller than this for any
+*                            task. In case you want to use stacks smaller than this
+*                            size, you must verify that the smaller size(s) will work
+*                            under all operating conditions.
+*
+* XT_STACK_EXTRA          -- The amount of extra stack space to allocate for a task
+*                            that does not make C library reentrant calls. Add this
+*                            to the amount of stack space required by the task itself.
+*
+* XT_STACK_EXTRA_CLIB     -- The amount of space to allocate for C library state.
+*
+-----------------------------------------------------------------------------*/
+
+/* Extra space required for interrupt/exception hooks. */
+#ifdef XT_INTEXC_HOOKS
+  #ifdef __XTENSA_CALL0_ABI__
+    #define STK_INTEXC_EXTRA        0x200
+  #else
+    #define STK_INTEXC_EXTRA        0x180
+  #endif
+#else
+  #define STK_INTEXC_EXTRA          0
+#endif
+
+#define XT_CLIB_CONTEXT_AREA_SIZE         0
+
+/*------------------------------------------------------------------------------
+  Extra size -- interrupt frame plus coprocessor save area plus hook space.
+  NOTE: Make sure XT_INTEXC_HOOKS is undefined unless you really need the hooks.
+------------------------------------------------------------------------------*/
+#ifdef __XTENSA_CALL0_ABI__
+  #define XT_XTRA_SIZE            (XT_STK_FRMSZ + STK_INTEXC_EXTRA + 0x10 + XT_CP_SIZE)
+#else
+  #define XT_XTRA_SIZE            (XT_STK_FRMSZ + STK_INTEXC_EXTRA + 0x20 + XT_CP_SIZE)
+#endif
+
+/*------------------------------------------------------------------------------
+  Space allocated for user code -- function calls and local variables.
+  NOTE: This number can be adjusted to suit your needs. You must verify that the
+  amount of space you reserve is adequate for the worst-case conditions in your
+  application.
+  NOTE: The windowed ABI requires more stack, since space has to be reserved
+  for spilling register windows.
+------------------------------------------------------------------------------*/
+#ifdef __XTENSA_CALL0_ABI__
+  #define XT_USER_SIZE            0x200
+#else
+  #define XT_USER_SIZE            0x400
+#endif
+
+/* Minimum recommended stack size. */
+#define XT_STACK_MIN_SIZE         ((XT_XTRA_SIZE + XT_USER_SIZE) / sizeof(unsigned char))
+
+/* OS overhead with and without C library thread context. */
+#define XT_STACK_EXTRA            (XT_XTRA_SIZE)
+#define XT_STACK_EXTRA_CLIB       (XT_XTRA_SIZE + XT_CLIB_CONTEXT_AREA_SIZE)
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XTENSA_CONFIG_H */
diff --git a/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_context.h b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_context.h
new file mode 100644
index 00000000000..45c42728690
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_context.h
@@ -0,0 +1,2 @@
+/* This header file has been moved, please include <xtensa/xtensa_context.h> in future */
+#include <xtensa/xtensa_context.h>
diff --git a/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_rtos.h b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_rtos.h
new file mode 100644
index 00000000000..b7793d68038
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_rtos.h
@@ -0,0 +1,234 @@
+/*******************************************************************************
+// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+--------------------------------------------------------------------------------
+
+        RTOS-SPECIFIC INFORMATION FOR XTENSA RTOS ASSEMBLER SOURCES
+                            (FreeRTOS Port)
+
+This header is the primary glue between generic Xtensa RTOS support
+sources and a specific RTOS port for Xtensa.  It contains definitions
+and macros for use primarily by Xtensa assembly coded source files.
+
+Macros in this header map callouts from generic Xtensa files to specific
+RTOS functions. It may also be included in C source files.
+
+Xtensa RTOS ports support all RTOS-compatible configurations of the Xtensa
+architecture, using the Xtensa hardware abstraction layer (HAL) to deal
+with configuration specifics.
+
+Should be included by all Xtensa generic and RTOS port-specific sources.
+
+*******************************************************************************/
+
+#ifndef XTENSA_RTOS_H
+#define XTENSA_RTOS_H
+
+#ifdef __ASSEMBLER__
+#include    <xtensa/coreasm.h>
+#else
+#include    <xtensa/config/core.h>
+#endif
+
+#include    <xtensa/corebits.h>
+#include    <xtensa/config/system.h>
+#include    "sdkconfig.h"
+
+/*
+Include any RTOS specific definitions that are needed by this header.
+*/
+#include    "freertos/FreeRTOSConfig.h"
+
+/*
+Convert FreeRTOSConfig definitions to XTENSA definitions.
+However these can still be overridden from the command line.
+*/
+
+#ifndef XT_SIMULATOR
+  #if configXT_SIMULATOR
+    #define XT_SIMULATOR             1  /* Simulator mode */
+  #endif
+#endif
+
+#ifndef XT_BOARD
+  #if configXT_BOARD
+    #define XT_BOARD                 1  /* Board mode */
+  #endif
+#endif
+
+#ifndef XT_TIMER_INDEX
+  #if defined configXT_TIMER_INDEX
+    #define XT_TIMER_INDEX           configXT_TIMER_INDEX  /* Index of hardware timer to be used */
+  #endif
+#endif
+
+#ifndef XT_INTEXC_HOOKS
+  #if configXT_INTEXC_HOOKS
+    #define XT_INTEXC_HOOKS          1  /* Enables exception hooks */
+  #endif
+#endif
+
+#if !defined(XT_SIMULATOR) && !defined(XT_BOARD)
+  #error Either XT_SIMULATOR or XT_BOARD must be defined.
+#endif
+
+
+/*
+Name of RTOS (for messages).
+*/
+#define XT_RTOS_NAME    FreeRTOS
+
+/*
+Check some Xtensa configuration requirements and report error if not met.
+Error messages can be customize to the RTOS port.
+*/
+
+#if !XCHAL_HAVE_XEA2
+#error "FreeRTOS/Xtensa requires XEA2 (exception architecture 2)."
+#endif
+
+
+/*******************************************************************************
+
+RTOS CALLOUT MACROS MAPPED TO RTOS PORT-SPECIFIC FUNCTIONS.
+
+Define callout macros used in generic Xtensa code to interact with the RTOS.
+The macros are simply the function names for use in calls from assembler code.
+Some of these functions may call back to generic functions in xtensa_context.h .
+
+*******************************************************************************/
+
+/*
+Inform RTOS of entry into an interrupt handler that will affect it.
+Allows RTOS to manage switch to any system stack and count nesting level.
+Called after minimal context has been saved, with interrupts disabled.
+RTOS port can call0 _xt_context_save to save the rest of the context.
+May only be called from assembly code by the 'call0' instruction.
+*/
+// void XT_RTOS_INT_ENTER(void)
+#define XT_RTOS_INT_ENTER   _frxt_int_enter
+
+/*
+Inform RTOS of completion of an interrupt handler, and give control to
+RTOS to perform thread/task scheduling, switch back from any system stack
+and restore the context, and return to the exit dispatcher saved in the
+stack frame at XT_STK_EXIT. RTOS port can call0 _xt_context_restore
+to save the context saved in XT_RTOS_INT_ENTER via _xt_context_save,
+leaving only a minimal part of the context to be restored by the exit
+dispatcher. This function does not return to the place it was called from.
+May only be called from assembly code by the 'call0' instruction.
+*/
+// void XT_RTOS_INT_EXIT(void)
+#define XT_RTOS_INT_EXIT    _frxt_int_exit
+
+/*
+Inform RTOS of the occurrence of a tick timer interrupt.
+If RTOS has no tick timer, leave XT_RTOS_TIMER_INT undefined.
+May be coded in or called from C or assembly, per ABI conventions.
+RTOS may optionally define XT_TICK_PER_SEC in its own way (eg. macro).
+*/
+// void XT_RTOS_TIMER_INT(void)
+#ifdef CONFIG_FREERTOS_SYSTICK_USES_CCOUNT
+#define XT_RTOS_TIMER_INT   _frxt_timer_int
+#endif
+#define XT_TICK_PER_SEC     configTICK_RATE_HZ
+
+/*
+Return in a15 the base address of the co-processor state save area for the
+thread that triggered a co-processor exception, or 0 if no thread was running.
+The state save area is structured as defined in xtensa_context.h and has size
+XT_CP_SIZE. Co-processor instructions should only be used in thread code, never
+in interrupt handlers or the RTOS kernel. May only be called from assembly code
+and by the 'call0' instruction. A result of 0 indicates an unrecoverable error.
+The implementation may use only a2-4, a15 (all other regs must be preserved).
+*/
+// void* XT_RTOS_CP_STATE(void)
+#define XT_RTOS_CP_STATE    _frxt_task_coproc_state
+
+
+/*******************************************************************************
+
+HOOKS TO DYNAMICALLY INSTALL INTERRUPT AND EXCEPTION HANDLERS PER LEVEL.
+
+This Xtensa RTOS port provides hooks for dynamically installing exception
+and interrupt handlers to facilitate automated testing where each test
+case can install its own handler for user exceptions and each interrupt
+priority (level). This consists of an array of function pointers indexed
+by interrupt priority, with index 0 being the user exception handler hook.
+Each entry in the array is initially 0, and may be replaced by a function
+pointer of type XT_INTEXC_HOOK. A handler may be uninstalled by installing 0.
+
+The handler for low and medium priority obeys ABI conventions so may be coded
+in C. For the exception handler, the cause is the contents of the EXCCAUSE
+reg, and the result is -1 if handled, else the cause (still needs handling).
+For interrupt handlers, the cause is a mask of pending enabled interrupts at
+that level, and the result is the same mask with the bits for the handled
+interrupts cleared (those not cleared still need handling). This allows a test
+case to either pre-handle or override the default handling for the exception
+or interrupt level (see xtensa_vectors.S).
+
+High priority handlers (including NMI) must be coded in assembly, are always
+called by 'call0' regardless of ABI, must preserve all registers except a0,
+and must not use or modify the interrupted stack. The hook argument 'cause'
+is not passed and the result is ignored, so as not to burden the caller with
+saving and restoring a2 (it assumes only one interrupt per level - see the
+discussion in high priority interrupts in xtensa_vectors.S). The handler
+therefore should be coded to prototype 'void h(void)' even though it plugs
+into an array of handlers of prototype 'unsigned h(unsigned)'.
+
+To enable interrupt/exception hooks, compile the RTOS with '-DXT_INTEXC_HOOKS'.
+
+*******************************************************************************/
+
+#define XT_INTEXC_HOOK_NUM  (1 + XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI)
+
+#ifndef __ASSEMBLER__
+typedef unsigned (*XT_INTEXC_HOOK)(unsigned cause);
+extern  volatile XT_INTEXC_HOOK _xt_intexc_hooks[XT_INTEXC_HOOK_NUM];
+#endif
+
+
+/*******************************************************************************
+
+CONVENIENCE INCLUSIONS.
+
+Ensures RTOS specific files need only include this one Xtensa-generic header.
+These headers are included last so they can use the RTOS definitions above.
+
+*******************************************************************************/
+
+#include    "xtensa_context.h"
+
+#ifdef XT_RTOS_TIMER_INT
+#include    "xtensa_timer.h"
+#endif
+
+
+/*******************************************************************************
+
+Xtensa Port Version.
+
+*******************************************************************************/
+
+#define XTENSA_PORT_VERSION             1.4.2
+#define XTENSA_PORT_VERSION_STRING      "1.4.2"
+
+#endif /* XTENSA_RTOS_H */
diff --git a/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_timer.h b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_timer.h
new file mode 100644
index 00000000000..b7f8dc703d5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/freertos/port/xtensa/include/freertos/xtensa_timer.h
@@ -0,0 +1,158 @@
+/*******************************************************************************
+// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+--------------------------------------------------------------------------------
+
+        XTENSA INFORMATION FOR RTOS TICK TIMER AND CLOCK FREQUENCY
+
+This header contains definitions and macros for use primarily by Xtensa
+RTOS assembly coded source files. It includes and uses the Xtensa hardware
+abstraction layer (HAL) to deal with config specifics. It may also be
+included in C source files.
+
+User may edit to modify timer selection and to specify clock frequency and
+tick duration to match timer interrupt to the real-time tick duration.
+
+If the RTOS has no timer interrupt, then there is no tick timer and the
+clock frequency is irrelevant, so all of these macros are left undefined
+and the Xtensa core configuration need not have a timer.
+
+*******************************************************************************/
+
+#ifndef XTENSA_TIMER_H
+#define XTENSA_TIMER_H
+
+#ifdef __ASSEMBLER__
+#include    <xtensa/coreasm.h>
+#endif
+
+#include    <xtensa/corebits.h>
+#include    <xtensa/config/system.h>
+
+#include    "xtensa_rtos.h"     /* in case this wasn't included directly */
+
+#include    "freertos/FreeRTOSConfig.h"
+
+/*
+Select timer to use for periodic tick, and determine its interrupt number
+and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
+in which case its validity is checked (it must exist in this core and must
+not be on a high priority interrupt - an error will be reported in invalid).
+Otherwise select the first low or medium priority interrupt timer available.
+*/
+#if XCHAL_NUM_TIMERS == 0
+
+  #error "This Xtensa configuration is unsupported, it has no timers."
+
+#else
+
+#ifndef XT_TIMER_INDEX
+  #if XCHAL_TIMER3_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+    #if XCHAL_INT_LEVEL(XCHAL_TIMER3_INTERRUPT) <= XCHAL_EXCM_LEVEL
+      #undef  XT_TIMER_INDEX
+      #define XT_TIMER_INDEX    3
+    #endif
+  #endif
+  #if XCHAL_TIMER2_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+    #if XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_EXCM_LEVEL
+      #undef  XT_TIMER_INDEX
+      #define XT_TIMER_INDEX    2
+    #endif
+  #endif
+  #if XCHAL_TIMER1_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+    #if XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) <= XCHAL_EXCM_LEVEL
+      #undef  XT_TIMER_INDEX
+      #define XT_TIMER_INDEX    1
+    #endif
+  #endif
+  #if XCHAL_TIMER0_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+    #if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL
+      #undef  XT_TIMER_INDEX
+      #define XT_TIMER_INDEX    0
+    #endif
+  #endif
+#endif
+#ifndef XT_TIMER_INDEX
+  #error "There is no suitable timer in this Xtensa configuration."
+#endif
+
+#define XT_CCOMPARE             (CCOMPARE + XT_TIMER_INDEX)
+#define XT_TIMER_INTNUM         XCHAL_TIMER_INTERRUPT(XT_TIMER_INDEX)
+#define XT_TIMER_INTPRI         XCHAL_INT_LEVEL(XT_TIMER_INTNUM)
+#define XT_TIMER_INTEN          (1 << XT_TIMER_INTNUM)
+
+#if XT_TIMER_INTNUM == XTHAL_TIMER_UNCONFIGURED
+  #error "The timer selected by XT_TIMER_INDEX does not exist in this core."
+#elif XT_TIMER_INTPRI > XCHAL_EXCM_LEVEL
+  #error "The timer interrupt cannot be high priority (use medium or low)."
+#endif
+
+#endif /* XCHAL_NUM_TIMERS */
+
+/*
+Set processor clock frequency, used to determine clock divisor for timer tick.
+User should BE SURE TO ADJUST THIS for the Xtensa platform being used.
+If using a supported board via the board-independent API defined in xtbsp.h,
+this may be left undefined and frequency and tick divisor will be computed
+and cached during run-time initialization.
+
+NOTE ON SIMULATOR:
+Under the Xtensa instruction set simulator, the frequency can only be estimated
+because it depends on the speed of the host and the version of the simulator.
+Also because it runs much slower than hardware, it is not possible to achieve
+real-time performance for most applications under the simulator. A frequency
+too low does not allow enough time between timer interrupts, starving threads.
+To obtain a more convenient but non-real-time tick duration on the simulator,
+compile with xt-xcc option "-DXT_SIMULATOR".
+Adjust this frequency to taste (it's not real-time anyway!).
+*/
+#if defined(XT_SIMULATOR) && !defined(XT_CLOCK_FREQ)
+#define XT_CLOCK_FREQ       configCPU_CLOCK_HZ
+#endif
+
+#if !defined(XT_CLOCK_FREQ) && !defined(XT_BOARD)
+  #error "XT_CLOCK_FREQ must be defined for the target platform."
+#endif
+
+/*
+Default number of timer "ticks" per second (default 100 for 10ms tick).
+RTOS may define this in its own way (if applicable) in xtensa_rtos.h.
+User may redefine this to an optimal value for the application, either by
+editing this here or in xtensa_rtos.h, or compiling with xt-xcc option
+"-DXT_TICK_PER_SEC=<value>" where <value> is a suitable number.
+*/
+#ifndef XT_TICK_PER_SEC
+#define XT_TICK_PER_SEC    configTICK_RATE_HZ        /* 10 ms tick = 100 ticks per second */
+#endif
+
+/*
+Derivation of clock divisor for timer tick and interrupt (one per tick).
+*/
+#ifdef XT_CLOCK_FREQ
+#define XT_TICK_DIVISOR     (XT_CLOCK_FREQ / XT_TICK_PER_SEC)
+#endif
+
+#ifndef __ASSEMBLER__
+extern unsigned _xt_tick_divisor;
+extern void     _xt_tick_divisor_init(void);
+#endif
+
+#endif  /* XTENSA_TIMER_H */
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/adc_hal_conf.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/adc_hal_conf.h
new file mode 100644
index 00000000000..02e43632d2f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/adc_hal_conf.h
@@ -0,0 +1,31 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define SOC_ADC1_DATA_INVERT_DEFAULT    (0)
+#define SOC_ADC2_DATA_INVERT_DEFAULT    (0)
+
+#define SOC_ADC_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM) (0)
+
+#define SOC_ADC_FSM_RSTB_WAIT_DEFAULT       (8)
+#define SOC_ADC_FSM_START_WAIT_DEFAULT      (5)
+#define SOC_ADC_FSM_STANDBY_WAIT_DEFAULT    (100)
+#define ADC_FSM_SAMPLE_CYCLE_DEFAULT        (2)
+
+#define SOC_ADC_PWDET_CCT_DEFAULT           (4)
+
+#define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) ((PERIPH_NUM==0)? 2 : 1)
+
+#define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT     (1)
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/adc_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/adc_ll.h
new file mode 100644
index 00000000000..15e0b15de6c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/adc_ll.h
@@ -0,0 +1,1075 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdio.h>
+#include <stdbool.h>
+#include "regi2c_ctrl.h"
+
+#include "soc/adc_periph.h"
+#include "hal/adc_types.h"
+#include "soc/apb_saradc_struct.h"
+#include "soc/sens_struct.h"
+#include "soc/apb_saradc_reg.h"
+#include "soc/rtc_cntl_struct.h"
+#include "soc/rtc_cntl_reg.h"
+#include "hal/misc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ADC_LL_CLKM_DIV_NUM_DEFAULT 15
+#define ADC_LL_CLKM_DIV_B_DEFAULT   1
+#define ADC_LL_CLKM_DIV_A_DEFAULT   0
+
+typedef enum {
+    ADC_NUM_1 = 0,          /*!< SAR ADC 1 */
+    ADC_NUM_2 = 1,          /*!< SAR ADC 2 */
+    ADC_NUM_MAX,
+} adc_ll_num_t;
+
+typedef enum {
+    ADC_POWER_BY_FSM,   /*!< ADC XPD controled by FSM. Used for polling mode */
+    ADC_POWER_SW_ON,    /*!< ADC XPD controled by SW. power on. Used for DMA mode */
+    ADC_POWER_SW_OFF,   /*!< ADC XPD controled by SW. power off. */
+    ADC_POWER_MAX,      /*!< For parameter check. */
+} adc_ll_power_t;
+
+typedef enum {
+    ADC_RTC_DATA_OK = 0,
+    ADC_RTC_CTRL_UNSELECTED = 1,
+    ADC_RTC_CTRL_BREAK = 2,
+    ADC_RTC_DATA_FAIL = -1,
+} adc_ll_rtc_raw_data_t;
+
+typedef enum {
+    ADC_LL_CTRL_RTC = 0,    ///< For ADC1. Select RTC controller.
+    ADC_LL_CTRL_ULP = 1,    ///< For ADC1 and ADC2. Select ULP controller.
+    ADC_LL_CTRL_DIG = 2,    ///< For ADC1. Select DIG controller.
+    ADC_LL_CTRL_ARB = 3,    ///< For ADC2. The controller is selected by the arbiter.
+} adc_ll_controller_t;
+
+/**
+ * @brief ADC digital controller (DMA mode) work mode.
+ *
+ * @note  The conversion mode affects the sampling frequency:
+ *        SINGLE_UNIT_1: When the measurement is triggered, only ADC1 is sampled once.
+ *        SINGLE_UNIT_2: When the measurement is triggered, only ADC2 is sampled once.
+ *        BOTH_UNIT    : When the measurement is triggered, ADC1 and ADC2 are sampled at the same time.
+ *        ALTER_UNIT   : When the measurement is triggered, ADC1 or ADC2 samples alternately.
+ */
+typedef enum {
+    ADC_LL_DIGI_CONV_ONLY_ADC1  = 0,    // Only use ADC1 for conversion
+    ADC_LL_DIGI_CONV_ONLY_ADC2  = 1,    // Only use ADC2 for conversion
+    ADC_LL_DIGI_CONV_BOTH_UNIT  = 2,    // Use Both ADC1 and ADC2 for conversion simultaneously
+    ADC_LL_DIGI_CONV_ALTER_UNIT = 3     // Use both ADC1 and ADC2 for conversion by turn. e.g. ADC1 -> ADC2 -> ADC1 -> ADC2 .....
+} adc_ll_digi_convert_mode_t;
+
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:       2;
+            uint8_t channel:     4;
+            uint8_t reserved:    2;
+        };
+        uint8_t val;
+    };
+} __attribute__((packed)) adc_ll_digi_pattern_table_t;
+
+#ifdef _MSC_VER
+#pragma pack(push, 1)
+#endif /* _MSC_VER */
+
+/**
+ * @brief Analyze whether the obtained raw data is correct.
+ *        ADC2 use arbiter by default. The arbitration result can be judged by the flag bit in the original data.
+ *
+ */
+typedef struct {
+    union {
+        struct {
+            uint16_t data:     13;  /*!<ADC real output data info. Resolution: 13 bit. */
+            uint16_t reserved:  1;  /*!<reserved */
+            uint16_t flag:      2;  /*!<ADC data flag info.
+                                        If (flag == 0), The data is valid.
+                                        If (flag > 0), The data is invalid. */
+        };
+        uint16_t val;
+    };
+} adc_ll_rtc_output_data_t;
+
+#ifdef _MSC_VER
+#pragma pack(pop)
+#endif /* _MSC_VER */
+
+
+/*---------------------------------------------------------------
+                    Digital controller setting
+---------------------------------------------------------------*/
+
+/**
+ * Set adc fsm interval parameter for digital controller. These values are fixed for same platforms.
+ *
+ * @param rst_wait cycles between DIG ADC controller reset ADC sensor and start ADC sensor.
+ * @param start_wait Delay time after open xpd.
+ * @param standby_wait Delay time to close xpd.
+ */
+static inline void adc_ll_digi_set_fsm_time(uint32_t rst_wait, uint32_t start_wait, uint32_t standby_wait)
+{
+    // Internal FSM reset wait time
+    HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.fsm_wait, rstb_wait, rst_wait);
+    // Internal FSM start wait time
+    HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.fsm_wait, xpd_wait, start_wait);
+    // Internal FSM standby wait time
+    HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.fsm_wait, standby_wait, standby_wait);
+}
+
+/**
+ * Set adc sample cycle for digital controller.
+ *
+ * @note Normally, please use default value.
+ * @param sample_cycle Cycles between DIG ADC controller start ADC sensor and beginning to receive data from sensor.
+ *                     Range: 2 ~ 0xFF.
+ */
+static inline void adc_ll_set_sample_cycle(uint32_t sample_cycle)
+{
+    /* Should be called before writing I2C registers. */
+    SET_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_SAR_I2C_PU_M);
+    CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, I2C_SAR_M);
+    SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_SAR_CFG2_M);
+
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_SAMPLE_CYCLE_ADDR, sample_cycle);
+}
+
+/**
+ * Set SAR ADC module clock division factor.
+ * SAR ADC clock divided from digital controller clock.
+ *
+ * @param div Division factor.
+ */
+static inline void adc_ll_digi_set_clk_div(uint32_t div)
+{
+    /* ADC clock divided from digital controller clock clk */
+    HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.ctrl, sar_clk_div, div);
+}
+
+/**
+ * Set adc max conversion number for digital controller.
+ * If the number of ADC conversion is equal to the maximum, the conversion is stopped.
+ *
+ * @param meas_num Max conversion number. Range: 0 ~ 255.
+ */
+static inline void adc_ll_digi_set_convert_limit_num(uint32_t meas_num)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.ctrl2, max_meas_num, meas_num);
+}
+
+/**
+ * Enable max conversion number detection for digital controller.
+ * If the number of ADC conversion is equal to the maximum, the conversion is stopped.
+ */
+static inline void adc_ll_digi_convert_limit_enable(void)
+{
+    APB_SARADC.ctrl2.meas_num_limit = 1;
+}
+
+/**
+ * Disable max conversion number detection for digital controller.
+ * If the number of ADC conversion is equal to the maximum, the conversion is stopped.
+ */
+static inline void adc_ll_digi_convert_limit_disable(void)
+{
+    APB_SARADC.ctrl2.meas_num_limit = 0;
+}
+
+/**
+ * Set adc conversion mode for digital controller.
+ *
+ * @param mode Conversion mode select.
+ */
+static inline void adc_ll_digi_set_convert_mode(adc_ll_digi_convert_mode_t mode)
+{
+    if (mode == ADC_LL_DIGI_CONV_ONLY_ADC1) {
+        APB_SARADC.ctrl.work_mode = 0;
+        APB_SARADC.ctrl.sar_sel = 0;
+    } else if (mode == ADC_LL_DIGI_CONV_ONLY_ADC2) {
+        APB_SARADC.ctrl.work_mode = 0;
+        APB_SARADC.ctrl.sar_sel = 1;
+    } else if (mode == ADC_LL_DIGI_CONV_BOTH_UNIT) {
+        APB_SARADC.ctrl.work_mode = 1;
+    } else if (mode == ADC_LL_DIGI_CONV_ALTER_UNIT) {
+        APB_SARADC.ctrl.work_mode = 2;
+    }
+    APB_SARADC.ctrl.data_sar_sel = 1;
+}
+
+/**
+ * Set pattern table length for digital controller.
+ * The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
+ * resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+ * pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself.
+ *
+ * @param adc_n ADC unit.
+ * @param patt_len Items range: 1 ~ 16.
+ */
+static inline void adc_ll_digi_set_pattern_table_len(adc_ll_num_t adc_n, uint32_t patt_len)
+{
+    if (adc_n == ADC_NUM_1) {
+        APB_SARADC.ctrl.sar1_patt_len = patt_len - 1;
+    } else { // adc_n == ADC_NUM_2
+        APB_SARADC.ctrl.sar2_patt_len = patt_len - 1;
+    }
+}
+
+/**
+ * Set pattern table for digital controller.
+ * The pattern table that defines the conversion rules for each SAR ADC. Each table has 12 items, in which channel selection,
+ * resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+ * pattern table one by one. For each controller the scan sequence has at most 12 different rules before repeating itself.
+ *
+ * @param adc_n ADC unit.
+ * @param pattern_index Items index. Range: 0 ~ 11.
+ * @param pattern Stored conversion rules.
+ */
+static inline void adc_ll_digi_set_pattern_table(adc_ll_num_t adc_n, uint32_t pattern_index, adc_digi_pattern_config_t table)
+{
+    uint32_t tab;
+    uint8_t index = pattern_index / 4;
+    uint8_t offset = (pattern_index % 4) * 6;
+    adc_ll_digi_pattern_table_t pattern = {0};
+
+    pattern.val = (table.atten & 0x3) | ((table.channel & 0xF) << 2);
+    if (table.unit == ADC_NUM_1){
+        tab = APB_SARADC.sar1_patt_tab[index].sar1_patt_tab;            //Read old register value
+        tab &= (~(0xFC0000 >> offset));                 //Clear old data
+        tab |= ((uint32_t)(pattern.val & 0x3F) << 18) >> offset;   //Fill in the new data
+        APB_SARADC.sar1_patt_tab[index].sar1_patt_tab = tab;            //Write back
+    } else {
+        tab = APB_SARADC.sar2_patt_tab[index].sar2_patt_tab;        //Read old register value
+        tab &= (~(0xFC0000 >> offset));                             //clear old data
+        tab |= ((uint32_t)(pattern.val & 0x3F) << 18) >> offset;    //Fill in the new data
+        APB_SARADC.sar2_patt_tab[index].sar2_patt_tab = tab;        //Write back
+    }
+}
+
+/**
+ * Reset the pattern table pointer, then take the measurement rule from table header in next measurement.
+ *
+ * @param adc_n ADC unit.
+ */
+static inline void adc_ll_digi_clear_pattern_table(adc_ll_num_t adc_n)
+{
+    if (adc_n == ADC_NUM_1) {
+        APB_SARADC.ctrl.sar1_patt_p_clear = 1;
+        APB_SARADC.ctrl.sar1_patt_p_clear = 0;
+    } else { // adc_n == ADC_NUM_2
+        APB_SARADC.ctrl.sar2_patt_p_clear = 1;
+        APB_SARADC.ctrl.sar2_patt_p_clear = 0;
+    }
+}
+
+/**
+ * Sets the number of cycles required for the conversion to complete and wait for the arbiter to stabilize.
+ *
+ * @note Only ADC2 have arbiter function.
+ * @param cycle range: 0 ~ 4.
+ */
+static inline void adc_ll_digi_set_arbiter_stable_cycle(uint32_t cycle)
+{
+    APB_SARADC.ctrl.wait_arb_cycle = cycle;
+}
+
+/**
+ * ADC Digital controller output data invert or not.
+ *
+ * @param adc_n ADC unit.
+ * @param inv_en data invert or not.
+ */
+static inline void adc_ll_digi_output_invert(adc_ll_num_t adc_n, bool inv_en)
+{
+    if (adc_n == ADC_NUM_1) {
+        APB_SARADC.ctrl2.sar1_inv = inv_en;   // Enable / Disable ADC data invert
+    } else { // adc_n == ADC_NUM_2
+        APB_SARADC.ctrl2.sar2_inv = inv_en;   // Enable / Disable ADC data invert
+    }
+}
+
+/**
+ * Set the interval clock cycle for the digital controller to trigger the measurement.
+ * Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval.
+ *
+ * @note The trigger interval should not be smaller than the sampling time of the SAR ADC.
+ * @param cycle The clock cycle (trigger interval) of the measurement. Range: 30 ~ 4095.
+ */
+static inline void adc_ll_digi_set_trigger_interval(uint32_t cycle)
+{
+    APB_SARADC.ctrl2.timer_target = cycle;
+}
+
+/**
+ * Enable digital controller timer to trigger the measurement.
+ */
+static inline void adc_ll_digi_trigger_enable(void)
+{
+    APB_SARADC.ctrl2.timer_sel = 1;
+    APB_SARADC.ctrl2.timer_en = 1;
+}
+
+/**
+ * Disable digital controller timer to trigger the measurement.
+ */
+static inline void adc_ll_digi_trigger_disable(void)
+{
+    APB_SARADC.ctrl2.timer_en = 0;
+}
+
+/**
+ * Set ADC digital controller clock division factor. The clock divided from `APLL` or `APB` clock.
+ * Expression: controller_clk = (APLL or APB) / (div_num + div_a / div_b + 1).
+ *
+ * @param div_num Division factor. Range: 0 ~ 255.
+ * @param div_b Division factor. Range: 1 ~ 63.
+ * @param div_a Division factor. Range: 0 ~ 63.
+ */
+static inline void adc_ll_digi_controller_clk_div(uint32_t div_num, uint32_t div_b, uint32_t div_a)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.apb_adc_clkm_conf, clkm_div_num, div_num);
+    APB_SARADC.apb_adc_clkm_conf.clkm_div_b = div_b;
+    APB_SARADC.apb_adc_clkm_conf.clkm_div_a = div_a;
+}
+
+/**
+ * Enable clock and select clock source for ADC digital controller.
+ *
+ * @param use_apll true: use APLL clock; false: use APB clock.
+ */
+static inline void adc_ll_digi_clk_sel(bool use_apll)
+{
+    if (use_apll) {
+        APB_SARADC.apb_adc_clkm_conf.clk_sel = 1;   // APLL clock
+    } else {
+        APB_SARADC.apb_adc_clkm_conf.clk_sel = 2;   // APB clock
+    }
+    APB_SARADC.ctrl.sar_clk_gated = 1;
+}
+
+/**
+ * Disable clock for ADC digital controller.
+ */
+static inline void adc_ll_digi_controller_clk_disable(void)
+{
+    APB_SARADC.ctrl.sar_clk_gated = 0;
+    APB_SARADC.apb_adc_clkm_conf.clk_sel = 0;
+}
+
+/**
+ * Reset adc digital controller filter.
+ *
+ * @param adc_n ADC unit.
+ */
+static inline void adc_ll_digi_filter_reset(adc_ll_num_t adc_n)
+{
+    abort();
+}
+
+/**
+ * Set adc digital controller filter factor.
+ *
+ * @param adc_n ADC unit.
+ * @param factor Expression: filter_data = (k-1)/k * last_data + new_data / k. Set values: (2, 4, 8, 16, 64).
+ */
+static inline void adc_ll_digi_filter_set_factor(adc_ll_num_t adc_n, adc_digi_filter_mode_t factor)
+{
+    abort();
+}
+
+/**
+ * Get adc digital controller filter factor.
+ *
+ * @param adc_n ADC unit.
+ * @param factor Expression: filter_data = (k-1)/k * last_data + new_data / k. Set values: (2, 4, 8, 16, 64).
+ */
+static inline void adc_ll_digi_filter_get_factor(adc_ll_num_t adc_n, adc_digi_filter_mode_t *factor)
+{
+    abort();
+}
+
+/**
+ * Enable/disable adc digital controller filter.
+ * Filtering the ADC data to obtain smooth data at higher sampling rates.
+ *
+ * @note The filter will filter all the enabled channel data of the each ADC unit at the same time.
+ * @param adc_n ADC unit.
+ */
+static inline void adc_ll_digi_filter_enable(adc_ll_num_t adc_n, bool enable)
+{
+    abort();
+}
+
+/**
+ * Get the filtered data of adc digital controller filter.
+ * The data after each measurement and filtering is updated to the DMA by the digital controller. But it can also be obtained manually through this API.
+ *
+ * @note The filter will filter all the enabled channel data of the each ADC unit at the same time.
+ * @param adc_n ADC unit.
+ * @return Filtered data.
+ */
+static inline uint32_t adc_ll_digi_filter_read_data(adc_ll_num_t adc_n)
+{
+    abort();
+}
+
+/**
+ * Set monitor mode of adc digital controller.
+ *
+ * @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
+ * @param adc_n ADC unit.
+ * @param is_larger true:  If ADC_OUT >  threshold, Generates monitor interrupt.
+ *                  false: If ADC_OUT <  threshold, Generates monitor interrupt.
+ */
+static inline void adc_ll_digi_monitor_set_mode(adc_ll_num_t adc_n, bool is_larger)
+{
+    abort();
+}
+
+/**
+ * Set monitor threshold of adc digital controller.
+ *
+ * @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
+ * @param adc_n ADC unit.
+ * @param threshold Monitor threshold.
+ */
+static inline void adc_ll_digi_monitor_set_thres(adc_ll_num_t adc_n, uint32_t threshold)
+{
+    abort();
+}
+
+/**
+ * Enable/disable monitor of adc digital controller.
+ *
+ * @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
+ * @param adc_n ADC unit.
+ */
+static inline void adc_ll_digi_monitor_enable(adc_ll_num_t adc_n, bool enable)
+{
+    abort();
+}
+
+/**
+ * Set DMA eof num of adc digital controller.
+ * If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated.
+ *
+ * @param num eof num of DMA.
+ */
+static inline void adc_ll_digi_dma_set_eof_num(uint32_t num)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.dma_conf, apb_adc_eof_num, num);
+}
+
+/**
+ * Enable output data to DMA from adc digital controller.
+ */
+static inline void adc_ll_digi_dma_enable(void)
+{
+    APB_SARADC.dma_conf.apb_adc_trans = 1;
+}
+
+/**
+ * Disable output data to DMA from adc digital controller.
+ */
+static inline void adc_ll_digi_dma_disable(void)
+{
+    APB_SARADC.dma_conf.apb_adc_trans = 0;
+}
+
+/**
+ * Reset adc digital controller.
+ */
+static inline void adc_ll_digi_reset(void)
+{
+    APB_SARADC.dma_conf.apb_adc_reset_fsm = 1;
+    APB_SARADC.dma_conf.apb_adc_reset_fsm = 0;
+}
+
+/*---------------------------------------------------------------
+                    PWDET(Power detect) controller setting
+---------------------------------------------------------------*/
+/**
+ * Set adc cct for PWDET controller.
+ *
+ * @note Capacitor tuning of the PA power monitor. cct set to the same value with PHY.
+ * @param cct Range: 0 ~ 7.
+ */
+static inline void adc_ll_pwdet_set_cct(uint32_t cct)
+{
+    /* Capacitor tuning of the PA power monitor. cct set to the same value with PHY. */
+    SENS.sar_meas2_mux.sar2_pwdet_cct = cct;
+}
+
+/**
+ * Get adc cct for PWDET controller.
+ *
+ * @note Capacitor tuning of the PA power monitor. cct set to the same value with PHY.
+ * @return cct Range: 0 ~ 7.
+ */
+static inline uint32_t adc_ll_pwdet_get_cct(void)
+{
+    /* Capacitor tuning of the PA power monitor. cct set to the same value with PHY. */
+    return SENS.sar_meas2_mux.sar2_pwdet_cct;
+}
+
+/*---------------------------------------------------------------
+                    Common setting
+---------------------------------------------------------------*/
+/**
+ * Set ADC module power management.
+ *
+ * @param manage Set ADC power status.
+ */
+static inline void adc_ll_set_power_manage(adc_ll_power_t manage)
+{
+    /* Bit1  0:Fsm  1: SW mode
+       Bit0  0:SW mode power down  1: SW mode power on */
+    if (manage == ADC_POWER_SW_ON) {
+        SENS.sar_peri_clk_gate_conf.saradc_clk_en = 1;
+        SENS.sar_power_xpd_sar.force_xpd_sar = 3; //SENS_FORCE_XPD_SAR_PU;
+    } else if (manage == ADC_POWER_BY_FSM) {
+        SENS.sar_peri_clk_gate_conf.saradc_clk_en = 1;
+        SENS.sar_power_xpd_sar.force_xpd_sar = 0; //SENS_FORCE_XPD_SAR_FSM;
+    } else if (manage == ADC_POWER_SW_OFF) {
+        SENS.sar_power_xpd_sar.force_xpd_sar = 2; //SENS_FORCE_XPD_SAR_PD;
+        SENS.sar_peri_clk_gate_conf.saradc_clk_en = 0;
+    }
+}
+
+/**
+ * Set ADC module controller.
+ * There are five SAR ADC controllers:
+ * Two digital controller: Continuous conversion mode (DMA). High performance with multiple channel scan modes;
+ * Two RTC controller: Single conversion modes (Polling). For low power purpose working during deep sleep;
+ * the other is dedicated for Power detect (PWDET / PKDET), Only support ADC2.
+ *
+ * @param adc_n ADC unit.
+ * @param ctrl ADC controller.
+ */
+static inline void adc_ll_set_controller(adc_ll_num_t adc_n, adc_ll_controller_t ctrl)
+{
+    if (adc_n == ADC_NUM_1) {
+        switch (ctrl) {
+            case ADC_LL_CTRL_RTC:
+                SENS.sar_meas1_mux.sar1_dig_force       = 0;    // 1: Select digital control;       0: Select RTC control.
+                SENS.sar_meas1_ctrl2.meas1_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
+                SENS.sar_meas1_ctrl2.sar1_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
+                break;
+            case ADC_LL_CTRL_ULP:
+                SENS.sar_meas1_mux.sar1_dig_force       = 0;    // 1: Select digital control;       0: Select RTC control.
+                SENS.sar_meas1_ctrl2.meas1_start_force  = 0;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
+                SENS.sar_meas1_ctrl2.sar1_en_pad_force  = 0;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
+                break;
+            case ADC_LL_CTRL_DIG:
+                SENS.sar_meas1_mux.sar1_dig_force       = 1;    // 1: Select digital control;       0: Select RTC control.
+                SENS.sar_meas1_ctrl2.meas1_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
+                SENS.sar_meas1_ctrl2.sar1_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
+                break;
+            default:
+                break;
+        }
+    } else { // adc_n == ADC_NUM_2
+        //If ADC2 is not controlled by ULP, the arbiter will decide which controller to use ADC2.
+        switch (ctrl) {
+            case ADC_LL_CTRL_ARB:
+                SENS.sar_meas2_ctrl2.meas2_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
+                SENS.sar_meas2_ctrl2.sar2_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
+                break;
+            case ADC_LL_CTRL_ULP:
+                SENS.sar_meas2_ctrl2.meas2_start_force  = 0;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC start.
+                SENS.sar_meas2_ctrl2.sar2_en_pad_force  = 0;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bit map;
+                break;
+            default:
+                break;
+        }
+    }
+}
+
+/**
+ * Set ADC2 module arbiter work mode.
+ * The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
+ * the low priority controller will read the invalid ADC data, and the validity of the data can be judged by the flag bit in the data.
+ *
+ * @note Only ADC2 support arbiter.
+ * @note The arbiter's working clock is APB_CLK. When the APB_CLK clock drops below 8 MHz, the arbiter must be in shield mode.
+ *
+ * @param mode Refer to `adc_arbiter_mode_t`.
+ */
+static inline void adc_ll_set_arbiter_work_mode(adc_arbiter_mode_t mode)
+{
+    if (mode == ADC_ARB_MODE_FIX) {
+        APB_SARADC.apb_adc_arb_ctrl.adc_arb_grant_force = 0;
+        APB_SARADC.apb_adc_arb_ctrl.adc_arb_fix_priority = 1;
+    } else if (mode == ADC_ARB_MODE_LOOP) {
+        APB_SARADC.apb_adc_arb_ctrl.adc_arb_grant_force = 0;
+        APB_SARADC.apb_adc_arb_ctrl.adc_arb_fix_priority = 0;
+    } else {  // Shield arbiter.
+        APB_SARADC.apb_adc_arb_ctrl.adc_arb_grant_force = 1;
+    }
+}
+
+/**
+ * Set ADC2 module controller priority in arbiter.
+ * The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
+ * the low priority controller will read the invalid ADC data, and the validity of the data can be judged by the flag bit in the data.
+ *
+ * @note Only ADC2 support arbiter.
+ * @note The arbiter's working clock is APB_CLK. When the APB_CLK clock drops below 8 MHz, the arbiter must be in shield mode.
+ * @note Default priority: Wi-Fi(2) > RTC(1) > Digital(0);
+ *
+ * @param pri_rtc RTC controller priority. Range: 0 ~ 2.
+ * @param pri_dig Digital controller priority. Range: 0 ~ 2.
+ * @param pri_pwdet Wi-Fi controller priority. Range: 0 ~ 2.
+ */
+static inline void adc_ll_set_arbiter_priority(uint8_t pri_rtc, uint8_t pri_dig, uint8_t pri_pwdet)
+{
+    if (pri_rtc != pri_dig && pri_rtc != pri_pwdet && pri_dig != pri_pwdet) {
+        APB_SARADC.apb_adc_arb_ctrl.adc_arb_rtc_priority = pri_rtc;
+        APB_SARADC.apb_adc_arb_ctrl.adc_arb_apb_priority = pri_dig;
+        APB_SARADC.apb_adc_arb_ctrl.adc_arb_wifi_priority = pri_pwdet;
+    }
+    /* Should select highest priority controller. */
+    if (pri_rtc > pri_dig) {
+        if (pri_rtc > pri_pwdet) {
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_apb_force = 0;
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_rtc_force = 1;
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_wifi_force = 0;
+        } else {
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_apb_force = 0;
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_rtc_force = 0;
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_wifi_force = 1;
+        }
+    } else {
+        if (pri_dig > pri_pwdet) {
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_apb_force = 1;
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_rtc_force = 0;
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_wifi_force = 0;
+        } else {
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_apb_force = 0;
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_rtc_force = 0;
+            APB_SARADC.apb_adc_arb_ctrl.adc_arb_wifi_force = 1;
+        }
+    }
+}
+
+/**
+ * Force switch ADC2 to RTC controller in sleep mode. Shield arbiter.
+ * In sleep mode, the arbiter is in power-down mode.
+ * Need to switch the controller to RTC to shield the control of the arbiter.
+ * After waking up, it needs to switch to arbiter control.
+ *
+ * @note The hardware will do this automatically. In normal use, there is no need to call this interface to manually switch the controller.
+ * @note Only support ADC2.
+ */
+static inline void adc_ll_enable_sleep_controller(void)
+{
+    SENS.sar_meas2_mux.sar2_rtc_force = 1;
+}
+
+/**
+ * Force switch ADC2 to arbiter in wakeup mode.
+ * In sleep mode, the arbiter is in power-down mode.
+ * Need to switch the controller to RTC to shield the control of the arbiter.
+ * After waking up, it needs to switch to arbiter control.
+ *
+ * @note The hardware will do this automatically. In normal use, there is no need to call this interface to manually switch the controller.
+ * @note Only support ADC2.
+ */
+static inline void adc_ll_disable_sleep_controller(void)
+{
+    SENS.sar_meas2_mux.sar2_rtc_force = 0;
+}
+
+/**
+ * @brief Set common calibration configuration. Should be shared with other parts (PWDET).
+ */
+static inline void adc_ll_calibration_init(adc_ll_num_t adc_n)
+{
+    if (adc_n == ADC_NUM_1) {
+        REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_DREF_ADDR, 4);
+    } else {
+        REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 4);
+    }
+}
+
+/**
+ * Configure the registers for ADC calibration. You need to call the ``adc_ll_calibration_finish`` interface to resume after calibration.
+ *
+ * @param adc_n ADC index number.
+ * @param channel Not used.
+ * @param internal_gnd true:  Disconnect from the IO port and use the internal GND as the calibration voltage.
+ *                     false: Use IO external voltage as calibration voltage.
+ */
+static inline void adc_ll_calibration_prepare(adc_ll_num_t adc_n, adc_channel_t channel, bool internal_gnd)
+{
+    /* Should be called before writing I2C registers. */
+    SET_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_SAR_I2C_PU_M);
+    CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, I2C_SAR_M);
+    SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_SAR_CFG2_M);
+
+    /* Enable/disable internal connect GND (for calibration). */
+    if (adc_n == ADC_NUM_1) {
+        if (internal_gnd) {
+            REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_ENCAL_GND_ADDR, 1);
+        } else {
+            REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_ENCAL_GND_ADDR, 0);
+        }
+    } else {    //adc_n == ADC_NUM_2
+        if (internal_gnd) {
+            REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_ENCAL_GND_ADDR, 1);
+        } else {
+            REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_ENCAL_GND_ADDR, 0);
+        }
+    }
+}
+
+/**
+ * Resume register status after calibration.
+ *
+ * @param adc_n ADC index number.
+ */
+static inline void adc_ll_calibration_finish(adc_ll_num_t adc_n)
+{
+    if (adc_n == ADC_NUM_1) {
+        REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_ENCAL_GND_ADDR, 0);
+    } else {    //adc_n == ADC_NUM_2
+        REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_ENCAL_GND_ADDR, 0);
+    }
+}
+
+/**
+ * Set the calibration result to ADC.
+ *
+ * @note  Different ADC units and different attenuation options use different calibration data (initial data).
+ *
+ * @param adc_n ADC index number.
+ */
+static inline void adc_ll_set_calibration_param(adc_ll_num_t adc_n, uint32_t param)
+{
+    uint8_t msb = param >> 8;
+    uint8_t lsb = param & 0xFF;
+    if (adc_n == ADC_NUM_1) {
+        REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_HIGH_ADDR, msb);
+        REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_LOW_ADDR, lsb);
+    } else {
+        REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_HIGH_ADDR, msb);
+        REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_LOW_ADDR, lsb);
+    }
+}
+
+/**
+ *  Output ADC internal reference voltage to channels, only available for ADC2 on ESP32.
+ *
+ *  This function routes the internal reference voltage of ADCn to one of
+ *  ADC2's channels. This reference voltage can then be manually measured
+ *  for calibration purposes.
+ *
+ *  @param[in]  adc ADC unit select
+ *  @param[in]  channel ADC2 channel number
+ *  @param[in]  en Enable/disable the reference voltage output
+ */
+static inline void adc_ll_vref_output(adc_ll_num_t adc, adc_channel_t channel, bool en)
+{
+    abort();
+}
+
+/*---------------------------------------------------------------
+                    RTC controller setting
+---------------------------------------------------------------*/
+/**
+ * ADC SAR clock division factor setting. ADC SAR clock devided from `RTC_FAST_CLK`.
+ *
+ * @param div Division factor.
+ */
+static inline void adc_ll_set_sar_clk_div(adc_ll_num_t adc_n, uint32_t div)
+{
+    if (adc_n == ADC_NUM_1) {
+        HAL_FORCE_MODIFY_U32_REG_FIELD(SENS.sar_reader1_ctrl, sar1_clk_div, div);
+    } else { // adc_n == ADC_NUM_2
+        HAL_FORCE_MODIFY_U32_REG_FIELD(SENS.sar_reader2_ctrl, sar2_clk_div, div);
+    }
+}
+
+/**
+ * Set adc output data format for RTC controller.
+ *
+ * @note ESP32S3 RTC controller only support 13bit.
+ * @prarm adc_n ADC unit.
+ * @prarm bits Output data bits width option.
+ */
+static inline void adc_ll_rtc_set_output_format(adc_ll_num_t adc_n, adc_bits_width_t bits)
+{
+
+}
+
+/**
+ * Enable adc channel to start convert.
+ *
+ * @note Only one channel can be selected for once measurement.
+ *
+ * @param adc_n ADC unit.
+ * @param channel ADC channel number for each ADCn.
+ */
+static inline void adc_ll_rtc_enable_channel(adc_ll_num_t adc_n, int channel)
+{
+    if (adc_n == ADC_NUM_1) {
+        SENS.sar_meas1_ctrl2.sar1_en_pad = (1 << channel); //only one channel is selected.
+    } else { // adc_n == ADC_NUM_2
+        SENS.sar_meas2_ctrl2.sar2_en_pad = (1 << channel); //only one channel is selected.
+    }
+}
+
+/**
+ * Disable adc channel to start convert.
+ *
+ * @note Only one channel can be selected in once measurement.
+ *
+ * @param adc_n ADC unit.
+ * @param channel ADC channel number for each ADCn.
+ */
+static inline void adc_ll_rtc_disable_channel(adc_ll_num_t adc_n)
+{
+    if (adc_n == ADC_NUM_1) {
+        SENS.sar_meas1_ctrl2.sar1_en_pad = 0; //only one channel is selected.
+    } else { // adc_n == ADC_NUM_2
+        SENS.sar_meas2_ctrl2.sar2_en_pad = 0; //only one channel is selected.
+    }
+}
+
+/**
+ * Start conversion once by software for RTC controller.
+ *
+ * @note It may be block to wait conversion idle for ADC1.
+ *
+ * @param adc_n ADC unit.
+ * @param channel ADC channel number for each ADCn.
+ */
+static inline void adc_ll_rtc_start_convert(adc_ll_num_t adc_n, int channel)
+{
+    if (adc_n == ADC_NUM_1) {
+        while (HAL_FORCE_READ_U32_REG_FIELD(SENS.sar_slave_addr1, meas_status) != 0) {}
+        SENS.sar_meas1_ctrl2.meas1_start_sar = 0;
+        SENS.sar_meas1_ctrl2.meas1_start_sar = 1;
+    } else { // adc_n == ADC_NUM_2
+        SENS.sar_meas2_ctrl2.meas2_start_sar = 0; //start force 0
+        SENS.sar_meas2_ctrl2.meas2_start_sar = 1; //start force 1
+    }
+}
+
+/**
+ * Check the conversion done flag for each ADCn for RTC controller.
+ *
+ * @param adc_n ADC unit.
+ * @return
+ *      -true  : The conversion process is finish.
+ *      -false : The conversion process is not finish.
+ */
+static inline bool adc_ll_rtc_convert_is_done(adc_ll_num_t adc_n)
+{
+    bool ret = true;
+    if (adc_n == ADC_NUM_1) {
+        ret = (bool)SENS.sar_meas1_ctrl2.meas1_done_sar;
+    } else { // adc_n == ADC_NUM_2
+        ret = (bool)SENS.sar_meas2_ctrl2.meas2_done_sar;
+    }
+    return ret;
+}
+
+/**
+ * Get the converted value for each ADCn for RTC controller.
+ *
+ * @param adc_n ADC unit.
+ * @return
+ *      - Converted value.
+ */
+static inline int adc_ll_rtc_get_convert_value(adc_ll_num_t adc_n)
+{
+    int ret_val = 0;
+    if (adc_n == ADC_NUM_1) {
+        ret_val = HAL_FORCE_READ_U32_REG_FIELD(SENS.sar_meas1_ctrl2, meas1_data_sar);
+    } else { // adc_n == ADC_NUM_2
+        ret_val = HAL_FORCE_READ_U32_REG_FIELD(SENS.sar_meas2_ctrl2, meas2_data_sar);
+    }
+    return ret_val;
+}
+
+/**
+ * ADC module RTC output data invert or not.
+ *
+ * @param adc_n ADC unit.
+ * @param inv_en data invert or not.
+ */
+static inline void adc_ll_rtc_output_invert(adc_ll_num_t adc_n, bool inv_en)
+{
+    if (adc_n == ADC_NUM_1) {
+        SENS.sar_reader1_ctrl.sar1_data_inv = inv_en;   // Enable / Disable ADC data invert
+    } else { // adc_n == ADC_NUM_2
+        SENS.sar_reader2_ctrl.sar2_data_inv = inv_en;  // Enable / Disable ADC data invert
+    }
+}
+
+/**
+ * Enable ADCn conversion complete interrupt for RTC controller.
+ *
+ * @param adc_n ADC unit.
+ */
+static inline void adc_ll_rtc_intr_enable(adc_ll_num_t adc_n)
+{
+    if (adc_n == ADC_NUM_1) {
+        SENS.sar_reader1_ctrl.sar1_int_en = 1;
+        RTCCNTL.int_ena.rtc_saradc1 = 1;
+    } else { // adc_n == ADC_NUM_2
+        SENS.sar_reader2_ctrl.sar2_int_en = 1;
+        RTCCNTL.int_ena.rtc_saradc2 = 1;
+    }
+}
+
+/**
+ * Disable ADCn conversion complete interrupt for RTC controller.
+ *
+ * @param adc_n ADC unit.
+ */
+static inline void adc_ll_rtc_intr_disable(adc_ll_num_t adc_n)
+{
+    if (adc_n == ADC_NUM_1) {
+        SENS.sar_reader1_ctrl.sar1_int_en = 0;
+        RTCCNTL.int_ena.rtc_saradc1 = 0;
+    } else { // adc_n == ADC_NUM_2
+        SENS.sar_reader2_ctrl.sar2_int_en = 0;
+        RTCCNTL.int_ena.rtc_saradc2 = 0;
+    }
+}
+
+/**
+ * Reset RTC controller FSM.
+ */
+static inline void adc_ll_rtc_reset(void)
+{
+    SENS.sar_peri_reset_conf.saradc_reset = 1;
+    SENS.sar_peri_reset_conf.saradc_reset = 0;
+}
+
+/**
+ * Sets the number of cycles required for the conversion to complete and wait for the arbiter to stabilize.
+ *
+ * @note Only ADC2 have arbiter function.
+ * @param cycle range: [0,4].
+ */
+static inline void adc_ll_rtc_set_arbiter_stable_cycle(uint32_t cycle)
+{
+    SENS.sar_reader2_ctrl.sar2_wait_arb_cycle = cycle;
+}
+
+/**
+ * Analyze whether the obtained raw data is correct.
+ * ADC2 can use arbiter. The arbitration result can be judged by the flag bit in the original data.
+ *
+ * @param adc_n ADC unit.
+ * @param raw_data ADC raw data input (convert value).
+ * @return
+ *      - 0: The data is correct to use.
+ *      - 1: The data is invalid. The current controller is not enabled by the arbiter.
+ *      - 2: The data is invalid. The current controller process was interrupted by a higher priority controller.
+ *      - -1: The data is error.
+ */
+static inline adc_ll_rtc_raw_data_t adc_ll_rtc_analysis_raw_data(adc_ll_num_t adc_n, uint16_t raw_data)
+{
+    /* ADC1 don't need check data */
+    if (adc_n == ADC_NUM_1) {
+        return ADC_RTC_DATA_OK;
+    }
+    adc_ll_rtc_output_data_t *temp = (adc_ll_rtc_output_data_t *)&raw_data;
+    if (temp->flag == 0) {
+        return ADC_RTC_DATA_OK;
+    } else if (temp->flag == 1) {
+        return ADC_RTC_CTRL_UNSELECTED;
+    } else if (temp->flag == 2) {
+        return ADC_RTC_CTRL_BREAK;
+    } else {
+        return ADC_RTC_DATA_FAIL;
+    }
+}
+
+/**
+ * Set the attenuation of a particular channel on ADCn.
+ *
+ * @note For any given channel, this function must be called before the first time conversion.
+ *
+ * The default ADC full-scale voltage is 1.1V. To read higher voltages (up to the pin maximum voltage,
+ * usually 3.3V) requires setting >0dB signal attenuation for that ADC channel.
+ *
+ * When VDD_A is 3.3V:
+ *
+ * - 0dB attenuaton (ADC_ATTEN_DB_0) gives full-scale voltage 1.1V
+ * - 2.5dB attenuation (ADC_ATTEN_DB_2_5) gives full-scale voltage 1.5V
+ * - 6dB attenuation (ADC_ATTEN_DB_6) gives full-scale voltage 2.2V
+ * - 11dB attenuation (ADC_ATTEN_DB_11) gives full-scale voltage 3.9V (see note below)
+ *
+ * @note The full-scale voltage is the voltage corresponding to a maximum reading (depending on ADC1 configured
+ * bit width, this value is: 4095 for 12-bits, 2047 for 11-bits, 1023 for 10-bits, 511 for 9 bits.)
+ *
+ * @note At 11dB attenuation the maximum voltage is limited by VDD_A, not the full scale voltage.
+ *
+ * Due to ADC characteristics, most accurate results are obtained within the following approximate voltage ranges:
+ *
+ * - 0dB attenuaton (ADC_ATTEN_DB_0) between 100 and 950mV
+ * - 2.5dB attenuation (ADC_ATTEN_DB_2_5) between 100 and 1250mV
+ * - 6dB attenuation (ADC_ATTEN_DB_6) between 150 to 1750mV
+ * - 11dB attenuation (ADC_ATTEN_DB_11) between 150 to 2450mV
+ *
+ * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
+ *
+ * @param adc_n ADC unit.
+ * @param channel ADCn channel number.
+ * @param atten The attenuation option.
+ */
+static inline void adc_ll_set_atten(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten)
+{
+    if (adc_n == ADC_NUM_1) {
+        SENS.sar_atten1 = ( SENS.sar_atten1 & ~(0x3 << (channel * 2)) ) | ((atten & 0x3) << (channel * 2));
+    } else { // adc_n == ADC_NUM_2
+        SENS.sar_atten2 = ( SENS.sar_atten2 & ~(0x3 << (channel * 2)) ) | ((atten & 0x3) << (channel * 2));
+    }
+}
+
+/**
+ * Get the attenuation of a particular channel on ADCn.
+ *
+ * @param adc_n ADC unit.
+ * @param channel ADCn channel number.
+ * @return atten The attenuation option.
+ */
+static inline adc_atten_t adc_ll_get_atten(adc_ll_num_t adc_n, adc_channel_t channel)
+{
+    if (adc_n == ADC_NUM_1) {
+        return (adc_atten_t)((SENS.sar_atten1 >> (channel * 2)) & 0x3);
+    } else {
+        return (adc_atten_t)((SENS.sar_atten2 >> (channel * 2)) & 0x3);
+    }
+}
+
+static inline uint32_t adc_ll_adc1_read(void)
+{
+    //On ESP32S3, valid data width is 12-bit
+    return (APB_SARADC.apb_saradc1_data_status.adc1_data & 0xfff);
+}
+
+static inline uint32_t adc_ll_adc2_read(void)
+{
+    //On ESP32S3, valid data width is 12-bit
+    return (APB_SARADC.apb_saradc2_data_status.adc2_data & 0xfff);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/aes_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/aes_ll.h
new file mode 100644
index 00000000000..e18c44e58ef
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/aes_ll.h
@@ -0,0 +1,233 @@
+// Copyright 2020-2021 Espressif Systems (Shanghai) CO LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdbool.h>
+#include <string.h>
+#include "soc/hwcrypto_reg.h"
+#include "hal/aes_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief State of AES accelerator, busy, idle or done
+ *
+ */
+typedef enum {
+    ESP_AES_STATE_IDLE = 0, /* AES accelerator is idle */
+    ESP_AES_STATE_BUSY,     /* Transform in progress */
+    ESP_AES_STATE_DONE,     /* Transform completed */
+} esp_aes_state_t;
+
+
+/**
+ * @brief Write the encryption/decryption key to hardware
+ *
+ * @param key Key to be written to the AES hardware
+ * @param key_word_len Number of words in the key
+ *
+ * @return Number of bytes written to hardware, used for fault injection check
+ */
+static inline uint8_t aes_ll_write_key(const uint8_t *key, size_t key_word_len)
+{
+    /* This variable is used for fault injection checks, so marked volatile to avoid optimisation */
+    volatile uint8_t key_in_hardware = 0;
+    /* Memcpy to avoid potential unaligned access */
+    uint32_t key_word;
+    for (int i = 0; i < key_word_len; i++) {
+        memcpy(&key_word, key + 4 * i, 4);
+        REG_WRITE(AES_KEY_BASE + i * 4,  key_word);
+        key_in_hardware += 4;
+    }
+    return key_in_hardware;
+}
+
+/**
+ * @brief Sets the mode
+ *
+ * @param mode ESP_AES_ENCRYPT = 1, or ESP_AES_DECRYPT = 0
+ * @param key_bytes Number of bytes in the key
+ */
+static inline void aes_ll_set_mode(int mode, uint8_t key_bytes)
+{
+    const uint32_t MODE_DECRYPT_BIT = 4;
+    unsigned mode_reg_base = (mode == ESP_AES_ENCRYPT) ? 0 : MODE_DECRYPT_BIT;
+
+    /* See TRM for the mapping between keylength and mode bit */
+    REG_WRITE(AES_MODE_REG, mode_reg_base + ((key_bytes / 8) - 2));
+}
+
+/**
+ * @brief Writes message block to AES hardware
+ *
+ * @param input Block to be written
+ */
+static inline void aes_ll_write_block(const void *input)
+{
+    uint32_t input_word;
+
+    for (int i = 0; i < AES_BLOCK_WORDS; i++) {
+        memcpy(&input_word, (uint8_t*)input + 4 * i, 4);
+        REG_WRITE(AES_TEXT_IN_BASE + i * 4, input_word);
+    }
+}
+
+/**
+ * @brief Read the AES block
+ *
+ * @param output the output of the transform, length = AES_BLOCK_BYTES
+ */
+static inline void aes_ll_read_block(void *output)
+{
+    uint32_t output_word;
+    const size_t REG_WIDTH = sizeof(uint32_t);
+
+    for (size_t i = 0; i < AES_BLOCK_WORDS; i++) {
+        output_word = REG_READ(AES_TEXT_OUT_BASE + (i * REG_WIDTH));
+        /* Memcpy to avoid potential unaligned access */
+        memcpy( (uint8_t*)output + i * 4, &output_word, sizeof(output_word));
+    }
+}
+
+/**
+ * @brief Starts block transform
+ *
+ */
+static inline void aes_ll_start_transform(void)
+{
+    REG_WRITE(AES_TRIGGER_REG, 1);
+}
+
+
+/**
+ * @brief Read state of AES accelerator
+ *
+ * @return esp_aes_state_t
+ */
+static inline esp_aes_state_t aes_ll_get_state(void)
+{
+    return REG_READ(AES_STATE_REG);
+}
+
+
+/**
+ * @brief Set mode of operation
+ *
+ * @note Only used for DMA transforms
+ *
+ * @param mode
+ */
+static inline void aes_ll_set_block_mode(esp_aes_mode_t mode)
+{
+    REG_WRITE(AES_BLOCK_MODE_REG, mode);
+}
+
+/**
+ * @brief Set AES-CTR counter to INC32
+ *
+ * @note Only affects AES-CTR mode
+ *
+ */
+static inline void aes_ll_set_inc(void)
+{
+    REG_WRITE(AES_INC_SEL_REG, 0);
+}
+
+/**
+ * @brief Release the DMA
+ *
+ */
+static inline void aes_ll_dma_exit(void)
+{
+    REG_WRITE(AES_DMA_EXIT_REG, 0);
+}
+
+/**
+ * @brief Sets the number of blocks to be transformed
+ *
+ * @note Only used for DMA transforms
+ *
+ * @param num_blocks Number of blocks to transform
+ */
+static inline void aes_ll_set_num_blocks(size_t num_blocks)
+{
+    REG_WRITE(AES_BLOCK_NUM_REG, num_blocks);
+}
+
+/*
+ * Write IV to hardware iv registers
+ */
+static inline void aes_ll_set_iv(const uint8_t *iv)
+{
+    uint32_t *reg_addr_buf = (uint32_t *)(AES_IV_BASE);
+    uint32_t iv_word;
+
+    for (int i = 0; i < IV_WORDS; i++ ) {
+        /* Memcpy to avoid potential unaligned access */
+        memcpy(&iv_word, iv + 4 * i, sizeof(iv_word));
+        REG_WRITE(&reg_addr_buf[i], iv_word);
+    }
+}
+
+/*
+ * Read IV from hardware iv registers
+ */
+static inline void aes_ll_read_iv(uint8_t *iv)
+{
+    uint32_t iv_word;
+    const size_t REG_WIDTH = sizeof(uint32_t);
+
+    for (size_t i = 0; i < IV_WORDS; i++) {
+        iv_word = REG_READ(AES_IV_BASE + (i * REG_WIDTH));
+        /* Memcpy to avoid potential unaligned access */
+        memcpy(iv + i * 4, &iv_word, sizeof(iv_word));
+    }
+}
+
+/**
+ * @brief Enable or disable DMA mode
+ *
+ * @param enable true to enable, false to disable.
+ */
+static inline void aes_ll_dma_enable(bool enable)
+{
+    REG_WRITE(AES_DMA_ENABLE_REG, enable);
+}
+
+/**
+ * @brief Enable or disable transform completed interrupt
+ *
+ * @param enable true to enable, false to disable.
+ */
+static inline void aes_ll_interrupt_enable(bool enable)
+{
+    REG_WRITE(AES_INT_ENA_REG, enable);
+}
+
+/**
+ * @brief Clears the interrupt
+ *
+ */
+static inline void aes_ll_interrupt_clear(void)
+{
+    REG_WRITE(AES_INT_CLR_REG, 1);
+}
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/clk_gate_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/clk_gate_ll.h
new file mode 100644
index 00000000000..a3b5afbe00b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/clk_gate_ll.h
@@ -0,0 +1,298 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_attr.h"
+#include "soc/periph_defs.h"
+#include "soc/system_reg.h"
+#include "soc/syscon_reg.h"
+#include "soc/dport_access.h"
+
+static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
+{
+    switch (periph) {
+    case PERIPH_SARADC_MODULE:
+        return SYSTEM_APB_SARADC_CLK_EN;
+    case PERIPH_RMT_MODULE:
+        return SYSTEM_RMT_CLK_EN;
+    case PERIPH_LEDC_MODULE:
+        return SYSTEM_LEDC_CLK_EN;
+    case PERIPH_UART0_MODULE:
+        return SYSTEM_UART_CLK_EN;
+    case PERIPH_UART1_MODULE:
+        return SYSTEM_UART1_CLK_EN;
+    case PERIPH_UART2_MODULE:
+        return SYSTEM_UART2_CLK_EN;
+    case PERIPH_USB_MODULE:
+        return SYSTEM_USB_CLK_EN;
+    case PERIPH_I2C0_MODULE:
+        return SYSTEM_I2C_EXT0_CLK_EN;
+    case PERIPH_I2C1_MODULE:
+        return SYSTEM_I2C_EXT1_CLK_EN;
+    case PERIPH_I2S0_MODULE:
+        return SYSTEM_I2S0_CLK_EN;
+    case PERIPH_I2S1_MODULE:
+        return SYSTEM_I2S1_CLK_EN;
+    case PERIPH_LCD_CAM_MODULE:
+        return SYSTEM_LCD_CAM_CLK_EN;
+    case PERIPH_TIMG0_MODULE:
+        return SYSTEM_TIMERGROUP_CLK_EN;
+    case PERIPH_TIMG1_MODULE:
+        return SYSTEM_TIMERGROUP1_CLK_EN;
+    case PERIPH_PWM0_MODULE:
+        return SYSTEM_PWM0_CLK_EN;
+    case PERIPH_PWM1_MODULE:
+        return SYSTEM_PWM1_CLK_EN;
+    case PERIPH_UHCI0_MODULE:
+        return SYSTEM_UHCI0_CLK_EN;
+    case PERIPH_UHCI1_MODULE:
+        return SYSTEM_UHCI1_CLK_EN;
+    case PERIPH_PCNT_MODULE:
+        return SYSTEM_PCNT_CLK_EN;
+    case PERIPH_SPI_MODULE:
+        return SYSTEM_SPI01_CLK_EN;
+    case PERIPH_SPI2_MODULE:
+        return SYSTEM_SPI2_CLK_EN;
+    case PERIPH_SPI3_MODULE:
+        return SYSTEM_SPI3_CLK_EN;
+    case PERIPH_SDMMC_MODULE:
+        return SYSTEM_SDIO_HOST_CLK_EN;
+    case PERIPH_TWAI_MODULE:
+        return SYSTEM_TWAI_CLK_EN;
+    case PERIPH_RNG_MODULE:
+        return SYSTEM_WIFI_CLK_RNG_EN;
+    case PERIPH_WIFI_MODULE:
+        return SYSTEM_WIFI_CLK_WIFI_EN_M;
+    case PERIPH_BT_MODULE:
+        return SYSTEM_WIFI_CLK_BT_EN_M;
+    case PERIPH_WIFI_BT_COMMON_MODULE:
+        return SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M;
+    case PERIPH_BT_BASEBAND_MODULE:
+        return SYSTEM_BT_BASEBAND_EN;
+    case PERIPH_BT_LC_MODULE:
+        return SYSTEM_BT_LC_EN;
+    case PERIPH_SYSTIMER_MODULE:
+        return SYSTEM_SYSTIMER_CLK_EN;
+    case PERIPH_DEDIC_GPIO_MODULE:
+        return SYSTEM_CLK_EN_DEDICATED_GPIO;
+    case PERIPH_GDMA_MODULE:
+        return SYSTEM_DMA_CLK_EN;
+    case PERIPH_AES_MODULE:
+        return SYSTEM_CRYPTO_AES_CLK_EN;
+    case PERIPH_SHA_MODULE:
+        return SYSTEM_CRYPTO_SHA_CLK_EN;
+    case PERIPH_RSA_MODULE:
+        return SYSTEM_CRYPTO_RSA_CLK_EN;
+    case PERIPH_HMAC_MODULE:
+        return SYSTEM_CRYPTO_HMAC_CLK_EN;
+    case PERIPH_DS_MODULE:
+        return SYSTEM_CRYPTO_DS_CLK_EN;
+    default:
+        return 0;
+    }
+}
+
+static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable)
+{
+    switch (periph) {
+    case PERIPH_SARADC_MODULE:
+        return SYSTEM_APB_SARADC_RST;
+    case PERIPH_RMT_MODULE:
+        return SYSTEM_RMT_RST;
+    case PERIPH_LEDC_MODULE:
+        return SYSTEM_LEDC_RST;
+    case PERIPH_UART0_MODULE:
+        return SYSTEM_UART_RST;
+    case PERIPH_UART1_MODULE:
+        return SYSTEM_UART1_RST;
+    case PERIPH_UART2_MODULE:
+        return SYSTEM_UART2_RST;
+    case PERIPH_USB_MODULE:
+        return SYSTEM_USB_RST;
+    case PERIPH_I2C0_MODULE:
+        return SYSTEM_I2C_EXT0_RST;
+    case PERIPH_I2C1_MODULE:
+        return SYSTEM_I2C_EXT1_RST;
+    case PERIPH_I2S0_MODULE:
+        return SYSTEM_I2S0_RST;
+    case PERIPH_I2S1_MODULE:
+        return SYSTEM_I2S1_RST;
+    case PERIPH_LCD_CAM_MODULE:
+        return SYSTEM_LCD_CAM_RST;
+    case PERIPH_TIMG0_MODULE:
+        return SYSTEM_TIMERGROUP_RST;
+    case PERIPH_TIMG1_MODULE:
+        return SYSTEM_TIMERGROUP1_RST;
+    case PERIPH_PWM0_MODULE:
+        return SYSTEM_PWM0_RST;
+    case PERIPH_PWM1_MODULE:
+        return SYSTEM_PWM1_RST;
+    case PERIPH_UHCI0_MODULE:
+        return SYSTEM_UHCI0_RST;
+    case PERIPH_UHCI1_MODULE:
+        return SYSTEM_UHCI1_RST;
+    case PERIPH_PCNT_MODULE:
+        return SYSTEM_PCNT_RST;
+    case PERIPH_SPI_MODULE:
+        return SYSTEM_SPI01_RST;
+    case PERIPH_SPI2_MODULE:
+        return SYSTEM_SPI2_RST;
+    case PERIPH_SPI3_MODULE:
+        return SYSTEM_SPI3_RST;
+    case PERIPH_SDMMC_MODULE:
+        return SYSTEM_SDIO_HOST_RST;
+    case PERIPH_TWAI_MODULE:
+        return SYSTEM_TWAI_RST;
+    case PERIPH_SYSTIMER_MODULE:
+        return SYSTEM_SYSTIMER_RST;
+    case PERIPH_DEDIC_GPIO_MODULE:
+        return SYSTEM_RST_EN_DEDICATED_GPIO;
+    case PERIPH_GDMA_MODULE:
+        return SYSTEM_DMA_RST;
+    case PERIPH_HMAC_MODULE:
+        return SYSTEM_CRYPTO_HMAC_RST;
+    case PERIPH_DS_MODULE:
+        return SYSTEM_CRYPTO_DS_RST;
+    case PERIPH_AES_MODULE:
+        if (enable == true) {
+            // Clear reset on digital signature, otherwise AES unit is held in reset also.
+            return (SYSTEM_CRYPTO_AES_RST | SYSTEM_CRYPTO_DS_RST);
+        } else {
+            //Don't return other units to reset, as this pulls reset on RSA & SHA units, respectively.
+            return SYSTEM_CRYPTO_AES_RST;
+        }
+    case PERIPH_SHA_MODULE:
+        if (enable == true) {
+            // Clear reset on digital signature and HMAC, otherwise SHA is held in reset
+            return (SYSTEM_CRYPTO_SHA_RST | SYSTEM_CRYPTO_DS_RST | SYSTEM_CRYPTO_HMAC_RST) ;
+        } else {
+            // Don't assert reset on secure boot, otherwise AES is held in reset
+            return SYSTEM_CRYPTO_SHA_RST;
+        }
+    case PERIPH_RSA_MODULE:
+        if (enable == true) {
+            /* also clear reset on digital signature, otherwise RSA is held in reset */
+            return (SYSTEM_CRYPTO_RSA_RST | SYSTEM_CRYPTO_DS_RST);
+        } else {
+            /* don't reset digital signature unit, as this resets AES also */
+            return SYSTEM_CRYPTO_RSA_RST;
+        }
+    default:
+        return 0;
+    }
+}
+
+static uint32_t periph_ll_get_clk_en_reg(periph_module_t periph)
+{
+    switch (periph) {
+    case PERIPH_DEDIC_GPIO_MODULE:
+        return SYSTEM_CPU_PERI_CLK_EN_REG;
+    case PERIPH_RNG_MODULE:
+    case PERIPH_WIFI_MODULE:
+    case PERIPH_BT_MODULE:
+    case PERIPH_WIFI_BT_COMMON_MODULE:
+    case PERIPH_BT_BASEBAND_MODULE:
+    case PERIPH_BT_LC_MODULE:
+        return SYSTEM_WIFI_CLK_EN_REG ;
+    case PERIPH_UART2_MODULE:
+    case PERIPH_SDMMC_MODULE:
+    case PERIPH_LCD_CAM_MODULE:
+    case PERIPH_GDMA_MODULE:
+    case PERIPH_HMAC_MODULE:
+    case PERIPH_DS_MODULE:
+    case PERIPH_AES_MODULE:
+    case PERIPH_SHA_MODULE:
+    case PERIPH_RSA_MODULE:
+        return SYSTEM_PERIP_CLK_EN1_REG;
+    default:
+        return SYSTEM_PERIP_CLK_EN0_REG;
+    }
+}
+
+static uint32_t periph_ll_get_rst_en_reg(periph_module_t periph)
+{
+    switch (periph) {
+    case PERIPH_DEDIC_GPIO_MODULE:
+        return SYSTEM_CPU_PERI_RST_EN_REG;
+    case PERIPH_RNG_MODULE:
+    case PERIPH_WIFI_MODULE:
+    case PERIPH_BT_MODULE:
+    case PERIPH_WIFI_BT_COMMON_MODULE:
+    case PERIPH_BT_BASEBAND_MODULE:
+    case PERIPH_BT_LC_MODULE:
+        return SYSTEM_CORE_RST_EN_REG;
+    case PERIPH_UART2_MODULE:
+    case PERIPH_SDMMC_MODULE:
+    case PERIPH_LCD_CAM_MODULE:
+    case PERIPH_GDMA_MODULE:
+    case PERIPH_HMAC_MODULE:
+    case PERIPH_DS_MODULE:
+    case PERIPH_AES_MODULE:
+    case PERIPH_SHA_MODULE:
+    case PERIPH_RSA_MODULE:
+        return SYSTEM_PERIP_RST_EN1_REG;
+    default:
+        return SYSTEM_PERIP_RST_EN0_REG;
+    }
+}
+
+static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph)
+{
+    DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph));
+    DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, true));
+}
+
+static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
+{
+    DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph));
+    DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
+}
+
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
+{
+    DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
+    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
+}
+
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
+{
+    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
+    DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
+}
+
+static inline void periph_ll_reset(periph_module_t periph)
+{
+    DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
+    DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
+}
+
+static inline bool IRAM_ATTR periph_ll_periph_enabled(periph_module_t periph)
+{
+    return DPORT_REG_GET_BIT(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)) == 0 &&
+           DPORT_REG_GET_BIT(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)) != 0;
+}
+
+static inline void periph_ll_wifi_module_enable_clk_clear_rst(void)
+{
+    DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_EN_M);
+    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
+}
+
+static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
+{
+    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_EN_M);
+    DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
+}
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/cpu_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/cpu_ll.h
new file mode 100644
index 00000000000..284e86757d1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/cpu_ll.h
@@ -0,0 +1,211 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdint.h>
+
+#include "soc/soc_caps.h"
+
+#include "xt_instr_macros.h"
+#include "xtensa/config/specreg.h"
+#include "xtensa/config/extreg.h"
+#include "esp_bit_defs.h"
+#include "esp_attr.h"
+#include "xtensa/config/core.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline uint32_t IRAM_ATTR cpu_ll_get_core_id(void)
+{
+    uint32_t id;
+    asm volatile (
+        "rsr.prid %0\n"
+        "extui %0,%0,13,1"
+        :"=r"(id));
+    return id;
+}
+
+static inline uint32_t cpu_ll_get_cycle_count(void)
+{
+    uint32_t result;
+    RSR(CCOUNT, result);
+    return result;
+}
+
+static inline void IRAM_ATTR cpu_ll_set_cycle_count(uint32_t val)
+{
+    WSR(CCOUNT, val);
+}
+
+static inline void *cpu_ll_get_sp(void)
+{
+    void *sp;
+    asm volatile ("mov %0, sp;" : "=r" (sp));
+    return sp;
+}
+
+static inline void cpu_ll_init_hwloop(void)
+{
+#if XCHAL_ERRATUM_572
+    uint32_t memctl = XCHAL_CACHE_MEMCTL_DEFAULT;
+    WSR(MEMCTL, memctl);
+#endif // XCHAL_ERRATUM_572
+}
+
+static inline void cpu_ll_set_breakpoint(int id, uint32_t pc)
+{
+    uint32_t en;
+
+    // Set the break address register to the appropriate PC
+    if (id) {
+        WSR(IBREAKA_1, pc);
+    } else {
+        WSR(IBREAKA_0, pc);
+    }
+
+    // Enable the breakpoint using the break enable register
+    RSR(IBREAKENABLE, en);
+    en |= BIT(id);
+    WSR(IBREAKENABLE, en);
+}
+
+static inline void cpu_ll_clear_breakpoint(int id)
+{
+    uint32_t en = 0;
+    uint32_t pc = 0;
+
+    // Set the break address register to the appropriate PC
+    if (id) {
+        WSR(IBREAKA_1, pc);
+    } else {
+        WSR(IBREAKA_0, pc);
+    }
+
+    // Enable the breakpoint using the break enable register
+    RSR(IBREAKENABLE, en);
+    en &= ~BIT(id);
+    WSR(IBREAKENABLE, en);
+}
+
+static inline uint32_t cpu_ll_ptr_to_pc(const void *addr)
+{
+    return ((uint32_t) addr);
+}
+
+static inline void *cpu_ll_pc_to_ptr(uint32_t pc)
+{
+    return (void *) ((pc & 0x3fffffff) | 0x40000000);
+}
+
+static inline void cpu_ll_set_watchpoint(int id,
+        const void *addr,
+        size_t size,
+        bool on_read,
+        bool on_write)
+{
+    uint32_t dbreakc = 0x3F;
+
+    //We support watching 2^n byte values, from 1 to 64. Calculate the mask for that.
+    for (int x = 0; x < 7; x++) {
+        if (size == (size_t)(1U << x)) {
+            break;
+        }
+        dbreakc <<= 1;
+    }
+
+    dbreakc = (dbreakc & 0x3F);
+
+    if (on_read) {
+        dbreakc |= BIT(30);
+    }
+
+    if (on_write) {
+        dbreakc |= BIT(31);
+    }
+
+    // Write the break address register and the size to control
+    // register.
+    if (id) {
+        WSR(DBREAKA_1, (uint32_t) addr);
+        WSR(DBREAKC_1, dbreakc);
+    } else {
+        WSR(DBREAKA_0, (uint32_t) addr);
+        WSR(DBREAKC_0, dbreakc);
+    }
+}
+
+static inline void cpu_ll_clear_watchpoint(int id)
+{
+    // Clear both break address register and control register
+    if (id) {
+        WSR(DBREAKA_1, 0);
+        WSR(DBREAKC_1, 0);
+    } else {
+        WSR(DBREAKA_0, 0);
+        WSR(DBREAKC_0, 0);
+    }
+}
+
+static inline bool cpu_ll_is_debugger_attached(void)
+{
+    uint32_t dcr = 0;
+    uint32_t reg = DSRSET;
+    RER(reg, dcr);
+    return (dcr & 0x1);
+}
+
+static inline void cpu_ll_break(void)
+{
+    __asm__ ("break 1,15");
+}
+
+static inline void cpu_ll_set_vecbase(const void *vecbase)
+{
+    asm volatile ("wsr %0, vecbase" :: "r" (vecbase));
+}
+
+static inline void cpu_ll_waiti(void)
+{
+    asm volatile ("waiti 0\n");
+}
+
+static inline uint32_t cpu_ll_read_dedic_gpio_in(void)
+{
+    uint32_t value = 0;
+    asm volatile("ee.get_gpio_in %0" : "=r"(value) : :);
+    return value;
+}
+
+static inline uint32_t cpu_ll_read_dedic_gpio_out(void)
+{
+    uint32_t value = 0;
+    asm volatile("rur.gpio_out %0" : "=r"(value) : :);
+    return value;
+}
+
+static inline void cpu_ll_write_dedic_gpio_all(uint32_t value)
+{
+    asm volatile("wur.gpio_out %0"::"r"(value):);
+}
+
+static inline void cpu_ll_write_dedic_gpio_mask(uint32_t mask, uint32_t value)
+{
+    asm volatile("ee.wr_mask_gpio_out %0, %1" : : "r"(value), "r"(mask):);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/ds_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/ds_ll.h
new file mode 100644
index 00000000000..f5ae99074cf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/ds_ll.h
@@ -0,0 +1,162 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+
+#include "soc/hwcrypto_reg.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline void ds_ll_start(void)
+{
+    REG_WRITE(DS_SET_START_REG, 1);
+}
+
+/**
+ * @brief Wait until DS peripheral has finished any outstanding operation.
+ */
+static inline bool ds_ll_busy(void)
+{
+    return (REG_READ(DS_QUERY_BUSY_REG) > 0) ? true : false;
+}
+
+/**
+ * @brief Busy wait until the hardware is ready.
+ */
+static inline void ds_ll_wait_busy(void)
+{
+    while (ds_ll_busy());
+}
+
+/**
+ * @brief In case of a key error, check what caused it.
+ */
+static inline ds_key_check_t ds_ll_key_error_source(void)
+{
+    uint32_t key_error = REG_READ(DS_QUERY_KEY_WRONG_REG);
+    if (key_error == 0) {
+        return DS_NO_KEY_INPUT;
+    } else {
+        return DS_OTHER_WRONG;
+    }
+}
+
+/**
+ * @brief Write the initialization vector to the corresponding register field.
+ */
+static inline void ds_ll_configure_iv(const uint32_t *iv)
+{
+    for (size_t i = 0; i < (SOC_DS_KEY_PARAM_MD_IV_LENGTH / sizeof(uint32_t)); i++) {
+        REG_WRITE(DS_IV_BASE + (i * 4), iv[i]);
+    }
+}
+
+/**
+ * @brief Write the message which should be signed.
+ *
+ * @param msg Pointer to the message.
+ * @param size Length of msg in bytes. It is the RSA signature length in bytes.
+ */
+static inline void ds_ll_write_message(const uint8_t *msg, size_t size)
+{
+    memcpy((uint8_t *) DS_X_BASE, msg, size);
+}
+
+/**
+ * @brief Write the encrypted private key parameters.
+ */
+static inline void ds_ll_write_private_key_params(const uint8_t *encrypted_key_params)
+{
+    /* Note: as the internal peripheral still has RSA 4096 structure,
+       but C is encrypted based on the actual max RSA length (ETS_DS_MAX_BITS), need to fragment it
+       when copying to hardware...
+
+       (note if ETS_DS_MAX_BITS == 4096, this should be the same as copying data->c to hardware in one fragment)
+    */
+    typedef struct {
+        uint32_t addr;
+        size_t len;
+    } frag_t;
+    const frag_t frags[] = {
+        {DS_C_Y_BASE,  SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
+        {DS_C_M_BASE,  SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
+        {DS_C_RB_BASE, SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
+        {DS_C_BOX_BASE, DS_IV_BASE - DS_C_BOX_BASE},
+    };
+    const size_t NUM_FRAGS = sizeof(frags) / sizeof(frag_t);
+    const uint8_t *from = encrypted_key_params;
+
+    for (int i = 0; i < NUM_FRAGS; i++) {
+        memcpy((uint8_t *)frags[i].addr, from, frags[i].len);
+        from += frags[i].len;
+    }
+}
+
+/**
+ * @brief Begin signing procedure.
+ */
+static inline void ds_ll_start_sign(void)
+{
+    REG_WRITE(DS_SET_ME_REG, 1);
+}
+
+/**
+ * @brief check the calculated signature.
+ *
+ * @return
+ * - DS_SIGNATURE_OK if no issue is detected with the signature.
+ * - DS_SIGNATURE_PADDING_FAIL if the padding of the private key parameters is wrong.
+ * - DS_SIGNATURE_MD_FAIL if the message digest check failed. This means that the message digest calculated using
+ *      the private key parameters fails, i.e., the integrity of the private key parameters is not protected.
+ * - DS_SIGNATURE_PADDING_AND_MD_FAIL if both padding and message digest check fail.
+ */
+static inline ds_signature_check_t ds_ll_check_signature(void)
+{
+    uint32_t result = REG_READ(DS_QUERY_CHECK_REG);
+    switch (result) {
+    case 0:
+        return DS_SIGNATURE_OK;
+    case 1:
+        return DS_SIGNATURE_MD_FAIL;
+    case 2:
+        return DS_SIGNATURE_PADDING_FAIL;
+    default:
+        return DS_SIGNATURE_PADDING_AND_MD_FAIL;
+    }
+}
+
+/**
+ * @brief Read the signature from the hardware.
+ *
+ * @param result The signature result.
+ * @param size Length of signature result in bytes. It is the RSA signature length in bytes.
+ */
+static inline void ds_ll_read_result(uint8_t *result, size_t size)
+{
+    memcpy(result, (uint8_t *) DS_Z_BASE, size);
+}
+
+/**
+ * @brief Exit the signature operation.
+ *
+ * @note This does not deactivate the module. Corresponding clock/reset bits have to be triggered for deactivation.
+ */
+static inline void ds_ll_finish(void)
+{
+    REG_WRITE(DS_SET_FINISH_REG, 1);
+    ds_ll_wait_busy();
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/gdma_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/gdma_ll.h
new file mode 100644
index 00000000000..4035c76934c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/gdma_ll.h
@@ -0,0 +1,537 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+#include "soc/gdma_struct.h"
+#include "soc/gdma_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define GDMA_LL_GET_HW(id) (((id) == 0) ? (&GDMA) : NULL)
+
+#define GDMA_LL_RX_EVENT_MASK        (0x3FF)
+#define GDMA_LL_TX_EVENT_MASK        (0xFF)
+
+#define GDMA_LL_EVENT_TX_L3_FIFO_UDF (1<<7)
+#define GDMA_LL_EVENT_TX_L3_FIFO_OVF (1<<6)
+#define GDMA_LL_EVENT_TX_L1_FIFO_UDF (1<<5)
+#define GDMA_LL_EVENT_TX_L1_FIFO_OVF (1<<4)
+#define GDMA_LL_EVENT_TX_TOTAL_EOF   (1<<3)
+#define GDMA_LL_EVENT_TX_DESC_ERROR  (1<<2)
+#define GDMA_LL_EVENT_TX_EOF         (1<<1)
+#define GDMA_LL_EVENT_TX_DONE        (1<<0)
+
+#define GDMA_LL_EVENT_RX_L3_FIFO_UDF (1<<9)
+#define GDMA_LL_EVENT_RX_L3_FIFO_OVF (1<<8)
+#define GDMA_LL_EVENT_RX_L1_FIFO_UDF (1<<7)
+#define GDMA_LL_EVENT_RX_L1_FIFO_OVF (1<<6)
+#define GDMA_LL_EVENT_RX_WATER_MARK  (1<<5)
+#define GDMA_LL_EVENT_RX_DESC_EMPTY  (1<<4)
+#define GDMA_LL_EVENT_RX_DESC_ERROR  (1<<3)
+#define GDMA_LL_EVENT_RX_ERR_EOF     (1<<2)
+#define GDMA_LL_EVENT_RX_SUC_EOF     (1<<1)
+#define GDMA_LL_EVENT_RX_DONE        (1<<0)
+
+#define GDMA_LL_L2FIFO_BASE_SIZE (16) // Basic size of GDMA Level 2 FIFO
+
+/* Memory block size value supported by channel */
+#define GDMA_LL_EXT_MEM_BK_SIZE_16B (0)
+#define GDMA_LL_EXT_MEM_BK_SIZE_32B (1)
+#define GDMA_LL_EXT_MEM_BK_SIZE_64B (2)
+
+///////////////////////////////////// Common /////////////////////////////////////////
+/**
+ * @brief Enable DMA channel M2M mode (TX channel n forward data to RX channel n), disabled by default
+ */
+static inline void gdma_ll_enable_m2m_mode(gdma_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->channel[channel].in.conf0.mem_trans_en = enable;
+    if (enable) {
+        // to enable m2m mode, the tx chan has to be the same to rx chan, and set to a valid value
+        dev->channel[channel].in.peri_sel.sel = 0;
+        dev->channel[channel].out.peri_sel.sel = 0;
+    }
+}
+
+/**
+ * @brief Enable DMA clock gating
+ */
+static inline void gdma_ll_enable_clock(gdma_dev_t *dev, bool enable)
+{
+    dev->misc_conf.clk_en = enable;
+}
+
+///////////////////////////////////// RX /////////////////////////////////////////
+/**
+ * @brief Get DMA RX channel interrupt status word
+ */
+__attribute__((always_inline))
+static inline uint32_t gdma_ll_rx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
+{
+    return dev->channel[channel].in.int_st.val;
+}
+
+/**
+ * @brief Enable DMA RX channel interrupt
+ */
+static inline void gdma_ll_rx_enable_interrupt(gdma_dev_t *dev, uint32_t channel, uint32_t mask, bool enable)
+{
+    if (enable) {
+        dev->channel[channel].in.int_ena.val |= mask;
+    } else {
+        dev->channel[channel].in.int_ena.val &= ~mask;
+    }
+}
+
+/**
+ * @brief Clear DMA RX channel interrupt
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_rx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
+{
+    dev->channel[channel].in.int_clr.val = mask;
+}
+
+/**
+ * @brief Get DMA RX channel interrupt status register address
+ */
+static inline volatile void *gdma_ll_rx_get_interrupt_status_reg(gdma_dev_t *dev, uint32_t channel)
+{
+    return (volatile void *)(&dev->channel[channel].in.int_st);
+}
+
+/**
+ * @brief Enable DMA RX channel to check the owner bit in the descriptor, disabled by default
+ */
+static inline void gdma_ll_rx_enable_owner_check(gdma_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->channel[channel].in.conf1.in_check_owner = enable;
+}
+
+/**
+ * @brief Enable DMA RX channel burst reading data, disabled by default
+ */
+static inline void gdma_ll_rx_enable_data_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->channel[channel].in.conf0.in_data_burst_en = enable;
+}
+
+/**
+ * @brief Enable DMA RX channel burst reading descriptor link, disabled by default
+ */
+static inline void gdma_ll_rx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->channel[channel].in.conf0.indscr_burst_en = enable;
+}
+
+/**
+ * @brief Reset DMA RX channel FSM and FIFO pointer
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].in.conf0.in_rst = 1;
+    dev->channel[channel].in.conf0.in_rst = 0;
+}
+
+/**
+ * @brief Set DMA RX channel memory block size
+ * @param size_index Supported value: GDMA_LL_EXT_MEM_BK_SIZE_16B/32B/64B
+ */
+static inline void gdma_ll_rx_set_block_size_psram(gdma_dev_t *dev, uint32_t channel, uint32_t size_index)
+{
+    dev->channel[channel].in.conf1.in_ext_mem_bk_size = size_index;
+}
+
+/**
+ * @brief Set the water mark for RX channel, default value is 12
+ */
+static inline void gdma_ll_rx_set_water_mark(gdma_dev_t *dev, uint32_t channel, uint32_t water_mark)
+{
+    dev->channel[channel].in.conf1.dma_infifo_full_thrs = water_mark;
+}
+
+/**
+ * @brief Check if DMA RX FIFO is full
+ * @param fifo_level (1,2,3) <=> (L1, L2, L3)
+ */
+static inline bool gdma_ll_rx_is_fifo_full(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
+{
+    return dev->channel[channel].in.infifo_status.val & (1 << 2 * (fifo_level - 1));
+}
+
+/**
+ * @brief Check if DMA RX FIFO is empty
+ * @param fifo_level (1,2,3) <=> (L1, L2, L3)
+ */
+static inline bool gdma_ll_rx_is_fifo_empty(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
+{
+    return dev->channel[channel].in.infifo_status.val & (1 << (2 * (fifo_level - 1) + 1));
+}
+
+/**
+ * @brief Get number of bytes in RX FIFO (L1, L2, L3)
+ * @param fifo_level (1,2,3) <=> (L1, L2, L3)
+ */
+static inline uint32_t gdma_ll_rx_get_fifo_bytes(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
+{
+    switch (fifo_level) {
+    case 1:
+        return dev->channel[channel].in.infifo_status.infifo_cnt_l1;
+    case 2:
+        return dev->channel[channel].in.infifo_status.infifo_cnt_l2;
+    case 3:
+        return dev->channel[channel].in.infifo_status.infifo_cnt_l3;
+    }
+}
+
+/**
+ * @brief Pop data from DMA RX FIFO
+ */
+static inline uint32_t gdma_ll_rx_pop_data(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].in.pop.infifo_pop = 1;
+    return dev->channel[channel].in.pop.infifo_rdata;
+}
+
+/**
+ * @brief Set the descriptor link base address for RX channel
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
+{
+    dev->channel[channel].in.link.addr = addr;
+}
+
+/**
+ * @brief Start dealing with RX descriptors
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].in.link.start = 1;
+}
+
+/**
+ * @brief Stop dealing with RX descriptors
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].in.link.stop = 1;
+}
+
+/**
+ * @brief Restart a new inlink right after the last descriptor
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].in.link.restart = 1;
+}
+
+/**
+ * @brief Enable DMA RX to return the address of current descriptor when receives error
+ */
+static inline void gdma_ll_rx_enable_auto_return(gdma_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->channel[channel].in.link.auto_ret = enable;
+}
+
+/**
+ * @brief Check if DMA RX FSM is in IDLE state
+ */
+static inline bool gdma_ll_rx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
+{
+    return dev->channel[channel].in.link.park;
+}
+
+/**
+ * @brief Get RX success EOF descriptor's address
+ */
+__attribute__((always_inline))
+static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
+{
+    return dev->channel[channel].in.suc_eof_des_addr;
+}
+
+/**
+ * @brief Get RX error EOF descriptor's address
+ */
+__attribute__((always_inline))
+static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
+{
+    return dev->channel[channel].in.err_eof_des_addr;
+}
+
+/**
+ * @brief Get current RX descriptor's address
+ */
+__attribute__((always_inline))
+static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
+{
+    return dev->channel[channel].in.dscr;
+}
+
+/**
+ * @brief Set weight for DMA RX channel
+ */
+static inline void gdma_ll_rx_set_weight(gdma_dev_t *dev, uint32_t channel, uint32_t weight)
+{
+    dev->channel[channel].in.wight.rx_weight = weight;
+}
+
+/**
+ * @brief Set priority for DMA RX channel
+ */
+static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, uint32_t prio)
+{
+    dev->channel[channel].in.pri.rx_pri = prio;
+}
+
+/**
+ * @brief Connect DMA RX channel to a given peripheral
+ */
+static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
+{
+    dev->channel[channel].in.peri_sel.sel = periph_id;
+}
+
+///////////////////////////////////// TX /////////////////////////////////////////
+/**
+ * @brief Get DMA TX channel interrupt status word
+ */
+__attribute__((always_inline))
+static inline uint32_t gdma_ll_tx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
+{
+    return dev->channel[channel].out.int_st.val;
+}
+
+/**
+ * @brief Enable DMA TX channel interrupt
+ */
+static inline void gdma_ll_tx_enable_interrupt(gdma_dev_t *dev, uint32_t channel, uint32_t mask, bool enable)
+{
+    if (enable) {
+        dev->channel[channel].out.int_ena.val |= mask;
+    } else {
+        dev->channel[channel].out.int_ena.val &= ~mask;
+    }
+}
+
+/**
+ * @brief Clear DMA TX channel interrupt
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_tx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
+{
+    dev->channel[channel].out.int_clr.val = mask;
+}
+
+/**
+ * @brief Get DMA TX channel interrupt status register address
+ */
+static inline volatile void *gdma_ll_tx_get_interrupt_status_reg(gdma_dev_t *dev, uint32_t channel)
+{
+    return (volatile void *)(&dev->channel[channel].out.int_st);
+}
+
+/**
+ * @brief Enable DMA TX channel to check the owner bit in the descriptor, disabled by default
+ */
+static inline void gdma_ll_tx_enable_owner_check(gdma_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->channel[channel].out.conf1.out_check_owner = enable;
+}
+
+/**
+ * @brief Enable DMA TX channel burst sending data, disabled by default
+ */
+static inline void gdma_ll_tx_enable_data_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->channel[channel].out.conf0.out_data_burst_en = enable;
+}
+
+/**
+ * @brief Enable DMA TX channel burst reading descriptor link, disabled by default
+ */
+static inline void gdma_ll_tx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->channel[channel].out.conf0.outdscr_burst_en = enable;
+}
+
+/**
+ * @brief Set TX channel EOF mode
+ */
+static inline void gdma_ll_tx_set_eof_mode(gdma_dev_t *dev, uint32_t channel, uint32_t mode)
+{
+    dev->channel[channel].out.conf0.out_eof_mode = mode;
+}
+
+/**
+ * @brief Enable DMA TX channel automatic write results back to descriptor after all data has been sent out, disabled by default
+ */
+static inline void gdma_ll_tx_enable_auto_write_back(gdma_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->channel[channel].out.conf0.out_auto_wrback = enable;
+}
+
+/**
+ * @brief Reset DMA TX channel FSM and FIFO pointer
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].out.conf0.out_rst = 1;
+    dev->channel[channel].out.conf0.out_rst = 0;
+}
+
+/**
+ * @brief Set DMA TX channel memory block size
+ * @param size_index Supported value: GDMA_LL_EXT_MEM_BK_SIZE_16B/32B/64B
+ */
+static inline void gdma_ll_tx_set_block_size_psram(gdma_dev_t *dev, uint32_t channel, uint32_t size_index)
+{
+    dev->channel[channel].out.conf1.out_ext_mem_bk_size = size_index;
+}
+
+/**
+ * @brief Check if DMA TX FIFO is full
+ * @param fifo_level (1,2,3) <=> (L1, L2, L3)
+ */
+static inline bool gdma_ll_tx_is_fifo_full(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
+{
+    return dev->channel[channel].out.outfifo_status.val & (1 << 2 * (fifo_level - 1));
+}
+
+/**
+ * @brief Check if DMA TX FIFO is empty
+ * @param fifo_level (1,2,3) <=> (L1, L2, L3)
+ */
+static inline bool gdma_ll_tx_is_fifo_empty(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
+{
+    return dev->channel[channel].out.outfifo_status.val & (1 << (2 * (fifo_level - 1) + 1));
+}
+
+/**
+ * @brief Get number of bytes in TX FIFO (L1, L2, L3)
+ * @param fifo_level (1,2,3) <=> (L1, L2, L3)
+ */
+static inline uint32_t gdma_ll_tx_get_fifo_bytes(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
+{
+    switch (fifo_level) {
+    case 1:
+        return dev->channel[channel].out.outfifo_status.outfifo_cnt_l1;
+    case 2:
+        return dev->channel[channel].out.outfifo_status.outfifo_cnt_l2;
+    case 3:
+        return dev->channel[channel].out.outfifo_status.outfifo_cnt_l3;
+    }
+}
+
+/**
+ * @brief Push data into DMA TX FIFO
+ */
+static inline void gdma_ll_tx_push_data(gdma_dev_t *dev, uint32_t channel, uint32_t data)
+{
+    dev->channel[channel].out.push.outfifo_wdata = data;
+    dev->channel[channel].out.push.outfifo_push = 1;
+}
+
+/**
+ * @brief Set the descriptor link base address for TX channel
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
+{
+    dev->channel[channel].out.link.addr = addr;
+}
+
+/**
+ * @brief Start dealing with TX descriptors
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].out.link.start = 1;
+}
+
+/**
+ * @brief Stop dealing with TX descriptors
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].out.link.stop = 1;
+}
+
+/**
+ * @brief Restart a new outlink right after the last descriptor
+ */
+__attribute__((always_inline))
+static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].out.link.restart = 1;
+}
+
+/**
+ * @brief Check if DMA TX FSM is in IDLE state
+ */
+static inline bool gdma_ll_tx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
+{
+    return dev->channel[channel].out.link.park;
+}
+
+/**
+ * @brief Get TX EOF descriptor's address
+ */
+__attribute__((always_inline))
+static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
+{
+    return dev->channel[channel].out.eof_des_addr;
+}
+
+/**
+ * @brief Get current TX descriptor's address
+ */
+__attribute__((always_inline))
+static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
+{
+    return dev->channel[channel].out.dscr;
+}
+
+/**
+ * @brief Set weight for DMA TX channel
+ */
+static inline void gdma_ll_tx_set_weight(gdma_dev_t *dev, uint32_t channel, uint32_t weight)
+{
+    dev->channel[channel].out.wight.tx_weight = weight;
+}
+
+/**
+ * @brief Set priority for DMA TX channel
+ */
+static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, uint32_t prio)
+{
+    dev->channel[channel].out.pri.tx_pri = prio;
+}
+
+/**
+ * @brief Connect DMA TX channel to a given peripheral
+ */
+static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
+{
+    dev->channel[channel].out.peri_sel.sel = periph_id;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/gpio_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/gpio_ll.h
new file mode 100644
index 00000000000..6a5b7b1b85f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/gpio_ll.h
@@ -0,0 +1,547 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The LL layer for ESP32-S3 GPIO register operations
+
+#pragma once
+
+#include "soc/soc.h"
+#include "soc/gpio_periph.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/rtc_io_reg.h"
+#include "soc/usb_serial_jtag_reg.h"
+#include "hal/gpio_types.h"
+#include "soc/gpio_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Get GPIO hardware instance with giving gpio num
+#define GPIO_LL_GET_HW(num) (((num) == 0) ? (&GPIO) : NULL)
+
+// On ESP32S3, pro cpu and app cpu shares the same interrupt enable bit
+#define GPIO_LL_INTR_ENA      (BIT(0))
+#define GPIO_LL_NMI_INTR_ENA  (BIT(1))
+
+/**
+  * @brief Enable pull-up on GPIO.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_pullup_en(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    REG_SET_BIT(GPIO_PIN_MUX_REG[gpio_num], FUN_PU);
+}
+
+/**
+  * @brief Disable pull-up on GPIO.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_pullup_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    REG_CLR_BIT(GPIO_PIN_MUX_REG[gpio_num], FUN_PU);
+}
+
+/**
+  * @brief Enable pull-down on GPIO.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_pulldown_en(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    REG_SET_BIT(GPIO_PIN_MUX_REG[gpio_num], FUN_PD);
+}
+
+/**
+  * @brief Disable pull-down on GPIO.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_pulldown_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    REG_CLR_BIT(GPIO_PIN_MUX_REG[gpio_num], FUN_PD);
+}
+
+/**
+ * @brief  GPIO set interrupt trigger type
+ *
+ * @param  hw Peripheral GPIO hardware instance address.
+ * @param  gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param  intr_type Interrupt type, select from gpio_int_type_t
+ */
+static inline void gpio_ll_set_intr_type(gpio_dev_t *hw, gpio_num_t gpio_num, gpio_int_type_t intr_type)
+{
+    hw->pin[gpio_num].int_type = intr_type;
+}
+
+/**
+  * @brief Get GPIO interrupt status
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param core_id interrupt core id
+  * @param status interrupt status
+  */
+static inline void gpio_ll_get_intr_status(gpio_dev_t *hw, uint32_t core_id, uint32_t *status)
+{
+    // On ESP32S3, pcpu_int register represents GPIO0-31 interrupt status on both cores
+    (void)core_id;
+    *status = hw->pcpu_int;
+}
+
+/**
+  * @brief Get GPIO interrupt status high
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param core_id interrupt core id
+  * @param status interrupt status high
+  */
+static inline void gpio_ll_get_intr_status_high(gpio_dev_t *hw, uint32_t core_id, uint32_t *status)
+{
+    // On ESP32S3, pcpu_int1 register represents GPIO32-48 interrupt status on both cores
+    (void)core_id;
+    *status = hw->pcpu_int1.intr;
+}
+
+/**
+  * @brief Clear GPIO interrupt status
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param mask interrupt status clear mask
+  */
+static inline void gpio_ll_clear_intr_status(gpio_dev_t *hw, uint32_t mask)
+{
+    hw->status_w1tc = mask;
+}
+
+/**
+  * @brief Clear GPIO interrupt status high
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param mask interrupt status high clear mask
+  */
+static inline void gpio_ll_clear_intr_status_high(gpio_dev_t *hw, uint32_t mask)
+{
+    hw->status1_w1tc.intr_st = mask;
+}
+
+/**
+ * @brief  Enable GPIO module interrupt signal
+ *
+ * @param  hw Peripheral GPIO hardware instance address.
+ * @param  core_id Interrupt enabled CPU to corresponding ID
+ * @param  gpio_num GPIO number. If you want to enable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ */
+static inline void gpio_ll_intr_enable_on_core(gpio_dev_t *hw, uint32_t core_id, gpio_num_t gpio_num)
+{
+    (void)core_id;
+    GPIO.pin[gpio_num].int_ena = GPIO_LL_INTR_ENA;     //enable intr
+}
+
+/**
+ * @brief  Disable GPIO module interrupt signal
+ *
+ * @param  hw Peripheral GPIO hardware instance address.
+ * @param  gpio_num GPIO number. If you want to disable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ */
+static inline void gpio_ll_intr_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    hw->pin[gpio_num].int_ena = 0;                             //disable GPIO intr
+}
+
+/**
+  * @brief Disable input mode on GPIO.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_input_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_INPUT_DISABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+/**
+  * @brief Enable input mode on GPIO.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_input_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+/**
+  * @brief Disable output mode on GPIO.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_output_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    if (gpio_num < 32) {
+        hw->enable_w1tc = (0x1 << gpio_num);
+    } else {
+        hw->enable1_w1tc.data = (0x1 << (gpio_num - 32));
+    }
+
+    // Ensure no other output signal is routed via GPIO matrix to this pin
+    REG_WRITE(GPIO_FUNC0_OUT_SEL_CFG_REG + (gpio_num * 4),
+              SIG_GPIO_OUT_IDX);
+}
+
+/**
+  * @brief Enable output mode on GPIO.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_output_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    if (gpio_num < 32) {
+        hw->enable_w1ts = (0x1 << gpio_num);
+    } else {
+        hw->enable1_w1ts.data = (0x1 << (gpio_num - 32));
+    }
+}
+
+/**
+  * @brief Disable open-drain mode on GPIO.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_od_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    hw->pin[gpio_num].pad_driver = 0;
+}
+
+/**
+  * @brief Enable open-drain mode on GPIO.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_od_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    hw->pin[gpio_num].pad_driver = 1;
+}
+
+/**
+ * @brief  GPIO set output level
+ *
+ * @param  hw Peripheral GPIO hardware instance address.
+ * @param  gpio_num GPIO number. If you want to set the output level of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param  level Output level. 0: low ; 1: high
+ */
+static inline void gpio_ll_set_level(gpio_dev_t *hw, gpio_num_t gpio_num, uint32_t level)
+{
+    if (level) {
+        if (gpio_num < 32) {
+            hw->out_w1ts = (1 << gpio_num);
+        } else {
+            hw->out1_w1ts.data = (1 << (gpio_num - 32));
+        }
+    } else {
+        if (gpio_num < 32) {
+            hw->out_w1tc = (1 << gpio_num);
+        } else {
+            hw->out1_w1tc.data = (1 << (gpio_num - 32));
+        }
+    }
+}
+
+/**
+ * @brief  GPIO get input level
+ *
+ * @warning If the pad is not configured for input (or input and output) the returned value is always 0.
+ *
+ * @param  hw Peripheral GPIO hardware instance address.
+ * @param  gpio_num GPIO number. If you want to get the logic level of e.g. pin GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ *
+ * @return
+ *     - 0 the GPIO input level is 0
+ *     - 1 the GPIO input level is 1
+ */
+static inline int gpio_ll_get_level(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    if (gpio_num < 32) {
+        return (hw->in >> gpio_num) & 0x1;
+    } else {
+        return (hw->in1.data >> (gpio_num - 32)) & 0x1;
+    }
+}
+
+/**
+ * @brief Enable GPIO wake-up function.
+ *
+ * @param hw Peripheral GPIO hardware instance address.
+ * @param gpio_num GPIO number.
+ * @param intr_type GPIO wake-up type. Only GPIO_INTR_LOW_LEVEL or GPIO_INTR_HIGH_LEVEL can be used.
+ */
+static inline void gpio_ll_wakeup_enable(gpio_dev_t *hw, gpio_num_t gpio_num, gpio_int_type_t intr_type)
+{
+    hw->pin[gpio_num].int_type = intr_type;
+    hw->pin[gpio_num].wakeup_enable = 0x1;
+}
+
+/**
+ * @brief Disable GPIO wake-up function.
+ *
+ * @param hw Peripheral GPIO hardware instance address.
+ * @param gpio_num GPIO number
+ */
+static inline void gpio_ll_wakeup_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    hw->pin[gpio_num].wakeup_enable = 0;
+}
+
+/**
+  * @brief Set GPIO pad drive capability
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number, only support output GPIOs
+  * @param strength Drive capability of the pad
+  */
+static inline void gpio_ll_set_drive_capability(gpio_dev_t *hw, gpio_num_t gpio_num, gpio_drive_cap_t strength)
+{
+    SET_PERI_REG_BITS(GPIO_PIN_MUX_REG[gpio_num], FUN_DRV_V, strength, FUN_DRV_S);
+}
+
+/**
+  * @brief Get GPIO pad drive capability
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number, only support output GPIOs
+  * @param strength Pointer to accept drive capability of the pad
+  */
+static inline void gpio_ll_get_drive_capability(gpio_dev_t *hw, gpio_num_t gpio_num, gpio_drive_cap_t *strength)
+{
+    *strength = (gpio_drive_cap_t)GET_PERI_REG_BITS2(GPIO_PIN_MUX_REG[gpio_num], FUN_DRV_V, FUN_DRV_S);
+}
+
+/**
+  * @brief Enable all digital gpio pad hold function during Deep-sleep.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  */
+static inline void gpio_ll_deep_sleep_hold_en(gpio_dev_t *hw)
+{
+    SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M);
+}
+
+/**
+  * @brief Disable all digital gpio pad hold function during Deep-sleep.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  */
+static inline void gpio_ll_deep_sleep_hold_dis(gpio_dev_t *hw)
+{
+    SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CLR_DG_PAD_AUTOHOLD);
+}
+
+/**
+  * @brief Enable gpio pad hold function.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number, only support output GPIOs
+  */
+static inline void gpio_ll_hold_en(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    SET_PERI_REG_MASK(RTC_CNTL_DIG_PAD_HOLD_REG, GPIO_HOLD_MASK[gpio_num]);
+}
+
+/**
+  * @brief Disable gpio pad hold function.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number, only support output GPIOs
+  */
+static inline void gpio_ll_hold_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PAD_HOLD_REG, GPIO_HOLD_MASK[gpio_num]);
+}
+
+/**
+  * @brief Set pad input to a peripheral signal through the IOMUX.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number of the pad.
+  * @param signal_idx Peripheral signal id to input. One of the ``*_IN_IDX`` signals in ``soc/gpio_sig_map.h``.
+  */
+static inline void gpio_ll_iomux_in(gpio_dev_t *hw, uint32_t gpio, uint32_t signal_idx)
+{
+    hw->func_in_sel_cfg[signal_idx].sig_in_sel = 0;
+    PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[gpio]);
+}
+
+/**
+ * @brief  Select a function for the pin in the IOMUX
+ *
+ * @param  pin_name Pin name to configure
+ * @param  func Function to assign to the pin
+ */
+static inline __attribute__((always_inline)) void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
+{
+    if (pin_name == IO_MUX_GPIO19_REG || pin_name == IO_MUX_GPIO20_REG) {
+        CLEAR_PERI_REG_MASK(USB_SERIAL_JTAG_CONF0_REG, USB_SERIAL_JTAG_USB_PAD_ENABLE);
+    }
+    PIN_FUNC_SELECT(pin_name, func);
+}
+
+/**
+  * @brief Set peripheral output to an GPIO pad through the IOMUX.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num gpio_num GPIO number of the pad.
+  * @param func The function number of the peripheral pin to output pin.
+  *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, uint32_t oen_inv)
+{
+    hw->func_out_sel_cfg[gpio_num].oen_sel = 0;
+    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;
+    gpio_ll_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_num], func);
+}
+
+static inline void gpio_ll_force_hold_all(gpio_dev_t *hw)
+{
+    CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD);
+    SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_HOLD);
+}
+
+static inline void gpio_ll_force_unhold_all(void)
+{
+    CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_HOLD);
+    SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD);
+    SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CLR_DG_PAD_AUTOHOLD);
+}
+
+/**
+  * @brief Enable GPIO pin used for wakeup from sleep.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_sleep_sel_en(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_SLP_SEL_ENABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+/**
+  * @brief Disable GPIO pin used for wakeup from sleep.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_sleep_sel_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_SLP_SEL_DISABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+/**
+  * @brief Disable GPIO pull-up in sleep mode.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_sleep_pullup_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_SLP_PULLUP_DISABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+/**
+  * @brief Enable GPIO pull-up in sleep mode.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_sleep_pullup_en(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_SLP_PULLUP_ENABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+/**
+  * @brief Enable GPIO pull-down in sleep mode.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_sleep_pulldown_en(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_SLP_PULLDOWN_ENABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+/**
+  * @brief Disable GPIO pull-down in sleep mode.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_sleep_pulldown_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_SLP_PULLDOWN_DISABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+/**
+  * @brief Disable GPIO input in sleep mode.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_sleep_input_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_SLP_INPUT_DISABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+/**
+  * @brief Enable GPIO input in sleep mode.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_sleep_input_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_SLP_INPUT_ENABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+/**
+  * @brief Disable GPIO output in sleep mode.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_sleep_output_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_SLP_OUTPUT_DISABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+/**
+  * @brief Enable GPIO output in sleep mode.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number
+  */
+static inline void gpio_ll_sleep_output_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
+{
+    PIN_SLP_OUTPUT_ENABLE(GPIO_PIN_MUX_REG[gpio_num]);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/gpspi_flash_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/gpspi_flash_ll.h
new file mode 100644
index 00000000000..47f11e637a2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/gpspi_flash_ll.h
@@ -0,0 +1,411 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The ll is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The Lowlevel layer for SPI Flash
+
+#pragma once
+
+#include <stdlib.h>
+#include "soc/spi_periph.h"
+#include "soc/spi_struct.h"
+#include "hal/spi_types.h"
+#include "hal/spi_flash_types.h"
+#include <sys/param.h> // For MIN/MAX
+#include <stdbool.h>
+#include <string.h>
+#include "hal/misc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define gpspi_flash_ll_get_hw(host_id)  (((host_id)==SPI2_HOST ? &GPSPI2 \
+                                                : ((host_id)==SPI3_HOST ? &GPSPI3 \
+                                                : ({abort();(spi_dev_t*)0;}))))
+
+#define gpspi_flash_ll_hw_get_id(dev)   ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : (\
+                                          ((dev) == (void*)&GPSPI3) ? SPI3_HOST : (\
+                                          -1 \
+                                        )) )
+
+typedef typeof(GPSPI2.clock) gpspi_flash_ll_clock_reg_t;
+
+//Supported clock register values
+#define GPSPI_FLASH_LL_CLKREG_VAL_5MHZ   ((gpspi_flash_ll_clock_reg_t){.val=0x0000F1CF})   ///< Clock set to 5 MHz
+#define GPSPI_FLASH_LL_CLKREG_VAL_10MHZ  ((gpspi_flash_ll_clock_reg_t){.val=0x000070C7})   ///< Clock set to 10 MHz
+#define GPSPI_FLASH_LL_CLKREG_VAL_20MHZ  ((gpspi_flash_ll_clock_reg_t){.val=0x00003043})   ///< Clock set to 20 MHz
+#define GPSPI_FLASH_LL_CLKREG_VAL_26MHZ  ((gpspi_flash_ll_clock_reg_t){.val=0x00002002})   ///< Clock set to 26 MHz
+#define GPSPI_FLASH_LL_CLKREG_VAL_40MHZ  ((gpspi_flash_ll_clock_reg_t){.val=0x00001001})   ///< Clock set to 40 MHz
+#define GPSPI_FLASH_LL_CLKREG_VAL_80MHZ  ((gpspi_flash_ll_clock_reg_t){.val=0x80000000})   ///< Clock set to 80 MHz
+
+/*------------------------------------------------------------------------------
+ * Control
+ *----------------------------------------------------------------------------*/
+/**
+ * Reset peripheral registers before configuration and starting control.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void gpspi_flash_ll_reset(spi_dev_t *dev)
+{
+    dev->user.val = 0;
+    dev->ctrl.val = 0;
+
+    dev->clk_gate.clk_en = 1;
+    dev->clk_gate.mst_clk_active = 1;
+    dev->clk_gate.mst_clk_sel = 1;
+
+    dev->dma_conf.val = 0;
+    dev->dma_conf.tx_seg_trans_clr_en = 1;
+    dev->dma_conf.rx_seg_trans_clr_en = 1;
+    dev->dma_conf.dma_seg_trans_en = 0;
+}
+
+/**
+ * Check whether the previous operation is done.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ *
+ * @return true if last command is done, otherwise false.
+ */
+static inline bool gpspi_flash_ll_cmd_is_done(const spi_dev_t *dev)
+{
+    return (dev->cmd.usr == 0);
+}
+
+/**
+ * Get the read data from the buffer after ``gpspi_flash_ll_read`` is done.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param buffer Buffer to hold the output data
+ * @param read_len Length to get out of the buffer
+ */
+static inline void gpspi_flash_ll_get_buffer_data(spi_dev_t *dev, void *buffer, uint32_t read_len)
+{
+    if (((intptr_t)buffer % 4 == 0) && (read_len % 4 == 0)) {
+        // If everything is word-aligned, do a faster memcpy
+        memcpy(buffer, (void *)dev->data_buf, read_len);
+    } else {
+        // Otherwise, slow(er) path copies word by word
+        int copy_len = read_len;
+        for (uint32_t i = 0; i < (read_len + 3) / 4; i++) {
+            int word_len = MIN(sizeof(uint32_t), copy_len);
+            uint32_t word = dev->data_buf[i];
+            memcpy(buffer, &word, word_len);
+            buffer = (void *)((intptr_t)buffer + word_len);
+            copy_len -= word_len;
+        }
+    }
+}
+
+/**
+ * Write a word to the data buffer.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param word Data to write at address 0.
+ */
+static inline void gpspi_flash_ll_write_word(spi_dev_t *dev, uint32_t word)
+{
+    dev->data_buf[0] = word;
+}
+
+/**
+ * Set the data to be written in the data buffer.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param buffer Buffer holding the data
+ * @param length Length of data in bytes.
+ */
+static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *buffer, uint32_t length)
+{
+    // Load data registers, word at a time
+    int num_words = (length + 3) / 4;
+    for (int i = 0; i < num_words; i++) {
+        uint32_t word = 0;
+        uint32_t word_len = MIN(length, sizeof(word));
+        memcpy(&word, buffer, word_len);
+        dev->data_buf[i] = word;
+        length -= word_len;
+        buffer = (void *)((intptr_t)buffer + word_len);
+    }
+}
+
+/**
+ * Trigger a user defined transaction. All phases, including command, address, dummy, and the data phases,
+ * should be configured before this is called.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void gpspi_flash_ll_user_start(spi_dev_t *dev)
+{
+    dev->cmd.update = 1;
+    while (dev->cmd.update);
+    dev->cmd.usr = 1;
+}
+
+/**
+ * Set HD pin high when flash work at spi mode.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void gpspi_flash_ll_set_hold_pol(spi_dev_t *dev, uint32_t pol_val)
+{
+    dev->ctrl.hold_pol = pol_val;
+}
+
+/**
+ * Check whether the host is idle to perform new commands.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ *
+ * @return true if the host is idle, otherwise false
+ */
+static inline bool gpspi_flash_ll_host_idle(const spi_dev_t *dev)
+{
+    return dev->cmd.usr == 0;
+}
+
+/**
+ * Set phases for user-defined transaction to read
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void gpspi_flash_ll_read_phase(spi_dev_t *dev)
+{
+    typeof (dev->user) user = {
+        .usr_command = 1,
+        .usr_mosi = 0,
+        .usr_miso = 1,
+        .usr_addr = 1,
+    };
+    dev->user = user;
+}
+/*------------------------------------------------------------------------------
+ * Configs
+ *----------------------------------------------------------------------------*/
+/**
+ * Select which pin to use for the flash
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param pin Pin ID to use, 0-2. Set to other values to disable all the CS pins.
+ */
+static inline void gpspi_flash_ll_set_cs_pin(spi_dev_t *dev, int pin)
+{
+    dev->misc.cs0_dis = (pin == 0) ? 0 : 1;
+    dev->misc.cs1_dis = (pin == 1) ? 0 : 1;
+}
+
+/**
+ * Set the read io mode.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param read_mode I/O mode to use in the following transactions.
+ */
+static inline void gpspi_flash_ll_set_read_mode(spi_dev_t *dev, esp_flash_io_mode_t read_mode)
+{
+    typeof (dev->ctrl) ctrl = dev->ctrl;
+    typeof (dev->user) user = dev->user;
+
+    ctrl.val &= ~(SPI_FCMD_QUAD_M | SPI_FADDR_QUAD_M | SPI_FREAD_QUAD_M | SPI_FCMD_DUAL_M | SPI_FADDR_DUAL_M | SPI_FREAD_DUAL_M);
+    user.val &= ~(SPI_FWRITE_QUAD_M | SPI_FWRITE_DUAL_M);
+
+    switch (read_mode) {
+    case SPI_FLASH_FASTRD:
+        //the default option
+    case SPI_FLASH_SLOWRD:
+        break;
+    case SPI_FLASH_QIO:
+        ctrl.fread_quad = 1;
+        ctrl.faddr_quad = 1;
+        user.fwrite_quad = 1;
+        break;
+    case SPI_FLASH_QOUT:
+        ctrl.fread_quad = 1;
+        user.fwrite_quad = 1;
+        break;
+    case SPI_FLASH_DIO:
+        ctrl.fread_dual = 1;
+        ctrl.faddr_dual = 1;
+        user.fwrite_dual = 1;
+        break;
+    case SPI_FLASH_DOUT:
+        ctrl.fread_dual = 1;
+        user.fwrite_dual = 1;
+        break;
+    default:
+        abort();
+    }
+
+    dev->ctrl = ctrl;
+    dev->user = user;
+}
+
+/**
+ * Set clock frequency to work at.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param clock_val pointer to the clock value to set
+ */
+static inline void gpspi_flash_ll_set_clock(spi_dev_t *dev, gpspi_flash_ll_clock_reg_t *clock_val)
+{
+    dev->clock = *clock_val;
+}
+
+/**
+ * Set the input length, in bits.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param bitlen Length of input, in bits.
+ */
+static inline void gpspi_flash_ll_set_miso_bitlen(spi_dev_t *dev, uint32_t bitlen)
+{
+    dev->user.usr_miso = bitlen > 0;
+    if (bitlen) {
+        dev->ms_dlen.ms_data_bitlen = bitlen - 1;
+    }
+}
+
+/**
+ * Set the output length, in bits (not including command, address and dummy
+ * phases)
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param bitlen Length of output, in bits.
+ */
+static inline void gpspi_flash_ll_set_mosi_bitlen(spi_dev_t *dev, uint32_t bitlen)
+{
+    dev->user.usr_mosi = bitlen > 0;
+    if (bitlen) {
+        dev->ms_dlen.ms_data_bitlen = bitlen - 1;
+    }
+}
+
+/**
+ * Set the command.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param command Command to send
+ * @param bitlen Length of the command
+ */
+static inline void gpspi_flash_ll_set_command(spi_dev_t *dev, uint8_t command, uint32_t bitlen)
+{
+    dev->user.usr_command = 1;
+    typeof(dev->user2) user2 = {
+        .usr_command_value = command,
+        .usr_command_bitlen = (bitlen - 1),
+    };
+    dev->user2 = user2;
+}
+
+/**
+ * Get the address length that is set in register, in bits.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ *
+ */
+static inline int gpspi_flash_ll_get_addr_bitlen(spi_dev_t *dev)
+{
+    return dev->user.usr_addr ? dev->user1.usr_addr_bitlen + 1 : 0;
+}
+
+/**
+ * Set the address length to send, in bits. Should be called before commands that requires the address e.g. erase sector, read, write...
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param bitlen Length of the address, in bits
+ */
+static inline void gpspi_flash_ll_set_addr_bitlen(spi_dev_t *dev, uint32_t bitlen)
+{
+    dev->user1.usr_addr_bitlen = (bitlen - 1);
+    dev->user.usr_addr = bitlen ? 1 : 0;
+}
+
+/**
+ * Set the address to send in user mode. Should be called before commands that requires the address e.g. erase sector, read, write...
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param addr Address to send
+ */
+static inline void gpspi_flash_ll_set_usr_address(spi_dev_t *dev, uint32_t addr, uint32_t bitlen)
+{
+    // The blank region should be all ones
+    uint32_t padding_ones = (bitlen == 32? 0 : UINT32_MAX >> bitlen);
+    dev->addr = (addr << (32 - bitlen)) | padding_ones;
+}
+
+
+/**
+ * Set the address to send. Should be called before commands that requires the address e.g. erase sector, read, write...
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param addr Address to send
+ */
+static inline void gpspi_flash_ll_set_address(spi_dev_t *dev, uint32_t addr)
+{
+    dev->addr = addr;
+}
+
+/**
+ * Set the length of dummy cycles.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param dummy_n Cycles of dummy phases
+ */
+static inline void gpspi_flash_ll_set_dummy(spi_dev_t *dev, uint32_t dummy_n)
+{
+    dev->user.usr_dummy = dummy_n ? 1 : 0;
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user1, usr_dummy_cyclelen, dummy_n - 1)
+}
+
+/**
+ * Set D/Q output level during dummy phase
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param out_en whether to enable IO output for dummy phase
+ * @param out_level dummy output level
+ */
+static inline void gpspi_flash_ll_set_dummy_out(spi_dev_t *dev, uint32_t out_en, uint32_t out_lev)
+{
+    dev->ctrl.dummy_out = out_en;
+    dev->ctrl.q_pol = out_lev;
+    dev->ctrl.d_pol = out_lev;
+}
+
+/**
+ * Set extra hold time of CS after the clocks.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param hold_n Cycles of clocks before CS is inactive
+ */
+static inline void gpspi_flash_ll_set_hold(spi_dev_t *dev, uint32_t hold_n)
+{
+    dev->user1.cs_hold_time = hold_n - 1;
+    dev->user.cs_hold = (hold_n > 0? 1: 0);
+}
+
+static inline void gpspi_flash_ll_set_cs_setup(spi_dev_t *dev, uint32_t cs_setup_time)
+{
+    dev->user.cs_setup = (cs_setup_time > 0 ? 1 : 0);
+    dev->user1.cs_setup_time = cs_setup_time - 1;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/hmac_hal.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/hmac_hal.h
new file mode 100644
index 00000000000..af6fb65af4f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/hmac_hal.h
@@ -0,0 +1,101 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use it in application code.
+ * See readme.md in soc/include/hal/readme.md
+ ******************************************************************************/
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The HMAC peripheral can be configured to deliver its output to the user directly, or to deliver
+ * the output directly to another peripheral instead, e.g. the Digital Signature peripheral.
+ */
+typedef enum {
+    HMAC_OUTPUT_USER = 0,           /**< Let user provide a message and read the HMAC result */
+    HMAC_OUTPUT_DS = 1,             /**< HMAC is provided to the DS peripheral to decrypt DS private key parameters */
+    HMAC_OUTPUT_JTAG_ENABLE = 2,    /**< HMAC is used to enable JTAG after soft-disabling it */
+    HMAC_OUTPUT_ALL = 3             /**< HMAC is used for both as DS input for or enabling JTAG */
+} hmac_hal_output_t;
+
+/**
+ * @brief Make the peripheral ready for use.
+ *
+ * This triggers any further steps necessary after enabling the device
+ */
+void hmac_hal_start(void);
+
+/**
+ * @brief Configure which hardware key slot should be used and configure the target of the HMAC output.
+ *
+ * @note Writing out-of-range values is undefined behavior. The user has to ensure that the parameters are in range.
+ *
+ * @param config The target of the HMAC. Possible targets are described in \c hmac_hal_output_t.
+ * See the ESP32S3 TRM for more details.
+ * @param key_id The ID of the hardware key slot to be used.
+ *
+ * @return 0 if the configuration was successful, non-zero if not.
+ * An unsuccessful configuration means that the purpose value in the eFuse of the corresponding key slot
+ * doesn't match to supplied value of \c config.
+ */
+uint32_t hmac_hal_configure(hmac_hal_output_t config, uint32_t key_id);
+
+/**
+ * @brief Write a padded single-block message of 512 bits to the HMAC peripheral.
+ *
+ * The message must not be longer than one block (512 bits) and the padding has to be applied by software before
+ * writing. The padding has to be able to fit into the block after the message.
+ * For more information on HMAC padding, see the ESP32S3 TRM.
+ */
+void hmac_hal_write_one_block_512(const void *block);
+
+/**
+ * @brief Write a message block of 512 bits to the HMAC peripheral.
+ *
+ * This function must be used incombination with \c hmac_hal_next_block_normal() or \c hmac_hal_next_block_padding().
+ * The first message block is written without any prerequisite.
+ * All message blocks which are not the last one, need a call to \c hmac_hal_next_block_normal() before, indicating
+ * to the hardware that a "normal", i.e. non-padded block will follow. This is even the case for a block which begins
+ * padding already but where the padding doesn't fit in (remaining message size > (block size - padding size)).
+ * Before writing the last block which contains the padding, a call to \c hmac_hal_next_block_padding() is necessary
+ * to indicate to the hardware that a block with padding will be written.
+ *
+ * For more information on HMAC padding, see the ESP32S3 TRM.
+ */
+void hmac_hal_write_block_512(const void *block);
+
+/**
+ * @brief Indicate to the hardware that a normal block will be written.
+ */
+void hmac_hal_next_block_normal(void);
+
+/**
+ * @brief Indicate to the hardware that a block with padding will be written.
+ */
+void hmac_hal_next_block_padding(void);
+
+/**
+ * @brief Read the 256 bit HMAC result from the hardware.
+ */
+void hmac_hal_read_result_256(void *result);
+
+/**
+ * @brief Clear (invalidate) the HMAC result provided to other hardware.
+ */
+void hmac_hal_clean(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/hmac_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/hmac_ll.h
new file mode 100644
index 00000000000..a4cfb68830c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/hmac_ll.h
@@ -0,0 +1,187 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use it in application code.
+ * See readme.md in soc/include/hal/readme.md
+ ******************************************************************************/
+
+#pragma once
+
+#include "soc/hwcrypto_reg.h"
+
+#define SHA256_BLOCK_SZ 64
+#define SHA256_DIGEST_SZ 32
+
+#define HMAC_LL_EFUSE_KEY_PURPOSE_DOWN_JTAG 6
+#define HMAC_LL_EFUSE_KEY_PURPOSE_DOWN_DIGITAL_SIGNATURE 7
+#define HMAC_LL_EFUSE_KEY_PURPOSE_UP 8
+#define HMAC_LL_EFUSE_KEY_PURPOSE_DOWN_ALL 5
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Makes the peripheral ready for use, after enabling it.
+ */
+static inline void hmac_ll_start(void)
+{
+    REG_WRITE(HMAC_SET_START_REG, 1);
+}
+
+/**
+ * @brief Determine where the HMAC output should go.
+ *
+ * The HMAC peripheral can be configured to deliver its output to the user directly, or to deliver
+ * the output directly to another peripheral instead, e.g. the Digital Signature peripheral.
+ */
+static inline void hmac_ll_config_output(hmac_hal_output_t config)
+{
+    switch(config) {
+    case HMAC_OUTPUT_USER:
+        REG_WRITE(HMAC_SET_PARA_PURPOSE_REG, HMAC_LL_EFUSE_KEY_PURPOSE_UP);
+        break;
+    case HMAC_OUTPUT_DS:
+        REG_WRITE(HMAC_SET_PARA_PURPOSE_REG, HMAC_LL_EFUSE_KEY_PURPOSE_DOWN_DIGITAL_SIGNATURE);
+        break;
+    case HMAC_OUTPUT_JTAG_ENABLE:
+        REG_WRITE(HMAC_SET_PARA_PURPOSE_REG, HMAC_LL_EFUSE_KEY_PURPOSE_DOWN_JTAG);
+        break;
+    case HMAC_OUTPUT_ALL:
+        REG_WRITE(HMAC_SET_PARA_PURPOSE_REG, HMAC_LL_EFUSE_KEY_PURPOSE_DOWN_ALL);
+        break;
+    default:
+        ; // do nothing, error will be indicated by hmac_hal_config_error()
+    }
+}
+
+/**
+ * @brief Selects which hardware key should be used.
+ */
+static inline void hmac_ll_config_hw_key_id(uint32_t key_id)
+{
+    REG_WRITE(HMAC_SET_PARA_KEY_REG, key_id);
+}
+
+/**
+ * @brief Apply and check configuration.
+ *
+ * Afterwards, the configuration can be checked for errors with hmac_hal_config_error().
+ */
+static inline void hmac_ll_config_finish(void)
+{
+    REG_WRITE(HMAC_SET_PARA_FINISH_REG, 1);
+}
+
+/**
+ *
+ * @brief Query HMAC error state after configuration actions.
+ *
+ * @return
+ *  - 1 or greater on error
+ *  - 0 on success
+ */
+static inline uint32_t hmac_ll_query_config_error(void)
+{
+    return REG_READ(HMAC_QUERY_ERROR_REG);
+}
+
+/**
+ * Wait until the HAL is ready for the next interaction.
+ */
+static inline void hmac_ll_wait_idle(void)
+{
+    uint32_t query;
+    do {
+        query = REG_READ(HMAC_QUERY_BUSY_REG);
+    } while(query != 0);
+}
+
+/**
+ * @brief Write a message block of 512 bits to the HMAC peripheral.
+ */
+static inline void hmac_ll_write_block_512(const uint32_t *block)
+{
+    const size_t REG_WIDTH = sizeof(uint32_t);
+    for (size_t i = 0; i < SHA256_BLOCK_SZ / REG_WIDTH; i++) {
+        REG_WRITE(HMAC_WDATA_BASE + (i * REG_WIDTH), block[i]);
+    }
+
+    REG_WRITE(HMAC_SET_MESSAGE_ONE_REG, 1);
+}
+
+/**
+ * @brief Read the 256 bit HMAC.
+ */
+static inline void hmac_ll_read_result_256(uint32_t *result)
+{
+    const size_t REG_WIDTH = sizeof(uint32_t);
+    for (size_t i = 0; i < SHA256_DIGEST_SZ / REG_WIDTH; i++) {
+        result[i] = REG_READ(HMAC_RDATA_BASE + (i * REG_WIDTH));
+    }
+}
+
+/**
+ * @brief Clean the HMAC result provided to other hardware.
+ */
+static inline void hmac_ll_clean(void)
+{
+    REG_WRITE(HMAC_SET_INVALIDATE_DS_REG, 1);
+    REG_WRITE(HMAC_SET_INVALIDATE_JTAG_REG, 1);
+}
+
+/**
+ * @brief Signals that the following block will be the padded last block.
+ */
+static inline void hmac_ll_msg_padding(void)
+{
+    REG_WRITE(HMAC_SET_MESSAGE_PAD_REG, 1);
+}
+
+/**
+ * @brief Signals that all blocks have been written and a padding block will automatically be applied by hardware.
+ *
+ * Only applies if the message length is a multiple of 512 bits.
+ * See ESP32S3 TRM HMAC chapter for more details.
+ */
+static inline void hmac_ll_msg_end(void)
+{
+    REG_WRITE(HMAC_SET_MESSAGE_END_REG, 1);
+}
+
+/**
+ * @brief The message including padding fits into one block, so no further action needs to be taken.
+ *
+ * This is called after the one-block-message has been written.
+ */
+static inline void hmac_ll_msg_one_block(void)
+{
+    REG_WRITE(HMAC_ONE_BLOCK_REG, 1);
+}
+
+/**
+ * @brief Indicate that more blocks will be written after the last block.
+ */
+static inline void hmac_ll_msg_continue(void)
+{
+    REG_WRITE(HMAC_SET_MESSAGE_ING_REG, 1);
+}
+
+/**
+ * @brief Clear the HMAC result.
+ *
+ * Use this after reading the HMAC result or if aborting after any of the other steps above.
+ */
+static inline void hmac_ll_calc_finish(void)
+{
+    REG_WRITE(HMAC_SET_RESULT_FINISH_REG, 2);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/i2c_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/i2c_ll.h
new file mode 100644
index 00000000000..eae2a660fbc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/i2c_ll.h
@@ -0,0 +1,909 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// The LL layer for I2C register operations
+
+#pragma once
+
+#include "hal/misc.h"
+#include "soc/i2c_periph.h"
+#include "soc/soc_caps.h"
+#include "soc/i2c_struct.h"
+#include "hal/i2c_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define I2C_LL_INTR_MASK          (0x3fff) /*!< I2C all interrupt bitmap */
+/**
+ * @brief I2C hardware cmd register fields.
+ */
+typedef union {
+    struct {
+        uint32_t byte_num:    8,
+                 ack_en:      1,
+                 ack_exp:     1,
+                 ack_val:     1,
+                 op_code:     3,
+                 reserved14: 17,
+                 done:        1;
+    };
+    uint32_t val;
+} i2c_hw_cmd_t;
+
+/**
+ * @brief I2C interrupt event
+ */
+typedef enum {
+    I2C_INTR_EVENT_ERR,
+    I2C_INTR_EVENT_ARBIT_LOST,   /*!< I2C arbition lost event */
+    I2C_INTR_EVENT_NACK,         /*!< I2C NACK event */
+    I2C_INTR_EVENT_TOUT,         /*!< I2C time out event */
+    I2C_INTR_EVENT_END_DET,      /*!< I2C end detected event */
+    I2C_INTR_EVENT_TRANS_DONE,   /*!< I2C trans done event */
+    I2C_INTR_EVENT_RXFIFO_FULL,  /*!< I2C rxfifo full event */
+    I2C_INTR_EVENT_TXFIFO_EMPTY, /*!< I2C txfifo empty event */
+} i2c_intr_event_t;
+
+/**
+ * @brief Data structure for calculating I2C bus timing.
+ */
+typedef struct {
+    uint16_t clkm_div;          /*!< I2C core clock divider */
+    uint16_t scl_low;           /*!< I2C scl low period */
+    uint16_t scl_high;          /*!< I2C scl hight period */
+    uint16_t scl_wait_high;     /*!< I2C scl wait_high period */
+    uint16_t sda_hold;          /*!< I2C scl low period */
+    uint16_t sda_sample;        /*!< I2C sda sample time */
+    uint16_t setup;             /*!< I2C start and stop condition setup period */
+    uint16_t hold;              /*!< I2C start and stop condition hold period  */
+    uint16_t tout;              /*!< I2C bus timeout period */
+} i2c_clk_cal_t;
+
+// I2C operation mode command
+#define I2C_LL_CMD_RESTART    6    /*!<I2C restart command */
+#define I2C_LL_CMD_WRITE      1    /*!<I2C write command */
+#define I2C_LL_CMD_READ       3    /*!<I2C read command */
+#define I2C_LL_CMD_STOP       2    /*!<I2C stop command */
+#define I2C_LL_CMD_END        4    /*!<I2C end command */
+
+// Get the I2C hardware instance
+#define I2C_LL_GET_HW(i2c_num)        (((i2c_num) == 0) ? &I2C0 : &I2C1)
+// Get the I2C hardware FIFO address
+#define I2C_LL_GET_FIFO_ADDR(i2c_num) (I2C_DATA_APB_REG(i2c_num))
+// I2C master TX interrupt bitmap
+#define I2C_LL_MASTER_TX_INT          (I2C_NACK_INT_ENA_M|I2C_TIME_OUT_INT_ENA_M|I2C_TRANS_COMPLETE_INT_ENA_M|I2C_ARBITRATION_LOST_INT_ENA_M|I2C_END_DETECT_INT_ENA_M)
+// I2C master RX interrupt bitmap
+#define I2C_LL_MASTER_RX_INT          (I2C_TIME_OUT_INT_ENA_M|I2C_TRANS_COMPLETE_INT_ENA_M|I2C_ARBITRATION_LOST_INT_ENA_M|I2C_END_DETECT_INT_ENA_M)
+// I2C slave TX interrupt bitmap
+#define I2C_LL_SLAVE_TX_INT           (I2C_TXFIFO_WM_INT_ENA_M)
+// I2C slave RX interrupt bitmap
+#define I2C_LL_SLAVE_RX_INT           (I2C_RXFIFO_WM_INT_ENA_M | I2C_TRANS_COMPLETE_INT_ENA_M)
+// I2C source clock
+#define I2C_LL_CLK_SRC_FREQ(src_clk)  (((src_clk) == I2C_SCLK_RTC) ? 8*1000*1000 : 40*1000*1000); // Another clock is XTAL clock
+// I2C max timeout value
+#define I2C_LL_MAX_TIMEOUT I2C_TIME_OUT_VALUE_V
+
+/**
+ * @brief  Calculate I2C bus frequency
+ *         Note that the clock accuracy is affected by the external pull-up resistor,
+ *         here we try to to calculate a configuration parameter which is close to the required clock.
+ *         But in I2C communication, the clock accuracy is not very concerned.
+ *
+ * @param  source_clk I2C source clock
+ * @param  bus_freq I2C bus frequency
+ * @param  clk_cal Pointer to accept the clock configuration
+ *
+ * @return None
+ */
+static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2c_clk_cal_t *clk_cal)
+{
+    uint32_t clkm_div = source_clk / (bus_freq * 1024) +1;
+    uint32_t sclk_freq = source_clk / clkm_div;
+    uint32_t half_cycle = sclk_freq / bus_freq / 2;
+    //SCL
+    clk_cal->clkm_div = clkm_div;
+    clk_cal->scl_low = half_cycle;
+    // default, scl_wait_high < scl_high
+    clk_cal->scl_high = (bus_freq <= 50000) ?  half_cycle : (half_cycle / 5 * 4 + 4);
+    clk_cal->scl_wait_high = half_cycle - clk_cal->scl_high;
+    clk_cal->sda_hold = half_cycle / 2;
+    // scl_wait_high < sda_sample <= scl_high
+    clk_cal->sda_sample = half_cycle / 2;
+    clk_cal->setup = half_cycle;
+    clk_cal->hold = half_cycle;
+    //default we set the timeout value to about 10 bus cycles
+    // log(20*half_cycle)/log(2) = log(half_cycle)/log(2) +  log(20)/log(2)
+    clk_cal->tout = (int)(sizeof(half_cycle) * 8 - __builtin_clz(5 * half_cycle)) + 2;
+}
+
+/**
+ * @brief  Update I2C configuration
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_update(i2c_dev_t *hw)
+{
+    hw->ctr.conf_upgate = 1;
+}
+
+/**
+ * @brief  Configure the I2C bus timing related register.
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  bus_cfg Pointer to the data structure holding the register configuration.
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_bus_timing(i2c_dev_t *hw, i2c_clk_cal_t *bus_cfg)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->clk_conf, sclk_div_num, bus_cfg->clkm_div - 1);
+    //scl period
+    hw->scl_low_period.scl_low_period = bus_cfg->scl_low - 1;
+    hw->scl_high_period.scl_high_period = bus_cfg->scl_high;
+    //sda sample
+    hw->sda_hold.sda_hold_time = bus_cfg->sda_hold;
+    hw->sda_sample.sda_sample_time = bus_cfg->sda_sample;
+    //setup
+    hw->scl_rstart_setup.scl_rstart_setup_time = bus_cfg->setup;
+    hw->scl_stop_setup.scl_stop_setup_time = bus_cfg->setup;
+    //hold
+    hw->scl_start_hold.scl_start_hold_time = bus_cfg->hold - 1;
+    hw->scl_stop_hold.scl_stop_hold_time = bus_cfg->hold;
+    hw->to.time_out_value = bus_cfg->tout;
+    hw->to.time_out_en = 1;
+}
+
+/**
+ * @brief  Reset I2C txFIFO
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_txfifo_rst(i2c_dev_t *hw)
+{
+    hw->fifo_conf.tx_fifo_rst = 1;
+    hw->fifo_conf.tx_fifo_rst = 0;
+}
+
+/**
+ * @brief  Reset I2C rxFIFO
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_rxfifo_rst(i2c_dev_t *hw)
+{
+    hw->fifo_conf.rx_fifo_rst = 1;
+    hw->fifo_conf.rx_fifo_rst = 0;
+}
+
+/**
+ * @brief  Configure I2C SCL timing
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  high_period The I2C SCL hight period (in core clock cycle, hight_period > 2)
+ * @param  low_period The I2C SCL low period (in core clock cycle, low_period > 1)
+ *
+ * @return None.
+ */
+static inline void i2c_ll_set_scl_timing(i2c_dev_t *hw, int high_period, int low_period)
+{
+    int high_period_output = high_period - 10; // The rising edge by open-drain output + internal pullup (about 50K) is slow
+    hw->scl_low_period.scl_low_period = low_period - 1;
+    hw->scl_high_period.scl_high_period = high_period_output;
+    hw->scl_high_period.scl_wait_high_period = high_period - high_period_output;
+}
+
+/**
+ * @brief  Clear I2C interrupt status
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  mask Interrupt mask needs to be cleared
+ *
+ * @return None
+ */
+static inline void i2c_ll_clr_intsts_mask(i2c_dev_t *hw, uint32_t mask)
+{
+    hw->int_clr.val = mask;
+}
+
+/**
+ * @brief  Enable I2C interrupt
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  mask Interrupt mask needs to be enabled
+ *
+ * @return None
+ */
+static inline void i2c_ll_enable_intr_mask(i2c_dev_t *hw, uint32_t mask)
+{
+    hw->int_ena.val |= mask;
+}
+
+/**
+ * @brief  Disable I2C interrupt
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  mask Interrupt mask needs to be disabled
+ *
+ * @return None
+ */
+static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask)
+{
+    hw->int_ena.val &= (~mask);
+}
+
+/**
+ * @brief  Get I2C interrupt status
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return I2C interrupt status
+ */
+static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw)
+{
+    return hw->int_status.val;
+}
+
+/**
+ * @brief  Configure I2C memory access mode, FIFO mode or non-FIFO mode
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  fifo_mode_en Set true to enable FIFO access mode, else, set it false
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_fifo_mode(i2c_dev_t *hw, bool fifo_mode_en)
+{
+    hw->fifo_conf.nonfifo_en = fifo_mode_en ? 0 : 1;
+}
+
+/**
+ * @brief  Configure I2C timeout
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  tout_num The I2C timeout value needs to be set (2^tout in core clock cycle)
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_tout(i2c_dev_t *hw, int tout)
+{
+    hw->to.time_out_value = tout;
+}
+
+/**
+ * @brief  Configure I2C slave address
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  slave_addr I2C slave address needs to be set
+ * @param  addr_10bit_en Set true to enable 10-bit slave address mode, set false to enable 7-bit address mode
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, bool addr_10bit_en)
+{
+    hw->slave_addr.slave_addr = slave_addr;
+    hw->slave_addr.addr_10bit_en = addr_10bit_en;
+}
+
+/**
+ * @brief Write I2C hardware command register
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  cmd I2C hardware command
+ * @param  cmd_idx The index of the command register, should be less than 16
+ *
+ * @return None
+ */
+static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx)
+{
+    _Static_assert(sizeof(i2c_comd0_reg_t) == sizeof(i2c_hw_cmd_t),
+                   "i2c_comdX_reg_t structure size must be equal to i2c_hw_cmd_t structure size");
+    volatile i2c_hw_cmd_t* commands = (volatile i2c_hw_cmd_t*) &hw->comd0;
+    commands[cmd_idx].val = cmd.val;
+}
+
+/**
+ * @brief Configure I2C start timing
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  start_setup The start condition setup period (in core clock cycle)
+ * @param  start_hold The start condition hold period (in core clock cycle)
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_start_timing(i2c_dev_t *hw, int start_setup, int start_hold)
+{
+    hw->scl_rstart_setup.scl_rstart_setup_time = start_setup;
+    hw->scl_start_hold.scl_start_hold_time = start_hold - 1;
+}
+
+/**
+ * @brief Configure I2C stop timing
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  stop_setup The stop condition setup period (in core clock cycle)
+ * @param  stop_hold The stop condition hold period (in core clock cycle)
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_stop_timing(i2c_dev_t *hw, int stop_setup, int stop_hold)
+{
+    hw->scl_stop_setup.scl_stop_setup_time = stop_setup;
+    hw->scl_stop_hold.scl_stop_hold_time = stop_hold;
+}
+
+/**
+ * @brief Configure I2C stop timing
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  sda_sample The SDA sample time (in core clock cycle)
+ * @param  sda_hold The SDA hold time (in core clock cycle)
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_sda_timing(i2c_dev_t *hw, int sda_sample, int sda_hold)
+{
+    hw->sda_hold.sda_hold_time = sda_hold;
+    hw->sda_sample.sda_sample_time = sda_sample;
+}
+
+/**
+ * @brief  Set I2C txFIFO empty threshold
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  empty_thr The txFIFO empty threshold
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_txfifo_empty_thr(i2c_dev_t *hw, uint8_t empty_thr)
+{
+    hw->fifo_conf.txfifo_wm_thrhd = empty_thr;
+}
+
+/**
+ * @brief  Set I2C rxFIFO full threshold
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  full_thr The rxFIFO full threshold
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_rxfifo_full_thr(i2c_dev_t *hw, uint8_t full_thr)
+{
+    hw->fifo_conf.rxfifo_wm_thrhd = full_thr;
+}
+
+/**
+ * @brief  Set the I2C data mode, LSB or MSB
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  tx_mode Tx data bit mode
+ * @param  rx_mode Rx data bit mode
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_data_mode(i2c_dev_t *hw, i2c_trans_mode_t tx_mode, i2c_trans_mode_t rx_mode)
+{
+    hw->ctr.tx_lsb_first = tx_mode;
+    hw->ctr.rx_lsb_first = rx_mode;
+}
+
+/**
+ * @brief  Get the I2C data mode
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  tx_mode Pointer to accept the received bytes mode
+ * @param  rx_mode Pointer to accept the sended bytes mode
+ *
+ * @return None
+ */
+static inline void i2c_ll_get_data_mode(i2c_dev_t *hw, i2c_trans_mode_t *tx_mode, i2c_trans_mode_t *rx_mode)
+{
+    *tx_mode = hw->ctr.tx_lsb_first;
+    *rx_mode = hw->ctr.rx_lsb_first;
+}
+
+/**
+ * @brief Get I2C sda timing configuration
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  sda_sample Pointer to accept the SDA sample timing configuration
+ * @param  sda_hold Pointer to accept the SDA hold timing configuration
+ *
+ * @return None
+ */
+static inline void i2c_ll_get_sda_timing(i2c_dev_t *hw, int *sda_sample, int *sda_hold)
+{
+    *sda_hold = hw->sda_hold.sda_hold_time;
+    *sda_sample = hw->sda_sample.sda_sample_time;
+}
+
+/**
+ * @brief Get the I2C hardware version
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return The I2C hardware version
+ */
+static inline uint32_t i2c_ll_get_hw_version(i2c_dev_t *hw)
+{
+    return hw->date.val;
+}
+
+/**
+ * @brief  Check if the I2C bus is busy
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return True if I2C state machine is busy, else false will be returned
+ */
+static inline bool i2c_ll_is_bus_busy(i2c_dev_t *hw)
+{
+    return hw->sr.bus_busy;
+}
+
+/**
+ * @brief  Check if I2C is master mode
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return True if I2C is master mode, else false will be returned
+ */
+static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw)
+{
+    return hw->ctr.ms_mode;
+}
+
+/**
+ * @brief Get the rxFIFO readable length
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return RxFIFO readable length
+ */
+static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
+{
+    return hw->sr.rxfifo_cnt;
+}
+
+/**
+ * @brief  Get I2C txFIFO writable length
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return TxFIFO writable length
+ */
+static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw)
+{
+    return SOC_I2C_FIFO_LEN - hw->sr.txfifo_cnt;
+}
+
+/**
+ * @brief Get I2C timeout configuration
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return The I2C timeout value
+ */
+static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw)
+{
+    return hw->to.time_out_value;
+}
+
+/**
+ * @brief  Start I2C transfer
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_trans_start(i2c_dev_t *hw)
+{
+    hw->ctr.trans_start = 1;
+}
+
+/**
+ * @brief Get I2C start timing configuration
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  setup_time Pointer to accept the start condition setup period
+ * @param  hold_time Pointer to accept the start condition hold period
+ *
+ * @return None
+ */
+static inline void i2c_ll_get_start_timing(i2c_dev_t *hw, int *setup_time, int *hold_time)
+{
+    *setup_time = hw->scl_rstart_setup.scl_rstart_setup_time;
+    *hold_time = hw->scl_start_hold.scl_start_hold_time + 1;
+}
+
+/**
+ * @brief  Get I2C stop timing configuration
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  setup_time Pointer to accept the stop condition setup period
+ * @param  hold_time Pointer to accept the stop condition hold period
+ *
+ * @return None
+ */
+static inline void i2c_ll_get_stop_timing(i2c_dev_t *hw, int *setup_time, int *hold_time)
+{
+    *setup_time = hw->scl_stop_setup.scl_stop_setup_time;
+    *hold_time = hw->scl_stop_hold.scl_stop_hold_time;
+}
+
+/**
+ * @brief  Get I2C SCL timing configuration
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  high_period Pointer to accept the SCL high period
+ * @param  low_period Pointer to accept the SCL low period
+ *
+ * @return None
+ */
+static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *low_period)
+{
+    *high_period = hw->scl_high_period.scl_high_period + hw->scl_high_period.scl_wait_high_period;
+    *low_period = hw->scl_low_period.scl_low_period + 1;
+}
+
+/**
+ * @brief  Write the I2C hardware txFIFO
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  ptr Pointer to data buffer
+ * @param  len Amount of data needs to be writen
+ *
+ * @return None.
+ */
+static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
+{
+    for (int i = 0; i< len; i++) {
+        HAL_FORCE_MODIFY_U32_REG_FIELD(hw->data, fifo_rdata, ptr[i]);
+    }
+}
+
+/**
+ * @brief  Read the I2C hardware rxFIFO
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  ptr Pointer to data buffer
+ * @param  len Amount of data needs read
+ *
+ * @return None
+ */
+static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
+{
+    for(int i = 0; i < len; i++) {
+        ptr[i] = HAL_FORCE_READ_U32_REG_FIELD(hw->data, fifo_rdata);
+    }
+}
+
+/**
+ * @brief  Configure I2C hardware filter
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  filter_num If the glitch period on the line is less than this value, it can be filtered out
+ *                    If `filter_num == 0`, the filter will be disabled
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_filter(i2c_dev_t *hw, uint8_t filter_num)
+{
+    if (filter_num > 0) {
+        hw->filter_cfg.scl_filter_thres = filter_num;
+        hw->filter_cfg.sda_filter_thres = filter_num;
+        hw->filter_cfg.scl_filter_en = 1;
+        hw->filter_cfg.sda_filter_en = 1;
+    } else {
+        hw->filter_cfg.scl_filter_en = 0;
+        hw->filter_cfg.sda_filter_en = 0;
+    }
+}
+
+/**
+ * @brief  Get I2C hardware filter configuration
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return The hardware filter configuration
+ */
+static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw)
+{
+    return hw->filter_cfg.scl_filter_thres;
+}
+
+/**
+ * @brief  Enable I2C master TX interrupt
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
+{
+    hw->int_clr.val = ~0;
+    hw->int_ena.val =  I2C_LL_MASTER_TX_INT;
+}
+
+/**
+ * @brief  Enable I2C master RX interrupt
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
+{
+    hw->int_clr.val = ~0;
+    hw->int_ena.val = I2C_LL_MASTER_RX_INT;
+}
+
+/**
+ * @brief  Disable I2C master TX interrupt
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw)
+{
+    hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT);
+}
+
+/**
+ * @brief  Disable I2C master RX interrupt
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw)
+{
+    hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT);
+}
+
+/**
+ * @brief  Clear I2C master TX interrupt status register
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw)
+{
+    hw->int_clr.val = I2C_LL_MASTER_TX_INT;
+}
+
+/**
+ * @brief  Clear I2C master RX interrupt status register
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw)
+{
+    hw->int_clr.val = I2C_LL_MASTER_RX_INT;
+}
+
+/**
+ * @brief
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_slave_enable_tx_it(i2c_dev_t *hw)
+{
+    hw->int_ena.val |= I2C_LL_SLAVE_TX_INT;
+}
+
+/**
+ * @brief Enable I2C slave RX interrupt
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw)
+{
+    hw->int_ena.val |= I2C_LL_SLAVE_RX_INT;
+}
+
+/**
+ * @brief Disable I2C slave TX interrupt
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw)
+{
+    hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT);
+}
+
+/**
+ * @brief  Disable I2C slave RX interrupt
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw)
+{
+    hw->int_ena.val &= (~I2C_LL_SLAVE_RX_INT);
+}
+
+/**
+ * @brief  Clear I2C slave TX interrupt status register
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw)
+{
+    hw->int_clr.val = I2C_LL_SLAVE_TX_INT;
+}
+
+/**
+ * @brief Clear I2C slave RX interrupt status register.
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_slave_clr_rx_it(i2c_dev_t *hw)
+{
+    hw->int_clr.val = I2C_LL_SLAVE_RX_INT;
+}
+
+/**
+ * @brief Reste I2C master FSM. When the master FSM is stuck, call this function to reset the FSM
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_master_fsm_rst(i2c_dev_t *hw)
+{
+    hw->ctr.fsm_rst = 1;
+}
+
+/**
+ * @brief Clear I2C bus, when the slave is stuck in a deadlock and keeps pulling the bus low,
+ *        master can controls the SCL bus to generate 9 CLKs.
+ *
+ * Note: The master cannot detect if deadlock happens, but when the scl_st_to interrupt is generated, a deadlock may occur.
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_master_clr_bus(i2c_dev_t *hw)
+{
+    hw->scl_sp_conf.scl_rst_slv_num = 9;
+    hw->scl_sp_conf.scl_rst_slv_en = 0;
+    hw->ctr.conf_upgate = 1;
+    hw->scl_sp_conf.scl_rst_slv_en = 1;
+}
+
+/**
+ * @brief Set I2C source clock
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  src_clk Source clock of the I2C
+ *
+ * @return None
+ */
+static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk)
+{
+    hw->clk_conf.sclk_sel = (src_clk == I2C_SCLK_RTC) ? 1 : 0;
+}
+
+/**
+ * @brief  Get I2C master interrupt event
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  event Pointer to accept the interrupt event
+ *
+ * @return None
+ */
+static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
+{
+    typeof(hw->int_status) int_sts = hw->int_status;
+    if (int_sts.arbitration_lost_int_st) {
+        *event = I2C_INTR_EVENT_ARBIT_LOST;
+    } else if (int_sts.nack_int_st) {
+        *event = I2C_INTR_EVENT_NACK;
+    } else if (int_sts.time_out_int_st) {
+        *event = I2C_INTR_EVENT_TOUT;
+    } else if (int_sts.end_detect_int_st) {
+        *event = I2C_INTR_EVENT_END_DET;
+    } else if (int_sts.trans_complete_int_st) {
+        *event = I2C_INTR_EVENT_TRANS_DONE;
+    } else {
+        *event = I2C_INTR_EVENT_ERR;
+    }
+}
+
+/**
+ * @brief  Get I2C slave interrupt event
+ *
+ * @param  hw Beginning address of the peripheral registers
+ * @param  event Pointer to accept the interrupt event
+ *
+ * @return None
+ */
+static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
+{
+    typeof(hw->int_status) int_sts = hw->int_status;
+    if (int_sts.txfifo_wm_int_st) {
+        *event = I2C_INTR_EVENT_TXFIFO_EMPTY;
+    } else if (int_sts.trans_complete_int_st) {
+        *event = I2C_INTR_EVENT_TRANS_DONE;
+    } else if (int_sts.rxfifo_wm_int_st) {
+        *event = I2C_INTR_EVENT_RXFIFO_FULL;
+    } else {
+        *event = I2C_INTR_EVENT_ERR;
+    }
+}
+
+/**
+ * @brief  Init I2C master
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_master_init(i2c_dev_t *hw)
+{
+    typeof(hw->ctr) ctrl_reg;
+    ctrl_reg.val = 0;
+    ctrl_reg.ms_mode = 1;
+    ctrl_reg.clk_en = 1;
+    ctrl_reg.sda_force_out = 1;
+    ctrl_reg.scl_force_out = 1;
+    hw->ctr.val = ctrl_reg.val;
+}
+
+/**
+ * @brief  Init I2C slave
+ *
+ * @param  hw Beginning address of the peripheral registers
+ *
+ * @return None
+ */
+static inline void i2c_ll_slave_init(i2c_dev_t *hw)
+{
+    typeof(hw->ctr) ctrl_reg;
+    ctrl_reg.val = 0;
+    ctrl_reg.sda_force_out = 1;
+    ctrl_reg.scl_force_out = 1;
+    hw->ctr.val = ctrl_reg.val;
+    hw->ctr.slv_tx_auto_start_en = 1;
+    hw->fifo_conf.fifo_addr_cfg_en = 0;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/i2s_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/i2s_ll.h
new file mode 100644
index 00000000000..c1b3ae7f505
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/i2s_ll.h
@@ -0,0 +1,872 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// The LL layer for I2S register operations
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+#pragma once
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "soc/i2s_periph.h"
+#include "soc/i2s_struct.h"
+#include "hal/i2s_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#define I2S_LL_GET_HW(num) (((num) == 0) ? (&I2S0) : &I2S1)
+
+#define I2S_LL_TDM_CH_MASK (0xffff)
+#define I2S_LL_PDM_BCK_FACTOR          (64)
+#define I2S_LL_BASE_CLK                (2*APB_CLK_FREQ)
+
+#define I2S_LL_MCLK_DIVIDER_BIT_WIDTH  (9)
+#define I2S_LL_MCLK_DIVIDER_MAX        ((1 << I2S_LL_MCLK_DIVIDER_BIT_WIDTH) - 1)
+
+/* I2S clock configuration structure */
+typedef struct {
+    uint16_t mclk_div; // I2S module clock devider, Fmclk = Fsclk /(mclk_div+b/a)
+    uint16_t a;
+    uint16_t b;        // The decimal part of module clock devider, the decimal is: b/a
+} i2s_ll_mclk_div_t;
+
+/**
+ * @brief I2S module general init, enable I2S clock.
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_enable_clock(i2s_dev_t *hw)
+{
+    hw->tx_clkm_conf.clk_en = 1;
+}
+
+/**
+ * @brief I2S module disable I2S clock.
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_disable_clock(i2s_dev_t *hw)
+{
+    hw->tx_clkm_conf.clk_en = 0;
+}
+
+/**
+ * @brief Enable I2S tx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_tx_enable_clock(i2s_dev_t *hw)
+{
+    hw->tx_clkm_conf.tx_clk_active = 1;
+}
+
+/**
+ * @brief Enable I2S rx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_rx_enable_clock(i2s_dev_t *hw)
+{
+    hw->rx_clkm_conf.rx_clk_active = 1;
+}
+
+/**
+ * @brief Disable I2S tx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_tx_disable_clock(i2s_dev_t *hw)
+{
+    hw->tx_clkm_conf.tx_clk_active = 0;
+}
+
+/**
+ * @brief Disable I2S rx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_rx_disable_clock(i2s_dev_t *hw)
+{
+    hw->rx_clkm_conf.rx_clk_active = 0;
+}
+
+/**
+ * @brief I2S mclk use tx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_mclk_use_tx_clk(i2s_dev_t *hw)
+{
+    hw->rx_clkm_conf.mclk_sel = 0;
+}
+
+/**
+ * @brief I2S mclk use rx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_mclk_use_rx_clk(i2s_dev_t *hw)
+{
+    hw->rx_clkm_conf.mclk_sel = 1;
+}
+
+/**
+ * @brief Enable I2S TX slave mode
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param slave_en Set true to enable slave mode
+ */
+static inline void i2s_ll_tx_set_slave_mod(i2s_dev_t *hw, bool slave_en)
+{
+    hw->tx_conf.tx_slave_mod = slave_en;
+}
+
+/**
+ * @brief Enable I2S RX slave mode
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param slave_en Set true to enable slave mode
+ */
+static inline void i2s_ll_rx_set_slave_mod(i2s_dev_t *hw, bool slave_en)
+{
+    hw->rx_conf.rx_slave_mod = slave_en;
+}
+
+/**
+ * @brief Reset I2S TX module
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_tx_reset(i2s_dev_t *hw)
+{
+    hw->tx_conf.tx_reset = 1;
+    hw->tx_conf.tx_reset = 0;
+}
+
+/**
+ * @brief Reset I2S RX module
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_rx_reset(i2s_dev_t *hw)
+{
+    hw->rx_conf.rx_reset = 1;
+    hw->rx_conf.rx_reset = 0;
+}
+
+/**
+ * @brief Reset I2S TX FIFO
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_tx_reset_fifo(i2s_dev_t *hw)
+{
+    hw->tx_conf.tx_fifo_reset = 1;
+    hw->tx_conf.tx_fifo_reset = 0;
+}
+
+/**
+ * @brief Reset I2S RX FIFO
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw)
+{
+    hw->rx_conf.rx_fifo_reset = 1;
+    hw->rx_conf.rx_fifo_reset = 0;
+}
+
+/**
+ * @brief Set TX source clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param src I2S source clock,  ESP32-S3 only support `I2S_CLK_D2CLK`
+ *            TX and RX share the same clock setting
+ */
+static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
+{
+    hw->tx_clkm_conf.tx_clk_sel = 2;
+}
+
+/**
+ * @brief Set RX source clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param src I2S source clock,  ESP32-S3 only support `I2S_CLK_D2CLK`
+ *            TX and RX share the same clock setting
+ */
+static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
+{
+    hw->rx_clkm_conf.rx_clk_sel = 2;
+}
+
+/**
+ * @brief Set I2S tx bck div num
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param val value to set tx bck div num
+ */
+static inline void i2s_ll_tx_set_bck_div_num(i2s_dev_t *hw, uint32_t val)
+{
+    hw->tx_conf1.tx_bck_div_num = val - 1;
+}
+
+/**
+ * @brief Configure I2S TX clock devider
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param set Pointer to I2S clock devider configuration paramater
+ */
+static inline void i2s_ll_tx_set_clk(i2s_dev_t *hw, i2s_ll_mclk_div_t *set)
+{
+    if (set->a == 0 || set->b == 0) {
+        hw->tx_clkm_div_conf.tx_clkm_div_x = 0;
+        hw->tx_clkm_div_conf.tx_clkm_div_y = 0;
+        hw->tx_clkm_div_conf.tx_clkm_div_z = 0;
+    } else {
+        if (set->b > set->a / 2) {
+            hw->tx_clkm_div_conf.tx_clkm_div_x = set->a / (set->a - set->b) - 1;
+            hw->tx_clkm_div_conf.tx_clkm_div_y = set->a % (set->a - set->b);
+            hw->tx_clkm_div_conf.tx_clkm_div_z = set->a - set->b;
+            hw->tx_clkm_div_conf.tx_clkm_div_yn1 = 1;
+        } else {
+            hw->tx_clkm_div_conf.tx_clkm_div_x = set->a / set->b - 1;
+            hw->tx_clkm_div_conf.tx_clkm_div_y = set->a % set->b + 1;
+            hw->tx_clkm_div_conf.tx_clkm_div_z = set->b;
+            hw->tx_clkm_div_conf.tx_clkm_div_yn1 = 0;
+        }
+    }
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->tx_clkm_conf, tx_clkm_div_num, set->mclk_div);
+}
+
+/**
+ * @brief Set I2S rx bck div num
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param val value to set rx bck div num
+ */
+static inline void i2s_ll_rx_set_bck_div_num(i2s_dev_t *hw, uint32_t val)
+{
+    hw->rx_conf1.rx_bck_div_num = val - 1;
+}
+
+/**
+ * @brief Configure I2S RX clock devider
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param set Pointer to I2S clock devider configuration paramater
+ */
+static inline void i2s_ll_rx_set_clk(i2s_dev_t *hw, i2s_ll_mclk_div_t *set)
+{
+    if (set->a == 0 || set->b == 0) {
+        hw->rx_clkm_div_conf.rx_clkm_div_x = 0;
+        hw->rx_clkm_div_conf.rx_clkm_div_y = 0;
+        hw->rx_clkm_div_conf.rx_clkm_div_z = 0;
+    } else {
+        if (set->b > set->a / 2) {
+            hw->rx_clkm_div_conf.rx_clkm_div_x = set->a / (set->a - set->b) - 1;
+            hw->rx_clkm_div_conf.rx_clkm_div_y = set->a % (set->a - set->b);
+            hw->rx_clkm_div_conf.rx_clkm_div_z = set->a - set->b;
+            hw->rx_clkm_div_conf.rx_clkm_div_yn1 = 1;
+        } else {
+            hw->rx_clkm_div_conf.rx_clkm_div_x = set->a / set->b - 1;
+            hw->rx_clkm_div_conf.rx_clkm_div_y = set->a % set->b + 1;
+            hw->rx_clkm_div_conf.rx_clkm_div_z = set->b;
+            hw->rx_clkm_div_conf.rx_clkm_div_yn1 = 0;
+        }
+    }
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->rx_clkm_conf, rx_clkm_div_num, set->mclk_div);
+}
+
+/**
+ * @brief Start I2S TX
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_tx_start(i2s_dev_t *hw)
+{
+    hw->tx_conf.tx_update = 0;
+    hw->tx_conf.tx_update = 1;
+    hw->tx_conf.tx_start = 1;
+}
+
+/**
+ * @brief Start I2S RX
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_rx_start(i2s_dev_t *hw)
+{
+    hw->rx_conf.rx_update = 0;
+    hw->rx_conf.rx_update = 1;
+    hw->rx_conf.rx_start = 1;
+}
+
+/**
+ * @brief Stop I2S TX
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_tx_stop(i2s_dev_t *hw)
+{
+    hw->tx_conf.tx_start = 0;
+}
+
+/**
+ * @brief Stop I2S RX
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_rx_stop(i2s_dev_t *hw)
+{
+    hw->rx_conf.rx_start = 0;
+}
+
+/**
+ * @brief Configure TX WS signal width
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param width WS width in BCK cycle
+ */
+static inline void i2s_ll_tx_set_ws_width(i2s_dev_t *hw, int width)
+{
+    hw->tx_conf1.tx_tdm_ws_width = width - 1;
+}
+
+/**
+ * @brief Configure RX WS signal width
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param width WS width in BCK cycle
+ */
+static inline void i2s_ll_rx_set_ws_width(i2s_dev_t *hw, int width)
+{
+    hw->rx_conf1.rx_tdm_ws_width = width - 1;
+}
+
+/**
+ * @brief Configure the received length to trigger in_suc_eof interrupt
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param eof_num the byte length to trigger in_suc_eof interrupt
+ */
+static inline void i2s_ll_rx_set_eof_num(i2s_dev_t *hw, int eof_num)
+{
+    hw->rx_eof_num.rx_eof_num = eof_num;
+}
+
+/**
+ * @brief Congfigure TX chan bit and audio data bit
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param chan_bit The chan bit width
+ * @param data_bit The audio data bit width
+ */
+static inline void i2s_ll_tx_set_sample_bit(i2s_dev_t *hw, uint8_t chan_bit, int data_bit)
+{
+    hw->tx_conf1.tx_bits_mod = data_bit - 1;
+    hw->tx_conf1.tx_tdm_chan_bits = chan_bit - 1;
+}
+
+/**
+ * @brief Congfigure RX chan bit and audio data bit
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param chan_bit The chan bit width
+ * @param data_bit The audio data bit width
+ */
+static inline void i2s_ll_rx_set_sample_bit(i2s_dev_t *hw, uint8_t chan_bit, int data_bit)
+{
+    hw->rx_conf1.rx_bits_mod = data_bit - 1;
+    hw->rx_conf1.rx_tdm_chan_bits = chan_bit - 1;
+}
+
+/**
+ * @brief Configure RX half_sample_bit
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param half_sample_bits half sample bit width
+ */
+static inline void i2s_ll_tx_set_half_sample_bit(i2s_dev_t *hw, int half_sample_bits)
+{
+    hw->tx_conf1.tx_half_sample_bits = half_sample_bits - 1;
+}
+
+/**
+ * @brief Configure RX half_sample_bit
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param half_sample_bits half sample bit width
+ */
+static inline void i2s_ll_rx_set_half_sample_bit(i2s_dev_t *hw, int half_sample_bits)
+{
+    hw->rx_conf1.rx_half_sample_bits = half_sample_bits - 1;
+}
+
+/**
+ * @brief Enable TX MSB shift, the data will be launch at the first BCK clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param msb_shift_enable Set true to enable MSB shift
+ */
+static inline void i2s_ll_tx_enable_msb_shift(i2s_dev_t *hw, bool msb_shift_enable)
+{
+    hw->tx_conf1.tx_msb_shift = msb_shift_enable;
+}
+
+/**
+ * @brief Enable RX MSB shift, the data will be launch at the first BCK clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param msb_shift_enable Set true to enable MSB shift
+ */
+static inline void i2s_ll_rx_enable_msb_shift(i2s_dev_t *hw, bool msb_shift_enable)
+{
+    hw->rx_conf1.rx_msb_shift = msb_shift_enable;
+}
+
+/**
+ * @brief Configure TX total chan number
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param total_num Total chan number
+ */
+static inline void i2s_ll_tx_set_chan_num(i2s_dev_t *hw, int total_num)
+{
+    hw->tx_tdm_ctrl.tx_tdm_tot_chan_num = total_num - 1;
+}
+
+/**
+ * @brief Configure RX total chan number
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param total_num Total chan number
+ */
+static inline void i2s_ll_rx_set_chan_num(i2s_dev_t *hw, int total_num)
+{
+    hw->rx_tdm_ctrl.rx_tdm_tot_chan_num = total_num - 1;
+}
+
+/**
+ * @brief Set the bimap of the active TX chan, only the active chan can launch audio data.
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param chan_mask mask of tx active chan
+ */
+static inline void i2s_ll_tx_set_active_chan_mask(i2s_dev_t *hw, uint32_t chan_mask)
+{
+    typeof(hw->tx_tdm_ctrl) tdm_ctrl_reg = hw->tx_tdm_ctrl;
+    tdm_ctrl_reg.val &= ~I2S_LL_TDM_CH_MASK;
+    tdm_ctrl_reg.val |= chan_mask & I2S_LL_TDM_CH_MASK;
+    hw->tx_tdm_ctrl.val = tdm_ctrl_reg.val;
+}
+
+/**
+ * @brief Set the bimap of the active RX chan, only the active chan can receive audio data.
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param chan_mask mask of rx active chan
+ */
+static inline void i2s_ll_rx_set_active_chan_mask(i2s_dev_t *hw, uint32_t chan_mask)
+{
+    typeof(hw->rx_tdm_ctrl) tdm_ctrl_reg = hw->rx_tdm_ctrl;
+    tdm_ctrl_reg.val &= ~I2S_LL_TDM_CH_MASK;
+    tdm_ctrl_reg.val |= chan_mask & I2S_LL_TDM_CH_MASK;
+    hw->rx_tdm_ctrl.val = tdm_ctrl_reg.val;
+}
+
+/**
+ * @brief Set TX WS signal pol level
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param ws_pol_level pin level of WS(output) when receiving left channel data
+ */
+static inline void i2s_ll_tx_set_ws_idle_pol(i2s_dev_t *hw, bool ws_pol_level)
+{
+    hw->tx_conf.tx_ws_idle_pol = ws_pol_level;
+}
+
+/**
+ * @brief Set RX WS signal pol level
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param ws_pol_level pin level of WS(input) when receiving left channel data
+ */
+static inline void i2s_ll_rx_set_ws_idle_pol(i2s_dev_t *hw, bool ws_pol_level)
+{
+    hw->rx_conf.rx_ws_idle_pol = ws_pol_level;
+}
+
+/**
+ * @brief Enable TX PDM mode.
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param pdm_enable Set true to TX enable PDM mode
+ */
+static inline void i2s_ll_tx_enable_pdm(i2s_dev_t *hw, bool pdm_enable)
+{
+    hw->tx_conf.tx_pdm_en = pdm_enable;
+    hw->tx_conf.tx_tdm_en = !pdm_enable;
+    hw->tx_pcm2pdm_conf.pcm2pdm_conv_en = pdm_enable;
+}
+
+/**
+ * @brief Enable RX PDM mode.
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param pdm_enable Set true to RX enable PDM mode
+ */
+static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_enable)
+{
+    hw->rx_conf.rx_pdm_en = pdm_enable;
+    hw->rx_conf.rx_tdm_en = !pdm_enable;
+    hw->rx_conf.rx_pdm2pcm_en = pdm_enable;
+}
+
+/**
+ * @brief Configure I2S TX PDM sample rate
+ *        Fpdm = 64*Fpcm*fp/fs
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param fp The fp value of TX PDM filter module group0.
+ * @param fs The fs value of TX PDM filter module group0.
+ */
+static inline void i2s_ll_tx_set_pdm_fpfs(i2s_dev_t *hw, uint32_t fp, uint32_t fs)
+{
+    hw->tx_pcm2pdm_conf1.tx_pdm_fp = fp;
+    hw->tx_pcm2pdm_conf1.tx_pdm_fs = fs;
+    hw->tx_pcm2pdm_conf.tx_sinc_osr2 = fp / fs;
+}
+
+/**
+ * @brief Get I2S TX PDM fp configuration paramater
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @return
+ *        - fp configuration paramater
+ */
+static inline uint32_t i2s_ll_tx_get_pdm_fp(i2s_dev_t *hw)
+{
+    return hw->tx_pcm2pdm_conf1.tx_pdm_fp;
+}
+
+/**
+ * @brief Get I2S TX PDM fs configuration paramater
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @return
+ *        - fs configuration paramater
+ */
+static inline uint32_t i2s_ll_tx_get_pdm_fs(i2s_dev_t *hw)
+{
+    return hw->tx_pcm2pdm_conf1.tx_pdm_fs;
+}
+
+/**
+ * @brief Set I2S TX PDM prescale
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param prescale I2S TX PDM prescale
+ */
+static inline void i2s_ll_tx_set_pdm_prescale(i2s_dev_t *hw, bool prescale)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->tx_pcm2pdm_conf, tx_prescale, prescale);
+}
+
+/**
+ * @brief Set I2S TX PDM high pass filter scaling
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param sig_scale I2S TX PDM signal scaling before transmit to the filter
+ */
+static inline void i2s_ll_tx_set_pdm_hp_scale(i2s_dev_t *hw, i2s_pdm_sig_scale_t sig_scale)
+{
+    hw->tx_pcm2pdm_conf.tx_hp_in_shift = sig_scale;
+}
+
+/**
+ * @brief Set I2S TX PDM low pass filter scaling
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param sig_scale I2S TX PDM signal scaling before transmit to the filter
+ */
+static inline void i2s_ll_tx_set_pdm_lp_scale(i2s_dev_t *hw, i2s_pdm_sig_scale_t sig_scale)
+{
+    hw->tx_pcm2pdm_conf.tx_lp_in_shift = sig_scale;
+}
+
+/**
+ * @brief Set I2S TX PDM sinc filter scaling
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param sig_scale I2S TX PDM signal scaling before transmit to the filter
+ */
+static inline void i2s_ll_tx_set_pdm_sinc_scale(i2s_dev_t *hw, i2s_pdm_sig_scale_t sig_scale)
+{
+    hw->tx_pcm2pdm_conf.tx_sinc_in_shift = sig_scale;
+}
+
+/**
+ * @brief Set I2S TX PDM sigma-delta filter scaling
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param sig_scale I2S TX PDM signal scaling before transmit to the filter
+ */
+static inline void i2s_ll_tx_set_pdm_sd_scale(i2s_dev_t *hw, i2s_pdm_sig_scale_t sig_scale)
+{
+    hw->tx_pcm2pdm_conf.tx_sigmadelta_in_shift = sig_scale;
+}
+
+/**
+ * @brief Set I2S TX PDM high pass filter param0
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param param The fourth parameter of PDM TX IIR_HP filter stage 1 is (504 + I2S_TX_IIR_HP_MULT12_0[2:0])
+ */
+static inline void i2s_ll_tx_set_pdm_hp_filter_param0(i2s_dev_t *hw, uint32_t param)
+{
+    hw->tx_pcm2pdm_conf1.tx_iir_hp_mult12_0 = param;
+}
+
+/**
+ * @brief Set I2S TX PDM high pass filter param5
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param param The fourth parameter of PDM TX IIR_HP filter stage 2 is (504 + I2S_TX_IIR_HP_MULT12_5[2:0])
+ */
+static inline void i2s_ll_tx_set_pdm_hp_filter_param5(i2s_dev_t *hw, uint32_t param)
+{
+    hw->tx_pcm2pdm_conf1.tx_iir_hp_mult12_5 = param;
+}
+
+/**
+ * @brief Enable I2S TX PDM high pass filter
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param enable Set true to enable I2S TX PDM high pass filter, set false to bypass it
+ */
+static inline void i2s_ll_tx_enable_pdm_hp_filter(i2s_dev_t *hw, bool enable)
+{
+    hw->tx_pcm2pdm_conf.tx_hp_bypass = !enable;
+}
+
+/**
+ * @brief Enable I2S TX PDM sigma-delta codec
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param dither I2S TX PDM sigmadelta dither value
+ */
+static inline void i2s_ll_tx_enable_pdm_sd_codec(i2s_dev_t *hw, bool enable)
+{
+    hw->tx_pcm2pdm_conf.tx_dac_2out_en = enable;
+    hw->tx_pcm2pdm_conf.tx_dac_mode_en = enable;
+}
+
+/**
+ * @brief Set I2S TX PDM sigma-delta codec dither
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param dither I2S TX PDM sigmadelta dither value
+ */
+static inline void i2s_ll_tx_set_pdm_sd_dither(i2s_dev_t *hw, uint32_t dither)
+{
+    hw->tx_pcm2pdm_conf.tx_sigmadelta_dither = dither;
+}
+
+/**
+ * @brief Set I2S TX PDM sigma-delta codec dither
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param dither2 I2S TX PDM sigmadelta dither2 value
+ */
+static inline void i2s_ll_tx_set_pdm_sd_dither2(i2s_dev_t *hw, uint32_t dither2)
+{
+    hw->tx_pcm2pdm_conf.tx_sigmadelta_dither2 = dither2;
+}
+
+/**
+ * @brief Configure RX PDM downsample
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param dsr PDM downsample configuration paramater
+ */
+static inline void i2s_ll_rx_set_pdm_dsr(i2s_dev_t *hw, i2s_pdm_dsr_t dsr)
+{
+    hw->rx_conf.rx_pdm_sinc_dsr_16_en = dsr;
+}
+
+/**
+ * @brief Get RX PDM downsample configuration
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param dsr Pointer to accept PDM downsample configuration
+ */
+static inline void i2s_ll_rx_get_pdm_dsr(i2s_dev_t *hw, i2s_pdm_dsr_t *dsr)
+{
+    *dsr = hw->rx_conf.rx_pdm_sinc_dsr_16_en;
+}
+
+/**
+ * @brief Configura TX a/u-law decompress or compress
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param pcm_cfg PCM configuration paramater
+ */
+static inline void i2s_ll_tx_set_pcm_type(i2s_dev_t *hw, i2s_pcm_compress_t pcm_cfg)
+{
+    hw->tx_conf.tx_pcm_conf = pcm_cfg;
+    hw->tx_conf.tx_pcm_bypass = !pcm_cfg;
+}
+
+/**
+ * @brief Configure RX a/u-law decompress or compress
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param pcm_cfg PCM configuration paramater
+ */
+static inline void i2s_ll_rx_set_pcm_type(i2s_dev_t *hw, i2s_pcm_compress_t pcm_cfg)
+{
+    hw->rx_conf.rx_pcm_conf = pcm_cfg;
+    hw->rx_conf.rx_pcm_bypass = !pcm_cfg;
+}
+
+/**
+ * @brief Enable TX audio data left alignment
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param ena Set true to enable left alignment
+ */
+static inline void i2s_ll_tx_enable_left_align(i2s_dev_t *hw, bool ena)
+{
+    hw->tx_conf.tx_left_align = ena;
+}
+
+/**
+ * @brief Enable RX audio data left alignment
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param ena Set true to enable left alignment
+ */
+static inline void i2s_ll_rx_enable_left_align(i2s_dev_t *hw, bool ena)
+{
+    hw->rx_conf.rx_left_align = ena;
+}
+
+/**
+ * @brief Enable TX big endian mode
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param ena Set true to enable big endian mode
+ */
+static inline void i2s_ll_rx_enable_big_endian(i2s_dev_t *hw, bool ena)
+{
+    hw->rx_conf.rx_big_endian = ena;
+}
+
+/**
+ * @brief Enable RX big endian mode
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param ena Set true to enable big endian mode
+ */
+static inline void i2s_ll_tx_enable_big_endian(i2s_dev_t *hw, bool ena)
+{
+    hw->tx_conf.tx_big_endian = ena;
+}
+
+/**
+ * @brief Configure TX bit order
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param lsb_order_ena Set true to enable LSB bit order
+ */
+static inline void i2s_ll_tx_set_bit_order(i2s_dev_t *hw, bool lsb_order_ena)
+{
+    hw->tx_conf.tx_bit_order = lsb_order_ena;
+}
+
+/**
+ * @brief Configure RX bit order
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param lsb_order_ena Set true to enable LSB bit order
+ */
+static inline void i2s_ll_rx_set_bit_order(i2s_dev_t *hw, bool lsb_order_ena)
+{
+    hw->rx_conf.rx_bit_order = lsb_order_ena;
+}
+
+/**
+ * @brief Configure TX skip mask enable
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param skip_mask_ena Set true to skip inactive channels.
+ */
+static inline void i2s_ll_tx_set_skip_mask(i2s_dev_t *hw, bool skip_mask_ena)
+{
+    hw->tx_tdm_ctrl.tx_tdm_skip_msk_en = skip_mask_ena;
+}
+
+
+/**
+ * @brief Configure single data
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param data Single data to be set
+ */
+static inline void i2s_ll_set_single_data(i2s_dev_t *hw, uint32_t data)
+{
+    hw->conf_single_data = data;
+}
+
+/**
+ * @brief Enable TX mono mode
+ * @note MONO in hardware means only one channel got data, but another doesn't
+ *       MONO in software means two channel share same data
+ *       This function aims to use MONO in software meaning
+ *       so 'tx_mono' and 'tx_chan_equal' should be enabled at the same time
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param mono_ena Set true to enable mono mde.
+ */
+static inline void i2s_ll_tx_enable_mono_mode(i2s_dev_t *hw, bool mono_ena)
+{
+    hw->tx_conf.tx_mono = mono_ena;
+    hw->tx_conf.tx_chan_equal = mono_ena;
+}
+
+/**
+ * @brief Enable RX mono mode
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param mono_ena Set true to enable mono mde.
+ */
+static inline void i2s_ll_rx_enable_mono_mode(i2s_dev_t *hw, bool mono_ena)
+{
+    hw->rx_conf.rx_mono = mono_ena;
+    hw->rx_conf.rx_mono_fst_vld = mono_ena;
+}
+
+/**
+ * @brief Enable loopback mode
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ * @param ena Set true to share BCK and WS signal for tx module and rx module.
+ */
+static inline void i2s_ll_share_bck_ws(i2s_dev_t *hw, bool ena)
+{
+    hw->tx_conf.sig_loopback = ena;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/interrupt_controller_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/interrupt_controller_ll.h
new file mode 100644
index 00000000000..3a33d92a481
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/interrupt_controller_ll.h
@@ -0,0 +1,107 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc_caps.h"
+#include "soc/soc.h"
+#include "xtensa/xtensa_api.h"
+#include "xtensa/config/specreg.h"
+#include "xt_instr_macros.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief enable interrupts specified by the mask
+ *
+ * @param mask bitmask of interrupts that needs to be enabled
+ */
+static inline void intr_cntrl_ll_enable_interrupts(uint32_t mask)
+{
+    xt_ints_on(mask);
+}
+
+/**
+ * @brief disable interrupts specified by the mask
+ *
+ * @param mask bitmask of interrupts that needs to be disabled
+ */
+static inline void intr_cntrl_ll_disable_interrupts(uint32_t mask)
+{
+    xt_ints_off(mask);
+}
+
+/**
+ * @brief Read the current interrupt mask of the CPU running this code.
+ *
+ * @return The current interrupt bitmask.
+ */
+static inline uint32_t intr_cntrl_ll_read_interrupt_mask(void)
+{
+    uint32_t int_mask;
+    RSR(INTENABLE, int_mask);
+    return int_mask;
+}
+
+/**
+ * @brief checks if given interrupt number has a valid handler
+ *
+ * @param intr interrupt number ranged from 0 to 31
+ * @param cpu cpu number ranged betweeen 0 to SOC_CPU_CORES_NUM - 1
+ * @return true for valid handler, false otherwise
+ */
+static inline bool intr_cntrl_ll_has_handler(uint8_t intr, uint8_t cpu)
+{
+    return xt_int_has_handler(intr, cpu);
+}
+
+/**
+ * @brief sets interrupt handler and optional argument of a given interrupt number
+ *
+ * @param intr interrupt number ranged from 0 to 31
+ * @param handler handler invoked when an interrupt occurs
+ * @param arg optional argument to pass to the handler
+ */
+static inline void intr_cntrl_ll_set_int_handler(uint8_t intr, interrupt_handler_t handler, void *arg)
+{
+    xt_set_interrupt_handler(intr, (xt_handler)handler, arg);
+}
+
+/**
+ * @brief Gets argument passed to handler of a given interrupt number
+ *
+ * @param intr interrupt number ranged from 0 to 31
+ *
+ * @return argument used by handler of passed interrupt number
+ */
+static inline void *intr_cntrl_ll_get_int_handler_arg(uint8_t intr)
+{
+    return xt_get_interrupt_handler_arg(intr);
+}
+
+/**
+ * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
+ *
+ * @param intr interrupt number ranged from 0 to 31
+ */
+static inline void intr_cntrl_ll_edge_int_acknowledge (int intr)
+{
+    xthal_set_intclear(1 << intr);
+}
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/lcd_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/lcd_ll.h
new file mode 100644
index 00000000000..8a5e0534e63
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/lcd_ll.h
@@ -0,0 +1,270 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "soc/lcd_cam_reg.h"
+#include "soc/lcd_cam_struct.h"
+#include "hal/assert.h"
+#include "hal/lcd_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LCD_LL_GET_HW(id) (((id) == 0) ? (&LCD_CAM) : NULL)
+
+// Interrupt event, bit mask
+#define LCD_LL_EVENT_VSYNC_END  (1 << 0)
+#define LCD_LL_EVENT_TRANS_DONE (1 << 1)
+
+// Maximum coefficient of clock prescaler
+#define LCD_LL_CLOCK_PRESCALE_MAX (64)
+
+static inline void lcd_ll_enable_clock(lcd_cam_dev_t *dev, bool en)
+{
+    dev->lcd_clock.clk_en = en;
+}
+
+static inline void lcd_ll_set_group_clock_src(lcd_cam_dev_t *dev, lcd_clock_source_t src, int div_num, int div_a, int div_b)
+{
+    // lcd_clk = module_clock_src / (div_num + div_b / div_a)
+    HAL_ASSERT(div_num >= 2);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->lcd_clock, lcd_clkm_div_num, div_num);
+    dev->lcd_clock.lcd_clkm_div_a = div_a;
+    dev->lcd_clock.lcd_clkm_div_b = div_b;
+    switch (src) {
+    case LCD_CLK_SRC_PLL160M:
+        dev->lcd_clock.lcd_clk_sel = 3;
+        break;
+    case LCD_CLK_SRC_XTAL:
+        dev->lcd_clock.lcd_clk_sel = 1;
+        break;
+    default:
+        HAL_ASSERT(false && "unsupported clock source");
+        break;
+    }
+}
+
+__attribute__((always_inline))
+static inline void lcd_ll_set_clock_idle_level(lcd_cam_dev_t *dev, bool level)
+{
+    dev->lcd_clock.lcd_ck_idle_edge = level;
+}
+
+__attribute__((always_inline))
+static inline void lcd_ll_set_pixel_clock_edge(lcd_cam_dev_t *dev, bool active_on_neg)
+{
+    dev->lcd_clock.lcd_clk_equ_sysclk = 0; // if we want to pixel_clk == lcd_clk, just make clkcnt = 0
+    dev->lcd_clock.lcd_ck_out_edge = active_on_neg;
+}
+
+__attribute__((always_inline))
+static inline void lcd_ll_set_pixel_clock_prescale(lcd_cam_dev_t *dev, uint32_t prescale)
+{
+    // Formula: pixel_clk = lcd_clk / (1 + clkcnt_n)
+    dev->lcd_clock.lcd_clkcnt_n = prescale - 1;
+}
+
+static inline void lcd_ll_enable_rgb_yuv_convert(lcd_cam_dev_t *dev, bool en)
+{
+    dev->lcd_rgb_yuv.lcd_conv_bypass = en;
+}
+
+__attribute__((always_inline))
+static inline void lcd_ll_set_phase_cycles(lcd_cam_dev_t *dev, uint32_t cmd_cycles, uint32_t dummy_cycles, uint32_t data_cycles)
+{
+    HAL_ASSERT(cmd_cycles <= 2);
+    dev->lcd_user.lcd_cmd = (cmd_cycles > 0);
+    dev->lcd_user.lcd_dummy = (dummy_cycles > 0);
+    dev->lcd_user.lcd_dout = (data_cycles > 0);
+    dev->lcd_user.lcd_cmd_2_cycle_en = cmd_cycles > 1;
+    dev->lcd_user.lcd_dummy_cyclelen = dummy_cycles - 1;
+    dev->lcd_user.lcd_dout_cyclelen = data_cycles - 1;
+}
+
+static inline void lcd_ll_set_blank_cycles(lcd_cam_dev_t *dev, uint32_t fk_cycles, uint32_t bk_cycles)
+{
+    dev->lcd_misc.lcd_bk_en = (fk_cycles || bk_cycles);
+    dev->lcd_misc.lcd_vfk_cyclelen = fk_cycles - 1;
+    dev->lcd_misc.lcd_vbk_cyclelen = bk_cycles - 1;
+}
+
+static inline void lcd_ll_set_data_width(lcd_cam_dev_t *dev, uint32_t width)
+{
+    dev->lcd_user.lcd_2byte_en = (width == 16);
+}
+
+static inline uint32_t lcd_ll_get_data_width(lcd_cam_dev_t *dev)
+{
+    return dev->lcd_user.lcd_2byte_en ? 16 : 8;
+}
+
+static inline void lcd_ll_enable_output_always_on(lcd_cam_dev_t *dev, bool en)
+{
+    dev->lcd_user.lcd_always_out_en = en;
+}
+
+__attribute__((always_inline))
+static inline void lcd_ll_start(lcd_cam_dev_t *dev)
+{
+    dev->lcd_user.lcd_update = 1; // update parameters before start transaction
+    dev->lcd_user.lcd_start = 1;
+}
+
+static inline void lcd_ll_stop(lcd_cam_dev_t *dev)
+{
+    dev->lcd_user.lcd_start = 0;
+    dev->lcd_user.lcd_update = 1; // self clear
+}
+
+static inline void lcd_ll_reset(lcd_cam_dev_t *dev)
+{
+    dev->lcd_user.lcd_reset = 1;
+    dev->lcd_user.lcd_reset = 0;
+}
+
+__attribute__((always_inline))
+static inline void lcd_ll_reverse_data_bit_order(lcd_cam_dev_t *dev, bool en)
+{
+    // whether to change LCD_DATA_out[N:0] to LCD_DATA_out[0:N]
+    dev->lcd_user.lcd_bit_order = en;
+}
+
+__attribute__((always_inline))
+static inline void lcd_ll_reverse_data_byte_order(lcd_cam_dev_t *dev, bool en)
+{
+    dev->lcd_user.lcd_byte_order = en;
+}
+
+__attribute__((always_inline))
+static inline void lcd_ll_reverse_data_8bits_order(lcd_cam_dev_t *dev, bool en)
+{
+    dev->lcd_user.lcd_8bits_order = en;
+}
+
+static inline void lcd_ll_fifo_reset(lcd_cam_dev_t *dev)
+{
+    dev->lcd_misc.lcd_afifo_reset = 1;
+    dev->lcd_misc.lcd_afifo_reset = 0;
+}
+
+__attribute__((always_inline))
+static inline void lcd_ll_set_dc_level(lcd_cam_dev_t *dev, bool idle_phase, bool cmd_phase, bool dummy_phase, bool data_phase)
+{
+    dev->lcd_misc.lcd_cd_idle_edge = idle_phase;
+    dev->lcd_misc.lcd_cd_cmd_set = (cmd_phase != idle_phase);
+    dev->lcd_misc.lcd_cd_dummy_set = (dummy_phase != idle_phase);
+    dev->lcd_misc.lcd_cd_data_set = (data_phase != idle_phase);
+}
+
+static inline void lcd_ll_set_dc_delay_ticks(lcd_cam_dev_t *dev, uint32_t delay)
+{
+    dev->lcd_dly_mode.lcd_cd_mode = delay;
+}
+
+__attribute__((always_inline))
+static inline void lcd_ll_set_command(lcd_cam_dev_t *dev, uint32_t data_width, uint32_t command)
+{
+    // if command phase has two cycles, in the first cycle, command[15:0] is sent out via lcd_data_out[15:0]
+    // in the second cycle, command[31:16] is sent out via lcd_data_out[15:0]
+    if (data_width == 8) {
+        command = (command & 0xFF) | (command & 0xFF00) << 8;
+    }
+    dev->lcd_cmd_val.lcd_cmd_value = command;
+}
+
+static inline void lcd_ll_enable_rgb_mode(lcd_cam_dev_t *dev, bool en)
+{
+    dev->lcd_ctrl.lcd_rgb_mode_en = en;
+}
+
+static inline void lcd_ll_enable_auto_next_frame(lcd_cam_dev_t *dev, bool en)
+{
+    // in RGB mode, enabling "next frame" means LCD controller keeps sending frame data
+    dev->lcd_misc.lcd_next_frame_en = en;
+}
+
+static inline void lcd_ll_enable_output_hsync_in_porch_region(lcd_cam_dev_t *dev, bool en)
+{
+    dev->lcd_ctrl2.lcd_hs_blank_en = en;
+}
+
+static inline void lcd_ll_set_hsync_position(lcd_cam_dev_t *dev, uint32_t offset_in_line)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->lcd_ctrl2, lcd_hsync_position, offset_in_line);
+}
+
+static inline void lcd_ll_set_horizontal_timing(lcd_cam_dev_t *dev, uint32_t hsw, uint32_t hbp, uint32_t active_width, uint32_t hfp)
+{
+    dev->lcd_ctrl2.lcd_hsync_width = hsw - 1;
+    dev->lcd_ctrl.lcd_hb_front = hbp + hsw - 1;
+    dev->lcd_ctrl1.lcd_ha_width = active_width - 1;
+    dev->lcd_ctrl1.lcd_ht_width = hsw + hbp + active_width + hfp - 1;
+}
+
+static inline void lcd_ll_set_vertical_timing(lcd_cam_dev_t *dev, uint32_t vsw, uint32_t vbp, uint32_t active_height, uint32_t vfp)
+{
+    dev->lcd_ctrl2.lcd_vsync_width = vsw - 1;
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->lcd_ctrl1, lcd_vb_front, vbp + vsw - 1);
+    dev->lcd_ctrl.lcd_va_height = active_height - 1;
+    dev->lcd_ctrl.lcd_vt_height = vsw + vbp + active_height + vfp - 1;
+}
+
+static inline void lcd_ll_set_idle_level(lcd_cam_dev_t *dev, bool hsync_idle_level, bool vsync_idle_level, bool de_idle_level)
+{
+    dev->lcd_ctrl2.lcd_hsync_idle_pol = hsync_idle_level;
+    dev->lcd_ctrl2.lcd_vsync_idle_pol = vsync_idle_level;
+    dev->lcd_ctrl2.lcd_de_idle_pol = de_idle_level;
+}
+
+static inline void lcd_ll_set_delay_ticks(lcd_cam_dev_t *dev, uint32_t hsync_delay, uint32_t vsync_delay, uint32_t de_delay)
+{
+    dev->lcd_dly_mode.lcd_hsync_mode = hsync_delay;
+    dev->lcd_dly_mode.lcd_vsync_mode = vsync_delay;
+    dev->lcd_dly_mode.lcd_de_mode = de_delay;
+}
+
+static inline void lcd_ll_set_data_delay_ticks(lcd_cam_dev_t *dev, uint32_t delay)
+{
+    uint32_t reg_val = 0;
+    for (int i = 0; i < 16; i++) {
+        reg_val |= (delay & 0x03) << (2 * i);
+    }
+    dev->lcd_data_dout_mode.val = reg_val;
+}
+
+static inline void lcd_ll_enable_interrupt(lcd_cam_dev_t *dev, uint32_t mask, bool en)
+{
+    if (en) {
+        dev->lc_dma_int_ena.val |= mask & 0x03;
+    } else {
+        dev->lc_dma_int_ena.val &= ~(mask & 0x03);
+    }
+}
+
+__attribute__((always_inline))
+static inline uint32_t lcd_ll_get_interrupt_status(lcd_cam_dev_t *dev)
+{
+    return dev->lc_dma_int_st.val & 0x03;
+}
+
+__attribute__((always_inline))
+static inline void lcd_ll_clear_interrupt_status(lcd_cam_dev_t *dev, uint32_t mask)
+{
+    dev->lc_dma_int_clr.val = mask & 0x03;
+}
+
+static inline volatile void *lcd_ll_get_interrupt_status_reg(lcd_cam_dev_t *dev)
+{
+    return &dev->lc_dma_int_st;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/ledc_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/ledc_ll.h
new file mode 100644
index 00000000000..fb495b03198
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/ledc_ll.h
@@ -0,0 +1,519 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// The LL layer for LEDC register operations.
+// Note that most of the register operations in this layer are non-atomic operations.
+
+#pragma once
+
+#include "hal/ledc_types.h"
+#include "soc/ledc_periph.h"
+#include "soc/ledc_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LEDC_LL_GET_HW() &LEDC
+
+/**
+ * @brief Set LEDC low speed timer clock
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param slow_clk_sel LEDC low speed timer clock source
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_slow_clk_sel(ledc_dev_t *hw, ledc_slow_clk_sel_t slow_clk_sel)
+{
+    uint32_t clk_sel_val = 0;
+    if (slow_clk_sel == LEDC_SLOW_CLK_APB) {
+        clk_sel_val = 1;
+    } else if (slow_clk_sel == LEDC_SLOW_CLK_RTC8M) {
+        clk_sel_val = 2;
+    } else if (slow_clk_sel == LEDC_SLOW_CLK_XTAL) {
+        clk_sel_val = 3;
+    }
+    hw->conf.apb_clk_sel = clk_sel_val;
+}
+
+/**
+ * @brief Get LEDC low speed timer clock
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param slow_clk_sel LEDC low speed timer clock source
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_slow_clk_sel(ledc_dev_t *hw, ledc_slow_clk_sel_t *slow_clk_sel)
+{
+    uint32_t clk_sel_val = hw->conf.apb_clk_sel;
+    if (clk_sel_val == 1) {
+        *slow_clk_sel = LEDC_SLOW_CLK_APB;
+    } else if (clk_sel_val == 2) {
+        *slow_clk_sel = LEDC_SLOW_CLK_RTC8M;
+    } else if (clk_sel_val == 3) {
+        *slow_clk_sel = LEDC_SLOW_CLK_XTAL;
+    }
+}
+
+/**
+ * @brief Update LEDC low speed timer
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_ls_timer_update(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.low_speed_update = 1;
+}
+
+/**
+ * @brief Reset LEDC timer
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_timer_rst(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 1;
+    hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 0;
+}
+
+/**
+ * @brief Pause LEDC timer
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_timer_pause(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 1;
+}
+
+/**
+ * @brief Resume LEDC timer
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_timer_resume(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 0;
+}
+
+/**
+ * @brief Set LEDC timer clock divider
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clock_divider Timer clock divide value, the timer clock is divided from the selected clock source
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t clock_divider)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider = clock_divider;
+}
+
+/**
+ * @brief Get LEDC timer clock divider
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clock_divider Timer clock divide value, the timer clock is divided from the selected clock source
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t *clock_divider)
+{
+    *clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider;
+}
+
+/**
+ * @brief Set LEDC timer clock source
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clk_src Timer clock source
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t clk_src)
+{
+    if (clk_src == LEDC_REF_TICK) {
+        //REF_TICK can only be used when APB is selected.
+        hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 1;
+        hw->conf.apb_clk_sel = 1;
+    } else {
+        hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 0;
+    }
+}
+
+/**
+ * @brief Get LEDC timer clock source
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clk_src Pointer to accept the timer clock source
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t *clk_src)
+{
+    if (hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel == 1) {
+        *clk_src = LEDC_REF_TICK;
+    } else {
+        *clk_src = LEDC_APB_CLK;
+    }
+}
+
+/**
+ * @brief Set LEDC duty resolution
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param duty_resolution Resolution of duty setting in number of bits. The range of duty values is [0, (2**duty_resolution)]
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_duty_resolution(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t duty_resolution)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.duty_resolution = duty_resolution;
+}
+
+/**
+ * @brief Get LEDC duty resolution
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param duty_resolution Pointer to accept the resolution of duty setting in number of bits.
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_duty_resolution(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t *duty_resolution)
+{
+    *duty_resolution = hw->timer_group[speed_mode].timer[timer_sel].conf.duty_resolution;
+}
+
+/**
+ * @brief Update channel configure when select low speed mode
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_ls_channel_update(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf0.low_speed_update = 1;
+}
+
+/**
+ * @brief Get LEDC max duty
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param max_duty Pointer to accept the max duty
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_max_duty(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *max_duty)
+{
+    uint32_t timer_sel = hw->channel_group[speed_mode].channel[channel_num].conf0.timer_sel;
+    *max_duty = (1 << (LEDC.timer_group[speed_mode].timer[timer_sel].conf.duty_resolution));
+}
+
+/**
+ * @brief Set LEDC hpoint value
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param hpoint_val LEDC hpoint value(max: 0xfffff)
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_hpoint(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t hpoint_val)
+{
+    hw->channel_group[speed_mode].channel[channel_num].hpoint.hpoint = hpoint_val;
+}
+
+/**
+ * @brief Get LEDC hpoint value
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param hpoint_val Pointer to accept the LEDC hpoint value(max: 0xfffff)
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_hpoint(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *hpoint_val)
+{
+    *hpoint_val = hw->channel_group[speed_mode].channel[channel_num].hpoint.hpoint;
+}
+
+/**
+ * @brief Set LEDC the integer part of duty value
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_val LEDC duty value, the range of duty setting is [0, (2**duty_resolution)]
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_duty_int_part(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t duty_val)
+{
+    hw->channel_group[speed_mode].channel[channel_num].duty.duty = duty_val << 4;
+}
+
+/**
+ * @brief Get LEDC duty value
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_val Pointer to accept the LEDC duty value
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_duty(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *duty_val)
+{
+    *duty_val = (hw->channel_group[speed_mode].channel[channel_num].duty_rd.duty_read >> 4);
+}
+
+/**
+ * @brief Set LEDC duty change direction
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_direction LEDC duty change direction, increase or decrease
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_duty_direction(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, ledc_duty_direction_t duty_direction)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf1.duty_inc = duty_direction;
+}
+
+/**
+ * @brief Get LEDC duty change direction
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_direction Pointer to accept the LEDC duty change direction, increase or decrease
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_duty_direction(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, ledc_duty_direction_t *duty_direction)
+{
+    *duty_direction = hw->channel_group[speed_mode].channel[channel_num].conf1.duty_inc;
+}
+
+/**
+ * @brief Set the number of increased or decreased times
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_num The number of increased or decreased times
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_duty_num(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t duty_num)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf1.duty_num = duty_num;
+}
+
+/**
+ * @brief Set the duty cycles of increase or decrease
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_cycle The duty cycles
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_duty_cycle(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t duty_cycle)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf1.duty_cycle = duty_cycle;
+}
+
+/**
+ * @brief Set the step scale of increase or decrease
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_scale The step scale
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_duty_scale(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t duty_scale)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf1.duty_scale = duty_scale;
+}
+
+/**
+ * @brief Set the output enable
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param sig_out_en The output enable status
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_sig_out_en(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool sig_out_en)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf0.sig_out_en = sig_out_en;
+}
+
+/**
+ * @brief Set the duty start
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_start The duty start
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_duty_start(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool duty_start)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf1.duty_start = duty_start;
+}
+
+/**
+ * @brief Set output idle level
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param idle_level The output idle level
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t idle_level)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf0.idle_lv = idle_level & 0x1;
+}
+
+/**
+ * @brief Set fade end interrupt enable
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param fade_end_intr_en The fade end interrupt enable status
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en)
+{
+    uint32_t value = hw->int_ena.val;
+    uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S;
+    hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num))));
+}
+
+/**
+ * @brief Get fade end interrupt status
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param intr_status The fade end interrupt status
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status)
+{
+    uint32_t value = hw->int_st.val;
+    uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S;
+    *intr_status = (value >> int_en_base) & 0xff;
+}
+
+/**
+ * @brief Clear fade end interrupt status
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num)
+{
+    uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S;
+    hw->int_clr.val = BIT(int_en_base + channel_num);
+}
+
+/**
+ * @brief Set timer index of the specified channel
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_bind_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, ledc_timer_t timer_sel)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf0.timer_sel = timer_sel;
+}
+
+/**
+ * @brief Get timer index of the specified channel
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param timer_sel Pointer to accept the LEDC timer index
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, ledc_timer_t *timer_sel)
+{
+    *timer_sel = hw->channel_group[speed_mode].channel[channel_num].conf0.timer_sel;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/mcpwm_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/mcpwm_ll.h
new file mode 100644
index 00000000000..4f3305798ee
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/mcpwm_ll.h
@@ -0,0 +1,1022 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The LL layer for ESP32-S3 MCPWM register operations
+
+#pragma once
+
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "soc/soc_caps.h"
+#include "soc/mcpwm_struct.h"
+#include "hal/mcpwm_types.h"
+#include "hal/assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Get the address of peripheral registers
+#define MCPWM_LL_GET_HW(ID) (((ID) == 0) ? &MCPWM0 : &MCPWM1)
+#define MCPWM_LL_MAX_CAPTURE_PRESCALE 255
+#define MCPWM_LL_MAX_COMPARE_VALUE    65535
+#define MCPWM_LL_MAX_DEAD_DELAY       65535
+#define MCPWM_LL_MAX_PHASE_VALUE      65535
+
+/********************* Group registers *******************/
+
+// Set/Get group clock: PWM_clk = CLK_160M / (prescale + 1)
+static inline void mcpwm_ll_group_set_clock_prescale(mcpwm_dev_t *mcpwm, int pre_scale)
+{
+    // In case the compiler optimise a 32bit instruction (e.g. s32i) into 8bit instruction (e.g. s8i, which is not allowed to access a register)
+    // We take care of the "read-modify-write" procedure by ourselves.
+    mcpwm_clk_cfg_reg_t clkcfg = mcpwm->clk_cfg;
+    clkcfg.clk_prescale = pre_scale - 1;
+    mcpwm->clk_cfg = clkcfg;
+}
+
+static inline uint32_t mcpwm_ll_group_get_clock_prescale(mcpwm_dev_t *mcpwm)
+{
+    mcpwm_clk_cfg_reg_t clkcfg = mcpwm->clk_cfg;
+    return clkcfg.clk_prescale + 1;
+}
+
+static inline void mcpwm_ll_group_enable_shadow_mode(mcpwm_dev_t *mcpwm)
+{
+    mcpwm->update_cfg.global_up_en = 1;
+    // updating of active registers in MCPWM operators should be enabled
+    mcpwm->update_cfg.op0_up_en = 1;
+    mcpwm->update_cfg.op1_up_en = 1;
+    mcpwm->update_cfg.op2_up_en = 1;
+}
+
+static inline void mcpwm_ll_group_flush_shadow(mcpwm_dev_t *mcpwm)
+{
+    // a toggle can trigger a forced update of all active registers in MCPWM, i.e. shadow->active
+    mcpwm->update_cfg.global_force_up = ~mcpwm->update_cfg.global_force_up;
+}
+
+/********************* Interrupt registers *******************/
+
+static inline uint32_t mcpwm_ll_intr_get_status(mcpwm_dev_t *mcpwm)
+{
+    return mcpwm->int_st.val;
+}
+
+static inline void mcpwm_ll_intr_clear_status(mcpwm_dev_t *mcpwm, uint32_t intr_mask)
+{
+    mcpwm->int_clr.val = intr_mask;
+}
+
+static inline void mcpwm_ll_intr_disable_all(mcpwm_dev_t *mcpwm)
+{
+    mcpwm->int_ena.val = 0;
+}
+
+//////////// get interrupt status for each event ////////////////
+
+static inline uint32_t mcpwm_ll_intr_get_timer_stop_status(mcpwm_dev_t *mcpwm)
+{
+    return (mcpwm->int_st.val >> 0) & 0x07;
+}
+
+static inline uint32_t mcpwm_ll_intr_get_timer_tez_status(mcpwm_dev_t *mcpwm)
+{
+    return (mcpwm->int_st.val >> 3) & 0x07;
+}
+
+static inline uint32_t mcpwm_ll_intr_get_timer_tep_status(mcpwm_dev_t *mcpwm)
+{
+    return (mcpwm->int_st.val >> 6) & 0x07;
+}
+
+static inline uint32_t mcpwm_ll_intr_get_fault_enter_status(mcpwm_dev_t *mcpwm)
+{
+    return (mcpwm->int_st.val >> 9) & 0x07;
+}
+
+static inline uint32_t mcpwm_ll_intr_get_fault_exit_status(mcpwm_dev_t *mcpwm)
+{
+    return (mcpwm->int_st.val >> 12) & 0x07;
+}
+
+static inline uint32_t mcpwm_ll_intr_get_compare_status(mcpwm_dev_t *mcpwm, uint32_t cmp_id)
+{
+    return (mcpwm->int_st.val >> (15 + cmp_id * 3)) & 0x07;
+}
+
+static inline uint32_t mcpwm_ll_intr_get_trip_cbc_status(mcpwm_dev_t *mcpwm)
+{
+    return (mcpwm->int_st.val >> 21) & 0x07;
+}
+
+static inline uint32_t mcpwm_ll_intr_get_trip_ost_status(mcpwm_dev_t *mcpwm)
+{
+    return (mcpwm->int_st.val >> 24) & 0x07;
+}
+
+__attribute__((always_inline))
+static inline uint32_t mcpwm_ll_intr_get_capture_status(mcpwm_dev_t *mcpwm)
+{
+    return (mcpwm->int_st.val >> 27) & 0x07;
+}
+
+//////////// clear interrupt status for each event ////////////////
+
+static inline void mcpwm_ll_intr_clear_timer_stop_status(mcpwm_dev_t *mcpwm, uint32_t timer_mask)
+{
+    mcpwm->int_clr.val = (timer_mask & 0x07) << 0;
+}
+
+static inline void mcpwm_ll_intr_clear_timer_tez_status(mcpwm_dev_t *mcpwm, uint32_t timer_mask)
+{
+    mcpwm->int_clr.val = (timer_mask & 0x07) << 3;
+}
+
+static inline void mcpwm_ll_intr_clear_timer_tep_status(mcpwm_dev_t *mcpwm, uint32_t timer_mask)
+{
+    mcpwm->int_clr.val = (timer_mask & 0x07) << 6;
+}
+
+static inline void mcpwm_ll_intr_clear_fault_enter_status(mcpwm_dev_t *mcpwm, uint32_t fault_mask)
+{
+    mcpwm->int_clr.val = (fault_mask & 0x07) << 9;
+}
+
+static inline void mcpwm_ll_intr_clear_fault_exit_status(mcpwm_dev_t *mcpwm, uint32_t fault_mask)
+{
+    mcpwm->int_clr.val = (fault_mask & 0x07) << 12;
+}
+
+static inline void mcpwm_ll_intr_clear_compare_status(mcpwm_dev_t *mcpwm, uint32_t operator_mask, uint32_t cmp_id)
+{
+    mcpwm->int_clr.val = (operator_mask & 0x07) << (15 + cmp_id * 3);
+}
+
+static inline void mcpwm_ll_intr_clear_trip_cbc_status(mcpwm_dev_t *mcpwm, uint32_t cbc_mask)
+{
+    mcpwm->int_clr.val = (cbc_mask & 0x07) << 21;
+}
+
+static inline void mcpwm_ll_intr_clear_trip_ost_status(mcpwm_dev_t *mcpwm, uint32_t ost_mask)
+{
+    mcpwm->int_clr.val = (ost_mask & 0x07) << 24;
+}
+
+__attribute__((always_inline))
+static inline void mcpwm_ll_intr_clear_capture_status(mcpwm_dev_t *mcpwm, uint32_t capture_mask)
+{
+    mcpwm->int_clr.val = (capture_mask & 0x07) << 27;
+}
+
+//////////// enable interrupt for each event ////////////////
+
+static inline void mcpwm_ll_intr_enable_timer_stop(mcpwm_dev_t *mcpwm, uint32_t timer_id, bool enable)
+{
+    if (enable) {
+        mcpwm->int_ena.val |= 1 << (timer_id + 0);
+    } else {
+        mcpwm->int_ena.val &= ~(1 << (timer_id + 0));
+    }
+}
+
+static inline void mcpwm_ll_intr_enable_timer_tez(mcpwm_dev_t *mcpwm, uint32_t timer_id, bool enable)
+{
+    if (enable) {
+        mcpwm->int_ena.val |= 1 << (timer_id + 3);
+    } else {
+        mcpwm->int_ena.val &= ~(1 << (timer_id + 3));
+    }
+}
+
+static inline void mcpwm_ll_intr_enable_timer_tep(mcpwm_dev_t *mcpwm, uint32_t timer_id, bool enable)
+{
+    if (enable) {
+        mcpwm->int_ena.val |= 1 << (timer_id + 6);
+    } else {
+        mcpwm->int_ena.val &= ~(1 << (timer_id + 6));
+    }
+}
+
+static inline void mcpwm_ll_intr_enable_fault_enter(mcpwm_dev_t *mcpwm, uint32_t fault_id, bool enable)
+{
+    if (enable) {
+        mcpwm->int_ena.val |= 1 << (9 + fault_id);  // enter fault interrupt
+    } else {
+        mcpwm->int_ena.val &= ~(1 << (9 + fault_id));
+    }
+}
+
+static inline void mcpwm_ll_intr_enable_fault_exit(mcpwm_dev_t *mcpwm, uint32_t fault_id, bool enable)
+{
+    if (enable) {
+        mcpwm->int_ena.val |= 1 << (12 + fault_id); // exit fault interrupt
+    } else {
+        mcpwm->int_ena.val &= ~(1 << (12 + fault_id));
+    }
+}
+
+static inline void mcpwm_ll_intr_enable_compare(mcpwm_dev_t *mcpwm, uint32_t operator_id, uint32_t cmp_id, bool enable)
+{
+    if (enable) {
+        mcpwm->int_ena.val |= (1 << (15 + cmp_id * 3 + operator_id));
+    } else {
+        mcpwm->int_ena.val &= ~(1 << (15 + cmp_id * 3 + operator_id));
+    }
+}
+
+static inline void mcpwm_ll_intr_enable_trip_cbc(mcpwm_dev_t *mcpwm, uint32_t operator_id, bool enable)
+{
+    if (enable) {
+        mcpwm->int_ena.val |= (1 << (21 + operator_id));
+    } else {
+        mcpwm->int_ena.val &= ~(1 << (21 + operator_id));
+    }
+}
+
+static inline void mcpwm_ll_intr_enable_trip_ost(mcpwm_dev_t *mcpwm, uint32_t operator_id, bool enable)
+{
+    if (enable) {
+        mcpwm->int_ena.val |= (1 << (24 + operator_id));
+    } else {
+        mcpwm->int_ena.val &= ~(1 << (24 + operator_id));
+    }
+}
+
+static inline void mcpwm_ll_intr_enable_capture(mcpwm_dev_t *mcpwm, uint32_t capture_id, bool enable)
+{
+    if (enable) {
+        mcpwm->int_ena.val |= 1 << (27 + capture_id);
+    } else {
+        mcpwm->int_ena.val &= ~(1 << (27 + capture_id));
+    }
+}
+
+/********************* Timer registers *******************/
+
+static inline void mcpwm_ll_timer_set_clock_prescale(mcpwm_dev_t *mcpwm, int timer_id, uint32_t prescale)
+{
+    // In case the compiler optimise a 32bit instruction (e.g. s32i) into 8bit instruction (e.g. s8i, which is not allowed to access a register)
+    // We take care of the "read-modify-write" procedure by ourselves.
+    mcpwm_timer_cfg0_reg_t cfg0 = mcpwm->timer[timer_id].timer_cfg0;
+    cfg0.timer_prescale = prescale - 1;
+    mcpwm->timer[timer_id].timer_cfg0 = cfg0;
+}
+
+static inline uint32_t mcpwm_ll_timer_get_clock_prescale(mcpwm_dev_t *mcpwm, int timer_id)
+{
+    mcpwm_timer_cfg0_reg_t cfg0 = mcpwm->timer[timer_id].timer_cfg0;
+    return cfg0.timer_prescale + 1;
+}
+
+static inline void mcpwm_ll_timer_set_peak(mcpwm_dev_t *mcpwm, int timer_id, uint32_t peak, bool symmetric)
+{
+    if (!symmetric) { // in asymmetric mode, period = [0,peak-1]
+        HAL_FORCE_MODIFY_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period, peak - 1);
+    } else { // in symmetric mode, period = [0,peak-1] + [peak,1]
+        HAL_FORCE_MODIFY_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period, peak);
+    }
+}
+
+static inline uint32_t mcpwm_ll_timer_get_peak(mcpwm_dev_t *mcpwm, int timer_id, bool symmetric)
+{
+    // asymmetric mode
+    if (!symmetric) {
+        return HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period) + 1;
+    }
+    // symmetric mode
+    return HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period);
+}
+
+static inline void mcpwm_ll_timer_update_period_at_once(mcpwm_dev_t *mcpwm, int timer_id)
+{
+    mcpwm->timer[timer_id].timer_cfg0.timer_period_upmethod  = 0;
+}
+
+static inline void mcpwm_ll_timer_enable_update_period_on_tez(mcpwm_dev_t *mcpwm, int timer_id, bool enable)
+{
+    if (enable) {
+        mcpwm->timer[timer_id].timer_cfg0.timer_period_upmethod  |= 0x01;
+    } else {
+        mcpwm->timer[timer_id].timer_cfg0.timer_period_upmethod  &= ~0x01;
+    }
+}
+
+static inline void mcpwm_ll_timer_enable_update_period_on_sync(mcpwm_dev_t *mcpwm, int timer_id, bool enable)
+{
+    if (enable) {
+        mcpwm->timer[timer_id].timer_cfg0.timer_period_upmethod |= 0x02;
+    } else {
+        mcpwm->timer[timer_id].timer_cfg0.timer_period_upmethod &= ~0x02;
+    }
+}
+
+static inline void mcpwm_ll_timer_set_count_mode(mcpwm_dev_t *mcpwm, int timer_id, mcpwm_timer_count_mode_t mode)
+{
+    switch (mode) {
+    case MCPWM_TIMER_COUNT_MODE_PAUSE:
+        mcpwm->timer[timer_id].timer_cfg1.timer_mod = 0;
+        break;
+    case MCPWM_TIMER_COUNT_MODE_UP:
+        mcpwm->timer[timer_id].timer_cfg1.timer_mod = 1;
+        break;
+    case MCPWM_TIMER_COUNT_MODE_DOWN:
+        mcpwm->timer[timer_id].timer_cfg1.timer_mod = 2;
+        break;
+    case MCPWM_TIMER_COUNT_MODE_UP_DOWN:
+        mcpwm->timer[timer_id].timer_cfg1.timer_mod = 3;
+        break;
+    }
+}
+
+static inline mcpwm_timer_count_mode_t mcpwm_ll_timer_get_count_mode(mcpwm_dev_t *mcpwm, int timer_id)
+{
+    switch (mcpwm->timer[timer_id].timer_cfg1.timer_mod) {
+    case 1:
+        return MCPWM_TIMER_COUNT_MODE_UP;
+    case 2:
+        return MCPWM_TIMER_COUNT_MODE_DOWN;
+    case 3:
+        return MCPWM_TIMER_COUNT_MODE_UP_DOWN;
+    case 0:
+    default:
+        return MCPWM_TIMER_COUNT_MODE_PAUSE;
+    }
+}
+
+static inline void mcpwm_ll_timer_set_execute_command(mcpwm_dev_t *mcpwm, int timer_id, mcpwm_timer_execute_cmd_t cmd)
+{
+    switch (cmd) {
+    case MCPWM_TIMER_STOP_AT_ZERO:
+        mcpwm->timer[timer_id].timer_cfg1.timer_start = 0;
+        break;
+    case MCPWM_TIMER_STOP_AT_PEAK:
+        mcpwm->timer[timer_id].timer_cfg1.timer_start = 1;
+        break;
+    case MCPWM_TIMER_START_NO_STOP:
+        mcpwm->timer[timer_id].timer_cfg1.timer_start = 2;
+        break;
+    case MCPWM_TIMER_START_STOP_AT_ZERO:
+        mcpwm->timer[timer_id].timer_cfg1.timer_start = 3;
+        break;
+    case MCPWM_TIMER_START_STOP_AT_PEAK:
+        mcpwm->timer[timer_id].timer_cfg1.timer_start = 4;
+        break;
+    }
+}
+
+static inline uint32_t mcpwm_ll_timer_get_count_value(mcpwm_dev_t *mcpwm, int timer_id)
+{
+    // status.value saves the "next count value", so need an extra round up here to get the current count value according to count mode
+    // timer is paused
+    if (mcpwm->timer[timer_id].timer_cfg1.timer_mod == 0) {
+        return HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_status, timer_value);
+    }
+    if (mcpwm->timer[timer_id].timer_status.timer_direction) { // down direction
+        return (HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_status, timer_value) + 1) %
+               (HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period) + 1);
+    }
+    // up direction
+    return (HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_status, timer_value) +
+            HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period)) %
+           (HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period) + 1);
+}
+
+static inline mcpwm_timer_direction_t mcpwm_ll_timer_get_count_direction(mcpwm_dev_t *mcpwm, int timer_id)
+{
+    return mcpwm->timer[timer_id].timer_status.timer_direction ? MCPWM_TIMER_DIRECTION_DOWN : MCPWM_TIMER_DIRECTION_UP;
+}
+
+static inline void mcpwm_ll_timer_enable_sync_input(mcpwm_dev_t *mcpwm, int timer_id, bool enable)
+{
+    mcpwm->timer[timer_id].timer_sync.timer_synci_en = enable;
+}
+
+static inline void mcpwm_ll_timer_sync_out_penetrate(mcpwm_dev_t *mcpwm, int timer_id)
+{
+    // sync_out is selected to sync_in
+    mcpwm->timer[timer_id].timer_sync.timer_synco_sel = 0;
+}
+
+static inline void mcpwm_ll_timer_sync_out_on_timer_event(mcpwm_dev_t *mcpwm, int timer_id, mcpwm_timer_event_t event)
+{
+    if (event == MCPWM_TIMER_EVENT_ZERO) {
+        mcpwm->timer[timer_id].timer_sync.timer_synco_sel = 1;
+    } else if (event == MCPWM_TIMER_EVENT_PEAK) {
+        mcpwm->timer[timer_id].timer_sync.timer_synco_sel = 2;
+    } else {
+        HAL_ASSERT(false && "unknown sync out event");
+    }
+}
+
+static inline void mcpwm_ll_timer_disable_sync_out(mcpwm_dev_t *mcpwm, int timer_id)
+{
+    // sync_out will always be zero
+    mcpwm->timer[timer_id].timer_sync.timer_synco_sel = 3;
+}
+
+static inline void mcpwm_ll_timer_trigger_soft_sync(mcpwm_dev_t *mcpwm, int timer_id)
+{
+    mcpwm->timer[timer_id].timer_sync.timer_sync_sw = ~mcpwm->timer[timer_id].timer_sync.timer_sync_sw;
+}
+
+static inline void mcpwm_ll_timer_set_sync_phase_value(mcpwm_dev_t *mcpwm, int timer_id, uint32_t phase_value)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(mcpwm->timer[timer_id].timer_sync, timer_phase, phase_value);
+}
+
+static inline void mcpwm_ll_timer_set_sync_phase_direction(mcpwm_dev_t *mcpwm, int timer_id, mcpwm_timer_direction_t direction)
+{
+    mcpwm->timer[timer_id].timer_sync.timer_phase_direction = direction;
+}
+
+static inline void mcpwm_ll_timer_set_gpio_synchro(mcpwm_dev_t *mcpwm, int timer, int gpio_sync_id)
+{
+    mcpwm->timer_synci_cfg.val &= ~(0x07 << (timer * 3));
+    mcpwm->timer_synci_cfg.val |= (gpio_sync_id + 4) << (timer * 3);
+}
+
+static inline void mcpwm_ll_timer_set_timer_synchro(mcpwm_dev_t *mcpwm, int timer, int timer_sync_id)
+{
+    mcpwm->timer_synci_cfg.val &= ~(0x07 << (timer * 3));
+    mcpwm->timer_synci_cfg.val |= (timer_sync_id + 1) << (timer * 3);
+}
+
+static inline void mcpwm_ll_timer_set_soft_synchro(mcpwm_dev_t *mcpwm, int timer)
+{
+    // no sync input is selected, but software sync can still work
+    mcpwm->timer_synci_cfg.val &= ~(0x07 << (timer * 3));
+}
+
+static inline void mcpwm_ll_invert_gpio_synchro(mcpwm_dev_t *mcpwm, int sync_id, bool invert)
+{
+    if (invert) {
+        mcpwm->timer_synci_cfg.val |= 1 << (sync_id + 9);
+    } else {
+        mcpwm->timer_synci_cfg.val &= ~(1 << (sync_id + 9));
+    }
+}
+
+/********************* Operator registers *******************/
+
+static inline void mcpwm_ll_operator_flush_shadow(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    mcpwm->update_cfg.val ^= (1 << (2 * operator_id + 3));
+}
+
+static inline void mcpwm_ll_operator_select_timer(mcpwm_dev_t *mcpwm, int operator_id, int timer_id)
+{
+    if (operator_id == 0) {
+        mcpwm->operator_timersel.operator0_timersel = timer_id;
+    } else if (operator_id == 1) {
+        mcpwm->operator_timersel.operator1_timersel = timer_id;
+    } else {
+        mcpwm->operator_timersel.operator2_timersel = timer_id;
+    }
+}
+
+static inline void mcpwm_ll_operator_update_compare_at_once(mcpwm_dev_t *mcpwm, int operator_id, int compare_id)
+{
+    mcpwm->operators[operator_id].gen_stmp_cfg.val &= ~(0x0F << (4 * compare_id));
+}
+
+static inline void mcpwm_ll_operator_enable_update_compare_on_tez(mcpwm_dev_t *mcpwm, int operator_id, int compare_id, bool enable)
+{
+    if (enable) {
+        mcpwm->operators[operator_id].gen_stmp_cfg.val |= (1 << 0) << (4 * compare_id);
+    } else {
+        mcpwm->operators[operator_id].gen_stmp_cfg.val &= ~((1 << 0) << (4 * compare_id));
+    }
+}
+
+static inline void mcpwm_ll_operator_enable_update_compare_on_tep(mcpwm_dev_t *mcpwm, int operator_id, int compare_id, bool enable)
+{
+    if (enable) {
+        mcpwm->operators[operator_id].gen_stmp_cfg.val |= (1 << 1) << (4 * compare_id);
+    } else {
+        mcpwm->operators[operator_id].gen_stmp_cfg.val &= ~((1 << 1) << (4 * compare_id));
+    }
+}
+
+static inline void mcpwm_ll_operator_enable_update_compare_on_sync(mcpwm_dev_t *mcpwm, int operator_id, int compare_id, bool enable)
+{
+    if (enable) {
+        mcpwm->operators[operator_id].gen_stmp_cfg.val |= (1 << 2) << (4 * compare_id);
+    } else {
+        mcpwm->operators[operator_id].gen_stmp_cfg.val &= ~((1 << 2) << (4 * compare_id));
+    }
+}
+
+static inline void mcpwm_ll_operator_set_compare_value(mcpwm_dev_t *mcpwm, int operator_id, int compare_id, uint32_t compare_value)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(mcpwm->operators[operator_id].timestamp[compare_id], gen, compare_value);
+}
+
+static inline uint32_t mcpwm_ll_operator_get_compare_value(mcpwm_dev_t *mcpwm, int operator_id, int compare_id)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(mcpwm->operators[operator_id].timestamp[compare_id], gen);
+}
+
+static inline void mcpwm_ll_operator_update_action_at_once(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    mcpwm->operators[operator_id].gen_cfg0.gen_cfg_upmethod = 0;
+}
+
+static inline void mcpwm_ll_operator_enable_update_action_on_tez(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    if (enable) {
+        mcpwm->operators[operator_id].gen_cfg0.gen_cfg_upmethod |= 1 << 0;
+    } else {
+        mcpwm->operators[operator_id].gen_cfg0.gen_cfg_upmethod &= ~(1 << 0);
+    }
+}
+
+static inline void mcpwm_ll_operator_enable_update_action_on_tep(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    if (enable) {
+        mcpwm->operators[operator_id].gen_cfg0.gen_cfg_upmethod |= 1 << 1;
+    } else {
+        mcpwm->operators[operator_id].gen_cfg0.gen_cfg_upmethod &= ~(1 << 1);
+    }
+}
+
+static inline void mcpwm_ll_operator_enable_update_action_on_sync(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    if (enable) {
+        mcpwm->operators[operator_id].gen_cfg0.gen_cfg_upmethod |= 1 << 2;
+    } else {
+        mcpwm->operators[operator_id].gen_cfg0.gen_cfg_upmethod &= ~(1 << 2);
+    }
+}
+
+static inline void mcpwm_ll_operator_set_trigger_gpio_fault(mcpwm_dev_t *mcpwm, int operator_id, int trig_id, int fault_id)
+{
+    mcpwm->operators[operator_id].gen_cfg0.val &= ~(0x07 << (4 + 3 * trig_id));
+    mcpwm->operators[operator_id].gen_cfg0.val |= (fault_id << (4 + 3 * trig_id));
+}
+
+static inline void mcpwm_ll_operator_set_trigger_timer_sync(mcpwm_dev_t *mcpwm, int operator_id, int trig_id)
+{
+    // the timer here is not selectable, must be the one connected with the operator
+    mcpwm->operators[operator_id].gen_cfg0.val &= ~(0x07 << (4 + 3 * trig_id));
+    mcpwm->operators[operator_id].gen_cfg0.val |= (3 << (4 + 3 * trig_id));
+}
+
+/********************* Generator registers *******************/
+
+static inline void mcpwm_ll_generator_reset_actions(mcpwm_dev_t *mcpwm, int operator_id, int generator_id)
+{
+    mcpwm->operators[operator_id].generator[generator_id].val = 0;
+}
+
+static inline void mcpwm_ll_generator_set_action_on_timer_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
+        mcpwm_timer_direction_t direction, mcpwm_timer_event_t event, mcpwm_generator_action_t action)
+{
+    if (direction == MCPWM_TIMER_DIRECTION_UP) { // utez, utep
+        mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (event * 2));
+        mcpwm->operators[operator_id].generator[generator_id].val |= action << (event * 2);
+    } else if (direction == MCPWM_TIMER_DIRECTION_DOWN) { // dtez, dtep
+        mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (event * 2 + 12));
+        mcpwm->operators[operator_id].generator[generator_id].val |= action << (event * 2 + 12);
+    }
+}
+
+static inline void mcpwm_ll_generator_set_action_on_compare_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
+        mcpwm_timer_direction_t direction, int cmp_id, int action)
+{
+    if (direction == MCPWM_TIMER_DIRECTION_UP) { // utea, uteb
+        mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (cmp_id * 2 + 4));
+        mcpwm->operators[operator_id].generator[generator_id].val |= action << (cmp_id * 2 + 4);
+    } else if (direction == MCPWM_TIMER_DIRECTION_DOWN) { // dtea, dteb
+        mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (cmp_id * 2 + 16));
+        mcpwm->operators[operator_id].generator[generator_id].val |= action << (cmp_id * 2 + 16);
+    }
+}
+
+static inline void mcpwm_ll_generator_set_action_on_trigger_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
+        mcpwm_timer_direction_t direction, int trig_id, int action)
+{
+    if (direction == MCPWM_TIMER_DIRECTION_UP) { // ut0, ut1
+        mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (trig_id * 2 + 8));
+        mcpwm->operators[operator_id].generator[generator_id].val |= action << (trig_id * 2 + 8);
+    } else if (direction == MCPWM_TIMER_DIRECTION_DOWN) { // dt0, dt1
+        mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (trig_id * 2 + 20));
+        mcpwm->operators[operator_id].generator[generator_id].val |= action << (trig_id * 2 + 20);
+    }
+}
+
+static inline void mcpwm_ll_gen_trigger_noncontinue_force_action(mcpwm_dev_t *mcpwm, int operator_id, int generator_id)
+{
+    if (generator_id == 0) {
+        mcpwm->operators[operator_id].gen_force.gen_a_nciforce = ~mcpwm->operators[operator_id].gen_force.gen_a_nciforce;
+    } else {
+        mcpwm->operators[operator_id].gen_force.gen_b_nciforce = ~mcpwm->operators[operator_id].gen_force.gen_b_nciforce;
+    }
+}
+
+static inline void mcpwm_ll_gen_disable_continue_force_action(mcpwm_dev_t *mcpwm, int operator_id, int generator_id)
+{
+    mcpwm->operators[operator_id].gen_force.gen_cntuforce_upmethod = 0; // update force method immediately
+    if (generator_id == 0) {
+        mcpwm->operators[operator_id].gen_force.gen_a_cntuforce_mode = 0;
+    } else {
+        mcpwm->operators[operator_id].gen_force.gen_b_cntuforce_mode = 0;
+    }
+}
+
+static inline void mcpwm_ll_gen_disable_noncontinue_force_action(mcpwm_dev_t *mcpwm, int operator_id, int generator_id)
+{
+    if (generator_id == 0) {
+        mcpwm->operators[operator_id].gen_force.gen_a_nciforce_mode = 0;
+    } else {
+        mcpwm->operators[operator_id].gen_force.gen_b_nciforce_mode = 0;
+    }
+}
+
+static inline void mcpwm_ll_gen_set_continue_force_level(mcpwm_dev_t *mcpwm, int operator_id, int generator_id, int level)
+{
+    mcpwm->operators[operator_id].gen_force.gen_cntuforce_upmethod = 0; // update force method immediately
+    if (generator_id == 0) {
+        mcpwm->operators[operator_id].gen_force.gen_a_cntuforce_mode = level + 1;
+    } else {
+        mcpwm->operators[operator_id].gen_force.gen_b_cntuforce_mode = level + 1;
+    }
+}
+
+static inline void mcpwm_ll_gen_set_noncontinue_force_level(mcpwm_dev_t *mcpwm, int operator_id, int generator_id, int level)
+{
+    if (generator_id == 0) {
+        mcpwm->operators[operator_id].gen_force.gen_a_nciforce_mode = level + 1;
+    } else {
+        mcpwm->operators[operator_id].gen_force.gen_b_nciforce_mode = level + 1;
+    }
+}
+
+/********************* Dead time registers *******************/
+
+static inline void mcpwm_ll_deadtime_resolution_to_timer(mcpwm_dev_t *mcpwm, int operator_id, bool same)
+{
+    // whether to make the resolution of dead time delay module the same to the timer connected with operator
+    mcpwm->operators[operator_id].dt_cfg.dt_clk_sel = same;
+}
+
+static inline void mcpwm_ll_deadtime_red_select_generator(mcpwm_dev_t *mcpwm, int operator_id, int generator)
+{
+    mcpwm->operators[operator_id].dt_cfg.dt_red_insel = generator;
+}
+
+static inline void mcpwm_ll_deadtime_fed_select_generator(mcpwm_dev_t *mcpwm, int operator_id, int generator)
+{
+    mcpwm->operators[operator_id].dt_cfg.dt_fed_insel = generator;
+}
+
+static inline void mcpwm_ll_deadtime_bypass_path(mcpwm_dev_t *mcpwm, int operator_id, int path, bool bypass)
+{
+    if (bypass) {
+        mcpwm->operators[operator_id].dt_cfg.val |= 1 << (path + 15);
+    } else {
+        mcpwm->operators[operator_id].dt_cfg.val &= ~(1 << (path + 15));
+    }
+}
+
+static inline void mcpwm_ll_deadtime_invert_outpath(mcpwm_dev_t *mcpwm, int operator_id, int path, bool invert)
+{
+    if (invert) {
+        mcpwm->operators[operator_id].dt_cfg.val |= 1 << (path + 13);
+    } else {
+        mcpwm->operators[operator_id].dt_cfg.val &= ~(1 << (path + 13));
+    }
+}
+
+static inline void mcpwm_ll_deadtime_swap_out_path(mcpwm_dev_t *mcpwm, int operator_id, int path, bool swap)
+{
+    if (swap) {
+        mcpwm->operators[operator_id].dt_cfg.val |= 1 << (path + 9);
+    } else {
+        mcpwm->operators[operator_id].dt_cfg.val &= ~(1 << (path + 9));
+    }
+}
+
+static inline void mcpwm_ll_deadtime_enable_deb(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    mcpwm->operators[operator_id].dt_cfg.dt_deb_mode = enable;
+}
+
+static inline uint32_t mcpwm_ll_deadtime_get_switch_topology(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    return (mcpwm->operators[operator_id].dt_cfg.dt_deb_mode << 8) | (mcpwm->operators[operator_id].dt_cfg.dt_b_outswap << 7) |
+           (mcpwm->operators[operator_id].dt_cfg.dt_a_outswap << 6) | (mcpwm->operators[operator_id].dt_cfg.dt_fed_insel << 5) |
+           (mcpwm->operators[operator_id].dt_cfg.dt_red_insel << 4) | (mcpwm->operators[operator_id].dt_cfg.dt_fed_outinvert << 3) |
+           (mcpwm->operators[operator_id].dt_cfg.dt_red_outinvert << 2) | (mcpwm->operators[operator_id].dt_cfg.dt_a_outbypass << 1) |
+           (mcpwm->operators[operator_id].dt_cfg.dt_b_outbypass << 0);
+}
+
+static inline void mcpwm_ll_deadtime_set_falling_delay(mcpwm_dev_t *mcpwm, int operator_id, uint32_t fed)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(mcpwm->operators[operator_id].dt_fed_cfg, dt_fed, fed - 1);
+}
+
+static inline uint32_t mcpwm_ll_deadtime_get_falling_delay(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(mcpwm->operators[operator_id].dt_fed_cfg, dt_fed) + 1;
+}
+
+static inline void mcpwm_ll_deadtime_set_rising_delay(mcpwm_dev_t *mcpwm, int operator_id, uint32_t red)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(mcpwm->operators[operator_id].dt_red_cfg, dt_red, red - 1);
+}
+
+static inline uint32_t mcpwm_ll_deadtime_get_rising_delay(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(mcpwm->operators[operator_id].dt_red_cfg, dt_red) + 1;
+}
+
+static inline void mcpwm_ll_deadtime_update_delay_at_once(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    mcpwm->operators[operator_id].dt_cfg.dt_fed_upmethod = 0;
+    mcpwm->operators[operator_id].dt_cfg.dt_red_upmethod = 0;
+}
+
+static inline void mcpwm_ll_deadtime_enable_update_delay_on_tez(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    if (enable) {
+        mcpwm->operators[operator_id].dt_cfg.dt_fed_upmethod |= 1 << 0;
+        mcpwm->operators[operator_id].dt_cfg.dt_red_upmethod |= 1 << 0;
+    } else {
+        mcpwm->operators[operator_id].dt_cfg.dt_fed_upmethod &= ~(1 << 0);
+        mcpwm->operators[operator_id].dt_cfg.dt_red_upmethod &= ~(1 << 0);
+    }
+}
+
+static inline void mcpwm_ll_deadtime_enable_update_delay_on_tep(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    if (enable) {
+        mcpwm->operators[operator_id].dt_cfg.dt_fed_upmethod |= 1 << 1;
+        mcpwm->operators[operator_id].dt_cfg.dt_red_upmethod |= 1 << 1;
+    } else {
+        mcpwm->operators[operator_id].dt_cfg.dt_fed_upmethod &= ~(1 << 1);
+        mcpwm->operators[operator_id].dt_cfg.dt_red_upmethod &= ~(1 << 1);
+    }
+}
+
+static inline void mcpwm_ll_deadtime_enable_update_delay_on_sync(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    if (enable) {
+        mcpwm->operators[operator_id].dt_cfg.dt_fed_upmethod |= 1 << 2;
+        mcpwm->operators[operator_id].dt_cfg.dt_red_upmethod |= 1 << 2;
+    } else {
+        mcpwm->operators[operator_id].dt_cfg.dt_fed_upmethod &= ~(1 << 2);
+        mcpwm->operators[operator_id].dt_cfg.dt_red_upmethod &= ~(1 << 2);
+    }
+}
+
+/********************* Carrier registers *******************/
+
+static inline void mcpwm_ll_carrier_enable(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    mcpwm->operators[operator_id].carrier_cfg.carrier_en = enable;
+}
+
+static inline void mcpwm_ll_carrier_set_prescale(mcpwm_dev_t *mcpwm, int operator_id, uint8_t prescale)
+{
+    mcpwm->operators[operator_id].carrier_cfg.carrier_prescale = prescale - 1;
+}
+
+static inline uint8_t mcpwm_ll_carrier_get_prescale(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    return mcpwm->operators[operator_id].carrier_cfg.carrier_prescale + 1;
+}
+
+static inline void mcpwm_ll_carrier_set_duty(mcpwm_dev_t *mcpwm, int operator_id, uint8_t carrier_duty)
+{
+    mcpwm->operators[operator_id].carrier_cfg.carrier_duty = carrier_duty;
+}
+
+static inline uint8_t mcpwm_ll_carrier_get_duty(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    return mcpwm->operators[operator_id].carrier_cfg.carrier_duty;
+}
+
+static inline void mcpwm_ll_carrier_out_invert(mcpwm_dev_t *mcpwm, int operator_id, bool invert)
+{
+    mcpwm->operators[operator_id].carrier_cfg.carrier_out_invert = invert;
+}
+
+static inline void mcpwm_ll_carrier_in_invert(mcpwm_dev_t *mcpwm, int operator_id, bool invert)
+{
+    mcpwm->operators[operator_id].carrier_cfg.carrier_in_invert = invert;
+}
+
+static inline void mcpwm_ll_carrier_set_oneshot_width(mcpwm_dev_t *mcpwm, int operator_id, uint8_t pulse_width)
+{
+    mcpwm->operators[operator_id].carrier_cfg.carrier_oshtwth = pulse_width - 1;
+}
+
+static inline uint8_t mcpwm_ll_carrier_get_oneshot_width(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    return mcpwm->operators[operator_id].carrier_cfg.carrier_oshtwth + 1;
+}
+
+/********************* Fault detector registers *******************/
+
+static inline void mcpwm_ll_fault_enable_detection(mcpwm_dev_t *mcpwm, int fault_sig, bool enable)
+{
+    if (enable) {
+        mcpwm->fault_detect.val |= 1 << fault_sig;
+    } else {
+        mcpwm->fault_detect.val &= ~(1 << fault_sig);
+    }
+}
+
+static inline void mcpwm_ll_fault_set_active_level(mcpwm_dev_t *mcpwm, int fault_sig, bool level)
+{
+    if (level) {
+        mcpwm->fault_detect.val |= 1 << (fault_sig + 3);
+    } else {
+        mcpwm->fault_detect.val &= ~(1 << (fault_sig + 3));
+    }
+}
+
+static inline void mcpwm_ll_fault_clear_ost(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    // a posedge can clear the ost fault status
+    mcpwm->operators[operator_id].fh_cfg1.fh_clr_ost = 0;
+    mcpwm->operators[operator_id].fh_cfg1.fh_clr_ost = 1;
+}
+
+static inline void mcpwm_ll_fault_enable_oneshot_mode(mcpwm_dev_t *mcpwm, int operator_id, int fault_sig, bool enable)
+{
+    mcpwm->operators[operator_id].fh_cfg0.val &= ~(1 << (7 - fault_sig));
+    mcpwm->operators[operator_id].fh_cfg0.val |= (enable << (7 - fault_sig));
+}
+
+static inline void mcpwm_ll_fault_enable_cbc_mode(mcpwm_dev_t *mcpwm, int operator_id, int fault_sig, bool enable)
+{
+    mcpwm->operators[operator_id].fh_cfg0.val &= ~(1 << (3 - fault_sig));
+    mcpwm->operators[operator_id].fh_cfg0.val |= (enable << (3 - fault_sig));
+}
+
+static inline void mcpwm_ll_fault_enable_cbc_refresh_on_tez(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    if (enable) {
+        mcpwm->operators[operator_id].fh_cfg1.val |= 1 << 1;
+    } else {
+        mcpwm->operators[operator_id].fh_cfg1.val &= ~(1 << 1);
+    }
+}
+
+static inline void mcpwm_ll_fault_enable_cbc_refresh_on_tep(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    if (enable) {
+        mcpwm->operators[operator_id].fh_cfg1.val |= 1 << 2;
+    } else {
+        mcpwm->operators[operator_id].fh_cfg1.val &= ~(1 << 2);
+    }
+}
+
+static inline void mcpwm_ll_fault_enable_sw_cbc(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    mcpwm->operators[operator_id].fh_cfg0.fh_sw_cbc = enable;
+}
+
+static inline void mcpwm_ll_fault_enable_sw_oneshot(mcpwm_dev_t *mcpwm, int operator_id, bool enable)
+{
+    mcpwm->operators[operator_id].fh_cfg0.fh_sw_ost = enable;
+}
+
+static inline void mcpwm_ll_fault_trigger_sw_cbc(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    mcpwm->operators[operator_id].fh_cfg1.fh_force_cbc = ~mcpwm->operators[operator_id].fh_cfg1.fh_force_cbc;
+}
+
+static inline void mcpwm_ll_fault_trigger_sw_ost(mcpwm_dev_t *mcpwm, int operator_id)
+{
+    mcpwm->operators[operator_id].fh_cfg1.fh_force_ost = ~mcpwm->operators[operator_id].fh_cfg1.fh_force_ost;
+}
+
+static inline void mcpwm_ll_generator_set_action_on_trip_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
+        mcpwm_timer_direction_t direction, mcpwm_trip_type_t trip, int action)
+{
+    if (direction == MCPWM_TIMER_DIRECTION_UP) {
+        mcpwm->operators[operator_id].fh_cfg0.val &= ~(0x03 << (8 + 8 * generator_id + 4 * trip + 2));
+        mcpwm->operators[operator_id].fh_cfg0.val |= action << (8 + 8 * generator_id + 4 * trip + 2);
+    } else if (direction == MCPWM_TIMER_DIRECTION_DOWN) {
+        mcpwm->operators[operator_id].fh_cfg0.val &= ~(0x03 << (8 + 8 * generator_id + 4 * trip));
+        mcpwm->operators[operator_id].fh_cfg0.val |= action << (8 + 8 * generator_id + 4 * trip);
+    }
+}
+
+static inline bool mcpwm_ll_fault_is_ost_on(mcpwm_dev_t *mcpwm, int op)
+{
+    return mcpwm->operators[op].fh_status.fh_ost_on;
+}
+
+static inline bool mcpwm_ll_fault_is_cbc_on(mcpwm_dev_t *mcpwm, int op)
+{
+    return mcpwm->operators[op].fh_status.fh_cbc_on;
+}
+
+/********************* Capture registers *******************/
+
+static inline void mcpwm_ll_capture_enable_timer(mcpwm_dev_t *mcpwm, bool enable)
+{
+    mcpwm->cap_timer_cfg.cap_timer_en = enable;
+}
+
+static inline void mcpwm_ll_capture_enable_channel(mcpwm_dev_t *mcpwm, int channel, bool enable)
+{
+    mcpwm->cap_chn_cfg[channel].capn_en = enable;
+}
+
+static inline void mcpwm_ll_capture_set_sync_phase_value(mcpwm_dev_t *mcpwm, uint32_t phase_value)
+{
+    mcpwm->cap_timer_phase.cap_timer_phase = phase_value;
+}
+
+static inline uint32_t mcpwm_ll_capture_get_sync_phase_value(mcpwm_dev_t *mcpwm)
+{
+    return mcpwm->cap_timer_phase.cap_timer_phase;
+}
+
+static inline void mcpwm_ll_capture_enable_timer_sync(mcpwm_dev_t *mcpwm, bool enable)
+{
+    mcpwm->cap_timer_cfg.cap_synci_en = enable;
+}
+
+static inline void mcpwm_ll_capture_set_internal_timer_synchro(mcpwm_dev_t *mcpwm, int sync_out_timer)
+{
+    mcpwm->cap_timer_cfg.cap_synci_sel = sync_out_timer + 1;
+}
+
+static inline void mcpwm_ll_capture_set_external_synchro(mcpwm_dev_t *mcpwm, int extern_synchro)
+{
+    mcpwm->cap_timer_cfg.cap_synci_sel = extern_synchro + 4;
+}
+
+static inline void mcpwm_ll_capture_trigger_sw_sync(mcpwm_dev_t *mcpwm)
+{
+    mcpwm->cap_timer_cfg.cap_sync_sw = 1; // auto clear
+}
+
+static inline void mcpwm_ll_capture_enable_posedge(mcpwm_dev_t *mcpwm, int channel, bool enable)
+{
+    if (enable) {
+        mcpwm->cap_chn_cfg[channel].val |= 1 << 2;
+    } else {
+        mcpwm->cap_chn_cfg[channel].val &= ~(1 << 2);
+    }
+}
+
+static inline void mcpwm_ll_capture_enable_negedge(mcpwm_dev_t *mcpwm, int channel, bool enable)
+{
+    if (enable) {
+        mcpwm->cap_chn_cfg[channel].val |= 1 << 1;
+    } else {
+        mcpwm->cap_chn_cfg[channel].val &= ~(1 << 1);
+    }
+}
+
+static inline void mcpwm_ll_invert_input(mcpwm_dev_t *mcpwm, int channel, bool invert)
+{
+    mcpwm->cap_chn_cfg[channel].capn_in_invert = invert;
+}
+
+static inline void mcpwm_ll_trigger_soft_capture(mcpwm_dev_t *mcpwm, int channel)
+{
+    mcpwm->cap_chn_cfg[channel].capn_sw = 1; // auto clear
+}
+
+__attribute__((always_inline))
+static inline uint32_t mcpwm_ll_capture_get_value(mcpwm_dev_t *mcpwm, int channel)
+{
+    return mcpwm->cap_chn[channel].capn_value;
+}
+
+__attribute__((always_inline))
+static inline bool mcpwm_ll_capture_is_negedge(mcpwm_dev_t *mcpwm, int channel)
+{
+    return mcpwm->cap_status.val & (1 << channel) ? true : false;
+}
+
+static inline void mcpwm_ll_capture_set_prescale(mcpwm_dev_t *mcpwm, int channel, uint32_t prescale)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(mcpwm->cap_chn_cfg[channel], capn_prescale, prescale - 1);
+}
+
+static inline uint32_t mcpwm_ll_capture_get_prescale(mcpwm_dev_t *mcpwm, int channel)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(mcpwm->cap_chn_cfg[channel], capn_prescale) + 1;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/memprot_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/memprot_ll.h
new file mode 100644
index 00000000000..41410cc80f6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/memprot_ll.h
@@ -0,0 +1,656 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "hal/assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// not implemented for esp32s3 yet
+#if 0
+/**
+ * === IRAM0 ====
+ */
+
+#define IRAM0_TOTAL_UNI_BLOCKS          4
+#define IRAM0_UNI_BLOCK_0               0
+#define IRAM0_UNI_BLOCK_1               1
+#define IRAM0_UNI_BLOCK_2               2
+#define IRAM0_UNI_BLOCK_3               3
+
+#define IRAM0_SPL_BLOCK_BASE            0x40000000
+
+//unified management (SRAM blocks 0-3)
+#define IRAM0_UNI_BLOCK_0_LOW           0x40020000
+#define IRAM0_UNI_BLOCK_0_HIGH          0x40021FFF
+#define IRAM0_UNI_BLOCK_1_LOW           0x40022000
+#define IRAM0_UNI_BLOCK_1_HIGH          0x40023FFF
+#define IRAM0_UNI_BLOCK_2_LOW           0x40024000
+#define IRAM0_UNI_BLOCK_2_HIGH          0x40025FFF
+#define IRAM0_UNI_BLOCK_3_LOW           0x40026000
+#define IRAM0_UNI_BLOCK_3_HIGH          0x40027FFF
+
+//split management (SRAM blocks 4-21)
+#define IRAM0_SPL_BLOCK_LOW             0x40028000 //block 4 low
+#define IRAM0_SPL_BLOCK_HIGH            0x4006FFFF //block 21 high
+#define IRAM0_SPLTADDR_MIN              0x40030000 //block 6 low - minimum splitting address
+
+//IRAM0 interrupt status bitmasks
+#define IRAM0_INTR_ST_FAULTADDR_M       0x003FFFFC  //(bits 21:6 in the reg, as well as in real address)
+#define IRAM0_INTR_ST_FAULTADDR_HI      0x40000000  //(high nonsignificant bits 31:22 of the faulting address - constant)
+#define IRAM0_INTR_ST_OP_TYPE_BIT       BIT(1)      //instruction: 0, data: 1
+#define IRAM0_INTR_ST_OP_RW_BIT         BIT(0)      //read: 0, write: 1
+
+
+static inline uint32_t esp_memprot_iram0_get_intr_source_num(void)
+{
+    return ETS_PMS_PRO_IRAM0_ILG_INTR_SOURCE;
+}
+
+static inline void esp_memprot_iram0_intr_ena(bool enable)
+{
+    if ( enable ) {
+        DPORT_SET_PERI_REG_MASK( DPORT_PMS_PRO_IRAM0_4_REG, DPORT_PMS_PRO_IRAM0_ILG_EN );
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK( DPORT_PMS_PRO_IRAM0_4_REG, DPORT_PMS_PRO_IRAM0_ILG_EN );
+    }
+}
+
+static inline uint32_t esp_memprot_iram0_get_ena_reg(void)
+{
+    return DPORT_READ_PERI_REG(DPORT_PMS_PRO_IRAM0_4_REG);
+}
+
+static inline uint32_t esp_memprot_iram0_get_fault_reg(void)
+{
+    return DPORT_READ_PERI_REG(DPORT_PMS_PRO_IRAM0_5_REG);
+}
+
+static inline void esp_memprot_iram0_get_fault_status(uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype)
+{
+    uint32_t status_bits = esp_memprot_iram0_get_fault_reg();
+
+    uint32_t fault_addr = (status_bits & IRAM0_INTR_ST_FAULTADDR_M);
+    *faulting_address = (uint32_t *)(fault_addr | IRAM0_INTR_ST_FAULTADDR_HI);
+
+    *op_type = (uint32_t)status_bits & IRAM0_INTR_ST_OP_RW_BIT;
+    *op_subtype = (uint32_t)status_bits & IRAM0_INTR_ST_OP_TYPE_BIT;
+}
+
+static inline bool esp_memprot_iram0_is_assoc_intr(void)
+{
+    return DPORT_GET_PERI_REG_MASK(DPORT_PMS_PRO_IRAM0_4_REG, DPORT_PMS_PRO_IRAM0_ILG_INTR) > 0;
+}
+
+static inline void esp_memprot_iram0_clear_intr(void)
+{
+    DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_IRAM0_4_REG, DPORT_PMS_PRO_IRAM0_ILG_CLR);
+}
+
+static inline uint32_t esp_memprot_iram0_get_intr_ena_bit(void)
+{
+    return DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_4_REG, DPORT_PMS_PRO_IRAM0_ILG_EN);
+}
+
+static inline uint32_t esp_memprot_iram0_get_intr_on_bit(void)
+{
+    return DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_4_REG, DPORT_PMS_PRO_IRAM0_ILG_INTR);
+}
+
+static inline uint32_t esp_memprot_iram0_get_intr_clr_bit(void)
+{
+    return DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_4_REG, DPORT_PMS_PRO_IRAM0_ILG_CLR);
+}
+
+//resets automatically on CPU restart
+static inline void esp_memprot_iram0_set_lock(void)
+{
+    DPORT_WRITE_PERI_REG( DPORT_PMS_PRO_IRAM0_0_REG, DPORT_PMS_PRO_IRAM0_LOCK);
+}
+
+static inline uint32_t esp_memprot_iram0_get_lock_reg(void)
+{
+    return DPORT_READ_PERI_REG(DPORT_PMS_PRO_IRAM0_0_REG);
+}
+
+static inline uint32_t esp_memprot_iram0_get_lock_bit(void)
+{
+    return DPORT_REG_GET_FIELD(DPORT_PMS_PRO_IRAM0_0_REG, DPORT_PMS_PRO_IRAM0_LOCK);
+}
+
+//block 0-3
+static inline void esp_memprot_iram0_set_uni_block_perm(uint32_t block, bool write_perm, bool read_perm, bool exec_perm)
+{
+    HAL_ASSERT(block < IRAM0_TOTAL_UNI_BLOCKS);
+
+    uint32_t write_bit, read_bit, exec_bit;
+    switch ( block ) {
+    case IRAM0_UNI_BLOCK_0:
+        write_bit = DPORT_PMS_PRO_IRAM0_SRAM_0_W;
+        read_bit = DPORT_PMS_PRO_IRAM0_SRAM_0_R;
+        exec_bit = DPORT_PMS_PRO_IRAM0_SRAM_0_F;
+        break;
+    case IRAM0_UNI_BLOCK_1:
+        write_bit = DPORT_PMS_PRO_IRAM0_SRAM_1_W;
+        read_bit = DPORT_PMS_PRO_IRAM0_SRAM_1_R;
+        exec_bit = DPORT_PMS_PRO_IRAM0_SRAM_1_F;
+        break;
+    case IRAM0_UNI_BLOCK_2:
+        write_bit = DPORT_PMS_PRO_IRAM0_SRAM_2_W;
+        read_bit = DPORT_PMS_PRO_IRAM0_SRAM_2_R;
+        exec_bit = DPORT_PMS_PRO_IRAM0_SRAM_2_F;
+        break;
+    case IRAM0_UNI_BLOCK_3:
+        write_bit = DPORT_PMS_PRO_IRAM0_SRAM_3_W;
+        read_bit = DPORT_PMS_PRO_IRAM0_SRAM_3_R;
+        exec_bit = DPORT_PMS_PRO_IRAM0_SRAM_3_F;
+        break;
+    default:
+        abort();
+    }
+
+    if ( write_perm ) {
+        DPORT_SET_PERI_REG_MASK( DPORT_PMS_PRO_IRAM0_1_REG, write_bit );
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK( DPORT_PMS_PRO_IRAM0_1_REG, write_bit );
+    }
+
+    if ( read_perm ) {
+        DPORT_SET_PERI_REG_MASK( DPORT_PMS_PRO_IRAM0_1_REG, read_bit );
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK( DPORT_PMS_PRO_IRAM0_1_REG, read_bit );
+    }
+
+    if ( exec_perm ) {
+        DPORT_SET_PERI_REG_MASK( DPORT_PMS_PRO_IRAM0_1_REG, exec_bit );
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK( DPORT_PMS_PRO_IRAM0_1_REG, exec_bit );
+    }
+}
+
+static inline uint32_t esp_memprot_iram0_get_uni_block_read_bit(uint32_t block)
+{
+    HAL_ASSERT(block < IRAM0_TOTAL_UNI_BLOCKS);
+
+    switch ( block ) {
+    case IRAM0_UNI_BLOCK_0:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_0_R );
+    case IRAM0_UNI_BLOCK_1:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_1_R );
+    case IRAM0_UNI_BLOCK_2:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_2_R );
+    case IRAM0_UNI_BLOCK_3:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_3_R );
+    default:
+        abort();
+    }
+}
+
+static inline uint32_t esp_memprot_iram0_get_uni_block_write_bit(uint32_t block)
+{
+    HAL_ASSERT(block < IRAM0_TOTAL_UNI_BLOCKS);
+
+    switch ( block ) {
+    case IRAM0_UNI_BLOCK_0:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_0_W );
+    case IRAM0_UNI_BLOCK_1:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_1_W );
+    case IRAM0_UNI_BLOCK_2:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_2_W );
+    case IRAM0_UNI_BLOCK_3:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_3_W );
+    default:
+        abort();
+    }
+}
+
+static inline uint32_t esp_memprot_iram0_get_uni_block_exec_bit(uint32_t block)
+{
+    HAL_ASSERT(block < IRAM0_TOTAL_UNI_BLOCKS);
+
+    switch ( block ) {
+    case IRAM0_UNI_BLOCK_0:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_0_F );
+    case IRAM0_UNI_BLOCK_1:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_1_F );
+    case IRAM0_UNI_BLOCK_2:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_2_F );
+    case IRAM0_UNI_BLOCK_3:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_1_REG, DPORT_PMS_PRO_IRAM0_SRAM_3_F );
+    default:
+        abort();
+    }
+}
+
+static inline void esp_memprot_iram0_get_uni_block_sgnf_bits(uint32_t block, uint32_t *write_bit, uint32_t *read_bit, uint32_t *exec_bit)
+{
+    HAL_ASSERT(block < IRAM0_TOTAL_UNI_BLOCKS);
+
+    switch ( block ) {
+    case IRAM0_UNI_BLOCK_0:
+        *write_bit = DPORT_PMS_PRO_IRAM0_SRAM_0_W;
+        *read_bit = DPORT_PMS_PRO_IRAM0_SRAM_0_R;
+        *exec_bit = DPORT_PMS_PRO_IRAM0_SRAM_0_F;
+        break;
+    case IRAM0_UNI_BLOCK_1:
+        *write_bit = DPORT_PMS_PRO_IRAM0_SRAM_1_W;
+        *read_bit = DPORT_PMS_PRO_IRAM0_SRAM_1_R;
+        *exec_bit = DPORT_PMS_PRO_IRAM0_SRAM_1_F;
+        break;
+    case IRAM0_UNI_BLOCK_2:
+        *write_bit = DPORT_PMS_PRO_IRAM0_SRAM_2_W;
+        *read_bit = DPORT_PMS_PRO_IRAM0_SRAM_2_R;
+        *exec_bit = DPORT_PMS_PRO_IRAM0_SRAM_2_F;
+        break;
+    case IRAM0_UNI_BLOCK_3:
+        *write_bit = DPORT_PMS_PRO_IRAM0_SRAM_3_W;
+        *read_bit = DPORT_PMS_PRO_IRAM0_SRAM_3_R;
+        *exec_bit = DPORT_PMS_PRO_IRAM0_SRAM_3_F;
+        break;
+    default:
+        abort();
+    }
+}
+
+static inline uint32_t esp_memprot_iram0_get_perm_uni_reg(void)
+{
+    return DPORT_READ_PERI_REG(DPORT_PMS_PRO_IRAM0_1_REG);
+}
+
+static inline uint32_t esp_memprot_iram0_get_perm_split_reg(void)
+{
+    return DPORT_READ_PERI_REG(DPORT_PMS_PRO_IRAM0_2_REG);
+}
+
+static inline void esp_memprot_iram0_set_prot(uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx)
+{
+    uint32_t addr = (uint32_t)split_addr;
+    HAL_ASSERT(addr <= IRAM0_SPL_BLOCK_HIGH);
+
+    //find possible split.address in low region blocks
+    int uni_blocks_low = -1;
+    if ( addr >= IRAM0_UNI_BLOCK_0_LOW ) {
+        uni_blocks_low++;
+    }
+    if ( addr >= IRAM0_UNI_BLOCK_1_LOW ) {
+        uni_blocks_low++;
+    }
+    if ( addr >= IRAM0_UNI_BLOCK_2_LOW ) {
+        uni_blocks_low++;
+    }
+    if ( addr >= IRAM0_UNI_BLOCK_3_LOW ) {
+        uni_blocks_low++;
+    }
+
+    //unified mgmt settings per block (bits W/R/X: [11:9] bl3, [8:6] bl2, [5:3] bl1, [2:0] bl0)
+    uint32_t write_bit, read_bit, exec_bit;
+    uint32_t uni_block_perm = 0;
+
+    for ( size_t x = 0; x < IRAM0_TOTAL_UNI_BLOCKS; x++ ) {
+        esp_memprot_iram0_get_uni_block_sgnf_bits(x, &write_bit, &read_bit, &exec_bit);
+        if ( x <= uni_blocks_low ) {
+            if (lw) {
+                uni_block_perm |= write_bit;
+            }
+            if (lr) {
+                uni_block_perm |= read_bit;
+            }
+            if (lx) {
+                uni_block_perm |= exec_bit;
+            }
+        } else {
+            if (hw) {
+                uni_block_perm |= write_bit;
+            }
+            if (hr) {
+                uni_block_perm |= read_bit;
+            }
+            if (hx) {
+                uni_block_perm |= exec_bit;
+            }
+        }
+    }
+
+    //if splt.ddr not set yet, do required normalization to make the addr writeble into splt.mgmt cfg register
+    uint32_t reg_split_addr = 0;
+
+    if ( addr >= IRAM0_SPL_BLOCK_LOW ) {
+
+        //split Address must be WORD aligned
+        reg_split_addr = addr >> 2;
+        HAL_ASSERT(addr == (reg_split_addr << 2));
+
+        //use only 17 signf.bits as the cropped parts are constant for whole section (bits [16:0])
+        reg_split_addr = (reg_split_addr << DPORT_PMS_PRO_IRAM0_SRAM_4_SPLTADDR_S) & DPORT_PMS_PRO_IRAM0_SRAM_4_SPLTADDR_M;
+    }
+
+    //prepare high & low permission mask (bits: [22:20] high range, [19:17] low range)
+    uint32_t permission_mask = 0;
+    if ( lw ) {
+        permission_mask |= DPORT_PMS_PRO_IRAM0_SRAM_4_L_W;
+    }
+    if ( lr ) {
+        permission_mask |= DPORT_PMS_PRO_IRAM0_SRAM_4_L_R;
+    }
+    if ( lx ) {
+        permission_mask |= DPORT_PMS_PRO_IRAM0_SRAM_4_L_F;
+    }
+    if ( hw ) {
+        permission_mask |= DPORT_PMS_PRO_IRAM0_SRAM_4_H_W;
+    }
+    if ( hr ) {
+        permission_mask |= DPORT_PMS_PRO_IRAM0_SRAM_4_H_R;
+    }
+    if ( hx ) {
+        permission_mask |= DPORT_PMS_PRO_IRAM0_SRAM_4_H_F;
+    }
+
+    //write both cfg. registers
+    DPORT_WRITE_PERI_REG( DPORT_PMS_PRO_IRAM0_1_REG, uni_block_perm );
+    DPORT_WRITE_PERI_REG( DPORT_PMS_PRO_IRAM0_2_REG, reg_split_addr | permission_mask );
+}
+
+static inline void esp_memprot_iram0_get_split_sgnf_bits(bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx)
+{
+    *lw = DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_L_W );
+    *lr = DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_L_R );
+    *lx = DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_L_F );
+    *hw = DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_H_W );
+    *hr = DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_H_R );
+    *hx = DPORT_REG_GET_FIELD( DPORT_PMS_PRO_IRAM0_2_REG, DPORT_PMS_PRO_IRAM0_SRAM_4_H_F );
+}
+
+/**
+ * === DRAM0 ====
+ */
+
+#define DRAM0_TOTAL_UNI_BLOCKS          4
+#define DRAM0_UNI_BLOCK_0               0
+#define DRAM0_UNI_BLOCK_1               1
+#define DRAM0_UNI_BLOCK_2               2
+#define DRAM0_UNI_BLOCK_3               3
+
+#define DRAM0_SPL_BLOCK_BASE            0x3FFB0000
+
+//unified management (SRAM blocks 0-3)
+#define DRAM0_UNI_BLOCK_0_LOW           0x3FFB0000
+#define DRAM0_UNI_BLOCK_0_HIGH          0x3FFB1FFF
+#define DRAM0_UNI_BLOCK_1_LOW           0x3FFB2000
+#define DRAM0_UNI_BLOCK_1_HIGH          0x3FFB3FFF
+#define DRAM0_UNI_BLOCK_2_LOW           0x3FFB4000
+#define DRAM0_UNI_BLOCK_2_HIGH          0x3FFB5FFF
+#define DRAM0_UNI_BLOCK_3_LOW           0x3FFB6000
+#define DRAM0_UNI_BLOCK_3_HIGH          0x3FFB7FFF
+
+//split management (SRAM blocks 4-21)
+#define DRAM0_SPL_BLOCK_LOW             0x3FFB8000  //block 4 low
+#define DRAM0_SPL_BLOCK_HIGH            0x3FFFFFFF  //block 21 high
+#define DRAM0_SPLTADDR_MIN              0x3FFC0000  //block 6 low - minimum splitting address
+
+//DRAM0 interrupt status bitmasks
+#define DRAM0_INTR_ST_FAULTADDR_M       0x03FFFFC0  //(bits 25:6 in the reg)
+#define DRAM0_INTR_ST_FAULTADDR_S       0x4         //(bits 21:2 of real address)
+#define DRAM0_INTR_ST_FAULTADDR_HI      0x3FF00000  //(high nonsignificant bits 31:22 of the faulting address - constant)
+#define DRAM0_INTR_ST_OP_RW_BIT         BIT(4)      //read: 0, write: 1
+#define DRAM0_INTR_ST_OP_ATOMIC_BIT     BIT(5)      //non-atomic: 0, atomic: 1
+
+
+static inline uint32_t esp_memprot_dram0_get_intr_source_num(void)
+{
+    return ETS_PMS_PRO_DRAM0_ILG_INTR_SOURCE;
+}
+
+static inline void esp_memprot_dram0_intr_ena(bool enable)
+{
+    if ( enable ) {
+        DPORT_SET_PERI_REG_MASK( DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_EN );
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK( DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_EN );
+    }
+}
+
+static inline bool esp_memprot_dram0_is_assoc_intr(void)
+{
+    return DPORT_GET_PERI_REG_MASK(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_INTR) > 0;
+}
+
+static inline void esp_memprot_dram0_clear_intr(void)
+{
+    DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_CLR);
+}
+
+static inline uint32_t esp_memprot_dram0_get_intr_ena_bit(void)
+{
+    return DPORT_REG_GET_FIELD(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_EN);
+}
+
+static inline uint32_t esp_memprot_dram0_get_intr_on_bit(void)
+{
+    return DPORT_REG_GET_FIELD(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_INTR);
+}
+
+static inline uint32_t esp_memprot_dram0_get_intr_clr_bit(void)
+{
+    return DPORT_REG_GET_FIELD(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_CLR);
+}
+
+static inline uint32_t esp_memprot_dram0_get_lock_bit(void)
+{
+    return DPORT_REG_GET_FIELD(DPORT_PMS_PRO_DRAM0_0_REG, DPORT_PMS_PRO_DRAM0_LOCK);
+}
+
+static inline void esp_memprot_dram0_get_uni_block_sgnf_bits(uint32_t block, uint32_t *write_bit, uint32_t *read_bit)
+{
+    HAL_ASSERT(block < DRAM0_TOTAL_UNI_BLOCKS);
+
+    switch ( block ) {
+    case DRAM0_UNI_BLOCK_0:
+        *write_bit = DPORT_PMS_PRO_DRAM0_SRAM_0_W;
+        *read_bit = DPORT_PMS_PRO_DRAM0_SRAM_0_R;
+        break;
+    case DRAM0_UNI_BLOCK_1:
+        *write_bit = DPORT_PMS_PRO_DRAM0_SRAM_1_W;
+        *read_bit = DPORT_PMS_PRO_DRAM0_SRAM_1_R;
+        break;
+    case DRAM0_UNI_BLOCK_2:
+        *write_bit = DPORT_PMS_PRO_DRAM0_SRAM_2_W;
+        *read_bit = DPORT_PMS_PRO_DRAM0_SRAM_2_R;
+        break;
+    case DRAM0_UNI_BLOCK_3:
+        *write_bit = DPORT_PMS_PRO_DRAM0_SRAM_3_W;
+        *read_bit = DPORT_PMS_PRO_DRAM0_SRAM_3_R;
+        break;
+    default:
+        abort();
+    }
+}
+
+static inline void esp_memprot_dram0_set_uni_block_perm(uint32_t block, bool write_perm, bool read_perm)
+{
+    HAL_ASSERT(block < DRAM0_TOTAL_UNI_BLOCKS);
+
+    uint32_t write_bit, read_bit;
+    esp_memprot_dram0_get_uni_block_sgnf_bits(block, &write_bit, &read_bit);
+
+    if ( write_perm ) {
+        DPORT_SET_PERI_REG_MASK( DPORT_PMS_PRO_DRAM0_1_REG, write_bit );
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK( DPORT_PMS_PRO_DRAM0_1_REG, write_bit );
+    }
+
+    if ( read_perm ) {
+        DPORT_SET_PERI_REG_MASK( DPORT_PMS_PRO_DRAM0_1_REG, read_bit );
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK( DPORT_PMS_PRO_DRAM0_1_REG, read_bit );
+    }
+}
+
+static inline uint32_t esp_memprot_dram0_get_uni_block_read_bit(uint32_t block)
+{
+    HAL_ASSERT(block < DRAM0_TOTAL_UNI_BLOCKS);
+
+    switch ( block ) {
+    case DRAM0_UNI_BLOCK_0:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_0_R );
+    case DRAM0_UNI_BLOCK_1:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_1_R );
+    case DRAM0_UNI_BLOCK_2:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_2_R );
+    case DRAM0_UNI_BLOCK_3:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_3_R );
+    default:
+        abort();
+    }
+}
+
+static inline uint32_t esp_memprot_dram0_get_uni_block_write_bit(uint32_t block)
+{
+    HAL_ASSERT(block < DRAM0_TOTAL_UNI_BLOCKS);
+
+    switch ( block ) {
+    case DRAM0_UNI_BLOCK_0:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_0_W );
+    case DRAM0_UNI_BLOCK_1:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_1_W );
+    case DRAM0_UNI_BLOCK_2:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_2_W );
+    case DRAM0_UNI_BLOCK_3:
+        return DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_3_W );
+    default:
+        abort();
+    }
+}
+
+static inline uint32_t esp_memprot_dram0_get_lock_reg(void)
+{
+    return DPORT_READ_PERI_REG(DPORT_PMS_PRO_DRAM0_0_REG);
+}
+
+//lock resets automatically on CPU restart
+static inline void esp_memprot_dram0_set_lock(void)
+{
+    DPORT_WRITE_PERI_REG( DPORT_PMS_PRO_DRAM0_0_REG, DPORT_PMS_PRO_DRAM0_LOCK);
+}
+
+static inline uint32_t esp_memprot_dram0_get_perm_reg(void)
+{
+    return DPORT_READ_PERI_REG(DPORT_PMS_PRO_DRAM0_1_REG);
+}
+
+static inline uint32_t esp_memprot_dram0_get_ena_reg(void)
+{
+    return DPORT_READ_PERI_REG(DPORT_PMS_PRO_DRAM0_3_REG);
+}
+
+static inline uint32_t esp_memprot_dram0_get_fault_reg(void)
+{
+    return DPORT_READ_PERI_REG(DPORT_PMS_PRO_DRAM0_4_REG);
+}
+
+static inline void esp_memprot_dram0_get_fault_status(uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype)
+{
+    uint32_t status_bits = esp_memprot_dram0_get_fault_reg();
+
+    uint32_t fault_addr = (status_bits & DRAM0_INTR_ST_FAULTADDR_M) >> DRAM0_INTR_ST_FAULTADDR_S;
+    *faulting_address = (uint32_t *)(fault_addr | DRAM0_INTR_ST_FAULTADDR_HI);
+
+    *op_type = (uint32_t)status_bits & DRAM0_INTR_ST_OP_RW_BIT;
+    *op_subtype = (uint32_t)status_bits & DRAM0_INTR_ST_OP_ATOMIC_BIT;
+}
+
+static inline void esp_memprot_dram0_set_prot(uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr)
+{
+    uint32_t addr = (uint32_t)split_addr;
+
+    //low boundary check provided by LD script. see comment in esp_memprot_iram0_set_prot()
+    HAL_ASSERT(addr <= DRAM0_SPL_BLOCK_HIGH);
+
+    //set low region
+    int uni_blocks_low = -1;
+    if ( addr >= DRAM0_UNI_BLOCK_0_LOW ) {
+        uni_blocks_low++;
+    }
+    if ( addr >= DRAM0_UNI_BLOCK_1_LOW ) {
+        uni_blocks_low++;
+    }
+    if ( addr >= DRAM0_UNI_BLOCK_2_LOW ) {
+        uni_blocks_low++;
+    }
+    if ( addr >= DRAM0_UNI_BLOCK_3_LOW ) {
+        uni_blocks_low++;
+    }
+
+    //set unified mgmt region
+    uint32_t write_bit, read_bit, uni_block_perm = 0;
+    for ( size_t x = 0; x < DRAM0_TOTAL_UNI_BLOCKS; x++ ) {
+        esp_memprot_dram0_get_uni_block_sgnf_bits(x, &write_bit, &read_bit);
+        if ( x <= uni_blocks_low ) {
+            if (lw) {
+                uni_block_perm |= write_bit;
+            }
+            if (lr) {
+                uni_block_perm |= read_bit;
+            }
+        } else {
+            if (hw) {
+                uni_block_perm |= write_bit;
+            }
+            if (hr) {
+                uni_block_perm |= read_bit;
+            }
+        }
+    }
+
+    //check split address is WORD aligned
+    uint32_t reg_split_addr = addr >> 2;
+    HAL_ASSERT(addr == (reg_split_addr << 2));
+
+    //shift aligned split address to proper bit offset
+    reg_split_addr = (reg_split_addr << DPORT_PMS_PRO_DRAM0_SRAM_4_SPLTADDR_S) & DPORT_PMS_PRO_DRAM0_SRAM_4_SPLTADDR_M;
+
+    //prepare high & low permission mask
+    uint32_t permission_mask = 0;
+    if (lw) {
+        permission_mask |= DPORT_PMS_PRO_DRAM0_SRAM_4_L_W;
+    }
+    if (lr) {
+        permission_mask |= DPORT_PMS_PRO_DRAM0_SRAM_4_L_R;
+    }
+    if (hw) {
+        permission_mask |= DPORT_PMS_PRO_DRAM0_SRAM_4_H_W;
+    }
+    if (hr) {
+        permission_mask |= DPORT_PMS_PRO_DRAM0_SRAM_4_H_R;
+    }
+
+    //write configuration to DPORT_PMS_PRO_DRAM0_1_REG
+    DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_DRAM0_1_REG, reg_split_addr | permission_mask | uni_block_perm);
+}
+
+static inline void esp_memprot_dram0_get_split_sgnf_bits(bool *lw, bool *lr, bool *hw, bool *hr)
+{
+    *lw = DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_4_L_W );
+    *lr = DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_4_L_R );
+    *hw = DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_4_H_W );
+    *hr = DPORT_REG_GET_FIELD( DPORT_PMS_PRO_DRAM0_1_REG, DPORT_PMS_PRO_DRAM0_SRAM_4_H_R );
+}
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/mpu_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/mpu_ll.h
new file mode 100644
index 00000000000..2ec955b48f9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/mpu_ll.h
@@ -0,0 +1,62 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include <stdint.h>
+
+#include "soc/soc_caps.h"
+
+#include "xt_instr_macros.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline uint32_t mpu_ll_id_to_addr(unsigned id)
+{
+    // vpn - id
+    // 0x00000000 = 0
+    // 0x20000000 = 1
+    // 0x40000000 = 2
+    // 0x60000000 = 3
+    // 0x80000000 = 4
+    // 0xa0000000 = 5
+    // 0xc0000000 = 6
+    // 0xe0000000 = 7
+    return id * SOC_MPU_MIN_REGION_SIZE;
+}
+
+static inline void mpu_ll_set_region_rw(uint32_t addr)
+{
+    WDTLB(0x0, addr); // cached, no allocate
+}
+
+static inline void mpu_ll_set_region_rwx(uint32_t addr)
+{
+    WDTLB(0x2, addr); // bypass cache
+}
+
+static inline void mpu_ll_set_region_x(uint32_t addr)
+{
+    WITLB(0x3, addr); // cached
+}
+
+static inline void mpu_ll_set_region_illegal(uint32_t addr)
+{
+    WITLB(0xF, addr);
+    WDTLB(0xF, addr);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/mwdt_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/mwdt_ll.h
new file mode 100644
index 00000000000..c15d7b8cd52
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/mwdt_ll.h
@@ -0,0 +1,284 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// The LL layer for Timer Group register operations.
+// Note that most of the register operations in this layer are non-atomic operations.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "soc/timer_periph.h"
+#include "soc/timer_group_struct.h"
+#include "hal/wdt_types.h"
+#include "esp_attr.h"
+
+/* The value that needs to be written to MWDT_LL_WKEY to write-enable the wdt registers */
+#define MWDT_LL_WKEY_VALUE 0x50D83AA1
+
+/* Possible values for MWDT_LL_STGx */
+#define MWDT_LL_STG_SEL_OFF 0
+#define MWDT_LL_STG_SEL_INT 1
+#define MWDT_LL_STG_SEL_RESET_CPU 2
+#define MWDT_LL_STG_SEL_RESET_SYSTEM 3
+
+/* Possible values for MWDT_LL_CPU_RESET_LENGTH and MWDT_LL_SYS_RESET_LENGTH */
+#define MWDT_LL_RESET_LENGTH_100_NS    0
+#define MWDT_LL_RESET_LENGTH_200_NS    1
+#define MWDT_LL_RESET_LENGTH_300_NS    2
+#define MWDT_LL_RESET_LENGTH_400_NS    3
+#define MWDT_LL_RESET_LENGTH_500_NS    4
+#define MWDT_LL_RESET_LENGTH_800_NS    5
+#define MWDT_LL_RESET_LENGTH_1600_NS   6
+#define MWDT_LL_RESET_LENGTH_3200_NS   7
+
+//Type check wdt_stage_action_t
+_Static_assert(WDT_STAGE_ACTION_OFF == MWDT_LL_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
+_Static_assert(WDT_STAGE_ACTION_INT == MWDT_LL_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
+_Static_assert(WDT_STAGE_ACTION_RESET_CPU == MWDT_LL_STG_SEL_RESET_CPU, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
+_Static_assert(WDT_STAGE_ACTION_RESET_SYSTEM == MWDT_LL_STG_SEL_RESET_SYSTEM, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
+//Type check wdt_reset_sig_length_t
+_Static_assert(WDT_RESET_SIG_LENGTH_100ns == MWDT_LL_RESET_LENGTH_100_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_200ns == MWDT_LL_RESET_LENGTH_200_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_300ns == MWDT_LL_RESET_LENGTH_300_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_400ns == MWDT_LL_RESET_LENGTH_400_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_500ns == MWDT_LL_RESET_LENGTH_500_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_800ns == MWDT_LL_RESET_LENGTH_800_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_1_6us == MWDT_LL_RESET_LENGTH_1600_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_3_2us == MWDT_LL_RESET_LENGTH_3200_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+
+/**
+ * @brief Enable the MWDT
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR void mwdt_ll_enable(timg_dev_t *hw)
+{
+    hw->wdtconfig0.wdt_en = 1;
+}
+
+/**
+ * @brief Disable the MWDT
+ *
+ * @param hw Start address of the peripheral registers.
+ * @note This function does not disable the flashboot mode. Therefore, given that
+ *       the MWDT is disabled using this function, a timeout can still occur
+ *       if the flashboot mode is simultaneously enabled.
+ */
+FORCE_INLINE_ATTR void mwdt_ll_disable(timg_dev_t *hw)
+{
+    hw->wdtconfig0.wdt_en = 0;
+}
+
+/**
+ * Check if the MWDT is enabled
+ *
+ * @param hw Start address of the peripheral registers.
+ * @return True if the MWDT is enabled, false otherwise
+ */
+FORCE_INLINE_ATTR bool mwdt_ll_check_if_enabled(timg_dev_t *hw)
+{
+    return (hw->wdtconfig0.wdt_en) ? true : false;
+}
+
+/**
+ * @brief Configure a particular stage of the MWDT
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param stage Which stage to configure
+ * @param timeout Number of timer ticks for the stage to timeout
+ * @param behavior What action to take when the stage times out
+ */
+FORCE_INLINE_ATTR void mwdt_ll_config_stage(timg_dev_t *hw, wdt_stage_t stage, uint32_t timeout, wdt_stage_action_t behavior)
+{
+    switch (stage) {
+    case WDT_STAGE0:
+        hw->wdtconfig0.wdt_stg0 = behavior;
+        hw->wdtconfig2.wdt_stg0_hold = timeout;
+        break;
+    case WDT_STAGE1:
+        hw->wdtconfig0.wdt_stg1 = behavior;
+        hw->wdtconfig3.wdt_stg1_hold = timeout;
+        break;
+    case WDT_STAGE2:
+        hw->wdtconfig0.wdt_stg2 = behavior;
+        hw->wdtconfig4.wdt_stg2_hold = timeout;
+        break;
+    case WDT_STAGE3:
+        hw->wdtconfig0.wdt_stg3 = behavior;
+        hw->wdtconfig5.wdt_stg3_hold = timeout;
+        break;
+    default:
+        break;
+    }
+}
+
+/**
+ * @brief Disable a particular stage of the MWDT
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param stage Which stage to disable
+ */
+FORCE_INLINE_ATTR void mwdt_ll_disable_stage(timg_dev_t *hw, uint32_t stage)
+{
+    switch (stage) {
+    case WDT_STAGE0:
+        hw->wdtconfig0.wdt_stg0 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE1:
+        hw->wdtconfig0.wdt_stg1 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE2:
+        hw->wdtconfig0.wdt_stg2 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE3:
+        hw->wdtconfig0.wdt_stg3 = WDT_STAGE_ACTION_OFF;
+        break;
+    default:
+        break;
+    }
+}
+
+/**
+ * @brief Enable or disable MWDT edge interrupt
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param enable Whether to enable edge interrupt
+ */
+FORCE_INLINE_ATTR void mwdt_ll_set_edge_intr(timg_dev_t *hw, bool enable)
+{
+}
+
+/**
+ * @brief Enable or disable MWDT level interrupt
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param enable Whether to enable level interrupt
+ */
+FORCE_INLINE_ATTR void mwdt_ll_set_level_intr(timg_dev_t *hw, bool enable)
+{
+    hw->int_ena_timers.wdt_int_ena = enable;
+}
+
+/**
+ * @brief Set the length of the CPU reset action
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param length Length of CPU reset signal
+ */
+FORCE_INLINE_ATTR void mwdt_ll_set_cpu_reset_length(timg_dev_t *hw, wdt_reset_sig_length_t length)
+{
+    hw->wdtconfig0.wdt_cpu_reset_length = length;
+}
+
+/**
+ * @brief Set the length of the system reset action
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param length Length of system reset signal
+ */
+FORCE_INLINE_ATTR void mwdt_ll_set_sys_reset_length(timg_dev_t *hw, wdt_reset_sig_length_t length)
+{
+    hw->wdtconfig0.wdt_sys_reset_length = length;
+}
+
+/**
+ * @brief Enable/Disable the MWDT flashboot mode.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param enable True to enable WDT flashboot mode, false to disable WDT flashboot mode.
+ *
+ * @note Flashboot mode is independent and can trigger a WDT timeout event if the
+ *       WDT's enable bit is set to 0. Flashboot mode for TG0 is automatically enabled
+ *       on flashboot, and should be disabled by software when flashbooting completes.
+ */
+FORCE_INLINE_ATTR void mwdt_ll_set_flashboot_en(timg_dev_t *hw, bool enable)
+{
+    hw->wdtconfig0.wdt_flashboot_mod_en = (enable) ? 1 : 0;
+}
+
+/**
+ * @brief Set the clock prescaler of the MWDT
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param prescaler Prescaler value between 1 to 65535
+ */
+FORCE_INLINE_ATTR void mwdt_ll_set_prescaler(timg_dev_t *hw, uint32_t prescaler)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->wdtconfig1, wdt_clk_prescale, prescaler);
+}
+
+/**
+ * @brief Feed the MWDT
+ *
+ * Resets the current timer count and current stage.
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR void mwdt_ll_feed(timg_dev_t *hw)
+{
+    hw->wdtfeed.wdt_feed = 1;
+}
+
+/**
+ * @brief Enable write protection of the MWDT registers
+ *
+ * Locking the MWDT will prevent any of the MWDT's registers from being modified
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
+{
+    hw->wdtwprotect.wdt_wkey = 0;
+}
+
+/**
+ * @brief Disable write protection of the MWDT registers
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
+{
+    hw->wdtwprotect.wdt_wkey = MWDT_LL_WKEY_VALUE;
+}
+
+/**
+ * @brief Clear the MWDT interrupt status.
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR void mwdt_ll_clear_intr_status(timg_dev_t *hw)
+{
+    hw->int_clr_timers.wdt_int_clr = 1;
+}
+
+/**
+ * @brief Set the interrupt enable bit for the MWDT interrupt.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param enable Whether to enable the MWDT interrupt
+ */
+FORCE_INLINE_ATTR void mwdt_ll_set_intr_enable(timg_dev_t *hw, bool enable)
+{
+    hw->int_ena_timers.wdt_int_ena = (enable) ? 1 : 0;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/pcnt_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/pcnt_ll.h
new file mode 100644
index 00000000000..a8b32df50c5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/pcnt_ll.h
@@ -0,0 +1,409 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The LL layer for ESP32-S3 PCNT register operations
+
+#pragma once
+
+#include <stdlib.h>
+#include <stdbool.h>
+#include "soc/pcnt_struct.h"
+#include "hal/pcnt_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define PCNT_LL_GET_HW(num) (((num) == 0) ? (&PCNT) : NULL)
+#define PCNT_LL_MAX_GLITCH_WIDTH 1023
+
+typedef enum {
+    PCNT_LL_EVENT_THRES1,
+    PCNT_LL_EVENT_THRES0,
+    PCNT_LL_EVENT_LOW_LIMIT,
+    PCNT_LL_EVENT_HIGH_LIMIT,
+    PCNT_LL_EVENT_ZERO_CROSS,
+    PCNT_LL_EVENT_MAX
+} pcnt_ll_event_id_t;
+
+#define PCNT_LL_EVENT_MASK ((1 << PCNT_LL_EVENT_MAX) - 1)
+
+/**
+ * @brief Set PCNT channel edge action
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param channel PCNT channel number
+ * @param pos_act Counter action when detecting positive edge
+ * @param neg_act Counter action when detecting negative edge
+ */
+static inline void pcnt_ll_set_edge_action(pcnt_dev_t *hw, uint32_t unit, uint32_t channel, pcnt_channel_edge_action_t pos_act, pcnt_channel_edge_action_t neg_act)
+{
+    if (channel == 0) {
+        hw->conf_unit[unit].conf0.ch0_pos_mode_un = pos_act;
+        hw->conf_unit[unit].conf0.ch0_neg_mode_un = neg_act;
+    } else {
+        hw->conf_unit[unit].conf0.ch1_pos_mode_un = pos_act;
+        hw->conf_unit[unit].conf0.ch1_neg_mode_un = neg_act;
+    }
+}
+
+/**
+ * @brief Set PCNT channel level action
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param channel PCNT channel number
+ * @param high_act Counter action when control signal is high level
+ * @param low_act Counter action when control signal is low level
+ */
+static inline void pcnt_ll_set_level_action(pcnt_dev_t *hw, uint32_t unit, uint32_t channel, pcnt_channel_level_action_t high_act, pcnt_channel_level_action_t low_act)
+{
+    if (channel == 0) {
+        hw->conf_unit[unit].conf0.ch0_hctrl_mode_un = high_act;
+        hw->conf_unit[unit].conf0.ch0_lctrl_mode_un = low_act;
+    } else {
+        hw->conf_unit[unit].conf0.ch1_hctrl_mode_un = high_act;
+        hw->conf_unit[unit].conf0.ch1_lctrl_mode_un = low_act;
+    }
+}
+
+/**
+ * @brief Get pulse counter value
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit  Pulse Counter unit number
+ * @return PCNT count value (a signed integer)
+ */
+static inline int pcnt_ll_get_count(pcnt_dev_t *hw, uint32_t unit)
+{
+    pcnt_un_cnt_reg_t cnt_reg = hw->cnt_unit[unit];
+    int16_t value = cnt_reg.pulse_cnt_un;
+    return value;
+}
+
+/**
+ * @brief Pause PCNT counter of PCNT unit
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ */
+static inline void pcnt_ll_stop_count(pcnt_dev_t *hw, uint32_t unit)
+{
+    hw->ctrl.val |= 1 << (2 * unit + 1);
+}
+
+/**
+ * @brief Resume counting for PCNT counter
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number, select from uint32_t
+ */
+static inline void pcnt_ll_start_count(pcnt_dev_t *hw, uint32_t unit)
+{
+    hw->ctrl.val &= ~(1 << (2 * unit + 1));
+}
+
+/**
+ * @brief Clear PCNT counter value to zero
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param  unit PCNT unit number, select from uint32_t
+ */
+static inline void pcnt_ll_clear_count(pcnt_dev_t *hw, uint32_t unit)
+{
+    hw->ctrl.val |= 1 << (2 * unit);
+    hw->ctrl.val &= ~(1 << (2 * unit));
+}
+
+/**
+ * @brief Enable PCNT interrupt for PCNT unit
+ * @note  Each PCNT unit has five watch point events that share the same interrupt bit.
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit_mask PCNT units mask
+ * @param enable True to enable interrupt, False to disable interrupt
+ */
+static inline void pcnt_ll_enable_intr(pcnt_dev_t *hw, uint32_t unit_mask, bool enable)
+{
+    if (enable) {
+        hw->int_ena.val |= unit_mask;
+    } else {
+        hw->int_ena.val &= ~unit_mask;
+    }
+}
+
+/**
+ * @brief Get PCNT interrupt status
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @return Interrupt status word
+ */
+__attribute__((always_inline)) static inline uint32_t pcnt_ll_get_intr_status(pcnt_dev_t *hw)
+{
+    return hw->int_st.val;
+}
+
+/**
+ * @brief Clear PCNT interrupt status
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param status value to clear interrupt status
+ */
+__attribute__((always_inline)) static inline void pcnt_ll_clear_intr_status(pcnt_dev_t *hw, uint32_t status)
+{
+    hw->int_clr.val = status;
+}
+
+/**
+ * @brief Enable PCNT high limit event
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param enable true to enable, false to disable
+ */
+static inline void pcnt_ll_enable_high_limit_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
+{
+    hw->conf_unit[unit].conf0.thr_h_lim_en_un = enable;
+}
+
+/**
+ * @brief Enable PCNT low limit event
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param enable true to enable, false to disable
+ */
+static inline void pcnt_ll_enable_low_limit_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
+{
+    hw->conf_unit[unit].conf0.thr_l_lim_en_un = enable;
+}
+
+/**
+ * @brief Enable PCNT zero cross event
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param enable true to enable, false to disable
+ */
+static inline void pcnt_ll_enable_zero_cross_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
+{
+    hw->conf_unit[unit].conf0.thr_zero_en_un = enable;
+}
+
+/**
+ * @brief Enable PCNT threshold event
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param thres Threshold ID
+ * @param enable true to enable, false to disable
+ */
+static inline void pcnt_ll_enable_thres_event(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, bool enable)
+{
+    if (thres == 0) {
+        hw->conf_unit[unit].conf0.thr_thres0_en_un = enable;
+    } else {
+        hw->conf_unit[unit].conf0.thr_thres1_en_un = enable;
+    }
+}
+
+/**
+ * @brief Disable all PCNT threshold events
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit unit number
+ */
+static inline void pcnt_ll_disable_all_events(pcnt_dev_t *hw, uint32_t unit)
+{
+    hw->conf_unit[unit].conf0.val &= ~(PCNT_LL_EVENT_MASK << 11);
+}
+
+/**
+ * @brief Set PCNT high limit value
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param value PCNT high limit value
+ */
+static inline void pcnt_ll_set_high_limit_value(pcnt_dev_t *hw, uint32_t unit, int value)
+{
+    pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
+    conf2_reg.cnt_h_lim_un = value;
+    hw->conf_unit[unit].conf2 = conf2_reg;
+}
+
+/**
+ * @brief Set PCNT low limit value
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param value PCNT low limit value
+ */
+static inline void pcnt_ll_set_low_limit_value(pcnt_dev_t *hw, uint32_t unit, int value)
+{
+    pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
+    conf2_reg.cnt_l_lim_un = value;
+    hw->conf_unit[unit].conf2 = conf2_reg;
+}
+
+/**
+ * @brief Set PCNT threshold value
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param thres Threshold ID
+ * @param value PCNT threshold value
+ */
+static inline void pcnt_ll_set_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, int value)
+{
+    pcnt_un_conf1_reg_t conf1_reg = hw->conf_unit[unit].conf1;
+    if (thres == 0) {
+        conf1_reg.cnt_thres0_un = value;
+    } else {
+        conf1_reg.cnt_thres1_un = value;
+    }
+    hw->conf_unit[unit].conf1 = conf1_reg;
+}
+
+/**
+ * @brief Get PCNT high limit value
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @return PCNT high limit value
+ */
+static inline int pcnt_ll_get_high_limit_value(pcnt_dev_t *hw, uint32_t unit)
+{
+    pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
+    int16_t value = conf2_reg.cnt_h_lim_un;
+    return value;
+}
+
+/**
+ * @brief Get PCNT low limit value
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @return PCNT high limit value
+ */
+static inline int pcnt_ll_get_low_limit_value(pcnt_dev_t *hw, uint32_t unit)
+{
+    pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
+    int16_t value = conf2_reg.cnt_l_lim_un;
+    return value;
+}
+
+/**
+ * @brief Get PCNT threshold value
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param thres Threshold ID
+ * @return PCNT threshold value
+ */
+static inline int pcnt_ll_get_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres)
+{
+    int16_t value;
+    pcnt_un_conf1_reg_t conf1_reg = hw->conf_unit[unit].conf1;
+    if (thres == 0) {
+        value = conf1_reg.cnt_thres0_un;
+    } else {
+        value = conf1_reg.cnt_thres1_un;
+    }
+    return value;
+}
+
+/**
+ * @brief Get PCNT unit runtime status
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @return PCNT unit runtime status
+ */
+static inline uint32_t pcnt_ll_get_unit_status(pcnt_dev_t *hw, uint32_t unit)
+{
+    return hw->status_unit[unit].val;
+}
+
+/**
+ * @brief Get PCNT count sign
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @return Count sign
+ */
+static inline pcnt_unit_count_sign_t pcnt_ll_get_count_sign(pcnt_dev_t *hw, uint32_t unit)
+{
+    return hw->status_unit[unit].val & 0x03;
+}
+
+/**
+ * @brief Get PCNT event status
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @return Event status word
+ */
+static inline uint32_t pcnt_ll_get_event_status(pcnt_dev_t *hw, uint32_t unit)
+{
+    return hw->status_unit[unit].val >> 2;
+}
+
+/**
+ * @brief Set PCNT glitch filter threshold
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param filter_val PCNT signal filter value, counter in APB_CLK cycles.
+ *        Any pulses lasting shorter than this will be ignored when the filter is enabled.
+ */
+static inline void pcnt_ll_set_glitch_filter_thres(pcnt_dev_t *hw, uint32_t unit, uint32_t filter_val)
+{
+    hw->conf_unit[unit].conf0.filter_thres_un = filter_val;
+}
+
+/**
+ * @brief Get PCNT glitch filter threshold
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @return glitch filter threshold
+ */
+static inline uint32_t pcnt_ll_get_glitch_filter_thres(pcnt_dev_t *hw, uint32_t unit)
+{
+    return hw->conf_unit[unit].conf0.filter_thres_un;
+}
+
+/**
+ * @brief Enable PCNT glitch filter
+ *
+ * @param hw Peripheral PCNT hardware instance address.
+ * @param unit PCNT unit number
+ * @param enable True to enable the filter, False to disable the filter
+ */
+static inline void pcnt_ll_enable_glitch_filter(pcnt_dev_t *hw, uint32_t unit, bool enable)
+{
+    hw->conf_unit[unit].conf0.filter_en_un = enable;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rmt_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rmt_ll.h
new file mode 100644
index 00000000000..2e6ddd563a1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rmt_ll.h
@@ -0,0 +1,498 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stddef.h>
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "soc/rmt_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RMT_LL_MAX_LOOP_COUNT           (1023)/*!< Max loop count that hardware is supported */
+#define RMT_LL_HW_BASE  (&RMT)
+#define RMT_LL_MEM_BASE (&RMTMEM)
+
+// Note: TX and RX channel number are all index from zero in the LL driver
+// i.e. tx_channel belongs to [0,3], and rx_channel belongs to [0,3]
+
+static inline void rmt_ll_enable_drive_clock(rmt_dev_t *dev, bool enable)
+{
+    dev->sys_conf.clk_en = enable; // register clock gating
+    dev->sys_conf.mem_clk_force_on = enable; // memory clock gating
+}
+
+static inline void rmt_ll_power_down_mem(rmt_dev_t *dev, bool enable)
+{
+    dev->sys_conf.mem_force_pu = !enable;
+    dev->sys_conf.mem_force_pd = enable;
+}
+
+static inline bool rmt_ll_is_mem_power_down(rmt_dev_t *dev)
+{
+    // the RTC domain can also power down RMT memory
+    // so it's probably not enough to detect whether it's powered down or not
+    // mem_force_pd has higher priority than mem_force_pu
+    return (dev->sys_conf.mem_force_pd) || !(dev->sys_conf.mem_force_pu);
+}
+
+static inline void rmt_ll_enable_mem_access(rmt_dev_t *dev, bool enable)
+{
+    dev->sys_conf.apb_fifo_mask = enable;
+}
+
+static inline void rmt_ll_set_group_clock_src(rmt_dev_t *dev, uint32_t channel, uint8_t src, uint8_t div_num, uint8_t div_a, uint8_t div_b)
+{
+    // Formula: rmt_sclk = module_clock_src / (1 + div_num + div_a / div_b)
+    dev->sys_conf.sclk_active = 0;
+    dev->sys_conf.sclk_sel = src;
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->sys_conf, sclk_div_num, div_num);
+    dev->sys_conf.sclk_div_a = div_a;
+    dev->sys_conf.sclk_div_b = div_b;
+    dev->sys_conf.sclk_active = 1;
+}
+
+static inline uint32_t rmt_ll_get_group_clock_src(rmt_dev_t *dev, uint32_t channel)
+{
+    return dev->sys_conf.sclk_sel;
+}
+
+static inline void rmt_ll_tx_reset_channel_clock_div(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->ref_cnt_rst.val |= (1 << channel);
+}
+
+static inline void rmt_ll_tx_reset_channels_clock_div(rmt_dev_t *dev, uint32_t channel_mask)
+{
+    dev->ref_cnt_rst.val |= channel_mask;
+}
+
+static inline void rmt_ll_rx_reset_channel_clock_div(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->ref_cnt_rst.val |= (1 << (channel + 4));
+}
+
+static inline void rmt_ll_tx_reset_pointer(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->chnconf0[channel].mem_rd_rst_n = 1;
+    dev->chnconf0[channel].mem_rd_rst_n = 0;
+    dev->chnconf0[channel].apb_mem_rst_n = 1;
+    dev->chnconf0[channel].apb_mem_rst_n = 0;
+}
+
+static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->chmconf[channel].conf1.mem_wr_rst_m = 1;
+    dev->chmconf[channel].conf1.mem_wr_rst_m = 0;
+    dev->chmconf[channel].conf1.apb_mem_rst_m = 1;
+    dev->chmconf[channel].conf1.apb_mem_rst_m = 0;
+}
+
+static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->chnconf0[channel].conf_update_n = 1;
+    dev->chnconf0[channel].tx_start_n = 1;
+}
+
+static inline void rmt_ll_tx_stop(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->chnconf0[channel].tx_stop_n = 1;
+    dev->chnconf0[channel].conf_update_n = 1;
+}
+
+static inline void rmt_ll_rx_enable(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chmconf[channel].conf1.rx_en_m = enable;
+    dev->chmconf[channel].conf1.conf_update_m = 1;
+}
+
+static inline void rmt_ll_tx_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, uint8_t block_num)
+{
+    dev->chnconf0[channel].mem_size_n = block_num;
+}
+
+static inline void rmt_ll_rx_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, uint8_t block_num)
+{
+    dev->chmconf[channel].conf0.mem_size_m = block_num;
+}
+
+static inline uint32_t rmt_ll_tx_get_mem_blocks(rmt_dev_t *dev, uint32_t channel)
+{
+    return dev->chnconf0[channel].mem_size_n;
+}
+
+static inline uint32_t rmt_ll_rx_get_mem_blocks(rmt_dev_t *dev, uint32_t channel)
+{
+    return dev->chmconf[channel].conf0.mem_size_m;
+}
+
+static inline void rmt_ll_tx_set_channel_clock_div(rmt_dev_t *dev, uint32_t channel, uint32_t div)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->chnconf0[channel], div_cnt_n, div);
+}
+
+static inline void rmt_ll_rx_set_channel_clock_div(rmt_dev_t *dev, uint32_t channel, uint32_t div)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->chmconf[channel].conf0, div_cnt_m, div);
+}
+
+static inline uint32_t rmt_ll_tx_get_channel_clock_div(rmt_dev_t *dev, uint32_t channel)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(dev->chnconf0[channel], div_cnt_n);
+}
+
+static inline uint32_t rmt_ll_rx_get_channel_clock_div(rmt_dev_t *dev, uint32_t channel)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(dev->chmconf[channel].conf0, div_cnt_m);
+}
+
+static inline void rmt_ll_tx_enable_pingpong(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chnconf0[channel].mem_tx_wrap_en_n = enable;
+}
+
+static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres)
+{
+    dev->chmconf[channel].conf0.idle_thres_m = thres;
+}
+
+static inline uint32_t rmt_ll_rx_get_idle_thres(rmt_dev_t *dev, uint32_t channel)
+{
+    return dev->chmconf[channel].conf0.idle_thres_m;
+}
+
+static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, uint8_t owner)
+{
+    dev->chmconf[channel].conf1.mem_owner_m = owner;
+}
+
+static inline uint32_t rmt_ll_rx_get_mem_owner(rmt_dev_t *dev, uint32_t channel)
+{
+    return dev->chmconf[channel].conf1.mem_owner_m;
+}
+
+static inline void rmt_ll_tx_enable_loop(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chnconf0[channel].tx_conti_mode_n = enable;
+}
+
+static inline bool rmt_ll_is_tx_loop_enabled(rmt_dev_t *dev, uint32_t channel)
+{
+    return dev->chnconf0[channel].tx_conti_mode_n;
+}
+
+static inline void rmt_ll_tx_enable_loop_autostop(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chn_tx_lim[channel].loop_stop_en_chn = enable;
+}
+
+static inline void rmt_ll_tx_set_loop_count(rmt_dev_t *dev, uint32_t channel, uint32_t count)
+{
+    dev->chn_tx_lim[channel].tx_loop_num_chn = count;
+}
+
+static inline void rmt_ll_tx_reset_loop(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->chn_tx_lim[channel].loop_count_reset_chn = 1;
+    dev->chn_tx_lim[channel].loop_count_reset_chn = 0;
+}
+
+static inline void rmt_ll_tx_enable_loop_count(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chn_tx_lim[channel].tx_loop_cnt_en_chn = enable;
+}
+
+static inline void rmt_ll_tx_enable_sync(rmt_dev_t *dev, bool enable)
+{
+    dev->tx_sim.tx_sim_en = enable;
+}
+
+static inline void rmt_ll_tx_add_to_sync_group(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->tx_sim.val |= 1 << channel;
+}
+
+static inline void rmt_ll_tx_remove_from_sync_group(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->tx_sim.val &= ~(1 << channel);
+}
+
+static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chmconf[channel].conf1.rx_filter_en_m = enable;
+}
+
+static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->chmconf[channel].conf1, rx_filter_thres_m, thres);
+}
+
+static inline void rmt_ll_tx_enable_idle(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chnconf0[channel].idle_out_en_n = enable;
+}
+
+static inline bool rmt_ll_is_tx_idle_enabled(rmt_dev_t *dev, uint32_t channel)
+{
+    return dev->chnconf0[channel].idle_out_en_n;
+}
+
+static inline void rmt_ll_tx_set_idle_level(rmt_dev_t *dev, uint32_t channel, uint8_t level)
+{
+    dev->chnconf0[channel].idle_out_lv_n = level;
+}
+
+static inline uint32_t rmt_ll_tx_get_idle_level(rmt_dev_t *dev, uint32_t channel)
+{
+    return dev->chnconf0[channel].idle_out_lv_n;
+}
+
+static inline uint32_t rmt_ll_rx_get_channel_status(rmt_dev_t *dev, uint32_t channel)
+{
+    return dev->chmstatus[channel].val;
+}
+
+static inline uint32_t rmt_ll_tx_get_channel_status(rmt_dev_t *dev, uint32_t channel)
+{
+    return dev->chnstatus[channel].val;
+}
+
+static inline void rmt_ll_tx_set_limit(rmt_dev_t *dev, uint32_t channel, uint32_t limit)
+{
+    dev->chn_tx_lim[channel].tx_lim_chn = limit;
+}
+
+static inline void rmt_ll_rx_set_limit(rmt_dev_t *dev, uint32_t channel, uint32_t limit)
+{
+    dev->chm_rx_lim[channel].chm_rx_lim_reg = limit;
+}
+
+static inline uint32_t rmt_ll_rx_get_limit(rmt_dev_t *dev, uint32_t channel)
+{
+    return dev->chm_rx_lim[channel].chm_rx_lim_reg;
+}
+
+static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool enable)
+{
+    if (enable) {
+        dev->int_ena.val |= mask;
+    } else {
+        dev->int_ena.val &= ~mask;
+    }
+}
+
+static inline void rmt_ll_enable_tx_end_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    if (enable) {
+        dev->int_ena.val |= (1 << channel);
+    } else {
+        dev->int_ena.val &= ~(1 << channel);
+    }
+}
+
+static inline void rmt_ll_enable_tx_err_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    if (enable) {
+        dev->int_ena.val |= (1 << (channel + 4));
+    } else {
+        dev->int_ena.val &= ~(1 << (channel + 4));
+    }
+}
+
+static inline void rmt_ll_enable_rx_end_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    if (enable) {
+        dev->int_ena.val |= (1 << (channel + 16));
+    } else {
+        dev->int_ena.val &= ~(1 << (channel + 16));
+    }
+}
+
+static inline void rmt_ll_enable_rx_err_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    if (enable) {
+        dev->int_ena.val |= (1 << (channel + 20));
+    } else {
+        dev->int_ena.val &= ~(1 << (channel + 20));
+    }
+}
+
+static inline void rmt_ll_enable_tx_thres_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    if (enable) {
+        dev->int_ena.val |= (1 << (channel + 8));
+    } else {
+        dev->int_ena.val &= ~(1 << (channel + 8));
+    }
+}
+
+static inline void rmt_ll_enable_tx_loop_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    if (enable) {
+        dev->int_ena.val |= (1 << (channel + 12));
+    } else {
+        dev->int_ena.val &= ~(1 << (channel + 12));
+    }
+}
+
+static inline void rmt_ll_enable_rx_thres_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    if (enable) {
+        dev->int_ena.val |= (1 << (channel + 24));
+    } else {
+        dev->int_ena.val &= ~(1 << (channel + 24));
+    }
+}
+
+static inline void rmt_ll_clear_tx_end_interrupt(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->int_clr.val = (1 << (channel));
+}
+
+static inline void rmt_ll_clear_rx_end_interrupt(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->int_clr.val = (1 << (channel + 16));
+}
+
+static inline void rmt_ll_clear_tx_err_interrupt(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->int_clr.val = (1 << (channel + 4));
+}
+
+static inline void rmt_ll_clear_rx_err_interrupt(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->int_clr.val = (1 << (channel + 20));
+}
+
+static inline void rmt_ll_clear_tx_thres_interrupt(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->int_clr.val = (1 << (channel + 8));
+}
+
+static inline void rmt_ll_clear_tx_loop_interrupt(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->int_clr.val = (1 << (channel + 12));
+}
+
+static inline void rmt_ll_clear_rx_thres_interrupt(rmt_dev_t *dev, uint32_t channel)
+{
+    dev->int_clr.val = (1 << (channel + 24));
+}
+
+static inline uint32_t rmt_ll_get_tx_end_interrupt_status(rmt_dev_t *dev)
+{
+    return dev->int_st.val & 0x0F;
+}
+
+static inline uint32_t rmt_ll_get_rx_end_interrupt_status(rmt_dev_t *dev)
+{
+    return (dev->int_st.val >> 16) & 0x0F;
+}
+
+static inline uint32_t rmt_ll_get_tx_err_interrupt_status(rmt_dev_t *dev)
+{
+    return (dev->int_st.val >> 4) & 0x0F;
+}
+
+static inline uint32_t rmt_ll_get_rx_err_interrupt_status(rmt_dev_t *dev)
+{
+    return (dev->int_st.val >> 20) & 0x0F;
+}
+
+static inline uint32_t rmt_ll_get_tx_thres_interrupt_status(rmt_dev_t *dev)
+{
+    return (dev->int_st.val >> 8) & 0x0F;
+}
+
+static inline uint32_t rmt_ll_get_rx_thres_interrupt_status(rmt_dev_t *dev)
+{
+    return (dev->int_st.val >> 24) & 0x0F;
+}
+
+static inline uint32_t rmt_ll_get_tx_loop_interrupt_status(rmt_dev_t *dev)
+{
+    return (dev->int_st.val >> 12) & 0x0F;
+}
+
+static inline void rmt_ll_tx_set_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t high_ticks, uint32_t low_ticks)
+{
+    // In case the compiler optimise a 32bit instruction (e.g. s32i) into two 16bit instruction (e.g. s16i, which is not allowed to access a register)
+    // We take care of the "read-modify-write" procedure by ourselves.
+    rmt_chncarrier_duty_reg_t reg;
+    reg.carrier_high_chn = high_ticks;
+    reg.carrier_low_chn = low_ticks;
+    dev->chncarrier_duty[channel].val = reg.val;
+}
+
+static inline void rmt_ll_rx_set_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t high_ticks, uint32_t low_ticks)
+{
+    rmt_chm_rx_carrier_rm_reg_t reg;
+    reg.carrier_high_thres_chm = high_ticks;
+    reg.carrier_low_thres_chm = low_ticks;
+    dev->chm_rx_carrier_rm[channel].val = reg.val;
+}
+
+static inline void rmt_ll_tx_get_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t *high_ticks, uint32_t *low_ticks )
+{
+    *high_ticks = HAL_FORCE_READ_U32_REG_FIELD(dev->chncarrier_duty[channel], carrier_high_chn);
+    *low_ticks = HAL_FORCE_READ_U32_REG_FIELD(dev->chncarrier_duty[channel], carrier_low_chn);
+}
+
+static inline void rmt_ll_rx_get_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t *high_ticks, uint32_t *low_ticks)
+{
+    *high_ticks = HAL_FORCE_READ_U32_REG_FIELD(dev->chm_rx_carrier_rm[channel], carrier_high_thres_chm);
+    *low_ticks = HAL_FORCE_READ_U32_REG_FIELD(dev->chm_rx_carrier_rm[channel], carrier_low_thres_chm);
+}
+
+static inline void rmt_ll_tx_enable_carrier_modulation(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chnconf0[channel].carrier_en_n = enable;
+}
+
+static inline void rmt_ll_rx_enable_carrier_demodulation(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chmconf[channel].conf0.carrier_en_m = enable;
+}
+
+static inline void rmt_ll_tx_set_carrier_level(rmt_dev_t *dev, uint32_t channel, uint8_t level)
+{
+    dev->chnconf0[channel].carrier_out_lv_n = level;
+}
+
+static inline void rmt_ll_rx_set_carrier_level(rmt_dev_t *dev, uint32_t channel, uint8_t level)
+{
+    dev->chmconf[channel].conf0.carrier_out_lv_m = level;
+}
+
+// set true, enable carrier in all RMT state (idle, reading, sending)
+// set false, enable carrier only in sending state (i.e. there're effective data in RAM to be sent)
+static inline void rmt_ll_tx_set_carrier_always_on(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chnconf0[channel].carrier_eff_en_n = !enable;
+}
+
+//Writes items to the specified TX channel memory with the given offset and length.
+//the caller should ensure that (length + off) <= (memory block * SOC_RMT_MEM_WORDS_PER_CHANNEL)
+static inline void rmt_ll_write_memory(rmt_mem_t *mem, uint32_t channel, const void *data, size_t length_in_words, size_t off)
+{
+    volatile uint32_t *to = (volatile uint32_t *)&mem->chan[channel].data32[off];
+    uint32_t *from = (uint32_t *)data;
+    while (length_in_words--) {
+        *to++ = *from++;
+    }
+}
+
+static inline void rmt_ll_rx_enable_pingpong(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chmconf[channel].conf1.mem_rx_wrap_en_m = enable;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rtc_cntl_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rtc_cntl_ll.h
new file mode 100644
index 00000000000..075b961aa25
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rtc_cntl_ll.h
@@ -0,0 +1,138 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc.h"
+#include "soc/rtc.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/apb_ctrl_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RTC_CNTL_LL_RETENTION_TARGET_CPU         (BIT(0))
+#define RTC_CNTL_LL_RETENTION_TARGET_TAGMEM      (BIT(1))
+
+static inline void rtc_cntl_ll_set_wakeup_timer(uint64_t t)
+{
+    WRITE_PERI_REG(RTC_CNTL_SLP_TIMER0_REG, t & UINT32_MAX);
+    WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32);
+
+    SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M);
+    SET_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
+}
+
+static inline uint32_t rtc_cntl_ll_ext1_get_wakeup_pins(void)
+{
+    return REG_GET_FIELD(RTC_CNTL_EXT_WAKEUP1_STATUS_REG, RTC_CNTL_EXT_WAKEUP1_STATUS);
+}
+
+static inline void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t mask, int mode)
+{
+    REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, mask);
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            mode, RTC_CNTL_EXT_WAKEUP1_LV_S);
+}
+
+static inline void rtc_cntl_ll_ext1_clear_wakeup_pins(void)
+{
+    REG_SET_BIT(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_STATUS_CLR);
+}
+
+static inline void rtc_cntl_ll_ulp_wakeup_enable(void)
+{
+    SET_PERI_REG_BITS(RTC_CNTL_STATE0_REG, RTC_CNTL_WAKEUP_ENA_V, 0x800, RTC_CNTL_WAKEUP_ENA_S);
+}
+
+static inline void rtc_cntl_ll_set_tagmem_retention_link_addr(uint32_t link_addr)
+{
+    REG_SET_FIELD(APB_CTRL_RETENTION_CTRL1_REG, APB_CTRL_RETENTION_TAG_LINK_ADDR, link_addr);
+}
+
+static inline void rtc_cntl_ll_enable_tagmem_retention(void)
+{
+    /* Enable i/d-cache tagmem retenttion. cpu: 1, tagmem: 2, cpu + tagmem: 3 */
+    uint32_t target = REG_GET_FIELD(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_TARGET);
+    REG_SET_FIELD(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_TARGET, (target | RTC_CNTL_LL_RETENTION_TARGET_TAGMEM));
+}
+
+static inline void rtc_cntl_ll_enable_icache_tagmem_retention(uint32_t start_point, uint32_t vld_size, uint32_t size)
+{
+    REG_SET_FIELD(APB_CTRL_RETENTION_CTRL2_REG, APB_CTRL_RET_ICACHE_START_POINT, start_point);
+    REG_SET_FIELD(APB_CTRL_RETENTION_CTRL2_REG, APB_CTRL_RET_ICACHE_VLD_SIZE, vld_size);
+    REG_SET_FIELD(APB_CTRL_RETENTION_CTRL2_REG, APB_CTRL_RET_ICACHE_SIZE, size);
+    REG_SET_BIT(APB_CTRL_RETENTION_CTRL2_REG, APB_CTRL_RET_ICACHE_ENABLE);
+}
+
+static inline void rtc_cntl_ll_enable_dcache_tagmem_retention(uint32_t start_point, uint32_t vld_size, uint32_t size)
+{
+    REG_SET_FIELD(APB_CTRL_RETENTION_CTRL3_REG, APB_CTRL_RET_DCACHE_START_POINT, start_point);
+    REG_SET_FIELD(APB_CTRL_RETENTION_CTRL3_REG, APB_CTRL_RET_DCACHE_VLD_SIZE, vld_size);
+    REG_SET_FIELD(APB_CTRL_RETENTION_CTRL3_REG, APB_CTRL_RET_DCACHE_SIZE, size);
+    REG_SET_BIT(APB_CTRL_RETENTION_CTRL3_REG, APB_CTRL_RET_DCACHE_ENABLE);
+}
+
+static inline void rtc_cntl_ll_disable_tagmem_retention(void)
+{
+    /* Enable i/d-cache tagmem retenttion. cpu: 1, tagmem: 2, cpu + tagmem: 3 */
+    uint32_t target = REG_GET_FIELD(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_TARGET);
+    REG_SET_FIELD(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_TARGET, (target & ~RTC_CNTL_LL_RETENTION_TARGET_TAGMEM));
+}
+
+static inline void rtc_cntl_ll_disable_icache_tagmem_retention(void)
+{
+    REG_CLR_BIT(APB_CTRL_RETENTION_CTRL2_REG, APB_CTRL_RET_ICACHE_ENABLE);
+}
+
+static inline void rtc_cntl_ll_disable_dcache_tagmem_retention(void)
+{
+    REG_CLR_BIT(APB_CTRL_RETENTION_CTRL3_REG, APB_CTRL_RET_DCACHE_ENABLE);
+}
+
+static inline void rtc_cntl_ll_set_cpu_retention_link_addr(uint32_t link_addr)
+{
+    REG_SET_FIELD(APB_CTRL_RETENTION_CTRL_REG, APB_CTRL_RETENTION_CPU_LINK_ADDR, link_addr);
+}
+
+static inline void rtc_cntl_ll_enable_cpu_retention_clock(void)
+{
+    REG_SET_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_CLK8M_EN); /* Enable internal 20 MHz clock */
+}
+
+static inline void rtc_cntl_ll_enable_cpu_retention(void)
+{
+    uint32_t target = REG_GET_FIELD(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_TARGET);
+
+    REG_SET_FIELD(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_TARGET, (target | RTC_CNTL_LL_RETENTION_TARGET_CPU));
+    /* Enable retention when cpu sleep enable */
+    REG_SET_BIT(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_EN);
+}
+
+static inline void rtc_cntl_ll_config_cpu_retention_timing(int wait, int clkoff_wait, int done_wait)
+{
+    REG_SET_FIELD(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_WAIT, wait);
+    REG_SET_FIELD(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_CLKOFF_WAIT, clkoff_wait);
+    REG_SET_FIELD(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_DONE_WAIT, done_wait);
+}
+
+static inline void rtc_cntl_ll_disable_cpu_retention(void)
+{
+    REG_CLR_BIT(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_EN);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rtc_io_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rtc_io_ll.h
new file mode 100644
index 00000000000..2bd6d12fade
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rtc_io_ll.h
@@ -0,0 +1,361 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*******************************************************************************
+ * NOTICE
+ * The ll is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+#pragma once
+
+#include <stdlib.h>
+#include "soc/rtc_io_periph.h"
+#include "soc/rtc_io_struct.h"
+#include "hal/rtc_io_types.h"
+#include "hal/gpio_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    RTCIO_FUNC_RTC = 0x0,         /*!< The pin controled by RTC module. */
+    RTCIO_FUNC_DIGITAL = 0x1,     /*!< The pin controlled by DIGITAL module. */
+} rtcio_ll_func_t;
+
+typedef enum {
+    RTCIO_WAKEUP_DISABLE    = 0,    /*!< Disable GPIO interrupt                             */
+    RTCIO_WAKEUP_LOW_LEVEL  = 0x4,  /*!< GPIO interrupt type : input low level trigger      */
+    RTCIO_WAKEUP_HIGH_LEVEL = 0x5,  /*!< GPIO interrupt type : input high level trigger     */
+} rtcio_ll_wake_type_t;
+
+typedef enum {
+    RTCIO_OUTPUT_NORMAL = 0,    /*!< RTCIO output mode is normal. */
+    RTCIO_OUTPUT_OD = 0x1,      /*!< RTCIO output mode is open-drain. */
+} rtcio_ll_out_mode_t;
+
+/**
+ * @brief Select the rtcio function.
+ *
+ * @note The RTC function must be selected before the pad analog function is enabled.
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @param func Select pin function.
+ */
+static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
+{
+    if (func == RTCIO_FUNC_RTC) {
+        SENS.sar_peri_clk_gate_conf.iomux_clk_en = 1;
+        // 0: GPIO connected to digital GPIO module. 1: GPIO connected to analog RTC module.
+        SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux));
+        //0:RTC FUNCTION 1,2,3:Reserved
+        SET_PERI_REG_BITS(rtc_io_desc[rtcio_num].reg, RTC_IO_TOUCH_PAD1_FUN_SEL_V, RTCIO_LL_PIN_FUNC, rtc_io_desc[rtcio_num].func);
+    } else if (func == RTCIO_FUNC_DIGITAL) {
+        CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux));
+        SENS.sar_peri_clk_gate_conf.iomux_clk_en = 0;
+    }
+}
+
+/**
+ * Enable rtcio output.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_output_enable(int rtcio_num)
+{
+    RTCIO.enable_w1ts.w1ts = (1U << rtcio_num);
+}
+
+/**
+ * Disable rtcio output.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_output_disable(int rtcio_num)
+{
+    RTCIO.enable_w1tc.w1tc = (1U << rtcio_num);
+}
+
+/**
+ * Set RTCIO output level.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @param level 0: output low; ~0: output high.
+ */
+static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
+{
+    if (level) {
+        RTCIO.out_w1ts.w1ts = (1U << rtcio_num);
+    } else {
+        RTCIO.out_w1tc.w1tc = (1U << rtcio_num);
+    }
+}
+
+/**
+ * Enable rtcio input.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_input_enable(int rtcio_num)
+{
+    SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].ie);
+}
+
+/**
+ * Disable rtcio input.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_input_disable(int rtcio_num)
+{
+    CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].ie);
+}
+
+/**
+ * Get RTCIO input level.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return 0: input low; ~0: input high.
+ */
+static inline uint32_t rtcio_ll_get_level(int rtcio_num)
+{
+    return (uint32_t)(RTCIO.in_val.in >> rtcio_num) & 0x1;
+}
+
+/**
+ * @brief Set RTC GPIO pad drive capability
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @param strength Drive capability of the pad. Range: 0 ~ 3.
+ */
+static inline void rtcio_ll_set_drive_capability(int rtcio_num, uint32_t strength)
+{
+    if (rtc_io_desc[rtcio_num].drv_v) {
+        SET_PERI_REG_BITS(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].drv_v, strength, rtc_io_desc[rtcio_num].drv_s);
+    }
+}
+
+/**
+ * @brief Get RTC GPIO pad drive capability.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Drive capability of the pad. Range: 0 ~ 3.
+ */
+static inline uint32_t rtcio_ll_get_drive_capability(int rtcio_num)
+{
+    return GET_PERI_REG_BITS2(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].drv_v, rtc_io_desc[rtcio_num].drv_s);
+}
+
+/**
+ * @brief Set RTC GPIO pad output mode.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return mode Output mode.
+ */
+static inline void rtcio_ll_output_mode_set(int rtcio_num, rtcio_ll_out_mode_t mode)
+{
+    RTCIO.pin[rtcio_num].pad_driver = mode;
+}
+
+/**
+ * RTC GPIO pullup enable.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_pullup_enable(int rtcio_num)
+{
+    if (rtc_io_desc[rtcio_num].pullup) {
+        SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pullup);
+    }
+}
+
+/**
+ * RTC GPIO pullup disable.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_pullup_disable(int rtcio_num)
+{
+    if (rtc_io_desc[rtcio_num].pullup) {
+        CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pullup);
+    }
+}
+
+/**
+ * RTC GPIO pulldown enable.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_pulldown_enable(int rtcio_num)
+{
+    if (rtc_io_desc[rtcio_num].pulldown) {
+        SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pulldown);
+    }
+}
+
+/**
+ * RTC GPIO pulldown disable.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_pulldown_disable(int rtcio_num)
+{
+    if (rtc_io_desc[rtcio_num].pulldown) {
+        CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pulldown);
+    }
+}
+
+/**
+ * Enable force hold function for RTC IO pad.
+ *
+ * Enabling HOLD function will cause the pad to lock current status, such as,
+ * input/output enable, input/output value, function, drive strength values.
+ * This function is useful when going into light or deep sleep mode to prevent
+ * the pin configuration from changing.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_force_hold_enable(int rtcio_num)
+{
+    SET_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, rtc_io_desc[rtcio_num].hold_force);
+}
+
+/**
+ * Disable hold function on an RTC IO pad
+ *
+ * @note If disable the pad hold, the status of pad maybe changed in sleep mode.
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_force_hold_disable(int rtcio_num)
+{
+    CLEAR_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, rtc_io_desc[rtcio_num].hold_force);
+}
+
+/**
+ * Enable force hold function for RTC IO pad.
+ *
+ * Enabling HOLD function will cause the pad to lock current status, such as,
+ * input/output enable, input/output value, function, drive strength values.
+ * This function is useful when going into light or deep sleep mode to prevent
+ * the pin configuration from changing.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_force_hold_all(void)
+{
+    SET_PERI_REG_MASK(RTC_CNTL_PWC_REG, RTC_CNTL_PAD_FORCE_HOLD_M);
+}
+
+/**
+ * Disable hold function on an RTC IO pad
+ *
+ * @note If disable the pad hold, the status of pad maybe changed in sleep mode.
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_force_unhold_all(void)
+{
+    CLEAR_PERI_REG_MASK(RTC_CNTL_PWC_REG, RTC_CNTL_PAD_FORCE_HOLD_M);
+}
+
+/**
+ * Enable wakeup function and set wakeup type from light sleep status for rtcio.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @param type  Wakeup on high level or low level.
+ */
+static inline void rtcio_ll_wakeup_enable(int rtcio_num, rtcio_ll_wake_type_t type)
+{
+    SENS.sar_peri_clk_gate_conf.iomux_clk_en = 1;
+    RTCIO.pin[rtcio_num].wakeup_enable = 0x1;
+    RTCIO.pin[rtcio_num].int_type = type;
+}
+
+/**
+ * Disable wakeup function from light sleep status for rtcio.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_wakeup_disable(int rtcio_num)
+{
+    RTCIO.pin[rtcio_num].wakeup_enable = 0;
+    RTCIO.pin[rtcio_num].int_type = RTCIO_WAKEUP_DISABLE;
+}
+
+/**
+ * Enable rtc io output in deep sleep.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_enable_output_in_sleep(gpio_num_t gpio_num)
+{
+    if (rtc_io_desc[gpio_num].slpoe) {
+        SET_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpoe);
+    }
+}
+
+/**
+ * Disable rtc io output in deep sleep.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_in_sleep_disable_output(gpio_num_t gpio_num)
+{
+    if (rtc_io_desc[gpio_num].slpoe) {
+        CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpoe);
+    }
+}
+
+/**
+ * Enable rtc io input in deep sleep.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_in_sleep_enable_input(gpio_num_t gpio_num)
+{
+    SET_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpie);
+}
+
+/**
+ * Disable rtc io input in deep sleep.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_in_sleep_disable_input(gpio_num_t gpio_num)
+{
+    CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpie);
+}
+
+/**
+ * Enable rtc io keep another setting in deep sleep.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_enable_sleep_setting(gpio_num_t gpio_num)
+{
+    SET_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpsel);
+}
+
+/**
+ * Disable rtc io keep another setting in deep sleep. (Default)
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ */
+static inline void rtcio_ll_disable_sleep_setting(gpio_num_t gpio_num)
+{
+    CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpsel);
+}
+
+static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
+{
+    REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, rtcio_num);
+    // Set level which will trigger wakeup
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            level , RTC_CNTL_EXT_WAKEUP0_LV_S);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rwdt_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rwdt_ll.h
new file mode 100644
index 00000000000..da716126ffd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/rwdt_ll.h
@@ -0,0 +1,332 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// The LL layer for Timer Group register operations.
+// Note that most of the register operations in this layer are non-atomic operations.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdlib.h>
+#include <stdbool.h>
+#include "hal/wdt_types.h"
+#include "soc/rtc_cntl_periph.h"
+#include "soc/rtc_cntl_struct.h"
+#include "soc/efuse_reg.h"
+#include "esp_attr.h"
+
+/* The value that needs to be written to RTC_CNTL_WDT_WKEY to write-enable the wdt registers */
+#define RWDT_LL_WDT_WKEY_VALUE 0x50D83AA1
+
+
+/* stage action selection values */
+#define RWDT_LL_STG_SEL_OFF             0
+#define RWDT_LL_STG_SEL_INT             1
+#define RWDT_LL_STG_SEL_RESET_CPU       2
+#define RWDT_LL_STG_SEL_RESET_SYSTEM    3
+#define RWDT_LL_STG_SEL_RESET_RTC       4
+
+/* Possible values for RTC_CNTL_WDT_CPU_RESET_LENGTH and RTC_CNTL_WDT_SYS_RESET_LENGTH */
+#define RWDT_LL_RESET_LENGTH_100_NS    0
+#define RWDT_LL_RESET_LENGTH_200_NS    1
+#define RWDT_LL_RESET_LENGTH_300_NS    2
+#define RWDT_LL_RESET_LENGTH_400_NS    3
+#define RWDT_LL_RESET_LENGTH_500_NS    4
+#define RWDT_LL_RESET_LENGTH_800_NS    5
+#define RWDT_LL_RESET_LENGTH_1600_NS   6
+#define RWDT_LL_RESET_LENGTH_3200_NS   7
+
+//Type check wdt_stage_action_t
+_Static_assert(WDT_STAGE_ACTION_OFF == RWDT_LL_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
+_Static_assert(WDT_STAGE_ACTION_INT == RWDT_LL_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
+_Static_assert(WDT_STAGE_ACTION_RESET_CPU == RWDT_LL_STG_SEL_RESET_CPU, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
+_Static_assert(WDT_STAGE_ACTION_RESET_SYSTEM == RWDT_LL_STG_SEL_RESET_SYSTEM, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
+_Static_assert(WDT_STAGE_ACTION_RESET_RTC == RWDT_LL_STG_SEL_RESET_RTC, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
+//Type check wdt_reset_sig_length_t
+_Static_assert(WDT_RESET_SIG_LENGTH_100ns == RWDT_LL_RESET_LENGTH_100_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_200ns == RWDT_LL_RESET_LENGTH_200_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_300ns == RWDT_LL_RESET_LENGTH_300_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_400ns == RWDT_LL_RESET_LENGTH_400_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_500ns == RWDT_LL_RESET_LENGTH_500_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_800ns == RWDT_LL_RESET_LENGTH_800_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_1_6us == RWDT_LL_RESET_LENGTH_1600_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+_Static_assert(WDT_RESET_SIG_LENGTH_3_2us == RWDT_LL_RESET_LENGTH_3200_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
+
+/**
+ * @brief Enable the RWDT
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_enable(rtc_cntl_dev_t *hw)
+{
+    hw->wdt_config0.en = 1;
+}
+
+/**
+ * @brief Disable the RWDT
+ *
+ * @param hw Start address of the peripheral registers.
+ * @note This function does not disable the flashboot mode. Therefore, given that
+ *       the MWDT is disabled using this function, a timeout can still occur
+ *       if the flashboot mode is simultaneously enabled.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_disable(rtc_cntl_dev_t *hw)
+{
+    hw->wdt_config0.en = 0;
+}
+
+/**
+ * @brief Check if the RWDT is enabled
+ *
+ * @param hw Start address of the peripheral registers.
+ * @return True if RTC WDT is enabled
+ */
+FORCE_INLINE_ATTR bool rwdt_ll_check_if_enabled(rtc_cntl_dev_t *hw)
+{
+    return (hw->wdt_config0.en) ? true : false;
+}
+
+/**
+ * @brief Configure a particular stage of the RWDT
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param stage Which stage to configure
+ * @param timeout Number of timer ticks for the stage to timeout (see note).
+ * @param behavior What action to take when the stage times out
+ *
+ * @note The value of of RWDT stage 0 timeout register is special, in
+ *       that an implicit multiplier is applied to that value to produce
+ *       and effective timeout tick value. The multiplier is dependent
+ *       on an EFuse value. Therefore, when configuring stage 0, the valid
+ *       values for the timeout argument are:
+ *       - If Efuse value is 0, any even number between [2,2*UINT32_MAX]
+ *       - If Efuse value is 1, any multiple of 4 between [4,4*UINT32_MAX]
+ *       - If Efuse value is 2, any multiple of 8 between [8,8*UINT32_MAX]
+ *       - If Efuse value is 3, any multiple of 16 between [16,16*UINT32_MAX]
+ */
+FORCE_INLINE_ATTR void rwdt_ll_config_stage(rtc_cntl_dev_t *hw, wdt_stage_t stage, uint32_t timeout_ticks, wdt_stage_action_t behavior)
+{
+    switch (stage) {
+    case WDT_STAGE0:
+        hw->wdt_config0.stg0 = behavior;
+        hw->wdt_config1 = timeout_ticks >> 1;
+        break;
+    case WDT_STAGE1:
+        hw->wdt_config0.stg1 = behavior;
+        hw->wdt_config2 = timeout_ticks;
+        break;
+    case WDT_STAGE2:
+        hw->wdt_config0.stg2 = behavior;
+        hw->wdt_config3 = timeout_ticks;
+        break;
+    case WDT_STAGE3:
+        hw->wdt_config0.stg3 = behavior;
+        hw->wdt_config4 = timeout_ticks;
+        break;
+    default:
+        abort();
+    }
+}
+
+/**
+ * @brief Disable a particular stage of the RWDT
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param stage Which stage to disable
+ */
+FORCE_INLINE_ATTR void rwdt_ll_disable_stage(rtc_cntl_dev_t *hw, wdt_stage_t stage)
+{
+    switch (stage) {
+    case WDT_STAGE0:
+        hw->wdt_config0.stg0 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE1:
+        hw->wdt_config0.stg1 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE2:
+        hw->wdt_config0.stg2 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE3:
+        hw->wdt_config0.stg3 = WDT_STAGE_ACTION_OFF;
+        break;
+    default:
+        abort();
+    }
+}
+
+/**
+ * @brief Set the length of the CPU reset action
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param length Length of CPU reset signal
+ */
+FORCE_INLINE_ATTR void rwdt_ll_set_cpu_reset_length(rtc_cntl_dev_t *hw, wdt_reset_sig_length_t length)
+{
+    hw->wdt_config0.cpu_reset_length = length;
+}
+
+/**
+ * @brief Set the length of the system reset action
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param length Length of system reset signal
+ */
+FORCE_INLINE_ATTR void rwdt_ll_set_sys_reset_length(rtc_cntl_dev_t *hw, wdt_reset_sig_length_t length)
+{
+    hw->wdt_config0.sys_reset_length = length;
+}
+
+/**
+ * @brief Enable/Disable the RWDT flashboot mode.
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param enable True to enable RWDT flashboot mode, false to disable RWDT flashboot mode.
+ *
+ * @note Flashboot mode is independent and can trigger a WDT timeout event if the
+ *       WDT's enable bit is set to 0. Flashboot mode for RWDT is automatically enabled
+ *       on flashboot, and should be disabled by software when flashbooting completes.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_set_flashboot_en(rtc_cntl_dev_t *hw, bool enable)
+{
+    hw->wdt_config0.flashboot_mod_en = (enable) ? 1 : 0;
+}
+
+/**
+ * @brief Enable/Disable the CPU0 to be reset on WDT_STAGE_ACTION_RESET_CPU
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param enable True to enable CPU0 to be reset, false to disable.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_set_procpu_reset_en(rtc_cntl_dev_t *hw, bool enable)
+{
+    hw->wdt_config0.procpu_reset_en = (enable) ? 1 : 0;
+}
+
+/**
+ * @brief Enable/Disable the CPU1 to be reset on WDT_STAGE_ACTION_RESET_CPU
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param enable True to enable CPU1 to be reset, false to disable.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_set_appcpu_reset_en(rtc_cntl_dev_t *hw, bool enable)
+{
+    hw->wdt_config0.appcpu_reset_en = (enable) ? 1 : 0;
+}
+
+/**
+ * @brief Enable/Disable the RWDT pause during sleep functionality
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param enable True to enable, false to disable.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_set_pause_in_sleep_en(rtc_cntl_dev_t *hw, bool enable)
+{
+    hw->wdt_config0.pause_in_slp = (enable) ? 1 : 0;
+}
+
+/**
+ * @brief Enable/Disable chip reset on RWDT timeout.
+ *
+ * A chip reset also resets the analog portion of the chip. It will appear as a
+ * POWERON reset rather than an RTC reset.
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param enable True to enable, false to disable.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_set_chip_reset_en(rtc_cntl_dev_t *hw, bool enable)
+{
+    hw->wdt_config0.chip_reset_en = (enable) ? 1 : 0;
+}
+
+/**
+ * @brief Set width of chip reset signal
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param width Width of chip reset signal in terms of number of RTC_SLOW_CLK cycles
+ */
+FORCE_INLINE_ATTR void rwdt_ll_set_chip_reset_width(rtc_cntl_dev_t *hw, uint32_t width)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->wdt_config0, chip_reset_width, width);
+}
+
+/**
+ * @brief Feed the RWDT
+ *
+ * Resets the current timer count and current stage.
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_feed(rtc_cntl_dev_t *hw)
+{
+    hw->wdt_feed.feed = 1;
+}
+
+/**
+ * @brief Enable write protection of the RWDT registers
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_write_protect_enable(rtc_cntl_dev_t *hw)
+{
+    hw->wdt_wprotect = 0;
+}
+
+/**
+ * @brief Disable write protection of the RWDT registers
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_write_protect_disable(rtc_cntl_dev_t *hw)
+{
+    hw->wdt_wprotect = RWDT_LL_WDT_WKEY_VALUE;
+}
+
+/**
+ * @brief Enable the RWDT interrupt.
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param enable True to enable RWDT interrupt, false to disable.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_set_intr_enable(rtc_cntl_dev_t *hw, bool enable)
+{
+    hw->int_ena.rtc_wdt = (enable) ? 1 : 0;
+}
+
+/**
+ * @brief Check if the RWDT interrupt has been triggered
+ *
+ * @param hw Start address of the peripheral registers.
+ * @return True if the RWDT interrupt was triggered
+ */
+FORCE_INLINE_ATTR bool rwdt_ll_check_intr_status(rtc_cntl_dev_t *hw)
+{
+    return (hw->int_st.rtc_wdt) ? true : false;
+}
+
+/**
+ * @brief Clear the RWDT interrupt status.
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR void rwdt_ll_clear_intr_status(rtc_cntl_dev_t *hw)
+{
+    hw->int_clr.rtc_wdt = 1;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/sha_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/sha_ll.h
new file mode 100644
index 00000000000..fa660f040f7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/sha_ll.h
@@ -0,0 +1,173 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdbool.h>
+#include "soc/hwcrypto_reg.h"
+#include "hal/sha_types.h"
+#include "soc/dport_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @brief Start a new SHA block conversions (no initial hash in HW)
+ *
+ * @param sha_type The SHA algorithm type
+ */
+static inline void sha_ll_start_block(esp_sha_type sha_type)
+{
+    REG_WRITE(SHA_MODE_REG, sha_type);
+    REG_WRITE(SHA_START_REG, 1);
+}
+
+/**
+ * @brief Continue a SHA block conversion (initial hash in HW)
+ *
+ * @param sha_type The SHA algorithm type
+ */
+static inline void sha_ll_continue_block(esp_sha_type sha_type)
+{
+    REG_WRITE(SHA_MODE_REG, sha_type);
+    REG_WRITE(SHA_CONTINUE_REG, 1);
+}
+
+/**
+ * @brief Start a new SHA message conversion using DMA (no initial hash in HW)
+ *
+ * @param sha_type The SHA algorithm type
+ */
+static inline void sha_ll_start_dma(esp_sha_type sha_type)
+{
+    REG_WRITE(SHA_MODE_REG, sha_type);
+    REG_WRITE(SHA_DMA_START_REG, 1);
+}
+
+/**
+ * @brief Continue a SHA message conversion using DMA (initial hash in HW)
+ *
+ * @param sha_type The SHA algorithm type
+ */
+static inline void sha_ll_continue_dma(esp_sha_type sha_type)
+{
+    REG_WRITE(SHA_MODE_REG, sha_type);
+    REG_WRITE(SHA_DMA_CONTINUE_REG, 1);
+}
+
+/**
+ * @brief Load the current hash digest to digest register
+ *
+ * @note Happens automatically on ESP32S3
+ *
+ * @param sha_type The SHA algorithm type
+ */
+static inline void sha_ll_load(esp_sha_type sha_type)
+{
+}
+
+/**
+ * @brief Sets the number of message blocks to be hashed
+ *
+ * @note DMA operation only
+ *
+ * @param num_blocks Number of message blocks to process
+ */
+static inline void sha_ll_set_block_num(size_t num_blocks)
+{
+    REG_WRITE(SHA_BLOCK_NUM_REG, num_blocks);
+}
+
+/**
+ * @brief Checks if the SHA engine is currently busy hashing a block
+ *
+ * @return true SHA engine busy
+ * @return false SHA engine idle
+ */
+static inline bool sha_ll_busy(void)
+{
+    return REG_READ(SHA_BUSY_REG);
+}
+
+/**
+ * @brief Write a text (message) block to the SHA engine
+ *
+ * @param input_text Input buffer to be written to the SHA engine
+ * @param block_word_len Number of words in block
+ */
+static inline void sha_ll_fill_text_block(const void *input_text, size_t block_word_len)
+{
+    uint32_t *data_words = (uint32_t *)input_text;
+    uint32_t *reg_addr_buf = (uint32_t *)(SHA_TEXT_BASE);
+
+    for (size_t i = 0; i < block_word_len; i++) {
+        REG_WRITE(&reg_addr_buf[i], data_words[i]);
+    }
+}
+
+/**
+ * @brief Read the message digest from the SHA engine
+ *
+ * @param sha_type The SHA algorithm type
+ * @param digest_state Buffer that message digest will be written to
+ * @param digest_word_len Length of the message digest
+ */
+static inline void sha_ll_read_digest(esp_sha_type sha_type, void *digest_state, size_t digest_word_len)
+{
+    uint32_t *digest_state_words = (uint32_t *)digest_state;
+
+    esp_dport_access_read_buffer(digest_state_words, SHA_H_BASE, digest_word_len);
+}
+
+/**
+ * @brief Write the message digest to the SHA engine
+ *
+ * @param sha_type The SHA algorithm type
+ * @param digest_state Message digest to be written to SHA engine
+ * @param digest_word_len Length of the message digest
+ */
+static inline void sha_ll_write_digest(esp_sha_type sha_type, void *digest_state, size_t digest_word_len)
+{
+    uint32_t *digest_state_words = (uint32_t *)digest_state;
+    uint32_t *reg_addr_buf = (uint32_t *)(SHA_H_BASE);
+
+    for (size_t i = 0; i < digest_word_len; i++) {
+        REG_WRITE(&reg_addr_buf[i], digest_state_words[i]);
+    }
+}
+
+/**
+ * @brief Sets SHA512_t T_string parameter
+ *
+ * @param t_string T_string parameter
+ */
+static inline void sha_ll_t_string_set(uint32_t t_string)
+{
+    REG_WRITE(SHA_T_STRING_REG, t_string);
+}
+
+/**
+ * @brief Sets SHA512_t T_string parameter's length
+ *
+ * @param t_len T_string parameter length
+ */
+static inline void sha_ll_t_len_set(uint8_t t_len)
+{
+    REG_WRITE(SHA_T_LENGTH_REG, t_len);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/sigmadelta_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/sigmadelta_ll.h
new file mode 100644
index 00000000000..ecae8cf3524
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/sigmadelta_ll.h
@@ -0,0 +1,75 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The LL layer for ESP32 SIGMADELTA register operations
+
+#pragma once
+
+#include <stdbool.h>
+#include "soc/sigmadelta_periph.h"
+#include "soc/gpio_sd_struct.h"
+#include "hal/sigmadelta_types.h"
+#include "hal/misc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Get SIGMADELTA hardware instance with giving sigmadelta num
+#define SIGMADELTA_LL_GET_HW(num) (((num) == 0) ? (&SIGMADELTA) : NULL)
+
+/**
+ * @brief Set Sigma-delta enable
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param en Sigma-delta enable value
+ */
+static inline void sigmadelta_ll_set_en(gpio_sd_dev_t *hw, bool en)
+{
+    hw->misc.function_clk_en = en;
+}
+
+/**
+ * @brief Set Sigma-delta channel duty.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
+ *             The waveform is more like a random one in this range.
+ */
+static inline void sigmadelta_ll_set_duty(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, int8_t duty)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint8_t)duty);
+}
+
+/**
+ * @brief Set Sigma-delta channel's clock pre-scale value.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param val The divider of source clock, ranges from 0 to 255
+ */
+static inline void sigmadelta_ll_set_prescale(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, uint8_t prescale)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/soc_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/soc_ll.h
new file mode 100644
index 00000000000..234248368ee
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/soc_ll.h
@@ -0,0 +1,54 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "soc/soc.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/soc_caps.h"
+#include "soc/rtc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline void soc_ll_stall_core(int core)
+{
+    const int rtc_cntl_c1_m[SOC_CPU_CORES_NUM] = {RTC_CNTL_SW_STALL_PROCPU_C1_M, RTC_CNTL_SW_STALL_APPCPU_C1_M};
+    const int rtc_cntl_c1_s[SOC_CPU_CORES_NUM] = {RTC_CNTL_SW_STALL_PROCPU_C1_S, RTC_CNTL_SW_STALL_APPCPU_C1_S};
+    const int rtc_cntl_c0_m[SOC_CPU_CORES_NUM] = {RTC_CNTL_SW_STALL_PROCPU_C0_M, RTC_CNTL_SW_STALL_APPCPU_C0_M};
+    const int rtc_cntl_c0_s[SOC_CPU_CORES_NUM] = {RTC_CNTL_SW_STALL_PROCPU_C0_S, RTC_CNTL_SW_STALL_APPCPU_C0_S};
+
+    CLEAR_PERI_REG_MASK(RTC_CNTL_SW_CPU_STALL_REG, rtc_cntl_c1_m[core]);
+    SET_PERI_REG_MASK(RTC_CNTL_SW_CPU_STALL_REG, 0x21 << rtc_cntl_c1_s[core]);
+    CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, rtc_cntl_c0_m[core]);
+    SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, 2 << rtc_cntl_c0_s[core]);
+}
+
+static inline void soc_ll_unstall_core(int core)
+{
+    const int rtc_cntl_c1_m[SOC_CPU_CORES_NUM] = {RTC_CNTL_SW_STALL_PROCPU_C1_M, RTC_CNTL_SW_STALL_APPCPU_C1_M};
+    const int rtc_cntl_c0_m[SOC_CPU_CORES_NUM] = {RTC_CNTL_SW_STALL_PROCPU_C0_M, RTC_CNTL_SW_STALL_APPCPU_C0_M};
+    CLEAR_PERI_REG_MASK(RTC_CNTL_SW_CPU_STALL_REG, rtc_cntl_c1_m[core]);
+    CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, rtc_cntl_c0_m[core]);
+}
+
+static inline void soc_ll_reset_core(int core)
+{
+    SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG,
+            core == 0 ? RTC_CNTL_SW_PROCPU_RST_M : RTC_CNTL_SW_APPCPU_RST_M);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spi_flash_encrypted_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spi_flash_encrypted_ll.h
new file mode 100644
index 00000000000..7dac0c41b53
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spi_flash_encrypted_ll.h
@@ -0,0 +1,157 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The ll is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The Lowlevel layer for SPI Flash Encryption.
+
+#include <stdbool.h>
+#include <string.h>
+#include "soc/system_reg.h"
+#include "soc/hwcrypto_reg.h"
+#include "soc/soc.h"
+#include "hal/assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Choose type of chip you want to encrypt manully
+typedef enum
+{
+    FLASH_ENCRYPTION_MANU = 0, ///!< Manually encrypt the flash chip.
+    PSRAM_ENCRYPTION_MANU = 1  ///!< Manually encrypt the psram chip.
+} flash_encrypt_ll_type_t;
+
+/**
+ * Enable the flash encryption function under spi boot mode and download boot mode.
+ */
+static inline void spi_flash_encrypt_ll_enable(void)
+{
+    REG_SET_BIT(SYSTEM_EXTERNAL_DEVICE_ENCRYPT_DECRYPT_CONTROL_REG,
+                SYSTEM_ENABLE_DOWNLOAD_MANUAL_ENCRYPT |
+                SYSTEM_ENABLE_SPI_MANUAL_ENCRYPT);
+}
+
+/*
+ * Disable the flash encryption mode.
+ */
+static inline void spi_flash_encrypt_ll_disable(void)
+{
+    REG_CLR_BIT(SYSTEM_EXTERNAL_DEVICE_ENCRYPT_DECRYPT_CONTROL_REG,
+                SYSTEM_ENABLE_SPI_MANUAL_ENCRYPT);
+}
+
+/**
+ * Choose type of chip you want to encrypt manully
+ *
+ * @param type The type of chip to be encrypted
+ *
+ * @note The hardware currently support flash encryption.
+ */
+static inline void spi_flash_encrypt_ll_type(flash_encrypt_ll_type_t type)
+{
+    // Our hardware only support flash encryption
+    HAL_ASSERT(type == FLASH_ENCRYPTION_MANU);
+    REG_WRITE(AES_XTS_DESTINATION_REG, type);
+}
+
+/**
+ * Configure the data size of a single encryption.
+ *
+ * @param block_size Size of the desired block.
+ */
+static inline void spi_flash_encrypt_ll_buffer_length(uint32_t size)
+{
+    // Desired block should not be larger than the block size.
+    REG_WRITE(AES_XTS_SIZE_REG, size >> 5);
+}
+
+/**
+ * Save 32-bit piece of plaintext.
+ *
+ * @param address the address of written flash partition.
+ * @param buffer Buffer to store the input data.
+ * @param size Buffer size.
+ *
+ */
+static inline void spi_flash_encrypt_ll_plaintext_save(uint32_t address, const uint32_t* buffer, uint32_t size)
+{
+    uint32_t plaintext_offs = (address % 64);
+    memcpy((void *)(AES_XTS_PLAIN_BASE + plaintext_offs), buffer, size);
+}
+
+/**
+ * Copy the flash address to XTS_AES physical address
+ *
+ * @param flash_addr flash address to write.
+ */
+static inline void spi_flash_encrypt_ll_address_save(uint32_t flash_addr)
+{
+    REG_WRITE(AES_XTS_PHYSICAL_ADDR_REG, flash_addr);
+}
+
+/**
+ * Start flash encryption
+ */
+static inline void spi_flash_encrypt_ll_calculate_start(void)
+{
+    REG_WRITE(AES_XTS_TRIGGER_REG, 1);
+}
+
+/**
+ * Wait for flash encryption termination
+ */
+static inline void spi_flash_encrypt_ll_calculate_wait_idle(void)
+{
+    while(REG_READ(AES_XTS_STATE_REG) == 0x1) {
+    }
+}
+
+/**
+ * Finish the flash encryption and make encrypted result accessible to SPI.
+ */
+static inline void spi_flash_encrypt_ll_done(void)
+{
+    REG_WRITE(AES_XTS_RELEASE_REG, 1);
+    while(REG_READ(AES_XTS_STATE_REG) != 0x3) {
+    }
+}
+
+/**
+ * Set to destroy encrypted result
+ */
+static inline void spi_flash_encrypt_ll_destroy(void)
+{
+    REG_WRITE(AES_XTS_DESTROY_REG, 1);
+}
+
+/**
+ * Check if is qualified to encrypt the buffer
+ *
+ * @param address the address of written flash partition.
+ * @param length Buffer size.
+ */
+static inline bool spi_flash_encrypt_ll_check(uint32_t address, uint32_t length)
+{
+    return ((address % length) == 0) ? true : false;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spi_flash_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spi_flash_ll.h
new file mode 100644
index 00000000000..1c755de9802
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spi_flash_ll.h
@@ -0,0 +1,110 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The ll is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The Lowlevel layer for SPI Flash
+
+#pragma once
+
+#include "gpspi_flash_ll.h"
+#include "spimem_flash_ll.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// For esp32s2, spimem is equivalent to traditional spi peripherals found
+// in esp32. Let the spi flash clock reg definitions reflect this.
+#define SPI_FLASH_LL_CLKREG_VAL_5MHZ   {.spimem=SPIMEM_FLASH_LL_CLKREG_VAL_5MHZ}
+#define SPI_FLASH_LL_CLKREG_VAL_10MHZ  {.spimem=SPIMEM_FLASH_LL_CLKREG_VAL_10MHZ}
+#define SPI_FLASH_LL_CLKREG_VAL_20MHZ  {.spimem=SPIMEM_FLASH_LL_CLKREG_VAL_20MHZ}
+#define SPI_FLASH_LL_CLKREG_VAL_26MHZ  {.spimem=SPIMEM_FLASH_LL_CLKREG_VAL_26MHZ}
+#define SPI_FLASH_LL_CLKREG_VAL_40MHZ  {.spimem=SPIMEM_FLASH_LL_CLKREG_VAL_40MHZ}
+#define SPI_FLASH_LL_CLKREG_VAL_80MHZ  {.spimem=SPIMEM_FLASH_LL_CLKREG_VAL_80MHZ}
+
+#define spi_flash_ll_get_hw(host_id)  (((host_id)<=SPI1_HOST ? (spi_dev_t*) spimem_flash_ll_get_hw(host_id) \
+                                      : gpspi_flash_ll_get_hw(host_id)))
+
+#define spi_flash_ll_hw_get_id(dev) ({int dev_id = spimem_flash_ll_hw_get_id(dev); \
+                                     if (dev_id < 0) {\
+                                        dev_id = gpspi_flash_ll_hw_get_id(dev);\
+                                     }\
+                                     dev_id; \
+                                    })
+
+typedef union  {
+    gpspi_flash_ll_clock_reg_t gpspi;
+    spimem_flash_ll_clock_reg_t spimem;
+} spi_flash_ll_clock_reg_t;
+
+#ifdef GPSPI_BUILD
+#define spi_flash_ll_reset(dev)                              gpspi_flash_ll_reset((spi_dev_t*)dev)
+#define spi_flash_ll_cmd_is_done(dev)                        gpspi_flash_ll_cmd_is_done((spi_dev_t*)dev)
+#define spi_flash_ll_get_buffer_data(dev, buffer, read_len)  gpspi_flash_ll_get_buffer_data((spi_dev_t*)dev, buffer, read_len)
+#define spi_flash_ll_set_buffer_data(dev, buffer, len)       gpspi_flash_ll_set_buffer_data((spi_dev_t*)dev, buffer, len)
+#define spi_flash_ll_user_start(dev)                         gpspi_flash_ll_user_start((spi_dev_t*)dev)
+#define spi_flash_ll_host_idle(dev)                          gpspi_flash_ll_host_idle((spi_dev_t*)dev)
+#define spi_flash_ll_read_phase(dev)                         gpspi_flash_ll_read_phase((spi_dev_t*)dev)
+#define spi_flash_ll_set_cs_pin(dev, pin)                    gpspi_flash_ll_set_cs_pin((spi_dev_t*)dev, pin)
+#define spi_flash_ll_set_read_mode(dev, read_mode)           gpspi_flash_ll_set_read_mode((spi_dev_t*)dev, read_mode)
+#define spi_flash_ll_set_clock(dev, clk)                     gpspi_flash_ll_set_clock((spi_dev_t*)dev, (gpspi_flash_ll_clock_reg_t*)clk)
+#define spi_flash_ll_set_miso_bitlen(dev, bitlen)            gpspi_flash_ll_set_miso_bitlen((spi_dev_t*)dev, bitlen)
+#define spi_flash_ll_set_mosi_bitlen(dev, bitlen)            gpspi_flash_ll_set_mosi_bitlen((spi_dev_t*)dev, bitlen)
+#define spi_flash_ll_set_command(dev, cmd, bitlen)           gpspi_flash_ll_set_command((spi_dev_t*)dev, cmd, bitlen)
+#define spi_flash_ll_set_addr_bitlen(dev, bitlen)            gpspi_flash_ll_set_addr_bitlen((spi_dev_t*)dev, bitlen)
+#define spi_flash_ll_get_addr_bitlen(dev)                    gpspi_flash_ll_get_addr_bitlen((spi_dev_t*)dev)
+#define spi_flash_ll_set_address(dev, addr)                  gpspi_flash_ll_set_address((spi_dev_t*)dev, addr)
+#define spi_flash_ll_set_usr_address(dev, addr, bitlen)      gpspi_flash_ll_set_usr_address((spi_dev_t*)dev, addr, bitlen)
+#define spi_flash_ll_set_dummy(dev, dummy)                   gpspi_flash_ll_set_dummy((spi_dev_t*)dev, dummy)
+#define spi_flash_ll_set_dummy_out(dev, en, lev)             gpspi_flash_ll_set_dummy_out((spi_dev_t*)dev, en, lev)
+#define spi_flash_ll_set_hold(dev, hold_n)                   gpspi_flash_ll_set_hold((spi_dev_t*)dev, hold_n)
+#define spi_flash_ll_set_cs_setup(dev, cs_setup_time)        gpspi_flash_ll_set_cs_setup((spi_dev_t*)dev, cs_setup_time)
+
+#else
+#define spi_flash_ll_reset(dev)                              spimem_flash_ll_reset((spi_mem_dev_t*)dev)
+#define spi_flash_ll_cmd_is_done(dev)                        spimem_flash_ll_cmd_is_done((spi_mem_dev_t*)dev)
+#define spi_flash_ll_erase_chip(dev)                         spimem_flash_ll_erase_chip((spi_mem_dev_t*)dev)
+#define spi_flash_ll_erase_sector(dev)                       spimem_flash_ll_erase_sector((spi_mem_dev_t*)dev)
+#define spi_flash_ll_erase_block(dev)                        spimem_flash_ll_erase_block((spi_mem_dev_t*)dev)
+#define spi_flash_ll_set_write_protect(dev, wp)              spimem_flash_ll_set_write_protect((spi_mem_dev_t*)dev, wp)
+#define spi_flash_ll_get_buffer_data(dev, buffer, read_len)  spimem_flash_ll_get_buffer_data((spi_mem_dev_t*)dev, buffer, read_len)
+#define spi_flash_ll_set_buffer_data(dev, buffer, len)       spimem_flash_ll_set_buffer_data((spi_mem_dev_t*)dev, buffer, len)
+#define spi_flash_ll_program_page(dev, buffer, len)          spimem_flash_ll_program_page((spi_mem_dev_t*)dev, buffer, len)
+#define spi_flash_ll_user_start(dev)                         spimem_flash_ll_user_start((spi_mem_dev_t*)dev)
+#define spi_flash_ll_host_idle(dev)                          spimem_flash_ll_host_idle((spi_mem_dev_t*)dev)
+#define spi_flash_ll_read_phase(dev)                         spimem_flash_ll_read_phase((spi_mem_dev_t*)dev)
+#define spi_flash_ll_set_cs_pin(dev, pin)                    spimem_flash_ll_set_cs_pin((spi_mem_dev_t*)dev, pin)
+#define spi_flash_ll_set_read_mode(dev, read_mode)           spimem_flash_ll_set_read_mode((spi_mem_dev_t*)dev, read_mode)
+#define spi_flash_ll_set_clock(dev, clk)                     spimem_flash_ll_set_clock((spi_mem_dev_t*)dev, (spimem_flash_ll_clock_reg_t*)clk)
+#define spi_flash_ll_set_miso_bitlen(dev, bitlen)            spimem_flash_ll_set_miso_bitlen((spi_mem_dev_t*)dev, bitlen)
+#define spi_flash_ll_set_mosi_bitlen(dev, bitlen)            spimem_flash_ll_set_mosi_bitlen((spi_mem_dev_t*)dev, bitlen)
+#define spi_flash_ll_set_command(dev, cmd, bitlen)           spimem_flash_ll_set_command((spi_mem_dev_t*)dev, cmd, bitlen)
+#define spi_flash_ll_set_addr_bitlen(dev, bitlen)            spimem_flash_ll_set_addr_bitlen((spi_mem_dev_t*)dev, bitlen)
+#define spi_flash_ll_get_addr_bitlen(dev)                    spimem_flash_ll_get_addr_bitlen((spi_mem_dev_t*) dev)
+#define spi_flash_ll_set_address(dev, addr)                  spimem_flash_ll_set_address((spi_mem_dev_t*)dev, addr)
+#define spi_flash_ll_set_usr_address(dev, addr, bitlen)      spimem_flash_ll_set_usr_address((spi_mem_dev_t*)dev, addr, bitlen)
+#define spi_flash_ll_set_dummy(dev, dummy)                   spimem_flash_ll_set_dummy((spi_mem_dev_t*)dev, dummy)
+#define spi_flash_ll_set_dummy_out(dev, en, lev)             spimem_flash_ll_set_dummy_out((spi_mem_dev_t*)dev, en, lev)
+#define spi_flash_ll_set_hold(dev, hold_n)                   spimem_flash_ll_set_hold((spi_mem_dev_t*)dev, hold_n)
+#define spi_flash_ll_set_cs_setup(dev, cs_setup_time)        spimem_flash_ll_set_cs_setup((spi_mem_dev_t*)dev, cs_setup_time)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spi_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spi_ll.h
new file mode 100644
index 00000000000..a223b97600a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spi_ll.h
@@ -0,0 +1,1094 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The LL layer for ESP32-S3 SPI register operations
+
+#pragma once
+
+#include <stdlib.h> //for abs()
+#include <string.h>
+#include "esp_attr.h"
+#include "esp_types.h"
+#include "soc/spi_periph.h"
+#include "soc/spi_struct.h"
+#include "soc/lldesc.h"
+#include "hal/assert.h"
+#include "hal/misc.h"
+#include "hal/spi_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Interrupt not used. Don't use in app.
+#define SPI_LL_UNUSED_INT_MASK  (SPI_TRANS_DONE_INT_ENA | SPI_SLV_WR_DMA_DONE_INT_ENA | SPI_SLV_RD_DMA_DONE_INT_ENA | SPI_SLV_WR_BUF_DONE_INT_ENA | SPI_SLV_RD_BUF_DONE_INT_ENA)
+/// These 2 masks together will set SPI transaction to one line mode
+#define SPI_LL_ONE_LINE_CTRL_MASK (SPI_FREAD_OCT | SPI_FREAD_QUAD | SPI_FREAD_DUAL | SPI_FCMD_OCT | \
+        SPI_FCMD_QUAD | SPI_FCMD_DUAL | SPI_FADDR_OCT | SPI_FADDR_QUAD | SPI_FADDR_DUAL)
+#define SPI_LL_ONE_LINE_USER_MASK (SPI_FWRITE_OCT | SPI_FWRITE_QUAD | SPI_FWRITE_DUAL)
+
+/// Swap the bit order to its correct place to send
+#define HAL_SPI_SWAP_DATA_TX(data, len) HAL_SWAP32((uint32_t)(data) << (32 - len))
+/// This is the expected clock frequency
+#define SPI_LL_PERIPH_CLK_FREQ (80 * 1000000)
+#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):((ID)==1? &GPSPI2 : &GPSPI3))
+
+/**
+ * The data structure holding calculated clock configuration. Since the
+ * calculation needs long time, it should be calculated during initialization and
+ * stored somewhere to be quickly used.
+ */
+typedef uint32_t spi_ll_clock_val_t;
+typedef spi_dev_t spi_dma_dev_t;
+
+// Type definition of all supported interrupts
+typedef enum {
+    SPI_LL_INTR_TRANS_DONE =    BIT(0),     ///< A transaction has done
+    SPI_LL_INTR_RDBUF =         BIT(6),     ///< Has received RDBUF command. Only available in slave HD.
+    SPI_LL_INTR_WRBUF =         BIT(7),     ///< Has received WRBUF command. Only available in slave HD.
+    SPI_LL_INTR_RDDMA =         BIT(8),     ///< Has received RDDMA command. Only available in slave HD.
+    SPI_LL_INTR_WRDMA =         BIT(9),     ///< Has received WRDMA command. Only available in slave HD.
+    SPI_LL_INTR_CMD7 =          BIT(10),    ///< Has received CMD7 command. Only available in slave HD.
+    SPI_LL_INTR_CMD8 =          BIT(11),    ///< Has received CMD8 command. Only available in slave HD.
+    SPI_LL_INTR_CMD9 =          BIT(12),    ///< Has received CMD9 command. Only available in slave HD.
+    SPI_LL_INTR_CMDA =          BIT(13),    ///< Has received CMDA command. Only available in slave HD.
+    SPI_LL_INTR_SEG_DONE =      BIT(14),
+} spi_ll_intr_t;
+FLAG_ATTR(spi_ll_intr_t)
+
+// Flags for conditions under which the transaction length should be recorded
+typedef enum {
+    SPI_LL_TRANS_LEN_COND_WRBUF =   BIT(0), ///< WRBUF length will be recorded
+    SPI_LL_TRANS_LEN_COND_RDBUF =   BIT(1), ///< RDBUF length will be recorded
+    SPI_LL_TRANS_LEN_COND_WRDMA =   BIT(2), ///< WRDMA length will be recorded
+    SPI_LL_TRANS_LEN_COND_RDDMA =   BIT(3), ///< RDDMA length will be recorded
+} spi_ll_trans_len_cond_t;
+FLAG_ATTR(spi_ll_trans_len_cond_t)
+
+/*------------------------------------------------------------------------------
+ * Control
+ *----------------------------------------------------------------------------*/
+/**
+ * Initialize SPI peripheral (master).
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_master_init(spi_dev_t *hw)
+{
+    //Reset timing
+    hw->user1.cs_setup_time = 0;
+    hw->user1.cs_hold_time = 0;
+
+    //use all 64 bytes of the buffer
+    hw->user.usr_miso_highpart = 0;
+    hw->user.usr_mosi_highpart = 0;
+
+    //Disable unneeded ints
+    hw->slave.val = 0;
+    hw->user.val = 0;
+
+    hw->clk_gate.clk_en = 1;
+    hw->clk_gate.mst_clk_active = 1;
+    hw->clk_gate.mst_clk_sel = 1;
+
+    hw->dma_conf.val = 0;
+    hw->dma_conf.tx_seg_trans_clr_en = 1;
+    hw->dma_conf.rx_seg_trans_clr_en = 1;
+    hw->dma_conf.dma_seg_trans_en = 0;
+}
+
+/**
+ * Initialize SPI peripheral (slave).
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_slave_init(spi_dev_t *hw)
+{
+    //Configure slave
+    hw->clock.val = 0;
+    hw->user.val = 0;
+    hw->ctrl.val = 0;
+    hw->user.doutdin = 1; //we only support full duplex
+    hw->user.sio = 0;
+    hw->slave.slave_mode = 1;
+    hw->slave.soft_reset = 1;
+    hw->slave.soft_reset = 0;
+    //use all 64 bytes of the buffer
+    hw->user.usr_miso_highpart = 0;
+    hw->user.usr_mosi_highpart = 0;
+
+    // Configure DMA In-Link to not be terminated when transaction bit counter exceeds
+    hw->dma_conf.rx_eof_en = 0;
+    hw->dma_conf.dma_seg_trans_en = 0;
+
+    //Disable unneeded ints
+    hw->dma_int_ena.val &= ~SPI_LL_UNUSED_INT_MASK;
+}
+
+/**
+ * Initialize SPI peripheral (slave half duplex mode)
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_slave_hd_init(spi_dev_t *hw)
+{
+    hw->clock.val = 0;
+    hw->user.val = 0;
+    hw->ctrl.val = 0;
+    hw->user.doutdin = 0;
+    hw->user.sio = 0;
+
+    hw->slave.soft_reset = 1;
+    hw->slave.soft_reset = 0;
+    hw->slave.slave_mode = 1;
+}
+
+/**
+ * Check whether user-defined transaction is done.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ *
+ * @return   True if transaction is done, otherwise false.
+ */
+static inline bool spi_ll_usr_is_done(spi_dev_t *hw)
+{
+    return hw->dma_int_raw.trans_done;
+}
+
+/**
+ * Trigger start of user-defined transaction for master.
+ * The synchronization between two clock domains is required in ESP32-S3
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_master_user_start(spi_dev_t *hw)
+{
+    hw->cmd.update = 1;
+    while (hw->cmd.update);
+    hw->cmd.usr = 1;
+}
+
+/**
+ * Trigger start of user-defined transaction for slave.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_slave_user_start(spi_dev_t *hw)
+{
+    hw->cmd.usr = 1;
+}
+
+/**
+ * Get current running command bit-mask. (Preview)
+ *
+ * @param hw Beginning address of the peripheral registers.
+ *
+ * @return   Bitmask of running command, see ``SPI_CMD_REG``. 0 if no in-flight command.
+ */
+static inline uint32_t spi_ll_get_running_cmd(spi_dev_t *hw)
+{
+    return hw->cmd.val;
+}
+
+/**
+ * Reset the slave peripheral before next transaction.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_slave_reset(spi_dev_t *hw)
+{
+    hw->slave.soft_reset = 1;
+    hw->slave.soft_reset = 0;
+}
+
+/**
+ * Reset SPI CPU TX FIFO
+ *
+ * On ESP32S3, this function is not seperated
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_cpu_tx_fifo_reset(spi_dev_t *hw)
+{
+    hw->dma_conf.buf_afifo_rst = 1;
+    hw->dma_conf.buf_afifo_rst = 0;
+}
+
+/**
+ * Reset SPI CPU RX FIFO
+ *
+ * On ESP32S3, this function is not seperated
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_cpu_rx_fifo_reset(spi_dev_t *hw)
+{
+    hw->dma_conf.rx_afifo_rst = 1;
+    hw->dma_conf.rx_afifo_rst = 0;
+}
+
+/**
+ * Reset SPI DMA TX FIFO
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_dma_tx_fifo_reset(spi_dev_t *hw)
+{
+    hw->dma_conf.dma_afifo_rst = 1;
+    hw->dma_conf.dma_afifo_rst = 0;
+}
+
+/**
+ * Reset SPI DMA RX FIFO
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_dma_rx_fifo_reset(spi_dev_t *hw)
+{
+    hw->dma_conf.rx_afifo_rst = 1;
+    hw->dma_conf.rx_afifo_rst = 0;
+}
+
+/**
+ * Clear in fifo full error
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_infifo_full_clr(spi_dev_t *hw)
+{
+    hw->dma_int_clr.infifo_full_err = 1;
+}
+
+/**
+ * Clear out fifo empty error
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_outfifo_empty_clr(spi_dev_t *hw)
+{
+    hw->dma_int_clr.outfifo_empty_err = 1;
+}
+
+/*------------------------------------------------------------------------------
+ * DMA
+ *----------------------------------------------------------------------------*/
+/**
+ * Enable/Disable RX DMA (Peripherals->DMA->RAM)
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param enable 1: enable; 2: disable
+ */
+static inline void spi_ll_dma_rx_enable(spi_dev_t *hw, bool enable)
+{
+    hw->dma_conf.dma_rx_ena = enable;
+}
+
+/**
+ * Enable/Disable TX DMA (RAM->DMA->Peripherals)
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param enable 1: enable; 2: disable
+ */
+static inline void spi_ll_dma_tx_enable(spi_dev_t *hw, bool enable)
+{
+    hw->dma_conf.dma_tx_ena = enable;
+}
+
+/**
+ * Configuration of RX DMA EOF interrupt generation way
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param enable 1: spi_dma_inlink_eof is set when the number of dma pushed data bytes is equal to the value of spi_slv/mst_dma_rd_bytelen[19:0] in spi dma transition.  0: spi_dma_inlink_eof is set by spi_trans_done in non-seg-trans or spi_dma_seg_trans_done in seg-trans.
+ */
+static inline void spi_ll_dma_set_rx_eof_generation(spi_dev_t *hw, bool enable)
+{
+    hw->dma_conf.rx_eof_en = enable;
+}
+
+/*------------------------------------------------------------------------------
+ * Buffer
+ *----------------------------------------------------------------------------*/
+/**
+ * Write to SPI hardware data buffer.
+ *
+ * @param hw             Beginning address of the peripheral registers.
+ * @param buffer_to_send Address of the data to be written to the hardware data buffer.
+ * @param bitlen         Length to write, in bits.
+ */
+static inline void spi_ll_write_buffer(spi_dev_t *hw, const uint8_t *buffer_to_send, size_t bitlen)
+{
+    for (size_t x = 0; x < bitlen; x += 32) {
+        //Use memcpy to get around alignment issues for txdata
+        uint32_t word;
+        memcpy(&word, &buffer_to_send[x / 8], 4);
+        hw->data_buf[(x / 32)] = word;
+    }
+}
+
+/**
+ * Write to SPI hardware data buffer by buffer ID (address)
+ *
+ * @param hw      Beginning address of the peripheral registers
+ * @param byte_id Start ID (address) of the hardware buffer to be written
+ * @param data    Address of the data to be written to the hardware data buffer.
+ * @param len     Length to write, in bytes.
+ */
+static inline void spi_ll_write_buffer_byte(spi_dev_t *hw, int byte_id, uint8_t *data, int len)
+{
+    HAL_ASSERT(byte_id + len <= 64);
+    HAL_ASSERT(len > 0);
+    HAL_ASSERT(byte_id >= 0);
+
+    while (len > 0) {
+        uint32_t word;
+        int offset = byte_id % 4;
+        int copy_len = 4 - offset;
+        if (copy_len > len) {
+            copy_len = len;
+        }
+
+        //read-modify-write
+        if (copy_len != 4) {
+            word = hw->data_buf[byte_id / 4];    //read
+        }
+        memcpy(((uint8_t *)&word) + offset, data, copy_len);  //modify
+        hw->data_buf[byte_id / 4] = word;                     //write
+
+        data += copy_len;
+        byte_id += copy_len;
+        len -= copy_len;
+    }
+}
+
+/**
+ * Read from SPI hardware data buffer.
+ *
+ * @param hw            Beginning address of the peripheral registers.
+ * @param buffer_to_rcv Address of a buffer to read data from hardware data buffer
+ * @param bitlen        Length to read, in bits.
+ */
+static inline void spi_ll_read_buffer(spi_dev_t *hw, uint8_t *buffer_to_rcv, size_t bitlen)
+{
+    for (size_t x = 0; x < bitlen; x += 32) {
+        //Do a memcpy to get around possible alignment issues in rx_buffer
+        uint32_t word = hw->data_buf[x / 32];
+        int len = bitlen - x;
+        if (len > 32) {
+            len = 32;
+        }
+        memcpy(&buffer_to_rcv[x / 8], &word, (len + 7) / 8);
+    }
+}
+
+/**
+ * Read from SPI hardware data buffer by buffer ID (address)
+ *
+ * @param hw      Beginning address of the peripheral registers
+ * @param byte_id Start ID (address) of the hardware buffer to be read
+ * @param data    Address of a buffer to read data from hardware data buffer
+ * @param len     Length to read, in bytes.
+ */
+static inline void spi_ll_read_buffer_byte(spi_dev_t *hw, int byte_id, uint8_t *out_data, int len)
+{
+    while (len > 0) {
+        uint32_t word = hw->data_buf[byte_id / 4];
+        int offset = byte_id % 4;
+        int copy_len = 4 - offset;
+        if (copy_len > len) {
+            copy_len = len;
+        }
+
+        memcpy(out_data, ((uint8_t *)&word) + offset, copy_len);
+        byte_id += copy_len;
+        out_data += copy_len;
+        len -= copy_len;
+    }
+}
+
+/*------------------------------------------------------------------------------
+ * Configs: mode
+ *----------------------------------------------------------------------------*/
+/**
+ * Enable/disable the postive-cs feature.
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param cs     One of the CS (0-2) to enable/disable the feature.
+ * @param pos_cs True to enable the feature, otherwise disable (default).
+ */
+static inline void spi_ll_master_set_pos_cs(spi_dev_t *hw, int cs, uint32_t pos_cs)
+{
+    if (pos_cs) {
+        hw->misc.master_cs_pol |= (1 << cs);
+    } else {
+        hw->misc.master_cs_pol &= ~(1 << cs);
+    }
+}
+
+/**
+ * Enable/disable the LSBFIRST feature for TX data.
+ *
+ * @param hw       Beginning address of the peripheral registers.
+ * @param lsbfirst True if LSB of TX data to be sent first, otherwise MSB is sent first (default).
+ */
+static inline void spi_ll_set_tx_lsbfirst(spi_dev_t *hw, bool lsbfirst)
+{
+    hw->ctrl.wr_bit_order = lsbfirst;
+}
+
+/**
+ * Enable/disable the LSBFIRST feature for RX data.
+ *
+ * @param hw       Beginning address of the peripheral registers.
+ * @param lsbfirst True if first bit received as LSB, otherwise as MSB (default).
+ */
+static inline void spi_ll_set_rx_lsbfirst(spi_dev_t *hw, bool lsbfirst)
+{
+    hw->ctrl.rd_bit_order = lsbfirst;
+}
+
+/**
+ * Set SPI mode for the peripheral as master.
+ *
+ * @param hw   Beginning address of the peripheral registers.
+ * @param mode SPI mode to work at, 0-3.
+ */
+static inline void spi_ll_master_set_mode(spi_dev_t *hw, uint8_t mode)
+{
+    //Configure polarity
+    if (mode == 0) {
+        hw->misc.ck_idle_edge = 0;
+        hw->user.ck_out_edge = 0;
+    } else if (mode == 1) {
+        hw->misc.ck_idle_edge = 0;
+        hw->user.ck_out_edge = 1;
+    } else if (mode == 2) {
+        hw->misc.ck_idle_edge = 1;
+        hw->user.ck_out_edge = 1;
+    } else if (mode == 3) {
+        hw->misc.ck_idle_edge = 1;
+        hw->user.ck_out_edge = 0;
+    }
+}
+
+/**
+ * Set SPI mode for the peripheral as slave.
+ *
+ * @param hw   Beginning address of the peripheral registers.
+ * @param mode SPI mode to work at, 0-3.
+ */
+static inline void spi_ll_slave_set_mode(spi_dev_t *hw, const int mode, bool dma_used)
+{
+    if (mode == 0) {
+        hw->misc.ck_idle_edge = 0;
+        hw->user.rsck_i_edge = 0;
+        hw->user.tsck_i_edge = 0;
+        hw->slave.clk_mode_13 = 0;
+    } else if (mode == 1) {
+        hw->misc.ck_idle_edge = 0;
+        hw->user.rsck_i_edge = 1;
+        hw->user.tsck_i_edge = 1;
+        hw->slave.clk_mode_13 = 1;
+    } else if (mode == 2) {
+        hw->misc.ck_idle_edge = 1;
+        hw->user.rsck_i_edge = 1;
+        hw->user.tsck_i_edge = 1;
+        hw->slave.clk_mode_13 = 0;
+    } else if (mode == 3) {
+        hw->misc.ck_idle_edge = 1;
+        hw->user.rsck_i_edge = 0;
+        hw->user.tsck_i_edge = 0;
+        hw->slave.clk_mode_13 = 1;
+    }
+    hw->slave.rsck_data_out = 0;
+}
+
+/**
+ * Set SPI to work in full duplex or half duplex mode.
+ *
+ * @param hw          Beginning address of the peripheral registers.
+ * @param half_duplex True to work in half duplex mode, otherwise in full duplex mode.
+ */
+static inline void spi_ll_set_half_duplex(spi_dev_t *hw, bool half_duplex)
+{
+    hw->user.doutdin = !half_duplex;
+}
+
+/**
+ * Set SPI to work in SIO mode or not.
+ *
+ * SIO is a mode which MOSI and MISO share a line. The device MUST work in half-duplexmode.
+ *
+ * @param hw       Beginning address of the peripheral registers.
+ * @param sio_mode True to work in SIO mode, otherwise false.
+ */
+static inline void spi_ll_set_sio_mode(spi_dev_t *hw, int sio_mode)
+{
+    hw->user.sio = sio_mode;
+}
+
+/**
+ * Configure the SPI transaction line mode for the master to use.
+ *
+ * @param hw        Beginning address of the peripheral registers.
+ * @param line_mode SPI transaction line mode to use, see ``spi_line_mode_t``.
+ */
+static inline void spi_ll_master_set_line_mode(spi_dev_t *hw, spi_line_mode_t line_mode)
+{
+    hw->ctrl.val &= ~SPI_LL_ONE_LINE_CTRL_MASK;
+    hw->user.val &= ~SPI_LL_ONE_LINE_USER_MASK;
+    hw->ctrl.fcmd_dual = (line_mode.cmd_lines == 2);
+    hw->ctrl.fcmd_quad = (line_mode.cmd_lines == 4);
+    hw->ctrl.fcmd_oct = (line_mode.cmd_lines == 8);
+    hw->ctrl.faddr_dual = (line_mode.addr_lines == 2);
+    hw->ctrl.faddr_quad = (line_mode.addr_lines == 4);
+    hw->ctrl.faddr_oct = (line_mode.addr_lines == 8);
+    hw->ctrl.fread_dual = (line_mode.data_lines == 2);
+    hw->user.fwrite_dual = (line_mode.data_lines == 2);
+    hw->ctrl.fread_quad = (line_mode.data_lines == 4);
+    hw->user.fwrite_quad = (line_mode.data_lines == 4);
+    hw->ctrl.fread_oct = (line_mode.data_lines == 8);
+    hw->user.fwrite_oct = (line_mode.data_lines == 8);
+}
+
+/**
+ * Set the SPI slave to work in segment transaction mode
+ *
+ * @param hw        Beginning address of the peripheral registers.
+ * @param seg_trans True to work in seg mode, otherwise false.
+ */
+static inline void spi_ll_slave_set_seg_mode(spi_dev_t *hw, bool seg_trans)
+{
+    hw->dma_conf.dma_seg_trans_en = seg_trans;
+}
+
+/**
+ * Select one of the CS to use in current transaction.
+ *
+ * @param hw    Beginning address of the peripheral registers.
+ * @param cs_id The cs to use, 0-2, otherwise none of them is used.
+ */
+static inline void spi_ll_master_select_cs(spi_dev_t *hw, int cs_id)
+{
+    if (hw == &GPSPI2) {
+        hw->misc.cs0_dis = (cs_id == 0) ? 0 : 1;
+        hw->misc.cs1_dis = (cs_id == 1) ? 0 : 1;
+        hw->misc.cs2_dis = (cs_id == 2) ? 0 : 1;
+        hw->misc.cs3_dis = (cs_id == 3) ? 0 : 1;
+        hw->misc.cs4_dis = (cs_id == 4) ? 0 : 1;
+        hw->misc.cs5_dis = (cs_id == 5) ? 0 : 1;
+    }
+
+    if (hw == &GPSPI3) {
+        hw->misc.cs0_dis = (cs_id == 0) ? 0 : 1;
+        hw->misc.cs1_dis = (cs_id == 1) ? 0 : 1;
+        hw->misc.cs2_dis = (cs_id == 2) ? 0 : 1;
+    }
+}
+
+/**
+ * Keep Chip Select activated after the current transaction.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param keep_active if 0 don't keep CS activated, else keep CS activated
+ */
+static inline void spi_ll_master_keep_cs(spi_dev_t *hw, int keep_active)
+{
+    hw->misc.cs_keep_active = (keep_active != 0) ? 1 : 0;
+}
+
+/*------------------------------------------------------------------------------
+ * Configs: parameters
+ *----------------------------------------------------------------------------*/
+/**
+ * Set the clock for master by stored value.
+ *
+ * @param hw  Beginning address of the peripheral registers.
+ * @param val Stored clock configuration calculated before (by ``spi_ll_cal_clock``).
+ */
+static inline void spi_ll_master_set_clock_by_reg(spi_dev_t *hw, const spi_ll_clock_val_t *val)
+{
+    hw->clock.val = *(uint32_t *)val;
+}
+
+/**
+ * Get the frequency of given dividers. Don't use in app.
+ *
+ * @param fapb APB clock of the system.
+ * @param pre  Pre devider.
+ * @param n    Main divider.
+ *
+ * @return     Frequency of given dividers.
+ */
+static inline int spi_ll_freq_for_pre_n(int fapb, int pre, int n)
+{
+    return (fapb / (pre * n));
+}
+
+/**
+ * Calculate the nearest frequency avaliable for master.
+ *
+ * @param fapb       APB clock of the system.
+ * @param hz         Frequncy desired.
+ * @param duty_cycle Duty cycle desired.
+ * @param out_reg    Output address to store the calculated clock configurations for the return frequency.
+ *
+ * @return           Actual (nearest) frequency.
+ */
+static inline int spi_ll_master_cal_clock(int fapb, int hz, int duty_cycle, spi_ll_clock_val_t *out_reg)
+{
+    typeof(GPSPI2.clock) reg;
+    int eff_clk;
+
+    //In hw, n, h and l are 1-64, pre is 1-8K. Value written to register is one lower than used value.
+    if (hz > ((fapb / 4) * 3)) {
+        //Using Fapb directly will give us the best result here.
+        reg.clkcnt_l = 0;
+        reg.clkcnt_h = 0;
+        reg.clkcnt_n = 0;
+        reg.clkdiv_pre = 0;
+        reg.clk_equ_sysclk = 1;
+        eff_clk = fapb;
+    } else {
+        //For best duty cycle resolution, we want n to be as close to 32 as possible, but
+        //we also need a pre/n combo that gets us as close as possible to the intended freq.
+        //To do this, we bruteforce n and calculate the best pre to go along with that.
+        //If there's a choice between pre/n combos that give the same result, use the one
+        //with the higher n.
+        int pre, n, h, l;
+        int bestn = -1;
+        int bestpre = -1;
+        int besterr = 0;
+        int errval;
+        for (n = 2; n <= 64; n++) { //Start at 2: we need to be able to set h/l so we have at least one high and one low pulse.
+            //Effectively, this does pre=round((fapb/n)/hz).
+            pre = ((fapb / n) + (hz / 2)) / hz;
+            if (pre <= 0) {
+                pre = 1;
+            }
+            if (pre > 8192) {
+                pre = 8192;
+            }
+            errval = abs(spi_ll_freq_for_pre_n(fapb, pre, n) - hz);
+            if (bestn == -1 || errval <= besterr) {
+                besterr = errval;
+                bestn = n;
+                bestpre = pre;
+            }
+        }
+
+        n = bestn;
+        pre = bestpre;
+        l = n;
+        //This effectively does round((duty_cycle*n)/256)
+        h = (duty_cycle * n + 127) / 256;
+        if (h <= 0) {
+            h = 1;
+        }
+
+        reg.clk_equ_sysclk = 0;
+        reg.clkcnt_n = n - 1;
+        reg.clkdiv_pre = pre - 1;
+        reg.clkcnt_h = h - 1;
+        reg.clkcnt_l = l - 1;
+        eff_clk = spi_ll_freq_for_pre_n(fapb, pre, n);
+    }
+    if (out_reg != NULL) {
+        *(uint32_t *)out_reg = reg.val;
+    }
+    return eff_clk;
+}
+
+/**
+ * Calculate and set clock for SPI master according to desired parameters.
+ *
+ * This takes long, suggest to calculate the configuration during
+ * initialization by ``spi_ll_master_cal_clock`` and store the result, then
+ * configure the clock by stored value when used by
+ * ``spi_ll_msater_set_clock_by_reg``.
+ *
+ * @param hw         Beginning address of the peripheral registers.
+ * @param fapb       APB clock of the system.
+ * @param hz         Frequncy desired.
+ * @param duty_cycle Duty cycle desired.
+ *
+ * @return           Actual frequency that is used.
+ */
+static inline int spi_ll_master_set_clock(spi_dev_t *hw, int fapb, int hz, int duty_cycle)
+{
+    spi_ll_clock_val_t reg_val;
+    int freq = spi_ll_master_cal_clock(fapb, hz, duty_cycle, &reg_val);
+    spi_ll_master_set_clock_by_reg(hw, &reg_val);
+    return freq;
+}
+
+/**
+ * Set the mosi delay after the output edge to the signal. (Preview)
+ *
+ * The delay mode/num is a Espressif conception, may change in the new chips.
+ *
+ * @param hw         Beginning address of the peripheral registers.
+ * @param delay_mode Delay mode, see TRM.
+ * @param delay_num  APB clocks to delay.
+ */
+static inline void spi_ll_set_mosi_delay(spi_dev_t *hw, int delay_mode, int delay_num)
+{
+}
+
+/**
+ * Set the miso delay applied to the input signal before the internal peripheral. (Preview)
+ *
+ * The delay mode/num is a Espressif conception, may change in the new chips.
+ *
+ * @param hw         Beginning address of the peripheral registers.
+ * @param delay_mode Delay mode, see TRM.
+ * @param delay_num  APB clocks to delay.
+ */
+static inline void spi_ll_set_miso_delay(spi_dev_t *hw, int delay_mode, int delay_num)
+{
+}
+
+/**
+ * Set the delay of SPI clocks before the CS inactive edge after the last SPI clock.
+ *
+ * @param hw   Beginning address of the peripheral registers.
+ * @param hold Delay of SPI clocks after the last clock, 0 to disable the hold phase.
+ */
+static inline void spi_ll_master_set_cs_hold(spi_dev_t *hw, int hold)
+{
+    hw->user1.cs_hold_time = hold;
+    hw->user.cs_hold = hold ? 1 : 0;
+}
+
+/**
+ * Set the delay of SPI clocks before the first SPI clock after the CS active edge.
+ *
+ * Note ESP32 doesn't support to use this feature when command/address phases
+ * are used in full duplex mode.
+ *
+ * @param hw    Beginning address of the peripheral registers.
+ * @param setup Delay of SPI clocks after the CS active edge, 0 to disable the setup phase.
+ */
+static inline void spi_ll_master_set_cs_setup(spi_dev_t *hw, uint8_t setup)
+{
+    hw->user1.cs_setup_time = setup - 1;
+    hw->user.cs_setup = setup ? 1 : 0;
+}
+
+/*------------------------------------------------------------------------------
+ * Configs: data
+ *----------------------------------------------------------------------------*/
+/**
+ * Set the output length (master).
+ * This should be called before master setting MISO(input) length
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param bitlen output length, in bits.
+ */
+static inline void spi_ll_set_mosi_bitlen(spi_dev_t *hw, size_t bitlen)
+{
+    if (bitlen > 0) {
+        hw->ms_dlen.ms_data_bitlen = bitlen - 1;
+    }
+}
+
+/**
+ * Set the input length (master).
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param bitlen input length, in bits.
+ */
+static inline void spi_ll_set_miso_bitlen(spi_dev_t *hw, size_t bitlen)
+{
+    if (bitlen > 0) {
+        hw->ms_dlen.ms_data_bitlen = bitlen - 1;
+    }
+}
+
+/**
+ * Set the maximum input length (slave).
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param bitlen Input length, in bits.
+ */
+static inline void spi_ll_slave_set_rx_bitlen(spi_dev_t *hw, size_t bitlen)
+{
+    //This is not used in esp32s3
+}
+
+/**
+ * Set the maximum output length (slave).
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param bitlen Output length, in bits.
+ */
+static inline void spi_ll_slave_set_tx_bitlen(spi_dev_t *hw, size_t bitlen)
+{
+    //This is not used in esp32s3
+}
+
+/**
+ * Set the length of command phase.
+ *
+ * When in 4-bit mode, the SPI cycles of the phase will be shorter. E.g. 16-bit
+ * command phases takes 4 cycles in 4-bit mode.
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param bitlen Length of command phase, in bits. 0 to disable the command phase.
+ */
+static inline void spi_ll_set_command_bitlen(spi_dev_t *hw, int bitlen)
+{
+    hw->user2.usr_command_bitlen = bitlen - 1;
+    hw->user.usr_command = bitlen ? 1 : 0;
+}
+
+/**
+ * Set the length of address phase.
+ *
+ * When in 4-bit mode, the SPI cycles of the phase will be shorter. E.g. 16-bit
+ * address phases takes 4 cycles in 4-bit mode.
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param bitlen Length of address phase, in bits. 0 to disable the address phase.
+ */
+static inline void spi_ll_set_addr_bitlen(spi_dev_t *hw, int bitlen)
+{
+    hw->user1.usr_addr_bitlen = bitlen - 1;
+    hw->user.usr_addr = bitlen ? 1 : 0;
+}
+
+/**
+ * Set the address value in an intuitive way.
+ *
+ * The length and lsbfirst is required to shift and swap the address to the right place.
+ *
+ * @param hw       Beginning address of the peripheral registers.
+ * @param address  Address to set
+ * @param addrlen  Length of the address phase
+ * @param lsbfirst Whether the LSB first feature is enabled.
+ */
+static inline void spi_ll_set_address(spi_dev_t *hw, uint64_t addr, int addrlen, uint32_t lsbfirst)
+{
+    if (lsbfirst) {
+        /* The output address start from the LSB of the highest byte, i.e.
+        * addr[24] -> addr[31]
+        * ...
+        * addr[0] -> addr[7]
+        * So swap the byte order to let the LSB sent first.
+        */
+        addr = HAL_SWAP32(addr);
+        //otherwise only addr register is sent
+        hw->addr = addr;
+    } else {
+        // shift the address to MSB of addr register.
+        // output address will be sent from MSB to LSB of addr register
+        hw->addr = addr << (32 - addrlen);
+    }
+}
+
+/**
+ * Set the command value in an intuitive way.
+ *
+ * The length and lsbfirst is required to shift and swap the command to the right place.
+ *
+ * @param hw       Beginning command of the peripheral registers.
+ * @param command  Command to set
+ * @param addrlen  Length of the command phase
+ * @param lsbfirst Whether the LSB first feature is enabled.
+ */
+static inline void spi_ll_set_command(spi_dev_t *hw, uint16_t cmd, int cmdlen, bool lsbfirst)
+{
+    if (lsbfirst) {
+        // The output command start from bit0 to bit 15, kept as is.
+        HAL_FORCE_MODIFY_U32_REG_FIELD(hw->user2, usr_command_value, cmd);
+    } else {
+        /* Output command will be sent from bit 7 to 0 of command_value, and
+         * then bit 15 to 8 of the same register field. Shift and swap to send
+         * more straightly.
+         */
+        HAL_FORCE_MODIFY_U32_REG_FIELD(hw->user2, usr_command_value, HAL_SPI_SWAP_DATA_TX(cmd, cmdlen));
+
+    }
+}
+
+/**
+ * Set dummy clocks to output before RX phase (master), or clocks to skip
+ * before the data phase and after the address phase (slave).
+ *
+ * Note this phase is also used to compensate RX timing in half duplex mode.
+ *
+ * @param hw      Beginning address of the peripheral registers.
+ * @param dummy_n Dummy cycles used. 0 to disable the dummy phase.
+ */
+static inline void spi_ll_set_dummy(spi_dev_t *hw, int dummy_n)
+{
+    hw->user.usr_dummy = dummy_n ? 1 : 0;
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->user1, usr_dummy_cyclelen, dummy_n - 1);
+}
+
+/**
+ * Enable/disable the RX data phase.
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param enable True if RX phase exist, otherwise false.
+ */
+static inline void spi_ll_enable_miso(spi_dev_t *hw, int enable)
+{
+    hw->user.usr_miso = enable;
+}
+
+/**
+ * Enable/disable the TX data phase.
+ *
+ * @param hw     Beginning address of the peripheral registers.
+ * @param enable True if TX phase exist, otherwise false.
+ */
+static inline void spi_ll_enable_mosi(spi_dev_t *hw, int enable)
+{
+    hw->user.usr_mosi = enable;
+}
+
+/**
+ * Get the received bit length of the slave.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ *
+ * @return   Received bits of the slave.
+ */
+static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
+{
+    return hw->slave1.data_bitlen;
+}
+
+/*------------------------------------------------------------------------------
+ * Interrupts
+ *----------------------------------------------------------------------------*/
+//helper macros to generate code for each interrupts
+#define FOR_EACH_ITEM(op, list) do { list(op) } while(0)
+#define INTR_LIST(item)    \
+    item(SPI_LL_INTR_TRANS_DONE,    dma_int_ena.trans_done,         dma_int_raw.trans_done,         dma_int_clr.trans_done,         dma_int_set.trans_done_int_set) \
+    item(SPI_LL_INTR_RDBUF,         dma_int_ena.rd_buf_done,        dma_int_raw.rd_buf_done,        dma_int_clr.rd_buf_done,        dma_int_set.rd_buf_done_int_set) \
+    item(SPI_LL_INTR_WRBUF,         dma_int_ena.wr_buf_done,        dma_int_raw.wr_buf_done,        dma_int_clr.wr_buf_done,        dma_int_set.wr_buf_done_int_set) \
+    item(SPI_LL_INTR_RDDMA,         dma_int_ena.rd_dma_done,        dma_int_raw.rd_dma_done,        dma_int_clr.rd_dma_done,        dma_int_set.rd_dma_done_int_set) \
+    item(SPI_LL_INTR_WRDMA,         dma_int_ena.wr_dma_done,        dma_int_raw.wr_dma_done,        dma_int_clr.wr_dma_done,        dma_int_set.wr_dma_done_int_set) \
+    item(SPI_LL_INTR_SEG_DONE,      dma_int_ena.dma_seg_trans_done, dma_int_raw.dma_seg_trans_done, dma_int_clr.dma_seg_trans_done, dma_int_set.dma_seg_trans_done_int_set) \
+    item(SPI_LL_INTR_CMD7,          dma_int_ena.cmd7,               dma_int_raw.cmd7,               dma_int_clr.cmd7,               dma_int_set.cmd7_int_set) \
+    item(SPI_LL_INTR_CMD8,          dma_int_ena.cmd8,               dma_int_raw.cmd8,               dma_int_clr.cmd8,               dma_int_set.cmd8_int_set) \
+    item(SPI_LL_INTR_CMD9,          dma_int_ena.cmd9,               dma_int_raw.cmd9,               dma_int_clr.cmd9,               dma_int_set.cmd9_int_set) \
+    item(SPI_LL_INTR_CMDA,          dma_int_ena.cmda,               dma_int_raw.cmda,               dma_int_clr.cmda,               dma_int_set.cmda_int_set)
+
+
+static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
+{
+#define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
+    FOR_EACH_ITEM(ENA_INTR, INTR_LIST);
+#undef ENA_INTR
+}
+
+static inline void spi_ll_disable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
+{
+#define DIS_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 0;
+    FOR_EACH_ITEM(DIS_INTR, INTR_LIST);
+#undef DIS_INTR
+}
+
+static inline void spi_ll_set_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
+{
+#define SET_INTR(intr_bit, _, __, ___, set_reg) if (intr_mask & (intr_bit)) hw->set_reg = 1;
+    FOR_EACH_ITEM(SET_INTR, INTR_LIST);
+#undef SET_INTR
+}
+
+static inline void spi_ll_clear_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
+{
+#define CLR_INTR(intr_bit, _, __, clr_reg, ...) if (intr_mask & (intr_bit)) hw->clr_reg = 1;
+    FOR_EACH_ITEM(CLR_INTR, INTR_LIST);
+#undef CLR_INTR
+}
+
+static inline bool spi_ll_get_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
+{
+#define GET_INTR(intr_bit, _, raw_reg, ...) if (intr_mask & (intr_bit) && hw->raw_reg) return true;
+    FOR_EACH_ITEM(GET_INTR, INTR_LIST);
+    return false;
+#undef GET_INTR
+}
+
+#undef FOR_EACH_ITEM
+#undef INTR_LIST
+
+/**
+ * Disable the trans_done interrupt.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_disable_int(spi_dev_t *hw)
+{
+    hw->dma_int_ena.trans_done = 0;
+}
+
+/**
+ * Clear the trans_done interrupt.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_clear_int_stat(spi_dev_t *hw)
+{
+    hw->dma_int_clr.trans_done = 1;
+}
+
+/**
+ * Set the trans_done interrupt.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_set_int_stat(spi_dev_t *hw)
+{
+    hw->dma_int_set.trans_done_int_set = 1;
+}
+
+/**
+ * Enable the trans_done interrupt.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ */
+static inline void spi_ll_enable_int(spi_dev_t *hw)
+{
+    hw->dma_int_ena.trans_done = 1;
+}
+
+/*------------------------------------------------------------------------------
+ * Slave HD
+ *----------------------------------------------------------------------------*/
+static inline void spi_ll_slave_hd_set_len_cond(spi_dev_t *hw, spi_ll_trans_len_cond_t cond_mask)
+{
+    hw->slave.rdbuf_bitlen_en = (cond_mask & SPI_LL_TRANS_LEN_COND_RDBUF) ? 1 : 0;
+    hw->slave.wrbuf_bitlen_en = (cond_mask & SPI_LL_TRANS_LEN_COND_WRBUF) ? 1 : 0;
+    hw->slave.rddma_bitlen_en = (cond_mask & SPI_LL_TRANS_LEN_COND_RDDMA) ? 1 : 0;
+    hw->slave.wrdma_bitlen_en = (cond_mask & SPI_LL_TRANS_LEN_COND_WRDMA) ? 1 : 0;
+}
+
+static inline int spi_ll_slave_get_rx_byte_len(spi_dev_t *hw)
+{
+    return hw->slave1.data_bitlen / 8;
+}
+
+static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t *hw)
+{
+    return hw->slave1.last_addr;
+}
+
+#undef SPI_LL_RST_MASK
+#undef SPI_LL_UNUSED_INT_MASK
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spimem_flash_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spimem_flash_ll.h
new file mode 100644
index 00000000000..ea394d2f47e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/spimem_flash_ll.h
@@ -0,0 +1,570 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The ll is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The Lowlevel layer for SPI Flash
+
+#pragma once
+
+#include <stdlib.h>
+#include <sys/param.h> // For MIN/MAX
+#include <stdbool.h>
+#include <string.h>
+
+#include "soc/spi_periph.h"
+#include "soc/spi_mem_struct.h"
+#include "hal/spi_types.h"
+#include "hal/spi_flash_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define spimem_flash_ll_get_hw(host_id)  (((host_id)==SPI1_HOST ?  &SPIMEM1 : NULL ))
+#define spimem_flash_ll_hw_get_id(dev)  ((dev) == (void*)&SPIMEM1? SPI1_HOST: -1)
+
+typedef typeof(SPIMEM1.clock) spimem_flash_ll_clock_reg_t;
+
+//Supported clock register values
+#define SPIMEM_FLASH_LL_CLKREG_VAL_5MHZ   ((spimem_flash_ll_clock_reg_t){.val=0x000F070F})   ///< Clock set to 5 MHz
+#define SPIMEM_FLASH_LL_CLKREG_VAL_10MHZ  ((spimem_flash_ll_clock_reg_t){.val=0x00070307})   ///< Clock set to 10 MHz
+#define SPIMEM_FLASH_LL_CLKREG_VAL_20MHZ  ((spimem_flash_ll_clock_reg_t){.val=0x00030103})   ///< Clock set to 20 MHz
+#define SPIMEM_FLASH_LL_CLKREG_VAL_26MHZ  ((spimem_flash_ll_clock_reg_t){.val=0x00020002})   ///< Clock set to 26 MHz
+#define SPIMEM_FLASH_LL_CLKREG_VAL_40MHZ  ((spimem_flash_ll_clock_reg_t){.val=0x00010001})   ///< Clock set to 40 MHz
+#define SPIMEM_FLASH_LL_CLKREG_VAL_80MHZ  ((spimem_flash_ll_clock_reg_t){.val=0x80000000})   ///< Clock set to 80 MHz
+
+/*------------------------------------------------------------------------------
+ * Control
+ *----------------------------------------------------------------------------*/
+/**
+ * Reset peripheral registers before configuration and starting control
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void spimem_flash_ll_reset(spi_mem_dev_t *dev)
+{
+    dev->user.val = 0;
+    dev->ctrl.val = 0;
+}
+
+/**
+ * Check whether the previous operation is done.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ *
+ * @return true if last command is done, otherwise false.
+ */
+static inline bool spimem_flash_ll_cmd_is_done(const spi_mem_dev_t *dev)
+{
+    return (dev->cmd.val == 0);
+}
+
+/**
+ * Erase the flash chip.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void spimem_flash_ll_erase_chip(spi_mem_dev_t *dev)
+{
+    dev->cmd.flash_ce = 1;
+}
+
+/**
+ * Erase the sector, the address should be set by spimem_flash_ll_set_address.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void spimem_flash_ll_erase_sector(spi_mem_dev_t *dev)
+{
+    dev->ctrl.val = 0;
+    dev->cmd.flash_se = 1;
+}
+
+/**
+ * Erase the block, the address should be set by spimem_flash_ll_set_address.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void spimem_flash_ll_erase_block(spi_mem_dev_t *dev)
+{
+    dev->cmd.flash_be = 1;
+}
+
+/**
+ * Suspend erase/program operation.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void spimem_flash_ll_suspend(spi_mem_dev_t *dev)
+{
+    dev->flash_sus_cmd.flash_pes = 1;
+}
+
+/**
+ * Resume suspended erase/program operation.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void spimem_flash_ll_resume(spi_mem_dev_t *dev)
+{
+    dev->flash_sus_cmd.flash_per = 1;
+}
+
+/**
+ * Initialize auto wait idle mode
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param auto_sus Enable/disable Flash Auto-Suspend.
+ */
+static inline void spimem_flash_ll_auto_suspend_init(spi_mem_dev_t *dev, bool auto_sus)
+{
+    dev->flash_sus_ctrl.flash_pes_en = auto_sus; // enable Flash Auto-Suspend.
+}
+
+/**
+ * Initialize auto resume mode
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param auto_res Enable/Disable Flash Auto-Resume.
+ *
+ */
+static inline void spimem_flash_ll_auto_resume_init(spi_mem_dev_t *dev, bool auto_res)
+{
+    dev->misc.auto_per = auto_res;
+}
+
+/**
+ * Setup the flash suspend command, may vary from chips to chips.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param sus_cmd Flash suspend command.
+ *
+ */
+static inline void spimem_flash_ll_suspend_cmd_setup(spi_mem_dev_t *dev, uint32_t sus_cmd)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_sus_ctrl, flash_pes_command, sus_cmd);
+}
+
+/**
+ * Setup the flash resume command, may vary from chips to chips.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param res_cmd Flash resume command.
+ *
+ */
+static inline void spimem_flash_ll_resume_cmd_setup(spi_mem_dev_t *dev, uint32_t res_cmd)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_sus_ctrl, flash_per_command, res_cmd);
+}
+
+/**
+ * Setup the flash read suspend status command, may vary from chips to chips.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param pesr_cmd Flash read suspend status command.
+ *
+ */
+static inline void spimem_flash_ll_rd_sus_cmd_setup(spi_mem_dev_t *dev, uint32_t pesr_cmd)
+{
+    abort(); //Not support on esp32s3
+}
+
+/**
+ * Setup to check SUS/SUS1/SUS2 to ensure the suspend status of flashs.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param sus_check_sus_en 1: enable, 0: disable.
+ *
+ */
+static inline void spimem_flash_ll_sus_check_sus_setup(spi_mem_dev_t *dev, bool sus_check_sus_en)
+{
+    abort(); //Not support on esp32s3
+}
+
+/**
+ * Setup to check SUS/SUS1/SUS2 to ensure the resume status of flashs.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param sus_check_sus_en 1: enable, 0: disable.
+ *
+ */
+static inline void spimem_flash_ll_res_check_sus_setup(spi_mem_dev_t *dev, bool res_check_sus_en)
+{
+    abort(); //Not support ont esp32s3
+}
+
+/**
+ * Set 8 bit command to read suspend status
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void spimem_flash_ll_set_read_sus_status(spi_mem_dev_t *dev, uint32_t sus_mask)
+{
+    abort();// Not supported on esp32s3
+}
+
+/**
+ * Initialize auto wait idle mode
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param auto_waiti Enable/disable auto wait-idle function
+ */
+static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool auto_waiti)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05); // Set the command to send, to fetch flash status reg value.
+    dev->flash_waiti_ctrl.waiti_en = auto_waiti;  // enable auto wait-idle function.
+}
+
+/**
+ * Return the suspend status of erase or program operations.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ *
+ * @return true if suspended, otherwise false.
+ */
+static inline bool spimem_flash_ll_sus_status(spi_mem_dev_t *dev)
+{
+    return dev->sus_status.flash_sus;
+}
+
+/**
+ * Enable/disable write protection for the flash chip.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param wp true to enable the protection, false to disable (write enable).
+ */
+static inline void spimem_flash_ll_set_write_protect(spi_mem_dev_t *dev, bool wp)
+{
+    if (wp) {
+        dev->cmd.flash_wrdi = 1;
+    } else {
+        dev->cmd.flash_wren = 1;
+    }
+}
+
+/**
+ * Get the read data from the buffer after ``spimem_flash_ll_read`` is done.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param buffer Buffer to hold the output data
+ * @param read_len Length to get out of the buffer
+ */
+static inline void spimem_flash_ll_get_buffer_data(spi_mem_dev_t *dev, void *buffer, uint32_t read_len)
+{
+    if (((intptr_t)buffer % 4 == 0) && (read_len % 4 == 0)) {
+        // If everything is word-aligned, do a faster memcpy
+        memcpy(buffer, (void *)dev->data_buf, read_len);
+    } else {
+        // Otherwise, slow(er) path copies word by word
+        int copy_len = read_len;
+        for (uint32_t i = 0; i < (read_len + 3) / 4; i++) {
+            int word_len = MIN(sizeof(uint32_t), copy_len);
+            uint32_t word = dev->data_buf[i];
+            memcpy(buffer, &word, word_len);
+            buffer = (void *)((intptr_t)buffer + word_len);
+            copy_len -= word_len;
+        }
+    }
+}
+
+/**
+ * Set the data to be written in the data buffer.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param buffer Buffer holding the data
+ * @param length Length of data in bytes.
+ */
+static inline void spimem_flash_ll_set_buffer_data(spi_mem_dev_t *dev, const void *buffer, uint32_t length)
+{
+    // Load data registers, word at a time
+    int num_words = (length + 3) / 4;
+    for (int i = 0; i < num_words; i++) {
+        uint32_t word = 0;
+        uint32_t word_len = MIN(length, sizeof(word));
+        memcpy(&word, buffer, word_len);
+        dev->data_buf[i] = word;
+        length -= word_len;
+        buffer = (void *)((intptr_t)buffer + word_len);
+    }
+}
+
+
+/**
+ * Program a page of the flash chip. Call ``spimem_flash_ll_set_address`` before
+ * this to set the address to program.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param buffer Buffer holding the data to program
+ * @param length Length to program.
+ */
+static inline void spimem_flash_ll_program_page(spi_mem_dev_t *dev, const void *buffer, uint32_t length)
+{
+    dev->user.usr_dummy = 0;
+    spimem_flash_ll_set_buffer_data(dev, buffer, length);
+    dev->cmd.flash_pp = 1;
+}
+
+/**
+ * Trigger a user defined transaction. All phases, including command, address, dummy, and the data phases,
+ * should be configured before this is called.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void spimem_flash_ll_user_start(spi_mem_dev_t *dev)
+{
+    dev->cmd.usr = 1;
+}
+
+/**
+ * Check whether the host is idle to perform new commands.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ *
+ * @return true if the host is idle, otherwise false
+ */
+static inline bool spimem_flash_ll_host_idle(const spi_mem_dev_t *dev)
+{
+    return dev->fsm.st == 0;
+}
+
+/**
+ * Set phases for user-defined transaction to read
+ *
+ * @param dev Beginning address of the peripheral registers.
+ */
+static inline void spimem_flash_ll_read_phase(spi_mem_dev_t *dev)
+{
+    typeof (dev->user) user = {
+        .usr_command = 1,
+        .usr_mosi = 0,
+        .usr_miso = 1,
+        .usr_addr = 1,
+    };
+    dev->user = user;
+}
+/*------------------------------------------------------------------------------
+ * Configs
+ *----------------------------------------------------------------------------*/
+/**
+ * Select which pin to use for the flash
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param pin Pin ID to use, 0-2. Set to other values to disable all the CS pins.
+ */
+static inline void spimem_flash_ll_set_cs_pin(spi_mem_dev_t *dev, int pin)
+{
+    dev->misc.cs0_dis = (pin == 0) ? 0 : 1;
+    dev->misc.cs1_dis = (pin == 1) ? 0 : 1;
+}
+
+/**
+ * Set the read io mode.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param read_mode I/O mode to use in the following transactions.
+ */
+static inline void spimem_flash_ll_set_read_mode(spi_mem_dev_t *dev, esp_flash_io_mode_t read_mode)
+{
+    typeof (dev->ctrl) ctrl = dev->ctrl;
+    ctrl.val &= ~(SPI_MEM_FREAD_QIO_M | SPI_MEM_FREAD_QUAD_M | SPI_MEM_FREAD_DIO_M | SPI_MEM_FREAD_DUAL_M | SPI_MEM_FCMD_OCT | SPI_MEM_FADDR_OCT | SPI_MEM_FDIN_OCT | SPI_MEM_FDOUT_OCT);
+    dev->ddr.fmem_ddr_en = 0;
+    ctrl.val |= SPI_MEM_FASTRD_MODE_M;
+    switch (read_mode) {
+    case SPI_FLASH_FASTRD:
+        //the default option
+        break;
+    case SPI_FLASH_QIO:
+        ctrl.fread_qio = 1;
+        break;
+    case SPI_FLASH_QOUT:
+        ctrl.fread_quad = 1;
+        break;
+    case SPI_FLASH_DIO:
+        ctrl.fread_dio = 1;
+        break;
+    case SPI_FLASH_DOUT:
+        ctrl.fread_dual = 1;
+        break;
+    case SPI_FLASH_SLOWRD:
+        ctrl.fastrd_mode = 0;
+        break;
+    case SPI_FLASH_OPI_STR:
+        ctrl.faddr_oct = 1;
+        ctrl.fcmd_oct = 1;
+        ctrl.fdin_oct = 1;
+        ctrl.fdout_oct = 1;
+        break;
+    case SPI_FLASH_OPI_DTR:
+        ctrl.faddr_oct = 1;
+        ctrl.fcmd_oct = 1;
+        ctrl.fdin_oct = 1;
+        ctrl.fdout_oct = 1;
+        dev->ddr.fmem_ddr_en = 1;
+        break;
+    default:
+        abort();
+    }
+    dev->ctrl = ctrl;
+}
+
+/**
+ * Set clock frequency to work at.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param clock_val pointer to the clock value to set
+ */
+static inline void spimem_flash_ll_set_clock(spi_mem_dev_t *dev, spimem_flash_ll_clock_reg_t *clock_val)
+{
+    dev->clock = *clock_val;
+}
+
+/**
+ * Set the input length, in bits.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param bitlen Length of input, in bits.
+ */
+static inline void spimem_flash_ll_set_miso_bitlen(spi_mem_dev_t *dev, uint32_t bitlen)
+{
+    dev->user.usr_miso = bitlen > 0;
+    dev->miso_dlen.usr_miso_bit_len = bitlen ? (bitlen - 1) : 0;
+}
+
+/**
+ * Set the output length, in bits (not including command, address and dummy
+ * phases)
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param bitlen Length of output, in bits.
+ */
+static inline void spimem_flash_ll_set_mosi_bitlen(spi_mem_dev_t *dev, uint32_t bitlen)
+{
+    dev->user.usr_mosi = bitlen > 0;
+    dev->mosi_dlen.usr_mosi_bit_len = bitlen ? (bitlen - 1) : 0;
+}
+
+/**
+ * Set the command.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param command Command to send
+ * @param bitlen Length of the command
+ */
+static inline void spimem_flash_ll_set_command(spi_mem_dev_t *dev, uint32_t command, uint32_t bitlen)
+{
+    dev->user.usr_command = 1;
+    typeof(dev->user2) user2 = {
+        .usr_command_value = command,
+        .usr_command_bitlen = (bitlen - 1),
+    };
+    dev->user2 = user2;
+}
+
+/**
+ * Get the address length that is set in register, in bits.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ *
+ */
+static inline int spimem_flash_ll_get_addr_bitlen(spi_mem_dev_t *dev)
+{
+    return dev->user.usr_addr ? dev->user1.usr_addr_bitlen + 1 : 0;
+}
+
+/**
+ * Set the address length to send, in bits. Should be called before commands that requires the address e.g. erase sector, read, write...
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param bitlen Length of the address, in bits
+ */
+static inline void spimem_flash_ll_set_addr_bitlen(spi_mem_dev_t *dev, uint32_t bitlen)
+{
+    dev->user1.usr_addr_bitlen = (bitlen - 1);
+    dev->user.usr_addr = bitlen ? 1 : 0;
+}
+
+/**
+ * Set the address to send. Should be called before commands that requires the address e.g. erase sector, read, write...
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param addr Address to send
+ */
+static inline void spimem_flash_ll_set_address(spi_mem_dev_t *dev, uint32_t addr)
+{
+    dev->addr = addr;
+}
+
+/**
+ * Set the address to send in user mode. Should be called before commands that requires the address e.g. erase sector, read, write...
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param addr Address to send
+ */
+static inline void spimem_flash_ll_set_usr_address(spi_mem_dev_t *dev, uint32_t addr, uint32_t bitlen)
+{
+    (void)bitlen;
+    spimem_flash_ll_set_address(dev, addr);
+}
+
+/**
+ * Set the length of dummy cycles.
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param dummy_n Cycles of dummy phases
+ */
+static inline void spimem_flash_ll_set_dummy(spi_mem_dev_t *dev, uint32_t dummy_n)
+{
+    dev->user.usr_dummy = dummy_n ? 1 : 0;
+    dev->user1.usr_dummy_cyclelen = dummy_n - 1;
+}
+
+/**
+ * Set D/Q output level during dummy phase
+ *
+ * @param dev Beginning address of the peripheral registers.
+ * @param out_en whether to enable IO output for dummy phase
+ * @param out_level dummy output level
+ */
+static inline void spimem_flash_ll_set_dummy_out(spi_mem_dev_t *dev, uint32_t out_en, uint32_t out_lev)
+{
+    dev->ctrl.fdummy_out = out_en;
+    dev->ctrl.q_pol = out_lev;
+    dev->ctrl.d_pol = out_lev;
+}
+
+static inline void spimem_flash_ll_set_hold(spi_mem_dev_t *dev, uint32_t hold_n)
+{
+    dev->ctrl2.cs_hold_time = hold_n - 1;
+    dev->user.cs_hold = (hold_n > 0? 1: 0);
+}
+
+static inline void spimem_flash_ll_set_cs_setup(spi_mem_dev_t *dev, uint32_t cs_setup_time)
+{
+    dev->user.cs_setup = (cs_setup_time > 0 ? 1 : 0);
+    dev->ctrl2.cs_setup_time = cs_setup_time - 1;
+}
+
+static inline void spimem_flash_ll_set_extra_dummy(spi_mem_dev_t *dev, uint32_t extra_dummy)
+{
+    dev->timing_cali.extra_dummy_cyclelen = extra_dummy;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/systimer_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/systimer_ll.h
new file mode 100644
index 00000000000..7f171e92e31
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/systimer_ll.h
@@ -0,0 +1,170 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/systimer_struct.h"
+#include "hal/assert.h"
+
+#define SYSTIMER_LL_COUNTER_CLOCK       (0) // Counter used for "wallclock" time
+#define SYSTIMER_LL_COUNTER_OS_TICK     (1) // Counter used for OS tick
+#define SYSTIMER_LL_ALARM_OS_TICK_CORE0 (0) // Alarm used for OS tick of CPU core 0
+#define SYSTIMER_LL_ALARM_OS_TICK_CORE1 (1) // Alarm used for OS tick of CPU core 1
+#define SYSTIMER_LL_ALARM_CLOCK         (2) // Alarm used for "wallclock" time
+
+#define SYSTIMER_LL_TICKS_PER_US        (16) // 16 systimer ticks == 1us
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// All these functions get invoked either from ISR or HAL that linked to IRAM.
+// Always inline these functions even no gcc optimization is applied.
+
+/******************* Clock *************************/
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_clock(systimer_dev_t *dev, bool en)
+{
+    dev->conf.clk_en = en;
+}
+
+/******************* Counter *************************/
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_counter(systimer_dev_t *dev, uint32_t counter_id, bool en)
+{
+    if (en) {
+        dev->conf.val |= 1 << (30 - counter_id);
+    } else {
+        dev->conf.val &= ~(1 << (30 - counter_id));
+    }
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_counter_can_stall_by_cpu(systimer_dev_t *dev, uint32_t counter_id, uint32_t cpu_id, bool can)
+{
+    if (can) {
+        dev->conf.val |= 1 << ((28 - counter_id * 2) - cpu_id);
+    } else {
+        dev->conf.val &= ~(1 << ((28 - counter_id * 2) - cpu_id));
+    }
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_counter_snapshot(systimer_dev_t *dev, uint32_t counter_id)
+{
+    dev->unit_op[counter_id].timer_unit_update = 1;
+}
+
+__attribute__((always_inline)) static inline bool systimer_ll_is_counter_value_valid(systimer_dev_t *dev, uint32_t counter_id)
+{
+    return dev->unit_op[counter_id].timer_unit_value_valid;
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_set_counter_value(systimer_dev_t *dev, uint32_t counter_id, uint64_t value)
+{
+    dev->unit_load_val[counter_id].hi.timer_unit_load_hi = value >> 32;
+    dev->unit_load_val[counter_id].lo.timer_unit_load_lo = value & 0xFFFFFFFF;
+}
+
+__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_low(systimer_dev_t *dev, uint32_t counter_id)
+{
+    return dev->unit_val[counter_id].lo.timer_unit_value_lo;
+}
+
+__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_high(systimer_dev_t *dev, uint32_t counter_id)
+{
+    return dev->unit_val[counter_id].hi.timer_unit_value_hi;
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_apply_counter_value(systimer_dev_t *dev, uint32_t counter_id)
+{
+    dev->unit_load[counter_id].val = 0x01;
+}
+
+/******************* Alarm *************************/
+
+__attribute__((always_inline)) static inline void systimer_ll_set_alarm_target(systimer_dev_t *dev, uint32_t alarm_id, uint64_t value)
+{
+    dev->target_val[alarm_id].hi.timer_target_hi = value >> 32;
+    dev->target_val[alarm_id].lo.timer_target_lo = value & 0xFFFFFFFF;
+}
+
+__attribute__((always_inline)) static inline uint64_t systimer_ll_get_alarm_target(systimer_dev_t *dev, uint32_t alarm_id)
+{
+    return ((uint64_t)(dev->target_val[alarm_id].hi.timer_target_hi) << 32) | dev->target_val[alarm_id].lo.timer_target_lo;
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_connect_alarm_counter(systimer_dev_t *dev, uint32_t alarm_id, uint32_t counter_id)
+{
+    dev->target_conf[alarm_id].target_timer_unit_sel = counter_id;
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_oneshot(systimer_dev_t *dev, uint32_t alarm_id)
+{
+    dev->target_conf[alarm_id].target_period_mode = 0;
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_period(systimer_dev_t *dev, uint32_t alarm_id)
+{
+    dev->target_conf[alarm_id].target_period_mode = 1;
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_set_alarm_period(systimer_dev_t *dev, uint32_t alarm_id, uint32_t period)
+{
+    HAL_ASSERT(period < (1 << 26));
+    dev->target_conf[alarm_id].target_period = period;
+}
+
+__attribute__((always_inline)) static inline uint32_t systimer_ll_get_alarm_period(systimer_dev_t *dev, uint32_t alarm_id)
+{
+    return dev->target_conf[alarm_id].target_period;
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_apply_alarm_value(systimer_dev_t *dev, uint32_t alarm_id)
+{
+    dev->comp_load[alarm_id].val = 0x01;
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm(systimer_dev_t *dev, uint32_t alarm_id, bool en)
+{
+    if (en) {
+        dev->conf.val |= 1 << (24 - alarm_id);
+    } else {
+        dev->conf.val &= ~(1 << (24 - alarm_id));
+    }
+}
+
+/******************* Interrupt *************************/
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_int(systimer_dev_t *dev, uint32_t alarm_id, bool en)
+{
+    if (en) {
+        dev->int_ena.val |= 1 << alarm_id;
+    } else {
+        dev->int_ena.val &= ~(1 << alarm_id);
+    }
+}
+
+__attribute__((always_inline)) static inline bool systimer_ll_is_alarm_int_fired(systimer_dev_t *dev, uint32_t alarm_id)
+{
+    return dev->int_st.val & (1 << alarm_id);
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_clear_alarm_int(systimer_dev_t *dev, uint32_t alarm_id)
+{
+    dev->int_clr.val |= 1 << alarm_id;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/timer_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/timer_ll.h
new file mode 100644
index 00000000000..36288f7887c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/timer_ll.h
@@ -0,0 +1,430 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// The LL layer for Timer Group register operations.
+// Note that most of the register operations in this layer are non-atomic operations.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdlib.h>
+#include "hal/misc.h"
+#include "soc/timer_periph.h"
+#include "soc/timer_group_struct.h"
+#include "hal/timer_types.h"
+#include "hal/assert.h"
+
+_Static_assert(TIMER_INTR_T0 == TIMG_T0_INT_CLR, "Add mapping to LL interrupt handling, since it's no longer naturally compatible with the timer_intr_t");
+_Static_assert(TIMER_INTR_T1 == TIMG_T1_INT_CLR, "Add mapping to LL interrupt handling, since it's no longer naturally compatible with the timer_intr_t");
+_Static_assert(TIMER_INTR_WDT == TIMG_WDT_INT_CLR, "Add mapping to LL interrupt handling, since it's no longer naturally compatible with the timer_intr_t");
+
+typedef struct {
+    timg_dev_t *dev;
+    timer_idx_t idx;
+} timer_ll_context_t;
+
+// Get timer group instance with giving group number
+#define TIMER_LL_GET_HW(num) ((num == 0) ? (&TIMERG0) : (&TIMERG1))
+
+/**
+ * @brief Set timer clock prescale value
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param divider Prescale value
+ *
+ * @return None
+ */
+static inline void timer_ll_set_divider(timg_dev_t *hw, timer_idx_t timer_num, uint32_t divider)
+{
+    HAL_ASSERT(divider >= 2 && divider <= 65536);
+    if (divider >= 65536) {
+        divider = 0;
+    }
+    int timer_en = hw->hw_timer[timer_num].config.tn_en;
+    hw->hw_timer[timer_num].config.tn_en = 0;
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->hw_timer[timer_num].config, tn_divider, divider);
+    hw->hw_timer[timer_num].config.tn_en = timer_en;
+}
+
+/**
+ * @brief Get timer clock prescale value
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param divider Pointer to accept the prescale value
+ *
+ * @return None
+ */
+static inline void timer_ll_get_divider(timg_dev_t *hw, timer_idx_t timer_num, uint32_t *divider)
+{
+    uint32_t d = HAL_FORCE_READ_U32_REG_FIELD(hw->hw_timer[timer_num].config, tn_divider);
+    if (d == 0) {
+        d = 65536;
+    } else if (d == 1) {
+        d = 2;
+    }
+    *divider = d;
+}
+
+/**
+ * @brief Load counter value into time-base counter
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param load_val Counter value
+ *
+ * @return None
+ */
+static inline void timer_ll_set_counter_value(timg_dev_t *hw, timer_idx_t timer_num, uint64_t load_val)
+{
+    hw->hw_timer[timer_num].loadhi.tn_load_hi = (uint32_t) (load_val >> 32);
+    hw->hw_timer[timer_num].loadlo.tn_load_lo = (uint32_t) load_val;
+    hw->hw_timer[timer_num].load.tn_load = 1;
+}
+
+/**
+ * @brief Get counter value from time-base counter
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param timer_val Pointer to accept the counter value
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void timer_ll_get_counter_value(timg_dev_t *hw, timer_idx_t timer_num, uint64_t *timer_val)
+{
+    hw->hw_timer[timer_num].update.tn_update = 1;
+    while (hw->hw_timer[timer_num].update.tn_update) {}
+    *timer_val = ((uint64_t) hw->hw_timer[timer_num].hi.tn_hi << 32) | (hw->hw_timer[timer_num].lo.tn_lo);
+}
+
+/**
+ * @brief Set counter mode, include increment mode and decrement mode.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param increase_en True to increment mode, fasle to decrement mode
+ *
+ * @return None
+ */
+static inline void timer_ll_set_counter_increase(timg_dev_t *hw, timer_idx_t timer_num, bool increase_en)
+{
+    hw->hw_timer[timer_num].config.tn_increase = increase_en;
+}
+
+/**
+ * @brief Get counter mode, include increment mode and decrement mode.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ *
+ * @return
+ *     - true Increment mode
+ *     - false Decrement mode
+ */
+static inline bool timer_ll_get_counter_increase(timg_dev_t *hw, timer_idx_t timer_num)
+{
+    return hw->hw_timer[timer_num].config.tn_increase;
+}
+
+/**
+ * @brief Set counter status, enable or disable counter.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param counter_en True to enable counter, false to disable counter
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void timer_ll_set_counter_enable(timg_dev_t *hw, timer_idx_t timer_num, bool counter_en)
+{
+    hw->hw_timer[timer_num].config.tn_en = counter_en;
+}
+
+/**
+ * @brief Get counter status.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ *
+ * @return
+ *     - true Enable counter
+ *     - false Disable conuter
+ */
+static inline bool timer_ll_get_counter_enable(timg_dev_t *hw, timer_idx_t timer_num)
+{
+    return hw->hw_timer[timer_num].config.tn_en;
+}
+
+/**
+ * @brief Set auto reload mode.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param auto_reload_en True to enable auto reload mode, flase to disable auto reload mode
+ *
+ * @return None
+ */
+static inline void timer_ll_set_auto_reload(timg_dev_t *hw, timer_idx_t timer_num, bool auto_reload_en)
+{
+    hw->hw_timer[timer_num].config.tn_autoreload = auto_reload_en;
+}
+
+/**
+ * @brief Get auto reload mode.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ *
+ * @return
+ *     - true Enable auto reload mode
+ *     - false Disable auto reload mode
+ */
+FORCE_INLINE_ATTR bool timer_ll_get_auto_reload(timg_dev_t *hw, timer_idx_t timer_num)
+{
+    return hw->hw_timer[timer_num].config.tn_autoreload;
+}
+
+/**
+ * @brief Set the counter value to trigger the alarm.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param alarm_value Counter value to trigger the alarm
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void timer_ll_set_alarm_value(timg_dev_t *hw, timer_idx_t timer_num, uint64_t alarm_value)
+{
+    hw->hw_timer[timer_num].alarmhi.tn_alarm_hi = (uint32_t) (alarm_value >> 32);
+    hw->hw_timer[timer_num].alarmlo.tn_alarm_lo = (uint32_t) alarm_value;
+}
+
+/**
+ * @brief Get the counter value to trigger the alarm.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param alarm_value Pointer to accept the counter value to trigger the alarm
+ *
+ * @return None
+ */
+static inline void timer_ll_get_alarm_value(timg_dev_t *hw, timer_idx_t timer_num, uint64_t *alarm_value)
+{
+    *alarm_value = ((uint64_t) hw->hw_timer[timer_num].alarmhi.tn_alarm_hi  << 32) | (hw->hw_timer[timer_num].alarmlo.tn_alarm_lo);
+}
+
+/**
+ * @brief Set the alarm status, enable or disable the alarm.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param alarm_en True to enable alarm, false to disable alarm
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void timer_ll_set_alarm_enable(timg_dev_t *hw, timer_idx_t timer_num, bool alarm_en)
+{
+    hw->hw_timer[timer_num].config.tn_alarm_en = alarm_en;
+}
+
+/**
+ * @brief Get the alarm status.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ *
+ * @return
+ *     - true Enable alarm
+ *     - false Disable alarm
+ */
+static inline bool timer_ll_get_alarm_enable(timg_dev_t *hw, timer_idx_t timer_num)
+{
+    return hw->hw_timer[timer_num].config.tn_alarm_en;
+}
+
+/**
+ * @brief Enable timer interrupt.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void timer_ll_intr_enable(timg_dev_t *hw, timer_idx_t timer_num)
+{
+    hw->int_ena_timers.val |= BIT(timer_num);
+}
+
+/**
+ * @brief Disable timer interrupt.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void timer_ll_intr_disable(timg_dev_t *hw, timer_idx_t timer_num)
+{
+    hw->int_ena_timers.val &= (~BIT(timer_num));
+}
+
+/**
+ * @brief Disable timer interrupt.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void timer_ll_clear_intr_status(timg_dev_t *hw, timer_idx_t timer_num)
+{
+    hw->int_clr_timers.val |= BIT(timer_num);
+}
+
+/**
+ * @brief Get interrupt status.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param intr_status Interrupt status
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void timer_ll_get_intr_status(timg_dev_t *hw, uint32_t *intr_status)
+{
+    *intr_status = hw->int_st_timers.val & 0x03;
+}
+
+/**
+ * @brief Get interrupt raw status.
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param intr_raw_status Interrupt raw status
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void timer_ll_get_intr_raw_status(timer_group_t group_num, uint32_t *intr_raw_status)
+{
+    timg_dev_t *hw = TIMER_LL_GET_HW(group_num);
+    *intr_raw_status = hw->int_raw_timers.val & 0x03;
+}
+
+/**
+ * @brief Set the level interrupt status, enable or disable the level interrupt.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param level_int_en True to enable level interrupt, false to disable level interrupt
+ *
+ * @return None
+ */
+static inline void timer_ll_set_level_int_enable(timg_dev_t *hw, timer_idx_t timer_num, bool level_int_en)
+{
+    // Only "level" interrupts are supported on this target
+}
+
+/**
+ * @brief Get the level interrupt status.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ *
+ * @return
+ *     - true Enable level interrupt
+ *     - false Disable level interrupt
+ */
+static inline bool timer_ll_get_level_int_enable(timg_dev_t *hw, timer_idx_t timer_num)
+{
+    return true;
+}
+
+/**
+ * @brief Set the edge interrupt status, enable or disable the edge interrupt.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ * @param edge_int_en True to enable edge interrupt, false to disable edge interrupt
+ *
+ * @return None
+ */
+static inline void timer_ll_set_edge_int_enable(timg_dev_t *hw, timer_idx_t timer_num, bool edge_int_en)
+{
+}
+
+/**
+ * @brief Get the edge interrupt status.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param timer_num The timer number
+ *
+ * @return
+ *     - true Enable edge interrupt
+ *     - false Disable edge interrupt
+ */
+static inline bool timer_ll_get_edge_int_enable(timg_dev_t *hw, timer_idx_t timer_num)
+{
+    return false;
+}
+
+/**
+ * @brief Get interrupt status register address.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ *
+ * @return uint32_t Interrupt status register address
+ */
+static inline uint32_t timer_ll_get_intr_status_reg(timg_dev_t *hw)
+{
+    return (uint32_t) & (hw->int_st_timers.val);
+}
+
+static inline uint32_t timer_ll_get_intr_mask_bit(timg_dev_t *hw, timer_idx_t timer_num)
+{
+    return (1U << timer_num);
+}
+
+/**
+ * @brief Set clock source.
+ *
+ * @param hal Context of the HAL layer
+ * @param use_xtal_en True to use XTAL clock, flase to use APB clock
+ *
+ * @return None
+ */
+static inline void timer_ll_set_use_xtal(timg_dev_t *hw, timer_idx_t timer_num, bool use_xtal_en)
+{
+    hw->hw_timer[timer_num].config.tn_use_xtal = use_xtal_en;
+}
+
+/**
+ * @brief Get clock source.
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return
+ *     - true Use XTAL clock
+ *     - false Use APB clock
+ */
+static inline bool timer_ll_get_use_xtal(timg_dev_t *hw, timer_idx_t timer_num)
+{
+    return hw->hw_timer[timer_num].config.tn_use_xtal;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/touch_sensor_hal.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/touch_sensor_hal.h
new file mode 100644
index 00000000000..603c437f166
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/touch_sensor_hal.h
@@ -0,0 +1,632 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for touch sensor (ESP32-S3 specific part)
+
+#pragma once
+
+#include "hal/touch_sensor_ll.h"
+#include "hal/touch_sensor_types.h"
+
+#include_next "hal/touch_sensor_hal.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Reset the whole of touch module.
+ *
+ * @note Call this funtion after `touch_pad_fsm_stop`,
+ */
+#define touch_hal_reset() touch_ll_reset()
+
+/**
+ * Set touch sensor measurement time.
+ *
+ * @param meas_time The duration of the touch sensor measurement.
+ *                  t_meas = meas_time / (8MHz), the maximum measure time is 0xffff / 8M = 8.19 ms.
+ */
+#define touch_hal_set_meas_times(meas_time) touch_ll_set_meas_times(meas_time)
+
+/**
+ * Get touch sensor times of charge and discharge.
+ *
+ * @param meas_times Pointer to accept times count of charge and discharge.
+ */
+#define touch_hal_get_measure_times(meas_time) touch_ll_get_measure_times(meas_time)
+
+/**
+ * Set connection type of touch channel in idle status.
+ *        When a channel is in measurement mode, other initialized channels are in idle mode.
+ *        The touch channel is generally adjacent to the trace, so the connection state of the idle channel
+ *        affects the stability and sensitivity of the test channel.
+ *        The `CONN_HIGHZ`(high resistance) setting increases the sensitivity of touch channels.
+ *        The `CONN_GND`(grounding) setting increases the stability of touch channels.
+ *
+ * @param type  Select idle channel connect to high resistance state or ground.
+ */
+#define touch_hal_set_idle_channel_connect(type) touch_ll_set_idle_channel_connect(type)
+
+/**
+ * Set connection type of touch channel in idle status.
+ *        When a channel is in measurement mode, other initialized channels are in idle mode.
+ *        The touch channel is generally adjacent to the trace, so the connection state of the idle channel
+ *        affects the stability and sensitivity of the test channel.
+ *        The `CONN_HIGHZ`(high resistance) setting increases the sensitivity of touch channels.
+ *        The `CONN_GND`(grounding) setting increases the stability of touch channels.
+ *
+ * @param type  Select idle channel connect to high resistance state or ground.
+ */
+#define touch_hal_get_idle_channel_connect(type) touch_ll_get_idle_channel_connect(type)
+
+/**
+ * Get the current measure channel. Touch sensor measurement is cyclic scan mode.
+ *
+ * @return
+ *      - touch channel number
+ */
+#define touch_hal_get_current_meas_channel() touch_ll_get_current_meas_channel()
+
+/**
+ * Enable touch sensor interrupt by bitmask.
+ *
+ * @param type interrupt type
+ */
+#define touch_hal_intr_enable(int_mask) touch_ll_intr_enable(int_mask)
+
+/**
+ * Disable touch sensor interrupt by bitmask.
+ *
+ * @param type interrupt type
+ */
+#define touch_hal_intr_disable(int_mask) touch_ll_intr_disable(int_mask)
+
+/**
+ * Clear touch sensor interrupt by bitmask.
+ *
+ * @param int_mask Pad mask to clear interrupts
+ */
+#define touch_hal_intr_clear(int_mask) touch_ll_intr_clear(int_mask)
+
+/**
+ * Get the bitmask of touch sensor interrupt status.
+ *
+ * @return type interrupt type
+ */
+#define touch_hal_read_intr_status_mask() touch_ll_read_intr_status_mask()
+
+/**
+ * Enable the timeout check for all touch sensor channels measurements.
+ * When the touch reading of a touch channel exceeds the measurement threshold,
+ * If enable: a timeout interrupt will be generated and it will go to the next channel measurement.
+ * If disable: the FSM is always on the channel, until the measurement of this channel is over.
+ *
+ * @note Set the timeout threshold correctly before enabling it.
+ */
+#define touch_hal_timeout_enable() touch_ll_timeout_enable()
+
+/**
+ * Disable the timeout check for all touch sensor channels measurements.
+ * When the touch reading of a touch channel exceeds the measurement threshold,
+ * If enable: a timeout interrupt will be generated and it will go to the next channel measurement.
+ * If disable: the FSM is always on the channel, until the measurement of this channel is over.
+ *
+ * @note Set the timeout threshold correctly before enabling it.
+ */
+#define touch_hal_timeout_disable() touch_ll_timeout_disable()
+
+/**
+ * Set timeout threshold for all touch sensor channels measurements.
+ * Compared with touch readings.
+ *
+ * @param threshold Set to the maximum time measured on one channel.
+ */
+#define touch_hal_timeout_set_threshold(threshold) touch_ll_timeout_set_threshold(threshold)
+
+/**
+ * Get timeout threshold for all touch sensor channels measurements.
+ * Compared with touch readings.
+ *
+ * @param threshold Point to timeout threshold.
+ */
+#define touch_hal_timeout_get_threshold(threshold) touch_ll_timeout_get_threshold(threshold)
+
+/**
+ * Touch timer trigger measurement and always wait measurement done.
+ * Force done for touch timer ensures that the timer always can get the measurement done signal.
+ */
+#define touch_hal_timer_force_done() touch_ll_timer_force_done()
+
+/************************ Filter register setting ************************/
+
+/**
+ * Set parameter of touch sensor filter and detection algorithm.
+ * For more details on the detection algorithm, please refer to the application documentation.
+ *
+ * @param filter_info select filter type and threshold of detection algorithm
+ */
+void touch_hal_filter_set_config(const touch_filter_config_t *filter_info);
+
+/**
+ * Get parameter of touch sensor filter and detection algorithm.
+ * For more details on the detection algorithm, please refer to the application documentation.
+ *
+ * @param filter_info select filter type and threshold of detection algorithm
+ */
+void touch_hal_filter_get_config(touch_filter_config_t *filter_info);
+
+/**
+ * Get smoothed data that obtained by filtering the raw data.
+ *
+ * @param touch_num touch pad index
+ * @param smooth_data pointer to smoothed data
+ */
+#define touch_hal_filter_read_smooth(touch_num, smooth_data) touch_ll_filter_read_smooth(touch_num, smooth_data)
+
+/**
+ * Get benchmark value of touch sensor.
+ *
+ * @note After initialization, the benchmark value is the maximum during the first measurement period.
+ * @param touch_num touch pad index
+ * @param touch_value pointer to accept touch sensor value
+ */
+#define touch_hal_read_benchmark(touch_num, benchmark) touch_ll_read_benchmark(touch_num, benchmark)
+
+/**
+ * Force reset benchmark to raw data of touch sensor.
+ *
+ * @param touch_num touch pad index
+ *                  - TOUCH_PAD_MAX Reset basaline of all channels.
+ */
+#define touch_hal_reset_benchmark(touch_num) touch_ll_reset_benchmark(touch_num)
+
+/**
+ * Set filter mode. The input of the filter is the raw value of touch reading,
+ * and the output of the filter is involved in the judgment of the touch state.
+ *
+ * @param mode Filter mode type. Refer to ``touch_filter_mode_t``.
+ */
+#define touch_hal_filter_set_filter_mode(mode) touch_ll_filter_set_filter_mode(mode)
+
+/**
+ * Get filter mode. The input of the filter is the raw value of touch reading,
+ * and the output of the filter is involved in the judgment of the touch state.
+ *
+ * @param mode Filter mode type. Refer to ``touch_filter_mode_t``.
+ */
+#define touch_hal_filter_get_filter_mode(mode) touch_ll_filter_get_filter_mode(mode)
+
+/**
+ * Set debounce count, such as `n`. If the measured values continue to exceed
+ * the threshold for `n` times, it is determined that the touch sensor state changes.
+ *
+ * @param dbc_cnt Debounce count value.
+ */
+#define touch_hal_filter_set_debounce(dbc_cnt) touch_ll_filter_set_debounce(dbc_cnt)
+
+/**
+ * Get debounce count.
+ *
+ * @param dbc_cnt Debounce count value.
+ */
+#define touch_hal_filter_get_debounce(dbc_cnt) touch_ll_filter_get_debounce(dbc_cnt)
+
+/**
+ * Set noise threshold coefficient. Higher = More noise resistance.
+ * The actual noise should be less than (noise coefficient * touch threshold).
+ * Range: 0 ~ 3. The coefficient is 0: 4/8;  1: 3/8;   2: 2/8;   3: 1;
+ *
+ * @param hys_thr Noise threshold coefficient.
+ */
+#define touch_hal_filter_set_noise_thres(noise_thr) touch_ll_filter_set_noise_thres(noise_thr)
+
+/**
+ * Get noise threshold coefficient. Higher = More noise resistance.
+ * The actual noise should be less than (noise coefficient * touch threshold).
+ * Range: 0 ~ 3. The coefficient is 0: 4/8;  1: 3/8;   2: 2/8;   3: 1;
+ *
+ * @param noise_thr Noise threshold coefficient.
+ */
+#define touch_hal_filter_get_noise_thres(noise_thr) touch_ll_filter_get_noise_thres(noise_thr)
+
+/**
+ * Set the cumulative number of benchmark reset processes. such as `n`. If the measured values continue to exceed
+ * the negative noise threshold for `n` times, the benchmark reset to raw data.
+ * Range: 0 ~ 15
+ *
+ * @param reset_cnt The cumulative number of benchmark reset processes.
+ */
+#define touch_hal_filter_set_benchmark_reset(reset_cnt) touch_ll_filter_set_benchmark_reset(reset_cnt)
+
+/**
+ * Get the cumulative number of benchmark reset processes. such as `n`. If the measured values continue to exceed
+ * the negative noise threshold for `n` times, the benchmark reset to raw data.
+ * Range: 0 ~ 15
+ *
+ * @param reset_cnt The cumulative number of benchmark reset processes.
+ */
+#define touch_hal_filter_get_benchmark_reset(reset_cnt) touch_ll_filter_get_benchmark_reset(reset_cnt)
+
+/**
+ * Set jitter filter step size.
+ * If filter mode is jitter, should set filter step for jitter.
+ * Range: 0 ~ 15
+ *
+ * @param step The step size of the data change.
+ */
+#define touch_hal_filter_set_jitter_step(step) touch_ll_filter_set_jitter_step(step)
+
+/**
+ * Get jitter filter step size.
+ * If filter mode is jitter, should set filter step for jitter.
+ * Range: 0 ~ 15
+ *
+ * @param step The step size of the data change.
+ */
+#define touch_hal_filter_get_jitter_step(step) touch_ll_filter_get_jitter_step(step)
+
+/**
+ * Enable touch sensor filter and detection algorithm.
+ * For more details on the detection algorithm, please refer to the application documentation.
+ */
+#define touch_hal_filter_enable() touch_ll_filter_enable()
+
+/**
+ * Disable touch sensor filter and detection algorithm.
+ * For more details on the detection algorithm, please refer to the application documentation.
+ */
+#define touch_hal_filter_disable() touch_ll_filter_disable()
+
+/************************ Denoise register setting ************************/
+
+/**
+ * set parameter of denoise pad (TOUCH_PAD_NUM0).
+ *        T0 is an internal channel that does not have a corresponding external GPIO.
+ *        T0 will work simultaneously with the measured channel Tn. Finally, the actual
+ *        measured value of Tn is the value after subtracting lower bits of T0.
+ *        This denoise function filters out interference introduced on all channels,
+ *        such as noise introduced by the power supply and external EMI.
+ *
+ * @param denoise parameter of denoise
+ */
+void touch_hal_denoise_set_config(const touch_pad_denoise_t *denoise);
+
+/**
+ * @brief get parameter of denoise pad (TOUCH_PAD_NUM0).
+ *
+ * @param denoise Pointer to parameter of denoise
+ */
+void touch_hal_denoise_get_config(touch_pad_denoise_t *denoise);
+
+/**
+ * Enable denoise function.
+ * T0 is an internal channel that does not have a corresponding external GPIO.
+ * T0 will work simultaneously with the measured channel Tn. Finally, the actual
+ * measured value of Tn is the value after subtracting lower bits of T0.
+ * This denoise function filters out interference introduced on all channels,
+ * such as noise introduced by the power supply and external EMI.
+ */
+void touch_hal_denoise_enable(void);
+
+/**
+ * Enable denoise function.
+ * T0 is an internal channel that does not have a corresponding external GPIO.
+ * T0 will work simultaneously with the measured channel Tn. Finally, the actual
+ * measured value of Tn is the value after subtracting lower bits of T0.
+ * This denoise function filters out interference introduced on all channels,
+ * such as noise introduced by the power supply and external EMI.
+ */
+#define touch_hal_denoise_disable() touch_ll_denoise_disable()
+
+/**
+ * Set internal reference capacitance of denoise channel.
+ * Select the appropriate internal reference capacitance value so that
+ * the reading of denoise channel is closest to the reading of the channel being measured.
+ *
+ * @param cap_level Capacitance level.
+ */
+#define touch_hal_denoise_set_cap_level(cap_level) touch_ll_denoise_set_cap_level(cap_level)
+
+/**
+ * Get internal reference capacitance of denoise channel.
+ * Select the appropriate internal reference capacitance value so that
+ * the reading of denoise channel is closest to the reading of the channel being measured.
+ *
+ * @param cap_level Capacitance level.
+ */
+#define touch_hal_denoise_get_cap_level(cap_level) touch_ll_denoise_get_cap_level(cap_level)
+
+/**
+ * Set denoise range of denoise channel.
+ * Determined by measuring the noise amplitude of the denoise channel.
+ *
+ * @param grade Denoise range of denoise channel.
+ */
+#define touch_hal_denoise_set_grade(grade) touch_ll_denoise_set_grade(grade)
+
+/**
+ * Set denoise range of denoise channel.
+ * Determined by measuring the noise amplitude of the denoise channel.
+ *
+ * @param grade Denoise range of denoise channel.
+ */
+#define touch_hal_denoise_get_grade(grade) touch_ll_denoise_get_grade(grade)
+
+/**
+ * Read denoise measure value (TOUCH_PAD_NUM0).
+ *
+ * @param denoise value of denoise.
+ */
+#define touch_hal_denoise_read_data(data) touch_ll_denoise_read_data(data)
+
+/************************ Waterproof register setting ************************/
+/**
+ * Set touch channel use for guard pad.
+ *
+ * @param pad_num Touch sensor channel number.
+ */
+#define touch_hal_waterproof_set_guard_pad(pad_num) touch_ll_waterproof_set_guard_pad(pad_num)
+
+/**
+ * Get touch channel use for guard pad.
+ *
+ * @param pad_num Touch sensor channel number.
+ */
+#define touch_hal_waterproof_get_guard_pad(pad_num) touch_ll_waterproof_get_guard_pad(pad_num)
+
+/**
+ * Set max equivalent capacitance for sheild channel.
+ * The equivalent capacitance of the shielded channel can be calculated
+ * from the reading of denoise channel.
+ *
+ * @param pad_num Touch sensor channel number.
+ */
+#define touch_hal_waterproof_set_sheild_driver(driver_level) touch_ll_waterproof_set_sheild_driver(driver_level)
+
+/**
+ * Get max equivalent capacitance for sheild channel.
+ * The equivalent capacitance of the shielded channel can be calculated
+ * from the reading of denoise channel.
+ *
+ * @param pad_num Touch sensor channel number.
+ */
+#define touch_hal_waterproof_get_sheild_driver(driver_level) touch_ll_waterproof_get_sheild_driver(driver_level)
+
+/**
+ * Set parameter of waterproof function.
+ *
+ * The waterproof function includes a shielded channel (TOUCH_PAD_NUM14) and a guard channel.
+ * Guard pad is used to detect the large area of water covering the touch panel.
+ * Shield pad is used to shield the influence of water droplets covering the touch panel.
+ * It is generally designed as a grid and is placed around the touch buttons.
+ *
+ * @param waterproof parameter of waterproof
+ */
+void touch_hal_waterproof_set_config(const touch_pad_waterproof_t *waterproof);
+
+/**
+ * Get parameter of waterproof function.
+ *
+ * @param waterproof parameter of waterproof.
+ */
+void touch_hal_waterproof_get_config(touch_pad_waterproof_t *waterproof);
+
+/**
+ * Enable parameter of waterproof function.
+ * Should be called after function ``touch_hal_waterproof_set_config``.
+ */
+void touch_hal_waterproof_enable(void);
+
+/**
+ * Disable parameter of waterproof function.
+ */
+#define touch_hal_waterproof_disable() touch_ll_waterproof_disable()
+
+/************************ Proximity register setting ************************/
+
+/**
+ * Enable/disable proximity function of touch channels.
+ * The proximity sensor measurement is the accumulation of touch channel measurements.
+ *
+ * @note Supports up to three touch channels configured as proximity sensors.
+ * @param touch_num touch pad index
+ * @param enabled true: enable the proximity function; false:  disable the proximity function
+ * @return
+ *     - true: Configured correctly.
+ *     - false: Configured error.
+ */
+bool touch_hal_enable_proximity(touch_pad_t touch_num, bool enabled);
+
+/**
+ * Set touch channel number for proximity pad.
+ * If disable the proximity pad, point this pad to `TOUCH_PAD_NUM0`
+ *
+ * @param prox_pad The array of three proximity pads.
+ */
+#define touch_hal_proximity_set_channel_num(prox_pad) touch_ll_proximity_set_channel_num(prox_pad)
+
+/**
+ * Get touch channel number for proximity pad.
+ * If disable the proximity pad, point this pad to `TOUCH_PAD_NUM0`
+ *
+ * @param prox_pad The array of three proximity pads.
+ */
+#define touch_hal_proximity_get_channel_num(prox_pad) touch_ll_proximity_get_channel_num(prox_pad)
+
+/**
+ * Set cumulative measurement times for proximity pad.
+ *
+ * @param times The cumulative number of measurement cycles.
+ */
+#define touch_hal_proximity_set_meas_times(times) touch_ll_proximity_set_meas_times(times)
+
+/**
+ * Get cumulative measurement times for proximity pad.
+ *
+ * @param times The cumulative number of measurement cycles.
+ */
+#define touch_hal_proximity_get_meas_times(times) touch_ll_proximity_get_meas_times(times)
+
+/**
+ * Read current cumulative measurement times for proximity pad.
+ *
+ * @param times The cumulative number of measurement cycles.
+ */
+#define touch_hal_proximity_read_meas_cnt(touch_num, cnt) touch_ll_proximity_read_meas_cnt(touch_num, cnt)
+
+/**
+ * Check if the touch sensor channel is the proximity pad.
+ *
+ * @param touch_num The touch sensor channel number.
+ */
+#define touch_hal_proximity_pad_check(touch_num) touch_ll_proximity_pad_check(touch_num)
+
+/************** sleep pad setting ***********************/
+
+/**
+ * Get parameter of touch sensor sleep channel.
+ * The touch sensor can works in sleep mode to wake up sleep.
+ * After the sleep channel is configured, users should query the channel reading using a specific function.
+ *
+ * @param slp_config Point to touch sleep pad config.
+ */
+void touch_hal_sleep_channel_get_config(touch_pad_sleep_channel_t *slp_config);
+
+/**
+ * Set parameter of touch sensor sleep channel.
+ * The touch sensor can works in sleep mode to wake up sleep.
+ * After the sleep channel is configured, users should query the channel reading using a specific function.
+ *
+ * @note ESP32S2 only support one channel to be set sleep channel.
+ *
+ * @param pad_num touch sleep pad number.
+ * @param enable Enable/disable sleep pad function.
+ */
+void touch_hal_sleep_channel_enable(touch_pad_t pad_num, bool enable);
+
+/**
+ * Set touch channel number for sleep pad.
+ *
+ * @note Only one touch sensor channel is supported in deep sleep mode.
+ * @param touch_num Touch sensor channel number.
+ */
+#define touch_hal_sleep_set_channel_num(touch_num) touch_ll_sleep_set_channel_num(touch_num)
+
+/**
+ * Get touch channel number for sleep pad.
+ *
+ * @note Only one touch sensor channel is supported in deep sleep mode.
+ * @param touch_num Touch sensor channel number.
+ */
+#define touch_hal_sleep_get_channel_num(touch_num) touch_ll_sleep_get_channel_num(touch_num)
+
+/**
+ * Set the trigger threshold of touch sensor in deep sleep.
+ * The threshold determines the sensitivity of the touch sensor.
+ * The threshold is the original value of the trigger state minus the benchmark value.
+ *
+ * @note The threshold at sleep is the same as the threshold before sleep.
+ */
+#define touch_hal_sleep_set_threshold(touch_thres) touch_ll_sleep_set_threshold(touch_thres)
+
+/**
+ * Get the trigger threshold of touch sensor in deep sleep.
+ * The threshold determines the sensitivity of the touch sensor.
+ * The threshold is the original value of the trigger state minus the benchmark value.
+ *
+ * @note The threshold at sleep is the same as the threshold before sleep.
+ */
+#define touch_hal_sleep_get_threshold(touch_thres) touch_ll_sleep_get_threshold(touch_thres)
+
+/**
+ * Enable proximity function for sleep pad.
+ */
+#define touch_hal_sleep_enable_approach() touch_ll_sleep_enable_approach()
+
+/**
+ * Disable proximity function for sleep pad.
+ */
+#define touch_hal_sleep_disable_approach() touch_ll_sleep_disable_approach()
+
+/**
+ * Read benchmark of touch sensor for sleep pad.
+ *
+ * @param benchmark Pointer to accept touch sensor benchmark value.
+ */
+#define touch_hal_sleep_read_benchmark(benchmark) touch_ll_sleep_read_benchmark(benchmark)
+
+/**
+ * Read smooth data of touch sensor for sleep pad.
+ */
+#define touch_hal_sleep_read_smooth(smooth_data) touch_ll_sleep_read_smooth(smooth_data)
+
+/**
+ * Read raw data of touch sensor for sleep pad.
+ */
+#define touch_hal_sleep_read_data(raw_data) touch_ll_sleep_read_data(raw_data)
+
+/**
+ * Reset benchmark of touch sensor for sleep pad.
+ */
+#define touch_hal_sleep_reset_benchmark() touch_ll_sleep_reset_benchmark()
+
+/**
+ * Read debounce of touch sensor for sleep pad.
+ *
+ * @param debounce Pointer to accept touch sensor debounce value.
+ */
+#define touch_hal_sleep_read_debounce(debounce) touch_ll_sleep_read_debounce(debounce)
+
+/**
+ * Read proximity count of touch sensor for sleep pad.
+ * @param proximity_cnt Pointer to accept touch sensor proximity count value.
+ */
+#define touch_hal_sleep_read_proximity_cnt(approach_cnt) touch_ll_sleep_read_proximity_cnt(approach_cnt)
+
+/**
+ * Get the touch pad which caused wakeup from deep sleep.
+ *
+ * @param pad_num pointer to touch pad which caused wakeup.
+ */
+#define touch_hal_get_wakeup_status(pad_num) touch_ll_get_wakeup_status(pad_num)
+
+/**
+ * Change the operating frequency of touch pad in deep sleep state. Reducing the operating frequency can effectively reduce power consumption.
+ * If this function is not called, the working frequency of touch in the deep sleep state is the same as that in the wake-up state.
+ *
+ * @param sleep_cycle The touch sensor will sleep after each measurement.
+ *                    sleep_cycle decide the interval between each measurement.
+ *                    t_sleep = sleep_cycle / (RTC_SLOW_CLK frequency).
+ *                    The approximate frequency value of RTC_SLOW_CLK can be obtained using rtc_clk_slow_freq_get_hz function.
+ * @param meas_times The times of charge and discharge in each measure process of touch channels.
+ *                  The timer frequency is 8Mhz. Range: 0 ~ 0xffff.
+ *                  Recommended typical value: Modify this value to make the measurement time around 1ms.
+ */
+void touch_hal_sleep_channel_set_work_time(uint16_t sleep_cycle, uint16_t meas_times);
+
+/**
+ * Get the operating frequency of touch pad in deep sleep state. Reducing the operating frequency can effectively reduce power consumption.
+ *
+ * @param sleep_cycle The touch sensor will sleep after each measurement.
+ *                    sleep_cycle decide the interval between each measurement.
+ *                    t_sleep = sleep_cycle / (RTC_SLOW_CLK frequency).
+ *                    The approximate frequency value of RTC_SLOW_CLK can be obtained using rtc_clk_slow_freq_get_hz function.
+ * @param meas_times The times of charge and discharge in each measure process of touch channels.
+ *                  The timer frequency is 8Mhz. Range: 0 ~ 0xffff.
+ *                  Recommended typical value: Modify this value to make the measurement time around 1ms.
+ */
+void touch_hal_sleep_channel_get_work_time(uint16_t *sleep_cycle, uint16_t *meas_times);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/touch_sensor_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/touch_sensor_ll.h
new file mode 100644
index 00000000000..d2d0d24fc4d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/touch_sensor_ll.h
@@ -0,0 +1,1197 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*******************************************************************************
+ * NOTICE
+ * The ll is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The Lowlevel layer for Touch Sensor
+
+#pragma once
+
+#include <stdlib.h>
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "soc/touch_sensor_periph.h"
+#include "soc/rtc_cntl_struct.h"
+#include "soc/rtc_io_struct.h"
+#include "soc/sens_struct.h"
+#include "soc/soc_caps.h"
+#include "hal/touch_sensor_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define TOUCH_LL_READ_RAW           0x0
+#define TOUCH_LL_READ_BENCHMARK     0x2
+#define TOUCH_LL_READ_SMOOTH        0x3
+#define TOUCH_LL_TIMER_FORCE_DONE   0x3
+#define TOUCH_LL_TIMER_DONE         0x0
+
+/**
+ * Set touch sensor touch sensor times of charge and discharge.
+ *
+ * @param meas_timers The times of charge and discharge in each measure process of touch channels.
+ *                     The timer frequency is 8Mhz. Range: 0 ~ 0xffff.
+ */
+static inline void touch_ll_set_meas_times(uint16_t meas_time)
+{
+    //The times of charge and discharge in each measure process of touch channels.
+    HAL_FORCE_MODIFY_U32_REG_FIELD(RTCCNTL.touch_ctrl1, touch_meas_num, meas_time);
+    //the waiting cycles (in 8MHz) between TOUCH_START and TOUCH_XPD
+    HAL_FORCE_MODIFY_U32_REG_FIELD(RTCCNTL.touch_ctrl2, touch_xpd_wait, SOC_TOUCH_PAD_MEASURE_WAIT_MAX); //wait volt stable
+}
+
+/**
+ * Get touch sensor times of charge and discharge.
+ *
+ * @param meas_times Pointer to accept times count of charge and discharge.
+ */
+static inline void touch_ll_get_measure_times(uint16_t *meas_time)
+{
+    *meas_time = HAL_FORCE_READ_U32_REG_FIELD(RTCCNTL.touch_ctrl1, touch_meas_num);
+}
+
+/**
+ * Set touch sensor sleep time.
+ *
+ * @param sleep_cycle  The touch sensor will sleep after each measurement.
+ *                     sleep_cycle decide the interval between each measurement.
+ *                     t_sleep = sleep_cycle / (RTC_SLOW_CLK frequency).
+ *                     The approximate frequency value of RTC_SLOW_CLK can be obtained using rtc_clk_slow_freq_get_hz function.
+ */
+static inline void touch_ll_set_sleep_time(uint16_t sleep_time)
+{
+    // touch sensor sleep cycle Time = sleep_cycle / RTC_SLOW_CLK(150k)
+    HAL_FORCE_MODIFY_U32_REG_FIELD(RTCCNTL.touch_ctrl1, touch_sleep_cycles, sleep_time);
+}
+
+/**
+ * Get touch sensor sleep time.
+ *
+ * @param sleep_cycle  Pointer to accept sleep cycle number.
+ */
+static inline void touch_ll_get_sleep_time(uint16_t *sleep_time)
+{
+    *sleep_time = HAL_FORCE_READ_U32_REG_FIELD(RTCCNTL.touch_ctrl1, touch_sleep_cycles);
+}
+
+/**
+ * Set touch sensor high voltage threshold of chanrge.
+ * The touch sensor measures the channel capacitance value by charging and discharging the channel.
+ * So the high threshold should be less than the supply voltage.
+ *
+ * @param refh The high voltage threshold of chanrge.
+ */
+static inline void touch_ll_set_voltage_high(touch_high_volt_t refh)
+{
+    RTCCNTL.touch_ctrl2.touch_drefh = refh;
+}
+
+/**
+ * Get touch sensor high voltage threshold of chanrge.
+ * The touch sensor measures the channel capacitance value by charging and discharging the channel.
+ * So the high threshold should be less than the supply voltage.
+ *
+ * @param refh The high voltage threshold of chanrge.
+ */
+static inline void touch_ll_get_voltage_high(touch_high_volt_t *refh)
+{
+    *refh = (touch_high_volt_t)RTCCNTL.touch_ctrl2.touch_drefh;
+}
+
+/**
+ * Set touch sensor low voltage threshold of discharge.
+ * The touch sensor measures the channel capacitance value by charging and discharging the channel.
+ *
+ * @param refl The low voltage threshold of discharge.
+ */
+static inline void touch_ll_set_voltage_low(touch_low_volt_t refl)
+{
+    RTCCNTL.touch_ctrl2.touch_drefl = refl;
+}
+
+/**
+ * Get touch sensor low voltage threshold of discharge.
+ * The touch sensor measures the channel capacitance value by charging and discharging the channel.
+ *
+ * @param refl The low voltage threshold of discharge.
+ */
+static inline void touch_ll_get_voltage_low(touch_low_volt_t *refl)
+{
+    *refl = (touch_low_volt_t)RTCCNTL.touch_ctrl2.touch_drefl;
+}
+
+/**
+ * Set touch sensor high voltage attenuation of chanrge. The actual charge threshold is high voltage threshold minus attenuation value.
+ * The touch sensor measures the channel capacitance value by charging and discharging the channel.
+ * So the high threshold should be less than the supply voltage.
+ *
+ * @param refh The high voltage threshold of chanrge.
+ */
+static inline void touch_ll_set_voltage_attenuation(touch_volt_atten_t atten)
+{
+    RTCCNTL.touch_ctrl2.touch_drange = atten;
+}
+
+/**
+ * Get touch sensor high voltage attenuation of chanrge. The actual charge threshold is high voltage threshold minus attenuation value.
+ * The touch sensor measures the channel capacitance value by charging and discharging the channel.
+ * So the high threshold should be less than the supply voltage.
+ *
+ * @param refh The high voltage threshold of chanrge.
+ */
+static inline void touch_ll_get_voltage_attenuation(touch_volt_atten_t *atten)
+{
+    *atten = (touch_volt_atten_t)RTCCNTL.touch_ctrl2.touch_drange;
+}
+
+/**
+ * Set touch sensor charge/discharge speed(currents) for each pad.
+ *        If the slope is 0, the counter would always be zero.
+ *        If the slope is 1, the charging and discharging would be slow. The measurement time becomes longer.
+ *        If the slope is set 7, which is the maximum value, the charging and discharging would be fast.
+ *        The measurement time becomes shorter.
+ *
+ * @note The higher the charge and discharge current, the greater the immunity of the touch channel,
+ *       but it will increase the system power consumption.
+ * @param touch_num Touch pad index.
+ * @param slope touch pad charge/discharge speed(currents).
+ */
+static inline void touch_ll_set_slope(touch_pad_t touch_num, touch_cnt_slope_t slope)
+{
+    if (touch_num < TOUCH_PAD_NUM10) {
+        SET_PERI_REG_BITS(RTC_CNTL_TOUCH_DAC_REG, RTC_CNTL_TOUCH_PAD0_DAC_V, slope, (RTC_CNTL_TOUCH_PAD0_DAC_S - touch_num * 3));
+    } else {
+        SET_PERI_REG_BITS(RTC_CNTL_TOUCH_DAC1_REG, RTC_CNTL_TOUCH_PAD10_DAC_V, slope, (RTC_CNTL_TOUCH_PAD10_DAC_S - (touch_num - TOUCH_PAD_NUM10) * 3));
+    }
+}
+
+/**
+ * Get touch sensor charge/discharge speed(currents) for each pad.
+ *        If the slope is 0, the counter would always be zero.
+ *        If the slope is 1, the charging and discharging would be slow. The measurement time becomes longer.
+ *        If the slope is set 7, which is the maximum value, the charging and discharging would be fast.
+ *        The measurement time becomes shorter.
+ *
+ * @param touch_num Touch pad index.
+ * @param slope touch pad charge/discharge speed(currents).
+ */
+static inline void touch_ll_get_slope(touch_pad_t touch_num, touch_cnt_slope_t *slope)
+{
+    if (touch_num < TOUCH_PAD_NUM10) {
+        *slope = GET_PERI_REG_BITS2(RTC_CNTL_TOUCH_DAC_REG, RTC_CNTL_TOUCH_PAD0_DAC_V, (RTC_CNTL_TOUCH_PAD0_DAC_S - touch_num * 3));
+    } else {
+        *slope = GET_PERI_REG_BITS2(RTC_CNTL_TOUCH_DAC1_REG, RTC_CNTL_TOUCH_PAD10_DAC_V, (RTC_CNTL_TOUCH_PAD10_DAC_S - (touch_num - TOUCH_PAD_NUM10) * 3));
+    }
+}
+
+/**
+ * Set initial voltage state of touch channel for each measurement.
+ *
+ * @param touch_num Touch pad index.
+ * @param opt Initial voltage state.
+ */
+static inline void touch_ll_set_tie_option(touch_pad_t touch_num, touch_tie_opt_t opt)
+{
+    RTCIO.touch_pad[touch_num].tie_opt = opt;
+}
+
+/**
+ * Get initial voltage state of touch channel for each measurement.
+ *
+ * @param touch_num Touch pad index.
+ * @param opt Initial voltage state.
+ */
+static inline void touch_ll_get_tie_option(touch_pad_t touch_num, touch_tie_opt_t *opt)
+{
+    *opt = (touch_tie_opt_t)RTCIO.touch_pad[touch_num].tie_opt;
+}
+
+/**
+ * Set touch sensor FSM mode.
+ *        The measurement action can be triggered by the hardware timer, as well as by the software instruction.
+ *
+ * @param mode FSM mode.
+ */
+static inline void touch_ll_set_fsm_mode(touch_fsm_mode_t mode)
+{
+    RTCCNTL.touch_ctrl2.touch_start_force = mode;
+}
+
+/**
+ * Get touch sensor FSM mode.
+ *        The measurement action can be triggered by the hardware timer, as well as by the software instruction.
+ *
+ * @param mode FSM mode.
+ */
+static inline void touch_ll_get_fsm_mode(touch_fsm_mode_t *mode)
+{
+    *mode = (touch_fsm_mode_t)RTCCNTL.touch_ctrl2.touch_start_force;
+}
+
+/**
+ * Enable/disable clock gate of touch sensor.
+ *
+ * @param enable true/false.
+ */
+static inline void touch_ll_clkgate(bool enable)
+{
+    RTCCNTL.touch_ctrl2.touch_clkgate_en = enable; //enable touch clock for FSM. or force enable.
+}
+
+/**
+ * Get touch sensor FSM state.
+ * @return
+ *          - true: fsm state is open.
+ *          - false: fsm state is close.
+ */
+static inline bool touch_ll_clkgate_get_state(void)
+{
+    return RTCCNTL.touch_ctrl2.touch_clkgate_en;
+}
+
+/**
+ * Touch timer trigger measurement and always wait measurement done.
+ * Force done for touch timer ensures that the timer always can get the measurement done signal.
+ */
+static inline void touch_ll_timer_force_done(void)
+{
+    RTCCNTL.touch_ctrl2.touch_timer_force_done = TOUCH_LL_TIMER_FORCE_DONE;
+    RTCCNTL.touch_ctrl2.touch_timer_force_done = TOUCH_LL_TIMER_DONE;
+}
+
+/**
+ * Start touch sensor FSM timer.
+ *        The measurement action can be triggered by the hardware timer, as well as by the software instruction.
+ */
+static inline void touch_ll_start_fsm(void)
+{
+    /**
+     * Touch timer trigger measurement and always wait measurement done.
+     * Force done for touch timer ensures that the timer always can get the measurement done signal.
+     */
+    RTCCNTL.touch_ctrl2.touch_timer_force_done = TOUCH_LL_TIMER_FORCE_DONE;
+    RTCCNTL.touch_ctrl2.touch_timer_force_done = TOUCH_LL_TIMER_DONE;
+    RTCCNTL.touch_ctrl2.touch_slp_timer_en = (RTCCNTL.touch_ctrl2.touch_start_force == TOUCH_FSM_MODE_TIMER ? 1 : 0);
+}
+
+/**
+ * Stop touch sensor FSM timer.
+ *        The measurement action can be triggered by the hardware timer, as well as by the software instruction.
+ */
+static inline void touch_ll_stop_fsm(void)
+{
+    RTCCNTL.touch_ctrl2.touch_start_en = 0; //stop touch fsm
+    RTCCNTL.touch_ctrl2.touch_slp_timer_en = 0;
+    RTCCNTL.touch_ctrl2.touch_timer_force_done = TOUCH_LL_TIMER_FORCE_DONE;
+    RTCCNTL.touch_ctrl2.touch_timer_force_done = TOUCH_LL_TIMER_DONE;
+}
+
+/**
+ * Get touch sensor FSM timer state.
+ * @return
+ *     - true: FSM enabled
+ *     - false: FSM disabled
+ */
+static inline bool touch_ll_get_fsm_state(void)
+{
+    return (bool)RTCCNTL.touch_ctrl2.touch_slp_timer_en;
+}
+
+/**
+ * Trigger a touch sensor measurement, only support in SW mode of FSM.
+ */
+static inline void touch_ll_start_sw_meas(void)
+{
+    RTCCNTL.touch_ctrl2.touch_start_en = 0;
+    RTCCNTL.touch_ctrl2.touch_start_en = 1;
+}
+
+/**
+ * Set the trigger threshold of touch sensor.
+ * The threshold determines the sensitivity of the touch sensor.
+ * The threshold is the original value of the trigger state minus the benchmark value.
+ *
+ * @note  If set "TOUCH_PAD_THRESHOLD_MAX", the touch is never be triggered.
+ * @param touch_num touch pad index
+ * @param threshold threshold of touch sensor.
+ */
+static inline void touch_ll_set_threshold(touch_pad_t touch_num, uint32_t threshold)
+{
+    SENS.touch_thresh[touch_num - 1].thresh = threshold;
+}
+
+/**
+ * Get the trigger threshold of touch sensor.
+ * The threshold determines the sensitivity of the touch sensor.
+ * The threshold is the original value of the trigger state minus the benchmark value.
+ *
+ * @param touch_num touch pad index.
+ * @param threshold pointer to accept threshold.
+ */
+static inline void touch_ll_get_threshold(touch_pad_t touch_num, uint32_t *threshold)
+{
+    *threshold = SENS.touch_thresh[touch_num - 1].thresh;
+}
+
+/**
+ * Enable touch sensor channel. Register touch channel into touch sensor measurement group.
+ * The working mode of the touch sensor is simultaneous measurement.
+ * This function will set the measure bits according to the given bitmask.
+ *
+ * @note  If set this mask, the FSM timer should be stop firsty.
+ * @note  The touch sensor that in scan map, should be deinit GPIO function firstly.
+ * @param enable_mask bitmask of touch sensor scan group.
+ *        e.g. TOUCH_PAD_NUM1 -> BIT(1)
+ * @return
+ *      - ESP_OK on success
+ */
+static inline void touch_ll_set_channel_mask(uint16_t enable_mask)
+{
+    RTCCNTL.touch_scan_ctrl.touch_scan_pad_map  |= (enable_mask & TOUCH_PAD_BIT_MASK_ALL);
+    SENS.sar_touch_conf.touch_outen |= (enable_mask & TOUCH_PAD_BIT_MASK_ALL);
+}
+
+/**
+ * Get touch sensor channel mask.
+ *
+ * @param enable_mask bitmask of touch sensor scan group.
+ *        e.g. TOUCH_PAD_NUM1 -> BIT(1)
+ */
+static inline void touch_ll_get_channel_mask(uint16_t *enable_mask)
+{
+    *enable_mask = SENS.sar_touch_conf.touch_outen \
+                   & RTCCNTL.touch_scan_ctrl.touch_scan_pad_map \
+                   & TOUCH_PAD_BIT_MASK_ALL;
+}
+
+/**
+ * Disable touch sensor channel by bitmask.
+ *
+ * @param enable_mask bitmask of touch sensor scan group.
+ *        e.g. TOUCH_PAD_NUM1 -> BIT(1)
+ */
+static inline void touch_ll_clear_channel_mask(uint16_t disable_mask)
+{
+    SENS.sar_touch_conf.touch_outen &= ~(disable_mask & TOUCH_PAD_BIT_MASK_ALL);
+    RTCCNTL.touch_scan_ctrl.touch_scan_pad_map  &= ~(disable_mask & TOUCH_PAD_BIT_MASK_ALL);
+}
+
+/**
+ * Get the touch sensor trigger status, usually used in ISR to decide which pads are 'touched'.
+ *
+ * @param status_mask The touch sensor status. e.g. Touch1 trigger status is `status_mask & (BIT1)`.
+ */
+static inline void touch_ll_read_trigger_status_mask(uint32_t *status_mask)
+{
+    *status_mask = SENS.sar_touch_chn_st.touch_pad_active;
+}
+
+/**
+ * Clear all touch sensor status.
+ *
+ * @note Generally no manual removal is required.
+ */
+static inline void touch_ll_clear_trigger_status_mask(void)
+{
+    SENS.sar_touch_conf.touch_status_clr = 1;
+}
+
+/**
+ * Get touch sensor raw data (touch sensor counter value) from register. No block.
+ *
+ * @param touch_num touch pad index.
+ * @return touch_value pointer to accept touch sensor value.
+ */
+static inline uint32_t IRAM_ATTR touch_ll_read_raw_data(touch_pad_t touch_num)
+{
+    SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_RAW;
+    return SENS.sar_touch_status[touch_num - 1].touch_pad_data;
+}
+
+/**
+ * Get touch sensor measure status. No block.
+ *
+ * @return
+ *      - If touch sensors measure done.
+ */
+static inline bool touch_ll_meas_is_done(void)
+{
+    return (bool)SENS.sar_touch_chn_st.touch_meas_done;
+}
+
+/************************* esp32s2 only *************************/
+
+/**
+ * Reset the whole of touch module.
+ *
+ * @note Call this function after `touch_pad_fsm_stop`.
+ */
+static inline void touch_ll_reset(void)
+{
+    RTCCNTL.touch_ctrl2.touch_reset = 0;
+    RTCCNTL.touch_ctrl2.touch_reset = 1;
+    RTCCNTL.touch_ctrl2.touch_reset = 0;    // Should be set 0.
+}
+
+/**
+ * Set connection type of touch channel in idle status.
+ *        When a channel is in measurement mode, other initialized channels are in idle mode.
+ *        The touch channel is generally adjacent to the trace, so the connection state of the idle channel
+ *        affects the stability and sensitivity of the test channel.
+ *        The `CONN_HIGHZ`(high resistance) setting increases the sensitivity of touch channels.
+ *        The `CONN_GND`(grounding) setting increases the stability of touch channels.
+ *
+ * @param type  Select idle channel connect to high resistance state or ground.
+ */
+static inline void touch_ll_set_idle_channel_connect(touch_pad_conn_type_t type)
+{
+    RTCCNTL.touch_scan_ctrl.touch_inactive_connection = type;
+}
+
+/**
+ * Set connection type of touch channel in idle status.
+ *        When a channel is in measurement mode, other initialized channels are in idle mode.
+ *        The touch channel is generally adjacent to the trace, so the connection state of the idle channel
+ *        affects the stability and sensitivity of the test channel.
+ *        The `CONN_HIGHZ`(high resistance) setting increases the sensitivity of touch channels.
+ *        The `CONN_GND`(grounding) setting increases the stability of touch channels.
+ *
+ * @param type  Select idle channel connect to high resistance state or ground.
+ */
+static inline void touch_ll_get_idle_channel_connect(touch_pad_conn_type_t *type)
+{
+    *type = RTCCNTL.touch_scan_ctrl.touch_inactive_connection;
+}
+
+/**
+ * Get the current measure channel. Touch sensor measurement is cyclic scan mode.
+ *
+ * @return
+ *      - touch channel number
+ */
+static inline touch_pad_t IRAM_ATTR touch_ll_get_current_meas_channel(void)
+{
+    return (touch_pad_t)(SENS.sar_touch_status0.touch_scan_curr);
+}
+
+/**
+ * Enable touch sensor interrupt by bitmask.
+ *
+ * @param type interrupt type
+ */
+static inline void touch_ll_intr_enable(touch_pad_intr_mask_t int_mask)
+{
+    if (int_mask & TOUCH_PAD_INTR_MASK_DONE) {
+        RTCCNTL.int_ena_w1ts.rtc_touch_done_w1ts = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_ACTIVE) {
+        RTCCNTL.int_ena_w1ts.rtc_touch_active_w1ts = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_INACTIVE) {
+        RTCCNTL.int_ena_w1ts.rtc_touch_inactive_w1ts = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_SCAN_DONE) {
+        RTCCNTL.int_ena_w1ts.rtc_touch_scan_done_w1ts = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_TIMEOUT) {
+        RTCCNTL.int_ena_w1ts.rtc_touch_timeout_w1ts = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE) {
+        RTCCNTL.int_ena_w1ts.rtc_touch_approach_loop_done_w1ts = 1;
+    }
+}
+
+/**
+ * Disable touch sensor interrupt by bitmask.
+ *
+ * @param type interrupt type
+ */
+static inline void touch_ll_intr_disable(touch_pad_intr_mask_t int_mask)
+{
+    if (int_mask & TOUCH_PAD_INTR_MASK_DONE) {
+        RTCCNTL.int_ena_w1tc.rtc_touch_done_w1tc = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_ACTIVE) {
+        RTCCNTL.int_ena_w1tc.rtc_touch_active_w1tc = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_INACTIVE) {
+        RTCCNTL.int_ena_w1tc.rtc_touch_inactive_w1tc = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_SCAN_DONE) {
+        RTCCNTL.int_ena_w1tc.rtc_touch_scan_done_w1tc = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_TIMEOUT) {
+        RTCCNTL.int_ena_w1tc.rtc_touch_timeout_w1tc = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE) {
+        RTCCNTL.int_ena_w1tc.rtc_touch_approach_loop_done_w1tc = 1;
+    }
+}
+
+/**
+ * Clear touch sensor interrupt by bitmask.
+ *
+ * @param int_mask Pad mask to clear interrupts
+ */
+static inline void touch_ll_intr_clear(touch_pad_intr_mask_t int_mask)
+{
+    if (int_mask & TOUCH_PAD_INTR_MASK_DONE) {
+        RTCCNTL.int_clr.rtc_touch_done = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_ACTIVE) {
+        RTCCNTL.int_clr.rtc_touch_active = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_INACTIVE) {
+        RTCCNTL.int_clr.rtc_touch_inactive = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_SCAN_DONE) {
+        RTCCNTL.int_clr.rtc_touch_scan_done = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_TIMEOUT) {
+        RTCCNTL.int_clr.rtc_touch_timeout = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE) {
+        RTCCNTL.int_clr.rtc_touch_approach_loop_done = 1;
+    }
+}
+
+/**
+ * Get the bitmask of touch sensor interrupt status.
+ *
+ * @return type interrupt type
+ */
+static inline uint32_t touch_ll_read_intr_status_mask(void)
+{
+    uint32_t intr_st = RTCCNTL.int_st.val;
+    uint32_t intr_msk = 0;
+
+    if (intr_st & RTC_CNTL_TOUCH_DONE_INT_ST_M) {
+        intr_msk |= TOUCH_PAD_INTR_MASK_DONE;
+    }
+    if (intr_st & RTC_CNTL_TOUCH_ACTIVE_INT_ST_M) {
+        intr_msk |= TOUCH_PAD_INTR_MASK_ACTIVE;
+    }
+    if (intr_st & RTC_CNTL_TOUCH_INACTIVE_INT_ST_M) {
+        intr_msk |= TOUCH_PAD_INTR_MASK_INACTIVE;
+    }
+    if (intr_st & RTC_CNTL_TOUCH_SCAN_DONE_INT_ST_M) {
+        intr_msk |= TOUCH_PAD_INTR_MASK_SCAN_DONE;
+    }
+    if (intr_st & RTC_CNTL_TOUCH_TIMEOUT_INT_ST_M) {
+        intr_msk |= TOUCH_PAD_INTR_MASK_TIMEOUT;
+    }
+    if (intr_st & RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ST_M) {
+        intr_msk |= TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE;
+    }
+    return (intr_msk & TOUCH_PAD_INTR_MASK_ALL);
+}
+
+/**
+ * Enable the timeout check for all touch sensor channels measurements.
+ * When the touch reading of a touch channel exceeds the measurement threshold,
+ * If enable: a timeout interrupt will be generated and it will go to the next channel measurement.
+ * If disable: the FSM is always on the channel, until the measurement of this channel is over.
+ *
+ * @note Set the timeout threshold correctly before enabling it.
+ */
+static inline void touch_ll_timeout_enable(void)
+{
+    RTCCNTL.touch_timeout_ctrl.touch_timeout_en = 1;
+}
+
+/**
+ * Disable the timeout check for all touch sensor channels measurements.
+ * When the touch reading of a touch channel exceeds the measurement threshold,
+ * If enable: a timeout interrupt will be generated and it will go to the next channel measurement.
+ * If disable: the FSM is always on the channel, until the measurement of this channel is over.
+ *
+ * @note Set the timeout threshold correctly before enabling it.
+ */
+static inline void touch_ll_timeout_disable(void)
+{
+    RTCCNTL.touch_timeout_ctrl.touch_timeout_en = 0;
+}
+
+/**
+ * Set timeout threshold for all touch sensor channels measurements.
+ * Compared with touch readings.
+ *
+ * @param threshold Set to the maximum time measured on one channel.
+ */
+static inline void touch_ll_timeout_set_threshold(uint32_t threshold)
+{
+    RTCCNTL.touch_timeout_ctrl.touch_timeout_num = threshold;
+}
+
+/**
+ * Get timeout threshold for all touch sensor channels measurements.
+ * Compared with touch readings.
+ *
+ * @param threshold Point to timeout threshold.
+ */
+static inline void touch_ll_timeout_get_threshold(uint32_t *threshold)
+{
+    *threshold = RTCCNTL.touch_timeout_ctrl.touch_timeout_num;
+}
+
+/************************ Filter register setting ************************/
+
+/**
+ * Get smoothed data that obtained by filtering the raw data.
+ *
+ * @param touch_num touch pad index
+ * @param smooth_data pointer to smoothed data
+ */
+static inline void IRAM_ATTR touch_ll_filter_read_smooth(touch_pad_t touch_num, uint32_t *smooth_data)
+{
+    SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_SMOOTH;
+    *smooth_data = SENS.sar_touch_status[touch_num - 1].touch_pad_data;
+}
+
+/**
+ * Get benchmark value of touch sensor.
+ *
+ * @note After initialization, the benchmark value is the maximum during the first measurement period.
+ * @param touch_num touch pad index
+ * @param touch_value pointer to accept touch sensor value
+ */
+static inline void IRAM_ATTR touch_ll_read_benchmark(touch_pad_t touch_num, uint32_t *benchmark)
+{
+    SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_BENCHMARK;
+    *benchmark = SENS.sar_touch_status[touch_num - 1].touch_pad_data;
+}
+
+/**
+ * Force reset benchmark to raw data of touch sensor.
+ *
+ * @note If call this API, make sure enable clock gate(`touch_ll_clkgate`) first.
+ * @param touch_num touch pad index
+ *                  - TOUCH_PAD_MAX Reset basaline of all channels.
+ */
+static inline void touch_ll_reset_benchmark(touch_pad_t touch_num)
+{
+    /* Clear touch channels to initialize the channel value (benchmark, raw_data).
+     */
+    if (touch_num == TOUCH_PAD_MAX) {
+        SENS.sar_touch_chn_st.touch_channel_clr = TOUCH_PAD_BIT_MASK_ALL;
+    } else {
+        SENS.sar_touch_chn_st.touch_channel_clr = (1U << touch_num);
+    }
+}
+
+/**
+ * Set filter mode. The input of the filter is the raw value of touch reading,
+ * and the output of the filter is involved in the judgment of the touch state.
+ *
+ * @param mode Filter mode type. Refer to ``touch_filter_mode_t``.
+ */
+static inline void touch_ll_filter_set_filter_mode(touch_filter_mode_t mode)
+{
+    RTCCNTL.touch_filter_ctrl.touch_filter_mode = mode;
+}
+
+/**
+ * Get filter mode. The input of the filter is the raw value of touch reading,
+ * and the output of the filter is involved in the judgment of the touch state.
+ *
+ * @param mode Filter mode type. Refer to ``touch_filter_mode_t``.
+ */
+static inline void touch_ll_filter_get_filter_mode(touch_filter_mode_t *mode)
+{
+    *mode = (touch_filter_mode_t)RTCCNTL.touch_filter_ctrl.touch_filter_mode;
+}
+
+/**
+ * Set filter mode. The input to the filter is raw data and the output is the smooth data.
+ * The smooth data is used to determine the touch status.
+ *
+ * @param mode Filter mode type. Refer to ``touch_smooth_mode_t``.
+ */
+static inline void touch_ll_filter_set_smooth_mode(touch_smooth_mode_t mode)
+{
+    RTCCNTL.touch_filter_ctrl.touch_smooth_lvl = mode;
+}
+
+/**
+ * Get filter mode. The smooth data is used to determine the touch status.
+ *
+ * @param mode Filter mode type. Refer to ``touch_smooth_mode_t``.
+ */
+static inline void touch_ll_filter_get_smooth_mode(touch_smooth_mode_t *mode)
+{
+    *mode = RTCCNTL.touch_filter_ctrl.touch_smooth_lvl;
+}
+
+/**
+ * Set debounce count, such as `n`. If the measured values continue to exceed
+ * the threshold for `n+1` times, it is determined that the touch sensor state changes.
+ *
+ * @param dbc_cnt Debounce count value.
+ */
+static inline void touch_ll_filter_set_debounce(uint32_t dbc_cnt)
+{
+    RTCCNTL.touch_filter_ctrl.touch_debounce = dbc_cnt;
+}
+
+/**
+ * Get debounce count.
+ *
+ * @param dbc_cnt Debounce count value.
+ */
+static inline void touch_ll_filter_get_debounce(uint32_t *dbc_cnt)
+{
+    *dbc_cnt = RTCCNTL.touch_filter_ctrl.touch_debounce;
+}
+
+/**
+ * Set noise threshold coefficient. Higher = More noise resistance.
+ * The actual noise should be less than (noise coefficient * touch threshold).
+ * Range: 0 ~ 3. The coefficient is 0: 4/8;  1: 3/8;   2: 2/8;   3: 1;
+ *
+ * @param hys_thr Noise threshold coefficient.
+ */
+static inline void touch_ll_filter_set_noise_thres(uint32_t noise_thr)
+{
+    RTCCNTL.touch_filter_ctrl.touch_noise_thres = noise_thr;
+    RTCCNTL.touch_filter_ctrl.config2 = noise_thr;
+    RTCCNTL.touch_filter_ctrl.config1 = 0xF;
+    RTCCNTL.touch_filter_ctrl.config3 = 2;
+}
+
+/**
+ * Get noise threshold coefficient. Higher = More noise resistance.
+ * The actual noise should be less than (noise coefficient * touch threshold).
+ * Range: 0 ~ 3. The coefficient is 0: 4/8;  1: 3/8;   2: 2/8;   3: 1;
+ *
+ * @param noise_thr Noise threshold coefficient.
+ */
+static inline void touch_ll_filter_get_noise_thres(uint32_t *noise_thr)
+{
+    *noise_thr = RTCCNTL.touch_filter_ctrl.touch_noise_thres;
+}
+
+/**
+ * Set jitter filter step size.
+ * If filter mode is jitter, should set filter step for jitter.
+ * Range: 0 ~ 15
+ *
+ * @param step The step size of the data change.
+ */
+static inline void touch_ll_filter_set_jitter_step(uint32_t step)
+{
+    RTCCNTL.touch_filter_ctrl.touch_jitter_step = step;
+}
+
+/**
+ * Get jitter filter step size.
+ * If filter mode is jitter, should set filter step for jitter.
+ * Range: 0 ~ 15
+ *
+ * @param step The step size of the data change.
+ */
+static inline void touch_ll_filter_get_jitter_step(uint32_t *step)
+{
+    *step = RTCCNTL.touch_filter_ctrl.touch_jitter_step;
+}
+
+/**
+ * Enable touch sensor filter and detection algorithm.
+ * For more details on the detection algorithm, please refer to the application documentation.
+ */
+static inline void touch_ll_filter_enable(void)
+{
+    RTCCNTL.touch_filter_ctrl.touch_filter_en = 1;
+}
+
+/**
+ * Disable touch sensor filter and detection algorithm.
+ * For more details on the detection algorithm, please refer to the application documentation.
+ */
+static inline void touch_ll_filter_disable(void)
+{
+    RTCCNTL.touch_filter_ctrl.touch_filter_en = 0;
+}
+
+/************************ Denoise register setting ************************/
+
+/**
+ * Enable denoise function.
+ * T0 is an internal channel that does not have a corresponding external GPIO.
+ * T0 will work simultaneously with the measured channel Tn. Finally, the actual
+ * measured value of Tn is the value after subtracting lower bits of T0.
+ * This denoise function filters out interference introduced on all channels,
+ * such as noise introduced by the power supply and external EMI.
+ */
+static inline void touch_ll_denoise_enable(void)
+{
+    RTCCNTL.touch_scan_ctrl.touch_denoise_en = 1;
+}
+
+/**
+ * Enable denoise function.
+ * T0 is an internal channel that does not have a corresponding external GPIO.
+ * T0 will work simultaneously with the measured channel Tn. Finally, the actual
+ * measured value of Tn is the value after subtracting lower bits of T0.
+ * This denoise function filters out interference introduced on all channels,
+ * such as noise introduced by the power supply and external EMI.
+ */
+static inline void touch_ll_denoise_disable(void)
+{
+    RTCCNTL.touch_scan_ctrl.touch_denoise_en = 0;
+}
+
+/**
+ * Set internal reference capacitance of denoise channel.
+ * Select the appropriate internal reference capacitance value so that
+ * the reading of denoise channel is closest to the reading of the channel being measured.
+ *
+ * @param cap_level Capacitance level.
+ */
+static inline void touch_ll_denoise_set_cap_level(touch_pad_denoise_cap_t cap_level)
+{
+    RTCCNTL.touch_ctrl2.touch_refc = cap_level;
+}
+
+/**
+ * Get internal reference capacitance of denoise channel.
+ * Select the appropriate internal reference capacitance value so that
+ * the reading of denoise channel is closest to the reading of the channel being measured.
+ *
+ * @param cap_level Capacitance level.
+ */
+static inline void touch_ll_denoise_get_cap_level(touch_pad_denoise_cap_t *cap_level)
+{
+    *cap_level = RTCCNTL.touch_ctrl2.touch_refc;
+}
+
+/**
+ * Set denoise range of denoise channel.
+ * Determined by measuring the noise amplitude of the denoise channel.
+ *
+ * @param grade Denoise range of denoise channel.
+ */
+static inline void touch_ll_denoise_set_grade(touch_pad_denoise_grade_t grade)
+{
+    RTCCNTL.touch_scan_ctrl.touch_denoise_res = grade;
+}
+
+/**
+ * Set denoise range of denoise channel.
+ * Determined by measuring the noise amplitude of the denoise channel.
+ *
+ * @param grade Denoise range of denoise channel.
+ */
+static inline void touch_ll_denoise_get_grade(touch_pad_denoise_grade_t *grade)
+{
+    *grade = RTCCNTL.touch_scan_ctrl.touch_denoise_res;
+}
+
+/**
+ * Read denoise measure value (TOUCH_PAD_NUM0).
+ *
+ * @param denoise value of denoise.
+ */
+static inline void touch_ll_denoise_read_data(uint32_t *data)
+{
+    *data =  SENS.sar_touch_denoise.touch_denoise_data;
+}
+
+/************************ Waterproof register setting ************************/
+
+/**
+ * Set touch channel use for guard pad.
+ *
+ * @param pad_num Touch sensor channel number.
+ */
+static inline void touch_ll_waterproof_set_guard_pad(touch_pad_t pad_num)
+{
+    RTCCNTL.touch_scan_ctrl.touch_out_ring = pad_num;
+}
+
+/**
+ * Get touch channel use for guard pad.
+ *
+ * @param pad_num Touch sensor channel number.
+ */
+static inline void touch_ll_waterproof_get_guard_pad(touch_pad_t *pad_num)
+{
+    *pad_num = RTCCNTL.touch_scan_ctrl.touch_out_ring;
+}
+
+/**
+ * Set max equivalent capacitance for sheild channel.
+ * The equivalent capacitance of the shielded channel can be calculated
+ * from the reading of denoise channel.
+ *
+ * @param pad_num Touch sensor channel number.
+ */
+static inline void touch_ll_waterproof_set_sheild_driver(touch_pad_shield_driver_t driver_level)
+{
+    RTCCNTL.touch_scan_ctrl.touch_bufdrv = driver_level;
+}
+
+/**
+ * Get max equivalent capacitance for sheild channel.
+ * The equivalent capacitance of the shielded channel can be calculated
+ * from the reading of denoise channel.
+ *
+ * @param pad_num Touch sensor channel number.
+ */
+static inline void touch_ll_waterproof_get_sheild_driver(touch_pad_shield_driver_t *driver_level)
+{
+    *driver_level = RTCCNTL.touch_scan_ctrl.touch_bufdrv;
+}
+
+/**
+ * Enable parameter of waterproof function.
+ *
+ * The waterproof function includes a shielded channel (TOUCH_PAD_NUM14) and a guard channel.
+ * Guard pad is used to detect the large area of water covering the touch panel.
+ * Shield pad is used to shield the influence of water droplets covering the touch panel.
+ * It is generally designed as a grid and is placed around the touch buttons.
+ */
+static inline void touch_ll_waterproof_enable(void)
+{
+    RTCCNTL.touch_scan_ctrl.touch_shield_pad_en = 1;
+}
+
+/**
+ * Disable parameter of waterproof function.
+ */
+static inline void touch_ll_waterproof_disable(void)
+{
+    RTCCNTL.touch_scan_ctrl.touch_shield_pad_en = 0;
+}
+
+/************************ Proximity register setting ************************/
+
+/**
+ * Set touch channel number for proximity pad.
+ * If disable the proximity pad, point this pad to `TOUCH_PAD_NUM0`
+ *
+ * @param prox_pad The array of three proximity pads.
+ */
+static inline void touch_ll_proximity_set_channel_num(const touch_pad_t prox_pad[])
+{
+    SENS.sar_touch_conf.touch_approach_pad0 = prox_pad[0];
+    SENS.sar_touch_conf.touch_approach_pad1 = prox_pad[1];
+    SENS.sar_touch_conf.touch_approach_pad2 = prox_pad[2];
+}
+
+/**
+ * Get touch channel number for proximity pad.
+ * If disable the proximity pad, point this pad to `TOUCH_PAD_NUM0`
+ *
+ * @param prox_pad The array of three proximity pads.
+ */
+static inline void touch_ll_proximity_get_channel_num(touch_pad_t prox_pad[])
+{
+    prox_pad[0] = SENS.sar_touch_conf.touch_approach_pad0;
+    prox_pad[1] = SENS.sar_touch_conf.touch_approach_pad1;
+    prox_pad[2] = SENS.sar_touch_conf.touch_approach_pad2;
+}
+
+/**
+ * Set cumulative measurement times for proximity pad.
+ *
+ * @param times The cumulative number of measurement cycles.
+ */
+static inline void touch_ll_proximity_set_meas_times(uint32_t times)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(RTCCNTL.touch_approach, touch_approach_meas_time, times);
+}
+
+/**
+ * Get cumulative measurement times for proximity pad.
+ *
+ * @param times The cumulative number of measurement cycles.
+ */
+static inline void touch_ll_proximity_get_meas_times(uint32_t *times)
+{
+    *times = HAL_FORCE_READ_U32_REG_FIELD(RTCCNTL.touch_approach, touch_approach_meas_time);
+}
+
+/**
+ * Read current cumulative measurement times for proximity pad.
+ *
+ * @param times The cumulative number of measurement cycles.
+ */
+static inline void touch_ll_proximity_read_meas_cnt(touch_pad_t touch_num, uint32_t *cnt)
+{
+    if (SENS.sar_touch_conf.touch_approach_pad0 == touch_num) {
+        *cnt = SENS.sar_touch_appr_status.touch_approach_pad0_cnt;
+    } else if (SENS.sar_touch_conf.touch_approach_pad1 == touch_num) {
+        *cnt = SENS.sar_touch_appr_status.touch_approach_pad1_cnt;
+    } else if (SENS.sar_touch_conf.touch_approach_pad2 == touch_num) {
+        *cnt = SENS.sar_touch_appr_status.touch_approach_pad2_cnt;
+    }
+}
+
+/**
+ * Check if the touch sensor channel is the proximity pad.
+ *
+ * @param touch_num The touch sensor channel number.
+ */
+static inline bool touch_ll_proximity_pad_check(touch_pad_t touch_num)
+{
+    if ((SENS.sar_touch_conf.touch_approach_pad0 != touch_num)
+            && (SENS.sar_touch_conf.touch_approach_pad1 != touch_num)
+            && (SENS.sar_touch_conf.touch_approach_pad2 != touch_num)) {
+        return false;
+    } else {
+        return true;
+    }
+}
+
+/************** sleep pad setting ***********************/
+
+/**
+ * Set touch channel number for sleep pad.
+ *
+ * @note Only one touch sensor channel is supported in deep sleep mode.
+ * @param touch_num Touch sensor channel number.
+ */
+static inline void touch_ll_sleep_set_channel_num(touch_pad_t touch_num)
+{
+    RTCCNTL.touch_slp_thres.touch_slp_pad = touch_num;
+}
+
+/**
+ * Get touch channel number for sleep pad.
+ *
+ * @note Only one touch sensor channel is supported in deep sleep mode.
+ * @param touch_num Touch sensor channel number.
+ */
+static inline void touch_ll_sleep_get_channel_num(touch_pad_t *touch_num)
+{
+    *touch_num = RTCCNTL.touch_slp_thres.touch_slp_pad;
+}
+
+/**
+ * Set the trigger threshold of touch sensor in deep sleep.
+ * The threshold determines the sensitivity of the touch sensor.
+ * The threshold is the original value of the trigger state minus the benchmark value.
+ *
+ * @note In general, the touch threshold during sleep can use the threshold parameter parameters before sleep.
+ */
+static inline void touch_ll_sleep_set_threshold(uint32_t touch_thres)
+{
+    RTCCNTL.touch_slp_thres.touch_slp_th = touch_thres;
+}
+
+/**
+ * Get the trigger threshold of touch sensor in deep sleep.
+ * The threshold determines the sensitivity of the touch sensor.
+ * The threshold is the original value of the trigger state minus the benchmark value.
+ *
+ * @note In general, the touch threshold during sleep can use the threshold parameter parameters before sleep.
+ */
+static inline void touch_ll_sleep_get_threshold(uint32_t *touch_thres)
+{
+    *touch_thres = RTCCNTL.touch_slp_thres.touch_slp_th;
+}
+
+/**
+ * Enable proximity function for sleep pad.
+ */
+static inline void touch_ll_sleep_enable_approach(void)
+{
+    RTCCNTL.touch_slp_thres.touch_slp_approach_en = 1;
+}
+
+/**
+ * Disable proximity function for sleep pad.
+ */
+static inline void touch_ll_sleep_disable_approach(void)
+{
+    RTCCNTL.touch_slp_thres.touch_slp_approach_en = 0;
+}
+
+/**
+ * Get proximity function status for sleep pad.
+ */
+static inline bool touch_ll_sleep_get_approach_status(void)
+{
+    return (bool)RTCCNTL.touch_slp_thres.touch_slp_approach_en;
+}
+
+/**
+ * Read benchmark of touch sensor for sleep pad.
+ *
+ * @param benchmark Pointer to accept touch sensor benchmark value.
+ */
+static inline void touch_ll_sleep_read_benchmark(uint32_t *benchmark)
+{
+    SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_BENCHMARK;
+    *benchmark = SENS.sar_touch_slp_status.touch_slp_data;
+}
+
+static inline void touch_ll_sleep_read_smooth(uint32_t *smooth_data)
+{
+    SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_SMOOTH;
+    *smooth_data = SENS.sar_touch_slp_status.touch_slp_data;
+}
+
+/* Workaround: Note: sleep pad raw data is not in `sar_touch_slp_status` */
+static inline void touch_ll_sleep_read_data(uint32_t *raw_data)
+{
+    uint32_t touch_num = RTCCNTL.touch_slp_thres.touch_slp_pad;
+    SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_RAW;
+    *raw_data = SENS.sar_touch_status[touch_num - 1].touch_pad_data;
+}
+
+static inline void touch_ll_sleep_reset_benchmark(void)
+{
+    RTCCNTL.touch_approach.touch_slp_channel_clr = 1;
+}
+
+/**
+ * Select touch sensor dbias to save power in sleep mode.
+ *
+ * @note If change the dbias, the reading of touch sensor will changed. Users should make sure the threshold.
+ */
+static inline void touch_ll_sleep_low_power(bool is_low_power)
+{
+    RTCCNTL.touch_ctrl2.touch_dbias = is_low_power;
+}
+
+/**
+ * Read debounce of touch sensor for sleep pad.
+ *
+ * @param debounce Pointer to accept touch sensor debounce value.
+ */
+static inline void touch_ll_sleep_read_debounce(uint32_t *debounce)
+{
+    *debounce = SENS.sar_touch_slp_status.touch_slp_debounce;
+}
+
+/**
+ * Read proximity count of touch sensor for sleep pad.
+ * @param proximity_cnt Pointer to accept touch sensor proximity count value.
+ */
+static inline void touch_ll_sleep_read_proximity_cnt(uint32_t *approach_cnt)
+{
+    *approach_cnt = SENS.sar_touch_appr_status.touch_slp_approach_cnt;
+}
+
+/**
+ * Get the touch pad which caused wakeup from deep sleep.
+ *
+ * @param pad_num pointer to touch pad which caused wakeup.
+ */
+static inline void touch_ll_get_wakeup_status(touch_pad_t *pad_num)
+{
+    *pad_num = (touch_pad_t)RTCCNTL.touch_slp_thres.touch_slp_pad;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/trace_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/trace_ll.h
new file mode 100644
index 00000000000..ccf4e885535
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/trace_ll.h
@@ -0,0 +1,23 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdlib.h>
+
+#include "soc/dport_reg.h"
+#include "soc/tracemem_config.h"
+
+static inline void trace_ll_set_mem_block(int cpu, int block)
+{
+    uint32_t block_bits = 0;
+
+    if (cpu == 0) {
+        block_bits = TRACEMEM_CORE0_MUX_BLK_BITS(block);
+    } else {
+        block_bits = TRACEMEM_CORE1_MUX_BLK_BITS(block);
+    }
+    DPORT_SET_PERI_REG_MASK(SENSITIVE_INTERNAL_SRAM_USAGE_2_REG, block_bits);
+}
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/twai_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/twai_ll.h
new file mode 100644
index 00000000000..e9eef59104d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/twai_ll.h
@@ -0,0 +1,669 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The ll is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The Lowlevel layer for TWAI
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "hal/twai_types.h"
+#include "soc/twai_periph.h"
+#include "soc/twai_struct.h"
+
+/* ------------------------- Defines and Typedefs --------------------------- */
+
+#define TWAI_LL_STATUS_RBS      (0x1 << 0)      //Receive Buffer Status
+#define TWAI_LL_STATUS_DOS      (0x1 << 1)      //Data Overrun Status
+#define TWAI_LL_STATUS_TBS      (0x1 << 2)      //Transmit Buffer Status
+#define TWAI_LL_STATUS_TCS      (0x1 << 3)      //Transmission Complete Status
+#define TWAI_LL_STATUS_RS       (0x1 << 4)      //Receive Status
+#define TWAI_LL_STATUS_TS       (0x1 << 5)      //Transmit Status
+#define TWAI_LL_STATUS_ES       (0x1 << 6)      //Error Status
+#define TWAI_LL_STATUS_BS       (0x1 << 7)      //Bus Status
+#define TWAI_LL_STATUS_MS       (0x1 << 8)      //Miss Status
+
+#define TWAI_LL_INTR_RI         (0x1 << 0)      //Receive Interrupt
+#define TWAI_LL_INTR_TI         (0x1 << 1)      //Transmit Interrupt
+#define TWAI_LL_INTR_EI         (0x1 << 2)      //Error Interrupt
+//Data overrun interrupt not supported in SW due to HW peculiarities
+#define TWAI_LL_INTR_EPI        (0x1 << 5)      //Error Passive Interrupt
+#define TWAI_LL_INTR_ALI        (0x1 << 6)      //Arbitration Lost Interrupt
+#define TWAI_LL_INTR_BEI        (0x1 << 7)      //Bus Error Interrupt
+
+/*
+ * The following frame structure has an NEARLY identical bit field layout to
+ * each byte of the TX buffer. This allows for formatting and parsing frames to
+ * be done outside of time critical regions (i.e., ISRs). All the ISR needs to
+ * do is to copy byte by byte to/from the TX/RX buffer. The two reserved bits in
+ * TX buffer are used in the frame structure to store the self_reception and
+ * single_shot flags which in turn indicate the type of transmission to execute.
+ */
+typedef union {
+    struct {
+        struct {
+            uint8_t dlc: 4;             //Data length code (0 to 8) of the frame
+            uint8_t self_reception: 1;  //This frame should be transmitted using self reception command
+            uint8_t single_shot: 1;     //This frame should be transmitted using single shot command
+            uint8_t rtr: 1;             //This frame is a remote transmission request
+            uint8_t frame_format: 1;    //Format of the frame (1 = extended, 0 = standard)
+        };
+        union {
+            struct {
+                uint8_t id[2];          //11 bit standard frame identifier
+                uint8_t data[8];        //Data bytes (0 to 8)
+                uint8_t reserved8[2];
+            } standard;
+            struct {
+                uint8_t id[4];          //29 bit extended frame identifier
+                uint8_t data[8];        //Data bytes (0 to 8)
+            } extended;
+        };
+    };
+    uint8_t bytes[13];
+} __attribute__((packed)) twai_ll_frame_buffer_t;
+
+_Static_assert(sizeof(twai_ll_frame_buffer_t) == 13, "TX/RX buffer type should be 13 bytes");
+
+/* ---------------------------- Mode Register ------------------------------- */
+
+/**
+ * @brief   Enter reset mode
+ *
+ * When in reset mode, the TWAI controller is effectively disconnected from the
+ * TWAI bus and will not participate in any bus activates. Reset mode is required
+ * in order to write the majority of configuration registers.
+ *
+ * @param hw Start address of the TWAI registers
+ *
+ * @note Reset mode is automatically entered on BUS OFF condition
+ */
+static inline void twai_ll_enter_reset_mode(twai_dev_t *hw)
+{
+    hw->mode_reg.rm = 1;
+}
+
+/**
+ * @brief   Exit reset mode
+ *
+ * When not in reset mode, the TWAI controller will take part in bus activities
+ * (e.g., send/receive/acknowledge messages and error frames) depending on the
+ * operating mode.
+ *
+ * @param hw Start address of the TWAI registers
+ *
+ * @note Reset mode must be exit to initiate BUS OFF recovery
+ */
+static inline void twai_ll_exit_reset_mode(twai_dev_t *hw)
+{
+    hw->mode_reg.rm = 0;
+}
+
+/**
+ * @brief   Check if in reset mode
+ * @param hw Start address of the TWAI registers
+ * @return true if in reset mode
+ */
+static inline bool twai_ll_is_in_reset_mode(twai_dev_t *hw)
+{
+    return hw->mode_reg.rm;
+}
+
+/**
+ * @brief   Set operating mode of TWAI controller
+ *
+ * @param hw Start address of the TWAI registers
+ * @param mode Operating mode
+ *
+ * @note Must be called in reset mode
+ */
+static inline void twai_ll_set_mode(twai_dev_t *hw, twai_mode_t mode)
+{
+    if (mode == TWAI_MODE_NORMAL) {           //Normal Operating mode
+        hw->mode_reg.lom = 0;
+        hw->mode_reg.stm = 0;
+    } else if (mode == TWAI_MODE_NO_ACK) {    //Self Test Mode (No Ack)
+        hw->mode_reg.lom = 0;
+        hw->mode_reg.stm = 1;
+    } else if (mode == TWAI_MODE_LISTEN_ONLY) {       //Listen Only Mode
+        hw->mode_reg.lom = 1;
+        hw->mode_reg.stm = 0;
+    }
+}
+
+/* --------------------------- Command Register ----------------------------- */
+
+/**
+ * @brief   Set TX command
+ *
+ * Setting the TX command will cause the TWAI controller to attempt to transmit
+ * the frame stored in the TX buffer. The TX buffer will be occupied (i.e.,
+ * locked) until TX completes.
+ *
+ * @param hw Start address of the TWAI registers
+ *
+ * @note Transmit commands should be called last (i.e., after handling buffer
+ *       release and clear data overrun) in order to prevent the other commands
+ *       overwriting this latched TX bit with 0.
+ */
+static inline void twai_ll_set_cmd_tx(twai_dev_t *hw)
+{
+    hw->command_reg.tr = 1;
+}
+
+/**
+ * @brief   Set single shot TX command
+ *
+ * Similar to setting TX command, but the TWAI controller will not automatically
+ * retry transmission upon an error (e.g., due to an acknowledgement error).
+ *
+ * @param hw Start address of the TWAI registers
+ *
+ * @note Transmit commands should be called last (i.e., after handling buffer
+ *       release and clear data overrun) in order to prevent the other commands
+ *       overwriting this latched TX bit with 0.
+ */
+static inline void twai_ll_set_cmd_tx_single_shot(twai_dev_t *hw)
+{
+    hw->command_reg.val = 0x03; //Set command_reg.tr and command_reg.at simultaneously for single shot transmittion request
+}
+
+/**
+ * @brief   Aborts TX
+ *
+ * Frames awaiting TX will be aborted. Frames already being TX are not aborted.
+ * Transmission Complete Status bit is automatically set to 1.
+ * Similar to setting TX command, but the TWAI controller will not automatically
+ * retry transmission upon an error (e.g., due to acknowledge error).
+ *
+ * @param hw Start address of the TWAI registers
+ *
+ * @note Transmit commands should be called last (i.e., after handling buffer
+ *       release and clear data overrun) in order to prevent the other commands
+ *       overwriting this latched TX bit with 0.
+ */
+static inline void twai_ll_set_cmd_abort_tx(twai_dev_t *hw)
+{
+    hw->command_reg.at = 1;
+}
+
+/**
+ * @brief   Release RX buffer
+ *
+ * Rotates RX buffer to the next frame in the RX FIFO.
+ *
+ * @param hw Start address of the TWAI registers
+ */
+static inline void twai_ll_set_cmd_release_rx_buffer(twai_dev_t *hw)
+{
+    hw->command_reg.rrb = 1;
+}
+
+/**
+ * @brief   Clear data overrun
+ *
+ * Clears the data overrun status bit
+ *
+ * @param hw Start address of the TWAI registers
+ */
+static inline void twai_ll_set_cmd_clear_data_overrun(twai_dev_t *hw)
+{
+    hw->command_reg.cdo = 1;
+}
+
+/**
+ * @brief   Set self reception single shot command
+ *
+ * Similar to setting TX command, but the TWAI controller also simultaneously
+ * receive the transmitted frame and is generally used for self testing
+ * purposes. The TWAI controller will not ACK the received message, so consider
+ * using the NO_ACK operating mode.
+ *
+ * @param hw Start address of the TWAI registers
+ *
+ * @note Transmit commands should be called last (i.e., after handling buffer
+ *       release and clear data overrun) in order to prevent the other commands
+ *       overwriting this latched TX bit with 0.
+ */
+static inline void twai_ll_set_cmd_self_rx_request(twai_dev_t *hw)
+{
+    hw->command_reg.srr = 1;
+}
+
+/**
+ * @brief   Set self reception request command
+ *
+ * Similar to setting the self reception request, but the TWAI controller will
+ * not automatically retry transmission upon an error (e.g., due to and
+ * acknowledgement error).
+ *
+ * @param hw Start address of the TWAI registers
+ *
+ * @note Transmit commands should be called last (i.e., after handling buffer
+ *       release and clear data overrun) in order to prevent the other commands
+ *       overwriting this latched TX bit with 0.
+ */
+static inline void twai_ll_set_cmd_self_rx_single_shot(twai_dev_t *hw)
+{
+    hw->command_reg.val = 0x12; //Set command_reg.srr and command_reg.at simultaneously for single shot self reception request
+}
+
+/* --------------------------- Status Register ------------------------------ */
+
+/**
+ * @brief   Get all status bits
+ *
+ * @param hw Start address of the TWAI registers
+ * @return Status bits
+ */
+static inline uint32_t twai_ll_get_status(twai_dev_t *hw)
+{
+    return hw->status_reg.val;
+}
+
+/**
+ * @brief   Check if RX FIFO overrun status bit is set
+ *
+ * @param hw Start address of the TWAI registers
+ * @return Overrun status bit
+ */
+static inline bool twai_ll_is_fifo_overrun(twai_dev_t *hw)
+{
+    return hw->status_reg.dos;
+}
+
+/**
+ * @brief   Check if previously TX was successful
+ *
+ * @param hw Start address of the TWAI registers
+ * @return Whether previous TX was successful
+ */
+static inline bool twai_ll_is_last_tx_successful(twai_dev_t *hw)
+{
+    return hw->status_reg.tcs;
+}
+
+/* -------------------------- Interrupt Register ---------------------------- */
+
+/**
+ * @brief   Get currently set interrupts
+ *
+ * Reading the interrupt registers will automatically clear all interrupts
+ * except for the Receive Interrupt.
+ *
+ * @param hw Start address of the TWAI registers
+ * @return Bit mask of set interrupts
+ */
+static inline uint32_t twai_ll_get_and_clear_intrs(twai_dev_t *hw)
+{
+    return hw->interrupt_reg.val;
+}
+
+/* ----------------------- Interrupt Enable Register ------------------------ */
+
+/**
+ * @brief   Set which interrupts are enabled
+ *
+ * @param hw Start address of the TWAI registers
+ * @param Bit mask of interrupts to enable
+ *
+ * @note Must be called in reset mode
+ */
+static inline void twai_ll_set_enabled_intrs(twai_dev_t *hw, uint32_t intr_mask)
+{
+    hw->interrupt_enable_reg.val = intr_mask;
+}
+
+/* ------------------------ Bus Timing Registers --------------------------- */
+
+/**
+ * @brief   Set bus timing
+ *
+ * @param hw Start address of the TWAI registers
+ * @param brp Baud Rate Prescaler
+ * @param sjw Synchronization Jump Width
+ * @param tseg1 Timing Segment 1
+ * @param tseg2 Timing Segment 2
+ * @param triple_sampling Triple Sampling enable/disable
+ *
+ * @note Must be called in reset mode
+ * @note ESP32S3 brp can be any even number between 2 to 32768
+ */
+static inline void twai_ll_set_bus_timing(twai_dev_t *hw, uint32_t brp, uint32_t sjw, uint32_t tseg1, uint32_t tseg2, bool triple_sampling)
+{
+    hw->bus_timing_0_reg.brp = (brp / 2) - 1;
+    hw->bus_timing_0_reg.sjw = sjw - 1;
+    hw->bus_timing_1_reg.tseg1 = tseg1 - 1;
+    hw->bus_timing_1_reg.tseg2 = tseg2 - 1;
+    hw->bus_timing_1_reg.sam = triple_sampling;
+}
+
+/* ----------------------------- ALC Register ------------------------------- */
+
+/**
+ * @brief   Clear Arbitration Lost Capture Register
+ *
+ * Reading the ALC register rearms the Arbitration Lost Interrupt
+ *
+ * @param hw Start address of the TWAI registers
+ */
+static inline void twai_ll_clear_arb_lost_cap(twai_dev_t *hw)
+{
+    (void)hw->arbitration_lost_captue_reg.val;
+}
+
+/* ----------------------------- ECC Register ------------------------------- */
+
+/**
+ * @brief   Clear Error Code Capture register
+ *
+ * Reading the ECC register rearms the Bus Error Interrupt
+ *
+ * @param hw Start address of the TWAI registers
+ */
+static inline void twai_ll_clear_err_code_cap(twai_dev_t *hw)
+{
+    (void)hw->error_code_capture_reg.val;
+}
+
+/* ----------------------------- EWL Register ------------------------------- */
+
+/**
+ * @brief   Set Error Warning Limit
+ *
+ * @param hw Start address of the TWAI registers
+ * @param ewl Error Warning Limit
+ *
+ * @note Must be called in reset mode
+ */
+static inline void twai_ll_set_err_warn_lim(twai_dev_t *hw, uint32_t ewl)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->error_warning_limit_reg, ewl, ewl);
+}
+
+/**
+ * @brief   Get Error Warning Limit
+ *
+ * @param hw Start address of the TWAI registers
+ * @return Error Warning Limit
+ */
+static inline uint32_t twai_ll_get_err_warn_lim(twai_dev_t *hw)
+{
+    return hw->error_warning_limit_reg.val;
+}
+
+/* ------------------------ RX Error Count Register ------------------------- */
+
+/**
+ * @brief   Get RX Error Counter
+ *
+ * @param hw Start address of the TWAI registers
+ * @return REC value
+ *
+ * @note REC is not frozen in reset mode. Listen only mode will freeze it. A BUS
+ *       OFF condition automatically sets the REC to 0.
+ */
+static inline uint32_t twai_ll_get_rec(twai_dev_t *hw)
+{
+    return hw->rx_error_counter_reg.val;
+}
+
+/**
+ * @brief   Set RX Error Counter
+ *
+ * @param hw Start address of the TWAI registers
+ * @param rec REC value
+ *
+ * @note Must be called in reset mode
+ */
+static inline void twai_ll_set_rec(twai_dev_t *hw, uint32_t rec)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->rx_error_counter_reg, rxerr, rec);
+}
+
+/* ------------------------ TX Error Count Register ------------------------- */
+
+/**
+ * @brief   Get TX Error Counter
+ *
+ * @param hw Start address of the TWAI registers
+ * @return TEC value
+ *
+ * @note A BUS OFF condition will automatically set this to 128
+ */
+static inline uint32_t twai_ll_get_tec(twai_dev_t *hw)
+{
+    return hw->tx_error_counter_reg.val;
+}
+
+/**
+ * @brief   Set TX Error Counter
+ *
+ * @param hw Start address of the TWAI registers
+ * @param tec TEC value
+ *
+ * @note Must be called in reset mode
+ */
+static inline void twai_ll_set_tec(twai_dev_t *hw, uint32_t tec)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->tx_error_counter_reg, txerr, tec);
+}
+
+/* ---------------------- Acceptance Filter Registers ----------------------- */
+
+/**
+ * @brief   Set Acceptance Filter
+ * @param hw Start address of the TWAI registers
+ * @param code Acceptance Code
+ * @param mask Acceptance Mask
+ * @param single_filter Whether to enable single filter mode
+ *
+ * @note Must be called in reset mode
+ */
+static inline void twai_ll_set_acc_filter(twai_dev_t* hw, uint32_t code, uint32_t mask, bool single_filter)
+{
+    uint32_t code_swapped = HAL_SWAP32(code);
+    uint32_t mask_swapped = HAL_SWAP32(mask);
+    for (int i = 0; i < 4; i++) {
+        HAL_FORCE_MODIFY_U32_REG_FIELD(hw->acceptance_filter.acr[i], byte, ((code_swapped >> (i * 8)) & 0xFF));
+        HAL_FORCE_MODIFY_U32_REG_FIELD(hw->acceptance_filter.amr[i], byte, ((mask_swapped >> (i * 8)) & 0xFF));
+    }
+    hw->mode_reg.afm = single_filter;
+}
+
+/* ------------------------- TX/RX Buffer Registers ------------------------- */
+
+/**
+ * @brief   Copy a formatted TWAI frame into TX buffer for transmission
+ *
+ * @param hw Start address of the TWAI registers
+ * @param tx_frame Pointer to formatted frame
+ *
+ * @note Call twai_ll_format_frame_buffer() to format a frame
+ */
+static inline void twai_ll_set_tx_buffer(twai_dev_t *hw, twai_ll_frame_buffer_t *tx_frame)
+{
+    //Copy formatted frame into TX buffer
+    for (int i = 0; i < 13; i++) {
+        hw->tx_rx_buffer[i].val = tx_frame->bytes[i];
+    }
+}
+
+/**
+ * @brief   Copy a received frame from the RX buffer for parsing
+ *
+ * @param hw Start address of the TWAI registers
+ * @param rx_frame Pointer to store formatted frame
+ *
+ * @note Call twai_ll_prase_frame_buffer() to parse the formatted frame
+ */
+static inline void twai_ll_get_rx_buffer(twai_dev_t *hw, twai_ll_frame_buffer_t *rx_frame)
+{
+    //Copy RX buffer registers into frame
+    for (int i = 0; i < 13; i++) {
+        rx_frame->bytes[i] =  HAL_FORCE_READ_U32_REG_FIELD(hw->tx_rx_buffer[i], byte);
+    }
+}
+
+/**
+ * @brief   Format contents of a TWAI frame into layout of TX Buffer
+ *
+ * This function encodes a message into a frame structure. The frame structure
+ * has an identical layout to the TX buffer, allowing the frame structure to be
+ * directly copied into TX buffer.
+ *
+ * @param[in] 11bit or 29bit ID
+ * @param[in] dlc Data length code
+ * @param[in] data Pointer to an 8 byte array containing data. NULL if no data
+ * @param[in] format Type of TWAI frame
+ * @param[in] single_shot Frame will not be retransmitted on failure
+ * @param[in] self_rx Frame will also be simultaneously received
+ * @param[out] tx_frame Pointer to store formatted frame
+ */
+static inline void twai_ll_format_frame_buffer(uint32_t id, uint8_t dlc, const uint8_t *data,
+                                              uint32_t flags, twai_ll_frame_buffer_t *tx_frame)
+{
+    bool is_extd = flags & TWAI_MSG_FLAG_EXTD;
+    bool is_rtr = flags & TWAI_MSG_FLAG_RTR;
+
+    //Set frame information
+    tx_frame->dlc = dlc;
+    tx_frame->frame_format = is_extd;
+    tx_frame->rtr = is_rtr;
+    tx_frame->self_reception = (flags & TWAI_MSG_FLAG_SELF) ? 1 : 0;
+    tx_frame->single_shot = (flags & TWAI_MSG_FLAG_SS) ? 1 : 0;
+
+    //Set ID. The ID registers are big endian and left aligned, therefore a bswap will be required
+    if (is_extd) {
+        uint32_t id_temp = HAL_SWAP32((id & TWAI_EXTD_ID_MASK) << 3); //((id << 3) >> 8*(3-i))
+        for (int i = 0; i < 4; i++) {
+            tx_frame->extended.id[i] = (id_temp >> (8 * i)) & 0xFF;
+        }
+    } else {
+        uint32_t id_temp =  HAL_SWAP16((id & TWAI_STD_ID_MASK) << 5); //((id << 5) >> 8*(1-i))
+        for (int i = 0; i < 2; i++) {
+            tx_frame->standard.id[i] = (id_temp >> (8 * i)) & 0xFF;
+        }
+    }
+
+    uint8_t *data_buffer = (is_extd) ? tx_frame->extended.data : tx_frame->standard.data;
+    if (!is_rtr) {  //Only copy data if the frame is a data frame (i.e not a remote frame)
+        for (int i = 0; (i < dlc) && (i < TWAI_FRAME_MAX_DLC); i++) {
+            data_buffer[i] = data[i];
+        }
+    }
+}
+
+/**
+ * @brief   Parse formatted TWAI frame (RX Buffer Layout) into its constituent contents
+ *
+ * @param[in] rx_frame Pointer to formatted frame
+ * @param[out] id 11 or 29bit ID
+ * @param[out] dlc Data length code
+ * @param[out] data Data. Left over bytes set to 0.
+ * @param[out] format Type of TWAI frame
+ */
+static inline void twai_ll_prase_frame_buffer(twai_ll_frame_buffer_t *rx_frame, uint32_t *id, uint8_t *dlc,
+                                             uint8_t *data, uint32_t *flags)
+{
+    //Copy frame information
+    *dlc = rx_frame->dlc;
+    uint32_t flags_temp = 0;
+    flags_temp |= (rx_frame->frame_format) ? TWAI_MSG_FLAG_EXTD : 0;
+    flags_temp |= (rx_frame->rtr) ? TWAI_MSG_FLAG_RTR : 0;
+    flags_temp |= (rx_frame->dlc > TWAI_FRAME_MAX_DLC) ? TWAI_MSG_FLAG_DLC_NON_COMP : 0;
+    *flags = flags_temp;
+
+    //Copy ID. The ID registers are big endian and left aligned, therefore a bswap will be required
+    if (rx_frame->frame_format) {
+        uint32_t id_temp = 0;
+        for (int i = 0; i < 4; i++) {
+            id_temp |= rx_frame->extended.id[i] << (8 * i);
+        }
+        id_temp = HAL_SWAP32(id_temp) >> 3;  //((byte[i] << 8*(3-i)) >> 3)
+        *id = id_temp & TWAI_EXTD_ID_MASK;
+    } else {
+        uint32_t id_temp = 0;
+        for (int i = 0; i < 2; i++) {
+            id_temp |= rx_frame->standard.id[i] << (8 * i);
+        }
+        id_temp = HAL_SWAP16(id_temp) >> 5;  //((byte[i] << 8*(1-i)) >> 5)
+        *id = id_temp & TWAI_STD_ID_MASK;
+    }
+
+    uint8_t *data_buffer = (rx_frame->frame_format) ? rx_frame->extended.data : rx_frame->standard.data;
+    //Only copy data if the frame is a data frame (i.e. not a remote frame)
+    int data_length = (rx_frame->rtr) ? 0 : ((rx_frame->dlc > TWAI_FRAME_MAX_DLC) ? TWAI_FRAME_MAX_DLC : rx_frame->dlc);
+    for (int i = 0; i < data_length; i++) {
+        data[i] = data_buffer[i];
+    }
+    //Set remaining bytes of data to 0
+    for (int i = data_length; i < TWAI_FRAME_MAX_DLC; i++) {
+        data[i] = 0;
+    }
+}
+
+/* ----------------------- RX Message Count Register ------------------------ */
+
+/**
+ * @brief   Get RX Message Counter
+ *
+ * @param hw Start address of the TWAI registers
+ * @return RX Message Counter
+ */
+static inline uint32_t twai_ll_get_rx_msg_count(twai_dev_t *hw)
+{
+    return hw->rx_message_counter_reg.val;
+}
+
+/* ------------------------- Clock Divider Register ------------------------- */
+
+/**
+ * @brief   Set CLKOUT Divider and enable/disable
+ *
+ * Configure CLKOUT. CLKOUT is a pre-scaled version of APB CLK. Divider can be
+ * 1, or any even number from 2 to 490. Set the divider to 0 to disable CLKOUT.
+ *
+ * @param hw Start address of the TWAI registers
+ * @param divider Divider for CLKOUT (any even number from 2 to 490). Set to 0 to disable CLKOUT
+ */
+static inline void twai_ll_set_clkout(twai_dev_t *hw, uint32_t divider)
+{
+    if (divider >= 2 && divider <= 490) {
+        hw->clock_divider_reg.co = 0;
+        HAL_FORCE_MODIFY_U32_REG_FIELD(hw->clock_divider_reg, cd, (divider / 2) - 1);
+    } else if (divider == 1) {
+        //Setting the divider reg to max value (255) means a divider of 1
+        hw->clock_divider_reg.co = 0;
+        HAL_FORCE_MODIFY_U32_REG_FIELD(hw->clock_divider_reg, cd, 255);
+    } else {
+        hw->clock_divider_reg.co = 1;
+        HAL_FORCE_MODIFY_U32_REG_FIELD(hw->clock_divider_reg, cd, 0);
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/uart_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/uart_ll.h
new file mode 100644
index 00000000000..0cb979ea794
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/uart_ll.h
@@ -0,0 +1,982 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// The LL layer for UART register operations.
+// Note that most of the register operations in this layer are non-atomic operations.
+
+
+#pragma once
+
+#include "hal/misc.h"
+#include "hal/uart_types.h"
+#include "soc/uart_periph.h"
+#include "soc/uart_struct.h"
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// The default fifo depth
+#define UART_LL_FIFO_DEF_LEN  (SOC_UART_FIFO_LEN)
+// Get UART hardware instance with giving uart num
+#define UART_LL_GET_HW(num) (((num) == 0) ? (&UART0) : (((num) == 1) ? (&UART1) : (&UART2)))
+
+#define UART_LL_MIN_WAKEUP_THRESH (2)
+#define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
+
+#define UART_LL_FSM_IDLE          (0x0)
+#define UART_LL_FSM_TX_WAIT_SEND  (0xf)
+
+// Define UART interrupts
+typedef enum {
+    UART_INTR_RXFIFO_FULL      = (0x1 << 0),
+    UART_INTR_TXFIFO_EMPTY     = (0x1 << 1),
+    UART_INTR_PARITY_ERR       = (0x1 << 2),
+    UART_INTR_FRAM_ERR         = (0x1 << 3),
+    UART_INTR_RXFIFO_OVF       = (0x1 << 4),
+    UART_INTR_DSR_CHG          = (0x1 << 5),
+    UART_INTR_CTS_CHG          = (0x1 << 6),
+    UART_INTR_BRK_DET          = (0x1 << 7),
+    UART_INTR_RXFIFO_TOUT      = (0x1 << 8),
+    UART_INTR_SW_XON           = (0x1 << 9),
+    UART_INTR_SW_XOFF          = (0x1 << 10),
+    UART_INTR_GLITCH_DET       = (0x1 << 11),
+    UART_INTR_TX_BRK_DONE      = (0x1 << 12),
+    UART_INTR_TX_BRK_IDLE      = (0x1 << 13),
+    UART_INTR_TX_DONE          = (0x1 << 14),
+    UART_INTR_RS485_PARITY_ERR = (0x1 << 15),
+    UART_INTR_RS485_FRM_ERR    = (0x1 << 16),
+    UART_INTR_RS485_CLASH      = (0x1 << 17),
+    UART_INTR_CMD_CHAR_DET     = (0x1 << 18),
+} uart_intr_t;
+
+/**
+ * @brief  Configure the UART core reset.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  core_rst_en True to enable the core reset, otherwise set it false.
+ *
+ * @return None.
+ */
+static inline void uart_ll_set_reset_core(uart_dev_t *hw, bool core_rst_en)
+{
+    hw->clk_conf.rst_core = core_rst_en;
+}
+
+/**
+ * @brief  Set the UART source clock.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  source_clk The UART source clock. The source clock can be APB clock, RTC clock or XTAL clock.
+ *                    If the source clock is RTC/XTAL, the UART can still work when the APB changes.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_sclk(uart_dev_t *hw, uart_sclk_t source_clk)
+{
+    switch (source_clk) {
+        default:
+        case UART_SCLK_APB:
+            hw->clk_conf.sclk_sel = 1;
+            break;
+        case UART_SCLK_RTC:
+            hw->clk_conf.sclk_sel = 2;
+            break;
+        case UART_SCLK_XTAL:
+            hw->clk_conf.sclk_sel = 3;
+            break;
+    }
+}
+
+/**
+ * @brief  Get the UART source clock type.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  source_clk The pointer to accept the UART source clock type.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_get_sclk(uart_dev_t *hw, uart_sclk_t *source_clk)
+{
+    switch (hw->clk_conf.sclk_sel) {
+        default:
+        case 1:
+            *source_clk = UART_SCLK_APB;
+            break;
+        case 2:
+            *source_clk = UART_SCLK_RTC;
+            break;
+        case 3:
+            *source_clk = UART_SCLK_XTAL;
+            break;
+    }
+}
+
+/**
+ * @brief  Get the UART source clock frequency.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return Current source clock frequency
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_sclk_freq(uart_dev_t *hw)
+{
+    switch (hw->clk_conf.sclk_sel) {
+        default:
+        case 1:
+            return APB_CLK_FREQ;
+        case 2:
+            return RTC_CLK_FREQ;
+        case 3:
+            return XTAL_CLK_FREQ;
+    }
+}
+
+/**
+ * @brief  Configure the baud-rate.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  baud The baud rate to be set.
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void uart_ll_set_baudrate(uart_dev_t *hw, uint32_t baud)
+{
+#define DIV_UP(a, b)    (((a) + (b) - 1) / (b))
+    uint32_t sclk_freq = uart_ll_get_sclk_freq(hw);
+    const uint32_t max_div = BIT(12) - 1;   // UART divider integer part only has 12 bits
+    int sclk_div = DIV_UP(sclk_freq, max_div * baud);
+
+    uint32_t clk_div = ((sclk_freq) << 4) / (baud * sclk_div);
+    // The baud rate configuration register is divided into
+    // an integer part and a fractional part.
+    hw->clkdiv.clkdiv = clk_div >> 4;
+    hw->clkdiv.clkdiv_frag = clk_div &  0xf;
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->clk_conf, sclk_div_num, sclk_div - 1);
+#undef DIV_UP
+}
+
+/**
+ * @brief  Get the current baud-rate.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return The current baudrate
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_baudrate(uart_dev_t *hw)
+{
+    uint32_t sclk_freq = uart_ll_get_sclk_freq(hw);
+    uart_clkdiv_reg_t div_reg = hw->clkdiv;
+    return ((sclk_freq << 4)) /
+        (((div_reg.clkdiv << 4) | div_reg.clkdiv_frag) * (HAL_FORCE_READ_U32_REG_FIELD(hw->clk_conf, sclk_div_num) + 1));
+}
+
+/**
+ * @brief  Enable the UART interrupt based on the given mask.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  mask The bitmap of the interrupts need to be enabled.
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void uart_ll_ena_intr_mask(uart_dev_t *hw, uint32_t mask)
+{
+    hw->int_ena.val |= mask;
+}
+
+/**
+ * @brief  Disable the UART interrupt based on the given mask.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  mask The bitmap of the interrupts need to be disabled.
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void uart_ll_disable_intr_mask(uart_dev_t *hw, uint32_t mask)
+{
+    hw->int_ena.val &= (~mask);
+}
+
+/**
+ * @brief  Get the UART interrupt status.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return The UART interrupt status.
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_intsts_mask(uart_dev_t *hw)
+{
+    return hw->int_st.val;
+}
+
+/**
+ * @brief  Clear the UART interrupt status based on the given mask.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  mask The bitmap of the interrupts need to be cleared.
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void uart_ll_clr_intsts_mask(uart_dev_t *hw, uint32_t mask)
+{
+    hw->int_clr.val = mask;
+}
+
+/**
+ * @brief  Get status of enabled interrupt.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return interrupt enable value
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_intr_ena_status(uart_dev_t *hw)
+{
+    return hw->int_ena.val;
+}
+
+/**
+ * @brief  Read the UART rxfifo.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  buf The data buffer. The buffer size should be large than 128 byts.
+ * @param  rd_len The data length needs to be read.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_read_rxfifo(uart_dev_t *hw, uint8_t *buf, uint32_t rd_len)
+{
+    for (int i = 0; i < (int)rd_len; i++) {
+        buf[i] = hw->fifo.rxfifo_rd_byte;
+    }
+}
+
+/**
+ * @brief  Write byte to the UART txfifo.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  buf The data buffer.
+ * @param  wr_len The data length needs to be writen.
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void uart_ll_write_txfifo(uart_dev_t *hw, const uint8_t *buf, uint32_t wr_len)
+{
+    for (int i = 0; i < (int)wr_len; i++) {
+        hw->fifo.rxfifo_rd_byte = buf[i];
+    }
+}
+
+/**
+ * @brief  Reset the UART hw rxfifo.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void uart_ll_rxfifo_rst(uart_dev_t *hw)
+{
+    hw->conf0.rxfifo_rst = 1;
+    hw->conf0.rxfifo_rst = 0;
+}
+
+/**
+ * @brief  Reset the UART hw txfifo.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void uart_ll_txfifo_rst(uart_dev_t *hw)
+{
+    hw->conf0.txfifo_rst = 1;
+    hw->conf0.txfifo_rst = 0;
+}
+
+/**
+ * @brief  Get the length of readable data in UART rxfifo.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return The readable data length in rxfifo.
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_rxfifo_len(uart_dev_t *hw)
+{
+    return hw->status.rxfifo_cnt;
+}
+
+/**
+ * @brief  Get the writable data length of UART txfifo.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return The data length of txfifo can be written.
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_txfifo_len(uart_dev_t *hw)
+{
+    return UART_LL_FIFO_DEF_LEN - hw->status.txfifo_cnt;
+}
+
+/**
+ * @brief  Configure the UART stop bit.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  stop_bit The stop bit number to be set.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_stop_bits(uart_dev_t *hw, uart_stop_bits_t stop_bit)
+{
+    hw->conf0.stop_bit_num = stop_bit;
+}
+
+/**
+ * @brief  Get the configuration of the UART stop bit.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  stop_bit The pointer to accept the stop bit configuration
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_get_stop_bits(uart_dev_t *hw, uart_stop_bits_t *stop_bit)
+{
+    *stop_bit = hw->conf0.stop_bit_num;
+}
+
+/**
+ * @brief  Configure the UART parity check mode.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  parity_mode The parity check mode to be set.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_parity(uart_dev_t *hw, uart_parity_t parity_mode)
+{
+    if (parity_mode != UART_PARITY_DISABLE) {
+        hw->conf0.parity = parity_mode & 0x1;
+    }
+    hw->conf0.parity_en = (parity_mode >> 1) & 0x1;
+}
+
+/**
+ * @brief  Get the UART parity check mode configuration.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  parity_mode The pointer to accept the parity check mode configuration.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_get_parity(uart_dev_t *hw, uart_parity_t *parity_mode)
+{
+    if (hw->conf0.parity_en) {
+        *parity_mode = 0X2 | hw->conf0.parity;
+    } else {
+        *parity_mode = UART_PARITY_DISABLE;
+    }
+}
+
+/**
+ * @brief  Set the UART rxfifo full threshold value. When the data in rxfifo is more than the threshold value,
+ *         it will produce rxfifo_full_int_raw interrupt.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  full_thrhd The full threshold value of the rxfifo. `full_thrhd` should be less than `UART_LL_FIFO_DEF_LEN`.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_rxfifo_full_thr(uart_dev_t *hw, uint16_t full_thrhd)
+{
+    hw->conf1.rxfifo_full_thrhd = full_thrhd;
+}
+
+/**
+ * @brief  Set the txfifo empty threshold. when the data length in txfifo is less than threshold value,
+ *         it will produce txfifo_empty_int_raw interrupt.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  empty_thrhd The empty threshold of txfifo.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_txfifo_empty_thr(uart_dev_t *hw, uint16_t empty_thrhd)
+{
+    hw->conf1.txfifo_empty_thrhd = empty_thrhd;
+}
+
+/**
+ * @brief  Set the UART rx-idle threshold value. when receiver takes more time than rx_idle_thrhd to receive a byte data,
+ *         it will produce frame end signal for uhci to stop receiving data.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  rx_idle_thr The rx-idle threshold to be set.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_rx_idle_thr(uart_dev_t *hw, uint32_t rx_idle_thr)
+{
+    hw->idle_conf.rx_idle_thrhd = rx_idle_thr;
+}
+
+/**
+ * @brief  Configure the duration time between transfers.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  idle_num the duration time between transfers.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_tx_idle_num(uart_dev_t *hw, uint32_t idle_num)
+{
+    hw->idle_conf.tx_idle_num = idle_num;
+}
+
+/**
+ * @brief  Configure the transmiter to send break chars.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  break_num The number of the break chars need to be send.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_tx_break(uart_dev_t *hw, uint32_t break_num)
+{
+    if (break_num > 0) {
+        HAL_FORCE_MODIFY_U32_REG_FIELD(hw->txbrk_conf, tx_brk_num, break_num);
+        hw->conf0.txd_brk = 1;
+    } else {
+        hw->conf0.txd_brk = 0;
+    }
+}
+/**
+ * @brief  Configure the UART hardware flow control.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  flow_ctrl The hw flow control configuration.
+ * @param  rx_thrs The rx flow control signal will be active if the data length in rxfifo is more than this value.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_hw_flow_ctrl(uart_dev_t *hw, uart_hw_flowcontrol_t flow_ctrl, uint32_t rx_thrs)
+{
+    //only when UART_HW_FLOWCTRL_RTS is set , will the rx_thresh value be set.
+    if (flow_ctrl & UART_HW_FLOWCTRL_RTS) {
+        hw->mem_conf.rx_flow_thrhd = rx_thrs;
+        hw->conf1.rx_flow_en = 1;
+    } else {
+        hw->conf1.rx_flow_en = 0;
+    }
+    if (flow_ctrl & UART_HW_FLOWCTRL_CTS) {
+        hw->conf0.tx_flow_en = 1;
+    } else {
+        hw->conf0.tx_flow_en = 0;
+    }
+}
+
+/**
+ * @brief  Configure the hardware flow control.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  flow_ctrl A pointer to accept the hw flow control configuration.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_get_hw_flow_ctrl(uart_dev_t *hw, uart_hw_flowcontrol_t *flow_ctrl)
+{
+    *flow_ctrl = UART_HW_FLOWCTRL_DISABLE;
+    if (hw->conf1.rx_flow_en) {
+        *flow_ctrl |= UART_HW_FLOWCTRL_RTS;
+    }
+    if (hw->conf0.tx_flow_en) {
+        *flow_ctrl |= UART_HW_FLOWCTRL_CTS;
+    }
+}
+
+/**
+ * @brief  Configure the software flow control.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  flow_ctrl The UART sofware flow control settings.
+ * @param  sw_flow_ctrl_en Set true to enable software flow control, otherwise set it false.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_sw_flow_ctrl(uart_dev_t *hw, uart_sw_flowctrl_t *flow_ctrl, bool sw_flow_ctrl_en)
+{
+    if (sw_flow_ctrl_en) {
+        hw->flow_conf.xonoff_del = 1;
+        hw->flow_conf.sw_flow_con_en = 1;
+        hw->swfc_conf1.xon_threshold = flow_ctrl->xon_thrd;
+        hw->swfc_conf0.xoff_threshold = flow_ctrl->xoff_thrd;
+        HAL_FORCE_MODIFY_U32_REG_FIELD(hw->swfc_conf1, xon_char, flow_ctrl->xon_char);
+        HAL_FORCE_MODIFY_U32_REG_FIELD(hw->swfc_conf0, xoff_char, flow_ctrl->xoff_char);
+    } else {
+        hw->flow_conf.sw_flow_con_en = 0;
+        hw->flow_conf.xonoff_del = 0;
+    }
+}
+
+/**
+ * @brief  Configure the AT cmd char. When the receiver receives a continuous AT cmd char, it will produce at_cmd_char_det interrupt.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  cmd_char The AT cmd char configuration.The configuration member is:
+ *         - cmd_char The AT cmd character
+ *         - char_num The number of received AT cmd char must be equal to or greater than this value
+ *         - gap_tout The interval between each AT cmd char, when the duration is less than this value, it will not take this data as AT cmd char
+ *         - pre_idle The idle time before the first AT cmd char, when the duration is less than this value, it will not take the previous data as the last AT cmd char
+ *         - post_idle The idle time after the last AT cmd char, when the duration is less than this value, it will not take this data as the first AT cmd char
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_at_cmd_char(uart_dev_t *hw, uart_at_cmd_t *cmd_char)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->at_cmd_char, at_cmd_char, cmd_char->cmd_char);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->at_cmd_char, char_num, cmd_char->char_num);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->at_cmd_postcnt, post_idle_num, cmd_char->post_idle);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->at_cmd_precnt, pre_idle_num, cmd_char->pre_idle);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->at_cmd_gaptout, rx_gap_tout, cmd_char->gap_tout);
+}
+
+/**
+ * @brief  Set the UART data bit mode.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  data_bit The data bit mode to be set.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_data_bit_num(uart_dev_t *hw, uart_word_length_t data_bit)
+{
+    hw->conf0.bit_num = data_bit;
+}
+
+/**
+FORCE_INLINE_ATTR void uart_ll_get_sclk(uart_dev_t *hw, uart_sclk_t *source_clk)
+ * @brief  Set the rts active level.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  level The rts active level, 0 or 1.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_rts_active_level(uart_dev_t *hw, int level)
+{
+    hw->conf0.sw_rts = level & 0x1;
+}
+
+/**
+ * @brief  Set the dtr active level.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  level The dtr active level, 0 or 1.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_dtr_active_level(uart_dev_t *hw, int level)
+{
+    hw->conf0.sw_dtr = level & 0x1;
+}
+
+/**
+ * @brief  Set the UART wakeup threshold.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  wakeup_thrd The wakeup threshold value to be set. When the input rx edge changes more than this value,
+ *         the UART will active from light sleeping mode.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_wakeup_thrd(uart_dev_t *hw, uint32_t wakeup_thrd)
+{
+    hw->sleep_conf.active_threshold = wakeup_thrd - UART_LL_MIN_WAKEUP_THRESH;
+}
+
+/**
+ * @brief  Configure the UART work in normal mode.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_mode_normal(uart_dev_t *hw)
+{
+    hw->rs485_conf.rs485_en = 0;
+    hw->rs485_conf.rs485tx_rx_en= 0;
+    hw->rs485_conf.rs485rxby_tx_en = 0;
+    hw->conf0.irda_en = 0;
+}
+
+/**
+ * @brief  Configure the UART work in rs485_app_ctrl mode.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_mode_rs485_app_ctrl(uart_dev_t *hw)
+{
+    // Application software control, remove echo
+    hw->rs485_conf.rs485rxby_tx_en = 1;
+    hw->conf0.irda_en = 0;
+    hw->conf0.sw_rts = 0;
+    hw->conf0.irda_en = 0;
+    hw->rs485_conf.rs485_en = 1;
+}
+
+/**
+ * @brief  Configure the UART work in rs485_half_duplex mode.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_mode_rs485_half_duplex(uart_dev_t *hw)
+{
+    // Enable receiver, sw_rts = 1  generates low level on RTS pin
+    hw->conf0.sw_rts = 1;
+    // Must be set to 0 to automatically remove echo
+    hw->rs485_conf.rs485tx_rx_en = 0;
+    // This is to void collision
+    hw->rs485_conf.rs485rxby_tx_en = 1;
+    hw->conf0.irda_en = 0;
+    hw->rs485_conf.rs485_en= 1;
+}
+
+/**
+ * @brief  Configure the UART work in collision_detect mode.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_mode_collision_detect(uart_dev_t *hw)
+{
+    hw->conf0.irda_en = 0;
+    // Transmitters output signal loop back to the receivers input signal
+    hw->rs485_conf.rs485tx_rx_en = 1 ;
+    // Transmitter should send data when the receiver is busy
+    hw->rs485_conf.rs485rxby_tx_en = 1;
+    hw->conf0.sw_rts = 0;
+    hw->rs485_conf.rs485_en = 1;
+}
+
+/**
+ * @brief  Configure the UART work in irda mode.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_mode_irda(uart_dev_t *hw)
+{
+    hw->rs485_conf.rs485_en = 0;
+    hw->rs485_conf.rs485tx_rx_en = 0;
+    hw->rs485_conf.rs485rxby_tx_en = 0;
+    hw->conf0.sw_rts = 0;
+    hw->conf0.irda_en = 1;
+}
+
+/**
+ * @brief  Set uart mode.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  mode The UART mode to be set.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_mode(uart_dev_t *hw, uart_mode_t mode)
+{
+    switch (mode) {
+    default:
+    case UART_MODE_UART:
+        uart_ll_set_mode_normal(hw);
+        break;
+    case UART_MODE_RS485_COLLISION_DETECT:
+        uart_ll_set_mode_collision_detect(hw);
+        break;
+    case UART_MODE_RS485_APP_CTRL:
+        uart_ll_set_mode_rs485_app_ctrl(hw);
+        break;
+    case UART_MODE_RS485_HALF_DUPLEX:
+        uart_ll_set_mode_rs485_half_duplex(hw);
+        break;
+    case UART_MODE_IRDA:
+        uart_ll_set_mode_irda(hw);
+        break;
+    }
+}
+
+/**
+ * @brief  Get the UART AT cmd char configuration.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  cmd_char The Pointer to accept value of UART AT cmd char.
+ * @param  char_num Pointer to accept the repeat number of UART AT cmd char.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_get_at_cmd_char(uart_dev_t *hw, uint8_t *cmd_char, uint8_t *char_num)
+{
+    *cmd_char = HAL_FORCE_READ_U32_REG_FIELD(hw->at_cmd_char, at_cmd_char);
+    *char_num = HAL_FORCE_READ_U32_REG_FIELD(hw->at_cmd_char, char_num);
+}
+
+/**
+ * @brief  Get the UART wakeup threshold value.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return The UART wakeup threshold value.
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_wakeup_thrd(uart_dev_t *hw)
+{
+    return hw->sleep_conf.active_threshold + UART_LL_MIN_WAKEUP_THRESH;
+}
+
+/**
+ * @brief  Get the UART data bit configuration.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  data_bit The pointer to accept the UART data bit configuration.
+ *
+ * @return The bit mode.
+ */
+FORCE_INLINE_ATTR void uart_ll_get_data_bit_num(uart_dev_t *hw, uart_word_length_t *data_bit)
+{
+    *data_bit = hw->conf0.bit_num;
+}
+
+/**
+ * @brief  Check if the UART sending state machine is in the IDLE state.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return True if the state machine is in the IDLE state, otherwise false is returned.
+ */
+FORCE_INLINE_ATTR bool uart_ll_is_tx_idle(uart_dev_t *hw)
+{
+    return ((hw->status.txfifo_cnt == 0) && (hw->fsm_status.st_utx_out == 0));
+}
+
+/**
+ * @brief  Check if the UART rts flow control is enabled.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return True if hw rts flow control is enabled, otherwise false is returned.
+ */
+FORCE_INLINE_ATTR bool uart_ll_is_hw_rts_en(uart_dev_t *hw)
+{
+    return hw->conf1.rx_flow_en;
+}
+
+/**
+ * @brief  Check if the UART cts flow control is enabled.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return True if hw cts flow control is enabled, otherwise false is returned.
+ */
+FORCE_INLINE_ATTR bool uart_ll_is_hw_cts_en(uart_dev_t *hw)
+{
+    return hw->conf0.tx_flow_en;
+}
+
+/**
+ * @brief Configure TX signal loop back to RX module, just for the testing purposes
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  loop_back_en Set ture to enable the loop back function, else set it false.
+ *
+ * @return None
+ */
+FORCE_INLINE_ATTR void uart_ll_set_loop_back(uart_dev_t *hw, bool loop_back_en)
+{
+    hw->conf0.loopback = loop_back_en;
+}
+
+/**
+ * @brief  Inverse the UART signal with the given mask.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  inv_mask The UART signal bitmap needs to be inversed.
+ *         Use the ORred mask of `uart_signal_inv_t`;
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_inverse_signal(uart_dev_t *hw, uint32_t inv_mask)
+{
+    uart_conf0_reg_t conf0_reg = hw->conf0;
+    conf0_reg.irda_tx_inv = (inv_mask & UART_SIGNAL_IRDA_TX_INV) ? 1 : 0;
+    conf0_reg.irda_rx_inv = (inv_mask & UART_SIGNAL_IRDA_RX_INV) ? 1 : 0;
+    conf0_reg.rxd_inv = (inv_mask & UART_SIGNAL_RXD_INV) ? 1 : 0;
+    conf0_reg.cts_inv = (inv_mask & UART_SIGNAL_CTS_INV) ? 1 : 0;
+    conf0_reg.dsr_inv = (inv_mask & UART_SIGNAL_DSR_INV) ? 1 : 0;
+    conf0_reg.txd_inv = (inv_mask & UART_SIGNAL_TXD_INV) ? 1 : 0;
+    conf0_reg.rts_inv = (inv_mask & UART_SIGNAL_RTS_INV) ? 1 : 0;
+    conf0_reg.dtr_inv = (inv_mask & UART_SIGNAL_DTR_INV) ? 1 : 0;
+    hw->conf0.val = conf0_reg.val;
+}
+
+/**
+ * @brief  Configure the timeout value for receiver receiving a byte, and enable rx timeout function.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  tout_thrd The timeout value as UART bit time. The rx timeout function will be disabled if `tout_thrd == 0`.
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_rx_tout(uart_dev_t *hw, uint16_t tout_thrd)
+{
+    uint16_t tout_val = tout_thrd;
+    if(tout_thrd > 0) {
+        hw->mem_conf.rx_tout_thrhd = tout_val;
+        hw->conf1.rx_tout_en = 1;
+    } else {
+        hw->conf1.rx_tout_en = 0;
+    }
+}
+
+/**
+ * @brief  Get the timeout value for receiver receiving a byte.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return tout_thr The timeout threshold value. If timeout feature is disabled returns 0.
+ */
+FORCE_INLINE_ATTR uint16_t uart_ll_get_rx_tout_thr(uart_dev_t *hw)
+{
+    uint16_t tout_thrd = 0;
+    if(hw->conf1.rx_tout_en > 0) {
+        tout_thrd = hw->mem_conf.rx_tout_thrhd;
+    }
+    return tout_thrd;
+}
+
+/**
+ * @brief  Get UART maximum timeout threshold.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return maximum timeout threshold.
+ */
+FORCE_INLINE_ATTR uint16_t uart_ll_max_tout_thrd(uart_dev_t *hw)
+{
+    return UART_RX_TOUT_THRHD_V;
+}
+
+/**
+ * @brief  Configure the auto baudrate.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  enable Boolean marking whether the auto baudrate should be enabled or not.
+ */
+FORCE_INLINE_ATTR void uart_ll_set_autobaud_en(uart_dev_t *hw, bool enable)
+{
+    hw->conf0.autobaud_en = enable ? 1 : 0;
+}
+
+/**
+ * @brief  Get the RXD edge count.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_rxd_edge_cnt(uart_dev_t *hw)
+{
+    return hw->rxd_cnt.rxd_edge_cnt;
+}
+
+/**
+ * @brief  Get the positive pulse minimum count.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_pos_pulse_cnt(uart_dev_t *hw)
+{
+    return hw->pospulse.posedge_min_cnt;
+}
+
+/**
+ * @brief  Get the negative pulse minimum count.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_neg_pulse_cnt(uart_dev_t *hw)
+{
+    return hw->negpulse.negedge_min_cnt;
+}
+
+/**
+ * @brief  Get the high pulse minimum count.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_high_pulse_cnt(uart_dev_t *hw)
+{
+    return hw->highpulse.highpulse_min_cnt;
+}
+
+/**
+ * @brief  Get the low pulse minimum count.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_low_pulse_cnt(uart_dev_t *hw)
+{
+    return hw->lowpulse.lowpulse_min_cnt;
+}
+
+/**
+ * @brief  Force UART xoff.
+ *
+ * @param  uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ *
+ * @return None.
+ */
+static inline void uart_ll_force_xoff(uart_port_t uart_num)
+{
+    REG_CLR_BIT(UART_FLOW_CONF_REG(uart_num), UART_FORCE_XON);
+    REG_SET_BIT(UART_FLOW_CONF_REG(uart_num), UART_SW_FLOW_CON_EN | UART_FORCE_XOFF);
+}
+
+/**
+ * @brief  Force UART xon.
+ *
+ * @param  uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ *
+ * @return None.
+ */
+FORCE_INLINE_ATTR void uart_ll_force_xon(uart_port_t uart_num)
+{
+    REG_CLR_BIT(UART_FLOW_CONF_REG(uart_num), UART_FORCE_XOFF);
+    REG_SET_BIT(UART_FLOW_CONF_REG(uart_num), UART_FORCE_XON);
+    REG_CLR_BIT(UART_FLOW_CONF_REG(uart_num), UART_SW_FLOW_CON_EN | UART_FORCE_XON);
+}
+
+/**
+ * @brief  Get UART finite-state machine status.
+ *
+ * @param  uart_num UART port number, the max port number is (UART_NUM_MAX -1).
+ *
+ * @return UART module FSM status.
+ */
+FORCE_INLINE_ATTR uint32_t uart_ll_get_fsm_status(uart_port_t uart_num)
+{
+    return REG_GET_FIELD(UART_FSM_STATUS_REG(uart_num), UART_ST_UTX_OUT);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/uhci_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/uhci_ll.h
new file mode 100644
index 00000000000..0ea44408532
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/uhci_ll.h
@@ -0,0 +1,139 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// The LL layer for UHCI register operations.
+// Note that most of the register operations in this layer are non-atomic operations.
+
+
+#pragma once
+#include <stdio.h>
+#include "hal/uhci_types.h"
+#include "soc/uhci_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define UHCI_LL_GET_HW(num) (((num) == 0) ? (&UHCI0) : (NULL))
+
+typedef enum {
+    UHCI_RX_BREAK_CHR_EOF = 0x1,
+    UHCI_RX_IDLE_EOF      = 0x2,
+    UHCI_RX_LEN_EOF       = 0x4,
+    UHCI_RX_EOF_MAX       = 0x7,
+} uhci_rxeof_cfg_t;
+
+static inline void uhci_ll_init(uhci_dev_t *hw)
+{
+    typeof(hw->conf0) conf0_reg;
+    hw->conf0.clk_en = 1;
+    conf0_reg.val = 0;
+    conf0_reg.clk_en = 1;
+    hw->conf0.val = conf0_reg.val;
+    hw->conf1.val = 0;
+}
+
+static inline void uhci_ll_attach_uart_port(uhci_dev_t *hw, int uart_num)
+{
+    hw->conf0.uart0_ce = (uart_num == 0)? 1: 0;
+    hw->conf0.uart1_ce = (uart_num == 1)? 1: 0;
+    hw->conf0.uart2_ce = (uart_num == 2)? 1: 0;
+}
+
+static inline void uhci_ll_set_seper_chr(uhci_dev_t *hw, uhci_seper_chr_t *seper_char)
+{
+    if (seper_char->sub_chr_en) {
+        typeof(hw->esc_conf0) esc_conf0_reg = hw->esc_conf0;
+        esc_conf0_reg.seper_char = seper_char->seper_chr;
+        esc_conf0_reg.seper_esc_char0 = seper_char->sub_chr1;
+        esc_conf0_reg.seper_esc_char1 = seper_char->sub_chr2;
+        hw->esc_conf0.val = esc_conf0_reg.val;
+        hw->escape_conf.tx_c0_esc_en = 1;
+        hw->escape_conf.rx_c0_esc_en = 1;
+    } else {
+        hw->escape_conf.tx_c0_esc_en = 0;
+        hw->escape_conf.rx_c0_esc_en = 0;
+    }
+}
+
+static inline void uhci_ll_get_seper_chr(uhci_dev_t *hw, uhci_seper_chr_t *seper_chr)
+{
+    (void)hw;
+    (void)seper_chr;
+}
+
+static inline void uhci_ll_set_swflow_ctrl_sub_chr(uhci_dev_t *hw, uhci_swflow_ctrl_sub_chr_t *sub_ctr)
+{
+    typeof(hw->escape_conf) escape_conf_reg = hw->escape_conf;
+    if (sub_ctr->flow_en == 1) {
+        typeof(hw->esc_conf2) esc_conf2_reg = hw->esc_conf2;
+        typeof(hw->esc_conf3) esc_conf3_reg = hw->esc_conf3;
+        esc_conf2_reg.seq1 = sub_ctr->xon_chr;
+        esc_conf2_reg.seq1_char0 = sub_ctr->xon_sub1;
+        esc_conf2_reg.seq1_char1 = sub_ctr->xon_sub2;
+        esc_conf3_reg.seq2 = sub_ctr->xoff_chr;
+        esc_conf3_reg.seq2_char0 = sub_ctr->xoff_sub1;
+        esc_conf3_reg.seq2_char1 = sub_ctr->xoff_sub2;
+        escape_conf_reg.tx_11_esc_en = 1;
+        escape_conf_reg.tx_13_esc_en = 1;
+        escape_conf_reg.rx_11_esc_en = 1;
+        escape_conf_reg.rx_13_esc_en = 1;
+        hw->esc_conf2.val = esc_conf2_reg.val;
+        hw->esc_conf3.val = esc_conf3_reg.val;
+    } else {
+        escape_conf_reg.tx_11_esc_en = 0;
+        escape_conf_reg.tx_13_esc_en = 0;
+        escape_conf_reg.rx_11_esc_en = 0;
+        escape_conf_reg.rx_13_esc_en = 0;
+    }
+    hw->escape_conf.val = escape_conf_reg.val;
+}
+
+static inline void uhci_ll_enable_intr(uhci_dev_t *hw, uint32_t intr_mask)
+{
+    hw->int_ena.val |= intr_mask;
+}
+
+static inline void uhci_ll_disable_intr(uhci_dev_t *hw, uint32_t intr_mask)
+{
+    hw->int_ena.val &= (~intr_mask);
+}
+
+static inline void uhci_ll_clear_intr(uhci_dev_t *hw, uint32_t intr_mask)
+{
+    hw->int_clr.val = intr_mask;
+}
+
+static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw)
+{
+    return hw->int_st.val;
+}
+
+
+static inline void uhci_ll_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode)
+{
+    if (eof_mode & UHCI_RX_BREAK_CHR_EOF) {
+        hw->conf0.uart_rx_brk_eof_en = 1;
+    }
+    if (eof_mode & UHCI_RX_IDLE_EOF) {
+        hw->conf0.uart_idle_eof_en = 1;
+    }
+    if (eof_mode & UHCI_RX_LEN_EOF) {
+        hw->conf0.len_eof_en = 1;
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/usb_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/usb_ll.h
new file mode 100644
index 00000000000..81950021d28
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/usb_ll.h
@@ -0,0 +1,53 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#include "soc/soc.h"
+#include "soc/system_reg.h"
+#include "soc/gpio_sig_map.h"
+#include "soc/usb_periph.h"
+#include "soc/rtc_cntl_struct.h"
+
+static inline void usb_ll_int_phy_enable(void)
+{
+    USB_WRAP.otg_conf.pad_enable = 1;
+    // USB_OTG use internal PHY
+    USB_WRAP.otg_conf.phy_sel = 0;
+    // phy_sel is controlled by the following register value
+    RTCCNTL.usb_conf.sw_hw_usb_phy_sel = 1;
+    // phy_sel=sw_usb_phy_sel=1, USB_OTG is connected with internal PHY
+    RTCCNTL.usb_conf.sw_usb_phy_sel = 1;
+}
+
+static inline void usb_ll_ext_phy_enable(void)
+{
+    USB_WRAP.otg_conf.pad_enable = 1;
+    // USB_OTG use external PHY
+    USB_WRAP.otg_conf.phy_sel = 1;
+    // phy_sel is controlled by the following register value
+    RTCCNTL.usb_conf.sw_hw_usb_phy_sel = 1;
+    // phy_sel=sw_usb_phy_sel=0, USB_OTG is connected with external PHY through GPIO Matrix
+    RTCCNTL.usb_conf.sw_usb_phy_sel = 0;
+}
+
+static inline void usb_ll_int_phy_pullup_conf(bool dp_pu, bool dp_pd, bool dm_pu, bool dm_pd)
+{
+    usb_wrap_otg_conf_reg_t conf = USB_WRAP.otg_conf;
+    conf.pad_pull_override = 1;
+    conf.dp_pullup = dp_pu;
+    conf.dp_pulldown = dp_pd;
+    conf.dm_pullup = dm_pu;
+    conf.dm_pulldown = dm_pd;
+    USB_WRAP.otg_conf = conf;
+}
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/usb_phy_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/usb_phy_ll.h
new file mode 100644
index 00000000000..fc665552d86
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/usb_phy_ll.h
@@ -0,0 +1,127 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include "soc/soc.h"
+#include "soc/system_reg.h"
+#include "soc/usb_wrap_struct.h"
+#include "soc/rtc_cntl_struct.h"
+#include "soc/usb_serial_jtag_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configures the internal PHY for USB_OTG
+ *
+ * @param hw Start address of the USB Wrap registers
+ */
+static inline void usb_phy_ll_int_otg_enable(usb_wrap_dev_t *hw)
+{
+    hw->otg_conf.pad_enable = 1;
+    // USB_OTG use internal PHY
+    hw->otg_conf.phy_sel = 0;
+    // phy_sel is controlled by the following register value
+    RTCCNTL.usb_conf.sw_hw_usb_phy_sel = 1;
+    // phy_sel=sw_usb_phy_sel=1, USB_OTG is connected with internal PHY
+    RTCCNTL.usb_conf.sw_usb_phy_sel = 1;
+}
+
+/**
+ * @brief Configures the external PHY for USB_OTG
+ *
+ * @param hw Start address of the USB Wrap registers
+ */
+static inline void usb_phy_ll_ext_otg_enable(usb_wrap_dev_t *hw)
+{
+    // USB_OTG use external PHY
+    hw->otg_conf.phy_sel = 1;
+    // phy_sel is controlled by the following register value
+    RTCCNTL.usb_conf.sw_hw_usb_phy_sel = 1;
+    // phy_sel=sw_usb_phy_sel=0, USB_OTG is connected with external PHY through GPIO Matrix
+    RTCCNTL.usb_conf.sw_usb_phy_sel = 0;
+}
+
+/**
+ * @brief Configures the internal PHY for USB_Serial_JTAG
+ *
+ * @param hw Start address of the USB Serial_JTAG registers
+ */
+static inline void usb_phy_ll_int_jtag_enable(usb_serial_jtag_dev_t *hw)
+{
+    // USB_Serial_JTAG use internal PHY
+    hw->conf0.phy_sel = 0;
+    // Disable software control USB D+ D- pullup pulldown (Device FS: dp_pullup = 1)
+    hw->conf0.pad_pull_override = 0;
+    // Enable USB pad function
+    hw->conf0.usb_pad_enable = 1;
+    // phy_sel is controlled by the following register value
+    RTCCNTL.usb_conf.sw_hw_usb_phy_sel = 1;
+    // phy_sel=sw_usb_phy_sel=0, USB_Serial_JTAG is connected with internal PHY
+    RTCCNTL.usb_conf.sw_usb_phy_sel = 0;
+}
+
+/**
+ * @brief Configures the external PHY for USB_Serial_JTAG
+ *
+ * @param hw Start address of the USB Serial_JTAG registers
+ */
+static inline void usb_phy_ll_ext_jtag_enable(usb_serial_jtag_dev_t *hw)
+{
+    // USB_Serial_JTAG use external PHY
+    hw->conf0.phy_sel = 1;
+    // phy_sel is controlled by the following register value
+    RTCCNTL.usb_conf.sw_hw_usb_phy_sel = 1;
+    // phy_sel=sw_usb_phy_sel=1, USB_Serial_JTAG is connected with external PHY
+    RTCCNTL.usb_conf.sw_usb_phy_sel = 1;
+}
+
+/**
+ * @brief Configures port loads for the internal PHY
+ *
+ * @param hw Start address of the USB Wrap registers
+ * @param dp_pu D+ pullup load
+ * @param dp_pd D+ pulldown load
+ * @param dm_pu D- pullup load
+ * @param dm_pd D- pulldown load
+ */
+static inline void usb_phy_ll_int_load_conf(usb_wrap_dev_t *hw, bool dp_pu, bool dp_pd, bool dm_pu, bool dm_pd)
+{
+    usb_wrap_otg_conf_reg_t conf = hw->otg_conf;
+    conf.pad_pull_override = 1;
+    conf.dp_pullup = dp_pu;
+    conf.dp_pulldown = dp_pd;
+    conf.dm_pullup = dm_pu;
+    conf.dm_pulldown = dm_pd;
+    hw->otg_conf = conf;
+}
+
+/**
+ * @brief Enable the internal PHY's test mode
+ *
+ * @param hw Start address of the USB Wrap registers
+ * @param en Whether to enable the internal PHY's test mode
+ */
+static inline void usb_phy_ll_int_enable_test_mode(usb_wrap_dev_t *hw, bool en)
+{
+    if (en) {
+        // Clear USB_WRAP_TEST_CONF_REG
+        hw->test_conf.val = 0;
+        // Set USB test pad oen
+        hw->test_conf.test_usb_wrap_oe = 1;
+        // Enable USB test mode
+        hw->test_conf.test_enable = 1;
+    } else {
+        hw->test_conf.test_enable = 0;
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/usb_serial_jtag_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/usb_serial_jtag_ll.h
new file mode 100644
index 00000000000..335663ff12c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/usb_serial_jtag_ll.h
@@ -0,0 +1,169 @@
+// Copyright 2021 Espressif Systems (Shanghai)
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// The LL layer of the USB-serial-jtag controller
+
+#pragma once
+#include "soc/usb_serial_jtag_reg.h"
+#include "soc/usb_serial_jtag_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//The in and out endpoints are this long.
+#define USB_SERIAL_JTAG_PACKET_SZ_BYTES 64
+
+#define USB_SERIAL_JTAG_LL_INTR_MASK         (0x7ffff) //All interrupt mask
+
+// Define USB_SERIAL_JTAG interrupts
+// Note the hardware has more interrupts, but they're only useful for debugging
+// the hardware.
+typedef enum {
+    USB_SERIAL_JTAG_INTR_SOF                    = (1 << 1),
+    USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT    = (1 << 2),
+    USB_SERIAL_JTAG_INTR_SERIAL_IN_EMPTY        = (1 << 3),
+    USB_SERIAL_JTAG_INTR_TOKEN_REC_IN_EP1       = (1 << 8),
+    USB_SERIAL_JTAG_INTR_BUS_RESET              = (1 << 9),
+    USB_SERIAL_JTAG_INTR_EP1_ZERO_PAYLOAD       = (1 << 10),
+} usb_serial_jtag_intr_t;
+
+/**
+ * @brief  Enable the USB_SERIAL_JTAG interrupt based on the given mask.
+ *
+ * @param  mask The bitmap of the interrupts need to be enabled.
+ *
+ * @return None
+ */
+static inline void usb_serial_jtag_ll_ena_intr_mask(uint32_t mask)
+{
+    USB_SERIAL_JTAG.int_ena.val |= mask;
+}
+
+/**
+ * @brief  Disable the USB_SERIAL_JTAG interrupt based on the given mask.
+ *
+ * @param  mask The bitmap of the interrupts need to be disabled.
+ *
+ * @return None
+ */
+static inline void usb_serial_jtag_ll_disable_intr_mask(uint32_t mask)
+{
+    USB_SERIAL_JTAG.int_ena.val &= (~mask);
+}
+
+/**
+ * @brief  Get the USB_SERIAL_JTAG interrupt status.
+ *
+ * @return The USB_SERIAL_JTAG interrupt status.
+ */
+static inline uint32_t usb_serial_jtag_ll_get_intsts_mask(void)
+{
+    return USB_SERIAL_JTAG.int_st.val;
+}
+
+/**
+ * @brief  Clear the USB_SERIAL_JTAG interrupt status based on the given mask.
+ *
+ * @param  mask The bitmap of the interrupts need to be cleared.
+ *
+ * @return None
+ */
+static inline void usb_serial_jtag_ll_clr_intsts_mask(uint32_t mask)
+{
+    USB_SERIAL_JTAG.int_clr.val = mask;
+}
+
+/**
+ * @brief  Get status of enabled interrupt.
+ *
+ * @return interrupt enable value
+ */
+static inline uint32_t usb_serial_jtag_ll_get_intr_ena_status(void)
+{
+    return USB_SERIAL_JTAG.int_ena.val;
+}
+
+/**
+ * @brief  Read the bytes from the USB_SERIAL_JTAG rxfifo.
+ *
+ * @param  buf The data buffer.
+ * @param  rd_len The data length needs to be read.
+ *
+ * @return amount of bytes read
+ */
+static inline uint32_t usb_serial_jtag_ll_read_rxfifo(uint8_t *buf, uint32_t rd_len)
+{
+    uint32_t i;
+    for (i = 0; i < rd_len; i++) {
+        if (!USB_SERIAL_JTAG.ep1_conf.serial_out_ep_data_avail) break;
+        buf[i] = USB_SERIAL_JTAG.ep1.rdwr_byte;
+    }
+    return i;
+}
+
+/**
+ * @brief  Write byte to the USB_SERIAL_JTAG txfifo. Only writes bytes as long / if there
+ *         is room in the buffer.
+ *
+ * @param  buf The data buffer.
+ * @param  wr_len The data length needs to be writen.
+ *
+ * @return Amount of bytes actually written. May be less than wr_len.
+ */
+static inline uint32_t usb_serial_jtag_ll_write_txfifo(const uint8_t *buf, uint32_t wr_len)
+{
+    uint32_t i;
+    for (i = 0; i < wr_len; i++) {
+        if (!USB_SERIAL_JTAG.ep1_conf.serial_in_ep_data_free) break;
+        USB_SERIAL_JTAG.ep1.rdwr_byte = buf[i];
+    }
+    return i;
+}
+
+/**
+ * @brief  Returns 1 if the USB_SERIAL_JTAG rxfifo has data available.
+ *
+ * @return 0 if no data available, 1 if data available
+ */
+static inline int usb_serial_jtag_ll_rxfifo_data_available(void)
+{
+    return USB_SERIAL_JTAG.ep1_conf.serial_out_ep_data_avail;
+}
+
+/**
+ * @brief  Returns 1 if the USB_SERIAL_JTAG txfifo has room.
+ *
+ * @return 0 if no data available, 1 if data available
+ */
+static inline int usb_serial_jtag_ll_txfifo_writable(void)
+{
+    return USB_SERIAL_JTAG.ep1_conf.serial_in_ep_data_free;
+}
+
+/**
+ * @brief  Flushes the TX buffer, that is, make it available for the
+ *         host to pick up.
+ *
+ * @return na
+ */
+static inline void usb_serial_jtag_ll_txfifo_flush(void)
+{
+    USB_SERIAL_JTAG.ep1_conf.wr_done=1;
+}
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/xt_wdt_ll.h b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/xt_wdt_ll.h
new file mode 100644
index 00000000000..65b36253e58
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/esp32s3/include/hal/xt_wdt_ll.h
@@ -0,0 +1,101 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// The LL layer for xtal32k WDT register operations.
+// Note that most of the register operations in this layer are non-atomic operations.
+
+#pragma once
+
+#include <stdbool.h>
+#include "soc/rtc_cntl_periph.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define XT_WDT_LL_XTAL32_DEAD_INTR_MASK RTC_CNTL_XTAL32K_DEAD_INT_ST_M
+
+/**
+ * @brief Enable the XT_WDT
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+inline void xt_wdt_ll_enable(rtc_cntl_dev_t *hw, bool enable)
+{
+    hw->ext_xtl_conf.xtal32k_wdt_en = enable;
+}
+
+/**
+ * @brief Check if the XT_WDT is enabled
+ *
+ * @param hw Start address of the peripheral registers.
+ * @return True if XT WDT is enabled
+ */
+inline bool xt_wdt_ll_check_if_enabled(rtc_cntl_dev_t *hw)
+{
+    return (hw->ext_xtl_conf.xtal32k_wdt_en) ? true : false;
+}
+
+/**
+ * @brief Set the watchdog timeout value
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param timeout timeout value in RTC_CLK cycles
+ */
+inline void xt_wdt_ll_set_timeout(rtc_cntl_dev_t *hw, uint8_t timeout)
+{
+    hw->xtal32k_conf.xtal32k_wdt_timeout = timeout;
+}
+
+
+/**
+ * @brief Reset the XT_WDT
+ *
+ * @param hw Start address of the peripheral registers.
+ */
+inline void xt_wdt_ll_reset(rtc_cntl_dev_t *hw)
+{
+    hw->ext_xtl_conf.xtal32k_wdt_reset = 1;
+    hw->ext_xtl_conf.xtal32k_wdt_reset = 0;
+}
+
+
+/**
+ * @brief Set the backup clock value
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param backup_clk_val Backup clock value, see TRM for definition
+ */
+inline void xt_wdt_ll_set_backup_clk_factor(rtc_cntl_dev_t *hw, uint32_t backup_clk_val)
+{
+    hw->xtal32k_clk_factor = backup_clk_val;
+}
+
+/**
+ * @brief Enable the auto-backup clock feature
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param enable True - enable, False - disable
+ */
+inline void xt_wdt_ll_auto_backup_enable(rtc_cntl_dev_t *hw, bool enable)
+{
+    hw->ext_xtl_conf.xtal32k_auto_backup = enable;
+}
+
+/**
+ * @brief Enable the timeout interrupt
+ *
+ * @param hw Start address of the peripheral registers.
+ * @param enable True - enable, False - disable
+ */
+inline void xt_wdt_ll_intr_enable(rtc_cntl_dev_t *hw, bool enable)
+{
+    hw->int_ena.rtc_xtal32k_dead = enable;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/adc_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/adc_hal.h
new file mode 100644
index 00000000000..b8455e27ecd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/adc_hal.h
@@ -0,0 +1,384 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_err.h"
+#include "soc/soc_caps.h"
+#include "hal/dma_types.h"
+#include "hal/adc_types.h"
+#include "hal/adc_ll.h"
+#include "esp_err.h"
+
+#if SOC_GDMA_SUPPORTED
+#include "soc/gdma_struct.h"
+#include "hal/gdma_ll.h"
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32S2
+//ADC utilises SPI3 DMA on ESP32S2
+#include "hal/spi_ll.h"
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32
+//ADC utilises I2S0 DMA on ESP32
+#include "hal/i2s_ll.h"
+#endif
+
+#if SOC_GDMA_SUPPORTED
+#define ADC_HAL_DMA_INTR_MASK                           GDMA_LL_EVENT_RX_SUC_EOF
+#elif CONFIG_IDF_TARGET_ESP32S2
+#define ADC_HAL_DMA_INTR_MASK                           SPI_LL_INTR_IN_SUC_EOF
+#else //CONFIG_IDF_TARGET_ESP32
+#define ADC_HAL_DMA_INTR_MASK                           BIT(9)
+#endif
+
+//For ADC module, each conversion contains 4 bytes
+#define ADC_HAL_DATA_LEN_PER_CONV 4
+
+typedef enum adc_hal_work_mode_t {
+    ADC_HAL_ULP_MODE,
+    ADC_HAL_SINGLE_READ_MODE,
+    ADC_HAL_CONTINUOUS_READ_MODE,
+    ADC_HAL_PWDET_MODE
+} adc_hal_work_mode_t;
+
+/**
+ * @brief Enum for DMA descriptor status
+ */
+typedef enum adc_hal_dma_desc_status_t {
+    ADC_HAL_DMA_DESC_VALID   = 0,            ///< This DMA descriptor is written by HW already
+    ADC_HAL_DMA_DESC_WAITING = 1,            ///< This DMA descriptor is not written by HW yet
+    ADC_HAL_DMA_DESC_NULL    = 2             ///< This DMA descriptor is NULL
+} adc_hal_dma_desc_status_t;
+
+/**
+ * @brief Configuration of the HAL
+ */
+typedef struct adc_hal_config_t {
+    void                *dev;               ///< DMA peripheral address
+    uint32_t            desc_max_num;       ///< Number of the descriptors linked once
+    uint32_t            dma_chan;           ///< DMA channel to be used
+    uint32_t            eof_num;            ///< Bytes between 2 in_suc_eof interrupts
+} adc_hal_config_t;
+
+/**
+ * @brief Context of the HAL
+ */
+typedef struct adc_hal_context_t {
+    /**< this needs to be malloced by the driver layer first */
+    dma_descriptor_t    *rx_desc;           ///< DMA descriptors
+
+    /**< these will be assigned by hal layer itself */
+    dma_descriptor_t    desc_dummy_head;    ///< Dummy DMA descriptor for ``cur_desc_ptr`` to start
+    dma_descriptor_t    *cur_desc_ptr;      ///< Pointer to the current descriptor
+
+    /**< these need to be configured by `adc_hal_config_t` via driver layer*/
+    void                *dev;               ///< DMA address
+    uint32_t            desc_max_num;       ///< Number of the descriptors linked once
+    uint32_t            dma_chan;           ///< DMA channel to be used
+    uint32_t            eof_num;            ///< Words between 2 in_suc_eof interrupts
+} adc_hal_context_t;
+
+typedef struct adc_hal_digi_ctrlr_cfg_t {
+    bool                        conv_limit_en;      //1: adc conversion will stop when `conv_limit_num` reaches. 0: won't stop. NOTE: esp32 should always be set to 1.
+    uint32_t                    conv_limit_num;     //see `conv_limit_en`
+    uint32_t                    adc_pattern_len;    //total pattern item number, including ADC1 and ADC2
+    adc_digi_pattern_config_t   *adc_pattern;       //pattern item
+    uint32_t                    sample_freq_hz;     //ADC sample frequency
+    adc_digi_convert_mode_t     conv_mode;          //controller work mode
+    uint32_t                    bit_width;          //output data width
+} adc_hal_digi_ctrlr_cfg_t;
+
+
+/*---------------------------------------------------------------
+                    Common setting
+---------------------------------------------------------------*/
+/**
+ * Set ADC module power management.
+ *
+ * @prarm manage Set ADC power status.
+ */
+#define adc_hal_set_power_manage(manage) adc_ll_set_power_manage(manage)
+
+void adc_hal_set_controller(adc_ll_num_t unit, adc_hal_work_mode_t work_mode);
+
+#if SOC_ADC_ARBITER_SUPPORTED
+//No ADC2 controller arbiter on ESP32
+/**
+ * Config ADC2 module arbiter.
+ * The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,
+ * the low priority controller will read the invalid ADC2 data, and the validity of the data can be judged by the flag bit in the data.
+ *
+ * @note Only ADC2 support arbiter.
+ * @note The arbiter's working clock is APB_CLK. When the APB_CLK clock drops below 8 MHz, the arbiter must be in shield mode.
+ * @note Default priority: Wi-Fi > RTC > Digital;
+ *
+ * @param config Refer to ``adc_arbiter_t``.
+ */
+void adc_hal_arbiter_config(adc_arbiter_t *config);
+#endif  //#if SOC_ADC_ARBITER_SUPPORTED
+
+/*---------------------------------------------------------------
+                    PWDET(Power detect) controller setting
+---------------------------------------------------------------*/
+/**
+ * Set adc cct for PWDET controller.
+ *
+ * @note Capacitor tuning of the PA power monitor. cct set to the same value with PHY.
+ * @prarm cct Range: 0 ~ 7.
+ */
+#define adc_hal_pwdet_set_cct(cct) adc_ll_pwdet_set_cct(cct)
+
+/**
+ * Get adc cct for PWDET controller.
+ *
+ * @note Capacitor tuning of the PA power monitor. cct set to the same value with PHY.
+ * @return cct Range: 0 ~ 7.
+ */
+#define adc_hal_pwdet_get_cct() adc_ll_pwdet_get_cct()
+
+/**
+ *  Enable/disable the output of ADCn's internal reference voltage to one of ADC2's channels.
+ *
+ *  This function routes the internal reference voltage of ADCn to one of
+ *  ADC2's channels. This reference voltage can then be manually measured
+ *  for calibration purposes.
+ *
+ *  @note  ESP32 only supports output of ADC2's internal reference voltage.
+ *  @param[in]  adc ADC unit select
+ *  @param[in]  channel ADC2 channel number
+ *  @param[in]  en Enable/disable the reference voltage output
+ */
+#define adc_hal_vref_output(adc, channel, en) adc_ll_vref_output(adc, channel, en)
+
+/*---------------------------------------------------------------
+                    Digital controller setting
+---------------------------------------------------------------*/
+/**
+ * ADC module initialization.
+ */
+void adc_hal_init(void);
+
+/**
+ * Digital controller deinitialization.
+ *
+ * @param hal Context of the HAL
+ */
+void adc_hal_digi_deinit(adc_hal_context_t *hal);
+
+/**
+ * @brief Initialize the hal context
+ *
+ * @param hal    Context of the HAL
+ * @param config Configuration of the HAL
+ */
+void adc_hal_context_config(adc_hal_context_t *hal, const adc_hal_config_t *config);
+
+/**
+ * @brief Initialize the HW
+ *
+ * @param hal Context of the HAL
+ */
+void adc_hal_digi_init(adc_hal_context_t *hal);
+
+/**
+ * Setting the digital controller.
+ *
+ * @param hal    Context of the HAL
+ * @param cfg    Pointer to digital controller paramter.
+ */
+void adc_hal_digi_controller_config(adc_hal_context_t *hal, const adc_hal_digi_ctrlr_cfg_t *cfg);
+
+/**
+ * @brief Start Conversion
+ *
+ * @param hal Context of the HAL
+ * @param data_buf Pointer to the data buffer, the length should be multiple of ``desc_max_num`` and ``eof_num`` in ``adc_hal_context_t``
+ */
+void adc_hal_digi_start(adc_hal_context_t *hal, uint8_t *data_buf);
+
+#if !SOC_GDMA_SUPPORTED
+/**
+ * @brief Get the DMA descriptor that Hardware has finished processing.
+ *
+ * @param hal Context of the HAL
+ *
+ * @return DMA descriptor address
+ */
+intptr_t adc_hal_get_desc_addr(adc_hal_context_t *hal);
+
+/**
+ * @brief Check the hardware interrupt event
+ *
+ * @param hal Context of the HAL
+ * @param mask Event mask
+ *
+ * @return True: the event is triggered. False: the event is not triggered yet.
+ */
+bool adc_hal_check_event(adc_hal_context_t *hal, uint32_t mask);
+#endif
+
+/**
+ * @brief Get the ADC reading result
+ *
+ * @param      hal           Context of the HAL
+ * @param      eof_desc_addr The last descriptor that is finished by HW. Should be got from DMA
+ * @param[out] cur_desc      The descriptor with ADC reading result (from the 1st one to the last one (``eof_desc_addr``))
+ *
+ * @return                   See ``adc_hal_dma_desc_status_t``
+ */
+adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_context_t *hal, const intptr_t eof_desc_addr, dma_descriptor_t **cur_desc);
+
+/**
+ * @brief Clear interrupt
+ *
+ * @param hal  Context of the HAL
+ * @param mask mask of the interrupt
+ */
+void adc_hal_digi_clr_intr(adc_hal_context_t *hal, uint32_t mask);
+
+/**
+ * @brief Enable interrupt
+ *
+ * @param hal  Context of the HAL
+ * @param mask mask of the interrupt
+ */
+void adc_hal_digi_dis_intr(adc_hal_context_t *hal, uint32_t mask);
+
+/**
+ * @brief Stop conversion
+ *
+ * @param hal Context of the HAL
+ */
+void adc_hal_digi_stop(adc_hal_context_t *hal);
+
+
+/*---------------------------------------------------------------
+                    ADC Single Read
+---------------------------------------------------------------*/
+#if SOC_ADC_RTC_CTRL_SUPPORTED
+/**
+ * Set the attenuation of a particular channel on ADCn.
+ *
+ * @note For any given channel, this function must be called before the first time conversion.
+ *
+ * The default ADC full-scale voltage is 1.1V. To read higher voltages (up to the pin maximum voltage,
+ * usually 3.3V) requires setting >0dB signal attenuation for that ADC channel.
+ *
+ * When VDD_A is 3.3V:
+ *
+ * - 0dB attenuaton (ADC_ATTEN_DB_0) gives full-scale voltage 1.1V
+ * - 2.5dB attenuation (ADC_ATTEN_DB_2_5) gives full-scale voltage 1.5V
+ * - 6dB attenuation (ADC_ATTEN_DB_6) gives full-scale voltage 2.2V
+ * - 11dB attenuation (ADC_ATTEN_DB_11) gives full-scale voltage 3.9V (see note below)
+ *
+ * @note The full-scale voltage is the voltage corresponding to a maximum reading (depending on ADC1 configured
+ * bit width, this value is: 4095 for 12-bits, 2047 for 11-bits, 1023 for 10-bits, 511 for 9 bits.)
+ *
+ * @note At 11dB attenuation the maximum voltage is limited by VDD_A, not the full scale voltage.
+ *
+ * Due to ADC characteristics, most accurate results are obtained within the following approximate voltage ranges:
+ *
+ * - 0dB attenuaton (ADC_ATTEN_DB_0) between 100 and 950mV
+ * - 2.5dB attenuation (ADC_ATTEN_DB_2_5) between 100 and 1250mV
+ * - 6dB attenuation (ADC_ATTEN_DB_6) between 150 to 1750mV
+ * - 11dB attenuation (ADC_ATTEN_DB_11) between 150 to 2450mV
+ *
+ * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
+ *
+ * @param adc_n   ADC unit.
+ * @param channel ADCn channel number.
+ * @param atten   ADC attenuation. See ``adc_atten_t``
+ */
+#define adc_hal_set_atten(adc_n, channel, atten) adc_ll_set_atten(adc_n, channel, atten)
+
+#else // #if !SOC_ADC_RTC_CTRL_SUPPORTED
+/**
+ * Set the attenuation for ADC to single read
+ *
+ * @note All ADC units and channels will share the setting. So PLEASE DO save your attenuations and reset them by calling this API again in your driver
+ *
+ * @param adc_n    Not used, leave here for chip version compatibility
+ * @param channel  Not used, leave here for chip version compatibility
+ * @param atten    ADC attenuation. See ``adc_atten_t``
+ */
+#define adc_hal_set_atten(adc_n, channel, atten) adc_ll_onetime_set_atten(atten)
+#endif  //#if SOC_ADC_RTC_CTRL_SUPPORTED
+
+/**
+ * Start an ADC conversion and get the converted value.
+ *
+ * @note It may be block to wait conversion finish.
+ *
+ * @param      adc_n   ADC unit.
+ * @param      channel ADC channel number.
+ * @param[out] out_raw ADC converted result
+ *
+ * @return
+ *      - ESP_OK:                The value is valid.
+ *      - ESP_ERR_INVALID_STATE: The value is invalid.
+ */
+esp_err_t adc_hal_convert(adc_ll_num_t adc_n, int channel, int *out_raw);
+
+/*---------------------------------------------------------------
+                    ADC calibration setting
+---------------------------------------------------------------*/
+#if SOC_ADC_CALIBRATION_V1_SUPPORTED
+
+/**
+ * @brief Initialize default parameter for the calibration block.
+ *
+ * @param adc_n ADC index numer
+ */
+void adc_hal_calibration_init(adc_ll_num_t adc_n);
+
+/**
+ * Set the calibration result (initial data) to ADC.
+ *
+ * @note  Different ADC units and different attenuation options use different calibration data (initial data).
+ *
+ * @param adc_n ADC index number.
+ * @param param the calibration parameter to configure
+ */
+void adc_hal_set_calibration_param(adc_ll_num_t adc_n, uint32_t param);
+
+/**
+ * Calibrate the ADC using internal connections.
+ *
+ * @note  Different ADC units and different attenuation options use different calibration data (initial data).
+ *
+ * @param adc_n ADC index number.
+ * @param channel adc channel number.
+ * @param atten The attenuation for the channel
+ * @param internal_gnd true:  Disconnect from the IO port and use the internal GND as the calibration voltage.
+ *                     false: Use IO external voltage as calibration voltage.
+ *
+ * @return
+ *      - The calibration result (initial data) to ADC, use `adc_hal_set_calibration_param` to set.
+ */
+uint32_t adc_hal_self_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten, bool internal_gnd);
+
+#endif //SOC_ADC_CALIBRATION_V1_SUPPORTED
+
+
+/*---------------------------------------------------------------
+                    RTC controller setting
+---------------------------------------------------------------*/
+/**
+ * Set adc output data format for RTC controller.
+ *
+ * @prarm adc_n ADC unit.
+ * @prarm bits Output data bits width option.
+ */
+#define adc_hal_rtc_set_output_format(adc_n, bits) adc_ll_rtc_set_output_format(adc_n, bits)
+
+/**
+ * ADC module output data invert or not.
+ *
+ * @prarm adc_n ADC unit.
+ */
+#define adc_hal_rtc_output_invert(adc_n, inv_en) adc_ll_rtc_output_invert(adc_n, inv_en)
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/adc_types.h b/tools/sdk/esp32s3/include/hal/include/hal/adc_types.h
new file mode 100644
index 00000000000..f5efb1d4273
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/adc_types.h
@@ -0,0 +1,356 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "sdkconfig.h"
+#include "soc/soc_caps.h"
+#include "esp_attr.h"
+
+/**
+ * @brief ADC unit enumeration.
+ *
+ * @note  For ADC digital controller (DMA mode), ESP32 doesn't support `ADC_UNIT_2`, `ADC_UNIT_BOTH`, `ADC_UNIT_ALTER`.
+ */
+typedef enum {
+    ADC_UNIT_1 = 1,          /*!< SAR ADC 1. */
+    ADC_UNIT_2 = 2,          /*!< SAR ADC 2. */
+    ADC_UNIT_BOTH = 3,       /*!< SAR ADC 1 and 2. */
+    ADC_UNIT_ALTER = 7,      /*!< SAR ADC 1 and 2 alternative mode. */
+    ADC_UNIT_MAX,
+} adc_unit_t;
+
+/**
+ * @brief ADC channels handle. See ``adc1_channel_t``, ``adc2_channel_t``.
+ *
+ * @note  For ESP32 ADC1, don't use `ADC_CHANNEL_8`, `ADC_CHANNEL_9`. See ``adc1_channel_t``.
+ */
+typedef enum {
+    ADC_CHANNEL_0 = 0, /*!< ADC channel */
+    ADC_CHANNEL_1,     /*!< ADC channel */
+    ADC_CHANNEL_2,     /*!< ADC channel */
+    ADC_CHANNEL_3,     /*!< ADC channel */
+    ADC_CHANNEL_4,     /*!< ADC channel */
+    ADC_CHANNEL_5,     /*!< ADC channel */
+    ADC_CHANNEL_6,     /*!< ADC channel */
+    ADC_CHANNEL_7,     /*!< ADC channel */
+    ADC_CHANNEL_8,     /*!< ADC channel */
+    ADC_CHANNEL_9,     /*!< ADC channel */
+    ADC_CHANNEL_MAX,
+} adc_channel_t;
+
+/**
+ * @brief ADC attenuation parameter. Different parameters determine the range of the ADC. See ``adc1_config_channel_atten``.
+ */
+typedef enum {
+    ADC_ATTEN_DB_0   = 0,  /*!<No input attenumation, ADC can measure up to approx. 800 mV. */
+    ADC_ATTEN_DB_2_5 = 1,  /*!<The input voltage of ADC will be attenuated extending the range of measurement by about 2.5 dB (1.33 x) */
+    ADC_ATTEN_DB_6   = 2,  /*!<The input voltage of ADC will be attenuated extending the range of measurement by about 6 dB (2 x) */
+    ADC_ATTEN_DB_11  = 3,  /*!<The input voltage of ADC will be attenuated extending the range of measurement by about 11 dB (3.55 x) */
+    ADC_ATTEN_MAX,
+} adc_atten_t;
+
+/**
+ * @brief ADC resolution setting option.
+ * @note  Only used in single read mode
+ */
+typedef enum {
+#if CONFIG_IDF_TARGET_ESP32
+    ADC_WIDTH_BIT_9  = 0, /*!< ADC capture width is 9Bit. */
+    ADC_WIDTH_BIT_10 = 1, /*!< ADC capture width is 10Bit. */
+    ADC_WIDTH_BIT_11 = 2, /*!< ADC capture width is 11Bit. */
+    ADC_WIDTH_BIT_12 = 3, /*!< ADC capture width is 12Bit. */
+#elif SOC_ADC_MAX_BITWIDTH == 12
+    ADC_WIDTH_BIT_12 = 3, /*!< ADC capture width is 12Bit. */
+#elif SOC_ADC_MAX_BITWIDTH == 13
+    ADC_WIDTH_BIT_13 = 4, /*!< ADC capture width is 13Bit. */
+#endif
+    ADC_WIDTH_MAX,
+} adc_bits_width_t;
+
+/**
+ * @brief ADC digital controller (DMA mode) work mode.
+ */
+typedef enum {
+    ADC_CONV_SINGLE_UNIT_1 = 1,  ///< Only use ADC1 for conversion
+    ADC_CONV_SINGLE_UNIT_2 = 2,  ///< Only use ADC2 for conversion
+    ADC_CONV_BOTH_UNIT     = 3,  ///< Use Both ADC1 and ADC2 for conversion simultaneously
+    ADC_CONV_ALTER_UNIT    = 7,  ///< Use both ADC1 and ADC2 for conversion by turn. e.g. ADC1 -> ADC2 -> ADC1 -> ADC2 .....
+    ADC_CONV_UNIT_MAX,
+} adc_digi_convert_mode_t;
+
+/**
+ * @brief ADC digital controller (DMA mode) output data format option.
+ */
+typedef enum {
+    ADC_DIGI_FORMAT_12BIT __attribute__((deprecated)),  /*!<ADC to DMA data format,                [15:12]-channel, [11: 0]-12 bits ADC data (`adc_digi_output_data_t`). Note: For single convert mode. */
+    ADC_DIGI_FORMAT_11BIT __attribute__((deprecated)),  /*!<ADC to DMA data format, [15]-adc unit, [14:11]-channel, [10: 0]-11 bits ADC data (`adc_digi_output_data_t`). Note: For multi or alter convert mode. */
+    ADC_DIGI_FORMAT_MAX   __attribute__((deprecated)),
+
+    ADC_DIGI_OUTPUT_FORMAT_TYPE1,   ///< See `adc_digi_output_data_t.type1`
+    ADC_DIGI_OUTPUT_FORMAT_TYPE2,   ///< See `adc_digi_output_data_t.type2`
+} adc_digi_output_format_t;
+
+/**
+ * @brief ADC digital controller pattern configuration
+ */
+typedef struct {
+    uint8_t atten;      ///< Attenuation of this ADC channel
+    uint8_t channel;    ///< ADC channel
+    uint8_t unit;       ///< ADC unit
+    uint8_t bit_width;  ///< ADC output bit width
+} adc_digi_pattern_config_t;
+
+/*---------------------------------------------------------------
+                    Output Format
+---------------------------------------------------------------*/
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+/**
+ * @brief ADC digital controller (DMA mode) output data format.
+ *        Used to analyze the acquired ADC (DMA) data.
+ * @note  ESP32: Only `type1` is valid. ADC2 does not support DMA mode.
+ * @note  ESP32-S2: Member `channel` can be used to judge the validity of the ADC data,
+ *                  because the role of the arbiter may get invalid ADC data.
+ */
+typedef struct {
+    union {
+        struct {
+            uint16_t data:     12;  /*!<ADC real output data info. Resolution: 12 bit. */
+            uint16_t channel:   4;  /*!<ADC channel index info. */
+        } type1;
+        struct {
+            uint16_t data:     11;  /*!<ADC real output data info. Resolution: 11 bit. */
+            uint16_t channel:   4;  /*!<ADC channel index info. For ESP32-S2:
+                                        If (channel < ADC_CHANNEL_MAX), The data is valid.
+                                        If (channel > ADC_CHANNEL_MAX), The data is invalid. */
+            uint16_t unit:      1;  /*!<ADC unit index info. 0: ADC1; 1: ADC2.  */
+        } type2;                    /*!<When the configured output format is 11bit. `ADC_DIGI_FORMAT_11BIT` */
+        uint16_t val;               /*!<Raw data value */
+    };
+} adc_digi_output_data_t;
+
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+/**
+ * @brief ADC digital controller (DMA mode) output data format.
+ *        Used to analyze the acquired ADC (DMA) data.
+ */
+typedef struct {
+    union {
+        struct {
+            uint32_t data:          12; /*!<ADC real output data info. Resolution: 12 bit. */
+            uint32_t reserved12:    1;  /*!<Reserved12. */
+            uint32_t channel:       3;  /*!<ADC channel index info.
+                                            If (channel < ADC_CHANNEL_MAX), The data is valid.
+                                            If (channel > ADC_CHANNEL_MAX), The data is invalid. */
+            uint32_t unit:          1;  /*!<ADC unit index info. 0: ADC1; 1: ADC2.  */
+            uint32_t reserved17_31: 15; /*!<Reserved17. */
+        } type2;                         /*!<When the configured output format is 12bit. `ADC_DIGI_FORMAT_11BIT` */
+        uint32_t val;                   /*!<Raw data value */
+    };
+} adc_digi_output_data_t;
+
+#elif CONFIG_IDF_TARGET_ESP32S3
+/**
+ * @brief ADC digital controller (DMA mode) output data format.
+ *        Used to analyze the acquired ADC (DMA) data.
+ */
+typedef struct {
+    union {
+        struct {
+            uint32_t data:          13; /*!<ADC real output data info. Resolution: 13 bit. */
+            uint32_t channel:       4;  /*!<ADC channel index info.
+                                            If (channel < ADC_CHANNEL_MAX), The data is valid.
+                                            If (channel > ADC_CHANNEL_MAX), The data is invalid. */
+            uint32_t unit:          1;  /*!<ADC unit index info. 0: ADC1; 1: ADC2.  */
+            uint32_t reserved17_31: 14; /*!<Reserved17. */
+        } type2;                         /*!<When the configured output format is 12bit. `ADC_DIGI_FORMAT_11BIT` */
+        uint32_t val;                   /*!<Raw data value */
+    };
+} adc_digi_output_data_t;
+#endif
+
+
+#if SOC_ADC_ARBITER_SUPPORTED
+/*---------------------------------------------------------------
+                    Arbiter
+---------------------------------------------------------------*/
+/**
+ * @brief ADC arbiter work mode option.
+ *
+ * @note ESP32-S2: Only ADC2 support arbiter.
+ */
+typedef enum {
+    ADC_ARB_MODE_SHIELD,/*!<Force shield arbiter, Select the highest priority controller to work. */
+    ADC_ARB_MODE_FIX,   /*!<Fixed priority switch controller mode. */
+    ADC_ARB_MODE_LOOP,  /*!<Loop priority switch controller mode. Each controller has the same priority,
+                            and the arbiter will switch to the next controller after the measurement is completed. */
+} adc_arbiter_mode_t;
+
+/**
+ * @brief ADC arbiter work mode and priority setting.
+ *
+ * @note ESP32-S2: Only ADC2 support arbiter.
+ */
+typedef struct {
+    adc_arbiter_mode_t mode; /*!<Refer to ``adc_arbiter_mode_t``. Note: only support ADC2. */
+    uint8_t rtc_pri;        /*!<RTC controller priority. Range: 0 ~ 2. */
+    uint8_t dig_pri;        /*!<Digital controller priority. Range: 0 ~ 2. */
+    uint8_t pwdet_pri;      /*!<Wi-Fi controller priority. Range: 0 ~ 2. */
+} adc_arbiter_t;
+
+/**
+ * @brief ADC arbiter default configuration.
+ *
+ * @note ESP32S2: Only ADC2 supports (needs) an arbiter.
+ */
+#define ADC_ARBITER_CONFIG_DEFAULT() { \
+    .mode = ADC_ARB_MODE_FIX, \
+    .rtc_pri = 1, \
+    .dig_pri = 0, \
+    .pwdet_pri = 2, \
+}
+#endif  //#if SOC_ADC_ARBITER_SUPPORTED
+
+#if SOC_ADC_FILTER_SUPPORTED
+/*---------------------------------------------------------------
+                    Filter
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) filter index options.
+ *
+ * @note  For ESP32-S2, The filter object of the ADC is fixed.
+ */
+typedef enum {
+    ADC_DIGI_FILTER_IDX0 = 0, /*!<The filter index 0.
+                                  For ESP32-S2, It can only be used to filter all enabled channels of ADC1 unit at the same time. */
+    ADC_DIGI_FILTER_IDX1,     /*!<The filter index 1.
+                                  For ESP32-S2, It can only be used to filter all enabled channels of ADC2 unit at the same time. */
+    ADC_DIGI_FILTER_IDX_MAX
+} adc_digi_filter_idx_t;
+
+/**
+ * @brief ADC digital controller (DMA mode) filter type options.
+ *        Expression: filter_data = (k-1)/k * last_data + new_data / k.
+ */
+typedef enum {
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+    ADC_DIGI_FILTER_DIS = -1,  /*!< Disable filter */
+#endif
+    ADC_DIGI_FILTER_IIR_2 = 0, /*!<The filter mode is first-order IIR filter. The coefficient is 2. */
+    ADC_DIGI_FILTER_IIR_4,     /*!<The filter mode is first-order IIR filter. The coefficient is 4. */
+    ADC_DIGI_FILTER_IIR_8,     /*!<The filter mode is first-order IIR filter. The coefficient is 8. */
+    ADC_DIGI_FILTER_IIR_16,    /*!<The filter mode is first-order IIR filter. The coefficient is 16. */
+    ADC_DIGI_FILTER_IIR_64,    /*!<The filter mode is first-order IIR filter. The coefficient is 64. */
+    ADC_DIGI_FILTER_IIR_MAX
+} adc_digi_filter_mode_t;
+
+/**
+ * @brief ADC digital controller (DMA mode) filter configuration.
+ *
+ * @note  For ESP32-S2, The filter object of the ADC is fixed.
+ * @note  For ESP32-S2, The filter object is always all enabled channels.
+ */
+typedef struct {
+    adc_unit_t adc_unit;        /*!<Set adc unit number for filter.
+                                    For ESP32-S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time. */
+    adc_channel_t channel;      /*!<Set adc channel number for filter.
+                                    For ESP32-S2, it's always `ADC_CHANNEL_MAX` */
+    adc_digi_filter_mode_t mode;/*!<Set adc filter mode for filter. See ``adc_digi_filter_mode_t``. */
+} adc_digi_filter_t;
+#endif  // #if SOC_ADC_FILTER_SUPPORTED
+
+#if SOC_ADC_MONITOR_SUPPORTED
+/*---------------------------------------------------------------
+                    Monitor
+---------------------------------------------------------------*/
+/**
+ * @brief ADC digital controller (DMA mode) monitor index options.
+ *
+ * @note  For ESP32-S2, The monitor object of the ADC is fixed.
+ */
+typedef enum {
+    ADC_DIGI_MONITOR_IDX0 = 0, /*!<The monitor index 0.
+                                  For ESP32-S2, It can only be used to monitor all enabled channels of ADC1 unit at the same time. */
+    ADC_DIGI_MONITOR_IDX1,     /*!<The monitor index 1.
+                                  For ESP32-S2, It can only be used to monitor all enabled channels of ADC2 unit at the same time. */
+    ADC_DIGI_MONITOR_IDX_MAX
+} adc_digi_monitor_idx_t;
+
+/**
+ * @brief Set monitor mode of adc digital controller.
+ *        MONITOR_HIGH:If ADC_OUT >  threshold, Generates monitor interrupt.
+ *        MONITOR_LOW: If ADC_OUT <  threshold, Generates monitor interrupt.
+ */
+typedef enum {
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+    ADC_DIGI_MONITOR_DIS = 0,  /*!<Disable monitor. */
+    ADC_DIGI_MONITOR_EN,       /*!<If ADC_OUT <  threshold, Generates monitor interrupt. */
+                               /*!<If ADC_OUT >  threshold, Generates monitor interrupt. */
+#else
+    ADC_DIGI_MONITOR_HIGH = 0,  /*!<If ADC_OUT >  threshold, Generates monitor interrupt. */
+    ADC_DIGI_MONITOR_LOW,       /*!<If ADC_OUT <  threshold, Generates monitor interrupt. */
+#endif
+    ADC_DIGI_MONITOR_MAX
+} adc_digi_monitor_mode_t;
+
+/**
+ * @brief ADC digital controller (DMA mode) monitor configuration.
+ *
+ * @note  For ESP32-S2, The monitor object of the ADC is fixed.
+ * @note  For ESP32-S2, The monitor object is always all enabled channels.
+ */
+typedef struct {
+    adc_unit_t adc_unit;            /*!<Set adc unit number for monitor.
+                                        For ESP32-S2, monitor IDX0/IDX1 can only be used to monitor all enabled channels of ADC1/ADC2 unit at the same time. */
+    adc_channel_t channel;          /*!<Set adc channel number for monitor.
+                                        For ESP32-S2, it's always `ADC_CHANNEL_MAX` */
+    adc_digi_monitor_mode_t mode;   /*!<Set adc monitor mode. See ``adc_digi_monitor_mode_t``. */
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+    uint32_t h_threshold;             /*!<Set monitor threshold of adc digital controller. */
+    uint32_t l_threshold;             /*!<Set monitor threshold of adc digital controller. */
+#else
+    uint32_t threshold;             /*!<Set monitor threshold of adc digital controller. */
+#endif
+} adc_digi_monitor_t;
+#endif  //#if SOC_ADC_MONITOR_SUPPORTED
+
+/*---------------------------------------------------------------
+            To Be Deprecated TODO: IDF-3610
+---------------------------------------------------------------*/
+#ifdef CONFIG_IDF_TARGET_ESP32
+/**
+ * @brief ESP32 ADC DMA source selection.
+ */
+#else
+/**
+ * @brief ESP32 ADC DMA source selection.
+ *
+ * @deprecated  Not applicable on ESP32-S2 because ESP32-S2 doesn't use I2S DMA.
+ */
+#endif
+typedef enum {
+    ADC_I2S_DATA_SRC_IO_SIG = 0, /*!< I2S data from GPIO matrix signal  */
+    ADC_I2S_DATA_SRC_ADC = 1,    /*!< I2S data from ADC */
+    ADC_I2S_DATA_SRC_MAX,
+} adc_i2s_source_t;
+
+#if CONFIG_IDF_TARGET_ESP32S2
+/**
+ * @brief ADC digital controller (DMA mode) clock system setting.
+ *        Calculation formula: controller_clk = (`APLL` or `APB`) / (div_num + div_a / div_b + 1).
+ *
+ * @note: The clocks of the DAC digital controller use the ADC digital controller clock divider.
+ */
+typedef struct {
+    bool use_apll;      /*!<true: use APLL clock; false: use APB clock. */
+    uint32_t div_num;   /*!<Division factor. Range: 0 ~ 255.
+                            Note: When a higher frequency clock is used (the division factor is less than 9),
+                            the ADC reading value will be slightly offset. */
+    uint32_t div_b;     /*!<Division factor. Range: 1 ~ 63. */
+    uint32_t div_a;     /*!<Division factor. Range: 0 ~ 63. */
+} adc_digi_clk_t;
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/aes_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/aes_hal.h
new file mode 100644
index 00000000000..988313899f9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/aes_hal.h
@@ -0,0 +1,157 @@
+// Copyright 2020 Espressif Systems (shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in soc/include/hal/readme.md
+ ******************************************************************************/
+
+#pragma once
+
+#include <stddef.h>
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+#include "hal/aes_types.h"
+#include "hal/aes_ll.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @brief Sets the key used for AES encryption/decryption
+ *
+ * @param key pointer to the key
+ * @param key_bytes number of bytes in key
+ * @param mode key mode, 0 : decrypt, 1: encrypt
+ *
+ * @return uint8_t number of key bytes written to hardware, used for fault injection check
+ */
+uint8_t aes_hal_setkey(const uint8_t *key, size_t key_bytes, int mode);
+
+/**
+ * @brief encrypts/decrypts a single block
+ *
+ * @param input_block input block, size of AES_BLOCK_BYTES
+ * @param output_block output block, size of AES_BLOCK_BYTES
+ */
+void aes_hal_transform_block(const void *input_block, void *output_block);
+
+#if SOC_AES_SUPPORT_DMA
+/**
+ * @brief Inits the AES mode of operation
+ *
+ * @param mode mode of operation, e.g. CTR or CBC
+ */
+void aes_hal_mode_init(esp_aes_mode_t mode);
+
+/**
+ * @brief Sets the initialization vector for the transform
+ *
+ * @note The same IV must never be reused with the same key
+ *
+ * @param iv the initialization vector, length = IV_BYTES (16 bytes)
+ */
+void aes_hal_set_iv(const uint8_t *iv);
+
+/**
+ * @brief Reads the initialization vector
+ *
+ * @param iv initialization vector read from HW, length = IV_BYTES (16 bytes)
+ */
+void aes_hal_read_iv(uint8_t *iv);
+
+/**
+ * @brief Busy waits until the AES operation is done
+ *
+ * @param output pointer to inlink descriptor
+ */
+void aes_hal_wait_done(void);
+
+/**
+ * @brief Starts an already configured AES DMA transform
+ *
+ * @param num_blocks Number of blocks to transform
+ */
+void aes_hal_transform_dma_start(size_t num_blocks);
+
+/**
+ * @brief Finish up a AES DMA conversion, release DMA
+ *
+ */
+void aes_hal_transform_dma_finish(void);
+
+/**
+ * @brief Enable or disable transform completed interrupt
+ *
+ * @param enable true to enable, false to disable.
+ */
+#define aes_hal_interrupt_enable(enable) aes_ll_interrupt_enable(enable)
+
+/**
+ * @brief Clears the interrupt
+ *
+ */
+#define aes_hal_interrupt_clear() aes_ll_interrupt_clear()
+
+#if SOC_AES_SUPPORT_GCM
+/**
+ * @brief Calculates the Hash sub-key H0 needed to start AES-GCM
+ *
+ * @param gcm_hash the Hash sub-key H0 output
+ */
+void aes_hal_gcm_calc_hash(uint8_t *gcm_hash);
+
+/**
+ * @brief Initializes the AES hardware for AES-GCM
+ *
+ * @param aad_num_blocks the number of Additional Authenticated Data (AAD) blocks
+ * @param num_valid_bit the number of effective bits of incomplete blocks in plaintext/cipertext
+ */
+void aes_hal_gcm_init(size_t aad_num_blocks, size_t num_valid_bit);
+
+/**
+ * @brief Starts a AES-GCM transform
+ *
+ * @param num_blocks Number of blocks to transform
+ */
+void aes_hal_transform_dma_gcm_start(size_t num_blocks);
+
+/**
+ * @brief Sets the J0 value, for more information see the GCM subchapter in the TRM
+ *
+ * @note Only affects AES-GCM
+ *
+ * @param j0 J0 value
+ */
+#define aes_hal_gcm_set_j0(j0)  aes_ll_gcm_set_j0(j0)
+
+/**
+ * @brief Read the tag after a AES-GCM transform
+ *
+ * @param tag Pointer to where to store the result
+ * @param tag_length number of bytes to read into tag
+ */
+void aes_hal_gcm_read_tag(uint8_t *tag, size_t tag_len);
+
+#endif //SOC_AES_SUPPORT_GCM
+
+#endif //SOC_AES_SUPPORT_DMA
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/aes_types.h b/tools/sdk/esp32s3/include/hal/include/hal/aes_types.h
new file mode 100644
index 00000000000..e12d510c6e4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/aes_types.h
@@ -0,0 +1,48 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+/* padlock.c and aesni.c rely on these values! */
+#define ESP_AES_ENCRYPT     1
+#define ESP_AES_DECRYPT     0
+
+
+/* DMA AES working modes*/
+typedef enum {
+    ESP_AES_BLOCK_MODE_ECB = 0,
+    ESP_AES_BLOCK_MODE_CBC,
+    ESP_AES_BLOCK_MODE_OFB,
+    ESP_AES_BLOCK_MODE_CTR,
+    ESP_AES_BLOCK_MODE_CFB8,
+    ESP_AES_BLOCK_MODE_CFB128,
+    ESP_AES_BLOCK_MODE_GCM,
+    ESP_AES_BLOCK_MODE_MAX,
+} esp_aes_mode_t;
+
+/* Number of bytes in an AES block */
+#define AES_BLOCK_BYTES     (16)
+/* Number of words in an AES block */
+#define AES_BLOCK_WORDS     (4)
+/* Number of bytes in an IV */
+#define IV_BYTES            (16)
+/* Number of words in an IV */
+#define IV_WORDS            (4)
+/* Number of bytes in a GCM tag block */
+#define TAG_BYTES           (16)
+/* Number of words in a GCM tag block */
+#define TAG_WORDS           (4)
+
+#define AES_128_KEY_BYTES   (128/8)
+#define AES_192_KEY_BYTES   (192/8)
+#define AES_256_KEY_BYTES   (256/8)
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/brownout_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/brownout_hal.h
new file mode 100644
index 00000000000..b56823b3995
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/brownout_hal.h
@@ -0,0 +1,48 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stddef.h>
+#include <stdbool.h>
+#include <stdint.h>
+#include "soc/soc_caps.h"
+
+typedef struct {
+    uint8_t threshold;
+    bool enabled;
+    bool reset_enabled;
+    bool flash_power_down;
+    bool rf_power_down;
+} brownout_hal_config_t;
+
+void brownout_hal_config(const brownout_hal_config_t *cfg);
+
+void brownout_hal_intr_enable(bool enable);
+
+void brownout_hal_intr_clear(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/cpu_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/cpu_hal.h
new file mode 100644
index 00000000000..824095871db
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/cpu_hal.h
@@ -0,0 +1,129 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_err.h"
+
+#include "soc/soc_caps.h"
+#include "hal/cpu_types.h"
+#include "hal/cpu_ll.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Return the ID of the core currently executing this code.
+ *
+ * @return core id [0..SOC_CPU_CORES_NUM - 1]
+ */
+#define cpu_hal_get_core_id()           cpu_ll_get_core_id()
+
+/**
+ * Get the current value of the stack pointer.
+ *
+ * @return the current stack pointer
+ */
+#define cpu_hal_get_sp()                cpu_ll_get_sp()
+
+/**
+ * Get the current value of the internal counter that increments
+ * every processor-clock cycle.
+ *
+ * @return cycle count; returns 0 if not supported
+ */
+#define cpu_hal_get_cycle_count()       cpu_ll_get_cycle_count()
+
+/**
+ * Set the given value into the internal counter that increments
+ * every processor-clock cycle.
+ */
+#define cpu_hal_set_cycle_count(val)       cpu_ll_set_cycle_count(val)
+
+/**
+ * Check if some form of debugger is attached to CPU.
+ *
+ * @return true debugger is attached
+ * @return false no debugger is attached/ no support for debuggers
+ */
+#define cpu_hal_is_debugger_attached()  cpu_ll_is_debugger_attached()
+
+/**
+ * Init HW loop status.
+ */
+#define cpu_hal_init_hwloop()           cpu_ll_init_hwloop()
+
+/**
+ * Trigger a call to debugger.
+ */
+#define cpu_hal_break()                 cpu_ll_break()
+
+/**
+ * Wait for interrupt.
+ */
+#define cpu_hal_waiti()                 cpu_ll_waiti()
+
+/**
+ * Trigger a syscall.
+ */
+#define cpu_hal_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno)                 cpu_ll_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno)
+
+#if SOC_CPU_BREAKPOINTS_NUM > 0
+
+/**
+ * Set and enable breakpoint at an instruction address.
+ *
+ * @note Overwrites previously set breakpoint with same breakpoint ID.
+ *
+ * @param id breakpoint to set [0..SOC_CPU_BREAKPOINTS_NUM - 1]
+ * @param addr address to set a breakpoint on
+ */
+void cpu_hal_set_breakpoint(int id, const void* addr);
+
+/**
+ * Clear and disable breakpoint.
+ *
+ * @param id breakpoint to clear [0..SOC_CPU_BREAKPOINTS_NUM - 1]
+ */
+void cpu_hal_clear_breakpoint(int id);
+
+#endif // SOC_CPU_BREAKPOINTS_NUM > 0
+
+#if SOC_CPU_WATCHPOINTS_NUM > 0
+
+/**
+ * Set and enable a watchpoint, specifying the memory range and trigger operation.
+ *
+ * @param id watchpoint to set [0..SOC_CPU_WATCHPOINTS_NUM - 1]
+ * @param addr starting address
+ * @param size number of bytes from starting address to watch
+ * @param trigger operation on specified memory range that triggers the watchpoint (read, write, read/write)
+ */
+void cpu_hal_set_watchpoint(int id, const void* addr, size_t size, watchpoint_trigger_t trigger);
+
+/**
+ * Clear and disable watchpoint.
+ *
+ * @param id watchpoint to clear [0..SOC_CPU_WATCHPOINTS_NUM - 1]
+ */
+void cpu_hal_clear_watchpoint(int id);
+
+#endif // SOC_CPU_WATCHPOINTS_NUM > 0
+
+/**
+ * Set exception vector table base address.
+ *
+ * @param base address to move the exception vector table to
+ */
+void cpu_hal_set_vecbase(const void* base);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/cpu_types.h b/tools/sdk/esp32s3/include/hal/include/hal/cpu_types.h
new file mode 100644
index 00000000000..d61a47c9c2c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/cpu_types.h
@@ -0,0 +1,21 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+typedef enum {
+    WATCHPOINT_TRIGGER_ON_RO,       // on read
+    WATCHPOINT_TRIGGER_ON_WO,       // on write
+    WATCHPOINT_TRIGGER_ON_RW        // on either read or write
+} watchpoint_trigger_t;
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/dac_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/dac_hal.h
new file mode 100644
index 00000000000..f71c95d2799
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/dac_hal.h
@@ -0,0 +1,78 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+#pragma once
+
+#include "hal/dac_ll.h"
+
+/**
+ * Power on dac module and start output voltage.
+ *
+ * @note Before powering up, make sure the DAC PAD is set to RTC PAD and floating status.
+ * @param channel DAC channel num.
+ */
+#define dac_hal_power_on(channel) dac_ll_power_on(channel)
+
+/**
+ * Power done dac module and stop output voltage.
+ *
+ * @param channel DAC channel num.
+ */
+#define dac_hal_power_down(channel) dac_ll_power_down(channel)
+
+/**
+ * Enable/disable the synchronization operation function of ADC1 and DAC.
+ *
+ * @note  If enabled(default), ADC RTC controller sampling will cause the DAC channel output voltage.
+ *
+ * @param enable Enable or disable adc and dac synchronization function.
+ */
+#define  dac_hal_rtc_sync_by_adc(enable) dac_ll_rtc_sync_by_adc(enable)
+
+/**
+ * Output voltage with value (8 bit).
+ *
+ * @param channel DAC channel num.
+ * @param value Output value. Value range: 0 ~ 255.
+ *        The corresponding range of voltage is 0v ~ VDD3P3_RTC.
+ */
+#define dac_hal_update_output_value(channel, value) dac_ll_update_output_value(channel, value)
+
+/**
+ * Enable cosine wave generator output.
+ */
+#define dac_hal_cw_generator_enable() dac_ll_cw_generator_enable()
+
+/**
+ * Disable cosine wave generator output.
+ */
+#define dac_hal_cw_generator_disable() dac_ll_cw_generator_disable()
+
+/**
+ * Config the cosine wave generator function in DAC module.
+ *
+ * @param cw Configuration.
+ */
+void dac_hal_cw_generator_config(dac_cw_config_t *cw);
+
+/**
+ * Enable/disable DAC output data from DMA.
+ */
+#define dac_hal_digi_enable_dma(enable) dac_ll_digi_enable_dma(enable)
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/dac_types.h b/tools/sdk/esp32s3/include/hal/include/hal/dac_types.h
new file mode 100644
index 00000000000..4fe32226944
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/dac_types.h
@@ -0,0 +1,67 @@
+#pragma once
+
+#include "soc/soc_caps.h"
+#include "hal/adc_types.h"
+#include "sdkconfig.h"
+
+typedef enum {
+    DAC_CHANNEL_1 = 0,    /*!< DAC channel 1 is GPIO25(ESP32) / GPIO17(ESP32S2) */
+    DAC_CHANNEL_2 = 1,    /*!< DAC channel 2 is GPIO26(ESP32) / GPIO18(ESP32S2) */
+    DAC_CHANNEL_MAX,
+} dac_channel_t;
+
+/**
+ * @brief The multiple of the amplitude of the cosine wave generator. The max amplitude is VDD3P3_RTC.
+ */
+typedef enum {
+    DAC_CW_SCALE_1 = 0x0,   /*!< 1/1. Default. */
+    DAC_CW_SCALE_2 = 0x1,   /*!< 1/2. */
+    DAC_CW_SCALE_4 = 0x2,   /*!< 1/4. */
+    DAC_CW_SCALE_8 = 0x3,   /*!< 1/8. */
+} dac_cw_scale_t;
+
+/**
+ * @brief Set the phase of the cosine wave generator output.
+ */
+typedef enum {
+    DAC_CW_PHASE_0   = 0x2, /*!< Phase shift +0° */
+    DAC_CW_PHASE_180 = 0x3, /*!< Phase shift +180° */
+} dac_cw_phase_t;
+
+/**
+ * @brief Config the cosine wave generator function in DAC module.
+ */
+typedef struct {
+    dac_channel_t en_ch;    /*!< Enable the cosine wave generator of DAC channel. */
+    dac_cw_scale_t scale;   /*!< Set the amplitude of the cosine wave generator output. */
+    dac_cw_phase_t phase;   /*!< Set the phase of the cosine wave generator output. */
+    uint32_t freq;          /*!< Set frequency of cosine wave generator output. Range: 130(130Hz) ~ 55000(100KHz). */
+    int8_t offset;          /*!< Set the voltage value of the DC component of the cosine wave generator output.
+                                 Note: Unreasonable settings can cause waveform to be oversaturated. Range: -128 ~ 127. */
+} dac_cw_config_t;
+
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+
+/**
+ * @brief DAC digital controller (DMA mode) work mode.
+ */
+typedef enum {
+    DAC_CONV_NORMAL,        /*!< The data in the DMA buffer is simultaneously output to the enable channel of the DAC. */
+    DAC_CONV_ALTER,         /*!< The data in the DMA buffer is alternately output to the enable channel of the DAC. */
+    DAC_CONV_MAX
+} dac_digi_convert_mode_t;
+
+/**
+ * @brief DAC digital controller (DMA mode) configuration parameters.
+ */
+typedef struct {
+    dac_digi_convert_mode_t mode;   /*!<DAC digital controller (DMA mode) work mode. See ``dac_digi_convert_mode_t``. */
+    uint32_t interval;          /*!<The number of interval clock cycles for the DAC digital controller to output voltage.
+                                    The unit is the divided clock. Range: 1 ~ 4095.
+                                    Expression: `dac_output_freq` = `controller_clk` / interval. Refer to ``adc_digi_clk_t``.
+                                    Note: The sampling rate of each channel is also related to the conversion mode (See ``dac_digi_convert_mode_t``) and pattern table settings. */
+    adc_digi_clk_t dig_clk;     /*!<DAC digital controller clock divider settings. Refer to ``adc_digi_clk_t``.
+                                    Note: The clocks of the DAC digital controller use the ADC digital controller clock divider. */
+} dac_digi_config_t;
+
+#endif //CONFIG_IDF_TARGET_ESP32S2
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/dma_types.h b/tools/sdk/esp32s3/include/hal/include/hal/dma_types.h
new file mode 100644
index 00000000000..66c8677e98f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/dma_types.h
@@ -0,0 +1,49 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Type of DMA descriptor
+ *
+ */
+typedef struct dma_descriptor_s {
+    struct {
+        uint32_t size : 12;         /*!< Buffer size */
+        uint32_t length : 12;       /*!< Number of valid bytes in the buffer */
+        uint32_t reversed24_27 : 4; /*!< Reserved */
+        uint32_t err_eof : 1;       /*!< Whether the received buffer contains error */
+        uint32_t reserved29 : 1;    /*!< Reserved */
+        uint32_t suc_eof : 1;       /*!< Whether the descriptor is the last one in the link */
+        uint32_t owner : 1;         /*!< Who is allowed to access the buffer that this descriptor points to */
+    } dw0;                          /*!< Descriptor Word 0 */
+    void *buffer;                   /*!< Pointer to the buffer */
+    struct dma_descriptor_s *next;  /*!< Pointer to the next descriptor (set to NULL if the descriptor is the last one, e.g. suc_eof=1) */
+} dma_descriptor_t;
+
+_Static_assert(sizeof(dma_descriptor_t) == 12, "dma_descriptor_t should occupy 12 bytes in memory");
+
+#define DMA_DESCRIPTOR_BUFFER_OWNER_CPU (0)   /*!< DMA buffer is allowed to be accessed by CPU */
+#define DMA_DESCRIPTOR_BUFFER_OWNER_DMA (1)   /*!< DMA buffer is allowed to be accessed by DMA engine */
+#define DMA_DESCRIPTOR_BUFFER_MAX_SIZE (4095) /*!< Maximum size of the buffer that can be attached to descriptor */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/ds_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/ds_hal.h
new file mode 100644
index 00000000000..40d5c358936
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/ds_hal.h
@@ -0,0 +1,107 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use it in application code.
+ * See readme.md in soc/include/hal/readme.md
+ ******************************************************************************/
+
+#pragma once
+
+#if CONFIG_IDF_TARGET_ESP32
+#error "ESP32 doesn't have a DS peripheral"
+#endif
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The result when checking whether the key to decrypt the RSA parameters is ready.
+ */
+typedef enum {
+    DS_KEY_INPUT_OK = 0, /**< The decryption key is ready. */
+    DS_NO_KEY_INPUT,     /**< Dependent peripheral providing key hasn't been activated. */
+    DS_OTHER_WRONG,      /**< Dependent peripheral running but problem receiving the key. */
+} ds_key_check_t;
+
+typedef enum {
+    DS_SIGNATURE_OK = 0,                    /**< Signature is valid and can be read. */
+    DS_SIGNATURE_PADDING_FAIL = 1,          /**< Padding invalid, signature can be read if user wants it. */
+    DS_SIGNATURE_MD_FAIL = 2,               /**< Message digest check failed, signature invalid. */
+    DS_SIGNATURE_PADDING_AND_MD_FAIL = 3,   /**< Both padding and MD check failed. */
+} ds_signature_check_t;
+
+/**
+ * @brief Start the whole signing process after the input key is ready.
+ *
+ * Call this before using any of the functions below. The input key is ready must be ready at this point.
+ */
+void ds_hal_start(void);
+
+/**
+ * @brief Finish the whole signing process. Call this after the signature is read or in case of an error.
+ */
+void ds_hal_finish(void);
+
+/**
+ * @brief Write the initialization vector.
+ */
+void ds_hal_configure_iv(const uint32_t *iv);
+
+/**
+ * @brief Write the message which should be signed.
+ *
+ * @param msg Pointer to the message.
+ * @param size Length of signature result in bytes. It is the RSA signature length in bytes.
+ */
+void ds_hal_write_message(const uint8_t *msg, size_t size);
+
+/**
+ * @brief Write the encrypted private key parameters.
+ */
+void ds_hal_write_private_key_params(const uint8_t *block);
+
+/**
+ * @brief Begin signing procedure.
+ */
+void ds_hal_start_sign(void);
+
+/**
+ * @brief Check whether the hardware is busy with an operation.
+ *
+ * @return True if the hardware has finished the signing procedure, otherwise false.
+ */
+bool ds_hal_busy(void);
+
+/**
+ * @brief Check and read the signature from the hardware.
+ *
+ * @return
+ * - DS_SIGNATURE_OK if no issue is detected with the signature.
+ * - DS_SIGNATURE_PADDING_FAIL if the padding of the private key parameters is wrong.
+ * - DS_SIGNATURE_MD_FAIL if the message digest check failed. This means that the message digest calculated using
+ *      the private key parameters fails, i.e., the integrity of the private key parameters is not protected.
+ * - DS_SIGNATURE_PADDING_AND_MD_FAIL if both padding and message digest check fail.
+ */
+ds_signature_check_t ds_hal_read_result(uint8_t *result, size_t size);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/emac_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/emac_hal.h
new file mode 100644
index 00000000000..27cd38456dc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/emac_hal.h
@@ -0,0 +1,251 @@
+/*
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "hal/eth_types.h"
+#include "soc/emac_dma_struct.h"
+#include "soc/emac_mac_struct.h"
+#include "soc/emac_ext_struct.h"
+
+/**
+* @brief Ethernet DMA TX Descriptor
+*
+*/
+typedef struct {
+    volatile union {
+        struct {
+            uint32_t Deferred : 1;                /*!< MAC defers before transmission */
+            uint32_t UnderflowErr : 1;            /*!< DMA encountered an empty transmit buffer */
+            uint32_t ExcessiveDeferral : 1;       /*!< Excessive deferral of over 24,288 bit times */
+            uint32_t CollisionCount : 4;          /*!< Number of collisions occurred before transmitted */
+            uint32_t VLanFrame : 1;               /*!< Transmitted frame is a VLAN-type frame */
+            uint32_t ExcessiveCollision : 1;      /*!< Transmission aborted after 16 successive collisions */
+            uint32_t LateCollision : 1;           /*!< Collision occurred after the collision window */
+            uint32_t NoCarrier : 1;               /*!< Carrier Sense signal from the PHY was not asserted */
+            uint32_t LossCarrier : 1;             /*!< Loss of carrier occurred during transmission  */
+            uint32_t PayloadChecksumErr : 1;      /*!< Checksum error in TCP/UDP/ICMP datagram payload */
+            uint32_t FrameFlushed : 1;            /*!< DMA or MTL flushed the frame */
+            uint32_t JabberTimeout : 1;           /*!< MAC transmitter has experienced a jabber timeout */
+            uint32_t ErrSummary : 1;              /*!< Error Summary */
+            uint32_t IPHeadErr : 1;               /*!< IP Header Error */
+            uint32_t TxTimestampStatus : 1;       /*!< Timestamp captured for the transmit frame */
+            uint32_t VLANInsertControl : 2;       /*!< VLAN tagging or untagging before transmitting */
+            uint32_t SecondAddressChained : 1;    /*!< Second address in the descriptor is Next Descriptor address */
+            uint32_t TransmitEndRing : 1;         /*!< Descriptor list reached its final descriptor */
+            uint32_t ChecksumInsertControl : 2;   /*!< Control checksum calculation and insertion */
+            uint32_t CRCReplacementControl : 1;   /*!< Control CRC replace */
+            uint32_t TransmitTimestampEnable : 1; /*!< Enable IEEE1588 harware timestamping */
+            uint32_t DisablePad : 1;              /*!< Control add padding when frame short than 64 bytes */
+            uint32_t DisableCRC : 1;              /*!< Control append CRC to the end of frame */
+            uint32_t FirstSegment : 1;            /*!< Buffer contains the first segment of a frame */
+            uint32_t LastSegment : 1;             /*!< Buffer contains the last segment of a frame */
+            uint32_t InterruptOnComplete : 1;     /*!< Interrupt after frame transmitted */
+            uint32_t Own : 1;                     /*!< Owner of this descriptor: DMA controller or host */
+        };
+        uint32_t Value;
+    } TDES0;
+    union {
+        struct {
+            uint32_t TransmitBuffer1Size : 13; /*!< First data buffer byte size */
+            uint32_t Reserved : 3;             /*!< Reserved */
+            uint32_t TransmitBuffer2Size : 13; /*!< Second data buffer byte size */
+            uint32_t SAInsertControl : 3;      /*!< Control MAC add or replace Source Address field */
+        };
+        uint32_t Value;
+    } TDES1;
+    uint32_t Buffer1Addr;         /*!< Buffer1 address pointer */
+    uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */
+    uint32_t Reserved1;           /*!< Reserved */
+    uint32_t Reserved2;           /*!< Reserved */
+    uint32_t TimeStampLow;        /*!< Transmit Frame Timestamp Low */
+    uint32_t TimeStampHigh;       /*!< Transmit Frame Timestamp High */
+} eth_dma_tx_descriptor_t;
+#define EMAC_DMATXDESC_CHECKSUM_BYPASS 0            /*!< Checksum engine bypass */
+#define EMAC_DMATXDESC_CHECKSUM_IPV4HEADER 1        /*!< IPv4 header checksum insertion  */
+#define EMAC_DMATXDESC_CHECKSUM_TCPUDPICMPSEGMENT 2 /*!< TCP/UDP/ICMP Checksum Insertion calculated over segment only */
+#define EMAC_DMATXDESC_CHECKSUM_TCPUDPICMPFULL 3    /*!< TCP/UDP/ICMP Checksum Insertion fully calculated */
+
+_Static_assert(sizeof(eth_dma_tx_descriptor_t) == 32, "eth_dma_tx_descriptor_t should occupy 32 bytes in memory");
+
+/**
+* @brief Ethernet DMA RX Descriptor
+*
+*/
+typedef struct {
+    volatile union {
+        struct {
+            uint32_t ExtendStatusAvailable : 1;          /*!< Extended statsu is available in RDES4 */
+            uint32_t CRCErr : 1;                         /*!< CRC error occurred on frame */
+            uint32_t DribbleBitErr : 1;                  /*!< frame contains non int multiple of 8 bits */
+            uint32_t ReceiveErr : 1;                     /*!< Receive error */
+            uint32_t ReceiveWatchdogTimeout : 1;         /*!< Receive Watchdog timeout */
+            uint32_t FrameType : 1;                      /*!< Ethernet type or IEEE802.3 */
+            uint32_t LateCollision : 1;                  /*!< Late collision occurred during reception */
+            uint32_t TSAvailIPChecksumErrGiantFrame : 1; /*!< Timestamp available or IP Checksum error or Giant frame */
+            uint32_t LastDescriptor : 1;                 /*!< Last buffer of the frame */
+            uint32_t FirstDescriptor : 1;                /*!< First buffer of the frame */
+            uint32_t VLANTag : 1;                        /*!< VLAN Tag: received frame is a VLAN frame */
+            uint32_t OverflowErr : 1;                    /*!< Frame was damaged due to buffer overflow */
+            uint32_t LengthErr : 1;                      /*!< Frame size not matching with length field */
+            uint32_t SourceAddrFilterFail : 1;           /*!< SA field of frame failed the SA filter */
+            uint32_t DescriptorErr : 1;                  /*!< Frame truncated and DMA doesn't own next descriptor */
+            uint32_t ErrSummary : 1;                     /*!< Error Summary, OR of all errors in RDES */
+            uint32_t FrameLength : 14;                   /*!< Byte length of received frame */
+            uint32_t DestinationAddrFilterFail : 1;      /*!< Frame failed in the DA Filter in the MAC */
+            uint32_t Own : 1;                            /*!< Owner of this descriptor: DMA controller or host */
+        };
+        uint32_t Value;
+    } RDES0;
+    union {
+        struct {
+            uint32_t ReceiveBuffer1Size : 13;        /*!< First data buffer size in bytes */
+            uint32_t Reserved1 : 1;                  /*!< Reserved */
+            uint32_t SecondAddressChained : 1;       /*!< Seconde address is the Next Descriptor address */
+            uint32_t ReceiveEndOfRing : 1;           /*!< Descriptor reached its final descriptor */
+            uint32_t ReceiveBuffer2Size : 13;        /*!< Second data buffer size in bytes */
+            uint32_t Reserved : 2;                   /*!< Reserved */
+            uint32_t DisableInterruptOnComplete : 1; /*!< Disable the assertion of interrupt to host */
+        };
+        uint32_t Value;
+    } RDES1;
+    uint32_t Buffer1Addr;         /*!< Buffer1 address pointer */
+    uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */
+    volatile union {
+        struct {
+            uint32_t IPPayloadType : 3;                 /*!< Type of payload in the IP datagram */
+            uint32_t IPHeadErr : 1;                     /*!< IP header error */
+            uint32_t IPPayloadErr : 1;                  /*!< IP payload error */
+            uint32_t IPChecksumBypass : 1;              /*!< Checksum offload engine is bypassed */
+            uint32_t IPv4PacketReceived : 1;            /*!< Received packet is an IPv4 packet */
+            uint32_t IPv6PacketReceived : 1;            /*!< Received packet is an IPv6 packet */
+            uint32_t MessageType : 4;                   /*!< PTP Message Type */
+            uint32_t PTPFrameType : 1;                  /*!< PTP message is over Ethernet or IPv4/IPv6 */
+            uint32_t PTPVersion : 1;                    /*!< Version of PTP protocol */
+            uint32_t TimestampDropped : 1;              /*!< Timestamp dropped because of overflow */
+            uint32_t Reserved1 : 1;                     /*!< Reserved */
+            uint32_t AVPacketReceived : 1;              /*!< AV packet is received */
+            uint32_t AVTaggedPacketReceived : 1;        /*!< AV tagged packet is received */
+            uint32_t VLANTagPrioVal : 3;                /*!< VLAN tag's user value in the received packekt */
+            uint32_t Reserved2 : 3;                     /*!< Reserved */
+            uint32_t Layer3FilterMatch : 1;             /*!< Received frame matches one of the enabled Layer3 IP */
+            uint32_t Layer4FilterMatch : 1;             /*!< Received frame matches one of the enabled Layer4 IP */
+            uint32_t Layer3Layer4FilterNumberMatch : 2; /*!< Number of Layer3 and Layer4 Filter that matches the received frame */
+            uint32_t Reserved3 : 4;                     /*!< Reserved */
+        };
+        uint32_t Value;
+    } ExtendedStatus;
+    uint32_t Reserved;      /*!< Reserved */
+    uint32_t TimeStampLow;  /*!< Receive frame timestamp low */
+    uint32_t TimeStampHigh; /*!< Receive frame timestamp high */
+} eth_dma_rx_descriptor_t;
+
+_Static_assert(sizeof(eth_dma_rx_descriptor_t) == 32, "eth_dma_rx_descriptor_t should occupy 32 bytes in memory");
+
+typedef struct {
+    emac_mac_dev_t *mac_regs;
+    emac_dma_dev_t *dma_regs;
+    emac_ext_dev_t *ext_regs;
+    uint8_t **rx_buf;
+    uint8_t **tx_buf;
+    void *descriptors;
+    eth_dma_rx_descriptor_t *rx_desc;
+    eth_dma_tx_descriptor_t *tx_desc;
+
+} emac_hal_context_t;
+
+void emac_hal_init(emac_hal_context_t *hal, void *descriptors,
+                   uint8_t **rx_buf, uint8_t **tx_buf);
+
+void emac_hal_iomux_init_mii(void);
+
+void emac_hal_iomux_init_rmii(void);
+
+void emac_hal_iomux_rmii_clk_input(void);
+
+void emac_hal_iomux_rmii_clk_ouput(int num);
+
+void emac_hal_iomux_init_tx_er(void);
+
+void emac_hal_iomux_init_rx_er(void);
+
+void emac_hal_reset_desc_chain(emac_hal_context_t *hal);
+
+void emac_hal_reset(emac_hal_context_t *hal);
+
+bool emac_hal_is_reset_done(emac_hal_context_t *hal);
+
+void emac_hal_set_csr_clock_range(emac_hal_context_t *hal, int freq);
+
+void emac_hal_init_mac_default(emac_hal_context_t *hal);
+
+void emac_hal_init_dma_default(emac_hal_context_t *hal);
+
+void emac_hal_set_speed(emac_hal_context_t *hal, uint32_t speed);
+
+void emac_hal_set_duplex(emac_hal_context_t *hal, eth_duplex_t duplex);
+
+void emac_hal_set_promiscuous(emac_hal_context_t *hal, bool enable);
+
+/**
+ * @brief Send MAC-CTRL frames to peer (EtherType=0x8808, opcode=0x0001, dest_addr=MAC-specific-ctrl-proto-01 (01:80:c2:00:00:01))
+ */
+void emac_hal_send_pause_frame(emac_hal_context_t *hal, bool enable);
+
+bool emac_hal_is_mii_busy(emac_hal_context_t *hal);
+
+void emac_hal_set_phy_cmd(emac_hal_context_t *hal, uint32_t phy_addr, uint32_t phy_reg, bool write);
+
+void emac_hal_set_phy_data(emac_hal_context_t *hal, uint32_t reg_value);
+
+uint32_t emac_hal_get_phy_data(emac_hal_context_t *hal);
+
+void emac_hal_set_address(emac_hal_context_t *hal, uint8_t *mac_addr);
+
+/**
+ * @brief Starts EMAC Transmission & Reception
+ *
+ * @param hal EMAC HAL context infostructure
+ */
+void emac_hal_start(emac_hal_context_t *hal);
+
+/**
+ * @brief Stops EMAC Transmission & Reception
+ *
+ * @param hal EMAC HAL context infostructure
+ * @return
+ *     - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_STATE: previous frame transmission/reception is not completed. When this error occurs,
+  *      wait and reapeat the EMAC stop again.
+ */
+esp_err_t emac_hal_stop(emac_hal_context_t *hal);
+
+uint32_t emac_hal_get_tx_desc_owner(emac_hal_context_t *hal);
+
+uint32_t emac_hal_transmit_frame(emac_hal_context_t *hal, uint8_t *buf, uint32_t length);
+
+uint32_t emac_hal_receive_frame(emac_hal_context_t *hal, uint8_t *buf, uint32_t size, uint32_t *frames_remain, uint32_t *free_desc);
+
+void emac_hal_enable_flow_ctrl(emac_hal_context_t *hal, bool enable);
+
+uint32_t emac_hal_get_intr_enable_status(emac_hal_context_t *hal);
+
+uint32_t emac_hal_get_intr_status(emac_hal_context_t *hal);
+
+void emac_hal_clear_corresponding_intr(emac_hal_context_t *hal, uint32_t bits);
+
+void emac_hal_clear_all_intr(emac_hal_context_t *hal);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/esp_flash_err.h b/tools/sdk/esp32s3/include/hal/include/hal/esp_flash_err.h
new file mode 100644
index 00000000000..3da8b56de97
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/esp_flash_err.h
@@ -0,0 +1,48 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Possible errors returned from esp flash internal functions, these error codes
+ * should be consistent with esp_err_t codes. But in order to make the source
+ * files less dependent to esp_err_t, they use the error codes defined in this
+ * replacable header. This header should ensure the consistency to esp_err_t.
+ */
+
+enum {
+    /* These codes should be consistent with esp_err_t errors. However, error codes with the same values are not
+     * allowed in ESP-IDF. This is a workaround in order to not introduce a dependency between the "soc" and
+     * "esp_common" components. The disadvantage is that the output of esp_err_to_name(ESP_ERR_FLASH_SIZE_NOT_MATCH)
+     * will be ESP_ERR_INVALID_SIZE. */
+    ESP_ERR_FLASH_SIZE_NOT_MATCH = ESP_ERR_INVALID_SIZE,  ///< The chip doesn't have enough space for the current partition table
+    ESP_ERR_FLASH_NO_RESPONSE = ESP_ERR_INVALID_RESPONSE, ///< Chip did not respond to the command, or timed out.
+};
+
+//The ROM code has already taken 1 and 2, to avoid possible conflicts, start from 3.
+#define ESP_ERR_FLASH_NOT_INITIALISED   (ESP_ERR_FLASH_BASE+3) ///< esp_flash_chip_t structure not correctly initialised by esp_flash_init().
+#define ESP_ERR_FLASH_UNSUPPORTED_HOST  (ESP_ERR_FLASH_BASE+4) ///< Requested operation isn't supported via this host SPI bus (chip->spi field).
+#define ESP_ERR_FLASH_UNSUPPORTED_CHIP  (ESP_ERR_FLASH_BASE+5) ///< Requested operation isn't supported by this model of SPI flash chip.
+#define ESP_ERR_FLASH_PROTECTED         (ESP_ERR_FLASH_BASE+6) ///< Write operation failed due to chip's write protection being enabled.
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/eth_types.h b/tools/sdk/esp32s3/include/hal/include/hal/eth_types.h
new file mode 100644
index 00000000000..219618950ae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/eth_types.h
@@ -0,0 +1,65 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+/**
+ * @brief Ethernet frame CRC length
+ *
+ */
+#define ETH_CRC_LEN (4)
+
+/**
+* @brief Ethernet interface
+*
+*/
+typedef enum {
+    EMAC_DATA_INTERFACE_RMII,    /*!< Reduced Media Independent Interface */
+    EMAC_DATA_INTERFACE_MII,     /*!< Media Independent Interface */
+} eth_data_interface_t;
+
+/**
+* @brief Ethernet link status
+*
+*/
+typedef enum {
+    ETH_LINK_UP,  /*!< Ethernet link is up */
+    ETH_LINK_DOWN /*!< Ethernet link is down */
+} eth_link_t;
+
+/**
+* @brief Ethernet speed
+*
+*/
+typedef enum {
+    ETH_SPEED_10M,  /*!< Ethernet speed is 10Mbps */
+    ETH_SPEED_100M, /*!< Ethernet speed is 100Mbps */
+    ETH_SPEED_MAX   /*!< Max speed mode (for checking purpose) */
+} eth_speed_t;
+
+/**
+* @brief Ethernet duplex mode
+*
+*/
+typedef enum {
+    ETH_DUPLEX_HALF,    /*!< Ethernet is in half duplex */
+    ETH_DUPLEX_FULL,    /*!< Ethernet is in full duplex */
+} eth_duplex_t;
+
+/**
+* @brief Ethernet Checksum
+*/
+typedef enum {
+    ETH_CHECKSUM_SW, /*!< Ethernet checksum calculate by software */
+    ETH_CHECKSUM_HW  /*!< Ethernet checksum calculate by hardware */
+} eth_checksum_t;
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/gdma_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/gdma_hal.h
new file mode 100644
index 00000000000..5f83b483ea5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/gdma_hal.h
@@ -0,0 +1,37 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The HAL is not public api, don't use in application code.
+ * See readme.md in soc/README.md
+ ******************************************************************************/
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "soc/gdma_struct.h"
+
+typedef struct {
+    gdma_dev_t *dev;
+} gdma_hal_context_t;
+
+void gdma_hal_init(gdma_hal_context_t *hal, int group_id);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/gpio_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/gpio_hal.h
new file mode 100644
index 00000000000..018b4be1288
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/gpio_hal.h
@@ -0,0 +1,479 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for GPIO
+
+#pragma once
+
+#include "soc/gpio_periph.h"
+#include "soc/soc_caps.h"
+#include "hal/gpio_ll.h"
+#include "hal/gpio_types.h"
+
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
+#include "soc/rtc_io_reg.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Get GPIO hardware instance with giving gpio num
+#define GPIO_HAL_GET_HW(num) GPIO_LL_GET_HW(num)
+
+/**
+ * Context that should be maintained by both the driver and the HAL
+ */
+
+typedef struct {
+    gpio_dev_t *dev;
+    uint32_t version;
+} gpio_hal_context_t;
+
+/**
+  * @brief Enable pull-up on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_pullup_en(hal, gpio_num) gpio_ll_pullup_en((hal)->dev, gpio_num)
+
+/**
+  * @brief Disable pull-up on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_pullup_dis(hal, gpio_num) gpio_ll_pullup_dis((hal)->dev, gpio_num)
+
+/**
+  * @brief Enable pull-down on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_pulldown_en(hal, gpio_num) gpio_ll_pulldown_en((hal)->dev, gpio_num)
+
+/**
+  * @brief Disable pull-down on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_pulldown_dis(hal, gpio_num) gpio_ll_pulldown_dis((hal)->dev, gpio_num)
+
+/**
+ * @brief  GPIO set interrupt trigger type
+ *
+ * @param  hal Context of the HAL layer
+ * @param  gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param  intr_type Interrupt type, select from gpio_int_type_t
+ */
+#define gpio_hal_set_intr_type(hal, gpio_num, intr_type) gpio_ll_set_intr_type((hal)->dev, gpio_num, intr_type)
+
+/**
+  * @brief Get GPIO interrupt status
+  *
+  * @param hal Context of the HAL layer
+  * @param core_id interrupt core id
+  * @param status interrupt status
+  */
+#define gpio_hal_get_intr_status(hal, core_id, status) gpio_ll_get_intr_status((hal)->dev, core_id, status)
+
+/**
+  * @brief Get GPIO interrupt status high
+  *
+  * @param hal Context of the HAL layer
+  * @param core_id interrupt core id
+  * @param status interrupt status high
+  */
+#define gpio_hal_get_intr_status_high(hal, core_id, status) gpio_ll_get_intr_status_high((hal)->dev, core_id, status)
+
+/**
+  * @brief Clear GPIO interrupt status
+  *
+  * @param hal Context of the HAL layer
+  * @param mask interrupt status clear mask
+  */
+#define gpio_hal_clear_intr_status(hal, mask) gpio_ll_clear_intr_status((hal)->dev, mask)
+
+/**
+  * @brief Clear GPIO interrupt status high
+  *
+  * @param hal Context of the HAL layer
+  * @param mask interrupt status high clear mask
+  */
+#define gpio_hal_clear_intr_status_high(hal, mask) gpio_ll_clear_intr_status_high((hal)->dev, mask)
+
+/**
+ * @brief  Enable GPIO module interrupt signal
+ *
+ * @param  hal Context of the HAL layer
+ * @param  gpio_num GPIO number. If you want to enable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param  core_id Interrupt enabled CPU to corresponding ID
+ */
+void gpio_hal_intr_enable_on_core(gpio_hal_context_t *hal, gpio_num_t gpio_num, uint32_t core_id);
+
+/**
+ * @brief  Disable GPIO module interrupt signal
+ *
+ * @param  hal Context of the HAL layer
+ * @param  gpio_num GPIO number. If you want to disable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ */
+void gpio_hal_intr_disable(gpio_hal_context_t *hal, gpio_num_t gpio_num);
+
+/**
+  * @brief Disable input mode on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_input_disable(hal, gpio_num) gpio_ll_input_disable((hal)->dev, gpio_num)
+
+/**
+  * @brief Enable input mode on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_input_enable(hal, gpio_num) gpio_ll_input_enable((hal)->dev, gpio_num)
+
+/**
+  * @brief Disable output mode on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_output_disable(hal, gpio_num) gpio_ll_output_disable((hal)->dev, gpio_num)
+
+/**
+  * @brief Enable output mode on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_output_enable(hal, gpio_num) gpio_ll_output_enable((hal)->dev, gpio_num)
+
+/**
+  * @brief Disable open-drain mode on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_od_disable(hal, gpio_num) gpio_ll_od_disable((hal)->dev, gpio_num)
+
+/**
+  * @brief Enable open-drain mode on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_od_enable(hal, gpio_num) gpio_ll_od_enable((hal)->dev, gpio_num)
+
+/**
+ * @brief  GPIO set output level
+ *
+ * @param  hal Context of the HAL layer
+ * @param  gpio_num GPIO number. If you want to set the output level of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param  level Output level. 0: low ; 1: high
+ */
+#define gpio_hal_set_level(hal, gpio_num, level) gpio_ll_set_level((hal)->dev, gpio_num, level)
+
+/**
+ * @brief  GPIO get input level
+ *
+ * @warning If the pad is not configured for input (or input and output) the returned value is always 0.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  gpio_num GPIO number. If you want to get the logic level of e.g. pin GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ *
+ * @return
+ *     - 0 the GPIO input level is 0
+ *     - 1 the GPIO input level is 1
+ */
+#define gpio_hal_get_level(hal, gpio_num) gpio_ll_get_level((hal)->dev, gpio_num)
+
+/**
+ * @brief Enable GPIO wake-up function.
+ *
+ * @param hal Context of the HAL layer
+ * @param gpio_num GPIO number.
+ * @param intr_type GPIO wake-up type. Only GPIO_INTR_LOW_LEVEL or GPIO_INTR_HIGH_LEVEL can be used.
+ */
+#define gpio_hal_wakeup_enable(hal, gpio_num, intr_type) gpio_ll_wakeup_enable((hal)->dev, gpio_num, intr_type)
+
+/**
+ * @brief Disable GPIO wake-up function.
+ *
+ * @param hal Context of the HAL layer
+ * @param gpio_num GPIO number
+ */
+#define gpio_hal_wakeup_disable(hal, gpio_num) gpio_ll_wakeup_disable((hal)->dev, gpio_num)
+
+/**
+  * @brief Set GPIO pad drive capability
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number, only support output GPIOs
+  * @param strength Drive capability of the pad
+  */
+#define gpio_hal_set_drive_capability(hal, gpio_num, strength) gpio_ll_set_drive_capability((hal)->dev, gpio_num, strength)
+
+/**
+  * @brief Get GPIO pad drive capability
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number, only support output GPIOs
+  * @param strength Pointer to accept drive capability of the pad
+  */
+#define gpio_hal_get_drive_capability(hal, gpio_num, strength) gpio_ll_get_drive_capability((hal)->dev, gpio_num, strength)
+
+/**
+  * @brief Enable gpio pad hold function.
+  *
+  * The gpio pad hold function works in both input and output modes, but must be output-capable gpios.
+  * If pad hold enabled:
+  *   in output mode: the output level of the pad will be force locked and can not be changed.
+  *   in input mode: the input value read will not change, regardless the changes of input signal.
+  *
+  * The state of digital gpio cannot be held during Deep-sleep, and it will resume the hold function
+  * when the chip wakes up from Deep-sleep. If the digital gpio also needs to be held during Deep-sleep,
+  * `gpio_deep_sleep_hold_en` should also be called.
+  *
+  * Power down or call gpio_hold_dis will disable this function.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number, only support output GPIOs
+  */
+#define gpio_hal_hold_en(hal, gpio_num) gpio_ll_hold_en((hal)->dev, gpio_num)
+
+/**
+  * @brief Disable gpio pad hold function.
+  *
+  * When the chip is woken up from Deep-sleep, the gpio will be set to the default mode, so, the gpio will output
+  * the default level if this function is called. If you don't want the level changes, the gpio should be configured to
+  * a known state before this function is called.
+  *  e.g.
+  *     If you hold gpio18 high during Deep-sleep, after the chip is woken up and `gpio_hold_dis` is called,
+  *     gpio18 will output low level(because gpio18 is input mode by default). If you don't want this behavior,
+  *     you should configure gpio18 as output mode and set it to hight level before calling `gpio_hold_dis`.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number, only support output GPIOs
+  */
+#define gpio_hal_hold_dis(hal, gpio_num) gpio_ll_hold_dis((hal)->dev, gpio_num)
+
+/**
+  * @brief Enable all digital gpio pad hold function during Deep-sleep.
+  *
+  * When the chip is in Deep-sleep mode, all digital gpio will hold the state before sleep, and when the chip is woken up,
+  * the status of digital gpio will not be held. Note that the pad hold feature only works when the chip is in Deep-sleep mode,
+  * when not in sleep mode, the digital gpio state can be changed even you have called this function.
+  *
+  * Power down or call gpio_hold_dis will disable this function, otherwise, the digital gpio hold feature works as long as the chip enter Deep-sleep.
+  *
+  * @param hal Context of the HAL layer
+  */
+#define gpio_hal_deep_sleep_hold_en(hal) gpio_ll_deep_sleep_hold_en((hal)->dev)
+
+/**
+  * @brief Disable all digital gpio pad hold function during Deep-sleep.
+  *
+  * @param hal Context of the HAL layer
+  */
+#define gpio_hal_deep_sleep_hold_dis(hal) gpio_ll_deep_sleep_hold_dis((hal)->dev)
+
+/**
+  * @brief Set pad input to a peripheral signal through the IOMUX.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number of the pad.
+  * @param signal_idx Peripheral signal id to input. One of the ``*_IN_IDX`` signals in ``soc/gpio_sig_map.h``.
+  */
+#define gpio_hal_iomux_in(hal, gpio_num, signal_idx) gpio_ll_iomux_in((hal)->dev, gpio_num, signal_idx)
+
+/**
+  * @brief Set peripheral output to an GPIO pad through the IOMUX.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num gpio_num GPIO number of the pad.
+  * @param func The function number of the peripheral pin to output pin.
+  *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+#define gpio_hal_iomux_out(hal, gpio_num, func, oen_inv) gpio_ll_iomux_out((hal)->dev, gpio_num, func, oen_inv)
+
+#if SOC_GPIO_SUPPORT_FORCE_HOLD
+/**
+  * @brief Force hold digital and rtc gpio pad.
+  * @note GPIO force hold, whether the chip in sleep mode or wakeup mode.
+  *
+  * @param hal Context of the HAL layer
+  * */
+#define gpio_hal_force_hold_all(hal) gpio_ll_force_hold_all((hal)->dev)
+
+/**
+  * @brief Force unhold digital and rtc gpio pad.
+  * @note GPIO force unhold, whether the chip in sleep mode or wakeup mode.
+  *
+  * @param hal Context of the HAL layer
+  * */
+#define gpio_hal_force_unhold_all() gpio_ll_force_unhold_all()
+#endif
+
+#if SOC_GPIO_SUPPORT_SLP_SWITCH
+/**
+  * @brief Enable pull-up on GPIO when system sleep.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_sleep_pullup_en(hal, gpio_num) gpio_ll_sleep_pullup_en((hal)->dev, gpio_num)
+
+/**
+  * @brief Disable pull-up on GPIO when system sleep.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_sleep_pullup_dis(hal, gpio_num) gpio_ll_sleep_pullup_dis((hal)->dev, gpio_num)
+
+/**
+  * @brief Enable pull-down on GPIO when system sleep.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_sleep_pulldown_en(hal, gpio_num) gpio_ll_sleep_pulldown_en((hal)->dev, gpio_num)
+
+/**
+  * @brief Disable pull-down on GPIO when system sleep.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_sleep_pulldown_dis(hal, gpio_num) gpio_ll_sleep_pulldown_dis((hal)->dev, gpio_num)
+
+/**
+  * @brief Enable sleep select on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_sleep_sel_en(hal, gpio_num) gpio_ll_sleep_sel_en((hal)->dev, gpio_num)
+
+/**
+  * @brief Disable sleep select on GPIO.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_sleep_sel_dis(hal, gpio_num) gpio_ll_sleep_sel_dis((hal)->dev, gpio_num)
+
+/**
+  * @brief Disable input mode on GPIO when system sleep.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_sleep_input_disable(hal, gpio_num) gpio_ll_sleep_input_disable((hal)->dev, gpio_num)
+
+/**
+  * @brief Enable input mode on GPIO when system sleep.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_sleep_input_enable(hal, gpio_num) gpio_ll_sleep_input_enable((hal)->dev, gpio_num)
+
+/**
+  * @brief Disable output mode on GPIO when system sleep.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_sleep_output_disable(hal, gpio_num) gpio_ll_sleep_output_disable((hal)->dev, gpio_num)
+
+/**
+  * @brief Enable output mode on GPIO when system sleep.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  */
+#define gpio_hal_sleep_output_enable(hal, gpio_num) gpio_ll_sleep_output_enable((hal)->dev, gpio_num)
+
+#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
+/**
+ * @brief  Apply slp_pu/slp_pd configuration to fun_pu/fun_pd when system sleep.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  gpio_num GPIO number.
+ */
+void gpio_hal_sleep_pupd_config_apply(gpio_hal_context_t *hal, gpio_num_t gpio_num);
+
+/**
+ * @brief  Restore fun_pu/fun_pd configuration when system wakeup.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  gpio_num GPIO number.
+ */
+void gpio_hal_sleep_pupd_config_unapply(gpio_hal_context_t *hal, gpio_num_t gpio_num);
+#endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
+#endif //SOC_GPIO_SUPPORT_SLP_SWITCH
+
+#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+
+/**
+ * @brief Enable GPIO deep-sleep wake-up function.
+ *
+ * @param hal Context of the HAL layer
+ * @param gpio_num GPIO number.
+ * @param intr_type GPIO wake-up type. Only GPIO_INTR_LOW_LEVEL or GPIO_INTR_HIGH_LEVEL can be used.
+ */
+#define gpio_hal_deepsleep_wakeup_enable(hal, gpio_num, intr_type) gpio_ll_deepsleep_wakeup_enable((hal)->dev, gpio_num, intr_type)
+
+/**
+ * @brief Disable GPIO deep-sleep wake-up function.
+ *
+ * @param hal Context of the HAL layer
+ * @param gpio_num GPIO number
+ */
+#define gpio_hal_deepsleep_wakeup_disable(hal, gpio_num) gpio_ll_deepsleep_wakeup_disable((hal)->dev, gpio_num)
+
+/**
+ * @brief Judge if the gpio is valid for waking up chip from deep-sleep
+ *
+ * @param gpio_num GPIO number
+ */
+#define gpio_hal_is_valid_deepsleep_wakeup_gpio(gpio_num) (gpio_num <= GPIO_NUM_5)
+
+#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+
+/**
+ * @brief  Select a function for the pin in the IOMUX
+ *
+ * @param  pin_name Pin name to configure
+ * @param  func Function to assign to the pin
+ */
+#define gpio_hal_iomux_func_sel(pin_name, func) gpio_ll_iomux_func_sel(pin_name, func)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/gpio_types.h b/tools/sdk/esp32s3/include/hal/include/hal/gpio_types.h
new file mode 100644
index 00000000000..1678689961f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/gpio_types.h
@@ -0,0 +1,421 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/gpio_periph.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    GPIO_PORT_0 = 0,
+    GPIO_PORT_MAX,
+} gpio_port_t;
+
+#define GPIO_SEL_0              (BIT(0))                         /*!< Pin 0 selected */
+#define GPIO_SEL_1              (BIT(1))                         /*!< Pin 1 selected */
+#define GPIO_SEL_2              (BIT(2))                         /*!< Pin 2 selected */
+#define GPIO_SEL_3              (BIT(3))                         /*!< Pin 3 selected */
+#define GPIO_SEL_4              (BIT(4))                         /*!< Pin 4 selected */
+#define GPIO_SEL_5              (BIT(5))                         /*!< Pin 5 selected */
+#define GPIO_SEL_6              (BIT(6))                         /*!< Pin 6 selected */
+#define GPIO_SEL_7              (BIT(7))                         /*!< Pin 7 selected */
+#define GPIO_SEL_8              (BIT(8))                         /*!< Pin 8 selected */
+#define GPIO_SEL_9              (BIT(9))                         /*!< Pin 9 selected */
+#define GPIO_SEL_10             (BIT(10))                        /*!< Pin 10 selected */
+#define GPIO_SEL_11             (BIT(11))                        /*!< Pin 11 selected */
+#define GPIO_SEL_12             (BIT(12))                        /*!< Pin 12 selected */
+#define GPIO_SEL_13             (BIT(13))                        /*!< Pin 13 selected */
+#define GPIO_SEL_14             (BIT(14))                        /*!< Pin 14 selected */
+#define GPIO_SEL_15             (BIT(15))                        /*!< Pin 15 selected */
+#define GPIO_SEL_16             (BIT(16))                        /*!< Pin 16 selected */
+#define GPIO_SEL_17             (BIT(17))                        /*!< Pin 17 selected */
+#define GPIO_SEL_18             (BIT(18))                        /*!< Pin 18 selected */
+#define GPIO_SEL_19             (BIT(19))                        /*!< Pin 19 selected */
+#define GPIO_SEL_20             (BIT(20))                        /*!< Pin 20 selected */
+#define GPIO_SEL_21             (BIT(21))                        /*!< Pin 21 selected */
+#if CONFIG_IDF_TARGET_ESP32
+#define GPIO_SEL_22             (BIT(22))                        /*!< Pin 22 selected */
+#define GPIO_SEL_23             (BIT(23))                        /*!< Pin 23 selected */
+
+#define GPIO_SEL_25             (BIT(25))                        /*!< Pin 25 selected */
+#endif
+#define GPIO_SEL_26             (BIT(26))                        /*!< Pin 26 selected */
+#define GPIO_SEL_27             (BIT(27))                        /*!< Pin 27 selected */
+#define GPIO_SEL_28             (BIT(28))                        /*!< Pin 28 selected */
+#define GPIO_SEL_29             (BIT(29))                        /*!< Pin 29 selected */
+#define GPIO_SEL_30             (BIT(30))                        /*!< Pin 30 selected */
+#define GPIO_SEL_31             (BIT(31))                        /*!< Pin 31 selected */
+#define GPIO_SEL_32             ((uint64_t)(((uint64_t)1)<<32))  /*!< Pin 32 selected */
+#define GPIO_SEL_33             ((uint64_t)(((uint64_t)1)<<33))  /*!< Pin 33 selected */
+#define GPIO_SEL_34             ((uint64_t)(((uint64_t)1)<<34))  /*!< Pin 34 selected */
+#define GPIO_SEL_35             ((uint64_t)(((uint64_t)1)<<35))  /*!< Pin 35 selected */
+#define GPIO_SEL_36             ((uint64_t)(((uint64_t)1)<<36))  /*!< Pin 36 selected */
+#define GPIO_SEL_37             ((uint64_t)(((uint64_t)1)<<37))  /*!< Pin 37 selected */
+#define GPIO_SEL_38             ((uint64_t)(((uint64_t)1)<<38))  /*!< Pin 38 selected */
+#define GPIO_SEL_39             ((uint64_t)(((uint64_t)1)<<39))  /*!< Pin 39 selected */
+#if SOC_GPIO_PIN_COUNT > 40
+#define GPIO_SEL_40             ((uint64_t)(((uint64_t)1)<<40))  /*!< Pin 40 selected */
+#define GPIO_SEL_41             ((uint64_t)(((uint64_t)1)<<41))  /*!< Pin 41 selected */
+#define GPIO_SEL_42             ((uint64_t)(((uint64_t)1)<<42))  /*!< Pin 42 selected */
+#define GPIO_SEL_43             ((uint64_t)(((uint64_t)1)<<43))  /*!< Pin 43 selected */
+#define GPIO_SEL_44             ((uint64_t)(((uint64_t)1)<<44))  /*!< Pin 44 selected */
+#define GPIO_SEL_45             ((uint64_t)(((uint64_t)1)<<45))  /*!< Pin 45 selected */
+#define GPIO_SEL_46             ((uint64_t)(((uint64_t)1)<<46))  /*!< Pin 46 selected */
+#if CONFIG_IDF_TARGET_ESP32S3
+#define GPIO_SEL_47             ((uint64_t)(((uint64_t)1)<<47))  /*!< Pin 47 selected */
+#define GPIO_SEL_48             ((uint64_t)(((uint64_t)1)<<48))  /*!< Pin 48 selected */
+#endif
+#endif
+
+#define GPIO_PIN_REG_0          IO_MUX_GPIO0_REG
+#define GPIO_PIN_REG_1          IO_MUX_GPIO1_REG
+#define GPIO_PIN_REG_2          IO_MUX_GPIO2_REG
+#define GPIO_PIN_REG_3          IO_MUX_GPIO3_REG
+#define GPIO_PIN_REG_4          IO_MUX_GPIO4_REG
+#define GPIO_PIN_REG_5          IO_MUX_GPIO5_REG
+#define GPIO_PIN_REG_6          IO_MUX_GPIO6_REG
+#define GPIO_PIN_REG_7          IO_MUX_GPIO7_REG
+#define GPIO_PIN_REG_8          IO_MUX_GPIO8_REG
+#define GPIO_PIN_REG_9          IO_MUX_GPIO9_REG
+#define GPIO_PIN_REG_10          IO_MUX_GPIO10_REG
+#define GPIO_PIN_REG_11          IO_MUX_GPIO11_REG
+#define GPIO_PIN_REG_12          IO_MUX_GPIO12_REG
+#define GPIO_PIN_REG_13          IO_MUX_GPIO13_REG
+#define GPIO_PIN_REG_14          IO_MUX_GPIO14_REG
+#define GPIO_PIN_REG_15          IO_MUX_GPIO15_REG
+#define GPIO_PIN_REG_16          IO_MUX_GPIO16_REG
+#define GPIO_PIN_REG_17          IO_MUX_GPIO17_REG
+#define GPIO_PIN_REG_18          IO_MUX_GPIO18_REG
+#define GPIO_PIN_REG_19          IO_MUX_GPIO19_REG
+#define GPIO_PIN_REG_20          IO_MUX_GPIO20_REG
+#define GPIO_PIN_REG_21          IO_MUX_GPIO21_REG
+#define GPIO_PIN_REG_22          IO_MUX_GPIO22_REG
+#define GPIO_PIN_REG_23          IO_MUX_GPIO23_REG
+#define GPIO_PIN_REG_24          IO_MUX_GPIO24_REG
+#define GPIO_PIN_REG_25          IO_MUX_GPIO25_REG
+#define GPIO_PIN_REG_26          IO_MUX_GPIO26_REG
+#define GPIO_PIN_REG_27          IO_MUX_GPIO27_REG
+#define GPIO_PIN_REG_28          IO_MUX_GPIO28_REG
+#define GPIO_PIN_REG_29          IO_MUX_GPIO29_REG
+#define GPIO_PIN_REG_30          IO_MUX_GPIO30_REG
+#define GPIO_PIN_REG_31          IO_MUX_GPIO31_REG
+#define GPIO_PIN_REG_32          IO_MUX_GPIO32_REG
+#define GPIO_PIN_REG_33          IO_MUX_GPIO33_REG
+#define GPIO_PIN_REG_34          IO_MUX_GPIO34_REG
+#define GPIO_PIN_REG_35          IO_MUX_GPIO35_REG
+#define GPIO_PIN_REG_36          IO_MUX_GPIO36_REG
+#define GPIO_PIN_REG_37          IO_MUX_GPIO37_REG
+#define GPIO_PIN_REG_38          IO_MUX_GPIO38_REG
+#define GPIO_PIN_REG_39          IO_MUX_GPIO39_REG
+#define GPIO_PIN_REG_40          IO_MUX_GPIO40_REG
+#define GPIO_PIN_REG_41          IO_MUX_GPIO41_REG
+#define GPIO_PIN_REG_42          IO_MUX_GPIO42_REG
+#define GPIO_PIN_REG_43          IO_MUX_GPIO43_REG
+#define GPIO_PIN_REG_44          IO_MUX_GPIO44_REG
+#define GPIO_PIN_REG_45          IO_MUX_GPIO45_REG
+#define GPIO_PIN_REG_46          IO_MUX_GPIO46_REG
+#define GPIO_PIN_REG_47          IO_MUX_GPIO47_REG
+#define GPIO_PIN_REG_48          IO_MUX_GPIO48_REG
+
+#if CONFIG_IDF_TARGET_ESP32
+typedef enum {
+    GPIO_NUM_NC = -1,    /*!< Use to signal not connected to S/W */
+    GPIO_NUM_0 = 0,     /*!< GPIO0, input and output */
+    GPIO_NUM_1 = 1,     /*!< GPIO1, input and output */
+    GPIO_NUM_2 = 2,     /*!< GPIO2, input and output */
+    GPIO_NUM_3 = 3,     /*!< GPIO3, input and output */
+    GPIO_NUM_4 = 4,     /*!< GPIO4, input and output */
+    GPIO_NUM_5 = 5,     /*!< GPIO5, input and output */
+    GPIO_NUM_6 = 6,     /*!< GPIO6, input and output */
+    GPIO_NUM_7 = 7,     /*!< GPIO7, input and output */
+    GPIO_NUM_8 = 8,     /*!< GPIO8, input and output */
+    GPIO_NUM_9 = 9,     /*!< GPIO9, input and output */
+    GPIO_NUM_10 = 10,   /*!< GPIO10, input and output */
+    GPIO_NUM_11 = 11,   /*!< GPIO11, input and output */
+    GPIO_NUM_12 = 12,   /*!< GPIO12, input and output */
+    GPIO_NUM_13 = 13,   /*!< GPIO13, input and output */
+    GPIO_NUM_14 = 14,   /*!< GPIO14, input and output */
+    GPIO_NUM_15 = 15,   /*!< GPIO15, input and output */
+    GPIO_NUM_16 = 16,   /*!< GPIO16, input and output */
+    GPIO_NUM_17 = 17,   /*!< GPIO17, input and output */
+    GPIO_NUM_18 = 18,   /*!< GPIO18, input and output */
+    GPIO_NUM_19 = 19,   /*!< GPIO19, input and output */
+    GPIO_NUM_20 = 20,   /*!< GPIO20, input and output */
+    GPIO_NUM_21 = 21,   /*!< GPIO21, input and output */
+    GPIO_NUM_22 = 22,   /*!< GPIO22, input and output */
+    GPIO_NUM_23 = 23,   /*!< GPIO23, input and output */
+    GPIO_NUM_25 = 25,   /*!< GPIO25, input and output */
+    GPIO_NUM_26 = 26,   /*!< GPIO26, input and output */
+    GPIO_NUM_27 = 27,   /*!< GPIO27, input and output */
+    GPIO_NUM_28 = 28,   /*!< GPIO28, input and output */
+    GPIO_NUM_29 = 29,   /*!< GPIO29, input and output */
+    GPIO_NUM_30 = 30,   /*!< GPIO30, input and output */
+    GPIO_NUM_31 = 31,   /*!< GPIO31, input and output */
+    GPIO_NUM_32 = 32,   /*!< GPIO32, input and output */
+    GPIO_NUM_33 = 33,   /*!< GPIO33, input and output */
+    GPIO_NUM_34 = 34,   /*!< GPIO34, input mode only */
+    GPIO_NUM_35 = 35,   /*!< GPIO35, input mode only */
+    GPIO_NUM_36 = 36,   /*!< GPIO36, input mode only */
+    GPIO_NUM_37 = 37,   /*!< GPIO37, input mode only */
+    GPIO_NUM_38 = 38,   /*!< GPIO38, input mode only */
+    GPIO_NUM_39 = 39,   /*!< GPIO39, input mode only */
+    GPIO_NUM_MAX,
+/** @endcond */
+} gpio_num_t;
+#elif CONFIG_IDF_TARGET_ESP32S2
+typedef enum {
+    GPIO_NUM_NC = -1,    /*!< Use to signal not connected to S/W */
+    GPIO_NUM_0 = 0,     /*!< GPIO0, input and output */
+    GPIO_NUM_1 = 1,     /*!< GPIO1, input and output */
+    GPIO_NUM_2 = 2,     /*!< GPIO2, input and output */
+    GPIO_NUM_3 = 3,     /*!< GPIO3, input and output */
+    GPIO_NUM_4 = 4,     /*!< GPIO4, input and output */
+    GPIO_NUM_5 = 5,     /*!< GPIO5, input and output */
+    GPIO_NUM_6 = 6,     /*!< GPIO6, input and output */
+    GPIO_NUM_7 = 7,     /*!< GPIO7, input and output */
+    GPIO_NUM_8 = 8,     /*!< GPIO8, input and output */
+    GPIO_NUM_9 = 9,     /*!< GPIO9, input and output */
+    GPIO_NUM_10 = 10,   /*!< GPIO10, input and output */
+    GPIO_NUM_11 = 11,   /*!< GPIO11, input and output */
+    GPIO_NUM_12 = 12,   /*!< GPIO12, input and output */
+    GPIO_NUM_13 = 13,   /*!< GPIO13, input and output */
+    GPIO_NUM_14 = 14,   /*!< GPIO14, input and output */
+    GPIO_NUM_15 = 15,   /*!< GPIO15, input and output */
+    GPIO_NUM_16 = 16,   /*!< GPIO16, input and output */
+    GPIO_NUM_17 = 17,   /*!< GPIO17, input and output */
+    GPIO_NUM_18 = 18,   /*!< GPIO18, input and output */
+    GPIO_NUM_19 = 19,   /*!< GPIO19, input and output */
+    GPIO_NUM_20 = 20,   /*!< GPIO20, input and output */
+    GPIO_NUM_21 = 21,   /*!< GPIO21, input and output */
+    GPIO_NUM_26 = 26,   /*!< GPIO26, input and output */
+    GPIO_NUM_27 = 27,   /*!< GPIO27, input and output */
+    GPIO_NUM_28 = 28,   /*!< GPIO28, input and output */
+    GPIO_NUM_29 = 29,   /*!< GPIO29, input and output */
+    GPIO_NUM_30 = 30,   /*!< GPIO30, input and output */
+    GPIO_NUM_31 = 31,   /*!< GPIO31, input and output */
+    GPIO_NUM_32 = 32,   /*!< GPIO32, input and output */
+    GPIO_NUM_33 = 33,   /*!< GPIO33, input and output */
+    GPIO_NUM_34 = 34,   /*!< GPIO34, input and output */
+    GPIO_NUM_35 = 35,   /*!< GPIO35, input and output */
+    GPIO_NUM_36 = 36,   /*!< GPIO36, input and output */
+    GPIO_NUM_37 = 37,   /*!< GPIO37, input and output */
+    GPIO_NUM_38 = 38,   /*!< GPIO38, input and output */
+    GPIO_NUM_39 = 39,   /*!< GPIO39, input and output */
+    GPIO_NUM_40 = 40,   /*!< GPIO40, input and output */
+    GPIO_NUM_41 = 41,   /*!< GPIO41, input and output */
+    GPIO_NUM_42 = 42,   /*!< GPIO42, input and output */
+    GPIO_NUM_43 = 43,   /*!< GPIO43, input and output */
+    GPIO_NUM_44 = 44,   /*!< GPIO44, input and output */
+    GPIO_NUM_45 = 45,   /*!< GPIO45, input and output */
+    GPIO_NUM_46 = 46,   /*!< GPIO46, input mode only */
+    GPIO_NUM_MAX,
+/** @endcond */
+} gpio_num_t;
+#elif CONFIG_IDF_TARGET_ESP32S3
+typedef enum {
+    GPIO_NUM_NC = -1,    /*!< Use to signal not connected to S/W */
+    GPIO_NUM_0 = 0,     /*!< GPIO0, input and output */
+    GPIO_NUM_1 = 1,     /*!< GPIO1, input and output */
+    GPIO_NUM_2 = 2,     /*!< GPIO2, input and output */
+    GPIO_NUM_3 = 3,     /*!< GPIO3, input and output */
+    GPIO_NUM_4 = 4,     /*!< GPIO4, input and output */
+    GPIO_NUM_5 = 5,     /*!< GPIO5, input and output */
+    GPIO_NUM_6 = 6,     /*!< GPIO6, input and output */
+    GPIO_NUM_7 = 7,     /*!< GPIO7, input and output */
+    GPIO_NUM_8 = 8,     /*!< GPIO8, input and output */
+    GPIO_NUM_9 = 9,     /*!< GPIO9, input and output */
+    GPIO_NUM_10 = 10,   /*!< GPIO10, input and output */
+    GPIO_NUM_11 = 11,   /*!< GPIO11, input and output */
+    GPIO_NUM_12 = 12,   /*!< GPIO12, input and output */
+    GPIO_NUM_13 = 13,   /*!< GPIO13, input and output */
+    GPIO_NUM_14 = 14,   /*!< GPIO14, input and output */
+    GPIO_NUM_15 = 15,   /*!< GPIO15, input and output */
+    GPIO_NUM_16 = 16,   /*!< GPIO16, input and output */
+    GPIO_NUM_17 = 17,   /*!< GPIO17, input and output */
+    GPIO_NUM_18 = 18,   /*!< GPIO18, input and output */
+    GPIO_NUM_19 = 19,   /*!< GPIO19, input and output */
+    GPIO_NUM_20 = 20,   /*!< GPIO20, input and output */
+    GPIO_NUM_21 = 21,   /*!< GPIO21, input and output */
+    GPIO_NUM_26 = 26,   /*!< GPIO26, input and output */
+    GPIO_NUM_27 = 27,   /*!< GPIO27, input and output */
+    GPIO_NUM_28 = 28,   /*!< GPIO28, input and output */
+    GPIO_NUM_29 = 29,   /*!< GPIO29, input and output */
+    GPIO_NUM_30 = 30,   /*!< GPIO30, input and output */
+    GPIO_NUM_31 = 31,   /*!< GPIO31, input and output */
+    GPIO_NUM_32 = 32,   /*!< GPIO32, input and output */
+    GPIO_NUM_33 = 33,   /*!< GPIO33, input and output */
+    GPIO_NUM_34 = 34,   /*!< GPIO34, input and output */
+    GPIO_NUM_35 = 35,   /*!< GPIO35, input and output */
+    GPIO_NUM_36 = 36,   /*!< GPIO36, input and output */
+    GPIO_NUM_37 = 37,   /*!< GPIO37, input and output */
+    GPIO_NUM_38 = 38,   /*!< GPIO38, input and output */
+    GPIO_NUM_39 = 39,   /*!< GPIO39, input and output */
+    GPIO_NUM_40 = 40,   /*!< GPIO40, input and output */
+    GPIO_NUM_41 = 41,   /*!< GPIO41, input and output */
+    GPIO_NUM_42 = 42,   /*!< GPIO42, input and output */
+    GPIO_NUM_43 = 43,   /*!< GPIO43, input and output */
+    GPIO_NUM_44 = 44,   /*!< GPIO44, input and output */
+    GPIO_NUM_45 = 45,   /*!< GPIO45, input and output */
+    GPIO_NUM_46 = 46,   /*!< GPIO46, input and output */
+    GPIO_NUM_47 = 47,   /*!< GPIO47, input and output */
+    GPIO_NUM_48 = 48,   /*!< GPIO48, input and output */
+    GPIO_NUM_MAX,
+/** @endcond */
+} gpio_num_t;
+#elif CONFIG_IDF_TARGET_ESP32C3
+typedef enum {
+    GPIO_NUM_NC = -1,    /*!< Use to signal not connected to S/W */
+    GPIO_NUM_0 = 0,     /*!< GPIO0, input and output */
+    GPIO_NUM_1 = 1,     /*!< GPIO1, input and output */
+    GPIO_NUM_2 = 2,     /*!< GPIO2, input and output */
+    GPIO_NUM_3 = 3,     /*!< GPIO3, input and output */
+    GPIO_NUM_4 = 4,     /*!< GPIO4, input and output */
+    GPIO_NUM_5 = 5,     /*!< GPIO5, input and output */
+    GPIO_NUM_6 = 6,     /*!< GPIO6, input and output */
+    GPIO_NUM_7 = 7,     /*!< GPIO7, input and output */
+    GPIO_NUM_8 = 8,     /*!< GPIO8, input and output */
+    GPIO_NUM_9 = 9,     /*!< GPIO9, input and output */
+    GPIO_NUM_10 = 10,   /*!< GPIO10, input and output */
+    GPIO_NUM_11 = 11,   /*!< GPIO11, input and output */
+    GPIO_NUM_12 = 12,   /*!< GPIO12, input and output */
+    GPIO_NUM_13 = 13,   /*!< GPIO13, input and output */
+    GPIO_NUM_14 = 14,   /*!< GPIO14, input and output */
+    GPIO_NUM_15 = 15,   /*!< GPIO15, input and output */
+    GPIO_NUM_16 = 16,   /*!< GPIO16, input and output */
+    GPIO_NUM_17 = 17,   /*!< GPIO17, input and output */
+    GPIO_NUM_18 = 18,   /*!< GPIO18, input and output */
+    GPIO_NUM_19 = 19,   /*!< GPIO19, input and output */
+    GPIO_NUM_20 = 20,   /*!< GPIO20, input and output */
+    GPIO_NUM_21 = 21,   /*!< GPIO21, input and output */
+    GPIO_NUM_MAX,
+/** @endcond */
+} gpio_num_t;
+#elif CONFIG_IDF_TARGET_ESP32H2
+typedef enum {
+    GPIO_NUM_NC = -1,    /*!< Use to signal not connected to S/W */
+    GPIO_NUM_0 = 0,     /*!< GPIO0, input and output */
+    GPIO_NUM_1 = 1,     /*!< GPIO1, input and output */
+    GPIO_NUM_2 = 2,     /*!< GPIO2, input and output */
+    GPIO_NUM_3 = 3,     /*!< GPIO3, input and output */
+    GPIO_NUM_4 = 4,     /*!< GPIO4, input and output */
+    GPIO_NUM_5 = 5,     /*!< GPIO5, input and output */
+    GPIO_NUM_6 = 6,     /*!< GPIO6, input and output */
+    GPIO_NUM_7 = 7,     /*!< GPIO7, input and output */
+    GPIO_NUM_8 = 8,     /*!< GPIO8, input and output */
+    GPIO_NUM_9 = 9,     /*!< GPIO9, input and output */
+    GPIO_NUM_10 = 10,   /*!< GPIO10, input and output */
+    GPIO_NUM_11 = 11,   /*!< GPIO11, input and output */
+    GPIO_NUM_12 = 12,   /*!< GPIO12, input and output */
+    GPIO_NUM_13 = 13,   /*!< GPIO13, input and output */
+    GPIO_NUM_14 = 14,   /*!< GPIO14, input and output */
+    GPIO_NUM_15 = 15,   /*!< GPIO15, input and output */
+    GPIO_NUM_16 = 16,   /*!< GPIO16, input and output */
+    GPIO_NUM_17 = 17,   /*!< GPIO17, input and output */
+    GPIO_NUM_18 = 18,   /*!< GPIO18, input and output */
+    GPIO_NUM_19 = 19,   /*!< GPIO19, input and output */
+    GPIO_NUM_20 = 20,   /*!< GPIO20, input and output */
+    GPIO_NUM_21 = 21,   /*!< GPIO21, input and output */
+    GPIO_NUM_22 = 22,   /*!< GPIO22, input and output */
+    GPIO_NUM_26 = 26,   /*!< GPIO26, input and output */
+    GPIO_NUM_27 = 27,   /*!< GPIO27, input and output */
+    GPIO_NUM_28 = 28,   /*!< GPIO28, input and output */
+    GPIO_NUM_29 = 29,   /*!< GPIO29, input and output */
+    GPIO_NUM_30 = 30,   /*!< GPIO30, input and output */
+    GPIO_NUM_31 = 31,   /*!< GPIO31, input and output */
+    GPIO_NUM_32 = 32,   /*!< GPIO32, input and output */
+    GPIO_NUM_33 = 33,   /*!< GPIO33, input and output */
+    GPIO_NUM_34 = 34,   /*!< GPIO34, input and output */
+    GPIO_NUM_35 = 35,   /*!< GPIO35, input and output */
+    GPIO_NUM_36 = 36,   /*!< GPIO36, input and output */
+    GPIO_NUM_37 = 37,   /*!< GPIO37, input and output */
+    GPIO_NUM_38 = 38,   /*!< GPIO38, input and output */
+    GPIO_NUM_39 = 39,   /*!< GPIO39, input and output */
+    GPIO_NUM_40 = 40,   /*!< GPIO40, input and output */
+    GPIO_NUM_MAX,
+/** @endcond */
+} gpio_num_t;
+#endif
+
+typedef enum {
+    GPIO_INTR_DISABLE = 0,     /*!< Disable GPIO interrupt                             */
+    GPIO_INTR_POSEDGE = 1,     /*!< GPIO interrupt type : rising edge                  */
+    GPIO_INTR_NEGEDGE = 2,     /*!< GPIO interrupt type : falling edge                 */
+    GPIO_INTR_ANYEDGE = 3,     /*!< GPIO interrupt type : both rising and falling edge */
+    GPIO_INTR_LOW_LEVEL = 4,   /*!< GPIO interrupt type : input low level trigger      */
+    GPIO_INTR_HIGH_LEVEL = 5,  /*!< GPIO interrupt type : input high level trigger     */
+    GPIO_INTR_MAX,
+} gpio_int_type_t;
+
+/** @cond */
+#define GPIO_MODE_DEF_DISABLE         (0)
+#define GPIO_MODE_DEF_INPUT           (BIT0)    ///< bit mask for input
+#define GPIO_MODE_DEF_OUTPUT          (BIT1)    ///< bit mask for output
+#define GPIO_MODE_DEF_OD              (BIT2)    ///< bit mask for OD mode
+/** @endcond */
+
+typedef enum {
+    GPIO_MODE_DISABLE = GPIO_MODE_DEF_DISABLE,                                                         /*!< GPIO mode : disable input and output             */
+    GPIO_MODE_INPUT = GPIO_MODE_DEF_INPUT,                                                             /*!< GPIO mode : input only                           */
+    GPIO_MODE_OUTPUT = GPIO_MODE_DEF_OUTPUT,                                                           /*!< GPIO mode : output only mode                     */
+    GPIO_MODE_OUTPUT_OD = ((GPIO_MODE_DEF_OUTPUT) | (GPIO_MODE_DEF_OD)),                               /*!< GPIO mode : output only with open-drain mode     */
+    GPIO_MODE_INPUT_OUTPUT_OD = ((GPIO_MODE_DEF_INPUT) | (GPIO_MODE_DEF_OUTPUT) | (GPIO_MODE_DEF_OD)), /*!< GPIO mode : output and input with open-drain mode*/
+    GPIO_MODE_INPUT_OUTPUT = ((GPIO_MODE_DEF_INPUT) | (GPIO_MODE_DEF_OUTPUT)),                         /*!< GPIO mode : output and input mode                */
+} gpio_mode_t;
+
+typedef enum {
+    GPIO_PULLUP_DISABLE = 0x0,     /*!< Disable GPIO pull-up resistor */
+    GPIO_PULLUP_ENABLE = 0x1,      /*!< Enable GPIO pull-up resistor */
+} gpio_pullup_t;
+
+typedef enum {
+    GPIO_PULLDOWN_DISABLE = 0x0,   /*!< Disable GPIO pull-down resistor */
+    GPIO_PULLDOWN_ENABLE = 0x1,    /*!< Enable GPIO pull-down resistor  */
+} gpio_pulldown_t;
+
+/**
+ * @brief Configuration parameters of GPIO pad for gpio_config function
+ */
+typedef struct {
+    uint64_t pin_bit_mask;          /*!< GPIO pin: set with bit mask, each bit maps to a GPIO */
+    gpio_mode_t mode;               /*!< GPIO mode: set input/output mode                     */
+    gpio_pullup_t pull_up_en;       /*!< GPIO pull-up                                         */
+    gpio_pulldown_t pull_down_en;   /*!< GPIO pull-down                                       */
+    gpio_int_type_t intr_type;      /*!< GPIO interrupt type                                  */
+} gpio_config_t;
+
+typedef enum {
+    GPIO_PULLUP_ONLY,               /*!< Pad pull up            */
+    GPIO_PULLDOWN_ONLY,             /*!< Pad pull down          */
+    GPIO_PULLUP_PULLDOWN,           /*!< Pad pull up + pull down*/
+    GPIO_FLOATING,                  /*!< Pad floating           */
+} gpio_pull_mode_t;
+
+typedef enum {
+    GPIO_DRIVE_CAP_0       = 0,    /*!< Pad drive capability: weak          */
+    GPIO_DRIVE_CAP_1       = 1,    /*!< Pad drive capability: stronger      */
+    GPIO_DRIVE_CAP_2       = 2,    /*!< Pad drive capability: medium */
+    GPIO_DRIVE_CAP_DEFAULT = 2,    /*!< Pad drive capability: medium */
+    GPIO_DRIVE_CAP_3       = 3,    /*!< Pad drive capability: strongest     */
+    GPIO_DRIVE_CAP_MAX,
+} gpio_drive_cap_t;
+
+typedef void (*gpio_isr_t)(void *);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/i2c_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/i2c_hal.h
new file mode 100644
index 00000000000..b255878cc43
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/i2c_hal.h
@@ -0,0 +1,544 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for I2C
+
+#pragma once
+#include "hal/i2c_ll.h"
+#include "hal/i2c_types.h"
+
+/**
+ * @brief I2C hal Context definition
+ */
+typedef struct {
+    i2c_dev_t *dev;
+    uint32_t version;
+} i2c_hal_context_t;
+
+/**
+ * @brief  Write the I2C rxfifo with the given length
+ *
+ * @param  hal Context of the HAL layer
+ * @param  wr_data Pointer to data buffer
+ * @param  wr_size Amount of data needs write
+ *
+ * @return None
+ */
+#define i2c_hal_write_txfifo(hal,wr_data,wr_size)    i2c_ll_write_txfifo((hal)->dev,wr_data,wr_size)
+
+/**
+ * @brief  Read the I2C rxfifo with the given length
+ *
+ * @param  hal Context of the HAL layer
+ * @param  buf Pointer to data buffer
+ * @param  rd_size Amount of data needs read
+ *
+ * @return None
+ */
+#define i2c_hal_read_rxfifo(hal,buf,rd_size)    i2c_ll_read_rxfifo((hal)->dev,buf,rd_size)
+
+/**
+ * @brief  Write I2C cmd register
+ *
+ * @param  hal Context of the HAL layer
+ * @param  cmd I2C hardware command
+ * @param  cmd_idx The index of the command register, should be less than 16
+ *
+ * @return None
+ */
+#define i2c_hal_write_cmd_reg(hal,cmd, cmd_idx)    i2c_ll_write_cmd_reg((hal)->dev,cmd,cmd_idx)
+
+/**
+ * @brief  Configure the I2C to triger a transaction
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+#define i2c_hal_trans_start(hal)    i2c_ll_trans_start((hal)->dev)
+
+/**
+ * @brief  Enable I2C master RX interrupt
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+#define i2c_hal_enable_master_rx_it(hal)    i2c_ll_master_enable_rx_it((hal)->dev)
+
+/**
+ * @brief  Enable I2C master TX interrupt
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+#define i2c_hal_enable_master_tx_it(hal)    i2c_ll_master_enable_tx_it((hal)->dev)
+
+/**
+ * @brief  Clear I2C slave TX interrupt
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+#define i2c_hal_slave_clr_tx_it(hal)    i2c_ll_slave_clr_tx_it((hal)->dev)
+
+/**
+ * @brief  Clear I2C slave RX interrupt
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+#define i2c_hal_slave_clr_rx_it(hal)    i2c_ll_slave_clr_rx_it((hal)->dev)
+
+/**
+ * @brief  Set the source clock. This function is meant to be used in
+ *         slave mode, in order to select a source clock abe to handle
+ *         the expected SCL frequency.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  src_clk Source clock to use choosen from `i2c_sclk_t` type
+ */
+#define i2c_hal_set_source_clk(hal, src_clk) i2c_ll_set_source_clk((hal)->dev, src_clk)
+
+/**
+ * @brief  Init the I2C master.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  i2c_num I2C port number
+ *
+ * @return None
+ */
+void i2c_hal_master_init(i2c_hal_context_t *hal, i2c_port_t i2c_num);
+
+/**
+ * @brief  Init the I2C slave.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  i2c_num I2C port number
+ *
+ * @return None
+ */
+void i2c_hal_slave_init(i2c_hal_context_t *hal, i2c_port_t i2c_num);
+
+/**
+ * @brief  Reset the I2C hw txfifo
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+void i2c_hal_txfifo_rst(i2c_hal_context_t *hal);
+
+/**
+ * @brief  Reset the I2C hw rxfifo
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+void i2c_hal_rxfifo_rst(i2c_hal_context_t *hal);
+
+/**
+ * @brief  Configure the I2C data MSB bit shifted first or LSB bit shifted first.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  tx_mode Data format of TX
+ * @param  rx_mode Data format of RX
+ *
+ * @return None
+ */
+void i2c_hal_set_data_mode(i2c_hal_context_t *hal, i2c_trans_mode_t tx_mode, i2c_trans_mode_t rx_mode);
+
+/**
+ * @brief  Configure the I2C hardware filter function.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  filter_num If the glitch period on the line is less than this value(in APB cycle), it will be filtered out
+ *                    If `filter_num == 0`, the filter will be disabled
+ *
+ * @return None
+ */
+void i2c_hal_set_filter(i2c_hal_context_t *hal, uint8_t filter_num);
+
+/**
+ * @brief Get the I2C hardware filter configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  filter_num Pointer to accept the hardware filter configuration
+ *
+ * @return None
+ */
+void i2c_hal_get_filter(i2c_hal_context_t *hal, uint8_t *filter_num);
+
+/**
+ * @brief  Configure the I2C SCL timing
+ *
+ * @param  hal Context of the HAL layer
+ * @param  hight_period SCL high period
+ * @param  low_period SCL low period
+ *
+ * @return None
+ */
+void i2c_hal_set_scl_timing(i2c_hal_context_t *hal, int hight_period, int low_period);
+
+/**
+ * @brief Configure the I2C master SCL frequency
+ *
+ * @param  hal Context of the HAL layer
+ * @param  src_clk The I2C Source clock frequency
+ * @param  scl_freq The SCL frequency to be set
+ *
+ * @return None
+ */
+void i2c_hal_set_scl_freq(i2c_hal_context_t *hal, uint32_t src_clk, uint32_t scl_freq);
+
+/**
+ * @brief  Clear the I2C interrupt status with the given mask
+ *
+ * @param  hal Context of the HAL layer
+ * @param  mask The interrupt bitmap needs to be clearned
+ *
+ * @return None
+ */
+void i2c_hal_clr_intsts_mask(i2c_hal_context_t *hal, uint32_t mask);
+
+/**
+ * @brief  Enable the I2C interrupt with the given mask
+ *
+ * @param  hal Context of the HAL layer
+ * @param  mask The interrupt bitmap needs to be enabled
+ *
+ * @return None
+ */
+void i2c_hal_enable_intr_mask(i2c_hal_context_t *hal, uint32_t mask);
+
+/**
+ * @brief  Disable the I2C interrupt with the given mask
+ *
+ * @param  hal Context of the HAL layer
+ * @param  mask The interrupt bitmap needs to be disabled
+ *
+ * @return None
+ */
+void i2c_hal_disable_intr_mask(i2c_hal_context_t *hal, uint32_t mask);
+
+/**
+ * @brief  Configure the I2C memory access mode, FIFO mode or none FIFO mode
+ *
+ * @param  hal Context of the HAL layer
+ * @param  fifo_mode_en Set true to enable FIFO access mode, else set it false
+ *
+ * @return None
+ */
+void i2c_hal_set_fifo_mode(i2c_hal_context_t *hal, bool fifo_mode_en);
+
+/**
+ * @brief  Configure the I2C timeout value
+ *
+ * @param  hal Context of the HAL layer
+ * @param  tout_val the timeout value to be set
+ *
+ * @return None
+ */
+void i2c_hal_set_tout(i2c_hal_context_t *hal, int tout_val);
+
+/**
+ * @brief  Get the I2C time out configuration
+ *
+ * @param  tout_val Pointer to accept the timeout configuration
+ *
+ * @return None
+ */
+void i2c_hal_get_tout(i2c_hal_context_t *hal, int *tout_val);
+
+/**
+ * @brief Configure the I2C slave address
+ *
+ * @param  hal Context of the HAL layer
+ * @param  slave_addr Slave address
+ * @param  addr_10bit_en Set true to enable 10-bit slave address mode, Set false to enable 7-bit address mode
+ *
+ * @return None
+ */
+void i2c_hal_set_slave_addr(i2c_hal_context_t *hal, uint16_t slave_addr, bool addr_10bit_en);
+
+/**
+ * @brief  Configure the I2C stop timing
+ *
+ * @param  hal Context of the HAL layer
+ * @param  stop_setup The stop condition setup period (in APB cycle)
+ * @param  stop_hold The stop condition hold period (in APB cycle)
+ *
+ * @return None
+ */
+void i2c_hal_set_stop_timing(i2c_hal_context_t *hal, int stop_setup, int stop_hold);
+
+/**
+ * @brief  Configure the I2C start timing
+ *
+ * @param  hal Context of the HAL layer
+ * @param  start_setup The start condition setup period (in APB cycle)
+ * @param  start_hold The start condition hold period (in APB cycle)
+ *
+ * @return None
+ */
+void i2c_hal_set_start_timing(i2c_hal_context_t *hal, int start_setup, int start_hold);
+
+/**
+ * @brief  Configure the I2C sda sample timing
+ *
+ * @param  hal Context of the HAL layer
+ * @param  sda_sample The SDA sample time (in APB cycle)
+ * @param  sda_hold The SDA hold time (in APB cycle)
+ *
+ * @return None
+ */
+void i2c_hal_set_sda_timing(i2c_hal_context_t *hal, int sda_sample, int sda_hold);
+
+/**
+ * @brief  Configure the I2C txfifo empty threshold value
+ *
+ * @param  hal Context of the HAL layer.
+ * @param  empty_thr TxFIFO empty threshold value
+ *
+ * @return None
+ */
+void i2c_hal_set_txfifo_empty_thr(i2c_hal_context_t *hal, uint8_t empty_thr);
+
+/**
+ * @brief  Configure the I2C rxfifo full threshold value
+ *
+ * @param  hal Context of the HAL layer
+ * @param  full_thr RxFIFO full threshold value
+ *
+ * @return None
+ */
+void i2c_hal_set_rxfifo_full_thr(i2c_hal_context_t *hal, uint8_t full_thr);
+
+/**
+ * @brief  Get the I2C interrupt status
+ *
+ * @param  hal Context of the HAL layer
+ * @param  mask Pointer to accept the interrupt status
+ *
+ * @return None
+ */
+void i2c_hal_get_intsts_mask(i2c_hal_context_t *hal, uint32_t *mask);
+
+/**
+ * @brief  Check if the I2C bus is busy
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return True if the bus is busy, otherwise, fale will be returned
+ */
+bool i2c_hal_is_bus_busy(i2c_hal_context_t *hal);
+
+/**
+ * @brief  Get the I2C sda sample timing configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  sample_time Pointer to accept the SDA sample time
+ * @param  hold_time Pointer to accept the SDA hold time
+ *
+ * @return None
+ */
+void i2c_hal_get_sda_timing(i2c_hal_context_t *hal, int *sample_time, int *hold_time);
+
+/**
+ * @brief  Get the I2C stop timing configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  setup_time Pointer to accept the stop condition setup period
+ * @param  hold_time Pointer to accept the stop condition hold period
+ *
+ * @return None
+ */
+void i2c_hal_get_stop_timing(i2c_hal_context_t *hal, int *setup_time, int *hold_time);
+
+/**
+ * @brief  Get the I2C scl timing configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  high_period Pointer to accept the scl high period
+ * @param  low_period Pointer to accept the scl low period
+ *
+ * @return None
+ */
+void i2c_hal_get_scl_timing(i2c_hal_context_t *hal, int *high_period, int *low_period);
+
+/**
+ * @brief  Get the I2C start timing configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  setup_time Pointer to accept the start condition setup period
+ * @param  hold_time Pointer to accept the start condition hold period
+ *
+ * @return None
+ */
+void i2c_hal_get_start_timing(i2c_hal_context_t *hal, int *setup_time, int *hold_time);
+
+/**
+ * @brief  Check if the I2C is master mode
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return True if in master mode, otherwise, false will be returned
+ */
+bool i2c_hal_is_master_mode(i2c_hal_context_t *hal);
+
+/**
+ * @brief  Get the rxFIFO readable length
+ *
+ * @param  hal Context of the HAL layer
+ * @param  len Pointer to accept the rxFIFO readable length
+ *
+ * @return None
+ */
+void i2c_hal_get_rxfifo_cnt(i2c_hal_context_t *hal, uint32_t *len);
+
+/**
+ * @brief  Set I2C bus timing with the given frequency
+ *
+ * @param  hal Context of the HAL layer
+ * @param  scl_freq The scl frequency to be set
+ * @param  src_clk Source clock of I2C
+ *
+ * @return None
+ */
+void i2c_hal_set_bus_timing(i2c_hal_context_t *hal, int scl_freq, i2c_sclk_t src_clk);
+
+/**
+ * @brief  Get I2C txFIFO writeable length
+ *
+ * @param  hal Context of the HAL layer
+ * @param  len Pointer to accept the txFIFO writeable length
+ *
+ * @return None
+ */
+void i2c_hal_get_txfifo_cnt(i2c_hal_context_t *hal, uint32_t *len);
+
+/**
+ * @brief  Check if the I2C is master mode
+ *
+ * @param  hal Context of the HAL layer
+ * @param  tx_mode Pointer to accept the TX data mode
+ * @param  rx_mode Pointer to accept the RX data mode
+ *
+ * @return None
+ */
+void i2c_hal_get_data_mode(i2c_hal_context_t *hal, i2c_trans_mode_t *tx_mode, i2c_trans_mode_t *rx_mode);
+
+/**
+ * @brief  I2C hardware FSM reset
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+void i2c_hal_master_fsm_rst(i2c_hal_context_t *hal);
+
+/**
+ * @brief  @brief Clear I2C bus
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+void i2c_hal_master_clr_bus(i2c_hal_context_t *hal);
+
+/**
+ * @brief  Enable I2C slave TX interrupt
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+void i2c_hal_enable_slave_tx_it(i2c_hal_context_t *hal);
+
+/**
+ * @brief  Disable I2C slave TX interrupt
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+void i2c_hal_disable_slave_tx_it(i2c_hal_context_t *hal);
+
+/**
+ * @brief  Enable I2C slave RX interrupt
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+void i2c_hal_enable_slave_rx_it(i2c_hal_context_t *hal);
+
+/**
+ * @brief  Disable I2C slave RX interrupt
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+void i2c_hal_disable_slave_rx_it(i2c_hal_context_t *hal);
+
+/**
+ * @brief  I2C master handle tx interrupt event
+ *
+ * @param  hal Context of the HAL layer
+ * @param  event Pointer to accept the interrupt event
+ *
+ * @return None
+ */
+void i2c_hal_master_handle_tx_event(i2c_hal_context_t *hal, i2c_intr_event_t *event);
+
+/**
+ * @brief  I2C master handle rx interrupt event
+ *
+ * @param  hal Context of the HAL layer
+ * @param  event Pointer to accept the interrupt event
+ *
+ * @return None
+ */
+void i2c_hal_master_handle_rx_event(i2c_hal_context_t *hal, i2c_intr_event_t *event);
+
+/**
+ * @brief  I2C slave handle interrupt event
+ *
+ * @param  hal Context of the HAL layer
+ * @param  event Pointer to accept the interrupt event
+ *
+ * @return None
+ */
+void i2c_hal_slave_handle_event(i2c_hal_context_t *hal, i2c_intr_event_t *event);
+
+/**
+ * @brief Synchronize I2C status
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return None
+ *
+ */
+void i2c_hal_update_config(i2c_hal_context_t *hal);
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/i2c_types.h b/tools/sdk/esp32s3/include/hal/include/hal/i2c_types.h
new file mode 100644
index 00000000000..12147c78b7b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/i2c_types.h
@@ -0,0 +1,97 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+
+/**
+ * @brief I2C port number, can be I2C_NUM_0 ~ (I2C_NUM_MAX-1).
+ */
+typedef int i2c_port_t;
+
+typedef enum{
+    I2C_MODE_SLAVE = 0,   /*!< I2C slave mode */
+    I2C_MODE_MASTER,      /*!< I2C master mode */
+    I2C_MODE_MAX,
+} i2c_mode_t;
+
+typedef enum {
+    I2C_MASTER_WRITE = 0,   /*!< I2C write data */
+    I2C_MASTER_READ,        /*!< I2C read data */
+} i2c_rw_t;
+
+typedef enum {
+    I2C_DATA_MODE_MSB_FIRST = 0,  /*!< I2C data msb first */
+    I2C_DATA_MODE_LSB_FIRST = 1,  /*!< I2C data lsb first */
+    I2C_DATA_MODE_MAX
+} i2c_trans_mode_t;
+
+typedef enum {
+    I2C_ADDR_BIT_7 = 0,    /*!< I2C 7bit address for slave mode */
+    I2C_ADDR_BIT_10,       /*!< I2C 10bit address for slave mode */
+    I2C_ADDR_BIT_MAX,
+} i2c_addr_mode_t;
+
+typedef enum {
+    I2C_MASTER_ACK = 0x0,        /*!< I2C ack for each byte read */
+    I2C_MASTER_NACK = 0x1,       /*!< I2C nack for each byte read */
+    I2C_MASTER_LAST_NACK = 0x2,   /*!< I2C nack for the last byte*/
+    I2C_MASTER_ACK_MAX,
+} i2c_ack_type_t;
+
+/**
+ * @brief I2C clock source, sorting from smallest to largest,
+ *        place them in order.
+ *        This can be expanded in the future use.
+ */
+typedef enum {
+    I2C_SCLK_DEFAULT = 0,    /*!< I2C source clock not selected*/
+#if SOC_I2C_SUPPORT_APB
+    I2C_SCLK_APB,            /*!< I2C source clock from APB, 80M*/
+#endif
+#if SOC_I2C_SUPPORT_XTAL
+    I2C_SCLK_XTAL,           /*!< I2C source clock from XTAL, 40M */
+#endif
+#if SOC_I2C_SUPPORT_RTC
+    I2C_SCLK_RTC,            /*!< I2C source clock from 8M RTC, 8M */
+#endif
+#if SOC_I2C_SUPPORT_REF_TICK
+    I2C_SCLK_REF_TICK,       /*!< I2C source clock from REF_TICK, 1M */
+#endif
+    I2C_SCLK_MAX,
+} i2c_sclk_t;
+
+/// Use the highest speed that is available for the clock source picked by clk_flags
+#define I2C_CLK_FREQ_MAX                  (-1)
+
+#if CONFIG_IDF_TARGET_ESP32
+typedef enum{
+    I2C_CMD_RESTART = 0,   /*!<I2C restart command */
+    I2C_CMD_WRITE,         /*!<I2C write command */
+    I2C_CMD_READ,          /*!<I2C read command */
+    I2C_CMD_STOP,          /*!<I2C stop command */
+    I2C_CMD_END            /*!<I2C end command */
+} i2c_opmode_t __attribute__((deprecated));
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/i2s_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/i2s_hal.h
new file mode 100644
index 00000000000..037970fa2b3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/i2s_hal.h
@@ -0,0 +1,544 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for I2S.
+// There is no parameter check in the hal layer, so the caller must ensure the correctness of the parameters.
+
+#pragma once
+
+#include "soc/i2s_periph.h"
+#include "soc/soc_caps.h"
+#include "hal/i2s_types.h"
+#include "hal/i2s_ll.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief I2S clock configuration
+ */
+typedef struct {
+    uint32_t sclk;          /*!< I2S module clock */
+    uint32_t mclk;          /*!< I2S master clock */
+    uint32_t bclk;          /*!< I2S bit clock */
+    uint16_t mclk_div;      /*!< I2S master clock division */
+    uint16_t bclk_div;      /*!< I2S bit clock division*/
+} i2s_hal_clock_cfg_t;
+
+
+/**
+ * @brief I2S HAL configurations
+ */
+typedef struct {
+    i2s_mode_t              mode;                   /*!< I2S work mode, using ored mask of `i2s_mode_t`*/
+    uint32_t                sample_rate;            /*!< I2S sample rate*/
+    i2s_comm_format_t       comm_fmt;               /*!< I2S communication format */
+    i2s_channel_fmt_t       chan_fmt;               /*!< I2S channel format, there are total 16 channels in TDM mode.*/
+    uint32_t                sample_bits;            /*!< I2S sample bits in one channel */
+    uint32_t                chan_bits;              /*!< I2S total bits in one channel. Should not be smaller than 'sample_bits', default '0' means equal to 'sample_bits' */
+    uint32_t                active_chan;            /*!< I2S active channel number */
+    uint32_t                total_chan;             /*!< Total number of I2S channels */
+
+#if SOC_I2S_SUPPORTS_TDM
+    uint32_t                chan_mask;              /*!< Active channel bit mask, set value in `i2s_channel_t` to enable specific channel, the bit map of active channel can not exceed (0x1<<total_chan_num). */
+    bool                    left_align;             /*!< Set to enable left aligment */
+    bool                    big_edin;               /*!< Set to enable big edin */
+    bool                    bit_order_msb;          /*!< Set to enable msb order */
+    bool                    skip_msk;               /*!< Set to enable skip mask. If it is enabled, only the data of the enabled channels will be sent, otherwise all data stored in DMA TX buffer will be sent */
+#endif
+} i2s_hal_config_t;
+
+/**
+ * Context that should be maintained by both the driver and the HAL
+ */
+typedef struct {
+    i2s_dev_t *dev;
+    uint32_t version;
+} i2s_hal_context_t;
+
+/**
+ * @brief Enable I2S module clock
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_enable_module_clock(hal)        i2s_ll_enable_clock((hal)->dev);
+
+/**
+ * @brief Disable I2S module clock
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_disable_module_clock(hal)       i2s_ll_disable_clock((hal)->dev);
+
+/**
+ * @brief Reset I2S TX channel
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_reset_tx(hal)                   i2s_ll_tx_reset((hal)->dev)
+
+/**
+ * @brief Reset I2S TX fifo
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_reset_tx_fifo(hal)              i2s_ll_tx_reset_fifo((hal)->dev)
+
+/**
+ * @brief Reset I2S RX channel
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_reset_rx(hal)                   i2s_ll_rx_reset((hal)->dev)
+
+/**
+ * @brief Reset I2S RX fifo
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_reset_rx_fifo(hal)              i2s_ll_rx_reset_fifo((hal)->dev)
+
+/**
+ * @brief Get I2S hardware instance and enable I2S module clock
+ * @note  This function should be called first before other hal layer function is called
+ *
+ * @param hal Context of the HAL layer
+ * @param i2s_num The uart port number, the max port number is (I2S_NUM_MAX -1)
+ */
+void i2s_hal_init(i2s_hal_context_t *hal, int i2s_num);
+
+/**
+ * @brief Configure I2S source clock
+ *
+ * @param hal Context of the HAL layer
+ * @param sel The source clock index
+ */
+void i2s_hal_set_clock_src(i2s_hal_context_t *hal, i2s_clock_src_t sel);
+
+/**
+ * @brief Set Tx channel style
+ *
+ * @param hal Context of the HAL layer
+ * @param hal_cfg I2S hal configuration structer, refer to `i2s_hal_config_t`
+ */
+void i2s_hal_tx_set_channel_style(i2s_hal_context_t *hal, const i2s_hal_config_t *hal_cfg);
+
+/**
+ * @brief Set Rx channel style
+ *
+ * @param hal Context of the HAL layer
+ * @param hal_cfg I2S hal configuration structer, refer to `i2s_hal_config_t`
+ */
+void i2s_hal_rx_set_channel_style(i2s_hal_context_t *hal, const i2s_hal_config_t *hal_cfg);
+
+/**
+ * @brief Initialize I2S hardware
+ *
+ * @param hal Context of the HAL layer
+ * @param hal_cfg I2S hal configuration structer, refer to `i2s_hal_config_t`
+ */
+void i2s_hal_config_param(i2s_hal_context_t *hal, const i2s_hal_config_t *hal_cfg);
+
+/**
+ * @brief Enable I2S master full-duplex mode
+ *
+ * @param hal Context of the HAL layer
+ */
+void i2s_hal_enable_master_fd_mode(i2s_hal_context_t *hal);
+
+/**
+ * @brief Enable I2S slave full-duplex mode
+ *
+ * @param hal Context of the HAL layer
+ */
+void i2s_hal_enable_slave_fd_mode(i2s_hal_context_t *hal);
+
+/**
+ * @brief Start I2S tx
+ *
+ * @param hal Context of the HAL layer
+ */
+void i2s_hal_start_tx(i2s_hal_context_t *hal);
+
+/**
+ * @brief Start I2S rx
+ *
+ * @param hal Context of the HAL layer
+ */
+void i2s_hal_start_rx(i2s_hal_context_t *hal);
+
+/**
+ * @brief Stop I2S tx
+ *
+ * @param hal Context of the HAL layer
+ */
+void i2s_hal_stop_tx(i2s_hal_context_t *hal);
+
+/**
+ * @brief Stop I2S rx
+ *
+ * @param hal Context of the HAL layer
+ */
+void i2s_hal_stop_rx(i2s_hal_context_t *hal);
+
+/**
+ * @brief Set the received data length to trigger `in_suc_eof` interrupt.
+ *
+ * @param hal Context of the HAL layer
+ * @param eof_byte The byte length that trigger in_suc_eof interrupt.
+ */
+#define i2s_hal_set_rx_eof_num(hal, eof_byte)   i2s_ll_rx_set_eof_num((hal)->dev, eof_byte)
+
+/**
+ * @brief Set I2S TX sample bit
+ *
+ * @param hal Context of the HAL layer
+ * @param chan_bit I2S TX chan bit
+ * @param data_bit The sample data bit length.
+ */
+#define i2s_hal_set_tx_sample_bit(hal, chan_bit, data_bit)  i2s_ll_tx_set_sample_bit((hal)->dev, chan_bit, data_bit)
+
+/**
+ * @brief Set I2S RX sample bit
+ *
+ * @param hal Context of the HAL layer
+ * @param chan_bit I2S RX chan bit
+ * @param data_bit The sample data bit length.
+ */
+#define i2s_hal_set_rx_sample_bit(hal, chan_bit, data_bit)  i2s_ll_rx_set_sample_bit((hal)->dev, chan_bit, data_bit)
+
+/**
+ * @brief Configure I2S TX module clock devider
+ *
+ * @param hal Context of the HAL layer
+ * @param clk_cfg I2S clock configuration
+ */
+void i2s_hal_tx_clock_config(i2s_hal_context_t *hal, i2s_hal_clock_cfg_t *clk_cfg);
+
+/**
+ * @brief Configure I2S RX module clock devider
+ *
+ * @param hal Context of the HAL layer
+ * @param clk_cfg I2S clock configuration
+ */
+void i2s_hal_rx_clock_config(i2s_hal_context_t *hal, i2s_hal_clock_cfg_t *clk_cfg);
+
+/**
+ * @brief Set I2S tx clock source
+ *
+ * @param hal Context of the HAL layer
+ * @param clk_src i2s tx clock source (see 'i2s_clock_src_t')
+ */
+#define i2s_hal_tx_set_clock_source(hal, clk_src)   i2s_ll_tx_clk_set_src((hal)->dev, clk_src)
+
+/**
+ * @brief Set I2S rx clock source
+ *
+ * @param hal Context of the HAL layer
+ * @param clk_src i2s rx clock source (see 'i2s_clock_src_t')
+ */
+#define i2s_hal_rx_set_clock_source(hal, clk_src)   i2s_ll_rx_clk_set_src((hal)->dev, clk_src)
+
+/**
+ * @brief Enable I2S tx slave mode
+ *
+ * @param hal Context of the HAL layer
+ * @param enable set 'true' to enable tx slave mode
+ */
+#define i2s_hal_tx_enable_slave_mode(hal, enable)   i2s_ll_tx_set_slave_mod((hal)->dev, enable)
+
+/**
+ * @brief Enable I2S rx slave mode
+ *
+ * @param hal Context of the HAL layer
+ * @param enable set 'true' to enable rx slave mode
+ */
+#define i2s_hal_rx_enable_slave_mode(hal, enable)   i2s_ll_rx_set_slave_mod((hal)->dev, enable)
+
+/**
+ * @brief Enable loopback mode
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_enable_sig_loopback(hal)    i2s_ll_share_bck_ws((hal)->dev, true)
+
+/**
+ * @brief Set I2S configuration for common TX mode
+ * @note Common mode is for non-PDM mode like philip/MSB/PCM
+ *
+ * @param hal Context of the HAL layer
+ * @param hal_cfg hal configuration structure
+ */
+void i2s_hal_tx_set_common_mode(i2s_hal_context_t *hal, const i2s_hal_config_t *hal_cfg);
+
+/**
+ * @brief Set I2S configuration for common RX mode
+ * @note Common mode is for non-PDM mode like philip/MSB/PCM
+ *
+ * @param hal Context of the HAL layer
+ * @param hal_cfg hal configuration structure
+ */
+void i2s_hal_rx_set_common_mode(i2s_hal_context_t *hal, const i2s_hal_config_t *hal_cfg);
+
+#if SOC_I2S_SUPPORTS_PCM
+/**
+ * @brief Configure I2S TX PCM encoder or decoder.
+ *
+ * @param hal Context of the HAL layer
+ * @param cfg PCM configure paramater, refer to `i2s_pcm_compress_t`
+ */
+#define i2s_hal_tx_pcm_cfg(hal, cfg)        i2s_ll_tx_set_pcm_type((hal)->dev, cfg)
+
+/**
+ * @brief Configure I2S RX PCM encoder or decoder.
+ *
+ * @param hal Context of the HAL layer
+ * @param cfg PCM configure paramater, refer to `i2s_pcm_compress_t`
+ */
+#define i2s_hal_rx_pcm_cfg(hal, cfg)        i2s_ll_rx_set_pcm_type((hal)->dev, cfg)
+#endif
+
+#if SOC_I2S_SUPPORTS_PDM_TX
+/**
+ * @brief Configure I2S TX PDM sample rate
+ *        Fpdm = 64*Fpcm*fp/fs
+ *
+ * @param hal Context of the HAL layer
+ * @param fp TX PDM fp paramater configuration
+ * @param fs TX PDM fs paramater configuration
+ */
+#define i2s_hal_set_tx_pdm_fpfs(hal, fp, fs)    i2s_ll_tx_set_pdm_fpfs((hal)->dev, fp, fs)
+
+/**
+ * @brief Get I2S TX PDM fp
+ *
+ * @param hal Context of the HAL layer
+ * @return
+ *        - fp configuration paramater
+ */
+#define i2s_hal_get_tx_pdm_fp(hal)      i2s_ll_tx_get_pdm_fp((hal)->dev)
+
+/**
+ * @brief Get I2S TX PDM fs
+ *
+ * @param hal Context of the HAL layer
+ * @return
+ *        - fs configuration paramater
+ */
+#define i2s_hal_get_tx_pdm_fs(hal)      i2s_ll_tx_get_pdm_fs((hal)->dev)
+
+/**
+ * @brief Set I2S default configuration for PDM TX mode
+ *
+ * @param hal Context of the HAL layer
+ * @param sample_rate PDM sample rate
+ */
+void i2s_hal_tx_set_pdm_mode_default(i2s_hal_context_t *hal, uint32_t sample_rate);
+#endif
+
+#if SOC_I2S_SUPPORTS_PDM_RX
+
+/**
+ * @brief Configure RX PDM downsample
+ *
+ * @param hal Context of the HAL layer
+ * @param dsr PDM downsample configuration paramater
+ */
+#define i2s_hal_set_rx_pdm_dsr(hal, dsr)         i2s_ll_rx_set_pdm_dsr((hal)->dev, dsr)
+
+/**
+ * @brief Get RX PDM downsample configuration
+ *
+ * @param hal Context of the HAL layer
+ * @param dsr Pointer to accept PDM downsample configuration
+ */
+#define i2s_hal_get_rx_pdm_dsr(hal, dsr)        i2s_ll_rx_get_pdm_dsr((hal)->dev, dsr)
+
+/**
+ * @brief Set I2S default configuration for PDM R mode
+ *
+ * @param hal Context of the HAL layer
+ */
+void i2s_hal_rx_set_pdm_mode_default(i2s_hal_context_t *hal);
+#endif
+
+#if !SOC_GDMA_SUPPORTED
+/**
+ * @brief Enable I2S TX DMA
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_enable_tx_dma(hal) i2s_ll_enable_dma((hal)->dev,true)
+
+/**
+ * @brief Enable I2S RX DMA
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_enable_rx_dma(hal) i2s_ll_enable_dma((hal)->dev,true)
+
+/**
+ * @brief Disable I2S TX DMA
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_disable_tx_dma(hal) i2s_ll_enable_dma((hal)->dev,false)
+
+/**
+ * @brief Disable I2S RX DMA
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_disable_rx_dma(hal) i2s_ll_enable_dma((hal)->dev,false)
+
+/**
+ * @brief Get I2S interrupt status
+ *
+ * @param hal Context of the HAL layer
+ * @return
+ *        - module interrupt status
+ */
+#define i2s_hal_get_intr_status(hal) i2s_ll_get_intr_status((hal)->dev)
+
+/**
+ * @brief Get I2S interrupt status
+ *
+ * @param hal Context of the HAL layer
+ * @param mask Interrupt mask to be cleared.
+ */
+#define i2s_hal_clear_intr_status(hal, mask) i2s_ll_clear_intr_status((hal)->dev, mask)
+
+/**
+ * @brief Enable I2S RX interrupt
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_enable_rx_intr(hal) i2s_ll_rx_enable_intr((hal)->dev)
+
+/**
+ * @brief Disable I2S RX interrupt
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_disable_rx_intr(hal) i2s_ll_rx_disable_intr((hal)->dev)
+
+/**
+ * @brief Disable I2S TX interrupt
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_disable_tx_intr(hal) i2s_ll_tx_disable_intr((hal)->dev)
+
+/**
+ * @brief Enable I2S TX interrupt
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_enable_tx_intr(hal) i2s_ll_tx_enable_intr((hal)->dev)
+
+/**
+ * @brief Configure TX DMA descriptor address and start TX DMA
+ *
+ * @param hal Context of the HAL layer
+ * @param link_addr DMA descriptor link address.
+ */
+#define i2s_hal_start_tx_link(hal, link_addr) i2s_ll_tx_start_link((hal)->dev, link_addr)
+
+/**
+ * @brief Configure RX DMA descriptor address and start RX DMA
+ *
+ * @param hal Context of the HAL layer
+ * @param link_addr DMA descriptor link address.
+ */
+#define i2s_hal_start_rx_link(hal, link_addr) i2s_ll_rx_start_link((hal)->dev, link_addr)
+
+/**
+ * @brief Stop TX DMA link
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_stop_tx_link(hal) i2s_ll_tx_stop_link((hal)->dev)
+
+/**
+ * @brief Stop RX DMA link
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_stop_rx_link(hal) i2s_ll_rx_stop_link((hal)->dev)
+
+/**
+ * @brief Reset RX DMA
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_reset_rxdma(hal) i2s_ll_rx_reset_dma((hal)->dev)
+
+/**
+ * @brief Reset TX DMA
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_reset_txdma(hal) i2s_ll_tx_reset_dma((hal)->dev)
+
+/**
+ * @brief Get I2S out eof descriptor address
+ *
+ * @param hal Context of the HAL layer
+ * @param addr Pointer to accept out eof des address
+ */
+#define i2s_hal_get_out_eof_des_addr(hal, addr) i2s_ll_tx_get_eof_des_addr((hal)->dev, addr)
+
+/**
+ * @brief Get I2S in suc eof descriptor address
+ *
+ * @param hal Context of the HAL layer
+ * @param addr Pointer to accept in suc eof des address
+ */
+#define i2s_hal_get_in_eof_des_addr(hal, addr) i2s_ll_rx_get_eof_des_addr((hal)->dev, addr)
+#endif
+
+#if SOC_I2S_SUPPORTS_ADC
+/**
+ * @brief Enable Builtin DAC
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_enable_builtin_dac(hal)      i2s_ll_enable_builtin_dac((hal)->dev, true);
+
+/**
+ * @brief Enable Builtin ADC
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_enable_builtin_adc(hal)      i2s_ll_enable_builtin_adc((hal)->dev, true);
+
+/**
+ * @brief Disable Builtin ADC
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_disable_builtin_adc(hal)     i2s_ll_enable_builtin_adc((hal)->dev, false);
+#endif
+
+#if SOC_I2S_SUPPORTS_DAC
+/**
+ * @brief Disable Builtin DAC
+ *
+ * @param hal Context of the HAL layer
+ */
+#define i2s_hal_disable_builtin_dac(hal)     i2s_ll_enable_builtin_dac((hal)->dev, false);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/i2s_types.h b/tools/sdk/esp32s3/include/hal/include/hal/i2s_types.h
new file mode 100644
index 00000000000..dcf0ab4d0b8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/i2s_types.h
@@ -0,0 +1,200 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief I2S bit width per sample.
+ *
+ */
+typedef enum {
+    I2S_BITS_PER_SAMPLE_8BIT    = 8,            /*!< data bit-width: 8 */
+    I2S_BITS_PER_SAMPLE_16BIT   = 16,           /*!< data bit-width: 16 */
+    I2S_BITS_PER_SAMPLE_24BIT   = 24,           /*!< data bit-width: 24 */
+    I2S_BITS_PER_SAMPLE_32BIT   = 32,           /*!< data bit-width: 32 */
+} i2s_bits_per_sample_t;
+
+/**
+ * @brief I2S bit width per chan.
+ *
+ */
+typedef enum {
+    I2S_BITS_PER_CHAN_DEFAULT        = (0),      /*!< channel bit-width equals to data bit-width */
+    I2S_BITS_PER_CHAN_8BIT           = (8),      /*!< channel bit-width: 8 */
+    I2S_BITS_PER_CHAN_16BIT          = (16),     /*!< channel bit-width: 16 */
+    I2S_BITS_PER_CHAN_24BIT          = (24),     /*!< channel bit-width: 24 */
+    I2S_BITS_PER_CHAN_32BIT          = (32),     /*!< channel bit-width: 32 */
+} i2s_bits_per_chan_t;
+
+/**
+ * @brief I2S channel.
+ *
+ */
+typedef enum {
+    I2S_CHANNEL_MONO        = 1,  /*!< I2S channel (mono), one channel activated. In this mode, you only need to send one channel data but the fifo will copy same data for the other unactivated channels automatically, then both channels will transmit same data. */
+    I2S_CHANNEL_STEREO      = 2,  /*!< I2S channel (stereo), two (or more) channels activated. In this mode, these channels will transmit different data. */
+#if SOC_I2S_SUPPORTS_TDM
+    // Bit map of activated chan.
+    // There are 16 channels in TDM mode.
+    // For TX module, only the activated channel send the audio data, the unactivated channel send a constant(configurable) or will be skiped if 'skip_msk' is set.
+    // For RX module, only receive the audio data in activated channels, the data in unactivated channels will be ignored.
+    // the bit map of activated channel can not exceed the maximum enabled channel number (i.e. 0x10000 << total_chan_num).
+    // e.g: active_chan_mask = (I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH3), here the active_chan_number is 2 and total_chan_num is not supposed to be smaller than 4.
+    I2S_TDM_ACTIVE_CH0  = (0x1 << 16),               /*!< I2S channel 0 activated */
+    I2S_TDM_ACTIVE_CH1  = (0x1 << 17),               /*!< I2S channel 1 activated */
+    I2S_TDM_ACTIVE_CH2  = (0x1 << 18),               /*!< I2S channel 2 activated */
+    I2S_TDM_ACTIVE_CH3  = (0x1 << 19),               /*!< I2S channel 3 activated */
+    I2S_TDM_ACTIVE_CH4  = (0x1 << 20),               /*!< I2S channel 4 activated */
+    I2S_TDM_ACTIVE_CH5  = (0x1 << 21),               /*!< I2S channel 5 activated */
+    I2S_TDM_ACTIVE_CH6  = (0x1 << 22),               /*!< I2S channel 6 activated */
+    I2S_TDM_ACTIVE_CH7  = (0x1 << 23),               /*!< I2S channel 7 activated */
+    I2S_TDM_ACTIVE_CH8  = (0x1 << 24),               /*!< I2S channel 8 activated */
+    I2S_TDM_ACTIVE_CH9  = (0x1 << 25),               /*!< I2S channel 9 activated */
+    I2S_TDM_ACTIVE_CH10 = (0x1 << 26),              /*!< I2S channel 10 activated */
+    I2S_TDM_ACTIVE_CH11 = (0x1 << 27),              /*!< I2S channel 11 activated */
+    I2S_TDM_ACTIVE_CH12 = (0x1 << 28),              /*!< I2S channel 12 activated */
+    I2S_TDM_ACTIVE_CH13 = (0x1 << 29),              /*!< I2S channel 13 activated */
+    I2S_TDM_ACTIVE_CH14 = (0x1 << 30),              /*!< I2S channel 14 activated */
+    I2S_TDM_ACTIVE_CH15 = (0x1 << 31),              /*!< I2S channel 15 activated */
+#endif
+} i2s_channel_t;
+
+/**
+ * @brief I2S communication standard format
+ *
+ */
+typedef enum {
+    I2S_COMM_FORMAT_STAND_I2S        = 0X01, /*!< I2S communication I2S Philips standard, data launch at second BCK*/
+    I2S_COMM_FORMAT_STAND_MSB        = 0X02, /*!< I2S communication MSB alignment standard, data launch at first BCK*/
+    I2S_COMM_FORMAT_STAND_PCM_SHORT  = 0x04, /*!< PCM Short standard, also known as DSP mode. The period of synchronization signal (WS) is 1 bck cycle.*/
+    I2S_COMM_FORMAT_STAND_PCM_LONG   = 0x0C, /*!< PCM Long standard. The period of synchronization signal (WS) is channel_bit*bck cycles.*/
+    I2S_COMM_FORMAT_STAND_MAX,               /*!< standard max*/
+
+    //old definition will be removed in the future.
+    I2S_COMM_FORMAT_I2S       __attribute__((deprecated)) = 0x01, /*!< I2S communication format I2S, correspond to `I2S_COMM_FORMAT_STAND_I2S`*/
+    I2S_COMM_FORMAT_I2S_MSB   __attribute__((deprecated)) = 0x01, /*!< I2S format MSB, (I2S_COMM_FORMAT_I2S |I2S_COMM_FORMAT_I2S_MSB) correspond to `I2S_COMM_FORMAT_STAND_I2S`*/
+    I2S_COMM_FORMAT_I2S_LSB   __attribute__((deprecated)) = 0x02, /*!< I2S format LSB, (I2S_COMM_FORMAT_I2S |I2S_COMM_FORMAT_I2S_LSB) correspond to `I2S_COMM_FORMAT_STAND_MSB`*/
+    I2S_COMM_FORMAT_PCM       __attribute__((deprecated)) = 0x04, /*!< I2S communication format PCM, correspond to `I2S_COMM_FORMAT_STAND_PCM_SHORT`*/
+    I2S_COMM_FORMAT_PCM_SHORT __attribute__((deprecated)) = 0x04, /*!< PCM Short, (I2S_COMM_FORMAT_PCM | I2S_COMM_FORMAT_PCM_SHORT) correspond to `I2S_COMM_FORMAT_STAND_PCM_SHORT`*/
+    I2S_COMM_FORMAT_PCM_LONG  __attribute__((deprecated)) = 0x08, /*!< PCM Long, (I2S_COMM_FORMAT_PCM | I2S_COMM_FORMAT_PCM_LONG) correspond to `I2S_COMM_FORMAT_STAND_PCM_LONG`*/
+} i2s_comm_format_t;
+
+/**
+ * @brief I2S channel format type
+ */
+typedef enum {
+    I2S_CHANNEL_FMT_RIGHT_LEFT,         /*!< Separated left and right channel */
+    I2S_CHANNEL_FMT_ALL_RIGHT,          /*!< Load right channel data in both two channels */
+    I2S_CHANNEL_FMT_ALL_LEFT,           /*!< Load left channel data in both two channels */
+    I2S_CHANNEL_FMT_ONLY_RIGHT,         /*!< Only load data in right channel (mono mode) */
+    I2S_CHANNEL_FMT_ONLY_LEFT,          /*!< Only load data in left channel (mono mode) */
+#if SOC_I2S_SUPPORTS_TDM
+    // Multiple channels are available with TDM feature
+    I2S_CHANNEL_FMT_MULTIPLE,           /*!< More than two channels are used */
+#endif
+}  i2s_channel_fmt_t;
+
+/**
+ * @brief I2S Mode
+ */
+typedef enum {
+    I2S_MODE_MASTER       = (0x1 << 0),       /*!< Master mode*/
+    I2S_MODE_SLAVE        = (0x1 << 1),       /*!< Slave mode*/
+    I2S_MODE_TX           = (0x1 << 2),       /*!< TX mode*/
+    I2S_MODE_RX           = (0x1 << 3),       /*!< RX mode*/
+#if SOC_I2S_SUPPORTS_DAC
+    //built-in DAC functions are only supported on I2S0 for ESP32 chip.
+    I2S_MODE_DAC_BUILT_IN = (0x1 << 4),       /*!< Output I2S data to built-in DAC, no matter the data format is 16bit or 32 bit, the DAC module will only take the 8bits from MSB*/
+#endif // SOC_I2S_SUPPORTS_DAC
+#if SOC_I2S_SUPPORTS_ADC
+    I2S_MODE_ADC_BUILT_IN = (0x1 << 5),       /*!< Input I2S data from built-in ADC, each data can be 12-bit width at most*/
+#endif // SOC_I2S_SUPPORTS_ADC
+    // PDM functions are only supported on I2S0 (all chips).
+    I2S_MODE_PDM          = (0x1 << 6),       /*!< I2S PDM mode*/
+} i2s_mode_t;
+
+/**
+ * @brief I2S source clock
+ */
+typedef enum {
+    I2S_CLK_D2CLK = 0,               /*!< Clock from PLL_D2_CLK(160M)*/
+#if SOC_I2S_SUPPORTS_APLL
+    I2S_CLK_APLL,                    /*!< Clock from APLL*/
+#endif
+} i2s_clock_src_t;
+
+/**
+ * @brief The multiple of mclk to sample rate
+ */
+typedef enum {
+    I2S_MCLK_MULTIPLE_DEFAULT   = 0,       /*!< Default value. mclk = sample_rate * 256 */
+    I2S_MCLK_MULTIPLE_128       = 128,     /*!< mclk = sample_rate * 128 */
+    I2S_MCLK_MULTIPLE_256       = 256,     /*!< mclk = sample_rate * 256 */
+    I2S_MCLK_MULTIPLE_384       = 384,     /*!< mclk = sample_rate * 384 */
+} i2s_mclk_multiple_t;
+
+#if SOC_I2S_SUPPORTS_DAC
+/**
+ * @brief I2S DAC mode for i2s_set_dac_mode.
+ *
+ * @note Built-in DAC functions are only supported on I2S0 for current ESP32 chip.
+ */
+typedef enum {
+    I2S_DAC_CHANNEL_DISABLE  = 0,    /*!< Disable I2S built-in DAC signals*/
+    I2S_DAC_CHANNEL_RIGHT_EN = 1,    /*!< Enable I2S built-in DAC right channel, maps to DAC channel 1 on GPIO25*/
+    I2S_DAC_CHANNEL_LEFT_EN  = 2,    /*!< Enable I2S built-in DAC left  channel, maps to DAC channel 2 on GPIO26*/
+    I2S_DAC_CHANNEL_BOTH_EN  = 0x3,  /*!< Enable both of the I2S built-in DAC channels.*/
+    I2S_DAC_CHANNEL_MAX      = 0x4,  /*!< I2S built-in DAC mode max index*/
+} i2s_dac_mode_t;
+#endif //SOC_I2S_SUPPORTS_DAC
+
+#if SOC_I2S_SUPPORTS_PCM
+/**
+ * @brief A/U-law decompress or compress configuration.
+ *
+ */
+typedef enum {
+    I2S_PCM_DISABLE = 0,      /*!< Disable A/U law decopress or compress*/
+    I2S_PCM_A_DECOMPRESS,     /*!< A-law decompress*/
+    I2S_PCM_A_COMPRESS,       /*!< A-law compress*/
+    I2S_PCM_U_DECOMPRESS,     /*!< U-law decompress*/
+    I2S_PCM_U_COMPRESS,       /*!< U-law compress*/
+} i2s_pcm_compress_t;
+#endif
+
+#if SOC_I2S_SUPPORTS_PDM_RX
+/**
+ * @brief I2S PDM RX downsample mode
+ */
+typedef enum {
+    I2S_PDM_DSR_8S = 0,  /*!< downsampling number is 8 for PDM RX mode*/
+    I2S_PDM_DSR_16S,     /*!< downsampling number is 16 for PDM RX mode*/
+    I2S_PDM_DSR_MAX,
+} i2s_pdm_dsr_t;
+#endif
+
+#if SOC_I2S_SUPPORTS_PDM_TX
+typedef enum {
+    I2S_PDM_SIG_SCALING_DIV_2 = 0,   /*!< I2S TX PDM sigmadelta signal scaling: /2 */
+    I2S_PDM_SIG_SCALING_MUL_1 = 1,   /*!< I2S TX PDM sigmadelta signal scaling: x1 */
+    I2S_PDM_SIG_SCALING_MUL_2 = 2,   /*!< I2S TX PDM sigmadelta signal scaling: x2 */
+    I2S_PDM_SIG_SCALING_MUL_4 = 3,   /*!< I2S TX PDM sigmadelta signal scaling: x4 */
+} i2s_pdm_sig_scale_t;
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/interrupt_controller_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/interrupt_controller_hal.h
new file mode 100644
index 00000000000..39a5a8e6847
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/interrupt_controller_hal.h
@@ -0,0 +1,196 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdbool.h>
+#include "hal/interrupt_controller_types.h"
+#include "hal/interrupt_controller_ll.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef SOC_CPU_HAS_FLEXIBLE_INTC
+/**
+ * @brief Gets target platform interrupt descriptor table
+ *
+ * @return Address of interrupt descriptor table
+ */
+__attribute__((pure))  const int_desc_t *interrupt_controller_hal_desc_table(void);
+#endif
+
+/**
+ * @brief Gets the interrupt type given an interrupt number.
+ *
+ * @param interrupt_number Interrupt number 0 to 31
+ * @return interrupt type
+ */
+__attribute__((pure))  int_type_t interrupt_controller_hal_desc_type(int interrupt_number);
+
+/**
+ * @brief Gets the interrupt level given an interrupt number.
+ *
+ * @param interrupt_number Interrupt number 0 to 31
+ * @return interrupt level bitmask
+ */
+__attribute__((pure))  int interrupt_controller_hal_desc_level(int interrupt_number);
+
+/**
+ * @brief Gets the cpu flags given the interrupt number and target cpu.
+ *
+ * @param interrupt_number Interrupt number 0 to 31
+ * @param cpu_number CPU number between 0 and SOC_CPU_CORES_NUM - 1
+ * @return flags for that interrupt number
+ */
+__attribute__((pure))  int_desc_flag_t interrupt_controller_hal_desc_flags(int interrupt_number, int cpu_number);
+
+/**
+ * @brief Gets the interrupt type given an interrupt number.
+ *
+ * @param interrupt_number Interrupt number 0 to 31
+ * @return interrupt type
+ */
+static inline int_type_t interrupt_controller_hal_get_type(int interrupt_number)
+{
+    return interrupt_controller_hal_desc_type(interrupt_number);
+}
+
+/**
+ * @brief Gets the interrupt level given an interrupt number.
+ *
+ * @param interrupt_number Interrupt number 0 to 31
+ * @return interrupt level bitmask
+ */
+static inline int interrupt_controller_hal_get_level(int interrupt_number)
+{
+    return interrupt_controller_hal_desc_level(interrupt_number);
+}
+
+#ifdef SOC_CPU_HAS_FLEXIBLE_INTC
+/**
+ * @brief Set the type of an interrupt in the controller.
+ *
+ * @param interrupt_number Interrupt number 0 to 31
+ * @param type interrupt type as edge or level triggered
+ */
+static inline void interrupt_controller_hal_set_int_type(int intr, int_type_t type)
+{
+    intr_cntrl_ll_set_int_type(intr, type);
+}
+
+/**
+ * @brief Sets the interrupt level int the interrupt controller.
+ *
+ * @param interrupt_number Interrupt number 0 to 31
+ * @param level priority between 1 (lowest) to 7 (highest)
+ */
+static inline void interrupt_controller_hal_set_int_level(int intr, int level)
+{
+    intr_cntrl_ll_set_int_level(intr, level);
+}
+#endif
+
+/**
+ * @brief Gets the cpu flags given the interrupt number and target cpu.
+ *
+ * @param interrupt_number Interrupt number 0 to 31
+ * @param cpu_number CPU number between 0 and SOC_CPU_CORES_NUM - 1
+ * @return flags for that interrupt number
+ */
+static inline uint32_t interrupt_controller_hal_get_cpu_desc_flags(int interrupt_number, int cpu_number)
+{
+    return interrupt_controller_hal_desc_flags(interrupt_number, cpu_number);
+}
+
+/**
+ * @brief enable interrupts specified by the mask
+ *
+ * @param mask bitmask of interrupts that needs to be enabled
+ */
+static inline void interrupt_controller_hal_enable_interrupts(uint32_t mask)
+{
+    intr_cntrl_ll_enable_interrupts(mask);
+}
+
+/**
+ * @brief disable interrupts specified by the mask
+ *
+ * @param mask bitmask of interrupts that needs to be disabled
+ */
+static inline void interrupt_controller_hal_disable_interrupts(uint32_t mask)
+{
+    intr_cntrl_ll_disable_interrupts(mask);
+}
+
+/**
+ * @brief Read the current interrupt mask.
+ *
+ * @return The bitmask of current interrupts
+ */
+static inline uint32_t interrupt_controller_hal_read_interrupt_mask(void)
+{
+    return intr_cntrl_ll_read_interrupt_mask();
+}
+
+/**
+ * @brief checks if given interrupt number has a valid handler
+ *
+ * @param intr interrupt number ranged from 0 to 31
+ * @param cpu cpu number ranged betweeen 0 to SOC_CPU_CORES_NUM - 1
+ * @return true for valid handler, false otherwise
+ */
+static inline bool interrupt_controller_hal_has_handler(int intr, int cpu)
+{
+    return intr_cntrl_ll_has_handler(intr, cpu);
+}
+
+/**
+ * @brief sets interrupt handler and optional argument of a given interrupt number
+ *
+ * @param intr interrupt number ranged from 0 to 31
+ * @param handler handler invoked when an interrupt occurs
+ * @param arg optional argument to pass to the handler
+ */
+static inline void interrupt_controller_hal_set_int_handler(uint8_t intr, interrupt_handler_t handler, void *arg)
+{
+    intr_cntrl_ll_set_int_handler(intr, handler, arg);
+}
+
+/**
+ * @brief Gets argument passed to handler of a given interrupt number
+ *
+ * @param intr interrupt number ranged from 0 to 31
+ *
+ * @return argument used by handler of passed interrupt number
+ */
+static inline void * interrupt_controller_hal_get_int_handler_arg(uint8_t intr)
+{
+    return intr_cntrl_ll_get_int_handler_arg(intr);
+}
+
+/**
+ * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
+ *
+ * @param intr interrupt number ranged from 0 to 31
+ */
+static inline void interrupt_controller_hal_edge_int_acknowledge(int intr)
+{
+    intr_cntrl_ll_edge_int_acknowledge(intr);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/interrupt_controller_types.h b/tools/sdk/esp32s3/include/hal/include/hal/interrupt_controller_types.h
new file mode 100644
index 00000000000..528b0eb35d8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/interrupt_controller_types.h
@@ -0,0 +1,46 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc_caps.h"
+#include "soc/soc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    INTDESC_NORMAL=0,
+    INTDESC_RESVD,
+    INTDESC_SPECIAL,
+} int_desc_flag_t;
+
+typedef enum {
+    INTTP_LEVEL=0,
+    INTTP_EDGE,
+    INTTP_NA,
+} int_type_t;
+
+typedef struct {
+    int level;
+    int_type_t type;
+    int_desc_flag_t cpuflags[SOC_CPU_CORES_NUM];
+} int_desc_t;
+
+typedef void (*interrupt_handler_t)(void *arg);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/lcd_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/lcd_hal.h
new file mode 100644
index 00000000000..db255b3d1e4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/lcd_hal.h
@@ -0,0 +1,23 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct lcd_cam_dev_t *lcd_soc_handle_t;
+
+typedef struct {
+    lcd_soc_handle_t dev;
+} lcd_hal_context_t;
+
+void lcd_hal_init(lcd_hal_context_t *hal, int id);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/lcd_types.h b/tools/sdk/esp32s3/include/hal/include/hal/lcd_types.h
new file mode 100644
index 00000000000..1a62d8f8eb4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/lcd_types.h
@@ -0,0 +1,36 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief LCD clock source
+ * @note User should select the clock source based on the real requirement:
+ * @verbatim embed:rst:leading-asterisk
+ * +---------------------+-------------------------+----------------------------+
+ * | LCD clock source    | Features                | Power Management           |
+ * +=====================+=========================+============================+
+ * | LCD_CLK_SRC_PLL160M | High resolution         | ESP_PM_APB_FREQ_MAX lock   |
+ * +---------------------+-------------------------+----------------------------+
+ * | LCD_CLK_SRC_APLL    | Configurable resolution | ESP_PM_NO_LIGHT_SLEEP lock |
+ * +---------------------+-------------------------+----------------------------+
+ * | LCD_CLK_SRC_XTAL    | Medium resolution       | No PM lock                 |
+ * +---------------------+-------------------------+----------------------------+
+ * @endverbatim
+ */
+typedef enum {
+    LCD_CLK_SRC_PLL160M, /*!< Select PLL160M as the source clock */
+    LCD_CLK_SRC_APLL,    /*!< Select APLL as the source clock */
+    LCD_CLK_SRC_XTAL,    /*!< Select XTAL as the source clock */
+} lcd_clock_source_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/ledc_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/ledc_hal.h
new file mode 100644
index 00000000000..2afa547751d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/ledc_hal.h
@@ -0,0 +1,388 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for LEDC.
+// There is no parameter check in the hal layer, so the caller must ensure the correctness of the parameters.
+
+#pragma once
+
+#include "hal/ledc_ll.h"
+#include "hal/ledc_types.h"
+
+/**
+ * Context that should be maintained by both the driver and the HAL
+ */
+typedef struct {
+    ledc_dev_t *dev;
+    ledc_mode_t speed_mode;
+} ledc_hal_context_t;
+
+/**
+ * @brief Set LEDC low speed timer clock
+ *
+ * @param hal Context of the HAL layer
+ * @param slow_clk_sel LEDC low speed timer clock source
+ *
+ * @return None
+ */
+#define ledc_hal_set_slow_clk_sel(hal, slow_clk_sel)  ledc_ll_set_slow_clk_sel((hal)->dev, slow_clk_sel)
+
+/**
+ * @brief Get LEDC low speed timer clock
+ *
+ * @param hal Context of the HAL layer
+ * @param slow_clk_sel LEDC low speed timer clock source
+ *
+ * @return None
+ */
+#define ledc_hal_get_slow_clk_sel(hal, slow_clk_sel)  ledc_ll_get_slow_clk_sel((hal)->dev, slow_clk_sel)
+
+/**
+ * @brief Update LEDC low speed timer
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+#define ledc_hal_ls_timer_update(hal, timer_sel)  ledc_ll_ls_timer_update((hal)->dev, (hal)->speed_mode, timer_sel)
+
+/**
+ * @brief Reset LEDC timer
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+#define ledc_hal_timer_rst(hal, timer_sel)  ledc_ll_timer_rst((hal)->dev, (hal)->speed_mode, timer_sel)
+
+/**
+ * @brief Pause LEDC timer
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+#define ledc_hal_timer_pause(hal, timer_sel)  ledc_ll_timer_pause((hal)->dev, (hal)->speed_mode, timer_sel)
+
+/**
+ * @brief Resume LEDC timer
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+#define ledc_hal_timer_resume(hal, timer_sel)  ledc_ll_timer_resume((hal)->dev, (hal)->speed_mode, timer_sel)
+
+/**
+ * @brief Set LEDC timer clock divider
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clock_divider Timer clock divide value, the timer clock is divided from the selected clock source
+ *
+ * @return None
+ */
+#define ledc_hal_set_clock_divider(hal, timer_sel, clock_divider)  ledc_ll_set_clock_divider((hal)->dev, (hal)->speed_mode, timer_sel, clock_divider)
+
+/**
+ * @brief Get LEDC timer clock divider
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clock_divider Timer clock divide value, the timer clock is divided from the selected clock source
+ *
+ * @return None
+ */
+#define ledc_hal_get_clock_divider(hal, timer_sel, clock_divider)  ledc_ll_get_clock_divider((hal)->dev, (hal)->speed_mode, timer_sel, clock_divider)
+
+/**
+ * @brief Set LEDC timer clock source
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clk_src Timer clock source
+ *
+ * @return None
+ */
+#define ledc_hal_set_clock_source(hal, timer_sel, clk_src)  ledc_ll_set_clock_source((hal)->dev, (hal)->speed_mode, timer_sel, clk_src)
+
+/**
+ * @brief Get LEDC timer clock source
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clk_src Pointer to accept the timer clock source
+ *
+ * @return None
+ */
+#define ledc_hal_get_clock_source(hal, timer_sel, clk_src)  ledc_ll_get_clock_source((hal)->dev, (hal)->speed_mode, timer_sel, clk_src)
+
+/**
+ * @brief Set LEDC duty resolution
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param duty_resolution Resolution of duty setting in number of bits. The range of duty values is [0, (2**duty_resolution)]
+ *
+ * @return None
+ */
+#define ledc_hal_set_duty_resolution(hal, timer_sel, duty_resolution)  ledc_ll_set_duty_resolution((hal)->dev, (hal)->speed_mode, timer_sel, duty_resolution)
+
+/**
+ * @brief Get LEDC duty resolution
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param duty_resolution Pointer to accept the resolution of duty setting in number of bits.
+ *
+ * @return None
+ */
+#define ledc_hal_get_duty_resolution(hal, timer_sel, duty_resolution)  ledc_ll_get_duty_resolution((hal)->dev, (hal)->speed_mode, timer_sel, duty_resolution)
+
+/**
+ * @brief Get LEDC max duty
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param max_duty Pointer to accept the max duty
+ *
+ * @return None
+ */
+#define ledc_hal_get_max_duty(hal, channel_num, max_duty)  ledc_ll_get_max_duty((hal)->dev, (hal)->speed_mode, channel_num, max_duty)
+
+/**
+ * @brief Get LEDC hpoint value
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param hpoint_val Pointer to accept the LEDC hpoint value(max: 0xfffff)
+ *
+ * @return None
+ */
+#define ledc_hal_get_hpoint(hal, channel_num, hpoint_val)  ledc_ll_get_hpoint((hal)->dev, (hal)->speed_mode, channel_num, hpoint_val)
+
+/**
+ * @brief Set LEDC the integer part of duty value
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_val LEDC duty value, the range of duty setting is [0, (2**duty_resolution)]
+ *
+ * @return None
+ */
+#define ledc_hal_set_duty_int_part(hal, channel_num, duty_val)  ledc_ll_set_duty_int_part((hal)->dev, (hal)->speed_mode, channel_num, duty_val)
+
+/**
+ * @brief Set the output enable
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param sig_out_en The output enable status
+ *
+ * @return None
+ */
+#define ledc_hal_set_sig_out_en(hal, channel_num, sig_out_en)  ledc_ll_set_sig_out_en((hal)->dev, (hal)->speed_mode, channel_num, sig_out_en)
+
+/**
+ * @brief Set the duty start
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_start The duty start
+ *
+ * @return None
+ */
+#define ledc_hal_set_duty_start(hal, channel_num, duty_start)  ledc_ll_set_duty_start((hal)->dev, (hal)->speed_mode, channel_num, duty_start)
+
+/**
+ * @brief Set output idle level
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param idle_level The output idle level
+ *
+ * @return None
+ */
+#define ledc_hal_set_idle_level(hal, channel_num, idle_level)  ledc_ll_set_idle_level((hal)->dev, (hal)->speed_mode, channel_num, idle_level)
+
+/**
+ * @brief Set fade end interrupt enable
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param fade_end_intr_en The fade end interrupt enable status
+ *
+ * @return None
+ */
+#define ledc_hal_set_fade_end_intr(hal, channel_num, fade_end_intr_en)  ledc_ll_set_fade_end_intr((hal)->dev, (hal)->speed_mode, channel_num, fade_end_intr_en)
+
+/**
+ * @brief Set timer index of the specified channel
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+#define ledc_hal_bind_channel_timer(hal, channel_num, timer_sel)  ledc_ll_bind_channel_timer((hal)->dev, (hal)->speed_mode, channel_num, timer_sel)
+
+/**
+ * @brief Get timer index of the specified channel
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param timer_sel Pointer to accept the LEDC timer index
+ *
+ * @return None
+ */
+#define ledc_hal_get_channel_timer(hal, channel_num, timer_sel)  ledc_ll_get_channel_timer((hal)->dev, (hal)->speed_mode, channel_num, timer_sel)
+
+/**
+ * @brief Init the LEDC hal. This function should be called first before other hal layer function is called
+ *
+ * @param hal Context of the HAL layer
+ * @param speed_mode speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mod
+ *
+ * @return None
+ */
+void ledc_hal_init(ledc_hal_context_t *hal, ledc_mode_t speed_mode);
+
+/**
+ * @brief Update channel configure when select low speed mode
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ *
+ * @return None
+ */
+void ledc_hal_ls_channel_update(ledc_hal_context_t *hal, ledc_channel_t channel_num);
+
+/**
+ * @brief Set LEDC hpoint value
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param hpoint_val LEDC hpoint value(max: 0xfffff)
+ *
+ * @return None
+ */
+void ledc_hal_set_hpoint(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t hpoint_val);
+
+/**
+ * @brief Get LEDC duty value
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_val Pointer to accept the LEDC duty value
+ *
+ * @return None
+ */
+void ledc_hal_get_duty(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t *duty_val);
+
+/**
+ * @brief Set LEDC duty change direction
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_direction LEDC duty change direction, increase or decrease
+ *
+ * @return None
+ */
+void ledc_hal_set_duty_direction(ledc_hal_context_t *hal, ledc_channel_t channel_num, ledc_duty_direction_t duty_direction);
+
+/**
+ * @brief Set the number of increased or decreased times
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_num The number of increased or decreased times
+ *
+ * @return None
+ */
+void ledc_hal_set_duty_num(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_num);
+
+/**
+ * @brief Set the duty cycles of increase or decrease
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_cycle The duty cycles
+ *
+ * @return None
+ */
+void ledc_hal_set_duty_cycle(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_cycle);
+
+/**
+ * @brief Set the step scale of increase or decrease
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param duty_scale The step scale
+ *
+ * @return None
+ */
+void ledc_hal_set_duty_scale(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_scale);
+
+/**
+ * @brief Get interrupt status of the specified channel
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ * @param intr_status Pointer to accept the interrupt status
+ *
+ * @return None
+ */
+void ledc_hal_get_fade_end_intr_status(ledc_hal_context_t *hal, uint32_t *intr_status);
+
+/**
+ * @brief Clear interrupt status of the specified channel
+ *
+ * @param hal Context of the HAL layer
+ * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
+ *
+ * @return None
+ */
+void ledc_hal_clear_fade_end_intr_status(ledc_hal_context_t *hal, ledc_channel_t channel_num);
+
+/**
+ * @brief Get clock config of LEDC timer
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clk_cfg Pointer to accept clock config
+ *
+ * @return None
+ */
+void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_clk_cfg_t *clk_cfg);
+
+/**
+ * @brief Config low speed timer clock source with clock config
+ *s
+ * @param hal Context of the HAL layer
+ * @param clk_cfg clock config
+ *
+ * @return None
+ */
+void ledc_hal_set_slow_clk(ledc_hal_context_t *hal, ledc_clk_cfg_t clk_cfg);
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/ledc_types.h b/tools/sdk/esp32s3/include/hal/include/hal/ledc_types.h
new file mode 100644
index 00000000000..0ddcf18c635
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/ledc_types.h
@@ -0,0 +1,161 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+
+typedef enum {
+#if SOC_LEDC_SUPPORT_HS_MODE
+    LEDC_HIGH_SPEED_MODE = 0, /*!< LEDC high speed speed_mode */
+#endif
+    LEDC_LOW_SPEED_MODE,      /*!< LEDC low speed speed_mode */
+    LEDC_SPEED_MODE_MAX,      /*!< LEDC speed limit */
+} ledc_mode_t;
+
+typedef enum {
+    LEDC_INTR_DISABLE = 0,    /*!< Disable LEDC interrupt */
+    LEDC_INTR_FADE_END,       /*!< Enable LEDC interrupt */
+    LEDC_INTR_MAX,
+} ledc_intr_type_t;
+
+typedef enum {
+    LEDC_DUTY_DIR_DECREASE = 0,    /*!< LEDC duty decrease direction */
+    LEDC_DUTY_DIR_INCREASE = 1,    /*!< LEDC duty increase direction */
+    LEDC_DUTY_DIR_MAX,
+} ledc_duty_direction_t;
+
+typedef enum {
+    LEDC_SLOW_CLK_RTC8M = 0,  /*!< LEDC low speed timer clock source is 8MHz RTC clock*/
+    LEDC_SLOW_CLK_APB,     /*!< LEDC low speed timer clock source is 80MHz APB clock*/
+#if SOC_LEDC_SUPPORT_XTAL_CLOCK
+    LEDC_SLOW_CLK_XTAL,    /*!< LEDC low speed timer clock source XTAL clock*/
+#endif
+} ledc_slow_clk_sel_t;
+
+typedef enum {
+    LEDC_AUTO_CLK = 0,    /*!< The driver will automatically select the source clock(REF_TICK or APB) based on the giving resolution and duty parameter when init the timer*/
+    LEDC_USE_REF_TICK,    /*!< LEDC timer select REF_TICK clock as source clock*/
+    LEDC_USE_APB_CLK,     /*!< LEDC timer select APB clock as source clock*/
+    LEDC_USE_RTC8M_CLK,   /*!< LEDC timer select RTC8M_CLK as source clock. Only for low speed channels and this parameter must be the same for all low speed channels*/
+#if SOC_LEDC_SUPPORT_XTAL_CLOCK
+    LEDC_USE_XTAL_CLK,    /*!< LEDC timer select XTAL clock as source clock*/
+#endif
+} ledc_clk_cfg_t;
+
+/* Note: Setting numeric values to match ledc_clk_cfg_t values are a hack to avoid collision with
+   LEDC_AUTO_CLK in the driver, as these enums have very similar names and user may pass
+   one of these by mistake. */
+typedef enum  {
+    LEDC_REF_TICK = LEDC_USE_REF_TICK, /*!< LEDC timer clock divided from reference tick (1Mhz) */
+    LEDC_APB_CLK = LEDC_USE_APB_CLK,  /*!< LEDC timer clock divided from APB clock (80Mhz) */
+} ledc_clk_src_t;
+
+
+typedef enum {
+    LEDC_TIMER_0 = 0, /*!< LEDC timer 0 */
+    LEDC_TIMER_1,     /*!< LEDC timer 1 */
+    LEDC_TIMER_2,     /*!< LEDC timer 2 */
+    LEDC_TIMER_3,     /*!< LEDC timer 3 */
+    LEDC_TIMER_MAX,
+} ledc_timer_t;
+
+typedef enum {
+    LEDC_CHANNEL_0 = 0, /*!< LEDC channel 0 */
+    LEDC_CHANNEL_1,     /*!< LEDC channel 1 */
+    LEDC_CHANNEL_2,     /*!< LEDC channel 2 */
+    LEDC_CHANNEL_3,     /*!< LEDC channel 3 */
+    LEDC_CHANNEL_4,     /*!< LEDC channel 4 */
+    LEDC_CHANNEL_5,     /*!< LEDC channel 5 */
+#if SOC_LEDC_CHANNEL_NUM > 6
+    LEDC_CHANNEL_6,     /*!< LEDC channel 6 */
+    LEDC_CHANNEL_7,     /*!< LEDC channel 7 */
+#endif
+    LEDC_CHANNEL_MAX,
+} ledc_channel_t;
+
+typedef enum {
+    LEDC_TIMER_1_BIT = 1,   /*!< LEDC PWM duty resolution of  1 bits */
+    LEDC_TIMER_2_BIT,       /*!< LEDC PWM duty resolution of  2 bits */
+    LEDC_TIMER_3_BIT,       /*!< LEDC PWM duty resolution of  3 bits */
+    LEDC_TIMER_4_BIT,       /*!< LEDC PWM duty resolution of  4 bits */
+    LEDC_TIMER_5_BIT,       /*!< LEDC PWM duty resolution of  5 bits */
+    LEDC_TIMER_6_BIT,       /*!< LEDC PWM duty resolution of  6 bits */
+    LEDC_TIMER_7_BIT,       /*!< LEDC PWM duty resolution of  7 bits */
+    LEDC_TIMER_8_BIT,       /*!< LEDC PWM duty resolution of  8 bits */
+    LEDC_TIMER_9_BIT,       /*!< LEDC PWM duty resolution of  9 bits */
+    LEDC_TIMER_10_BIT,      /*!< LEDC PWM duty resolution of 10 bits */
+    LEDC_TIMER_11_BIT,      /*!< LEDC PWM duty resolution of 11 bits */
+    LEDC_TIMER_12_BIT,      /*!< LEDC PWM duty resolution of 12 bits */
+    LEDC_TIMER_13_BIT,      /*!< LEDC PWM duty resolution of 13 bits */
+    LEDC_TIMER_14_BIT,      /*!< LEDC PWM duty resolution of 14 bits */
+#if SOC_LEDC_TIMER_BIT_WIDE_NUM > 14
+    LEDC_TIMER_15_BIT,      /*!< LEDC PWM duty resolution of 15 bits */
+    LEDC_TIMER_16_BIT,      /*!< LEDC PWM duty resolution of 16 bits */
+    LEDC_TIMER_17_BIT,      /*!< LEDC PWM duty resolution of 17 bits */
+    LEDC_TIMER_18_BIT,      /*!< LEDC PWM duty resolution of 18 bits */
+    LEDC_TIMER_19_BIT,      /*!< LEDC PWM duty resolution of 19 bits */
+    LEDC_TIMER_20_BIT,      /*!< LEDC PWM duty resolution of 20 bits */
+#endif
+    LEDC_TIMER_BIT_MAX,
+} ledc_timer_bit_t;
+
+typedef enum {
+    LEDC_FADE_NO_WAIT = 0,  /*!< LEDC fade function will return immediately */
+    LEDC_FADE_WAIT_DONE,    /*!< LEDC fade function will block until fading to the target duty */
+    LEDC_FADE_MAX,
+} ledc_fade_mode_t;
+
+/**
+ * @brief Configuration parameters of LEDC channel for ledc_channel_config function
+ */
+typedef struct {
+    int gpio_num;                   /*!< the LEDC output gpio_num, if you want to use gpio16, gpio_num = 16 */
+    ledc_mode_t speed_mode;         /*!< LEDC speed speed_mode, high-speed mode or low-speed mode */
+    ledc_channel_t channel;         /*!< LEDC channel (0 - 7) */
+    ledc_intr_type_t intr_type;     /*!< configure interrupt, Fade interrupt enable  or Fade interrupt disable */
+    ledc_timer_t timer_sel;         /*!< Select the timer source of channel (0 - 3) */
+    uint32_t duty;                  /*!< LEDC channel duty, the range of duty setting is [0, (2**duty_resolution)] */
+    int hpoint;                     /*!< LEDC channel hpoint value, the max value is 0xfffff */
+    struct {
+        unsigned int output_invert: 1;/*!< Enable (1) or disable (0) gpio output invert */
+    } flags;                        /*!< LEDC flags */
+
+} ledc_channel_config_t;
+
+/**
+ * @brief Configuration parameters of LEDC Timer timer for ledc_timer_config function
+ */
+typedef struct {
+    ledc_mode_t speed_mode;                /*!< LEDC speed speed_mode, high-speed mode or low-speed mode */
+    union {
+        ledc_timer_bit_t duty_resolution;  /*!< LEDC channel duty resolution */
+        ledc_timer_bit_t bit_num __attribute__((deprecated)); /*!< Deprecated in ESP-IDF 3.0. This is an alias to 'duty_resolution' for backward compatibility with ESP-IDF 2.1 */
+    };
+    ledc_timer_t  timer_num;               /*!< The timer source of channel (0 - 3) */
+    uint32_t freq_hz;                      /*!< LEDC timer frequency (Hz) */
+    ledc_clk_cfg_t clk_cfg;                /*!< Configure LEDC source clock.
+                                                For low speed channels and high speed channels, you can specify the source clock using LEDC_USE_REF_TICK, LEDC_USE_APB_CLK or LEDC_AUTO_CLK.
+                                                For low speed channels, you can also specify the source clock using LEDC_USE_RTC8M_CLK, in this case, all low speed channel's source clock must be RTC8M_CLK*/
+} ledc_timer_config_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/mcpwm_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/mcpwm_hal.h
new file mode 100644
index 00000000000..982d5d3abfc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/mcpwm_hal.h
@@ -0,0 +1,41 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for MCPWM (common part)
+
+#pragma once
+
+#include "soc/mcpwm_struct.h"
+
+typedef struct {
+    int host_id; ///< Which MCPWM peripheral to use, 0-1.
+} mcpwm_hal_init_config_t;
+
+typedef struct {
+    mcpwm_dev_t *dev; ///< Beginning address of the peripheral registers of a single MCPWM unit. Call `mcpwm_hal_init` to initialize it.
+} mcpwm_hal_context_t;
+
+/**
+ * @brief Initialize the internal state of the HAL.
+ *
+ * @param hal Context of the HAL layer.
+ * @param init_config Configuration for the HAL to be used only once.
+ */
+void mcpwm_hal_init(mcpwm_hal_context_t *hal, const mcpwm_hal_init_config_t *init_config);
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/mcpwm_types.h b/tools/sdk/esp32s3/include/hal/include/hal/mcpwm_types.h
new file mode 100644
index 00000000000..b9c37315bc4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/mcpwm_types.h
@@ -0,0 +1,52 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+typedef enum {
+    MCPWM_TIMER_DIRECTION_UP,   /*!< Counting direction: Increase */
+    MCPWM_TIMER_DIRECTION_DOWN, /*!< Counting direction: Decrease */
+} mcpwm_timer_direction_t;
+
+typedef enum {
+    MCPWM_TIMER_EVENT_ZERO, /*!< MCPWM timer counts to zero */
+    MCPWM_TIMER_EVENT_PEAK, /*!< MCPWM timer counts to peak */
+} mcpwm_timer_event_t;
+
+typedef enum {
+    MCPWM_TIMER_COUNT_MODE_PAUSE,   /*!< MCPWM timer paused */
+    MCPWM_TIMER_COUNT_MODE_UP,      /*!< MCPWM timer counting up */
+    MCPWM_TIMER_COUNT_MODE_DOWN,    /*!< MCPWM timer counting down */
+    MCPWM_TIMER_COUNT_MODE_UP_DOWN, /*!< MCPWM timer counting up and down */
+} mcpwm_timer_count_mode_t;
+
+typedef enum {
+    MCPWM_TIMER_STOP_AT_ZERO,       /*!< MCPWM timer stops when couting to zero */
+    MCPWM_TIMER_STOP_AT_PEAK,       /*!< MCPWM timer stops when counting to peak */
+    MCPWM_TIMER_START_NO_STOP,      /*!< MCPWM timer starts couting */
+    MCPWM_TIMER_START_STOP_AT_ZERO, /*!< MCPWM timer starts counting and stops when couting to zero */
+    MCPWM_TIMER_START_STOP_AT_PEAK, /*!< MCPWM timer starts counting and stops when counting to peak */
+} mcpwm_timer_execute_cmd_t;
+
+typedef enum {
+    MCPWM_GEN_ACTION_KEEP,   /*!< Generator action: Keep the same level */
+    MCPWM_GEN_ACTION_LOW,    /*!< Generator action: Force to low level */
+    MCPWM_GEN_ACTION_HIGH,   /*!< Generator action: Force to high level */
+    MCPWM_GEN_ACTION_TOGGLE, /*!< Generator action: Toggle level */
+} mcpwm_generator_action_t;
+
+typedef enum {
+    MCPWM_TRIP_TYPE_CBC, /*!< CBC trip type, shut down the operator cycle by cycle*/
+    MCPWM_TRIP_TYPE_OST, /*!< OST trip type, shut down the operator in one shot */
+} mcpwm_trip_type_t;
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/memprot_types.h b/tools/sdk/esp32s3/include/hal/include/hal/memprot_types.h
new file mode 100644
index 00000000000..15e3c3959ab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/memprot_types.h
@@ -0,0 +1,50 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Memprot LL error codes
+ *
+ */
+typedef enum {
+    MEMP_LL_OK = 0,
+    MEMP_LL_FAIL = 1,
+    MEMP_LL_ERR_SPLIT_ADDR_OUT_OF_RANGE = 2,
+    MEMP_LL_ERR_SPLIT_ADDR_INVALID = 2,         /* temporary duplicate for S2 builds */
+    MEMP_LL_ERR_SPLIT_ADDR_UNALIGNED = 3,
+    MEMP_LL_ERR_UNI_BLOCK_INVALID = 4,
+    MEMP_LL_ERR_AREA_INVALID = 5,
+    MEMP_LL_ERR_WORLD_INVALID = 6
+} memprot_ll_err_t;
+
+/**
+ * @brief Memprot LL PMS World IDs
+ *
+ */
+typedef enum {
+    MEMP_LL_WORLD_NONE = 0x00,
+    MEMP_LL_WORLD_0 = 0x01,
+    MEMP_LL_WORLD_1 = 0x10
+} memprot_ll_world_t;
+
+/**
+ * @brief Memprot LL PMS Area IDs
+ *
+ */
+typedef enum {
+    MEMP_LL_AREA_NONE = 0,
+    MEMP_LL_AREA_LOW = 1,
+    MEMP_LL_AREA_HIGH = 2
+} memprot_ll_area_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/mpu_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/mpu_hal.h
new file mode 100644
index 00000000000..f1a7103fc75
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/mpu_hal.h
@@ -0,0 +1,36 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include <stdint.h>
+
+#include "esp_err.h"
+
+#include "hal/mpu_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Specify the type of access allowed on a memory region.
+ *
+ * @param id index to the region table; on targets not SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED,
+ * the region divisions is predefined in hardware which is likely reflected in LL implementation.
+ * @param access type of access allowed
+ */
+void mpu_hal_set_region_access(int id, mpu_access_t access);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/mpu_types.h b/tools/sdk/esp32s3/include/hal/include/hal/mpu_types.h
new file mode 100644
index 00000000000..cc7da62a93e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/mpu_types.h
@@ -0,0 +1,34 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc_caps.h"
+
+#if SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED
+typedef void** mpu_region_table_t;
+#endif
+
+typedef enum {
+    MPU_REGION_ILLEGAL,
+#if SOC_MPU_REGION_RO_SUPPORTED
+    MPU_REGION_RO,      // read-only
+#endif
+#if SOC_MPU_REGION_WO_SUPPORTED
+    MPU_REGION_WO,      // write-only
+#endif
+    MPU_REGION_RW,      // read-write
+    MPU_REGION_X,       // executable
+    MPU_REGION_RWX      // read-write-executable
+} mpu_access_t;
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/pcnt_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/pcnt_hal.h
new file mode 100644
index 00000000000..3d10c8d8c68
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/pcnt_hal.h
@@ -0,0 +1,50 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for PCNT.
+// There is no parameter check in the hal layer, so the caller must ensure the correctness of the parameters.
+
+#pragma once
+
+#include "soc/pcnt_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Context that should be maintained by both the driver and the HAL
+ */
+typedef struct {
+    pcnt_dev_t *dev; /*!< PCNT peripheral register base address */
+} pcnt_hal_context_t;
+
+/**
+ * @brief Init the PCNT hal and set the PCNT to the default configuration.
+ * @note This function should be called first before other hal layer function is called.
+ *
+ * @param hal Context of the HAL layer
+ * @param group_id PCNT group ID
+ */
+void pcnt_hal_init(pcnt_hal_context_t *hal, int group_id);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/pcnt_types.h b/tools/sdk/esp32s3/include/hal/include/hal/pcnt_types.h
new file mode 100644
index 00000000000..0696e756cc9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/pcnt_types.h
@@ -0,0 +1,54 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief PCNT channel action on control level
+ *
+ */
+typedef enum {
+    PCNT_CHANNEL_LEVEL_ACTION_KEEP,    /*!< Keep current count mode */
+    PCNT_CHANNEL_LEVEL_ACTION_INVERSE, /*!< Invert current count mode (increase -> decrease, decrease -> increase) */
+    PCNT_CHANNEL_LEVEL_ACTION_HOLD,    /*!< Hold current count value */
+} pcnt_channel_level_action_t;
+
+/**
+ * @brief PCNT channel action on signal edge
+ *
+ */
+typedef enum {
+    PCNT_CHANNEL_EDGE_ACTION_HOLD,     /*!< Hold current count value */
+    PCNT_CHANNEL_EDGE_ACTION_INCREASE, /*!< Increase count value */
+    PCNT_CHANNEL_EDGE_ACTION_DECREASE, /*!< Decrease count value */
+} pcnt_channel_edge_action_t;
+
+/**
+ * @brief PCNT unit counter value's sign
+ *
+ */
+typedef enum {
+    PCNT_UNIT_COUNT_SIGN_ZERO_POS, /*!< positive value to zero */
+    PCNT_UNIT_COUNT_SIGN_ZERO_NEG, /*!< negative value to zero */
+    PCNT_UNIT_COUNT_SIGN_NEG,      /*!< counter value negative */
+    PCNT_UNIT_COUNT_SIGN_POS,      /*!< counter value positive */
+} pcnt_unit_count_sign_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/rmt_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/rmt_hal.h
new file mode 100644
index 00000000000..49b3f4c670a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/rmt_hal.h
@@ -0,0 +1,112 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include "soc/soc_caps.h"
+#include "soc/rmt_struct.h"
+
+/**
+ * @brief HAL context type of RMT driver
+ *
+ */
+typedef struct {
+    rmt_dev_t *regs;     /*!< RMT Register base address */
+    rmt_mem_t *mem;      /*!< RMT Memory base address */
+} rmt_hal_context_t;
+
+#define RMT_MEM_OWNER_SW (0) /*!< RMT Memory ownership belongs to software side */
+#define RMT_MEM_OWNER_HW (1) /*!< RMT Memory ownership belongs to hardware side */
+
+/**
+ * @brief Initialize the RMT HAL driver
+ *
+ * @param hal: RMT HAL context
+ */
+void rmt_hal_init(rmt_hal_context_t *hal);
+
+/**
+ * @brief Reset RMT TX Channel
+ *
+ * @param hal: RMT HAL context
+ * @param channel: RMT channel number
+ */
+void rmt_hal_tx_channel_reset(rmt_hal_context_t *hal, uint32_t channel);
+
+/**
+ * @brief Reset RMT TX Channel
+ *
+ * @param hal: RMT HAL context
+ * @param channel: RMT channel number
+ */
+void rmt_hal_rx_channel_reset(rmt_hal_context_t *hal, uint32_t channel);
+
+/**
+ * @brief Set counter clock for RMT channel
+ *
+ * @param hal: RMT HAL context
+ * @param channel: RMT channel number
+ * @param base_clk_hz: base clock for RMT internal channel (counter clock will divide from it)
+ * @param counter_clk_hz: target counter clock
+ */
+void rmt_hal_tx_set_channel_clock(rmt_hal_context_t *hal, uint32_t channel, uint32_t base_clk_hz, uint32_t counter_clk_hz);
+
+/**
+ * @brief Set carrier clock for RMT channel
+ *
+ * @param hal: RMT HAL context
+ * @param channel: RMT channel number
+ * @param base_clk_hz: base clock for RMT carrier generation (carrier clock will divide from it)
+ * @param carrier_clk_hz: target carrier clock
+ * @param carrier_clk_duty: duty ratio of carrier clock
+ */
+void rmt_hal_set_carrier_clock(rmt_hal_context_t *hal, uint32_t channel, uint32_t base_clk_hz, uint32_t carrier_clk_hz, float carrier_clk_duty);
+
+/**
+ * @brief Set filter threshold for RMT Receive channel
+ *
+ * @param hal: RMT HAL context
+ * @param channel: RMT channel number
+ * @param base_clk_hz: base clock for RMT receive filter
+ * @param thres_us: threshold of RMT receive filter, in us
+ */
+void rmt_hal_set_rx_filter_thres(rmt_hal_context_t *hal, uint32_t channel, uint32_t base_clk_hz, uint32_t thres_us);
+
+/**
+ * @brief Set idle threshold for RMT Receive channel
+ *
+ * @param hal: RMT HAL context
+ * @param channel: RMT channel number
+ * @param base_clk_hz: base clock for RMT receive channel
+ * @param thres_us: IDLE threshold for RMT receive channel
+ */
+void rmt_hal_set_rx_idle_thres(rmt_hal_context_t *hal, uint32_t channel, uint32_t base_clk_hz, uint32_t thres_us);
+
+/**
+ * @brief Receive a frame from RMT channel
+ *
+ * @param hal: RMT HAL context
+ * @param channel: RMT channel number
+ * @param buf: buffer to store received RMT frame
+ * @return number of items that get received
+ */
+uint32_t rmt_hal_receive(rmt_hal_context_t *hal, uint32_t channel, rmt_item32_t *buf);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/rmt_types.h b/tools/sdk/esp32s3/include/hal/include/hal/rmt_types.h
new file mode 100644
index 00000000000..9669fd48859
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/rmt_types.h
@@ -0,0 +1,127 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief RMT channel ID
+*
+*/
+typedef enum {
+    RMT_CHANNEL_0,  /*!< RMT channel number 0 */
+    RMT_CHANNEL_1,  /*!< RMT channel number 1 */
+    RMT_CHANNEL_2,  /*!< RMT channel number 2 */
+    RMT_CHANNEL_3,  /*!< RMT channel number 3 */
+#if SOC_RMT_CHANNELS_PER_GROUP > 4
+    RMT_CHANNEL_4,  /*!< RMT channel number 4 */
+    RMT_CHANNEL_5,  /*!< RMT channel number 5 */
+    RMT_CHANNEL_6,  /*!< RMT channel number 6 */
+    RMT_CHANNEL_7,  /*!< RMT channel number 7 */
+#endif
+    RMT_CHANNEL_MAX /*!< Number of RMT channels */
+} rmt_channel_t;
+
+/**
+ * @brief RMT Internal Memory Owner
+ *
+ */
+typedef enum {
+    RMT_MEM_OWNER_TX, /*!< RMT RX mode, RMT transmitter owns the memory block*/
+    RMT_MEM_OWNER_RX, /*!< RMT RX mode, RMT receiver owns the memory block*/
+    RMT_MEM_OWNER_MAX,
+} rmt_mem_owner_t;
+
+/**
+ * @brief Clock Source of RMT Channel
+ *
+ */
+typedef enum {
+#if SOC_RMT_SUPPORT_REF_TICK
+    RMT_BASECLK_REF = 0, /*!< RMT source clock is REF_TICK, 1MHz by default */
+#endif
+    RMT_BASECLK_APB = 1, /*!< RMT source clock is APB CLK, 80Mhz by default */
+#if SOC_RMT_SUPPORT_XTAL
+    RMT_BASECLK_XTAL = 3, /*!< RMT source clock is XTAL clock, 40Mhz by default */
+#endif
+    RMT_BASECLK_MAX,
+} rmt_source_clk_t;
+
+/**
+ * @brief RMT Data Mode
+ *
+ * @note We highly recommended to use MEM mode not FIFO mode since there will be some gotcha in FIFO mode.
+ *
+ */
+typedef enum {
+    RMT_DATA_MODE_FIFO, /*<! RMT memory access in FIFO mode */
+    RMT_DATA_MODE_MEM,  /*<! RMT memory access in memory mode */
+    RMT_DATA_MODE_MAX,
+} rmt_data_mode_t;
+
+/**
+ * @brief RMT Channel Working Mode (TX or RX)
+ *
+ */
+typedef enum {
+    RMT_MODE_TX, /*!< RMT TX mode */
+    RMT_MODE_RX, /*!< RMT RX mode */
+    RMT_MODE_MAX
+} rmt_mode_t;
+
+/**
+ * @brief RMT Idle Level
+ *
+ */
+typedef enum {
+    RMT_IDLE_LEVEL_LOW,  /*!< RMT TX idle level: low Level */
+    RMT_IDLE_LEVEL_HIGH, /*!< RMT TX idle level: high Level */
+    RMT_IDLE_LEVEL_MAX,
+} rmt_idle_level_t;
+
+/**
+ * @brief RMT Carrier Level
+ *
+ */
+typedef enum {
+    RMT_CARRIER_LEVEL_LOW,  /*!< RMT carrier wave is modulated for low Level output */
+    RMT_CARRIER_LEVEL_HIGH, /*!< RMT carrier wave is modulated for high Level output */
+    RMT_CARRIER_LEVEL_MAX
+} rmt_carrier_level_t;
+
+/**
+ * @brief RMT Channel Status
+ *
+ */
+typedef enum {
+    RMT_CHANNEL_UNINIT, /*!< RMT channel uninitialized */
+    RMT_CHANNEL_IDLE,   /*!< RMT channel status idle */
+    RMT_CHANNEL_BUSY,   /*!< RMT channel status busy */
+} rmt_channel_status_t;
+
+/**
+* @brief Data struct of RMT channel status
+*/
+typedef struct {
+    rmt_channel_status_t status[RMT_CHANNEL_MAX]; /*!< Store the current status of each channel */
+} rmt_channel_status_result_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/rtc_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/rtc_hal.h
new file mode 100644
index 00000000000..90f965ed58c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/rtc_hal.h
@@ -0,0 +1,92 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc_caps.h"
+#include "hal/gpio_types.h"
+#include "hal/rtc_cntl_ll.h"
+#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
+#include "hal/rtc_io_ll.h"
+#endif
+
+typedef struct rtc_cntl_sleep_retent {
+#if SOC_PM_SUPPORT_CPU_PD
+    void     *cpu_pd_mem;   /* Internal ram address for cpu retention */
+#endif // SOC_PM_SUPPORT_CPU_PD
+#if SOC_PM_SUPPORT_TAGMEM_PD
+    struct {
+        void     *link_addr;  /* Internal ram address for tagmem retention */
+        struct {
+            uint32_t start_point: 8,    /* the row of start for i-cache tag memory */
+                     vld_size: 8,       /* valid size of i-cache tag memory, unit: 4 i-cache tagmem blocks */
+                     size: 8,           /* i-cache tag memory size, unit: 4 i-cache tagmem blocks */
+                     enable: 1;         /* enable or disable i-cache tagmem retention */
+        } icache;
+        struct {
+            uint32_t start_point: 9,    /* the row of start for d-cache tag memory */
+                     vld_size: 9,       /* valid size of d-cache tag memory, unit: 4 d-cache tagmem blocks */
+                     size: 9,           /* d-cache tag memory size, unit: 4 d-cache tagmem blocks */
+                     enable: 1;         /* enable or disable d-cache tagmem retention */
+        } dcache;
+    } tagmem;
+#endif // SOC_PM_SUPPORT_TAGMEM_PD
+} rtc_cntl_sleep_retent_t;
+
+#define RTC_HAL_DMA_LINK_NODE_SIZE      (16)
+
+#if SOC_PM_SUPPORT_EXT_WAKEUP
+
+#define rtc_hal_ext1_get_wakeup_pins()                    rtc_cntl_ll_ext1_get_wakeup_pins()
+
+#define rtc_hal_ext1_set_wakeup_pins(mask, mode)          rtc_cntl_ll_ext1_set_wakeup_pins(mask, mode)
+
+#define rtc_hal_ext1_clear_wakeup_pins()                  rtc_cntl_ll_ext1_clear_wakeup_pins()
+
+#endif
+
+#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+
+#define rtc_hal_gpio_get_wakeup_pins()                    rtc_cntl_ll_gpio_get_wakeup_pins()
+
+#define rtc_hal_gpio_clear_wakeup_pins()                  rtc_cntl_ll_gpio_clear_wakeup_pins()
+
+#define rtc_hal_gpio_set_wakeup_pins()                    rtc_cntl_ll_gpio_set_wakeup_pins()
+
+#endif
+
+#define rtc_hal_set_wakeup_timer(ticks)                   rtc_cntl_ll_set_wakeup_timer(ticks)
+
+void * rtc_cntl_hal_dma_link_init(void *elem, void *buff, int size, void *next);
+
+#if SOC_PM_SUPPORT_CPU_PD
+
+void rtc_cntl_hal_enable_cpu_retention(void *addr);
+
+void rtc_cntl_hal_disable_cpu_retention(void *addr);
+
+#endif
+
+#if SOC_PM_SUPPORT_TAGMEM_PD
+
+void rtc_cntl_hal_enable_tagmem_retention(void *addr);
+
+void rtc_cntl_hal_disable_tagmem_retention(void *addr);
+
+#endif
+
+/*
+ * Enable wakeup from ULP coprocessor.
+ */
+#define rtc_hal_ulp_wakeup_enable()                       rtc_cntl_ll_ulp_wakeup_enable()
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/rtc_io_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/rtc_io_hal.h
new file mode 100644
index 00000000000..3516b74e17d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/rtc_io_hal.h
@@ -0,0 +1,264 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for RTC IO master (common part)
+
+#pragma once
+
+#include <esp_err.h>
+#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
+#include "soc/soc_caps.h"
+#include "hal/rtc_io_ll.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+/**
+ * Select the rtcio function.
+ *
+ * @note The RTC function must be selected before the pad analog function is enabled.
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @param func Select pin function.
+ */
+#define rtcio_hal_function_select(rtcio_num, func) rtcio_ll_function_select(rtcio_num, func)
+
+/**
+ * Enable rtcio output.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_output_enable(rtcio_num) rtcio_ll_output_enable(rtcio_num)
+
+/**
+ * Disable rtcio output.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_output_disable(rtcio_num) rtcio_ll_output_disable(rtcio_num)
+
+/**
+ * Set RTCIO output level.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @param level 0: output low; ~0: output high.
+ */
+#define rtcio_hal_set_level(rtcio_num, level) rtcio_ll_set_level(rtcio_num, level)
+
+/**
+ * Enable rtcio input.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_input_enable(rtcio_num) rtcio_ll_input_enable(rtcio_num)
+
+/**
+ * Disable rtcio input.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_input_disable(rtcio_num) rtcio_ll_input_disable(rtcio_num)
+
+/**
+ * Get RTCIO input level.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @return 0: input low; ~0: input high.
+ */
+#define rtcio_hal_get_level(rtcio_num) rtcio_ll_get_level(rtcio_num)
+
+/**
+ * @brief Set RTC GPIO pad drive capability.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @param strength Drive capability of the pad. Range: 0 ~ 3.
+ */
+#define rtcio_hal_set_drive_capability(rtcio_num, strength) rtcio_ll_set_drive_capability(rtcio_num, strength)
+
+/**
+ * @brief Get RTC GPIO pad drive capability.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @return Drive capability of the pad. Range: 0 ~ 3.
+ */
+#define rtcio_hal_get_drive_capability(rtcio_num) rtcio_ll_get_drive_capability(rtcio_num)
+
+/**
+ * Set RTCIO output level.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @param level 0: output low; ~0: output high.
+ */
+#define rtcio_hal_set_level(rtcio_num, level) rtcio_ll_set_level(rtcio_num, level)
+
+/**
+ * Get RTCIO input level.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @return 0: input low; ~0: input high.
+ */
+#define rtcio_hal_get_level(rtcio_num) rtcio_ll_get_level(rtcio_num)
+
+/**
+ * Set RTC IO direction.
+ *
+ * Configure RTC IO direction, such as output only, input only,
+ * output and input.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @param mode IO direction.
+ */
+void rtcio_hal_set_direction(int rtcio_num, rtc_gpio_mode_t mode);
+
+/**
+ * Set RTC IO direction in deep sleep or disable sleep status.
+ *
+ * NOTE: ESP32 support INPUT_ONLY mode.
+ *       ESP32S2 support INPUT_ONLY, OUTPUT_ONLY, INPUT_OUTPUT mode.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @param mode IO direction.
+ */
+void rtcio_hal_set_direction_in_sleep(int rtcio_num, rtc_gpio_mode_t mode);
+
+/**
+ * RTC GPIO pullup enable.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_pullup_enable(rtcio_num) rtcio_ll_pullup_enable(rtcio_num)
+
+/**
+ * RTC GPIO pullup disable.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_pullup_disable(rtcio_num) rtcio_ll_pullup_disable(rtcio_num)
+
+/**
+ * RTC GPIO pulldown enable.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_pulldown_enable(rtcio_num) rtcio_ll_pulldown_enable(rtcio_num)
+
+/**
+ * RTC GPIO pulldown disable.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_pulldown_disable(rtcio_num) rtcio_ll_pulldown_disable(rtcio_num)
+
+#endif // SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+
+#if SOC_RTCIO_HOLD_SUPPORTED
+
+/**
+ * Enable force hold function for RTC IO pad.
+ *
+ * Enabling HOLD function will cause the pad to lock current status, such as,
+ * input/output enable, input/output value, function, drive strength values.
+ * This function is useful when going into light or deep sleep mode to prevent
+ * the pin configuration from changing.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_hold_enable(rtcio_num) rtcio_ll_force_hold_enable(rtcio_num)
+
+/**
+ * Disable hold function on an RTC IO pad
+ *
+ * @note If disable the pad hold, the status of pad maybe changed in sleep mode.
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_hold_disable(rtcio_num) rtcio_ll_force_hold_disable(rtcio_num)
+
+/**
+ * Enable force hold function for RTC IO pads.
+ *
+ * Enabling HOLD function will cause the pad to lock current status, such as,
+ * input/output enable, input/output value, function, drive strength values.
+ * This function is useful when going into light or deep sleep mode to prevent
+ * the pin configuration from changing.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_hold_all() rtcio_ll_force_hold_all()
+
+/**
+ * Disable hold function on an RTC IO pads.
+ *
+ * @note If disable the pad hold, the status of pad maybe changed in sleep mode.
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_unhold_all() rtcio_ll_force_unhold_all()
+#endif // SOC_RTCIO_HOLD_SUPPORTED
+
+#if SOC_RTCIO_WAKE_SUPPORTED
+
+/**
+ * Enable wakeup function and set wakeup type from light sleep status for rtcio.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @param type  Wakeup on high level or low level.
+ */
+#define rtcio_hal_wakeup_enable(rtcio_num, type) rtcio_ll_wakeup_enable(rtcio_num, type)
+
+/**
+ * Disable wakeup function from light sleep status for rtcio.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+#define rtcio_hal_wakeup_disable(rtcio_num) rtcio_ll_wakeup_disable(rtcio_num)
+
+/**
+ * Set specific logic level on an RTC IO pin as a wakeup trigger.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @param level Logic level (0)
+ */
+#define rtcio_hal_ext0_set_wakeup_pin(rtcio_num, level)     rtcio_ll_ext0_set_wakeup_pin(rtcio_num, level)
+
+#endif
+
+#if SOC_RTCIO_HOLD_SUPPORTED || SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+
+/**
+ * Helper function to disconnect internal circuits from an RTC IO
+ * This function disables input, output, pullup, pulldown, and enables
+ * hold feature for an RTC IO.
+ * Use this function if an RTC IO needs to be disconnected from internal
+ * circuits in deep sleep, to minimize leakage current.
+ *
+ * In particular, for ESP32-WROVER module, call
+ * rtc_gpio_isolate(GPIO_NUM_12) before entering deep sleep, to reduce
+ * deep sleep current.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ */
+void rtcio_hal_isolate(int rtc_num);
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/rtc_io_types.h b/tools/sdk/esp32s3/include/hal/include/hal/rtc_io_types.h
new file mode 100644
index 00000000000..9f010aeff61
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/rtc_io_types.h
@@ -0,0 +1,25 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/** RTCIO output/input mode type. */
+typedef enum {
+    RTC_GPIO_MODE_INPUT_ONLY ,  /*!< Pad input */
+    RTC_GPIO_MODE_OUTPUT_ONLY,  /*!< Pad output */
+    RTC_GPIO_MODE_INPUT_OUTPUT, /*!< Pad input + output */
+    RTC_GPIO_MODE_DISABLED,     /*!< Pad (output + input) disable */
+    RTC_GPIO_MODE_OUTPUT_OD,    /*!< Pad open-drain output */
+    RTC_GPIO_MODE_INPUT_OUTPUT_OD, /*!< Pad input + open-drain output */
+} rtc_gpio_mode_t;
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/sdio_slave_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/sdio_slave_hal.h
new file mode 100644
index 00000000000..5b252ea9ba6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/sdio_slave_hal.h
@@ -0,0 +1,528 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for SDIO slave (common part)
+
+// SDIO slave HAL usages:
+
+/*
+Architecture:
+
+The whole SDIO slave peripheral consists of three parts: the registers (including the interrupt
+control and shared registers), a send FIFO, and a receive FIFO. The document
+``esp_slave_protocol.rst`` describes the functionality of the peripheral in detail. An SDIO host
+will only ever access one of the three parts at any one time, thus the hardware functionality of
+the SDIO slave peripheral are completely independent. Likewise, this HAL is organized in such a
+fashion as to correspond to the three independent parts.
+
+The shared registers are quite simple: the slave can directly access them from the internal data
+bus, while the host can access them by CMD52/53 with the correct address. As for the interrupts:
+when an SDIO host interrupts the SDIO slave peripheral (by writing a command), the corresponding
+bit in the interrupt register will be set; when the SDIO slave peripheral needs to interrupt the
+host, it write some register to cause the host interrupt bit being set, and the slave hardware
+will output the interrupt signal on the DAT1 line.
+
+For the FIFOs, the peripheral provides counters as registers so that the host can always know whether the slave
+is ready to send/receive data. The HAL resets the counters during initialization, and the host should somehow
+inform the slave to reset the counters again if it should reboot (or lose the counter value for some reasons).
+Then the host can read/write the FIFOs by CMD53 commands according to the counters.
+
+In order to avoid copying data to/from the FIFOs or memory buffers each time, the HAL layer
+contains a descriptor queue (implemented as linked-list) that allows descriptors of memory
+buffers to be queued for transmission/reception. Once a buffer is queued, the HAL takes ownership
+of the buffer until some "finish" functions successfully return, indicating the
+transmission/reception of that buffer is complete. The ISR is invoked multiple times to iterate
+through the queued descriptors, and also to signal to the upper layer if a buffer has been
+freed.
+
+The HAL is used as below:
+
+- Receiving part:
+
+    1.  Call `sdio_slave_hal_recv_start` to start the receiving DMA.
+
+        If there are already buffers loaded, the receiving will start from those buffers first.
+
+    2.  Call `sdio_slave_hal_recv_init_desc` with a `sdio_slave_hal_recv_desc_t` and the buffer address to
+        associate the descriptor with the buffer.
+
+        The HAL initialize this descriptors with the determined length and maybe some extra data.
+
+    3.  Call `sdio_slave_hal_load_buf` with the initialized descriptor of the buffer to load a
+        receiving buffer to the HAL.
+
+        When the DMA is started, the descriptors is loaded onto the DMA linked-list, and the
+        counter of receiving buffers is increased so that the host will know this by the
+        receiving interrupt. The hardware will automatically go through the linked list and write
+        data into the buffers loaded on the list.
+
+    4.  (Optional, mandatory only when interrupt enabled) Call `sdio_slave_hal_recv_done` to check
+        and clear the receiving interrupt bits.
+
+    5.  Call `sdio_slave_hal_recv_has_next_item` to check whether there are finished buffers.
+
+    6.  Call `sdio_slave_hal_recv_unload_desc` for the same times as
+        `sdio_slave_hal_recv_has_next_item` successfully returns.
+
+    7.  (Optional) Call `sdio_slave_hal_recv_reset_counter` to reset the counter to current loaded
+        but not used buffers if you want to reset the counter only. This is available only when
+        the DMA is stopped.
+
+    8.  (Optional) Call `sdio_slave_hal_recv_flush_one_buffer` (recursively) if you want to
+        discard data of one (or more) buffers and load them again. This is available only when
+        the DMA is stopped.
+
+    9.  (Optional when deinitialization) Call `sdio_slave_hal_recv_unload_desc` recursively to get
+        all the buffers loaded to the HAL, no matter they are used or not. Don't do this when the
+        DMA is not stopped.
+
+- Sending part:
+
+    The sending driver is slightly different, since we are not using the re-start feature.
+    (TODO: re-write this part if the stitch mode is released)
+
+    1.  Call `sdio_slave_hal_send_start` to start the sending DMA.
+
+        If there is already any data queued, it will ne ready to be sent to host now.
+
+    2.  Call `sdio_slave_hal_send_queue` to queue the data to send.
+
+        If the interrupt is enabled, the ISR will be invoked.
+
+    3.  (Required if interrupt enabled) Call `` to clear the interrupt bits used by the SW
+        invoking logic.
+
+    4.  Call `sdio_slave_hal_send_new_packet_if_exist` to check and send new packet (if there is
+        data queued).
+
+    5.  Call `sdio_slave_hal_send_eof_happened` to check whether the previous packet is done.
+
+        It will also clear the interrupt status bit for this event.
+
+    6.  Call `sdio_slave_hal_send_get_next_finished_arg` recursively to get the arguments for the
+        finished buffers.
+
+    7.  (Optional when deinitialization) Call `sdio_slave_hal_send_flush_next_buffer` recursively
+        to get all buffers queued, regardless sent or not. Don't do this when the DMA is not stopped.
+
+    8.  (Optional) Call `sdio_slave_hal_send_reset_counter` to reset the counter to current loaded
+        but not sent buffers if you want to reset the counter only. Don't do this when the DMA is not
+        stopped.
+
+    Note a counter should be used when performing step 2 and 6, to make sure that the queue size
+    is enough.
+
+- Host part:
+
+    1.  Call `sdio_slave_hal_hostint_set_ena` and `sdio_slave_hal_hostint_get_ena` to
+        enable/disable the interrupt sent to master. Note that the host can also modify the same
+        registers at the same time. Try to avoid using them outside the initialization process.
+
+    2.  Call `sdio_slave_hal_hostint_send` and `sdio_slave_hal_hostint_clear` to trigger general
+        purpose interrupts or cancel all kinds of interrupts send to the host. These interrupts are
+        set/cleared in a concurrent-safe way, so the slave can call these functions safely.
+
+    3.  Call `sdio_slave_hal_slvint_fetch_clear` to fetch the general purpose interrupts sent by
+        the host to the slave. These interrupts will also be cleared after the calls.
+
+    4.  Call `sdio_slave_hal_host_get_reg` and `sdio_slave_hal_host_set_reg` to read/write the
+        general purpose shared between the host and slave. Note that these registers are also not
+        concurrent-safe. Try not to write to the same register from two directions at the same time.
+*/
+
+#pragma once
+#include <esp_err.h>
+#include "soc/lldesc.h"
+#include "hal/sdio_slave_types.h"
+#include "hal/sdio_slave_ll.h"
+
+/// Space used for each sending descriptor. Should initialize the sendbuf accoring to this size.
+#define SDIO_SLAVE_SEND_DESC_SIZE   sizeof(sdio_slave_hal_send_desc_t)
+
+
+/// Status of the sending part
+typedef enum {
+    STATE_IDLE = 1,
+    STATE_WAIT_FOR_START = 2,
+    STATE_SENDING = 3,
+    STATE_GETTING_RESULT = 4,
+    STATE_GETTING_UNSENT_DESC = 5,
+} send_state_t;
+
+typedef struct {
+    uint8_t* data;      ///< Address of the buffer
+    size_t  size;       ///< Size of the buffer, but can only queue (size/SDIO_SLAVE_SEND_DESC_SIZE)-1 descriptors
+    uint8_t* write_ptr;
+    uint8_t* read_ptr;
+    uint8_t* free_ptr;
+} sdio_ringbuf_t;
+
+// Append two extra words to be used by the HAL.
+// Should Initialize the member `data` of `send_desc_queue` of the HAL context
+// with size of this desc * N.
+
+/// DMA descriptor with extra fields
+typedef struct sdio_slave_hal_send_desc_s {
+    lldesc_t dma_desc;    ///< Used by Hardware, has pointer linking to next desc
+    uint32_t pkt_len;     ///< Accumulated length till this descriptor
+    void*   arg;          ///< Holding arguments indicating this buffer */
+} sdio_slave_hal_send_desc_t;
+
+/// Descriptor used by the receiving part, call `sdio_slave_hal_recv_init_desc`
+/// to initialize it before use.
+typedef lldesc_t sdio_slave_hal_recv_desc_t;
+#define sdio_slave_hal_recv_desc_s lldesc_s
+typedef STAILQ_HEAD(recv_stailq_head_s, sdio_slave_hal_recv_desc_s) sdio_slave_hal_recv_stailq_t;
+
+
+/** HAL context structure. Call `sdio_slave_hal_init` to initialize it and
+ * configure required members before actually use the HAL.
+ */
+typedef struct {
+    /// Hardware registers for this SDIO slave peripheral, configured by
+    /// `sdio_slave_hal_init`
+    struct {
+        slc_dev_t*      slc;
+        host_dev_t*     host;
+        hinf_dev_t*     hinf;
+    };
+    sdio_slave_sending_mode_t sending_mode; /**< Sending mode, should be manually configured before using the HAL.
+                                             * see `sdio_slave_sending_mode_t`.
+                                             */
+    sdio_slave_timing_t timing;             /**< Timing mode (launch edge and latch edge settings). Should be manually
+                                             * configured before using the HAL. `SDIO_SLAVE_TIMING_PSEND_PSAMPLE` is
+                                             * recommended by default.
+                                             */
+    int                 send_queue_size;    /**< Max buffers that can be queued before sending. Should be manually
+                                             * configured before using the HAL.
+                                             */
+    size_t              recv_buffer_size;   /**< The size of each buffer. The host and slave should share a
+                                             * pre-negotiated value. Should be manually configured before using
+                                             * the HAL.
+                                             */
+    sdio_ringbuf_t      send_desc_queue;            /**< The ring buffer used to hold queued descriptors. Should be manually
+                                             * initialized before using the HAL.
+                                             */
+    //Internal status, no need to touch.
+    send_state_t        send_state;         // Current state of sending part.
+    uint32_t            tail_pkt_len;       // The accumulated send length of the tail packet.
+    sdio_slave_hal_send_desc_t*         in_flight_head; // The head of linked list in-flight.
+    sdio_slave_hal_send_desc_t*         in_flight_end;  // The end of linked list in-flight.
+    sdio_slave_hal_send_desc_t*         in_flight_next; // The header of linked list to be sent next time.
+    sdio_slave_hal_send_desc_t*         returned_desc;  // The last returned descriptor
+
+    sdio_slave_hal_recv_stailq_t            recv_link_list; // Linked list of buffers ready to hold data and the buffers already hold data.
+    volatile sdio_slave_hal_recv_desc_t*    recv_cur_ret;   // Next desc to return, NULL if all loaded descriptors are returned.
+} sdio_slave_context_t ;
+
+/**
+ * Initialize the HAL, should provide buffers to the context and configure the
+ * members before this funciton is called.
+ *
+ * @param hal Context of the HAL layer.
+ */
+void sdio_slave_hal_init(sdio_slave_context_t *hal);
+
+/**
+ * Initialize the SDIO slave peripheral hardware.
+ *
+ * @param hal Context of the HAL layer.
+ */
+void sdio_slave_hal_hw_init(sdio_slave_context_t *hal);
+
+/**
+ * Set the IO ready for host to read.
+ *
+ * @param hal Context of the HAL layer.
+ * @param ready true to tell the host the slave is ready, otherwise false.
+ */
+void sdio_slave_hal_set_ioready(sdio_slave_context_t *hal, bool ready);
+
+/*---------------------------------------------------------------------------
+ *                  Send
+ *--------------------------------------------------------------------------*/
+
+/**
+ * The hardware sending DMA starts. If there is existing data, send them.
+ *
+ * @param hal Context of the HAL layer.
+ */
+esp_err_t sdio_slave_hal_send_start(sdio_slave_context_t *hal);
+
+/**
+ * Stops hardware sending DMA.
+ *
+ * @note The data in the queue, as well as the counter are not touched.
+ * @param hal Context of the HAL layer.
+ */
+void sdio_slave_hal_send_stop(sdio_slave_context_t *hal);
+
+/**
+ * Put some data into the sending queue.
+ *
+ * @note The caller should keeps the buffer, until the `arg` is returned by
+ *       `sdio_slave_hal_send_get_next_finished_arg`.
+ * @note The caller should count to ensure there is enough space in the queue.
+ *       The initial queue size is sizeof(sendbuf.data)/sizeof(sdio_slave_hal_send_desc_t)-1,
+ *       Will decrease by one when this function successfully returns.
+ *       Released only by `sdio_slave_hal_send_get_next_finished_arg` or
+ *       `sdio_slave_hal_send_flush_next_buffer`.
+ *
+ * @note The HAL is not thread-safe. The caller should use a spinlock to ensure
+ *       the `sdio_slave_hal_send_queue` and ... are not called at the same time.
+ *
+ * @param hal Context of the HAL layer.
+ * @param addr Address of data in the memory to send.
+ * @param len Length of data to send.
+ * @param arg Argument indicating this sending.
+ * @return Always ESP_OK.
+ */
+esp_err_t sdio_slave_hal_send_queue(sdio_slave_context_t *hal, uint8_t *addr, size_t len, void *arg);
+
+/**
+ * The ISR should call this, to handle the SW invoking event.
+ * @param hal Context of the HAL layer.
+ */
+void sdio_slave_hal_send_handle_isr_invoke(sdio_slave_context_t *hal);
+
+/**
+ * Check whether there is no in-flight transactions, and send new packet if there
+ * is new packets queued.
+ *
+ * @param hal Context of the HAL layer.
+ * @return
+ *  - ESP_OK: The DMA starts to send a new packet.
+ *  - ESP_ERR_NOT_FOUND: No packet waiting to be sent.
+ *  - ESP_ERR_INVALID_STATE: There is packet in-flight.
+ */
+esp_err_t sdio_slave_hal_send_new_packet_if_exist(sdio_slave_context_t *hal);
+
+/**
+ * Check whether the sending EOF has happened and clear the interrupt.
+ *
+ * Call `sdio_slave_hal_send_get_next_finished_arg` recursively to retrieve arguments of finished
+ * buffers.
+ *
+ * @param hal Context of the HAL layer.
+ * @return true if happened, otherwise false.
+ */
+bool sdio_slave_hal_send_eof_happened(sdio_slave_context_t *hal);
+
+/**
+ * Get the arguments of finished packets. Call recursively until all finished
+ * arguments are all retrieved.
+ *
+ * @param hal Context of the HAL layer.
+ * @param out_arg Output argument of the finished buffer.
+ * @param out_returned_cnt Released queue size to be queued again.
+ * @return
+ *  - ESP_OK: if one argument retrieved.
+ *  - ESP_ERR_NOT_FOUND: All the arguments of the finished buffers are retrieved.
+ */
+esp_err_t sdio_slave_hal_send_get_next_finished_arg(sdio_slave_context_t *hal, void **out_arg, uint32_t* out_returned_cnt);
+
+/**
+ * Flush one buffer in the queue, no matter sent, canceled or not sent yet.
+ *
+ * Call recursively to clear the whole queue before deinitialization.
+ *
+ * @note Only call when the DMA is stopped!
+ * @param hal Context of the HAL layer.
+ * @param out_arg Argument indiciating the buffer to send
+ * @param out_return_cnt Space in the queue released after this descriptor is flushed.
+ * @return
+ *  - ESP_ERR_INVALID_STATE: This function call be called only when the DMA is stopped.
+ *  - ESP_ERR_NOT_FOUND: if no buffer in the queue
+ *  - ESP_OK: if a buffer is successfully flushed and returned.
+ */
+esp_err_t sdio_slave_hal_send_flush_next_buffer(sdio_slave_context_t *hal, void **out_arg, uint32_t *out_return_cnt);
+
+/**
+ * Walk through all the unsent buffers and reset the counter to the accumulated length of them. The data will be kept.
+ *
+ * @note Only call when the DMA is stopped!
+ * @param hal Context of the HAL layer.
+ * @return
+ *  - ESP_ERR_INVALID_STATE: this function call be called only when the DMA is stopped
+ *  - ESP_OK: if success
+ */
+esp_err_t sdio_slave_hal_send_reset_counter(sdio_slave_context_t *hal);
+
+
+/*---------------------------------------------------------------------------
+ *                  Receive
+ *--------------------------------------------------------------------------*/
+/**
+ * Start the receiving DMA.
+ *
+ * @note If there are already some buffers loaded, will receive from them first.
+ * @param hal Context of the HAL layer.
+ */
+void sdio_slave_hal_recv_start(sdio_slave_context_t *hal);
+
+/**
+ * Stop the receiving DMA.
+ *
+ * @note Data and the counter will not be touched. You can still call
+ *       `sdio_slave_hal_recv_has_next_item` to get the received buffer.
+ *       And unused buffers loaded to the HAL will still be in the `loaded`
+ *       state in the HAL, until returned by `sdio_slave_hal_recv_unload_desc`.
+ * @param hal Context of the HAL layer.
+ */
+void sdio_slave_hal_recv_stop(sdio_slave_context_t* hal);
+
+/**
+ * Associate the buffer to the descriptor given. The descriptor may also be initialized with some
+ * other data.
+ *
+ * @param hal Context of the HAL layer.
+ * @param desc Descriptor to associate with the buffer
+ * @param start Start address of the buffer
+ */
+void sdio_slave_hal_recv_init_desc(sdio_slave_context_t *hal, sdio_slave_hal_recv_desc_t *desc, uint8_t *start);
+
+/**
+ * Load the buffer to the HAL to be used to receive data.
+ *
+ * @note Loaded buffers will be returned to the upper layer only when:
+ *       1. Returned by `sdio_slave_hal_recv_has_next_item` when receiving to that buffer successfully
+ *       done.
+ *       2. Returned by `sdio_slave_hal_recv_unload_desc` unconditionally.
+ * @param hal Context of the HAL layer.
+ * @param desc Descriptor to load to the HAL to receive.
+ */
+void sdio_slave_hal_load_buf(sdio_slave_context_t *hal, sdio_slave_hal_recv_desc_t *desc);
+
+/**
+ * Check and clear the interrupt indicating a buffer has finished receiving.
+ *
+ * @param hal Context of the HAL layer.
+ * @return true if interrupt triggered, otherwise false.
+ */
+bool sdio_slave_hal_recv_done(sdio_slave_context_t* hal);
+
+/**
+ * Call this function recursively to check whether there is any buffer that has
+ * finished receiving.
+ *
+ * Will walk through the linked list to find a newer finished buffer. For each successful return,
+ * it means there is one finished buffer. You can one by `sdio_slave_hal_recv_unload_desc`. You can
+ * also call `sdio_slave_hal_recv_has_next_item` several times continuously before you call the
+ * `sdio_slave_hal_recv_unload_desc` for the same times.
+ *
+ * @param hal Context of the HAL layer.
+ * @return true if there is
+ */
+bool sdio_slave_hal_recv_has_next_item(sdio_slave_context_t* hal);
+
+/**
+ * Unconditionally remove and return the first descriptor loaded to the HAL.
+ *
+ * Unless during de-initialization, `sdio_slave_hal_recv_has_next_item` should have succeed for the
+ * same times as this function is called, to ensure the returned descriptor has finished its
+ * receiving job.
+ *
+ * @param hal Context of the HAL layer.
+ * @return The removed descriptor, NULL means the linked-list is empty.
+ */
+sdio_slave_hal_recv_desc_t *sdio_slave_hal_recv_unload_desc(sdio_slave_context_t *hal);
+
+/**
+ * Walk through all the unused buffers and reset the counter to the number of
+ * them.
+ *
+ * @note Only call when the DMA is stopped!
+ * @param hal Context of the HAL layer.
+ */
+void sdio_slave_hal_recv_reset_counter(sdio_slave_context_t *hal);
+
+/**
+ * Walk through all the used buffers, clear the finished flag and appended them
+ * back to the end of the unused list, waiting to receive then.
+ *
+ * @note You will lose all the received data in the buffer.
+ * @note Only call when the DMA is stopped!
+ * @param hal Context of the HAL layer.
+ */
+void sdio_slave_hal_recv_flush_one_buffer(sdio_slave_context_t *hal);
+
+
+/*---------------------------------------------------------------------------
+ *                  Host
+ *--------------------------------------------------------------------------*/
+
+/**
+ * Enable some of the interrupts for the host.
+ *
+ * @note May have concurrency issue wit the host or other tasks, suggest only use it during
+ *       initialization.
+ * @param hal Context of the HAL layer.
+ * @param mask Bitwise mask for the interrupts to enable.
+ */
+void sdio_slave_hal_hostint_set_ena(sdio_slave_context_t *hal, const sdio_slave_hostint_t *mask);
+
+/**
+ * Get the enabled interrupts.
+ *
+ * @param hal Context of the HAL layer.
+ * @param out_int_mask Output of the enabled interrupts
+ */
+void sdio_slave_hal_hostint_get_ena(sdio_slave_context_t *hal, sdio_slave_hostint_t *out_int_mask);
+
+/**
+ * Send general purpose interrupt (slave send to host).
+ * @param hal Context of the HAL layer.
+ * @param mask Interrupts to send, only `SDIO_SLAVE_HOSTINT_BIT*` are allowed.
+ */
+void sdio_slave_hal_hostint_send(sdio_slave_context_t *hal, const sdio_slave_hostint_t *mask);
+
+/**
+ * Cleared the specified interrupts for the host.
+ *
+ * @param hal Context of the HAL layer.
+ * @param mask Interrupts to clear.
+ */
+void sdio_slave_hal_hostint_clear(sdio_slave_context_t *hal, const sdio_slave_hostint_t *mask);
+
+
+/**
+ * Fetch the interrupt (host send to slave) status bits and clear all of them.
+ * @param hal Context of the HAL layer.
+ * @param out_int_mask Output interrupt status
+ */
+void sdio_slave_hal_slvint_fetch_clear(sdio_slave_context_t *hal, sdio_slave_ll_slvint_t *out_int_mask);
+
+/**
+ * Get the value of a shared general purpose register.
+ *
+ * @param hal Context of the HAL layer.
+ * @param pos Position of the register, 4 bytes share a word. 0-63 except 24-27.
+ * @return The register value.
+ */
+uint8_t sdio_slave_hal_host_get_reg(sdio_slave_context_t *hal, int pos);
+
+/**
+ * Set the value of shared general purpose register.
+ *
+ * @param hal Context of the HAL layer.
+ * @param pos Position of the register, 4 bytes share a word. 0-63 except 24-27.
+ * @param reg Value to set.
+ */
+void sdio_slave_hal_host_set_reg(sdio_slave_context_t *hal, int pos, uint8_t reg);
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/sdio_slave_ll.h b/tools/sdk/esp32s3/include/hal/include/hal/sdio_slave_ll.h
new file mode 100644
index 00000000000..77fe8783140
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/sdio_slave_ll.h
@@ -0,0 +1,481 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The LL layer for ESP32 SDIO slave register operations
+// It's strange but `tx_*` regs for host->slave transfers while `rx_*` regs for slave->host transfers
+// To reduce ambiguity, we call (host->slave, tx) transfers receiving and (slave->host, rx) transfers receiving
+
+#pragma once
+
+#include "hal/sdio_slave_hal.h"
+#include "soc/slc_struct.h"
+#include "soc/slc_reg.h"
+#include "soc/host_struct.h"
+#include "soc/host_reg.h"
+#include "soc/hinf_struct.h"
+#include "soc/lldesc.h"
+
+/// Get address of the only SLC registers for ESP32
+#define sdio_slave_ll_get_slc(ID)   (&SLC)
+/// Get address of the only HOST registers for ESP32
+#define sdio_slave_ll_get_host(ID)  (&HOST)
+/// Get address of the only HINF registers for ESP32
+#define sdio_slave_ll_get_hinf(ID)  (&HINF)
+
+
+/// Mask of general purpose interrupts sending from the host.
+typedef enum {
+    SDIO_SLAVE_LL_SLVINT_0 = BIT(0),    ///< General purpose interrupt bit 0.
+    SDIO_SLAVE_LL_SLVINT_1 = BIT(1),
+    SDIO_SLAVE_LL_SLVINT_2 = BIT(2),
+    SDIO_SLAVE_LL_SLVINT_3 = BIT(3),
+    SDIO_SLAVE_LL_SLVINT_4 = BIT(4),
+    SDIO_SLAVE_LL_SLVINT_5 = BIT(5),
+    SDIO_SLAVE_LL_SLVINT_6 = BIT(6),
+    SDIO_SLAVE_LL_SLVINT_7 = BIT(7),
+} sdio_slave_ll_slvint_t;
+
+/**
+ * Initialize the hardware.
+ *
+ * @param slc Address of the SLC registers
+ */
+static inline void sdio_slave_ll_init(slc_dev_t *slc)
+{
+    slc->slc0_int_ena.val = 0;
+
+    slc->conf0.slc0_rx_auto_wrback = 1;
+    slc->conf0.slc0_token_auto_clr = 0;
+    slc->conf0.slc0_rx_loop_test = 0;
+    slc->conf0.slc0_tx_loop_test = 0;
+
+    slc->conf1.slc0_rx_stitch_en = 0;
+    slc->conf1.slc0_tx_stitch_en = 0;
+    slc->conf1.slc0_len_auto_clr = 0;
+
+    slc->rx_dscr_conf.slc0_token_no_replace = 1;
+}
+
+/**
+ * Set the timing for the communication
+ *
+ * @param host Address of the host registers
+ * @param timing Timing configuration to set
+ */
+static inline void sdio_slave_ll_set_timing(host_dev_t *host, sdio_slave_timing_t timing)
+{
+    switch(timing) {
+        case SDIO_SLAVE_TIMING_PSEND_PSAMPLE:
+            host->conf.frc_sdio20 = 0x1f;
+            host->conf.frc_sdio11 = 0;
+            host->conf.frc_pos_samp = 0x1f;
+            host->conf.frc_neg_samp = 0;
+            break;
+        case SDIO_SLAVE_TIMING_PSEND_NSAMPLE:
+            host->conf.frc_sdio20 = 0x1f;
+            host->conf.frc_sdio11 = 0;
+            host->conf.frc_pos_samp = 0;
+            host->conf.frc_neg_samp = 0x1f;
+            break;
+        case SDIO_SLAVE_TIMING_NSEND_PSAMPLE:
+            host->conf.frc_sdio20 = 0;
+            host->conf.frc_sdio11 = 0x1f;
+            host->conf.frc_pos_samp = 0x1f;
+            host->conf.frc_neg_samp = 0;
+            break;
+        case SDIO_SLAVE_TIMING_NSEND_NSAMPLE:
+            host->conf.frc_sdio20 = 0;
+            host->conf.frc_sdio11 = 0x1f;
+            host->conf.frc_pos_samp = 0;
+            host->conf.frc_neg_samp = 0x1f;
+            break;
+    }
+}
+
+/**
+ * Set the HS supported bit to be read by the host.
+ *
+ * @param hinf Address of the hinf registers
+ * @param hs true if supported, otherwise false.
+ */
+static inline void sdio_slave_ll_enable_hs(hinf_dev_t *hinf, bool hs)
+{
+    if (hs) {
+        hinf->cfg_data1.sdio_ver = 0x232;
+        hinf->cfg_data1.highspeed_enable = 1;
+    }
+}
+
+/**
+ * Set the IO Ready bit to be read by the host.
+ *
+ * @param hinf Address of the hinf registers
+ * @param ready true if ready, otherwise false.
+ */
+static inline void sdio_slave_ll_set_ioready(hinf_dev_t *hinf, bool ready)
+{
+    hinf->cfg_data1.sdio_ioready1 = (ready ? 1 : 0);   //set IO ready to 1 to stop host from using
+}
+
+/*---------------------------------------------------------------------------
+ *                  Send
+ *--------------------------------------------------------------------------*/
+/**
+ * Reset the sending DMA.
+ *
+ * @param slc Address of the SLC registers
+ */
+static inline void sdio_slave_ll_send_reset(slc_dev_t *slc)
+{
+    //reset to flush previous packets
+    slc->conf0.slc0_rx_rst = 1;
+    slc->conf0.slc0_rx_rst = 0;
+}
+
+/**
+ * Start the sending DMA with the given descriptor.
+ *
+ * @param slc Address of the SLC registers
+ * @param desc Descriptor to send
+ */
+static inline void sdio_slave_ll_send_start(slc_dev_t *slc, const lldesc_t *desc)
+{
+    slc->slc0_rx_link.addr = (uint32_t)desc;
+    slc->slc0_rx_link.start = 1;
+}
+
+/**
+ * Write the PKT_LEN register to be written by the host to a certain value.
+ *
+ * @param slc Address of the SLC registers
+ * @param len Length to write
+ */
+static inline void sdio_slave_ll_send_write_len(slc_dev_t *slc, uint32_t len)
+{
+    slc->slc0_len_conf.val = FIELD_TO_VALUE2(SLC_SLC0_LEN_WDATA, len) | FIELD_TO_VALUE2(SLC_SLC0_LEN_WR, 1);
+}
+
+/**
+ * Read the value of PKT_LEN register. The register may keep the same until read
+ * by the host.
+ *
+ * @param host Address of the host registers
+ * @return The value of PKT_LEN register.
+ */
+static inline uint32_t sdio_slave_ll_send_read_len(host_dev_t *host)
+{
+    return host->pkt_len.reg_slc0_len;
+}
+
+/**
+ * Enable the rx_done interrupt. (sending)
+ *
+ * @param slc Address of the SLC registers
+ * @param ena true if enable, otherwise false.
+ */
+static inline void sdio_slave_ll_send_part_done_intr_ena(slc_dev_t *slc, bool ena)
+{
+    slc->slc0_int_ena.rx_done = (ena ? 1 : 0);
+}
+
+/**
+ * Clear the rx_done interrupt. (sending)
+ *
+ * @param slc Address of the SLC registers
+ */
+static inline void sdio_slave_ll_send_part_done_clear(slc_dev_t *slc)
+{
+    slc->slc0_int_clr.rx_done = 1;
+}
+
+/**
+ * Check whether the hardware is ready for the SW to use rx_done to invoke
+ * the ISR.
+ *
+ * @param slc Address of the SLC registers
+ * @return true if ready, otherwise false.
+ */
+static inline bool sdio_slave_ll_send_invoker_ready(slc_dev_t *slc)
+{
+    return slc->slc0_int_raw.rx_done;
+}
+
+/**
+ * Stop the sending DMA.
+ *
+ * @param slc Address of the SLC registers
+ */
+static inline void sdio_slave_ll_send_stop(slc_dev_t *slc)
+{
+    slc->slc0_rx_link.stop = 1;
+}
+
+/**
+ * Enable the sending interrupt (rx_eof).
+ *
+ * @param slc Address of the SLC registers
+ * @param ena true to enable, false to disable
+ */
+static inline void sdio_slave_ll_send_intr_ena(slc_dev_t *slc, bool ena)
+{
+    slc->slc0_int_ena.rx_eof = (ena? 1: 0);
+}
+
+/**
+ * Clear the sending interrupt (rx_eof).
+ *
+ * @param slc Address of the SLC registers
+ */
+static inline void sdio_slave_ll_send_intr_clr(slc_dev_t *slc)
+{
+    slc->slc0_int_clr.rx_eof = 1;
+}
+
+/**
+ * Check whether the sending is done.
+ *
+ * @param slc Address of the SLC registers
+ * @return true if done, otherwise false
+ */
+static inline bool sdio_slave_ll_send_done(slc_dev_t *slc)
+{
+    return slc->slc0_int_st.rx_eof != 0;
+}
+
+/**
+ * Clear the host interrupt indicating the slave having packet to be read.
+ *
+ * @param host Address of the host registers
+ */
+static inline void sdio_slave_ll_send_hostint_clr(host_dev_t *host)
+{
+    host->slc0_int_clr.rx_new_packet = 1;
+}
+
+/*---------------------------------------------------------------------------
+ *                  Receive
+ *--------------------------------------------------------------------------*/
+/**
+ * Enable the receiving interrupt.
+ *
+ * @param slc Address of the SLC registers
+ * @param ena
+ */
+static inline void sdio_slave_ll_recv_intr_ena(slc_dev_t *slc, bool ena)
+{
+    slc->slc0_int_ena.tx_done = (ena ? 1 : 0);
+}
+
+/**
+ * Start receiving DMA with the given descriptor.
+ *
+ * @param slc Address of the SLC registers
+ * @param desc Descriptor of the receiving buffer.
+ */
+static inline void sdio_slave_ll_recv_start(slc_dev_t *slc, lldesc_t *desc)
+{
+    slc->slc0_tx_link.addr = (uint32_t)desc;
+    slc->slc0_tx_link.start = 1;
+}
+
+/**
+ * Increase the receiving buffer counter by 1.
+ *
+ * @param slc Address of the SLC registers
+ */
+static inline void sdio_slave_ll_recv_size_inc(slc_dev_t *slc)
+{
+    // fields wdata and inc_more should be written by the same instruction.
+    slc->slc0_token1.val = FIELD_TO_VALUE2(SLC_SLC0_TOKEN1_WDATA, 1) | FIELD_TO_VALUE2(SLC_SLC0_TOKEN1_INC_MORE, 1);
+}
+
+/**
+ * Reset the receiving buffer.
+ *
+ * @param slc Address of the SLC registers
+ */
+static inline void sdio_slave_ll_recv_size_reset(slc_dev_t *slc)
+{
+    slc->slc0_token1.val = FIELD_TO_VALUE2(SLC_SLC0_TOKEN1_WDATA, 0) | FIELD_TO_VALUE2(SLC_SLC0_TOKEN1_WR, 1);
+}
+
+/**
+ * Check whether there is a receiving finished event.
+ *
+ * @param slc Address of the SLC registers
+ * @return
+ */
+static inline bool sdio_slave_ll_recv_done(slc_dev_t *slc)
+{
+    return slc->slc0_int_raw.tx_done != 0;
+}
+
+/**
+ * Clear the receiving finished interrupt.
+ *
+ * @param slc Address of the SLC registers
+ */
+static inline void sdio_slave_ll_recv_done_clear(slc_dev_t *slc)
+{
+    slc->slc0_int_clr.tx_done = 1;
+}
+
+/**
+ * Restart the DMA. Call after you modified the next pointer of the tail descriptor to the appended
+ * descriptor.
+ *
+ * @param slc Address of the SLC registers
+ */
+static inline void sdio_slave_ll_recv_restart(slc_dev_t *slc)
+{
+    slc->slc0_tx_link.restart = 1;
+}
+
+/**
+ * Reset the receiving DMA.
+ *
+ * @param slc Address of the SLC registers
+ */
+static inline void sdio_slave_ll_recv_reset(slc_dev_t *slc)
+{
+    slc->conf0.slc0_tx_rst = 1;
+    slc->conf0.slc0_tx_rst = 0;
+}
+
+/**
+ * Stop the receiving DMA.
+ *
+ * @param slc Address of the SLC registers
+ */
+static inline void sdio_slave_ll_recv_stop(slc_dev_t *slc)
+{
+    slc->slc0_tx_link.stop = 1;
+}
+
+/*---------------------------------------------------------------------------
+ *                  Host
+ *--------------------------------------------------------------------------*/
+/**
+ * Get the address of the shared general purpose register. Internal.
+ *
+ * @param host Address of the host registers
+ * @param pos Position of the register, 0-63 except 24-27.
+ * @return address of the register.
+ */
+static inline intptr_t sdio_slave_ll_host_get_w_reg(host_dev_t* host, int pos)
+{
+    return (intptr_t )&(host->conf_w0) + pos + (pos>23?4:0) + (pos>31?12:0);
+}
+
+/**
+ * Get the value of the shared general purpose register.
+ *
+ * @param host Address of the host registers
+ * @param pos Position of the register, 0-63, except 24-27.
+ * @return value of the register.
+ */
+static inline uint8_t sdio_slave_ll_host_get_reg(host_dev_t *host, int pos)
+{
+    return *(uint8_t*)sdio_slave_ll_host_get_w_reg(host, pos);
+}
+
+/**
+ * Set the value of the shared general purpose register.
+ *
+ * @param host Address of the host registers
+ * @param pos Position of the register, 0-63, except 24-27.
+ * @param reg Value to set.
+ */
+static inline void sdio_slave_ll_host_set_reg(host_dev_t* host, int pos, uint8_t reg)
+{
+    uint32_t* addr = (uint32_t*)(sdio_slave_ll_host_get_w_reg(host, pos) & (~3));
+    uint32_t shift = (pos % 4) * 8;
+    *addr &= ~(0xff << shift);
+    *addr |= ((uint32_t)reg << shift);
+}
+
+/**
+ * Get the interrupt enable bits for the host.
+ *
+ * @param host Address of the host registers
+ * @return Enabled interrupts
+ */
+static inline sdio_slave_hostint_t sdio_slave_ll_host_get_intena(host_dev_t* host)
+{
+    return host->slc0_func1_int_ena.val;
+}
+
+/**
+ * Set the interrupt enable bits for the host.
+ *
+ * @param host Address of the host registers
+ * @param mask Mask of interrupts to enable
+ */
+static inline void sdio_slave_ll_host_set_intena(host_dev_t *host, const sdio_slave_hostint_t *mask)
+{
+    host->slc0_func1_int_ena.val = (*mask);
+}
+
+/**
+ * Clear the interrupt bits for the host.
+ * @param host Address of the host registers
+ * @param mask Mask of interrupts to clear.
+ */
+static inline void sdio_slave_ll_host_intr_clear(host_dev_t* host, const sdio_slave_hostint_t *mask)
+{
+    host->slc0_int_clr.val = (*mask);
+}
+
+/**
+ * Send general purpose interrupts to the host.
+ * @param slc Address of the SLC registers
+ * @param mask Mask of interrupts to seend to host
+ */
+static inline void sdio_slave_ll_host_send_int(slc_dev_t *slc, const sdio_slave_hostint_t *mask)
+{
+    //use registers in SLC to trigger, rather than write HOST registers directly
+    //other interrupts than tohost interrupts are not supported yet
+    slc->intvec_tohost.slc0_intvec = (*mask);
+}
+
+/**
+ * Enable some of the slave interrups (send from host)
+ *
+ * @param slc Address of the SLC registers
+ * @param mask Mask of interrupts to enable, all those set to 0 will be disabled.
+ */
+static inline void sdio_slave_ll_slvint_set_ena(slc_dev_t *slc, const sdio_slave_ll_slvint_t *mask)
+{
+    //other interrupts are not enabled
+    slc->slc0_int_ena.val = (slc->slc0_int_ena.val & (~0xff)) | ((*mask) & 0xff);
+}
+
+/**
+ * Fetch the slave interrupts (send from host) and clear them.
+ *
+ * @param slc Address of the SLC registers
+ * @param out_slv_int Output of the slave interrupts fetched and cleared.
+ */
+static inline void sdio_slave_ll_slvint_fetch_clear(slc_dev_t *slc, sdio_slave_ll_slvint_t *out_slv_int)
+{
+    sdio_slave_ll_slvint_t slv_int = slc->slc0_int_st.val & 0xff;
+    *out_slv_int = slv_int;
+    slc->slc0_int_clr.val = slv_int;
+}
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/sdio_slave_types.h b/tools/sdk/esp32s3/include/hal/include/hal/sdio_slave_types.h
new file mode 100644
index 00000000000..60e08456fc8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/sdio_slave_types.h
@@ -0,0 +1,47 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc.h"
+
+/// Mask of interrupts sending to the host.
+typedef enum {
+    SDIO_SLAVE_HOSTINT_BIT0 = BIT(0),   ///< General purpose interrupt bit 0.
+    SDIO_SLAVE_HOSTINT_BIT1 = BIT(1),
+    SDIO_SLAVE_HOSTINT_BIT2 = BIT(2),
+    SDIO_SLAVE_HOSTINT_BIT3 = BIT(3),
+    SDIO_SLAVE_HOSTINT_BIT4 = BIT(4),
+    SDIO_SLAVE_HOSTINT_BIT5 = BIT(5),
+    SDIO_SLAVE_HOSTINT_BIT6 = BIT(6),
+    SDIO_SLAVE_HOSTINT_BIT7 = BIT(7),
+    SDIO_SLAVE_HOSTINT_SEND_NEW_PACKET = BIT(23), ///< New packet available
+} sdio_slave_hostint_t;
+
+
+/// Timing of SDIO slave
+typedef enum {
+    SDIO_SLAVE_TIMING_PSEND_PSAMPLE = 0,/**< Send at posedge, and sample at posedge. Default value for HS mode.
+                                         *   Normally there's no problem using this to work in DS mode.
+                                         */
+    SDIO_SLAVE_TIMING_NSEND_PSAMPLE    ,///< Send at negedge, and sample at posedge. Default value for DS mode and below.
+    SDIO_SLAVE_TIMING_PSEND_NSAMPLE,    ///< Send at posedge, and sample at negedge
+    SDIO_SLAVE_TIMING_NSEND_NSAMPLE,    ///< Send at negedge, and sample at negedge
+} sdio_slave_timing_t;
+
+/// Configuration of SDIO slave mode
+typedef enum {
+    SDIO_SLAVE_SEND_STREAM = 0, ///< Stream mode, all packets to send will be combined as one if possible
+    SDIO_SLAVE_SEND_PACKET = 1, ///< Packet mode, one packets will be sent one after another (only increase packet_len if last packet sent).
+} sdio_slave_sending_mode_t;
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/sha_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/sha_hal.h
new file mode 100644
index 00000000000..775063a42d4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/sha_hal.h
@@ -0,0 +1,90 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in soc/include/hal/readme.md
+ ******************************************************************************/
+
+#pragma once
+
+#include <stddef.h>
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+#include "soc/lldesc.h"
+#include "hal/sha_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Hashes a single message block
+ *
+ * @param sha_type          SHA algorithm to hash with
+ * @param data_block        Input message to be hashed
+ * @param block_word_len    Length of the input message
+ * @param first_block       Is this the first block in a message or a continuation?
+ */
+void sha_hal_hash_block(esp_sha_type sha_type, const void *data_block, size_t block_word_len, bool first_block);
+
+/**
+ * @brief Polls and waits until the SHA engine is idle
+ *
+ */
+void sha_hal_wait_idle(void);
+
+/**
+ * @brief Reads the current message digest from the SHA engine
+ *
+ * @param sha_type SHA algorithm used
+ * @param digest_state Output buffer to which to read message digest to
+ */
+void sha_hal_read_digest(esp_sha_type sha_type, void *digest_state);
+
+#if SOC_SHA_SUPPORT_RESUME
+/**
+ * @brief Writes the message digest to the SHA engine
+ *
+ * @param sha_type The SHA algorithm type
+ * @param digest_state Message digest to be written to SHA engine
+ */
+void sha_hal_write_digest(esp_sha_type sha_type, void *digest_state);
+#endif
+
+#if SOC_SHA_SUPPORT_DMA
+/**
+ * @brief Hashes a number of message blocks using DMA
+ *
+ * @param sha_type      SHA algorithm to hash with
+ * @param num_blocks    Number of blocks to hash
+ * @param first_block   Is this the first block in a message or a continuation?
+ */
+void sha_hal_hash_dma(esp_sha_type sha_type, size_t num_blocks, bool first_block);
+#endif
+
+#if SOC_SHA_SUPPORT_SHA512_T
+/**
+ * @brief Calculates and sets the initial digiest for SHA512_t
+ *
+ * @param t_string
+ * @param t_len
+ */
+void sha_hal_sha512_init_hash(uint32_t t_string, uint8_t t_len);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/sha_types.h b/tools/sdk/esp32s3/include/hal/include/hal/sha_types.h
new file mode 100644
index 00000000000..547124b5cee
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/sha_types.h
@@ -0,0 +1,45 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "sdkconfig.h"
+
+/* Use enum from rom for backwards compatibility */
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/sha.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/sha.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/sha.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/sha.h"
+#elif CONFIG_IDF_TARGET_ESP32H2
+#include "esp32h2/rom/sha.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Use enum from rom for backwards compatibility */
+#if CONFIG_IDF_TARGET_ESP32
+typedef enum SHA_TYPE esp_sha_type;
+#else
+typedef SHA_TYPE esp_sha_type;
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/sigmadelta_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/sigmadelta_hal.h
new file mode 100644
index 00000000000..4deeec9bfdd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/sigmadelta_hal.h
@@ -0,0 +1,71 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for SIGMADELTA.
+// There is no parameter check in the hal layer, so the caller must ensure the correctness of the parameters.
+
+#pragma once
+
+#include "soc/sigmadelta_periph.h"
+#include "hal/sigmadelta_types.h"
+#include "hal/sigmadelta_ll.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Context that should be maintained by both the driver and the HAL
+ */
+
+typedef struct {
+    gpio_sd_dev_t *dev;
+} sigmadelta_hal_context_t;
+
+/**
+ * @brief Set Sigma-delta channel duty.
+ *
+ * @param hal Context of the HAL layer
+ * @param channel Sigma-delta channel number
+ * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
+ *             The waveform is more like a random one in this range.
+ */
+#define sigmadelta_hal_set_duty(hal, channel, duty) sigmadelta_ll_set_duty((hal)->dev, channel, duty)
+
+/**
+ * @brief Set Sigma-delta channel's clock pre-scale value.
+ *
+ * @param hal Context of the HAL layer
+ * @param channel Sigma-delta channel number
+ * @param prescale The divider of source clock, ranges from 0 to 255
+ */
+#define sigmadelta_hal_set_prescale(hal, channel, prescale) sigmadelta_ll_set_prescale((hal)->dev, channel, prescale)
+
+/**
+ * @brief Init the SIGMADELTA hal and set the SIGMADELTA to the default configuration. This function should be called first before other hal layer function is called
+ *
+ * @param hal Context of the HAL layer
+ * @param sigmadelta_num The uart port number, the max port number is (SIGMADELTA_NUM_MAX -1)
+ */
+void sigmadelta_hal_init(sigmadelta_hal_context_t *hal, int sigmadelta_num);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/sigmadelta_types.h b/tools/sdk/esp32s3/include/hal/include/hal/sigmadelta_types.h
new file mode 100644
index 00000000000..81023905d67
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/sigmadelta_types.h
@@ -0,0 +1,62 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief SIGMADELTA port number, the max port number is (SIGMADELTA_NUM_MAX -1).
+ */
+typedef enum {
+    SIGMADELTA_PORT_0,      /*!< SIGMADELTA port 0 */
+    SIGMADELTA_PORT_MAX,    /*!< SIGMADELTA port max */
+} sigmadelta_port_t;
+
+_Static_assert(SIGMADELTA_PORT_MAX == SOC_SIGMADELTA_NUM, "Sigma-delta port num incorrect.");
+
+/**
+ * @brief Sigma-delta channel list
+ */
+typedef enum {
+    SIGMADELTA_CHANNEL_0,   /*!< Sigma-delta channel 0 */
+    SIGMADELTA_CHANNEL_1,   /*!< Sigma-delta channel 1 */
+    SIGMADELTA_CHANNEL_2,   /*!< Sigma-delta channel 2 */
+    SIGMADELTA_CHANNEL_3,   /*!< Sigma-delta channel 3 */
+#if SOC_SIGMADELTA_CHANNEL_NUM > 4
+    SIGMADELTA_CHANNEL_4,   /*!< Sigma-delta channel 4 */
+    SIGMADELTA_CHANNEL_5,   /*!< Sigma-delta channel 5 */
+    SIGMADELTA_CHANNEL_6,   /*!< Sigma-delta channel 6 */
+    SIGMADELTA_CHANNEL_7,   /*!< Sigma-delta channel 7 */
+#endif
+    SIGMADELTA_CHANNEL_MAX, /*!< Sigma-delta channel max */
+} sigmadelta_channel_t;
+
+/**
+ * @brief Sigma-delta configure struct
+ */
+typedef struct {
+    sigmadelta_channel_t channel;    /*!< Sigma-delta channel number */
+    int8_t sigmadelta_duty;          /*!< Sigma-delta duty, duty ranges from -128 to 127. */
+    uint8_t sigmadelta_prescale;     /*!< Sigma-delta prescale, prescale ranges from 0 to 255. */
+    uint8_t  sigmadelta_gpio;        /*!< Sigma-delta output io number, refer to gpio.h for more details. */
+} sigmadelta_config_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/soc_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/soc_hal.h
new file mode 100644
index 00000000000..f39cf49f1d6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/soc_hal.h
@@ -0,0 +1,75 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_err.h"
+
+#include "soc/soc_caps.h"
+#include "hal/cpu_hal.h"
+#include "hal/soc_ll.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_CPU_CORES_NUM > 1
+// Utility functions for multicore targets
+#define __SOC_HAL_PERFORM_ON_OTHER_CORES(action)    { \
+                                                        for (uint32_t i = 0, cur = cpu_hal_get_core_id(); i < SOC_CPU_CORES_NUM; i++) { \
+                                                            if (i != cur) { \
+                                                                action(i); \
+                                                            } \
+                                                        } \
+                                                    }
+
+#define SOC_HAL_STALL_OTHER_CORES()                 __SOC_HAL_PERFORM_ON_OTHER_CORES(soc_hal_stall_core);
+#define SOC_HAL_UNSTALL_OTHER_CORES()               __SOC_HAL_PERFORM_ON_OTHER_CORES(soc_hal_unstall_core);
+#define SOC_HAL_RESET_OTHER_CORES()                 __SOC_HAL_PERFORM_ON_OTHER_CORES(soc_hal_reset_core);
+
+/**
+ * Stall the specified CPU core.
+ *
+ * @note Has no effect if the core is already stalled - does not return an
+ * ESP_ERR_INVALID_STATE.
+ *
+ * @param core core to stall [0..SOC_CPU_CORES_NUM - 1]
+ */
+void soc_hal_stall_core(int core);
+
+/**
+ * Unstall the specified CPU core.
+ *
+ * @note Has no effect if the core is already unstalled - does not return an
+ * ESP_ERR_INVALID_STATE.
+ *
+ * @param core core to unstall [0..SOC_CPU_CORES_NUM - 1]
+ */
+void soc_hal_unstall_core(int core);
+
+#endif // SOC_CPU_CORES_NUM > 1
+
+/**
+ * Reset the specified core.
+ *
+ * @param core core to reset [0..SOC_CPU_CORES_NUM - 1]
+ */
+#define soc_hal_reset_core(core)         soc_ll_reset_core((core))
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/spi_flash_encrypt_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/spi_flash_encrypt_hal.h
new file mode 100644
index 00000000000..adc22f7e02a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/spi_flash_encrypt_hal.h
@@ -0,0 +1,62 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The HAL is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for SPI Flash Encryption
+
+#include "hal/spi_flash_encrypted_ll.h"
+
+/**
+ * @brief Enable the flash encryption
+ */
+void spi_flash_encryption_hal_enable(void);
+
+/**
+ * @brief Disable the flash encryption
+ */
+void spi_flash_encryption_hal_disable(void);
+
+/**
+ * Prepare flash encryption before operation.
+ *
+ * @param address The destination address in flash for the write operation.
+ * @param buffer Data for programming
+ * @param size Size to program.
+ *
+ * @note address and buffer must be 8-word aligned.
+ */
+void spi_flash_encryption_hal_prepare(uint32_t address, const uint32_t* buffer, uint32_t size);
+
+/**
+ * @brief flash data encryption operation is done.
+ */
+void spi_flash_encryption_hal_done(void);
+
+/**
+ * Destroy encrypted result
+ */
+void spi_flash_encryption_hal_destroy(void);
+
+/**
+ * Check if is qualified to encrypt the buffer
+ *
+ * @param address the address of written flash partition.
+ * @param length Buffer size.
+ */
+bool spi_flash_encryption_hal_check(uint32_t address, uint32_t length);
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/spi_flash_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/spi_flash_hal.h
new file mode 100644
index 00000000000..ae37016fa2d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/spi_flash_hal.h
@@ -0,0 +1,280 @@
+// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The HAL is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for SPI Flash (common part)
+
+#pragma once
+
+#include "hal/spi_flash_ll.h"
+#include "hal/spi_types.h"
+#include "hal/spi_flash_types.h"
+#include "soc/soc_memory_types.h"
+
+/* Hardware host-specific constants */
+#define SPI_FLASH_HAL_MAX_WRITE_BYTES 64
+#define SPI_FLASH_HAL_MAX_READ_BYTES 64
+
+/**
+ * Generic driver context structure for all chips using the SPI peripheral.
+ * Include this into the HEAD of the driver data for other driver
+ * implementations that also use the SPI peripheral.
+ */
+typedef struct {
+    spi_flash_host_inst_t inst; ///< Host instance, containing host data and function pointer table. May update with the host (hardware version).
+    spi_dev_t *spi;             ///< Pointer to SPI peripheral registers (SP1, SPI2 or SPI3). Set before initialisation.
+    int cs_num;                 ///< Which cs pin is used, 0-2.
+    struct {
+        uint8_t extra_dummy;            ///< Pre-calculated extra dummy used for compensation
+        uint8_t cs_setup;               ///< (cycles-1) of prepare phase by spi clock.
+        uint8_t cs_hold;                ///< CS hold time config used by the host
+        uint8_t reserved2;              ///< Reserved, set to 0.
+    };
+    spi_flash_ll_clock_reg_t clock_conf;    ///< Pre-calculated clock configuration value
+    esp_flash_io_mode_t base_io_mode;       ///< Default IO mode mask for common commands
+    uint32_t flags;             ///< Flags for configurations with one set of driver code. (e.g. QPI mode, auto-suspend mode, 64-bit address mode, etc.)
+#define SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_SUSPEND         BIT(0)  ///< When the auto-suspend is setup in configuration.
+#define SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_RESUME          BIT(1)  ///< Setup auto-resume feature.
+#define SPI_FLASH_HOST_CONTEXT_FLAG_OCTAL_MODE           BIT(2)  ///< Flash works under octal spi mode.
+    spi_flash_sus_cmd_conf sus_cfg;        ///< To store suspend command/mask information.
+    uint32_t slicer_flags;      /// Slicer flags for configuring how to slice data correctly while reading or writing.
+#define SPI_FLASH_HOST_CONTEXT_SLICER_FLAG_DTR           BIT(0)  ///< Slice data according to DTR mode, the address and length must be even (A0=0).
+} spi_flash_hal_context_t;
+_Static_assert(sizeof(spi_flash_hal_context_t) == 40, "size of spi_flash_hal_context_t incorrect. Please check data compatibility with the ROM");
+
+/// This struct provide MSPI Flash necessary timing related config, should be consistent with that in union in `spi_flash_hal_config_t`.
+typedef struct {
+    uint32_t extra_dummy;
+    uint32_t cs_hold;
+    uint8_t cs_setup;
+    spi_flash_ll_clock_reg_t clock_config;
+} spi_flash_hal_timing_config_t;
+
+/// Configuration structure for the SPI driver.
+typedef struct {
+    union {
+        struct {
+            uint32_t extra_dummy;   ///< extra dummy for timing compensation.
+            uint32_t cs_hold;       ///< CS hold time config used by the host
+            uint8_t cs_setup;       ///< (cycles-1) of prepare phase by spi clock
+            spi_flash_ll_clock_reg_t clock_config;  ///< (optional) Clock configuration for Octal flash.
+        };
+        spi_flash_hal_timing_config_t timing_reg;  ///< Reconfigure timing tuning regs.
+    };
+    bool iomux;             ///< Whether the IOMUX is used, used for timing compensation.
+    int input_delay_ns;     ///< Input delay on the MISO pin after the launch clock, used for timing compensation.
+    esp_flash_speed_t speed;///< SPI flash clock speed to work at.
+    spi_host_device_t host_id;            ///< SPI peripheral ID.
+    int cs_num;             ///< Which cs pin is used, 0-(SOC_SPI_PERIPH_CS_NUM-1).
+    bool auto_sus_en;       ///< Auto suspend feature enable bit 1: enable, 0: disable.
+    bool octal_mode_en;     ///< Octal spi flash mode enable bit 1: enable, 0: disable.
+    bool using_timing_tuning;               ///< System exist SPI0/1 timing tuning, using value from system directely if set to 1.
+    esp_flash_io_mode_t default_io_mode;        ///< Default flash io mode.
+} spi_flash_hal_config_t;
+
+/**
+ * Configure SPI flash hal settings.
+ *
+ * @param data Buffer to hold configured data, the buffer should be in DRAM to be available when cache disabled
+ * @param cfg Configurations to set
+ *
+ * @return
+ *      - ESP_OK: success
+ *      - ESP_ERR_INVALID_ARG: the data buffer is not in the DRAM.
+ */
+esp_err_t spi_flash_hal_init(spi_flash_hal_context_t *data_out, const spi_flash_hal_config_t *cfg);
+
+/**
+ * Configure the device-related register before transactions.
+ *
+ * @param host The driver context.
+ *
+ * @return always return ESP_OK.
+ */
+esp_err_t spi_flash_hal_device_config(spi_flash_host_inst_t *host);
+
+/**
+ * Send an user-defined spi transaction to the device.
+ *
+ * @note This is usually used when the memspi interface doesn't support some
+ *      particular commands. Since this function supports timing compensation, it is
+ *      also used to receive some data when the frequency is high.
+ *
+ * @param host The driver context.
+ * @param trans The transaction to send, also holds the received data.
+ *
+ * @return always return ESP_OK.
+ */
+esp_err_t spi_flash_hal_common_command(spi_flash_host_inst_t *host, spi_flash_trans_t *trans);
+
+/**
+ * Erase whole flash chip by using the erase chip (C7h) command.
+ *
+ * @param host The driver context.
+ */
+void spi_flash_hal_erase_chip(spi_flash_host_inst_t *host);
+
+/**
+ * Erase a specific sector by its start address through the sector erase (20h)
+ * command. For 24bit address only.
+ *
+ * @param host The driver context.
+ * @param start_address Start address of the sector to erase.
+ */
+void spi_flash_hal_erase_sector(spi_flash_host_inst_t *host, uint32_t start_address);
+
+/**
+ * Erase a specific 64KB block by its start address through the 64KB block
+ * erase (D8h) command. For 24bit address only.
+ *
+ * @param host The driver context.
+ * @param start_address Start address of the block to erase.
+ */
+void spi_flash_hal_erase_block(spi_flash_host_inst_t *host, uint32_t start_address);
+
+/**
+ * Program a page of the flash using the page program (02h) command. For 24bit address only.
+ *
+ * @param host The driver context.
+ * @param address Address of the page to program
+ * @param buffer Data to program
+ * @param length Size of the buffer in bytes, no larger than ``SPI_FLASH_HAL_MAX_WRITE_BYTES`` (64) bytes.
+ */
+void spi_flash_hal_program_page(spi_flash_host_inst_t *host, const void *buffer, uint32_t address, uint32_t length);
+
+/**
+ * Read from the flash. Call ``spi_flash_hal_configure_host_read_mode`` to
+ * configure the read command before calling this function.
+ *
+ * @param host The driver context.
+ * @param buffer Buffer to store the read data
+ * @param address Address to read
+ * @param length Length to read, no larger than ``SPI_FLASH_HAL_MAX_READ_BYTES`` (64) bytes.
+ *
+ * @return always return ESP_OK.
+ */
+esp_err_t spi_flash_hal_read(spi_flash_host_inst_t *host, void *buffer, uint32_t address, uint32_t read_len);
+
+/**
+ * @brief Send the write enable (06h) or write disable (04h) command to the flash chip.
+ *
+ * @param driver The driver context.
+ * @param wp true to enable the write protection, otherwise false.
+ *
+ * @return always return ESP_OK.
+ */
+esp_err_t spi_flash_hal_set_write_protect(spi_flash_host_inst_t *host, bool wp);
+
+/**
+ * Check whether the SPI host is idle and can perform other operations.
+ *
+ * @param host The driver context.
+ *
+ * @return 0:busy, 1:idle, 2:suspended.
+ */
+uint32_t spi_flash_hal_check_status(spi_flash_host_inst_t *host);
+
+/**
+ * @brief Configure the SPI host hardware registers for the specified io mode.
+ *
+ *  Note that calling this configures SPI host registers, so if running any
+ *  other commands as part of set_io_mode() then these must be run before
+ *  calling this function.
+ *
+ *  The command value, address length and dummy cycles are configured according
+ *  to the format of read commands:
+ *
+ *  - command: 8 bits, value set.
+ *  - address: 24 bits
+ *  - dummy: cycles to compensate the input delay
+ *  - out & in data: 0 bits.
+ *
+ *  The following commands still need to:
+ *
+ *  - Read data: set address value and data (length and contents), no need
+ *    to touch command and dummy phases.
+ *  - Common read: set command value, address value (or length to 0 if not used)
+ *  - Common write: set command value, address value (or length to 0 if not
+ *    used), disable dummy phase, and set output data.
+ *
+ * @param host The driver context
+ * @param io_mode The HW read mode to use
+ * @param addr_bitlen Length of the address phase, in bits
+ * @param dummy_cyclelen_base Base cycles of the dummy phase, some extra dummy cycles may be appended to compensate the timing.
+ * @param command  Actual reading command to send to flash chip on the bus.
+ *
+ * @return always return ESP_OK.
+ */
+esp_err_t spi_flash_hal_configure_host_io_mode(spi_flash_host_inst_t *host, uint32_t command, uint32_t addr_bitlen,
+                                               int dummy_cyclelen_base, esp_flash_io_mode_t io_mode);
+
+/**
+ * Poll until the last operation is done.
+ *
+ * @param host The driver context.
+ */
+void spi_flash_hal_poll_cmd_done(spi_flash_host_inst_t *host);
+
+/**
+ * Check whether the given buffer can be used as the write buffer directly. If 'chip' is connected to the main SPI bus, we can only write directly from
+ * regions that are accessible ith cache disabled. *
+ *
+ * @param host The driver context
+ * @param p The buffer holding data to send.
+ *
+ * @return True if the buffer can be used to send data, otherwise false.
+ */
+bool spi_flash_hal_supports_direct_write(spi_flash_host_inst_t *host, const void *p);
+
+/**
+ * Check whether the given buffer can be used as the read buffer directly. If 'chip' is connected to the main SPI bus, we can only read directly from
+ * regions that are accessible ith cache disabled. *
+ *
+ * @param host The driver context
+ * @param p The buffer to hold the received data.
+ *
+ * @return True if the buffer can be used to receive data, otherwise false.
+ */
+bool spi_flash_hal_supports_direct_read(spi_flash_host_inst_t *host, const void *p);
+
+/**
+ * @brief Resume flash chip status from suspend.
+ *
+ * @param host The driver context.
+ *
+ */
+void spi_flash_hal_resume(spi_flash_host_inst_t *host);
+
+/**
+ * @brief Set the flash into suspend status manually.
+ *
+ * @param host The driver context.
+ *
+ */
+void spi_flash_hal_suspend(spi_flash_host_inst_t *host);
+
+/**
+ * To setup for reading flash suspend status register
+ *
+ * @param host The driver context.
+ * @param sus_conf Flash chip suspend feature configuration, mainly for command config, may vary from chip to chip.
+ *
+ * @return Always ESP_OK
+ */
+esp_err_t spi_flash_hal_setup_read_suspend(spi_flash_host_inst_t *host, const spi_flash_sus_cmd_conf *sus_conf);
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/spi_flash_types.h b/tools/sdk/esp32s3/include/hal/include/hal/spi_flash_types.h
new file mode 100644
index 00000000000..c9d5035e60e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/spi_flash_types.h
@@ -0,0 +1,257 @@
+// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <esp_types.h>
+#include <esp_bit_defs.h>
+#include "esp_flash_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Definition of a common transaction. Also holds the return value. */
+typedef struct {
+    uint8_t reserved;           ///< Reserved, must be 0.
+    uint8_t mosi_len;           ///< Output data length, in bytes
+    uint8_t miso_len;           ///< Input data length, in bytes
+    uint8_t address_bitlen;     ///< Length of address in bits, set to 0 if command does not need an address
+    uint32_t address;           ///< Address to perform operation on
+    const uint8_t *mosi_data;   ///< Output data to salve
+    uint8_t *miso_data;         ///< [out] Input data from slave, little endian
+    uint32_t flags;             ///< Flags for this transaction. Set to 0 for now.
+#define SPI_FLASH_TRANS_FLAG_CMD16          BIT(0)  ///< Send command of 16 bits
+#define SPI_FLASH_TRANS_FLAG_IGNORE_BASEIO  BIT(1)  ///< Not applying the basic io mode configuration for this transaction
+#define SPI_FLASH_TRANS_FLAG_BYTE_SWAP      BIT(2)  ///< Used for DTR mode, to swap the bytes of a pair of rising/falling edge
+    uint16_t command;           ///< Command to send
+    uint8_t dummy_bitlen;       ///< Basic dummy bits to use
+    uint32_t io_mode;           ///< Flash working mode when `SPI_FLASH_IGNORE_BASEIO` is specified.
+} spi_flash_trans_t;
+
+/**
+ * @brief SPI flash clock speed values, always refer to them by the enum rather
+ * than the actual value (more speed may be appended into the list).
+ *
+ * A strategy to select the maximum allowed speed is to enumerate from the
+ * ``ESP_FLSH_SPEED_MAX-1`` or highest frequency supported by your flash, and
+ * decrease the speed until the probing success.
+ */
+typedef enum {
+    ESP_FLASH_5MHZ = 0, ///< The flash runs under 5MHz
+    ESP_FLASH_10MHZ,    ///< The flash runs under 10MHz
+    ESP_FLASH_20MHZ,    ///< The flash runs under 20MHz
+    ESP_FLASH_26MHZ,    ///< The flash runs under 26MHz
+    ESP_FLASH_40MHZ,    ///< The flash runs under 40MHz
+    ESP_FLASH_80MHZ,    ///< The flash runs under 80MHz
+    ESP_FLASH_120MHZ,   ///< The flash runs under 120MHz, 120MHZ can only be used by main flash after timing tuning in system. Do not use this directely in any API.
+    ESP_FLASH_SPEED_MAX, ///< The maximum frequency supported by the host is ``ESP_FLASH_SPEED_MAX-1``.
+} esp_flash_speed_t;
+
+///Lowest speed supported by the driver, currently 5 MHz
+#define ESP_FLASH_SPEED_MIN     ESP_FLASH_5MHZ
+
+// These bits are not quite like "IO mode", but are able to be appended into the io mode and used by the HAL.
+#define SPI_FLASH_CONFIG_CONF_BITS      BIT(31) ///< OR the io_mode with this mask, to enable the dummy output feature or replace the first several dummy bits into address to meet the requirements of conf bits. (Used in DIO/QIO/OIO mode)
+
+/** @brief Mode used for reading from SPI flash */
+typedef enum {
+    SPI_FLASH_SLOWRD = 0, ///< Data read using single I/O, some limits on speed
+    SPI_FLASH_FASTRD, ///< Data read using single I/O, no limit on speed
+    SPI_FLASH_DOUT,   ///< Data read using dual I/O
+    SPI_FLASH_DIO,    ///< Both address & data transferred using dual I/O
+    SPI_FLASH_QOUT,   ///< Data read using quad I/O
+    SPI_FLASH_QIO,    ///< Both address & data transferred using quad I/O
+#define SPI_FLASH_OPI_FLAG 16    ///< A flag for flash work in opi mode, the io mode below are opi, above are SPI/QSPI mode. DO NOT use this value in any API.
+    SPI_FLASH_OPI_STR = SPI_FLASH_OPI_FLAG,///< Only support on OPI flash, flash read and write under STR mode
+    SPI_FLASH_OPI_DTR,///< Only support on OPI flash, flash read and write under DTR mode
+    SPI_FLASH_READ_MODE_MAX,    ///< The fastest io mode supported by the host is ``ESP_FLASH_READ_MODE_MAX-1``.
+} esp_flash_io_mode_t;
+
+/// Configuration structure for the flash chip suspend feature.
+typedef struct {
+    uint32_t sus_mask;     ///< SUS/SUS1/SUS2 bit in flash register.
+    struct {
+        uint32_t cmd_rdsr    :8;             ///< Read flash status register(2) command.
+        uint32_t sus_cmd     :8;             ///< Flash suspend command.
+        uint32_t res_cmd     :8;             ///< Flash resume command.
+        uint32_t reserved    :8;             ///< Reserved, set to 0.
+    };
+} spi_flash_sus_cmd_conf;
+
+/// Structure for flash encryption operations.
+typedef struct
+{
+    /**
+     * @brief Enable the flash encryption
+    */
+    void (*flash_encryption_enable)(void);
+    /**
+     * @brief Disable the flash encryption
+    */
+    void (*flash_encryption_disable)(void);
+    /**
+     * Prepare flash encryption before operation.
+     *
+     * @param address The destination address in flash for the write operation.
+     * @param buffer Data for programming
+     * @param size Size to program.
+     *
+     * @note address and buffer must be 8-word aligned.
+     */
+    void (*flash_encryption_data_prepare)(uint32_t address, const uint32_t* buffer, uint32_t size);
+    /**
+     * @brief flash data encryption operation is done.
+     */
+    void (*flash_encryption_done)(void);
+    /**
+     * Destroy encrypted result
+    */
+    void (*flash_encryption_destroy)(void);
+    /**
+     * Check if is qualified to encrypt the buffer
+     *
+     * @param address the address of written flash partition.
+     * @param length Buffer size.
+     */
+    bool (*flash_encryption_check)(uint32_t address, uint32_t length);
+} spi_flash_encryption_t;
+
+///Slowest io mode supported by ESP32, currently SlowRd
+#define SPI_FLASH_READ_MODE_MIN SPI_FLASH_SLOWRD
+
+struct spi_flash_host_driver_s;
+typedef struct spi_flash_host_driver_s spi_flash_host_driver_t;
+
+/** SPI Flash Host driver instance */
+typedef struct {
+    const struct spi_flash_host_driver_s* driver;  ///< Pointer to the implementation function table
+    // Implementations can wrap this structure into their own ones, and append other data here
+} spi_flash_host_inst_t ;
+
+
+/** Host driver configuration and context structure. */
+struct spi_flash_host_driver_s {
+    /**
+     * Configure the device-related register before transactions. This saves
+     * some time to re-configure those registers when we send continuously
+     */
+    esp_err_t (*dev_config)(spi_flash_host_inst_t *host);
+    /**
+     * Send an user-defined spi transaction to the device.
+     */
+    esp_err_t (*common_command)(spi_flash_host_inst_t *host, spi_flash_trans_t *t);
+    /**
+     * Read flash ID.
+     */
+    esp_err_t (*read_id)(spi_flash_host_inst_t *host, uint32_t *id);
+    /**
+     * Erase whole flash chip.
+     */
+    void (*erase_chip)(spi_flash_host_inst_t *host);
+    /**
+     * Erase a specific sector by its start address.
+     */
+    void (*erase_sector)(spi_flash_host_inst_t *host, uint32_t start_address);
+    /**
+     * Erase a specific block by its start address.
+     */
+    void (*erase_block)(spi_flash_host_inst_t *host, uint32_t start_address);
+    /**
+     * Read the status of the flash chip.
+     */
+    esp_err_t (*read_status)(spi_flash_host_inst_t *host, uint8_t *out_sr);
+    /**
+     * Disable write protection.
+     */
+    esp_err_t (*set_write_protect)(spi_flash_host_inst_t *host, bool wp);
+    /**
+     * Program a page of the flash. Check ``max_write_bytes`` for the maximum allowed writing length.
+     */
+    void (*program_page)(spi_flash_host_inst_t *host, const void *buffer, uint32_t address, uint32_t length);
+    /** Check whether given buffer can be directly used to write */
+    bool (*supports_direct_write)(spi_flash_host_inst_t *host, const void *p);
+    /**
+     * Slicer for write data. The `program_page` should be called iteratively with the return value
+     * of this function.
+     *
+     * @param address Beginning flash address to write
+     * @param len Length request to write
+     * @param align_addr Output of the aligned address to write to
+     * @param page_size Physical page size of the flash chip
+     * @return Length that can be actually written in one `program_page` call
+     */
+    int (*write_data_slicer)(spi_flash_host_inst_t *host, uint32_t address, uint32_t len, uint32_t *align_addr,
+                             uint32_t page_size);
+    /**
+     * Read data from the flash. Check ``max_read_bytes`` for the maximum allowed reading length.
+     */
+    esp_err_t (*read)(spi_flash_host_inst_t *host, void *buffer, uint32_t address, uint32_t read_len);
+    /** Check whether given buffer can be directly used to read */
+    bool (*supports_direct_read)(spi_flash_host_inst_t *host, const void *p);
+    /**
+     * Slicer for read data. The `read` should be called iteratively with the return value
+     * of this function.
+     *
+     * @param address Beginning flash address to read
+     * @param len Length request to read
+     * @param align_addr Output of the aligned address to read
+     * @param page_size Physical page size of the flash chip
+     * @return Length that can be actually read in one `read` call
+     */
+    int (*read_data_slicer)(spi_flash_host_inst_t *host, uint32_t address, uint32_t len, uint32_t *align_addr, uint32_t page_size);
+    /**
+     * Check the host status, 0:busy, 1:idle, 2:suspended.
+     */
+    uint32_t (*host_status)(spi_flash_host_inst_t *host);
+    /**
+     * Configure the host to work at different read mode. Responsible to compensate the timing and set IO mode.
+     */
+    esp_err_t (*configure_host_io_mode)(spi_flash_host_inst_t *host, uint32_t command,
+                                        uint32_t addr_bitlen, int dummy_bitlen_base,
+                                        esp_flash_io_mode_t io_mode);
+    /**
+     *  Internal use, poll the HW until the last operation is done.
+     */
+    void (*poll_cmd_done)(spi_flash_host_inst_t *host);
+    /**
+     * For some host (SPI1), they are shared with a cache. When the data is
+     * modified, the cache needs to be flushed. Left NULL if not supported.
+     */
+    esp_err_t (*flush_cache)(spi_flash_host_inst_t* host, uint32_t addr, uint32_t size);
+
+    /**
+     * Suspend check erase/program operation, reserved for ESP32-C3 and ESP32-S3 spi flash ROM IMPL.
+     */
+    void (*check_suspend)(spi_flash_host_inst_t *host);
+
+    /**
+     * Resume flash from suspend manually
+     */
+    void (*resume)(spi_flash_host_inst_t *host);
+
+    /**
+     * Set flash in suspend status manually
+     */
+    void (*suspend)(spi_flash_host_inst_t *host);
+
+    /**
+     * Suspend feature setup for setting cmd and status register mask.
+     */
+    esp_err_t (*sus_setup)(spi_flash_host_inst_t *host, const spi_flash_sus_cmd_conf *sus_conf);
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/spi_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/spi_hal.h
new file mode 100644
index 00000000000..5be7db32ea9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/spi_hal.h
@@ -0,0 +1,271 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for SPI master (common part)
+
+// SPI HAL usages:
+// 1. initialize the bus
+// 2. initialize the DMA descriptors if DMA used
+// 3. setup the clock speed (since this takes long time)
+// 4. call setup_device to update parameters for the specific device
+// 5. call setup_trans to update parameters for the specific transaction
+// 6. prepare data to send, and prepare the receiving buffer
+// 7. trigger user defined SPI transaction to start
+// 8. wait until the user transaction is done
+// 9. fetch the received data
+// Parameter to be updated only during ``setup_device`` will be highlighted in the
+// field comments.
+
+#pragma once
+#include "hal/spi_ll.h"
+#include <esp_err.h>
+#include "soc/lldesc.h"
+#include "soc/soc_caps.h"
+#include "hal/spi_types.h"
+
+/**
+ * Input parameters to the ``spi_hal_cal_clock_conf`` to calculate the timing configuration
+ */
+typedef struct {
+    uint32_t half_duplex;               ///< Whether half duplex mode is used, device specific
+    uint32_t no_compensate;             ///< No need to add dummy to compensate the timing, device specific
+    uint32_t clock_speed_hz;            ///< Desired frequency.
+    uint32_t duty_cycle;                ///< Desired duty cycle of SPI clock
+    uint32_t input_delay_ns;            /**< Maximum delay between SPI launch clock and the data to be valid.
+                                         *   This is used to compensate/calculate the maximum frequency allowed.
+                                         *   Left 0 if not known.
+                                         */
+    bool use_gpio;                      ///< True if the GPIO matrix is used, otherwise false
+} spi_hal_timing_param_t;
+
+/**
+ * Timing configuration structure that should be calculated by
+ * ``spi_hal_cal_clock_conf`` at initialization and hold. Filled into the
+ * ``timing_conf`` member of the context of HAL before setup a device.
+ */
+typedef struct {
+    spi_ll_clock_val_t clock_reg;       ///< Register value used by the LL layer
+    int timing_dummy;                   ///< Extra dummy needed to compensate the timing
+    int timing_miso_delay;              ///< Extra miso delay clocks to compensate the timing
+} spi_hal_timing_conf_t;
+
+/**
+ * DMA configuration structure
+ * Should be set by driver at initialization
+ */
+typedef struct {
+    spi_dma_dev_t *dma_in;              ///< Input  DMA(DMA -> RAM) peripheral register address
+    spi_dma_dev_t *dma_out;             ///< Output DMA(RAM -> DMA) peripheral register address
+    bool dma_enabled;                   ///< Whether the DMA is enabled, do not update after initialization
+    lldesc_t  *dmadesc_tx;              /**< Array of DMA descriptor used by the TX DMA.
+                                         *   The amount should be larger than dmadesc_n. The driver should ensure that
+                                         *   the data to be sent is shorter than the descriptors can hold.
+                                         */
+    lldesc_t *dmadesc_rx;               /**< Array of DMA descriptor used by the RX DMA.
+                                         *   The amount should be larger than dmadesc_n. The driver should ensure that
+                                         *   the data to be sent is shorter than the descriptors can hold.
+                                         */
+    uint32_t tx_dma_chan;               ///< TX DMA channel
+    uint32_t rx_dma_chan;               ///< RX DMA channel
+    int dmadesc_n;                      ///< The amount of descriptors of both ``dmadesc_tx`` and ``dmadesc_rx`` that the HAL can use.
+} spi_hal_config_t;
+
+/**
+ * Transaction configuration structure, this should be assigned by driver each time.
+ * All these parameters will be updated to the peripheral every transaction.
+ */
+typedef struct {
+    uint16_t cmd;                       ///< Command value to be sent
+    int cmd_bits;                       ///< Length (in bits) of the command phase
+    int addr_bits;                      ///< Length (in bits) of the address phase
+    int dummy_bits;                     ///< Base length (in bits) of the dummy phase. Note when the compensation is enabled, some extra dummy bits may be appended.
+    int tx_bitlen;                      ///< TX length, in bits
+    int rx_bitlen;                      ///< RX length, in bits
+    uint64_t addr;                      ///< Address value to be sent
+    uint8_t *send_buffer;               ///< Data to be sent
+    uint8_t *rcv_buffer;                ///< Buffer to hold the receive data.
+    spi_line_mode_t line_mode;          ///< SPI line mode of this transaction
+    int cs_keep_active;                 ///< Keep CS active after transaction
+} spi_hal_trans_config_t;
+
+/**
+ * Context that should be maintained by both the driver and the HAL.
+ */
+typedef struct {
+    /* These two need to be malloced by the driver first */
+    lldesc_t  *dmadesc_tx;              /**< Array of DMA descriptor used by the TX DMA.
+                                         *   The amount should be larger than dmadesc_n. The driver should ensure that
+                                         *   the data to be sent is shorter than the descriptors can hold.
+                                         */
+    lldesc_t *dmadesc_rx;               /**< Array of DMA descriptor used by the RX DMA.
+                                         *   The amount should be larger than dmadesc_n. The driver should ensure that
+                                         *   the data to be sent is shorter than the descriptors can hold.
+                                         */
+
+    /* Configured by driver at initialization, don't touch */
+    spi_dev_t     *hw;                  ///< Beginning address of the peripheral registers.
+    spi_dma_dev_t *dma_in;              ///< Address of the DMA peripheral registers which stores the data received from a peripheral into RAM (DMA -> RAM).
+    spi_dma_dev_t *dma_out;             ///< Address of the DMA peripheral registers which transmits the data from RAM to a peripheral (RAM -> DMA).
+    bool  dma_enabled;                  ///< Whether the DMA is enabled, do not update after initialization
+    uint32_t tx_dma_chan;               ///< TX DMA channel
+    uint32_t rx_dma_chan;               ///< RX DMA channel
+    int dmadesc_n;                      ///< The amount of descriptors of both ``dmadesc_tx`` and ``dmadesc_rx`` that the HAL can use.
+
+    /* Internal parameters, don't touch */
+    spi_hal_trans_config_t trans_config; ///< Transaction configuration
+} spi_hal_context_t;
+
+/**
+ * Device configuration structure, this should be initialised by driver based on different devices respectively.
+ * All these parameters will be updated to the peripheral only when ``spi_hal_setup_device``.
+ * They may not get updated when ``spi_hal_setup_trans``.
+ */
+typedef struct {
+    int mode;                           ///< SPI mode, device specific
+    int cs_setup;                       ///< Setup time of CS active edge before the first SPI clock, device specific
+    int cs_hold;                        ///< Hold time of CS inactive edge after the last SPI clock, device specific
+    int cs_pin_id;                      ///< CS pin to use, 0-2, otherwise all the CS pins are not used. Device specific
+    spi_hal_timing_conf_t timing_conf;  /**< This structure holds the pre-calculated timing configuration for the device
+                                         *   at initialization, device specific
+                                         */
+    struct {
+        uint32_t sio : 1;               ///< Whether to use SIO mode, device specific
+        uint32_t half_duplex : 1;       ///< Whether half duplex mode is used, device specific
+        uint32_t tx_lsbfirst : 1;       ///< Whether LSB is sent first for TX data, device specific
+        uint32_t rx_lsbfirst : 1;       ///< Whether LSB is received first for RX data, device specific
+        uint32_t no_compensate : 1;     ///< No need to add dummy to compensate the timing, device specific
+#if SOC_SPI_SUPPORT_AS_CS
+        uint32_t as_cs  : 1;            ///< Whether to toggle the CS while the clock toggles, device specific
+#endif
+        uint32_t positive_cs : 1;       ///< Whether the postive CS feature is abled, device specific
+    };//boolean configurations
+} spi_hal_dev_config_t;
+
+/**
+ * Init the peripheral and the context.
+ *
+ * @param hal        Context of the HAL layer.
+ * @param host_id    Index of the SPI peripheral. 0 for SPI1, 1 for SPI2 and 2 for SPI3.
+ * @param hal_config Configuration of the hal defined by the upper layer.
+ */
+void spi_hal_init(spi_hal_context_t *hal, uint32_t host_id, const spi_hal_config_t *hal_config);
+
+/**
+ * Deinit the peripheral (and the context if needed).
+ *
+ * @param hal Context of the HAL layer.
+ */
+void spi_hal_deinit(spi_hal_context_t *hal);
+
+/**
+ * Setup device-related configurations according to the settings in the context.
+ *
+ * @param hal       Context of the HAL layer.
+ * @param hal_dev   Device configuration
+ */
+void spi_hal_setup_device(spi_hal_context_t *hal, const spi_hal_dev_config_t *hal_dev);
+
+/**
+ * Setup transaction related configurations according to the settings in the context.
+ *
+ * @param hal       Context of the HAL layer.
+ * @param hal_dev   Device configuration
+ * @param hal_trans Transaction configuration
+ */
+void spi_hal_setup_trans(spi_hal_context_t *hal, const spi_hal_dev_config_t *hal_dev, const spi_hal_trans_config_t *hal_trans);
+
+/**
+ * Prepare the data for the current transaction.
+ *
+ * @param hal            Context of the HAL layer.
+ * @param hal_dev        Device configuration
+ * @param hal_trans      Transaction configuration
+ */
+void spi_hal_prepare_data(spi_hal_context_t *hal, const spi_hal_dev_config_t *hal_dev, const spi_hal_trans_config_t *hal_trans);
+
+/**
+ * Trigger start a user-defined transaction.
+ *
+ * @param hal Context of the HAL layer.
+ */
+void spi_hal_user_start(const spi_hal_context_t *hal);
+
+/**
+ * Check whether the transaction is done (trans_done is set).
+ *
+ * @param hal Context of the HAL layer.
+ */
+bool spi_hal_usr_is_done(const spi_hal_context_t *hal);
+
+/**
+ * Post transaction operations, mainly fetch data from the buffer.
+ *
+ * @param hal       Context of the HAL layer.
+ */
+void spi_hal_fetch_result(const spi_hal_context_t *hal);
+
+/*----------------------------------------------------------
+ * Utils
+ * ---------------------------------------------------------*/
+/**
+ * Calculate the configuration of clock and timing. The configuration will be used when ``spi_hal_setup_device``.
+ *
+ * It is highly suggested to do this at initialization, since it takes long time.
+ *
+ * @param timing_param   Input parameters to calculate timing configuration
+ * @param out_freq       Output of the actual frequency, left NULL if not required.
+ * @param timing_conf    Output of the timing configuration.
+ *
+ * @return ESP_OK if desired is available, otherwise fail.
+ */
+esp_err_t spi_hal_cal_clock_conf(const spi_hal_timing_param_t *timing_param, int *out_freq, spi_hal_timing_conf_t *timing_conf);
+
+/**
+ * Get the frequency actual used.
+ *
+ * @param hal            Context of the HAL layer.
+ * @param fapb           APB clock frequency.
+ * @param hz             Desired frequencyc.
+ * @param duty_cycle     Desired duty cycle.
+ */
+int spi_hal_master_cal_clock(int fapb, int hz, int duty_cycle);
+
+/**
+ * Get the timing configuration for given parameters.
+ *
+ * @param eff_clk        Actual SPI clock frequency
+ * @param gpio_is_used   true if the GPIO matrix is used, otherwise false.
+ * @param input_delay_ns Maximum delay between SPI launch clock and the data to
+ *                       be valid. This is used to compensate/calculate the maximum frequency
+ *                       allowed. Left 0 if not known.
+ * @param dummy_n        Dummy cycles required to correctly read the data.
+ * @param miso_delay_n   suggested delay on the MISO line, in APB clocks.
+ */
+void spi_hal_cal_timing(int eff_clk, bool gpio_is_used, int input_delay_ns, int *dummy_n, int *miso_delay_n);
+
+/**
+ * Get the maximum frequency allowed to read if no compensation is used.
+ *
+ * @param gpio_is_used   true if the GPIO matrix is used, otherwise false.
+ * @param input_delay_ns Maximum delay between SPI launch clock and the data to
+ *                       be valid. This is used to compensate/calculate the maximum frequency
+ *                       allowed. Left 0 if not known.
+ */
+int spi_hal_get_freq_limit(bool gpio_is_used, int input_delay_ns);
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/spi_slave_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/spi_slave_hal.h
new file mode 100644
index 00000000000..3ad5f485f1f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/spi_slave_hal.h
@@ -0,0 +1,163 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for SPI slave (common part)
+
+// SPI slave HAL usages:
+// 1. initialize the bus
+// 2. initialize the DMA descriptors if DMA used
+// 3. call setup_device to update parameters for the device
+// 4. prepare data to send, and prepare the receiving buffer
+// 5. trigger user defined SPI transaction to start
+// 6. wait until the user transaction is done
+// 7. store the received data and get the length
+// 8. check and reset the DMA (if needed) before the next transaction
+
+#pragma once
+
+#include <esp_types.h>
+#include "soc/lldesc.h"
+#include "soc/spi_struct.h"
+#include "soc/soc_caps.h"
+#include "hal/spi_ll.h"
+
+/**
+ * Context that should be maintained by both the driver and the HAL.
+ */
+typedef struct {
+    /* configured by driver at initialization, don't touch */
+    spi_dev_t     *hw;              ///< Beginning address of the peripheral registers.
+    spi_dma_dev_t *dma_in;          ///< Address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
+    spi_dma_dev_t *dma_out;         ///< Address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
+    /* should be configured by driver at initialization */
+    lldesc_t      *dmadesc_rx;      /**< Array of DMA descriptor used by the TX DMA.
+                                     *   The amount should be larger than dmadesc_n. The driver should ensure that
+                                     *   the data to be sent is shorter than the descriptors can hold.
+                                     */
+    lldesc_t      *dmadesc_tx;      /**< Array of DMA descriptor used by the RX DMA.
+                                     *   The amount should be larger than dmadesc_n. The driver should ensure that
+                                     *   the data to be sent is shorter than the descriptors can hold.
+                                     */
+    int           dmadesc_n;        ///< The amount of descriptors of both ``dmadesc_tx`` and ``dmadesc_rx`` that the HAL can use.
+    uint32_t      tx_dma_chan;      ///< TX DMA channel
+    uint32_t      rx_dma_chan;      ///< RX DMA channel
+
+    /*
+     * configurations to be filled after ``spi_slave_hal_init``. Updated to
+     * peripheral registers when ``spi_slave_hal_setup_device`` is called.
+     */
+    struct {
+        uint32_t rx_lsbfirst : 1;
+        uint32_t tx_lsbfirst : 1;
+        uint32_t use_dma     : 1;
+    };
+    int mode;
+
+    /*
+     * Transaction specific (data), all these parameters will be updated to the
+     * peripheral every transaction.
+     */
+    uint32_t bitlen;                ///< Expected maximum length of the transaction, in bits.
+    const void *tx_buffer;          ///< Data to be sent
+    void *rx_buffer;                ///< Buffer to hold the received data.
+
+    /*  Other transaction result after one transaction */
+    uint32_t rcv_bitlen;            ///< Length of the last transaction, in bits.
+} spi_slave_hal_context_t;
+
+typedef struct {
+    uint32_t host_id;               ///< SPI controller ID
+    spi_dma_dev_t *dma_in;          ///< Input  DMA(DMA -> RAM) peripheral register address
+    spi_dma_dev_t *dma_out;         ///< Output DMA(RAM -> DMA) peripheral register address
+} spi_slave_hal_config_t;
+
+/**
+ * Init the peripheral and the context.
+ *
+ * @param hal        Context of the HAL layer.
+ * @param hal_config Configuration of the HAL
+ */
+void spi_slave_hal_init(spi_slave_hal_context_t *hal, const spi_slave_hal_config_t *hal_config);
+
+/**
+ * Deinit the peripheral (and the context if needed).
+ *
+ * @param hal Context of the HAL layer.
+ */
+void spi_slave_hal_deinit(spi_slave_hal_context_t *hal);
+
+/**
+ * Setup device-related configurations according to the settings in the context.
+ *
+ * @param hal Context of the HAL layer.
+ */
+void spi_slave_hal_setup_device(const spi_slave_hal_context_t *hal);
+
+/**
+ * Prepare the data for the current transaction.
+ *
+ * @param hal Context of the HAL layer.
+ */
+void spi_slave_hal_prepare_data(const spi_slave_hal_context_t *hal);
+
+/**
+ * Trigger start a user-defined transaction.
+ *
+ * @param hal Context of the HAL layer.
+ */
+void spi_slave_hal_user_start(const spi_slave_hal_context_t *hal);
+
+/**
+ * Check whether the transaction is done (trans_done is set).
+ *
+ * @param hal Context of the HAL layer.
+ */
+bool spi_slave_hal_usr_is_done(spi_slave_hal_context_t* hal);
+
+/**
+ * Post transaction operations, fetch data from the buffer and recored the length.
+ *
+ * @param hal Context of the HAL layer.
+ */
+void spi_slave_hal_store_result(spi_slave_hal_context_t *hal);
+
+/**
+ * Get the length of last transaction, in bits. Should be called after ``spi_slave_hal_store_result``.
+ *
+ * Note that if last transaction is longer than configured before, the return
+ * value will be truncated to the configured length.
+ *
+ * @param hal Context of the HAL layer.
+ *
+ * @return Length of the last transaction, in bits.
+ */
+uint32_t spi_slave_hal_get_rcv_bitlen(spi_slave_hal_context_t *hal);
+
+/**
+ * Check whether we need to reset the DMA according to the status of last transactions.
+ *
+ * In ESP32, sometimes we may need to reset the DMA for the slave before the
+ * next transaction. Call this to check it.
+ *
+ * @param hal Context of the HAL layer.
+ *
+ * @return true if reset is needed, else false.
+ */
+bool spi_slave_hal_dma_need_reset(const spi_slave_hal_context_t *hal);
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/spi_slave_hd_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/spi_slave_hd_hal.h
new file mode 100644
index 00000000000..099139cc015
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/spi_slave_hd_hal.h
@@ -0,0 +1,318 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+/*
+ * The HAL layer for SPI Slave HD mode.
+ *
+ * Usage (segment mode):
+ * - Firstly, initialize the slave with `spi_slave_hd_hal_init`
+ *
+ * - Event handling:
+ *     - (Optional) Call ``spi_slave_hd_hal_enable_event_intr`` to enable the used interrupts
+ *     - (Basic) Call ``spi_slave_hd_hal_check_clear_event`` to check whether an event happen, and also
+ *       clear its interrupt. For events: SPI_EV_BUF_TX, SPI_EV_BUF_RX, SPI_EV_BUF_RX, SPI_EV_CMD9,
+ *       SPI_EV_CMDA.
+ *     - (Advanced) Call ``spi_slave_hd_hal_check_disable_event`` to disable the interrupt of an event,
+ *       so that the task can call ``spi_slave_hd_hal_invoke_event_intr`` later to manually invoke the
+ *       ISR. For SPI_EV_SEND, SPI_EV_RECV.
+ *
+ * - TXDMA:
+ *     - To send data through DMA, call `spi_slave_hd_hal_txdma`
+ *     - When the operation is done, SPI_EV_SEND will be triggered.
+ *
+ * - RXDMA:
+ *     - To receive data through DMA, call `spi_slave_hd_hal_rxdma`
+ *     - When the operation is done, SPI_EV_RECV will be triggered.
+ *     - Call ``spi_slave_hd_hal_rxdma_seg_get_len`` to get the received length
+ *
+ *  - Shared buffer:
+ *      - Call ``spi_slave_hd_hal_write_buffer`` to write the shared register buffer. When the buffer is
+ *        read by the master (regardless of the read address), SPI_EV_BUF_TX will be triggered
+ *      - Call ``spi_slave_hd_hal_read_buffer`` to read the shared register buffer. When the buffer is
+ *        written by the master (regardless of the written address), SPI_EV_BUF_RX will be triggered.
+ */
+
+#pragma once
+
+#include <esp_types.h>
+#include "esp_err.h"
+#include "hal/spi_ll.h"
+#include "hal/spi_types.h"
+
+/**
+ * @brief Type of dma descriptor with appended members
+ *        this structure inherits DMA descriptor, with a pointer to the transaction descriptor passed from users.
+ */
+typedef struct {
+    lldesc_t      desc;                             ///< DMA descriptor
+    void          *arg;                             ///< This points to the transaction descriptor user passed in
+} spi_slave_hd_hal_desc_append_t;
+
+/// Configuration of the HAL
+typedef struct {
+    uint32_t      host_id;                          ///< Host ID of the spi peripheral
+    spi_dma_dev_t *dma_in;                          ///< Input  DMA(DMA -> RAM) peripheral register address
+    spi_dma_dev_t *dma_out;                         ///< Output DMA(RAM -> DMA) peripheral register address
+    bool          dma_enabled;                      ///< DMA enabled or not
+    uint32_t      tx_dma_chan;                      ///< TX DMA channel used.
+    uint32_t      rx_dma_chan;                      ///< RX DMA channel used.
+    bool          append_mode;                      ///< True for DMA append mode, false for segment mode
+    uint32_t      spics_io_num;                     ///< CS GPIO pin for this device
+    uint8_t       mode;                             ///< SPI mode (0-3)
+    uint32_t      command_bits;                     ///< command field bits, multiples of 8 and at least 8.
+    uint32_t      address_bits;                     ///< address field bits, multiples of 8 and at least 8.
+    uint32_t      dummy_bits;                       ///< dummy field bits, multiples of 8 and at least 8.
+
+    struct {
+        uint32_t  tx_lsbfirst : 1;                  ///< Whether TX data should be sent with LSB first.
+        uint32_t  rx_lsbfirst : 1;                  ///< Whether RX data should be read with LSB first.
+    };
+} spi_slave_hd_hal_config_t;
+
+/// Context of the HAL, initialized by :cpp:func:`spi_slave_hd_hal_init`.
+typedef struct {
+    /* These two need to be malloced by the driver first */
+    spi_slave_hd_hal_desc_append_t  *dmadesc_tx;            ///< Head of the TX DMA descriptors.
+    spi_slave_hd_hal_desc_append_t  *dmadesc_rx;            ///< Head of the RX DMA descriptors.
+
+    /* address of the hardware */
+    spi_dev_t                       *dev;                   ///< Beginning address of the peripheral registers.
+    spi_dma_dev_t                   *dma_in;                ///< Address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
+    spi_dma_dev_t                   *dma_out;               ///< Address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
+    bool                            dma_enabled;            ///< DMA enabled or not
+    uint32_t                        tx_dma_chan;            ///< TX DMA channel used.
+    uint32_t                        rx_dma_chan;            ///< RX DMA channel used.
+    bool                            append_mode;            ///< True for DMA append mode, false for segment mode
+    uint32_t                        dma_desc_num;           ///< Number of the available DMA descriptors. Calculated from ``bus_max_transfer_size``.
+    spi_slave_hd_hal_desc_append_t  *tx_cur_desc;           ///< Current TX DMA descriptor that could be linked (set up).
+    spi_slave_hd_hal_desc_append_t  *tx_dma_head;           ///< Head of the linked TX DMA descriptors which are not used by hardware
+    spi_slave_hd_hal_desc_append_t  *tx_dma_tail;           ///< Tail of the linked TX DMA descriptors which are not used by hardware
+    spi_slave_hd_hal_desc_append_t  tx_dummy_head;          ///< Dummy descriptor for ``tx_dma_head`` to start
+    uint32_t                        tx_used_desc_cnt;       ///< Number of the TX descriptors that have been setup
+    uint32_t                        tx_recycled_desc_cnt;   ///< Number of the TX descriptors that could be recycled
+    spi_slave_hd_hal_desc_append_t  *rx_cur_desc;           ///< Current RX DMA descriptor that could be linked (set up).
+    spi_slave_hd_hal_desc_append_t  *rx_dma_head;           ///< Head of the linked RX DMA descriptors which are not used by hardware
+    spi_slave_hd_hal_desc_append_t  *rx_dma_tail;           ///< Tail of the linked RX DMA descriptors which are not used by hardware
+    spi_slave_hd_hal_desc_append_t  rx_dummy_head;          ///< Dummy descriptor for ``rx_dma_head`` to start
+    uint32_t                        rx_used_desc_cnt;       ///< Number of the RX descriptors that have been setup
+    uint32_t                        rx_recycled_desc_cnt;   ///< Number of the RX descriptors that could be recycled
+
+    /* Internal status used by the HAL implementation, initialized as 0. */
+    uint32_t                        intr_not_triggered;
+    bool                            tx_dma_started;
+    bool                            rx_dma_started;
+} spi_slave_hd_hal_context_t;
+
+/**
+ * @brief Initialize the hardware and part of the context
+ *
+ * @param hal        Context of the HAL layer
+ * @param hal_config Configuration of the HAL
+ */
+void spi_slave_hd_hal_init(spi_slave_hd_hal_context_t *hal, const spi_slave_hd_hal_config_t *hal_config);
+
+/**
+ * @brief Get the size of one DMA descriptor
+ *
+ * @param hal       Context of the HAL layer
+ * @param bus_size  SPI bus maximum transfer size, in bytes.
+ * @return          Total size needed for all the DMA descriptors
+ */
+uint32_t spi_slave_hd_hal_get_total_desc_size(spi_slave_hd_hal_context_t *hal, uint32_t bus_size);
+
+/**
+ * @brief Get the actual bus size
+ *
+ * @param hal       Context of the HAL layer
+ * @return          Actual bus transaction size
+ */
+uint32_t spi_salve_hd_hal_get_max_bus_size(spi_slave_hd_hal_context_t *hal);
+
+/**
+ * @brief Check and clear signal of one event
+ *
+ * @param hal       Context of the HAL layer
+ * @param ev        Event to check
+ * @return          True if event triggered, otherwise false
+ */
+bool spi_slave_hd_hal_check_clear_event(spi_slave_hd_hal_context_t* hal, spi_event_t ev);
+
+/**
+ * @brief Check and clear the interrupt of one event.
+ *
+ * @note The event source will be kept, so that the interrupt can be invoked by
+ *       :cpp:func:`spi_slave_hd_hal_invoke_event_intr`. If event not triggered, its interrupt source
+ *       will not be disabled either.
+ *
+ * @param hal       Context of the HAL layer
+ * @param ev        Event to check and disable
+ * @return          True if event triggered, otherwise false
+ */
+bool spi_slave_hd_hal_check_disable_event(spi_slave_hd_hal_context_t* hal, spi_event_t ev);
+
+/**
+ * @brief Enable to invole the ISR of corresponding event.
+ *
+ * @note The function, compared with :cpp:func:`spi_slave_hd_hal_enable_event_intr`, contains a
+ *       workaround to force trigger the interrupt, even if the interrupt source cannot be initialized
+ *       correctly.
+ *
+ * @param hal       Context of the HAL layer
+ * @param ev        Event (reason) to invoke the ISR
+ */
+void spi_slave_hd_hal_invoke_event_intr(spi_slave_hd_hal_context_t* hal, spi_event_t ev);
+
+/**
+ * @brief Enable the interrupt source of corresponding event.
+ *
+ * @param hal       Context of the HAL layer
+ * @param ev        Event whose corresponding interrupt source should be enabled.
+ */
+void spi_slave_hd_hal_enable_event_intr(spi_slave_hd_hal_context_t* hal, spi_event_t ev);
+
+////////////////////////////////////////////////////////////////////////////////
+// RX DMA
+////////////////////////////////////////////////////////////////////////////////
+/**
+ * @brief Start the RX DMA operation to the specified buffer.
+ *
+ * @param hal       Context of the HAL layer
+ * @param[out] out_buf  Buffer to receive the data
+ * @param len       Maximul length to receive
+ */
+void spi_slave_hd_hal_rxdma(spi_slave_hd_hal_context_t *hal, uint8_t *out_buf, size_t len);
+
+/**
+ * @brief Get the length of total received data
+ *
+ * @param hal       Context of the HAL layer
+ * @return          The received length
+ */
+int spi_slave_hd_hal_rxdma_seg_get_len(spi_slave_hd_hal_context_t *hal);
+
+////////////////////////////////////////////////////////////////////////////////
+// TX DMA
+////////////////////////////////////////////////////////////////////////////////
+/**
+ * @brief Start the TX DMA operation with the specified buffer
+ *
+ * @param hal       Context of the HAL layer
+ * @param data      Buffer of data to send
+ * @param len       Size of the buffer, also the maximum length to send
+ */
+void spi_slave_hd_hal_txdma(spi_slave_hd_hal_context_t *hal, uint8_t *data, size_t len);
+
+////////////////////////////////////////////////////////////////////////////////
+// Shared buffer
+////////////////////////////////////////////////////////////////////////////////
+/**
+ * @brief Read from the shared register buffer
+ *
+ * @param hal       Context of the HAL layer
+ * @param addr      Address of the shared regsiter to read
+ * @param out_data  Buffer to store the read data
+ * @param len       Length to read from the shared buffer
+ */
+void spi_slave_hd_hal_read_buffer(spi_slave_hd_hal_context_t *hal, int addr, uint8_t *out_data, size_t len);
+
+/**
+ * @brief Write the shared register buffer
+ *
+ * @param hal       Context of the HAL layer
+ * @param addr      Address of the shared register to write
+ * @param data      Buffer of the data to write
+ * @param len       Length to write into the shared buffer
+ */
+void spi_slave_hd_hal_write_buffer(spi_slave_hd_hal_context_t *hal, int addr, uint8_t *data, size_t len);
+
+/**
+ * @brief Get the length of previous transaction.
+ *
+ * @param hal       Context of the HAL layer
+ * @return          The length of previous transaction
+ */
+int spi_slave_hd_hal_get_rxlen(spi_slave_hd_hal_context_t *hal);
+
+/**
+ * @brief Get the address of last transaction
+ *
+ * @param hal       Context of the HAL layer
+ * @return          The address of last transaction
+ */
+int spi_slave_hd_hal_get_last_addr(spi_slave_hd_hal_context_t *hal);
+
+#if CONFIG_IDF_TARGET_ESP32S2
+//Append mode is only supported on ESP32S2 now
+////////////////////////////////////////////////////////////////////////////////
+// Append Mode
+////////////////////////////////////////////////////////////////////////////////
+/**
+ * @brief Return the finished TX transaction
+ *
+ * @note This API is based on this assumption: the hardware behaviour of current transaction completion is only modified by the its own caller layer.
+ * This means if some other code changed the hardware behaviour (e.g. clear intr raw bit), or the caller call this API without noticing the HW behaviour,
+ * this API will go wrong.
+ *
+ * @param hal            Context of the HAL layer
+ * @param out_trans      Pointer to the caller-defined transaction
+ * @return               1: Transaction is finished; 0: Transaction is not finished
+ */
+bool spi_slave_hd_hal_get_tx_finished_trans(spi_slave_hd_hal_context_t *hal, void **out_trans);
+
+/**
+ * @brief Return the finished RX transaction
+ *
+ * @note This API is based on this assumption: the hardware behaviour of current transaction completion is only modified by the its own caller layer.
+ * This means if some other code changed the hardware behaviour (e.g. clear intr raw bit), or the caller call this API without noticing the HW behaviour,
+ * this API will go wrong.
+ *
+ * @param hal            Context of the HAL layer
+ * @param out_trans      Pointer to the caller-defined transaction
+ * @param out_len        Actual number of bytes of received data
+ * @return               1: Transaction is finished; 0: Transaction is not finished
+ */
+bool spi_slave_hd_hal_get_rx_finished_trans(spi_slave_hd_hal_context_t *hal, void **out_trans, size_t *out_len);
+
+/**
+ * @brief Load the TX DMA descriptors without stopping the DMA
+ *
+ * @param hal            Context of the HAL layer
+ * @param data           Buffer of the transaction data
+ * @param len            Length of the data
+ * @param arg            Pointer used by the caller to indicate the tranaction. Will be returned by ``spi_slave_hd_hal_get_tx_finished_trans`` when transaction is finished
+ * @return
+ *        - ESP_OK: on success
+ *        - ESP_ERR_INVALID_STATE: Function called in invalid state.
+ */
+esp_err_t spi_slave_hd_hal_txdma_append(spi_slave_hd_hal_context_t *hal, uint8_t *data, size_t len, void *arg);
+
+/**
+ * @brief Load the RX DMA descriptors without stopping the DMA
+ *
+ * @param hal            Context of the HAL layer
+ * @param data           Buffer of the transaction data
+ * @param len            Length of the data
+ * @param arg            Pointer used by the caller to indicate the tranaction. Will be returned by ``spi_slave_hd_hal_get_rx_finished_trans`` when transaction is finished
+ * @return
+ *        - ESP_OK: on success
+ *        - ESP_ERR_INVALID_STATE: Function called in invalid state.
+ */
+esp_err_t spi_slave_hd_hal_rxdma_append(spi_slave_hd_hal_context_t *hal, uint8_t *data, size_t len, void *arg);
+#endif  //#if CONFIG_IDF_TARGET_ESP32S2
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/spi_types.h b/tools/sdk/esp32s3/include/hal/include/hal/spi_types.h
new file mode 100644
index 00000000000..169069c5c62
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/spi_types.h
@@ -0,0 +1,73 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_attr.h"
+#include "esp_bit_defs.h"
+#include "soc/soc_caps.h"
+#include "sdkconfig.h"
+
+/**
+ * @brief Enum with the three SPI peripherals that are software-accessible in it
+ */
+typedef enum {
+//SPI1 can be used as GPSPI only on ESP32
+    SPI1_HOST=0,    ///< SPI1
+    SPI2_HOST=1,    ///< SPI2
+    SPI3_HOST=2,    ///< SPI3
+} spi_host_device_t;
+
+/// SPI Events
+typedef enum {
+    /* Slave HD Only */
+    SPI_EV_BUF_TX         = BIT(0), ///< The buffer has sent data to master.
+    SPI_EV_BUF_RX         = BIT(1), ///< The buffer has received data from master.
+    SPI_EV_SEND_DMA_READY = BIT(2), ///< Slave has loaded its TX data buffer to the hardware (DMA).
+    SPI_EV_SEND           = BIT(3), ///< Master has received certain number of the data, the number is determined by Master.
+    SPI_EV_RECV_DMA_READY = BIT(4), ///< Slave has loaded its RX data buffer to the hardware (DMA).
+    SPI_EV_RECV           = BIT(5), ///< Slave has received certain number of data from master, the number is determined by Master.
+    SPI_EV_CMD9           = BIT(6), ///< Received CMD9 from master.
+    SPI_EV_CMDA           = BIT(7), ///< Received CMDA from master.
+    /* Common Event */
+    SPI_EV_TRANS          = BIT(8), ///< A transaction has done
+} spi_event_t;
+FLAG_ATTR(spi_event_t)
+
+/**
+ * @brief Line mode of SPI transaction phases: CMD, ADDR, DOUT/DIN.
+ */
+typedef struct {
+    uint8_t cmd_lines;    ///< The line width of command phase, e.g. 2-line-cmd-phase.
+    uint8_t addr_lines;   ///< The line width of address phase, e.g. 1-line-addr-phase.
+    uint8_t data_lines;   ///< The line width of data phase, e.g. 4-line-data-phase.
+} spi_line_mode_t;
+
+
+/** @cond */    //Doxy command to hide preprocessor definitions from docs */
+
+//alias for different chips, deprecated for the chips after esp32s2
+#ifdef CONFIG_IDF_TARGET_ESP32
+#define SPI_HOST    SPI1_HOST
+#define HSPI_HOST   SPI2_HOST
+#define VSPI_HOST   SPI3_HOST
+#elif CONFIG_IDF_TARGET_ESP32S2
+// SPI_HOST (SPI1_HOST) is not supported by the SPI Master and SPI Slave driver on ESP32-S2 and later
+#define SPI_HOST    SPI1_HOST
+#define FSPI_HOST   SPI2_HOST
+#define HSPI_HOST   SPI3_HOST
+#endif
+
+/** @endcond */
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/systimer_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/systimer_hal.h
new file mode 100644
index 00000000000..9ac3262fa84
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/systimer_hal.h
@@ -0,0 +1,105 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+#include "soc/systimer_struct.h"
+#include "hal/systimer_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    systimer_dev_t *dev;
+} systimer_hal_context_t;
+
+/**
+ * @brief initialize systimer in HAL layer
+ */
+void systimer_hal_init(systimer_hal_context_t *hal);
+
+/**
+ * @brief enable systimer counter
+ */
+void systimer_hal_enable_counter(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/**
+ * @brief get current counter value
+ */
+uint64_t systimer_hal_get_counter_value(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/**
+ * @brief get current time (in microseconds)
+ */
+uint64_t systimer_hal_get_time(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/*
+ * @brief set alarm target value (used in one-shot mode)
+ */
+void systimer_hal_set_alarm_target(systimer_hal_context_t *hal, uint32_t alarm_id, uint64_t target);
+
+/**
+ * @brief set alarm period value (used in period mode)
+ */
+void systimer_hal_set_alarm_period(systimer_hal_context_t *hal, uint32_t alarm_id, uint32_t period);
+
+/**
+ * @brief get alarm time
+ */
+uint64_t systimer_hal_get_alarm_value(systimer_hal_context_t *hal, uint32_t alarm_id);
+
+/**
+ * @brief enable alarm interrupt
+ */
+void systimer_hal_enable_alarm_int(systimer_hal_context_t *hal, uint32_t alarm_id);
+
+/**
+ * @brief select alarm mode
+ */
+void systimer_hal_select_alarm_mode(systimer_hal_context_t *hal, uint32_t alarm_id, systimer_alarm_mode_t mode);
+
+/**
+ * @brief update systimer step when apb clock gets changed
+ */
+void systimer_hal_on_apb_freq_update(systimer_hal_context_t *hal, uint32_t apb_ticks_per_us);
+
+/**
+ * @brief move systimer counter value forward or backward
+ */
+void systimer_hal_counter_value_advance(systimer_hal_context_t *hal, uint32_t counter_id, int64_t time_us);
+
+/**
+ * @brief  connect alarm unit to selected counter
+ */
+void systimer_hal_connect_alarm_counter(systimer_hal_context_t *hal, uint32_t alarm_id, uint32_t counter_id);
+
+/**
+ * @brief  set if a counter should be stalled when CPU is halted by the debugger
+ */
+void systimer_hal_counter_can_stall_by_cpu(systimer_hal_context_t *hal, uint32_t counter_id, uint32_t cpu_id, bool can);
+
+#if !SOC_SYSTIMER_FIXED_TICKS_US
+/**
+ * @brief set increase steps for systimer counter on different clock source
+ */
+void systimer_hal_set_steps_per_tick(systimer_hal_context_t *hal, int clock_source, uint32_t steps);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/systimer_types.h b/tools/sdk/esp32s3/include/hal/include/hal/systimer_types.h
new file mode 100644
index 00000000000..2af2f60f30c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/systimer_types.h
@@ -0,0 +1,53 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * @brief The structure of the counter value in systimer
+ *
+ */
+typedef struct {
+    union {
+        struct {
+            uint64_t lo : SOC_SYSTIMER_BIT_WIDTH_LO; /*!< Low part of counter value */
+            uint64_t hi : SOC_SYSTIMER_BIT_WIDTH_HI; /*!< High part of counter value */
+        };
+        uint64_t val; /*!< counter value */
+    };
+} systimer_counter_value_t;
+
+/** @cond */
+_Static_assert(sizeof(systimer_counter_value_t) == 8, "systimer_counter_value_t should occupy 8 bytes in memory");
+/** @endcond */
+
+/**
+ * @brief systimer alarm mode
+ *
+ */
+typedef enum {
+    SYSTIMER_ALARM_MODE_ONESHOT, /*!< systimer alarm oneshot mode */
+    SYSTIMER_ALARM_MODE_PERIOD,  /*!< systimer alarm period mode */
+} systimer_alarm_mode_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/timer_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/timer_hal.h
new file mode 100644
index 00000000000..cb3d5e0671d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/timer_hal.h
@@ -0,0 +1,339 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for Timer Group.
+// There is no parameter check in the hal layer, so the caller must ensure the correctness of the parameters.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "soc/soc_caps.h"
+#include "hal/timer_ll.h"
+#include "hal/timer_types.h"
+
+/**
+ * Context that should be maintained by both the driver and the HAL
+ */
+typedef struct {
+    timg_dev_t *dev;
+    timer_idx_t idx;
+} timer_hal_context_t;
+
+/**
+ * @brief Init the timer hal. This function should be called first before other hal layer function is called
+ *
+ * @param hal Context of the HAL layer
+ * @param group_num The timer group number
+ * @param timer_num The timer number
+ *
+ * @return None
+ */
+void timer_hal_init(timer_hal_context_t *hal, timer_group_t group_num, timer_idx_t timer_num);
+
+/**
+ * @brief Get interrupt status register address and corresponding control bits mask
+ *
+ * @param hal Context of the HAL layer
+ * @param status_reg[out] interrupt status register address
+ * @param mask_bit[out] control bits mask
+ */
+void timer_hal_get_status_reg_mask_bit(timer_hal_context_t *hal, uint32_t *status_reg, uint32_t *mask_bit);
+
+/**
+ * @brief Reset timer peripheral
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return None
+ */
+void timer_hal_reset_periph(timer_hal_context_t *hal);
+
+/**
+ * @brief Set timer clock prescale value
+ *
+ * @param hal Context of the HAL layer
+ * @param divider Prescale value
+ *
+ * @return None
+ */
+#define timer_hal_set_divider(hal, divider)  timer_ll_set_divider((hal)->dev, (hal)->idx, divider)
+
+/**
+ * @brief Get timer clock prescale value
+ *
+ * @param hal Context of the HAL layer
+ * @param divider Pointer to accept the prescale value
+ *
+ * @return None
+ */
+#define timer_hal_get_divider(hal, divider)  timer_ll_get_divider((hal)->dev, (hal)->idx, divider)
+
+/**
+ * @brief Load counter value into time-base counter
+ *
+ * @param hal Context of the HAL layer
+ * @param load_val Counter value
+ *
+ * @return None
+ */
+#define timer_hal_set_counter_value(hal, load_val)  timer_ll_set_counter_value((hal)->dev, (hal)->idx, load_val)
+
+/**
+ * @brief Get counter value from time-base counter
+ *
+ * @param hal Context of the HAL layer
+ * @param timer_val Pointer to accept the counter value
+ *
+ * @return None
+ */
+#define timer_hal_get_counter_value(hal, timer_val)  timer_ll_get_counter_value((hal)->dev, (hal)->idx, timer_val)
+
+/**
+ * @brief Set counter mode, include increment mode and decrement mode.
+ *
+ * @param hal Context of the HAL layer
+ * @param increase_en True to increment mode, fasle to decrement mode
+ *
+ * @return None
+ */
+#define timer_hal_set_counter_increase(hal, increase_en)  timer_ll_set_counter_increase((hal)->dev, (hal)->idx, increase_en)
+
+/**
+ * @brief Get counter mode, include increment mode and decrement mode.
+ *
+ * @param hal Context of the HAL layer
+ * @param counter_dir Pointer to accept the counter mode
+ *
+ * @return
+ *     - true Increment mode
+ *     - false Decrement mode
+ */
+#define timer_hal_get_counter_increase(hal)  timer_ll_get_counter_increase((hal)->dev, (hal)->idx)
+
+/**
+ * @brief Set counter status, enable or disable counter.
+ *
+ * @param hal Context of the HAL layer
+ * @param counter_en True to enable counter, false to disable counter
+ *
+ * @return None
+ */
+#define timer_hal_set_counter_enable(hal, counter_en)  timer_ll_set_counter_enable((hal)->dev, (hal)->idx, counter_en)
+
+/**
+ * @brief Get counter status.
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return
+ *     - true Enable counter
+ *     - false Disable conuter
+ */
+#define timer_hal_get_counter_enable(hal)  timer_ll_get_counter_enable((hal)->dev, (hal)->idx)
+
+/**
+ * @brief Set auto reload mode.
+ *
+ * @param hal Context of the HAL layer
+ * @param auto_reload_en True to enable auto reload mode, flase to disable auto reload mode
+ *
+ * @return None
+ */
+#define timer_hal_set_auto_reload(hal, auto_reload_en)  timer_ll_set_auto_reload((hal)->dev, (hal)->idx, auto_reload_en)
+
+/**
+ * @brief Get auto reload mode.
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return
+ *     - true Enable auto reload mode
+ *     - false Disable auto reload mode
+ */
+#define timer_hal_get_auto_reload(hal)  timer_ll_get_auto_reload((hal)->dev, (hal)->idx)
+
+/**
+ * @brief Set the counter value to trigger the alarm.
+ *
+ * @param hal Context of the HAL layer
+ * @param alarm_value Counter value to trigger the alarm
+ *
+ * @return None
+ */
+#define timer_hal_set_alarm_value(hal, alarm_value)  timer_ll_set_alarm_value((hal)->dev, (hal)->idx, alarm_value)
+
+/**
+ * @brief Get the counter value to trigger the alarm.
+ *
+ * @param hal Context of the HAL layer
+ * @param alarm_value Pointer to accept the counter value to trigger the alarm
+ *
+ * @return None
+ */
+#define timer_hal_get_alarm_value(hal, alarm_value)  timer_ll_get_alarm_value((hal)->dev, (hal)->idx, alarm_value)
+
+/**
+ * @brief Set the alarm status, enable or disable the alarm.
+ *
+ * @param hal Context of the HAL layer
+ * @param alarm_en True to enable alarm, false to disable alarm
+ *
+ * @return None
+ */
+#define timer_hal_set_alarm_enable(hal, alarm_en)  timer_ll_set_alarm_enable((hal)->dev, (hal)->idx, alarm_en)
+
+/**
+ * @brief Get the alarm status.
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return
+ *     - true Enable alarm
+ *     - false Disable alarm
+ */
+#define timer_hal_get_alarm_enable(hal)  timer_ll_get_alarm_enable((hal)->dev, (hal)->idx)
+
+/**
+ * @brief Set the level interrupt status, enable or disable the level interrupt.
+ *
+ * @param hal Context of the HAL layer
+ * @param level_int_en True to enable level interrupt, false to disable level interrupt
+ *
+ * @return None
+ */
+#define timer_hal_set_level_int_enable(hal, level_int_en)  timer_ll_set_level_int_enable((hal)->dev, (hal)->idx, level_int_en)
+
+/**
+ * @brief Get the level interrupt status.
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return
+ *     - true Enable level interrupt
+ *     - false Disable level interrupt
+ */
+#define timer_hal_get_level_int_enable(hal)  timer_ll_get_level_int_enable((hal)->dev, (hal)->idx)
+
+/**
+ * @brief Set the edge interrupt status, enable or disable the edge interrupt.
+ *
+ * @param hal Context of the HAL layer
+ * @param edge_int_en True to enable edge interrupt, false to disable edge interrupt
+ *
+ * @return None
+ */
+#define timer_hal_set_edge_int_enable(hal, edge_int_en)  timer_ll_set_edge_int_enable((hal)->dev, (hal)->idx, edge_int_en)
+
+/**
+ * @brief Get the edge interrupt status.
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return
+ *     - true Enable edge interrupt
+ *     - false Disable edge interrupt
+ */
+#define timer_hal_get_edge_int_enable(hal)  timer_ll_get_edge_int_enable((hal)->dev, (hal)->idx)
+
+/**
+ * @brief Enable timer interrupt.
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return None
+ */
+#define timer_hal_intr_enable(hal)  timer_ll_intr_enable((hal)->dev, (hal)->idx)
+
+/**
+ * @brief Disable timer interrupt.
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return None
+ */
+#define timer_hal_intr_disable(hal)  timer_ll_intr_disable((hal)->dev, (hal)->idx)
+
+/**
+ * @brief Clear interrupt status.
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return None
+ */
+#define timer_hal_clear_intr_status(hal)  timer_ll_clear_intr_status((hal)->dev, (hal)->idx)
+
+/**
+ * @brief Get interrupt status.
+ *
+ * @param hal Context of the HAL layer
+ * @param intr_status Interrupt status
+ *
+ * @return None
+ */
+#define timer_hal_get_intr_status(hal, intr_status)  timer_ll_get_intr_status((hal)->dev, intr_status)
+
+/**
+ * @brief Get interrupt raw status.
+ *
+ * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
+ * @param intr_raw_status Interrupt raw status
+ *
+ * @return None
+ */
+#define timer_hal_get_intr_raw_status(group_num, intr_raw_status)  timer_ll_get_intr_raw_status(group_num, intr_raw_status)
+
+/**
+ * @brief Get interrupt status register address.
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return Interrupt status register address
+ */
+#define timer_hal_get_intr_status_reg(hal)  timer_ll_get_intr_status_reg((hal)->dev)
+
+#if SOC_TIMER_GROUP_SUPPORT_XTAL
+/**
+ * @brief Set clock source.
+ *
+ * @param hal Context of the HAL layer
+ * @param use_xtal_en True to use XTAL clock, flase to use APB clock
+ *
+ * @return None
+ */
+#define timer_hal_set_use_xtal(hal, use_xtal_en)  timer_ll_set_use_xtal((hal)->dev, (hal)->idx, use_xtal_en)
+
+/**
+ * @brief Get clock source.
+ *
+ * @param hal Context of the HAL layer
+ *
+ * @return
+ *     - true Use XTAL clock
+ *     - false Use APB clock
+ */
+#define timer_hal_get_use_xtal(hal)  timer_ll_get_use_xtal((hal)->dev, (hal)->idx)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/timer_types.h b/tools/sdk/esp32s3/include/hal/include/hal/timer_types.h
new file mode 100644
index 00000000000..962fae043b6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/timer_types.h
@@ -0,0 +1,135 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <esp_bit_defs.h>
+#include "esp_attr.h"
+#include "soc/soc_caps.h"
+
+/**
+ * @brief Selects a Timer-Group out of 2 available groups
+ */
+typedef enum {
+    TIMER_GROUP_0 = 0, /*!<Hw timer group 0*/
+#if SOC_TIMER_GROUPS > 1
+    TIMER_GROUP_1 = 1, /*!<Hw timer group 1*/
+#endif
+    TIMER_GROUP_MAX,
+} timer_group_t;
+
+/**
+ * @brief Select a hardware timer from timer groups
+ */
+typedef enum {
+    TIMER_0 = 0, /*!<Select timer0 of GROUPx*/
+#if SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1
+    TIMER_1 = 1, /*!<Select timer1 of GROUPx*/
+#endif
+    TIMER_MAX,
+} timer_idx_t;
+
+/**
+ * @brief Decides the direction of counter
+ */
+typedef enum {
+    TIMER_COUNT_DOWN = 0, /*!< Descending Count from cnt.high|cnt.low*/
+    TIMER_COUNT_UP = 1,   /*!< Ascending Count from Zero*/
+    TIMER_COUNT_MAX
+} timer_count_dir_t;
+
+/**
+ * @brief Decides whether timer is on or paused
+ */
+typedef enum {
+    TIMER_PAUSE = 0, /*!<Pause timer counter*/
+    TIMER_START = 1, /*!<Start timer counter*/
+} timer_start_t;
+
+/**
+ * @brief Interrupt types of the timer.
+ */
+//this is compatible with the value of esp32.
+typedef enum {
+    TIMER_INTR_T0 = BIT(0),  /*!< interrupt of timer 0 */
+#if SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1
+    TIMER_INTR_T1 = BIT(1),  /*!< interrupt of timer 1 */
+    TIMER_INTR_WDT = BIT(2), /*!< interrupt of watchdog */
+#else
+    TIMER_INTR_WDT = BIT(1), /*!< interrupt of watchdog */
+#endif
+    TIMER_INTR_NONE = 0
+} timer_intr_t;
+FLAG_ATTR(timer_intr_t)
+
+/**
+ * @brief Decides whether to enable alarm mode
+ */
+typedef enum {
+    TIMER_ALARM_DIS = 0,  /*!< Disable timer alarm*/
+    TIMER_ALARM_EN = 1,   /*!< Enable timer alarm*/
+    TIMER_ALARM_MAX
+} timer_alarm_t;
+
+/**
+ * @brief Select interrupt type if running in alarm mode.
+ */
+typedef enum {
+    TIMER_INTR_LEVEL = 0,  /*!< Interrupt mode: level mode*/
+    TIMER_INTR_MAX
+} timer_intr_mode_t;
+
+/**
+ * @brief Select if Alarm needs to be loaded by software or automatically reload by hardware.
+ */
+typedef enum {
+    TIMER_AUTORELOAD_DIS = 0,  /*!< Disable auto-reload: hardware will not load counter value after an alarm event*/
+    TIMER_AUTORELOAD_EN = 1,   /*!< Enable auto-reload: hardware will load counter value after an alarm event*/
+    TIMER_AUTORELOAD_MAX,
+} timer_autoreload_t;
+
+#if SOC_TIMER_GROUP_SUPPORT_XTAL
+/**
+ * @brief Select timer source clock.
+ */
+typedef enum {
+    TIMER_SRC_CLK_APB = 0,  /*!< Select APB as the source clock*/
+    TIMER_SRC_CLK_XTAL = 1, /*!< Select XTAL as the source clock*/
+} timer_src_clk_t;
+#endif
+
+/**
+ * @brief Data structure with timer's configuration settings
+ */
+typedef struct {
+    timer_alarm_t alarm_en;      /*!< Timer alarm enable */
+    timer_start_t counter_en;    /*!< Counter enable */
+    timer_intr_mode_t intr_type; /*!< Interrupt mode */
+    timer_count_dir_t counter_dir; /*!< Counter direction  */
+    timer_autoreload_t auto_reload;   /*!< Timer auto-reload */
+    uint32_t divider;   /*!< Counter clock divider. The divider's range is from from 2 to 65536. */
+#if SOC_TIMER_GROUP_SUPPORT_XTAL
+    timer_src_clk_t clk_src;  /*!< Use XTAL as source clock. */
+#endif
+} timer_config_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/touch_sensor_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/touch_sensor_hal.h
new file mode 100644
index 00000000000..dc125c5badb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/touch_sensor_hal.h
@@ -0,0 +1,225 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for touch sensor (common part)
+
+#pragma once
+
+#include "hal/touch_sensor_ll.h"
+#include "hal/touch_sensor_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    touch_high_volt_t refh;
+    touch_low_volt_t refl;
+    touch_volt_atten_t atten;
+} touch_hal_volt_t;
+
+typedef struct {
+    touch_cnt_slope_t slope;    /*!<Set touch sensor charge/discharge speed(currents) for each pad.*/
+    touch_tie_opt_t tie_opt;    /*!<Set initial voltage state of touch channel for each measurement.*/
+} touch_hal_meas_mode_t;
+
+/**
+ * Set touch sensor sleep time (interval of measurement).
+ *
+ * @param sleep_time  The touch sensor will sleep after each measurement.
+ *                    sleep_cycle decide the interval between each measurement.
+ *                    t_sleep = sleep_cycle / (RTC_SLOW_CLK frequency).
+ *                    The approximate frequency value of RTC_SLOW_CLK can be obtained using `rtc_clk_slow_freq_get_hz` function.
+ */
+#define touch_hal_set_sleep_time(sleep_time) touch_ll_set_sleep_time(sleep_time)
+
+/**
+ * Get touch sensor sleep time.
+ *
+ * @param sleep_time Pointer to accept sleep cycle count.
+ */
+#define touch_hal_get_sleep_time(sleep_time) touch_ll_get_sleep_time(sleep_time)
+
+/**
+ * Set touch sensor high / low voltage threshold of chanrge.
+ * The touch sensor measures the channel capacitance value by charging and discharging the channel.
+ * So charge threshold should be less than the supply voltage.
+ * The actual charge threshold is high voltage threshold minus attenuation value.
+ *
+ * @param refh The high voltage threshold of chanrge.
+ */
+void touch_hal_set_voltage(const touch_hal_volt_t *volt);
+
+/**
+ * Get touch sensor high / low voltage threshold of chanrge.
+ * The touch sensor measures the channel capacitance value by charging and discharging the channel.
+ * So charge threshold should be less than the supply voltage.
+ * The actual charge threshold is high voltage threshold minus attenuation value.
+ *
+ * @param refh The voltage threshold of chanrge / discharge.
+ */
+void touch_hal_get_voltage(touch_hal_volt_t *volt);
+
+/**
+ * Set touch sensor charge/discharge speed(currents) and initial voltage state for each pad measurement.
+ *
+ * @param touch_num Touch pad index.
+ * @param meas Touch pad measurement config.
+ */
+void touch_hal_set_meas_mode(touch_pad_t touch_num, const touch_hal_meas_mode_t *meas);
+
+/**
+ * Get touch sensor charge/discharge speed(currents) and initial voltage state for each pad measurement.
+ *
+ * @param touch_num Touch pad index.
+ * @param meas Touch pad measurement config.
+ */
+void touch_hal_get_meas_mode(touch_pad_t touch_num, touch_hal_meas_mode_t *meas);
+
+/**
+ * Set touch sensor FSM mode.
+ *        The measurement action can be triggered by the hardware timer, as well as by the software instruction.
+ *
+ * @param mode FSM mode.
+ */
+#define touch_hal_set_fsm_mode(mode) touch_ll_set_fsm_mode(mode)
+
+/**
+ * Get touch sensor FSM mode.
+ *        The measurement action can be triggered by the hardware timer, as well as by the software instruction.
+ *
+ * @param mode FSM mode.
+ */
+#define touch_hal_get_fsm_mode(mode) touch_ll_get_fsm_mode(mode)
+
+/**
+ * Start touch sensor FSM timer.
+ *        The measurement action can be triggered by the hardware timer, as well as by the software instruction.
+ */
+#define touch_hal_start_fsm() touch_ll_start_fsm()
+
+/**
+ * Stop touch sensor FSM timer.
+ *        The measurement action can be triggered by the hardware timer, as well as by the software instruction.
+ */
+#define touch_hal_stop_fsm() touch_ll_stop_fsm()
+
+/**
+ * Trigger a touch sensor measurement, only support in SW mode of FSM.
+ */
+#define touch_hal_start_sw_meas() touch_ll_start_sw_meas()
+
+/**
+ * Set touch sensor interrupt threshold.
+ *
+ * @note Refer to `touch_pad_set_trigger_mode` to see how to set trigger mode.
+ * @param touch_num touch pad index.
+ * @param threshold threshold of touchpad count.
+ */
+#define touch_hal_set_threshold(touch_num, threshold) touch_ll_set_threshold(touch_num, threshold)
+
+/**
+ * Get touch sensor interrupt threshold.
+ *
+ * @param touch_num touch pad index.
+ * @param threshold pointer to accept threshold.
+ */
+#define touch_hal_get_threshold(touch_num, threshold) touch_ll_get_threshold(touch_num, threshold)
+
+/**
+ * Enable touch sensor channel. Register touch channel into touch sensor measurement group.
+ * The working mode of the touch sensor is simultaneous measurement.
+ * This function will set the measure bits according to the given bitmask.
+ *
+ * @note  If set this mask, the FSM timer should be stop firsty.
+ * @note  The touch sensor that in scan map, should be deinit GPIO function firstly.
+ * @param enable_mask bitmask of touch sensor scan group.
+ *        e.g. TOUCH_PAD_NUM1 -> BIT(1)
+ * @return
+ *      - ESP_OK on success
+ */
+#define touch_hal_set_channel_mask(enable_mask) touch_ll_set_channel_mask(enable_mask)
+
+/**
+ * Get touch sensor channel mask.
+ *
+ * @param enable_mask bitmask of touch sensor scan group.
+ *        e.g. TOUCH_PAD_NUM1 -> BIT(1)
+ */
+#define touch_hal_get_channel_mask(enable_mask) touch_ll_get_channel_mask(enable_mask)
+
+/**
+ * Disable touch sensor channel by bitmask.
+ *
+ * @param enable_mask bitmask of touch sensor scan group.
+ *        e.g. TOUCH_PAD_NUM1 -> BIT(1)
+ */
+#define touch_hal_clear_channel_mask(disable_mask) touch_ll_clear_channel_mask(disable_mask)
+
+/**
+ * Get the touch sensor status, usually used in ISR to decide which pads are 'touched'.
+ *
+ * @param status_mask The touch sensor status. e.g. Touch1 trigger status is `status_mask & (BIT1)`.
+ */
+#define touch_hal_read_trigger_status_mask(status_mask) touch_ll_read_trigger_status_mask(status_mask)
+
+/**
+ * Clear all touch sensor status.
+ */
+#define touch_hal_clear_trigger_status_mask() touch_ll_clear_trigger_status_mask()
+
+/**
+ * Get touch sensor raw data (touch sensor counter value) from register. No block.
+ *
+ * @param touch_num touch pad index.
+ * @return touch_value pointer to accept touch sensor value.
+ */
+#define touch_hal_read_raw_data(touch_num) touch_ll_read_raw_data(touch_num)
+
+/**
+ * Get touch sensor measure status. No block.
+ *
+ * @return
+ *      - If touch sensors measure done.
+ */
+#define touch_hal_meas_is_done() touch_ll_meas_is_done()
+
+/**
+ * Initialize touch module.
+ *
+ * @note  If default parameter don't match the usage scenario, it can be changed after this function.
+ */
+void touch_hal_init(void);
+
+/**
+ * Un-install touch pad driver.
+ *
+ * @note  After this function is called, other touch functions are prohibited from being called.
+ */
+void touch_hal_deinit(void);
+
+/**
+ * Configure touch sensor for each channel.
+ */
+void touch_hal_config(touch_pad_t touch_num);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/touch_sensor_types.h b/tools/sdk/esp32s3/include/hal/include/hal/touch_sensor_types.h
new file mode 100644
index 00000000000..9085f5eecd8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/touch_sensor_types.h
@@ -0,0 +1,292 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include "esp_attr.h"
+#include "soc/soc.h"
+#include "soc/soc_caps.h"
+#include "sdkconfig.h"
+
+/** Touch pad channel */
+typedef enum {
+    TOUCH_PAD_NUM0 = 0, /*!< Touch pad channel 0 is GPIO4(ESP32) */
+    TOUCH_PAD_NUM1,     /*!< Touch pad channel 1 is GPIO0(ESP32) / GPIO1(ESP32-S2) */
+    TOUCH_PAD_NUM2,     /*!< Touch pad channel 2 is GPIO2(ESP32) / GPIO2(ESP32-S2) */
+    TOUCH_PAD_NUM3,     /*!< Touch pad channel 3 is GPIO15(ESP32) / GPIO3(ESP32-S2) */
+    TOUCH_PAD_NUM4,     /*!< Touch pad channel 4 is GPIO13(ESP32) / GPIO4(ESP32-S2) */
+    TOUCH_PAD_NUM5,     /*!< Touch pad channel 5 is GPIO12(ESP32) / GPIO5(ESP32-S2) */
+    TOUCH_PAD_NUM6,     /*!< Touch pad channel 6 is GPIO14(ESP32) / GPIO6(ESP32-S2) */
+    TOUCH_PAD_NUM7,     /*!< Touch pad channel 7 is GPIO27(ESP32) / GPIO7(ESP32-S2) */
+    TOUCH_PAD_NUM8,     /*!< Touch pad channel 8 is GPIO33(ESP32) / GPIO8(ESP32-S2) */
+    TOUCH_PAD_NUM9,     /*!< Touch pad channel 9 is GPIO32(ESP32) / GPIO9(ESP32-S2) */
+#if SOC_TOUCH_SENSOR_NUM > 10
+    TOUCH_PAD_NUM10,    /*!< Touch channel 10 is GPIO10(ESP32-S2) */
+    TOUCH_PAD_NUM11,    /*!< Touch channel 11 is GPIO11(ESP32-S2) */
+    TOUCH_PAD_NUM12,    /*!< Touch channel 12 is GPIO12(ESP32-S2) */
+    TOUCH_PAD_NUM13,    /*!< Touch channel 13 is GPIO13(ESP32-S2) */
+    TOUCH_PAD_NUM14,    /*!< Touch channel 14 is GPIO14(ESP32-S2) */
+#endif
+    TOUCH_PAD_MAX,
+} touch_pad_t;
+
+/** Touch sensor high reference voltage */
+typedef enum {
+    TOUCH_HVOLT_KEEP = -1, /*!<Touch sensor high reference voltage, no change  */
+    TOUCH_HVOLT_2V4 = 0,   /*!<Touch sensor high reference voltage, 2.4V  */
+    TOUCH_HVOLT_2V5,       /*!<Touch sensor high reference voltage, 2.5V  */
+    TOUCH_HVOLT_2V6,       /*!<Touch sensor high reference voltage, 2.6V  */
+    TOUCH_HVOLT_2V7,       /*!<Touch sensor high reference voltage, 2.7V  */
+    TOUCH_HVOLT_MAX,
+} touch_high_volt_t;
+
+/** Touch sensor low reference voltage */
+typedef enum {
+    TOUCH_LVOLT_KEEP = -1, /*!<Touch sensor low reference voltage, no change  */
+    TOUCH_LVOLT_0V5 = 0,   /*!<Touch sensor low reference voltage, 0.5V  */
+    TOUCH_LVOLT_0V6,       /*!<Touch sensor low reference voltage, 0.6V  */
+    TOUCH_LVOLT_0V7,       /*!<Touch sensor low reference voltage, 0.7V  */
+    TOUCH_LVOLT_0V8,       /*!<Touch sensor low reference voltage, 0.8V  */
+    TOUCH_LVOLT_MAX,
+} touch_low_volt_t;
+
+/** Touch sensor high reference voltage attenuation */
+typedef enum {
+    TOUCH_HVOLT_ATTEN_KEEP = -1,  /*!<Touch sensor high reference voltage attenuation, no change  */
+    TOUCH_HVOLT_ATTEN_1V5 = 0,    /*!<Touch sensor high reference voltage attenuation, 1.5V attenuation  */
+    TOUCH_HVOLT_ATTEN_1V,         /*!<Touch sensor high reference voltage attenuation, 1.0V attenuation  */
+    TOUCH_HVOLT_ATTEN_0V5,        /*!<Touch sensor high reference voltage attenuation, 0.5V attenuation  */
+    TOUCH_HVOLT_ATTEN_0V,         /*!<Touch sensor high reference voltage attenuation,   0V attenuation  */
+    TOUCH_HVOLT_ATTEN_MAX,
+} touch_volt_atten_t;
+
+/** Touch sensor charge/discharge speed */
+typedef enum {
+    TOUCH_PAD_SLOPE_0 = 0,       /*!<Touch sensor charge / discharge speed, always zero  */
+    TOUCH_PAD_SLOPE_1 = 1,       /*!<Touch sensor charge / discharge speed, slowest  */
+    TOUCH_PAD_SLOPE_2 = 2,       /*!<Touch sensor charge / discharge speed */
+    TOUCH_PAD_SLOPE_3 = 3,       /*!<Touch sensor charge / discharge speed  */
+    TOUCH_PAD_SLOPE_4 = 4,       /*!<Touch sensor charge / discharge speed  */
+    TOUCH_PAD_SLOPE_5 = 5,       /*!<Touch sensor charge / discharge speed  */
+    TOUCH_PAD_SLOPE_6 = 6,       /*!<Touch sensor charge / discharge speed  */
+    TOUCH_PAD_SLOPE_7 = 7,       /*!<Touch sensor charge / discharge speed, fast  */
+    TOUCH_PAD_SLOPE_MAX,
+} touch_cnt_slope_t;
+
+/** Touch sensor initial charge level */
+typedef enum {
+    TOUCH_PAD_TIE_OPT_LOW = 0,    /*!<Initial level of charging voltage, low level */
+    TOUCH_PAD_TIE_OPT_HIGH = 1,   /*!<Initial level of charging voltage, high level */
+    TOUCH_PAD_TIE_OPT_MAX,
+} touch_tie_opt_t;
+
+/** Touch sensor FSM mode */
+typedef enum {
+    TOUCH_FSM_MODE_TIMER = 0,   /*!<To start touch FSM by timer */
+    TOUCH_FSM_MODE_SW,          /*!<To start touch FSM by software trigger */
+    TOUCH_FSM_MODE_MAX,
+} touch_fsm_mode_t;
+
+/**** ESP32 Only *****/
+
+typedef enum {
+    TOUCH_TRIGGER_BELOW = 0,   /*!<Touch interrupt will happen if counter value is less than threshold.*/
+    TOUCH_TRIGGER_ABOVE = 1,   /*!<Touch interrupt will happen if counter value is larger than threshold.*/
+    TOUCH_TRIGGER_MAX,
+} touch_trigger_mode_t;
+
+typedef enum {
+    TOUCH_TRIGGER_SOURCE_BOTH = 0,  /*!< wakeup interrupt is generated if both SET1 and SET2 are "touched"*/
+    TOUCH_TRIGGER_SOURCE_SET1 = 1,  /*!< wakeup interrupt is generated if SET1 is "touched"*/
+    TOUCH_TRIGGER_SOURCE_MAX,
+} touch_trigger_src_t;
+
+/********************************/
+#define TOUCH_PAD_BIT_MASK_ALL              ((1<<SOC_TOUCH_SENSOR_NUM)-1)
+#define TOUCH_PAD_SLOPE_DEFAULT             (TOUCH_PAD_SLOPE_7)
+#define TOUCH_PAD_TIE_OPT_DEFAULT           (TOUCH_PAD_TIE_OPT_LOW)
+#define TOUCH_PAD_BIT_MASK_MAX              (TOUCH_PAD_BIT_MASK_ALL)
+#define TOUCH_PAD_HIGH_VOLTAGE_THRESHOLD    (TOUCH_HVOLT_2V7)
+#define TOUCH_PAD_LOW_VOLTAGE_THRESHOLD     (TOUCH_LVOLT_0V5)
+#define TOUCH_PAD_ATTEN_VOLTAGE_THRESHOLD   (TOUCH_HVOLT_ATTEN_0V5)
+#define TOUCH_PAD_IDLE_CH_CONNECT_DEFAULT   (TOUCH_PAD_CONN_GND)
+#define TOUCH_PAD_THRESHOLD_MAX             (SOC_TOUCH_PAD_THRESHOLD_MAX) /*!<If set touch threshold max value, The touch sensor can't be in touched status */
+
+#ifdef CONFIG_IDF_TARGET_ESP32
+
+#define TOUCH_PAD_SLEEP_CYCLE_DEFAULT   (0x1000)  /*!<The timer frequency is RTC_SLOW_CLK (can be 150k or 32k depending on the options), max value is 0xffff */
+#define TOUCH_PAD_MEASURE_CYCLE_DEFAULT (0x7fff)  /*!<The timer frequency is 8Mhz, the max value is 0x7fff */
+#define TOUCH_FSM_MODE_DEFAULT          (TOUCH_FSM_MODE_SW)  /*!<The touch FSM my be started by the software or timer */
+#define TOUCH_TRIGGER_MODE_DEFAULT      (TOUCH_TRIGGER_BELOW)   /*!<Interrupts can be triggered if sensor value gets below or above threshold */
+#define TOUCH_TRIGGER_SOURCE_DEFAULT    (TOUCH_TRIGGER_SOURCE_SET1)  /*!<The wakeup trigger source can be SET1 or both SET1 and SET2 */
+
+#endif // CONFIG_IDF_TARGET ESP32
+
+#if !CONFIG_IDF_TARGET_ESP32
+/**
+ * Excessive total time will slow down the touch response.
+ * Too small measurement time will not be sampled enough, resulting in inaccurate measurements.
+ *
+ * @note The greater the duty cycle of the measurement time, the more system power is consumed.
+ */
+#define TOUCH_PAD_SLEEP_CYCLE_DEFAULT   (0xf)   /*!<The number of sleep cycle in each measure process of touch channels.
+                                                    The timer frequency is RTC_SLOW_CLK (can be 150k or 32k depending on the options).
+                                                    Range: 0 ~ 0xffff */
+#define TOUCH_PAD_MEASURE_CYCLE_DEFAULT (500)   /*!<The times of charge and discharge in each measure process of touch channels.
+                                                    The timer frequency is 8Mhz.
+                                                    Recommended typical value: Modify this value to make the measurement time around 1ms.
+                                                    Range: 0 ~ 0xffff */
+
+typedef enum {
+    TOUCH_PAD_INTR_MASK_DONE = BIT(0),      /*!<Measurement done for one of the enabled channels. */
+    TOUCH_PAD_INTR_MASK_ACTIVE = BIT(1),    /*!<Active for one of the enabled channels. */
+    TOUCH_PAD_INTR_MASK_INACTIVE = BIT(2),  /*!<Inactive for one of the enabled channels. */
+    TOUCH_PAD_INTR_MASK_SCAN_DONE = BIT(3), /*!<Measurement done for all the enabled channels. */
+    TOUCH_PAD_INTR_MASK_TIMEOUT = BIT(4),   /*!<Timeout for one of the enabled channels. */
+#if SOC_TOUCH_PROXIMITY_MEAS_DONE_SUPPORTED
+    TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE = BIT(5),   /*!<For proximity sensor, when the number of measurements reaches the set count of measurements, an interrupt will be generated. */
+    TOUCH_PAD_INTR_MASK_MAX
+#define TOUCH_PAD_INTR_MASK_ALL (TOUCH_PAD_INTR_MASK_TIMEOUT    \
+                                | TOUCH_PAD_INTR_MASK_SCAN_DONE \
+                                | TOUCH_PAD_INTR_MASK_INACTIVE  \
+                                | TOUCH_PAD_INTR_MASK_ACTIVE    \
+                                | TOUCH_PAD_INTR_MASK_DONE      \
+                                | TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE) /*!<All touch interrupt type enable. */
+#else
+    TOUCH_PAD_INTR_MASK_MAX
+#define TOUCH_PAD_INTR_MASK_ALL (TOUCH_PAD_INTR_MASK_TIMEOUT    \
+                                | TOUCH_PAD_INTR_MASK_SCAN_DONE \
+                                | TOUCH_PAD_INTR_MASK_INACTIVE  \
+                                | TOUCH_PAD_INTR_MASK_ACTIVE    \
+                                | TOUCH_PAD_INTR_MASK_DONE) /*!<All touch interrupt type enable. */
+#endif
+} touch_pad_intr_mask_t;
+FLAG_ATTR(touch_pad_intr_mask_t)
+
+typedef enum {
+    TOUCH_PAD_DENOISE_BIT12 = 0,    /*!<Denoise range is 12bit */
+    TOUCH_PAD_DENOISE_BIT10 = 1,    /*!<Denoise range is 10bit */
+    TOUCH_PAD_DENOISE_BIT8 = 2,     /*!<Denoise range is 8bit */
+    TOUCH_PAD_DENOISE_BIT4 = 3,     /*!<Denoise range is 4bit */
+    TOUCH_PAD_DENOISE_MAX
+} touch_pad_denoise_grade_t;
+
+typedef enum {
+    TOUCH_PAD_DENOISE_CAP_L0 = 0,   /*!<Denoise channel internal reference capacitance is 5pf */
+    TOUCH_PAD_DENOISE_CAP_L1 = 1,   /*!<Denoise channel internal reference capacitance is 6.4pf */
+    TOUCH_PAD_DENOISE_CAP_L2 = 2,   /*!<Denoise channel internal reference capacitance is 7.8pf */
+    TOUCH_PAD_DENOISE_CAP_L3 = 3,   /*!<Denoise channel internal reference capacitance is 9.2pf */
+    TOUCH_PAD_DENOISE_CAP_L4 = 4,   /*!<Denoise channel internal reference capacitance is 10.6pf */
+    TOUCH_PAD_DENOISE_CAP_L5 = 5,   /*!<Denoise channel internal reference capacitance is 12.0pf */
+    TOUCH_PAD_DENOISE_CAP_L6 = 6,   /*!<Denoise channel internal reference capacitance is 13.4pf */
+    TOUCH_PAD_DENOISE_CAP_L7 = 7,   /*!<Denoise channel internal reference capacitance is 14.8pf */
+    TOUCH_PAD_DENOISE_CAP_MAX = 8
+} touch_pad_denoise_cap_t;
+
+/** Touch sensor denoise configuration */
+typedef struct touch_pad_denoise {
+    touch_pad_denoise_grade_t grade;    /*!<Select denoise range of denoise channel.
+                                            Determined by measuring the noise amplitude of the denoise channel. */
+    touch_pad_denoise_cap_t cap_level;  /*!<Select internal reference capacitance of denoise channel.
+                                            Ensure that the denoise readings are closest to the readings of the channel being measured.
+                                            Use `touch_pad_denoise_read_data` to get the reading of denoise channel.
+                                            The equivalent capacitance of the shielded channel can be calculated
+                                            from the reading of denoise channel. */
+} touch_pad_denoise_t;
+
+/** Touch sensor shield channel drive capability level */
+typedef enum {
+    TOUCH_PAD_SHIELD_DRV_L0 = 0,/*!<The max equivalent capacitance in shield channel is 40pf */
+    TOUCH_PAD_SHIELD_DRV_L1,    /*!<The max equivalent capacitance in shield channel is 80pf */
+    TOUCH_PAD_SHIELD_DRV_L2,    /*!<The max equivalent capacitance in shield channel is 120pf */
+    TOUCH_PAD_SHIELD_DRV_L3,    /*!<The max equivalent capacitance in shield channel is 160pf */
+    TOUCH_PAD_SHIELD_DRV_L4,    /*!<The max equivalent capacitance in shield channel is 200pf */
+    TOUCH_PAD_SHIELD_DRV_L5,    /*!<The max equivalent capacitance in shield channel is 240pf */
+    TOUCH_PAD_SHIELD_DRV_L6,    /*!<The max equivalent capacitance in shield channel is 280pf */
+    TOUCH_PAD_SHIELD_DRV_L7,    /*!<The max equivalent capacitance in shield channel is 320pf */
+    TOUCH_PAD_SHIELD_DRV_MAX
+} touch_pad_shield_driver_t;
+
+/** Touch sensor waterproof configuration */
+typedef struct touch_pad_waterproof {
+    touch_pad_t guard_ring_pad;             /*!<Waterproof. Select touch channel use for guard pad.
+                                                Guard pad is used to detect the large area of water covering the touch panel. */
+    touch_pad_shield_driver_t shield_driver;/*!<Waterproof. Shield channel drive capability configuration.
+                                                Shield pad is used to shield the influence of water droplets covering the touch panel.
+                                                When the waterproof function is enabled, Touch14 is set as shield channel by default.
+                                                The larger the parasitic capacitance on the shielding channel, the higher the drive capability needs to be set.
+                                                The equivalent capacitance of the shield channel can be estimated through the reading value of the denoise channel(Touch0).*/
+} touch_pad_waterproof_t;
+
+/** Touch sensor proximity detection configuration */
+#define TOUCH_PROXIMITY_MEAS_NUM_MAX (0xFF)
+
+/** Touch channel idle state configuration */
+typedef enum {
+    TOUCH_PAD_CONN_HIGHZ = 0,   /*!<Idle status of touch channel is high resistance state */
+    TOUCH_PAD_CONN_GND = 1,     /*!<Idle status of touch channel is ground connection */
+    TOUCH_PAD_CONN_MAX
+} touch_pad_conn_type_t;
+
+/**
+ * @brief Touch channel IIR filter coefficient configuration.
+ * @note On ESP32S2. There is an error in the IIR calculation. The magnitude of the error is twice the filter coefficient.
+ *       So please select a smaller filter coefficient on the basis of meeting the filtering requirements.
+ *       Recommended filter coefficient selection `IIR_16`.
+ */
+typedef enum {
+    TOUCH_PAD_FILTER_IIR_4 = 0, /*!<The filter mode is first-order IIR filter. The coefficient is 4. */
+    TOUCH_PAD_FILTER_IIR_8,     /*!<The filter mode is first-order IIR filter. The coefficient is 8. */
+    TOUCH_PAD_FILTER_IIR_16,    /*!<The filter mode is first-order IIR filter. The coefficient is 16 (Typical value). */
+    TOUCH_PAD_FILTER_IIR_32,    /*!<The filter mode is first-order IIR filter. The coefficient is 32. */
+    TOUCH_PAD_FILTER_IIR_64,    /*!<The filter mode is first-order IIR filter. The coefficient is 64. */
+    TOUCH_PAD_FILTER_IIR_128,   /*!<The filter mode is first-order IIR filter. The coefficient is 128. */
+    TOUCH_PAD_FILTER_IIR_256,   /*!<The filter mode is first-order IIR filter. The coefficient is 256. */
+    TOUCH_PAD_FILTER_JITTER,    /*!<The filter mode is jitter filter */
+    TOUCH_PAD_FILTER_MAX
+} touch_filter_mode_t;
+
+/**
+ * @brief Level of filter applied on the original data against large noise interference.
+ * @note On ESP32S2. There is an error in the IIR calculation. The magnitude of the error is twice the filter coefficient.
+ *       So please select a smaller filter coefficient on the basis of meeting the filtering requirements.
+ *       Recommended filter coefficient selection `IIR_2`.
+ */
+typedef enum {
+    TOUCH_PAD_SMOOTH_OFF   = 0, /*!<No filtering of raw data. */
+    TOUCH_PAD_SMOOTH_IIR_2 = 1, /*!<Filter the raw data. The coefficient is 2 (Typical value). */
+    TOUCH_PAD_SMOOTH_IIR_4 = 2, /*!<Filter the raw data. The coefficient is 4. */
+    TOUCH_PAD_SMOOTH_IIR_8 = 3, /*!<Filter the raw data. The coefficient is 8. */
+    TOUCH_PAD_SMOOTH_MAX,
+} touch_smooth_mode_t;
+
+/** Touch sensor filter configuration */
+typedef struct touch_filter_config {
+    touch_filter_mode_t mode;   /*!<Set filter mode. The input of the filter is the raw value of touch reading,
+                                    and the output of the filter is involved in the judgment of the touch state. */
+    uint32_t debounce_cnt;      /*!<Set debounce count, such as `n`. If the measured values continue to exceed
+                                    the threshold for `n+1` times, the touch sensor state changes.
+                                    Range: 0 ~ 7 */
+    uint32_t noise_thr;         /*!<Noise threshold coefficient. Higher = More noise resistance.
+                                    The actual noise should be less than (noise coefficient * touch threshold).
+                                    Range: 0 ~ 3. The coefficient is 0: 4/8;  1: 3/8;   2: 2/8;   3: 1; */
+    uint32_t jitter_step;       /*!<Set jitter filter step size. Range: 0 ~ 15 */
+    touch_smooth_mode_t smh_lvl;/*!<Level of filter applied on the original data against large noise interference. */
+#define TOUCH_DEBOUNCE_CNT_MAX      (7)
+#define TOUCH_NOISE_THR_MAX         (3)
+#define TOUCH_JITTER_STEP_MAX       (15)
+} touch_filter_config_t;
+
+/** Touch sensor channel sleep configuration */
+typedef struct {
+    touch_pad_t touch_num;          /*!<Set touch channel number for sleep pad.
+                                        Only one touch sensor channel is supported in deep sleep mode.
+                                        If clear the sleep channel, point this pad to `TOUCH_PAD_NUM0`  */
+    bool en_proximity;              /*!<enable proximity function for sleep pad */
+} touch_pad_sleep_channel_t;
+
+#endif // !CONFIG_IDF_TARGET_ESP32
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/twai_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/twai_hal.h
new file mode 100644
index 00000000000..f4036655bda
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/twai_hal.h
@@ -0,0 +1,378 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stddef.h>
+#include <stdbool.h>
+#include "sdkconfig.h"
+#include "hal/twai_types.h"
+#include "hal/twai_ll.h"
+
+/* ------------------------- Defines and Typedefs --------------------------- */
+
+#define TWAI_HAL_SET_BITS(var, flag)            ((var) |= (flag))
+#define TWAI_HAL_CLEAR_BITS(var, flag)          ((var) &= ~(flag))
+
+//HAL state flags
+#define TWAI_HAL_STATE_FLAG_RUNNING             (1 << 0)    //Controller is active (not in reset mode)
+#define TWAI_HAL_STATE_FLAG_RECOVERING          (1 << 1)    //Bus is undergoing bus recovery
+#define TWAI_HAL_STATE_FLAG_ERR_WARN            (1 << 2)    //TEC or REC is >= error warning limit
+#define TWAI_HAL_STATE_FLAG_ERR_PASSIVE         (1 << 3)    //TEC or REC is >= 128
+#define TWAI_HAL_STATE_FLAG_BUS_OFF             (1 << 4)    //Bus-off due to TEC >= 256
+#define TWAI_HAL_STATE_FLAG_TX_BUFF_OCCUPIED    (1 << 5)    //Transmit buffer is occupied
+#if defined(CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID) || defined(CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT)
+#define TWAI_HAL_STATE_FLAG_TX_NEED_RETRY       (1 << 7)    //TX needs to be restarted due to errata workarounds
+#endif
+
+//Interrupt Events
+#define TWAI_HAL_EVENT_BUS_OFF                  (1 << 0)
+#define TWAI_HAL_EVENT_BUS_RECOV_CPLT           (1 << 1)
+#define TWAI_HAL_EVENT_BUS_RECOV_PROGRESS       (1 << 2)
+#define TWAI_HAL_EVENT_ABOVE_EWL                (1 << 3)
+#define TWAI_HAL_EVENT_BELOW_EWL                (1 << 4)
+#define TWAI_HAL_EVENT_ERROR_PASSIVE            (1 << 5)
+#define TWAI_HAL_EVENT_ERROR_ACTIVE             (1 << 6)
+#define TWAI_HAL_EVENT_BUS_ERR                  (1 << 7)
+#define TWAI_HAL_EVENT_ARB_LOST                 (1 << 8)
+#define TWAI_HAL_EVENT_RX_BUFF_FRAME            (1 << 9)
+#define TWAI_HAL_EVENT_TX_BUFF_FREE             (1 << 10)
+#if defined(CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID) || defined(CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT)
+#define TWAI_HAL_EVENT_NEED_PERIPH_RESET        (1 << 11)
+#endif
+
+typedef twai_ll_frame_buffer_t twai_hal_frame_t;
+
+typedef struct {
+    twai_dev_t *dev;
+    uint32_t state_flags;
+#if defined(CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID) || defined(CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT)
+    twai_hal_frame_t tx_frame_save;
+    twai_ll_reg_save_t reg_save;
+    uint8_t rx_msg_cnt_save;
+#endif
+} twai_hal_context_t;
+
+/* ---------------------------- Init and Config ----------------------------- */
+
+/**
+ * @brief Initialize TWAI peripheral and HAL context
+ *
+ * Sets HAL context, puts TWAI peripheral into reset mode, then sets some
+ * registers with default values.
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @return True if successfully initialized, false otherwise.
+ */
+bool twai_hal_init(twai_hal_context_t *hal_ctx);
+
+/**
+ * @brief Deinitialize the TWAI peripheral and HAL context
+ *
+ * Clears any unhandled interrupts and unsets HAL context
+ *
+ * @param hal_ctx Context of the HAL layer
+ */
+void twai_hal_deinit(twai_hal_context_t *hal_ctx);
+
+/**
+ * @brief Configure the TWAI peripheral
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @param t_config Pointer to timing configuration structure
+ * @param f_config Pointer to filter configuration structure
+ * @param intr_mask Mask of interrupts to enable
+ * @param clkout_divider Clock divider value for CLKOUT. Set to -1 to disable CLKOUT
+ */
+void twai_hal_configure(twai_hal_context_t *hal_ctx, const twai_timing_config_t *t_config, const twai_filter_config_t *f_config, uint32_t intr_mask, uint32_t clkout_divider);
+
+/* -------------------------------- Actions --------------------------------- */
+
+/**
+ * @brief Start the TWAI peripheral
+ *
+ * Start the TWAI peripheral by configuring its operating mode, then exiting
+ * reset mode so that the TWAI peripheral can participate in bus activities.
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @param mode Operating mode
+ */
+void twai_hal_start(twai_hal_context_t *hal_ctx, twai_mode_t mode);
+
+/**
+ * @brief Stop the TWAI peripheral
+ *
+ * Stop the TWAI peripheral by entering reset mode to stop any bus activity, then
+ * setting the operating mode to Listen Only so that REC is frozen.
+ *
+ * @param hal_ctx Context of the HAL layer
+ */
+void twai_hal_stop(twai_hal_context_t *hal_ctx);
+
+/**
+ * @brief Start bus recovery
+ *
+ * @param hal_ctx Context of the HAL layer
+ */
+static inline void twai_hal_start_bus_recovery(twai_hal_context_t *hal_ctx)
+{
+    TWAI_HAL_SET_BITS(hal_ctx->state_flags, TWAI_HAL_STATE_FLAG_RECOVERING);
+    twai_ll_exit_reset_mode(hal_ctx->dev);
+}
+
+/**
+ * @brief Get the value of the TX Error Counter
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @return TX Error Counter Value
+ */
+static inline uint32_t twai_hal_get_tec(twai_hal_context_t *hal_ctx)
+{
+    return twai_ll_get_tec((hal_ctx)->dev);
+}
+
+/**
+ * @brief Get the value of the RX Error Counter
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @return RX Error Counter Value
+ */
+static inline uint32_t twai_hal_get_rec(twai_hal_context_t *hal_ctx)
+{
+    return twai_ll_get_rec((hal_ctx)->dev);
+}
+
+/**
+ * @brief Get the RX message count register
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @return RX message count
+ */
+static inline uint32_t twai_hal_get_rx_msg_count(twai_hal_context_t *hal_ctx)
+{
+    return twai_ll_get_rx_msg_count((hal_ctx)->dev);
+}
+
+/**
+ * @brief Check if the last transmitted frame was successful
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @return True if successful
+ */
+static inline bool twai_hal_check_last_tx_successful(twai_hal_context_t *hal_ctx)
+{
+    return twai_ll_is_last_tx_successful((hal_ctx)->dev);
+}
+
+/**
+ * @brief Check if certain HAL state flags are set
+ *
+ * The HAL will maintain a record of the controller's state via a set of flags.
+ * These flags are automatically maintained (i.e., set and reset) inside various
+ * HAL function calls. This function checks if certain flags are currently set.
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @param check_flags Bit mask of flags to check
+ * @return True if one or more of the flags in check_flags are set
+ */
+
+static inline bool twai_hal_check_state_flags(twai_hal_context_t *hal_ctx, uint32_t check_flags)
+{
+    return hal_ctx->state_flags & check_flags;
+}
+
+/* ----------------------------- Event Handling ----------------------------- */
+
+/**
+ * @brief Get a bit mask of the events that triggered that triggered an interrupt
+ *
+ * This function should be called at the beginning of an interrupt. This function will do the following:
+ * - Read and clear interrupt register
+ * - Calculate what events have triggered the interrupt
+ * - Respond to low latency interrupt events
+ *      - Bus off: Change to LOM to freeze TEC/REC. Errata 1 Fix
+ *      - Recovery complete: Enter reset mode
+ *      - Clear ECC and ALC so that their interrupts are re-armed
+ * - Update HAL state flags based on interrupts that have occurred.
+ * - For the ESP32, check for errata conditions. If a HW reset is required, this function
+ *   will set the TWAI_HAL_EVENT_NEED_PERIPH_RESET event.
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @return Bit mask of events that have occurred
+ */
+uint32_t twai_hal_get_events(twai_hal_context_t *hal_ctx);
+
+/* ------------------------------- TX and RX -------------------------------- */
+
+/**
+ * @brief Format a TWAI Frame
+ *
+ * This function takes a TWAI message structure (containing ID, DLC, data, and
+ * flags) and formats it to match the layout of the TX frame buffer.
+ *
+ * @param message Pointer to TWAI message
+ * @param frame Pointer to empty frame structure
+ */
+static inline void twai_hal_format_frame(const twai_message_t *message, twai_hal_frame_t *frame)
+{
+    //Direct call to ll function
+    twai_ll_format_frame_buffer(message->identifier, message->data_length_code, message->data,
+                               message->flags, frame);
+}
+
+/**
+ * @brief Parse a TWAI Frame
+ *
+ * This function takes a TWAI frame (in the format of the RX frame buffer) and
+ * parses it to a TWAI message (containing ID, DLC, data and flags).
+ *
+ * @param frame Pointer to frame structure
+ * @param message Pointer to empty message structure
+ */
+static inline void twai_hal_parse_frame(twai_hal_frame_t *frame, twai_message_t *message)
+{
+    //Direct call to ll function
+    twai_ll_prase_frame_buffer(frame, &message->identifier, &message->data_length_code,
+                              message->data, &message->flags);
+}
+
+/**
+ * @brief Copy a frame into the TX buffer and transmit
+ *
+ * This function copies a formatted TX frame into the TX buffer, and the
+ * transmit by setting the correct transmit command (e.g. normal, single shot,
+ * self RX) in the command register.
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @param tx_frame Pointer to structure containing formatted TX frame
+ */
+void twai_hal_set_tx_buffer_and_transmit(twai_hal_context_t *hal_ctx, twai_hal_frame_t *tx_frame);
+
+/**
+ * @brief Copy a frame from the RX buffer and release
+ *
+ * This function copies a frame from the RX buffer, then release the buffer (so
+ * that it loads the next frame in the RX FIFO). False is returned under the
+ * following conditions:
+ * - On the ESP32S2, false is returned if the RX buffer points to an overrun frame
+ * - On the ESP32, false is returned if the RX buffer points to the first overrun
+ * frame in the RX FIFO
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @param rx_frame Pointer to structure to store RX frame
+ * @return True if a valid frame was copied and released. False if overrun.
+ */
+static inline bool twai_hal_read_rx_buffer_and_clear(twai_hal_context_t *hal_ctx, twai_hal_frame_t *rx_frame)
+{
+#ifdef SOC_TWAI_SUPPORTS_RX_STATUS
+    if (twai_ll_get_status(hal_ctx->dev) & TWAI_LL_STATUS_MS) {
+        //Release the buffer for this particular overrun frame
+        twai_ll_set_cmd_release_rx_buffer(hal_ctx->dev);
+        return false;
+    }
+#else
+    if (twai_ll_get_status(hal_ctx->dev) & TWAI_LL_STATUS_DOS) {
+        //No need to release RX buffer as we'll be releaseing all RX frames in continuously later
+        return false;
+    }
+#endif
+    twai_ll_get_rx_buffer(hal_ctx->dev, rx_frame);
+    twai_ll_set_cmd_release_rx_buffer(hal_ctx->dev);
+    return true;
+}
+
+#ifndef SOC_TWAI_SUPPORTS_RX_STATUS
+/**
+ * @brief Clear the RX FIFO of overrun frames
+ *
+ * This function will clear the RX FIFO of overrun frames. The RX message count
+ * will return to 0 after calling this function.
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @return Number of overrun messages cleared from RX FIFO
+ */
+static inline uint32_t twai_hal_clear_rx_fifo_overrun(twai_hal_context_t *hal_ctx)
+{
+    uint32_t msg_cnt = 0;
+    //Note: Need to keep polling th rx message counter incase another message arrives whilst clearing
+    while (twai_ll_get_rx_msg_count(hal_ctx->dev) > 0) {
+        twai_ll_set_cmd_release_rx_buffer(hal_ctx->dev);
+        msg_cnt++;
+    }
+    //Set a clear data overrun command to clear the data overrun status bit
+    twai_ll_set_cmd_clear_data_overrun(hal_ctx->dev);
+
+    return msg_cnt;
+}
+#endif  //SOC_TWAI_SUPPORTS_RX_STATUS
+
+/* --------------------------- Errata Workarounds --------------------------- */
+
+#if defined(CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID) || defined(CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT)
+/**
+ * @brief Prepare the peripheral for a HW reset
+ *
+ * Some HW erratas will require the peripheral be reset. This function should be
+ * called if twai_hal_get_events() returns the TWAI_HAL_EVENT_NEED_PERIPH_RESET event.
+ * Preparing for a reset involves the following:
+ * - Checking if a reset will cancel a TX. If so, mark that we need to retry that message after the reset
+ * - Save how many RX messages were lost due to this reset
+ * - Enter reset mode to stop any the peripheral from receiving any bus activity
+ * - Store the regsiter state of the peripheral
+ *
+ * @param hal_ctx Context of the HAL layer
+ */
+void twai_hal_prepare_for_reset(twai_hal_context_t *hal_ctx);
+
+/**
+ * @brief Recover the peripheral after a HW reset
+ *
+ * This should be called after calling twai_hal_prepare_for_reset() and then
+ * executing the HW reset.
+ * Recovering the peripheral from a HW reset involves the following:
+ * - Restoring the previously saved register state
+ * - Exiting reset mode to allow receiving of bus activity
+ * - Retrying any TX message that was cancelled by the HW reset
+ *
+ * @param hal_ctx Context of the HAL layer
+ */
+void twai_hal_recover_from_reset(twai_hal_context_t *hal_ctx);
+
+/**
+ * @brief Get how many RX messages were lost due to HW reset
+ *
+ * @note The number of lost RX messages are saved during twai_hal_prepare_for_reset()
+ *
+ * @param hal_ctx Context of the HAL layer
+ * @return uint32_t Number of RX messages lost due to HW reset
+ */
+static inline uint32_t twai_hal_get_reset_lost_rx_cnt(twai_hal_context_t *hal_ctx)
+{
+    return hal_ctx->rx_msg_cnt_save;
+}
+#endif  //defined(CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID) || defined(CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/twai_types.h b/tools/sdk/esp32s3/include/hal/include/hal/twai_types.h
new file mode 100644
index 00000000000..f4d5ef5286f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/twai_types.h
@@ -0,0 +1,148 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "sdkconfig.h"
+#include "soc/soc_caps.h"
+
+/**
+ * @brief   TWAI Constants
+ */
+#define TWAI_EXTD_ID_MASK               0x1FFFFFFF  /**< Bit mask for 29 bit Extended Frame Format ID */
+#define TWAI_STD_ID_MASK                0x7FF       /**< Bit mask for 11 bit Standard Frame Format ID */
+#define TWAI_FRAME_MAX_DLC              8           /**< Max data bytes allowed in TWAI */
+#define TWAI_FRAME_EXTD_ID_LEN_BYTES    4           /**< EFF ID requires 4 bytes (29bit) */
+#define TWAI_FRAME_STD_ID_LEN_BYTES     2           /**< SFF ID requires 2 bytes (11bit) */
+#define TWAI_ERR_PASS_THRESH            128         /**< Error counter threshold for error passive */
+
+/** @cond */    //Doxy command to hide preprocessor definitions from docs
+/**
+ * @brief   TWAI Message flags
+ *
+ * The message flags are used to indicate the type of message transmitted/received.
+ * Some flags also specify the type of transmission.
+ */
+#define TWAI_MSG_FLAG_NONE              0x00        /**< No message flags (Standard Frame Format) */
+#define TWAI_MSG_FLAG_EXTD              0x01        /**< Extended Frame Format (29bit ID) */
+#define TWAI_MSG_FLAG_RTR               0x02        /**< Message is a Remote Frame */
+#define TWAI_MSG_FLAG_SS                0x04        /**< Transmit as a Single Shot Transmission. Unused for received. */
+#define TWAI_MSG_FLAG_SELF              0x08        /**< Transmit as a Self Reception Request. Unused for received. */
+#define TWAI_MSG_FLAG_DLC_NON_COMP      0x10        /**< Message's Data length code is larger than 8. This will break compliance with TWAI */
+
+#define TWAI_BRP_MAX    SOC_TWAI_BRP_MAX    /**< Maximum configurable BRP value */
+#define TWAI_BRP_MIN    SOC_TWAI_BRP_MIN    /**< Minimum configurable BRP value */
+
+
+/**
+ * @brief Initializer macros for timing configuration structure
+ *
+ * The following initializer macros offer commonly found bit rates. These macros
+ * place the sample point at 80% or 67% of a bit time.
+ *
+ * @note These timing values are based on the assumption APB clock is at 80MHz
+ * @note The available bit rates are dependent on the chip target and revision.
+ */
+#if (SOC_TWAI_BRP_MAX > 256)
+#define TWAI_TIMING_CONFIG_1KBITS()     {.brp = 4000, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_5KBITS()     {.brp = 800, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_10KBITS()    {.brp = 400, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#endif
+#if (SOC_TWAI_BRP_MAX > 128) || (CONFIG_ESP32_REV_MIN >= 2)
+#define TWAI_TIMING_CONFIG_12_5KBITS()  {.brp = 256, .tseg_1 = 16, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_16KBITS()    {.brp = 200, .tseg_1 = 16, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_20KBITS()    {.brp = 200, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#endif
+#define TWAI_TIMING_CONFIG_25KBITS()    {.brp = 128, .tseg_1 = 16, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_50KBITS()    {.brp = 80, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_100KBITS()   {.brp = 40, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_125KBITS()   {.brp = 32, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_250KBITS()   {.brp = 16, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_500KBITS()   {.brp = 8, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_800KBITS()   {.brp = 4, .tseg_1 = 16, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_1MBITS()     {.brp = 4, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+
+/**
+ * @brief   Initializer macro for filter configuration to accept all IDs
+ */
+#define TWAI_FILTER_CONFIG_ACCEPT_ALL() {.acceptance_code = 0, .acceptance_mask = 0xFFFFFFFF, .single_filter = true}
+/** @endcond */
+
+/**
+ * @brief   TWAI Controller operating modes
+ */
+typedef enum {
+    TWAI_MODE_NORMAL,               /**< Normal operating mode where TWAI controller can send/receive/acknowledge messages */
+    TWAI_MODE_NO_ACK,               /**< Transmission does not require acknowledgment. Use this mode for self testing */
+    TWAI_MODE_LISTEN_ONLY,          /**< The TWAI controller will not influence the bus (No transmissions or acknowledgments) but can receive messages */
+} twai_mode_t;
+
+/**
+ * @brief   Structure to store a TWAI message
+ *
+ * @note    The flags member is deprecated
+ */
+typedef struct {
+    union {
+        struct {
+            //The order of these bits must match deprecated message flags for compatibility reasons
+            uint32_t extd: 1;           /**< Extended Frame Format (29bit ID) */
+            uint32_t rtr: 1;            /**< Message is a Remote Frame */
+            uint32_t ss: 1;             /**< Transmit as a Single Shot Transmission. Unused for received. */
+            uint32_t self: 1;           /**< Transmit as a Self Reception Request. Unused for received. */
+            uint32_t dlc_non_comp: 1;   /**< Message's Data length code is larger than 8. This will break compliance with ISO 11898-1 */
+            uint32_t reserved: 27;      /**< Reserved bits */
+        };
+        //Todo: Deprecate flags
+        uint32_t flags;                 /**< Deprecated: Alternate way to set bits using message flags */
+    };
+    uint32_t identifier;                /**< 11 or 29 bit identifier */
+    uint8_t data_length_code;           /**< Data length code */
+    uint8_t data[TWAI_FRAME_MAX_DLC];    /**< Data bytes (not relevant in RTR frame) */
+} twai_message_t;
+
+/**
+ * @brief   Structure for bit timing configuration of the TWAI driver
+ *
+ * @note    Macro initializers are available for this structure
+ */
+typedef struct {
+    uint32_t brp;                   /**< Baudrate prescaler (i.e., APB clock divider). Any even number from 2 to 128 for ESP32, 2 to 32768 for ESP32S2.
+                                         For ESP32 Rev 2 or later, multiples of 4 from 132 to 256 are also supported */
+    uint8_t tseg_1;                 /**< Timing segment 1 (Number of time quanta, between 1 to 16) */
+    uint8_t tseg_2;                 /**< Timing segment 2 (Number of time quanta, 1 to 8) */
+    uint8_t sjw;                    /**< Synchronization Jump Width (Max time quanta jump for synchronize from 1 to 4) */
+    bool triple_sampling;           /**< Enables triple sampling when the TWAI controller samples a bit */
+} twai_timing_config_t;
+
+/**
+ * @brief   Structure for acceptance filter configuration of the TWAI driver (see documentation)
+ *
+ * @note    Macro initializers are available for this structure
+ */
+typedef struct {
+    uint32_t acceptance_code;       /**< 32-bit acceptance code */
+    uint32_t acceptance_mask;       /**< 32-bit acceptance mask */
+    bool single_filter;             /**< Use Single Filter Mode (see documentation) */
+} twai_filter_config_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/uart_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/uart_hal.h
new file mode 100644
index 00000000000..f7b94888064
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/uart_hal.h
@@ -0,0 +1,491 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for UART.
+// There is no parameter check in the hal layer, so the caller must ensure the correctness of the parameters.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "hal/uart_ll.h"
+#include "hal/uart_types.h"
+
+/**
+ * Context that should be maintained by both the driver and the HAL
+ */
+typedef struct {
+    uart_dev_t *dev;
+} uart_hal_context_t;
+
+/**
+ * @brief Clear the UART interrupt status
+ *
+ * @param  hal Context of the HAL layer
+ * @param  mask The interrupt status mask to be cleared. Using the ORred mask of `UART_INTR_RXFIFO_FULL ... UART_INTR_CMD_CHAR_DET`
+ *
+ * @return None
+ */
+#define uart_hal_clr_intsts_mask(hal, mask)  uart_ll_clr_intsts_mask((hal)->dev, mask)
+
+/**
+ * @brief Disable the UART interrupt
+ *
+ * @param  hal Context of the HAL layer
+ * @param  mask The interrupt mask to be disabled. Using the ORred mask of `UART_INTR_RXFIFO_FULL ... UART_INTR_CMD_CHAR_DET`
+ *
+ * @return None
+ */
+#define uart_hal_disable_intr_mask(hal, mask)  uart_ll_disable_intr_mask((hal)->dev, mask)
+
+/**
+ * @brief Enable the UART interrupt
+ *
+ * @param  hal Context of the HAL layer
+ * @param  mask The UART interrupt mask to be enabled. Using the ORred mask of `UART_INTR_RXFIFO_FULL ... UART_INTR_CMD_CHAR_DET`
+ *
+ * @return None
+ */
+#define uart_hal_ena_intr_mask(hal, mask)  uart_ll_ena_intr_mask((hal)->dev, mask)
+
+/**
+ * @brief Get the UART interrupt status
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return UART interrupt status
+ */
+#define uart_hal_get_intsts_mask(hal)  uart_ll_get_intsts_mask((hal)->dev)
+
+/**
+ * @brief Get status of enabled interrupt
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return UART Interrupt enabled value
+ */
+#define uart_hal_get_intr_ena_status(hal) uart_ll_get_intr_ena_status((hal)->dev)
+
+/**
+ * @brief Get the UART pattern char configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  cmd_char Pointer to accept UART AT cmd char
+ * @param  char_num Pointer to accept the `UART_CHAR_NUM` configuration
+ *
+ * @return None
+ */
+#define uart_hal_get_at_cmd_char(hal, cmd_char, char_num)  uart_ll_get_at_cmd_char((hal)->dev, cmd_char, char_num)
+
+/**
+ * @brief Set the UART rst signal active level
+ *
+ * @param  hal Context of the HAL layer
+ * @param  active_level The rts active level. The active level is low if set to 0. The active level is high if set to 1
+ *
+ * @return None
+ */
+#define uart_hal_set_rts(hal, active_level)  uart_ll_set_rts_active_level((hal)->dev, active_level)
+
+/**
+ * @brief Get the txfifo writeable length(in byte)
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return UART txfifo writeable length
+ */
+#define uart_hal_get_txfifo_len(hal)  uart_ll_get_txfifo_len((hal)->dev)
+
+/**
+ * @brief Check if the UART sending state machine is in the IDLE state.
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return True if the state machine is in the IDLE state, otherwise false will be returned.
+ */
+#define uart_hal_is_tx_idle(hal)  uart_ll_is_tx_idle((hal)->dev)
+
+/**
+ * @brief  Configure the UART core reset
+ *
+ * @param  hal Context of the HAL layer
+ * @param  Set true to enable the core reset, otherwise set it false
+ *
+ * @return None
+ */
+#define uart_hal_set_reset_core(hal, core_rst_en)  uart_ll_set_reset_core((hal)->dev, core_rst_en)
+
+/**
+ * @brief  Read data from the UART rxfifo
+ *
+ * @param[in] hal Context of the HAL layer
+ * @param[in] buf Pointer to the buffer used to store the read data. The buffer size should be large than 128 byte
+ * @param[inout] inout_rd_len As input, the size of output buffer to read (set to 0 to read all available data).
+ *                            As output, returns the actual size written into the output buffer.
+ *
+ * @return None
+ */
+void uart_hal_read_rxfifo(uart_hal_context_t *hal, uint8_t *buf, int *inout_rd_len);
+
+/**
+ * @brief  Write data into the UART txfifo
+ *
+ * @param  hal Context of the HAL layer
+ * @param  buf Pointer of the data buffer need to be written to txfifo
+ * @param  data_size The data size(in byte) need to be written
+ * @param  write_size The size has been written
+ *
+ * @return None
+ */
+void uart_hal_write_txfifo(uart_hal_context_t *hal, const uint8_t *buf, uint32_t data_size, uint32_t *write_size);
+
+/**
+ * @brief  Reset the UART txfifo
+ * @note   On ESP32, this function is reserved for UART1 and UART2.
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+void uart_hal_txfifo_rst(uart_hal_context_t *hal);
+
+/**
+ * @brief  Reset the UART rxfifo
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return None
+ */
+void uart_hal_rxfifo_rst(uart_hal_context_t *hal);
+
+/**
+ * @brief Init the UART hal and set the UART to the default configuration.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  uart_num The uart port number, the max port number is (UART_NUM_MAX -1)
+ *
+ * @return None
+ */
+void uart_hal_init(uart_hal_context_t *hal, uart_port_t uart_num);
+
+/**
+ * @brief Set the UART source clock type
+ * @param  hal Context of the HAL layer
+ * @param  sclk The UART source clock type.
+ *
+ * @return None
+ */
+void uart_hal_set_sclk(uart_hal_context_t *hal, uart_sclk_t sclk);
+
+/**
+ * @brief Get the UART source clock type
+ *
+ * @param  hal Context of the HAL layer
+ * @param  sclk The poiter to accept the UART source clock type
+ *
+ * @return None
+ */
+void uart_hal_get_sclk(uart_hal_context_t *hal, uart_sclk_t *sclk);
+
+/**
+ * @brief  Configure the UART baud-rate and select the source clock
+ *
+ * @param  hal Context of the HAL layer
+ * @param  baud_rate The baud-rate to be set
+ *
+ * @return None
+ */
+void uart_hal_set_baudrate(uart_hal_context_t *hal, uint32_t baud_rate);
+
+/**
+ * @brief  Configure the UART stop bit
+ *
+ * @param  hal Context of the HAL layer
+ * @param  stop_bit The stop bit to be set
+ *
+ * @return None
+ */
+void uart_hal_set_stop_bits(uart_hal_context_t *hal, uart_stop_bits_t stop_bit);
+
+/**
+ * @brief Configure the UART data bit
+ *
+ * @param  hal Context of the HAL layer
+ * @param  data_bit The data bit to be set
+ *
+ * @return None
+ */
+void uart_hal_set_data_bit_num(uart_hal_context_t *hal, uart_word_length_t data_bit);
+
+/**
+ * @brief Configure the UART parity mode
+ *
+ * @param  hal Context of the HAL layer
+ * @param  parity_mode The UART parity mode to be set
+ *
+ * @return None
+ */
+void uart_hal_set_parity(uart_hal_context_t *hal, uart_parity_t parity_mode);
+
+/**
+ * @brief Configure the UART hardware flow control
+ *
+ * @param  hal Context of the HAL layer
+ * @param  flow_ctrl The flow control mode to be set
+ * @param  rx_thresh The rts flow control signal will be active if the data length in rxfifo is large than this value
+ *
+ * @return None
+ */
+void uart_hal_set_hw_flow_ctrl(uart_hal_context_t *hal, uart_hw_flowcontrol_t flow_ctrl, uint8_t rx_thresh);
+
+/**
+ * @brief Configure the UART AT cmd char detect function. When the receiver receives a continuous AT cmd char, it will produce a interrupt
+ *
+ * @param  hal Context of the HAL layer
+ * @param  at_cmd The AT cmd char detect configuration
+ *
+ * @return None.
+ */
+void uart_hal_set_at_cmd_char(uart_hal_context_t *hal, uart_at_cmd_t *at_cmd);
+
+/**
+ * @brief Set the timeout value of the UART receiver
+ *
+ * @param  hal Context of the HAL layer
+ * @param  tout The timeout value for receiver to receive a data
+ *
+ * @return None
+ */
+void uart_hal_set_rx_timeout(uart_hal_context_t *hal, const uint8_t tout);
+
+/**
+ * @brief Set the UART dtr signal active level
+ *
+ * @param  hal Context of the HAL layer
+ * @param  active_level The dtr active level. The active level is low if set to 0. The active level is high if set to 1
+ *
+ * @return None
+ */
+void uart_hal_set_dtr(uart_hal_context_t *hal, int active_level);
+
+/**
+ * @brief Set the UART software flow control
+ *
+ * @param  hal Context of the HAL layer
+ * @param  flow_ctrl The software flow control configuration
+ * @param  sw_flow_ctrl_en Set true to enable the software flow control, otherwise set it false
+ *
+ * @return None
+ */
+void uart_hal_set_sw_flow_ctrl(uart_hal_context_t *hal, uart_sw_flowctrl_t *flow_ctrl, bool sw_flow_ctrl_en);
+
+/**
+ * @brief Set the UART tx idle number
+ *
+ * @param  hal Context of the HAL layer
+ * @param  idle_num The cycle number betwin the two transmission
+ *
+ * @return None
+ */
+void uart_hal_set_tx_idle_num(uart_hal_context_t *hal, uint16_t idle_num);
+
+/**
+ * @brief Set the UART rxfifo full threshold
+ *
+ * @param  hal Context of the HAL layer
+ * @param  full_thrhd The rxfifo full threshold. If the `UART_RXFIFO_FULL` interrupt is enabled and
+ *         the data length in rxfifo is more than this value, it will generate `UART_RXFIFO_FULL` interrupt
+ *
+ * @return None
+ */
+void uart_hal_set_rxfifo_full_thr(uart_hal_context_t *hal, uint32_t full_thrhd);
+
+/**
+ * @brief Set the UART txfifo empty threshold
+ *
+ * @param  hal Context of the HAL layer
+ * @param  empty_thrhd The txfifo empty threshold to be set. If the `UART_TXFIFO_EMPTY` interrupt is enabled and
+ *         the data length in txfifo is less than this value, it will generate `UART_TXFIFO_EMPTY` interrupt
+ *
+ * @return None
+ */
+void uart_hal_set_txfifo_empty_thr(uart_hal_context_t *hal, uint32_t empty_thrhd);
+
+/**
+ * @brief Configure the UART to send a number of break(NULL) chars
+ *
+ * @param  hal Context of the HAL layer
+ * @param  break_num The number of the break char need to be send
+ *
+ * @return None
+ */
+void uart_hal_tx_break(uart_hal_context_t *hal, uint32_t break_num);
+
+/**
+ * @brief Configure the UART wake up function.
+ *     Note that RXD cannot be input through GPIO Matrix but only through IO_MUX when use this function
+ *
+ * @param  hal Context of the HAL layer
+ * @param  wakeup_thrd The wake up threshold to be set. The system will be woken up from light-sleep when the input RXD edge changes more times than `wakeup_thrd+2`
+ *
+ * @return None
+ */
+void uart_hal_set_wakeup_thrd(uart_hal_context_t *hal, uint32_t wakeup_thrd);
+
+/**
+ * @brief Configure the UART mode
+ *
+ * @param  hal Context of the HAL layer
+ * @param  mode The UART mode to be set
+ *
+ * @return None
+ */
+void uart_hal_set_mode(uart_hal_context_t *hal, uart_mode_t mode);
+
+/**
+ * @brief Configure the UART hardware to inverse the signals
+ *
+ * @param  hal Context of the HAL layer
+ * @param  inv_mask The sigal mask needs to be inversed. Use the ORred mask of type `uart_signal_inv_t`
+ *
+ * @return None
+ */
+void uart_hal_inverse_signal(uart_hal_context_t *hal, uint32_t inv_mask);
+
+/**
+ * @brief Get the UART wakeup threshold configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  wakeup_thrd Pointer to accept the value of UART wakeup threshold configuration
+ *
+ * @return None
+ */
+void uart_hal_get_wakeup_thrd(uart_hal_context_t *hal, uint32_t *wakeup_thrd);
+
+/**
+ * @brief Get the UART data bit configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  data_bit Pointer to accept the value of UART data bit configuration
+ *
+ * @return None
+ */
+void uart_hal_get_data_bit_num(uart_hal_context_t *hal, uart_word_length_t *data_bit);
+
+/**
+ * @brief Get the UART stop bit configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  stop_bit Pointer to accept the value of UART stop bit configuration
+ *
+ * @return None
+ */
+void uart_hal_get_stop_bits(uart_hal_context_t *hal, uart_stop_bits_t *stop_bit);
+
+/**
+ * @brief Get the UART parity mode configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  parity_mode Pointer to accept the UART parity mode configuration
+ *
+ * @return None
+ */
+void uart_hal_get_parity(uart_hal_context_t *hal, uart_parity_t *parity_mode);
+
+/**
+ * @brief Get the UART baud-rate configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  baud_rate Pointer to accept the current baud-rate
+ *
+ * @return None
+ */
+void uart_hal_get_baudrate(uart_hal_context_t *hal, uint32_t *baud_rate);
+
+/**
+ * @brief Get the hw flow control configuration
+ *
+ * @param  hal Context of the HAL layer
+ * @param  flow_ctrl Pointer to accept the UART flow control configuration
+ *
+ * @return None
+ */
+void uart_hal_get_hw_flow_ctrl(uart_hal_context_t *hal, uart_hw_flowcontrol_t *flow_ctrl);
+
+/**
+ * @brief Check if the UART rts flow control is enabled
+ *
+ * @param  hal Context of the HAL layer
+ *
+ * @return True if rts flow control is enabled, otherwise false will be returned
+ */
+bool uart_hal_is_hw_rts_en(uart_hal_context_t *hal);
+
+/**
+ * @brief Configure TX signal loop back to RX module, just for the testing purposes
+ *
+ * @param  hal Context of the HAL layer
+ * @param  loop_back_en Set ture to enable the loop back function, else set it false.
+ *
+ * @return None
+ */
+void uart_hal_set_loop_back(uart_hal_context_t *hal, bool loop_back_en);
+
+/**
+ * @brief  Calculate uart symbol bit length, as defined in configuration.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return number of bits per UART symbol.
+ */
+uint8_t uart_hal_get_symb_len(uart_hal_context_t *hal);
+
+/**
+ * @brief  Get UART maximum timeout threshold.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return maximum timeout threshold value for target.
+ */
+uint16_t uart_hal_get_max_rx_timeout_thrd(uart_hal_context_t *hal);
+
+/**
+ * @brief  Get the timeout threshold value set for receiver.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return tout_thr The timeout value. If timeout is disabled then returns 0.
+ */
+#define uart_hal_get_rx_tout_thr(hal) uart_ll_get_rx_tout_thr((hal)->dev)
+
+/**
+ * @brief  Get the length of readable data in UART rxfifo.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ *
+ * @return The readable data length in rxfifo.
+ */
+#define uart_hal_get_rxfifo_len(hal) uart_ll_get_rxfifo_len((hal)->dev)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/uart_types.h b/tools/sdk/esp32s3/include/hal/include/hal/uart_types.h
new file mode 100644
index 00000000000..1e1110f136e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/uart_types.h
@@ -0,0 +1,154 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+
+
+/**
+ * @brief UART port number, can be UART_NUM_0 ~ (UART_NUM_MAX -1).
+ */
+typedef int uart_port_t;
+
+/**
+ * @brief UART mode selection
+ */
+typedef enum {
+    UART_MODE_UART = 0x00,                      /*!< mode: regular UART mode*/
+    UART_MODE_RS485_HALF_DUPLEX = 0x01,         /*!< mode: half duplex RS485 UART mode control by RTS pin */
+    UART_MODE_IRDA = 0x02,                      /*!< mode: IRDA  UART mode*/
+    UART_MODE_RS485_COLLISION_DETECT = 0x03,    /*!< mode: RS485 collision detection UART mode (used for test purposes)*/
+    UART_MODE_RS485_APP_CTRL = 0x04,            /*!< mode: application control RS485 UART mode (used for test purposes)*/
+} uart_mode_t;
+
+/**
+ * @brief UART word length constants
+ */
+typedef enum {
+    UART_DATA_5_BITS   = 0x0,    /*!< word length: 5bits*/
+    UART_DATA_6_BITS   = 0x1,    /*!< word length: 6bits*/
+    UART_DATA_7_BITS   = 0x2,    /*!< word length: 7bits*/
+    UART_DATA_8_BITS   = 0x3,    /*!< word length: 8bits*/
+    UART_DATA_BITS_MAX = 0x4,
+} uart_word_length_t;
+
+/**
+ * @brief UART stop bits number
+ */
+typedef enum {
+    UART_STOP_BITS_1   = 0x1,  /*!< stop bit: 1bit*/
+    UART_STOP_BITS_1_5 = 0x2,  /*!< stop bit: 1.5bits*/
+    UART_STOP_BITS_2   = 0x3,  /*!< stop bit: 2bits*/
+    UART_STOP_BITS_MAX = 0x4,
+} uart_stop_bits_t;
+
+/**
+ * @brief UART parity constants
+ */
+typedef enum {
+    UART_PARITY_DISABLE  = 0x0,  /*!< Disable UART parity*/
+    UART_PARITY_EVEN     = 0x2,  /*!< Enable UART even parity*/
+    UART_PARITY_ODD      = 0x3   /*!< Enable UART odd parity*/
+} uart_parity_t;
+
+/**
+ * @brief UART hardware flow control modes
+ */
+typedef enum {
+    UART_HW_FLOWCTRL_DISABLE = 0x0,   /*!< disable hardware flow control*/
+    UART_HW_FLOWCTRL_RTS     = 0x1,   /*!< enable RX hardware flow control (rts)*/
+    UART_HW_FLOWCTRL_CTS     = 0x2,   /*!< enable TX hardware flow control (cts)*/
+    UART_HW_FLOWCTRL_CTS_RTS = 0x3,   /*!< enable hardware flow control*/
+    UART_HW_FLOWCTRL_MAX     = 0x4,
+} uart_hw_flowcontrol_t;
+
+/**
+ * @brief UART signal bit map
+ */
+typedef enum {
+    UART_SIGNAL_INV_DISABLE  =  0,            /*!< Disable UART signal inverse*/
+    UART_SIGNAL_IRDA_TX_INV  = (0x1 << 0),    /*!< inverse the UART irda_tx signal*/
+    UART_SIGNAL_IRDA_RX_INV  = (0x1 << 1),    /*!< inverse the UART irda_rx signal*/
+    UART_SIGNAL_RXD_INV      = (0x1 << 2),    /*!< inverse the UART rxd signal*/
+    UART_SIGNAL_CTS_INV      = (0x1 << 3),    /*!< inverse the UART cts signal*/
+    UART_SIGNAL_DSR_INV      = (0x1 << 4),    /*!< inverse the UART dsr signal*/
+    UART_SIGNAL_TXD_INV      = (0x1 << 5),    /*!< inverse the UART txd signal*/
+    UART_SIGNAL_RTS_INV      = (0x1 << 6),    /*!< inverse the UART rts signal*/
+    UART_SIGNAL_DTR_INV      = (0x1 << 7),    /*!< inverse the UART dtr signal*/
+} uart_signal_inv_t;
+
+/**
+ * @brief UART source clock
+ */
+typedef enum {
+    UART_SCLK_APB = 0x0,            /*!< UART source clock from APB*/
+#if SOC_UART_SUPPORT_RTC_CLK
+    UART_SCLK_RTC = 0x1,            /*!< UART source clock from RTC*/
+#endif
+#if SOC_UART_SUPPORT_XTAL_CLK
+    UART_SCLK_XTAL = 0x2,           /*!< UART source clock from XTAL*/
+#endif
+#if SOC_UART_SUPPORT_REF_TICK
+    UART_SCLK_REF_TICK = 0x3,       /*!< UART source clock from REF_TICK*/
+#endif
+} uart_sclk_t;
+
+/**
+ * @brief UART AT cmd char configuration parameters
+ *        Note that this function may different on different chip. Please refer to the TRM at confirguration.
+ */
+typedef struct {
+    uint8_t  cmd_char;             /*!< UART AT cmd char*/
+    uint8_t  char_num;             /*!< AT cmd char repeat number*/
+    uint32_t gap_tout;             /*!< gap time(in baud-rate) between AT cmd char*/
+    uint32_t pre_idle;             /*!< the idle time(in baud-rate) between the non AT char and first AT char*/
+    uint32_t post_idle;            /*!< the idle time(in baud-rate) between the last AT char and the none AT char*/
+} uart_at_cmd_t;
+
+/**
+ * @brief UART software flow control configuration parameters
+ */
+typedef struct {
+    uint8_t  xon_char;      /*!< Xon flow control char*/
+    uint8_t  xoff_char;     /*!< Xoff flow control char*/
+    uint8_t xon_thrd;      /*!< If the software flow control is enabled and the data amount in rxfifo is less than xon_thrd, an xon_char will be sent*/
+    uint8_t xoff_thrd;       /*!< If the software flow control is enabled and the data amount in rxfifo is more than xoff_thrd, an xoff_char will be sent*/
+} uart_sw_flowctrl_t;
+
+/**
+ * @brief UART configuration parameters for uart_param_config function
+ */
+typedef struct {
+    int baud_rate;                      /*!< UART baud rate*/
+    uart_word_length_t data_bits;       /*!< UART byte size*/
+    uart_parity_t parity;               /*!< UART parity mode*/
+    uart_stop_bits_t stop_bits;         /*!< UART stop bits*/
+    uart_hw_flowcontrol_t flow_ctrl;    /*!< UART HW flow control mode (cts/rts)*/
+    uint8_t rx_flow_ctrl_thresh;        /*!< UART HW RTS threshold*/
+    union {
+        uart_sclk_t source_clk;         /*!< UART source clock selection */
+        bool use_ref_tick  __attribute__((deprecated)); /*!< Deprecated method to select ref tick clock source, set source_clk field instead */
+    };
+} uart_config_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/uhci_types.h b/tools/sdk/esp32s3/include/hal/include/hal/uhci_types.h
new file mode 100644
index 00000000000..7122e2a41a9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/uhci_types.h
@@ -0,0 +1,54 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+
+// Though the UHCI driver hasn't been published, some types are defined here
+// for users to develop over the HAL. See example: controller_hci_uart_esp32c3
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief UHCI escape sequence
+ */
+typedef struct {
+    uint8_t seper_chr;        /*!< escape sequence character */
+    uint8_t sub_chr1;         /*!< escape sequence sub-character 1 */
+    uint8_t sub_chr2;         /*!< escape sequence sub-character 2 */
+    bool sub_chr_en;          /*!< enable use of sub-chaacter of escape sequence */
+} uhci_seper_chr_t;
+
+/**
+ * @brief UHCI software flow control
+ */
+typedef struct {
+    uint8_t xon_chr;          /*!< character for XON */
+    uint8_t xon_sub1;         /*!< sub-character 1 for XON */
+    uint8_t xon_sub2;         /*!< sub-character 2 for XON */
+    uint8_t xoff_chr;         /*!< character 2 for XOFF */
+    uint8_t xoff_sub1;        /*!< sub-character 1 for XOFF */
+    uint8_t xoff_sub2;        /*!< sub-character 2 for XOFF */
+    uint8_t flow_en;          /*!< enable use of software flow control */
+} uhci_swflow_ctrl_sub_chr_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/usb_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/usb_hal.h
new file mode 100644
index 00000000000..b79740932f4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/usb_hal.h
@@ -0,0 +1,31 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    bool use_external_phy;
+} usb_hal_context_t;
+
+void usb_hal_init(usb_hal_context_t *usb);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/usb_phy_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/usb_phy_hal.h
new file mode 100644
index 00000000000..fe77eb87446
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/usb_phy_hal.h
@@ -0,0 +1,81 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "usb_types_private.h"
+#include "usb_phy_types.h"
+#include "soc/soc_caps.h"
+#include "soc/usb_wrap_struct.h"
+#if SOC_USB_SERIAL_JTAG_SUPPORTED
+#include "soc/usb_serial_jtag_struct.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Context that should be maintained by both the driver and the HAL
+ */
+typedef struct {
+    usb_wrap_dev_t *wrap_dev;                   /**< Pointer to base address of USB Wrapper registers */
+#if SOC_USB_SERIAL_JTAG_SUPPORTED
+    usb_serial_jtag_dev_t *jtag_dev;            /**< Pointer to base address of USB Serial JTAG registers */
+#endif
+} usb_phy_hal_context_t;
+
+/**
+ * @brief Init the USB PHY hal. This function should be called first before other hal layer function is called
+ *
+ * @param hal Context of the HAL layer
+ */
+void usb_phy_hal_init(usb_phy_hal_context_t *hal);
+
+/**
+ * @brief Configure internal/external PHY for USB_OTG
+ *
+ * @param hal Context of the HAL layer
+ * @param phy_target USB PHY target
+ */
+void usb_phy_hal_otg_conf(usb_phy_hal_context_t *hal, usb_phy_target_t phy_target);
+
+#if SOC_USB_SERIAL_JTAG_SUPPORTED
+/**
+ * @brief Configure internal/external PHY for USB_Serial_JTAG
+ *
+ * @param hal Context of the HAL layer
+ * @param phy_target USB PHY target
+ */
+void usb_phy_hal_jtag_conf(usb_phy_hal_context_t *hal, usb_phy_target_t phy_target);
+#endif
+
+/**
+ * @brief Configure pullup/pulldown loads for the D+/D- as a host
+ *
+ * @param hal Context of the HAL layer
+ */
+void usb_phy_hal_int_load_conf_host(usb_phy_hal_context_t *hal);
+
+/**
+ * @brief Configure pullup/pulldown loads for the D+/D- as a device
+ *
+ * @param hal Context of the HAL layer
+ * @param speed USB speed
+ */
+void usb_phy_hal_int_load_conf_dev(usb_phy_hal_context_t *hal, usb_priv_speed_t speed);
+
+/**
+ * @brief Enable/Disable test mode for internal PHY to mimick host-device disconnection
+ *
+ * @param hal Context of the HAL layer
+ * @param disconn Whether to disconnect
+ */
+void usb_phy_hal_int_mimick_disconn(usb_phy_hal_context_t *hal, bool disconn);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/usb_phy_types.h b/tools/sdk/esp32s3/include/hal/include/hal/usb_phy_types.h
new file mode 100644
index 00000000000..1f5ac431efa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/usb_phy_types.h
@@ -0,0 +1,63 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+Note: This header file contains USB2.0 related types and macros that can be used by code specific to the DWC_OTG
+controller (i.e., the HW specific layers of the USB host stack). Thus, this header is only meant to be used below (and
+including) the HAL layer. For types and macros that are HW implementation agnostic (i.e., HCD layer and above), add them
+to the "usb/usb_types_ch9.h" header instead.
+*/
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief USB PHY target
+ */
+typedef enum {
+    USB_PHY_TARGET_INT,              /**< USB target is internal PHY */
+    USB_PHY_TARGET_EXT,              /**< USB target is external PHY */
+    USB_PHY_TARGET_MAX,
+} usb_phy_target_t;
+
+/**
+ * @brief USB PHY source
+ */
+typedef enum {
+    USB_PHY_CTRL_OTG,                /**< PHY controller is USB OTG */
+#if SOC_USB_SERIAL_JTAG_SUPPORTED
+    USB_PHY_CTRL_SERIAL_JTAG,        /**< PHY controller is USB Serial JTAG */
+#endif
+    USB_PHY_CTRL_MAX,
+} usb_phy_controller_t;
+
+/**
+ * @brief USB OTG mode
+ */
+typedef enum {
+    USB_PHY_MODE_DEFAULT,            /**< USB OTG default mode */
+    USB_OTG_MODE_HOST,               /**< USB OTG host mode */
+    USB_OTG_MODE_DEVICE,             /**< USB OTG device mode */
+    USB_OTG_MODE_MAX,
+} usb_otg_mode_t;
+
+/**
+ * @brief USB speed
+ */
+typedef enum {
+    USB_PHY_SPEED_UNDEFINED,
+    USB_PHY_SPEED_LOW,              /**< USB Low Speed (1.5 Mbit/s)  */
+    USB_PHY_SPEED_FULL,             /**< USB Full Speed (12 Mbit/s)  */
+    USB_PHY_SPEED_MAX,
+} usb_phy_speed_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/usb_types_private.h b/tools/sdk/esp32s3/include/hal/include/hal/usb_types_private.h
new file mode 100644
index 00000000000..5cce6b66af4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/usb_types_private.h
@@ -0,0 +1,72 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*
+Note: This header file contains USB2.0 related types and macros that can be used by code specific to the DWC_OTG
+controller (i.e., the HW specific layers of the USB host stack). Thus, this header is only meant to be used below (and
+including) the HAL layer. For types and macros that are HW implementation agnostic (i.e., HCD layer and above), add them
+to the "usb/usb_types_ch9.h" header instead.
+*/
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief USB speeds supported by the DWC OTG controller
+ */
+typedef enum {
+    USB_PRIV_SPEED_FULL,
+    USB_PRIV_SPEED_LOW,
+} usb_priv_speed_t;
+
+/**
+ * @brief USB transfer types supported by the DWC OTG controller
+ */
+typedef enum {
+    USB_PRIV_XFER_TYPE_CTRL,
+    USB_PRIV_XFER_TYPE_ISOCHRONOUS,
+    USB_PRIV_XFER_TYPE_BULK,
+    USB_PRIV_XFER_TYPE_INTR,
+} usb_priv_xfer_type_t;
+
+/**
+ * @brief Enumeration of different possible lengths of the periodic frame list
+ */
+typedef enum {
+    USB_HAL_FRAME_LIST_LEN_8 = 8,
+    USB_HAL_FRAME_LIST_LEN_16 = 16,
+    USB_HAL_FRAME_LIST_LEN_32 = 32,
+    USB_HAL_FRAME_LIST_LEN_64 = 64,
+} usb_hal_frame_list_len_t;
+
+/**
+ * @brief Support intervals in number of USB frames (i.e., 1ms)
+ */
+typedef enum {
+    USB_HAL_INTERVAL_1 = 1,
+    USB_HAL_INTERVAL_2 = 2,
+    USB_HAL_INTERVAL_4 = 4,
+    USB_HAL_INTERVAL_8 = 8,
+    USB_HAL_INTERVAL_16 = 16,
+    USB_HAL_INTERVAL_32 = 32,
+    USB_HAL_INTERVAL_64 = 64,
+} usb_hal_interval_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/usbh_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/usbh_hal.h
new file mode 100644
index 00000000000..5326deb2dca
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/usbh_hal.h
@@ -0,0 +1,790 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+NOTE: Thread safety is the responsibility fo the HAL user. All USB Host HAL
+      functions must be called from critical sections unless specified otherwise
+*/
+
+#include <stdlib.h>
+#include <stddef.h>
+#include "soc/usbh_struct.h"
+#include "hal/usbh_ll.h"
+#include "hal/usb_types_private.h"
+#include "hal/assert.h"
+
+// ------------------------------------------------ Macros and Types ---------------------------------------------------
+
+// ------------------ Constants/Configs --------------------
+
+#define USBH_HAL_DMA_MEM_ALIGN              512
+#define USBH_HAL_FRAME_LIST_MEM_ALIGN       512     //The frame list needs to be 512 bytes aligned (contrary to the databook)
+#define USBH_HAL_NUM_CHAN                   8
+#define USBH_HAL_XFER_DESC_SIZE             (sizeof(usbh_ll_dma_qtd_t))
+#define USBH_HAL_FIFO_TOTAL_USABLE_LINES    200     //Although we have a 256 lines, only 200 lines are usuable due to EPINFO_CTL
+
+/**
+ * @brief FIFO size configuration structure
+ */
+typedef struct {
+    uint32_t rx_fifo_lines;                 /**< Size of the RX FIFO in terms the number of FIFO lines */
+    uint32_t nptx_fifo_lines;               /**< Size of the Non-periodic FIFO in terms the number of FIFO lines */
+    uint32_t ptx_fifo_lines;                /**< Size of the Periodic FIFO in terms the number of FIFO lines */
+} usbh_hal_fifo_config_t;
+
+// --------------------- HAL Events ------------------------
+
+/**
+ * @brief Host port HAL events
+ */
+typedef enum {
+    USBH_HAL_PORT_EVENT_NONE,               /**< No event occurred, or could not decode interrupt */
+    USBH_HAL_PORT_EVENT_CHAN,               /**< A channel event has occurred. Call the the channel event handler instead */
+    USBH_HAL_PORT_EVENT_CONN,               /**< The host port has detected a connection */
+    USBH_HAL_PORT_EVENT_DISCONN,            /**< The host port has been disconnected */
+    USBH_HAL_PORT_EVENT_ENABLED,            /**< The host port has been enabled (i.e., connected to a device that has been reset. Started sending SOFs) */
+    USBH_HAL_PORT_EVENT_DISABLED,           /**< The host port has been disabled (no more SOFs). Could be due to disable/reset request, or a port error (e.g. port babble condition. See 11.8.1 of USB2.0 spec) */
+    USBH_HAL_PORT_EVENT_OVRCUR,             /**< The host port has encountered an overcurrent condition */
+    USBH_HAL_PORT_EVENT_OVRCUR_CLR,         /**< The host port has been cleared of the overcurrent condition */
+} usbh_hal_port_event_t;
+
+/**
+ * @brief Channel events
+ */
+typedef enum {
+    USBH_HAL_CHAN_EVENT_CPLT,               /**< The channel has completed execution of a transfer descriptor that had the USBH_HAL_XFER_DESC_FLAG_HOC flag set. Channel is now halted */
+    USBH_HAL_CHAN_EVENT_ERROR,              /**< The channel has encountered an error. Channel is now halted. */
+    USBH_HAL_CHAN_EVENT_HALT_REQ,           /**< The channel has been successfully halted as requested */
+    USBH_HAL_CHAN_EVENT_NONE,               /**< No event (interrupt ran for internal processing) */
+} usbh_hal_chan_event_t;
+
+// --------------------- HAL Errors ------------------------
+
+/**
+ * @brief Channel errors
+ */
+typedef enum {
+    USBH_HAL_CHAN_ERROR_XCS_XACT = 0,       /**< Excessive (three consecutive) transaction errors (e.g., no response, bad CRC etc */
+    USBH_HAL_CHAN_ERROR_BNA,                /**< Buffer Not Available error (i.e., An inactive transfer descriptor was fetched by the channel) */
+    USBH_HAL_CHAN_ERROR_PKT_BBL,            /**< Packet babbler error (packet exceeded MPS) */
+    USBH_HAL_CHAN_ERROR_STALL,              /**< STALL response received */
+} usbh_hal_chan_error_t;
+
+// ------------- Transfer Descriptor Related ---------------
+
+/**
+ * @brief Flags used to describe the type of transfer descriptor to fill
+ */
+#define USBH_HAL_XFER_DESC_FLAG_IN          0x01    /**< Indicates this transfer descriptor is of the IN direction */
+#define USBH_HAL_XFER_DESC_FLAG_SETUP       0x02    /**< Indicates this transfer descriptor is an OUT setup */
+#define USBH_HAL_XFER_DESC_FLAG_HOC         0x04    /**< Indicates that the channel will be halted after this transfer descriptor completes */
+
+/**
+ * @brief Status value of a transfer descriptor
+ *
+ * A transfer descriptor's status remains unexecuted until the entire transfer descriptor completes (either successfully
+ * or an error). Therefore, if a channel halt is requested before a transfer descriptor completes, the transfer
+ * descriptor remains unexecuted.
+ */
+#define USBH_HAL_XFER_DESC_STS_SUCCESS      USBH_LL_QTD_STATUS_SUCCESS
+#define USBH_HAL_XFER_DESC_STS_PKTERR       USBH_LL_QTD_STATUS_PKTERR
+#define USBH_HAL_XFER_DESC_STS_BUFFER_ERR   USBH_LL_QTD_STATUS_BUFFER
+#define USBH_HAL_XFER_DESC_STS_NOT_EXECUTED USBH_LL_QTD_STATUS_NOT_EXECUTED
+
+// -------------------- Object Types -----------------------
+
+/**
+ * @brief Endpoint characteristics structure
+ */
+typedef struct {
+    union {
+        struct {
+            usb_priv_xfer_type_t type: 2;   /**< The type of endpoint */
+            uint32_t bEndpointAddress: 8;   /**< Endpoint address (containing endpoint number and direction) */
+            uint32_t mps: 11;               /**< Maximum Packet Size */
+            uint32_t dev_addr: 8;           /**< Device Address */
+            uint32_t ls_via_fs_hub: 1;      /**< The endpoint is on a LS device that is routed through an FS hub.
+                                                 Setting this bit will lead to the addition of the PREamble packet */
+            uint32_t reserved2: 2;
+        };
+        uint32_t val;
+    };
+    struct {
+        usb_hal_interval_t interval;        /**< The interval of the endpoint */
+        uint32_t phase_offset_frames;       /**< Phase offset in number of frames */
+    } periodic;     /**< Characteristic for periodic (interrupt/isochronous) endpoints only */
+} usbh_hal_ep_char_t;
+
+/**
+ * @brief Channel object
+ */
+typedef struct {
+    //Channel control, status, and information
+    union {
+        struct {
+            uint32_t active: 1;             /**< Debugging bit to indicate whether channel is enabled */
+            uint32_t halt_requested: 1;     /**< A halt has been requested */
+            uint32_t reserved: 2;
+            uint32_t chan_idx: 4;           /**< The index number of the channel */
+            uint32_t reserved24: 24;
+        };
+        uint32_t val;
+    } flags;                                /**< Flags regarding channel's status and information */
+    usb_host_chan_regs_t *regs;             /**< Pointer to the channel's register set */
+    usbh_hal_chan_error_t error;            /**< The last error that occurred on the channel */
+    usb_priv_xfer_type_t type;              /**< The transfer type of the channel */
+    void *chan_ctx;                         /**< Context variable for the owner of the channel */
+} usbh_hal_chan_t;
+
+/**
+ * @brief HAL context structure
+ */
+typedef struct {
+    //Context
+    usbh_dev_t *dev;                            /**< Pointer to base address of DWC_OTG registers */
+    //Host Port related
+    uint32_t *periodic_frame_list;              /**< Pointer to scheduling frame list */
+    usb_hal_frame_list_len_t frame_list_len;    /**< Length of the periodic scheduling frame list */
+    union {
+        struct {
+            uint32_t dbnc_lock_enabled: 1;      /**< Debounce lock enabled */
+            uint32_t fifo_sizes_set: 1;         /**< Whether the FIFO sizes have been set or not */
+            uint32_t periodic_sched_enabled: 1; /**< Periodic scheduling (for interrupt and isochronous transfers) is enabled */
+            uint32_t reserved: 5;
+            uint32_t reserved24: 24;
+        };
+        uint32_t val;
+    } flags;
+    //Channel related
+    struct {
+        int num_allocd;                             /**< Number of channels currently allocated */
+        uint32_t chan_pend_intrs_msk;               /**< Bit mask of channels with pending interrupts */
+        usbh_hal_chan_t *hdls[USBH_HAL_NUM_CHAN];   /**< Handles of each channel. Set to NULL if channel has not been allocated */
+    } channels;
+} usbh_hal_context_t;
+
+// -------------------------------------------------- Core (Global) ----------------------------------------------------
+
+/**
+ * @brief Initialize the HAL context and check if DWC_OTG is alive
+ *
+ * Entry:
+ * - The peripheral must have been reset and clock un-gated
+ * - The USB PHY (internal or external) and associated GPIOs must already be configured
+ * - GPIO pins configured
+ * - Interrupt allocated but DISABLED (in case of an unknown interupt state)
+ * Exit:
+ * - Checks to see if DWC_OTG is alive, and if HW version/config is correct
+ * - HAl context initialized
+ * - Sets default values to some global and OTG registers (GAHBCFG and GUSBCFG)
+ * - Umask global interrupt signal
+ * - Put DWC_OTG into host mode. Require 25ms delay before this takes effect.
+ * - State -> USBH_HAL_PORT_STATE_OTG
+ * - Interrupts cleared. Users can now enable their ISR
+ *
+ * @param[inout] hal Context of the HAL layer
+ */
+void usbh_hal_init(usbh_hal_context_t *hal);
+
+/**
+ * @brief Deinitialize the HAL context
+ *
+ * Entry:
+ * - All channels must be properly disabled, and any pending events handled
+ * Exit:
+ * - DWC_OTG global interrupt disabled
+ * - HAL context deinitialized
+ *
+ * @param hal Context of the HAL layer
+ */
+void usbh_hal_deinit(usbh_hal_context_t *hal);
+
+/**
+ * @brief Issue a soft reset to the controller
+ *
+ * This should be called when the host port encounters an error event or has been disconnected. Before calling this,
+ * users are responsible for safely freeing all channels as a soft reset will wipe all host port and channel registers.
+ * This function will result in the host port being put back into same state as after calling usbh_hal_init().
+ *
+ * @note This has nothing to do with a USB bus reset. It simply resets the peripheral
+ *
+ * @param hal Context of the HAL layer
+ */
+void usbh_hal_core_soft_reset(usbh_hal_context_t *hal);
+
+/**
+ * @brief Set FIFO sizes
+ *
+ * This function will set the sizes of each of the FIFOs (RX FIFO, Non-periodic TX FIFO, Periodic TX FIFO) and must be
+ * called at least once before allocating the channel. Based on the type of endpoints (and the endpionts' MPS), there
+ * may be situations where this function may need to be called again to resize the FIFOs. If resizing FIFOs dynamically,
+ * it is the user's responsibility to ensure there are no active channels when this function is called.
+ *
+ * @note The totol size of all the FIFOs must be less than or equal to USBH_HAL_FIFO_TOTAL_USABLE_LINES
+ * @note After a port reset, the FIFO size registers will reset to their default values, so this function must be called
+ *       again post reset.
+ *
+ * @param hal Context of the HAL layer
+ * @param fifo_config FIFO configuration
+ */
+void usbh_hal_set_fifo_size(usbh_hal_context_t *hal, const usbh_hal_fifo_config_t *fifo_config);
+
+// ---------------------------------------------------- Host Port ------------------------------------------------------
+
+// ------------------ Host Port Control --------------------
+
+/**
+ * @brief Initialize the host port
+ *
+ * - Will enable the host port's interrupts allowing port and channel events to occur
+ *
+ * @param hal Context of the HAL layer
+ */
+static inline void usbh_hal_port_init(usbh_hal_context_t *hal)
+{
+    //Configure Host related interrupts
+    usbh_ll_haintmsk_dis_chan_intr(hal->dev, 0xFFFFFFFF);   //Disable interrupts for all channels
+    usb_ll_en_intrs(hal->dev, USB_LL_INTR_CORE_PRTINT | USB_LL_INTR_CORE_HCHINT);
+}
+
+/**
+ * @brief Deinitialize the host port
+ *
+ * - Will disable the host port's interrupts preventing further port aand channel events from ocurring
+ *
+ * @param hal Context of the HAL layer
+ */
+static inline void usbh_hal_port_deinit(usbh_hal_context_t *hal)
+{
+    //Disable Host port and channel interrupts
+    usb_ll_dis_intrs(hal->dev, USB_LL_INTR_CORE_PRTINT | USB_LL_INTR_CORE_HCHINT);
+}
+
+/**
+ * @brief Toggle the host port's power
+ *
+ * @param hal Context of the HAL layer
+ * @param power_on Whether to power ON or OFF the port
+ */
+static inline void usbh_hal_port_toggle_power(usbh_hal_context_t *hal, bool power_on)
+{
+    if (power_on) {
+        usbh_ll_hprt_en_pwr(hal->dev);
+    } else {
+        usbh_ll_hprt_dis_pwr(hal->dev);
+    }
+}
+
+/**
+ * @brief Toggle reset signal on the bus
+ *
+ * The reset signal should be held for at least 10ms
+ * Entry:
+ * - Host port detects a device connection or Host port is already enabled
+ * Exit:
+ * - On release of the reset signal, a USBH_HAL_PORT_EVENT_ENABLED will be generated
+ *
+ * @note If the host port is already enabled, then issuing a reset will cause it be disabled and generate a
+ *       USBH_HAL_PORT_EVENT_DISABLED event. The host port will not be enabled until the reset signal is released (thus
+ *       generating the USBH_HAL_PORT_EVENT_ENABLED event)
+ *
+ * @param hal Context of the HAL layer
+ * @param enable Enable/disable reset signal
+ */
+static inline void usbh_hal_port_toggle_reset(usbh_hal_context_t *hal, bool enable)
+{
+    HAL_ASSERT(hal->channels.num_allocd == 0);  //Cannot reset if there are still allocated channels
+    usbh_ll_hprt_set_port_reset(hal->dev, enable);
+}
+
+/**
+ * @brief Enable the host port
+ *
+ * Entry:
+ * - Host port enabled event triggered following a reset
+ * Exit:
+ * - Host port enabled to operate in scatter/gather DMA mode
+ * - DMA fifo sizes configured
+ *
+ * @param hal Context of the HAL layer
+ */
+void usbh_hal_port_enable(usbh_hal_context_t *hal);
+
+/**
+ * @brief Disable the host port
+ *
+ * Exit:
+ * - Host port disabled event triggered
+ *
+ * @param hal Context of the HAL layer
+ */
+static inline void usbh_hal_port_disable(usbh_hal_context_t *hal)
+{
+    usbh_ll_hprt_port_dis(hal->dev);
+}
+
+/**
+ * @brief Suspend the host port
+ *
+ * @param hal Context of the HAL layers
+ */
+static inline void usbh_hal_port_suspend(usbh_hal_context_t *hal)
+{
+    usbh_ll_hprt_set_port_suspend(hal->dev);
+}
+
+/**
+ * @brief Toggle resume signal on the bus
+ *
+ * Hosts should hold the resume signal for at least 20ms
+ *
+ * @note If a remote wakeup event occurs, the resume signal is driven and cleared automatically.
+ *
+ * @param hal Context of the HAL layer
+ * @param enable Enable/disable resume signal
+ */
+static inline void usbh_hal_port_toggle_resume(usbh_hal_context_t *hal, bool enable)
+{
+    if (enable) {
+        usbh_ll_hprt_set_port_resume(hal->dev);
+    } else {
+        usbh_ll_hprt_clr_port_resume(hal->dev);
+    }
+}
+
+/**
+ * @brief Check whether the resume signal is being driven
+ *
+ * If a remote wakeup event occurs, the core will automatically drive and clear the resume signal for the required
+ * amount of time. Call this function to check whether the resume signal has completed.
+ *
+ * @param hal Context of the HAL layer
+ * @return true Resume signal is still being driven
+ * @return false Resume signal is no longer driven
+ */
+static inline bool usbh_hal_port_check_resume(usbh_hal_context_t *hal)
+{
+    return usbh_ll_hprt_get_port_resume(hal->dev);
+}
+
+// ---------------- Host Port Scheduling -------------------
+
+/**
+ * @brief Sets the periodic scheduling frame list
+ *
+ * @note This function must be called before attempting configuring any channels to be period via
+ *       usbh_hal_chan_set_ep_char()
+ *
+ * @param hal Context of the HAL layer
+ * @param frame_list Base address of the frame list
+ * @param frame_list_len Number of entries in the frame list (can only be 8, 16, 32, 64)
+ */
+static inline void usbh_hal_port_set_frame_list(usbh_hal_context_t *hal, uint32_t *frame_list, usb_hal_frame_list_len_t len)
+{
+    //Clear and save frame list
+    hal->periodic_frame_list = frame_list;
+    hal->frame_list_len = len;
+}
+
+/**
+ * @brief Get the pointer to the periodic scheduling frame list
+ *
+ * @param hal Context of the HAL layer
+ * @return uint32_t* Base address of the periodic scheduling frame list
+ */
+static inline uint32_t *usbh_hal_port_get_frame_list(usbh_hal_context_t *hal)
+{
+    return hal->periodic_frame_list;
+}
+
+/**
+ * @brief Enable periodic scheduling
+ *
+ * @note The periodic frame list must be set via usbh_hal_port_set_frame_list() should be set before calling this
+ *       function
+ * @note This function must be called before activating any periodic channels
+ *
+ * @param hal Context of the HAL layer
+ */
+static inline void usbh_hal_port_periodic_enable(usbh_hal_context_t *hal)
+{
+    HAL_ASSERT(hal->periodic_frame_list != NULL);
+    usbh_ll_set_frame_list_base_addr(hal->dev, (uint32_t)hal->periodic_frame_list);
+    usbh_ll_hcfg_set_num_frame_list_entries(hal->dev, hal->frame_list_len);
+    usbh_ll_hcfg_en_perio_sched(hal->dev);
+    hal->flags.periodic_sched_enabled = 1;
+}
+
+/**
+ * @brief Disable periodic scheduling
+ *
+ * Disabling periodic scheduling will save a bit of DMA bandwith (as the controller will no longer fetch the schedule
+ * from the frame list).
+ *
+ * @note Before disabling periodic scheduling, it is the user's responsibility to ensure that all periodic channels have
+ *       halted safely.
+ *
+ * @param hal Context of the HAL layer
+ */
+static inline void usbh_hal_port_periodic_disable(usbh_hal_context_t *hal)
+{
+    HAL_ASSERT(hal->flags.periodic_sched_enabled);
+    usbh_ll_hcfg_dis_perio_sched(hal->dev);
+    hal->flags.periodic_sched_enabled = 0;
+}
+
+static inline uint32_t usbh_hal_port_get_cur_frame_num(usbh_hal_context_t *hal)
+{
+    return usbh_ll_get_frm_num(hal->dev);
+}
+
+// --------------- Host Port Status/State ------------------
+
+/**
+ * @brief Check if a device is currently connected to the host port
+ *
+ * This function is intended to be called after one of the following events followed by an adequate debounce delay
+ * - USBH_HAL_PORT_EVENT_CONN
+ * - USBH_HAL_PORT_EVENT_DISCONN
+ *
+ * @note No other connection/disconnection event will occur again until the debounce lock is disabled via
+ *       usbh_hal_disable_debounce_lock()
+ *
+ * @param hal Context of the HAL layer
+ * @return true A device is connected to the host port
+ * @return false A device is not connected to the host port
+ */
+static inline bool usbh_hal_port_check_if_connected(usbh_hal_context_t *hal)
+{
+    return usbh_ll_hprt_get_conn_status(hal->dev);
+}
+
+/**
+ * @brief Check the speed (LS/FS) of the device connected to the host port
+ *
+ * @note This function should only be called after confirming that a device is connected to the host port
+ *
+ * @param hal Context of the HAL layer
+ * @return usb_priv_speed_t Speed of the connected device (FS or LS only on the esp32-s2 and esp32-s3)
+ */
+static inline usb_priv_speed_t usbh_hal_port_get_conn_speed(usbh_hal_context_t *hal)
+{
+    return usbh_ll_hprt_get_speed(hal->dev);
+}
+
+/**
+ * @brief Disable the debounce lock
+ *
+ * This function must be called after calling usbh_hal_port_check_if_connected() and will allow connection/disconnection
+ * events to occur again. Any pending connection or disconenction interrupts are cleared.
+ *
+ * @param hal Context of the HAL layer
+ */
+static inline void usbh_hal_disable_debounce_lock(usbh_hal_context_t *hal)
+{
+    hal->flags.dbnc_lock_enabled = 0;
+    //Clear Conenction and disconenction interrupt in case it triggered again
+    usb_ll_intr_clear(hal->dev, USB_LL_INTR_CORE_DISCONNINT);
+    usbh_ll_hprt_intr_clear(hal->dev, USBH_LL_INTR_HPRT_PRTCONNDET);
+    //Reenable the hprt (connection) and disconnection interrupts
+    usb_ll_en_intrs(hal->dev, USB_LL_INTR_CORE_PRTINT | USB_LL_INTR_CORE_DISCONNINT);
+}
+
+// ----------------------------------------------------- Channel -------------------------------------------------------
+
+// ----------------- Channel Allocation --------------------
+
+/**
+ * @brief Allocate a channel
+ *
+ * @param[in] hal Context of the HAL layer
+ * @param[inout] chan_obj Empty channel object
+ * @param[in] chan_ctx Context variable for the allocator of the channel
+ * @return true Channel successfully allocated
+ * @return false Failed to allocate channel
+ */
+bool usbh_hal_chan_alloc(usbh_hal_context_t *hal, usbh_hal_chan_t *chan_obj, void *chan_ctx);
+
+/**
+ * @brief Free a channel
+ *
+ * @param[in] hal Context of the HAL layer
+ * @param[in] chan_obj Channel object
+ */
+void usbh_hal_chan_free(usbh_hal_context_t *hal, usbh_hal_chan_t *chan_obj);
+
+// ---------------- Channel Configuration ------------------
+
+/**
+ * @brief Get the context variable of the channel
+ *
+ * @param[in] chan_obj Channel object
+ * @return void* The context variable of the channel
+ */
+static inline void *usbh_hal_chan_get_context(usbh_hal_chan_t *chan_obj)
+{
+    return chan_obj->chan_ctx;
+}
+
+/**
+ * @brief Set the endpoint information for a particular channel
+ *
+ * This should be called when a channel switches target from one EP to another
+ *
+ * @note the channel must be in the disabled state in order to change its EP
+ *       information
+ *
+ * @param hal Context of the HAL layer
+ * @param chan_obj Channel object
+ * @param ep_char Endpoint characteristics
+ */
+void usbh_hal_chan_set_ep_char(usbh_hal_context_t *hal, usbh_hal_chan_t *chan_obj, usbh_hal_ep_char_t *ep_char);
+
+/**
+ * @brief Set the direction of the channel
+ *
+ * This is a convenience function to flip the direction of a channel without
+ * needing to reconfigure all of the channel's EP info. This is used primarily
+ * for control transfers.
+ *
+ * @note This function should only be called when the channel is halted
+ *
+ * @param chan_obj Channel object
+ * @param is_in Whether the direction is IN
+ */
+static inline void usbh_hal_chan_set_dir(usbh_hal_chan_t *chan_obj, bool is_in)
+{
+    //Cannot change direction whilst channel is still active or in error
+    HAL_ASSERT(!chan_obj->flags.active);
+    usbh_ll_chan_set_dir(chan_obj->regs, is_in);
+}
+
+/**
+ * @brief Set the next Packet ID of the channel (e.g., DATA0/DATA1)
+ *
+ * This should be called when a channel switches target from one EP to another
+ * or when change stages for a control transfer
+ *
+ * @note The channel should only be called when the channel is in the
+ *       halted state.
+ *
+ * @param chan_obj Channel object
+ * @param pid PID of the next DATA packet (DATA0 or DATA1)
+ */
+static inline void usbh_hal_chan_set_pid(usbh_hal_chan_t *chan_obj, int pid)
+{
+    //Cannot change pid whilst channel is still active or in error
+    HAL_ASSERT(!chan_obj->flags.active);
+    //Update channel object and set the register
+    usbh_ll_chan_set_pid(chan_obj->regs, pid);
+}
+
+/**
+ * @brief Get the next PID of a channel
+ *
+ * Returns the next PID (DATA0 or DATA1) of the channel. This function should be
+ * used when the next PID of a pipe needs to be saved (e.g., when switching pipes
+ * on a channel)
+ *
+ * @param chan_obj Channel object
+ * @return uint32_t Starting PID of the next transfer (DATA0 or DATA1)
+ */
+static inline uint32_t usbh_hal_chan_get_pid(usbh_hal_chan_t *chan_obj)
+{
+    HAL_ASSERT(!chan_obj->flags.active);
+    return usbh_ll_chan_get_pid(chan_obj->regs);
+}
+
+// ------------------- Channel Control ---------------------
+
+/**
+ * @brief Activate a channel
+ *
+ * Activating a channel will cause the channel to start executing transfer descriptors.
+ *
+ * @note This function should only be called on channels that were previously halted
+ * @note An event will be generated when the channel is halted
+ *
+ * @param chan_obj Channel object
+ * @param xfer_desc_list A filled transfer descriptor list
+ * @param desc_list_len Transfer descriptor list length
+ * @param start_idx Index of the starting transfer descriptor in the list
+ */
+void usbh_hal_chan_activate(usbh_hal_chan_t *chan_obj, void *xfer_desc_list, int desc_list_len, int start_idx);
+
+/**
+ * @brief Get the index of the current transfer descriptor
+ *
+ * @param chan_obj Channel object
+ * @return int Descriptor index
+ */
+static inline int usbh_hal_chan_get_qtd_idx(usbh_hal_chan_t *chan_obj)
+{
+    return usbh_ll_chan_get_ctd(chan_obj->regs);
+}
+
+/**
+ * @brief Request to halt a channel
+ *
+ * This function should be called in order to halt a channel. If the channel is already halted, this function will
+ * return true. If the channel is still active, this function will return false and users must wait for the
+ * USBH_HAL_CHAN_EVENT_HALT_REQ event before treating the channel as halted.
+ *
+ * @note When a transfer is in progress (i.e., the channel is active) and a halt is requested, the channel will halt
+ *       after the next USB packet is completed. If the transfer has more pending packets, the transfer will just be
+ *       marked as USBH_HAL_XFER_DESC_STS_NOT_EXECUTED.
+ *
+ * @param chan_obj Channel object
+ * @return true The channel is already halted
+ * @return false The halt was requested, wait for USBH_HAL_CHAN_EVENT_HALT_REQ
+ */
+bool usbh_hal_chan_request_halt(usbh_hal_chan_t *chan_obj);
+
+/**
+ * @brief Indicate that a channel is halted after a port error
+ *
+ * When a port error occurs (e.g., discconect, overcurrent):
+ * - Any previously active channels will remain active (i.e., they will not receive a channel interrupt)
+ * - Attempting to disable them using usbh_hal_chan_request_halt() will NOT generate an interrupt for ISOC channels
+ *   (probalby something to do with the periodic scheduling)
+ *
+ * However, the channel's enable bit can be left as 1 since after a port error, a soft reset will be done anyways.
+ * This function simply updates the channels internal state variable to indicate it is halted (thus allowing it to be
+ * freed).
+ *
+ * @param chan_obj Channel object
+ */
+static inline void usbh_hal_chan_mark_halted(usbh_hal_chan_t *chan_obj)
+{
+    chan_obj->flags.active = 0;
+}
+
+/**
+ * @brief Get a channel's error
+ *
+ * @param chan_obj Channel object
+ * @return usbh_hal_chan_error_t The type of error the channel has encountered
+ */
+static inline usbh_hal_chan_error_t usbh_hal_chan_get_error(usbh_hal_chan_t *chan_obj)
+{
+    return chan_obj->error;
+}
+
+// -------------------------------------------- Transfer Descriptor List -----------------------------------------------
+
+/**
+ * @brief Fill a single entry in a transfer descriptor list
+ *
+ * - Depending on the transfer type, a single transfer descriptor may corresponds
+ *      - A stage of a transfer (for control transfers)
+ *      - A frame of a transfer interval (for interrupt and isoc)
+ *      - An entire transfer (for bulk transfers)
+ * - Check the various USBH_HAL_XFER_DESC_FLAG_ flags for filling a specific type of descriptor
+ * - For IN transfer entries, set the USBH_HAL_XFER_DESC_FLAG_IN. The transfer size must also be an integer multiple of
+ *   the endpoint's MPS
+ *
+ * @note Critical section is not required for this function
+ *
+ * @param desc_list Transfer descriptor list
+ * @param desc_idx Transfer descriptor index
+ * @param xfer_data_buff Transfer data buffer
+ * @param xfer_len Transfer length
+ * @param flags Transfer flags
+ */
+static inline void usbh_hal_xfer_desc_fill(void *desc_list, uint32_t desc_idx, uint8_t *xfer_data_buff, int xfer_len, uint32_t flags)
+{
+    usbh_ll_dma_qtd_t *qtd_list = (usbh_ll_dma_qtd_t *)desc_list;
+    if (flags & USBH_HAL_XFER_DESC_FLAG_IN) {
+        usbh_ll_set_qtd_in(&qtd_list[desc_idx],
+                           xfer_data_buff, xfer_len,
+                           flags & USBH_HAL_XFER_DESC_FLAG_HOC);
+    } else {
+        usbh_ll_set_qtd_out(&qtd_list[desc_idx],
+                            xfer_data_buff,
+                            xfer_len,
+                            flags & USBH_HAL_XFER_DESC_FLAG_HOC,
+                            flags & USBH_HAL_XFER_DESC_FLAG_SETUP);
+    }
+}
+
+/**
+ * @brief Clear a transfer descriptor (sets all its fields to NULL)
+ *
+ * @param desc_list Transfer descriptor list
+ * @param desc_idx Transfer descriptor index
+ */
+static inline void usbh_hal_xfer_desc_clear(void *desc_list, uint32_t desc_idx)
+{
+    usbh_ll_dma_qtd_t *qtd_list = (usbh_ll_dma_qtd_t *)desc_list;
+    usbh_ll_set_qtd_null(&qtd_list[desc_idx]);
+}
+
+/**
+ * @brief Parse a transfer decriptor's results
+ *
+ * @param desc_list Transfer descriptor list
+ * @param desc_idx Transfer descriptor index
+ * @param[out] xfer_rem_len Remaining length of the transfer in bytes
+ * @param[out] xfer_status Status of the transfer
+ *
+ * @note Critical section is not required for this function
+ */
+static inline void usbh_hal_xfer_desc_parse(void *desc_list, uint32_t desc_idx, int *xfer_rem_len, int *xfer_status)
+{
+    usbh_ll_dma_qtd_t *qtd_list = (usbh_ll_dma_qtd_t *)desc_list;
+    usbh_ll_get_qtd_status(&qtd_list[desc_idx], xfer_rem_len, xfer_status);
+    //Clear the QTD to prevent it from being read again
+    usbh_ll_set_qtd_null(&qtd_list[desc_idx]);
+}
+
+// ------------------------------------------------- Event Handling ----------------------------------------------------
+
+/**
+ * @brief Decode global and host port interrupts
+ *
+ * - Reads and clears global and host port interrupt registers
+ * - Decodes the interrupt bits to determine what host port event occurred
+ *
+ * @note This should be the first interrupt decode function to be run
+ *
+ * @param hal Context of the HAL layer
+ * @return usbh_hal_port_event_t Host port event
+ */
+usbh_hal_port_event_t usbh_hal_decode_intr(usbh_hal_context_t *hal);
+
+/**
+ * @brief Gets the next channel with a pending interrupt
+ *
+ * If no channel is pending an interrupt, this function will return NULL. If one or more channels are pending an
+ * interrupt, this function returns one of the channel's objects. Call this function repeatedly until it returns NULL.
+ *
+ * @param hal Context of the HAL layer
+ * @return usbh_hal_chan_t* Channel object. NULL if no channel are pending an interrupt.
+ */
+usbh_hal_chan_t *usbh_hal_get_chan_pending_intr(usbh_hal_context_t *hal);
+
+/**
+ * @brief Decode a particular channel's interrupt
+ *
+ * - Reads and clears the interrupt register of the channel
+ * - Returns the corresponding event for that channel
+ *
+ * @param chan_obj Channel object
+ * @note If the host port has an error (e.g., a sudden disconnect or an port error), any active channels will not
+ *       receive an interrupt. Each active channel must be manually halted.
+ * @return usbh_hal_chan_event_t Channel event
+ */
+usbh_hal_chan_event_t usbh_hal_chan_decode_intr(usbh_hal_chan_t *chan_obj);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/usbh_ll.h b/tools/sdk/esp32s3/include/hal/include/hal/usbh_ll.h
new file mode 100644
index 00000000000..4320ead0a3b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/usbh_ll.h
@@ -0,0 +1,930 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/usbh_struct.h"
+#include "hal/usb_types_private.h"
+#include "hal/misc.h"
+
+
+/* -----------------------------------------------------------------------------
+------------------------------- Global Registers -------------------------------
+----------------------------------------------------------------------------- */
+
+/*
+ * Interrupt bit masks of the GINTSTS and GINTMSK registers
+ */
+#define USB_LL_INTR_CORE_WKUPINT        (1 << 31)
+#define USB_LL_INTR_CORE_SESSREQINT     (1 << 30)
+#define USB_LL_INTR_CORE_DISCONNINT     (1 << 29)
+#define USB_LL_INTR_CORE_CONIDSTSCHNG   (1 << 28)
+#define USB_LL_INTR_CORE_PTXFEMP        (1 << 26)
+#define USB_LL_INTR_CORE_HCHINT         (1 << 25)
+#define USB_LL_INTR_CORE_PRTINT         (1 << 24)
+#define USB_LL_INTR_CORE_RESETDET       (1 << 23)
+#define USB_LL_INTR_CORE_FETSUSP        (1 << 22)
+#define USB_LL_INTR_CORE_INCOMPIP       (1 << 21)
+#define USB_LL_INTR_CORE_INCOMPISOIN    (1 << 20)
+#define USB_LL_INTR_CORE_OEPINT         (1 << 19)
+#define USB_LL_INTR_CORE_IEPINT         (1 << 18)
+#define USB_LL_INTR_CORE_EPMIS          (1 << 17)
+#define USB_LL_INTR_CORE_EOPF           (1 << 15)
+#define USB_LL_INTR_CORE_ISOOUTDROP     (1 << 14)
+#define USB_LL_INTR_CORE_ENUMDONE       (1 << 13)
+#define USB_LL_INTR_CORE_USBRST         (1 << 12)
+#define USB_LL_INTR_CORE_USBSUSP        (1 << 11)
+#define USB_LL_INTR_CORE_ERLYSUSP       (1 << 10)
+#define USB_LL_INTR_CORE_GOUTNAKEFF     (1 << 7)
+#define USB_LL_INTR_CORE_GINNAKEFF      (1 << 6)
+#define USB_LL_INTR_CORE_NPTXFEMP       (1 << 5)
+#define USB_LL_INTR_CORE_RXFLVL         (1 << 4)
+#define USB_LL_INTR_CORE_SOF            (1 << 3)
+#define USB_LL_INTR_CORE_OTGINT         (1 << 2)
+#define USB_LL_INTR_CORE_MODEMIS        (1 << 1)
+#define USB_LL_INTR_CORE_CURMOD         (1 << 0)
+
+/*
+ * Bit mask of interrupt generating bits of the the HPRT register. These bits
+ * are ORd into the USB_LL_INTR_CORE_PRTINT interrupt.
+ *
+ * Note: Some fields of the HPRT are W1C (write 1 clear), this we cannot do a
+ * simple read and write-back to clear the HPRT interrupt bits. Instead we need
+ * a W1C mask the non-interrupt related bits
+ */
+#define USBH_LL_HPRT_W1C_MSK                (0x2E)
+#define USBH_LL_HPRT_ENA_MSK                (0x04)
+#define USBH_LL_INTR_HPRT_PRTOVRCURRCHNG    (1 << 5)
+#define USBH_LL_INTR_HPRT_PRTENCHNG         (1 << 3)
+#define USBH_LL_INTR_HPRT_PRTCONNDET        (1 << 1)
+
+/*
+ * Bit mask of channel interrupts (HCINTi and HCINTMSKi registers)
+ *
+ * Note: Under Scatter/Gather DMA mode, only the following interrupts can be unmasked
+ * - DESC_LS_ROLL
+ * - XCS_XACT_ERR (always unmasked)
+ * - BNAINTR
+ * - CHHLTD
+ * - XFERCOMPL
+ * The remaining interrupt bits will still be set (when the corresponding event occurs)
+ * but will not generate an interrupt. Therefore we must proxy through the
+ * USBH_LL_INTR_CHAN_CHHLTD interrupt to check the other interrupt bits.
+ */
+#define USBH_LL_INTR_CHAN_DESC_LS_ROLL      (1 << 13)
+#define USBH_LL_INTR_CHAN_XCS_XACT_ERR      (1 << 12)
+#define USBH_LL_INTR_CHAN_BNAINTR           (1 << 11)
+#define USBH_LL_INTR_CHAN_DATATGLERR        (1 << 10)
+#define USBH_LL_INTR_CHAN_FRMOVRUN          (1 << 9)
+#define USBH_LL_INTR_CHAN_BBLEER            (1 << 8)
+#define USBH_LL_INTR_CHAN_XACTERR           (1 << 7)
+#define USBH_LL_INTR_CHAN_NYET              (1 << 6)
+#define USBH_LL_INTR_CHAN_ACK               (1 << 5)
+#define USBH_LL_INTR_CHAN_NAK               (1 << 4)
+#define USBH_LL_INTR_CHAN_STALL             (1 << 3)
+#define USBH_LL_INTR_CHAN_AHBERR            (1 << 2)
+#define USBH_LL_INTR_CHAN_CHHLTD            (1 << 1)
+#define USBH_LL_INTR_CHAN_XFERCOMPL         (1 << 0)
+
+/*
+ * QTD (Queue Transfer Descriptor) structure used in Scatter/Gather DMA mode.
+ * Each QTD describes one transfer. Scatter gather mode will automatically split
+ * a transfer into multiple MPS packets. Each QTD is 64bits in size
+ *
+ * Note: The status information part of the QTD is interpreted differently depending
+ * on IN or OUT, and ISO or non-ISO
+ */
+typedef struct {
+    union {
+        struct {
+            uint32_t xfer_size: 17;
+            uint32_t aqtd_offset: 6;
+            uint32_t aqtd_valid: 1;
+            uint32_t reserved_24: 1;
+            uint32_t intr_cplt: 1;
+            uint32_t eol: 1;
+            uint32_t reserved_27: 1;
+            uint32_t rx_status: 2;
+            uint32_t reserved_30: 1;
+            uint32_t active: 1;
+        } in_non_iso;
+        struct {
+            uint32_t xfer_size: 12;
+            uint32_t reserved_12_24: 13;
+            uint32_t intr_cplt: 1;
+            uint32_t reserved_26_27: 2;
+            uint32_t rx_status: 2;
+            uint32_t reserved_30: 1;
+            uint32_t active: 1;
+        } in_iso;
+        struct {
+            uint32_t xfer_size: 17;
+            uint32_t reserved_17_23: 7;
+            uint32_t is_setup: 1;
+            uint32_t intr_cplt: 1;
+            uint32_t eol: 1;
+            uint32_t reserved_27: 1;
+            uint32_t tx_status: 2;
+            uint32_t reserved_30: 1;
+            uint32_t active: 1;
+        } out_non_iso;
+        struct {
+            uint32_t xfer_size: 12;
+            uint32_t reserved_12_24: 13;
+            uint32_t intr_cplt: 1;
+            uint32_t eol: 1;
+            uint32_t reserved_27: 1;
+            uint32_t tx_status: 2;
+            uint32_t reserved_30: 1;
+            uint32_t active: 1;
+        } out_iso;
+        uint32_t buffer_status_val;
+    };
+    uint8_t *buffer;
+} usbh_ll_dma_qtd_t;
+
+
+/* -----------------------------------------------------------------------------
+------------------------------- Global Registers -------------------------------
+----------------------------------------------------------------------------- */
+
+// --------------------------- GAHBCFG Register --------------------------------
+
+static inline void usb_ll_en_dma_mode(usbh_dev_t *hw)
+{
+    hw->gahbcfg_reg.dmaen = 1;
+}
+
+static inline void usb_ll_en_slave_mode(usbh_dev_t *hw)
+{
+    hw->gahbcfg_reg.dmaen = 0;
+}
+
+static inline void usb_ll_set_hbstlen(usbh_dev_t *hw, uint32_t burst_len)
+{
+    hw->gahbcfg_reg.hbstlen = burst_len;
+}
+
+static inline void usb_ll_en_global_intr(usbh_dev_t *hw)
+{
+    hw->gahbcfg_reg.glbllntrmsk = 1;
+}
+
+static inline void usb_ll_dis_global_intr(usbh_dev_t *hw)
+{
+    hw->gahbcfg_reg.glbllntrmsk = 0;
+}
+
+// --------------------------- GUSBCFG Register --------------------------------
+
+static inline void usb_ll_set_host_mode(usbh_dev_t *hw)
+{
+    hw->gusbcfg_reg.forcehstmode = 1;
+}
+
+static inline void usb_ll_dis_hnp_cap(usbh_dev_t *hw)
+{
+    hw->gusbcfg_reg.hnpcap = 0;
+}
+
+static inline void usb_ll_dis_srp_cap(usbh_dev_t *hw)
+{
+    hw->gusbcfg_reg.srpcap = 0;
+}
+
+// --------------------------- GRSTCTL Register --------------------------------
+
+static inline bool usb_ll_check_ahb_idle(usbh_dev_t *hw)
+{
+    return hw->grstctl_reg.ahbidle;
+}
+
+static inline bool usb_ll_check_dma_req_in_progress(usbh_dev_t *hw)
+{
+    return hw->grstctl_reg.dmareq;
+}
+
+static inline void usb_ll_flush_nptx_fifo(usbh_dev_t *hw)
+{
+    hw->grstctl_reg.txfnum = 0;     //Set the TX FIFO number to 0 to select the non-periodic TX FIFO
+    hw->grstctl_reg.txfflsh = 1;    //Flush the selected TX FIFO
+    //Wait for the flushing to complete
+    while (hw->grstctl_reg.txfflsh) {
+        ;
+    }
+}
+
+static inline void usb_ll_flush_ptx_fifo(usbh_dev_t *hw)
+{
+    hw->grstctl_reg.txfnum = 1;     //Set the TX FIFO number to 1 to select the periodic TX FIFO
+    hw->grstctl_reg.txfflsh = 1;    //FLush the select TX FIFO
+    //Wait for the flushing to complete
+    while (hw->grstctl_reg.txfflsh) {
+        ;
+    }
+}
+
+static inline void usb_ll_flush_rx_fifo(usbh_dev_t *hw)
+{
+    hw->grstctl_reg.rxfflsh = 1;
+    //Wait for the flushing to complete
+    while (hw->grstctl_reg.rxfflsh) {
+        ;
+    }
+}
+
+static inline void usb_ll_reset_frame_counter(usbh_dev_t *hw)
+{
+    hw->grstctl_reg.frmcntrrst = 1;
+}
+
+static inline void usb_ll_core_soft_reset(usbh_dev_t *hw)
+{
+    hw->grstctl_reg.csftrst = 1;
+}
+
+static inline bool usb_ll_check_core_soft_reset(usbh_dev_t *hw)
+{
+    return hw->grstctl_reg.csftrst;
+}
+
+// --------------------------- GINTSTS Register --------------------------------
+
+/**
+ * @brief Reads and clears the global interrupt register
+ *
+ * @param hw Start address of the DWC_OTG registers
+ * @return uint32_t Mask of interrupts
+ */
+static inline uint32_t usb_ll_intr_read_and_clear(usbh_dev_t *hw)
+{
+    usb_gintsts_reg_t gintsts;
+    gintsts.val = hw->gintsts_reg.val;
+    hw->gintsts_reg.val = gintsts.val;  //Write back to clear
+    return gintsts.val;
+}
+
+/**
+ * @brief Clear specific interrupts
+ *
+ * @param hw Start address of the DWC_OTG registers
+ * @param intr_msk Mask of interrupts to clear
+ */
+static inline void usb_ll_intr_clear(usbh_dev_t *hw, uint32_t intr_msk)
+{
+    //All GINTSTS fields are either W1C or read only. So safe to write directly
+    hw->gintsts_reg.val = intr_msk;
+}
+
+// --------------------------- GINTMSK Register --------------------------------
+
+static inline void usb_ll_en_intrs(usbh_dev_t *hw, uint32_t intr_mask)
+{
+    hw->gintmsk_reg.val |= intr_mask;
+}
+
+static inline void usb_ll_dis_intrs(usbh_dev_t *hw, uint32_t intr_mask)
+{
+    hw->gintmsk_reg.val &= ~intr_mask;
+}
+
+// --------------------------- GRXFSIZ Register --------------------------------
+
+static inline void usb_ll_set_rx_fifo_size(usbh_dev_t *hw, uint32_t num_lines)
+{
+    //Set size in words
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->grxfsiz_reg, rxfdep, num_lines);
+}
+
+// -------------------------- GNPTXFSIZ Register -------------------------------
+
+static inline void usb_ll_set_nptx_fifo_size(usbh_dev_t *hw, uint32_t addr, uint32_t num_lines)
+{
+    usb_gnptxfsiz_reg_t gnptxfsiz;
+    gnptxfsiz.val = hw->gnptxfsiz_reg.val;
+    HAL_FORCE_MODIFY_U32_REG_FIELD(gnptxfsiz, nptxfstaddr, addr);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(gnptxfsiz, nptxfdep, num_lines);
+    hw->gnptxfsiz_reg.val = gnptxfsiz.val;
+}
+
+static inline uint32_t usb_ll_get_controller_core_id(usbh_dev_t *hw)
+{
+    return hw->gsnpsid_reg.val;
+}
+
+/**
+ * @brief Get the hardware configuration regiters of the DWC_OTG controller
+ *
+ * The hardware configuraiton regitsers are read only and indicate the various
+ * features of the DWC_OTG core.
+ *
+ * @param hw Start address of the DWC_OTG registers
+ * @param[out] ghwcfg1 Hardware configuration registesr 1
+ * @param[out] ghwcfg2 Hardware configuration registesr 2
+ * @param[out] ghwcfg3 Hardware configuration registesr 3
+ * @param[out] ghwcfg4 Hardware configuration registesr 4
+ */
+static inline void usb_ll_get_hardware_config(usbh_dev_t *hw, uint32_t *ghwcfg1, uint32_t *ghwcfg2, uint32_t *ghwcfg3, uint32_t *ghwcfg4)
+{
+    *ghwcfg1 = hw->ghwcfg1_reg.val;
+    *ghwcfg2 = hw->ghwcfg2_reg.val;
+    *ghwcfg3 = hw->ghwcfg3_reg.val;
+    *ghwcfg4 = hw->ghwcfg4_reg.val;
+}
+
+// --------------------------- HPTXFSIZ Register -------------------------------
+
+static inline void usbh_ll_set_ptx_fifo_size(usbh_dev_t *hw, uint32_t addr, uint32_t num_lines)
+{
+    usb_hptxfsiz_reg_t hptxfsiz;
+    hptxfsiz.val = hw->hptxfsiz_reg.val;
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hptxfsiz, ptxfstaddr, addr);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hptxfsiz, ptxfsize, num_lines);
+    hw->hptxfsiz_reg.val = hptxfsiz.val;
+}
+
+/* -----------------------------------------------------------------------------
+-------------------------------- Host Registers --------------------------------
+----------------------------------------------------------------------------- */
+
+// ----------------------------- HCFG Register ---------------------------------
+
+static inline void usbh_ll_hcfg_en_perio_sched(usbh_dev_t *hw)
+{
+    hw->hcfg_reg.perschedena = 1;
+}
+
+static inline void usbh_ll_hcfg_dis_perio_sched(usbh_dev_t *hw)
+{
+    hw->hcfg_reg.perschedena = 0;
+}
+
+/**
+ * Sets the length of the frame list
+ *
+ * @param num_entires Number of entires in the frame list
+ */
+static inline void usbh_ll_hcfg_set_num_frame_list_entries(usbh_dev_t *hw, usb_hal_frame_list_len_t num_entries)
+{
+    uint32_t frlisten;
+    switch (num_entries) {
+        case USB_HAL_FRAME_LIST_LEN_8:
+            frlisten = 0;
+            break;
+        case USB_HAL_FRAME_LIST_LEN_16:
+            frlisten = 1;
+            break;
+        case USB_HAL_FRAME_LIST_LEN_32:
+            frlisten = 2;
+            break;
+        default: //USB_HAL_FRAME_LIST_LEN_64
+            frlisten = 3;
+            break;
+    }
+    hw->hcfg_reg.frlisten = frlisten;
+}
+
+static inline void usbh_ll_hcfg_en_scatt_gatt_dma(usbh_dev_t *hw)
+{
+    hw->hcfg_reg.descdma = 1;
+}
+
+static inline void usbh_ll_hcfg_set_fsls_supp_only(usbh_dev_t *hw)
+{
+    hw->hcfg_reg.fslssupp = 1;
+}
+
+static inline void usbh_ll_hcfg_set_fsls_pclk_sel(usbh_dev_t *hw)
+{
+    hw->hcfg_reg.fslspclksel = 1;
+}
+
+/**
+ * @brief Sets some default values to HCFG to operate in Host mode with scatter/gather DMA
+ *
+ * @param hw Start address of the DWC_OTG registers
+ * @param speed Speed to initialize the host port at
+ */
+static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
+{
+    hw->hcfg_reg.descdma = 1;   //Enable scatt/gatt
+    hw->hcfg_reg.fslssupp = 1;  //FS/LS support only
+    /*
+    Indicate to the OTG core what speed the PHY clock is at
+    Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
+          so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
+    */
+    hw->hcfg_reg.fslspclksel = (speed == USB_PRIV_SPEED_FULL) ? 1 : 2;  //PHY clock on esp32-sx for FS/LS-only
+    hw->hcfg_reg.perschedena = 0;   //Disable perio sched
+}
+
+// ----------------------------- HFIR Register ---------------------------------
+
+static inline void usbh_ll_hfir_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
+{
+    usb_hfir_reg_t hfir;
+    hfir.val = hw->hfir_reg.val;
+    hfir.hfirrldctrl = 0;       //Disable dynamic loading
+    /*
+    Set frame interval to be equal to 1ms
+    Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
+          so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
+    */
+    hfir.frint = (speed == USB_PRIV_SPEED_FULL) ? 48000 : 6000; //esp32-sx targets only support FS or LS
+    hw->hfir_reg.val = hfir.val;
+}
+
+// ----------------------------- HFNUM Register --------------------------------
+
+static inline uint32_t usbh_ll_get_frm_time_rem(usbh_dev_t *hw)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(hw->hfnum_reg, frrem);
+}
+
+static inline uint32_t usbh_ll_get_frm_num(usbh_dev_t *hw)
+{
+    return hw->hfnum_reg.frnum;
+}
+
+// ---------------------------- HPTXSTS Register -------------------------------
+
+static inline uint32_t usbh_ll_get_p_tx_queue_top(usbh_dev_t *hw)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(hw->hptxsts_reg, ptxqtop);
+}
+
+static inline uint32_t usbh_ll_get_p_tx_queue_space_avail(usbh_dev_t *hw)
+{
+    return hw->hptxsts_reg.ptxqspcavail;
+}
+
+static inline uint32_t usbh_ll_get_p_tx_fifo_space_avail(usbh_dev_t *hw)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(hw->hptxsts_reg, ptxfspcavail);
+}
+
+// ----------------------------- HAINT Register --------------------------------
+
+static inline uint32_t usbh_ll_get_chan_intrs_msk(usbh_dev_t *hw)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(hw->haint_reg, haint);
+}
+
+// --------------------------- HAINTMSK Register -------------------------------
+
+static inline void usbh_ll_haintmsk_en_chan_intr(usbh_dev_t *hw, uint32_t mask)
+{
+
+    hw->haintmsk_reg.val |= mask;
+}
+
+static inline void usbh_ll_haintmsk_dis_chan_intr(usbh_dev_t *hw, uint32_t mask)
+{
+    hw->haintmsk_reg.val &= ~mask;
+}
+
+// --------------------------- HFLBAddr Register -------------------------------
+
+/**
+ * @brief Set the base address of the scheduling frame list
+ *
+ * @note For some reason, this address must be 512 bytes aligned or else a bunch of frames will not be scheduled when
+ *       the frame list rolls over. However, according to the databook, there is no mention of the HFLBAddr needing to
+ *       be aligned.
+ *
+ * @param hw Start address of the DWC_OTG registers
+ * @param addr Base address of the scheduling frame list
+ */
+static inline void usbh_ll_set_frame_list_base_addr(usbh_dev_t *hw, uint32_t addr)
+{
+    hw->hflbaddr_reg.hflbaddr = addr;
+}
+
+/**
+ * @brief Get the base address of the scheduling frame list
+ *
+ * @param hw Start address of the DWC_OTG registers
+ * @return uint32_t Base address of the scheduling frame list
+ */
+static inline uint32_t usbh_ll_get_frame_list_base_addr(usbh_dev_t *hw)
+{
+    return hw->hflbaddr_reg.hflbaddr;
+}
+
+// ----------------------------- HPRT Register ---------------------------------
+
+static inline usb_priv_speed_t usbh_ll_hprt_get_speed(usbh_dev_t *hw)
+{
+    usb_priv_speed_t speed;
+    //esp32-s2 and esp32-s3 only support FS or LS
+    switch (hw->hprt_reg.prtspd) {
+        case 1:
+            speed = USB_PRIV_SPEED_FULL;
+            break;
+        default:
+            speed = USB_PRIV_SPEED_LOW;
+            break;
+    }
+    return speed;
+}
+
+static inline uint32_t usbh_ll_hprt_get_test_ctl(usbh_dev_t *hw)
+{
+    return hw->hprt_reg.prttstctl;
+}
+
+static inline void usbh_ll_hprt_set_test_ctl(usbh_dev_t *hw, uint32_t test_mode)
+{
+    usb_hprt_reg_t hprt;
+    hprt.val = hw->hprt_reg.val;
+    hprt.prttstctl = test_mode;
+    hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
+}
+
+static inline void usbh_ll_hprt_en_pwr(usbh_dev_t *hw)
+{
+    usb_hprt_reg_t hprt;
+    hprt.val = hw->hprt_reg.val;
+    hprt.prtpwr = 1;
+    hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
+}
+
+static inline void usbh_ll_hprt_dis_pwr(usbh_dev_t *hw)
+{
+    usb_hprt_reg_t hprt;
+    hprt.val = hw->hprt_reg.val;
+    hprt.prtpwr = 0;
+    hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
+}
+
+static inline uint32_t usbh_ll_hprt_get_pwr_line_status(usbh_dev_t *hw)
+{
+    return hw->hprt_reg.prtlnsts;
+}
+
+static inline void usbh_ll_hprt_set_port_reset(usbh_dev_t *hw, bool reset)
+{
+    usb_hprt_reg_t hprt;
+    hprt.val = hw->hprt_reg.val;
+    hprt.prtrst = reset;
+    hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
+}
+
+static inline bool usbh_ll_hprt_get_port_reset(usbh_dev_t *hw)
+{
+    return hw->hprt_reg.prtrst;
+}
+
+static inline void usbh_ll_hprt_set_port_suspend(usbh_dev_t *hw)
+{
+    usb_hprt_reg_t hprt;
+    hprt.val = hw->hprt_reg.val;
+    hprt.prtsusp = 1;
+    hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
+}
+
+static inline bool usbh_ll_hprt_get_port_suspend(usbh_dev_t *hw)
+{
+    return hw->hprt_reg.prtsusp;
+}
+
+static inline void usbh_ll_hprt_set_port_resume(usbh_dev_t *hw)
+{
+    usb_hprt_reg_t hprt;
+    hprt.val = hw->hprt_reg.val;
+    hprt.prtres = 1;
+    hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
+}
+
+static inline void usbh_ll_hprt_clr_port_resume(usbh_dev_t *hw)
+{
+    usb_hprt_reg_t hprt;
+    hprt.val = hw->hprt_reg.val;
+    hprt.prtres = 0;
+    hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
+}
+
+static inline bool usbh_ll_hprt_get_port_resume(usbh_dev_t *hw)
+{
+    return hw->hprt_reg.prtres;
+}
+
+static inline bool usbh_ll_hprt_get_port_overcur(usbh_dev_t *hw)
+{
+    return hw->hprt_reg.prtovrcurract;
+}
+
+static inline bool usbh_ll_hprt_get_port_en(usbh_dev_t *hw)
+{
+    return hw->hprt_reg.prtena;
+}
+
+static inline void usbh_ll_hprt_port_dis(usbh_dev_t *hw)
+{
+    usb_hprt_reg_t hprt;
+    hprt.val = hw->hprt_reg.val;
+    hprt.prtena = 1;        //W1C to disable
+    //we want to W1C ENA but not W1C the interrupt bits
+    hw->hprt_reg.val = hprt.val & ((~USBH_LL_HPRT_W1C_MSK) | USBH_LL_HPRT_ENA_MSK);
+}
+
+static inline bool usbh_ll_hprt_get_conn_status(usbh_dev_t *hw)
+{
+    return hw->hprt_reg.prtconnsts;
+}
+
+static inline uint32_t usbh_ll_hprt_intr_read_and_clear(usbh_dev_t *hw)
+{
+    usb_hprt_reg_t hprt;
+    hprt.val = hw->hprt_reg.val;
+    //We want to W1C the interrupt bits but not that ENA
+    hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_ENA_MSK);
+    //Return only the interrupt bits
+    return (hprt.val & (USBH_LL_HPRT_W1C_MSK & ~(USBH_LL_HPRT_ENA_MSK)));
+}
+
+static inline void usbh_ll_hprt_intr_clear(usbh_dev_t *hw, uint32_t intr_mask)
+{
+    usb_hprt_reg_t hprt;
+    hprt.val = hw->hprt_reg.val;
+    hw->hprt_reg.val = ((hprt.val & ~USBH_LL_HPRT_ENA_MSK) & ~USBH_LL_HPRT_W1C_MSK) | intr_mask;
+}
+
+//Per Channel registers
+
+// --------------------------- HCCHARi Register --------------------------------
+
+static inline void usbh_ll_chan_start(volatile usb_host_chan_regs_t *chan)
+{
+    chan->hcchar_reg.chena = 1;
+}
+
+static inline bool usbh_ll_chan_is_active(volatile usb_host_chan_regs_t *chan)
+{
+    return chan->hcchar_reg.chena;
+}
+
+static inline void usbh_ll_chan_halt(volatile usb_host_chan_regs_t *chan)
+{
+    chan->hcchar_reg.chdis = 1;
+}
+
+static inline void usbh_ll_chan_xfer_odd_frame(volatile usb_host_chan_regs_t *chan)
+{
+    chan->hcchar_reg.oddfrm = 1;
+}
+
+static inline void usbh_ll_chan_xfer_even_frame(volatile usb_host_chan_regs_t *chan)
+{
+    chan->hcchar_reg.oddfrm = 0;
+}
+
+static inline void usbh_ll_chan_set_dev_addr(volatile usb_host_chan_regs_t *chan, uint32_t addr)
+{
+    chan->hcchar_reg.devaddr = addr;
+}
+
+static inline void usbh_ll_chan_set_ep_type(volatile usb_host_chan_regs_t *chan, usb_priv_xfer_type_t type)
+{
+    uint32_t ep_type;
+    switch (type) {
+        case USB_PRIV_XFER_TYPE_CTRL:
+            ep_type = 0;
+            break;
+        case USB_PRIV_XFER_TYPE_ISOCHRONOUS:
+            ep_type = 1;
+            break;
+        case USB_PRIV_XFER_TYPE_BULK:
+            ep_type = 2;
+            break;
+        default:    //USB_PRIV_XFER_TYPE_INTR
+            ep_type = 3;
+            break;
+    }
+    chan->hcchar_reg.eptype = ep_type;
+}
+
+//Indicates whether channel is commuunicating with a LS device connected via a FS hub. Setting this bit to 1 will cause
+//each packet to be preceded by a PREamble packet
+static inline void usbh_ll_chan_set_lspddev(volatile usb_host_chan_regs_t *chan, bool is_ls)
+{
+    chan->hcchar_reg.lspddev = is_ls;
+}
+
+static inline void usbh_ll_chan_set_dir(volatile usb_host_chan_regs_t *chan, bool is_in)
+{
+    chan->hcchar_reg.epdir = is_in;
+}
+
+static inline void usbh_ll_chan_set_ep_num(volatile usb_host_chan_regs_t *chan, uint32_t num)
+{
+    chan->hcchar_reg.epnum = num;
+}
+
+static inline void usbh_ll_chan_set_mps(volatile usb_host_chan_regs_t *chan, uint32_t mps)
+{
+    chan->hcchar_reg.mps = mps;
+}
+
+static inline void usbh_ll_chan_hcchar_init(volatile usb_host_chan_regs_t *chan, int dev_addr, int ep_num, int mps, usb_priv_xfer_type_t type, bool is_in, bool is_ls)
+{
+    //Sets all persistent fields of the channel over its lifetimez
+    usbh_ll_chan_set_dev_addr(chan, dev_addr);
+    usbh_ll_chan_set_ep_type(chan, type);
+    usbh_ll_chan_set_lspddev(chan, is_ls);
+    usbh_ll_chan_set_dir(chan, is_in);
+    usbh_ll_chan_set_ep_num(chan, ep_num);
+    usbh_ll_chan_set_mps(chan, mps);
+}
+
+// ---------------------------- HCINTi Register --------------------------------
+
+static inline uint32_t usbh_ll_chan_intr_read_and_clear(volatile usb_host_chan_regs_t *chan)
+{
+    usb_hcint_reg_t hcint;
+    hcint.val = chan->hcint_reg.val;
+    chan->hcint_reg.val = hcint.val;
+    return hcint.val;
+}
+
+// --------------------------- HCINTMSKi Register ------------------------------
+
+static inline void usbh_ll_chan_set_intr_mask(volatile usb_host_chan_regs_t *chan, uint32_t mask)
+{
+    chan->hcintmsk_reg.val = mask;
+}
+
+// ---------------------- HCTSIZi and HCDMAi Registers -------------------------
+
+static inline void usbh_ll_chan_set_pid(volatile usb_host_chan_regs_t *chan, uint32_t data_pid)
+{
+    if (data_pid == 0) {
+        chan->hctsiz_reg.pid = 0;
+    } else {
+        chan->hctsiz_reg.pid = 2;
+    }
+}
+
+static inline uint32_t usbh_ll_chan_get_pid(volatile usb_host_chan_regs_t *chan) {
+    if (chan->hctsiz_reg.pid == 0) {
+        return 0;   //DATA0
+    } else {
+        return 1;   //DATA1
+    }
+}
+
+static inline void usbh_ll_chan_set_dma_addr_non_iso(volatile usb_host_chan_regs_t *chan,
+                                                    void *dmaaddr,
+                                                    uint32_t qtd_idx)
+{
+    //Set HCDMAi
+    chan->hcdma_reg.val = 0;
+    chan->hcdma_reg.non_iso.dmaaddr = (((uint32_t)dmaaddr) >> 9) & 0x7FFFFF;  //MSB of 512 byte aligned address
+    chan->hcdma_reg.non_iso.ctd = qtd_idx;
+}
+
+static inline int usbh_ll_chan_get_ctd(usb_host_chan_regs_t *chan)
+{
+    return chan->hcdma_reg.non_iso.ctd;
+}
+
+static inline void usbh_ll_chan_hctsiz_init(volatile usb_host_chan_regs_t *chan)
+{
+    chan->hctsiz_reg.dopng = 0;         //Don't do ping
+    HAL_FORCE_MODIFY_U32_REG_FIELD(chan->hctsiz_reg, sched_info, 0xFF); //Schedinfo is always 0xFF for fullspeed. Not used in Bulk/Ctrl channels
+}
+
+static inline void usbh_ll_chan_set_qtd_list_len(volatile usb_host_chan_regs_t *chan, int qtd_list_len)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(chan->hctsiz_reg, ntd, qtd_list_len - 1);    //Set the length of the descriptor list
+}
+
+// ---------------------------- HCDMABi Register -------------------------------
+
+static inline void *usbh_ll_chan_get_cur_buff_addr(volatile usb_host_chan_regs_t *chan)
+{
+    return (void *)chan->hcdmab_reg.hcdmab;
+}
+
+/* -----------------------------------------------------------------------------
+---------------------------- Scatter/Gather DMA QTDs ---------------------------
+----------------------------------------------------------------------------- */
+
+// ---------------------------- Helper Functions -------------------------------
+
+/**
+ * @brief Get the base address of a channel's register based on the channel's index
+ *
+ * @param dev Start address of the DWC_OTG registers
+ * @param chan_idx The channel's index
+ * @return usb_host_chan_regs_t* Pointer to channel's registers
+ */
+static inline usb_host_chan_regs_t *usbh_ll_get_chan_regs(usbh_dev_t *dev, int chan_idx)
+{
+    return &dev->host_chans[chan_idx];
+}
+
+// ------------------------------ QTD related ----------------------------------
+
+#define USBH_LL_QTD_STATUS_SUCCESS      0x0     //If QTD was processed, it indicates the data was transmitted/received successfully
+#define USBH_LL_QTD_STATUS_PKTERR       0x1     //Data trasnmitted/received with errors (CRC/Timeout/Stuff/False EOP/Excessive NAK).
+//Note: 0x2 is reserved
+#define USBH_LL_QTD_STATUS_BUFFER       0x3     //AHB error occurred.
+#define USBH_LL_QTD_STATUS_NOT_EXECUTED 0x4     //QTD as never processed
+
+/**
+ * @brief Set a QTD for a non isochronous IN transfer
+ *
+ * @param qtd Pointer to the QTD
+ * @param data_buff Pointer to buffer containing the data to transfer
+ * @param xfer_len Number of bytes in transfer. Setting 0 will do a zero length IN transfer.
+ *                 Non zero length must be mulitple of the endpoint's MPS.
+ * @param hoc Halt on complete (will generate an interrupt and halt the channel)
+ */
+static inline void usbh_ll_set_qtd_in(usbh_ll_dma_qtd_t *qtd, uint8_t *data_buff, int xfer_len, bool hoc)
+{
+    qtd->buffer = data_buff;        //Set pointer to data buffer
+    qtd->buffer_status_val = 0;     //Reset all flags to zero
+    qtd->in_non_iso.xfer_size = xfer_len;
+    if (hoc) {
+        qtd->in_non_iso.intr_cplt = 1;  //We need to set this to distinguish between a halt due to a QTD
+        qtd->in_non_iso.eol = 1;        //Used to halt the channel at this qtd
+    }
+    qtd->in_non_iso.active = 1;
+}
+
+/**
+ * @brief Set a QTD for a non isochronous OUT transfer
+ *
+ * @param qtd Poitner to the QTD
+ * @param data_buff Pointer to buffer containing the data to transfer
+ * @param xfer_len Number of bytes to transfer. Setting 0 will do a zero length transfer.
+ *                 For ctrl setup packets, this should be set to 8.
+ * @param hoc Halt on complete (will generate an interrupt)
+ * @param is_setup Indicates whether this is a control transfer setup packet or a normal OUT Data transfer.
+ *                 (As per the USB protocol, setup packets cannot be STALLd or NAKd by the device)
+ */
+static inline void usbh_ll_set_qtd_out(usbh_ll_dma_qtd_t *qtd, uint8_t *data_buff, int xfer_len, bool hoc, bool is_setup)
+{
+    qtd->buffer = data_buff;        //Set pointer to data buffer
+    qtd->buffer_status_val = 0;     //Reset all flags to zero
+    qtd->out_non_iso.xfer_size = xfer_len;
+    if (is_setup) {
+        qtd->out_non_iso.is_setup = 1;
+    }
+    if (hoc) {
+        qtd->in_non_iso.intr_cplt = 1;  //We need to set this to distinguish between a halt due to a QTD
+        qtd->in_non_iso.eol = 1;        //Used to halt the channel at this qtd
+    }
+    qtd->out_non_iso.active = 1;
+}
+
+/**
+ * @brief Set a QTD as NULL
+ *
+ * This sets the QTD to a value of 0. This is only useful when you need to insert
+ * blank QTDs into a list of QTDs
+ *
+ * @param qtd Pointer to the QTD
+ */
+static inline void usbh_ll_set_qtd_null(usbh_ll_dma_qtd_t *qtd)
+{
+    qtd->buffer = NULL;
+    qtd->buffer_status_val = 0;     //Disable qtd by clearing it to zero. Used by interrupt/isoc as an unscheudled frame
+}
+
+/**
+ * @brief Get the status of a QTD
+ *
+ * When a channel get's halted, call this to check whether each QTD was executed successfully
+ *
+ * @param qtd Poitner to the QTD
+ * @param[out] rem_len Number of bytes ramining in the QTD
+ * @param[out] status Status of the QTD
+ */
+static inline void usbh_ll_get_qtd_status(usbh_ll_dma_qtd_t *qtd, int *rem_len, int *status)
+{
+    //Status is the same regardless of IN or OUT
+    if (qtd->in_non_iso.active) {
+        //QTD was never processed
+        *status = USBH_LL_QTD_STATUS_NOT_EXECUTED;
+    } else {
+        *status = qtd->in_non_iso.rx_status;
+    }
+    *rem_len = qtd->in_non_iso.xfer_size;
+    //Clear the QTD just for safety
+    qtd->buffer_status_val = 0;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/wdt_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/wdt_hal.h
new file mode 100644
index 00000000000..13d9f5d2f55
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/wdt_hal.h
@@ -0,0 +1,180 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+#include "hal/wdt_types.h"
+#include "hal/mwdt_ll.h"
+#include "hal/rwdt_ll.h"
+
+/**
+ * Context that should be maintained by both the driver and the HAL
+ */
+typedef struct {
+    wdt_inst_t inst;                /**< Which WDT instance this HAL context is using (i.e. MWDT0, MWDT1, RWDT)*/
+    union {
+        timg_dev_t *mwdt_dev;       /**< Starting address of the MWDT */
+        rtc_cntl_dev_t *rwdt_dev;   /**< Starting address of the RWDT*/
+    };
+} wdt_hal_context_t;
+
+/* ---------------------------- Init and Config ----------------------------- */
+
+/**
+ * @brief Initialize one of the WDTs associated HAL context
+ *
+ * This function initializes one of the WDTs (MWDT0, MWDT1, or RWDT) hardware by
+ * doing the following:
+ * - Disables the WDT and all of its stages
+ * - Sets some registers with default values
+ * - Sets the WDTs source clock prescaler (not applicable to RWDT)
+ * - Optionally enables the level interrupt
+ *
+ * The HAL context is initialized by storing the type (i.e. MWDT or RWDT) of
+ * this WDT instance, and a pointer to the associated registers.
+ *
+ * @param hal Context of HAL layer
+ * @param wdt_inst Which WDT instance to initialize (MWDT0, MWDT1, or RWDT)
+ * @param prescaler MWDT source clock prescaler. Unused for RWDT
+ * @param enable_intr True to enable level interrupt. False to disable
+ *
+ * @note Although the WDTs on the ESP32 have an edge interrupt, this HAL does
+ *       not utilize it and will always disables it.
+ * @note RWDT does not have a prescaler. Its tick rate is equal to the
+ *       frequency of its source clock (RTC slow clock).
+ */
+void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescaler, bool enable_intr);
+
+/**
+ * @brief Deinitialize a WDT and its HAL context
+ *
+ * This function deinitializes a WDT by feeding then disabling it. The WDT's
+ * interrupt is also cleared and disabled. The HAL context is cleared.
+ *
+ * @param hal Context of HAL layer
+ */
+void wdt_hal_deinit(wdt_hal_context_t *hal);
+
+/**
+ * @brief Configure a particular stage of a WDT
+ *
+ * @param hal Context of HAL layer
+ * @param stage Stage to configure (0 to 3)
+ * @param timeout Number of WDT ticks for the stage to time out
+ * @param behavior What action to take when the stage times out. Note that only
+ *                 the RWDT supports the RTC reset action.
+ *
+ * @note This function can only be called when the WDT is unlocked. Call
+ *       wdt_hal_write_protect_disable() first.
+ */
+void wdt_hal_config_stage(wdt_hal_context_t *hal, wdt_stage_t stage, uint32_t timeout, wdt_stage_action_t behavior);
+
+/* -------------------------------- Runtime --------------------------------- */
+
+/**
+ * @brief Disable write protection of the WDT registers
+ *
+ * @param hal Context of HAL layer
+ */
+void wdt_hal_write_protect_disable(wdt_hal_context_t *hal);
+
+/**
+ * @brief Enable write protection of the WDT registers
+ *
+ * @param hal Context of HAL layer
+ */
+void wdt_hal_write_protect_enable(wdt_hal_context_t *hal);
+
+/**
+ * @brief Enable the WDT
+ *
+ * The WDT will start counting when enabled. This function also feeds the WDT
+ * before enabling it.
+ *
+ * @param hal Context of HAL layer
+ *
+ * @note This function can only be called when the WDT is unlocked. Call
+ *       wdt_hal_write_protect_disable() first.
+ */
+void wdt_hal_enable(wdt_hal_context_t *hal);
+
+/**
+ * @brief Disable the WDT
+ *
+ * @param hal Context of HAL layer
+ *
+ * @note This function can only be called when the WDT is unlocked. Call
+ *       wdt_hal_write_protect_disable() first.
+ */
+void wdt_hal_disable(wdt_hal_context_t *hal);
+
+/**
+ * @brief Handle WDT interrupt
+ *
+ * Clears the interrupt status bit and feeds the WDT
+ *
+ * @param hal Context of HAL layer
+ *
+ * @note This function can only be called when the WDT is unlocked. Call
+ *       wdt_hal_write_protect_disable() first.
+ */
+void wdt_hal_handle_intr(wdt_hal_context_t *hal);
+
+/**
+ * @brief Feed the WDT
+ *
+ * Feeding the WDT will reset the internal count and current stage.
+ *
+ * @param hal Context of HAL layer
+ *
+ * @note This function can only be called when the WDT is unlocked. Call
+ *       wdt_hal_write_protect_disable() first.
+ */
+void wdt_hal_feed(wdt_hal_context_t *hal);
+
+/**
+ * @brief Enable/Disable the WDT flash boot mode
+ *
+ * @param hal Context of HAL layer
+ * @param enable True to enable flash boot mode, false to disable.
+ *
+ * @note Flash boot mode can trigger a time out even if the WDT is disabled.
+ * @note This function can only be called when the WDT is unlocked. Call
+ *       wdt_hal_write_protect_disable() first.
+ */
+void wdt_hal_set_flashboot_en(wdt_hal_context_t *hal, bool enable);
+
+/**
+ * @brief Check if the WDT is enabled
+ *
+ * @param hal Context of HAL layer
+ * @return True if enabled, false otherwise
+ */
+bool wdt_hal_is_enabled(wdt_hal_context_t *hal);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/wdt_types.h b/tools/sdk/esp32s3/include/hal/include/hal/wdt_types.h
new file mode 100644
index 00000000000..afc0dc49833
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/wdt_types.h
@@ -0,0 +1,71 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    WDT_RWDT = 0,   /*!< RTC Watchdog Timer (RWDT) */
+    WDT_MWDT0,      /*!< Main System Watchdog Timer (MWDT) of Timer Group 0 */
+    WDT_MWDT1,      /*!< Main System Watchdog Timer (MWDT) of Timer Group 1 */
+} wdt_inst_t;
+
+/**
+ * @brief Stages of a Watchdog Timer. A WDT has 4 stages.
+ */
+typedef enum {
+    WDT_STAGE0 = 0,     /*!< Stage 0 */
+    WDT_STAGE1 = 1,     /*!< Stage 1 */
+    WDT_STAGE2 = 2,     /*!< Stage 2 */
+    WDT_STAGE3 = 3      /*!< Stage 3 */
+} wdt_stage_t;
+
+/**
+ * @brief Behavior of the WDT stage if it times out
+ *
+ * @note These enum values should be compatible with the corresponding register
+ *       field values.
+ */
+typedef enum {
+    WDT_STAGE_ACTION_OFF = 0,           /*!< Disabled. This stage will have no effects on the system. */
+    WDT_STAGE_ACTION_INT = 1,           /*!< Trigger an interrupt when the stage expires. */
+    WDT_STAGE_ACTION_RESET_CPU = 2,     /*!< Reset a CPU core when the stage expires. */
+    WDT_STAGE_ACTION_RESET_SYSTEM = 3,  /*!< Reset the main system when the stage expires. This includes the CPU and all peripherals. The RTC is an exception and will not be reset. */
+    WDT_STAGE_ACTION_RESET_RTC = 4,     /*!< Reset the main system and the RTC when the stage expires. ONLY AVAILABLE FOR RWDT */
+} wdt_stage_action_t;
+
+/**
+ * @brief Length of CPU or System Reset signals
+ *
+ * @note These enum values should be compatible with the corresponding register
+ *       field values.
+ */
+typedef enum {
+    WDT_RESET_SIG_LENGTH_100ns = 0,    /*!< 100 ns */
+    WDT_RESET_SIG_LENGTH_200ns = 1,    /*!< 200 ns */
+    WDT_RESET_SIG_LENGTH_300ns = 2,    /*!< 300 ns */
+    WDT_RESET_SIG_LENGTH_400ns = 3,    /*!< 400 ns */
+    WDT_RESET_SIG_LENGTH_500ns = 4,    /*!< 500 ns */
+    WDT_RESET_SIG_LENGTH_800ns = 5,    /*!< 800 ns */
+    WDT_RESET_SIG_LENGTH_1_6us = 6,    /*!< 1.6 us */
+    WDT_RESET_SIG_LENGTH_3_2us = 7     /*!< 3.2 us */
+} wdt_reset_sig_length_t;
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/include/hal/xt_wdt_hal.h b/tools/sdk/esp32s3/include/hal/include/hal/xt_wdt_hal.h
new file mode 100644
index 00000000000..bd08f2a989f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/include/hal/xt_wdt_hal.h
@@ -0,0 +1,61 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "hal/xt_wdt_ll.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    rtc_cntl_dev_t *dev;    /* Pointer to the RTC register struct */
+} xt_wdt_hal_context_t;     /* HAL context struct */
+
+typedef struct {
+    uint32_t timeout;       /* Watchdog timer timeout in RTC_CLK cycles*/
+} xt_wdt_hal_config_t;      /* HAL config parameter struct */
+
+/* ---------------------------- Init and Config ----------------------------- */
+
+/**
+ * @brief Initialize the WDTs associated HAL context
+ *
+ * Prepares the register for enabling the WDT and sets the timeout value
+ *
+ * @param hal Pointer to the HAL layer context
+ * @param config Pointer to config struct
+ */
+void xt_wdt_hal_init(xt_wdt_hal_context_t *hal, const xt_wdt_hal_config_t *config);
+
+
+/**
+ * @brief Enable or disable the WDT
+ *
+ * @param hal Pointer to the HAL layer context
+ * @param enable true for enable WDT, false for disable
+ */
+void xt_wdt_hal_enable(xt_wdt_hal_context_t *hal, bool enable);
+
+/**
+ * @brief Enable the automatic RTC backup clock with the given frequency
+ *
+ * Calculates and sets the necessary hardware parameters to meet the desired
+ * backup clock frequency
+ *
+ * @param hal Pointer to the HAL layer context
+ * @param rtc_clk_frequency_khz desired frequency for the backup clock
+ * @return uint32_t the calculated clock factor value
+ */
+uint32_t xt_wdt_hal_enable_backup_clk(xt_wdt_hal_context_t *hal, uint32_t rtc_clk_frequency_khz);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/platform_port/include/hal/assert.h b/tools/sdk/esp32s3/include/hal/platform_port/include/hal/assert.h
new file mode 100644
index 00000000000..45e9b138741
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/platform_port/include/hal/assert.h
@@ -0,0 +1,43 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void __assert_func(const char *file, int line, const char *func, const char *expr);
+extern void abort(void);
+
+#ifndef __ASSERT_FUNC
+#ifdef __ASSERT_FUNCTION
+#define __ASSERT_FUNC __ASSERT_FUNCTION
+#else
+#define __ASSERT_FUNC "??"
+#endif
+#endif
+
+#if CONFIG_HAL_DEFAULT_ASSERTION_LEVEL == 1 // silent
+#define HAL_ASSERT(__e) (__builtin_expect(!!(__e), 1) ? (void)0 : abort())
+#elif CONFIG_HAL_DEFAULT_ASSERTION_LEVEL == 2 // full assertion
+#define HAL_ASSERT(__e) (__builtin_expect(!!(__e), 1) ? (void)0 : __assert_func(__FILE__, __LINE__, __ASSERT_FUNC, #__e))
+#else // no assert
+#define HAL_ASSERT(__e) ((void)(__e))
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/hal/platform_port/include/hal/check.h b/tools/sdk/esp32s3/include/hal/platform_port/include/hal/check.h
new file mode 100644
index 00000000000..3ad02946c71
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/platform_port/include/hal/check.h
@@ -0,0 +1,17 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define STATIC_HAL_REG_CHECK(TAG, ENUM, VAL) _Static_assert((ENUM) == (VAL), #TAG": "#ENUM" definition no longer matches register value")
diff --git a/tools/sdk/esp32s3/include/hal/platform_port/include/hal/log.h b/tools/sdk/esp32s3/include/hal/platform_port/include/hal/log.h
new file mode 100644
index 00000000000..6d5cbda3817
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/platform_port/include/hal/log.h
@@ -0,0 +1,29 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_log.h"
+
+#define HAL_LOGE(...)    ESP_LOGE(__VA_ARGS__)
+#define HAL_LOGW(...)    ESP_LOGW(__VA_ARGS__)
+#define HAL_LOGI(...)    ESP_LOGI(__VA_ARGS__)
+#define HAL_LOGD(...)    ESP_LOGD(__VA_ARGS__)
+#define HAL_LOGV(...)    ESP_LOGV(__VA_ARGS__)
+
+#define HAL_EARLY_LOGE(...)    ESP_EARLY_LOGE(__VA_ARGS__)
+#define HAL_EARLY_LOGW(...)    ESP_EARLY_LOGW(__VA_ARGS__)
+#define HAL_EARLY_LOGI(...)    ESP_EARLY_LOGI(__VA_ARGS__)
+#define HAL_EARLY_LOGD(...)    ESP_EARLY_LOGD(__VA_ARGS__)
+#define HAL_EARLY_LOGV(...)    ESP_EARLY_LOGV(__VA_ARGS__)
diff --git a/tools/sdk/esp32s3/include/hal/platform_port/include/hal/misc.h b/tools/sdk/esp32s3/include/hal/platform_port/include/hal/misc.h
new file mode 100644
index 00000000000..4afb49653ff
--- /dev/null
+++ b/tools/sdk/esp32s3/include/hal/platform_port/include/hal/misc.h
@@ -0,0 +1,59 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#define HAL_SWAP16(d) __builtin_bswap16((d))
+#define HAL_SWAP32(d) __builtin_bswap32((d))
+#define HAL_SWAP64(d) __builtin_bswap64((d))
+
+/** @cond */    //Doxy command to hide preprocessor definitions from docs */
+
+/**
+ * @brief Macro to force a 32-bit read, modify, then write on a peripheral register
+ *
+ * Due to a GCC bug, the compiler may still try to optimize read/writes to peripheral register fields by using 8/16 bit
+ * access, even if they are marked volatile (i.e., -fstrict-volatile-bitfields has no effect).
+ *
+ * For ESP chips, the peripheral bus only allows 32-bit read/writes. The following macro works around the compiler issue
+ * by forcing a 32-bit read/modify/write.
+ *
+ * @note This macro should only be called on register fields of xxx_struct.h type headers, as it depends on the presence
+ *       of a 'val' field of the register union.
+ * @note Current implementation reads into a uint32_t instead of copy base_reg direclty to temp_reg. The reason being
+ *       that C++ does not create a copy constructor for volatile structs.
+ */
+#define HAL_FORCE_MODIFY_U32_REG_FIELD(base_reg, reg_field, field_val)    \
+{                                                           \
+    uint32_t temp_val = base_reg.val;                       \
+    typeof(base_reg) temp_reg;                              \
+    temp_reg.val = temp_val;                                \
+    temp_reg.reg_field = (field_val);                       \
+    (base_reg).val = temp_reg.val;                          \
+}
+
+/**
+ * @brief Macro to force a 32-bit read on a peripheral register
+ *
+ * @note This macro should only be called on register fields of xxx_struct.h type headers. See description above for
+ *       more details.
+ * @note Current implementation reads into a uint32_t. See description above for more details.
+ */
+#define HAL_FORCE_READ_U32_REG_FIELD(base_reg, reg_field) ({    \
+    uint32_t temp_val = base_reg.val;                       \
+    typeof(base_reg) temp_reg;                              \
+    temp_reg.val = temp_val;                                \
+    temp_reg.reg_field;                                     \
+})
+
+/** @endcond */
diff --git a/tools/sdk/esp32s3/include/heap/include/esp_heap_caps.h b/tools/sdk/esp32s3/include/heap/include/esp_heap_caps.h
new file mode 100644
index 00000000000..c7d85d4217f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/heap/include/esp_heap_caps.h
@@ -0,0 +1,396 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdlib.h>
+#include "multi_heap.h"
+#include <sdkconfig.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Flags to indicate the capabilities of the various memory systems
+ */
+#define MALLOC_CAP_EXEC             (1<<0)  ///< Memory must be able to run executable code
+#define MALLOC_CAP_32BIT            (1<<1)  ///< Memory must allow for aligned 32-bit data accesses
+#define MALLOC_CAP_8BIT             (1<<2)  ///< Memory must allow for 8/16/...-bit data accesses
+#define MALLOC_CAP_DMA              (1<<3)  ///< Memory must be able to accessed by DMA
+#define MALLOC_CAP_PID2             (1<<4)  ///< Memory must be mapped to PID2 memory space (PIDs are not currently used)
+#define MALLOC_CAP_PID3             (1<<5)  ///< Memory must be mapped to PID3 memory space (PIDs are not currently used)
+#define MALLOC_CAP_PID4             (1<<6)  ///< Memory must be mapped to PID4 memory space (PIDs are not currently used)
+#define MALLOC_CAP_PID5             (1<<7)  ///< Memory must be mapped to PID5 memory space (PIDs are not currently used)
+#define MALLOC_CAP_PID6             (1<<8)  ///< Memory must be mapped to PID6 memory space (PIDs are not currently used)
+#define MALLOC_CAP_PID7             (1<<9)  ///< Memory must be mapped to PID7 memory space (PIDs are not currently used)
+#define MALLOC_CAP_SPIRAM           (1<<10) ///< Memory must be in SPI RAM
+#define MALLOC_CAP_INTERNAL         (1<<11) ///< Memory must be internal; specifically it should not disappear when flash/spiram cache is switched off
+#define MALLOC_CAP_DEFAULT          (1<<12) ///< Memory can be returned in a non-capability-specific memory allocation (e.g. malloc(), calloc()) call
+#define MALLOC_CAP_IRAM_8BIT        (1<<13) ///< Memory must be in IRAM and allow unaligned access
+#define MALLOC_CAP_RETENTION        (1<<14)
+#define MALLOC_CAP_RTCRAM           (1<<15) ///< Memory must be in RTC fast memory
+
+#define MALLOC_CAP_INVALID          (1<<31) ///< Memory can't be used / list end marker
+
+/**
+ * @brief callback called when a allocation operation fails, if registered
+ * @param size in bytes of failed allocation
+ * @param caps capabillites requested of failed allocation
+ * @param function_name function which generated the failure
+ */
+typedef void (*esp_alloc_failed_hook_t) (size_t size, uint32_t caps, const char * function_name);
+
+/**
+ * @brief registers a callback function to be invoked if a memory allocation operation fails
+ * @param callback caller defined callback to be invoked
+ * @return ESP_OK if callback was registered.
+ */
+esp_err_t heap_caps_register_failed_alloc_callback(esp_alloc_failed_hook_t callback);
+
+/**
+ * @brief Allocate a chunk of memory which has the given capabilities
+ *
+ * Equivalent semantics to libc malloc(), for capability-aware memory.
+ *
+ * In IDF, ``malloc(p)`` is equivalent to ``heap_caps_malloc(p, MALLOC_CAP_8BIT)``.
+ *
+ * @param size Size, in bytes, of the amount of memory to allocate
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory to be returned
+ *
+ * @return A pointer to the memory allocated on success, NULL on failure
+ */
+void *heap_caps_malloc(size_t size, uint32_t caps);
+
+
+/**
+ * @brief Free memory previously allocated via heap_caps_malloc() or heap_caps_realloc().
+ *
+ * Equivalent semantics to libc free(), for capability-aware memory.
+ *
+ *  In IDF, ``free(p)`` is equivalent to ``heap_caps_free(p)``.
+ *
+ * @param ptr Pointer to memory previously returned from heap_caps_malloc() or heap_caps_realloc(). Can be NULL.
+ */
+void heap_caps_free( void *ptr);
+
+/**
+ * @brief Reallocate memory previously allocated via heap_caps_malloc() or heap_caps_realloc().
+ *
+ * Equivalent semantics to libc realloc(), for capability-aware memory.
+ *
+ * In IDF, ``realloc(p, s)`` is equivalent to ``heap_caps_realloc(p, s, MALLOC_CAP_8BIT)``.
+ *
+ * 'caps' parameter can be different to the capabilities that any original 'ptr' was allocated with. In this way,
+ * realloc can be used to "move" a buffer if necessary to ensure it meets a new set of capabilities.
+ *
+ * @param ptr Pointer to previously allocated memory, or NULL for a new allocation.
+ * @param size Size of the new buffer requested, or 0 to free the buffer.
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory desired for the new allocation.
+ *
+ * @return Pointer to a new buffer of size 'size' with capabilities 'caps', or NULL if allocation failed.
+ */
+void *heap_caps_realloc( void *ptr, size_t size, uint32_t caps);
+
+/**
+ * @brief Allocate a aligned chunk of memory which has the given capabilities
+ *
+ * Equivalent semantics to libc aligned_alloc(), for capability-aware memory.
+ * @param alignment  How the pointer received needs to be aligned
+ *                   must be a power of two
+ * @param size Size, in bytes, of the amount of memory to allocate
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory to be returned
+ *
+ * @return A pointer to the memory allocated on success, NULL on failure
+ *
+ *
+ */
+void *heap_caps_aligned_alloc(size_t alignment, size_t size, uint32_t caps);
+
+/**
+ * @brief Used to deallocate memory previously allocated with heap_caps_aligned_alloc
+ *
+ * @param ptr Pointer to the memory allocated
+ * @note This function is deprecated, plase consider using heap_caps_free() instead
+ */
+void __attribute__((deprecated))  heap_caps_aligned_free(void *ptr);
+
+/**
+ * @brief Allocate a aligned chunk of memory which has the given capabilities. The initialized value in the memory is set to zero.
+ *
+ * @param alignment  How the pointer received needs to be aligned
+ *                   must be a power of two
+ * @param n    Number of continuing chunks of memory to allocate
+ * @param size Size, in bytes, of a chunk of memory to allocate
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory to be returned
+ *
+ * @return A pointer to the memory allocated on success, NULL on failure
+ *
+ */
+void *heap_caps_aligned_calloc(size_t alignment, size_t n, size_t size, uint32_t caps);
+
+
+/**
+ * @brief Allocate a chunk of memory which has the given capabilities. The initialized value in the memory is set to zero.
+ *
+ * Equivalent semantics to libc calloc(), for capability-aware memory.
+ *
+ * In IDF, ``calloc(p)`` is equivalent to ``heap_caps_calloc(p, MALLOC_CAP_8BIT)``.
+ *
+ * @param n    Number of continuing chunks of memory to allocate
+ * @param size Size, in bytes, of a chunk of memory to allocate
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory to be returned
+ *
+ * @return A pointer to the memory allocated on success, NULL on failure
+ */
+void *heap_caps_calloc(size_t n, size_t size, uint32_t caps);
+
+/**
+ * @brief Get the total size of all the regions that have the given capabilities
+ *
+ * This function takes all regions capable of having the given capabilities allocated in them
+ * and adds up the total space they have.
+ *
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory
+ *
+ * @return total size in bytes
+ */
+
+size_t heap_caps_get_total_size(uint32_t caps);
+
+/**
+ * @brief Get the total free size of all the regions that have the given capabilities
+ *
+ * This function takes all regions capable of having the given capabilities allocated in them
+ * and adds up the free space they have.
+ *
+ * Note that because of heap fragmentation it is probably not possible to allocate a single block of memory
+ * of this size. Use heap_caps_get_largest_free_block() for this purpose.
+
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory
+ *
+ * @return Amount of free bytes in the regions
+ */
+size_t heap_caps_get_free_size( uint32_t caps );
+
+
+/**
+ * @brief Get the total minimum free memory of all regions with the given capabilities
+ *
+ * This adds all the low water marks of the regions capable of delivering the memory
+ * with the given capabilities.
+ *
+ * Note the result may be less than the global all-time minimum available heap of this kind, as "low water marks" are
+ * tracked per-region. Individual regions' heaps may have reached their "low water marks" at different points in time. However
+ * this result still gives a "worst case" indication for all-time minimum free heap.
+ *
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory
+ *
+ * @return Amount of free bytes in the regions
+ */
+size_t heap_caps_get_minimum_free_size( uint32_t caps );
+
+/**
+ * @brief Get the largest free block of memory able to be allocated with the given capabilities.
+ *
+ * Returns the largest value of ``s`` for which ``heap_caps_malloc(s, caps)`` will succeed.
+ *
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory
+ *
+ * @return Size of largest free block in bytes.
+ */
+size_t heap_caps_get_largest_free_block( uint32_t caps );
+
+
+/**
+ * @brief Get heap info for all regions with the given capabilities.
+ *
+ * Calls multi_heap_info() on all heaps which share the given capabilities.  The information returned is an aggregate
+ * across all matching heaps.  The meanings of fields are the same as defined for multi_heap_info_t, except that
+ * ``minimum_free_bytes`` has the same caveats described in heap_caps_get_minimum_free_size().
+ *
+ * @param info        Pointer to a structure which will be filled with relevant
+ *                    heap metadata.
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory
+ *
+ */
+void heap_caps_get_info( multi_heap_info_t *info, uint32_t caps );
+
+
+/**
+ * @brief Print a summary of all memory with the given capabilities.
+ *
+ * Calls multi_heap_info on all heaps which share the given capabilities, and
+ * prints a two-line summary for each, then a total summary.
+ *
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory
+ *
+ */
+void heap_caps_print_heap_info( uint32_t caps );
+
+/**
+ * @brief Check integrity of all heap memory in the system.
+ *
+ * Calls multi_heap_check on all heaps. Optionally print errors if heaps are corrupt.
+ *
+ * Calling this function is equivalent to calling heap_caps_check_integrity
+ * with the caps argument set to MALLOC_CAP_INVALID.
+ *
+ * @param print_errors Print specific errors if heap corruption is found.
+ *
+ * @return True if all heaps are valid, False if at least one heap is corrupt.
+ */
+bool heap_caps_check_integrity_all(bool print_errors);
+
+/**
+ * @brief Check integrity of all heaps with the given capabilities.
+ *
+ * Calls multi_heap_check on all heaps which share the given capabilities. Optionally
+ * print errors if the heaps are corrupt.
+ *
+ * See also heap_caps_check_integrity_all to check all heap memory
+ * in the system and heap_caps_check_integrity_addr to check memory
+ * around a single address.
+ *
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory
+ * @param print_errors Print specific errors if heap corruption is found.
+ *
+ * @return True if all heaps are valid, False if at least one heap is corrupt.
+ */
+bool heap_caps_check_integrity(uint32_t caps, bool print_errors);
+
+/**
+ * @brief Check integrity of heap memory around a given address.
+ *
+ * This function can be used to check the integrity of a single region of heap memory,
+ * which contains the given address.
+ *
+ * This can be useful if debugging heap integrity for corruption at a known address,
+ * as it has a lower overhead than checking all heap regions. Note that if the corrupt
+ * address moves around between runs (due to timing or other factors) then this approach
+ * won't work and you should call heap_caps_check_integrity or
+ * heap_caps_check_integrity_all instead.
+ *
+ * @note The entire heap region around the address is checked, not only the adjacent
+ * heap blocks.
+ *
+ * @param addr Address in memory. Check for corruption in region containing this address.
+ * @param print_errors Print specific errors if heap corruption is found.
+ *
+ * @return True if the heap containing the specified address is valid,
+ * False if at least one heap is corrupt or the address doesn't belong to a heap region.
+ */
+bool heap_caps_check_integrity_addr(intptr_t addr, bool print_errors);
+
+/**
+ * @brief Enable malloc() in external memory and set limit below which
+ *        malloc() attempts are placed in internal memory.
+ *
+ * When external memory is in use, the allocation strategy is to initially try to
+ * satisfy smaller allocation requests with internal memory and larger requests
+ * with external memory. This sets the limit between the two, as well as generally
+ * enabling allocation in external memory.
+ *
+ * @param limit       Limit, in bytes.
+ */
+void heap_caps_malloc_extmem_enable(size_t limit);
+
+/**
+ * @brief Allocate a chunk of memory as preference in decreasing order.
+ *
+ * @attention The variable parameters are bitwise OR of MALLOC_CAP_* flags indicating the type of memory.
+ *            This API prefers to allocate memory with the first parameter. If failed, allocate memory with
+ *            the next parameter. It will try in this order until allocating a chunk of memory successfully
+ *            or fail to allocate memories with any of the parameters.
+ *
+ * @param size Size, in bytes, of the amount of memory to allocate
+ * @param num Number of variable paramters
+ *
+ * @return A pointer to the memory allocated on success, NULL on failure
+ */
+void *heap_caps_malloc_prefer( size_t size, size_t num, ... );
+
+/**
+ * @brief Allocate a chunk of memory as preference in decreasing order.
+ *
+ * @param ptr Pointer to previously allocated memory, or NULL for a new allocation.
+ * @param size Size of the new buffer requested, or 0 to free the buffer.
+ * @param num Number of variable paramters
+ *
+ * @return Pointer to a new buffer of size 'size', or NULL if allocation failed.
+ */
+void *heap_caps_realloc_prefer( void *ptr, size_t size, size_t num, ... );
+
+/**
+ * @brief Allocate a chunk of memory as preference in decreasing order.
+ *
+ * @param n    Number of continuing chunks of memory to allocate
+ * @param size Size, in bytes, of a chunk of memory to allocate
+ * @param num  Number of variable paramters
+ *
+ * @return A pointer to the memory allocated on success, NULL on failure
+ */
+void *heap_caps_calloc_prefer( size_t n, size_t size, size_t num, ... );
+
+/**
+ * @brief Dump the full structure of all heaps with matching capabilities.
+ *
+ * Prints a large amount of output to serial (because of locking limitations,
+ * the output bypasses stdout/stderr). For each (variable sized) block
+ * in each matching heap, the following output is printed on a single line:
+ *
+ * - Block address (the data buffer returned by malloc is 4 bytes after this
+ *   if heap debugging is set to Basic, or 8 bytes otherwise).
+ * - Data size (the data size may be larger than the size requested by malloc,
+ *   either due to heap fragmentation or because of heap debugging level).
+ * - Address of next block in the heap.
+ * - If the block is free, the address of the next free block is also printed.
+ *
+ * @param caps        Bitwise OR of MALLOC_CAP_* flags indicating the type
+ *                    of memory
+ */
+void heap_caps_dump(uint32_t caps);
+
+/**
+ * @brief Dump the full structure of all heaps.
+ *
+ * Covers all registered heaps. Prints a large amount of output to serial.
+ *
+ * Output is the same as for heap_caps_dump.
+ *
+ */
+void heap_caps_dump_all(void);
+
+/**
+ * @brief Return the size that a particular pointer was allocated with.
+ *
+ * @param ptr Pointer to currently allocated heap memory. Must be a pointer value previously
+ * returned by heap_caps_malloc,malloc,calloc, etc. and not yet freed.
+ *
+ * @note The app will crash with an assertion failure if the pointer is not valid.
+ *
+ * @return Size of the memory allocated at this block.
+ *
+ */
+size_t heap_caps_get_allocated_size( void *ptr );
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/heap/include/esp_heap_caps_init.h b/tools/sdk/esp32s3/include/heap/include/esp_heap_caps_init.h
new file mode 100644
index 00000000000..74e8cb9016f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/heap/include/esp_heap_caps_init.h
@@ -0,0 +1,92 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "esp_err.h"
+#include "esp_heap_caps.h"
+#include "soc/soc_memory_layout.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Initialize the capability-aware heap allocator.
+ *
+ * This is called once in the IDF startup code. Do not call it
+ * at other times.
+ */
+void heap_caps_init(void);
+
+/**
+ * @brief Enable heap(s) in memory regions where the startup stacks are located.
+ *
+ * On startup, the pro/app CPUs have a certain memory region they use as stack, so we
+ * cannot do allocations in the regions these stack frames are. When FreeRTOS is
+ * completely started, they do not use that memory anymore and heap(s) there can
+ * be enabled.
+ */
+void heap_caps_enable_nonos_stack_heaps(void);
+
+/**
+ * @brief Add a region of memory to the collection of heaps at runtime.
+ *
+ * Most memory regions are defined in soc_memory_layout.c for the SoC,
+ * and are registered via heap_caps_init(). Some regions can't be used
+ * immediately and are later enabled via heap_caps_enable_nonos_stack_heaps().
+ *
+ * Call this function to add a region of memory to the heap at some later time.
+ *
+ * This function does not consider any of the "reserved" regions or other data in soc_memory_layout, caller needs to
+ * consider this themselves.
+ *
+ * All memory within the region specified by start & end parameters must be otherwise unused.
+ *
+ * The capabilities of the newly registered memory will be determined by the start address, as looked up in the regions
+ * specified in soc_memory_layout.c.
+ *
+ * Use heap_caps_add_region_with_caps() to register a region with custom capabilities.
+ *
+ * @param start Start address of new region.
+ * @param end End address of new region.
+ *
+ * @return ESP_OK on success, ESP_ERR_INVALID_ARG if a parameter is invalid, ESP_ERR_NOT_FOUND if the
+ * specified start address doesn't reside in a known region, or any error returned by heap_caps_add_region_with_caps().
+ */
+esp_err_t heap_caps_add_region(intptr_t start, intptr_t end);
+
+
+/**
+ * @brief Add a region of memory to the collection of heaps at runtime, with custom capabilities.
+ *
+ * Similar to heap_caps_add_region(), only custom memory capabilities are specified by the caller.
+ *
+ * @param caps Ordered array of capability masks for the new region, in order of priority. Must have length
+ * SOC_MEMORY_TYPE_NO_PRIOS. Does not need to remain valid after the call returns.
+ * @param start Start address of new region.
+ * @param end End address of new region.
+ *
+ * @return
+ *         - ESP_OK on success
+ *         - ESP_ERR_INVALID_ARG if a parameter is invalid
+ *         - ESP_ERR_NO_MEM if no memory to register new heap.
+ *         - ESP_ERR_INVALID_SIZE if the memory region is too small to fit a heap
+ *         - ESP_FAIL if region overlaps the start and/or end of an existing region
+ */
+esp_err_t heap_caps_add_region_with_caps(const uint32_t caps[], intptr_t start, intptr_t end);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/heap/include/esp_heap_task_info.h b/tools/sdk/esp32s3/include/heap/include/esp_heap_task_info.h
new file mode 100644
index 00000000000..fca9a43ba66
--- /dev/null
+++ b/tools/sdk/esp32s3/include/heap/include/esp_heap_task_info.h
@@ -0,0 +1,98 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#ifdef CONFIG_HEAP_TASK_TRACKING
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// This macro controls how much space is provided for partitioning the per-task
+// heap allocation info according to one or more sets of heap capabilities.
+#define NUM_HEAP_TASK_CAPS 4
+
+/** @brief Structure to collect per-task heap allocation totals partitioned by selected caps */
+typedef struct {
+    TaskHandle_t task;                ///< Task to which these totals belong
+    size_t size[NUM_HEAP_TASK_CAPS];  ///< Total allocations partitioned by selected caps
+    size_t count[NUM_HEAP_TASK_CAPS]; ///< Number of blocks partitioned by selected caps
+} heap_task_totals_t;
+
+/** @brief Structure providing details about a block allocated by a task */
+typedef struct {
+    TaskHandle_t task;                ///< Task that allocated the block
+    void *address;                    ///< User address of allocated block
+    uint32_t size;                    ///< Size of the allocated block
+} heap_task_block_t;
+
+/** @brief Structure to provide parameters to heap_caps_get_per_task_info
+ *
+ * The 'caps' and 'mask' arrays allow partitioning the per-task heap allocation
+ * totals by selected sets of heap region capabilities so that totals for
+ * multiple regions can be accumulated in one scan.  The capabilities flags for
+ * each region ANDed with mask[i] are compared to caps[i] in order; the
+ * allocations in that region are added to totals->size[i] and totals->count[i]
+ * for the first i that matches.  To collect the totals without any
+ * partitioning, set mask[0] and caps[0] both to zero.  The allocation totals
+ * are returned in the 'totals' array of heap_task_totals_t structs.  To allow
+ * easily comparing the totals array between consecutive calls, that array can
+ * be left populated from one call to the next so the order of tasks is the
+ * same even if some tasks have freed their blocks or have been deleted.  The
+ * number of blocks prepopulated is given by num_totals, which is updated upon
+ * return.  If there are more tasks with allocations than the capacity of the
+ * totals array (given by max_totals), information for the excess tasks will be
+ * not be collected.  The totals array pointer can be NULL if the totals are
+ * not desired.
+ *
+ * The 'tasks' array holds a list of handles for tasks whose block details are
+ * to be returned in the 'blocks' array of heap_task_block_t structs.  If the
+ * tasks array pointer is NULL, block details for all tasks will be returned up
+ * to the capacity of the buffer array, given by max_blocks.  The function
+ * return value tells the number of blocks filled into the array.  The blocks
+ * array pointer can be NULL if block details are not desired, or max_blocks
+ * can be set to zero.
+ */
+typedef struct {
+    int32_t caps[NUM_HEAP_TASK_CAPS]; ///< Array of caps for partitioning task totals
+    int32_t mask[NUM_HEAP_TASK_CAPS]; ///< Array of masks under which caps must match
+    TaskHandle_t *tasks;              ///< Array of tasks whose block info is returned
+    size_t num_tasks;                 ///< Length of tasks array
+    heap_task_totals_t *totals;       ///< Array of structs to collect task totals
+    size_t *num_totals;               ///< Number of task structs currently in array
+    size_t max_totals;                ///< Capacity of array of task totals structs
+    heap_task_block_t *blocks;        ///< Array of task block details structs
+    size_t max_blocks;                ///< Capacity of array of task block info structs
+} heap_task_info_params_t;
+
+/**
+ * @brief Return per-task heap allocation totals and lists of blocks.
+ *
+ * For each task that has allocated memory from the heap, return totals for
+ * allocations within regions matching one or more sets of capabilities.
+ *
+ * Optionally also return an array of structs providing details about each
+ * block allocated by one or more requested tasks, or by all tasks.
+ *
+ * @param params Structure to hold all the parameters for the function
+ * (@see heap_task_info_params_t).
+ * @return Number of block detail structs returned (@see heap_task_block_t).
+ */
+extern size_t heap_caps_get_per_task_info(heap_task_info_params_t *params);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // CONFIG_HEAP_TASK_TRACKING
diff --git a/tools/sdk/esp32s3/include/heap/include/esp_heap_trace.h b/tools/sdk/esp32s3/include/heap/include/esp_heap_trace.h
new file mode 100644
index 00000000000..a71f96362c1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/heap/include/esp_heap_trace.h
@@ -0,0 +1,154 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "sdkconfig.h"
+#include <stdint.h>
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(CONFIG_HEAP_TRACING) && !defined(HEAP_TRACE_SRCFILE)
+#warning "esp_heap_trace.h is included but heap tracing is disabled in menuconfig, functions are no-ops"
+#endif
+
+#ifndef CONFIG_HEAP_TRACING_STACK_DEPTH
+#define CONFIG_HEAP_TRACING_STACK_DEPTH 0
+#endif
+
+typedef enum {
+    HEAP_TRACE_ALL,
+    HEAP_TRACE_LEAKS,
+} heap_trace_mode_t;
+
+/**
+ * @brief Trace record data type. Stores information about an allocated region of memory.
+ */
+typedef struct {
+    uint32_t ccount; ///< CCOUNT of the CPU when the allocation was made. LSB (bit value 1) is the CPU number (0 or 1).
+    void *address;   ///< Address which was allocated
+    size_t size;     ///< Size of the allocation
+    void *alloced_by[CONFIG_HEAP_TRACING_STACK_DEPTH]; ///< Call stack of the caller which allocated the memory.
+    void *freed_by[CONFIG_HEAP_TRACING_STACK_DEPTH];   ///< Call stack of the caller which freed the memory (all zero if not freed.)
+} heap_trace_record_t;
+
+/**
+ * @brief Initialise heap tracing in standalone mode.
+ *
+ * This function must be called before any other heap tracing functions.
+ *
+ * To disable heap tracing and allow the buffer to be freed, stop tracing and then call heap_trace_init_standalone(NULL, 0);
+ *
+ * @param record_buffer Provide a buffer to use for heap trace data. Must remain valid any time heap tracing is enabled, meaning
+ * it must be allocated from internal memory not in PSRAM.
+ * @param num_records Size of the heap trace buffer, as number of record structures.
+ * @return
+ *  - ESP_ERR_NOT_SUPPORTED Project was compiled without heap tracing enabled in menuconfig.
+ *  - ESP_ERR_INVALID_STATE Heap tracing is currently in progress.
+ *  - ESP_OK Heap tracing initialised successfully.
+ */
+esp_err_t heap_trace_init_standalone(heap_trace_record_t *record_buffer, size_t num_records);
+
+/**
+ * @brief Initialise heap tracing in host-based mode.
+ *
+ * This function must be called before any other heap tracing functions.
+ *
+ * @return
+ *  - ESP_ERR_INVALID_STATE Heap tracing is currently in progress.
+ *  - ESP_OK Heap tracing initialised successfully.
+ */
+esp_err_t heap_trace_init_tohost(void);
+
+/**
+ * @brief Start heap tracing. All heap allocations & frees will be traced, until heap_trace_stop() is called.
+ *
+ * @note heap_trace_init_standalone() must be called to provide a valid buffer, before this function is called.
+ *
+ * @note Calling this function while heap tracing is running will reset the heap trace state and continue tracing.
+ *
+ * @param mode Mode for tracing.
+ * - HEAP_TRACE_ALL means all heap allocations and frees are traced.
+ * - HEAP_TRACE_LEAKS means only suspected memory leaks are traced. (When memory is freed, the record is removed from the trace buffer.)
+ * @return
+ * - ESP_ERR_NOT_SUPPORTED Project was compiled without heap tracing enabled in menuconfig.
+ * - ESP_ERR_INVALID_STATE A non-zero-length buffer has not been set via heap_trace_init_standalone().
+ * - ESP_OK Tracing is started.
+ */
+esp_err_t heap_trace_start(heap_trace_mode_t mode);
+
+/**
+ * @brief Stop heap tracing.
+ *
+ * @return
+ * - ESP_ERR_NOT_SUPPORTED Project was compiled without heap tracing enabled in menuconfig.
+ * - ESP_ERR_INVALID_STATE Heap tracing was not in progress.
+ * - ESP_OK Heap tracing stopped..
+ */
+esp_err_t heap_trace_stop(void);
+
+/**
+ * @brief Resume heap tracing which was previously stopped.
+ *
+ * Unlike heap_trace_start(), this function does not clear the
+ * buffer of any pre-existing trace records.
+ *
+ * The heap trace mode is the same as when heap_trace_start() was
+ * last called (or HEAP_TRACE_ALL if heap_trace_start() was never called).
+ *
+ * @return
+ * - ESP_ERR_NOT_SUPPORTED Project was compiled without heap tracing enabled in menuconfig.
+ * - ESP_ERR_INVALID_STATE Heap tracing was already started.
+ * - ESP_OK Heap tracing resumed.
+ */
+esp_err_t heap_trace_resume(void);
+
+/**
+ * @brief Return number of records in the heap trace buffer
+ *
+ * It is safe to call this function while heap tracing is running.
+ */
+size_t heap_trace_get_count(void);
+
+/**
+ * @brief Return a raw record from the heap trace buffer
+ *
+ * @note It is safe to call this function while heap tracing is running, however in HEAP_TRACE_LEAK mode record indexing may
+ * skip entries unless heap tracing is stopped first.
+ *
+ * @param index Index (zero-based) of the record to return.
+ * @param[out] record Record where the heap trace record will be copied.
+ * @return
+ * - ESP_ERR_NOT_SUPPORTED Project was compiled without heap tracing enabled in menuconfig.
+ * - ESP_ERR_INVALID_STATE Heap tracing was not initialised.
+ * - ESP_ERR_INVALID_ARG Index is out of bounds for current heap trace record count.
+ * - ESP_OK Record returned successfully.
+ */
+esp_err_t heap_trace_get(size_t index, heap_trace_record_t *record);
+
+/**
+ * @brief Dump heap trace record data to stdout
+ *
+ * @note It is safe to call this function while heap tracing is running, however in HEAP_TRACE_LEAK mode the dump may skip
+ * entries unless heap tracing is stopped first.
+ *
+ *
+ */
+void heap_trace_dump(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/heap/include/heap_memory_layout.h b/tools/sdk/esp32s3/include/heap/include/heap_memory_layout.h
new file mode 100644
index 00000000000..5ad5ad85312
--- /dev/null
+++ b/tools/sdk/esp32s3/include/heap/include/heap_memory_layout.h
@@ -0,0 +1,113 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "sdkconfig.h"
+
+#define SOC_MEMORY_TYPE_NO_PRIOS 3
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Type descriptor holds a description for a particular type of memory on a particular SoC.
+ */
+typedef struct {
+    const char *name;  ///< Name of this memory type
+    uint32_t caps[SOC_MEMORY_TYPE_NO_PRIOS]; ///< Capabilities for this memory type (as a prioritised set)
+    bool aliased_iram;   ///< If true, this is data memory that is is also mapped in IRAM
+    bool startup_stack; ///< If true, memory of this type is used for ROM stack during startup
+} soc_memory_type_desc_t;
+
+/* Constant table of tag descriptors for all this SoC's tags */
+extern const soc_memory_type_desc_t soc_memory_types[];
+extern const size_t soc_memory_type_count;
+
+/* Region descriptor holds a description for a particular region of memory on a particular SoC.
+ */
+typedef struct {
+    intptr_t start;  ///< Start address of the region
+    size_t size;            ///< Size of the region in bytes
+    size_t type;             ///< Type of the region (index into soc_memory_types array)
+    intptr_t iram_address; ///< If non-zero, is equivalent address in IRAM
+} soc_memory_region_t;
+
+extern const soc_memory_region_t soc_memory_regions[];
+extern const size_t soc_memory_region_count;
+
+/* Region descriptor holds a description for a particular region of
+   memory reserved on this SoC for a particular use (ie not available
+   for stack/heap usage.) */
+typedef struct {
+    intptr_t start;
+    intptr_t end;
+} soc_reserved_region_t;
+
+/* Use this macro to reserved a fixed region of RAM (hardcoded addresses)
+ * for a particular purpose.
+ *
+ * Usually used to mark out memory addresses needed for hardware or ROM code
+ * purposes.
+ *
+ * Don't call this macro from user code which can use normal C static allocation
+ * instead.
+ *
+ * @param START Start address to be reserved.
+ * @param END One after the address of the last byte to be reserved. (ie length of
+ * the reserved region is (END - START) in bytes.
+ * @param NAME Name for the reserved region. Must be a valid variable name,
+ * unique to this source file.
+ */
+#define SOC_RESERVE_MEMORY_REGION(START, END, NAME)     \
+    __attribute__((section(".reserved_memory_address"))) __attribute__((used)) \
+    static soc_reserved_region_t reserved_region_##NAME = { START, END };
+
+/* Return available memory regions for this SoC. Each available memory
+ * region is a contiguous piece of memory which is not being used by
+ * static data, used by ROM code, or reserved by a component using
+ * the SOC_RESERVE_MEMORY_REGION() macro.
+ *
+ * This result is soc_memory_regions[] minus all regions reserved
+ * via the SOC_RESERVE_MEMORY_REGION() macro (which may also split
+ * some regions up.)
+ *
+ * At startup, all available memory returned by this function is
+ * registered as heap space.
+ *
+ * @note OS-level startup function only, not recommended to call from
+ * app code.
+ *
+ * @param regions Pointer to an array for reading available regions into.
+ * Size of the array should be at least the result of
+ * soc_get_available_memory_region_max_count(). Entries in the array
+ * will be ordered by memory address.
+ *
+ * @return Number of entries copied to 'regions'. Will be no greater than
+ * the result of soc_get_available_memory_region_max_count().
+ */
+size_t soc_get_available_memory_regions(soc_memory_region_t *regions);
+
+/* Return the maximum number of available memory regions which could be
+ * returned by soc_get_available_memory_regions(). Used to size the
+ * array passed to that function.
+ */
+size_t soc_get_available_memory_region_max_count(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/heap/include/multi_heap.h b/tools/sdk/esp32s3/include/heap/include/multi_heap.h
new file mode 100644
index 00000000000..622191fe0cc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/heap/include/multi_heap.h
@@ -0,0 +1,190 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdbool.h>
+
+/* multi_heap is a heap implementation for handling multiple
+   heterogenous heaps in a single program.
+
+   Any contiguous block of memory can be registered as a heap.
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @brief Opaque handle to a registered heap */
+typedef struct multi_heap_info *multi_heap_handle_t;
+
+/**
+ * @brief allocate a chunk of memory with specific alignment
+ *
+ * @param heap  Handle to a registered heap.
+ * @param size  size in bytes of memory chunk
+ * @param alignment  how the memory must be aligned
+ *
+ * @return pointer to the memory allocated, NULL on failure
+ */
+void *multi_heap_aligned_alloc(multi_heap_handle_t heap, size_t size, size_t alignment);
+
+/** @brief malloc() a buffer in a given heap
+ *
+ * Semantics are the same as standard malloc(), only the returned buffer will be allocated in the specified heap.
+ *
+ * @param heap Handle to a registered heap.
+ * @param size Size of desired buffer.
+ *
+ * @return Pointer to new memory, or NULL if allocation fails.
+ */
+void *multi_heap_malloc(multi_heap_handle_t heap, size_t size);
+
+/** @brief free() a buffer aligned in a given heap.
+ *
+ * @param heap Handle to a registered heap.
+ * @param p NULL, or a pointer previously returned from multi_heap_aligned_alloc() for the same heap.
+ * @note This function is deprecated, consider using  multi_heap_free() instead
+ */
+void __attribute__((deprecated)) multi_heap_aligned_free(multi_heap_handle_t heap, void *p);
+
+/** @brief free() a buffer in a given heap.
+ *
+ * Semantics are the same as standard free(), only the argument 'p' must be NULL or have been allocated in the specified heap.
+ *
+ * @param heap Handle to a registered heap.
+ * @param p NULL, or a pointer previously returned from multi_heap_malloc() or multi_heap_realloc() for the same heap.
+ */
+void multi_heap_free(multi_heap_handle_t heap, void *p);
+
+/** @brief realloc() a buffer in a given heap.
+ *
+ * Semantics are the same as standard realloc(), only the argument 'p' must be NULL or have been allocated in the specified heap.
+ *
+ * @param heap Handle to a registered heap.
+ * @param p NULL, or a pointer previously returned from multi_heap_malloc() or multi_heap_realloc() for the same heap.
+ * @param size Desired new size for buffer.
+ *
+ * @return New buffer of 'size' containing contents of 'p', or NULL if reallocation failed.
+ */
+void *multi_heap_realloc(multi_heap_handle_t heap, void *p, size_t size);
+
+
+/** @brief Return the size that a particular pointer was allocated with.
+ *
+ * @param heap Handle to a registered heap.
+ * @param p Pointer, must have been previously returned from multi_heap_malloc() or multi_heap_realloc() for the same heap.
+ *
+ * @return Size of the memory allocated at this block. May be more than the original size argument, due
+ * to padding and minimum block sizes.
+ */
+size_t multi_heap_get_allocated_size(multi_heap_handle_t heap, void *p);
+
+
+/** @brief Register a new heap for use
+ *
+ * This function initialises a heap at the specified address, and returns a handle for future heap operations.
+ *
+ * There is no equivalent function for deregistering a heap - if all blocks in the heap are free, you can immediately start using the memory for other purposes.
+ *
+ * @param start Start address of the memory to use for a new heap.
+ * @param size Size (in bytes) of the new heap.
+ *
+ * @return Handle of a new heap ready for use, or NULL if the heap region was too small to be initialised.
+ */
+multi_heap_handle_t multi_heap_register(void *start, size_t size);
+
+
+/** @brief Associate a private lock pointer with a heap
+ *
+ * The lock argument is supplied to the MULTI_HEAP_LOCK() and MULTI_HEAP_UNLOCK() macros, defined in multi_heap_platform.h.
+ *
+ * The lock in question must be recursive.
+ *
+ * When the heap is first registered, the associated lock is NULL.
+ *
+ * @param heap Handle to a registered heap.
+ * @param lock Optional pointer to a locking structure to associate with this heap.
+ */
+void multi_heap_set_lock(multi_heap_handle_t heap, void* lock);
+
+/** @brief Dump heap information to stdout
+ *
+ * For debugging purposes, this function dumps information about every block in the heap to stdout.
+ *
+ * @param heap Handle to a registered heap.
+ */
+void multi_heap_dump(multi_heap_handle_t heap);
+
+/** @brief Check heap integrity
+ *
+ * Walks the heap and checks all heap data structures are valid. If any errors are detected, an error-specific message
+ * can be optionally printed to stderr. Print behaviour can be overriden at compile time by defining
+ * MULTI_CHECK_FAIL_PRINTF in multi_heap_platform.h.
+ *
+ * @param heap Handle to a registered heap.
+ * @param print_errors If true, errors will be printed to stderr.
+ * @return true if heap is valid, false otherwise.
+ */
+bool multi_heap_check(multi_heap_handle_t heap, bool print_errors);
+
+/** @brief Return free heap size
+ *
+ * Returns the number of bytes available in the heap.
+ *
+ * Equivalent to the total_free_bytes member returned by multi_heap_get_heap_info().
+ *
+ * Note that the heap may be fragmented, so the actual maximum size for a single malloc() may be lower. To know this
+ * size, see the largest_free_block member returned by multi_heap_get_heap_info().
+ *
+ * @param heap Handle to a registered heap.
+ * @return Number of free bytes.
+ */
+size_t multi_heap_free_size(multi_heap_handle_t heap);
+
+/** @brief Return the lifetime minimum free heap size
+ *
+ * Equivalent to the minimum_free_bytes member returned by multi_heap_get_info().
+ *
+ * Returns the lifetime "low water mark" of possible values returned from multi_free_heap_size(), for the specified
+ * heap.
+ *
+ * @param heap Handle to a registered heap.
+ * @return Number of free bytes.
+ */
+size_t multi_heap_minimum_free_size(multi_heap_handle_t heap);
+
+/** @brief Structure to access heap metadata via multi_heap_get_info */
+typedef struct {
+    size_t total_free_bytes;      ///<  Total free bytes in the heap. Equivalent to multi_free_heap_size().
+    size_t total_allocated_bytes; ///<  Total bytes allocated to data in the heap.
+    size_t largest_free_block;    ///<  Size of largest free block in the heap. This is the largest malloc-able size.
+    size_t minimum_free_bytes;    ///<  Lifetime minimum free heap size. Equivalent to multi_minimum_free_heap_size().
+    size_t allocated_blocks;      ///<  Number of (variable size) blocks allocated in the heap.
+    size_t free_blocks;           ///<  Number of (variable size) free blocks in the heap.
+    size_t total_blocks;          ///<  Total number of (variable size) blocks in the heap.
+} multi_heap_info_t;
+
+/** @brief Return metadata about a given heap
+ *
+ * Fills a multi_heap_info_t structure with information about the specified heap.
+ *
+ * @param heap Handle to a registered heap.
+ * @param info Pointer to a structure to fill with heap metadata.
+ */
+void multi_heap_get_info(multi_heap_handle_t heap, multi_heap_info_t *info);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/heap/include/soc/soc_memory_layout.h b/tools/sdk/esp32s3/include/heap/include/soc/soc_memory_layout.h
new file mode 100644
index 00000000000..189cf60222a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/heap/include/soc/soc_memory_layout.h
@@ -0,0 +1,21 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/**
+ * Compatibility header file.
+ */
+#pragma once
+
+#include "heap_memory_layout.h"
+#include "soc/soc_memory_types.h"
diff --git a/tools/sdk/esp32s3/include/idf_test/include/esp32/idf_performance_target.h b/tools/sdk/esp32s3/include/idf_test/include/esp32/idf_performance_target.h
new file mode 100644
index 00000000000..d6b64df99a7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/idf_test/include/esp32/idf_performance_target.h
@@ -0,0 +1,38 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+// AES-CBC hardware throughput (accounts for worst-case performance with PSRAM workaround)
+#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC                            8.2
+
+// SHA256 hardware throughput at 240MHz, threshold set lower than worst case
+#define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC                             8.0
+// esp_sha() time to process 32KB of input data from RAM
+#define IDF_PERFORMANCE_MAX_TIME_SHA1_32KB                                      5000
+#define IDF_PERFORMANCE_MAX_TIME_SHA512_32KB                                    4500
+
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP                               19000
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP                              190000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP                               33000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP                              360000
+#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP                               90000
+#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP                              870000
+
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            30
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     27
+
+// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
+#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
+#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32s3/include/idf_test/include/esp32c3/idf_performance_target.h b/tools/sdk/esp32s3/include/idf_test/include/esp32c3/idf_performance_target.h
new file mode 100644
index 00000000000..7fbf8b9eaf5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/idf_test/include/esp32c3/idf_performance_target.h
@@ -0,0 +1,34 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC                            43
+
+// SHA256 hardware throughput at 160 MHz, threshold set lower than worst case
+#define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC                             90
+// esp_sha() time to process 32KB of input data from RAM
+#define IDF_PERFORMANCE_MAX_TIME_SHA1_32KB                                      560
+
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP                               19000
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP                              210000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP                               45000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP                              670000
+
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
+
+// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
+#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
+#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32s3/include/idf_test/include/esp32h2/idf_performance_target.h b/tools/sdk/esp32s3/include/idf_test/include/esp32h2/idf_performance_target.h
new file mode 100644
index 00000000000..7fbf8b9eaf5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/idf_test/include/esp32h2/idf_performance_target.h
@@ -0,0 +1,34 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC                            43
+
+// SHA256 hardware throughput at 160 MHz, threshold set lower than worst case
+#define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC                             90
+// esp_sha() time to process 32KB of input data from RAM
+#define IDF_PERFORMANCE_MAX_TIME_SHA1_32KB                                      560
+
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP                               19000
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP                              210000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP                               45000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP                              670000
+
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
+
+// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
+#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
+#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32s3/include/idf_test/include/esp32s2/idf_performance_target.h b/tools/sdk/esp32s3/include/idf_test/include/esp32s2/idf_performance_target.h
new file mode 100644
index 00000000000..cd037bb47d7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/idf_test/include/esp32s2/idf_performance_target.h
@@ -0,0 +1,27 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC                            43.0
+#define IDF_PERFORMANCE_MIN_AES_GCM_CRYPT_TAG_THROUGHPUT_MBSEC                  30.0
+#define IDF_PERFORMANCE_MIN_AES_GCM_UPDATE_THROUGHPUT_MBSEC                     2.1
+
+// SHA256 hardware throughput at 240MHz, threshold set lower than worst case
+#define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC                             90.0
+// esp_sha() time to process 32KB of input data from RAM
+#define IDF_PERFORMANCE_MAX_TIME_SHA1_32KB                                      900
+#define IDF_PERFORMANCE_MAX_TIME_SHA512_32KB                                    900
+
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP                               13500
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP                              130000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP                               36000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP                              400000
+#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP                               62000
+#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP                              800000
+
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
diff --git a/tools/sdk/esp32s3/include/idf_test/include/esp32s3/idf_performance_target.h b/tools/sdk/esp32s3/include/idf_test/include/esp32s3/idf_performance_target.h
new file mode 100644
index 00000000000..d735bb27023
--- /dev/null
+++ b/tools/sdk/esp32s3/include/idf_test/include/esp32s3/idf_performance_target.h
@@ -0,0 +1,29 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC                            43
+
+// SHA256 hardware throughput at 240MHz, threshold set lower than worst case
+#define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC                             90
+// esp_sha() time to process 32KB of input data from RAM
+#define IDF_PERFORMANCE_MAX_TIME_SHA1_32KB                                      1000
+#define IDF_PERFORMANCE_MAX_TIME_SHA512_32KB                                    900
+
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP                               18000
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP                              210000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP                               45000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP                              670000
+#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP                               80000
+#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP                              1500000
+
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
+
+// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
+#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
+#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140
diff --git a/tools/sdk/esp32s3/include/idf_test/include/idf_performance.h b/tools/sdk/esp32s3/include/idf_test/include/idf_performance.h
new file mode 100644
index 00000000000..b558feb4ca3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/idf_test/include/idf_performance.h
@@ -0,0 +1,115 @@
+#pragma once
+
+/* put target-specific macros into include/target/idf_performance_target.h */
+#include "idf_performance_target.h"
+
+/* Define default values in this file with #ifndef if the value could been overwritten in the target-specific headers
+ * above. Forgetting this will produce compile-time warnings.
+ */
+
+#ifndef IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP
+#define IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP                     250
+#endif
+#ifndef IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP_PSRAM
+#define IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP_PSRAM               300
+#endif
+#ifndef IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP_UNICORE
+#define IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP_UNICORE             130
+#endif
+#ifndef IDF_PERFORMANCE_MAX_ESP_TIMER_GET_TIME_PER_CALL
+#define IDF_PERFORMANCE_MAX_ESP_TIMER_GET_TIME_PER_CALL                         1000
+#endif
+
+#ifndef IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING                               15
+#endif
+#ifndef IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA                        15
+#endif
+
+/* Due to code size & linker layout differences interacting with cache, VFS
+   microbenchmark currently runs slower with PSRAM enabled. */
+#ifndef IDF_PERFORMANCE_MAX_VFS_OPEN_WRITE_CLOSE_TIME
+#define IDF_PERFORMANCE_MAX_VFS_OPEN_WRITE_CLOSE_TIME                           20000
+#endif
+#ifndef IDF_PERFORMANCE_MAX_VFS_OPEN_WRITE_CLOSE_TIME_PSRAM
+#define IDF_PERFORMANCE_MAX_VFS_OPEN_WRITE_CLOSE_TIME_PSRAM                     25000
+#endif
+
+// throughput performance by iperf
+#ifndef IDF_PERFORMANCE_MIN_TCP_RX_THROUGHPUT
+#define IDF_PERFORMANCE_MIN_TCP_RX_THROUGHPUT                                   45
+#endif
+#ifndef IDF_PERFORMANCE_MIN_TCP_TX_THROUGHPUT
+#define IDF_PERFORMANCE_MIN_TCP_TX_THROUGHPUT                                   40
+#endif
+#ifndef IDF_PERFORMANCE_MIN_UDP_RX_THROUGHPUT
+#define IDF_PERFORMANCE_MIN_UDP_RX_THROUGHPUT                                   64
+#endif
+#ifndef IDF_PERFORMANCE_MIN_UDP_TX_THROUGHPUT
+#define IDF_PERFORMANCE_MIN_UDP_TX_THROUGHPUT                                   50
+#endif
+
+// throughput performance by ethernet iperf
+#ifndef IDF_PERFORMANCE_MIN_TCP_RX_ETH_THROUGHPUT
+#define IDF_PERFORMANCE_MIN_TCP_RX_ETH_THROUGHPUT                                   20
+#endif
+#ifndef IDF_PERFORMANCE_MIN_TCP_TX_ETH_THROUGHPUT
+#define IDF_PERFORMANCE_MIN_TCP_TX_ETH_THROUGHPUT                                   30
+#endif
+#ifndef IDF_PERFORMANCE_MIN_UDP_RX_ETH_THROUGHPUT
+#define IDF_PERFORMANCE_MIN_UDP_RX_ETH_THROUGHPUT                                   50
+#endif
+#ifndef IDF_PERFORMANCE_MIN_UDP_TX_ETH_THROUGHPUT
+#define IDF_PERFORMANCE_MIN_UDP_TX_ETH_THROUGHPUT                                   70
+#endif
+
+// events dispatched per second by event loop library
+#ifndef IDF_PERFORMANCE_MIN_EVENT_DISPATCH
+#define IDF_PERFORMANCE_MIN_EVENT_DISPATCH                                      25000
+#endif
+#ifndef IDF_PERFORMANCE_MIN_EVENT_DISPATCH_PSRAM
+#define IDF_PERFORMANCE_MIN_EVENT_DISPATCH_PSRAM                                21000
+#endif
+
+#ifndef IDF_PERFORMANCE_MAX_SPILL_REG_CYCLES
+#define IDF_PERFORMANCE_MAX_SPILL_REG_CYCLES                                    150
+#endif
+#ifndef IDF_PERFORMANCE_MAX_ISR_ENTER_CYCLES
+#define IDF_PERFORMANCE_MAX_ISR_ENTER_CYCLES                                    290
+#endif
+#ifndef IDF_PERFORMANCE_MAX_ISR_EXIT_CYCLES
+#define IDF_PERFORMANCE_MAX_ISR_EXIT_CYCLES                                     565
+#endif
+
+#ifndef IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_TOHOST_4BIT
+#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_TOHOST_4BIT                   12200
+#endif
+#ifndef IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_FRHOST_4BIT
+#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_FRHOST_4BIT                   12200
+#endif
+#ifndef IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_TOHOST_1BIT
+#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_TOHOST_1BIT                   4000
+#endif
+#ifndef IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_FRHOST_1BIT
+#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_FRHOST_1BIT                   4000
+#endif
+#ifndef IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_TOHOST_SPI
+#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_TOHOST_SPI                    1000
+#endif
+#ifndef IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_FRHOST_SPI
+#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_FRHOST_SPI                    1000
+#endif
+
+//time to perform the task selection plus context switch (from task)
+#ifndef IDF_PERFORMANCE_MAX_SCHEDULING_TIME
+#define IDF_PERFORMANCE_MAX_SCHEDULING_TIME                                     2000
+#endif
+
+#ifndef IDF_PERFORMANCE_MAX_MALLOC_DEFAULT_AVERAGE_TIME
+#define IDF_PERFORMANCE_MAX_MALLOC_DEFAULT_AVERAGE_TIME                         2600
+#endif
+
+#ifndef IDF_PERFORMANCE_MAX_FREE_DEFAULT_AVERAGE_TIME
+#define IDF_PERFORMANCE_MAX_FREE_DEFAULT_AVERAGE_TIME                           950
+#endif
diff --git a/tools/sdk/esp32s3/include/ieee802154/include/esp_ieee802154.h b/tools/sdk/esp32s3/include/ieee802154/include/esp_ieee802154.h
new file mode 100644
index 00000000000..e31a5ca37e5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/ieee802154/include/esp_ieee802154.h
@@ -0,0 +1,385 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_ieee802154_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief  Initialize the IEEE 802.15.4 subsystem.
+ *
+ */
+void esp_ieee802154_enable(void);
+
+/**
+ * @brief  Deinitialize the IEEE 802.15.4 subsystem.
+ *
+ */
+void esp_ieee802154_disable(void);
+
+/**
+ * @brief  Get the operational channel.
+ *
+ * @return The channel number (11~26).
+ *
+ */
+uint8_t esp_ieee802154_get_channel(void);
+
+/**
+ * @brief  Set the operational channel.
+ *
+ * @param[in]  channel  The channel number (11-26).
+ *
+ */
+void esp_ieee802154_set_channnel(uint8_t channel);
+
+/**
+ * @brief  Get the transmit power.
+ *
+ * @return The transmit power in dBm.
+ *
+ */
+int8_t esp_ieee802154_get_txpower(void);
+
+/**
+ * @brief  Set the transmit power.
+ *
+ * @param[in]  power  The transmit power in dBm.
+ *
+ */
+void esp_ieee802154_set_txpower(int8_t power);
+
+/**
+ * @brief  Get the promiscuous mode.
+ *
+ * @return
+ *      - True   The promiscuous mode is enabled.
+ *      - False  The promiscuous mode is disabled.
+ *
+ */
+bool esp_ieee802154_get_promiscuous(void);
+
+/**
+ * @brief  Set the promiscuous mode.
+ *
+ * @param[in]  enable  The promiscuous mode to be set.
+ *
+ */
+void esp_ieee802154_set_promiscuous(bool enable);
+
+/**
+ * @brief  Get the IEEE 802.15.4 Radio state.
+ *
+ * @return  The IEEE 802.15.4 Radio state, refer to esp_ieee802154_state_t.
+ *
+ */
+esp_ieee802154_state_t esp_ieee802154_get_state(void);
+
+/**
+ * @brief  Set the IEEE 802.15.4 Radio to sleep state.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ */
+esp_err_t esp_ieee802154_sleep(void);
+
+/**
+ * @brief  Set the IEEE 802.15.4 Radio to receive state.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ * Note: Radio will continue receiving until it receives a valid frame.
+ *       Ref to esp_ieee802154_receive_done().
+ *
+ */
+esp_err_t esp_ieee802154_receive(void);
+
+/**
+ * @brief  Transmit the given frame.
+ *
+ * @param[in]  frame  The pointer to the frame, the frame format:
+ *                    |-----------------------------------------------------------------------|
+ *                    | Len | MHR |              MAC Payload                          |  FCS  |
+ *                    |-----------------------------------------------------------------------|
+ * @param[in]  cca    Perform CCA before transmission if it's true, otherwise transmit the frame directly.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ * Note: The transmit result will be reported via esp_ieee802154_transmit_done()
+ *       or esp_ieee802154_transmit_failed().
+ *
+ */
+esp_err_t esp_ieee802154_transmit(const uint8_t *frame, bool cca);
+
+/**
+ * @brief  Set the time to wait for the ack frame.
+ *
+ * @param[in]  timeout  The time to wait for the ack frame, in symbol unit (16 us).
+ *                      Default: 0x006C, Range: 0x0000 - 0xFFFF.
+ *
+ */
+void esp_ieee802154_set_ack_timeout(uint32_t timeout);
+
+/**
+ * @brief  Get the device PAN ID.
+ *
+ * @return  The device PAN ID.
+ *
+ */
+uint16_t esp_ieee802154_get_panid(void);
+
+/**
+ * @brief  Set the device PAN ID.
+ *
+ * @param[in]  panid  The device PAN ID.
+ *
+ */
+void esp_ieee802154_set_panid(uint16_t panid);
+
+/**
+ * @brief  Get the device short address.
+ *
+ * @return  The device short address.
+ *
+ */
+uint16_t esp_ieee802154_get_short_address(void);
+
+/**
+ * @brief  Set the device short address.
+ *
+ * @param[in]  short_address  The device short address.
+ *
+ */
+void esp_ieee802154_set_short_address(uint16_t short_address);
+
+/**
+ * @brief  Get the device extended address.
+ *
+ * @param[out]  ext_addr  The pointer to the device extended address.
+ *
+ */
+void esp_ieee802154_get_extended_address(uint8_t *ext_addr);
+
+/**
+ * @brief  Set the device extended address.
+ *
+ * @param[in]  ext_addr  The pointer to the device extended address.
+ *
+ */
+void esp_ieee802154_set_extended_address(const uint8_t *ext_addr);
+
+/**
+ * @brief  Get the device coordinator.
+ *
+ * @return
+ *         - True   The coordinator is enabled.
+ *         - False  The coordinator is disabled.
+ *
+ */
+bool esp_ieee802154_get_coordinator(void);
+
+/**
+ * @brief  Set the device coordinator role.
+ *
+ * @param[in]  enable  The coordinator role to be set.
+ *
+ */
+void esp_ieee802154_set_coordinator(bool enable);
+
+/**
+ * @brief  Get the auto frame pending mode.
+ *
+ * @return  The auto frame pending mode, refer to esp_ieee802154_pending_mode_t.
+ *
+ */
+esp_ieee802154_pending_mode_t esp_ieee802154_get_pending_mode(void);
+
+/**
+ * @brief  Set the auto frame pending mode.
+ *
+ * @param[in]  pending_mode  The auto frame pending mode, refer to esp_ieee802154_pending_mode_t.
+ *
+ */
+void esp_ieee802154_set_pending_mode(esp_ieee802154_pending_mode_t pending_mode);
+
+/**
+ * @brief  Add address to the source matching table.
+ *
+ * @param[in]  addr      The pointer to the address.
+ * @param[in]  is_short  Short address or Extended address.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_ERR_NO_MEM if the pending table is full.
+ *
+ */
+esp_err_t esp_ieee802154_add_pending_addr(const uint8_t *addr, bool is_short);
+
+/**
+ * @brief  Remove address from the source matching table.
+ *
+ * @param[in]  addr      The pointer to the address.
+ * @param[in]  is_short  Short address or Extended address.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_ERR_NOT_FOUND if the address was not found from the source matching table.
+ *
+ */
+esp_err_t esp_ieee802154_clear_pending_addr(const uint8_t *addr, bool is_short);
+
+/**
+ * @brief  Clear the source matching table to empty.
+ *
+ * @param[in]  is_short  Clear Short address table or Extended address table.
+ *
+ */
+void esp_ieee802154_reset_pending_table(bool is_short);
+
+/**
+ * @brief  Get the CCA threshold.
+ *
+ * @return  The CCA threshold in dBm.
+ *
+ */
+int8_t esp_ieee802154_get_cca_threshold(void);
+
+/**
+ * @brief  Set the CCA threshold.
+ *
+ * @param[in]  cca_threshold  The CCA threshold in dBm.
+ *
+ */
+void esp_ieee802154_set_cca_threshold(int8_t cca_threshold);
+
+/**
+ * @brief  Get the CCA mode.
+ *
+ * @return  The CCA mode, refer to esp_ieee802154_cca_mode_t.
+ *
+ */
+esp_ieee802154_cca_mode_t esp_ieee802154_get_cca_mode(void);
+
+/**
+ * @brief  Set the CCA mode.
+ *
+ * @param[in]  cca_mode  The CCA mode, refer to esp_ieee802154_cca_mode_t.
+ *
+ */
+void esp_ieee802154_set_cca_mode(esp_ieee802154_cca_mode_t cca_mode);
+
+/**
+ * @brief  Enable rx_on_when_idle mode, radio will receive during idle.
+ *
+ * @param[in]  enable  Enable/Disable rx_on_when_idle mode.
+ *
+ */
+void esp_ieee802154_set_rx_when_idle(bool enable);
+
+/**
+ * @brief  Get the rx_on_when_idle mode.
+ *
+ * @return  rx_on_when_idle mode.
+ *
+ */
+bool esp_ieee802154_get_rx_when_idle(void);
+
+/**
+ * @brief  Perform energy detection.
+ *
+ * @param[in]  duration  The duration of energy detection, in symbol unit (16 us).
+ *                       The result will be reported via esp_ieee802154_energy_detect_done().
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ */
+esp_err_t esp_ieee802154_energy_detect(uint32_t duration);
+
+
+/** Below are the events generated by IEEE 802.15.4 subsystem, which are in ISR context **/
+/**
+ * @brief  A Frame was received.
+ *
+ * @param[in]  frame  The point to the received frame, frame format:
+ *                    |-----------------------------------------------------------------------|
+ *                    | Len | MHR |              MAC Payload                       (no FCS)   |
+ *                    |-----------------------------------------------------------------------|
+ * @param[in]  frame_info  More information of the received frame, refer to esp_ieee802154_frame_info_t.
+ *
+ */
+extern void esp_ieee802154_receive_done(uint8_t *frame, esp_ieee802154_frame_info_t *frame_info);
+
+/**
+ * @brief  The SFD field of the frame was received.
+ *
+ */
+extern void esp_ieee802154_receive_sfd_done(void);
+
+/**
+ * @brief  The Frame Transmission succeeded.
+ *
+ * @param[in]  frame           The pointer to the transmitted frame.
+ * @param[in]  ack             The received ACK frame, it could be NULL if the transmitted frame's AR bit is not set.
+ * @param[in]  ack_frame_info  More information of the ACK frame, refer to esp_ieee802154_frame_info_t.
+ *
+ * Note: refer to esp_ieee802154_transmit().
+ *
+ */
+extern void esp_ieee802154_transmit_done(const uint8_t *frame, const uint8_t *ack, esp_ieee802154_frame_info_t *ack_frame_info);
+
+/**
+ * @brief  The Frame Transmission failed.
+ *
+ * @param[in]  frame  The pointer to the frame.
+ * @param[in]  error  The transmission failure reason, refer to esp_ieee802154_tx_error_t.
+ *
+ * Note: refer to esp_ieee802154_transmit().
+ *
+ */
+extern void esp_ieee802154_transmit_failed(const uint8_t *frame, esp_ieee802154_tx_error_t error);
+
+/**
+ * @brief  The SFD field of the frame was transmitted.
+ *
+ */
+extern void esp_ieee802154_transmit_sfd_done(uint8_t *frame);
+
+/**
+ * @brief  The energy detection done.
+ *
+ * @param[in]  power  The detected power level, in dBm.
+ *
+ * Note: refer to esp_ieee802154_energy_detect().
+ *
+ */
+extern void esp_ieee802154_energy_detect_done(int8_t power);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/ieee802154/include/esp_ieee802154_types.h b/tools/sdk/esp32s3/include/ieee802154/include/esp_ieee802154_types.h
new file mode 100644
index 00000000000..823e3cdcf3f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/ieee802154/include/esp_ieee802154_types.h
@@ -0,0 +1,82 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief The radio state types.
+ */
+typedef enum {
+    ESP_IEEE802154_RADIO_DISABLE,   /*!< Radio not up */
+    ESP_IEEE802154_RADIO_SLEEP,     /*!< Radio in the sleep state */
+    ESP_IEEE802154_RADIO_RECEIVE,   /*!< Radio in the receive state */
+    ESP_IEEE802154_RADIO_TRANSMIT,  /*!< Radio in the transmit state */
+} esp_ieee802154_state_t;
+
+/**
+ * @brief The transmit error types.
+ */
+typedef enum {
+    ESP_IEEE802154_TX_ERR_NONE,         /*!< No transmit error */
+    ESP_IEEE802154_TX_ERR_CCA_BUSY,     /*!< Channel is busy */
+    ESP_IEEE802154_TX_ERR_ABORT,        /*!< Transmit abort */
+    ESP_IEEE802154_TX_ERR_NO_ACK,       /*!< No Ack frame received until timeout */
+    ESP_IEEE802154_TX_ERR_INVALID_ACK,  /*!< Invalid Ack frame */
+    ESP_IEEE802154_TX_ERR_COEXIST,      /*!< Rejected by coexist system */
+    ESP_IEEE802154_TX_ERR_COEXIST_REJ,  /*!< Rejected by coexist system before transmitting frame */
+    ESP_IEEE802154_TX_ERR_COEXIST_ACK,  /*!< Rejected by coexist system when receiving ack */
+} esp_ieee802154_tx_error_t;
+
+/**
+ * @brief The CCA mode types.
+ */
+typedef enum {
+    ESP_IEEE802154_CCA_MODE_CARRIER,         /*!< Carrier only */
+    ESP_IEEE802154_CCA_MODE_ED,              /*!< Energy Detect only */
+    ESP_IEEE802154_CCA_MODE_CARRIER_OR_ED,   /*!< Carrier or Energy Detect */
+    ESP_IEEE802154_CCA_MODE_CARRIER_AND_ED,  /*!< Carrier and Energy Detect */
+} esp_ieee802154_cca_mode_t;
+
+/**
+ * @brief The frame pending mode types.
+ */
+typedef enum {
+    ESP_IEEE802154_AUTO_PENDING_DISABLE,   /*!< Frame pending bit always set to 1 in the ack to Data Request */
+    ESP_IEEE802154_AUTO_PENDING_ENABLE,    /*!< Frame pending bit set to 1 if src address matches, in the ack to Data Request */
+    ESP_IEEE802154_AUTO_PENDING_ENHANCED,  /*!< Frame pending bit set to 1 if src address matches, in all ack frames */
+    ESP_IEEE802154_AUTO_PENDING_ZIGBEE,    /*!< Frame pending bit set to 0 only if src address is short address and matches in table, in the ack to Data Request */
+} esp_ieee802154_pending_mode_t;
+
+/**
+ * @brief The information of received 15.4 frame.
+ *
+ */
+typedef struct {
+    bool pending;                /*!< The frame was acked with frame pending set */
+    uint8_t channel;             /*!< Channel */
+    int8_t rssi;                 /*!< RSSI */
+    uint8_t lqi;                 /*!< LQI */
+    uint64_t timestamp;          /*!< The timestamp when the frame's SFD field was received */
+} esp_ieee802154_frame_info_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/json_parser/jsmn/include/jsmn-changed.h b/tools/sdk/esp32s3/include/jsmn/include/jsmn.h
similarity index 88%
rename from tools/sdk/esp32/include/json_parser/jsmn/include/jsmn-changed.h
rename to tools/sdk/esp32s3/include/jsmn/include/jsmn.h
index be2bf3fe9de..1df808e3946 100644
--- a/tools/sdk/esp32/include/json_parser/jsmn/include/jsmn-changed.h
+++ b/tools/sdk/esp32s3/include/jsmn/include/jsmn.h
@@ -28,8 +28,8 @@
  * @see http://zserge.com/jsmn.html
  */
 
-#ifndef __JSMN_CHANGED_H_
-#define __JSMN_CHANGED_H_
+#ifndef __JSMN_H_
+#define __JSMN_H_
 
 #include <stddef.h>
 
@@ -37,10 +37,6 @@
 extern "C" {
 #endif
 
-
-#define JSMN_PARENT_LINKS
-#define JSMN_STRICT
-
 /**
  * JSON type identifier. Basic types are:
  * 	o Object
@@ -54,7 +50,7 @@ typedef enum {
 	JSMN_ARRAY = 2,
 	JSMN_STRING = 3,
 	JSMN_PRIMITIVE = 4
-} _jsmntype_t;
+} jsmntype_t;
 
 enum jsmnerr {
 	/* Not enough tokens were provided */
@@ -72,14 +68,14 @@ enum jsmnerr {
  * @param		end		end position in JSON data string
  */
 typedef struct {
-	_jsmntype_t type;
+	jsmntype_t type;
 	int start;
 	int end;
 	int size;
 #ifdef JSMN_PARENT_LINKS
 	int parent;
 #endif
-} _jsmntok_t;
+} jsmntok_t;
 
 /**
  * JSON parser. Contains an array of token blocks available. Also stores
@@ -89,22 +85,22 @@ typedef struct {
 	unsigned int pos; /* offset in the JSON string */
 	unsigned int toknext; /* next token to allocate */
 	int toksuper; /* superior token node, e.g parent object or array */
-} _jsmn_parser;
+} jsmn_parser;
 
 /**
  * Create JSON parser over an array of tokens
  */
-void __jsmn_init(_jsmn_parser *parser);
+void jsmn_init(jsmn_parser *parser);
 
 /**
  * Run JSON parser. It parses a JSON data string into and array of tokens, each describing
  * a single JSON object.
  */
-int __jsmn_parse(_jsmn_parser *parser, const char *js, size_t len,
-		_jsmntok_t *tokens, unsigned int num_tokens);
+int jsmn_parse(jsmn_parser *parser, const char *js, size_t len,
+		jsmntok_t *tokens, unsigned int num_tokens);
 
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* __JSMN_CHANGED_H_ */
+#endif /* __JSMN_H_ */
diff --git a/tools/sdk/esp32s3/include/json/cJSON/cJSON.h b/tools/sdk/esp32s3/include/json/cJSON/cJSON.h
new file mode 100644
index 00000000000..92907a2cd38
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/cJSON.h
@@ -0,0 +1,293 @@
+/*
+  Copyright (c) 2009-2017 Dave Gamble and cJSON contributors
+
+  Permission is hereby granted, free of charge, to any person obtaining a copy
+  of this software and associated documentation files (the "Software"), to deal
+  in the Software without restriction, including without limitation the rights
+  to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+  copies of the Software, and to permit persons to whom the Software is
+  furnished to do so, subject to the following conditions:
+
+  The above copyright notice and this permission notice shall be included in
+  all copies or substantial portions of the Software.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+  THE SOFTWARE.
+*/
+
+#ifndef cJSON__h
+#define cJSON__h
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#if !defined(__WINDOWS__) && (defined(WIN32) || defined(WIN64) || defined(_MSC_VER) || defined(_WIN32))
+#define __WINDOWS__
+#endif
+
+#ifdef __WINDOWS__
+
+/* When compiling for windows, we specify a specific calling convention to avoid issues where we are being called from a project with a different default calling convention.  For windows you have 3 define options:
+
+CJSON_HIDE_SYMBOLS - Define this in the case where you don't want to ever dllexport symbols
+CJSON_EXPORT_SYMBOLS - Define this on library build when you want to dllexport symbols (default)
+CJSON_IMPORT_SYMBOLS - Define this if you want to dllimport symbol
+
+For *nix builds that support visibility attribute, you can define similar behavior by
+
+setting default visibility to hidden by adding
+-fvisibility=hidden (for gcc)
+or
+-xldscope=hidden (for sun cc)
+to CFLAGS
+
+then using the CJSON_API_VISIBILITY flag to "export" the same symbols the way CJSON_EXPORT_SYMBOLS does
+
+*/
+
+#define CJSON_CDECL __cdecl
+#define CJSON_STDCALL __stdcall
+
+/* export symbols by default, this is necessary for copy pasting the C and header file */
+#if !defined(CJSON_HIDE_SYMBOLS) && !defined(CJSON_IMPORT_SYMBOLS) && !defined(CJSON_EXPORT_SYMBOLS)
+#define CJSON_EXPORT_SYMBOLS
+#endif
+
+#if defined(CJSON_HIDE_SYMBOLS)
+#define CJSON_PUBLIC(type)   type CJSON_STDCALL
+#elif defined(CJSON_EXPORT_SYMBOLS)
+#define CJSON_PUBLIC(type)   __declspec(dllexport) type CJSON_STDCALL
+#elif defined(CJSON_IMPORT_SYMBOLS)
+#define CJSON_PUBLIC(type)   __declspec(dllimport) type CJSON_STDCALL
+#endif
+#else /* !__WINDOWS__ */
+#define CJSON_CDECL
+#define CJSON_STDCALL
+
+#if (defined(__GNUC__) || defined(__SUNPRO_CC) || defined (__SUNPRO_C)) && defined(CJSON_API_VISIBILITY)
+#define CJSON_PUBLIC(type)   __attribute__((visibility("default"))) type
+#else
+#define CJSON_PUBLIC(type) type
+#endif
+#endif
+
+/* project version */
+#define CJSON_VERSION_MAJOR 1
+#define CJSON_VERSION_MINOR 7
+#define CJSON_VERSION_PATCH 15
+
+#include <stddef.h>
+
+/* cJSON Types: */
+#define cJSON_Invalid (0)
+#define cJSON_False  (1 << 0)
+#define cJSON_True   (1 << 1)
+#define cJSON_NULL   (1 << 2)
+#define cJSON_Number (1 << 3)
+#define cJSON_String (1 << 4)
+#define cJSON_Array  (1 << 5)
+#define cJSON_Object (1 << 6)
+#define cJSON_Raw    (1 << 7) /* raw json */
+
+#define cJSON_IsReference 256
+#define cJSON_StringIsConst 512
+
+/* The cJSON structure: */
+typedef struct cJSON
+{
+    /* next/prev allow you to walk array/object chains. Alternatively, use GetArraySize/GetArrayItem/GetObjectItem */
+    struct cJSON *next;
+    struct cJSON *prev;
+    /* An array or object item will have a child pointer pointing to a chain of the items in the array/object. */
+    struct cJSON *child;
+
+    /* The type of the item, as above. */
+    int type;
+
+    /* The item's string, if type==cJSON_String  and type == cJSON_Raw */
+    char *valuestring;
+    /* writing to valueint is DEPRECATED, use cJSON_SetNumberValue instead */
+    int valueint;
+    /* The item's number, if type==cJSON_Number */
+    double valuedouble;
+
+    /* The item's name string, if this item is the child of, or is in the list of subitems of an object. */
+    char *string;
+} cJSON;
+
+typedef struct cJSON_Hooks
+{
+      /* malloc/free are CDECL on Windows regardless of the default calling convention of the compiler, so ensure the hooks allow passing those functions directly. */
+      void *(CJSON_CDECL *malloc_fn)(size_t sz);
+      void (CJSON_CDECL *free_fn)(void *ptr);
+} cJSON_Hooks;
+
+typedef int cJSON_bool;
+
+/* Limits how deeply nested arrays/objects can be before cJSON rejects to parse them.
+ * This is to prevent stack overflows. */
+#ifndef CJSON_NESTING_LIMIT
+#define CJSON_NESTING_LIMIT 1000
+#endif
+
+/* returns the version of cJSON as a string */
+CJSON_PUBLIC(const char*) cJSON_Version(void);
+
+/* Supply malloc, realloc and free functions to cJSON */
+CJSON_PUBLIC(void) cJSON_InitHooks(cJSON_Hooks* hooks);
+
+/* Memory Management: the caller is always responsible to free the results from all variants of cJSON_Parse (with cJSON_Delete) and cJSON_Print (with stdlib free, cJSON_Hooks.free_fn, or cJSON_free as appropriate). The exception is cJSON_PrintPreallocated, where the caller has full responsibility of the buffer. */
+/* Supply a block of JSON, and this returns a cJSON object you can interrogate. */
+CJSON_PUBLIC(cJSON *) cJSON_Parse(const char *value);
+CJSON_PUBLIC(cJSON *) cJSON_ParseWithLength(const char *value, size_t buffer_length);
+/* ParseWithOpts allows you to require (and check) that the JSON is null terminated, and to retrieve the pointer to the final byte parsed. */
+/* If you supply a ptr in return_parse_end and parsing fails, then return_parse_end will contain a pointer to the error so will match cJSON_GetErrorPtr(). */
+CJSON_PUBLIC(cJSON *) cJSON_ParseWithOpts(const char *value, const char **return_parse_end, cJSON_bool require_null_terminated);
+CJSON_PUBLIC(cJSON *) cJSON_ParseWithLengthOpts(const char *value, size_t buffer_length, const char **return_parse_end, cJSON_bool require_null_terminated);
+
+/* Render a cJSON entity to text for transfer/storage. */
+CJSON_PUBLIC(char *) cJSON_Print(const cJSON *item);
+/* Render a cJSON entity to text for transfer/storage without any formatting. */
+CJSON_PUBLIC(char *) cJSON_PrintUnformatted(const cJSON *item);
+/* Render a cJSON entity to text using a buffered strategy. prebuffer is a guess at the final size. guessing well reduces reallocation. fmt=0 gives unformatted, =1 gives formatted */
+CJSON_PUBLIC(char *) cJSON_PrintBuffered(const cJSON *item, int prebuffer, cJSON_bool fmt);
+/* Render a cJSON entity to text using a buffer already allocated in memory with given length. Returns 1 on success and 0 on failure. */
+/* NOTE: cJSON is not always 100% accurate in estimating how much memory it will use, so to be safe allocate 5 bytes more than you actually need */
+CJSON_PUBLIC(cJSON_bool) cJSON_PrintPreallocated(cJSON *item, char *buffer, const int length, const cJSON_bool format);
+/* Delete a cJSON entity and all subentities. */
+CJSON_PUBLIC(void) cJSON_Delete(cJSON *item);
+
+/* Returns the number of items in an array (or object). */
+CJSON_PUBLIC(int) cJSON_GetArraySize(const cJSON *array);
+/* Retrieve item number "index" from array "array". Returns NULL if unsuccessful. */
+CJSON_PUBLIC(cJSON *) cJSON_GetArrayItem(const cJSON *array, int index);
+/* Get item "string" from object. Case insensitive. */
+CJSON_PUBLIC(cJSON *) cJSON_GetObjectItem(const cJSON * const object, const char * const string);
+CJSON_PUBLIC(cJSON *) cJSON_GetObjectItemCaseSensitive(const cJSON * const object, const char * const string);
+CJSON_PUBLIC(cJSON_bool) cJSON_HasObjectItem(const cJSON *object, const char *string);
+/* For analysing failed parses. This returns a pointer to the parse error. You'll probably need to look a few chars back to make sense of it. Defined when cJSON_Parse() returns 0. 0 when cJSON_Parse() succeeds. */
+CJSON_PUBLIC(const char *) cJSON_GetErrorPtr(void);
+
+/* Check item type and return its value */
+CJSON_PUBLIC(char *) cJSON_GetStringValue(const cJSON * const item);
+CJSON_PUBLIC(double) cJSON_GetNumberValue(const cJSON * const item);
+
+/* These functions check the type of an item */
+CJSON_PUBLIC(cJSON_bool) cJSON_IsInvalid(const cJSON * const item);
+CJSON_PUBLIC(cJSON_bool) cJSON_IsFalse(const cJSON * const item);
+CJSON_PUBLIC(cJSON_bool) cJSON_IsTrue(const cJSON * const item);
+CJSON_PUBLIC(cJSON_bool) cJSON_IsBool(const cJSON * const item);
+CJSON_PUBLIC(cJSON_bool) cJSON_IsNull(const cJSON * const item);
+CJSON_PUBLIC(cJSON_bool) cJSON_IsNumber(const cJSON * const item);
+CJSON_PUBLIC(cJSON_bool) cJSON_IsString(const cJSON * const item);
+CJSON_PUBLIC(cJSON_bool) cJSON_IsArray(const cJSON * const item);
+CJSON_PUBLIC(cJSON_bool) cJSON_IsObject(const cJSON * const item);
+CJSON_PUBLIC(cJSON_bool) cJSON_IsRaw(const cJSON * const item);
+
+/* These calls create a cJSON item of the appropriate type. */
+CJSON_PUBLIC(cJSON *) cJSON_CreateNull(void);
+CJSON_PUBLIC(cJSON *) cJSON_CreateTrue(void);
+CJSON_PUBLIC(cJSON *) cJSON_CreateFalse(void);
+CJSON_PUBLIC(cJSON *) cJSON_CreateBool(cJSON_bool boolean);
+CJSON_PUBLIC(cJSON *) cJSON_CreateNumber(double num);
+CJSON_PUBLIC(cJSON *) cJSON_CreateString(const char *string);
+/* raw json */
+CJSON_PUBLIC(cJSON *) cJSON_CreateRaw(const char *raw);
+CJSON_PUBLIC(cJSON *) cJSON_CreateArray(void);
+CJSON_PUBLIC(cJSON *) cJSON_CreateObject(void);
+
+/* Create a string where valuestring references a string so
+ * it will not be freed by cJSON_Delete */
+CJSON_PUBLIC(cJSON *) cJSON_CreateStringReference(const char *string);
+/* Create an object/array that only references it's elements so
+ * they will not be freed by cJSON_Delete */
+CJSON_PUBLIC(cJSON *) cJSON_CreateObjectReference(const cJSON *child);
+CJSON_PUBLIC(cJSON *) cJSON_CreateArrayReference(const cJSON *child);
+
+/* These utilities create an Array of count items.
+ * The parameter count cannot be greater than the number of elements in the number array, otherwise array access will be out of bounds.*/
+CJSON_PUBLIC(cJSON *) cJSON_CreateIntArray(const int *numbers, int count);
+CJSON_PUBLIC(cJSON *) cJSON_CreateFloatArray(const float *numbers, int count);
+CJSON_PUBLIC(cJSON *) cJSON_CreateDoubleArray(const double *numbers, int count);
+CJSON_PUBLIC(cJSON *) cJSON_CreateStringArray(const char *const *strings, int count);
+
+/* Append item to the specified array/object. */
+CJSON_PUBLIC(cJSON_bool) cJSON_AddItemToArray(cJSON *array, cJSON *item);
+CJSON_PUBLIC(cJSON_bool) cJSON_AddItemToObject(cJSON *object, const char *string, cJSON *item);
+/* Use this when string is definitely const (i.e. a literal, or as good as), and will definitely survive the cJSON object.
+ * WARNING: When this function was used, make sure to always check that (item->type & cJSON_StringIsConst) is zero before
+ * writing to `item->string` */
+CJSON_PUBLIC(cJSON_bool) cJSON_AddItemToObjectCS(cJSON *object, const char *string, cJSON *item);
+/* Append reference to item to the specified array/object. Use this when you want to add an existing cJSON to a new cJSON, but don't want to corrupt your existing cJSON. */
+CJSON_PUBLIC(cJSON_bool) cJSON_AddItemReferenceToArray(cJSON *array, cJSON *item);
+CJSON_PUBLIC(cJSON_bool) cJSON_AddItemReferenceToObject(cJSON *object, const char *string, cJSON *item);
+
+/* Remove/Detach items from Arrays/Objects. */
+CJSON_PUBLIC(cJSON *) cJSON_DetachItemViaPointer(cJSON *parent, cJSON * const item);
+CJSON_PUBLIC(cJSON *) cJSON_DetachItemFromArray(cJSON *array, int which);
+CJSON_PUBLIC(void) cJSON_DeleteItemFromArray(cJSON *array, int which);
+CJSON_PUBLIC(cJSON *) cJSON_DetachItemFromObject(cJSON *object, const char *string);
+CJSON_PUBLIC(cJSON *) cJSON_DetachItemFromObjectCaseSensitive(cJSON *object, const char *string);
+CJSON_PUBLIC(void) cJSON_DeleteItemFromObject(cJSON *object, const char *string);
+CJSON_PUBLIC(void) cJSON_DeleteItemFromObjectCaseSensitive(cJSON *object, const char *string);
+
+/* Update array items. */
+CJSON_PUBLIC(cJSON_bool) cJSON_InsertItemInArray(cJSON *array, int which, cJSON *newitem); /* Shifts pre-existing items to the right. */
+CJSON_PUBLIC(cJSON_bool) cJSON_ReplaceItemViaPointer(cJSON * const parent, cJSON * const item, cJSON * replacement);
+CJSON_PUBLIC(cJSON_bool) cJSON_ReplaceItemInArray(cJSON *array, int which, cJSON *newitem);
+CJSON_PUBLIC(cJSON_bool) cJSON_ReplaceItemInObject(cJSON *object,const char *string,cJSON *newitem);
+CJSON_PUBLIC(cJSON_bool) cJSON_ReplaceItemInObjectCaseSensitive(cJSON *object,const char *string,cJSON *newitem);
+
+/* Duplicate a cJSON item */
+CJSON_PUBLIC(cJSON *) cJSON_Duplicate(const cJSON *item, cJSON_bool recurse);
+/* Duplicate will create a new, identical cJSON item to the one you pass, in new memory that will
+ * need to be released. With recurse!=0, it will duplicate any children connected to the item.
+ * The item->next and ->prev pointers are always zero on return from Duplicate. */
+/* Recursively compare two cJSON items for equality. If either a or b is NULL or invalid, they will be considered unequal.
+ * case_sensitive determines if object keys are treated case sensitive (1) or case insensitive (0) */
+CJSON_PUBLIC(cJSON_bool) cJSON_Compare(const cJSON * const a, const cJSON * const b, const cJSON_bool case_sensitive);
+
+/* Minify a strings, remove blank characters(such as ' ', '\t', '\r', '\n') from strings.
+ * The input pointer json cannot point to a read-only address area, such as a string constant, 
+ * but should point to a readable and writable address area. */
+CJSON_PUBLIC(void) cJSON_Minify(char *json);
+
+/* Helper functions for creating and adding items to an object at the same time.
+ * They return the added item or NULL on failure. */
+CJSON_PUBLIC(cJSON*) cJSON_AddNullToObject(cJSON * const object, const char * const name);
+CJSON_PUBLIC(cJSON*) cJSON_AddTrueToObject(cJSON * const object, const char * const name);
+CJSON_PUBLIC(cJSON*) cJSON_AddFalseToObject(cJSON * const object, const char * const name);
+CJSON_PUBLIC(cJSON*) cJSON_AddBoolToObject(cJSON * const object, const char * const name, const cJSON_bool boolean);
+CJSON_PUBLIC(cJSON*) cJSON_AddNumberToObject(cJSON * const object, const char * const name, const double number);
+CJSON_PUBLIC(cJSON*) cJSON_AddStringToObject(cJSON * const object, const char * const name, const char * const string);
+CJSON_PUBLIC(cJSON*) cJSON_AddRawToObject(cJSON * const object, const char * const name, const char * const raw);
+CJSON_PUBLIC(cJSON*) cJSON_AddObjectToObject(cJSON * const object, const char * const name);
+CJSON_PUBLIC(cJSON*) cJSON_AddArrayToObject(cJSON * const object, const char * const name);
+
+/* When assigning an integer value, it needs to be propagated to valuedouble too. */
+#define cJSON_SetIntValue(object, number) ((object) ? (object)->valueint = (object)->valuedouble = (number) : (number))
+/* helper for the cJSON_SetNumberValue macro */
+CJSON_PUBLIC(double) cJSON_SetNumberHelper(cJSON *object, double number);
+#define cJSON_SetNumberValue(object, number) ((object != NULL) ? cJSON_SetNumberHelper(object, (double)number) : (number))
+/* Change the valuestring of a cJSON_String object, only takes effect when type of object is cJSON_String */
+CJSON_PUBLIC(char*) cJSON_SetValuestring(cJSON *object, const char *valuestring);
+
+/* Macro for iterating over an array or object */
+#define cJSON_ArrayForEach(element, array) for(element = (array != NULL) ? (array)->child : NULL; element != NULL; element = element->next)
+
+/* malloc/free objects using the malloc/free functions that have been set with cJSON_InitHooks */
+CJSON_PUBLIC(void *) cJSON_malloc(size_t size);
+CJSON_PUBLIC(void) cJSON_free(void *object);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/json/cJSON/cJSON_Utils.h b/tools/sdk/esp32s3/include/json/cJSON/cJSON_Utils.h
new file mode 100644
index 00000000000..a970c650467
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/cJSON_Utils.h
@@ -0,0 +1,88 @@
+/*
+  Copyright (c) 2009-2017 Dave Gamble and cJSON contributors
+
+  Permission is hereby granted, free of charge, to any person obtaining a copy
+  of this software and associated documentation files (the "Software"), to deal
+  in the Software without restriction, including without limitation the rights
+  to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+  copies of the Software, and to permit persons to whom the Software is
+  furnished to do so, subject to the following conditions:
+
+  The above copyright notice and this permission notice shall be included in
+  all copies or substantial portions of the Software.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+  THE SOFTWARE.
+*/
+
+#ifndef cJSON_Utils__h
+#define cJSON_Utils__h
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cJSON.h"
+
+/* Implement RFC6901 (https://tools.ietf.org/html/rfc6901) JSON Pointer spec. */
+CJSON_PUBLIC(cJSON *) cJSONUtils_GetPointer(cJSON * const object, const char *pointer);
+CJSON_PUBLIC(cJSON *) cJSONUtils_GetPointerCaseSensitive(cJSON * const object, const char *pointer);
+
+/* Implement RFC6902 (https://tools.ietf.org/html/rfc6902) JSON Patch spec. */
+/* NOTE: This modifies objects in 'from' and 'to' by sorting the elements by their key */
+CJSON_PUBLIC(cJSON *) cJSONUtils_GeneratePatches(cJSON * const from, cJSON * const to);
+CJSON_PUBLIC(cJSON *) cJSONUtils_GeneratePatchesCaseSensitive(cJSON * const from, cJSON * const to);
+/* Utility for generating patch array entries. */
+CJSON_PUBLIC(void) cJSONUtils_AddPatchToArray(cJSON * const array, const char * const operation, const char * const path, const cJSON * const value);
+/* Returns 0 for success. */
+CJSON_PUBLIC(int) cJSONUtils_ApplyPatches(cJSON * const object, const cJSON * const patches);
+CJSON_PUBLIC(int) cJSONUtils_ApplyPatchesCaseSensitive(cJSON * const object, const cJSON * const patches);
+
+/*
+// Note that ApplyPatches is NOT atomic on failure. To implement an atomic ApplyPatches, use:
+//int cJSONUtils_AtomicApplyPatches(cJSON **object, cJSON *patches)
+//{
+//    cJSON *modme = cJSON_Duplicate(*object, 1);
+//    int error = cJSONUtils_ApplyPatches(modme, patches);
+//    if (!error)
+//    {
+//        cJSON_Delete(*object);
+//        *object = modme;
+//    }
+//    else
+//    {
+//        cJSON_Delete(modme);
+//    }
+//
+//    return error;
+//}
+// Code not added to library since this strategy is a LOT slower.
+*/
+
+/* Implement RFC7386 (https://tools.ietf.org/html/rfc7396) JSON Merge Patch spec. */
+/* target will be modified by patch. return value is new ptr for target. */
+CJSON_PUBLIC(cJSON *) cJSONUtils_MergePatch(cJSON *target, const cJSON * const patch);
+CJSON_PUBLIC(cJSON *) cJSONUtils_MergePatchCaseSensitive(cJSON *target, const cJSON * const patch);
+/* generates a patch to move from -> to */
+/* NOTE: This modifies objects in 'from' and 'to' by sorting the elements by their key */
+CJSON_PUBLIC(cJSON *) cJSONUtils_GenerateMergePatch(cJSON * const from, cJSON * const to);
+CJSON_PUBLIC(cJSON *) cJSONUtils_GenerateMergePatchCaseSensitive(cJSON * const from, cJSON * const to);
+
+/* Given a root object and a target object, construct a pointer from one to the other. */
+CJSON_PUBLIC(char *) cJSONUtils_FindPointerFromObjectTo(const cJSON * const object, const cJSON * const target);
+
+/* Sorts the members of the object into alphabetical order. */
+CJSON_PUBLIC(void) cJSONUtils_SortObject(cJSON * const object);
+CJSON_PUBLIC(void) cJSONUtils_SortObjectCaseSensitive(cJSON * const object);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/common.h b/tools/sdk/esp32s3/include/json/cJSON/tests/common.h
new file mode 100644
index 00000000000..4db6bf8c2d1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/common.h
@@ -0,0 +1,122 @@
+/*
+  Copyright (c) 2009-2017 Dave Gamble and cJSON contributors
+
+  Permission is hereby granted, free of charge, to any person obtaining a copy
+  of this software and associated documentation files (the "Software"), to deal
+  in the Software without restriction, including without limitation the rights
+  to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+  copies of the Software, and to permit persons to whom the Software is
+  furnished to do so, subject to the following conditions:
+
+  The above copyright notice and this permission notice shall be included in
+  all copies or substantial portions of the Software.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+  THE SOFTWARE.
+*/
+
+#ifndef CJSON_TESTS_COMMON_H
+#define CJSON_TESTS_COMMON_H
+
+#include "../cJSON.c"
+
+void reset(cJSON *item);
+void reset(cJSON *item) {
+    if ((item != NULL) && (item->child != NULL))
+    {
+        cJSON_Delete(item->child);
+    }
+    if ((item->valuestring != NULL) && !(item->type & cJSON_IsReference))
+    {
+        global_hooks.deallocate(item->valuestring);
+    }
+    if ((item->string != NULL) && !(item->type & cJSON_StringIsConst))
+    {
+        global_hooks.deallocate(item->string);
+    }
+
+    memset(item, 0, sizeof(cJSON));
+}
+
+char* read_file(const char *filename);
+char* read_file(const char *filename) {
+    FILE *file = NULL;
+    long length = 0;
+    char *content = NULL;
+    size_t read_chars = 0;
+
+    /* open in read binary mode */
+    file = fopen(filename, "rb");
+    if (file == NULL)
+    {
+        goto cleanup;
+    }
+
+    /* get the length */
+    if (fseek(file, 0, SEEK_END) != 0)
+    {
+        goto cleanup;
+    }
+    length = ftell(file);
+    if (length < 0)
+    {
+        goto cleanup;
+    }
+    if (fseek(file, 0, SEEK_SET) != 0)
+    {
+        goto cleanup;
+    }
+
+    /* allocate content buffer */
+    content = (char*)malloc((size_t)length + sizeof(""));
+    if (content == NULL)
+    {
+        goto cleanup;
+    }
+
+    /* read the file into memory */
+    read_chars = fread(content, sizeof(char), (size_t)length, file);
+    if ((long)read_chars != length)
+    {
+        free(content);
+        content = NULL;
+        goto cleanup;
+    }
+    content[read_chars] = '\0';
+
+
+cleanup:
+    if (file != NULL)
+    {
+        fclose(file);
+    }
+
+    return content;
+}
+
+/* assertion helper macros */
+#define assert_has_type(item, item_type) TEST_ASSERT_BITS_MESSAGE(0xFF, item_type, item->type, "Item doesn't have expected type.")
+#define assert_has_no_reference(item) TEST_ASSERT_BITS_MESSAGE(cJSON_IsReference, 0, item->type, "Item should not have a string as reference.")
+#define assert_has_no_const_string(item) TEST_ASSERT_BITS_MESSAGE(cJSON_StringIsConst, 0, item->type, "Item should not have a const string.")
+#define assert_has_valuestring(item) TEST_ASSERT_NOT_NULL_MESSAGE(item->valuestring, "Valuestring is NULL.")
+#define assert_has_no_valuestring(item) TEST_ASSERT_NULL_MESSAGE(item->valuestring, "Valuestring is not NULL.")
+#define assert_has_string(item) TEST_ASSERT_NOT_NULL_MESSAGE(item->string, "String is NULL")
+#define assert_has_no_string(item) TEST_ASSERT_NULL_MESSAGE(item->string, "String is not NULL.")
+#define assert_not_in_list(item) \
+	TEST_ASSERT_NULL_MESSAGE(item->next, "Linked list next pointer is not NULL.");\
+	TEST_ASSERT_NULL_MESSAGE(item->prev, "Linked list previous pointer is not NULL.")
+#define assert_has_child(item) TEST_ASSERT_NOT_NULL_MESSAGE(item->child, "Item doesn't have a child.")
+#define assert_has_no_child(item) TEST_ASSERT_NULL_MESSAGE(item->child, "Item has a child.")
+#define assert_is_invalid(item) \
+	assert_has_type(item, cJSON_Invalid);\
+	assert_not_in_list(item);\
+	assert_has_no_child(item);\
+	assert_has_no_string(item);\
+	assert_has_no_valuestring(item)
+
+#endif
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_1/src/ProductionCode.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_1/src/ProductionCode.h
new file mode 100644
index 00000000000..250ca0dc6fe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_1/src/ProductionCode.h
@@ -0,0 +1,3 @@
+
+int FindFunction_WhichIsBroken(int NumberToFind);
+int FunctionWhichReturnsLocalVariable(void);
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_1/src/ProductionCode2.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_1/src/ProductionCode2.h
new file mode 100644
index 00000000000..34ae980d182
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_1/src/ProductionCode2.h
@@ -0,0 +1,2 @@
+
+char* ThisFunctionHasNotBeenTested(int Poor, char* LittleFunction);
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_2/src/ProductionCode.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_2/src/ProductionCode.h
new file mode 100644
index 00000000000..250ca0dc6fe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_2/src/ProductionCode.h
@@ -0,0 +1,3 @@
+
+int FindFunction_WhichIsBroken(int NumberToFind);
+int FunctionWhichReturnsLocalVariable(void);
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_2/src/ProductionCode2.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_2/src/ProductionCode2.h
new file mode 100644
index 00000000000..34ae980d182
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_2/src/ProductionCode2.h
@@ -0,0 +1,2 @@
+
+char* ThisFunctionHasNotBeenTested(int Poor, char* LittleFunction);
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_3/helper/UnityHelper.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_3/helper/UnityHelper.h
new file mode 100644
index 00000000000..151611158a9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_3/helper/UnityHelper.h
@@ -0,0 +1,12 @@
+#ifndef _TESTHELPER_H
+#define _TESTHELPER_H
+
+#include "Types.h"
+
+void AssertEqualExampleStruct(const EXAMPLE_STRUCT_T expected, const EXAMPLE_STRUCT_T actual, const unsigned short line);
+
+#define UNITY_TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(expected, actual, line, message) AssertEqualExampleStruct(expected, actual, line);
+
+#define TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(expected, actual) UNITY_TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(expected, actual, __LINE__, NULL);
+
+#endif // _TESTHELPER_H
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_3/src/ProductionCode.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_3/src/ProductionCode.h
new file mode 100644
index 00000000000..250ca0dc6fe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_3/src/ProductionCode.h
@@ -0,0 +1,3 @@
+
+int FindFunction_WhichIsBroken(int NumberToFind);
+int FunctionWhichReturnsLocalVariable(void);
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_3/src/ProductionCode2.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_3/src/ProductionCode2.h
new file mode 100644
index 00000000000..34ae980d182
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/example_3/src/ProductionCode2.h
@@ -0,0 +1,2 @@
+
+char* ThisFunctionHasNotBeenTested(int Poor, char* LittleFunction);
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/unity_config.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/unity_config.h
new file mode 100644
index 00000000000..a2f161a7a72
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/examples/unity_config.h
@@ -0,0 +1,239 @@
+/* Unity Configuration
+ * As of May 11th, 2016 at ThrowTheSwitch/Unity commit 837c529
+ * Update: December 29th, 2016
+ * See Also: Unity/docs/UnityConfigurationGuide.pdf
+ *
+ * Unity is designed to run on almost anything that is targeted by a C compiler.
+ * It would be awesome if this could be done with zero configuration. While
+ * there are some targets that come close to this dream, it is sadly not
+ * universal. It is likely that you are going to need at least a couple of the
+ * configuration options described in this document.
+ *
+ * All of Unity's configuration options are `#defines`. Most of these are simple
+ * definitions. A couple are macros with arguments. They live inside the
+ * unity_internals.h header file. We don't necessarily recommend opening that
+ * file unless you really need to. That file is proof that a cross-platform
+ * library is challenging to build. From a more positive perspective, it is also
+ * proof that a great deal of complexity can be centralized primarily to one
+ * place in order to provide a more consistent and simple experience elsewhere.
+ *
+ * Using These Options
+ * It doesn't matter if you're using a target-specific compiler and a simulator
+ * or a native compiler. In either case, you've got a couple choices for
+ * configuring these options:
+ *
+ *  1. Because these options are specified via C defines, you can pass most of
+ *     these options to your compiler through command line compiler flags. Even
+ *     if you're using an embedded target that forces you to use their
+ *     overbearing IDE for all configuration, there will be a place somewhere in
+ *     your project to configure defines for your compiler.
+ *  2. You can create a custom `unity_config.h` configuration file (present in
+ *     your toolchain's search paths). In this file, you will list definitions
+ *     and macros specific to your target. All you must do is define
+ *     `UNITY_INCLUDE_CONFIG_H` and Unity will rely on `unity_config.h` for any
+ *     further definitions it may need.
+ */
+
+#ifndef UNITY_CONFIG_H
+#define UNITY_CONFIG_H
+
+/* ************************* AUTOMATIC INTEGER TYPES ***************************
+ * C's concept of an integer varies from target to target. The C Standard has
+ * rules about the `int` matching the register size of the target
+ * microprocessor. It has rules about the `int` and how its size relates to
+ * other integer types. An `int` on one target might be 16 bits while on another
+ * target it might be 64. There are more specific types in compilers compliant
+ * with C99 or later, but that's certainly not every compiler you are likely to
+ * encounter. Therefore, Unity has a number of features for helping to adjust
+ * itself to match your required integer sizes. It starts off by trying to do it
+ * automatically.
+ **************************************************************************** */
+
+/* The first attempt to guess your types is to check `limits.h`. Some compilers
+ * that don't support `stdint.h` could include `limits.h`. If you don't
+ * want Unity to check this file, define this to make it skip the inclusion.
+ * Unity looks at UINT_MAX & ULONG_MAX, which were available since C89.
+ */
+/* #define UNITY_EXCLUDE_LIMITS_H */
+
+/* The second thing that Unity does to guess your types is check `stdint.h`.
+ * This file defines `UINTPTR_MAX`, since C99, that Unity can make use of to
+ * learn about your system. It's possible you don't want it to do this or it's
+ * possible that your system doesn't support `stdint.h`. If that's the case,
+ * you're going to want to define this. That way, Unity will know to skip the
+ * inclusion of this file and you won't be left with a compiler error.
+ */
+/* #define UNITY_EXCLUDE_STDINT_H */
+
+/* ********************** MANUAL INTEGER TYPE DEFINITION ***********************
+ * If you've disabled all of the automatic options above, you're going to have
+ * to do the configuration yourself. There are just a handful of defines that
+ * you are going to specify if you don't like the defaults.
+ **************************************************************************** */
+
+ /* Define this to be the number of bits an `int` takes up on your system. The
+ * default, if not auto-detected, is 32 bits.
+ *
+ * Example:
+ */
+/* #define UNITY_INT_WIDTH 16 */
+
+/* Define this to be the number of bits a `long` takes up on your system. The
+ * default, if not autodetected, is 32 bits. This is used to figure out what
+ * kind of 64-bit support your system can handle.  Does it need to specify a
+ * `long` or a `long long` to get a 64-bit value. On 16-bit systems, this option
+ * is going to be ignored.
+ *
+ * Example:
+ */
+/* #define UNITY_LONG_WIDTH 16 */
+
+/* Define this to be the number of bits a pointer takes up on your system. The
+ * default, if not autodetected, is 32-bits. If you're getting ugly compiler
+ * warnings about casting from pointers, this is the one to look at.
+ *
+ * Example:
+ */
+/* #define UNITY_POINTER_WIDTH 64 */
+
+/* Unity will automatically include 64-bit support if it auto-detects it, or if
+ * your `int`, `long`, or pointer widths are greater than 32-bits. Define this
+ * to enable 64-bit support if none of the other options already did it for you.
+ * There can be a significant size and speed impact to enabling 64-bit support
+ * on small targets, so don't define it if you don't need it.
+ */
+/* #define UNITY_INCLUDE_64 */
+
+
+/* *************************** FLOATING POINT TYPES ****************************
+ * In the embedded world, it's not uncommon for targets to have no support for
+ * floating point operations at all or to have support that is limited to only
+ * single precision. We are able to guess integer sizes on the fly because
+ * integers are always available in at least one size. Floating point, on the
+ * other hand, is sometimes not available at all. Trying to include `float.h` on
+ * these platforms would result in an error. This leaves manual configuration as
+ * the only option.
+ **************************************************************************** */
+
+ /* By default, Unity guesses that you will want single precision floating point
+  * support, but not double precision. It's easy to change either of these using
+  * the include and exclude options here. You may include neither, just float,
+  * or both, as suits your needs.
+  */
+/* #define UNITY_EXCLUDE_FLOAT  */
+#define UNITY_INCLUDE_DOUBLE
+/* #define UNITY_EXCLUDE_DOUBLE */
+
+/* For features that are enabled, the following floating point options also
+ * become available.
+ */
+
+/* Unity aims for as small of a footprint as possible and avoids most standard
+ * library calls (some embedded platforms don't have a standard library!).
+ * Because of this, its routines for printing integer values are minimalist and
+ * hand-coded. To keep Unity universal, though, we eventually chose to develop
+ * our own floating point print routines. Still, the display of floating point
+ * values during a failure are optional. By default, Unity will print the
+ * actual results of floating point assertion failures. So a failed assertion
+ * will produce a message like "Expected 4.0 Was 4.25". If you would like less
+ * verbose failure messages for floating point assertions, use this option to
+ * give a failure message `"Values Not Within Delta"` and trim the binary size.
+ */
+/* #define UNITY_EXCLUDE_FLOAT_PRINT */
+
+/* If enabled, Unity assumes you want your `FLOAT` asserts to compare standard C
+ * floats. If your compiler supports a specialty floating point type, you can
+ * always override this behavior by using this definition.
+ *
+ * Example:
+ */
+/* #define UNITY_FLOAT_TYPE float16_t */
+
+/* If enabled, Unity assumes you want your `DOUBLE` asserts to compare standard
+ * C doubles. If you would like to change this, you can specify something else
+ * by using this option. For example, defining `UNITY_DOUBLE_TYPE` to `long
+ * double` could enable gargantuan floating point types on your 64-bit processor
+ * instead of the standard `double`.
+ *
+ * Example:
+ */
+/* #define UNITY_DOUBLE_TYPE long double */
+
+/* If you look up `UNITY_ASSERT_EQUAL_FLOAT` and `UNITY_ASSERT_EQUAL_DOUBLE` as
+ * documented in the Unity Assertion Guide, you will learn that they are not
+ * really asserting that two values are equal but rather that two values are
+ * "close enough" to equal. "Close enough" is controlled by these precision
+ * configuration options. If you are working with 32-bit floats and/or 64-bit
+ * doubles (the normal on most processors), you should have no need to change
+ * these options. They are both set to give you approximately 1 significant bit
+ * in either direction. The float precision is 0.00001 while the double is
+ * 10^-12. For further details on how this works, see the appendix of the Unity
+ * Assertion Guide.
+ *
+ * Example:
+ */
+/* #define UNITY_FLOAT_PRECISION 0.001f  */
+/* #define UNITY_DOUBLE_PRECISION 0.001f */
+
+
+/* *************************** TOOLSET CUSTOMIZATION ***************************
+ * In addition to the options listed above, there are a number of other options
+ * which will come in handy to customize Unity's behavior for your specific
+ * toolchain. It is possible that you may not need to touch any of these but
+ * certain platforms, particularly those running in simulators, may need to jump
+ * through extra hoops to operate properly. These macros will help in those
+ * situations.
+ **************************************************************************** */
+
+/* By default, Unity prints its results to `stdout` as it runs. This works
+ * perfectly fine in most situations where you are using a native compiler for
+ * testing. It works on some simulators as well so long as they have `stdout`
+ * routed back to the command line. There are times, however, where the
+ * simulator will lack support for dumping results or you will want to route
+ * results elsewhere for other reasons. In these cases, you should define the
+ * `UNITY_OUTPUT_CHAR` macro. This macro accepts a single character at a time
+ * (as an `int`, since this is the parameter type of the standard C `putchar`
+ * function most commonly used). You may replace this with whatever function
+ * call you like.
+ *
+ * Example:
+ * Say you are forced to run your test suite on an embedded processor with no
+ * `stdout` option. You decide to route your test result output to a custom
+ * serial `RS232_putc()` function you wrote like thus:
+ */
+/* #define UNITY_OUTPUT_CHAR(a)                    RS232_putc(a) */
+/* #define UNITY_OUTPUT_CHAR_HEADER_DECLARATION    RS232_putc(int) */
+/* #define UNITY_OUTPUT_FLUSH()                    RS232_flush() */
+/* #define UNITY_OUTPUT_FLUSH_HEADER_DECLARATION   RS232_flush(void) */
+/* #define UNITY_OUTPUT_START()                    RS232_config(115200,1,8,0) */
+/* #define UNITY_OUTPUT_COMPLETE()                 RS232_close() */
+
+/* For some targets, Unity can make the otherwise required `setUp()` and
+ * `tearDown()` functions optional. This is a nice convenience for test writers
+ * since `setUp` and `tearDown` don't often actually _do_ anything. If you're
+ * using gcc or clang, this option is automatically defined for you. Other
+ * compilers can also support this behavior, if they support a C feature called
+ * weak functions. A weak function is a function that is compiled into your
+ * executable _unless_ a non-weak version of the same function is defined
+ * elsewhere. If a non-weak version is found, the weak version is ignored as if
+ * it never existed. If your compiler supports this feature, you can let Unity
+ * know by defining `UNITY_SUPPORT_WEAK` as the function attributes that would
+ * need to be applied to identify a function as weak. If your compiler lacks
+ * support for weak functions, you will always need to define `setUp` and
+ * `tearDown` functions (though they can be and often will be just empty). The
+ * most common options for this feature are:
+ */
+/* #define UNITY_SUPPORT_WEAK weak */
+/* #define UNITY_SUPPORT_WEAK __attribute__((weak)) */
+/* #define UNITY_NO_WEAK */
+
+/* Some compilers require a custom attribute to be assigned to pointers, like
+ * `near` or `far`. In these cases, you can give Unity a safe default for these
+ * by defining this option with the attribute you would like.
+ *
+ * Example:
+ */
+/* #define UNITY_PTR_ATTRIBUTE __attribute__((far)) */
+/* #define UNITY_PTR_ATTRIBUTE near */
+
+#endif /* UNITY_CONFIG_H */
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/src/unity_fixture.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/src/unity_fixture.h
new file mode 100644
index 00000000000..6f8d6234b37
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/src/unity_fixture.h
@@ -0,0 +1,83 @@
+/* Copyright (c) 2010 James Grenning and Contributed to Unity Project
+ * ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#ifndef UNITY_FIXTURE_H_
+#define UNITY_FIXTURE_H_
+
+#include "unity.h"
+#include "unity_internals.h"
+#include "unity_fixture_malloc_overrides.h"
+#include "unity_fixture_internals.h"
+
+int UnityMain(int argc, const char* argv[], void (*runAllTests)(void));
+
+
+#define TEST_GROUP(group)\
+    static const char* TEST_GROUP_##group = #group
+
+#define TEST_SETUP(group) void TEST_##group##_SETUP(void);\
+    void TEST_##group##_SETUP(void)
+
+#define TEST_TEAR_DOWN(group) void TEST_##group##_TEAR_DOWN(void);\
+    void TEST_##group##_TEAR_DOWN(void)
+
+
+#define TEST(group, name) \
+    void TEST_##group##_##name##_(void);\
+    void TEST_##group##_##name##_run(void);\
+    void TEST_##group##_##name##_run(void)\
+    {\
+        UnityTestRunner(TEST_##group##_SETUP,\
+            TEST_##group##_##name##_,\
+            TEST_##group##_TEAR_DOWN,\
+            "TEST(" #group ", " #name ")",\
+            TEST_GROUP_##group, #name,\
+            __FILE__, __LINE__);\
+    }\
+    void  TEST_##group##_##name##_(void)
+
+#define IGNORE_TEST(group, name) \
+    void TEST_##group##_##name##_(void);\
+    void TEST_##group##_##name##_run(void);\
+    void TEST_##group##_##name##_run(void)\
+    {\
+        UnityIgnoreTest("IGNORE_TEST(" #group ", " #name ")", TEST_GROUP_##group, #name);\
+    }\
+    void TEST_##group##_##name##_(void)
+
+/* Call this for each test, insider the group runner */
+#define RUN_TEST_CASE(group, name) \
+    { void TEST_##group##_##name##_run(void);\
+      TEST_##group##_##name##_run(); }
+
+/* This goes at the bottom of each test file or in a separate c file */
+#define TEST_GROUP_RUNNER(group)\
+    void TEST_##group##_GROUP_RUNNER(void);\
+    void TEST_##group##_GROUP_RUNNER(void)
+
+/* Call this from main */
+#define RUN_TEST_GROUP(group)\
+    { void TEST_##group##_GROUP_RUNNER(void);\
+      TEST_##group##_GROUP_RUNNER(); }
+
+/* CppUTest Compatibility Macros */
+#ifndef UNITY_EXCLUDE_CPPUTEST_ASSERTS
+/* Sets a pointer and automatically restores it to its old value after teardown */
+#define UT_PTR_SET(ptr, newPointerValue)               UnityPointer_Set((void**)&(ptr), (void*)(newPointerValue), __LINE__)
+#define TEST_ASSERT_POINTERS_EQUAL(expected, actual)   TEST_ASSERT_EQUAL_PTR((expected), (actual))
+#define TEST_ASSERT_BYTES_EQUAL(expected, actual)      TEST_ASSERT_EQUAL_HEX8(0xff & (expected), 0xff & (actual))
+#define FAIL(message)                                  TEST_FAIL_MESSAGE((message))
+#define CHECK(condition)                               TEST_ASSERT_TRUE((condition))
+#define LONGS_EQUAL(expected, actual)                  TEST_ASSERT_EQUAL_INT((expected), (actual))
+#define STRCMP_EQUAL(expected, actual)                 TEST_ASSERT_EQUAL_STRING((expected), (actual))
+#define DOUBLES_EQUAL(expected, actual, delta)         TEST_ASSERT_DOUBLE_WITHIN((delta), (expected), (actual))
+#endif
+
+/* You must compile with malloc replacement, as defined in unity_fixture_malloc_overrides.h */
+void UnityMalloc_MakeMallocFailAfterCount(int count);
+
+#endif /* UNITY_FIXTURE_H_ */
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/src/unity_fixture_internals.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/src/unity_fixture_internals.h
new file mode 100644
index 00000000000..aa0d9e7c0b9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/src/unity_fixture_internals.h
@@ -0,0 +1,51 @@
+/* Copyright (c) 2010 James Grenning and Contributed to Unity Project
+ * ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#ifndef UNITY_FIXTURE_INTERNALS_H_
+#define UNITY_FIXTURE_INTERNALS_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+struct UNITY_FIXTURE_T
+{
+    int Verbose;
+    unsigned int RepeatCount;
+    const char* NameFilter;
+    const char* GroupFilter;
+};
+extern struct UNITY_FIXTURE_T UnityFixture;
+
+typedef void unityfunction(void);
+void UnityTestRunner(unityfunction* setup,
+                     unityfunction* body,
+                     unityfunction* teardown,
+                     const char* printableName,
+                     const char* group,
+                     const char* name,
+                     const char* file, unsigned int line);
+
+void UnityIgnoreTest(const char* printableName, const char* group, const char* name);
+void UnityMalloc_StartTest(void);
+void UnityMalloc_EndTest(void);
+int UnityGetCommandLineOptions(int argc, const char* argv[]);
+void UnityConcludeFixtureTest(void);
+
+void UnityPointer_Set(void** ptr, void* newValue, UNITY_LINE_TYPE line);
+void UnityPointer_UndoAllSets(void);
+void UnityPointer_Init(void);
+#ifndef UNITY_MAX_POINTERS
+#define UNITY_MAX_POINTERS 5
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* UNITY_FIXTURE_INTERNALS_H_ */
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/src/unity_fixture_malloc_overrides.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/src/unity_fixture_malloc_overrides.h
new file mode 100644
index 00000000000..7daba50aae5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/src/unity_fixture_malloc_overrides.h
@@ -0,0 +1,47 @@
+/* Copyright (c) 2010 James Grenning and Contributed to Unity Project
+ * ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#ifndef UNITY_FIXTURE_MALLOC_OVERRIDES_H_
+#define UNITY_FIXTURE_MALLOC_OVERRIDES_H_
+
+#include <stddef.h>
+
+#ifdef UNITY_EXCLUDE_STDLIB_MALLOC
+/* Define this macro to remove the use of stdlib.h, malloc, and free.
+ * Many embedded systems do not have a heap or malloc/free by default.
+ * This internal unity_malloc() provides allocated memory deterministically from
+ * the end of an array only, unity_free() only releases from end-of-array,
+ * blocks are not coalesced, and memory not freed in LIFO order is stranded. */
+    #ifndef UNITY_INTERNAL_HEAP_SIZE_BYTES
+    #define UNITY_INTERNAL_HEAP_SIZE_BYTES 256
+    #endif
+#endif
+
+/* These functions are used by the Unity Fixture to allocate and release memory
+ * on the heap and can be overridden with platform-specific implementations.
+ * For example, when using FreeRTOS UNITY_FIXTURE_MALLOC becomes pvPortMalloc()
+ * and UNITY_FIXTURE_FREE becomes vPortFree(). */
+#if !defined(UNITY_FIXTURE_MALLOC) || !defined(UNITY_FIXTURE_FREE)
+    #include <stdlib.h>
+    #define UNITY_FIXTURE_MALLOC(size) malloc(size)
+    #define UNITY_FIXTURE_FREE(ptr)    free(ptr)
+#else
+    extern void* UNITY_FIXTURE_MALLOC(size_t size);
+    extern void UNITY_FIXTURE_FREE(void* ptr);
+#endif
+
+#define malloc  unity_malloc
+#define calloc  unity_calloc
+#define realloc unity_realloc
+#define free    unity_free
+
+void* unity_malloc(size_t size);
+void* unity_calloc(size_t num, size_t size);
+void* unity_realloc(void * oldMem, size_t size);
+void unity_free(void * mem);
+
+#endif /* UNITY_FIXTURE_MALLOC_OVERRIDES_H_ */
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/test/unity_output_Spy.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/test/unity_output_Spy.h
new file mode 100644
index 00000000000..b30a7f13bbe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/extras/fixture/test/unity_output_Spy.h
@@ -0,0 +1,17 @@
+/* Copyright (c) 2010 James Grenning and Contributed to Unity Project
+ * ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#ifndef D_unity_output_Spy_H
+#define D_unity_output_Spy_H
+
+void UnityOutputCharSpy_Create(int s);
+void UnityOutputCharSpy_Destroy(void);
+void UnityOutputCharSpy_OutputChar(int c);
+const char * UnityOutputCharSpy_Get(void);
+void UnityOutputCharSpy_Enable(int enable);
+
+#endif
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/src/unity.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/src/unity.h
new file mode 100644
index 00000000000..32ff0e6df46
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/src/unity.h
@@ -0,0 +1,503 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007-14 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#ifndef UNITY_FRAMEWORK_H
+#define UNITY_FRAMEWORK_H
+#define UNITY
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "unity_internals.h"
+
+/*-------------------------------------------------------
+ * Test Setup / Teardown
+ *-------------------------------------------------------*/
+
+/* These functions are intended to be called before and after each test. */
+void setUp(void);
+void tearDown(void);
+
+/* These functions are intended to be called at the beginning and end of an
+ * entire test suite.  suiteTearDown() is passed the number of tests that
+ * failed, and its return value becomes the exit code of main(). */
+void suiteSetUp(void);
+int suiteTearDown(int num_failures);
+
+/* If the compiler supports it, the following block provides stub
+ * implementations of the above functions as weak symbols.  Note that on
+ * some platforms (MinGW for example), weak function implementations need
+ * to be in the same translation unit they are called from.  This can be
+ * achieved by defining UNITY_INCLUDE_SETUP_STUBS before including unity.h. */
+#ifdef UNITY_INCLUDE_SETUP_STUBS
+  #ifdef UNITY_WEAK_ATTRIBUTE
+    UNITY_WEAK_ATTRIBUTE void setUp(void) { }
+    UNITY_WEAK_ATTRIBUTE void tearDown(void) { }
+    UNITY_WEAK_ATTRIBUTE void suiteSetUp(void) { }
+    UNITY_WEAK_ATTRIBUTE int suiteTearDown(int num_failures) { return num_failures; }
+  #elif defined(UNITY_WEAK_PRAGMA)
+    #pragma weak setUp
+    void setUp(void) { }
+    #pragma weak tearDown
+    void tearDown(void) { }
+    #pragma weak suiteSetUp
+    void suiteSetUp(void) { }
+    #pragma weak suiteTearDown
+    int suiteTearDown(int num_failures) { return num_failures; }
+  #endif
+#endif
+
+/*-------------------------------------------------------
+ * Configuration Options
+ *-------------------------------------------------------
+ * All options described below should be passed as a compiler flag to all files using Unity. If you must add #defines, place them BEFORE the #include above.
+
+ * Integers/longs/pointers
+ *     - Unity attempts to automatically discover your integer sizes
+ *       - define UNITY_EXCLUDE_STDINT_H to stop attempting to look in <stdint.h>
+ *       - define UNITY_EXCLUDE_LIMITS_H to stop attempting to look in <limits.h>
+ *     - If you cannot use the automatic methods above, you can force Unity by using these options:
+ *       - define UNITY_SUPPORT_64
+ *       - set UNITY_INT_WIDTH
+ *       - set UNITY_LONG_WIDTH
+ *       - set UNITY_POINTER_WIDTH
+
+ * Floats
+ *     - define UNITY_EXCLUDE_FLOAT to disallow floating point comparisons
+ *     - define UNITY_FLOAT_PRECISION to specify the precision to use when doing TEST_ASSERT_EQUAL_FLOAT
+ *     - define UNITY_FLOAT_TYPE to specify doubles instead of single precision floats
+ *     - define UNITY_INCLUDE_DOUBLE to allow double floating point comparisons
+ *     - define UNITY_EXCLUDE_DOUBLE to disallow double floating point comparisons (default)
+ *     - define UNITY_DOUBLE_PRECISION to specify the precision to use when doing TEST_ASSERT_EQUAL_DOUBLE
+ *     - define UNITY_DOUBLE_TYPE to specify something other than double
+ *     - define UNITY_EXCLUDE_FLOAT_PRINT to trim binary size, won't print floating point values in errors
+
+ * Output
+ *     - by default, Unity prints to standard out with putchar.  define UNITY_OUTPUT_CHAR(a) with a different function if desired
+ *     - define UNITY_DIFFERENTIATE_FINAL_FAIL to print FAILED (vs. FAIL) at test end summary - for automated search for failure
+
+ * Optimization
+ *     - by default, line numbers are stored in unsigned shorts.  Define UNITY_LINE_TYPE with a different type if your files are huge
+ *     - by default, test and failure counters are unsigned shorts.  Define UNITY_COUNTER_TYPE with a different type if you want to save space or have more than 65535 Tests.
+
+ * Test Cases
+ *     - define UNITY_SUPPORT_TEST_CASES to include the TEST_CASE macro, though really it's mostly about the runner generator script
+
+ * Parameterized Tests
+ *     - you'll want to create a define of TEST_CASE(...) which basically evaluates to nothing
+
+ * Tests with Arguments
+ *     - you'll want to define UNITY_USE_COMMAND_LINE_ARGS if you have the test runner passing arguments to Unity
+
+ *-------------------------------------------------------
+ * Basic Fail and Ignore
+ *-------------------------------------------------------*/
+
+#define TEST_FAIL_MESSAGE(message)                                                                 UNITY_TEST_FAIL(__LINE__, (message))
+#define TEST_FAIL()                                                                                UNITY_TEST_FAIL(__LINE__, NULL)
+#define TEST_IGNORE_MESSAGE(message)                                                               UNITY_TEST_IGNORE(__LINE__, (message))
+#define TEST_IGNORE()                                                                              UNITY_TEST_IGNORE(__LINE__, NULL)
+#define TEST_ONLY()
+
+/* It is not necessary for you to call PASS. A PASS condition is assumed if nothing fails.
+ * This method allows you to abort a test immediately with a PASS state, ignoring the remainder of the test. */
+#define TEST_PASS()                                                                                TEST_ABORT()
+
+/* This macro does nothing, but it is useful for build tools (like Ceedling) to make use of this to figure out
+ * which files should be linked to in order to perform a test. Use it like TEST_FILE("sandwiches.c") */
+#define TEST_FILE(a)
+
+/*-------------------------------------------------------
+ * Test Asserts (simple)
+ *-------------------------------------------------------*/
+
+/* Boolean */
+#define TEST_ASSERT(condition)                                                                     UNITY_TEST_ASSERT(       (condition), __LINE__, " Expression Evaluated To FALSE")
+#define TEST_ASSERT_TRUE(condition)                                                                UNITY_TEST_ASSERT(       (condition), __LINE__, " Expected TRUE Was FALSE")
+#define TEST_ASSERT_UNLESS(condition)                                                              UNITY_TEST_ASSERT(      !(condition), __LINE__, " Expression Evaluated To TRUE")
+#define TEST_ASSERT_FALSE(condition)                                                               UNITY_TEST_ASSERT(      !(condition), __LINE__, " Expected FALSE Was TRUE")
+#define TEST_ASSERT_NULL(pointer)                                                                  UNITY_TEST_ASSERT_NULL(    (pointer), __LINE__, " Expected NULL")
+#define TEST_ASSERT_NOT_NULL(pointer)                                                              UNITY_TEST_ASSERT_NOT_NULL((pointer), __LINE__, " Expected Non-NULL")
+
+/* Integers (of all sizes) */
+#define TEST_ASSERT_EQUAL_INT(expected, actual)                                                    UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT8(expected, actual)                                                   UNITY_TEST_ASSERT_EQUAL_INT8((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT16(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_INT16((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT32(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_INT32((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT64(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_INT64((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL(expected, actual)                                                        UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL(expected, actual)                                                    UNITY_TEST_ASSERT(((expected) !=  (actual)), __LINE__, " Expected Not-Equal")
+#define TEST_ASSERT_EQUAL_UINT(expected, actual)                                                   UNITY_TEST_ASSERT_EQUAL_UINT( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT8(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_UINT8( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT16(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_UINT16( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT32(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_UINT32( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT64(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_UINT64( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX(expected, actual)                                                    UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX8(expected, actual)                                                   UNITY_TEST_ASSERT_EQUAL_HEX8( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX16(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_HEX16((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX32(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX64(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_HEX64((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BITS(mask, expected, actual)                                                   UNITY_TEST_ASSERT_BITS((mask), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BITS_HIGH(mask, actual)                                                        UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(-1), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BITS_LOW(mask, actual)                                                         UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(0), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BIT_HIGH(bit, actual)                                                          UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(-1), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BIT_LOW(bit, actual)                                                           UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(0), (actual), __LINE__, NULL)
+
+/* Integer Greater Than/ Less Than (of all sizes) */
+#define TEST_ASSERT_GREATER_THAN(threshold, actual)                                                UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT(threshold, actual)                                            UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT8(threshold, actual)                                           UNITY_TEST_ASSERT_GREATER_THAN_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT16(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT32(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT64(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT(threshold, actual)                                           UNITY_TEST_ASSERT_GREATER_THAN_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT8(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT16(threshold, actual)                                         UNITY_TEST_ASSERT_GREATER_THAN_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT32(threshold, actual)                                         UNITY_TEST_ASSERT_GREATER_THAN_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT64(threshold, actual)                                         UNITY_TEST_ASSERT_GREATER_THAN_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX8(threshold, actual)                                           UNITY_TEST_ASSERT_GREATER_THAN_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX16(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX32(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX64(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_HEX64((threshold), (actual), __LINE__, NULL)
+
+#define TEST_ASSERT_LESS_THAN(threshold, actual)                                                   UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT(threshold, actual)                                               UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT8(threshold, actual)                                              UNITY_TEST_ASSERT_SMALLER_THAN_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT16(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT32(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT64(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT(threshold, actual)                                              UNITY_TEST_ASSERT_SMALLER_THAN_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT8(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT16(threshold, actual)                                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT32(threshold, actual)                                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT64(threshold, actual)                                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX8(threshold, actual)                                              UNITY_TEST_ASSERT_SMALLER_THAN_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX16(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX32(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX64(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX64((threshold), (actual), __LINE__, NULL)
+
+#define TEST_ASSERT_GREATER_OR_EQUAL(threshold, actual)                                            UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT(threshold, actual)                                        UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT8(threshold, actual)                                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT16(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT32(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT64(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT(threshold, actual)                                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT8(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT16(threshold, actual)                                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT32(threshold, actual)                                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT64(threshold, actual)                                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX8(threshold, actual)                                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX16(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX32(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX64(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64((threshold), (actual), __LINE__, NULL)
+
+#define TEST_ASSERT_LESS_OR_EQUAL(threshold, actual)                                               UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT(threshold, actual)                                           UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT8(threshold, actual)                                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT16(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT32(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT64(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT(threshold, actual)                                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT8(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT16(threshold, actual)                                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT32(threshold, actual)                                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT64(threshold, actual)                                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX8(threshold, actual)                                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX16(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX32(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX64(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX64((threshold), (actual), __LINE__, NULL)
+
+/* Integer Ranges (of all sizes) */
+#define TEST_ASSERT_INT_WITHIN(delta, expected, actual)                                            UNITY_TEST_ASSERT_INT_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT8_WITHIN(delta, expected, actual)                                           UNITY_TEST_ASSERT_INT8_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT16_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_INT16_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT32_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_INT32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT64_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_INT64_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT_WITHIN(delta, expected, actual)                                           UNITY_TEST_ASSERT_UINT_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT8_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_UINT8_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT16_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_UINT16_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT32_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_UINT32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT64_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_UINT64_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX_WITHIN(delta, expected, actual)                                            UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX8_WITHIN(delta, expected, actual)                                           UNITY_TEST_ASSERT_HEX8_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX16_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_HEX16_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX32_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX64_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_HEX64_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+
+/* Structs and Strings */
+#define TEST_ASSERT_EQUAL_PTR(expected, actual)                                                    UNITY_TEST_ASSERT_EQUAL_PTR((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_STRING(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_STRING((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_STRING_LEN(expected, actual, len)                                        UNITY_TEST_ASSERT_EQUAL_STRING_LEN((expected), (actual), (len), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_MEMORY(expected, actual, len)                                            UNITY_TEST_ASSERT_EQUAL_MEMORY((expected), (actual), (len), __LINE__, NULL)
+
+/* Arrays */
+#define TEST_ASSERT_EQUAL_INT_ARRAY(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EQUAL_INT_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT8_ARRAY(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EQUAL_INT8_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT16_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_INT16_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT32_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_INT32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT64_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT_ARRAY(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EQUAL_UINT_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT8_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_UINT8_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT16_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT32_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_UINT32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT64_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX_ARRAY(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX8_ARRAY(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EQUAL_HEX8_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX16_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_HEX16_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX32_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX64_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_PTR_ARRAY(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EQUAL_PTR_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_STRING_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_STRING_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_MEMORY_ARRAY(expected, actual, len, num_elements)                        UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY((expected), (actual), (len), (num_elements), __LINE__, NULL)
+
+/* Arrays Compared To Single Value */
+#define TEST_ASSERT_EACH_EQUAL_INT(expected, actual, num_elements)                                 UNITY_TEST_ASSERT_EACH_EQUAL_INT((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT8(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EACH_EQUAL_INT8((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT16(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_INT16((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT32(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_INT32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT64(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_INT64((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EACH_EQUAL_UINT((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT8(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_UINT8((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT16(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_UINT16((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT32(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_UINT32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT64(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_UINT64((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX(expected, actual, num_elements)                                 UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX8(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EACH_EQUAL_HEX8((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX16(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_HEX16((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX32(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX64(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_HEX64((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_PTR(expected, actual, num_elements)                                 UNITY_TEST_ASSERT_EACH_EQUAL_PTR((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_STRING(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_STRING((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_MEMORY(expected, actual, len, num_elements)                         UNITY_TEST_ASSERT_EACH_EQUAL_MEMORY((expected), (actual), (len), (num_elements), __LINE__, NULL)
+
+/* Floating Point (If Enabled) */
+#define TEST_ASSERT_FLOAT_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_FLOAT_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_FLOAT(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_FLOAT((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_FLOAT_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_FLOAT(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_INF(actual)                                                           UNITY_TEST_ASSERT_FLOAT_IS_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NEG_INF(actual)                                                       UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NAN(actual)                                                           UNITY_TEST_ASSERT_FLOAT_IS_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_DETERMINATE(actual)                                                   UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_INF(actual)                                                       UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_NEG_INF(actual)                                                   UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_NAN(actual)                                                       UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(actual)                                               UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE((actual), __LINE__, NULL)
+
+/* Double (If Enabled) */
+#define TEST_ASSERT_DOUBLE_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_DOUBLE_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_DOUBLE(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_DOUBLE((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_DOUBLE_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_DOUBLE(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_INF(actual)                                                          UNITY_TEST_ASSERT_DOUBLE_IS_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NEG_INF(actual)                                                      UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NAN(actual)                                                          UNITY_TEST_ASSERT_DOUBLE_IS_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_DETERMINATE(actual)                                                  UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_INF(actual)                                                      UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF(actual)                                                  UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_NAN(actual)                                                      UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(actual)                                              UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE((actual), __LINE__, NULL)
+
+/*-------------------------------------------------------
+ * Test Asserts (with additional messages)
+ *-------------------------------------------------------*/
+
+/* Boolean */
+#define TEST_ASSERT_MESSAGE(condition, message)                                                    UNITY_TEST_ASSERT(       (condition), __LINE__, (message))
+#define TEST_ASSERT_TRUE_MESSAGE(condition, message)                                               UNITY_TEST_ASSERT(       (condition), __LINE__, (message))
+#define TEST_ASSERT_UNLESS_MESSAGE(condition, message)                                             UNITY_TEST_ASSERT(      !(condition), __LINE__, (message))
+#define TEST_ASSERT_FALSE_MESSAGE(condition, message)                                              UNITY_TEST_ASSERT(      !(condition), __LINE__, (message))
+#define TEST_ASSERT_NULL_MESSAGE(pointer, message)                                                 UNITY_TEST_ASSERT_NULL(    (pointer), __LINE__, (message))
+#define TEST_ASSERT_NOT_NULL_MESSAGE(pointer, message)                                             UNITY_TEST_ASSERT_NOT_NULL((pointer), __LINE__, (message))
+
+/* Integers (of all sizes) */
+#define TEST_ASSERT_EQUAL_INT_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT8_MESSAGE(expected, actual, message)                                  UNITY_TEST_ASSERT_EQUAL_INT8((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT16_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_INT16((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT32_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_INT32((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT64_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_INT64((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_MESSAGE(expected, actual, message)                                       UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT(((expected) !=  (actual)), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT_MESSAGE(expected, actual, message)                                  UNITY_TEST_ASSERT_EQUAL_UINT( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT8_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_UINT8( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT16_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_UINT16( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT32_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_UINT32( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT64_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_UINT64( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX8_MESSAGE(expected, actual, message)                                  UNITY_TEST_ASSERT_EQUAL_HEX8( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX16_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_HEX16((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX32_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX64_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_HEX64((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_BITS_MESSAGE(mask, expected, actual, message)                                  UNITY_TEST_ASSERT_BITS((mask), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_BITS_HIGH_MESSAGE(mask, actual, message)                                       UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(-1), (actual), __LINE__, (message))
+#define TEST_ASSERT_BITS_LOW_MESSAGE(mask, actual, message)                                        UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(0), (actual), __LINE__, (message))
+#define TEST_ASSERT_BIT_HIGH_MESSAGE(bit, actual, message)                                         UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(-1), (actual), __LINE__, (message))
+#define TEST_ASSERT_BIT_LOW_MESSAGE(bit, actual, message)                                          UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(0), (actual), __LINE__, (message))
+
+/* Integer Greater Than/ Less Than (of all sizes) */
+#define TEST_ASSERT_GREATER_THAN_MESSAGE(threshold, actual, message)                               UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT8_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_GREATER_THAN_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT16_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT32_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT64_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_GREATER_THAN_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT8_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT16_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_GREATER_THAN_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT32_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_GREATER_THAN_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT64_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_GREATER_THAN_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX8_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_GREATER_THAN_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX16_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX32_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX64_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_HEX64((threshold), (actual), __LINE__, (message))
+
+#define TEST_ASSERT_LESS_THAN_MESSAGE(threshold, actual, message)                                  UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT_MESSAGE(threshold, actual, message)                              UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT8_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_SMALLER_THAN_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT16_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT32_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT64_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_SMALLER_THAN_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT8_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT16_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_SMALLER_THAN_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT32_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_SMALLER_THAN_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT64_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_SMALLER_THAN_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX8_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX16_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX32_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX64_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_HEX64((threshold), (actual), __LINE__, (message))
+
+#define TEST_ASSERT_GREATER_OR_EQUAL_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT8_MESSAGE(threshold, actual, message)                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT16_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT64_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT_MESSAGE(threshold, actual, message)                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT8_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT16_MESSAGE(threshold, actual, message)                    UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT32_MESSAGE(threshold, actual, message)                    UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT64_MESSAGE(threshold, actual, message)                    UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX8_MESSAGE(threshold, actual, message)                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX16_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX32_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX64_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64((threshold), (actual), __LINE__, (message))
+
+#define TEST_ASSERT_LESS_OR_EQUAL_MESSAGE(threshold, actual, message)                              UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT8_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT16_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT32_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT64_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT8_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT16_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT32_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT64_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX8_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX16_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX32_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_THAN_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX64_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_THAN_HEX64((threshold), (actual), __LINE__, (message))
+
+/* Integer Ranges (of all sizes) */
+#define TEST_ASSERT_INT_WITHIN_MESSAGE(delta, expected, actual, message)                           UNITY_TEST_ASSERT_INT_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT8_WITHIN_MESSAGE(delta, expected, actual, message)                          UNITY_TEST_ASSERT_INT8_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT16_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_INT16_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT32_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_INT32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT64_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_INT64_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT_WITHIN_MESSAGE(delta, expected, actual, message)                          UNITY_TEST_ASSERT_UINT_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT8_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_UINT8_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT16_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_UINT16_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT32_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_UINT32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT64_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_UINT64_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX_WITHIN_MESSAGE(delta, expected, actual, message)                           UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX8_WITHIN_MESSAGE(delta, expected, actual, message)                          UNITY_TEST_ASSERT_HEX8_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX16_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_HEX16_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX32_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX64_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_HEX64_WITHIN((delta), (expected), (actual), __LINE__, (message))
+
+/* Structs and Strings */
+#define TEST_ASSERT_EQUAL_PTR_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT_EQUAL_PTR((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_STRING_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_STRING((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_STRING_LEN_MESSAGE(expected, actual, len, message)                       UNITY_TEST_ASSERT_EQUAL_STRING_LEN((expected), (actual), (len), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_MEMORY_MESSAGE(expected, actual, len, message)                           UNITY_TEST_ASSERT_EQUAL_MEMORY((expected), (actual), (len), __LINE__, (message))
+
+/* Arrays */
+#define TEST_ASSERT_EQUAL_INT_ARRAY_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EQUAL_INT_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT8_ARRAY_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EQUAL_INT8_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT16_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_INT16_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT32_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_INT32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT64_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT_ARRAY_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EQUAL_UINT_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT8_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_UINT8_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT16_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT32_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_UINT32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT64_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX_ARRAY_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX8_ARRAY_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EQUAL_HEX8_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX16_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_HEX16_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX32_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX64_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_PTR_ARRAY_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EQUAL_PTR_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_STRING_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_STRING_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_MEMORY_ARRAY_MESSAGE(expected, actual, len, num_elements, message)       UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY((expected), (actual), (len), (num_elements), __LINE__, (message))
+
+/* Arrays Compared To Single Value*/
+#define TEST_ASSERT_EACH_EQUAL_INT_MESSAGE(expected, actual, num_elements, message)                UNITY_TEST_ASSERT_EACH_EQUAL_INT((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT8_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EACH_EQUAL_INT8((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT16_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_INT16((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT32_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_INT32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT64_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_INT64((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EACH_EQUAL_UINT((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT8_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_UINT8((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT16_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_UINT16((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT32_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_UINT32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT64_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_UINT64((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX_MESSAGE(expected, actual, num_elements, message)                UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX8_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EACH_EQUAL_HEX8((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX16_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_HEX16((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX32_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX64_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_HEX64((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_PTR_MESSAGE(expected, actual, num_elements, message)                UNITY_TEST_ASSERT_EACH_EQUAL_PTR((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_STRING_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_STRING((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_MEMORY_MESSAGE(expected, actual, len, num_elements, message)        UNITY_TEST_ASSERT_EACH_EQUAL_MEMORY((expected), (actual), (len), (num_elements), __LINE__, (message))
+
+/* Floating Point (If Enabled) */
+#define TEST_ASSERT_FLOAT_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_FLOAT_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_FLOAT_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_FLOAT((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_FLOAT_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_FLOAT_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_INF_MESSAGE(actual, message)                                          UNITY_TEST_ASSERT_FLOAT_IS_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NEG_INF_MESSAGE(actual, message)                                      UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NAN_MESSAGE(actual, message)                                          UNITY_TEST_ASSERT_FLOAT_IS_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_DETERMINATE_MESSAGE(actual, message)                                  UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_INF_MESSAGE(actual, message)                                      UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_NEG_INF_MESSAGE(actual, message)                                  UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_NAN_MESSAGE(actual, message)                                      UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE_MESSAGE(actual, message)                              UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE((actual), __LINE__, (message))
+
+/* Double (If Enabled) */
+#define TEST_ASSERT_DOUBLE_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_DOUBLE_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_DOUBLE_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_DOUBLE((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_DOUBLE_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_DOUBLE_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_INF_MESSAGE(actual, message)                                         UNITY_TEST_ASSERT_DOUBLE_IS_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NEG_INF_MESSAGE(actual, message)                                     UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NAN_MESSAGE(actual, message)                                         UNITY_TEST_ASSERT_DOUBLE_IS_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_DETERMINATE_MESSAGE(actual, message)                                 UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_INF_MESSAGE(actual, message)                                     UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF_MESSAGE(actual, message)                                 UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_NAN_MESSAGE(actual, message)                                     UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE_MESSAGE(actual, message)                             UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE((actual), __LINE__, (message))
+
+/* end of UNITY_FRAMEWORK_H */
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/src/unity_internals.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/src/unity_internals.h
new file mode 100644
index 00000000000..f78cebace4e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/src/unity_internals.h
@@ -0,0 +1,870 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007-14 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#ifndef UNITY_INTERNALS_H
+#define UNITY_INTERNALS_H
+
+#include "../examples/unity_config.h"
+
+#ifndef UNITY_EXCLUDE_SETJMP_H
+#include <setjmp.h>
+#endif
+
+#ifndef UNITY_EXCLUDE_MATH_H
+#include <math.h>
+#endif
+
+/* Unity Attempts to Auto-Detect Integer Types
+ * Attempt 1: UINT_MAX, ULONG_MAX in <limits.h>, or default to 32 bits
+ * Attempt 2: UINTPTR_MAX in <stdint.h>, or default to same size as long
+ * The user may override any of these derived constants:
+ * UNITY_INT_WIDTH, UNITY_LONG_WIDTH, UNITY_POINTER_WIDTH */
+#ifndef UNITY_EXCLUDE_STDINT_H
+#include <stdint.h>
+#endif
+
+#ifndef UNITY_EXCLUDE_LIMITS_H
+#include <limits.h>
+#endif
+
+/*-------------------------------------------------------
+ * Guess Widths If Not Specified
+ *-------------------------------------------------------*/
+
+/* Determine the size of an int, if not already specified.
+ * We cannot use sizeof(int), because it is not yet defined
+ * at this stage in the translation of the C program.
+ * Therefore, infer it from UINT_MAX if possible. */
+#ifndef UNITY_INT_WIDTH
+  #ifdef UINT_MAX
+    #if (UINT_MAX == 0xFFFF)
+      #define UNITY_INT_WIDTH (16)
+    #elif (UINT_MAX == 0xFFFFFFFF)
+      #define UNITY_INT_WIDTH (32)
+    #elif (UINT_MAX == 0xFFFFFFFFFFFFFFFF)
+      #define UNITY_INT_WIDTH (64)
+    #endif
+  #else /* Set to default */
+    #define UNITY_INT_WIDTH (32)
+  #endif /* UINT_MAX */
+#endif
+
+/* Determine the size of a long, if not already specified. */
+#ifndef UNITY_LONG_WIDTH
+  #ifdef ULONG_MAX
+    #if (ULONG_MAX == 0xFFFF)
+      #define UNITY_LONG_WIDTH (16)
+    #elif (ULONG_MAX == 0xFFFFFFFF)
+      #define UNITY_LONG_WIDTH (32)
+    #elif (ULONG_MAX == 0xFFFFFFFFFFFFFFFF)
+      #define UNITY_LONG_WIDTH (64)
+    #endif
+  #else /* Set to default */
+    #define UNITY_LONG_WIDTH (32)
+  #endif /* ULONG_MAX */
+#endif
+
+/* Determine the size of a pointer, if not already specified. */
+#ifndef UNITY_POINTER_WIDTH
+  #ifdef UINTPTR_MAX
+    #if (UINTPTR_MAX <= 0xFFFF)
+      #define UNITY_POINTER_WIDTH (16)
+    #elif (UINTPTR_MAX <= 0xFFFFFFFF)
+      #define UNITY_POINTER_WIDTH (32)
+    #elif (UINTPTR_MAX <= 0xFFFFFFFFFFFFFFFF)
+      #define UNITY_POINTER_WIDTH (64)
+    #endif
+  #else /* Set to default */
+    #define UNITY_POINTER_WIDTH UNITY_LONG_WIDTH
+  #endif /* UINTPTR_MAX */
+#endif
+
+/*-------------------------------------------------------
+ * Int Support (Define types based on detected sizes)
+ *-------------------------------------------------------*/
+
+#if (UNITY_INT_WIDTH == 32)
+    typedef unsigned char   UNITY_UINT8;
+    typedef unsigned short  UNITY_UINT16;
+    typedef unsigned int    UNITY_UINT32;
+    typedef signed char     UNITY_INT8;
+    typedef signed short    UNITY_INT16;
+    typedef signed int      UNITY_INT32;
+#elif (UNITY_INT_WIDTH == 16)
+    typedef unsigned char   UNITY_UINT8;
+    typedef unsigned int    UNITY_UINT16;
+    typedef unsigned long   UNITY_UINT32;
+    typedef signed char     UNITY_INT8;
+    typedef signed int      UNITY_INT16;
+    typedef signed long     UNITY_INT32;
+#else
+    #error Invalid UNITY_INT_WIDTH specified! (16 or 32 are supported)
+#endif
+
+/*-------------------------------------------------------
+ * 64-bit Support
+ *-------------------------------------------------------*/
+
+#ifndef UNITY_SUPPORT_64
+  #if UNITY_LONG_WIDTH == 64 || UNITY_POINTER_WIDTH == 64
+    #define UNITY_SUPPORT_64
+  #endif
+#endif
+
+#ifndef UNITY_SUPPORT_64
+    /* No 64-bit Support */
+    typedef UNITY_UINT32 UNITY_UINT;
+    typedef UNITY_INT32 UNITY_INT;
+#else
+
+    /* 64-bit Support */
+  #if (UNITY_LONG_WIDTH == 32)
+    typedef unsigned long long UNITY_UINT64;
+    typedef signed long long   UNITY_INT64;
+  #elif (UNITY_LONG_WIDTH == 64)
+    typedef unsigned long      UNITY_UINT64;
+    typedef signed long        UNITY_INT64;
+  #else
+    #error Invalid UNITY_LONG_WIDTH specified! (32 or 64 are supported)
+  #endif
+    typedef UNITY_UINT64 UNITY_UINT;
+    typedef UNITY_INT64 UNITY_INT;
+
+#endif
+
+/*-------------------------------------------------------
+ * Pointer Support
+ *-------------------------------------------------------*/
+
+#if (UNITY_POINTER_WIDTH == 32)
+#define UNITY_PTR_TO_INT UNITY_INT32
+#define UNITY_DISPLAY_STYLE_POINTER UNITY_DISPLAY_STYLE_HEX32
+#elif (UNITY_POINTER_WIDTH == 64)
+#define UNITY_PTR_TO_INT UNITY_INT64
+#define UNITY_DISPLAY_STYLE_POINTER UNITY_DISPLAY_STYLE_HEX64
+#elif (UNITY_POINTER_WIDTH == 16)
+#define UNITY_PTR_TO_INT UNITY_INT16
+#define UNITY_DISPLAY_STYLE_POINTER UNITY_DISPLAY_STYLE_HEX16
+#else
+    #error Invalid UNITY_POINTER_WIDTH specified! (16, 32 or 64 are supported)
+#endif
+
+#ifndef UNITY_PTR_ATTRIBUTE
+#define UNITY_PTR_ATTRIBUTE
+#endif
+
+#ifndef UNITY_INTERNAL_PTR
+#define UNITY_INTERNAL_PTR UNITY_PTR_ATTRIBUTE const void*
+#endif
+
+/*-------------------------------------------------------
+ * Float Support
+ *-------------------------------------------------------*/
+
+#ifdef UNITY_EXCLUDE_FLOAT
+
+/* No Floating Point Support */
+#ifndef UNITY_EXCLUDE_DOUBLE
+#define UNITY_EXCLUDE_DOUBLE /* Remove double when excluding float support */
+#endif
+#ifndef UNITY_EXCLUDE_FLOAT_PRINT
+#define UNITY_EXCLUDE_FLOAT_PRINT
+#endif
+
+#else
+
+/* Floating Point Support */
+#ifndef UNITY_FLOAT_PRECISION
+#define UNITY_FLOAT_PRECISION (0.00001f)
+#endif
+#ifndef UNITY_FLOAT_TYPE
+#define UNITY_FLOAT_TYPE float
+#endif
+typedef UNITY_FLOAT_TYPE UNITY_FLOAT;
+
+/* isinf & isnan macros should be provided by math.h */
+#ifndef isinf
+/* The value of Inf - Inf is NaN */
+#define isinf(n) (isnan((n) - (n)) && !isnan(n))
+#endif
+
+#ifndef isnan
+/* NaN is the only floating point value that does NOT equal itself.
+ * Therefore if n != n, then it is NaN. */
+#define isnan(n) ((n != n) ? 1 : 0)
+#endif
+
+#endif
+
+/*-------------------------------------------------------
+ * Double Float Support
+ *-------------------------------------------------------*/
+
+/* unlike float, we DON'T include by default */
+#if defined(UNITY_EXCLUDE_DOUBLE) || !defined(UNITY_INCLUDE_DOUBLE)
+
+  /* No Floating Point Support */
+  #ifndef UNITY_EXCLUDE_DOUBLE
+  #define UNITY_EXCLUDE_DOUBLE
+  #else
+    #undef UNITY_INCLUDE_DOUBLE
+  #endif
+
+  #ifndef UNITY_EXCLUDE_FLOAT
+    #ifndef UNITY_DOUBLE_TYPE
+    #define UNITY_DOUBLE_TYPE double
+    #endif
+  typedef UNITY_FLOAT UNITY_DOUBLE;
+  /* For parameter in UnityPrintFloat(UNITY_DOUBLE), which aliases to double or float */
+  #endif
+
+#else
+
+  /* Double Floating Point Support */
+  #ifndef UNITY_DOUBLE_PRECISION
+  #define UNITY_DOUBLE_PRECISION (1e-12)
+  #endif
+
+  #ifndef UNITY_DOUBLE_TYPE
+  #define UNITY_DOUBLE_TYPE double
+  #endif
+  typedef UNITY_DOUBLE_TYPE UNITY_DOUBLE;
+
+#endif
+
+/*-------------------------------------------------------
+ * Output Method: stdout (DEFAULT)
+ *-------------------------------------------------------*/
+#ifndef UNITY_OUTPUT_CHAR
+/* Default to using putchar, which is defined in stdio.h */
+#include <stdio.h>
+#define UNITY_OUTPUT_CHAR(a) (void)putchar(a)
+#else
+  /* If defined as something else, make sure we declare it here so it's ready for use */
+  #ifdef UNITY_OUTPUT_CHAR_HEADER_DECLARATION
+extern void UNITY_OUTPUT_CHAR_HEADER_DECLARATION;
+  #endif
+#endif
+
+#ifndef UNITY_OUTPUT_FLUSH
+#ifdef UNITY_USE_FLUSH_STDOUT
+/* We want to use the stdout flush utility */
+#include <stdio.h>
+#define UNITY_OUTPUT_FLUSH() (void)fflush(stdout)
+#else
+/* We've specified nothing, therefore flush should just be ignored */
+#define UNITY_OUTPUT_FLUSH()
+#endif
+#else
+/* We've defined flush as something else, so make sure we declare it here so it's ready for use */
+#ifdef UNITY_OUTPUT_FLUSH_HEADER_DECLARATION
+extern void UNITY_OMIT_OUTPUT_FLUSH_HEADER_DECLARATION;
+#endif
+#endif
+
+#ifndef UNITY_OUTPUT_FLUSH
+#define UNITY_FLUSH_CALL()
+#else
+#define UNITY_FLUSH_CALL() UNITY_OUTPUT_FLUSH()
+#endif
+
+#ifndef UNITY_PRINT_EOL
+#define UNITY_PRINT_EOL()    UNITY_OUTPUT_CHAR('\n')
+#endif
+
+#ifndef UNITY_OUTPUT_START
+#define UNITY_OUTPUT_START()
+#endif
+
+#ifndef UNITY_OUTPUT_COMPLETE
+#define UNITY_OUTPUT_COMPLETE()
+#endif
+
+/*-------------------------------------------------------
+ * Footprint
+ *-------------------------------------------------------*/
+
+#ifndef UNITY_LINE_TYPE
+#define UNITY_LINE_TYPE UNITY_UINT
+#endif
+
+#ifndef UNITY_COUNTER_TYPE
+#define UNITY_COUNTER_TYPE UNITY_UINT
+#endif
+
+/*-------------------------------------------------------
+ * Language Features Available
+ *-------------------------------------------------------*/
+#if !defined(UNITY_WEAK_ATTRIBUTE) && !defined(UNITY_WEAK_PRAGMA)
+#   if defined(__GNUC__) || defined(__ghs__) /* __GNUC__ includes clang */
+#       if !(defined(__WIN32__) && defined(__clang__)) && !defined(__TMS470__)
+#           define UNITY_WEAK_ATTRIBUTE __attribute__((weak))
+#       endif
+#   endif
+#endif
+
+#ifdef UNITY_NO_WEAK
+#   undef UNITY_WEAK_ATTRIBUTE
+#   undef UNITY_WEAK_PRAGMA
+#endif
+
+
+/*-------------------------------------------------------
+ * Internal Structs Needed
+ *-------------------------------------------------------*/
+
+typedef void (*UnityTestFunction)(void);
+
+#define UNITY_DISPLAY_RANGE_INT  (0x10)
+#define UNITY_DISPLAY_RANGE_UINT (0x20)
+#define UNITY_DISPLAY_RANGE_HEX  (0x40)
+
+typedef enum
+{
+UNITY_DISPLAY_STYLE_INT = sizeof(int)+ UNITY_DISPLAY_RANGE_INT,
+    UNITY_DISPLAY_STYLE_INT8     = 1 + UNITY_DISPLAY_RANGE_INT,
+    UNITY_DISPLAY_STYLE_INT16    = 2 + UNITY_DISPLAY_RANGE_INT,
+    UNITY_DISPLAY_STYLE_INT32    = 4 + UNITY_DISPLAY_RANGE_INT,
+#ifdef UNITY_SUPPORT_64
+    UNITY_DISPLAY_STYLE_INT64    = 8 + UNITY_DISPLAY_RANGE_INT,
+#endif
+
+UNITY_DISPLAY_STYLE_UINT = sizeof(unsigned) + UNITY_DISPLAY_RANGE_UINT,
+    UNITY_DISPLAY_STYLE_UINT8    = 1 + UNITY_DISPLAY_RANGE_UINT,
+    UNITY_DISPLAY_STYLE_UINT16   = 2 + UNITY_DISPLAY_RANGE_UINT,
+    UNITY_DISPLAY_STYLE_UINT32   = 4 + UNITY_DISPLAY_RANGE_UINT,
+#ifdef UNITY_SUPPORT_64
+    UNITY_DISPLAY_STYLE_UINT64   = 8 + UNITY_DISPLAY_RANGE_UINT,
+#endif
+
+    UNITY_DISPLAY_STYLE_HEX8     = 1 + UNITY_DISPLAY_RANGE_HEX,
+    UNITY_DISPLAY_STYLE_HEX16    = 2 + UNITY_DISPLAY_RANGE_HEX,
+    UNITY_DISPLAY_STYLE_HEX32    = 4 + UNITY_DISPLAY_RANGE_HEX,
+#ifdef UNITY_SUPPORT_64
+    UNITY_DISPLAY_STYLE_HEX64    = 8 + UNITY_DISPLAY_RANGE_HEX,
+#endif
+
+    UNITY_DISPLAY_STYLE_UNKNOWN
+} UNITY_DISPLAY_STYLE_T;
+
+typedef enum
+{
+    UNITY_EQUAL_TO         = 1,
+    UNITY_GREATER_THAN     = 2,
+    UNITY_GREATER_OR_EQUAL = 2 + UNITY_EQUAL_TO,
+    UNITY_SMALLER_THAN     = 4,
+    UNITY_SMALLER_OR_EQUAL = 4 + UNITY_EQUAL_TO
+} UNITY_COMPARISON_T;
+
+#ifndef UNITY_EXCLUDE_FLOAT
+typedef enum UNITY_FLOAT_TRAIT
+{
+    UNITY_FLOAT_IS_NOT_INF       = 0,
+    UNITY_FLOAT_IS_INF,
+    UNITY_FLOAT_IS_NOT_NEG_INF,
+    UNITY_FLOAT_IS_NEG_INF,
+    UNITY_FLOAT_IS_NOT_NAN,
+    UNITY_FLOAT_IS_NAN,
+    UNITY_FLOAT_IS_NOT_DET,
+    UNITY_FLOAT_IS_DET,
+    UNITY_FLOAT_INVALID_TRAIT
+} UNITY_FLOAT_TRAIT_T;
+#endif
+
+typedef enum
+{
+    UNITY_ARRAY_TO_VAL = 0,
+    UNITY_ARRAY_TO_ARRAY
+} UNITY_FLAGS_T;
+
+struct UNITY_STORAGE_T
+{
+    const char* TestFile;
+    const char* CurrentTestName;
+#ifndef UNITY_EXCLUDE_DETAILS
+    const char* CurrentDetail1;
+    const char* CurrentDetail2;
+#endif
+    UNITY_LINE_TYPE CurrentTestLineNumber;
+    UNITY_COUNTER_TYPE NumberOfTests;
+    UNITY_COUNTER_TYPE TestFailures;
+    UNITY_COUNTER_TYPE TestIgnores;
+    UNITY_COUNTER_TYPE CurrentTestFailed;
+    UNITY_COUNTER_TYPE CurrentTestIgnored;
+#ifndef UNITY_EXCLUDE_SETJMP_H
+    jmp_buf AbortFrame;
+#endif
+};
+
+extern struct UNITY_STORAGE_T Unity;
+
+/*-------------------------------------------------------
+ * Test Suite Management
+ *-------------------------------------------------------*/
+
+void UnityBegin(const char* filename);
+int  UnityEnd(void);
+void UnityConcludeTest(void);
+void UnityDefaultTestRun(UnityTestFunction Func, const char* FuncName, const int FuncLineNum);
+
+/*-------------------------------------------------------
+ * Details Support
+ *-------------------------------------------------------*/
+
+#ifdef UNITY_EXCLUDE_DETAILS
+#define UNITY_CLR_DETAILS()
+#define UNITY_SET_DETAIL(d1)
+#define UNITY_SET_DETAILS(d1,d2)
+#else
+#define UNITY_CLR_DETAILS()      { Unity.CurrentDetail1 = 0;   Unity.CurrentDetail2 = 0;  }
+#define UNITY_SET_DETAIL(d1)     { Unity.CurrentDetail1 = d1;  Unity.CurrentDetail2 = 0;  }
+#define UNITY_SET_DETAILS(d1,d2) { Unity.CurrentDetail1 = d1;  Unity.CurrentDetail2 = d2; }
+
+#ifndef UNITY_DETAIL1_NAME
+#define UNITY_DETAIL1_NAME "Function"
+#endif
+
+#ifndef UNITY_DETAIL2_NAME
+#define UNITY_DETAIL2_NAME "Argument"
+#endif
+#endif
+
+/*-------------------------------------------------------
+ * Test Output
+ *-------------------------------------------------------*/
+
+void UnityPrint(const char* string);
+void UnityPrintLen(const char* string, const UNITY_UINT32 length);
+void UnityPrintMask(const UNITY_UINT mask, const UNITY_UINT number);
+void UnityPrintNumberByStyle(const UNITY_INT number, const UNITY_DISPLAY_STYLE_T style);
+void UnityPrintNumber(const UNITY_INT number);
+void UnityPrintNumberUnsigned(const UNITY_UINT number);
+void UnityPrintNumberHex(const UNITY_UINT number, const char nibbles);
+
+#ifndef UNITY_EXCLUDE_FLOAT_PRINT
+void UnityPrintFloat(const UNITY_DOUBLE input_number);
+#endif
+
+/*-------------------------------------------------------
+ * Test Assertion Functions
+ *-------------------------------------------------------
+ *  Use the macros below this section instead of calling
+ *  these directly. The macros have a consistent naming
+ *  convention and will pull in file and line information
+ *  for you. */
+
+void UnityAssertEqualNumber(const UNITY_INT expected,
+                            const UNITY_INT actual,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber,
+                            const UNITY_DISPLAY_STYLE_T style);
+
+void UnityAssertGreaterOrLessOrEqualNumber(const UNITY_INT threshold,
+                                           const UNITY_INT actual,
+                                           const UNITY_COMPARISON_T compare,
+                                           const char *msg,
+                                           const UNITY_LINE_TYPE lineNumber,
+                                           const UNITY_DISPLAY_STYLE_T style);
+
+void UnityAssertEqualIntArray(UNITY_INTERNAL_PTR expected,
+                              UNITY_INTERNAL_PTR actual,
+                              const UNITY_UINT32 num_elements,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_DISPLAY_STYLE_T style,
+                              const UNITY_FLAGS_T flags);
+
+void UnityAssertBits(const UNITY_INT mask,
+                     const UNITY_INT expected,
+                     const UNITY_INT actual,
+                     const char* msg,
+                     const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualString(const char* expected,
+                            const char* actual,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualStringLen(const char* expected,
+                            const char* actual,
+                            const UNITY_UINT32 length,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualStringArray( UNITY_INTERNAL_PTR expected,
+                                  const char** actual,
+                                  const UNITY_UINT32 num_elements,
+                                  const char* msg,
+                                  const UNITY_LINE_TYPE lineNumber,
+                                  const UNITY_FLAGS_T flags);
+
+void UnityAssertEqualMemory( UNITY_INTERNAL_PTR expected,
+                             UNITY_INTERNAL_PTR actual,
+                             const UNITY_UINT32 length,
+                             const UNITY_UINT32 num_elements,
+                             const char* msg,
+                             const UNITY_LINE_TYPE lineNumber,
+                             const UNITY_FLAGS_T flags);
+
+void UnityAssertNumbersWithin(const UNITY_UINT delta,
+                              const UNITY_INT expected,
+                              const UNITY_INT actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_DISPLAY_STYLE_T style);
+
+void UnityFail(const char* message, const UNITY_LINE_TYPE line);
+
+void UnityIgnore(const char* message, const UNITY_LINE_TYPE line);
+
+#ifndef UNITY_EXCLUDE_FLOAT
+void UnityAssertFloatsWithin(const UNITY_FLOAT delta,
+                             const UNITY_FLOAT expected,
+                             const UNITY_FLOAT actual,
+                             const char* msg,
+                             const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualFloatArray(UNITY_PTR_ATTRIBUTE const UNITY_FLOAT* expected,
+                                UNITY_PTR_ATTRIBUTE const UNITY_FLOAT* actual,
+                                const UNITY_UINT32 num_elements,
+                                const char* msg,
+                                const UNITY_LINE_TYPE lineNumber,
+                                const UNITY_FLAGS_T flags);
+
+void UnityAssertFloatSpecial(const UNITY_FLOAT actual,
+                             const char* msg,
+                             const UNITY_LINE_TYPE lineNumber,
+                             const UNITY_FLOAT_TRAIT_T style);
+#endif
+
+#ifndef UNITY_EXCLUDE_DOUBLE
+void UnityAssertDoublesWithin(const UNITY_DOUBLE delta,
+                              const UNITY_DOUBLE expected,
+                              const UNITY_DOUBLE actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualDoubleArray(UNITY_PTR_ATTRIBUTE const UNITY_DOUBLE* expected,
+                                 UNITY_PTR_ATTRIBUTE const UNITY_DOUBLE* actual,
+                                 const UNITY_UINT32 num_elements,
+                                 const char* msg,
+                                 const UNITY_LINE_TYPE lineNumber,
+                                 const UNITY_FLAGS_T flags);
+
+void UnityAssertDoubleSpecial(const UNITY_DOUBLE actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_FLOAT_TRAIT_T style);
+#endif
+
+/*-------------------------------------------------------
+ * Helpers
+ *-------------------------------------------------------*/
+
+UNITY_INTERNAL_PTR UnityNumToPtr(const UNITY_INT num, const UNITY_UINT8 size);
+#ifndef UNITY_EXCLUDE_FLOAT
+UNITY_INTERNAL_PTR UnityFloatToPtr(const float num);
+#endif
+#ifndef UNITY_EXCLUDE_DOUBLE
+UNITY_INTERNAL_PTR UnityDoubleToPtr(const double num);
+#endif
+
+/*-------------------------------------------------------
+ * Error Strings We Might Need
+ *-------------------------------------------------------*/
+
+extern const char UnityStrErrFloat[];
+extern const char UnityStrErrDouble[];
+extern const char UnityStrErr64[];
+
+/*-------------------------------------------------------
+ * Test Running Macros
+ *-------------------------------------------------------*/
+
+#ifndef UNITY_EXCLUDE_SETJMP_H
+#define TEST_PROTECT() (setjmp(Unity.AbortFrame) == 0)
+#define TEST_ABORT() longjmp(Unity.AbortFrame, 1)
+#else
+#define TEST_PROTECT() 1
+#define TEST_ABORT() return
+#endif
+
+/* This tricky series of macros gives us an optional line argument to treat it as RUN_TEST(func, num=__LINE__) */
+#ifndef RUN_TEST
+#ifdef __STDC_VERSION__
+#if __STDC_VERSION__ >= 199901L
+#define RUN_TEST(...) UnityDefaultTestRun(RUN_TEST_FIRST(__VA_ARGS__), RUN_TEST_SECOND(__VA_ARGS__))
+#define RUN_TEST_FIRST(...) RUN_TEST_FIRST_HELPER(__VA_ARGS__, throwaway)
+#define RUN_TEST_FIRST_HELPER(first, ...) (first), #first
+#define RUN_TEST_SECOND(...) RUN_TEST_SECOND_HELPER(__VA_ARGS__, __LINE__, throwaway)
+#define RUN_TEST_SECOND_HELPER(first, second, ...) (second)
+#endif
+#endif
+#endif
+
+/* If we can't do the tricky version, we'll just have to require them to always include the line number */
+#ifndef RUN_TEST
+#ifdef CMOCK
+#define RUN_TEST(func, num) UnityDefaultTestRun(func, #func, num)
+#else
+#define RUN_TEST(func) UnityDefaultTestRun(func, #func, __LINE__)
+#endif
+#endif
+
+#define TEST_LINE_NUM (Unity.CurrentTestLineNumber)
+#define TEST_IS_IGNORED (Unity.CurrentTestIgnored)
+#define UNITY_NEW_TEST(a) \
+    Unity.CurrentTestName = (a); \
+    Unity.CurrentTestLineNumber = (UNITY_LINE_TYPE)(__LINE__); \
+    Unity.NumberOfTests++;
+
+#ifndef UNITY_BEGIN
+#define UNITY_BEGIN() UnityBegin(__FILE__)
+#endif
+
+#ifndef UNITY_END
+#define UNITY_END() UnityEnd()
+#endif
+
+/*-----------------------------------------------
+ * Command Line Argument Support
+ *-----------------------------------------------*/
+
+#ifdef UNITY_USE_COMMAND_LINE_ARGS
+int UnityParseOptions(int argc, char** argv);
+int UnityTestMatches(void);
+#endif
+
+/*-------------------------------------------------------
+ * Basic Fail and Ignore
+ *-------------------------------------------------------*/
+
+#define UNITY_TEST_FAIL(line, message)   UnityFail(   (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_IGNORE(line, message) UnityIgnore( (message), (UNITY_LINE_TYPE)(line))
+
+/*-------------------------------------------------------
+ * Test Asserts
+ *-------------------------------------------------------*/
+
+#define UNITY_TEST_ASSERT(condition, line, message)                                              if (condition) {} else {UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), (message));}
+#define UNITY_TEST_ASSERT_NULL(pointer, line, message)                                           UNITY_TEST_ASSERT(((pointer) == NULL),  (UNITY_LINE_TYPE)(line), (message))
+#define UNITY_TEST_ASSERT_NOT_NULL(pointer, line, message)                                       UNITY_TEST_ASSERT(((pointer) != NULL),  (UNITY_LINE_TYPE)(line), (message))
+
+#define UNITY_TEST_ASSERT_EQUAL_INT(expected, actual, line, message)                             UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_EQUAL_INT8(expected, actual, line, message)                            UnityAssertEqualNumber((UNITY_INT)(UNITY_INT8 )(expected), (UNITY_INT)(UNITY_INT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_EQUAL_INT16(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT16)(expected), (UNITY_INT)(UNITY_INT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_EQUAL_INT32(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT32)(expected), (UNITY_INT)(UNITY_INT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_EQUAL_UINT(expected, actual, line, message)                            UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_EQUAL_UINT8(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_UINT8 )(expected), (UNITY_INT)(UNITY_UINT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_EQUAL_UINT16(expected, actual, line, message)                          UnityAssertEqualNumber((UNITY_INT)(UNITY_UINT16)(expected), (UNITY_INT)(UNITY_UINT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_EQUAL_UINT32(expected, actual, line, message)                          UnityAssertEqualNumber((UNITY_INT)(UNITY_UINT32)(expected), (UNITY_INT)(UNITY_UINT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_EQUAL_HEX8(expected, actual, line, message)                            UnityAssertEqualNumber((UNITY_INT)(UNITY_INT8 )(expected), (UNITY_INT)(UNITY_INT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_EQUAL_HEX16(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT16)(expected), (UNITY_INT)(UNITY_INT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_EQUAL_HEX32(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT32)(expected), (UNITY_INT)(UNITY_INT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+#define UNITY_TEST_ASSERT_BITS(mask, expected, actual, line, message)                            UnityAssertBits((UNITY_INT)(mask), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line))
+
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT(threshold, actual, line, message)                     UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold), (UNITY_INT)(UNITY_INT16)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold), (UNITY_INT)(UNITY_INT32)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT8(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT16(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT32(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT(threshold, actual, line, message)                     UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold), (UNITY_INT)(UNITY_INT16)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold), (UNITY_INT)(UNITY_INT32)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT8(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT16(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT32(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT(threshold, actual, line, message)                 UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold), (UNITY_INT)(UNITY_INT16)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold), (UNITY_INT)(UNITY_INT32)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT8(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT16(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT32(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT(threshold, actual, line, message)                 UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold), (UNITY_INT)(UNITY_INT16)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold), (UNITY_INT)(UNITY_INT32)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT8(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT16(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT32(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+
+#define UNITY_TEST_ASSERT_INT_WITHIN(delta, expected, actual, line, message)                     UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_INT8_WITHIN(delta, expected, actual, line, message)                    UnityAssertNumbersWithin((UNITY_UINT8 )(delta), (UNITY_INT)(UNITY_INT8 )(expected), (UNITY_INT)(UNITY_INT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_INT16_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT16)(delta), (UNITY_INT)(UNITY_INT16)(expected), (UNITY_INT)(UNITY_INT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_INT32_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT32)(delta), (UNITY_INT)(UNITY_INT32)(expected), (UNITY_INT)(UNITY_INT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_UINT_WITHIN(delta, expected, actual, line, message)                    UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_UINT8_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT8 )(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_UINT16_WITHIN(delta, expected, actual, line, message)                  UnityAssertNumbersWithin((UNITY_UINT16)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_UINT32_WITHIN(delta, expected, actual, line, message)                  UnityAssertNumbersWithin((UNITY_UINT32)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_HEX8_WITHIN(delta, expected, actual, line, message)                    UnityAssertNumbersWithin((UNITY_UINT8 )(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_HEX16_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT16)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_HEX32_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT32)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+
+#define UNITY_TEST_ASSERT_EQUAL_PTR(expected, actual, line, message)                             UnityAssertEqualNumber((UNITY_PTR_TO_INT)(expected), (UNITY_PTR_TO_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_POINTER)
+#define UNITY_TEST_ASSERT_EQUAL_STRING(expected, actual, line, message)                          UnityAssertEqualString((const char*)(expected), (const char*)(actual), (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_ASSERT_EQUAL_STRING_LEN(expected, actual, len, line, message)                 UnityAssertEqualStringLen((const char*)(expected), (const char*)(actual), (UNITY_UINT32)(len), (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_ASSERT_EQUAL_MEMORY(expected, actual, len, line, message)                     UnityAssertEqualMemory((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(len), 1, (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+
+#define UNITY_TEST_ASSERT_EQUAL_INT_ARRAY(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT,     UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_INT8_ARRAY(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8,    UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_INT16_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_INT32_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT_ARRAY(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT,    UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT8_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT32_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX8_ARRAY(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8,    UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX16_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_PTR_ARRAY(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_POINTER, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_STRING_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualStringArray((UNITY_INTERNAL_PTR)(expected), (const char**)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY(expected, actual, len, num_elements, line, message) UnityAssertEqualMemory((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(len), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT(expected, actual, num_elements, line, message)          UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)              expected, sizeof(int)),  (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT,     UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT8(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT8  )expected, 1),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8,    UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT16(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT16 )expected, 2),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT32(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT32 )expected, 4),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)              expected, sizeof(unsigned int)), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT,    UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT8(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT8 )expected, 1),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT16(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT16)expected, 2),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT32(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT32)expected, 4),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX8(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT8  )expected, 1),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8,    UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX16(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT16 )expected, 2),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX32(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT32 )expected, 4),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_PTR(expected, actual, num_elements, line, message)          UnityAssertEqualIntArray(UnityNumToPtr((UNITY_PTR_TO_INT)       expected, sizeof(int*)), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_POINTER, UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_STRING(expected, actual, num_elements, line, message)       UnityAssertEqualStringArray((UNITY_INTERNAL_PTR)(expected), (const char**)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_MEMORY(expected, actual, len, num_elements, line, message)  UnityAssertEqualMemory((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(len), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_VAL)
+
+#ifdef UNITY_SUPPORT_64
+#define UNITY_TEST_ASSERT_EQUAL_INT64(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64(expected, actual, line, message)                          UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT64(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT64)expected, 8), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT64(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT64)expected, 8), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64, UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX64(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT64)expected, 8), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_INT64_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_UINT64_WITHIN(delta, expected, actual, line, message)                  UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_HEX64_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT64(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT64(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#else
+#define UNITY_TEST_ASSERT_EQUAL_INT64(expected, actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64(expected, actual, line, message)                          UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64(expected, actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY(expected, actual, num_elements, line, message)      UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_INT64_WITHIN(delta, expected, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_UINT64_WITHIN(delta, expected, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_HEX64_WITHIN(delta, expected, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT64(threshold, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64(threshold, actual, line, message)              UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT64(threshold, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64(threshold, actual, line, message)              UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#endif
+
+#ifdef UNITY_EXCLUDE_FLOAT
+#define UNITY_TEST_ASSERT_FLOAT_WITHIN(delta, expected, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT(expected, actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT(expected, actual, num_elements, line, message)        UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_INF(actual, line, message)                                    UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF(actual, line, message)                                UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NAN(actual, line, message)                                    UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE(actual, line, message)                            UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF(actual, line, message)                                UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF(actual, line, message)                            UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN(actual, line, message)                                UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(actual, line, message)                        UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#else
+#define UNITY_TEST_ASSERT_FLOAT_WITHIN(delta, expected, actual, line, message)                   UnityAssertFloatsWithin((UNITY_FLOAT)(delta), (UNITY_FLOAT)(expected), (UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT(expected, actual, line, message)                           UNITY_TEST_ASSERT_FLOAT_WITHIN((UNITY_FLOAT)(expected) * (UNITY_FLOAT)UNITY_FLOAT_PRECISION, (UNITY_FLOAT)(expected), (UNITY_FLOAT)(actual), (UNITY_LINE_TYPE)(line), (message))
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualFloatArray((UNITY_FLOAT*)(expected), (UNITY_FLOAT*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT(expected, actual, num_elements, line, message)        UnityAssertEqualFloatArray(UnityFloatToPtr(expected), (UNITY_FLOAT*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_FLOAT_IS_INF(actual, line, message)                                    UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF(actual, line, message)                                UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NEG_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NAN(actual, line, message)                                    UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NAN)
+#define UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE(actual, line, message)                            UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_DET)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF(actual, line, message)                                UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF(actual, line, message)                            UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NEG_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN(actual, line, message)                                UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NAN)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(actual, line, message)                        UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_DET)
+#endif
+
+#ifdef UNITY_EXCLUDE_DOUBLE
+#define UNITY_TEST_ASSERT_DOUBLE_WITHIN(delta, expected, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE(expected, actual, line, message)                          UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY(expected, actual, num_elements, line, message)      UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_INF(actual, line, message)                                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF(actual, line, message)                               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NAN(actual, line, message)                                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE(actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF(actual, line, message)                               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF(actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN(actual, line, message)                               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(actual, line, message)                       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#else
+#define UNITY_TEST_ASSERT_DOUBLE_WITHIN(delta, expected, actual, line, message)                  UnityAssertDoublesWithin((UNITY_DOUBLE)(delta), (UNITY_DOUBLE)(expected), (UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)line)
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE(expected, actual, line, message)                          UNITY_TEST_ASSERT_DOUBLE_WITHIN((UNITY_DOUBLE)(expected) * (UNITY_DOUBLE)UNITY_DOUBLE_PRECISION, (UNITY_DOUBLE)expected, (UNITY_DOUBLE)actual, (UNITY_LINE_TYPE)(line), message)
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualDoubleArray((UNITY_DOUBLE*)(expected), (UNITY_DOUBLE*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)line, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE(expected, actual, num_elements, line, message)       UnityAssertEqualDoubleArray(UnityDoubleToPtr(expected), (UNITY_DOUBLE*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)line, UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_INF(actual, line, message)                                   UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF(actual, line, message)                               UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NEG_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NAN(actual, line, message)                                   UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NAN)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE(actual, line, message)                           UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_DET)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF(actual, line, message)                               UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF(actual, line, message)                           UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NEG_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN(actual, line, message)                               UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NAN)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(actual, line, message)                       UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_DET)
+#endif
+
+/* End of UNITY_INTERNALS_H */
+#endif
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/expectdata/testsample_head1.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/expectdata/testsample_head1.h
new file mode 100644
index 00000000000..da6b7ab26bb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/expectdata/testsample_head1.h
@@ -0,0 +1,15 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+#ifndef _TESTSAMPLE_HEAD1_H
+#define _TESTSAMPLE_HEAD1_H
+
+#include "unity.h"
+#include "funky.h"
+#include "stanky.h"
+#include <setjmp.h>
+
+void test_TheFirstThingToTest(void);
+void test_TheSecondThingToTest(void);
+void test_TheThirdThingToTest(void);
+void test_TheFourthThingToTest(void);
+#endif
+
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/expectdata/testsample_mock_head1.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/expectdata/testsample_mock_head1.h
new file mode 100644
index 00000000000..30c509ad077
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/expectdata/testsample_mock_head1.h
@@ -0,0 +1,13 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+#ifndef _TESTSAMPLE_MOCK_HEAD1_H
+#define _TESTSAMPLE_MOCK_HEAD1_H
+
+#include "unity.h"
+#include "cmock.h"
+#include "funky.h"
+#include <setjmp.h>
+
+void test_TheFirstThingToTest(void);
+void test_TheSecondThingToTest(void);
+#endif
+
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/CException.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/CException.h
new file mode 100644
index 00000000000..91ad3e1bf22
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/CException.h
@@ -0,0 +1,11 @@
+#ifndef CEXCEPTION_H
+#define CEXCEPTION_H
+
+#define CEXCEPTION_BEING_USED 1
+
+#define CEXCEPTION_NONE 0
+#define CEXCEPTION_T int e = 1; (void)
+#define Try          if (e)
+#define Catch(a)     if (!a)
+
+#endif //CEXCEPTION_H
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/Defs.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/Defs.h
new file mode 100644
index 00000000000..d3a90c0d506
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/Defs.h
@@ -0,0 +1,8 @@
+#ifndef DEF_H
+#define DEF_H
+
+#define EXTERN_DECL
+
+extern int CounterSuiteSetup;
+
+#endif //DEF_H
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/cmock.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/cmock.h
new file mode 100644
index 00000000000..c6149be1b01
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/cmock.h
@@ -0,0 +1,14 @@
+#ifndef CMOCK_H
+#define CMOCK_H
+
+int CMockMemFreeFinalCounter = 0;
+int mockMock_Init_Counter = 0;
+int mockMock_Verify_Counter = 0;
+int mockMock_Destroy_Counter = 0;
+
+void CMock_Guts_MemFreeFinal(void) { CMockMemFreeFinalCounter++; }
+void mockMock_Init(void)           { mockMock_Init_Counter++;    }
+void mockMock_Verify(void)         { mockMock_Verify_Counter++;  }
+void mockMock_Destroy(void)        { mockMock_Destroy_Counter++; }
+
+#endif //CMOCK_H
diff --git a/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/mockMock.h b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/mockMock.h
new file mode 100644
index 00000000000..0a2c616f797
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json/cJSON/tests/unity/test/testdata/mockMock.h
@@ -0,0 +1,13 @@
+#ifndef MOCK_MOCK_H
+#define MOCK_MOCK_H
+
+extern int mockMock_Init_Counter;
+extern int mockMock_Verify_Counter;
+extern int mockMock_Destroy_Counter;
+extern int CMockMemFreeFinalCounter;
+
+void mockMock_Init(void);
+void mockMock_Verify(void);
+void mockMock_Destroy(void);
+
+#endif //MOCK_MOCK_H
diff --git a/tools/sdk/esp32s3/include/json_generator/upstream/json_generator.h b/tools/sdk/esp32s3/include/json_generator/upstream/json_generator.h
new file mode 100644
index 00000000000..e3aa92eeecf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json_generator/upstream/json_generator.h
@@ -0,0 +1,511 @@
+/*
+ *    Copyright 2020 Piyush Shah <shahpiyushv@gmail.com>
+ *
+ *   Licensed under the Apache License, Version 2.0 (the "License");
+ *   you may not use this file except in compliance with the License.
+ *   You may obtain a copy of the License at
+ *
+ *       http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *   Unless required by applicable law or agreed to in writing, software
+ *   distributed under the License is distributed on an "AS IS" BASIS,
+ *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *   See the License for the specific language governing permissions and
+ *   limitations under the License.
+ */
+
+/*
+ * JSON String Generator
+ *
+ * This module can be used to create JSON strings with a facility
+ * to flush out data if the destination buffer is full. All commas
+ * and colons as required are automatically added by the APIs
+ *
+ */
+#ifndef _JSON_GENERATOR_H
+#define _JSON_GENERATOR_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Float precision i.e. number of digits after decimal point */
+#ifndef JSON_FLOAT_PRECISION
+#define JSON_FLOAT_PRECISION 5
+#endif
+
+/** JSON string flush callback prototype
+ *
+ * This is a prototype of the function that needs to be passed to
+ * json_gen_str_start() and which will be invoked by the JSON generator
+ * module either when the buffer is full or json_gen_str_end() ins invoked.
+ *
+ * \param[in] buf Pointer to a NULL terminated JSON string
+ * \param[in] priv Private data to be passed to the flush callback. Will
+ * be the same as the one passed to json_gen_str_start()
+ */
+typedef void (*json_gen_flush_cb_t) (char *buf, void *priv);
+
+/** JSON String structure
+ *
+ * Please do not set/modify any elements.
+ * Just define this structure and pass a pointer to it in the APIs below
+ */
+typedef struct {
+    /** Pointer to the JSON buffer provided by the calling function */
+	char *buf;
+    /** Size of the above buffer */
+	int buf_size;
+    /** (Optional) callback function to invoke when the buffer gets full */
+	json_gen_flush_cb_t flush_cb;
+    /** (Optional) Private data to pass to the callback function */
+	void *priv;
+    /** (For Internal use only) */
+	bool comma_req;
+    /** (For Internal use only) */
+	char *free_ptr;
+    /** Total length */
+    int total_len;
+} json_gen_str_t;
+
+/** Start a JSON String
+ *
+ * This is the first function to be called for creating a JSON string.
+ * It initializes the internal data structures. After the JSON string
+ * generation is over, the json_gen_str_end() function should be called.
+ *
+ * \param[out] jstr Pointer to an allocated \ref json_gen_str_t structure.
+ * This will be initialised internally and needs to be passed to all
+ * subsequent function calls
+ * \param[out] buf Pointer to an allocated buffer into which the JSON
+ * string will be written
+ * \param[in] buf_size Size of the buffer
+ * \param[in] flush_cb Pointer to the flushing function of type \ref json_gen_flush_cb_t
+ * which will be invoked either when the buffer is full or when json_gen_str_end()
+ * is invoked. Can be left NULL.
+ * \param[in] priv Private data to be passed to the flushing function callback.
+ * Can be something like a session identifier (Eg. socket). Can be left NULL.
+ */
+void json_gen_str_start(json_gen_str_t *jstr, char *buf, int buf_size,
+		json_gen_flush_cb_t flush_cb, void *priv);
+
+/** End JSON string
+ *
+ * This should be the last function to be called after the entire JSON string
+ * has been generated.
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return Total length of the JSON created, including the NULL termination byte.
+ */
+int json_gen_str_end(json_gen_str_t *jstr);
+
+/** Start a JSON object
+ *
+ * This starts a JSON object by adding a '{'
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_start_object(json_gen_str_t *jstr);
+
+/** End a JSON object
+ *
+ * This ends a JSON object by adding a '}'
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_end_object(json_gen_str_t *jstr);
+
+/** Start a JSON array
+ *
+ * This starts a JSON object by adding a '['
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_start_array(json_gen_str_t *jstr);
+
+/** End a JSON object
+ *
+ * This ends a JSON object by adding a ']'
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_end_array(json_gen_str_t *jstr);
+
+/** Push a named JSON object
+ *
+ * This adds a JSON object like "name":{
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the object
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_push_object(json_gen_str_t *jstr, char *name);
+
+/** Pop a named JSON object
+ *
+ * This ends a JSON object by adding a '}'. This is basically same as
+ * json_gen_end_object() but included so as to complement json_gen_push_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_pop_object(json_gen_str_t *jstr);
+
+/** Push a JSON object string
+ *
+ * This adds a complete pre-formatted JSON object string to the JSON object.
+ *
+ * Eg. json_gen_push_object_str(jstr, "pre-formatted", "{\"a\":1,\"b\":2}");
+ * This will add "pre-formatted":{"a":1,"b":2}
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the JSON object string
+ * \param[in] object_str The pre-formatted JSON object string
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that.
+ */
+int json_gen_push_object_str(json_gen_str_t *jstr, char *name, char *object_str);
+
+/** Push a named JSON array
+ *
+ * This adds a JSON array like "name":[
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the array
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_push_array(json_gen_str_t *jstr, char *name);
+
+/** Pop a named JSON array
+ *
+ * This ends a JSON array by adding a ']'. This is basically same as
+ * json_gen_end_array() but included so as to complement json_gen_push_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_pop_array(json_gen_str_t *jstr);
+
+/** Push a JSON array string
+ *
+ * This adds a complete pre-formatted JSON array string to the JSON object.
+ *
+ * Eg. json_gen_push_object_str(jstr, "pre-formatted", "[1,2,3]");
+ * This will add "pre-formatted":[1,2,3]
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the JSON array string
+ * \param[in] array_str The pre-formatted JSON array string
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that.
+ */
+int json_gen_push_array_str(json_gen_str_t *jstr, char *name, char *array_str);
+
+/** Add a boolean element to an object
+ *
+ * This adds a boolean element to an object. Eg. "bool_val":true
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Boolean value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_bool(json_gen_str_t *jstr, char *name, bool val);
+
+/** Add an integer element to an object
+ *
+ * This adds an integer element to an object. Eg. "int_val":28
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Integer value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_int(json_gen_str_t *jstr, char *name, int val);
+
+/** Add a float element to an object
+ *
+ * This adds a float element to an object. Eg. "float_val":23.8
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Float value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_float(json_gen_str_t *jstr, char *name, float val);
+
+/** Add a string element to an object
+ *
+ * This adds a string element to an object. Eg. "string_val":"my_string"
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Null terminated string value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_string(json_gen_str_t *jstr, char *name, char *val);
+
+/** Add a NULL element to an object
+ *
+ * This adds a NULL element to an object. Eg. "null_val":null
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_set_null(json_gen_str_t *jstr, char *name);
+
+/** Add a boolean element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Boolean value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_bool(json_gen_str_t *jstr, bool val);
+
+/** Add an integer element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Integer value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_int(json_gen_str_t *jstr, int val);
+
+/** Add a float element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Float value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_float(json_gen_str_t *jstr, float val);
+
+/** Add a string element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Null terminated string value of the element
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_string(json_gen_str_t *jstr, char *val);
+
+/** Add a NULL element to an array
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_set_null(json_gen_str_t *jstr);
+
+/** Start a Long string in an object
+ *
+ * This starts a string in an object, but does not end it (i.e., does not add the
+ * terminating quotes. This is useful for long strings. Eg. "string_val":"my_string.
+ * The API json_gen_add_to_long_string() must be used to add to this string and the API
+ * json_gen_end_long_string() must be used to terminate it (i.e. add the ending quotes).
+ *
+ * \note This must be called between json_gen_start_object()/json_gen_push_object()
+ * and json_gen_end_object()/json_gen_pop_object()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] name Name of the element
+ * \param[in] val Null terminated initial part of the string value. It can also be NULL
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_obj_start_long_string(json_gen_str_t *jstr, char *name, char *val);
+
+/** Start a Long string in an array
+ *
+ * This starts a string in an arrayt, but does not end it (i.e., does not add the
+ * terminating quotes. This is useful for long strings.
+ * The API json_gen_add_to_long_string() must be used to add to this string and the API
+ * json_gen_end_long_string() must be used to terminate it (i.e. add the ending quotes).
+ *
+ * \note This must be called between json_gen_start_array()/json_gen_push_array()
+ * and json_gen_end_array()/json_gen_pop_array()
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by
+ * json_gen_str_start()
+ * \param[in] val Null terminated initial part of the string value. It can also be NULL
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_arr_start_long_string(json_gen_str_t *jstr, char *val);
+
+/** Add to a JSON Long string
+ *
+ * This extends the string initialised by json_gen_obj_start_long_string() or
+ * json_gen_arr_start_long_string(). After the entire string is created, it should be terminated
+ * with json_gen_end_long_string().
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by json_gen_str_start()
+ * \param[in] val Null terminated extending part of the string value.
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_add_to_long_string(json_gen_str_t *jstr, char *val);
+
+/** End a JSON Long string
+ *
+ * This ends the string initialised by json_gen_obj_start_long_string() or
+ * json_gen_arr_start_long_string() by adding the ending quotes.
+ *
+ * \param[in] jstr Pointer to the \ref json_gen_str_t structure initialised by json_gen_str_start()
+ *
+ *
+ * \return 0 on Success
+ * \return -1 if buffer is out of space (possible only if no callback function
+ * is passed to json_gen_str_start(). Else, buffer will be flushed out and new data
+ * added after that
+ */
+int json_gen_end_long_string(json_gen_str_t *jstr);
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/json_parser/upstream/include/json_parser.h b/tools/sdk/esp32s3/include/json_parser/upstream/include/json_parser.h
new file mode 100644
index 00000000000..3e982fe14eb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json_parser/upstream/include/json_parser.h
@@ -0,0 +1,76 @@
+/*
+ *    Copyright 2020 Piyush Shah <shahpiyushv@gmail.com>
+ *
+ *   Licensed under the Apache License, Version 2.0 (the "License");
+ *   you may not use this file except in compliance with the License.
+ *   You may obtain a copy of the License at
+ *
+ *       http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *   Unless required by applicable law or agreed to in writing, software
+ *   distributed under the License is distributed on an "AS IS" BASIS,
+ *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *   See the License for the specific language governing permissions and
+ *   limitations under the License.
+ */
+#ifndef _JSON_PARSER_H_
+#define _JSON_PARSER_H_
+
+#define JSMN_HEADER
+#include <jsmn/jsmn.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define OS_SUCCESS  0
+#define OS_FAIL     -1
+
+typedef jsmn_parser json_parser_t;
+typedef jsmntok_t json_tok_t;
+
+typedef struct {
+	json_parser_t parser;
+	char *js;
+	json_tok_t *tokens;
+	json_tok_t *cur;
+	int num_tokens;
+} jparse_ctx_t;
+
+int json_parse_start(jparse_ctx_t *jctx, char *js, int len);
+int json_parse_end(jparse_ctx_t *jctx);
+
+int json_obj_get_array(jparse_ctx_t *jctx, char *name, int *num_elem);
+int json_obj_leave_array(jparse_ctx_t *jctx);
+int json_obj_get_object(jparse_ctx_t *jctx, char *name);
+int json_obj_leave_object(jparse_ctx_t *jctx);
+int json_obj_get_bool(jparse_ctx_t *jctx, char *name, bool *val);
+int json_obj_get_int(jparse_ctx_t *jctx, char *name, int *val);
+int json_obj_get_int64(jparse_ctx_t *jctx, char *name, int64_t *val);
+int json_obj_get_float(jparse_ctx_t *jctx, char *name, float *val);
+int json_obj_get_string(jparse_ctx_t *jctx, char *name, char *val, int size);
+int json_obj_get_strlen(jparse_ctx_t *jctx, char *name, int *strlen);
+int json_obj_get_object_str(jparse_ctx_t *jctx, char *name, char *val, int size);
+int json_obj_get_object_strlen(jparse_ctx_t *jctx, char *name, int *strlen);
+int json_obj_get_array_str(jparse_ctx_t *jctx, char *name, char *val, int size);
+int json_obj_get_array_strlen(jparse_ctx_t *jctx, char *name, int *strlen);
+
+int json_arr_get_array(jparse_ctx_t *jctx, uint32_t index);
+int json_arr_leave_array(jparse_ctx_t *jctx);
+int json_arr_get_object(jparse_ctx_t *jctx, uint32_t index);
+int json_arr_leave_object(jparse_ctx_t *jctx);
+int json_arr_get_bool(jparse_ctx_t *jctx, uint32_t index, bool *val);
+int json_arr_get_int(jparse_ctx_t *jctx, uint32_t index, int *val);
+int json_arr_get_int64(jparse_ctx_t *jctx, uint32_t index, int64_t *val);
+int json_arr_get_float(jparse_ctx_t *jctx, uint32_t index, float *val);
+int json_arr_get_string(jparse_ctx_t *jctx, uint32_t index, char *val, int size);
+int json_arr_get_strlen(jparse_ctx_t *jctx, uint32_t index, int *strlen);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _JSON_PARSER_H_ */
diff --git a/tools/sdk/esp32s3/include/json_parser/upstream/jsmn/jsmn.h b/tools/sdk/esp32s3/include/json_parser/upstream/jsmn/jsmn.h
new file mode 100644
index 00000000000..3178dcc977f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json_parser/upstream/jsmn/jsmn.h
@@ -0,0 +1,471 @@
+/*
+ * MIT License
+ *
+ * Copyright (c) 2010 Serge Zaitsev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef JSMN_H
+#define JSMN_H
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef JSMN_STATIC
+#define JSMN_API static
+#else
+#define JSMN_API extern
+#endif
+
+/**
+ * JSON type identifier. Basic types are:
+ * 	o Object
+ * 	o Array
+ * 	o String
+ * 	o Other primitive: number, boolean (true/false) or null
+ */
+typedef enum {
+  JSMN_UNDEFINED = 0,
+  JSMN_OBJECT = 1,
+  JSMN_ARRAY = 2,
+  JSMN_STRING = 3,
+  JSMN_PRIMITIVE = 4
+} jsmntype_t;
+
+enum jsmnerr {
+  /* Not enough tokens were provided */
+  JSMN_ERROR_NOMEM = -1,
+  /* Invalid character inside JSON string */
+  JSMN_ERROR_INVAL = -2,
+  /* The string is not a full JSON packet, more bytes expected */
+  JSMN_ERROR_PART = -3
+};
+
+/**
+ * JSON token description.
+ * type		type (object, array, string etc.)
+ * start	start position in JSON data string
+ * end		end position in JSON data string
+ */
+typedef struct jsmntok {
+  jsmntype_t type;
+  int start;
+  int end;
+  int size;
+#ifdef JSMN_PARENT_LINKS
+  int parent;
+#endif
+} jsmntok_t;
+
+/**
+ * JSON parser. Contains an array of token blocks available. Also stores
+ * the string being parsed now and current position in that string.
+ */
+typedef struct jsmn_parser {
+  unsigned int pos;     /* offset in the JSON string */
+  unsigned int toknext; /* next token to allocate */
+  int toksuper;         /* superior token node, e.g. parent object or array */
+} jsmn_parser;
+
+/**
+ * Create JSON parser over an array of tokens
+ */
+JSMN_API void jsmn_init(jsmn_parser *parser);
+
+/**
+ * Run JSON parser. It parses a JSON data string into and array of tokens, each
+ * describing
+ * a single JSON object.
+ */
+JSMN_API int jsmn_parse(jsmn_parser *parser, const char *js, const size_t len,
+                        jsmntok_t *tokens, const unsigned int num_tokens);
+
+#ifndef JSMN_HEADER
+/**
+ * Allocates a fresh unused token from the token pool.
+ */
+static jsmntok_t *jsmn_alloc_token(jsmn_parser *parser, jsmntok_t *tokens,
+                                   const size_t num_tokens) {
+  jsmntok_t *tok;
+  if (parser->toknext >= num_tokens) {
+    return NULL;
+  }
+  tok = &tokens[parser->toknext++];
+  tok->start = tok->end = -1;
+  tok->size = 0;
+#ifdef JSMN_PARENT_LINKS
+  tok->parent = -1;
+#endif
+  return tok;
+}
+
+/**
+ * Fills token type and boundaries.
+ */
+static void jsmn_fill_token(jsmntok_t *token, const jsmntype_t type,
+                            const int start, const int end) {
+  token->type = type;
+  token->start = start;
+  token->end = end;
+  token->size = 0;
+}
+
+/**
+ * Fills next available token with JSON primitive.
+ */
+static int jsmn_parse_primitive(jsmn_parser *parser, const char *js,
+                                const size_t len, jsmntok_t *tokens,
+                                const size_t num_tokens) {
+  jsmntok_t *token;
+  int start;
+
+  start = parser->pos;
+
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    switch (js[parser->pos]) {
+#ifndef JSMN_STRICT
+    /* In strict mode primitive must be followed by "," or "}" or "]" */
+    case ':':
+#endif
+    case '\t':
+    case '\r':
+    case '\n':
+    case ' ':
+    case ',':
+    case ']':
+    case '}':
+      goto found;
+    default:
+                   /* to quiet a warning from gcc*/
+      break;
+    }
+    if (js[parser->pos] < 32 || js[parser->pos] >= 127) {
+      parser->pos = start;
+      return JSMN_ERROR_INVAL;
+    }
+  }
+#ifdef JSMN_STRICT
+  /* In strict mode primitive must be followed by a comma/object/array */
+  parser->pos = start;
+  return JSMN_ERROR_PART;
+#endif
+
+found:
+  if (tokens == NULL) {
+    parser->pos--;
+    return 0;
+  }
+  token = jsmn_alloc_token(parser, tokens, num_tokens);
+  if (token == NULL) {
+    parser->pos = start;
+    return JSMN_ERROR_NOMEM;
+  }
+  jsmn_fill_token(token, JSMN_PRIMITIVE, start, parser->pos);
+#ifdef JSMN_PARENT_LINKS
+  token->parent = parser->toksuper;
+#endif
+  parser->pos--;
+  return 0;
+}
+
+/**
+ * Fills next token with JSON string.
+ */
+static int jsmn_parse_string(jsmn_parser *parser, const char *js,
+                             const size_t len, jsmntok_t *tokens,
+                             const size_t num_tokens) {
+  jsmntok_t *token;
+
+  int start = parser->pos;
+
+  parser->pos++;
+
+  /* Skip starting quote */
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    char c = js[parser->pos];
+
+    /* Quote: end of string */
+    if (c == '\"') {
+      if (tokens == NULL) {
+        return 0;
+      }
+      token = jsmn_alloc_token(parser, tokens, num_tokens);
+      if (token == NULL) {
+        parser->pos = start;
+        return JSMN_ERROR_NOMEM;
+      }
+      jsmn_fill_token(token, JSMN_STRING, start + 1, parser->pos);
+#ifdef JSMN_PARENT_LINKS
+      token->parent = parser->toksuper;
+#endif
+      return 0;
+    }
+
+    /* Backslash: Quoted symbol expected */
+    if (c == '\\' && parser->pos + 1 < len) {
+      int i;
+      parser->pos++;
+      switch (js[parser->pos]) {
+      /* Allowed escaped symbols */
+      case '\"':
+      case '/':
+      case '\\':
+      case 'b':
+      case 'f':
+      case 'r':
+      case 'n':
+      case 't':
+        break;
+      /* Allows escaped symbol \uXXXX */
+      case 'u':
+        parser->pos++;
+        for (i = 0; i < 4 && parser->pos < len && js[parser->pos] != '\0';
+             i++) {
+          /* If it isn't a hex character we have an error */
+          if (!((js[parser->pos] >= 48 && js[parser->pos] <= 57) ||   /* 0-9 */
+                (js[parser->pos] >= 65 && js[parser->pos] <= 70) ||   /* A-F */
+                (js[parser->pos] >= 97 && js[parser->pos] <= 102))) { /* a-f */
+            parser->pos = start;
+            return JSMN_ERROR_INVAL;
+          }
+          parser->pos++;
+        }
+        parser->pos--;
+        break;
+      /* Unexpected symbol */
+      default:
+        parser->pos = start;
+        return JSMN_ERROR_INVAL;
+      }
+    }
+  }
+  parser->pos = start;
+  return JSMN_ERROR_PART;
+}
+
+/**
+ * Parse JSON string and fill tokens.
+ */
+JSMN_API int jsmn_parse(jsmn_parser *parser, const char *js, const size_t len,
+                        jsmntok_t *tokens, const unsigned int num_tokens) {
+  int r;
+  int i;
+  jsmntok_t *token;
+  int count = parser->toknext;
+
+  for (; parser->pos < len && js[parser->pos] != '\0'; parser->pos++) {
+    char c;
+    jsmntype_t type;
+
+    c = js[parser->pos];
+    switch (c) {
+    case '{':
+    case '[':
+      count++;
+      if (tokens == NULL) {
+        break;
+      }
+      token = jsmn_alloc_token(parser, tokens, num_tokens);
+      if (token == NULL) {
+        return JSMN_ERROR_NOMEM;
+      }
+      if (parser->toksuper != -1) {
+        jsmntok_t *t = &tokens[parser->toksuper];
+#ifdef JSMN_STRICT
+        /* In strict mode an object or array can't become a key */
+        if (t->type == JSMN_OBJECT) {
+          return JSMN_ERROR_INVAL;
+        }
+#endif
+        t->size++;
+#ifdef JSMN_PARENT_LINKS
+        token->parent = parser->toksuper;
+#endif
+      }
+      token->type = (c == '{' ? JSMN_OBJECT : JSMN_ARRAY);
+      token->start = parser->pos;
+      parser->toksuper = parser->toknext - 1;
+      break;
+    case '}':
+    case ']':
+      if (tokens == NULL) {
+        break;
+      }
+      type = (c == '}' ? JSMN_OBJECT : JSMN_ARRAY);
+#ifdef JSMN_PARENT_LINKS
+      if (parser->toknext < 1) {
+        return JSMN_ERROR_INVAL;
+      }
+      token = &tokens[parser->toknext - 1];
+      for (;;) {
+        if (token->start != -1 && token->end == -1) {
+          if (token->type != type) {
+            return JSMN_ERROR_INVAL;
+          }
+          token->end = parser->pos + 1;
+          parser->toksuper = token->parent;
+          break;
+        }
+        if (token->parent == -1) {
+          if (token->type != type || parser->toksuper == -1) {
+            return JSMN_ERROR_INVAL;
+          }
+          break;
+        }
+        token = &tokens[token->parent];
+      }
+#else
+      for (i = parser->toknext - 1; i >= 0; i--) {
+        token = &tokens[i];
+        if (token->start != -1 && token->end == -1) {
+          if (token->type != type) {
+            return JSMN_ERROR_INVAL;
+          }
+          parser->toksuper = -1;
+          token->end = parser->pos + 1;
+          break;
+        }
+      }
+      /* Error if unmatched closing bracket */
+      if (i == -1) {
+        return JSMN_ERROR_INVAL;
+      }
+      for (; i >= 0; i--) {
+        token = &tokens[i];
+        if (token->start != -1 && token->end == -1) {
+          parser->toksuper = i;
+          break;
+        }
+      }
+#endif
+      break;
+    case '\"':
+      r = jsmn_parse_string(parser, js, len, tokens, num_tokens);
+      if (r < 0) {
+        return r;
+      }
+      count++;
+      if (parser->toksuper != -1 && tokens != NULL) {
+        tokens[parser->toksuper].size++;
+      }
+      break;
+    case '\t':
+    case '\r':
+    case '\n':
+    case ' ':
+      break;
+    case ':':
+      parser->toksuper = parser->toknext - 1;
+      break;
+    case ',':
+      if (tokens != NULL && parser->toksuper != -1 &&
+          tokens[parser->toksuper].type != JSMN_ARRAY &&
+          tokens[parser->toksuper].type != JSMN_OBJECT) {
+#ifdef JSMN_PARENT_LINKS
+        parser->toksuper = tokens[parser->toksuper].parent;
+#else
+        for (i = parser->toknext - 1; i >= 0; i--) {
+          if (tokens[i].type == JSMN_ARRAY || tokens[i].type == JSMN_OBJECT) {
+            if (tokens[i].start != -1 && tokens[i].end == -1) {
+              parser->toksuper = i;
+              break;
+            }
+          }
+        }
+#endif
+      }
+      break;
+#ifdef JSMN_STRICT
+    /* In strict mode primitives are: numbers and booleans */
+    case '-':
+    case '0':
+    case '1':
+    case '2':
+    case '3':
+    case '4':
+    case '5':
+    case '6':
+    case '7':
+    case '8':
+    case '9':
+    case 't':
+    case 'f':
+    case 'n':
+      /* And they must not be keys of the object */
+      if (tokens != NULL && parser->toksuper != -1) {
+        const jsmntok_t *t = &tokens[parser->toksuper];
+        if (t->type == JSMN_OBJECT ||
+            (t->type == JSMN_STRING && t->size != 0)) {
+          return JSMN_ERROR_INVAL;
+        }
+      }
+#else
+    /* In non-strict mode every unquoted value is a primitive */
+    default:
+#endif
+      r = jsmn_parse_primitive(parser, js, len, tokens, num_tokens);
+      if (r < 0) {
+        return r;
+      }
+      count++;
+      if (parser->toksuper != -1 && tokens != NULL) {
+        tokens[parser->toksuper].size++;
+      }
+      break;
+
+#ifdef JSMN_STRICT
+    /* Unexpected char in strict mode */
+    default:
+      return JSMN_ERROR_INVAL;
+#endif
+    }
+  }
+
+  if (tokens != NULL) {
+    for (i = parser->toknext - 1; i >= 0; i--) {
+      /* Unmatched opened object or array */
+      if (tokens[i].start != -1 && tokens[i].end == -1) {
+        return JSMN_ERROR_PART;
+      }
+    }
+  }
+
+  return count;
+}
+
+/**
+ * Creates a new parser based over a given buffer with an array of tokens
+ * available.
+ */
+JSMN_API void jsmn_init(jsmn_parser *parser) {
+  parser->pos = 0;
+  parser->toknext = 0;
+  parser->toksuper = -1;
+}
+
+#endif /* JSMN_HEADER */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* JSMN_H */
diff --git a/tools/sdk/esp32s3/include/json_parser/upstream/jsmn/test/test.h b/tools/sdk/esp32s3/include/json_parser/upstream/jsmn/test/test.h
new file mode 100644
index 00000000000..a1c0957a74a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json_parser/upstream/jsmn/test/test.h
@@ -0,0 +1,31 @@
+#ifndef __TEST_H__
+#define __TEST_H__
+
+static int test_passed = 0;
+static int test_failed = 0;
+
+/* Terminate current test with error */
+#define fail() return __LINE__
+
+/* Successful end of the test case */
+#define done() return 0
+
+/* Check single condition */
+#define check(cond)                                                            \
+  do {                                                                         \
+    if (!(cond))                                                               \
+      fail();                                                                  \
+  } while (0)
+
+/* Test runner */
+static void test(int (*func)(void), const char *name) {
+  int r = func();
+  if (r == 0) {
+    test_passed++;
+  } else {
+    test_failed++;
+    printf("FAILED: %s (at line %d)\n", name, r);
+  }
+}
+
+#endif /* __TEST_H__ */
diff --git a/tools/sdk/esp32s3/include/json_parser/upstream/jsmn/test/testutil.h b/tools/sdk/esp32s3/include/json_parser/upstream/jsmn/test/testutil.h
new file mode 100644
index 00000000000..bdee13934b1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/json_parser/upstream/jsmn/test/testutil.h
@@ -0,0 +1,96 @@
+#ifndef __TEST_UTIL_H__
+#define __TEST_UTIL_H__
+
+#include "../jsmn.h"
+
+static int vtokeq(const char *s, jsmntok_t *t, unsigned long numtok,
+                  va_list ap) {
+  if (numtok > 0) {
+    unsigned long i;
+    int start, end, size;
+    jsmntype_t type;
+    char *value;
+
+    size = -1;
+    value = NULL;
+    for (i = 0; i < numtok; i++) {
+      type = va_arg(ap, jsmntype_t);
+      if (type == JSMN_STRING) {
+        value = va_arg(ap, char *);
+        size = va_arg(ap, int);
+        start = end = -1;
+      } else if (type == JSMN_PRIMITIVE) {
+        value = va_arg(ap, char *);
+        start = end = size = -1;
+      } else {
+        start = va_arg(ap, int);
+        end = va_arg(ap, int);
+        size = va_arg(ap, int);
+        value = NULL;
+      }
+      if (t[i].type != type) {
+        printf("token %lu type is %d, not %d\n", i, t[i].type, type);
+        return 0;
+      }
+      if (start != -1 && end != -1) {
+        if (t[i].start != start) {
+          printf("token %lu start is %d, not %d\n", i, t[i].start, start);
+          return 0;
+        }
+        if (t[i].end != end) {
+          printf("token %lu end is %d, not %d\n", i, t[i].end, end);
+          return 0;
+        }
+      }
+      if (size != -1 && t[i].size != size) {
+        printf("token %lu size is %d, not %d\n", i, t[i].size, size);
+        return 0;
+      }
+
+      if (s != NULL && value != NULL) {
+        const char *p = s + t[i].start;
+        if (strlen(value) != (unsigned long)(t[i].end - t[i].start) ||
+            strncmp(p, value, t[i].end - t[i].start) != 0) {
+          printf("token %lu value is %.*s, not %s\n", i, t[i].end - t[i].start,
+                 s + t[i].start, value);
+          return 0;
+        }
+      }
+    }
+  }
+  return 1;
+}
+
+static int tokeq(const char *s, jsmntok_t *tokens, unsigned long numtok, ...) {
+  int ok;
+  va_list args;
+  va_start(args, numtok);
+  ok = vtokeq(s, tokens, numtok, args);
+  va_end(args);
+  return ok;
+}
+
+static int parse(const char *s, int status, unsigned long numtok, ...) {
+  int r;
+  int ok = 1;
+  va_list args;
+  jsmn_parser p;
+  jsmntok_t *t = malloc(numtok * sizeof(jsmntok_t));
+
+  jsmn_init(&p);
+  r = jsmn_parse(&p, s, strlen(s), t, numtok);
+  if (r != status) {
+    printf("status is %d, not %d\n", r, status);
+    return 0;
+  }
+
+  if (status >= 0) {
+    va_start(args, numtok);
+    ok = vtokeq(s, t, numtok, args);
+    va_end(args);
+  }
+  free(t);
+  return ok;
+}
+
+#endif /* __TEST_UTIL_H__ */
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium.h
new file mode 100644
index 00000000000..295f911cff3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium.h
@@ -0,0 +1,69 @@
+
+#ifndef sodium_H
+#define sodium_H
+
+#include "sodium/version.h"
+
+#include "sodium/core.h"
+#include "sodium/crypto_aead_aes256gcm.h"
+#include "sodium/crypto_aead_chacha20poly1305.h"
+#include "sodium/crypto_aead_xchacha20poly1305.h"
+#include "sodium/crypto_auth.h"
+#include "sodium/crypto_auth_hmacsha256.h"
+#include "sodium/crypto_auth_hmacsha512.h"
+#include "sodium/crypto_auth_hmacsha512256.h"
+#include "sodium/crypto_box.h"
+#include "sodium/crypto_box_curve25519xsalsa20poly1305.h"
+#include "sodium/crypto_core_hsalsa20.h"
+#include "sodium/crypto_core_hchacha20.h"
+#include "sodium/crypto_core_salsa20.h"
+#include "sodium/crypto_core_salsa2012.h"
+#include "sodium/crypto_core_salsa208.h"
+#include "sodium/crypto_generichash.h"
+#include "sodium/crypto_generichash_blake2b.h"
+#include "sodium/crypto_hash.h"
+#include "sodium/crypto_hash_sha256.h"
+#include "sodium/crypto_hash_sha512.h"
+#include "sodium/crypto_kdf.h"
+#include "sodium/crypto_kdf_blake2b.h"
+#include "sodium/crypto_kx.h"
+#include "sodium/crypto_onetimeauth.h"
+#include "sodium/crypto_onetimeauth_poly1305.h"
+#include "sodium/crypto_pwhash.h"
+#include "sodium/crypto_pwhash_argon2i.h"
+#include "sodium/crypto_scalarmult.h"
+#include "sodium/crypto_scalarmult_curve25519.h"
+#include "sodium/crypto_secretbox.h"
+#include "sodium/crypto_secretbox_xsalsa20poly1305.h"
+#include "sodium/crypto_secretstream_xchacha20poly1305.h"
+#include "sodium/crypto_shorthash.h"
+#include "sodium/crypto_shorthash_siphash24.h"
+#include "sodium/crypto_sign.h"
+#include "sodium/crypto_sign_ed25519.h"
+#include "sodium/crypto_stream.h"
+#include "sodium/crypto_stream_chacha20.h"
+#include "sodium/crypto_stream_salsa20.h"
+#include "sodium/crypto_stream_xsalsa20.h"
+#include "sodium/crypto_verify_16.h"
+#include "sodium/crypto_verify_32.h"
+#include "sodium/crypto_verify_64.h"
+#include "sodium/randombytes.h"
+#include "sodium/randombytes_internal_random.h"
+#include "sodium/randombytes_sysrandom.h"
+#include "sodium/runtime.h"
+#include "sodium/utils.h"
+
+#ifndef SODIUM_LIBRARY_MINIMAL
+# include "sodium/crypto_box_curve25519xchacha20poly1305.h"
+# include "sodium/crypto_core_ed25519.h"
+# include "sodium/crypto_core_ristretto255.h"
+# include "sodium/crypto_scalarmult_ed25519.h"
+# include "sodium/crypto_scalarmult_ristretto255.h"
+# include "sodium/crypto_secretbox_xchacha20poly1305.h"
+# include "sodium/crypto_pwhash_scryptsalsa208sha256.h"
+# include "sodium/crypto_stream_salsa2012.h"
+# include "sodium/crypto_stream_salsa208.h"
+# include "sodium/crypto_stream_xchacha20.h"
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/core.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/core.h
new file mode 100644
index 00000000000..dd088d2cae2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/core.h
@@ -0,0 +1,28 @@
+
+#ifndef sodium_core_H
+#define sodium_core_H
+
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+SODIUM_EXPORT
+int sodium_init(void)
+            __attribute__ ((warn_unused_result));
+
+/* ---- */
+
+SODIUM_EXPORT
+int sodium_set_misuse_handler(void (*handler)(void));
+
+SODIUM_EXPORT
+void sodium_misuse(void)
+            __attribute__ ((noreturn));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_aead_aes256gcm.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_aead_aes256gcm.h
new file mode 100644
index 00000000000..9baeb3f19f7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_aead_aes256gcm.h
@@ -0,0 +1,179 @@
+#ifndef crypto_aead_aes256gcm_H
+#define crypto_aead_aes256gcm_H
+
+/*
+ * WARNING: Despite being the most popular AEAD construction due to its
+ * use in TLS, safely using AES-GCM in a different context is tricky.
+ *
+ * No more than ~ 350 GB of input data should be encrypted with a given key.
+ * This is for ~ 16 KB messages -- Actual figures vary according to
+ * message sizes.
+ *
+ * In addition, nonces are short and repeated nonces would totally destroy
+ * the security of this scheme.
+ *
+ * Nonces should thus come from atomic counters, which can be difficult to
+ * set up in a distributed environment.
+ *
+ * Unless you absolutely need AES-GCM, use crypto_aead_xchacha20poly1305_ietf_*()
+ * instead. It doesn't have any of these limitations.
+ * Or, if you don't need to authenticate additional data, just stick to
+ * crypto_secretbox().
+ */
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+SODIUM_EXPORT
+int crypto_aead_aes256gcm_is_available(void);
+
+#define crypto_aead_aes256gcm_KEYBYTES  32U
+SODIUM_EXPORT
+size_t crypto_aead_aes256gcm_keybytes(void);
+
+#define crypto_aead_aes256gcm_NSECBYTES 0U
+SODIUM_EXPORT
+size_t crypto_aead_aes256gcm_nsecbytes(void);
+
+#define crypto_aead_aes256gcm_NPUBBYTES 12U
+SODIUM_EXPORT
+size_t crypto_aead_aes256gcm_npubbytes(void);
+
+#define crypto_aead_aes256gcm_ABYTES    16U
+SODIUM_EXPORT
+size_t crypto_aead_aes256gcm_abytes(void);
+
+#define crypto_aead_aes256gcm_MESSAGEBYTES_MAX \
+    SODIUM_MIN(SODIUM_SIZE_MAX - crypto_aead_aes256gcm_ABYTES, \
+               (16ULL * ((1ULL << 32) - 2ULL)))
+SODIUM_EXPORT
+size_t crypto_aead_aes256gcm_messagebytes_max(void);
+
+typedef struct CRYPTO_ALIGN(16) crypto_aead_aes256gcm_state_ {
+    unsigned char opaque[512];
+} crypto_aead_aes256gcm_state;
+
+SODIUM_EXPORT
+size_t crypto_aead_aes256gcm_statebytes(void);
+
+SODIUM_EXPORT
+int crypto_aead_aes256gcm_encrypt(unsigned char *c,
+                                  unsigned long long *clen_p,
+                                  const unsigned char *m,
+                                  unsigned long long mlen,
+                                  const unsigned char *ad,
+                                  unsigned long long adlen,
+                                  const unsigned char *nsec,
+                                  const unsigned char *npub,
+                                  const unsigned char *k)
+            __attribute__ ((nonnull(1, 8, 9)));
+
+SODIUM_EXPORT
+int crypto_aead_aes256gcm_decrypt(unsigned char *m,
+                                  unsigned long long *mlen_p,
+                                  unsigned char *nsec,
+                                  const unsigned char *c,
+                                  unsigned long long clen,
+                                  const unsigned char *ad,
+                                  unsigned long long adlen,
+                                  const unsigned char *npub,
+                                  const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(4, 8, 9)));
+
+SODIUM_EXPORT
+int crypto_aead_aes256gcm_encrypt_detached(unsigned char *c,
+                                           unsigned char *mac,
+                                           unsigned long long *maclen_p,
+                                           const unsigned char *m,
+                                           unsigned long long mlen,
+                                           const unsigned char *ad,
+                                           unsigned long long adlen,
+                                           const unsigned char *nsec,
+                                           const unsigned char *npub,
+                                           const unsigned char *k)
+            __attribute__ ((nonnull(1, 2, 9, 10)));
+
+SODIUM_EXPORT
+int crypto_aead_aes256gcm_decrypt_detached(unsigned char *m,
+                                           unsigned char *nsec,
+                                           const unsigned char *c,
+                                           unsigned long long clen,
+                                           const unsigned char *mac,
+                                           const unsigned char *ad,
+                                           unsigned long long adlen,
+                                           const unsigned char *npub,
+                                           const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(3, 5, 8, 9)));
+
+/* -- Precomputation interface -- */
+
+SODIUM_EXPORT
+int crypto_aead_aes256gcm_beforenm(crypto_aead_aes256gcm_state *ctx_,
+                                   const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_aead_aes256gcm_encrypt_afternm(unsigned char *c,
+                                          unsigned long long *clen_p,
+                                          const unsigned char *m,
+                                          unsigned long long mlen,
+                                          const unsigned char *ad,
+                                          unsigned long long adlen,
+                                          const unsigned char *nsec,
+                                          const unsigned char *npub,
+                                          const crypto_aead_aes256gcm_state *ctx_)
+            __attribute__ ((nonnull(1, 8, 9)));
+
+SODIUM_EXPORT
+int crypto_aead_aes256gcm_decrypt_afternm(unsigned char *m,
+                                          unsigned long long *mlen_p,
+                                          unsigned char *nsec,
+                                          const unsigned char *c,
+                                          unsigned long long clen,
+                                          const unsigned char *ad,
+                                          unsigned long long adlen,
+                                          const unsigned char *npub,
+                                          const crypto_aead_aes256gcm_state *ctx_)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(4, 8, 9)));
+
+SODIUM_EXPORT
+int crypto_aead_aes256gcm_encrypt_detached_afternm(unsigned char *c,
+                                                   unsigned char *mac,
+                                                   unsigned long long *maclen_p,
+                                                   const unsigned char *m,
+                                                   unsigned long long mlen,
+                                                   const unsigned char *ad,
+                                                   unsigned long long adlen,
+                                                   const unsigned char *nsec,
+                                                   const unsigned char *npub,
+                                                   const crypto_aead_aes256gcm_state *ctx_)
+            __attribute__ ((nonnull(1, 2, 9, 10)));
+
+SODIUM_EXPORT
+int crypto_aead_aes256gcm_decrypt_detached_afternm(unsigned char *m,
+                                                   unsigned char *nsec,
+                                                   const unsigned char *c,
+                                                   unsigned long long clen,
+                                                   const unsigned char *mac,
+                                                   const unsigned char *ad,
+                                                   unsigned long long adlen,
+                                                   const unsigned char *npub,
+                                                   const crypto_aead_aes256gcm_state *ctx_)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(3, 5, 8, 9)));
+
+SODIUM_EXPORT
+void crypto_aead_aes256gcm_keygen(unsigned char k[crypto_aead_aes256gcm_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_aead_chacha20poly1305.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_aead_chacha20poly1305.h
new file mode 100644
index 00000000000..5d671df142d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_aead_chacha20poly1305.h
@@ -0,0 +1,180 @@
+#ifndef crypto_aead_chacha20poly1305_H
+#define crypto_aead_chacha20poly1305_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+/* -- IETF ChaCha20-Poly1305 construction with a 96-bit nonce and a 32-bit internal counter -- */
+
+#define crypto_aead_chacha20poly1305_ietf_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_aead_chacha20poly1305_ietf_keybytes(void);
+
+#define crypto_aead_chacha20poly1305_ietf_NSECBYTES 0U
+SODIUM_EXPORT
+size_t crypto_aead_chacha20poly1305_ietf_nsecbytes(void);
+
+#define crypto_aead_chacha20poly1305_ietf_NPUBBYTES 12U
+
+SODIUM_EXPORT
+size_t crypto_aead_chacha20poly1305_ietf_npubbytes(void);
+
+#define crypto_aead_chacha20poly1305_ietf_ABYTES 16U
+SODIUM_EXPORT
+size_t crypto_aead_chacha20poly1305_ietf_abytes(void);
+
+#define crypto_aead_chacha20poly1305_ietf_MESSAGEBYTES_MAX \
+    SODIUM_MIN(SODIUM_SIZE_MAX - crypto_aead_chacha20poly1305_ietf_ABYTES, \
+               (64ULL * ((1ULL << 32) - 1ULL)))
+SODIUM_EXPORT
+size_t crypto_aead_chacha20poly1305_ietf_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_aead_chacha20poly1305_ietf_encrypt(unsigned char *c,
+                                              unsigned long long *clen_p,
+                                              const unsigned char *m,
+                                              unsigned long long mlen,
+                                              const unsigned char *ad,
+                                              unsigned long long adlen,
+                                              const unsigned char *nsec,
+                                              const unsigned char *npub,
+                                              const unsigned char *k)
+            __attribute__ ((nonnull(1, 8, 9)));
+
+SODIUM_EXPORT
+int crypto_aead_chacha20poly1305_ietf_decrypt(unsigned char *m,
+                                              unsigned long long *mlen_p,
+                                              unsigned char *nsec,
+                                              const unsigned char *c,
+                                              unsigned long long clen,
+                                              const unsigned char *ad,
+                                              unsigned long long adlen,
+                                              const unsigned char *npub,
+                                              const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(4, 8, 9)));
+
+SODIUM_EXPORT
+int crypto_aead_chacha20poly1305_ietf_encrypt_detached(unsigned char *c,
+                                                       unsigned char *mac,
+                                                       unsigned long long *maclen_p,
+                                                       const unsigned char *m,
+                                                       unsigned long long mlen,
+                                                       const unsigned char *ad,
+                                                       unsigned long long adlen,
+                                                       const unsigned char *nsec,
+                                                       const unsigned char *npub,
+                                                       const unsigned char *k)
+            __attribute__ ((nonnull(1, 2, 9, 10)));
+
+SODIUM_EXPORT
+int crypto_aead_chacha20poly1305_ietf_decrypt_detached(unsigned char *m,
+                                                       unsigned char *nsec,
+                                                       const unsigned char *c,
+                                                       unsigned long long clen,
+                                                       const unsigned char *mac,
+                                                       const unsigned char *ad,
+                                                       unsigned long long adlen,
+                                                       const unsigned char *npub,
+                                                       const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(3, 5, 8, 9)));
+
+SODIUM_EXPORT
+void crypto_aead_chacha20poly1305_ietf_keygen(unsigned char k[crypto_aead_chacha20poly1305_ietf_KEYBYTES])
+            __attribute__ ((nonnull));
+
+/* -- Original ChaCha20-Poly1305 construction with a 64-bit nonce and a 64-bit internal counter -- */
+
+#define crypto_aead_chacha20poly1305_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_aead_chacha20poly1305_keybytes(void);
+
+#define crypto_aead_chacha20poly1305_NSECBYTES 0U
+SODIUM_EXPORT
+size_t crypto_aead_chacha20poly1305_nsecbytes(void);
+
+#define crypto_aead_chacha20poly1305_NPUBBYTES 8U
+SODIUM_EXPORT
+size_t crypto_aead_chacha20poly1305_npubbytes(void);
+
+#define crypto_aead_chacha20poly1305_ABYTES 16U
+SODIUM_EXPORT
+size_t crypto_aead_chacha20poly1305_abytes(void);
+
+#define crypto_aead_chacha20poly1305_MESSAGEBYTES_MAX \
+    (SODIUM_SIZE_MAX - crypto_aead_chacha20poly1305_ABYTES)
+SODIUM_EXPORT
+size_t crypto_aead_chacha20poly1305_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_aead_chacha20poly1305_encrypt(unsigned char *c,
+                                         unsigned long long *clen_p,
+                                         const unsigned char *m,
+                                         unsigned long long mlen,
+                                         const unsigned char *ad,
+                                         unsigned long long adlen,
+                                         const unsigned char *nsec,
+                                         const unsigned char *npub,
+                                         const unsigned char *k)
+            __attribute__ ((nonnull(1, 8, 9)));
+
+SODIUM_EXPORT
+int crypto_aead_chacha20poly1305_decrypt(unsigned char *m,
+                                         unsigned long long *mlen_p,
+                                         unsigned char *nsec,
+                                         const unsigned char *c,
+                                         unsigned long long clen,
+                                         const unsigned char *ad,
+                                         unsigned long long adlen,
+                                         const unsigned char *npub,
+                                         const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(4, 8, 9)));
+
+SODIUM_EXPORT
+int crypto_aead_chacha20poly1305_encrypt_detached(unsigned char *c,
+                                                  unsigned char *mac,
+                                                  unsigned long long *maclen_p,
+                                                  const unsigned char *m,
+                                                  unsigned long long mlen,
+                                                  const unsigned char *ad,
+                                                  unsigned long long adlen,
+                                                  const unsigned char *nsec,
+                                                  const unsigned char *npub,
+                                                  const unsigned char *k)
+            __attribute__ ((nonnull(1, 2, 9, 10)));
+
+SODIUM_EXPORT
+int crypto_aead_chacha20poly1305_decrypt_detached(unsigned char *m,
+                                                  unsigned char *nsec,
+                                                  const unsigned char *c,
+                                                  unsigned long long clen,
+                                                  const unsigned char *mac,
+                                                  const unsigned char *ad,
+                                                  unsigned long long adlen,
+                                                  const unsigned char *npub,
+                                                  const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(3, 5, 8, 9)));
+
+SODIUM_EXPORT
+void crypto_aead_chacha20poly1305_keygen(unsigned char k[crypto_aead_chacha20poly1305_KEYBYTES])
+            __attribute__ ((nonnull));
+
+/* Aliases */
+
+#define crypto_aead_chacha20poly1305_IETF_KEYBYTES         crypto_aead_chacha20poly1305_ietf_KEYBYTES
+#define crypto_aead_chacha20poly1305_IETF_NSECBYTES        crypto_aead_chacha20poly1305_ietf_NSECBYTES
+#define crypto_aead_chacha20poly1305_IETF_NPUBBYTES        crypto_aead_chacha20poly1305_ietf_NPUBBYTES
+#define crypto_aead_chacha20poly1305_IETF_ABYTES           crypto_aead_chacha20poly1305_ietf_ABYTES
+#define crypto_aead_chacha20poly1305_IETF_MESSAGEBYTES_MAX crypto_aead_chacha20poly1305_ietf_MESSAGEBYTES_MAX
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_aead_xchacha20poly1305.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_aead_xchacha20poly1305.h
new file mode 100644
index 00000000000..6643b0cbf50
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_aead_xchacha20poly1305.h
@@ -0,0 +1,100 @@
+#ifndef crypto_aead_xchacha20poly1305_H
+#define crypto_aead_xchacha20poly1305_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_aead_xchacha20poly1305_ietf_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_aead_xchacha20poly1305_ietf_keybytes(void);
+
+#define crypto_aead_xchacha20poly1305_ietf_NSECBYTES 0U
+SODIUM_EXPORT
+size_t crypto_aead_xchacha20poly1305_ietf_nsecbytes(void);
+
+#define crypto_aead_xchacha20poly1305_ietf_NPUBBYTES 24U
+SODIUM_EXPORT
+size_t crypto_aead_xchacha20poly1305_ietf_npubbytes(void);
+
+#define crypto_aead_xchacha20poly1305_ietf_ABYTES 16U
+SODIUM_EXPORT
+size_t crypto_aead_xchacha20poly1305_ietf_abytes(void);
+
+#define crypto_aead_xchacha20poly1305_ietf_MESSAGEBYTES_MAX \
+    (SODIUM_SIZE_MAX - crypto_aead_xchacha20poly1305_ietf_ABYTES)
+SODIUM_EXPORT
+size_t crypto_aead_xchacha20poly1305_ietf_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_aead_xchacha20poly1305_ietf_encrypt(unsigned char *c,
+                                               unsigned long long *clen_p,
+                                               const unsigned char *m,
+                                               unsigned long long mlen,
+                                               const unsigned char *ad,
+                                               unsigned long long adlen,
+                                               const unsigned char *nsec,
+                                               const unsigned char *npub,
+                                               const unsigned char *k)
+            __attribute__ ((nonnull(1, 8, 9)));
+
+SODIUM_EXPORT
+int crypto_aead_xchacha20poly1305_ietf_decrypt(unsigned char *m,
+                                               unsigned long long *mlen_p,
+                                               unsigned char *nsec,
+                                               const unsigned char *c,
+                                               unsigned long long clen,
+                                               const unsigned char *ad,
+                                               unsigned long long adlen,
+                                               const unsigned char *npub,
+                                               const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(4, 8, 9)));
+
+SODIUM_EXPORT
+int crypto_aead_xchacha20poly1305_ietf_encrypt_detached(unsigned char *c,
+                                                        unsigned char *mac,
+                                                        unsigned long long *maclen_p,
+                                                        const unsigned char *m,
+                                                        unsigned long long mlen,
+                                                        const unsigned char *ad,
+                                                        unsigned long long adlen,
+                                                        const unsigned char *nsec,
+                                                        const unsigned char *npub,
+                                                        const unsigned char *k)
+            __attribute__ ((nonnull(1, 2, 9, 10)));
+
+SODIUM_EXPORT
+int crypto_aead_xchacha20poly1305_ietf_decrypt_detached(unsigned char *m,
+                                                        unsigned char *nsec,
+                                                        const unsigned char *c,
+                                                        unsigned long long clen,
+                                                        const unsigned char *mac,
+                                                        const unsigned char *ad,
+                                                        unsigned long long adlen,
+                                                        const unsigned char *npub,
+                                                        const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(3, 5, 8, 9)));
+
+SODIUM_EXPORT
+void crypto_aead_xchacha20poly1305_ietf_keygen(unsigned char k[crypto_aead_xchacha20poly1305_ietf_KEYBYTES])
+            __attribute__ ((nonnull));
+
+/* Aliases */
+
+#define crypto_aead_xchacha20poly1305_IETF_KEYBYTES         crypto_aead_xchacha20poly1305_ietf_KEYBYTES
+#define crypto_aead_xchacha20poly1305_IETF_NSECBYTES        crypto_aead_xchacha20poly1305_ietf_NSECBYTES
+#define crypto_aead_xchacha20poly1305_IETF_NPUBBYTES        crypto_aead_xchacha20poly1305_ietf_NPUBBYTES
+#define crypto_aead_xchacha20poly1305_IETF_ABYTES           crypto_aead_xchacha20poly1305_ietf_ABYTES
+#define crypto_aead_xchacha20poly1305_IETF_MESSAGEBYTES_MAX crypto_aead_xchacha20poly1305_ietf_MESSAGEBYTES_MAX
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth.h
new file mode 100644
index 00000000000..540aee0e8d7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth.h
@@ -0,0 +1,46 @@
+#ifndef crypto_auth_H
+#define crypto_auth_H
+
+#include <stddef.h>
+
+#include "crypto_auth_hmacsha512256.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_auth_BYTES crypto_auth_hmacsha512256_BYTES
+SODIUM_EXPORT
+size_t  crypto_auth_bytes(void);
+
+#define crypto_auth_KEYBYTES crypto_auth_hmacsha512256_KEYBYTES
+SODIUM_EXPORT
+size_t  crypto_auth_keybytes(void);
+
+#define crypto_auth_PRIMITIVE "hmacsha512256"
+SODIUM_EXPORT
+const char *crypto_auth_primitive(void);
+
+SODIUM_EXPORT
+int crypto_auth(unsigned char *out, const unsigned char *in,
+                unsigned long long inlen, const unsigned char *k)
+            __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_auth_verify(const unsigned char *h, const unsigned char *in,
+                       unsigned long long inlen, const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+void crypto_auth_keygen(unsigned char k[crypto_auth_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth_hmacsha256.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth_hmacsha256.h
new file mode 100644
index 00000000000..3da864c7d27
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth_hmacsha256.h
@@ -0,0 +1,70 @@
+#ifndef crypto_auth_hmacsha256_H
+#define crypto_auth_hmacsha256_H
+
+#include <stddef.h>
+#include "crypto_hash_sha256.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_auth_hmacsha256_BYTES 32U
+SODIUM_EXPORT
+size_t crypto_auth_hmacsha256_bytes(void);
+
+#define crypto_auth_hmacsha256_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_auth_hmacsha256_keybytes(void);
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha256(unsigned char *out,
+                           const unsigned char *in,
+                           unsigned long long inlen,
+                           const unsigned char *k) __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha256_verify(const unsigned char *h,
+                                  const unsigned char *in,
+                                  unsigned long long inlen,
+                                  const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4)));
+
+/* ------------------------------------------------------------------------- */
+
+typedef struct crypto_auth_hmacsha256_state {
+    crypto_hash_sha256_state ictx;
+    crypto_hash_sha256_state octx;
+} crypto_auth_hmacsha256_state;
+
+SODIUM_EXPORT
+size_t crypto_auth_hmacsha256_statebytes(void);
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha256_init(crypto_auth_hmacsha256_state *state,
+                                const unsigned char *key,
+                                size_t keylen) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha256_update(crypto_auth_hmacsha256_state *state,
+                                  const unsigned char *in,
+                                  unsigned long long inlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha256_final(crypto_auth_hmacsha256_state *state,
+                                 unsigned char *out) __attribute__ ((nonnull));
+
+
+SODIUM_EXPORT
+void crypto_auth_hmacsha256_keygen(unsigned char k[crypto_auth_hmacsha256_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth_hmacsha512.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth_hmacsha512.h
new file mode 100644
index 00000000000..d992cb8163d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth_hmacsha512.h
@@ -0,0 +1,68 @@
+#ifndef crypto_auth_hmacsha512_H
+#define crypto_auth_hmacsha512_H
+
+#include <stddef.h>
+#include "crypto_hash_sha512.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_auth_hmacsha512_BYTES 64U
+SODIUM_EXPORT
+size_t crypto_auth_hmacsha512_bytes(void);
+
+#define crypto_auth_hmacsha512_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_auth_hmacsha512_keybytes(void);
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha512(unsigned char *out,
+                           const unsigned char *in,
+                           unsigned long long inlen,
+                           const unsigned char *k) __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha512_verify(const unsigned char *h,
+                                  const unsigned char *in,
+                                  unsigned long long inlen,
+                                  const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4)));
+
+/* ------------------------------------------------------------------------- */
+
+typedef struct crypto_auth_hmacsha512_state {
+    crypto_hash_sha512_state ictx;
+    crypto_hash_sha512_state octx;
+} crypto_auth_hmacsha512_state;
+
+SODIUM_EXPORT
+size_t crypto_auth_hmacsha512_statebytes(void);
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha512_init(crypto_auth_hmacsha512_state *state,
+                                const unsigned char *key,
+                                size_t keylen) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha512_update(crypto_auth_hmacsha512_state *state,
+                                  const unsigned char *in,
+                                  unsigned long long inlen) __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha512_final(crypto_auth_hmacsha512_state *state,
+                                 unsigned char *out) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_auth_hmacsha512_keygen(unsigned char k[crypto_auth_hmacsha512_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth_hmacsha512256.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth_hmacsha512256.h
new file mode 100644
index 00000000000..3fb52638924
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_auth_hmacsha512256.h
@@ -0,0 +1,65 @@
+#ifndef crypto_auth_hmacsha512256_H
+#define crypto_auth_hmacsha512256_H
+
+#include <stddef.h>
+#include "crypto_auth_hmacsha512.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_auth_hmacsha512256_BYTES 32U
+SODIUM_EXPORT
+size_t crypto_auth_hmacsha512256_bytes(void);
+
+#define crypto_auth_hmacsha512256_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_auth_hmacsha512256_keybytes(void);
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha512256(unsigned char *out,
+                              const unsigned char *in,
+                              unsigned long long inlen,
+                              const unsigned char *k) __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha512256_verify(const unsigned char *h,
+                                     const unsigned char *in,
+                                     unsigned long long inlen,
+                                     const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4)));
+
+/* ------------------------------------------------------------------------- */
+
+typedef crypto_auth_hmacsha512_state crypto_auth_hmacsha512256_state;
+
+SODIUM_EXPORT
+size_t crypto_auth_hmacsha512256_statebytes(void);
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha512256_init(crypto_auth_hmacsha512256_state *state,
+                                   const unsigned char *key,
+                                   size_t keylen) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha512256_update(crypto_auth_hmacsha512256_state *state,
+                                     const unsigned char *in,
+                                     unsigned long long inlen) __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_auth_hmacsha512256_final(crypto_auth_hmacsha512256_state *state,
+                                    unsigned char *out) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_auth_hmacsha512256_keygen(unsigned char k[crypto_auth_hmacsha512256_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_box.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_box.h
new file mode 100644
index 00000000000..e060dd29fc4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_box.h
@@ -0,0 +1,177 @@
+#ifndef crypto_box_H
+#define crypto_box_H
+
+/*
+ * THREAD SAFETY: crypto_box_keypair() is thread-safe,
+ * provided that sodium_init() was called before.
+ *
+ * Other functions are always thread-safe.
+ */
+
+#include <stddef.h>
+
+#include "crypto_box_curve25519xsalsa20poly1305.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_box_SEEDBYTES crypto_box_curve25519xsalsa20poly1305_SEEDBYTES
+SODIUM_EXPORT
+size_t  crypto_box_seedbytes(void);
+
+#define crypto_box_PUBLICKEYBYTES crypto_box_curve25519xsalsa20poly1305_PUBLICKEYBYTES
+SODIUM_EXPORT
+size_t  crypto_box_publickeybytes(void);
+
+#define crypto_box_SECRETKEYBYTES crypto_box_curve25519xsalsa20poly1305_SECRETKEYBYTES
+SODIUM_EXPORT
+size_t  crypto_box_secretkeybytes(void);
+
+#define crypto_box_NONCEBYTES crypto_box_curve25519xsalsa20poly1305_NONCEBYTES
+SODIUM_EXPORT
+size_t  crypto_box_noncebytes(void);
+
+#define crypto_box_MACBYTES crypto_box_curve25519xsalsa20poly1305_MACBYTES
+SODIUM_EXPORT
+size_t  crypto_box_macbytes(void);
+
+#define crypto_box_MESSAGEBYTES_MAX crypto_box_curve25519xsalsa20poly1305_MESSAGEBYTES_MAX
+SODIUM_EXPORT
+size_t  crypto_box_messagebytes_max(void);
+
+#define crypto_box_PRIMITIVE "curve25519xsalsa20poly1305"
+SODIUM_EXPORT
+const char *crypto_box_primitive(void);
+
+SODIUM_EXPORT
+int crypto_box_seed_keypair(unsigned char *pk, unsigned char *sk,
+                            const unsigned char *seed)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_box_keypair(unsigned char *pk, unsigned char *sk)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_box_easy(unsigned char *c, const unsigned char *m,
+                    unsigned long long mlen, const unsigned char *n,
+                    const unsigned char *pk, const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_box_open_easy(unsigned char *m, const unsigned char *c,
+                         unsigned long long clen, const unsigned char *n,
+                         const unsigned char *pk, const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_box_detached(unsigned char *c, unsigned char *mac,
+                        const unsigned char *m, unsigned long long mlen,
+                        const unsigned char *n, const unsigned char *pk,
+                        const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 2, 5, 6, 7)));
+
+SODIUM_EXPORT
+int crypto_box_open_detached(unsigned char *m, const unsigned char *c,
+                             const unsigned char *mac,
+                             unsigned long long clen,
+                             const unsigned char *n,
+                             const unsigned char *pk,
+                             const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 3, 5, 6, 7)));
+
+/* -- Precomputation interface -- */
+
+#define crypto_box_BEFORENMBYTES crypto_box_curve25519xsalsa20poly1305_BEFORENMBYTES
+SODIUM_EXPORT
+size_t  crypto_box_beforenmbytes(void);
+
+SODIUM_EXPORT
+int crypto_box_beforenm(unsigned char *k, const unsigned char *pk,
+                        const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_box_easy_afternm(unsigned char *c, const unsigned char *m,
+                            unsigned long long mlen, const unsigned char *n,
+                            const unsigned char *k) __attribute__ ((nonnull(1, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_box_open_easy_afternm(unsigned char *m, const unsigned char *c,
+                                 unsigned long long clen, const unsigned char *n,
+                                 const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_box_detached_afternm(unsigned char *c, unsigned char *mac,
+                                const unsigned char *m, unsigned long long mlen,
+                                const unsigned char *n, const unsigned char *k)
+            __attribute__ ((nonnull(1, 2, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_box_open_detached_afternm(unsigned char *m, const unsigned char *c,
+                                     const unsigned char *mac,
+                                     unsigned long long clen, const unsigned char *n,
+                                     const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 3, 5, 6)));
+
+/* -- Ephemeral SK interface -- */
+
+#define crypto_box_SEALBYTES (crypto_box_PUBLICKEYBYTES + crypto_box_MACBYTES)
+SODIUM_EXPORT
+size_t crypto_box_sealbytes(void);
+
+SODIUM_EXPORT
+int crypto_box_seal(unsigned char *c, const unsigned char *m,
+                    unsigned long long mlen, const unsigned char *pk)
+            __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_box_seal_open(unsigned char *m, const unsigned char *c,
+                         unsigned long long clen,
+                         const unsigned char *pk, const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5)));
+
+/* -- NaCl compatibility interface ; Requires padding -- */
+
+#define crypto_box_ZEROBYTES crypto_box_curve25519xsalsa20poly1305_ZEROBYTES
+SODIUM_EXPORT
+size_t  crypto_box_zerobytes(void);
+
+#define crypto_box_BOXZEROBYTES crypto_box_curve25519xsalsa20poly1305_BOXZEROBYTES
+SODIUM_EXPORT
+size_t  crypto_box_boxzerobytes(void);
+
+SODIUM_EXPORT
+int crypto_box(unsigned char *c, const unsigned char *m,
+               unsigned long long mlen, const unsigned char *n,
+               const unsigned char *pk, const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_box_open(unsigned char *m, const unsigned char *c,
+                    unsigned long long clen, const unsigned char *n,
+                    const unsigned char *pk, const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_box_afternm(unsigned char *c, const unsigned char *m,
+                       unsigned long long mlen, const unsigned char *n,
+                       const unsigned char *k) __attribute__ ((nonnull(1, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_box_open_afternm(unsigned char *m, const unsigned char *c,
+                            unsigned long long clen, const unsigned char *n,
+                            const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_box_curve25519xchacha20poly1305.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_box_curve25519xchacha20poly1305.h
new file mode 100644
index 00000000000..26a3d31efa9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_box_curve25519xchacha20poly1305.h
@@ -0,0 +1,164 @@
+
+#ifndef crypto_box_curve25519xchacha20poly1305_H
+#define crypto_box_curve25519xchacha20poly1305_H
+
+#include <stddef.h>
+#include "crypto_stream_xchacha20.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_box_curve25519xchacha20poly1305_SEEDBYTES 32U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xchacha20poly1305_seedbytes(void);
+
+#define crypto_box_curve25519xchacha20poly1305_PUBLICKEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xchacha20poly1305_publickeybytes(void);
+
+#define crypto_box_curve25519xchacha20poly1305_SECRETKEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xchacha20poly1305_secretkeybytes(void);
+
+#define crypto_box_curve25519xchacha20poly1305_BEFORENMBYTES 32U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xchacha20poly1305_beforenmbytes(void);
+
+#define crypto_box_curve25519xchacha20poly1305_NONCEBYTES 24U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xchacha20poly1305_noncebytes(void);
+
+#define crypto_box_curve25519xchacha20poly1305_MACBYTES 16U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xchacha20poly1305_macbytes(void);
+
+#define crypto_box_curve25519xchacha20poly1305_MESSAGEBYTES_MAX \
+    (crypto_stream_xchacha20_MESSAGEBYTES_MAX - crypto_box_curve25519xchacha20poly1305_MACBYTES)
+SODIUM_EXPORT
+size_t crypto_box_curve25519xchacha20poly1305_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_seed_keypair(unsigned char *pk,
+                                                        unsigned char *sk,
+                                                        const unsigned char *seed)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_keypair(unsigned char *pk,
+                                                   unsigned char *sk)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_easy(unsigned char *c,
+                                                const unsigned char *m,
+                                                unsigned long long mlen,
+                                                const unsigned char *n,
+                                                const unsigned char *pk,
+                                                const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_open_easy(unsigned char *m,
+                                                     const unsigned char *c,
+                                                     unsigned long long clen,
+                                                     const unsigned char *n,
+                                                     const unsigned char *pk,
+                                                     const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_detached(unsigned char *c,
+                                                    unsigned char *mac,
+                                                    const unsigned char *m,
+                                                    unsigned long long mlen,
+                                                    const unsigned char *n,
+                                                    const unsigned char *pk,
+                                                    const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 2, 5, 6, 7)));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_open_detached(unsigned char *m,
+                                                         const unsigned char *c,
+                                                         const unsigned char *mac,
+                                                         unsigned long long clen,
+                                                         const unsigned char *n,
+                                                         const unsigned char *pk,
+                                                         const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 3, 5, 6, 7)));
+
+/* -- Precomputation interface -- */
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_beforenm(unsigned char *k,
+                                                    const unsigned char *pk,
+                                                    const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_easy_afternm(unsigned char *c,
+                                                        const unsigned char *m,
+                                                        unsigned long long mlen,
+                                                        const unsigned char *n,
+                                                        const unsigned char *k)
+            __attribute__ ((nonnull(1, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_open_easy_afternm(unsigned char *m,
+                                                             const unsigned char *c,
+                                                             unsigned long long clen,
+                                                             const unsigned char *n,
+                                                             const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_detached_afternm(unsigned char *c,
+                                                            unsigned char *mac,
+                                                            const unsigned char *m,
+                                                            unsigned long long mlen,
+                                                            const unsigned char *n,
+                                                            const unsigned char *k)
+            __attribute__ ((nonnull(1, 2, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_open_detached_afternm(unsigned char *m,
+                                                                 const unsigned char *c,
+                                                                 const unsigned char *mac,
+                                                                 unsigned long long clen,
+                                                                 const unsigned char *n,
+                                                                 const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 3, 5, 6)));
+
+/* -- Ephemeral SK interface -- */
+
+#define crypto_box_curve25519xchacha20poly1305_SEALBYTES \
+    (crypto_box_curve25519xchacha20poly1305_PUBLICKEYBYTES + \
+     crypto_box_curve25519xchacha20poly1305_MACBYTES)
+
+SODIUM_EXPORT
+size_t crypto_box_curve25519xchacha20poly1305_sealbytes(void);
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_seal(unsigned char *c,
+                                                const unsigned char *m,
+                                                unsigned long long mlen,
+                                                const unsigned char *pk)
+            __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xchacha20poly1305_seal_open(unsigned char *m,
+                                                     const unsigned char *c,
+                                                     unsigned long long clen,
+                                                     const unsigned char *pk,
+                                                     const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_box_curve25519xsalsa20poly1305.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_box_curve25519xsalsa20poly1305.h
new file mode 100644
index 00000000000..e733f49995b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_box_curve25519xsalsa20poly1305.h
@@ -0,0 +1,112 @@
+#ifndef crypto_box_curve25519xsalsa20poly1305_H
+#define crypto_box_curve25519xsalsa20poly1305_H
+
+#include <stddef.h>
+#include "crypto_stream_xsalsa20.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_box_curve25519xsalsa20poly1305_SEEDBYTES 32U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xsalsa20poly1305_seedbytes(void);
+
+#define crypto_box_curve25519xsalsa20poly1305_PUBLICKEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xsalsa20poly1305_publickeybytes(void);
+
+#define crypto_box_curve25519xsalsa20poly1305_SECRETKEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xsalsa20poly1305_secretkeybytes(void);
+
+#define crypto_box_curve25519xsalsa20poly1305_BEFORENMBYTES 32U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xsalsa20poly1305_beforenmbytes(void);
+
+#define crypto_box_curve25519xsalsa20poly1305_NONCEBYTES 24U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xsalsa20poly1305_noncebytes(void);
+
+#define crypto_box_curve25519xsalsa20poly1305_MACBYTES 16U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xsalsa20poly1305_macbytes(void);
+
+/* Only for the libsodium API - The NaCl compatibility API would require BOXZEROBYTES extra bytes */
+#define crypto_box_curve25519xsalsa20poly1305_MESSAGEBYTES_MAX \
+    (crypto_stream_xsalsa20_MESSAGEBYTES_MAX - crypto_box_curve25519xsalsa20poly1305_MACBYTES)
+SODIUM_EXPORT
+size_t crypto_box_curve25519xsalsa20poly1305_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_box_curve25519xsalsa20poly1305_seed_keypair(unsigned char *pk,
+                                                       unsigned char *sk,
+                                                       const unsigned char *seed)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xsalsa20poly1305_keypair(unsigned char *pk,
+                                                  unsigned char *sk)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xsalsa20poly1305_beforenm(unsigned char *k,
+                                                   const unsigned char *pk,
+                                                   const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+/* -- NaCl compatibility interface ; Requires padding -- */
+
+#define crypto_box_curve25519xsalsa20poly1305_BOXZEROBYTES 16U
+SODIUM_EXPORT
+size_t crypto_box_curve25519xsalsa20poly1305_boxzerobytes(void);
+
+#define crypto_box_curve25519xsalsa20poly1305_ZEROBYTES \
+    (crypto_box_curve25519xsalsa20poly1305_BOXZEROBYTES + \
+     crypto_box_curve25519xsalsa20poly1305_MACBYTES)
+SODIUM_EXPORT
+size_t crypto_box_curve25519xsalsa20poly1305_zerobytes(void);
+
+SODIUM_EXPORT
+int crypto_box_curve25519xsalsa20poly1305(unsigned char *c,
+                                          const unsigned char *m,
+                                          unsigned long long mlen,
+                                          const unsigned char *n,
+                                          const unsigned char *pk,
+                                          const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xsalsa20poly1305_open(unsigned char *m,
+                                               const unsigned char *c,
+                                               unsigned long long clen,
+                                               const unsigned char *n,
+                                               const unsigned char *pk,
+                                               const unsigned char *sk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xsalsa20poly1305_afternm(unsigned char *c,
+                                                  const unsigned char *m,
+                                                  unsigned long long mlen,
+                                                  const unsigned char *n,
+                                                  const unsigned char *k)
+            __attribute__ ((nonnull(1, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_box_curve25519xsalsa20poly1305_open_afternm(unsigned char *m,
+                                                       const unsigned char *c,
+                                                       unsigned long long clen,
+                                                       const unsigned char *n,
+                                                       const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_ed25519.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_ed25519.h
new file mode 100644
index 00000000000..3eae00c4562
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_ed25519.h
@@ -0,0 +1,100 @@
+#ifndef crypto_core_ed25519_H
+#define crypto_core_ed25519_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_core_ed25519_BYTES 32
+SODIUM_EXPORT
+size_t crypto_core_ed25519_bytes(void);
+
+#define crypto_core_ed25519_UNIFORMBYTES 32
+SODIUM_EXPORT
+size_t crypto_core_ed25519_uniformbytes(void);
+
+#define crypto_core_ed25519_HASHBYTES 64
+SODIUM_EXPORT
+size_t crypto_core_ed25519_hashbytes(void);
+
+#define crypto_core_ed25519_SCALARBYTES 32
+SODIUM_EXPORT
+size_t crypto_core_ed25519_scalarbytes(void);
+
+#define crypto_core_ed25519_NONREDUCEDSCALARBYTES 64
+SODIUM_EXPORT
+size_t crypto_core_ed25519_nonreducedscalarbytes(void);
+
+SODIUM_EXPORT
+int crypto_core_ed25519_is_valid_point(const unsigned char *p)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_core_ed25519_add(unsigned char *r,
+                            const unsigned char *p, const unsigned char *q)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_core_ed25519_sub(unsigned char *r,
+                            const unsigned char *p, const unsigned char *q)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_core_ed25519_from_uniform(unsigned char *p, const unsigned char *r)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_core_ed25519_from_hash(unsigned char *p, const unsigned char *h)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ed25519_random(unsigned char *p)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ed25519_scalar_random(unsigned char *r)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_core_ed25519_scalar_invert(unsigned char *recip, const unsigned char *s)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ed25519_scalar_negate(unsigned char *neg, const unsigned char *s)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ed25519_scalar_complement(unsigned char *comp, const unsigned char *s)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ed25519_scalar_add(unsigned char *z, const unsigned char *x,
+                                    const unsigned char *y)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ed25519_scalar_sub(unsigned char *z, const unsigned char *x,
+                                    const unsigned char *y)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ed25519_scalar_mul(unsigned char *z, const unsigned char *x,
+                                    const unsigned char *y)
+            __attribute__ ((nonnull));
+
+/*
+ * The interval `s` is sampled from should be at least 317 bits to ensure almost
+ * uniformity of `r` over `L`.
+ */
+SODIUM_EXPORT
+void crypto_core_ed25519_scalar_reduce(unsigned char *r, const unsigned char *s)
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_hchacha20.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_hchacha20.h
new file mode 100644
index 00000000000..ece141b09b4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_hchacha20.h
@@ -0,0 +1,36 @@
+#ifndef crypto_core_hchacha20_H
+#define crypto_core_hchacha20_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_core_hchacha20_OUTPUTBYTES 32U
+SODIUM_EXPORT
+size_t crypto_core_hchacha20_outputbytes(void);
+
+#define crypto_core_hchacha20_INPUTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_core_hchacha20_inputbytes(void);
+
+#define crypto_core_hchacha20_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_core_hchacha20_keybytes(void);
+
+#define crypto_core_hchacha20_CONSTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_core_hchacha20_constbytes(void);
+
+SODIUM_EXPORT
+int crypto_core_hchacha20(unsigned char *out, const unsigned char *in,
+                          const unsigned char *k, const unsigned char *c)
+            __attribute__ ((nonnull(1, 2, 3)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_hsalsa20.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_hsalsa20.h
new file mode 100644
index 00000000000..4bf7a48786f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_hsalsa20.h
@@ -0,0 +1,36 @@
+#ifndef crypto_core_hsalsa20_H
+#define crypto_core_hsalsa20_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_core_hsalsa20_OUTPUTBYTES 32U
+SODIUM_EXPORT
+size_t crypto_core_hsalsa20_outputbytes(void);
+
+#define crypto_core_hsalsa20_INPUTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_core_hsalsa20_inputbytes(void);
+
+#define crypto_core_hsalsa20_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_core_hsalsa20_keybytes(void);
+
+#define crypto_core_hsalsa20_CONSTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_core_hsalsa20_constbytes(void);
+
+SODIUM_EXPORT
+int crypto_core_hsalsa20(unsigned char *out, const unsigned char *in,
+                         const unsigned char *k, const unsigned char *c)
+            __attribute__ ((nonnull(1, 2, 3)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_ristretto255.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_ristretto255.h
new file mode 100644
index 00000000000..f2820e5576e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_ristretto255.h
@@ -0,0 +1,100 @@
+#ifndef crypto_core_ristretto255_H
+#define crypto_core_ristretto255_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_core_ristretto255_BYTES 32
+SODIUM_EXPORT
+size_t crypto_core_ristretto255_bytes(void);
+
+#define crypto_core_ristretto255_HASHBYTES 64
+SODIUM_EXPORT
+size_t crypto_core_ristretto255_hashbytes(void);
+
+#define crypto_core_ristretto255_SCALARBYTES 32
+SODIUM_EXPORT
+size_t crypto_core_ristretto255_scalarbytes(void);
+
+#define crypto_core_ristretto255_NONREDUCEDSCALARBYTES 64
+SODIUM_EXPORT
+size_t crypto_core_ristretto255_nonreducedscalarbytes(void);
+
+SODIUM_EXPORT
+int crypto_core_ristretto255_is_valid_point(const unsigned char *p)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_core_ristretto255_add(unsigned char *r,
+                                 const unsigned char *p, const unsigned char *q)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_core_ristretto255_sub(unsigned char *r,
+                                 const unsigned char *p, const unsigned char *q)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_core_ristretto255_from_hash(unsigned char *p,
+                                       const unsigned char *r)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ristretto255_random(unsigned char *p)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ristretto255_scalar_random(unsigned char *r)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_core_ristretto255_scalar_invert(unsigned char *recip,
+                                           const unsigned char *s)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ristretto255_scalar_negate(unsigned char *neg,
+                                            const unsigned char *s)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ristretto255_scalar_complement(unsigned char *comp,
+                                                const unsigned char *s)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ristretto255_scalar_add(unsigned char *z,
+                                         const unsigned char *x,
+                                         const unsigned char *y)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ristretto255_scalar_sub(unsigned char *z,
+                                         const unsigned char *x,
+                                         const unsigned char *y)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_core_ristretto255_scalar_mul(unsigned char *z,
+                                         const unsigned char *x,
+                                         const unsigned char *y)
+            __attribute__ ((nonnull));
+
+/*
+ * The interval `s` is sampled from should be at least 317 bits to ensure almost
+ * uniformity of `r` over `L`.
+ */
+SODIUM_EXPORT
+void crypto_core_ristretto255_scalar_reduce(unsigned char *r,
+                                            const unsigned char *s)
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_salsa20.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_salsa20.h
new file mode 100644
index 00000000000..bd79fd9f540
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_salsa20.h
@@ -0,0 +1,36 @@
+#ifndef crypto_core_salsa20_H
+#define crypto_core_salsa20_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_core_salsa20_OUTPUTBYTES 64U
+SODIUM_EXPORT
+size_t crypto_core_salsa20_outputbytes(void);
+
+#define crypto_core_salsa20_INPUTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_core_salsa20_inputbytes(void);
+
+#define crypto_core_salsa20_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_core_salsa20_keybytes(void);
+
+#define crypto_core_salsa20_CONSTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_core_salsa20_constbytes(void);
+
+SODIUM_EXPORT
+int crypto_core_salsa20(unsigned char *out, const unsigned char *in,
+                        const unsigned char *k, const unsigned char *c)
+            __attribute__ ((nonnull(1, 2, 3)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_salsa2012.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_salsa2012.h
new file mode 100644
index 00000000000..05957591ca7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_salsa2012.h
@@ -0,0 +1,36 @@
+#ifndef crypto_core_salsa2012_H
+#define crypto_core_salsa2012_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_core_salsa2012_OUTPUTBYTES 64U
+SODIUM_EXPORT
+size_t crypto_core_salsa2012_outputbytes(void);
+
+#define crypto_core_salsa2012_INPUTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_core_salsa2012_inputbytes(void);
+
+#define crypto_core_salsa2012_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_core_salsa2012_keybytes(void);
+
+#define crypto_core_salsa2012_CONSTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_core_salsa2012_constbytes(void);
+
+SODIUM_EXPORT
+int crypto_core_salsa2012(unsigned char *out, const unsigned char *in,
+                          const unsigned char *k, const unsigned char *c)
+            __attribute__ ((nonnull(1, 2, 3)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_salsa208.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_salsa208.h
new file mode 100644
index 00000000000..d2f216af268
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_core_salsa208.h
@@ -0,0 +1,40 @@
+#ifndef crypto_core_salsa208_H
+#define crypto_core_salsa208_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_core_salsa208_OUTPUTBYTES 64U
+SODIUM_EXPORT
+size_t crypto_core_salsa208_outputbytes(void)
+            __attribute__ ((deprecated));
+
+#define crypto_core_salsa208_INPUTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_core_salsa208_inputbytes(void)
+            __attribute__ ((deprecated));
+
+#define crypto_core_salsa208_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_core_salsa208_keybytes(void)
+            __attribute__ ((deprecated));
+
+#define crypto_core_salsa208_CONSTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_core_salsa208_constbytes(void)
+            __attribute__ ((deprecated));
+
+SODIUM_EXPORT
+int crypto_core_salsa208(unsigned char *out, const unsigned char *in,
+                         const unsigned char *k, const unsigned char *c)
+            __attribute__ ((nonnull(1, 2, 3)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_generichash.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_generichash.h
new file mode 100644
index 00000000000..d897e5d26c5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_generichash.h
@@ -0,0 +1,84 @@
+#ifndef crypto_generichash_H
+#define crypto_generichash_H
+
+#include <stddef.h>
+
+#include "crypto_generichash_blake2b.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_generichash_BYTES_MIN crypto_generichash_blake2b_BYTES_MIN
+SODIUM_EXPORT
+size_t  crypto_generichash_bytes_min(void);
+
+#define crypto_generichash_BYTES_MAX crypto_generichash_blake2b_BYTES_MAX
+SODIUM_EXPORT
+size_t  crypto_generichash_bytes_max(void);
+
+#define crypto_generichash_BYTES crypto_generichash_blake2b_BYTES
+SODIUM_EXPORT
+size_t  crypto_generichash_bytes(void);
+
+#define crypto_generichash_KEYBYTES_MIN crypto_generichash_blake2b_KEYBYTES_MIN
+SODIUM_EXPORT
+size_t  crypto_generichash_keybytes_min(void);
+
+#define crypto_generichash_KEYBYTES_MAX crypto_generichash_blake2b_KEYBYTES_MAX
+SODIUM_EXPORT
+size_t  crypto_generichash_keybytes_max(void);
+
+#define crypto_generichash_KEYBYTES crypto_generichash_blake2b_KEYBYTES
+SODIUM_EXPORT
+size_t  crypto_generichash_keybytes(void);
+
+#define crypto_generichash_PRIMITIVE "blake2b"
+SODIUM_EXPORT
+const char *crypto_generichash_primitive(void);
+
+/*
+ * Important when writing bindings for other programming languages:
+ * the state address should be 64-bytes aligned.
+ */
+typedef crypto_generichash_blake2b_state crypto_generichash_state;
+
+SODIUM_EXPORT
+size_t  crypto_generichash_statebytes(void);
+
+SODIUM_EXPORT
+int crypto_generichash(unsigned char *out, size_t outlen,
+                       const unsigned char *in, unsigned long long inlen,
+                       const unsigned char *key, size_t keylen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_generichash_init(crypto_generichash_state *state,
+                            const unsigned char *key,
+                            const size_t keylen, const size_t outlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_generichash_update(crypto_generichash_state *state,
+                              const unsigned char *in,
+                              unsigned long long inlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_generichash_final(crypto_generichash_state *state,
+                             unsigned char *out, const size_t outlen)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_generichash_keygen(unsigned char k[crypto_generichash_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_generichash_blake2b.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_generichash_blake2b.h
new file mode 100644
index 00000000000..fee9d8ad196
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_generichash_blake2b.h
@@ -0,0 +1,118 @@
+#ifndef crypto_generichash_blake2b_H
+#define crypto_generichash_blake2b_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#if defined(__IBMC__) || defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+# pragma pack(1)
+#else
+# pragma pack(push, 1)
+#endif
+
+typedef struct CRYPTO_ALIGN(64) crypto_generichash_blake2b_state {
+    unsigned char opaque[384];
+} crypto_generichash_blake2b_state;
+
+#if defined(__IBMC__) || defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+# pragma pack()
+#else
+# pragma pack(pop)
+#endif
+
+#define crypto_generichash_blake2b_BYTES_MIN     16U
+SODIUM_EXPORT
+size_t crypto_generichash_blake2b_bytes_min(void);
+
+#define crypto_generichash_blake2b_BYTES_MAX     64U
+SODIUM_EXPORT
+size_t crypto_generichash_blake2b_bytes_max(void);
+
+#define crypto_generichash_blake2b_BYTES         32U
+SODIUM_EXPORT
+size_t crypto_generichash_blake2b_bytes(void);
+
+#define crypto_generichash_blake2b_KEYBYTES_MIN  16U
+SODIUM_EXPORT
+size_t crypto_generichash_blake2b_keybytes_min(void);
+
+#define crypto_generichash_blake2b_KEYBYTES_MAX  64U
+SODIUM_EXPORT
+size_t crypto_generichash_blake2b_keybytes_max(void);
+
+#define crypto_generichash_blake2b_KEYBYTES      32U
+SODIUM_EXPORT
+size_t crypto_generichash_blake2b_keybytes(void);
+
+#define crypto_generichash_blake2b_SALTBYTES     16U
+SODIUM_EXPORT
+size_t crypto_generichash_blake2b_saltbytes(void);
+
+#define crypto_generichash_blake2b_PERSONALBYTES 16U
+SODIUM_EXPORT
+size_t crypto_generichash_blake2b_personalbytes(void);
+
+SODIUM_EXPORT
+size_t crypto_generichash_blake2b_statebytes(void);
+
+SODIUM_EXPORT
+int crypto_generichash_blake2b(unsigned char *out, size_t outlen,
+                               const unsigned char *in,
+                               unsigned long long inlen,
+                               const unsigned char *key, size_t keylen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_generichash_blake2b_salt_personal(unsigned char *out, size_t outlen,
+                                             const unsigned char *in,
+                                             unsigned long long inlen,
+                                             const unsigned char *key,
+                                             size_t keylen,
+                                             const unsigned char *salt,
+                                             const unsigned char *personal)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_generichash_blake2b_init(crypto_generichash_blake2b_state *state,
+                                    const unsigned char *key,
+                                    const size_t keylen, const size_t outlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_generichash_blake2b_init_salt_personal(crypto_generichash_blake2b_state *state,
+                                                  const unsigned char *key,
+                                                  const size_t keylen, const size_t outlen,
+                                                  const unsigned char *salt,
+                                                  const unsigned char *personal)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_generichash_blake2b_update(crypto_generichash_blake2b_state *state,
+                                      const unsigned char *in,
+                                      unsigned long long inlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_generichash_blake2b_final(crypto_generichash_blake2b_state *state,
+                                     unsigned char *out,
+                                     const size_t outlen) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_generichash_blake2b_keygen(unsigned char k[crypto_generichash_blake2b_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_hash.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_hash.h
new file mode 100644
index 00000000000..8752f9cafeb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_hash.h
@@ -0,0 +1,40 @@
+#ifndef crypto_hash_H
+#define crypto_hash_H
+
+/*
+ * WARNING: Unless you absolutely need to use SHA512 for interoperatibility,
+ * purposes, you might want to consider crypto_generichash() instead.
+ * Unlike SHA512, crypto_generichash() is not vulnerable to length
+ * extension attacks.
+ */
+
+#include <stddef.h>
+
+#include "crypto_hash_sha512.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_hash_BYTES crypto_hash_sha512_BYTES
+SODIUM_EXPORT
+size_t crypto_hash_bytes(void);
+
+SODIUM_EXPORT
+int crypto_hash(unsigned char *out, const unsigned char *in,
+                unsigned long long inlen) __attribute__ ((nonnull(1)));
+
+#define crypto_hash_PRIMITIVE "sha512"
+SODIUM_EXPORT
+const char *crypto_hash_primitive(void)
+            __attribute__ ((warn_unused_result));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_hash_sha256.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_hash_sha256.h
new file mode 100644
index 00000000000..b18217e18df
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_hash_sha256.h
@@ -0,0 +1,60 @@
+#ifndef crypto_hash_sha256_H
+#define crypto_hash_sha256_H
+
+/*
+ * WARNING: Unless you absolutely need to use SHA256 for interoperatibility,
+ * purposes, you might want to consider crypto_generichash() instead.
+ * Unlike SHA256, crypto_generichash() is not vulnerable to length
+ * extension attacks.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+typedef struct crypto_hash_sha256_state {
+    uint32_t state[8];
+    uint64_t count;
+    uint8_t  buf[64];
+} crypto_hash_sha256_state;
+
+SODIUM_EXPORT
+size_t crypto_hash_sha256_statebytes(void);
+
+#define crypto_hash_sha256_BYTES 32U
+SODIUM_EXPORT
+size_t crypto_hash_sha256_bytes(void);
+
+SODIUM_EXPORT
+int crypto_hash_sha256(unsigned char *out, const unsigned char *in,
+                       unsigned long long inlen) __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_hash_sha256_init(crypto_hash_sha256_state *state)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_hash_sha256_update(crypto_hash_sha256_state *state,
+                              const unsigned char *in,
+                              unsigned long long inlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_hash_sha256_final(crypto_hash_sha256_state *state,
+                             unsigned char *out)
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_hash_sha512.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_hash_sha512.h
new file mode 100644
index 00000000000..8efa7193ad9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_hash_sha512.h
@@ -0,0 +1,60 @@
+#ifndef crypto_hash_sha512_H
+#define crypto_hash_sha512_H
+
+/*
+ * WARNING: Unless you absolutely need to use SHA512 for interoperatibility,
+ * purposes, you might want to consider crypto_generichash() instead.
+ * Unlike SHA512, crypto_generichash() is not vulnerable to length
+ * extension attacks.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+typedef struct crypto_hash_sha512_state {
+    uint64_t state[8];
+    uint64_t count[2];
+    uint8_t  buf[128];
+} crypto_hash_sha512_state;
+
+SODIUM_EXPORT
+size_t crypto_hash_sha512_statebytes(void);
+
+#define crypto_hash_sha512_BYTES 64U
+SODIUM_EXPORT
+size_t crypto_hash_sha512_bytes(void);
+
+SODIUM_EXPORT
+int crypto_hash_sha512(unsigned char *out, const unsigned char *in,
+                       unsigned long long inlen) __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_hash_sha512_init(crypto_hash_sha512_state *state)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_hash_sha512_update(crypto_hash_sha512_state *state,
+                              const unsigned char *in,
+                              unsigned long long inlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_hash_sha512_final(crypto_hash_sha512_state *state,
+                             unsigned char *out)
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_kdf.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_kdf.h
new file mode 100644
index 00000000000..ac2fc6183c2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_kdf.h
@@ -0,0 +1,53 @@
+#ifndef crypto_kdf_H
+#define crypto_kdf_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "crypto_kdf_blake2b.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_kdf_BYTES_MIN crypto_kdf_blake2b_BYTES_MIN
+SODIUM_EXPORT
+size_t crypto_kdf_bytes_min(void);
+
+#define crypto_kdf_BYTES_MAX crypto_kdf_blake2b_BYTES_MAX
+SODIUM_EXPORT
+size_t crypto_kdf_bytes_max(void);
+
+#define crypto_kdf_CONTEXTBYTES crypto_kdf_blake2b_CONTEXTBYTES
+SODIUM_EXPORT
+size_t crypto_kdf_contextbytes(void);
+
+#define crypto_kdf_KEYBYTES crypto_kdf_blake2b_KEYBYTES
+SODIUM_EXPORT
+size_t crypto_kdf_keybytes(void);
+
+#define crypto_kdf_PRIMITIVE "blake2b"
+SODIUM_EXPORT
+const char *crypto_kdf_primitive(void)
+            __attribute__ ((warn_unused_result));
+
+SODIUM_EXPORT
+int crypto_kdf_derive_from_key(unsigned char *subkey, size_t subkey_len,
+                               uint64_t subkey_id,
+                               const char ctx[crypto_kdf_CONTEXTBYTES],
+                               const unsigned char key[crypto_kdf_KEYBYTES])
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_kdf_keygen(unsigned char k[crypto_kdf_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_kdf_blake2b.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_kdf_blake2b.h
new file mode 100644
index 00000000000..3ae47dd32c5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_kdf_blake2b.h
@@ -0,0 +1,44 @@
+#ifndef crypto_kdf_blake2b_H
+#define crypto_kdf_blake2b_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "crypto_kdf_blake2b.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_kdf_blake2b_BYTES_MIN 16
+SODIUM_EXPORT
+size_t crypto_kdf_blake2b_bytes_min(void);
+
+#define crypto_kdf_blake2b_BYTES_MAX 64
+SODIUM_EXPORT
+size_t crypto_kdf_blake2b_bytes_max(void);
+
+#define crypto_kdf_blake2b_CONTEXTBYTES 8
+SODIUM_EXPORT
+size_t crypto_kdf_blake2b_contextbytes(void);
+
+#define crypto_kdf_blake2b_KEYBYTES 32
+SODIUM_EXPORT
+size_t crypto_kdf_blake2b_keybytes(void);
+
+SODIUM_EXPORT
+int crypto_kdf_blake2b_derive_from_key(unsigned char *subkey, size_t subkey_len,
+                                       uint64_t subkey_id,
+                                       const char ctx[crypto_kdf_blake2b_CONTEXTBYTES],
+                                       const unsigned char key[crypto_kdf_blake2b_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_kx.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_kx.h
new file mode 100644
index 00000000000..347132c320e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_kx.h
@@ -0,0 +1,66 @@
+#ifndef crypto_kx_H
+#define crypto_kx_H
+
+#include <stddef.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_kx_PUBLICKEYBYTES 32
+SODIUM_EXPORT
+size_t crypto_kx_publickeybytes(void);
+
+#define crypto_kx_SECRETKEYBYTES 32
+SODIUM_EXPORT
+size_t crypto_kx_secretkeybytes(void);
+
+#define crypto_kx_SEEDBYTES 32
+SODIUM_EXPORT
+size_t crypto_kx_seedbytes(void);
+
+#define crypto_kx_SESSIONKEYBYTES 32
+SODIUM_EXPORT
+size_t crypto_kx_sessionkeybytes(void);
+
+#define crypto_kx_PRIMITIVE "x25519blake2b"
+SODIUM_EXPORT
+const char *crypto_kx_primitive(void);
+
+SODIUM_EXPORT
+int crypto_kx_seed_keypair(unsigned char pk[crypto_kx_PUBLICKEYBYTES],
+                           unsigned char sk[crypto_kx_SECRETKEYBYTES],
+                           const unsigned char seed[crypto_kx_SEEDBYTES])
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_kx_keypair(unsigned char pk[crypto_kx_PUBLICKEYBYTES],
+                      unsigned char sk[crypto_kx_SECRETKEYBYTES])
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_kx_client_session_keys(unsigned char rx[crypto_kx_SESSIONKEYBYTES],
+                                  unsigned char tx[crypto_kx_SESSIONKEYBYTES],
+                                  const unsigned char client_pk[crypto_kx_PUBLICKEYBYTES],
+                                  const unsigned char client_sk[crypto_kx_SECRETKEYBYTES],
+                                  const unsigned char server_pk[crypto_kx_PUBLICKEYBYTES])
+            __attribute__ ((warn_unused_result))  __attribute__ ((nonnull(3, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_kx_server_session_keys(unsigned char rx[crypto_kx_SESSIONKEYBYTES],
+                                  unsigned char tx[crypto_kx_SESSIONKEYBYTES],
+                                  const unsigned char server_pk[crypto_kx_PUBLICKEYBYTES],
+                                  const unsigned char server_sk[crypto_kx_SECRETKEYBYTES],
+                                  const unsigned char client_pk[crypto_kx_PUBLICKEYBYTES])
+            __attribute__ ((warn_unused_result))  __attribute__ ((nonnull(3, 4, 5)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_onetimeauth.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_onetimeauth.h
new file mode 100644
index 00000000000..7cd7b07060f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_onetimeauth.h
@@ -0,0 +1,65 @@
+#ifndef crypto_onetimeauth_H
+#define crypto_onetimeauth_H
+
+#include <stddef.h>
+
+#include "crypto_onetimeauth_poly1305.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+typedef crypto_onetimeauth_poly1305_state crypto_onetimeauth_state;
+
+SODIUM_EXPORT
+size_t  crypto_onetimeauth_statebytes(void);
+
+#define crypto_onetimeauth_BYTES crypto_onetimeauth_poly1305_BYTES
+SODIUM_EXPORT
+size_t  crypto_onetimeauth_bytes(void);
+
+#define crypto_onetimeauth_KEYBYTES crypto_onetimeauth_poly1305_KEYBYTES
+SODIUM_EXPORT
+size_t  crypto_onetimeauth_keybytes(void);
+
+#define crypto_onetimeauth_PRIMITIVE "poly1305"
+SODIUM_EXPORT
+const char *crypto_onetimeauth_primitive(void);
+
+SODIUM_EXPORT
+int crypto_onetimeauth(unsigned char *out, const unsigned char *in,
+                       unsigned long long inlen, const unsigned char *k)
+            __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_onetimeauth_verify(const unsigned char *h, const unsigned char *in,
+                              unsigned long long inlen, const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_onetimeauth_init(crypto_onetimeauth_state *state,
+                            const unsigned char *key) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_onetimeauth_update(crypto_onetimeauth_state *state,
+                              const unsigned char *in,
+                              unsigned long long inlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_onetimeauth_final(crypto_onetimeauth_state *state,
+                             unsigned char *out) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_onetimeauth_keygen(unsigned char k[crypto_onetimeauth_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_onetimeauth_poly1305.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_onetimeauth_poly1305.h
new file mode 100644
index 00000000000..f3e34d86df4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_onetimeauth_poly1305.h
@@ -0,0 +1,72 @@
+#ifndef crypto_onetimeauth_poly1305_H
+#define crypto_onetimeauth_poly1305_H
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+#include <sys/types.h>
+
+#include "export.h"
+
+typedef struct CRYPTO_ALIGN(16) crypto_onetimeauth_poly1305_state {
+    unsigned char opaque[256];
+} crypto_onetimeauth_poly1305_state;
+
+SODIUM_EXPORT
+size_t crypto_onetimeauth_poly1305_statebytes(void);
+
+#define crypto_onetimeauth_poly1305_BYTES 16U
+SODIUM_EXPORT
+size_t crypto_onetimeauth_poly1305_bytes(void);
+
+#define crypto_onetimeauth_poly1305_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_onetimeauth_poly1305_keybytes(void);
+
+SODIUM_EXPORT
+int crypto_onetimeauth_poly1305(unsigned char *out,
+                                const unsigned char *in,
+                                unsigned long long inlen,
+                                const unsigned char *k)
+            __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_onetimeauth_poly1305_verify(const unsigned char *h,
+                                       const unsigned char *in,
+                                       unsigned long long inlen,
+                                       const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_onetimeauth_poly1305_init(crypto_onetimeauth_poly1305_state *state,
+                                     const unsigned char *key)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_onetimeauth_poly1305_update(crypto_onetimeauth_poly1305_state *state,
+                                       const unsigned char *in,
+                                       unsigned long long inlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_onetimeauth_poly1305_final(crypto_onetimeauth_poly1305_state *state,
+                                      unsigned char *out)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_onetimeauth_poly1305_keygen(unsigned char k[crypto_onetimeauth_poly1305_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash.h
new file mode 100644
index 00000000000..585a993efd2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash.h
@@ -0,0 +1,147 @@
+#ifndef crypto_pwhash_H
+#define crypto_pwhash_H
+
+#include <stddef.h>
+
+#include "crypto_pwhash_argon2i.h"
+#include "crypto_pwhash_argon2id.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_pwhash_ALG_ARGON2I13 crypto_pwhash_argon2i_ALG_ARGON2I13
+SODIUM_EXPORT
+int crypto_pwhash_alg_argon2i13(void);
+
+#define crypto_pwhash_ALG_ARGON2ID13 crypto_pwhash_argon2id_ALG_ARGON2ID13
+SODIUM_EXPORT
+int crypto_pwhash_alg_argon2id13(void);
+
+#define crypto_pwhash_ALG_DEFAULT crypto_pwhash_ALG_ARGON2ID13
+SODIUM_EXPORT
+int crypto_pwhash_alg_default(void);
+
+#define crypto_pwhash_BYTES_MIN crypto_pwhash_argon2id_BYTES_MIN
+SODIUM_EXPORT
+size_t crypto_pwhash_bytes_min(void);
+
+#define crypto_pwhash_BYTES_MAX crypto_pwhash_argon2id_BYTES_MAX
+SODIUM_EXPORT
+size_t crypto_pwhash_bytes_max(void);
+
+#define crypto_pwhash_PASSWD_MIN crypto_pwhash_argon2id_PASSWD_MIN
+SODIUM_EXPORT
+size_t crypto_pwhash_passwd_min(void);
+
+#define crypto_pwhash_PASSWD_MAX crypto_pwhash_argon2id_PASSWD_MAX
+SODIUM_EXPORT
+size_t crypto_pwhash_passwd_max(void);
+
+#define crypto_pwhash_SALTBYTES crypto_pwhash_argon2id_SALTBYTES
+SODIUM_EXPORT
+size_t crypto_pwhash_saltbytes(void);
+
+#define crypto_pwhash_STRBYTES crypto_pwhash_argon2id_STRBYTES
+SODIUM_EXPORT
+size_t crypto_pwhash_strbytes(void);
+
+#define crypto_pwhash_STRPREFIX crypto_pwhash_argon2id_STRPREFIX
+SODIUM_EXPORT
+const char *crypto_pwhash_strprefix(void);
+
+#define crypto_pwhash_OPSLIMIT_MIN crypto_pwhash_argon2id_OPSLIMIT_MIN
+SODIUM_EXPORT
+size_t crypto_pwhash_opslimit_min(void);
+
+#define crypto_pwhash_OPSLIMIT_MAX crypto_pwhash_argon2id_OPSLIMIT_MAX
+SODIUM_EXPORT
+size_t crypto_pwhash_opslimit_max(void);
+
+#define crypto_pwhash_MEMLIMIT_MIN crypto_pwhash_argon2id_MEMLIMIT_MIN
+SODIUM_EXPORT
+size_t crypto_pwhash_memlimit_min(void);
+
+#define crypto_pwhash_MEMLIMIT_MAX crypto_pwhash_argon2id_MEMLIMIT_MAX
+SODIUM_EXPORT
+size_t crypto_pwhash_memlimit_max(void);
+
+#define crypto_pwhash_OPSLIMIT_INTERACTIVE crypto_pwhash_argon2id_OPSLIMIT_INTERACTIVE
+SODIUM_EXPORT
+size_t crypto_pwhash_opslimit_interactive(void);
+
+#define crypto_pwhash_MEMLIMIT_INTERACTIVE crypto_pwhash_argon2id_MEMLIMIT_INTERACTIVE
+SODIUM_EXPORT
+size_t crypto_pwhash_memlimit_interactive(void);
+
+#define crypto_pwhash_OPSLIMIT_MODERATE crypto_pwhash_argon2id_OPSLIMIT_MODERATE
+SODIUM_EXPORT
+size_t crypto_pwhash_opslimit_moderate(void);
+
+#define crypto_pwhash_MEMLIMIT_MODERATE crypto_pwhash_argon2id_MEMLIMIT_MODERATE
+SODIUM_EXPORT
+size_t crypto_pwhash_memlimit_moderate(void);
+
+#define crypto_pwhash_OPSLIMIT_SENSITIVE crypto_pwhash_argon2id_OPSLIMIT_SENSITIVE
+SODIUM_EXPORT
+size_t crypto_pwhash_opslimit_sensitive(void);
+
+#define crypto_pwhash_MEMLIMIT_SENSITIVE crypto_pwhash_argon2id_MEMLIMIT_SENSITIVE
+SODIUM_EXPORT
+size_t crypto_pwhash_memlimit_sensitive(void);
+
+/*
+ * With this function, do not forget to store all parameters, including the
+ * algorithm identifier in order to produce deterministic output.
+ * The crypto_pwhash_* definitions, including crypto_pwhash_ALG_DEFAULT,
+ * may change.
+ */
+SODIUM_EXPORT
+int crypto_pwhash(unsigned char * const out, unsigned long long outlen,
+                  const char * const passwd, unsigned long long passwdlen,
+                  const unsigned char * const salt,
+                  unsigned long long opslimit, size_t memlimit, int alg)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+/*
+ * The output string already includes all the required parameters, including
+ * the algorithm identifier. The string is all that has to be stored in
+ * order to verify a password.
+ */
+SODIUM_EXPORT
+int crypto_pwhash_str(char out[crypto_pwhash_STRBYTES],
+                      const char * const passwd, unsigned long long passwdlen,
+                      unsigned long long opslimit, size_t memlimit)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_str_alg(char out[crypto_pwhash_STRBYTES],
+                          const char * const passwd, unsigned long long passwdlen,
+                          unsigned long long opslimit, size_t memlimit, int alg)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_str_verify(const char str[crypto_pwhash_STRBYTES],
+                             const char * const passwd,
+                             unsigned long long passwdlen)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_str_needs_rehash(const char str[crypto_pwhash_STRBYTES],
+                                   unsigned long long opslimit, size_t memlimit)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+#define crypto_pwhash_PRIMITIVE "argon2i"
+SODIUM_EXPORT
+const char *crypto_pwhash_primitive(void)
+            __attribute__ ((warn_unused_result));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash_argon2i.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash_argon2i.h
new file mode 100644
index 00000000000..88ff6221d67
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash_argon2i.h
@@ -0,0 +1,122 @@
+#ifndef crypto_pwhash_argon2i_H
+#define crypto_pwhash_argon2i_H
+
+#include <limits.h>
+#include <stddef.h>
+#include <stdint.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_pwhash_argon2i_ALG_ARGON2I13 1
+SODIUM_EXPORT
+int crypto_pwhash_argon2i_alg_argon2i13(void);
+
+#define crypto_pwhash_argon2i_BYTES_MIN 16U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_bytes_min(void);
+
+#define crypto_pwhash_argon2i_BYTES_MAX SODIUM_MIN(SODIUM_SIZE_MAX, 4294967295U)
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_bytes_max(void);
+
+#define crypto_pwhash_argon2i_PASSWD_MIN 0U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_passwd_min(void);
+
+#define crypto_pwhash_argon2i_PASSWD_MAX 4294967295U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_passwd_max(void);
+
+#define crypto_pwhash_argon2i_SALTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_saltbytes(void);
+
+#define crypto_pwhash_argon2i_STRBYTES 128U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_strbytes(void);
+
+#define crypto_pwhash_argon2i_STRPREFIX "$argon2i$"
+SODIUM_EXPORT
+const char *crypto_pwhash_argon2i_strprefix(void);
+
+#define crypto_pwhash_argon2i_OPSLIMIT_MIN 3U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_opslimit_min(void);
+
+#define crypto_pwhash_argon2i_OPSLIMIT_MAX 4294967295U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_opslimit_max(void);
+
+#define crypto_pwhash_argon2i_MEMLIMIT_MIN 8192U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_memlimit_min(void);
+
+#define crypto_pwhash_argon2i_MEMLIMIT_MAX \
+    ((SIZE_MAX >= 4398046510080U) ? 4398046510080U : (SIZE_MAX >= 2147483648U) ? 2147483648U : 32768U)
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_memlimit_max(void);
+
+#define crypto_pwhash_argon2i_OPSLIMIT_INTERACTIVE 4U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_opslimit_interactive(void);
+
+#define crypto_pwhash_argon2i_MEMLIMIT_INTERACTIVE 33554432U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_memlimit_interactive(void);
+
+#define crypto_pwhash_argon2i_OPSLIMIT_MODERATE 6U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_opslimit_moderate(void);
+
+#define crypto_pwhash_argon2i_MEMLIMIT_MODERATE 134217728U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_memlimit_moderate(void);
+
+#define crypto_pwhash_argon2i_OPSLIMIT_SENSITIVE 8U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_opslimit_sensitive(void);
+
+#define crypto_pwhash_argon2i_MEMLIMIT_SENSITIVE 536870912U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2i_memlimit_sensitive(void);
+
+SODIUM_EXPORT
+int crypto_pwhash_argon2i(unsigned char * const out,
+                          unsigned long long outlen,
+                          const char * const passwd,
+                          unsigned long long passwdlen,
+                          const unsigned char * const salt,
+                          unsigned long long opslimit, size_t memlimit,
+                          int alg)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_argon2i_str(char out[crypto_pwhash_argon2i_STRBYTES],
+                              const char * const passwd,
+                              unsigned long long passwdlen,
+                              unsigned long long opslimit, size_t memlimit)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_argon2i_str_verify(const char str[crypto_pwhash_argon2i_STRBYTES],
+                                     const char * const passwd,
+                                     unsigned long long passwdlen)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_argon2i_str_needs_rehash(const char str[crypto_pwhash_argon2i_STRBYTES],
+                                           unsigned long long opslimit, size_t memlimit)
+            __attribute__ ((warn_unused_result))  __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash_argon2id.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash_argon2id.h
new file mode 100644
index 00000000000..7183abd186b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash_argon2id.h
@@ -0,0 +1,122 @@
+#ifndef crypto_pwhash_argon2id_H
+#define crypto_pwhash_argon2id_H
+
+#include <limits.h>
+#include <stddef.h>
+#include <stdint.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_pwhash_argon2id_ALG_ARGON2ID13 2
+SODIUM_EXPORT
+int crypto_pwhash_argon2id_alg_argon2id13(void);
+
+#define crypto_pwhash_argon2id_BYTES_MIN 16U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_bytes_min(void);
+
+#define crypto_pwhash_argon2id_BYTES_MAX SODIUM_MIN(SODIUM_SIZE_MAX, 4294967295U)
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_bytes_max(void);
+
+#define crypto_pwhash_argon2id_PASSWD_MIN 0U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_passwd_min(void);
+
+#define crypto_pwhash_argon2id_PASSWD_MAX 4294967295U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_passwd_max(void);
+
+#define crypto_pwhash_argon2id_SALTBYTES 16U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_saltbytes(void);
+
+#define crypto_pwhash_argon2id_STRBYTES 128U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_strbytes(void);
+
+#define crypto_pwhash_argon2id_STRPREFIX "$argon2id$"
+SODIUM_EXPORT
+const char *crypto_pwhash_argon2id_strprefix(void);
+
+#define crypto_pwhash_argon2id_OPSLIMIT_MIN 1U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_opslimit_min(void);
+
+#define crypto_pwhash_argon2id_OPSLIMIT_MAX 4294967295U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_opslimit_max(void);
+
+#define crypto_pwhash_argon2id_MEMLIMIT_MIN 8192U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_memlimit_min(void);
+
+#define crypto_pwhash_argon2id_MEMLIMIT_MAX \
+    ((SIZE_MAX >= 4398046510080U) ? 4398046510080U : (SIZE_MAX >= 2147483648U) ? 2147483648U : 32768U)
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_memlimit_max(void);
+
+#define crypto_pwhash_argon2id_OPSLIMIT_INTERACTIVE 2U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_opslimit_interactive(void);
+
+#define crypto_pwhash_argon2id_MEMLIMIT_INTERACTIVE 67108864U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_memlimit_interactive(void);
+
+#define crypto_pwhash_argon2id_OPSLIMIT_MODERATE 3U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_opslimit_moderate(void);
+
+#define crypto_pwhash_argon2id_MEMLIMIT_MODERATE 268435456U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_memlimit_moderate(void);
+
+#define crypto_pwhash_argon2id_OPSLIMIT_SENSITIVE 4U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_opslimit_sensitive(void);
+
+#define crypto_pwhash_argon2id_MEMLIMIT_SENSITIVE 1073741824U
+SODIUM_EXPORT
+size_t crypto_pwhash_argon2id_memlimit_sensitive(void);
+
+SODIUM_EXPORT
+int crypto_pwhash_argon2id(unsigned char * const out,
+                           unsigned long long outlen,
+                           const char * const passwd,
+                           unsigned long long passwdlen,
+                           const unsigned char * const salt,
+                           unsigned long long opslimit, size_t memlimit,
+                           int alg)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_argon2id_str(char out[crypto_pwhash_argon2id_STRBYTES],
+                               const char * const passwd,
+                               unsigned long long passwdlen,
+                               unsigned long long opslimit, size_t memlimit)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_argon2id_str_verify(const char str[crypto_pwhash_argon2id_STRBYTES],
+                                      const char * const passwd,
+                                      unsigned long long passwdlen)
+            __attribute__ ((warn_unused_result))  __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_argon2id_str_needs_rehash(const char str[crypto_pwhash_argon2id_STRBYTES],
+                                            unsigned long long opslimit, size_t memlimit)
+            __attribute__ ((warn_unused_result))  __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash_scryptsalsa208sha256.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash_scryptsalsa208sha256.h
new file mode 100644
index 00000000000..5c0bf7d390a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_pwhash_scryptsalsa208sha256.h
@@ -0,0 +1,120 @@
+#ifndef crypto_pwhash_scryptsalsa208sha256_H
+#define crypto_pwhash_scryptsalsa208sha256_H
+
+#include <limits.h>
+#include <stddef.h>
+#include <stdint.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_pwhash_scryptsalsa208sha256_BYTES_MIN 16U
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_bytes_min(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_BYTES_MAX \
+    SODIUM_MIN(SODIUM_SIZE_MAX, 0x1fffffffe0ULL)
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_bytes_max(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_PASSWD_MIN 0U
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_passwd_min(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_PASSWD_MAX SODIUM_SIZE_MAX
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_passwd_max(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_SALTBYTES 32U
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_saltbytes(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_STRBYTES 102U
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_strbytes(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_STRPREFIX "$7$"
+SODIUM_EXPORT
+const char *crypto_pwhash_scryptsalsa208sha256_strprefix(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_OPSLIMIT_MIN 32768U
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_opslimit_min(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_OPSLIMIT_MAX 4294967295U
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_opslimit_max(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_MEMLIMIT_MIN 16777216U
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_memlimit_min(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_MEMLIMIT_MAX \
+    SODIUM_MIN(SIZE_MAX, 68719476736ULL)
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_memlimit_max(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_OPSLIMIT_INTERACTIVE 524288U
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_opslimit_interactive(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_MEMLIMIT_INTERACTIVE 16777216U
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_memlimit_interactive(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_OPSLIMIT_SENSITIVE 33554432U
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_opslimit_sensitive(void);
+
+#define crypto_pwhash_scryptsalsa208sha256_MEMLIMIT_SENSITIVE 1073741824U
+SODIUM_EXPORT
+size_t crypto_pwhash_scryptsalsa208sha256_memlimit_sensitive(void);
+
+SODIUM_EXPORT
+int crypto_pwhash_scryptsalsa208sha256(unsigned char * const out,
+                                       unsigned long long outlen,
+                                       const char * const passwd,
+                                       unsigned long long passwdlen,
+                                       const unsigned char * const salt,
+                                       unsigned long long opslimit,
+                                       size_t memlimit)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_scryptsalsa208sha256_str(char out[crypto_pwhash_scryptsalsa208sha256_STRBYTES],
+                                           const char * const passwd,
+                                           unsigned long long passwdlen,
+                                           unsigned long long opslimit,
+                                           size_t memlimit)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_scryptsalsa208sha256_str_verify(const char str[crypto_pwhash_scryptsalsa208sha256_STRBYTES],
+                                                  const char * const passwd,
+                                                  unsigned long long passwdlen)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_scryptsalsa208sha256_ll(const uint8_t * passwd, size_t passwdlen,
+                                          const uint8_t * salt, size_t saltlen,
+                                          uint64_t N, uint32_t r, uint32_t p,
+                                          uint8_t * buf, size_t buflen)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_pwhash_scryptsalsa208sha256_str_needs_rehash(const char str[crypto_pwhash_scryptsalsa208sha256_STRBYTES],
+                                                        unsigned long long opslimit,
+                                                        size_t memlimit)
+            __attribute__ ((warn_unused_result))  __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult.h
new file mode 100644
index 00000000000..1c685853783
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult.h
@@ -0,0 +1,46 @@
+#ifndef crypto_scalarmult_H
+#define crypto_scalarmult_H
+
+#include <stddef.h>
+
+#include "crypto_scalarmult_curve25519.h"
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_scalarmult_BYTES crypto_scalarmult_curve25519_BYTES
+SODIUM_EXPORT
+size_t  crypto_scalarmult_bytes(void);
+
+#define crypto_scalarmult_SCALARBYTES crypto_scalarmult_curve25519_SCALARBYTES
+SODIUM_EXPORT
+size_t  crypto_scalarmult_scalarbytes(void);
+
+#define crypto_scalarmult_PRIMITIVE "curve25519"
+SODIUM_EXPORT
+const char *crypto_scalarmult_primitive(void);
+
+SODIUM_EXPORT
+int crypto_scalarmult_base(unsigned char *q, const unsigned char *n)
+            __attribute__ ((nonnull));
+
+/*
+ * NOTE: Do not use the result of this function directly for key exchange.
+ *
+ * Hash the result with the public keys in order to compute a shared
+ * secret key: H(q || client_pk || server_pk)
+ *
+ * Or unless this is not an option, use the crypto_kx() API instead.
+ */
+SODIUM_EXPORT
+int crypto_scalarmult(unsigned char *q, const unsigned char *n,
+                      const unsigned char *p)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult_curve25519.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult_curve25519.h
new file mode 100644
index 00000000000..60e9d0c5a40
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult_curve25519.h
@@ -0,0 +1,42 @@
+#ifndef crypto_scalarmult_curve25519_H
+#define crypto_scalarmult_curve25519_H
+
+#include <stddef.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_scalarmult_curve25519_BYTES 32U
+SODIUM_EXPORT
+size_t crypto_scalarmult_curve25519_bytes(void);
+
+#define crypto_scalarmult_curve25519_SCALARBYTES 32U
+SODIUM_EXPORT
+size_t crypto_scalarmult_curve25519_scalarbytes(void);
+
+/*
+ * NOTE: Do not use the result of this function directly for key exchange.
+ *
+ * Hash the result with the public keys in order to compute a shared
+ * secret key: H(q || client_pk || server_pk)
+ *
+ * Or unless this is not an option, use the crypto_kx() API instead.
+ */
+SODIUM_EXPORT
+int crypto_scalarmult_curve25519(unsigned char *q, const unsigned char *n,
+                                 const unsigned char *p)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_scalarmult_curve25519_base(unsigned char *q,
+                                      const unsigned char *n)
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult_ed25519.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult_ed25519.h
new file mode 100644
index 00000000000..2dfa4d7073f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult_ed25519.h
@@ -0,0 +1,51 @@
+
+#ifndef crypto_scalarmult_ed25519_H
+#define crypto_scalarmult_ed25519_H
+
+#include <stddef.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_scalarmult_ed25519_BYTES 32U
+SODIUM_EXPORT
+size_t crypto_scalarmult_ed25519_bytes(void);
+
+#define crypto_scalarmult_ed25519_SCALARBYTES 32U
+SODIUM_EXPORT
+size_t crypto_scalarmult_ed25519_scalarbytes(void);
+
+/*
+ * NOTE: Do not use the result of this function directly for key exchange.
+ *
+ * Hash the result with the public keys in order to compute a shared
+ * secret key: H(q || client_pk || server_pk)
+ *
+ * Or unless this is not an option, use the crypto_kx() API instead.
+ */
+SODIUM_EXPORT
+int crypto_scalarmult_ed25519(unsigned char *q, const unsigned char *n,
+                              const unsigned char *p)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_scalarmult_ed25519_noclamp(unsigned char *q, const unsigned char *n,
+                                      const unsigned char *p)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_scalarmult_ed25519_base(unsigned char *q, const unsigned char *n)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_scalarmult_ed25519_base_noclamp(unsigned char *q, const unsigned char *n)
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult_ristretto255.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult_ristretto255.h
new file mode 100644
index 00000000000..40a45ccef02
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_scalarmult_ristretto255.h
@@ -0,0 +1,43 @@
+
+#ifndef crypto_scalarmult_ristretto255_H
+#define crypto_scalarmult_ristretto255_H
+
+#include <stddef.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_scalarmult_ristretto255_BYTES 32U
+SODIUM_EXPORT
+size_t crypto_scalarmult_ristretto255_bytes(void);
+
+#define crypto_scalarmult_ristretto255_SCALARBYTES 32U
+SODIUM_EXPORT
+size_t crypto_scalarmult_ristretto255_scalarbytes(void);
+
+/*
+ * NOTE: Do not use the result of this function directly for key exchange.
+ *
+ * Hash the result with the public keys in order to compute a shared
+ * secret key: H(q || client_pk || server_pk)
+ *
+ * Or unless this is not an option, use the crypto_kx() API instead.
+ */
+SODIUM_EXPORT
+int crypto_scalarmult_ristretto255(unsigned char *q, const unsigned char *n,
+                                   const unsigned char *p)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_scalarmult_ristretto255_base(unsigned char *q,
+                                        const unsigned char *n)
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretbox.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretbox.h
new file mode 100644
index 00000000000..1d3709db128
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretbox.h
@@ -0,0 +1,93 @@
+#ifndef crypto_secretbox_H
+#define crypto_secretbox_H
+
+#include <stddef.h>
+
+#include "crypto_secretbox_xsalsa20poly1305.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_secretbox_KEYBYTES crypto_secretbox_xsalsa20poly1305_KEYBYTES
+SODIUM_EXPORT
+size_t  crypto_secretbox_keybytes(void);
+
+#define crypto_secretbox_NONCEBYTES crypto_secretbox_xsalsa20poly1305_NONCEBYTES
+SODIUM_EXPORT
+size_t  crypto_secretbox_noncebytes(void);
+
+#define crypto_secretbox_MACBYTES crypto_secretbox_xsalsa20poly1305_MACBYTES
+SODIUM_EXPORT
+size_t  crypto_secretbox_macbytes(void);
+
+#define crypto_secretbox_PRIMITIVE "xsalsa20poly1305"
+SODIUM_EXPORT
+const char *crypto_secretbox_primitive(void);
+
+#define crypto_secretbox_MESSAGEBYTES_MAX crypto_secretbox_xsalsa20poly1305_MESSAGEBYTES_MAX
+SODIUM_EXPORT
+size_t crypto_secretbox_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_secretbox_easy(unsigned char *c, const unsigned char *m,
+                          unsigned long long mlen, const unsigned char *n,
+                          const unsigned char *k) __attribute__ ((nonnull(1, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_secretbox_open_easy(unsigned char *m, const unsigned char *c,
+                               unsigned long long clen, const unsigned char *n,
+                               const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_secretbox_detached(unsigned char *c, unsigned char *mac,
+                              const unsigned char *m,
+                              unsigned long long mlen,
+                              const unsigned char *n,
+                              const unsigned char *k)
+            __attribute__ ((nonnull(1, 2, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_secretbox_open_detached(unsigned char *m,
+                                   const unsigned char *c,
+                                   const unsigned char *mac,
+                                   unsigned long long clen,
+                                   const unsigned char *n,
+                                   const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 3, 5, 6)));
+
+SODIUM_EXPORT
+void crypto_secretbox_keygen(unsigned char k[crypto_secretbox_KEYBYTES])
+            __attribute__ ((nonnull));
+
+/* -- NaCl compatibility interface ; Requires padding -- */
+
+#define crypto_secretbox_ZEROBYTES crypto_secretbox_xsalsa20poly1305_ZEROBYTES
+SODIUM_EXPORT
+size_t  crypto_secretbox_zerobytes(void);
+
+#define crypto_secretbox_BOXZEROBYTES crypto_secretbox_xsalsa20poly1305_BOXZEROBYTES
+SODIUM_EXPORT
+size_t  crypto_secretbox_boxzerobytes(void);
+
+SODIUM_EXPORT
+int crypto_secretbox(unsigned char *c, const unsigned char *m,
+                     unsigned long long mlen, const unsigned char *n,
+                     const unsigned char *k) __attribute__ ((nonnull(1, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_secretbox_open(unsigned char *m, const unsigned char *c,
+                          unsigned long long clen, const unsigned char *n,
+                          const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretbox_xchacha20poly1305.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretbox_xchacha20poly1305.h
new file mode 100644
index 00000000000..6ec674e3105
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretbox_xchacha20poly1305.h
@@ -0,0 +1,70 @@
+#ifndef crypto_secretbox_xchacha20poly1305_H
+#define crypto_secretbox_xchacha20poly1305_H
+
+#include <stddef.h>
+#include "crypto_stream_xchacha20.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_secretbox_xchacha20poly1305_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_secretbox_xchacha20poly1305_keybytes(void);
+
+#define crypto_secretbox_xchacha20poly1305_NONCEBYTES 24U
+SODIUM_EXPORT
+size_t crypto_secretbox_xchacha20poly1305_noncebytes(void);
+
+#define crypto_secretbox_xchacha20poly1305_MACBYTES 16U
+SODIUM_EXPORT
+size_t crypto_secretbox_xchacha20poly1305_macbytes(void);
+
+#define crypto_secretbox_xchacha20poly1305_MESSAGEBYTES_MAX \
+    (crypto_stream_xchacha20_MESSAGEBYTES_MAX - crypto_secretbox_xchacha20poly1305_MACBYTES)
+SODIUM_EXPORT
+size_t crypto_secretbox_xchacha20poly1305_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_secretbox_xchacha20poly1305_easy(unsigned char *c,
+                                            const unsigned char *m,
+                                            unsigned long long mlen,
+                                            const unsigned char *n,
+                                            const unsigned char *k)
+            __attribute__ ((nonnull(1, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_secretbox_xchacha20poly1305_open_easy(unsigned char *m,
+                                                 const unsigned char *c,
+                                                 unsigned long long clen,
+                                                 const unsigned char *n,
+                                                 const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_secretbox_xchacha20poly1305_detached(unsigned char *c,
+                                                unsigned char *mac,
+                                                const unsigned char *m,
+                                                unsigned long long mlen,
+                                                const unsigned char *n,
+                                                const unsigned char *k)
+            __attribute__ ((nonnull(1, 2, 5, 6)));
+
+SODIUM_EXPORT
+int crypto_secretbox_xchacha20poly1305_open_detached(unsigned char *m,
+                                                     const unsigned char *c,
+                                                     const unsigned char *mac,
+                                                     unsigned long long clen,
+                                                     const unsigned char *n,
+                                                     const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 3, 5, 6)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretbox_xsalsa20poly1305.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretbox_xsalsa20poly1305.h
new file mode 100644
index 00000000000..be0874cbafa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretbox_xsalsa20poly1305.h
@@ -0,0 +1,69 @@
+#ifndef crypto_secretbox_xsalsa20poly1305_H
+#define crypto_secretbox_xsalsa20poly1305_H
+
+#include <stddef.h>
+#include "crypto_stream_xsalsa20.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_secretbox_xsalsa20poly1305_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_secretbox_xsalsa20poly1305_keybytes(void);
+
+#define crypto_secretbox_xsalsa20poly1305_NONCEBYTES 24U
+SODIUM_EXPORT
+size_t crypto_secretbox_xsalsa20poly1305_noncebytes(void);
+
+#define crypto_secretbox_xsalsa20poly1305_MACBYTES 16U
+SODIUM_EXPORT
+size_t crypto_secretbox_xsalsa20poly1305_macbytes(void);
+
+/* Only for the libsodium API - The NaCl compatibility API would require BOXZEROBYTES extra bytes */
+#define crypto_secretbox_xsalsa20poly1305_MESSAGEBYTES_MAX \
+    (crypto_stream_xsalsa20_MESSAGEBYTES_MAX - crypto_secretbox_xsalsa20poly1305_MACBYTES)
+SODIUM_EXPORT
+size_t crypto_secretbox_xsalsa20poly1305_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_secretbox_xsalsa20poly1305(unsigned char *c,
+                                      const unsigned char *m,
+                                      unsigned long long mlen,
+                                      const unsigned char *n,
+                                      const unsigned char *k)
+            __attribute__ ((nonnull(1, 4, 5)));
+
+SODIUM_EXPORT
+int crypto_secretbox_xsalsa20poly1305_open(unsigned char *m,
+                                           const unsigned char *c,
+                                           unsigned long long clen,
+                                           const unsigned char *n,
+                                           const unsigned char *k)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(2, 4, 5)));
+
+SODIUM_EXPORT
+void crypto_secretbox_xsalsa20poly1305_keygen(unsigned char k[crypto_secretbox_xsalsa20poly1305_KEYBYTES])
+            __attribute__ ((nonnull));
+
+/* -- NaCl compatibility interface ; Requires padding -- */
+
+#define crypto_secretbox_xsalsa20poly1305_BOXZEROBYTES 16U
+SODIUM_EXPORT
+size_t crypto_secretbox_xsalsa20poly1305_boxzerobytes(void);
+
+#define crypto_secretbox_xsalsa20poly1305_ZEROBYTES \
+    (crypto_secretbox_xsalsa20poly1305_BOXZEROBYTES + \
+     crypto_secretbox_xsalsa20poly1305_MACBYTES)
+SODIUM_EXPORT
+size_t crypto_secretbox_xsalsa20poly1305_zerobytes(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretstream_xchacha20poly1305.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretstream_xchacha20poly1305.h
new file mode 100644
index 00000000000..b22e4e9313e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_secretstream_xchacha20poly1305.h
@@ -0,0 +1,108 @@
+#ifndef crypto_secretstream_xchacha20poly1305_H
+#define crypto_secretstream_xchacha20poly1305_H
+
+#include <stddef.h>
+
+#include "crypto_aead_xchacha20poly1305.h"
+#include "crypto_stream_chacha20.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_secretstream_xchacha20poly1305_ABYTES \
+    (1U + crypto_aead_xchacha20poly1305_ietf_ABYTES)
+SODIUM_EXPORT
+size_t crypto_secretstream_xchacha20poly1305_abytes(void);
+
+#define crypto_secretstream_xchacha20poly1305_HEADERBYTES \
+    crypto_aead_xchacha20poly1305_ietf_NPUBBYTES
+SODIUM_EXPORT
+size_t crypto_secretstream_xchacha20poly1305_headerbytes(void);
+
+#define crypto_secretstream_xchacha20poly1305_KEYBYTES \
+    crypto_aead_xchacha20poly1305_ietf_KEYBYTES
+SODIUM_EXPORT
+size_t crypto_secretstream_xchacha20poly1305_keybytes(void);
+
+#define crypto_secretstream_xchacha20poly1305_MESSAGEBYTES_MAX \
+    SODIUM_MIN(SODIUM_SIZE_MAX - crypto_secretstream_xchacha20poly1305_ABYTES, \
+              (64ULL * ((1ULL << 32) - 2ULL)))
+SODIUM_EXPORT
+size_t crypto_secretstream_xchacha20poly1305_messagebytes_max(void);
+
+#define crypto_secretstream_xchacha20poly1305_TAG_MESSAGE 0x00
+SODIUM_EXPORT
+unsigned char crypto_secretstream_xchacha20poly1305_tag_message(void);
+
+#define crypto_secretstream_xchacha20poly1305_TAG_PUSH    0x01
+SODIUM_EXPORT
+unsigned char crypto_secretstream_xchacha20poly1305_tag_push(void);
+
+#define crypto_secretstream_xchacha20poly1305_TAG_REKEY   0x02
+SODIUM_EXPORT
+unsigned char crypto_secretstream_xchacha20poly1305_tag_rekey(void);
+
+#define crypto_secretstream_xchacha20poly1305_TAG_FINAL \
+    (crypto_secretstream_xchacha20poly1305_TAG_PUSH | \
+     crypto_secretstream_xchacha20poly1305_TAG_REKEY)
+SODIUM_EXPORT
+unsigned char crypto_secretstream_xchacha20poly1305_tag_final(void);
+
+typedef struct crypto_secretstream_xchacha20poly1305_state {
+    unsigned char k[crypto_stream_chacha20_ietf_KEYBYTES];
+    unsigned char nonce[crypto_stream_chacha20_ietf_NONCEBYTES];
+    unsigned char _pad[8];
+} crypto_secretstream_xchacha20poly1305_state;
+
+SODIUM_EXPORT
+size_t crypto_secretstream_xchacha20poly1305_statebytes(void);
+
+SODIUM_EXPORT
+void crypto_secretstream_xchacha20poly1305_keygen
+   (unsigned char k[crypto_secretstream_xchacha20poly1305_KEYBYTES])
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_secretstream_xchacha20poly1305_init_push
+   (crypto_secretstream_xchacha20poly1305_state *state,
+    unsigned char header[crypto_secretstream_xchacha20poly1305_HEADERBYTES],
+    const unsigned char k[crypto_secretstream_xchacha20poly1305_KEYBYTES])
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_secretstream_xchacha20poly1305_push
+   (crypto_secretstream_xchacha20poly1305_state *state,
+    unsigned char *c, unsigned long long *clen_p,
+    const unsigned char *m, unsigned long long mlen,
+    const unsigned char *ad, unsigned long long adlen, unsigned char tag)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_secretstream_xchacha20poly1305_init_pull
+   (crypto_secretstream_xchacha20poly1305_state *state,
+    const unsigned char header[crypto_secretstream_xchacha20poly1305_HEADERBYTES],
+    const unsigned char k[crypto_secretstream_xchacha20poly1305_KEYBYTES])
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_secretstream_xchacha20poly1305_pull
+   (crypto_secretstream_xchacha20poly1305_state *state,
+    unsigned char *m, unsigned long long *mlen_p, unsigned char *tag_p,
+    const unsigned char *c, unsigned long long clen,
+    const unsigned char *ad, unsigned long long adlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+void crypto_secretstream_xchacha20poly1305_rekey
+    (crypto_secretstream_xchacha20poly1305_state *state);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_shorthash.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_shorthash.h
new file mode 100644
index 00000000000..fecaa88bd80
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_shorthash.h
@@ -0,0 +1,41 @@
+#ifndef crypto_shorthash_H
+#define crypto_shorthash_H
+
+#include <stddef.h>
+
+#include "crypto_shorthash_siphash24.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_shorthash_BYTES crypto_shorthash_siphash24_BYTES
+SODIUM_EXPORT
+size_t  crypto_shorthash_bytes(void);
+
+#define crypto_shorthash_KEYBYTES crypto_shorthash_siphash24_KEYBYTES
+SODIUM_EXPORT
+size_t  crypto_shorthash_keybytes(void);
+
+#define crypto_shorthash_PRIMITIVE "siphash24"
+SODIUM_EXPORT
+const char *crypto_shorthash_primitive(void);
+
+SODIUM_EXPORT
+int crypto_shorthash(unsigned char *out, const unsigned char *in,
+                     unsigned long long inlen, const unsigned char *k)
+            __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+void crypto_shorthash_keygen(unsigned char k[crypto_shorthash_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_shorthash_siphash24.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_shorthash_siphash24.h
new file mode 100644
index 00000000000..1e6f72a620e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_shorthash_siphash24.h
@@ -0,0 +1,50 @@
+#ifndef crypto_shorthash_siphash24_H
+#define crypto_shorthash_siphash24_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+/* -- 64-bit output -- */
+
+#define crypto_shorthash_siphash24_BYTES 8U
+SODIUM_EXPORT
+size_t crypto_shorthash_siphash24_bytes(void);
+
+#define crypto_shorthash_siphash24_KEYBYTES 16U
+SODIUM_EXPORT
+size_t crypto_shorthash_siphash24_keybytes(void);
+
+SODIUM_EXPORT
+int crypto_shorthash_siphash24(unsigned char *out, const unsigned char *in,
+                               unsigned long long inlen, const unsigned char *k)
+            __attribute__ ((nonnull(1, 4)));
+
+#ifndef SODIUM_LIBRARY_MINIMAL
+/* -- 128-bit output -- */
+
+#define crypto_shorthash_siphashx24_BYTES 16U
+SODIUM_EXPORT
+size_t crypto_shorthash_siphashx24_bytes(void);
+
+#define crypto_shorthash_siphashx24_KEYBYTES 16U
+SODIUM_EXPORT
+size_t crypto_shorthash_siphashx24_keybytes(void);
+
+SODIUM_EXPORT
+int crypto_shorthash_siphashx24(unsigned char *out, const unsigned char *in,
+                                unsigned long long inlen, const unsigned char *k)
+            __attribute__ ((nonnull(1, 4)));
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_sign.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_sign.h
new file mode 100644
index 00000000000..f5fafb123e0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_sign.h
@@ -0,0 +1,107 @@
+#ifndef crypto_sign_H
+#define crypto_sign_H
+
+/*
+ * THREAD SAFETY: crypto_sign_keypair() is thread-safe,
+ * provided that sodium_init() was called before.
+ *
+ * Other functions, including crypto_sign_seed_keypair() are always thread-safe.
+ */
+
+#include <stddef.h>
+
+#include "crypto_sign_ed25519.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+typedef crypto_sign_ed25519ph_state crypto_sign_state;
+
+SODIUM_EXPORT
+size_t  crypto_sign_statebytes(void);
+
+#define crypto_sign_BYTES crypto_sign_ed25519_BYTES
+SODIUM_EXPORT
+size_t  crypto_sign_bytes(void);
+
+#define crypto_sign_SEEDBYTES crypto_sign_ed25519_SEEDBYTES
+SODIUM_EXPORT
+size_t  crypto_sign_seedbytes(void);
+
+#define crypto_sign_PUBLICKEYBYTES crypto_sign_ed25519_PUBLICKEYBYTES
+SODIUM_EXPORT
+size_t  crypto_sign_publickeybytes(void);
+
+#define crypto_sign_SECRETKEYBYTES crypto_sign_ed25519_SECRETKEYBYTES
+SODIUM_EXPORT
+size_t  crypto_sign_secretkeybytes(void);
+
+#define crypto_sign_MESSAGEBYTES_MAX crypto_sign_ed25519_MESSAGEBYTES_MAX
+SODIUM_EXPORT
+size_t  crypto_sign_messagebytes_max(void);
+
+#define crypto_sign_PRIMITIVE "ed25519"
+SODIUM_EXPORT
+const char *crypto_sign_primitive(void);
+
+SODIUM_EXPORT
+int crypto_sign_seed_keypair(unsigned char *pk, unsigned char *sk,
+                             const unsigned char *seed)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_sign_keypair(unsigned char *pk, unsigned char *sk)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_sign(unsigned char *sm, unsigned long long *smlen_p,
+                const unsigned char *m, unsigned long long mlen,
+                const unsigned char *sk) __attribute__ ((nonnull(1, 5)));
+
+SODIUM_EXPORT
+int crypto_sign_open(unsigned char *m, unsigned long long *mlen_p,
+                     const unsigned char *sm, unsigned long long smlen,
+                     const unsigned char *pk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(3, 5)));
+
+SODIUM_EXPORT
+int crypto_sign_detached(unsigned char *sig, unsigned long long *siglen_p,
+                         const unsigned char *m, unsigned long long mlen,
+                         const unsigned char *sk) __attribute__ ((nonnull(1, 5)));
+
+SODIUM_EXPORT
+int crypto_sign_verify_detached(const unsigned char *sig,
+                                const unsigned char *m,
+                                unsigned long long mlen,
+                                const unsigned char *pk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_sign_init(crypto_sign_state *state);
+
+SODIUM_EXPORT
+int crypto_sign_update(crypto_sign_state *state,
+                       const unsigned char *m, unsigned long long mlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_sign_final_create(crypto_sign_state *state, unsigned char *sig,
+                             unsigned long long *siglen_p,
+                             const unsigned char *sk)
+            __attribute__ ((nonnull(1, 2, 4)));
+
+SODIUM_EXPORT
+int crypto_sign_final_verify(crypto_sign_state *state, const unsigned char *sig,
+                             const unsigned char *pk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_sign_ed25519.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_sign_ed25519.h
new file mode 100644
index 00000000000..0fdac42d353
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_sign_ed25519.h
@@ -0,0 +1,124 @@
+#ifndef crypto_sign_ed25519_H
+#define crypto_sign_ed25519_H
+
+#include <stddef.h>
+#include "crypto_hash_sha512.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+typedef struct crypto_sign_ed25519ph_state {
+    crypto_hash_sha512_state hs;
+} crypto_sign_ed25519ph_state;
+
+SODIUM_EXPORT
+size_t crypto_sign_ed25519ph_statebytes(void);
+
+#define crypto_sign_ed25519_BYTES 64U
+SODIUM_EXPORT
+size_t crypto_sign_ed25519_bytes(void);
+
+#define crypto_sign_ed25519_SEEDBYTES 32U
+SODIUM_EXPORT
+size_t crypto_sign_ed25519_seedbytes(void);
+
+#define crypto_sign_ed25519_PUBLICKEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_sign_ed25519_publickeybytes(void);
+
+#define crypto_sign_ed25519_SECRETKEYBYTES (32U + 32U)
+SODIUM_EXPORT
+size_t crypto_sign_ed25519_secretkeybytes(void);
+
+#define crypto_sign_ed25519_MESSAGEBYTES_MAX (SODIUM_SIZE_MAX - crypto_sign_ed25519_BYTES)
+SODIUM_EXPORT
+size_t crypto_sign_ed25519_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_sign_ed25519(unsigned char *sm, unsigned long long *smlen_p,
+                        const unsigned char *m, unsigned long long mlen,
+                        const unsigned char *sk)
+            __attribute__ ((nonnull(1, 5)));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519_open(unsigned char *m, unsigned long long *mlen_p,
+                             const unsigned char *sm, unsigned long long smlen,
+                             const unsigned char *pk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(3, 5)));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519_detached(unsigned char *sig,
+                                 unsigned long long *siglen_p,
+                                 const unsigned char *m,
+                                 unsigned long long mlen,
+                                 const unsigned char *sk)
+            __attribute__ ((nonnull(1, 5)));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519_verify_detached(const unsigned char *sig,
+                                        const unsigned char *m,
+                                        unsigned long long mlen,
+                                        const unsigned char *pk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull(1, 4)));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519_keypair(unsigned char *pk, unsigned char *sk)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519_seed_keypair(unsigned char *pk, unsigned char *sk,
+                                     const unsigned char *seed)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519_pk_to_curve25519(unsigned char *curve25519_pk,
+                                         const unsigned char *ed25519_pk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519_sk_to_curve25519(unsigned char *curve25519_sk,
+                                         const unsigned char *ed25519_sk)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519_sk_to_seed(unsigned char *seed,
+                                   const unsigned char *sk)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519_sk_to_pk(unsigned char *pk, const unsigned char *sk)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519ph_init(crypto_sign_ed25519ph_state *state)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519ph_update(crypto_sign_ed25519ph_state *state,
+                                 const unsigned char *m,
+                                 unsigned long long mlen)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519ph_final_create(crypto_sign_ed25519ph_state *state,
+                                       unsigned char *sig,
+                                       unsigned long long *siglen_p,
+                                       const unsigned char *sk)
+            __attribute__ ((nonnull(1, 2, 4)));
+
+SODIUM_EXPORT
+int crypto_sign_ed25519ph_final_verify(crypto_sign_ed25519ph_state *state,
+                                       const unsigned char *sig,
+                                       const unsigned char *pk)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_sign_edwards25519sha512batch.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_sign_edwards25519sha512batch.h
new file mode 100644
index 00000000000..eed158aa845
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_sign_edwards25519sha512batch.h
@@ -0,0 +1,55 @@
+#ifndef crypto_sign_edwards25519sha512batch_H
+#define crypto_sign_edwards25519sha512batch_H
+
+/*
+ * WARNING: This construction was a prototype, which should not be used
+ * any more in new projects.
+ *
+ * crypto_sign_edwards25519sha512batch is provided for applications
+ * initially built with NaCl, but as recommended by the author of this
+ * construction, new applications should use ed25519 instead.
+ *
+ * In Sodium, you should use the high-level crypto_sign_*() functions instead.
+ */
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_sign_edwards25519sha512batch_BYTES 64U
+#define crypto_sign_edwards25519sha512batch_PUBLICKEYBYTES 32U
+#define crypto_sign_edwards25519sha512batch_SECRETKEYBYTES (32U + 32U)
+#define crypto_sign_edwards25519sha512batch_MESSAGEBYTES_MAX (SODIUM_SIZE_MAX - crypto_sign_edwards25519sha512batch_BYTES)
+
+SODIUM_EXPORT
+int crypto_sign_edwards25519sha512batch(unsigned char *sm,
+                                        unsigned long long *smlen_p,
+                                        const unsigned char *m,
+                                        unsigned long long mlen,
+                                        const unsigned char *sk)
+            __attribute__ ((deprecated)) __attribute__ ((nonnull(1, 5)));
+
+SODIUM_EXPORT
+int crypto_sign_edwards25519sha512batch_open(unsigned char *m,
+                                             unsigned long long *mlen_p,
+                                             const unsigned char *sm,
+                                             unsigned long long smlen,
+                                             const unsigned char *pk)
+            __attribute__ ((deprecated)) __attribute__ ((nonnull(3, 5)));
+
+SODIUM_EXPORT
+int crypto_sign_edwards25519sha512batch_keypair(unsigned char *pk,
+                                                unsigned char *sk)
+            __attribute__ ((deprecated)) __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream.h
new file mode 100644
index 00000000000..88dab5f6111
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream.h
@@ -0,0 +1,59 @@
+#ifndef crypto_stream_H
+#define crypto_stream_H
+
+/*
+ *  WARNING: This is just a stream cipher. It is NOT authenticated encryption.
+ *  While it provides some protection against eavesdropping, it does NOT
+ *  provide any security against active attacks.
+ *  Unless you know what you're doing, what you are looking for is probably
+ *  the crypto_box functions.
+ */
+
+#include <stddef.h>
+
+#include "crypto_stream_xsalsa20.h"
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_stream_KEYBYTES crypto_stream_xsalsa20_KEYBYTES
+SODIUM_EXPORT
+size_t  crypto_stream_keybytes(void);
+
+#define crypto_stream_NONCEBYTES crypto_stream_xsalsa20_NONCEBYTES
+SODIUM_EXPORT
+size_t  crypto_stream_noncebytes(void);
+
+#define crypto_stream_MESSAGEBYTES_MAX crypto_stream_xsalsa20_MESSAGEBYTES_MAX
+SODIUM_EXPORT
+size_t  crypto_stream_messagebytes_max(void);
+
+#define crypto_stream_PRIMITIVE "xsalsa20"
+SODIUM_EXPORT
+const char *crypto_stream_primitive(void);
+
+SODIUM_EXPORT
+int crypto_stream(unsigned char *c, unsigned long long clen,
+                  const unsigned char *n, const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_xor(unsigned char *c, const unsigned char *m,
+                      unsigned long long mlen, const unsigned char *n,
+                      const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_stream_keygen(unsigned char k[crypto_stream_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_chacha20.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_chacha20.h
new file mode 100644
index 00000000000..408897558b8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_chacha20.h
@@ -0,0 +1,106 @@
+#ifndef crypto_stream_chacha20_H
+#define crypto_stream_chacha20_H
+
+/*
+ *  WARNING: This is just a stream cipher. It is NOT authenticated encryption.
+ *  While it provides some protection against eavesdropping, it does NOT
+ *  provide any security against active attacks.
+ *  Unless you know what you're doing, what you are looking for is probably
+ *  the crypto_box functions.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_stream_chacha20_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_stream_chacha20_keybytes(void);
+
+#define crypto_stream_chacha20_NONCEBYTES 8U
+SODIUM_EXPORT
+size_t crypto_stream_chacha20_noncebytes(void);
+
+#define crypto_stream_chacha20_MESSAGEBYTES_MAX SODIUM_SIZE_MAX
+SODIUM_EXPORT
+size_t crypto_stream_chacha20_messagebytes_max(void);
+
+/* ChaCha20 with a 64-bit nonce and a 64-bit counter, as originally designed */
+
+SODIUM_EXPORT
+int crypto_stream_chacha20(unsigned char *c, unsigned long long clen,
+                           const unsigned char *n, const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_chacha20_xor(unsigned char *c, const unsigned char *m,
+                               unsigned long long mlen, const unsigned char *n,
+                               const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_chacha20_xor_ic(unsigned char *c, const unsigned char *m,
+                                  unsigned long long mlen,
+                                  const unsigned char *n, uint64_t ic,
+                                  const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_stream_chacha20_keygen(unsigned char k[crypto_stream_chacha20_KEYBYTES])
+            __attribute__ ((nonnull));
+
+/* ChaCha20 with a 96-bit nonce and a 32-bit counter (IETF) */
+
+#define crypto_stream_chacha20_ietf_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_stream_chacha20_ietf_keybytes(void);
+
+#define crypto_stream_chacha20_ietf_NONCEBYTES 12U
+SODIUM_EXPORT
+size_t crypto_stream_chacha20_ietf_noncebytes(void);
+
+#define crypto_stream_chacha20_ietf_MESSAGEBYTES_MAX \
+    SODIUM_MIN(SODIUM_SIZE_MAX, 64ULL * (1ULL << 32))
+SODIUM_EXPORT
+size_t crypto_stream_chacha20_ietf_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_stream_chacha20_ietf(unsigned char *c, unsigned long long clen,
+                                const unsigned char *n, const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_chacha20_ietf_xor(unsigned char *c, const unsigned char *m,
+                                    unsigned long long mlen, const unsigned char *n,
+                                    const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_chacha20_ietf_xor_ic(unsigned char *c, const unsigned char *m,
+                                       unsigned long long mlen,
+                                       const unsigned char *n, uint32_t ic,
+                                       const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_stream_chacha20_ietf_keygen(unsigned char k[crypto_stream_chacha20_ietf_KEYBYTES])
+            __attribute__ ((nonnull));
+
+/* Aliases */
+
+#define crypto_stream_chacha20_IETF_KEYBYTES crypto_stream_chacha20_ietf_KEYBYTES
+#define crypto_stream_chacha20_IETF_NONCEBYTES crypto_stream_chacha20_ietf_NONCEBYTES
+#define crypto_stream_chacha20_IETF_MESSAGEBYTES_MAX crypto_stream_chacha20_ietf_MESSAGEBYTES_MAX
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_salsa20.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_salsa20.h
new file mode 100644
index 00000000000..45b3b3e34aa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_salsa20.h
@@ -0,0 +1,61 @@
+#ifndef crypto_stream_salsa20_H
+#define crypto_stream_salsa20_H
+
+/*
+ *  WARNING: This is just a stream cipher. It is NOT authenticated encryption.
+ *  While it provides some protection against eavesdropping, it does NOT
+ *  provide any security against active attacks.
+ *  Unless you know what you're doing, what you are looking for is probably
+ *  the crypto_box functions.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_stream_salsa20_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_stream_salsa20_keybytes(void);
+
+#define crypto_stream_salsa20_NONCEBYTES 8U
+SODIUM_EXPORT
+size_t crypto_stream_salsa20_noncebytes(void);
+
+#define crypto_stream_salsa20_MESSAGEBYTES_MAX SODIUM_SIZE_MAX
+SODIUM_EXPORT
+size_t crypto_stream_salsa20_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_stream_salsa20(unsigned char *c, unsigned long long clen,
+                          const unsigned char *n, const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_salsa20_xor(unsigned char *c, const unsigned char *m,
+                              unsigned long long mlen, const unsigned char *n,
+                              const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_salsa20_xor_ic(unsigned char *c, const unsigned char *m,
+                                 unsigned long long mlen,
+                                 const unsigned char *n, uint64_t ic,
+                                 const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_stream_salsa20_keygen(unsigned char k[crypto_stream_salsa20_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_salsa2012.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_salsa2012.h
new file mode 100644
index 00000000000..6c5d303cacc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_salsa2012.h
@@ -0,0 +1,53 @@
+#ifndef crypto_stream_salsa2012_H
+#define crypto_stream_salsa2012_H
+
+/*
+ *  WARNING: This is just a stream cipher. It is NOT authenticated encryption.
+ *  While it provides some protection against eavesdropping, it does NOT
+ *  provide any security against active attacks.
+ *  Unless you know what you're doing, what you are looking for is probably
+ *  the crypto_box functions.
+ */
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_stream_salsa2012_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_stream_salsa2012_keybytes(void);
+
+#define crypto_stream_salsa2012_NONCEBYTES 8U
+SODIUM_EXPORT
+size_t crypto_stream_salsa2012_noncebytes(void);
+
+#define crypto_stream_salsa2012_MESSAGEBYTES_MAX SODIUM_SIZE_MAX
+SODIUM_EXPORT
+size_t crypto_stream_salsa2012_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_stream_salsa2012(unsigned char *c, unsigned long long clen,
+                            const unsigned char *n, const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_salsa2012_xor(unsigned char *c, const unsigned char *m,
+                                unsigned long long mlen, const unsigned char *n,
+                                const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_stream_salsa2012_keygen(unsigned char k[crypto_stream_salsa2012_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_salsa208.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_salsa208.h
new file mode 100644
index 00000000000..d574f30478a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_salsa208.h
@@ -0,0 +1,56 @@
+#ifndef crypto_stream_salsa208_H
+#define crypto_stream_salsa208_H
+
+/*
+ *  WARNING: This is just a stream cipher. It is NOT authenticated encryption.
+ *  While it provides some protection against eavesdropping, it does NOT
+ *  provide any security against active attacks.
+ *  Unless you know what you're doing, what you are looking for is probably
+ *  the crypto_box functions.
+ */
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_stream_salsa208_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_stream_salsa208_keybytes(void)
+            __attribute__ ((deprecated));
+
+#define crypto_stream_salsa208_NONCEBYTES 8U
+SODIUM_EXPORT
+size_t crypto_stream_salsa208_noncebytes(void)
+            __attribute__ ((deprecated));
+
+#define crypto_stream_salsa208_MESSAGEBYTES_MAX SODIUM_SIZE_MAX
+    SODIUM_EXPORT
+size_t crypto_stream_salsa208_messagebytes_max(void)
+            __attribute__ ((deprecated));
+
+SODIUM_EXPORT
+int crypto_stream_salsa208(unsigned char *c, unsigned long long clen,
+                           const unsigned char *n, const unsigned char *k)
+            __attribute__ ((deprecated)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_salsa208_xor(unsigned char *c, const unsigned char *m,
+                               unsigned long long mlen, const unsigned char *n,
+                               const unsigned char *k)
+            __attribute__ ((deprecated)) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_stream_salsa208_keygen(unsigned char k[crypto_stream_salsa208_KEYBYTES])
+            __attribute__ ((deprecated)) __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_xchacha20.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_xchacha20.h
new file mode 100644
index 00000000000..c4002db00a8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_xchacha20.h
@@ -0,0 +1,61 @@
+#ifndef crypto_stream_xchacha20_H
+#define crypto_stream_xchacha20_H
+
+/*
+ *  WARNING: This is just a stream cipher. It is NOT authenticated encryption.
+ *  While it provides some protection against eavesdropping, it does NOT
+ *  provide any security against active attacks.
+ *  Unless you know what you're doing, what you are looking for is probably
+ *  the crypto_box functions.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_stream_xchacha20_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_stream_xchacha20_keybytes(void);
+
+#define crypto_stream_xchacha20_NONCEBYTES 24U
+SODIUM_EXPORT
+size_t crypto_stream_xchacha20_noncebytes(void);
+
+#define crypto_stream_xchacha20_MESSAGEBYTES_MAX SODIUM_SIZE_MAX
+SODIUM_EXPORT
+size_t crypto_stream_xchacha20_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_stream_xchacha20(unsigned char *c, unsigned long long clen,
+                            const unsigned char *n, const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_xchacha20_xor(unsigned char *c, const unsigned char *m,
+                                unsigned long long mlen, const unsigned char *n,
+                                const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_xchacha20_xor_ic(unsigned char *c, const unsigned char *m,
+                                   unsigned long long mlen,
+                                   const unsigned char *n, uint64_t ic,
+                                   const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_stream_xchacha20_keygen(unsigned char k[crypto_stream_xchacha20_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_xsalsa20.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_xsalsa20.h
new file mode 100644
index 00000000000..20034e3462b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_stream_xsalsa20.h
@@ -0,0 +1,61 @@
+#ifndef crypto_stream_xsalsa20_H
+#define crypto_stream_xsalsa20_H
+
+/*
+ *  WARNING: This is just a stream cipher. It is NOT authenticated encryption.
+ *  While it provides some protection against eavesdropping, it does NOT
+ *  provide any security against active attacks.
+ *  Unless you know what you're doing, what you are looking for is probably
+ *  the crypto_box functions.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+#define crypto_stream_xsalsa20_KEYBYTES 32U
+SODIUM_EXPORT
+size_t crypto_stream_xsalsa20_keybytes(void);
+
+#define crypto_stream_xsalsa20_NONCEBYTES 24U
+SODIUM_EXPORT
+size_t crypto_stream_xsalsa20_noncebytes(void);
+
+#define crypto_stream_xsalsa20_MESSAGEBYTES_MAX SODIUM_SIZE_MAX
+SODIUM_EXPORT
+size_t crypto_stream_xsalsa20_messagebytes_max(void);
+
+SODIUM_EXPORT
+int crypto_stream_xsalsa20(unsigned char *c, unsigned long long clen,
+                           const unsigned char *n, const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_xsalsa20_xor(unsigned char *c, const unsigned char *m,
+                               unsigned long long mlen, const unsigned char *n,
+                               const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int crypto_stream_xsalsa20_xor_ic(unsigned char *c, const unsigned char *m,
+                                  unsigned long long mlen,
+                                  const unsigned char *n, uint64_t ic,
+                                  const unsigned char *k)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void crypto_stream_xsalsa20_keygen(unsigned char k[crypto_stream_xsalsa20_KEYBYTES])
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_verify_16.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_verify_16.h
new file mode 100644
index 00000000000..7b9c8077ad3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_verify_16.h
@@ -0,0 +1,23 @@
+#ifndef crypto_verify_16_H
+#define crypto_verify_16_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_verify_16_BYTES 16U
+SODIUM_EXPORT
+size_t crypto_verify_16_bytes(void);
+
+SODIUM_EXPORT
+int crypto_verify_16(const unsigned char *x, const unsigned char *y)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_verify_32.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_verify_32.h
new file mode 100644
index 00000000000..9b0f4529f6c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_verify_32.h
@@ -0,0 +1,23 @@
+#ifndef crypto_verify_32_H
+#define crypto_verify_32_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_verify_32_BYTES 32U
+SODIUM_EXPORT
+size_t crypto_verify_32_bytes(void);
+
+SODIUM_EXPORT
+int crypto_verify_32(const unsigned char *x, const unsigned char *y)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_verify_64.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_verify_64.h
new file mode 100644
index 00000000000..c83b73025a6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/crypto_verify_64.h
@@ -0,0 +1,23 @@
+#ifndef crypto_verify_64_H
+#define crypto_verify_64_H
+
+#include <stddef.h>
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define crypto_verify_64_BYTES 64U
+SODIUM_EXPORT
+size_t crypto_verify_64_bytes(void);
+
+SODIUM_EXPORT
+int crypto_verify_64(const unsigned char *x, const unsigned char *y)
+            __attribute__ ((warn_unused_result)) __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/export.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/export.h
new file mode 100644
index 00000000000..a0074fc9cbb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/export.h
@@ -0,0 +1,57 @@
+
+#ifndef sodium_export_H
+#define sodium_export_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <limits.h>
+
+#if !defined(__clang__) && !defined(__GNUC__)
+# ifdef __attribute__
+#  undef __attribute__
+# endif
+# define __attribute__(a)
+#endif
+
+#ifdef SODIUM_STATIC
+# define SODIUM_EXPORT
+# define SODIUM_EXPORT_WEAK
+#else
+# if defined(_MSC_VER)
+#  ifdef SODIUM_DLL_EXPORT
+#   define SODIUM_EXPORT __declspec(dllexport)
+#  else
+#   define SODIUM_EXPORT __declspec(dllimport)
+#  endif
+# else
+#  if defined(__SUNPRO_C)
+#   ifndef __GNU_C__
+#    define SODIUM_EXPORT __attribute__ (visibility(__global))
+#   else
+#    define SODIUM_EXPORT __attribute__ __global
+#   endif
+#  elif defined(_MSG_VER)
+#   define SODIUM_EXPORT extern __declspec(dllexport)
+#  else
+#   define SODIUM_EXPORT __attribute__ ((visibility ("default")))
+#  endif
+# endif
+# if defined(__ELF__) && !defined(SODIUM_DISABLE_WEAK_FUNCTIONS)
+#  define SODIUM_EXPORT_WEAK SODIUM_EXPORT __attribute__((weak))
+# else
+#  define SODIUM_EXPORT_WEAK SODIUM_EXPORT
+# endif
+#endif
+
+#ifndef CRYPTO_ALIGN
+# if defined(__INTEL_COMPILER) || defined(_MSC_VER)
+#  define CRYPTO_ALIGN(x) __declspec(align(x))
+# else
+#  define CRYPTO_ALIGN(x) __attribute__ ((aligned(x)))
+# endif
+#endif
+
+#define SODIUM_MIN(A, B) ((A) < (B) ? (A) : (B))
+#define SODIUM_SIZE_MAX SODIUM_MIN(UINT64_MAX, SIZE_MAX)
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/chacha20_ietf_ext.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/chacha20_ietf_ext.h
new file mode 100644
index 00000000000..2c80b96aa72
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/chacha20_ietf_ext.h
@@ -0,0 +1,16 @@
+#ifndef chacha20_ietf_ext_H
+#define chacha20_ietf_ext_H
+
+#include <stdint.h>
+
+/* The ietf_ext variant allows the internal counter to overflow into the IV */
+
+int crypto_stream_chacha20_ietf_ext(unsigned char *c, unsigned long long clen,
+                                    const unsigned char *n, const unsigned char *k);
+
+int crypto_stream_chacha20_ietf_ext_xor_ic(unsigned char *c, const unsigned char *m,
+                                           unsigned long long mlen,
+                                           const unsigned char *n, uint32_t ic,
+                                           const unsigned char *k);
+#endif
+
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/common.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/common.h
new file mode 100644
index 00000000000..339e725ba47
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/common.h
@@ -0,0 +1,261 @@
+#ifndef common_H
+#define common_H 1
+
+#if !defined(_MSC_VER) && !defined(DEV_MODE) && 0
+# warning *** This is unstable, untested, development code.
+# warning It might not compile. It might not work as expected.
+# warning It might be totally insecure.
+# warning Do not use this except if you are planning to contribute code.
+# warning Use releases available at https://download.libsodium.org/libsodium/releases/ instead.
+# warning Alternatively, use the "stable" branch in the git repository.
+#endif
+
+#if !defined(_MSC_VER) && (!defined(CONFIGURED) || CONFIGURED != 1)
+# warning *** The library is being compiled using an undocumented method.
+# warning This is not supported. It has not been tested, it might not
+# warning work as expected, and performance is likely to be suboptimal.
+#endif
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#define COMPILER_ASSERT(X) (void) sizeof(char[(X) ? 1 : -1])
+
+#ifdef HAVE_TI_MODE
+# if defined(__SIZEOF_INT128__)
+typedef unsigned __int128 uint128_t;
+# else
+typedef unsigned uint128_t __attribute__((mode(TI)));
+# endif
+#endif
+
+#define ROTL32(X, B) rotl32((X), (B))
+static inline uint32_t
+rotl32(const uint32_t x, const int b)
+{
+    return (x << b) | (x >> (32 - b));
+}
+
+#define ROTL64(X, B) rotl64((X), (B))
+static inline uint64_t
+rotl64(const uint64_t x, const int b)
+{
+    return (x << b) | (x >> (64 - b));
+}
+
+#define ROTR32(X, B) rotr32((X), (B))
+static inline uint32_t
+rotr32(const uint32_t x, const int b)
+{
+    return (x >> b) | (x << (32 - b));
+}
+
+#define ROTR64(X, B) rotr64((X), (B))
+static inline uint64_t
+rotr64(const uint64_t x, const int b)
+{
+    return (x >> b) | (x << (64 - b));
+}
+
+#define LOAD64_LE(SRC) load64_le(SRC)
+static inline uint64_t
+load64_le(const uint8_t src[8])
+{
+#ifdef NATIVE_LITTLE_ENDIAN
+    uint64_t w;
+    memcpy(&w, src, sizeof w);
+    return w;
+#else
+    uint64_t w = (uint64_t) src[0];
+    w |= (uint64_t) src[1] <<  8;
+    w |= (uint64_t) src[2] << 16;
+    w |= (uint64_t) src[3] << 24;
+    w |= (uint64_t) src[4] << 32;
+    w |= (uint64_t) src[5] << 40;
+    w |= (uint64_t) src[6] << 48;
+    w |= (uint64_t) src[7] << 56;
+    return w;
+#endif
+}
+
+#define STORE64_LE(DST, W) store64_le((DST), (W))
+static inline void
+store64_le(uint8_t dst[8], uint64_t w)
+{
+#ifdef NATIVE_LITTLE_ENDIAN
+    memcpy(dst, &w, sizeof w);
+#else
+    dst[0] = (uint8_t) w; w >>= 8;
+    dst[1] = (uint8_t) w; w >>= 8;
+    dst[2] = (uint8_t) w; w >>= 8;
+    dst[3] = (uint8_t) w; w >>= 8;
+    dst[4] = (uint8_t) w; w >>= 8;
+    dst[5] = (uint8_t) w; w >>= 8;
+    dst[6] = (uint8_t) w; w >>= 8;
+    dst[7] = (uint8_t) w;
+#endif
+}
+
+#define LOAD32_LE(SRC) load32_le(SRC)
+static inline uint32_t
+load32_le(const uint8_t src[4])
+{
+#ifdef NATIVE_LITTLE_ENDIAN
+    uint32_t w;
+    memcpy(&w, src, sizeof w);
+    return w;
+#else
+    uint32_t w = (uint32_t) src[0];
+    w |= (uint32_t) src[1] <<  8;
+    w |= (uint32_t) src[2] << 16;
+    w |= (uint32_t) src[3] << 24;
+    return w;
+#endif
+}
+
+#define STORE32_LE(DST, W) store32_le((DST), (W))
+static inline void
+store32_le(uint8_t dst[4], uint32_t w)
+{
+#ifdef NATIVE_LITTLE_ENDIAN
+    memcpy(dst, &w, sizeof w);
+#else
+    dst[0] = (uint8_t) w; w >>= 8;
+    dst[1] = (uint8_t) w; w >>= 8;
+    dst[2] = (uint8_t) w; w >>= 8;
+    dst[3] = (uint8_t) w;
+#endif
+}
+
+/* ----- */
+
+#define LOAD64_BE(SRC) load64_be(SRC)
+static inline uint64_t
+load64_be(const uint8_t src[8])
+{
+#ifdef NATIVE_BIG_ENDIAN
+    uint64_t w;
+    memcpy(&w, src, sizeof w);
+    return w;
+#else
+    uint64_t w = (uint64_t) src[7];
+    w |= (uint64_t) src[6] <<  8;
+    w |= (uint64_t) src[5] << 16;
+    w |= (uint64_t) src[4] << 24;
+    w |= (uint64_t) src[3] << 32;
+    w |= (uint64_t) src[2] << 40;
+    w |= (uint64_t) src[1] << 48;
+    w |= (uint64_t) src[0] << 56;
+    return w;
+#endif
+}
+
+#define STORE64_BE(DST, W) store64_be((DST), (W))
+static inline void
+store64_be(uint8_t dst[8], uint64_t w)
+{
+#ifdef NATIVE_BIG_ENDIAN
+    memcpy(dst, &w, sizeof w);
+#else
+    dst[7] = (uint8_t) w; w >>= 8;
+    dst[6] = (uint8_t) w; w >>= 8;
+    dst[5] = (uint8_t) w; w >>= 8;
+    dst[4] = (uint8_t) w; w >>= 8;
+    dst[3] = (uint8_t) w; w >>= 8;
+    dst[2] = (uint8_t) w; w >>= 8;
+    dst[1] = (uint8_t) w; w >>= 8;
+    dst[0] = (uint8_t) w;
+#endif
+}
+
+#define LOAD32_BE(SRC) load32_be(SRC)
+static inline uint32_t
+load32_be(const uint8_t src[4])
+{
+#ifdef NATIVE_BIG_ENDIAN
+    uint32_t w;
+    memcpy(&w, src, sizeof w);
+    return w;
+#else
+    uint32_t w = (uint32_t) src[3];
+    w |= (uint32_t) src[2] <<  8;
+    w |= (uint32_t) src[1] << 16;
+    w |= (uint32_t) src[0] << 24;
+    return w;
+#endif
+}
+
+#define STORE32_BE(DST, W) store32_be((DST), (W))
+static inline void
+store32_be(uint8_t dst[4], uint32_t w)
+{
+#ifdef NATIVE_BIG_ENDIAN
+    memcpy(dst, &w, sizeof w);
+#else
+    dst[3] = (uint8_t) w; w >>= 8;
+    dst[2] = (uint8_t) w; w >>= 8;
+    dst[1] = (uint8_t) w; w >>= 8;
+    dst[0] = (uint8_t) w;
+#endif
+}
+
+#define XOR_BUF(OUT, IN, N) xor_buf((OUT), (IN), (N))
+static inline void
+xor_buf(unsigned char *out, const unsigned char *in, size_t n)
+{
+    size_t i;
+
+    for (i = 0; i < n; i++) {
+        out[i] ^= in[i];
+    }
+}
+
+#if !defined(__clang__) && !defined(__GNUC__)
+# ifdef __attribute__
+#  undef __attribute__
+# endif
+# define __attribute__(a)
+#endif
+
+#ifndef CRYPTO_ALIGN
+# if defined(__INTEL_COMPILER) || defined(_MSC_VER)
+#  define CRYPTO_ALIGN(x) __declspec(align(x))
+# else
+#  define CRYPTO_ALIGN(x) __attribute__ ((aligned(x)))
+# endif
+#endif
+
+#if defined(_MSC_VER) && \
+    (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86))
+
+# include <intrin.h>
+
+# define HAVE_INTRIN_H    1
+# define HAVE_MMINTRIN_H  1
+# define HAVE_EMMINTRIN_H 1
+# define HAVE_PMMINTRIN_H 1
+# define HAVE_TMMINTRIN_H 1
+# define HAVE_SMMINTRIN_H 1
+# define HAVE_AVXINTRIN_H 1
+# if _MSC_VER >= 1600
+#  define HAVE_WMMINTRIN_H 1
+# endif
+# if _MSC_VER >= 1700 && defined(_M_X64)
+#  define HAVE_AVX2INTRIN_H 1
+# endif
+#elif defined(HAVE_INTRIN_H)
+# include <intrin.h>
+#endif
+
+#ifdef HAVE_LIBCTGRIND
+extern void ct_poison  (const void *, size_t);
+extern void ct_unpoison(const void *, size_t);
+# define POISON(X, L)   ct_poison((X), (L))
+# define UNPOISON(X, L) ct_unpoison((X), (L))
+#else
+# define POISON(X, L)   (void) 0
+# define UNPOISON(X, L) (void) 0
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/ed25519_ref10.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/ed25519_ref10.h
new file mode 100644
index 00000000000..3f4c45caf0e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/ed25519_ref10.h
@@ -0,0 +1,142 @@
+#ifndef ed25519_ref10_H
+#define ed25519_ref10_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+/*
+ fe means field element.
+ Here the field is \Z/(2^255-19).
+ */
+
+#ifdef HAVE_TI_MODE
+typedef uint64_t fe25519[5];
+#else
+typedef int32_t fe25519[10];
+#endif
+
+void fe25519_invert(fe25519 out, const fe25519 z);
+void fe25519_frombytes(fe25519 h, const unsigned char *s);
+void fe25519_tobytes(unsigned char *s, const fe25519 h);
+
+#ifdef HAVE_TI_MODE
+# include "ed25519_ref10_fe_51.h"
+#else
+# include "ed25519_ref10_fe_25_5.h"
+#endif
+
+
+/*
+ ge means group element.
+
+ Here the group is the set of pairs (x,y) of field elements
+ satisfying -x^2 + y^2 = 1 + d x^2y^2
+ where d = -121665/121666.
+
+ Representations:
+ ge25519_p2 (projective): (X:Y:Z) satisfying x=X/Z, y=Y/Z
+ ge25519_p3 (extended): (X:Y:Z:T) satisfying x=X/Z, y=Y/Z, XY=ZT
+ ge25519_p1p1 (completed): ((X:Z),(Y:T)) satisfying x=X/Z, y=Y/T
+ ge25519_precomp (Duif): (y+x,y-x,2dxy)
+ */
+
+typedef struct {
+    fe25519 X;
+    fe25519 Y;
+    fe25519 Z;
+} ge25519_p2;
+
+typedef struct {
+    fe25519 X;
+    fe25519 Y;
+    fe25519 Z;
+    fe25519 T;
+} ge25519_p3;
+
+typedef struct {
+    fe25519 X;
+    fe25519 Y;
+    fe25519 Z;
+    fe25519 T;
+} ge25519_p1p1;
+
+typedef struct {
+    fe25519 yplusx;
+    fe25519 yminusx;
+    fe25519 xy2d;
+} ge25519_precomp;
+
+typedef struct {
+    fe25519 YplusX;
+    fe25519 YminusX;
+    fe25519 Z;
+    fe25519 T2d;
+} ge25519_cached;
+
+void ge25519_tobytes(unsigned char *s, const ge25519_p2 *h);
+
+void ge25519_p3_tobytes(unsigned char *s, const ge25519_p3 *h);
+
+int ge25519_frombytes(ge25519_p3 *h, const unsigned char *s);
+
+int ge25519_frombytes_negate_vartime(ge25519_p3 *h, const unsigned char *s);
+
+void ge25519_p3_to_cached(ge25519_cached *r, const ge25519_p3 *p);
+
+void ge25519_p1p1_to_p2(ge25519_p2 *r, const ge25519_p1p1 *p);
+
+void ge25519_p1p1_to_p3(ge25519_p3 *r, const ge25519_p1p1 *p);
+
+void ge25519_add(ge25519_p1p1 *r, const ge25519_p3 *p, const ge25519_cached *q);
+
+void ge25519_sub(ge25519_p1p1 *r, const ge25519_p3 *p, const ge25519_cached *q);
+
+void ge25519_scalarmult_base(ge25519_p3 *h, const unsigned char *a);
+
+void ge25519_double_scalarmult_vartime(ge25519_p2 *r, const unsigned char *a,
+                                       const ge25519_p3 *A,
+                                       const unsigned char *b);
+
+void ge25519_scalarmult(ge25519_p3 *h, const unsigned char *a,
+                        const ge25519_p3 *p);
+
+int ge25519_is_canonical(const unsigned char *s);
+
+int ge25519_is_on_curve(const ge25519_p3 *p);
+
+int ge25519_is_on_main_subgroup(const ge25519_p3 *p);
+
+int ge25519_has_small_order(const unsigned char s[32]);
+
+void ge25519_from_uniform(unsigned char s[32], const unsigned char r[32]);
+
+void ge25519_from_hash(unsigned char s[32], const unsigned char h[64]);
+
+/*
+ Ristretto group
+ */
+
+int ristretto255_frombytes(ge25519_p3 *h, const unsigned char *s);
+
+void ristretto255_p3_tobytes(unsigned char *s, const ge25519_p3 *h);
+
+void ristretto255_from_hash(unsigned char s[32], const unsigned char h[64]);
+
+/*
+ The set of scalars is \Z/l
+ where l = 2^252 + 27742317777372353535851937790883648493.
+ */
+
+void sc25519_invert(unsigned char recip[32], const unsigned char s[32]);
+
+void sc25519_reduce(unsigned char s[64]);
+
+void sc25519_mul(unsigned char s[32], const unsigned char a[32],
+                 const unsigned char b[32]);
+
+void sc25519_muladd(unsigned char s[32], const unsigned char a[32],
+                    const unsigned char b[32], const unsigned char c[32]);
+
+int sc25519_is_canonical(const unsigned char s[32]);
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/ed25519_ref10_fe_25_5.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/ed25519_ref10_fe_25_5.h
new file mode 100644
index 00000000000..5a0b6148b7b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/ed25519_ref10_fe_25_5.h
@@ -0,0 +1,1050 @@
+#include <string.h>
+
+#include "private/common.h"
+#include "utils.h"
+
+/*
+ h = 0
+ */
+
+static inline void
+fe25519_0(fe25519 h)
+{
+    memset(&h[0], 0, 10 * sizeof h[0]);
+}
+
+/*
+ h = 1
+ */
+
+static inline void
+fe25519_1(fe25519 h)
+{
+    h[0] = 1;
+    h[1] = 0;
+    memset(&h[2], 0, 8 * sizeof h[0]);
+}
+
+/*
+ h = f + g
+ Can overlap h with f or g.
+ *
+ Preconditions:
+ |f| bounded by 1.1*2^25,1.1*2^24,1.1*2^25,1.1*2^24,etc.
+ |g| bounded by 1.1*2^25,1.1*2^24,1.1*2^25,1.1*2^24,etc.
+ *
+ Postconditions:
+ |h| bounded by 1.1*2^26,1.1*2^25,1.1*2^26,1.1*2^25,etc.
+ */
+
+static inline void
+fe25519_add(fe25519 h, const fe25519 f, const fe25519 g)
+{
+    int32_t h0 = f[0] + g[0];
+    int32_t h1 = f[1] + g[1];
+    int32_t h2 = f[2] + g[2];
+    int32_t h3 = f[3] + g[3];
+    int32_t h4 = f[4] + g[4];
+    int32_t h5 = f[5] + g[5];
+    int32_t h6 = f[6] + g[6];
+    int32_t h7 = f[7] + g[7];
+    int32_t h8 = f[8] + g[8];
+    int32_t h9 = f[9] + g[9];
+
+    h[0] = h0;
+    h[1] = h1;
+    h[2] = h2;
+    h[3] = h3;
+    h[4] = h4;
+    h[5] = h5;
+    h[6] = h6;
+    h[7] = h7;
+    h[8] = h8;
+    h[9] = h9;
+}
+
+/*
+ h = f - g
+ Can overlap h with f or g.
+ *
+ Preconditions:
+ |f| bounded by 1.1*2^25,1.1*2^24,1.1*2^25,1.1*2^24,etc.
+ |g| bounded by 1.1*2^25,1.1*2^24,1.1*2^25,1.1*2^24,etc.
+ *
+ Postconditions:
+ |h| bounded by 1.1*2^26,1.1*2^25,1.1*2^26,1.1*2^25,etc.
+ */
+
+static void
+fe25519_sub(fe25519 h, const fe25519 f, const fe25519 g)
+{
+    int32_t h0 = f[0] - g[0];
+    int32_t h1 = f[1] - g[1];
+    int32_t h2 = f[2] - g[2];
+    int32_t h3 = f[3] - g[3];
+    int32_t h4 = f[4] - g[4];
+    int32_t h5 = f[5] - g[5];
+    int32_t h6 = f[6] - g[6];
+    int32_t h7 = f[7] - g[7];
+    int32_t h8 = f[8] - g[8];
+    int32_t h9 = f[9] - g[9];
+
+    h[0] = h0;
+    h[1] = h1;
+    h[2] = h2;
+    h[3] = h3;
+    h[4] = h4;
+    h[5] = h5;
+    h[6] = h6;
+    h[7] = h7;
+    h[8] = h8;
+    h[9] = h9;
+}
+
+/*
+ h = -f
+ *
+ Preconditions:
+ |f| bounded by 1.1*2^25,1.1*2^24,1.1*2^25,1.1*2^24,etc.
+ *
+ Postconditions:
+ |h| bounded by 1.1*2^25,1.1*2^24,1.1*2^25,1.1*2^24,etc.
+ */
+
+static inline void
+fe25519_neg(fe25519 h, const fe25519 f)
+{
+    int32_t h0 = -f[0];
+    int32_t h1 = -f[1];
+    int32_t h2 = -f[2];
+    int32_t h3 = -f[3];
+    int32_t h4 = -f[4];
+    int32_t h5 = -f[5];
+    int32_t h6 = -f[6];
+    int32_t h7 = -f[7];
+    int32_t h8 = -f[8];
+    int32_t h9 = -f[9];
+
+    h[0] = h0;
+    h[1] = h1;
+    h[2] = h2;
+    h[3] = h3;
+    h[4] = h4;
+    h[5] = h5;
+    h[6] = h6;
+    h[7] = h7;
+    h[8] = h8;
+    h[9] = h9;
+}
+
+/*
+ Replace (f,g) with (g,g) if b == 1;
+ replace (f,g) with (f,g) if b == 0.
+ *
+ Preconditions: b in {0,1}.
+ */
+
+static void
+fe25519_cmov(fe25519 f, const fe25519 g, unsigned int b)
+{
+    const uint32_t mask = (uint32_t) (-(int32_t) b);
+
+    int32_t f0 = f[0];
+    int32_t f1 = f[1];
+    int32_t f2 = f[2];
+    int32_t f3 = f[3];
+    int32_t f4 = f[4];
+    int32_t f5 = f[5];
+    int32_t f6 = f[6];
+    int32_t f7 = f[7];
+    int32_t f8 = f[8];
+    int32_t f9 = f[9];
+
+    int32_t x0 = f0 ^ g[0];
+    int32_t x1 = f1 ^ g[1];
+    int32_t x2 = f2 ^ g[2];
+    int32_t x3 = f3 ^ g[3];
+    int32_t x4 = f4 ^ g[4];
+    int32_t x5 = f5 ^ g[5];
+    int32_t x6 = f6 ^ g[6];
+    int32_t x7 = f7 ^ g[7];
+    int32_t x8 = f8 ^ g[8];
+    int32_t x9 = f9 ^ g[9];
+
+    x0 &= mask;
+    x1 &= mask;
+    x2 &= mask;
+    x3 &= mask;
+    x4 &= mask;
+    x5 &= mask;
+    x6 &= mask;
+    x7 &= mask;
+    x8 &= mask;
+    x9 &= mask;
+
+    f[0] = f0 ^ x0;
+    f[1] = f1 ^ x1;
+    f[2] = f2 ^ x2;
+    f[3] = f3 ^ x3;
+    f[4] = f4 ^ x4;
+    f[5] = f5 ^ x5;
+    f[6] = f6 ^ x6;
+    f[7] = f7 ^ x7;
+    f[8] = f8 ^ x8;
+    f[9] = f9 ^ x9;
+}
+
+static void
+fe25519_cswap(fe25519 f, fe25519 g, unsigned int b)
+{
+    const uint32_t mask = (uint32_t) (-(int64_t) b);
+
+    int32_t f0 = f[0];
+    int32_t f1 = f[1];
+    int32_t f2 = f[2];
+    int32_t f3 = f[3];
+    int32_t f4 = f[4];
+    int32_t f5 = f[5];
+    int32_t f6 = f[6];
+    int32_t f7 = f[7];
+    int32_t f8 = f[8];
+    int32_t f9 = f[9];
+
+    int32_t g0 = g[0];
+    int32_t g1 = g[1];
+    int32_t g2 = g[2];
+    int32_t g3 = g[3];
+    int32_t g4 = g[4];
+    int32_t g5 = g[5];
+    int32_t g6 = g[6];
+    int32_t g7 = g[7];
+    int32_t g8 = g[8];
+    int32_t g9 = g[9];
+
+    int32_t x0 = f0 ^ g0;
+    int32_t x1 = f1 ^ g1;
+    int32_t x2 = f2 ^ g2;
+    int32_t x3 = f3 ^ g3;
+    int32_t x4 = f4 ^ g4;
+    int32_t x5 = f5 ^ g5;
+    int32_t x6 = f6 ^ g6;
+    int32_t x7 = f7 ^ g7;
+    int32_t x8 = f8 ^ g8;
+    int32_t x9 = f9 ^ g9;
+
+    x0 &= mask;
+    x1 &= mask;
+    x2 &= mask;
+    x3 &= mask;
+    x4 &= mask;
+    x5 &= mask;
+    x6 &= mask;
+    x7 &= mask;
+    x8 &= mask;
+    x9 &= mask;
+
+    f[0] = f0 ^ x0;
+    f[1] = f1 ^ x1;
+    f[2] = f2 ^ x2;
+    f[3] = f3 ^ x3;
+    f[4] = f4 ^ x4;
+    f[5] = f5 ^ x5;
+    f[6] = f6 ^ x6;
+    f[7] = f7 ^ x7;
+    f[8] = f8 ^ x8;
+    f[9] = f9 ^ x9;
+
+    g[0] = g0 ^ x0;
+    g[1] = g1 ^ x1;
+    g[2] = g2 ^ x2;
+    g[3] = g3 ^ x3;
+    g[4] = g4 ^ x4;
+    g[5] = g5 ^ x5;
+    g[6] = g6 ^ x6;
+    g[7] = g7 ^ x7;
+    g[8] = g8 ^ x8;
+    g[9] = g9 ^ x9;
+}
+
+/*
+ h = f
+ */
+
+static inline void
+fe25519_copy(fe25519 h, const fe25519 f)
+{
+    int32_t f0 = f[0];
+    int32_t f1 = f[1];
+    int32_t f2 = f[2];
+    int32_t f3 = f[3];
+    int32_t f4 = f[4];
+    int32_t f5 = f[5];
+    int32_t f6 = f[6];
+    int32_t f7 = f[7];
+    int32_t f8 = f[8];
+    int32_t f9 = f[9];
+
+    h[0] = f0;
+    h[1] = f1;
+    h[2] = f2;
+    h[3] = f3;
+    h[4] = f4;
+    h[5] = f5;
+    h[6] = f6;
+    h[7] = f7;
+    h[8] = f8;
+    h[9] = f9;
+}
+
+/*
+ return 1 if f is in {1,3,5,...,q-2}
+ return 0 if f is in {0,2,4,...,q-1}
+
+ Preconditions:
+ |f| bounded by 1.1*2^26,1.1*2^25,1.1*2^26,1.1*2^25,etc.
+ */
+
+static inline int
+fe25519_isnegative(const fe25519 f)
+{
+    unsigned char s[32];
+
+    fe25519_tobytes(s, f);
+
+    return s[0] & 1;
+}
+
+/*
+ return 1 if f == 0
+ return 0 if f != 0
+
+ Preconditions:
+ |f| bounded by 1.1*2^26,1.1*2^25,1.1*2^26,1.1*2^25,etc.
+ */
+
+static inline int
+fe25519_iszero(const fe25519 f)
+{
+    unsigned char s[32];
+
+    fe25519_tobytes(s, f);
+
+    return sodium_is_zero(s, 32);
+}
+
+/*
+ h = f * g
+ Can overlap h with f or g.
+ *
+ Preconditions:
+ |f| bounded by 1.65*2^26,1.65*2^25,1.65*2^26,1.65*2^25,etc.
+ |g| bounded by 1.65*2^26,1.65*2^25,1.65*2^26,1.65*2^25,etc.
+ *
+ Postconditions:
+ |h| bounded by 1.01*2^25,1.01*2^24,1.01*2^25,1.01*2^24,etc.
+ */
+
+/*
+ Notes on implementation strategy:
+ *
+ Using schoolbook multiplication.
+ Karatsuba would save a little in some cost models.
+ *
+ Most multiplications by 2 and 19 are 32-bit precomputations;
+ cheaper than 64-bit postcomputations.
+ *
+ There is one remaining multiplication by 19 in the carry chain;
+ one *19 precomputation can be merged into this,
+ but the resulting data flow is considerably less clean.
+ *
+ There are 12 carries below.
+ 10 of them are 2-way parallelizable and vectorizable.
+ Can get away with 11 carries, but then data flow is much deeper.
+ *
+ With tighter constraints on inputs can squeeze carries into int32.
+ */
+
+static void
+fe25519_mul(fe25519 h, const fe25519 f, const fe25519 g)
+{
+    int32_t f0 = f[0];
+    int32_t f1 = f[1];
+    int32_t f2 = f[2];
+    int32_t f3 = f[3];
+    int32_t f4 = f[4];
+    int32_t f5 = f[5];
+    int32_t f6 = f[6];
+    int32_t f7 = f[7];
+    int32_t f8 = f[8];
+    int32_t f9 = f[9];
+
+    int32_t g0 = g[0];
+    int32_t g1 = g[1];
+    int32_t g2 = g[2];
+    int32_t g3 = g[3];
+    int32_t g4 = g[4];
+    int32_t g5 = g[5];
+    int32_t g6 = g[6];
+    int32_t g7 = g[7];
+    int32_t g8 = g[8];
+    int32_t g9 = g[9];
+
+    int32_t g1_19 = 19 * g1; /* 1.959375*2^29 */
+    int32_t g2_19 = 19 * g2; /* 1.959375*2^30; still ok */
+    int32_t g3_19 = 19 * g3;
+    int32_t g4_19 = 19 * g4;
+    int32_t g5_19 = 19 * g5;
+    int32_t g6_19 = 19 * g6;
+    int32_t g7_19 = 19 * g7;
+    int32_t g8_19 = 19 * g8;
+    int32_t g9_19 = 19 * g9;
+    int32_t f1_2  = 2 * f1;
+    int32_t f3_2  = 2 * f3;
+    int32_t f5_2  = 2 * f5;
+    int32_t f7_2  = 2 * f7;
+    int32_t f9_2  = 2 * f9;
+
+    int64_t f0g0    = f0 * (int64_t) g0;
+    int64_t f0g1    = f0 * (int64_t) g1;
+    int64_t f0g2    = f0 * (int64_t) g2;
+    int64_t f0g3    = f0 * (int64_t) g3;
+    int64_t f0g4    = f0 * (int64_t) g4;
+    int64_t f0g5    = f0 * (int64_t) g5;
+    int64_t f0g6    = f0 * (int64_t) g6;
+    int64_t f0g7    = f0 * (int64_t) g7;
+    int64_t f0g8    = f0 * (int64_t) g8;
+    int64_t f0g9    = f0 * (int64_t) g9;
+    int64_t f1g0    = f1 * (int64_t) g0;
+    int64_t f1g1_2  = f1_2 * (int64_t) g1;
+    int64_t f1g2    = f1 * (int64_t) g2;
+    int64_t f1g3_2  = f1_2 * (int64_t) g3;
+    int64_t f1g4    = f1 * (int64_t) g4;
+    int64_t f1g5_2  = f1_2 * (int64_t) g5;
+    int64_t f1g6    = f1 * (int64_t) g6;
+    int64_t f1g7_2  = f1_2 * (int64_t) g7;
+    int64_t f1g8    = f1 * (int64_t) g8;
+    int64_t f1g9_38 = f1_2 * (int64_t) g9_19;
+    int64_t f2g0    = f2 * (int64_t) g0;
+    int64_t f2g1    = f2 * (int64_t) g1;
+    int64_t f2g2    = f2 * (int64_t) g2;
+    int64_t f2g3    = f2 * (int64_t) g3;
+    int64_t f2g4    = f2 * (int64_t) g4;
+    int64_t f2g5    = f2 * (int64_t) g5;
+    int64_t f2g6    = f2 * (int64_t) g6;
+    int64_t f2g7    = f2 * (int64_t) g7;
+    int64_t f2g8_19 = f2 * (int64_t) g8_19;
+    int64_t f2g9_19 = f2 * (int64_t) g9_19;
+    int64_t f3g0    = f3 * (int64_t) g0;
+    int64_t f3g1_2  = f3_2 * (int64_t) g1;
+    int64_t f3g2    = f3 * (int64_t) g2;
+    int64_t f3g3_2  = f3_2 * (int64_t) g3;
+    int64_t f3g4    = f3 * (int64_t) g4;
+    int64_t f3g5_2  = f3_2 * (int64_t) g5;
+    int64_t f3g6    = f3 * (int64_t) g6;
+    int64_t f3g7_38 = f3_2 * (int64_t) g7_19;
+    int64_t f3g8_19 = f3 * (int64_t) g8_19;
+    int64_t f3g9_38 = f3_2 * (int64_t) g9_19;
+    int64_t f4g0    = f4 * (int64_t) g0;
+    int64_t f4g1    = f4 * (int64_t) g1;
+    int64_t f4g2    = f4 * (int64_t) g2;
+    int64_t f4g3    = f4 * (int64_t) g3;
+    int64_t f4g4    = f4 * (int64_t) g4;
+    int64_t f4g5    = f4 * (int64_t) g5;
+    int64_t f4g6_19 = f4 * (int64_t) g6_19;
+    int64_t f4g7_19 = f4 * (int64_t) g7_19;
+    int64_t f4g8_19 = f4 * (int64_t) g8_19;
+    int64_t f4g9_19 = f4 * (int64_t) g9_19;
+    int64_t f5g0    = f5 * (int64_t) g0;
+    int64_t f5g1_2  = f5_2 * (int64_t) g1;
+    int64_t f5g2    = f5 * (int64_t) g2;
+    int64_t f5g3_2  = f5_2 * (int64_t) g3;
+    int64_t f5g4    = f5 * (int64_t) g4;
+    int64_t f5g5_38 = f5_2 * (int64_t) g5_19;
+    int64_t f5g6_19 = f5 * (int64_t) g6_19;
+    int64_t f5g7_38 = f5_2 * (int64_t) g7_19;
+    int64_t f5g8_19 = f5 * (int64_t) g8_19;
+    int64_t f5g9_38 = f5_2 * (int64_t) g9_19;
+    int64_t f6g0    = f6 * (int64_t) g0;
+    int64_t f6g1    = f6 * (int64_t) g1;
+    int64_t f6g2    = f6 * (int64_t) g2;
+    int64_t f6g3    = f6 * (int64_t) g3;
+    int64_t f6g4_19 = f6 * (int64_t) g4_19;
+    int64_t f6g5_19 = f6 * (int64_t) g5_19;
+    int64_t f6g6_19 = f6 * (int64_t) g6_19;
+    int64_t f6g7_19 = f6 * (int64_t) g7_19;
+    int64_t f6g8_19 = f6 * (int64_t) g8_19;
+    int64_t f6g9_19 = f6 * (int64_t) g9_19;
+    int64_t f7g0    = f7 * (int64_t) g0;
+    int64_t f7g1_2  = f7_2 * (int64_t) g1;
+    int64_t f7g2    = f7 * (int64_t) g2;
+    int64_t f7g3_38 = f7_2 * (int64_t) g3_19;
+    int64_t f7g4_19 = f7 * (int64_t) g4_19;
+    int64_t f7g5_38 = f7_2 * (int64_t) g5_19;
+    int64_t f7g6_19 = f7 * (int64_t) g6_19;
+    int64_t f7g7_38 = f7_2 * (int64_t) g7_19;
+    int64_t f7g8_19 = f7 * (int64_t) g8_19;
+    int64_t f7g9_38 = f7_2 * (int64_t) g9_19;
+    int64_t f8g0    = f8 * (int64_t) g0;
+    int64_t f8g1    = f8 * (int64_t) g1;
+    int64_t f8g2_19 = f8 * (int64_t) g2_19;
+    int64_t f8g3_19 = f8 * (int64_t) g3_19;
+    int64_t f8g4_19 = f8 * (int64_t) g4_19;
+    int64_t f8g5_19 = f8 * (int64_t) g5_19;
+    int64_t f8g6_19 = f8 * (int64_t) g6_19;
+    int64_t f8g7_19 = f8 * (int64_t) g7_19;
+    int64_t f8g8_19 = f8 * (int64_t) g8_19;
+    int64_t f8g9_19 = f8 * (int64_t) g9_19;
+    int64_t f9g0    = f9 * (int64_t) g0;
+    int64_t f9g1_38 = f9_2 * (int64_t) g1_19;
+    int64_t f9g2_19 = f9 * (int64_t) g2_19;
+    int64_t f9g3_38 = f9_2 * (int64_t) g3_19;
+    int64_t f9g4_19 = f9 * (int64_t) g4_19;
+    int64_t f9g5_38 = f9_2 * (int64_t) g5_19;
+    int64_t f9g6_19 = f9 * (int64_t) g6_19;
+    int64_t f9g7_38 = f9_2 * (int64_t) g7_19;
+    int64_t f9g8_19 = f9 * (int64_t) g8_19;
+    int64_t f9g9_38 = f9_2 * (int64_t) g9_19;
+
+    int64_t h0 = f0g0 + f1g9_38 + f2g8_19 + f3g7_38 + f4g6_19 + f5g5_38 +
+                 f6g4_19 + f7g3_38 + f8g2_19 + f9g1_38;
+    int64_t h1 = f0g1 + f1g0 + f2g9_19 + f3g8_19 + f4g7_19 + f5g6_19 + f6g5_19 +
+                 f7g4_19 + f8g3_19 + f9g2_19;
+    int64_t h2 = f0g2 + f1g1_2 + f2g0 + f3g9_38 + f4g8_19 + f5g7_38 + f6g6_19 +
+                 f7g5_38 + f8g4_19 + f9g3_38;
+    int64_t h3 = f0g3 + f1g2 + f2g1 + f3g0 + f4g9_19 + f5g8_19 + f6g7_19 +
+                 f7g6_19 + f8g5_19 + f9g4_19;
+    int64_t h4 = f0g4 + f1g3_2 + f2g2 + f3g1_2 + f4g0 + f5g9_38 + f6g8_19 +
+                 f7g7_38 + f8g6_19 + f9g5_38;
+    int64_t h5 = f0g5 + f1g4 + f2g3 + f3g2 + f4g1 + f5g0 + f6g9_19 + f7g8_19 +
+                 f8g7_19 + f9g6_19;
+    int64_t h6 = f0g6 + f1g5_2 + f2g4 + f3g3_2 + f4g2 + f5g1_2 + f6g0 +
+                 f7g9_38 + f8g8_19 + f9g7_38;
+    int64_t h7 = f0g7 + f1g6 + f2g5 + f3g4 + f4g3 + f5g2 + f6g1 + f7g0 +
+                 f8g9_19 + f9g8_19;
+    int64_t h8 = f0g8 + f1g7_2 + f2g6 + f3g5_2 + f4g4 + f5g3_2 + f6g2 + f7g1_2 +
+                 f8g0 + f9g9_38;
+    int64_t h9 =
+        f0g9 + f1g8 + f2g7 + f3g6 + f4g5 + f5g4 + f6g3 + f7g2 + f8g1 + f9g0;
+
+    int64_t carry0;
+    int64_t carry1;
+    int64_t carry2;
+    int64_t carry3;
+    int64_t carry4;
+    int64_t carry5;
+    int64_t carry6;
+    int64_t carry7;
+    int64_t carry8;
+    int64_t carry9;
+
+    /*
+     |h0| <= (1.65*1.65*2^52*(1+19+19+19+19)+1.65*1.65*2^50*(38+38+38+38+38))
+     i.e. |h0| <= 1.4*2^60; narrower ranges for h2, h4, h6, h8
+     |h1| <= (1.65*1.65*2^51*(1+1+19+19+19+19+19+19+19+19))
+     i.e. |h1| <= 1.7*2^59; narrower ranges for h3, h5, h7, h9
+     */
+
+    carry0 = (h0 + (int64_t)(1L << 25)) >> 26;
+    h1 += carry0;
+    h0 -= carry0 * ((uint64_t) 1L << 26);
+    carry4 = (h4 + (int64_t)(1L << 25)) >> 26;
+    h5 += carry4;
+    h4 -= carry4 * ((uint64_t) 1L << 26);
+    /* |h0| <= 2^25 */
+    /* |h4| <= 2^25 */
+    /* |h1| <= 1.71*2^59 */
+    /* |h5| <= 1.71*2^59 */
+
+    carry1 = (h1 + (int64_t)(1L << 24)) >> 25;
+    h2 += carry1;
+    h1 -= carry1 * ((uint64_t) 1L << 25);
+    carry5 = (h5 + (int64_t)(1L << 24)) >> 25;
+    h6 += carry5;
+    h5 -= carry5 * ((uint64_t) 1L << 25);
+    /* |h1| <= 2^24; from now on fits into int32 */
+    /* |h5| <= 2^24; from now on fits into int32 */
+    /* |h2| <= 1.41*2^60 */
+    /* |h6| <= 1.41*2^60 */
+
+    carry2 = (h2 + (int64_t)(1L << 25)) >> 26;
+    h3 += carry2;
+    h2 -= carry2 * ((uint64_t) 1L << 26);
+    carry6 = (h6 + (int64_t)(1L << 25)) >> 26;
+    h7 += carry6;
+    h6 -= carry6 * ((uint64_t) 1L << 26);
+    /* |h2| <= 2^25; from now on fits into int32 unchanged */
+    /* |h6| <= 2^25; from now on fits into int32 unchanged */
+    /* |h3| <= 1.71*2^59 */
+    /* |h7| <= 1.71*2^59 */
+
+    carry3 = (h3 + (int64_t)(1L << 24)) >> 25;
+    h4 += carry3;
+    h3 -= carry3 * ((uint64_t) 1L << 25);
+    carry7 = (h7 + (int64_t)(1L << 24)) >> 25;
+    h8 += carry7;
+    h7 -= carry7 * ((uint64_t) 1L << 25);
+    /* |h3| <= 2^24; from now on fits into int32 unchanged */
+    /* |h7| <= 2^24; from now on fits into int32 unchanged */
+    /* |h4| <= 1.72*2^34 */
+    /* |h8| <= 1.41*2^60 */
+
+    carry4 = (h4 + (int64_t)(1L << 25)) >> 26;
+    h5 += carry4;
+    h4 -= carry4 * ((uint64_t) 1L << 26);
+    carry8 = (h8 + (int64_t)(1L << 25)) >> 26;
+    h9 += carry8;
+    h8 -= carry8 * ((uint64_t) 1L << 26);
+    /* |h4| <= 2^25; from now on fits into int32 unchanged */
+    /* |h8| <= 2^25; from now on fits into int32 unchanged */
+    /* |h5| <= 1.01*2^24 */
+    /* |h9| <= 1.71*2^59 */
+
+    carry9 = (h9 + (int64_t)(1L << 24)) >> 25;
+    h0 += carry9 * 19;
+    h9 -= carry9 * ((uint64_t) 1L << 25);
+    /* |h9| <= 2^24; from now on fits into int32 unchanged */
+    /* |h0| <= 1.1*2^39 */
+
+    carry0 = (h0 + (int64_t)(1L << 25)) >> 26;
+    h1 += carry0;
+    h0 -= carry0 * ((uint64_t) 1L << 26);
+    /* |h0| <= 2^25; from now on fits into int32 unchanged */
+    /* |h1| <= 1.01*2^24 */
+
+    h[0] = (int32_t) h0;
+    h[1] = (int32_t) h1;
+    h[2] = (int32_t) h2;
+    h[3] = (int32_t) h3;
+    h[4] = (int32_t) h4;
+    h[5] = (int32_t) h5;
+    h[6] = (int32_t) h6;
+    h[7] = (int32_t) h7;
+    h[8] = (int32_t) h8;
+    h[9] = (int32_t) h9;
+}
+
+/*
+ h = f * f
+ Can overlap h with f.
+ *
+ Preconditions:
+ |f| bounded by 1.65*2^26,1.65*2^25,1.65*2^26,1.65*2^25,etc.
+ *
+ Postconditions:
+ |h| bounded by 1.01*2^25,1.01*2^24,1.01*2^25,1.01*2^24,etc.
+ */
+
+static void
+fe25519_sq(fe25519 h, const fe25519 f)
+{
+    int32_t f0 = f[0];
+    int32_t f1 = f[1];
+    int32_t f2 = f[2];
+    int32_t f3 = f[3];
+    int32_t f4 = f[4];
+    int32_t f5 = f[5];
+    int32_t f6 = f[6];
+    int32_t f7 = f[7];
+    int32_t f8 = f[8];
+    int32_t f9 = f[9];
+
+    int32_t f0_2  = 2 * f0;
+    int32_t f1_2  = 2 * f1;
+    int32_t f2_2  = 2 * f2;
+    int32_t f3_2  = 2 * f3;
+    int32_t f4_2  = 2 * f4;
+    int32_t f5_2  = 2 * f5;
+    int32_t f6_2  = 2 * f6;
+    int32_t f7_2  = 2 * f7;
+    int32_t f5_38 = 38 * f5; /* 1.959375*2^30 */
+    int32_t f6_19 = 19 * f6; /* 1.959375*2^30 */
+    int32_t f7_38 = 38 * f7; /* 1.959375*2^30 */
+    int32_t f8_19 = 19 * f8; /* 1.959375*2^30 */
+    int32_t f9_38 = 38 * f9; /* 1.959375*2^30 */
+
+    int64_t f0f0    = f0 * (int64_t) f0;
+    int64_t f0f1_2  = f0_2 * (int64_t) f1;
+    int64_t f0f2_2  = f0_2 * (int64_t) f2;
+    int64_t f0f3_2  = f0_2 * (int64_t) f3;
+    int64_t f0f4_2  = f0_2 * (int64_t) f4;
+    int64_t f0f5_2  = f0_2 * (int64_t) f5;
+    int64_t f0f6_2  = f0_2 * (int64_t) f6;
+    int64_t f0f7_2  = f0_2 * (int64_t) f7;
+    int64_t f0f8_2  = f0_2 * (int64_t) f8;
+    int64_t f0f9_2  = f0_2 * (int64_t) f9;
+    int64_t f1f1_2  = f1_2 * (int64_t) f1;
+    int64_t f1f2_2  = f1_2 * (int64_t) f2;
+    int64_t f1f3_4  = f1_2 * (int64_t) f3_2;
+    int64_t f1f4_2  = f1_2 * (int64_t) f4;
+    int64_t f1f5_4  = f1_2 * (int64_t) f5_2;
+    int64_t f1f6_2  = f1_2 * (int64_t) f6;
+    int64_t f1f7_4  = f1_2 * (int64_t) f7_2;
+    int64_t f1f8_2  = f1_2 * (int64_t) f8;
+    int64_t f1f9_76 = f1_2 * (int64_t) f9_38;
+    int64_t f2f2    = f2 * (int64_t) f2;
+    int64_t f2f3_2  = f2_2 * (int64_t) f3;
+    int64_t f2f4_2  = f2_2 * (int64_t) f4;
+    int64_t f2f5_2  = f2_2 * (int64_t) f5;
+    int64_t f2f6_2  = f2_2 * (int64_t) f6;
+    int64_t f2f7_2  = f2_2 * (int64_t) f7;
+    int64_t f2f8_38 = f2_2 * (int64_t) f8_19;
+    int64_t f2f9_38 = f2 * (int64_t) f9_38;
+    int64_t f3f3_2  = f3_2 * (int64_t) f3;
+    int64_t f3f4_2  = f3_2 * (int64_t) f4;
+    int64_t f3f5_4  = f3_2 * (int64_t) f5_2;
+    int64_t f3f6_2  = f3_2 * (int64_t) f6;
+    int64_t f3f7_76 = f3_2 * (int64_t) f7_38;
+    int64_t f3f8_38 = f3_2 * (int64_t) f8_19;
+    int64_t f3f9_76 = f3_2 * (int64_t) f9_38;
+    int64_t f4f4    = f4 * (int64_t) f4;
+    int64_t f4f5_2  = f4_2 * (int64_t) f5;
+    int64_t f4f6_38 = f4_2 * (int64_t) f6_19;
+    int64_t f4f7_38 = f4 * (int64_t) f7_38;
+    int64_t f4f8_38 = f4_2 * (int64_t) f8_19;
+    int64_t f4f9_38 = f4 * (int64_t) f9_38;
+    int64_t f5f5_38 = f5 * (int64_t) f5_38;
+    int64_t f5f6_38 = f5_2 * (int64_t) f6_19;
+    int64_t f5f7_76 = f5_2 * (int64_t) f7_38;
+    int64_t f5f8_38 = f5_2 * (int64_t) f8_19;
+    int64_t f5f9_76 = f5_2 * (int64_t) f9_38;
+    int64_t f6f6_19 = f6 * (int64_t) f6_19;
+    int64_t f6f7_38 = f6 * (int64_t) f7_38;
+    int64_t f6f8_38 = f6_2 * (int64_t) f8_19;
+    int64_t f6f9_38 = f6 * (int64_t) f9_38;
+    int64_t f7f7_38 = f7 * (int64_t) f7_38;
+    int64_t f7f8_38 = f7_2 * (int64_t) f8_19;
+    int64_t f7f9_76 = f7_2 * (int64_t) f9_38;
+    int64_t f8f8_19 = f8 * (int64_t) f8_19;
+    int64_t f8f9_38 = f8 * (int64_t) f9_38;
+    int64_t f9f9_38 = f9 * (int64_t) f9_38;
+
+    int64_t h0 = f0f0 + f1f9_76 + f2f8_38 + f3f7_76 + f4f6_38 + f5f5_38;
+    int64_t h1 = f0f1_2 + f2f9_38 + f3f8_38 + f4f7_38 + f5f6_38;
+    int64_t h2 = f0f2_2 + f1f1_2 + f3f9_76 + f4f8_38 + f5f7_76 + f6f6_19;
+    int64_t h3 = f0f3_2 + f1f2_2 + f4f9_38 + f5f8_38 + f6f7_38;
+    int64_t h4 = f0f4_2 + f1f3_4 + f2f2 + f5f9_76 + f6f8_38 + f7f7_38;
+    int64_t h5 = f0f5_2 + f1f4_2 + f2f3_2 + f6f9_38 + f7f8_38;
+    int64_t h6 = f0f6_2 + f1f5_4 + f2f4_2 + f3f3_2 + f7f9_76 + f8f8_19;
+    int64_t h7 = f0f7_2 + f1f6_2 + f2f5_2 + f3f4_2 + f8f9_38;
+    int64_t h8 = f0f8_2 + f1f7_4 + f2f6_2 + f3f5_4 + f4f4 + f9f9_38;
+    int64_t h9 = f0f9_2 + f1f8_2 + f2f7_2 + f3f6_2 + f4f5_2;
+
+    int64_t carry0;
+    int64_t carry1;
+    int64_t carry2;
+    int64_t carry3;
+    int64_t carry4;
+    int64_t carry5;
+    int64_t carry6;
+    int64_t carry7;
+    int64_t carry8;
+    int64_t carry9;
+
+    carry0 = (h0 + (int64_t)(1L << 25)) >> 26;
+    h1 += carry0;
+    h0 -= carry0 * ((uint64_t) 1L << 26);
+    carry4 = (h4 + (int64_t)(1L << 25)) >> 26;
+    h5 += carry4;
+    h4 -= carry4 * ((uint64_t) 1L << 26);
+
+    carry1 = (h1 + (int64_t)(1L << 24)) >> 25;
+    h2 += carry1;
+    h1 -= carry1 * ((uint64_t) 1L << 25);
+    carry5 = (h5 + (int64_t)(1L << 24)) >> 25;
+    h6 += carry5;
+    h5 -= carry5 * ((uint64_t) 1L << 25);
+
+    carry2 = (h2 + (int64_t)(1L << 25)) >> 26;
+    h3 += carry2;
+    h2 -= carry2 * ((uint64_t) 1L << 26);
+    carry6 = (h6 + (int64_t)(1L << 25)) >> 26;
+    h7 += carry6;
+    h6 -= carry6 * ((uint64_t) 1L << 26);
+
+    carry3 = (h3 + (int64_t)(1L << 24)) >> 25;
+    h4 += carry3;
+    h3 -= carry3 * ((uint64_t) 1L << 25);
+    carry7 = (h7 + (int64_t)(1L << 24)) >> 25;
+    h8 += carry7;
+    h7 -= carry7 * ((uint64_t) 1L << 25);
+
+    carry4 = (h4 + (int64_t)(1L << 25)) >> 26;
+    h5 += carry4;
+    h4 -= carry4 * ((uint64_t) 1L << 26);
+    carry8 = (h8 + (int64_t)(1L << 25)) >> 26;
+    h9 += carry8;
+    h8 -= carry8 * ((uint64_t) 1L << 26);
+
+    carry9 = (h9 + (int64_t)(1L << 24)) >> 25;
+    h0 += carry9 * 19;
+    h9 -= carry9 * ((uint64_t) 1L << 25);
+
+    carry0 = (h0 + (int64_t)(1L << 25)) >> 26;
+    h1 += carry0;
+    h0 -= carry0 * ((uint64_t) 1L << 26);
+
+    h[0] = (int32_t) h0;
+    h[1] = (int32_t) h1;
+    h[2] = (int32_t) h2;
+    h[3] = (int32_t) h3;
+    h[4] = (int32_t) h4;
+    h[5] = (int32_t) h5;
+    h[6] = (int32_t) h6;
+    h[7] = (int32_t) h7;
+    h[8] = (int32_t) h8;
+    h[9] = (int32_t) h9;
+}
+
+/*
+ h = 2 * f * f
+ Can overlap h with f.
+ *
+ Preconditions:
+ |f| bounded by 1.65*2^26,1.65*2^25,1.65*2^26,1.65*2^25,etc.
+ *
+ Postconditions:
+ |h| bounded by 1.01*2^25,1.01*2^24,1.01*2^25,1.01*2^24,etc.
+ */
+
+static void
+fe25519_sq2(fe25519 h, const fe25519 f)
+{
+    int32_t f0 = f[0];
+    int32_t f1 = f[1];
+    int32_t f2 = f[2];
+    int32_t f3 = f[3];
+    int32_t f4 = f[4];
+    int32_t f5 = f[5];
+    int32_t f6 = f[6];
+    int32_t f7 = f[7];
+    int32_t f8 = f[8];
+    int32_t f9 = f[9];
+
+    int32_t f0_2  = 2 * f0;
+    int32_t f1_2  = 2 * f1;
+    int32_t f2_2  = 2 * f2;
+    int32_t f3_2  = 2 * f3;
+    int32_t f4_2  = 2 * f4;
+    int32_t f5_2  = 2 * f5;
+    int32_t f6_2  = 2 * f6;
+    int32_t f7_2  = 2 * f7;
+    int32_t f5_38 = 38 * f5; /* 1.959375*2^30 */
+    int32_t f6_19 = 19 * f6; /* 1.959375*2^30 */
+    int32_t f7_38 = 38 * f7; /* 1.959375*2^30 */
+    int32_t f8_19 = 19 * f8; /* 1.959375*2^30 */
+    int32_t f9_38 = 38 * f9; /* 1.959375*2^30 */
+
+    int64_t f0f0    = f0 * (int64_t) f0;
+    int64_t f0f1_2  = f0_2 * (int64_t) f1;
+    int64_t f0f2_2  = f0_2 * (int64_t) f2;
+    int64_t f0f3_2  = f0_2 * (int64_t) f3;
+    int64_t f0f4_2  = f0_2 * (int64_t) f4;
+    int64_t f0f5_2  = f0_2 * (int64_t) f5;
+    int64_t f0f6_2  = f0_2 * (int64_t) f6;
+    int64_t f0f7_2  = f0_2 * (int64_t) f7;
+    int64_t f0f8_2  = f0_2 * (int64_t) f8;
+    int64_t f0f9_2  = f0_2 * (int64_t) f9;
+    int64_t f1f1_2  = f1_2 * (int64_t) f1;
+    int64_t f1f2_2  = f1_2 * (int64_t) f2;
+    int64_t f1f3_4  = f1_2 * (int64_t) f3_2;
+    int64_t f1f4_2  = f1_2 * (int64_t) f4;
+    int64_t f1f5_4  = f1_2 * (int64_t) f5_2;
+    int64_t f1f6_2  = f1_2 * (int64_t) f6;
+    int64_t f1f7_4  = f1_2 * (int64_t) f7_2;
+    int64_t f1f8_2  = f1_2 * (int64_t) f8;
+    int64_t f1f9_76 = f1_2 * (int64_t) f9_38;
+    int64_t f2f2    = f2 * (int64_t) f2;
+    int64_t f2f3_2  = f2_2 * (int64_t) f3;
+    int64_t f2f4_2  = f2_2 * (int64_t) f4;
+    int64_t f2f5_2  = f2_2 * (int64_t) f5;
+    int64_t f2f6_2  = f2_2 * (int64_t) f6;
+    int64_t f2f7_2  = f2_2 * (int64_t) f7;
+    int64_t f2f8_38 = f2_2 * (int64_t) f8_19;
+    int64_t f2f9_38 = f2 * (int64_t) f9_38;
+    int64_t f3f3_2  = f3_2 * (int64_t) f3;
+    int64_t f3f4_2  = f3_2 * (int64_t) f4;
+    int64_t f3f5_4  = f3_2 * (int64_t) f5_2;
+    int64_t f3f6_2  = f3_2 * (int64_t) f6;
+    int64_t f3f7_76 = f3_2 * (int64_t) f7_38;
+    int64_t f3f8_38 = f3_2 * (int64_t) f8_19;
+    int64_t f3f9_76 = f3_2 * (int64_t) f9_38;
+    int64_t f4f4    = f4 * (int64_t) f4;
+    int64_t f4f5_2  = f4_2 * (int64_t) f5;
+    int64_t f4f6_38 = f4_2 * (int64_t) f6_19;
+    int64_t f4f7_38 = f4 * (int64_t) f7_38;
+    int64_t f4f8_38 = f4_2 * (int64_t) f8_19;
+    int64_t f4f9_38 = f4 * (int64_t) f9_38;
+    int64_t f5f5_38 = f5 * (int64_t) f5_38;
+    int64_t f5f6_38 = f5_2 * (int64_t) f6_19;
+    int64_t f5f7_76 = f5_2 * (int64_t) f7_38;
+    int64_t f5f8_38 = f5_2 * (int64_t) f8_19;
+    int64_t f5f9_76 = f5_2 * (int64_t) f9_38;
+    int64_t f6f6_19 = f6 * (int64_t) f6_19;
+    int64_t f6f7_38 = f6 * (int64_t) f7_38;
+    int64_t f6f8_38 = f6_2 * (int64_t) f8_19;
+    int64_t f6f9_38 = f6 * (int64_t) f9_38;
+    int64_t f7f7_38 = f7 * (int64_t) f7_38;
+    int64_t f7f8_38 = f7_2 * (int64_t) f8_19;
+    int64_t f7f9_76 = f7_2 * (int64_t) f9_38;
+    int64_t f8f8_19 = f8 * (int64_t) f8_19;
+    int64_t f8f9_38 = f8 * (int64_t) f9_38;
+    int64_t f9f9_38 = f9 * (int64_t) f9_38;
+
+    int64_t h0 = f0f0 + f1f9_76 + f2f8_38 + f3f7_76 + f4f6_38 + f5f5_38;
+    int64_t h1 = f0f1_2 + f2f9_38 + f3f8_38 + f4f7_38 + f5f6_38;
+    int64_t h2 = f0f2_2 + f1f1_2 + f3f9_76 + f4f8_38 + f5f7_76 + f6f6_19;
+    int64_t h3 = f0f3_2 + f1f2_2 + f4f9_38 + f5f8_38 + f6f7_38;
+    int64_t h4 = f0f4_2 + f1f3_4 + f2f2 + f5f9_76 + f6f8_38 + f7f7_38;
+    int64_t h5 = f0f5_2 + f1f4_2 + f2f3_2 + f6f9_38 + f7f8_38;
+    int64_t h6 = f0f6_2 + f1f5_4 + f2f4_2 + f3f3_2 + f7f9_76 + f8f8_19;
+    int64_t h7 = f0f7_2 + f1f6_2 + f2f5_2 + f3f4_2 + f8f9_38;
+    int64_t h8 = f0f8_2 + f1f7_4 + f2f6_2 + f3f5_4 + f4f4 + f9f9_38;
+    int64_t h9 = f0f9_2 + f1f8_2 + f2f7_2 + f3f6_2 + f4f5_2;
+
+    int64_t carry0;
+    int64_t carry1;
+    int64_t carry2;
+    int64_t carry3;
+    int64_t carry4;
+    int64_t carry5;
+    int64_t carry6;
+    int64_t carry7;
+    int64_t carry8;
+    int64_t carry9;
+
+    h0 += h0;
+    h1 += h1;
+    h2 += h2;
+    h3 += h3;
+    h4 += h4;
+    h5 += h5;
+    h6 += h6;
+    h7 += h7;
+    h8 += h8;
+    h9 += h9;
+
+    carry0 = (h0 + (int64_t)(1L << 25)) >> 26;
+    h1 += carry0;
+    h0 -= carry0 * ((uint64_t) 1L << 26);
+    carry4 = (h4 + (int64_t)(1L << 25)) >> 26;
+    h5 += carry4;
+    h4 -= carry4 * ((uint64_t) 1L << 26);
+
+    carry1 = (h1 + (int64_t)(1L << 24)) >> 25;
+    h2 += carry1;
+    h1 -= carry1 * ((uint64_t) 1L << 25);
+    carry5 = (h5 + (int64_t)(1L << 24)) >> 25;
+    h6 += carry5;
+    h5 -= carry5 * ((uint64_t) 1L << 25);
+
+    carry2 = (h2 + (int64_t)(1L << 25)) >> 26;
+    h3 += carry2;
+    h2 -= carry2 * ((uint64_t) 1L << 26);
+    carry6 = (h6 + (int64_t)(1L << 25)) >> 26;
+    h7 += carry6;
+    h6 -= carry6 * ((uint64_t) 1L << 26);
+
+    carry3 = (h3 + (int64_t)(1L << 24)) >> 25;
+    h4 += carry3;
+    h3 -= carry3 * ((uint64_t) 1L << 25);
+    carry7 = (h7 + (int64_t)(1L << 24)) >> 25;
+    h8 += carry7;
+    h7 -= carry7 * ((uint64_t) 1L << 25);
+
+    carry4 = (h4 + (int64_t)(1L << 25)) >> 26;
+    h5 += carry4;
+    h4 -= carry4 * ((uint64_t) 1L << 26);
+    carry8 = (h8 + (int64_t)(1L << 25)) >> 26;
+    h9 += carry8;
+    h8 -= carry8 * ((uint64_t) 1L << 26);
+
+    carry9 = (h9 + (int64_t)(1L << 24)) >> 25;
+    h0 += carry9 * 19;
+    h9 -= carry9 * ((uint64_t) 1L << 25);
+
+    carry0 = (h0 + (int64_t)(1L << 25)) >> 26;
+    h1 += carry0;
+    h0 -= carry0 * ((uint64_t) 1L << 26);
+
+    h[0] = (int32_t) h0;
+    h[1] = (int32_t) h1;
+    h[2] = (int32_t) h2;
+    h[3] = (int32_t) h3;
+    h[4] = (int32_t) h4;
+    h[5] = (int32_t) h5;
+    h[6] = (int32_t) h6;
+    h[7] = (int32_t) h7;
+    h[8] = (int32_t) h8;
+    h[9] = (int32_t) h9;
+}
+
+static void
+fe25519_scalar_product(fe25519 h, const fe25519 f, uint32_t n)
+{
+    int64_t sn = (int64_t) n;
+    int32_t f0 = f[0];
+    int32_t f1 = f[1];
+    int32_t f2 = f[2];
+    int32_t f3 = f[3];
+    int32_t f4 = f[4];
+    int32_t f5 = f[5];
+    int32_t f6 = f[6];
+    int32_t f7 = f[7];
+    int32_t f8 = f[8];
+    int32_t f9 = f[9];
+    int64_t h0 = f0 * sn;
+    int64_t h1 = f1 * sn;
+    int64_t h2 = f2 * sn;
+    int64_t h3 = f3 * sn;
+    int64_t h4 = f4 * sn;
+    int64_t h5 = f5 * sn;
+    int64_t h6 = f6 * sn;
+    int64_t h7 = f7 * sn;
+    int64_t h8 = f8 * sn;
+    int64_t h9 = f9 * sn;
+    int64_t carry0, carry1, carry2, carry3, carry4, carry5, carry6, carry7,
+            carry8, carry9;
+
+    carry9 = (h9 + ((int64_t) 1 << 24)) >> 25;
+    h0 += carry9 * 19;
+    h9 -= carry9 * ((int64_t) 1 << 25);
+    carry1 = (h1 + ((int64_t) 1 << 24)) >> 25;
+    h2 += carry1;
+    h1 -= carry1 * ((int64_t) 1 << 25);
+    carry3 = (h3 + ((int64_t) 1 << 24)) >> 25;
+    h4 += carry3;
+    h3 -= carry3 * ((int64_t) 1 << 25);
+    carry5 = (h5 + ((int64_t) 1 << 24)) >> 25;
+    h6 += carry5;
+    h5 -= carry5 * ((int64_t) 1 << 25);
+    carry7 = (h7 + ((int64_t) 1 << 24)) >> 25;
+    h8 += carry7;
+    h7 -= carry7 * ((int64_t) 1 << 25);
+
+    carry0 = (h0 + ((int64_t) 1 << 25)) >> 26;
+    h1 += carry0;
+    h0 -= carry0 * ((int64_t) 1 << 26);
+    carry2 = (h2 + ((int64_t) 1 << 25)) >> 26;
+    h3 += carry2;
+    h2 -= carry2 * ((int64_t) 1 << 26);
+    carry4 = (h4 + ((int64_t) 1 << 25)) >> 26;
+    h5 += carry4;
+    h4 -= carry4 * ((int64_t) 1 << 26);
+    carry6 = (h6 + ((int64_t) 1 << 25)) >> 26;
+    h7 += carry6;
+    h6 -= carry6 * ((int64_t) 1 << 26);
+    carry8 = (h8 + ((int64_t) 1 << 25)) >> 26;
+    h9 += carry8;
+    h8 -= carry8 * ((int64_t) 1 << 26);
+
+    h[0] = (int32_t) h0;
+    h[1] = (int32_t) h1;
+    h[2] = (int32_t) h2;
+    h[3] = (int32_t) h3;
+    h[4] = (int32_t) h4;
+    h[5] = (int32_t) h5;
+    h[6] = (int32_t) h6;
+    h[7] = (int32_t) h7;
+    h[8] = (int32_t) h8;
+    h[9] = (int32_t) h9;
+}
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/ed25519_ref10_fe_51.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/ed25519_ref10_fe_51.h
new file mode 100644
index 00000000000..3a30f30148a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/ed25519_ref10_fe_51.h
@@ -0,0 +1,518 @@
+#include <string.h>
+
+#include "private/common.h"
+#include "utils.h"
+
+/*
+ h = 0
+ */
+
+static inline void
+fe25519_0(fe25519 h)
+{
+    memset(&h[0], 0, 5 * sizeof h[0]);
+}
+
+/*
+ h = 1
+ */
+
+static inline void
+fe25519_1(fe25519 h)
+{
+    h[0] = 1;
+    memset(&h[1], 0, 4 * sizeof h[0]);
+}
+
+/*
+ h = f + g
+ Can overlap h with f or g.
+ */
+
+static inline void
+fe25519_add(fe25519 h, const fe25519 f, const fe25519 g)
+{
+    uint64_t h0 = f[0] + g[0];
+    uint64_t h1 = f[1] + g[1];
+    uint64_t h2 = f[2] + g[2];
+    uint64_t h3 = f[3] + g[3];
+    uint64_t h4 = f[4] + g[4];
+
+    h[0] = h0;
+    h[1] = h1;
+    h[2] = h2;
+    h[3] = h3;
+    h[4] = h4;
+}
+
+/*
+ h = f - g
+ */
+
+static void
+fe25519_sub(fe25519 h, const fe25519 f, const fe25519 g)
+{
+    const uint64_t mask = 0x7ffffffffffffULL;
+    uint64_t h0, h1, h2, h3, h4;
+
+    h0 = g[0];
+    h1 = g[1];
+    h2 = g[2];
+    h3 = g[3];
+    h4 = g[4];
+
+    h1 += h0 >> 51;
+    h0 &= mask;
+    h2 += h1 >> 51;
+    h1 &= mask;
+    h3 += h2 >> 51;
+    h2 &= mask;
+    h4 += h3 >> 51;
+    h3 &= mask;
+    h0 += 19ULL * (h4 >> 51);
+    h4 &= mask;
+
+    h0 = (f[0] + 0xfffffffffffdaULL) - h0;
+    h1 = (f[1] + 0xffffffffffffeULL) - h1;
+    h2 = (f[2] + 0xffffffffffffeULL) - h2;
+    h3 = (f[3] + 0xffffffffffffeULL) - h3;
+    h4 = (f[4] + 0xffffffffffffeULL) - h4;
+
+    h[0] = h0;
+    h[1] = h1;
+    h[2] = h2;
+    h[3] = h3;
+    h[4] = h4;
+}
+
+/*
+ h = -f
+ */
+
+static inline void
+fe25519_neg(fe25519 h, const fe25519 f)
+{
+    fe25519 zero;
+
+    fe25519_0(zero);
+    fe25519_sub(h, zero, f);
+}
+
+/*
+ Replace (f,g) with (g,g) if b == 1;
+ replace (f,g) with (f,g) if b == 0.
+ *
+ Preconditions: b in {0,1}.
+ */
+
+static void
+fe25519_cmov(fe25519 f, const fe25519 g, unsigned int b)
+{
+    const uint64_t mask = (uint64_t) (-(int64_t) b);
+
+    uint64_t f0 = f[0];
+    uint64_t f1 = f[1];
+    uint64_t f2 = f[2];
+    uint64_t f3 = f[3];
+    uint64_t f4 = f[4];
+
+    uint64_t x0 = f0 ^ g[0];
+    uint64_t x1 = f1 ^ g[1];
+    uint64_t x2 = f2 ^ g[2];
+    uint64_t x3 = f3 ^ g[3];
+    uint64_t x4 = f4 ^ g[4];
+
+    x0 &= mask;
+    x1 &= mask;
+    x2 &= mask;
+    x3 &= mask;
+    x4 &= mask;
+
+    f[0] = f0 ^ x0;
+    f[1] = f1 ^ x1;
+    f[2] = f2 ^ x2;
+    f[3] = f3 ^ x3;
+    f[4] = f4 ^ x4;
+}
+
+/*
+Replace (f,g) with (g,f) if b == 1;
+replace (f,g) with (f,g) if b == 0.
+
+Preconditions: b in {0,1}.
+*/
+
+static void
+fe25519_cswap(fe25519 f, fe25519 g, unsigned int b)
+{
+    const uint64_t mask = (uint64_t) (-(int64_t) b);
+
+    uint64_t f0 = f[0];
+    uint64_t f1 = f[1];
+    uint64_t f2 = f[2];
+    uint64_t f3 = f[3];
+    uint64_t f4 = f[4];
+
+    uint64_t g0 = g[0];
+    uint64_t g1 = g[1];
+    uint64_t g2 = g[2];
+    uint64_t g3 = g[3];
+    uint64_t g4 = g[4];
+
+    uint64_t x0 = f0 ^ g0;
+    uint64_t x1 = f1 ^ g1;
+    uint64_t x2 = f2 ^ g2;
+    uint64_t x3 = f3 ^ g3;
+    uint64_t x4 = f4 ^ g4;
+
+    x0 &= mask;
+    x1 &= mask;
+    x2 &= mask;
+    x3 &= mask;
+    x4 &= mask;
+
+    f[0] = f0 ^ x0;
+    f[1] = f1 ^ x1;
+    f[2] = f2 ^ x2;
+    f[3] = f3 ^ x3;
+    f[4] = f4 ^ x4;
+
+    g[0] = g0 ^ x0;
+    g[1] = g1 ^ x1;
+    g[2] = g2 ^ x2;
+    g[3] = g3 ^ x3;
+    g[4] = g4 ^ x4;
+}
+
+/*
+ h = f
+ */
+
+static inline void
+fe25519_copy(fe25519 h, const fe25519 f)
+{
+    uint64_t f0 = f[0];
+    uint64_t f1 = f[1];
+    uint64_t f2 = f[2];
+    uint64_t f3 = f[3];
+    uint64_t f4 = f[4];
+
+    h[0] = f0;
+    h[1] = f1;
+    h[2] = f2;
+    h[3] = f3;
+    h[4] = f4;
+}
+
+/*
+ return 1 if f is in {1,3,5,...,q-2}
+ return 0 if f is in {0,2,4,...,q-1}
+ */
+
+static inline int
+fe25519_isnegative(const fe25519 f)
+{
+    unsigned char s[32];
+
+    fe25519_tobytes(s, f);
+
+    return s[0] & 1;
+}
+
+/*
+ return 1 if f == 0
+ return 0 if f != 0
+ */
+
+static inline int
+fe25519_iszero(const fe25519 f)
+{
+    unsigned char s[32];
+
+    fe25519_tobytes(s, f);
+
+    return sodium_is_zero(s, 32);
+}
+
+/*
+ h = f * g
+ Can overlap h with f or g.
+ */
+
+static void
+fe25519_mul(fe25519 h, const fe25519 f, const fe25519 g)
+{
+    const uint64_t mask = 0x7ffffffffffffULL;
+    uint128_t r0, r1, r2, r3, r4, carry;
+    uint64_t  f0, f1, f2, f3, f4;
+    uint64_t  f1_19, f2_19, f3_19, f4_19;
+    uint64_t  g0, g1, g2, g3, g4;
+    uint64_t  r00, r01, r02, r03, r04;
+
+    f0 = f[0];
+    f1 = f[1];
+    f2 = f[2];
+    f3 = f[3];
+    f4 = f[4];
+
+    g0 = g[0];
+    g1 = g[1];
+    g2 = g[2];
+    g3 = g[3];
+    g4 = g[4];
+
+    f1_19 = 19ULL * f1;
+    f2_19 = 19ULL * f2;
+    f3_19 = 19ULL * f3;
+    f4_19 = 19ULL * f4;
+
+    r0  = ((uint128_t) f0   ) * ((uint128_t) g0);
+    r0 += ((uint128_t) f1_19) * ((uint128_t) g4);
+    r0 += ((uint128_t) f2_19) * ((uint128_t) g3);
+    r0 += ((uint128_t) f3_19) * ((uint128_t) g2);
+    r0 += ((uint128_t) f4_19) * ((uint128_t) g1);
+
+    r1  = ((uint128_t) f0   ) * ((uint128_t) g1);
+    r1 += ((uint128_t) f1   ) * ((uint128_t) g0);
+    r1 += ((uint128_t) f2_19) * ((uint128_t) g4);
+    r1 += ((uint128_t) f3_19) * ((uint128_t) g3);
+    r1 += ((uint128_t) f4_19) * ((uint128_t) g2);
+
+    r2  = ((uint128_t) f0   ) * ((uint128_t) g2);
+    r2 += ((uint128_t) f1   ) * ((uint128_t) g1);
+    r2 += ((uint128_t) f2   ) * ((uint128_t) g0);
+    r2 += ((uint128_t) f3_19) * ((uint128_t) g4);
+    r2 += ((uint128_t) f4_19) * ((uint128_t) g3);
+
+    r3  = ((uint128_t) f0   ) * ((uint128_t) g3);
+    r3 += ((uint128_t) f1   ) * ((uint128_t) g2);
+    r3 += ((uint128_t) f2   ) * ((uint128_t) g1);
+    r3 += ((uint128_t) f3   ) * ((uint128_t) g0);
+    r3 += ((uint128_t) f4_19) * ((uint128_t) g4);
+
+    r4  = ((uint128_t) f0   ) * ((uint128_t) g4);
+    r4 += ((uint128_t) f1   ) * ((uint128_t) g3);
+    r4 += ((uint128_t) f2   ) * ((uint128_t) g2);
+    r4 += ((uint128_t) f3   ) * ((uint128_t) g1);
+    r4 += ((uint128_t) f4   ) * ((uint128_t) g0);
+
+    r00    = ((uint64_t) r0) & mask;
+    carry  = r0 >> 51;
+    r1    += carry;
+    r01    = ((uint64_t) r1) & mask;
+    carry  = r1 >> 51;
+    r2    += carry;
+    r02    = ((uint64_t) r2) & mask;
+    carry  = r2 >> 51;
+    r3    += carry;
+    r03    = ((uint64_t) r3) & mask;
+    carry  = r3 >> 51;
+    r4    += carry;
+    r04    = ((uint64_t) r4) & mask;
+    carry  = r4 >> 51;
+    r00   += 19ULL * (uint64_t) carry;
+    carry  = r00 >> 51;
+    r00   &= mask;
+    r01   += (uint64_t) carry;
+    carry  = r01 >> 51;
+    r01   &= mask;
+    r02   += (uint64_t) carry;
+
+    h[0] = r00;
+    h[1] = r01;
+    h[2] = r02;
+    h[3] = r03;
+    h[4] = r04;
+}
+
+/*
+ h = f * f
+ Can overlap h with f.
+ */
+
+static void
+fe25519_sq(fe25519 h, const fe25519 f)
+{
+    const uint64_t mask = 0x7ffffffffffffULL;
+    uint128_t r0, r1, r2, r3, r4, carry;
+    uint64_t  f0, f1, f2, f3, f4;
+    uint64_t  f0_2, f1_2, f1_38, f2_38, f3_38, f3_19, f4_19;
+    uint64_t  r00, r01, r02, r03, r04;
+
+    f0 = f[0];
+    f1 = f[1];
+    f2 = f[2];
+    f3 = f[3];
+    f4 = f[4];
+
+    f0_2 = f0 << 1;
+    f1_2 = f1 << 1;
+
+    f1_38 = 38ULL * f1;
+    f2_38 = 38ULL * f2;
+    f3_38 = 38ULL * f3;
+
+    f3_19 = 19ULL * f3;
+    f4_19 = 19ULL * f4;
+
+    r0  = ((uint128_t) f0   ) * ((uint128_t) f0);
+    r0 += ((uint128_t) f1_38) * ((uint128_t) f4);
+    r0 += ((uint128_t) f2_38) * ((uint128_t) f3);
+
+    r1  = ((uint128_t) f0_2 ) * ((uint128_t) f1);
+    r1 += ((uint128_t) f2_38) * ((uint128_t) f4);
+    r1 += ((uint128_t) f3_19) * ((uint128_t) f3);
+
+    r2  = ((uint128_t) f0_2 ) * ((uint128_t) f2);
+    r2 += ((uint128_t) f1   ) * ((uint128_t) f1);
+    r2 += ((uint128_t) f3_38) * ((uint128_t) f4);
+
+    r3  = ((uint128_t) f0_2 ) * ((uint128_t) f3);
+    r3 += ((uint128_t) f1_2 ) * ((uint128_t) f2);
+    r3 += ((uint128_t) f4_19) * ((uint128_t) f4);
+
+    r4  = ((uint128_t) f0_2 ) * ((uint128_t) f4);
+    r4 += ((uint128_t) f1_2 ) * ((uint128_t) f3);
+    r4 += ((uint128_t) f2   ) * ((uint128_t) f2);
+
+    r00    = ((uint64_t) r0) & mask;
+    carry  = r0 >> 51;
+    r1    += carry;
+    r01    = ((uint64_t) r1) & mask;
+    carry  = r1 >> 51;
+    r2    += carry;
+    r02    = ((uint64_t) r2) & mask;
+    carry  = r2 >> 51;
+    r3    += carry;
+    r03    = ((uint64_t) r3) & mask;
+    carry  = r3 >> 51;
+    r4    += carry;
+    r04    = ((uint64_t) r4) & mask;
+    carry  = r4 >> 51;
+    r00   += 19ULL * (uint64_t) carry;
+    carry  = r00 >> 51;
+    r00   &= mask;
+    r01   += (uint64_t) carry;
+    carry  = r01 >> 51;
+    r01   &= mask;
+    r02   += (uint64_t) carry;
+
+    h[0] = r00;
+    h[1] = r01;
+    h[2] = r02;
+    h[3] = r03;
+    h[4] = r04;
+}
+
+/*
+ h = 2 * f * f
+ Can overlap h with f.
+*/
+
+static void
+fe25519_sq2(fe25519 h, const fe25519 f)
+{
+    const uint64_t mask = 0x7ffffffffffffULL;
+    uint128_t r0, r1, r2, r3, r4, carry;
+    uint64_t  f0, f1, f2, f3, f4;
+    uint64_t  f0_2, f1_2, f1_38, f2_38, f3_38, f3_19, f4_19;
+    uint64_t  r00, r01, r02, r03, r04;
+
+    f0 = f[0];
+    f1 = f[1];
+    f2 = f[2];
+    f3 = f[3];
+    f4 = f[4];
+
+    f0_2 = f0 << 1;
+    f1_2 = f1 << 1;
+
+    f1_38 = 38ULL * f1;
+    f2_38 = 38ULL * f2;
+    f3_38 = 38ULL * f3;
+
+    f3_19 = 19ULL * f3;
+    f4_19 = 19ULL * f4;
+
+    r0  = ((uint128_t) f0   ) * ((uint128_t) f0);
+    r0 += ((uint128_t) f1_38) * ((uint128_t) f4);
+    r0 += ((uint128_t) f2_38) * ((uint128_t) f3);
+
+    r1  = ((uint128_t) f0_2 ) * ((uint128_t) f1);
+    r1 += ((uint128_t) f2_38) * ((uint128_t) f4);
+    r1 += ((uint128_t) f3_19) * ((uint128_t) f3);
+
+    r2  = ((uint128_t) f0_2 ) * ((uint128_t) f2);
+    r2 += ((uint128_t) f1   ) * ((uint128_t) f1);
+    r2 += ((uint128_t) f3_38) * ((uint128_t) f4);
+
+    r3  = ((uint128_t) f0_2 ) * ((uint128_t) f3);
+    r3 += ((uint128_t) f1_2 ) * ((uint128_t) f2);
+    r3 += ((uint128_t) f4_19) * ((uint128_t) f4);
+
+    r4  = ((uint128_t) f0_2 ) * ((uint128_t) f4);
+    r4 += ((uint128_t) f1_2 ) * ((uint128_t) f3);
+    r4 += ((uint128_t) f2   ) * ((uint128_t) f2);
+
+    r0 <<= 1;
+    r1 <<= 1;
+    r2 <<= 1;
+    r3 <<= 1;
+    r4 <<= 1;
+
+    r00    = ((uint64_t) r0) & mask;
+    carry  = r0 >> 51;
+    r1    += carry;
+    r01    = ((uint64_t) r1) & mask;
+    carry  = r1 >> 51;
+    r2    += carry;
+    r02    = ((uint64_t) r2) & mask;
+    carry  = r2 >> 51;
+    r3    += carry;
+    r03    = ((uint64_t) r3) & mask;
+    carry  = r3 >> 51;
+    r4    += carry;
+    r04    = ((uint64_t) r4) & mask;
+    carry  = r4 >> 51;
+    r00   += 19ULL * (uint64_t) carry;
+    carry  = r00 >> 51;
+    r00   &= mask;
+    r01   += (uint64_t) carry;
+    carry  = r01 >> 51;
+    r01   &= mask;
+    r02   += (uint64_t) carry;
+
+    h[0] = r00;
+    h[1] = r01;
+    h[2] = r02;
+    h[3] = r03;
+    h[4] = r04;
+}
+
+static void
+fe25519_scalar_product(fe25519 h, const fe25519 f, uint32_t n)
+{
+    const uint64_t mask = 0x7ffffffffffffULL;
+    uint128_t a;
+    uint128_t sn = (uint128_t) n;
+    uint64_t  h0, h1, h2, h3, h4;
+
+    a  = f[0] * sn;
+    h0 = ((uint64_t) a) & mask;
+    a  = f[1] * sn + ((uint64_t) (a >> 51));
+    h1 = ((uint64_t) a) & mask;
+    a  = f[2] * sn + ((uint64_t) (a >> 51));
+    h2 = ((uint64_t) a) & mask;
+    a  = f[3] * sn + ((uint64_t) (a >> 51));
+    h3 = ((uint64_t) a) & mask;
+    a  = f[4] * sn + ((uint64_t) (a >> 51));
+    h4 = ((uint64_t) a) & mask;
+
+    h0 += (a >> 51) * 19ULL;
+
+    h[0] = h0;
+    h[1] = h1;
+    h[2] = h2;
+    h[3] = h3;
+    h[4] = h4;
+}
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/implementations.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/implementations.h
new file mode 100644
index 00000000000..c7237f851de
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/implementations.h
@@ -0,0 +1,11 @@
+#ifndef implementations_H
+#define implementations_H
+
+int _crypto_generichash_blake2b_pick_best_implementation(void);
+int _crypto_onetimeauth_poly1305_pick_best_implementation(void);
+int _crypto_pwhash_argon2_pick_best_implementation(void);
+int _crypto_scalarmult_curve25519_pick_best_implementation(void);
+int _crypto_stream_chacha20_pick_best_implementation(void);
+int _crypto_stream_salsa20_pick_best_implementation(void);
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/mutex.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/mutex.h
new file mode 100644
index 00000000000..322b6742b26
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/mutex.h
@@ -0,0 +1,7 @@
+#ifndef mutex_H
+#define mutex_H 1
+
+extern int sodium_crit_enter(void);
+extern int sodium_crit_leave(void);
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/sse2_64_32.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/sse2_64_32.h
new file mode 100644
index 00000000000..d0455b41b49
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/private/sse2_64_32.h
@@ -0,0 +1,50 @@
+#ifndef sse2_64_32_H
+#define sse2_64_32_H 1
+
+#include "common.h"
+
+#ifdef HAVE_INTRIN_H
+# include <intrin.h>
+#endif
+
+#if defined(HAVE_EMMINTRIN_H) && \
+    !(defined(__amd64) || defined(__amd64__) || defined(__x86_64__) || \
+      defined(_M_X64) || defined(_M_AMD64))
+
+# include <emmintrin.h>
+# include <stdint.h>
+
+# ifndef _mm_set_epi64x
+#  define _mm_set_epi64x(Q0, Q1) sodium__mm_set_epi64x((Q0), (Q1))
+static inline __m128i
+sodium__mm_set_epi64x(int64_t q1, int64_t q0)
+{
+    union { int64_t as64; int32_t as32[2]; } x0, x1;
+    x0.as64 = q0; x1.as64 = q1;
+    return _mm_set_epi32(x1.as32[1], x1.as32[0], x0.as32[1], x0.as32[0]);
+}
+# endif
+
+# ifndef _mm_set1_epi64x
+#  define _mm_set1_epi64x(Q) sodium__mm_set1_epi64x(Q)
+static inline __m128i
+sodium__mm_set1_epi64x(int64_t q)
+{
+    return _mm_set_epi64x(q, q);
+}
+# endif
+
+# ifndef _mm_cvtsi64_si128
+#  define _mm_cvtsi64_si128(Q) sodium__mm_cvtsi64_si128(Q)
+static inline __m128i
+sodium__mm_cvtsi64_si128(int64_t q)
+{
+    union { int64_t as64; int32_t as32[2]; } x;
+    x.as64 = q;
+    return _mm_setr_epi32(x.as32[0], x.as32[1], 0, 0);
+}
+# endif
+
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/randombytes.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/randombytes.h
new file mode 100644
index 00000000000..a03cc657204
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/randombytes.h
@@ -0,0 +1,72 @@
+
+#ifndef randombytes_H
+#define randombytes_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include <sys/types.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+# ifdef __GNUC__
+#  pragma GCC diagnostic ignored "-Wlong-long"
+# endif
+extern "C" {
+#endif
+
+typedef struct randombytes_implementation {
+    const char *(*implementation_name)(void); /* required */
+    uint32_t    (*random)(void);              /* required */
+    void        (*stir)(void);                /* optional */
+    uint32_t    (*uniform)(const uint32_t upper_bound); /* optional, a default implementation will be used if NULL */
+    void        (*buf)(void * const buf, const size_t size); /* required */
+    int         (*close)(void);               /* optional */
+} randombytes_implementation;
+
+#define randombytes_BYTES_MAX SODIUM_MIN(SODIUM_SIZE_MAX, 0xffffffffUL)
+
+#define randombytes_SEEDBYTES 32U
+SODIUM_EXPORT
+size_t randombytes_seedbytes(void);
+
+SODIUM_EXPORT
+void randombytes_buf(void * const buf, const size_t size)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+void randombytes_buf_deterministic(void * const buf, const size_t size,
+                                   const unsigned char seed[randombytes_SEEDBYTES])
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+uint32_t randombytes_random(void);
+
+SODIUM_EXPORT
+uint32_t randombytes_uniform(const uint32_t upper_bound);
+
+SODIUM_EXPORT
+void randombytes_stir(void);
+
+SODIUM_EXPORT
+int randombytes_close(void);
+
+SODIUM_EXPORT
+int randombytes_set_implementation(randombytes_implementation *impl)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+const char *randombytes_implementation_name(void);
+
+/* -- NaCl compatibility interface -- */
+
+SODIUM_EXPORT
+void randombytes(unsigned char * const buf, const unsigned long long buf_len)
+            __attribute__ ((nonnull));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/randombytes_internal_random.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/randombytes_internal_random.h
new file mode 100644
index 00000000000..2b2b7d6edc1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/randombytes_internal_random.h
@@ -0,0 +1,22 @@
+
+#ifndef randombytes_internal_random_H
+#define randombytes_internal_random_H
+
+#include "export.h"
+#include "randombytes.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+SODIUM_EXPORT
+extern struct randombytes_implementation randombytes_internal_implementation;
+
+/* Backwards compatibility with libsodium < 1.0.18 */
+#define randombytes_salsa20_implementation randombytes_internal_implementation
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/randombytes_sysrandom.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/randombytes_sysrandom.h
new file mode 100644
index 00000000000..9e27b674c79
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/randombytes_sysrandom.h
@@ -0,0 +1,19 @@
+
+#ifndef randombytes_sysrandom_H
+#define randombytes_sysrandom_H
+
+#include "export.h"
+#include "randombytes.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+SODIUM_EXPORT
+extern struct randombytes_implementation randombytes_sysrandom_implementation;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/runtime.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/runtime.h
new file mode 100644
index 00000000000..7f15d58e7c5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/runtime.h
@@ -0,0 +1,52 @@
+
+#ifndef sodium_runtime_H
+#define sodium_runtime_H
+
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+SODIUM_EXPORT_WEAK
+int sodium_runtime_has_neon(void);
+
+SODIUM_EXPORT_WEAK
+int sodium_runtime_has_sse2(void);
+
+SODIUM_EXPORT_WEAK
+int sodium_runtime_has_sse3(void);
+
+SODIUM_EXPORT_WEAK
+int sodium_runtime_has_ssse3(void);
+
+SODIUM_EXPORT_WEAK
+int sodium_runtime_has_sse41(void);
+
+SODIUM_EXPORT_WEAK
+int sodium_runtime_has_avx(void);
+
+SODIUM_EXPORT_WEAK
+int sodium_runtime_has_avx2(void);
+
+SODIUM_EXPORT_WEAK
+int sodium_runtime_has_avx512f(void);
+
+SODIUM_EXPORT_WEAK
+int sodium_runtime_has_pclmul(void);
+
+SODIUM_EXPORT_WEAK
+int sodium_runtime_has_aesni(void);
+
+SODIUM_EXPORT_WEAK
+int sodium_runtime_has_rdrand(void);
+
+/* ------------------------------------------------------------------------- */
+
+int _sodium_runtime_get_cpu_features(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/utils.h b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/utils.h
new file mode 100644
index 00000000000..ac801512919
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/libsodium/src/libsodium/include/sodium/utils.h
@@ -0,0 +1,179 @@
+
+#ifndef sodium_utils_H
+#define sodium_utils_H
+
+#include <stddef.h>
+
+#include "export.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef SODIUM_C99
+# if defined(__cplusplus) || !defined(__STDC_VERSION__) || __STDC_VERSION__ < 199901L
+#  define SODIUM_C99(X)
+# else
+#  define SODIUM_C99(X) X
+# endif
+#endif
+
+SODIUM_EXPORT
+void sodium_memzero(void * const pnt, const size_t len);
+
+SODIUM_EXPORT
+void sodium_stackzero(const size_t len);
+
+/*
+ * WARNING: sodium_memcmp() must be used to verify if two secret keys
+ * are equal, in constant time.
+ * It returns 0 if the keys are equal, and -1 if they differ.
+ * This function is not designed for lexicographical comparisons.
+ */
+SODIUM_EXPORT
+int sodium_memcmp(const void * const b1_, const void * const b2_, size_t len)
+            __attribute__ ((warn_unused_result));
+
+/*
+ * sodium_compare() returns -1 if b1_ < b2_, 1 if b1_ > b2_ and 0 if b1_ == b2_
+ * It is suitable for lexicographical comparisons, or to compare nonces
+ * and counters stored in little-endian format.
+ * However, it is slower than sodium_memcmp().
+ */
+SODIUM_EXPORT
+int sodium_compare(const unsigned char *b1_, const unsigned char *b2_,
+                   size_t len) __attribute__ ((warn_unused_result));
+
+SODIUM_EXPORT
+int sodium_is_zero(const unsigned char *n, const size_t nlen);
+
+SODIUM_EXPORT
+void sodium_increment(unsigned char *n, const size_t nlen);
+
+SODIUM_EXPORT
+void sodium_add(unsigned char *a, const unsigned char *b, const size_t len);
+
+SODIUM_EXPORT
+void sodium_sub(unsigned char *a, const unsigned char *b, const size_t len);
+
+SODIUM_EXPORT
+char *sodium_bin2hex(char * const hex, const size_t hex_maxlen,
+                     const unsigned char * const bin, const size_t bin_len)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int sodium_hex2bin(unsigned char * const bin, const size_t bin_maxlen,
+                   const char * const hex, const size_t hex_len,
+                   const char * const ignore, size_t * const bin_len,
+                   const char ** const hex_end)
+            __attribute__ ((nonnull(1)));
+
+#define sodium_base64_VARIANT_ORIGINAL            1
+#define sodium_base64_VARIANT_ORIGINAL_NO_PADDING 3
+#define sodium_base64_VARIANT_URLSAFE             5
+#define sodium_base64_VARIANT_URLSAFE_NO_PADDING  7
+
+/*
+ * Computes the required length to encode BIN_LEN bytes as a base64 string
+ * using the given variant. The computed length includes a trailing \0.
+ */
+#define sodium_base64_ENCODED_LEN(BIN_LEN, VARIANT) \
+    (((BIN_LEN) / 3U) * 4U + \
+    ((((BIN_LEN) - ((BIN_LEN) / 3U) * 3U) | (((BIN_LEN) - ((BIN_LEN) / 3U) * 3U) >> 1)) & 1U) * \
+     (4U - (~((((VARIANT) & 2U) >> 1) - 1U) & (3U - ((BIN_LEN) - ((BIN_LEN) / 3U) * 3U)))) + 1U)
+
+SODIUM_EXPORT
+size_t sodium_base64_encoded_len(const size_t bin_len, const int variant);
+
+SODIUM_EXPORT
+char *sodium_bin2base64(char * const b64, const size_t b64_maxlen,
+                        const unsigned char * const bin, const size_t bin_len,
+                        const int variant) __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int sodium_base642bin(unsigned char * const bin, const size_t bin_maxlen,
+                      const char * const b64, const size_t b64_len,
+                      const char * const ignore, size_t * const bin_len,
+                      const char ** const b64_end, const int variant)
+            __attribute__ ((nonnull(1)));
+
+SODIUM_EXPORT
+int sodium_mlock(void * const addr, const size_t len)
+            __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int sodium_munlock(void * const addr, const size_t len)
+            __attribute__ ((nonnull));
+
+/* WARNING: sodium_malloc() and sodium_allocarray() are not general-purpose
+ * allocation functions.
+ *
+ * They return a pointer to a region filled with 0xd0 bytes, immediately
+ * followed by a guard page.
+ * As a result, accessing a single byte after the requested allocation size
+ * will intentionally trigger a segmentation fault.
+ *
+ * A canary and an additional guard page placed before the beginning of the
+ * region may also kill the process if a buffer underflow is detected.
+ *
+ * The memory layout is:
+ * [unprotected region size (read only)][guard page (no access)][unprotected pages (read/write)][guard page (no access)]
+ * With the layout of the unprotected pages being:
+ * [optional padding][16-bytes canary][user region]
+ *
+ * However:
+ * - These functions are significantly slower than standard functions
+ * - Each allocation requires 3 or 4 additional pages
+ * - The returned address will not be aligned if the allocation size is not
+ *   a multiple of the required alignment. For this reason, these functions
+ *   are designed to store data, such as secret keys and messages.
+ *
+ * sodium_malloc() can be used to allocate any libsodium data structure.
+ *
+ * The crypto_generichash_state structure is packed and its length is
+ * either 357 or 361 bytes. For this reason, when using sodium_malloc() to
+ * allocate a crypto_generichash_state structure, padding must be added in
+ * order to ensure proper alignment. crypto_generichash_statebytes()
+ * returns the rounded up structure size, and should be prefered to sizeof():
+ * state = sodium_malloc(crypto_generichash_statebytes());
+ */
+
+SODIUM_EXPORT
+void *sodium_malloc(const size_t size)
+            __attribute__ ((malloc));
+
+SODIUM_EXPORT
+void *sodium_allocarray(size_t count, size_t size)
+            __attribute__ ((malloc));
+
+SODIUM_EXPORT
+void sodium_free(void *ptr);
+
+SODIUM_EXPORT
+int sodium_mprotect_noaccess(void *ptr) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int sodium_mprotect_readonly(void *ptr) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int sodium_mprotect_readwrite(void *ptr) __attribute__ ((nonnull));
+
+SODIUM_EXPORT
+int sodium_pad(size_t *padded_buflen_p, unsigned char *buf,
+               size_t unpadded_buflen, size_t blocksize, size_t max_buflen)
+            __attribute__ ((nonnull(2)));
+
+SODIUM_EXPORT
+int sodium_unpad(size_t *unpadded_buflen_p, const unsigned char *buf,
+                 size_t padded_buflen, size_t blocksize)
+            __attribute__ ((nonnull(2)));
+
+/* -------- */
+
+int _sodium_alloc_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/libsodium/port_include/sodium/version.h b/tools/sdk/esp32s3/include/libsodium/port_include/sodium/version.h
new file mode 100644
index 00000000000..820996409e2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/libsodium/port_include/sodium/version.h
@@ -0,0 +1,40 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef sodium_version_H
+#define sodium_version_H
+
+#include <sodium/export.h>
+
+/* IMPORTANT: As we don't use autotools, these version are not automatically
+   updated if we change submodules. They need to be changed manually.
+*/
+
+#define SODIUM_VERSION_STRING "1.0.12-idf"
+
+/* Note: these are not the same as the overall version, see
+   configure.ac for the relevant macros */
+#define SODIUM_LIBRARY_VERSION_MAJOR 9
+#define SODIUM_LIBRARY_VERSION_MINOR 4
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+SODIUM_EXPORT
+const char *sodium_version_string(void);
+
+SODIUM_EXPORT
+int         sodium_library_version_major(void);
+
+SODIUM_EXPORT
+int         sodium_library_version_minor(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/log/include/esp_log.h b/tools/sdk/esp32s3/include/log/include/esp_log.h
new file mode 100644
index 00000000000..0e3148f62dc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/log/include/esp_log.h
@@ -0,0 +1,506 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __ESP_LOG_H__
+#define __ESP_LOG_H__
+
+#include <stdint.h>
+#include <stdarg.h>
+#include "sdkconfig.h"
+#include "esp_rom_sys.h"
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/ets_sys.h" // will be removed in idf v5.0
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/ets_sys.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/ets_sys.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/ets_sys.h"
+#elif CONFIG_IDF_TARGET_ESP32H2
+#include "esp32h2/rom/ets_sys.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Log level
+ *
+ */
+typedef enum {
+    ESP_LOG_NONE,       /*!< No log output */
+    ESP_LOG_ERROR,      /*!< Critical errors, software module can not recover on its own */
+    ESP_LOG_WARN,       /*!< Error conditions from which recovery measures have been taken */
+    ESP_LOG_INFO,       /*!< Information messages which describe normal flow of events */
+    ESP_LOG_DEBUG,      /*!< Extra information which is not necessary for normal use (values, pointers, sizes, etc). */
+    ESP_LOG_VERBOSE     /*!< Bigger chunks of debugging information, or frequent messages which can potentially flood the output. */
+} esp_log_level_t;
+
+typedef int (*vprintf_like_t)(const char *, va_list);
+
+/**
+ * @brief Default log level
+ *
+ * This is used by the definition of ESP_EARLY_LOGx macros. It is not
+ * recommended to set this directly, call esp_log_level_set("*", level)
+ * instead.
+ */
+extern esp_log_level_t esp_log_default_level;
+
+/**
+ * @brief Set log level for given tag
+ *
+ * If logging for given component has already been enabled, changes previous setting.
+ *
+ * Note that this function can not raise log level above the level set using
+ * CONFIG_LOG_MAXIMUM_LEVEL setting in menuconfig.
+ *
+ * To raise log level above the default one for a given file, define
+ * LOG_LOCAL_LEVEL to one of the ESP_LOG_* values, before including
+ * esp_log.h in this file.
+ *
+ * @param tag Tag of the log entries to enable. Must be a non-NULL zero terminated string.
+ *            Value "*" resets log level for all tags to the given value.
+ *
+ * @param level  Selects log level to enable. Only logs at this and lower verbosity
+ * levels will be shown.
+ */
+void esp_log_level_set(const char* tag, esp_log_level_t level);
+
+/**
+ * @brief Get log level for given tag, can be used to avoid expensive log statements
+ *
+ * @param tag Tag of the log to query current level. Must be a non-NULL zero terminated
+ *            string.
+ *
+ * @return The current log level for the given tag
+ */
+esp_log_level_t esp_log_level_get(const char* tag);
+
+/**
+ * @brief Set function used to output log entries
+ *
+ * By default, log output goes to UART0. This function can be used to redirect log
+ * output to some other destination, such as file or network. Returns the original
+ * log handler, which may be necessary to return output to the previous destination.
+ *
+ * @note Please note that function callback here must be re-entrant as it can be
+ * invoked in parallel from multiple thread context.
+ *
+ * @param func new Function used for output. Must have same signature as vprintf.
+ *
+ * @return func old Function used for output.
+ */
+vprintf_like_t esp_log_set_vprintf(vprintf_like_t func);
+
+/**
+ * @brief Function which returns timestamp to be used in log output
+ *
+ * This function is used in expansion of ESP_LOGx macros.
+ * In the 2nd stage bootloader, and at early application startup stage
+ * this function uses CPU cycle counter as time source. Later when
+ * FreeRTOS scheduler start running, it switches to FreeRTOS tick count.
+ *
+ * For now, we ignore millisecond counter overflow.
+ *
+ * @return timestamp, in milliseconds
+ */
+uint32_t esp_log_timestamp(void);
+
+/**
+ * @brief Function which returns system timestamp to be used in log output
+ *
+ * This function is used in expansion of ESP_LOGx macros to print
+ * the system time as "HH:MM:SS.sss". The system time is initialized to
+ * 0 on startup, this can be set to the correct time with an SNTP sync,
+ * or manually with standard POSIX time functions.
+ *
+ * Currently this will not get used in logging from binary blobs
+ * (i.e WiFi & Bluetooth libraries), these will still print the RTOS tick time.
+ *
+ * @return timestamp, in "HH:MM:SS.sss"
+ */
+char* esp_log_system_timestamp(void);
+
+/**
+ * @brief Function which returns timestamp to be used in log output
+ *
+ * This function uses HW cycle counter and does not depend on OS,
+ * so it can be safely used after application crash.
+ *
+ * @return timestamp, in milliseconds
+ */
+uint32_t esp_log_early_timestamp(void);
+
+/**
+ * @brief Write message into the log
+ *
+ * This function is not intended to be used directly. Instead, use one of
+ * ESP_LOGE, ESP_LOGW, ESP_LOGI, ESP_LOGD, ESP_LOGV macros.
+ *
+ * This function or these macros should not be used from an interrupt.
+ */
+void esp_log_write(esp_log_level_t level, const char* tag, const char* format, ...) __attribute__ ((format (printf, 3, 4)));
+
+/**
+ * @brief Write message into the log, va_list variant
+ * @see esp_log_write()
+ *
+ * This function is provided to ease integration toward other logging framework,
+ * so that esp_log can be used as a log sink.
+ */
+void esp_log_writev(esp_log_level_t level, const char* tag, const char* format, va_list args);
+
+/** @cond */
+
+#include "esp_log_internal.h"
+
+#ifndef LOG_LOCAL_LEVEL
+#ifndef BOOTLOADER_BUILD
+#define LOG_LOCAL_LEVEL  CONFIG_LOG_MAXIMUM_LEVEL
+#else
+#define LOG_LOCAL_LEVEL  CONFIG_BOOTLOADER_LOG_LEVEL
+#endif
+#endif
+
+/** @endcond */
+
+/**
+ * @brief Log a buffer of hex bytes at specified level, separated into 16 bytes each line.
+ *
+ * @param  tag      description tag
+ * @param  buffer   Pointer to the buffer array
+ * @param  buff_len length of buffer in bytes
+ * @param  level    level of the log
+ *
+ */
+#define ESP_LOG_BUFFER_HEX_LEVEL( tag, buffer, buff_len, level ) \
+    do {\
+        if ( LOG_LOCAL_LEVEL >= (level) ) { \
+            esp_log_buffer_hex_internal( tag, buffer, buff_len, level ); \
+        } \
+    } while(0)
+
+/**
+ * @brief Log a buffer of characters at specified level, separated into 16 bytes each line. Buffer should contain only printable characters.
+ *
+ * @param  tag      description tag
+ * @param  buffer   Pointer to the buffer array
+ * @param  buff_len length of buffer in bytes
+ * @param  level    level of the log
+ *
+ */
+#define ESP_LOG_BUFFER_CHAR_LEVEL( tag, buffer, buff_len, level ) \
+    do {\
+        if ( LOG_LOCAL_LEVEL >= (level) ) { \
+            esp_log_buffer_char_internal( tag, buffer, buff_len, level ); \
+        } \
+    } while(0)
+
+/**
+ * @brief Dump a buffer to the log at specified level.
+ *
+ * The dump log shows just like the one below:
+ *
+ *      W (195) log_example: 0x3ffb4280   45 53 50 33 32 20 69 73  20 67 72 65 61 74 2c 20  |ESP32 is great, |
+ *      W (195) log_example: 0x3ffb4290   77 6f 72 6b 69 6e 67 20  61 6c 6f 6e 67 20 77 69  |working along wi|
+ *      W (205) log_example: 0x3ffb42a0   74 68 20 74 68 65 20 49  44 46 2e 00              |th the IDF..|
+ *
+ * It is highly recommend to use terminals with over 102 text width.
+ *
+ * @param tag description tag
+ * @param buffer Pointer to the buffer array
+ * @param buff_len length of buffer in bytes
+ * @param level level of the log
+ */
+#define ESP_LOG_BUFFER_HEXDUMP( tag, buffer, buff_len, level ) \
+    do { \
+        if ( LOG_LOCAL_LEVEL >= (level) ) { \
+            esp_log_buffer_hexdump_internal( tag, buffer, buff_len, level); \
+        } \
+    } while(0)
+
+/**
+ * @brief Log a buffer of hex bytes at Info level
+ *
+ * @param  tag      description tag
+ * @param  buffer   Pointer to the buffer array
+ * @param  buff_len length of buffer in bytes
+ *
+ * @see ``esp_log_buffer_hex_level``
+ *
+ */
+#define ESP_LOG_BUFFER_HEX(tag, buffer, buff_len) \
+    do { \
+        if (LOG_LOCAL_LEVEL >= ESP_LOG_INFO) { \
+            ESP_LOG_BUFFER_HEX_LEVEL( tag, buffer, buff_len, ESP_LOG_INFO ); \
+        }\
+    } while(0)
+
+/**
+ * @brief Log a buffer of characters at Info level. Buffer should contain only printable characters.
+ *
+ * @param  tag      description tag
+ * @param  buffer   Pointer to the buffer array
+ * @param  buff_len length of buffer in bytes
+ *
+ * @see ``esp_log_buffer_char_level``
+ *
+ */
+#define ESP_LOG_BUFFER_CHAR(tag, buffer, buff_len) \
+    do { \
+        if (LOG_LOCAL_LEVEL >= ESP_LOG_INFO) { \
+            ESP_LOG_BUFFER_CHAR_LEVEL( tag, buffer, buff_len, ESP_LOG_INFO ); \
+        }\
+    } while(0)
+
+/** @cond */
+
+//to be back compatible
+#define esp_log_buffer_hex      ESP_LOG_BUFFER_HEX
+#define esp_log_buffer_char     ESP_LOG_BUFFER_CHAR
+
+
+#if CONFIG_LOG_COLORS
+#define LOG_COLOR_BLACK   "30"
+#define LOG_COLOR_RED     "31"
+#define LOG_COLOR_GREEN   "32"
+#define LOG_COLOR_BROWN   "33"
+#define LOG_COLOR_BLUE    "34"
+#define LOG_COLOR_PURPLE  "35"
+#define LOG_COLOR_CYAN    "36"
+#define LOG_COLOR(COLOR)  "\033[0;" COLOR "m"
+#define LOG_BOLD(COLOR)   "\033[1;" COLOR "m"
+#define LOG_RESET_COLOR   "\033[0m"
+#define LOG_COLOR_E       LOG_COLOR(LOG_COLOR_RED)
+#define LOG_COLOR_W       LOG_COLOR(LOG_COLOR_BROWN)
+#define LOG_COLOR_I       LOG_COLOR(LOG_COLOR_GREEN)
+#define LOG_COLOR_D
+#define LOG_COLOR_V
+#else //CONFIG_LOG_COLORS
+#define LOG_COLOR_E
+#define LOG_COLOR_W
+#define LOG_COLOR_I
+#define LOG_COLOR_D
+#define LOG_COLOR_V
+#define LOG_RESET_COLOR
+#endif //CONFIG_LOG_COLORS
+
+#define LOG_FORMAT(letter, format)  LOG_COLOR_ ## letter #letter " (%u) %s: " format LOG_RESET_COLOR "\n"
+#define LOG_SYSTEM_TIME_FORMAT(letter, format)  LOG_COLOR_ ## letter #letter " (%s) %s: " format LOG_RESET_COLOR "\n"
+
+/** @endcond */
+
+/// macro to output logs in startup code, before heap allocator and syscalls have been initialized. log at ``ESP_LOG_ERROR`` level. @see ``printf``,``ESP_LOGE``,``ESP_DRAM_LOGE``
+#define portGET_ARGUMENT_COUNT_INNER(zero, one, count, ...) count
+
+/**
+ * In the future, we want to switch to C++20. We also want to become compatible with clang.
+ * Hence, we provide two versions of the following macros which are using variadic arguments.
+ * The first one is using the GNU extension \#\#__VA_ARGS__. The second one is using the C++20 feature __VA_OPT__(,).
+ * This allows users to compile their code with standard C++20 enabled instead of the GNU extension.
+ * Below C++20, we haven't found any good alternative to using \#\#__VA_ARGS__.
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR,   E __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_WARN`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN,    W __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_INFO`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGI( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_INFO,    I __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_DEBUG`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGD( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_DEBUG,   D __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
+#define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_WARN`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_INFO`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGI( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_INFO,    I, ##__VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_DEBUG`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGD( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_DEBUG,   D, ##__VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
+
+#ifdef BOOTLOADER_BUILD
+#define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level))
+#else
+/* For early log, there is no log tag filtering. So we want to log only if both the LOG_LOCAL_LEVEL and the
+   currently configured min log level are higher than the log level */
+#define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level) && esp_log_default_level >= (log_level))
+#endif
+
+#define ESP_LOG_EARLY_IMPL(tag, format, log_level, log_tag_letter, ...) do {                             \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                         \
+            esp_rom_printf(LOG_FORMAT(log_tag_letter, format), esp_log_timestamp(), tag, ##__VA_ARGS__); \
+        }} while(0)
+
+#ifndef BOOTLOADER_BUILD
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_LOGE( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_ERROR,   tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGW( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_WARN,    tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGI( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_INFO,    tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGD( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_DEBUG,   tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
+#define ESP_LOGE( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_ERROR,   tag, format, ##__VA_ARGS__)
+#define ESP_LOGW( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_WARN,    tag, format, ##__VA_ARGS__)
+#define ESP_LOGI( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_INFO,    tag, format, ##__VA_ARGS__)
+#define ESP_LOGD( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_DEBUG,   tag, format, ##__VA_ARGS__)
+#define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
+#else
+
+/**
+ * Macro to output logs at ESP_LOG_ERROR level.
+ *
+ * @note This macro cannot be used when interrupts are disabled or inside an ISR. @see ``ESP_DRAM_LOGE``.
+ *
+ * @param tag tag of the log, which can be used to change the log level by ``esp_log_level_set`` at runtime.
+ *
+ * @see ``printf``
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_LOGE( tag, format, ... )  ESP_EARLY_LOGE(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_WARN`` level.  @see ``ESP_LOGE``
+#define ESP_LOGW( tag, format, ... )  ESP_EARLY_LOGW(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_INFO`` level.  @see ``ESP_LOGE``
+#define ESP_LOGI( tag, format, ... )  ESP_EARLY_LOGI(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_DEBUG`` level.  @see ``ESP_LOGE``
+#define ESP_LOGD( tag, format, ... )  ESP_EARLY_LOGD(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_LOGE``
+#define ESP_LOGV( tag, format, ... )  ESP_EARLY_LOGV(tag, format __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
+#define ESP_LOGE( tag, format, ... )  ESP_EARLY_LOGE(tag, format, ##__VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_WARN`` level.  @see ``ESP_LOGE``
+#define ESP_LOGW( tag, format, ... )  ESP_EARLY_LOGW(tag, format, ##__VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_INFO`` level.  @see ``ESP_LOGE``
+#define ESP_LOGI( tag, format, ... )  ESP_EARLY_LOGI(tag, format, ##__VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_DEBUG`` level.  @see ``ESP_LOGE``
+#define ESP_LOGD( tag, format, ... )  ESP_EARLY_LOGD(tag, format, ##__VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_LOGE``
+#define ESP_LOGV( tag, format, ... )  ESP_EARLY_LOGV(tag, format, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
+#endif  // BOOTLOADER_BUILD
+
+/** runtime macro to output logs at a specified level.
+ *
+ * @param tag tag of the log, which can be used to change the log level by ``esp_log_level_set`` at runtime.
+ * @param level level of the output log.
+ * @param format format of the output log. see ``printf``
+ * @param ... variables to be replaced into the log. see ``printf``
+ *
+ * @see ``printf``
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#if CONFIG_LOG_TIMESTAMP_SOURCE_RTOS
+#define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
+        if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_FORMAT(E, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_WARN )      { esp_log_write(ESP_LOG_WARN,       tag, LOG_FORMAT(W, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_DEBUG )     { esp_log_write(ESP_LOG_DEBUG,      tag, LOG_FORMAT(D, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_VERBOSE )   { esp_log_write(ESP_LOG_VERBOSE,    tag, LOG_FORMAT(V, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_FORMAT(I, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+    } while(0)
+#elif CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM
+#define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
+        if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_SYSTEM_TIME_FORMAT(E, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_WARN )      { esp_log_write(ESP_LOG_WARN,       tag, LOG_SYSTEM_TIME_FORMAT(W, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_DEBUG )     { esp_log_write(ESP_LOG_DEBUG,      tag, LOG_SYSTEM_TIME_FORMAT(D, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_VERBOSE )   { esp_log_write(ESP_LOG_VERBOSE,    tag, LOG_SYSTEM_TIME_FORMAT(V, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+    } while(0)
+#endif //CONFIG_LOG_TIMESTAMP_SOURCE_xxx
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
+#if CONFIG_LOG_TIMESTAMP_SOURCE_RTOS
+#define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
+        if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_FORMAT(E, format), esp_log_timestamp(), tag, ##__VA_ARGS__); } \
+        else if (level==ESP_LOG_WARN )      { esp_log_write(ESP_LOG_WARN,       tag, LOG_FORMAT(W, format), esp_log_timestamp(), tag, ##__VA_ARGS__); } \
+        else if (level==ESP_LOG_DEBUG )     { esp_log_write(ESP_LOG_DEBUG,      tag, LOG_FORMAT(D, format), esp_log_timestamp(), tag, ##__VA_ARGS__); } \
+        else if (level==ESP_LOG_VERBOSE )   { esp_log_write(ESP_LOG_VERBOSE,    tag, LOG_FORMAT(V, format), esp_log_timestamp(), tag, ##__VA_ARGS__); } \
+        else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_FORMAT(I, format), esp_log_timestamp(), tag, ##__VA_ARGS__); } \
+    } while(0)
+#elif CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM
+#define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
+        if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_SYSTEM_TIME_FORMAT(E, format), esp_log_system_timestamp(), tag, ##__VA_ARGS__); } \
+        else if (level==ESP_LOG_WARN )      { esp_log_write(ESP_LOG_WARN,       tag, LOG_SYSTEM_TIME_FORMAT(W, format), esp_log_system_timestamp(), tag, ##__VA_ARGS__); } \
+        else if (level==ESP_LOG_DEBUG )     { esp_log_write(ESP_LOG_DEBUG,      tag, LOG_SYSTEM_TIME_FORMAT(D, format), esp_log_system_timestamp(), tag, ##__VA_ARGS__); } \
+        else if (level==ESP_LOG_VERBOSE )   { esp_log_write(ESP_LOG_VERBOSE,    tag, LOG_SYSTEM_TIME_FORMAT(V, format), esp_log_system_timestamp(), tag, ##__VA_ARGS__); } \
+        else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_system_timestamp(), tag, ##__VA_ARGS__); } \
+    } while(0)
+#endif //CONFIG_LOG_TIMESTAMP_SOURCE_xxx
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
+
+/** runtime macro to output logs at a specified level. Also check the level with ``LOG_LOCAL_LEVEL``.
+ *
+ * @see ``printf``, ``ESP_LOG_LEVEL``
+ */
+#define ESP_LOG_LEVEL_LOCAL(level, tag, format, ...) do {               \
+        if ( LOG_LOCAL_LEVEL >= level ) ESP_LOG_LEVEL(level, tag, format, ##__VA_ARGS__); \
+    } while(0)
+
+
+/**
+ * @brief Macro to output logs when the cache is disabled. log at ``ESP_LOG_ERROR`` level.
+ *
+ * @note Unlike normal logging macros, it's possible to use this macro when interrupts are
+ * disabled or inside an ISR.
+ *
+ * Similar to @see ``ESP_EARLY_LOGE``, the log level cannot be changed per-tag, however
+ * esp_log_level_set("*", level) will set the default level which controls these log lines also.
+ *
+ * Usage: `ESP_DRAM_LOGE(DRAM_STR("my_tag"), "format", or `ESP_DRAM_LOGE(TAG, "format", ...)`,
+ * where TAG is a char* that points to a str in the DRAM.
+ *
+ * @note Placing log strings in DRAM reduces available DRAM, so only use when absolutely essential.
+ *
+ * @see ``esp_rom_printf``,``ESP_LOGE``
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_DRAM_LOGE( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_ERROR,   E __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level.  @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``esp_rom_printf``
+#define ESP_DRAM_LOGW( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_WARN,    W __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_INFO`` level.  @see ``ESP_DRAM_LOGI``,``ESP_LOGI``, ``esp_rom_printf``
+#define ESP_DRAM_LOGI( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_INFO,    I __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_DEBUG`` level.  @see ``ESP_DRAM_LOGD``,``ESP_LOGD``, ``esp_rom_printf``
+#define ESP_DRAM_LOGD( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_DEBUG,   D __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``esp_rom_printf``
+#define ESP_DRAM_LOGV( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_VERBOSE, V __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
+#define ESP_DRAM_LOGE( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level.  @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``esp_rom_printf``
+#define ESP_DRAM_LOGW( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_INFO`` level.  @see ``ESP_DRAM_LOGI``,``ESP_LOGI``, ``esp_rom_printf``
+#define ESP_DRAM_LOGI( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_INFO,    I, ##__VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_DEBUG`` level.  @see ``ESP_DRAM_LOGD``,``ESP_LOGD``, ``esp_rom_printf``
+#define ESP_DRAM_LOGD( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_DEBUG,   D, ##__VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``esp_rom_printf``
+#define ESP_DRAM_LOGV( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
+
+/** @cond */
+#define _ESP_LOG_DRAM_LOG_FORMAT(letter, format)  DRAM_STR(#letter " %s: " format "\n")
+
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                                  \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                             \
+            esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag __VA_OPT__(,) __VA_ARGS__); \
+        }} while(0)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
+#define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                       \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                  \
+            esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag, ##__VA_ARGS__); \
+        }} while(0)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
+/** @endcond */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __ESP_LOG_H__ */
diff --git a/tools/sdk/esp32s3/include/log/include/esp_log_internal.h b/tools/sdk/esp32s3/include/log/include/esp_log_internal.h
new file mode 100644
index 00000000000..732f949c838
--- /dev/null
+++ b/tools/sdk/esp32s3/include/log/include/esp_log_internal.h
@@ -0,0 +1,15 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __ESP_LOG_INTERNAL_H__
+#define __ESP_LOG_INTERNAL_H__
+
+//these functions do not check level versus ESP_LOCAL_LEVEL, this should be done in esp_log.h
+void esp_log_buffer_hex_internal(const char *tag, const void *buffer, uint16_t buff_len, esp_log_level_t level);
+void esp_log_buffer_char_internal(const char *tag, const void *buffer, uint16_t buff_len, esp_log_level_t level);
+void esp_log_buffer_hexdump_internal( const char *tag, const void *buffer, uint16_t buff_len, esp_log_level_t log_level);
+
+#endif
diff --git a/tools/sdk/esp32s3/include/lwip/include/apps/dhcpserver/dhcpserver.h b/tools/sdk/esp32s3/include/lwip/include/apps/dhcpserver/dhcpserver.h
new file mode 100644
index 00000000000..262ebf43d85
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/include/apps/dhcpserver/dhcpserver.h
@@ -0,0 +1,102 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef __DHCPS_H__
+#define __DHCPS_H__
+
+#include "sdkconfig.h"
+#include "lwip/ip_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct dhcps_state{
+        s16_t state;
+} dhcps_state;
+
+typedef struct dhcps_msg {
+        u8_t op, htype, hlen, hops;
+        u8_t xid[4];
+        u16_t secs, flags;
+        u8_t ciaddr[4];
+        u8_t yiaddr[4];
+        u8_t siaddr[4];
+        u8_t giaddr[4];
+        u8_t chaddr[16];
+        u8_t sname[64];
+        u8_t file[128];
+        u8_t options[312];
+}dhcps_msg;
+
+/*   Defined in esp_misc.h */
+typedef struct {
+	bool enable;
+	ip4_addr_t start_ip;
+	ip4_addr_t end_ip;
+} dhcps_lease_t;
+
+enum dhcps_offer_option{
+	OFFER_START = 0x00,
+	OFFER_ROUTER = 0x01,
+	OFFER_DNS = 0x02,
+	OFFER_END
+};
+
+#define DHCPS_COARSE_TIMER_SECS  1
+#define DHCPS_MAX_LEASE 0x64
+#define DHCPS_LEASE_TIME_DEF (120)
+#define DHCPS_LEASE_UNIT CONFIG_LWIP_DHCPS_LEASE_UNIT
+
+struct dhcps_pool{
+	ip4_addr_t ip;
+	u8_t mac[6];
+	u32_t lease_timer;
+};
+
+typedef u32_t dhcps_time_t;
+typedef u8_t dhcps_offer_t;
+
+typedef struct {
+        dhcps_offer_t dhcps_offer;
+        dhcps_offer_t dhcps_dns;
+        dhcps_time_t  dhcps_time;
+        dhcps_lease_t dhcps_poll;
+} dhcps_options_t;
+
+typedef void (*dhcps_cb_t)(u8_t client_ip[4]);
+
+static inline bool dhcps_router_enabled (dhcps_offer_t offer)
+{
+    return (offer & OFFER_ROUTER) != 0;
+}
+
+static inline bool dhcps_dns_enabled (dhcps_offer_t offer)
+{
+    return (offer & OFFER_DNS) != 0;
+}
+
+void dhcps_start(struct netif *netif, ip4_addr_t ip);
+void dhcps_stop(struct netif *netif);
+void *dhcps_option_info(u8_t op_id, u32_t opt_len);
+void dhcps_set_option_info(u8_t op_id, void *opt_info, u32_t opt_len);
+bool dhcp_search_ip_on_mac(u8_t *mac, ip4_addr_t *ip);
+void dhcps_dns_setserver(const ip_addr_t *dnsserver);
+ip4_addr_t dhcps_dns_getserver(void);
+void dhcps_set_new_lease_cb(dhcps_cb_t cb);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DHCPS_H__ */
diff --git a/tools/sdk/esp32s3/include/lwip/include/apps/dhcpserver/dhcpserver_options.h b/tools/sdk/esp32s3/include/lwip/include/apps/dhcpserver/dhcpserver_options.h
new file mode 100644
index 00000000000..31a67992831
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/include/apps/dhcpserver/dhcpserver_options.h
@@ -0,0 +1,141 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/** DHCP Options
+
+    This macros are not part of the public dhcpserver.h interface.
+ **/
+typedef enum
+{
+    /* RFC 1497 Vendor Extensions */
+
+    PAD = 0,
+    END = 255,
+
+    SUBNET_MASK = 1,
+    TIME_OFFSET = 2,
+    ROUTER = 3,
+    TIME_SERVER = 4,
+    NAME_SERVER = 5,
+    DOMAIN_NAME_SERVER = 6,
+    LOG_SERVER = 7,
+    COOKIE_SERVER = 8,
+    LPR_SERVER = 9,
+    IMPRESS_SERVER = 10,
+    RESOURCE_LOCATION_SERVER = 11,
+    HOST_NAME = 12,
+    BOOT_FILE_SIZE = 13,
+    MERIT_DUMP_FILE = 14,
+    DOMAIN_NAME = 15,
+    SWAP_SERVER = 16,
+    ROOT_PATH = 17,
+    EXTENSIONS_PATH = 18,
+
+    /* IP Layer Parameters per Host */
+
+    IP_FORWARDING = 19,
+    NON_LOCAL_SOURCE_ROUTING = 20,
+    POLICY_FILTER = 21,
+    MAXIMUM_DATAGRAM_REASSEMBLY_SIZE = 22,
+    DEFAULT_IP_TIME_TO_LIVE = 23,
+    PATH_MTU_AGING_TIMEOUT = 24,
+    PATH_MTU_PLATEAU_TABLE = 25,
+
+    /* IP Layer Parameters per Interface */
+
+    INTERFACE_MTU = 26,
+    ALL_SUBNETS_ARE_LOCAL = 27,
+    BROADCAST_ADDRESS = 28,
+    PERFORM_MASK_DISCOVERY = 29,
+    MASK_SUPPLIER = 30,
+    PERFORM_ROUTER_DISCOVERY = 31,
+    ROUTER_SOLICITATION_ADDRESS = 32,
+    STATIC_ROUTE = 33,
+
+    /* Link Layer Parameters per Interface */
+
+    TRAILER_ENCAPSULATION = 34,
+    ARP_CACHE_TIMEOUT = 35,
+    ETHERNET_ENCAPSULATION = 36,
+
+    /* TCP Parameters */
+
+    TCP_DEFAULT_TTL = 37,
+    TCP_KEEPALIVE_INTERVAL = 38,
+    TCP_KEEPALIVE_GARBAGE = 39,
+
+    /* Application and Service Parameters */
+
+    NETWORK_INFORMATION_SERVICE_DOMAIN = 40,
+    NETWORK_INFORMATION_SERVERS = 41,
+    NETWORK_TIME_PROTOCOL_SERVERS = 42,
+    VENDOR_SPECIFIC_INFORMATION = 43,
+    NETBIOS_OVER_TCP_IP_NAME_SERVER = 44,
+    NETBIOS_OVER_TCP_IP_DATAGRAM_DISTRIBUTION_SERVER = 45,
+    NETBIOS_OVER_TCP_IP_NODE_TYPE = 46,
+    NETBIOS_OVER_TCP_IP_SCOPE = 47,
+    X_WINDOW_SYSTEM_FONT_SERVER = 48,
+    X_WINDOW_SYSTEM_DISPLAY_MANAGER = 49,
+    NETWORK_INFORMATION_SERVICE_PLUS_DOMAIN = 64,
+    NETWORK_INFORMATION_SERVICE_PLUS_SERVERS = 65,
+    MOBILE_IP_HOME_AGENT = 68,
+    SMTP_SERVER = 69,
+    POP3_SERVER = 70,
+    NNTP_SERVER = 71,
+    DEFAULT_WWW_SERVER = 72,
+    DEFAULT_FINGER_SERVER = 73,
+    DEFAULT_IRC_SERVER = 74,
+    STREETTALK_SERVER = 75,
+    STREETTALK_DIRECTORY_ASSISTANCE_SERVER = 76,
+
+    /* DHCP Extensions */
+
+    REQUESTED_IP_ADDRESS = 50,
+    IP_ADDRESS_LEASE_TIME = 51,
+    OPTION_OVERLOAD = 52,
+    TFTP_SERVER_NAME = 66,
+    BOOTFILE_NAME = 67,
+    DHCP_MESSAGE_TYPE = 53,
+    SERVER_IDENTIFIER = 54,
+    PARAMETER_REQUEST_LIST = 55,
+    MESSAGE = 56,
+    MAXIMUM_DHCP_MESSAGE_SIZE = 57,
+    RENEWAL_T1_TIME_VALUE = 58,
+    REBINDING_T2_TIME_VALUE = 59,
+    VENDOR_CLASS_IDENTIFIER = 60,
+    CLIENT_IDENTIFIER = 61,
+
+    USER_CLASS = 77,
+    FQDN = 81,
+    DHCP_AGENT_OPTIONS = 82,
+    NDS_SERVERS = 85,
+    NDS_TREE_NAME = 86,
+    NDS_CONTEXT = 87,
+    CLIENT_LAST_TRANSACTION_TIME = 91,
+    ASSOCIATED_IP = 92,
+    USER_AUTHENTICATION_PROTOCOL = 98,
+    AUTO_CONFIGURE = 116,
+    NAME_SERVICE_SEARCH = 117,
+    SUBNET_SELECTION = 118,
+    DOMAIN_SEARCH = 119,
+    CLASSLESS_ROUTE = 121,
+} dhcp_msg_option;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/lwip/include/apps/esp_ping.h b/tools/sdk/esp32s3/include/lwip/include/apps/esp_ping.h
new file mode 100644
index 00000000000..86dcc6ac012
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/include/apps/esp_ping.h
@@ -0,0 +1,112 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef ESP_PING_H_
+#define ESP_PING_H_
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// gen_esp_err_to_name.py: include this as "esp_ping.h" because "components/lwip/include/apps/" is in the compiler path
+// and not "components/lwip/include"
+
+#define ESP_ERR_PING_BASE               0xa000
+
+#define ESP_ERR_PING_INVALID_PARAMS     ESP_ERR_PING_BASE + 0x01
+#define ESP_ERR_PING_NO_MEM             ESP_ERR_PING_BASE + 0x02
+
+#define ESP_PING_CHECK_OPTLEN(optlen, opttype) do { if ((optlen) < sizeof(opttype)) { return ESP_ERR_PING_INVALID_PARAMS; }}while(0)
+
+typedef struct _ping_found {
+    uint32_t resp_time;
+    uint32_t timeout_count;
+    uint32_t send_count;
+    uint32_t recv_count;
+    uint32_t err_count;
+    uint32_t bytes;
+    uint32_t total_bytes;
+    uint32_t total_time;
+    uint32_t min_time;
+    uint32_t max_time;
+    int8_t  ping_err;
+} esp_ping_found;
+
+typedef enum {
+    PING_TARGET_IP_ADDRESS          = 50,   /**< target IP address */
+    PING_TARGET_IP_ADDRESS_COUNT    = 51,   /**< target IP address total counter */
+    PING_TARGET_RCV_TIMEO           = 52,   /**< receive timeout in milliseconds */
+    PING_TARGET_DELAY_TIME          = 53,   /**< delay time in milliseconds */
+    PING_TARGET_ID                  = 54,   /**< identifier */
+    PING_TARGET_RES_FN              = 55,   /**< ping result callback function */
+    PING_TARGET_RES_RESET           = 56,   /**< ping result statistic reset */
+    PING_TARGET_DATA_LEN            = 57,   /**< ping data length*/
+    PING_TARGET_IP_TOS              = 58,    /**< ping QOS*/
+    PING_TARGET_IF_INDEX            = 59    /**< ping if index*/
+} ping_target_id_t;
+
+typedef enum {
+    PING_RES_TIMEOUT = 0,
+    PING_RES_OK      = 1,
+    PING_RES_FINISH  = 2,
+} ping_res_t;
+
+typedef void (* esp_ping_found_fn)(ping_target_id_t found_id, esp_ping_found *found_val);
+
+/**
+ * @brief  Set PING function option
+ *
+ * @param[in]  opt_id: option index, 50 for IP, 51 for COUNT, 52 for RCV TIMEOUT, 53 for DELAY TIME, 54 for ID
+ * @param[in]  opt_val: option parameter
+ * @param[in]  opt_len: option length
+ *
+ * @return
+ *      - ESP_OK
+ *      - ESP_ERR_PING_INVALID_PARAMS
+ */
+esp_err_t esp_ping_set_target(ping_target_id_t opt_id, void *opt_val, uint32_t opt_len);
+
+/**
+ * @brief  Get PING function option
+ *
+ * @param[in]  opt_id: option index, 50 for IP, 51 for COUNT, 52 for RCV TIMEOUT, 53 for DELAY TIME, 54 for ID
+ * @param[in]  opt_val: option parameter
+ * @param[in]  opt_len: option length
+ *
+ * @return
+ *      - ESP_OK
+ *      - ESP_ERR_PING_INVALID_PARAMS
+ */
+esp_err_t esp_ping_get_target(ping_target_id_t opt_id, void *opt_val, uint32_t opt_len);
+
+/**
+ * @brief  Get PING function result action
+ *
+ * @param[in]  res_val: ping function action, 1 for successful, 0 for fail.
+ *             res_len: response bytes
+ *             res_time: response time
+ *
+ * @return
+ *      - ESP_OK
+ *      - ESP_ERR_PING_INVALID_PARAMS
+ */
+esp_err_t esp_ping_result(uint8_t res_val, uint16_t res_len, uint32_t res_time);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ESP_PING_H_ */
diff --git a/tools/sdk/esp32s3/include/lwip/include/apps/esp_sntp.h b/tools/sdk/esp32s3/include/lwip/include/apps/esp_sntp.h
new file mode 100644
index 00000000000..9e9912a8c11
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/include/apps/esp_sntp.h
@@ -0,0 +1,158 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_SNTP_H__
+#define __ESP_SNTP_H__
+
+#include "lwip/err.h"
+#include "lwip/apps/sntp.h"
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * The time update takes place in the sntp_sync_time() function.
+ * The user has the ability to redefine this function in order
+ * to re-define its functionality. This function has two time update modes,
+ * which can be set via the sntp_set_sync_mode() function.
+ * Two modes are available:
+ * - the first is an immediate update when receiving time from the sntp server,
+ * - the second is a smooth time update (if the time error is no more than 35 minutes,
+ *   and an immediate update if the error is more than 35 minutes).
+ *
+ * To receive notification of time synchronization,
+ * you can use the callback function or get the synchronization status
+ * via the sntp_get_sync_status() function.
+ *
+ * To determine the time synchronization time on the device, you can use:
+ * 1) sntp_set_time_sync_notification_cb() function to set the callback function,
+ *    which is convenient to use to receive notification of the update time.
+ * 2) sntp_get_sync_status() function for getting time synchronization status.
+ *    After the time synchronization is completed, the status will be
+ *    SNTP_SYNC_STATUS_COMPLETED, after, it will be reseted to SNTP_SYNC_STATUS_RESET
+ *    to wait for the next sync cycle.
+ */
+
+/// SNTP time update mode
+typedef enum {
+    SNTP_SYNC_MODE_IMMED,   /*!< Update system time immediately when receiving a response from the SNTP server. */
+    SNTP_SYNC_MODE_SMOOTH,  /*!< Smooth time updating. Time error is gradually reduced using adjtime function. If the difference between SNTP response time and system time is large (more than 35 minutes) then update immediately. */
+} sntp_sync_mode_t;
+
+/// SNTP sync status
+typedef enum {
+    SNTP_SYNC_STATUS_RESET,         // Reset status.
+    SNTP_SYNC_STATUS_COMPLETED,     // Time is synchronized.
+    SNTP_SYNC_STATUS_IN_PROGRESS,   // Smooth time sync in progress.
+} sntp_sync_status_t;
+
+/**
+ * @brief SNTP callback function for notifying about time sync event
+ *
+ * @param tv Time received from SNTP server.
+ */
+typedef void (*sntp_sync_time_cb_t) (struct timeval *tv);
+
+/**
+ * @brief This function updates the system time.
+ *
+ * This is a weak-linked function. It is possible to replace all SNTP update functionality
+ * by placing a sntp_sync_time() function in the app firmware source.
+ * If the default implementation is used, calling sntp_set_sync_mode() allows
+ * the time synchronization mode to be changed to instant or smooth.
+ * If a callback function is registered via sntp_set_time_sync_notification_cb(),
+ * it will be called following time synchronization.
+ *
+ * @param tv Time received from SNTP server.
+ */
+void sntp_sync_time(struct timeval *tv);
+
+/**
+ * @brief Set the sync mode
+ *
+ * Allowable two mode: SNTP_SYNC_MODE_IMMED and SNTP_SYNC_MODE_SMOOTH.
+ * @param sync_mode Sync mode.
+ */
+void sntp_set_sync_mode(sntp_sync_mode_t sync_mode);
+
+/**
+ * @brief Get set sync mode
+ *
+ * @return  SNTP_SYNC_MODE_IMMED: Update time immediately.
+ *          SNTP_SYNC_MODE_SMOOTH: Smooth time updating.
+ */
+sntp_sync_mode_t sntp_get_sync_mode(void);
+
+/**
+ * @brief Get status of time sync
+ *
+ * After the update is completed, the status will be returned as SNTP_SYNC_STATUS_COMPLETED.
+ * After that, the status will be reset to SNTP_SYNC_STATUS_RESET.
+ * If the update operation is not completed yet, the status will be SNTP_SYNC_STATUS_RESET.
+ * If a smooth mode was chosen and the synchronization is still continuing (adjtime works), then it will be SNTP_SYNC_STATUS_IN_PROGRESS.
+ *
+ * @return  SNTP_SYNC_STATUS_RESET: Reset status.
+ *          SNTP_SYNC_STATUS_COMPLETED: Time is synchronized.
+ *          SNTP_SYNC_STATUS_IN_PROGRESS: Smooth time sync in progress.
+ */
+sntp_sync_status_t sntp_get_sync_status(void);
+
+/**
+ * @brief Set status of time sync
+ *
+ * @param sync_status status of time sync (see sntp_sync_status_t)
+ */
+void sntp_set_sync_status(sntp_sync_status_t sync_status);
+
+/**
+ * @brief Set a callback function for time synchronization notification
+ *
+ * @param callback a callback function
+ */
+void sntp_set_time_sync_notification_cb(sntp_sync_time_cb_t callback);
+
+/**
+ * @brief Set the sync interval of SNTP operation
+ *
+ * Note: SNTPv4 RFC 4330 enforces a minimum sync interval of 15 seconds.
+ * This sync interval will be used in the next attempt update time throught SNTP.
+ * To apply the new sync interval call the sntp_restart() function,
+ * otherwise, it will be applied after the last interval expired.
+ *
+ * @param interval_ms   The sync interval in ms. It cannot be lower than 15 seconds, otherwise 15 seconds will be set.
+ */
+void sntp_set_sync_interval(uint32_t interval_ms);
+
+/**
+ * @brief Get the sync interval of SNTP operation
+ *
+ * @return  the sync interval
+ */
+uint32_t sntp_get_sync_interval(void);
+
+/**
+ * @brief Restart SNTP
+ *
+ * @return True  - Restart
+ *         False - SNTP was not initialized yet
+ */
+bool sntp_restart(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ESP_SNTP_H__
diff --git a/tools/sdk/esp32s3/include/lwip/include/apps/ping/ping.h b/tools/sdk/esp32s3/include/lwip/include/apps/ping/ping.h
new file mode 100644
index 00000000000..6d17856555a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/include/apps/ping/ping.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#ifndef LWIP_PING_H
+#define LWIP_PING_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * PING_USE_SOCKETS: Set to 1 to use sockets, otherwise the raw api is used
+ */
+#ifndef PING_USE_SOCKETS
+#define PING_USE_SOCKETS    LWIP_SOCKET
+#endif
+
+
+int ping_init(void) __attribute__ ((deprecated));
+
+#ifdef ESP_PING
+void ping_deinit(void) __attribute__ ((deprecated));
+#endif
+
+#if !PING_USE_SOCKETS
+void ping_send_now(void);
+#endif /* !PING_USE_SOCKETS */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_PING_H */
diff --git a/tools/sdk/esp32s3/include/lwip/include/apps/ping/ping_sock.h b/tools/sdk/esp32s3/include/lwip/include/apps/ping/ping_sock.h
new file mode 100644
index 00000000000..57938480d54
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/include/apps/ping/ping_sock.h
@@ -0,0 +1,171 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include "esp_err.h"
+#include "lwip/ip_addr.h"
+
+/**
+* @brief Type of "ping" session handle
+*
+*/
+typedef void *esp_ping_handle_t;
+
+/**
+* @brief Type of "ping" callback functions
+*
+*/
+typedef struct {
+    /**
+    * @brief arguments for callback functions
+    *
+    */
+    void *cb_args;
+
+    /**
+    * @brief Invoked by internal ping thread when received ICMP echo reply packet
+    *
+    */
+    void (*on_ping_success)(esp_ping_handle_t hdl, void *args);
+
+    /**
+    * @brief Invoked by internal ping thread when receive ICMP echo reply packet timeout
+    *
+    */
+    void (*on_ping_timeout)(esp_ping_handle_t hdl, void *args);
+
+    /**
+    * @brief Invoked by internal ping thread when a ping session is finished
+    *
+    */
+    void (*on_ping_end)(esp_ping_handle_t hdl, void *args);
+} esp_ping_callbacks_t;
+
+/**
+* @brief Type of "ping" configuration
+*
+*/
+typedef struct {
+    uint32_t count;           /*!< A "ping" session contains count procedures */
+    uint32_t interval_ms;     /*!< Milliseconds between each ping procedure */
+    uint32_t timeout_ms;      /*!< Timeout value (in milliseconds) of each ping procedure */
+    uint32_t data_size;       /*!< Size of the data next to ICMP packet header */
+    uint8_t tos;              /*!< Type of Service, a field specified in the IP header */
+    ip_addr_t target_addr;    /*!< Target IP address, either IPv4 or IPv6 */
+    uint32_t task_stack_size; /*!< Stack size of internal ping task */
+    uint32_t task_prio;       /*!< Priority of internal ping task */
+    uint32_t interface;       /*!< Netif index, interface=0 means NETIF_NO_INDEX*/
+} esp_ping_config_t;
+
+/**
+ * @brief Default ping configuration
+ *
+ */
+#define ESP_PING_DEFAULT_CONFIG()        \
+    {                                    \
+        .count = 5,                      \
+        .interval_ms = 1000,             \
+        .timeout_ms = 1000,              \
+        .data_size = 64,                 \
+        .tos = 0,                        \
+        .target_addr = *(IP_ANY_TYPE),   \
+        .task_stack_size = 2048,         \
+        .task_prio = 2,                  \
+        .interface = 0,\
+    }
+
+#define ESP_PING_COUNT_INFINITE (0) /*!< Set ping count to zero will ping target infinitely */
+
+/**
+* @brief Profile of ping session
+*
+*/
+typedef enum {
+    ESP_PING_PROF_SEQNO,   /*!< Sequence number of a ping procedure */
+    ESP_PING_PROF_TTL,     /*!< Time to live of a ping procedure */
+    ESP_PING_PROF_REQUEST, /*!< Number of request packets sent out */
+    ESP_PING_PROF_REPLY,   /*!< Number of reply packets received */
+    ESP_PING_PROF_IPADDR,  /*!< IP address of replied target */
+    ESP_PING_PROF_SIZE,    /*!< Size of received packet */
+    ESP_PING_PROF_TIMEGAP, /*!< Elapsed time between request and reply packet */
+    ESP_PING_PROF_DURATION /*!< Elapsed time of the whole ping session */
+} esp_ping_profile_t;
+
+/**
+ * @brief Create a ping session
+ *
+ * @param config ping configuration
+ * @param cbs a bunch of callback functions invoked by internal ping task
+ * @param hdl_out handle of ping session
+ * @return
+ *      - ESP_ERR_INVALID_ARG: invalid parameters (e.g. configuration is null, etc)
+ *      - ESP_ERR_NO_MEM: out of memory
+ *      - ESP_FAIL: other internal error (e.g. socket error)
+ *      - ESP_OK: create ping session successfully, user can take the ping handle to do follow-on jobs
+ */
+esp_err_t esp_ping_new_session(const esp_ping_config_t *config, const esp_ping_callbacks_t *cbs, esp_ping_handle_t *hdl_out);
+
+/**
+ * @brief Delete a ping session
+ *
+ * @param hdl handle of ping session
+ * @return
+ *      - ESP_ERR_INVALID_ARG: invalid parameters (e.g. ping handle is null, etc)
+ *      - ESP_OK: delete ping session successfully
+ */
+esp_err_t esp_ping_delete_session(esp_ping_handle_t hdl);
+
+/**
+ * @brief Start the ping session
+ *
+ * @param hdl handle of ping session
+ * @return
+ *      - ESP_ERR_INVALID_ARG: invalid parameters (e.g. ping handle is null, etc)
+ *      - ESP_OK: start ping session successfully
+ */
+esp_err_t esp_ping_start(esp_ping_handle_t hdl);
+
+/**
+ * @brief Stop the ping session
+ *
+ * @param hdl handle of ping session
+ * @return
+ *      - ESP_ERR_INVALID_ARG: invalid parameters (e.g. ping handle is null, etc)
+ *      - ESP_OK: stop ping session successfully
+ */
+esp_err_t esp_ping_stop(esp_ping_handle_t hdl);
+
+/**
+ * @brief Get runtime profile of ping session
+ *
+ * @param hdl handle of ping session
+ * @param profile type of profile
+ * @param data profile data
+ * @param size profile data size
+ * @return
+ *      - ESP_ERR_INVALID_ARG: invalid parameters (e.g. ping handle is null, etc)
+ *      - ESP_ERR_INVALID_SIZE: the actual profile data size doesn't match the "size" parameter
+ *      - ESP_OK: get profile successfully
+ */
+esp_err_t esp_ping_get_profile(esp_ping_handle_t hdl, esp_ping_profile_t profile, void *data, uint32_t size);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/lwip/include/apps/sntp/sntp.h b/tools/sdk/esp32s3/include/lwip/include/apps/sntp/sntp.h
new file mode 100644
index 00000000000..616fd554609
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/include/apps/sntp/sntp.h
@@ -0,0 +1,27 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __SNTP_H__
+#define __SNTP_H__
+
+/*
+ * This header is provided only for compatibility reasons for existing
+ * applications which directly include "sntp.h" from the IDF default paths.
+ * and will be removed in IDF v5.0.
+ * It is recommended to use "esp_sntp.h" from IDF's lwip port folder
+ */
+
+#include "esp_sntp.h"
+
+#endif // __SNTP_H__
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/arpa/inet.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/arpa/inet.h
new file mode 100644
index 00000000000..0ed9baf3d9f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/arpa/inet.h
@@ -0,0 +1,33 @@
+/**
+ * @file
+ * This file is a posix wrapper for lwip/sockets.h.
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#include "lwip/sockets.h"
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/net/if.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/net/if.h
new file mode 100644
index 00000000000..6b8e63a5277
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/net/if.h
@@ -0,0 +1,36 @@
+/**
+ * @file
+ * This file is a posix wrapper for lwip/if_api.h.
+ */
+
+/*
+ * Copyright (c) 2017 Joel Cunningham, Garmin International, Inc. <joel.cunningham@garmin.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification, 
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#include "lwip/if_api.h"
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/netdb.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/netdb.h
new file mode 100644
index 00000000000..12d4c7f566c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/netdb.h
@@ -0,0 +1,33 @@
+/**
+ * @file
+ * This file is a posix wrapper for lwip/netdb.h.
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#include "lwip/netdb.h"
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/sys/socket.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/sys/socket.h
new file mode 100644
index 00000000000..0ed9baf3d9f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/posix/sys/socket.h
@@ -0,0 +1,33 @@
+/**
+ * @file
+ * This file is a posix wrapper for lwip/sockets.h.
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#include "lwip/sockets.h"
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/stdc/errno.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/stdc/errno.h
new file mode 100644
index 00000000000..98a9aec9969
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/compat/stdc/errno.h
@@ -0,0 +1,33 @@
+/**
+ * @file
+ * This file is a posix/stdc wrapper for lwip/errno.h.
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#include "lwip/errno.h"
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/altcp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/altcp.h
new file mode 100644
index 00000000000..1b245449ed3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/altcp.h
@@ -0,0 +1,206 @@
+/**
+ * @file
+ * Application layered TCP connection API (to be used from TCPIP thread)\n
+ *
+ * This file contains the generic API.
+ * For more details see @ref altcp_api.
+ */
+
+/*
+ * Copyright (c) 2017 Simon Goldschmidt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+#ifndef LWIP_HDR_ALTCP_H
+#define LWIP_HDR_ALTCP_H
+
+#include "lwip/opt.h"
+
+#if LWIP_ALTCP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/tcpbase.h"
+#include "lwip/err.h"
+#include "lwip/pbuf.h"
+#include "lwip/ip_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct altcp_pcb;
+struct altcp_functions;
+
+typedef err_t (*altcp_accept_fn)(void *arg, struct altcp_pcb *new_conn, err_t err);
+typedef err_t (*altcp_connected_fn)(void *arg, struct altcp_pcb *conn, err_t err);
+typedef err_t (*altcp_recv_fn)(void *arg, struct altcp_pcb *conn, struct pbuf *p, err_t err);
+typedef err_t (*altcp_sent_fn)(void *arg, struct altcp_pcb *conn, u16_t len);
+typedef err_t (*altcp_poll_fn)(void *arg, struct altcp_pcb *conn);
+typedef void  (*altcp_err_fn)(void *arg, err_t err);
+
+typedef struct altcp_pcb* (*altcp_new_fn)(void *arg, u8_t ip_type);
+
+struct altcp_pcb {
+  const struct altcp_functions *fns;
+  struct altcp_pcb *inner_conn;
+  void *arg;
+  void *state;
+  /* application callbacks */
+  altcp_accept_fn     accept;
+  altcp_connected_fn  connected;
+  altcp_recv_fn       recv;
+  altcp_sent_fn       sent;
+  altcp_poll_fn       poll;
+  altcp_err_fn        err;
+  u8_t pollinterval;
+};
+
+/** @ingroup altcp */
+typedef struct altcp_allocator_s {
+  /** Allocator function */
+  altcp_new_fn  alloc;
+  /** Argument to allocator function */
+  void         *arg;
+} altcp_allocator_t;
+
+struct altcp_pcb *altcp_new(altcp_allocator_t *allocator);
+struct altcp_pcb *altcp_new_ip6(altcp_allocator_t *allocator);
+struct altcp_pcb *altcp_new_ip_type(altcp_allocator_t *allocator, u8_t ip_type);
+
+void altcp_arg(struct altcp_pcb *conn, void *arg);
+void altcp_accept(struct altcp_pcb *conn, altcp_accept_fn accept);
+void altcp_recv(struct altcp_pcb *conn, altcp_recv_fn recv);
+void altcp_sent(struct altcp_pcb *conn, altcp_sent_fn sent);
+void altcp_poll(struct altcp_pcb *conn, altcp_poll_fn poll, u8_t interval);
+void altcp_err(struct altcp_pcb *conn, altcp_err_fn err);
+
+void  altcp_recved(struct altcp_pcb *conn, u16_t len);
+err_t altcp_bind(struct altcp_pcb *conn, const ip_addr_t *ipaddr, u16_t port);
+err_t altcp_connect(struct altcp_pcb *conn, const ip_addr_t *ipaddr, u16_t port, altcp_connected_fn connected);
+
+/* return conn for source code compatibility to tcp callback API only */
+struct altcp_pcb *altcp_listen_with_backlog_and_err(struct altcp_pcb *conn, u8_t backlog, err_t *err);
+#define altcp_listen_with_backlog(conn, backlog) altcp_listen_with_backlog_and_err(conn, backlog, NULL)
+/** @ingroup altcp */
+#define altcp_listen(conn) altcp_listen_with_backlog_and_err(conn, TCP_DEFAULT_LISTEN_BACKLOG, NULL)
+
+void altcp_abort(struct altcp_pcb *conn);
+err_t altcp_close(struct altcp_pcb *conn);
+err_t altcp_shutdown(struct altcp_pcb *conn, int shut_rx, int shut_tx);
+
+err_t altcp_write(struct altcp_pcb *conn, const void *dataptr, u16_t len, u8_t apiflags);
+err_t altcp_output(struct altcp_pcb *conn);
+
+u16_t altcp_mss(struct altcp_pcb *conn);
+u16_t altcp_sndbuf(struct altcp_pcb *conn);
+u16_t altcp_sndqueuelen(struct altcp_pcb *conn);
+void  altcp_nagle_disable(struct altcp_pcb *conn);
+void  altcp_nagle_enable(struct altcp_pcb *conn);
+int   altcp_nagle_disabled(struct altcp_pcb *conn);
+
+void  altcp_setprio(struct altcp_pcb *conn, u8_t prio);
+
+err_t altcp_get_tcp_addrinfo(struct altcp_pcb *conn, int local, ip_addr_t *addr, u16_t *port);
+ip_addr_t *altcp_get_ip(struct altcp_pcb *conn, int local);
+u16_t altcp_get_port(struct altcp_pcb *conn, int local);
+
+#if LWIP_TCP_KEEPALIVE
+void  altcp_keepalive_disable(struct altcp_pcb *conn);
+void  altcp_keepalive_enable(struct altcp_pcb *conn, u32_t idle, u32_t intvl, u32_t count);
+#endif
+
+#ifdef LWIP_DEBUG
+enum tcp_state altcp_dbg_get_tcp_state(struct altcp_pcb *conn);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#else /* LWIP_ALTCP */
+
+/* ALTCP disabled, define everything to link against tcp callback API (e.g. to get a small non-ssl httpd) */
+
+#include "lwip/tcp.h"
+
+#define altcp_accept_fn tcp_accept_fn
+#define altcp_connected_fn tcp_connected_fn
+#define altcp_recv_fn tcp_recv_fn
+#define altcp_sent_fn tcp_sent_fn
+#define altcp_poll_fn tcp_poll_fn
+#define altcp_err_fn tcp_err_fn
+
+#define altcp_pcb tcp_pcb
+#define altcp_tcp_new_ip_type tcp_new_ip_type
+#define altcp_tcp_new tcp_new
+#define altcp_tcp_new_ip6 tcp_new_ip6
+
+#define altcp_new(allocator) tcp_new()
+#define altcp_new_ip6(allocator) tcp_new_ip6()
+#define altcp_new_ip_type(allocator, ip_type) tcp_new_ip_type(ip_type)
+
+#define altcp_arg tcp_arg
+#define altcp_accept tcp_accept
+#define altcp_recv tcp_recv
+#define altcp_sent tcp_sent
+#define altcp_poll tcp_poll
+#define altcp_err tcp_err
+
+#define altcp_recved tcp_recved
+#define altcp_bind tcp_bind
+#define altcp_connect tcp_connect
+
+#define altcp_listen_with_backlog_and_err tcp_listen_with_backlog_and_err
+#define altcp_listen_with_backlog tcp_listen_with_backlog
+#define altcp_listen tcp_listen
+
+#define altcp_abort tcp_abort
+#define altcp_close tcp_close
+#define altcp_shutdown tcp_shutdown
+
+#define altcp_write tcp_write
+#define altcp_output tcp_output
+
+#define altcp_mss tcp_mss
+#define altcp_sndbuf tcp_sndbuf
+#define altcp_sndqueuelen tcp_sndqueuelen
+#define altcp_nagle_disable tcp_nagle_disable
+#define altcp_nagle_enable tcp_nagle_enable
+#define altcp_nagle_disabled tcp_nagle_disabled
+#define altcp_setprio tcp_setprio
+
+#define altcp_get_tcp_addrinfo tcp_get_tcp_addrinfo
+#define altcp_get_ip(pcb, local) ((local) ? (&(pcb)->local_ip) : (&(pcb)->remote_ip))
+
+#ifdef LWIP_DEBUG
+#define altcp_dbg_get_tcp_state tcp_dbg_get_tcp_state
+#endif
+
+#endif /* LWIP_ALTCP */
+
+#endif /* LWIP_HDR_ALTCP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/altcp_tcp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/altcp_tcp.h
new file mode 100644
index 00000000000..dbde584683a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/altcp_tcp.h
@@ -0,0 +1,72 @@
+/**
+ * @file
+ * Application layered TCP connection API (to be used from TCPIP thread)\n
+ * This interface mimics the tcp callback API to the application while preventing
+ * direct linking (much like virtual functions).
+ * This way, an application can make use of other application layer protocols
+ * on top of TCP without knowing the details (e.g. TLS, proxy connection).
+ *
+ * This file contains the base implementation calling into tcp.
+ */
+
+/*
+ * Copyright (c) 2017 Simon Goldschmidt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+#ifndef LWIP_HDR_ALTCP_TCP_H
+#define LWIP_HDR_ALTCP_TCP_H
+
+#include "lwip/opt.h"
+
+#if LWIP_ALTCP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/altcp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct altcp_pcb *altcp_tcp_new_ip_type(u8_t ip_type);
+
+#define altcp_tcp_new() altcp_tcp_new_ip_type(IPADDR_TYPE_V4)
+#define altcp_tcp_new_ip6() altcp_tcp_new_ip_type(IPADDR_TYPE_V6)
+
+struct altcp_pcb *altcp_tcp_alloc(void *arg, u8_t ip_type);
+
+struct tcp_pcb;
+struct altcp_pcb *altcp_tcp_wrap(struct tcp_pcb *tpcb);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_ALTCP */
+
+#endif /* LWIP_HDR_ALTCP_TCP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/altcp_tls.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/altcp_tls.h
new file mode 100644
index 00000000000..ff797f27fdc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/altcp_tls.h
@@ -0,0 +1,143 @@
+/**
+ * @file
+ * Application layered TCP/TLS connection API (to be used from TCPIP thread)
+ *
+ * @defgroup altcp_tls TLS layer
+ * @ingroup altcp
+ * This file contains function prototypes for a TLS layer.
+ * A port to ARM mbedtls is provided in the apps/ tree
+ * (LWIP_ALTCP_TLS_MBEDTLS option).
+ */
+
+/*
+ * Copyright (c) 2017 Simon Goldschmidt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+#ifndef LWIP_HDR_ALTCP_TLS_H
+#define LWIP_HDR_ALTCP_TLS_H
+
+#include "lwip/opt.h"
+
+#if LWIP_ALTCP /* don't build if not configured for use in lwipopts.h */
+
+#if LWIP_ALTCP_TLS
+
+#include "lwip/altcp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @ingroup altcp_tls
+ * ALTCP_TLS configuration handle, content depends on port (e.g. mbedtls)
+ */
+struct altcp_tls_config;
+
+/** @ingroup altcp_tls
+ * Create an ALTCP_TLS server configuration handle prepared for multiple certificates
+ */
+struct altcp_tls_config *altcp_tls_create_config_server(uint8_t cert_count);
+
+/** @ingroup altcp_tls
+ * Add a certificate to an ALTCP_TLS server configuration handle
+ */
+err_t altcp_tls_config_server_add_privkey_cert(struct altcp_tls_config *config,
+      const u8_t *privkey, size_t privkey_len,
+      const u8_t *privkey_pass, size_t privkey_pass_len,
+      const u8_t *cert, size_t cert_len);
+
+/** @ingroup altcp_tls
+ * Create an ALTCP_TLS server configuration handle with one certificate
+ * (short version of calling @ref altcp_tls_create_config_server and
+ * @ref altcp_tls_config_server_add_privkey_cert)
+ */
+struct altcp_tls_config *altcp_tls_create_config_server_privkey_cert(const u8_t *privkey, size_t privkey_len,
+                            const u8_t *privkey_pass, size_t privkey_pass_len,
+                            const u8_t *cert, size_t cert_len);
+
+/** @ingroup altcp_tls
+ * Create an ALTCP_TLS client configuration handle
+ */
+struct altcp_tls_config *altcp_tls_create_config_client(const u8_t *cert, size_t cert_len);
+
+/** @ingroup altcp_tls
+ * Create an ALTCP_TLS client configuration handle with two-way server/client authentication
+ */
+struct altcp_tls_config *altcp_tls_create_config_client_2wayauth(const u8_t *ca, size_t ca_len, const u8_t *privkey, size_t privkey_len,
+                            const u8_t *privkey_pass, size_t privkey_pass_len,
+                            const u8_t *cert, size_t cert_len);
+
+/** @ingroup altcp_tls
+ * Free an ALTCP_TLS configuration handle
+ */
+void altcp_tls_free_config(struct altcp_tls_config *conf);
+
+/** @ingroup altcp_tls
+ * Free an ALTCP_TLS global entropy instance.
+ * All ALTCP_TLS configuration are linked to one altcp_tls_entropy_rng structure
+ * that handle an unique system entropy & ctr_drbg instance.
+ * This function allow application to free this altcp_tls_entropy_rng structure
+ * when all configuration referencing it were destroyed.
+ * This function does nothing if some ALTCP_TLS configuration handle are still
+ * active.
+ */
+void altcp_tls_free_entropy(void);
+
+/** @ingroup altcp_tls
+ * Create new ALTCP_TLS layer wrapping an existing pcb as inner connection (e.g. TLS over TCP)
+ */
+struct altcp_pcb *altcp_tls_wrap(struct altcp_tls_config *config, struct altcp_pcb *inner_pcb);
+
+/** @ingroup altcp_tls
+ * Create new ALTCP_TLS pcb and its inner tcp pcb
+ */
+struct altcp_pcb *altcp_tls_new(struct altcp_tls_config *config, u8_t ip_type);
+
+/** @ingroup altcp_tls
+ * Create new ALTCP_TLS layer pcb and its inner tcp pcb.
+ * Same as @ref altcp_tls_new but this allocator function fits to
+ * @ref altcp_allocator_t / @ref altcp_new.\n
+ 'arg' must contain a struct altcp_tls_config *.
+ */
+struct altcp_pcb *altcp_tls_alloc(void *arg, u8_t ip_type);
+
+/** @ingroup altcp_tls
+ * Return pointer to internal TLS context so application can tweak it.
+ * Real type depends on port (e.g. mbedtls)
+ */
+void *altcp_tls_context(struct altcp_pcb *conn);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_ALTCP_TLS */
+#endif /* LWIP_ALTCP */
+#endif /* LWIP_HDR_ALTCP_TLS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/api.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/api.h
new file mode 100644
index 00000000000..af0bf04f77f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/api.h
@@ -0,0 +1,441 @@
+/**
+ * @file
+ * netconn API (to be used from non-TCPIP threads)
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_API_H
+#define LWIP_HDR_API_H
+
+#include "lwip/opt.h"
+
+#if LWIP_NETCONN || LWIP_SOCKET /* don't build if not configured for use in lwipopts.h */
+/* Note: Netconn API is always available when sockets are enabled -
+ * sockets are implemented on top of them */
+
+#include "lwip/arch.h"
+#include "lwip/netbuf.h"
+#include "lwip/sys.h"
+#include "lwip/ip_addr.h"
+#include "lwip/err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Throughout this file, IP addresses and port numbers are expected to be in
+ * the same byte order as in the corresponding pcb.
+ */
+
+/* Flags for netconn_write (u8_t) */
+#define NETCONN_NOFLAG      0x00
+#define NETCONN_NOCOPY      0x00 /* Only for source code compatibility */
+#define NETCONN_COPY        0x01
+#define NETCONN_MORE        0x02
+#define NETCONN_DONTBLOCK   0x04
+#define NETCONN_NOAUTORCVD  0x08 /* prevent netconn_recv_data_tcp() from updating the tcp window - must be done manually via netconn_tcp_recvd() */
+#define NETCONN_NOFIN       0x10 /* upper layer already received data, leave FIN in queue until called again */
+
+/* Flags for struct netconn.flags (u8_t) */
+/** This netconn had an error, don't block on recvmbox/acceptmbox any more */
+#define NETCONN_FLAG_MBOXCLOSED               0x01
+/** Should this netconn avoid blocking? */
+#define NETCONN_FLAG_NON_BLOCKING             0x02
+/** Was the last connect action a non-blocking one? */
+#define NETCONN_FLAG_IN_NONBLOCKING_CONNECT   0x04
+#if LWIP_NETCONN_FULLDUPLEX
+  /** The mbox of this netconn is being deallocated, don't use it anymore */
+#define NETCONN_FLAG_MBOXINVALID              0x08
+#endif /* LWIP_NETCONN_FULLDUPLEX */
+/** If a nonblocking write has been rejected before, poll_tcp needs to
+    check if the netconn is writable again */
+#define NETCONN_FLAG_CHECK_WRITESPACE         0x10
+#if LWIP_IPV6
+/** If this flag is set then only IPv6 communication is allowed on the
+    netconn. As per RFC#3493 this features defaults to OFF allowing
+    dual-stack usage by default. */
+#define NETCONN_FLAG_IPV6_V6ONLY              0x20
+#endif /* LWIP_IPV6 */
+#if LWIP_NETBUF_RECVINFO
+/** Received packet info will be recorded for this netconn */
+#define NETCONN_FLAG_PKTINFO                  0x40
+#endif /* LWIP_NETBUF_RECVINFO */
+/** A FIN has been received but not passed to the application yet */
+#define NETCONN_FIN_RX_PENDING                0x80
+
+/* Helpers to process several netconn_types by the same code */
+#define NETCONNTYPE_GROUP(t)         ((t)&0xF0)
+#define NETCONNTYPE_DATAGRAM(t)      ((t)&0xE0)
+#if LWIP_IPV6
+#define NETCONN_TYPE_IPV6            0x08
+#define NETCONNTYPE_ISIPV6(t)        (((t)&NETCONN_TYPE_IPV6) != 0)
+#define NETCONNTYPE_ISUDPLITE(t)     (((t)&0xF3) == NETCONN_UDPLITE)
+#define NETCONNTYPE_ISUDPNOCHKSUM(t) (((t)&0xF3) == NETCONN_UDPNOCHKSUM)
+#else /* LWIP_IPV6 */
+#define NETCONNTYPE_ISIPV6(t)        (0)
+#define NETCONNTYPE_ISUDPLITE(t)     ((t) == NETCONN_UDPLITE)
+#define NETCONNTYPE_ISUDPNOCHKSUM(t) ((t) == NETCONN_UDPNOCHKSUM)
+#endif /* LWIP_IPV6 */
+
+/** @ingroup netconn_common
+ * Protocol family and type of the netconn
+ */
+enum netconn_type {
+  NETCONN_INVALID     = 0,
+  /** TCP IPv4 */
+  NETCONN_TCP         = 0x10,
+#if LWIP_IPV6
+  /** TCP IPv6 */
+  NETCONN_TCP_IPV6    = NETCONN_TCP | NETCONN_TYPE_IPV6 /* 0x18 */,
+#endif /* LWIP_IPV6 */
+  /** UDP IPv4 */
+  NETCONN_UDP         = 0x20,
+  /** UDP IPv4 lite */
+  NETCONN_UDPLITE     = 0x21,
+  /** UDP IPv4 no checksum */
+  NETCONN_UDPNOCHKSUM = 0x22,
+
+#if LWIP_IPV6
+  /** UDP IPv6 (dual-stack by default, unless you call @ref netconn_set_ipv6only) */
+  NETCONN_UDP_IPV6         = NETCONN_UDP | NETCONN_TYPE_IPV6 /* 0x28 */,
+  /** UDP IPv6 lite (dual-stack by default, unless you call @ref netconn_set_ipv6only) */
+  NETCONN_UDPLITE_IPV6     = NETCONN_UDPLITE | NETCONN_TYPE_IPV6 /* 0x29 */,
+  /** UDP IPv6 no checksum (dual-stack by default, unless you call @ref netconn_set_ipv6only) */
+  NETCONN_UDPNOCHKSUM_IPV6 = NETCONN_UDPNOCHKSUM | NETCONN_TYPE_IPV6 /* 0x2a */,
+#endif /* LWIP_IPV6 */
+
+  /** Raw connection IPv4 */
+  NETCONN_RAW         = 0x40
+#if LWIP_IPV6
+  /** Raw connection IPv6 (dual-stack by default, unless you call @ref netconn_set_ipv6only) */
+  , NETCONN_RAW_IPV6    = NETCONN_RAW | NETCONN_TYPE_IPV6 /* 0x48 */
+#endif /* LWIP_IPV6 */
+};
+
+/** Current state of the netconn. Non-TCP netconns are always
+ * in state NETCONN_NONE! */
+enum netconn_state {
+  NETCONN_NONE,
+  NETCONN_WRITE,
+  NETCONN_LISTEN,
+  NETCONN_CONNECT,
+  NETCONN_CLOSE
+};
+
+/** Used to inform the callback function about changes
+ * 
+ * Event explanation:
+ * 
+ * In the netconn implementation, there are three ways to block a client:
+ * 
+ * - accept mbox (sys_arch_mbox_fetch(&conn->acceptmbox, &accept_ptr, 0); in netconn_accept())
+ * - receive mbox (sys_arch_mbox_fetch(&conn->recvmbox, &buf, 0); in netconn_recv_data())
+ * - send queue is full (sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0); in lwip_netconn_do_write())
+ * 
+ * The events have to be seen as events signaling the state of these mboxes/semaphores. For non-blocking
+ * connections, you need to know in advance whether a call to a netconn function call would block or not,
+ * and these events tell you about that.
+ * 
+ * RCVPLUS events say: Safe to perform a potentially blocking call call once more. 
+ * They are counted in sockets - three RCVPLUS events for accept mbox means you are safe
+ * to call netconn_accept 3 times without being blocked.
+ * Same thing for receive mbox.
+ * 
+ * RCVMINUS events say: Your call to to a possibly blocking function is "acknowledged".
+ * Socket implementation decrements the counter.
+ * 
+ * For TX, there is no need to count, its merely a flag. SENDPLUS means you may send something.
+ * SENDPLUS occurs when enough data was delivered to peer so netconn_send() can be called again.
+ * A SENDMINUS event occurs when the next call to a netconn_send() would be blocking.
+ */
+enum netconn_evt {
+  NETCONN_EVT_RCVPLUS,
+  NETCONN_EVT_RCVMINUS,
+  NETCONN_EVT_SENDPLUS,
+  NETCONN_EVT_SENDMINUS,
+  NETCONN_EVT_ERROR
+};
+
+#if LWIP_IGMP || (LWIP_IPV6 && LWIP_IPV6_MLD)
+/** Used for netconn_join_leave_group() */
+enum netconn_igmp {
+  NETCONN_JOIN,
+  NETCONN_LEAVE
+};
+#endif /* LWIP_IGMP || (LWIP_IPV6 && LWIP_IPV6_MLD) */
+
+#if LWIP_DNS
+/* Used for netconn_gethostbyname_addrtype(), these should match the DNS_ADDRTYPE defines in dns.h */
+#define NETCONN_DNS_DEFAULT   NETCONN_DNS_IPV4_IPV6
+#define NETCONN_DNS_IPV4      0
+#define NETCONN_DNS_IPV6      1
+#define NETCONN_DNS_IPV4_IPV6 2 /* try to resolve IPv4 first, try IPv6 if IPv4 fails only */
+#define NETCONN_DNS_IPV6_IPV4 3 /* try to resolve IPv6 first, try IPv4 if IPv6 fails only */
+#endif /* LWIP_DNS */
+
+/* forward-declare some structs to avoid to include their headers */
+struct ip_pcb;
+struct tcp_pcb;
+struct udp_pcb;
+struct raw_pcb;
+struct netconn;
+struct api_msg;
+
+/** A callback prototype to inform about events for a netconn */
+typedef void (* netconn_callback)(struct netconn *, enum netconn_evt, u16_t len);
+
+/** A netconn descriptor */
+struct netconn {
+  /** type of the netconn (TCP, UDP or RAW) */
+  enum netconn_type type;
+  /** current state of the netconn */
+  enum netconn_state state;
+  /** the lwIP internal protocol control block */
+  union {
+    struct ip_pcb  *ip;
+    struct tcp_pcb *tcp;
+    struct udp_pcb *udp;
+    struct raw_pcb *raw;
+  } pcb;
+  /** the last asynchronous unreported error this netconn had */
+  err_t pending_err;
+#if !LWIP_NETCONN_SEM_PER_THREAD
+  /** sem that is used to synchronously execute functions in the core context */
+  sys_sem_t op_completed;
+#endif
+  /** mbox where received packets are stored until they are fetched
+      by the netconn application thread (can grow quite big) */
+  sys_mbox_t recvmbox;
+#if LWIP_TCP
+  /** mbox where new connections are stored until processed
+      by the application thread */
+  sys_mbox_t acceptmbox;
+#if ESP_THREAD_PROTECTION
+  bool write_protection;
+#endif /* ESP_THREAD_PROTECTION */
+#endif /* LWIP_TCP */
+#if LWIP_NETCONN_FULLDUPLEX
+  /** number of threads waiting on an mbox. This is required to unblock
+      all threads when closing while threads are waiting. */
+  int mbox_threads_waiting;
+#endif
+  /** only used for socket layer */
+#if LWIP_SOCKET
+  int socket;
+#endif /* LWIP_SOCKET */
+#if LWIP_SO_SNDTIMEO
+  /** timeout to wait for sending data (which means enqueueing data for sending
+      in internal buffers) in milliseconds */
+  s32_t send_timeout;
+#endif /* LWIP_SO_RCVTIMEO */
+#if LWIP_SO_RCVTIMEO
+  /** timeout in milliseconds to wait for new data to be received
+      (or connections to arrive for listening netconns) */
+  u32_t recv_timeout;
+#endif /* LWIP_SO_RCVTIMEO */
+#if LWIP_SO_RCVBUF
+  /** maximum amount of bytes queued in recvmbox
+      not used for TCP: adjust TCP_WND instead! */
+  int recv_bufsize;
+  /** number of bytes currently in recvmbox to be received,
+      tested against recv_bufsize to limit bytes on recvmbox
+      for UDP and RAW, used for FIONREAD */
+  int recv_avail;
+#endif /* LWIP_SO_RCVBUF */
+#if LWIP_SO_LINGER
+   /** values <0 mean linger is disabled, values > 0 are seconds to linger */
+  s16_t linger;
+#endif /* LWIP_SO_LINGER */
+  /** flags holding more netconn-internal state, see NETCONN_FLAG_* defines */
+  u8_t flags;
+#if LWIP_TCP
+  /** TCP: when data passed to netconn_write doesn't fit into the send buffer,
+      this temporarily stores the message.
+      Also used during connect and close. */
+  struct api_msg *current_msg;
+#endif /* LWIP_TCP */
+  /** A callback function that is informed about events for this netconn */
+  netconn_callback callback;
+};
+
+/** This vector type is passed to @ref netconn_write_vectors_partly to send
+ * multiple buffers at once.
+ * ATTENTION: This type has to directly map struct iovec since one is casted
+ *            into the other!
+ */
+struct netvector {
+  /** pointer to the application buffer that contains the data to send */
+  const void *ptr;
+  /** size of the application data to send */
+  size_t len;
+};
+
+/** Register an Network connection event */
+#define API_EVENT(c,e,l) if (c->callback) {         \
+                           (*c->callback)(c, e, l); \
+                         }
+
+/* Network connection functions: */
+
+/** @ingroup netconn_common
+ * Create new netconn connection
+ * @param t @ref netconn_type */
+#define netconn_new(t)                  netconn_new_with_proto_and_callback(t, 0, NULL)
+#define netconn_new_with_callback(t, c) netconn_new_with_proto_and_callback(t, 0, c)
+struct netconn *netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto,
+                                             netconn_callback callback);
+err_t   netconn_prepare_delete(struct netconn *conn);
+err_t   netconn_delete(struct netconn *conn);
+/** Get the type of a netconn (as enum netconn_type). */
+#define netconn_type(conn) (conn->type)
+
+err_t   netconn_getaddr(struct netconn *conn, ip_addr_t *addr,
+                        u16_t *port, u8_t local);
+/** @ingroup netconn_common */
+#define netconn_peer(c,i,p) netconn_getaddr(c,i,p,0)
+/** @ingroup netconn_common */
+#define netconn_addr(c,i,p) netconn_getaddr(c,i,p,1)
+
+err_t   netconn_bind(struct netconn *conn, const ip_addr_t *addr, u16_t port);
+err_t   netconn_bind_if(struct netconn *conn, u8_t if_idx);
+err_t   netconn_connect(struct netconn *conn, const ip_addr_t *addr, u16_t port);
+err_t   netconn_disconnect (struct netconn *conn);
+err_t   netconn_listen_with_backlog(struct netconn *conn, u8_t backlog);
+/** @ingroup netconn_tcp */
+#define netconn_listen(conn) netconn_listen_with_backlog(conn, TCP_DEFAULT_LISTEN_BACKLOG)
+err_t   netconn_accept(struct netconn *conn, struct netconn **new_conn);
+err_t   netconn_recv(struct netconn *conn, struct netbuf **new_buf);
+err_t   netconn_recv_udp_raw_netbuf(struct netconn *conn, struct netbuf **new_buf);
+err_t   netconn_recv_udp_raw_netbuf_flags(struct netconn *conn, struct netbuf **new_buf, u8_t apiflags);
+err_t   netconn_recv_tcp_pbuf(struct netconn *conn, struct pbuf **new_buf);
+err_t   netconn_recv_tcp_pbuf_flags(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags);
+err_t   netconn_tcp_recvd(struct netconn *conn, size_t len);
+err_t   netconn_sendto(struct netconn *conn, struct netbuf *buf,
+                             const ip_addr_t *addr, u16_t port);
+err_t   netconn_send(struct netconn *conn, struct netbuf *buf);
+err_t   netconn_write_partly(struct netconn *conn, const void *dataptr, size_t size,
+                             u8_t apiflags, size_t *bytes_written);
+err_t   netconn_write_vectors_partly(struct netconn *conn, struct netvector *vectors, u16_t vectorcnt,
+                                     u8_t apiflags, size_t *bytes_written);
+/** @ingroup netconn_tcp */
+#define netconn_write(conn, dataptr, size, apiflags) \
+          netconn_write_partly(conn, dataptr, size, apiflags, NULL)
+err_t   netconn_close(struct netconn *conn);
+err_t   netconn_shutdown(struct netconn *conn, u8_t shut_rx, u8_t shut_tx);
+
+#if LWIP_IGMP || (LWIP_IPV6 && LWIP_IPV6_MLD)
+err_t   netconn_join_leave_group(struct netconn *conn, const ip_addr_t *multiaddr,
+                             const ip_addr_t *netif_addr, enum netconn_igmp join_or_leave);
+err_t   netconn_join_leave_group_netif(struct netconn *conn, const ip_addr_t *multiaddr,
+                             u8_t if_idx, enum netconn_igmp join_or_leave);
+#endif /* LWIP_IGMP || (LWIP_IPV6 && LWIP_IPV6_MLD) */
+#if LWIP_DNS
+#if LWIP_IPV4 && LWIP_IPV6
+err_t   netconn_gethostbyname_addrtype(const char *name, ip_addr_t *addr, u8_t dns_addrtype);
+#define netconn_gethostbyname(name, addr) netconn_gethostbyname_addrtype(name, addr, NETCONN_DNS_DEFAULT)
+#else /* LWIP_IPV4 && LWIP_IPV6 */
+err_t   netconn_gethostbyname(const char *name, ip_addr_t *addr);
+#define netconn_gethostbyname_addrtype(name, addr, dns_addrtype) netconn_gethostbyname(name, addr)
+#endif /* LWIP_IPV4 && LWIP_IPV6 */
+#endif /* LWIP_DNS */
+
+err_t   netconn_err(struct netconn *conn);
+#define netconn_recv_bufsize(conn)      ((conn)->recv_bufsize)
+
+#define netconn_set_flags(conn, set_flags)     do { (conn)->flags = (u8_t)((conn)->flags |  (set_flags)); } while(0)
+#define netconn_clear_flags(conn, clr_flags)   do { (conn)->flags = (u8_t)((conn)->flags & (u8_t)(~(clr_flags) & 0xff)); } while(0)
+#define netconn_is_flag_set(conn, flag)        (((conn)->flags & (flag)) != 0)
+
+/** Set the blocking status of netconn calls (@todo: write/send is missing) */
+#define netconn_set_nonblocking(conn, val)  do { if(val) { \
+  netconn_set_flags(conn, NETCONN_FLAG_NON_BLOCKING); \
+} else { \
+  netconn_clear_flags(conn, NETCONN_FLAG_NON_BLOCKING); }} while(0)
+/** Get the blocking status of netconn calls (@todo: write/send is missing) */
+#define netconn_is_nonblocking(conn)        (((conn)->flags & NETCONN_FLAG_NON_BLOCKING) != 0)
+
+#if LWIP_IPV6
+/** @ingroup netconn_common
+ * TCP: Set the IPv6 ONLY status of netconn calls (see NETCONN_FLAG_IPV6_V6ONLY)
+ */
+#define netconn_set_ipv6only(conn, val)  do { if(val) { \
+  netconn_set_flags(conn, NETCONN_FLAG_IPV6_V6ONLY); \
+} else { \
+  netconn_clear_flags(conn, NETCONN_FLAG_IPV6_V6ONLY); }} while(0)
+/** @ingroup netconn_common
+ * TCP: Get the IPv6 ONLY status of netconn calls (see NETCONN_FLAG_IPV6_V6ONLY)
+ */
+#define netconn_get_ipv6only(conn)        (((conn)->flags & NETCONN_FLAG_IPV6_V6ONLY) != 0)
+#endif /* LWIP_IPV6 */
+
+#if LWIP_SO_SNDTIMEO
+/** Set the send timeout in milliseconds */
+#define netconn_set_sendtimeout(conn, timeout)      ((conn)->send_timeout = (timeout))
+/** Get the send timeout in milliseconds */
+#define netconn_get_sendtimeout(conn)               ((conn)->send_timeout)
+#endif /* LWIP_SO_SNDTIMEO */
+#if LWIP_SO_RCVTIMEO
+/** Set the receive timeout in milliseconds */
+#define netconn_set_recvtimeout(conn, timeout)      ((conn)->recv_timeout = (timeout))
+/** Get the receive timeout in milliseconds */
+#define netconn_get_recvtimeout(conn)               ((conn)->recv_timeout)
+#endif /* LWIP_SO_RCVTIMEO */
+#if LWIP_SO_RCVBUF
+/** Set the receive buffer in bytes */
+#define netconn_set_recvbufsize(conn, recvbufsize)  ((conn)->recv_bufsize = (recvbufsize))
+/** Get the receive buffer in bytes */
+#define netconn_get_recvbufsize(conn)               ((conn)->recv_bufsize)
+#endif /* LWIP_SO_RCVBUF*/
+
+#if LWIP_NETCONN_SEM_PER_THREAD
+void netconn_thread_init(void);
+void netconn_thread_cleanup(void);
+#else /* LWIP_NETCONN_SEM_PER_THREAD */
+#define netconn_thread_init()
+#define netconn_thread_cleanup()
+#endif /* LWIP_NETCONN_SEM_PER_THREAD */
+
+#if ESP_THREAD_PROTECTION
+
+#define TCP_WRITE_LOCK(conn)    ((conn)->write_protection = (true))
+#define TCP_WRITE_UNLOCK(conn)  ((conn)->write_protection = (false))
+
+#endif /* ESP_THREAD_PROTECTION */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_NETCONN || LWIP_SOCKET */
+
+#endif /* LWIP_HDR_API_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/altcp_proxyconnect.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/altcp_proxyconnect.h
new file mode 100644
index 00000000000..65d31279de6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/altcp_proxyconnect.h
@@ -0,0 +1,79 @@
+/**
+ * @file
+ * Application layered TCP connection API that executes a proxy-connect.
+ *
+ * This file provides a starting layer that executes a proxy-connect e.g. to
+ * set up TLS connections through a http proxy.
+ */
+
+/*
+ * Copyright (c) 2018 Simon Goldschmidt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+
+#ifndef LWIP_HDR_APPS_ALTCP_PROXYCONNECT_H
+#define LWIP_HDR_APPS_ALTCP_PROXYCONNECT_H
+
+#include "lwip/opt.h"
+
+#if LWIP_ALTCP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/ip_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct altcp_proxyconnect_config {
+  ip_addr_t proxy_addr;
+  u16_t proxy_port;
+};
+
+
+struct altcp_pcb *altcp_proxyconnect_new(struct altcp_proxyconnect_config *config, struct altcp_pcb *inner_pcb);
+struct altcp_pcb *altcp_proxyconnect_new_tcp(struct altcp_proxyconnect_config *config, u8_t ip_type);
+
+struct altcp_pcb *altcp_proxyconnect_alloc(void *arg, u8_t ip_type);
+
+#if LWIP_ALTCP_TLS
+struct altcp_proxyconnect_tls_config {
+  struct altcp_proxyconnect_config proxy;
+  struct altcp_tls_config *tls_config;
+};
+
+struct altcp_pcb *altcp_proxyconnect_tls_alloc(void *arg, u8_t ip_type);
+#endif /* LWIP_ALTCP_TLS */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_ALTCP */
+#endif /* LWIP_HDR_APPS_ALTCP_PROXYCONNECT_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/altcp_tls_mbedtls_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/altcp_tls_mbedtls_opts.h
new file mode 100644
index 00000000000..71aa5993935
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/altcp_tls_mbedtls_opts.h
@@ -0,0 +1,105 @@
+/**
+ * @file
+ * Application layered TCP/TLS connection API (to be used from TCPIP thread)
+ *
+ * This file contains options for an mbedtls port of the TLS layer.
+ */
+
+/*
+ * Copyright (c) 2017 Simon Goldschmidt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+#ifndef LWIP_HDR_ALTCP_TLS_OPTS_H
+#define LWIP_HDR_ALTCP_TLS_OPTS_H
+
+#include "lwip/opt.h"
+
+#if LWIP_ALTCP /* don't build if not configured for use in lwipopts.h */
+
+/** LWIP_ALTCP_TLS_MBEDTLS==1: use mbedTLS for TLS support for altcp API
+ * mbedtls include directory must be reachable via include search path
+ */
+#ifndef LWIP_ALTCP_TLS_MBEDTLS
+#define LWIP_ALTCP_TLS_MBEDTLS                        0
+#endif
+
+/** Configure debug level of this file */
+#ifndef ALTCP_MBEDTLS_DEBUG
+#define ALTCP_MBEDTLS_DEBUG                           LWIP_DBG_OFF
+#endif
+
+/** Configure lwIP debug level of the mbedTLS library */
+#ifndef ALTCP_MBEDTLS_LIB_DEBUG
+#define ALTCP_MBEDTLS_LIB_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/** Configure minimum internal debug level of the mbedTLS library */
+#ifndef ALTCP_MBEDTLS_LIB_DEBUG_LEVEL_MIN
+#define ALTCP_MBEDTLS_LIB_DEBUG_LEVEL_MIN             0
+#endif
+
+/** Enable the basic session cache
+ * ATTENTION: Using a session cache can lower security by reusing keys!
+ */
+#ifndef ALTCP_MBEDTLS_USE_SESSION_CACHE
+#define ALTCP_MBEDTLS_USE_SESSION_CACHE               0
+#endif
+
+/** Maximum cache size of the basic session cache */
+#ifndef ALTCP_MBEDTLS_SESSION_CACHE_SIZE
+#define ALTCP_MBEDTLS_SESSION_CACHE_SIZE              30
+#endif
+
+/** Set a session timeout in seconds for the basic session cache  */
+#ifndef ALTCP_MBEDTLS_SESSION_CACHE_TIMEOUT_SECONDS
+#define ALTCP_MBEDTLS_SESSION_CACHE_TIMEOUT_SECONDS   (60 * 60)
+#endif
+
+/** Use session tickets to speed up connection setup (needs
+ * MBEDTLS_SSL_SESSION_TICKETS enabled in mbedTLS config).
+ * ATTENTION: Using session tickets can lower security by reusing keys!
+ */
+#ifndef ALTCP_MBEDTLS_USE_SESSION_TICKETS
+#define ALTCP_MBEDTLS_USE_SESSION_TICKETS             0
+#endif
+
+/** Session ticket cipher */
+#ifndef ALTCP_MBEDTLS_SESSION_TICKET_CIPHER
+#define ALTCP_MBEDTLS_SESSION_TICKET_CIPHER           MBEDTLS_CIPHER_AES_256_GCM
+#endif
+
+/** Maximum timeout for session tickets */
+#ifndef ALTCP_MBEDTLS_SESSION_TICKET_TIMEOUT_SECONDS
+#define ALTCP_MBEDTLS_SESSION_TICKET_TIMEOUT_SECONDS  (60 * 60 * 24)
+#endif
+
+#endif /* LWIP_ALTCP */
+
+#endif /* LWIP_HDR_ALTCP_TLS_OPTS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/fs.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/fs.h
new file mode 100644
index 00000000000..67b9a60a9c3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/fs.h
@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
+ * All rights reserved. 
+ * 
+ * Redistribution and use in source and binary forms, with or without modification, 
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ * 
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_APPS_FS_H
+#define LWIP_HDR_APPS_FS_H
+
+#include "httpd_opts.h"
+#include "lwip/err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define FS_READ_EOF     -1
+#define FS_READ_DELAYED -2
+
+#if HTTPD_PRECALCULATED_CHECKSUM
+struct fsdata_chksum {
+  u32_t offset;
+  u16_t chksum;
+  u16_t len;
+};
+#endif /* HTTPD_PRECALCULATED_CHECKSUM */
+
+#define FS_FILE_FLAGS_HEADER_INCLUDED     0x01
+#define FS_FILE_FLAGS_HEADER_PERSISTENT   0x02
+#define FS_FILE_FLAGS_HEADER_HTTPVER_1_1  0x04
+#define FS_FILE_FLAGS_SSI                 0x08
+
+/** Define FS_FILE_EXTENSION_T_DEFINED if you have typedef'ed to your private
+ * pointer type (defaults to 'void' so the default usage is 'void*')
+ */
+#ifndef FS_FILE_EXTENSION_T_DEFINED
+typedef void fs_file_extension;
+#endif
+
+struct fs_file {
+  const char *data;
+  int len;
+  int index;
+  /* pextension is free for implementations to hold private (extensional)
+     arbitrary data, e.g. holding some file state or file system handle */
+  fs_file_extension *pextension;
+#if HTTPD_PRECALCULATED_CHECKSUM
+  const struct fsdata_chksum *chksum;
+  u16_t chksum_count;
+#endif /* HTTPD_PRECALCULATED_CHECKSUM */
+  u8_t flags;
+#if LWIP_HTTPD_CUSTOM_FILES
+  u8_t is_custom_file;
+#endif /* LWIP_HTTPD_CUSTOM_FILES */
+#if LWIP_HTTPD_FILE_STATE
+  void *state;
+#endif /* LWIP_HTTPD_FILE_STATE */
+};
+
+#if LWIP_HTTPD_FS_ASYNC_READ
+typedef void (*fs_wait_cb)(void *arg);
+#endif /* LWIP_HTTPD_FS_ASYNC_READ */
+
+err_t fs_open(struct fs_file *file, const char *name);
+void fs_close(struct fs_file *file);
+#if LWIP_HTTPD_DYNAMIC_FILE_READ
+#if LWIP_HTTPD_FS_ASYNC_READ
+int fs_read_async(struct fs_file *file, char *buffer, int count, fs_wait_cb callback_fn, void *callback_arg);
+#else /* LWIP_HTTPD_FS_ASYNC_READ */
+int fs_read(struct fs_file *file, char *buffer, int count);
+#endif /* LWIP_HTTPD_FS_ASYNC_READ */
+#endif /* LWIP_HTTPD_DYNAMIC_FILE_READ */
+#if LWIP_HTTPD_FS_ASYNC_READ
+int fs_is_file_ready(struct fs_file *file, fs_wait_cb callback_fn, void *callback_arg);
+#endif /* LWIP_HTTPD_FS_ASYNC_READ */
+int fs_bytes_left(struct fs_file *file);
+
+#if LWIP_HTTPD_FILE_STATE
+/** This user-defined function is called when a file is opened. */
+void *fs_state_init(struct fs_file *file, const char *name);
+/** This user-defined function is called when a file is closed. */
+void fs_state_free(struct fs_file *file, void *state);
+#endif /* #if LWIP_HTTPD_FILE_STATE */
+
+struct fsdata_file {
+  const struct fsdata_file *next;
+  const unsigned char *name;
+  const unsigned char *data;
+  int len;
+  u8_t flags;
+#if HTTPD_PRECALCULATED_CHECKSUM
+  u16_t chksum_count;
+  const struct fsdata_chksum *chksum;
+#endif /* HTTPD_PRECALCULATED_CHECKSUM */
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_FS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/http_client.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/http_client.h
new file mode 100644
index 00000000000..8a0630833f9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/http_client.h
@@ -0,0 +1,160 @@
+/**
+ * @file
+ * HTTP client
+ */
+
+/*
+ * Copyright (c) 2018 Simon Goldschmidt <goldsimon@gmx.de>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+
+#ifndef LWIP_HDR_APPS_HTTP_CLIENT_H
+#define LWIP_HDR_APPS_HTTP_CLIENT_H
+
+#include "lwip/opt.h"
+#include "lwip/ip_addr.h"
+#include "lwip/err.h"
+#include "lwip/altcp.h"
+#include "lwip/prot/iana.h"
+#include "lwip/pbuf.h"
+
+#if LWIP_TCP && LWIP_CALLBACK_API
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @ingroup httpc 
+ * HTTPC_HAVE_FILE_IO: define this to 1 to have functions dowloading directly
+ * to disk via fopen/fwrite.
+ * These functions are example implementations of the interface only.
+ */
+#ifndef LWIP_HTTPC_HAVE_FILE_IO
+#define LWIP_HTTPC_HAVE_FILE_IO   0
+#endif
+
+/**
+ * @ingroup httpc 
+ * The default TCP port used for HTTP
+ */
+#define HTTP_DEFAULT_PORT         LWIP_IANA_PORT_HTTP
+
+/**
+ * @ingroup httpc 
+ * HTTP client result codes
+ */
+typedef enum ehttpc_result {
+  /** File successfully received */
+  HTTPC_RESULT_OK            = 0,
+  /** Unknown error */
+  HTTPC_RESULT_ERR_UNKNOWN   = 1,
+  /** Connection to server failed */
+  HTTPC_RESULT_ERR_CONNECT   = 2,
+  /** Failed to resolve server hostname */
+  HTTPC_RESULT_ERR_HOSTNAME  = 3,
+  /** Connection unexpectedly closed by remote server */
+  HTTPC_RESULT_ERR_CLOSED    = 4,
+  /** Connection timed out (server didn't respond in time) */
+  HTTPC_RESULT_ERR_TIMEOUT   = 5,
+  /** Server responded with an error code */
+  HTTPC_RESULT_ERR_SVR_RESP  = 6,
+  /** Local memory error */
+  HTTPC_RESULT_ERR_MEM       = 7,
+  /** Local abort */
+  HTTPC_RESULT_LOCAL_ABORT   = 8,
+  /** Content length mismatch */
+  HTTPC_RESULT_ERR_CONTENT_LEN = 9
+} httpc_result_t;
+
+typedef struct _httpc_state httpc_state_t;
+
+/**
+ * @ingroup httpc 
+ * Prototype of a http client callback function
+ *
+ * @param arg argument specified when initiating the request
+ * @param httpc_result result of the http transfer (see enum httpc_result_t)
+ * @param rx_content_len number of bytes received (without headers)
+ * @param srv_res this contains the http status code received (if any)
+ * @param err an error returned by internal lwip functions, can help to specify
+ *            the source of the error but must not necessarily be != ERR_OK
+ */
+typedef void (*httpc_result_fn)(void *arg, httpc_result_t httpc_result, u32_t rx_content_len, u32_t srv_res, err_t err);
+
+/**
+ * @ingroup httpc 
+ * Prototype of http client callback: called when the headers are received
+ *
+ * @param connection http client connection
+ * @param arg argument specified when initiating the request
+ * @param hdr header pbuf(s) (may contain data also)
+ * @param hdr_len length of the heders in 'hdr'
+ * @param content_len content length as received in the headers (-1 if not received)
+ * @return if != ERR_OK is returned, the connection is aborted
+ */
+typedef err_t (*httpc_headers_done_fn)(httpc_state_t *connection, void *arg, struct pbuf *hdr, u16_t hdr_len, u32_t content_len);
+
+typedef struct _httpc_connection {
+  ip_addr_t proxy_addr;
+  u16_t proxy_port;
+  u8_t use_proxy;
+  /* @todo: add username:pass? */
+
+#if LWIP_ALTCP
+  altcp_allocator_t *altcp_allocator;
+#endif
+
+  /* this callback is called when the transfer is finished (or aborted) */
+  httpc_result_fn result_fn;
+  /* this callback is called after receiving the http headers
+     It can abort the connection by returning != ERR_OK */
+  httpc_headers_done_fn headers_done_fn;
+} httpc_connection_t;
+
+err_t httpc_get_file(const ip_addr_t* server_addr, u16_t port, const char* uri, const httpc_connection_t *settings,
+                     altcp_recv_fn recv_fn, void* callback_arg, httpc_state_t **connection);
+err_t httpc_get_file_dns(const char* server_name, u16_t port, const char* uri, const httpc_connection_t *settings,
+                     altcp_recv_fn recv_fn, void* callback_arg, httpc_state_t **connection);
+
+#if LWIP_HTTPC_HAVE_FILE_IO
+err_t httpc_get_file_to_disk(const ip_addr_t* server_addr, u16_t port, const char* uri, const httpc_connection_t *settings,
+                     void* callback_arg, const char* local_file_name, httpc_state_t **connection);
+err_t httpc_get_file_dns_to_disk(const char* server_name, u16_t port, const char* uri, const httpc_connection_t *settings,
+                     void* callback_arg, const char* local_file_name, httpc_state_t **connection);
+#endif /* LWIP_HTTPC_HAVE_FILE_IO */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_TCP && LWIP_CALLBACK_API */
+
+#endif /* LWIP_HDR_APPS_HTTP_CLIENT_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/httpd.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/httpd.h
new file mode 100644
index 00000000000..e872429f2ee
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/httpd.h
@@ -0,0 +1,255 @@
+/**
+ * @file
+ * HTTP server
+ */
+
+/*
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ * This version of the file has been modified by Texas Instruments to offer
+ * simple server-side-include (SSI) and Common Gateway Interface (CGI)
+ * capability.
+ */
+
+#ifndef LWIP_HDR_APPS_HTTPD_H
+#define LWIP_HDR_APPS_HTTPD_H
+
+#include "httpd_opts.h"
+#include "lwip/err.h"
+#include "lwip/pbuf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_HTTPD_CGI
+
+/**
+ * @ingroup httpd
+ * Function pointer for a CGI script handler.
+ *
+ * This function is called each time the HTTPD server is asked for a file
+ * whose name was previously registered as a CGI function using a call to
+ * http_set_cgi_handlers. The iIndex parameter provides the index of the
+ * CGI within the cgis array passed to http_set_cgi_handlers. Parameters
+ * pcParam and pcValue provide access to the parameters provided along with
+ * the URI. iNumParams provides a count of the entries in the pcParam and
+ * pcValue arrays. Each entry in the pcParam array contains the name of a
+ * parameter with the corresponding entry in the pcValue array containing the
+ * value for that parameter. Note that pcParam may contain multiple elements
+ * with the same name if, for example, a multi-selection list control is used
+ * in the form generating the data.
+ *
+ * The function should return a pointer to a character string which is the
+ * path and filename of the response that is to be sent to the connected
+ * browser, for example "/thanks.htm" or "/response/error.ssi".
+ *
+ * The maximum number of parameters that will be passed to this function via
+ * iNumParams is defined by LWIP_HTTPD_MAX_CGI_PARAMETERS. Any parameters in
+ * the incoming HTTP request above this number will be discarded.
+ *
+ * Requests intended for use by this CGI mechanism must be sent using the GET
+ * method (which encodes all parameters within the URI rather than in a block
+ * later in the request). Attempts to use the POST method will result in the
+ * request being ignored.
+ *
+ */
+typedef const char *(*tCGIHandler)(int iIndex, int iNumParams, char *pcParam[],
+                             char *pcValue[]);
+
+/**
+ * @ingroup httpd
+ * Structure defining the base filename (URL) of a CGI and the associated
+ * function which is to be called when that URL is requested.
+ */
+typedef struct
+{
+    const char *pcCGIName;
+    tCGIHandler pfnCGIHandler;
+} tCGI;
+
+void http_set_cgi_handlers(const tCGI *pCGIs, int iNumHandlers);
+
+#endif /* LWIP_HTTPD_CGI */
+
+#if LWIP_HTTPD_CGI || LWIP_HTTPD_CGI_SSI
+
+#if LWIP_HTTPD_CGI_SSI
+/* we have to prototype this struct here to make it available for the handler */
+struct fs_file;
+
+/** Define this generic CGI handler in your application.
+ * It is called once for every URI with parameters.
+ * The parameters can be stored to the object passed as connection_state, which
+ * is allocated to file->state via fs_state_init() from fs_open() or fs_open_custom().
+ * Content creation via SSI or complete dynamic files can retrieve the CGI params from there.
+ */
+extern void httpd_cgi_handler(struct fs_file *file, const char* uri, int iNumParams,
+                              char **pcParam, char **pcValue
+#if defined(LWIP_HTTPD_FILE_STATE) && LWIP_HTTPD_FILE_STATE
+                                     , void *connection_state
+#endif /* LWIP_HTTPD_FILE_STATE */
+                                     );
+#endif /* LWIP_HTTPD_CGI_SSI */
+
+#endif /* LWIP_HTTPD_CGI || LWIP_HTTPD_CGI_SSI */
+
+#if LWIP_HTTPD_SSI
+
+/**
+ * @ingroup httpd
+ * Function pointer for the SSI tag handler callback.
+ *
+ * This function will be called each time the HTTPD server detects a tag of the
+ * form <!--#name--> in files with extensions mentioned in the g_pcSSIExtensions
+ * array (currently .shtml, .shtm, .ssi, .xml, .json) where "name" appears as
+ * one of the tags supplied to http_set_ssi_handler in the tags array.  The
+ * returned insert string, which will be appended after the the string
+ * "<!--#name-->" in file sent back to the client, should be written to pointer
+ * pcInsert. iInsertLen contains the size of the buffer pointed to by
+ * pcInsert. The iIndex parameter provides the zero-based index of the tag as
+ * found in the tags array and identifies the tag that is to be processed.
+ *
+ * The handler returns the number of characters written to pcInsert excluding
+ * any terminating NULL or HTTPD_SSI_TAG_UNKNOWN when tag is not recognized.
+ *
+ * Note that the behavior of this SSI mechanism is somewhat different from the
+ * "normal" SSI processing as found in, for example, the Apache web server.  In
+ * this case, the inserted text is appended following the SSI tag rather than
+ * replacing the tag entirely.  This allows for an implementation that does not
+ * require significant additional buffering of output data yet which will still
+ * offer usable SSI functionality. One downside to this approach is when
+ * attempting to use SSI within JavaScript.  The SSI tag is structured to
+ * resemble an HTML comment but this syntax does not constitute a comment
+ * within JavaScript and, hence, leaving the tag in place will result in
+ * problems in these cases. In order to avoid these problems, define
+ * LWIP_HTTPD_SSI_INCLUDE_TAG as zero in your lwip options file, or use JavaScript
+ * style block comments in the form / * # name * / (without the spaces).
+ */
+typedef u16_t (*tSSIHandler)(
+#if LWIP_HTTPD_SSI_RAW
+                             const char* ssi_tag_name,
+#else /* LWIP_HTTPD_SSI_RAW */
+                             int iIndex,
+#endif /* LWIP_HTTPD_SSI_RAW */
+                             char *pcInsert, int iInsertLen
+#if LWIP_HTTPD_SSI_MULTIPART
+                             , u16_t current_tag_part, u16_t *next_tag_part
+#endif /* LWIP_HTTPD_SSI_MULTIPART */
+#if defined(LWIP_HTTPD_FILE_STATE) && LWIP_HTTPD_FILE_STATE
+                             , void *connection_state
+#endif /* LWIP_HTTPD_FILE_STATE */
+                             );
+
+/** Set the SSI handler function
+ * (if LWIP_HTTPD_SSI_RAW==1, only the first argument is used)
+ */
+void http_set_ssi_handler(tSSIHandler pfnSSIHandler,
+                          const char **ppcTags, int iNumTags);
+
+/** For LWIP_HTTPD_SSI_RAW==1, return this to indicate the tag is unknown.
+ * In this case, the webserver writes a warning into the page.
+ * You can also just return 0 to write nothing for unknown tags.
+ */
+#define HTTPD_SSI_TAG_UNKNOWN 0xFFFF
+
+#endif /* LWIP_HTTPD_SSI */
+
+#if LWIP_HTTPD_SUPPORT_POST
+
+/* These functions must be implemented by the application */
+
+/**
+ * @ingroup httpd
+ * Called when a POST request has been received. The application can decide
+ * whether to accept it or not.
+ *
+ * @param connection Unique connection identifier, valid until httpd_post_end
+ *        is called.
+ * @param uri The HTTP header URI receiving the POST request.
+ * @param http_request The raw HTTP request (the first packet, normally).
+ * @param http_request_len Size of 'http_request'.
+ * @param content_len Content-Length from HTTP header.
+ * @param response_uri Filename of response file, to be filled when denying the
+ *        request
+ * @param response_uri_len Size of the 'response_uri' buffer.
+ * @param post_auto_wnd Set this to 0 to let the callback code handle window
+ *        updates by calling 'httpd_post_data_recved' (to throttle rx speed)
+ *        default is 1 (httpd handles window updates automatically)
+ * @return ERR_OK: Accept the POST request, data may be passed in
+ *         another err_t: Deny the POST request, send back 'bad request'.
+ */
+err_t httpd_post_begin(void *connection, const char *uri, const char *http_request,
+                       u16_t http_request_len, int content_len, char *response_uri,
+                       u16_t response_uri_len, u8_t *post_auto_wnd);
+
+/**
+ * @ingroup httpd
+ * Called for each pbuf of data that has been received for a POST.
+ * ATTENTION: The application is responsible for freeing the pbufs passed in!
+ *
+ * @param connection Unique connection identifier.
+ * @param p Received data.
+ * @return ERR_OK: Data accepted.
+ *         another err_t: Data denied, http_post_get_response_uri will be called.
+ */
+err_t httpd_post_receive_data(void *connection, struct pbuf *p);
+
+/**
+ * @ingroup httpd
+ * Called when all data is received or when the connection is closed.
+ * The application must return the filename/URI of a file to send in response
+ * to this POST request. If the response_uri buffer is untouched, a 404
+ * response is returned.
+ *
+ * @param connection Unique connection identifier.
+ * @param response_uri Filename of response file, to be filled when denying the request
+ * @param response_uri_len Size of the 'response_uri' buffer.
+ */
+void httpd_post_finished(void *connection, char *response_uri, u16_t response_uri_len);
+
+#if LWIP_HTTPD_POST_MANUAL_WND
+void httpd_post_data_recved(void *connection, u16_t recved_len);
+#endif /* LWIP_HTTPD_POST_MANUAL_WND */
+
+#endif /* LWIP_HTTPD_SUPPORT_POST */
+
+void httpd_init(void);
+
+#if HTTPD_ENABLE_HTTPS
+struct altcp_tls_config;
+void httpd_inits(struct altcp_tls_config *conf);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_HTTPD_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/httpd_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/httpd_opts.h
new file mode 100644
index 00000000000..8723961fd4b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/httpd_opts.h
@@ -0,0 +1,396 @@
+/**
+ * @file
+ * HTTP server options list
+ */
+
+/*
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ * This version of the file has been modified by Texas Instruments to offer
+ * simple server-side-include (SSI) and Common Gateway Interface (CGI)
+ * capability.
+ */
+
+#ifndef LWIP_HDR_APPS_HTTPD_OPTS_H
+#define LWIP_HDR_APPS_HTTPD_OPTS_H
+
+#include "lwip/opt.h"
+#include "lwip/prot/iana.h"
+
+/**
+ * @defgroup httpd_opts Options
+ * @ingroup httpd
+ * @{
+ */
+
+/** Set this to 1 to support CGI (old style).
+ *
+ * This old style CGI support works by registering an array of URLs and
+ * associated CGI handler functions (@ref http_set_cgi_handlers).
+ * This list is scanned just before fs_open is called from request handling.
+ * The handler can return a new URL that is used internally by the httpd to
+ * load the returned page (passed to fs_open).
+ *
+ * Use this CGI type e.g. to execute specific actions and return a page that
+ * does not depend on the CGI parameters.
+ */
+#if !defined LWIP_HTTPD_CGI || defined __DOXYGEN__
+#define LWIP_HTTPD_CGI            0
+#endif
+
+/** Set this to 1 to support CGI (new style).
+ *
+ * This new style CGI support works by calling a global function
+ * (@ref tCGIHandler) for all URLs that are found. fs_open is called first
+ * and the URL can not be written by the CGI handler. Instead, this handler gets
+ * passed the http file state, an object where it can store information derived
+ * from the CGI URL or parameters. This file state is later passed to SSI, so
+ * the SSI code can return data depending on CGI input.
+ *
+ * Use this CGI handler if you want CGI information passed on to SSI.
+ */
+#if !defined LWIP_HTTPD_CGI_SSI || defined __DOXYGEN__
+#define LWIP_HTTPD_CGI_SSI        0
+#endif
+
+/** Set this to 1 to support SSI (Server-Side-Includes)
+ *
+ * In contrast to other http servers, this only calls a preregistered callback
+ * function (@see http_set_ssi_handler) for each tag (in the format of
+ * <!--#tag-->) encountered in SSI-enabled pages.
+ * SSI-enabled pages must have one of the predefined SSI-enabled file extensions.
+ * All files with one of these extensions are parsed when sent.
+ *
+ * A downside of the current SSI implementation is that persistent connections
+ * don't work, as the file length is not known in advance (and httpd currently
+ * relies on the Content-Length header for persistent connections).
+ *
+ * To save memory, the maximum tag length is limited (@see LWIP_HTTPD_MAX_TAG_NAME_LEN).
+ * To save memory, the maximum insertion string length is limited (@see
+ * LWIP_HTTPD_MAX_TAG_INSERT_LEN). If this is not enought, @ref LWIP_HTTPD_SSI_MULTIPART
+ * can be used.
+ */
+#if !defined LWIP_HTTPD_SSI || defined __DOXYGEN__
+#define LWIP_HTTPD_SSI            0
+#endif
+
+/** Set this to 1 to implement an SSI tag handler callback that gets a const char*
+ * to the tag (instead of an index into a pre-registered array of known tags)
+ * If this is 0, the SSI handler callback function is only called pre-registered tags.
+ */
+#if !defined LWIP_HTTPD_SSI_RAW || defined __DOXYGEN__
+#define LWIP_HTTPD_SSI_RAW        0
+#endif
+
+/** Set this to 0 to prevent parsing the file extension at runtime to decide
+ * if a file should be scanned for SSI tags or not.
+ * Default is 1 (file extensions are checked using the g_pcSSIExtensions array)
+ * Set to 2 to override this runtime test function.
+ *
+ * This is enabled by default, but if you only use a newer version of makefsdata
+ * supporting the "-ssi" option, this info is already present in
+ */
+#if !defined LWIP_HTTPD_SSI_BY_FILE_EXTENSION || defined __DOXYGEN__
+#define LWIP_HTTPD_SSI_BY_FILE_EXTENSION  1
+#endif
+
+/** Set this to 1 to support HTTP POST */
+#if !defined LWIP_HTTPD_SUPPORT_POST || defined __DOXYGEN__
+#define LWIP_HTTPD_SUPPORT_POST   0
+#endif
+
+/* The maximum number of parameters that the CGI handler can be sent. */
+#if !defined LWIP_HTTPD_MAX_CGI_PARAMETERS || defined __DOXYGEN__
+#define LWIP_HTTPD_MAX_CGI_PARAMETERS 16
+#endif
+
+/** LWIP_HTTPD_SSI_MULTIPART==1: SSI handler function is called with 2 more
+ * arguments indicating a counter for insert string that are too long to be
+ * inserted at once: the SSI handler function must then set 'next_tag_part'
+ * which will be passed back to it in the next call. */
+#if !defined LWIP_HTTPD_SSI_MULTIPART || defined __DOXYGEN__
+#define LWIP_HTTPD_SSI_MULTIPART    0
+#endif
+
+/* The maximum length of the string comprising the SSI tag name
+ * ATTENTION: tags longer than this are ignored, not truncated!
+ */
+#if !defined LWIP_HTTPD_MAX_TAG_NAME_LEN || defined __DOXYGEN__
+#define LWIP_HTTPD_MAX_TAG_NAME_LEN 8
+#endif
+
+/* The maximum length of string that can be returned to replace any given tag
+ * If this buffer is not long enough, use LWIP_HTTPD_SSI_MULTIPART.
+ */
+#if !defined LWIP_HTTPD_MAX_TAG_INSERT_LEN || defined __DOXYGEN__
+#define LWIP_HTTPD_MAX_TAG_INSERT_LEN 192
+#endif
+
+#if !defined LWIP_HTTPD_POST_MANUAL_WND || defined __DOXYGEN__
+#define LWIP_HTTPD_POST_MANUAL_WND  0
+#endif
+
+/** This string is passed in the HTTP header as "Server: " */
+#if !defined HTTPD_SERVER_AGENT || defined __DOXYGEN__
+#define HTTPD_SERVER_AGENT "lwIP/" LWIP_VERSION_STRING " (http://savannah.nongnu.org/projects/lwip)"
+#endif
+
+/** Set this to 1 if you want to include code that creates HTTP headers
+ * at runtime. Default is off: HTTP headers are then created statically
+ * by the makefsdata tool. Static headers mean smaller code size, but
+ * the (readonly) fsdata will grow a bit as every file includes the HTTP
+ * header. */
+#if !defined LWIP_HTTPD_DYNAMIC_HEADERS || defined __DOXYGEN__
+#define LWIP_HTTPD_DYNAMIC_HEADERS 0
+#endif
+
+#if !defined HTTPD_DEBUG || defined __DOXYGEN__
+#define HTTPD_DEBUG         LWIP_DBG_OFF
+#endif
+
+/** Set this to 1 to use a memp pool for allocating 
+ * struct http_state instead of the heap.
+ * If enabled, you'll need to define MEMP_NUM_PARALLEL_HTTPD_CONNS
+ * (and MEMP_NUM_PARALLEL_HTTPD_SSI_CONNS for SSI) to set the size of
+ * the pool(s).
+ */
+#if !defined HTTPD_USE_MEM_POOL || defined __DOXYGEN__
+#define HTTPD_USE_MEM_POOL  0
+#endif
+
+/** The server port for HTTPD to use */
+#if !defined HTTPD_SERVER_PORT || defined __DOXYGEN__
+#define HTTPD_SERVER_PORT                   LWIP_IANA_PORT_HTTP
+#endif
+
+/** The https server port for HTTPD to use */
+#if !defined HTTPD_SERVER_PORT_HTTPS || defined __DOXYGEN__
+#define HTTPD_SERVER_PORT_HTTPS             LWIP_IANA_PORT_HTTPS
+#endif
+
+/** Enable https support? */
+#if !defined HTTPD_ENABLE_HTTPS || defined __DOXYGEN__
+#define HTTPD_ENABLE_HTTPS                  0
+#endif
+
+/** Maximum retries before the connection is aborted/closed.
+ * - number of times pcb->poll is called -> default is 4*500ms = 2s;
+ * - reset when pcb->sent is called
+ */
+#if !defined HTTPD_MAX_RETRIES || defined __DOXYGEN__
+#define HTTPD_MAX_RETRIES                   4
+#endif
+
+/** The poll delay is X*500ms */
+#if !defined HTTPD_POLL_INTERVAL || defined __DOXYGEN__
+#define HTTPD_POLL_INTERVAL                 4
+#endif
+
+/** Priority for tcp pcbs created by HTTPD (very low by default).
+ *  Lower priorities get killed first when running out of memory.
+ */
+#if !defined HTTPD_TCP_PRIO || defined __DOXYGEN__
+#define HTTPD_TCP_PRIO                      TCP_PRIO_MIN
+#endif
+
+/** Set this to 1 to enable timing each file sent */
+#if !defined LWIP_HTTPD_TIMING || defined __DOXYGEN__
+#define LWIP_HTTPD_TIMING                   0
+#endif
+/** Set this to 1 to enable timing each file sent */
+#if !defined HTTPD_DEBUG_TIMING || defined __DOXYGEN__
+#define HTTPD_DEBUG_TIMING                  LWIP_DBG_OFF
+#endif
+
+/** Set this to one to show error pages when parsing a request fails instead
+    of simply closing the connection. */
+#if !defined LWIP_HTTPD_SUPPORT_EXTSTATUS || defined __DOXYGEN__
+#define LWIP_HTTPD_SUPPORT_EXTSTATUS        0
+#endif
+
+/** Set this to 0 to drop support for HTTP/0.9 clients (to save some bytes) */
+#if !defined LWIP_HTTPD_SUPPORT_V09 || defined __DOXYGEN__
+#define LWIP_HTTPD_SUPPORT_V09              1
+#endif
+
+/** Set this to 1 to enable HTTP/1.1 persistent connections.
+ * ATTENTION: If the generated file system includes HTTP headers, these must
+ * include the "Connection: keep-alive" header (pass argument "-11" to makefsdata).
+ */
+#if !defined LWIP_HTTPD_SUPPORT_11_KEEPALIVE || defined __DOXYGEN__
+#define LWIP_HTTPD_SUPPORT_11_KEEPALIVE     0
+#endif
+
+/** Set this to 1 to support HTTP request coming in in multiple packets/pbufs */
+#if !defined LWIP_HTTPD_SUPPORT_REQUESTLIST || defined __DOXYGEN__
+#define LWIP_HTTPD_SUPPORT_REQUESTLIST      1
+#endif
+
+#if LWIP_HTTPD_SUPPORT_REQUESTLIST
+/** Number of rx pbufs to enqueue to parse an incoming request (up to the first
+    newline) */
+#if !defined LWIP_HTTPD_REQ_QUEUELEN || defined __DOXYGEN__
+#define LWIP_HTTPD_REQ_QUEUELEN             5
+#endif
+
+/** Number of (TCP payload-) bytes (in pbufs) to enqueue to parse and incoming
+    request (up to the first double-newline) */
+#if !defined LWIP_HTTPD_REQ_BUFSIZE || defined __DOXYGEN__
+#define LWIP_HTTPD_REQ_BUFSIZE              LWIP_HTTPD_MAX_REQ_LENGTH
+#endif
+
+/** Defines the maximum length of a HTTP request line (up to the first CRLF,
+    copied from pbuf into this a global buffer when pbuf- or packet-queues
+    are received - otherwise the input pbuf is used directly) */
+#if !defined LWIP_HTTPD_MAX_REQ_LENGTH || defined __DOXYGEN__
+#define LWIP_HTTPD_MAX_REQ_LENGTH           LWIP_MIN(1023, (LWIP_HTTPD_REQ_QUEUELEN * PBUF_POOL_BUFSIZE))
+#endif
+#endif /* LWIP_HTTPD_SUPPORT_REQUESTLIST */
+
+/** This is the size of a static buffer used when URIs end with '/'.
+ * In this buffer, the directory requested is concatenated with all the
+ * configured default file names.
+ * Set to 0 to disable checking default filenames on non-root directories.
+ */
+#if !defined LWIP_HTTPD_MAX_REQUEST_URI_LEN || defined __DOXYGEN__
+#define LWIP_HTTPD_MAX_REQUEST_URI_LEN      63
+#endif
+
+/** Maximum length of the filename to send as response to a POST request,
+ * filled in by the application when a POST is finished.
+ */
+#if !defined LWIP_HTTPD_POST_MAX_RESPONSE_URI_LEN || defined __DOXYGEN__
+#define LWIP_HTTPD_POST_MAX_RESPONSE_URI_LEN 63
+#endif
+
+/** Set this to 0 to not send the SSI tag (default is on, so the tag will
+ * be sent in the HTML page */
+#if !defined LWIP_HTTPD_SSI_INCLUDE_TAG || defined __DOXYGEN__
+#define LWIP_HTTPD_SSI_INCLUDE_TAG           1
+#endif
+
+/** Set this to 1 to call tcp_abort when tcp_close fails with memory error.
+ * This can be used to prevent consuming all memory in situations where the
+ * HTTP server has low priority compared to other communication. */
+#if !defined LWIP_HTTPD_ABORT_ON_CLOSE_MEM_ERROR || defined __DOXYGEN__
+#define LWIP_HTTPD_ABORT_ON_CLOSE_MEM_ERROR  0
+#endif
+
+/** Set this to 1 to kill the oldest connection when running out of
+ * memory for 'struct http_state' or 'struct http_ssi_state'.
+ * ATTENTION: This puts all connections on a linked list, so may be kind of slow.
+ */
+#if !defined LWIP_HTTPD_KILL_OLD_ON_CONNECTIONS_EXCEEDED || defined __DOXYGEN__
+#define LWIP_HTTPD_KILL_OLD_ON_CONNECTIONS_EXCEEDED 0
+#endif
+
+/** Set this to 1 to send URIs without extension without headers
+ * (who uses this at all??) */
+#if !defined LWIP_HTTPD_OMIT_HEADER_FOR_EXTENSIONLESS_URI || defined __DOXYGEN__
+#define LWIP_HTTPD_OMIT_HEADER_FOR_EXTENSIONLESS_URI 0
+#endif
+
+/** Default: Tags are sent from struct http_state and are therefore volatile */
+#if !defined HTTP_IS_TAG_VOLATILE || defined __DOXYGEN__
+#define HTTP_IS_TAG_VOLATILE(ptr) TCP_WRITE_FLAG_COPY
+#endif
+
+/* By default, the httpd is limited to send 2*pcb->mss to keep resource usage low
+   when http is not an important protocol in the device. */
+#if !defined HTTPD_LIMIT_SENDING_TO_2MSS || defined __DOXYGEN__
+#define HTTPD_LIMIT_SENDING_TO_2MSS 1
+#endif
+
+/* Define this to a function that returns the maximum amount of data to enqueue.
+   The function have this signature: u16_t fn(struct altcp_pcb* pcb);
+   The best place to define this is the hooks file (@see LWIP_HOOK_FILENAME) */
+#if !defined HTTPD_MAX_WRITE_LEN || defined __DOXYGEN__
+#if HTTPD_LIMIT_SENDING_TO_2MSS
+#define HTTPD_MAX_WRITE_LEN(pcb)    ((u16_t)(2 * altcp_mss(pcb)))
+#endif
+#endif
+
+/*------------------- FS OPTIONS -------------------*/
+
+/** Set this to 1 and provide the functions:
+ * - "int fs_open_custom(struct fs_file *file, const char *name)"
+ *    Called first for every opened file to allow opening files
+ *    that are not included in fsdata(_custom).c
+ * - "void fs_close_custom(struct fs_file *file)"
+ *    Called to free resources allocated by fs_open_custom().
+ */
+#if !defined LWIP_HTTPD_CUSTOM_FILES || defined __DOXYGEN__
+#define LWIP_HTTPD_CUSTOM_FILES       0
+#endif
+
+/** Set this to 1 to support fs_read() to dynamically read file data.
+ * Without this (default=off), only one-block files are supported,
+ * and the contents must be ready after fs_open().
+ */
+#if !defined LWIP_HTTPD_DYNAMIC_FILE_READ || defined __DOXYGEN__
+#define LWIP_HTTPD_DYNAMIC_FILE_READ  0
+#endif
+
+/** Set this to 1 to include an application state argument per file
+ * that is opened. This allows to keep a state per connection/file.
+ */
+#if !defined LWIP_HTTPD_FILE_STATE || defined __DOXYGEN__
+#define LWIP_HTTPD_FILE_STATE         0
+#endif
+
+/** HTTPD_PRECALCULATED_CHECKSUM==1: include precompiled checksums for
+ * predefined (MSS-sized) chunks of the files to prevent having to calculate
+ * the checksums at runtime. */
+#if !defined HTTPD_PRECALCULATED_CHECKSUM || defined __DOXYGEN__
+#define HTTPD_PRECALCULATED_CHECKSUM  0
+#endif
+
+/** LWIP_HTTPD_FS_ASYNC_READ==1: support asynchronous read operations
+ * (fs_read_async returns FS_READ_DELAYED and calls a callback when finished).
+ */
+#if !defined LWIP_HTTPD_FS_ASYNC_READ || defined __DOXYGEN__
+#define LWIP_HTTPD_FS_ASYNC_READ      0
+#endif
+
+/** Filename (including path) to use as FS data file */
+#if !defined HTTPD_FSDATA_FILE || defined __DOXYGEN__
+/* HTTPD_USE_CUSTOM_FSDATA: Compatibility with deprecated lwIP option */
+#if defined(HTTPD_USE_CUSTOM_FSDATA) && (HTTPD_USE_CUSTOM_FSDATA != 0)
+#define HTTPD_FSDATA_FILE "fsdata_custom.c"
+#else
+#define HTTPD_FSDATA_FILE "fsdata.c"
+#endif
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* LWIP_HDR_APPS_HTTPD_OPTS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/lwiperf.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/lwiperf.h
new file mode 100644
index 00000000000..cc86e7f8781
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/lwiperf.h
@@ -0,0 +1,100 @@
+/**
+ * @file
+ * lwIP iPerf server implementation
+ */
+
+/*
+ * Copyright (c) 2014 Simon Goldschmidt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt
+ *
+ */
+#ifndef LWIP_HDR_APPS_LWIPERF_H
+#define LWIP_HDR_APPS_LWIPERF_H
+
+#include "lwip/opt.h"
+#include "lwip/ip_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LWIPERF_TCP_PORT_DEFAULT  5001
+
+/** lwIPerf test results */
+enum lwiperf_report_type
+{
+  /** The server side test is done */
+  LWIPERF_TCP_DONE_SERVER,
+  /** The client side test is done */
+  LWIPERF_TCP_DONE_CLIENT,
+  /** Local error lead to test abort */
+  LWIPERF_TCP_ABORTED_LOCAL,
+  /** Data check error lead to test abort */
+  LWIPERF_TCP_ABORTED_LOCAL_DATAERROR,
+  /** Transmit error lead to test abort */
+  LWIPERF_TCP_ABORTED_LOCAL_TXERROR,
+  /** Remote side aborted the test */
+  LWIPERF_TCP_ABORTED_REMOTE
+};
+
+/** Control */
+enum lwiperf_client_type
+{
+  /** Unidirectional tx only test */
+  LWIPERF_CLIENT,
+  /** Do a bidirectional test simultaneously */
+  LWIPERF_DUAL,
+  /** Do a bidirectional test individually */
+  LWIPERF_TRADEOFF
+};
+
+/** Prototype of a report function that is called when a session is finished.
+    This report function can show the test results.
+    @param report_type contains the test result */
+typedef void (*lwiperf_report_fn)(void *arg, enum lwiperf_report_type report_type,
+  const ip_addr_t* local_addr, u16_t local_port, const ip_addr_t* remote_addr, u16_t remote_port,
+  u32_t bytes_transferred, u32_t ms_duration, u32_t bandwidth_kbitpsec);
+
+void* lwiperf_start_tcp_server(const ip_addr_t* local_addr, u16_t local_port,
+                               lwiperf_report_fn report_fn, void* report_arg);
+void* lwiperf_start_tcp_server_default(lwiperf_report_fn report_fn, void* report_arg);
+void* lwiperf_start_tcp_client(const ip_addr_t* remote_addr, u16_t remote_port,
+                               enum lwiperf_client_type type,
+                               lwiperf_report_fn report_fn, void* report_arg);
+void* lwiperf_start_tcp_client_default(const ip_addr_t* remote_addr,
+                               lwiperf_report_fn report_fn, void* report_arg);
+
+void  lwiperf_abort(void* lwiperf_session);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_LWIPERF_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mdns.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mdns.h
new file mode 100644
index 00000000000..20d7ee2a261
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mdns.h
@@ -0,0 +1,105 @@
+/**
+ * @file
+ * MDNS responder
+ */
+
+ /*
+ * Copyright (c) 2015 Verisure Innovation AB
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Erik Ekman <erik@kryo.se>
+ *
+ */
+
+#ifndef LWIP_HDR_APPS_MDNS_H
+#define LWIP_HDR_APPS_MDNS_H
+
+#include "lwip/apps/mdns_opts.h"
+#include "lwip/netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_MDNS_RESPONDER
+
+enum mdns_sd_proto {
+  DNSSD_PROTO_UDP = 0,
+  DNSSD_PROTO_TCP = 1
+};
+
+#define MDNS_PROBING_CONFLICT   0
+#define MDNS_PROBING_SUCCESSFUL 1
+
+#define MDNS_LABEL_MAXLEN  63
+
+struct mdns_host;
+struct mdns_service;
+
+/** Callback function to add text to a reply, called when generating the reply */
+typedef void (*service_get_txt_fn_t)(struct mdns_service *service, void *txt_userdata);
+
+/** Callback function to let application know the result of probing network for name
+ * uniqueness, called with result MDNS_PROBING_SUCCESSFUL if no other node claimed
+ * use for the name for the netif or a service and is safe to use, or MDNS_PROBING_CONFLICT
+ * if another node is already using it and mdns is disabled on this interface */
+typedef void (*mdns_name_result_cb_t)(struct netif* netif, u8_t result);
+
+void mdns_resp_init(void);
+
+void mdns_resp_register_name_result_cb(mdns_name_result_cb_t cb);
+
+err_t mdns_resp_add_netif(struct netif *netif, const char *hostname, u32_t dns_ttl);
+err_t mdns_resp_remove_netif(struct netif *netif);
+err_t mdns_resp_rename_netif(struct netif *netif, const char *hostname);
+
+s8_t  mdns_resp_add_service(struct netif *netif, const char *name, const char *service, enum mdns_sd_proto proto, u16_t port, u32_t dns_ttl, service_get_txt_fn_t txt_fn, void *txt_userdata);
+err_t mdns_resp_del_service(struct netif *netif, s8_t slot);
+err_t mdns_resp_rename_service(struct netif *netif, s8_t slot, const char *name);
+
+err_t mdns_resp_add_service_txtitem(struct mdns_service *service, const char *txt, u8_t txt_len);
+
+void mdns_resp_restart(struct netif *netif);
+void mdns_resp_announce(struct netif *netif);
+
+/**
+ * @ingroup mdns
+ * Announce IP settings have changed on netif.
+ * Call this in your callback registered by netif_set_status_callback().
+ * No need to call this function when LWIP_NETIF_EXT_STATUS_CALLBACK==1,
+ * this handled automatically for you.
+ * @param netif The network interface where settings have changed.
+ */
+#define mdns_resp_netif_settings_changed(netif) mdns_resp_announce(netif)
+
+#endif /* LWIP_MDNS_RESPONDER */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_MDNS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mdns_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mdns_opts.h
new file mode 100644
index 00000000000..45f2c50cac8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mdns_opts.h
@@ -0,0 +1,81 @@
+/**
+ * @file
+ * MDNS responder
+ */
+
+ /*
+ * Copyright (c) 2015 Verisure Innovation AB
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Erik Ekman <erik@kryo.se>
+ *
+ */
+
+#ifndef LWIP_HDR_APPS_MDNS_OPTS_H
+#define LWIP_HDR_APPS_MDNS_OPTS_H
+
+#include "lwip/opt.h"
+
+/**
+ * @defgroup mdns_opts Options
+ * @ingroup mdns
+ * @{
+ */
+
+/**
+ * LWIP_MDNS_RESPONDER==1: Turn on multicast DNS module. UDP must be available for MDNS
+ * transport. IGMP is needed for IPv4 multicast.
+ */
+#ifndef LWIP_MDNS_RESPONDER
+#define LWIP_MDNS_RESPONDER             0
+#endif /* LWIP_MDNS_RESPONDER */
+
+/** The maximum number of services per netif */
+#ifndef MDNS_MAX_SERVICES
+#define MDNS_MAX_SERVICES               1
+#endif
+
+/** MDNS_RESP_USENETIF_EXTCALLBACK==1: register an ext_callback on the netif
+ * to automatically restart probing/announcing on status or address change.
+ */
+#ifndef MDNS_RESP_USENETIF_EXTCALLBACK
+#define MDNS_RESP_USENETIF_EXTCALLBACK  LWIP_NETIF_EXT_STATUS_CALLBACK
+#endif
+
+/**
+ * MDNS_DEBUG: Enable debugging for multicast DNS.
+ */
+#ifndef MDNS_DEBUG
+#define MDNS_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* LWIP_HDR_APPS_MDNS_OPTS_H */
+
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mdns_priv.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mdns_priv.h
new file mode 100644
index 00000000000..9635b5b106c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mdns_priv.h
@@ -0,0 +1,74 @@
+/**
+ * @file
+ * MDNS responder private definitions
+ */
+
+ /*
+ * Copyright (c) 2015 Verisure Innovation AB
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Erik Ekman <erik@kryo.se>
+ *
+ */
+#ifndef LWIP_HDR_MDNS_PRIV_H
+#define LWIP_HDR_MDNS_PRIV_H
+
+#include "lwip/apps/mdns_opts.h"
+#include "lwip/pbuf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_MDNS_RESPONDER
+
+/* Domain struct and methods - visible for unit tests */
+
+#define MDNS_DOMAIN_MAXLEN 256
+#define MDNS_READNAME_ERROR 0xFFFF
+
+struct mdns_domain {
+  /* Encoded domain name */
+  u8_t name[MDNS_DOMAIN_MAXLEN];
+  /* Total length of domain name, including zero */
+  u16_t length;
+  /* Set if compression of this domain is not allowed */
+  u8_t skip_compression;
+};
+
+err_t mdns_domain_add_label(struct mdns_domain *domain, const char *label, u8_t len);
+u16_t mdns_readname(struct pbuf *p, u16_t offset, struct mdns_domain *domain);
+int mdns_domain_eq(struct mdns_domain *a, struct mdns_domain *b);
+u16_t mdns_compress_domain(struct pbuf *pbuf, u16_t *offset, struct mdns_domain *domain);
+
+#endif /* LWIP_MDNS_RESPONDER */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_MDNS_PRIV_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mqtt.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mqtt.h
new file mode 100644
index 00000000000..c2bb2288f4d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mqtt.h
@@ -0,0 +1,205 @@
+/**
+ * @file
+ * MQTT client
+ */
+
+/*
+ * Copyright (c) 2016 Erik Andersson
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Erik Andersson
+ *
+ */
+#ifndef LWIP_HDR_APPS_MQTT_CLIENT_H
+#define LWIP_HDR_APPS_MQTT_CLIENT_H
+
+#include "lwip/apps/mqtt_opts.h"
+#include "lwip/err.h"
+#include "lwip/ip_addr.h"
+#include "lwip/prot/iana.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct mqtt_client_s mqtt_client_t;
+
+#if LWIP_ALTCP && LWIP_ALTCP_TLS
+struct altcp_tls_config;
+#endif
+
+/** @ingroup mqtt
+ * Default MQTT port (non-TLS) */
+#define MQTT_PORT     LWIP_IANA_PORT_MQTT
+/** @ingroup mqtt
+ * Default MQTT TLS port */
+#define MQTT_TLS_PORT LWIP_IANA_PORT_SECURE_MQTT
+
+/*---------------------------------------------------------------------------------------------- */
+/* Connection with server */
+
+/**
+ * @ingroup mqtt
+ * Client information and connection parameters */
+struct mqtt_connect_client_info_t {
+  /** Client identifier, must be set by caller */
+  const char *client_id;
+  /** User name, set to NULL if not used */
+  const char* client_user;
+  /** Password, set to NULL if not used */
+  const char* client_pass;
+  /** keep alive time in seconds, 0 to disable keep alive functionality*/
+  u16_t keep_alive;
+  /** will topic, set to NULL if will is not to be used,
+      will_msg, will_qos and will retain are then ignored */
+  const char* will_topic;
+  /** will_msg, see will_topic */
+  const char* will_msg;
+  /** will_qos, see will_topic */
+  u8_t will_qos;
+  /** will_retain, see will_topic */
+  u8_t will_retain;
+#if LWIP_ALTCP && LWIP_ALTCP_TLS
+  /** TLS configuration for secure connections */
+  struct altcp_tls_config *tls_config;
+#endif
+};
+
+/**
+ * @ingroup mqtt
+ * Connection status codes */
+typedef enum
+{
+  /** Accepted */
+  MQTT_CONNECT_ACCEPTED                 = 0,
+  /** Refused protocol version */
+  MQTT_CONNECT_REFUSED_PROTOCOL_VERSION = 1,
+  /** Refused identifier */
+  MQTT_CONNECT_REFUSED_IDENTIFIER       = 2,
+  /** Refused server */
+  MQTT_CONNECT_REFUSED_SERVER           = 3,
+  /** Refused user credentials */
+  MQTT_CONNECT_REFUSED_USERNAME_PASS    = 4,
+  /** Refused not authorized */
+  MQTT_CONNECT_REFUSED_NOT_AUTHORIZED_  = 5,
+  /** Disconnected */
+  MQTT_CONNECT_DISCONNECTED             = 256,
+  /** Timeout */
+  MQTT_CONNECT_TIMEOUT                  = 257
+} mqtt_connection_status_t;
+
+/**
+ * @ingroup mqtt
+ * Function prototype for mqtt connection status callback. Called when
+ * client has connected to the server after initiating a mqtt connection attempt by
+ * calling mqtt_client_connect() or when connection is closed by server or an error
+ *
+ * @param client MQTT client itself
+ * @param arg Additional argument to pass to the callback function
+ * @param status Connect result code or disconnection notification @see mqtt_connection_status_t
+ *
+ */
+typedef void (*mqtt_connection_cb_t)(mqtt_client_t *client, void *arg, mqtt_connection_status_t status);
+
+
+/**
+ * @ingroup mqtt
+ * Data callback flags */
+enum {
+  /** Flag set when last fragment of data arrives in data callback */
+  MQTT_DATA_FLAG_LAST = 1
+};
+
+/** 
+ * @ingroup mqtt
+ * Function prototype for MQTT incoming publish data callback function. Called when data
+ * arrives to a subscribed topic @see mqtt_subscribe
+ *
+ * @param arg Additional argument to pass to the callback function
+ * @param data User data, pointed object, data may not be referenced after callback return,
+          NULL is passed when all publish data are delivered
+ * @param len Length of publish data fragment
+ * @param flags MQTT_DATA_FLAG_LAST set when this call contains the last part of data from publish message
+ *
+ */
+typedef void (*mqtt_incoming_data_cb_t)(void *arg, const u8_t *data, u16_t len, u8_t flags);
+
+
+/** 
+ * @ingroup mqtt
+ * Function prototype for MQTT incoming publish function. Called when an incoming publish
+ * arrives to a subscribed topic @see mqtt_subscribe
+ *
+ * @param arg Additional argument to pass to the callback function
+ * @param topic Zero terminated Topic text string, topic may not be referenced after callback return
+ * @param tot_len Total length of publish data, if set to 0 (no publish payload) data callback will not be invoked
+ */
+typedef void (*mqtt_incoming_publish_cb_t)(void *arg, const char *topic, u32_t tot_len);
+
+
+/**
+ * @ingroup mqtt
+ * Function prototype for mqtt request callback. Called when a subscribe, unsubscribe
+ * or publish request has completed
+ * @param arg Pointer to user data supplied when invoking request
+ * @param err ERR_OK on success
+ *            ERR_TIMEOUT if no response was received within timeout,
+ *            ERR_ABRT if (un)subscribe was denied
+ */
+typedef void (*mqtt_request_cb_t)(void *arg, err_t err);
+
+
+err_t mqtt_client_connect(mqtt_client_t *client, const ip_addr_t *ipaddr, u16_t port, mqtt_connection_cb_t cb, void *arg,
+                   const struct mqtt_connect_client_info_t *client_info);
+
+void mqtt_disconnect(mqtt_client_t *client);
+
+mqtt_client_t *mqtt_client_new(void);
+void mqtt_client_free(mqtt_client_t* client);
+
+u8_t mqtt_client_is_connected(mqtt_client_t *client);
+
+void mqtt_set_inpub_callback(mqtt_client_t *client, mqtt_incoming_publish_cb_t,
+                             mqtt_incoming_data_cb_t data_cb, void *arg);
+
+err_t mqtt_sub_unsub(mqtt_client_t *client, const char *topic, u8_t qos, mqtt_request_cb_t cb, void *arg, u8_t sub);
+
+/** @ingroup mqtt
+ *Subscribe to topic */
+#define mqtt_subscribe(client, topic, qos, cb, arg) mqtt_sub_unsub(client, topic, qos, cb, arg, 1)
+/** @ingroup mqtt
+ *  Unsubscribe to topic */
+#define mqtt_unsubscribe(client, topic, cb, arg) mqtt_sub_unsub(client, topic, 0, cb, arg, 0)
+
+err_t mqtt_publish(mqtt_client_t *client, const char *topic, const void *payload, u16_t payload_length, u8_t qos, u8_t retain,
+                                    mqtt_request_cb_t cb, void *arg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_MQTT_CLIENT_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mqtt_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mqtt_opts.h
new file mode 100644
index 00000000000..4226d21e841
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mqtt_opts.h
@@ -0,0 +1,103 @@
+/**
+ * @file
+ * MQTT client options
+ */
+
+/*
+ * Copyright (c) 2016 Erik Andersson
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Erik Andersson
+ *
+ */
+#ifndef LWIP_HDR_APPS_MQTT_OPTS_H
+#define LWIP_HDR_APPS_MQTT_OPTS_H
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup mqtt_opts Options
+ * @ingroup mqtt
+ * @{
+ */
+
+/**
+ * Output ring-buffer size, must be able to fit largest outgoing publish message topic+payloads
+ */
+#ifndef MQTT_OUTPUT_RINGBUF_SIZE
+#define MQTT_OUTPUT_RINGBUF_SIZE 256
+#endif
+
+/**
+ * Number of bytes in receive buffer, must be at least the size of the longest incoming topic + 8
+ * If one wants to avoid fragmented incoming publish, set length to max incoming topic length + max payload length + 8
+ */
+#ifndef MQTT_VAR_HEADER_BUFFER_LEN
+#define MQTT_VAR_HEADER_BUFFER_LEN 128
+#endif
+
+/**
+ * Maximum number of pending subscribe, unsubscribe and publish requests to server .
+ */
+#ifndef MQTT_REQ_MAX_IN_FLIGHT
+#define MQTT_REQ_MAX_IN_FLIGHT 4
+#endif
+
+/**
+ * Seconds between each cyclic timer call.
+ */
+#ifndef MQTT_CYCLIC_TIMER_INTERVAL
+#define MQTT_CYCLIC_TIMER_INTERVAL 5
+#endif
+
+/**
+ * Publish, subscribe and unsubscribe request timeout in seconds.
+ */
+#ifndef MQTT_REQ_TIMEOUT
+#define MQTT_REQ_TIMEOUT 30
+#endif
+
+/**
+ * Seconds for MQTT connect response timeout after sending connect request
+ */
+#ifndef MQTT_CONNECT_TIMOUT
+#define MQTT_CONNECT_TIMOUT 100
+#endif
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_MQTT_OPTS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mqtt_priv.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mqtt_priv.h
new file mode 100644
index 00000000000..b775913cac8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/mqtt_priv.h
@@ -0,0 +1,104 @@
+/**
+ * @file
+ * MQTT client (private interface)
+ */
+
+/*
+ * Copyright (c) 2016 Erik Andersson
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Erik Andersson
+ *
+ */
+#ifndef LWIP_HDR_APPS_MQTT_PRIV_H
+#define LWIP_HDR_APPS_MQTT_PRIV_H
+
+#include "lwip/apps/mqtt.h"
+#include "lwip/altcp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Pending request item, binds application callback to pending server requests */
+struct mqtt_request_t
+{
+  /** Next item in list, NULL means this is the last in chain,
+      next pointing at itself means request is unallocated */
+  struct mqtt_request_t *next;
+  /** Callback to upper layer */
+  mqtt_request_cb_t cb;
+  void *arg;
+  /** MQTT packet identifier */
+  u16_t pkt_id;
+  /** Expire time relative to element before this  */
+  u16_t timeout_diff;
+};
+
+/** Ring buffer */
+struct mqtt_ringbuf_t {
+  u16_t put;
+  u16_t get;
+  u8_t buf[MQTT_OUTPUT_RINGBUF_SIZE];
+};
+
+/** MQTT client */
+struct mqtt_client_s
+{
+  /** Timers and timeouts */
+  u16_t cyclic_tick;
+  u16_t keep_alive;
+  u16_t server_watchdog;
+  /** Packet identifier generator*/
+  u16_t pkt_id_seq;
+  /** Packet identifier of pending incoming publish */
+  u16_t inpub_pkt_id;
+  /** Connection state */
+  u8_t conn_state;
+  struct altcp_pcb *conn;
+  /** Connection callback */
+  void *connect_arg;
+  mqtt_connection_cb_t connect_cb;
+  /** Pending requests to server */
+  struct mqtt_request_t *pend_req_queue;
+  struct mqtt_request_t req_list[MQTT_REQ_MAX_IN_FLIGHT];
+  void *inpub_arg;
+  /** Incoming data callback */
+  mqtt_incoming_data_cb_t data_cb;
+  mqtt_incoming_publish_cb_t pub_cb;
+  /** Input */
+  u32_t msg_idx;
+  u8_t rx_buffer[MQTT_VAR_HEADER_BUFFER_LEN];
+  /** Output ring-buffer */
+  struct mqtt_ringbuf_t output;
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_MQTT_PRIV_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/netbiosns.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/netbiosns.h
new file mode 100644
index 00000000000..a326d33b118
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/netbiosns.h
@@ -0,0 +1,51 @@
+/**
+ * @file
+ * NETBIOS name service responder
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+#ifndef LWIP_HDR_APPS_NETBIOS_H
+#define LWIP_HDR_APPS_NETBIOS_H
+
+#include "lwip/apps/netbiosns_opts.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void netbiosns_init(void);
+#ifndef NETBIOS_LWIP_NAME
+void netbiosns_set_name(const char* hostname);
+#endif
+void netbiosns_stop(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_NETBIOS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/netbiosns_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/netbiosns_opts.h
new file mode 100644
index 00000000000..1f51ab02a08
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/netbiosns_opts.h
@@ -0,0 +1,66 @@
+/**
+ * @file
+ * NETBIOS name service responder options
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+#ifndef LWIP_HDR_APPS_NETBIOS_OPTS_H
+#define LWIP_HDR_APPS_NETBIOS_OPTS_H
+
+#include "lwip/opt.h"
+
+/**
+ * @defgroup netbiosns_opts Options
+ * @ingroup netbiosns
+ * @{
+ */
+
+/** NetBIOS name of lwip device
+ * This must be uppercase until NETBIOS_STRCMP() is defined to a string
+ * comparision function that is case insensitive.
+ * If you want to use the netif's hostname, use this (with LWIP_NETIF_HOSTNAME):
+ * (ip_current_netif() != NULL ? ip_current_netif()->hostname != NULL ? ip_current_netif()->hostname : "" : "")
+ *
+ * If this is not defined, netbiosns_set_name() can be called at runtime to change the name.
+ */
+#ifdef __DOXYGEN__
+#define NETBIOS_LWIP_NAME "NETBIOSLWIPDEV"
+#endif
+
+/** Respond to NetBIOS name queries
+ * Default is disabled
+ */
+#if !defined LWIP_NETBIOS_RESPOND_NAME_QUERY || defined __DOXYGEN__
+#define LWIP_NETBIOS_RESPOND_NAME_QUERY   0
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* LWIP_HDR_APPS_NETBIOS_OPTS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/smtp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/smtp.h
new file mode 100644
index 00000000000..fb4a4a7cca6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/smtp.h
@@ -0,0 +1,128 @@
+#ifndef LWIP_HDR_APPS_SMTP_H
+#define LWIP_HDR_APPS_SMTP_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "lwip/apps/smtp_opts.h"
+#include "lwip/err.h"
+#include "lwip/prot/iana.h"
+
+/** The default TCP port used for SMTP */
+#define SMTP_DEFAULT_PORT         LWIP_IANA_PORT_SMTP
+/** The default TCP port used for SMTPS */
+#define SMTPS_DEFAULT_PORT        LWIP_IANA_PORT_SMTPS
+
+/** Email successfully sent */
+#define SMTP_RESULT_OK            0
+/** Unknown error */
+#define SMTP_RESULT_ERR_UNKNOWN   1
+/** Connection to server failed */
+#define SMTP_RESULT_ERR_CONNECT   2
+/** Failed to resolve server hostname */
+#define SMTP_RESULT_ERR_HOSTNAME  3
+/** Connection unexpectedly closed by remote server */
+#define SMTP_RESULT_ERR_CLOSED    4
+/** Connection timed out (server didn't respond in time) */
+#define SMTP_RESULT_ERR_TIMEOUT   5
+/** Server responded with an unknown response code */
+#define SMTP_RESULT_ERR_SVR_RESP  6
+/** Out of resources locally */
+#define SMTP_RESULT_ERR_MEM       7
+
+/** Prototype of an smtp callback function
+ *
+ * @param arg argument specified when initiating the email
+ * @param smtp_result result of the mail transfer (see defines SMTP_RESULT_*)
+ * @param srv_err if aborted by the server, this contains the error code received
+ * @param err an error returned by internal lwip functions, can help to specify
+ *            the source of the error but must not necessarily be != ERR_OK
+ */
+typedef void (*smtp_result_fn)(void *arg, u8_t smtp_result, u16_t srv_err, err_t err);
+
+/** This structure is used as argument for smtp_send_mail_int(),
+ * which in turn can be used with tcpip_callback() to send mail
+ * from interrupt context, e.g. like this:
+ *    struct smtp_send_request *req; (to be filled)
+ *    tcpip_try_callback(smtp_send_mail_int, (void*)req);
+ *
+ * For member description, see parameter description of smtp_send_mail().
+ * When using with tcpip_callback, this structure has to stay allocated
+ * (e.g. using mem_malloc/mem_free) until its 'callback_fn' is called.
+ */
+struct smtp_send_request {
+  const char *from;
+  const char* to;
+  const char* subject;
+  const char* body;
+  smtp_result_fn callback_fn;
+  void* callback_arg;
+  /** If this is != 0, data is *not* copied into an extra buffer
+   * but used from the pointers supplied in this struct.
+   * This means less memory usage, but data must stay untouched until
+   * the callback function is called. */
+  u8_t static_data;
+};
+
+
+#if SMTP_BODYDH
+
+#ifndef SMTP_BODYDH_BUFFER_SIZE
+#define SMTP_BODYDH_BUFFER_SIZE 256
+#endif /* SMTP_BODYDH_BUFFER_SIZE */
+
+struct smtp_bodydh {
+  u16_t state;
+  u16_t length; /* Length of content in buffer */
+  char buffer[SMTP_BODYDH_BUFFER_SIZE]; /* buffer for generated content */
+#ifdef SMTP_BODYDH_USER_SIZE
+  u8_t user[SMTP_BODYDH_USER_SIZE];
+#endif /* SMTP_BODYDH_USER_SIZE */
+};
+
+enum bdh_retvals_e {
+  BDH_DONE = 0,
+  BDH_WORKING
+};
+
+/** Prototype of an smtp body callback function
+ * It receives a struct smtp_bodydh, and a buffer to write data,
+ * must return BDH_WORKING to be called again and BDH_DONE when
+ * it has finished processing. This one tries to fill one TCP buffer with
+ * data, your function will be repeatedly called until that happens; so if you
+ * know you'll be taking too long to serve your request, pause once in a while
+ * by writing length=0 to avoid hogging system resources
+ *
+ * @param arg argument specified when initiating the email
+ * @param smtp_bodydh state handling + buffer structure
+ */
+typedef int (*smtp_bodycback_fn)(void *arg, struct smtp_bodydh *bodydh);
+
+err_t smtp_send_mail_bodycback(const char *from, const char* to, const char* subject,
+                     smtp_bodycback_fn bodycback_fn, smtp_result_fn callback_fn, void* callback_arg);
+
+#endif /* SMTP_BODYDH */
+
+
+err_t smtp_set_server_addr(const char* server);
+void smtp_set_server_port(u16_t port);
+#if LWIP_ALTCP && LWIP_ALTCP_TLS
+struct altcp_tls_config;
+void smtp_set_tls_config(struct altcp_tls_config *tls_config);
+#endif
+err_t smtp_set_auth(const char* username, const char* pass);
+err_t smtp_send_mail(const char *from, const char* to, const char* subject, const char* body,
+                     smtp_result_fn callback_fn, void* callback_arg);
+err_t smtp_send_mail_static(const char *from, const char* to, const char* subject, const char* body,
+                     smtp_result_fn callback_fn, void* callback_arg);
+void smtp_send_mail_int(void *arg);
+#ifdef LWIP_DEBUG
+const char* smtp_result_str(u8_t smtp_result);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_SMTP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/smtp_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/smtp_opts.h
new file mode 100644
index 00000000000..bc743f679e0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/smtp_opts.h
@@ -0,0 +1,81 @@
+#ifndef LWIP_HDR_APPS_SMTP_OPTS_H
+#define LWIP_HDR_APPS_SMTP_OPTS_H
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+    
+/**
+ * @defgroup smtp_opts Options
+ * @ingroup smtp
+ * 
+ * @{
+ */
+    
+/** Set this to 1 to enable data handler callback on BODY */
+#ifndef SMTP_BODYDH
+#define SMTP_BODYDH             0
+#endif
+
+/** SMTP_DEBUG: Enable debugging for SNTP. */
+#ifndef SMTP_DEBUG
+#define SMTP_DEBUG              LWIP_DBG_OFF
+#endif
+
+/** Maximum length reserved for server name including terminating 0 byte */
+#ifndef SMTP_MAX_SERVERNAME_LEN
+#define SMTP_MAX_SERVERNAME_LEN 256
+#endif
+
+/** Maximum length reserved for username */
+#ifndef SMTP_MAX_USERNAME_LEN
+#define SMTP_MAX_USERNAME_LEN   32
+#endif
+
+/** Maximum length reserved for password */
+#ifndef SMTP_MAX_PASS_LEN
+#define SMTP_MAX_PASS_LEN       32
+#endif
+
+/** Set this to 0 if you know the authentication data will not change
+ * during the smtp session, which saves some heap space. */
+#ifndef SMTP_COPY_AUTHDATA
+#define SMTP_COPY_AUTHDATA      1
+#endif
+
+/** Set this to 0 to save some code space if you know for sure that all data
+ * passed to this module conforms to the requirements in the SMTP RFC.
+ * WARNING: use this with care!
+ */
+#ifndef SMTP_CHECK_DATA
+#define SMTP_CHECK_DATA         1
+#endif
+
+/** Set this to 1 to enable AUTH PLAIN support */
+#ifndef SMTP_SUPPORT_AUTH_PLAIN
+#define SMTP_SUPPORT_AUTH_PLAIN 1
+#endif
+
+/** Set this to 1 to enable AUTH LOGIN support */
+#ifndef SMTP_SUPPORT_AUTH_LOGIN
+#define SMTP_SUPPORT_AUTH_LOGIN 1
+#endif
+
+/* Memory allocation/deallocation can be overridden... */
+#ifndef SMTP_STATE_MALLOC
+#define SMTP_STATE_MALLOC(size)       mem_malloc(size)
+#define SMTP_STATE_FREE(ptr)          mem_free(ptr)
+#endif
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SMTP_OPTS_H */
+
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp.h
new file mode 100644
index 00000000000..a3f8eb15080
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp.h
@@ -0,0 +1,135 @@
+/**
+ * @file
+ * SNMP server main API - start and basic configuration
+ */
+
+/*
+ * Copyright (c) 2001, 2002 Leon Woestenberg <leon.woestenberg@axon.tv>
+ * Copyright (c) 2001, 2002 Axon Digital Design B.V., The Netherlands.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Leon Woestenberg <leon.woestenberg@axon.tv>
+ *         Martin Hentschel <info@cl-soft.de>
+ *
+ */
+#ifndef LWIP_HDR_APPS_SNMP_H
+#define LWIP_HDR_APPS_SNMP_H
+
+#include "lwip/apps/snmp_opts.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/err.h"
+#include "lwip/apps/snmp_core.h"
+
+/** SNMP variable binding descriptor (publically needed for traps) */
+struct snmp_varbind
+{
+  /** pointer to next varbind, NULL for last in list */
+  struct snmp_varbind *next;
+  /** pointer to previous varbind, NULL for first in list */
+  struct snmp_varbind *prev;
+
+  /** object identifier */
+  struct snmp_obj_id oid;
+
+  /** value ASN1 type */
+  u8_t type;
+  /** object value length */
+  u16_t value_len;
+  /** object value */
+  void *value;
+};
+
+/**
+ * @ingroup snmp_core
+ * Agent setup, start listening to port 161.
+ */
+void snmp_init(void);
+void snmp_set_mibs(const struct snmp_mib **mibs, u8_t num_mibs);
+
+void snmp_set_device_enterprise_oid(const struct snmp_obj_id* device_enterprise_oid);
+const struct snmp_obj_id* snmp_get_device_enterprise_oid(void);
+
+void snmp_trap_dst_enable(u8_t dst_idx, u8_t enable);
+void snmp_trap_dst_ip_set(u8_t dst_idx, const ip_addr_t *dst);
+
+/** Generic trap: cold start */
+#define SNMP_GENTRAP_COLDSTART 0
+/** Generic trap: warm start */
+#define SNMP_GENTRAP_WARMSTART 1
+/** Generic trap: link down */
+#define SNMP_GENTRAP_LINKDOWN 2
+/** Generic trap: link up */
+#define SNMP_GENTRAP_LINKUP 3
+/** Generic trap: authentication failure */
+#define SNMP_GENTRAP_AUTH_FAILURE 4
+/** Generic trap: EGP neighbor lost */
+#define SNMP_GENTRAP_EGP_NEIGHBOR_LOSS 5
+/** Generic trap: enterprise specific */
+#define SNMP_GENTRAP_ENTERPRISE_SPECIFIC 6
+
+err_t snmp_send_trap_generic(s32_t generic_trap);
+err_t snmp_send_trap_specific(s32_t specific_trap, struct snmp_varbind *varbinds);
+err_t snmp_send_trap(const struct snmp_obj_id* oid, s32_t generic_trap, s32_t specific_trap, struct snmp_varbind *varbinds);
+
+#define SNMP_AUTH_TRAPS_DISABLED 0
+#define SNMP_AUTH_TRAPS_ENABLED  1
+void snmp_set_auth_traps_enabled(u8_t enable);
+u8_t snmp_get_auth_traps_enabled(void);
+
+u8_t snmp_v1_enabled(void);
+u8_t snmp_v2c_enabled(void);
+u8_t snmp_v3_enabled(void);
+void snmp_v1_enable(u8_t enable);
+void snmp_v2c_enable(u8_t enable);
+void snmp_v3_enable(u8_t enable);
+
+const char * snmp_get_community(void);
+const char * snmp_get_community_write(void);
+const char * snmp_get_community_trap(void);
+void snmp_set_community(const char * const community);
+void snmp_set_community_write(const char * const community);
+void snmp_set_community_trap(const char * const community);
+
+void snmp_coldstart_trap(void);
+void snmp_authfail_trap(void);
+
+typedef void (*snmp_write_callback_fct)(const u32_t* oid, u8_t oid_len, void* callback_arg);
+void snmp_set_write_callback(snmp_write_callback_fct write_callback, void* callback_arg);
+
+#endif /* LWIP_SNMP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_SNMP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_core.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_core.h
new file mode 100644
index 00000000000..6021c722200
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_core.h
@@ -0,0 +1,377 @@
+/**
+ * @file
+ * SNMP core API for implementing MIBs
+ */
+
+/*
+ * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * Author: Christiaan Simons <christiaan.simons@axon.tv>
+ *         Martin Hentschel <info@cl-soft.de>
+ */
+
+#ifndef LWIP_HDR_APPS_SNMP_CORE_H
+#define LWIP_HDR_APPS_SNMP_CORE_H
+
+#include "lwip/apps/snmp_opts.h"
+
+#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/ip_addr.h"
+#include "lwip/err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* basic ASN1 defines */
+#define SNMP_ASN1_CLASS_UNIVERSAL   0x00
+#define SNMP_ASN1_CLASS_APPLICATION 0x40
+#define SNMP_ASN1_CLASS_CONTEXT     0x80
+#define SNMP_ASN1_CLASS_PRIVATE     0xC0
+
+#define SNMP_ASN1_CONTENTTYPE_PRIMITIVE   0x00
+#define SNMP_ASN1_CONTENTTYPE_CONSTRUCTED 0x20
+
+/* universal tags (from ASN.1 spec.) */
+#define SNMP_ASN1_UNIVERSAL_END_OF_CONTENT  0
+#define SNMP_ASN1_UNIVERSAL_INTEGER         2
+#define SNMP_ASN1_UNIVERSAL_OCTET_STRING    4
+#define SNMP_ASN1_UNIVERSAL_NULL            5
+#define SNMP_ASN1_UNIVERSAL_OBJECT_ID       6
+#define SNMP_ASN1_UNIVERSAL_SEQUENCE_OF    16
+
+/* application specific (SNMP) tags (from SNMPv2-SMI) */
+#define SNMP_ASN1_APPLICATION_IPADDR    0  /* [APPLICATION 0] IMPLICIT OCTET STRING (SIZE (4)) */
+#define SNMP_ASN1_APPLICATION_COUNTER   1  /* [APPLICATION 1] IMPLICIT INTEGER (0..4294967295) => u32_t */
+#define SNMP_ASN1_APPLICATION_GAUGE     2  /* [APPLICATION 2] IMPLICIT INTEGER (0..4294967295) => u32_t */
+#define SNMP_ASN1_APPLICATION_TIMETICKS 3  /* [APPLICATION 3] IMPLICIT INTEGER (0..4294967295) => u32_t */
+#define SNMP_ASN1_APPLICATION_OPAQUE    4  /* [APPLICATION 4] IMPLICIT OCTET STRING */
+#define SNMP_ASN1_APPLICATION_COUNTER64 6  /* [APPLICATION 6] IMPLICIT INTEGER (0..18446744073709551615) */
+
+/* context specific (SNMP) tags (from RFC 1905) */
+#define SNMP_ASN1_CONTEXT_VARBIND_NO_SUCH_INSTANCE 1
+
+/* full ASN1 type defines */
+#define SNMP_ASN1_TYPE_END_OF_CONTENT (SNMP_ASN1_CLASS_UNIVERSAL | SNMP_ASN1_CONTENTTYPE_PRIMITIVE | SNMP_ASN1_UNIVERSAL_END_OF_CONTENT)
+#define SNMP_ASN1_TYPE_INTEGER        (SNMP_ASN1_CLASS_UNIVERSAL | SNMP_ASN1_CONTENTTYPE_PRIMITIVE | SNMP_ASN1_UNIVERSAL_INTEGER)
+#define SNMP_ASN1_TYPE_OCTET_STRING   (SNMP_ASN1_CLASS_UNIVERSAL | SNMP_ASN1_CONTENTTYPE_PRIMITIVE | SNMP_ASN1_UNIVERSAL_OCTET_STRING)
+#define SNMP_ASN1_TYPE_NULL           (SNMP_ASN1_CLASS_UNIVERSAL | SNMP_ASN1_CONTENTTYPE_PRIMITIVE | SNMP_ASN1_UNIVERSAL_NULL)
+#define SNMP_ASN1_TYPE_OBJECT_ID      (SNMP_ASN1_CLASS_UNIVERSAL | SNMP_ASN1_CONTENTTYPE_PRIMITIVE | SNMP_ASN1_UNIVERSAL_OBJECT_ID)
+#define SNMP_ASN1_TYPE_SEQUENCE       (SNMP_ASN1_CLASS_UNIVERSAL | SNMP_ASN1_CONTENTTYPE_CONSTRUCTED | SNMP_ASN1_UNIVERSAL_SEQUENCE_OF)
+#define SNMP_ASN1_TYPE_IPADDR         (SNMP_ASN1_CLASS_APPLICATION | SNMP_ASN1_CONTENTTYPE_PRIMITIVE | SNMP_ASN1_APPLICATION_IPADDR)
+#define SNMP_ASN1_TYPE_IPADDRESS      SNMP_ASN1_TYPE_IPADDR
+#define SNMP_ASN1_TYPE_COUNTER        (SNMP_ASN1_CLASS_APPLICATION | SNMP_ASN1_CONTENTTYPE_PRIMITIVE | SNMP_ASN1_APPLICATION_COUNTER)
+#define SNMP_ASN1_TYPE_COUNTER32      SNMP_ASN1_TYPE_COUNTER
+#define SNMP_ASN1_TYPE_GAUGE          (SNMP_ASN1_CLASS_APPLICATION | SNMP_ASN1_CONTENTTYPE_PRIMITIVE | SNMP_ASN1_APPLICATION_GAUGE)
+#define SNMP_ASN1_TYPE_GAUGE32        SNMP_ASN1_TYPE_GAUGE
+#define SNMP_ASN1_TYPE_UNSIGNED32     SNMP_ASN1_TYPE_GAUGE
+#define SNMP_ASN1_TYPE_TIMETICKS      (SNMP_ASN1_CLASS_APPLICATION | SNMP_ASN1_CONTENTTYPE_PRIMITIVE | SNMP_ASN1_APPLICATION_TIMETICKS)
+#define SNMP_ASN1_TYPE_OPAQUE         (SNMP_ASN1_CLASS_APPLICATION | SNMP_ASN1_CONTENTTYPE_PRIMITIVE | SNMP_ASN1_APPLICATION_OPAQUE)
+#if LWIP_HAVE_INT64
+#define SNMP_ASN1_TYPE_COUNTER64      (SNMP_ASN1_CLASS_APPLICATION | SNMP_ASN1_CONTENTTYPE_PRIMITIVE | SNMP_ASN1_APPLICATION_COUNTER64)
+#endif
+
+#define SNMP_VARBIND_EXCEPTION_OFFSET 0xF0
+#define SNMP_VARBIND_EXCEPTION_MASK   0x0F
+
+/** error codes predefined by SNMP prot. */
+typedef enum {
+  SNMP_ERR_NOERROR             = 0,
+/* 
+outdated v1 error codes. do not use anmore!
+#define SNMP_ERR_NOSUCHNAME 2  use SNMP_ERR_NOSUCHINSTANCE instead
+#define SNMP_ERR_BADVALUE   3  use SNMP_ERR_WRONGTYPE,SNMP_ERR_WRONGLENGTH,SNMP_ERR_WRONGENCODING or SNMP_ERR_WRONGVALUE instead
+#define SNMP_ERR_READONLY   4  use SNMP_ERR_NOTWRITABLE instead
+*/
+  SNMP_ERR_GENERROR            = 5,
+  SNMP_ERR_NOACCESS            = 6,
+  SNMP_ERR_WRONGTYPE           = 7,
+  SNMP_ERR_WRONGLENGTH         = 8,
+  SNMP_ERR_WRONGENCODING       = 9,
+  SNMP_ERR_WRONGVALUE          = 10,
+  SNMP_ERR_NOCREATION          = 11,
+  SNMP_ERR_INCONSISTENTVALUE   = 12,
+  SNMP_ERR_RESOURCEUNAVAILABLE = 13,
+  SNMP_ERR_COMMITFAILED        = 14,
+  SNMP_ERR_UNDOFAILED          = 15,
+  SNMP_ERR_NOTWRITABLE         = 17,
+  SNMP_ERR_INCONSISTENTNAME    = 18,
+
+  SNMP_ERR_NOSUCHINSTANCE      = SNMP_VARBIND_EXCEPTION_OFFSET + SNMP_ASN1_CONTEXT_VARBIND_NO_SUCH_INSTANCE
+} snmp_err_t;
+
+/** internal object identifier representation */
+struct snmp_obj_id
+{
+  u8_t len;
+  u32_t id[SNMP_MAX_OBJ_ID_LEN];
+};
+
+struct snmp_obj_id_const_ref
+{
+  u8_t len;
+  const u32_t* id;
+};
+
+extern const struct snmp_obj_id_const_ref snmp_zero_dot_zero; /* administrative identifier from SNMPv2-SMI */
+
+/** SNMP variant value, used as reference in struct snmp_node_instance and table implementation */
+union snmp_variant_value
+{
+  void* ptr;
+  const void* const_ptr;
+  u32_t u32;
+  s32_t s32;
+#if LWIP_HAVE_INT64
+  u64_t u64;
+#endif
+};
+
+
+/**
+SNMP MIB node types
+ tree node is the only node the stack can process in order to walk the tree,
+ all other nodes are assumed to be leaf nodes.
+ This cannot be an enum because users may want to define their own node types.
+*/
+#define SNMP_NODE_TREE         0x00
+/* predefined leaf node types */
+#define SNMP_NODE_SCALAR       0x01
+#define SNMP_NODE_SCALAR_ARRAY 0x02
+#define SNMP_NODE_TABLE        0x03
+#define SNMP_NODE_THREADSYNC   0x04
+
+/** node "base class" layout, the mandatory fields for a node  */
+struct snmp_node
+{
+  /** one out of SNMP_NODE_TREE or any leaf node type (like SNMP_NODE_SCALAR) */
+  u8_t node_type;
+  /** the number assigned to this node which used as part of the full OID */
+  u32_t oid;
+};
+
+/** SNMP node instance access types */
+typedef enum {
+  SNMP_NODE_INSTANCE_ACCESS_READ    = 1,
+  SNMP_NODE_INSTANCE_ACCESS_WRITE   = 2,
+  SNMP_NODE_INSTANCE_READ_ONLY      = SNMP_NODE_INSTANCE_ACCESS_READ,
+  SNMP_NODE_INSTANCE_READ_WRITE     = (SNMP_NODE_INSTANCE_ACCESS_READ | SNMP_NODE_INSTANCE_ACCESS_WRITE),
+  SNMP_NODE_INSTANCE_WRITE_ONLY     = SNMP_NODE_INSTANCE_ACCESS_WRITE,
+  SNMP_NODE_INSTANCE_NOT_ACCESSIBLE = 0
+} snmp_access_t;
+
+struct snmp_node_instance;
+
+typedef s16_t (*node_instance_get_value_method)(struct snmp_node_instance*, void*);
+typedef snmp_err_t (*node_instance_set_test_method)(struct snmp_node_instance*, u16_t, void*);
+typedef snmp_err_t (*node_instance_set_value_method)(struct snmp_node_instance*, u16_t, void*);
+typedef void (*node_instance_release_method)(struct snmp_node_instance*);
+
+#define SNMP_GET_VALUE_RAW_DATA 0x4000  /* do not use 0x8000 because return value of node_instance_get_value_method is signed16 and 0x8000 would be the signed bit */
+
+/** SNMP node instance */
+struct snmp_node_instance
+{
+  /** prefilled with the node, get_instance() is called on; may be changed by user to any value to pass an arbitrary node between calls to get_instance() and get_value/test_value/set_value */
+  const struct snmp_node* node;
+  /** prefilled with the instance id requested; for get_instance() this is the exact oid requested; for get_next_instance() this is the relative starting point, stack expects relative oid of next node here */
+  struct snmp_obj_id instance_oid;
+
+  /** ASN type for this object (see snmp_asn1.h for definitions) */
+  u8_t asn1_type;
+  /** one out of instance access types defined above (SNMP_NODE_INSTANCE_READ_ONLY,...) */
+  snmp_access_t access;
+
+  /** returns object value for the given object identifier. Return values <0 to indicate an error */
+  node_instance_get_value_method get_value;
+  /** tests length and/or range BEFORE setting */
+  node_instance_set_test_method set_test;
+  /** sets object value, only called when set_test() was successful */
+  node_instance_set_value_method set_value;
+  /** called in any case when the instance is not required anymore by stack (useful for freeing memory allocated in get_instance/get_next_instance methods) */
+  node_instance_release_method release_instance;
+
+  /** reference to pass arbitrary value between calls to get_instance() and get_value/test_value/set_value */
+  union snmp_variant_value reference;
+  /** see reference (if reference is a pointer, the length of underlying data may be stored here or anything else) */
+  u32_t reference_len;
+};
+
+
+/** SNMP tree node */
+struct snmp_tree_node
+{
+  /** inherited "base class" members */
+  struct snmp_node node;
+  u16_t subnode_count;
+  const struct snmp_node* const *subnodes;
+};
+
+#define SNMP_CREATE_TREE_NODE(oid, subnodes) \
+  {{ SNMP_NODE_TREE, (oid) }, \
+  (u16_t)LWIP_ARRAYSIZE(subnodes), (subnodes) }
+
+#define SNMP_CREATE_EMPTY_TREE_NODE(oid) \
+  {{ SNMP_NODE_TREE, (oid) }, \
+  0, NULL }
+
+/** SNMP leaf node */
+struct snmp_leaf_node
+{
+  /** inherited "base class" members */
+  struct snmp_node node;
+  snmp_err_t (*get_instance)(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+  snmp_err_t (*get_next_instance)(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+};
+
+/** represents a single mib with its base oid and root node */
+struct snmp_mib
+{
+  const u32_t *base_oid;
+  u8_t base_oid_len;
+  const struct snmp_node *root_node;
+};
+
+#define SNMP_MIB_CREATE(oid_list, root_node) { (oid_list), (u8_t)LWIP_ARRAYSIZE(oid_list), root_node }
+
+/** OID range structure */
+struct snmp_oid_range
+{
+  u32_t min;
+  u32_t max;
+};
+
+/** checks if incoming OID length and values are in allowed ranges */
+u8_t snmp_oid_in_range(const u32_t *oid_in, u8_t oid_len, const struct snmp_oid_range *oid_ranges, u8_t oid_ranges_len);
+
+typedef enum {
+  SNMP_NEXT_OID_STATUS_SUCCESS,
+  SNMP_NEXT_OID_STATUS_NO_MATCH,
+  SNMP_NEXT_OID_STATUS_BUF_TO_SMALL
+} snmp_next_oid_status_t;
+
+/** state for next_oid_init / next_oid_check functions */
+struct snmp_next_oid_state
+{
+  const u32_t* start_oid;
+  u8_t start_oid_len;
+
+  u32_t* next_oid;
+  u8_t next_oid_len;
+  u8_t next_oid_max_len;
+
+  snmp_next_oid_status_t status;
+  void* reference;
+};
+
+void snmp_next_oid_init(struct snmp_next_oid_state *state,
+  const u32_t *start_oid, u8_t start_oid_len,
+  u32_t *next_oid_buf, u8_t next_oid_max_len);
+u8_t snmp_next_oid_precheck(struct snmp_next_oid_state *state, const u32_t *oid, u8_t oid_len);
+u8_t snmp_next_oid_check(struct snmp_next_oid_state *state, const u32_t *oid, u8_t oid_len, void* reference);
+
+void snmp_oid_assign(struct snmp_obj_id* target, const u32_t *oid, u8_t oid_len);
+void snmp_oid_combine(struct snmp_obj_id* target, const u32_t *oid1, u8_t oid1_len, const u32_t *oid2, u8_t oid2_len);
+void snmp_oid_prefix(struct snmp_obj_id* target, const u32_t *oid, u8_t oid_len);
+void snmp_oid_append(struct snmp_obj_id* target, const u32_t *oid, u8_t oid_len);
+u8_t snmp_oid_equal(const u32_t *oid1, u8_t oid1_len, const u32_t *oid2, u8_t oid2_len);
+s8_t snmp_oid_compare(const u32_t *oid1, u8_t oid1_len, const u32_t *oid2, u8_t oid2_len);
+
+#if LWIP_IPV4
+u8_t snmp_oid_to_ip4(const u32_t *oid, ip4_addr_t *ip);
+void snmp_ip4_to_oid(const ip4_addr_t *ip, u32_t *oid);
+#endif /* LWIP_IPV4 */
+#if LWIP_IPV6
+u8_t snmp_oid_to_ip6(const u32_t *oid, ip6_addr_t *ip);
+void snmp_ip6_to_oid(const ip6_addr_t *ip, u32_t *oid);
+#endif /* LWIP_IPV6 */
+#if LWIP_IPV4 || LWIP_IPV6
+u8_t snmp_ip_to_oid(const ip_addr_t *ip, u32_t *oid);
+u8_t snmp_ip_port_to_oid(const ip_addr_t *ip, u16_t port, u32_t *oid);
+
+u8_t snmp_oid_to_ip(const u32_t *oid, u8_t oid_len, ip_addr_t *ip);
+u8_t snmp_oid_to_ip_port(const u32_t *oid, u8_t oid_len, ip_addr_t *ip, u16_t *port);
+#endif /* LWIP_IPV4 || LWIP_IPV6 */
+
+struct netif;
+u8_t netif_to_num(const struct netif *netif);
+
+snmp_err_t snmp_set_test_ok(struct snmp_node_instance* instance, u16_t value_len, void* value); /* generic function which can be used if test is always successful */
+
+err_t snmp_decode_bits(const u8_t *buf, u32_t buf_len, u32_t *bit_value);
+err_t snmp_decode_truthvalue(const s32_t *asn1_value, u8_t *bool_value);
+u8_t  snmp_encode_bits(u8_t *buf, u32_t buf_len, u32_t bit_value, u8_t bit_count);
+u8_t  snmp_encode_truthvalue(s32_t *asn1_value, u32_t bool_value);
+
+struct snmp_statistics
+{
+  u32_t inpkts;
+  u32_t outpkts;
+  u32_t inbadversions;
+  u32_t inbadcommunitynames;
+  u32_t inbadcommunityuses;
+  u32_t inasnparseerrs;
+  u32_t intoobigs;
+  u32_t innosuchnames;
+  u32_t inbadvalues;
+  u32_t inreadonlys;
+  u32_t ingenerrs;
+  u32_t intotalreqvars;
+  u32_t intotalsetvars;
+  u32_t ingetrequests;
+  u32_t ingetnexts;
+  u32_t insetrequests;
+  u32_t ingetresponses;
+  u32_t intraps;
+  u32_t outtoobigs;
+  u32_t outnosuchnames;
+  u32_t outbadvalues;
+  u32_t outgenerrs;
+  u32_t outgetrequests;
+  u32_t outgetnexts;
+  u32_t outsetrequests;
+  u32_t outgetresponses;
+  u32_t outtraps;
+#if LWIP_SNMP_V3
+  u32_t unsupportedseclevels;
+  u32_t notintimewindows;
+  u32_t unknownusernames;
+  u32_t unknownengineids;
+  u32_t wrongdigests;
+  u32_t decryptionerrors;
+#endif
+};
+
+extern struct snmp_statistics snmp_stats;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_SNMP */
+
+#endif /* LWIP_HDR_APPS_SNMP_CORE_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_mib2.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_mib2.h
new file mode 100644
index 00000000000..2f4a68935e2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_mib2.h
@@ -0,0 +1,78 @@
+/**
+ * @file
+ * SNMP MIB2 API
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Dirk Ziegelmeier <dziegel@gmx.de>
+ *
+ */
+#ifndef LWIP_HDR_APPS_SNMP_MIB2_H
+#define LWIP_HDR_APPS_SNMP_MIB2_H
+
+#include "lwip/apps/snmp_opts.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */
+#if SNMP_LWIP_MIB2
+
+#include "lwip/apps/snmp_core.h"
+
+extern const struct snmp_mib mib2;
+
+#if SNMP_USE_NETCONN
+#include "lwip/apps/snmp_threadsync.h"
+void snmp_mib2_lwip_synchronizer(snmp_threadsync_called_fn fn, void* arg);
+extern struct snmp_threadsync_instance snmp_mib2_lwip_locks;
+#endif
+
+#ifndef SNMP_SYSSERVICES
+#define SNMP_SYSSERVICES ((1 << 6) | (1 << 3) | ((IP_FORWARD) << 2))
+#endif
+
+void snmp_mib2_set_sysdescr(const u8_t* str, const u16_t* len); /* read-only be defintion */
+void snmp_mib2_set_syscontact(u8_t *ocstr, u16_t *ocstrlen, u16_t bufsize);
+void snmp_mib2_set_syscontact_readonly(const u8_t *ocstr, const u16_t *ocstrlen);
+void snmp_mib2_set_sysname(u8_t *ocstr, u16_t *ocstrlen, u16_t bufsize);
+void snmp_mib2_set_sysname_readonly(const u8_t *ocstr, const u16_t *ocstrlen);
+void snmp_mib2_set_syslocation(u8_t *ocstr, u16_t *ocstrlen, u16_t bufsize);
+void snmp_mib2_set_syslocation_readonly(const u8_t *ocstr, const u16_t *ocstrlen);
+
+#endif /* SNMP_LWIP_MIB2 */
+#endif /* LWIP_SNMP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_SNMP_MIB2_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_opts.h
new file mode 100644
index 00000000000..c892d22afa5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_opts.h
@@ -0,0 +1,297 @@
+/**
+ * @file
+ * SNMP server options list
+ */
+
+/*
+ * Copyright (c) 2015 Dirk Ziegelmeier
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Dirk Ziegelmeier
+ *
+ */
+#ifndef LWIP_HDR_SNMP_OPTS_H
+#define LWIP_HDR_SNMP_OPTS_H
+
+#include "lwip/opt.h"
+
+/**
+ * @defgroup snmp_opts Options
+ * @ingroup snmp
+ * @{
+ */
+
+/**
+ * LWIP_SNMP==1: This enables the lwIP SNMP agent. UDP must be available
+ * for SNMP transport.
+ * If you want to use your own SNMP agent, leave this disabled.
+ * To integrate MIB2 of an external agent, you need to enable
+ * LWIP_MIB2_CALLBACKS and MIB2_STATS. This will give you the callbacks
+ * and statistics counters you need to get MIB2 working.
+ */
+#if !defined LWIP_SNMP || defined __DOXYGEN__
+#define LWIP_SNMP                       0
+#endif
+
+/**
+ * SNMP_USE_NETCONN: Use netconn API instead of raw API.
+ * Makes SNMP agent run in a worker thread, so blocking operations
+ * can be done in MIB calls.
+ */
+#if !defined SNMP_USE_NETCONN || defined __DOXYGEN__
+#define SNMP_USE_NETCONN           0
+#endif
+
+/**
+ * SNMP_USE_RAW: Use raw API.
+ * SNMP agent does not run in a worker thread, so blocking operations
+ * should not be done in MIB calls.
+ */
+#if !defined SNMP_USE_RAW || defined __DOXYGEN__
+#define SNMP_USE_RAW               1
+#endif
+
+#if SNMP_USE_NETCONN && SNMP_USE_RAW
+#error SNMP stack can use only one of the APIs {raw, netconn}
+#endif
+
+#if LWIP_SNMP && !SNMP_USE_NETCONN && !SNMP_USE_RAW
+#error SNMP stack needs a receive API and UDP {raw, netconn}
+#endif
+
+#if SNMP_USE_NETCONN
+/**
+ * SNMP_STACK_SIZE: Stack size of SNMP netconn worker thread
+ */
+#if !defined SNMP_STACK_SIZE || defined __DOXYGEN__
+#define SNMP_STACK_SIZE            DEFAULT_THREAD_STACKSIZE
+#endif
+
+/**
+ * SNMP_THREAD_PRIO: SNMP netconn worker thread priority
+ */
+#if !defined SNMP_THREAD_PRIO || defined __DOXYGEN__
+#define SNMP_THREAD_PRIO           DEFAULT_THREAD_PRIO
+#endif
+#endif /* SNMP_USE_NETCONN */
+
+/**
+ * SNMP_TRAP_DESTINATIONS: Number of trap destinations. At least one trap
+ * destination is required
+ */
+#if !defined SNMP_TRAP_DESTINATIONS || defined __DOXYGEN__
+#define SNMP_TRAP_DESTINATIONS          1
+#endif
+
+/**
+ * Only allow SNMP write actions that are 'safe' (e.g. disabling netifs is not
+ * a safe action and disabled when SNMP_SAFE_REQUESTS = 1).
+ * Unsafe requests are disabled by default!
+ */
+#if !defined SNMP_SAFE_REQUESTS || defined __DOXYGEN__
+#define SNMP_SAFE_REQUESTS              1
+#endif
+
+/**
+ * The maximum length of strings used.
+ */
+#if !defined SNMP_MAX_OCTET_STRING_LEN || defined __DOXYGEN__
+#define SNMP_MAX_OCTET_STRING_LEN       127
+#endif
+
+/**
+ * The maximum number of Sub ID's inside an object identifier.
+ * Indirectly this also limits the maximum depth of SNMP tree.
+ */
+#if !defined SNMP_MAX_OBJ_ID_LEN || defined __DOXYGEN__
+#define SNMP_MAX_OBJ_ID_LEN             50
+#endif
+
+#if !defined SNMP_MAX_VALUE_SIZE || defined __DOXYGEN__
+/**
+ * The minimum size of a value.
+ */
+#define SNMP_MIN_VALUE_SIZE             (2 * sizeof(u32_t*)) /* size required to store the basic types (8 bytes for counter64) */
+/**
+ * The maximum size of a value.
+ */
+#define SNMP_MAX_VALUE_SIZE             LWIP_MAX(LWIP_MAX((SNMP_MAX_OCTET_STRING_LEN), sizeof(u32_t)*(SNMP_MAX_OBJ_ID_LEN)), SNMP_MIN_VALUE_SIZE)
+#endif
+
+/**
+ * The snmp read-access community. Used for write-access and traps, too
+ * unless SNMP_COMMUNITY_WRITE or SNMP_COMMUNITY_TRAP are enabled, respectively.
+ */
+#if !defined SNMP_COMMUNITY || defined __DOXYGEN__
+#define SNMP_COMMUNITY                  "public"
+#endif
+
+/**
+ * The snmp write-access community.
+ * Set this community to "" in order to disallow any write access.
+ */
+#if !defined SNMP_COMMUNITY_WRITE || defined __DOXYGEN__
+#define SNMP_COMMUNITY_WRITE            "private"
+#endif
+
+/**
+ * The snmp community used for sending traps.
+ */
+#if !defined SNMP_COMMUNITY_TRAP || defined __DOXYGEN__
+#define SNMP_COMMUNITY_TRAP             "public"
+#endif
+
+/**
+ * The maximum length of community string.
+ * If community names shall be adjusted at runtime via snmp_set_community() calls,
+ * enter here the possible maximum length (+1 for terminating null character).
+ */
+#if !defined SNMP_MAX_COMMUNITY_STR_LEN || defined __DOXYGEN__
+#define SNMP_MAX_COMMUNITY_STR_LEN LWIP_MAX(LWIP_MAX(sizeof(SNMP_COMMUNITY), sizeof(SNMP_COMMUNITY_WRITE)), sizeof(SNMP_COMMUNITY_TRAP))
+#endif
+
+/**
+ * The OID identifiying the device. This may be the enterprise OID itself or any OID located below it in tree.
+ */
+#if !defined SNMP_DEVICE_ENTERPRISE_OID || defined __DOXYGEN__
+#define SNMP_LWIP_ENTERPRISE_OID 26381
+/**
+ * IANA assigned enterprise ID for lwIP is 26381
+ * @see http://www.iana.org/assignments/enterprise-numbers
+ *
+ * @note this enterprise ID is assigned to the lwIP project,
+ * all object identifiers living under this ID are assigned
+ * by the lwIP maintainers!
+ * @note don't change this define, use snmp_set_device_enterprise_oid()
+ *
+ * If you need to create your own private MIB you'll need
+ * to apply for your own enterprise ID with IANA:
+ * http://www.iana.org/numbers.html
+ */
+#define SNMP_DEVICE_ENTERPRISE_OID {1, 3, 6, 1, 4, 1, SNMP_LWIP_ENTERPRISE_OID}
+/**
+ * Length of SNMP_DEVICE_ENTERPRISE_OID
+ */
+#define SNMP_DEVICE_ENTERPRISE_OID_LEN 7
+#endif
+
+/**
+ * SNMP_DEBUG: Enable debugging for SNMP messages.
+ */
+#if !defined SNMP_DEBUG || defined __DOXYGEN__
+#define SNMP_DEBUG                      LWIP_DBG_OFF
+#endif
+
+/**
+ * SNMP_MIB_DEBUG: Enable debugging for SNMP MIBs.
+ */
+#if !defined SNMP_MIB_DEBUG || defined __DOXYGEN__
+#define SNMP_MIB_DEBUG                  LWIP_DBG_OFF
+#endif
+
+/**
+ * Indicates if the MIB2 implementation of LWIP SNMP stack is used.
+ */
+#if !defined SNMP_LWIP_MIB2 || defined __DOXYGEN__
+#define SNMP_LWIP_MIB2                      LWIP_SNMP
+#endif
+
+/**
+ * Value return for sysDesc field of MIB2.
+ */
+#if !defined SNMP_LWIP_MIB2_SYSDESC || defined __DOXYGEN__
+#define SNMP_LWIP_MIB2_SYSDESC              "lwIP"
+#endif
+
+/**
+ * Value return for sysName field of MIB2.
+ * To make sysName field settable, call snmp_mib2_set_sysname() to provide the necessary buffers.
+ */
+#if !defined SNMP_LWIP_MIB2_SYSNAME || defined __DOXYGEN__
+#define SNMP_LWIP_MIB2_SYSNAME              "FQDN-unk"
+#endif
+
+/**
+ * Value return for sysContact field of MIB2.
+ * To make sysContact field settable, call snmp_mib2_set_syscontact() to provide the necessary buffers.
+ */
+#if !defined SNMP_LWIP_MIB2_SYSCONTACT || defined __DOXYGEN__
+#define SNMP_LWIP_MIB2_SYSCONTACT           ""
+#endif
+
+/**
+ * Value return for sysLocation field of MIB2.
+ * To make sysLocation field settable, call snmp_mib2_set_syslocation() to provide the necessary buffers.
+ */
+#if !defined SNMP_LWIP_MIB2_SYSLOCATION || defined __DOXYGEN__
+#define SNMP_LWIP_MIB2_SYSLOCATION          ""
+#endif
+
+/**
+ * This value is used to limit the repetitions processed in GetBulk requests (value == 0 means no limitation).
+ * This may be useful to limit the load for a single request.
+ * According to SNMP RFC 1905 it is allowed to not return all requested variables from a GetBulk request if system load would be too high.
+ * so the effect is that the client will do more requests to gather all data.
+ * For the stack this could be useful in case that SNMP processing is done in TCP/IP thread. In this situation a request with many
+ * repetitions could block the thread for a longer time. Setting limit here will keep the stack more responsive.
+ */
+#if !defined SNMP_LWIP_GETBULK_MAX_REPETITIONS || defined __DOXYGEN__
+#define SNMP_LWIP_GETBULK_MAX_REPETITIONS 0
+#endif
+
+/**
+ * @}
+ */
+
+/*
+   ------------------------------------
+   ---------- SNMPv3 options ----------
+   ------------------------------------
+*/
+
+/**
+ * LWIP_SNMP_V3==1: This enables EXPERIMENTAL SNMPv3 support. LWIP_SNMP must
+ * also be enabled.
+ * THIS IS UNDER DEVELOPMENT AND SHOULD NOT BE ENABLED IN PRODUCTS.
+ */
+#ifndef LWIP_SNMP_V3
+#define LWIP_SNMP_V3               0
+#endif
+
+#ifndef LWIP_SNMP_V3_MBEDTLS
+#define LWIP_SNMP_V3_MBEDTLS       LWIP_SNMP_V3
+#endif
+
+#ifndef LWIP_SNMP_V3_CRYPTO
+#define LWIP_SNMP_V3_CRYPTO        LWIP_SNMP_V3_MBEDTLS
+#endif
+
+#ifndef LWIP_SNMP_CONFIGURE_VERSIONS
+#define LWIP_SNMP_CONFIGURE_VERSIONS 0
+#endif
+
+#endif /* LWIP_HDR_SNMP_OPTS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_scalar.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_scalar.h
new file mode 100644
index 00000000000..40a060c6404
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_scalar.h
@@ -0,0 +1,113 @@
+/**
+ * @file
+ * SNMP server MIB API to implement scalar nodes
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Martin Hentschel <info@cl-soft.de>
+ *
+ */
+
+#ifndef LWIP_HDR_APPS_SNMP_SCALAR_H
+#define LWIP_HDR_APPS_SNMP_SCALAR_H
+
+#include "lwip/apps/snmp_opts.h"
+#include "lwip/apps/snmp_core.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */
+
+/** basic scalar node */
+struct snmp_scalar_node
+{
+  /** inherited "base class" members */
+  struct snmp_leaf_node node;
+  u8_t asn1_type;
+  snmp_access_t access;
+  node_instance_get_value_method get_value;
+  node_instance_set_test_method set_test;
+  node_instance_set_value_method set_value;
+};
+
+
+snmp_err_t snmp_scalar_get_instance(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+snmp_err_t snmp_scalar_get_next_instance(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+
+#define SNMP_SCALAR_CREATE_NODE(oid, access, asn1_type, get_value_method, set_test_method, set_value_method) \
+  {{{ SNMP_NODE_SCALAR, (oid) }, \
+    snmp_scalar_get_instance, \
+    snmp_scalar_get_next_instance }, \
+    (asn1_type), (access), (get_value_method), (set_test_method), (set_value_method) }
+
+#define SNMP_SCALAR_CREATE_NODE_READONLY(oid, asn1_type, get_value_method) SNMP_SCALAR_CREATE_NODE(oid, SNMP_NODE_INSTANCE_READ_ONLY, asn1_type, get_value_method, NULL, NULL)
+
+/** scalar array node - a tree node which contains scalars only as children */
+struct snmp_scalar_array_node_def
+{
+  u32_t         oid;
+  u8_t          asn1_type;
+  snmp_access_t access;
+};
+
+typedef s16_t (*snmp_scalar_array_get_value_method)(const struct snmp_scalar_array_node_def*, void*);
+typedef snmp_err_t (*snmp_scalar_array_set_test_method)(const struct snmp_scalar_array_node_def*, u16_t, void*);
+typedef snmp_err_t (*snmp_scalar_array_set_value_method)(const struct snmp_scalar_array_node_def*, u16_t, void*);
+
+/** basic scalar array node */
+struct snmp_scalar_array_node
+{
+  /** inherited "base class" members */
+  struct snmp_leaf_node node;
+  u16_t array_node_count;
+  const struct snmp_scalar_array_node_def* array_nodes;
+  snmp_scalar_array_get_value_method get_value;
+  snmp_scalar_array_set_test_method set_test;
+  snmp_scalar_array_set_value_method set_value;
+};
+
+snmp_err_t snmp_scalar_array_get_instance(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+snmp_err_t snmp_scalar_array_get_next_instance(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+
+#define SNMP_SCALAR_CREATE_ARRAY_NODE(oid, array_nodes, get_value_method, set_test_method, set_value_method) \
+  {{{ SNMP_NODE_SCALAR_ARRAY, (oid) }, \
+    snmp_scalar_array_get_instance, \
+    snmp_scalar_array_get_next_instance }, \
+    (u16_t)LWIP_ARRAYSIZE(array_nodes), (array_nodes), (get_value_method), (set_test_method), (set_value_method) }
+
+#endif /* LWIP_SNMP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_SNMP_SCALAR_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_snmpv2_framework.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_snmpv2_framework.h
new file mode 100644
index 00000000000..47409cc2010
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_snmpv2_framework.h
@@ -0,0 +1,32 @@
+/*
+Generated by LwipMibCompiler
+*/
+
+#ifndef LWIP_HDR_APPS_SNMP_FRAMEWORK_MIB_H
+#define LWIP_HDR_APPS_SNMP_FRAMEWORK_MIB_H
+
+#include "lwip/apps/snmp_opts.h"
+#if LWIP_SNMP
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "lwip/apps/snmp_core.h"
+
+extern const struct snmp_obj_id usmNoAuthProtocol;
+extern const struct snmp_obj_id usmHMACMD5AuthProtocol;
+extern const struct snmp_obj_id usmHMACSHAAuthProtocol;
+
+extern const struct snmp_obj_id usmNoPrivProtocol;
+extern const struct snmp_obj_id usmDESPrivProtocol;
+extern const struct snmp_obj_id usmAESPrivProtocol;
+
+extern const struct snmp_mib snmpframeworkmib;
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LWIP_SNMP */
+#endif /* LWIP_HDR_APPS_SNMP_FRAMEWORK_MIB_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_snmpv2_usm.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_snmpv2_usm.h
new file mode 100644
index 00000000000..88cfcd8ebed
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_snmpv2_usm.h
@@ -0,0 +1,24 @@
+/*
+Generated by LwipMibCompiler
+*/
+
+#ifndef LWIP_HDR_APPS_SNMP_USER_BASED_SM_MIB_H
+#define LWIP_HDR_APPS_SNMP_USER_BASED_SM_MIB_H
+
+#include "lwip/apps/snmp_opts.h"
+#if LWIP_SNMP
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "lwip/apps/snmp_core.h"
+
+extern const struct snmp_mib snmpusmmib;
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LWIP_SNMP */
+#endif /* LWIP_HDR_APPS_SNMP_USER_BASED_SM_MIB_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_table.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_table.h
new file mode 100644
index 00000000000..4988b51c250
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_table.h
@@ -0,0 +1,134 @@
+/**
+ * @file
+ * SNMP server MIB API to implement table nodes
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Martin Hentschel <info@cl-soft.de>
+ *
+ */
+
+#ifndef LWIP_HDR_APPS_SNMP_TABLE_H
+#define LWIP_HDR_APPS_SNMP_TABLE_H
+
+#include "lwip/apps/snmp_opts.h"
+#include "lwip/apps/snmp_core.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */
+
+/** default (customizable) read/write table */
+struct snmp_table_col_def
+{
+  u32_t index;
+  u8_t asn1_type;
+  snmp_access_t access;
+};
+
+/** table node */
+struct snmp_table_node
+{
+  /** inherited "base class" members */
+  struct snmp_leaf_node node;
+  u16_t column_count;
+  const struct snmp_table_col_def* columns;
+  snmp_err_t (*get_cell_instance)(const u32_t* column, const u32_t* row_oid, u8_t row_oid_len, struct snmp_node_instance* cell_instance);
+  snmp_err_t (*get_next_cell_instance)(const u32_t* column, struct snmp_obj_id* row_oid, struct snmp_node_instance* cell_instance);
+  /** returns object value for the given object identifier */
+  node_instance_get_value_method get_value;
+  /** tests length and/or range BEFORE setting */
+  node_instance_set_test_method set_test;
+  /** sets object value, only called when set_test() was successful */
+  node_instance_set_value_method set_value;
+};
+
+snmp_err_t snmp_table_get_instance(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+snmp_err_t snmp_table_get_next_instance(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+
+#define SNMP_TABLE_CREATE(oid, columns, get_cell_instance_method, get_next_cell_instance_method, get_value_method, set_test_method, set_value_method) \
+  {{{ SNMP_NODE_TABLE, (oid) }, \
+  snmp_table_get_instance, \
+  snmp_table_get_next_instance }, \
+  (u16_t)LWIP_ARRAYSIZE(columns), (columns), \
+  (get_cell_instance_method), (get_next_cell_instance_method), \
+  (get_value_method), (set_test_method), (set_value_method)}
+
+#define SNMP_TABLE_GET_COLUMN_FROM_OID(oid) ((oid)[1]) /* first array value is (fixed) row entry (fixed to 1) and 2nd value is column, follow3ed by instance */
+
+
+/** simple read-only table */
+typedef enum {
+  SNMP_VARIANT_VALUE_TYPE_U32,
+  SNMP_VARIANT_VALUE_TYPE_S32,
+  SNMP_VARIANT_VALUE_TYPE_PTR,
+  SNMP_VARIANT_VALUE_TYPE_CONST_PTR
+} snmp_table_column_data_type_t;
+
+struct snmp_table_simple_col_def
+{
+  u32_t index;
+  u8_t asn1_type;
+  snmp_table_column_data_type_t data_type; /* depending of what union member is used to store the value*/
+};
+
+/** simple read-only table node */
+struct snmp_table_simple_node
+{
+  /* inherited "base class" members */
+  struct snmp_leaf_node node;
+  u16_t column_count;
+  const struct snmp_table_simple_col_def* columns;
+  snmp_err_t (*get_cell_value)(const u32_t* column, const u32_t* row_oid, u8_t row_oid_len, union snmp_variant_value* value, u32_t* value_len);
+  snmp_err_t (*get_next_cell_instance_and_value)(const u32_t* column, struct snmp_obj_id* row_oid, union snmp_variant_value* value, u32_t* value_len);
+};
+
+snmp_err_t snmp_table_simple_get_instance(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+snmp_err_t snmp_table_simple_get_next_instance(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+
+#define SNMP_TABLE_CREATE_SIMPLE(oid, columns, get_cell_value_method, get_next_cell_instance_and_value_method) \
+  {{{ SNMP_NODE_TABLE, (oid) }, \
+  snmp_table_simple_get_instance, \
+  snmp_table_simple_get_next_instance }, \
+  (u16_t)LWIP_ARRAYSIZE(columns), (columns), (get_cell_value_method), (get_next_cell_instance_and_value_method) }
+
+s16_t snmp_table_extract_value_from_s32ref(struct snmp_node_instance* instance, void* value);
+s16_t snmp_table_extract_value_from_u32ref(struct snmp_node_instance* instance, void* value);
+s16_t snmp_table_extract_value_from_refconstptr(struct snmp_node_instance* instance, void* value);
+
+#endif /* LWIP_SNMP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_SNMP_TABLE_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_threadsync.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_threadsync.h
new file mode 100644
index 00000000000..a25dbf2d0f0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmp_threadsync.h
@@ -0,0 +1,114 @@
+/**
+ * @file
+ * SNMP server MIB API to implement thread synchronization
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Dirk Ziegelmeier <dziegel@gmx.de>
+ *
+ */
+
+#ifndef LWIP_HDR_APPS_SNMP_THREADSYNC_H
+#define LWIP_HDR_APPS_SNMP_THREADSYNC_H
+
+#include "lwip/apps/snmp_opts.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/apps/snmp_core.h"
+#include "lwip/sys.h"
+
+typedef void (*snmp_threadsync_called_fn)(void* arg);
+typedef void (*snmp_threadsync_synchronizer_fn)(snmp_threadsync_called_fn fn, void* arg);
+
+
+/** Thread sync runtime data. For internal usage only. */
+struct threadsync_data
+{
+  union {
+    snmp_err_t err;
+    s16_t s16;
+  } retval;
+  union {
+    const u32_t *root_oid;
+    void *value;
+  } arg1;
+  union {
+    u8_t root_oid_len;
+    u16_t len;
+  } arg2;
+  const struct snmp_threadsync_node *threadsync_node;
+  struct snmp_node_instance proxy_instance;
+};
+
+/** Thread sync instance. Needed EXCATLY once for every thread to be synced into. */
+struct snmp_threadsync_instance
+{
+  sys_sem_t                       sem;
+  sys_mutex_t                     sem_usage_mutex;
+  snmp_threadsync_synchronizer_fn sync_fn;
+  struct threadsync_data          data;
+};
+
+/** SNMP thread sync proxy leaf node */
+struct snmp_threadsync_node
+{
+  /* inherited "base class" members */
+  struct snmp_leaf_node           node;
+
+  const struct snmp_leaf_node     *target;
+  struct snmp_threadsync_instance *instance;
+};
+
+snmp_err_t snmp_threadsync_get_instance(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+snmp_err_t snmp_threadsync_get_next_instance(const u32_t *root_oid, u8_t root_oid_len, struct snmp_node_instance* instance);
+
+/** Create thread sync proxy node */
+#define SNMP_CREATE_THREAD_SYNC_NODE(oid, target_leaf_node, threadsync_instance) \
+  {{{ SNMP_NODE_THREADSYNC, (oid) }, \
+    snmp_threadsync_get_instance, \
+    snmp_threadsync_get_next_instance }, \
+    (target_leaf_node), \
+    (threadsync_instance) }
+
+/** Create thread sync instance data */
+void snmp_threadsync_init(struct snmp_threadsync_instance *instance, snmp_threadsync_synchronizer_fn sync_fn);
+
+#endif /* LWIP_SNMP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_SNMP_THREADSYNC_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmpv3.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmpv3.h
new file mode 100644
index 00000000000..e0dda6499b6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/snmpv3.h
@@ -0,0 +1,114 @@
+/**
+ * @file
+ * Additional SNMPv3 functionality RFC3414 and RFC3826.
+ */
+
+/*
+ * Copyright (c) 2016 Elias Oenal.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * Author: Elias Oenal <lwip@eliasoenal.com>
+ */
+
+#ifndef LWIP_HDR_APPS_SNMP_V3_H
+#define LWIP_HDR_APPS_SNMP_V3_H
+
+#include "lwip/apps/snmp_opts.h"
+#include "lwip/err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_SNMP && LWIP_SNMP_V3
+
+typedef enum
+{
+  SNMP_V3_AUTH_ALGO_INVAL = 0,
+  SNMP_V3_AUTH_ALGO_MD5   = 1,
+  SNMP_V3_AUTH_ALGO_SHA   = 2
+} snmpv3_auth_algo_t;
+
+typedef enum
+{
+  SNMP_V3_PRIV_ALGO_INVAL = 0,
+  SNMP_V3_PRIV_ALGO_DES   = 1,
+  SNMP_V3_PRIV_ALGO_AES   = 2
+} snmpv3_priv_algo_t;
+
+typedef enum
+{
+  SNMP_V3_USER_STORAGETYPE_OTHER       = 1,
+  SNMP_V3_USER_STORAGETYPE_VOLATILE    = 2,
+  SNMP_V3_USER_STORAGETYPE_NONVOLATILE = 3,
+  SNMP_V3_USER_STORAGETYPE_PERMANENT   = 4,
+  SNMP_V3_USER_STORAGETYPE_READONLY    = 5
+} snmpv3_user_storagetype_t;
+
+/*
+ * The following callback functions must be implemented by the application.
+ * There is a dummy implementation in snmpv3_dummy.c.
+ */
+
+void snmpv3_get_engine_id(const char **id, u8_t *len);
+err_t snmpv3_set_engine_id(const char* id, u8_t len);
+
+u32_t snmpv3_get_engine_boots(void);
+void snmpv3_set_engine_boots(u32_t boots);
+
+u32_t snmpv3_get_engine_time(void);
+void snmpv3_reset_engine_time(void);
+
+err_t snmpv3_get_user(const char* username, snmpv3_auth_algo_t *auth_algo, u8_t *auth_key, snmpv3_priv_algo_t *priv_algo, u8_t *priv_key);
+u8_t snmpv3_get_amount_of_users(void);
+err_t snmpv3_get_user_storagetype(const char *username, snmpv3_user_storagetype_t *storagetype);
+err_t snmpv3_get_username(char *username, u8_t index);
+
+/* The following functions are provided by the SNMPv3 agent */
+
+void snmpv3_engine_id_changed(void);
+s32_t snmpv3_get_engine_time_internal(void);
+
+void snmpv3_password_to_key_md5(
+    const u8_t *password,     /* IN */
+    size_t      passwordlen,  /* IN */
+    const u8_t *engineID,     /* IN  - pointer to snmpEngineID  */
+    u8_t        engineLength, /* IN  - length of snmpEngineID */
+    u8_t       *key);         /* OUT - pointer to caller 16-octet buffer */
+
+void snmpv3_password_to_key_sha(
+    const u8_t *password,     /* IN */
+    size_t      passwordlen,  /* IN */
+    const u8_t *engineID,     /* IN  - pointer to snmpEngineID  */
+    u8_t        engineLength, /* IN  - length of snmpEngineID */
+    u8_t       *key);         /* OUT - pointer to caller 20-octet buffer */
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_SNMP_V3_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/sntp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/sntp.h
new file mode 100644
index 00000000000..c4152534faf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/sntp.h
@@ -0,0 +1,80 @@
+/**
+ * @file
+ * SNTP client API
+ */
+
+/*
+ * Copyright (c) 2007-2009 Frédéric Bernon, Simon Goldschmidt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Frédéric Bernon, Simon Goldschmidt
+ *
+ */
+#ifndef LWIP_HDR_APPS_SNTP_H
+#define LWIP_HDR_APPS_SNTP_H
+
+#include "lwip/apps/sntp_opts.h"
+#include "lwip/ip_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* SNTP operating modes: default is to poll using unicast.
+   The mode has to be set before calling sntp_init(). */
+#define SNTP_OPMODE_POLL            0
+#define SNTP_OPMODE_LISTENONLY      1
+void sntp_setoperatingmode(u8_t operating_mode);
+u8_t sntp_getoperatingmode(void);
+
+void sntp_init(void);
+void sntp_stop(void);
+u8_t sntp_enabled(void);
+
+void sntp_setserver(u8_t idx, const ip_addr_t *addr);
+const ip_addr_t* sntp_getserver(u8_t idx);
+
+#if SNTP_MONITOR_SERVER_REACHABILITY
+u8_t sntp_getreachability(u8_t idx);
+#endif /* SNTP_MONITOR_SERVER_REACHABILITY */
+
+#if SNTP_SERVER_DNS
+void sntp_setservername(u8_t idx, const char *server);
+const char *sntp_getservername(u8_t idx);
+#endif /* SNTP_SERVER_DNS */
+
+#if SNTP_GET_SERVERS_FROM_DHCP || SNTP_GET_SERVERS_FROM_DHCPV6
+void sntp_servermode_dhcp(int set_servers_from_dhcp);
+#else /* SNTP_GET_SERVERS_FROM_DHCP || SNTP_GET_SERVERS_FROM_DHCPV6 */
+#define sntp_servermode_dhcp(x)
+#endif /* SNTP_GET_SERVERS_FROM_DHCP || SNTP_GET_SERVERS_FROM_DHCPV6 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_SNTP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/sntp_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/sntp_opts.h
new file mode 100644
index 00000000000..cb627716480
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/sntp_opts.h
@@ -0,0 +1,215 @@
+/**
+ * @file
+ * SNTP client options list
+ */
+
+/*
+ * Copyright (c) 2007-2009 Frédéric Bernon, Simon Goldschmidt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Frédéric Bernon, Simon Goldschmidt
+ *
+ */
+#ifndef LWIP_HDR_APPS_SNTP_OPTS_H
+#define LWIP_HDR_APPS_SNTP_OPTS_H
+
+#include "lwip/opt.h"
+#include "lwip/prot/iana.h"
+
+/**
+ * @defgroup sntp_opts Options
+ * @ingroup sntp
+ * @{
+ */
+
+/** SNTP macro to change system time in seconds
+ * Define SNTP_SET_SYSTEM_TIME_US(sec, us) to set the time in microseconds
+ * instead of this one if you need the additional precision. Alternatively,
+ * define SNTP_SET_SYSTEM_TIME_NTP(sec, frac) in order to work with native
+ * NTP timestamps instead.
+ */
+#if !defined SNTP_SET_SYSTEM_TIME || defined __DOXYGEN__
+#define SNTP_SET_SYSTEM_TIME(sec)   LWIP_UNUSED_ARG(sec)
+#endif
+
+/** The maximum number of SNTP servers that can be set */
+#if !defined SNTP_MAX_SERVERS || defined __DOXYGEN__
+#define SNTP_MAX_SERVERS           LWIP_DHCP_MAX_NTP_SERVERS
+#endif
+
+/** Set this to 1 to implement the callback function called by dhcp when
+ * NTP servers are received. */
+#if !defined SNTP_GET_SERVERS_FROM_DHCP || defined __DOXYGEN__
+#define SNTP_GET_SERVERS_FROM_DHCP LWIP_DHCP_GET_NTP_SRV
+#endif
+
+/** Set this to 1 to implement the callback function called by dhcpv6 when
+ * NTP servers are received. */
+#if !defined SNTP_GET_SERVERS_FROM_DHCPV6 || defined __DOXYGEN__
+#define SNTP_GET_SERVERS_FROM_DHCPV6 LWIP_DHCP6_GET_NTP_SRV
+#endif
+
+/** Set this to 1 to support DNS names (or IP address strings) to set sntp servers
+ * One server address/name can be defined as default if SNTP_SERVER_DNS == 1:
+ * \#define SNTP_SERVER_ADDRESS "pool.ntp.org"
+ */
+#if !defined SNTP_SERVER_DNS || defined __DOXYGEN__
+#define SNTP_SERVER_DNS            0
+#endif
+
+/**
+ * SNTP_DEBUG: Enable debugging for SNTP.
+ */
+#if !defined SNTP_DEBUG || defined __DOXYGEN__
+#define SNTP_DEBUG                  LWIP_DBG_OFF
+#endif
+
+/** SNTP server port */
+#if !defined SNTP_PORT || defined __DOXYGEN__
+#define SNTP_PORT                   LWIP_IANA_PORT_SNTP
+#endif
+
+/** Sanity check:
+ * Define this to
+ * - 0 to turn off sanity checks (default; smaller code)
+ * - >= 1 to check address and port of the response packet to ensure the
+ *        response comes from the server we sent the request to.
+ * - >= 2 to check returned Originate Timestamp against Transmit Timestamp
+ *        sent to the server (to ensure response to older request).
+ * - >= 3 @todo: discard reply if any of the VN, Stratum, or Transmit Timestamp
+ *        fields is 0 or the Mode field is not 4 (unicast) or 5 (broadcast).
+ * - >= 4 @todo: to check that the Root Delay and Root Dispersion fields are each
+ *        greater than or equal to 0 and less than infinity, where infinity is
+ *        currently a cozy number like one second. This check avoids using a
+ *        server whose synchronization source has expired for a very long time.
+ */
+#if !defined SNTP_CHECK_RESPONSE || defined __DOXYGEN__
+#define SNTP_CHECK_RESPONSE         0
+#endif
+
+/** Enable round-trip delay compensation.
+ * Compensate for the round-trip delay by calculating the clock offset from
+ * the originate, receive, transmit and destination timestamps, as per RFC.
+ *
+ * The calculation requires compiler support for 64-bit integers. Also, either
+ * SNTP_SET_SYSTEM_TIME_US or SNTP_SET_SYSTEM_TIME_NTP has to be implemented
+ * for setting the system clock with sub-second precision. Likewise, either
+ * SNTP_GET_SYSTEM_TIME or SNTP_GET_SYSTEM_TIME_NTP needs to be implemented
+ * with sub-second precision.
+ *
+ * Although not strictly required, it makes sense to combine this option with
+ * SNTP_CHECK_RESPONSE >= 2 for sanity-checking of the received timestamps.
+ * Also, in order for the round-trip calculation to work, the difference
+ * between the local clock and the NTP server clock must not be larger than
+ * about 34 years. If that limit is exceeded, the implementation will fall back
+ * to setting the clock without compensation. In order to ensure that the local
+ * clock is always within the permitted range for compensation, even at first
+ * try, it may be necessary to store at least the current year in non-volatile
+ * memory.
+ */
+#if !defined SNTP_COMP_ROUNDTRIP || defined __DOXYGEN__
+#define SNTP_COMP_ROUNDTRIP         0
+#endif
+
+/** According to the RFC, this shall be a random delay
+ * between 1 and 5 minutes (in milliseconds) to prevent load peaks.
+ * This can be defined to a random generation function,
+ * which must return the delay in milliseconds as u32_t.
+ * Turned off by default.
+ */
+#if !defined SNTP_STARTUP_DELAY || defined __DOXYGEN__
+#ifdef LWIP_RAND
+#define SNTP_STARTUP_DELAY          1
+#else
+#define SNTP_STARTUP_DELAY          0
+#endif
+#endif
+
+/** If you want the startup delay to be a function, define this
+ * to a function (including the brackets) and define SNTP_STARTUP_DELAY to 1.
+ */
+#if !defined SNTP_STARTUP_DELAY_FUNC || defined __DOXYGEN__
+#define SNTP_STARTUP_DELAY_FUNC     (LWIP_RAND() % 5000)
+#endif
+
+/** SNTP receive timeout - in milliseconds
+ * Also used as retry timeout - this shouldn't be too low.
+ * Default is 15 seconds. Must not be beolw 15 seconds by specification (i.e. 15000)
+ */
+#if !defined SNTP_RECV_TIMEOUT || defined __DOXYGEN__
+#define SNTP_RECV_TIMEOUT           15000
+#endif
+
+/** SNTP update delay - in milliseconds
+ * Default is 1 hour. Must not be beolw 60 seconds by specification (i.e. 60000)
+ */
+#if !defined SNTP_UPDATE_DELAY || defined __DOXYGEN__
+#define SNTP_UPDATE_DELAY           3600000
+#endif
+
+/** SNTP macro to get system time, used with SNTP_CHECK_RESPONSE >= 2
+ * to send in request and compare in response. Also used for round-trip
+ * delay compensation if SNTP_COMP_ROUNDTRIP != 0.
+ * Alternatively, define SNTP_GET_SYSTEM_TIME_NTP(sec, frac) in order to
+ * work with native NTP timestamps instead.
+ */
+#if !defined SNTP_GET_SYSTEM_TIME || defined __DOXYGEN__
+#define SNTP_GET_SYSTEM_TIME(sec, us)     do { (sec) = 0; (us) = 0; } while(0)
+#endif
+
+/** Default retry timeout (in milliseconds) if the response
+ * received is invalid.
+ * This is doubled with each retry until SNTP_RETRY_TIMEOUT_MAX is reached.
+ */
+#if !defined SNTP_RETRY_TIMEOUT || defined __DOXYGEN__
+#define SNTP_RETRY_TIMEOUT          SNTP_RECV_TIMEOUT
+#endif
+
+/** Maximum retry timeout (in milliseconds). */
+#if !defined SNTP_RETRY_TIMEOUT_MAX || defined __DOXYGEN__
+#define SNTP_RETRY_TIMEOUT_MAX      (SNTP_RETRY_TIMEOUT * 10)
+#endif
+
+/** Increase retry timeout with every retry sent
+ * Default is on to conform to RFC.
+ */
+#if !defined SNTP_RETRY_TIMEOUT_EXP || defined __DOXYGEN__
+#define SNTP_RETRY_TIMEOUT_EXP      1
+#endif
+
+/** Keep a reachability shift register per server
+ * Default is on to conform to RFC.
+ */
+#if !defined SNTP_MONITOR_SERVER_REACHABILITY || defined __DOXYGEN__
+#define SNTP_MONITOR_SERVER_REACHABILITY 1
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* LWIP_HDR_APPS_SNTP_OPTS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/tftp_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/tftp_opts.h
new file mode 100644
index 00000000000..198f632b68e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/tftp_opts.h
@@ -0,0 +1,106 @@
+/**
+ *
+ * @file tftp_opts.h
+ *
+ * @author   Logan Gunthorpe <logang@deltatee.com>
+ *
+ * @brief    Trivial File Transfer Protocol (RFC 1350) implementation options
+ *
+ * Copyright (c) Deltatee Enterprises Ltd. 2013
+ * All rights reserved.
+ *
+ */
+
+/* 
+ * Redistribution and use in source and binary forms, with or without
+ * modification,are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Logan Gunthorpe <logang@deltatee.com>
+ *
+ */
+
+#ifndef LWIP_HDR_APPS_TFTP_OPTS_H
+#define LWIP_HDR_APPS_TFTP_OPTS_H
+
+#include "lwip/opt.h"
+#include "lwip/prot/iana.h"
+
+/**
+ * @defgroup tftp_opts Options
+ * @ingroup tftp
+ * @{
+ */
+
+/**
+ * Enable TFTP debug messages
+ */
+#if !defined TFTP_DEBUG || defined __DOXYGEN__
+#define TFTP_DEBUG            LWIP_DBG_OFF
+#endif
+
+/**
+ * TFTP server port
+ */
+#if !defined TFTP_PORT || defined __DOXYGEN__
+#define TFTP_PORT             LWIP_IANA_PORT_TFTP
+#endif
+
+/**
+ * TFTP timeout
+ */
+#if !defined TFTP_TIMEOUT_MSECS || defined __DOXYGEN__
+#define TFTP_TIMEOUT_MSECS    10000
+#endif
+
+/**
+ * Max. number of retries when a file is read from server
+ */
+#if !defined TFTP_MAX_RETRIES || defined __DOXYGEN__
+#define TFTP_MAX_RETRIES      5
+#endif
+
+/**
+ * TFTP timer cyclic interval
+ */
+#if !defined TFTP_TIMER_MSECS || defined __DOXYGEN__
+#define TFTP_TIMER_MSECS      (TFTP_TIMEOUT_MSECS / 10)
+#endif
+
+/**
+ * Max. length of TFTP filename
+ */
+#if !defined TFTP_MAX_FILENAME_LEN || defined __DOXYGEN__
+#define TFTP_MAX_FILENAME_LEN 20
+#endif
+
+/**
+ * Max. length of TFTP mode
+ */
+#if !defined TFTP_MAX_MODE_LEN || defined __DOXYGEN__
+#define TFTP_MAX_MODE_LEN     7
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* LWIP_HDR_APPS_TFTP_OPTS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/tftp_server.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/tftp_server.h
new file mode 100644
index 00000000000..0a7fbee02ae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/apps/tftp_server.h
@@ -0,0 +1,95 @@
+/**
+ *
+ * @file tftp_server.h
+ *
+ * @author   Logan Gunthorpe <logang@deltatee.com>
+ *
+ * @brief    Trivial File Transfer Protocol (RFC 1350)
+ *
+ * Copyright (c) Deltatee Enterprises Ltd. 2013
+ * All rights reserved.
+ *
+ */
+
+/* 
+ * Redistribution and use in source and binary forms, with or without
+ * modification,are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Logan Gunthorpe <logang@deltatee.com>
+ *
+ */
+
+#ifndef LWIP_HDR_APPS_TFTP_SERVER_H
+#define LWIP_HDR_APPS_TFTP_SERVER_H
+
+#include "lwip/apps/tftp_opts.h"
+#include "lwip/err.h"
+#include "lwip/pbuf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @ingroup tftp
+ * TFTP context containing callback functions for TFTP transfers
+ */
+struct tftp_context {
+  /**
+   * Open file for read/write.
+   * @param fname Filename
+   * @param mode Mode string from TFTP RFC 1350 (netascii, octet, mail)
+   * @param write Flag indicating read (0) or write (!= 0) access
+   * @returns File handle supplied to other functions
+   */
+  void* (*open)(const char* fname, const char* mode, u8_t write);
+  /**
+   * Close file handle
+   * @param handle File handle returned by open()
+   */
+  void (*close)(void* handle);
+  /**
+   * Read from file 
+   * @param handle File handle returned by open()
+   * @param buf Target buffer to copy read data to
+   * @param bytes Number of bytes to copy to buf
+   * @returns &gt;= 0: Success; &lt; 0: Error
+   */
+  int (*read)(void* handle, void* buf, int bytes);
+  /**
+   * Write to file
+   * @param handle File handle returned by open()
+   * @param pbuf PBUF adjusted such that payload pointer points
+   *             to the beginning of write data. In other words,
+   *             TFTP headers are stripped off.
+   * @returns &gt;= 0: Success; &lt; 0: Error
+   */
+  int (*write)(void* handle, struct pbuf* p);
+};
+
+err_t tftp_init(const struct tftp_context* ctx);
+void tftp_cleanup(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_APPS_TFTP_SERVER_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/arch.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/arch.h
new file mode 100644
index 00000000000..58dae33aa1e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/arch.h
@@ -0,0 +1,393 @@
+/**
+ * @file
+ * Support for different processor and compiler architectures
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_ARCH_H
+#define LWIP_HDR_ARCH_H
+
+#ifndef LITTLE_ENDIAN
+#define LITTLE_ENDIAN 1234
+#endif
+
+#ifndef BIG_ENDIAN
+#define BIG_ENDIAN 4321
+#endif
+
+#include "arch/cc.h"
+
+/**
+ * @defgroup compiler_abstraction Compiler/platform abstraction
+ * @ingroup sys_layer
+ * All defines related to this section must not be placed in lwipopts.h,
+ * but in arch/cc.h!
+ * If the compiler does not provide memset() this file must include a
+ * definition of it, or include a file which defines it.
+ * These options cannot be \#defined in lwipopts.h since they are not options
+ * of lwIP itself, but options of the lwIP port to your system.
+ * @{
+ */
+
+/** Define the byte order of the system.
+ * Needed for conversion of network data to host byte order.
+ * Allowed values: LITTLE_ENDIAN and BIG_ENDIAN
+ */
+#ifndef BYTE_ORDER
+#define BYTE_ORDER LITTLE_ENDIAN
+#endif
+
+/** Define random number generator function of your system */
+#ifdef __DOXYGEN__
+#define LWIP_RAND() ((u32_t)rand())
+#endif
+
+/** Platform specific diagnostic output.\n
+ * Note the default implementation pulls in printf, which may
+ * in turn pull in a lot of standard libary code. In resource-constrained 
+ * systems, this should be defined to something less resource-consuming.
+ */
+#ifndef LWIP_PLATFORM_DIAG
+#define LWIP_PLATFORM_DIAG(x) do {printf x;} while(0)
+#include <stdio.h>
+#include <stdlib.h>
+#endif
+
+/** Platform specific assertion handling.\n
+ * Note the default implementation pulls in printf, fflush and abort, which may
+ * in turn pull in a lot of standard libary code. In resource-constrained 
+ * systems, this should be defined to something less resource-consuming.
+ */
+#ifndef LWIP_PLATFORM_ASSERT
+#define LWIP_PLATFORM_ASSERT(x) do {printf("Assertion \"%s\" failed at line %d in %s\n", \
+                                     x, __LINE__, __FILE__); fflush(NULL); abort();} while(0)
+#include <stdio.h>
+#include <stdlib.h>
+#endif
+
+/** Define this to 1 in arch/cc.h of your port if you do not want to
+ * include stddef.h header to get size_t. You need to typedef size_t
+ * by yourself in this case.
+ */
+#ifndef LWIP_NO_STDDEF_H
+#define LWIP_NO_STDDEF_H 0
+#endif
+
+#if !LWIP_NO_STDDEF_H
+#include <stddef.h> /* for size_t */
+#endif
+
+/** Define this to 1 in arch/cc.h of your port if your compiler does not provide
+ * the stdint.h header. You need to typedef the generic types listed in
+ * lwip/arch.h yourself in this case (u8_t, u16_t...).
+ */
+#ifndef LWIP_NO_STDINT_H
+#define LWIP_NO_STDINT_H 0
+#endif
+
+/* Define generic types used in lwIP */
+#if !LWIP_NO_STDINT_H
+#include <stdint.h>
+/* stdint.h is C99 which should also provide support for 64-bit integers */
+#if !defined(LWIP_HAVE_INT64) && defined(UINT64_MAX)
+#define LWIP_HAVE_INT64 1
+#endif
+typedef uint8_t   u8_t;
+typedef int8_t    s8_t;
+typedef uint16_t  u16_t;
+typedef int16_t   s16_t;
+typedef uint32_t  u32_t;
+typedef int32_t   s32_t;
+#if LWIP_HAVE_INT64
+typedef uint64_t  u64_t;
+typedef int64_t   s64_t;
+#endif
+typedef uintptr_t mem_ptr_t;
+#endif
+
+/** Define this to 1 in arch/cc.h of your port if your compiler does not provide
+ * the inttypes.h header. You need to define the format strings listed in
+ * lwip/arch.h yourself in this case (X8_F, U16_F...).
+ */
+#ifndef LWIP_NO_INTTYPES_H
+#define LWIP_NO_INTTYPES_H 0
+#endif
+
+/* Define (sn)printf formatters for these lwIP types */
+#if !LWIP_NO_INTTYPES_H
+#include <inttypes.h>
+#ifndef X8_F
+#define X8_F  "02" PRIx8
+#endif
+#ifndef U16_F
+#define U16_F PRIu16
+#endif
+#ifndef S16_F
+#define S16_F PRId16
+#endif
+#ifndef X16_F
+#define X16_F PRIx16
+#endif
+#ifndef U32_F
+#define U32_F PRIu32
+#endif
+#ifndef S32_F
+#define S32_F PRId32
+#endif
+#ifndef X32_F
+#define X32_F PRIx32
+#endif
+#ifndef SZT_F
+#define SZT_F PRIuPTR
+#endif
+#endif
+
+/** Define this to 1 in arch/cc.h of your port if your compiler does not provide
+ * the limits.h header. You need to define the type limits yourself in this case
+ * (e.g. INT_MAX, SSIZE_MAX).
+ */
+#ifndef LWIP_NO_LIMITS_H
+#define LWIP_NO_LIMITS_H 0
+#endif
+
+/* Include limits.h? */
+#if !LWIP_NO_LIMITS_H
+#include <limits.h>
+#endif
+
+/* Do we need to define ssize_t? This is a compatibility hack:
+ * Unfortunately, this type seems to be unavailable on some systems (even if
+ * sys/types or unistd.h are available).
+ * Being like that, we define it to 'int' if SSIZE_MAX is not defined.
+ */
+#ifdef SSIZE_MAX
+/* If SSIZE_MAX is defined, unistd.h should provide the type as well */
+#ifndef LWIP_NO_UNISTD_H
+#define LWIP_NO_UNISTD_H 0
+#endif
+#if !LWIP_NO_UNISTD_H
+#include <unistd.h>
+#endif
+#else /* SSIZE_MAX */
+typedef int ssize_t;
+#define SSIZE_MAX INT_MAX
+#endif /* SSIZE_MAX */
+
+/* some maximum values needed in lwip code */
+#define LWIP_UINT32_MAX 0xffffffff
+
+/** Define this to 1 in arch/cc.h of your port if your compiler does not provide
+ * the ctype.h header. If ctype.h is available, a few character functions
+ * are mapped to the appropriate functions (lwip_islower, lwip_isdigit...), if
+ * not, a private implementation is provided.
+ */
+#ifndef LWIP_NO_CTYPE_H
+#define LWIP_NO_CTYPE_H 0
+#endif
+
+#if LWIP_NO_CTYPE_H
+#define lwip_in_range(c, lo, up)  ((u8_t)(c) >= (lo) && (u8_t)(c) <= (up))
+#define lwip_isdigit(c)           lwip_in_range((c), '0', '9')
+#define lwip_isxdigit(c)          (lwip_isdigit(c) || lwip_in_range((c), 'a', 'f') || lwip_in_range((c), 'A', 'F'))
+#define lwip_islower(c)           lwip_in_range((c), 'a', 'z')
+#define lwip_isspace(c)           ((c) == ' ' || (c) == '\f' || (c) == '\n' || (c) == '\r' || (c) == '\t' || (c) == '\v')
+#define lwip_isupper(c)           lwip_in_range((c), 'A', 'Z')
+#define lwip_tolower(c)           (lwip_isupper(c) ? (c) - 'A' + 'a' : c)
+#define lwip_toupper(c)           (lwip_islower(c) ? (c) - 'a' + 'A' : c)
+#else
+#include <ctype.h>
+#define lwip_isdigit(c)           isdigit((unsigned char)(c))
+#define lwip_isxdigit(c)          isxdigit((unsigned char)(c))
+#define lwip_islower(c)           islower((unsigned char)(c))
+#define lwip_isspace(c)           isspace((unsigned char)(c))
+#define lwip_isupper(c)           isupper((unsigned char)(c))
+#define lwip_tolower(c)           tolower((unsigned char)(c))
+#define lwip_toupper(c)           toupper((unsigned char)(c))
+#endif
+
+/** C++ const_cast<target_type>(val) equivalent to remove constness from a value (GCC -Wcast-qual) */
+#ifndef LWIP_CONST_CAST
+#define LWIP_CONST_CAST(target_type, val) ((target_type)((ptrdiff_t)val))
+#endif
+
+/** Get rid of alignment cast warnings (GCC -Wcast-align) */
+#ifndef LWIP_ALIGNMENT_CAST
+#define LWIP_ALIGNMENT_CAST(target_type, val) LWIP_CONST_CAST(target_type, val)
+#endif
+
+/** Get rid of warnings related to pointer-to-numeric and vice-versa casts,
+ * e.g. "conversion from 'u8_t' to 'void *' of greater size"
+ */
+#ifndef LWIP_PTR_NUMERIC_CAST
+#define LWIP_PTR_NUMERIC_CAST(target_type, val) LWIP_CONST_CAST(target_type, val)
+#endif
+
+/** Avoid warnings/errors related to implicitly casting away packed attributes by doing a explicit cast */
+#ifndef LWIP_PACKED_CAST
+#define LWIP_PACKED_CAST(target_type, val) LWIP_CONST_CAST(target_type, val)
+#endif
+
+/** Allocates a memory buffer of specified size that is of sufficient size to align
+ * its start address using LWIP_MEM_ALIGN.
+ * You can declare your own version here e.g. to enforce alignment without adding
+ * trailing padding bytes (see LWIP_MEM_ALIGN_BUFFER) or your own section placement
+ * requirements.\n
+ * e.g. if you use gcc and need 32 bit alignment:\n
+ * \#define LWIP_DECLARE_MEMORY_ALIGNED(variable_name, size) u8_t variable_name[size] \_\_attribute\_\_((aligned(4)))\n
+ * or more portable:\n
+ * \#define LWIP_DECLARE_MEMORY_ALIGNED(variable_name, size) u32_t variable_name[(size + sizeof(u32_t) - 1) / sizeof(u32_t)]
+ */
+#ifndef LWIP_DECLARE_MEMORY_ALIGNED
+#define LWIP_DECLARE_MEMORY_ALIGNED(variable_name, size) u8_t variable_name[LWIP_MEM_ALIGN_BUFFER(size)]
+#endif
+
+/** Calculate memory size for an aligned buffer - returns the next highest
+ * multiple of MEM_ALIGNMENT (e.g. LWIP_MEM_ALIGN_SIZE(3) and
+ * LWIP_MEM_ALIGN_SIZE(4) will both yield 4 for MEM_ALIGNMENT == 4).
+ */
+#ifndef LWIP_MEM_ALIGN_SIZE
+#define LWIP_MEM_ALIGN_SIZE(size) (((size) + MEM_ALIGNMENT - 1U) & ~(MEM_ALIGNMENT-1U))
+#endif
+
+/** Calculate safe memory size for an aligned buffer when using an unaligned
+ * type as storage. This includes a safety-margin on (MEM_ALIGNMENT - 1) at the
+ * start (e.g. if buffer is u8_t[] and actual data will be u32_t*)
+ */
+#ifndef LWIP_MEM_ALIGN_BUFFER
+#define LWIP_MEM_ALIGN_BUFFER(size) (((size) + MEM_ALIGNMENT - 1U))
+#endif
+
+/** Align a memory pointer to the alignment defined by MEM_ALIGNMENT
+ * so that ADDR % MEM_ALIGNMENT == 0
+ */
+#ifndef LWIP_MEM_ALIGN
+#define LWIP_MEM_ALIGN(addr) ((void *)(((mem_ptr_t)(addr) + MEM_ALIGNMENT - 1) & ~(mem_ptr_t)(MEM_ALIGNMENT-1)))
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Packed structs support.
+  * Placed BEFORE declaration of a packed struct.\n
+  * For examples of packed struct declarations, see include/lwip/prot/ subfolder.\n
+  * A port to GCC/clang is included in lwIP, if you use these compilers there is nothing to do here.
+  */
+#ifndef PACK_STRUCT_BEGIN
+#define PACK_STRUCT_BEGIN
+#endif /* PACK_STRUCT_BEGIN */
+
+/** Packed structs support.
+  * Placed AFTER declaration of a packed struct.\n
+  * For examples of packed struct declarations, see include/lwip/prot/ subfolder.\n
+  * A port to GCC/clang is included in lwIP, if you use these compilers there is nothing to do here.
+  */
+#ifndef PACK_STRUCT_END
+#define PACK_STRUCT_END
+#endif /* PACK_STRUCT_END */
+
+/** Packed structs support.
+  * Placed between end of declaration of a packed struct and trailing semicolon.\n
+  * For examples of packed struct declarations, see include/lwip/prot/ subfolder.\n
+  * A port to GCC/clang is included in lwIP, if you use these compilers there is nothing to do here.
+  */
+#ifndef PACK_STRUCT_STRUCT
+#if defined(__GNUC__) || defined(__clang__)
+#define PACK_STRUCT_STRUCT __attribute__((packed))
+#else
+#define PACK_STRUCT_STRUCT
+#endif
+#endif /* PACK_STRUCT_STRUCT */
+
+/** Packed structs support.
+  * Wraps u32_t and u16_t members.\n
+  * For examples of packed struct declarations, see include/lwip/prot/ subfolder.\n
+  * A port to GCC/clang is included in lwIP, if you use these compilers there is nothing to do here.
+  */
+#ifndef PACK_STRUCT_FIELD
+#define PACK_STRUCT_FIELD(x) x
+#endif /* PACK_STRUCT_FIELD */
+
+/** Packed structs support.
+  * Wraps u8_t members, where some compilers warn that packing is not necessary.\n
+  * For examples of packed struct declarations, see include/lwip/prot/ subfolder.\n
+  * A port to GCC/clang is included in lwIP, if you use these compilers there is nothing to do here.
+  */
+#ifndef PACK_STRUCT_FLD_8
+#define PACK_STRUCT_FLD_8(x) PACK_STRUCT_FIELD(x)
+#endif /* PACK_STRUCT_FLD_8 */
+
+/** Packed structs support.
+  * Wraps members that are packed structs themselves, where some compilers warn that packing is not necessary.\n
+  * For examples of packed struct declarations, see include/lwip/prot/ subfolder.\n
+  * A port to GCC/clang is included in lwIP, if you use these compilers there is nothing to do here.
+  */
+#ifndef PACK_STRUCT_FLD_S
+#define PACK_STRUCT_FLD_S(x) PACK_STRUCT_FIELD(x)
+#endif /* PACK_STRUCT_FLD_S */
+
+/** PACK_STRUCT_USE_INCLUDES==1: Packed structs support using \#include files before and after struct to be packed.\n
+ * The file included BEFORE the struct is "arch/bpstruct.h".\n
+ * The file included AFTER the struct is "arch/epstruct.h".\n
+ * This can be used to implement struct packing on MS Visual C compilers, see
+ * the Win32 port in the lwIP contrib repository for reference.
+ * For examples of packed struct declarations, see include/lwip/prot/ subfolder.\n
+ * A port to GCC/clang is included in lwIP, if you use these compilers there is nothing to do here.
+ */
+#ifdef __DOXYGEN__
+#define PACK_STRUCT_USE_INCLUDES
+#endif
+
+/** Eliminates compiler warning about unused arguments (GCC -Wextra -Wunused). */
+#ifndef LWIP_UNUSED_ARG
+#define LWIP_UNUSED_ARG(x) (void)x
+#endif /* LWIP_UNUSED_ARG */
+
+/** LWIP_PROVIDE_ERRNO==1: Let lwIP provide ERRNO values and the 'errno' variable.
+ * If this is disabled, cc.h must either define 'errno', include <errno.h>,
+ * define LWIP_ERRNO_STDINCLUDE to get <errno.h> included or
+ * define LWIP_ERRNO_INCLUDE to <errno.h> or equivalent.
+ */
+#if defined __DOXYGEN__
+#define LWIP_PROVIDE_ERRNO
+#endif
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_ARCH_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/autoip.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/autoip.h
new file mode 100644
index 00000000000..1d85bccff8b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/autoip.h
@@ -0,0 +1,99 @@
+/**
+ * @file
+ *
+ * AutoIP Automatic LinkLocal IP Configuration
+ */
+
+/*
+ *
+ * Copyright (c) 2007 Dominik Spies <kontakt@dspies.de>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * Author: Dominik Spies <kontakt@dspies.de>
+ *
+ * This is a AutoIP implementation for the lwIP TCP/IP stack. It aims to conform
+ * with RFC 3927.
+ *
+ */
+
+#ifndef LWIP_HDR_AUTOIP_H
+#define LWIP_HDR_AUTOIP_H
+
+#include "lwip/opt.h"
+
+#if LWIP_IPV4 && LWIP_AUTOIP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/netif.h"
+/* #include "lwip/udp.h" */
+#include "lwip/etharp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** AutoIP Timing */
+#define AUTOIP_TMR_INTERVAL      100
+#define AUTOIP_TICKS_PER_SECOND (1000 / AUTOIP_TMR_INTERVAL)
+
+/** AutoIP state information per netif */
+struct autoip
+{
+  /** the currently selected, probed, announced or used LL IP-Address */
+  ip4_addr_t llipaddr;
+  /** current AutoIP state machine state */
+  u8_t state;
+  /** sent number of probes or announces, dependent on state */
+  u8_t sent_num;
+  /** ticks to wait, tick is AUTOIP_TMR_INTERVAL long */
+  u16_t ttw;
+  /** ticks until a conflict can be solved by defending */
+  u8_t lastconflict;
+  /** total number of probed/used Link Local IP-Addresses */
+  u8_t tried_llipaddr;
+};
+
+
+void autoip_set_struct(struct netif *netif, struct autoip *autoip);
+/** Remove a struct autoip previously set to the netif using autoip_set_struct() */
+#define autoip_remove_struct(netif) do { (netif)->autoip = NULL; } while (0)
+err_t autoip_start(struct netif *netif);
+err_t autoip_stop(struct netif *netif);
+void autoip_arp_reply(struct netif *netif, struct etharp_hdr *hdr);
+void autoip_tmr(void);
+void autoip_network_changed(struct netif *netif);
+u8_t autoip_supplied_address(const struct netif *netif);
+
+/* for lwIP internal use by ip4.c */
+u8_t autoip_accept_packet(struct netif *netif, const ip4_addr_t *addr);
+
+#define netif_autoip_data(netif) ((struct autoip*)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_AUTOIP))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV4 && LWIP_AUTOIP */
+
+#endif /* LWIP_HDR_AUTOIP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/debug.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/debug.h
new file mode 100644
index 00000000000..579fd242b2c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/debug.h
@@ -0,0 +1,159 @@
+/**
+ * @file
+ * Debug messages infrastructure
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_DEBUG_H
+#define LWIP_HDR_DEBUG_H
+
+#include "lwip/arch.h"
+#include "lwip/opt.h"
+
+/**
+ * @defgroup debugging_levels LWIP_DBG_MIN_LEVEL and LWIP_DBG_TYPES_ON values
+ * @ingroup lwip_opts_debugmsg
+ * @{
+ */
+
+/** @name Debug level (LWIP_DBG_MIN_LEVEL)
+ * @{
+ */
+/** Debug level: ALL messages*/
+#define LWIP_DBG_LEVEL_ALL     0x00
+/** Debug level: Warnings. bad checksums, dropped packets, ... */
+#define LWIP_DBG_LEVEL_WARNING 0x01
+/** Debug level: Serious. memory allocation failures, ... */
+#define LWIP_DBG_LEVEL_SERIOUS 0x02
+/** Debug level: Severe */
+#define LWIP_DBG_LEVEL_SEVERE  0x03
+/**
+ * @}
+ */
+
+#define LWIP_DBG_MASK_LEVEL    0x03
+/* compatibility define only */
+#define LWIP_DBG_LEVEL_OFF     LWIP_DBG_LEVEL_ALL
+
+/** @name Enable/disable debug messages completely (LWIP_DBG_TYPES_ON)
+ * @{
+ */
+/** flag for LWIP_DEBUGF to enable that debug message */
+#define LWIP_DBG_ON            0x80U
+/** flag for LWIP_DEBUGF to disable that debug message */
+#define LWIP_DBG_OFF           0x00U
+/**
+ * @}
+ */
+
+/** @name Debug message types (LWIP_DBG_TYPES_ON)
+ * @{
+ */
+/** flag for LWIP_DEBUGF indicating a tracing message (to follow program flow) */
+#define LWIP_DBG_TRACE         0x40U
+/** flag for LWIP_DEBUGF indicating a state debug message (to follow module states) */
+#define LWIP_DBG_STATE         0x20U
+/** flag for LWIP_DEBUGF indicating newly added code, not thoroughly tested yet */
+#define LWIP_DBG_FRESH         0x10U
+/** flag for LWIP_DEBUGF to halt after printing this debug message */
+#define LWIP_DBG_HALT          0x08U
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup lwip_assertions Assertion handling
+ * @ingroup lwip_opts_debug
+ * @{
+ */
+/**
+ * LWIP_NOASSERT: Disable LWIP_ASSERT checks:
+ * To disable assertions define LWIP_NOASSERT in arch/cc.h.
+ */
+#ifdef __DOXYGEN__
+#define LWIP_NOASSERT
+#undef LWIP_NOASSERT
+#endif
+/**
+ * @}
+ */
+
+#ifndef LWIP_NOASSERT
+#define LWIP_ASSERT(message, assertion) do { if (!(assertion)) { \
+  LWIP_PLATFORM_ASSERT(message); }} while(0)
+#else  /* LWIP_NOASSERT */
+#define LWIP_ASSERT(message, assertion)
+#endif /* LWIP_NOASSERT */
+
+#ifndef LWIP_ERROR
+#ifdef LWIP_DEBUG
+#define LWIP_PLATFORM_ERROR(message) LWIP_PLATFORM_DIAG((message))
+#else
+#define LWIP_PLATFORM_ERROR(message)
+#endif
+
+/* if "expression" isn't true, then print "message" and execute "handler" expression */
+#define LWIP_ERROR(message, expression, handler) do { if (!(expression)) { \
+  LWIP_PLATFORM_ERROR(message); handler;}} while(0)
+#endif /* LWIP_ERROR */
+
+/** Enable debug message printing, but only if debug message type is enabled
+ *  AND is of correct type AND is at least LWIP_DBG_LEVEL.
+ */
+#ifdef __DOXYGEN__
+#define LWIP_DEBUG
+#undef LWIP_DEBUG
+#endif
+
+#ifdef LWIP_DEBUG
+#define LWIP_DEBUGF(debug, message) do { \
+                               if ( \
+                                   ((debug) & LWIP_DBG_ON) && \
+                                   ((debug) & LWIP_DBG_TYPES_ON) && \
+                                   ((s16_t)((debug) & LWIP_DBG_MASK_LEVEL) >= LWIP_DBG_MIN_LEVEL)) { \
+                                 LWIP_PLATFORM_DIAG(message); \
+                                 if ((debug) & LWIP_DBG_HALT) { \
+                                   while(1); \
+                                 } \
+                               } \
+                             } while(0)
+
+#else  /* LWIP_DEBUG */
+#define LWIP_DEBUGF(debug, message)
+#endif /* LWIP_DEBUG */
+
+#endif /* LWIP_HDR_DEBUG_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/def.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/def.h
new file mode 100644
index 00000000000..dfb266d181b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/def.h
@@ -0,0 +1,152 @@
+/**
+ * @file
+ * various utility macros
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+
+/**
+ * @defgroup perf Performance measurement
+ * @ingroup sys_layer
+ * All defines related to this section must not be placed in lwipopts.h,
+ * but in arch/perf.h!
+ * Measurement calls made throughout lwip, these can be defined to nothing.
+ * - PERF_START: start measuring something.
+ * - PERF_STOP(x): stop measuring something, and record the result.
+ */
+
+#ifndef LWIP_HDR_DEF_H
+#define LWIP_HDR_DEF_H
+
+/* arch.h might define NULL already */
+#include "lwip/arch.h"
+#include "lwip/opt.h"
+#if LWIP_PERF
+#include "arch/perf.h"
+#else /* LWIP_PERF */
+#define PERF_START    /* null definition */
+#define PERF_STOP(x)  /* null definition */
+#endif /* LWIP_PERF */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LWIP_MAX(x , y)  (((x) > (y)) ? (x) : (y))
+#define LWIP_MIN(x , y)  (((x) < (y)) ? (x) : (y))
+
+/* Get the number of entries in an array ('x' must NOT be a pointer!) */
+#define LWIP_ARRAYSIZE(x) (sizeof(x)/sizeof((x)[0]))
+
+/** Create u32_t value from bytes */
+#define LWIP_MAKEU32(a,b,c,d) (((u32_t)((a) & 0xff) << 24) | \
+                               ((u32_t)((b) & 0xff) << 16) | \
+                               ((u32_t)((c) & 0xff) << 8)  | \
+                                (u32_t)((d) & 0xff))
+
+#ifndef NULL
+#ifdef __cplusplus
+#define NULL 0
+#else
+#define NULL ((void *)0)
+#endif
+#endif
+
+#if BYTE_ORDER == BIG_ENDIAN
+#define lwip_htons(x) ((u16_t)(x))
+#define lwip_ntohs(x) ((u16_t)(x))
+#define lwip_htonl(x) ((u32_t)(x))
+#define lwip_ntohl(x) ((u32_t)(x))
+#define PP_HTONS(x)   ((u16_t)(x))
+#define PP_NTOHS(x)   ((u16_t)(x))
+#define PP_HTONL(x)   ((u32_t)(x))
+#define PP_NTOHL(x)   ((u32_t)(x))
+#else /* BYTE_ORDER != BIG_ENDIAN */
+#ifndef lwip_htons
+u16_t lwip_htons(u16_t x);
+#endif
+#define lwip_ntohs(x) lwip_htons(x)
+
+#ifndef lwip_htonl
+u32_t lwip_htonl(u32_t x);
+#endif
+#define lwip_ntohl(x) lwip_htonl(x)
+
+/* These macros should be calculated by the preprocessor and are used
+   with compile-time constants only (so that there is no little-endian
+   overhead at runtime). */
+#define PP_HTONS(x) ((u16_t)((((x) & (u16_t)0x00ffU) << 8) | (((x) & (u16_t)0xff00U) >> 8)))
+#define PP_NTOHS(x) PP_HTONS(x)
+#define PP_HTONL(x) ((((x) & (u32_t)0x000000ffUL) << 24) | \
+                     (((x) & (u32_t)0x0000ff00UL) <<  8) | \
+                     (((x) & (u32_t)0x00ff0000UL) >>  8) | \
+                     (((x) & (u32_t)0xff000000UL) >> 24))
+#define PP_NTOHL(x) PP_HTONL(x)
+#endif /* BYTE_ORDER == BIG_ENDIAN */
+
+/* Provide usual function names as macros for users, but this can be turned off */
+#ifndef LWIP_DONT_PROVIDE_BYTEORDER_FUNCTIONS
+#define htons(x) lwip_htons(x)
+#define ntohs(x) lwip_ntohs(x)
+#define htonl(x) lwip_htonl(x)
+#define ntohl(x) lwip_ntohl(x)
+#endif
+
+/* Functions that are not available as standard implementations.
+ * In cc.h, you can #define these to implementations available on
+ * your platform to save some code bytes if you use these functions
+ * in your application, too.
+ */
+
+#ifndef lwip_itoa
+/* This can be #defined to itoa() or snprintf(result, bufsize, "%d", number) depending on your platform */
+void  lwip_itoa(char* result, size_t bufsize, int number);
+#endif
+#ifndef lwip_strnicmp
+/* This can be #defined to strnicmp() or strncasecmp() depending on your platform */
+int   lwip_strnicmp(const char* str1, const char* str2, size_t len);
+#endif
+#ifndef lwip_stricmp
+/* This can be #defined to stricmp() or strcasecmp() depending on your platform */
+int   lwip_stricmp(const char* str1, const char* str2);
+#endif
+#ifndef lwip_strnstr
+/* This can be #defined to strnstr() depending on your platform */
+char* lwip_strnstr(const char* buffer, const char* token, size_t n);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_DEF_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/dhcp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/dhcp.h
new file mode 100644
index 00000000000..8a528219da6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/dhcp.h
@@ -0,0 +1,175 @@
+/**
+ * @file
+ * DHCP client API
+ */
+
+/*
+ * Copyright (c) 2001-2004 Leon Woestenberg <leon.woestenberg@gmx.net>
+ * Copyright (c) 2001-2004 Axon Digital Design B.V., The Netherlands.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Leon Woestenberg <leon.woestenberg@gmx.net>
+ *
+ */
+#ifndef LWIP_HDR_DHCP_H
+#define LWIP_HDR_DHCP_H
+
+#include "lwip/opt.h"
+
+#if LWIP_DHCP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/netif.h"
+#include "lwip/udp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** period (in seconds) of the application calling dhcp_coarse_tmr() */
+#if ESP_DHCP
+#define DHCP_COARSE_TIMER_SECS 1
+#else
+#define DHCP_COARSE_TIMER_SECS 60
+#endif
+/** period (in milliseconds) of the application calling dhcp_coarse_tmr() */
+#define DHCP_COARSE_TIMER_MSECS (DHCP_COARSE_TIMER_SECS * 1000UL)
+/** period (in milliseconds) of the application calling dhcp_fine_tmr() */
+#define DHCP_FINE_TIMER_MSECS   500
+
+#define DHCP_BOOT_FILE_LEN      128U
+
+/* AutoIP cooperation flags (struct dhcp.autoip_coop_state) */
+typedef enum {
+  DHCP_AUTOIP_COOP_STATE_OFF  = 0,
+  DHCP_AUTOIP_COOP_STATE_ON   = 1
+} dhcp_autoip_coop_state_enum_t;
+
+struct dhcp
+{
+  /** transaction identifier of last sent request */
+  u32_t xid;
+  /** track PCB allocation state */
+  u8_t pcb_allocated;
+  /** current DHCP state machine state */
+  u8_t state;
+  /** retries of current request */
+  u8_t tries;
+#if LWIP_DHCP_AUTOIP_COOP
+  u8_t autoip_coop_state;
+#endif
+  u8_t subnet_mask_given;
+
+  u16_t request_timeout; /* #ticks with period DHCP_FINE_TIMER_SECS for request timeout */
+#if ESP_DHCP
+  u32_t t1_timeout;  /* #ticks with period DHCP_COARSE_TIMER_SECS for renewal time */
+  u32_t t2_timeout;  /* #ticks with period DHCP_COARSE_TIMER_SECS for rebind time */
+  u32_t t1_renew_time;  /* #ticks with period DHCP_COARSE_TIMER_SECS until next renew try */
+  u32_t t2_rebind_time; /* #ticks with period DHCP_COARSE_TIMER_SECS until next rebind try */
+  u32_t lease_used; /* #ticks with period DHCP_COARSE_TIMER_SECS since last received DHCP ack */
+  u32_t t0_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for lease time */
+#else
+  u16_t t1_timeout;  /* #ticks with period DHCP_COARSE_TIMER_SECS for renewal time */
+  u16_t t2_timeout;  /* #ticks with period DHCP_COARSE_TIMER_SECS for rebind time */
+  u16_t t1_renew_time;  /* #ticks with period DHCP_COARSE_TIMER_SECS until next renew try */
+  u16_t t2_rebind_time; /* #ticks with period DHCP_COARSE_TIMER_SECS until next rebind try */
+  u16_t lease_used; /* #ticks with period DHCP_COARSE_TIMER_SECS since last received DHCP ack */
+  u16_t t0_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for lease time */
+#endif
+  ip_addr_t server_ip_addr; /* dhcp server address that offered this lease (ip_addr_t because passed to UDP) */
+  ip4_addr_t offered_ip_addr;
+  ip4_addr_t offered_sn_mask;
+  ip4_addr_t offered_gw_addr;
+
+  u32_t offered_t0_lease; /* lease period (in seconds) */
+  u32_t offered_t1_renew; /* recommended renew time (usually 50% of lease period) */
+  u32_t offered_t2_rebind; /* recommended rebind time (usually 87.5 of lease period)  */
+#if LWIP_DHCP_BOOTP_FILE
+  ip4_addr_t offered_si_addr;
+  char boot_file_name[DHCP_BOOT_FILE_LEN];
+#endif /* LWIP_DHCP_BOOTPFILE */
+
+  /* Espressif add start. */
+#ifdef ESP_DHCP
+  void (*cb)(struct netif*); /* callback for dhcp, add a parameter to show dhcp status if needed */
+#else
+  void (*cb)(void); /* callback for dhcp, add a parameter to show dhcp status if needed */
+#endif
+  /* Espressif add end. */
+};
+
+
+void dhcp_set_struct(struct netif *netif, struct dhcp *dhcp);
+/** Remove a struct dhcp previously set to the netif using dhcp_set_struct() */
+#define dhcp_remove_struct(netif) netif_set_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP, NULL)
+void dhcp_cleanup(struct netif *netif);
+err_t dhcp_start(struct netif *netif);
+err_t dhcp_renew(struct netif *netif);
+err_t dhcp_release(struct netif *netif);
+void dhcp_stop(struct netif *netif);
+void dhcp_release_and_stop(struct netif *netif);
+void dhcp_inform(struct netif *netif);
+void dhcp_network_changed(struct netif *netif);
+
+/* Espressif add start. */
+/** set callback for DHCP */
+#ifdef ESP_DHCP
+void dhcp_set_cb(struct netif *netif, void (*cb)(struct netif*));
+#else
+void dhcp_set_cb(struct netif *netif, void (*cb)(void));
+#endif
+/* Espressif add end. */
+
+#if DHCP_DOES_ARP_CHECK
+void dhcp_arp_reply(struct netif *netif, const ip4_addr_t *addr);
+#endif
+u8_t dhcp_supplied_address(const struct netif *netif);
+/* to be called every minute */
+void dhcp_coarse_tmr(void);
+/* to be called every half second */
+void dhcp_fine_tmr(void);
+
+#if LWIP_DHCP_GET_NTP_SRV
+/** This function must exist, in other to add offered NTP servers to
+ * the NTP (or SNTP) engine.
+ * See LWIP_DHCP_MAX_NTP_SERVERS */
+extern void dhcp_set_ntp_servers(u8_t num_ntp_servers, const ip4_addr_t* ntp_server_addrs);
+#endif /* LWIP_DHCP_GET_NTP_SRV */
+
+#if ESP_DHCP && !ESP_DHCP_DISABLE_VENDOR_CLASS_IDENTIFIER
+err_t dhcp_set_vendor_class_identifier(u8_t len, char *str);
+err_t dhcp_get_vendor_specific_information(u8_t len, char *str);
+#endif /* ESP_DHCP && !ESP_DHCP_DISABLE_VENDOR_CLASS_IDENTIFIER */
+
+#define netif_dhcp_data(netif) ((struct dhcp*)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_DHCP */
+
+#endif /*LWIP_HDR_DHCP_H*/
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/dhcp6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/dhcp6.h
new file mode 100644
index 00000000000..5cc4a015918
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/dhcp6.h
@@ -0,0 +1,104 @@
+/**
+ * @file
+ *
+ * DHCPv6 client: IPv6 address autoconfiguration as per
+ * RFC 3315 (stateful DHCPv6) and
+ * RFC 3736 (stateless DHCPv6).
+ */
+
+/*
+ * Copyright (c) 2018 Simon Goldschmidt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ */
+
+#ifndef LWIP_HDR_IP6_DHCP6_H
+#define LWIP_HDR_IP6_DHCP6_H
+
+#include "lwip/opt.h"
+
+#if LWIP_IPV6_DHCP6  /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/err.h"
+#include "lwip/netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** period (in milliseconds) of the application calling dhcp6_tmr() */
+#define DHCP6_TIMER_MSECS   500
+
+struct dhcp6
+{
+  /** transaction identifier of last sent request */
+  u32_t xid;
+  /** track PCB allocation state */
+  u8_t pcb_allocated;
+  /** current DHCPv6 state machine state */
+  u8_t state;
+  /** retries of current request */
+  u8_t tries;
+  /** if request config is triggered while another action is active, this keeps track of it */
+  u8_t request_config_pending;
+  /** #ticks with period DHCP6_TIMER_MSECS for request timeout */
+  u16_t request_timeout;
+#if LWIP_IPV6_DHCP6_STATEFUL
+  /* @todo: add more members here to keep track of stateful DHCPv6 data, like lease times */
+#endif /* LWIP_IPV6_DHCP6_STATEFUL */
+};
+
+void dhcp6_set_struct(struct netif *netif, struct dhcp6 *dhcp6);
+/** Remove a struct dhcp6 previously set to the netif using dhcp6_set_struct() */
+#define dhcp6_remove_struct(netif) netif_set_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP6, NULL)
+void dhcp6_cleanup(struct netif *netif);
+
+err_t dhcp6_enable_stateful(struct netif *netif);
+err_t dhcp6_enable_stateless(struct netif *netif);
+void dhcp6_disable(struct netif *netif);
+
+void dhcp6_tmr(void);
+
+void dhcp6_nd6_ra_trigger(struct netif *netif, u8_t managed_addr_config, u8_t other_config);
+
+#if LWIP_DHCP6_GET_NTP_SRV
+/** This function must exist, in other to add offered NTP servers to
+ * the NTP (or SNTP) engine.
+ * See LWIP_DHCP6_MAX_NTP_SERVERS */
+extern void dhcp6_set_ntp_servers(u8_t num_ntp_servers, const ip_addr_t* ntp_server_addrs);
+#endif /* LWIP_DHCP6_GET_NTP_SRV */
+
+#define netif_dhcp6_data(netif) ((struct dhcp6*)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP6))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV6_DHCP6 */
+
+#endif /* LWIP_HDR_IP6_DHCP6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/dns.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/dns.h
new file mode 100644
index 00000000000..db52fedd1da
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/dns.h
@@ -0,0 +1,133 @@
+/**
+ * @file
+ * DNS API
+ */
+
+/**
+ * lwip DNS resolver header file.
+
+ * Author: Jim Pettinato
+ *   April 2007
+
+ * ported from uIP resolv.c Copyright (c) 2002-2003, Adam Dunkels.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote
+ *    products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LWIP_HDR_DNS_H
+#define LWIP_HDR_DNS_H
+
+#include "lwip/opt.h"
+
+#if LWIP_DNS
+
+#include "lwip/ip_addr.h"
+#include "lwip/err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** DNS timer period */
+#define DNS_TMR_INTERVAL          1000
+
+/* DNS resolve types: */
+#define LWIP_DNS_ADDRTYPE_IPV4      0
+#define LWIP_DNS_ADDRTYPE_IPV6      1
+#define LWIP_DNS_ADDRTYPE_IPV4_IPV6 2 /* try to resolve IPv4 first, try IPv6 if IPv4 fails only */
+#define LWIP_DNS_ADDRTYPE_IPV6_IPV4 3 /* try to resolve IPv6 first, try IPv4 if IPv6 fails only */
+#if LWIP_IPV4 && LWIP_IPV6
+#ifndef LWIP_DNS_ADDRTYPE_DEFAULT
+#define LWIP_DNS_ADDRTYPE_DEFAULT   LWIP_DNS_ADDRTYPE_IPV4_IPV6
+#endif
+#elif LWIP_IPV4
+#define LWIP_DNS_ADDRTYPE_DEFAULT   LWIP_DNS_ADDRTYPE_IPV4
+#else
+#define LWIP_DNS_ADDRTYPE_DEFAULT   LWIP_DNS_ADDRTYPE_IPV6
+#endif
+
+#if DNS_LOCAL_HOSTLIST
+/** struct used for local host-list */
+struct local_hostlist_entry {
+  /** static hostname */
+  const char *name;
+  /** static host address in network byteorder */
+  ip_addr_t addr;
+  struct local_hostlist_entry *next;
+};
+#define DNS_LOCAL_HOSTLIST_ELEM(name, addr_init) {name, addr_init, NULL}
+#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC
+#ifndef DNS_LOCAL_HOSTLIST_MAX_NAMELEN
+#define DNS_LOCAL_HOSTLIST_MAX_NAMELEN  DNS_MAX_NAME_LENGTH
+#endif
+#define LOCALHOSTLIST_ELEM_SIZE ((sizeof(struct local_hostlist_entry) + DNS_LOCAL_HOSTLIST_MAX_NAMELEN + 1))
+#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */
+#endif /* DNS_LOCAL_HOSTLIST */
+
+#if LWIP_IPV4
+extern const ip_addr_t dns_mquery_v4group;
+#endif /* LWIP_IPV4 */
+#if LWIP_IPV6
+extern const ip_addr_t dns_mquery_v6group;
+#endif /* LWIP_IPV6 */
+
+/** Callback which is invoked when a hostname is found.
+ * A function of this type must be implemented by the application using the DNS resolver.
+ * @param name pointer to the name that was looked up.
+ * @param ipaddr pointer to an ip_addr_t containing the IP address of the hostname,
+ *        or NULL if the name could not be found (or on any other error).
+ * @param callback_arg a user-specified callback argument passed to dns_gethostbyname
+*/
+typedef void (*dns_found_callback)(const char *name, const ip_addr_t *ipaddr, void *callback_arg);
+
+void             dns_init(void);
+void             dns_tmr(void);
+void             dns_setserver(u8_t numdns, const ip_addr_t *dnsserver);
+const ip_addr_t* dns_getserver(u8_t numdns);
+err_t            dns_gethostbyname(const char *hostname, ip_addr_t *addr,
+                                   dns_found_callback found, void *callback_arg);
+err_t            dns_gethostbyname_addrtype(const char *hostname, ip_addr_t *addr,
+                                   dns_found_callback found, void *callback_arg,
+                                   u8_t dns_addrtype);
+#if ESP_DNS
+void             dns_clear_servers(bool keep_fallback);
+#endif
+
+#if DNS_LOCAL_HOSTLIST
+size_t         dns_local_iterate(dns_found_callback iterator_fn, void *iterator_arg);
+err_t          dns_local_lookup(const char *hostname, ip_addr_t *addr, u8_t dns_addrtype);
+#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC
+int            dns_local_removehost(const char *hostname, const ip_addr_t *addr);
+err_t          dns_local_addhost(const char *hostname, const ip_addr_t *addr);
+#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */
+#endif /* DNS_LOCAL_HOSTLIST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_DNS */
+
+#endif /* LWIP_HDR_DNS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/err.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/err.h
new file mode 100644
index 00000000000..887d9b3fd81
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/err.h
@@ -0,0 +1,117 @@
+/**
+ * @file
+ * lwIP Error codes
+ */
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_ERR_H
+#define LWIP_HDR_ERR_H
+
+#include "lwip/opt.h"
+#include "lwip/arch.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup infrastructure_errors Error codes
+ * @ingroup infrastructure
+ * @{
+ */
+
+/** Definitions for error constants. */
+typedef enum {
+/** No error, everything OK. */
+  ERR_OK         = 0,
+/** Out of memory error.     */
+  ERR_MEM        = -1,
+/** Buffer error.            */
+  ERR_BUF        = -2,
+/** Timeout.                 */
+  ERR_TIMEOUT    = -3,
+/** Routing problem.         */
+  ERR_RTE        = -4,
+/** Operation in progress    */
+  ERR_INPROGRESS = -5,
+/** Illegal value.           */
+  ERR_VAL        = -6,
+/** Operation would block.   */
+  ERR_WOULDBLOCK = -7,
+/** Address in use.          */
+  ERR_USE        = -8,
+/** Already connecting.      */
+  ERR_ALREADY    = -9,
+/** Conn already established.*/
+  ERR_ISCONN     = -10,
+/** Not connected.           */
+  ERR_CONN       = -11,
+/** Low-level netif error    */
+  ERR_IF         = -12,
+
+/** Connection aborted.      */
+  ERR_ABRT       = -13,
+/** Connection reset.        */
+  ERR_RST        = -14,
+/** Connection closed.       */
+  ERR_CLSD       = -15,
+/** Illegal argument.        */
+  ERR_ARG        = -16
+} err_enum_t;
+
+/** Define LWIP_ERR_T in cc.h if you want to use
+ *  a different type for your platform (must be signed). */
+#ifdef LWIP_ERR_T
+typedef LWIP_ERR_T err_t;
+#else /* LWIP_ERR_T */
+typedef s8_t err_t;
+#endif /* LWIP_ERR_T*/
+
+/**
+ * @}
+ */
+
+#ifdef LWIP_DEBUG
+extern const char *lwip_strerr(err_t err);
+#else
+#define lwip_strerr(x) ""
+#endif /* LWIP_DEBUG */
+
+#if !NO_SYS
+int err_to_errno(err_t err);
+#endif /* !NO_SYS */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_ERR_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/errno.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/errno.h
new file mode 100644
index 00000000000..48d6b539d82
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/errno.h
@@ -0,0 +1,198 @@
+/**
+ * @file
+ * Posix Errno defines
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_ERRNO_H
+#define LWIP_HDR_ERRNO_H
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef LWIP_PROVIDE_ERRNO
+
+#define  EPERM            1  /* Operation not permitted */
+#define  ENOENT           2  /* No such file or directory */
+#define  ESRCH            3  /* No such process */
+#define  EINTR            4  /* Interrupted system call */
+#define  EIO              5  /* I/O error */
+#define  ENXIO            6  /* No such device or address */
+#define  E2BIG            7  /* Arg list too long */
+#define  ENOEXEC          8  /* Exec format error */
+#define  EBADF            9  /* Bad file number */
+#define  ECHILD          10  /* No child processes */
+#define  EAGAIN          11  /* Try again */
+#define  ENOMEM          12  /* Out of memory */
+#define  EACCES          13  /* Permission denied */
+#define  EFAULT          14  /* Bad address */
+#define  ENOTBLK         15  /* Block device required */
+#define  EBUSY           16  /* Device or resource busy */
+#define  EEXIST          17  /* File exists */
+#define  EXDEV           18  /* Cross-device link */
+#define  ENODEV          19  /* No such device */
+#define  ENOTDIR         20  /* Not a directory */
+#define  EISDIR          21  /* Is a directory */
+#define  EINVAL          22  /* Invalid argument */
+#define  ENFILE          23  /* File table overflow */
+#define  EMFILE          24  /* Too many open files */
+#define  ENOTTY          25  /* Not a typewriter */
+#define  ETXTBSY         26  /* Text file busy */
+#define  EFBIG           27  /* File too large */
+#define  ENOSPC          28  /* No space left on device */
+#define  ESPIPE          29  /* Illegal seek */
+#define  EROFS           30  /* Read-only file system */
+#define  EMLINK          31  /* Too many links */
+#define  EPIPE           32  /* Broken pipe */
+#define  EDOM            33  /* Math argument out of domain of func */
+#define  ERANGE          34  /* Math result not representable */
+#define  EDEADLK         35  /* Resource deadlock would occur */
+#define  ENAMETOOLONG    36  /* File name too long */
+#define  ENOLCK          37  /* No record locks available */
+#define  ENOSYS          38  /* Function not implemented */
+#define  ENOTEMPTY       39  /* Directory not empty */
+#define  ELOOP           40  /* Too many symbolic links encountered */
+#define  EWOULDBLOCK     EAGAIN  /* Operation would block */
+#define  ENOMSG          42  /* No message of desired type */
+#define  EIDRM           43  /* Identifier removed */
+#define  ECHRNG          44  /* Channel number out of range */
+#define  EL2NSYNC        45  /* Level 2 not synchronized */
+#define  EL3HLT          46  /* Level 3 halted */
+#define  EL3RST          47  /* Level 3 reset */
+#define  ELNRNG          48  /* Link number out of range */
+#define  EUNATCH         49  /* Protocol driver not attached */
+#define  ENOCSI          50  /* No CSI structure available */
+#define  EL2HLT          51  /* Level 2 halted */
+#define  EBADE           52  /* Invalid exchange */
+#define  EBADR           53  /* Invalid request descriptor */
+#define  EXFULL          54  /* Exchange full */
+#define  ENOANO          55  /* No anode */
+#define  EBADRQC         56  /* Invalid request code */
+#define  EBADSLT         57  /* Invalid slot */
+
+#define  EDEADLOCK       EDEADLK
+
+#define  EBFONT          59  /* Bad font file format */
+#define  ENOSTR          60  /* Device not a stream */
+#define  ENODATA         61  /* No data available */
+#define  ETIME           62  /* Timer expired */
+#define  ENOSR           63  /* Out of streams resources */
+#define  ENONET          64  /* Machine is not on the network */
+#define  ENOPKG          65  /* Package not installed */
+#define  EREMOTE         66  /* Object is remote */
+#define  ENOLINK         67  /* Link has been severed */
+#define  EADV            68  /* Advertise error */
+#define  ESRMNT          69  /* Srmount error */
+#define  ECOMM           70  /* Communication error on send */
+#define  EPROTO          71  /* Protocol error */
+#define  EMULTIHOP       72  /* Multihop attempted */
+#define  EDOTDOT         73  /* RFS specific error */
+#define  EBADMSG         74  /* Not a data message */
+#define  EOVERFLOW       75  /* Value too large for defined data type */
+#define  ENOTUNIQ        76  /* Name not unique on network */
+#define  EBADFD          77  /* File descriptor in bad state */
+#define  EREMCHG         78  /* Remote address changed */
+#define  ELIBACC         79  /* Can not access a needed shared library */
+#define  ELIBBAD         80  /* Accessing a corrupted shared library */
+#define  ELIBSCN         81  /* .lib section in a.out corrupted */
+#define  ELIBMAX         82  /* Attempting to link in too many shared libraries */
+#define  ELIBEXEC        83  /* Cannot exec a shared library directly */
+#define  EILSEQ          84  /* Illegal byte sequence */
+#define  ERESTART        85  /* Interrupted system call should be restarted */
+#define  ESTRPIPE        86  /* Streams pipe error */
+#define  EUSERS          87  /* Too many users */
+#define  ENOTSOCK        88  /* Socket operation on non-socket */
+#define  EDESTADDRREQ    89  /* Destination address required */
+#define  EMSGSIZE        90  /* Message too long */
+#define  EPROTOTYPE      91  /* Protocol wrong type for socket */
+#define  ENOPROTOOPT     92  /* Protocol not available */
+#define  EPROTONOSUPPORT 93  /* Protocol not supported */
+#define  ESOCKTNOSUPPORT 94  /* Socket type not supported */
+#define  EOPNOTSUPP      95  /* Operation not supported on transport endpoint */
+#define  EPFNOSUPPORT    96  /* Protocol family not supported */
+#define  EAFNOSUPPORT    97  /* Address family not supported by protocol */
+#define  EADDRINUSE      98  /* Address already in use */
+#define  EADDRNOTAVAIL   99  /* Cannot assign requested address */
+#define  ENETDOWN       100  /* Network is down */
+#define  ENETUNREACH    101  /* Network is unreachable */
+#define  ENETRESET      102  /* Network dropped connection because of reset */
+#define  ECONNABORTED   103  /* Software caused connection abort */
+#define  ECONNRESET     104  /* Connection reset by peer */
+#define  ENOBUFS        105  /* No buffer space available */
+#define  EISCONN        106  /* Transport endpoint is already connected */
+#define  ENOTCONN       107  /* Transport endpoint is not connected */
+#define  ESHUTDOWN      108  /* Cannot send after transport endpoint shutdown */
+#define  ETOOMANYREFS   109  /* Too many references: cannot splice */
+#define  ETIMEDOUT      110  /* Connection timed out */
+#define  ECONNREFUSED   111  /* Connection refused */
+#define  EHOSTDOWN      112  /* Host is down */
+#define  EHOSTUNREACH   113  /* No route to host */
+#define  EALREADY       114  /* Operation already in progress */
+#define  EINPROGRESS    115  /* Operation now in progress */
+#define  ESTALE         116  /* Stale NFS file handle */
+#define  EUCLEAN        117  /* Structure needs cleaning */
+#define  ENOTNAM        118  /* Not a XENIX named type file */
+#define  ENAVAIL        119  /* No XENIX semaphores available */
+#define  EISNAM         120  /* Is a named type file */
+#define  EREMOTEIO      121  /* Remote I/O error */
+#define  EDQUOT         122  /* Quota exceeded */
+
+#define  ENOMEDIUM      123  /* No medium found */
+#define  EMEDIUMTYPE    124  /* Wrong medium type */
+
+#ifndef errno
+extern int errno;
+#endif
+
+#else /* LWIP_PROVIDE_ERRNO */
+
+/* Define LWIP_ERRNO_STDINCLUDE if you want to include <errno.h> here */
+#ifdef LWIP_ERRNO_STDINCLUDE
+#include <errno.h>
+#else /* LWIP_ERRNO_STDINCLUDE */
+/* Define LWIP_ERRNO_INCLUDE to an equivalent of <errno.h> to include the error defines here */
+#ifdef LWIP_ERRNO_INCLUDE
+#include LWIP_ERRNO_INCLUDE
+#endif /* LWIP_ERRNO_INCLUDE */
+#endif /* LWIP_ERRNO_STDINCLUDE */
+
+#endif /* LWIP_PROVIDE_ERRNO */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_ERRNO_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/etharp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/etharp.h
new file mode 100644
index 00000000000..43043d205c7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/etharp.h
@@ -0,0 +1,115 @@
+/**
+ * @file
+ * Ethernet output function - handles OUTGOING ethernet level traffic, implements
+ * ARP resolving.
+ * To be used in most low-level netif implementations
+ */
+
+/*
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
+ * Copyright (c) 2003-2004 Leon Woestenberg <leon.woestenberg@axon.tv>
+ * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+
+#ifndef LWIP_HDR_NETIF_ETHARP_H
+#define LWIP_HDR_NETIF_ETHARP_H
+
+#include "lwip/opt.h"
+
+#if LWIP_ARP || LWIP_ETHERNET /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/pbuf.h"
+#include "lwip/ip4_addr.h"
+#include "lwip/netif.h"
+#include "lwip/ip4.h"
+#include "lwip/prot/ethernet.h"
+
+#if LWIP_IPV4 && LWIP_ARP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/prot/etharp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** 1 seconds period */
+#define ARP_TMR_INTERVAL 1000
+
+#if ARP_QUEUEING
+/** struct for queueing outgoing packets for unknown address
+  * defined here to be accessed by memp.h
+  */
+struct etharp_q_entry {
+  struct etharp_q_entry *next;
+  struct pbuf *p;
+};
+#endif /* ARP_QUEUEING */
+
+#if ESP_GRATUITOUS_ARP
+#ifdef CONFIG_GARP_TMR_INTERVAL
+#define GARP_TMR_INTERVAL (CONFIG_GARP_TMR_INTERVAL*1000UL)
+#else
+#define GARP_TMR_INTERVAL 60000 
+#endif
+
+void garp_tmr(void);
+#endif
+
+#define etharp_init() /* Compatibility define, no init needed. */
+void etharp_tmr(void);
+ssize_t etharp_find_addr(struct netif *netif, const ip4_addr_t *ipaddr,
+         struct eth_addr **eth_ret, const ip4_addr_t **ip_ret);
+int etharp_get_entry(size_t i, ip4_addr_t **ipaddr, struct netif **netif, struct eth_addr **eth_ret);
+err_t etharp_output(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr);
+err_t etharp_query(struct netif *netif, const ip4_addr_t *ipaddr, struct pbuf *q);
+err_t etharp_request(struct netif *netif, const ip4_addr_t *ipaddr);
+/** For Ethernet network interfaces, we might want to send "gratuitous ARP";
+ *  this is an ARP packet sent by a node in order to spontaneously cause other
+ *  nodes to update an entry in their ARP cache.
+ *  From RFC 3220 "IP Mobility Support for IPv4" section 4.6. */
+#define etharp_gratuitous(netif) etharp_request((netif), netif_ip4_addr(netif))
+void etharp_cleanup_netif(struct netif *netif);
+
+#if ETHARP_SUPPORT_STATIC_ENTRIES
+err_t etharp_add_static_entry(const ip4_addr_t *ipaddr, struct eth_addr *ethaddr);
+err_t etharp_remove_static_entry(const ip4_addr_t *ipaddr);
+#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
+
+void etharp_input(struct pbuf *p, struct netif *netif);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV4 && LWIP_ARP */
+#endif /* LWIP_ARP || LWIP_ETHERNET */
+
+#endif /* LWIP_HDR_NETIF_ETHARP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ethip6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ethip6.h
new file mode 100644
index 00000000000..5e88dffd05f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ethip6.h
@@ -0,0 +1,68 @@
+/**
+ * @file
+ *
+ * Ethernet output for IPv6. Uses ND tables for link-layer addressing.
+ */
+
+/*
+ * Copyright (c) 2010 Inico Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Ivan Delamer <delamer@inicotech.com>
+ *
+ *
+ * Please coordinate changes and requests with Ivan Delamer
+ * <delamer@inicotech.com>
+ */
+
+#ifndef LWIP_HDR_ETHIP6_H
+#define LWIP_HDR_ETHIP6_H
+
+#include "lwip/opt.h"
+
+#if LWIP_IPV6 && LWIP_ETHERNET /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/pbuf.h"
+#include "lwip/ip6.h"
+#include "lwip/ip6_addr.h"
+#include "lwip/netif.h"
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+err_t ethip6_output(struct netif *netif, struct pbuf *q, const ip6_addr_t *ip6addr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV6 && LWIP_ETHERNET */
+
+#endif /* LWIP_HDR_ETHIP6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/icmp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/icmp.h
new file mode 100644
index 00000000000..f5a31fd4c07
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/icmp.h
@@ -0,0 +1,110 @@
+/**
+ * @file
+ * ICMP API
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_ICMP_H
+#define LWIP_HDR_ICMP_H
+
+#include "lwip/opt.h"
+#include "lwip/pbuf.h"
+#include "lwip/ip_addr.h"
+#include "lwip/netif.h"
+#include "lwip/prot/icmp.h"
+
+#if LWIP_IPV6 && LWIP_ICMP6
+#include "lwip/icmp6.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** ICMP destination unreachable codes */
+enum icmp_dur_type {
+  /** net unreachable */
+  ICMP_DUR_NET   = 0,
+  /** host unreachable */
+  ICMP_DUR_HOST  = 1,
+  /** protocol unreachable */
+  ICMP_DUR_PROTO = 2,
+  /** port unreachable */
+  ICMP_DUR_PORT  = 3,
+  /** fragmentation needed and DF set */
+  ICMP_DUR_FRAG  = 4,
+  /** source route failed */
+  ICMP_DUR_SR    = 5
+};
+
+/** ICMP time exceeded codes */
+enum icmp_te_type {
+  /** time to live exceeded in transit */
+  ICMP_TE_TTL  = 0,
+  /** fragment reassembly time exceeded */
+  ICMP_TE_FRAG = 1
+};
+
+#if LWIP_IPV4 && LWIP_ICMP /* don't build if not configured for use in lwipopts.h */
+
+void icmp_input(struct pbuf *p, struct netif *inp);
+void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t);
+void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t);
+
+#endif /* LWIP_IPV4 && LWIP_ICMP */
+
+#if LWIP_IPV4 && LWIP_IPV6
+#if LWIP_ICMP && LWIP_ICMP6
+#define icmp_port_unreach(isipv6, pbuf) ((isipv6) ? \
+                                         icmp6_dest_unreach(pbuf, ICMP6_DUR_PORT) : \
+                                         icmp_dest_unreach(pbuf, ICMP_DUR_PORT))
+#elif LWIP_ICMP
+#define icmp_port_unreach(isipv6, pbuf) do{ if(!(isipv6)) { icmp_dest_unreach(pbuf, ICMP_DUR_PORT);}}while(0)
+#elif LWIP_ICMP6
+#define icmp_port_unreach(isipv6, pbuf) do{ if(isipv6) { icmp6_dest_unreach(pbuf, ICMP6_DUR_PORT);}}while(0)
+#else
+#define icmp_port_unreach(isipv6, pbuf)
+#endif
+#elif LWIP_IPV6 && LWIP_ICMP6
+#define icmp_port_unreach(isipv6, pbuf) icmp6_dest_unreach(pbuf, ICMP6_DUR_PORT)
+#elif LWIP_IPV4 && LWIP_ICMP
+#define icmp_port_unreach(isipv6, pbuf) icmp_dest_unreach(pbuf, ICMP_DUR_PORT)
+#else /* (LWIP_IPV6 && LWIP_ICMP6) || (LWIP_IPV4 && LWIP_ICMP) */
+#define icmp_port_unreach(isipv6, pbuf)
+#endif /* (LWIP_IPV6 && LWIP_ICMP6) || (LWIP_IPV4 && LWIP_ICMP) LWIP_IPV4*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_ICMP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/icmp6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/icmp6.h
new file mode 100644
index 00000000000..0ccb78994d4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/icmp6.h
@@ -0,0 +1,72 @@
+/**
+ * @file
+ *
+ * IPv6 version of ICMP, as per RFC 4443.
+ */
+
+/*
+ * Copyright (c) 2010 Inico Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Ivan Delamer <delamer@inicotech.com>
+ *
+ *
+ * Please coordinate changes and requests with Ivan Delamer
+ * <delamer@inicotech.com>
+ */
+#ifndef LWIP_HDR_ICMP6_H
+#define LWIP_HDR_ICMP6_H
+
+#include "lwip/opt.h"
+#include "lwip/pbuf.h"
+#include "lwip/ip6_addr.h"
+#include "lwip/netif.h"
+#include "lwip/prot/icmp6.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_ICMP6 && LWIP_IPV6 /* don't build if not configured for use in lwipopts.h */
+
+void icmp6_input(struct pbuf *p, struct netif *inp);
+void icmp6_dest_unreach(struct pbuf *p, enum icmp6_dur_code c);
+void icmp6_packet_too_big(struct pbuf *p, u32_t mtu);
+void icmp6_time_exceeded(struct pbuf *p, enum icmp6_te_code c);
+void icmp6_time_exceeded_with_addrs(struct pbuf *p, enum icmp6_te_code c,
+    const ip6_addr_t *src_addr, const ip6_addr_t *dest_addr);
+void icmp6_param_problem(struct pbuf *p, enum icmp6_pp_code c, const void *pointer);
+
+#endif /* LWIP_ICMP6 && LWIP_IPV6 */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* LWIP_HDR_ICMP6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/if_api.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/if_api.h
new file mode 100644
index 00000000000..39017abd325
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/if_api.h
@@ -0,0 +1,68 @@
+/**
+ * @file
+ * Interface Identification APIs from:
+ *              RFC 3493: Basic Socket Interface Extensions for IPv6
+ *                  Section 4: Interface Identification
+ */
+
+/*
+ * Copyright (c) 2017 Joel Cunningham, Garmin International, Inc. <joel.cunningham@garmin.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Joel Cunningham <joel.cunningham@me.com>
+ *
+ */
+#ifndef LWIP_HDR_IF_H
+#define LWIP_HDR_IF_H
+
+#include "lwip/opt.h"
+
+#if LWIP_SOCKET /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define IF_NAMESIZE NETIF_NAMESIZE
+
+char * lwip_if_indextoname(unsigned int ifindex, char *ifname);
+unsigned int lwip_if_nametoindex(const char *ifname);
+
+#if LWIP_COMPAT_SOCKETS
+#define if_indextoname(ifindex, ifname)  lwip_if_indextoname(ifindex,ifname)
+#define if_nametoindex(ifname)           lwip_if_nametoindex(ifname)
+#endif /* LWIP_COMPAT_SOCKETS */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_SOCKET */
+
+#endif /* LWIP_HDR_IF_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/igmp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/igmp.h
new file mode 100644
index 00000000000..ffd80e680c3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/igmp.h
@@ -0,0 +1,115 @@
+/**
+ * @file
+ * IGMP API
+ */
+
+/*
+ * Copyright (c) 2002 CITEL Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of CITEL Technologies Ltd nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY CITEL TECHNOLOGIES AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL CITEL TECHNOLOGIES OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is a contribution to the lwIP TCP/IP stack.
+ * The Swedish Institute of Computer Science and Adam Dunkels
+ * are specifically granted permission to redistribute this
+ * source code.
+*/
+
+#ifndef LWIP_HDR_IGMP_H
+#define LWIP_HDR_IGMP_H
+
+#include "lwip/opt.h"
+#include "lwip/ip_addr.h"
+#include "lwip/netif.h"
+#include "lwip/pbuf.h"
+
+#if LWIP_IPV4 && LWIP_IGMP /* don't build if not configured for use in lwipopts.h */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* IGMP timer */
+#define IGMP_TMR_INTERVAL              100 /* Milliseconds */
+#define IGMP_V1_DELAYING_MEMBER_TMR   (1000/IGMP_TMR_INTERVAL)
+#define IGMP_JOIN_DELAYING_MEMBER_TMR (500 /IGMP_TMR_INTERVAL)
+
+/* Compatibility defines (don't use for new code) */
+#define IGMP_DEL_MAC_FILTER            NETIF_DEL_MAC_FILTER
+#define IGMP_ADD_MAC_FILTER            NETIF_ADD_MAC_FILTER
+
+/**
+ * igmp group structure - there is
+ * a list of groups for each interface
+ * these should really be linked from the interface, but
+ * if we keep them separate we will not affect the lwip original code
+ * too much
+ *
+ * There will be a group for the all systems group address but this
+ * will not run the state machine as it is used to kick off reports
+ * from all the other groups
+ */
+struct igmp_group {
+  /** next link */
+  struct igmp_group *next;
+  /** multicast address */
+  ip4_addr_t         group_address;
+  /** signifies we were the last person to report */
+  u8_t               last_reporter_flag;
+  /** current state of the group */
+  u8_t               group_state;
+  /** timer for reporting, negative is OFF */
+  u16_t              timer;
+  /** counter of simultaneous uses */
+  u8_t               use;
+};
+
+/*  Prototypes */
+void   igmp_init(void);
+err_t  igmp_start(struct netif *netif);
+err_t  igmp_stop(struct netif *netif);
+void   igmp_report_groups(struct netif *netif);
+struct igmp_group *igmp_lookfor_group(struct netif *ifp, const ip4_addr_t *addr);
+void   igmp_input(struct pbuf *p, struct netif *inp, const ip4_addr_t *dest);
+err_t  igmp_joingroup(const ip4_addr_t *ifaddr, const ip4_addr_t *groupaddr);
+err_t  igmp_joingroup_netif(struct netif *netif, const ip4_addr_t *groupaddr);
+err_t  igmp_leavegroup(const ip4_addr_t *ifaddr, const ip4_addr_t *groupaddr);
+err_t  igmp_leavegroup_netif(struct netif *netif, const ip4_addr_t *groupaddr);
+void   igmp_tmr(void);
+
+/** @ingroup igmp 
+ * Get list head of IGMP groups for netif.
+ * Note: The allsystems group IP is contained in the list as first entry.
+ * @see @ref netif_set_igmp_mac_filter()
+ */
+#define netif_igmp_data(netif) ((struct igmp_group *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_IGMP))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV4 && LWIP_IGMP */
+
+#endif /* LWIP_HDR_IGMP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/inet.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/inet.h
new file mode 100644
index 00000000000..2982a0f4b1a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/inet.h
@@ -0,0 +1,169 @@
+/**
+ * @file
+ * This file (together with sockets.h) aims to provide structs and functions from
+ * - arpa/inet.h
+ * - netinet/in.h
+ *
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_INET_H
+#define LWIP_HDR_INET_H
+
+#include "lwip/opt.h"
+#include "lwip/def.h"
+#include "lwip/ip_addr.h"
+#include "lwip/ip6_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* If your port already typedef's in_addr_t, define IN_ADDR_T_DEFINED
+   to prevent this code from redefining it. */
+#if !defined(in_addr_t) && !defined(IN_ADDR_T_DEFINED)
+typedef u32_t in_addr_t;
+#endif
+
+struct in_addr {
+  in_addr_t s_addr;
+};
+
+struct in6_addr {
+  union {
+    u32_t u32_addr[4];
+    u8_t  u8_addr[16];
+  } un;
+#define s6_addr  un.u8_addr
+};
+
+/** 255.255.255.255 */
+#define INADDR_NONE         IPADDR_NONE
+/** 127.0.0.1 */
+#define INADDR_LOOPBACK     IPADDR_LOOPBACK
+/** 0.0.0.0 */
+#define INADDR_ANY          IPADDR_ANY
+/** 255.255.255.255 */
+#define INADDR_BROADCAST    IPADDR_BROADCAST
+
+/** This macro can be used to initialize a variable of type struct in6_addr
+    to the IPv6 wildcard address. */
+#define IN6ADDR_ANY_INIT {{{0,0,0,0}}}
+/** This macro can be used to initialize a variable of type struct in6_addr
+    to the IPv6 loopback address. */
+#define IN6ADDR_LOOPBACK_INIT {{{0,0,0,PP_HTONL(1)}}}
+/** This variable is initialized by the system to contain the wildcard IPv6 address. */
+extern const struct in6_addr in6addr_any;
+
+/* Definitions of the bits in an (IPv4) Internet address integer.
+
+   On subnets, host and network parts are found according to
+   the subnet mask, not these masks.  */
+#define IN_CLASSA(a)        IP_CLASSA(a)
+#define IN_CLASSA_NET       IP_CLASSA_NET
+#define IN_CLASSA_NSHIFT    IP_CLASSA_NSHIFT
+#define IN_CLASSA_HOST      IP_CLASSA_HOST
+#define IN_CLASSA_MAX       IP_CLASSA_MAX
+
+#define IN_CLASSB(b)        IP_CLASSB(b)
+#define IN_CLASSB_NET       IP_CLASSB_NET
+#define IN_CLASSB_NSHIFT    IP_CLASSB_NSHIFT
+#define IN_CLASSB_HOST      IP_CLASSB_HOST
+#define IN_CLASSB_MAX       IP_CLASSB_MAX
+
+#define IN_CLASSC(c)        IP_CLASSC(c)
+#define IN_CLASSC_NET       IP_CLASSC_NET
+#define IN_CLASSC_NSHIFT    IP_CLASSC_NSHIFT
+#define IN_CLASSC_HOST      IP_CLASSC_HOST
+#define IN_CLASSC_MAX       IP_CLASSC_MAX
+
+#define IN_CLASSD(d)        IP_CLASSD(d)
+#define IN_CLASSD_NET       IP_CLASSD_NET     /* These ones aren't really */
+#define IN_CLASSD_NSHIFT    IP_CLASSD_NSHIFT  /*   net and host fields, but */
+#define IN_CLASSD_HOST      IP_CLASSD_HOST    /*   routing needn't know. */
+#define IN_CLASSD_MAX       IP_CLASSD_MAX
+
+#define IN_MULTICAST(a)     IP_MULTICAST(a)
+
+#define IN_EXPERIMENTAL(a)  IP_EXPERIMENTAL(a)
+#define IN_BADCLASS(a)      IP_BADCLASS(a)
+
+#define IN_LOOPBACKNET      IP_LOOPBACKNET
+
+
+#ifndef INET_ADDRSTRLEN
+#define INET_ADDRSTRLEN     IP4ADDR_STRLEN_MAX
+#endif
+#if LWIP_IPV6
+#ifndef INET6_ADDRSTRLEN
+#define INET6_ADDRSTRLEN    IP6ADDR_STRLEN_MAX
+#endif
+#endif
+
+#if LWIP_IPV4
+
+#define inet_addr_from_ip4addr(target_inaddr, source_ipaddr) ((target_inaddr)->s_addr = ip4_addr_get_u32(source_ipaddr))
+#define inet_addr_to_ip4addr(target_ipaddr, source_inaddr)   (ip4_addr_set_u32(target_ipaddr, (source_inaddr)->s_addr))
+
+/* directly map this to the lwip internal functions */
+#define inet_addr(cp)                   ipaddr_addr(cp)
+#define inet_aton(cp, addr)             ip4addr_aton(cp, (ip4_addr_t*)addr)
+#define inet_ntoa(addr)                 ip4addr_ntoa((const ip4_addr_t*)&(addr))
+#define inet_ntoa_r(addr, buf, buflen)  ip4addr_ntoa_r((const ip4_addr_t*)&(addr), buf, buflen)
+
+#endif /* LWIP_IPV4 */
+
+#if LWIP_IPV6
+#define inet6_addr_from_ip6addr(target_in6addr, source_ip6addr) {(target_in6addr)->un.u32_addr[0] = (source_ip6addr)->addr[0]; \
+                                                                 (target_in6addr)->un.u32_addr[1] = (source_ip6addr)->addr[1]; \
+                                                                 (target_in6addr)->un.u32_addr[2] = (source_ip6addr)->addr[2]; \
+                                                                 (target_in6addr)->un.u32_addr[3] = (source_ip6addr)->addr[3];}
+#define inet6_addr_to_ip6addr(target_ip6addr, source_in6addr)   {(target_ip6addr)->addr[0] = (source_in6addr)->un.u32_addr[0]; \
+                                                                 (target_ip6addr)->addr[1] = (source_in6addr)->un.u32_addr[1]; \
+                                                                 (target_ip6addr)->addr[2] = (source_in6addr)->un.u32_addr[2]; \
+                                                                 (target_ip6addr)->addr[3] = (source_in6addr)->un.u32_addr[3]; \
+                                                                 ip6_addr_clear_zone(target_ip6addr);}
+
+/* directly map this to the lwip internal functions */
+#define inet6_aton(cp, addr)            ip6addr_aton(cp, (ip6_addr_t*)addr)
+#define inet6_ntoa(addr)                ip6addr_ntoa((const ip6_addr_t*)&(addr))
+#define inet6_ntoa_r(addr, buf, buflen) ip6addr_ntoa_r((const ip6_addr_t*)&(addr), buf, buflen)
+
+#endif /* LWIP_IPV6 */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_INET_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/inet_chksum.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/inet_chksum.h
new file mode 100644
index 00000000000..76893ef52f9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/inet_chksum.h
@@ -0,0 +1,105 @@
+/**
+ * @file
+ * IP checksum calculation functions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_INET_CHKSUM_H
+#define LWIP_HDR_INET_CHKSUM_H
+
+#include "lwip/opt.h"
+
+#include "lwip/pbuf.h"
+#include "lwip/ip_addr.h"
+
+/** Swap the bytes in an u16_t: much like lwip_htons() for little-endian */
+#ifndef SWAP_BYTES_IN_WORD
+#define SWAP_BYTES_IN_WORD(w) (((w) & 0xff) << 8) | (((w) & 0xff00) >> 8)
+#endif /* SWAP_BYTES_IN_WORD */
+
+/** Split an u32_t in two u16_ts and add them up */
+#ifndef FOLD_U32T
+#define FOLD_U32T(u)          ((u32_t)(((u) >> 16) + ((u) & 0x0000ffffUL)))
+#endif
+
+#if LWIP_CHECKSUM_ON_COPY
+/** Function-like macro: same as MEMCPY but returns the checksum of copied data
+    as u16_t */
+# ifndef LWIP_CHKSUM_COPY
+#  define LWIP_CHKSUM_COPY(dst, src, len) lwip_chksum_copy(dst, src, len)
+#  ifndef LWIP_CHKSUM_COPY_ALGORITHM
+#   define LWIP_CHKSUM_COPY_ALGORITHM 1
+#  endif /* LWIP_CHKSUM_COPY_ALGORITHM */
+# else /* LWIP_CHKSUM_COPY */
+#  define LWIP_CHKSUM_COPY_ALGORITHM 0
+# endif /* LWIP_CHKSUM_COPY */
+#else /* LWIP_CHECKSUM_ON_COPY */
+# define LWIP_CHKSUM_COPY_ALGORITHM 0
+#endif /* LWIP_CHECKSUM_ON_COPY */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+u16_t inet_chksum(const void *dataptr, u16_t len);
+u16_t inet_chksum_pbuf(struct pbuf *p);
+#if LWIP_CHKSUM_COPY_ALGORITHM
+u16_t lwip_chksum_copy(void *dst, const void *src, u16_t len);
+#endif /* LWIP_CHKSUM_COPY_ALGORITHM */
+
+#if LWIP_IPV4
+u16_t inet_chksum_pseudo(struct pbuf *p, u8_t proto, u16_t proto_len,
+       const ip4_addr_t *src, const ip4_addr_t *dest);
+u16_t inet_chksum_pseudo_partial(struct pbuf *p, u8_t proto,
+       u16_t proto_len, u16_t chksum_len, const ip4_addr_t *src, const ip4_addr_t *dest);
+#endif /* LWIP_IPV4 */
+
+#if LWIP_IPV6
+u16_t ip6_chksum_pseudo(struct pbuf *p, u8_t proto, u16_t proto_len,
+       const ip6_addr_t *src, const ip6_addr_t *dest);
+u16_t ip6_chksum_pseudo_partial(struct pbuf *p, u8_t proto, u16_t proto_len,
+       u16_t chksum_len, const ip6_addr_t *src, const ip6_addr_t *dest);
+#endif /* LWIP_IPV6 */
+
+
+u16_t ip_chksum_pseudo(struct pbuf *p, u8_t proto, u16_t proto_len,
+       const ip_addr_t *src, const ip_addr_t *dest);
+u16_t ip_chksum_pseudo_partial(struct pbuf *p, u8_t proto, u16_t proto_len,
+       u16_t chksum_len, const ip_addr_t *src, const ip_addr_t *dest);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_INET_H */
+
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/init.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/init.h
new file mode 100644
index 00000000000..c7f3eb99cbb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/init.h
@@ -0,0 +1,100 @@
+/**
+ * @file
+ * lwIP initialization API
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_INIT_H
+#define LWIP_HDR_INIT_H
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup lwip_version Version
+ * @ingroup lwip
+ * @{
+ */
+
+/** X.x.x: Major version of the stack */
+#define LWIP_VERSION_MAJOR      2
+/** x.X.x: Minor version of the stack */
+#define LWIP_VERSION_MINOR      1
+/** x.x.X: Revision of the stack */
+#define LWIP_VERSION_REVISION   3
+/** For release candidates, this is set to 1..254
+  * For official releases, this is set to 255 (LWIP_RC_RELEASE)
+  * For development versions (Git), this is set to 0 (LWIP_RC_DEVELOPMENT) */
+#define LWIP_VERSION_RC         LWIP_RC_DEVELOPMENT
+
+/** LWIP_VERSION_RC is set to LWIP_RC_RELEASE for official releases */
+#define LWIP_RC_RELEASE         255
+/** LWIP_VERSION_RC is set to LWIP_RC_DEVELOPMENT for Git versions */
+#define LWIP_RC_DEVELOPMENT     0
+
+#define LWIP_VERSION_IS_RELEASE     (LWIP_VERSION_RC == LWIP_RC_RELEASE)
+#define LWIP_VERSION_IS_DEVELOPMENT (LWIP_VERSION_RC == LWIP_RC_DEVELOPMENT)
+#define LWIP_VERSION_IS_RC          ((LWIP_VERSION_RC != LWIP_RC_RELEASE) && (LWIP_VERSION_RC != LWIP_RC_DEVELOPMENT))
+
+/* Some helper defines to get a version string */
+#define LWIP_VERSTR2(x) #x
+#define LWIP_VERSTR(x) LWIP_VERSTR2(x)
+#if LWIP_VERSION_IS_RELEASE
+#define LWIP_VERSION_STRING_SUFFIX ""
+#elif LWIP_VERSION_IS_DEVELOPMENT
+#define LWIP_VERSION_STRING_SUFFIX "d"
+#else
+#define LWIP_VERSION_STRING_SUFFIX "rc" LWIP_VERSTR(LWIP_VERSION_RC)
+#endif
+
+/** Provides the version of the stack */
+#define LWIP_VERSION   ((LWIP_VERSION_MAJOR) << 24   | (LWIP_VERSION_MINOR) << 16 | \
+                        (LWIP_VERSION_REVISION) << 8 | (LWIP_VERSION_RC))
+/** Provides the version of the stack as string */
+#define LWIP_VERSION_STRING     LWIP_VERSTR(LWIP_VERSION_MAJOR) "." LWIP_VERSTR(LWIP_VERSION_MINOR) "." LWIP_VERSTR(LWIP_VERSION_REVISION) LWIP_VERSION_STRING_SUFFIX
+
+/**
+ * @}
+ */
+
+/* Modules initialization */
+void lwip_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_INIT_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip.h
new file mode 100644
index 00000000000..653c3b2f4fe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip.h
@@ -0,0 +1,330 @@
+/**
+ * @file
+ * IP API
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_IP_H
+#define LWIP_HDR_IP_H
+
+#include "lwip/opt.h"
+
+#include "lwip/def.h"
+#include "lwip/pbuf.h"
+#include "lwip/ip_addr.h"
+#include "lwip/err.h"
+#include "lwip/netif.h"
+#include "lwip/ip4.h"
+#include "lwip/ip6.h"
+#include "lwip/prot/ip.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* This is passed as the destination address to ip_output_if (not
+   to ip_output), meaning that an IP header already is constructed
+   in the pbuf. This is used when TCP retransmits. */
+#define LWIP_IP_HDRINCL  NULL
+
+/** pbufs passed to IP must have a ref-count of 1 as their payload pointer
+    gets altered as the packet is passed down the stack */
+#ifndef LWIP_IP_CHECK_PBUF_REF_COUNT_FOR_TX
+#define LWIP_IP_CHECK_PBUF_REF_COUNT_FOR_TX(p) LWIP_ASSERT("p->ref == 1", (p)->ref == 1)
+#endif
+
+#if LWIP_NETIF_USE_HINTS
+#define IP_PCB_NETIFHINT ;struct netif_hint netif_hints
+#else /* LWIP_NETIF_USE_HINTS */
+#define IP_PCB_NETIFHINT
+#endif /* LWIP_NETIF_USE_HINTS */
+
+/** This is the common part of all PCB types. It needs to be at the
+   beginning of a PCB type definition. It is located here so that
+   changes to this common part are made in one location instead of
+   having to change all PCB structs. */
+#define IP_PCB                             \
+  /* ip addresses in network byte order */ \
+  ip_addr_t local_ip;                      \
+  ip_addr_t remote_ip;                     \
+  /* Bound netif index */                  \
+  u8_t netif_idx;                          \
+  /* Socket options */                     \
+  u8_t so_options;                         \
+  /* Type Of Service */                    \
+  u8_t tos;                                \
+  /* Time To Live */                       \
+  u8_t ttl                                 \
+  /* link layer address resolution hint */ \
+  IP_PCB_NETIFHINT
+
+struct ip_pcb {
+  /* Common members of all PCB types */
+  IP_PCB;
+};
+
+/*
+ * Option flags per-socket. These are the same like SO_XXX in sockets.h
+ */
+#define SOF_REUSEADDR     0x04U  /* allow local address reuse */
+#define SOF_KEEPALIVE     0x08U  /* keep connections alive */
+#define SOF_BROADCAST     0x20U  /* permit to send and to receive broadcast messages (see IP_SOF_BROADCAST option) */
+
+/* These flags are inherited (e.g. from a listen-pcb to a connection-pcb): */
+#define SOF_INHERITED   (SOF_REUSEADDR|SOF_KEEPALIVE)
+
+/** Global variables of this module, kept in a struct for efficient access using base+index. */
+struct ip_globals
+{
+  /** The interface that accepted the packet for the current callback invocation. */
+  struct netif *current_netif;
+  /** The interface that received the packet for the current callback invocation. */
+  struct netif *current_input_netif;
+#if LWIP_IPV4
+  /** Header of the input packet currently being processed. */
+  const struct ip_hdr *current_ip4_header;
+#endif /* LWIP_IPV4 */
+#if LWIP_IPV6
+  /** Header of the input IPv6 packet currently being processed. */
+  struct ip6_hdr *current_ip6_header;
+#endif /* LWIP_IPV6 */
+  /** Total header length of current_ip4/6_header (i.e. after this, the UDP/TCP header starts) */
+  u16_t current_ip_header_tot_len;
+  /** Source IP address of current_header */
+  ip_addr_t current_iphdr_src;
+  /** Destination IP address of current_header */
+  ip_addr_t current_iphdr_dest;
+};
+extern struct ip_globals ip_data;
+
+
+/** Get the interface that accepted the current packet.
+ * This may or may not be the receiving netif, depending on your netif/network setup.
+ * This function must only be called from a receive callback (udp_recv,
+ * raw_recv, tcp_accept). It will return NULL otherwise. */
+#define ip_current_netif()      (ip_data.current_netif)
+/** Get the interface that received the current packet.
+ * This function must only be called from a receive callback (udp_recv,
+ * raw_recv, tcp_accept). It will return NULL otherwise. */
+#define ip_current_input_netif() (ip_data.current_input_netif)
+/** Total header length of ip(6)_current_header() (i.e. after this, the UDP/TCP header starts) */
+#define ip_current_header_tot_len() (ip_data.current_ip_header_tot_len)
+/** Source IP address of current_header */
+#define ip_current_src_addr()   (&ip_data.current_iphdr_src)
+/** Destination IP address of current_header */
+#define ip_current_dest_addr()  (&ip_data.current_iphdr_dest)
+
+#if LWIP_IPV4 && LWIP_IPV6
+/** Get the IPv4 header of the current packet.
+ * This function must only be called from a receive callback (udp_recv,
+ * raw_recv, tcp_accept). It will return NULL otherwise. */
+#define ip4_current_header()     ip_data.current_ip4_header
+/** Get the IPv6 header of the current packet.
+ * This function must only be called from a receive callback (udp_recv,
+ * raw_recv, tcp_accept). It will return NULL otherwise. */
+#define ip6_current_header()      ((const struct ip6_hdr*)(ip_data.current_ip6_header))
+/** Returns TRUE if the current IP input packet is IPv6, FALSE if it is IPv4 */
+#define ip_current_is_v6()        (ip6_current_header() != NULL)
+/** Source IPv6 address of current_header */
+#define ip6_current_src_addr()    (ip_2_ip6(&ip_data.current_iphdr_src))
+/** Destination IPv6 address of current_header */
+#define ip6_current_dest_addr()   (ip_2_ip6(&ip_data.current_iphdr_dest))
+/** Get the transport layer protocol */
+#define ip_current_header_proto() (ip_current_is_v6() ? \
+                                   IP6H_NEXTH(ip6_current_header()) :\
+                                   IPH_PROTO(ip4_current_header()))
+/** Get the transport layer header */
+#define ip_next_header_ptr()     ((const void*)((ip_current_is_v6() ? \
+  (const u8_t*)ip6_current_header() : (const u8_t*)ip4_current_header())  + ip_current_header_tot_len()))
+
+/** Source IP4 address of current_header */
+#define ip4_current_src_addr()     (ip_2_ip4(&ip_data.current_iphdr_src))
+/** Destination IP4 address of current_header */
+#define ip4_current_dest_addr()    (ip_2_ip4(&ip_data.current_iphdr_dest))
+
+#elif LWIP_IPV4 /* LWIP_IPV4 && LWIP_IPV6 */
+
+/** Get the IPv4 header of the current packet.
+ * This function must only be called from a receive callback (udp_recv,
+ * raw_recv, tcp_accept). It will return NULL otherwise. */
+#define ip4_current_header()     ip_data.current_ip4_header
+/** Always returns FALSE when only supporting IPv4 only */
+#define ip_current_is_v6()        0
+/** Get the transport layer protocol */
+#define ip_current_header_proto() IPH_PROTO(ip4_current_header())
+/** Get the transport layer header */
+#define ip_next_header_ptr()     ((const void*)((const u8_t*)ip4_current_header() + ip_current_header_tot_len()))
+/** Source IP4 address of current_header */
+#define ip4_current_src_addr()     (&ip_data.current_iphdr_src)
+/** Destination IP4 address of current_header */
+#define ip4_current_dest_addr()    (&ip_data.current_iphdr_dest)
+
+#elif LWIP_IPV6 /* LWIP_IPV4 && LWIP_IPV6 */
+
+/** Get the IPv6 header of the current packet.
+ * This function must only be called from a receive callback (udp_recv,
+ * raw_recv, tcp_accept). It will return NULL otherwise. */
+#define ip6_current_header()      ((const struct ip6_hdr*)(ip_data.current_ip6_header))
+/** Always returns TRUE when only supporting IPv6 only */
+#define ip_current_is_v6()        1
+/** Get the transport layer protocol */
+#define ip_current_header_proto() IP6H_NEXTH(ip6_current_header())
+/** Get the transport layer header */
+#define ip_next_header_ptr()     ((const void*)(((const u8_t*)ip6_current_header()) + ip_current_header_tot_len()))
+/** Source IP6 address of current_header */
+#define ip6_current_src_addr()    (&ip_data.current_iphdr_src)
+/** Destination IP6 address of current_header */
+#define ip6_current_dest_addr()   (&ip_data.current_iphdr_dest)
+
+#endif /* LWIP_IPV6 */
+
+/** Union source address of current_header */
+#define ip_current_src_addr()    (&ip_data.current_iphdr_src)
+/** Union destination address of current_header */
+#define ip_current_dest_addr()   (&ip_data.current_iphdr_dest)
+
+/** Gets an IP pcb option (SOF_* flags) */
+#define ip_get_option(pcb, opt)   ((pcb)->so_options & (opt))
+/** Sets an IP pcb option (SOF_* flags) */
+#define ip_set_option(pcb, opt)   ((pcb)->so_options = (u8_t)((pcb)->so_options | (opt)))
+/** Resets an IP pcb option (SOF_* flags) */
+#define ip_reset_option(pcb, opt) ((pcb)->so_options = (u8_t)((pcb)->so_options & ~(opt)))
+
+#if LWIP_IPV4 && LWIP_IPV6
+/**
+ * @ingroup ip
+ * Output IP packet, netif is selected by source address
+ */
+#define ip_output(p, src, dest, ttl, tos, proto) \
+        (IP_IS_V6(dest) ? \
+        ip6_output(p, ip_2_ip6(src), ip_2_ip6(dest), ttl, tos, proto) : \
+        ip4_output(p, ip_2_ip4(src), ip_2_ip4(dest), ttl, tos, proto))
+/**
+ * @ingroup ip
+ * Output IP packet to specified interface
+ */
+#define ip_output_if(p, src, dest, ttl, tos, proto, netif) \
+        (IP_IS_V6(dest) ? \
+        ip6_output_if(p, ip_2_ip6(src), ip_2_ip6(dest), ttl, tos, proto, netif) : \
+        ip4_output_if(p, ip_2_ip4(src), ip_2_ip4(dest), ttl, tos, proto, netif))
+/**
+ * @ingroup ip
+ * Output IP packet to interface specifying source address
+ */
+#define ip_output_if_src(p, src, dest, ttl, tos, proto, netif) \
+        (IP_IS_V6(dest) ? \
+        ip6_output_if_src(p, ip_2_ip6(src), ip_2_ip6(dest), ttl, tos, proto, netif) : \
+        ip4_output_if_src(p, ip_2_ip4(src), ip_2_ip4(dest), ttl, tos, proto, netif))
+/** Output IP packet that already includes an IP header. */
+#define ip_output_if_hdrincl(p, src, dest, netif) \
+        (IP_IS_V6(dest) ? \
+        ip6_output_if(p, ip_2_ip6(src), LWIP_IP_HDRINCL, 0, 0, 0, netif) : \
+        ip4_output_if(p, ip_2_ip4(src), LWIP_IP_HDRINCL, 0, 0, 0, netif))
+/** Output IP packet with netif_hint */
+#define ip_output_hinted(p, src, dest, ttl, tos, proto, netif_hint) \
+        (IP_IS_V6(dest) ? \
+        ip6_output_hinted(p, ip_2_ip6(src), ip_2_ip6(dest), ttl, tos, proto, netif_hint) : \
+        ip4_output_hinted(p, ip_2_ip4(src), ip_2_ip4(dest), ttl, tos, proto, netif_hint))
+/**
+ * @ingroup ip
+ * Get netif for address combination. See \ref ip6_route and \ref ip4_route
+ */
+#define ip_route(src, dest) \
+        (IP_IS_V6(dest) ? \
+        ip6_route(ip_2_ip6(src), ip_2_ip6(dest)) : \
+        ip4_route_src(ip_2_ip4(src), ip_2_ip4(dest)))
+/**
+ * @ingroup ip
+ * Get netif for IP.
+ */
+#define ip_netif_get_local_ip(netif, dest) (IP_IS_V6(dest) ? \
+        ip6_netif_get_local_ip(netif, ip_2_ip6(dest)) : \
+        ip4_netif_get_local_ip(netif))
+#define ip_debug_print(is_ipv6, p) ((is_ipv6) ? ip6_debug_print(p) : ip4_debug_print(p))
+
+err_t ip_input(struct pbuf *p, struct netif *inp);
+
+#elif LWIP_IPV4 /* LWIP_IPV4 && LWIP_IPV6 */
+
+#define ip_output(p, src, dest, ttl, tos, proto) \
+        ip4_output(p, src, dest, ttl, tos, proto)
+#define ip_output_if(p, src, dest, ttl, tos, proto, netif) \
+        ip4_output_if(p, src, dest, ttl, tos, proto, netif)
+#define ip_output_if_src(p, src, dest, ttl, tos, proto, netif) \
+        ip4_output_if_src(p, src, dest, ttl, tos, proto, netif)
+#define ip_output_hinted(p, src, dest, ttl, tos, proto, netif_hint) \
+        ip4_output_hinted(p, src, dest, ttl, tos, proto, netif_hint)
+#define ip_output_if_hdrincl(p, src, dest, netif) \
+        ip4_output_if(p, src, LWIP_IP_HDRINCL, 0, 0, 0, netif)
+#define ip_route(src, dest) \
+        ip4_route_src(src, dest)
+#define ip_netif_get_local_ip(netif, dest) \
+        ip4_netif_get_local_ip(netif)
+#define ip_debug_print(is_ipv6, p) ip4_debug_print(p)
+
+#define ip_input ip4_input
+
+#elif LWIP_IPV6 /* LWIP_IPV4 && LWIP_IPV6 */
+
+#define ip_output(p, src, dest, ttl, tos, proto) \
+        ip6_output(p, src, dest, ttl, tos, proto)
+#define ip_output_if(p, src, dest, ttl, tos, proto, netif) \
+        ip6_output_if(p, src, dest, ttl, tos, proto, netif)
+#define ip_output_if_src(p, src, dest, ttl, tos, proto, netif) \
+        ip6_output_if_src(p, src, dest, ttl, tos, proto, netif)
+#define ip_output_hinted(p, src, dest, ttl, tos, proto, netif_hint) \
+        ip6_output_hinted(p, src, dest, ttl, tos, proto, netif_hint)
+#define ip_output_if_hdrincl(p, src, dest, netif) \
+        ip6_output_if(p, src, LWIP_IP_HDRINCL, 0, 0, 0, netif)
+#define ip_route(src, dest) \
+        ip6_route(src, dest)
+#define ip_netif_get_local_ip(netif, dest) \
+        ip6_netif_get_local_ip(netif, dest)
+#define ip_debug_print(is_ipv6, p) ip6_debug_print(p)
+
+#define ip_input ip6_input
+
+#endif /* LWIP_IPV6 */
+
+#define ip_route_get_local_ip(src, dest, netif, ipaddr) do { \
+  (netif) = ip_route(src, dest); \
+  (ipaddr) = ip_netif_get_local_ip(netif, dest); \
+}while(0)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_IP_H */
+
+
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4.h
new file mode 100644
index 00000000000..fd35a33692f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4.h
@@ -0,0 +1,111 @@
+/**
+ * @file
+ * IPv4 API
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_IP4_H
+#define LWIP_HDR_IP4_H
+
+#include "lwip/opt.h"
+
+#if LWIP_IPV4
+
+#include "lwip/def.h"
+#include "lwip/pbuf.h"
+#include "lwip/ip4_addr.h"
+#include "lwip/err.h"
+#include "lwip/netif.h"
+#include "lwip/prot/ip4.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef LWIP_HOOK_IP4_ROUTE_SRC
+#define LWIP_IPV4_SRC_ROUTING   1
+#else
+#define LWIP_IPV4_SRC_ROUTING   0
+#endif
+
+/** Currently, the function ip_output_if_opt() is only used with IGMP */
+#define IP_OPTIONS_SEND   (LWIP_IPV4 && LWIP_IGMP)
+
+#define ip_init() /* Compatibility define, no init needed. */
+struct netif *ip4_route(const ip4_addr_t *dest);
+#if LWIP_IPV4_SRC_ROUTING
+struct netif *ip4_route_src(const ip4_addr_t *src, const ip4_addr_t *dest);
+#else /* LWIP_IPV4_SRC_ROUTING */
+#define ip4_route_src(src, dest) ip4_route(dest)
+#endif /* LWIP_IPV4_SRC_ROUTING */
+err_t ip4_input(struct pbuf *p, struct netif *inp);
+err_t ip4_output(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
+       u8_t ttl, u8_t tos, u8_t proto);
+err_t ip4_output_if(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
+       u8_t ttl, u8_t tos, u8_t proto, struct netif *netif);
+err_t ip4_output_if_src(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
+       u8_t ttl, u8_t tos, u8_t proto, struct netif *netif);
+#if LWIP_NETIF_USE_HINTS
+err_t ip4_output_hinted(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
+       u8_t ttl, u8_t tos, u8_t proto, struct netif_hint *netif_hint);
+#endif /* LWIP_NETIF_USE_HINTS */
+#if IP_OPTIONS_SEND
+err_t ip4_output_if_opt(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
+       u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options,
+       u16_t optlen);
+err_t ip4_output_if_opt_src(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
+       u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options,
+       u16_t optlen);
+#endif /* IP_OPTIONS_SEND */
+
+#if LWIP_MULTICAST_TX_OPTIONS
+void  ip4_set_default_multicast_netif(struct netif* default_multicast_netif);
+#endif /* LWIP_MULTICAST_TX_OPTIONS */
+
+#define ip4_netif_get_local_ip(netif) (((netif) != NULL) ? netif_ip_addr4(netif) : NULL)
+
+#if IP_DEBUG
+void ip4_debug_print(struct pbuf *p);
+#else
+#define ip4_debug_print(p)
+#endif /* IP_DEBUG */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV4 */
+
+#endif /* LWIP_HDR_IP_H */
+
+
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4_addr.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4_addr.h
new file mode 100644
index 00000000000..f244c4f54f2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4_addr.h
@@ -0,0 +1,216 @@
+/**
+ * @file
+ * IPv4 address API
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_IP4_ADDR_H
+#define LWIP_HDR_IP4_ADDR_H
+
+#include "lwip/opt.h"
+#include "lwip/def.h"
+
+#if LWIP_IPV4
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** This is the aligned version of ip4_addr_t,
+   used as local variable, on the stack, etc. */
+struct ip4_addr {
+  u32_t addr;
+};
+
+/** ip4_addr_t uses a struct for convenience only, so that the same defines can
+ * operate both on ip4_addr_t as well as on ip4_addr_p_t. */
+typedef struct ip4_addr ip4_addr_t;
+
+/* Forward declaration to not include netif.h */
+struct netif;
+
+/** 255.255.255.255 */
+#define IPADDR_NONE         ((u32_t)0xffffffffUL)
+/** 127.0.0.1 */
+#define IPADDR_LOOPBACK     ((u32_t)0x7f000001UL)
+/** 0.0.0.0 */
+#define IPADDR_ANY          ((u32_t)0x00000000UL)
+/** 255.255.255.255 */
+#define IPADDR_BROADCAST    ((u32_t)0xffffffffUL)
+
+/* Definitions of the bits in an Internet address integer.
+
+   On subnets, host and network parts are found according to
+   the subnet mask, not these masks.  */
+#define IP_CLASSA(a)        ((((u32_t)(a)) & 0x80000000UL) == 0)
+#define IP_CLASSA_NET       0xff000000
+#define IP_CLASSA_NSHIFT    24
+#define IP_CLASSA_HOST      (0xffffffff & ~IP_CLASSA_NET)
+#define IP_CLASSA_MAX       128
+
+#define IP_CLASSB(a)        ((((u32_t)(a)) & 0xc0000000UL) == 0x80000000UL)
+#define IP_CLASSB_NET       0xffff0000
+#define IP_CLASSB_NSHIFT    16
+#define IP_CLASSB_HOST      (0xffffffff & ~IP_CLASSB_NET)
+#define IP_CLASSB_MAX       65536
+
+#define IP_CLASSC(a)        ((((u32_t)(a)) & 0xe0000000UL) == 0xc0000000UL)
+#define IP_CLASSC_NET       0xffffff00
+#define IP_CLASSC_NSHIFT    8
+#define IP_CLASSC_HOST      (0xffffffff & ~IP_CLASSC_NET)
+
+#define IP_CLASSD(a)        (((u32_t)(a) & 0xf0000000UL) == 0xe0000000UL)
+#define IP_CLASSD_NET       0xf0000000          /* These ones aren't really */
+#define IP_CLASSD_NSHIFT    28                  /*   net and host fields, but */
+#define IP_CLASSD_HOST      0x0fffffff          /*   routing needn't know. */
+#define IP_MULTICAST(a)     IP_CLASSD(a)
+
+#define IP_EXPERIMENTAL(a)  (((u32_t)(a) & 0xf0000000UL) == 0xf0000000UL)
+#define IP_BADCLASS(a)      (((u32_t)(a) & 0xf0000000UL) == 0xf0000000UL)
+
+#define IP_LOOPBACKNET      127                 /* official! */
+
+/** Set an IP address given by the four byte-parts */
+#define IP4_ADDR(ipaddr, a,b,c,d)  (ipaddr)->addr = PP_HTONL(LWIP_MAKEU32(a,b,c,d))
+
+/** Copy IP address - faster than ip4_addr_set: no NULL check */
+#define ip4_addr_copy(dest, src) ((dest).addr = (src).addr)
+/** Safely copy one IP address to another (src may be NULL) */
+#define ip4_addr_set(dest, src) ((dest)->addr = \
+                                    ((src) == NULL ? 0 : \
+                                    (src)->addr))
+/** Set complete address to zero */
+#define ip4_addr_set_zero(ipaddr)     ((ipaddr)->addr = 0)
+/** Set address to IPADDR_ANY (no need for lwip_htonl()) */
+#define ip4_addr_set_any(ipaddr)      ((ipaddr)->addr = IPADDR_ANY)
+/** Set address to loopback address */
+#define ip4_addr_set_loopback(ipaddr) ((ipaddr)->addr = PP_HTONL(IPADDR_LOOPBACK))
+/** Check if an address is in the loopback region */
+#define ip4_addr_isloopback(ipaddr)    (((ipaddr)->addr & PP_HTONL(IP_CLASSA_NET)) == PP_HTONL(((u32_t)IP_LOOPBACKNET) << 24))
+/** Safely copy one IP address to another and change byte order
+ * from host- to network-order. */
+#define ip4_addr_set_hton(dest, src) ((dest)->addr = \
+                               ((src) == NULL ? 0:\
+                               lwip_htonl((src)->addr)))
+/** IPv4 only: set the IP address given as an u32_t */
+#define ip4_addr_set_u32(dest_ipaddr, src_u32) ((dest_ipaddr)->addr = (src_u32))
+/** IPv4 only: get the IP address as an u32_t */
+#define ip4_addr_get_u32(src_ipaddr) ((src_ipaddr)->addr)
+
+/** Get the network address by combining host address with netmask */
+#define ip4_addr_get_network(target, host, netmask) do { ((target)->addr = ((host)->addr) & ((netmask)->addr)); } while(0)
+
+/**
+ * Determine if two address are on the same network.
+ *
+ * @arg addr1 IP address 1
+ * @arg addr2 IP address 2
+ * @arg mask network identifier mask
+ * @return !0 if the network identifiers of both address match
+ */
+#define ip4_addr_netcmp(addr1, addr2, mask) (((addr1)->addr & \
+                                              (mask)->addr) == \
+                                             ((addr2)->addr & \
+                                              (mask)->addr))
+#define ip4_addr_cmp(addr1, addr2) ((addr1)->addr == (addr2)->addr)
+
+#define ip4_addr_isany_val(addr1)   ((addr1).addr == IPADDR_ANY)
+#define ip4_addr_isany(addr1) ((addr1) == NULL || ip4_addr_isany_val(*(addr1)))
+
+#define ip4_addr_isbroadcast(addr1, netif) ip4_addr_isbroadcast_u32((addr1)->addr, netif)
+u8_t ip4_addr_isbroadcast_u32(u32_t addr, const struct netif *netif);
+
+#define ip_addr_netmask_valid(netmask) ip4_addr_netmask_valid((netmask)->addr)
+u8_t ip4_addr_netmask_valid(u32_t netmask);
+
+#define ip4_addr_ismulticast(addr1) (((addr1)->addr & PP_HTONL(0xf0000000UL)) == PP_HTONL(0xe0000000UL))
+
+#define ip4_addr_islinklocal(addr1) (((addr1)->addr & PP_HTONL(0xffff0000UL)) == PP_HTONL(0xa9fe0000UL))
+
+#define ip4_addr_debug_print_parts(debug, a, b, c, d) \
+  LWIP_DEBUGF(debug, ("%" U16_F ".%" U16_F ".%" U16_F ".%" U16_F, a, b, c, d))
+#define ip4_addr_debug_print(debug, ipaddr) \
+  ip4_addr_debug_print_parts(debug, \
+                      (u16_t)((ipaddr) != NULL ? ip4_addr1_16(ipaddr) : 0),       \
+                      (u16_t)((ipaddr) != NULL ? ip4_addr2_16(ipaddr) : 0),       \
+                      (u16_t)((ipaddr) != NULL ? ip4_addr3_16(ipaddr) : 0),       \
+                      (u16_t)((ipaddr) != NULL ? ip4_addr4_16(ipaddr) : 0))
+#define ip4_addr_debug_print_val(debug, ipaddr) \
+  ip4_addr_debug_print_parts(debug, \
+                      ip4_addr1_16_val(ipaddr),       \
+                      ip4_addr2_16_val(ipaddr),       \
+                      ip4_addr3_16_val(ipaddr),       \
+                      ip4_addr4_16_val(ipaddr))
+
+/* Get one byte from the 4-byte address */
+#define ip4_addr_get_byte(ipaddr, idx) (((const u8_t*)(&(ipaddr)->addr))[idx])
+#define ip4_addr1(ipaddr) ip4_addr_get_byte(ipaddr, 0)
+#define ip4_addr2(ipaddr) ip4_addr_get_byte(ipaddr, 1)
+#define ip4_addr3(ipaddr) ip4_addr_get_byte(ipaddr, 2)
+#define ip4_addr4(ipaddr) ip4_addr_get_byte(ipaddr, 3)
+/* Get one byte from the 4-byte address, but argument is 'ip4_addr_t',
+ * not a pointer */
+#define ip4_addr_get_byte_val(ipaddr, idx) ((u8_t)(((ipaddr).addr >> (idx * 8)) & 0xff))
+#define ip4_addr1_val(ipaddr) ip4_addr_get_byte_val(ipaddr, 0)
+#define ip4_addr2_val(ipaddr) ip4_addr_get_byte_val(ipaddr, 1)
+#define ip4_addr3_val(ipaddr) ip4_addr_get_byte_val(ipaddr, 2)
+#define ip4_addr4_val(ipaddr) ip4_addr_get_byte_val(ipaddr, 3)
+/* These are cast to u16_t, with the intent that they are often arguments
+ * to printf using the U16_F format from cc.h. */
+#define ip4_addr1_16(ipaddr) ((u16_t)ip4_addr1(ipaddr))
+#define ip4_addr2_16(ipaddr) ((u16_t)ip4_addr2(ipaddr))
+#define ip4_addr3_16(ipaddr) ((u16_t)ip4_addr3(ipaddr))
+#define ip4_addr4_16(ipaddr) ((u16_t)ip4_addr4(ipaddr))
+#define ip4_addr1_16_val(ipaddr) ((u16_t)ip4_addr1_val(ipaddr))
+#define ip4_addr2_16_val(ipaddr) ((u16_t)ip4_addr2_val(ipaddr))
+#define ip4_addr3_16_val(ipaddr) ((u16_t)ip4_addr3_val(ipaddr))
+#define ip4_addr4_16_val(ipaddr) ((u16_t)ip4_addr4_val(ipaddr))
+
+#define IP4ADDR_STRLEN_MAX  16
+
+/** For backwards compatibility */
+#define ip_ntoa(ipaddr)  ipaddr_ntoa(ipaddr)
+
+u32_t ipaddr_addr(const char *cp);
+int ip4addr_aton(const char *cp, ip4_addr_t *addr);
+/** returns ptr to static buffer; not reentrant! */
+char *ip4addr_ntoa(const ip4_addr_t *addr);
+char *ip4addr_ntoa_r(const ip4_addr_t *addr, char *buf, int buflen);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV4 */
+
+#endif /* LWIP_HDR_IP_ADDR_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4_frag.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4_frag.h
new file mode 100644
index 00000000000..ed5bf14a31c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4_frag.h
@@ -0,0 +1,100 @@
+/**
+ * @file
+ * IP fragmentation/reassembly
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Jani Monoses <jani@iv.ro>
+ *
+ */
+
+#ifndef LWIP_HDR_IP4_FRAG_H
+#define LWIP_HDR_IP4_FRAG_H
+
+#include "lwip/opt.h"
+#include "lwip/err.h"
+#include "lwip/pbuf.h"
+#include "lwip/netif.h"
+#include "lwip/ip_addr.h"
+#include "lwip/ip.h"
+
+#if LWIP_IPV4
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if IP_REASSEMBLY
+/* The IP reassembly timer interval in milliseconds. */
+#define IP_TMR_INTERVAL 1000
+
+/** IP reassembly helper struct.
+ * This is exported because memp needs to know the size.
+ */
+struct ip_reassdata {
+  struct ip_reassdata *next;
+  struct pbuf *p;
+  struct ip_hdr iphdr;
+  u16_t datagram_len;
+  u8_t flags;
+  u8_t timer;
+};
+
+void ip_reass_init(void);
+void ip_reass_tmr(void);
+struct pbuf * ip4_reass(struct pbuf *p);
+#endif /* IP_REASSEMBLY */
+
+#if IP_FRAG
+#if !LWIP_NETIF_TX_SINGLE_PBUF
+#ifndef LWIP_PBUF_CUSTOM_REF_DEFINED
+#define LWIP_PBUF_CUSTOM_REF_DEFINED
+/** A custom pbuf that holds a reference to another pbuf, which is freed
+ * when this custom pbuf is freed. This is used to create a custom PBUF_REF
+ * that points into the original pbuf. */
+struct pbuf_custom_ref {
+  /** 'base class' */
+  struct pbuf_custom pc;
+  /** pointer to the original pbuf that is referenced */
+  struct pbuf *original;
+};
+#endif /* LWIP_PBUF_CUSTOM_REF_DEFINED */
+#endif /* !LWIP_NETIF_TX_SINGLE_PBUF */
+
+err_t ip4_frag(struct pbuf *p, struct netif *netif, const ip4_addr_t *dest);
+#endif /* IP_FRAG */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV4 */
+
+#endif /* LWIP_HDR_IP4_FRAG_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4_napt.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4_napt.h
new file mode 100644
index 00000000000..8d98e120dfa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip4_napt.h
@@ -0,0 +1,96 @@
+/**
+ * @file ip4_napt.h
+ * This is a private interface of ip4_napt used from ip4.c
+ *
+ * @see ip4_napt.c
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * original reassembly code by Adam Dunkels <adam@sics.se>
+ *
+ */
+
+#ifndef LWIP_HDR_IP4_NAPT_H
+#define LWIP_HDR_IP4_NAPT_H
+
+#include "lwip/opt.h"
+
+#if ESP_LWIP
+#if IP_FORWARD
+#if IP_NAPT
+
+#include "lwip/def.h"
+#include "lwip/pbuf.h"
+#include "lwip/ip4_addr.h"
+#include "lwip/err.h"
+#include "lwip/netif.h"
+#include "lwip/prot/ip4.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "lwip/err.h"
+#include "lwip/ip4.h"
+
+/**
+* NAPT for a forwarded packet. It checks weather we need NAPT and modify
+* the packet source address and port if needed.
+*
+* @param p the packet to forward (p->payload points to IP header)
+* @param iphdr the IP header of the input packet
+* @param inp the netif on which this packet was received
+* @param outp the netif on which this packet will be sent
+* @return ERR_OK if packet should be sent, or ERR_RTE if it should be dropped
+*/
+err_t
+ip_napt_forward(struct pbuf *p, struct ip_hdr *iphdr, struct netif *inp, struct netif *outp);
+
+/**
+ * NAPT for an input packet. It checks weather the destination is on NAPT
+ * table and modify the packet destination address and port if needed.
+ *
+ * @param p the packet to forward (p->payload points to IP header)
+ * @param iphdr the IP header of the input packet
+ * @param inp the netif on which this packet was received
+ */
+void
+ip_napt_recv(struct pbuf *p, struct ip_hdr *iphdr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* IP_NAPT */
+#endif /* IP_FORWARD */
+#endif /* ESP_LWIP */
+
+#endif /* LWIP_HDR_IP4_NAPT_H */
+
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6.h
new file mode 100644
index 00000000000..f894e063efb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6.h
@@ -0,0 +1,93 @@
+/**
+ * @file
+ *
+ * IPv6 layer.
+ */
+
+/*
+ * Copyright (c) 2010 Inico Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Ivan Delamer <delamer@inicotech.com>
+ *
+ *
+ * Please coordinate changes and requests with Ivan Delamer
+ * <delamer@inicotech.com>
+ */
+#ifndef LWIP_HDR_IP6_H
+#define LWIP_HDR_IP6_H
+
+#include "lwip/opt.h"
+
+#if LWIP_IPV6  /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/ip6_addr.h"
+#include "lwip/prot/ip6.h"
+#include "lwip/def.h"
+#include "lwip/pbuf.h"
+#include "lwip/netif.h"
+
+#include "lwip/err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct netif *ip6_route(const ip6_addr_t *src, const ip6_addr_t *dest);
+const ip_addr_t *ip6_select_source_address(struct netif *netif, const ip6_addr_t * dest);
+err_t         ip6_input(struct pbuf *p, struct netif *inp);
+err_t         ip6_output(struct pbuf *p, const ip6_addr_t *src, const ip6_addr_t *dest,
+                         u8_t hl, u8_t tc, u8_t nexth);
+err_t         ip6_output_if(struct pbuf *p, const ip6_addr_t *src, const ip6_addr_t *dest,
+                            u8_t hl, u8_t tc, u8_t nexth, struct netif *netif);
+err_t         ip6_output_if_src(struct pbuf *p, const ip6_addr_t *src, const ip6_addr_t *dest,
+                            u8_t hl, u8_t tc, u8_t nexth, struct netif *netif);
+#if LWIP_NETIF_USE_HINTS
+err_t         ip6_output_hinted(struct pbuf *p, const ip6_addr_t *src, const ip6_addr_t *dest,
+                                u8_t hl, u8_t tc, u8_t nexth, struct netif_hint *netif_hint);
+#endif /* LWIP_NETIF_USE_HINTS */
+#if LWIP_IPV6_MLD
+err_t         ip6_options_add_hbh_ra(struct pbuf * p, u8_t nexth, u8_t value);
+#endif /* LWIP_IPV6_MLD */
+
+#define ip6_netif_get_local_ip(netif, dest) (((netif) != NULL) ? \
+  ip6_select_source_address(netif, dest) : NULL)
+
+#if IP6_DEBUG
+void ip6_debug_print(struct pbuf *p);
+#else
+#define ip6_debug_print(p)
+#endif /* IP6_DEBUG */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV6 */
+
+#endif /* LWIP_HDR_IP6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6_addr.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6_addr.h
new file mode 100644
index 00000000000..29c2a34d9e9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6_addr.h
@@ -0,0 +1,352 @@
+/**
+ * @file
+ *
+ * IPv6 addresses.
+ */
+
+/*
+ * Copyright (c) 2010 Inico Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Ivan Delamer <delamer@inicotech.com>
+ *
+ * Structs and macros for handling IPv6 addresses.
+ *
+ * Please coordinate changes and requests with Ivan Delamer
+ * <delamer@inicotech.com>
+ */
+#ifndef LWIP_HDR_IP6_ADDR_H
+#define LWIP_HDR_IP6_ADDR_H
+
+#include "lwip/opt.h"
+#include "def.h"
+
+#if LWIP_IPV6  /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/ip6_zone.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/** This is the aligned version of ip6_addr_t,
+    used as local variable, on the stack, etc. */
+struct ip6_addr {
+  u32_t addr[4];
+#if LWIP_IPV6_SCOPES
+  u8_t zone;
+#endif /* LWIP_IPV6_SCOPES */
+};
+
+/** IPv6 address */
+typedef struct ip6_addr ip6_addr_t;
+
+/** Set an IPv6 partial address given by byte-parts */
+#define IP6_ADDR_PART(ip6addr, index, a,b,c,d) \
+  (ip6addr)->addr[index] = PP_HTONL(LWIP_MAKEU32(a,b,c,d))
+
+/** Set a full IPv6 address by passing the 4 u32_t indices in network byte order
+    (use PP_HTONL() for constants) */
+#define IP6_ADDR(ip6addr, idx0, idx1, idx2, idx3) do { \
+  (ip6addr)->addr[0] = idx0; \
+  (ip6addr)->addr[1] = idx1; \
+  (ip6addr)->addr[2] = idx2; \
+  (ip6addr)->addr[3] = idx3; \
+  ip6_addr_clear_zone(ip6addr); } while(0)
+
+/** Access address in 16-bit block */
+#define IP6_ADDR_BLOCK1(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[0]) >> 16) & 0xffff))
+/** Access address in 16-bit block */
+#define IP6_ADDR_BLOCK2(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[0])) & 0xffff))
+/** Access address in 16-bit block */
+#define IP6_ADDR_BLOCK3(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[1]) >> 16) & 0xffff))
+/** Access address in 16-bit block */
+#define IP6_ADDR_BLOCK4(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[1])) & 0xffff))
+/** Access address in 16-bit block */
+#define IP6_ADDR_BLOCK5(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[2]) >> 16) & 0xffff))
+/** Access address in 16-bit block */
+#define IP6_ADDR_BLOCK6(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[2])) & 0xffff))
+/** Access address in 16-bit block */
+#define IP6_ADDR_BLOCK7(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[3]) >> 16) & 0xffff))
+/** Access address in 16-bit block */
+#define IP6_ADDR_BLOCK8(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[3])) & 0xffff))
+
+/** Copy IPv6 address - faster than ip6_addr_set: no NULL check */
+#define ip6_addr_copy(dest, src) do{(dest).addr[0] = (src).addr[0]; \
+                                    (dest).addr[1] = (src).addr[1]; \
+                                    (dest).addr[2] = (src).addr[2]; \
+                                    (dest).addr[3] = (src).addr[3]; \
+                                    ip6_addr_copy_zone((dest), (src)); }while(0)
+/** Safely copy one IPv6 address to another (src may be NULL) */
+#define ip6_addr_set(dest, src) do{(dest)->addr[0] = (src) == NULL ? 0 : (src)->addr[0]; \
+                                   (dest)->addr[1] = (src) == NULL ? 0 : (src)->addr[1]; \
+                                   (dest)->addr[2] = (src) == NULL ? 0 : (src)->addr[2]; \
+                                   (dest)->addr[3] = (src) == NULL ? 0 : (src)->addr[3]; \
+                                   ip6_addr_set_zone((dest), (src) == NULL ? IP6_NO_ZONE : ip6_addr_zone(src)); }while(0)
+
+/** Copy packed IPv6 address to unpacked IPv6 address; zone is not set */
+#define ip6_addr_copy_from_packed(dest, src) do{(dest).addr[0] = (src).addr[0]; \
+                                    (dest).addr[1] = (src).addr[1]; \
+                                    (dest).addr[2] = (src).addr[2]; \
+                                    (dest).addr[3] = (src).addr[3]; \
+                                    ip6_addr_clear_zone(&dest); }while(0)
+
+/** Copy unpacked IPv6 address to packed IPv6 address; zone is lost */
+#define ip6_addr_copy_to_packed(dest, src) do{(dest).addr[0] = (src).addr[0]; \
+                                    (dest).addr[1] = (src).addr[1]; \
+                                    (dest).addr[2] = (src).addr[2]; \
+                                    (dest).addr[3] = (src).addr[3]; }while(0)
+
+/** Set complete address to zero */
+#define ip6_addr_set_zero(ip6addr)    do{(ip6addr)->addr[0] = 0; \
+                                         (ip6addr)->addr[1] = 0; \
+                                         (ip6addr)->addr[2] = 0; \
+                                         (ip6addr)->addr[3] = 0; \
+                                         ip6_addr_clear_zone(ip6addr);}while(0)
+
+/** Set address to ipv6 'any' (no need for lwip_htonl()) */
+#define ip6_addr_set_any(ip6addr)       ip6_addr_set_zero(ip6addr)
+/** Set address to ipv6 loopback address */
+#define ip6_addr_set_loopback(ip6addr) do{(ip6addr)->addr[0] = 0; \
+                                          (ip6addr)->addr[1] = 0; \
+                                          (ip6addr)->addr[2] = 0; \
+                                          (ip6addr)->addr[3] = PP_HTONL(0x00000001UL); \
+                                          ip6_addr_clear_zone(ip6addr);}while(0)
+/** Safely copy one IPv6 address to another and change byte order
+ * from host- to network-order. */
+#define ip6_addr_set_hton(dest, src) do{(dest)->addr[0] = (src) == NULL ? 0 : lwip_htonl((src)->addr[0]); \
+                                        (dest)->addr[1] = (src) == NULL ? 0 : lwip_htonl((src)->addr[1]); \
+                                        (dest)->addr[2] = (src) == NULL ? 0 : lwip_htonl((src)->addr[2]); \
+                                        (dest)->addr[3] = (src) == NULL ? 0 : lwip_htonl((src)->addr[3]); \
+                                        ip6_addr_set_zone((dest), (src) == NULL ? IP6_NO_ZONE : ip6_addr_zone(src));}while(0)
+
+
+/** Compare IPv6 networks, ignoring zone information. To be used sparingly! */
+#define ip6_addr_netcmp_zoneless(addr1, addr2) (((addr1)->addr[0] == (addr2)->addr[0]) && \
+                                               ((addr1)->addr[1] == (addr2)->addr[1]))
+
+/**
+ * Determine if two IPv6 address are on the same network.
+ *
+ * @param addr1 IPv6 address 1
+ * @param addr2 IPv6 address 2
+ * @return 1 if the network identifiers of both address match, 0 if not
+ */
+#define ip6_addr_netcmp(addr1, addr2) (ip6_addr_netcmp_zoneless((addr1), (addr2)) && \
+                                       ip6_addr_cmp_zone((addr1), (addr2)))
+
+/* Exact-host comparison *after* ip6_addr_netcmp() succeeded, for efficiency. */
+#define ip6_addr_nethostcmp(addr1, addr2) (((addr1)->addr[2] == (addr2)->addr[2]) && \
+                                           ((addr1)->addr[3] == (addr2)->addr[3]))
+
+/** Compare IPv6 addresses, ignoring zone information. To be used sparingly! */
+#define ip6_addr_cmp_zoneless(addr1, addr2) (((addr1)->addr[0] == (addr2)->addr[0]) && \
+                                    ((addr1)->addr[1] == (addr2)->addr[1]) && \
+                                    ((addr1)->addr[2] == (addr2)->addr[2]) && \
+                                    ((addr1)->addr[3] == (addr2)->addr[3]))
+/**
+ * Determine if two IPv6 addresses are the same. In particular, the address
+ * part of both must be the same, and the zone must be compatible.
+ *
+ * @param addr1 IPv6 address 1
+ * @param addr2 IPv6 address 2
+ * @return 1 if the addresses are considered equal, 0 if not
+ */
+#define ip6_addr_cmp(addr1, addr2) (ip6_addr_cmp_zoneless((addr1), (addr2)) && \
+                                    ip6_addr_cmp_zone((addr1), (addr2)))
+
+/** Compare IPv6 address to packed address and zone */
+#define ip6_addr_cmp_packed(ip6addr, paddr, zone_idx) (((ip6addr)->addr[0] == (paddr)->addr[0]) && \
+                                    ((ip6addr)->addr[1] == (paddr)->addr[1]) && \
+                                    ((ip6addr)->addr[2] == (paddr)->addr[2]) && \
+                                    ((ip6addr)->addr[3] == (paddr)->addr[3]) && \
+                                    ip6_addr_equals_zone((ip6addr), (zone_idx)))
+
+#define ip6_get_subnet_id(ip6addr)   (lwip_htonl((ip6addr)->addr[2]) & 0x0000ffffUL)
+
+#define ip6_addr_isany_val(ip6addr) (((ip6addr).addr[0] == 0) && \
+                                     ((ip6addr).addr[1] == 0) && \
+                                     ((ip6addr).addr[2] == 0) && \
+                                     ((ip6addr).addr[3] == 0))
+#define ip6_addr_isany(ip6addr) (((ip6addr) == NULL) || ip6_addr_isany_val(*(ip6addr)))
+
+#define ip6_addr_isloopback(ip6addr) (((ip6addr)->addr[0] == 0UL) && \
+                                      ((ip6addr)->addr[1] == 0UL) && \
+                                      ((ip6addr)->addr[2] == 0UL) && \
+                                      ((ip6addr)->addr[3] == PP_HTONL(0x00000001UL)))
+
+#define ip6_addr_isglobal(ip6addr) (((ip6addr)->addr[0] & PP_HTONL(0xe0000000UL)) == PP_HTONL(0x20000000UL))
+
+#define ip6_addr_islinklocal(ip6addr) (((ip6addr)->addr[0] & PP_HTONL(0xffc00000UL)) == PP_HTONL(0xfe800000UL))
+
+#define ip6_addr_issitelocal(ip6addr) (((ip6addr)->addr[0] & PP_HTONL(0xffc00000UL)) == PP_HTONL(0xfec00000UL))
+
+#define ip6_addr_isuniquelocal(ip6addr) (((ip6addr)->addr[0] & PP_HTONL(0xfe000000UL)) == PP_HTONL(0xfc000000UL))
+
+#define ip6_addr_isipv4mappedipv6(ip6addr) (((ip6addr)->addr[0] == 0) && ((ip6addr)->addr[1] == 0) && (((ip6addr)->addr[2]) == PP_HTONL(0x0000FFFFUL)))
+
+#define ip6_addr_ismulticast(ip6addr) (((ip6addr)->addr[0] & PP_HTONL(0xff000000UL)) == PP_HTONL(0xff000000UL))
+#define ip6_addr_multicast_transient_flag(ip6addr)  ((ip6addr)->addr[0] & PP_HTONL(0x00100000UL))
+#define ip6_addr_multicast_prefix_flag(ip6addr)     ((ip6addr)->addr[0] & PP_HTONL(0x00200000UL))
+#define ip6_addr_multicast_rendezvous_flag(ip6addr) ((ip6addr)->addr[0] & PP_HTONL(0x00400000UL))
+#define ip6_addr_multicast_scope(ip6addr) ((lwip_htonl((ip6addr)->addr[0]) >> 16) & 0xf)
+#define IP6_MULTICAST_SCOPE_RESERVED            0x0
+#define IP6_MULTICAST_SCOPE_RESERVED0           0x0
+#define IP6_MULTICAST_SCOPE_INTERFACE_LOCAL     0x1
+#define IP6_MULTICAST_SCOPE_LINK_LOCAL          0x2
+#define IP6_MULTICAST_SCOPE_RESERVED3           0x3
+#define IP6_MULTICAST_SCOPE_ADMIN_LOCAL         0x4
+#define IP6_MULTICAST_SCOPE_SITE_LOCAL          0x5
+#define IP6_MULTICAST_SCOPE_ORGANIZATION_LOCAL  0x8
+#define IP6_MULTICAST_SCOPE_GLOBAL              0xe
+#define IP6_MULTICAST_SCOPE_RESERVEDF           0xf
+#define ip6_addr_ismulticast_iflocal(ip6addr) (((ip6addr)->addr[0] & PP_HTONL(0xff8f0000UL)) == PP_HTONL(0xff010000UL))
+#define ip6_addr_ismulticast_linklocal(ip6addr) (((ip6addr)->addr[0] & PP_HTONL(0xff8f0000UL)) == PP_HTONL(0xff020000UL))
+#define ip6_addr_ismulticast_adminlocal(ip6addr) (((ip6addr)->addr[0] & PP_HTONL(0xff8f0000UL)) == PP_HTONL(0xff040000UL))
+#define ip6_addr_ismulticast_sitelocal(ip6addr) (((ip6addr)->addr[0] & PP_HTONL(0xff8f0000UL)) == PP_HTONL(0xff050000UL))
+#define ip6_addr_ismulticast_orglocal(ip6addr) (((ip6addr)->addr[0] & PP_HTONL(0xff8f0000UL)) == PP_HTONL(0xff080000UL))
+#define ip6_addr_ismulticast_global(ip6addr) (((ip6addr)->addr[0] & PP_HTONL(0xff8f0000UL)) == PP_HTONL(0xff0e0000UL))
+
+/* Scoping note: while interface-local and link-local multicast addresses do
+ * have a scope (i.e., they are meaningful only in the context of a particular
+ * interface), the following functions are not assigning or comparing zone
+ * indices. The reason for this is backward compatibility. Any call site that
+ * produces a non-global multicast address must assign a multicast address as
+ * appropriate itself. */
+
+#define ip6_addr_isallnodes_iflocal(ip6addr) (((ip6addr)->addr[0] == PP_HTONL(0xff010000UL)) && \
+    ((ip6addr)->addr[1] == 0UL) && \
+    ((ip6addr)->addr[2] == 0UL) && \
+    ((ip6addr)->addr[3] == PP_HTONL(0x00000001UL)))
+
+#define ip6_addr_isallnodes_linklocal(ip6addr) (((ip6addr)->addr[0] == PP_HTONL(0xff020000UL)) && \
+    ((ip6addr)->addr[1] == 0UL) && \
+    ((ip6addr)->addr[2] == 0UL) && \
+    ((ip6addr)->addr[3] == PP_HTONL(0x00000001UL)))
+#define ip6_addr_set_allnodes_linklocal(ip6addr) do{(ip6addr)->addr[0] = PP_HTONL(0xff020000UL); \
+                (ip6addr)->addr[1] = 0; \
+                (ip6addr)->addr[2] = 0; \
+                (ip6addr)->addr[3] = PP_HTONL(0x00000001UL); \
+                ip6_addr_clear_zone(ip6addr); }while(0)
+
+#define ip6_addr_isallrouters_linklocal(ip6addr) (((ip6addr)->addr[0] == PP_HTONL(0xff020000UL)) && \
+    ((ip6addr)->addr[1] == 0UL) && \
+    ((ip6addr)->addr[2] == 0UL) && \
+    ((ip6addr)->addr[3] == PP_HTONL(0x00000002UL)))
+#define ip6_addr_set_allrouters_linklocal(ip6addr) do{(ip6addr)->addr[0] = PP_HTONL(0xff020000UL); \
+                (ip6addr)->addr[1] = 0; \
+                (ip6addr)->addr[2] = 0; \
+                (ip6addr)->addr[3] = PP_HTONL(0x00000002UL); \
+                ip6_addr_clear_zone(ip6addr); }while(0)
+
+#define ip6_addr_issolicitednode(ip6addr) ( ((ip6addr)->addr[0] == PP_HTONL(0xff020000UL)) && \
+        ((ip6addr)->addr[2] == PP_HTONL(0x00000001UL)) && \
+        (((ip6addr)->addr[3] & PP_HTONL(0xff000000UL)) == PP_HTONL(0xff000000UL)) )
+
+#define ip6_addr_set_solicitednode(ip6addr, if_id) do{(ip6addr)->addr[0] = PP_HTONL(0xff020000UL); \
+                (ip6addr)->addr[1] = 0; \
+                (ip6addr)->addr[2] = PP_HTONL(0x00000001UL); \
+                (ip6addr)->addr[3] = (PP_HTONL(0xff000000UL) | (if_id)); \
+                ip6_addr_clear_zone(ip6addr); }while(0)
+
+#define ip6_addr_cmp_solicitednode(ip6addr, sn_addr) (((ip6addr)->addr[0] == PP_HTONL(0xff020000UL)) && \
+                                    ((ip6addr)->addr[1] == 0) && \
+                                    ((ip6addr)->addr[2] == PP_HTONL(0x00000001UL)) && \
+                                    ((ip6addr)->addr[3] == (PP_HTONL(0xff000000UL) | (sn_addr)->addr[3])))
+
+/* IPv6 address states. */
+#define IP6_ADDR_INVALID      0x00
+#define IP6_ADDR_TENTATIVE    0x08
+#define IP6_ADDR_TENTATIVE_1  0x09 /* 1 probe sent */
+#define IP6_ADDR_TENTATIVE_2  0x0a /* 2 probes sent */
+#define IP6_ADDR_TENTATIVE_3  0x0b /* 3 probes sent */
+#define IP6_ADDR_TENTATIVE_4  0x0c /* 4 probes sent */
+#define IP6_ADDR_TENTATIVE_5  0x0d /* 5 probes sent */
+#define IP6_ADDR_TENTATIVE_6  0x0e /* 6 probes sent */
+#define IP6_ADDR_TENTATIVE_7  0x0f /* 7 probes sent */
+#define IP6_ADDR_VALID        0x10 /* This bit marks an address as valid (preferred or deprecated) */
+#define IP6_ADDR_PREFERRED    0x30
+#define IP6_ADDR_DEPRECATED   0x10 /* Same as VALID (valid but not preferred) */
+#define IP6_ADDR_DUPLICATED   0x40 /* Failed DAD test, not valid */
+
+#define IP6_ADDR_TENTATIVE_COUNT_MASK 0x07 /* 1-7 probes sent */
+
+#define ip6_addr_isinvalid(addr_state) (addr_state == IP6_ADDR_INVALID)
+#define ip6_addr_istentative(addr_state) (addr_state & IP6_ADDR_TENTATIVE)
+#define ip6_addr_isvalid(addr_state) (addr_state & IP6_ADDR_VALID) /* Include valid, preferred, and deprecated. */
+#define ip6_addr_ispreferred(addr_state) (addr_state == IP6_ADDR_PREFERRED)
+#define ip6_addr_isdeprecated(addr_state) (addr_state == IP6_ADDR_DEPRECATED)
+#define ip6_addr_isduplicated(addr_state) (addr_state == IP6_ADDR_DUPLICATED)
+
+#if LWIP_IPV6_ADDRESS_LIFETIMES
+#define IP6_ADDR_LIFE_STATIC   (0)
+#define IP6_ADDR_LIFE_INFINITE (0xffffffffUL)
+#define ip6_addr_life_isstatic(addr_life) ((addr_life) == IP6_ADDR_LIFE_STATIC)
+#define ip6_addr_life_isinfinite(addr_life) ((addr_life) == IP6_ADDR_LIFE_INFINITE)
+#endif /* LWIP_IPV6_ADDRESS_LIFETIMES */
+
+#define ip6_addr_debug_print_parts(debug, a, b, c, d, e, f, g, h) \
+  LWIP_DEBUGF(debug, ("%" X16_F ":%" X16_F ":%" X16_F ":%" X16_F ":%" X16_F ":%" X16_F ":%" X16_F ":%" X16_F, \
+                      a, b, c, d, e, f, g, h))
+#define ip6_addr_debug_print(debug, ipaddr) \
+  ip6_addr_debug_print_parts(debug, \
+                      (u16_t)((ipaddr) != NULL ? IP6_ADDR_BLOCK1(ipaddr) : 0),    \
+                      (u16_t)((ipaddr) != NULL ? IP6_ADDR_BLOCK2(ipaddr) : 0),    \
+                      (u16_t)((ipaddr) != NULL ? IP6_ADDR_BLOCK3(ipaddr) : 0),    \
+                      (u16_t)((ipaddr) != NULL ? IP6_ADDR_BLOCK4(ipaddr) : 0),    \
+                      (u16_t)((ipaddr) != NULL ? IP6_ADDR_BLOCK5(ipaddr) : 0),    \
+                      (u16_t)((ipaddr) != NULL ? IP6_ADDR_BLOCK6(ipaddr) : 0),    \
+                      (u16_t)((ipaddr) != NULL ? IP6_ADDR_BLOCK7(ipaddr) : 0),    \
+                      (u16_t)((ipaddr) != NULL ? IP6_ADDR_BLOCK8(ipaddr) : 0))
+#define ip6_addr_debug_print_val(debug, ipaddr) \
+  ip6_addr_debug_print_parts(debug, \
+                      IP6_ADDR_BLOCK1(&(ipaddr)),    \
+                      IP6_ADDR_BLOCK2(&(ipaddr)),    \
+                      IP6_ADDR_BLOCK3(&(ipaddr)),    \
+                      IP6_ADDR_BLOCK4(&(ipaddr)),    \
+                      IP6_ADDR_BLOCK5(&(ipaddr)),    \
+                      IP6_ADDR_BLOCK6(&(ipaddr)),    \
+                      IP6_ADDR_BLOCK7(&(ipaddr)),    \
+                      IP6_ADDR_BLOCK8(&(ipaddr)))
+
+#define IP6ADDR_STRLEN_MAX    46
+
+int ip6addr_aton(const char *cp, ip6_addr_t *addr);
+/** returns ptr to static buffer; not reentrant! */
+char *ip6addr_ntoa(const ip6_addr_t *addr);
+char *ip6addr_ntoa_r(const ip6_addr_t *addr, char *buf, int buflen);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV6 */
+
+#endif /* LWIP_HDR_IP6_ADDR_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6_frag.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6_frag.h
new file mode 100644
index 00000000000..87e0e86a67d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6_frag.h
@@ -0,0 +1,144 @@
+/**
+ * @file
+ *
+ * IPv6 fragmentation and reassembly.
+ */
+
+/*
+ * Copyright (c) 2010 Inico Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Ivan Delamer <delamer@inicotech.com>
+ *
+ *
+ * Please coordinate changes and requests with Ivan Delamer
+ * <delamer@inicotech.com>
+ */
+#ifndef LWIP_HDR_IP6_FRAG_H
+#define LWIP_HDR_IP6_FRAG_H
+
+#include "lwip/opt.h"
+#include "lwip/pbuf.h"
+#include "lwip/ip6_addr.h"
+#include "lwip/ip6.h"
+#include "lwip/netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#if LWIP_IPV6 && LWIP_IPV6_REASS  /* don't build if not configured for use in lwipopts.h */
+
+/** The IPv6 reassembly timer interval in milliseconds. */
+#define IP6_REASS_TMR_INTERVAL 1000
+
+/** IP6_FRAG_COPYHEADER==1: for platforms where sizeof(void*) > 4, "struct
+ * ip6_reass_helper" is too large to be stored in the IPv6 fragment header, and
+ * will bleed into the header before it, which may be the IPv6 header or an
+ * extension header. This means that for each first fragment packet, we need to
+ * 1) make a copy of some IPv6 header fields (src+dest) that we need later on,
+ * just in case we do overwrite part of the IPv6 header, and 2) make a copy of
+ * the header data that we overwrote, so that we can restore it before either
+ * completing reassembly or sending an ICMPv6 reply. The last part is true even
+ * if this setting is disabled, but if it is enabled, we need to save a bit
+ * more data (up to the size of a pointer) because we overwrite more. */
+#ifndef IPV6_FRAG_COPYHEADER
+#define IPV6_FRAG_COPYHEADER   0
+#endif
+
+/* With IPV6_FRAG_COPYHEADER==1, a helper structure may (or, depending on the
+ * presence of extensions, may not) overwrite part of the IP header. Therefore,
+ * we copy the fields that we need from the IP header for as long as the helper
+ * structure may still be in place. This is easier than temporarily restoring
+ * those fields in the IP header each time we need to perform checks on them. */
+#if IPV6_FRAG_COPYHEADER
+#define IPV6_FRAG_SRC(ipr) ((ipr)->src)
+#define IPV6_FRAG_DEST(ipr) ((ipr)->dest)
+#else /* IPV6_FRAG_COPYHEADER */
+#define IPV6_FRAG_SRC(ipr) ((ipr)->iphdr->src)
+#define IPV6_FRAG_DEST(ipr) ((ipr)->iphdr->dest)
+#endif /* IPV6_FRAG_COPYHEADER */
+
+/** IPv6 reassembly helper struct.
+ * This is exported because memp needs to know the size.
+ */
+struct ip6_reassdata {
+  struct ip6_reassdata *next;
+  struct pbuf *p;
+  struct ip6_hdr *iphdr; /* pointer to the first (original) IPv6 header */
+#if IPV6_FRAG_COPYHEADER
+  ip6_addr_p_t src; /* copy of the source address in the IP header */
+  ip6_addr_p_t dest; /* copy of the destination address in the IP header */
+  /* This buffer (for the part of the original header that we overwrite) will
+   * be slightly oversized, but we cannot compute the exact size from here. */
+  u8_t orig_hdr[sizeof(struct ip6_frag_hdr) + sizeof(void*)];
+#else /* IPV6_FRAG_COPYHEADER */
+  /* In this case we still need the buffer, for sending ICMPv6 replies. */
+  u8_t orig_hdr[sizeof(struct ip6_frag_hdr)];
+#endif /* IPV6_FRAG_COPYHEADER */
+  u32_t identification;
+  u16_t datagram_len;
+  u8_t nexth;
+  u8_t timer;
+#if LWIP_IPV6_SCOPES
+  u8_t src_zone; /* zone of original packet's source address */
+  u8_t dest_zone; /* zone of original packet's destination address */
+#endif /* LWIP_IPV6_SCOPES */
+};
+
+#define ip6_reass_init() /* Compatibility define */
+void ip6_reass_tmr(void);
+struct pbuf *ip6_reass(struct pbuf *p);
+
+#endif /* LWIP_IPV6 && LWIP_IPV6_REASS */
+
+#if LWIP_IPV6 && LWIP_IPV6_FRAG  /* don't build if not configured for use in lwipopts.h */
+
+#ifndef LWIP_PBUF_CUSTOM_REF_DEFINED
+#define LWIP_PBUF_CUSTOM_REF_DEFINED
+/** A custom pbuf that holds a reference to another pbuf, which is freed
+ * when this custom pbuf is freed. This is used to create a custom PBUF_REF
+ * that points into the original pbuf. */
+struct pbuf_custom_ref {
+  /** 'base class' */
+  struct pbuf_custom pc;
+  /** pointer to the original pbuf that is referenced */
+  struct pbuf *original;
+};
+#endif /* LWIP_PBUF_CUSTOM_REF_DEFINED */
+
+err_t ip6_frag(struct pbuf *p, struct netif *netif, const ip6_addr_t *dest);
+
+#endif /* LWIP_IPV6 && LWIP_IPV6_FRAG */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_IP6_FRAG_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6_zone.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6_zone.h
new file mode 100644
index 00000000000..525790e67d1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip6_zone.h
@@ -0,0 +1,304 @@
+/**
+ * @file
+ *
+ * IPv6 address scopes, zones, and scoping policy.
+ *
+ * This header provides the means to implement support for IPv6 address scopes,
+ * as per RFC 4007. An address scope can be either global or more constrained.
+ * In lwIP, we say that an address "has a scope" or "is scoped" when its scope
+ * is constrained, in which case the address is meaningful only in a specific
+ * "zone." For unicast addresses, only link-local addresses have a scope; in
+ * that case, the scope is the link. For multicast addresses, there are various
+ * scopes defined by RFC 4007 and others. For any constrained scope, a system
+ * must establish a (potentially one-to-many) mapping between zones and local
+ * interfaces. For example, a link-local address is valid on only one link (its
+ * zone). That link may be attached to one or more local interfaces. The
+ * decisions on which scopes are constrained and the mapping between zones and
+ * interfaces is together what we refer to as the "scoping policy" - more on
+ * this in a bit.
+ *
+ * In lwIP, each IPv6 address has an associated zone index. This zone index may
+ * be set to "no zone" (IP6_NO_ZONE, 0) or an actual zone. We say that an
+ * address "has a zone" or "is zoned" when its zone index is *not* set to "no
+ * zone." In lwIP, in principle, each address should be "properly zoned," which
+ * means that if the address has a zone if and only if has a scope. As such, it
+ * is a rule that an unscoped (e.g., global) address must never have a zone.
+ * Even though one could argue that there is always one zone even for global
+ * scopes, this rule exists for implementation simplicity. Violation of the
+ * rule will trigger assertions or otherwise result in undesired behavior.
+ *
+ * Backward compatibility prevents us from requiring that applications always
+ * provide properly zoned addresses. We do enforce the rule that the in the
+ * lwIP link layer (everything below netif->output_ip6() and in particular ND6)
+ * *all* addresses are properly zoned. Thus, on the output paths down the
+ * stack, various places deal with the case of addresses that lack a zone.
+ * Some of them are best-effort for efficiency (e.g. the PCB bind and connect
+ * API calls' attempts to add missing zones); ultimately the IPv6 output
+ * handler (@ref ip6_output_if_src) will set a zone if necessary.
+ *
+ * Aside from dealing with scoped addresses lacking a zone, a proper IPv6
+ * implementation must also ensure that a packet with a scoped source and/or
+ * destination address does not leave its zone. This is currently implemented
+ * in the input and forward functions. However, for output, these checks are
+ * deliberately omitted in order to keep the implementation lightweight. The
+ * routing algorithm in @ref ip6_route will take decisions such that it will
+ * not cause zone violations unless the application sets bad addresses, though.
+ *
+ * In terms of scoping policy, lwIP implements the default policy from RFC 4007
+ * using macros in this file. This policy considers link-local unicast
+ * addresses and (only) interface-local and link-local multicast addresses as
+ * having a scope. For all these addresses, the zone is equal to the interface.
+ * As shown below in this file, it is possible to implement a custom policy.
+ */
+
+/*
+ * Copyright (c) 2017 The MINIX 3 Project.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: David van Moolenbroek <david@minix3.org>
+ *
+ */
+#ifndef LWIP_HDR_IP6_ZONE_H
+#define LWIP_HDR_IP6_ZONE_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup ip6_zones IPv6 Zones
+ * @ingroup ip6
+ * @{
+ */
+
+#if LWIP_IPV6  /* don't build if not configured for use in lwipopts.h */
+
+/** Identifier for "no zone". */
+#define IP6_NO_ZONE 0
+
+#if LWIP_IPV6_SCOPES
+
+/** Zone initializer for static IPv6 address initialization, including comma. */
+#define IPADDR6_ZONE_INIT , IP6_NO_ZONE
+
+/** Return the zone index of the given IPv6 address; possibly "no zone". */
+#define ip6_addr_zone(ip6addr) ((ip6addr)->zone)
+
+/** Does the given IPv6 address have a zone set? (0/1) */
+#define ip6_addr_has_zone(ip6addr) (ip6_addr_zone(ip6addr) != IP6_NO_ZONE)
+
+/** Set the zone field of an IPv6 address to a particular value. */
+#define ip6_addr_set_zone(ip6addr, zone_idx) ((ip6addr)->zone = (zone_idx))
+
+/** Clear the zone field of an IPv6 address, setting it to "no zone". */
+#define ip6_addr_clear_zone(ip6addr) ((ip6addr)->zone = IP6_NO_ZONE)
+
+/** Copy the zone field from the second IPv6 address to the first one. */
+#define ip6_addr_copy_zone(ip6addr1, ip6addr2) ((ip6addr1).zone = (ip6addr2).zone)
+
+/** Is the zone field of the given IPv6 address equal to the given zone index? (0/1) */
+#define ip6_addr_equals_zone(ip6addr, zone_idx) ((ip6addr)->zone == (zone_idx))
+
+/** Are the zone fields of the given IPv6 addresses equal? (0/1)
+ * This macro must only be used on IPv6 addresses of the same scope. */
+#define ip6_addr_cmp_zone(ip6addr1, ip6addr2) ((ip6addr1)->zone == (ip6addr2)->zone)
+
+/** Symbolic constants for the 'type' parameters in some of the macros.
+ * These exist for efficiency only, allowing the macros to avoid certain tests
+ * when the address is known not to be of a certain type. Dead code elimination
+ * will do the rest. IP6_MULTICAST is supported but currently not optimized.
+ * @see ip6_addr_has_scope, ip6_addr_assign_zone, ip6_addr_lacks_zone.
+ */
+enum lwip_ipv6_scope_type
+{
+  /** Unknown */
+  IP6_UNKNOWN   = 0,
+  /** Unicast */
+  IP6_UNICAST   = 1,
+  /** Multicast */
+  IP6_MULTICAST = 2
+};
+
+/** IPV6_CUSTOM_SCOPES: together, the following three macro definitions,
+ * @ref ip6_addr_has_scope, @ref ip6_addr_assign_zone, and
+ * @ref ip6_addr_test_zone, completely define the lwIP scoping policy.
+ * The definitions below implement the default policy from RFC 4007 Sec. 6.
+ * Should an implementation desire to implement a different policy, it can
+ * define IPV6_CUSTOM_SCOPES to 1 and supply its own definitions for the three
+ * macros instead.
+ */
+#ifndef IPV6_CUSTOM_SCOPES
+#define IPV6_CUSTOM_SCOPES 0
+#endif /* !IPV6_CUSTOM_SCOPES */
+
+#if !IPV6_CUSTOM_SCOPES
+
+/**
+ * Determine whether an IPv6 address has a constrained scope, and as such is
+ * meaningful only if accompanied by a zone index to identify the scope's zone.
+ * The given address type may be used to eliminate at compile time certain
+ * checks that will evaluate to false at run time anyway.
+ *
+ * This default implementation follows the default model of RFC 4007, where
+ * only interface-local and link-local scopes are defined.
+ *
+ * Even though the unicast loopback address does have an implied link-local
+ * scope, in this implementation it does not have an explicitly assigned zone
+ * index. As such it should not be tested for in this macro.
+ *
+ * @param ip6addr the IPv6 address (const); only its address part is examined.
+ * @param type address type; see @ref lwip_ipv6_scope_type.
+ * @return 1 if the address has a constrained scope, 0 if it does not.
+ */
+#define ip6_addr_has_scope(ip6addr, type) \
+  (ip6_addr_islinklocal(ip6addr) || (((type) != IP6_UNICAST) && \
+   (ip6_addr_ismulticast_iflocal(ip6addr) || \
+    ip6_addr_ismulticast_linklocal(ip6addr))))
+
+/**
+ * Assign a zone index to an IPv6 address, based on a network interface. If the
+ * given address has a scope, the assigned zone index is that scope's zone of
+ * the given netif; otherwise, the assigned zone index is "no zone".
+ *
+ * This default implementation follows the default model of RFC 4007, where
+ * only interface-local and link-local scopes are defined, and the zone index
+ * of both of those scopes always equals the index of the network interface.
+ * As such, this default implementation need not distinguish between different
+ * constrained scopes when assigning the zone.
+ *
+ * @param ip6addr the IPv6 address; its address part is examined, and its zone
+ *                index is assigned.
+ * @param type address type; see @ref lwip_ipv6_scope_type.
+ * @param netif the network interface (const).
+ */
+#define ip6_addr_assign_zone(ip6addr, type, netif) \
+    (ip6_addr_set_zone((ip6addr), \
+      ip6_addr_has_scope((ip6addr), (type)) ? netif_get_index(netif) : 0))
+
+/**
+ * Test whether an IPv6 address is "zone-compatible" with a network interface.
+ * That is, test whether the network interface is part of the zone associated
+ * with the address. For efficiency, this macro is only ever called if the
+ * given address is either scoped or zoned, and thus, it need not test this.
+ * If an address is scoped but not zoned, or zoned and not scoped, it is
+ * considered not zone-compatible with any netif.
+ *
+ * This default implementation follows the default model of RFC 4007, where
+ * only interface-local and link-local scopes are defined, and the zone index
+ * of both of those scopes always equals the index of the network interface.
+ * As such, there is always only one matching netif for a specific zone index,
+ * but all call sites of this macro currently support multiple matching netifs
+ * as well (at no additional expense in the common case).
+ *
+ * @param ip6addr the IPv6 address (const).
+ * @param netif the network interface (const).
+ * @return 1 if the address is scope-compatible with the netif, 0 if not.
+ */
+#define ip6_addr_test_zone(ip6addr, netif) \
+    (ip6_addr_equals_zone((ip6addr), netif_get_index(netif)))
+
+#endif /* !IPV6_CUSTOM_SCOPES */
+
+/** Does the given IPv6 address have a scope, and as such should also have a
+ * zone to be meaningful, but does not actually have a zone? (0/1) */
+#define ip6_addr_lacks_zone(ip6addr, type) \
+    (!ip6_addr_has_zone(ip6addr) && ip6_addr_has_scope((ip6addr), (type)))
+
+/**
+ * Try to select a zone for a scoped address that does not yet have a zone.
+ * Called from PCB bind and connect routines, for two reasons: 1) to save on
+ * this (relatively expensive) selection for every individual packet route
+ * operation and 2) to allow the application to obtain the selected zone from
+ * the PCB as is customary for e.g. getsockname/getpeername BSD socket calls.
+ *
+ * Ideally, callers would always supply a properly zoned address, in which case
+ * this function would not be needed. It exists both for compatibility with the
+ * BSD socket API (which accepts zoneless destination addresses) and for
+ * backward compatibility with pre-scoping lwIP code.
+ *
+ * It may be impossible to select a zone, e.g. if there are no netifs.  In that
+ * case, the address's zone field will be left as is.
+ *
+ * @param dest the IPv6 address for which to select and set a zone.
+ * @param src source IPv6 address (const); may be equal to dest.
+ */
+#define ip6_addr_select_zone(dest, src) do { struct netif *selected_netif; \
+  selected_netif = ip6_route((src), (dest)); \
+  if (selected_netif != NULL) { \
+    ip6_addr_assign_zone((dest), IP6_UNKNOWN, selected_netif); \
+  } } while (0)
+
+/**
+ * @}
+ */
+
+#else /* LWIP_IPV6_SCOPES */
+
+#define IPADDR6_ZONE_INIT
+#define ip6_addr_zone(ip6addr) (IP6_NO_ZONE)
+#define ip6_addr_has_zone(ip6addr) (0)
+#define ip6_addr_set_zone(ip6addr, zone_idx)
+#define ip6_addr_clear_zone(ip6addr)
+#define ip6_addr_copy_zone(ip6addr1, ip6addr2)
+#define ip6_addr_equals_zone(ip6addr, zone_idx) (1)
+#define ip6_addr_cmp_zone(ip6addr1, ip6addr2) (1)
+#define IPV6_CUSTOM_SCOPES 0
+#define ip6_addr_has_scope(ip6addr, type) (0)
+#define ip6_addr_assign_zone(ip6addr, type, netif)
+#define ip6_addr_test_zone(ip6addr, netif) (1)
+#define ip6_addr_lacks_zone(ip6addr, type) (0)
+#define ip6_addr_select_zone(ip6addr, src)
+
+#endif /* LWIP_IPV6_SCOPES */
+
+#if LWIP_IPV6_SCOPES && LWIP_IPV6_SCOPES_DEBUG
+
+/** Verify that the given IPv6 address is properly zoned. */
+#define IP6_ADDR_ZONECHECK(ip6addr) LWIP_ASSERT("IPv6 zone check failed", \
+    ip6_addr_has_scope(ip6addr, IP6_UNKNOWN) == ip6_addr_has_zone(ip6addr))
+
+/** Verify that the given IPv6 address is properly zoned for the given netif. */
+#define IP6_ADDR_ZONECHECK_NETIF(ip6addr, netif) LWIP_ASSERT("IPv6 netif zone check failed", \
+    ip6_addr_has_scope(ip6addr, IP6_UNKNOWN) ? \
+    (ip6_addr_has_zone(ip6addr) && \
+     (((netif) == NULL) || ip6_addr_test_zone((ip6addr), (netif)))) : \
+    !ip6_addr_has_zone(ip6addr))
+
+#else /* LWIP_IPV6_SCOPES && LWIP_IPV6_SCOPES_DEBUG */
+
+#define IP6_ADDR_ZONECHECK(ip6addr)
+#define IP6_ADDR_ZONECHECK_NETIF(ip6addr, netif)
+
+#endif /* LWIP_IPV6_SCOPES && LWIP_IPV6_SCOPES_DEBUG */
+
+#endif /* LWIP_IPV6 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_IP6_ZONE_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip_addr.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip_addr.h
new file mode 100644
index 00000000000..b85f8377238
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/ip_addr.h
@@ -0,0 +1,443 @@
+/**
+ * @file
+ * IP address API (common IPv4 and IPv6)
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_IP_ADDR_H
+#define LWIP_HDR_IP_ADDR_H
+
+#include "lwip/opt.h"
+#include "lwip/def.h"
+
+#include "lwip/ip4_addr.h"
+#include "lwip/ip6_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @ingroup ipaddr
+ * IP address types for use in ip_addr_t.type member.
+ * @see tcp_new_ip_type(), udp_new_ip_type(), raw_new_ip_type().
+ */
+enum lwip_ip_addr_type {
+  /** IPv4 */
+  IPADDR_TYPE_V4 =   0U,
+  /** IPv6 */
+  IPADDR_TYPE_V6 =   6U,
+  /** IPv4+IPv6 ("dual-stack") */
+  IPADDR_TYPE_ANY = 46U
+};
+
+#if LWIP_IPV4 && LWIP_IPV6
+/**
+ * @ingroup ipaddr
+ * A union struct for both IP version's addresses.
+ * ATTENTION: watch out for its size when adding IPv6 address scope!
+ */
+typedef struct ip_addr {
+  union {
+    ip6_addr_t ip6;
+    ip4_addr_t ip4;
+  } u_addr;
+  /** @ref lwip_ip_addr_type */
+  u8_t type;
+} ip_addr_t;
+
+extern const ip_addr_t ip_addr_any_type;
+
+/** @ingroup ip4addr */
+#define IPADDR4_INIT(u32val)          { { { { u32val, 0ul, 0ul, 0ul } IPADDR6_ZONE_INIT } }, IPADDR_TYPE_V4 }
+/** @ingroup ip4addr */
+#define IPADDR4_INIT_BYTES(a,b,c,d)   IPADDR4_INIT(PP_HTONL(LWIP_MAKEU32(a,b,c,d)))
+
+/** @ingroup ip6addr */
+#define IPADDR6_INIT(a, b, c, d)      { { { { a, b, c, d } IPADDR6_ZONE_INIT } }, IPADDR_TYPE_V6 }
+/** @ingroup ip6addr */
+#define IPADDR6_INIT_HOST(a, b, c, d) { { { { PP_HTONL(a), PP_HTONL(b), PP_HTONL(c), PP_HTONL(d) } IPADDR6_ZONE_INIT } }, IPADDR_TYPE_V6 }
+
+/** @ingroup ipaddr */
+#define IP_IS_ANY_TYPE_VAL(ipaddr)    (IP_GET_TYPE(&ipaddr) == IPADDR_TYPE_ANY)
+/** @ingroup ipaddr */
+#define IPADDR_ANY_TYPE_INIT          { { { { 0ul, 0ul, 0ul, 0ul } IPADDR6_ZONE_INIT } }, IPADDR_TYPE_ANY }
+
+/** @ingroup ip4addr */
+#define IP_IS_V4_VAL(ipaddr)          (IP_GET_TYPE(&ipaddr) == IPADDR_TYPE_V4)
+/** @ingroup ip6addr */
+#define IP_IS_V6_VAL(ipaddr)          (IP_GET_TYPE(&ipaddr) == IPADDR_TYPE_V6)
+/** @ingroup ip4addr */
+#define IP_IS_V4(ipaddr)              (((ipaddr) == NULL) || IP_IS_V4_VAL(*(ipaddr)))
+/** @ingroup ip6addr */
+#define IP_IS_V6(ipaddr)              (((ipaddr) != NULL) && IP_IS_V6_VAL(*(ipaddr)))
+
+#define IP_SET_TYPE_VAL(ipaddr, iptype) do { (ipaddr).type = (iptype); }while(0)
+#define IP_SET_TYPE(ipaddr, iptype)     do { if((ipaddr) != NULL) { IP_SET_TYPE_VAL(*(ipaddr), iptype); }}while(0)
+#define IP_GET_TYPE(ipaddr)           ((ipaddr)->type)
+
+#define IP_ADDR_RAW_SIZE(ipaddr)      (IP_GET_TYPE(&ipaddr) == IPADDR_TYPE_V4 ? sizeof(ip4_addr_t) : sizeof(ip6_addr_t))
+
+#define IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ipaddr) (IP_GET_TYPE(&pcb->local_ip) == IP_GET_TYPE(ipaddr))
+#define IP_ADDR_PCB_VERSION_MATCH(pcb, ipaddr) (IP_IS_ANY_TYPE_VAL(pcb->local_ip) || IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ipaddr))
+
+/** @ingroup ip6addr
+ * Convert generic ip address to specific protocol version
+ */
+#define ip_2_ip6(ipaddr)   (&((ipaddr)->u_addr.ip6))
+/** @ingroup ip4addr
+ * Convert generic ip address to specific protocol version
+ */
+#define ip_2_ip4(ipaddr)   (&((ipaddr)->u_addr.ip4))
+
+/** @ingroup ip4addr */
+#define IP_ADDR4(ipaddr,a,b,c,d)      do { IP4_ADDR(ip_2_ip4(ipaddr),a,b,c,d); \
+                                           IP_SET_TYPE_VAL(*(ipaddr), IPADDR_TYPE_V4); } while(0)
+/** @ingroup ip6addr */
+#define IP_ADDR6(ipaddr,i0,i1,i2,i3)  do { IP6_ADDR(ip_2_ip6(ipaddr),i0,i1,i2,i3); \
+                                           IP_SET_TYPE_VAL(*(ipaddr), IPADDR_TYPE_V6); } while(0)
+/** @ingroup ip6addr */
+#define IP_ADDR6_HOST(ipaddr,i0,i1,i2,i3)  IP_ADDR6(ipaddr,PP_HTONL(i0),PP_HTONL(i1),PP_HTONL(i2),PP_HTONL(i3))
+
+#define ip_clear_no4(ipaddr)  do { ip_2_ip6(ipaddr)->addr[1] = \
+                                   ip_2_ip6(ipaddr)->addr[2] = \
+                                   ip_2_ip6(ipaddr)->addr[3] = 0; \
+                                   ip6_addr_clear_zone(ip_2_ip6(ipaddr)); }while(0)
+
+#if ESP_IPV6
+#define IP_V6_EQ_PART(ipaddr, WORD, VAL) (ip_2_ip6(ipaddr)->addr[WORD] == htonl(VAL))
+#define IP_IS_V4MAPPEDV6(ipaddr) (IP_IS_V6(ipaddr) && IP_V6_EQ_PART(ipaddr, 0, 0) && IP_V6_EQ_PART(ipaddr, 1, 0) && IP_V6_EQ_PART(ipaddr, 2, 0x0000FFFF))
+#endif
+
+/** @ingroup ipaddr */
+#define ip_addr_copy(dest, src)      do{ IP_SET_TYPE_VAL(dest, IP_GET_TYPE(&src)); if(IP_IS_V6_VAL(src)){ \
+  ip6_addr_copy(*ip_2_ip6(&(dest)), *ip_2_ip6(&(src))); }else{ \
+  ip4_addr_copy(*ip_2_ip4(&(dest)), *ip_2_ip4(&(src))); ip_clear_no4(&dest); }}while(0)
+/** @ingroup ip6addr */
+#define ip_addr_copy_from_ip6(dest, src)      do{ \
+  ip6_addr_copy(*ip_2_ip6(&(dest)), src); IP_SET_TYPE_VAL(dest, IPADDR_TYPE_V6); }while(0)
+/** @ingroup ip6addr */
+#define ip_addr_copy_from_ip6_packed(dest, src)      do{ \
+  ip6_addr_copy_from_packed(*ip_2_ip6(&(dest)), src); IP_SET_TYPE_VAL(dest, IPADDR_TYPE_V6); }while(0)
+/** @ingroup ip4addr */
+#define ip_addr_copy_from_ip4(dest, src)      do{ \
+  ip4_addr_copy(*ip_2_ip4(&(dest)), src); IP_SET_TYPE_VAL(dest, IPADDR_TYPE_V4); ip_clear_no4(&dest); }while(0)
+/** @ingroup ip4addr */
+#define ip_addr_set_ip4_u32(ipaddr, val)  do{if(ipaddr){ip4_addr_set_u32(ip_2_ip4(ipaddr), val); \
+  IP_SET_TYPE(ipaddr, IPADDR_TYPE_V4); ip_clear_no4(ipaddr); }}while(0)
+/** @ingroup ip4addr */
+#define ip_addr_set_ip4_u32_val(ipaddr, val)  do{ ip4_addr_set_u32(ip_2_ip4(&(ipaddr)), val); \
+  IP_SET_TYPE_VAL(ipaddr, IPADDR_TYPE_V4); ip_clear_no4(&ipaddr); }while(0)
+/** @ingroup ip4addr */
+#define ip_addr_get_ip4_u32(ipaddr)  (((ipaddr) && IP_IS_V4(ipaddr)) ? \
+  ip4_addr_get_u32(ip_2_ip4(ipaddr)) : 0)
+/** @ingroup ipaddr */
+#define ip_addr_set(dest, src) do{ IP_SET_TYPE(dest, IP_GET_TYPE(src)); if(IP_IS_V6(src)){ \
+  ip6_addr_set(ip_2_ip6(dest), ip_2_ip6(src)); }else{ \
+  ip4_addr_set(ip_2_ip4(dest), ip_2_ip4(src)); ip_clear_no4(dest); }}while(0)
+/** @ingroup ipaddr */
+#define ip_addr_set_ipaddr(dest, src) ip_addr_set(dest, src)
+/** @ingroup ipaddr */
+#define ip_addr_set_zero(ipaddr)     do{ \
+  ip6_addr_set_zero(ip_2_ip6(ipaddr)); IP_SET_TYPE(ipaddr, 0); }while(0)
+/** @ingroup ip5addr */
+#define ip_addr_set_zero_ip4(ipaddr)     do{ \
+  ip6_addr_set_zero(ip_2_ip6(ipaddr)); IP_SET_TYPE(ipaddr, IPADDR_TYPE_V4); }while(0)
+/** @ingroup ip6addr */
+#define ip_addr_set_zero_ip6(ipaddr)     do{ \
+  ip6_addr_set_zero(ip_2_ip6(ipaddr)); IP_SET_TYPE(ipaddr, IPADDR_TYPE_V6); }while(0)
+/** @ingroup ipaddr */
+#define ip_addr_set_any(is_ipv6, ipaddr)      do{if(is_ipv6){ \
+  ip6_addr_set_any(ip_2_ip6(ipaddr)); IP_SET_TYPE(ipaddr, IPADDR_TYPE_V6); }else{ \
+  ip4_addr_set_any(ip_2_ip4(ipaddr)); IP_SET_TYPE(ipaddr, IPADDR_TYPE_V4); ip_clear_no4(ipaddr); }}while(0)
+/** @ingroup ipaddr */
+#define ip_addr_set_any_val(is_ipv6, ipaddr)      do{if(is_ipv6){ \
+  ip6_addr_set_any(ip_2_ip6(&(ipaddr))); IP_SET_TYPE_VAL(ipaddr, IPADDR_TYPE_V6); }else{ \
+  ip4_addr_set_any(ip_2_ip4(&(ipaddr))); IP_SET_TYPE_VAL(ipaddr, IPADDR_TYPE_V4); ip_clear_no4(&ipaddr); }}while(0)
+/** @ingroup ipaddr */
+#define ip_addr_set_loopback(is_ipv6, ipaddr) do{if(is_ipv6){ \
+  ip6_addr_set_loopback(ip_2_ip6(ipaddr)); IP_SET_TYPE(ipaddr, IPADDR_TYPE_V6); }else{ \
+  ip4_addr_set_loopback(ip_2_ip4(ipaddr)); IP_SET_TYPE(ipaddr, IPADDR_TYPE_V4); ip_clear_no4(ipaddr); }}while(0)
+/** @ingroup ipaddr */
+#define ip_addr_set_loopback_val(is_ipv6, ipaddr) do{if(is_ipv6){ \
+  ip6_addr_set_loopback(ip_2_ip6(&(ipaddr))); IP_SET_TYPE_VAL(ipaddr, IPADDR_TYPE_V6); }else{ \
+  ip4_addr_set_loopback(ip_2_ip4(&(ipaddr))); IP_SET_TYPE_VAL(ipaddr, IPADDR_TYPE_V4); ip_clear_no4(&ipaddr); }}while(0)
+/** @ingroup ipaddr */
+#define ip_addr_set_hton(dest, src)  do{if(IP_IS_V6(src)){ \
+  ip6_addr_set_hton(ip_2_ip6(dest), ip_2_ip6(src)); IP_SET_TYPE(dest, IPADDR_TYPE_V6); }else{ \
+  ip4_addr_set_hton(ip_2_ip4(dest), ip_2_ip4(src)); IP_SET_TYPE(dest, IPADDR_TYPE_V4); ip_clear_no4(ipaddr); }}while(0)
+/** @ingroup ipaddr */
+#define ip_addr_get_network(target, host, netmask) do{if(IP_IS_V6(host)){ \
+  ip4_addr_set_zero(ip_2_ip4(target)); IP_SET_TYPE(target, IPADDR_TYPE_V6); } else { \
+  ip4_addr_get_network(ip_2_ip4(target), ip_2_ip4(host), ip_2_ip4(netmask)); IP_SET_TYPE(target, IPADDR_TYPE_V4); }}while(0)
+/** @ingroup ipaddr */
+#define ip_addr_netcmp(addr1, addr2, mask) ((IP_IS_V6(addr1) && IP_IS_V6(addr2)) ? \
+  0 : \
+  ip4_addr_netcmp(ip_2_ip4(addr1), ip_2_ip4(addr2), mask))
+/** @ingroup ipaddr */
+#define ip_addr_cmp(addr1, addr2)    ((IP_GET_TYPE(addr1) != IP_GET_TYPE(addr2)) ? 0 : (IP_IS_V6_VAL(*(addr1)) ? \
+  ip6_addr_cmp(ip_2_ip6(addr1), ip_2_ip6(addr2)) : \
+  ip4_addr_cmp(ip_2_ip4(addr1), ip_2_ip4(addr2))))
+/** @ingroup ipaddr */
+#define ip_addr_cmp_zoneless(addr1, addr2)    ((IP_GET_TYPE(addr1) != IP_GET_TYPE(addr2)) ? 0 : (IP_IS_V6_VAL(*(addr1)) ? \
+  ip6_addr_cmp_zoneless(ip_2_ip6(addr1), ip_2_ip6(addr2)) : \
+  ip4_addr_cmp(ip_2_ip4(addr1), ip_2_ip4(addr2))))
+/** @ingroup ipaddr */
+#define ip_addr_isany(ipaddr)        (((ipaddr) == NULL) ? 1 : ((IP_IS_V6(ipaddr)) ? \
+  ip6_addr_isany(ip_2_ip6(ipaddr)) : \
+  ip4_addr_isany(ip_2_ip4(ipaddr))))
+/** @ingroup ipaddr */
+#define ip_addr_isany_val(ipaddr)        ((IP_IS_V6_VAL(ipaddr)) ? \
+  ip6_addr_isany_val(*ip_2_ip6(&(ipaddr))) : \
+  ip4_addr_isany_val(*ip_2_ip4(&(ipaddr))))
+/** @ingroup ipaddr */
+#define ip_addr_isbroadcast(ipaddr, netif) ((IP_IS_V6(ipaddr)) ? \
+  0 : \
+  ip4_addr_isbroadcast(ip_2_ip4(ipaddr), netif))
+/** @ingroup ipaddr */
+#define ip_addr_ismulticast(ipaddr)  ((IP_IS_V6(ipaddr)) ? \
+  ip6_addr_ismulticast(ip_2_ip6(ipaddr)) : \
+  ip4_addr_ismulticast(ip_2_ip4(ipaddr)))
+/** @ingroup ipaddr */
+#define ip_addr_isloopback(ipaddr)  ((IP_IS_V6(ipaddr)) ? \
+  ip6_addr_isloopback(ip_2_ip6(ipaddr)) : \
+  ip4_addr_isloopback(ip_2_ip4(ipaddr)))
+/** @ingroup ipaddr */
+#define ip_addr_islinklocal(ipaddr)  ((IP_IS_V6(ipaddr)) ? \
+  ip6_addr_islinklocal(ip_2_ip6(ipaddr)) : \
+  ip4_addr_islinklocal(ip_2_ip4(ipaddr)))
+#define ip_addr_debug_print(debug, ipaddr) do { if(IP_IS_V6(ipaddr)) { \
+  ip6_addr_debug_print(debug, ip_2_ip6(ipaddr)); } else { \
+  ip4_addr_debug_print(debug, ip_2_ip4(ipaddr)); }}while(0)
+#define ip_addr_debug_print_val(debug, ipaddr) do { if(IP_IS_V6_VAL(ipaddr)) { \
+  ip6_addr_debug_print_val(debug, *ip_2_ip6(&(ipaddr))); } else { \
+  ip4_addr_debug_print_val(debug, *ip_2_ip4(&(ipaddr))); }}while(0)
+char *ipaddr_ntoa(const ip_addr_t *addr);
+char *ipaddr_ntoa_r(const ip_addr_t *addr, char *buf, int buflen);
+int ipaddr_aton(const char *cp, ip_addr_t *addr);
+
+/** @ingroup ipaddr */
+#define IPADDR_STRLEN_MAX   IP6ADDR_STRLEN_MAX
+
+/** @ingroup ipaddr */
+#define ip4_2_ipv4_mapped_ipv6(ip6addr, ip4addr) do { \
+  (ip6addr)->addr[3] = (ip4addr)->addr; \
+  (ip6addr)->addr[2] = PP_HTONL(0x0000FFFFUL); \
+  (ip6addr)->addr[1] = 0; \
+  (ip6addr)->addr[0] = 0; \
+  ip6_addr_clear_zone(ip6addr); } while(0);
+
+/** @ingroup ipaddr */
+#define unmap_ipv4_mapped_ipv6(ip4addr, ip6addr) \
+  (ip4addr)->addr = (ip6addr)->addr[3];
+
+#define IP46_ADDR_ANY(type) (((type) == IPADDR_TYPE_V6)? IP6_ADDR_ANY : IP4_ADDR_ANY)
+
+#else /* LWIP_IPV4 && LWIP_IPV6 */
+
+#define IP_ADDR_PCB_VERSION_MATCH(addr, pcb)          1
+#define IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ipaddr)  1
+
+#define ip_addr_set_any_val(is_ipv6, ipaddr)          ip_addr_set_any(is_ipv6, &(ipaddr))
+#define ip_addr_set_loopback_val(is_ipv6, ipaddr)     ip_addr_set_loopback(is_ipv6, &(ipaddr))
+
+#if LWIP_IPV4
+
+typedef ip4_addr_t ip_addr_t;
+#define IPADDR4_INIT(u32val)                    { u32val }
+#define IPADDR4_INIT_BYTES(a,b,c,d)             IPADDR4_INIT(PP_HTONL(LWIP_MAKEU32(a,b,c,d)))
+#define IP_IS_V4_VAL(ipaddr)                    1
+#define IP_IS_V6_VAL(ipaddr)                    0
+#define IP_IS_V4(ipaddr)                        1
+#define IP_IS_V6(ipaddr)                        0
+#define IP_IS_ANY_TYPE_VAL(ipaddr)              0
+#define IP_SET_TYPE_VAL(ipaddr, iptype)
+#define IP_SET_TYPE(ipaddr, iptype)
+#define IP_GET_TYPE(ipaddr)                     IPADDR_TYPE_V4
+#define IP_ADDR_RAW_SIZE(ipaddr)                sizeof(ip4_addr_t)
+#define ip_2_ip4(ipaddr)                        (ipaddr)
+#define IP_ADDR4(ipaddr,a,b,c,d)                IP4_ADDR(ipaddr,a,b,c,d)
+
+#define ip_addr_copy(dest, src)                 ip4_addr_copy(dest, src)
+#define ip_addr_copy_from_ip4(dest, src)        ip4_addr_copy(dest, src)
+#define ip_addr_set_ip4_u32(ipaddr, val)        ip4_addr_set_u32(ip_2_ip4(ipaddr), val)
+#define ip_addr_set_ip4_u32_val(ipaddr, val)    ip_addr_set_ip4_u32(&(ipaddr), val)
+#define ip_addr_get_ip4_u32(ipaddr)             ip4_addr_get_u32(ip_2_ip4(ipaddr))
+#define ip_addr_set(dest, src)                  ip4_addr_set(dest, src)
+#define ip_addr_set_ipaddr(dest, src)           ip4_addr_set(dest, src)
+#define ip_addr_set_zero(ipaddr)                ip4_addr_set_zero(ipaddr)
+#define ip_addr_set_zero_ip4(ipaddr)            ip4_addr_set_zero(ipaddr)
+#define ip_addr_set_any(is_ipv6, ipaddr)        ip4_addr_set_any(ipaddr)
+#define ip_addr_set_loopback(is_ipv6, ipaddr)   ip4_addr_set_loopback(ipaddr)
+#define ip_addr_set_hton(dest, src)             ip4_addr_set_hton(dest, src)
+#define ip_addr_get_network(target, host, mask) ip4_addr_get_network(target, host, mask)
+#define ip_addr_netcmp(addr1, addr2, mask)      ip4_addr_netcmp(addr1, addr2, mask)
+#define ip_addr_cmp(addr1, addr2)               ip4_addr_cmp(addr1, addr2)
+#define ip_addr_isany(ipaddr)                   ip4_addr_isany(ipaddr)
+#define ip_addr_isany_val(ipaddr)               ip4_addr_isany_val(ipaddr)
+#define ip_addr_isloopback(ipaddr)              ip4_addr_isloopback(ipaddr)
+#define ip_addr_islinklocal(ipaddr)             ip4_addr_islinklocal(ipaddr)
+#define ip_addr_isbroadcast(addr, netif)        ip4_addr_isbroadcast(addr, netif)
+#define ip_addr_ismulticast(ipaddr)             ip4_addr_ismulticast(ipaddr)
+#define ip_addr_debug_print(debug, ipaddr)      ip4_addr_debug_print(debug, ipaddr)
+#define ip_addr_debug_print_val(debug, ipaddr)  ip4_addr_debug_print_val(debug, ipaddr)
+#define ipaddr_ntoa(ipaddr)                     ip4addr_ntoa(ipaddr)
+#define ipaddr_ntoa_r(ipaddr, buf, buflen)      ip4addr_ntoa_r(ipaddr, buf, buflen)
+#define ipaddr_aton(cp, addr)                   ip4addr_aton(cp, addr)
+
+#define IPADDR_STRLEN_MAX   IP4ADDR_STRLEN_MAX
+
+#define IP46_ADDR_ANY(type) (IP4_ADDR_ANY)
+
+#else /* LWIP_IPV4 */
+
+typedef ip6_addr_t ip_addr_t;
+#define IPADDR6_INIT(a, b, c, d)                { { a, b, c, d } IPADDR6_ZONE_INIT }
+#define IPADDR6_INIT_HOST(a, b, c, d)           { { PP_HTONL(a), PP_HTONL(b), PP_HTONL(c), PP_HTONL(d) } IPADDR6_ZONE_INIT }
+#define IP_IS_V4_VAL(ipaddr)                    0
+#define IP_IS_V6_VAL(ipaddr)                    1
+#define IP_IS_V4(ipaddr)                        0
+#define IP_IS_V6(ipaddr)                        1
+#define IP_IS_ANY_TYPE_VAL(ipaddr)              0
+#define IP_SET_TYPE_VAL(ipaddr, iptype)
+#define IP_SET_TYPE(ipaddr, iptype)
+#define IP_GET_TYPE(ipaddr)                     IPADDR_TYPE_V6
+#define IP_ADDR_RAW_SIZE(ipaddr)                sizeof(ip6_addr_t)
+#define ip_2_ip6(ipaddr)                        (ipaddr)
+#define IP_ADDR6(ipaddr,i0,i1,i2,i3)            IP6_ADDR(ipaddr,i0,i1,i2,i3)
+#define IP_ADDR6_HOST(ipaddr,i0,i1,i2,i3)       IP_ADDR6(ipaddr,PP_HTONL(i0),PP_HTONL(i1),PP_HTONL(i2),PP_HTONL(i3))
+
+#define ip_addr_copy(dest, src)                 ip6_addr_copy(dest, src)
+#define ip_addr_copy_from_ip6(dest, src)        ip6_addr_copy(dest, src)
+#define ip_addr_copy_from_ip6_packed(dest, src) ip6_addr_copy_from_packed(dest, src)
+#define ip_addr_set(dest, src)                  ip6_addr_set(dest, src)
+#define ip_addr_set_ipaddr(dest, src)           ip6_addr_set(dest, src)
+#define ip_addr_set_zero(ipaddr)                ip6_addr_set_zero(ipaddr)
+#define ip_addr_set_zero_ip6(ipaddr)            ip6_addr_set_zero(ipaddr)
+#define ip_addr_set_any(is_ipv6, ipaddr)        ip6_addr_set_any(ipaddr)
+#define ip_addr_set_loopback(is_ipv6, ipaddr)   ip6_addr_set_loopback(ipaddr)
+#define ip_addr_set_hton(dest, src)             ip6_addr_set_hton(dest, src)
+#define ip_addr_get_network(target, host, mask) ip6_addr_set_zero(target)
+#define ip_addr_netcmp(addr1, addr2, mask)      0
+#define ip_addr_cmp(addr1, addr2)               ip6_addr_cmp(addr1, addr2)
+#define ip_addr_cmp_zoneless(addr1, addr2)      ip6_addr_cmp_zoneless(addr1, addr2)
+#define ip_addr_isany(ipaddr)                   ip6_addr_isany(ipaddr)
+#define ip_addr_isany_val(ipaddr)               ip6_addr_isany_val(ipaddr)
+#define ip_addr_isloopback(ipaddr)              ip6_addr_isloopback(ipaddr)
+#define ip_addr_islinklocal(ipaddr)             ip6_addr_islinklocal(ipaddr)
+#define ip_addr_isbroadcast(addr, netif)        0
+#define ip_addr_ismulticast(ipaddr)             ip6_addr_ismulticast(ipaddr)
+#define ip_addr_debug_print(debug, ipaddr)      ip6_addr_debug_print(debug, ipaddr)
+#define ip_addr_debug_print_val(debug, ipaddr)  ip6_addr_debug_print_val(debug, ipaddr)
+#define ipaddr_ntoa(ipaddr)                     ip6addr_ntoa(ipaddr)
+#define ipaddr_ntoa_r(ipaddr, buf, buflen)      ip6addr_ntoa_r(ipaddr, buf, buflen)
+#define ipaddr_aton(cp, addr)                   ip6addr_aton(cp, addr)
+
+#define IPADDR_STRLEN_MAX   IP6ADDR_STRLEN_MAX
+
+#define IP46_ADDR_ANY(type) (IP6_ADDR_ANY)
+
+#endif /* LWIP_IPV4 */
+#endif /* LWIP_IPV4 && LWIP_IPV6 */
+
+#if LWIP_IPV4
+
+extern const ip_addr_t ip_addr_any;
+extern const ip_addr_t ip_addr_broadcast;
+
+/**
+ * @ingroup ip4addr
+ * Can be used as a fixed/const ip_addr_t
+ * for the IP wildcard.
+ * Defined to @ref IP4_ADDR_ANY when IPv4 is enabled.
+ * Defined to @ref IP6_ADDR_ANY in IPv6 only systems.
+ * Use this if you can handle IPv4 _AND_ IPv6 addresses.
+ * Use @ref IP4_ADDR_ANY or @ref IP6_ADDR_ANY when the IP
+ * type matters.
+ */
+#define IP_ADDR_ANY         IP4_ADDR_ANY
+/**
+ * @ingroup ip4addr
+ * Can be used as a fixed/const ip_addr_t
+ * for the IPv4 wildcard and the broadcast address
+ */
+#define IP4_ADDR_ANY        (&ip_addr_any)
+/**
+ * @ingroup ip4addr
+ * Can be used as a fixed/const ip4_addr_t
+ * for the wildcard and the broadcast address
+ */
+#define IP4_ADDR_ANY4       (ip_2_ip4(&ip_addr_any))
+
+/** @ingroup ip4addr */
+#define IP_ADDR_BROADCAST   (&ip_addr_broadcast)
+/** @ingroup ip4addr */
+#define IP4_ADDR_BROADCAST  (ip_2_ip4(&ip_addr_broadcast))
+
+#endif /* LWIP_IPV4*/
+
+#if LWIP_IPV6
+
+extern const ip_addr_t ip6_addr_any;
+
+/** 
+ * @ingroup ip6addr
+ * IP6_ADDR_ANY can be used as a fixed ip_addr_t
+ * for the IPv6 wildcard address
+ */
+#define IP6_ADDR_ANY   (&ip6_addr_any)
+/**
+ * @ingroup ip6addr
+ * IP6_ADDR_ANY6 can be used as a fixed ip6_addr_t
+ * for the IPv6 wildcard address
+ */
+#define IP6_ADDR_ANY6  (ip_2_ip6(&ip6_addr_any))
+
+#if !LWIP_IPV4
+/** IPv6-only configurations */
+#define IP_ADDR_ANY IP6_ADDR_ANY
+#endif /* !LWIP_IPV4 */
+
+#endif
+
+#if LWIP_IPV4 && LWIP_IPV6
+/** @ingroup ipaddr */
+#define IP_ANY_TYPE    (&ip_addr_any_type)
+#else
+#define IP_ANY_TYPE    IP_ADDR_ANY
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_IP_ADDR_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/lwip_napt.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/lwip_napt.h
new file mode 100644
index 00000000000..a1816d42034
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/lwip_napt.h
@@ -0,0 +1,122 @@
+/**
+ * @file lwip_napt.h
+ * public API of ip4_napt
+ *
+ * @see ip4_napt.c
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * original reassembly code by Adam Dunkels <adam@sics.se>
+ *
+ */
+
+#ifndef __LWIP_NAPT_H__
+#define __LWIP_NAPT_H__
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if ESP_LWIP
+#if IP_FORWARD
+#if IP_NAPT
+
+/* Default size of the tables used for NAPT */
+#ifndef IP_NAPT_MAX
+#define IP_NAPT_MAX 512
+#endif
+#ifndef IP_PORTMAP_MAX
+#define IP_PORTMAP_MAX 32
+#endif
+
+/* Timeouts in sec for the various protocol types */
+#define IP_NAPT_TIMEOUT_MS_TCP (30*60*1000)
+#define IP_NAPT_TIMEOUT_MS_TCP_DISCON (20*1000)
+#define IP_NAPT_TIMEOUT_MS_UDP (2*1000)
+#define IP_NAPT_TIMEOUT_MS_ICMP (2*1000)
+
+#define IP_NAPT_PORT_RANGE_START 49152
+#define IP_NAPT_PORT_RANGE_END   61439
+
+/**
+ * Enable/Disable NAPT for a specified interface.
+ *
+ * @param addr ip address of the interface
+ * @param enable non-zero to enable NAPT, or 0 to disable.
+ */
+void
+ip_napt_enable(u32_t addr, int enable);
+
+
+/**
+ * Enable/Disable NAPT for a specified interface.
+ *
+ * @param netif number of the interface
+ * @param enable non-zero to enable NAPT, or 0 to disable.
+ */
+void
+ip_napt_enable_no(u8_t number, int enable);
+
+
+/**
+ * Register port mapping on the external interface to internal interface.
+ * When the same port mapping is registered again, the old mapping is overwritten.
+ * In this implementation, only 1 unique port mapping can be defined for each target address/port.
+ *
+ * @param proto target protocol
+ * @param maddr ip address of the external interface
+ * @param mport mapped port on the external interface, in host byte order.
+ * @param daddr destination ip address
+ * @param dport destination port, in host byte order.
+ */
+u8_t
+ip_portmap_add(u8_t proto, u32_t maddr, u16_t mport, u32_t daddr, u16_t dport);
+
+
+/**
+ * Unregister port mapping on the external interface to internal interface.
+ *
+ * @param proto target protocol
+ * @param maddr ip address of the external interface
+ */
+u8_t
+ip_portmap_remove(u8_t proto, u16_t mport);
+
+#endif /* IP_NAPT */
+#endif /* IP_FORWARD */
+#endif /* ESP_LWIP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LWIP_NAPT_H__ */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/mem.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/mem.h
new file mode 100644
index 00000000000..ff208d25c32
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/mem.h
@@ -0,0 +1,82 @@
+/**
+ * @file
+ * Heap API
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_MEM_H
+#define LWIP_HDR_MEM_H
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if MEM_LIBC_MALLOC
+
+#include "lwip/arch.h"
+
+typedef size_t mem_size_t;
+#define MEM_SIZE_F SZT_F
+
+#elif MEM_USE_POOLS
+
+typedef u16_t mem_size_t;
+#define MEM_SIZE_F U16_F
+
+#else
+
+/* MEM_SIZE would have to be aligned, but using 64000 here instead of
+ * 65535 leaves some room for alignment...
+ */
+#if MEM_SIZE > 64000L
+typedef u32_t mem_size_t;
+#define MEM_SIZE_F U32_F
+#else
+typedef u16_t mem_size_t;
+#define MEM_SIZE_F U16_F
+#endif /* MEM_SIZE > 64000 */
+#endif
+
+void  mem_init(void);
+void *mem_trim(void *mem, mem_size_t size);
+void *mem_malloc(mem_size_t size);
+void *mem_calloc(mem_size_t count, mem_size_t size);
+void  mem_free(void *mem);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_MEM_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/memp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/memp.h
new file mode 100644
index 00000000000..1630b26c2ce
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/memp.h
@@ -0,0 +1,155 @@
+/**
+ * @file
+ * Memory pool API
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+
+#ifndef LWIP_HDR_MEMP_H
+#define LWIP_HDR_MEMP_H
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* run once with empty definition to handle all custom includes in lwippools.h */
+#define LWIP_MEMPOOL(name,num,size,desc)
+#include "lwip/priv/memp_std.h"
+
+/** Create the list of all memory pools managed by memp. MEMP_MAX represents a NULL pool at the end */
+typedef enum {
+#define LWIP_MEMPOOL(name,num,size,desc)  MEMP_##name,
+#include "lwip/priv/memp_std.h"
+  MEMP_MAX
+} memp_t;
+
+#include "lwip/priv/memp_priv.h"
+#include "lwip/stats.h"
+
+extern const struct memp_desc* const memp_pools[MEMP_MAX];
+
+/**
+ * @ingroup mempool
+ * Declare prototype for private memory pool if it is used in multiple files
+ */
+#define LWIP_MEMPOOL_PROTOTYPE(name) extern const struct memp_desc memp_ ## name
+
+#if MEMP_MEM_MALLOC
+
+#define LWIP_MEMPOOL_DECLARE(name,num,size,desc) \
+  LWIP_MEMPOOL_DECLARE_STATS_INSTANCE(memp_stats_ ## name) \
+  const struct memp_desc memp_ ## name = { \
+    DECLARE_LWIP_MEMPOOL_DESC(desc) \
+    LWIP_MEMPOOL_DECLARE_STATS_REFERENCE(memp_stats_ ## name) \
+    LWIP_MEM_ALIGN_SIZE(size) \
+  };
+
+#else /* MEMP_MEM_MALLOC */
+
+/**
+ * @ingroup mempool
+ * Declare a private memory pool
+ * Private mempools example:
+ * .h: only when pool is used in multiple .c files: LWIP_MEMPOOL_PROTOTYPE(my_private_pool);
+ * .c:
+ *   - in global variables section: LWIP_MEMPOOL_DECLARE(my_private_pool, 10, sizeof(foo), "Some description")
+ *   - call ONCE before using pool (e.g. in some init() function): LWIP_MEMPOOL_INIT(my_private_pool);
+ *   - allocate: void* my_new_mem = LWIP_MEMPOOL_ALLOC(my_private_pool);
+ *   - free: LWIP_MEMPOOL_FREE(my_private_pool, my_new_mem);
+ *
+ * To relocate a pool, declare it as extern in cc.h. Example for GCC:
+ *   extern u8_t \_\_attribute\_\_((section(".onchip_mem"))) memp_memory_my_private_pool_base[];
+ */
+#define LWIP_MEMPOOL_DECLARE(name,num,size,desc) \
+  LWIP_DECLARE_MEMORY_ALIGNED(memp_memory_ ## name ## _base, ((num) * (MEMP_SIZE + MEMP_ALIGN_SIZE(size)))); \
+    \
+  LWIP_MEMPOOL_DECLARE_STATS_INSTANCE(memp_stats_ ## name) \
+    \
+  static struct memp *memp_tab_ ## name; \
+    \
+  const struct memp_desc memp_ ## name = { \
+    DECLARE_LWIP_MEMPOOL_DESC(desc) \
+    LWIP_MEMPOOL_DECLARE_STATS_REFERENCE(memp_stats_ ## name) \
+    LWIP_MEM_ALIGN_SIZE(size), \
+    (num), \
+    memp_memory_ ## name ## _base, \
+    &memp_tab_ ## name \
+  };
+
+#endif /* MEMP_MEM_MALLOC */
+
+/**
+ * @ingroup mempool
+ * Initialize a private memory pool
+ */
+#define LWIP_MEMPOOL_INIT(name)    memp_init_pool(&memp_ ## name)
+/**
+ * @ingroup mempool
+ * Allocate from a private memory pool
+ */
+#define LWIP_MEMPOOL_ALLOC(name)   memp_malloc_pool(&memp_ ## name)
+/**
+ * @ingroup mempool
+ * Free element from a private memory pool
+ */
+#define LWIP_MEMPOOL_FREE(name, x) memp_free_pool(&memp_ ## name, (x))
+
+#if MEM_USE_POOLS
+/** This structure is used to save the pool one element came from.
+ * This has to be defined here as it is required for pool size calculation. */
+struct memp_malloc_helper
+{
+   memp_t poolnr;
+#if MEMP_OVERFLOW_CHECK || (LWIP_STATS && MEM_STATS)
+   u16_t size;
+#endif /* MEMP_OVERFLOW_CHECK || (LWIP_STATS && MEM_STATS) */
+};
+#endif /* MEM_USE_POOLS */
+
+void  memp_init(void);
+
+#if MEMP_OVERFLOW_CHECK
+void *memp_malloc_fn(memp_t type, const char* file, const int line);
+#define memp_malloc(t) memp_malloc_fn((t), __FILE__, __LINE__)
+#else
+void *memp_malloc(memp_t type);
+#endif
+void  memp_free(memp_t type, void *mem);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_MEMP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/mld6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/mld6.h
new file mode 100644
index 00000000000..7fa0797f272
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/mld6.h
@@ -0,0 +1,99 @@
+/**
+ * @file
+ *
+ * Multicast listener discovery for IPv6. Aims to be compliant with RFC 2710.
+ * No support for MLDv2.
+ */
+
+/*
+ * Copyright (c) 2010 Inico Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Ivan Delamer <delamer@inicotech.com>
+ *
+ *
+ * Please coordinate changes and requests with Ivan Delamer
+ * <delamer@inicotech.com>
+ */
+
+#ifndef LWIP_HDR_MLD6_H
+#define LWIP_HDR_MLD6_H
+
+#include "lwip/opt.h"
+
+#if LWIP_IPV6_MLD && LWIP_IPV6  /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/pbuf.h"
+#include "lwip/netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** MLD group */
+struct mld_group {
+  /** next link */
+  struct mld_group *next;
+  /** multicast address */
+  ip6_addr_t         group_address;
+  /** signifies we were the last person to report */
+  u8_t               last_reporter_flag;
+  /** current state of the group */
+  u8_t               group_state;
+  /** timer for reporting */
+  u16_t              timer;
+  /** counter of simultaneous uses */
+  u8_t               use;
+};
+
+#define MLD6_TMR_INTERVAL              100 /* Milliseconds */
+
+err_t  mld6_stop(struct netif *netif);
+void   mld6_report_groups(struct netif *netif);
+void   mld6_tmr(void);
+struct mld_group *mld6_lookfor_group(struct netif *ifp, const ip6_addr_t *addr);
+void   mld6_input(struct pbuf *p, struct netif *inp);
+err_t  mld6_joingroup(const ip6_addr_t *srcaddr, const ip6_addr_t *groupaddr);
+err_t  mld6_joingroup_netif(struct netif *netif, const ip6_addr_t *groupaddr);
+err_t  mld6_leavegroup(const ip6_addr_t *srcaddr, const ip6_addr_t *groupaddr);
+err_t  mld6_leavegroup_netif(struct netif *netif, const ip6_addr_t *groupaddr);
+
+/** @ingroup mld6
+ * Get list head of MLD6 groups for netif.
+ * Note: The allnodes group IP is NOT in the list, since it must always 
+ * be received for correct IPv6 operation.
+ * @see @ref netif_set_mld_mac_filter()
+ */
+#define netif_mld6_data(netif) ((struct mld_group *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_MLD6))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV6_MLD && LWIP_IPV6 */
+
+#endif /* LWIP_HDR_MLD6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/nd6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/nd6.h
new file mode 100644
index 00000000000..952f318b7fd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/nd6.h
@@ -0,0 +1,95 @@
+/**
+ * @file
+ *
+ * Neighbor discovery and stateless address autoconfiguration for IPv6.
+ * Aims to be compliant with RFC 4861 (Neighbor discovery) and RFC 4862
+ * (Address autoconfiguration).
+ */
+
+/*
+ * Copyright (c) 2010 Inico Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Ivan Delamer <delamer@inicotech.com>
+ *
+ *
+ * Please coordinate changes and requests with Ivan Delamer
+ * <delamer@inicotech.com>
+ */
+
+#ifndef LWIP_HDR_ND6_H
+#define LWIP_HDR_ND6_H
+
+#include "lwip/opt.h"
+
+#if LWIP_IPV6  /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/ip6_addr.h"
+#include "lwip/err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** 1 second period */
+#define ND6_TMR_INTERVAL 1000
+
+/** Router solicitations are sent in 4 second intervals (see RFC 4861, ch. 6.3.7) */
+#ifndef ND6_RTR_SOLICITATION_INTERVAL
+#define ND6_RTR_SOLICITATION_INTERVAL  4000
+#endif
+
+struct pbuf;
+struct netif;
+
+void nd6_tmr(void);
+void nd6_input(struct pbuf *p, struct netif *inp);
+void nd6_clear_destination_cache(void);
+struct netif *nd6_find_route(const ip6_addr_t *ip6addr);
+err_t nd6_get_next_hop_addr_or_queue(struct netif *netif, struct pbuf *q, const ip6_addr_t *ip6addr, const u8_t **hwaddrp);
+u16_t nd6_get_destination_mtu(const ip6_addr_t *ip6addr, struct netif *netif);
+#if LWIP_ND6_TCP_REACHABILITY_HINTS
+void nd6_reachability_hint(const ip6_addr_t *ip6addr);
+#endif /* LWIP_ND6_TCP_REACHABILITY_HINTS */
+void nd6_cleanup_netif(struct netif *netif);
+#if LWIP_IPV6_MLD
+void nd6_adjust_mld_membership(struct netif *netif, s8_t addr_idx, u8_t new_state);
+#endif /* LWIP_IPV6_MLD */
+void nd6_restart_netif(struct netif *netif);
+
+#if ESP_IPV6
+/** set nd6 callback when ipv6 addr state pref*/
+void nd6_set_cb(struct netif *netif, void (*cb)(struct netif *netif, u8_t ip_index));
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV6 */
+
+#endif /* LWIP_HDR_ND6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netbuf.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netbuf.h
new file mode 100644
index 00000000000..42a911bca38
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netbuf.h
@@ -0,0 +1,116 @@
+/**
+ * @file
+ * netbuf API (for netconn API)
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_NETBUF_H
+#define LWIP_HDR_NETBUF_H
+
+#include "lwip/opt.h"
+
+#if LWIP_NETCONN || LWIP_SOCKET /* don't build if not configured for use in lwipopts.h */
+/* Note: Netconn API is always available when sockets are enabled -
+ * sockets are implemented on top of them */
+
+#include "lwip/pbuf.h"
+#include "lwip/ip_addr.h"
+#include "lwip/ip6_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** This netbuf has dest-addr/port set */
+#define NETBUF_FLAG_DESTADDR    0x01
+/** This netbuf includes a checksum */
+#define NETBUF_FLAG_CHKSUM      0x02
+
+/** "Network buffer" - contains data and addressing info */
+struct netbuf {
+  struct pbuf *p, *ptr;
+  ip_addr_t addr;
+  u16_t port;
+#if LWIP_NETBUF_RECVINFO || LWIP_CHECKSUM_ON_COPY
+  u8_t flags;
+  u16_t toport_chksum;
+#if LWIP_NETBUF_RECVINFO
+  ip_addr_t toaddr;
+#endif /* LWIP_NETBUF_RECVINFO */
+#endif /* LWIP_NETBUF_RECVINFO || LWIP_CHECKSUM_ON_COPY */
+};
+
+/* Network buffer functions: */
+struct netbuf *   netbuf_new      (void);
+void              netbuf_delete   (struct netbuf *buf);
+void *            netbuf_alloc    (struct netbuf *buf, u16_t size);
+void              netbuf_free     (struct netbuf *buf);
+err_t             netbuf_ref      (struct netbuf *buf,
+                                   const void *dataptr, u16_t size);
+void              netbuf_chain    (struct netbuf *head, struct netbuf *tail);
+
+err_t             netbuf_data     (struct netbuf *buf,
+                                   void **dataptr, u16_t *len);
+s8_t              netbuf_next     (struct netbuf *buf);
+void              netbuf_first    (struct netbuf *buf);
+
+
+#define netbuf_copy_partial(buf, dataptr, len, offset) \
+  pbuf_copy_partial((buf)->p, (dataptr), (len), (offset))
+#define netbuf_copy(buf,dataptr,len) netbuf_copy_partial(buf, dataptr, len, 0)
+#define netbuf_take(buf, dataptr, len) pbuf_take((buf)->p, dataptr, len)
+#define netbuf_len(buf)              ((buf)->p->tot_len)
+#define netbuf_fromaddr(buf)         (&((buf)->addr))
+#define netbuf_set_fromaddr(buf, fromaddr) ip_addr_set(&((buf)->addr), fromaddr)
+#define netbuf_fromport(buf)         ((buf)->port)
+#if LWIP_NETBUF_RECVINFO
+#define netbuf_destaddr(buf)         (&((buf)->toaddr))
+#define netbuf_set_destaddr(buf, destaddr) ip_addr_set(&((buf)->toaddr), destaddr)
+#if LWIP_CHECKSUM_ON_COPY
+#define netbuf_destport(buf)         (((buf)->flags & NETBUF_FLAG_DESTADDR) ? (buf)->toport_chksum : 0)
+#else /* LWIP_CHECKSUM_ON_COPY */
+#define netbuf_destport(buf)         ((buf)->toport_chksum)
+#endif /* LWIP_CHECKSUM_ON_COPY */
+#endif /* LWIP_NETBUF_RECVINFO */
+#if LWIP_CHECKSUM_ON_COPY
+#define netbuf_set_chksum(buf, chksum) do { (buf)->flags = NETBUF_FLAG_CHKSUM; \
+                                            (buf)->toport_chksum = chksum; } while(0)
+#endif /* LWIP_CHECKSUM_ON_COPY */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_NETCONN || LWIP_SOCKET */
+
+#endif /* LWIP_HDR_NETBUF_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netdb.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netdb.h
new file mode 100644
index 00000000000..826c716c6a3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netdb.h
@@ -0,0 +1,181 @@
+/**
+ * @file
+ * NETDB API (sockets)
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt
+ *
+ */
+#ifndef LWIP_HDR_NETDB_H
+#define LWIP_HDR_NETDB_H
+
+#include "lwip/opt.h"
+
+#if LWIP_DNS && LWIP_SOCKET
+
+#include "lwip/arch.h"
+#include "lwip/inet.h"
+#include "lwip/sockets.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* some rarely used options */
+#ifndef LWIP_DNS_API_DECLARE_H_ERRNO
+#define LWIP_DNS_API_DECLARE_H_ERRNO  1
+#endif
+
+#ifndef LWIP_DNS_API_DEFINE_ERRORS
+#define LWIP_DNS_API_DEFINE_ERRORS    1
+#endif
+
+#ifndef LWIP_DNS_API_DEFINE_FLAGS
+#define LWIP_DNS_API_DEFINE_FLAGS     1
+#endif
+
+#ifndef LWIP_DNS_API_DECLARE_STRUCTS
+#define LWIP_DNS_API_DECLARE_STRUCTS  1
+#endif
+
+#if LWIP_DNS_API_DEFINE_ERRORS
+/** Errors used by the DNS API functions, h_errno can be one of them */
+#define EAI_NONAME      200
+#define EAI_SERVICE     201
+#define EAI_FAIL        202
+#define EAI_MEMORY      203
+#define EAI_FAMILY      204
+
+#define HOST_NOT_FOUND  210
+#define NO_DATA         211
+#define NO_RECOVERY     212
+#define TRY_AGAIN       213
+#endif /* LWIP_DNS_API_DEFINE_ERRORS */
+
+#if LWIP_DNS_API_DEFINE_FLAGS
+/* input flags for struct addrinfo */
+#define AI_PASSIVE      0x01
+#define AI_CANONNAME    0x02
+#define AI_NUMERICHOST  0x04
+#define AI_NUMERICSERV  0x08
+#define AI_V4MAPPED     0x10
+#define AI_ALL          0x20
+#define AI_ADDRCONFIG   0x40
+#endif /* LWIP_DNS_API_DEFINE_FLAGS */
+
+#if LWIP_DNS_API_DECLARE_STRUCTS
+struct hostent {
+    char  *h_name;      /* Official name of the host. */
+    char **h_aliases;   /* A pointer to an array of pointers to alternative host names,
+                           terminated by a null pointer. */
+    int    h_addrtype;  /* Address type. */
+    int    h_length;    /* The length, in bytes, of the address. */
+    char **h_addr_list; /* A pointer to an array of pointers to network addresses (in
+                           network byte order) for the host, terminated by a null pointer. */
+#define h_addr h_addr_list[0] /* for backward compatibility */
+};
+
+struct addrinfo {
+    int               ai_flags;      /* Input flags. */
+    int               ai_family;     /* Address family of socket. */
+    int               ai_socktype;   /* Socket type. */
+    int               ai_protocol;   /* Protocol of socket. */
+    socklen_t         ai_addrlen;    /* Length of socket address. */
+    struct sockaddr  *ai_addr;       /* Socket address of socket. */
+    char             *ai_canonname;  /* Canonical name of service location. */
+    struct addrinfo  *ai_next;       /* Pointer to next in list. */
+};
+#endif /* LWIP_DNS_API_DECLARE_STRUCTS */
+
+#define NETDB_ELEM_SIZE           (sizeof(struct addrinfo) + sizeof(struct sockaddr_storage) + DNS_MAX_NAME_LENGTH + 1)
+
+#if LWIP_DNS_API_DECLARE_H_ERRNO
+/* application accessible error code set by the DNS API functions */
+extern int h_errno;
+#endif /* LWIP_DNS_API_DECLARE_H_ERRNO*/
+
+struct hostent *lwip_gethostbyname(const char *name);
+int lwip_gethostbyname_r(const char *name, struct hostent *ret, char *buf,
+                size_t buflen, struct hostent **result, int *h_errnop);
+void lwip_freeaddrinfo(struct addrinfo *ai);
+int lwip_getaddrinfo(const char *nodename,
+       const char *servname,
+       const struct addrinfo *hints,
+       struct addrinfo **res);
+
+#if LWIP_COMPAT_SOCKETS
+#if ESP_SOCKET
+#if LWIP_COMPAT_SOCKET_ADDR == 1
+/* Some libraries have problems with inet_... being macros, so please use this define 
+   to declare normal functions */
+static inline int gethostbyname_r(const char *name, struct hostent *ret, char *buf, size_t buflen, struct hostent **result, int *h_errnop)
+{ return lwip_gethostbyname_r(name, ret, buf, buflen, result, h_errnop); }
+static inline struct hostent *gethostbyname(const char *name)
+{ return lwip_gethostbyname(name); }
+static inline void freeaddrinfo(struct addrinfo *ai)
+{ lwip_freeaddrinfo(ai); }
+static inline int getaddrinfo(const char *nodename, const char *servname, const struct addrinfo *hints, struct addrinfo **res)
+{ return lwip_getaddrinfo(nodename, servname, hints, res); }
+#else
+/* By default fall back to original inet_... macros */
+
+/** @ingroup netdbapi */
+#define gethostbyname(name) lwip_gethostbyname(name)
+/** @ingroup netdbapi */
+#define gethostbyname_r(name, ret, buf, buflen, result, h_errnop) \
+       lwip_gethostbyname_r(name, ret, buf, buflen, result, h_errnop)
+/** @ingroup netdbapi */
+#define freeaddrinfo(addrinfo) lwip_freeaddrinfo(addrinfo)
+/** @ingroup netdbapi */
+#define getaddrinfo(nodname, servname, hints, res) \
+       lwip_getaddrinfo(nodname, servname, hints, res)
+#endif /* LWIP_COMPAT_SOCKET_ADDR == 1 */
+
+#else /* ESP_SOCKET */
+
+/** @ingroup netdbapi */
+#define gethostbyname(name) lwip_gethostbyname(name)
+/** @ingroup netdbapi */
+#define gethostbyname_r(name, ret, buf, buflen, result, h_errnop) \
+       lwip_gethostbyname_r(name, ret, buf, buflen, result, h_errnop)
+/** @ingroup netdbapi */
+#define freeaddrinfo(addrinfo) lwip_freeaddrinfo(addrinfo)
+/** @ingroup netdbapi */
+#define getaddrinfo(nodname, servname, hints, res) \
+       lwip_getaddrinfo(nodname, servname, hints, res)
+
+#endif /* ESP_SOCKET */
+#endif /* LWIP_COMPAT_SOCKETS */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_DNS && LWIP_SOCKET */
+
+#endif /* LWIP_HDR_NETDB_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netif.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netif.h
new file mode 100644
index 00000000000..dd1c0d3124f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netif.h
@@ -0,0 +1,701 @@
+/**
+ * @file
+ * netif API (to be used from TCPIP thread)
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_NETIF_H
+#define LWIP_HDR_NETIF_H
+
+#include "lwip/opt.h"
+
+#define ENABLE_LOOPBACK (LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF)
+
+#include "lwip/err.h"
+
+#include "lwip/ip_addr.h"
+
+#include "lwip/def.h"
+#include "lwip/pbuf.h"
+#include "lwip/stats.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Throughout this file, IP addresses are expected to be in
+ * the same byte order as in IP_PCB. */
+
+/** Must be the maximum of all used hardware address lengths
+    across all types of interfaces in use.
+    This does not have to be changed, normally. */
+#ifndef NETIF_MAX_HWADDR_LEN
+#define NETIF_MAX_HWADDR_LEN 6U
+#endif
+
+/** The size of a fully constructed netif name which the
+ * netif can be identified by in APIs. Composed of
+ * 2 chars, 3 (max) digits, and 1 \0
+ */
+#define NETIF_NAMESIZE 6
+
+/**
+ * @defgroup netif_flags Flags
+ * @ingroup netif
+ * @{
+ */
+
+/** Whether the network interface is 'up'. This is
+ * a software flag used to control whether this network
+ * interface is enabled and processes traffic.
+ * It must be set by the startup code before this netif can be used
+ * (also for dhcp/autoip).
+ */
+#define NETIF_FLAG_UP           0x01U
+/** If set, the netif has broadcast capability.
+ * Set by the netif driver in its init function. */
+#define NETIF_FLAG_BROADCAST    0x02U
+/** If set, the interface has an active link
+ *  (set by the network interface driver).
+ * Either set by the netif driver in its init function (if the link
+ * is up at that time) or at a later point once the link comes up
+ * (if link detection is supported by the hardware). */
+#define NETIF_FLAG_LINK_UP      0x04U
+/** If set, the netif is an ethernet device using ARP.
+ * Set by the netif driver in its init function.
+ * Used to check input packet types and use of DHCP. */
+#define NETIF_FLAG_ETHARP       0x08U
+/** If set, the netif is an ethernet device. It might not use
+ * ARP or TCP/IP if it is used for PPPoE only.
+ */
+#define NETIF_FLAG_ETHERNET     0x10U
+/** If set, the netif has IGMP capability.
+ * Set by the netif driver in its init function. */
+#define NETIF_FLAG_IGMP         0x20U
+/** If set, the netif has MLD6 capability.
+ * Set by the netif driver in its init function. */
+#define NETIF_FLAG_MLD6         0x40U
+
+#if ESP_GRATUITOUS_ARP
+/** If set, the netif will send gratuitous ARP periodically */
+#define NETIF_FLAG_GARP         0x80U
+#endif
+
+/**
+ * @}
+ */
+
+enum lwip_internal_netif_client_data_index
+{
+#if LWIP_IPV4
+#if LWIP_DHCP
+   LWIP_NETIF_CLIENT_DATA_INDEX_DHCP,
+#endif
+#if LWIP_AUTOIP
+   LWIP_NETIF_CLIENT_DATA_INDEX_AUTOIP,
+#endif
+#if LWIP_IGMP
+   LWIP_NETIF_CLIENT_DATA_INDEX_IGMP,
+#endif
+#endif /* LWIP_IPV4 */
+#if LWIP_IPV6
+#if LWIP_IPV6_DHCP6
+   LWIP_NETIF_CLIENT_DATA_INDEX_DHCP6,
+#endif
+#if LWIP_IPV6_MLD
+   LWIP_NETIF_CLIENT_DATA_INDEX_MLD6,
+#endif
+#endif /* LWIP_IPV6 */
+   LWIP_NETIF_CLIENT_DATA_INDEX_MAX
+};
+
+#if LWIP_CHECKSUM_CTRL_PER_NETIF
+#define NETIF_CHECKSUM_GEN_IP       0x0001
+#define NETIF_CHECKSUM_GEN_UDP      0x0002
+#define NETIF_CHECKSUM_GEN_TCP      0x0004
+#define NETIF_CHECKSUM_GEN_ICMP     0x0008
+#define NETIF_CHECKSUM_GEN_ICMP6    0x0010
+#define NETIF_CHECKSUM_CHECK_IP     0x0100
+#define NETIF_CHECKSUM_CHECK_UDP    0x0200
+#define NETIF_CHECKSUM_CHECK_TCP    0x0400
+#define NETIF_CHECKSUM_CHECK_ICMP   0x0800
+#define NETIF_CHECKSUM_CHECK_ICMP6  0x1000
+#define NETIF_CHECKSUM_ENABLE_ALL   0xFFFF
+#define NETIF_CHECKSUM_DISABLE_ALL  0x0000
+#endif /* LWIP_CHECKSUM_CTRL_PER_NETIF */
+
+struct netif;
+
+/** MAC Filter Actions, these are passed to a netif's igmp_mac_filter or
+ * mld_mac_filter callback function. */
+enum netif_mac_filter_action {
+  /** Delete a filter entry */
+  NETIF_DEL_MAC_FILTER = 0,
+  /** Add a filter entry */
+  NETIF_ADD_MAC_FILTER = 1
+};
+
+/** Function prototype for netif init functions. Set up flags and output/linkoutput
+ * callback functions in this function.
+ *
+ * @param netif The netif to initialize
+ */
+typedef err_t (*netif_init_fn)(struct netif *netif);
+/** Function prototype for netif->input functions. This function is saved as 'input'
+ * callback function in the netif struct. Call it when a packet has been received.
+ *
+ * @param p The received packet, copied into a pbuf
+ * @param inp The netif which received the packet
+ * @return ERR_OK if the packet was handled
+ *         != ERR_OK is the packet was NOT handled, in this case, the caller has
+ *                   to free the pbuf
+ */
+typedef err_t (*netif_input_fn)(struct pbuf *p, struct netif *inp);
+
+#if LWIP_IPV4
+/** Function prototype for netif->output functions. Called by lwIP when a packet
+ * shall be sent. For ethernet netif, set this to 'etharp_output' and set
+ * 'linkoutput'.
+ *
+ * @param netif The netif which shall send a packet
+ * @param p The packet to send (p->payload points to IP header)
+ * @param ipaddr The IP address to which the packet shall be sent
+ */
+typedef err_t (*netif_output_fn)(struct netif *netif, struct pbuf *p,
+       const ip4_addr_t *ipaddr);
+#endif /* LWIP_IPV4*/
+
+#if LWIP_IPV6
+/** Function prototype for netif->output_ip6 functions. Called by lwIP when a packet
+ * shall be sent. For ethernet netif, set this to 'ethip6_output' and set
+ * 'linkoutput'.
+ *
+ * @param netif The netif which shall send a packet
+ * @param p The packet to send (p->payload points to IP header)
+ * @param ipaddr The IPv6 address to which the packet shall be sent
+ */
+typedef err_t (*netif_output_ip6_fn)(struct netif *netif, struct pbuf *p,
+       const ip6_addr_t *ipaddr);
+#endif /* LWIP_IPV6 */
+
+/** Function prototype for netif->linkoutput functions. Only used for ethernet
+ * netifs. This function is called by ARP when a packet shall be sent.
+ *
+ * @param netif The netif which shall send a packet
+ * @param p The packet to send (raw ethernet packet)
+ */
+typedef err_t (*netif_linkoutput_fn)(struct netif *netif, struct pbuf *p);
+/** Function prototype for netif status- or link-callback functions. */
+typedef void (*netif_status_callback_fn)(struct netif *netif);
+#if LWIP_IPV4 && LWIP_IGMP
+/** Function prototype for netif igmp_mac_filter functions */
+typedef err_t (*netif_igmp_mac_filter_fn)(struct netif *netif,
+       const ip4_addr_t *group, enum netif_mac_filter_action action);
+#endif /* LWIP_IPV4 && LWIP_IGMP */
+#if LWIP_IPV6 && LWIP_IPV6_MLD
+/** Function prototype for netif mld_mac_filter functions */
+typedef err_t (*netif_mld_mac_filter_fn)(struct netif *netif,
+       const ip6_addr_t *group, enum netif_mac_filter_action action);
+#endif /* LWIP_IPV6 && LWIP_IPV6_MLD */
+
+#if LWIP_DHCP || LWIP_AUTOIP || LWIP_IGMP || LWIP_IPV6_MLD || LWIP_IPV6_DHCP6 || (LWIP_NUM_NETIF_CLIENT_DATA > 0)
+#if LWIP_NUM_NETIF_CLIENT_DATA > 0
+u8_t netif_alloc_client_data_id(void);
+#endif
+/** @ingroup netif_cd
+ * Set client data. Obtain ID from netif_alloc_client_data_id().
+ */
+#define netif_set_client_data(netif, id, data) netif_get_client_data(netif, id) = (data)
+/** @ingroup netif_cd
+ * Get client data. Obtain ID from netif_alloc_client_data_id().
+ */
+#define netif_get_client_data(netif, id)       (netif)->client_data[(id)]
+#endif
+
+#if (LWIP_IPV4 && LWIP_ARP && (ARP_TABLE_SIZE > 0x7f)) || (LWIP_IPV6 && (LWIP_ND6_NUM_DESTINATIONS > 0x7f))
+typedef u16_t netif_addr_idx_t;
+#define NETIF_ADDR_IDX_MAX 0x7FFF
+#else
+typedef u8_t netif_addr_idx_t;
+#define NETIF_ADDR_IDX_MAX 0x7F
+#endif
+
+#if LWIP_NETIF_HWADDRHINT
+#define LWIP_NETIF_USE_HINTS              1
+struct netif_hint {
+  netif_addr_idx_t addr_hint;
+};
+#else /* LWIP_NETIF_HWADDRHINT */
+#define LWIP_NETIF_USE_HINTS              0
+#endif /* LWIP_NETIF_HWADDRHINT */
+
+#if ESP_DHCP
+/*add DHCP event processing by LiuHan*/
+typedef void (*dhcp_event_fn)(void);
+#endif
+
+/** Generic data structure used for all lwIP network interfaces.
+ *  The following fields should be filled in by the initialization
+ *  function for the device driver: hwaddr_len, hwaddr[], mtu, flags */
+struct netif {
+#if !LWIP_SINGLE_NETIF
+  /** pointer to next in linked list */
+  struct netif *next;
+#endif
+
+#if LWIP_IPV4
+  /** IP address configuration in network byte order */
+  ip_addr_t ip_addr;
+  ip_addr_t netmask;
+  ip_addr_t gw;
+#endif /* LWIP_IPV4 */
+#if LWIP_IPV6
+  /** Array of IPv6 addresses for this netif. */
+  ip_addr_t ip6_addr[LWIP_IPV6_NUM_ADDRESSES];
+  /** The state of each IPv6 address (Tentative, Preferred, etc).
+   * @see ip6_addr.h */
+  u8_t ip6_addr_state[LWIP_IPV6_NUM_ADDRESSES];
+#if LWIP_IPV6_ADDRESS_LIFETIMES
+  /** Remaining valid and preferred lifetime of each IPv6 address, in seconds.
+   * For valid lifetimes, the special value of IP6_ADDR_LIFE_STATIC (0)
+   * indicates the address is static and has no lifetimes. */
+  u32_t ip6_addr_valid_life[LWIP_IPV6_NUM_ADDRESSES];
+  u32_t ip6_addr_pref_life[LWIP_IPV6_NUM_ADDRESSES];
+#endif /* LWIP_IPV6_ADDRESS_LIFETIMES */
+#if ESP_LWIP
+  void (*ipv6_addr_cb)(struct netif* netif, u8_t ip_idex); /* callback for ipv6 addr states changed */
+#endif
+#endif /* LWIP_IPV6 */
+  /** This function is called by the network device driver
+   *  to pass a packet up the TCP/IP stack. */
+  netif_input_fn input;
+#if LWIP_IPV4
+  /** This function is called by the IP module when it wants
+   *  to send a packet on the interface. This function typically
+   *  first resolves the hardware address, then sends the packet.
+   *  For ethernet physical layer, this is usually etharp_output() */
+  netif_output_fn output;
+#endif /* LWIP_IPV4 */
+  /** This function is called by ethernet_output() when it wants
+   *  to send a packet on the interface. This function outputs
+   *  the pbuf as-is on the link medium. */
+  netif_linkoutput_fn linkoutput;
+#if LWIP_IPV6
+  /** This function is called by the IPv6 module when it wants
+   *  to send a packet on the interface. This function typically
+   *  first resolves the hardware address, then sends the packet.
+   *  For ethernet physical layer, this is usually ethip6_output() */
+  netif_output_ip6_fn output_ip6;
+#endif /* LWIP_IPV6 */
+#if LWIP_NETIF_STATUS_CALLBACK
+  /** This function is called when the netif state is set to up or down
+   */
+  netif_status_callback_fn status_callback;
+#endif /* LWIP_NETIF_STATUS_CALLBACK */
+#if LWIP_NETIF_LINK_CALLBACK
+  /** This function is called when the netif link is set to up or down
+   */
+  netif_status_callback_fn link_callback;
+#endif /* LWIP_NETIF_LINK_CALLBACK */
+#if LWIP_NETIF_REMOVE_CALLBACK
+  /** This function is called when the netif has been removed */
+  netif_status_callback_fn remove_callback;
+#endif /* LWIP_NETIF_REMOVE_CALLBACK */
+  /** This field can be set by the device driver and could point
+   *  to state information for the device. */
+  void *state;
+#ifdef netif_get_client_data
+  void* client_data[LWIP_NETIF_CLIENT_DATA_INDEX_MAX + LWIP_NUM_NETIF_CLIENT_DATA];
+#endif
+
+#if ESP_DHCP
+  struct udp_pcb *dhcps_pcb;	
+  dhcp_event_fn dhcp_event;
+#endif
+
+#if LWIP_NETIF_HOSTNAME
+  /* the hostname for this netif, NULL is a valid value */
+  const char*  hostname;
+#endif /* LWIP_NETIF_HOSTNAME */
+#if LWIP_CHECKSUM_CTRL_PER_NETIF
+  u16_t chksum_flags;
+#endif /* LWIP_CHECKSUM_CTRL_PER_NETIF*/
+  /** maximum transfer unit (in bytes) */
+  u16_t mtu;
+#if LWIP_IPV6 && LWIP_ND6_ALLOW_RA_UPDATES
+  /** maximum transfer unit (in bytes), updated by RA */
+  u16_t mtu6;
+#endif /* LWIP_IPV6 && LWIP_ND6_ALLOW_RA_UPDATES */
+  /** link level hardware address of this interface */
+  u8_t hwaddr[NETIF_MAX_HWADDR_LEN];
+  /** number of bytes used in hwaddr */
+  u8_t hwaddr_len;
+  /** flags (@see @ref netif_flags) */
+  u8_t flags;
+  /** descriptive abbreviation */
+  char name[2];
+  /** number of this interface. Used for @ref if_api and @ref netifapi_netif, 
+   * as well as for IPv6 zones */
+  u8_t num;
+#if LWIP_IPV6_AUTOCONFIG
+  /** is this netif enabled for IPv6 autoconfiguration */
+  u8_t ip6_autoconfig_enabled;
+#endif /* LWIP_IPV6_AUTOCONFIG */
+#if LWIP_IPV6_SEND_ROUTER_SOLICIT
+  /** Number of Router Solicitation messages that remain to be sent. */
+  u8_t rs_count;
+#endif /* LWIP_IPV6_SEND_ROUTER_SOLICIT */
+#if MIB2_STATS
+  /** link type (from "snmp_ifType" enum from snmp_mib2.h) */
+  u8_t link_type;
+  /** (estimate) link speed */
+  u32_t link_speed;
+  /** timestamp at last change made (up/down) */
+  u32_t ts;
+  /** counters */
+  struct stats_mib2_netif_ctrs mib2_counters;
+#endif /* MIB2_STATS */
+#if LWIP_IPV4 && LWIP_IGMP
+  /** This function could be called to add or delete an entry in the multicast
+      filter table of the ethernet MAC.*/
+  netif_igmp_mac_filter_fn igmp_mac_filter;
+#endif /* LWIP_IPV4 && LWIP_IGMP */
+#if LWIP_IPV6 && LWIP_IPV6_MLD
+  /** This function could be called to add or delete an entry in the IPv6 multicast
+      filter table of the ethernet MAC. */
+  netif_mld_mac_filter_fn mld_mac_filter;
+#endif /* LWIP_IPV6 && LWIP_IPV6_MLD */
+#if LWIP_NETIF_USE_HINTS
+  struct netif_hint *hints;
+#endif /* LWIP_NETIF_USE_HINTS */
+#if ENABLE_LOOPBACK
+  /* List of packets to be queued for ourselves. */
+  struct pbuf *loop_first;
+  struct pbuf *loop_last;
+#if LWIP_LOOPBACK_MAX_PBUFS
+  u16_t loop_cnt_current;
+#endif /* LWIP_LOOPBACK_MAX_PBUFS */
+#endif /* ENABLE_LOOPBACK */
+#if ESP_PBUF
+  void (*l2_buffer_free_notify)(struct netif *lwip_netif, void *user_buf); /* Allows LWIP to notify driver when a L2-supplied pbuf can be freed */
+  ip_addr_t last_ip_addr; /* Store last non-zero ip address */
+#endif
+#if ESP_LWIP
+#if LWIP_IPV4 && IP_NAPT
+  u8_t napt;
+#endif
+#endif /* ESP_LWIP */
+};
+#if LWIP_CHECKSUM_CTRL_PER_NETIF
+#define NETIF_SET_CHECKSUM_CTRL(netif, chksumflags) do { \
+  (netif)->chksum_flags = chksumflags; } while(0)
+#define IF__NETIF_CHECKSUM_ENABLED(netif, chksumflag) if (((netif) == NULL) || (((netif)->chksum_flags & (chksumflag)) != 0))
+#else /* LWIP_CHECKSUM_CTRL_PER_NETIF */
+#define NETIF_SET_CHECKSUM_CTRL(netif, chksumflags)
+#define IF__NETIF_CHECKSUM_ENABLED(netif, chksumflag)
+#endif /* LWIP_CHECKSUM_CTRL_PER_NETIF */
+
+#if LWIP_SINGLE_NETIF
+#define NETIF_FOREACH(netif) if (((netif) = netif_default) != NULL)
+#else /* LWIP_SINGLE_NETIF */
+/** The list of network interfaces. */
+extern struct netif *netif_list;
+#define NETIF_FOREACH(netif) for ((netif) = netif_list; (netif) != NULL; (netif) = (netif)->next)
+#endif /* LWIP_SINGLE_NETIF */
+/** The default network interface. */
+extern struct netif *netif_default;
+
+void netif_init(void);
+
+struct netif *netif_add_noaddr(struct netif *netif, void *state, netif_init_fn init, netif_input_fn input);
+
+#if LWIP_IPV4
+struct netif *netif_add(struct netif *netif,
+                            const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw,
+                            void *state, netif_init_fn init, netif_input_fn input);
+void netif_set_addr(struct netif *netif, const ip4_addr_t *ipaddr, const ip4_addr_t *netmask,
+                    const ip4_addr_t *gw);
+#else /* LWIP_IPV4 */
+struct netif *netif_add(struct netif *netif, void *state, netif_init_fn init, netif_input_fn input);
+#endif /* LWIP_IPV4 */
+
+#if ESP_GRATUITOUS_ARP
+void netif_set_garp_flag(struct netif *netif);
+#endif
+
+void netif_remove(struct netif * netif);
+
+/* Returns a network interface given its name. The name is of the form
+   "et0", where the first two letters are the "name" field in the
+   netif structure, and the digit is in the num field in the same
+   structure. */
+struct netif *netif_find(const char *name);
+
+void netif_set_default(struct netif *netif);
+
+#if LWIP_IPV4
+void netif_set_ipaddr(struct netif *netif, const ip4_addr_t *ipaddr);
+void netif_set_netmask(struct netif *netif, const ip4_addr_t *netmask);
+void netif_set_gw(struct netif *netif, const ip4_addr_t *gw);
+/** @ingroup netif_ip4 */
+#define netif_ip4_addr(netif)    ((const ip4_addr_t*)ip_2_ip4(&((netif)->ip_addr)))
+/** @ingroup netif_ip4 */
+#define netif_ip4_netmask(netif) ((const ip4_addr_t*)ip_2_ip4(&((netif)->netmask)))
+/** @ingroup netif_ip4 */
+#define netif_ip4_gw(netif)      ((const ip4_addr_t*)ip_2_ip4(&((netif)->gw)))
+/** @ingroup netif_ip4 */
+#define netif_ip_addr4(netif)    ((const ip_addr_t*)&((netif)->ip_addr))
+/** @ingroup netif_ip4 */
+#define netif_ip_netmask4(netif) ((const ip_addr_t*)&((netif)->netmask))
+/** @ingroup netif_ip4 */
+#define netif_ip_gw4(netif)      ((const ip_addr_t*)&((netif)->gw))
+#endif /* LWIP_IPV4 */
+
+#define netif_set_flags(netif, set_flags)     do { (netif)->flags = (u8_t)((netif)->flags |  (set_flags)); } while(0)
+#define netif_clear_flags(netif, clr_flags)   do { (netif)->flags = (u8_t)((netif)->flags & (u8_t)(~(clr_flags) & 0xff)); } while(0)
+#define netif_is_flag_set(nefif, flag)        (((netif)->flags & (flag)) != 0)
+
+void netif_set_up(struct netif *netif);
+void netif_set_down(struct netif *netif);
+/** @ingroup netif
+ * Ask if an interface is up
+ */
+#define netif_is_up(netif) (((netif)->flags & NETIF_FLAG_UP) ? (u8_t)1 : (u8_t)0)
+
+#if LWIP_NETIF_STATUS_CALLBACK
+void netif_set_status_callback(struct netif *netif, netif_status_callback_fn status_callback);
+#endif /* LWIP_NETIF_STATUS_CALLBACK */
+#if LWIP_NETIF_REMOVE_CALLBACK
+void netif_set_remove_callback(struct netif *netif, netif_status_callback_fn remove_callback);
+#endif /* LWIP_NETIF_REMOVE_CALLBACK */
+
+void netif_set_link_up(struct netif *netif);
+void netif_set_link_down(struct netif *netif);
+/** Ask if a link is up */
+#define netif_is_link_up(netif) (((netif)->flags & NETIF_FLAG_LINK_UP) ? (u8_t)1 : (u8_t)0)
+
+#if LWIP_NETIF_LINK_CALLBACK
+void netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback);
+#endif /* LWIP_NETIF_LINK_CALLBACK */
+
+#if LWIP_NETIF_HOSTNAME
+/** @ingroup netif */
+#define netif_set_hostname(netif, name) do { if((netif) != NULL) { (netif)->hostname = name; }}while(0)
+/** @ingroup netif */
+#define netif_get_hostname(netif) (((netif) != NULL) ? ((netif)->hostname) : NULL)
+#endif /* LWIP_NETIF_HOSTNAME */
+
+#if LWIP_IGMP
+/** @ingroup netif */
+#define netif_set_igmp_mac_filter(netif, function) do { if((netif) != NULL) { (netif)->igmp_mac_filter = function; }}while(0)
+#define netif_get_igmp_mac_filter(netif) (((netif) != NULL) ? ((netif)->igmp_mac_filter) : NULL)
+#endif /* LWIP_IGMP */
+
+#if LWIP_IPV6 && LWIP_IPV6_MLD
+/** @ingroup netif */
+#define netif_set_mld_mac_filter(netif, function) do { if((netif) != NULL) { (netif)->mld_mac_filter = function; }}while(0)
+#define netif_get_mld_mac_filter(netif) (((netif) != NULL) ? ((netif)->mld_mac_filter) : NULL)
+#define netif_mld_mac_filter(netif, addr, action) do { if((netif) && (netif)->mld_mac_filter) { (netif)->mld_mac_filter((netif), (addr), (action)); }}while(0)
+#endif /* LWIP_IPV6 && LWIP_IPV6_MLD */
+
+#if ENABLE_LOOPBACK
+err_t netif_loop_output(struct netif *netif, struct pbuf *p);
+void netif_poll(struct netif *netif);
+#if !LWIP_NETIF_LOOPBACK_MULTITHREADING
+void netif_poll_all(void);
+#endif /* !LWIP_NETIF_LOOPBACK_MULTITHREADING */
+#endif /* ENABLE_LOOPBACK */
+
+err_t netif_input(struct pbuf *p, struct netif *inp);
+
+#if LWIP_IPV6
+/** @ingroup netif_ip6 */
+#define netif_ip_addr6(netif, i)  ((const ip_addr_t*)(&((netif)->ip6_addr[i])))
+/** @ingroup netif_ip6 */
+#define netif_ip6_addr(netif, i)  ((const ip6_addr_t*)ip_2_ip6(&((netif)->ip6_addr[i])))
+void netif_ip6_addr_set(struct netif *netif, s8_t addr_idx, const ip6_addr_t *addr6);
+void netif_ip6_addr_set_parts(struct netif *netif, s8_t addr_idx, u32_t i0, u32_t i1, u32_t i2, u32_t i3);
+#define netif_ip6_addr_state(netif, i)  ((netif)->ip6_addr_state[i])
+void netif_ip6_addr_set_state(struct netif* netif, s8_t addr_idx, u8_t state);
+s8_t netif_get_ip6_addr_match(struct netif *netif, const ip6_addr_t *ip6addr);
+void netif_create_ip6_linklocal_address(struct netif *netif, u8_t from_mac_48bit);
+err_t netif_add_ip6_address(struct netif *netif, const ip6_addr_t *ip6addr, s8_t *chosen_idx);
+#define netif_set_ip6_autoconfig_enabled(netif, action) do { if(netif) { (netif)->ip6_autoconfig_enabled = (action); }}while(0)
+#if LWIP_IPV6_ADDRESS_LIFETIMES
+#define netif_ip6_addr_valid_life(netif, i)  \
+    (((netif) != NULL) ? ((netif)->ip6_addr_valid_life[i]) : IP6_ADDR_LIFE_STATIC)
+#define netif_ip6_addr_set_valid_life(netif, i, secs) \
+    do { if (netif != NULL) { (netif)->ip6_addr_valid_life[i] = (secs); }} while (0)
+#define netif_ip6_addr_pref_life(netif, i)  \
+    (((netif) != NULL) ? ((netif)->ip6_addr_pref_life[i]) : IP6_ADDR_LIFE_STATIC)
+#define netif_ip6_addr_set_pref_life(netif, i, secs) \
+    do { if (netif != NULL) { (netif)->ip6_addr_pref_life[i] = (secs); }} while (0)
+#define netif_ip6_addr_isstatic(netif, i)  \
+    (netif_ip6_addr_valid_life((netif), (i)) == IP6_ADDR_LIFE_STATIC)
+#else /* !LWIP_IPV6_ADDRESS_LIFETIMES */
+#define netif_ip6_addr_isstatic(netif, i)  (1) /* all addresses are static */
+#endif /* !LWIP_IPV6_ADDRESS_LIFETIMES */
+#if LWIP_ND6_ALLOW_RA_UPDATES
+#define netif_mtu6(netif) ((netif)->mtu6)
+#else /* LWIP_ND6_ALLOW_RA_UPDATES */
+#define netif_mtu6(netif) ((netif)->mtu)
+#endif /* LWIP_ND6_ALLOW_RA_UPDATES */
+#endif /* LWIP_IPV6 */
+
+#if LWIP_NETIF_USE_HINTS
+#define NETIF_SET_HINTS(netif, netifhint)  (netif)->hints = (netifhint)
+#define NETIF_RESET_HINTS(netif)      (netif)->hints = NULL
+#else /* LWIP_NETIF_USE_HINTS */
+#define NETIF_SET_HINTS(netif, netifhint)
+#define NETIF_RESET_HINTS(netif)
+#endif /* LWIP_NETIF_USE_HINTS */
+
+u8_t netif_name_to_index(const char *name);
+char * netif_index_to_name(u8_t idx, char *name);
+struct netif* netif_get_by_index(u8_t idx);
+
+/* Interface indexes always start at 1 per RFC 3493, section 4, num starts at 0 (internal index is 0..254)*/
+#define netif_get_index(netif)      ((u8_t)((netif)->num + 1))
+#define NETIF_NO_INDEX              (0)
+
+/**
+ * @ingroup netif
+ * Extended netif status callback (NSC) reasons flags.
+ * May be extended in the future!
+ */
+typedef u16_t netif_nsc_reason_t;
+
+/* used for initialization only */
+#define LWIP_NSC_NONE                     0x0000
+/** netif was added. arg: NULL. Called AFTER netif was added. */
+#define LWIP_NSC_NETIF_ADDED              0x0001
+/** netif was removed. arg: NULL. Called BEFORE netif is removed. */
+#define LWIP_NSC_NETIF_REMOVED            0x0002
+/** link changed */
+#define LWIP_NSC_LINK_CHANGED             0x0004
+/** netif administrative status changed.\n
+  * up is called AFTER netif is set up.\n
+  * down is called BEFORE the netif is actually set down. */
+#define LWIP_NSC_STATUS_CHANGED           0x0008
+/** IPv4 address has changed */
+#define LWIP_NSC_IPV4_ADDRESS_CHANGED     0x0010
+/** IPv4 gateway has changed */
+#define LWIP_NSC_IPV4_GATEWAY_CHANGED     0x0020
+/** IPv4 netmask has changed */
+#define LWIP_NSC_IPV4_NETMASK_CHANGED     0x0040
+/** called AFTER IPv4 address/gateway/netmask changes have been applied */
+#define LWIP_NSC_IPV4_SETTINGS_CHANGED    0x0080
+/** IPv6 address was added */
+#define LWIP_NSC_IPV6_SET                 0x0100
+/** IPv6 address state has changed */
+#define LWIP_NSC_IPV6_ADDR_STATE_CHANGED  0x0200
+
+/** @ingroup netif
+ * Argument supplied to netif_ext_callback_fn.
+ */
+typedef union
+{
+  /** Args to LWIP_NSC_LINK_CHANGED callback */
+  struct link_changed_s
+  {
+    /** 1: up; 0: down */
+    u8_t state;
+  } link_changed;
+  /** Args to LWIP_NSC_STATUS_CHANGED callback */
+  struct status_changed_s
+  {
+    /** 1: up; 0: down */
+    u8_t state;
+  } status_changed;
+  /** Args to LWIP_NSC_IPV4_ADDRESS_CHANGED|LWIP_NSC_IPV4_GATEWAY_CHANGED|LWIP_NSC_IPV4_NETMASK_CHANGED|LWIP_NSC_IPV4_SETTINGS_CHANGED callback */
+  struct ipv4_changed_s
+  {
+    /** Old IPv4 address */
+    const ip_addr_t* old_address;
+    const ip_addr_t* old_netmask;
+    const ip_addr_t* old_gw;
+  } ipv4_changed;
+  /** Args to LWIP_NSC_IPV6_SET callback */
+  struct ipv6_set_s
+  {
+    /** Index of changed IPv6 address */
+    s8_t addr_index;
+    /** Old IPv6 address */
+    const ip_addr_t* old_address;
+  } ipv6_set;
+  /** Args to LWIP_NSC_IPV6_ADDR_STATE_CHANGED callback */
+  struct ipv6_addr_state_changed_s
+  {
+    /** Index of affected IPv6 address */
+    s8_t addr_index;
+    /** Old IPv6 address state */
+    u8_t old_state;
+    /** Affected IPv6 address */
+    const ip_addr_t* address;
+  } ipv6_addr_state_changed;
+} netif_ext_callback_args_t;
+
+/**
+ * @ingroup netif
+ * Function used for extended netif status callbacks
+ * Note: When parsing reason argument, keep in mind that more reasons may be added in the future!
+ * @param netif netif that is affected by change
+ * @param reason change reason
+ * @param args depends on reason, see reason description
+ */
+typedef void (*netif_ext_callback_fn)(struct netif* netif, netif_nsc_reason_t reason, const netif_ext_callback_args_t* args);
+
+#if LWIP_NETIF_EXT_STATUS_CALLBACK
+struct netif_ext_callback;
+typedef struct netif_ext_callback
+{
+  netif_ext_callback_fn callback_fn;
+  struct netif_ext_callback* next;
+} netif_ext_callback_t;
+
+#define NETIF_DECLARE_EXT_CALLBACK(name) static netif_ext_callback_t name;
+void netif_add_ext_callback(netif_ext_callback_t* callback, netif_ext_callback_fn fn);
+void netif_remove_ext_callback(netif_ext_callback_t* callback);
+void netif_invoke_ext_callback(struct netif* netif, netif_nsc_reason_t reason, const netif_ext_callback_args_t* args);
+#else
+#define NETIF_DECLARE_EXT_CALLBACK(name)
+#define netif_add_ext_callback(callback, fn)
+#define netif_remove_ext_callback(callback)
+#define netif_invoke_ext_callback(netif, reason, args)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_NETIF_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netifapi.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netifapi.h
new file mode 100644
index 00000000000..e0631791b9d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/netifapi.h
@@ -0,0 +1,161 @@
+/**
+ * @file
+ * netif API (to be used from non-TCPIP threads)
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+#ifndef LWIP_HDR_NETIFAPI_H
+#define LWIP_HDR_NETIFAPI_H
+
+#include "lwip/opt.h"
+
+#if LWIP_NETIF_API /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/sys.h"
+#include "lwip/netif.h"
+#include "lwip/dhcp.h"
+#include "lwip/autoip.h"
+#include "lwip/priv/tcpip_priv.h"
+#include "lwip/priv/api_msg.h"
+#include "lwip/prot/ethernet.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* API for application */
+#if LWIP_ARP && LWIP_IPV4
+/* Used for netfiapi_arp_* APIs */
+enum netifapi_arp_entry {
+  NETIFAPI_ARP_PERM /* Permanent entry */
+  /* Other entry types can be added here */
+};
+
+/** @ingroup netifapi_arp */
+err_t netifapi_arp_add(const ip4_addr_t *ipaddr, struct eth_addr *ethaddr, enum netifapi_arp_entry type);
+/** @ingroup netifapi_arp */
+err_t netifapi_arp_remove(const ip4_addr_t *ipaddr, enum netifapi_arp_entry type);
+#endif /* LWIP_ARP && LWIP_IPV4 */
+
+err_t netifapi_netif_add(struct netif *netif,
+#if LWIP_IPV4
+                         const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw,
+#endif /* LWIP_IPV4 */
+                         void *state, netif_init_fn init, netif_input_fn input);
+
+#if LWIP_IPV4
+err_t netifapi_netif_set_addr(struct netif *netif, const ip4_addr_t *ipaddr,
+                              const ip4_addr_t *netmask, const ip4_addr_t *gw);
+#endif /* LWIP_IPV4*/
+
+err_t netifapi_netif_common(struct netif *netif, netifapi_void_fn voidfunc,
+                            netifapi_errt_fn errtfunc);
+
+/** @ingroup netifapi_netif */
+err_t netifapi_netif_name_to_index(const char *name, u8_t *index);
+/** @ingroup netifapi_netif */
+err_t netifapi_netif_index_to_name(u8_t index, char *name);
+
+/** @ingroup netifapi_netif
+  * @see netif_remove()
+  */
+#define netifapi_netif_remove(n)        netifapi_netif_common(n, netif_remove, NULL)
+/** @ingroup netifapi_netif
+  * @see netif_set_up()
+  */
+#define netifapi_netif_set_up(n)        netifapi_netif_common(n, netif_set_up, NULL)
+/** @ingroup netifapi_netif
+  * @see netif_set_down()
+  */
+#define netifapi_netif_set_down(n)      netifapi_netif_common(n, netif_set_down, NULL)
+/** @ingroup netifapi_netif
+  * @see netif_set_default()
+  */
+#define netifapi_netif_set_default(n)   netifapi_netif_common(n, netif_set_default, NULL)
+/** @ingroup netifapi_netif
+  * @see netif_set_link_up()
+  */
+#define netifapi_netif_set_link_up(n)   netifapi_netif_common(n, netif_set_link_up, NULL)
+/** @ingroup netifapi_netif
+  * @see netif_set_link_down()
+  */
+#define netifapi_netif_set_link_down(n) netifapi_netif_common(n, netif_set_link_down, NULL)
+
+/**
+ * @defgroup netifapi_dhcp4 DHCPv4
+ * @ingroup netifapi
+ * To be called from non-TCPIP threads
+ */
+/** @ingroup netifapi_dhcp4
+  * @see dhcp_start()
+  */
+#define netifapi_dhcp_start(n)            netifapi_netif_common(n, NULL, dhcp_start)
+/**
+ * @ingroup netifapi_dhcp4
+ * @deprecated Use netifapi_dhcp_release_and_stop() instead.
+ */
+#define netifapi_dhcp_stop(n)             netifapi_netif_common(n, dhcp_stop, NULL)
+/** @ingroup netifapi_dhcp4
+  * @see dhcp_inform()
+  */
+#define netifapi_dhcp_inform(n)           netifapi_netif_common(n, dhcp_inform, NULL)
+/** @ingroup netifapi_dhcp4
+  * @see dhcp_renew()
+  */
+#define netifapi_dhcp_renew(n)            netifapi_netif_common(n, NULL, dhcp_renew)
+/**
+ * @ingroup netifapi_dhcp4
+ * @deprecated Use netifapi_dhcp_release_and_stop() instead.
+ */
+#define netifapi_dhcp_release(n)          netifapi_netif_common(n, NULL, dhcp_release)
+/** @ingroup netifapi_dhcp4
+  * @see dhcp_release_and_stop()
+  */
+#define netifapi_dhcp_release_and_stop(n) netifapi_netif_common(n, dhcp_release_and_stop, NULL)
+
+/**
+ * @defgroup netifapi_autoip AUTOIP
+ * @ingroup netifapi
+ * To be called from non-TCPIP threads
+ */
+/** @ingroup netifapi_autoip
+  * @see autoip_start()
+  */
+#define netifapi_autoip_start(n)      netifapi_netif_common(n, NULL, autoip_start)
+/** @ingroup netifapi_autoip
+  * @see autoip_stop()
+  */
+#define netifapi_autoip_stop(n)       netifapi_netif_common(n, NULL, autoip_stop)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_NETIF_API */
+
+#endif /* LWIP_HDR_NETIFAPI_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/opt.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/opt.h
new file mode 100644
index 00000000000..cdd7044c728
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/opt.h
@@ -0,0 +1,3577 @@
+/**
+ * @file
+ *
+ * lwIP Options Configuration
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+
+/*
+ * NOTE: || defined __DOXYGEN__ is a workaround for doxygen bug -
+ * without this, doxygen does not see the actual #define
+ */
+
+#if !defined LWIP_HDR_OPT_H
+#define LWIP_HDR_OPT_H
+
+/*
+ * Include user defined options first. Anything not defined in these files
+ * will be set to standard values. Override anything you don't like!
+ */
+#include "lwipopts.h"
+#include "lwip/debug.h"
+
+/**
+ * @defgroup lwip_opts Options (lwipopts.h)
+ * @ingroup lwip
+ *
+ * @defgroup lwip_opts_debug Debugging
+ * @ingroup lwip_opts
+ *
+ * @defgroup lwip_opts_infrastructure Infrastructure
+ * @ingroup lwip_opts
+ *
+ * @defgroup lwip_opts_callback Callback-style APIs
+ * @ingroup lwip_opts
+ *
+ * @defgroup lwip_opts_threadsafe_apis Thread-safe APIs
+ * @ingroup lwip_opts
+ */
+
+ /*
+   ------------------------------------
+   -------------- NO SYS --------------
+   ------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_nosys NO_SYS
+ * @ingroup lwip_opts_infrastructure
+ * @{
+ */
+/**
+ * NO_SYS==1: Use lwIP without OS-awareness (no thread, semaphores, mutexes or
+ * mboxes). This means threaded APIs cannot be used (socket, netconn,
+ * i.e. everything in the 'api' folder), only the callback-style raw API is
+ * available (and you have to watch out for yourself that you don't access
+ * lwIP functions/structures from more than one context at a time!)
+ */
+#if !defined NO_SYS || defined __DOXYGEN__
+#define NO_SYS                          0
+#endif
+/**
+ * @}
+ */
+
+/**
+ * @defgroup lwip_opts_timers Timers
+ * @ingroup lwip_opts_infrastructure
+ * @{
+ */
+/**
+ * LWIP_TIMERS==0: Drop support for sys_timeout and lwip-internal cyclic timers.
+ * (the array of lwip-internal cyclic timers is still provided)
+ * (check NO_SYS_NO_TIMERS for compatibility to old versions)
+ */
+#if !defined LWIP_TIMERS || defined __DOXYGEN__
+#ifdef NO_SYS_NO_TIMERS
+#define LWIP_TIMERS                     (!NO_SYS || (NO_SYS && !NO_SYS_NO_TIMERS))
+#else
+#define LWIP_TIMERS                     1
+#endif
+#endif
+
+/**
+ * LWIP_TIMERS_CUSTOM==1: Provide your own timer implementation.
+ * Function prototypes in timeouts.h and the array of lwip-internal cyclic timers
+ * are still included, but the implementation is not. The following functions
+ * will be required: sys_timeouts_init(), sys_timeout(), sys_untimeout(),
+ *                   sys_timeouts_mbox_fetch()
+ */
+#if !defined LWIP_TIMERS_CUSTOM || defined __DOXYGEN__
+#define LWIP_TIMERS_CUSTOM              0
+#endif
+/**
+ * @}
+ */
+
+/**
+ * @defgroup lwip_opts_memcpy memcpy
+ * @ingroup lwip_opts_infrastructure
+ * @{
+ */
+/**
+ * MEMCPY: override this if you have a faster implementation at hand than the
+ * one included in your C library
+ */
+#if !defined MEMCPY || defined __DOXYGEN__
+#define MEMCPY(dst,src,len)             memcpy(dst,src,len)
+#endif
+
+/**
+ * SMEMCPY: override this with care! Some compilers (e.g. gcc) can inline a
+ * call to memcpy() if the length is known at compile time and is small.
+ */
+#if !defined SMEMCPY || defined __DOXYGEN__
+#define SMEMCPY(dst,src,len)            memcpy(dst,src,len)
+#endif
+
+/**
+ * MEMMOVE: override this if you have a faster implementation at hand than the
+ * one included in your C library.  lwIP currently uses MEMMOVE only when IPv6
+ * fragmentation support is enabled.
+ */
+#if !defined MEMMOVE || defined __DOXYGEN__
+#define MEMMOVE(dst,src,len)            memmove(dst,src,len)
+#endif
+/**
+ * @}
+ */
+
+/*
+   ------------------------------------
+   ----------- Core locking -----------
+   ------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_lock Core locking and MPU
+ * @ingroup lwip_opts_infrastructure
+ * @{
+ */
+/**
+ * LWIP_MPU_COMPATIBLE: enables special memory management mechanism
+ * which makes lwip able to work on MPU (Memory Protection Unit) system
+ * by not passing stack-pointers to other threads
+ * (this decreases performance as memory is allocated from pools instead
+ * of keeping it on the stack)
+ */
+#if !defined LWIP_MPU_COMPATIBLE || defined __DOXYGEN__
+#define LWIP_MPU_COMPATIBLE             0
+#endif
+
+/**
+ * LWIP_TCPIP_CORE_LOCKING
+ * Creates a global mutex that is held during TCPIP thread operations.
+ * Can be locked by client code to perform lwIP operations without changing
+ * into TCPIP thread using callbacks. See LOCK_TCPIP_CORE() and
+ * UNLOCK_TCPIP_CORE().
+ * Your system should provide mutexes supporting priority inversion to use this.
+ */
+#if !defined LWIP_TCPIP_CORE_LOCKING || defined __DOXYGEN__
+#define LWIP_TCPIP_CORE_LOCKING         1
+#endif
+
+/**
+ * LWIP_TCPIP_CORE_LOCKING_INPUT: when LWIP_TCPIP_CORE_LOCKING is enabled,
+ * this lets tcpip_input() grab the mutex for input packets as well,
+ * instead of allocating a message and passing it to tcpip_thread.
+ *
+ * ATTENTION: this does not work when tcpip_input() is called from
+ * interrupt context!
+ */
+#if !defined LWIP_TCPIP_CORE_LOCKING_INPUT || defined __DOXYGEN__
+#define LWIP_TCPIP_CORE_LOCKING_INPUT   0
+#endif
+
+/**
+ * SYS_LIGHTWEIGHT_PROT==1: enable inter-task protection (and task-vs-interrupt
+ * protection) for certain critical regions during buffer allocation, deallocation
+ * and memory allocation and deallocation.
+ * ATTENTION: This is required when using lwIP from more than one context! If
+ * you disable this, you must be sure what you are doing!
+ */
+#if !defined SYS_LIGHTWEIGHT_PROT || defined __DOXYGEN__
+#define SYS_LIGHTWEIGHT_PROT            1
+#endif
+
+/**
+ * Macro/function to check whether lwIP's threading/locking
+ * requirements are satisfied during current function call.
+ * This macro usually calls a function that is implemented in the OS-dependent
+ * sys layer and performs the following checks:
+ * - Not in ISR (this should be checked for NO_SYS==1, too!)
+ * - If @ref LWIP_TCPIP_CORE_LOCKING = 1: TCPIP core lock is held
+ * - If @ref LWIP_TCPIP_CORE_LOCKING = 0: function is called from TCPIP thread
+ * @see @ref multithreading
+ */
+#if !defined LWIP_ASSERT_CORE_LOCKED || defined __DOXYGEN__
+#define LWIP_ASSERT_CORE_LOCKED()
+#endif
+
+/**
+ * Called as first thing in the lwIP TCPIP thread. Can be used in conjunction
+ * with @ref LWIP_ASSERT_CORE_LOCKED to check core locking.
+ * @see @ref multithreading
+ */
+#if !defined LWIP_MARK_TCPIP_THREAD || defined __DOXYGEN__
+#define LWIP_MARK_TCPIP_THREAD()
+#endif
+/**
+ * @}
+ */
+
+/*
+   ------------------------------------
+   ---------- Memory options ----------
+   ------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_mem Heap and memory pools
+ * @ingroup lwip_opts_infrastructure
+ * @{
+ */
+/**
+ * MEM_LIBC_MALLOC==1: Use malloc/free/realloc provided by your C-library
+ * instead of the lwip internal allocator. Can save code size if you
+ * already use it.
+ */
+#if !defined MEM_LIBC_MALLOC || defined __DOXYGEN__
+#define MEM_LIBC_MALLOC                 0
+#endif
+
+/**
+ * MEMP_MEM_MALLOC==1: Use mem_malloc/mem_free instead of the lwip pool allocator.
+ * Especially useful with MEM_LIBC_MALLOC but handle with care regarding execution
+ * speed (heap alloc can be much slower than pool alloc) and usage from interrupts
+ * (especially if your netif driver allocates PBUF_POOL pbufs for received frames
+ * from interrupt)!
+ * ATTENTION: Currently, this uses the heap for ALL pools (also for private pools,
+ * not only for internal pools defined in memp_std.h)!
+ */
+#if !defined MEMP_MEM_MALLOC || defined __DOXYGEN__
+#define MEMP_MEM_MALLOC                 0
+#endif
+
+/**
+ * MEMP_MEM_INIT==1: Force use of memset to initialize pool memory.
+ * Useful if pool are moved in uninitialized section of memory. This will ensure
+ * default values in pcbs struct are well initialized in all conditions.
+ */
+#if !defined MEMP_MEM_INIT || defined __DOXYGEN__
+#define MEMP_MEM_INIT                   0
+#endif
+
+/**
+ * MEM_ALIGNMENT: should be set to the alignment of the CPU
+ *    4 byte alignment -> \#define MEM_ALIGNMENT 4
+ *    2 byte alignment -> \#define MEM_ALIGNMENT 2
+ */
+#if !defined MEM_ALIGNMENT || defined __DOXYGEN__
+#define MEM_ALIGNMENT                   1
+#endif
+
+/**
+ * MEM_SIZE: the size of the heap memory. If the application will send
+ * a lot of data that needs to be copied, this should be set high.
+ */
+#if !defined MEM_SIZE || defined __DOXYGEN__
+#define MEM_SIZE                        1600
+#endif
+
+/**
+ * MEMP_OVERFLOW_CHECK: memp overflow protection reserves a configurable
+ * amount of bytes before and after each memp element in every pool and fills
+ * it with a prominent default value.
+ *    MEMP_OVERFLOW_CHECK == 0 no checking
+ *    MEMP_OVERFLOW_CHECK == 1 checks each element when it is freed
+ *    MEMP_OVERFLOW_CHECK >= 2 checks each element in every pool every time
+ *      memp_malloc() or memp_free() is called (useful but slow!)
+ */
+#if !defined MEMP_OVERFLOW_CHECK || defined __DOXYGEN__
+#define MEMP_OVERFLOW_CHECK             0
+#endif
+
+/**
+ * MEMP_SANITY_CHECK==1: run a sanity check after each memp_free() to make
+ * sure that there are no cycles in the linked lists.
+ */
+#if !defined MEMP_SANITY_CHECK || defined __DOXYGEN__
+#define MEMP_SANITY_CHECK               0
+#endif
+
+/**
+ * MEM_OVERFLOW_CHECK: mem overflow protection reserves a configurable
+ * amount of bytes before and after each heap allocation chunk and fills
+ * it with a prominent default value.
+ *    MEM_OVERFLOW_CHECK == 0 no checking
+ *    MEM_OVERFLOW_CHECK == 1 checks each element when it is freed
+ *    MEM_OVERFLOW_CHECK >= 2 checks all heap elements every time
+ *      mem_malloc() or mem_free() is called (useful but slow!)
+ */
+#if !defined MEM_OVERFLOW_CHECK || defined __DOXYGEN__
+#define MEM_OVERFLOW_CHECK              0
+#endif
+
+/**
+ * MEM_SANITY_CHECK==1: run a sanity check after each mem_free() to make
+ * sure that the linked list of heap elements is not corrupted.
+ */
+#if !defined MEM_SANITY_CHECK || defined __DOXYGEN__
+#define MEM_SANITY_CHECK                0
+#endif
+
+/**
+ * MEM_USE_POOLS==1: Use an alternative to malloc() by allocating from a set
+ * of memory pools of various sizes. When mem_malloc is called, an element of
+ * the smallest pool that can provide the length needed is returned.
+ * To use this, MEMP_USE_CUSTOM_POOLS also has to be enabled.
+ */
+#if !defined MEM_USE_POOLS || defined __DOXYGEN__
+#define MEM_USE_POOLS                   0
+#endif
+
+/**
+ * MEM_USE_POOLS_TRY_BIGGER_POOL==1: if one malloc-pool is empty, try the next
+ * bigger pool - WARNING: THIS MIGHT WASTE MEMORY but it can make a system more
+ * reliable. */
+#if !defined MEM_USE_POOLS_TRY_BIGGER_POOL || defined __DOXYGEN__
+#define MEM_USE_POOLS_TRY_BIGGER_POOL   0
+#endif
+
+/**
+ * MEMP_USE_CUSTOM_POOLS==1: whether to include a user file lwippools.h
+ * that defines additional pools beyond the "standard" ones required
+ * by lwIP. If you set this to 1, you must have lwippools.h in your
+ * include path somewhere.
+ */
+#if !defined MEMP_USE_CUSTOM_POOLS || defined __DOXYGEN__
+#define MEMP_USE_CUSTOM_POOLS           0
+#endif
+
+/**
+ * Set this to 1 if you want to free PBUF_RAM pbufs (or call mem_free()) from
+ * interrupt context (or another context that doesn't allow waiting for a
+ * semaphore).
+ * If set to 1, mem_malloc will be protected by a semaphore and SYS_ARCH_PROTECT,
+ * while mem_free will only use SYS_ARCH_PROTECT. mem_malloc SYS_ARCH_UNPROTECTs
+ * with each loop so that mem_free can run.
+ *
+ * ATTENTION: As you can see from the above description, this leads to dis-/
+ * enabling interrupts often, which can be slow! Also, on low memory, mem_malloc
+ * can need longer.
+ *
+ * If you don't want that, at least for NO_SYS=0, you can still use the following
+ * functions to enqueue a deallocation call which then runs in the tcpip_thread
+ * context:
+ * - pbuf_free_callback(p);
+ * - mem_free_callback(m);
+ */
+#if !defined LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT || defined __DOXYGEN__
+#define LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT 0
+#endif
+/**
+ * @}
+ */
+
+/*
+   ------------------------------------------------
+   ---------- Internal Memory Pool Sizes ----------
+   ------------------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_memp Internal memory pools
+ * @ingroup lwip_opts_infrastructure
+ * @{
+ */
+/**
+ * MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF).
+ * If the application sends a lot of data out of ROM (or other static memory),
+ * this should be set high.
+ */
+#if !defined MEMP_NUM_PBUF || defined __DOXYGEN__
+#define MEMP_NUM_PBUF                   16
+#endif
+
+/**
+ * MEMP_NUM_RAW_PCB: Number of raw connection PCBs
+ * (requires the LWIP_RAW option)
+ */
+#if !defined MEMP_NUM_RAW_PCB || defined __DOXYGEN__
+#define MEMP_NUM_RAW_PCB                4
+#endif
+
+/**
+ * MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
+ * per active UDP "connection".
+ * (requires the LWIP_UDP option)
+ */
+#if !defined MEMP_NUM_UDP_PCB || defined __DOXYGEN__
+#define MEMP_NUM_UDP_PCB                4
+#endif
+
+/**
+ * MEMP_NUM_TCP_PCB: the number of simultaneously active TCP connections.
+ * (requires the LWIP_TCP option)
+ */
+#if !defined MEMP_NUM_TCP_PCB || defined __DOXYGEN__
+#define MEMP_NUM_TCP_PCB                5
+#endif
+
+/**
+ * MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections.
+ * (requires the LWIP_TCP option)
+ */
+#if !defined MEMP_NUM_TCP_PCB_LISTEN || defined __DOXYGEN__
+#define MEMP_NUM_TCP_PCB_LISTEN         8
+#endif
+
+/**
+ * MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments.
+ * (requires the LWIP_TCP option)
+ */
+#if !defined MEMP_NUM_TCP_SEG || defined __DOXYGEN__
+#define MEMP_NUM_TCP_SEG                16
+#endif
+
+/**
+ * MEMP_NUM_ALTCP_PCB: the number of simultaneously active altcp layer pcbs.
+ * (requires the LWIP_ALTCP option)
+ * Connections with multiple layers require more than one altcp_pcb (e.g. TLS
+ * over TCP requires 2 altcp_pcbs, one for TLS and one for TCP).
+ */
+#if !defined MEMP_NUM_ALTCP_PCB || defined __DOXYGEN__
+#define MEMP_NUM_ALTCP_PCB              MEMP_NUM_TCP_PCB
+#endif
+
+/**
+ * MEMP_NUM_REASSDATA: the number of IP packets simultaneously queued for
+ * reassembly (whole packets, not fragments!)
+ */
+#if !defined MEMP_NUM_REASSDATA || defined __DOXYGEN__
+#define MEMP_NUM_REASSDATA              5
+#endif
+
+/**
+ * MEMP_NUM_FRAG_PBUF: the number of IP fragments simultaneously sent
+ * (fragments, not whole packets!).
+ * This is only used with LWIP_NETIF_TX_SINGLE_PBUF==0 and only has to be > 1
+ * with DMA-enabled MACs where the packet is not yet sent when netif->output
+ * returns.
+ */
+#if !defined MEMP_NUM_FRAG_PBUF || defined __DOXYGEN__
+#define MEMP_NUM_FRAG_PBUF              15
+#endif
+
+/**
+ * MEMP_NUM_ARP_QUEUE: the number of simultaneously queued outgoing
+ * packets (pbufs) that are waiting for an ARP request (to resolve
+ * their destination address) to finish.
+ * (requires the ARP_QUEUEING option)
+ */
+#if !defined MEMP_NUM_ARP_QUEUE || defined __DOXYGEN__
+#define MEMP_NUM_ARP_QUEUE              30
+#endif
+
+/**
+ * MEMP_NUM_IGMP_GROUP: The number of multicast groups whose network interfaces
+ * can be members at the same time (one per netif - allsystems group -, plus one
+ * per netif membership).
+ * (requires the LWIP_IGMP option)
+ */
+#if !defined MEMP_NUM_IGMP_GROUP || defined __DOXYGEN__
+#define MEMP_NUM_IGMP_GROUP             8
+#endif
+
+/**
+ * The number of sys timeouts used by the core stack (not apps)
+ * The default number of timeouts is calculated here for all enabled modules.
+ */
+#if ESP_LWIP
+#define LWIP_NUM_SYS_TIMEOUT_INTERNAL   (LWIP_TCP + IP_REASSEMBLY + (LWIP_ARP + (ESP_GRATUITOUS_ARP ? 1 : 0)) + (2*LWIP_DHCP + (ESP_DHCPS_TIMER ? 1 : 0)) + LWIP_AUTOIP + LWIP_IGMP + LWIP_DNS + PPP_NUM_TIMEOUTS + (LWIP_IPV6 * (1 + LWIP_IPV6_REASS + LWIP_IPV6_MLD)))
+#else
+#define LWIP_NUM_SYS_TIMEOUT_INTERNAL   (LWIP_TCP + IP_REASSEMBLY + LWIP_ARP + (2*LWIP_DHCP) + LWIP_AUTOIP + LWIP_IGMP + LWIP_DNS + PPP_NUM_TIMEOUTS + (LWIP_IPV6 * (1 + LWIP_IPV6_REASS + LWIP_IPV6_MLD)))
+#endif
+/**
+ * MEMP_NUM_SYS_TIMEOUT: the number of simultaneously active timeouts.
+ * The default number of timeouts is calculated here for all enabled modules.
+ * The formula expects settings to be either '0' or '1'.
+ */
+#if !defined MEMP_NUM_SYS_TIMEOUT || defined __DOXYGEN__
+#define MEMP_NUM_SYS_TIMEOUT            LWIP_NUM_SYS_TIMEOUT_INTERNAL
+#endif
+
+/**
+ * MEMP_NUM_NETBUF: the number of struct netbufs.
+ * (only needed if you use the sequential API, like api_lib.c)
+ */
+#if !defined MEMP_NUM_NETBUF || defined __DOXYGEN__
+#define MEMP_NUM_NETBUF                 2
+#endif
+
+/**
+ * MEMP_NUM_NETCONN: the number of struct netconns.
+ * (only needed if you use the sequential API, like api_lib.c)
+ */
+#if !defined MEMP_NUM_NETCONN || defined __DOXYGEN__
+#define MEMP_NUM_NETCONN                4
+#endif
+
+/**
+ * MEMP_NUM_SELECT_CB: the number of struct lwip_select_cb.
+ * (Only needed if you have LWIP_MPU_COMPATIBLE==1 and use the socket API.
+ * In that case, you need one per thread calling lwip_select.)
+ */
+#if !defined MEMP_NUM_SELECT_CB || defined __DOXYGEN__
+#define MEMP_NUM_SELECT_CB              4
+#endif
+
+/**
+ * MEMP_NUM_TCPIP_MSG_API: the number of struct tcpip_msg, which are used
+ * for callback/timeout API communication.
+ * (only needed if you use tcpip.c)
+ */
+#if !defined MEMP_NUM_TCPIP_MSG_API || defined __DOXYGEN__
+#define MEMP_NUM_TCPIP_MSG_API          8
+#endif
+
+/**
+ * MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used
+ * for incoming packets.
+ * (only needed if you use tcpip.c)
+ */
+#if !defined MEMP_NUM_TCPIP_MSG_INPKT || defined __DOXYGEN__
+#define MEMP_NUM_TCPIP_MSG_INPKT        8
+#endif
+
+/**
+ * MEMP_NUM_NETDB: the number of concurrently running lwip_addrinfo() calls
+ * (before freeing the corresponding memory using lwip_freeaddrinfo()).
+ */
+#if !defined MEMP_NUM_NETDB || defined __DOXYGEN__
+#define MEMP_NUM_NETDB                  1
+#endif
+
+/**
+ * MEMP_NUM_LOCALHOSTLIST: the number of host entries in the local host list
+ * if DNS_LOCAL_HOSTLIST_IS_DYNAMIC==1.
+ */
+#if !defined MEMP_NUM_LOCALHOSTLIST || defined __DOXYGEN__
+#define MEMP_NUM_LOCALHOSTLIST          1
+#endif
+
+/**
+ * PBUF_POOL_SIZE: the number of buffers in the pbuf pool.
+ */
+#if !defined PBUF_POOL_SIZE || defined __DOXYGEN__
+#define PBUF_POOL_SIZE                  16
+#endif
+
+/** MEMP_NUM_API_MSG: the number of concurrently active calls to various
+ * socket, netconn, and tcpip functions
+ */
+#if !defined MEMP_NUM_API_MSG || defined __DOXYGEN__
+#define MEMP_NUM_API_MSG                MEMP_NUM_TCPIP_MSG_API
+#endif
+
+/** MEMP_NUM_DNS_API_MSG: the number of concurrently active calls to netconn_gethostbyname
+ */
+#if !defined MEMP_NUM_DNS_API_MSG || defined __DOXYGEN__
+#define MEMP_NUM_DNS_API_MSG            MEMP_NUM_TCPIP_MSG_API
+#endif
+
+/** MEMP_NUM_SOCKET_SETGETSOCKOPT_DATA: the number of concurrently active calls
+ * to getsockopt/setsockopt
+ */
+#if !defined MEMP_NUM_SOCKET_SETGETSOCKOPT_DATA || defined __DOXYGEN__
+#define MEMP_NUM_SOCKET_SETGETSOCKOPT_DATA MEMP_NUM_TCPIP_MSG_API
+#endif
+
+/** MEMP_NUM_NETIFAPI_MSG: the number of concurrently active calls to the
+ * netifapi functions
+ */
+#if !defined MEMP_NUM_NETIFAPI_MSG || defined __DOXYGEN__
+#define MEMP_NUM_NETIFAPI_MSG           MEMP_NUM_TCPIP_MSG_API
+#endif
+/**
+ * @}
+ */
+
+/*
+   ---------------------------------
+   ---------- ARP options ----------
+   ---------------------------------
+*/
+/**
+ * @defgroup lwip_opts_arp ARP
+ * @ingroup lwip_opts_ipv4
+ * @{
+ */
+/**
+ * LWIP_ARP==1: Enable ARP functionality.
+ */
+#if !defined LWIP_ARP || defined __DOXYGEN__
+#define LWIP_ARP                        1
+#endif
+
+/**
+ * ARP_TABLE_SIZE: Number of active MAC-IP address pairs cached.
+ */
+#if !defined ARP_TABLE_SIZE || defined __DOXYGEN__
+#define ARP_TABLE_SIZE                  10
+#endif
+
+/** the time an ARP entry stays valid after its last update,
+ *  for ARP_TMR_INTERVAL = 1000, this is
+ *  (60 * 5) seconds = 5 minutes.
+ */
+#if !defined ARP_MAXAGE || defined __DOXYGEN__
+#define ARP_MAXAGE                      300
+#endif
+
+/**
+ * ARP_QUEUEING==1: Multiple outgoing packets are queued during hardware address
+ * resolution. By default, only the most recent packet is queued per IP address.
+ * This is sufficient for most protocols and mainly reduces TCP connection
+ * startup time. Set this to 1 if you know your application sends more than one
+ * packet in a row to an IP address that is not in the ARP cache.
+ */
+#if !defined ARP_QUEUEING || defined __DOXYGEN__
+#define ARP_QUEUEING                    0
+#endif
+
+/** The maximum number of packets which may be queued for each
+ *  unresolved address by other network layers. Defaults to 3, 0 means disabled.
+ *  Old packets are dropped, new packets are queued.
+ */
+#if !defined ARP_QUEUE_LEN || defined __DOXYGEN__
+#define ARP_QUEUE_LEN                   3
+#endif
+
+/**
+ * ETHARP_SUPPORT_VLAN==1: support receiving and sending ethernet packets with
+ * VLAN header. See the description of LWIP_HOOK_VLAN_CHECK and
+ * LWIP_HOOK_VLAN_SET hooks to check/set VLAN headers.
+ * Additionally, you can define ETHARP_VLAN_CHECK to an u16_t VLAN ID to check.
+ * If ETHARP_VLAN_CHECK is defined, only VLAN-traffic for this VLAN is accepted.
+ * If ETHARP_VLAN_CHECK is not defined, all traffic is accepted.
+ * Alternatively, define a function/define ETHARP_VLAN_CHECK_FN(eth_hdr, vlan)
+ * that returns 1 to accept a packet or 0 to drop a packet.
+ */
+#if !defined ETHARP_SUPPORT_VLAN || defined __DOXYGEN__
+#define ETHARP_SUPPORT_VLAN             0
+#endif
+
+/** LWIP_ETHERNET==1: enable ethernet support even though ARP might be disabled
+ */
+#if !defined LWIP_ETHERNET || defined __DOXYGEN__
+#define LWIP_ETHERNET                   LWIP_ARP
+#endif
+
+/** ETH_PAD_SIZE: number of bytes added before the ethernet header to ensure
+ * alignment of payload after that header. Since the header is 14 bytes long,
+ * without this padding e.g. addresses in the IP header will not be aligned
+ * on a 32-bit boundary, so setting this to 2 can speed up 32-bit-platforms.
+ */
+#if !defined ETH_PAD_SIZE || defined __DOXYGEN__
+#define ETH_PAD_SIZE                    0
+#endif
+
+/** ETHARP_SUPPORT_STATIC_ENTRIES==1: enable code to support static ARP table
+ * entries (using etharp_add_static_entry/etharp_remove_static_entry).
+ */
+#if !defined ETHARP_SUPPORT_STATIC_ENTRIES || defined __DOXYGEN__
+#define ETHARP_SUPPORT_STATIC_ENTRIES   0
+#endif
+
+/** ETHARP_TABLE_MATCH_NETIF==1: Match netif for ARP table entries.
+ * If disabled, duplicate IP address on multiple netifs are not supported
+ * (but this should only occur for AutoIP).
+ */
+#if !defined ETHARP_TABLE_MATCH_NETIF || defined __DOXYGEN__
+#define ETHARP_TABLE_MATCH_NETIF        !LWIP_SINGLE_NETIF
+#endif
+/**
+ * @}
+ */
+
+/*
+   --------------------------------
+   ---------- IP options ----------
+   --------------------------------
+*/
+/**
+ * @defgroup lwip_opts_ipv4 IPv4
+ * @ingroup lwip_opts
+ * @{
+ */
+/**
+ * LWIP_IPV4==1: Enable IPv4
+ */
+#if !defined LWIP_IPV4 || defined __DOXYGEN__
+#define LWIP_IPV4                       1
+#endif
+
+/**
+ * IP_FORWARD==1: Enables the ability to forward IP packets across network
+ * interfaces. If you are going to run lwIP on a device with only one network
+ * interface, define this to 0.
+ */
+#if !defined IP_FORWARD || defined __DOXYGEN__
+#define IP_FORWARD                      0
+#endif
+
+/**
+ * IP_REASSEMBLY==1: Reassemble incoming fragmented IP packets. Note that
+ * this option does not affect outgoing packet sizes, which can be controlled
+ * via IP_FRAG.
+ */
+#if !defined IP_REASSEMBLY || defined __DOXYGEN__
+#define IP_REASSEMBLY                   1
+#endif
+
+/**
+ * IP_FRAG==1: Fragment outgoing IP packets if their size exceeds MTU. Note
+ * that this option does not affect incoming packet sizes, which can be
+ * controlled via IP_REASSEMBLY.
+ */
+#if !defined IP_FRAG || defined __DOXYGEN__
+#define IP_FRAG                         1
+#endif
+
+#if !LWIP_IPV4
+/* disable IPv4 extensions when IPv4 is disabled */
+#undef IP_FORWARD
+#define IP_FORWARD                      0
+#undef IP_REASSEMBLY
+#define IP_REASSEMBLY                   0
+#undef IP_FRAG
+#define IP_FRAG                         0
+#endif /* !LWIP_IPV4 */
+
+/**
+ * IP_NAPT==1: Enables IPv4 Network Address and Port Translation
+ * Note that IP_FORWARD needs to be enabled for NAPT to work
+ */
+#if !defined IP_NAPT || defined __DOXYGEN__
+#define IP_NAPT                      0
+#endif
+
+/**
+ * IP_OPTIONS_ALLOWED: Defines the behavior for IP options.
+ *      IP_OPTIONS_ALLOWED==0: All packets with IP options are dropped.
+ *      IP_OPTIONS_ALLOWED==1: IP options are allowed (but not parsed).
+ */
+#if !defined IP_OPTIONS_ALLOWED || defined __DOXYGEN__
+#define IP_OPTIONS_ALLOWED              1
+#endif
+
+/**
+ * IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally)
+ * a fragmented IP packet waits for all fragments to arrive. If not all fragments arrived
+ * in this time, the whole packet is discarded.
+ */
+#if !defined IP_REASS_MAXAGE || defined __DOXYGEN__
+#define IP_REASS_MAXAGE                 15
+#endif
+
+/**
+ * IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled.
+ * Since the received pbufs are enqueued, be sure to configure
+ * PBUF_POOL_SIZE > IP_REASS_MAX_PBUFS so that the stack is still able to receive
+ * packets even if the maximum amount of fragments is enqueued for reassembly!
+ * When IPv4 *and* IPv6 are enabled, this even changes to
+ * (PBUF_POOL_SIZE > 2 * IP_REASS_MAX_PBUFS)!
+ */
+#if !defined IP_REASS_MAX_PBUFS || defined __DOXYGEN__
+#define IP_REASS_MAX_PBUFS              10
+#endif
+
+/**
+ * IP_DEFAULT_TTL: Default value for Time-To-Live used by transport layers.
+ */
+#if !defined IP_DEFAULT_TTL || defined __DOXYGEN__
+#define IP_DEFAULT_TTL                  255
+#endif
+
+/**
+ * IP_SOF_BROADCAST=1: Use the SOF_BROADCAST field to enable broadcast
+ * filter per pcb on udp and raw send operations. To enable broadcast filter
+ * on recv operations, you also have to set IP_SOF_BROADCAST_RECV=1.
+ */
+#if !defined IP_SOF_BROADCAST || defined __DOXYGEN__
+#define IP_SOF_BROADCAST                0
+#endif
+
+/**
+ * IP_SOF_BROADCAST_RECV (requires IP_SOF_BROADCAST=1) enable the broadcast
+ * filter on recv operations.
+ */
+#if !defined IP_SOF_BROADCAST_RECV || defined __DOXYGEN__
+#define IP_SOF_BROADCAST_RECV           0
+#endif
+
+/**
+ * IP_FORWARD_ALLOW_TX_ON_RX_NETIF==1: allow ip_forward() to send packets back
+ * out on the netif where it was received. This should only be used for
+ * wireless networks.
+ * ATTENTION: When this is 1, make sure your netif driver correctly marks incoming
+ * link-layer-broadcast/multicast packets as such using the corresponding pbuf flags!
+ */
+#if !defined IP_FORWARD_ALLOW_TX_ON_RX_NETIF || defined __DOXYGEN__
+#define IP_FORWARD_ALLOW_TX_ON_RX_NETIF 0
+#endif
+/**
+ * @}
+ */
+
+/*
+   ----------------------------------
+   ---------- ICMP options ----------
+   ----------------------------------
+*/
+/**
+ * @defgroup lwip_opts_icmp ICMP
+ * @ingroup lwip_opts_ipv4
+ * @{
+ */
+/**
+ * LWIP_ICMP==1: Enable ICMP module inside the IP stack.
+ * Be careful, disable that make your product non-compliant to RFC1122
+ */
+#if !defined LWIP_ICMP || defined __DOXYGEN__
+#define LWIP_ICMP                       1
+#endif
+
+/**
+ * ICMP_TTL: Default value for Time-To-Live used by ICMP packets.
+ */
+#if !defined ICMP_TTL || defined __DOXYGEN__
+#define ICMP_TTL                        IP_DEFAULT_TTL
+#endif
+
+/**
+ * LWIP_BROADCAST_PING==1: respond to broadcast pings (default is unicast only)
+ */
+#if !defined LWIP_BROADCAST_PING || defined __DOXYGEN__
+#define LWIP_BROADCAST_PING             0
+#endif
+
+/**
+ * LWIP_MULTICAST_PING==1: respond to multicast pings (default is unicast only)
+ */
+#if !defined LWIP_MULTICAST_PING || defined __DOXYGEN__
+#define LWIP_MULTICAST_PING             0
+#endif
+/**
+ * @}
+ */
+
+/*
+   ---------------------------------
+   ---------- RAW options ----------
+   ---------------------------------
+*/
+/**
+ * @defgroup lwip_opts_raw RAW
+ * @ingroup lwip_opts_callback
+ * @{
+ */
+/**
+ * LWIP_RAW==1: Enable application layer to hook into the IP layer itself.
+ */
+#if !defined LWIP_RAW || defined __DOXYGEN__
+#define LWIP_RAW                        0
+#endif
+
+/**
+ * LWIP_RAW==1: Enable application layer to hook into the IP layer itself.
+ */
+#if !defined RAW_TTL || defined __DOXYGEN__
+#define RAW_TTL                         IP_DEFAULT_TTL
+#endif
+/**
+ * @}
+ */
+
+/*
+   ----------------------------------
+   ---------- DHCP options ----------
+   ----------------------------------
+*/
+/**
+ * @defgroup lwip_opts_dhcp DHCP
+ * @ingroup lwip_opts_ipv4
+ * @{
+ */
+/**
+ * LWIP_DHCP==1: Enable DHCP module.
+ */
+#if !defined LWIP_DHCP || defined __DOXYGEN__
+#define LWIP_DHCP                       0
+#endif
+#if !LWIP_IPV4
+/* disable DHCP when IPv4 is disabled */
+#undef LWIP_DHCP
+#define LWIP_DHCP                       0
+#endif /* !LWIP_IPV4 */
+
+/**
+ * DHCP_DOES_ARP_CHECK==1: Do an ARP check on the offered address.
+ */
+#if !defined DHCP_DOES_ARP_CHECK || defined __DOXYGEN__
+#define DHCP_DOES_ARP_CHECK             (LWIP_DHCP && LWIP_ARP)
+#endif
+
+/**
+ * LWIP_DHCP_BOOTP_FILE==1: Store offered_si_addr and boot_file_name.
+ */
+#if !defined LWIP_DHCP_BOOTP_FILE || defined __DOXYGEN__
+#define LWIP_DHCP_BOOTP_FILE            0
+#endif
+
+/**
+ * LWIP_DHCP_GETS_NTP==1: Request NTP servers with discover/select. For each
+ * response packet, an callback is called, which has to be provided by the port:
+ * void dhcp_set_ntp_servers(u8_t num_ntp_servers, ip_addr_t* ntp_server_addrs);
+*/
+#if !defined LWIP_DHCP_GET_NTP_SRV || defined __DOXYGEN__
+#define LWIP_DHCP_GET_NTP_SRV           0
+#endif
+
+/**
+ * The maximum of NTP servers requested
+ */
+#if !defined LWIP_DHCP_MAX_NTP_SERVERS || defined __DOXYGEN__
+#define LWIP_DHCP_MAX_NTP_SERVERS       1
+#endif
+
+/**
+ * LWIP_DHCP_MAX_DNS_SERVERS > 0: Request DNS servers with discover/select.
+ * DNS servers received in the response are passed to DNS via @ref dns_setserver()
+ * (up to the maximum limit defined here).
+ */
+#if !defined LWIP_DHCP_MAX_DNS_SERVERS || defined __DOXYGEN__
+#define LWIP_DHCP_MAX_DNS_SERVERS       DNS_MAX_SERVERS
+#endif
+/**
+ * @}
+ */
+
+#ifndef LWIP_DHCP_IP_ADDR_RESTORE
+#define LWIP_DHCP_IP_ADDR_RESTORE()       0
+#endif
+
+#ifndef LWIP_DHCP_IP_ADDR_STORE
+#define LWIP_DHCP_IP_ADDR_STORE()
+#endif
+
+#ifndef LWIP_DHCP_IP_ADDR_ERASE
+#define LWIP_DHCP_IP_ADDR_ERASE(esp_netif)
+#endif
+
+/*
+   ------------------------------------
+   ---------- AUTOIP options ----------
+   ------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_autoip AUTOIP
+ * @ingroup lwip_opts_ipv4
+ * @{
+ */
+/**
+ * LWIP_AUTOIP==1: Enable AUTOIP module.
+ */
+#if !defined LWIP_AUTOIP || defined __DOXYGEN__
+#define LWIP_AUTOIP                     0
+#endif
+#if !LWIP_IPV4
+/* disable AUTOIP when IPv4 is disabled */
+#undef LWIP_AUTOIP
+#define LWIP_AUTOIP                     0
+#endif /* !LWIP_IPV4 */
+
+/**
+ * LWIP_DHCP_AUTOIP_COOP==1: Allow DHCP and AUTOIP to be both enabled on
+ * the same interface at the same time.
+ */
+#if !defined LWIP_DHCP_AUTOIP_COOP || defined __DOXYGEN__
+#define LWIP_DHCP_AUTOIP_COOP           0
+#endif
+
+/**
+ * ESP_IPV6_AUTOCONFIG==1: Enable stateless address autoconfiguration as per RFC 4862.
+ */
+#if !defined ESP_IPV6_AUTOCONFIG
+#define ESP_IPV6_AUTOCONFIG 0
+#endif
+
+/**
+ * LWIP_DHCP_AUTOIP_COOP_TRIES: Set to the number of DHCP DISCOVER probes
+ * that should be sent before falling back on AUTOIP (the DHCP client keeps
+ * running in this case). This can be set as low as 1 to get an AutoIP address
+ * very  quickly, but you should be prepared to handle a changing IP address
+ * when DHCP overrides AutoIP.
+ */
+#if !defined LWIP_DHCP_AUTOIP_COOP_TRIES || defined __DOXYGEN__
+#define LWIP_DHCP_AUTOIP_COOP_TRIES     9
+#endif
+/**
+ * @}
+ */
+
+/*
+   ----------------------------------
+   ----- SNMP MIB2 support      -----
+   ----------------------------------
+*/
+/**
+ * @defgroup lwip_opts_mib2 SNMP MIB2 callbacks
+ * @ingroup lwip_opts_infrastructure
+ * @{
+ */
+/**
+ * LWIP_MIB2_CALLBACKS==1: Turn on SNMP MIB2 callbacks.
+ * Turn this on to get callbacks needed to implement MIB2.
+ * Usually MIB2_STATS should be enabled, too.
+ */
+#if !defined LWIP_MIB2_CALLBACKS || defined __DOXYGEN__
+#define LWIP_MIB2_CALLBACKS             0
+#endif
+/**
+ * @}
+ */
+
+/*
+   ----------------------------------
+   -------- Multicast options -------
+   ----------------------------------
+*/
+/**
+ * @defgroup lwip_opts_multicast Multicast
+ * @ingroup lwip_opts_infrastructure
+ * @{
+ */
+/**
+ * LWIP_MULTICAST_TX_OPTIONS==1: Enable multicast TX support like the socket options
+ * IP_MULTICAST_TTL/IP_MULTICAST_IF/IP_MULTICAST_LOOP, as well as (currently only)
+ * core support for the corresponding IPv6 options.
+ */
+#if !defined LWIP_MULTICAST_TX_OPTIONS || defined __DOXYGEN__
+#define LWIP_MULTICAST_TX_OPTIONS       ((LWIP_IGMP || LWIP_IPV6_MLD) && (LWIP_UDP || LWIP_RAW))
+#endif
+/**
+ * @}
+ */
+
+/*
+   ----------------------------------
+   ---------- IGMP options ----------
+   ----------------------------------
+*/
+/**
+ * @defgroup lwip_opts_igmp IGMP
+ * @ingroup lwip_opts_ipv4
+ * @{
+ */
+/**
+ * LWIP_IGMP==1: Turn on IGMP module.
+ */
+#if !defined LWIP_IGMP || defined __DOXYGEN__
+#define LWIP_IGMP                       0
+#endif
+#if !LWIP_IPV4
+#undef LWIP_IGMP
+#define LWIP_IGMP                       0
+#endif
+/**
+ * @}
+ */
+
+/*
+   ----------------------------------
+   ---------- DNS options -----------
+   ----------------------------------
+*/
+/**
+ * @defgroup lwip_opts_dns DNS
+ * @ingroup lwip_opts_callback
+ * @{
+ */
+/**
+ * LWIP_DNS==1: Turn on DNS module. UDP must be available for DNS
+ * transport.
+ */
+#if !defined LWIP_DNS || defined __DOXYGEN__
+#define LWIP_DNS                        0
+#endif
+
+/** DNS maximum number of entries to maintain locally. */
+#if !defined DNS_TABLE_SIZE || defined __DOXYGEN__
+#define DNS_TABLE_SIZE                  4
+#endif
+
+/** DNS maximum host name length supported in the name table. */
+#if !defined DNS_MAX_NAME_LENGTH || defined __DOXYGEN__
+#define DNS_MAX_NAME_LENGTH             256
+#endif
+
+/** The maximum of DNS servers
+ * The first server can be initialized automatically by defining
+ * DNS_SERVER_ADDRESS(ipaddr), where 'ipaddr' is an 'ip_addr_t*'
+ */
+#if !defined DNS_MAX_SERVERS || defined __DOXYGEN__
+#define DNS_MAX_SERVERS                 2
+#endif
+
+/** DNS maximum number of retries when asking for a name, before "timeout". */
+#if !defined DNS_MAX_RETRIES || defined __DOXYGEN__
+#define DNS_MAX_RETRIES                 4
+#endif
+
+/** DNS do a name checking between the query and the response. */
+#if !defined DNS_DOES_NAME_CHECK || defined __DOXYGEN__
+#define DNS_DOES_NAME_CHECK             1
+#endif
+
+/** LWIP_DNS_SECURE: controls the security level of the DNS implementation
+ * Use all DNS security features by default.
+ * This is overridable but should only be needed by very small targets
+ * or when using against non standard DNS servers. */
+#if !defined LWIP_DNS_SECURE || defined __DOXYGEN__
+#define LWIP_DNS_SECURE (LWIP_DNS_SECURE_RAND_XID | LWIP_DNS_SECURE_NO_MULTIPLE_OUTSTANDING | LWIP_DNS_SECURE_RAND_SRC_PORT)
+#endif
+
+/* A list of DNS security features follows */
+#define LWIP_DNS_SECURE_RAND_XID                1
+#define LWIP_DNS_SECURE_NO_MULTIPLE_OUTSTANDING 2
+#define LWIP_DNS_SECURE_RAND_SRC_PORT           4
+
+/** DNS_LOCAL_HOSTLIST: Implements a local host-to-address list. If enabled, you have to define an initializer:
+ *  \#define DNS_LOCAL_HOSTLIST_INIT {DNS_LOCAL_HOSTLIST_ELEM("host_ip4", IPADDR4_INIT_BYTES(1,2,3,4)), \
+ *                                    DNS_LOCAL_HOSTLIST_ELEM("host_ip6", IPADDR6_INIT_HOST(123, 234, 345, 456)}
+ *
+ *  Instead, you can also use an external function:
+ *  \#define DNS_LOOKUP_LOCAL_EXTERN(x) extern err_t my_lookup_function(const char *name, ip_addr_t *addr, u8_t dns_addrtype)
+ *  that looks up the IP address and returns ERR_OK if found (LWIP_DNS_ADDRTYPE_xxx is passed in dns_addrtype).
+ */
+#if !defined DNS_LOCAL_HOSTLIST || defined __DOXYGEN__
+#define DNS_LOCAL_HOSTLIST              0
+#endif /* DNS_LOCAL_HOSTLIST */
+
+/** If this is turned on, the local host-list can be dynamically changed
+ *  at runtime. */
+#if !defined DNS_LOCAL_HOSTLIST_IS_DYNAMIC || defined __DOXYGEN__
+#define DNS_LOCAL_HOSTLIST_IS_DYNAMIC   0
+#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */
+
+/** Set this to 1 to enable querying ".local" names via mDNS
+ *  using a One-Shot Multicast DNS Query */
+#if !defined LWIP_DNS_SUPPORT_MDNS_QUERIES || defined __DOXYGEN__
+#define LWIP_DNS_SUPPORT_MDNS_QUERIES   0
+#endif
+/**
+ * @}
+ */
+
+/*
+   ---------------------------------
+   ---------- UDP options ----------
+   ---------------------------------
+*/
+/**
+ * @defgroup lwip_opts_udp UDP
+ * @ingroup lwip_opts_callback
+ * @{
+ */
+/**
+ * LWIP_UDP==1: Turn on UDP.
+ */
+#if !defined LWIP_UDP || defined __DOXYGEN__
+#define LWIP_UDP                        1
+#endif
+
+/**
+ * LWIP_UDPLITE==1: Turn on UDP-Lite. (Requires LWIP_UDP)
+ */
+#if !defined LWIP_UDPLITE || defined __DOXYGEN__
+#define LWIP_UDPLITE                    0
+#endif
+
+/**
+ * UDP_TTL: Default Time-To-Live value.
+ */
+#if !defined UDP_TTL || defined __DOXYGEN__
+#define UDP_TTL                         IP_DEFAULT_TTL
+#endif
+
+/**
+ * LWIP_NETBUF_RECVINFO==1: append destination addr and port to every netbuf.
+ */
+#if !defined LWIP_NETBUF_RECVINFO || defined __DOXYGEN__
+#define LWIP_NETBUF_RECVINFO            0
+#endif
+/**
+ * @}
+ */
+
+/*
+   ---------------------------------
+   ---------- TCP options ----------
+   ---------------------------------
+*/
+/**
+ * @defgroup lwip_opts_tcp TCP
+ * @ingroup lwip_opts_callback
+ * @{
+ */
+/**
+ * LWIP_TCP==1: Turn on TCP.
+ */
+#if !defined LWIP_TCP || defined __DOXYGEN__
+#define LWIP_TCP                        1
+#endif
+
+/**
+ * TCP_TTL: Default Time-To-Live value.
+ */
+#if !defined TCP_TTL || defined __DOXYGEN__
+#define TCP_TTL                         IP_DEFAULT_TTL
+#endif
+
+/**
+ * TCP_WND: The size of a TCP window.  This must be at least
+ * (2 * TCP_MSS) for things to work well.
+ * ATTENTION: when using TCP_RCV_SCALE, TCP_WND is the total size
+ * with scaling applied. Maximum window value in the TCP header
+ * will be TCP_WND >> TCP_RCV_SCALE
+ */
+#if !defined TCP_WND || defined __DOXYGEN__
+#define TCP_WND                         (4 * TCP_MSS)
+#endif
+
+/**
+ * TCP_MAXRTX: Maximum number of retransmissions of data segments.
+ */
+#if !defined TCP_MAXRTX || defined __DOXYGEN__
+#define TCP_MAXRTX                      12
+#endif
+
+/**
+ * TCP_SYNMAXRTX: Maximum number of retransmissions of SYN segments.
+ */
+#if !defined TCP_SYNMAXRTX || defined __DOXYGEN__
+#define TCP_SYNMAXRTX                   6
+#endif
+
+/**
+ * TCP_QUEUE_OOSEQ==1: TCP will queue segments that arrive out of order.
+ * Define to 0 if your device is low on memory.
+ */
+#if !defined TCP_QUEUE_OOSEQ || defined __DOXYGEN__
+#define TCP_QUEUE_OOSEQ                 LWIP_TCP
+#endif
+
+/**
+ * LWIP_TCP_SACK_OUT==1: TCP will support sending selective acknowledgements (SACKs).
+ */
+#if !defined LWIP_TCP_SACK_OUT || defined __DOXYGEN__
+#define LWIP_TCP_SACK_OUT               0
+#endif
+
+/**
+ * LWIP_TCP_MAX_SACK_NUM: The maximum number of SACK values to include in TCP segments.
+ * Must be at least 1, but is only used if LWIP_TCP_SACK_OUT is enabled.
+ * NOTE: Even though we never send more than 3 or 4 SACK ranges in a single segment
+ * (depending on other options), setting this option to values greater than 4 is not pointless.
+ * This is basically the max number of SACK ranges we want to keep track of.
+ * As new data is delivered, some of the SACK ranges may be removed or merged.
+ * In that case some of those older SACK ranges may be used again.
+ * The amount of memory used to store SACK ranges is LWIP_TCP_MAX_SACK_NUM * 8 bytes for each TCP PCB.
+ */
+#if !defined LWIP_TCP_MAX_SACK_NUM || defined __DOXYGEN__
+#define LWIP_TCP_MAX_SACK_NUM           4
+#endif
+
+/**
+ * TCP_MSS: TCP Maximum segment size. (default is 536, a conservative default,
+ * you might want to increase this.)
+ * For the receive side, this MSS is advertised to the remote side
+ * when opening a connection. For the transmit size, this MSS sets
+ * an upper limit on the MSS advertised by the remote host.
+ */
+#if !defined TCP_MSS || defined __DOXYGEN__
+#define TCP_MSS                         536
+#endif
+
+/**
+ * TCP_CALCULATE_EFF_SEND_MSS: "The maximum size of a segment that TCP really
+ * sends, the 'effective send MSS,' MUST be the smaller of the send MSS (which
+ * reflects the available reassembly buffer size at the remote host) and the
+ * largest size permitted by the IP layer" (RFC 1122)
+ * Setting this to 1 enables code that checks TCP_MSS against the MTU of the
+ * netif used for a connection and limits the MSS if it would be too big otherwise.
+ */
+#if !defined TCP_CALCULATE_EFF_SEND_MSS || defined __DOXYGEN__
+#define TCP_CALCULATE_EFF_SEND_MSS      1
+#endif
+
+
+/**
+ * TCP_SND_BUF: TCP sender buffer space (bytes).
+ * To achieve good performance, this should be at least 2 * TCP_MSS.
+ */
+#if !defined TCP_SND_BUF || defined __DOXYGEN__
+#define TCP_SND_BUF                     (2 * TCP_MSS)
+#endif
+
+/**
+ * TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least
+ * as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work.
+ */
+#if !defined TCP_SND_QUEUELEN || defined __DOXYGEN__
+#define TCP_SND_QUEUELEN                ((4 * (TCP_SND_BUF) + (TCP_MSS - 1))/(TCP_MSS))
+#endif
+
+/**
+ * TCP_SNDLOWAT: TCP writable space (bytes). This must be less than
+ * TCP_SND_BUF. It is the amount of space which must be available in the
+ * TCP snd_buf for select to return writable (combined with TCP_SNDQUEUELOWAT).
+ */
+#if !defined TCP_SNDLOWAT || defined __DOXYGEN__
+#define TCP_SNDLOWAT                    LWIP_MIN(LWIP_MAX(((TCP_SND_BUF)/2), (2 * TCP_MSS) + 1), (TCP_SND_BUF) - 1)
+#endif
+
+/**
+ * TCP_SNDQUEUELOWAT: TCP writable bufs (pbuf count). This must be less
+ * than TCP_SND_QUEUELEN. If the number of pbufs queued on a pcb drops below
+ * this number, select returns writable (combined with TCP_SNDLOWAT).
+ */
+#if !defined TCP_SNDQUEUELOWAT || defined __DOXYGEN__
+#define TCP_SNDQUEUELOWAT               LWIP_MAX(((TCP_SND_QUEUELEN)/2), 5)
+#endif
+
+/**
+ * TCP_OOSEQ_MAX_BYTES: The default maximum number of bytes queued on ooseq per
+ * pcb if TCP_OOSEQ_BYTES_LIMIT is not defined. Default is 0 (no limit).
+ * Only valid for TCP_QUEUE_OOSEQ==1.
+ */
+#if !defined TCP_OOSEQ_MAX_BYTES || defined __DOXYGEN__
+#define TCP_OOSEQ_MAX_BYTES             0
+#endif
+
+/**
+ * TCP_OOSEQ_BYTES_LIMIT(pcb): Return the maximum number of bytes to be queued
+ * on ooseq per pcb, given the pcb. Only valid for TCP_QUEUE_OOSEQ==1 &&
+ * TCP_OOSEQ_MAX_BYTES==1.
+ * Use this to override TCP_OOSEQ_MAX_BYTES to a dynamic value per pcb.
+ */
+#if !defined TCP_OOSEQ_BYTES_LIMIT
+#if TCP_OOSEQ_MAX_BYTES
+#define TCP_OOSEQ_BYTES_LIMIT(pcb)      TCP_OOSEQ_MAX_BYTES
+#elif defined __DOXYGEN__
+#define TCP_OOSEQ_BYTES_LIMIT(pcb)
+#endif
+#endif
+
+/**
+ * TCP_OOSEQ_MAX_PBUFS: The default maximum number of pbufs queued on ooseq per
+ * pcb if TCP_OOSEQ_BYTES_LIMIT is not defined. Default is 0 (no limit).
+ * Only valid for TCP_QUEUE_OOSEQ==1.
+ */
+#if !defined TCP_OOSEQ_MAX_PBUFS || defined __DOXYGEN__
+#define TCP_OOSEQ_MAX_PBUFS             0
+#endif
+
+/**
+ * TCP_OOSEQ_PBUFS_LIMIT(pcb): Return the maximum number of pbufs to be queued
+ * on ooseq per pcb, given the pcb.  Only valid for TCP_QUEUE_OOSEQ==1 &&
+ * TCP_OOSEQ_MAX_PBUFS==1.
+ * Use this to override TCP_OOSEQ_MAX_PBUFS to a dynamic value per pcb.
+ */
+#if !defined TCP_OOSEQ_PBUFS_LIMIT
+#if TCP_OOSEQ_MAX_PBUFS
+#define TCP_OOSEQ_PBUFS_LIMIT(pcb)      TCP_OOSEQ_MAX_PBUFS
+#elif defined __DOXYGEN__
+#define TCP_OOSEQ_PBUFS_LIMIT(pcb)
+#endif
+#endif
+
+/**
+ * TCP_LISTEN_BACKLOG: Enable the backlog option for tcp listen pcb.
+ */
+#if !defined TCP_LISTEN_BACKLOG || defined __DOXYGEN__
+#define TCP_LISTEN_BACKLOG              0
+#endif
+
+/**
+ * The maximum allowed backlog for TCP listen netconns.
+ * This backlog is used unless another is explicitly specified.
+ * 0xff is the maximum (u8_t).
+ */
+#if !defined TCP_DEFAULT_LISTEN_BACKLOG || defined __DOXYGEN__
+#define TCP_DEFAULT_LISTEN_BACKLOG      0xff
+#endif
+
+/**
+ * TCP_OVERSIZE: The maximum number of bytes that tcp_write may
+ * allocate ahead of time in an attempt to create shorter pbuf chains
+ * for transmission. The meaningful range is 0 to TCP_MSS. Some
+ * suggested values are:
+ *
+ * 0:         Disable oversized allocation. Each tcp_write() allocates a new
+              pbuf (old behaviour).
+ * 1:         Allocate size-aligned pbufs with minimal excess. Use this if your
+ *            scatter-gather DMA requires aligned fragments.
+ * 128:       Limit the pbuf/memory overhead to 20%.
+ * TCP_MSS:   Try to create unfragmented TCP packets.
+ * TCP_MSS/4: Try to create 4 fragments or less per TCP packet.
+ */
+#if !defined TCP_OVERSIZE || defined __DOXYGEN__
+#define TCP_OVERSIZE                    TCP_MSS
+#endif
+
+/**
+ * LWIP_TCP_TIMESTAMPS==1: support the TCP timestamp option.
+ * The timestamp option is currently only used to help remote hosts, it is not
+ * really used locally. Therefore, it is only enabled when a TS option is
+ * received in the initial SYN packet from a remote host.
+ */
+#if !defined LWIP_TCP_TIMESTAMPS || defined __DOXYGEN__
+#define LWIP_TCP_TIMESTAMPS             0
+#endif
+
+/**
+ * TCP_WND_UPDATE_THRESHOLD: difference in window to trigger an
+ * explicit window update
+ */
+#if !defined TCP_WND_UPDATE_THRESHOLD || defined __DOXYGEN__
+#define TCP_WND_UPDATE_THRESHOLD        LWIP_MIN((TCP_WND / 4), (TCP_MSS * 4))
+#endif
+
+/**
+ * LWIP_EVENT_API and LWIP_CALLBACK_API: Only one of these should be set to 1.
+ *     LWIP_EVENT_API==1: The user defines lwip_tcp_event() to receive all
+ *         events (accept, sent, etc) that happen in the system.
+ *     LWIP_CALLBACK_API==1: The PCB callback function is called directly
+ *         for the event. This is the default.
+ */
+#if !defined(LWIP_EVENT_API) && !defined(LWIP_CALLBACK_API) || defined __DOXYGEN__
+#define LWIP_EVENT_API                  0
+#define LWIP_CALLBACK_API               1
+#else
+#ifndef LWIP_EVENT_API
+#define LWIP_EVENT_API                  0
+#endif
+#ifndef LWIP_CALLBACK_API
+#define LWIP_CALLBACK_API               0
+#endif
+#endif
+
+/**
+ * LWIP_WND_SCALE and TCP_RCV_SCALE:
+ * Set LWIP_WND_SCALE to 1 to enable window scaling.
+ * Set TCP_RCV_SCALE to the desired scaling factor (shift count in the
+ * range of [0..14]).
+ * When LWIP_WND_SCALE is enabled but TCP_RCV_SCALE is 0, we can use a large
+ * send window while having a small receive window only.
+ */
+#if !defined LWIP_WND_SCALE || defined __DOXYGEN__
+#define LWIP_WND_SCALE                  0
+#define TCP_RCV_SCALE                   0
+#endif
+
+/**
+ * LWIP_TCP_PCB_NUM_EXT_ARGS:
+ * When this is > 0, every tcp pcb (including listen pcb) includes a number of
+ * additional argument entries in an array (see tcp_ext_arg_alloc_id)
+ */
+#if !defined LWIP_TCP_PCB_NUM_EXT_ARGS || defined __DOXYGEN__
+#define LWIP_TCP_PCB_NUM_EXT_ARGS       0
+#endif
+
+/** LWIP_ALTCP==1: enable the altcp API.
+ * altcp is an abstraction layer that prevents applications linking against the
+ * tcp.h functions but provides the same functionality. It is used to e.g. add
+ * SSL/TLS or proxy-connect support to an application written for the tcp callback
+ * API without that application knowing the protocol details.
+ *
+ * With LWIP_ALTCP==0, applications written against the altcp API can still be
+ * compiled but are directly linked against the tcp.h callback API and then
+ * cannot use layered protocols.
+ *
+ * See @ref altcp_api
+ */
+#if !defined LWIP_ALTCP || defined __DOXYGEN__
+#define LWIP_ALTCP                      0
+#endif
+
+/** LWIP_ALTCP_TLS==1: enable TLS support for altcp API.
+ * This needs a port of the functions in altcp_tls.h to a TLS library.
+ * A port to ARM mbedtls is provided with lwIP, see apps/altcp_tls/ directory
+ * and LWIP_ALTCP_TLS_MBEDTLS option.
+ */
+#if !defined LWIP_ALTCP_TLS || defined __DOXYGEN__
+#define LWIP_ALTCP_TLS                  0
+#endif
+
+#if ESP_LWIP
+#if !defined LWIP_TCP_RTO_TIME || defined __DOXYGEN__
+#define LWIP_TCP_RTO_TIME             3000
+#endif
+#endif
+/**
+ * @}
+ */
+
+/*
+   ----------------------------------
+   ---------- Pbuf options ----------
+   ----------------------------------
+*/
+/**
+ * @defgroup lwip_opts_pbuf PBUF
+ * @ingroup lwip_opts
+ * @{
+ */
+/**
+ * PBUF_LINK_HLEN: the number of bytes that should be allocated for a
+ * link level header. The default is 14, the standard value for
+ * Ethernet.
+ */
+#if !defined PBUF_LINK_HLEN || defined __DOXYGEN__
+#if defined LWIP_HOOK_VLAN_SET && !defined __DOXYGEN__
+#define PBUF_LINK_HLEN                  (18 + ETH_PAD_SIZE)
+#else /* LWIP_HOOK_VLAN_SET */
+#define PBUF_LINK_HLEN                  (14 + ETH_PAD_SIZE)
+#endif /* LWIP_HOOK_VLAN_SET */
+#endif
+
+/**
+ * PBUF_LINK_ENCAPSULATION_HLEN: the number of bytes that should be allocated
+ * for an additional encapsulation header before ethernet headers (e.g. 802.11)
+ */
+#if !defined PBUF_LINK_ENCAPSULATION_HLEN || defined __DOXYGEN__
+#define PBUF_LINK_ENCAPSULATION_HLEN    0
+#endif
+
+/**
+ * PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. The default is
+ * designed to accommodate single full size TCP frame in one pbuf, including
+ * TCP_MSS, IP header, and link header.
+ */
+#if !defined PBUF_POOL_BUFSIZE || defined __DOXYGEN__
+#define PBUF_POOL_BUFSIZE               LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_ENCAPSULATION_HLEN+PBUF_LINK_HLEN)
+#endif
+
+/**
+ * LWIP_PBUF_REF_T: Refcount type in pbuf.
+ * Default width of u8_t can be increased if 255 refs are not enough for you.
+ */
+#if !defined LWIP_PBUF_REF_T || defined __DOXYGEN__
+#define LWIP_PBUF_REF_T                 u8_t
+#endif
+
+/**
+ * LWIP_PBUF_CUSTOM_DATA: Store private data on pbufs (e.g. timestamps)
+ * This extends struct pbuf so user can store custom data on every pbuf.
+ */
+#if !defined LWIP_PBUF_CUSTOM_DATA || defined __DOXYGEN__
+#define LWIP_PBUF_CUSTOM_DATA
+#endif
+/**
+ * @}
+ */
+
+/*
+   ------------------------------------------------
+   ---------- Network Interfaces options ----------
+   ------------------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_netif NETIF
+ * @ingroup lwip_opts
+ * @{
+ */
+/**
+ * LWIP_SINGLE_NETIF==1: use a single netif only. This is the common case for
+ * small real-life targets. Some code like routing etc. can be left out.
+ */
+#if !defined LWIP_SINGLE_NETIF || defined __DOXYGEN__
+#define LWIP_SINGLE_NETIF               0
+#endif
+
+/**
+ * LWIP_NETIF_HOSTNAME==1: use DHCP_OPTION_HOSTNAME with netif's hostname
+ * field.
+ */
+#if !defined LWIP_NETIF_HOSTNAME || defined __DOXYGEN__
+#define LWIP_NETIF_HOSTNAME             0
+#endif
+
+/**
+ * LWIP_NETIF_API==1: Support netif api (in netifapi.c)
+ */
+#if !defined LWIP_NETIF_API || defined __DOXYGEN__
+#define LWIP_NETIF_API                  0
+#endif
+
+/**
+ * LWIP_NETIF_STATUS_CALLBACK==1: Support a callback function whenever an interface
+ * changes its up/down status (i.e., due to DHCP IP acquisition)
+ */
+#if !defined LWIP_NETIF_STATUS_CALLBACK || defined __DOXYGEN__
+#define LWIP_NETIF_STATUS_CALLBACK      0
+#endif
+
+/**
+ * LWIP_NETIF_EXT_STATUS_CALLBACK==1: Support an extended callback function 
+ * for several netif related event that supports multiple subscribers.
+ * @see netif_ext_status_callback
+ */
+#if !defined LWIP_NETIF_EXT_STATUS_CALLBACK || defined __DOXYGEN__
+#define LWIP_NETIF_EXT_STATUS_CALLBACK  0
+#endif
+
+/**
+ * LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface
+ * whenever the link changes (i.e., link down)
+ */
+#if !defined LWIP_NETIF_LINK_CALLBACK || defined __DOXYGEN__
+#define LWIP_NETIF_LINK_CALLBACK        0
+#endif
+
+/**
+ * LWIP_NETIF_REMOVE_CALLBACK==1: Support a callback function that is called
+ * when a netif has been removed
+ */
+#if !defined LWIP_NETIF_REMOVE_CALLBACK || defined __DOXYGEN__
+#define LWIP_NETIF_REMOVE_CALLBACK      0
+#endif
+
+/**
+ * LWIP_NETIF_HWADDRHINT==1: Cache link-layer-address hints (e.g. table
+ * indices) in struct netif. TCP and UDP can make use of this to prevent
+ * scanning the ARP table for every sent packet. While this is faster for big
+ * ARP tables or many concurrent connections, it might be counterproductive
+ * if you have a tiny ARP table or if there never are concurrent connections.
+ */
+#if !defined LWIP_NETIF_HWADDRHINT || defined __DOXYGEN__
+#define LWIP_NETIF_HWADDRHINT           0
+#endif
+
+/**
+ * LWIP_NETIF_TX_SINGLE_PBUF: if this is set to 1, lwIP *tries* to put all data
+ * to be sent into one single pbuf. This is for compatibility with DMA-enabled
+ * MACs that do not support scatter-gather.
+ * Beware that this might involve CPU-memcpy before transmitting that would not
+ * be needed without this flag! Use this only if you need to!
+ *
+ * ATTENTION: a driver should *NOT* rely on getting single pbufs but check TX
+ * pbufs for being in one piece. If not, @ref pbuf_clone can be used to get
+ * a single pbuf:
+ *   if (p->next != NULL) {
+ *     struct pbuf *q = pbuf_clone(PBUF_RAW, PBUF_RAM, p);
+ *     if (q == NULL) {
+ *       return ERR_MEM;
+ *     }
+ *     p = q; ATTENTION: do NOT free the old 'p' as the ref belongs to the caller!
+ *   }
+ */
+#if !defined LWIP_NETIF_TX_SINGLE_PBUF || defined __DOXYGEN__
+#define LWIP_NETIF_TX_SINGLE_PBUF       0
+#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
+
+/**
+ * LWIP_NUM_NETIF_CLIENT_DATA: Number of clients that may store
+ * data in client_data member array of struct netif (max. 256).
+ */
+#if !defined LWIP_NUM_NETIF_CLIENT_DATA || defined __DOXYGEN__
+#define LWIP_NUM_NETIF_CLIENT_DATA      0
+#endif
+/**
+ * @}
+ */
+
+/*
+   ------------------------------------
+   ---------- LOOPIF options ----------
+   ------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_loop Loopback interface
+ * @ingroup lwip_opts_netif
+ * @{
+ */
+/**
+ * LWIP_HAVE_LOOPIF==1: Support loop interface (127.0.0.1).
+ * This is only needed when no real netifs are available. If at least one other
+ * netif is available, loopback traffic uses this netif.
+ */
+#if !defined LWIP_HAVE_LOOPIF || defined __DOXYGEN__
+#define LWIP_HAVE_LOOPIF                (LWIP_NETIF_LOOPBACK && !LWIP_SINGLE_NETIF)
+#endif
+
+/**
+ * LWIP_LOOPIF_MULTICAST==1: Support multicast/IGMP on loop interface (127.0.0.1).
+ */
+#if !defined LWIP_LOOPIF_MULTICAST || defined __DOXYGEN__
+#define LWIP_LOOPIF_MULTICAST           0
+#endif
+
+/**
+ * LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP
+ * address equal to the netif IP address, looping them back up the stack.
+ */
+#if !defined LWIP_NETIF_LOOPBACK || defined __DOXYGEN__
+#define LWIP_NETIF_LOOPBACK             0
+#endif
+
+/**
+ * LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback
+ * sending for each netif (0 = disabled)
+ */
+#if !defined LWIP_LOOPBACK_MAX_PBUFS || defined __DOXYGEN__
+#define LWIP_LOOPBACK_MAX_PBUFS         0
+#endif
+
+/**
+ * LWIP_NETIF_LOOPBACK_MULTITHREADING: Indicates whether threading is enabled in
+ * the system, as netifs must change how they behave depending on this setting
+ * for the LWIP_NETIF_LOOPBACK option to work.
+ * Setting this is needed to avoid reentering non-reentrant functions like
+ * tcp_input().
+ *    LWIP_NETIF_LOOPBACK_MULTITHREADING==1: Indicates that the user is using a
+ *       multithreaded environment like tcpip.c. In this case, netif->input()
+ *       is called directly.
+ *    LWIP_NETIF_LOOPBACK_MULTITHREADING==0: Indicates a polling (or NO_SYS) setup.
+ *       The packets are put on a list and netif_poll() must be called in
+ *       the main application loop.
+ */
+#if !defined LWIP_NETIF_LOOPBACK_MULTITHREADING || defined __DOXYGEN__
+#define LWIP_NETIF_LOOPBACK_MULTITHREADING    (!NO_SYS)
+#endif
+/**
+ * @}
+ */
+
+/*
+   ------------------------------------
+   ---------- Thread options ----------
+   ------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_thread Threading
+ * @ingroup lwip_opts_infrastructure
+ * @{
+ */
+/**
+ * TCPIP_THREAD_NAME: The name assigned to the main tcpip thread.
+ */
+#if !defined TCPIP_THREAD_NAME || defined __DOXYGEN__
+#define TCPIP_THREAD_NAME               "tcpip_thread"
+#endif
+
+/**
+ * TCPIP_THREAD_STACKSIZE: The stack size used by the main tcpip thread.
+ * The stack size value itself is platform-dependent, but is passed to
+ * sys_thread_new() when the thread is created.
+ */
+#if !defined TCPIP_THREAD_STACKSIZE || defined __DOXYGEN__
+#define TCPIP_THREAD_STACKSIZE          0
+#endif
+
+/**
+ * TCPIP_THREAD_PRIO: The priority assigned to the main tcpip thread.
+ * The priority value itself is platform-dependent, but is passed to
+ * sys_thread_new() when the thread is created.
+ */
+#if !defined TCPIP_THREAD_PRIO || defined __DOXYGEN__
+#define TCPIP_THREAD_PRIO               1
+#endif
+
+/**
+ * TCPIP_MBOX_SIZE: The mailbox size for the tcpip thread messages
+ * The queue size value itself is platform-dependent, but is passed to
+ * sys_mbox_new() when tcpip_init is called.
+ */
+#if !defined TCPIP_MBOX_SIZE || defined __DOXYGEN__
+#define TCPIP_MBOX_SIZE                 0
+#endif
+
+/**
+ * Define this to something that triggers a watchdog. This is called from
+ * tcpip_thread after processing a message.
+ */
+#if !defined LWIP_TCPIP_THREAD_ALIVE || defined __DOXYGEN__
+#define LWIP_TCPIP_THREAD_ALIVE()
+#endif
+
+/**
+ * SLIPIF_THREAD_NAME: The name assigned to the slipif_loop thread.
+ */
+#if !defined SLIPIF_THREAD_NAME || defined __DOXYGEN__
+#define SLIPIF_THREAD_NAME              "slipif_loop"
+#endif
+
+/**
+ * SLIP_THREAD_STACKSIZE: The stack size used by the slipif_loop thread.
+ * The stack size value itself is platform-dependent, but is passed to
+ * sys_thread_new() when the thread is created.
+ */
+#if !defined SLIPIF_THREAD_STACKSIZE || defined __DOXYGEN__
+#define SLIPIF_THREAD_STACKSIZE         0
+#endif
+
+/**
+ * SLIPIF_THREAD_PRIO: The priority assigned to the slipif_loop thread.
+ * The priority value itself is platform-dependent, but is passed to
+ * sys_thread_new() when the thread is created.
+ */
+#if !defined SLIPIF_THREAD_PRIO || defined __DOXYGEN__
+#define SLIPIF_THREAD_PRIO              1
+#endif
+
+/**
+ * DEFAULT_THREAD_NAME: The name assigned to any other lwIP thread.
+ */
+#if !defined DEFAULT_THREAD_NAME || defined __DOXYGEN__
+#define DEFAULT_THREAD_NAME             "lwIP"
+#endif
+
+/**
+ * DEFAULT_THREAD_STACKSIZE: The stack size used by any other lwIP thread.
+ * The stack size value itself is platform-dependent, but is passed to
+ * sys_thread_new() when the thread is created.
+ */
+#if !defined DEFAULT_THREAD_STACKSIZE || defined __DOXYGEN__
+#define DEFAULT_THREAD_STACKSIZE        0
+#endif
+
+/**
+ * DEFAULT_THREAD_PRIO: The priority assigned to any other lwIP thread.
+ * The priority value itself is platform-dependent, but is passed to
+ * sys_thread_new() when the thread is created.
+ */
+#if !defined DEFAULT_THREAD_PRIO || defined __DOXYGEN__
+#define DEFAULT_THREAD_PRIO             1
+#endif
+
+/**
+ * DEFAULT_RAW_RECVMBOX_SIZE: The mailbox size for the incoming packets on a
+ * NETCONN_RAW. The queue size value itself is platform-dependent, but is passed
+ * to sys_mbox_new() when the recvmbox is created.
+ */
+#if !defined DEFAULT_RAW_RECVMBOX_SIZE || defined __DOXYGEN__
+#define DEFAULT_RAW_RECVMBOX_SIZE       0
+#endif
+
+/**
+ * DEFAULT_UDP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a
+ * NETCONN_UDP. The queue size value itself is platform-dependent, but is passed
+ * to sys_mbox_new() when the recvmbox is created.
+ */
+#if !defined DEFAULT_UDP_RECVMBOX_SIZE || defined __DOXYGEN__
+#define DEFAULT_UDP_RECVMBOX_SIZE       0
+#endif
+
+/**
+ * DEFAULT_TCP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a
+ * NETCONN_TCP. The queue size value itself is platform-dependent, but is passed
+ * to sys_mbox_new() when the recvmbox is created.
+ */
+#if !defined DEFAULT_TCP_RECVMBOX_SIZE || defined __DOXYGEN__
+#define DEFAULT_TCP_RECVMBOX_SIZE       0
+#endif
+
+/**
+ * DEFAULT_ACCEPTMBOX_SIZE: The mailbox size for the incoming connections.
+ * The queue size value itself is platform-dependent, but is passed to
+ * sys_mbox_new() when the acceptmbox is created.
+ */
+#if !defined DEFAULT_ACCEPTMBOX_SIZE || defined __DOXYGEN__
+#define DEFAULT_ACCEPTMBOX_SIZE         0
+#endif
+/**
+ * @}
+ */
+
+/*
+   ----------------------------------------------
+   ---------- Sequential layer options ----------
+   ----------------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_netconn Netconn
+ * @ingroup lwip_opts_threadsafe_apis
+ * @{
+ */
+/**
+ * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c)
+ */
+#if !defined LWIP_NETCONN || defined __DOXYGEN__
+#define LWIP_NETCONN                    1
+#endif
+
+/** LWIP_TCPIP_TIMEOUT==1: Enable tcpip_timeout/tcpip_untimeout to create
+ * timers running in tcpip_thread from another thread.
+ */
+#if !defined LWIP_TCPIP_TIMEOUT || defined __DOXYGEN__
+#define LWIP_TCPIP_TIMEOUT              0
+#endif
+
+/** LWIP_NETCONN_SEM_PER_THREAD==1: Use one (thread-local) semaphore per
+ * thread calling socket/netconn functions instead of allocating one
+ * semaphore per netconn (and per select etc.)
+ * ATTENTION: a thread-local semaphore for API calls is needed:
+ * - LWIP_NETCONN_THREAD_SEM_GET() returning a sys_sem_t*
+ * - LWIP_NETCONN_THREAD_SEM_ALLOC() creating the semaphore
+ * - LWIP_NETCONN_THREAD_SEM_FREE() freeing the semaphore
+ * The latter 2 can be invoked up by calling netconn_thread_init()/netconn_thread_cleanup().
+ * Ports may call these for threads created with sys_thread_new().
+ */
+#if !defined LWIP_NETCONN_SEM_PER_THREAD || defined __DOXYGEN__
+#define LWIP_NETCONN_SEM_PER_THREAD     0
+#endif
+
+/** LWIP_NETCONN_FULLDUPLEX==1: Enable code that allows reading from one thread,
+ * writing from a 2nd thread and closing from a 3rd thread at the same time.
+ * ATTENTION: This is currently really alpha! Some requirements:
+ * - LWIP_NETCONN_SEM_PER_THREAD==1 is required to use one socket/netconn from
+ *   multiple threads at once
+ * - sys_mbox_free() has to unblock receive tasks waiting on recvmbox/acceptmbox
+ *   and prevent a task pending on this during/after deletion
+ */
+#if !defined LWIP_NETCONN_FULLDUPLEX || defined __DOXYGEN__
+#define LWIP_NETCONN_FULLDUPLEX         0
+#endif
+/**
+ * @}
+ */
+
+/*
+   ------------------------------------
+   ---------- Socket options ----------
+   ------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_socket Sockets
+ * @ingroup lwip_opts_threadsafe_apis
+ * @{
+ */
+/**
+ * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c)
+ */
+#if !defined LWIP_SOCKET || defined __DOXYGEN__
+#define LWIP_SOCKET                     1
+#endif
+
+/**
+ * LWIP_COMPAT_SOCKETS==1: Enable BSD-style sockets functions names through defines.
+ * LWIP_COMPAT_SOCKETS==2: Same as ==1 but correctly named functions are created.
+ * While this helps code completion, it might conflict with existing libraries.
+ * (only used if you use sockets.c)
+ */
+#if !defined LWIP_COMPAT_SOCKETS || defined __DOXYGEN__
+#define LWIP_COMPAT_SOCKETS             1
+#endif
+
+/**
+ * LWIP_POSIX_SOCKETS_IO_NAMES==1: Enable POSIX-style sockets functions names.
+ * Disable this option if you use a POSIX operating system that uses the same
+ * names (read, write & close). (only used if you use sockets.c)
+ */
+#if !defined LWIP_POSIX_SOCKETS_IO_NAMES || defined __DOXYGEN__
+#define LWIP_POSIX_SOCKETS_IO_NAMES     1
+#endif
+
+/**
+ * LWIP_SOCKET_OFFSET==n: Increases the file descriptor number created by LwIP with n.
+ * This can be useful when there are multiple APIs which create file descriptors.
+ * When they all start with a different offset and you won't make them overlap you can
+ * re implement read/write/close/ioctl/fnctl to send the requested action to the right
+ * library (sharing select will need more work though).
+ */
+#if !defined LWIP_SOCKET_OFFSET || defined __DOXYGEN__
+#define LWIP_SOCKET_OFFSET              0
+#endif
+
+/**
+ * LWIP_TCP_KEEPALIVE==1: Enable TCP_KEEPIDLE, TCP_KEEPINTVL and TCP_KEEPCNT
+ * options processing. Note that TCP_KEEPIDLE and TCP_KEEPINTVL have to be set
+ * in seconds. (does not require sockets.c, and will affect tcp.c)
+ */
+#if !defined LWIP_TCP_KEEPALIVE || defined __DOXYGEN__
+#define LWIP_TCP_KEEPALIVE              0
+#endif
+
+/**
+ * LWIP_SO_SNDTIMEO==1: Enable send timeout for sockets/netconns and
+ * SO_SNDTIMEO processing.
+ */
+#if !defined LWIP_SO_SNDTIMEO || defined __DOXYGEN__
+#define LWIP_SO_SNDTIMEO                0
+#endif
+
+/**
+ * LWIP_SO_RCVTIMEO==1: Enable receive timeout for sockets/netconns and
+ * SO_RCVTIMEO processing.
+ */
+#if !defined LWIP_SO_RCVTIMEO || defined __DOXYGEN__
+#define LWIP_SO_RCVTIMEO                0
+#endif
+
+/**
+ * LWIP_SO_SNDRCVTIMEO_NONSTANDARD==1: SO_RCVTIMEO/SO_SNDTIMEO take an int
+ * (milliseconds, much like winsock does) instead of a struct timeval (default).
+ */
+#if !defined LWIP_SO_SNDRCVTIMEO_NONSTANDARD || defined __DOXYGEN__
+#define LWIP_SO_SNDRCVTIMEO_NONSTANDARD 0
+#endif
+
+/**
+ * LWIP_SO_RCVBUF==1: Enable SO_RCVBUF processing.
+ */
+#if !defined LWIP_SO_RCVBUF || defined __DOXYGEN__
+#define LWIP_SO_RCVBUF                  0
+#endif
+
+/**
+ * LWIP_SO_LINGER==1: Enable SO_LINGER processing.
+ */
+#if !defined LWIP_SO_LINGER || defined __DOXYGEN__
+#define LWIP_SO_LINGER                  0
+#endif
+
+/**
+ * If LWIP_SO_RCVBUF is used, this is the default value for recv_bufsize.
+ */
+#if !defined RECV_BUFSIZE_DEFAULT || defined __DOXYGEN__
+#define RECV_BUFSIZE_DEFAULT            INT_MAX
+#endif
+
+/**
+ * By default, TCP socket/netconn close waits 20 seconds max to send the FIN
+ */
+#if !defined LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT || defined __DOXYGEN__
+#define LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT 20000
+#endif
+
+/**
+ * SO_REUSE==1: Enable SO_REUSEADDR option.
+ */
+#if !defined SO_REUSE || defined __DOXYGEN__
+#define SO_REUSE                        0
+#endif
+
+/**
+ * SO_REUSE_RXTOALL==1: Pass a copy of incoming broadcast/multicast packets
+ * to all local matches if SO_REUSEADDR is turned on.
+ * WARNING: Adds a memcpy for every packet if passing to more than one pcb!
+ */
+#if !defined SO_REUSE_RXTOALL || defined __DOXYGEN__
+#define SO_REUSE_RXTOALL                0
+#endif
+
+/**
+ * LWIP_FIONREAD_LINUXMODE==0 (default): ioctl/FIONREAD returns the amount of
+ * pending data in the network buffer. This is the way windows does it. It's
+ * the default for lwIP since it is smaller.
+ * LWIP_FIONREAD_LINUXMODE==1: ioctl/FIONREAD returns the size of the next
+ * pending datagram in bytes. This is the way linux does it. This code is only
+ * here for compatibility.
+ */
+#if !defined LWIP_FIONREAD_LINUXMODE || defined __DOXYGEN__
+#define LWIP_FIONREAD_LINUXMODE         0
+#endif
+
+/**
+ * LWIP_SOCKET_SELECT==1 (default): enable select() for sockets (uses a netconn
+ * callback to keep track of events).
+ * This saves RAM (counters per socket) and code (netconn event callback), which
+ * should improve performance a bit).
+ */
+#if !defined LWIP_SOCKET_SELECT || defined __DOXYGEN__
+#define LWIP_SOCKET_SELECT              1
+#endif
+
+/**
+ * LWIP_SOCKET_POLL==1 (default): enable poll() for sockets (including
+ * struct pollfd, nfds_t, and constants)
+ */
+#if !defined LWIP_SOCKET_POLL || defined __DOXYGEN__
+#define LWIP_SOCKET_POLL                1
+#endif
+/**
+ * @}
+ */
+
+/*
+   ----------------------------------------
+   ---------- Statistics options ----------
+   ----------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_stats Statistics
+ * @ingroup lwip_opts_debug
+ * @{
+ */
+/**
+ * LWIP_STATS==1: Enable statistics collection in lwip_stats.
+ */
+#if !defined LWIP_STATS || defined __DOXYGEN__
+#define LWIP_STATS                      1
+#endif
+
+#if LWIP_STATS
+
+/**
+ * LWIP_STATS_DISPLAY==1: Compile in the statistics output functions.
+ */
+#if !defined LWIP_STATS_DISPLAY || defined __DOXYGEN__
+#define LWIP_STATS_DISPLAY              0
+#endif
+
+/**
+ * LINK_STATS==1: Enable link stats.
+ */
+#if !defined LINK_STATS || defined __DOXYGEN__
+#define LINK_STATS                      1
+#endif
+
+/**
+ * ETHARP_STATS==1: Enable etharp stats.
+ */
+#if !defined ETHARP_STATS || defined __DOXYGEN__
+#define ETHARP_STATS                    (LWIP_ARP)
+#endif
+
+/**
+ * IP_STATS==1: Enable IP stats.
+ */
+#if !defined IP_STATS || defined __DOXYGEN__
+#define IP_STATS                        1
+#endif
+
+/**
+ * IPFRAG_STATS==1: Enable IP fragmentation stats. Default is
+ * on if using either frag or reass.
+ */
+#if !defined IPFRAG_STATS || defined __DOXYGEN__
+#define IPFRAG_STATS                    (IP_REASSEMBLY || IP_FRAG)
+#endif
+
+/**
+ * ICMP_STATS==1: Enable ICMP stats.
+ */
+#if !defined ICMP_STATS || defined __DOXYGEN__
+#define ICMP_STATS                      1
+#endif
+
+/**
+ * IGMP_STATS==1: Enable IGMP stats.
+ */
+#if !defined IGMP_STATS || defined __DOXYGEN__
+#define IGMP_STATS                      (LWIP_IGMP)
+#endif
+
+/**
+ * UDP_STATS==1: Enable UDP stats. Default is on if
+ * UDP enabled, otherwise off.
+ */
+#if !defined UDP_STATS || defined __DOXYGEN__
+#define UDP_STATS                       (LWIP_UDP)
+#endif
+
+/**
+ * TCP_STATS==1: Enable TCP stats. Default is on if TCP
+ * enabled, otherwise off.
+ */
+#if !defined TCP_STATS || defined __DOXYGEN__
+#define TCP_STATS                       (LWIP_TCP)
+#endif
+
+/**
+ * MEM_STATS==1: Enable mem.c stats.
+ */
+#if !defined MEM_STATS || defined __DOXYGEN__
+#define MEM_STATS                       ((MEM_LIBC_MALLOC == 0) && (MEM_USE_POOLS == 0))
+#endif
+
+/**
+ * MEMP_STATS==1: Enable memp.c pool stats.
+ */
+#if !defined MEMP_STATS || defined __DOXYGEN__
+#define MEMP_STATS                      (MEMP_MEM_MALLOC == 0)
+#endif
+
+/**
+ * SYS_STATS==1: Enable system stats (sem and mbox counts, etc).
+ */
+#if !defined SYS_STATS || defined __DOXYGEN__
+#define SYS_STATS                       (NO_SYS == 0)
+#endif
+
+/**
+ * IP6_STATS==1: Enable IPv6 stats.
+ */
+#if !defined IP6_STATS || defined __DOXYGEN__
+#define IP6_STATS                       (LWIP_IPV6)
+#endif
+
+/**
+ * ICMP6_STATS==1: Enable ICMP for IPv6 stats.
+ */
+#if !defined ICMP6_STATS || defined __DOXYGEN__
+#define ICMP6_STATS                     (LWIP_IPV6 && LWIP_ICMP6)
+#endif
+
+/**
+ * IP6_FRAG_STATS==1: Enable IPv6 fragmentation stats.
+ */
+#if !defined IP6_FRAG_STATS || defined __DOXYGEN__
+#define IP6_FRAG_STATS                  (LWIP_IPV6 && (LWIP_IPV6_FRAG || LWIP_IPV6_REASS))
+#endif
+
+/**
+ * MLD6_STATS==1: Enable MLD for IPv6 stats.
+ */
+#if !defined MLD6_STATS || defined __DOXYGEN__
+#define MLD6_STATS                      (LWIP_IPV6 && LWIP_IPV6_MLD)
+#endif
+
+/**
+ * ND6_STATS==1: Enable Neighbor discovery for IPv6 stats.
+ */
+#if !defined ND6_STATS || defined __DOXYGEN__
+#define ND6_STATS                       (LWIP_IPV6)
+#endif
+
+/**
+ * MIB2_STATS==1: Stats for SNMP MIB2.
+ */
+#if !defined MIB2_STATS || defined __DOXYGEN__
+#define MIB2_STATS                      0
+#endif
+
+#else
+
+#define LINK_STATS                      0
+#define ETHARP_STATS                    0
+#define IP_STATS                        0
+#define IPFRAG_STATS                    0
+#define ICMP_STATS                      0
+#define IGMP_STATS                      0
+#define UDP_STATS                       0
+#define TCP_STATS                       0
+#define MEM_STATS                       0
+#define MEMP_STATS                      0
+#define SYS_STATS                       0
+#define LWIP_STATS_DISPLAY              0
+#define IP6_STATS                       0
+#define ICMP6_STATS                     0
+#define IP6_FRAG_STATS                  0
+#define MLD6_STATS                      0
+#define ND6_STATS                       0
+#define MIB2_STATS                      0
+
+#endif /* LWIP_STATS */
+/**
+ * @}
+ */
+
+/*
+   --------------------------------------
+   ---------- Checksum options ----------
+   --------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_checksum Checksum
+ * @ingroup lwip_opts_infrastructure
+ * @{
+ */
+/**
+ * LWIP_CHECKSUM_CTRL_PER_NETIF==1: Checksum generation/check can be enabled/disabled
+ * per netif.
+ * ATTENTION: if enabled, the CHECKSUM_GEN_* and CHECKSUM_CHECK_* defines must be enabled!
+ */
+#if !defined LWIP_CHECKSUM_CTRL_PER_NETIF || defined __DOXYGEN__
+#define LWIP_CHECKSUM_CTRL_PER_NETIF    0
+#endif
+
+/**
+ * CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets.
+ */
+#if !defined CHECKSUM_GEN_IP || defined __DOXYGEN__
+#define CHECKSUM_GEN_IP                 1
+#endif
+
+/**
+ * CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets.
+ */
+#if !defined CHECKSUM_GEN_UDP || defined __DOXYGEN__
+#define CHECKSUM_GEN_UDP                1
+#endif
+
+/**
+ * CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets.
+ */
+#if !defined CHECKSUM_GEN_TCP || defined __DOXYGEN__
+#define CHECKSUM_GEN_TCP                1
+#endif
+
+/**
+ * CHECKSUM_GEN_ICMP==1: Generate checksums in software for outgoing ICMP packets.
+ */
+#if !defined CHECKSUM_GEN_ICMP || defined __DOXYGEN__
+#define CHECKSUM_GEN_ICMP               1
+#endif
+
+/**
+ * CHECKSUM_GEN_ICMP6==1: Generate checksums in software for outgoing ICMP6 packets.
+ */
+#if !defined CHECKSUM_GEN_ICMP6 || defined __DOXYGEN__
+#define CHECKSUM_GEN_ICMP6              1
+#endif
+
+/**
+ * CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets.
+ */
+#if !defined CHECKSUM_CHECK_IP || defined __DOXYGEN__
+#define CHECKSUM_CHECK_IP               1
+#endif
+
+/**
+ * CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets.
+ */
+#if !defined CHECKSUM_CHECK_UDP || defined __DOXYGEN__
+#define CHECKSUM_CHECK_UDP              1
+#endif
+
+/**
+ * CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets.
+ */
+#if !defined CHECKSUM_CHECK_TCP || defined __DOXYGEN__
+#define CHECKSUM_CHECK_TCP              1
+#endif
+
+/**
+ * CHECKSUM_CHECK_ICMP==1: Check checksums in software for incoming ICMP packets.
+ */
+#if !defined CHECKSUM_CHECK_ICMP || defined __DOXYGEN__
+#define CHECKSUM_CHECK_ICMP             1
+#endif
+
+/**
+ * CHECKSUM_CHECK_ICMP6==1: Check checksums in software for incoming ICMPv6 packets
+ */
+#if !defined CHECKSUM_CHECK_ICMP6 || defined __DOXYGEN__
+#define CHECKSUM_CHECK_ICMP6            1
+#endif
+
+/**
+ * LWIP_CHECKSUM_ON_COPY==1: Calculate checksum when copying data from
+ * application buffers to pbufs.
+ */
+#if !defined LWIP_CHECKSUM_ON_COPY || defined __DOXYGEN__
+#define LWIP_CHECKSUM_ON_COPY           0
+#endif
+/**
+ * @}
+ */
+
+/*
+   ---------------------------------------
+   ---------- IPv6 options ---------------
+   ---------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_ipv6 IPv6
+ * @ingroup lwip_opts
+ * @{
+ */
+/**
+ * LWIP_IPV6==1: Enable IPv6
+ */
+#if !defined LWIP_IPV6 || defined __DOXYGEN__
+#define LWIP_IPV6                       0
+#endif
+
+/**
+ * IPV6_REASS_MAXAGE: Maximum time (in multiples of IP6_REASS_TMR_INTERVAL - so seconds, normally)
+ * a fragmented IP packet waits for all fragments to arrive. If not all fragments arrived
+ * in this time, the whole packet is discarded.
+ */
+#if !defined IPV6_REASS_MAXAGE || defined __DOXYGEN__
+#define IPV6_REASS_MAXAGE               60
+#endif
+
+/**
+ * LWIP_IPV6_SCOPES==1: Enable support for IPv6 address scopes, ensuring that
+ * e.g. link-local addresses are really treated as link-local. Disable this
+ * setting only for single-interface configurations.
+ * All addresses that have a scope according to the default policy (link-local
+ * unicast addresses, interface-local and link-local multicast addresses) should
+ * now have a zone set on them before being passed to the core API, although
+ * lwIP will currently attempt to select a zone on the caller's behalf when 
+ * necessary. Applications that directly assign IPv6 addresses to interfaces
+ * (which is NOT recommended) must now ensure that link-local addresses carry
+ * the netif's zone. See the new ip6_zone.h header file for more information and
+ * relevant macros. For now it is still possible to turn off scopes support
+ * through the new LWIP_IPV6_SCOPES option. When upgrading an implementation that
+ * uses the core API directly, it is highly recommended to enable
+ * LWIP_IPV6_SCOPES_DEBUG at least for a while, to ensure e.g. proper address
+ * initialization.
+ */
+#if !defined LWIP_IPV6_SCOPES || defined __DOXYGEN__
+#define LWIP_IPV6_SCOPES                (LWIP_IPV6 && !LWIP_SINGLE_NETIF)
+#endif
+
+/**
+ * LWIP_IPV6_SCOPES_DEBUG==1: Perform run-time checks to verify that addresses
+ * are properly zoned (see ip6_zone.h on what that means) where it matters.
+ * Enabling this setting is highly recommended when upgrading from an existing
+ * installation that is not yet scope-aware; otherwise it may be too expensive.
+ */
+#if !defined LWIP_IPV6_SCOPES_DEBUG || defined __DOXYGEN__
+#define LWIP_IPV6_SCOPES_DEBUG          0
+#endif
+
+/**
+ * LWIP_IPV6_NUM_ADDRESSES: Number of IPv6 addresses per netif.
+ */
+#if !defined LWIP_IPV6_NUM_ADDRESSES || defined __DOXYGEN__
+#define LWIP_IPV6_NUM_ADDRESSES         3
+#endif
+
+/**
+ * LWIP_IPV6_FORWARD==1: Forward IPv6 packets across netifs
+ */
+#if !defined LWIP_IPV6_FORWARD || defined __DOXYGEN__
+#define LWIP_IPV6_FORWARD               0
+#endif
+
+/**
+ * LWIP_IPV6_FRAG==1: Fragment outgoing IPv6 packets that are too big.
+ */
+#if !defined LWIP_IPV6_FRAG || defined __DOXYGEN__
+#define LWIP_IPV6_FRAG                  1
+#endif
+
+/**
+ * LWIP_IPV6_REASS==1: reassemble incoming IPv6 packets that fragmented
+ */
+#if !defined LWIP_IPV6_REASS || defined __DOXYGEN__
+#define LWIP_IPV6_REASS                 LWIP_IPV6
+#endif
+
+/**
+ * LWIP_IPV6_SEND_ROUTER_SOLICIT==1: Send router solicitation messages during
+ * network startup.
+ */
+#if !defined LWIP_IPV6_SEND_ROUTER_SOLICIT || defined __DOXYGEN__
+#define LWIP_IPV6_SEND_ROUTER_SOLICIT   1
+#endif
+
+/**
+ * LWIP_IPV6_AUTOCONFIG==1: Enable stateless address autoconfiguration as per RFC 4862.
+ */
+#if !defined LWIP_IPV6_AUTOCONFIG || defined __DOXYGEN__
+#define LWIP_IPV6_AUTOCONFIG            LWIP_IPV6
+#endif
+
+/**
+ * LWIP_IPV6_ADDRESS_LIFETIMES==1: Keep valid and preferred lifetimes for each
+ * IPv6 address. Required for LWIP_IPV6_AUTOCONFIG. May still be enabled
+ * otherwise, in which case the application may assign address lifetimes with
+ * the appropriate macros. Addresses with no lifetime are assumed to be static.
+ * If this option is disabled, all addresses are assumed to be static.
+ */
+#if !defined LWIP_IPV6_ADDRESS_LIFETIMES || defined __DOXYGEN__
+#define LWIP_IPV6_ADDRESS_LIFETIMES     LWIP_IPV6_AUTOCONFIG
+#endif
+
+/**
+ * LWIP_IPV6_DUP_DETECT_ATTEMPTS=[0..7]: Number of duplicate address detection attempts.
+ */
+#if !defined LWIP_IPV6_DUP_DETECT_ATTEMPTS || defined __DOXYGEN__
+#define LWIP_IPV6_DUP_DETECT_ATTEMPTS   1
+#endif
+/**
+ * @}
+ */
+
+/**
+ * @defgroup lwip_opts_icmp6 ICMP6
+ * @ingroup lwip_opts_ipv6
+ * @{
+ */
+/**
+ * LWIP_ICMP6==1: Enable ICMPv6 (mandatory per RFC)
+ */
+#if !defined LWIP_ICMP6 || defined __DOXYGEN__
+#define LWIP_ICMP6                      LWIP_IPV6
+#endif
+
+/**
+ * LWIP_ICMP6_DATASIZE: bytes from original packet to send back in
+ * ICMPv6 error messages.
+ */
+#if !defined LWIP_ICMP6_DATASIZE || defined __DOXYGEN__
+#define LWIP_ICMP6_DATASIZE             8
+#endif
+
+/**
+ * LWIP_ICMP6_HL: default hop limit for ICMPv6 messages
+ */
+#if !defined LWIP_ICMP6_HL || defined __DOXYGEN__
+#define LWIP_ICMP6_HL                   255
+#endif
+/**
+ * @}
+ */
+
+/**
+ * @defgroup lwip_opts_mld6 Multicast listener discovery
+ * @ingroup lwip_opts_ipv6
+ * @{
+ */
+/**
+ * LWIP_IPV6_MLD==1: Enable multicast listener discovery protocol.
+ * If LWIP_IPV6 is enabled but this setting is disabled, the MAC layer must
+ * indiscriminately pass all inbound IPv6 multicast traffic to lwIP.
+ */
+#if !defined LWIP_IPV6_MLD || defined __DOXYGEN__
+#define LWIP_IPV6_MLD                   LWIP_IPV6
+#endif
+
+/**
+ * MEMP_NUM_MLD6_GROUP: Max number of IPv6 multicast groups that can be joined.
+ * There must be enough groups so that each netif can join the solicited-node
+ * multicast group for each of its local addresses, plus one for MDNS if
+ * applicable, plus any number of groups to be joined on UDP sockets.
+ */
+#if !defined MEMP_NUM_MLD6_GROUP || defined __DOXYGEN__
+#define MEMP_NUM_MLD6_GROUP             4
+#endif
+/**
+ * @}
+ */
+
+/**
+ * @defgroup lwip_opts_nd6 Neighbor discovery
+ * @ingroup lwip_opts_ipv6
+ * @{
+ */
+/**
+ * LWIP_ND6_QUEUEING==1: queue outgoing IPv6 packets while MAC address
+ * is being resolved.
+ */
+#if !defined LWIP_ND6_QUEUEING || defined __DOXYGEN__
+#define LWIP_ND6_QUEUEING               LWIP_IPV6
+#endif
+
+/**
+ * ESP_ND6_QUEUEING==1: queue outgoing IPv6 packets while MAC address
+ * is being resolved.
+ */
+#if !defined ESP_ND6_QUEUEING || defined __DOXYGEN__
+#define ESP_ND6_QUEUEING               LWIP_IPV6
+#endif
+
+/**
+ * MEMP_NUM_ND6_QUEUE: Max number of IPv6 packets to queue during MAC resolution.
+ */
+#if !defined MEMP_NUM_ND6_QUEUE || defined __DOXYGEN__
+#define MEMP_NUM_ND6_QUEUE              20
+#endif
+
+/**
+ * LWIP_ND6_NUM_NEIGHBORS: Number of entries in IPv6 neighbor cache
+ */
+#if !defined LWIP_ND6_NUM_NEIGHBORS || defined __DOXYGEN__
+#define LWIP_ND6_NUM_NEIGHBORS          10
+#endif
+
+/**
+ * LWIP_ND6_NUM_DESTINATIONS: number of entries in IPv6 destination cache
+ */
+#if !defined LWIP_ND6_NUM_DESTINATIONS || defined __DOXYGEN__
+#define LWIP_ND6_NUM_DESTINATIONS       10
+#endif
+
+/**
+ * LWIP_ND6_NUM_PREFIXES: number of entries in IPv6 on-link prefixes cache
+ */
+#if !defined LWIP_ND6_NUM_PREFIXES || defined __DOXYGEN__
+#define LWIP_ND6_NUM_PREFIXES           5
+#endif
+
+/**
+ * LWIP_ND6_NUM_ROUTERS: number of entries in IPv6 default router cache
+ */
+#if !defined LWIP_ND6_NUM_ROUTERS || defined __DOXYGEN__
+#define LWIP_ND6_NUM_ROUTERS            3
+#endif
+
+/**
+ * LWIP_ND6_MAX_MULTICAST_SOLICIT: max number of multicast solicit messages to send
+ * (neighbor solicit and router solicit)
+ */
+#if !defined LWIP_ND6_MAX_MULTICAST_SOLICIT || defined __DOXYGEN__
+#define LWIP_ND6_MAX_MULTICAST_SOLICIT  3
+#endif
+
+/**
+ * LWIP_ND6_MAX_UNICAST_SOLICIT: max number of unicast neighbor solicitation messages
+ * to send during neighbor reachability detection.
+ */
+#if !defined LWIP_ND6_MAX_UNICAST_SOLICIT || defined __DOXYGEN__
+#define LWIP_ND6_MAX_UNICAST_SOLICIT    3
+#endif
+
+/**
+ * Unused: See ND RFC (time in milliseconds).
+ */
+#if !defined LWIP_ND6_MAX_ANYCAST_DELAY_TIME || defined __DOXYGEN__
+#define LWIP_ND6_MAX_ANYCAST_DELAY_TIME 1000
+#endif
+
+/**
+ * Unused: See ND RFC
+ */
+#if !defined LWIP_ND6_MAX_NEIGHBOR_ADVERTISEMENT || defined __DOXYGEN__
+#define LWIP_ND6_MAX_NEIGHBOR_ADVERTISEMENT  3
+#endif
+
+/**
+ * LWIP_ND6_REACHABLE_TIME: default neighbor reachable time (in milliseconds).
+ * May be updated by router advertisement messages.
+ */
+#if !defined LWIP_ND6_REACHABLE_TIME || defined __DOXYGEN__
+#define LWIP_ND6_REACHABLE_TIME         30000
+#endif
+
+/**
+ * LWIP_ND6_RETRANS_TIMER: default retransmission timer for solicitation messages
+ */
+#if !defined LWIP_ND6_RETRANS_TIMER || defined __DOXYGEN__
+#define LWIP_ND6_RETRANS_TIMER          1000
+#endif
+
+/**
+ * LWIP_ND6_DELAY_FIRST_PROBE_TIME: Delay before first unicast neighbor solicitation
+ * message is sent, during neighbor reachability detection.
+ */
+#if !defined LWIP_ND6_DELAY_FIRST_PROBE_TIME || defined __DOXYGEN__
+#define LWIP_ND6_DELAY_FIRST_PROBE_TIME 5000
+#endif
+
+/**
+ * LWIP_ND6_ALLOW_RA_UPDATES==1: Allow Router Advertisement messages to update
+ * Reachable time and retransmission timers, and netif MTU.
+ */
+#if !defined LWIP_ND6_ALLOW_RA_UPDATES || defined __DOXYGEN__
+#define LWIP_ND6_ALLOW_RA_UPDATES       1
+#endif
+
+/**
+ * LWIP_ND6_TCP_REACHABILITY_HINTS==1: Allow TCP to provide Neighbor Discovery
+ * with reachability hints for connected destinations. This helps avoid sending
+ * unicast neighbor solicitation messages.
+ */
+#if !defined LWIP_ND6_TCP_REACHABILITY_HINTS || defined __DOXYGEN__
+#define LWIP_ND6_TCP_REACHABILITY_HINTS 1
+#endif
+
+/**
+ * LWIP_ND6_RDNSS_MAX_DNS_SERVERS > 0: Use IPv6 Router Advertisement Recursive
+ * DNS Server Option (as per RFC 6106) to copy a defined maximum number of DNS
+ * servers to the DNS module.
+ */
+#if !defined LWIP_ND6_RDNSS_MAX_DNS_SERVERS || defined __DOXYGEN__
+#define LWIP_ND6_RDNSS_MAX_DNS_SERVERS  0
+#endif
+/**
+ * @}
+ */
+
+/**
+ * @defgroup lwip_opts_dhcpv6 DHCPv6
+ * @ingroup lwip_opts_ipv6
+ * @{
+ */
+/**
+ * LWIP_IPV6_DHCP6==1: enable DHCPv6 stateful/stateless address autoconfiguration.
+ */
+#if !defined LWIP_IPV6_DHCP6 || defined __DOXYGEN__
+#define LWIP_IPV6_DHCP6                 0
+#endif
+
+/**
+ * LWIP_IPV6_DHCP6_STATEFUL==1: enable DHCPv6 stateful address autoconfiguration.
+ * (not supported, yet!)
+ */
+#if !defined LWIP_IPV6_DHCP6_STATEFUL || defined __DOXYGEN__
+#define LWIP_IPV6_DHCP6_STATEFUL        0
+#endif
+
+/**
+ * LWIP_IPV6_DHCP6_STATELESS==1: enable DHCPv6 stateless address autoconfiguration.
+ */
+#if !defined LWIP_IPV6_DHCP6_STATELESS || defined __DOXYGEN__
+#define LWIP_IPV6_DHCP6_STATELESS       LWIP_IPV6_DHCP6
+#endif
+
+/**
+ * LWIP_DHCP6_GETS_NTP==1: Request NTP servers via DHCPv6. For each
+ * response packet, a callback is called, which has to be provided by the port:
+ * void dhcp6_set_ntp_servers(u8_t num_ntp_servers, ip_addr_t* ntp_server_addrs);
+*/
+#if !defined LWIP_DHCP6_GET_NTP_SRV || defined __DOXYGEN__
+#define LWIP_DHCP6_GET_NTP_SRV          0
+#endif
+
+/**
+ * The maximum of NTP servers requested
+ */
+#if !defined LWIP_DHCP6_MAX_NTP_SERVERS || defined __DOXYGEN__
+#define LWIP_DHCP6_MAX_NTP_SERVERS      1
+#endif
+
+/**
+ * LWIP_DHCP6_MAX_DNS_SERVERS > 0: Request DNS servers via DHCPv6.
+ * DNS servers received in the response are passed to DNS via @ref dns_setserver()
+ * (up to the maximum limit defined here).
+ */
+#if !defined LWIP_DHCP6_MAX_DNS_SERVERS || defined __DOXYGEN__
+#define LWIP_DHCP6_MAX_DNS_SERVERS      DNS_MAX_SERVERS
+#endif
+/**
+ * @}
+ */
+
+/*
+   ---------------------------------------
+   ---------- Hook options ---------------
+   ---------------------------------------
+*/
+
+/**
+ * @defgroup lwip_opts_hooks Hooks
+ * @ingroup lwip_opts_infrastructure
+ * Hooks are undefined by default, define them to a function if you need them.
+ * @{
+ */
+
+/**
+ * LWIP_HOOK_FILENAME: Custom filename to \#include in files that provide hooks.
+ * Declare your hook function prototypes in there, you may also \#include all headers
+ * providing data types that are need in this file.
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_FILENAME "path/to/my/lwip_hooks.h"
+#endif
+
+/**
+ * LWIP_HOOK_TCP_ISN:
+ * Hook for generation of the Initial Sequence Number (ISN) for a new TCP
+ * connection. The default lwIP ISN generation algorithm is very basic and may
+ * allow for TCP spoofing attacks. This hook provides the means to implement
+ * the standardized ISN generation algorithm from RFC 6528 (see contrib/adons/tcp_isn),
+ * or any other desired algorithm as a replacement.
+ * Called from tcp_connect() and tcp_listen_input() when an ISN is needed for
+ * a new TCP connection, if TCP support (@ref LWIP_TCP) is enabled.\n
+ * Signature:\code{.c}
+ * u32_t my_hook_tcp_isn(const ip_addr_t* local_ip, u16_t local_port, const ip_addr_t* remote_ip, u16_t remote_port);
+ * \endcode
+ * - it may be necessary to use "struct ip_addr" (ip4_addr, ip6_addr) instead of "ip_addr_t" in function declarations\n
+ * Arguments:
+ * - local_ip: pointer to the local IP address of the connection
+ * - local_port: local port number of the connection (host-byte order)
+ * - remote_ip: pointer to the remote IP address of the connection
+ * - remote_port: remote port number of the connection (host-byte order)\n
+ * Return value:
+ * - the 32-bit Initial Sequence Number to use for the new TCP connection.
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_TCP_ISN(local_ip, local_port, remote_ip, remote_port)
+#endif
+
+/**
+ * LWIP_HOOK_TCP_INPACKET_PCB:
+ * Hook for intercepting incoming packets before they are passed to a pcb. This
+ * allows updating some state or even dropping a packet.
+ * Signature:\code{.c}
+ * err_t my_hook_tcp_inpkt(struct tcp_pcb *pcb, struct tcp_hdr *hdr, u16_t optlen, u16_t opt1len, u8_t *opt2, struct pbuf *p);
+ * \endcode
+ * Arguments:
+ * - pcb: tcp_pcb selected for input of this packet (ATTENTION: this may be
+ *        struct tcp_pcb_listen if pcb->state == LISTEN)
+ * - hdr: pointer to tcp header (ATTENTION: tcp options may not be in one piece!)
+ * - optlen: tcp option length
+ * - opt1len: tcp option length 1st part
+ * - opt2: if this is != NULL, tcp options are split among 2 pbufs. In that case,
+ *         options start at right after the tcp header ('(u8_t*)(hdr + 1)') for
+ *         the first 'opt1len' bytes and the rest starts at 'opt2'. opt2len can
+ *         be simply calculated: 'opt2len = optlen - opt1len;'
+ * - p: input packet, p->payload points to application data (that's why tcp hdr
+ *      and options are passed in seperately)
+ * Return value:
+ * - ERR_OK: continue input of this packet as normal
+ * - != ERR_OK: drop this packet for input (don't continue input processing)
+ *
+ * ATTENTION: don't call any tcp api functions that might change tcp state (pcb
+ * state or any pcb lists) from this callback!
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_TCP_INPACKET_PCB(pcb, hdr, optlen, opt1len, opt2, p)
+#endif
+
+/**
+ * LWIP_HOOK_TCP_OUT_TCPOPT_LENGTH:
+ * Hook for increasing the size of the options allocated with a tcp header.
+ * Together with LWIP_HOOK_TCP_OUT_ADD_TCPOPTS, this can be used to add custom
+ * options to outgoing tcp segments.
+ * Signature:\code{.c}
+ * u8_t my_hook_tcp_out_tcpopt_length(const struct tcp_pcb *pcb, u8_t internal_option_length);
+ * \endcode
+ * Arguments:
+ * - pcb: tcp_pcb that transmits (ATTENTION: this may be NULL or
+ *        struct tcp_pcb_listen if pcb->state == LISTEN)
+ * - internal_option_length: tcp option length used by the stack internally
+ * Return value:
+ * - a number of bytes to allocate for tcp options (internal_option_length <= ret <= 40)
+ *
+ * ATTENTION: don't call any tcp api functions that might change tcp state (pcb
+ * state or any pcb lists) from this callback!
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_TCP_OUT_TCPOPT_LENGTH(pcb, internal_len)
+#endif
+
+/**
+ * LWIP_HOOK_TCP_OUT_ADD_TCPOPTS:
+ * Hook for adding custom options to outgoing tcp segments.
+ * Space for these custom options has to be reserved via LWIP_HOOK_TCP_OUT_TCPOPT_LENGTH.
+ * Signature:\code{.c}
+ * u32_t *my_hook_tcp_out_add_tcpopts(struct pbuf *p, struct tcp_hdr *hdr, const struct tcp_pcb *pcb, u32_t *opts);
+ * \endcode
+ * Arguments:
+ * - p: output packet, p->payload pointing to tcp header, data follows
+ * - hdr: tcp header
+ * - pcb: tcp_pcb that transmits (ATTENTION: this may be NULL or
+ *        struct tcp_pcb_listen if pcb->state == LISTEN)
+ * - opts: pointer where to add the custom options (there may already be options
+ *         between the header and these)
+ * Return value:
+ * - pointer pointing directly after the inserted options
+ *
+ * ATTENTION: don't call any tcp api functions that might change tcp state (pcb
+ * state or any pcb lists) from this callback!
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(p, hdr, pcb, opts)
+#endif
+
+/**
+ * LWIP_HOOK_IP4_INPUT(pbuf, input_netif):
+ * Called from ip_input() (IPv4)
+ * Signature:\code{.c}
+ *   int my_hook(struct pbuf *pbuf, struct netif *input_netif);
+ * \endcode
+ * Arguments:
+ * - pbuf: received struct pbuf passed to ip_input()
+ * - input_netif: struct netif on which the packet has been received
+ * Return values:
+ * - 0: Hook has not consumed the packet, packet is processed as normal
+ * - != 0: Hook has consumed the packet.
+ * If the hook consumed the packet, 'pbuf' is in the responsibility of the hook
+ * (i.e. free it when done).
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_IP4_INPUT(pbuf, input_netif)
+#endif
+
+/**
+ * LWIP_HOOK_IP4_ROUTE(dest):
+ * Called from ip_route() (IPv4)
+ * Signature:\code{.c}
+ *   struct netif *my_hook(const ip4_addr_t *dest);
+ * \endcode
+ * Arguments:
+ * - dest: destination IPv4 address
+ * Returns values:
+ * - the destination netif
+ * - NULL if no destination netif is found. In that case, ip_route() continues as normal.
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_IP4_ROUTE()
+#endif
+
+/**
+ * LWIP_HOOK_IP4_ROUTE_SRC(src, dest):
+ * Source-based routing for IPv4 - called from ip_route() (IPv4)
+ * Signature:\code{.c}
+ *   struct netif *my_hook(const ip4_addr_t *src, const ip4_addr_t *dest);
+ * \endcode
+ * Arguments:
+ * - src: local/source IPv4 address
+ * - dest: destination IPv4 address
+ * Returns values:
+ * - the destination netif
+ * - NULL if no destination netif is found. In that case, ip_route() continues as normal.
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_IP4_ROUTE_SRC(src, dest)
+#endif
+
+/**
+ * LWIP_HOOK_IP4_CANFORWARD(src, dest):
+ * Check if an IPv4 can be forwarded - called from:
+ * ip4_input() -> ip4_forward() -> ip4_canforward() (IPv4)
+ * - source address is available via ip4_current_src_addr()
+ * - calling an output function in this context (e.g. multicast router) is allowed
+ * Signature:\code{.c}
+ *   int my_hook(struct pbuf *p, u32_t dest_addr_hostorder);
+ * \endcode
+ * Arguments:
+ * - p: packet to forward
+ * - dest: destination IPv4 address
+ * Returns values:
+ * - 1: forward
+ * - 0: don't forward
+ * - -1: no decision. In that case, ip4_canforward() continues as normal.
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_IP4_CANFORWARD(src, dest)
+#endif
+
+/**
+ * LWIP_HOOK_ETHARP_GET_GW(netif, dest):
+ * Called from etharp_output() (IPv4)
+ * Signature:\code{.c}
+ *   const ip4_addr_t *my_hook(struct netif *netif, const ip4_addr_t *dest);
+ * \endcode
+ * Arguments:
+ * - netif: the netif used for sending
+ * - dest: the destination IPv4 address
+ * Return values:
+ * - the IPv4 address of the gateway to handle the specified destination IPv4 address
+ * - NULL, in which case the netif's default gateway is used
+ *
+ * The returned address MUST be directly reachable on the specified netif!
+ * This function is meant to implement advanced IPv4 routing together with
+ * LWIP_HOOK_IP4_ROUTE(). The actual routing/gateway table implementation is
+ * not part of lwIP but can e.g. be hidden in the netif's state argument.
+*/
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_ETHARP_GET_GW(netif, dest)
+#endif
+
+/**
+ * LWIP_HOOK_IP6_INPUT(pbuf, input_netif):
+ * Called from ip6_input() (IPv6)
+ * Signature:\code{.c}
+ *   int my_hook(struct pbuf *pbuf, struct netif *input_netif);
+ * \endcode
+ * Arguments:
+ * - pbuf: received struct pbuf passed to ip6_input()
+ * - input_netif: struct netif on which the packet has been received
+ * Return values:
+ * - 0: Hook has not consumed the packet, packet is processed as normal
+ * - != 0: Hook has consumed the packet.
+ * If the hook consumed the packet, 'pbuf' is in the responsibility of the hook
+ * (i.e. free it when done).
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_IP6_INPUT(pbuf, input_netif)
+#endif
+
+/**
+ * LWIP_HOOK_IP6_ROUTE(src, dest):
+ * Called from ip_route() (IPv6)
+ * Signature:\code{.c}
+ *   struct netif *my_hook(const ip6_addr_t *dest, const ip6_addr_t *src);
+ * \endcode
+ * Arguments:
+ * - src: source IPv6 address
+ * - dest: destination IPv6 address
+ * Return values:
+ * - the destination netif
+ * - NULL if no destination netif is found. In that case, ip6_route() continues as normal.
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_IP6_ROUTE(src, dest)
+#endif
+
+/**
+ * LWIP_HOOK_ND6_GET_GW(netif, dest):
+ * Called from nd6_get_next_hop_entry() (IPv6)
+ * Signature:\code{.c}
+ *   const ip6_addr_t *my_hook(struct netif *netif, const ip6_addr_t *dest);
+ * \endcode
+ * Arguments:
+ * - netif: the netif used for sending
+ * - dest: the destination IPv6 address
+ * Return values:
+ * - the IPv6 address of the next hop to handle the specified destination IPv6 address
+ * - NULL, in which case a NDP-discovered router is used instead
+ *
+ * The returned address MUST be directly reachable on the specified netif!
+ * This function is meant to implement advanced IPv6 routing together with
+ * LWIP_HOOK_IP6_ROUTE(). The actual routing/gateway table implementation is
+ * not part of lwIP but can e.g. be hidden in the netif's state argument.
+*/
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_ND6_GET_GW(netif, dest)
+#endif
+
+/**
+ * LWIP_HOOK_VLAN_CHECK(netif, eth_hdr, vlan_hdr):
+ * Called from ethernet_input() if VLAN support is enabled
+ * Signature:\code{.c}
+ *   int my_hook(struct netif *netif, struct eth_hdr *eth_hdr, struct eth_vlan_hdr *vlan_hdr);
+ * \endcode
+ * Arguments:
+ * - netif: struct netif on which the packet has been received
+ * - eth_hdr: struct eth_hdr of the packet
+ * - vlan_hdr: struct eth_vlan_hdr of the packet
+ * Return values:
+ * - 0: Packet must be dropped.
+ * - != 0: Packet must be accepted.
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_VLAN_CHECK(netif, eth_hdr, vlan_hdr)
+#endif
+
+/**
+ * LWIP_HOOK_VLAN_SET:
+ * Hook can be used to set prio_vid field of vlan_hdr. If you need to store data
+ * on per-netif basis to implement this callback, see @ref netif_cd.
+ * Called from ethernet_output() if VLAN support (@ref ETHARP_SUPPORT_VLAN) is enabled.\n
+ * Signature:\code{.c}
+ *   s32_t my_hook_vlan_set(struct netif* netif, struct pbuf* pbuf, const struct eth_addr* src, const struct eth_addr* dst, u16_t eth_type);\n
+ * \endcode
+ * Arguments:
+ * - netif: struct netif that the packet will be sent through
+ * - p: struct pbuf packet to be sent
+ * - src: source eth address
+ * - dst: destination eth address
+ * - eth_type: ethernet type to packet to be sent\n
+ * 
+ * 
+ * Return values:
+ * - &lt;0: Packet shall not contain VLAN header.
+ * - 0 &lt;= return value &lt;= 0xFFFF: Packet shall contain VLAN header. Return value is prio_vid in host byte order.
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_VLAN_SET(netif, p, src, dst, eth_type)
+#endif
+
+/**
+ * LWIP_HOOK_MEMP_AVAILABLE(memp_t_type):
+ * Called from memp_free() when a memp pool was empty and an item is now available
+ * Signature:\code{.c}
+ *   void my_hook(memp_t type);
+ * \endcode
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_MEMP_AVAILABLE(memp_t_type)
+#endif
+
+/**
+ * LWIP_HOOK_UNKNOWN_ETH_PROTOCOL(pbuf, netif):
+ * Called from ethernet_input() when an unknown eth type is encountered.
+ * Signature:\code{.c}
+ *   err_t my_hook(struct pbuf* pbuf, struct netif* netif);
+ * \endcode
+ * Arguments:
+ * - p: rx packet with unknown eth type
+ * - netif: netif on which the packet has been received
+ * Return values:
+ * - ERR_OK if packet is accepted (hook function now owns the pbuf)
+ * - any error code otherwise (pbuf is freed)
+ *
+ * Payload points to ethernet header!
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_UNKNOWN_ETH_PROTOCOL(pbuf, netif)
+#endif
+
+/**
+ * LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, state, msg, msg_type, options_len_ptr):
+ * Called from various dhcp functions when sending a DHCP message.
+ * This hook is called just before the DHCP message trailer is added, so the
+ * options are at the end of a DHCP message.
+ * Signature:\code{.c}
+ *   void my_hook(struct netif *netif, struct dhcp *dhcp, u8_t state, struct dhcp_msg *msg,
+ *                u8_t msg_type, u16_t *options_len_ptr);
+ * \endcode
+ * Arguments:
+ * - netif: struct netif that the packet will be sent through
+ * - dhcp: struct dhcp on that netif
+ * - state: current dhcp state (dhcp_state_enum_t as an u8_t)
+ * - msg: struct dhcp_msg that will be sent
+ * - msg_type: dhcp message type to be sent (u8_t)
+ * - options_len_ptr: pointer to the current length of options in the dhcp_msg "msg"
+ *                    (must be increased when options are added!)
+ *
+ * Options need to appended like this:
+ *   LWIP_ASSERT("dhcp option overflow", *options_len_ptr + option_len + 2 <= DHCP_OPTIONS_LEN);
+ *   msg->options[(*options_len_ptr)++] = &lt;option_number&gt;;
+ *   msg->options[(*options_len_ptr)++] = &lt;option_len&gt;;
+ *   msg->options[(*options_len_ptr)++] = &lt;option_bytes&gt;;
+ *   [...]
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, state, msg, msg_type, options_len_ptr)
+#endif
+
+/**
+ * LWIP_HOOK_DHCP_PARSE_OPTION(netif, dhcp, state, msg, msg_type, option, len, pbuf, option_value_offset):
+ * Called from dhcp_parse_reply when receiving a DHCP message.
+ * This hook is called for every option in the received message that is not handled internally.
+ * Signature:\code{.c}
+ *   void my_hook(struct netif *netif, struct dhcp *dhcp, u8_t state, struct dhcp_msg *msg,
+ *                u8_t msg_type, u8_t option, u8_t option_len, struct pbuf *pbuf, u16_t option_value_offset);
+ * \endcode
+ * Arguments:
+ * - netif: struct netif that the packet will be sent through
+ * - dhcp: struct dhcp on that netif
+ * - state: current dhcp state (dhcp_state_enum_t as an u8_t)
+ * - msg: struct dhcp_msg that was received
+ * - msg_type: dhcp message type received (u8_t, ATTENTION: only valid after
+ *             the message type option has been parsed!)
+ * - option: option value (u8_t)
+ * - len: option data length (u8_t)
+ * - pbuf: pbuf where option data is contained
+ * - option_value_offset: offset in pbuf where option data begins
+ *
+ * A nice way to get the option contents is pbuf_get_contiguous():
+ *  u8_t buf[32];
+ *  u8_t *ptr = (u8_t*)pbuf_get_contiguous(p, buf, sizeof(buf), LWIP_MIN(option_len, sizeof(buf)), offset);
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_DHCP_PARSE_OPTION(netif, dhcp, state, msg, msg_type, option, len, pbuf, offset)
+#endif
+
+/**
+ * LWIP_HOOK_DHCP6_APPEND_OPTIONS(netif, dhcp6, state, msg, msg_type, options_len_ptr, max_len):
+ * Called from various dhcp6 functions when sending a DHCP6 message.
+ * This hook is called just before the DHCP6 message is sent, so the
+ * options are at the end of a DHCP6 message.
+ * Signature:\code{.c}
+ *   void my_hook(struct netif *netif, struct dhcp6 *dhcp, u8_t state, struct dhcp6_msg *msg,
+ *                u8_t msg_type, u16_t *options_len_ptr);
+ * \endcode
+ * Arguments:
+ * - netif: struct netif that the packet will be sent through
+ * - dhcp6: struct dhcp6 on that netif
+ * - state: current dhcp6 state (dhcp6_state_enum_t as an u8_t)
+ * - msg: struct dhcp6_msg that will be sent
+ * - msg_type: dhcp6 message type to be sent (u8_t)
+ * - options_len_ptr: pointer to the current length of options in the dhcp6_msg "msg"
+ *                    (must be increased when options are added!)
+ *
+ * Options need to appended like this:
+ *   u8_t *options = (u8_t *)(msg + 1);
+ *   LWIP_ASSERT("dhcp option overflow", sizeof(struct dhcp6_msg) + *options_len_ptr + newoptlen <= max_len);
+ *   options[(*options_len_ptr)++] = &lt;option_data&gt;;
+ *   [...]
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_DHCP6_APPEND_OPTIONS(netif, dhcp6, state, msg, msg_type, options_len_ptr, max_len)
+#endif
+
+/**
+ * LWIP_HOOK_SOCKETS_SETSOCKOPT(s, sock, level, optname, optval, optlen, err)
+ * Called from socket API to implement setsockopt() for options not provided by lwIP.
+ * Core lock is held when this hook is called.
+ * Signature:\code{.c}
+ *   int my_hook(int s, struct lwip_sock *sock, int level, int optname, const void *optval, socklen_t optlen, int *err)
+ * \endcode
+ * Arguments:
+ * - s: socket file descriptor
+ * - sock: internal socket descriptor (see lwip/priv/sockets_priv.h)
+ * - level: protocol level at which the option resides
+ * - optname: option to set
+ * - optval: value to set
+ * - optlen: size of optval
+ * - err: output error
+ * Return values:
+ * - 0: Hook has not consumed the option, code continues as normal (to internal options)
+ * - != 0: Hook has consumed the option, 'err' is returned
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_SOCKETS_SETSOCKOPT(s, sock, level, optname, optval, optlen, err)
+#endif
+
+/**
+ * LWIP_HOOK_SOCKETS_GETSOCKOPT(s, sock, level, optname, optval, optlen, err)
+ * Called from socket API to implement getsockopt() for options not provided by lwIP.
+ * Core lock is held when this hook is called.
+ * Signature:\code{.c}
+ *   int my_hook(int s, struct lwip_sock *sock, int level, int optname, void *optval, socklen_t *optlen, int *err)
+ * \endcode
+ * Arguments:
+ * - s: socket file descriptor
+ * - sock: internal socket descriptor (see lwip/priv/sockets_priv.h)
+ * - level: protocol level at which the option resides
+ * - optname: option to get
+ * - optval: value to get
+ * - optlen: size of optval
+ * - err: output error
+ * Return values:
+ * - 0: Hook has not consumed the option, code continues as normal (to internal options)
+ * - != 0: Hook has consumed the option, 'err' is returned
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_SOCKETS_GETSOCKOPT(s, sock, level, optname, optval, optlen, err)
+#endif
+
+/**
+ * LWIP_HOOK_NETCONN_EXTERNAL_RESOLVE(name, addr, addrtype, err)
+ * Called from netconn APIs (not usable with callback apps) allowing an
+ * external DNS resolver (which uses sequential API) to handle the query.
+ * Signature:\code{.c}
+ *   int my_hook(const char *name, ip_addr_t *addr, u8_t addrtype, err_t *err)
+ * \endcode
+ * Arguments:
+ * - name: hostname to resolve
+ * - addr: output host address
+ * - addrtype: type of address to query
+ * - err: output error
+ * Return values:
+ * - 0: Hook has not consumed hostname query, query continues into DNS module
+ * - != 0: Hook has consumed the query
+ *
+ * err must also be checked to determine if the hook consumed the query, but
+ * the query failed
+ */
+#ifdef __DOXYGEN__
+#define LWIP_HOOK_NETCONN_EXTERNAL_RESOLVE(name, addr, addrtype, err)
+#endif
+/**
+ * @}
+ */
+
+/*
+   ---------------------------------------
+   ---------- Debugging options ----------
+   ---------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_debugmsg Debug messages
+ * @ingroup lwip_opts_debug
+ * @{
+ */
+/**
+ * LWIP_DBG_MIN_LEVEL: After masking, the value of the debug is
+ * compared against this value. If it is smaller, then debugging
+ * messages are written.
+ * @see debugging_levels
+ */
+#if !defined LWIP_DBG_MIN_LEVEL || defined __DOXYGEN__
+#define LWIP_DBG_MIN_LEVEL              LWIP_DBG_LEVEL_ALL
+#endif
+
+/**
+ * LWIP_DBG_TYPES_ON: A mask that can be used to globally enable/disable
+ * debug messages of certain types.
+ * @see debugging_levels
+ */
+#if !defined LWIP_DBG_TYPES_ON || defined __DOXYGEN__
+#define LWIP_DBG_TYPES_ON               LWIP_DBG_ON
+#endif
+
+/**
+ * ETHARP_DEBUG: Enable debugging in etharp.c.
+ */
+#if !defined ETHARP_DEBUG || defined __DOXYGEN__
+#define ETHARP_DEBUG                    LWIP_DBG_OFF
+#endif
+
+/**
+ * NETIF_DEBUG: Enable debugging in netif.c.
+ */
+#if !defined NETIF_DEBUG || defined __DOXYGEN__
+#define NETIF_DEBUG                     LWIP_DBG_OFF
+#endif
+
+/**
+ * PBUF_DEBUG: Enable debugging in pbuf.c.
+ */
+#if !defined PBUF_DEBUG || defined __DOXYGEN__
+#define PBUF_DEBUG                      LWIP_DBG_OFF
+#endif
+
+/**
+ * API_LIB_DEBUG: Enable debugging in api_lib.c.
+ */
+#if !defined API_LIB_DEBUG || defined __DOXYGEN__
+#define API_LIB_DEBUG                   LWIP_DBG_OFF
+#endif
+
+/**
+ * API_MSG_DEBUG: Enable debugging in api_msg.c.
+ */
+#if !defined API_MSG_DEBUG || defined __DOXYGEN__
+#define API_MSG_DEBUG                   LWIP_DBG_OFF
+#endif
+
+/**
+ * SOCKETS_DEBUG: Enable debugging in sockets.c.
+ */
+#if !defined SOCKETS_DEBUG || defined __DOXYGEN__
+#define SOCKETS_DEBUG                   LWIP_DBG_OFF
+#endif
+
+/**
+ * ICMP_DEBUG: Enable debugging in icmp.c.
+ */
+#if !defined ICMP_DEBUG || defined __DOXYGEN__
+#define ICMP_DEBUG                      LWIP_DBG_OFF
+#endif
+
+/**
+ * IGMP_DEBUG: Enable debugging in igmp.c.
+ */
+#if !defined IGMP_DEBUG || defined __DOXYGEN__
+#define IGMP_DEBUG                      LWIP_DBG_OFF
+#endif
+
+/**
+ * INET_DEBUG: Enable debugging in inet.c.
+ */
+#if !defined INET_DEBUG || defined __DOXYGEN__
+#define INET_DEBUG                      LWIP_DBG_OFF
+#endif
+
+/**
+ * IP_DEBUG: Enable debugging for IP.
+ */
+#if !defined IP_DEBUG || defined __DOXYGEN__
+#define IP_DEBUG                        LWIP_DBG_OFF
+#endif
+
+/**
+ * IP_REASS_DEBUG: Enable debugging in ip_frag.c for both frag & reass.
+ */
+#if !defined IP_REASS_DEBUG || defined __DOXYGEN__
+#define IP_REASS_DEBUG                  LWIP_DBG_OFF
+#endif
+
+/**
+ * RAW_DEBUG: Enable debugging in raw.c.
+ */
+#if !defined RAW_DEBUG || defined __DOXYGEN__
+#define RAW_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/**
+ * MEM_DEBUG: Enable debugging in mem.c.
+ */
+#if !defined MEM_DEBUG || defined __DOXYGEN__
+#define MEM_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/**
+ * MEMP_DEBUG: Enable debugging in memp.c.
+ */
+#if !defined MEMP_DEBUG || defined __DOXYGEN__
+#define MEMP_DEBUG                      LWIP_DBG_OFF
+#endif
+
+/**
+ * SYS_DEBUG: Enable debugging in sys.c.
+ */
+#if !defined SYS_DEBUG || defined __DOXYGEN__
+#define SYS_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/**
+ * TIMERS_DEBUG: Enable debugging in timers.c.
+ */
+#if !defined TIMERS_DEBUG || defined __DOXYGEN__
+#define TIMERS_DEBUG                    LWIP_DBG_OFF
+#endif
+
+/**
+ * TCP_DEBUG: Enable debugging for TCP.
+ */
+#if !defined TCP_DEBUG || defined __DOXYGEN__
+#define TCP_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/**
+ * TCP_INPUT_DEBUG: Enable debugging in tcp_in.c for incoming debug.
+ */
+#if !defined TCP_INPUT_DEBUG || defined __DOXYGEN__
+#define TCP_INPUT_DEBUG                 LWIP_DBG_OFF
+#endif
+
+/**
+ * TCP_FR_DEBUG: Enable debugging in tcp_in.c for fast retransmit.
+ */
+#if !defined TCP_FR_DEBUG || defined __DOXYGEN__
+#define TCP_FR_DEBUG                    LWIP_DBG_OFF
+#endif
+
+/**
+ * TCP_RTO_DEBUG: Enable debugging in TCP for retransmit
+ * timeout.
+ */
+#if !defined TCP_RTO_DEBUG || defined __DOXYGEN__
+#define TCP_RTO_DEBUG                   LWIP_DBG_OFF
+#endif
+
+/**
+ * TCP_CWND_DEBUG: Enable debugging for TCP congestion window.
+ */
+#if !defined TCP_CWND_DEBUG || defined __DOXYGEN__
+#define TCP_CWND_DEBUG                  LWIP_DBG_OFF
+#endif
+
+/**
+ * TCP_WND_DEBUG: Enable debugging in tcp_in.c for window updating.
+ */
+#if !defined TCP_WND_DEBUG || defined __DOXYGEN__
+#define TCP_WND_DEBUG                   LWIP_DBG_OFF
+#endif
+
+/**
+ * TCP_OUTPUT_DEBUG: Enable debugging in tcp_out.c output functions.
+ */
+#if !defined TCP_OUTPUT_DEBUG || defined __DOXYGEN__
+#define TCP_OUTPUT_DEBUG                LWIP_DBG_OFF
+#endif
+
+/**
+ * TCP_RST_DEBUG: Enable debugging for TCP with the RST message.
+ */
+#if !defined TCP_RST_DEBUG || defined __DOXYGEN__
+#define TCP_RST_DEBUG                   LWIP_DBG_OFF
+#endif
+
+/**
+ * TCP_QLEN_DEBUG: Enable debugging for TCP queue lengths.
+ */
+#if !defined TCP_QLEN_DEBUG || defined __DOXYGEN__
+#define TCP_QLEN_DEBUG                  LWIP_DBG_OFF
+#endif
+
+/**
+ * UDP_DEBUG: Enable debugging in UDP.
+ */
+#if !defined UDP_DEBUG || defined __DOXYGEN__
+#define UDP_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/**
+ * TCPIP_DEBUG: Enable debugging in tcpip.c.
+ */
+#if !defined TCPIP_DEBUG || defined __DOXYGEN__
+#define TCPIP_DEBUG                     LWIP_DBG_OFF
+#endif
+
+/**
+ * SLIP_DEBUG: Enable debugging in slipif.c.
+ */
+#if !defined SLIP_DEBUG || defined __DOXYGEN__
+#define SLIP_DEBUG                      LWIP_DBG_OFF
+#endif
+
+/**
+ * DHCP_DEBUG: Enable debugging in dhcp.c.
+ */
+#if !defined DHCP_DEBUG || defined __DOXYGEN__
+#define DHCP_DEBUG                      LWIP_DBG_OFF
+#endif
+
+/**
+ * AUTOIP_DEBUG: Enable debugging in autoip.c.
+ */
+#if !defined AUTOIP_DEBUG || defined __DOXYGEN__
+#define AUTOIP_DEBUG                    LWIP_DBG_OFF
+#endif
+
+/**
+ * DNS_DEBUG: Enable debugging for DNS.
+ */
+#if !defined DNS_DEBUG || defined __DOXYGEN__
+#define DNS_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/**
+ * IP6_DEBUG: Enable debugging for IPv6.
+ */
+#if !defined IP6_DEBUG || defined __DOXYGEN__
+#define IP6_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/**
+ * DHCP6_DEBUG: Enable debugging in dhcp6.c.
+ */
+#if !defined DHCP6_DEBUG || defined __DOXYGEN__
+#define DHCP6_DEBUG                     LWIP_DBG_OFF
+#endif
+/**
+ * @}
+ */
+
+/**
+ * LWIP_TESTMODE: Changes to make unit test possible
+ */
+#if !defined LWIP_TESTMODE
+#define LWIP_TESTMODE                   0
+#endif
+
+/**
+ * NAPT_DEBUG: Enable debugging for NAPT.
+ */
+#ifndef NAPT_DEBUG
+#define NAPT_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/*
+   --------------------------------------------------
+   ---------- Performance tracking options ----------
+   --------------------------------------------------
+*/
+/**
+ * @defgroup lwip_opts_perf Performance
+ * @ingroup lwip_opts_debug
+ * @{
+ */
+/**
+ * LWIP_PERF: Enable performance testing for lwIP
+ * (if enabled, arch/perf.h is included)
+ */
+#if !defined LWIP_PERF || defined __DOXYGEN__
+#define LWIP_PERF                       0
+#endif
+/**
+ * @}
+ */
+
+#endif /* LWIP_HDR_OPT_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/pbuf.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/pbuf.h
new file mode 100644
index 00000000000..deac38dcc47
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/pbuf.h
@@ -0,0 +1,329 @@
+/**
+ * @file
+ * pbuf API
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+
+#ifndef LWIP_HDR_PBUF_H
+#define LWIP_HDR_PBUF_H
+
+#include "lwip/opt.h"
+#include "lwip/err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** LWIP_SUPPORT_CUSTOM_PBUF==1: Custom pbufs behave much like their pbuf type
+ * but they are allocated by external code (initialised by calling
+ * pbuf_alloced_custom()) and when pbuf_free gives up their last reference, they
+ * are freed by calling pbuf_custom->custom_free_function().
+ * Currently, the pbuf_custom code is only needed for one specific configuration
+ * of IP_FRAG, unless required by external driver/application code. */
+#ifndef LWIP_SUPPORT_CUSTOM_PBUF
+#define LWIP_SUPPORT_CUSTOM_PBUF ((IP_FRAG && !LWIP_NETIF_TX_SINGLE_PBUF) || (LWIP_IPV6 && LWIP_IPV6_FRAG))
+#endif
+
+/** @ingroup pbuf 
+ * PBUF_NEEDS_COPY(p): return a boolean value indicating whether the given
+ * pbuf needs to be copied in order to be kept around beyond the current call
+ * stack without risking being corrupted. The default setting provides safety:
+ * it will make a copy iof any pbuf chain that does not consist entirely of
+ * PBUF_ROM type pbufs. For setups with zero-copy support, it may be redefined
+ * to evaluate to true in all cases, for example. However, doing so also has an
+ * effect on the application side: any buffers that are *not* copied must also
+ * *not* be reused by the application after passing them to lwIP. For example,
+ * when setting PBUF_NEEDS_COPY to (0), after using udp_send() with a PBUF_RAM
+ * pbuf, the application must free the pbuf immediately, rather than reusing it
+ * for other purposes. For more background information on this, see tasks #6735
+ * and #7896, and bugs #11400 and #49914. */
+#ifndef PBUF_NEEDS_COPY
+#define PBUF_NEEDS_COPY(p)  ((p)->type_internal & PBUF_TYPE_FLAG_DATA_VOLATILE)
+#endif /* PBUF_NEEDS_COPY */
+
+/* @todo: We need a mechanism to prevent wasting memory in every pbuf
+   (TCP vs. UDP, IPv4 vs. IPv6: UDP/IPv4 packets may waste up to 28 bytes) */
+
+#define PBUF_TRANSPORT_HLEN 20
+#if LWIP_IPV6
+#define PBUF_IP_HLEN        40
+#else
+#define PBUF_IP_HLEN        20
+#endif
+
+/**
+ * @ingroup pbuf
+ * Enumeration of pbuf layers
+ */
+typedef enum {
+  /** Includes spare room for transport layer header, e.g. UDP header.
+   * Use this if you intend to pass the pbuf to functions like udp_send().
+   */
+  PBUF_TRANSPORT = PBUF_LINK_ENCAPSULATION_HLEN + PBUF_LINK_HLEN + PBUF_IP_HLEN + PBUF_TRANSPORT_HLEN,
+  /** Includes spare room for IP header.
+   * Use this if you intend to pass the pbuf to functions like raw_send().
+   */
+  PBUF_IP = PBUF_LINK_ENCAPSULATION_HLEN + PBUF_LINK_HLEN + PBUF_IP_HLEN,
+  /** Includes spare room for link layer header (ethernet header).
+   * Use this if you intend to pass the pbuf to functions like ethernet_output().
+   * @see PBUF_LINK_HLEN
+   */
+  PBUF_LINK = PBUF_LINK_ENCAPSULATION_HLEN + PBUF_LINK_HLEN,
+  /** Includes spare room for additional encapsulation header before ethernet
+   * headers (e.g. 802.11).
+   * Use this if you intend to pass the pbuf to functions like netif->linkoutput().
+   * @see PBUF_LINK_ENCAPSULATION_HLEN
+   */
+  PBUF_RAW_TX = PBUF_LINK_ENCAPSULATION_HLEN,
+  /** Use this for input packets in a netif driver when calling netif->input()
+   * in the most common case - ethernet-layer netif driver. */
+  PBUF_RAW = 0
+} pbuf_layer;
+
+
+/* Base flags for pbuf_type definitions: */
+
+/** Indicates that the payload directly follows the struct pbuf.
+ *  This makes @ref pbuf_header work in both directions. */
+#define PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS       0x80
+/** Indicates the data stored in this pbuf can change. If this pbuf needs
+ * to be queued, it must be copied/duplicated. */
+#define PBUF_TYPE_FLAG_DATA_VOLATILE                0x40
+/** 4 bits are reserved for 16 allocation sources (e.g. heap, pool1, pool2, etc)
+ * Internally, we use: 0=heap, 1=MEMP_PBUF, 2=MEMP_PBUF_POOL -> 13 types free*/
+#define PBUF_TYPE_ALLOC_SRC_MASK                    0x0F
+/** Indicates this pbuf is used for RX (if not set, indicates use for TX).
+ * This information can be used to keep some spare RX buffers e.g. for
+ * receiving TCP ACKs to unblock a connection) */
+#define PBUF_ALLOC_FLAG_RX                          0x0100
+/** Indicates the application needs the pbuf payload to be in one piece */
+#define PBUF_ALLOC_FLAG_DATA_CONTIGUOUS             0x0200
+
+#define PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP           0x00
+#define PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF      0x01
+#define PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL 0x02
+/** First pbuf allocation type for applications */
+#define PBUF_TYPE_ALLOC_SRC_MASK_APP_MIN            0x03
+/** Last pbuf allocation type for applications */
+#define PBUF_TYPE_ALLOC_SRC_MASK_APP_MAX            PBUF_TYPE_ALLOC_SRC_MASK
+
+/**
+ * @ingroup pbuf
+ * Enumeration of pbuf types
+ */
+typedef enum {
+  /** pbuf data is stored in RAM, used for TX mostly, struct pbuf and its payload
+      are allocated in one piece of contiguous memory (so the first payload byte
+      can be calculated from struct pbuf).
+      pbuf_alloc() allocates PBUF_RAM pbufs as unchained pbufs (although that might
+      change in future versions).
+      This should be used for all OUTGOING packets (TX).*/
+  PBUF_RAM = (PBUF_ALLOC_FLAG_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP),
+  /** pbuf data is stored in ROM, i.e. struct pbuf and its payload are located in
+      totally different memory areas. Since it points to ROM, payload does not
+      have to be copied when queued for transmission. */
+  PBUF_ROM = PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF,
+  /** pbuf comes from the pbuf pool. Much like PBUF_ROM but payload might change
+      so it has to be duplicated when queued before transmitting, depending on
+      who has a 'ref' to it. */
+  PBUF_REF = (PBUF_TYPE_FLAG_DATA_VOLATILE | PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF),
+  /** pbuf payload refers to RAM. This one comes from a pool and should be used
+      for RX. Payload can be chained (scatter-gather RX) but like PBUF_RAM, struct
+      pbuf and its payload are allocated in one piece of contiguous memory (so
+      the first payload byte can be calculated from struct pbuf).
+      Don't use this for TX, if the pool becomes empty e.g. because of TCP queuing,
+      you are unable to receive TCP acks! */
+  PBUF_POOL = (PBUF_ALLOC_FLAG_RX | PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL)
+} pbuf_type;
+
+
+/** indicates this packet's data should be immediately passed to the application */
+#define PBUF_FLAG_PUSH      0x01U
+/** indicates this is a custom pbuf: pbuf_free calls pbuf_custom->custom_free_function()
+    when the last reference is released (plus custom PBUF_RAM cannot be trimmed) */
+#define PBUF_FLAG_IS_CUSTOM 0x02U
+/** indicates this pbuf is UDP multicast to be looped back */
+#define PBUF_FLAG_MCASTLOOP 0x04U
+/** indicates this pbuf was received as link-level broadcast */
+#define PBUF_FLAG_LLBCAST   0x08U
+/** indicates this pbuf was received as link-level multicast */
+#define PBUF_FLAG_LLMCAST   0x10U
+/** indicates this pbuf includes a TCP FIN flag */
+#define PBUF_FLAG_TCP_FIN   0x20U
+
+/** Main packet buffer struct */
+struct pbuf {
+  /** next pbuf in singly linked pbuf chain */
+  struct pbuf *next;
+
+  /** pointer to the actual data in the buffer */
+  void *payload;
+
+  /**
+   * total length of this buffer and all next buffers in chain
+   * belonging to the same packet.
+   *
+   * For non-queue packet chains this is the invariant:
+   * p->tot_len == p->len + (p->next? p->next->tot_len: 0)
+   */
+  u16_t tot_len;
+
+  /** length of this buffer */
+  u16_t len;
+
+  /** a bit field indicating pbuf type and allocation sources
+      (see PBUF_TYPE_FLAG_*, PBUF_ALLOC_FLAG_* and PBUF_TYPE_ALLOC_SRC_MASK)
+    */
+  u8_t type_internal;
+
+  /** misc flags */
+  u8_t flags;
+
+  /**
+   * the reference count always equals the number of pointers
+   * that refer to this pbuf. This can be pointers from an application,
+   * the stack itself, or pbuf->next pointers from a chain.
+   */
+  LWIP_PBUF_REF_T ref;
+
+  /** For incoming packets, this contains the input netif's index */
+  u8_t if_idx;
+
+  /** In case the user needs to store data custom data on a pbuf */
+  LWIP_PBUF_CUSTOM_DATA
+#if ESP_PBUF
+  struct netif *l2_owner;
+  void *l2_buf;
+#endif
+};
+
+
+/** Helper struct for const-correctness only.
+ * The only meaning of this one is to provide a const payload pointer
+ * for PBUF_ROM type.
+ */
+struct pbuf_rom {
+  /** next pbuf in singly linked pbuf chain */
+  struct pbuf *next;
+
+  /** pointer to the actual data in the buffer */
+  const void *payload;
+};
+
+#if LWIP_SUPPORT_CUSTOM_PBUF
+/** Prototype for a function to free a custom pbuf */
+typedef void (*pbuf_free_custom_fn)(struct pbuf *p);
+
+/** A custom pbuf: like a pbuf, but following a function pointer to free it. */
+struct pbuf_custom {
+  /** The actual pbuf */
+  struct pbuf pbuf;
+  /** This function is called when pbuf_free deallocates this pbuf(_custom) */
+  pbuf_free_custom_fn custom_free_function;
+};
+#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
+
+/** Define this to 0 to prevent freeing ooseq pbufs when the PBUF_POOL is empty */
+#ifndef PBUF_POOL_FREE_OOSEQ
+#define PBUF_POOL_FREE_OOSEQ 1
+#endif /* PBUF_POOL_FREE_OOSEQ */
+#if LWIP_TCP && TCP_QUEUE_OOSEQ && NO_SYS && PBUF_POOL_FREE_OOSEQ
+extern volatile u8_t pbuf_free_ooseq_pending;
+void pbuf_free_ooseq(void);
+/** When not using sys_check_timeouts(), call PBUF_CHECK_FREE_OOSEQ()
+    at regular intervals from main level to check if ooseq pbufs need to be
+    freed! */
+#define PBUF_CHECK_FREE_OOSEQ() do { if(pbuf_free_ooseq_pending) { \
+  /* pbuf_alloc() reported PBUF_POOL to be empty -> try to free some \
+     ooseq queued pbufs now */ \
+  pbuf_free_ooseq(); }}while(0)
+#else /* LWIP_TCP && TCP_QUEUE_OOSEQ && NO_SYS && PBUF_POOL_FREE_OOSEQ */
+  /* Otherwise declare an empty PBUF_CHECK_FREE_OOSEQ */
+  #define PBUF_CHECK_FREE_OOSEQ()
+#endif /* LWIP_TCP && TCP_QUEUE_OOSEQ && NO_SYS && PBUF_POOL_FREE_OOSEQ*/
+
+/* Initializes the pbuf module. This call is empty for now, but may not be in future. */
+#define pbuf_init()
+
+struct pbuf *pbuf_alloc(pbuf_layer l, u16_t length, pbuf_type type);
+struct pbuf *pbuf_alloc_reference(void *payload, u16_t length, pbuf_type type);
+#if LWIP_SUPPORT_CUSTOM_PBUF
+struct pbuf *pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type,
+                                 struct pbuf_custom *p, void *payload_mem,
+                                 u16_t payload_mem_len);
+#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
+void pbuf_realloc(struct pbuf *p, u16_t size);
+#define pbuf_get_allocsrc(p)          ((p)->type_internal & PBUF_TYPE_ALLOC_SRC_MASK)
+#define pbuf_match_allocsrc(p, type)  (pbuf_get_allocsrc(p) == ((type) & PBUF_TYPE_ALLOC_SRC_MASK))
+#define pbuf_match_type(p, type)      pbuf_match_allocsrc(p, type)
+u8_t pbuf_header(struct pbuf *p, s16_t header_size);
+u8_t pbuf_header_force(struct pbuf *p, s16_t header_size);
+u8_t pbuf_add_header(struct pbuf *p, size_t header_size_increment);
+u8_t pbuf_add_header_force(struct pbuf *p, size_t header_size_increment);
+u8_t pbuf_remove_header(struct pbuf *p, size_t header_size);
+struct pbuf *pbuf_free_header(struct pbuf *q, u16_t size);
+void pbuf_ref(struct pbuf *p);
+u8_t pbuf_free(struct pbuf *p);
+u16_t pbuf_clen(const struct pbuf *p);
+void pbuf_cat(struct pbuf *head, struct pbuf *tail);
+void pbuf_chain(struct pbuf *head, struct pbuf *tail);
+struct pbuf *pbuf_dechain(struct pbuf *p);
+err_t pbuf_copy(struct pbuf *p_to, const struct pbuf *p_from);
+u16_t pbuf_copy_partial(const struct pbuf *p, void *dataptr, u16_t len, u16_t offset);
+void *pbuf_get_contiguous(const struct pbuf *p, void *buffer, size_t bufsize, u16_t len, u16_t offset);
+err_t pbuf_take(struct pbuf *buf, const void *dataptr, u16_t len);
+err_t pbuf_take_at(struct pbuf *buf, const void *dataptr, u16_t len, u16_t offset);
+struct pbuf *pbuf_skip(struct pbuf* in, u16_t in_offset, u16_t* out_offset);
+struct pbuf *pbuf_coalesce(struct pbuf *p, pbuf_layer layer);
+struct pbuf *pbuf_clone(pbuf_layer l, pbuf_type type, struct pbuf *p);
+#if LWIP_CHECKSUM_ON_COPY
+err_t pbuf_fill_chksum(struct pbuf *p, u16_t start_offset, const void *dataptr,
+                       u16_t len, u16_t *chksum);
+#endif /* LWIP_CHECKSUM_ON_COPY */
+#if LWIP_TCP && TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
+void pbuf_split_64k(struct pbuf *p, struct pbuf **rest);
+#endif /* LWIP_TCP && TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+
+u8_t pbuf_get_at(const struct pbuf* p, u16_t offset);
+int pbuf_try_get_at(const struct pbuf* p, u16_t offset);
+void pbuf_put_at(struct pbuf* p, u16_t offset, u8_t data);
+u16_t pbuf_memcmp(const struct pbuf* p, u16_t offset, const void* s2, u16_t n);
+u16_t pbuf_memfind(const struct pbuf* p, const void* mem, u16_t mem_len, u16_t start_offset);
+u16_t pbuf_strstr(const struct pbuf* p, const char* substr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PBUF_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/altcp_priv.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/altcp_priv.h
new file mode 100644
index 00000000000..d1de9b111b2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/altcp_priv.h
@@ -0,0 +1,159 @@
+/**
+ * @file
+ * Application layered TCP connection API (to be used from TCPIP thread)\n
+ * This interface mimics the tcp callback API to the application while preventing
+ * direct linking (much like virtual functions).
+ * This way, an application can make use of other application layer protocols
+ * on top of TCP without knowing the details (e.g. TLS, proxy connection).
+ */
+
+/*
+ * Copyright (c) 2017 Simon Goldschmidt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+#ifndef LWIP_HDR_ALTCP_PRIV_H
+#define LWIP_HDR_ALTCP_PRIV_H
+
+#include "lwip/opt.h"
+
+#if LWIP_ALTCP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/altcp.h"
+#include "lwip/ip_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct altcp_pcb *altcp_alloc(void);
+void altcp_free(struct altcp_pcb *conn);
+
+/* Function prototypes for application layers */
+typedef void (*altcp_set_poll_fn)(struct altcp_pcb *conn, u8_t interval);
+typedef void (*altcp_recved_fn)(struct altcp_pcb *conn, u16_t len);
+typedef err_t (*altcp_bind_fn)(struct altcp_pcb *conn, const ip_addr_t *ipaddr, u16_t port);
+typedef err_t (*altcp_connect_fn)(struct altcp_pcb *conn, const ip_addr_t *ipaddr, u16_t port, altcp_connected_fn connected);
+
+typedef struct altcp_pcb *(*altcp_listen_fn)(struct altcp_pcb *conn, u8_t backlog, err_t *err);
+
+typedef void  (*altcp_abort_fn)(struct altcp_pcb *conn);
+typedef err_t (*altcp_close_fn)(struct altcp_pcb *conn);
+typedef err_t (*altcp_shutdown_fn)(struct altcp_pcb *conn, int shut_rx, int shut_tx);
+
+typedef err_t (*altcp_write_fn)(struct altcp_pcb *conn, const void *dataptr, u16_t len, u8_t apiflags);
+typedef err_t (*altcp_output_fn)(struct altcp_pcb *conn);
+
+typedef u16_t (*altcp_mss_fn)(struct altcp_pcb *conn);
+typedef u16_t (*altcp_sndbuf_fn)(struct altcp_pcb *conn);
+typedef u16_t (*altcp_sndqueuelen_fn)(struct altcp_pcb *conn);
+typedef void  (*altcp_nagle_disable_fn)(struct altcp_pcb *conn);
+typedef void  (*altcp_nagle_enable_fn)(struct altcp_pcb *conn);
+typedef int   (*altcp_nagle_disabled_fn)(struct altcp_pcb *conn);
+
+typedef void  (*altcp_setprio_fn)(struct altcp_pcb *conn, u8_t prio);
+
+typedef void  (*altcp_dealloc_fn)(struct altcp_pcb *conn);
+
+typedef err_t (*altcp_get_tcp_addrinfo_fn)(struct altcp_pcb *conn, int local, ip_addr_t *addr, u16_t *port);
+typedef ip_addr_t *(*altcp_get_ip_fn)(struct altcp_pcb *conn, int local);
+typedef u16_t (*altcp_get_port_fn)(struct altcp_pcb *conn, int local);
+
+#if LWIP_TCP_KEEPALIVE
+typedef void  (*altcp_keepalive_disable_fn)(struct altcp_pcb *conn);
+typedef void  (*altcp_keepalive_enable_fn)(struct altcp_pcb *conn, u32_t idle, u32_t intvl, u32_t count);
+#endif
+
+#ifdef LWIP_DEBUG
+typedef enum tcp_state (*altcp_dbg_get_tcp_state_fn)(struct altcp_pcb *conn);
+#endif
+
+struct altcp_functions {
+  altcp_set_poll_fn           set_poll;
+  altcp_recved_fn             recved;
+  altcp_bind_fn               bind;
+  altcp_connect_fn            connect;
+  altcp_listen_fn             listen;
+  altcp_abort_fn              abort;
+  altcp_close_fn              close;
+  altcp_shutdown_fn           shutdown;
+  altcp_write_fn              write;
+  altcp_output_fn             output;
+  altcp_mss_fn                mss;
+  altcp_sndbuf_fn             sndbuf;
+  altcp_sndqueuelen_fn        sndqueuelen;
+  altcp_nagle_disable_fn      nagle_disable;
+  altcp_nagle_enable_fn       nagle_enable;
+  altcp_nagle_disabled_fn     nagle_disabled;
+  altcp_setprio_fn            setprio;
+  altcp_dealloc_fn            dealloc;
+  altcp_get_tcp_addrinfo_fn   addrinfo;
+  altcp_get_ip_fn             getip;
+  altcp_get_port_fn           getport;
+#if LWIP_TCP_KEEPALIVE
+  altcp_keepalive_disable_fn  keepalive_disable;
+  altcp_keepalive_enable_fn   keepalive_enable;
+#endif
+#ifdef LWIP_DEBUG
+  altcp_dbg_get_tcp_state_fn  dbg_get_tcp_state;
+#endif
+};
+
+void  altcp_default_set_poll(struct altcp_pcb *conn, u8_t interval);
+void  altcp_default_recved(struct altcp_pcb *conn, u16_t len);
+err_t altcp_default_bind(struct altcp_pcb *conn, const ip_addr_t *ipaddr, u16_t port);
+err_t altcp_default_shutdown(struct altcp_pcb *conn, int shut_rx, int shut_tx);
+err_t altcp_default_write(struct altcp_pcb *conn, const void *dataptr, u16_t len, u8_t apiflags);
+err_t altcp_default_output(struct altcp_pcb *conn);
+u16_t altcp_default_mss(struct altcp_pcb *conn);
+u16_t altcp_default_sndbuf(struct altcp_pcb *conn);
+u16_t altcp_default_sndqueuelen(struct altcp_pcb *conn);
+void  altcp_default_nagle_disable(struct altcp_pcb *conn);
+void  altcp_default_nagle_enable(struct altcp_pcb *conn);
+int   altcp_default_nagle_disabled(struct altcp_pcb *conn);
+void  altcp_default_setprio(struct altcp_pcb *conn, u8_t prio);
+void  altcp_default_dealloc(struct altcp_pcb *conn);
+err_t altcp_default_get_tcp_addrinfo(struct altcp_pcb *conn, int local, ip_addr_t *addr, u16_t *port);
+ip_addr_t *altcp_default_get_ip(struct altcp_pcb *conn, int local);
+u16_t altcp_default_get_port(struct altcp_pcb *conn, int local);
+#if LWIP_TCP_KEEPALIVE
+void  altcp_default_keepalive_disable(struct altcp_pcb *conn);
+void  altcp_default_keepalive_enable(struct altcp_pcb *conn, u32_t idle, u32_t intvl, u32_t count);
+#endif
+#ifdef LWIP_DEBUG
+enum tcp_state altcp_default_dbg_get_tcp_state(struct altcp_pcb *conn);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_ALTCP */
+
+#endif /* LWIP_HDR_ALTCP_PRIV_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/api_msg.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/api_msg.h
new file mode 100644
index 00000000000..08120567216
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/api_msg.h
@@ -0,0 +1,281 @@
+/**
+ * @file
+ * netconn API lwIP internal implementations (do not use in application code)
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_API_MSG_H
+#define LWIP_HDR_API_MSG_H
+
+#include "lwip/opt.h"
+
+#include "lwip/arch.h"
+#include "lwip/ip_addr.h"
+#include "lwip/err.h"
+#include "lwip/sys.h"
+#include "lwip/igmp.h"
+#include "lwip/api.h"
+#include "lwip/priv/tcpip_priv.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_NETCONN || LWIP_SOCKET /* don't build if not configured for use in lwipopts.h */
+/* Note: Netconn API is always available when sockets are enabled -
+ * sockets are implemented on top of them */
+
+#if LWIP_MPU_COMPATIBLE
+#if LWIP_NETCONN_SEM_PER_THREAD
+#define API_MSG_M_DEF_SEM(m)  *m
+#else
+#define API_MSG_M_DEF_SEM(m)  API_MSG_M_DEF(m)
+#endif
+#else /* LWIP_MPU_COMPATIBLE */
+#define API_MSG_M_DEF_SEM(m)  API_MSG_M_DEF(m)
+#endif /* LWIP_MPU_COMPATIBLE */
+
+/* For the netconn API, these values are use as a bitmask! */
+#define NETCONN_SHUT_RD   1
+#define NETCONN_SHUT_WR   2
+#define NETCONN_SHUT_RDWR (NETCONN_SHUT_RD | NETCONN_SHUT_WR)
+
+/* IP addresses and port numbers are expected to be in
+ * the same byte order as in the corresponding pcb.
+ */
+/** This struct includes everything that is necessary to execute a function
+    for a netconn in another thread context (mainly used to process netconns
+    in the tcpip_thread context to be thread safe). */
+struct api_msg {
+  /** The netconn which to process - always needed: it includes the semaphore
+      which is used to block the application thread until the function finished. */
+  struct netconn *conn;
+  /** The return value of the function executed in tcpip_thread. */
+  err_t err;
+  /** Depending on the executed function, one of these union members is used */
+  union {
+    /** used for lwip_netconn_do_send */
+    struct netbuf *b;
+    /** used for lwip_netconn_do_newconn */
+    struct {
+      u8_t proto;
+    } n;
+    /** used for lwip_netconn_do_bind and lwip_netconn_do_connect */
+    struct {
+      API_MSG_M_DEF_C(ip_addr_t, ipaddr);
+      u16_t port;
+      u8_t if_idx;
+    } bc;
+    /** used for lwip_netconn_do_getaddr */
+    struct {
+      ip_addr_t API_MSG_M_DEF(ipaddr);
+      u16_t API_MSG_M_DEF(port);
+      u8_t local;
+    } ad;
+    /** used for lwip_netconn_do_write */
+    struct {
+      /** current vector to write */
+      const struct netvector *vector;
+      /** number of unwritten vectors */
+      u16_t vector_cnt;
+      /** offset into current vector */
+      size_t vector_off;
+      /** total length across vectors */
+      size_t len;
+      /** offset into total length/output of bytes written when err == ERR_OK */
+      size_t offset;
+      u8_t apiflags;
+#if LWIP_SO_SNDTIMEO
+      u32_t time_started;
+#endif /* LWIP_SO_SNDTIMEO */
+    } w;
+    /** used for lwip_netconn_do_recv */
+    struct {
+      size_t len;
+    } r;
+#if LWIP_TCP
+    /** used for lwip_netconn_do_close (/shutdown) */
+    struct {
+      u8_t shut;
+#if LWIP_SO_SNDTIMEO || LWIP_SO_LINGER
+      u32_t time_started;
+#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
+      u8_t polls_left;
+#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
+    } sd;
+#endif /* LWIP_TCP */
+#if LWIP_IGMP || (LWIP_IPV6 && LWIP_IPV6_MLD)
+    /** used for lwip_netconn_do_join_leave_group */
+    struct {
+      API_MSG_M_DEF_C(ip_addr_t, multiaddr);
+      API_MSG_M_DEF_C(ip_addr_t, netif_addr);
+      u8_t if_idx;
+      enum netconn_igmp join_or_leave;
+    } jl;
+#endif /* LWIP_IGMP || (LWIP_IPV6 && LWIP_IPV6_MLD) */
+#if TCP_LISTEN_BACKLOG
+    struct {
+      u8_t backlog;
+    } lb;
+#endif /* TCP_LISTEN_BACKLOG */
+  } msg;
+#if LWIP_NETCONN_SEM_PER_THREAD
+  sys_sem_t* op_completed_sem;
+#endif /* LWIP_NETCONN_SEM_PER_THREAD */
+};
+
+#if LWIP_NETCONN_SEM_PER_THREAD
+#define LWIP_API_MSG_SEM(msg)          ((msg)->op_completed_sem)
+#else /* LWIP_NETCONN_SEM_PER_THREAD */
+#define LWIP_API_MSG_SEM(msg)          (&(msg)->conn->op_completed)
+#endif /* LWIP_NETCONN_SEM_PER_THREAD */
+
+
+#if LWIP_DNS
+/** As lwip_netconn_do_gethostbyname requires more arguments but doesn't require a netconn,
+    it has its own struct (to avoid struct api_msg getting bigger than necessary).
+    lwip_netconn_do_gethostbyname must be called using tcpip_callback instead of tcpip_apimsg
+    (see netconn_gethostbyname). */
+struct dns_api_msg {
+  /** Hostname to query or dotted IP address string */
+#if LWIP_MPU_COMPATIBLE
+  char name[DNS_MAX_NAME_LENGTH];
+#else /* LWIP_MPU_COMPATIBLE */
+  const char *name;
+#endif /* LWIP_MPU_COMPATIBLE */
+  /** The resolved address is stored here */
+  ip_addr_t API_MSG_M_DEF(addr);
+#if LWIP_IPV4 && LWIP_IPV6
+  /** Type of resolve call */
+  u8_t dns_addrtype;
+#endif /* LWIP_IPV4 && LWIP_IPV6 */
+  /** This semaphore is posted when the name is resolved, the application thread
+      should wait on it. */
+  sys_sem_t API_MSG_M_DEF_SEM(sem);
+  /** Errors are given back here */
+  err_t API_MSG_M_DEF(err);
+};
+#endif /* LWIP_DNS */
+
+#if LWIP_NETCONN_SEM_PER_THREAD
+#if ESP_THREAD_SAFE
+#define LWIP_NETCONN_THREAD_SEM_GET() sys_thread_sem_get()
+#define LWIP_NETCONN_THREAD_SEM_ALLOC() sys_thread_sem_init()
+#define LWIP_NETCONN_THREAD_SEM_FREE() sys_thread_sem_deinit()
+#endif
+#endif
+
+
+#if LWIP_NETCONN_FULLDUPLEX
+int lwip_netconn_is_deallocated_msg(void *msg);
+#endif
+int lwip_netconn_is_err_msg(void *msg, err_t *err);
+void lwip_netconn_do_newconn         (void *m);
+void lwip_netconn_do_delconn         (void *m);
+void lwip_netconn_do_bind            (void *m);
+void lwip_netconn_do_bind_if         (void *m);
+void lwip_netconn_do_connect         (void *m);
+void lwip_netconn_do_disconnect      (void *m);
+void lwip_netconn_do_listen          (void *m);
+void lwip_netconn_do_send            (void *m);
+void lwip_netconn_do_recv            (void *m);
+#if TCP_LISTEN_BACKLOG
+void lwip_netconn_do_accepted        (void *m);
+#endif /* TCP_LISTEN_BACKLOG */
+void lwip_netconn_do_write           (void *m);
+void lwip_netconn_do_getaddr         (void *m);
+void lwip_netconn_do_close           (void *m);
+void lwip_netconn_do_shutdown        (void *m);
+#if LWIP_IGMP || (LWIP_IPV6 && LWIP_IPV6_MLD)
+void lwip_netconn_do_join_leave_group(void *m);
+void lwip_netconn_do_join_leave_group_netif(void *m);
+#endif /* LWIP_IGMP || (LWIP_IPV6 && LWIP_IPV6_MLD) */
+
+#if LWIP_DNS
+void lwip_netconn_do_gethostbyname(void *arg);
+#endif /* LWIP_DNS */
+
+struct netconn* netconn_alloc(enum netconn_type t, netconn_callback callback);
+void netconn_free(struct netconn *conn);
+
+#endif /* LWIP_NETCONN || LWIP_SOCKET */
+
+#if LWIP_NETIF_API /* don't build if not configured for use in lwipopts.h */
+
+/* netifapi related lwIP internal definitions */
+
+#if LWIP_MPU_COMPATIBLE
+#define NETIFAPI_IPADDR_DEF(type, m)  type m
+#else /* LWIP_MPU_COMPATIBLE */
+#define NETIFAPI_IPADDR_DEF(type, m)  const type * m
+#endif /* LWIP_MPU_COMPATIBLE */
+
+typedef void (*netifapi_void_fn)(struct netif *netif);
+typedef err_t (*netifapi_errt_fn)(struct netif *netif);
+
+struct netifapi_msg {
+  struct tcpip_api_call_data call;
+  struct netif *netif;
+  union {
+    struct {
+#if LWIP_IPV4
+      NETIFAPI_IPADDR_DEF(ip4_addr_t, ipaddr);
+      NETIFAPI_IPADDR_DEF(ip4_addr_t, netmask);
+      NETIFAPI_IPADDR_DEF(ip4_addr_t, gw);
+#endif /* LWIP_IPV4 */
+      void *state;
+      netif_init_fn init;
+      netif_input_fn input;
+    } add;
+    struct {
+      netifapi_void_fn voidfunc;
+      netifapi_errt_fn errtfunc;
+    } common;
+    struct {
+#if LWIP_MPU_COMPATIBLE
+      char name[NETIF_NAMESIZE];
+#else /* LWIP_MPU_COMPATIBLE */
+      char *name;
+#endif /* LWIP_MPU_COMPATIBLE */
+      u8_t index;
+    } ifs;
+  } msg;
+};
+
+#endif /* LWIP_NETIF_API */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_API_MSG_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/mem_priv.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/mem_priv.h
new file mode 100644
index 00000000000..8630d754190
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/mem_priv.h
@@ -0,0 +1,84 @@
+/**
+ * @file
+ * lwIP internal memory implementations (do not use in application code)
+ */
+
+/*
+ * Copyright (c) 2018 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+
+#ifndef LWIP_HDR_MEM_PRIV_H
+#define LWIP_HDR_MEM_PRIV_H
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "lwip/mem.h"
+
+#if MEM_OVERFLOW_CHECK || MEMP_OVERFLOW_CHECK
+/* if MEM_OVERFLOW_CHECK or MEMP_OVERFLOW_CHECK is turned on, we reserve some
+ * bytes at the beginning and at the end of each element, initialize them as
+ * 0xcd and check them later.
+ * If MEM(P)_OVERFLOW_CHECK is >= 2, on every call to mem(p)_malloc or mem(p)_free,
+ * every single element in each pool/heap is checked!
+ * This is VERY SLOW but also very helpful.
+ * MEM_SANITY_REGION_BEFORE and MEM_SANITY_REGION_AFTER can be overridden in
+ * lwipopts.h to change the amount reserved for checking. */
+#ifndef MEM_SANITY_REGION_BEFORE
+#define MEM_SANITY_REGION_BEFORE  16
+#endif /* MEM_SANITY_REGION_BEFORE*/
+#if MEM_SANITY_REGION_BEFORE > 0
+#define MEM_SANITY_REGION_BEFORE_ALIGNED    LWIP_MEM_ALIGN_SIZE(MEM_SANITY_REGION_BEFORE)
+#else
+#define MEM_SANITY_REGION_BEFORE_ALIGNED    0
+#endif /* MEM_SANITY_REGION_BEFORE*/
+#ifndef MEM_SANITY_REGION_AFTER
+#define MEM_SANITY_REGION_AFTER   16
+#endif /* MEM_SANITY_REGION_AFTER*/
+#if MEM_SANITY_REGION_AFTER > 0
+#define MEM_SANITY_REGION_AFTER_ALIGNED     LWIP_MEM_ALIGN_SIZE(MEM_SANITY_REGION_AFTER)
+#else
+#define MEM_SANITY_REGION_AFTER_ALIGNED     0
+#endif /* MEM_SANITY_REGION_AFTER*/
+
+void mem_overflow_init_raw(void *p, size_t size);
+void mem_overflow_check_raw(void *p, size_t size, const char *descr1, const char *descr2);
+
+#endif /* MEM_OVERFLOW_CHECK || MEMP_OVERFLOW_CHECK */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_MEMP_PRIV_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/memp_priv.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/memp_priv.h
new file mode 100644
index 00000000000..1f14cb162be
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/memp_priv.h
@@ -0,0 +1,161 @@
+/**
+ * @file
+ * memory pools lwIP internal implementations (do not use in application code)
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+
+#ifndef LWIP_HDR_MEMP_PRIV_H
+#define LWIP_HDR_MEMP_PRIV_H
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "lwip/mem.h"
+#include "lwip/priv/mem_priv.h"
+
+#if MEMP_OVERFLOW_CHECK
+
+
+/* MEMP_SIZE: save space for struct memp and for sanity check */
+#define MEMP_SIZE          (LWIP_MEM_ALIGN_SIZE(sizeof(struct memp)) + MEM_SANITY_REGION_BEFORE_ALIGNED)
+#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x) + MEM_SANITY_REGION_AFTER_ALIGNED)
+
+#else /* MEMP_OVERFLOW_CHECK */
+
+/* No sanity checks
+ * We don't need to preserve the struct memp while not allocated, so we
+ * can save a little space and set MEMP_SIZE to 0.
+ */
+#define MEMP_SIZE           0
+#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x))
+
+#endif /* MEMP_OVERFLOW_CHECK */
+
+#if !MEMP_MEM_MALLOC || MEMP_OVERFLOW_CHECK
+struct memp {
+  struct memp *next;
+#if MEMP_OVERFLOW_CHECK
+  const char *file;
+  int line;
+#endif /* MEMP_OVERFLOW_CHECK */
+};
+#endif /* !MEMP_MEM_MALLOC || MEMP_OVERFLOW_CHECK */
+
+#if MEM_USE_POOLS && MEMP_USE_CUSTOM_POOLS
+/* Use a helper type to get the start and end of the user "memory pools" for mem_malloc */
+typedef enum {
+    /* Get the first (via:
+       MEMP_POOL_HELPER_START = ((u8_t) 1*MEMP_POOL_A + 0*MEMP_POOL_B + 0*MEMP_POOL_C + 0)*/
+    MEMP_POOL_HELPER_FIRST = ((u8_t)
+#define LWIP_MEMPOOL(name,num,size,desc)
+#define LWIP_MALLOC_MEMPOOL_START 1
+#define LWIP_MALLOC_MEMPOOL(num, size) * MEMP_POOL_##size + 0
+#define LWIP_MALLOC_MEMPOOL_END
+#include "lwip/priv/memp_std.h"
+    ) ,
+    /* Get the last (via:
+       MEMP_POOL_HELPER_END = ((u8_t) 0 + MEMP_POOL_A*0 + MEMP_POOL_B*0 + MEMP_POOL_C*1) */
+    MEMP_POOL_HELPER_LAST = ((u8_t)
+#define LWIP_MEMPOOL(name,num,size,desc)
+#define LWIP_MALLOC_MEMPOOL_START
+#define LWIP_MALLOC_MEMPOOL(num, size) 0 + MEMP_POOL_##size *
+#define LWIP_MALLOC_MEMPOOL_END 1
+#include "lwip/priv/memp_std.h"
+    )
+} memp_pool_helper_t;
+
+/* The actual start and stop values are here (cast them over)
+   We use this helper type and these defines so we can avoid using const memp_t values */
+#define MEMP_POOL_FIRST ((memp_t) MEMP_POOL_HELPER_FIRST)
+#define MEMP_POOL_LAST   ((memp_t) MEMP_POOL_HELPER_LAST)
+#endif /* MEM_USE_POOLS && MEMP_USE_CUSTOM_POOLS */
+
+/** Memory pool descriptor */
+struct memp_desc {
+#if defined(LWIP_DEBUG) || MEMP_OVERFLOW_CHECK || LWIP_STATS_DISPLAY
+  /** Textual description */
+  const char *desc;
+#endif /* LWIP_DEBUG || MEMP_OVERFLOW_CHECK || LWIP_STATS_DISPLAY */
+#if MEMP_STATS
+  /** Statistics */
+  struct stats_mem *stats;
+#endif
+
+  /** Element size */
+  u16_t size;
+
+#if !MEMP_MEM_MALLOC
+  /** Number of elements */
+  u16_t num;
+
+  /** Base address */
+  u8_t *base;
+
+  /** First free element of each pool. Elements form a linked list. */
+  struct memp **tab;
+#endif /* MEMP_MEM_MALLOC */
+};
+
+#if defined(LWIP_DEBUG) || MEMP_OVERFLOW_CHECK || LWIP_STATS_DISPLAY
+#define DECLARE_LWIP_MEMPOOL_DESC(desc) (desc),
+#else
+#define DECLARE_LWIP_MEMPOOL_DESC(desc)
+#endif
+
+#if MEMP_STATS
+#define LWIP_MEMPOOL_DECLARE_STATS_INSTANCE(name) static struct stats_mem name;
+#define LWIP_MEMPOOL_DECLARE_STATS_REFERENCE(name) &name,
+#else
+#define LWIP_MEMPOOL_DECLARE_STATS_INSTANCE(name)
+#define LWIP_MEMPOOL_DECLARE_STATS_REFERENCE(name)
+#endif
+
+void memp_init_pool(const struct memp_desc *desc);
+
+#if MEMP_OVERFLOW_CHECK
+void *memp_malloc_pool_fn(const struct memp_desc* desc, const char* file, const int line);
+#define memp_malloc_pool(d) memp_malloc_pool_fn((d), __FILE__, __LINE__)
+#else
+void *memp_malloc_pool(const struct memp_desc *desc);
+#endif
+void  memp_free_pool(const struct memp_desc* desc, void *mem);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_MEMP_PRIV_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/memp_std.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/memp_std.h
new file mode 100644
index 00000000000..669ad4d7e6b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/memp_std.h
@@ -0,0 +1,153 @@
+/**
+ * @file
+ * lwIP internal memory pools (do not use in application code)
+ * This file is deliberately included multiple times: once with empty
+ * definition of LWIP_MEMPOOL() to handle all includes and multiple times
+ * to build up various lists of mem pools.
+ */
+
+/*
+ * SETUP: Make sure we define everything we will need.
+ *
+ * We have create three types of pools:
+ *   1) MEMPOOL - standard pools
+ *   2) MALLOC_MEMPOOL - to be used by mem_malloc in mem.c
+ *   3) PBUF_MEMPOOL - a mempool of pbuf's, so include space for the pbuf struct
+ *
+ * If the include'r doesn't require any special treatment of each of the types
+ * above, then will declare #2 & #3 to be just standard mempools.
+ */
+#ifndef LWIP_MALLOC_MEMPOOL
+/* This treats "malloc pools" just like any other pool.
+   The pools are a little bigger to provide 'size' as the amount of user data. */
+#define LWIP_MALLOC_MEMPOOL(num, size) LWIP_MEMPOOL(POOL_##size, num, (size + LWIP_MEM_ALIGN_SIZE(sizeof(struct memp_malloc_helper))), "MALLOC_"#size)
+#define LWIP_MALLOC_MEMPOOL_START
+#define LWIP_MALLOC_MEMPOOL_END
+#endif /* LWIP_MALLOC_MEMPOOL */
+
+#ifndef LWIP_PBUF_MEMPOOL
+/* This treats "pbuf pools" just like any other pool.
+ * Allocates buffers for a pbuf struct AND a payload size */
+#define LWIP_PBUF_MEMPOOL(name, num, payload, desc) LWIP_MEMPOOL(name, num, (LWIP_MEM_ALIGN_SIZE(sizeof(struct pbuf)) + LWIP_MEM_ALIGN_SIZE(payload)), desc)
+#endif /* LWIP_PBUF_MEMPOOL */
+
+
+/*
+ * A list of internal pools used by LWIP.
+ *
+ * LWIP_MEMPOOL(pool_name, number_elements, element_size, pool_description)
+ *     creates a pool name MEMP_pool_name. description is used in stats.c
+ */
+#if LWIP_RAW
+LWIP_MEMPOOL(RAW_PCB,        MEMP_NUM_RAW_PCB,         sizeof(struct raw_pcb),        "RAW_PCB")
+#endif /* LWIP_RAW */
+
+#if LWIP_UDP
+LWIP_MEMPOOL(UDP_PCB,        MEMP_NUM_UDP_PCB,         sizeof(struct udp_pcb),        "UDP_PCB")
+#endif /* LWIP_UDP */
+
+#if LWIP_TCP
+LWIP_MEMPOOL(TCP_PCB,        MEMP_NUM_TCP_PCB,         sizeof(struct tcp_pcb),        "TCP_PCB")
+LWIP_MEMPOOL(TCP_PCB_LISTEN, MEMP_NUM_TCP_PCB_LISTEN,  sizeof(struct tcp_pcb_listen), "TCP_PCB_LISTEN")
+LWIP_MEMPOOL(TCP_SEG,        MEMP_NUM_TCP_SEG,         sizeof(struct tcp_seg),        "TCP_SEG")
+#endif /* LWIP_TCP */
+
+#if LWIP_ALTCP && LWIP_TCP
+LWIP_MEMPOOL(ALTCP_PCB,      MEMP_NUM_ALTCP_PCB,       sizeof(struct altcp_pcb),      "ALTCP_PCB")
+#endif /* LWIP_ALTCP && LWIP_TCP */
+
+#if LWIP_IPV4 && IP_REASSEMBLY
+LWIP_MEMPOOL(REASSDATA,      MEMP_NUM_REASSDATA,       sizeof(struct ip_reassdata),   "REASSDATA")
+#endif /* LWIP_IPV4 && IP_REASSEMBLY */
+#if (IP_FRAG && !LWIP_NETIF_TX_SINGLE_PBUF) || (LWIP_IPV6 && LWIP_IPV6_FRAG)
+LWIP_MEMPOOL(FRAG_PBUF,      MEMP_NUM_FRAG_PBUF,       sizeof(struct pbuf_custom_ref),"FRAG_PBUF")
+#endif /* IP_FRAG && !LWIP_NETIF_TX_SINGLE_PBUF || (LWIP_IPV6 && LWIP_IPV6_FRAG) */
+
+#if LWIP_NETCONN || LWIP_SOCKET
+LWIP_MEMPOOL(NETBUF,         MEMP_NUM_NETBUF,          sizeof(struct netbuf),         "NETBUF")
+LWIP_MEMPOOL(NETCONN,        MEMP_NUM_NETCONN,         sizeof(struct netconn),        "NETCONN")
+#endif /* LWIP_NETCONN || LWIP_SOCKET */
+
+#if NO_SYS==0
+LWIP_MEMPOOL(TCPIP_MSG_API,  MEMP_NUM_TCPIP_MSG_API,   sizeof(struct tcpip_msg),      "TCPIP_MSG_API")
+#if LWIP_MPU_COMPATIBLE
+LWIP_MEMPOOL(API_MSG,        MEMP_NUM_API_MSG,         sizeof(struct api_msg),        "API_MSG")
+#if LWIP_DNS
+LWIP_MEMPOOL(DNS_API_MSG,    MEMP_NUM_DNS_API_MSG,     sizeof(struct dns_api_msg),    "DNS_API_MSG")
+#endif
+#if LWIP_SOCKET && !LWIP_TCPIP_CORE_LOCKING
+LWIP_MEMPOOL(SOCKET_SETGETSOCKOPT_DATA, MEMP_NUM_SOCKET_SETGETSOCKOPT_DATA, sizeof(struct lwip_setgetsockopt_data), "SOCKET_SETGETSOCKOPT_DATA")
+#endif
+#if LWIP_SOCKET && (LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL)
+LWIP_MEMPOOL(SELECT_CB,      MEMP_NUM_SELECT_CB,       sizeof(struct lwip_select_cb), "SELECT_CB")
+#endif /* LWIP_SOCKET && (LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL) */
+#if LWIP_NETIF_API
+LWIP_MEMPOOL(NETIFAPI_MSG,   MEMP_NUM_NETIFAPI_MSG,    sizeof(struct netifapi_msg),   "NETIFAPI_MSG")
+#endif
+#endif /* LWIP_MPU_COMPATIBLE */
+#if !LWIP_TCPIP_CORE_LOCKING_INPUT
+LWIP_MEMPOOL(TCPIP_MSG_INPKT,MEMP_NUM_TCPIP_MSG_INPKT, sizeof(struct tcpip_msg),      "TCPIP_MSG_INPKT")
+#endif /* !LWIP_TCPIP_CORE_LOCKING_INPUT */
+#endif /* NO_SYS==0 */
+
+#if LWIP_IPV4 && LWIP_ARP && ARP_QUEUEING
+LWIP_MEMPOOL(ARP_QUEUE,      MEMP_NUM_ARP_QUEUE,       sizeof(struct etharp_q_entry), "ARP_QUEUE")
+#endif /* LWIP_IPV4 && LWIP_ARP && ARP_QUEUEING */
+
+#if LWIP_IGMP
+LWIP_MEMPOOL(IGMP_GROUP,     MEMP_NUM_IGMP_GROUP,      sizeof(struct igmp_group),     "IGMP_GROUP")
+#endif /* LWIP_IGMP */
+
+#if LWIP_TIMERS && !LWIP_TIMERS_CUSTOM
+LWIP_MEMPOOL(SYS_TIMEOUT,    MEMP_NUM_SYS_TIMEOUT,     sizeof(struct sys_timeo),      "SYS_TIMEOUT")
+#endif /* LWIP_TIMERS && !LWIP_TIMERS_CUSTOM */
+
+#if LWIP_DNS && LWIP_SOCKET
+LWIP_MEMPOOL(NETDB,          MEMP_NUM_NETDB,           NETDB_ELEM_SIZE,               "NETDB")
+#endif /* LWIP_DNS && LWIP_SOCKET */
+#if LWIP_DNS && DNS_LOCAL_HOSTLIST && DNS_LOCAL_HOSTLIST_IS_DYNAMIC
+LWIP_MEMPOOL(LOCALHOSTLIST,  MEMP_NUM_LOCALHOSTLIST,   LOCALHOSTLIST_ELEM_SIZE,       "LOCALHOSTLIST")
+#endif /* LWIP_DNS && DNS_LOCAL_HOSTLIST && DNS_LOCAL_HOSTLIST_IS_DYNAMIC */
+
+#if LWIP_IPV6 && LWIP_ND6_QUEUEING
+LWIP_MEMPOOL(ND6_QUEUE,      MEMP_NUM_ND6_QUEUE,       sizeof(struct nd6_q_entry),    "ND6_QUEUE")
+#endif /* LWIP_IPV6 && LWIP_ND6_QUEUEING */
+
+#if LWIP_IPV6 && LWIP_IPV6_REASS
+LWIP_MEMPOOL(IP6_REASSDATA,  MEMP_NUM_REASSDATA,       sizeof(struct ip6_reassdata),  "IP6_REASSDATA")
+#endif /* LWIP_IPV6 && LWIP_IPV6_REASS */
+
+#if LWIP_IPV6 && LWIP_IPV6_MLD
+LWIP_MEMPOOL(MLD6_GROUP,     MEMP_NUM_MLD6_GROUP,      sizeof(struct mld_group),      "MLD6_GROUP")
+#endif /* LWIP_IPV6 && LWIP_IPV6_MLD */
+
+
+/*
+ * A list of pools of pbuf's used by LWIP.
+ *
+ * LWIP_PBUF_MEMPOOL(pool_name, number_elements, pbuf_payload_size, pool_description)
+ *     creates a pool name MEMP_pool_name. description is used in stats.c
+ *     This allocates enough space for the pbuf struct and a payload.
+ *     (Example: pbuf_payload_size=0 allocates only size for the struct)
+ */
+LWIP_MEMPOOL(PBUF,           MEMP_NUM_PBUF,            sizeof(struct pbuf),           "PBUF_REF/ROM")
+LWIP_PBUF_MEMPOOL(PBUF_POOL, PBUF_POOL_SIZE,           PBUF_POOL_BUFSIZE,             "PBUF_POOL")
+
+
+/*
+ * Allow for user-defined pools; this must be explicitly set in lwipopts.h
+ * since the default is to NOT look for lwippools.h
+ */
+#if MEMP_USE_CUSTOM_POOLS
+#include "lwippools.h"
+#endif /* MEMP_USE_CUSTOM_POOLS */
+
+/*
+ * REQUIRED CLEANUP: Clear up so we don't get "multiply defined" error later
+ * (#undef is ignored for something that is not defined)
+ */
+#undef LWIP_MEMPOOL
+#undef LWIP_MALLOC_MEMPOOL
+#undef LWIP_MALLOC_MEMPOOL_START
+#undef LWIP_MALLOC_MEMPOOL_END
+#undef LWIP_PBUF_MEMPOOL
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/nd6_priv.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/nd6_priv.h
new file mode 100644
index 00000000000..cc3007d9728
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/nd6_priv.h
@@ -0,0 +1,142 @@
+/**
+ * @file
+ *
+ * Neighbor discovery and stateless address autoconfiguration for IPv6.
+ * Aims to be compliant with RFC 4861 (Neighbor discovery) and RFC 4862
+ * (Address autoconfiguration).
+ */
+
+/*
+ * Copyright (c) 2010 Inico Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Ivan Delamer <delamer@inicotech.com>
+ *
+ *
+ * Please coordinate changes and requests with Ivan Delamer
+ * <delamer@inicotech.com>
+ */
+
+#ifndef LWIP_HDR_ND6_PRIV_H
+#define LWIP_HDR_ND6_PRIV_H
+
+#include "lwip/opt.h"
+
+#if LWIP_IPV6  /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/pbuf.h"
+#include "lwip/ip6_addr.h"
+#include "lwip/netif.h"
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_ND6_QUEUEING
+/** struct for queueing outgoing packets for unknown address
+  * defined here to be accessed by memp.h
+  */
+struct nd6_q_entry {
+  struct nd6_q_entry *next;
+  struct pbuf *p;
+};
+#endif /* LWIP_ND6_QUEUEING */
+
+/** Struct for tables. */
+struct nd6_neighbor_cache_entry {
+  ip6_addr_t next_hop_address;
+  struct netif *netif;
+  u8_t lladdr[NETIF_MAX_HWADDR_LEN];
+  /*u32_t pmtu;*/
+#if LWIP_ND6_QUEUEING
+  /** Pointer to queue of pending outgoing packets on this entry. */
+  struct nd6_q_entry *q;
+#else /* LWIP_ND6_QUEUEING */
+  /** Pointer to a single pending outgoing packet on this entry. */
+  struct pbuf *q;
+#endif /* LWIP_ND6_QUEUEING */
+  u8_t state;
+  u8_t isrouter;
+  union {
+    u32_t reachable_time; /* in seconds */
+    u32_t delay_time;     /* ticks (ND6_TMR_INTERVAL) */
+    u32_t probes_sent;
+    u32_t stale_time;     /* ticks (ND6_TMR_INTERVAL) */
+  } counter;
+};
+
+struct nd6_destination_cache_entry {
+  ip6_addr_t destination_addr;
+  ip6_addr_t next_hop_addr;
+  u16_t pmtu;
+  u32_t age;
+};
+
+struct nd6_prefix_list_entry {
+  ip6_addr_t prefix;
+  struct netif *netif;
+  u32_t invalidation_timer; /* in seconds */
+};
+
+struct nd6_router_list_entry {
+  struct nd6_neighbor_cache_entry *neighbor_entry;
+  u32_t invalidation_timer; /* in seconds */
+  u8_t flags;
+};
+
+enum nd6_neighbor_cache_entry_state {
+  ND6_NO_ENTRY = 0,
+  ND6_INCOMPLETE,
+  ND6_REACHABLE,
+  ND6_STALE,
+  ND6_DELAY,
+  ND6_PROBE
+};
+
+#define ND6_HOPLIM 255 /* maximum hop limit, required in all ND packets */
+
+#define ND6_2HRS 7200 /* two hours, expressed in number of seconds */
+
+/* Router tables. */
+/* @todo make these static? and entries accessible through API? */
+extern struct nd6_neighbor_cache_entry neighbor_cache[];
+extern struct nd6_destination_cache_entry destination_cache[];
+extern struct nd6_prefix_list_entry prefix_list[];
+extern struct nd6_router_list_entry default_router_list[];
+
+/* Default values, can be updated by a RA message. */
+extern u32_t reachable_time;
+extern u32_t retrans_timer;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV6 */
+
+#endif /* LWIP_HDR_ND6_PRIV_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/raw_priv.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/raw_priv.h
new file mode 100644
index 00000000000..d4561d4f329
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/raw_priv.h
@@ -0,0 +1,69 @@
+/**
+ * @file
+ * raw API internal implementations (do not use in application code)
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_RAW_PRIV_H
+#define LWIP_HDR_RAW_PRIV_H
+
+#include "lwip/opt.h"
+
+#if LWIP_RAW /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/raw.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** return codes for raw_input */
+typedef enum raw_input_state
+{
+  RAW_INPUT_NONE = 0, /* pbuf did not match any pcbs */
+  RAW_INPUT_EATEN,    /* pbuf handed off and delivered to pcb */
+  RAW_INPUT_DELIVERED /* pbuf only delivered to pcb (pbuf can still be referenced) */
+} raw_input_state_t;
+
+/* The following functions are the lower layer interface to RAW. */
+raw_input_state_t raw_input(struct pbuf *p, struct netif *inp);
+
+void raw_netif_ip_addr_changed(const ip_addr_t* old_addr, const ip_addr_t* new_addr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_RAW */
+
+#endif /* LWIP_HDR_RAW_PRIV_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/sockets_priv.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/sockets_priv.h
new file mode 100644
index 00000000000..48074ee3c44
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/sockets_priv.h
@@ -0,0 +1,180 @@
+/**
+ * @file
+ * Sockets API internal implementations (do not use in application code)
+ */
+
+/*
+ * Copyright (c) 2017 Joel Cunningham, Garmin International, Inc. <joel.cunningham@garmin.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Joel Cunningham <joel.cunningham@me.com>
+ *
+ */
+#ifndef LWIP_HDR_SOCKETS_PRIV_H
+#define LWIP_HDR_SOCKETS_PRIV_H
+
+#include "lwip/opt.h"
+
+#if LWIP_SOCKET /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/err.h"
+#include "lwip/sockets.h"
+#include "lwip/sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define NUM_SOCKETS MEMP_NUM_NETCONN
+
+/** This is overridable for the rare case where more than 255 threads
+ * select on the same socket...
+ */
+#ifndef SELWAIT_T
+#define SELWAIT_T u8_t
+#endif
+
+union lwip_sock_lastdata {
+  struct netbuf *netbuf;
+  struct pbuf *pbuf;
+};
+
+/** Contains all internal pointers and states used for a socket */
+struct lwip_sock {
+  /** sockets currently are built on netconns, each socket has one netconn */
+  struct netconn *conn;
+  /** data that was left from the previous read */
+  union lwip_sock_lastdata lastdata;
+#if LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL
+  /** number of times data was received, set by event_callback(),
+      tested by the receive and select functions */
+  s16_t rcvevent;
+  /** number of times data was ACKed (free send buffer), set by event_callback(),
+      tested by select */
+  u16_t sendevent;
+  /** error happened for this socket, set by event_callback(), tested by select */
+  u16_t errevent;
+  /** counter of how many threads are waiting for this socket using select */
+  SELWAIT_T select_waiting;
+#endif /* LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL */
+#if LWIP_NETCONN_FULLDUPLEX
+  /* counter of how many threads are using a struct lwip_sock (not the 'int') */
+  u8_t fd_used;
+  /* status of pending close/delete actions */
+  u8_t fd_free_pending;
+#define LWIP_SOCK_FD_FREE_TCP  1
+#define LWIP_SOCK_FD_FREE_FREE 2
+#endif
+
+#if ESP_LWIP_LOCK
+  sys_mutex_t lock;
+#endif
+
+};
+
+#ifndef set_errno
+#define set_errno(err) do { if (err) { errno = (err); } } while(0)
+#endif
+
+#if !LWIP_TCPIP_CORE_LOCKING
+/** Maximum optlen used by setsockopt/getsockopt */
+#define LWIP_SETGETSOCKOPT_MAXOPTLEN LWIP_MAX(16, sizeof(struct ifreq))
+
+/** This struct is used to pass data to the set/getsockopt_internal
+ * functions running in tcpip_thread context (only a void* is allowed) */
+struct lwip_setgetsockopt_data {
+  /** socket index for which to change options */
+  int s;
+  /** level of the option to process */
+  int level;
+  /** name of the option to process */
+  int optname;
+  /** set: value to set the option to
+    * get: value of the option is stored here */
+#if LWIP_MPU_COMPATIBLE
+  u8_t optval[LWIP_SETGETSOCKOPT_MAXOPTLEN];
+#else
+  union {
+    void *p;
+    const void *pc;
+  } optval;
+#endif
+  /** size of *optval */
+  socklen_t optlen;
+  /** if an error occurs, it is temporarily stored here */
+  int err;
+  /** semaphore to wake up the calling task */
+  void* completed_sem;
+};
+#endif /* !LWIP_TCPIP_CORE_LOCKING */
+
+#ifdef __cplusplus
+}
+#endif
+
+struct lwip_sock* lwip_socket_dbg_get_socket(int fd);
+
+#if LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL
+
+#if LWIP_NETCONN_SEM_PER_THREAD
+#define SELECT_SEM_T        sys_sem_t*
+#define SELECT_SEM_PTR(sem) (sem)
+#else /* LWIP_NETCONN_SEM_PER_THREAD */
+#define SELECT_SEM_T        sys_sem_t
+#define SELECT_SEM_PTR(sem) (&(sem))
+#endif /* LWIP_NETCONN_SEM_PER_THREAD */
+
+/** Description for a task waiting in select */
+struct lwip_select_cb {
+  /** Pointer to the next waiting task */
+  struct lwip_select_cb *next;
+  /** Pointer to the previous waiting task */
+  struct lwip_select_cb *prev;
+#if LWIP_SOCKET_SELECT
+  /** readset passed to select */
+  fd_set *readset;
+  /** writeset passed to select */
+  fd_set *writeset;
+  /** unimplemented: exceptset passed to select */
+  fd_set *exceptset;
+#endif /* LWIP_SOCKET_SELECT */
+#if LWIP_SOCKET_POLL
+  /** fds passed to poll; NULL if select */
+  struct pollfd *poll_fds;
+  /** nfds passed to poll; 0 if select */
+  nfds_t poll_nfds;
+#endif /* LWIP_SOCKET_POLL */
+  /** don't signal the same semaphore twice: set to 1 when signalled */
+  int sem_signalled;
+  /** semaphore to wake up a task waiting for select */
+  SELECT_SEM_T sem;
+};
+#endif /* LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL */
+
+#endif /* LWIP_SOCKET */
+
+#endif /* LWIP_HDR_SOCKETS_PRIV_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/tcp_priv.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/tcp_priv.h
new file mode 100644
index 00000000000..72f9126d465
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/tcp_priv.h
@@ -0,0 +1,523 @@
+/**
+ * @file
+ * TCP internal implementations (do not use in application code)
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_TCP_PRIV_H
+#define LWIP_HDR_TCP_PRIV_H
+
+#include "lwip/opt.h"
+
+#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/tcp.h"
+#include "lwip/mem.h"
+#include "lwip/pbuf.h"
+#include "lwip/ip.h"
+#include "lwip/icmp.h"
+#include "lwip/err.h"
+#include "lwip/ip6.h"
+#include "lwip/ip6_addr.h"
+#include "lwip/prot/tcp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Functions for interfacing with TCP: */
+
+/* Lower layer interface to TCP: */
+void             tcp_init    (void);  /* Initialize this module. */
+void             tcp_tmr     (void);  /* Must be called every
+                                         TCP_TMR_INTERVAL
+                                         ms. (Typically 250 ms). */
+/* It is also possible to call these two functions at the right
+   intervals (instead of calling tcp_tmr()). */
+void             tcp_slowtmr (void);
+void             tcp_fasttmr (void);
+
+/* Call this from a netif driver (watch out for threading issues!) that has
+   returned a memory error on transmit and now has free buffers to send more.
+   This iterates all active pcbs that had an error and tries to call
+   tcp_output, so use this with care as it might slow down the system. */
+void             tcp_txnow   (void);
+
+/* Only used by IP to pass a TCP segment to TCP: */
+void             tcp_input   (struct pbuf *p, struct netif *inp);
+/* Used within the TCP code only: */
+struct tcp_pcb * tcp_alloc   (u8_t prio);
+void             tcp_free    (struct tcp_pcb *pcb);
+void             tcp_abandon (struct tcp_pcb *pcb, int reset);
+err_t            tcp_send_empty_ack(struct tcp_pcb *pcb);
+err_t            tcp_rexmit  (struct tcp_pcb *pcb);
+err_t            tcp_rexmit_rto_prepare(struct tcp_pcb *pcb);
+void             tcp_rexmit_rto_commit(struct tcp_pcb *pcb);
+void             tcp_rexmit_rto  (struct tcp_pcb *pcb);
+void             tcp_rexmit_fast (struct tcp_pcb *pcb);
+u32_t            tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb);
+err_t            tcp_process_refused_data(struct tcp_pcb *pcb);
+
+/**
+ * This is the Nagle algorithm: try to combine user data to send as few TCP
+ * segments as possible. Only send if
+ * - no previously transmitted data on the connection remains unacknowledged or
+ * - the TF_NODELAY flag is set (nagle algorithm turned off for this pcb) or
+ * - the only unsent segment is at least pcb->mss bytes long (or there is more
+ *   than one unsent segment - with lwIP, this can happen although unsent->len < mss)
+ * - or if we are in fast-retransmit (TF_INFR)
+ */
+#define tcp_do_output_nagle(tpcb) ((((tpcb)->unacked == NULL) || \
+                            ((tpcb)->flags & (TF_NODELAY | TF_INFR)) || \
+                            (((tpcb)->unsent != NULL) && (((tpcb)->unsent->next != NULL) || \
+                              ((tpcb)->unsent->len >= (tpcb)->mss))) || \
+                            ((tcp_sndbuf(tpcb) == 0) || (tcp_sndqueuelen(tpcb) >= TCP_SND_QUEUELEN)) \
+                            ) ? 1 : 0)
+#define tcp_output_nagle(tpcb) (tcp_do_output_nagle(tpcb) ? tcp_output(tpcb) : ERR_OK)
+
+
+#define TCP_SEQ_LT(a,b)     ((s32_t)((u32_t)(a) - (u32_t)(b)) < 0)
+#define TCP_SEQ_LEQ(a,b)    ((s32_t)((u32_t)(a) - (u32_t)(b)) <= 0)
+#define TCP_SEQ_GT(a,b)     ((s32_t)((u32_t)(a) - (u32_t)(b)) > 0)
+#define TCP_SEQ_GEQ(a,b)    ((s32_t)((u32_t)(a) - (u32_t)(b)) >= 0)
+/* is b<=a<=c? */
+#if 0 /* see bug #10548 */
+#define TCP_SEQ_BETWEEN(a,b,c) ((c)-(b) >= (a)-(b))
+#endif
+#define TCP_SEQ_BETWEEN(a,b,c) (TCP_SEQ_GEQ(a,b) && TCP_SEQ_LEQ(a,c))
+
+#ifndef TCP_TMR_INTERVAL
+#define TCP_TMR_INTERVAL       250  /* The TCP timer interval in milliseconds. */
+#endif /* TCP_TMR_INTERVAL */
+
+#ifndef TCP_FAST_INTERVAL
+#define TCP_FAST_INTERVAL      TCP_TMR_INTERVAL /* the fine grained timeout in milliseconds */
+#endif /* TCP_FAST_INTERVAL */
+
+#ifndef TCP_SLOW_INTERVAL
+#define TCP_SLOW_INTERVAL      (2*TCP_TMR_INTERVAL)  /* the coarse grained timeout in milliseconds */
+#endif /* TCP_SLOW_INTERVAL */
+
+#define TCP_FIN_WAIT_TIMEOUT 20000 /* milliseconds */
+#define TCP_SYN_RCVD_TIMEOUT 20000 /* milliseconds */
+
+#define TCP_OOSEQ_TIMEOUT        6U /* x RTO */
+
+#ifndef TCP_MSL
+#define TCP_MSL 60000UL /* The maximum segment lifetime in milliseconds */
+#endif
+
+/* Keepalive values, compliant with RFC 1122. Don't change this unless you know what you're doing */
+#ifndef  TCP_KEEPIDLE_DEFAULT
+#define  TCP_KEEPIDLE_DEFAULT     7200000UL /* Default KEEPALIVE timer in milliseconds */
+#endif
+
+#ifndef  TCP_KEEPINTVL_DEFAULT
+#define  TCP_KEEPINTVL_DEFAULT    75000UL   /* Default Time between KEEPALIVE probes in milliseconds */
+#endif
+
+#ifndef  TCP_KEEPCNT_DEFAULT
+#define  TCP_KEEPCNT_DEFAULT      9U        /* Default Counter for KEEPALIVE probes */
+#endif
+
+#define  TCP_MAXIDLE              TCP_KEEPCNT_DEFAULT * TCP_KEEPINTVL_DEFAULT  /* Maximum KEEPALIVE probe time */
+
+#define TCP_TCPLEN(seg) ((seg)->len + (((TCPH_FLAGS((seg)->tcphdr) & (TCP_FIN | TCP_SYN)) != 0) ? 1U : 0U))
+
+/** Flags used on input processing, not on pcb->flags
+*/
+#define TF_RESET     (u8_t)0x08U   /* Connection was reset. */
+#define TF_CLOSED    (u8_t)0x10U   /* Connection was successfully closed. */
+#define TF_GOT_FIN   (u8_t)0x20U   /* Connection was closed by the remote end. */
+
+
+#if LWIP_EVENT_API
+
+#define TCP_EVENT_ACCEPT(lpcb,pcb,arg,err,ret) ret = lwip_tcp_event(arg, (pcb),\
+                LWIP_EVENT_ACCEPT, NULL, 0, err)
+#define TCP_EVENT_SENT(pcb,space,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\
+                   LWIP_EVENT_SENT, NULL, space, ERR_OK)
+#define TCP_EVENT_RECV(pcb,p,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\
+                LWIP_EVENT_RECV, (p), 0, (err))
+#define TCP_EVENT_CLOSED(pcb,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\
+                LWIP_EVENT_RECV, NULL, 0, ERR_OK)
+#define TCP_EVENT_CONNECTED(pcb,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\
+                LWIP_EVENT_CONNECTED, NULL, 0, (err))
+#define TCP_EVENT_POLL(pcb,ret)       do { if ((pcb)->state != SYN_RCVD) {                          \
+                ret = lwip_tcp_event((pcb)->callback_arg, (pcb), LWIP_EVENT_POLL, NULL, 0, ERR_OK); \
+                } else {                                                                            \
+                ret = ERR_ARG; } } while(0)
+/* For event API, last state SYN_RCVD must be excluded here: the application
+   has not seen this pcb, yet! */
+#define TCP_EVENT_ERR(last_state,errf,arg,err)  do { if (last_state != SYN_RCVD) {                \
+                lwip_tcp_event((arg), NULL, LWIP_EVENT_ERR, NULL, 0, (err)); } } while(0)
+
+#else /* LWIP_EVENT_API */
+
+#define TCP_EVENT_ACCEPT(lpcb,pcb,arg,err,ret)                 \
+  do {                                                         \
+    if((lpcb)->accept != NULL)                                 \
+      (ret) = (lpcb)->accept((arg),(pcb),(err));               \
+    else (ret) = ERR_ARG;                                      \
+  } while (0)
+
+#define TCP_EVENT_SENT(pcb,space,ret)                          \
+  do {                                                         \
+    if((pcb)->sent != NULL)                                    \
+      (ret) = (pcb)->sent((pcb)->callback_arg,(pcb),(space));  \
+    else (ret) = ERR_OK;                                       \
+  } while (0)
+
+#define TCP_EVENT_RECV(pcb,p,err,ret)                          \
+  do {                                                         \
+    if((pcb)->recv != NULL) {                                  \
+      (ret) = (pcb)->recv((pcb)->callback_arg,(pcb),(p),(err));\
+    } else {                                                   \
+      (ret) = tcp_recv_null(NULL, (pcb), (p), (err));          \
+    }                                                          \
+  } while (0)
+
+#define TCP_EVENT_CLOSED(pcb,ret)                                \
+  do {                                                           \
+    if(((pcb)->recv != NULL)) {                                  \
+      (ret) = (pcb)->recv((pcb)->callback_arg,(pcb),NULL,ERR_OK);\
+    } else {                                                     \
+      (ret) = ERR_OK;                                            \
+    }                                                            \
+  } while (0)
+
+#define TCP_EVENT_CONNECTED(pcb,err,ret)                         \
+  do {                                                           \
+    if((pcb)->connected != NULL)                                 \
+      (ret) = (pcb)->connected((pcb)->callback_arg,(pcb),(err)); \
+    else (ret) = ERR_OK;                                         \
+  } while (0)
+
+#define TCP_EVENT_POLL(pcb,ret)                                \
+  do {                                                         \
+    if((pcb)->poll != NULL)                                    \
+      (ret) = (pcb)->poll((pcb)->callback_arg,(pcb));          \
+    else (ret) = ERR_OK;                                       \
+  } while (0)
+
+#define TCP_EVENT_ERR(last_state,errf,arg,err)                 \
+  do {                                                         \
+    LWIP_UNUSED_ARG(last_state);                               \
+    if((errf) != NULL)                                         \
+      (errf)((arg),(err));                                     \
+  } while (0)
+
+#endif /* LWIP_EVENT_API */
+
+/** Enabled extra-check for TCP_OVERSIZE if LWIP_DEBUG is enabled */
+#if TCP_OVERSIZE && defined(LWIP_DEBUG)
+#define TCP_OVERSIZE_DBGCHECK 1
+#else
+#define TCP_OVERSIZE_DBGCHECK 0
+#endif
+
+/** Don't generate checksum on copy if CHECKSUM_GEN_TCP is disabled */
+#define TCP_CHECKSUM_ON_COPY  (LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_TCP)
+
+/* This structure represents a TCP segment on the unsent, unacked and ooseq queues */
+struct tcp_seg {
+  struct tcp_seg *next;    /* used when putting segments on a queue */
+  struct pbuf *p;          /* buffer containing data + TCP header */
+  u16_t len;               /* the TCP length of this segment */
+#if TCP_OVERSIZE_DBGCHECK
+  u16_t oversize_left;     /* Extra bytes available at the end of the last
+                              pbuf in unsent (used for asserting vs.
+                              tcp_pcb.unsent_oversize only) */
+#endif /* TCP_OVERSIZE_DBGCHECK */
+#if TCP_CHECKSUM_ON_COPY
+  u16_t chksum;
+  u8_t  chksum_swapped;
+#endif /* TCP_CHECKSUM_ON_COPY */
+  u8_t  flags;
+#define TF_SEG_OPTS_MSS         (u8_t)0x01U /* Include MSS option (only used in SYN segments) */
+#define TF_SEG_OPTS_TS          (u8_t)0x02U /* Include timestamp option. */
+#define TF_SEG_DATA_CHECKSUMMED (u8_t)0x04U /* ALL data (not the header) is
+                                               checksummed into 'chksum' */
+#define TF_SEG_OPTS_WND_SCALE   (u8_t)0x08U /* Include WND SCALE option (only used in SYN segments) */
+#define TF_SEG_OPTS_SACK_PERM   (u8_t)0x10U /* Include SACK Permitted option (only used in SYN segments) */
+  struct tcp_hdr *tcphdr;  /* the TCP header */
+};
+
+#define LWIP_TCP_OPT_EOL        0
+#define LWIP_TCP_OPT_NOP        1
+#define LWIP_TCP_OPT_MSS        2
+#define LWIP_TCP_OPT_WS         3
+#define LWIP_TCP_OPT_SACK_PERM  4
+#define LWIP_TCP_OPT_TS         8
+
+#define LWIP_TCP_OPT_LEN_MSS    4
+#if LWIP_TCP_TIMESTAMPS
+#define LWIP_TCP_OPT_LEN_TS     10
+#define LWIP_TCP_OPT_LEN_TS_OUT 12 /* aligned for output (includes NOP padding) */
+#else
+#define LWIP_TCP_OPT_LEN_TS_OUT 0
+#endif
+#if LWIP_WND_SCALE
+#define LWIP_TCP_OPT_LEN_WS     3
+#define LWIP_TCP_OPT_LEN_WS_OUT 4 /* aligned for output (includes NOP padding) */
+#else
+#define LWIP_TCP_OPT_LEN_WS_OUT 0
+#endif
+
+#if LWIP_TCP_SACK_OUT
+#define LWIP_TCP_OPT_LEN_SACK_PERM     2
+#define LWIP_TCP_OPT_LEN_SACK_PERM_OUT 4 /* aligned for output (includes NOP padding) */
+#else
+#define LWIP_TCP_OPT_LEN_SACK_PERM_OUT 0
+#endif
+
+#define LWIP_TCP_OPT_LENGTH(flags) \
+  ((flags) & TF_SEG_OPTS_MSS       ? LWIP_TCP_OPT_LEN_MSS           : 0) + \
+  ((flags) & TF_SEG_OPTS_TS        ? LWIP_TCP_OPT_LEN_TS_OUT        : 0) + \
+  ((flags) & TF_SEG_OPTS_WND_SCALE ? LWIP_TCP_OPT_LEN_WS_OUT        : 0) + \
+  ((flags) & TF_SEG_OPTS_SACK_PERM ? LWIP_TCP_OPT_LEN_SACK_PERM_OUT : 0)
+
+/** This returns a TCP header option for MSS in an u32_t */
+#define TCP_BUILD_MSS_OPTION(mss) lwip_htonl(0x02040000 | ((mss) & 0xFFFF))
+
+#if LWIP_WND_SCALE
+#define TCPWNDSIZE_F       U32_F
+#define TCPWND_MAX         0xFFFFFFFFU
+#define TCPWND_CHECK16(x)  LWIP_ASSERT("window size > 0xFFFF", (x) <= 0xFFFF)
+#define TCPWND_MIN16(x)    ((u16_t)LWIP_MIN((x), 0xFFFF))
+#else /* LWIP_WND_SCALE */
+#define TCPWNDSIZE_F       U16_F
+#define TCPWND_MAX         0xFFFFU
+#define TCPWND_CHECK16(x)
+#define TCPWND_MIN16(x)    x
+#endif /* LWIP_WND_SCALE */
+
+/* Global variables: */
+extern struct tcp_pcb *tcp_input_pcb;
+extern u32_t tcp_ticks;
+extern u8_t tcp_active_pcbs_changed;
+
+/* The TCP PCB lists. */
+union tcp_listen_pcbs_t { /* List of all TCP PCBs in LISTEN state. */
+  struct tcp_pcb_listen *listen_pcbs;
+  struct tcp_pcb *pcbs;
+};
+extern struct tcp_pcb *tcp_bound_pcbs;
+extern union tcp_listen_pcbs_t tcp_listen_pcbs;
+extern struct tcp_pcb *tcp_active_pcbs;  /* List of all TCP PCBs that are in a
+              state in which they accept or send
+              data. */
+extern struct tcp_pcb *tcp_tw_pcbs;      /* List of all TCP PCBs in TIME-WAIT. */
+
+#define NUM_TCP_PCB_LISTS_NO_TIME_WAIT  3
+#define NUM_TCP_PCB_LISTS               4
+extern struct tcp_pcb ** const tcp_pcb_lists[NUM_TCP_PCB_LISTS];
+
+/* Axioms about the above lists:
+   1) Every TCP PCB that is not CLOSED is in one of the lists.
+   2) A PCB is only in one of the lists.
+   3) All PCBs in the tcp_listen_pcbs list is in LISTEN state.
+   4) All PCBs in the tcp_tw_pcbs list is in TIME-WAIT state.
+*/
+/* Define two macros, TCP_REG and TCP_RMV that registers a TCP PCB
+   with a PCB list or removes a PCB from a list, respectively. */
+#ifndef TCP_DEBUG_PCB_LISTS
+#define TCP_DEBUG_PCB_LISTS 0
+#endif
+#if TCP_DEBUG_PCB_LISTS
+#define TCP_REG(pcbs, npcb) do {\
+                            struct tcp_pcb *tcp_tmp_pcb; \
+                            LWIP_DEBUGF(TCP_DEBUG, ("TCP_REG %p local port %"U16_F"\n", (void *)(npcb), (npcb)->local_port)); \
+                            for (tcp_tmp_pcb = *(pcbs); \
+          tcp_tmp_pcb != NULL; \
+        tcp_tmp_pcb = tcp_tmp_pcb->next) { \
+                                LWIP_ASSERT("TCP_REG: already registered\n", tcp_tmp_pcb != (npcb)); \
+                            } \
+                            LWIP_ASSERT("TCP_REG: pcb->state != CLOSED", ((pcbs) == &tcp_bound_pcbs) || ((npcb)->state != CLOSED)); \
+                            (npcb)->next = *(pcbs); \
+                            LWIP_ASSERT("TCP_REG: npcb->next != npcb", (npcb)->next != (npcb)); \
+                            *(pcbs) = (npcb); \
+                            LWIP_ASSERT("TCP_REG: tcp_pcbs sane", tcp_pcbs_sane()); \
+              tcp_timer_needed(); \
+                            } while(0)
+#define TCP_RMV(pcbs, npcb) do { \
+                            struct tcp_pcb *tcp_tmp_pcb; \
+                            LWIP_ASSERT("TCP_RMV: pcbs != NULL", *(pcbs) != NULL); \
+                            LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removing %p from %p\n", (void *)(npcb), (void *)(*(pcbs)))); \
+                            if(*(pcbs) == (npcb)) { \
+                               *(pcbs) = (*pcbs)->next; \
+                            } else for (tcp_tmp_pcb = *(pcbs); tcp_tmp_pcb != NULL; tcp_tmp_pcb = tcp_tmp_pcb->next) { \
+                               if(tcp_tmp_pcb->next == (npcb)) { \
+                                  tcp_tmp_pcb->next = (npcb)->next; \
+                                  break; \
+                               } \
+                            } \
+                            (npcb)->next = NULL; \
+                            LWIP_ASSERT("TCP_RMV: tcp_pcbs sane", tcp_pcbs_sane()); \
+                            LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removed %p from %p\n", (void *)(npcb), (void *)(*(pcbs)))); \
+                            } while(0)
+
+#else /* LWIP_DEBUG */
+
+#define TCP_REG(pcbs, npcb)                        \
+  do {                                             \
+    (npcb)->next = *pcbs;                          \
+    *(pcbs) = (npcb);                              \
+    tcp_timer_needed();                            \
+  } while (0)
+
+#define TCP_RMV(pcbs, npcb)                        \
+  do {                                             \
+    if(*(pcbs) == (npcb)) {                        \
+      (*(pcbs)) = (*pcbs)->next;                   \
+    }                                              \
+    else {                                         \
+      struct tcp_pcb *tcp_tmp_pcb;                 \
+      for (tcp_tmp_pcb = *pcbs;                    \
+          tcp_tmp_pcb != NULL;                     \
+          tcp_tmp_pcb = tcp_tmp_pcb->next) {       \
+        if(tcp_tmp_pcb->next == (npcb)) {          \
+          tcp_tmp_pcb->next = (npcb)->next;        \
+          break;                                   \
+        }                                          \
+      }                                            \
+    }                                              \
+    (npcb)->next = NULL;                           \
+  } while(0)
+
+#endif /* LWIP_DEBUG */
+
+#define TCP_REG_ACTIVE(npcb)                       \
+  do {                                             \
+    TCP_REG(&tcp_active_pcbs, npcb);               \
+    tcp_active_pcbs_changed = 1;                   \
+  } while (0)
+
+#define TCP_RMV_ACTIVE(npcb)                       \
+  do {                                             \
+    TCP_RMV(&tcp_active_pcbs, npcb);               \
+    tcp_active_pcbs_changed = 1;                   \
+  } while (0)
+
+#define TCP_PCB_REMOVE_ACTIVE(pcb)                 \
+  do {                                             \
+    tcp_pcb_remove(&tcp_active_pcbs, pcb);         \
+    tcp_active_pcbs_changed = 1;                   \
+  } while (0)
+
+
+/* Internal functions: */
+struct tcp_pcb *tcp_pcb_copy(struct tcp_pcb *pcb);
+void tcp_pcb_purge(struct tcp_pcb *pcb);
+void tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb);
+
+void tcp_segs_free(struct tcp_seg *seg);
+void tcp_seg_free(struct tcp_seg *seg);
+struct tcp_seg *tcp_seg_copy(struct tcp_seg *seg);
+
+#define tcp_ack(pcb)                               \
+  do {                                             \
+    if((pcb)->flags & TF_ACK_DELAY) {              \
+      tcp_clear_flags(pcb, TF_ACK_DELAY);          \
+      tcp_ack_now(pcb);                            \
+    }                                              \
+    else {                                         \
+      tcp_set_flags(pcb, TF_ACK_DELAY);            \
+    }                                              \
+  } while (0)
+
+#define tcp_ack_now(pcb)                           \
+  tcp_set_flags(pcb, TF_ACK_NOW)
+
+err_t tcp_send_fin(struct tcp_pcb *pcb);
+err_t tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags);
+
+void tcp_rexmit_seg(struct tcp_pcb *pcb, struct tcp_seg *seg);
+
+void tcp_rst(const struct tcp_pcb* pcb, u32_t seqno, u32_t ackno,
+       const ip_addr_t *local_ip, const ip_addr_t *remote_ip,
+       u16_t local_port, u16_t remote_port);
+
+u32_t tcp_next_iss(struct tcp_pcb *pcb);
+
+err_t tcp_keepalive(struct tcp_pcb *pcb);
+err_t tcp_split_unsent_seg(struct tcp_pcb *pcb, u16_t split);
+err_t tcp_zero_window_probe(struct tcp_pcb *pcb);
+void  tcp_trigger_input_pcb_close(void);
+
+#if TCP_CALCULATE_EFF_SEND_MSS
+u16_t tcp_eff_send_mss_netif(u16_t sendmss, struct netif *outif,
+                             const ip_addr_t *dest);
+#define tcp_eff_send_mss(sendmss, src, dest) \
+    tcp_eff_send_mss_netif(sendmss, ip_route(src, dest), dest)
+#endif /* TCP_CALCULATE_EFF_SEND_MSS */
+
+#if LWIP_CALLBACK_API
+err_t tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err);
+#endif /* LWIP_CALLBACK_API */
+
+#if TCP_DEBUG || TCP_INPUT_DEBUG || TCP_OUTPUT_DEBUG
+void tcp_debug_print(struct tcp_hdr *tcphdr);
+void tcp_debug_print_flags(u8_t flags);
+void tcp_debug_print_state(enum tcp_state s);
+void tcp_debug_print_pcbs(void);
+s16_t tcp_pcbs_sane(void);
+#else
+#  define tcp_debug_print(tcphdr)
+#  define tcp_debug_print_flags(flags)
+#  define tcp_debug_print_state(s)
+#  define tcp_debug_print_pcbs()
+#  define tcp_pcbs_sane() 1
+#endif /* TCP_DEBUG */
+
+/** External function (implemented in timers.c), called when TCP detects
+ * that a timer is needed (i.e. active- or time-wait-pcb found). */
+void tcp_timer_needed(void);
+
+void tcp_netif_ip_addr_changed(const ip_addr_t* old_addr, const ip_addr_t* new_addr);
+
+#if TCP_QUEUE_OOSEQ
+void tcp_free_ooseq(struct tcp_pcb *pcb);
+#endif
+
+#if LWIP_TCP_PCB_NUM_EXT_ARGS
+err_t tcp_ext_arg_invoke_callbacks_passive_open(struct tcp_pcb_listen *lpcb, struct tcp_pcb *cpcb);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_TCP */
+
+#endif /* LWIP_HDR_TCP_PRIV_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/tcpip_priv.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/tcpip_priv.h
new file mode 100644
index 00000000000..74be634be05
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/priv/tcpip_priv.h
@@ -0,0 +1,170 @@
+/**
+ * @file
+ * TCPIP API internal implementations (do not use in application code)
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_TCPIP_PRIV_H
+#define LWIP_HDR_TCPIP_PRIV_H
+
+#include "lwip/opt.h"
+
+#if !NO_SYS /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/tcpip.h"
+#include "lwip/sys.h"
+#include "lwip/timeouts.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct pbuf;
+struct netif;
+
+#if LWIP_MPU_COMPATIBLE
+#define API_VAR_REF(name)               (*(name))
+#define API_VAR_DECLARE(type, name)     type * name
+#define API_VAR_ALLOC_EXT(type, pool, name, errorblock) do { \
+                                          name = (type *)memp_malloc(pool); \
+                                          if (name == NULL) { \
+                                            errorblock; \
+                                          } \
+                                        } while(0)
+#define API_VAR_ALLOC(type, pool, name, errorval) API_VAR_ALLOC_EXT(type, pool, name, return errorval)
+#define API_VAR_ALLOC_POOL(type, pool, name, errorval) do { \
+                                          name = (type *)LWIP_MEMPOOL_ALLOC(pool); \
+                                          if (name == NULL) { \
+                                            return errorval; \
+                                          } \
+                                        } while(0)
+#define API_VAR_FREE(pool, name)        memp_free(pool, name)
+#define API_VAR_FREE_POOL(pool, name)   LWIP_MEMPOOL_FREE(pool, name)
+#define API_EXPR_REF(expr)              (&(expr))
+#if LWIP_NETCONN_SEM_PER_THREAD
+#define API_EXPR_REF_SEM(expr)          (expr)
+#else
+#define API_EXPR_REF_SEM(expr)          API_EXPR_REF(expr)
+#endif
+#define API_EXPR_DEREF(expr)            expr
+#define API_MSG_M_DEF(m)                m
+#define API_MSG_M_DEF_C(t, m)           t m
+#else /* LWIP_MPU_COMPATIBLE */
+#define API_VAR_REF(name)               name
+#define API_VAR_DECLARE(type, name)     type name
+#define API_VAR_ALLOC_EXT(type, pool, name, errorblock)
+#define API_VAR_ALLOC(type, pool, name, errorval)
+#define API_VAR_ALLOC_POOL(type, pool, name, errorval)
+#define API_VAR_FREE(pool, name)
+#define API_VAR_FREE_POOL(pool, name)
+#define API_EXPR_REF(expr)              expr
+#define API_EXPR_REF_SEM(expr)          API_EXPR_REF(expr)
+#define API_EXPR_DEREF(expr)            (*(expr))
+#define API_MSG_M_DEF(m)                *m
+#define API_MSG_M_DEF_C(t, m)           const t * m
+#endif /* LWIP_MPU_COMPATIBLE */
+
+err_t tcpip_send_msg_wait_sem(tcpip_callback_fn fn, void *apimsg, sys_sem_t* sem);
+
+struct tcpip_api_call_data
+{
+#if !LWIP_TCPIP_CORE_LOCKING
+  err_t err;
+#if !LWIP_NETCONN_SEM_PER_THREAD
+  sys_sem_t sem;
+#endif /* LWIP_NETCONN_SEM_PER_THREAD */
+#else /* !LWIP_TCPIP_CORE_LOCKING */
+  u8_t dummy; /* avoid empty struct :-( */
+#endif /* !LWIP_TCPIP_CORE_LOCKING */
+};
+typedef err_t (*tcpip_api_call_fn)(struct tcpip_api_call_data* call);
+err_t tcpip_api_call(tcpip_api_call_fn fn, struct tcpip_api_call_data *call);
+
+enum tcpip_msg_type {
+#if !LWIP_TCPIP_CORE_LOCKING
+  TCPIP_MSG_API,
+  TCPIP_MSG_API_CALL,
+#endif /* !LWIP_TCPIP_CORE_LOCKING */
+#if !LWIP_TCPIP_CORE_LOCKING_INPUT
+  TCPIP_MSG_INPKT,
+#endif /* !LWIP_TCPIP_CORE_LOCKING_INPUT */
+#if LWIP_TCPIP_TIMEOUT && LWIP_TIMERS
+  TCPIP_MSG_TIMEOUT,
+  TCPIP_MSG_UNTIMEOUT,
+#endif /* LWIP_TCPIP_TIMEOUT && LWIP_TIMERS */
+  TCPIP_MSG_CALLBACK,
+  TCPIP_MSG_CALLBACK_STATIC
+};
+
+struct tcpip_msg {
+  enum tcpip_msg_type type;
+  union {
+#if !LWIP_TCPIP_CORE_LOCKING
+    struct {
+      tcpip_callback_fn function;
+      void* msg;
+    } api_msg;
+    struct {
+      tcpip_api_call_fn function;
+      struct tcpip_api_call_data *arg;
+      sys_sem_t *sem;
+    } api_call;
+#endif /* LWIP_TCPIP_CORE_LOCKING */
+#if !LWIP_TCPIP_CORE_LOCKING_INPUT
+    struct {
+      struct pbuf *p;
+      struct netif *netif;
+      netif_input_fn input_fn;
+    } inp;
+#endif /* !LWIP_TCPIP_CORE_LOCKING_INPUT */
+    struct {
+      tcpip_callback_fn function;
+      void *ctx;
+    } cb;
+#if LWIP_TCPIP_TIMEOUT && LWIP_TIMERS
+    struct {
+      u32_t msecs;
+      sys_timeout_handler h;
+      void *arg;
+    } tmo;
+#endif /* LWIP_TCPIP_TIMEOUT && LWIP_TIMERS */
+  } msg;
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !NO_SYS */
+
+#endif /* LWIP_HDR_TCPIP_PRIV_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/autoip.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/autoip.h
new file mode 100644
index 00000000000..96f93f57809
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/autoip.h
@@ -0,0 +1,83 @@
+/**
+ * @file
+ * AutoIP protocol definitions
+ */
+
+/*
+ *
+ * Copyright (c) 2007 Dominik Spies <kontakt@dspies.de>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * Author: Dominik Spies <kontakt@dspies.de>
+ *
+ * This is a AutoIP implementation for the lwIP TCP/IP stack. It aims to conform
+ * with RFC 3927.
+ *
+ */
+
+#ifndef LWIP_HDR_PROT_AUTOIP_H
+#define LWIP_HDR_PROT_AUTOIP_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* 169.254.0.0 */
+#define AUTOIP_NET              0xA9FE0000
+/* 169.254.1.0 */
+#define AUTOIP_RANGE_START      (AUTOIP_NET | 0x0100)
+/* 169.254.254.255 */
+#define AUTOIP_RANGE_END        (AUTOIP_NET | 0xFEFF)
+
+/* RFC 3927 Constants */
+#define PROBE_WAIT              1   /* second   (initial random delay)                 */
+#define PROBE_MIN               1   /* second   (minimum delay till repeated probe)    */
+#define PROBE_MAX               2   /* seconds  (maximum delay till repeated probe)    */
+#define PROBE_NUM               3   /*          (number of probe packets)              */
+#define ANNOUNCE_NUM            2   /*          (number of announcement packets)       */
+#define ANNOUNCE_INTERVAL       2   /* seconds  (time between announcement packets)    */
+#define ANNOUNCE_WAIT           2   /* seconds  (delay before announcing)              */
+#if ESP_LWIP
+#define MAX_CONFLICTS           LWIP_AUTOIP_MAX_CONFLICTS        /*          (max conflicts before rate limiting) */
+#define RATE_LIMIT_INTERVAL     LWIP_AUTOIP_RATE_LIMIT_INTERVAL  /* seconds  (delay between successive attempts) */
+#else
+#define MAX_CONFLICTS           10  /*          (max conflicts before rate limiting)   */
+#define RATE_LIMIT_INTERVAL     60  /* seconds  (delay between successive attempts)    */
+#endif
+#define DEFEND_INTERVAL         10  /* seconds  (min. wait between defensive ARPs)     */
+
+/* AutoIP client states */
+typedef enum {
+  AUTOIP_STATE_OFF        = 0,
+  AUTOIP_STATE_PROBING    = 1,
+  AUTOIP_STATE_ANNOUNCING = 2,
+  AUTOIP_STATE_BOUND      = 3
+} autoip_state_enum_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_AUTOIP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/dhcp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/dhcp.h
new file mode 100644
index 00000000000..4fc5fb48e82
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/dhcp.h
@@ -0,0 +1,187 @@
+/**
+ * @file
+ * DHCP protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Leon Woestenberg <leon.woestenberg@gmx.net>
+ * Copyright (c) 2001-2004 Axon Digital Design B.V., The Netherlands.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Leon Woestenberg <leon.woestenberg@gmx.net>
+ *
+ */
+#ifndef LWIP_HDR_PROT_DHCP_H
+#define LWIP_HDR_PROT_DHCP_H
+
+#include "lwip/opt.h"
+#include "lwip/arch.h"
+#include "lwip/prot/ip4.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /* DHCP message item offsets and length */
+#define DHCP_CHADDR_LEN   16U
+#define DHCP_SNAME_OFS    44U
+#define DHCP_SNAME_LEN    64U
+#define DHCP_FILE_OFS     108U
+#define DHCP_FILE_LEN     128U
+#define DHCP_MSG_LEN      236U
+#define DHCP_OPTIONS_OFS  (DHCP_MSG_LEN + 4U) /* 4 byte: cookie */
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+/** minimum set of fields of any DHCP message */
+struct dhcp_msg
+{
+  PACK_STRUCT_FLD_8(u8_t op);
+  PACK_STRUCT_FLD_8(u8_t htype);
+  PACK_STRUCT_FLD_8(u8_t hlen);
+  PACK_STRUCT_FLD_8(u8_t hops);
+  PACK_STRUCT_FIELD(u32_t xid);
+  PACK_STRUCT_FIELD(u16_t secs);
+  PACK_STRUCT_FIELD(u16_t flags);
+  PACK_STRUCT_FLD_S(ip4_addr_p_t ciaddr);
+  PACK_STRUCT_FLD_S(ip4_addr_p_t yiaddr);
+  PACK_STRUCT_FLD_S(ip4_addr_p_t siaddr);
+  PACK_STRUCT_FLD_S(ip4_addr_p_t giaddr);
+  PACK_STRUCT_FLD_8(u8_t chaddr[DHCP_CHADDR_LEN]);
+  PACK_STRUCT_FLD_8(u8_t sname[DHCP_SNAME_LEN]);
+  PACK_STRUCT_FLD_8(u8_t file[DHCP_FILE_LEN]);
+  PACK_STRUCT_FIELD(u32_t cookie);
+#define DHCP_MIN_OPTIONS_LEN 68U
+/** make sure user does not configure this too small */
+#if ((defined(DHCP_OPTIONS_LEN)) && (DHCP_OPTIONS_LEN < DHCP_MIN_OPTIONS_LEN))
+#  undef DHCP_OPTIONS_LEN
+#endif
+/** allow this to be configured in lwipopts.h, but not too small */
+#if (!defined(DHCP_OPTIONS_LEN))
+/** set this to be sufficient for your options in outgoing DHCP msgs */
+#  define DHCP_OPTIONS_LEN DHCP_MIN_OPTIONS_LEN
+#endif
+  PACK_STRUCT_FLD_8(u8_t options[DHCP_OPTIONS_LEN]);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+
+/* DHCP client states */
+typedef enum {
+  DHCP_STATE_OFF             = 0,
+  DHCP_STATE_REQUESTING      = 1,
+  DHCP_STATE_INIT            = 2,
+  DHCP_STATE_REBOOTING       = 3,
+  DHCP_STATE_REBINDING       = 4,
+  DHCP_STATE_RENEWING        = 5,
+  DHCP_STATE_SELECTING       = 6,
+  DHCP_STATE_INFORMING       = 7,
+  DHCP_STATE_CHECKING        = 8,
+  DHCP_STATE_PERMANENT       = 9,  /* not yet implemented */
+  DHCP_STATE_BOUND           = 10,
+  DHCP_STATE_RELEASING       = 11, /* not yet implemented */
+  DHCP_STATE_BACKING_OFF     = 12
+} dhcp_state_enum_t;
+
+/* DHCP op codes */
+#define DHCP_BOOTREQUEST            1
+#define DHCP_BOOTREPLY              2
+
+/* DHCP message types */
+#define DHCP_DISCOVER               1
+#define DHCP_OFFER                  2
+#define DHCP_REQUEST                3
+#define DHCP_DECLINE                4
+#define DHCP_ACK                    5
+#define DHCP_NAK                    6
+#define DHCP_RELEASE                7
+#define DHCP_INFORM                 8
+
+#define DHCP_MAGIC_COOKIE           0x63825363UL
+
+/* This is a list of options for BOOTP and DHCP, see RFC 2132 for descriptions */
+
+/* BootP options */
+#define DHCP_OPTION_PAD             0
+#define DHCP_OPTION_SUBNET_MASK     1 /* RFC 2132 3.3 */
+#define DHCP_OPTION_ROUTER          3
+#define DHCP_OPTION_DNS_SERVER      6
+#define DHCP_OPTION_HOSTNAME        12
+#define DHCP_OPTION_IP_TTL          23
+#define DHCP_OPTION_MTU             26
+#define DHCP_OPTION_BROADCAST       28
+#define DHCP_OPTION_TCP_TTL         37
+#define DHCP_OPTION_NTP             42
+#define DHCP_OPTION_END             255
+
+/* DHCP options */
+#define DHCP_OPTION_REQUESTED_IP    50 /* RFC 2132 9.1, requested IP address */
+#define DHCP_OPTION_LEASE_TIME      51 /* RFC 2132 9.2, time in seconds, in 4 bytes */
+#define DHCP_OPTION_OVERLOAD        52 /* RFC2132 9.3, use file and/or sname field for options */
+
+#define DHCP_OPTION_MESSAGE_TYPE    53 /* RFC 2132 9.6, important for DHCP */
+#define DHCP_OPTION_MESSAGE_TYPE_LEN 1
+
+#define DHCP_OPTION_SERVER_ID       54 /* RFC 2132 9.7, server IP address */
+#define DHCP_OPTION_PARAMETER_REQUEST_LIST  55 /* RFC 2132 9.8, requested option types */
+
+#define DHCP_OPTION_MAX_MSG_SIZE    57 /* RFC 2132 9.10, message size accepted >= 576 */
+#define DHCP_OPTION_MAX_MSG_SIZE_LEN 2
+
+#define DHCP_OPTION_T1              58 /* T1 renewal time */
+#define DHCP_OPTION_T2              59 /* T2 rebinding time */
+#define DHCP_OPTION_VCI             60
+#define DHCP_OPTION_VSI             43
+#define DHCP_OPTION_CLIENT_ID       61
+#define DHCP_OPTION_TFTP_SERVERNAME 66
+#define DHCP_OPTION_BOOTFILE        67
+
+/* possible combinations of overloading the file and sname fields with options */
+#define DHCP_OVERLOAD_NONE          0
+#define DHCP_OVERLOAD_FILE          1
+#define DHCP_OVERLOAD_SNAME         2
+#define DHCP_OVERLOAD_SNAME_FILE    3
+
+/* DHCP OPTION 61 TYPE */
+#if ESP_DHCP
+#define DHCP_OPTION_CLIENT_ID_MAC   0x01
+#define DHCP_OPTION_CLIENT_ID_DUID  0x02
+#define DHCP_OPTION_CLIENT_ID_IAID  0xff
+
+#define DHCP_OPTION_CLIENT_ID_MAC_LEN   7
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_DHCP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/dhcp6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/dhcp6.h
new file mode 100644
index 00000000000..0754c91b9b8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/dhcp6.h
@@ -0,0 +1,138 @@
+/**
+ * @file
+ * DHCPv6 protocol definitions
+ */
+
+/*
+ * Copyright (c) 2017 Simon Goldschmidt <goldsimon@gmx.de>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+#ifndef LWIP_HDR_PROT_DHCP6_H
+#define LWIP_HDR_PROT_DHCP6_H
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define DHCP6_CLIENT_PORT  546
+#define DHCP6_SERVER_PORT  547
+
+
+ /* DHCPv6 message item offsets and length */
+#define DHCP6_TRANSACTION_ID_LEN   3
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+/** minimum set of fields of any DHCPv6 message */
+struct dhcp6_msg
+{
+  PACK_STRUCT_FLD_8(u8_t msgtype);
+  PACK_STRUCT_FLD_8(u8_t transaction_id[DHCP6_TRANSACTION_ID_LEN]);
+  /* options follow */
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+
+/* DHCP6 client states */
+typedef enum {
+  DHCP6_STATE_OFF               = 0,
+  DHCP6_STATE_STATELESS_IDLE    = 1,
+  DHCP6_STATE_REQUESTING_CONFIG = 2
+} dhcp6_state_enum_t;
+
+/* DHCPv6 message types */
+#define DHCP6_SOLICIT               1
+#define DHCP6_ADVERTISE             2
+#define DHCP6_REQUEST               3
+#define DHCP6_CONFIRM               4
+#define DHCP6_RENEW                 5
+#define DHCP6_REBIND                6
+#define DHCP6_REPLY                 7
+#define DHCP6_RELEASE               8
+#define DHCP6_DECLINE               9
+#define DHCP6_RECONFIGURE           10
+#define DHCP6_INFOREQUEST           11
+#define DHCP6_RELAYFORW             12
+#define DHCP6_RELAYREPL             13
+/* More message types see https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml */
+
+/** DHCPv6 status codes */
+#define DHCP6_STATUS_SUCCESS        0 /* Success. */
+#define DHCP6_STATUS_UNSPECFAIL     1 /* Failure, reason unspecified; this status code is sent by either a client or a server to indicate a failure not explicitly specified in this document. */
+#define DHCP6_STATUS_NOADDRSAVAIL   2 /* Server has no addresses available to assign to the IA(s). */
+#define DHCP6_STATUS_NOBINDING      3 /* Client record (binding) unavailable. */
+#define DHCP6_STATUS_NOTONLINK      4 /* The prefix for the address is not appropriate for the link to which the client is attached. */
+#define DHCP6_STATUS_USEMULTICAST   5 /* Sent by a server to a client to force the client to send messages to the server using the All_DHCP_Relay_Agents_and_Servers address. */
+/* More status codes see https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml */
+
+/** DHCPv6 DUID types */
+#define DHCP6_DUID_LLT              1 /* LLT: Link-layer Address Plus Time */
+#define DHCP6_DUID_EN               2 /* EN: Enterprise number */
+#define DHCP6_DUID_LL               3 /* LL: Link-layer Address */
+#define DHCP6_DUID_UUID             4 /* UUID (RFC 6355) */
+
+/* DHCPv6 options */
+#define DHCP6_OPTION_CLIENTID       1
+#define DHCP6_OPTION_SERVERID       2
+#define DHCP6_OPTION_IA_NA          3
+#define DHCP6_OPTION_IA_TA          4
+#define DHCP6_OPTION_IAADDR         5
+#define DHCP6_OPTION_ORO            6
+#define DHCP6_OPTION_PREFERENCE     7
+#define DHCP6_OPTION_ELAPSED_TIME   8
+#define DHCP6_OPTION_RELAY_MSG      9
+#define DHCP6_OPTION_AUTH           11
+#define DHCP6_OPTION_UNICAST        12
+#define DHCP6_OPTION_STATUS_CODE    13
+#define DHCP6_OPTION_RAPID_COMMIT   14
+#define DHCP6_OPTION_USER_CLASS     15
+#define DHCP6_OPTION_VENDOR_CLASS   16
+#define DHCP6_OPTION_VENDOR_OPTS    17
+#define DHCP6_OPTION_INTERFACE_ID   18
+#define DHCP6_OPTION_RECONF_MSG     19
+#define DHCP6_OPTION_RECONF_ACCEPT  20
+/* More options see https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml */
+#define DHCP6_OPTION_DNS_SERVERS    23 /* RFC 3646 */
+#define DHCP6_OPTION_DOMAIN_LIST    24 /* RFC 3646 */
+#define DHCP6_OPTION_SNTP_SERVERS   31 /* RFC 4075 */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_DHCP6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/dns.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/dns.h
new file mode 100644
index 00000000000..94782d6e9c1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/dns.h
@@ -0,0 +1,140 @@
+/**
+ * @file
+ * DNS - host name to IP address resolver.
+ */
+
+/*
+ * Port to lwIP from uIP
+ * by Jim Pettinato April 2007
+ *
+ * security fixes and more by Simon Goldschmidt
+ *
+ * uIP version Copyright (c) 2002-2003, Adam Dunkels.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote
+ *    products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LWIP_HDR_PROT_DNS_H
+#define LWIP_HDR_PROT_DNS_H
+
+#include "lwip/arch.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** DNS server port address */
+#ifndef DNS_SERVER_PORT
+#define DNS_SERVER_PORT           53
+#endif
+
+/* DNS field TYPE used for "Resource Records" */
+#define DNS_RRTYPE_A              1     /* a host address */
+#define DNS_RRTYPE_NS             2     /* an authoritative name server */
+#define DNS_RRTYPE_MD             3     /* a mail destination (Obsolete - use MX) */
+#define DNS_RRTYPE_MF             4     /* a mail forwarder (Obsolete - use MX) */
+#define DNS_RRTYPE_CNAME          5     /* the canonical name for an alias */
+#define DNS_RRTYPE_SOA            6     /* marks the start of a zone of authority */
+#define DNS_RRTYPE_MB             7     /* a mailbox domain name (EXPERIMENTAL) */
+#define DNS_RRTYPE_MG             8     /* a mail group member (EXPERIMENTAL) */
+#define DNS_RRTYPE_MR             9     /* a mail rename domain name (EXPERIMENTAL) */
+#define DNS_RRTYPE_NULL           10    /* a null RR (EXPERIMENTAL) */
+#define DNS_RRTYPE_WKS            11    /* a well known service description */
+#define DNS_RRTYPE_PTR            12    /* a domain name pointer */
+#define DNS_RRTYPE_HINFO          13    /* host information */
+#define DNS_RRTYPE_MINFO          14    /* mailbox or mail list information */
+#define DNS_RRTYPE_MX             15    /* mail exchange */
+#define DNS_RRTYPE_TXT            16    /* text strings */
+#define DNS_RRTYPE_AAAA           28    /* IPv6 address */
+#define DNS_RRTYPE_SRV            33    /* service location */
+#define DNS_RRTYPE_ANY            255   /* any type */
+
+/* DNS field CLASS used for "Resource Records" */
+#define DNS_RRCLASS_IN            1     /* the Internet */
+#define DNS_RRCLASS_CS            2     /* the CSNET class (Obsolete - used only for examples in some obsolete RFCs) */
+#define DNS_RRCLASS_CH            3     /* the CHAOS class */
+#define DNS_RRCLASS_HS            4     /* Hesiod [Dyer 87] */
+#define DNS_RRCLASS_ANY           255   /* any class */
+#define DNS_RRCLASS_FLUSH         0x800 /* Flush bit */
+
+/* DNS protocol flags */
+#define DNS_FLAG1_RESPONSE        0x80
+#define DNS_FLAG1_OPCODE_STATUS   0x10
+#define DNS_FLAG1_OPCODE_INVERSE  0x08
+#define DNS_FLAG1_OPCODE_STANDARD 0x00
+#define DNS_FLAG1_AUTHORATIVE     0x04
+#define DNS_FLAG1_TRUNC           0x02
+#define DNS_FLAG1_RD              0x01
+#define DNS_FLAG2_RA              0x80
+#define DNS_FLAG2_ERR_MASK        0x0f
+#define DNS_FLAG2_ERR_NONE        0x00
+#define DNS_FLAG2_ERR_NAME        0x03
+
+#define DNS_HDR_GET_OPCODE(hdr) ((((hdr)->flags1) >> 3) & 0xF)
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+/** DNS message header */
+struct dns_hdr {
+  PACK_STRUCT_FIELD(u16_t id);
+  PACK_STRUCT_FLD_8(u8_t flags1);
+  PACK_STRUCT_FLD_8(u8_t flags2);
+  PACK_STRUCT_FIELD(u16_t numquestions);
+  PACK_STRUCT_FIELD(u16_t numanswers);
+  PACK_STRUCT_FIELD(u16_t numauthrr);
+  PACK_STRUCT_FIELD(u16_t numextrarr);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+#define SIZEOF_DNS_HDR 12
+
+
+/* Multicast DNS definitions */
+
+/** UDP port for multicast DNS queries */
+#ifndef DNS_MQUERY_PORT
+#define DNS_MQUERY_PORT             5353
+#endif
+
+/* IPv4 group for multicast DNS queries: 224.0.0.251 */
+#ifndef DNS_MQUERY_IPV4_GROUP_INIT
+#define DNS_MQUERY_IPV4_GROUP_INIT  IPADDR4_INIT_BYTES(224,0,0,251)
+#endif
+
+/* IPv6 group for multicast DNS queries: FF02::FB */
+#ifndef DNS_MQUERY_IPV6_GROUP_INIT
+#define DNS_MQUERY_IPV6_GROUP_INIT  IPADDR6_INIT_HOST(0xFF020000,0,0,0xFB)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_DNS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/etharp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/etharp.h
new file mode 100644
index 00000000000..811c2284171
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/etharp.h
@@ -0,0 +1,114 @@
+/**
+ * @file
+ * ARP protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_ETHARP_H
+#define LWIP_HDR_PROT_ETHARP_H
+
+#include "lwip/arch.h"
+#include "lwip/prot/ethernet.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef ETHARP_HWADDR_LEN
+#define ETHARP_HWADDR_LEN     ETH_HWADDR_LEN
+#endif
+
+/**
+ * struct ip4_addr_wordaligned is used in the definition of the ARP packet format in
+ * order to support compilers that don't have structure packing.
+ */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct ip4_addr_wordaligned {
+  PACK_STRUCT_FIELD(u16_t addrw[2]);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** MEMCPY-like copying of IP addresses where addresses are known to be
+ * 16-bit-aligned if the port is correctly configured (so a port could define
+ * this to copying 2 u16_t's) - no NULL-pointer-checking needed. */
+#ifndef IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T
+#define IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(dest, src) SMEMCPY(dest, src, sizeof(ip4_addr_t))
+#endif
+
+ /** MEMCPY-like copying of IP addresses where addresses are known to be
+ * 16-bit-aligned if the port is correctly configured (so a port could define
+ * this to copying 2 u16_t's) - no NULL-pointer-checking needed. */
+#ifndef IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T
+#define IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(dest, src) SMEMCPY(dest, src, sizeof(ip4_addr_t))
+#endif
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+/** the ARP message, see RFC 826 ("Packet format") */
+struct etharp_hdr {
+  PACK_STRUCT_FIELD(u16_t hwtype);
+  PACK_STRUCT_FIELD(u16_t proto);
+  PACK_STRUCT_FLD_8(u8_t  hwlen);
+  PACK_STRUCT_FLD_8(u8_t  protolen);
+  PACK_STRUCT_FIELD(u16_t opcode);
+  PACK_STRUCT_FLD_S(struct eth_addr shwaddr);
+  PACK_STRUCT_FLD_S(struct ip4_addr_wordaligned sipaddr);
+  PACK_STRUCT_FLD_S(struct eth_addr dhwaddr);
+  PACK_STRUCT_FLD_S(struct ip4_addr_wordaligned dipaddr);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+#define SIZEOF_ETHARP_HDR 28
+
+/* ARP message types (opcodes) */
+enum etharp_opcode {
+  ARP_REQUEST = 1,
+  ARP_REPLY   = 2
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_ETHARP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ethernet.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ethernet.h
new file mode 100644
index 00000000000..309e57465d4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ethernet.h
@@ -0,0 +1,125 @@
+/**
+ * @file
+ * Ethernet protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_ETHERNET_H
+#define LWIP_HDR_PROT_ETHERNET_H
+
+#include "lwip/arch.h"
+#include "lwip/prot/ieee.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef ETH_HWADDR_LEN
+#ifdef ETHARP_HWADDR_LEN
+#define ETH_HWADDR_LEN    ETHARP_HWADDR_LEN /* compatibility mode */
+#else
+#define ETH_HWADDR_LEN    6
+#endif
+#endif
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+/** An Ethernet MAC address */
+struct eth_addr {
+  PACK_STRUCT_FLD_8(u8_t addr[ETH_HWADDR_LEN]);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** Initialize a struct eth_addr with its 6 bytes (takes care of correct braces) */
+#define ETH_ADDR(b0, b1, b2, b3, b4, b5) {{b0, b1, b2, b3, b4, b5}}
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+/** Ethernet header */
+struct eth_hdr {
+#if ETH_PAD_SIZE
+  PACK_STRUCT_FLD_8(u8_t padding[ETH_PAD_SIZE]);
+#endif
+  PACK_STRUCT_FLD_S(struct eth_addr dest);
+  PACK_STRUCT_FLD_S(struct eth_addr src);
+  PACK_STRUCT_FIELD(u16_t type);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+#define SIZEOF_ETH_HDR (14 + ETH_PAD_SIZE)
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+/** VLAN header inserted between ethernet header and payload
+ * if 'type' in ethernet header is ETHTYPE_VLAN.
+ * See IEEE802.Q */
+struct eth_vlan_hdr {
+  PACK_STRUCT_FIELD(u16_t prio_vid);
+  PACK_STRUCT_FIELD(u16_t tpid);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+#define SIZEOF_VLAN_HDR 4
+#define VLAN_ID(vlan_hdr) (lwip_htons((vlan_hdr)->prio_vid) & 0xFFF)
+
+/** The 24-bit IANA IPv4-multicast OUI is 01-00-5e: */
+#define LL_IP4_MULTICAST_ADDR_0 0x01
+#define LL_IP4_MULTICAST_ADDR_1 0x00
+#define LL_IP4_MULTICAST_ADDR_2 0x5e
+
+/** IPv6 multicast uses this prefix */
+#define LL_IP6_MULTICAST_ADDR_0 0x33
+#define LL_IP6_MULTICAST_ADDR_1 0x33
+
+#define eth_addr_cmp(addr1, addr2) (memcmp((addr1)->addr, (addr2)->addr, ETH_HWADDR_LEN) == 0)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_ETHERNET_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/iana.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/iana.h
new file mode 100644
index 00000000000..32890cccd3f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/iana.h
@@ -0,0 +1,97 @@
+/**
+ * @file
+ * IANA assigned numbers (RFC 1700 and successors)
+ *
+ * @defgroup iana IANA assigned numbers
+ * @ingroup infrastructure
+ */
+
+/*
+ * Copyright (c) 2017 Dirk Ziegelmeier.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Dirk Ziegelmeier <dziegel@gmx.de>
+ *
+ */
+
+#ifndef LWIP_HDR_PROT_IANA_H
+#define LWIP_HDR_PROT_IANA_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @ingroup iana
+ * Hardware types
+ */
+enum lwip_iana_hwtype {
+  /** Ethernet */
+  LWIP_IANA_HWTYPE_ETHERNET = 1
+};
+
+/**
+ * @ingroup iana
+ * Port numbers
+ * https://www.iana.org/assignments/service-names-port-numbers/service-names-port-numbers.txt
+ */
+enum lwip_iana_port_number {
+  /** SMTP */
+  LWIP_IANA_PORT_SMTP        = 25,
+  /** DHCP server */
+  LWIP_IANA_PORT_DHCP_SERVER = 67,
+  /** DHCP client */
+  LWIP_IANA_PORT_DHCP_CLIENT = 68,
+  /** TFTP */
+  LWIP_IANA_PORT_TFTP        = 69,
+  /** HTTP */
+  LWIP_IANA_PORT_HTTP        = 80,
+  /** SNTP */
+  LWIP_IANA_PORT_SNTP        = 123,
+  /** NETBIOS */
+  LWIP_IANA_PORT_NETBIOS     = 137,
+  /** SNMP */
+  LWIP_IANA_PORT_SNMP        = 161,
+  /** SNMP traps */
+  LWIP_IANA_PORT_SNMP_TRAP   = 162,
+  /** HTTPS */
+  LWIP_IANA_PORT_HTTPS       = 443,
+  /** SMTPS */
+  LWIP_IANA_PORT_SMTPS       = 465,
+  /** MQTT */
+  LWIP_IANA_PORT_MQTT        = 1883,
+  /** MDNS */
+  LWIP_IANA_PORT_MDNS        = 5353,
+  /** Secure MQTT */
+  LWIP_IANA_PORT_SECURE_MQTT = 8883
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_IANA_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/icmp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/icmp.h
new file mode 100644
index 00000000000..7d19385c729
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/icmp.h
@@ -0,0 +1,91 @@
+/**
+ * @file
+ * ICMP protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_ICMP_H
+#define LWIP_HDR_PROT_ICMP_H
+
+#include "lwip/arch.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ICMP_ER   0    /* echo reply */
+#define ICMP_DUR  3    /* destination unreachable */
+#define ICMP_SQ   4    /* source quench */
+#define ICMP_RD   5    /* redirect */
+#define ICMP_ECHO 8    /* echo */
+#define ICMP_TE  11    /* time exceeded */
+#define ICMP_PP  12    /* parameter problem */
+#define ICMP_TS  13    /* timestamp */
+#define ICMP_TSR 14    /* timestamp reply */
+#define ICMP_IRQ 15    /* information request */
+#define ICMP_IR  16    /* information reply */
+#define ICMP_AM  17    /* address mask request */
+#define ICMP_AMR 18    /* address mask reply */
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+/** This is the standard ICMP header only that the u32_t data
+ *  is split to two u16_t like ICMP echo needs it.
+ *  This header is also used for other ICMP types that do not
+ *  use the data part.
+ */
+PACK_STRUCT_BEGIN
+struct icmp_echo_hdr {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t code);
+  PACK_STRUCT_FIELD(u16_t chksum);
+  PACK_STRUCT_FIELD(u16_t id);
+  PACK_STRUCT_FIELD(u16_t seqno);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/* Compatibility defines, old versions used to combine type and code to an u16_t */
+#define ICMPH_TYPE(hdr) ((hdr)->type)
+#define ICMPH_CODE(hdr) ((hdr)->code)
+#define ICMPH_TYPE_SET(hdr, t) ((hdr)->type = (t))
+#define ICMPH_CODE_SET(hdr, c) ((hdr)->code = (c))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_ICMP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/icmp6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/icmp6.h
new file mode 100644
index 00000000000..3461120421e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/icmp6.h
@@ -0,0 +1,170 @@
+/**
+ * @file
+ * ICMP6 protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_ICMP6_H
+#define LWIP_HDR_PROT_ICMP6_H
+
+#include "lwip/arch.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** ICMP type */
+enum icmp6_type {
+  /** Destination unreachable */
+  ICMP6_TYPE_DUR = 1,
+  /** Packet too big */
+  ICMP6_TYPE_PTB = 2,
+  /** Time exceeded */
+  ICMP6_TYPE_TE = 3,
+  /** Parameter problem */
+  ICMP6_TYPE_PP = 4,
+  /** Private experimentation */
+  ICMP6_TYPE_PE1 = 100,
+  /** Private experimentation */
+  ICMP6_TYPE_PE2 = 101,
+  /** Reserved for expansion of error messages */
+  ICMP6_TYPE_RSV_ERR = 127,
+
+  /** Echo request */
+  ICMP6_TYPE_EREQ = 128,
+  /** Echo reply */
+  ICMP6_TYPE_EREP = 129,
+  /** Multicast listener query */
+  ICMP6_TYPE_MLQ = 130,
+  /** Multicast listener report */
+  ICMP6_TYPE_MLR = 131,
+  /** Multicast listener done */
+  ICMP6_TYPE_MLD = 132,
+  /** Router solicitation */
+  ICMP6_TYPE_RS = 133,
+  /** Router advertisement */
+  ICMP6_TYPE_RA = 134,
+  /** Neighbor solicitation */
+  ICMP6_TYPE_NS = 135,
+  /** Neighbor advertisement */
+  ICMP6_TYPE_NA = 136,
+  /** Redirect */
+  ICMP6_TYPE_RD = 137,
+  /** Multicast router advertisement */
+  ICMP6_TYPE_MRA = 151,
+  /** Multicast router solicitation */
+  ICMP6_TYPE_MRS = 152,
+  /** Multicast router termination */
+  ICMP6_TYPE_MRT = 153,
+  /** Private experimentation */
+  ICMP6_TYPE_PE3 = 200,
+  /** Private experimentation */
+  ICMP6_TYPE_PE4 = 201,
+  /** Reserved for expansion of informational messages */
+  ICMP6_TYPE_RSV_INF = 255
+};
+
+/** ICMP destination unreachable codes */
+enum icmp6_dur_code {
+  /** No route to destination */
+  ICMP6_DUR_NO_ROUTE = 0,
+  /** Communication with destination administratively prohibited */
+  ICMP6_DUR_PROHIBITED = 1,
+  /** Beyond scope of source address */
+  ICMP6_DUR_SCOPE = 2,
+  /** Address unreachable */
+  ICMP6_DUR_ADDRESS = 3,
+  /** Port unreachable */
+  ICMP6_DUR_PORT = 4,
+  /** Source address failed ingress/egress policy */
+  ICMP6_DUR_POLICY = 5,
+  /** Reject route to destination */
+  ICMP6_DUR_REJECT_ROUTE = 6
+};
+
+/** ICMP time exceeded codes */
+enum icmp6_te_code {
+  /** Hop limit exceeded in transit */
+  ICMP6_TE_HL = 0,
+  /** Fragment reassembly time exceeded */
+  ICMP6_TE_FRAG = 1
+};
+
+/** ICMP parameter code */
+enum icmp6_pp_code {
+  /** Erroneous header field encountered */
+  ICMP6_PP_FIELD = 0,
+  /** Unrecognized next header type encountered */
+  ICMP6_PP_HEADER = 1,
+  /** Unrecognized IPv6 option encountered */
+  ICMP6_PP_OPTION = 2
+};
+
+/** This is the standard ICMP6 header. */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct icmp6_hdr {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t code);
+  PACK_STRUCT_FIELD(u16_t chksum);
+  PACK_STRUCT_FIELD(u32_t data);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** This is the ICMP6 header adapted for echo req/resp. */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct icmp6_echo_hdr {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t code);
+  PACK_STRUCT_FIELD(u16_t chksum);
+  PACK_STRUCT_FIELD(u16_t id);
+  PACK_STRUCT_FIELD(u16_t seqno);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_ICMP6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ieee.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ieee.h
new file mode 100644
index 00000000000..abbb9e31d1b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ieee.h
@@ -0,0 +1,91 @@
+/**
+ * @file
+ * IEEE assigned numbers
+ *
+ * @defgroup ieee IEEE assigned numbers
+ * @ingroup infrastructure
+ */
+
+/*
+ * Copyright (c) 2017 Dirk Ziegelmeier.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Dirk Ziegelmeier <dziegel@gmx.de>
+ *
+ */
+
+#ifndef LWIP_HDR_PROT_IEEE_H
+#define LWIP_HDR_PROT_IEEE_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @ingroup ieee
+ * A list of often ethtypes (although lwIP does not use all of them).
+ */
+enum lwip_ieee_eth_type {
+  /** Internet protocol v4 */
+  ETHTYPE_IP        = 0x0800U,
+  /** Address resolution protocol */
+  ETHTYPE_ARP       = 0x0806U, 
+  /** Wake on lan */
+  ETHTYPE_WOL       = 0x0842U,
+  /** RARP */
+  ETHTYPE_RARP      = 0x8035U,
+  /** Virtual local area network */
+  ETHTYPE_VLAN      = 0x8100U,
+  /** Internet protocol v6 */
+  ETHTYPE_IPV6      = 0x86DDU,
+  /** PPP Over Ethernet Discovery Stage */
+  ETHTYPE_PPPOEDISC = 0x8863U,
+  /** PPP Over Ethernet Session Stage */
+  ETHTYPE_PPPOE     = 0x8864U,
+  /** Jumbo Frames */
+  ETHTYPE_JUMBO     = 0x8870U,
+  /** Process field network */
+  ETHTYPE_PROFINET  = 0x8892U,
+  /** Ethernet for control automation technology */
+  ETHTYPE_ETHERCAT  = 0x88A4U,
+  /** Link layer discovery protocol */
+  ETHTYPE_LLDP      = 0x88CCU,
+  /** Serial real-time communication system */
+  ETHTYPE_SERCOS    = 0x88CDU,
+  /** Media redundancy protocol */
+  ETHTYPE_MRP       = 0x88E3U,
+  /** Precision time protocol */
+  ETHTYPE_PTP       = 0x88F7U,
+  /** Q-in-Q, 802.1ad */
+  ETHTYPE_QINQ      = 0x9100U
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_IEEE_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/igmp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/igmp.h
new file mode 100644
index 00000000000..46b81a9dd37
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/igmp.h
@@ -0,0 +1,90 @@
+/**
+ * @file
+ * IGMP protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_IGMP_H
+#define LWIP_HDR_PROT_IGMP_H
+
+#include "lwip/arch.h"
+#include "lwip/prot/ip4.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * IGMP constants
+ */
+#define IGMP_TTL                       1
+#define IGMP_MINLEN                    8
+#define ROUTER_ALERT                   0x9404U
+#define ROUTER_ALERTLEN                4
+
+/*
+ * IGMP message types, including version number.
+ */
+#define IGMP_MEMB_QUERY                0x11 /* Membership query         */
+#define IGMP_V1_MEMB_REPORT            0x12 /* Ver. 1 membership report */
+#define IGMP_V2_MEMB_REPORT            0x16 /* Ver. 2 membership report */
+#define IGMP_LEAVE_GROUP               0x17 /* Leave-group message      */
+
+/* Group  membership states */
+#define IGMP_GROUP_NON_MEMBER          0
+#define IGMP_GROUP_DELAYING_MEMBER     1
+#define IGMP_GROUP_IDLE_MEMBER         2
+
+/**
+ * IGMP packet format.
+ */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct igmp_msg {
+  PACK_STRUCT_FLD_8(u8_t         igmp_msgtype);
+  PACK_STRUCT_FLD_8(u8_t         igmp_maxresp);
+  PACK_STRUCT_FIELD(u16_t        igmp_checksum);
+  PACK_STRUCT_FLD_S(ip4_addr_p_t igmp_group_address);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_IGMP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ip.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ip.h
new file mode 100644
index 00000000000..223158f5ace
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ip.h
@@ -0,0 +1,59 @@
+/**
+ * @file
+ * IP protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_IP_H
+#define LWIP_HDR_PROT_IP_H
+
+#include "lwip/arch.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define IP_PROTO_ICMP    1
+#define IP_PROTO_IGMP    2
+#define IP_PROTO_UDP     17
+#define IP_PROTO_UDPLITE 136
+#define IP_PROTO_TCP     6
+
+/** This operates on a void* by loading the first byte */
+#define IP_HDR_GET_VERSION(ptr)   ((*(u8_t*)(ptr)) >> 4)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_IP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ip4.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ip4.h
new file mode 100644
index 00000000000..93474611549
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ip4.h
@@ -0,0 +1,131 @@
+/**
+ * @file
+ * IPv4 protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_IP4_H
+#define LWIP_HDR_PROT_IP4_H
+
+#include "lwip/arch.h"
+#include "lwip/ip4_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** This is the packed version of ip4_addr_t,
+    used in network headers that are itself packed */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct ip4_addr_packed {
+  PACK_STRUCT_FIELD(u32_t addr);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+typedef struct ip4_addr_packed ip4_addr_p_t;
+
+/* Size of the IPv4 header. Same as 'sizeof(struct ip_hdr)'. */
+#define IP_HLEN 20
+/* Maximum size of the IPv4 header with options. */
+#define IP_HLEN_MAX 60
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+/* The IPv4 header */
+struct ip_hdr {
+  /* version / header length */
+  PACK_STRUCT_FLD_8(u8_t _v_hl);
+  /* type of service */
+  PACK_STRUCT_FLD_8(u8_t _tos);
+  /* total length */
+  PACK_STRUCT_FIELD(u16_t _len);
+  /* identification */
+  PACK_STRUCT_FIELD(u16_t _id);
+  /* fragment offset field */
+  PACK_STRUCT_FIELD(u16_t _offset);
+#define IP_RF 0x8000U        /* reserved fragment flag */
+#define IP_DF 0x4000U        /* don't fragment flag */
+#define IP_MF 0x2000U        /* more fragments flag */
+#define IP_OFFMASK 0x1fffU   /* mask for fragmenting bits */
+  /* time to live */
+  PACK_STRUCT_FLD_8(u8_t _ttl);
+  /* protocol*/
+  PACK_STRUCT_FLD_8(u8_t _proto);
+  /* checksum */
+  PACK_STRUCT_FIELD(u16_t _chksum);
+  /* source and destination IP addresses */
+  PACK_STRUCT_FLD_S(ip4_addr_p_t src);
+  PACK_STRUCT_FLD_S(ip4_addr_p_t dest);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/* Macros to get struct ip_hdr fields: */
+#define IPH_V(hdr)  ((hdr)->_v_hl >> 4)
+#define IPH_HL(hdr) ((hdr)->_v_hl & 0x0f)
+#define IPH_HL_BYTES(hdr) ((u8_t)(IPH_HL(hdr) * 4))
+#define IPH_TOS(hdr) ((hdr)->_tos)
+#define IPH_LEN(hdr) ((hdr)->_len)
+#define IPH_ID(hdr) ((hdr)->_id)
+#define IPH_OFFSET(hdr) ((hdr)->_offset)
+#define IPH_OFFSET_BYTES(hdr) ((u16_t)((lwip_ntohs(IPH_OFFSET(hdr)) & IP_OFFMASK) * 8U))
+#define IPH_TTL(hdr) ((hdr)->_ttl)
+#define IPH_PROTO(hdr) ((hdr)->_proto)
+#define IPH_CHKSUM(hdr) ((hdr)->_chksum)
+
+/* Macros to set struct ip_hdr fields: */
+#define IPH_VHL_SET(hdr, v, hl) (hdr)->_v_hl = (u8_t)((((v) << 4) | (hl)))
+#define IPH_TOS_SET(hdr, tos) (hdr)->_tos = (tos)
+#define IPH_LEN_SET(hdr, len) (hdr)->_len = (len)
+#define IPH_ID_SET(hdr, id) (hdr)->_id = (id)
+#define IPH_OFFSET_SET(hdr, off) (hdr)->_offset = (off)
+#define IPH_TTL_SET(hdr, ttl) (hdr)->_ttl = (u8_t)(ttl)
+#define IPH_PROTO_SET(hdr, proto) (hdr)->_proto = (u8_t)(proto)
+#define IPH_CHKSUM_SET(hdr, chksum) (hdr)->_chksum = (chksum)
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_IP4_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ip6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ip6.h
new file mode 100644
index 00000000000..0f6de455932
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/ip6.h
@@ -0,0 +1,233 @@
+/**
+ * @file
+ * IPv6 protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_IP6_H
+#define LWIP_HDR_PROT_IP6_H
+
+#include "lwip/arch.h"
+#include "lwip/ip6_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** This is the packed version of ip6_addr_t,
+    used in network headers that are itself packed */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct ip6_addr_packed {
+  PACK_STRUCT_FIELD(u32_t addr[4]);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+typedef struct ip6_addr_packed ip6_addr_p_t;
+
+#define IP6_HLEN 40
+
+#define IP6_NEXTH_HOPBYHOP  0
+#define IP6_NEXTH_TCP       6
+#define IP6_NEXTH_UDP       17
+#define IP6_NEXTH_ENCAPS    41
+#define IP6_NEXTH_ROUTING   43
+#define IP6_NEXTH_FRAGMENT  44
+#define IP6_NEXTH_ICMP6     58
+#define IP6_NEXTH_NONE      59
+#define IP6_NEXTH_DESTOPTS  60
+#define IP6_NEXTH_UDPLITE   136
+
+/** The IPv6 header. */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct ip6_hdr {
+  /** version / traffic class / flow label */
+  PACK_STRUCT_FIELD(u32_t _v_tc_fl);
+  /** payload length */
+  PACK_STRUCT_FIELD(u16_t _plen);
+  /** next header */
+  PACK_STRUCT_FLD_8(u8_t _nexth);
+  /** hop limit */
+  PACK_STRUCT_FLD_8(u8_t _hoplim);
+  /** source and destination IP addresses */
+  PACK_STRUCT_FLD_S(ip6_addr_p_t src);
+  PACK_STRUCT_FLD_S(ip6_addr_p_t dest);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+#define IP6H_V(hdr)  ((lwip_ntohl((hdr)->_v_tc_fl) >> 28) & 0x0f)
+#define IP6H_TC(hdr) ((lwip_ntohl((hdr)->_v_tc_fl) >> 20) & 0xff)
+#define IP6H_FL(hdr) (lwip_ntohl((hdr)->_v_tc_fl) & 0x000fffff)
+#define IP6H_PLEN(hdr) (lwip_ntohs((hdr)->_plen))
+#define IP6H_NEXTH(hdr) ((hdr)->_nexth)
+#define IP6H_NEXTH_P(hdr) ((u8_t *)(hdr) + 6)
+#define IP6H_HOPLIM(hdr) ((hdr)->_hoplim)
+#define IP6H_VTCFL_SET(hdr, v, tc, fl) (hdr)->_v_tc_fl = (lwip_htonl((((u32_t)(v)) << 28) | (((u32_t)(tc)) << 20) | (fl)))
+#define IP6H_PLEN_SET(hdr, plen) (hdr)->_plen = lwip_htons(plen)
+#define IP6H_NEXTH_SET(hdr, nexth) (hdr)->_nexth = (nexth)
+#define IP6H_HOPLIM_SET(hdr, hl) (hdr)->_hoplim = (u8_t)(hl)
+
+/* ipv6 extended options header */
+#define IP6_PAD1_OPTION             0
+#define IP6_PADN_OPTION             1
+#define IP6_ROUTER_ALERT_OPTION     5
+#define IP6_JUMBO_OPTION            194
+#define IP6_HOME_ADDRESS_OPTION     201
+#define IP6_ROUTER_ALERT_DLEN       2
+#define IP6_ROUTER_ALERT_VALUE_MLD  0
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct ip6_opt_hdr {
+  /* router alert option type */
+  PACK_STRUCT_FLD_8(u8_t _opt_type);
+  /* router alert option data len */
+  PACK_STRUCT_FLD_8(u8_t _opt_dlen);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+#define IP6_OPT_HLEN 2
+#define IP6_OPT_TYPE_ACTION(hdr) ((((hdr)->_opt_type) >> 6) & 0x3)
+#define IP6_OPT_TYPE_CHANGE(hdr) ((((hdr)->_opt_type) >> 5) & 0x1)
+#define IP6_OPT_TYPE(hdr) ((hdr)->_opt_type)
+#define IP6_OPT_DLEN(hdr) ((hdr)->_opt_dlen)
+
+/* Hop-by-Hop header. */
+#define IP6_HBH_HLEN    2
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct ip6_hbh_hdr {
+  /* next header */
+  PACK_STRUCT_FLD_8(u8_t _nexth);
+  /* header length in 8-octet units */
+  PACK_STRUCT_FLD_8(u8_t _hlen);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+#define IP6_HBH_NEXTH(hdr) ((hdr)->_nexth)
+
+/* Destination header. */
+#define IP6_DEST_HLEN   2
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct ip6_dest_hdr {
+  /* next header */
+  PACK_STRUCT_FLD_8(u8_t _nexth);
+  /* header length in 8-octet units */
+  PACK_STRUCT_FLD_8(u8_t _hlen);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+#define IP6_DEST_NEXTH(hdr) ((hdr)->_nexth)
+
+/* Routing header */
+#define IP6_ROUT_TYPE2  2
+#define IP6_ROUT_RPL    3
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct ip6_rout_hdr {
+  /* next header */
+  PACK_STRUCT_FLD_8(u8_t _nexth);
+  /* reserved */
+  PACK_STRUCT_FLD_8(u8_t _hlen);
+  /* fragment offset */
+  PACK_STRUCT_FIELD(u8_t _routing_type);
+  /* fragmented packet identification */
+  PACK_STRUCT_FIELD(u8_t _segments_left);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+#define IP6_ROUT_NEXTH(hdr) ((hdr)->_nexth)
+#define IP6_ROUT_TYPE(hdr) ((hdr)->_routing_type)
+#define IP6_ROUT_SEG_LEFT(hdr) ((hdr)->_segments_left)
+
+/* Fragment header. */
+#define IP6_FRAG_HLEN    8
+#define IP6_FRAG_OFFSET_MASK    0xfff8
+#define IP6_FRAG_MORE_FLAG      0x0001
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct ip6_frag_hdr {
+  /* next header */
+  PACK_STRUCT_FLD_8(u8_t _nexth);
+  /* reserved */
+  PACK_STRUCT_FLD_8(u8_t reserved);
+  /* fragment offset */
+  PACK_STRUCT_FIELD(u16_t _fragment_offset);
+  /* fragmented packet identification */
+  PACK_STRUCT_FIELD(u32_t _identification);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+#define IP6_FRAG_NEXTH(hdr) ((hdr)->_nexth)
+#define IP6_FRAG_MBIT(hdr) (lwip_ntohs((hdr)->_fragment_offset) & 0x1)
+#define IP6_FRAG_ID(hdr) (lwip_ntohl((hdr)->_identification))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_IP6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/mld6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/mld6.h
new file mode 100644
index 00000000000..71f1dcbdc5b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/mld6.h
@@ -0,0 +1,71 @@
+/**
+ * @file
+ * MLD6 protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_MLD6_H
+#define LWIP_HDR_PROT_MLD6_H
+
+#include "lwip/arch.h"
+#include "lwip/prot/ip6.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MLD6_HBH_HLEN 8
+/** Multicast listener report/query/done message header. */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct mld_header {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t code);
+  PACK_STRUCT_FIELD(u16_t chksum);
+  PACK_STRUCT_FIELD(u16_t max_resp_delay);
+  PACK_STRUCT_FIELD(u16_t reserved);
+  PACK_STRUCT_FLD_S(ip6_addr_p_t multicast_address);
+  /* Options follow. */
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_MLD6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/nd6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/nd6.h
new file mode 100644
index 00000000000..c270d07c138
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/nd6.h
@@ -0,0 +1,274 @@
+/**
+ * @file
+ * ND6 protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_ND6_H
+#define LWIP_HDR_PROT_ND6_H
+
+#include "lwip/arch.h"
+#include "lwip/ip6_addr.h"
+#include "lwip/prot/ip6.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Neighbor solicitation message header. */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct ns_header {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t code);
+  PACK_STRUCT_FIELD(u16_t chksum);
+  PACK_STRUCT_FIELD(u32_t reserved);
+  PACK_STRUCT_FLD_S(ip6_addr_p_t target_address);
+  /* Options follow. */
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** Neighbor advertisement message header. */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct na_header {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t code);
+  PACK_STRUCT_FIELD(u16_t chksum);
+  PACK_STRUCT_FLD_8(u8_t flags);
+  PACK_STRUCT_FLD_8(u8_t reserved[3]);
+  PACK_STRUCT_FLD_S(ip6_addr_p_t target_address);
+  /* Options follow. */
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+#define ND6_FLAG_ROUTER      (0x80)
+#define ND6_FLAG_SOLICITED   (0x40)
+#define ND6_FLAG_OVERRIDE    (0x20)
+
+/** Router solicitation message header. */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct rs_header {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t code);
+  PACK_STRUCT_FIELD(u16_t chksum);
+  PACK_STRUCT_FIELD(u32_t reserved);
+  /* Options follow. */
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** Router advertisement message header. */
+#define ND6_RA_FLAG_MANAGED_ADDR_CONFIG (0x80)
+#define ND6_RA_FLAG_OTHER_CONFIG (0x40)
+#define ND6_RA_FLAG_HOME_AGENT (0x20)
+#define ND6_RA_PREFERENCE_MASK (0x18)
+#define ND6_RA_PREFERENCE_HIGH (0x08)
+#define ND6_RA_PREFERENCE_MEDIUM (0x00)
+#define ND6_RA_PREFERENCE_LOW (0x18)
+#define ND6_RA_PREFERENCE_DISABLED (0x10)
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct ra_header {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t code);
+  PACK_STRUCT_FIELD(u16_t chksum);
+  PACK_STRUCT_FLD_8(u8_t current_hop_limit);
+  PACK_STRUCT_FLD_8(u8_t flags);
+  PACK_STRUCT_FIELD(u16_t router_lifetime);
+  PACK_STRUCT_FIELD(u32_t reachable_time);
+  PACK_STRUCT_FIELD(u32_t retrans_timer);
+  /* Options follow. */
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** Redirect message header. */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct redirect_header {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t code);
+  PACK_STRUCT_FIELD(u16_t chksum);
+  PACK_STRUCT_FIELD(u32_t reserved);
+  PACK_STRUCT_FLD_S(ip6_addr_p_t target_address);
+  PACK_STRUCT_FLD_S(ip6_addr_p_t destination_address);
+  /* Options follow. */
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** Link-layer address option. */
+#define ND6_OPTION_TYPE_SOURCE_LLADDR (0x01)
+#define ND6_OPTION_TYPE_TARGET_LLADDR (0x02)
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct lladdr_option {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t length);
+  PACK_STRUCT_FLD_8(u8_t addr[NETIF_MAX_HWADDR_LEN]);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** Prefix information option. */
+#define ND6_OPTION_TYPE_PREFIX_INFO (0x03)
+#define ND6_PREFIX_FLAG_ON_LINK (0x80)
+#define ND6_PREFIX_FLAG_AUTONOMOUS (0x40)
+#define ND6_PREFIX_FLAG_ROUTER_ADDRESS (0x20)
+#define ND6_PREFIX_FLAG_SITE_PREFIX (0x10)
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct prefix_option {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t length);
+  PACK_STRUCT_FLD_8(u8_t prefix_length);
+  PACK_STRUCT_FLD_8(u8_t flags);
+  PACK_STRUCT_FIELD(u32_t valid_lifetime);
+  PACK_STRUCT_FIELD(u32_t preferred_lifetime);
+  PACK_STRUCT_FLD_8(u8_t reserved2[3]);
+  PACK_STRUCT_FLD_8(u8_t site_prefix_length);
+  PACK_STRUCT_FLD_S(ip6_addr_p_t prefix);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** Redirected header option. */
+#define ND6_OPTION_TYPE_REDIR_HDR (0x04)
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct redirected_header_option {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t length);
+  PACK_STRUCT_FLD_8(u8_t reserved[6]);
+  /* Portion of redirected packet follows. */
+  /* PACK_STRUCT_FLD_8(u8_t redirected[8]); */
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** MTU option. */
+#define ND6_OPTION_TYPE_MTU (0x05)
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct mtu_option {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t length);
+  PACK_STRUCT_FIELD(u16_t reserved);
+  PACK_STRUCT_FIELD(u32_t mtu);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** Route information option. */
+#define ND6_OPTION_TYPE_ROUTE_INFO (24)
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct route_option {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t length);
+  PACK_STRUCT_FLD_8(u8_t prefix_length);
+  PACK_STRUCT_FLD_8(u8_t preference);
+  PACK_STRUCT_FIELD(u32_t route_lifetime);
+  PACK_STRUCT_FLD_S(ip6_addr_p_t prefix);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/** Recursive DNS Server Option. */
+#define ND6_OPTION_TYPE_RDNSS (25)
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct rdnss_option {
+  PACK_STRUCT_FLD_8(u8_t type);
+  PACK_STRUCT_FLD_8(u8_t length);
+  PACK_STRUCT_FIELD(u16_t reserved);
+  PACK_STRUCT_FIELD(u32_t lifetime);
+  PACK_STRUCT_FLD_S(ip6_addr_p_t rdnss_address[1]);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+#define SIZEOF_RDNSS_OPTION_BASE 8 /* size without addresses */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_ND6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/tcp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/tcp.h
new file mode 100644
index 00000000000..c1d7de1faf3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/tcp.h
@@ -0,0 +1,100 @@
+/**
+ * @file
+ * TCP protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_TCP_H
+#define LWIP_HDR_PROT_TCP_H
+
+#include "lwip/arch.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Length of the TCP header, excluding options. */
+#define TCP_HLEN 20
+
+/* Fields are (of course) in network byte order.
+ * Some fields are converted to host byte order in tcp_input().
+ */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct tcp_hdr {
+  PACK_STRUCT_FIELD(u16_t src);
+  PACK_STRUCT_FIELD(u16_t dest);
+  PACK_STRUCT_FIELD(u32_t seqno);
+  PACK_STRUCT_FIELD(u32_t ackno);
+  PACK_STRUCT_FIELD(u16_t _hdrlen_rsvd_flags);
+  PACK_STRUCT_FIELD(u16_t wnd);
+  PACK_STRUCT_FIELD(u16_t chksum);
+  PACK_STRUCT_FIELD(u16_t urgp);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/* TCP header flags bits */
+#define TCP_FIN 0x01U
+#define TCP_SYN 0x02U
+#define TCP_RST 0x04U
+#define TCP_PSH 0x08U
+#define TCP_ACK 0x10U
+#define TCP_URG 0x20U
+#define TCP_ECE 0x40U
+#define TCP_CWR 0x80U
+/* Valid TCP header flags */
+#define TCP_FLAGS 0x3fU
+
+#define TCP_MAX_OPTION_BYTES 40
+
+#define TCPH_HDRLEN(phdr) ((u16_t)(lwip_ntohs((phdr)->_hdrlen_rsvd_flags) >> 12))
+#define TCPH_HDRLEN_BYTES(phdr) ((u8_t)(TCPH_HDRLEN(phdr) << 2))
+#define TCPH_FLAGS(phdr)  ((u8_t)((lwip_ntohs((phdr)->_hdrlen_rsvd_flags) & TCP_FLAGS)))
+
+#define TCPH_HDRLEN_SET(phdr, len) (phdr)->_hdrlen_rsvd_flags = lwip_htons(((len) << 12) | TCPH_FLAGS(phdr))
+#define TCPH_FLAGS_SET(phdr, flags) (phdr)->_hdrlen_rsvd_flags = (((phdr)->_hdrlen_rsvd_flags & PP_HTONS(~TCP_FLAGS)) | lwip_htons(flags))
+#define TCPH_HDRLEN_FLAGS_SET(phdr, len, flags) (phdr)->_hdrlen_rsvd_flags = (u16_t)(lwip_htons((u16_t)((len) << 12) | (flags)))
+
+#define TCPH_SET_FLAG(phdr, flags ) (phdr)->_hdrlen_rsvd_flags = ((phdr)->_hdrlen_rsvd_flags | lwip_htons(flags))
+#define TCPH_UNSET_FLAG(phdr, flags) (phdr)->_hdrlen_rsvd_flags = ((phdr)->_hdrlen_rsvd_flags & ~lwip_htons(flags))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_TCP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/udp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/udp.h
new file mode 100644
index 00000000000..664f19a3e7b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/prot/udp.h
@@ -0,0 +1,68 @@
+/**
+ * @file
+ * UDP protocol definitions
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_PROT_UDP_H
+#define LWIP_HDR_PROT_UDP_H
+
+#include "lwip/arch.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define UDP_HLEN 8
+
+/* Fields are (of course) in network byte order. */
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct udp_hdr {
+  PACK_STRUCT_FIELD(u16_t src);
+  PACK_STRUCT_FIELD(u16_t dest);  /* src/dest UDP ports */
+  PACK_STRUCT_FIELD(u16_t len);
+  PACK_STRUCT_FIELD(u16_t chksum);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_PROT_UDP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/raw.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/raw.h
new file mode 100644
index 00000000000..b129bd3b993
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/raw.h
@@ -0,0 +1,143 @@
+/**
+ * @file
+ * raw API (to be used from TCPIP thread)\n
+ * See also @ref raw_raw
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_RAW_H
+#define LWIP_HDR_RAW_H
+
+#include "lwip/opt.h"
+
+#if LWIP_RAW /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/pbuf.h"
+#include "lwip/def.h"
+#include "lwip/ip.h"
+#include "lwip/ip_addr.h"
+#include "lwip/ip6_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RAW_FLAGS_CONNECTED      0x01U
+#define RAW_FLAGS_HDRINCL        0x02U
+#define RAW_FLAGS_MULTICAST_LOOP 0x04U
+
+struct raw_pcb;
+
+/** Function prototype for raw pcb receive callback functions.
+ * @param arg user supplied argument (raw_pcb.recv_arg)
+ * @param pcb the raw_pcb which received data
+ * @param p the packet buffer that was received
+ * @param addr the remote IP address from which the packet was received
+ * @return 1 if the packet was 'eaten' (aka. deleted),
+ *         0 if the packet lives on
+ * If returning 1, the callback is responsible for freeing the pbuf
+ * if it's not used any more.
+ */
+typedef u8_t (*raw_recv_fn)(void *arg, struct raw_pcb *pcb, struct pbuf *p,
+    const ip_addr_t *addr);
+
+/** the RAW protocol control block */
+struct raw_pcb {
+  /* Common members of all PCB types */
+  IP_PCB;
+
+  struct raw_pcb *next;
+
+  u8_t protocol;
+  u8_t flags;
+
+#if LWIP_MULTICAST_TX_OPTIONS
+  /** outgoing network interface for multicast packets, by interface index (if nonzero) */
+  u8_t mcast_ifindex;
+  /** TTL for outgoing multicast packets */
+  u8_t mcast_ttl;
+#endif /* LWIP_MULTICAST_TX_OPTIONS */
+
+  /** receive callback function */
+  raw_recv_fn recv;
+  /* user-supplied argument for the recv callback */
+  void *recv_arg;
+#if LWIP_IPV6
+  /* fields for handling checksum computations as per RFC3542. */
+  u16_t chksum_offset;
+  u8_t  chksum_reqd;
+#endif
+};
+
+/* The following functions is the application layer interface to the
+   RAW code. */
+struct raw_pcb * raw_new        (u8_t proto);
+struct raw_pcb * raw_new_ip_type(u8_t type, u8_t proto);
+void             raw_remove     (struct raw_pcb *pcb);
+err_t            raw_bind       (struct raw_pcb *pcb, const ip_addr_t *ipaddr);
+void             raw_bind_netif (struct raw_pcb *pcb, const struct netif *netif);
+err_t            raw_connect    (struct raw_pcb *pcb, const ip_addr_t *ipaddr);
+void             raw_disconnect (struct raw_pcb *pcb);
+
+err_t            raw_sendto     (struct raw_pcb *pcb, struct pbuf *p, const ip_addr_t *ipaddr);
+err_t            raw_sendto_if_src(struct raw_pcb *pcb, struct pbuf *p, const ip_addr_t *dst_ip, struct netif *netif, const ip_addr_t *src_ip);
+err_t            raw_send       (struct raw_pcb *pcb, struct pbuf *p);
+
+void             raw_recv       (struct raw_pcb *pcb, raw_recv_fn recv, void *recv_arg);
+
+#define          raw_flags(pcb) ((pcb)->flags)
+#define          raw_setflags(pcb,f)  ((pcb)->flags = (f))
+
+#define          raw_set_flags(pcb, set_flags)     do { (pcb)->flags = (u8_t)((pcb)->flags |  (set_flags)); } while(0)
+#define          raw_clear_flags(pcb, clr_flags)   do { (pcb)->flags = (u8_t)((pcb)->flags & (u8_t)(~(clr_flags) & 0xff)); } while(0)
+#define          raw_is_flag_set(pcb, flag)        (((pcb)->flags & (flag)) != 0)
+
+#define raw_init() /* Compatibility define, no init needed. */
+
+/* for compatibility with older implementation */
+#define raw_new_ip6(proto) raw_new_ip_type(IPADDR_TYPE_V6, proto)
+
+#if LWIP_MULTICAST_TX_OPTIONS
+#define raw_set_multicast_netif_index(pcb, idx) ((pcb)->mcast_ifindex = (idx))
+#define raw_get_multicast_netif_index(pcb)      ((pcb)->mcast_ifindex)
+#define raw_set_multicast_ttl(pcb, value)       ((pcb)->mcast_ttl = (value))
+#define raw_get_multicast_ttl(pcb)              ((pcb)->mcast_ttl)
+#endif /* LWIP_MULTICAST_TX_OPTIONS */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_RAW */
+
+#endif /* LWIP_HDR_RAW_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/sio.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/sio.h
new file mode 100644
index 00000000000..7643e195697
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/sio.h
@@ -0,0 +1,142 @@
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ */
+
+/*
+ * This is the interface to the platform specific serial IO module
+ * It needs to be implemented by those platforms which need SLIP or PPP
+ */
+
+#ifndef SIO_H
+#define SIO_H
+
+#include "lwip/arch.h"
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* If you want to define sio_fd_t elsewhere or differently,
+   define this in your cc.h file. */
+#ifndef __sio_fd_t_defined
+typedef void * sio_fd_t;
+#endif
+
+/* The following functions can be defined to something else in your cc.h file
+   or be implemented in your custom sio.c file. */
+
+#ifndef sio_open
+/**
+ * Opens a serial device for communication.
+ *
+ * @param devnum device number
+ * @return handle to serial device if successful, NULL otherwise
+ */
+sio_fd_t sio_open(u8_t devnum);
+#endif
+
+#ifndef sio_send
+/**
+ * Sends a single character to the serial device.
+ *
+ * @param c character to send
+ * @param fd serial device handle
+ *
+ * @note This function will block until the character can be sent.
+ */
+void sio_send(u8_t c, sio_fd_t fd);
+#endif
+
+#ifndef sio_recv
+/**
+ * Receives a single character from the serial device.
+ *
+ * @param fd serial device handle
+ *
+ * @note This function will block until a character is received.
+ */
+u8_t sio_recv(sio_fd_t fd);
+#endif
+
+#ifndef sio_read
+/**
+ * Reads from the serial device.
+ *
+ * @param fd serial device handle
+ * @param data pointer to data buffer for receiving
+ * @param len maximum length (in bytes) of data to receive
+ * @return number of bytes actually received - may be 0 if aborted by sio_read_abort
+ *
+ * @note This function will block until data can be received. The blocking
+ * can be cancelled by calling sio_read_abort().
+ */
+u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len);
+#endif
+
+#ifndef sio_tryread
+/**
+ * Tries to read from the serial device. Same as sio_read but returns
+ * immediately if no data is available and never blocks.
+ *
+ * @param fd serial device handle
+ * @param data pointer to data buffer for receiving
+ * @param len maximum length (in bytes) of data to receive
+ * @return number of bytes actually received
+ */
+u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len);
+#endif
+
+#ifndef sio_write
+/**
+ * Writes to the serial device.
+ *
+ * @param fd serial device handle
+ * @param data pointer to data to send
+ * @param len length (in bytes) of data to send
+ * @return number of bytes actually sent
+ *
+ * @note This function will block until all data can be sent.
+ */
+u32_t sio_write(sio_fd_t fd, u8_t *data, u32_t len);
+#endif
+
+#ifndef sio_read_abort
+/**
+ * Aborts a blocking sio_read() call.
+ *
+ * @param fd serial device handle
+ */
+void sio_read_abort(sio_fd_t fd);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SIO_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/snmp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/snmp.h
new file mode 100644
index 00000000000..8704d0b4d29
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/snmp.h
@@ -0,0 +1,213 @@
+/**
+ * @file
+ * SNMP support API for implementing netifs and statitics for MIB2
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Dirk Ziegelmeier <dziegel@gmx.de>
+ *
+ */
+#ifndef LWIP_HDR_SNMP_H
+#define LWIP_HDR_SNMP_H
+
+#include "lwip/opt.h"
+#include "lwip/ip_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct udp_pcb;
+struct netif;
+
+/**
+ * @defgroup netif_mib2 MIB2 statistics
+ * @ingroup netif
+ */
+
+/* MIB2 statistics functions */
+#if MIB2_STATS  /* don't build if not configured for use in lwipopts.h */
+/**
+ * @ingroup netif_mib2
+ * @see RFC1213, "MIB-II, 6. Definitions"
+ */
+enum snmp_ifType {
+  snmp_ifType_other=1,                /* none of the following */
+  snmp_ifType_regular1822,
+  snmp_ifType_hdh1822,
+  snmp_ifType_ddn_x25,
+  snmp_ifType_rfc877_x25,
+  snmp_ifType_ethernet_csmacd,
+  snmp_ifType_iso88023_csmacd,
+  snmp_ifType_iso88024_tokenBus,
+  snmp_ifType_iso88025_tokenRing,
+  snmp_ifType_iso88026_man,
+  snmp_ifType_starLan,
+  snmp_ifType_proteon_10Mbit,
+  snmp_ifType_proteon_80Mbit,
+  snmp_ifType_hyperchannel,
+  snmp_ifType_fddi,
+  snmp_ifType_lapb,
+  snmp_ifType_sdlc,
+  snmp_ifType_ds1,                    /* T-1 */
+  snmp_ifType_e1,                     /* european equiv. of T-1 */
+  snmp_ifType_basicISDN,
+  snmp_ifType_primaryISDN,            /* proprietary serial */
+  snmp_ifType_propPointToPointSerial,
+  snmp_ifType_ppp,
+  snmp_ifType_softwareLoopback,
+  snmp_ifType_eon,                    /* CLNP over IP [11] */
+  snmp_ifType_ethernet_3Mbit,
+  snmp_ifType_nsip,                   /* XNS over IP */
+  snmp_ifType_slip,                   /* generic SLIP */
+  snmp_ifType_ultra,                  /* ULTRA technologies */
+  snmp_ifType_ds3,                    /* T-3 */
+  snmp_ifType_sip,                    /* SMDS */
+  snmp_ifType_frame_relay
+};
+
+/** This macro has a precision of ~49 days because sys_now returns u32_t. \#define your own if you want ~490 days. */
+#ifndef MIB2_COPY_SYSUPTIME_TO
+#define MIB2_COPY_SYSUPTIME_TO(ptrToVal) (*(ptrToVal) = (sys_now() / 10))
+#endif
+
+/**
+ * @ingroup netif_mib2
+ * Increment stats member for SNMP MIB2 stats (struct stats_mib2_netif_ctrs)
+ */
+#define MIB2_STATS_NETIF_INC(n, x)      do { ++(n)->mib2_counters.x; } while(0)
+/**
+ * @ingroup netif_mib2
+ * Add value to stats member for SNMP MIB2 stats (struct stats_mib2_netif_ctrs)
+ */
+#define MIB2_STATS_NETIF_ADD(n, x, val) do { (n)->mib2_counters.x += (val); } while(0)
+
+/**
+ * @ingroup netif_mib2
+ * Init MIB2 statistic counters in netif
+ * @param netif Netif to init
+ * @param type one of enum @ref snmp_ifType
+ * @param speed your link speed here (units: bits per second)
+ */
+#define MIB2_INIT_NETIF(netif, type, speed) do { \
+  (netif)->link_type = (type);  \
+  (netif)->link_speed = (speed);\
+  (netif)->ts = 0;              \
+  (netif)->mib2_counters.ifinoctets = 0;      \
+  (netif)->mib2_counters.ifinucastpkts = 0;   \
+  (netif)->mib2_counters.ifinnucastpkts = 0;  \
+  (netif)->mib2_counters.ifindiscards = 0;    \
+  (netif)->mib2_counters.ifinerrors = 0;    \
+  (netif)->mib2_counters.ifinunknownprotos = 0;    \
+  (netif)->mib2_counters.ifoutoctets = 0;     \
+  (netif)->mib2_counters.ifoutucastpkts = 0;  \
+  (netif)->mib2_counters.ifoutnucastpkts = 0; \
+  (netif)->mib2_counters.ifoutdiscards = 0; \
+  (netif)->mib2_counters.ifouterrors = 0; } while(0)
+#else /* MIB2_STATS */
+#ifndef MIB2_COPY_SYSUPTIME_TO
+#define MIB2_COPY_SYSUPTIME_TO(ptrToVal)
+#endif
+#define MIB2_INIT_NETIF(netif, type, speed)
+#define MIB2_STATS_NETIF_INC(n, x)
+#define MIB2_STATS_NETIF_ADD(n, x, val)
+#endif /* MIB2_STATS */
+
+/* LWIP MIB2 callbacks */
+#if LWIP_MIB2_CALLBACKS /* don't build if not configured for use in lwipopts.h */
+/* network interface */
+void mib2_netif_added(struct netif *ni);
+void mib2_netif_removed(struct netif *ni);
+
+#if LWIP_IPV4 && LWIP_ARP
+/* ARP (for atTable and ipNetToMediaTable) */
+void mib2_add_arp_entry(struct netif *ni, ip4_addr_t *ip);
+void mib2_remove_arp_entry(struct netif *ni, ip4_addr_t *ip);
+#else /* LWIP_IPV4 && LWIP_ARP */
+#define mib2_add_arp_entry(ni,ip)
+#define mib2_remove_arp_entry(ni,ip)
+#endif /* LWIP_IPV4 && LWIP_ARP */
+
+/* IP */
+#if LWIP_IPV4
+void mib2_add_ip4(struct netif *ni);
+void mib2_remove_ip4(struct netif *ni);
+void mib2_add_route_ip4(u8_t dflt, struct netif *ni);
+void mib2_remove_route_ip4(u8_t dflt, struct netif *ni);
+#endif /* LWIP_IPV4 */
+
+/* UDP */
+#if LWIP_UDP
+void mib2_udp_bind(struct udp_pcb *pcb);
+void mib2_udp_unbind(struct udp_pcb *pcb);
+#endif /* LWIP_UDP */
+
+#else /* LWIP_MIB2_CALLBACKS */
+/* LWIP_MIB2_CALLBACKS support not available */
+/* define everything to be empty */
+
+/* network interface */
+#define mib2_netif_added(ni)
+#define mib2_netif_removed(ni)
+
+/* ARP */
+#define mib2_add_arp_entry(ni,ip)
+#define mib2_remove_arp_entry(ni,ip)
+
+/* IP */
+#define mib2_add_ip4(ni)
+#define mib2_remove_ip4(ni)
+#define mib2_add_route_ip4(dflt, ni)
+#define mib2_remove_route_ip4(dflt, ni)
+
+/* UDP */
+#define mib2_udp_bind(pcb)
+#define mib2_udp_unbind(pcb)
+#endif /* LWIP_MIB2_CALLBACKS */
+
+/* for source-code compatibility reasons only, can be removed (not used internally) */
+#define NETIF_INIT_SNMP                MIB2_INIT_NETIF
+#define snmp_add_ifinoctets(ni,value)  MIB2_STATS_NETIF_ADD(ni, ifinoctets, value)
+#define snmp_inc_ifinucastpkts(ni)     MIB2_STATS_NETIF_INC(ni, ifinucastpkts)
+#define snmp_inc_ifinnucastpkts(ni)    MIB2_STATS_NETIF_INC(ni, ifinnucastpkts)
+#define snmp_inc_ifindiscards(ni)      MIB2_STATS_NETIF_INC(ni, ifindiscards)
+#define snmp_inc_ifinerrors(ni)        MIB2_STATS_NETIF_INC(ni, ifinerrors)
+#define snmp_inc_ifinunknownprotos(ni) MIB2_STATS_NETIF_INC(ni, ifinunknownprotos)
+#define snmp_add_ifoutoctets(ni,value) MIB2_STATS_NETIF_ADD(ni, ifoutoctets, value)
+#define snmp_inc_ifoutucastpkts(ni)    MIB2_STATS_NETIF_INC(ni, ifoutucastpkts)
+#define snmp_inc_ifoutnucastpkts(ni)   MIB2_STATS_NETIF_INC(ni, ifoutnucastpkts)
+#define snmp_inc_ifoutdiscards(ni)     MIB2_STATS_NETIF_INC(ni, ifoutdiscards)
+#define snmp_inc_ifouterrors(ni)       MIB2_STATS_NETIF_INC(ni, ifouterrors)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_SNMP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/sockets.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/sockets.h
new file mode 100644
index 00000000000..f342d8a534a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/sockets.h
@@ -0,0 +1,769 @@
+/**
+ * @file
+ * Socket API (to be used from non-TCPIP threads)
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+
+
+#ifndef LWIP_HDR_SOCKETS_H
+#define LWIP_HDR_SOCKETS_H
+
+#include "lwip/opt.h"
+#include "sys/poll.h"
+#if LWIP_SOCKET /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/ip_addr.h"
+#include "lwip/netif.h"
+#include "lwip/err.h"
+#include "lwip/inet.h"
+#include "lwip/errno.h"
+
+#include <string.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* If your port already typedef's sa_family_t, define SA_FAMILY_T_DEFINED
+   to prevent this code from redefining it. */
+#if !defined(sa_family_t) && !defined(SA_FAMILY_T_DEFINED)
+typedef u8_t sa_family_t;
+#endif
+/* If your port already typedef's in_port_t, define IN_PORT_T_DEFINED
+   to prevent this code from redefining it. */
+#if !defined(in_port_t) && !defined(IN_PORT_T_DEFINED)
+typedef u16_t in_port_t;
+#endif
+
+#if LWIP_IPV4
+/* members are in network byte order */
+struct sockaddr_in {
+  u8_t            sin_len;
+  sa_family_t     sin_family;
+  in_port_t       sin_port;
+  struct in_addr  sin_addr;
+#define SIN_ZERO_LEN 8
+  char            sin_zero[SIN_ZERO_LEN];
+};
+#endif /* LWIP_IPV4 */
+
+#if LWIP_IPV6
+struct sockaddr_in6 {
+  u8_t            sin6_len;      /* length of this structure    */
+  sa_family_t     sin6_family;   /* AF_INET6                    */
+  in_port_t       sin6_port;     /* Transport layer port #      */
+  u32_t           sin6_flowinfo; /* IPv6 flow information       */
+  struct in6_addr sin6_addr;     /* IPv6 address                */
+  u32_t           sin6_scope_id; /* Set of interfaces for scope */
+};
+#endif /* LWIP_IPV6 */
+
+struct sockaddr {
+  u8_t        sa_len;
+  sa_family_t sa_family;
+  char        sa_data[14];
+};
+
+struct sockaddr_storage {
+  u8_t        s2_len;
+  sa_family_t ss_family;
+  char        s2_data1[2];
+  u32_t       s2_data2[3];
+#if LWIP_IPV6
+  u32_t       s2_data3[3];
+#endif /* LWIP_IPV6 */
+};
+
+/* If your port already typedef's socklen_t, define SOCKLEN_T_DEFINED
+   to prevent this code from redefining it. */
+#if !defined(socklen_t) && !defined(SOCKLEN_T_DEFINED)
+typedef u32_t socklen_t;
+#endif
+
+#if !defined IOV_MAX
+#define IOV_MAX 0xFFFF
+#elif IOV_MAX > 0xFFFF
+#error "IOV_MAX larger than supported by LwIP"
+#endif /* IOV_MAX */
+
+#if !defined(iovec)
+struct iovec {
+  void  *iov_base;
+  size_t iov_len;
+};
+#endif
+
+struct msghdr {
+  void         *msg_name;
+  socklen_t     msg_namelen;
+  struct iovec *msg_iov;
+  int           msg_iovlen;
+  void         *msg_control;
+  socklen_t     msg_controllen;
+  int           msg_flags;
+};
+
+/* struct msghdr->msg_flags bit field values */
+#define MSG_TRUNC   0x04
+#define MSG_CTRUNC  0x08
+
+/* RFC 3542, Section 20: Ancillary Data */
+struct cmsghdr {
+  socklen_t  cmsg_len;   /* number of bytes, including header */
+  int        cmsg_level; /* originating protocol */
+  int        cmsg_type;  /* protocol-specific type */
+};
+/* Data section follows header and possible padding, typically referred to as
+      unsigned char cmsg_data[]; */
+
+/* cmsg header/data alignment. NOTE: we align to native word size (double word
+size on 16-bit arch) so structures are not placed at an unaligned address.
+16-bit arch needs double word to ensure 32-bit alignment because socklen_t
+could be 32 bits. If we ever have cmsg data with a 64-bit variable, alignment
+will need to increase long long */
+#define ALIGN_H(size) (((size) + sizeof(long) - 1U) & ~(sizeof(long)-1U))
+#define ALIGN_D(size) ALIGN_H(size)
+
+#define CMSG_FIRSTHDR(mhdr) \
+          ((mhdr)->msg_controllen >= sizeof(struct cmsghdr) ? \
+           (struct cmsghdr *)(mhdr)->msg_control : \
+           (struct cmsghdr *)NULL)
+
+#define CMSG_NXTHDR(mhdr, cmsg) \
+        (((cmsg) == NULL) ? CMSG_FIRSTHDR(mhdr) : \
+         (((u8_t *)(cmsg) + ALIGN_H((cmsg)->cmsg_len) \
+                            + ALIGN_D(sizeof(struct cmsghdr)) > \
+           (u8_t *)((mhdr)->msg_control) + (mhdr)->msg_controllen) ? \
+          (struct cmsghdr *)NULL : \
+          (struct cmsghdr *)((void*)((u8_t *)(cmsg) + \
+                                      ALIGN_H((cmsg)->cmsg_len)))))
+
+#define CMSG_DATA(cmsg) ((void*)((u8_t *)(cmsg) + \
+                         ALIGN_D(sizeof(struct cmsghdr))))
+
+#define CMSG_SPACE(length) (ALIGN_D(sizeof(struct cmsghdr)) + \
+                            ALIGN_H(length))
+
+#define CMSG_LEN(length) (ALIGN_D(sizeof(struct cmsghdr)) + \
+                           length)
+
+/* Set socket options argument */
+#define IFNAMSIZ NETIF_NAMESIZE
+struct ifreq {
+  char ifr_name[IFNAMSIZ]; /* Interface name */
+};
+
+/* Socket protocol types (TCP/UDP/RAW) */
+#define SOCK_STREAM     1
+#define SOCK_DGRAM      2
+#define SOCK_RAW        3
+
+/*
+ * Option flags per-socket. These must match the SOF_ flags in ip.h (checked in init.c)
+ */
+#define SO_REUSEADDR   0x0004 /* Allow local address reuse */
+#define SO_KEEPALIVE   0x0008 /* keep connections alive */
+#define SO_BROADCAST   0x0020 /* permit to send and to receive broadcast messages (see IP_SOF_BROADCAST option) */
+
+
+/*
+ * Additional options, not kept in so_options.
+ */
+#define SO_DEBUG        0x0001 /* Unimplemented: turn on debugging info recording */
+#define SO_ACCEPTCONN   0x0002 /* socket has had listen() */
+#define SO_DONTROUTE    0x0010 /* Unimplemented: just use interface addresses */
+#define SO_USELOOPBACK  0x0040 /* Unimplemented: bypass hardware when possible */
+#define SO_LINGER       0x0080 /* linger on close if data present */
+#define SO_DONTLINGER   ((int)(~SO_LINGER))
+#define SO_OOBINLINE    0x0100 /* Unimplemented: leave received OOB data in line */
+#define SO_REUSEPORT    0x0200 /* Unimplemented: allow local address & port reuse */
+#define SO_SNDBUF       0x1001 /* Unimplemented: send buffer size */
+#define SO_RCVBUF       0x1002 /* receive buffer size */
+#define SO_SNDLOWAT     0x1003 /* Unimplemented: send low-water mark */
+#define SO_RCVLOWAT     0x1004 /* Unimplemented: receive low-water mark */
+#define SO_SNDTIMEO     0x1005 /* send timeout */
+#define SO_RCVTIMEO     0x1006 /* receive timeout */
+#define SO_ERROR        0x1007 /* get error status and clear */
+#define SO_TYPE         0x1008 /* get socket type */
+#define SO_CONTIMEO     0x1009 /* Unimplemented: connect timeout */
+#define SO_NO_CHECK     0x100a /* don't create UDP checksum */
+#define SO_BINDTODEVICE 0x100b /* bind to device */
+
+/*
+ * Structure used for manipulating linger option.
+ */
+struct linger {
+  int l_onoff;                /* option on/off */
+  int l_linger;               /* linger time in seconds */
+};
+
+/*
+ * Level number for (get/set)sockopt() to apply to socket itself.
+ */
+#define  SOL_SOCKET  0xfff    /* options for socket level */
+
+
+#define AF_UNSPEC       0
+#define AF_INET         2
+#if LWIP_IPV6
+#define AF_INET6        10
+#else /* LWIP_IPV6 */
+#define AF_INET6        AF_UNSPEC
+#endif /* LWIP_IPV6 */
+#define PF_INET         AF_INET
+#define PF_INET6        AF_INET6
+#define PF_UNSPEC       AF_UNSPEC
+
+#define IPPROTO_IP      0
+#define IPPROTO_ICMP    1
+#define IPPROTO_TCP     6
+#define IPPROTO_UDP     17
+#if LWIP_IPV6
+#define IPPROTO_IPV6    41
+#define IPPROTO_ICMPV6  58
+#endif /* LWIP_IPV6 */
+#define IPPROTO_UDPLITE 136
+#define IPPROTO_RAW     255
+
+/* Flags we can use with send and recv. */
+#define MSG_PEEK       0x01    /* Peeks at an incoming message */
+#define MSG_WAITALL    0x02    /* Unimplemented: Requests that the function block until the full amount of data requested can be returned */
+#define MSG_OOB        0x04    /* Unimplemented: Requests out-of-band data. The significance and semantics of out-of-band data are protocol-specific */
+#define MSG_DONTWAIT   0x08    /* Nonblocking i/o for this operation only */
+#define MSG_MORE       0x10    /* Sender will send more */
+#define MSG_NOSIGNAL   0x20    /* Uninmplemented: Requests not to send the SIGPIPE signal if an attempt to send is made on a stream-oriented socket that is no longer connected. */
+
+
+/*
+ * Options for level IPPROTO_IP
+ */
+#define IP_TOS             1
+#define IP_TTL             2
+#define IP_PKTINFO         8
+
+#if LWIP_TCP
+/*
+ * Options for level IPPROTO_TCP
+ */
+#define TCP_NODELAY    0x01    /* don't delay send to coalesce packets */
+#define TCP_KEEPALIVE  0x02    /* send KEEPALIVE probes when idle for pcb->keep_idle milliseconds */
+#define TCP_KEEPIDLE   0x03    /* set pcb->keep_idle  - Same as TCP_KEEPALIVE, but use seconds for get/setsockopt */
+#define TCP_KEEPINTVL  0x04    /* set pcb->keep_intvl - Use seconds for get/setsockopt */
+#define TCP_KEEPCNT    0x05    /* set pcb->keep_cnt   - Use number of probes sent for get/setsockopt */
+#endif /* LWIP_TCP */
+
+#if LWIP_IPV6
+/*
+ * Options for level IPPROTO_IPV6
+ */
+#define IPV6_CHECKSUM       7  /* RFC3542: calculate and insert the ICMPv6 checksum for raw sockets. */
+#define IPV6_V6ONLY         27 /* RFC3493: boolean control to restrict AF_INET6 sockets to IPv6 communications only. */
+#endif /* LWIP_IPV6 */
+
+#if LWIP_UDP && LWIP_UDPLITE
+/*
+ * Options for level IPPROTO_UDPLITE
+ */
+#define UDPLITE_SEND_CSCOV 0x01 /* sender checksum coverage */
+#define UDPLITE_RECV_CSCOV 0x02 /* minimal receiver checksum coverage */
+#endif /* LWIP_UDP && LWIP_UDPLITE*/
+
+
+#if LWIP_MULTICAST_TX_OPTIONS
+/*
+ * Options and types for UDP multicast traffic handling
+ */
+#define IP_MULTICAST_TTL   5
+#define IP_MULTICAST_IF    6
+#define IP_MULTICAST_LOOP  7
+#endif /* LWIP_MULTICAST_TX_OPTIONS */
+
+#if LWIP_IGMP
+/*
+ * Options and types related to multicast membership
+ */
+#define IP_ADD_MEMBERSHIP  3
+#define IP_DROP_MEMBERSHIP 4
+
+typedef struct ip_mreq {
+    struct in_addr imr_multiaddr; /* IP multicast address of group */
+    struct in_addr imr_interface; /* local IP address of interface */
+} ip_mreq;
+#endif /* LWIP_IGMP */
+
+#if LWIP_IPV4
+struct in_pktinfo {
+  unsigned int   ipi_ifindex;  /* Interface index */
+  struct in_addr ipi_addr;     /* Destination (from header) address */
+};
+#endif /* LWIP_IPV4 */
+
+#if LWIP_IPV6_MLD
+/*
+ * Options and types related to IPv6 multicast membership
+ */
+#define IPV6_JOIN_GROUP      12
+#define IPV6_ADD_MEMBERSHIP  IPV6_JOIN_GROUP
+#define IPV6_LEAVE_GROUP     13
+#define IPV6_DROP_MEMBERSHIP IPV6_LEAVE_GROUP
+
+#if ESP_IPV6
+#define IPV6_MULTICAST_IF    0x300
+#define IPV6_MULTICAST_HOPS  0x301
+#define IPV6_MULTICAST_LOOP  0x302
+#endif
+
+typedef struct ipv6_mreq {
+  struct in6_addr ipv6mr_multiaddr; /*  IPv6 multicast addr */
+  unsigned int    ipv6mr_interface; /*  interface index, or 0 */
+} ipv6_mreq;
+#endif /* LWIP_IPV6_MLD */
+
+/*
+ * The Type of Service provides an indication of the abstract
+ * parameters of the quality of service desired.  These parameters are
+ * to be used to guide the selection of the actual service parameters
+ * when transmitting a datagram through a particular network.  Several
+ * networks offer service precedence, which somehow treats high
+ * precedence traffic as more important than other traffic (generally
+ * by accepting only traffic above a certain precedence at time of high
+ * load).  The major choice is a three way tradeoff between low-delay,
+ * high-reliability, and high-throughput.
+ * The use of the Delay, Throughput, and Reliability indications may
+ * increase the cost (in some sense) of the service.  In many networks
+ * better performance for one of these parameters is coupled with worse
+ * performance on another.  Except for very unusual cases at most two
+ * of these three indications should be set.
+ */
+#define IPTOS_TOS_MASK          0x1E
+#define IPTOS_TOS(tos)          ((tos) & IPTOS_TOS_MASK)
+#define IPTOS_LOWDELAY          0x10
+#define IPTOS_THROUGHPUT        0x08
+#define IPTOS_RELIABILITY       0x04
+#define IPTOS_LOWCOST           0x02
+#define IPTOS_MINCOST           IPTOS_LOWCOST
+
+/*
+ * The Network Control precedence designation is intended to be used
+ * within a network only.  The actual use and control of that
+ * designation is up to each network. The Internetwork Control
+ * designation is intended for use by gateway control originators only.
+ * If the actual use of these precedence designations is of concern to
+ * a particular network, it is the responsibility of that network to
+ * control the access to, and use of, those precedence designations.
+ */
+#define IPTOS_PREC_MASK                 0xe0
+#define IPTOS_PREC(tos)                ((tos) & IPTOS_PREC_MASK)
+#define IPTOS_PREC_NETCONTROL           0xe0
+#define IPTOS_PREC_INTERNETCONTROL      0xc0
+#define IPTOS_PREC_CRITIC_ECP           0xa0
+#define IPTOS_PREC_FLASHOVERRIDE        0x80
+#define IPTOS_PREC_FLASH                0x60
+#define IPTOS_PREC_IMMEDIATE            0x40
+#define IPTOS_PREC_PRIORITY             0x20
+#define IPTOS_PREC_ROUTINE              0x00
+
+
+/*
+ * Commands for ioctlsocket(),  taken from the BSD file fcntl.h.
+ * lwip_ioctl only supports FIONREAD and FIONBIO, for now
+ *
+ * Ioctl's have the command encoded in the lower word,
+ * and the size of any in or out parameters in the upper
+ * word.  The high 2 bits of the upper word are used
+ * to encode the in/out status of the parameter; for now
+ * we restrict parameters to at most 128 bytes.
+ */
+#if !defined(FIONREAD) || !defined(FIONBIO)
+#define IOCPARM_MASK    0x7fU           /* parameters must be < 128 bytes */
+#define IOC_VOID        0x20000000UL    /* no parameters */
+#define IOC_OUT         0x40000000UL    /* copy out parameters */
+#define IOC_IN          0x80000000UL    /* copy in parameters */
+#define IOC_INOUT       (IOC_IN|IOC_OUT)
+                                        /* 0x20000000 distinguishes new &
+                                           old ioctl's */
+#define _IO(x,y)        ((long)(IOC_VOID|((x)<<8)|(y)))
+
+#define _IOR(x,y,t)     ((long)(IOC_OUT|((sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)))
+
+#define _IOW(x,y,t)     ((long)(IOC_IN|((sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)))
+#endif /* !defined(FIONREAD) || !defined(FIONBIO) */
+
+#ifndef FIONREAD
+#define FIONREAD    _IOR('f', 127, unsigned long) /* get # bytes to read */
+#endif
+#ifndef FIONBIO
+#define FIONBIO     _IOW('f', 126, unsigned long) /* set/clear non-blocking i/o */
+#endif
+
+/* Socket I/O Controls: unimplemented */
+#ifndef SIOCSHIWAT
+#define SIOCSHIWAT  _IOW('s',  0, unsigned long)  /* set high watermark */
+#define SIOCGHIWAT  _IOR('s',  1, unsigned long)  /* get high watermark */
+#define SIOCSLOWAT  _IOW('s',  2, unsigned long)  /* set low watermark */
+#define SIOCGLOWAT  _IOR('s',  3, unsigned long)  /* get low watermark */
+#define SIOCATMARK  _IOR('s',  7, unsigned long)  /* at oob mark? */
+#endif
+
+/* commands for fnctl */
+#ifndef F_GETFL
+#define F_GETFL 3
+#endif
+#ifndef F_SETFL
+#define F_SETFL 4
+#endif
+
+/* File status flags and file access modes for fnctl,
+   these are bits in an int. */
+#ifndef O_NONBLOCK
+#define O_NONBLOCK  1 /* nonblocking I/O */
+#endif
+#ifndef O_NDELAY
+#define O_NDELAY    O_NONBLOCK /* same as O_NONBLOCK, for compatibility */
+#endif
+#ifndef O_RDONLY
+#define O_RDONLY    2
+#endif
+#ifndef O_WRONLY
+#define O_WRONLY    4
+#endif
+#ifndef O_RDWR
+#define O_RDWR      (O_RDONLY|O_WRONLY)
+#endif
+
+#ifndef SHUT_RD
+  #define SHUT_RD   0
+  #define SHUT_WR   1
+  #define SHUT_RDWR 2
+#endif
+
+/* FD_SET used for lwip_select */
+#ifndef FD_SET
+#undef  FD_SETSIZE
+/* Make FD_SETSIZE match NUM_SOCKETS in socket.c */
+#define FD_SETSIZE    MEMP_NUM_NETCONN
+#define LWIP_SELECT_MAXNFDS (FD_SETSIZE + LWIP_SOCKET_OFFSET)
+#define FDSETSAFESET(n, code) do { \
+  if (((n) - LWIP_SOCKET_OFFSET < MEMP_NUM_NETCONN) && (((int)(n) - LWIP_SOCKET_OFFSET) >= 0)) { \
+  code; }} while(0)
+#define FDSETSAFEGET(n, code) (((n) - LWIP_SOCKET_OFFSET < MEMP_NUM_NETCONN) && (((int)(n) - LWIP_SOCKET_OFFSET) >= 0) ?\
+  (code) : 0)
+#define FD_SET(n, p)  FDSETSAFESET(n, (p)->fd_bits[((n)-LWIP_SOCKET_OFFSET)/8] = (u8_t)((p)->fd_bits[((n)-LWIP_SOCKET_OFFSET)/8] |  (1 << (((n)-LWIP_SOCKET_OFFSET) & 7))))
+#define FD_CLR(n, p)  FDSETSAFESET(n, (p)->fd_bits[((n)-LWIP_SOCKET_OFFSET)/8] = (u8_t)((p)->fd_bits[((n)-LWIP_SOCKET_OFFSET)/8] & ~(1 << (((n)-LWIP_SOCKET_OFFSET) & 7))))
+#define FD_ISSET(n,p) FDSETSAFEGET(n, (p)->fd_bits[((n)-LWIP_SOCKET_OFFSET)/8] &   (1 << (((n)-LWIP_SOCKET_OFFSET) & 7)))
+#define FD_ZERO(p)    memset((void*)(p), 0, sizeof(*(p)))
+
+typedef struct fd_set
+{
+  unsigned char fd_bits [(FD_SETSIZE+7)/8];
+} fd_set;
+
+#elif FD_SETSIZE < (LWIP_SOCKET_OFFSET + MEMP_NUM_NETCONN)
+#error "external FD_SETSIZE too small for number of sockets"
+#else
+#define LWIP_SELECT_MAXNFDS FD_SETSIZE
+#endif /* FD_SET */
+
+/* poll-related defines and types */
+/* @todo: find a better way to guard the definition of these defines and types if already defined */
+#if !defined(POLLIN) && !defined(POLLOUT)
+#define POLLIN     0x1
+#define POLLOUT    0x2
+#define POLLERR    0x4
+#define POLLNVAL   0x8
+/* Below values are unimplemented */
+#define POLLRDNORM 0x10
+#define POLLRDBAND 0x20
+#define POLLPRI    0x40
+#define POLLWRNORM 0x80
+#define POLLWRBAND 0x100
+#define POLLHUP    0x200
+#ifdef NO_POLLFD
+typedef unsigned int nfds_t;
+struct pollfd
+{
+  int fd;
+  short events;
+  short revents;
+};
+#endif/* NO_POLLFD*/
+#endif
+
+/** LWIP_TIMEVAL_PRIVATE: if you want to use the struct timeval provided
+ * by your system, set this to 0 and include <sys/time.h> in cc.h */
+#ifndef LWIP_TIMEVAL_PRIVATE
+#define LWIP_TIMEVAL_PRIVATE 1
+#endif
+
+#if LWIP_TIMEVAL_PRIVATE
+struct timeval {
+  long    tv_sec;         /* seconds */
+  long    tv_usec;        /* and microseconds */
+};
+#endif /* LWIP_TIMEVAL_PRIVATE */
+
+#define lwip_socket_init() /* Compatibility define, no init needed. */
+void lwip_socket_thread_init(void); /* LWIP_NETCONN_SEM_PER_THREAD==1: initialize thread-local semaphore */
+void lwip_socket_thread_cleanup(void); /* LWIP_NETCONN_SEM_PER_THREAD==1: destroy thread-local semaphore */
+
+#if LWIP_COMPAT_SOCKETS == 2
+/* This helps code parsers/code completion by not having the COMPAT functions as defines */
+#define lwip_accept       accept
+#define lwip_bind         bind
+#define lwip_shutdown     shutdown
+#define lwip_getpeername  getpeername
+#define lwip_getsockname  getsockname
+#define lwip_setsockopt   setsockopt
+#define lwip_getsockopt   getsockopt
+#define lwip_close        closesocket
+#define lwip_connect      connect
+#define lwip_listen       listen
+#define lwip_recv         recv
+#define lwip_recvmsg      recvmsg
+#define lwip_recvfrom     recvfrom
+#define lwip_send         send
+#define lwip_sendmsg      sendmsg
+#define lwip_sendto       sendto
+#define lwip_socket       socket
+#if LWIP_SOCKET_SELECT
+#define lwip_select       select
+#endif
+#if LWIP_SOCKET_POLL
+#define lwip_poll         poll
+#endif
+#define lwip_ioctl        ioctlsocket
+#define lwip_inet_ntop    inet_ntop
+#define lwip_inet_pton    inet_pton
+
+#if LWIP_POSIX_SOCKETS_IO_NAMES
+#define lwip_read         read
+#define lwip_readv        readv
+#define lwip_write        write
+#define lwip_writev       writev
+#undef lwip_close
+#define lwip_close        close
+#define closesocket(s)    close(s)
+int fcntl(int s, int cmd, ...);
+#undef lwip_ioctl
+#define lwip_ioctl        ioctl
+#define ioctlsocket       ioctl
+#endif /* LWIP_POSIX_SOCKETS_IO_NAMES */
+#endif /* LWIP_COMPAT_SOCKETS == 2 */
+
+int lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen);
+int lwip_bind(int s, const struct sockaddr *name, socklen_t namelen);
+int lwip_shutdown(int s, int how);
+int lwip_getpeername (int s, struct sockaddr *name, socklen_t *namelen);
+int lwip_getsockname (int s, struct sockaddr *name, socklen_t *namelen);
+int lwip_getsockopt (int s, int level, int optname, void *optval, socklen_t *optlen);
+int lwip_setsockopt (int s, int level, int optname, const void *optval, socklen_t optlen);
+int lwip_close(int s);
+int lwip_connect(int s, const struct sockaddr *name, socklen_t namelen);
+int lwip_listen(int s, int backlog);
+ssize_t lwip_recv(int s, void *mem, size_t len, int flags);
+ssize_t lwip_read(int s, void *mem, size_t len);
+ssize_t lwip_readv(int s, const struct iovec *iov, int iovcnt);
+ssize_t lwip_recvfrom(int s, void *mem, size_t len, int flags,
+      struct sockaddr *from, socklen_t *fromlen);
+ssize_t lwip_recvmsg(int s, struct msghdr *message, int flags);
+ssize_t lwip_send(int s, const void *dataptr, size_t size, int flags);
+ssize_t lwip_sendmsg(int s, const struct msghdr *message, int flags);
+ssize_t lwip_sendto(int s, const void *dataptr, size_t size, int flags,
+    const struct sockaddr *to, socklen_t tolen);
+int lwip_socket(int domain, int type, int protocol);
+ssize_t lwip_write(int s, const void *dataptr, size_t size);
+ssize_t lwip_writev(int s, const struct iovec *iov, int iovcnt);
+#if LWIP_SOCKET_SELECT
+int lwip_select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset,
+                struct timeval *timeout);
+#endif
+#if LWIP_SOCKET_POLL
+int lwip_poll(struct pollfd *fds, nfds_t nfds, int timeout);
+#endif
+int lwip_ioctl(int s, long cmd, void *argp);
+int lwip_fcntl(int s, int cmd, int val);
+const char *lwip_inet_ntop(int af, const void *src, char *dst, socklen_t size);
+int lwip_inet_pton(int af, const char *src, void *dst);
+
+#if LWIP_COMPAT_SOCKETS
+#if LWIP_COMPAT_SOCKETS != 2
+
+#if ESP_SOCKET
+static inline int accept(int s,struct sockaddr *addr,socklen_t *addrlen)
+{ return lwip_accept(s,addr,addrlen); }
+static inline int bind(int s,const struct sockaddr *name, socklen_t namelen)
+{ return lwip_bind(s,name,namelen); }
+static inline int shutdown(int s,int how)
+{ return lwip_shutdown(s,how); }
+static inline int getpeername(int s,struct sockaddr *name,socklen_t *namelen)
+{ return lwip_getpeername(s,name,namelen); }
+static inline int getsockname(int s,struct sockaddr *name,socklen_t *namelen)
+{ return lwip_getsockname(s,name,namelen); }
+static inline int setsockopt(int s,int level,int optname,const void *opval,socklen_t optlen)
+{ return lwip_setsockopt(s,level,optname,opval,optlen); }
+static inline int getsockopt(int s,int level,int optname,void *opval,socklen_t *optlen)
+{ return lwip_getsockopt(s,level,optname,opval,optlen); }
+static inline int closesocket(int s)
+{ return lwip_close(s); }
+static inline int connect(int s,const struct sockaddr *name,socklen_t namelen)
+{ return lwip_connect(s,name,namelen); }
+static inline int listen(int s,int backlog)
+{ return lwip_listen(s,backlog); }
+static inline ssize_t recvmsg(int sockfd, struct msghdr *msg, int flags)
+{ return lwip_recvmsg(sockfd, msg, flags); } 
+static inline ssize_t recv(int s,void *mem,size_t len,int flags)
+{ return lwip_recv(s,mem,len,flags); }
+static inline ssize_t recvfrom(int s,void *mem,size_t len,int flags,struct sockaddr *from,socklen_t *fromlen)
+{ return lwip_recvfrom(s,mem,len,flags,from,fromlen); }
+static inline ssize_t send(int s,const void *dataptr,size_t size,int flags)
+{ return lwip_send(s,dataptr,size,flags); }
+static inline ssize_t sendmsg(int s,const struct msghdr *message,int flags)
+{ return lwip_sendmsg(s,message,flags); }
+static inline ssize_t sendto(int s,const void *dataptr,size_t size,int flags,const struct sockaddr *to,socklen_t tolen)
+{ return lwip_sendto(s,dataptr,size,flags,to,tolen); }
+static inline int socket(int domain,int type,int protocol)
+{ return lwip_socket(domain,type,protocol); }
+#ifndef ESP_HAS_SELECT
+static inline int select(int maxfdp1,fd_set *readset,fd_set *writeset,fd_set *exceptset,struct timeval *timeout)
+{ return lwip_select(maxfdp1,readset,writeset,exceptset,timeout); }
+#endif /* ESP_HAS_SELECT */
+static inline int ioctlsocket(int s,long cmd,void *argp)
+{ return lwip_ioctl(s,cmd,argp); }
+
+#if LWIP_POSIX_SOCKETS_IO_NAMES
+static inline ssize_t read(int s,void *mem,size_t len)
+{ return lwip_read(s,mem,len); }
+static inline ssize_t write(int s,const void *dataptr,size_t len)
+{ return lwip_write(s,dataptr,len); }
+static inline ssize_t writev(int s,const struct iovec *iov,int iovcnt)
+{ return lwip_writev(s,iov,iovcnt); }
+static inline int close(int s)
+{ return lwip_close(s); }
+static inline int fcntl(int s,int cmd,int val)
+{ return lwip_fcntl(s,cmd,val); }
+static inline int ioctl(int s,long cmd,void *argp)
+{ return lwip_ioctl(s,cmd,argp); }
+#endif /* LWIP_POSIX_SOCKETS_IO_NAMES */
+
+#else
+
+/** @ingroup socket */
+#define accept(s,addr,addrlen)                    lwip_accept(s,addr,addrlen)
+/** @ingroup socket */
+#define bind(s,name,namelen)                      lwip_bind(s,name,namelen)
+/** @ingroup socket */
+#define shutdown(s,how)                           lwip_shutdown(s,how)
+/** @ingroup socket */
+#define getpeername(s,name,namelen)               lwip_getpeername(s,name,namelen)
+/** @ingroup socket */
+#define getsockname(s,name,namelen)               lwip_getsockname(s,name,namelen)
+/** @ingroup socket */
+#define setsockopt(s,level,optname,opval,optlen)  lwip_setsockopt(s,level,optname,opval,optlen)
+/** @ingroup socket */
+#define getsockopt(s,level,optname,opval,optlen)  lwip_getsockopt(s,level,optname,opval,optlen)
+/** @ingroup socket */
+#define closesocket(s)                            lwip_close(s)
+/** @ingroup socket */
+#define connect(s,name,namelen)                   lwip_connect(s,name,namelen)
+/** @ingroup socket */
+#define listen(s,backlog)                         lwip_listen(s,backlog)
+/** @ingroup socket */
+#define recv(s,mem,len,flags)                     lwip_recv(s,mem,len,flags)
+/** @ingroup socket */
+#define recvmsg(s,message,flags)                  lwip_recvmsg(s,message,flags)
+/** @ingroup socket */
+#define recvfrom(s,mem,len,flags,from,fromlen)    lwip_recvfrom(s,mem,len,flags,from,fromlen)
+/** @ingroup socket */
+#define send(s,dataptr,size,flags)                lwip_send(s,dataptr,size,flags)
+/** @ingroup socket */
+#define sendmsg(s,message,flags)                  lwip_sendmsg(s,message,flags)
+/** @ingroup socket */
+#define sendto(s,dataptr,size,flags,to,tolen)     lwip_sendto(s,dataptr,size,flags,to,tolen)
+/** @ingroup socket */
+#define socket(domain,type,protocol)              lwip_socket(domain,type,protocol)
+#if LWIP_SOCKET_SELECT
+/** @ingroup socket */
+#define select(maxfdp1,readset,writeset,exceptset,timeout)     lwip_select(maxfdp1,readset,writeset,exceptset,timeout)
+#endif
+#if LWIP_SOCKET_POLL
+/** @ingroup socket */
+#define poll(fds,nfds,timeout)                    lwip_poll(fds,nfds,timeout)
+#endif
+/** @ingroup socket */
+#define ioctlsocket(s,cmd,argp)                   lwip_ioctl(s,cmd,argp)
+
+#if LWIP_POSIX_SOCKETS_IO_NAMES
+/** @ingroup socket */
+#define read(s,mem,len)                           lwip_read(s,mem,len)
+/** @ingroup socket */
+#define readv(s,iov,iovcnt)                       lwip_readv(s,iov,iovcnt)
+/** @ingroup socket */
+#define write(s,dataptr,len)                      lwip_write(s,dataptr,len)
+/** @ingroup socket */
+#define writev(s,iov,iovcnt)                      lwip_writev(s,iov,iovcnt)
+/** @ingroup socket */
+#define close(s)                                  lwip_close(s)
+/** @ingroup socket */
+#define fcntl(s,cmd,val)                          lwip_fcntl(s,cmd,val)
+/** @ingroup socket */
+#define ioctl(s,cmd,argp)                         lwip_ioctl(s,cmd,argp)
+#endif /* LWIP_POSIX_SOCKETS_IO_NAMES */
+
+#endif /* ESP_SOCKET */
+#endif /* LWIP_COMPAT_SOCKETS != 2 */
+
+#if ESP_SOCKET                                                          
+#if LWIP_COMPAT_SOCKET_INET == 1
+/* Some libraries have problems with inet_... being macros, so please use this define 
+   to declare normal functions */
+static inline const char *inet_ntop(int af, const void *src, char *dst, socklen_t size)
+{ return lwip_inet_ntop(af, src, dst, size);  }
+static inline int inet_pton(int af, const char *src, void *dst)
+{ return lwip_inet_pton(af, src, dst); }   
+#else
+/* By default fall back to original inet_... macros */
+# define inet_ntop(a,b,c,d) lwip_inet_ntop(a,b,c,d) 
+# define inet_pton(a,b,c)   lwip_inet_pton(a,b,c)   
+#endif /* LWIP_COMPAT_SOCKET_INET */
+
+#endif /* ESP_SOCKET */
+#endif /* LWIP_COMPAT_SOCKETS */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_SOCKET */
+
+#endif /* LWIP_HDR_SOCKETS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/stats.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/stats.h
new file mode 100644
index 00000000000..b570dbacf58
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/stats.h
@@ -0,0 +1,491 @@
+/**
+ * @file
+ * Statistics API (to be used from TCPIP thread)
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_STATS_H
+#define LWIP_HDR_STATS_H
+
+#include "lwip/opt.h"
+
+#include "lwip/mem.h"
+#include "lwip/memp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_STATS
+
+#ifndef LWIP_STATS_LARGE
+#define LWIP_STATS_LARGE 0
+#endif
+
+#if LWIP_STATS_LARGE
+#define STAT_COUNTER     u32_t
+#define STAT_COUNTER_F   U32_F
+#else
+#define STAT_COUNTER     u16_t
+#define STAT_COUNTER_F   U16_F
+#endif
+
+/** Protocol related stats */
+struct stats_proto {
+  STAT_COUNTER xmit;             /* Transmitted packets. */
+  STAT_COUNTER recv;             /* Received packets. */
+  STAT_COUNTER fw;               /* Forwarded packets. */
+  STAT_COUNTER drop;             /* Dropped packets. */
+  STAT_COUNTER chkerr;           /* Checksum error. */
+  STAT_COUNTER lenerr;           /* Invalid length error. */
+  STAT_COUNTER memerr;           /* Out of memory error. */
+  STAT_COUNTER rterr;            /* Routing error. */
+  STAT_COUNTER proterr;          /* Protocol error. */
+  STAT_COUNTER opterr;           /* Error in options. */
+  STAT_COUNTER err;              /* Misc error. */
+  STAT_COUNTER cachehit;
+};
+
+/** IGMP stats */
+struct stats_igmp {
+  STAT_COUNTER xmit;             /* Transmitted packets. */
+  STAT_COUNTER recv;             /* Received packets. */
+  STAT_COUNTER drop;             /* Dropped packets. */
+  STAT_COUNTER chkerr;           /* Checksum error. */
+  STAT_COUNTER lenerr;           /* Invalid length error. */
+  STAT_COUNTER memerr;           /* Out of memory error. */
+  STAT_COUNTER proterr;          /* Protocol error. */
+  STAT_COUNTER rx_v1;            /* Received v1 frames. */
+  STAT_COUNTER rx_group;         /* Received group-specific queries. */
+  STAT_COUNTER rx_general;       /* Received general queries. */
+  STAT_COUNTER rx_report;        /* Received reports. */
+  STAT_COUNTER tx_join;          /* Sent joins. */
+  STAT_COUNTER tx_leave;         /* Sent leaves. */
+  STAT_COUNTER tx_report;        /* Sent reports. */
+};
+
+/** Memory stats */
+struct stats_mem {
+#if defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY
+  const char *name;
+#endif /* defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY */
+  STAT_COUNTER err;
+  mem_size_t avail;
+  mem_size_t used;
+  mem_size_t max;
+  STAT_COUNTER illegal;
+};
+
+/** System element stats */
+struct stats_syselem {
+  STAT_COUNTER used;
+  STAT_COUNTER max;
+  STAT_COUNTER err;
+};
+
+/** System stats */
+struct stats_sys {
+  struct stats_syselem sem;
+  struct stats_syselem mutex;
+  struct stats_syselem mbox;
+};
+
+/** SNMP MIB2 stats */
+struct stats_mib2 {
+  /* IP */
+  u32_t ipinhdrerrors;
+  u32_t ipinaddrerrors;
+  u32_t ipinunknownprotos;
+  u32_t ipindiscards;
+  u32_t ipindelivers;
+  u32_t ipoutrequests;
+  u32_t ipoutdiscards;
+  u32_t ipoutnoroutes;
+  u32_t ipreasmoks;
+  u32_t ipreasmfails;
+  u32_t ipfragoks;
+  u32_t ipfragfails;
+  u32_t ipfragcreates;
+  u32_t ipreasmreqds;
+  u32_t ipforwdatagrams;
+  u32_t ipinreceives;
+
+  /* TCP */
+  u32_t tcpactiveopens;
+  u32_t tcppassiveopens;
+  u32_t tcpattemptfails;
+  u32_t tcpestabresets;
+  u32_t tcpoutsegs;
+  u32_t tcpretranssegs;
+  u32_t tcpinsegs;
+  u32_t tcpinerrs;
+  u32_t tcpoutrsts;
+
+  /* UDP */
+  u32_t udpindatagrams;
+  u32_t udpnoports;
+  u32_t udpinerrors;
+  u32_t udpoutdatagrams;
+
+  /* ICMP */
+  u32_t icmpinmsgs;
+  u32_t icmpinerrors;
+  u32_t icmpindestunreachs;
+  u32_t icmpintimeexcds;
+  u32_t icmpinparmprobs;
+  u32_t icmpinsrcquenchs;
+  u32_t icmpinredirects;
+  u32_t icmpinechos;
+  u32_t icmpinechoreps;
+  u32_t icmpintimestamps;
+  u32_t icmpintimestampreps;
+  u32_t icmpinaddrmasks;
+  u32_t icmpinaddrmaskreps;
+  u32_t icmpoutmsgs;
+  u32_t icmpouterrors;
+  u32_t icmpoutdestunreachs;
+  u32_t icmpouttimeexcds;
+  u32_t icmpoutechos; /* can be incremented by user application ('ping') */
+  u32_t icmpoutechoreps;
+};
+
+/**
+ * @ingroup netif_mib2
+ * SNMP MIB2 interface stats
+ */
+struct stats_mib2_netif_ctrs {
+  /** The total number of octets received on the interface, including framing characters */
+  u32_t ifinoctets;
+  /** The number of packets, delivered by this sub-layer to a higher (sub-)layer, which were
+   * not addressed to a multicast or broadcast address at this sub-layer */
+  u32_t ifinucastpkts;
+  /** The number of packets, delivered by this sub-layer to a higher (sub-)layer, which were
+   * addressed to a multicast or broadcast address at this sub-layer */
+  u32_t ifinnucastpkts;
+  /** The number of inbound packets which were chosen to be discarded even though no errors had
+   * been detected to prevent their being deliverable to a higher-layer protocol. One possible
+   * reason for discarding such a packet could be to free up buffer space */
+  u32_t ifindiscards;
+  /** For packet-oriented interfaces, the number of inbound packets that contained errors
+   * preventing them from being deliverable to a higher-layer protocol.  For character-
+   * oriented or fixed-length interfaces, the number of inbound transmission units that
+   * contained errors preventing them from being deliverable to a higher-layer protocol. */
+  u32_t ifinerrors;
+  /** For packet-oriented interfaces, the number of packets received via the interface which
+   * were discarded because of an unknown or unsupported protocol.  For character-oriented
+   * or fixed-length interfaces that support protocol multiplexing the number of transmission
+   * units received via the interface which were discarded because of an unknown or unsupported
+   * protocol. For any interface that does not support protocol multiplexing, this counter will
+   * always be 0 */
+  u32_t ifinunknownprotos;
+  /** The total number of octets transmitted out of the interface, including framing characters. */
+  u32_t ifoutoctets;
+  /** The total number of packets that higher-level protocols requested be transmitted, and
+   * which were not addressed to a multicast or broadcast address at this sub-layer, including
+   * those that were discarded or not sent. */
+  u32_t ifoutucastpkts;
+  /** The total number of packets that higher-level protocols requested be transmitted, and which
+   * were addressed to a multicast or broadcast address at this sub-layer, including
+   * those that were discarded or not sent. */
+  u32_t ifoutnucastpkts;
+  /** The number of outbound packets which were chosen to be discarded even though no errors had
+   * been detected to prevent their being transmitted.  One possible reason for discarding
+   * such a packet could be to free up buffer space. */
+  u32_t ifoutdiscards;
+  /** For packet-oriented interfaces, the number of outbound packets that could not be transmitted
+   * because of errors. For character-oriented or fixed-length interfaces, the number of outbound
+   * transmission units that could not be transmitted because of errors. */
+  u32_t ifouterrors;
+};
+
+/** lwIP stats container */
+struct stats_ {
+#if LINK_STATS
+  /** Link level */
+  struct stats_proto link;
+#endif
+#if ETHARP_STATS
+  /** ARP */
+  struct stats_proto etharp;
+#endif
+#if IPFRAG_STATS
+  /** Fragmentation */
+  struct stats_proto ip_frag;
+#endif
+#if IP_STATS
+  /** IP */
+  struct stats_proto ip;
+#endif
+#if ICMP_STATS
+  /** ICMP */
+  struct stats_proto icmp;
+#endif
+#if IGMP_STATS
+  /** IGMP */
+  struct stats_igmp igmp;
+#endif
+#if UDP_STATS
+  /** UDP */
+  struct stats_proto udp;
+#endif
+#if TCP_STATS
+  /** TCP */
+  struct stats_proto tcp;
+#endif
+#if MEM_STATS
+  /** Heap */
+  struct stats_mem mem;
+#endif
+#if MEMP_STATS
+  /** Internal memory pools */
+  struct stats_mem *memp[MEMP_MAX];
+#endif
+#if SYS_STATS
+  /** System */
+  struct stats_sys sys;
+#endif
+#if IP6_STATS
+  /** IPv6 */
+  struct stats_proto ip6;
+#endif
+#if ICMP6_STATS
+  /** ICMP6 */
+  struct stats_proto icmp6;
+#endif
+#if IP6_FRAG_STATS
+  /** IPv6 fragmentation */
+  struct stats_proto ip6_frag;
+#endif
+#if MLD6_STATS
+  /** Multicast listener discovery */
+  struct stats_igmp mld6;
+#endif
+#if ND6_STATS
+  /** Neighbor discovery */
+  struct stats_proto nd6;
+#endif
+#if MIB2_STATS
+  /** SNMP MIB2 */
+  struct stats_mib2 mib2;
+#endif
+};
+
+/** Global variable containing lwIP internal statistics. Add this to your debugger's watchlist. */
+extern struct stats_ lwip_stats;
+
+/** Init statistics */
+void stats_init(void);
+
+#define STATS_INC(x) ++lwip_stats.x
+#define STATS_DEC(x) --lwip_stats.x
+#define STATS_INC_USED(x, y, type) do { lwip_stats.x.used = (type)(lwip_stats.x.used + y); \
+                                if (lwip_stats.x.max < lwip_stats.x.used) { \
+                                    lwip_stats.x.max = lwip_stats.x.used; \
+                                } \
+                             } while(0)
+#define STATS_GET(x) lwip_stats.x
+#else /* LWIP_STATS */
+#define stats_init()
+#define STATS_INC(x)
+#define STATS_DEC(x)
+#define STATS_INC_USED(x, y, type)
+#endif /* LWIP_STATS */
+
+#if TCP_STATS
+#define TCP_STATS_INC(x) STATS_INC(x)
+#define TCP_STATS_DISPLAY() stats_display_proto(&lwip_stats.tcp, "TCP")
+#else
+#define TCP_STATS_INC(x)
+#define TCP_STATS_DISPLAY()
+#endif
+
+#if UDP_STATS
+#define UDP_STATS_INC(x) STATS_INC(x)
+#define UDP_STATS_DISPLAY() stats_display_proto(&lwip_stats.udp, "UDP")
+#else
+#define UDP_STATS_INC(x)
+#define UDP_STATS_DISPLAY()
+#endif
+
+#if ICMP_STATS
+#define ICMP_STATS_INC(x) STATS_INC(x)
+#define ICMP_STATS_DISPLAY() stats_display_proto(&lwip_stats.icmp, "ICMP")
+#else
+#define ICMP_STATS_INC(x)
+#define ICMP_STATS_DISPLAY()
+#endif
+
+#if IGMP_STATS
+#define IGMP_STATS_INC(x) STATS_INC(x)
+#define IGMP_STATS_DISPLAY() stats_display_igmp(&lwip_stats.igmp, "IGMP")
+#else
+#define IGMP_STATS_INC(x)
+#define IGMP_STATS_DISPLAY()
+#endif
+
+#if IP_STATS
+#define IP_STATS_INC(x) STATS_INC(x)
+#define IP_STATS_DISPLAY() stats_display_proto(&lwip_stats.ip, "IP")
+#else
+#define IP_STATS_INC(x)
+#define IP_STATS_DISPLAY()
+#endif
+
+#if IPFRAG_STATS
+#define IPFRAG_STATS_INC(x) STATS_INC(x)
+#define IPFRAG_STATS_DISPLAY() stats_display_proto(&lwip_stats.ip_frag, "IP_FRAG")
+#else
+#define IPFRAG_STATS_INC(x)
+#define IPFRAG_STATS_DISPLAY()
+#endif
+
+#if ETHARP_STATS
+#define ETHARP_STATS_INC(x) STATS_INC(x)
+#define ETHARP_STATS_DISPLAY() stats_display_proto(&lwip_stats.etharp, "ETHARP")
+#else
+#define ETHARP_STATS_INC(x)
+#define ETHARP_STATS_DISPLAY()
+#endif
+
+#if LINK_STATS
+#define LINK_STATS_INC(x) STATS_INC(x)
+#define LINK_STATS_DISPLAY() stats_display_proto(&lwip_stats.link, "LINK")
+#else
+#define LINK_STATS_INC(x)
+#define LINK_STATS_DISPLAY()
+#endif
+
+#if MEM_STATS
+#define MEM_STATS_AVAIL(x, y) lwip_stats.mem.x = y
+#define MEM_STATS_INC(x) STATS_INC(mem.x)
+#define MEM_STATS_INC_USED(x, y) STATS_INC_USED(mem, y, mem_size_t)
+#define MEM_STATS_DEC_USED(x, y) lwip_stats.mem.x = (mem_size_t)((lwip_stats.mem.x) - (y))
+#define MEM_STATS_DISPLAY() stats_display_mem(&lwip_stats.mem, "HEAP")
+#else
+#define MEM_STATS_AVAIL(x, y)
+#define MEM_STATS_INC(x)
+#define MEM_STATS_INC_USED(x, y)
+#define MEM_STATS_DEC_USED(x, y)
+#define MEM_STATS_DISPLAY()
+#endif
+
+ #if MEMP_STATS
+#define MEMP_STATS_DEC(x, i) STATS_DEC(memp[i]->x)
+#define MEMP_STATS_DISPLAY(i) stats_display_memp(lwip_stats.memp[i], i)
+#define MEMP_STATS_GET(x, i) STATS_GET(memp[i]->x)
+ #else
+#define MEMP_STATS_DEC(x, i)
+#define MEMP_STATS_DISPLAY(i)
+#define MEMP_STATS_GET(x, i) 0
+#endif
+
+#if SYS_STATS
+#define SYS_STATS_INC(x) STATS_INC(sys.x)
+#define SYS_STATS_DEC(x) STATS_DEC(sys.x)
+#define SYS_STATS_INC_USED(x) STATS_INC_USED(sys.x, 1, STAT_COUNTER)
+#define SYS_STATS_DISPLAY() stats_display_sys(&lwip_stats.sys)
+#else
+#define SYS_STATS_INC(x)
+#define SYS_STATS_DEC(x)
+#define SYS_STATS_INC_USED(x)
+#define SYS_STATS_DISPLAY()
+#endif
+
+#if IP6_STATS
+#define IP6_STATS_INC(x) STATS_INC(x)
+#define IP6_STATS_DISPLAY() stats_display_proto(&lwip_stats.ip6, "IPv6")
+#else
+#define IP6_STATS_INC(x)
+#define IP6_STATS_DISPLAY()
+#endif
+
+#if ICMP6_STATS
+#define ICMP6_STATS_INC(x) STATS_INC(x)
+#define ICMP6_STATS_DISPLAY() stats_display_proto(&lwip_stats.icmp6, "ICMPv6")
+#else
+#define ICMP6_STATS_INC(x)
+#define ICMP6_STATS_DISPLAY()
+#endif
+
+#if IP6_FRAG_STATS
+#define IP6_FRAG_STATS_INC(x) STATS_INC(x)
+#define IP6_FRAG_STATS_DISPLAY() stats_display_proto(&lwip_stats.ip6_frag, "IPv6 FRAG")
+#else
+#define IP6_FRAG_STATS_INC(x)
+#define IP6_FRAG_STATS_DISPLAY()
+#endif
+
+#if MLD6_STATS
+#define MLD6_STATS_INC(x) STATS_INC(x)
+#define MLD6_STATS_DISPLAY() stats_display_igmp(&lwip_stats.mld6, "MLDv1")
+#else
+#define MLD6_STATS_INC(x)
+#define MLD6_STATS_DISPLAY()
+#endif
+
+#if ND6_STATS
+#define ND6_STATS_INC(x) STATS_INC(x)
+#define ND6_STATS_DISPLAY() stats_display_proto(&lwip_stats.nd6, "ND")
+#else
+#define ND6_STATS_INC(x)
+#define ND6_STATS_DISPLAY()
+#endif
+
+#if MIB2_STATS
+#define MIB2_STATS_INC(x) STATS_INC(x)
+#else
+#define MIB2_STATS_INC(x)
+#endif
+
+/* Display of statistics */
+#if LWIP_STATS_DISPLAY
+void stats_display(void);
+void stats_display_proto(struct stats_proto *proto, const char *name);
+void stats_display_igmp(struct stats_igmp *igmp, const char *name);
+void stats_display_mem(struct stats_mem *mem, const char *name);
+void stats_display_memp(struct stats_mem *mem, int index);
+void stats_display_sys(struct stats_sys *sys);
+#else /* LWIP_STATS_DISPLAY */
+#define stats_display()
+#define stats_display_proto(proto, name)
+#define stats_display_igmp(igmp, name)
+#define stats_display_mem(mem, name)
+#define stats_display_memp(mem, index)
+#define stats_display_sys(sys)
+#endif /* LWIP_STATS_DISPLAY */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_STATS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/sys.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/sys.h
new file mode 100644
index 00000000000..705eddbcecd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/sys.h
@@ -0,0 +1,586 @@
+/**
+ * @file
+ * OS abstraction layer
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ */
+
+#ifndef LWIP_HDR_SYS_H
+#define LWIP_HDR_SYS_H
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if NO_SYS
+
+/* For a totally minimal and standalone system, we provide null
+   definitions of the sys_ functions. */
+typedef u8_t sys_sem_t;
+typedef u8_t sys_mutex_t;
+typedef u8_t sys_mbox_t;
+
+#define sys_sem_new(s, c) ERR_OK
+#define sys_sem_signal(s)
+#define sys_sem_wait(s)
+#define sys_arch_sem_wait(s,t)
+#define sys_sem_free(s)
+#define sys_sem_valid(s) 0
+#define sys_sem_valid_val(s) 0
+#define sys_sem_set_invalid(s)
+#define sys_sem_set_invalid_val(s)
+#define sys_mutex_new(mu) ERR_OK
+#define sys_mutex_lock(mu)
+#define sys_mutex_unlock(mu)
+#define sys_mutex_free(mu)
+#define sys_mutex_valid(mu) 0
+#define sys_mutex_set_invalid(mu)
+#define sys_mbox_new(m, s) ERR_OK
+#define sys_mbox_fetch(m,d)
+#define sys_mbox_tryfetch(m,d)
+#define sys_mbox_post(m,d)
+#define sys_mbox_trypost(m,d)
+#define sys_mbox_free(m)
+#define sys_mbox_valid(m)
+#define sys_mbox_valid_val(m)
+#define sys_mbox_set_invalid(m)
+#define sys_mbox_set_invalid_val(m)
+
+#define sys_thread_new(n,t,a,s,p)
+
+#define sys_msleep(t)
+
+#else /* NO_SYS */
+
+#if ESP_LWIP_LOCK
+#define SYS_ARCH_PROTECT_CONN(_conn) do {\
+  sys_mutex_lock(&(_conn)->lock);\
+} while(0)
+
+#define SYS_ARCH_UNPROTECT_CONN(_conn) do {\
+  sys_mutex_unlock(&(_conn)->lock);\
+} while(0)
+
+#define SYS_ARCH_PROTECT_SOCK(_sock) do {\
+  sys_mutex_lock(&(_sock)->lock);\
+} while(0)
+
+#define SYS_ARCH_UNPROTECT_SOCK(_sock) do{\
+  sys_mutex_unlock(&(_sock)->lock);\
+} while(0)
+#endif /* ESP_LWIP_LOCK */
+
+/** Return code for timeouts from sys_arch_mbox_fetch and sys_arch_sem_wait */
+#define SYS_ARCH_TIMEOUT 0xffffffffUL
+
+/** sys_mbox_tryfetch() returns SYS_MBOX_EMPTY if appropriate.
+ * For now we use the same magic value, but we allow this to change in future.
+ */
+#define SYS_MBOX_EMPTY SYS_ARCH_TIMEOUT
+
+#include "lwip/err.h"
+#include "arch/sys_arch.h"
+
+/** Function prototype for thread functions */
+typedef void (*lwip_thread_fn)(void *arg);
+
+/* Function prototypes for functions to be implemented by platform ports
+   (in sys_arch.c) */
+
+/* Mutex functions: */
+
+/** Define LWIP_COMPAT_MUTEX if the port has no mutexes and binary semaphores
+    should be used instead */
+#ifndef LWIP_COMPAT_MUTEX
+#define LWIP_COMPAT_MUTEX 0
+#endif
+
+#if LWIP_COMPAT_MUTEX
+/* for old ports that don't have mutexes: define them to binary semaphores */
+#define sys_mutex_t                   sys_sem_t
+#define sys_mutex_new(mutex)          sys_sem_new(mutex, 1)
+#define sys_mutex_lock(mutex)         sys_sem_wait(mutex)
+#define sys_mutex_unlock(mutex)       sys_sem_signal(mutex)
+#define sys_mutex_free(mutex)         sys_sem_free(mutex)
+#define sys_mutex_valid(mutex)        sys_sem_valid(mutex)
+#define sys_mutex_set_invalid(mutex)  sys_sem_set_invalid(mutex)
+
+#else /* LWIP_COMPAT_MUTEX */
+
+/**
+ * @ingroup sys_mutex
+ * Create a new mutex.
+ * Note that mutexes are expected to not be taken recursively by the lwIP code,
+ * so both implementation types (recursive or non-recursive) should work.
+ * The mutex is allocated to the memory that 'mutex'
+ * points to (which can be both a pointer or the actual OS structure).
+ * If the mutex has been created, ERR_OK should be returned. Returning any
+ * other error will provide a hint what went wrong, but except for assertions,
+ * no real error handling is implemented.
+ * 
+ * @param mutex pointer to the mutex to create
+ * @return ERR_OK if successful, another err_t otherwise
+ */
+err_t sys_mutex_new(sys_mutex_t *mutex);
+/**
+ * @ingroup sys_mutex
+ * Blocks the thread until the mutex can be grabbed.
+ * @param mutex the mutex to lock
+ */
+void sys_mutex_lock(sys_mutex_t *mutex);
+/**
+ * @ingroup sys_mutex
+ * Releases the mutex previously locked through 'sys_mutex_lock()'.
+ * @param mutex the mutex to unlock
+ */
+void sys_mutex_unlock(sys_mutex_t *mutex);
+/**
+ * @ingroup sys_mutex
+ * Deallocates a mutex.
+ * @param mutex the mutex to delete
+ */
+void sys_mutex_free(sys_mutex_t *mutex);
+#ifndef sys_mutex_valid
+/**
+ * @ingroup sys_mutex
+ * Returns 1 if the mutes is valid, 0 if it is not valid.
+ * When using pointers, a simple way is to check the pointer for != NULL.
+ * When directly using OS structures, implementing this may be more complex.
+ * This may also be a define, in which case the function is not prototyped.
+ */
+int sys_mutex_valid(sys_mutex_t *mutex);
+#endif
+#ifndef sys_mutex_set_invalid
+/**
+ * @ingroup sys_mutex
+ * Invalidate a mutex so that sys_mutex_valid() returns 0.
+ * ATTENTION: This does NOT mean that the mutex shall be deallocated:
+ * sys_mutex_free() is always called before calling this function!
+ * This may also be a define, in which case the function is not prototyped.
+ */
+void sys_mutex_set_invalid(sys_mutex_t *mutex);
+#endif
+#endif /* LWIP_COMPAT_MUTEX */
+
+/* Semaphore functions: */
+
+/**
+ * @ingroup sys_sem
+ * Create a new semaphore
+ * Creates a new semaphore. The semaphore is allocated to the memory that 'sem'
+ * points to (which can be both a pointer or the actual OS structure).
+ * The "count" argument specifies the initial state of the semaphore (which is
+ * either 0 or 1).
+ * If the semaphore has been created, ERR_OK should be returned. Returning any
+ * other error will provide a hint what went wrong, but except for assertions,
+ * no real error handling is implemented.
+ *
+ * @param sem pointer to the semaphore to create
+ * @param count initial count of the semaphore
+ * @return ERR_OK if successful, another err_t otherwise
+ */
+err_t sys_sem_new(sys_sem_t *sem, u8_t count);
+/**
+ * @ingroup sys_sem
+ * Signals a semaphore
+ * @param sem the semaphore to signal
+ */
+void sys_sem_signal(sys_sem_t *sem);
+
+#if ESP_LWIP
+/** Signals a semaphore (ISR version)
+ * @param sem the semaphore to signal
+ * @return non-zero if a higher priority task has been woken  */
+int sys_sem_signal_isr(sys_sem_t *sem);
+#endif
+
+/**
+ * @ingroup sys_sem
+ *  Blocks the thread while waiting for the semaphore to be signaled. If the
+ * "timeout" argument is non-zero, the thread should only be blocked for the
+ * specified time (measured in milliseconds). If the "timeout" argument is zero,
+ * the thread should be blocked until the semaphore is signalled.
+ * 
+ * The return value is SYS_ARCH_TIMEOUT if the semaphore wasn't signaled within
+ * the specified time or any other value if it was signaled (with or without
+ * waiting).
+ * Notice that lwIP implements a function with a similar name,
+ * sys_sem_wait(), that uses the sys_arch_sem_wait() function.
+ * 
+ * @param sem the semaphore to wait for
+ * @param timeout timeout in milliseconds to wait (0 = wait forever)
+ * @return SYS_ARCH_TIMEOUT on timeout, any other value on success
+ */
+u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout);
+/**
+ * @ingroup sys_sem
+ * Deallocates a semaphore.
+ * @param sem semaphore to delete
+ */
+void sys_sem_free(sys_sem_t *sem);
+/** Wait for a semaphore - forever/no timeout */
+#define sys_sem_wait(sem)                  sys_arch_sem_wait(sem, 0)
+#ifndef sys_sem_valid
+/**
+ * @ingroup sys_sem
+ * Returns 1 if the semaphore is valid, 0 if it is not valid.
+ * When using pointers, a simple way is to check the pointer for != NULL.
+ * When directly using OS structures, implementing this may be more complex.
+ * This may also be a define, in which case the function is not prototyped.
+ */
+int sys_sem_valid(sys_sem_t *sem);
+#endif
+#ifndef sys_sem_set_invalid
+/**
+ * @ingroup sys_sem
+ * Invalidate a semaphore so that sys_sem_valid() returns 0.
+ * ATTENTION: This does NOT mean that the semaphore shall be deallocated:
+ * sys_sem_free() is always called before calling this function!
+ * This may also be a define, in which case the function is not prototyped.
+ */
+void sys_sem_set_invalid(sys_sem_t *sem);
+#endif
+#ifndef sys_sem_valid_val
+/**
+ * Same as sys_sem_valid() but taking a value, not a pointer
+ */
+#define sys_sem_valid_val(sem)       sys_sem_valid(&(sem))
+#endif
+#ifndef sys_sem_set_invalid_val
+/**
+ * Same as sys_sem_set_invalid() but taking a value, not a pointer
+ */
+#define sys_sem_set_invalid_val(sem) sys_sem_set_invalid(&(sem))
+#endif
+
+#ifndef sys_msleep
+/**
+ * @ingroup sys_misc
+ * Sleep for specified number of ms
+ */
+void sys_msleep(u32_t ms); /* only has a (close to) 1 ms resolution. */
+#endif
+
+/* Mailbox functions. */
+
+/**
+ * @ingroup sys_mbox
+ * Creates an empty mailbox for maximum "size" elements. Elements stored
+ * in mailboxes are pointers. You have to define macros "_MBOX_SIZE"
+ * in your lwipopts.h, or ignore this parameter in your implementation
+ * and use a default size.
+ * If the mailbox has been created, ERR_OK should be returned. Returning any
+ * other error will provide a hint what went wrong, but except for assertions,
+ * no real error handling is implemented.
+ * 
+ * @param mbox pointer to the mbox to create
+ * @param size (minimum) number of messages in this mbox
+ * @return ERR_OK if successful, another err_t otherwise
+ */
+err_t sys_mbox_new(sys_mbox_t *mbox, int size);
+/**
+ * @ingroup sys_mbox
+ * Post a message to an mbox - may not fail
+ * -> blocks if full, only to be used from tasks NOT from ISR!
+ * 
+ * @param mbox mbox to posts the message
+ * @param msg message to post (ATTENTION: can be NULL)
+ */
+void sys_mbox_post(sys_mbox_t *mbox, void *msg);
+/**
+ * @ingroup sys_mbox
+ * Try to post a message to an mbox - may fail if full.
+ * Can be used from ISR (if the sys arch layer allows this).
+ * Returns ERR_MEM if it is full, else, ERR_OK if the "msg" is posted.
+ * 
+ * @param mbox mbox to posts the message
+ * @param msg message to post (ATTENTION: can be NULL)
+ */
+err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg);
+/**
+ * @ingroup sys_mbox
+ * Try to post a message to an mbox - may fail if full.
+ * To be be used from ISR.
+ * Returns ERR_MEM if it is full, else, ERR_OK if the "msg" is posted.
+ * 
+ * @param mbox mbox to posts the message
+ * @param msg message to post (ATTENTION: can be NULL)
+ */
+err_t sys_mbox_trypost_fromisr(sys_mbox_t *mbox, void *msg);
+/**
+ * @ingroup sys_mbox
+ * Blocks the thread until a message arrives in the mailbox, but does
+ * not block the thread longer than "timeout" milliseconds (similar to
+ * the sys_arch_sem_wait() function). If "timeout" is 0, the thread should
+ * be blocked until a message arrives. The "msg" argument is a result
+ * parameter that is set by the function (i.e., by doing "*msg =
+ * ptr"). The "msg" parameter maybe NULL to indicate that the message
+ * should be dropped.
+ * The return values are the same as for the sys_arch_sem_wait() function:
+ * SYS_ARCH_TIMEOUT if there was a timeout, any other value if a messages
+ * is received.
+ * 
+ * Note that a function with a similar name, sys_mbox_fetch(), is
+ * implemented by lwIP. 
+ * 
+ * @param mbox mbox to get a message from
+ * @param msg pointer where the message is stored
+ * @param timeout maximum time (in milliseconds) to wait for a message (0 = wait forever)
+ * @return SYS_ARCH_TIMEOUT on timeout, any other value if a message has been received
+ */
+u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout);
+/* Allow port to override with a macro, e.g. special timeout for sys_arch_mbox_fetch() */
+#ifndef sys_arch_mbox_tryfetch
+/**
+ * @ingroup sys_mbox
+ * This is similar to sys_arch_mbox_fetch, however if a message is not
+ * present in the mailbox, it immediately returns with the code
+ * SYS_MBOX_EMPTY. On success 0 is returned.
+ * To allow for efficient implementations, this can be defined as a
+ * function-like macro in sys_arch.h instead of a normal function. For
+ * example, a naive implementation could be:
+ * \#define sys_arch_mbox_tryfetch(mbox,msg) sys_arch_mbox_fetch(mbox,msg,1)
+ * although this would introduce unnecessary delays.
+ * 
+ * @param mbox mbox to get a message from
+ * @param msg pointer where the message is stored
+ * @return 0 (milliseconds) if a message has been received
+ *         or SYS_MBOX_EMPTY if the mailbox is empty
+ */
+u32_t sys_arch_mbox_tryfetch(sys_mbox_t *mbox, void **msg);
+#endif
+/**
+ * For now, we map straight to sys_arch implementation.
+ */
+#define sys_mbox_tryfetch(mbox, msg) sys_arch_mbox_tryfetch(mbox, msg)
+/**
+ * @ingroup sys_mbox
+ * Deallocates a mailbox. If there are messages still present in the
+ * mailbox when the mailbox is deallocated, it is an indication of a
+ * programming error in lwIP and the developer should be notified.
+ * 
+ * @param mbox mbox to delete
+ */
+void sys_mbox_free(sys_mbox_t *mbox);
+#define sys_mbox_fetch(mbox, msg) sys_arch_mbox_fetch(mbox, msg, 0)
+#ifndef sys_mbox_valid
+/**
+ * @ingroup sys_mbox
+ * Returns 1 if the mailbox is valid, 0 if it is not valid.
+ * When using pointers, a simple way is to check the pointer for != NULL.
+ * When directly using OS structures, implementing this may be more complex.
+ * This may also be a define, in which case the function is not prototyped.
+ */
+int sys_mbox_valid(sys_mbox_t *mbox);
+#endif
+#ifndef sys_mbox_set_invalid
+/**
+ * @ingroup sys_mbox
+ * Invalidate a mailbox so that sys_mbox_valid() returns 0.
+ * ATTENTION: This does NOT mean that the mailbox shall be deallocated:
+ * sys_mbox_free() is always called before calling this function!
+ * This may also be a define, in which case the function is not prototyped.
+ */
+void sys_mbox_set_invalid(sys_mbox_t *mbox);
+#endif
+#ifndef sys_mbox_valid_val
+/**
+ * Same as sys_mbox_valid() but taking a value, not a pointer
+ */
+#define sys_mbox_valid_val(mbox)       sys_mbox_valid(&(mbox))
+#endif
+#ifndef sys_mbox_set_invalid_val
+/**
+ * Same as sys_mbox_set_invalid() but taking a value, not a pointer
+ */
+#define sys_mbox_set_invalid_val(mbox) sys_mbox_set_invalid(&(mbox))
+#endif
+
+
+/**
+ * @ingroup sys_misc
+ * The only thread function:
+ * Starts a new thread named "name" with priority "prio" that will begin its
+ * execution in the function "thread()". The "arg" argument will be passed as an
+ * argument to the thread() function. The stack size to used for this thread is
+ * the "stacksize" parameter. The id of the new thread is returned. Both the id
+ * and the priority are system dependent.
+ * ATTENTION: although this function returns a value, it MUST NOT FAIL (ports have to assert this!)
+ * 
+ * @param name human-readable name for the thread (used for debugging purposes)
+ * @param thread thread-function
+ * @param arg parameter passed to 'thread'
+ * @param stacksize stack size in bytes for the new thread (may be ignored by ports)
+ * @param prio priority of the new thread (may be ignored by ports) */
+sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread, void *arg, int stacksize, int prio);
+
+#endif /* NO_SYS */
+
+/**
+ * @ingroup sys_misc
+ * sys_init() must be called before anything else.
+ * Initialize the sys_arch layer.
+ */
+void sys_init(void);
+
+#ifndef sys_jiffies
+/**
+ * Ticks/jiffies since power up.
+ */
+u32_t sys_jiffies(void);
+#endif
+
+/**
+ * @ingroup sys_time
+ * Returns the current time in milliseconds,
+ * may be the same as sys_jiffies or at least based on it.
+ * Don't care for wraparound, this is only used for time diffs.
+ * Not implementing this function means you cannot use some modules (e.g. TCP
+ * timestamps, internal timeouts for NO_SYS==1).
+ */
+u32_t sys_now(void);
+
+/* Critical Region Protection */
+/* These functions must be implemented in the sys_arch.c file.
+   In some implementations they can provide a more light-weight protection
+   mechanism than using semaphores. Otherwise semaphores can be used for
+   implementation */
+#ifndef SYS_ARCH_PROTECT
+/** SYS_LIGHTWEIGHT_PROT
+ * define SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection
+ * for certain critical regions during buffer allocation, deallocation and memory
+ * allocation and deallocation.
+ */
+#if SYS_LIGHTWEIGHT_PROT
+
+/**
+ * @ingroup sys_prot
+ * SYS_ARCH_DECL_PROTECT
+ * declare a protection variable. This macro will default to defining a variable of
+ * type sys_prot_t. If a particular port needs a different implementation, then
+ * this macro may be defined in sys_arch.h.
+ */
+#define SYS_ARCH_DECL_PROTECT(lev) sys_prot_t lev
+/**
+ * @ingroup sys_prot
+ * SYS_ARCH_PROTECT
+ * Perform a "fast" protect. This could be implemented by
+ * disabling interrupts for an embedded system or by using a semaphore or
+ * mutex. The implementation should allow calling SYS_ARCH_PROTECT when
+ * already protected. The old protection level is returned in the variable
+ * "lev". This macro will default to calling the sys_arch_protect() function
+ * which should be implemented in sys_arch.c. If a particular port needs a
+ * different implementation, then this macro may be defined in sys_arch.h
+ */
+#define SYS_ARCH_PROTECT(lev) lev = sys_arch_protect()
+/**
+ * @ingroup sys_prot
+ * SYS_ARCH_UNPROTECT
+ * Perform a "fast" set of the protection level to "lev". This could be
+ * implemented by setting the interrupt level to "lev" within the MACRO or by
+ * using a semaphore or mutex.  This macro will default to calling the
+ * sys_arch_unprotect() function which should be implemented in
+ * sys_arch.c. If a particular port needs a different implementation, then
+ * this macro may be defined in sys_arch.h
+ */
+#define SYS_ARCH_UNPROTECT(lev) sys_arch_unprotect(lev)
+sys_prot_t sys_arch_protect(void);
+void sys_arch_unprotect(sys_prot_t pval);
+
+#else
+
+#define SYS_ARCH_DECL_PROTECT(lev)
+#define SYS_ARCH_PROTECT(lev)
+#define SYS_ARCH_UNPROTECT(lev)
+
+#endif /* SYS_LIGHTWEIGHT_PROT */
+
+#endif /* SYS_ARCH_PROTECT */
+
+/*
+ * Macros to set/get and increase/decrease variables in a thread-safe way.
+ * Use these for accessing variable that are used from more than one thread.
+ */
+
+#ifndef SYS_ARCH_INC
+#define SYS_ARCH_INC(var, val) do { \
+                                SYS_ARCH_DECL_PROTECT(old_level); \
+                                SYS_ARCH_PROTECT(old_level); \
+                                var += val; \
+                                SYS_ARCH_UNPROTECT(old_level); \
+                              } while(0)
+#endif /* SYS_ARCH_INC */
+
+#ifndef SYS_ARCH_DEC
+#define SYS_ARCH_DEC(var, val) do { \
+                                SYS_ARCH_DECL_PROTECT(old_level); \
+                                SYS_ARCH_PROTECT(old_level); \
+                                var -= val; \
+                                SYS_ARCH_UNPROTECT(old_level); \
+                              } while(0)
+#endif /* SYS_ARCH_DEC */
+
+#ifndef SYS_ARCH_GET
+#define SYS_ARCH_GET(var, ret) do { \
+                                SYS_ARCH_DECL_PROTECT(old_level); \
+                                SYS_ARCH_PROTECT(old_level); \
+                                ret = var; \
+                                SYS_ARCH_UNPROTECT(old_level); \
+                              } while(0)
+#endif /* SYS_ARCH_GET */
+
+#ifndef SYS_ARCH_SET
+#define SYS_ARCH_SET(var, val) do { \
+                                SYS_ARCH_DECL_PROTECT(old_level); \
+                                SYS_ARCH_PROTECT(old_level); \
+                                var = val; \
+                                SYS_ARCH_UNPROTECT(old_level); \
+                              } while(0)
+#endif /* SYS_ARCH_SET */
+
+#ifndef SYS_ARCH_LOCKED
+#define SYS_ARCH_LOCKED(code) do { \
+                                SYS_ARCH_DECL_PROTECT(old_level); \
+                                SYS_ARCH_PROTECT(old_level); \
+                                code; \
+                                SYS_ARCH_UNPROTECT(old_level); \
+                              } while(0)
+#endif /* SYS_ARCH_LOCKED */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_SYS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/tcp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/tcp.h
new file mode 100644
index 00000000000..daf75994606
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/tcp.h
@@ -0,0 +1,500 @@
+/**
+ * @file
+ * TCP API (to be used from TCPIP thread)\n
+ * See also @ref tcp_raw
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_TCP_H
+#define LWIP_HDR_TCP_H
+
+#include "lwip/opt.h"
+
+#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/tcpbase.h"
+#include "lwip/mem.h"
+#include "lwip/pbuf.h"
+#include "lwip/ip.h"
+#include "lwip/icmp.h"
+#include "lwip/err.h"
+#include "lwip/ip6.h"
+#include "lwip/ip6_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct tcp_pcb;
+struct tcp_pcb_listen;
+
+/** Function prototype for tcp accept callback functions. Called when a new
+ * connection can be accepted on a listening pcb.
+ *
+ * @param arg Additional argument to pass to the callback function (@see tcp_arg())
+ * @param newpcb The new connection pcb
+ * @param err An error code if there has been an error accepting.
+ *            Only return ERR_ABRT if you have called tcp_abort from within the
+ *            callback function!
+ */
+typedef err_t (*tcp_accept_fn)(void *arg, struct tcp_pcb *newpcb, err_t err);
+
+/** Function prototype for tcp receive callback functions. Called when data has
+ * been received.
+ *
+ * @param arg Additional argument to pass to the callback function (@see tcp_arg())
+ * @param tpcb The connection pcb which received data
+ * @param p The received data (or NULL when the connection has been closed!)
+ * @param err An error code if there has been an error receiving
+ *            Only return ERR_ABRT if you have called tcp_abort from within the
+ *            callback function!
+ */
+typedef err_t (*tcp_recv_fn)(void *arg, struct tcp_pcb *tpcb,
+                             struct pbuf *p, err_t err);
+
+/** Function prototype for tcp sent callback functions. Called when sent data has
+ * been acknowledged by the remote side. Use it to free corresponding resources.
+ * This also means that the pcb has now space available to send new data.
+ *
+ * @param arg Additional argument to pass to the callback function (@see tcp_arg())
+ * @param tpcb The connection pcb for which data has been acknowledged
+ * @param len The amount of bytes acknowledged
+ * @return ERR_OK: try to send some data by calling tcp_output
+ *            Only return ERR_ABRT if you have called tcp_abort from within the
+ *            callback function!
+ */
+typedef err_t (*tcp_sent_fn)(void *arg, struct tcp_pcb *tpcb,
+                              u16_t len);
+
+/** Function prototype for tcp poll callback functions. Called periodically as
+ * specified by @see tcp_poll.
+ *
+ * @param arg Additional argument to pass to the callback function (@see tcp_arg())
+ * @param tpcb tcp pcb
+ * @return ERR_OK: try to send some data by calling tcp_output
+ *            Only return ERR_ABRT if you have called tcp_abort from within the
+ *            callback function!
+ */
+typedef err_t (*tcp_poll_fn)(void *arg, struct tcp_pcb *tpcb);
+
+/** Function prototype for tcp error callback functions. Called when the pcb
+ * receives a RST or is unexpectedly closed for any other reason.
+ *
+ * @note The corresponding pcb is already freed when this callback is called!
+ *
+ * @param arg Additional argument to pass to the callback function (@see tcp_arg())
+ * @param err Error code to indicate why the pcb has been closed
+ *            ERR_ABRT: aborted through tcp_abort or by a TCP timer
+ *            ERR_RST: the connection was reset by the remote host
+ */
+typedef void  (*tcp_err_fn)(void *arg, err_t err);
+
+/** Function prototype for tcp connected callback functions. Called when a pcb
+ * is connected to the remote side after initiating a connection attempt by
+ * calling tcp_connect().
+ *
+ * @param arg Additional argument to pass to the callback function (@see tcp_arg())
+ * @param tpcb The connection pcb which is connected
+ * @param err An unused error code, always ERR_OK currently ;-) @todo!
+ *            Only return ERR_ABRT if you have called tcp_abort from within the
+ *            callback function!
+ *
+ * @note When a connection attempt fails, the error callback is currently called!
+ */
+typedef err_t (*tcp_connected_fn)(void *arg, struct tcp_pcb *tpcb, err_t err);
+
+#if LWIP_WND_SCALE
+#define RCV_WND_SCALE(pcb, wnd) (((wnd) >> (pcb)->rcv_scale))
+#define SND_WND_SCALE(pcb, wnd) (((wnd) << (pcb)->snd_scale))
+#define TCPWND16(x)             ((u16_t)LWIP_MIN((x), 0xFFFF))
+#define TCP_WND_MAX(pcb)        ((tcpwnd_size_t)(((pcb)->flags & TF_WND_SCALE) ? TCP_WND : TCPWND16(TCP_WND)))
+#else
+#define RCV_WND_SCALE(pcb, wnd) (wnd)
+#define SND_WND_SCALE(pcb, wnd) (wnd)
+#define TCPWND16(x)             (x)
+#define TCP_WND_MAX(pcb)        TCP_WND
+#endif
+/* Increments a tcpwnd_size_t and holds at max value rather than rollover */
+#define TCP_WND_INC(wnd, inc)   do { \
+                                  if ((tcpwnd_size_t)(wnd + inc) >= wnd) { \
+                                    wnd = (tcpwnd_size_t)(wnd + inc); \
+                                  } else { \
+                                    wnd = (tcpwnd_size_t)-1; \
+                                  } \
+                                } while(0)
+
+#if LWIP_TCP_SACK_OUT
+/** SACK ranges to include in ACK packets.
+ * SACK entry is invalid if left==right. */
+struct tcp_sack_range {
+  /** Left edge of the SACK: the first acknowledged sequence number. */
+  u32_t left;
+  /** Right edge of the SACK: the last acknowledged sequence number +1 (so first NOT acknowledged). */
+  u32_t right;
+};
+#endif /* LWIP_TCP_SACK_OUT */
+
+/** Function prototype for deallocation of arguments. Called *just before* the
+ * pcb is freed, so don't expect to be able to do anything with this pcb!
+ *
+ * @param id ext arg id (allocated via @ref tcp_ext_arg_alloc_id)
+ * @param data pointer to the data (set via @ref tcp_ext_arg_set before)
+ */
+typedef void (*tcp_extarg_callback_pcb_destroyed_fn)(u8_t id, void *data);
+
+/** Function prototype to transition arguments from a listening pcb to an accepted pcb
+ *
+ * @param id ext arg id (allocated via @ref tcp_ext_arg_alloc_id)
+ * @param lpcb the listening pcb accepting a connection
+ * @param cpcb the newly allocated connection pcb
+ * @return ERR_OK if OK, any error if connection should be dropped
+ */
+typedef err_t (*tcp_extarg_callback_passive_open_fn)(u8_t id, struct tcp_pcb_listen *lpcb, struct tcp_pcb *cpcb);
+
+/** A table of callback functions that is invoked for ext arguments */
+struct tcp_ext_arg_callbacks {
+  /** @ref tcp_extarg_callback_pcb_destroyed_fn */
+  tcp_extarg_callback_pcb_destroyed_fn destroy;
+  /** @ref tcp_extarg_callback_passive_open_fn */
+  tcp_extarg_callback_passive_open_fn passive_open;
+};
+
+#define LWIP_TCP_PCB_NUM_EXT_ARG_ID_INVALID 0xFF
+
+#if LWIP_TCP_PCB_NUM_EXT_ARGS
+/* This is the structure for ext args in tcp pcbs (used as array) */
+struct tcp_pcb_ext_args {
+  const struct tcp_ext_arg_callbacks *callbacks;
+  void *data;
+};
+/* This is a helper define to prevent zero size arrays if disabled */
+#define TCP_PCB_EXTARGS struct tcp_pcb_ext_args ext_args[LWIP_TCP_PCB_NUM_EXT_ARGS];
+#else
+#define TCP_PCB_EXTARGS
+#endif
+
+typedef u16_t tcpflags_t;
+#define TCP_ALLFLAGS 0xffffU
+
+/**
+ * members common to struct tcp_pcb and struct tcp_listen_pcb
+ */
+#define TCP_PCB_COMMON(type) \
+  type *next; /* for the linked list */ \
+  void *callback_arg; \
+  TCP_PCB_EXTARGS \
+  enum tcp_state state; /* TCP state */ \
+  u8_t prio; \
+  /* ports are in host byte order */ \
+  u16_t local_port
+
+
+/** the TCP protocol control block for listening pcbs */
+struct tcp_pcb_listen {
+/** Common members of all PCB types */
+  IP_PCB;
+/** Protocol specific PCB members */
+  TCP_PCB_COMMON(struct tcp_pcb_listen);
+
+#if LWIP_CALLBACK_API
+  /* Function to call when a listener has been connected. */
+  tcp_accept_fn accept;
+#endif /* LWIP_CALLBACK_API */
+
+#if TCP_LISTEN_BACKLOG
+  u8_t backlog;
+  u8_t accepts_pending;
+#endif /* TCP_LISTEN_BACKLOG */
+};
+
+
+/** the TCP protocol control block */
+struct tcp_pcb {
+/** common PCB members */
+  IP_PCB;
+/** protocol specific PCB members */
+  TCP_PCB_COMMON(struct tcp_pcb);
+
+  /* ports are in host byte order */
+  u16_t remote_port;
+
+  tcpflags_t flags;
+#define TF_ACK_DELAY   0x01U   /* Delayed ACK. */
+#define TF_ACK_NOW     0x02U   /* Immediate ACK. */
+#define TF_INFR        0x04U   /* In fast recovery. */
+#define TF_CLOSEPEND   0x08U   /* If this is set, tcp_close failed to enqueue the FIN (retried in tcp_tmr) */
+#define TF_RXCLOSED    0x10U   /* rx closed by tcp_shutdown */
+#define TF_FIN         0x20U   /* Connection was closed locally (FIN segment enqueued). */
+#define TF_NODELAY     0x40U   /* Disable Nagle algorithm */
+#define TF_NAGLEMEMERR 0x80U   /* nagle enabled, memerr, try to output to prevent delayed ACK to happen */
+#if LWIP_WND_SCALE
+#define TF_WND_SCALE   0x0100U /* Window Scale option enabled */
+#endif
+#if TCP_LISTEN_BACKLOG
+#define TF_BACKLOGPEND 0x0200U /* If this is set, a connection pcb has increased the backlog on its listener */
+#endif
+#if LWIP_TCP_TIMESTAMPS
+#define TF_TIMESTAMP   0x0400U   /* Timestamp option enabled */
+#endif
+#define TF_RTO         0x0800U /* RTO timer has fired, in-flight data moved to unsent and being retransmitted */
+#if LWIP_TCP_SACK_OUT
+#define TF_SACK        0x1000U /* Selective ACKs enabled */
+#endif
+
+  /* the rest of the fields are in host byte order
+     as we have to do some math with them */
+
+  /* Timers */
+  u8_t polltmr, pollinterval;
+  u8_t last_timer;
+  u32_t tmr;
+
+  /* receiver variables */
+  u32_t rcv_nxt;   /* next seqno expected */
+  tcpwnd_size_t rcv_wnd;   /* receiver window available */
+  tcpwnd_size_t rcv_ann_wnd; /* receiver window to announce */
+  u32_t rcv_ann_right_edge; /* announced right edge of window */
+
+#if LWIP_TCP_SACK_OUT
+  /* SACK ranges to include in ACK packets (entry is invalid if left==right) */
+  struct tcp_sack_range rcv_sacks[LWIP_TCP_MAX_SACK_NUM];
+#define LWIP_TCP_SACK_VALID(pcb, idx) ((pcb)->rcv_sacks[idx].left != (pcb)->rcv_sacks[idx].right)
+#endif /* LWIP_TCP_SACK_OUT */
+
+  /* Retransmission timer. */
+  s16_t rtime;
+
+  u16_t mss;   /* maximum segment size */
+
+  /* RTT (round trip time) estimation variables */
+  u32_t rttest; /* RTT estimate in 500ms ticks */
+  u32_t rtseq;  /* sequence number being timed */
+  s16_t sa, sv; /* @see "Congestion Avoidance and Control" by Van Jacobson and Karels */
+
+  s16_t rto;    /* retransmission time-out (in ticks of TCP_SLOW_INTERVAL) */
+  u8_t nrtx;    /* number of retransmissions */
+
+  /* fast retransmit/recovery */
+  u8_t dupacks;
+  u32_t lastack; /* Highest acknowledged seqno. */
+
+  /* congestion avoidance/control variables */
+  tcpwnd_size_t cwnd;
+  tcpwnd_size_t ssthresh;
+
+  /* first byte following last rto byte */
+  u32_t rto_end;
+
+  /* sender variables */
+  u32_t snd_nxt;   /* next new seqno to be sent */
+  u32_t snd_wl1, snd_wl2; /* Sequence and acknowledgement numbers of last
+                             window update. */
+  u32_t snd_lbb;       /* Sequence number of next byte to be buffered. */
+  tcpwnd_size_t snd_wnd;   /* sender window */
+  tcpwnd_size_t snd_wnd_max; /* the maximum sender window announced by the remote host */
+
+  tcpwnd_size_t snd_buf;   /* Available buffer space for sending (in bytes). */
+#define TCP_SNDQUEUELEN_OVERFLOW (0xffffU-3)
+  u16_t snd_queuelen; /* Number of pbufs currently in the send buffer. */
+
+#if TCP_OVERSIZE
+  /* Extra bytes available at the end of the last pbuf in unsent. */
+  u16_t unsent_oversize;
+#endif /* TCP_OVERSIZE */
+
+  tcpwnd_size_t bytes_acked;
+
+  /* These are ordered by sequence number: */
+  struct tcp_seg *unsent;   /* Unsent (queued) segments. */
+  struct tcp_seg *unacked;  /* Sent but unacknowledged segments. */
+#if TCP_QUEUE_OOSEQ
+  struct tcp_seg *ooseq;    /* Received out of sequence segments. */
+#endif /* TCP_QUEUE_OOSEQ */
+
+  struct pbuf *refused_data; /* Data previously received but not yet taken by upper layer */
+
+#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
+  struct tcp_pcb_listen* listener;
+#endif /* LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG */
+
+#if LWIP_CALLBACK_API
+  /* Function to be called when more send buffer space is available. */
+  tcp_sent_fn sent;
+  /* Function to be called when (in-sequence) data has arrived. */
+  tcp_recv_fn recv;
+  /* Function to be called when a connection has been set up. */
+  tcp_connected_fn connected;
+  /* Function which is called periodically. */
+  tcp_poll_fn poll;
+  /* Function to be called whenever a fatal error occurs. */
+  tcp_err_fn errf;
+#endif /* LWIP_CALLBACK_API */
+
+#if LWIP_TCP_TIMESTAMPS
+  u32_t ts_lastacksent;
+  u32_t ts_recent;
+#endif /* LWIP_TCP_TIMESTAMPS */
+
+  /* idle time before KEEPALIVE is sent */
+  u32_t keep_idle;
+#if LWIP_TCP_KEEPALIVE
+  u32_t keep_intvl;
+  u32_t keep_cnt;
+#endif /* LWIP_TCP_KEEPALIVE */
+
+  /* Persist timer counter */
+  u8_t persist_cnt;
+  /* Persist timer back-off */
+  u8_t persist_backoff;
+  /* Number of persist probes */
+  u8_t persist_probe;
+
+  /* KEEPALIVE counter */
+  u8_t keep_cnt_sent;
+
+#if LWIP_WND_SCALE
+  u8_t snd_scale;
+  u8_t rcv_scale;
+#endif
+};
+
+#if LWIP_EVENT_API
+
+enum lwip_event {
+  LWIP_EVENT_ACCEPT,
+  LWIP_EVENT_SENT,
+  LWIP_EVENT_RECV,
+  LWIP_EVENT_CONNECTED,
+  LWIP_EVENT_POLL,
+  LWIP_EVENT_ERR
+};
+
+err_t lwip_tcp_event(void *arg, struct tcp_pcb *pcb,
+         enum lwip_event,
+         struct pbuf *p,
+         u16_t size,
+         err_t err);
+
+#endif /* LWIP_EVENT_API */
+
+/* Application program's interface: */
+struct tcp_pcb * tcp_new     (void);
+struct tcp_pcb * tcp_new_ip_type (u8_t type);
+
+void             tcp_arg     (struct tcp_pcb *pcb, void *arg);
+#if LWIP_CALLBACK_API
+void             tcp_recv    (struct tcp_pcb *pcb, tcp_recv_fn recv);
+void             tcp_sent    (struct tcp_pcb *pcb, tcp_sent_fn sent);
+void             tcp_err     (struct tcp_pcb *pcb, tcp_err_fn err);
+void             tcp_accept  (struct tcp_pcb *pcb, tcp_accept_fn accept);
+#endif /* LWIP_CALLBACK_API */
+void             tcp_poll    (struct tcp_pcb *pcb, tcp_poll_fn poll, u8_t interval);
+
+#define          tcp_set_flags(pcb, set_flags)     do { (pcb)->flags = (tcpflags_t)((pcb)->flags |  (set_flags)); } while(0)
+#define          tcp_clear_flags(pcb, clr_flags)   do { (pcb)->flags = (tcpflags_t)((pcb)->flags & (tcpflags_t)(~(clr_flags) & TCP_ALLFLAGS)); } while(0)
+#define          tcp_is_flag_set(pcb, flag)        (((pcb)->flags & (flag)) != 0)
+
+#if LWIP_TCP_TIMESTAMPS
+#define          tcp_mss(pcb)             (((pcb)->flags & TF_TIMESTAMP) ? ((pcb)->mss - 12)  : (pcb)->mss)
+#else /* LWIP_TCP_TIMESTAMPS */
+/** @ingroup tcp_raw */
+#define          tcp_mss(pcb)             ((pcb)->mss)
+#endif /* LWIP_TCP_TIMESTAMPS */
+/** @ingroup tcp_raw */
+#define          tcp_sndbuf(pcb)          (TCPWND16((pcb)->snd_buf))
+/** @ingroup tcp_raw */
+#define          tcp_sndqueuelen(pcb)     ((pcb)->snd_queuelen)
+/** @ingroup tcp_raw */
+#define          tcp_nagle_disable(pcb)   tcp_set_flags(pcb, TF_NODELAY)
+/** @ingroup tcp_raw */
+#define          tcp_nagle_enable(pcb)    tcp_clear_flags(pcb, TF_NODELAY)
+/** @ingroup tcp_raw */
+#define          tcp_nagle_disabled(pcb)  tcp_is_flag_set(pcb, TF_NODELAY)
+
+#if TCP_LISTEN_BACKLOG
+#define          tcp_backlog_set(pcb, new_backlog) do { \
+  LWIP_ASSERT("pcb->state == LISTEN (called for wrong pcb?)", (pcb)->state == LISTEN); \
+  ((struct tcp_pcb_listen *)(pcb))->backlog = ((new_backlog) ? (new_backlog) : 1); } while(0)
+void             tcp_backlog_delayed(struct tcp_pcb* pcb);
+void             tcp_backlog_accepted(struct tcp_pcb* pcb);
+#else  /* TCP_LISTEN_BACKLOG */
+#define          tcp_backlog_set(pcb, new_backlog)
+#define          tcp_backlog_delayed(pcb)
+#define          tcp_backlog_accepted(pcb)
+#endif /* TCP_LISTEN_BACKLOG */
+#define          tcp_accepted(pcb) do { LWIP_UNUSED_ARG(pcb); } while(0) /* compatibility define, not needed any more */
+
+void             tcp_recved  (struct tcp_pcb *pcb, u16_t len);
+err_t            tcp_bind    (struct tcp_pcb *pcb, const ip_addr_t *ipaddr,
+                              u16_t port);
+void             tcp_bind_netif(struct tcp_pcb *pcb, const struct netif *netif);
+err_t            tcp_connect (struct tcp_pcb *pcb, const ip_addr_t *ipaddr,
+                              u16_t port, tcp_connected_fn connected);
+
+struct tcp_pcb * tcp_listen_with_backlog_and_err(struct tcp_pcb *pcb, u8_t backlog, err_t *err);
+struct tcp_pcb * tcp_listen_with_backlog(struct tcp_pcb *pcb, u8_t backlog);
+/** @ingroup tcp_raw */
+#define          tcp_listen(pcb) tcp_listen_with_backlog(pcb, TCP_DEFAULT_LISTEN_BACKLOG)
+
+void             tcp_abort (struct tcp_pcb *pcb);
+err_t            tcp_close   (struct tcp_pcb *pcb);
+err_t            tcp_shutdown(struct tcp_pcb *pcb, int shut_rx, int shut_tx);
+
+err_t            tcp_write   (struct tcp_pcb *pcb, const void *dataptr, u16_t len,
+                              u8_t apiflags);
+
+void             tcp_setprio (struct tcp_pcb *pcb, u8_t prio);
+
+err_t            tcp_output  (struct tcp_pcb *pcb);
+
+err_t            tcp_tcp_get_tcp_addrinfo(struct tcp_pcb *pcb, int local, ip_addr_t *addr, u16_t *port);
+
+#define tcp_dbg_get_tcp_state(pcb) ((pcb)->state)
+
+/* for compatibility with older implementation */
+#define tcp_new_ip6() tcp_new_ip_type(IPADDR_TYPE_V6)
+
+#if LWIP_TCP_PCB_NUM_EXT_ARGS
+u8_t tcp_ext_arg_alloc_id(void);
+void tcp_ext_arg_set_callbacks(struct tcp_pcb *pcb, uint8_t id, const struct tcp_ext_arg_callbacks * const callbacks);
+void tcp_ext_arg_set(struct tcp_pcb *pcb, uint8_t id, void *arg);
+void *tcp_ext_arg_get(const struct tcp_pcb *pcb, uint8_t id);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_TCP */
+
+#endif /* LWIP_HDR_TCP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/tcpbase.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/tcpbase.h
new file mode 100644
index 00000000000..00230746553
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/tcpbase.h
@@ -0,0 +1,88 @@
+/**
+ * @file
+ * Base TCP API definitions shared by TCP and ALTCP\n
+ * See also @ref tcp_raw
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_TCPBASE_H
+#define LWIP_HDR_TCPBASE_H
+
+#include "lwip/opt.h"
+
+#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#if LWIP_WND_SCALE
+typedef u32_t tcpwnd_size_t;
+#else
+typedef u16_t tcpwnd_size_t;
+#endif
+
+enum tcp_state {
+  CLOSED      = 0,
+  LISTEN      = 1,
+  SYN_SENT    = 2,
+  SYN_RCVD    = 3,
+  ESTABLISHED = 4,
+  FIN_WAIT_1  = 5,
+  FIN_WAIT_2  = 6,
+  CLOSE_WAIT  = 7,
+  CLOSING     = 8,
+  LAST_ACK    = 9,
+  TIME_WAIT   = 10
+};
+/* ATTENTION: this depends on state number ordering! */
+#define TCP_STATE_IS_CLOSING(state) ((state) >= FIN_WAIT_1)
+
+/* Flags for "apiflags" parameter in tcp_write */
+#define TCP_WRITE_FLAG_COPY 0x01
+#define TCP_WRITE_FLAG_MORE 0x02
+
+#define TCP_PRIO_MIN    1
+#define TCP_PRIO_NORMAL 64
+#define TCP_PRIO_MAX    127
+
+const char* tcp_debug_state_str(enum tcp_state s);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_TCP */
+
+#endif /* LWIP_HDR_TCPBASE_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/tcpip.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/tcpip.h
new file mode 100644
index 00000000000..0b8880a9fc6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/tcpip.h
@@ -0,0 +1,113 @@
+/**
+ * @file
+ * Functions to sync with TCPIP thread
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_TCPIP_H
+#define LWIP_HDR_TCPIP_H
+
+#include "lwip/opt.h"
+
+#if !NO_SYS /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/err.h"
+#include "lwip/timeouts.h"
+#include "lwip/netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_TCPIP_CORE_LOCKING
+/** The global semaphore to lock the stack. */
+extern sys_mutex_t lock_tcpip_core;
+#if !defined LOCK_TCPIP_CORE || defined __DOXYGEN__
+/** Lock lwIP core mutex (needs @ref LWIP_TCPIP_CORE_LOCKING 1) */
+#define LOCK_TCPIP_CORE()     sys_mutex_lock(&lock_tcpip_core)
+/** Unlock lwIP core mutex (needs @ref LWIP_TCPIP_CORE_LOCKING 1) */
+#define UNLOCK_TCPIP_CORE()   sys_mutex_unlock(&lock_tcpip_core)
+#endif /* LOCK_TCPIP_CORE */
+#else /* LWIP_TCPIP_CORE_LOCKING */
+#define LOCK_TCPIP_CORE()
+#define UNLOCK_TCPIP_CORE()
+#endif /* LWIP_TCPIP_CORE_LOCKING */
+
+struct pbuf;
+struct netif;
+
+/** Function prototype for the init_done function passed to tcpip_init */
+typedef void (*tcpip_init_done_fn)(void *arg);
+/** Function prototype for functions passed to tcpip_callback() */
+typedef void (*tcpip_callback_fn)(void *ctx);
+
+/* Forward declarations */
+struct tcpip_callback_msg;
+
+void   tcpip_init(tcpip_init_done_fn tcpip_init_done, void *arg);
+
+err_t  tcpip_inpkt(struct pbuf *p, struct netif *inp, netif_input_fn input_fn);
+err_t  tcpip_input(struct pbuf *p, struct netif *inp);
+
+err_t  tcpip_try_callback(tcpip_callback_fn function, void *ctx);
+err_t  tcpip_callback(tcpip_callback_fn function, void *ctx);
+/**  @ingroup lwip_os
+ * @deprecated use tcpip_try_callback() or tcpip_callback() instead
+ */
+#define tcpip_callback_with_block(function, ctx, block) ((block != 0)? tcpip_callback(function, ctx) : tcpip_try_callback(function, ctx))
+
+struct tcpip_callback_msg* tcpip_callbackmsg_new(tcpip_callback_fn function, void *ctx);
+void   tcpip_callbackmsg_delete(struct tcpip_callback_msg* msg);
+err_t  tcpip_callbackmsg_trycallback(struct tcpip_callback_msg* msg);
+err_t  tcpip_callbackmsg_trycallback_fromisr(struct tcpip_callback_msg* msg);
+
+/* free pbufs or heap memory from another context without blocking */
+err_t  pbuf_free_callback(struct pbuf *p);
+err_t  mem_free_callback(void *m);
+
+#if LWIP_TCPIP_TIMEOUT && LWIP_TIMERS
+err_t  tcpip_timeout(u32_t msecs, sys_timeout_handler h, void *arg);
+err_t  tcpip_untimeout(sys_timeout_handler h, void *arg);
+#endif /* LWIP_TCPIP_TIMEOUT && LWIP_TIMERS */
+
+#ifdef TCPIP_THREAD_TEST
+int tcpip_thread_poll_one(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !NO_SYS */
+
+#endif /* LWIP_HDR_TCPIP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/timeouts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/timeouts.h
new file mode 100644
index 00000000000..1791f54cf59
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/timeouts.h
@@ -0,0 +1,129 @@
+/**
+ * @file
+ * Timer implementations
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *         Simon Goldschmidt
+ *
+ */
+#ifndef LWIP_HDR_TIMEOUTS_H
+#define LWIP_HDR_TIMEOUTS_H
+
+#include "lwip/opt.h"
+#include "lwip/err.h"
+#if !NO_SYS
+#include "lwip/sys.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef LWIP_DEBUG_TIMERNAMES
+#ifdef LWIP_DEBUG
+#define LWIP_DEBUG_TIMERNAMES SYS_DEBUG
+#else /* LWIP_DEBUG */
+#define LWIP_DEBUG_TIMERNAMES 0
+#endif /* LWIP_DEBUG*/
+#endif
+
+/** Returned by sys_timeouts_sleeptime() to indicate there is no timer, so we
+ * can sleep forever.
+ */
+#define SYS_TIMEOUTS_SLEEPTIME_INFINITE 0xFFFFFFFF
+
+/** Function prototype for a stack-internal timer function that has to be
+ * called at a defined interval */
+typedef void (* lwip_cyclic_timer_handler)(void);
+
+/** This struct contains information about a stack-internal timer function
+ that has to be called at a defined interval */
+struct lwip_cyclic_timer {
+  u32_t interval_ms;
+  lwip_cyclic_timer_handler handler;
+#if LWIP_DEBUG_TIMERNAMES
+  const char* handler_name;
+#endif /* LWIP_DEBUG_TIMERNAMES */
+};
+
+/** This array contains all stack-internal cyclic timers. To get the number of
+ * timers, use lwip_num_cyclic_timers */
+extern const struct lwip_cyclic_timer lwip_cyclic_timers[];
+/** Array size of lwip_cyclic_timers[] */
+extern const int lwip_num_cyclic_timers;
+
+#if LWIP_TIMERS
+
+/** Function prototype for a timeout callback function. Register such a function
+ * using sys_timeout().
+ *
+ * @param arg Additional argument to pass to the function - set up by sys_timeout()
+ */
+typedef void (* sys_timeout_handler)(void *arg);
+
+struct sys_timeo {
+  struct sys_timeo *next;
+  u32_t time;
+  sys_timeout_handler h;
+  void *arg;
+#if LWIP_DEBUG_TIMERNAMES
+  const char* handler_name;
+#endif /* LWIP_DEBUG_TIMERNAMES */
+};
+
+void sys_timeouts_init(void);
+void sys_timeouts_deinit(void);
+
+#if LWIP_DEBUG_TIMERNAMES
+void sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char* handler_name);
+#define sys_timeout(msecs, handler, arg) sys_timeout_debug(msecs, handler, arg, #handler)
+#else /* LWIP_DEBUG_TIMERNAMES */
+void sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg);
+#endif /* LWIP_DEBUG_TIMERNAMES */
+
+void sys_untimeout(sys_timeout_handler handler, void *arg);
+void sys_restart_timeouts(void);
+void sys_check_timeouts(void);
+u32_t sys_timeouts_sleeptime(void);
+
+#if LWIP_TESTMODE
+struct sys_timeo** sys_timeouts_get_next_timeout(void);
+void lwip_cyclic_timer(void *arg);
+#endif
+
+#endif /* LWIP_TIMERS */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_TIMEOUTS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/udp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/udp.h
new file mode 100644
index 00000000000..b1c78e58d33
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/lwip/udp.h
@@ -0,0 +1,195 @@
+/**
+ * @file
+ * UDP API (to be used from TCPIP thread)\n
+ * See also @ref udp_raw
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_UDP_H
+#define LWIP_HDR_UDP_H
+
+#include "lwip/opt.h"
+
+#if LWIP_UDP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/pbuf.h"
+#include "lwip/netif.h"
+#include "lwip/ip_addr.h"
+#include "lwip/ip.h"
+#include "lwip/ip6_addr.h"
+#include "lwip/prot/udp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define UDP_FLAGS_NOCHKSUM       0x01U
+#define UDP_FLAGS_UDPLITE        0x02U
+#define UDP_FLAGS_CONNECTED      0x04U
+#define UDP_FLAGS_MULTICAST_LOOP 0x08U
+
+struct udp_pcb;
+
+/** Function prototype for udp pcb receive callback functions
+ * addr and port are in same byte order as in the pcb
+ * The callback is responsible for freeing the pbuf
+ * if it's not used any more.
+ *
+ * ATTENTION: Be aware that 'addr' might point into the pbuf 'p' so freeing this pbuf
+ *            can make 'addr' invalid, too.
+ *
+ * @param arg user supplied argument (udp_pcb.recv_arg)
+ * @param pcb the udp_pcb which received data
+ * @param p the packet buffer that was received
+ * @param addr the remote IP address from which the packet was received
+ * @param port the remote port from which the packet was received
+ */
+typedef void (*udp_recv_fn)(void *arg, struct udp_pcb *pcb, struct pbuf *p,
+    const ip_addr_t *addr, u16_t port);
+
+/** the UDP protocol control block */
+struct udp_pcb {
+/** Common members of all PCB types */
+  IP_PCB;
+
+/* Protocol specific PCB members */
+
+  struct udp_pcb *next;
+
+  u8_t flags;
+  /** ports are in host byte order */
+  u16_t local_port, remote_port;
+
+#if LWIP_MULTICAST_TX_OPTIONS
+#if LWIP_IPV4
+  /** outgoing network interface for multicast packets, by IPv4 address (if not 'any') */
+  ip4_addr_t mcast_ip4;
+#endif /* LWIP_IPV4 */
+  /** outgoing network interface for multicast packets, by interface index (if nonzero) */
+  u8_t mcast_ifindex;
+  /** TTL for outgoing multicast packets */
+  u8_t mcast_ttl;
+#endif /* LWIP_MULTICAST_TX_OPTIONS */
+
+#if LWIP_UDPLITE
+  /** used for UDP_LITE only */
+  u16_t chksum_len_rx, chksum_len_tx;
+#endif /* LWIP_UDPLITE */
+
+  /** receive callback function */
+  udp_recv_fn recv;
+  /** user-supplied argument for the recv callback */
+  void *recv_arg;
+};
+/* udp_pcbs export for external reference (e.g. SNMP agent) */
+extern struct udp_pcb *udp_pcbs;
+
+/* The following functions is the application layer interface to the
+   UDP code. */
+struct udp_pcb * udp_new        (void);
+struct udp_pcb * udp_new_ip_type(u8_t type);
+void             udp_remove     (struct udp_pcb *pcb);
+err_t            udp_bind       (struct udp_pcb *pcb, const ip_addr_t *ipaddr,
+                                 u16_t port);
+void             udp_bind_netif (struct udp_pcb *pcb, const struct netif* netif);
+err_t            udp_connect    (struct udp_pcb *pcb, const ip_addr_t *ipaddr,
+                                 u16_t port);
+void             udp_disconnect (struct udp_pcb *pcb);
+void             udp_recv       (struct udp_pcb *pcb, udp_recv_fn recv,
+                                 void *recv_arg);
+err_t            udp_sendto_if  (struct udp_pcb *pcb, struct pbuf *p,
+                                 const ip_addr_t *dst_ip, u16_t dst_port,
+                                 struct netif *netif);
+err_t            udp_sendto_if_src(struct udp_pcb *pcb, struct pbuf *p,
+                                 const ip_addr_t *dst_ip, u16_t dst_port,
+                                 struct netif *netif, const ip_addr_t *src_ip);
+err_t            udp_sendto     (struct udp_pcb *pcb, struct pbuf *p,
+                                 const ip_addr_t *dst_ip, u16_t dst_port);
+err_t            udp_send       (struct udp_pcb *pcb, struct pbuf *p);
+
+#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
+err_t            udp_sendto_if_chksum(struct udp_pcb *pcb, struct pbuf *p,
+                                 const ip_addr_t *dst_ip, u16_t dst_port,
+                                 struct netif *netif, u8_t have_chksum,
+                                 u16_t chksum);
+err_t            udp_sendto_chksum(struct udp_pcb *pcb, struct pbuf *p,
+                                 const ip_addr_t *dst_ip, u16_t dst_port,
+                                 u8_t have_chksum, u16_t chksum);
+err_t            udp_send_chksum(struct udp_pcb *pcb, struct pbuf *p,
+                                 u8_t have_chksum, u16_t chksum);
+err_t            udp_sendto_if_src_chksum(struct udp_pcb *pcb, struct pbuf *p,
+                                 const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif,
+                                 u8_t have_chksum, u16_t chksum, const ip_addr_t *src_ip);
+#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
+
+#define          udp_flags(pcb) ((pcb)->flags)
+#define          udp_setflags(pcb, f)  ((pcb)->flags = (f))
+
+#define          udp_set_flags(pcb, set_flags)     do { (pcb)->flags = (u8_t)((pcb)->flags |  (set_flags)); } while(0)
+#define          udp_clear_flags(pcb, clr_flags)   do { (pcb)->flags = (u8_t)((pcb)->flags & (u8_t)(~(clr_flags) & 0xff)); } while(0)
+#define          udp_is_flag_set(pcb, flag)        (((pcb)->flags & (flag)) != 0)
+
+/* The following functions are the lower layer interface to UDP. */
+void             udp_input      (struct pbuf *p, struct netif *inp);
+
+void             udp_init       (void);
+
+/* for compatibility with older implementation */
+#define udp_new_ip6() udp_new_ip_type(IPADDR_TYPE_V6)
+
+#if LWIP_MULTICAST_TX_OPTIONS
+#if LWIP_IPV4
+#define udp_set_multicast_netif_addr(pcb, ip4addr) ip4_addr_copy((pcb)->mcast_ip4, *(ip4addr))
+#define udp_get_multicast_netif_addr(pcb)          (&(pcb)->mcast_ip4)
+#endif /* LWIP_IPV4 */
+#define udp_set_multicast_netif_index(pcb, idx)    ((pcb)->mcast_ifindex = (idx))
+#define udp_get_multicast_netif_index(pcb)         ((pcb)->mcast_ifindex)
+#define udp_set_multicast_ttl(pcb, value)          ((pcb)->mcast_ttl = (value))
+#define udp_get_multicast_ttl(pcb)                 ((pcb)->mcast_ttl)
+#endif /* LWIP_MULTICAST_TX_OPTIONS */
+
+#if UDP_DEBUG
+void udp_debug_print(struct udp_hdr *udphdr);
+#else
+#define udp_debug_print(udphdr)
+#endif
+
+void udp_netif_ip_addr_changed(const ip_addr_t* old_addr, const ip_addr_t* new_addr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_UDP */
+
+#endif /* LWIP_HDR_UDP_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/bridgeif.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/bridgeif.h
new file mode 100644
index 00000000000..f4f8cf14400
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/bridgeif.h
@@ -0,0 +1,127 @@
+/**
+ * @file
+ * lwIP netif implementing an IEEE 802.1D MAC Bridge
+ */
+
+/*
+ * Copyright (c) 2017 Simon Goldschmidt.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+#ifndef LWIP_HDR_NETIF_BRIDGEIF_H
+#define LWIP_HDR_NETIF_BRIDGEIF_H
+
+#include "netif/bridgeif_opts.h"
+
+#include "lwip/err.h"
+#include "lwip/prot/ethernet.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct netif;
+
+#if (BRIDGEIF_MAX_PORTS < 0) || (BRIDGEIF_MAX_PORTS >= 64)
+#error BRIDGEIF_MAX_PORTS must be [1..63]
+#elif BRIDGEIF_MAX_PORTS < 8
+typedef u8_t bridgeif_portmask_t;
+#elif BRIDGEIF_MAX_PORTS < 16
+typedef u16_t bridgeif_portmask_t;
+#elif BRIDGEIF_MAX_PORTS < 32
+typedef u32_t bridgeif_portmask_t;
+#elif BRIDGEIF_MAX_PORTS < 64
+typedef u64_t bridgeif_portmask_t;
+#endif
+
+#define BR_FLOOD ((bridgeif_portmask_t)-1)
+
+/** @ingroup bridgeif
+ * Initialisation data for @ref bridgeif_init.
+ * An instance of this type must be passed as parameter 'state' to @ref netif_add
+ * when the bridge is added.
+ */
+typedef struct bridgeif_initdata_s {
+  /** MAC address of the bridge (cannot use the netif's addresses) */
+  struct eth_addr ethaddr;
+  /** Maximum number of ports in the bridge (ports are stored in an array, this
+      influences memory allocated for netif->state of the bridge netif). */
+  u8_t            max_ports;
+  /** Maximum number of dynamic/learning entries in the bridge's forwarding database.
+      In the default implementation, this controls memory consumption only. */
+  u16_t           max_fdb_dynamic_entries;
+  /** Maximum number of static forwarding entries. Influences memory consumption! */
+  u16_t           max_fdb_static_entries;
+} bridgeif_initdata_t;
+
+/** @ingroup bridgeif
+ * Use this for constant initialization of a bridgeif_initdat_t
+ * (ethaddr must be passed as ETH_ADDR())
+ */
+#define BRIDGEIF_INITDATA1(max_ports, max_fdb_dynamic_entries, max_fdb_static_entries, ethaddr) {ethaddr, max_ports, max_fdb_dynamic_entries, max_fdb_static_entries}
+/** @ingroup bridgeif
+ * Use this for constant initialization of a bridgeif_initdat_t
+ * (each byte of ethaddr must be passed)
+ */
+#define BRIDGEIF_INITDATA2(max_ports, max_fdb_dynamic_entries, max_fdb_static_entries, e0, e1, e2, e3, e4, e5) {{e0, e1, e2, e3, e4, e5}, max_ports, max_fdb_dynamic_entries, max_fdb_static_entries}
+
+err_t bridgeif_init(struct netif *netif);
+err_t bridgeif_add_port(struct netif *bridgeif, struct netif *portif);
+err_t bridgeif_fdb_add(struct netif *bridgeif, const struct eth_addr *addr, bridgeif_portmask_t ports);
+err_t bridgeif_fdb_remove(struct netif *bridgeif, const struct eth_addr *addr);
+
+/* FDB interface, can be replaced by own implementation */
+void                bridgeif_fdb_update_src(void *fdb_ptr, struct eth_addr *src_addr, u8_t port_idx);
+bridgeif_portmask_t bridgeif_fdb_get_dst_ports(void *fdb_ptr, struct eth_addr *dst_addr);
+void*               bridgeif_fdb_init(u16_t max_fdb_entries);
+
+#if BRIDGEIF_PORT_NETIFS_OUTPUT_DIRECT
+#ifndef BRIDGEIF_DECL_PROTECT
+/* define bridgeif protection to sys_arch_protect... */
+#include "lwip/sys.h"
+#define BRIDGEIF_DECL_PROTECT(lev)    SYS_ARCH_DECL_PROTECT(lev)
+#define BRIDGEIF_READ_PROTECT(lev)    SYS_ARCH_PROTECT(lev)
+#define BRIDGEIF_READ_UNPROTECT(lev)  SYS_ARCH_UNPROTECT(lev)
+#define BRIDGEIF_WRITE_PROTECT(lev)
+#define BRIDGEIF_WRITE_UNPROTECT(lev)
+#endif
+#else /* BRIDGEIF_PORT_NETIFS_OUTPUT_DIRECT */
+#include "lwip/tcpip.h"
+#define BRIDGEIF_DECL_PROTECT(lev)
+#define BRIDGEIF_READ_PROTECT(lev)
+#define BRIDGEIF_READ_UNPROTECT(lev)
+#define BRIDGEIF_WRITE_PROTECT(lev)
+#define BRIDGEIF_WRITE_UNPROTECT(lev)
+#endif /* BRIDGEIF_PORT_NETIFS_OUTPUT_DIRECT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_NETIF_BRIDGEIF_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/bridgeif_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/bridgeif_opts.h
new file mode 100644
index 00000000000..b85c3017494
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/bridgeif_opts.h
@@ -0,0 +1,90 @@
+/**
+ * @file
+ * lwIP netif implementing an IEEE 802.1D MAC Bridge
+ */
+
+/*
+ * Copyright (c) 2017 Simon Goldschmidt.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+
+#ifndef LWIP_HDR_NETIF_BRIDGEIF_OPTS_H
+#define LWIP_HDR_NETIF_BRIDGEIF_OPTS_H
+
+#include "lwip/opt.h"
+
+/**
+ * @defgroup bridgeif_opts Options
+ * @ingroup bridgeif
+ * @{
+ */
+
+/** BRIDGEIF_PORT_NETIFS_OUTPUT_DIRECT==1: set port netif's 'input' function
+ * to call directly into bridgeif code and on top of that, directly call into
+ * the selected forwarding port's 'linkoutput' function.
+ * This means that the bridgeif input/output path is protected from concurrent access
+ * but as well, *all* bridge port netif's drivers must correctly handle concurrent access!
+ * == 0: get into tcpip_thread for every input packet (no multithreading)
+ * ATTENTION: as ==0 relies on tcpip.h, the default depends on NO_SYS setting
+ */
+#ifndef BRIDGEIF_PORT_NETIFS_OUTPUT_DIRECT
+#define BRIDGEIF_PORT_NETIFS_OUTPUT_DIRECT  NO_SYS
+#endif
+
+/** BRIDGEIF_MAX_PORTS: this is used to create a typedef used for forwarding
+ * bit-fields: the number of bits required is this + 1 (for the internal/cpu port)
+ * (63 is the maximum, resulting in an u64_t for the bit mask)
+ * ATTENTION: this controls the maximum number of the implementation only!
+ * The max. number of ports per bridge must still be passed via netif_add parameter!
+ */
+#ifndef BRIDGEIF_MAX_PORTS
+#define BRIDGEIF_MAX_PORTS                  7
+#endif
+
+/** BRIDGEIF_DEBUG: Enable generic debugging in bridgeif.c. */
+#ifndef BRIDGEIF_DEBUG
+#define BRIDGEIF_DEBUG                      LWIP_DBG_OFF
+#endif
+
+/** BRIDGEIF_DEBUG: Enable FDB debugging in bridgeif.c. */
+#ifndef BRIDGEIF_FDB_DEBUG
+#define BRIDGEIF_FDB_DEBUG                  LWIP_DBG_OFF
+#endif
+
+/** BRIDGEIF_DEBUG: Enable forwarding debugging in bridgeif.c. */
+#ifndef BRIDGEIF_FW_DEBUG
+#define BRIDGEIF_FW_DEBUG                   LWIP_DBG_OFF
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* LWIP_HDR_NETIF_BRIDGEIF_OPTS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/etharp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/etharp.h
new file mode 100644
index 00000000000..b536fd280fa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/etharp.h
@@ -0,0 +1,3 @@
+/* ARP has been moved to core/ipv4, provide this #include for compatibility only */
+#include "lwip/etharp.h"
+#include "netif/ethernet.h"
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ethernet.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ethernet.h
new file mode 100644
index 00000000000..49649cbf8b2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ethernet.h
@@ -0,0 +1,77 @@
+/**
+ * @file
+ * Ethernet input function - handles INCOMING ethernet level traffic
+ * To be used in most low-level netif implementations
+ */
+
+/*
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
+ * Copyright (c) 2003-2004 Leon Woestenberg <leon.woestenberg@axon.tv>
+ * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+
+#ifndef LWIP_HDR_NETIF_ETHERNET_H
+#define LWIP_HDR_NETIF_ETHERNET_H
+
+#include "lwip/opt.h"
+
+#include "lwip/pbuf.h"
+#include "lwip/netif.h"
+#include "lwip/prot/ethernet.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if LWIP_ARP || LWIP_ETHERNET
+
+/** Define this to 1 and define LWIP_ARP_FILTER_NETIF_FN(pbuf, netif, type)
+ * to a filter function that returns the correct netif when using multiple
+ * netifs on one hardware interface where the netif's low-level receive
+ * routine cannot decide for the correct netif (e.g. when mapping multiple
+ * IP addresses to one hardware interface).
+ */
+#ifndef LWIP_ARP_FILTER_NETIF
+#define LWIP_ARP_FILTER_NETIF 0
+#endif
+
+err_t ethernet_input(struct pbuf *p, struct netif *netif);
+err_t ethernet_output(struct netif* netif, struct pbuf* p, const struct eth_addr* src, const struct eth_addr* dst, u16_t eth_type);
+
+extern const struct eth_addr ethbroadcast, ethzero;
+
+#endif /* LWIP_ARP || LWIP_ETHERNET */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_NETIF_ETHERNET_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ieee802154.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ieee802154.h
new file mode 100644
index 00000000000..54e019fd0ac
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ieee802154.h
@@ -0,0 +1,112 @@
+/**
+ * @file
+ * Definitions for IEEE 802.15.4 MAC frames
+ */
+
+/*
+ * Copyright (c) 2018 Simon Goldschmidt.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+#ifndef LWIP_HDR_NETIF_IEEE802154_H
+#define LWIP_HDR_NETIF_IEEE802154_H
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+/** General MAC frame format
+ * This shows the full featured header, mainly for documentation.
+ * Some fields are omitted or shortened to achieve frame compression.
+ */
+struct ieee_802154_hdr {
+  /** See IEEE_802154_FC_* defines */
+  PACK_STRUCT_FIELD(u16_t frame_control);
+  /** Sequence number is omitted if IEEE_802154_FC_SEQNO_SUPPR is set in frame_control */
+  PACK_STRUCT_FLD_8(u8_t  sequence_number);
+  /** Destination PAN ID is omitted if Destination Addressing Mode is 0 */
+  PACK_STRUCT_FIELD(u16_t destination_pan_id);
+  /** Destination Address is omitted if Destination Addressing Mode is 0 */
+  PACK_STRUCT_FLD_8(u8_t destination_address[8]);
+  /** Source PAN ID is omitted if Source Addressing Mode is 0
+      or if IEEE_802154_FC_PANID_COMPR is set in frame control*/
+  PACK_STRUCT_FIELD(u16_t source_pan_id);
+  /** Source Address is omitted if Source Addressing Mode is 0 */
+  PACK_STRUCT_FLD_8(u8_t source_address[8]);
+  /* The rest is variable */
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+/* Addressing modes (2 bits) */
+#define IEEE_802154_ADDR_MODE_NO_ADDR   0x00 /* PAN ID and address fields are not present */
+#define IEEE_802154_ADDR_MODE_RESERVED  0x01 /* Reserved */
+#define IEEE_802154_ADDR_MODE_SHORT     0x02 /* Address field contains a short address (16 bit) */
+#define IEEE_802154_ADDR_MODE_EXT       0x03 /* Address field contains an extended address (64 bit) */
+
+/* IEEE 802.15.4 Frame Control definitions (2 bytes; see IEEE 802.15.4-2015 ch. 7.2.1) */
+#define IEEE_802154_FC_FT_MASK             0x0007 /* bits 0..2: Frame Type */
+#define IEEE_802154_FC_FT_BEACON               0x00
+#define IEEE_802154_FC_FT_DATA                 0x01
+#define IEEE_802154_FC_FT_ACK                  0x02
+#define IEEE_802154_FC_FT_MAC_CMD              0x03
+#define IEEE_802154_FC_FT_RESERVED             0x04
+#define IEEE_802154_FC_FT_MULTIPURPOSE         0x05
+#define IEEE_802154_FC_FT_FRAG                 0x06
+#define IEEE_802154_FC_FT_EXT                  0x07
+#define IEEE_802154_FC_SEC_EN              0x0008 /* bit 3: Security Enabled */
+#define IEEE_802154_FC_FRAME_PEND          0x0010 /* bit 4: Frame Pending */
+#define IEEE_802154_FC_ACK_REQ             0x0020 /* bit 5: AR (ACK required) */
+#define IEEE_802154_FC_PANID_COMPR         0x0040 /* bit 6: PAN ID Compression (src and dst are equal, src PAN ID omitted) */
+#define IEEE_802154_FC_RESERVED            0x0080
+#define IEEE_802154_FC_SEQNO_SUPPR         0x0100 /* bit 8: Sequence Number Suppression */
+#define IEEE_802154_FC_IE_PRESENT          0x0200 /* bit 9: IE Present */
+#define IEEE_802154_FC_DST_ADDR_MODE_MASK  0x0c00 /* bits 10..11: Destination Addressing Mode */
+#define IEEE_802154_FC_DST_ADDR_MODE_NO_ADDR   (IEEE_802154_ADDR_MODE_NO_ADDR << 10)
+#define IEEE_802154_FC_DST_ADDR_MODE_SHORT     (IEEE_802154_ADDR_MODE_SHORT << 10)
+#define IEEE_802154_FC_DST_ADDR_MODE_EXT       (IEEE_802154_ADDR_MODE_EXT << 10)
+#define IEEE_802154_FC_FRAME_VERSION_MASK  0x3000 /* bits 12..13: Frame Version */
+#define IEEE_802154_FC_FRAME_VERSION_GET(x)    (((x) & IEEE_802154_FC_FRAME_VERSION_MASK) >> 12)
+#define IEEE_802154_FC_SRC_ADDR_MODE_MASK  0xc000 /* bits 14..15: Source Addressing Mode */
+#define IEEE_802154_FC_SRC_ADDR_MODE_SHORT     (IEEE_802154_ADDR_MODE_SHORT << 14)
+#define IEEE_802154_FC_SRC_ADDR_MODE_EXT       (IEEE_802154_ADDR_MODE_EXT << 14)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_NETIF_IEEE802154_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6.h
new file mode 100644
index 00000000000..ecff24ba667
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6.h
@@ -0,0 +1,89 @@
+/**
+ * @file
+ *
+ * 6LowPAN output for IPv6. Uses ND tables for link-layer addressing. Fragments packets to 6LowPAN units.
+ */
+
+/*
+ * Copyright (c) 2015 Inico Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Ivan Delamer <delamer@inicotech.com>
+ *
+ *
+ * Please coordinate changes and requests with Ivan Delamer
+ * <delamer@inicotech.com>
+ */
+
+#ifndef LWIP_HDR_LOWPAN6_H
+#define LWIP_HDR_LOWPAN6_H
+
+#include "netif/lowpan6_opts.h"
+
+#if LWIP_IPV6
+
+#include "netif/lowpan6_common.h"
+#include "lwip/pbuf.h"
+#include "lwip/ip.h"
+#include "lwip/ip_addr.h"
+#include "lwip/netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** 1 second period for reassembly */
+#define LOWPAN6_TMR_INTERVAL 1000
+
+void lowpan6_tmr(void);
+
+err_t lowpan6_set_context(u8_t idx, const ip6_addr_t * context);
+err_t lowpan6_set_short_addr(u8_t addr_high, u8_t addr_low);
+
+#if LWIP_IPV4
+err_t lowpan4_output(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr);
+#endif /* LWIP_IPV4 */
+err_t lowpan6_output(struct netif *netif, struct pbuf *q, const ip6_addr_t *ip6addr);
+err_t lowpan6_input(struct pbuf * p, struct netif *netif);
+err_t lowpan6_if_init(struct netif *netif);
+
+/* pan_id in network byte order. */
+err_t lowpan6_set_pan_id(u16_t pan_id);
+
+u16_t lowpan6_calc_crc(const void *buf, u16_t len);
+
+#if !NO_SYS
+err_t tcpip_6lowpan_input(struct pbuf *p, struct netif *inp);
+#endif /* !NO_SYS */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV6 */
+
+#endif /* LWIP_HDR_LOWPAN6_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6_ble.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6_ble.h
new file mode 100644
index 00000000000..01896a7ff67
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6_ble.h
@@ -0,0 +1,78 @@
+/**
+ * @file
+ * 6LowPAN over BLE for IPv6 (RFC7668).
+ */
+
+/*
+ * Copyright (c) 2017 Benjamin Aigner
+ * Copyright (c) 2015 Inico Technologies Ltd. , Author: Ivan Delamer <delamer@inicotech.com>
+ * 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * Author: Benjamin Aigner <aignerb@technikum-wien.at>
+ * 
+ * Based on the original 6lowpan implementation of lwIP ( @see 6lowpan.c)
+ */
+ 
+#ifndef LWIP_HDR_LOWPAN6_BLE_H
+#define LWIP_HDR_LOWPAN6_BLE_H
+
+#include "netif/lowpan6_opts.h"
+
+#if LWIP_IPV6 /* don't build if not configured for use in lwipopts.h */
+
+#include "netif/lowpan6_common.h"
+#include "lwip/pbuf.h"
+#include "lwip/ip.h"
+#include "lwip/ip_addr.h"
+#include "lwip/netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+err_t rfc7668_output(struct netif *netif, struct pbuf *q, const ip6_addr_t *ip6addr);
+err_t rfc7668_input(struct pbuf * p, struct netif *netif);
+err_t rfc7668_set_local_addr_eui64(struct netif *netif, const u8_t *local_addr, size_t local_addr_len);
+err_t rfc7668_set_local_addr_mac48(struct netif *netif, const u8_t *local_addr, size_t local_addr_len, int is_public_addr);
+err_t rfc7668_set_peer_addr_eui64(struct netif *netif, const u8_t *peer_addr, size_t peer_addr_len);
+err_t rfc7668_set_peer_addr_mac48(struct netif *netif, const u8_t *peer_addr, size_t peer_addr_len, int is_public_addr);
+err_t rfc7668_set_context(u8_t index, const ip6_addr_t * context);
+err_t rfc7668_if_init(struct netif *netif);
+
+#if !NO_SYS
+err_t tcpip_rfc7668_input(struct pbuf *p, struct netif *inp);
+#endif
+
+void ble_addr_to_eui64(uint8_t *dst, const uint8_t *src, int public_addr);
+void eui64_to_ble_addr(uint8_t *dst, const uint8_t *src);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV6 */
+
+#endif /* LWIP_HDR_LOWPAN6_BLE_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6_common.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6_common.h
new file mode 100644
index 00000000000..0dc13ab5bfd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6_common.h
@@ -0,0 +1,82 @@
+/**
+ * @file
+ *
+ * Common 6LowPAN routines for IPv6. Uses ND tables for link-layer addressing. Fragments packets to 6LowPAN units.
+ */
+
+/*
+ * Copyright (c) 2015 Inico Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Ivan Delamer <delamer@inicotech.com>
+ *
+ *
+ * Please coordinate changes and requests with Ivan Delamer
+ * <delamer@inicotech.com>
+ */
+
+#ifndef LWIP_HDR_LOWPAN6_COMMON_H
+#define LWIP_HDR_LOWPAN6_COMMON_H
+
+#include "netif/lowpan6_opts.h"
+
+#if LWIP_IPV6 /* don't build if IPv6 is disabled in lwipopts.h */
+
+#include "lwip/pbuf.h"
+#include "lwip/ip.h"
+#include "lwip/ip6_addr.h"
+#include "lwip/netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Helper define for a link layer address, which can be encoded as 0, 2 or 8 bytes */
+struct lowpan6_link_addr {
+  /* encoded length of the address */
+  u8_t addr_len;
+  /* address bytes */
+  u8_t addr[8];
+};
+
+s8_t lowpan6_get_address_mode(const ip6_addr_t *ip6addr, const struct lowpan6_link_addr *mac_addr);
+
+#if LWIP_6LOWPAN_IPHC
+err_t lowpan6_compress_headers(struct netif *netif, u8_t *inbuf, size_t inbuf_size, u8_t *outbuf, size_t outbuf_size,
+                               u8_t *lowpan6_header_len_out, u8_t *hidden_header_len_out, ip6_addr_t *lowpan6_contexts,
+                               const struct lowpan6_link_addr *src, const struct lowpan6_link_addr *dst);
+struct pbuf *lowpan6_decompress(struct pbuf *p, u16_t datagram_size, ip6_addr_t *lowpan6_contexts,
+                                struct lowpan6_link_addr *src, struct lowpan6_link_addr *dest);
+#endif /* LWIP_6LOWPAN_IPHC */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV6 */
+
+#endif /* LWIP_HDR_LOWPAN6_COMMON_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6_opts.h
new file mode 100644
index 00000000000..17d46cdcc55
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/lowpan6_opts.h
@@ -0,0 +1,122 @@
+/**
+ * @file
+ * 6LowPAN options list
+ */
+
+/*
+ * Copyright (c) 2015 Inico Technologies Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Ivan Delamer <delamer@inicotech.com>
+ *
+ *
+ * Please coordinate changes and requests with Ivan Delamer
+ * <delamer@inicotech.com>
+ */
+
+#ifndef LWIP_HDR_LOWPAN6_OPTS_H
+#define LWIP_HDR_LOWPAN6_OPTS_H
+
+#include "lwip/opt.h"
+
+/** LWIP_6LOWPAN_NUM_CONTEXTS: define the number of compression
+ * contexts per netif type
+ */
+#ifndef LWIP_6LOWPAN_NUM_CONTEXTS
+#define LWIP_6LOWPAN_NUM_CONTEXTS        10
+#endif
+
+/** LWIP_6LOWPAN_INFER_SHORT_ADDRESS: set this to 0 to disable creating
+ * short addresses for matching addresses (debug only)
+ */
+#ifndef LWIP_6LOWPAN_INFER_SHORT_ADDRESS
+#define LWIP_6LOWPAN_INFER_SHORT_ADDRESS 1
+#endif
+
+/** LWIP_6LOWPAN_IPHC: set this to 0 to disable IP header compression as per
+ * RFC 6282 (which is mandatory for BLE)
+ */
+#ifndef LWIP_6LOWPAN_IPHC
+#define LWIP_6LOWPAN_IPHC                1
+#endif
+
+/** Set this to 1 if your IEEE 802.15.4 interface can calculate and check the
+ * CRC in hardware. This means TX packets get 2 zero bytes added on transmission
+ * which are to be filled with the CRC.
+ */
+#ifndef LWIP_6LOWPAN_802154_HW_CRC
+#define LWIP_6LOWPAN_802154_HW_CRC       0
+#endif
+
+/** If LWIP_6LOWPAN_802154_HW_CRC==0, this can override the default slow
+ * implementation of the CRC used for 6LoWPAN over IEEE 802.15.4 (which uses
+ * a shift register).
+ */
+#ifndef LWIP_6LOWPAN_CALC_CRC
+#define LWIP_6LOWPAN_CALC_CRC(buf, len)  lowpan6_calc_crc(buf, len)
+#endif
+
+/** Debug level for 6LoWPAN in general */
+#ifndef LWIP_LOWPAN6_DEBUG
+#define LWIP_LOWPAN6_DEBUG               LWIP_DBG_OFF
+#endif
+
+/** Debug level for 6LoWPAN over IEEE 802.15.4 */
+#ifndef LWIP_LOWPAN6_802154_DEBUG
+#define LWIP_LOWPAN6_802154_DEBUG        LWIP_DBG_OFF
+#endif
+
+/** LWIP_LOWPAN6_IP_COMPRESSED_DEBUG: enable compressed IP frame
+ * output debugging
+ */
+#ifndef LWIP_LOWPAN6_IP_COMPRESSED_DEBUG
+#define LWIP_LOWPAN6_IP_COMPRESSED_DEBUG      LWIP_DBG_OFF
+#endif
+
+/** LWIP_LOWPAN6_DECOMPRESSION_DEBUG: enable decompression debug output
+ */
+#ifndef LWIP_LOWPAN6_DECOMPRESSION_DEBUG
+#define LWIP_LOWPAN6_DECOMPRESSION_DEBUG      LWIP_DBG_OFF
+#endif
+
+/** LWIP_RFC7668_IP_UNCOMPRESSED_DEBUG: enable decompressed IP frame
+ * output debugging */
+#ifndef LWIP_RFC7668_IP_UNCOMPRESSED_DEBUG
+#define LWIP_RFC7668_IP_UNCOMPRESSED_DEBUG    LWIP_DBG_OFF
+#endif
+
+/** LWIP_RFC7668_LINUX_WORKAROUND_PUBLIC_ADDRESS: 
+ * Currently, the linux kernel driver for 6lowpan sets/clears a bit in
+ * the address, depending on the BD address (either public or not).
+ * Might not be RFC7668 conform, so you may select to do that (=1) or
+ * not (=0) */
+#ifndef LWIP_RFC7668_LINUX_WORKAROUND_PUBLIC_ADDRESS
+#define LWIP_RFC7668_LINUX_WORKAROUND_PUBLIC_ADDRESS 1
+#endif
+
+
+#endif /* LWIP_HDR_LOWPAN6_OPTS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ccp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ccp.h
new file mode 100644
index 00000000000..b2285228b8d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ccp.h
@@ -0,0 +1,164 @@
+/*
+ * ccp.h - Definitions for PPP Compression Control Protocol.
+ *
+ * Copyright (c) 1994-2002 Paul Mackerras. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. The name(s) of the authors of this software must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission.
+ *
+ * 3. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Paul Mackerras
+ *     <paulus@samba.org>".
+ *
+ * THE AUTHORS OF THIS SOFTWARE DISCLAIM ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY
+ * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $Id: ccp.h,v 1.12 2004/11/04 10:02:26 paulus Exp $
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && CCP_SUPPORT  /* don't build if not configured for use in lwipopts.h */
+
+#ifndef CCP_H
+#define CCP_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * CCP codes.
+ */
+
+#define CCP_CONFREQ	1
+#define CCP_CONFACK	2
+#define CCP_TERMREQ	5
+#define CCP_TERMACK	6
+#define CCP_RESETREQ	14
+#define CCP_RESETACK	15
+
+/*
+ * Max # bytes for a CCP option
+ */
+
+#define CCP_MAX_OPTION_LENGTH	32
+
+/*
+ * Parts of a CCP packet.
+ */
+
+#define CCP_CODE(dp)		((dp)[0])
+#define CCP_ID(dp)		((dp)[1])
+#define CCP_LENGTH(dp)		(((dp)[2] << 8) + (dp)[3])
+#define CCP_HDRLEN		4
+
+#define CCP_OPT_CODE(dp)	((dp)[0])
+#define CCP_OPT_LENGTH(dp)	((dp)[1])
+#define CCP_OPT_MINLEN		2
+
+#if BSDCOMPRESS_SUPPORT
+/*
+ * Definitions for BSD-Compress.
+ */
+
+#define CI_BSD_COMPRESS		21	/* config. option for BSD-Compress */
+#define CILEN_BSD_COMPRESS	3	/* length of config. option */
+
+/* Macros for handling the 3rd byte of the BSD-Compress config option. */
+#define BSD_NBITS(x)		((x) & 0x1F)	/* number of bits requested */
+#define BSD_VERSION(x)		((x) >> 5)	/* version of option format */
+#define BSD_CURRENT_VERSION	1		/* current version number */
+#define BSD_MAKE_OPT(v, n)	(((v) << 5) | (n))
+
+#define BSD_MIN_BITS		9	/* smallest code size supported */
+#define BSD_MAX_BITS		15	/* largest code size supported */
+#endif /* BSDCOMPRESS_SUPPORT */
+
+#if DEFLATE_SUPPORT
+/*
+ * Definitions for Deflate.
+ */
+
+#define CI_DEFLATE		26	/* config option for Deflate */
+#define CI_DEFLATE_DRAFT	24	/* value used in original draft RFC */
+#define CILEN_DEFLATE		4	/* length of its config option */
+
+#define DEFLATE_MIN_SIZE	9
+#define DEFLATE_MAX_SIZE	15
+#define DEFLATE_METHOD_VAL	8
+#define DEFLATE_SIZE(x)		(((x) >> 4) + 8)
+#define DEFLATE_METHOD(x)	((x) & 0x0F)
+#define DEFLATE_MAKE_OPT(w)	((((w) - 8) << 4) + DEFLATE_METHOD_VAL)
+#define DEFLATE_CHK_SEQUENCE	0
+#endif /* DEFLATE_SUPPORT */
+
+#if MPPE_SUPPORT
+/*
+ * Definitions for MPPE.
+ */
+
+#define CI_MPPE                18      /* config option for MPPE */
+#define CILEN_MPPE              6      /* length of config option */
+#endif /* MPPE_SUPPORT */
+
+#if PREDICTOR_SUPPORT
+/*
+ * Definitions for other, as yet unsupported, compression methods.
+ */
+
+#define CI_PREDICTOR_1		1	/* config option for Predictor-1 */
+#define CILEN_PREDICTOR_1	2	/* length of its config option */
+#define CI_PREDICTOR_2		2	/* config option for Predictor-2 */
+#define CILEN_PREDICTOR_2	2	/* length of its config option */
+#endif /* PREDICTOR_SUPPORT */
+
+typedef struct ccp_options {
+#if DEFLATE_SUPPORT
+    unsigned int deflate          :1; /* do Deflate? */
+    unsigned int deflate_correct  :1; /* use correct code for deflate? */
+    unsigned int deflate_draft    :1; /* use draft RFC code for deflate? */
+#endif /* DEFLATE_SUPPORT */
+#if BSDCOMPRESS_SUPPORT
+    unsigned int bsd_compress     :1; /* do BSD Compress? */
+#endif /* BSDCOMPRESS_SUPPORT */
+#if PREDICTOR_SUPPORT
+    unsigned int predictor_1      :1; /* do Predictor-1? */
+    unsigned int predictor_2      :1; /* do Predictor-2? */
+#endif /* PREDICTOR_SUPPORT */
+
+#if MPPE_SUPPORT
+    u8_t mppe;			/* MPPE bitfield */
+#endif /* MPPE_SUPPORT */
+#if BSDCOMPRESS_SUPPORT
+    u_short bsd_bits;		/* # bits/code for BSD Compress */
+#endif /* BSDCOMPRESS_SUPPORT */
+#if DEFLATE_SUPPORT
+    u_short deflate_size;	/* lg(window size) for Deflate */
+#endif /* DEFLATE_SUPPORT */
+    u8_t method;		/* code for chosen compression method */
+} ccp_options;
+
+extern const struct protent ccp_protent;
+
+void ccp_resetrequest(ppp_pcb *pcb);  /* Issue a reset-request. */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CCP_H */
+#endif /* PPP_SUPPORT && CCP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/chap-md5.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/chap-md5.h
new file mode 100644
index 00000000000..eb0269fe508
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/chap-md5.h
@@ -0,0 +1,36 @@
+/*
+ * chap-md5.h - New CHAP/MD5 implementation.
+ *
+ * Copyright (c) 2003 Paul Mackerras. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. The name(s) of the authors of this software must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission.
+ *
+ * 3. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Paul Mackerras
+ *     <paulus@samba.org>".
+ *
+ * THE AUTHORS OF THIS SOFTWARE DISCLAIM ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY
+ * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && CHAP_SUPPORT  /* don't build if not configured for use in lwipopts.h */
+
+extern const struct chap_digest_type md5_digest;
+
+#endif /* PPP_SUPPORT && CHAP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/chap-new.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/chap-new.h
new file mode 100644
index 00000000000..2d8cd9ca990
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/chap-new.h
@@ -0,0 +1,200 @@
+/*
+ * chap-new.c - New CHAP implementation.
+ *
+ * Copyright (c) 2003 Paul Mackerras. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. The name(s) of the authors of this software must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission.
+ *
+ * 3. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Paul Mackerras
+ *     <paulus@samba.org>".
+ *
+ * THE AUTHORS OF THIS SOFTWARE DISCLAIM ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY
+ * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && CHAP_SUPPORT  /* don't build if not configured for use in lwipopts.h */
+
+#ifndef CHAP_H
+#define CHAP_H
+
+#include "ppp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * CHAP packets begin with a standard header with code, id, len (2 bytes).
+ */
+#define CHAP_HDRLEN	4
+
+/*
+ * Values for the code field.
+ */
+#define CHAP_CHALLENGE	1
+#define CHAP_RESPONSE	2
+#define CHAP_SUCCESS	3
+#define CHAP_FAILURE	4
+
+/*
+ * CHAP digest codes.
+ */
+#define CHAP_MD5		5
+#if MSCHAP_SUPPORT
+#define CHAP_MICROSOFT		0x80
+#define CHAP_MICROSOFT_V2	0x81
+#endif /* MSCHAP_SUPPORT */
+
+/*
+ * Semi-arbitrary limits on challenge and response fields.
+ */
+#define MAX_CHALLENGE_LEN	64
+#define MAX_RESPONSE_LEN	64
+
+/*
+ * These limits apply to challenge and response packets we send.
+ * The +4 is the +1 that we actually need rounded up.
+ */
+#define CHAL_MAX_PKTLEN	(PPP_HDRLEN + CHAP_HDRLEN + 4 + MAX_CHALLENGE_LEN + MAXNAMELEN)
+#define RESP_MAX_PKTLEN	(PPP_HDRLEN + CHAP_HDRLEN + 4 + MAX_RESPONSE_LEN + MAXNAMELEN)
+
+/* bitmask of supported algorithms */
+#if MSCHAP_SUPPORT
+#define MDTYPE_MICROSOFT_V2	0x1
+#define MDTYPE_MICROSOFT	0x2
+#endif /* MSCHAP_SUPPORT */
+#define MDTYPE_MD5		0x4
+#define MDTYPE_NONE		0
+
+#if MSCHAP_SUPPORT
+/* Return the digest alg. ID for the most preferred digest type. */
+#define CHAP_DIGEST(mdtype) \
+    ((mdtype) & MDTYPE_MD5)? CHAP_MD5: \
+    ((mdtype) & MDTYPE_MICROSOFT_V2)? CHAP_MICROSOFT_V2: \
+    ((mdtype) & MDTYPE_MICROSOFT)? CHAP_MICROSOFT: \
+    0
+#else /* !MSCHAP_SUPPORT */
+#define CHAP_DIGEST(mdtype) \
+    ((mdtype) & MDTYPE_MD5)? CHAP_MD5: \
+    0
+#endif /* MSCHAP_SUPPORT */
+
+/* Return the bit flag (lsb set) for our most preferred digest type. */
+#define CHAP_MDTYPE(mdtype) ((mdtype) ^ ((mdtype) - 1)) & (mdtype)
+
+/* Return the bit flag for a given digest algorithm ID. */
+#if MSCHAP_SUPPORT
+#define CHAP_MDTYPE_D(digest) \
+    ((digest) == CHAP_MICROSOFT_V2)? MDTYPE_MICROSOFT_V2: \
+    ((digest) == CHAP_MICROSOFT)? MDTYPE_MICROSOFT: \
+    ((digest) == CHAP_MD5)? MDTYPE_MD5: \
+    0
+#else /* !MSCHAP_SUPPORT */
+#define CHAP_MDTYPE_D(digest) \
+    ((digest) == CHAP_MD5)? MDTYPE_MD5: \
+    0
+#endif /* MSCHAP_SUPPORT */
+
+/* Can we do the requested digest? */
+#if MSCHAP_SUPPORT
+#define CHAP_CANDIGEST(mdtype, digest) \
+    ((digest) == CHAP_MICROSOFT_V2)? (mdtype) & MDTYPE_MICROSOFT_V2: \
+    ((digest) == CHAP_MICROSOFT)? (mdtype) & MDTYPE_MICROSOFT: \
+    ((digest) == CHAP_MD5)? (mdtype) & MDTYPE_MD5: \
+    0
+#else /* !MSCHAP_SUPPORT */
+#define CHAP_CANDIGEST(mdtype, digest) \
+    ((digest) == CHAP_MD5)? (mdtype) & MDTYPE_MD5: \
+    0
+#endif /* MSCHAP_SUPPORT */
+
+/*
+ * The code for each digest type has to supply one of these.
+ */
+struct chap_digest_type {
+	int code;
+
+#if PPP_SERVER
+	/*
+	 * Note: challenge and response arguments below are formatted as
+	 * a length byte followed by the actual challenge/response data.
+	 */
+	void (*generate_challenge)(ppp_pcb *pcb, unsigned char *challenge);
+	int (*verify_response)(ppp_pcb *pcb, int id, const char *name,
+		const unsigned char *secret, int secret_len,
+		const unsigned char *challenge, const unsigned char *response,
+		char *message, int message_space);
+#endif /* PPP_SERVER */
+	void (*make_response)(ppp_pcb *pcb, unsigned char *response, int id, const char *our_name,
+		const unsigned char *challenge, const char *secret, int secret_len,
+		unsigned char *priv);
+	int (*check_success)(ppp_pcb *pcb, unsigned char *pkt, int len, unsigned char *priv);
+	void (*handle_failure)(ppp_pcb *pcb, unsigned char *pkt, int len);
+};
+
+/*
+ * Each interface is described by chap structure.
+ */
+#if CHAP_SUPPORT
+typedef struct chap_client_state {
+	u8_t flags;
+	const char *name;
+	const struct chap_digest_type *digest;
+	unsigned char priv[64];		/* private area for digest's use */
+} chap_client_state;
+
+#if PPP_SERVER
+typedef struct chap_server_state {
+	u8_t flags;
+	u8_t id;
+	const char *name;
+	const struct chap_digest_type *digest;
+	int challenge_xmits;
+	int challenge_pktlen;
+	unsigned char challenge[CHAL_MAX_PKTLEN];
+} chap_server_state;
+#endif /* PPP_SERVER */
+#endif /* CHAP_SUPPORT */
+
+#if 0 /* UNUSED */
+/* Hook for a plugin to validate CHAP challenge */
+extern int (*chap_verify_hook)(char *name, char *ourname, int id,
+			const struct chap_digest_type *digest,
+			unsigned char *challenge, unsigned char *response,
+			char *message, int message_space);
+#endif /* UNUSED */
+
+#if PPP_SERVER
+/* Called by authentication code to start authenticating the peer. */
+extern void chap_auth_peer(ppp_pcb *pcb, const char *our_name, int digest_code);
+#endif /* PPP_SERVER */
+
+/* Called by auth. code to start authenticating us to the peer. */
+extern void chap_auth_with_peer(ppp_pcb *pcb, const char *our_name, int digest_code);
+
+/* Represents the CHAP protocol to the main pppd code */
+extern const struct protent chap_protent;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CHAP_H */
+#endif /* PPP_SUPPORT && CHAP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/chap_ms.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/chap_ms.h
new file mode 100644
index 00000000000..0795291158f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/chap_ms.h
@@ -0,0 +1,44 @@
+/*
+ * chap_ms.h - Challenge Handshake Authentication Protocol definitions.
+ *
+ * Copyright (c) 1995 Eric Rosenquist.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name(s) of the authors of this software must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission.
+ *
+ * THE AUTHORS OF THIS SOFTWARE DISCLAIM ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY
+ * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $Id: chap_ms.h,v 1.13 2004/11/15 22:13:26 paulus Exp $
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && MSCHAP_SUPPORT  /* don't build if not configured for use in lwipopts.h */
+
+#ifndef CHAPMS_INCLUDE
+#define CHAPMS_INCLUDE
+
+extern const struct chap_digest_type chapms_digest;
+extern const struct chap_digest_type chapms2_digest;
+
+#endif /* CHAPMS_INCLUDE */
+
+#endif /* PPP_SUPPORT && MSCHAP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/eap.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/eap.h
new file mode 100644
index 00000000000..3ee9aaf81ae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/eap.h
@@ -0,0 +1,169 @@
+/*
+ * eap.h - Extensible Authentication Protocol for PPP (RFC 2284)
+ *
+ * Copyright (c) 2001 by Sun Microsystems, Inc.
+ * All rights reserved.
+ *
+ * Non-exclusive rights to redistribute, modify, translate, and use
+ * this software in source and binary forms, in whole or in part, is
+ * hereby granted, provided that the above copyright notice is
+ * duplicated in any source form, and that neither the name of the
+ * copyright holder nor the author is used to endorse or promote
+ * products derived from this software.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * Original version by James Carlson
+ *
+ * $Id: eap.h,v 1.2 2003/06/11 23:56:26 paulus Exp $
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && EAP_SUPPORT  /* don't build if not configured for use in lwipopts.h */
+
+#ifndef PPP_EAP_H
+#define	PPP_EAP_H
+
+#include "ppp.h"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+/*
+ * Packet header = Code, id, length.
+ */
+#define	EAP_HEADERLEN	4
+
+
+/* EAP message codes. */
+#define	EAP_REQUEST	1
+#define	EAP_RESPONSE	2
+#define	EAP_SUCCESS	3
+#define	EAP_FAILURE	4
+
+/* EAP types */
+#define	EAPT_IDENTITY		1
+#define	EAPT_NOTIFICATION	2
+#define	EAPT_NAK		3	/* (response only) */
+#define	EAPT_MD5CHAP		4
+#define	EAPT_OTP		5	/* One-Time Password; RFC 1938 */
+#define	EAPT_TOKEN		6	/* Generic Token Card */
+/* 7 and 8 are unassigned. */
+#define	EAPT_RSA		9	/* RSA Public Key Authentication */
+#define	EAPT_DSS		10	/* DSS Unilateral */
+#define	EAPT_KEA		11	/* KEA */
+#define	EAPT_KEA_VALIDATE	12	/* KEA-VALIDATE	*/
+#define	EAPT_TLS		13	/* EAP-TLS */
+#define	EAPT_DEFENDER		14	/* Defender Token (AXENT) */
+#define	EAPT_W2K		15	/* Windows 2000 EAP */
+#define	EAPT_ARCOT		16	/* Arcot Systems */
+#define	EAPT_CISCOWIRELESS	17	/* Cisco Wireless */
+#define	EAPT_NOKIACARD		18	/* Nokia IP smart card */
+#define	EAPT_SRP		19	/* Secure Remote Password */
+/* 20 is deprecated */
+
+/* EAP SRP-SHA1 Subtypes */
+#define	EAPSRP_CHALLENGE	1	/* Request 1 - Challenge */
+#define	EAPSRP_CKEY		1	/* Response 1 - Client Key */
+#define	EAPSRP_SKEY		2	/* Request 2 - Server Key */
+#define	EAPSRP_CVALIDATOR	2	/* Response 2 - Client Validator */
+#define	EAPSRP_SVALIDATOR	3	/* Request 3 - Server Validator */
+#define	EAPSRP_ACK		3	/* Response 3 - final ack */
+#define	EAPSRP_LWRECHALLENGE	4	/* Req/resp 4 - Lightweight rechal */
+
+#define	SRPVAL_EBIT	0x00000001	/* Use shared key for ECP */
+
+#define	SRP_PSEUDO_ID	"pseudo_"
+#define	SRP_PSEUDO_LEN	7
+
+#define MD5_SIGNATURE_SIZE	16
+#define EAP_MIN_CHALLENGE_LENGTH	17
+#define EAP_MAX_CHALLENGE_LENGTH	24
+#define EAP_MIN_MAX_POWER_OF_TWO_CHALLENGE_LENGTH     3   /* 2^3-1 = 7, 17+7 = 24 */
+
+#define	EAP_STATES	\
+	"Initial", "Pending", "Closed", "Listen", "Identify", \
+	"SRP1", "SRP2", "SRP3", "MD5Chall", "Open", "SRP4", "BadAuth"
+
+#define	eap_client_active(pcb)	((pcb)->eap.es_client.ea_state == eapListen)
+#if PPP_SERVER
+#define	eap_server_active(pcb)	\
+	((pcb)->eap.es_server.ea_state >= eapIdentify && \
+	 (pcb)->eap.es_server.ea_state <= eapMD5Chall)
+#endif /* PPP_SERVER */
+
+/*
+ * Complete EAP state for one PPP session.
+ */
+enum eap_state_code {
+	eapInitial = 0,	/* No EAP authentication yet requested */
+	eapPending,	/* Waiting for LCP (no timer) */
+	eapClosed,	/* Authentication not in use */
+	eapListen,	/* Client ready (and timer running) */
+	eapIdentify,	/* EAP Identify sent */
+	eapSRP1,	/* Sent EAP SRP-SHA1 Subtype 1 */
+	eapSRP2,	/* Sent EAP SRP-SHA1 Subtype 2 */
+	eapSRP3,	/* Sent EAP SRP-SHA1 Subtype 3 */
+	eapMD5Chall,	/* Sent MD5-Challenge */
+	eapOpen,	/* Completed authentication */
+	eapSRP4,	/* Sent EAP SRP-SHA1 Subtype 4 */
+	eapBadAuth	/* Failed authentication */
+};
+
+struct eap_auth {
+	const char *ea_name;	/* Our name */
+	char ea_peer[MAXNAMELEN +1];	/* Peer's name */
+	void *ea_session;	/* Authentication library linkage */
+	u_char *ea_skey;	/* Shared encryption key */
+	u_short ea_namelen;	/* Length of our name */
+	u_short ea_peerlen;	/* Length of peer's name */
+	enum eap_state_code ea_state;
+	u_char ea_id;		/* Current id */
+	u_char ea_requests;	/* Number of Requests sent/received */
+	u_char ea_responses;	/* Number of Responses */
+	u_char ea_type;		/* One of EAPT_* */
+	u32_t ea_keyflags;	/* SRP shared key usage flags */
+};
+
+#ifndef EAP_MAX_CHALLENGE_LENGTH
+#define EAP_MAX_CHALLENGE_LENGTH	24
+#endif
+typedef struct eap_state {
+	struct eap_auth es_client;	/* Client (authenticatee) data */
+#if PPP_SERVER
+	struct eap_auth es_server;	/* Server (authenticator) data */
+#endif /* PPP_SERVER */
+	int es_savedtime;		/* Saved timeout */
+	int es_rechallenge;		/* EAP rechallenge interval */
+	int es_lwrechallenge;		/* SRP lightweight rechallenge inter */
+	u8_t es_usepseudo;		/* Use SRP Pseudonym if offered one */
+	int es_usedpseudo;		/* Set if we already sent PN */
+	int es_challen;			/* Length of challenge string */
+	u_char es_challenge[EAP_MAX_CHALLENGE_LENGTH];
+} eap_state;
+
+/*
+ * Timeouts.
+ */
+#if 0 /* moved to ppp_opts.h */
+#define	EAP_DEFTIMEOUT		3	/* Timeout (seconds) for rexmit */
+#define	EAP_DEFTRANSMITS	10	/* max # times to transmit */
+#define	EAP_DEFREQTIME		20	/* Time to wait for peer request */
+#define	EAP_DEFALLOWREQ		20	/* max # times to accept requests */
+#endif /* moved to ppp_opts.h */
+
+void eap_authwithpeer(ppp_pcb *pcb, const char *localname);
+void eap_authpeer(ppp_pcb *pcb, const char *localname);
+
+extern const struct protent eap_protent;
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif /* PPP_EAP_H */
+
+#endif /* PPP_SUPPORT && EAP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ecp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ecp.h
new file mode 100644
index 00000000000..d8808c3ab24
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ecp.h
@@ -0,0 +1,62 @@
+/*
+ * ecp.h - Definitions for PPP Encryption Control Protocol.
+ *
+ * Copyright (c) 2002 Google, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name(s) of the authors of this software must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission.
+ *
+ * THE AUTHORS OF THIS SOFTWARE DISCLAIM ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY
+ * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $Id: ecp.h,v 1.2 2003/01/10 07:12:36 fcusack Exp $
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && ECP_SUPPORT  /* don't build if not configured for use in lwipopts.h */
+
+#ifndef ECP_H
+#define ECP_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct ecp_options {
+    bool required;		/* Is ECP required? */
+    unsigned enctype;		/* Encryption type */
+} ecp_options;
+
+extern fsm ecp_fsm[];
+extern ecp_options ecp_wantoptions[];
+extern ecp_options ecp_gotoptions[];
+extern ecp_options ecp_allowoptions[];
+extern ecp_options ecp_hisoptions[];
+
+extern const struct protent ecp_protent;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ECP_H */
+#endif /* PPP_SUPPORT && ECP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/eui64.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/eui64.h
new file mode 100644
index 00000000000..5adeb482a8f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/eui64.h
@@ -0,0 +1,102 @@
+/*
+ * eui64.h - EUI64 routines for IPv6CP.
+ *
+ * Copyright (c) 1999 Tommi Komulainen.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name(s) of the authors of this software must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission.
+ *
+ * 4. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Tommi Komulainen
+ *     <Tommi.Komulainen@iki.fi>".
+ *
+ * THE AUTHORS OF THIS SOFTWARE DISCLAIM ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY
+ * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $Id: eui64.h,v 1.6 2002/12/04 23:03:32 paulus Exp $
+*/
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && PPP_IPV6_SUPPORT  /* don't build if not configured for use in lwipopts.h */
+
+#ifndef EUI64_H
+#define EUI64_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * @todo:
+ *
+ * Maybe this should be done by processing struct in6_addr directly...
+ */
+typedef union
+{
+    u8_t e8[8];
+    u16_t e16[4];
+    u32_t e32[2];
+} eui64_t;
+
+#define eui64_iszero(e)		(((e).e32[0] | (e).e32[1]) == 0)
+#define eui64_equals(e, o)	(((e).e32[0] == (o).e32[0]) && \
+				((e).e32[1] == (o).e32[1]))
+#define eui64_zero(e)		(e).e32[0] = (e).e32[1] = 0;
+
+#define eui64_copy(s, d)	memcpy(&(d), &(s), sizeof(eui64_t))
+
+#define eui64_magic(e)		do {			\
+				(e).e32[0] = magic();	\
+				(e).e32[1] = magic();	\
+				(e).e8[0] &= ~2;	\
+				} while (0)
+#define eui64_magic_nz(x)	do {				\
+				eui64_magic(x);			\
+				} while (eui64_iszero(x))
+#define eui64_magic_ne(x, y)	do {				\
+				eui64_magic(x);			\
+				} while (eui64_equals(x, y))
+
+#define eui64_get(ll, cp)	do {				\
+				eui64_copy((*cp), (ll));	\
+				(cp) += sizeof(eui64_t);	\
+				} while (0)
+
+#define eui64_put(ll, cp)	do {				\
+				eui64_copy((ll), (*cp));	\
+				(cp) += sizeof(eui64_t);	\
+				} while (0)
+
+#define eui64_set32(e, l)	do {			\
+				(e).e32[0] = 0;		\
+				(e).e32[1] = lwip_htonl(l);	\
+				} while (0)
+#define eui64_setlo32(e, l)	eui64_set32(e, l)
+
+char *eui64_ntoa(eui64_t);	/* Returns ascii representation of id */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* EUI64_H */
+#endif /* PPP_SUPPORT && PPP_IPV6_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/fsm.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/fsm.h
new file mode 100644
index 00000000000..8dec700e07f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/fsm.h
@@ -0,0 +1,182 @@
+/*
+ * fsm.h - {Link, IP} Control Protocol Finite State Machine definitions.
+ *
+ * Copyright (c) 1984-2000 Carnegie Mellon University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name "Carnegie Mellon University" must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission. For permission or any legal
+ *    details, please contact
+ *      Office of Technology Transfer
+ *      Carnegie Mellon University
+ *      5000 Forbes Avenue
+ *      Pittsburgh, PA  15213-3890
+ *      (412) 268-4387, fax: (412) 268-7395
+ *      tech-transfer@andrew.cmu.edu
+ *
+ * 4. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Computing Services
+ *     at Carnegie Mellon University (http://www.cmu.edu/computing/)."
+ *
+ * CARNEGIE MELLON UNIVERSITY DISCLAIMS ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL CARNEGIE MELLON UNIVERSITY BE LIABLE
+ * FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $Id: fsm.h,v 1.10 2004/11/13 02:28:15 paulus Exp $
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+#ifndef FSM_H
+#define	FSM_H
+
+#include "ppp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Packet header = Code, id, length.
+ */
+#define HEADERLEN	4
+
+
+/*
+ *  CP (LCP, IPCP, etc.) codes.
+ */
+#define CONFREQ		1	/* Configuration Request */
+#define CONFACK		2	/* Configuration Ack */
+#define CONFNAK		3	/* Configuration Nak */
+#define CONFREJ		4	/* Configuration Reject */
+#define TERMREQ		5	/* Termination Request */
+#define TERMACK		6	/* Termination Ack */
+#define CODEREJ		7	/* Code Reject */
+
+
+/*
+ * Each FSM is described by an fsm structure and fsm callbacks.
+ */
+typedef struct fsm {
+    ppp_pcb *pcb;		/* PPP Interface */
+    const struct fsm_callbacks *callbacks;	/* Callback routines */
+    const char *term_reason;	/* Reason for closing protocol */
+    u8_t seen_ack;		/* Have received valid Ack/Nak/Rej to Req */
+				  /* -- This is our only flag, we might use u_int :1 if we have more flags */
+    u16_t protocol;		/* Data Link Layer Protocol field value */
+    u8_t state;			/* State */
+    u8_t flags;			/* Contains option bits */
+    u8_t id;			/* Current id */
+    u8_t reqid;			/* Current request id */
+    u8_t retransmits;		/* Number of retransmissions left */
+    u8_t nakloops;		/* Number of nak loops since last ack */
+    u8_t rnakloops;		/* Number of naks received */
+    u8_t maxnakloops;		/* Maximum number of nak loops tolerated
+				   (necessary because IPCP require a custom large max nak loops value) */
+    u8_t term_reason_len;	/* Length of term_reason */
+} fsm;
+
+
+typedef struct fsm_callbacks {
+    void (*resetci)		/* Reset our Configuration Information */
+		(fsm *);
+    int  (*cilen)		/* Length of our Configuration Information */
+		(fsm *);
+    void (*addci) 		/* Add our Configuration Information */
+		(fsm *, u_char *, int *);
+    int  (*ackci)		/* ACK our Configuration Information */
+		(fsm *, u_char *, int);
+    int  (*nakci)		/* NAK our Configuration Information */
+		(fsm *, u_char *, int, int);
+    int  (*rejci)		/* Reject our Configuration Information */
+		(fsm *, u_char *, int);
+    int  (*reqci)		/* Request peer's Configuration Information */
+		(fsm *, u_char *, int *, int);
+    void (*up)			/* Called when fsm reaches PPP_FSM_OPENED state */
+		(fsm *);
+    void (*down)		/* Called when fsm leaves PPP_FSM_OPENED state */
+		(fsm *);
+    void (*starting)		/* Called when we want the lower layer */
+		(fsm *);
+    void (*finished)		/* Called when we don't want the lower layer */
+		(fsm *);
+    void (*protreject)		/* Called when Protocol-Reject received */
+		(int);
+    void (*retransmit)		/* Retransmission is necessary */
+		(fsm *);
+    int  (*extcode)		/* Called when unknown code received */
+		(fsm *, int, int, u_char *, int);
+    const char *proto_name;	/* String name for protocol (for messages) */
+} fsm_callbacks;
+
+
+/*
+ * Link states.
+ */
+#define PPP_FSM_INITIAL		0	/* Down, hasn't been opened */
+#define PPP_FSM_STARTING	1	/* Down, been opened */
+#define PPP_FSM_CLOSED		2	/* Up, hasn't been opened */
+#define PPP_FSM_STOPPED		3	/* Open, waiting for down event */
+#define PPP_FSM_CLOSING		4	/* Terminating the connection, not open */
+#define PPP_FSM_STOPPING	5	/* Terminating, but open */
+#define PPP_FSM_REQSENT		6	/* We've sent a Config Request */
+#define PPP_FSM_ACKRCVD		7	/* We've received a Config Ack */
+#define PPP_FSM_ACKSENT		8	/* We've sent a Config Ack */
+#define PPP_FSM_OPENED		9	/* Connection available */
+
+
+/*
+ * Flags - indicate options controlling FSM operation
+ */
+#define OPT_PASSIVE	1	/* Don't die if we don't get a response */
+#define OPT_RESTART	2	/* Treat 2nd OPEN as DOWN, UP */
+#define OPT_SILENT	4	/* Wait for peer to speak first */
+
+
+/*
+ * Timeouts.
+ */
+#if 0 /* moved to ppp_opts.h */
+#define DEFTIMEOUT	3	/* Timeout time in seconds */
+#define DEFMAXTERMREQS	2	/* Maximum Terminate-Request transmissions */
+#define DEFMAXCONFREQS	10	/* Maximum Configure-Request transmissions */
+#define DEFMAXNAKLOOPS	5	/* Maximum number of nak loops */
+#endif /* moved to ppp_opts.h */
+
+
+/*
+ * Prototypes
+ */
+void fsm_init(fsm *f);
+void fsm_lowerup(fsm *f);
+void fsm_lowerdown(fsm *f);
+void fsm_open(fsm *f);
+void fsm_close(fsm *f, const char *reason);
+void fsm_input(fsm *f, u_char *inpacket, int l);
+void fsm_protreject(fsm *f);
+void fsm_sdata(fsm *f, u_char code, u_char id, const u_char *data, int datalen);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* FSM_H */
+#endif /* PPP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ipcp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ipcp.h
new file mode 100644
index 00000000000..32fdd1c641e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ipcp.h
@@ -0,0 +1,134 @@
+/*
+ * ipcp.h - IP Control Protocol definitions.
+ *
+ * Copyright (c) 1984-2000 Carnegie Mellon University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name "Carnegie Mellon University" must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission. For permission or any legal
+ *    details, please contact
+ *      Office of Technology Transfer
+ *      Carnegie Mellon University
+ *      5000 Forbes Avenue
+ *      Pittsburgh, PA  15213-3890
+ *      (412) 268-4387, fax: (412) 268-7395
+ *      tech-transfer@andrew.cmu.edu
+ *
+ * 4. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Computing Services
+ *     at Carnegie Mellon University (http://www.cmu.edu/computing/)."
+ *
+ * CARNEGIE MELLON UNIVERSITY DISCLAIMS ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL CARNEGIE MELLON UNIVERSITY BE LIABLE
+ * FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $Id: ipcp.h,v 1.14 2002/12/04 23:03:32 paulus Exp $
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && PPP_IPV4_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+#ifndef IPCP_H
+#define	IPCP_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Options.
+ */
+#define CI_ADDRS	1	/* IP Addresses */
+#if VJ_SUPPORT
+#define CI_COMPRESSTYPE	2	/* Compression Type */
+#endif /* VJ_SUPPORT */
+#define	CI_ADDR		3
+
+#if LWIP_DNS
+#define CI_MS_DNS1      129	/* Primary DNS value */
+#define CI_MS_DNS2      131     /* Secondary DNS value */
+#endif /* LWIP_DNS */
+#if 0 /* UNUSED - WINS */
+#define CI_MS_WINS1     130     /* Primary WINS value */
+#define CI_MS_WINS2     132	/* Secondary WINS value */
+#endif /* UNUSED - WINS */
+
+#if VJ_SUPPORT
+#define MAX_STATES 16		/* from slcompress.h */
+
+#define IPCP_VJMODE_OLD 1	/* "old" mode (option # = 0x0037) */
+#define IPCP_VJMODE_RFC1172 2	/* "old-rfc"mode (option # = 0x002d) */
+#define IPCP_VJMODE_RFC1332 3	/* "new-rfc"mode (option # = 0x002d, */
+                                /*  maxslot and slot number compression) */
+
+#define IPCP_VJ_COMP 0x002d	/* current value for VJ compression option*/
+#define IPCP_VJ_COMP_OLD 0x0037	/* "old" (i.e, broken) value for VJ */
+				/* compression option*/ 
+#endif /* VJ_SUPPORT */
+
+typedef struct ipcp_options {
+    unsigned int neg_addr               :1; /* Negotiate IP Address? */
+    unsigned int old_addrs              :1; /* Use old (IP-Addresses) option? */
+    unsigned int req_addr               :1; /* Ask peer to send IP address? */
+#if 0 /* UNUSED */
+    unsigned int default_route          :1; /* Assign default route through interface? */
+    unsigned int replace_default_route  :1; /* Replace default route through interface? */
+#endif /* UNUSED */
+#if 0 /* UNUSED - PROXY ARP */
+    unsigned int proxy_arp              :1; /* Make proxy ARP entry for peer? */
+#endif /* UNUSED - PROXY ARP */
+#if VJ_SUPPORT
+    unsigned int neg_vj                 :1; /* Van Jacobson Compression? */
+    unsigned int old_vj                 :1; /* use old (short) form of VJ option? */
+    unsigned int cflag                  :1;
+#endif /* VJ_SUPPORT */
+    unsigned int accept_local           :1; /* accept peer's value for ouraddr */
+    unsigned int accept_remote          :1; /* accept peer's value for hisaddr */
+#if LWIP_DNS
+    unsigned int req_dns1               :1; /* Ask peer to send primary DNS address? */
+    unsigned int req_dns2               :1; /* Ask peer to send secondary DNS address? */
+#endif /* LWIP_DNS */
+
+    u32_t ouraddr, hisaddr;	/* Addresses in NETWORK BYTE ORDER */
+#if LWIP_DNS
+    u32_t dnsaddr[2];	/* Primary and secondary MS DNS entries */
+#endif /* LWIP_DNS */
+#if 0 /* UNUSED - WINS */
+    u32_t winsaddr[2];	/* Primary and secondary MS WINS entries */
+#endif /* UNUSED - WINS */
+
+#if VJ_SUPPORT
+    u16_t vj_protocol;		/* protocol value to use in VJ option */
+    u8_t  maxslotindex;		/* values for RFC1332 VJ compression neg. */
+#endif /* VJ_SUPPORT */
+} ipcp_options;
+
+#if 0 /* UNUSED, already defined by lwIP */
+char *ip_ntoa (u32_t);
+#endif /* UNUSED, already defined by lwIP */
+
+extern const struct protent ipcp_protent;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* IPCP_H */
+#endif /* PPP_SUPPORT && PPP_IPV4_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ipv6cp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ipv6cp.h
new file mode 100644
index 00000000000..90999738696
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ipv6cp.h
@@ -0,0 +1,191 @@
+/*
+ * ipv6cp.h - PPP IPV6 Control Protocol.
+ *
+ * Copyright (c) 1999 Tommi Komulainen.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name(s) of the authors of this software must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission.
+ *
+ * 4. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Tommi Komulainen
+ *     <Tommi.Komulainen@iki.fi>".
+ *
+ * THE AUTHORS OF THIS SOFTWARE DISCLAIM ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY
+ * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+/*  Original version, based on RFC2023 :
+
+    Copyright (c) 1995, 1996, 1997 Francis.Dupont@inria.fr, INRIA Rocquencourt,
+    Alain.Durand@imag.fr, IMAG,
+    Jean-Luc.Richier@imag.fr, IMAG-LSR.
+
+    Copyright (c) 1998, 1999 Francis.Dupont@inria.fr, GIE DYADE,
+    Alain.Durand@imag.fr, IMAG,
+    Jean-Luc.Richier@imag.fr, IMAG-LSR.
+
+    Ce travail a été fait au sein du GIE DYADE (Groupement d'Intérêt
+    Économique ayant pour membres BULL S.A. et l'INRIA).
+
+    Ce logiciel informatique est disponible aux conditions
+    usuelles dans la recherche, c'est-à-dire qu'il peut
+    être utilisé, copié, modifié, distribué à l'unique
+    condition que ce texte soit conservé afin que
+    l'origine de ce logiciel soit reconnue.
+
+    Le nom de l'Institut National de Recherche en Informatique
+    et en Automatique (INRIA), de l'IMAG, ou d'une personne morale
+    ou physique ayant participé à l'élaboration de ce logiciel ne peut
+    être utilisé sans son accord préalable explicite.
+
+    Ce logiciel est fourni tel quel sans aucune garantie,
+    support ou responsabilité d'aucune sorte.
+    Ce logiciel est dérivé de sources d'origine
+    "University of California at Berkeley" et
+    "Digital Equipment Corporation" couvertes par des copyrights.
+
+    L'Institut d'Informatique et de Mathématiques Appliquées de Grenoble (IMAG)
+    est une fédération d'unités mixtes de recherche du CNRS, de l'Institut National
+    Polytechnique de Grenoble et de l'Université Joseph Fourier regroupant
+    sept laboratoires dont le laboratoire Logiciels, Systèmes, Réseaux (LSR).
+
+    This work has been done in the context of GIE DYADE (joint R & D venture
+    between BULL S.A. and INRIA).
+
+    This software is available with usual "research" terms
+    with the aim of retain credits of the software. 
+    Permission to use, copy, modify and distribute this software for any
+    purpose and without fee is hereby granted, provided that the above
+    copyright notice and this permission notice appear in all copies,
+    and the name of INRIA, IMAG, or any contributor not be used in advertising
+    or publicity pertaining to this material without the prior explicit
+    permission. The software is provided "as is" without any
+    warranties, support or liabilities of any kind.
+    This software is derived from source code from
+    "University of California at Berkeley" and
+    "Digital Equipment Corporation" protected by copyrights.
+
+    Grenoble's Institute of Computer Science and Applied Mathematics (IMAG)
+    is a federation of seven research units funded by the CNRS, National
+    Polytechnic Institute of Grenoble and University Joseph Fourier.
+    The research unit in Software, Systems, Networks (LSR) is member of IMAG.
+*/
+
+/*
+ * Derived from :
+ *
+ *
+ * ipcp.h - IP Control Protocol definitions.
+ *
+ * Copyright (c) 1984-2000 Carnegie Mellon University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name "Carnegie Mellon University" must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission. For permission or any legal
+ *    details, please contact
+ *      Office of Technology Transfer
+ *      Carnegie Mellon University
+ *      5000 Forbes Avenue
+ *      Pittsburgh, PA  15213-3890
+ *      (412) 268-4387, fax: (412) 268-7395
+ *      tech-transfer@andrew.cmu.edu
+ *
+ * 4. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Computing Services
+ *     at Carnegie Mellon University (http://www.cmu.edu/computing/)."
+ *
+ * CARNEGIE MELLON UNIVERSITY DISCLAIMS ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL CARNEGIE MELLON UNIVERSITY BE LIABLE
+ * FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $Id: ipv6cp.h,v 1.7 2002/12/04 23:03:32 paulus Exp $
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && PPP_IPV6_SUPPORT  /* don't build if not configured for use in lwipopts.h */
+
+#ifndef IPV6CP_H
+#define	IPV6CP_H
+
+#include "eui64.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Options.
+ */
+#define CI_IFACEID	1	/* Interface Identifier */
+#ifdef IPV6CP_COMP
+#define CI_COMPRESSTYPE	2	/* Compression Type     */
+#endif /* IPV6CP_COMP */
+
+/* No compression types yet defined.
+ *#define IPV6CP_COMP	0x004f
+ */
+typedef struct ipv6cp_options {
+    unsigned int neg_ifaceid    :1;  /* Negotiate interface identifier? */
+    unsigned int req_ifaceid    :1;  /* Ask peer to send interface identifier? */
+    unsigned int accept_local   :1;  /* accept peer's value for iface id? */
+    unsigned int opt_local      :1;  /* ourtoken set by option */
+    unsigned int opt_remote     :1;  /* histoken set by option */
+    unsigned int use_ip         :1;  /* use IP as interface identifier */
+#if 0
+    unsigned int use_persistent :1;  /* use uniquely persistent value for address */
+#endif
+#ifdef IPV6CP_COMP
+    unsigned int neg_vj         :1;  /* Van Jacobson Compression? */
+#endif /* IPV6CP_COMP */
+
+#ifdef IPV6CP_COMP
+    u_short vj_protocol;        /* protocol value to use in VJ option */
+#endif /* IPV6CP_COMP */
+    eui64_t ourid, hisid;       /* Interface identifiers */
+} ipv6cp_options;
+
+extern const struct protent ipv6cp_protent;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* IPV6CP_H */
+#endif /* PPP_SUPPORT && PPP_IPV6_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/lcp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/lcp.h
new file mode 100644
index 00000000000..18ad1cb23bd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/lcp.h
@@ -0,0 +1,179 @@
+/*
+ * lcp.h - Link Control Protocol definitions.
+ *
+ * Copyright (c) 1984-2000 Carnegie Mellon University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name "Carnegie Mellon University" must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission. For permission or any legal
+ *    details, please contact
+ *      Office of Technology Transfer
+ *      Carnegie Mellon University
+ *      5000 Forbes Avenue
+ *      Pittsburgh, PA  15213-3890
+ *      (412) 268-4387, fax: (412) 268-7395
+ *      tech-transfer@andrew.cmu.edu
+ *
+ * 4. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Computing Services
+ *     at Carnegie Mellon University (http://www.cmu.edu/computing/)."
+ *
+ * CARNEGIE MELLON UNIVERSITY DISCLAIMS ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL CARNEGIE MELLON UNIVERSITY BE LIABLE
+ * FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $Id: lcp.h,v 1.20 2004/11/14 22:53:42 carlsonj Exp $
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+#ifndef LCP_H
+#define	LCP_H
+
+#include "ppp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Options.
+ */
+#define CI_VENDOR	0	/* Vendor Specific */
+#define CI_MRU		1	/* Maximum Receive Unit */
+#define CI_ASYNCMAP	2	/* Async Control Character Map */
+#define CI_AUTHTYPE	3	/* Authentication Type */
+#define CI_QUALITY	4	/* Quality Protocol */
+#define CI_MAGICNUMBER	5	/* Magic Number */
+#define CI_PCOMPRESSION	7	/* Protocol Field Compression */
+#define CI_ACCOMPRESSION 8	/* Address/Control Field Compression */
+#define CI_FCSALTERN	9	/* FCS-Alternatives */
+#define CI_SDP		10	/* Self-Describing-Pad */
+#define CI_NUMBERED	11	/* Numbered-Mode */
+#define CI_CALLBACK	13	/* callback */
+#define CI_MRRU		17	/* max reconstructed receive unit; multilink */
+#define CI_SSNHF	18	/* short sequence numbers for multilink */
+#define CI_EPDISC	19	/* endpoint discriminator */
+#define CI_MPPLUS	22	/* Multi-Link-Plus-Procedure */
+#define CI_LDISC	23	/* Link-Discriminator */
+#define CI_LCPAUTH	24	/* LCP Authentication */
+#define CI_COBS		25	/* Consistent Overhead Byte Stuffing */
+#define CI_PREFELIS	26	/* Prefix Elision */
+#define CI_MPHDRFMT	27	/* MP Header Format */
+#define CI_I18N		28	/* Internationalization */
+#define CI_SDL		29	/* Simple Data Link */
+
+/*
+ * LCP-specific packet types (code numbers).
+ */
+#define PROTREJ		8	/* Protocol Reject */
+#define ECHOREQ		9	/* Echo Request */
+#define ECHOREP		10	/* Echo Reply */
+#define DISCREQ		11	/* Discard Request */
+#define IDENTIF		12	/* Identification */
+#define TIMEREM		13	/* Time Remaining */
+
+/* Value used as data for CI_CALLBACK option */
+#define CBCP_OPT	6	/* Use callback control protocol */
+
+#if 0 /* moved to ppp_opts.h */
+#define DEFMRU	1500		/* Try for this */
+#define MINMRU	128		/* No MRUs below this */
+#define MAXMRU	16384		/* Normally limit MRU to this */
+#endif /* moved to ppp_opts.h */
+
+/* An endpoint discriminator, used with multilink. */
+#define MAX_ENDP_LEN	20	/* maximum length of discriminator value */
+struct epdisc {
+    unsigned char	class_; /* -- The word "class" is reserved in C++. */
+    unsigned char	length;
+    unsigned char	value[MAX_ENDP_LEN];
+};
+
+/*
+ * The state of options is described by an lcp_options structure.
+ */
+typedef struct lcp_options {
+    unsigned int passive           :1; /* Don't die if we don't get a response */
+    unsigned int silent            :1; /* Wait for the other end to start first */
+#if 0 /* UNUSED */
+    unsigned int restart           :1; /* Restart vs. exit after close */
+#endif /* UNUSED */
+    unsigned int neg_mru           :1; /* Negotiate the MRU? */
+    unsigned int neg_asyncmap      :1; /* Negotiate the async map? */
+#if PAP_SUPPORT
+    unsigned int neg_upap          :1; /* Ask for UPAP authentication? */
+#endif /* PAP_SUPPORT */
+#if CHAP_SUPPORT
+    unsigned int neg_chap          :1; /* Ask for CHAP authentication? */
+#endif /* CHAP_SUPPORT */
+#if EAP_SUPPORT
+    unsigned int neg_eap           :1; /* Ask for EAP authentication? */
+#endif /* EAP_SUPPORT */
+    unsigned int neg_magicnumber   :1; /* Ask for magic number? */
+    unsigned int neg_pcompression  :1; /* HDLC Protocol Field Compression? */
+    unsigned int neg_accompression :1; /* HDLC Address/Control Field Compression? */
+#if LQR_SUPPORT
+    unsigned int neg_lqr           :1; /* Negotiate use of Link Quality Reports */
+#endif /* LQR_SUPPORT */
+    unsigned int neg_cbcp          :1; /* Negotiate use of CBCP */
+#ifdef HAVE_MULTILINK
+    unsigned int neg_mrru          :1; /* negotiate multilink MRRU */
+#endif /* HAVE_MULTILINK */
+    unsigned int neg_ssnhf         :1; /* negotiate short sequence numbers */
+    unsigned int neg_endpoint      :1; /* negotiate endpoint discriminator */
+
+    u16_t mru;			/* Value of MRU */
+#ifdef HAVE_MULTILINK
+    u16_t mrru;			/* Value of MRRU, and multilink enable */
+#endif /* MULTILINK */
+#if CHAP_SUPPORT
+    u8_t chap_mdtype;		/* which MD types (hashing algorithm) */
+#endif /* CHAP_SUPPORT */
+    u32_t asyncmap;		/* Value of async map */
+    u32_t magicnumber;
+    u8_t  numloops;		/* Number of loops during magic number neg. */
+#if LQR_SUPPORT
+    u32_t lqr_period;	/* Reporting period for LQR 1/100ths second */
+#endif /* LQR_SUPPORT */
+    struct epdisc endpoint;	/* endpoint discriminator */
+} lcp_options;
+
+void lcp_open(ppp_pcb *pcb);
+void lcp_close(ppp_pcb *pcb, const char *reason);
+void lcp_lowerup(ppp_pcb *pcb);
+void lcp_lowerdown(ppp_pcb *pcb);
+void lcp_sprotrej(ppp_pcb *pcb, u_char *p, int len);    /* send protocol reject */
+
+extern const struct protent lcp_protent;
+
+#if 0 /* moved to ppp_opts.h */
+/* Default number of times we receive our magic number from the peer
+   before deciding the link is looped-back. */
+#define DEFLOOPBACKFAIL	10
+#endif /* moved to ppp_opts.h */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LCP_H */
+#endif /* PPP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/magic.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/magic.h
new file mode 100644
index 00000000000..a165e18fa68
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/magic.h
@@ -0,0 +1,130 @@
+/*
+ * magic.h - PPP Magic Number definitions.
+ *
+ * Copyright (c) 1984-2000 Carnegie Mellon University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name "Carnegie Mellon University" must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission. For permission or any legal
+ *    details, please contact
+ *      Office of Technology Transfer
+ *      Carnegie Mellon University
+ *      5000 Forbes Avenue
+ *      Pittsburgh, PA  15213-3890
+ *      (412) 268-4387, fax: (412) 268-7395
+ *      tech-transfer@andrew.cmu.edu
+ *
+ * 4. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Computing Services
+ *     at Carnegie Mellon University (http://www.cmu.edu/computing/)."
+ *
+ * CARNEGIE MELLON UNIVERSITY DISCLAIMS ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL CARNEGIE MELLON UNIVERSITY BE LIABLE
+ * FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $Id: magic.h,v 1.5 2003/06/11 23:56:26 paulus Exp $
+ */
+/*****************************************************************************
+* randm.h - Random number generator header file.
+*
+* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc.
+* Copyright (c) 1998 Global Election Systems Inc.
+*
+* The authors hereby grant permission to use, copy, modify, distribute,
+* and license this software and its documentation for any purpose, provided
+* that existing copyright notices are retained in all copies and that this
+* notice and the following disclaimer are included verbatim in any
+* distributions. No written agreement, license, or royalty fee is required
+* for any of the authorized uses.
+*
+* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+******************************************************************************
+* REVISION HISTORY
+*
+* 03-01-01 Marc Boucher <marc@mbsi.ca>
+*   Ported to lwIP.
+* 98-05-29 Guy Lancaster <glanca@gesn.com>, Global Election Systems Inc.
+*   Extracted from avos.
+*****************************************************************************/
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+#ifndef MAGIC_H
+#define MAGIC_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***********************
+*** PUBLIC FUNCTIONS ***
+***********************/
+
+/*
+ * Initialize the random number generator.
+ */
+void magic_init(void);
+
+/*
+ * Randomize our random seed value.  To be called for truely random events
+ * such as user operations and network traffic.
+ */
+void magic_randomize(void);
+
+/*
+ * Return a new random number.
+ */
+u32_t magic(void);	/* Returns the next magic number */
+
+/*
+ * Fill buffer with random bytes
+ *
+ * Use the random pool to generate random data.  This degrades to pseudo
+ * random when used faster than randomness is supplied using magic_churnrand().
+ * Thus it's important to make sure that the results of this are not
+ * published directly because one could predict the next result to at
+ * least some degree.  Also, it's important to get a good seed before
+ * the first use.
+ */
+void magic_random_bytes(unsigned char *buf, u32_t buf_len);
+
+/*
+ * Return a new random number between 0 and (2^pow)-1 included.
+ */
+u32_t magic_pow(u8_t pow);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MAGIC_H */
+
+#endif /* PPP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/mppe.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/mppe.h
new file mode 100644
index 00000000000..5de1128479b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/mppe.h
@@ -0,0 +1,181 @@
+/*
+ * mppe.h - Definitions for MPPE
+ *
+ * Copyright (c) 2008 Paul Mackerras. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name(s) of the authors of this software must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission.
+ *
+ * 4. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Paul Mackerras
+ *     <paulus@samba.org>".
+ *
+ * THE AUTHORS OF THIS SOFTWARE DISCLAIM ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY
+ * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && MPPE_SUPPORT  /* don't build if not configured for use in lwipopts.h */
+
+#ifndef MPPE_H
+#define MPPE_H
+
+#include "netif/ppp/pppcrypt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MPPE_PAD		4	/* MPPE growth per frame */
+#define MPPE_MAX_KEY_LEN	16	/* largest key length (128-bit) */
+
+/* option bits for ccp_options.mppe */
+#define MPPE_OPT_40		0x01	/* 40 bit */
+#define MPPE_OPT_128		0x02	/* 128 bit */
+#define MPPE_OPT_STATEFUL	0x04	/* stateful mode */
+/* unsupported opts */
+#define MPPE_OPT_56		0x08	/* 56 bit */
+#define MPPE_OPT_MPPC		0x10	/* MPPC compression */
+#define MPPE_OPT_D		0x20	/* Unknown */
+#define MPPE_OPT_UNSUPPORTED (MPPE_OPT_56|MPPE_OPT_MPPC|MPPE_OPT_D)
+#define MPPE_OPT_UNKNOWN	0x40	/* Bits !defined in RFC 3078 were set */
+
+/*
+ * This is not nice ... the alternative is a bitfield struct though.
+ * And unfortunately, we cannot share the same bits for the option
+ * names above since C and H are the same bit.  We could do a u_int32
+ * but then we have to do a lwip_htonl() all the time and/or we still need
+ * to know which octet is which.
+ */
+#define MPPE_C_BIT		0x01	/* MPPC */
+#define MPPE_D_BIT		0x10	/* Obsolete, usage unknown */
+#define MPPE_L_BIT		0x20	/* 40-bit */
+#define MPPE_S_BIT		0x40	/* 128-bit */
+#define MPPE_M_BIT		0x80	/* 56-bit, not supported */
+#define MPPE_H_BIT		0x01	/* Stateless (in a different byte) */
+
+/* Does not include H bit; used for least significant octet only. */
+#define MPPE_ALL_BITS (MPPE_D_BIT|MPPE_L_BIT|MPPE_S_BIT|MPPE_M_BIT|MPPE_H_BIT)
+
+/* Build a CI from mppe opts (see RFC 3078) */
+#define MPPE_OPTS_TO_CI(opts, ci)		\
+    do {					\
+	u_char *ptr = ci; /* u_char[4] */	\
+						\
+	/* H bit */				\
+	if (opts & MPPE_OPT_STATEFUL)		\
+	    *ptr++ = 0x0;			\
+	else					\
+	    *ptr++ = MPPE_H_BIT;		\
+	*ptr++ = 0;				\
+	*ptr++ = 0;				\
+						\
+	/* S,L bits */				\
+	*ptr = 0;				\
+	if (opts & MPPE_OPT_128)		\
+	    *ptr |= MPPE_S_BIT;			\
+	if (opts & MPPE_OPT_40)			\
+	    *ptr |= MPPE_L_BIT;			\
+	/* M,D,C bits not supported */		\
+    } while (/* CONSTCOND */ 0)
+
+/* The reverse of the above */
+#define MPPE_CI_TO_OPTS(ci, opts)		\
+    do {					\
+	const u_char *ptr = ci; /* u_char[4] */	\
+						\
+	opts = 0;				\
+						\
+	/* H bit */				\
+	if (!(ptr[0] & MPPE_H_BIT))		\
+	    opts |= MPPE_OPT_STATEFUL;		\
+						\
+	/* S,L bits */				\
+	if (ptr[3] & MPPE_S_BIT)		\
+	    opts |= MPPE_OPT_128;		\
+	if (ptr[3] & MPPE_L_BIT)		\
+	    opts |= MPPE_OPT_40;		\
+						\
+	/* M,D,C bits */			\
+	if (ptr[3] & MPPE_M_BIT)		\
+	    opts |= MPPE_OPT_56;		\
+	if (ptr[3] & MPPE_D_BIT)		\
+	    opts |= MPPE_OPT_D;			\
+	if (ptr[3] & MPPE_C_BIT)		\
+	    opts |= MPPE_OPT_MPPC;		\
+						\
+	/* Other bits */			\
+	if (ptr[0] & ~MPPE_H_BIT)		\
+	    opts |= MPPE_OPT_UNKNOWN;		\
+	if (ptr[1] || ptr[2])			\
+	    opts |= MPPE_OPT_UNKNOWN;		\
+	if (ptr[3] & ~MPPE_ALL_BITS)		\
+	    opts |= MPPE_OPT_UNKNOWN;		\
+    } while (/* CONSTCOND */ 0)
+
+/* Shared MPPE padding between MSCHAP and MPPE */
+#define SHA1_PAD_SIZE 40
+
+static const u8_t mppe_sha1_pad1[SHA1_PAD_SIZE] = {
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+static const u8_t mppe_sha1_pad2[SHA1_PAD_SIZE] = {
+  0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2,
+  0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2,
+  0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2,
+  0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2
+};
+
+/*
+ * State for an MPPE (de)compressor.
+ */
+typedef struct ppp_mppe_state {
+	lwip_arc4_context arc4;
+	u8_t master_key[MPPE_MAX_KEY_LEN];
+	u8_t session_key[MPPE_MAX_KEY_LEN];
+	u8_t keylen;                /* key length in bytes */
+	/* NB: 128-bit == 16, 40-bit == 8!
+	 * If we want to support 56-bit, the unit has to change to bits
+	 */
+	u8_t bits;                  /* MPPE control bits */
+	u16_t ccount;               /* 12-bit coherency count (seqno)  */
+	u16_t sanity_errors;        /* take down LCP if too many */
+	unsigned int stateful  :1;  /* stateful mode flag */
+	unsigned int discard   :1;  /* stateful mode packet loss flag */
+} ppp_mppe_state;
+
+void mppe_set_key(ppp_pcb *pcb, ppp_mppe_state *state, u8_t *key);
+void mppe_init(ppp_pcb *pcb, ppp_mppe_state *state, u8_t options);
+void mppe_comp_reset(ppp_pcb *pcb, ppp_mppe_state *state);
+err_t mppe_compress(ppp_pcb *pcb, ppp_mppe_state *state, struct pbuf **pb, u16_t protocol);
+void mppe_decomp_reset(ppp_pcb *pcb, ppp_mppe_state *state);
+err_t mppe_decompress(ppp_pcb *pcb, ppp_mppe_state *state, struct pbuf **pb);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MPPE_H */
+#endif /* PPP_SUPPORT && MPPE_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/arc4.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/arc4.h
new file mode 100644
index 00000000000..4af724cd900
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/arc4.h
@@ -0,0 +1,81 @@
+/**
+ * \file arc4.h
+ *
+ *  Based on XySSL: Copyright (C) 2006-2008  Christophe Devine
+ *
+ *  Copyright (C) 2009  Paul Bakker <polarssl_maintainer at polarssl dot org>
+ *
+ *  All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  
+ *    * Redistributions of source code must retain the above copyright
+ *      notice, this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in the
+ *      documentation and/or other materials provided with the distribution.
+ *    * Neither the names of PolarSSL or XySSL nor the names of its contributors
+ *      may be used to endorse or promote products derived from this software
+ *      without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ *  FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ *  TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if LWIP_INCLUDED_POLARSSL_ARC4
+
+#ifndef LWIP_INCLUDED_POLARSSL_ARC4_H
+#define LWIP_INCLUDED_POLARSSL_ARC4_H
+
+/**
+ * \brief          ARC4 context structure
+ */
+typedef struct
+{
+    int x;                      /*!< permutation index */
+    int y;                      /*!< permutation index */
+    unsigned char m[256];       /*!< permutation table */
+}
+arc4_context;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          ARC4 key schedule
+ *
+ * \param ctx      ARC4 context to be initialized
+ * \param key      the secret key
+ * \param keylen   length of the key
+ */
+void arc4_setup( arc4_context *ctx, unsigned char *key, int keylen );
+
+/**
+ * \brief          ARC4 cipher function
+ *
+ * \param ctx      ARC4 context
+ * \param buf      buffer to be processed
+ * \param buflen   amount of data in buf
+ */
+void arc4_crypt( arc4_context *ctx, unsigned char *buf, int buflen );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_INCLUDED_POLARSSL_ARC4_H */
+
+#endif /* LWIP_INCLUDED_POLARSSL_ARC4 */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/des.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/des.h
new file mode 100644
index 00000000000..e893890ed76
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/des.h
@@ -0,0 +1,92 @@
+/**
+ * \file des.h
+ *
+ *  Based on XySSL: Copyright (C) 2006-2008  Christophe Devine
+ *
+ *  Copyright (C) 2009  Paul Bakker <polarssl_maintainer at polarssl dot org>
+ *
+ *  All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  
+ *    * Redistributions of source code must retain the above copyright
+ *      notice, this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in the
+ *      documentation and/or other materials provided with the distribution.
+ *    * Neither the names of PolarSSL or XySSL nor the names of its contributors
+ *      may be used to endorse or promote products derived from this software
+ *      without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ *  FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ *  TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if LWIP_INCLUDED_POLARSSL_DES
+
+#ifndef LWIP_INCLUDED_POLARSSL_DES_H
+#define LWIP_INCLUDED_POLARSSL_DES_H
+
+#define DES_ENCRYPT     1
+#define DES_DECRYPT     0
+
+/**
+ * \brief          DES context structure
+ */
+typedef struct
+{
+    int mode;                   /*!<  encrypt/decrypt   */
+    unsigned long sk[32];       /*!<  DES subkeys       */
+}
+des_context;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          DES key schedule (56-bit, encryption)
+ *
+ * \param ctx      DES context to be initialized
+ * \param key      8-byte secret key
+ */
+void des_setkey_enc( des_context *ctx, unsigned char key[8] );
+
+/**
+ * \brief          DES key schedule (56-bit, decryption)
+ *
+ * \param ctx      DES context to be initialized
+ * \param key      8-byte secret key
+ */
+void des_setkey_dec( des_context *ctx, unsigned char key[8] );
+
+/**
+ * \brief          DES-ECB block encryption/decryption
+ *
+ * \param ctx      DES context
+ * \param input    64-bit input block
+ * \param output   64-bit output block
+ */
+void des_crypt_ecb( des_context *ctx,
+                    const unsigned char input[8],
+                    unsigned char output[8] );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_INCLUDED_POLARSSL_DES_H */
+
+#endif /* LWIP_INCLUDED_POLARSSL_DES */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/md4.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/md4.h
new file mode 100644
index 00000000000..570445687e1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/md4.h
@@ -0,0 +1,97 @@
+/**
+ * \file md4.h
+ *
+ *  Based on XySSL: Copyright (C) 2006-2008  Christophe Devine
+ *
+ *  Copyright (C) 2009  Paul Bakker <polarssl_maintainer at polarssl dot org>
+ *
+ *  All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  
+ *    * Redistributions of source code must retain the above copyright
+ *      notice, this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in the
+ *      documentation and/or other materials provided with the distribution.
+ *    * Neither the names of PolarSSL or XySSL nor the names of its contributors
+ *      may be used to endorse or promote products derived from this software
+ *      without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ *  FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ *  TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if LWIP_INCLUDED_POLARSSL_MD4
+
+#ifndef LWIP_INCLUDED_POLARSSL_MD4_H
+#define LWIP_INCLUDED_POLARSSL_MD4_H
+
+/**
+ * \brief          MD4 context structure
+ */
+typedef struct
+{
+    unsigned long total[2];     /*!< number of bytes processed  */
+    unsigned long state[4];     /*!< intermediate digest state  */
+    unsigned char buffer[64];   /*!< data block being processed */
+}
+md4_context;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          MD4 context setup
+ *
+ * \param ctx      context to be initialized
+ */
+void md4_starts( md4_context *ctx );
+
+/**
+ * \brief          MD4 process buffer
+ *
+ * \param ctx      MD4 context
+ * \param input    buffer holding the  data
+ * \param ilen     length of the input data
+ */
+void md4_update( md4_context *ctx, const unsigned char *input, int ilen );
+
+/**
+ * \brief          MD4 final digest
+ *
+ * \param ctx      MD4 context
+ * \param output   MD4 checksum result
+ */
+void md4_finish( md4_context *ctx, unsigned char output[16] );
+
+/**
+ * \brief          Output = MD4( input buffer )
+ *
+ * \param input    buffer holding the  data
+ * \param ilen     length of the input data
+ * \param output   MD4 checksum result
+ */
+void md4( unsigned char *input, int ilen, unsigned char output[16] );
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_INCLUDED_POLARSSL_MD4_H */
+
+#endif /* LWIP_INCLUDED_POLARSSL_MD4 */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/md5.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/md5.h
new file mode 100644
index 00000000000..12440118906
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/md5.h
@@ -0,0 +1,96 @@
+/**
+ * \file md5.h
+ *
+ *  Based on XySSL: Copyright (C) 2006-2008  Christophe Devine
+ *
+ *  Copyright (C) 2009  Paul Bakker <polarssl_maintainer at polarssl dot org>
+ *
+ *  All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  
+ *    * Redistributions of source code must retain the above copyright
+ *      notice, this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in the
+ *      documentation and/or other materials provided with the distribution.
+ *    * Neither the names of PolarSSL or XySSL nor the names of its contributors
+ *      may be used to endorse or promote products derived from this software
+ *      without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ *  FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ *  TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if LWIP_INCLUDED_POLARSSL_MD5
+
+#ifndef LWIP_INCLUDED_POLARSSL_MD5_H
+#define LWIP_INCLUDED_POLARSSL_MD5_H
+
+/**
+ * \brief          MD5 context structure
+ */
+typedef struct
+{
+    unsigned long total[2];     /*!< number of bytes processed  */
+    unsigned long state[4];     /*!< intermediate digest state  */
+    unsigned char buffer[64];   /*!< data block being processed */
+}
+md5_context;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          MD5 context setup
+ *
+ * \param ctx      context to be initialized
+ */
+void md5_starts( md5_context *ctx );
+
+/**
+ * \brief          MD5 process buffer
+ *
+ * \param ctx      MD5 context
+ * \param input    buffer holding the  data
+ * \param ilen     length of the input data
+ */
+void md5_update( md5_context *ctx, const unsigned char *input, int ilen );
+
+/**
+ * \brief          MD5 final digest
+ *
+ * \param ctx      MD5 context
+ * \param output   MD5 checksum result
+ */
+void md5_finish( md5_context *ctx, unsigned char output[16] );
+
+/**
+ * \brief          Output = MD5( input buffer )
+ *
+ * \param input    buffer holding the  data
+ * \param ilen     length of the input data
+ * \param output   MD5 checksum result
+ */
+void md5( unsigned char *input, int ilen, unsigned char output[16] );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_INCLUDED_POLARSSL_MD5_H */
+
+#endif /* LWIP_INCLUDED_POLARSSL_MD5 */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/sha1.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/sha1.h
new file mode 100644
index 00000000000..a4c53e07c50
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/polarssl/sha1.h
@@ -0,0 +1,96 @@
+/**
+ * \file sha1.h
+ *
+ *  Based on XySSL: Copyright (C) 2006-2008  Christophe Devine
+ *
+ *  Copyright (C) 2009  Paul Bakker <polarssl_maintainer at polarssl dot org>
+ *
+ *  All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  
+ *    * Redistributions of source code must retain the above copyright
+ *      notice, this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in the
+ *      documentation and/or other materials provided with the distribution.
+ *    * Neither the names of PolarSSL or XySSL nor the names of its contributors
+ *      may be used to endorse or promote products derived from this software
+ *      without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ *  FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ *  TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if LWIP_INCLUDED_POLARSSL_SHA1
+
+#ifndef LWIP_INCLUDED_POLARSSL_SHA1_H
+#define LWIP_INCLUDED_POLARSSL_SHA1_H
+
+/**
+ * \brief          SHA-1 context structure
+ */
+typedef struct
+{
+    unsigned long total[2];     /*!< number of bytes processed  */
+    unsigned long state[5];     /*!< intermediate digest state  */
+    unsigned char buffer[64];   /*!< data block being processed */
+}
+sha1_context;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          SHA-1 context setup
+ *
+ * \param ctx      context to be initialized
+ */
+void sha1_starts( sha1_context *ctx );
+
+/**
+ * \brief          SHA-1 process buffer
+ *
+ * \param ctx      SHA-1 context
+ * \param input    buffer holding the  data
+ * \param ilen     length of the input data
+ */
+void sha1_update( sha1_context *ctx, const unsigned char *input, int ilen );
+
+/**
+ * \brief          SHA-1 final digest
+ *
+ * \param ctx      SHA-1 context
+ * \param output   SHA-1 checksum result
+ */
+void sha1_finish( sha1_context *ctx, unsigned char output[20] );
+
+/**
+ * \brief          Output = SHA-1( input buffer )
+ *
+ * \param input    buffer holding the  data
+ * \param ilen     length of the input data
+ * \param output   SHA-1 checksum result
+ */
+void sha1( unsigned char *input, int ilen, unsigned char output[20] );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_INCLUDED_POLARSSL_SHA1_H */
+
+#endif /* LWIP_INCLUDED_POLARSSL_SHA1 */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ppp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ppp.h
new file mode 100644
index 00000000000..3d73c365708
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ppp.h
@@ -0,0 +1,698 @@
+/*****************************************************************************
+* ppp.h - Network Point to Point Protocol header file.
+*
+* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc.
+* portions Copyright (c) 1997 Global Election Systems Inc.
+*
+* The authors hereby grant permission to use, copy, modify, distribute,
+* and license this software and its documentation for any purpose, provided
+* that existing copyright notices are retained in all copies and that this
+* notice and the following disclaimer are included verbatim in any 
+* distributions. No written agreement, license, or royalty fee is required
+* for any of the authorized uses.
+*
+* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+******************************************************************************
+* REVISION HISTORY
+*
+* 03-01-01 Marc Boucher <marc@mbsi.ca>
+*   Ported to lwIP.
+* 97-11-05 Guy Lancaster <glanca@gesn.com>, Global Election Systems Inc.
+*   Original derived from BSD codes.
+*****************************************************************************/
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+#ifndef PPP_H
+#define PPP_H
+
+#include "lwip/def.h"
+#include "lwip/stats.h"
+#include "lwip/mem.h"
+#include "lwip/netif.h"
+#include "lwip/sys.h"
+#include "lwip/timeouts.h"
+#if PPP_IPV6_SUPPORT
+#include "lwip/ip6_addr.h"
+#endif /* PPP_IPV6_SUPPORT */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Disable non-working or rarely used PPP feature, so rarely that we don't want to bloat ppp_opts.h with them */
+#ifndef PPP_OPTIONS
+#define PPP_OPTIONS         0
+#endif
+
+#ifndef PPP_NOTIFY
+#define PPP_NOTIFY          0
+#endif
+
+#ifndef PPP_REMOTENAME
+#define PPP_REMOTENAME      0
+#endif
+
+#ifndef PPP_IDLETIMELIMIT
+#define PPP_IDLETIMELIMIT   0
+#endif
+
+#ifndef PPP_LCP_ADAPTIVE
+#define PPP_LCP_ADAPTIVE    0
+#endif
+
+#ifndef PPP_MAXCONNECT
+#define PPP_MAXCONNECT      0
+#endif
+
+#ifndef PPP_ALLOWED_ADDRS
+#define PPP_ALLOWED_ADDRS   0
+#endif
+
+#ifndef PPP_PROTOCOLNAME
+#define PPP_PROTOCOLNAME    0
+#endif
+
+#ifndef PPP_STATS_SUPPORT
+#define PPP_STATS_SUPPORT   0
+#endif
+
+#ifndef DEFLATE_SUPPORT
+#define DEFLATE_SUPPORT     0
+#endif
+
+#ifndef BSDCOMPRESS_SUPPORT
+#define BSDCOMPRESS_SUPPORT 0
+#endif
+
+#ifndef PREDICTOR_SUPPORT
+#define PREDICTOR_SUPPORT   0
+#endif
+
+/*************************
+*** PUBLIC DEFINITIONS ***
+*************************/
+
+/*
+ * The basic PPP frame.
+ */
+#define PPP_HDRLEN	4	/* octets for standard ppp header */
+#define PPP_FCSLEN	2	/* octets for FCS */
+
+/*
+ * Values for phase.
+ */
+#define PPP_PHASE_DEAD          0
+#define PPP_PHASE_MASTER        1
+#define PPP_PHASE_HOLDOFF       2
+#define PPP_PHASE_INITIALIZE    3
+#define PPP_PHASE_SERIALCONN    4
+#define PPP_PHASE_DORMANT       5
+#define PPP_PHASE_ESTABLISH     6
+#define PPP_PHASE_AUTHENTICATE  7
+#define PPP_PHASE_CALLBACK      8
+#define PPP_PHASE_NETWORK       9
+#define PPP_PHASE_RUNNING       10
+#define PPP_PHASE_TERMINATE     11
+#define PPP_PHASE_DISCONNECT    12
+
+/* Error codes. */
+#define PPPERR_NONE         0  /* No error. */
+#define PPPERR_PARAM        1  /* Invalid parameter. */
+#define PPPERR_OPEN         2  /* Unable to open PPP session. */
+#define PPPERR_DEVICE       3  /* Invalid I/O device for PPP. */
+#define PPPERR_ALLOC        4  /* Unable to allocate resources. */
+#define PPPERR_USER         5  /* User interrupt. */
+#define PPPERR_CONNECT      6  /* Connection lost. */
+#define PPPERR_AUTHFAIL     7  /* Failed authentication challenge. */
+#define PPPERR_PROTOCOL     8  /* Failed to meet protocol. */
+#define PPPERR_PEERDEAD     9  /* Connection timeout */
+#define PPPERR_IDLETIMEOUT  10 /* Idle Timeout */
+#define PPPERR_CONNECTTIME  11 /* Max connect time reached */
+#define PPPERR_LOOPBACK     12 /* Loopback detected */
+
+/* Whether auth support is enabled at all */
+#define PPP_AUTH_SUPPORT (PAP_SUPPORT || CHAP_SUPPORT || EAP_SUPPORT)
+
+/************************
+*** PUBLIC DATA TYPES ***
+************************/
+
+/*
+ * Other headers require ppp_pcb definition for prototypes, but ppp_pcb
+ * require some structure definition from other headers as well, we are
+ * fixing the dependency loop here by declaring the ppp_pcb type then
+ * by including headers containing necessary struct definition for ppp_pcb
+ */
+typedef struct ppp_pcb_s ppp_pcb;
+
+/* Type definitions for BSD code. */
+#ifndef __u_char_defined
+typedef unsigned long  u_long;
+typedef unsigned int   u_int;
+typedef unsigned short u_short;
+typedef unsigned char  u_char;
+#endif
+
+#include "fsm.h"
+#include "lcp.h"
+#if CCP_SUPPORT
+#include "ccp.h"
+#endif /* CCP_SUPPORT */
+#if MPPE_SUPPORT
+#include "mppe.h"
+#endif /* MPPE_SUPPORT */
+#if PPP_IPV4_SUPPORT
+#include "ipcp.h"
+#endif /* PPP_IPV4_SUPPORT */
+#if PPP_IPV6_SUPPORT
+#include "ipv6cp.h"
+#endif /* PPP_IPV6_SUPPORT */
+#if PAP_SUPPORT
+#include "upap.h"
+#endif /* PAP_SUPPORT */
+#if CHAP_SUPPORT
+#include "chap-new.h"
+#endif /* CHAP_SUPPORT */
+#if EAP_SUPPORT
+#include "eap.h"
+#endif /* EAP_SUPPORT */
+#if VJ_SUPPORT
+#include "vj.h"
+#endif /* VJ_SUPPORT */
+
+/* Link status callback function prototype */
+typedef void (*ppp_link_status_cb_fn)(ppp_pcb *pcb, int err_code, void *ctx);
+
+/*
+ * PPP configuration.
+ */
+typedef struct ppp_settings_s {
+
+#if PPP_SERVER && PPP_AUTH_SUPPORT
+  unsigned int  auth_required       :1;      /* Peer is required to authenticate */
+  unsigned int  null_login          :1;      /* Username of "" and a password of "" are acceptable */
+#endif /* PPP_SERVER && PPP_AUTH_SUPPORT */
+#if PPP_REMOTENAME
+  unsigned int  explicit_remote     :1;      /* remote_name specified with remotename opt */
+#endif /* PPP_REMOTENAME */
+#if PAP_SUPPORT
+  unsigned int  refuse_pap          :1;      /* Don't proceed auth. with PAP */
+#endif /* PAP_SUPPORT */
+#if CHAP_SUPPORT
+  unsigned int  refuse_chap         :1;      /* Don't proceed auth. with CHAP */
+#endif /* CHAP_SUPPORT */
+#if MSCHAP_SUPPORT
+  unsigned int  refuse_mschap       :1;      /* Don't proceed auth. with MS-CHAP */
+  unsigned int  refuse_mschap_v2    :1;      /* Don't proceed auth. with MS-CHAPv2 */
+#endif /* MSCHAP_SUPPORT */
+#if EAP_SUPPORT
+  unsigned int  refuse_eap          :1;      /* Don't proceed auth. with EAP */
+#endif /* EAP_SUPPORT */
+#if LWIP_DNS
+  unsigned int  usepeerdns          :1;      /* Ask peer for DNS adds */
+#endif /* LWIP_DNS */
+  unsigned int  persist             :1;      /* Persist mode, always try to open the connection */
+#if PRINTPKT_SUPPORT
+  unsigned int  hide_password       :1;      /* Hide password in dumped packets */
+#endif /* PRINTPKT_SUPPORT */
+  unsigned int  noremoteip          :1;      /* Let him have no IP address */
+  unsigned int  lax_recv            :1;      /* accept control chars in asyncmap */
+  unsigned int  noendpoint          :1;      /* don't send/accept endpoint discriminator */
+#if PPP_LCP_ADAPTIVE
+  unsigned int lcp_echo_adaptive    :1;      /* request echo only if the link was idle */
+#endif /* PPP_LCP_ADAPTIVE */
+#if MPPE_SUPPORT
+  unsigned int require_mppe         :1;      /* Require MPPE (Microsoft Point to Point Encryption) */
+  unsigned int refuse_mppe_40       :1;      /* Allow MPPE 40-bit mode? */
+  unsigned int refuse_mppe_128      :1;      /* Allow MPPE 128-bit mode? */
+  unsigned int refuse_mppe_stateful :1;      /* Allow MPPE stateful mode? */
+#endif /* MPPE_SUPPORT */
+
+  u16_t  listen_time;                 /* time to listen first (ms), waiting for peer to send LCP packet */
+
+#if PPP_IDLETIMELIMIT
+  u16_t  idle_time_limit;             /* Disconnect if idle for this many seconds */
+#endif /* PPP_IDLETIMELIMIT */
+#if PPP_MAXCONNECT
+  u32_t  maxconnect;                  /* Maximum connect time (seconds) */
+#endif /* PPP_MAXCONNECT */
+
+#if PPP_AUTH_SUPPORT
+  /* auth data */
+  const char  *user;                   /* Username for PAP */
+  const char  *passwd;                 /* Password for PAP, secret for CHAP */
+#if PPP_REMOTENAME
+  char  remote_name[MAXNAMELEN   + 1]; /* Peer's name for authentication */
+#endif /* PPP_REMOTENAME */
+
+#if PAP_SUPPORT
+  u8_t  pap_timeout_time;        /* Timeout (seconds) for auth-req retrans. */
+  u8_t  pap_max_transmits;       /* Number of auth-reqs sent */
+#if PPP_SERVER
+  u8_t  pap_req_timeout;         /* Time to wait for auth-req from peer */
+#endif /* PPP_SERVER */
+#endif /* PAP_SUPPPORT */
+
+#if CHAP_SUPPORT
+  u8_t  chap_timeout_time;       /* Timeout (seconds) for retransmitting req */
+  u8_t  chap_max_transmits;      /* max # times to send challenge */
+#if PPP_SERVER
+  u8_t  chap_rechallenge_time;   /* Time to wait for auth-req from peer */
+#endif /* PPP_SERVER */
+#endif /* CHAP_SUPPPORT */
+
+#if EAP_SUPPORT
+  u8_t  eap_req_time;            /* Time to wait (for retransmit/fail) */
+  u8_t  eap_allow_req;           /* Max Requests allowed */
+#if PPP_SERVER
+  u8_t  eap_timeout_time;        /* Time to wait (for retransmit/fail) */
+  u8_t  eap_max_transmits;       /* Max Requests allowed */
+#endif /* PPP_SERVER */
+#endif /* EAP_SUPPORT */
+
+#endif /* PPP_AUTH_SUPPORT */
+
+  u8_t  fsm_timeout_time;            /* Timeout time in seconds */
+  u8_t  fsm_max_conf_req_transmits;  /* Maximum Configure-Request transmissions */
+  u8_t  fsm_max_term_transmits;      /* Maximum Terminate-Request transmissions */
+  u8_t  fsm_max_nak_loops;           /* Maximum number of nak loops tolerated */
+
+  u8_t  lcp_loopbackfail;     /* Number of times we receive our magic number from the peer
+                                 before deciding the link is looped-back. */
+  u8_t  lcp_echo_interval;    /* Interval between LCP echo-requests */
+  u8_t  lcp_echo_fails;       /* Tolerance to unanswered echo-requests */
+
+} ppp_settings;
+
+#if PPP_SERVER
+struct ppp_addrs {
+#if PPP_IPV4_SUPPORT
+  ip4_addr_t our_ipaddr, his_ipaddr, netmask;
+#if LWIP_DNS
+  ip4_addr_t dns1, dns2;
+#endif /* LWIP_DNS */
+#endif /* PPP_IPV4_SUPPORT */
+#if PPP_IPV6_SUPPORT
+  ip6_addr_t our6_ipaddr, his6_ipaddr;
+#endif /* PPP_IPV6_SUPPORT */
+};
+#endif /* PPP_SERVER */
+
+/*
+ * PPP interface control block.
+ */
+struct ppp_pcb_s {
+  ppp_settings settings;
+  const struct link_callbacks *link_cb;
+  void *link_ctx_cb;
+  void (*link_status_cb)(ppp_pcb *pcb, int err_code, void *ctx);  /* Status change callback */
+#if PPP_NOTIFY_PHASE
+  void (*notify_phase_cb)(ppp_pcb *pcb, u8_t phase, void *ctx);   /* Notify phase callback */
+#endif /* PPP_NOTIFY_PHASE */
+  void *ctx_cb;                  /* Callbacks optional pointer */
+  struct netif *netif;           /* PPP interface */
+  u8_t phase;                    /* where the link is at */
+  u8_t err_code;                 /* Code indicating why interface is down. */
+
+  /* flags */
+#if PPP_IPV4_SUPPORT
+  unsigned int ask_for_local           :1; /* request our address from peer */
+  unsigned int ipcp_is_open            :1; /* haven't called np_finished() */
+  unsigned int ipcp_is_up              :1; /* have called ipcp_up() */
+  unsigned int if4_up                  :1; /* True when the IPv4 interface is up. */
+#if 0 /* UNUSED - PROXY ARP */
+  unsigned int proxy_arp_set           :1; /* Have created proxy arp entry */
+#endif /* UNUSED - PROXY ARP */
+#endif /* PPP_IPV4_SUPPORT */
+#if PPP_IPV6_SUPPORT
+  unsigned int ipv6cp_is_up            :1; /* have called ip6cp_up() */
+  unsigned int if6_up                  :1; /* True when the IPv6 interface is up. */
+#endif /* PPP_IPV6_SUPPORT */
+  unsigned int lcp_echo_timer_running  :1; /* set if a timer is running */
+#if VJ_SUPPORT
+  unsigned int vj_enabled              :1; /* Flag indicating VJ compression enabled. */
+#endif /* VJ_SUPPORT */
+#if CCP_SUPPORT
+  unsigned int ccp_all_rejected        :1; /* we rejected all peer's options */
+#endif /* CCP_SUPPORT */
+#if MPPE_SUPPORT
+  unsigned int mppe_keys_set           :1; /* Have the MPPE keys been set? */
+#endif /* MPPE_SUPPORT */
+
+#if PPP_AUTH_SUPPORT
+  /* auth data */
+#if PPP_SERVER && defined(HAVE_MULTILINK)
+  char peer_authname[MAXNAMELEN + 1]; /* The name by which the peer authenticated itself to us. */
+#endif /* PPP_SERVER && defined(HAVE_MULTILINK) */
+  u16_t auth_pending;        /* Records which authentication operations haven't completed yet. */
+  u16_t auth_done;           /* Records which authentication operations have been completed. */
+
+#if PAP_SUPPORT
+  upap_state upap;           /* PAP data */
+#endif /* PAP_SUPPORT */
+
+#if CHAP_SUPPORT
+  chap_client_state chap_client;  /* CHAP client data */
+#if PPP_SERVER
+  chap_server_state chap_server;  /* CHAP server data */
+#endif /* PPP_SERVER */
+#endif /* CHAP_SUPPORT */
+
+#if EAP_SUPPORT
+  eap_state eap;            /* EAP data */
+#endif /* EAP_SUPPORT */
+#endif /* PPP_AUTH_SUPPORT */
+
+  fsm lcp_fsm;                   /* LCP fsm structure */
+  lcp_options lcp_wantoptions;   /* Options that we want to request */
+  lcp_options lcp_gotoptions;    /* Options that peer ack'd */
+  lcp_options lcp_allowoptions;  /* Options we allow peer to request */
+  lcp_options lcp_hisoptions;    /* Options that we ack'd */
+  u16_t peer_mru;                /* currently negotiated peer MRU */
+  u8_t lcp_echos_pending;        /* Number of outstanding echo msgs */
+  u8_t lcp_echo_number;          /* ID number of next echo frame */
+
+  u8_t num_np_open;              /* Number of network protocols which we have opened. */
+  u8_t num_np_up;                /* Number of network protocols which have come up. */
+
+#if VJ_SUPPORT
+  struct vjcompress vj_comp;     /* Van Jacobson compression header. */
+#endif /* VJ_SUPPORT */
+
+#if CCP_SUPPORT
+  fsm ccp_fsm;                   /* CCP fsm structure */
+  ccp_options ccp_wantoptions;   /* what to request the peer to use */
+  ccp_options ccp_gotoptions;    /* what the peer agreed to do */
+  ccp_options ccp_allowoptions;  /* what we'll agree to do */
+  ccp_options ccp_hisoptions;    /* what we agreed to do */
+  u8_t ccp_localstate;           /* Local state (mainly for handling reset-reqs and reset-acks). */
+  u8_t ccp_receive_method;       /* Method chosen on receive path */
+  u8_t ccp_transmit_method;      /* Method chosen on transmit path */
+#if MPPE_SUPPORT
+  ppp_mppe_state mppe_comp;      /* MPPE "compressor" structure */
+  ppp_mppe_state mppe_decomp;    /* MPPE "decompressor" structure */
+#endif /* MPPE_SUPPORT */
+#endif /* CCP_SUPPORT */
+
+#if PPP_IPV4_SUPPORT
+  fsm ipcp_fsm;                   /* IPCP fsm structure */
+  ipcp_options ipcp_wantoptions;  /* Options that we want to request */
+  ipcp_options ipcp_gotoptions;   /* Options that peer ack'd */
+  ipcp_options ipcp_allowoptions; /* Options we allow peer to request */
+  ipcp_options ipcp_hisoptions;   /* Options that we ack'd */
+#endif /* PPP_IPV4_SUPPORT */
+
+#if PPP_IPV6_SUPPORT
+  fsm ipv6cp_fsm;                     /* IPV6CP fsm structure */
+  ipv6cp_options ipv6cp_wantoptions;  /* Options that we want to request */
+  ipv6cp_options ipv6cp_gotoptions;   /* Options that peer ack'd */
+  ipv6cp_options ipv6cp_allowoptions; /* Options we allow peer to request */
+  ipv6cp_options ipv6cp_hisoptions;   /* Options that we ack'd */
+#endif /* PPP_IPV6_SUPPORT */
+};
+
+/************************
+ *** PUBLIC FUNCTIONS ***
+ ************************/
+
+/*
+ * WARNING: For multi-threads environment, all ppp_set_* functions most
+ * only be called while the PPP is in the dead phase (i.e. disconnected).
+ */
+
+#if PPP_AUTH_SUPPORT
+/*
+ * Set PPP authentication.
+ *
+ * Warning: Using PPPAUTHTYPE_ANY might have security consequences.
+ * RFC 1994 says:
+ *
+ * In practice, within or associated with each PPP server, there is a
+ * database which associates "user" names with authentication
+ * information ("secrets").  It is not anticipated that a particular
+ * named user would be authenticated by multiple methods.  This would
+ * make the user vulnerable to attacks which negotiate the least secure
+ * method from among a set (such as PAP rather than CHAP).  If the same
+ * secret was used, PAP would reveal the secret to be used later with
+ * CHAP.
+ *
+ * Instead, for each user name there should be an indication of exactly
+ * one method used to authenticate that user name.  If a user needs to
+ * make use of different authentication methods under different
+ * circumstances, then distinct user names SHOULD be employed, each of
+ * which identifies exactly one authentication method.
+ *
+ * Default is none auth type, unset (NULL) user and passwd.
+ */
+#define PPPAUTHTYPE_NONE      0x00
+#define PPPAUTHTYPE_PAP       0x01
+#define PPPAUTHTYPE_CHAP      0x02
+#define PPPAUTHTYPE_MSCHAP    0x04
+#define PPPAUTHTYPE_MSCHAP_V2 0x08
+#define PPPAUTHTYPE_EAP       0x10
+#define PPPAUTHTYPE_ANY       0xff
+void ppp_set_auth(ppp_pcb *pcb, u8_t authtype, const char *user, const char *passwd);
+
+/*
+ * If set, peer is required to authenticate. This is mostly necessary for PPP server support.
+ *
+ * Default is false.
+ */
+#define ppp_set_auth_required(ppp, boolval) (ppp->settings.auth_required = boolval)
+#endif /* PPP_AUTH_SUPPORT */
+
+#if PPP_IPV4_SUPPORT
+/*
+ * Set PPP interface "our" and "his" IPv4 addresses. This is mostly necessary for PPP server
+ * support but it can also be used on a PPP link where each side choose its own IP address.
+ *
+ * Default is unset (0.0.0.0).
+ */
+#define ppp_set_ipcp_ouraddr(ppp, addr) do { ppp->ipcp_wantoptions.ouraddr = ip4_addr_get_u32(addr); \
+                                             ppp->ask_for_local = ppp->ipcp_wantoptions.ouraddr != 0; } while(0)
+#define ppp_set_ipcp_hisaddr(ppp, addr) (ppp->ipcp_wantoptions.hisaddr = ip4_addr_get_u32(addr))
+#if LWIP_DNS
+/*
+ * Set DNS server addresses that are sent if the peer asks for them. This is mostly necessary
+ * for PPP server support.
+ *
+ * Default is unset (0.0.0.0).
+ */
+#define ppp_set_ipcp_dnsaddr(ppp, index, addr) (ppp->ipcp_allowoptions.dnsaddr[index] = ip4_addr_get_u32(addr))
+
+/*
+ * If set, we ask the peer for up to 2 DNS server addresses. Received DNS server addresses are
+ * registered using the dns_setserver() function.
+ *
+ * Default is false.
+ */
+#define ppp_set_usepeerdns(ppp, boolval) (ppp->settings.usepeerdns = boolval)
+#endif /* LWIP_DNS */
+#endif /* PPP_IPV4_SUPPORT */
+
+#if MPPE_SUPPORT
+/* Disable MPPE (Microsoft Point to Point Encryption). This parameter is exclusive. */
+#define PPP_MPPE_DISABLE           0x00
+/* Require the use of MPPE (Microsoft Point to Point Encryption). */
+#define PPP_MPPE_ENABLE            0x01
+/* Allow MPPE to use stateful mode. Stateless mode is still attempted first. */
+#define PPP_MPPE_ALLOW_STATEFUL    0x02
+/* Refuse the use of MPPE with 40-bit encryption. Conflict with PPP_MPPE_REFUSE_128. */
+#define PPP_MPPE_REFUSE_40         0x04
+/* Refuse the use of MPPE with 128-bit encryption. Conflict with PPP_MPPE_REFUSE_40. */
+#define PPP_MPPE_REFUSE_128        0x08
+/*
+ * Set MPPE configuration
+ *
+ * Default is disabled.
+ */
+void ppp_set_mppe(ppp_pcb *pcb, u8_t flags);
+#endif /* MPPE_SUPPORT */
+
+/*
+ * Wait for up to intval milliseconds for a valid PPP packet from the peer.
+ * At the end of this  time, or when a valid PPP packet is received from the
+ * peer, we commence negotiation by sending our first LCP packet.
+ *
+ * Default is 0.
+ */
+#define ppp_set_listen_time(ppp, intval) (ppp->settings.listen_time = intval)
+
+/*
+ * If set, we will attempt to initiate a connection but if no reply is received from
+ * the peer, we will then just wait passively for a valid LCP packet from the peer.
+ *
+ * Default is false.
+ */
+#define ppp_set_passive(ppp, boolval) (ppp->lcp_wantoptions.passive = boolval)
+
+/*
+ * If set, we will not transmit LCP packets to initiate a connection until a valid
+ * LCP packet is received from the peer. This is what we usually call the server mode.
+ *
+ * Default is false.
+ */
+#define ppp_set_silent(ppp, boolval) (ppp->lcp_wantoptions.silent = boolval)
+
+/*
+ * If set, enable protocol field compression negotiation in both the receive and
+ * the transmit direction.
+ *
+ * Default is true.
+ */
+#define ppp_set_neg_pcomp(ppp, boolval) (ppp->lcp_wantoptions.neg_pcompression = \
+                                         ppp->lcp_allowoptions.neg_pcompression = boolval)
+
+/*
+ * If set, enable Address/Control compression in both the receive and the transmit
+ * direction.
+ *
+ * Default is true.
+ */
+#define ppp_set_neg_accomp(ppp, boolval) (ppp->lcp_wantoptions.neg_accompression = \
+                                          ppp->lcp_allowoptions.neg_accompression = boolval)
+
+/*
+ * If set, enable asyncmap negotiation. Otherwise forcing all control characters to
+ * be escaped for both the transmit and the receive direction.
+ *
+ * Default is true.
+ */
+#define ppp_set_neg_asyncmap(ppp, boolval) (ppp->lcp_wantoptions.neg_asyncmap = \
+                                            ppp->lcp_allowoptions.neg_asyncmap = boolval)
+
+/*
+ * This option sets the Async-Control-Character-Map (ACCM) for this end of the link.
+ * The ACCM is a set of 32 bits, one for each of the ASCII control characters with
+ * values from 0 to 31, where a 1 bit  indicates that the corresponding control
+ * character should not be used in PPP packets sent to this system. The map is
+ * an unsigned 32 bits integer where the least significant bit (00000001) represents
+ * character 0 and the most significant bit (80000000) represents character 31.
+ * We will then ask the peer to send these characters as a 2-byte escape sequence.
+ *
+ * Default is 0.
+ */
+#define ppp_set_asyncmap(ppp, intval) (ppp->lcp_wantoptions.asyncmap = intval)
+
+/*
+ * Set a PPP interface as the default network interface
+ * (used to output all packets for which no specific route is found).
+ */
+#define ppp_set_default(ppp)         netif_set_default(ppp->netif)
+
+#if PPP_NOTIFY_PHASE
+/*
+ * Set a PPP notify phase callback.
+ *
+ * This can be used for example to set a LED pattern depending on the
+ * current phase of the PPP session.
+ */
+typedef void (*ppp_notify_phase_cb_fn)(ppp_pcb *pcb, u8_t phase, void *ctx);
+void ppp_set_notify_phase_callback(ppp_pcb *pcb, ppp_notify_phase_cb_fn notify_phase_cb);
+#endif /* PPP_NOTIFY_PHASE */
+
+/*
+ * Initiate a PPP connection.
+ *
+ * This can only be called if PPP is in the dead phase.
+ *
+ * Holdoff is the time to wait (in seconds) before initiating
+ * the connection.
+ *
+ * If this port connects to a modem, the modem connection must be
+ * established before calling this.
+ */
+err_t ppp_connect(ppp_pcb *pcb, u16_t holdoff);
+
+#if PPP_SERVER
+/*
+ * Listen for an incoming PPP connection.
+ *
+ * This can only be called if PPP is in the dead phase.
+ *
+ * If this port connects to a modem, the modem connection must be
+ * established before calling this.
+ */
+err_t ppp_listen(ppp_pcb *pcb);
+#endif /* PPP_SERVER */
+
+/*
+ * Initiate the end of a PPP connection.
+ * Any outstanding packets in the queues are dropped.
+ *
+ * Setting nocarrier to 1 close the PPP connection without initiating the
+ * shutdown procedure. Always using nocarrier = 0 is still recommended,
+ * this is going to take a little longer time if your link is down, but
+ * is a safer choice for the PPP state machine.
+ *
+ * Return 0 on success, an error code on failure.
+ */
+err_t ppp_close(ppp_pcb *pcb, u8_t nocarrier);
+
+/*
+ * Release the control block.
+ *
+ * This can only be called if PPP is in the dead phase.
+ *
+ * You must use ppp_close() before if you wish to terminate
+ * an established PPP session.
+ *
+ * Return 0 on success, an error code on failure.
+ */
+err_t ppp_free(ppp_pcb *pcb);
+
+/*
+ * PPP IOCTL commands.
+ *
+ * Get the up status - 0 for down, non-zero for up.  The argument must
+ * point to an int.
+ */
+#define PPPCTLG_UPSTATUS 0
+
+/*
+ * Get the PPP error code.  The argument must point to an int.
+ * Returns a PPPERR_* value.
+ */
+#define PPPCTLG_ERRCODE  1
+
+/*
+ * Get the fd associated with a PPP over serial
+ */
+#define PPPCTLG_FD       2
+
+/*
+ * Get and set parameters for the given connection.
+ * Return 0 on success, an error code on failure.
+ */
+err_t ppp_ioctl(ppp_pcb *pcb, u8_t cmd, void *arg);
+
+/* Get the PPP netif interface */
+#define ppp_netif(ppp)               (ppp->netif)
+
+/* Set an lwIP-style status-callback for the selected PPP device */
+#define ppp_set_netif_statuscallback(ppp, status_cb)       \
+        netif_set_status_callback(ppp->netif, status_cb);
+
+/* Set an lwIP-style link-callback for the selected PPP device */
+#define ppp_set_netif_linkcallback(ppp, link_cb)           \
+        netif_set_link_callback(ppp->netif, link_cb);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PPP_H */
+
+#endif /* PPP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ppp_impl.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ppp_impl.h
new file mode 100644
index 00000000000..40843d5a0ac
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ppp_impl.h
@@ -0,0 +1,722 @@
+/*****************************************************************************
+* ppp.h - Network Point to Point Protocol header file.
+*
+* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc.
+* portions Copyright (c) 1997 Global Election Systems Inc.
+*
+* The authors hereby grant permission to use, copy, modify, distribute,
+* and license this software and its documentation for any purpose, provided
+* that existing copyright notices are retained in all copies and that this
+* notice and the following disclaimer are included verbatim in any
+* distributions. No written agreement, license, or royalty fee is required
+* for any of the authorized uses.
+*
+* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+******************************************************************************
+* REVISION HISTORY
+*
+* 03-01-01 Marc Boucher <marc@mbsi.ca>
+*   Ported to lwIP.
+* 97-11-05 Guy Lancaster <glanca@gesn.com>, Global Election Systems Inc.
+*   Original derived from BSD codes.
+*****************************************************************************/
+#ifndef LWIP_HDR_PPP_IMPL_H
+#define LWIP_HDR_PPP_IMPL_H
+
+#include "netif/ppp/ppp_opts.h"
+
+#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+#ifdef PPP_INCLUDE_SETTINGS_HEADER
+#include "ppp_settings.h"
+#endif
+
+#include <stdio.h> /* formats */
+#include <stdarg.h>
+#include <string.h>
+#include <stdlib.h> /* strtol() */
+
+#include "lwip/netif.h"
+#include "lwip/def.h"
+#include "lwip/timeouts.h"
+
+#include "ppp.h"
+#include "pppdebug.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Memory used for control packets.
+ *
+ * PPP_CTRL_PBUF_MAX_SIZE is the amount of memory we allocate when we
+ * cannot figure out how much we are going to use before filling the buffer.
+ */
+#if PPP_USE_PBUF_RAM
+#define PPP_CTRL_PBUF_TYPE       PBUF_RAM
+#define PPP_CTRL_PBUF_MAX_SIZE   512
+#else /* PPP_USE_PBUF_RAM */
+#define PPP_CTRL_PBUF_TYPE       PBUF_POOL
+#define PPP_CTRL_PBUF_MAX_SIZE   PBUF_POOL_BUFSIZE
+#endif /* PPP_USE_PBUF_RAM */
+
+/*
+ * The basic PPP frame.
+ */
+#define PPP_ADDRESS(p)	(((u_char *)(p))[0])
+#define PPP_CONTROL(p)	(((u_char *)(p))[1])
+#define PPP_PROTOCOL(p)	((((u_char *)(p))[2] << 8) + ((u_char *)(p))[3])
+
+/*
+ * Significant octet values.
+ */
+#define	PPP_ALLSTATIONS	0xff	/* All-Stations broadcast address */
+#define	PPP_UI		0x03	/* Unnumbered Information */
+#define	PPP_FLAG	0x7e	/* Flag Sequence */
+#define	PPP_ESCAPE	0x7d	/* Asynchronous Control Escape */
+#define	PPP_TRANS	0x20	/* Asynchronous transparency modifier */
+
+/*
+ * Protocol field values.
+ */
+#define PPP_IP		0x21	/* Internet Protocol */
+#if 0 /* UNUSED */
+#define PPP_AT		0x29	/* AppleTalk Protocol */
+#define PPP_IPX		0x2b	/* IPX protocol */
+#endif /* UNUSED */
+#if VJ_SUPPORT
+#define	PPP_VJC_COMP	0x2d	/* VJ compressed TCP */
+#define	PPP_VJC_UNCOMP	0x2f	/* VJ uncompressed TCP */
+#endif /* VJ_SUPPORT */
+#if PPP_IPV6_SUPPORT
+#define PPP_IPV6	0x57	/* Internet Protocol Version 6 */
+#endif /* PPP_IPV6_SUPPORT */
+#if CCP_SUPPORT
+#define PPP_COMP	0xfd	/* compressed packet */
+#endif /* CCP_SUPPORT */
+#define PPP_IPCP	0x8021	/* IP Control Protocol */
+#if 0 /* UNUSED */
+#define PPP_ATCP	0x8029	/* AppleTalk Control Protocol */
+#define PPP_IPXCP	0x802b	/* IPX Control Protocol */
+#endif /* UNUSED */
+#if PPP_IPV6_SUPPORT
+#define PPP_IPV6CP	0x8057	/* IPv6 Control Protocol */
+#endif /* PPP_IPV6_SUPPORT */
+#if CCP_SUPPORT
+#define PPP_CCP		0x80fd	/* Compression Control Protocol */
+#endif /* CCP_SUPPORT */
+#if ECP_SUPPORT
+#define PPP_ECP		0x8053	/* Encryption Control Protocol */
+#endif /* ECP_SUPPORT */
+#define PPP_LCP		0xc021	/* Link Control Protocol */
+#if PAP_SUPPORT
+#define PPP_PAP		0xc023	/* Password Authentication Protocol */
+#endif /* PAP_SUPPORT */
+#if LQR_SUPPORT
+#define PPP_LQR		0xc025	/* Link Quality Report protocol */
+#endif /* LQR_SUPPORT */
+#if CHAP_SUPPORT
+#define PPP_CHAP	0xc223	/* Cryptographic Handshake Auth. Protocol */
+#endif /* CHAP_SUPPORT */
+#if CBCP_SUPPORT
+#define PPP_CBCP	0xc029	/* Callback Control Protocol */
+#endif /* CBCP_SUPPORT */
+#if EAP_SUPPORT
+#define PPP_EAP		0xc227	/* Extensible Authentication Protocol */
+#endif /* EAP_SUPPORT */
+
+/*
+ * The following struct gives the addresses of procedures to call
+ * for a particular lower link level protocol.
+ */
+struct link_callbacks {
+  /* Start a connection (e.g. Initiate discovery phase) */
+  void (*connect) (ppp_pcb *pcb, void *ctx);
+#if PPP_SERVER
+  /* Listen for an incoming connection (Passive mode) */
+  void (*listen) (ppp_pcb *pcb, void *ctx);
+#endif /* PPP_SERVER */
+  /* End a connection (i.e. initiate disconnect phase) */
+  void (*disconnect) (ppp_pcb *pcb, void *ctx);
+  /* Free lower protocol control block */
+  err_t (*free) (ppp_pcb *pcb, void *ctx);
+  /* Write a pbuf to a ppp link, only used from PPP functions to send PPP packets. */
+  err_t (*write)(ppp_pcb *pcb, void *ctx, struct pbuf *p);
+  /* Send a packet from lwIP core (IPv4 or IPv6) */
+  err_t (*netif_output)(ppp_pcb *pcb, void *ctx, struct pbuf *p, u_short protocol);
+  /* configure the transmit-side characteristics of the PPP interface */
+  void (*send_config)(ppp_pcb *pcb, void *ctx, u32_t accm, int pcomp, int accomp);
+  /* confire the receive-side characteristics of the PPP interface */
+  void (*recv_config)(ppp_pcb *pcb, void *ctx, u32_t accm, int pcomp, int accomp);
+};
+
+/*
+ * What to do with network protocol (NP) packets.
+ */
+enum NPmode {
+    NPMODE_PASS,		/* pass the packet through */
+    NPMODE_DROP,		/* silently drop the packet */
+    NPMODE_ERROR,		/* return an error */
+    NPMODE_QUEUE		/* save it up for later. */
+};
+
+/*
+ * Statistics.
+ */
+#if PPP_STATS_SUPPORT
+struct pppstat	{
+    unsigned int ppp_ibytes;	/* bytes received */
+    unsigned int ppp_ipackets;	/* packets received */
+    unsigned int ppp_ierrors;	/* receive errors */
+    unsigned int ppp_obytes;	/* bytes sent */
+    unsigned int ppp_opackets;	/* packets sent */
+    unsigned int ppp_oerrors;	/* transmit errors */
+};
+
+#if VJ_SUPPORT
+struct vjstat {
+    unsigned int vjs_packets;	/* outbound packets */
+    unsigned int vjs_compressed; /* outbound compressed packets */
+    unsigned int vjs_searches;	/* searches for connection state */
+    unsigned int vjs_misses;	/* times couldn't find conn. state */
+    unsigned int vjs_uncompressedin; /* inbound uncompressed packets */
+    unsigned int vjs_compressedin; /* inbound compressed packets */
+    unsigned int vjs_errorin;	/* inbound unknown type packets */
+    unsigned int vjs_tossed;	/* inbound packets tossed because of error */
+};
+#endif /* VJ_SUPPORT */
+
+struct ppp_stats {
+    struct pppstat p;		/* basic PPP statistics */
+#if VJ_SUPPORT
+    struct vjstat vj;		/* VJ header compression statistics */
+#endif /* VJ_SUPPORT */
+};
+
+#if CCP_SUPPORT
+struct compstat {
+    unsigned int unc_bytes;	/* total uncompressed bytes */
+    unsigned int unc_packets;	/* total uncompressed packets */
+    unsigned int comp_bytes;	/* compressed bytes */
+    unsigned int comp_packets;	/* compressed packets */
+    unsigned int inc_bytes;	/* incompressible bytes */
+    unsigned int inc_packets;	/* incompressible packets */
+    unsigned int ratio;		/* recent compression ratio << 8 */
+};
+
+struct ppp_comp_stats {
+    struct compstat c;		/* packet compression statistics */
+    struct compstat d;		/* packet decompression statistics */
+};
+#endif /* CCP_SUPPORT */
+
+#endif /* PPP_STATS_SUPPORT */
+
+#if PPP_IDLETIMELIMIT
+/*
+ * The following structure records the time in seconds since
+ * the last NP packet was sent or received.
+ */
+struct ppp_idle {
+    time_t xmit_idle;		/* time since last NP packet sent */
+    time_t recv_idle;		/* time since last NP packet received */
+};
+#endif /* PPP_IDLETIMELIMIT */
+
+/* values for epdisc.class */
+#define EPD_NULL	0	/* null discriminator, no data */
+#define EPD_LOCAL	1
+#define EPD_IP		2
+#define EPD_MAC		3
+#define EPD_MAGIC	4
+#define EPD_PHONENUM	5
+
+/*
+ * Global variables.
+ */
+#ifdef HAVE_MULTILINK
+extern u8_t	multilink;	/* enable multilink operation */
+extern u8_t	doing_multilink;
+extern u8_t	multilink_master;
+extern u8_t	bundle_eof;
+extern u8_t	bundle_terminating;
+#endif
+
+#ifdef MAXOCTETS
+extern unsigned int maxoctets;	     /* Maximum octetes per session (in bytes) */
+extern int       maxoctets_dir;      /* Direction :
+				      0 - in+out (default)
+				      1 - in
+				      2 - out
+				      3 - max(in,out) */
+extern int       maxoctets_timeout;  /* Timeout for check of octets limit */
+#define PPP_OCTETS_DIRECTION_SUM        0
+#define PPP_OCTETS_DIRECTION_IN         1
+#define PPP_OCTETS_DIRECTION_OUT        2
+#define PPP_OCTETS_DIRECTION_MAXOVERAL  3
+/* same as previos, but little different on RADIUS side */
+#define PPP_OCTETS_DIRECTION_MAXSESSION 4
+#endif
+
+/* Data input may be used by CCP and ECP, remove this entry
+ * from struct protent to save some flash
+ */
+#define PPP_DATAINPUT 0
+
+/*
+ * The following struct gives the addresses of procedures to call
+ * for a particular protocol.
+ */
+struct protent {
+    u_short protocol;		/* PPP protocol number */
+    /* Initialization procedure */
+    void (*init) (ppp_pcb *pcb);
+    /* Process a received packet */
+    void (*input) (ppp_pcb *pcb, u_char *pkt, int len);
+    /* Process a received protocol-reject */
+    void (*protrej) (ppp_pcb *pcb);
+    /* Lower layer has come up */
+    void (*lowerup) (ppp_pcb *pcb);
+    /* Lower layer has gone down */
+    void (*lowerdown) (ppp_pcb *pcb);
+    /* Open the protocol */
+    void (*open) (ppp_pcb *pcb);
+    /* Close the protocol */
+    void (*close) (ppp_pcb *pcb, const char *reason);
+#if PRINTPKT_SUPPORT
+    /* Print a packet in readable form */
+    int  (*printpkt) (const u_char *pkt, int len,
+			  void (*printer) (void *, const char *, ...),
+			  void *arg);
+#endif /* PRINTPKT_SUPPORT */
+#if PPP_DATAINPUT
+    /* Process a received data packet */
+    void (*datainput) (ppp_pcb *pcb, u_char *pkt, int len);
+#endif /* PPP_DATAINPUT */
+#if PRINTPKT_SUPPORT
+    const char *name;		/* Text name of protocol */
+    const char *data_name;	/* Text name of corresponding data protocol */
+#endif /* PRINTPKT_SUPPORT */
+#if PPP_OPTIONS
+    option_t *options;		/* List of command-line options */
+    /* Check requested options, assign defaults */
+    void (*check_options) (void);
+#endif /* PPP_OPTIONS */
+#if DEMAND_SUPPORT
+    /* Configure interface for demand-dial */
+    int  (*demand_conf) (int unit);
+    /* Say whether to bring up link for this pkt */
+    int  (*active_pkt) (u_char *pkt, int len);
+#endif /* DEMAND_SUPPORT */
+};
+
+/* Table of pointers to supported protocols */
+extern const struct protent* const protocols[];
+
+
+/* Values for auth_pending, auth_done */
+#if PAP_SUPPORT
+#define PAP_WITHPEER	0x1
+#define PAP_PEER	0x2
+#endif /* PAP_SUPPORT */
+#if CHAP_SUPPORT
+#define CHAP_WITHPEER	0x4
+#define CHAP_PEER	0x8
+#endif /* CHAP_SUPPORT */
+#if EAP_SUPPORT
+#define EAP_WITHPEER	0x10
+#define EAP_PEER	0x20
+#endif /* EAP_SUPPORT */
+
+/* Values for auth_done only */
+#if CHAP_SUPPORT
+#define CHAP_MD5_WITHPEER	0x40
+#define CHAP_MD5_PEER		0x80
+#if MSCHAP_SUPPORT
+#define CHAP_MS_SHIFT		8	/* LSB position for MS auths */
+#define CHAP_MS_WITHPEER	0x100
+#define CHAP_MS_PEER		0x200
+#define CHAP_MS2_WITHPEER	0x400
+#define CHAP_MS2_PEER		0x800
+#endif /* MSCHAP_SUPPORT */
+#endif /* CHAP_SUPPORT */
+
+/* Supported CHAP protocols */
+#if CHAP_SUPPORT
+
+#if MSCHAP_SUPPORT
+#define CHAP_MDTYPE_SUPPORTED (MDTYPE_MICROSOFT_V2 | MDTYPE_MICROSOFT | MDTYPE_MD5)
+#else /* MSCHAP_SUPPORT */
+#define CHAP_MDTYPE_SUPPORTED (MDTYPE_MD5)
+#endif /* MSCHAP_SUPPORT */
+
+#else /* CHAP_SUPPORT */
+#define CHAP_MDTYPE_SUPPORTED (MDTYPE_NONE)
+#endif /* CHAP_SUPPORT */
+
+#if PPP_STATS_SUPPORT
+/*
+ * PPP statistics structure
+ */
+struct pppd_stats {
+    unsigned int	bytes_in;
+    unsigned int	bytes_out;
+    unsigned int	pkts_in;
+    unsigned int	pkts_out;
+};
+#endif /* PPP_STATS_SUPPORT */
+
+
+/*
+ * PPP private functions
+ */
+
+ 
+/*
+ * Functions called from lwIP core.
+ */
+
+/* initialize the PPP subsystem */
+int ppp_init(void);
+
+/*
+ * Functions called from PPP link protocols.
+ */
+
+/* Create a new PPP control block */
+ppp_pcb *ppp_new(struct netif *pppif, const struct link_callbacks *callbacks, void *link_ctx_cb,
+                 ppp_link_status_cb_fn link_status_cb, void *ctx_cb);
+
+/* Initiate LCP open request */
+void ppp_start(ppp_pcb *pcb);
+
+/* Called when link failed to setup */
+void ppp_link_failed(ppp_pcb *pcb);
+
+/* Called when link is normally down (i.e. it was asked to end) */
+void ppp_link_end(ppp_pcb *pcb);
+
+/* function called to process input packet */
+void ppp_input(ppp_pcb *pcb, struct pbuf *pb);
+
+
+/*
+ * Functions called by PPP protocols.
+ */
+
+/* function called by all PPP subsystems to send packets */
+err_t ppp_write(ppp_pcb *pcb, struct pbuf *p);
+
+/* functions called by auth.c link_terminated() */
+void ppp_link_terminated(ppp_pcb *pcb);
+
+void new_phase(ppp_pcb *pcb, int p);
+
+int ppp_send_config(ppp_pcb *pcb, int mtu, u32_t accm, int pcomp, int accomp);
+int ppp_recv_config(ppp_pcb *pcb, int mru, u32_t accm, int pcomp, int accomp);
+
+#if PPP_IPV4_SUPPORT
+int sifaddr(ppp_pcb *pcb, u32_t our_adr, u32_t his_adr, u32_t netmask);
+int cifaddr(ppp_pcb *pcb, u32_t our_adr, u32_t his_adr);
+#if 0 /* UNUSED - PROXY ARP */
+int sifproxyarp(ppp_pcb *pcb, u32_t his_adr);
+int cifproxyarp(ppp_pcb *pcb, u32_t his_adr);
+#endif /* UNUSED - PROXY ARP */
+#if LWIP_DNS
+int sdns(ppp_pcb *pcb, u32_t ns1, u32_t ns2);
+int cdns(ppp_pcb *pcb, u32_t ns1, u32_t ns2);
+#endif /* LWIP_DNS */
+#if VJ_SUPPORT
+int sifvjcomp(ppp_pcb *pcb, int vjcomp, int cidcomp, int maxcid);
+#endif /* VJ_SUPPORT */
+int sifup(ppp_pcb *pcb);
+int sifdown (ppp_pcb *pcb);
+u32_t get_mask(u32_t addr);
+#endif /* PPP_IPV4_SUPPORT */
+
+#if PPP_IPV6_SUPPORT
+int sif6addr(ppp_pcb *pcb, eui64_t our_eui64, eui64_t his_eui64);
+int cif6addr(ppp_pcb *pcb, eui64_t our_eui64, eui64_t his_eui64);
+int sif6up(ppp_pcb *pcb);
+int sif6down (ppp_pcb *pcb);
+#endif /* PPP_IPV6_SUPPORT */
+
+#if DEMAND_SUPPORT
+int sifnpmode(ppp_pcb *pcb, int proto, enum NPmode mode);
+#endif /* DEMAND_SUPPORt */
+
+void netif_set_mtu(ppp_pcb *pcb, int mtu);
+int netif_get_mtu(ppp_pcb *pcb);
+
+#if CCP_SUPPORT
+#if 0 /* unused */
+int ccp_test(ppp_pcb *pcb, u_char *opt_ptr, int opt_len, int for_transmit);
+#endif /* unused */
+void ccp_set(ppp_pcb *pcb, u8_t isopen, u8_t isup, u8_t receive_method, u8_t transmit_method);
+void ccp_reset_comp(ppp_pcb *pcb);
+void ccp_reset_decomp(ppp_pcb *pcb);
+#if 0 /* unused */
+int ccp_fatal_error(ppp_pcb *pcb);
+#endif /* unused */
+#endif /* CCP_SUPPORT */
+
+#if PPP_IDLETIMELIMIT
+int get_idle_time(ppp_pcb *pcb, struct ppp_idle *ip);
+#endif /* PPP_IDLETIMELIMIT */
+
+#if DEMAND_SUPPORT
+int get_loop_output(void);
+#endif /* DEMAND_SUPPORT */
+
+/* Optional protocol names list, to make our messages a little more informative. */
+#if PPP_PROTOCOLNAME
+const char * protocol_name(int proto);
+#endif /* PPP_PROTOCOLNAME  */
+
+/* Optional stats support, to get some statistics on the PPP interface */
+#if PPP_STATS_SUPPORT
+void print_link_stats(void); /* Print stats, if available */
+void reset_link_stats(int u); /* Reset (init) stats when link goes up */
+void update_link_stats(int u); /* Get stats at link termination */
+#endif /* PPP_STATS_SUPPORT */
+
+
+
+/*
+ * Inline versions of get/put char/short/long.
+ * Pointer is advanced; we assume that both arguments
+ * are lvalues and will already be in registers.
+ * cp MUST be u_char *.
+ */
+#define GETCHAR(c, cp) { \
+	(c) = *(cp)++; \
+}
+#define PUTCHAR(c, cp) { \
+	*(cp)++ = (u_char) (c); \
+}
+#define GETSHORT(s, cp) { \
+	(s) = *(cp)++ << 8; \
+	(s) |= *(cp)++; \
+}
+#define PUTSHORT(s, cp) { \
+	*(cp)++ = (u_char) ((s) >> 8); \
+	*(cp)++ = (u_char) (s); \
+}
+#define GETLONG(l, cp) { \
+	(l) = *(cp)++ << 8; \
+	(l) |= *(cp)++; (l) <<= 8; \
+	(l) |= *(cp)++; (l) <<= 8; \
+	(l) |= *(cp)++; \
+}
+#define PUTLONG(l, cp) { \
+	*(cp)++ = (u_char) ((l) >> 24); \
+	*(cp)++ = (u_char) ((l) >> 16); \
+	*(cp)++ = (u_char) ((l) >> 8); \
+	*(cp)++ = (u_char) (l); \
+}
+
+#define INCPTR(n, cp)	((cp) += (n))
+#define DECPTR(n, cp)	((cp) -= (n))
+
+/*
+ * System dependent definitions for user-level 4.3BSD UNIX implementation.
+ */
+#define TIMEOUT(f, a, t)        do { sys_untimeout((f), (a)); sys_timeout((t)*1000, (f), (a)); } while(0)
+#define TIMEOUTMS(f, a, t)      do { sys_untimeout((f), (a)); sys_timeout((t), (f), (a)); } while(0)
+#define UNTIMEOUT(f, a)         sys_untimeout((f), (a))
+
+#define BZERO(s, n)		memset(s, 0, n)
+#define	BCMP(s1, s2, l)		memcmp(s1, s2, l)
+
+#define PRINTMSG(m, l)		{ ppp_info("Remote message: %0.*v", l, m); }
+
+/*
+ * MAKEHEADER - Add Header fields to a packet.
+ */
+#define MAKEHEADER(p, t) { \
+    PUTCHAR(PPP_ALLSTATIONS, p); \
+    PUTCHAR(PPP_UI, p); \
+    PUTSHORT(t, p); }
+
+/* Procedures exported from auth.c */
+void link_required(ppp_pcb *pcb);     /* we are starting to use the link */
+void link_terminated(ppp_pcb *pcb);   /* we are finished with the link */
+void link_down(ppp_pcb *pcb);	      /* the LCP layer has left the Opened state */
+void upper_layers_down(ppp_pcb *pcb); /* take all NCPs down */
+void link_established(ppp_pcb *pcb);  /* the link is up; authenticate now */
+void start_networks(ppp_pcb *pcb);    /* start all the network control protos */
+void continue_networks(ppp_pcb *pcb); /* start network [ip, etc] control protos */
+#if PPP_AUTH_SUPPORT
+#if PPP_SERVER
+int auth_check_passwd(ppp_pcb *pcb, char *auser, int userlen, char *apasswd, int passwdlen, const char **msg, int *msglen);
+                                /* check the user name and passwd against configuration */
+void auth_peer_fail(ppp_pcb *pcb, int protocol);
+				/* peer failed to authenticate itself */
+void auth_peer_success(ppp_pcb *pcb, int protocol, int prot_flavor, const char *name, int namelen);
+				/* peer successfully authenticated itself */
+#endif /* PPP_SERVER */
+void auth_withpeer_fail(ppp_pcb *pcb, int protocol);
+				/* we failed to authenticate ourselves */
+void auth_withpeer_success(ppp_pcb *pcb, int protocol, int prot_flavor);
+				/* we successfully authenticated ourselves */
+#endif /* PPP_AUTH_SUPPORT */
+void np_up(ppp_pcb *pcb, int proto);    /* a network protocol has come up */
+void np_down(ppp_pcb *pcb, int proto);  /* a network protocol has gone down */
+void np_finished(ppp_pcb *pcb, int proto); /* a network protocol no longer needs link */
+#if PPP_AUTH_SUPPORT
+int get_secret(ppp_pcb *pcb, const char *client, const char *server, char *secret, int *secret_len, int am_server);
+				/* get "secret" for chap */
+#endif /* PPP_AUTH_SUPPORT */
+
+/* Procedures exported from ipcp.c */
+/* int parse_dotted_ip (char *, u32_t *); */
+
+/* Procedures exported from demand.c */
+#if DEMAND_SUPPORT
+void demand_conf (void);	/* config interface(s) for demand-dial */
+void demand_block (void);	/* set all NPs to queue up packets */
+void demand_unblock (void); /* set all NPs to pass packets */
+void demand_discard (void); /* set all NPs to discard packets */
+void demand_rexmit (int, u32_t); /* retransmit saved frames for an NP*/
+int  loop_chars (unsigned char *, int); /* process chars from loopback */
+int  loop_frame (unsigned char *, int); /* should we bring link up? */
+#endif /* DEMAND_SUPPORT */
+
+/* Procedures exported from multilink.c */
+#ifdef HAVE_MULTILINK
+void mp_check_options (void); /* Check multilink-related options */
+int  mp_join_bundle (void);  /* join our link to an appropriate bundle */
+void mp_exit_bundle (void);  /* have disconnected our link from bundle */
+void mp_bundle_terminated (void);
+char *epdisc_to_str (struct epdisc *); /* string from endpoint discrim. */
+int  str_to_epdisc (struct epdisc *, char *); /* endpt disc. from str */
+#else
+#define mp_bundle_terminated()	/* nothing */
+#define mp_exit_bundle()	/* nothing */
+#define doing_multilink		0
+#define multilink_master	0
+#endif
+
+/* Procedures exported from utils.c. */
+void ppp_print_string(const u_char *p, int len, void (*printer) (void *, const char *, ...), void *arg);   /* Format a string for output */
+int ppp_slprintf(char *buf, int buflen, const char *fmt, ...);            /* sprintf++ */
+int ppp_vslprintf(char *buf, int buflen, const char *fmt, va_list args);  /* vsprintf++ */
+size_t ppp_strlcpy(char *dest, const char *src, size_t len);        /* safe strcpy */
+size_t ppp_strlcat(char *dest, const char *src, size_t len);        /* safe strncpy */
+void ppp_dbglog(const char *fmt, ...);    /* log a debug message */
+void ppp_info(const char *fmt, ...);      /* log an informational message */
+void ppp_notice(const char *fmt, ...);    /* log a notice-level message */
+void ppp_warn(const char *fmt, ...);      /* log a warning message */
+void ppp_error(const char *fmt, ...);     /* log an error message */
+void ppp_fatal(const char *fmt, ...);     /* log an error message and die(1) */
+#if PRINTPKT_SUPPORT
+void ppp_dump_packet(ppp_pcb *pcb, const char *tag, unsigned char *p, int len);
+                                /* dump packet to debug log if interesting */
+#endif /* PRINTPKT_SUPPORT */
+
+/*
+ * Number of necessary timers analysis.
+ *
+ * PPP use at least one timer per each of its protocol, but not all protocols are
+ * active at the same time, thus the number of necessary timeouts is actually
+ * lower than enabled protocols. Here is the actual necessary timeouts based
+ * on code analysis.
+ *
+ * Note that many features analysed here are not working at all and are only
+ * there for a comprehensive analysis of necessary timers in order to prevent
+ * having to redo that each time we add a feature.
+ *
+ * Timer list
+ *
+ * | holdoff timeout
+ *  | low level protocol timeout (PPPoE or PPPoL2P)
+ *   | LCP delayed UP
+ *    | LCP retransmit (FSM)
+ *     | LCP Echo timer
+ *     .| PAP or CHAP or EAP authentication
+ *     . | ECP retransmit (FSM)
+ *     .  | CCP retransmit (FSM) when MPPE is enabled
+ *     .   | CCP retransmit (FSM) when MPPE is NOT enabled
+ *     .    | IPCP retransmit (FSM)
+ *     .    .| IP6CP retransmit (FSM)
+ *     .    . | Idle time limit
+ *     .    .  | Max connect time
+ *     .    .   | Max octets
+ *     .    .    | CCP RACK timeout
+ *     .    .    .
+ * PPP_PHASE_DEAD
+ * PPP_PHASE_HOLDOFF
+ * |   .    .    .
+ * PPP_PHASE_INITIALIZE
+ *  |  .    .    .
+ * PPP_PHASE_ESTABLISH
+ *   | .    .    .
+ *    |.    .    .
+ *     |    .    .
+ * PPP_PHASE_AUTHENTICATE
+ *     |    .    .
+ *     ||   .    .
+ * PPP_PHASE_NETWORK
+ *     | || .    .
+ *     |   |||   .
+ * PPP_PHASE_RUNNING
+ *     |    .|||||
+ *     |    . ||||
+ * PPP_PHASE_TERMINATE
+ *     |    . ||||
+ * PPP_PHASE_NETWORK
+ *    |.         .
+ * PPP_PHASE_ESTABLISH
+ * PPP_PHASE_DISCONNECT
+ * PPP_PHASE_DEAD
+ *
+ * Alright, PPP basic retransmission and LCP Echo consume one timer.
+ *  1
+ *
+ * If authentication is enabled one timer is necessary during authentication.
+ *  1 + PPP_AUTH_SUPPORT
+ *
+ * If ECP is enabled one timer is necessary before IPCP and/or IP6CP, one more
+ * is necessary if CCP is enabled (only with MPPE support but we don't care much
+ * up to this detail level).
+ *  1 + ECP_SUPPORT + CCP_SUPPORT
+ *
+ * If CCP is enabled it might consume a timer during IPCP or IP6CP, thus
+ * we might use IPCP, IP6CP and CCP timers simultaneously.
+ *  1 + PPP_IPV4_SUPPORT + PPP_IPV6_SUPPORT + CCP_SUPPORT
+ *
+ * When entering running phase, IPCP or IP6CP is still running. If idle time limit
+ * is enabled one more timer is necessary. Same for max connect time and max
+ * octets features. Furthermore CCP RACK might be used past this point.
+ *  1 + PPP_IPV4_SUPPORT + PPP_IPV6_SUPPORT -1 + PPP_IDLETIMELIMIT + PPP_MAXCONNECT + MAXOCTETS + CCP_SUPPORT
+ *
+ * IPv4 or IPv6 must be enabled, therefore we don't need to take care the authentication
+ * and the CCP + ECP case, thus reducing overall complexity.
+ * 1 + LWIP_MAX(PPP_IPV4_SUPPORT + PPP_IPV6_SUPPORT + CCP_SUPPORT, PPP_IPV4_SUPPORT + PPP_IPV6_SUPPORT -1 + PPP_IDLETIMELIMIT + PPP_MAXCONNECT + MAXOCTETS + CCP_SUPPORT)
+ *
+ * We don't support PPP_IDLETIMELIMIT + PPP_MAXCONNECT + MAXOCTETS features
+ * and adding those defines to ppp_opts.h just for having the value always
+ * defined to 0 isn't worth it.
+ * 1 + LWIP_MAX(PPP_IPV4_SUPPORT + PPP_IPV6_SUPPORT + CCP_SUPPORT, PPP_IPV4_SUPPORT + PPP_IPV6_SUPPORT -1 + CCP_SUPPORT)
+ *
+ * Thus, the following is enough for now.
+ * 1 + PPP_IPV4_SUPPORT + PPP_IPV6_SUPPORT + CCP_SUPPORT
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PPP_SUPPORT */
+#endif /* LWIP_HDR_PPP_IMPL_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ppp_opts.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ppp_opts.h
new file mode 100644
index 00000000000..479a006d10e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/ppp_opts.h
@@ -0,0 +1,617 @@
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#ifndef LWIP_PPP_OPTS_H
+#define LWIP_PPP_OPTS_H
+
+#include "lwip/opt.h"
+
+/**
+ * PPP_SUPPORT==1: Enable PPP.
+ */
+#ifndef PPP_SUPPORT
+#define PPP_SUPPORT                     0
+#endif
+
+/**
+ * PPPOE_SUPPORT==1: Enable PPP Over Ethernet
+ */
+#ifndef PPPOE_SUPPORT
+#define PPPOE_SUPPORT                   0
+#endif
+
+/**
+ * PPPOE_SCNAME_SUPPORT==1: Enable PPP Over Ethernet Service Name and Concentrator Name support
+ */
+#ifndef PPPOE_SCNAME_SUPPORT
+#define PPPOE_SCNAME_SUPPORT            0
+#endif
+
+/**
+ * PPPOL2TP_SUPPORT==1: Enable PPP Over L2TP
+ */
+#ifndef PPPOL2TP_SUPPORT
+#define PPPOL2TP_SUPPORT                0
+#endif
+
+/**
+ * PPPOL2TP_AUTH_SUPPORT==1: Enable PPP Over L2TP Auth (enable MD5 support)
+ */
+#ifndef PPPOL2TP_AUTH_SUPPORT
+#define PPPOL2TP_AUTH_SUPPORT           PPPOL2TP_SUPPORT
+#endif
+
+/**
+ * PPPOS_SUPPORT==1: Enable PPP Over Serial
+ */
+#ifndef PPPOS_SUPPORT
+#define PPPOS_SUPPORT                   PPP_SUPPORT
+#endif
+
+/**
+ * LWIP_PPP_API==1: Enable PPP API (in pppapi.c)
+ */
+#ifndef LWIP_PPP_API
+#define LWIP_PPP_API                    (PPP_SUPPORT && (NO_SYS == 0))
+#endif
+
+#if PPP_SUPPORT
+
+/**
+ * MEMP_NUM_PPP_PCB: the number of simultaneously active PPP
+ * connections (requires the PPP_SUPPORT option)
+ */
+#ifndef MEMP_NUM_PPP_PCB
+#define MEMP_NUM_PPP_PCB                1
+#endif
+
+/**
+ * PPP_NUM_TIMEOUTS_PER_PCB: the number of sys_timeouts running in parallel per
+ * ppp_pcb. See the detailed explanation at the end of ppp_impl.h about simultaneous
+ * timers analysis.
+ */
+#ifndef PPP_NUM_TIMEOUTS_PER_PCB
+#define PPP_NUM_TIMEOUTS_PER_PCB        (1 + PPP_IPV4_SUPPORT + PPP_IPV6_SUPPORT + CCP_SUPPORT)
+#endif
+
+/* The number of sys_timeouts required for the PPP module */
+#define PPP_NUM_TIMEOUTS                (PPP_SUPPORT * PPP_NUM_TIMEOUTS_PER_PCB * MEMP_NUM_PPP_PCB)
+
+/**
+ * MEMP_NUM_PPPOS_INTERFACES: the number of concurrently active PPPoS
+ * interfaces (only used with PPPOS_SUPPORT==1)
+ */
+#ifndef MEMP_NUM_PPPOS_INTERFACES
+#define MEMP_NUM_PPPOS_INTERFACES       MEMP_NUM_PPP_PCB
+#endif
+
+/**
+ * MEMP_NUM_PPPOE_INTERFACES: the number of concurrently active PPPoE
+ * interfaces (only used with PPPOE_SUPPORT==1)
+ */
+#ifndef MEMP_NUM_PPPOE_INTERFACES
+#define MEMP_NUM_PPPOE_INTERFACES       1
+#endif
+
+/**
+ * MEMP_NUM_PPPOL2TP_INTERFACES: the number of concurrently active PPPoL2TP
+ * interfaces (only used with PPPOL2TP_SUPPORT==1)
+ */
+#ifndef MEMP_NUM_PPPOL2TP_INTERFACES
+#define MEMP_NUM_PPPOL2TP_INTERFACES       1
+#endif
+
+/**
+ * MEMP_NUM_PPP_API_MSG: Number of concurrent PPP API messages (in pppapi.c)
+ */
+#ifndef MEMP_NUM_PPP_API_MSG
+#define MEMP_NUM_PPP_API_MSG 5
+#endif
+
+/**
+ * PPP_DEBUG: Enable debugging for PPP.
+ */
+#ifndef PPP_DEBUG
+#define PPP_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/**
+ * PPP_INPROC_IRQ_SAFE==1 call pppos_input() using tcpip_callback().
+ *
+ * Please read the "PPPoS input path" chapter in the PPP documentation about this option.
+ */
+#ifndef PPP_INPROC_IRQ_SAFE
+#define PPP_INPROC_IRQ_SAFE             0
+#endif
+
+/**
+ * PRINTPKT_SUPPORT==1: Enable PPP print packet support
+ *
+ * Mandatory for debugging, it displays exchanged packet content in debug trace.
+ */
+#ifndef PRINTPKT_SUPPORT
+#define PRINTPKT_SUPPORT                0
+#endif
+
+/**
+ * PPP_IPV4_SUPPORT==1: Enable PPP IPv4 support
+ */
+#ifndef PPP_IPV4_SUPPORT
+#define PPP_IPV4_SUPPORT                (LWIP_IPV4)
+#endif
+
+/**
+ * PPP_IPV6_SUPPORT==1: Enable PPP IPv6 support
+ */
+#ifndef PPP_IPV6_SUPPORT
+#define PPP_IPV6_SUPPORT                (LWIP_IPV6)
+#endif
+
+/**
+ * PPP_NOTIFY_PHASE==1: Support PPP notify phase support
+ *
+ * PPP notify phase support allows you to set a callback which is
+ * called on change of the internal PPP state machine.
+ *
+ * This can be used for example to set a LED pattern depending on the
+ * current phase of the PPP session.
+ */
+#ifndef PPP_NOTIFY_PHASE
+#define PPP_NOTIFY_PHASE                0
+#endif
+
+/**
+ * pbuf_type PPP is using for LCP, PAP, CHAP, EAP, CCP, IPCP and IP6CP packets.
+ *
+ * Memory allocated must be single buffered for PPP to works, it requires pbuf
+ * that are not going to be chained when allocated. This requires setting
+ * PBUF_POOL_BUFSIZE to at least 512 bytes, which is quite huge for small systems.
+ *
+ * Setting PPP_USE_PBUF_RAM to 1 makes PPP use memory from heap where continuous
+ * buffers are required, allowing you to use a smaller PBUF_POOL_BUFSIZE.
+ */
+#ifndef PPP_USE_PBUF_RAM
+#define PPP_USE_PBUF_RAM                0
+#endif
+
+/**
+ * PPP_FCS_TABLE: Keep a 256*2 byte table to speed up FCS calculation for PPPoS
+ */
+#ifndef PPP_FCS_TABLE
+#define PPP_FCS_TABLE                   1
+#endif
+
+/**
+ * PAP_SUPPORT==1: Support PAP.
+ */
+#ifndef PAP_SUPPORT
+#define PAP_SUPPORT                     0
+#endif
+
+/**
+ * CHAP_SUPPORT==1: Support CHAP.
+ */
+#ifndef CHAP_SUPPORT
+#define CHAP_SUPPORT                    0
+#endif
+
+/**
+ * MSCHAP_SUPPORT==1: Support MSCHAP.
+ */
+#ifndef MSCHAP_SUPPORT
+#define MSCHAP_SUPPORT                  0
+#endif
+#if MSCHAP_SUPPORT
+/* MSCHAP requires CHAP support */
+#undef CHAP_SUPPORT
+#define CHAP_SUPPORT                    1
+#endif /* MSCHAP_SUPPORT */
+
+/**
+ * EAP_SUPPORT==1: Support EAP.
+ */
+#ifndef EAP_SUPPORT
+#define EAP_SUPPORT                     0
+#endif
+
+/**
+ * CCP_SUPPORT==1: Support CCP.
+ */
+#ifndef CCP_SUPPORT
+#define CCP_SUPPORT                     0
+#endif
+
+/**
+ * MPPE_SUPPORT==1: Support MPPE.
+ */
+#ifndef MPPE_SUPPORT
+#define MPPE_SUPPORT                    0
+#endif
+#if MPPE_SUPPORT
+/* MPPE requires CCP support */
+#undef CCP_SUPPORT
+#define CCP_SUPPORT                     1
+/* MPPE requires MSCHAP support */
+#undef MSCHAP_SUPPORT
+#define MSCHAP_SUPPORT                  1
+/* MSCHAP requires CHAP support */
+#undef CHAP_SUPPORT
+#define CHAP_SUPPORT                    1
+#endif /* MPPE_SUPPORT */
+
+/**
+ * CBCP_SUPPORT==1: Support CBCP. CURRENTLY NOT SUPPORTED! DO NOT SET!
+ */
+#ifndef CBCP_SUPPORT
+#define CBCP_SUPPORT                    0
+#endif
+
+/**
+ * ECP_SUPPORT==1: Support ECP. CURRENTLY NOT SUPPORTED! DO NOT SET!
+ */
+#ifndef ECP_SUPPORT
+#define ECP_SUPPORT                     0
+#endif
+
+/**
+ * DEMAND_SUPPORT==1: Support dial on demand. CURRENTLY NOT SUPPORTED! DO NOT SET!
+ */
+#ifndef DEMAND_SUPPORT
+#define DEMAND_SUPPORT                  0
+#endif
+
+/**
+ * LQR_SUPPORT==1: Support Link Quality Report. Do nothing except exchanging some LCP packets.
+ */
+#ifndef LQR_SUPPORT
+#define LQR_SUPPORT                     0
+#endif
+
+/**
+ * PPP_SERVER==1: Enable PPP server support (waiting for incoming PPP session).
+ *
+ * Currently only supported for PPPoS.
+ */
+#ifndef PPP_SERVER
+#define PPP_SERVER                      0
+#endif
+
+#if PPP_SERVER
+/*
+ * PPP_OUR_NAME: Our name for authentication purposes
+ */
+#ifndef PPP_OUR_NAME
+#define PPP_OUR_NAME                    "lwIP"
+#endif
+#endif /* PPP_SERVER */
+
+/**
+ * VJ_SUPPORT==1: Support VJ header compression.
+ */
+#ifndef VJ_SUPPORT
+#define VJ_SUPPORT                      1
+#endif
+/* VJ compression is only supported for TCP over IPv4 over PPPoS. */
+#if !PPPOS_SUPPORT || !PPP_IPV4_SUPPORT || !LWIP_TCP
+#undef VJ_SUPPORT
+#define VJ_SUPPORT                      0
+#endif /* !PPPOS_SUPPORT */
+
+/**
+ * PPP_MD5_RANDM==1: Use MD5 for better randomness.
+ * Enabled by default if CHAP, EAP, or L2TP AUTH support is enabled.
+ */
+#ifndef PPP_MD5_RANDM
+#define PPP_MD5_RANDM                   (CHAP_SUPPORT || EAP_SUPPORT || PPPOL2TP_AUTH_SUPPORT)
+#endif
+
+/**
+ * PolarSSL embedded library
+ *
+ *
+ * lwIP contains some files fetched from the latest BSD release of
+ * the PolarSSL project (PolarSSL 0.10.1-bsd) for ciphers and encryption
+ * methods we need for lwIP PPP support.
+ *
+ * The PolarSSL files were cleaned to contain only the necessary struct
+ * fields and functions needed for lwIP.
+ *
+ * The PolarSSL API was not changed at all, so if you are already using
+ * PolarSSL you can choose to skip the compilation of the included PolarSSL
+ * library into lwIP.
+ *
+ * If you are not using the embedded copy you must include external
+ * libraries into your arch/cc.h port file.
+ *
+ * Beware of the stack requirements which can be a lot larger if you are not
+ * using our cleaned PolarSSL library.
+ */
+
+/**
+ * LWIP_USE_EXTERNAL_POLARSSL: Use external PolarSSL library
+ */
+#ifndef LWIP_USE_EXTERNAL_POLARSSL
+#define LWIP_USE_EXTERNAL_POLARSSL      0
+#endif
+
+/**
+ * LWIP_USE_EXTERNAL_MBEDTLS: Use external mbed TLS library
+ */
+#ifndef LWIP_USE_EXTERNAL_MBEDTLS
+#define LWIP_USE_EXTERNAL_MBEDTLS       0
+#endif
+
+/*
+ * PPP Timeouts
+ */
+
+/**
+ * FSM_DEFTIMEOUT: Timeout time in seconds
+ */
+#ifndef FSM_DEFTIMEOUT
+#define FSM_DEFTIMEOUT                  6
+#endif
+
+/**
+ * FSM_DEFMAXTERMREQS: Maximum Terminate-Request transmissions
+ */
+#ifndef FSM_DEFMAXTERMREQS
+#define FSM_DEFMAXTERMREQS              2
+#endif
+
+/**
+ * FSM_DEFMAXCONFREQS: Maximum Configure-Request transmissions
+ */
+#ifndef FSM_DEFMAXCONFREQS
+#define FSM_DEFMAXCONFREQS              10
+#endif
+
+/**
+ * FSM_DEFMAXNAKLOOPS: Maximum number of nak loops
+ */
+#ifndef FSM_DEFMAXNAKLOOPS
+#define FSM_DEFMAXNAKLOOPS              5
+#endif
+
+/**
+ * UPAP_DEFTIMEOUT: Timeout (seconds) for retransmitting req
+ */
+#ifndef UPAP_DEFTIMEOUT
+#define UPAP_DEFTIMEOUT                 6
+#endif
+
+/**
+ * UPAP_DEFTRANSMITS: Maximum number of auth-reqs to send
+ */
+#ifndef UPAP_DEFTRANSMITS
+#define UPAP_DEFTRANSMITS               10
+#endif
+
+#if PPP_SERVER
+/**
+ * UPAP_DEFREQTIME: Time to wait for auth-req from peer
+ */
+#ifndef UPAP_DEFREQTIME
+#define UPAP_DEFREQTIME                 30
+#endif
+#endif /* PPP_SERVER */
+
+/**
+ * CHAP_DEFTIMEOUT: Timeout (seconds) for retransmitting req
+ */
+#ifndef CHAP_DEFTIMEOUT
+#define CHAP_DEFTIMEOUT                 6
+#endif
+
+/**
+ * CHAP_DEFTRANSMITS: max # times to send challenge
+ */
+#ifndef CHAP_DEFTRANSMITS
+#define CHAP_DEFTRANSMITS               10
+#endif
+
+#if PPP_SERVER
+/**
+ * CHAP_DEFRECHALLENGETIME: If this option is > 0, rechallenge the peer every n seconds
+ */
+#ifndef CHAP_DEFRECHALLENGETIME
+#define CHAP_DEFRECHALLENGETIME         0
+#endif
+#endif /* PPP_SERVER */
+
+/**
+ * EAP_DEFREQTIME: Time to wait for peer request
+ */
+#ifndef EAP_DEFREQTIME
+#define EAP_DEFREQTIME                  6
+#endif
+
+/**
+ * EAP_DEFALLOWREQ: max # times to accept requests
+ */
+#ifndef EAP_DEFALLOWREQ
+#define EAP_DEFALLOWREQ                 10
+#endif
+
+#if PPP_SERVER
+/**
+ * EAP_DEFTIMEOUT: Timeout (seconds) for rexmit
+ */
+#ifndef EAP_DEFTIMEOUT
+#define EAP_DEFTIMEOUT                  6
+#endif
+
+/**
+ * EAP_DEFTRANSMITS: max # times to transmit
+ */
+#ifndef EAP_DEFTRANSMITS
+#define EAP_DEFTRANSMITS                10
+#endif
+#endif /* PPP_SERVER */
+
+/**
+ * LCP_DEFLOOPBACKFAIL: Default number of times we receive our magic number from the peer
+ * before deciding the link is looped-back.
+ */
+#ifndef LCP_DEFLOOPBACKFAIL
+#define LCP_DEFLOOPBACKFAIL             10
+#endif
+
+/**
+ * LCP_ECHOINTERVAL: Interval in seconds between keepalive echo requests, 0 to disable.
+ */
+#ifndef LCP_ECHOINTERVAL
+#define LCP_ECHOINTERVAL                0
+#endif
+
+/**
+ * LCP_MAXECHOFAILS: Number of unanswered echo requests before failure.
+ */
+#ifndef LCP_MAXECHOFAILS
+#define LCP_MAXECHOFAILS                3
+#endif
+
+/**
+ * PPP_MAXIDLEFLAG: Max Xmit idle time (in ms) before resend flag char.
+ */
+#ifndef PPP_MAXIDLEFLAG
+#define PPP_MAXIDLEFLAG                 100
+#endif
+
+/**
+ * PPP Packet sizes
+ */
+
+/**
+ * PPP_MRU: Default MRU
+ */
+#ifndef PPP_MRU
+#define PPP_MRU                         1500
+#endif
+
+/**
+ * PPP_DEFMRU: Default MRU to try
+ */
+#ifndef PPP_DEFMRU
+#define PPP_DEFMRU                      1500
+#endif
+
+/**
+ * PPP_MAXMRU: Normally limit MRU to this (pppd default = 16384)
+ */
+#ifndef PPP_MAXMRU
+#define PPP_MAXMRU                      1500
+#endif
+
+/**
+ * PPP_MINMRU: No MRUs below this
+ */
+#ifndef PPP_MINMRU
+#define PPP_MINMRU                      128
+#endif
+
+/**
+ * PPPOL2TP_DEFMRU: Default MTU and MRU for L2TP
+ * Default = 1500 - PPPoE(6) - PPP Protocol(2) - IPv4 header(20) - UDP Header(8)
+ * - L2TP Header(6) - HDLC Header(2) - PPP Protocol(2) - MPPE Header(2) - PPP Protocol(2)
+ */
+#if PPPOL2TP_SUPPORT
+#ifndef PPPOL2TP_DEFMRU
+#define PPPOL2TP_DEFMRU                 1450
+#endif
+#endif /* PPPOL2TP_SUPPORT */
+
+/**
+ * MAXNAMELEN: max length of hostname or name for auth
+ */
+#ifndef MAXNAMELEN
+#define MAXNAMELEN                      256
+#endif
+
+/**
+ * MAXSECRETLEN: max length of password or secret
+ */
+#ifndef MAXSECRETLEN
+#define MAXSECRETLEN                    256
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Build triggers for embedded PolarSSL
+ */
+#if !LWIP_USE_EXTERNAL_POLARSSL && !LWIP_USE_EXTERNAL_MBEDTLS
+
+/* CHAP, EAP, L2TP AUTH and MD5 Random require MD5 support */
+#if CHAP_SUPPORT || EAP_SUPPORT || PPPOL2TP_AUTH_SUPPORT || PPP_MD5_RANDM
+#define LWIP_INCLUDED_POLARSSL_MD5      1
+#endif /* CHAP_SUPPORT || EAP_SUPPORT || PPPOL2TP_AUTH_SUPPORT || PPP_MD5_RANDM */
+
+#if MSCHAP_SUPPORT
+
+/* MSCHAP require MD4 support */
+#define LWIP_INCLUDED_POLARSSL_MD4      1
+/* MSCHAP require SHA1 support */
+#define LWIP_INCLUDED_POLARSSL_SHA1     1
+/* MSCHAP require DES support */
+#define LWIP_INCLUDED_POLARSSL_DES      1
+
+/* MS-CHAP support is required for MPPE */
+#if MPPE_SUPPORT
+/* MPPE require ARC4 support */
+#define LWIP_INCLUDED_POLARSSL_ARC4     1
+#endif /* MPPE_SUPPORT */
+
+#endif /* MSCHAP_SUPPORT */
+
+#endif /* !LWIP_USE_EXTERNAL_POLARSSL && !LWIP_USE_EXTERNAL_MBEDTLS */
+
+/* Default value if unset */
+#ifndef LWIP_INCLUDED_POLARSSL_MD4
+#define LWIP_INCLUDED_POLARSSL_MD4      0
+#endif /* LWIP_INCLUDED_POLARSSL_MD4 */
+#ifndef LWIP_INCLUDED_POLARSSL_MD5
+#define LWIP_INCLUDED_POLARSSL_MD5      0
+#endif /* LWIP_INCLUDED_POLARSSL_MD5 */
+#ifndef LWIP_INCLUDED_POLARSSL_SHA1
+#define LWIP_INCLUDED_POLARSSL_SHA1     0
+#endif /* LWIP_INCLUDED_POLARSSL_SHA1 */
+#ifndef LWIP_INCLUDED_POLARSSL_DES
+#define LWIP_INCLUDED_POLARSSL_DES      0
+#endif /* LWIP_INCLUDED_POLARSSL_DES */
+#ifndef LWIP_INCLUDED_POLARSSL_ARC4
+#define LWIP_INCLUDED_POLARSSL_ARC4     0
+#endif /* LWIP_INCLUDED_POLARSSL_ARC4 */
+
+#endif /* PPP_SUPPORT */
+
+/* Default value if unset */
+#ifndef PPP_NUM_TIMEOUTS
+#define PPP_NUM_TIMEOUTS                0
+#endif /* PPP_NUM_TIMEOUTS */
+
+#endif /* LWIP_PPP_OPTS_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppapi.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppapi.h
new file mode 100644
index 00000000000..8c136f53739
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppapi.h
@@ -0,0 +1,147 @@
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#ifndef LWIP_PPPAPI_H
+#define LWIP_PPPAPI_H
+
+#include "netif/ppp/ppp_opts.h"
+
+#if LWIP_PPP_API /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/sys.h"
+#include "lwip/netif.h"
+#include "lwip/priv/tcpip_priv.h"
+#include "netif/ppp/ppp.h"
+#if PPPOS_SUPPORT
+#include "netif/ppp/pppos.h"
+#endif /* PPPOS_SUPPORT */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct pppapi_msg_msg {
+  ppp_pcb *ppp;
+  union {
+#if ESP_PPP && PPP_AUTH_SUPPORT
+    struct {
+      u8_t authtype;
+      const char *user;
+      const char *passwd;
+    } setauth;
+#endif
+#if PPP_NOTIFY_PHASE
+    struct {
+      ppp_notify_phase_cb_fn notify_phase_cb;
+    } setnotifyphasecb;
+#endif /* PPP_NOTIFY_PHASE */
+#if PPPOS_SUPPORT
+    struct {
+      struct netif *pppif;
+      pppos_output_cb_fn output_cb;
+      ppp_link_status_cb_fn link_status_cb;
+      void *ctx_cb;
+    } serialcreate;
+#endif /* PPPOS_SUPPORT */
+#if PPPOE_SUPPORT
+    struct {
+      struct netif *pppif;
+      struct netif *ethif;
+      const char *service_name;
+      const char *concentrator_name;
+      ppp_link_status_cb_fn link_status_cb;
+      void *ctx_cb;
+    } ethernetcreate;
+#endif /* PPPOE_SUPPORT */
+#if PPPOL2TP_SUPPORT
+    struct {
+      struct netif *pppif;
+      struct netif *netif;
+      API_MSG_M_DEF_C(ip_addr_t, ipaddr);
+      u16_t port;
+#if PPPOL2TP_AUTH_SUPPORT
+      const u8_t *secret;
+      u8_t secret_len;
+#endif /* PPPOL2TP_AUTH_SUPPORT */
+      ppp_link_status_cb_fn link_status_cb;
+      void *ctx_cb;
+    } l2tpcreate;
+#endif /* PPPOL2TP_SUPPORT */
+    struct {
+      u16_t holdoff;
+    } connect;
+    struct {
+      u8_t nocarrier;
+    } close;
+    struct {
+      u8_t cmd;
+      void *arg;
+    } ioctl;
+  } msg;
+};
+
+struct pppapi_msg {
+  struct tcpip_api_call_data call;
+  struct pppapi_msg_msg msg;
+};
+
+/* API for application */
+err_t pppapi_set_default(ppp_pcb *pcb);
+#if ESP_PPP && PPP_AUTH_SUPPORT
+void pppapi_set_auth(ppp_pcb *pcb, u8_t authtype, const char *user, const char *passwd);
+#endif
+#if PPP_NOTIFY_PHASE
+err_t pppapi_set_notify_phase_callback(ppp_pcb *pcb, ppp_notify_phase_cb_fn notify_phase_cb);
+#endif /* PPP_NOTIFY_PHASE */
+#if PPPOS_SUPPORT
+ppp_pcb *pppapi_pppos_create(struct netif *pppif, pppos_output_cb_fn output_cb, ppp_link_status_cb_fn link_status_cb, void *ctx_cb);
+#endif /* PPPOS_SUPPORT */
+#if PPPOE_SUPPORT
+ppp_pcb *pppapi_pppoe_create(struct netif *pppif, struct netif *ethif, const char *service_name,
+                                const char *concentrator_name, ppp_link_status_cb_fn link_status_cb,
+                                void *ctx_cb);
+#endif /* PPPOE_SUPPORT */
+#if PPPOL2TP_SUPPORT
+ppp_pcb *pppapi_pppol2tp_create(struct netif *pppif, struct netif *netif, ip_addr_t *ipaddr, u16_t port,
+                            const u8_t *secret, u8_t secret_len,
+                            ppp_link_status_cb_fn link_status_cb, void *ctx_cb);
+#endif /* PPPOL2TP_SUPPORT */
+err_t pppapi_connect(ppp_pcb *pcb, u16_t holdoff);
+#if PPP_SERVER
+err_t pppapi_listen(ppp_pcb *pcb);
+#endif /* PPP_SERVER */
+err_t pppapi_close(ppp_pcb *pcb, u8_t nocarrier);
+err_t pppapi_free(ppp_pcb *pcb);
+err_t pppapi_ioctl(ppp_pcb *pcb, u8_t cmd, void *arg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_PPP_API */
+
+#endif /* LWIP_PPPAPI_H */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppcrypt.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppcrypt.h
new file mode 100644
index 00000000000..c0230bbcb7f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppcrypt.h
@@ -0,0 +1,144 @@
+/*
+ * pppcrypt.c - PPP/DES linkage for MS-CHAP and EAP SRP-SHA1
+ *
+ * Extracted from chap_ms.c by James Carlson.
+ *
+ * Copyright (c) 1995 Eric Rosenquist.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name(s) of the authors of this software must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission.
+ *
+ * THE AUTHORS OF THIS SOFTWARE DISCLAIM ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY
+ * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+/* This header file is included in all PPP modules needing hashes and/or ciphers */
+
+#ifndef PPPCRYPT_H
+#define	PPPCRYPT_H
+
+/*
+ * If included PolarSSL copy is not used, user is expected to include
+ * external libraries in arch/cc.h (which is included by lwip/arch.h).
+ */
+#include "lwip/arch.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Map hashes and ciphers functions to PolarSSL
+ */
+#if !LWIP_USE_EXTERNAL_MBEDTLS
+
+#include "netif/ppp/polarssl/md4.h"
+#define lwip_md4_context md4_context
+#define lwip_md4_init(context)
+#define lwip_md4_starts md4_starts
+#define lwip_md4_update md4_update
+#define lwip_md4_finish md4_finish
+#define lwip_md4_free(context)
+
+#include "netif/ppp/polarssl/md5.h"
+#define lwip_md5_context md5_context
+#define lwip_md5_init(context)
+#define lwip_md5_starts md5_starts
+#define lwip_md5_update md5_update
+#define lwip_md5_finish md5_finish
+#define lwip_md5_free(context)
+
+#include "netif/ppp/polarssl/sha1.h"
+#define lwip_sha1_context sha1_context
+#define lwip_sha1_init(context)
+#define lwip_sha1_starts sha1_starts
+#define lwip_sha1_update sha1_update
+#define lwip_sha1_finish sha1_finish
+#define lwip_sha1_free(context)
+
+#include "netif/ppp/polarssl/des.h"
+#define lwip_des_context des_context
+#define lwip_des_init(context)
+#define lwip_des_setkey_enc des_setkey_enc
+#define lwip_des_crypt_ecb des_crypt_ecb
+#define lwip_des_free(context)
+
+#include "netif/ppp/polarssl/arc4.h"
+#define lwip_arc4_context arc4_context
+#define lwip_arc4_init(context)
+#define lwip_arc4_setup arc4_setup
+#define lwip_arc4_crypt arc4_crypt
+#define lwip_arc4_free(context)
+
+#endif /* !LWIP_USE_EXTERNAL_MBEDTLS */
+
+/*
+ * Map hashes and ciphers functions to mbed TLS
+ */
+#if LWIP_USE_EXTERNAL_MBEDTLS
+
+#define lwip_md4_context mbedtls_md4_context
+#define lwip_md4_init mbedtls_md4_init
+#define lwip_md4_starts mbedtls_md4_starts
+#define lwip_md4_update mbedtls_md4_update
+#define lwip_md4_finish mbedtls_md4_finish
+#define lwip_md4_free mbedtls_md4_free
+
+#define lwip_md5_context mbedtls_md5_context
+#define lwip_md5_init mbedtls_md5_init
+#define lwip_md5_starts mbedtls_md5_starts
+#define lwip_md5_update mbedtls_md5_update
+#define lwip_md5_finish mbedtls_md5_finish
+#define lwip_md5_free mbedtls_md5_free
+
+#define lwip_sha1_context mbedtls_sha1_context
+#define lwip_sha1_init mbedtls_sha1_init
+#define lwip_sha1_starts mbedtls_sha1_starts
+#define lwip_sha1_update mbedtls_sha1_update
+#define lwip_sha1_finish mbedtls_sha1_finish
+#define lwip_sha1_free mbedtls_sha1_free
+
+#define lwip_des_context mbedtls_des_context
+#define lwip_des_init mbedtls_des_init
+#define lwip_des_setkey_enc mbedtls_des_setkey_enc
+#define lwip_des_crypt_ecb mbedtls_des_crypt_ecb
+#define lwip_des_free mbedtls_des_free
+
+#define lwip_arc4_context mbedtls_arc4_context
+#define lwip_arc4_init mbedtls_arc4_init
+#define lwip_arc4_setup mbedtls_arc4_setup
+#define lwip_arc4_crypt(context, buffer, length) mbedtls_arc4_crypt(context, length, buffer, buffer)
+#define lwip_arc4_free mbedtls_arc4_free
+
+#endif /* LWIP_USE_EXTERNAL_MBEDTLS */
+
+void pppcrypt_56_to_64_bit_key(u_char *key, u_char *des_key);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PPPCRYPT_H */
+
+#endif /* PPP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppdebug.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppdebug.h
new file mode 100644
index 00000000000..36ee4f9bf9a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppdebug.h
@@ -0,0 +1,88 @@
+/*****************************************************************************
+* pppdebug.h - System debugging utilities.
+*
+* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc.
+* portions Copyright (c) 1998 Global Election Systems Inc.
+* portions Copyright (c) 2001 by Cognizant Pty Ltd.
+*
+* The authors hereby grant permission to use, copy, modify, distribute,
+* and license this software and its documentation for any purpose, provided
+* that existing copyright notices are retained in all copies and that this
+* notice and the following disclaimer are included verbatim in any 
+* distributions. No written agreement, license, or royalty fee is required
+* for any of the authorized uses.
+*
+* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+******************************************************************************
+* REVISION HISTORY (please don't use tabs!)
+*
+* 03-01-01 Marc Boucher <marc@mbsi.ca>
+*   Ported to lwIP.
+* 98-07-29 Guy Lancaster <lancasterg@acm.org>, Global Election Systems Inc.
+*   Original.
+*
+*****************************************************************************
+*/
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+#ifndef PPPDEBUG_H
+#define PPPDEBUG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Trace levels. */
+#define LOG_CRITICAL  (PPP_DEBUG | LWIP_DBG_LEVEL_SEVERE)
+#define LOG_ERR       (PPP_DEBUG | LWIP_DBG_LEVEL_SEVERE)
+#define LOG_NOTICE    (PPP_DEBUG | LWIP_DBG_LEVEL_WARNING)
+#define LOG_WARNING   (PPP_DEBUG | LWIP_DBG_LEVEL_WARNING)
+#define LOG_INFO      (PPP_DEBUG)
+#define LOG_DETAIL    (PPP_DEBUG)
+#define LOG_DEBUG     (PPP_DEBUG)
+
+#if PPP_DEBUG
+
+#define MAINDEBUG(a)    LWIP_DEBUGF(LWIP_DBG_LEVEL_WARNING, a)
+#define SYSDEBUG(a)     LWIP_DEBUGF(LWIP_DBG_LEVEL_WARNING, a)
+#define FSMDEBUG(a)     LWIP_DEBUGF(LWIP_DBG_LEVEL_WARNING, a)
+#define LCPDEBUG(a)     LWIP_DEBUGF(LWIP_DBG_LEVEL_WARNING, a)
+#define IPCPDEBUG(a)    LWIP_DEBUGF(LWIP_DBG_LEVEL_WARNING, a)
+#define IPV6CPDEBUG(a)  LWIP_DEBUGF(LWIP_DBG_LEVEL_WARNING, a)
+#define UPAPDEBUG(a)    LWIP_DEBUGF(LWIP_DBG_LEVEL_WARNING, a)
+#define CHAPDEBUG(a)    LWIP_DEBUGF(LWIP_DBG_LEVEL_WARNING, a)
+#define PPPDEBUG(a, b)  LWIP_DEBUGF(a, b)
+
+#else /* PPP_DEBUG */
+
+#define MAINDEBUG(a)
+#define SYSDEBUG(a)
+#define FSMDEBUG(a)
+#define LCPDEBUG(a)
+#define IPCPDEBUG(a)
+#define IPV6CPDEBUG(a)
+#define UPAPDEBUG(a)
+#define CHAPDEBUG(a)
+#define PPPDEBUG(a, b)
+
+#endif /* PPP_DEBUG */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PPPDEBUG_H */
+
+#endif /* PPP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppoe.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppoe.h
new file mode 100644
index 00000000000..8994d38c01b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppoe.h
@@ -0,0 +1,187 @@
+/*****************************************************************************
+* pppoe.h - PPP Over Ethernet implementation for lwIP.
+*
+* Copyright (c) 2006 by Marc Boucher, Services Informatiques (MBSI) inc.
+*
+* The authors hereby grant permission to use, copy, modify, distribute,
+* and license this software and its documentation for any purpose, provided
+* that existing copyright notices are retained in all copies and that this
+* notice and the following disclaimer are included verbatim in any 
+* distributions. No written agreement, license, or royalty fee is required
+* for any of the authorized uses.
+*
+* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+******************************************************************************
+* REVISION HISTORY
+*
+* 06-01-01 Marc Boucher <marc@mbsi.ca>
+*   Ported to lwIP.
+*****************************************************************************/
+
+
+
+/* based on NetBSD: if_pppoe.c,v 1.64 2006/01/31 23:50:15 martin Exp */
+
+/*-
+ * Copyright (c) 2002 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Martin Husemann <martin@NetBSD.org>.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && PPPOE_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+#ifndef PPP_OE_H
+#define PPP_OE_H
+
+#include "ppp.h"
+#include "lwip/etharp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct pppoehdr {
+  PACK_STRUCT_FLD_8(u8_t vertype);
+  PACK_STRUCT_FLD_8(u8_t code);
+  PACK_STRUCT_FIELD(u16_t session);
+  PACK_STRUCT_FIELD(u16_t plen);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/bpstruct.h"
+#endif
+PACK_STRUCT_BEGIN
+struct pppoetag {
+  PACK_STRUCT_FIELD(u16_t tag);
+  PACK_STRUCT_FIELD(u16_t len);
+} PACK_STRUCT_STRUCT;
+PACK_STRUCT_END
+#ifdef PACK_STRUCT_USE_INCLUDES
+#  include "arch/epstruct.h"
+#endif
+
+
+#define PPPOE_STATE_INITIAL   0
+#define PPPOE_STATE_PADI_SENT 1
+#define PPPOE_STATE_PADR_SENT 2
+#define PPPOE_STATE_SESSION   3
+/* passive */
+#define PPPOE_STATE_PADO_SENT 1
+
+#define PPPOE_HEADERLEN       sizeof(struct pppoehdr)
+#define PPPOE_VERTYPE         0x11    /* VER=1, TYPE = 1 */
+
+#define PPPOE_TAG_EOL         0x0000  /* end of list */
+#define PPPOE_TAG_SNAME       0x0101  /* service name */
+#define PPPOE_TAG_ACNAME      0x0102  /* access concentrator name */
+#define PPPOE_TAG_HUNIQUE     0x0103  /* host unique */
+#define PPPOE_TAG_ACCOOKIE    0x0104  /* AC cookie */
+#define PPPOE_TAG_VENDOR      0x0105  /* vendor specific */
+#define PPPOE_TAG_RELAYSID    0x0110  /* relay session id */
+#define PPPOE_TAG_SNAME_ERR   0x0201  /* service name error */
+#define PPPOE_TAG_ACSYS_ERR   0x0202  /* AC system error */
+#define PPPOE_TAG_GENERIC_ERR 0x0203  /* gerneric error */
+
+#define PPPOE_CODE_PADI       0x09    /* Active Discovery Initiation */
+#define PPPOE_CODE_PADO       0x07    /* Active Discovery Offer */
+#define PPPOE_CODE_PADR       0x19    /* Active Discovery Request */
+#define PPPOE_CODE_PADS       0x65    /* Active Discovery Session confirmation */
+#define PPPOE_CODE_PADT       0xA7    /* Active Discovery Terminate */
+
+#ifndef PPPOE_MAX_AC_COOKIE_LEN
+#define PPPOE_MAX_AC_COOKIE_LEN   64
+#endif
+
+struct pppoe_softc {
+  struct pppoe_softc *next;
+  struct netif *sc_ethif;      /* ethernet interface we are using */
+  ppp_pcb *pcb;                /* PPP PCB */
+
+  struct eth_addr sc_dest;     /* hardware address of concentrator */
+  u16_t sc_session;            /* PPPoE session id */
+  u8_t sc_state;               /* discovery phase or session connected */
+
+#if PPPOE_SCNAME_SUPPORT
+  const char *sc_service_name;      /* if != NULL: requested name of service */
+  const char *sc_concentrator_name; /* if != NULL: requested concentrator id */
+#endif /* PPPOE_SCNAME_SUPPORT */
+  u8_t sc_ac_cookie[PPPOE_MAX_AC_COOKIE_LEN]; /* content of AC cookie we must echo back */
+  u8_t sc_ac_cookie_len;       /* length of cookie data */
+#ifdef PPPOE_SERVER
+  u8_t *sc_hunique;            /* content of host unique we must echo back */
+  u8_t sc_hunique_len;         /* length of host unique */
+#endif
+  u8_t sc_padi_retried;        /* number of PADI retries already done */
+  u8_t sc_padr_retried;        /* number of PADR retries already done */
+};
+
+
+#define pppoe_init() /* compatibility define, no initialization needed */
+
+ppp_pcb *pppoe_create(struct netif *pppif,
+       struct netif *ethif,
+       const char *service_name, const char *concentrator_name,
+       ppp_link_status_cb_fn link_status_cb, void *ctx_cb);
+
+/*
+ * Functions called from lwIP
+ * DO NOT CALL FROM lwIP USER APPLICATION.
+ */
+void pppoe_disc_input(struct netif *netif, struct pbuf *p);
+void pppoe_data_input(struct netif *netif, struct pbuf *p);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PPP_OE_H */
+
+#endif /* PPP_SUPPORT && PPPOE_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppol2tp.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppol2tp.h
new file mode 100644
index 00000000000..1221ca15b7e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppol2tp.h
@@ -0,0 +1,209 @@
+/**
+ * @file
+ * Network Point to Point Protocol over Layer 2 Tunneling Protocol header file.
+ *
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && PPPOL2TP_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+#ifndef PPPOL2TP_H
+#define PPPOL2TP_H
+
+#include "ppp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Timeout */
+#define PPPOL2TP_CONTROL_TIMEOUT         (5*1000)  /* base for quick timeout calculation */
+#define PPPOL2TP_SLOW_RETRY              (60*1000) /* persistent retry interval */
+
+#define PPPOL2TP_MAXSCCRQ                4         /* retry SCCRQ four times (quickly) */
+#define PPPOL2TP_MAXICRQ                 4         /* retry IRCQ four times */
+#define PPPOL2TP_MAXICCN                 4         /* retry ICCN four times */
+
+/* L2TP header flags */
+#define PPPOL2TP_HEADERFLAG_CONTROL      0x8000
+#define PPPOL2TP_HEADERFLAG_LENGTH       0x4000
+#define PPPOL2TP_HEADERFLAG_SEQUENCE     0x0800
+#define PPPOL2TP_HEADERFLAG_OFFSET       0x0200
+#define PPPOL2TP_HEADERFLAG_PRIORITY     0x0100
+#define PPPOL2TP_HEADERFLAG_VERSION      0x0002
+
+/* Mandatory bits for control: Control, Length, Sequence, Version 2 */
+#define PPPOL2TP_HEADERFLAG_CONTROL_MANDATORY     (PPPOL2TP_HEADERFLAG_CONTROL|PPPOL2TP_HEADERFLAG_LENGTH|PPPOL2TP_HEADERFLAG_SEQUENCE|PPPOL2TP_HEADERFLAG_VERSION)
+/* Forbidden bits for control: Offset, Priority */
+#define PPPOL2TP_HEADERFLAG_CONTROL_FORBIDDEN     (PPPOL2TP_HEADERFLAG_OFFSET|PPPOL2TP_HEADERFLAG_PRIORITY)
+
+/* Mandatory bits for data: Version 2 */
+#define PPPOL2TP_HEADERFLAG_DATA_MANDATORY        (PPPOL2TP_HEADERFLAG_VERSION)
+
+/* AVP (Attribute Value Pair) header */
+#define PPPOL2TP_AVPHEADERFLAG_MANDATORY  0x8000
+#define PPPOL2TP_AVPHEADERFLAG_HIDDEN     0x4000
+#define PPPOL2TP_AVPHEADERFLAG_LENGTHMASK 0x03ff
+
+/* -- AVP - Message type */
+#define PPPOL2TP_AVPTYPE_MESSAGE      0 /* Message type */
+
+/* Control Connection Management */
+#define PPPOL2TP_MESSAGETYPE_SCCRQ    1 /* Start Control Connection Request */
+#define PPPOL2TP_MESSAGETYPE_SCCRP    2 /* Start Control Connection Reply */
+#define PPPOL2TP_MESSAGETYPE_SCCCN    3 /* Start Control Connection Connected */
+#define PPPOL2TP_MESSAGETYPE_STOPCCN  4 /* Stop Control Connection Notification */
+#define PPPOL2TP_MESSAGETYPE_HELLO    6 /* Hello */
+/* Call Management */
+#define PPPOL2TP_MESSAGETYPE_OCRQ     7 /* Outgoing Call Request */
+#define PPPOL2TP_MESSAGETYPE_OCRP     8 /* Outgoing Call Reply */
+#define PPPOL2TP_MESSAGETYPE_OCCN     9 /* Outgoing Call Connected */
+#define PPPOL2TP_MESSAGETYPE_ICRQ    10 /* Incoming Call Request */
+#define PPPOL2TP_MESSAGETYPE_ICRP    11 /* Incoming Call Reply */
+#define PPPOL2TP_MESSAGETYPE_ICCN    12 /* Incoming Call Connected */
+#define PPPOL2TP_MESSAGETYPE_CDN     14 /* Call Disconnect Notify */
+/* Error reporting */
+#define PPPOL2TP_MESSAGETYPE_WEN     15 /* WAN Error Notify */
+/* PPP Session Control */
+#define PPPOL2TP_MESSAGETYPE_SLI     16 /* Set Link Info */
+
+/* -- AVP - Result code */
+#define PPPOL2TP_AVPTYPE_RESULTCODE   1 /* Result code */
+#define PPPOL2TP_RESULTCODE           1 /* General request to clear control connection */
+
+/* -- AVP - Protocol version (!= L2TP Header version) */
+#define PPPOL2TP_AVPTYPE_VERSION      2
+#define PPPOL2TP_VERSION         0x0100 /* L2TP Protocol version 1, revision 0 */
+
+/* -- AVP - Framing capabilities */
+#define PPPOL2TP_AVPTYPE_FRAMINGCAPABILITIES           3 /* Bearer capabilities */
+#define PPPOL2TP_FRAMINGCAPABILITIES          0x00000003 /* Async + Sync framing */
+
+/* -- AVP - Bearer capabilities */
+#define PPPOL2TP_AVPTYPE_BEARERCAPABILITIES           4 /* Bearer capabilities */
+#define PPPOL2TP_BEARERCAPABILITIES          0x00000003 /* Analog + Digital Access */
+
+/* -- AVP - Tie breaker */
+#define PPPOL2TP_AVPTYPE_TIEBREAKER   5
+
+/* -- AVP - Host name */
+#define PPPOL2TP_AVPTYPE_HOSTNAME     7 /* Host name */
+#define PPPOL2TP_HOSTNAME        "lwIP" /* FIXME: make it configurable */
+
+/* -- AVP - Vendor name */
+#define PPPOL2TP_AVPTYPE_VENDORNAME   8 /* Vendor name */
+#define PPPOL2TP_VENDORNAME      "lwIP" /* FIXME: make it configurable */
+
+/* -- AVP - Assign tunnel ID */
+#define PPPOL2TP_AVPTYPE_TUNNELID     9 /* Assign Tunnel ID */
+
+/* -- AVP - Receive window size */
+#define PPPOL2TP_AVPTYPE_RECEIVEWINDOWSIZE  10 /* Receive window size */
+#define PPPOL2TP_RECEIVEWINDOWSIZE           8 /* FIXME: make it configurable */
+
+/* -- AVP - Challenge */
+#define PPPOL2TP_AVPTYPE_CHALLENGE   11 /* Challenge */
+
+/* -- AVP - Cause code */
+#define PPPOL2TP_AVPTYPE_CAUSECODE   12 /* Cause code*/
+
+/* -- AVP - Challenge response */
+#define PPPOL2TP_AVPTYPE_CHALLENGERESPONSE   13 /* Challenge response */
+#define PPPOL2TP_AVPTYPE_CHALLENGERESPONSE_SIZE  16
+
+/* -- AVP - Assign session ID */
+#define PPPOL2TP_AVPTYPE_SESSIONID   14 /* Assign Session ID */
+
+/* -- AVP - Call serial number */
+#define PPPOL2TP_AVPTYPE_CALLSERIALNUMBER   15 /* Call Serial Number */
+
+/* -- AVP - Framing type */
+#define PPPOL2TP_AVPTYPE_FRAMINGTYPE         19 /* Framing Type */
+#define PPPOL2TP_FRAMINGTYPE         0x00000001 /* Sync framing */
+
+/* -- AVP - TX Connect Speed */
+#define PPPOL2TP_AVPTYPE_TXCONNECTSPEED      24 /* TX Connect Speed */
+#define PPPOL2TP_TXCONNECTSPEED       100000000 /* Connect speed: 100 Mbits/s */
+
+/* L2TP Session state */
+#define PPPOL2TP_STATE_INITIAL     0
+#define PPPOL2TP_STATE_SCCRQ_SENT  1
+#define PPPOL2TP_STATE_ICRQ_SENT   2
+#define PPPOL2TP_STATE_ICCN_SENT   3
+#define PPPOL2TP_STATE_DATA        4
+
+#define PPPOL2TP_OUTPUT_DATA_HEADER_LEN   6 /* Our data header len */
+
+/*
+ * PPPoL2TP interface control block.
+ */
+typedef struct pppol2tp_pcb_s pppol2tp_pcb;
+struct pppol2tp_pcb_s {
+  ppp_pcb *ppp;                /* PPP PCB */
+  u8_t phase;                  /* L2TP phase */
+  struct udp_pcb *udp;         /* UDP L2TP Socket */
+  struct netif *netif;         /* Output interface, used as a default route */
+  ip_addr_t remote_ip;         /* LNS IP Address */
+  u16_t remote_port;           /* LNS port */
+#if PPPOL2TP_AUTH_SUPPORT
+  const u8_t *secret;          /* Secret string */
+  u8_t secret_len;             /* Secret string length */
+  u8_t secret_rv[16];          /* Random vector */
+  u8_t challenge_hash[16];     /* Challenge response */
+  u8_t send_challenge;         /* Boolean whether the next sent packet should contains a challenge response */
+#endif /* PPPOL2TP_AUTH_SUPPORT */
+
+  u16_t tunnel_port;           /* Tunnel port */
+  u16_t our_ns;                /* NS to peer */
+  u16_t peer_nr;               /* NR from peer */
+  u16_t peer_ns;               /* Expected NS from peer */
+  u16_t source_tunnel_id;      /* Tunnel ID assigned by peer */
+  u16_t remote_tunnel_id;      /* Tunnel ID assigned to peer */
+  u16_t source_session_id;     /* Session ID assigned by peer */
+  u16_t remote_session_id;     /* Session ID assigned to peer */
+
+  u8_t sccrq_retried;          /* number of SCCRQ retries already done */
+  u8_t icrq_retried;           /* number of ICRQ retries already done */
+  u8_t iccn_retried;           /* number of ICCN retries already done */
+};
+
+
+/* Create a new L2TP session. */
+ppp_pcb *pppol2tp_create(struct netif *pppif,
+       struct netif *netif, const ip_addr_t *ipaddr, u16_t port,
+       const u8_t *secret, u8_t secret_len,
+       ppp_link_status_cb_fn link_status_cb, void *ctx_cb);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PPPOL2TP_H */
+#endif /* PPP_SUPPORT && PPPOL2TP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppos.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppos.h
new file mode 100644
index 00000000000..380a965ce6a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/pppos.h
@@ -0,0 +1,126 @@
+/**
+ * @file
+ * Network Point to Point Protocol over Serial header file.
+ *
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && PPPOS_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+#ifndef PPPOS_H
+#define PPPOS_H
+
+#include "lwip/sys.h"
+
+#include "ppp.h"
+#include "vj.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* PPP packet parser states.  Current state indicates operation yet to be
+ * completed. */
+enum {
+  PDIDLE = 0,  /* Idle state - waiting. */
+  PDSTART,     /* Process start flag. */
+  PDADDRESS,   /* Process address field. */
+  PDCONTROL,   /* Process control field. */
+  PDPROTOCOL1, /* Process protocol field 1. */
+  PDPROTOCOL2, /* Process protocol field 2. */
+  PDDATA       /* Process data byte. */
+};
+
+/* PPPoS serial output callback function prototype */
+typedef u32_t (*pppos_output_cb_fn)(ppp_pcb *pcb, u8_t *data, u32_t len, void *ctx);
+
+/*
+ * Extended asyncmap - allows any character to be escaped.
+ */
+typedef u8_t ext_accm[32];
+
+/*
+ * PPPoS interface control block.
+ */
+typedef struct pppos_pcb_s pppos_pcb;
+struct pppos_pcb_s {
+  /* -- below are data that will NOT be cleared between two sessions */
+  ppp_pcb *ppp;                    /* PPP PCB */
+  pppos_output_cb_fn output_cb;    /* PPP serial output callback */
+
+  /* -- below are data that will be cleared between two sessions
+   *
+   * last_xmit must be the first member of cleared members, because it is
+   * used to know which part must not be cleared.
+   */
+  u32_t last_xmit;                 /* Time of last transmission. */
+  ext_accm out_accm;               /* Async-Ctl-Char-Map for output. */
+
+  /* flags */
+  unsigned int open            :1; /* Set if PPPoS is open */
+  unsigned int pcomp           :1; /* Does peer accept protocol compression? */
+  unsigned int accomp          :1; /* Does peer accept addr/ctl compression? */
+
+  /* PPPoS rx */
+  ext_accm in_accm;                /* Async-Ctl-Char-Map for input. */
+  struct pbuf *in_head, *in_tail;  /* The input packet. */
+  u16_t in_protocol;               /* The input protocol code. */
+  u16_t in_fcs;                    /* Input Frame Check Sequence value. */
+  u8_t in_state;                   /* The input process state. */
+  u8_t in_escaped;                 /* Escape next character. */
+};
+
+/* Create a new PPPoS session. */
+ppp_pcb *pppos_create(struct netif *pppif, pppos_output_cb_fn output_cb,
+       ppp_link_status_cb_fn link_status_cb, void *ctx_cb);
+
+#if !NO_SYS && !PPP_INPROC_IRQ_SAFE
+/* Pass received raw characters to PPPoS to be decoded through lwIP TCPIP thread. */
+err_t pppos_input_tcpip(ppp_pcb *ppp, u8_t *s, int l);
+#endif /* !NO_SYS && !PPP_INPROC_IRQ_SAFE */
+
+/* PPP over Serial: this is the input function to be called for received data. */
+void pppos_input(ppp_pcb *ppp, u8_t* data, int len);
+
+
+/*
+ * Functions called from lwIP
+ * DO NOT CALL FROM lwIP USER APPLICATION.
+ */
+#if !NO_SYS && !PPP_INPROC_IRQ_SAFE
+err_t pppos_input_sys(struct pbuf *p, struct netif *inp);
+#endif /* !NO_SYS && !PPP_INPROC_IRQ_SAFE */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PPPOS_H */
+#endif /* PPP_SUPPORT && PPPOL2TP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/upap.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/upap.h
new file mode 100644
index 00000000000..540d981492c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/upap.h
@@ -0,0 +1,131 @@
+/*
+ * upap.h - User/Password Authentication Protocol definitions.
+ *
+ * Copyright (c) 1984-2000 Carnegie Mellon University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. The name "Carnegie Mellon University" must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission. For permission or any legal
+ *    details, please contact
+ *      Office of Technology Transfer
+ *      Carnegie Mellon University
+ *      5000 Forbes Avenue
+ *      Pittsburgh, PA  15213-3890
+ *      (412) 268-4387, fax: (412) 268-7395
+ *      tech-transfer@andrew.cmu.edu
+ *
+ * 4. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by Computing Services
+ *     at Carnegie Mellon University (http://www.cmu.edu/computing/)."
+ *
+ * CARNEGIE MELLON UNIVERSITY DISCLAIMS ALL WARRANTIES WITH REGARD TO
+ * THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL CARNEGIE MELLON UNIVERSITY BE LIABLE
+ * FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
+ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $Id: upap.h,v 1.8 2002/12/04 23:03:33 paulus Exp $
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && PAP_SUPPORT  /* don't build if not configured for use in lwipopts.h */
+
+#ifndef UPAP_H
+#define UPAP_H
+
+#include "ppp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Packet header = Code, id, length.
+ */
+#define UPAP_HEADERLEN	4
+
+
+/*
+ * UPAP codes.
+ */
+#define UPAP_AUTHREQ	1	/* Authenticate-Request */
+#define UPAP_AUTHACK	2	/* Authenticate-Ack */
+#define UPAP_AUTHNAK	3	/* Authenticate-Nak */
+
+
+/*
+ * Client states.
+ */
+#define UPAPCS_INITIAL	0	/* Connection down */
+#define UPAPCS_CLOSED	1	/* Connection up, haven't requested auth */
+#define UPAPCS_PENDING	2	/* Connection down, have requested auth */
+#define UPAPCS_AUTHREQ	3	/* We've sent an Authenticate-Request */
+#define UPAPCS_OPEN	4	/* We've received an Ack */
+#define UPAPCS_BADAUTH	5	/* We've received a Nak */
+
+/*
+ * Server states.
+ */
+#define UPAPSS_INITIAL	0	/* Connection down */
+#define UPAPSS_CLOSED	1	/* Connection up, haven't requested auth */
+#define UPAPSS_PENDING	2	/* Connection down, have requested auth */
+#define UPAPSS_LISTEN	3	/* Listening for an Authenticate */
+#define UPAPSS_OPEN	4	/* We've sent an Ack */
+#define UPAPSS_BADAUTH	5	/* We've sent a Nak */
+
+
+/*
+ * Timeouts.
+ */
+#if 0 /* moved to ppp_opts.h */
+#define UPAP_DEFTIMEOUT	3	/* Timeout (seconds) for retransmitting req */
+#define UPAP_DEFREQTIME	30	/* Time to wait for auth-req from peer */
+#endif /* moved to ppp_opts.h */
+
+/*
+ * Each interface is described by upap structure.
+ */
+#if PAP_SUPPORT
+typedef struct upap_state {
+    const char *us_user;	/* User */
+    u8_t us_userlen;		/* User length */
+    const char *us_passwd;	/* Password */
+    u8_t us_passwdlen;		/* Password length */
+    u8_t us_clientstate;	/* Client state */
+#if PPP_SERVER
+    u8_t us_serverstate;	/* Server state */
+#endif /* PPP_SERVER */
+    u8_t us_id;		        /* Current id */
+    u8_t us_transmits;		/* Number of auth-reqs sent */
+} upap_state;
+#endif /* PAP_SUPPORT */
+
+
+void upap_authwithpeer(ppp_pcb *pcb, const char *user, const char *password);
+#if PPP_SERVER
+void upap_authpeer(ppp_pcb *pcb);
+#endif /* PPP_SERVER */
+
+extern const struct protent pap_protent;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* UPAP_H */
+#endif /* PPP_SUPPORT && PAP_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/vj.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/vj.h
new file mode 100644
index 00000000000..77d9976c52d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/ppp/vj.h
@@ -0,0 +1,169 @@
+/*
+ * Definitions for tcp compression routines.
+ *
+ * $Id: vj.h,v 1.7 2010/02/22 17:52:09 goldsimon Exp $
+ *
+ * Copyright (c) 1989 Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms are permitted
+ * provided that the above copyright notice and this paragraph are
+ * duplicated in all such forms and that any documentation,
+ * advertising materials, and other materials related to such
+ * distribution and use acknowledge that the software was developed
+ * by the University of California, Berkeley.  The name of the
+ * University may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * Van Jacobson (van@helios.ee.lbl.gov), Dec 31, 1989:
+ * - Initial distribution.
+ */
+
+#include "netif/ppp/ppp_opts.h"
+#if PPP_SUPPORT && VJ_SUPPORT /* don't build if not configured for use in lwipopts.h */
+
+#ifndef VJ_H
+#define VJ_H
+
+#include "lwip/ip.h"
+#include "lwip/priv/tcp_priv.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MAX_SLOTS 16 /* must be > 2 and < 256 */
+#define MAX_HDR   128
+
+/*
+ * Compressed packet format:
+ *
+ * The first octet contains the packet type (top 3 bits), TCP
+ * 'push' bit, and flags that indicate which of the 4 TCP sequence
+ * numbers have changed (bottom 5 bits).  The next octet is a
+ * conversation number that associates a saved IP/TCP header with
+ * the compressed packet.  The next two octets are the TCP checksum
+ * from the original datagram.  The next 0 to 15 octets are
+ * sequence number changes, one change per bit set in the header
+ * (there may be no changes and there are two special cases where
+ * the receiver implicitly knows what changed -- see below).
+ *
+ * There are 5 numbers which can change (they are always inserted
+ * in the following order): TCP urgent pointer, window,
+ * acknowlegement, sequence number and IP ID.  (The urgent pointer
+ * is different from the others in that its value is sent, not the
+ * change in value.)  Since typical use of SLIP links is biased
+ * toward small packets (see comments on MTU/MSS below), changes
+ * use a variable length coding with one octet for numbers in the
+ * range 1 - 255 and 3 octets (0, MSB, LSB) for numbers in the
+ * range 256 - 65535 or 0.  (If the change in sequence number or
+ * ack is more than 65535, an uncompressed packet is sent.)
+ */
+
+/*
+ * Packet types (must not conflict with IP protocol version)
+ *
+ * The top nibble of the first octet is the packet type.  There are
+ * three possible types: IP (not proto TCP or tcp with one of the
+ * control flags set); uncompressed TCP (a normal IP/TCP packet but
+ * with the 8-bit protocol field replaced by an 8-bit connection id --
+ * this type of packet syncs the sender & receiver); and compressed
+ * TCP (described above).
+ *
+ * LSB of 4-bit field is TCP "PUSH" bit (a worthless anachronism) and
+ * is logically part of the 4-bit "changes" field that follows.  Top
+ * three bits are actual packet type.  For backward compatibility
+ * and in the interest of conserving bits, numbers are chosen so the
+ * IP protocol version number (4) which normally appears in this nibble
+ * means "IP packet".
+ */
+
+/* packet types */
+#define TYPE_IP               0x40
+#define TYPE_UNCOMPRESSED_TCP 0x70
+#define TYPE_COMPRESSED_TCP   0x80
+#define TYPE_ERROR            0x00
+
+/* Bits in first octet of compressed packet */
+#define NEW_C 0x40 /* flag bits for what changed in a packet */
+#define NEW_I 0x20
+#define NEW_S 0x08
+#define NEW_A 0x04
+#define NEW_W 0x02
+#define NEW_U 0x01
+
+/* reserved, special-case values of above */
+#define SPECIAL_I (NEW_S|NEW_W|NEW_U) /* echoed interactive traffic */
+#define SPECIAL_D (NEW_S|NEW_A|NEW_W|NEW_U) /* unidirectional data */
+#define SPECIALS_MASK (NEW_S|NEW_A|NEW_W|NEW_U)
+
+#define TCP_PUSH_BIT 0x10
+
+
+/*
+ * "state" data for each active tcp conversation on the wire.  This is
+ * basically a copy of the entire IP/TCP header from the last packet
+ * we saw from the conversation together with a small identifier
+ * the transmit & receive ends of the line use to locate saved header.
+ */
+struct cstate {
+  struct cstate *cs_next; /* next most recently used state (xmit only) */
+  u16_t cs_hlen;        /* size of hdr (receive only) */
+  u8_t cs_id;           /* connection # associated with this state */
+  u8_t cs_filler;
+  union {
+    char csu_hdr[MAX_HDR];
+    struct ip_hdr csu_ip;     /* ip/tcp hdr from most recent packet */
+  } vjcs_u;
+};
+#define cs_ip vjcs_u.csu_ip
+#define cs_hdr vjcs_u.csu_hdr
+
+
+struct vjstat {
+  u32_t vjs_packets;        /* outbound packets */
+  u32_t vjs_compressed;     /* outbound compressed packets */
+  u32_t vjs_searches;       /* searches for connection state */
+  u32_t vjs_misses;         /* times couldn't find conn. state */
+  u32_t vjs_uncompressedin; /* inbound uncompressed packets */
+  u32_t vjs_compressedin;   /* inbound compressed packets */
+  u32_t vjs_errorin;        /* inbound unknown type packets */
+  u32_t vjs_tossed;         /* inbound packets tossed because of error */
+};
+
+/*
+ * all the state data for one serial line (we need one of these per line).
+ */
+struct vjcompress {
+  struct cstate *last_cs;          /* most recently used tstate */
+  u8_t last_recv;                /* last rcvd conn. id */
+  u8_t last_xmit;                /* last sent conn. id */
+  u16_t flags;
+  u8_t maxSlotIndex;
+  u8_t compressSlot;             /* Flag indicating OK to compress slot ID. */
+#if LINK_STATS
+  struct vjstat stats;
+#endif
+  struct cstate tstate[MAX_SLOTS]; /* xmit connection states */
+  struct cstate rstate[MAX_SLOTS]; /* receive connection states */
+};
+
+/* flag values */
+#define VJF_TOSS 1U /* tossing rcvd frames because of input err */
+
+extern void  vj_compress_init    (struct vjcompress *comp);
+extern u8_t  vj_compress_tcp     (struct vjcompress *comp, struct pbuf **pb);
+extern void  vj_uncompress_err   (struct vjcompress *comp);
+extern int   vj_uncompress_uncomp(struct pbuf *nb, struct vjcompress *comp);
+extern int   vj_uncompress_tcp   (struct pbuf **nb, struct vjcompress *comp);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* VJ_H */
+
+#endif /* PPP_SUPPORT && VJ_SUPPORT */
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/slipif.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/slipif.h
new file mode 100644
index 00000000000..65ba31f835b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/slipif.h
@@ -0,0 +1,87 @@
+/**
+ * @file
+ *
+ * SLIP netif API
+ */
+
+/*
+ * Copyright (c) 2001, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef LWIP_HDR_NETIF_SLIPIF_H
+#define LWIP_HDR_NETIF_SLIPIF_H
+
+#include "lwip/opt.h"
+#include "lwip/netif.h"
+
+/** Set this to 1 to start a thread that blocks reading on the serial line
+ * (using sio_read()).
+ */
+#ifndef SLIP_USE_RX_THREAD
+#define SLIP_USE_RX_THREAD !NO_SYS
+#endif
+
+/** Set this to 1 to enable functions to pass in RX bytes from ISR context.
+ * If enabled, slipif_received_byte[s]() process incoming bytes and put assembled
+ * packets on a queue, which is fed into lwIP from slipif_poll().
+ * If disabled, slipif_poll() polls the serial line (using sio_tryread()).
+ */
+#ifndef SLIP_RX_FROM_ISR
+#define SLIP_RX_FROM_ISR 0
+#endif
+
+/** Set this to 1 (default for SLIP_RX_FROM_ISR) to queue incoming packets
+ * received by slipif_received_byte[s]() as long as PBUF_POOL pbufs are available.
+ * If disabled, packets will be dropped if more than one packet is received.
+ */
+#ifndef SLIP_RX_QUEUE
+#define SLIP_RX_QUEUE SLIP_RX_FROM_ISR
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+err_t slipif_init(struct netif * netif);
+void slipif_poll(struct netif *netif);
+#if SLIP_RX_FROM_ISR
+void slipif_process_rxqueue(struct netif *netif);
+void slipif_received_byte(struct netif *netif, u8_t data);
+void slipif_received_bytes(struct netif *netif, u8_t *data, u8_t len);
+#endif /* SLIP_RX_FROM_ISR */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_HDR_NETIF_SLIPIF_H */
+
diff --git a/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/zepif.h b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/zepif.h
new file mode 100644
index 00000000000..2a801b4c407
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/lwip/src/include/netif/zepif.h
@@ -0,0 +1,81 @@
+/**
+ * @file
+ *
+ * A netif implementing the ZigBee Eencapsulation Protocol (ZEP).
+ * This is used to tunnel 6LowPAN over UDP.
+ */
+
+/*
+ * Copyright (c) 2018 Simon Goldschmidt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Simon Goldschmidt <goldsimon@gmx.de>
+ *
+ */
+
+#ifndef LWIP_HDR_ZEPIF_H
+#define LWIP_HDR_ZEPIF_H
+
+#include "lwip/opt.h"
+#include "netif/lowpan6.h"
+
+#if LWIP_IPV6 && LWIP_UDP /* don't build if not configured for use in lwipopts.h */
+
+#include "lwip/netif.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ZEPIF_DEFAULT_UDP_PORT  17754
+
+/** Pass this struct as 'state' to netif_add to control the behaviour
+ * of this netif. If NULL is passed, default behaviour is chosen */
+struct zepif_init {
+  /** The UDP port used to ZEP frames from (0 = default) */
+  u16_t               zep_src_udp_port;
+  /** The UDP port used to ZEP frames to (0 = default) */
+  u16_t               zep_dst_udp_port;
+  /** The IP address to sed ZEP frames from (NULL = ANY) */
+  const ip_addr_t    *zep_src_ip_addr;
+  /** The IP address to sed ZEP frames to (NULL = BROADCAST) */
+  const ip_addr_t    *zep_dst_ip_addr;
+  /** If != NULL, the udp pcb is bound to this netif */
+  const struct netif *zep_netif;
+  /** MAC address of the 6LowPAN device */
+  u8_t                addr[6];
+};
+
+err_t zepif_init(struct netif *netif);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LWIP_IPV6 && LWIP_UDP */
+
+#endif /* LWIP_HDR_ZEPIF_H */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/cc.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/cc.h
new file mode 100644
index 00000000000..f17c49783a5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/cc.h
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2001, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef __ARCH_CC_H__
+#define __ARCH_CC_H__
+
+#include <stdint.h>
+#include <errno.h>
+#include <assert.h>
+#include <stdio.h>
+
+#include "sdkconfig.h"
+#include "arch/sys_arch.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef BYTE_ORDER
+#define BYTE_ORDER LITTLE_ENDIAN
+#endif // BYTE_ORDER
+
+#ifndef CONFIG_LWIP_ESP_LWIP_ASSERT
+#define LWIP_NOASSERT 1
+#endif
+
+typedef uint8_t  u8_t;
+typedef int8_t   s8_t;
+typedef uint16_t u16_t;
+typedef int16_t  s16_t;
+typedef uint32_t u32_t;
+typedef int32_t  s32_t;
+
+
+typedef int sys_prot_t;
+
+#define S16_F "d"
+#define U16_F "d"
+#define X16_F "x"
+
+#define S32_F "d"
+#define U32_F "u"
+#define X32_F "x"
+
+#define PACK_STRUCT_FIELD(x) x
+#define PACK_STRUCT_STRUCT __attribute__((packed))
+#define PACK_STRUCT_BEGIN
+#define PACK_STRUCT_END
+
+#include <stdio.h>
+
+#define LWIP_PLATFORM_DIAG(x)   do {printf x;} while(0)
+
+#ifdef NDEBUG
+
+#define LWIP_NOASSERT 1
+
+#else // Assertions enabled
+
+#if CONFIG_OPTIMIZATION_ASSERTIONS_SILENT
+#define LWIP_PLATFORM_ASSERT(message) abort()
+#else
+// __assert_func is the assertion failure handler from newlib, defined in assert.h
+#define LWIP_PLATFORM_ASSERT(message) __assert_func(__FILE__, __LINE__, __ASSERT_FUNC, message)
+#endif
+
+// If assertions are on, the default LWIP_ERROR handler behaviour is to
+// abort w/ an assertion failure. Don't do this, instead just print the error (if LWIP_DEBUG is set)
+// and run the handler (same as the LWIP_ERROR behaviour if LWIP_NOASSERT is set).
+#ifdef LWIP_DEBUG
+#define LWIP_ERROR(message, expression, handler) do { if (!(expression)) { \
+  puts(message); handler;}} while(0)
+#else
+// If LWIP_DEBUG is not set, return the error silently (default LWIP behaviour, also.)
+#define LWIP_ERROR(message, expression, handler) do { if (!(expression)) { \
+  handler;}} while(0)
+#endif // LWIP_DEBUG
+
+#endif /* NDEBUG */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ARCH_CC_H__ */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/perf.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/perf.h
new file mode 100644
index 00000000000..4b9687be2ca
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/perf.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2001, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+#ifndef __PERF_H__
+#define __PERF_H__
+
+#define PERF_START    /* null definition */
+#define PERF_STOP(x)  /* null definition */
+
+#endif /* __PERF_H__ */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/sys_arch.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/sys_arch.h
new file mode 100644
index 00000000000..2c5c89961e4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/sys_arch.h
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+
+#ifndef __SYS_ARCH_H__
+#define __SYS_ARCH_H__
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "freertos/semphr.h"
+#include "arch/vfs_lwip.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+typedef SemaphoreHandle_t sys_sem_t;
+typedef SemaphoreHandle_t sys_mutex_t;
+typedef TaskHandle_t sys_thread_t;
+
+typedef struct sys_mbox_s {
+  QueueHandle_t os_mbox;
+  void *owner;
+}* sys_mbox_t;
+
+/** This is returned by _fromisr() sys functions to tell the outermost function
+ * that a higher priority task was woken and the scheduler needs to be invoked.
+ */
+#define ERR_NEED_SCHED 123
+
+void sys_delay_ms(uint32_t ms);
+#define sys_msleep(ms) sys_delay_ms(ms)
+
+#define LWIP_COMPAT_MUTEX 0
+
+#if !LWIP_COMPAT_MUTEX
+#define sys_mutex_valid( x ) ( ( ( *x ) == NULL) ? pdFALSE : pdTRUE )
+#define sys_mutex_set_invalid( x ) ( ( *x ) = NULL )
+#endif
+
+#define sys_mbox_valid( x ) ( ( ( *x ) == NULL) ? pdFALSE : pdTRUE )
+
+/* Define the sys_mbox_set_invalid() to empty to support lock-free mbox in ESP LWIP.
+ *
+ * The basic idea about the lock-free mbox is that the mbox should always be valid unless
+ * no socket APIs are using the socket and the socket is closed. ESP LWIP achieves this by
+ * following two changes to official LWIP:
+ * 1. Postpone the deallocation of mbox to netconn_free(), in other words, free the mbox when
+ *    no one is using the socket.
+ * 2. Define the sys_mbox_set_invalid() to empty if the mbox is not actually freed.
+
+ * The second change is necessary. Consider a common scenario: the application task calls
+ * recv() to receive packets from the socket, the sys_mbox_valid() returns true. Because there
+ * is no lock for the mbox, the LWIP CORE can call sys_mbox_set_invalid() to set the mbox at
+ * anytime and the thread-safe issue may happen.
+ *
+ * However, if the sys_mbox_set_invalid() is not called after sys_mbox_free(), e.g. in netconn_alloc(),
+ * we need to initialize the mbox to invalid explicitly since sys_mbox_set_invalid() now is empty.
+ */
+#define sys_mbox_set_invalid( x )  *x = NULL
+
+#define sys_sem_valid( x ) ( ( ( *x ) == NULL) ? pdFALSE : pdTRUE )
+#define sys_sem_set_invalid( x ) ( ( *x ) = NULL )
+
+void sys_delay_ms(uint32_t ms);
+sys_sem_t* sys_thread_sem_init(void);
+void sys_thread_sem_deinit(void);
+sys_sem_t* sys_thread_sem_get(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __SYS_ARCH_H__ */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/vfs_lwip.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/vfs_lwip.h
new file mode 100644
index 00000000000..8a037c6ff26
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/arch/vfs_lwip.h
@@ -0,0 +1,23 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void esp_vfs_lwip_sockets_register(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/arpa/inet.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/arpa/inet.h
new file mode 100644
index 00000000000..94c6c17ed5a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/arpa/inet.h
@@ -0,0 +1,20 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef INET_H_
+#define INET_H_
+
+#include "lwip/inet.h"
+
+#endif /* INET_H_ */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/lwip_default_hooks.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/lwip_default_hooks.h
new file mode 100644
index 00000000000..3f3ec0b2ecc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/lwip_default_hooks.h
@@ -0,0 +1,61 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _LWIP_DEFAULT_HOOKS_H_
+#define _LWIP_DEFAULT_HOOKS_H_
+#include "lwip/ip_addr.h"
+#include "lwip/arch.h"
+#include "lwip/err.h"
+
+#ifdef ESP_IDF_LWIP_HOOK_FILENAME
+#include ESP_IDF_LWIP_HOOK_FILENAME
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT
+void lwip_init_tcp_isn(u32_t boot_time, const u8_t *secret_16_bytes);
+#endif
+#if defined(CONFIG_LWIP_HOOK_TCP_ISN_CUSTOM) || defined(CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT)
+u32_t lwip_hook_tcp_isn(const ip_addr_t *local_ip, u16_t local_port,
+                        const ip_addr_t *remote_ip, u16_t remote_port);
+#define LWIP_HOOK_TCP_ISN lwip_hook_tcp_isn
+#endif /* CONFIG_LWIP_HOOK_TCP_ISN... */
+
+#if defined(CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM) || defined(CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT)
+struct netif *
+lwip_hook_ip6_route(const ip6_addr_t *src, const ip6_addr_t *dest);
+
+#define LWIP_HOOK_IP6_ROUTE lwip_hook_ip6_route
+#endif /* CONFIG_LWIP_HOOK_IP6_ROUTE... */
+
+#if defined(CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM) || defined(CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT)
+const ip6_addr_t *lwip_hook_nd6_get_gw(struct netif *netif, const ip6_addr_t *dest);
+
+#define LWIP_HOOK_ND6_GET_GW lwip_hook_nd6_get_gw
+#endif /* CONFIG_LWIP_HOOK_ND6_GET_GATEWAY... */
+
+#if defined(CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM) || defined(CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT)
+int lwip_hook_netconn_external_resolve(const char *name, ip_addr_t *addr, u8_t addrtype, err_t *err);
+
+#define LWIP_HOOK_NETCONN_EXTERNAL_RESOLVE lwip_hook_netconn_external_resolve
+#endif /* CONFIG_LWIP_HOOK_NETCONN_EXTERNAL_RESOLVE... */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LWIP_DEFAULT_HOOKS_H_ */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/lwipopts.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/lwipopts.h
new file mode 100644
index 00000000000..47215e99dae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/lwipopts.h
@@ -0,0 +1,1084 @@
+/*
+ * SPDX-FileCopyrightText: 2001-2003 Swedish Institute of Computer Science
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * SPDX-FileContributor: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ */
+
+#ifndef __LWIPOPTS_H__
+#define __LWIPOPTS_H__
+
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/fcntl.h>
+#include <sys/ioctl.h>
+#include <sys/types.h>
+#include <sys/select.h>
+#include "esp_task.h"
+#include "esp_system.h"
+#include "sdkconfig.h"
+#include "netif/dhcp_state.h"
+#include "sntp/sntp_get_set_time.h"
+
+/* Enable all Espressif-only options */
+
+/*
+   -----------------------------------------------
+   ---------- Platform specific locking ----------
+   -----------------------------------------------
+*/
+/**
+ * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain
+ * critical regions during buffer allocation, deallocation and memory
+ * allocation and deallocation.
+ */
+#define SYS_LIGHTWEIGHT_PROT        1
+
+/**
+ * MEMCPY: override this if you have a faster implementation at hand than the
+ * one included in your C library
+ */
+#define MEMCPY(dst,src,len)             memcpy(dst,src,len)
+
+/**
+ * SMEMCPY: override this with care! Some compilers (e.g. gcc) can inline a
+ * call to memcpy() if the length is known at compile time and is small.
+ */
+#define SMEMCPY(dst,src,len)            memcpy(dst,src,len)
+
+#define LWIP_RAND       esp_random
+
+/*
+   ------------------------------------
+   ---------- Memory options ----------
+   ------------------------------------
+*/
+/**
+ * MEM_LIBC_MALLOC==1: Use malloc/free/realloc provided by your C-library
+ * instead of the lwip internal allocator. Can save code size if you
+ * already use it.
+ */
+#define MEM_LIBC_MALLOC        1
+
+/**
+* MEMP_MEM_MALLOC==1: Use mem_malloc/mem_free instead of the lwip pool allocator.
+* Especially useful with MEM_LIBC_MALLOC but handle with care regarding execution
+* speed and usage from interrupts!
+*/
+#define MEMP_MEM_MALLOC                 1
+
+/**
+ * MEM_ALIGNMENT: should be set to the alignment of the CPU
+ *    4 byte alignment -> #define MEM_ALIGNMENT 4
+ *    2 byte alignment -> #define MEM_ALIGNMENT 2
+ */
+#define MEM_ALIGNMENT           4
+
+/*
+   ------------------------------------------------
+   ---------- Internal Memory Pool Sizes ----------
+   ------------------------------------------------
+*/
+
+/**
+ * MEMP_NUM_NETCONN: the number of struct netconns.
+ * (only needed if you use the sequential API, like api_lib.c)
+ */
+#define MEMP_NUM_NETCONN                CONFIG_LWIP_MAX_SOCKETS
+
+/**
+ * MEMP_NUM_RAW_PCB: Number of raw connection PCBs
+ * (requires the LWIP_RAW option)
+ */
+#define MEMP_NUM_RAW_PCB                CONFIG_LWIP_MAX_RAW_PCBS
+
+/**
+ * MEMP_NUM_TCP_PCB: the number of simultaneously active TCP connections.
+ * (requires the LWIP_TCP option)
+ */
+#define MEMP_NUM_TCP_PCB                CONFIG_LWIP_MAX_ACTIVE_TCP
+
+/**
+ * MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections.
+ * (requires the LWIP_TCP option)
+ */
+#define MEMP_NUM_TCP_PCB_LISTEN         CONFIG_LWIP_MAX_LISTENING_TCP
+
+/**
+ * MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
+ * per active UDP "connection".
+ * (requires the LWIP_UDP option)
+ */
+#define MEMP_NUM_UDP_PCB                CONFIG_LWIP_MAX_UDP_PCBS
+
+/*
+   --------------------------------
+   ---------- ARP options -------
+   --------------------------------
+*/
+/**
+ * ARP_QUEUEING==1: Multiple outgoing packets are queued during hardware address
+ * resolution. By default, only the most recent packet is queued per IP address.
+ * This is sufficient for most protocols and mainly reduces TCP connection
+ * startup time. Set this to 1 if you know your application sends more than one
+ * packet in a row to an IP address that is not in the ARP cache.
+ */
+#define ARP_QUEUEING                    1
+
+/*
+   --------------------------------
+   ---------- IP options ----------
+   --------------------------------
+*/
+/**
+ * IP_REASSEMBLY==1: Reassemble incoming fragmented IP4 packets. Note that
+ * this option does not affect outgoing packet sizes, which can be controlled
+ * via IP_FRAG.
+ */
+#define IP_REASSEMBLY                   CONFIG_LWIP_IP4_REASSEMBLY
+
+/**
+ * LWIP_IPV6_REASS==1: reassemble incoming IP6 packets that fragmented. Note that
+ * this option does not affect outgoing packet sizes, which can be controlled
+ * via LWIP_IPV6_FRAG.
+ */
+#define LWIP_IPV6_REASS                 CONFIG_LWIP_IP6_REASSEMBLY
+
+/**
+ * IP_FRAG==1: Fragment outgoing IP4 packets if their size exceeds MTU. Note
+ * that this option does not affect incoming packet sizes, which can be
+ * controlled via IP_REASSEMBLY.
+ */
+#define IP_FRAG                         CONFIG_LWIP_IP4_FRAG
+
+/**
+ * LWIP_IPV6_FRAG==1: Fragment outgoing IP6 packets if their size exceeds MTU. Note
+ * that this option does not affect incoming packet sizes, which can be
+ * controlled via IP_REASSEMBLY.
+ */
+#define LWIP_IPV6_FRAG                  CONFIG_LWIP_IP6_FRAG
+
+/**
+ * IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally)
+ * a fragmented IP packet waits for all fragments to arrive. If not all fragments arrived
+ * in this time, the whole packet is discarded.
+ */
+#define IP_REASS_MAXAGE                 3
+
+/**
+ * IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled.
+ * Since the received pbufs are enqueued, be sure to configure
+ * PBUF_POOL_SIZE > IP_REASS_MAX_PBUFS so that the stack is still able to receive
+ * packets even if the maximum amount of fragments is enqueued for reassembly!
+ */
+#define IP_REASS_MAX_PBUFS              10
+
+/**
+ * IP_FORWARD==1: Enables the ability to forward IP packets across network
+ * interfaces. If you are going to run lwIP on a device with only one network
+ * interface, define this to 0.
+ */
+#define IP_FORWARD                      CONFIG_LWIP_IP_FORWARD
+
+/**
+ * IP_NAPT==1: Enables IPv4 Network Address and Port Translation.
+ * Note that both CONFIG_LWIP_IP_FORWARD and CONFIG_LWIP_L2_TO_L3_COPY options
+ * need to be enabled in system configuration for the NAPT to work on ESP platform
+ */
+#define IP_NAPT                         CONFIG_LWIP_IPV4_NAPT
+
+/*
+   ----------------------------------
+   ---------- ICMP options ----------
+   ----------------------------------
+*/
+#define LWIP_ICMP  CONFIG_LWIP_ICMP
+
+#define LWIP_BROADCAST_PING CONFIG_LWIP_BROADCAST_PING
+
+#define LWIP_MULTICAST_PING CONFIG_LWIP_MULTICAST_PING
+
+/*
+   ---------------------------------
+   ---------- RAW options ----------
+   ---------------------------------
+*/
+/**
+ * LWIP_RAW==1: Enable application layer to hook into the IP layer itself.
+ */
+#define LWIP_RAW                        1
+
+/*
+   ----------------------------------
+   ---------- DHCP options ----------
+   ----------------------------------
+*/
+/**
+ * LWIP_DHCP==1: Enable DHCP module.
+ */
+#define LWIP_DHCP                       1
+
+#define DHCP_MAXRTX                     0
+
+/**
+ * DHCP_DOES_ARP_CHECK==1: Do an ARP check on the offered address.
+ */
+#define DHCP_DOES_ARP_CHECK             CONFIG_LWIP_DHCP_DOES_ARP_CHECK
+
+/**
+ * LWIP_DHCP_DISABLE_CLIENT_ID==1: Do not add option 61 (client-id) to DHCP packets
+ */
+#define ESP_DHCP_DISABLE_CLIENT_ID      CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID
+
+/**
+ * CONFIG_LWIP_DHCP_RESTORE_LAST_IP==1: Last valid IP address obtained from DHCP server
+ * is restored after reset/power-up.
+ */
+#if CONFIG_LWIP_DHCP_RESTORE_LAST_IP
+
+#define LWIP_DHCP_IP_ADDR_RESTORE()     dhcp_ip_addr_restore(netif)
+#define LWIP_DHCP_IP_ADDR_STORE()       dhcp_ip_addr_store(netif)
+#define LWIP_DHCP_IP_ADDR_ERASE(esp_netif)       dhcp_ip_addr_erase(esp_netif)
+
+#endif
+
+/**
+ * CONFIG_LWIP_DHCP_OPTIONS_LEN: The total length of outgoing DHCP option msg. If you have many options
+ * and options value is too long, you can configure the length according to your requirements
+ */
+#define DHCP_OPTIONS_LEN                CONFIG_LWIP_DHCP_OPTIONS_LEN
+
+/**
+ * LWIP_DHCP_DISABLE_VENDOR_CLASS_ID==1: Do not add option 60 (Vendor Class Identifier) to DHCP packets
+ */
+#define ESP_DHCP_DISABLE_VENDOR_CLASS_IDENTIFIER       CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID
+
+/*
+   ------------------------------------
+   ---------- AUTOIP options ----------
+   ------------------------------------
+*/
+#ifdef CONFIG_LWIP_AUTOIP
+#define LWIP_AUTOIP                     1
+
+/**
+* LWIP_DHCP_AUTOIP_COOP==1: Allow DHCP and AUTOIP to be both enabled on
+* the same interface at the same time.
+*/
+#define LWIP_DHCP_AUTOIP_COOP           1
+
+/**
+* LWIP_DHCP_AUTOIP_COOP_TRIES: Set to the number of DHCP DISCOVER probes
+* that should be sent before falling back on AUTOIP. This can be set
+* as low as 1 to get an AutoIP address very quickly, but you should
+* be prepared to handle a changing IP address when DHCP overrides
+* AutoIP.
+*/
+#define LWIP_DHCP_AUTOIP_COOP_TRIES     CONFIG_LWIP_AUTOIP_TRIES
+
+#define LWIP_AUTOIP_MAX_CONFLICTS CONFIG_LWIP_AUTOIP_MAX_CONFLICTS
+
+#define LWIP_AUTOIP_RATE_LIMIT_INTERVAL CONFIG_LWIP_AUTOIP_RATE_LIMIT_INTERVAL
+
+#endif /* CONFIG_LWIP_AUTOIP */
+
+/*
+   ----------------------------------
+   ---------- SNMP options ----------
+   ----------------------------------
+*/
+/*
+   ----------------------------------
+   ---------- IGMP options ----------
+   ----------------------------------
+*/
+/**
+ * LWIP_IGMP==1: Turn on IGMP module.
+ */
+#define LWIP_IGMP                       1
+
+/*
+   ----------------------------------
+   ---------- DNS options -----------
+   ----------------------------------
+*/
+/**
+ * LWIP_DNS==1: Turn on DNS module. UDP must be available for DNS
+ * transport.
+ */
+#define LWIP_DNS                        1
+
+#define DNS_MAX_SERVERS                 3
+#define DNS_FALLBACK_SERVER_INDEX        (DNS_MAX_SERVERS - 1)
+
+/*
+   ---------------------------------
+   ---------- UDP options ----------
+   ---------------------------------
+*/
+/*
+   ---------------------------------
+   ---------- TCP options ----------
+   ---------------------------------
+*/
+
+
+/**
+ * TCP_QUEUE_OOSEQ==1: TCP will queue segments that arrive out of order.
+ * Define to 0 if your device is low on memory.
+ */
+#define TCP_QUEUE_OOSEQ                 CONFIG_LWIP_TCP_QUEUE_OOSEQ
+
+/**
+ * LWIP_TCP_SACK_OUT==1: TCP will support sending selective acknowledgements (SACKs).
+ */
+#define LWIP_TCP_SACK_OUT               CONFIG_LWIP_TCP_SACK_OUT
+
+/**
+ * ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES==1: Keep TCP connection when IP changed
+ * scenario happens: 192.168.0.2 -> 0.0.0.0 -> 192.168.0.2 or 192.168.0.2 -> 0.0.0.0
+ */
+
+#define ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES  CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES
+/*
+ *     LWIP_EVENT_API==1: The user defines lwip_tcp_event() to receive all
+ *         events (accept, sent, etc) that happen in the system.
+ *     LWIP_CALLBACK_API==1: The PCB callback function is called directly
+ *         for the event. This is the default.
+*/
+#define TCP_MSS                         CONFIG_LWIP_TCP_MSS
+
+/**
+ * TCP_TMR_INTERVAL: TCP timer interval
+ */
+#define TCP_TMR_INTERVAL                CONFIG_LWIP_TCP_TMR_INTERVAL
+
+/**
+ * TCP_MSL: The maximum segment lifetime in milliseconds
+ */
+#define TCP_MSL                         CONFIG_LWIP_TCP_MSL
+
+/**
+ * TCP_MAXRTX: Maximum number of retransmissions of data segments.
+ */
+#define TCP_MAXRTX                      CONFIG_LWIP_TCP_MAXRTX
+
+/**
+ * TCP_SYNMAXRTX: Maximum number of retransmissions of SYN segments.
+ */
+#define TCP_SYNMAXRTX                   CONFIG_LWIP_TCP_SYNMAXRTX
+
+/**
+ * TCP_LISTEN_BACKLOG: Enable the backlog option for tcp listen pcb.
+ */
+#define TCP_LISTEN_BACKLOG              1
+
+
+/**
+ * TCP_OVERSIZE: The maximum number of bytes that tcp_write may
+ * allocate ahead of time
+ */
+#ifdef CONFIG_LWIP_TCP_OVERSIZE_MSS
+#define TCP_OVERSIZE                    TCP_MSS
+#endif
+#ifdef CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS
+#define TCP_OVERSIZE                    (TCP_MSS/4)
+#endif
+#ifdef CONFIG_LWIP_TCP_OVERSIZE_DISABLE
+#define TCP_OVERSIZE                    0
+#endif
+#ifndef TCP_OVERSIZE
+#error "One of CONFIG_TCP_OVERSIZE_xxx options should be set by sdkconfig"
+#endif
+
+/**
+ * LWIP_WND_SCALE and TCP_RCV_SCALE:
+ * Set LWIP_WND_SCALE to 1 to enable window scaling.
+ * Set TCP_RCV_SCALE to the desired scaling factor (shift count in the
+ * range of [0..14]).
+ * When LWIP_WND_SCALE is enabled but TCP_RCV_SCALE is 0, we can use a large
+ * send window while having a small receive window only.
+ */
+#ifdef CONFIG_LWIP_WND_SCALE
+#define LWIP_WND_SCALE                  1
+#define TCP_RCV_SCALE                   CONFIG_LWIP_TCP_RCV_SCALE
+#endif
+
+/**
+ * LWIP_TCP_RTO_TIME: TCP rto time.
+ * Default is 3 second.
+ */
+#define LWIP_TCP_RTO_TIME             CONFIG_LWIP_TCP_RTO_TIME
+
+/*
+   ----------------------------------
+   ---------- Pbuf options ----------
+   ----------------------------------
+*/
+
+/*
+   ------------------------------------------------
+   ---------- Network Interfaces options ----------
+   ------------------------------------------------
+*/
+
+/**
+ * LWIP_NETIF_HOSTNAME==1: use DHCP_OPTION_HOSTNAME with netif's hostname
+ * field.
+ */
+#define LWIP_NETIF_HOSTNAME             1
+
+/**
+ * LWIP_NETIF_TX_SINGLE_PBUF: if this is set to 1, lwIP tries to put all data
+ * to be sent into one single pbuf. This is for compatibility with DMA-enabled
+ * MACs that do not support scatter-gather.
+ * Beware that this might involve CPU-memcpy before transmitting that would not
+ * be needed without this flag! Use this only if you need to!
+ *
+ * @todo: TCP and IP-frag do not work with this, yet:
+ */
+#define LWIP_NETIF_TX_SINGLE_PBUF             1
+
+/**
+ * LWIP_NETIF_API==1: Enable usage of standard POSIX APIs in LWIP.
+ */
+#define LWIP_NETIF_API                      CONFIG_LWIP_NETIF_API
+
+#define LWIP_NETIF_STATUS_CALLBACK      CONFIG_LWIP_NETIF_STATUS_CALLBACK
+
+/*
+   ------------------------------------
+   ---------- LOOPIF options ----------
+   ------------------------------------
+*/
+#ifdef CONFIG_LWIP_NETIF_LOOPBACK
+/**
+ * LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP
+ * address equal to the netif IP address, looping them back up the stack.
+ */
+#define LWIP_NETIF_LOOPBACK             1
+
+/**
+ * LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback
+ * sending for each netif (0 = disabled)
+ */
+#define LWIP_LOOPBACK_MAX_PBUFS         CONFIG_LWIP_LOOPBACK_MAX_PBUFS
+#endif
+
+/*
+   ------------------------------------
+   ---------- SLIPIF options ----------
+   ------------------------------------
+*/
+
+#ifdef CONFIG_LWIP_SLIP_SUPPORT
+
+/**
+ * Enable SLIP receive from ISR functions and disable Rx thread
+ *
+ * This is the only supported mode of lwIP SLIP interface, so that
+ * - incoming packets are queued into pbufs
+ * - no thread is created from lwIP
+ * meaning it is the application responsibility to read data
+ * from IO driver and feed them to the slip interface
+ */
+#define SLIP_RX_FROM_ISR                 1
+#define SLIP_USE_RX_THREAD               0
+
+/**
+ * PPP_DEBUG: Enable debugging for PPP.
+ */
+#define SLIP_DEBUG_ON                    CONFIG_LWIP_SLIP_DEBUG_ON
+
+#if SLIP_DEBUG_ON
+#define SLIP_DEBUG                       LWIP_DBG_ON
+#else
+#define SLIP_DEBUG                       LWIP_DBG_OFF
+#endif
+
+
+#endif
+
+/*
+   ------------------------------------
+   ---------- Thread options ----------
+   ------------------------------------
+*/
+/**
+ * TCPIP_THREAD_NAME: The name assigned to the main tcpip thread.
+ */
+#define TCPIP_THREAD_NAME              "tiT"
+
+/**
+ * TCPIP_THREAD_STACKSIZE: The stack size used by the main tcpip thread.
+ * The stack size value itself is platform-dependent, but is passed to
+ * sys_thread_new() when the thread is created.
+ */
+#define TCPIP_THREAD_STACKSIZE          ESP_TASK_TCPIP_STACK
+
+/**
+ * TCPIP_THREAD_PRIO: The priority assigned to the main tcpip thread.
+ * The priority value itself is platform-dependent, but is passed to
+ * sys_thread_new() when the thread is created.
+ */
+#define TCPIP_THREAD_PRIO               ESP_TASK_TCPIP_PRIO
+
+/**
+ * TCPIP_MBOX_SIZE: The mailbox size for the tcpip thread messages
+ * The queue size value itself is platform-dependent, but is passed to
+ * sys_mbox_new() when tcpip_init is called.
+ */
+#define TCPIP_MBOX_SIZE                 CONFIG_LWIP_TCPIP_RECVMBOX_SIZE
+
+/**
+ * DEFAULT_UDP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a
+ * NETCONN_UDP. The queue size value itself is platform-dependent, but is passed
+ * to sys_mbox_new() when the recvmbox is created.
+ */
+#define DEFAULT_UDP_RECVMBOX_SIZE       CONFIG_LWIP_UDP_RECVMBOX_SIZE
+
+/**
+ * DEFAULT_TCP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a
+ * NETCONN_TCP. The queue size value itself is platform-dependent, but is passed
+ * to sys_mbox_new() when the recvmbox is created.
+ */
+#define DEFAULT_TCP_RECVMBOX_SIZE       CONFIG_LWIP_TCP_RECVMBOX_SIZE
+
+/**
+ * DEFAULT_ACCEPTMBOX_SIZE: The mailbox size for the incoming connections.
+ * The queue size value itself is platform-dependent, but is passed to
+ * sys_mbox_new() when the acceptmbox is created.
+ */
+#define DEFAULT_ACCEPTMBOX_SIZE         6
+
+/**
+ * DEFAULT_THREAD_STACKSIZE: The stack size used by any other lwIP thread.
+ * The stack size value itself is platform-dependent, but is passed to
+ * sys_thread_new() when the thread is created.
+ */
+#define DEFAULT_THREAD_STACKSIZE        TCPIP_THREAD_STACKSIZE
+
+/**
+ * DEFAULT_THREAD_PRIO: The priority assigned to any other lwIP thread.
+ * The priority value itself is platform-dependent, but is passed to
+ * sys_thread_new() when the thread is created.
+ */
+#define DEFAULT_THREAD_PRIO             TCPIP_THREAD_PRIO
+
+/**
+ * DEFAULT_RAW_RECVMBOX_SIZE: The mailbox size for the incoming packets on a
+ * NETCONN_RAW. The queue size value itself is platform-dependent, but is passed
+ * to sys_mbox_new() when the recvmbox is created.
+ */
+#define DEFAULT_RAW_RECVMBOX_SIZE       6
+
+/*
+   ----------------------------------------------
+   ---------- Sequential layer options ----------
+   ----------------------------------------------
+*/
+/**
+ * LWIP_TCPIP_CORE_LOCKING: (EXPERIMENTAL!)
+ * Don't use it if you're not an active lwIP project member
+ */
+#define LWIP_TCPIP_CORE_LOCKING         CONFIG_LWIP_TCPIP_CORE_LOCKING
+
+/*
+   ------------------------------------
+   ---------- Socket options ----------
+   ------------------------------------
+*/
+/**
+ * LWIP_SO_SNDTIMEO==1: Enable send timeout for sockets/netconns and
+ * SO_SNDTIMEO processing.
+ */
+#define LWIP_SO_SNDTIMEO                1
+
+/**
+ * LWIP_SO_RCVTIMEO==1: Enable receive timeout for sockets/netconns and
+ * SO_RCVTIMEO processing.
+ */
+#define LWIP_SO_RCVTIMEO                1
+
+/**
+ * LWIP_TCP_KEEPALIVE==1: Enable TCP_KEEPIDLE, TCP_KEEPINTVL and TCP_KEEPCNT
+ * options processing. Note that TCP_KEEPIDLE and TCP_KEEPINTVL have to be set
+ * in seconds. (does not require sockets.c, and will affect tcp.c)
+ */
+#define LWIP_TCP_KEEPALIVE              1
+
+/**
+ * LWIP_SO_LINGER==1: Enable SO_LINGER processing.
+ */
+#define LWIP_SO_LINGER                  CONFIG_LWIP_SO_LINGER
+
+/**
+ * LWIP_SO_RCVBUF==1: Enable SO_RCVBUF processing.
+ */
+#define LWIP_SO_RCVBUF                  CONFIG_LWIP_SO_RCVBUF
+
+/**
+ * SO_REUSE==1: Enable SO_REUSEADDR option.
+ * This option is set via menuconfig.
+ */
+#define SO_REUSE                        CONFIG_LWIP_SO_REUSE
+
+
+/**
+ * LWIP_DNS_SUPPORT_MDNS_QUERIES==1: Enable mDNS queries in hostname resolution.
+ * This option is set via menuconfig.
+ */
+#define LWIP_DNS_SUPPORT_MDNS_QUERIES   CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES
+/**
+ * SO_REUSE_RXTOALL==1: Pass a copy of incoming broadcast/multicast packets
+ * to all local matches if SO_REUSEADDR is turned on.
+ * WARNING: Adds a memcpy for every packet if passing to more than one pcb!
+ */
+#define SO_REUSE_RXTOALL                CONFIG_LWIP_SO_REUSE_RXTOALL
+
+/**
+ * LWIP_NETBUF_RECVINFO==1: Enable IP_PKTINFO option.
+ * This option is set via menuconfig.
+ */
+#define LWIP_NETBUF_RECVINFO            CONFIG_LWIP_NETBUF_RECVINFO
+
+/*
+   ----------------------------------------
+   ---------- Statistics options ----------
+   ----------------------------------------
+*/
+
+/**
+ * LWIP_STATS==1: Enable statistics collection in lwip_stats.
+ */
+#define LWIP_STATS                      CONFIG_LWIP_STATS
+
+#if LWIP_STATS
+
+/**
+ * LWIP_STATS_DISPLAY==1: Compile in the statistics output functions.
+ */
+#define LWIP_STATS_DISPLAY              CONFIG_LWIP_STATS
+#endif
+
+
+/*
+   ---------------------------------
+   ---------- PPP options ----------
+   ---------------------------------
+*/
+
+/**
+ * PPP_SUPPORT==1: Enable PPP.
+ */
+#define PPP_SUPPORT                     CONFIG_LWIP_PPP_SUPPORT
+
+#if PPP_SUPPORT
+
+/**
+ * PPP_IPV6_SUPPORT == 1: Enable IPV6 support for local link
+ * between modem and lwIP stack.
+ * Some modems do not support IPV6 addressing in local link and
+ * the only option available is to disable IPV6 address negotiation.
+ */
+#define PPP_IPV6_SUPPORT                               CONFIG_LWIP_PPP_ENABLE_IPV6
+
+/**
+ * PPP_NOTIFY_PHASE==1: Support PPP notify phase.
+ */
+#define PPP_NOTIFY_PHASE                CONFIG_LWIP_PPP_NOTIFY_PHASE_SUPPORT
+
+/**
+ * PAP_SUPPORT==1: Support PAP.
+ */
+#define PAP_SUPPORT                     CONFIG_LWIP_PPP_PAP_SUPPORT
+
+/**
+ * CHAP_SUPPORT==1: Support CHAP.
+ */
+#define CHAP_SUPPORT                    CONFIG_LWIP_PPP_CHAP_SUPPORT
+
+/**
+ * MSCHAP_SUPPORT==1: Support MSCHAP.
+ */
+#define MSCHAP_SUPPORT                  CONFIG_LWIP_PPP_MSCHAP_SUPPORT
+
+/**
+ * CCP_SUPPORT==1: Support CCP.
+ */
+#define MPPE_SUPPORT                    CONFIG_LWIP_PPP_MPPE_SUPPORT
+
+/**
+ * PPP_MAXIDLEFLAG: Max Xmit idle time (in ms) before resend flag char.
+ * TODO: If PPP_MAXIDLEFLAG > 0 and next package is send during PPP_MAXIDLEFLAG time,
+ *       then 0x7E is not added at the begining of PPP package but 0x7E termination
+ *       is always at the end. This behaviour brokes PPP dial with GSM (PPPoS).
+ *       The PPP package should always start and end with 0x7E.
+ */
+
+#define PPP_MAXIDLEFLAG                 0
+
+/**
+ * PPP_DEBUG: Enable debugging for PPP.
+ */
+#define PPP_DEBUG_ON                    CONFIG_LWIP_PPP_DEBUG_ON
+
+#if PPP_DEBUG_ON
+#define PPP_DEBUG                       LWIP_DBG_ON
+#define PRINTPKT_SUPPORT                1
+#define PPP_PROTOCOLNAME                1
+#else
+#define PPP_DEBUG                       LWIP_DBG_OFF
+#endif
+
+#endif  /* PPP SUPPORT */
+
+/*
+   ------------------------------------
+   --------- LCP Echo options ---------
+   ------------------------------------
+*/
+#if CONFIG_LWIP_ENABLE_LCP_ECHO
+/**
+ * LCP_ECHOINTERVAL: Interval in seconds between keepalive LCP echo requests, 0 to disable.
+ */
+#define LCP_ECHOINTERVAL                CONFIG_LWIP_LCP_ECHOINTERVAL
+
+/**
+ * LCP_MAXECHOFAILS: Number of consecutive unanswered echo requests before failure is indicated.
+ */
+#define LCP_MAXECHOFAILS                CONFIG_LWIP_LCP_MAXECHOFAILS
+#endif /* CONFIG_LWIP_ENABLE_LCP_ECHO */
+
+/*
+   --------------------------------------
+   ---------- Checksum options ----------
+   --------------------------------------
+*/
+
+/*
+   ---------------------------------------
+   ---------- IPv6 options ---------------
+   ---------------------------------------
+*/
+/**
+ * LWIP_IPV6==1: Enable IPv6
+ */
+#define LWIP_IPV6                       CONFIG_LWIP_IPV6
+
+/**
+ * MEMP_NUM_ND6_QUEUE: Max number of IPv6 packets to queue during MAC resolution.
+ */
+#define MEMP_NUM_ND6_QUEUE              CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE
+
+/**
+ * LWIP_ND6_NUM_NEIGHBORS: Number of entries in IPv6 neighbor cache
+ */
+#define LWIP_ND6_NUM_NEIGHBORS          CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS
+
+/*
+   ---------------------------------------
+   ---------- Hook options ---------------
+   ---------------------------------------
+*/
+#ifdef LWIP_HOOK_FILENAME
+#warning LWIP_HOOK_FILENAME is used for IDF default hooks. Please use ESP_IDF_LWIP_HOOK_FILENAME to insert additional hook
+#endif
+#define LWIP_HOOK_FILENAME              "lwip_default_hooks.h"
+#define LWIP_HOOK_IP4_ROUTE_SRC         ip4_route_src_hook
+
+/*
+   ---------------------------------------
+   ---------- Debugging options ----------
+   ---------------------------------------
+*/
+/**
+ * ETHARP_DEBUG: Enable debugging in etharp.c.
+ */
+#ifdef CONFIG_LWIP_ETHARP_DEBUG
+#define ETHARP_DEBUG                     LWIP_DBG_ON
+#else
+#define ETHARP_DEBUG                     LWIP_DBG_OFF
+#endif
+
+
+/**
+ * NETIF_DEBUG: Enable debugging in netif.c.
+ */
+#ifdef CONFIG_LWIP_NETIF_DEBUG
+#define NETIF_DEBUG                     LWIP_DBG_ON
+#else
+#define NETIF_DEBUG                     LWIP_DBG_OFF
+#endif
+
+/**
+ * PBUF_DEBUG: Enable debugging in pbuf.c.
+ */
+#ifdef CONFIG_LWIP_PBUF_DEBUG
+#define PBUF_DEBUG                     LWIP_DBG_ON
+#else
+#define PBUF_DEBUG                     LWIP_DBG_OFF
+#endif
+
+/**
+ * API_LIB_DEBUG: Enable debugging in api_lib.c.
+ */
+#ifdef CONFIG_LWIP_API_LIB_DEBUG
+#define API_LIB_DEBUG                     LWIP_DBG_ON
+#else
+#define API_LIB_DEBUG                     LWIP_DBG_OFF
+#endif
+
+
+/**
+ * SOCKETS_DEBUG: Enable debugging in sockets.c.
+ */
+#ifdef CONFIG_LWIP_SOCKETS_DEBUG
+#define SOCKETS_DEBUG                   LWIP_DBG_ON
+#else
+#define SOCKETS_DEBUG                   LWIP_DBG_OFF
+#endif
+
+/**
+ * ICMP_DEBUG: Enable debugging in icmp.c.
+ */
+#ifdef CONFIG_LWIP_ICMP_DEBUG
+#define ICMP_DEBUG                      LWIP_DBG_ON
+#else
+#define ICMP_DEBUG                      LWIP_DBG_OFF
+#endif
+
+#ifdef CONFIG_LWIP_ICMP6_DEBUG
+#define ICMP6_DEBUG                      LWIP_DBG_ON
+#else
+#define ICMP6_DEBUG                      LWIP_DBG_OFF
+#endif
+
+/**
+ * DHCP_DEBUG: Enable debugging in dhcp.c.
+ */
+#ifdef CONFIG_LWIP_DHCP_DEBUG
+#define DHCP_DEBUG                      LWIP_DBG_ON
+#else
+#define DHCP_DEBUG                      LWIP_DBG_OFF
+#endif
+
+#ifdef CONFIG_LWIP_DHCP_STATE_DEBUG
+#define ESP_DHCP_DEBUG                  LWIP_DBG_ON
+#else
+#define ESP_DHCP_DEBUG                  LWIP_DBG_OFF
+#endif
+
+/**
+ * IP_DEBUG: Enable debugging for IP.
+ */
+#ifdef CONFIG_LWIP_IP_DEBUG
+#define IP_DEBUG                        LWIP_DBG_ON
+#else
+#define IP_DEBUG                        LWIP_DBG_OFF
+#endif
+
+/**
+ * IP6_DEBUG: Enable debugging for IP6.
+ */
+#ifdef CONFIG_LWIP_IP6_DEBUG
+#define IP6_DEBUG                        LWIP_DBG_ON
+#else
+#define IP6_DEBUG                        LWIP_DBG_OFF
+#endif
+
+/**
+ * TCP_DEBUG: Enable debugging for TCP.
+ */
+#ifdef CONFIG_LWIP_TCP_DEBUG
+#define TCP_DEBUG                        LWIP_DBG_ON
+#else
+#define TCP_DEBUG                        LWIP_DBG_OFF
+#endif
+
+/**
+ * SNTP_DEBUG: Enable debugging for SNTP.
+ */
+#ifdef CONFIG_LWIP_SNTP_DEBUG
+#define SNTP_DEBUG                       LWIP_DBG_ON
+#else
+#define SNTP_DEBUG                       LWIP_DBG_OFF
+#endif
+
+/**
+ * MEMP_DEBUG: Enable debugging in memp.c.
+ */
+#define MEMP_DEBUG                      LWIP_DBG_OFF
+
+/**
+ * TCP_INPUT_DEBUG: Enable debugging in tcp_in.c for incoming debug.
+ */
+#define TCP_INPUT_DEBUG                 LWIP_DBG_OFF
+
+/**
+ * TCP_OUTPUT_DEBUG: Enable debugging in tcp_out.c output functions.
+ */
+#define TCP_OUTPUT_DEBUG                LWIP_DBG_OFF
+
+/**
+ * TCPIP_DEBUG: Enable debugging in tcpip.c.
+ */
+#define TCPIP_DEBUG                     LWIP_DBG_OFF
+
+/**
+ * TCP_OOSEQ_DEBUG: Enable debugging in tcpin.c for OOSEQ.
+ */
+#define TCP_OOSEQ_DEBUG                 LWIP_DBG_OFF
+
+/**
+ * ETHARP_TRUST_IP_MAC==1: Incoming IP packets cause the ARP table to be
+ * updated with the source MAC and IP addresses supplied in the packet.
+ * You may want to disable this if you do not trust LAN peers to have the
+ * correct addresses, or as a limited approach to attempt to handle
+ * spoofing. If disabled, lwIP will need to make a new ARP request if
+ * the peer is not already in the ARP table, adding a little latency.
+ * The peer *is* in the ARP table if it requested our address before.
+ * Also notice that this slows down input processing of every IP packet!
+ */
+#define ETHARP_TRUST_IP_MAC             CONFIG_LWIP_ETHARP_TRUST_IP_MAC
+
+
+/**
+ * POSIX I/O functions are mapped to LWIP via the VFS layer
+ * (see port/vfs_lwip.c)
+ */
+#define LWIP_POSIX_SOCKETS_IO_NAMES     0
+
+/**
+ * FD_SETSIZE from sys/types.h is the maximum number of supported file
+ * descriptors and CONFIG_LWIP_MAX_SOCKETS defines the number of sockets;
+ * LWIP_SOCKET_OFFSET is configured to use the largest numbers of file
+ * descriptors for sockets. File descriptors from 0 to LWIP_SOCKET_OFFSET-1
+ * are non-socket descriptors and from LWIP_SOCKET_OFFSET to FD_SETSIZE are
+ * socket descriptors.
+ */
+#define LWIP_SOCKET_OFFSET              (FD_SETSIZE - CONFIG_LWIP_MAX_SOCKETS)
+
+#define LWIP_IPV6_FORWARD               CONFIG_LWIP_IPV6_FORWARD
+
+#define LWIP_IPV6_NUM_ADDRESSES         CONFIG_LWIP_IPV6_NUM_ADDRESSES
+
+#define LWIP_ND6_RDNSS_MAX_DNS_SERVERS  CONFIG_LWIP_IPV6_RDNSS_MAX_DNS_SERVERS
+
+#define LWIP_IPV6_DHCP6                 CONFIG_LWIP_IPV6_DHCP6
+
+/* Enable all Espressif-only options */
+
+#define ESP_LWIP                        1
+#define ESP_LWIP_ARP                    1
+#define ESP_PER_SOC_TCP_WND             0
+#define ESP_THREAD_SAFE                 1
+#define ESP_THREAD_SAFE_DEBUG           LWIP_DBG_OFF
+#define ESP_DHCP                        1
+#define ESP_DNS                         1
+#define ESP_PERF                        0
+#define ESP_RANDOM_TCP_PORT             1
+#define ESP_IP4_ATON                    1
+#define ESP_LIGHT_SLEEP                 1
+#define ESP_L2_TO_L3_COPY               CONFIG_LWIP_L2_TO_L3_COPY
+#define LWIP_NETIF_API                  CONFIG_LWIP_NETIF_API
+#define ESP_STATS_MEM                   CONFIG_LWIP_STATS
+#define ESP_STATS_DROP                  CONFIG_LWIP_STATS
+#define ESP_STATS_TCP                   0
+#ifdef CONFIG_LWIP_DHCPS
+#define ESP_DHCPS                       1
+#define ESP_DHCPS_TIMER                 1
+#else
+#define ESP_DHCPS                       0
+#define ESP_DHCPS_TIMER                 0
+#endif /* CONFIG_LWIP_DHCPS */
+#define ESP_LWIP_LOGI(...)              ESP_LOGI("lwip", __VA_ARGS__)
+#define ESP_PING                        1
+#define ESP_HAS_SELECT                  1
+#define ESP_AUTO_RECV                   1
+#define ESP_GRATUITOUS_ARP              CONFIG_LWIP_ESP_GRATUITOUS_ARP
+#define ESP_IP4_ROUTE                   1
+#define ESP_AUTO_IP                     1
+#define ESP_PBUF                        1
+#define ESP_PPP                         1
+#define ESP_IPV6                        LWIP_IPV6
+#define ESP_SOCKET                      1
+#define ESP_LWIP_SELECT                 1
+#define ESP_LWIP_LOCK                   1
+#define ESP_THREAD_PROTECTION           1
+
+#ifdef CONFIG_LWIP_IPV6_AUTOCONFIG
+#define ESP_IPV6_AUTOCONFIG             CONFIG_LWIP_IPV6_AUTOCONFIG
+#endif
+
+#ifdef ESP_IRAM_ATTR
+#undef ESP_IRAM_ATTR
+#endif
+#define ESP_IRAM_ATTR
+
+#ifdef CONFIG_LWIP_TIMERS_ONDEMAND
+#define ESP_LWIP_IGMP_TIMERS_ONDEMAND            1
+#define ESP_LWIP_MLD6_TIMERS_ONDEMAND            1
+#else
+#define ESP_LWIP_IGMP_TIMERS_ONDEMAND            0
+#define ESP_LWIP_MLD6_TIMERS_ONDEMAND            0
+#endif
+
+#define TCP_SND_BUF                     CONFIG_LWIP_TCP_SND_BUF_DEFAULT
+#define TCP_WND                         CONFIG_LWIP_TCP_WND_DEFAULT
+
+/**
+ * LWIP_DEBUG: Enable lwip debugging in other modules.
+ */
+#ifdef CONFIG_LWIP_DEBUG
+#define LWIP_DEBUG                      LWIP_DBG_ON
+#else
+#undef LWIP_DEBUG
+#endif
+
+#define CHECKSUM_CHECK_UDP              CONFIG_LWIP_CHECKSUM_CHECK_UDP
+#define CHECKSUM_CHECK_IP               CONFIG_LWIP_CHECKSUM_CHECK_IP
+#define CHECKSUM_CHECK_ICMP             CONFIG_LWIP_CHECKSUM_CHECK_ICMP
+
+#define LWIP_NETCONN_FULLDUPLEX         1
+#if LWIP_TCPIP_CORE_LOCKING
+#define LWIP_NETCONN_SEM_PER_THREAD     0
+#else
+#define LWIP_NETCONN_SEM_PER_THREAD     1
+#endif /* LWIP_TCPIP_CORE_LOCKING */
+
+#define LWIP_DHCP_MAX_NTP_SERVERS       CONFIG_LWIP_DHCP_MAX_NTP_SERVERS
+#define LWIP_TIMEVAL_PRIVATE            0
+
+/*
+   --------------------------------------
+   ------------ SNTP options ------------
+   --------------------------------------
+*/
+
+// Max number of SNTP servers handled (default equal to LWIP_DHCP_MAX_NTP_SERVERS)
+#if defined CONFIG_LWIP_SNTP_MAX_SERVERS
+#define SNTP_MAX_SERVERS                CONFIG_LWIP_SNTP_MAX_SERVERS
+#endif // CONFIG_LWIP_SNTP_MAX_SERVERS
+
+#ifdef CONFIG_LWIP_DHCP_GET_NTP_SRV
+#define LWIP_DHCP_GET_NTP_SRV           CONFIG_LWIP_DHCP_GET_NTP_SRV
+#endif // CONFIG_LWIP_DHCP_GET_NTP_SRV
+
+/** Set this to 1 to support DNS names (or IP address strings) to set sntp servers
+ * One server address/name can be defined as default if SNTP_SERVER_DNS == 1:
+ * \#define SNTP_SERVER_ADDRESS "pool.ntp.org"
+ */
+#define SNTP_SERVER_DNS            1
+
+// It disables a check of SNTP_UPDATE_DELAY it is done in sntp_set_sync_interval
+#define SNTP_SUPPRESS_DELAY_CHECK
+
+#define SNTP_UPDATE_DELAY                 (sntp_get_sync_interval())
+#define SNTP_SET_SYSTEM_TIME_US(sec, us)  (sntp_set_system_time(sec, us))
+#define SNTP_GET_SYSTEM_TIME(sec, us)     (sntp_get_system_time(&(sec), &(us)))
+
+#define SOC_SEND_LOG //printf
+
+#endif /* __LWIPOPTS_H__ */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/netdb.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netdb.h
new file mode 100644
index 00000000000..3054fdca268
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netdb.h
@@ -0,0 +1,48 @@
+/**
+ * @file
+ * This file is a posix wrapper for lwip/netdb.h.
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#include "lwip/netdb.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef ESP_PLATFORM
+int getnameinfo(const struct sockaddr *addr, socklen_t addrlen,
+                char *host, socklen_t hostlen,
+                char *serv, socklen_t servlen, int flags);
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/dhcp_state.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/dhcp_state.h
new file mode 100644
index 00000000000..44e5d4a308b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/dhcp_state.h
@@ -0,0 +1,33 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _DHCP_STATE_H_
+#define _DHCP_STATE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+bool dhcp_ip_addr_restore(void *netif);
+
+void dhcp_ip_addr_store(void *netif);
+
+void dhcp_ip_addr_erase(void *esp_netif);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*  _DHCP_STATE_H_ */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/ethernetif.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/ethernetif.h
new file mode 100644
index 00000000000..406674c48e2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/ethernetif.h
@@ -0,0 +1,35 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _ETH_LWIP_IF_H_
+#define _ETH_LWIP_IF_H_
+
+#include "lwip/err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+err_t ethernetif_init(struct netif *netif);
+
+void ethernetif_input(void *netif, void *buffer, size_t len, void *eb);
+
+void netif_reg_addr_change_cb(void* cb);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*  _ETH_LWIP_IF_H_ */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/openthreadif.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/openthreadif.h
new file mode 100644
index 00000000000..066e973ad24
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/openthreadif.h
@@ -0,0 +1,52 @@
+// Copyright 2021 Espressif Systems (Shanghai) CO LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+
+#ifndef _OPENTHREAD_LWIP_IF_H_
+#define _OPENTHREAD_LWIP_IF_H_
+
+#include "lwip/netif.h"
+#include "lwip/err.h"
+#include "lwip/ip6.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief This function initializes the OpenThread lwIP network interface.
+ *
+ * @param[in] netif     The lwIP interface to initialize
+ *
+ * @return
+ *      - ERR_OK
+ *
+ */
+err_t openthread_netif_init(struct netif *netif);
+
+/**
+ * @brief This function sends the buffer to the lwIP network interface
+ *
+ * @param[in] netif     The lwIP interface to send to.
+ * @param[in] buffer    The packet to send.
+ * @param[in] len       The length of the buffer.
+ * @param[in] eb        Unused.
+ *
+ */
+void openthread_netif_input(void *netif, void *buffer, size_t len, void *eb);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _OPENTHREAD_LWIP_IF_H_ */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/wlanif.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/wlanif.h
new file mode 100644
index 00000000000..4535b6cb51c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netif/wlanif.h
@@ -0,0 +1,41 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _WLAN_LWIP_IF_H_
+#define _WLAN_LWIP_IF_H_
+
+#include "esp_wifi.h"
+
+#include "lwip/err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+err_t wlanif_init_ap(struct netif *netif);
+err_t wlanif_init_sta(struct netif *netif);
+
+void wlanif_input(void *netif, void *buffer, size_t len, void* eb);
+err_t wlanif_init(struct netif *netif);
+
+wifi_interface_t wifi_get_interface(void *dev);
+
+void netif_reg_addr_change_cb(void* cb);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*  _WLAN_LWIP_IF_H_ */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/netinet/in.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netinet/in.h
new file mode 100644
index 00000000000..7eaec63342f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netinet/in.h
@@ -0,0 +1,22 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef IN_H_
+#define IN_H_
+
+#include "lwip/inet.h"
+
+#define IN6_IS_ADDR_MULTICAST(a)    IN_MULTICAST(a)
+
+#endif /* IN_H_ */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/netinet/tcp.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netinet/tcp.h
new file mode 100644
index 00000000000..a4d4d976996
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/netinet/tcp.h
@@ -0,0 +1,21 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+// Copyright 2020 Francesco Giancane <francesco.giancane@accenture.com>
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _NETINET_TCP_H
+#define _NETINET_TCP_H
+
+#include "lwip/tcp.h"
+
+#endif /* _NETINET_TCP_H  */
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/sntp/sntp_get_set_time.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/sntp/sntp_get_set_time.h
new file mode 100644
index 00000000000..19916208044
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/sntp/sntp_get_set_time.h
@@ -0,0 +1,55 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __SNTP_GET_SET_TIME_H__
+#define __SNTP_GET_SET_TIME_H__
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/*
+ * Declarations of functions used in lwipopts.h to redefine
+ * default sntp macros, such as:
+ * - SNTP_UPDATE_DELAY()
+ * - SNTP_SET_SYSTEM_TIME_US()
+ * - SNTP_GET_SYSTEM_TIME()
+ */
+
+/*
+ * @brief Get the sync interval of SNTP operation
+ * Full definition is provided in IDF's layer in esp_sntp.c
+ */
+uint32_t sntp_get_sync_interval(void);
+
+/**
+ * @brief system time setter used in the sntp module
+ * @note The lwip sntp uses u32_t types for sec and us arguments
+ */
+void sntp_set_system_time(uint32_t sec, uint32_t us);
+
+/**
+ * @brief system time getter used in the sntp module
+ * @note The lwip sntp uses u32_t types for sec and us arguments
+ */
+void sntp_get_system_time(uint32_t* sec, uint32_t* us);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //__SNTP_GET_SET_TIME_H__
diff --git a/tools/sdk/esp32s3/include/lwip/port/esp32/include/sys/socket.h b/tools/sdk/esp32s3/include/lwip/port/esp32/include/sys/socket.h
new file mode 100644
index 00000000000..5ea4db4ab84
--- /dev/null
+++ b/tools/sdk/esp32s3/include/lwip/port/esp32/include/sys/socket.h
@@ -0,0 +1,38 @@
+/**
+ * @file
+ * This file is a posix wrapper for lwip/sockets.h.
+ */
+
+/*
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ */
+
+#include "lwip/sockets.h"
+/*
+	SOMAXCONN is expected to be found in this header too,
+	while for ESP32 port is defined in net/if.h
+*/
+#include <net/if.h>
diff --git a/tools/sdk/esp32s3/include/mbedtls/esp_crt_bundle/include/esp_crt_bundle.h b/tools/sdk/esp32s3/include/mbedtls/esp_crt_bundle/include/esp_crt_bundle.h
new file mode 100644
index 00000000000..33fb98b9969
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/esp_crt_bundle/include/esp_crt_bundle.h
@@ -0,0 +1,68 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _ESP_CRT_BUNDLE_H_
+#define _ESP_CRT_BUNDLE_H_
+
+#include "mbedtls/ssl.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @brief      Attach and enable use of a bundle for certificate verification
+ *
+ * Attach and enable use of a bundle for certificate verification through a verification callback.
+ * If no specific bundle has been set through esp_crt_bundle_set() it will default to the
+ * bundle defined in menuconfig and embedded in the binary.
+ *
+ * @param[in]  conf      The config struct for the SSL connection.
+ *
+ * @return
+ *             - ESP_OK  if adding certificates was successful.
+ *             - Other   if an error occured or an action must be taken by the calling process.
+ */
+esp_err_t esp_crt_bundle_attach(void *conf);
+
+
+/**
+ * @brief      Disable and dealloc the certification bundle
+ *
+ * Removes the certificate verification callback and deallocates used resources
+ *
+ * @param[in]  conf      The config struct for the SSL connection.
+ */
+void esp_crt_bundle_detach(mbedtls_ssl_config *conf);
+
+
+/**
+ * @brief      Set the default certificate bundle used for verification
+ *
+ * Overrides the default certificate bundle. In most use cases the bundle should be
+ * set through menuconfig. The bundle needs to be sorted by subject name since binary search is
+ * used to find certificates.
+ *
+ * @param[in]  x509_bundle     A pointer to the certificate bundle.
+ */
+void esp_crt_bundle_set(const uint8_t *x509_bundle);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ESP_CRT_BUNDLE_H_
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/aes.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/aes.h
new file mode 100644
index 00000000000..e280dbb1c66
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/aes.h
@@ -0,0 +1,689 @@
+/**
+ * \file aes.h
+ *
+ * \brief   This file contains AES definitions and functions.
+ *
+ *          The Advanced Encryption Standard (AES) specifies a FIPS-approved
+ *          cryptographic algorithm that can be used to protect electronic
+ *          data.
+ *
+ *          The AES algorithm is a symmetric block cipher that can
+ *          encrypt and decrypt information. For more information, see
+ *          <em>FIPS Publication 197: Advanced Encryption Standard</em> and
+ *          <em>ISO/IEC 18033-2:2006: Information technology -- Security
+ *          techniques -- Encryption algorithms -- Part 2: Asymmetric
+ *          ciphers</em>.
+ *
+ *          The AES-XTS block mode is standardized by NIST SP 800-38E
+ *          <https://nvlpubs.nist.gov/nistpubs/legacy/sp/nistspecialpublication800-38e.pdf>
+ *          and described in detail by IEEE P1619
+ *          <https://ieeexplore.ieee.org/servlet/opac?punumber=4375278>.
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_AES_H
+#define MBEDTLS_AES_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+#include "mbedtls/platform_util.h"
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* padlock.c and aesni.c rely on these values! */
+#define MBEDTLS_AES_ENCRYPT     1 /**< AES encryption. */
+#define MBEDTLS_AES_DECRYPT     0 /**< AES decryption. */
+
+/* Error codes in range 0x0020-0x0022 */
+/** Invalid key length. */
+#define MBEDTLS_ERR_AES_INVALID_KEY_LENGTH                -0x0020
+/** Invalid data input length. */
+#define MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH              -0x0022
+
+/* Error codes in range 0x0021-0x0025 */
+/** Invalid input data. */
+#define MBEDTLS_ERR_AES_BAD_INPUT_DATA                    -0x0021
+
+/* MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE is deprecated and should not be used. */
+/** Feature not available. For example, an unsupported AES key size. */
+#define MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE               -0x0023
+
+/* MBEDTLS_ERR_AES_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** AES hardware accelerator failed. */
+#define MBEDTLS_ERR_AES_HW_ACCEL_FAILED                   -0x0025
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_AES_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief The AES context-type definition.
+ */
+typedef struct mbedtls_aes_context
+{
+    int nr;                     /*!< The number of rounds. */
+    uint32_t *rk;               /*!< AES round keys. */
+    uint32_t buf[68];           /*!< Unaligned data buffer. This buffer can
+                                     hold 32 extra Bytes, which can be used for
+                                     one of the following purposes:
+                                     <ul><li>Alignment if VIA padlock is
+                                             used.</li>
+                                     <li>Simplifying key expansion in the 256-bit
+                                         case by generating an extra round key.
+                                         </li></ul> */
+}
+mbedtls_aes_context;
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+/**
+ * \brief The AES XTS context-type definition.
+ */
+typedef struct mbedtls_aes_xts_context
+{
+    mbedtls_aes_context crypt; /*!< The AES context to use for AES block
+                                        encryption or decryption. */
+    mbedtls_aes_context tweak; /*!< The AES context used for tweak
+                                        computation. */
+} mbedtls_aes_xts_context;
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
+#else  /* MBEDTLS_AES_ALT */
+#include "aes_alt.h"
+#endif /* MBEDTLS_AES_ALT */
+
+/**
+ * \brief          This function initializes the specified AES context.
+ *
+ *                 It must be the first API called before using
+ *                 the context.
+ *
+ * \param ctx      The AES context to initialize. This must not be \c NULL.
+ */
+void mbedtls_aes_init( mbedtls_aes_context *ctx );
+
+/**
+ * \brief          This function releases and clears the specified AES context.
+ *
+ * \param ctx      The AES context to clear.
+ *                 If this is \c NULL, this function does nothing.
+ *                 Otherwise, the context must have been at least initialized.
+ */
+void mbedtls_aes_free( mbedtls_aes_context *ctx );
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+/**
+ * \brief          This function initializes the specified AES XTS context.
+ *
+ *                 It must be the first API called before using
+ *                 the context.
+ *
+ * \param ctx      The AES XTS context to initialize. This must not be \c NULL.
+ */
+void mbedtls_aes_xts_init( mbedtls_aes_xts_context *ctx );
+
+/**
+ * \brief          This function releases and clears the specified AES XTS context.
+ *
+ * \param ctx      The AES XTS context to clear.
+ *                 If this is \c NULL, this function does nothing.
+ *                 Otherwise, the context must have been at least initialized.
+ */
+void mbedtls_aes_xts_free( mbedtls_aes_xts_context *ctx );
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
+/**
+ * \brief          This function sets the encryption key.
+ *
+ * \param ctx      The AES context to which the key should be bound.
+ *                 It must be initialized.
+ * \param key      The encryption key.
+ *                 This must be a readable buffer of size \p keybits bits.
+ * \param keybits  The size of data passed in bits. Valid options are:
+ *                 <ul><li>128 bits</li>
+ *                 <li>192 bits</li>
+ *                 <li>256 bits</li></ul>
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key,
+                    unsigned int keybits );
+
+/**
+ * \brief          This function sets the decryption key.
+ *
+ * \param ctx      The AES context to which the key should be bound.
+ *                 It must be initialized.
+ * \param key      The decryption key.
+ *                 This must be a readable buffer of size \p keybits bits.
+ * \param keybits  The size of data passed. Valid options are:
+ *                 <ul><li>128 bits</li>
+ *                 <li>192 bits</li>
+ *                 <li>256 bits</li></ul>
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key,
+                    unsigned int keybits );
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+/**
+ * \brief          This function prepares an XTS context for encryption and
+ *                 sets the encryption key.
+ *
+ * \param ctx      The AES XTS context to which the key should be bound.
+ *                 It must be initialized.
+ * \param key      The encryption key. This is comprised of the XTS key1
+ *                 concatenated with the XTS key2.
+ *                 This must be a readable buffer of size \p keybits bits.
+ * \param keybits  The size of \p key passed in bits. Valid options are:
+ *                 <ul><li>256 bits (each of key1 and key2 is a 128-bit key)</li>
+ *                 <li>512 bits (each of key1 and key2 is a 256-bit key)</li></ul>
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_aes_xts_setkey_enc( mbedtls_aes_xts_context *ctx,
+                                const unsigned char *key,
+                                unsigned int keybits );
+
+/**
+ * \brief          This function prepares an XTS context for decryption and
+ *                 sets the decryption key.
+ *
+ * \param ctx      The AES XTS context to which the key should be bound.
+ *                 It must be initialized.
+ * \param key      The decryption key. This is comprised of the XTS key1
+ *                 concatenated with the XTS key2.
+ *                 This must be a readable buffer of size \p keybits bits.
+ * \param keybits  The size of \p key passed in bits. Valid options are:
+ *                 <ul><li>256 bits (each of key1 and key2 is a 128-bit key)</li>
+ *                 <li>512 bits (each of key1 and key2 is a 256-bit key)</li></ul>
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_aes_xts_setkey_dec( mbedtls_aes_xts_context *ctx,
+                                const unsigned char *key,
+                                unsigned int keybits );
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
+/**
+ * \brief          This function performs an AES single-block encryption or
+ *                 decryption operation.
+ *
+ *                 It performs the operation defined in the \p mode parameter
+ *                 (encrypt or decrypt), on the input data buffer defined in
+ *                 the \p input parameter.
+ *
+ *                 mbedtls_aes_init(), and either mbedtls_aes_setkey_enc() or
+ *                 mbedtls_aes_setkey_dec() must be called before the first
+ *                 call to this API with the same context.
+ *
+ * \param ctx      The AES context to use for encryption or decryption.
+ *                 It must be initialized and bound to a key.
+ * \param mode     The AES operation: #MBEDTLS_AES_ENCRYPT or
+ *                 #MBEDTLS_AES_DECRYPT.
+ * \param input    The buffer holding the input data.
+ *                 It must be readable and at least \c 16 Bytes long.
+ * \param output   The buffer where the output data will be written.
+ *                 It must be writeable and at least \c 16 Bytes long.
+
+ * \return         \c 0 on success.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx,
+                    int mode,
+                    const unsigned char input[16],
+                    unsigned char output[16] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief  This function performs an AES-CBC encryption or decryption operation
+ *         on full blocks.
+ *
+ *         It performs the operation defined in the \p mode
+ *         parameter (encrypt/decrypt), on the input data buffer defined in
+ *         the \p input parameter.
+ *
+ *         It can be called as many times as needed, until all the input
+ *         data is processed. mbedtls_aes_init(), and either
+ *         mbedtls_aes_setkey_enc() or mbedtls_aes_setkey_dec() must be called
+ *         before the first call to this API with the same context.
+ *
+ * \note   This function operates on full blocks, that is, the input size
+ *         must be a multiple of the AES block size of \c 16 Bytes.
+ *
+ * \note   Upon exit, the content of the IV is updated so that you can
+ *         call the same function again on the next
+ *         block(s) of data and get the same result as if it was
+ *         encrypted in one call. This allows a "streaming" usage.
+ *         If you need to retain the contents of the IV, you should
+ *         either save it manually or use the cipher module instead.
+ *
+ *
+ * \param ctx      The AES context to use for encryption or decryption.
+ *                 It must be initialized and bound to a key.
+ * \param mode     The AES operation: #MBEDTLS_AES_ENCRYPT or
+ *                 #MBEDTLS_AES_DECRYPT.
+ * \param length   The length of the input data in Bytes. This must be a
+ *                 multiple of the block size (\c 16 Bytes).
+ * \param iv       Initialization vector (updated after use).
+ *                 It must be a readable and writeable buffer of \c 16 Bytes.
+ * \param input    The buffer holding the input data.
+ *                 It must be readable and of size \p length Bytes.
+ * \param output   The buffer holding the output data.
+ *                 It must be writeable and of size \p length Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH
+ *                 on failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
+                    int mode,
+                    size_t length,
+                    unsigned char iv[16],
+                    const unsigned char *input,
+                    unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+/**
+ * \brief      This function performs an AES-XTS encryption or decryption
+ *             operation for an entire XTS data unit.
+ *
+ *             AES-XTS encrypts or decrypts blocks based on their location as
+ *             defined by a data unit number. The data unit number must be
+ *             provided by \p data_unit.
+ *
+ *             NIST SP 800-38E limits the maximum size of a data unit to 2^20
+ *             AES blocks. If the data unit is larger than this, this function
+ *             returns #MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH.
+ *
+ * \param ctx          The AES XTS context to use for AES XTS operations.
+ *                     It must be initialized and bound to a key.
+ * \param mode         The AES operation: #MBEDTLS_AES_ENCRYPT or
+ *                     #MBEDTLS_AES_DECRYPT.
+ * \param length       The length of a data unit in Bytes. This can be any
+ *                     length between 16 bytes and 2^24 bytes inclusive
+ *                     (between 1 and 2^20 block cipher blocks).
+ * \param data_unit    The address of the data unit encoded as an array of 16
+ *                     bytes in little-endian format. For disk encryption, this
+ *                     is typically the index of the block device sector that
+ *                     contains the data.
+ * \param input        The buffer holding the input data (which is an entire
+ *                     data unit). This function reads \p length Bytes from \p
+ *                     input.
+ * \param output       The buffer holding the output data (which is an entire
+ *                     data unit). This function writes \p length Bytes to \p
+ *                     output.
+ *
+ * \return             \c 0 on success.
+ * \return             #MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH if \p length is
+ *                     smaller than an AES block in size (16 Bytes) or if \p
+ *                     length is larger than 2^20 blocks (16 MiB).
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx,
+                           int mode,
+                           size_t length,
+                           const unsigned char data_unit[16],
+                           const unsigned char *input,
+                           unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+/**
+ * \brief This function performs an AES-CFB128 encryption or decryption
+ *        operation.
+ *
+ *        It performs the operation defined in the \p mode
+ *        parameter (encrypt or decrypt), on the input data buffer
+ *        defined in the \p input parameter.
+ *
+ *        For CFB, you must set up the context with mbedtls_aes_setkey_enc(),
+ *        regardless of whether you are performing an encryption or decryption
+ *        operation, that is, regardless of the \p mode parameter. This is
+ *        because CFB mode uses the same key schedule for encryption and
+ *        decryption.
+ *
+ * \note  Upon exit, the content of the IV is updated so that you can
+ *        call the same function again on the next
+ *        block(s) of data and get the same result as if it was
+ *        encrypted in one call. This allows a "streaming" usage.
+ *        If you need to retain the contents of the
+ *        IV, you must either save it manually or use the cipher
+ *        module instead.
+ *
+ *
+ * \param ctx      The AES context to use for encryption or decryption.
+ *                 It must be initialized and bound to a key.
+ * \param mode     The AES operation: #MBEDTLS_AES_ENCRYPT or
+ *                 #MBEDTLS_AES_DECRYPT.
+ * \param length   The length of the input data in Bytes.
+ * \param iv_off   The offset in IV (updated after use).
+ *                 It must point to a valid \c size_t.
+ * \param iv       The initialization vector (updated after use).
+ *                 It must be a readable and writeable buffer of \c 16 Bytes.
+ * \param input    The buffer holding the input data.
+ *                 It must be readable and of size \p length Bytes.
+ * \param output   The buffer holding the output data.
+ *                 It must be writeable and of size \p length Bytes.
+ *
+ * \return         \c 0 on success.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx,
+                       int mode,
+                       size_t length,
+                       size_t *iv_off,
+                       unsigned char iv[16],
+                       const unsigned char *input,
+                       unsigned char *output );
+
+/**
+ * \brief This function performs an AES-CFB8 encryption or decryption
+ *        operation.
+ *
+ *        It performs the operation defined in the \p mode
+ *        parameter (encrypt/decrypt), on the input data buffer defined
+ *        in the \p input parameter.
+ *
+ *        Due to the nature of CFB, you must use the same key schedule for
+ *        both encryption and decryption operations. Therefore, you must
+ *        use the context initialized with mbedtls_aes_setkey_enc() for
+ *        both #MBEDTLS_AES_ENCRYPT and #MBEDTLS_AES_DECRYPT.
+ *
+ * \note  Upon exit, the content of the IV is updated so that you can
+ *        call the same function again on the next
+ *        block(s) of data and get the same result as if it was
+ *        encrypted in one call. This allows a "streaming" usage.
+ *        If you need to retain the contents of the
+ *        IV, you should either save it manually or use the cipher
+ *        module instead.
+ *
+ *
+ * \param ctx      The AES context to use for encryption or decryption.
+ *                 It must be initialized and bound to a key.
+ * \param mode     The AES operation: #MBEDTLS_AES_ENCRYPT or
+ *                 #MBEDTLS_AES_DECRYPT
+ * \param length   The length of the input data.
+ * \param iv       The initialization vector (updated after use).
+ *                 It must be a readable and writeable buffer of \c 16 Bytes.
+ * \param input    The buffer holding the input data.
+ *                 It must be readable and of size \p length Bytes.
+ * \param output   The buffer holding the output data.
+ *                 It must be writeable and of size \p length Bytes.
+ *
+ * \return         \c 0 on success.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx,
+                    int mode,
+                    size_t length,
+                    unsigned char iv[16],
+                    const unsigned char *input,
+                    unsigned char *output );
+#endif /*MBEDTLS_CIPHER_MODE_CFB */
+
+#if defined(MBEDTLS_CIPHER_MODE_OFB)
+/**
+ * \brief       This function performs an AES-OFB (Output Feedback Mode)
+ *              encryption or decryption operation.
+ *
+ *              For OFB, you must set up the context with
+ *              mbedtls_aes_setkey_enc(), regardless of whether you are
+ *              performing an encryption or decryption operation. This is
+ *              because OFB mode uses the same key schedule for encryption and
+ *              decryption.
+ *
+ *              The OFB operation is identical for encryption or decryption,
+ *              therefore no operation mode needs to be specified.
+ *
+ * \note        Upon exit, the content of iv, the Initialisation Vector, is
+ *              updated so that you can call the same function again on the next
+ *              block(s) of data and get the same result as if it was encrypted
+ *              in one call. This allows a "streaming" usage, by initialising
+ *              iv_off to 0 before the first call, and preserving its value
+ *              between calls.
+ *
+ *              For non-streaming use, the iv should be initialised on each call
+ *              to a unique value, and iv_off set to 0 on each call.
+ *
+ *              If you need to retain the contents of the initialisation vector,
+ *              you must either save it manually or use the cipher module
+ *              instead.
+ *
+ * \warning     For the OFB mode, the initialisation vector must be unique
+ *              every encryption operation. Reuse of an initialisation vector
+ *              will compromise security.
+ *
+ * \param ctx      The AES context to use for encryption or decryption.
+ *                 It must be initialized and bound to a key.
+ * \param length   The length of the input data.
+ * \param iv_off   The offset in IV (updated after use).
+ *                 It must point to a valid \c size_t.
+ * \param iv       The initialization vector (updated after use).
+ *                 It must be a readable and writeable buffer of \c 16 Bytes.
+ * \param input    The buffer holding the input data.
+ *                 It must be readable and of size \p length Bytes.
+ * \param output   The buffer holding the output data.
+ *                 It must be writeable and of size \p length Bytes.
+ *
+ * \return         \c 0 on success.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx,
+                       size_t length,
+                       size_t *iv_off,
+                       unsigned char iv[16],
+                       const unsigned char *input,
+                       unsigned char *output );
+
+#endif /* MBEDTLS_CIPHER_MODE_OFB */
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+/**
+ * \brief      This function performs an AES-CTR encryption or decryption
+ *             operation.
+ *
+ *             Due to the nature of CTR, you must use the same key schedule
+ *             for both encryption and decryption operations. Therefore, you
+ *             must use the context initialized with mbedtls_aes_setkey_enc()
+ *             for both #MBEDTLS_AES_ENCRYPT and #MBEDTLS_AES_DECRYPT.
+ *
+ * \warning    You must never reuse a nonce value with the same key. Doing so
+ *             would void the encryption for the two messages encrypted with
+ *             the same nonce and key.
+ *
+ *             There are two common strategies for managing nonces with CTR:
+ *
+ *             1. You can handle everything as a single message processed over
+ *             successive calls to this function. In that case, you want to
+ *             set \p nonce_counter and \p nc_off to 0 for the first call, and
+ *             then preserve the values of \p nonce_counter, \p nc_off and \p
+ *             stream_block across calls to this function as they will be
+ *             updated by this function.
+ *
+ *             With this strategy, you must not encrypt more than 2**128
+ *             blocks of data with the same key.
+ *
+ *             2. You can encrypt separate messages by dividing the \p
+ *             nonce_counter buffer in two areas: the first one used for a
+ *             per-message nonce, handled by yourself, and the second one
+ *             updated by this function internally.
+ *
+ *             For example, you might reserve the first 12 bytes for the
+ *             per-message nonce, and the last 4 bytes for internal use. In that
+ *             case, before calling this function on a new message you need to
+ *             set the first 12 bytes of \p nonce_counter to your chosen nonce
+ *             value, the last 4 to 0, and \p nc_off to 0 (which will cause \p
+ *             stream_block to be ignored). That way, you can encrypt at most
+ *             2**96 messages of up to 2**32 blocks each with the same key.
+ *
+ *             The per-message nonce (or information sufficient to reconstruct
+ *             it) needs to be communicated with the ciphertext and must be unique.
+ *             The recommended way to ensure uniqueness is to use a message
+ *             counter. An alternative is to generate random nonces, but this
+ *             limits the number of messages that can be securely encrypted:
+ *             for example, with 96-bit random nonces, you should not encrypt
+ *             more than 2**32 messages with the same key.
+ *
+ *             Note that for both stategies, sizes are measured in blocks and
+ *             that an AES block is 16 bytes.
+ *
+ * \warning    Upon return, \p stream_block contains sensitive data. Its
+ *             content must not be written to insecure storage and should be
+ *             securely discarded as soon as it's no longer needed.
+ *
+ * \param ctx              The AES context to use for encryption or decryption.
+ *                         It must be initialized and bound to a key.
+ * \param length           The length of the input data.
+ * \param nc_off           The offset in the current \p stream_block, for
+ *                         resuming within the current cipher stream. The
+ *                         offset pointer should be 0 at the start of a stream.
+ *                         It must point to a valid \c size_t.
+ * \param nonce_counter    The 128-bit nonce and counter.
+ *                         It must be a readable-writeable buffer of \c 16 Bytes.
+ * \param stream_block     The saved stream block for resuming. This is
+ *                         overwritten by the function.
+ *                         It must be a readable-writeable buffer of \c 16 Bytes.
+ * \param input            The buffer holding the input data.
+ *                         It must be readable and of size \p length Bytes.
+ * \param output           The buffer holding the output data.
+ *                         It must be writeable and of size \p length Bytes.
+ *
+ * \return                 \c 0 on success.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx,
+                       size_t length,
+                       size_t *nc_off,
+                       unsigned char nonce_counter[16],
+                       unsigned char stream_block[16],
+                       const unsigned char *input,
+                       unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CTR */
+
+/**
+ * \brief           Internal AES block encryption function. This is only
+ *                  exposed to allow overriding it using
+ *                  \c MBEDTLS_AES_ENCRYPT_ALT.
+ *
+ * \param ctx       The AES context to use for encryption.
+ * \param input     The plaintext block.
+ * \param output    The output (ciphertext) block.
+ *
+ * \return          \c 0 on success.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx,
+                                  const unsigned char input[16],
+                                  unsigned char output[16] );
+
+/**
+ * \brief           Internal AES block decryption function. This is only
+ *                  exposed to allow overriding it using see
+ *                  \c MBEDTLS_AES_DECRYPT_ALT.
+ *
+ * \param ctx       The AES context to use for decryption.
+ * \param input     The ciphertext block.
+ * \param output    The output (plaintext) block.
+ *
+ * \return          \c 0 on success.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_internal_aes_decrypt( mbedtls_aes_context *ctx,
+                                  const unsigned char input[16],
+                                  unsigned char output[16] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief           Deprecated internal AES block encryption function
+ *                  without return value.
+ *
+ * \deprecated      Superseded by mbedtls_internal_aes_encrypt()
+ *
+ * \param ctx       The AES context to use for encryption.
+ * \param input     Plaintext block.
+ * \param output    Output (ciphertext) block.
+ */
+MBEDTLS_DEPRECATED void mbedtls_aes_encrypt( mbedtls_aes_context *ctx,
+                                             const unsigned char input[16],
+                                             unsigned char output[16] );
+
+/**
+ * \brief           Deprecated internal AES block decryption function
+ *                  without return value.
+ *
+ * \deprecated      Superseded by mbedtls_internal_aes_decrypt()
+ *
+ * \param ctx       The AES context to use for decryption.
+ * \param input     Ciphertext block.
+ * \param output    Output (plaintext) block.
+ */
+MBEDTLS_DEPRECATED void mbedtls_aes_decrypt( mbedtls_aes_context *ctx,
+                                             const unsigned char input[16],
+                                             unsigned char output[16] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief          Checkup routine.
+ *
+ * \return         \c 0 on success.
+ * \return         \c 1 on failure.
+ */
+MBEDTLS_CHECK_RETURN_CRITICAL
+int mbedtls_aes_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* aes.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/aesni.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/aesni.h
new file mode 100644
index 00000000000..c1d22f59af3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/aesni.h
@@ -0,0 +1,136 @@
+/**
+ * \file aesni.h
+ *
+ * \brief AES-NI for hardware AES acceleration on some Intel processors
+ *
+ * \warning These functions are only for internal use by other library
+ *          functions; you must not call them directly.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_AESNI_H
+#define MBEDTLS_AESNI_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/aes.h"
+
+#define MBEDTLS_AESNI_AES      0x02000000u
+#define MBEDTLS_AESNI_CLMUL    0x00000002u
+
+#if defined(MBEDTLS_HAVE_ASM) && defined(__GNUC__) &&  \
+    ( defined(__amd64__) || defined(__x86_64__) )   &&  \
+    ! defined(MBEDTLS_HAVE_X86_64)
+#define MBEDTLS_HAVE_X86_64
+#endif
+
+#if defined(MBEDTLS_HAVE_X86_64)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          Internal function to detect the AES-NI feature in CPUs.
+ *
+ * \note           This function is only for internal use by other library
+ *                 functions; you must not call it directly.
+ *
+ * \param what     The feature to detect
+ *                 (MBEDTLS_AESNI_AES or MBEDTLS_AESNI_CLMUL)
+ *
+ * \return         1 if CPU has support for the feature, 0 otherwise
+ */
+int mbedtls_aesni_has_support( unsigned int what );
+
+/**
+ * \brief          Internal AES-NI AES-ECB block encryption and decryption
+ *
+ * \note           This function is only for internal use by other library
+ *                 functions; you must not call it directly.
+ *
+ * \param ctx      AES context
+ * \param mode     MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
+ * \param input    16-byte input block
+ * \param output   16-byte output block
+ *
+ * \return         0 on success (cannot fail)
+ */
+int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx,
+                             int mode,
+                             const unsigned char input[16],
+                             unsigned char output[16] );
+
+/**
+ * \brief          Internal GCM multiplication: c = a * b in GF(2^128)
+ *
+ * \note           This function is only for internal use by other library
+ *                 functions; you must not call it directly.
+ *
+ * \param c        Result
+ * \param a        First operand
+ * \param b        Second operand
+ *
+ * \note           Both operands and result are bit strings interpreted as
+ *                 elements of GF(2^128) as per the GCM spec.
+ */
+void mbedtls_aesni_gcm_mult( unsigned char c[16],
+                             const unsigned char a[16],
+                             const unsigned char b[16] );
+
+/**
+ * \brief           Internal round key inversion. This function computes
+ *                  decryption round keys from the encryption round keys.
+ *
+ * \note            This function is only for internal use by other library
+ *                  functions; you must not call it directly.
+ *
+ * \param invkey    Round keys for the equivalent inverse cipher
+ * \param fwdkey    Original round keys (for encryption)
+ * \param nr        Number of rounds (that is, number of round keys minus one)
+ */
+void mbedtls_aesni_inverse_key( unsigned char *invkey,
+                                const unsigned char *fwdkey,
+                                int nr );
+
+/**
+ * \brief           Internal key expansion for encryption
+ *
+ * \note            This function is only for internal use by other library
+ *                  functions; you must not call it directly.
+ *
+ * \param rk        Destination buffer where the round keys are written
+ * \param key       Encryption key
+ * \param bits      Key size in bits (must be 128, 192 or 256)
+ *
+ * \return          0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH
+ */
+int mbedtls_aesni_setkey_enc( unsigned char *rk,
+                              const unsigned char *key,
+                              size_t bits );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_HAVE_X86_64 */
+
+#endif /* MBEDTLS_AESNI_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/arc4.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/arc4.h
new file mode 100644
index 00000000000..f4b0f9f3508
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/arc4.h
@@ -0,0 +1,145 @@
+/**
+ * \file arc4.h
+ *
+ * \brief The ARCFOUR stream cipher
+ *
+ * \warning   ARC4 is considered a weak cipher and its use constitutes a
+ *            security risk. We recommend considering stronger ciphers instead.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ */
+#ifndef MBEDTLS_ARC4_H
+#define MBEDTLS_ARC4_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/* MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** ARC4 hardware accelerator failed. */
+#define MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED                  -0x0019
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_ARC4_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief     ARC4 context structure
+ *
+ * \warning   ARC4 is considered a weak cipher and its use constitutes a
+ *            security risk. We recommend considering stronger ciphers instead.
+ *
+ */
+typedef struct mbedtls_arc4_context
+{
+    int x;                      /*!< permutation index */
+    int y;                      /*!< permutation index */
+    unsigned char m[256];       /*!< permutation table */
+}
+mbedtls_arc4_context;
+
+#else  /* MBEDTLS_ARC4_ALT */
+#include "arc4_alt.h"
+#endif /* MBEDTLS_ARC4_ALT */
+
+/**
+ * \brief          Initialize ARC4 context
+ *
+ * \param ctx      ARC4 context to be initialized
+ *
+ * \warning        ARC4 is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ *
+ */
+void mbedtls_arc4_init( mbedtls_arc4_context *ctx );
+
+/**
+ * \brief          Clear ARC4 context
+ *
+ * \param ctx      ARC4 context to be cleared
+ *
+ * \warning        ARC4 is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ *
+ */
+void mbedtls_arc4_free( mbedtls_arc4_context *ctx );
+
+/**
+ * \brief          ARC4 key schedule
+ *
+ * \param ctx      ARC4 context to be setup
+ * \param key      the secret key
+ * \param keylen   length of the key, in bytes
+ *
+ * \warning        ARC4 is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ *
+ */
+void mbedtls_arc4_setup( mbedtls_arc4_context *ctx, const unsigned char *key,
+                 unsigned int keylen );
+
+/**
+ * \brief          ARC4 cipher function
+ *
+ * \param ctx      ARC4 context
+ * \param length   length of the input data
+ * \param input    buffer holding the input data
+ * \param output   buffer for the output data
+ *
+ * \return         0 if successful
+ *
+ * \warning        ARC4 is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ *
+ */
+int mbedtls_arc4_crypt( mbedtls_arc4_context *ctx, size_t length, const unsigned char *input,
+                unsigned char *output );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ *
+ * \warning        ARC4 is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ *
+ */
+int mbedtls_arc4_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* arc4.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/aria.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/aria.h
new file mode 100644
index 00000000000..226e2dbf3c8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/aria.h
@@ -0,0 +1,373 @@
+/**
+ * \file aria.h
+ *
+ * \brief ARIA block cipher
+ *
+ *        The ARIA algorithm is a symmetric block cipher that can encrypt and
+ *        decrypt information. It is defined by the Korean Agency for
+ *        Technology and Standards (KATS) in <em>KS X 1213:2004</em> (in
+ *        Korean, but see http://210.104.33.10/ARIA/index-e.html in English)
+ *        and also described by the IETF in <em>RFC 5794</em>.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_ARIA_H
+#define MBEDTLS_ARIA_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "mbedtls/platform_util.h"
+
+#define MBEDTLS_ARIA_ENCRYPT     1 /**< ARIA encryption. */
+#define MBEDTLS_ARIA_DECRYPT     0 /**< ARIA decryption. */
+
+#define MBEDTLS_ARIA_BLOCKSIZE   16 /**< ARIA block size in bytes. */
+#define MBEDTLS_ARIA_MAX_ROUNDS  16 /**< Maxiumum number of rounds in ARIA. */
+#define MBEDTLS_ARIA_MAX_KEYSIZE 32 /**< Maximum size of an ARIA key in bytes. */
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#define MBEDTLS_ERR_ARIA_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x005C )
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+/** Bad input data. */
+#define MBEDTLS_ERR_ARIA_BAD_INPUT_DATA -0x005C
+
+/** Invalid data input length. */
+#define MBEDTLS_ERR_ARIA_INVALID_INPUT_LENGTH -0x005E
+
+/* MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE is deprecated and should not be used.
+ */
+/** Feature not available. For example, an unsupported ARIA key size. */
+#define MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE  -0x005A
+
+/* MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** ARIA hardware accelerator failed. */
+#define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED      -0x0058
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_ARIA_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief The ARIA context-type definition.
+ */
+typedef struct mbedtls_aria_context
+{
+    unsigned char nr;           /*!< The number of rounds (12, 14 or 16) */
+    /*! The ARIA round keys. */
+    uint32_t rk[MBEDTLS_ARIA_MAX_ROUNDS + 1][MBEDTLS_ARIA_BLOCKSIZE / 4];
+}
+mbedtls_aria_context;
+
+#else  /* MBEDTLS_ARIA_ALT */
+#include "aria_alt.h"
+#endif /* MBEDTLS_ARIA_ALT */
+
+/**
+ * \brief          This function initializes the specified ARIA context.
+ *
+ *                 It must be the first API called before using
+ *                 the context.
+ *
+ * \param ctx      The ARIA context to initialize. This must not be \c NULL.
+ */
+void mbedtls_aria_init( mbedtls_aria_context *ctx );
+
+/**
+ * \brief          This function releases and clears the specified ARIA context.
+ *
+ * \param ctx      The ARIA context to clear. This may be \c NULL, in which
+ *                 case this function returns immediately. If it is not \c NULL,
+ *                 it must point to an initialized ARIA context.
+ */
+void mbedtls_aria_free( mbedtls_aria_context *ctx );
+
+/**
+ * \brief          This function sets the encryption key.
+ *
+ * \param ctx      The ARIA context to which the key should be bound.
+ *                 This must be initialized.
+ * \param key      The encryption key. This must be a readable buffer
+ *                 of size \p keybits Bits.
+ * \param keybits  The size of \p key in Bits. Valid options are:
+ *                 <ul><li>128 bits</li>
+ *                 <li>192 bits</li>
+ *                 <li>256 bits</li></ul>
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_aria_setkey_enc( mbedtls_aria_context *ctx,
+                             const unsigned char *key,
+                             unsigned int keybits );
+
+/**
+ * \brief          This function sets the decryption key.
+ *
+ * \param ctx      The ARIA context to which the key should be bound.
+ *                 This must be initialized.
+ * \param key      The decryption key. This must be a readable buffer
+ *                 of size \p keybits Bits.
+ * \param keybits  The size of data passed. Valid options are:
+ *                 <ul><li>128 bits</li>
+ *                 <li>192 bits</li>
+ *                 <li>256 bits</li></ul>
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_aria_setkey_dec( mbedtls_aria_context *ctx,
+                             const unsigned char *key,
+                             unsigned int keybits );
+
+/**
+ * \brief          This function performs an ARIA single-block encryption or
+ *                 decryption operation.
+ *
+ *                 It performs encryption or decryption (depending on whether
+ *                 the key was set for encryption on decryption) on the input
+ *                 data buffer defined in the \p input parameter.
+ *
+ *                 mbedtls_aria_init(), and either mbedtls_aria_setkey_enc() or
+ *                 mbedtls_aria_setkey_dec() must be called before the first
+ *                 call to this API with the same context.
+ *
+ * \param ctx      The ARIA context to use for encryption or decryption.
+ *                 This must be initialized and bound to a key.
+ * \param input    The 16-Byte buffer holding the input data.
+ * \param output   The 16-Byte buffer holding the output data.
+
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_aria_crypt_ecb( mbedtls_aria_context *ctx,
+                            const unsigned char input[MBEDTLS_ARIA_BLOCKSIZE],
+                            unsigned char output[MBEDTLS_ARIA_BLOCKSIZE] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief  This function performs an ARIA-CBC encryption or decryption operation
+ *         on full blocks.
+ *
+ *         It performs the operation defined in the \p mode
+ *         parameter (encrypt/decrypt), on the input data buffer defined in
+ *         the \p input parameter.
+ *
+ *         It can be called as many times as needed, until all the input
+ *         data is processed. mbedtls_aria_init(), and either
+ *         mbedtls_aria_setkey_enc() or mbedtls_aria_setkey_dec() must be called
+ *         before the first call to this API with the same context.
+ *
+ * \note   This function operates on aligned blocks, that is, the input size
+ *         must be a multiple of the ARIA block size of 16 Bytes.
+ *
+ * \note   Upon exit, the content of the IV is updated so that you can
+ *         call the same function again on the next
+ *         block(s) of data and get the same result as if it was
+ *         encrypted in one call. This allows a "streaming" usage.
+ *         If you need to retain the contents of the IV, you should
+ *         either save it manually or use the cipher module instead.
+ *
+ *
+ * \param ctx      The ARIA context to use for encryption or decryption.
+ *                 This must be initialized and bound to a key.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_ARIA_ENCRYPT for encryption, or
+ *                 #MBEDTLS_ARIA_DECRYPT for decryption.
+ * \param length   The length of the input data in Bytes. This must be a
+ *                 multiple of the block size (16 Bytes).
+ * \param iv       Initialization vector (updated after use).
+ *                 This must be a readable buffer of size 16 Bytes.
+ * \param input    The buffer holding the input data. This must
+ *                 be a readable buffer of length \p length Bytes.
+ * \param output   The buffer holding the output data. This must
+ *                 be a writable buffer of length \p length Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_aria_crypt_cbc( mbedtls_aria_context *ctx,
+                            int mode,
+                            size_t length,
+                            unsigned char iv[MBEDTLS_ARIA_BLOCKSIZE],
+                            const unsigned char *input,
+                            unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+/**
+ * \brief This function performs an ARIA-CFB128 encryption or decryption
+ *        operation.
+ *
+ *        It performs the operation defined in the \p mode
+ *        parameter (encrypt or decrypt), on the input data buffer
+ *        defined in the \p input parameter.
+ *
+ *        For CFB, you must set up the context with mbedtls_aria_setkey_enc(),
+ *        regardless of whether you are performing an encryption or decryption
+ *        operation, that is, regardless of the \p mode parameter. This is
+ *        because CFB mode uses the same key schedule for encryption and
+ *        decryption.
+ *
+ * \note  Upon exit, the content of the IV is updated so that you can
+ *        call the same function again on the next
+ *        block(s) of data and get the same result as if it was
+ *        encrypted in one call. This allows a "streaming" usage.
+ *        If you need to retain the contents of the
+ *        IV, you must either save it manually or use the cipher
+ *        module instead.
+ *
+ *
+ * \param ctx      The ARIA context to use for encryption or decryption.
+ *                 This must be initialized and bound to a key.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_ARIA_ENCRYPT for encryption, or
+ *                 #MBEDTLS_ARIA_DECRYPT for decryption.
+ * \param length   The length of the input data \p input in Bytes.
+ * \param iv_off   The offset in IV (updated after use).
+ *                 This must not be larger than 15.
+ * \param iv       The initialization vector (updated after use).
+ *                 This must be a readable buffer of size 16 Bytes.
+ * \param input    The buffer holding the input data. This must
+ *                 be a readable buffer of length \p length Bytes.
+ * \param output   The buffer holding the output data. This must
+ *                 be a writable buffer of length \p length Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_aria_crypt_cfb128( mbedtls_aria_context *ctx,
+                               int mode,
+                               size_t length,
+                               size_t *iv_off,
+                               unsigned char iv[MBEDTLS_ARIA_BLOCKSIZE],
+                               const unsigned char *input,
+                               unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CFB */
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+/**
+ * \brief      This function performs an ARIA-CTR encryption or decryption
+ *             operation.
+ *
+ *             This function performs the operation defined in the \p mode
+ *             parameter (encrypt/decrypt), on the input data buffer
+ *             defined in the \p input parameter.
+ *
+ *             Due to the nature of CTR, you must use the same key schedule
+ *             for both encryption and decryption operations. Therefore, you
+ *             must use the context initialized with mbedtls_aria_setkey_enc()
+ *             for both #MBEDTLS_ARIA_ENCRYPT and #MBEDTLS_ARIA_DECRYPT.
+ *
+ * \warning    You must never reuse a nonce value with the same key. Doing so
+ *             would void the encryption for the two messages encrypted with
+ *             the same nonce and key.
+ *
+ *             There are two common strategies for managing nonces with CTR:
+ *
+ *             1. You can handle everything as a single message processed over
+ *             successive calls to this function. In that case, you want to
+ *             set \p nonce_counter and \p nc_off to 0 for the first call, and
+ *             then preserve the values of \p nonce_counter, \p nc_off and \p
+ *             stream_block across calls to this function as they will be
+ *             updated by this function.
+ *
+ *             With this strategy, you must not encrypt more than 2**128
+ *             blocks of data with the same key.
+ *
+ *             2. You can encrypt separate messages by dividing the \p
+ *             nonce_counter buffer in two areas: the first one used for a
+ *             per-message nonce, handled by yourself, and the second one
+ *             updated by this function internally.
+ *
+ *             For example, you might reserve the first 12 bytes for the
+ *             per-message nonce, and the last 4 bytes for internal use. In that
+ *             case, before calling this function on a new message you need to
+ *             set the first 12 bytes of \p nonce_counter to your chosen nonce
+ *             value, the last 4 to 0, and \p nc_off to 0 (which will cause \p
+ *             stream_block to be ignored). That way, you can encrypt at most
+ *             2**96 messages of up to 2**32 blocks each with the same key.
+ *
+ *             The per-message nonce (or information sufficient to reconstruct
+ *             it) needs to be communicated with the ciphertext and must be unique.
+ *             The recommended way to ensure uniqueness is to use a message
+ *             counter. An alternative is to generate random nonces, but this
+ *             limits the number of messages that can be securely encrypted:
+ *             for example, with 96-bit random nonces, you should not encrypt
+ *             more than 2**32 messages with the same key.
+ *
+ *             Note that for both stategies, sizes are measured in blocks and
+ *             that an ARIA block is 16 bytes.
+ *
+ * \warning    Upon return, \p stream_block contains sensitive data. Its
+ *             content must not be written to insecure storage and should be
+ *             securely discarded as soon as it's no longer needed.
+ *
+ * \param ctx              The ARIA context to use for encryption or decryption.
+ *                         This must be initialized and bound to a key.
+ * \param length           The length of the input data \p input in Bytes.
+ * \param nc_off           The offset in Bytes in the current \p stream_block,
+ *                         for resuming within the current cipher stream. The
+ *                         offset pointer should be \c 0 at the start of a
+ *                         stream. This must not be larger than \c 15 Bytes.
+ * \param nonce_counter    The 128-bit nonce and counter. This must point to
+ *                         a read/write buffer of length \c 16 bytes.
+ * \param stream_block     The saved stream block for resuming. This must
+ *                         point to a read/write buffer of length \c 16 bytes.
+ *                         This is overwritten by the function.
+ * \param input            The buffer holding the input data. This must
+ *                         be a readable buffer of length \p length Bytes.
+ * \param output           The buffer holding the output data. This must
+ *                         be a writable buffer of length \p length Bytes.
+ *
+ * \return                 \c 0 on success.
+ * \return                 A negative error code on failure.
+ */
+int mbedtls_aria_crypt_ctr( mbedtls_aria_context *ctx,
+                            size_t length,
+                            size_t *nc_off,
+                            unsigned char nonce_counter[MBEDTLS_ARIA_BLOCKSIZE],
+                            unsigned char stream_block[MBEDTLS_ARIA_BLOCKSIZE],
+                            const unsigned char *input,
+                            unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CTR */
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief          Checkup routine.
+ *
+ * \return         \c 0 on success, or \c 1 on failure.
+ */
+int mbedtls_aria_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* aria.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/asn1.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/asn1.h
new file mode 100644
index 00000000000..10f7905b7e6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/asn1.h
@@ -0,0 +1,614 @@
+/**
+ * \file asn1.h
+ *
+ * \brief Generic ASN.1 parsing
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_ASN1_H
+#define MBEDTLS_ASN1_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+#if defined(MBEDTLS_BIGNUM_C)
+#include "mbedtls/bignum.h"
+#endif
+
+/**
+ * \addtogroup asn1_module
+ * \{
+ */
+
+/**
+ * \name ASN1 Error codes
+ * These error codes are OR'ed to X509 error codes for
+ * higher error granularity.
+ * ASN1 is a standard to specify data structures.
+ * \{
+ */
+/** Out of data when parsing an ASN1 data structure. */
+#define MBEDTLS_ERR_ASN1_OUT_OF_DATA                      -0x0060
+/** ASN1 tag was of an unexpected value. */
+#define MBEDTLS_ERR_ASN1_UNEXPECTED_TAG                   -0x0062
+/** Error when trying to determine the length or invalid length. */
+#define MBEDTLS_ERR_ASN1_INVALID_LENGTH                   -0x0064
+/** Actual length differs from expected length. */
+#define MBEDTLS_ERR_ASN1_LENGTH_MISMATCH                  -0x0066
+/** Data is invalid. */
+#define MBEDTLS_ERR_ASN1_INVALID_DATA                     -0x0068
+/** Memory allocation failed */
+#define MBEDTLS_ERR_ASN1_ALLOC_FAILED                     -0x006A
+/** Buffer too small when writing ASN.1 data structure. */
+#define MBEDTLS_ERR_ASN1_BUF_TOO_SMALL                    -0x006C
+
+/* \} name */
+
+/**
+ * \name DER constants
+ * These constants comply with the DER encoded ASN.1 type tags.
+ * DER encoding uses hexadecimal representation.
+ * An example DER sequence is:\n
+ * - 0x02 -- tag indicating INTEGER
+ * - 0x01 -- length in octets
+ * - 0x05 -- value
+ * Such sequences are typically read into \c ::mbedtls_x509_buf.
+ * \{
+ */
+#define MBEDTLS_ASN1_BOOLEAN                 0x01
+#define MBEDTLS_ASN1_INTEGER                 0x02
+#define MBEDTLS_ASN1_BIT_STRING              0x03
+#define MBEDTLS_ASN1_OCTET_STRING            0x04
+#define MBEDTLS_ASN1_NULL                    0x05
+#define MBEDTLS_ASN1_OID                     0x06
+#define MBEDTLS_ASN1_ENUMERATED              0x0A
+#define MBEDTLS_ASN1_UTF8_STRING             0x0C
+#define MBEDTLS_ASN1_SEQUENCE                0x10
+#define MBEDTLS_ASN1_SET                     0x11
+#define MBEDTLS_ASN1_PRINTABLE_STRING        0x13
+#define MBEDTLS_ASN1_T61_STRING              0x14
+#define MBEDTLS_ASN1_IA5_STRING              0x16
+#define MBEDTLS_ASN1_UTC_TIME                0x17
+#define MBEDTLS_ASN1_GENERALIZED_TIME        0x18
+#define MBEDTLS_ASN1_UNIVERSAL_STRING        0x1C
+#define MBEDTLS_ASN1_BMP_STRING              0x1E
+#define MBEDTLS_ASN1_PRIMITIVE               0x00
+#define MBEDTLS_ASN1_CONSTRUCTED             0x20
+#define MBEDTLS_ASN1_CONTEXT_SPECIFIC        0x80
+
+/* Slightly smaller way to check if tag is a string tag
+ * compared to canonical implementation. */
+#define MBEDTLS_ASN1_IS_STRING_TAG( tag )                                     \
+    ( ( tag ) < 32u && (                                                      \
+        ( ( 1u << ( tag ) ) & ( ( 1u << MBEDTLS_ASN1_BMP_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_UTF8_STRING )      |     \
+                                ( 1u << MBEDTLS_ASN1_T61_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_IA5_STRING )       |     \
+                                ( 1u << MBEDTLS_ASN1_UNIVERSAL_STRING ) |     \
+                                ( 1u << MBEDTLS_ASN1_PRINTABLE_STRING ) |     \
+                                ( 1u << MBEDTLS_ASN1_BIT_STRING ) ) ) != 0 ) )
+
+/*
+ * Bit masks for each of the components of an ASN.1 tag as specified in
+ * ITU X.690 (08/2015), section 8.1 "General rules for encoding",
+ * paragraph 8.1.2.2:
+ *
+ * Bit  8     7   6   5          1
+ *     +-------+-----+------------+
+ *     | Class | P/C | Tag number |
+ *     +-------+-----+------------+
+ */
+#define MBEDTLS_ASN1_TAG_CLASS_MASK          0xC0
+#define MBEDTLS_ASN1_TAG_PC_MASK             0x20
+#define MBEDTLS_ASN1_TAG_VALUE_MASK          0x1F
+
+/* \} name */
+/* \} addtogroup asn1_module */
+
+/** Returns the size of the binary string, without the trailing \\0 */
+#define MBEDTLS_OID_SIZE(x) (sizeof(x) - 1)
+
+/**
+ * Compares an mbedtls_asn1_buf structure to a reference OID.
+ *
+ * Only works for 'defined' oid_str values (MBEDTLS_OID_HMAC_SHA1), you cannot use a
+ * 'unsigned char *oid' here!
+ */
+#define MBEDTLS_OID_CMP(oid_str, oid_buf)                                   \
+        ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf)->len ) ||                \
+          memcmp( (oid_str), (oid_buf)->p, (oid_buf)->len) != 0 )
+
+#define MBEDTLS_OID_CMP_RAW(oid_str, oid_buf, oid_buf_len)              \
+        ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf_len) ) ||             \
+          memcmp( (oid_str), (oid_buf), (oid_buf_len) ) != 0 )
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name Functions to parse ASN.1 data structures
+ * \{
+ */
+
+/**
+ * Type-length-value structure that allows for ASN1 using DER.
+ */
+typedef struct mbedtls_asn1_buf
+{
+    int tag;                /**< ASN1 type, e.g. MBEDTLS_ASN1_UTF8_STRING. */
+    size_t len;             /**< ASN1 length, in octets. */
+    unsigned char *p;       /**< ASN1 data, e.g. in ASCII. */
+}
+mbedtls_asn1_buf;
+
+/**
+ * Container for ASN1 bit strings.
+ */
+typedef struct mbedtls_asn1_bitstring
+{
+    size_t len;                 /**< ASN1 length, in octets. */
+    unsigned char unused_bits;  /**< Number of unused bits at the end of the string */
+    unsigned char *p;           /**< Raw ASN1 data for the bit string */
+}
+mbedtls_asn1_bitstring;
+
+/**
+ * Container for a sequence of ASN.1 items
+ */
+typedef struct mbedtls_asn1_sequence
+{
+    mbedtls_asn1_buf buf;                   /**< Buffer containing the given ASN.1 item. */
+    struct mbedtls_asn1_sequence *next;    /**< The next entry in the sequence. */
+}
+mbedtls_asn1_sequence;
+
+/**
+ * Container for a sequence or list of 'named' ASN.1 data items
+ */
+typedef struct mbedtls_asn1_named_data
+{
+    mbedtls_asn1_buf oid;                   /**< The object identifier. */
+    mbedtls_asn1_buf val;                   /**< The named value. */
+    struct mbedtls_asn1_named_data *next;  /**< The next entry in the sequence. */
+    unsigned char next_merged;      /**< Merge next item into the current one? */
+}
+mbedtls_asn1_named_data;
+
+/**
+ * \brief       Get the length of an ASN.1 element.
+ *              Updates the pointer to immediately behind the length.
+ *
+ * \param p     On entry, \c *p points to the first byte of the length,
+ *              i.e. immediately after the tag.
+ *              On successful completion, \c *p points to the first byte
+ *              after the length, i.e. the first byte of the content.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On successful completion, \c *len contains the length
+ *              read from the ASN.1 input.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_OUT_OF_DATA if the ASN.1 element
+ *              would end beyond \p end.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the length is unparseable.
+ */
+int mbedtls_asn1_get_len( unsigned char **p,
+                          const unsigned char *end,
+                          size_t *len );
+
+/**
+ * \brief       Get the tag and length of the element.
+ *              Check for the requested tag.
+ *              Updates the pointer to immediately behind the tag and length.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              after the length, i.e. the first byte of the content.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On successful completion, \c *len contains the length
+ *              read from the ASN.1 input.
+ * \param tag   The expected tag.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the data does not start
+ *              with the requested tag.
+ * \return      #MBEDTLS_ERR_ASN1_OUT_OF_DATA if the ASN.1 element
+ *              would end beyond \p end.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the length is unparseable.
+ */
+int mbedtls_asn1_get_tag( unsigned char **p,
+                          const unsigned char *end,
+                          size_t *len, int tag );
+
+/**
+ * \brief       Retrieve a boolean ASN.1 tag and its value.
+ *              Updates the pointer to immediately behind the full tag.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value (\c 0 or \c 1).
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BOOLEAN.
+ */
+int mbedtls_asn1_get_bool( unsigned char **p,
+                           const unsigned char *end,
+                           int *val );
+
+/**
+ * \brief       Retrieve an integer ASN.1 tag and its value.
+ *              Updates the pointer to immediately behind the full tag.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 INTEGER.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
+ */
+int mbedtls_asn1_get_int( unsigned char **p,
+                          const unsigned char *end,
+                          int *val );
+
+/**
+ * \brief       Retrieve an enumerated ASN.1 tag and its value.
+ *              Updates the pointer to immediately behind the full tag.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param val   On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 ENUMERATED.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
+ */
+int mbedtls_asn1_get_enum( unsigned char **p,
+                           const unsigned char *end,
+                           int *val );
+
+/**
+ * \brief       Retrieve a bitstring ASN.1 tag and its value.
+ *              Updates the pointer to immediately behind the full tag.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p is equal to \p end.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param bs    On success, ::mbedtls_asn1_bitstring information about
+ *              the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input contains
+ *              extra data after a valid BIT STRING.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BIT STRING.
+ */
+int mbedtls_asn1_get_bitstring( unsigned char **p, const unsigned char *end,
+                                mbedtls_asn1_bitstring *bs );
+
+/**
+ * \brief       Retrieve a bitstring ASN.1 tag without unused bits and its
+ *              value.
+ *              Updates the pointer to the beginning of the bit/octet string.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              of the content of the BIT STRING.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param len   On success, \c *len is the length of the content in bytes.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_DATA if the input starts with
+ *              a valid BIT STRING with a nonzero number of unused bits.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 BIT STRING.
+ */
+int mbedtls_asn1_get_bitstring_null( unsigned char **p,
+                                     const unsigned char *end,
+                                     size_t *len );
+
+/**
+ * \brief       Parses and splits an ASN.1 "SEQUENCE OF <tag>".
+ *              Updates the pointer to immediately behind the full sequence tag.
+ *
+ * This function allocates memory for the sequence elements. You can free
+ * the allocated memory with mbedtls_asn1_sequence_free().
+ *
+ * \note        On error, this function may return a partial list in \p cur.
+ *              You must set `cur->next = NULL` before calling this function!
+ *              Otherwise it is impossible to distinguish a previously non-null
+ *              pointer from a pointer to an object allocated by this function.
+ *
+ * \note        If the sequence is empty, this function does not modify
+ *              \c *cur. If the sequence is valid and non-empty, this
+ *              function sets `cur->buf.tag` to \p tag. This allows
+ *              callers to distinguish between an empty sequence and
+ *              a one-element sequence.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p is equal to \p end.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param cur   A ::mbedtls_asn1_sequence which this function fills.
+ *              When this function returns, \c *cur is the head of a linked
+ *              list. Each node in this list is allocated with
+ *              mbedtls_calloc() apart from \p cur itself, and should
+ *              therefore be freed with mbedtls_free().
+ *              The list describes the content of the sequence.
+ *              The head of the list (i.e. \c *cur itself) describes the
+ *              first element, `*cur->next` describes the second element, etc.
+ *              For each element, `buf.tag == tag`, `buf.len` is the length
+ *              of the content of the content of the element, and `buf.p`
+ *              points to the first byte of the content (i.e. immediately
+ *              past the length of the element).
+ *              Note that list elements may be allocated even on error.
+ * \param tag   Each element of the sequence must have this tag.
+ *
+ * \return      0 if successful.
+ * \return      #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input contains
+ *              extra data after a valid SEQUENCE OF \p tag.
+ * \return      #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the input starts with
+ *              an ASN.1 SEQUENCE in which an element has a tag that
+ *              is different from \p tag.
+ * \return      #MBEDTLS_ERR_ASN1_ALLOC_FAILED if a memory allocation failed.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 SEQUENCE.
+ */
+int mbedtls_asn1_get_sequence_of( unsigned char **p,
+                                  const unsigned char *end,
+                                  mbedtls_asn1_sequence *cur,
+                                  int tag );
+/**
+ * \brief          Free a heap-allocated linked list presentation of
+ *                 an ASN.1 sequence, including the first element.
+ *
+ * There are two common ways to manage the memory used for the representation
+ * of a parsed ASN.1 sequence:
+ * - Allocate a head node `mbedtls_asn1_sequence *head` with mbedtls_calloc().
+ *   Pass this node as the `cur` argument to mbedtls_asn1_get_sequence_of().
+ *   When you have finished processing the sequence,
+ *   call mbedtls_asn1_sequence_free() on `head`.
+ * - Allocate a head node `mbedtls_asn1_sequence *head` in any manner,
+ *   for example on the stack. Make sure that `head->next == NULL`.
+ *   Pass `head` as the `cur` argument to mbedtls_asn1_get_sequence_of().
+ *   When you have finished processing the sequence,
+ *   call mbedtls_asn1_sequence_free() on `head->cur`,
+ *   then free `head` itself in the appropriate manner.
+ *
+ * \param seq      The address of the first sequence component. This may
+ *                 be \c NULL, in which case this functions returns
+ *                 immediately.
+ */
+void mbedtls_asn1_sequence_free( mbedtls_asn1_sequence *seq );
+
+/**
+ * \brief                Traverse an ASN.1 SEQUENCE container and
+ *                       call a callback for each entry.
+ *
+ * This function checks that the input is a SEQUENCE of elements that
+ * each have a "must" tag, and calls a callback function on the elements
+ * that have a "may" tag.
+ *
+ * For example, to validate that the input is a SEQUENCE of `tag1` and call
+ * `cb` on each element, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0xff, tag1, 0, 0, cb, ctx);
+ * ```
+ *
+ * To validate that the input is a SEQUENCE of ANY and call `cb` on
+ * each element, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0, 0, 0, 0, cb, ctx);
+ * ```
+ *
+ * To validate that the input is a SEQUENCE of CHOICE {NULL, OCTET STRING}
+ * and call `cb` on each element that is an OCTET STRING, use
+ * ```
+ * mbedtls_asn1_traverse_sequence_of(&p, end, 0xfe, 0x04, 0xff, 0x04, cb, ctx);
+ * ```
+ *
+ * The callback is called on the elements with a "may" tag from left to
+ * right. If the input is not a valid SEQUENCE of elements with a "must" tag,
+ * the callback is called on the elements up to the leftmost point where
+ * the input is invalid.
+ *
+ * \warning              This function is still experimental and may change
+ *                       at any time.
+ *
+ * \param p              The address of the pointer to the beginning of
+ *                       the ASN.1 SEQUENCE header. This is updated to
+ *                       point to the end of the ASN.1 SEQUENCE container
+ *                       on a successful invocation.
+ * \param end            The end of the ASN.1 SEQUENCE container.
+ * \param tag_must_mask  A mask to be applied to the ASN.1 tags found within
+ *                       the SEQUENCE before comparing to \p tag_must_value.
+ * \param tag_must_val   The required value of each ASN.1 tag found in the
+ *                       SEQUENCE, after masking with \p tag_must_mask.
+ *                       Mismatching tags lead to an error.
+ *                       For example, a value of \c 0 for both \p tag_must_mask
+ *                       and \p tag_must_val means that every tag is allowed,
+ *                       while a value of \c 0xFF for \p tag_must_mask means
+ *                       that \p tag_must_val is the only allowed tag.
+ * \param tag_may_mask   A mask to be applied to the ASN.1 tags found within
+ *                       the SEQUENCE before comparing to \p tag_may_value.
+ * \param tag_may_val    The desired value of each ASN.1 tag found in the
+ *                       SEQUENCE, after masking with \p tag_may_mask.
+ *                       Mismatching tags will be silently ignored.
+ *                       For example, a value of \c 0 for \p tag_may_mask and
+ *                       \p tag_may_val means that any tag will be considered,
+ *                       while a value of \c 0xFF for \p tag_may_mask means
+ *                       that all tags with value different from \p tag_may_val
+ *                       will be ignored.
+ * \param cb             The callback to trigger for each component
+ *                       in the ASN.1 SEQUENCE that matches \p tag_may_val.
+ *                       The callback function is called with the following
+ *                       parameters:
+ *                       - \p ctx.
+ *                       - The tag of the current element.
+ *                       - A pointer to the start of the current element's
+ *                         content inside the input.
+ *                       - The length of the content of the current element.
+ *                       If the callback returns a non-zero value,
+ *                       the function stops immediately,
+ *                       forwarding the callback's return value.
+ * \param ctx            The context to be passed to the callback \p cb.
+ *
+ * \return               \c 0 if successful the entire ASN.1 SEQUENCE
+ *                       was traversed without parsing or callback errors.
+ * \return               #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input
+ *                       contains extra data after a valid SEQUENCE
+ *                       of elements with an accepted tag.
+ * \return               #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the input starts
+ *                       with an ASN.1 SEQUENCE in which an element has a tag
+ *                       that is not accepted.
+ * \return               An ASN.1 error code if the input does not start with
+ *                       a valid ASN.1 SEQUENCE.
+ * \return               A non-zero error code forwarded from the callback
+ *                       \p cb in case the latter returns a non-zero value.
+ */
+int mbedtls_asn1_traverse_sequence_of(
+    unsigned char **p,
+    const unsigned char *end,
+    unsigned char tag_must_mask, unsigned char tag_must_val,
+    unsigned char tag_may_mask, unsigned char tag_may_val,
+    int (*cb)( void *ctx, int tag,
+               unsigned char* start, size_t len ),
+    void *ctx );
+
+#if defined(MBEDTLS_BIGNUM_C)
+/**
+ * \brief       Retrieve an integer ASN.1 tag and its value.
+ *              Updates the pointer to immediately behind the full tag.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the ASN.1 element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param X     On success, the parsed value.
+ *
+ * \return      0 if successful.
+ * \return      An ASN.1 error code if the input does not start with
+ *              a valid ASN.1 INTEGER.
+ * \return      #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does
+ *              not fit in an \c int.
+ * \return      An MPI error code if the parsed value is too large.
+ */
+int mbedtls_asn1_get_mpi( unsigned char **p,
+                          const unsigned char *end,
+                          mbedtls_mpi *X );
+#endif /* MBEDTLS_BIGNUM_C */
+
+/**
+ * \brief       Retrieve an AlgorithmIdentifier ASN.1 sequence.
+ *              Updates the pointer to immediately behind the full
+ *              AlgorithmIdentifier.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the AlgorithmIdentifier element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param alg   The buffer to receive the OID.
+ * \param params The buffer to receive the parameters.
+ *              This is zeroized if there are no parameters.
+ *
+ * \return      0 if successful or a specific ASN.1 or MPI error code.
+ */
+int mbedtls_asn1_get_alg( unsigned char **p,
+                  const unsigned char *end,
+                  mbedtls_asn1_buf *alg, mbedtls_asn1_buf *params );
+
+/**
+ * \brief       Retrieve an AlgorithmIdentifier ASN.1 sequence with NULL or no
+ *              params.
+ *              Updates the pointer to immediately behind the full
+ *              AlgorithmIdentifier.
+ *
+ * \param p     On entry, \c *p points to the start of the ASN.1 element.
+ *              On successful completion, \c *p points to the first byte
+ *              beyond the AlgorithmIdentifier element.
+ *              On error, the value of \c *p is undefined.
+ * \param end   End of data.
+ * \param alg   The buffer to receive the OID.
+ *
+ * \return      0 if successful or a specific ASN.1 or MPI error code.
+ */
+int mbedtls_asn1_get_alg_null( unsigned char **p,
+                       const unsigned char *end,
+                       mbedtls_asn1_buf *alg );
+
+/**
+ * \brief       Find a specific named_data entry in a sequence or list based on
+ *              the OID.
+ *
+ * \param list  The list to seek through
+ * \param oid   The OID to look for
+ * \param len   Size of the OID
+ *
+ * \return      NULL if not found, or a pointer to the existing entry.
+ */
+mbedtls_asn1_named_data *mbedtls_asn1_find_named_data( mbedtls_asn1_named_data *list,
+                                       const char *oid, size_t len );
+
+/**
+ * \brief       Free a mbedtls_asn1_named_data entry
+ *
+ * \param entry The named data entry to free.
+ *              This function calls mbedtls_free() on
+ *              `entry->oid.p` and `entry->val.p`.
+ */
+void mbedtls_asn1_free_named_data( mbedtls_asn1_named_data *entry );
+
+/**
+ * \brief       Free all entries in a mbedtls_asn1_named_data list.
+ *
+ * \param head  Pointer to the head of the list of named data entries to free.
+ *              This function calls mbedtls_asn1_free_named_data() and
+ *              mbedtls_free() on each list element and
+ *              sets \c *head to \c NULL.
+ */
+void mbedtls_asn1_free_named_data_list( mbedtls_asn1_named_data **head );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* asn1.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/asn1write.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/asn1write.h
new file mode 100644
index 00000000000..44afae0e560
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/asn1write.h
@@ -0,0 +1,370 @@
+/**
+ * \file asn1write.h
+ *
+ * \brief ASN.1 buffer writing functionality
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_ASN1_WRITE_H
+#define MBEDTLS_ASN1_WRITE_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/asn1.h"
+
+#define MBEDTLS_ASN1_CHK_ADD(g, f)                      \
+    do                                                  \
+    {                                                   \
+        if( ( ret = (f) ) < 0 )                         \
+            return( ret );                              \
+        else                                            \
+            (g) += ret;                                 \
+    } while( 0 )
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief           Write a length field in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param len       The length value to write.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_len( unsigned char **p, unsigned char *start,
+                            size_t len );
+/**
+ * \brief           Write an ASN.1 tag in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param tag       The tag to write.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_tag( unsigned char **p, unsigned char *start,
+                            unsigned char tag );
+
+/**
+ * \brief           Write raw buffer data.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param buf       The data buffer to write.
+ * \param size      The length of the data buffer.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_raw_buffer( unsigned char **p, unsigned char *start,
+                                   const unsigned char *buf, size_t size );
+
+#if defined(MBEDTLS_BIGNUM_C)
+/**
+ * \brief           Write a arbitrary-precision number (#MBEDTLS_ASN1_INTEGER)
+ *                  in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param X         The MPI to write.
+ *                  It must be non-negative.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_mpi( unsigned char **p, unsigned char *start,
+                            const mbedtls_mpi *X );
+#endif /* MBEDTLS_BIGNUM_C */
+
+/**
+ * \brief           Write a NULL tag (#MBEDTLS_ASN1_NULL) with zero data
+ *                  in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_null( unsigned char **p, unsigned char *start );
+
+/**
+ * \brief           Write an OID tag (#MBEDTLS_ASN1_OID) and data
+ *                  in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param oid       The OID to write.
+ * \param oid_len   The length of the OID.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_oid( unsigned char **p, unsigned char *start,
+                            const char *oid, size_t oid_len );
+
+/**
+ * \brief           Write an AlgorithmIdentifier sequence in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param oid       The OID of the algorithm to write.
+ * \param oid_len   The length of the algorithm's OID.
+ * \param par_len   The length of the parameters, which must be already written.
+ *                  If 0, NULL parameters are added
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_algorithm_identifier( unsigned char **p,
+                                             unsigned char *start,
+                                             const char *oid, size_t oid_len,
+                                             size_t par_len );
+
+/**
+ * \brief           Write a boolean tag (#MBEDTLS_ASN1_BOOLEAN) and value
+ *                  in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param boolean   The boolean value to write, either \c 0 or \c 1.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_bool( unsigned char **p, unsigned char *start,
+                             int boolean );
+
+/**
+ * \brief           Write an int tag (#MBEDTLS_ASN1_INTEGER) and value
+ *                  in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param val       The integer value to write.
+ *                  It must be non-negative.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_int( unsigned char **p, unsigned char *start, int val );
+
+/**
+ * \brief           Write an enum tag (#MBEDTLS_ASN1_ENUMERATED) and value
+ *                  in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param val       The integer value to write.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_enum( unsigned char **p, unsigned char *start, int val );
+
+/**
+ * \brief           Write a string in ASN.1 format using a specific
+ *                  string encoding tag.
+
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param tag       The string encoding tag to write, e.g.
+ *                  #MBEDTLS_ASN1_UTF8_STRING.
+ * \param text      The string to write.
+ * \param text_len  The length of \p text in bytes (which might
+ *                  be strictly larger than the number of characters).
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_asn1_write_tagged_string( unsigned char **p, unsigned char *start,
+                                      int tag, const char *text,
+                                      size_t text_len );
+
+/**
+ * \brief           Write a string in ASN.1 format using the PrintableString
+ *                  string encoding tag (#MBEDTLS_ASN1_PRINTABLE_STRING).
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param text      The string to write.
+ * \param text_len  The length of \p text in bytes (which might
+ *                  be strictly larger than the number of characters).
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_asn1_write_printable_string( unsigned char **p,
+                                         unsigned char *start,
+                                         const char *text, size_t text_len );
+
+/**
+ * \brief           Write a UTF8 string in ASN.1 format using the UTF8String
+ *                  string encoding tag (#MBEDTLS_ASN1_UTF8_STRING).
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param text      The string to write.
+ * \param text_len  The length of \p text in bytes (which might
+ *                  be strictly larger than the number of characters).
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_asn1_write_utf8_string( unsigned char **p, unsigned char *start,
+                                    const char *text, size_t text_len );
+
+/**
+ * \brief           Write a string in ASN.1 format using the IA5String
+ *                  string encoding tag (#MBEDTLS_ASN1_IA5_STRING).
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param text      The string to write.
+ * \param text_len  The length of \p text in bytes (which might
+ *                  be strictly larger than the number of characters).
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_asn1_write_ia5_string( unsigned char **p, unsigned char *start,
+                                   const char *text, size_t text_len );
+
+/**
+ * \brief           Write a bitstring tag (#MBEDTLS_ASN1_BIT_STRING) and
+ *                  value in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param buf       The bitstring to write.
+ * \param bits      The total number of bits in the bitstring.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_asn1_write_bitstring( unsigned char **p, unsigned char *start,
+                                  const unsigned char *buf, size_t bits );
+
+/**
+ * \brief           This function writes a named bitstring tag
+ *                  (#MBEDTLS_ASN1_BIT_STRING) and value in ASN.1 format.
+ *
+ *                  As stated in RFC 5280 Appendix B, trailing zeroes are
+ *                  omitted when encoding named bitstrings in DER.
+ *
+ * \note            This function works backwards within the data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer which is used for bounds-checking.
+ * \param buf       The bitstring to write.
+ * \param bits      The total number of bits in the bitstring.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_asn1_write_named_bitstring( unsigned char **p,
+                                        unsigned char *start,
+                                        const unsigned char *buf,
+                                        size_t bits );
+
+/**
+ * \brief           Write an octet string tag (#MBEDTLS_ASN1_OCTET_STRING)
+ *                  and value in ASN.1 format.
+ *
+ * \note            This function works backwards in data buffer.
+ *
+ * \param p         The reference to the current position pointer.
+ * \param start     The start of the buffer, for bounds-checking.
+ * \param buf       The buffer holding the data to write.
+ * \param size      The length of the data buffer \p buf.
+ *
+ * \return          The number of bytes written to \p p on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_asn1_write_octet_string( unsigned char **p, unsigned char *start,
+                                     const unsigned char *buf, size_t size );
+
+/**
+ * \brief           Create or find a specific named_data entry for writing in a
+ *                  sequence or list based on the OID. If not already in there,
+ *                  a new entry is added to the head of the list.
+ *                  Warning: Destructive behaviour for the val data!
+ *
+ * \param list      The pointer to the location of the head of the list to seek
+ *                  through (will be updated in case of a new entry).
+ * \param oid       The OID to look for.
+ * \param oid_len   The size of the OID.
+ * \param val       The associated data to store. If this is \c NULL,
+ *                  no data is copied to the new or existing buffer.
+ * \param val_len   The minimum length of the data buffer needed.
+ *                  If this is 0, do not allocate a buffer for the associated
+ *                  data.
+ *                  If the OID was already present, enlarge, shrink or free
+ *                  the existing buffer to fit \p val_len.
+ *
+ * \return          A pointer to the new / existing entry on success.
+ * \return          \c NULL if if there was a memory allocation error.
+ */
+mbedtls_asn1_named_data *mbedtls_asn1_store_named_data( mbedtls_asn1_named_data **list,
+                                        const char *oid, size_t oid_len,
+                                        const unsigned char *val,
+                                        size_t val_len );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_ASN1_WRITE_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/base64.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/base64.h
new file mode 100644
index 00000000000..cf4149e731d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/base64.h
@@ -0,0 +1,98 @@
+/**
+ * \file base64.h
+ *
+ * \brief RFC 1521 base64 encoding/decoding
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_BASE64_H
+#define MBEDTLS_BASE64_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/** Output buffer too small. */
+#define MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL               -0x002A
+/** Invalid character in input. */
+#define MBEDTLS_ERR_BASE64_INVALID_CHARACTER              -0x002C
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          Encode a buffer into base64 format
+ *
+ * \param dst      destination buffer
+ * \param dlen     size of the destination buffer
+ * \param olen     number of bytes written
+ * \param src      source buffer
+ * \param slen     amount of data to be encoded
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL.
+ *                 *olen is always updated to reflect the amount
+ *                 of data that has (or would have) been written.
+ *                 If that length cannot be represented, then no data is
+ *                 written to the buffer and *olen is set to the maximum
+ *                 length representable as a size_t.
+ *
+ * \note           Call this function with dlen = 0 to obtain the
+ *                 required buffer size in *olen
+ */
+int mbedtls_base64_encode( unsigned char *dst, size_t dlen, size_t *olen,
+                   const unsigned char *src, size_t slen );
+
+/**
+ * \brief          Decode a base64-formatted buffer
+ *
+ * \param dst      destination buffer (can be NULL for checking size)
+ * \param dlen     size of the destination buffer
+ * \param olen     number of bytes written
+ * \param src      source buffer
+ * \param slen     amount of data to be decoded
+ *
+ * \return         0 if successful, MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL, or
+ *                 MBEDTLS_ERR_BASE64_INVALID_CHARACTER if the input data is
+ *                 not correct. *olen is always updated to reflect the amount
+ *                 of data that has (or would have) been written.
+ *
+ * \note           Call this function with *dst = NULL or dlen = 0 to obtain
+ *                 the required buffer size in *olen
+ */
+int mbedtls_base64_decode( unsigned char *dst, size_t dlen, size_t *olen,
+                   const unsigned char *src, size_t slen );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ */
+int mbedtls_base64_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* base64.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/bignum.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/bignum.h
new file mode 100644
index 00000000000..4de452980b8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/bignum.h
@@ -0,0 +1,1068 @@
+/**
+ * \file bignum.h
+ *
+ * \brief Multi-precision integer library
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_BIGNUM_H
+#define MBEDTLS_BIGNUM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#if defined(MBEDTLS_FS_IO)
+#include <stdio.h>
+#endif
+
+/** An error occurred while reading from or writing to a file. */
+#define MBEDTLS_ERR_MPI_FILE_IO_ERROR                     -0x0002
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_MPI_BAD_INPUT_DATA                    -0x0004
+/** There is an invalid character in the digit string. */
+#define MBEDTLS_ERR_MPI_INVALID_CHARACTER                 -0x0006
+/** The buffer is too small to write to. */
+#define MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL                  -0x0008
+/** The input arguments are negative or result in illegal output. */
+#define MBEDTLS_ERR_MPI_NEGATIVE_VALUE                    -0x000A
+/** The input argument for division is zero, which is not allowed. */
+#define MBEDTLS_ERR_MPI_DIVISION_BY_ZERO                  -0x000C
+/** The input arguments are not acceptable. */
+#define MBEDTLS_ERR_MPI_NOT_ACCEPTABLE                    -0x000E
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_MPI_ALLOC_FAILED                      -0x0010
+
+#define MBEDTLS_MPI_CHK(f)       \
+    do                           \
+    {                            \
+        if( ( ret = (f) ) != 0 ) \
+            goto cleanup;        \
+    } while( 0 )
+
+/*
+ * Maximum size MPIs are allowed to grow to in number of limbs.
+ */
+#define MBEDTLS_MPI_MAX_LIMBS                             10000
+
+#if !defined(MBEDTLS_MPI_WINDOW_SIZE)
+/*
+ * Maximum window size used for modular exponentiation. Default: 6
+ * Minimum value: 1. Maximum value: 6.
+ *
+ * Result is an array of ( 2 ** MBEDTLS_MPI_WINDOW_SIZE ) MPIs used
+ * for the sliding window calculation. (So 64 by default)
+ *
+ * Reduction in size, reduces speed.
+ */
+#define MBEDTLS_MPI_WINDOW_SIZE                           6        /**< Maximum window size used. */
+#endif /* !MBEDTLS_MPI_WINDOW_SIZE */
+
+#if !defined(MBEDTLS_MPI_MAX_SIZE)
+/*
+ * Maximum size of MPIs allowed in bits and bytes for user-MPIs.
+ * ( Default: 512 bytes => 4096 bits, Maximum tested: 2048 bytes => 16384 bits )
+ *
+ * Note: Calculations can temporarily result in larger MPIs. So the number
+ * of limbs required (MBEDTLS_MPI_MAX_LIMBS) is higher.
+ */
+#define MBEDTLS_MPI_MAX_SIZE                              1024     /**< Maximum number of bytes for usable MPIs. */
+#endif /* !MBEDTLS_MPI_MAX_SIZE */
+
+#define MBEDTLS_MPI_MAX_BITS                              ( 8 * MBEDTLS_MPI_MAX_SIZE )    /**< Maximum number of bits for usable MPIs. */
+
+/*
+ * When reading from files with mbedtls_mpi_read_file() and writing to files with
+ * mbedtls_mpi_write_file() the buffer should have space
+ * for a (short) label, the MPI (in the provided radix), the newline
+ * characters and the '\0'.
+ *
+ * By default we assume at least a 10 char label, a minimum radix of 10
+ * (decimal) and a maximum of 4096 bit numbers (1234 decimal chars).
+ * Autosized at compile time for at least a 10 char label, a minimum radix
+ * of 10 (decimal) for a number of MBEDTLS_MPI_MAX_BITS size.
+ *
+ * This used to be statically sized to 1250 for a maximum of 4096 bit
+ * numbers (1234 decimal chars).
+ *
+ * Calculate using the formula:
+ *  MBEDTLS_MPI_RW_BUFFER_SIZE = ceil(MBEDTLS_MPI_MAX_BITS / ln(10) * ln(2)) +
+ *                                LabelSize + 6
+ */
+#define MBEDTLS_MPI_MAX_BITS_SCALE100          ( 100 * MBEDTLS_MPI_MAX_BITS )
+#define MBEDTLS_LN_2_DIV_LN_10_SCALE100                 332
+#define MBEDTLS_MPI_RW_BUFFER_SIZE             ( ((MBEDTLS_MPI_MAX_BITS_SCALE100 + MBEDTLS_LN_2_DIV_LN_10_SCALE100 - 1) / MBEDTLS_LN_2_DIV_LN_10_SCALE100) + 10 + 6 )
+
+#if !defined(MBEDTLS_BIGNUM_ALT)
+
+/*
+ * Define the base integer type, architecture-wise.
+ *
+ * 32 or 64-bit integer types can be forced regardless of the underlying
+ * architecture by defining MBEDTLS_HAVE_INT32 or MBEDTLS_HAVE_INT64
+ * respectively and undefining MBEDTLS_HAVE_ASM.
+ *
+ * Double-width integers (e.g. 128-bit in 64-bit architectures) can be
+ * disabled by defining MBEDTLS_NO_UDBL_DIVISION.
+ */
+#if !defined(MBEDTLS_HAVE_INT32)
+    #if defined(_MSC_VER) && defined(_M_AMD64)
+        /* Always choose 64-bit when using MSC */
+        #if !defined(MBEDTLS_HAVE_INT64)
+            #define MBEDTLS_HAVE_INT64
+        #endif /* !MBEDTLS_HAVE_INT64 */
+        typedef  int64_t mbedtls_mpi_sint;
+        typedef uint64_t mbedtls_mpi_uint;
+    #elif defined(__GNUC__) && (                         \
+        defined(__amd64__) || defined(__x86_64__)     || \
+        defined(__ppc64__) || defined(__powerpc64__)  || \
+        defined(__ia64__)  || defined(__alpha__)      || \
+        ( defined(__sparc__) && defined(__arch64__) ) || \
+        defined(__s390x__) || defined(__mips64)       || \
+        defined(__aarch64__) )
+        #if !defined(MBEDTLS_HAVE_INT64)
+            #define MBEDTLS_HAVE_INT64
+        #endif /* MBEDTLS_HAVE_INT64 */
+        typedef  int64_t mbedtls_mpi_sint;
+        typedef uint64_t mbedtls_mpi_uint;
+        #if !defined(MBEDTLS_NO_UDBL_DIVISION)
+            /* mbedtls_t_udbl defined as 128-bit unsigned int */
+            typedef unsigned int mbedtls_t_udbl __attribute__((mode(TI)));
+            #define MBEDTLS_HAVE_UDBL
+        #endif /* !MBEDTLS_NO_UDBL_DIVISION */
+    #elif defined(__ARMCC_VERSION) && defined(__aarch64__)
+        /*
+         * __ARMCC_VERSION is defined for both armcc and armclang and
+         * __aarch64__ is only defined by armclang when compiling 64-bit code
+         */
+        #if !defined(MBEDTLS_HAVE_INT64)
+            #define MBEDTLS_HAVE_INT64
+        #endif /* !MBEDTLS_HAVE_INT64 */
+        typedef  int64_t mbedtls_mpi_sint;
+        typedef uint64_t mbedtls_mpi_uint;
+        #if !defined(MBEDTLS_NO_UDBL_DIVISION)
+            /* mbedtls_t_udbl defined as 128-bit unsigned int */
+            typedef __uint128_t mbedtls_t_udbl;
+            #define MBEDTLS_HAVE_UDBL
+        #endif /* !MBEDTLS_NO_UDBL_DIVISION */
+    #elif defined(MBEDTLS_HAVE_INT64)
+        /* Force 64-bit integers with unknown compiler */
+        typedef  int64_t mbedtls_mpi_sint;
+        typedef uint64_t mbedtls_mpi_uint;
+    #endif
+#endif /* !MBEDTLS_HAVE_INT32 */
+
+#if !defined(MBEDTLS_HAVE_INT64)
+    /* Default to 32-bit compilation */
+    #if !defined(MBEDTLS_HAVE_INT32)
+        #define MBEDTLS_HAVE_INT32
+    #endif /* !MBEDTLS_HAVE_INT32 */
+    typedef  int32_t mbedtls_mpi_sint;
+    typedef uint32_t mbedtls_mpi_uint;
+    #if !defined(MBEDTLS_NO_UDBL_DIVISION)
+        typedef uint64_t mbedtls_t_udbl;
+        #define MBEDTLS_HAVE_UDBL
+    #endif /* !MBEDTLS_NO_UDBL_DIVISION */
+#endif /* !MBEDTLS_HAVE_INT64 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          MPI structure
+ */
+typedef struct mbedtls_mpi
+{
+    int s;              /*!<  Sign: -1 if the mpi is negative, 1 otherwise */
+    size_t n;           /*!<  total # of limbs  */
+    mbedtls_mpi_uint *p;          /*!<  pointer to limbs  */
+}
+mbedtls_mpi;
+
+/**
+ * \brief           Initialize an MPI context.
+ *
+ *                  This makes the MPI ready to be set or freed,
+ *                  but does not define a value for the MPI.
+ *
+ * \param X         The MPI context to initialize. This must not be \c NULL.
+ */
+void mbedtls_mpi_init( mbedtls_mpi *X );
+
+/**
+ * \brief          This function frees the components of an MPI context.
+ *
+ * \param X        The MPI context to be cleared. This may be \c NULL,
+ *                 in which case this function is a no-op. If it is
+ *                 not \c NULL, it must point to an initialized MPI.
+ */
+void mbedtls_mpi_free( mbedtls_mpi *X );
+
+/**
+ * \brief          Enlarge an MPI to the specified number of limbs.
+ *
+ * \note           This function does nothing if the MPI is
+ *                 already large enough.
+ *
+ * \param X        The MPI to grow. It must be initialized.
+ * \param nblimbs  The target number of limbs.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_grow( mbedtls_mpi *X, size_t nblimbs );
+
+/**
+ * \brief          This function resizes an MPI downwards, keeping at least the
+ *                 specified number of limbs.
+ *
+ *                 If \c X is smaller than \c nblimbs, it is resized up
+ *                 instead.
+ *
+ * \param X        The MPI to shrink. This must point to an initialized MPI.
+ * \param nblimbs  The minimum number of limbs to keep.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed
+ *                 (this can only happen when resizing up).
+ * \return         Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_shrink( mbedtls_mpi *X, size_t nblimbs );
+
+/**
+ * \brief          Make a copy of an MPI.
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param Y        The source MPI. This must point to an initialized MPI.
+ *
+ * \note           The limb-buffer in the destination MPI is enlarged
+ *                 if necessary to hold the value in the source MPI.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_copy( mbedtls_mpi *X, const mbedtls_mpi *Y );
+
+/**
+ * \brief          Swap the contents of two MPIs.
+ *
+ * \param X        The first MPI. It must be initialized.
+ * \param Y        The second MPI. It must be initialized.
+ */
+void mbedtls_mpi_swap( mbedtls_mpi *X, mbedtls_mpi *Y );
+
+/**
+ * \brief          Perform a safe conditional copy of MPI which doesn't
+ *                 reveal whether the condition was true or not.
+ *
+ * \param X        The MPI to conditionally assign to. This must point
+ *                 to an initialized MPI.
+ * \param Y        The MPI to be assigned from. This must point to an
+ *                 initialized MPI.
+ * \param assign   The condition deciding whether to perform the
+ *                 assignment or not. Possible values:
+ *                 * \c 1: Perform the assignment `X = Y`.
+ *                 * \c 0: Keep the original value of \p X.
+ *
+ * \note           This function is equivalent to
+ *                      `if( assign ) mbedtls_mpi_copy( X, Y );`
+ *                 except that it avoids leaking any information about whether
+ *                 the assignment was done or not (the above code may leak
+ *                 information through branch prediction and/or memory access
+ *                 patterns analysis).
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_safe_cond_assign( mbedtls_mpi *X, const mbedtls_mpi *Y, unsigned char assign );
+
+/**
+ * \brief          Perform a safe conditional swap which doesn't
+ *                 reveal whether the condition was true or not.
+ *
+ * \param X        The first MPI. This must be initialized.
+ * \param Y        The second MPI. This must be initialized.
+ * \param assign   The condition deciding whether to perform
+ *                 the swap or not. Possible values:
+ *                 * \c 1: Swap the values of \p X and \p Y.
+ *                 * \c 0: Keep the original values of \p X and \p Y.
+ *
+ * \note           This function is equivalent to
+ *                      if( assign ) mbedtls_mpi_swap( X, Y );
+ *                 except that it avoids leaking any information about whether
+ *                 the assignment was done or not (the above code may leak
+ *                 information through branch prediction and/or memory access
+ *                 patterns analysis).
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         Another negative error code on other kinds of failure.
+ *
+ */
+int mbedtls_mpi_safe_cond_swap( mbedtls_mpi *X, mbedtls_mpi *Y, unsigned char assign );
+
+/**
+ * \brief          Store integer value in MPI.
+ *
+ * \param X        The MPI to set. This must be initialized.
+ * \param z        The value to use.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_lset( mbedtls_mpi *X, mbedtls_mpi_sint z );
+
+/**
+ * \brief          Get a specific bit from an MPI.
+ *
+ * \param X        The MPI to query. This must be initialized.
+ * \param pos      Zero-based index of the bit to query.
+ *
+ * \return         \c 0 or \c 1 on success, depending on whether bit \c pos
+ *                 of \c X is unset or set.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_mpi_get_bit( const mbedtls_mpi *X, size_t pos );
+
+/**
+ * \brief          Modify a specific bit in an MPI.
+ *
+ * \note           This function will grow the target MPI if necessary to set a
+ *                 bit to \c 1 in a not yet existing limb. It will not grow if
+ *                 the bit should be set to \c 0.
+ *
+ * \param X        The MPI to modify. This must be initialized.
+ * \param pos      Zero-based index of the bit to modify.
+ * \param val      The desired value of bit \c pos: \c 0 or \c 1.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_set_bit( mbedtls_mpi *X, size_t pos, unsigned char val );
+
+/**
+ * \brief          Return the number of bits of value \c 0 before the
+ *                 least significant bit of value \c 1.
+ *
+ * \note           This is the same as the zero-based index of
+ *                 the least significant bit of value \c 1.
+ *
+ * \param X        The MPI to query.
+ *
+ * \return         The number of bits of value \c 0 before the least significant
+ *                 bit of value \c 1 in \p X.
+ */
+size_t mbedtls_mpi_lsb( const mbedtls_mpi *X );
+
+/**
+ * \brief          Return the number of bits up to and including the most
+ *                 significant bit of value \c 1.
+ *
+ * * \note         This is same as the one-based index of the most
+ *                 significant bit of value \c 1.
+ *
+ * \param X        The MPI to query. This must point to an initialized MPI.
+ *
+ * \return         The number of bits up to and including the most
+ *                 significant bit of value \c 1.
+ */
+size_t mbedtls_mpi_bitlen( const mbedtls_mpi *X );
+
+/**
+ * \brief          Return the total size of an MPI value in bytes.
+ *
+ * \param X        The MPI to use. This must point to an initialized MPI.
+ *
+ * \note           The value returned by this function may be less than
+ *                 the number of bytes used to store \p X internally.
+ *                 This happens if and only if there are trailing bytes
+ *                 of value zero.
+ *
+ * \return         The least number of bytes capable of storing
+ *                 the absolute value of \p X.
+ */
+size_t mbedtls_mpi_size( const mbedtls_mpi *X );
+
+/**
+ * \brief          Import an MPI from an ASCII string.
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param radix    The numeric base of the input string.
+ * \param s        Null-terminated string buffer.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_mpi_read_string( mbedtls_mpi *X, int radix, const char *s );
+
+/**
+ * \brief          Export an MPI to an ASCII string.
+ *
+ * \param X        The source MPI. This must point to an initialized MPI.
+ * \param radix    The numeric base of the output string.
+ * \param buf      The buffer to write the string to. This must be writable
+ *                 buffer of length \p buflen Bytes.
+ * \param buflen   The available size in Bytes of \p buf.
+ * \param olen     The address at which to store the length of the string
+ *                 written, including the  final \c NULL byte. This must
+ *                 not be \c NULL.
+ *
+ * \note           You can call this function with `buflen == 0` to obtain the
+ *                 minimum required buffer size in `*olen`.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if the target buffer \p buf
+ *                 is too small to hold the value of \p X in the desired base.
+ *                 In this case, `*olen` is nonetheless updated to contain the
+ *                 size of \p buf required for a successful call.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_write_string( const mbedtls_mpi *X, int radix,
+                              char *buf, size_t buflen, size_t *olen );
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief          Read an MPI from a line in an opened file.
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param radix    The numeric base of the string representation used
+ *                 in the source line.
+ * \param fin      The input file handle to use. This must not be \c NULL.
+ *
+ * \note           On success, this function advances the file stream
+ *                 to the end of the current line or to EOF.
+ *
+ *                 The function returns \c 0 on an empty line.
+ *
+ *                 Leading whitespaces are ignored, as is a
+ *                 '0x' prefix for radix \c 16.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if the file read buffer
+ *                 is too small.
+ * \return         Another negative error code on failure.
+ */
+int mbedtls_mpi_read_file( mbedtls_mpi *X, int radix, FILE *fin );
+
+/**
+ * \brief          Export an MPI into an opened file.
+ *
+ * \param p        A string prefix to emit prior to the MPI data.
+ *                 For example, this might be a label, or "0x" when
+ *                 printing in base \c 16. This may be \c NULL if no prefix
+ *                 is needed.
+ * \param X        The source MPI. This must point to an initialized MPI.
+ * \param radix    The numeric base to be used in the emitted string.
+ * \param fout     The output file handle. This may be \c NULL, in which case
+ *                 the output is written to \c stdout.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_mpi_write_file( const char *p, const mbedtls_mpi *X,
+                            int radix, FILE *fout );
+#endif /* MBEDTLS_FS_IO */
+
+/**
+ * \brief          Import an MPI from unsigned big endian binary data.
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param buf      The input buffer. This must be a readable buffer of length
+ *                 \p buflen Bytes.
+ * \param buflen   The length of the input buffer \p p in Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf,
+                             size_t buflen );
+
+/**
+ * \brief          Import X from unsigned binary data, little endian
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param buf      The input buffer. This must be a readable buffer of length
+ *                 \p buflen Bytes.
+ * \param buflen   The length of the input buffer \p p in Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_read_binary_le( mbedtls_mpi *X,
+                                const unsigned char *buf, size_t buflen );
+
+/**
+ * \brief          Export X into unsigned binary data, big endian.
+ *                 Always fills the whole buffer, which will start with zeros
+ *                 if the number is smaller.
+ *
+ * \param X        The source MPI. This must point to an initialized MPI.
+ * \param buf      The output buffer. This must be a writable buffer of length
+ *                 \p buflen Bytes.
+ * \param buflen   The size of the output buffer \p buf in Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if \p buf isn't
+ *                 large enough to hold the value of \p X.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_write_binary( const mbedtls_mpi *X, unsigned char *buf,
+                              size_t buflen );
+
+/**
+ * \brief          Export X into unsigned binary data, little endian.
+ *                 Always fills the whole buffer, which will end with zeros
+ *                 if the number is smaller.
+ *
+ * \param X        The source MPI. This must point to an initialized MPI.
+ * \param buf      The output buffer. This must be a writable buffer of length
+ *                 \p buflen Bytes.
+ * \param buflen   The size of the output buffer \p buf in Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if \p buf isn't
+ *                 large enough to hold the value of \p X.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_write_binary_le( const mbedtls_mpi *X,
+                                 unsigned char *buf, size_t buflen );
+
+/**
+ * \brief          Perform a left-shift on an MPI: X <<= count
+ *
+ * \param X        The MPI to shift. This must point to an initialized MPI.
+ * \param count    The number of bits to shift by.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_shift_l( mbedtls_mpi *X, size_t count );
+
+/**
+ * \brief          Perform a right-shift on an MPI: X >>= count
+ *
+ * \param X        The MPI to shift. This must point to an initialized MPI.
+ * \param count    The number of bits to shift by.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_shift_r( mbedtls_mpi *X, size_t count );
+
+/**
+ * \brief          Compare the absolute values of two MPIs.
+ *
+ * \param X        The left-hand MPI. This must point to an initialized MPI.
+ * \param Y        The right-hand MPI. This must point to an initialized MPI.
+ *
+ * \return         \c 1 if `|X|` is greater than `|Y|`.
+ * \return         \c -1 if `|X|` is lesser than `|Y|`.
+ * \return         \c 0 if `|X|` is equal to `|Y|`.
+ */
+int mbedtls_mpi_cmp_abs( const mbedtls_mpi *X, const mbedtls_mpi *Y );
+
+/**
+ * \brief          Compare two MPIs.
+ *
+ * \param X        The left-hand MPI. This must point to an initialized MPI.
+ * \param Y        The right-hand MPI. This must point to an initialized MPI.
+ *
+ * \return         \c 1 if \p X is greater than \p Y.
+ * \return         \c -1 if \p X is lesser than \p Y.
+ * \return         \c 0 if \p X is equal to \p Y.
+ */
+int mbedtls_mpi_cmp_mpi( const mbedtls_mpi *X, const mbedtls_mpi *Y );
+
+/**
+ * \brief          Check if an MPI is less than the other in constant time.
+ *
+ * \param X        The left-hand MPI. This must point to an initialized MPI
+ *                 with the same allocated length as Y.
+ * \param Y        The right-hand MPI. This must point to an initialized MPI
+ *                 with the same allocated length as X.
+ * \param ret      The result of the comparison:
+ *                 \c 1 if \p X is less than \p Y.
+ *                 \c 0 if \p X is greater than or equal to \p Y.
+ *
+ * \return         0 on success.
+ * \return         MBEDTLS_ERR_MPI_BAD_INPUT_DATA if the allocated length of
+ *                 the two input MPIs is not the same.
+ */
+int mbedtls_mpi_lt_mpi_ct( const mbedtls_mpi *X, const mbedtls_mpi *Y,
+        unsigned *ret );
+
+/**
+ * \brief          Compare an MPI with an integer.
+ *
+ * \param X        The left-hand MPI. This must point to an initialized MPI.
+ * \param z        The integer value to compare \p X to.
+ *
+ * \return         \c 1 if \p X is greater than \p z.
+ * \return         \c -1 if \p X is lesser than \p z.
+ * \return         \c 0 if \p X is equal to \p z.
+ */
+int mbedtls_mpi_cmp_int( const mbedtls_mpi *X, mbedtls_mpi_sint z );
+
+/**
+ * \brief          Perform an unsigned addition of MPIs: X = |A| + |B|
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param A        The first summand. This must point to an initialized MPI.
+ * \param B        The second summand. This must point to an initialized MPI.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_add_abs( mbedtls_mpi *X, const mbedtls_mpi *A,
+                         const mbedtls_mpi *B );
+
+/**
+ * \brief          Perform an unsigned subtraction of MPIs: X = |A| - |B|
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param A        The minuend. This must point to an initialized MPI.
+ * \param B        The subtrahend. This must point to an initialized MPI.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_NEGATIVE_VALUE if \p B is greater than \p A.
+ * \return         Another negative error code on different kinds of failure.
+ *
+ */
+int mbedtls_mpi_sub_abs( mbedtls_mpi *X, const mbedtls_mpi *A,
+                         const mbedtls_mpi *B );
+
+/**
+ * \brief          Perform a signed addition of MPIs: X = A + B
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param A        The first summand. This must point to an initialized MPI.
+ * \param B        The second summand. This must point to an initialized MPI.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_add_mpi( mbedtls_mpi *X, const mbedtls_mpi *A,
+                         const mbedtls_mpi *B );
+
+/**
+ * \brief          Perform a signed subtraction of MPIs: X = A - B
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param A        The minuend. This must point to an initialized MPI.
+ * \param B        The subtrahend. This must point to an initialized MPI.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_sub_mpi( mbedtls_mpi *X, const mbedtls_mpi *A,
+                         const mbedtls_mpi *B );
+
+/**
+ * \brief          Perform a signed addition of an MPI and an integer: X = A + b
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param A        The first summand. This must point to an initialized MPI.
+ * \param b        The second summand.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_add_int( mbedtls_mpi *X, const mbedtls_mpi *A,
+                         mbedtls_mpi_sint b );
+
+/**
+ * \brief          Perform a signed subtraction of an MPI and an integer:
+ *                 X = A - b
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param A        The minuend. This must point to an initialized MPI.
+ * \param b        The subtrahend.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_sub_int( mbedtls_mpi *X, const mbedtls_mpi *A,
+                         mbedtls_mpi_sint b );
+
+/**
+ * \brief          Perform a multiplication of two MPIs: X = A * B
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param A        The first factor. This must point to an initialized MPI.
+ * \param B        The second factor. This must point to an initialized MPI.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ *
+ */
+int mbedtls_mpi_mul_mpi( mbedtls_mpi *X, const mbedtls_mpi *A,
+                         const mbedtls_mpi *B );
+
+/**
+ * \brief          Perform a multiplication of an MPI with an unsigned integer:
+ *                 X = A * b
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param A        The first factor. This must point to an initialized MPI.
+ * \param b        The second factor.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ *
+ */
+int mbedtls_mpi_mul_int( mbedtls_mpi *X, const mbedtls_mpi *A,
+                         mbedtls_mpi_uint b );
+
+/**
+ * \brief          Perform a division with remainder of two MPIs:
+ *                 A = Q * B + R
+ *
+ * \param Q        The destination MPI for the quotient.
+ *                 This may be \c NULL if the value of the
+ *                 quotient is not needed.
+ * \param R        The destination MPI for the remainder value.
+ *                 This may be \c NULL if the value of the
+ *                 remainder is not needed.
+ * \param A        The dividend. This must point to an initialized MPi.
+ * \param B        The divisor. This must point to an initialized MPI.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p B equals zero.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_div_mpi( mbedtls_mpi *Q, mbedtls_mpi *R, const mbedtls_mpi *A,
+                         const mbedtls_mpi *B );
+
+/**
+ * \brief          Perform a division with remainder of an MPI by an integer:
+ *                 A = Q * b + R
+ *
+ * \param Q        The destination MPI for the quotient.
+ *                 This may be \c NULL if the value of the
+ *                 quotient is not needed.
+ * \param R        The destination MPI for the remainder value.
+ *                 This may be \c NULL if the value of the
+ *                 remainder is not needed.
+ * \param A        The dividend. This must point to an initialized MPi.
+ * \param b        The divisor.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p b equals zero.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_div_int( mbedtls_mpi *Q, mbedtls_mpi *R, const mbedtls_mpi *A,
+                         mbedtls_mpi_sint b );
+
+/**
+ * \brief          Perform a modular reduction. R = A mod B
+ *
+ * \param R        The destination MPI for the residue value.
+ *                 This must point to an initialized MPI.
+ * \param A        The MPI to compute the residue of.
+ *                 This must point to an initialized MPI.
+ * \param B        The base of the modular reduction.
+ *                 This must point to an initialized MPI.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p B equals zero.
+ * \return         #MBEDTLS_ERR_MPI_NEGATIVE_VALUE if \p B is negative.
+ * \return         Another negative error code on different kinds of failure.
+ *
+ */
+int mbedtls_mpi_mod_mpi( mbedtls_mpi *R, const mbedtls_mpi *A,
+                         const mbedtls_mpi *B );
+
+/**
+ * \brief          Perform a modular reduction with respect to an integer.
+ *                 r = A mod b
+ *
+ * \param r        The address at which to store the residue.
+ *                 This must not be \c NULL.
+ * \param A        The MPI to compute the residue of.
+ *                 This must point to an initialized MPi.
+ * \param b        The integer base of the modular reduction.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p b equals zero.
+ * \return         #MBEDTLS_ERR_MPI_NEGATIVE_VALUE if \p b is negative.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A,
+                         mbedtls_mpi_sint b );
+
+/**
+ * \brief          Perform a sliding-window exponentiation: X = A^E mod N
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param A        The base of the exponentiation.
+ *                 This must point to an initialized MPI.
+ * \param E        The exponent MPI. This must point to an initialized MPI.
+ * \param N        The base for the modular reduction. This must point to an
+ *                 initialized MPI.
+ * \param prec_RR  A helper MPI depending solely on \p N which can be used to
+ *                 speed-up multiple modular exponentiations for the same value
+ *                 of \p N. This may be \c NULL. If it is not \c NULL, it must
+ *                 point to an initialized MPI. If it hasn't been used after
+ *                 the call to mbedtls_mpi_init(), this function will compute
+ *                 the helper value and store it in \p prec_RR for reuse on
+ *                 subsequent calls to this function. Otherwise, the function
+ *                 will assume that \p prec_RR holds the helper value set by a
+ *                 previous call to mbedtls_mpi_exp_mod(), and reuse it.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \c N is negative or
+ *                 even, or if \c E is negative.
+ * \return         Another negative error code on different kinds of failures.
+ *
+ */
+int mbedtls_mpi_exp_mod( mbedtls_mpi *X, const mbedtls_mpi *A,
+                         const mbedtls_mpi *E, const mbedtls_mpi *N,
+                         mbedtls_mpi *prec_RR );
+
+/**
+ * \brief          Fill an MPI with a number of random bytes.
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param size     The number of random bytes to generate.
+ * \param f_rng    The RNG function to use. This must not be \c NULL.
+ * \param p_rng    The RNG parameter to be passed to \p f_rng. This may be
+ *                 \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         Another negative error code on failure.
+ *
+ * \note           The bytes obtained from the RNG are interpreted
+ *                 as a big-endian representation of an MPI; this can
+ *                 be relevant in applications like deterministic ECDSA.
+ */
+int mbedtls_mpi_fill_random( mbedtls_mpi *X, size_t size,
+                     int (*f_rng)(void *, unsigned char *, size_t),
+                     void *p_rng );
+
+/** Generate a random number uniformly in a range.
+ *
+ * This function generates a random number between \p min inclusive and
+ * \p N exclusive.
+ *
+ * The procedure complies with RFC 6979 §3.3 (deterministic ECDSA)
+ * when the RNG is a suitably parametrized instance of HMAC_DRBG
+ * and \p min is \c 1.
+ *
+ * \note           There are `N - min` possible outputs. The lower bound
+ *                 \p min can be reached, but the upper bound \p N cannot.
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param min      The minimum value to return.
+ *                 It must be nonnegative.
+ * \param N        The upper bound of the range, exclusive.
+ *                 In other words, this is one plus the maximum value to return.
+ *                 \p N must be strictly larger than \p min.
+ * \param f_rng    The RNG function to use. This must not be \c NULL.
+ * \param p_rng    The RNG parameter to be passed to \p f_rng.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \p min or \p N is invalid
+ *                 or if they are incompatible.
+ * \return         #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if the implementation was
+ *                 unable to find a suitable value within a limited number
+ *                 of attempts. This has a negligible probability if \p N
+ *                 is significantly larger than \p min, which is the case
+ *                 for all usual cryptographic applications.
+ * \return         Another negative error code on failure.
+ */
+int mbedtls_mpi_random( mbedtls_mpi *X,
+                        mbedtls_mpi_sint min,
+                        const mbedtls_mpi *N,
+                        int (*f_rng)(void *, unsigned char *, size_t),
+                        void *p_rng );
+
+/**
+ * \brief          Compute the greatest common divisor: G = gcd(A, B)
+ *
+ * \param G        The destination MPI. This must point to an initialized MPI.
+ * \param A        The first operand. This must point to an initialized MPI.
+ * \param B        The second operand. This must point to an initialized MPI.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_gcd( mbedtls_mpi *G, const mbedtls_mpi *A,
+                     const mbedtls_mpi *B );
+
+/**
+ * \brief          Compute the modular inverse: X = A^-1 mod N
+ *
+ * \param X        The destination MPI. This must point to an initialized MPI.
+ * \param A        The MPI to calculate the modular inverse of. This must point
+ *                 to an initialized MPI.
+ * \param N        The base of the modular inversion. This must point to an
+ *                 initialized MPI.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \p N is less than
+ *                 or equal to one.
+ * \return         #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if \p has no modular inverse
+ *                 with respect to \p N.
+ */
+int mbedtls_mpi_inv_mod( mbedtls_mpi *X, const mbedtls_mpi *A,
+                         const mbedtls_mpi *N );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          Perform a Miller-Rabin primality test with error
+ *                 probability of 2<sup>-80</sup>.
+ *
+ * \deprecated     Superseded by mbedtls_mpi_is_prime_ext() which allows
+ *                 specifying the number of Miller-Rabin rounds.
+ *
+ * \param X        The MPI to check for primality.
+ *                 This must point to an initialized MPI.
+ * \param f_rng    The RNG function to use. This must not be \c NULL.
+ * \param p_rng    The RNG parameter to be passed to \p f_rng.
+ *                 This may be \c NULL if \p f_rng doesn't use a
+ *                 context parameter.
+ *
+ * \return         \c 0 if successful, i.e. \p X is probably prime.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if \p X is not prime.
+ * \return         Another negative error code on other kinds of failure.
+ */
+MBEDTLS_DEPRECATED int mbedtls_mpi_is_prime( const mbedtls_mpi *X,
+                          int (*f_rng)(void *, unsigned char *, size_t),
+                          void *p_rng );
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief          Miller-Rabin primality test.
+ *
+ * \warning        If \p X is potentially generated by an adversary, for example
+ *                 when validating cryptographic parameters that you didn't
+ *                 generate yourself and that are supposed to be prime, then
+ *                 \p rounds should be at least the half of the security
+ *                 strength of the cryptographic algorithm. On the other hand,
+ *                 if \p X is chosen uniformly or non-adversially (as is the
+ *                 case when mbedtls_mpi_gen_prime calls this function), then
+ *                 \p rounds can be much lower.
+ *
+ * \param X        The MPI to check for primality.
+ *                 This must point to an initialized MPI.
+ * \param rounds   The number of bases to perform the Miller-Rabin primality
+ *                 test for. The probability of returning 0 on a composite is
+ *                 at most 2<sup>-2*\p rounds</sup>.
+ * \param f_rng    The RNG function to use. This must not be \c NULL.
+ * \param p_rng    The RNG parameter to be passed to \p f_rng.
+ *                 This may be \c NULL if \p f_rng doesn't use
+ *                 a context parameter.
+ *
+ * \return         \c 0 if successful, i.e. \p X is probably prime.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if \p X is not prime.
+ * \return         Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_is_prime_ext( const mbedtls_mpi *X, int rounds,
+                              int (*f_rng)(void *, unsigned char *, size_t),
+                              void *p_rng );
+/**
+ * \brief Flags for mbedtls_mpi_gen_prime()
+ *
+ * Each of these flags is a constraint on the result X returned by
+ * mbedtls_mpi_gen_prime().
+ */
+typedef enum {
+    MBEDTLS_MPI_GEN_PRIME_FLAG_DH =      0x0001, /**< (X-1)/2 is prime too */
+    MBEDTLS_MPI_GEN_PRIME_FLAG_LOW_ERR = 0x0002, /**< lower error rate from 2<sup>-80</sup> to 2<sup>-128</sup> */
+} mbedtls_mpi_gen_prime_flag_t;
+
+/**
+ * \brief          Generate a prime number.
+ *
+ * \param X        The destination MPI to store the generated prime in.
+ *                 This must point to an initialized MPi.
+ * \param nbits    The required size of the destination MPI in bits.
+ *                 This must be between \c 3 and #MBEDTLS_MPI_MAX_BITS.
+ * \param flags    A mask of flags of type #mbedtls_mpi_gen_prime_flag_t.
+ * \param f_rng    The RNG function to use. This must not be \c NULL.
+ * \param p_rng    The RNG parameter to be passed to \p f_rng.
+ *                 This may be \c NULL if \p f_rng doesn't use
+ *                 a context parameter.
+ *
+ * \return         \c 0 if successful, in which case \p X holds a
+ *                 probably prime number.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return         #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if `nbits` is not between
+ *                 \c 3 and #MBEDTLS_MPI_MAX_BITS.
+ */
+int mbedtls_mpi_gen_prime( mbedtls_mpi *X, size_t nbits, int flags,
+                   int (*f_rng)(void *, unsigned char *, size_t),
+                   void *p_rng );
+#else /* MBEDTLS_BIGNUM_ALT */
+#include "bignum_alt.h"
+#endif /* MBEDTLS_BIGNUM_ALT */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ */
+int mbedtls_mpi_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* bignum.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/blowfish.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/blowfish.h
new file mode 100644
index 00000000000..77dca70d314
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/blowfish.h
@@ -0,0 +1,288 @@
+/**
+ * \file blowfish.h
+ *
+ * \brief Blowfish block cipher
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_BLOWFISH_H
+#define MBEDTLS_BLOWFISH_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "mbedtls/platform_util.h"
+
+#define MBEDTLS_BLOWFISH_ENCRYPT     1
+#define MBEDTLS_BLOWFISH_DECRYPT     0
+#define MBEDTLS_BLOWFISH_MAX_KEY_BITS     448
+#define MBEDTLS_BLOWFISH_MIN_KEY_BITS     32
+#define MBEDTLS_BLOWFISH_ROUNDS      16         /**< Rounds to use. When increasing this value, make sure to extend the initialisation vectors */
+#define MBEDTLS_BLOWFISH_BLOCKSIZE   8          /* Blowfish uses 64 bit blocks */
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#define MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x0016 )
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+/** Bad input data. */
+#define MBEDTLS_ERR_BLOWFISH_BAD_INPUT_DATA -0x0016
+
+/** Invalid data input length. */
+#define MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH -0x0018
+
+/* MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED is deprecated and should not be used.
+ */
+/** Blowfish hardware accelerator failed. */
+#define MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED                   -0x0017
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_BLOWFISH_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          Blowfish context structure
+ */
+typedef struct mbedtls_blowfish_context
+{
+    uint32_t P[MBEDTLS_BLOWFISH_ROUNDS + 2];    /*!<  Blowfish round keys    */
+    uint32_t S[4][256];                 /*!<  key dependent S-boxes  */
+}
+mbedtls_blowfish_context;
+
+#else  /* MBEDTLS_BLOWFISH_ALT */
+#include "blowfish_alt.h"
+#endif /* MBEDTLS_BLOWFISH_ALT */
+
+/**
+ * \brief          Initialize a Blowfish context.
+ *
+ * \param ctx      The Blowfish context to be initialized.
+ *                 This must not be \c NULL.
+ */
+void mbedtls_blowfish_init( mbedtls_blowfish_context *ctx );
+
+/**
+ * \brief          Clear a Blowfish context.
+ *
+ * \param ctx      The Blowfish context to be cleared.
+ *                 This may be \c NULL, in which case this function
+ *                 returns immediately. If it is not \c NULL, it must
+ *                 point to an initialized Blowfish context.
+ */
+void mbedtls_blowfish_free( mbedtls_blowfish_context *ctx );
+
+/**
+ * \brief          Perform a Blowfish key schedule operation.
+ *
+ * \param ctx      The Blowfish context to perform the key schedule on.
+ * \param key      The encryption key. This must be a readable buffer of
+ *                 length \p keybits Bits.
+ * \param keybits  The length of \p key in Bits. This must be between
+ *                 \c 32 and \c 448 and a multiple of \c 8.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_blowfish_setkey( mbedtls_blowfish_context *ctx, const unsigned char *key,
+                     unsigned int keybits );
+
+/**
+ * \brief          Perform a Blowfish-ECB block encryption/decryption operation.
+ *
+ * \param ctx      The Blowfish context to use. This must be initialized
+ *                 and bound to a key.
+ * \param mode     The mode of operation. Possible values are
+ *                 #MBEDTLS_BLOWFISH_ENCRYPT for encryption, or
+ *                 #MBEDTLS_BLOWFISH_DECRYPT for decryption.
+ * \param input    The input block. This must be a readable buffer
+ *                 of size \c 8 Bytes.
+ * \param output   The output block. This must be a writable buffer
+ *                 of size \c 8 Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_blowfish_crypt_ecb( mbedtls_blowfish_context *ctx,
+                        int mode,
+                        const unsigned char input[MBEDTLS_BLOWFISH_BLOCKSIZE],
+                        unsigned char output[MBEDTLS_BLOWFISH_BLOCKSIZE] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief          Perform a Blowfish-CBC buffer encryption/decryption operation.
+ *
+ * \note           Upon exit, the content of the IV is updated so that you can
+ *                 call the function same function again on the following
+ *                 block(s) of data and get the same result as if it was
+ *                 encrypted in one call. This allows a "streaming" usage.
+ *                 If on the other hand you need to retain the contents of the
+ *                 IV, you should either save it manually or use the cipher
+ *                 module instead.
+ *
+ * \param ctx      The Blowfish context to use. This must be initialized
+ *                 and bound to a key.
+ * \param mode     The mode of operation. Possible values are
+ *                 #MBEDTLS_BLOWFISH_ENCRYPT for encryption, or
+ *                 #MBEDTLS_BLOWFISH_DECRYPT for decryption.
+ * \param length   The length of the input data in Bytes. This must be
+ *                 multiple of \c 8.
+ * \param iv       The initialization vector. This must be a read/write buffer
+ *                 of length \c 8 Bytes. It is updated by this function.
+ * \param input    The input data. This must be a readable buffer of length
+ *                 \p length Bytes.
+ * \param output   The output data. This must be a writable buffer of length
+ *                 \p length Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_blowfish_crypt_cbc( mbedtls_blowfish_context *ctx,
+                        int mode,
+                        size_t length,
+                        unsigned char iv[MBEDTLS_BLOWFISH_BLOCKSIZE],
+                        const unsigned char *input,
+                        unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+/**
+ * \brief          Perform a Blowfish CFB buffer encryption/decryption operation.
+ *
+ * \note           Upon exit, the content of the IV is updated so that you can
+ *                 call the function same function again on the following
+ *                 block(s) of data and get the same result as if it was
+ *                 encrypted in one call. This allows a "streaming" usage.
+ *                 If on the other hand you need to retain the contents of the
+ *                 IV, you should either save it manually or use the cipher
+ *                 module instead.
+ *
+ * \param ctx      The Blowfish context to use. This must be initialized
+ *                 and bound to a key.
+ * \param mode     The mode of operation. Possible values are
+ *                 #MBEDTLS_BLOWFISH_ENCRYPT for encryption, or
+ *                 #MBEDTLS_BLOWFISH_DECRYPT for decryption.
+ * \param length   The length of the input data in Bytes.
+ * \param iv_off   The offset in the initialiation vector.
+ *                 The value pointed to must be smaller than \c 8 Bytes.
+ *                 It is updated by this function to support the aforementioned
+ *                 streaming usage.
+ * \param iv       The initialization vector. This must be a read/write buffer
+ *                 of size \c 8 Bytes. It is updated after use.
+ * \param input    The input data. This must be a readable buffer of length
+ *                 \p length Bytes.
+ * \param output   The output data. This must be a writable buffer of length
+ *                 \p length Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_blowfish_crypt_cfb64( mbedtls_blowfish_context *ctx,
+                          int mode,
+                          size_t length,
+                          size_t *iv_off,
+                          unsigned char iv[MBEDTLS_BLOWFISH_BLOCKSIZE],
+                          const unsigned char *input,
+                          unsigned char *output );
+#endif /*MBEDTLS_CIPHER_MODE_CFB */
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+/**
+ * \brief      Perform a Blowfish-CTR buffer encryption/decryption operation.
+ *
+ * \warning    You must never reuse a nonce value with the same key. Doing so
+ *             would void the encryption for the two messages encrypted with
+ *             the same nonce and key.
+ *
+ *             There are two common strategies for managing nonces with CTR:
+ *
+ *             1. You can handle everything as a single message processed over
+ *             successive calls to this function. In that case, you want to
+ *             set \p nonce_counter and \p nc_off to 0 for the first call, and
+ *             then preserve the values of \p nonce_counter, \p nc_off and \p
+ *             stream_block across calls to this function as they will be
+ *             updated by this function.
+ *
+ *             With this strategy, you must not encrypt more than 2**64
+ *             blocks of data with the same key.
+ *
+ *             2. You can encrypt separate messages by dividing the \p
+ *             nonce_counter buffer in two areas: the first one used for a
+ *             per-message nonce, handled by yourself, and the second one
+ *             updated by this function internally.
+ *
+ *             For example, you might reserve the first 4 bytes for the
+ *             per-message nonce, and the last 4 bytes for internal use. In that
+ *             case, before calling this function on a new message you need to
+ *             set the first 4 bytes of \p nonce_counter to your chosen nonce
+ *             value, the last 4 to 0, and \p nc_off to 0 (which will cause \p
+ *             stream_block to be ignored). That way, you can encrypt at most
+ *             2**32 messages of up to 2**32 blocks each with the same key.
+ *
+ *             The per-message nonce (or information sufficient to reconstruct
+ *             it) needs to be communicated with the ciphertext and must be unique.
+ *             The recommended way to ensure uniqueness is to use a message
+ *             counter.
+ *
+ *             Note that for both stategies, sizes are measured in blocks and
+ *             that a Blowfish block is 8 bytes.
+ *
+ * \warning    Upon return, \p stream_block contains sensitive data. Its
+ *             content must not be written to insecure storage and should be
+ *             securely discarded as soon as it's no longer needed.
+ *
+ * \param ctx           The Blowfish context to use. This must be initialized
+ *                      and bound to a key.
+ * \param length        The length of the input data in Bytes.
+ * \param nc_off        The offset in the current stream_block (for resuming
+ *                      within current cipher stream). The offset pointer
+ *                      should be \c 0 at the start of a stream and must be
+ *                      smaller than \c 8. It is updated by this function.
+ * \param nonce_counter The 64-bit nonce and counter. This must point to a
+ *                      read/write buffer of length \c 8 Bytes.
+ * \param stream_block  The saved stream-block for resuming. This must point to
+ *                      a read/write buffer of length \c 8 Bytes.
+ * \param input         The input data. This must be a readable buffer of
+ *                      length \p length Bytes.
+ * \param output        The output data. This must be a writable buffer of
+ *                      length \p length Bytes.
+ *
+ * \return              \c 0 if successful.
+ * \return              A negative error code on failure.
+ */
+int mbedtls_blowfish_crypt_ctr( mbedtls_blowfish_context *ctx,
+                        size_t length,
+                        size_t *nc_off,
+                        unsigned char nonce_counter[MBEDTLS_BLOWFISH_BLOCKSIZE],
+                        unsigned char stream_block[MBEDTLS_BLOWFISH_BLOCKSIZE],
+                        const unsigned char *input,
+                        unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CTR */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* blowfish.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
new file mode 100644
index 00000000000..31137cd4c23
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
@@ -0,0 +1,978 @@
+/**
+ * \file bn_mul.h
+ *
+ * \brief Multi-precision integer library
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+/*
+ *      Multiply source vector [s] with b, add result
+ *       to destination vector [d] and set carry c.
+ *
+ *      Currently supports:
+ *
+ *         . IA-32 (386+)         . AMD64 / EM64T
+ *         . IA-32 (SSE2)         . Motorola 68000
+ *         . PowerPC, 32-bit      . MicroBlaze
+ *         . PowerPC, 64-bit      . TriCore
+ *         . SPARC v8             . ARM v3+
+ *         . Alpha                . MIPS32
+ *         . C, longlong          . C, generic
+ */
+#ifndef MBEDTLS_BN_MUL_H
+#define MBEDTLS_BN_MUL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/bignum.h"
+
+
+/*
+ * Conversion macros for embedded constants:
+ * build lists of mbedtls_mpi_uint's from lists of unsigned char's grouped by 8, 4 or 2
+ */
+#if defined(MBEDTLS_HAVE_INT32)
+
+#define MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d )               \
+    ( (mbedtls_mpi_uint) (a) <<  0 ) |                        \
+    ( (mbedtls_mpi_uint) (b) <<  8 ) |                        \
+    ( (mbedtls_mpi_uint) (c) << 16 ) |                        \
+    ( (mbedtls_mpi_uint) (d) << 24 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_2( a, b )                   \
+    MBEDTLS_BYTES_TO_T_UINT_4( a, b, 0, 0 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h ) \
+    MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d ),                \
+    MBEDTLS_BYTES_TO_T_UINT_4( e, f, g, h )
+
+#else /* 64-bits */
+
+#define MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h )   \
+    ( (mbedtls_mpi_uint) (a) <<  0 ) |                        \
+    ( (mbedtls_mpi_uint) (b) <<  8 ) |                        \
+    ( (mbedtls_mpi_uint) (c) << 16 ) |                        \
+    ( (mbedtls_mpi_uint) (d) << 24 ) |                        \
+    ( (mbedtls_mpi_uint) (e) << 32 ) |                        \
+    ( (mbedtls_mpi_uint) (f) << 40 ) |                        \
+    ( (mbedtls_mpi_uint) (g) << 48 ) |                        \
+    ( (mbedtls_mpi_uint) (h) << 56 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d )             \
+    MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, 0, 0, 0, 0 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_2( a, b )                   \
+    MBEDTLS_BYTES_TO_T_UINT_8( a, b, 0, 0, 0, 0, 0, 0 )
+
+#endif /* bits in mbedtls_mpi_uint */
+
+#if defined(MBEDTLS_HAVE_ASM)
+
+#ifndef asm
+#define asm __asm
+#endif
+
+/* armcc5 --gnu defines __GNUC__ but doesn't support GNU's extended asm */
+#if defined(__GNUC__) && \
+    ( !defined(__ARMCC_VERSION) || __ARMCC_VERSION >= 6000000 )
+
+/*
+ * Disable use of the i386 assembly code below if option -O0, to disable all
+ * compiler optimisations, is passed, detected with __OPTIMIZE__
+ * This is done as the number of registers used in the assembly code doesn't
+ * work with the -O0 option.
+ */
+#if defined(__i386__) && defined(__OPTIMIZE__)
+
+#define MULADDC_INIT                        \
+    asm(                                    \
+        "movl   %%ebx, %0           \n\t"   \
+        "movl   %5, %%esi           \n\t"   \
+        "movl   %6, %%edi           \n\t"   \
+        "movl   %7, %%ecx           \n\t"   \
+        "movl   %8, %%ebx           \n\t"
+
+#define MULADDC_CORE                        \
+        "lodsl                      \n\t"   \
+        "mull   %%ebx               \n\t"   \
+        "addl   %%ecx,   %%eax      \n\t"   \
+        "adcl   $0,      %%edx      \n\t"   \
+        "addl   (%%edi), %%eax      \n\t"   \
+        "adcl   $0,      %%edx      \n\t"   \
+        "movl   %%edx,   %%ecx      \n\t"   \
+        "stosl                      \n\t"
+
+#if defined(MBEDTLS_HAVE_SSE2)
+
+#define MULADDC_HUIT                            \
+        "movd     %%ecx,     %%mm1      \n\t"   \
+        "movd     %%ebx,     %%mm0      \n\t"   \
+        "movd     (%%edi),   %%mm3      \n\t"   \
+        "paddq    %%mm3,     %%mm1      \n\t"   \
+        "movd     (%%esi),   %%mm2      \n\t"   \
+        "pmuludq  %%mm0,     %%mm2      \n\t"   \
+        "movd     4(%%esi),  %%mm4      \n\t"   \
+        "pmuludq  %%mm0,     %%mm4      \n\t"   \
+        "movd     8(%%esi),  %%mm6      \n\t"   \
+        "pmuludq  %%mm0,     %%mm6      \n\t"   \
+        "movd     12(%%esi), %%mm7      \n\t"   \
+        "pmuludq  %%mm0,     %%mm7      \n\t"   \
+        "paddq    %%mm2,     %%mm1      \n\t"   \
+        "movd     4(%%edi),  %%mm3      \n\t"   \
+        "paddq    %%mm4,     %%mm3      \n\t"   \
+        "movd     8(%%edi),  %%mm5      \n\t"   \
+        "paddq    %%mm6,     %%mm5      \n\t"   \
+        "movd     12(%%edi), %%mm4      \n\t"   \
+        "paddq    %%mm4,     %%mm7      \n\t"   \
+        "movd     %%mm1,     (%%edi)    \n\t"   \
+        "movd     16(%%esi), %%mm2      \n\t"   \
+        "pmuludq  %%mm0,     %%mm2      \n\t"   \
+        "psrlq    $32,       %%mm1      \n\t"   \
+        "movd     20(%%esi), %%mm4      \n\t"   \
+        "pmuludq  %%mm0,     %%mm4      \n\t"   \
+        "paddq    %%mm3,     %%mm1      \n\t"   \
+        "movd     24(%%esi), %%mm6      \n\t"   \
+        "pmuludq  %%mm0,     %%mm6      \n\t"   \
+        "movd     %%mm1,     4(%%edi)   \n\t"   \
+        "psrlq    $32,       %%mm1      \n\t"   \
+        "movd     28(%%esi), %%mm3      \n\t"   \
+        "pmuludq  %%mm0,     %%mm3      \n\t"   \
+        "paddq    %%mm5,     %%mm1      \n\t"   \
+        "movd     16(%%edi), %%mm5      \n\t"   \
+        "paddq    %%mm5,     %%mm2      \n\t"   \
+        "movd     %%mm1,     8(%%edi)   \n\t"   \
+        "psrlq    $32,       %%mm1      \n\t"   \
+        "paddq    %%mm7,     %%mm1      \n\t"   \
+        "movd     20(%%edi), %%mm5      \n\t"   \
+        "paddq    %%mm5,     %%mm4      \n\t"   \
+        "movd     %%mm1,     12(%%edi)  \n\t"   \
+        "psrlq    $32,       %%mm1      \n\t"   \
+        "paddq    %%mm2,     %%mm1      \n\t"   \
+        "movd     24(%%edi), %%mm5      \n\t"   \
+        "paddq    %%mm5,     %%mm6      \n\t"   \
+        "movd     %%mm1,     16(%%edi)  \n\t"   \
+        "psrlq    $32,       %%mm1      \n\t"   \
+        "paddq    %%mm4,     %%mm1      \n\t"   \
+        "movd     28(%%edi), %%mm5      \n\t"   \
+        "paddq    %%mm5,     %%mm3      \n\t"   \
+        "movd     %%mm1,     20(%%edi)  \n\t"   \
+        "psrlq    $32,       %%mm1      \n\t"   \
+        "paddq    %%mm6,     %%mm1      \n\t"   \
+        "movd     %%mm1,     24(%%edi)  \n\t"   \
+        "psrlq    $32,       %%mm1      \n\t"   \
+        "paddq    %%mm3,     %%mm1      \n\t"   \
+        "movd     %%mm1,     28(%%edi)  \n\t"   \
+        "addl     $32,       %%edi      \n\t"   \
+        "addl     $32,       %%esi      \n\t"   \
+        "psrlq    $32,       %%mm1      \n\t"   \
+        "movd     %%mm1,     %%ecx      \n\t"
+
+#define MULADDC_STOP                    \
+        "emms                   \n\t"   \
+        "movl   %4, %%ebx       \n\t"   \
+        "movl   %%ecx, %1       \n\t"   \
+        "movl   %%edi, %2       \n\t"   \
+        "movl   %%esi, %3       \n\t"   \
+        : "=m" (t), "=m" (c), "=m" (d), "=m" (s)        \
+        : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b)   \
+        : "eax", "ebx", "ecx", "edx", "esi", "edi"      \
+    );
+
+#else
+
+#define MULADDC_STOP                    \
+        "movl   %4, %%ebx       \n\t"   \
+        "movl   %%ecx, %1       \n\t"   \
+        "movl   %%edi, %2       \n\t"   \
+        "movl   %%esi, %3       \n\t"   \
+        : "=m" (t), "=m" (c), "=m" (d), "=m" (s)        \
+        : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b)   \
+        : "eax", "ebx", "ecx", "edx", "esi", "edi"      \
+    );
+#endif /* SSE2 */
+#endif /* i386 */
+
+#if defined(__amd64__) || defined (__x86_64__)
+
+#define MULADDC_INIT                        \
+    asm(                                    \
+        "xorq   %%r8, %%r8\n"
+
+#define MULADDC_CORE                        \
+        "movq   (%%rsi), %%rax\n"           \
+        "mulq   %%rbx\n"                    \
+        "addq   $8, %%rsi\n"                \
+        "addq   %%rcx, %%rax\n"             \
+        "movq   %%r8, %%rcx\n"              \
+        "adcq   $0, %%rdx\n"                \
+        "nop    \n"                         \
+        "addq   %%rax, (%%rdi)\n"           \
+        "adcq   %%rdx, %%rcx\n"             \
+        "addq   $8, %%rdi\n"
+
+#define MULADDC_STOP                        \
+        : "+c" (c), "+D" (d), "+S" (s), "+m" (*(uint64_t (*)[16]) d) \
+        : "b" (b), "m" (*(const uint64_t (*)[16]) s)                 \
+        : "rax", "rdx", "r8"                                         \
+    );
+
+#endif /* AMD64 */
+
+#if defined(__aarch64__)
+
+#define MULADDC_INIT                \
+    asm(
+
+#define MULADDC_CORE                \
+        "ldr x4, [%2], #8   \n\t"   \
+        "ldr x5, [%1]       \n\t"   \
+        "mul x6, x4, %4     \n\t"   \
+        "umulh x7, x4, %4   \n\t"   \
+        "adds x5, x5, x6    \n\t"   \
+        "adc x7, x7, xzr    \n\t"   \
+        "adds x5, x5, %0    \n\t"   \
+        "adc %0, x7, xzr    \n\t"   \
+        "str x5, [%1], #8   \n\t"
+
+#define MULADDC_STOP                                                    \
+         : "+r" (c),  "+r" (d), "+r" (s), "+m" (*(uint64_t (*)[16]) d)  \
+         : "r" (b), "m" (*(const uint64_t (*)[16]) s)                   \
+         : "x4", "x5", "x6", "x7", "cc"                                 \
+    );
+
+#endif /* Aarch64 */
+
+#if defined(__mc68020__) || defined(__mcpu32__)
+
+#define MULADDC_INIT                    \
+    asm(                                \
+        "movl   %3, %%a2        \n\t"   \
+        "movl   %4, %%a3        \n\t"   \
+        "movl   %5, %%d3        \n\t"   \
+        "movl   %6, %%d2        \n\t"   \
+        "moveq  #0, %%d0        \n\t"
+
+#define MULADDC_CORE                    \
+        "movel  %%a2@+, %%d1    \n\t"   \
+        "mulul  %%d2, %%d4:%%d1 \n\t"   \
+        "addl   %%d3, %%d1      \n\t"   \
+        "addxl  %%d0, %%d4      \n\t"   \
+        "moveq  #0,   %%d3      \n\t"   \
+        "addl   %%d1, %%a3@+    \n\t"   \
+        "addxl  %%d4, %%d3      \n\t"
+
+#define MULADDC_STOP                    \
+        "movl   %%d3, %0        \n\t"   \
+        "movl   %%a3, %1        \n\t"   \
+        "movl   %%a2, %2        \n\t"   \
+        : "=m" (c), "=m" (d), "=m" (s)              \
+        : "m" (s), "m" (d), "m" (c), "m" (b)        \
+        : "d0", "d1", "d2", "d3", "d4", "a2", "a3"  \
+    );
+
+#define MULADDC_HUIT                        \
+        "movel  %%a2@+,  %%d1       \n\t"   \
+        "mulul  %%d2,    %%d4:%%d1  \n\t"   \
+        "addxl  %%d3,    %%d1       \n\t"   \
+        "addxl  %%d0,    %%d4       \n\t"   \
+        "addl   %%d1,    %%a3@+     \n\t"   \
+        "movel  %%a2@+,  %%d1       \n\t"   \
+        "mulul  %%d2,    %%d3:%%d1  \n\t"   \
+        "addxl  %%d4,    %%d1       \n\t"   \
+        "addxl  %%d0,    %%d3       \n\t"   \
+        "addl   %%d1,    %%a3@+     \n\t"   \
+        "movel  %%a2@+,  %%d1       \n\t"   \
+        "mulul  %%d2,    %%d4:%%d1  \n\t"   \
+        "addxl  %%d3,    %%d1       \n\t"   \
+        "addxl  %%d0,    %%d4       \n\t"   \
+        "addl   %%d1,    %%a3@+     \n\t"   \
+        "movel  %%a2@+,  %%d1       \n\t"   \
+        "mulul  %%d2,    %%d3:%%d1  \n\t"   \
+        "addxl  %%d4,    %%d1       \n\t"   \
+        "addxl  %%d0,    %%d3       \n\t"   \
+        "addl   %%d1,    %%a3@+     \n\t"   \
+        "movel  %%a2@+,  %%d1       \n\t"   \
+        "mulul  %%d2,    %%d4:%%d1  \n\t"   \
+        "addxl  %%d3,    %%d1       \n\t"   \
+        "addxl  %%d0,    %%d4       \n\t"   \
+        "addl   %%d1,    %%a3@+     \n\t"   \
+        "movel  %%a2@+,  %%d1       \n\t"   \
+        "mulul  %%d2,    %%d3:%%d1  \n\t"   \
+        "addxl  %%d4,    %%d1       \n\t"   \
+        "addxl  %%d0,    %%d3       \n\t"   \
+        "addl   %%d1,    %%a3@+     \n\t"   \
+        "movel  %%a2@+,  %%d1       \n\t"   \
+        "mulul  %%d2,    %%d4:%%d1  \n\t"   \
+        "addxl  %%d3,    %%d1       \n\t"   \
+        "addxl  %%d0,    %%d4       \n\t"   \
+        "addl   %%d1,    %%a3@+     \n\t"   \
+        "movel  %%a2@+,  %%d1       \n\t"   \
+        "mulul  %%d2,    %%d3:%%d1  \n\t"   \
+        "addxl  %%d4,    %%d1       \n\t"   \
+        "addxl  %%d0,    %%d3       \n\t"   \
+        "addl   %%d1,    %%a3@+     \n\t"   \
+        "addxl  %%d0,    %%d3       \n\t"
+
+#endif /* MC68000 */
+
+#if defined(__powerpc64__) || defined(__ppc64__)
+
+#if defined(__MACH__) && defined(__APPLE__)
+
+#define MULADDC_INIT                        \
+    asm(                                    \
+        "ld     r3, %3              \n\t"   \
+        "ld     r4, %4              \n\t"   \
+        "ld     r5, %5              \n\t"   \
+        "ld     r6, %6              \n\t"   \
+        "addi   r3, r3, -8          \n\t"   \
+        "addi   r4, r4, -8          \n\t"   \
+        "addic  r5, r5,  0          \n\t"
+
+#define MULADDC_CORE                        \
+        "ldu    r7, 8(r3)           \n\t"   \
+        "mulld  r8, r7, r6          \n\t"   \
+        "mulhdu r9, r7, r6          \n\t"   \
+        "adde   r8, r8, r5          \n\t"   \
+        "ld     r7, 8(r4)           \n\t"   \
+        "addze  r5, r9              \n\t"   \
+        "addc   r8, r8, r7          \n\t"   \
+        "stdu   r8, 8(r4)           \n\t"
+
+#define MULADDC_STOP                        \
+        "addze  r5, r5              \n\t"   \
+        "addi   r4, r4, 8           \n\t"   \
+        "addi   r3, r3, 8           \n\t"   \
+        "std    r5, %0              \n\t"   \
+        "std    r4, %1              \n\t"   \
+        "std    r3, %2              \n\t"   \
+        : "=m" (c), "=m" (d), "=m" (s)              \
+        : "m" (s), "m" (d), "m" (c), "m" (b)        \
+        : "r3", "r4", "r5", "r6", "r7", "r8", "r9"  \
+    );
+
+
+#else /* __MACH__ && __APPLE__ */
+
+#define MULADDC_INIT                        \
+    asm(                                    \
+        "ld     %%r3, %3            \n\t"   \
+        "ld     %%r4, %4            \n\t"   \
+        "ld     %%r5, %5            \n\t"   \
+        "ld     %%r6, %6            \n\t"   \
+        "addi   %%r3, %%r3, -8      \n\t"   \
+        "addi   %%r4, %%r4, -8      \n\t"   \
+        "addic  %%r5, %%r5,  0      \n\t"
+
+#define MULADDC_CORE                        \
+        "ldu    %%r7, 8(%%r3)       \n\t"   \
+        "mulld  %%r8, %%r7, %%r6    \n\t"   \
+        "mulhdu %%r9, %%r7, %%r6    \n\t"   \
+        "adde   %%r8, %%r8, %%r5    \n\t"   \
+        "ld     %%r7, 8(%%r4)       \n\t"   \
+        "addze  %%r5, %%r9          \n\t"   \
+        "addc   %%r8, %%r8, %%r7    \n\t"   \
+        "stdu   %%r8, 8(%%r4)       \n\t"
+
+#define MULADDC_STOP                        \
+        "addze  %%r5, %%r5          \n\t"   \
+        "addi   %%r4, %%r4, 8       \n\t"   \
+        "addi   %%r3, %%r3, 8       \n\t"   \
+        "std    %%r5, %0            \n\t"   \
+        "std    %%r4, %1            \n\t"   \
+        "std    %%r3, %2            \n\t"   \
+        : "=m" (c), "=m" (d), "=m" (s)              \
+        : "m" (s), "m" (d), "m" (c), "m" (b)        \
+        : "r3", "r4", "r5", "r6", "r7", "r8", "r9"  \
+    );
+
+#endif /* __MACH__ && __APPLE__ */
+
+#elif defined(__powerpc__) || defined(__ppc__) /* end PPC64/begin PPC32  */
+
+#if defined(__MACH__) && defined(__APPLE__)
+
+#define MULADDC_INIT                    \
+    asm(                                \
+        "lwz    r3, %3          \n\t"   \
+        "lwz    r4, %4          \n\t"   \
+        "lwz    r5, %5          \n\t"   \
+        "lwz    r6, %6          \n\t"   \
+        "addi   r3, r3, -4      \n\t"   \
+        "addi   r4, r4, -4      \n\t"   \
+        "addic  r5, r5,  0      \n\t"
+
+#define MULADDC_CORE                    \
+        "lwzu   r7, 4(r3)       \n\t"   \
+        "mullw  r8, r7, r6      \n\t"   \
+        "mulhwu r9, r7, r6      \n\t"   \
+        "adde   r8, r8, r5      \n\t"   \
+        "lwz    r7, 4(r4)       \n\t"   \
+        "addze  r5, r9          \n\t"   \
+        "addc   r8, r8, r7      \n\t"   \
+        "stwu   r8, 4(r4)       \n\t"
+
+#define MULADDC_STOP                    \
+        "addze  r5, r5          \n\t"   \
+        "addi   r4, r4, 4       \n\t"   \
+        "addi   r3, r3, 4       \n\t"   \
+        "stw    r5, %0          \n\t"   \
+        "stw    r4, %1          \n\t"   \
+        "stw    r3, %2          \n\t"   \
+        : "=m" (c), "=m" (d), "=m" (s)              \
+        : "m" (s), "m" (d), "m" (c), "m" (b)        \
+        : "r3", "r4", "r5", "r6", "r7", "r8", "r9"  \
+    );
+
+#else /* __MACH__ && __APPLE__ */
+
+#define MULADDC_INIT                        \
+    asm(                                    \
+        "lwz    %%r3, %3            \n\t"   \
+        "lwz    %%r4, %4            \n\t"   \
+        "lwz    %%r5, %5            \n\t"   \
+        "lwz    %%r6, %6            \n\t"   \
+        "addi   %%r3, %%r3, -4      \n\t"   \
+        "addi   %%r4, %%r4, -4      \n\t"   \
+        "addic  %%r5, %%r5,  0      \n\t"
+
+#define MULADDC_CORE                        \
+        "lwzu   %%r7, 4(%%r3)       \n\t"   \
+        "mullw  %%r8, %%r7, %%r6    \n\t"   \
+        "mulhwu %%r9, %%r7, %%r6    \n\t"   \
+        "adde   %%r8, %%r8, %%r5    \n\t"   \
+        "lwz    %%r7, 4(%%r4)       \n\t"   \
+        "addze  %%r5, %%r9          \n\t"   \
+        "addc   %%r8, %%r8, %%r7    \n\t"   \
+        "stwu   %%r8, 4(%%r4)       \n\t"
+
+#define MULADDC_STOP                        \
+        "addze  %%r5, %%r5          \n\t"   \
+        "addi   %%r4, %%r4, 4       \n\t"   \
+        "addi   %%r3, %%r3, 4       \n\t"   \
+        "stw    %%r5, %0            \n\t"   \
+        "stw    %%r4, %1            \n\t"   \
+        "stw    %%r3, %2            \n\t"   \
+        : "=m" (c), "=m" (d), "=m" (s)              \
+        : "m" (s), "m" (d), "m" (c), "m" (b)        \
+        : "r3", "r4", "r5", "r6", "r7", "r8", "r9"  \
+    );
+
+#endif /* __MACH__ && __APPLE__ */
+
+#endif /* PPC32 */
+
+/*
+ * The Sparc(64) assembly is reported to be broken.
+ * Disable it for now, until we're able to fix it.
+ */
+#if 0 && defined(__sparc__)
+#if defined(__sparc64__)
+
+#define MULADDC_INIT                                    \
+    asm(                                                \
+                "ldx     %3, %%o0               \n\t"   \
+                "ldx     %4, %%o1               \n\t"   \
+                "ld      %5, %%o2               \n\t"   \
+                "ld      %6, %%o3               \n\t"
+
+#define MULADDC_CORE                                    \
+                "ld      [%%o0], %%o4           \n\t"   \
+                "inc     4, %%o0                \n\t"   \
+                "ld      [%%o1], %%o5           \n\t"   \
+                "umul    %%o3, %%o4, %%o4       \n\t"   \
+                "addcc   %%o4, %%o2, %%o4       \n\t"   \
+                "rd      %%y, %%g1              \n\t"   \
+                "addx    %%g1, 0, %%g1          \n\t"   \
+                "addcc   %%o4, %%o5, %%o4       \n\t"   \
+                "st      %%o4, [%%o1]           \n\t"   \
+                "addx    %%g1, 0, %%o2          \n\t"   \
+                "inc     4, %%o1                \n\t"
+
+        #define MULADDC_STOP                            \
+                "st      %%o2, %0               \n\t"   \
+                "stx     %%o1, %1               \n\t"   \
+                "stx     %%o0, %2               \n\t"   \
+        : "=m" (c), "=m" (d), "=m" (s)          \
+        : "m" (s), "m" (d), "m" (c), "m" (b)    \
+        : "g1", "o0", "o1", "o2", "o3", "o4",   \
+          "o5"                                  \
+        );
+
+#else /* __sparc64__ */
+
+#define MULADDC_INIT                                    \
+    asm(                                                \
+                "ld      %3, %%o0               \n\t"   \
+                "ld      %4, %%o1               \n\t"   \
+                "ld      %5, %%o2               \n\t"   \
+                "ld      %6, %%o3               \n\t"
+
+#define MULADDC_CORE                                    \
+                "ld      [%%o0], %%o4           \n\t"   \
+                "inc     4, %%o0                \n\t"   \
+                "ld      [%%o1], %%o5           \n\t"   \
+                "umul    %%o3, %%o4, %%o4       \n\t"   \
+                "addcc   %%o4, %%o2, %%o4       \n\t"   \
+                "rd      %%y, %%g1              \n\t"   \
+                "addx    %%g1, 0, %%g1          \n\t"   \
+                "addcc   %%o4, %%o5, %%o4       \n\t"   \
+                "st      %%o4, [%%o1]           \n\t"   \
+                "addx    %%g1, 0, %%o2          \n\t"   \
+                "inc     4, %%o1                \n\t"
+
+#define MULADDC_STOP                                    \
+                "st      %%o2, %0               \n\t"   \
+                "st      %%o1, %1               \n\t"   \
+                "st      %%o0, %2               \n\t"   \
+        : "=m" (c), "=m" (d), "=m" (s)          \
+        : "m" (s), "m" (d), "m" (c), "m" (b)    \
+        : "g1", "o0", "o1", "o2", "o3", "o4",   \
+          "o5"                                  \
+        );
+
+#endif /* __sparc64__ */
+#endif /* __sparc__ */
+
+#if defined(__microblaze__) || defined(microblaze)
+
+#define MULADDC_INIT                    \
+    asm(                                \
+        "lwi   r3,   %3         \n\t"   \
+        "lwi   r4,   %4         \n\t"   \
+        "lwi   r5,   %5         \n\t"   \
+        "lwi   r6,   %6         \n\t"   \
+        "andi  r7,   r6, 0xffff \n\t"   \
+        "bsrli r6,   r6, 16     \n\t"
+
+#define MULADDC_CORE                    \
+        "lhui  r8,   r3,   0    \n\t"   \
+        "addi  r3,   r3,   2    \n\t"   \
+        "lhui  r9,   r3,   0    \n\t"   \
+        "addi  r3,   r3,   2    \n\t"   \
+        "mul   r10,  r9,  r6    \n\t"   \
+        "mul   r11,  r8,  r7    \n\t"   \
+        "mul   r12,  r9,  r7    \n\t"   \
+        "mul   r13,  r8,  r6    \n\t"   \
+        "bsrli  r8, r10,  16    \n\t"   \
+        "bsrli  r9, r11,  16    \n\t"   \
+        "add   r13, r13,  r8    \n\t"   \
+        "add   r13, r13,  r9    \n\t"   \
+        "bslli r10, r10,  16    \n\t"   \
+        "bslli r11, r11,  16    \n\t"   \
+        "add   r12, r12, r10    \n\t"   \
+        "addc  r13, r13,  r0    \n\t"   \
+        "add   r12, r12, r11    \n\t"   \
+        "addc  r13, r13,  r0    \n\t"   \
+        "lwi   r10,  r4,   0    \n\t"   \
+        "add   r12, r12, r10    \n\t"   \
+        "addc  r13, r13,  r0    \n\t"   \
+        "add   r12, r12,  r5    \n\t"   \
+        "addc   r5, r13,  r0    \n\t"   \
+        "swi   r12,  r4,   0    \n\t"   \
+        "addi   r4,  r4,   4    \n\t"
+
+#define MULADDC_STOP                    \
+        "swi   r5,   %0         \n\t"   \
+        "swi   r4,   %1         \n\t"   \
+        "swi   r3,   %2         \n\t"   \
+        : "=m" (c), "=m" (d), "=m" (s)              \
+        : "m" (s), "m" (d), "m" (c), "m" (b)        \
+        : "r3", "r4", "r5", "r6", "r7", "r8",       \
+          "r9", "r10", "r11", "r12", "r13"          \
+    );
+
+#endif /* MicroBlaze */
+
+#if defined(__tricore__)
+
+#define MULADDC_INIT                            \
+    asm(                                        \
+        "ld.a   %%a2, %3                \n\t"   \
+        "ld.a   %%a3, %4                \n\t"   \
+        "ld.w   %%d4, %5                \n\t"   \
+        "ld.w   %%d1, %6                \n\t"   \
+        "xor    %%d5, %%d5              \n\t"
+
+#define MULADDC_CORE                            \
+        "ld.w   %%d0,   [%%a2+]         \n\t"   \
+        "madd.u %%e2, %%e4, %%d0, %%d1  \n\t"   \
+        "ld.w   %%d0,   [%%a3]          \n\t"   \
+        "addx   %%d2,    %%d2,  %%d0    \n\t"   \
+        "addc   %%d3,    %%d3,    0     \n\t"   \
+        "mov    %%d4,    %%d3           \n\t"   \
+        "st.w  [%%a3+],  %%d2           \n\t"
+
+#define MULADDC_STOP                            \
+        "st.w   %0, %%d4                \n\t"   \
+        "st.a   %1, %%a3                \n\t"   \
+        "st.a   %2, %%a2                \n\t"   \
+        : "=m" (c), "=m" (d), "=m" (s)          \
+        : "m" (s), "m" (d), "m" (c), "m" (b)    \
+        : "d0", "d1", "e2", "d4", "a2", "a3"    \
+    );
+
+#endif /* TriCore */
+
+/*
+ * Note, gcc -O0 by default uses r7 for the frame pointer, so it complains about
+ * our use of r7 below, unless -fomit-frame-pointer is passed.
+ *
+ * On the other hand, -fomit-frame-pointer is implied by any -Ox options with
+ * x !=0, which we can detect using __OPTIMIZE__ (which is also defined by
+ * clang and armcc5 under the same conditions).
+ *
+ * So, only use the optimized assembly below for optimized build, which avoids
+ * the build error and is pretty reasonable anyway.
+ */
+#if defined(__GNUC__) && !defined(__OPTIMIZE__)
+#define MULADDC_CANNOT_USE_R7
+#endif
+
+#if defined(__arm__) && !defined(MULADDC_CANNOT_USE_R7)
+
+#if defined(__thumb__) && !defined(__thumb2__)
+
+#define MULADDC_INIT                                    \
+    asm(                                                \
+            "ldr    r0, %3                      \n\t"   \
+            "ldr    r1, %4                      \n\t"   \
+            "ldr    r2, %5                      \n\t"   \
+            "ldr    r3, %6                      \n\t"   \
+            "lsr    r7, r3, #16                 \n\t"   \
+            "mov    r9, r7                      \n\t"   \
+            "lsl    r7, r3, #16                 \n\t"   \
+            "lsr    r7, r7, #16                 \n\t"   \
+            "mov    r8, r7                      \n\t"
+
+#define MULADDC_CORE                                    \
+            "ldmia  r0!, {r6}                   \n\t"   \
+            "lsr    r7, r6, #16                 \n\t"   \
+            "lsl    r6, r6, #16                 \n\t"   \
+            "lsr    r6, r6, #16                 \n\t"   \
+            "mov    r4, r8                      \n\t"   \
+            "mul    r4, r6                      \n\t"   \
+            "mov    r3, r9                      \n\t"   \
+            "mul    r6, r3                      \n\t"   \
+            "mov    r5, r9                      \n\t"   \
+            "mul    r5, r7                      \n\t"   \
+            "mov    r3, r8                      \n\t"   \
+            "mul    r7, r3                      \n\t"   \
+            "lsr    r3, r6, #16                 \n\t"   \
+            "add    r5, r5, r3                  \n\t"   \
+            "lsr    r3, r7, #16                 \n\t"   \
+            "add    r5, r5, r3                  \n\t"   \
+            "add    r4, r4, r2                  \n\t"   \
+            "mov    r2, #0                      \n\t"   \
+            "adc    r5, r2                      \n\t"   \
+            "lsl    r3, r6, #16                 \n\t"   \
+            "add    r4, r4, r3                  \n\t"   \
+            "adc    r5, r2                      \n\t"   \
+            "lsl    r3, r7, #16                 \n\t"   \
+            "add    r4, r4, r3                  \n\t"   \
+            "adc    r5, r2                      \n\t"   \
+            "ldr    r3, [r1]                    \n\t"   \
+            "add    r4, r4, r3                  \n\t"   \
+            "adc    r2, r5                      \n\t"   \
+            "stmia  r1!, {r4}                   \n\t"
+
+#define MULADDC_STOP                                    \
+            "str    r2, %0                      \n\t"   \
+            "str    r1, %1                      \n\t"   \
+            "str    r0, %2                      \n\t"   \
+         : "=m" (c),  "=m" (d), "=m" (s)        \
+         : "m" (s), "m" (d), "m" (c), "m" (b)   \
+         : "r0", "r1", "r2", "r3", "r4", "r5",  \
+           "r6", "r7", "r8", "r9", "cc"         \
+         );
+
+#elif (__ARM_ARCH >= 6) && \
+    defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)
+
+#define MULADDC_INIT                            \
+    asm(
+
+#define MULADDC_CORE                            \
+            "ldr    r0, [%0], #4        \n\t"   \
+            "ldr    r1, [%1]            \n\t"   \
+            "umaal  r1, %2, %3, r0      \n\t"   \
+            "str    r1, [%1], #4        \n\t"
+
+#define MULADDC_STOP                            \
+         : "=r" (s),  "=r" (d), "=r" (c)        \
+         : "r" (b), "0" (s), "1" (d), "2" (c)   \
+         : "r0", "r1", "memory"                 \
+         );
+
+#else
+
+#define MULADDC_INIT                                    \
+    asm(                                                \
+            "ldr    r0, %3                      \n\t"   \
+            "ldr    r1, %4                      \n\t"   \
+            "ldr    r2, %5                      \n\t"   \
+            "ldr    r3, %6                      \n\t"
+
+#define MULADDC_CORE                                    \
+            "ldr    r4, [r0], #4                \n\t"   \
+            "mov    r5, #0                      \n\t"   \
+            "ldr    r6, [r1]                    \n\t"   \
+            "umlal  r2, r5, r3, r4              \n\t"   \
+            "adds   r7, r6, r2                  \n\t"   \
+            "adc    r2, r5, #0                  \n\t"   \
+            "str    r7, [r1], #4                \n\t"
+
+#define MULADDC_STOP                                    \
+            "str    r2, %0                      \n\t"   \
+            "str    r1, %1                      \n\t"   \
+            "str    r0, %2                      \n\t"   \
+         : "=m" (c),  "=m" (d), "=m" (s)        \
+         : "m" (s), "m" (d), "m" (c), "m" (b)   \
+         : "r0", "r1", "r2", "r3", "r4", "r5",  \
+           "r6", "r7", "cc"                     \
+         );
+
+#endif /* Thumb */
+
+#endif /* ARMv3 */
+
+#if defined(__alpha__)
+
+#define MULADDC_INIT                    \
+    asm(                                \
+        "ldq    $1, %3          \n\t"   \
+        "ldq    $2, %4          \n\t"   \
+        "ldq    $3, %5          \n\t"   \
+        "ldq    $4, %6          \n\t"
+
+#define MULADDC_CORE                    \
+        "ldq    $6,  0($1)      \n\t"   \
+        "addq   $1,  8, $1      \n\t"   \
+        "mulq   $6, $4, $7      \n\t"   \
+        "umulh  $6, $4, $6      \n\t"   \
+        "addq   $7, $3, $7      \n\t"   \
+        "cmpult $7, $3, $3      \n\t"   \
+        "ldq    $5,  0($2)      \n\t"   \
+        "addq   $7, $5, $7      \n\t"   \
+        "cmpult $7, $5, $5      \n\t"   \
+        "stq    $7,  0($2)      \n\t"   \
+        "addq   $2,  8, $2      \n\t"   \
+        "addq   $6, $3, $3      \n\t"   \
+        "addq   $5, $3, $3      \n\t"
+
+#define MULADDC_STOP                                    \
+        "stq    $3, %0          \n\t"   \
+        "stq    $2, %1          \n\t"   \
+        "stq    $1, %2          \n\t"   \
+        : "=m" (c), "=m" (d), "=m" (s)              \
+        : "m" (s), "m" (d), "m" (c), "m" (b)        \
+        : "$1", "$2", "$3", "$4", "$5", "$6", "$7"  \
+    );
+#endif /* Alpha */
+
+#if defined(__mips__) && !defined(__mips64)
+
+#define MULADDC_INIT                    \
+    asm(                                \
+        "lw     $10, %3         \n\t"   \
+        "lw     $11, %4         \n\t"   \
+        "lw     $12, %5         \n\t"   \
+        "lw     $13, %6         \n\t"
+
+#define MULADDC_CORE                    \
+        "lw     $14, 0($10)     \n\t"   \
+        "multu  $13, $14        \n\t"   \
+        "addi   $10, $10, 4     \n\t"   \
+        "mflo   $14             \n\t"   \
+        "mfhi   $9              \n\t"   \
+        "addu   $14, $12, $14   \n\t"   \
+        "lw     $15, 0($11)     \n\t"   \
+        "sltu   $12, $14, $12   \n\t"   \
+        "addu   $15, $14, $15   \n\t"   \
+        "sltu   $14, $15, $14   \n\t"   \
+        "addu   $12, $12, $9    \n\t"   \
+        "sw     $15, 0($11)     \n\t"   \
+        "addu   $12, $12, $14   \n\t"   \
+        "addi   $11, $11, 4     \n\t"
+
+#define MULADDC_STOP                    \
+        "sw     $12, %0         \n\t"   \
+        "sw     $11, %1         \n\t"   \
+        "sw     $10, %2         \n\t"   \
+        : "=m" (c), "=m" (d), "=m" (s)                      \
+        : "m" (s), "m" (d), "m" (c), "m" (b)                \
+        : "$9", "$10", "$11", "$12", "$13", "$14", "$15", "lo", "hi" \
+    );
+
+#endif /* MIPS */
+#endif /* GNUC */
+
+#if (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
+
+#define MULADDC_INIT                            \
+    __asm   mov     esi, s                      \
+    __asm   mov     edi, d                      \
+    __asm   mov     ecx, c                      \
+    __asm   mov     ebx, b
+
+#define MULADDC_CORE                            \
+    __asm   lodsd                               \
+    __asm   mul     ebx                         \
+    __asm   add     eax, ecx                    \
+    __asm   adc     edx, 0                      \
+    __asm   add     eax, [edi]                  \
+    __asm   adc     edx, 0                      \
+    __asm   mov     ecx, edx                    \
+    __asm   stosd
+
+#if defined(MBEDTLS_HAVE_SSE2)
+
+#define EMIT __asm _emit
+
+#define MULADDC_HUIT                            \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0xC9             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0xC3             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x1F             \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xCB             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x16             \
+    EMIT 0x0F  EMIT 0xF4  EMIT 0xD0             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x66  EMIT 0x04  \
+    EMIT 0x0F  EMIT 0xF4  EMIT 0xE0             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x76  EMIT 0x08  \
+    EMIT 0x0F  EMIT 0xF4  EMIT 0xF0             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x7E  EMIT 0x0C  \
+    EMIT 0x0F  EMIT 0xF4  EMIT 0xF8             \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xCA             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x5F  EMIT 0x04  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xDC             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x6F  EMIT 0x08  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xEE             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x67  EMIT 0x0C  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xFC             \
+    EMIT 0x0F  EMIT 0x7E  EMIT 0x0F             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x56  EMIT 0x10  \
+    EMIT 0x0F  EMIT 0xF4  EMIT 0xD0             \
+    EMIT 0x0F  EMIT 0x73  EMIT 0xD1  EMIT 0x20  \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x66  EMIT 0x14  \
+    EMIT 0x0F  EMIT 0xF4  EMIT 0xE0             \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xCB             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x76  EMIT 0x18  \
+    EMIT 0x0F  EMIT 0xF4  EMIT 0xF0             \
+    EMIT 0x0F  EMIT 0x7E  EMIT 0x4F  EMIT 0x04  \
+    EMIT 0x0F  EMIT 0x73  EMIT 0xD1  EMIT 0x20  \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x5E  EMIT 0x1C  \
+    EMIT 0x0F  EMIT 0xF4  EMIT 0xD8             \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xCD             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x6F  EMIT 0x10  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xD5             \
+    EMIT 0x0F  EMIT 0x7E  EMIT 0x4F  EMIT 0x08  \
+    EMIT 0x0F  EMIT 0x73  EMIT 0xD1  EMIT 0x20  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xCF             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x6F  EMIT 0x14  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xE5             \
+    EMIT 0x0F  EMIT 0x7E  EMIT 0x4F  EMIT 0x0C  \
+    EMIT 0x0F  EMIT 0x73  EMIT 0xD1  EMIT 0x20  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xCA             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x6F  EMIT 0x18  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xF5             \
+    EMIT 0x0F  EMIT 0x7E  EMIT 0x4F  EMIT 0x10  \
+    EMIT 0x0F  EMIT 0x73  EMIT 0xD1  EMIT 0x20  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xCC             \
+    EMIT 0x0F  EMIT 0x6E  EMIT 0x6F  EMIT 0x1C  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xDD             \
+    EMIT 0x0F  EMIT 0x7E  EMIT 0x4F  EMIT 0x14  \
+    EMIT 0x0F  EMIT 0x73  EMIT 0xD1  EMIT 0x20  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xCE             \
+    EMIT 0x0F  EMIT 0x7E  EMIT 0x4F  EMIT 0x18  \
+    EMIT 0x0F  EMIT 0x73  EMIT 0xD1  EMIT 0x20  \
+    EMIT 0x0F  EMIT 0xD4  EMIT 0xCB             \
+    EMIT 0x0F  EMIT 0x7E  EMIT 0x4F  EMIT 0x1C  \
+    EMIT 0x83  EMIT 0xC7  EMIT 0x20             \
+    EMIT 0x83  EMIT 0xC6  EMIT 0x20             \
+    EMIT 0x0F  EMIT 0x73  EMIT 0xD1  EMIT 0x20  \
+    EMIT 0x0F  EMIT 0x7E  EMIT 0xC9
+
+#define MULADDC_STOP                            \
+    EMIT 0x0F  EMIT 0x77                        \
+    __asm   mov     c, ecx                      \
+    __asm   mov     d, edi                      \
+    __asm   mov     s, esi                      \
+
+#else
+
+#define MULADDC_STOP                            \
+    __asm   mov     c, ecx                      \
+    __asm   mov     d, edi                      \
+    __asm   mov     s, esi                      \
+
+#endif /* SSE2 */
+#endif /* MSVC */
+
+#endif /* MBEDTLS_HAVE_ASM */
+
+#if !defined(MULADDC_CORE)
+#if defined(MBEDTLS_HAVE_UDBL)
+
+#define MULADDC_INIT                    \
+{                                       \
+    mbedtls_t_udbl r;                           \
+    mbedtls_mpi_uint r0, r1;
+
+#define MULADDC_CORE                    \
+    r   = *(s++) * (mbedtls_t_udbl) b;          \
+    r0  = (mbedtls_mpi_uint) r;                   \
+    r1  = (mbedtls_mpi_uint)( r >> biL );         \
+    r0 += c;  r1 += (r0 <  c);          \
+    r0 += *d; r1 += (r0 < *d);          \
+    c = r1; *(d++) = r0;
+
+#define MULADDC_STOP                    \
+}
+
+#else
+#define MULADDC_INIT                    \
+{                                       \
+    mbedtls_mpi_uint s0, s1, b0, b1;              \
+    mbedtls_mpi_uint r0, r1, rx, ry;              \
+    b0 = ( b << biH ) >> biH;           \
+    b1 = ( b >> biH );
+
+#define MULADDC_CORE                    \
+    s0 = ( *s << biH ) >> biH;          \
+    s1 = ( *s >> biH ); s++;            \
+    rx = s0 * b1; r0 = s0 * b0;         \
+    ry = s1 * b0; r1 = s1 * b1;         \
+    r1 += ( rx >> biH );                \
+    r1 += ( ry >> biH );                \
+    rx <<= biH; ry <<= biH;             \
+    r0 += rx; r1 += (r0 < rx);          \
+    r0 += ry; r1 += (r0 < ry);          \
+    r0 +=  c; r1 += (r0 <  c);          \
+    r0 += *d; r1 += (r0 < *d);          \
+    c = r1; *(d++) = r0;
+
+#define MULADDC_STOP                    \
+}
+
+#endif /* C (generic)  */
+#endif /* C (longlong) */
+
+#endif /* bn_mul.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/camellia.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/camellia.h
new file mode 100644
index 00000000000..925a623e47e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/camellia.h
@@ -0,0 +1,327 @@
+/**
+ * \file camellia.h
+ *
+ * \brief Camellia block cipher
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_CAMELLIA_H
+#define MBEDTLS_CAMELLIA_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "mbedtls/platform_util.h"
+
+#define MBEDTLS_CAMELLIA_ENCRYPT     1
+#define MBEDTLS_CAMELLIA_DECRYPT     0
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#define MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x0024 )
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+/** Bad input data. */
+#define MBEDTLS_ERR_CAMELLIA_BAD_INPUT_DATA -0x0024
+
+/** Invalid data input length. */
+#define MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH -0x0026
+
+/* MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED is deprecated and should not be used.
+ */
+/** Camellia hardware accelerator failed. */
+#define MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED              -0x0027
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_CAMELLIA_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          CAMELLIA context structure
+ */
+typedef struct mbedtls_camellia_context
+{
+    int nr;                     /*!<  number of rounds  */
+    uint32_t rk[68];            /*!<  CAMELLIA round keys    */
+}
+mbedtls_camellia_context;
+
+#else  /* MBEDTLS_CAMELLIA_ALT */
+#include "camellia_alt.h"
+#endif /* MBEDTLS_CAMELLIA_ALT */
+
+/**
+ * \brief          Initialize a CAMELLIA context.
+ *
+ * \param ctx      The CAMELLIA context to be initialized.
+ *                 This must not be \c NULL.
+ */
+void mbedtls_camellia_init( mbedtls_camellia_context *ctx );
+
+/**
+ * \brief          Clear a CAMELLIA context.
+ *
+ * \param ctx      The CAMELLIA context to be cleared. This may be \c NULL,
+ *                 in which case this function returns immediately. If it is not
+ *                 \c NULL, it must be initialized.
+ */
+void mbedtls_camellia_free( mbedtls_camellia_context *ctx );
+
+/**
+ * \brief          Perform a CAMELLIA key schedule operation for encryption.
+ *
+ * \param ctx      The CAMELLIA context to use. This must be initialized.
+ * \param key      The encryption key to use. This must be a readable buffer
+ *                 of size \p keybits Bits.
+ * \param keybits  The length of \p key in Bits. This must be either \c 128,
+ *                 \c 192 or \c 256.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_camellia_setkey_enc( mbedtls_camellia_context *ctx,
+                                 const unsigned char *key,
+                                 unsigned int keybits );
+
+/**
+ * \brief          Perform a CAMELLIA key schedule operation for decryption.
+ *
+ * \param ctx      The CAMELLIA context to use. This must be initialized.
+ * \param key      The decryption key. This must be a readable buffer
+ *                 of size \p keybits Bits.
+ * \param keybits  The length of \p key in Bits. This must be either \c 128,
+ *                 \c 192 or \c 256.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_camellia_setkey_dec( mbedtls_camellia_context *ctx,
+                                 const unsigned char *key,
+                                 unsigned int keybits );
+
+/**
+ * \brief          Perform a CAMELLIA-ECB block encryption/decryption operation.
+ *
+ * \param ctx      The CAMELLIA context to use. This must be initialized
+ *                 and bound to a key.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_CAMELLIA_ENCRYPT or #MBEDTLS_CAMELLIA_DECRYPT.
+ * \param input    The input block. This must be a readable buffer
+ *                 of size \c 16 Bytes.
+ * \param output   The output block. This must be a writable buffer
+ *                 of size \c 16 Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_camellia_crypt_ecb( mbedtls_camellia_context *ctx,
+                    int mode,
+                    const unsigned char input[16],
+                    unsigned char output[16] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief          Perform a CAMELLIA-CBC buffer encryption/decryption operation.
+ *
+ * \note           Upon exit, the content of the IV is updated so that you can
+ *                 call the function same function again on the following
+ *                 block(s) of data and get the same result as if it was
+ *                 encrypted in one call. This allows a "streaming" usage.
+ *                 If on the other hand you need to retain the contents of the
+ *                 IV, you should either save it manually or use the cipher
+ *                 module instead.
+ *
+ * \param ctx      The CAMELLIA context to use. This must be initialized
+ *                 and bound to a key.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_CAMELLIA_ENCRYPT or #MBEDTLS_CAMELLIA_DECRYPT.
+ * \param length   The length in Bytes of the input data \p input.
+ *                 This must be a multiple of \c 16 Bytes.
+ * \param iv       The initialization vector. This must be a read/write buffer
+ *                 of length \c 16 Bytes. It is updated to allow streaming
+ *                 use as explained above.
+ * \param input    The buffer holding the input data. This must point to a
+ *                 readable buffer of length \p length Bytes.
+ * \param output   The buffer holding the output data. This must point to a
+ *                 writable buffer of length \p length Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_camellia_crypt_cbc( mbedtls_camellia_context *ctx,
+                    int mode,
+                    size_t length,
+                    unsigned char iv[16],
+                    const unsigned char *input,
+                    unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+/**
+ * \brief          Perform a CAMELLIA-CFB128 buffer encryption/decryption
+ *                 operation.
+ *
+ * \note           Due to the nature of CFB mode, you should use the same
+ *                 key for both encryption and decryption. In particular, calls
+ *                 to this function should be preceded by a key-schedule via
+ *                 mbedtls_camellia_setkey_enc() regardless of whether \p mode
+ *                 is #MBEDTLS_CAMELLIA_ENCRYPT or #MBEDTLS_CAMELLIA_DECRYPT.
+ *
+ * \note           Upon exit, the content of the IV is updated so that you can
+ *                 call the function same function again on the following
+ *                 block(s) of data and get the same result as if it was
+ *                 encrypted in one call. This allows a "streaming" usage.
+ *                 If on the other hand you need to retain the contents of the
+ *                 IV, you should either save it manually or use the cipher
+ *                 module instead.
+ *
+ * \param ctx      The CAMELLIA context to use. This must be initialized
+ *                 and bound to a key.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_CAMELLIA_ENCRYPT or #MBEDTLS_CAMELLIA_DECRYPT.
+ * \param length   The length of the input data \p input. Any value is allowed.
+ * \param iv_off   The current offset in the IV. This must be smaller
+ *                 than \c 16 Bytes. It is updated after this call to allow
+ *                 the aforementioned streaming usage.
+ * \param iv       The initialization vector. This must be a read/write buffer
+ *                 of length \c 16 Bytes. It is updated after this call to
+ *                 allow the aforementioned streaming usage.
+ * \param input    The buffer holding the input data. This must be a readable
+ *                 buffer of size \p length Bytes.
+ * \param output   The buffer to hold the output data. This must be a writable
+ *                 buffer of length \p length Bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_camellia_crypt_cfb128( mbedtls_camellia_context *ctx,
+                       int mode,
+                       size_t length,
+                       size_t *iv_off,
+                       unsigned char iv[16],
+                       const unsigned char *input,
+                       unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CFB */
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+/**
+ * \brief      Perform a CAMELLIA-CTR buffer encryption/decryption operation.
+ *
+ * *note       Due to the nature of CTR mode, you should use the same
+ *             key for both encryption and decryption. In particular, calls
+ *             to this function should be preceded by a key-schedule via
+ *             mbedtls_camellia_setkey_enc() regardless of whether \p mode
+ *             is #MBEDTLS_CAMELLIA_ENCRYPT or #MBEDTLS_CAMELLIA_DECRYPT.
+ *
+ * \warning    You must never reuse a nonce value with the same key. Doing so
+ *             would void the encryption for the two messages encrypted with
+ *             the same nonce and key.
+ *
+ *             There are two common strategies for managing nonces with CTR:
+ *
+ *             1. You can handle everything as a single message processed over
+ *             successive calls to this function. In that case, you want to
+ *             set \p nonce_counter and \p nc_off to 0 for the first call, and
+ *             then preserve the values of \p nonce_counter, \p nc_off and \p
+ *             stream_block across calls to this function as they will be
+ *             updated by this function.
+ *
+ *             With this strategy, you must not encrypt more than 2**128
+ *             blocks of data with the same key.
+ *
+ *             2. You can encrypt separate messages by dividing the \p
+ *             nonce_counter buffer in two areas: the first one used for a
+ *             per-message nonce, handled by yourself, and the second one
+ *             updated by this function internally.
+ *
+ *             For example, you might reserve the first \c 12 Bytes for the
+ *             per-message nonce, and the last \c 4 Bytes for internal use.
+ *             In that case, before calling this function on a new message you
+ *             need to set the first \c 12 Bytes of \p nonce_counter to your
+ *             chosen nonce value, the last four to \c 0, and \p nc_off to \c 0
+ *             (which will cause \p stream_block to be ignored). That way, you
+ *             can encrypt at most \c 2**96 messages of up to \c 2**32 blocks
+ *             each  with the same key.
+ *
+ *             The per-message nonce (or information sufficient to reconstruct
+ *             it) needs to be communicated with the ciphertext and must be
+ *             unique. The recommended way to ensure uniqueness is to use a
+ *             message counter. An alternative is to generate random nonces,
+ *             but this limits the number of messages that can be securely
+ *             encrypted: for example, with 96-bit random nonces, you should
+ *             not encrypt more than 2**32 messages with the same key.
+ *
+ *             Note that for both stategies, sizes are measured in blocks and
+ *             that a CAMELLIA block is \c 16 Bytes.
+ *
+ * \warning    Upon return, \p stream_block contains sensitive data. Its
+ *             content must not be written to insecure storage and should be
+ *             securely discarded as soon as it's no longer needed.
+ *
+ * \param ctx           The CAMELLIA context to use. This must be initialized
+ *                      and bound to a key.
+ * \param length        The length of the input data \p input in Bytes.
+ *                      Any value is allowed.
+ * \param nc_off        The offset in the current \p stream_block (for resuming
+ *                      within current cipher stream). The offset pointer to
+ *                      should be \c 0 at the start of a stream. It is updated
+ *                      at the end of this call.
+ * \param nonce_counter The 128-bit nonce and counter. This must be a read/write
+ *                      buffer of length \c 16 Bytes.
+ * \param stream_block  The saved stream-block for resuming. This must be a
+ *                      read/write buffer of length \c 16 Bytes.
+ * \param input         The input data stream. This must be a readable buffer of
+ *                      size \p length Bytes.
+ * \param output        The output data stream. This must be a writable buffer
+ *                      of size \p length Bytes.
+ *
+ * \return              \c 0 if successful.
+ * \return              A negative error code on failure.
+ */
+int mbedtls_camellia_crypt_ctr( mbedtls_camellia_context *ctx,
+                       size_t length,
+                       size_t *nc_off,
+                       unsigned char nonce_counter[16],
+                       unsigned char stream_block[16],
+                       const unsigned char *input,
+                       unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CTR */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ */
+int mbedtls_camellia_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* camellia.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ccm.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ccm.h
new file mode 100644
index 00000000000..ece5a901cb6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ccm.h
@@ -0,0 +1,311 @@
+/**
+ * \file ccm.h
+ *
+ * \brief This file provides an API for the CCM authenticated encryption
+ *        mode for block ciphers.
+ *
+ * CCM combines Counter mode encryption with CBC-MAC authentication
+ * for 128-bit block ciphers.
+ *
+ * Input to CCM includes the following elements:
+ * <ul><li>Payload - data that is both authenticated and encrypted.</li>
+ * <li>Associated data (Adata) - data that is authenticated but not
+ * encrypted, For example, a header.</li>
+ * <li>Nonce - A unique value that is assigned to the payload and the
+ * associated data.</li></ul>
+ *
+ * Definition of CCM:
+ * http://csrc.nist.gov/publications/nistpubs/800-38C/SP800-38C_updated-July20_2007.pdf
+ * RFC 3610 "Counter with CBC-MAC (CCM)"
+ *
+ * Related:
+ * RFC 5116 "An Interface and Algorithms for Authenticated Encryption"
+ *
+ * Definition of CCM*:
+ * IEEE 802.15.4 - IEEE Standard for Local and metropolitan area networks
+ * Integer representation is fixed most-significant-octet-first order and
+ * the representation of octets is most-significant-bit-first order. This is
+ * consistent with RFC 3610.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CCM_H
+#define MBEDTLS_CCM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/cipher.h"
+
+/** Bad input parameters to the function. */
+#define MBEDTLS_ERR_CCM_BAD_INPUT       -0x000D
+/** Authenticated decryption failed. */
+#define MBEDTLS_ERR_CCM_AUTH_FAILED     -0x000F
+
+/* MBEDTLS_ERR_CCM_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** CCM hardware accelerator failed. */
+#define MBEDTLS_ERR_CCM_HW_ACCEL_FAILED -0x0011
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_CCM_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief    The CCM context-type definition. The CCM context is passed
+ *           to the APIs called.
+ */
+typedef struct mbedtls_ccm_context
+{
+    mbedtls_cipher_context_t cipher_ctx;    /*!< The cipher context used. */
+}
+mbedtls_ccm_context;
+
+#else  /* MBEDTLS_CCM_ALT */
+#include "ccm_alt.h"
+#endif /* MBEDTLS_CCM_ALT */
+
+/**
+ * \brief           This function initializes the specified CCM context,
+ *                  to make references valid, and prepare the context
+ *                  for mbedtls_ccm_setkey() or mbedtls_ccm_free().
+ *
+ * \param ctx       The CCM context to initialize. This must not be \c NULL.
+ */
+void mbedtls_ccm_init( mbedtls_ccm_context *ctx );
+
+/**
+ * \brief           This function initializes the CCM context set in the
+ *                  \p ctx parameter and sets the encryption key.
+ *
+ * \param ctx       The CCM context to initialize. This must be an initialized
+ *                  context.
+ * \param cipher    The 128-bit block cipher to use.
+ * \param key       The encryption key. This must not be \c NULL.
+ * \param keybits   The key size in bits. This must be acceptable by the cipher.
+ *
+ * \return          \c 0 on success.
+ * \return          A CCM or cipher-specific error code on failure.
+ */
+int mbedtls_ccm_setkey( mbedtls_ccm_context *ctx,
+                        mbedtls_cipher_id_t cipher,
+                        const unsigned char *key,
+                        unsigned int keybits );
+
+/**
+ * \brief   This function releases and clears the specified CCM context
+ *          and underlying cipher sub-context.
+ *
+ * \param ctx       The CCM context to clear. If this is \c NULL, the function
+ *                  has no effect. Otherwise, this must be initialized.
+ */
+void mbedtls_ccm_free( mbedtls_ccm_context *ctx );
+
+/**
+ * \brief           This function encrypts a buffer using CCM.
+ *
+ * \note            The tag is written to a separate buffer. To concatenate
+ *                  the \p tag with the \p output, as done in <em>RFC-3610:
+ *                  Counter with CBC-MAC (CCM)</em>, use
+ *                  \p tag = \p output + \p length, and make sure that the
+ *                  output buffer is at least \p length + \p tag_len wide.
+ *
+ * \param ctx       The CCM context to use for encryption. This must be
+ *                  initialized and bound to a key.
+ * \param length    The length of the input data in Bytes.
+ * \param iv        The initialization vector (nonce). This must be a readable
+ *                  buffer of at least \p iv_len Bytes.
+ * \param iv_len    The length of the nonce in Bytes: 7, 8, 9, 10, 11, 12,
+ *                  or 13. The length L of the message length field is
+ *                  15 - \p iv_len.
+ * \param add       The additional data field. If \p add_len is greater than
+ *                  zero, \p add must be a readable buffer of at least that
+ *                  length.
+ * \param add_len   The length of additional data in Bytes.
+ *                  This must be less than `2^16 - 2^8`.
+ * \param input     The buffer holding the input data. If \p length is greater
+ *                  than zero, \p input must be a readable buffer of at least
+ *                  that length.
+ * \param output    The buffer holding the output data. If \p length is greater
+ *                  than zero, \p output must be a writable buffer of at least
+ *                  that length.
+ * \param tag       The buffer holding the authentication field. This must be a
+ *                  writable buffer of at least \p tag_len Bytes.
+ * \param tag_len   The length of the authentication field to generate in Bytes:
+ *                  4, 6, 8, 10, 12, 14 or 16.
+ *
+ * \return          \c 0 on success.
+ * \return          A CCM or cipher-specific error code on failure.
+ */
+int mbedtls_ccm_encrypt_and_tag( mbedtls_ccm_context *ctx, size_t length,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *add, size_t add_len,
+                         const unsigned char *input, unsigned char *output,
+                         unsigned char *tag, size_t tag_len );
+
+/**
+ * \brief           This function encrypts a buffer using CCM*.
+ *
+ * \note            The tag is written to a separate buffer. To concatenate
+ *                  the \p tag with the \p output, as done in <em>RFC-3610:
+ *                  Counter with CBC-MAC (CCM)</em>, use
+ *                  \p tag = \p output + \p length, and make sure that the
+ *                  output buffer is at least \p length + \p tag_len wide.
+ *
+ * \note            When using this function in a variable tag length context,
+ *                  the tag length has to be encoded into the \p iv passed to
+ *                  this function.
+ *
+ * \param ctx       The CCM context to use for encryption. This must be
+ *                  initialized and bound to a key.
+ * \param length    The length of the input data in Bytes.
+ * \param iv        The initialization vector (nonce). This must be a readable
+ *                  buffer of at least \p iv_len Bytes.
+ * \param iv_len    The length of the nonce in Bytes: 7, 8, 9, 10, 11, 12,
+ *                  or 13. The length L of the message length field is
+ *                  15 - \p iv_len.
+ * \param add       The additional data field. This must be a readable buffer of
+ *                  at least \p add_len Bytes.
+ * \param add_len   The length of additional data in Bytes.
+ *                  This must be less than 2^16 - 2^8.
+ * \param input     The buffer holding the input data. If \p length is greater
+ *                  than zero, \p input must be a readable buffer of at least
+ *                  that length.
+ * \param output    The buffer holding the output data. If \p length is greater
+ *                  than zero, \p output must be a writable buffer of at least
+ *                  that length.
+ * \param tag       The buffer holding the authentication field. This must be a
+ *                  writable buffer of at least \p tag_len Bytes.
+ * \param tag_len   The length of the authentication field to generate in Bytes:
+ *                  0, 4, 6, 8, 10, 12, 14 or 16.
+ *
+ * \warning         Passing \c 0 as \p tag_len means that the message is no
+ *                  longer authenticated.
+ *
+ * \return          \c 0 on success.
+ * \return          A CCM or cipher-specific error code on failure.
+ */
+int mbedtls_ccm_star_encrypt_and_tag( mbedtls_ccm_context *ctx, size_t length,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *add, size_t add_len,
+                         const unsigned char *input, unsigned char *output,
+                         unsigned char *tag, size_t tag_len );
+
+/**
+ * \brief           This function performs a CCM authenticated decryption of a
+ *                  buffer.
+ *
+ * \param ctx       The CCM context to use for decryption. This must be
+ *                  initialized and bound to a key.
+ * \param length    The length of the input data in Bytes.
+ * \param iv        The initialization vector (nonce). This must be a readable
+ *                  buffer of at least \p iv_len Bytes.
+ * \param iv_len    The length of the nonce in Bytes: 7, 8, 9, 10, 11, 12,
+ *                  or 13. The length L of the message length field is
+ *                  15 - \p iv_len.
+ * \param add       The additional data field. This must be a readable buffer
+ *                  of at least that \p add_len Bytes..
+ * \param add_len   The length of additional data in Bytes.
+ *                  This must be less than 2^16 - 2^8.
+ * \param input     The buffer holding the input data. If \p length is greater
+ *                  than zero, \p input must be a readable buffer of at least
+ *                  that length.
+ * \param output    The buffer holding the output data. If \p length is greater
+ *                  than zero, \p output must be a writable buffer of at least
+ *                  that length.
+ * \param tag       The buffer holding the authentication field. This must be a
+ *                  readable buffer of at least \p tag_len Bytes.
+ * \param tag_len   The length of the authentication field to generate in Bytes:
+ *                  4, 6, 8, 10, 12, 14 or 16.
+ *
+ * \return          \c 0 on success. This indicates that the message is authentic.
+ * \return          #MBEDTLS_ERR_CCM_AUTH_FAILED if the tag does not match.
+ * \return          A cipher-specific error code on calculation failure.
+ */
+int mbedtls_ccm_auth_decrypt( mbedtls_ccm_context *ctx, size_t length,
+                      const unsigned char *iv, size_t iv_len,
+                      const unsigned char *add, size_t add_len,
+                      const unsigned char *input, unsigned char *output,
+                      const unsigned char *tag, size_t tag_len );
+
+/**
+ * \brief           This function performs a CCM* authenticated decryption of a
+ *                  buffer.
+ *
+ * \note            When using this function in a variable tag length context,
+ *                  the tag length has to be decoded from \p iv and passed to
+ *                  this function as \p tag_len. (\p tag needs to be adjusted
+ *                  accordingly.)
+ *
+ * \param ctx       The CCM context to use for decryption. This must be
+ *                  initialized and bound to a key.
+ * \param length    The length of the input data in Bytes.
+ * \param iv        The initialization vector (nonce). This must be a readable
+ *                  buffer of at least \p iv_len Bytes.
+ * \param iv_len    The length of the nonce in Bytes: 7, 8, 9, 10, 11, 12,
+ *                  or 13. The length L of the message length field is
+ *                  15 - \p iv_len.
+ * \param add       The additional data field. This must be a readable buffer of
+ *                  at least that \p add_len Bytes.
+ * \param add_len   The length of additional data in Bytes.
+ *                  This must be less than 2^16 - 2^8.
+ * \param input     The buffer holding the input data. If \p length is greater
+ *                  than zero, \p input must be a readable buffer of at least
+ *                  that length.
+ * \param output    The buffer holding the output data. If \p length is greater
+ *                  than zero, \p output must be a writable buffer of at least
+ *                  that length.
+ * \param tag       The buffer holding the authentication field. This must be a
+ *                  readable buffer of at least \p tag_len Bytes.
+ * \param tag_len   The length of the authentication field in Bytes.
+ *                  0, 4, 6, 8, 10, 12, 14 or 16.
+ *
+ * \warning         Passing \c 0 as \p tag_len means that the message is nos
+ *                  longer authenticated.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_CCM_AUTH_FAILED if the tag does not match.
+ * \return          A cipher-specific error code on calculation failure.
+ */
+int mbedtls_ccm_star_auth_decrypt( mbedtls_ccm_context *ctx, size_t length,
+                      const unsigned char *iv, size_t iv_len,
+                      const unsigned char *add, size_t add_len,
+                      const unsigned char *input, unsigned char *output,
+                      const unsigned char *tag, size_t tag_len );
+
+#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C)
+/**
+ * \brief          The CCM checkup routine.
+ *
+ * \return         \c 0 on success.
+ * \return         \c 1 on failure.
+ */
+int mbedtls_ccm_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CCM_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/certs.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/certs.h
new file mode 100644
index 00000000000..c93c741c7ff
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/certs.h
@@ -0,0 +1,250 @@
+/**
+ * \file certs.h
+ *
+ * \brief Sample certificates and DHM parameters for testing
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_CERTS_H
+#define MBEDTLS_CERTS_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* List of all PEM-encoded CA certificates, terminated by NULL;
+ * PEM encoded if MBEDTLS_PEM_PARSE_C is enabled, DER encoded
+ * otherwise. */
+extern const char * mbedtls_test_cas[];
+extern const size_t mbedtls_test_cas_len[];
+
+/* List of all DER-encoded CA certificates, terminated by NULL */
+extern const unsigned char * mbedtls_test_cas_der[];
+extern const size_t mbedtls_test_cas_der_len[];
+
+#if defined(MBEDTLS_PEM_PARSE_C)
+/* Concatenation of all CA certificates in PEM format if available */
+extern const char   mbedtls_test_cas_pem[];
+extern const size_t mbedtls_test_cas_pem_len;
+#endif /* MBEDTLS_PEM_PARSE_C */
+
+/*
+ * CA test certificates
+ */
+
+extern const char mbedtls_test_ca_crt_ec_pem[];
+extern const char mbedtls_test_ca_key_ec_pem[];
+extern const char mbedtls_test_ca_pwd_ec_pem[];
+extern const char mbedtls_test_ca_key_rsa_pem[];
+extern const char mbedtls_test_ca_pwd_rsa_pem[];
+extern const char mbedtls_test_ca_crt_rsa_sha1_pem[];
+extern const char mbedtls_test_ca_crt_rsa_sha256_pem[];
+
+extern const unsigned char mbedtls_test_ca_crt_ec_der[];
+extern const unsigned char mbedtls_test_ca_key_ec_der[];
+extern const unsigned char mbedtls_test_ca_key_rsa_der[];
+extern const unsigned char mbedtls_test_ca_crt_rsa_sha1_der[];
+extern const unsigned char mbedtls_test_ca_crt_rsa_sha256_der[];
+
+extern const size_t mbedtls_test_ca_crt_ec_pem_len;
+extern const size_t mbedtls_test_ca_key_ec_pem_len;
+extern const size_t mbedtls_test_ca_pwd_ec_pem_len;
+extern const size_t mbedtls_test_ca_key_rsa_pem_len;
+extern const size_t mbedtls_test_ca_pwd_rsa_pem_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha1_pem_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha256_pem_len;
+
+extern const size_t mbedtls_test_ca_crt_ec_der_len;
+extern const size_t mbedtls_test_ca_key_ec_der_len;
+extern const size_t mbedtls_test_ca_pwd_ec_der_len;
+extern const size_t mbedtls_test_ca_key_rsa_der_len;
+extern const size_t mbedtls_test_ca_pwd_rsa_der_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha1_der_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha256_der_len;
+
+/* Config-dependent dispatch between PEM and DER encoding
+ * (PEM if enabled, otherwise DER) */
+
+extern const char mbedtls_test_ca_crt_ec[];
+extern const char mbedtls_test_ca_key_ec[];
+extern const char mbedtls_test_ca_pwd_ec[];
+extern const char mbedtls_test_ca_key_rsa[];
+extern const char mbedtls_test_ca_pwd_rsa[];
+extern const char mbedtls_test_ca_crt_rsa_sha1[];
+extern const char mbedtls_test_ca_crt_rsa_sha256[];
+
+extern const size_t mbedtls_test_ca_crt_ec_len;
+extern const size_t mbedtls_test_ca_key_ec_len;
+extern const size_t mbedtls_test_ca_pwd_ec_len;
+extern const size_t mbedtls_test_ca_key_rsa_len;
+extern const size_t mbedtls_test_ca_pwd_rsa_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha1_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha256_len;
+
+/* Config-dependent dispatch between SHA-1 and SHA-256
+ * (SHA-256 if enabled, otherwise SHA-1) */
+
+extern const char mbedtls_test_ca_crt_rsa[];
+extern const size_t mbedtls_test_ca_crt_rsa_len;
+
+/* Config-dependent dispatch between EC and RSA
+ * (RSA if enabled, otherwise EC) */
+
+extern const char * mbedtls_test_ca_crt;
+extern const char * mbedtls_test_ca_key;
+extern const char * mbedtls_test_ca_pwd;
+extern const size_t mbedtls_test_ca_crt_len;
+extern const size_t mbedtls_test_ca_key_len;
+extern const size_t mbedtls_test_ca_pwd_len;
+
+/*
+ * Server test certificates
+ */
+
+extern const char mbedtls_test_srv_crt_ec_pem[];
+extern const char mbedtls_test_srv_key_ec_pem[];
+extern const char mbedtls_test_srv_pwd_ec_pem[];
+extern const char mbedtls_test_srv_key_rsa_pem[];
+extern const char mbedtls_test_srv_pwd_rsa_pem[];
+extern const char mbedtls_test_srv_crt_rsa_sha1_pem[];
+extern const char mbedtls_test_srv_crt_rsa_sha256_pem[];
+
+extern const unsigned char mbedtls_test_srv_crt_ec_der[];
+extern const unsigned char mbedtls_test_srv_key_ec_der[];
+extern const unsigned char mbedtls_test_srv_key_rsa_der[];
+extern const unsigned char mbedtls_test_srv_crt_rsa_sha1_der[];
+extern const unsigned char mbedtls_test_srv_crt_rsa_sha256_der[];
+
+extern const size_t mbedtls_test_srv_crt_ec_pem_len;
+extern const size_t mbedtls_test_srv_key_ec_pem_len;
+extern const size_t mbedtls_test_srv_pwd_ec_pem_len;
+extern const size_t mbedtls_test_srv_key_rsa_pem_len;
+extern const size_t mbedtls_test_srv_pwd_rsa_pem_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha1_pem_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha256_pem_len;
+
+extern const size_t mbedtls_test_srv_crt_ec_der_len;
+extern const size_t mbedtls_test_srv_key_ec_der_len;
+extern const size_t mbedtls_test_srv_pwd_ec_der_len;
+extern const size_t mbedtls_test_srv_key_rsa_der_len;
+extern const size_t mbedtls_test_srv_pwd_rsa_der_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha1_der_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha256_der_len;
+
+/* Config-dependent dispatch between PEM and DER encoding
+ * (PEM if enabled, otherwise DER) */
+
+extern const char mbedtls_test_srv_crt_ec[];
+extern const char mbedtls_test_srv_key_ec[];
+extern const char mbedtls_test_srv_pwd_ec[];
+extern const char mbedtls_test_srv_key_rsa[];
+extern const char mbedtls_test_srv_pwd_rsa[];
+extern const char mbedtls_test_srv_crt_rsa_sha1[];
+extern const char mbedtls_test_srv_crt_rsa_sha256[];
+
+extern const size_t mbedtls_test_srv_crt_ec_len;
+extern const size_t mbedtls_test_srv_key_ec_len;
+extern const size_t mbedtls_test_srv_pwd_ec_len;
+extern const size_t mbedtls_test_srv_key_rsa_len;
+extern const size_t mbedtls_test_srv_pwd_rsa_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha1_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha256_len;
+
+/* Config-dependent dispatch between SHA-1 and SHA-256
+ * (SHA-256 if enabled, otherwise SHA-1) */
+
+extern const char mbedtls_test_srv_crt_rsa[];
+extern const size_t mbedtls_test_srv_crt_rsa_len;
+
+/* Config-dependent dispatch between EC and RSA
+ * (RSA if enabled, otherwise EC) */
+
+extern const char * mbedtls_test_srv_crt;
+extern const char * mbedtls_test_srv_key;
+extern const char * mbedtls_test_srv_pwd;
+extern const size_t mbedtls_test_srv_crt_len;
+extern const size_t mbedtls_test_srv_key_len;
+extern const size_t mbedtls_test_srv_pwd_len;
+
+/*
+ * Client test certificates
+ */
+
+extern const char mbedtls_test_cli_crt_ec_pem[];
+extern const char mbedtls_test_cli_key_ec_pem[];
+extern const char mbedtls_test_cli_pwd_ec_pem[];
+extern const char mbedtls_test_cli_key_rsa_pem[];
+extern const char mbedtls_test_cli_pwd_rsa_pem[];
+extern const char mbedtls_test_cli_crt_rsa_pem[];
+
+extern const unsigned char mbedtls_test_cli_crt_ec_der[];
+extern const unsigned char mbedtls_test_cli_key_ec_der[];
+extern const unsigned char mbedtls_test_cli_key_rsa_der[];
+extern const unsigned char mbedtls_test_cli_crt_rsa_der[];
+
+extern const size_t mbedtls_test_cli_crt_ec_pem_len;
+extern const size_t mbedtls_test_cli_key_ec_pem_len;
+extern const size_t mbedtls_test_cli_pwd_ec_pem_len;
+extern const size_t mbedtls_test_cli_key_rsa_pem_len;
+extern const size_t mbedtls_test_cli_pwd_rsa_pem_len;
+extern const size_t mbedtls_test_cli_crt_rsa_pem_len;
+
+extern const size_t mbedtls_test_cli_crt_ec_der_len;
+extern const size_t mbedtls_test_cli_key_ec_der_len;
+extern const size_t mbedtls_test_cli_key_rsa_der_len;
+extern const size_t mbedtls_test_cli_crt_rsa_der_len;
+
+/* Config-dependent dispatch between PEM and DER encoding
+ * (PEM if enabled, otherwise DER) */
+
+extern const char mbedtls_test_cli_crt_ec[];
+extern const char mbedtls_test_cli_key_ec[];
+extern const char mbedtls_test_cli_pwd_ec[];
+extern const char mbedtls_test_cli_key_rsa[];
+extern const char mbedtls_test_cli_pwd_rsa[];
+extern const char mbedtls_test_cli_crt_rsa[];
+
+extern const size_t mbedtls_test_cli_crt_ec_len;
+extern const size_t mbedtls_test_cli_key_ec_len;
+extern const size_t mbedtls_test_cli_pwd_ec_len;
+extern const size_t mbedtls_test_cli_key_rsa_len;
+extern const size_t mbedtls_test_cli_pwd_rsa_len;
+extern const size_t mbedtls_test_cli_crt_rsa_len;
+
+/* Config-dependent dispatch between EC and RSA
+ * (RSA if enabled, otherwise EC) */
+
+extern const char * mbedtls_test_cli_crt;
+extern const char * mbedtls_test_cli_key;
+extern const char * mbedtls_test_cli_pwd;
+extern const size_t mbedtls_test_cli_crt_len;
+extern const size_t mbedtls_test_cli_key_len;
+extern const size_t mbedtls_test_cli_pwd_len;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* certs.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/chacha20.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/chacha20.h
new file mode 100644
index 00000000000..03b48714780
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/chacha20.h
@@ -0,0 +1,228 @@
+/**
+ * \file chacha20.h
+ *
+ * \brief   This file contains ChaCha20 definitions and functions.
+ *
+ *          ChaCha20 is a stream cipher that can encrypt and decrypt
+ *          information. ChaCha was created by Daniel Bernstein as a variant of
+ *          its Salsa cipher https://cr.yp.to/chacha/chacha-20080128.pdf
+ *          ChaCha20 is the variant with 20 rounds, that was also standardized
+ *          in RFC 7539.
+ *
+ * \author Daniel King <damaki.gh@gmail.com>
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CHACHA20_H
+#define MBEDTLS_CHACHA20_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stdint.h>
+#include <stddef.h>
+
+/** Invalid input parameter(s). */
+#define MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA         -0x0051
+
+/* MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE is deprecated and should not be
+ * used. */
+/** Feature not available. For example, s part of the API is not implemented. */
+#define MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE    -0x0053
+
+/* MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED is deprecated and should not be used.
+ */
+/** Chacha20 hardware accelerator failed. */
+#define MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED        -0x0055
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_CHACHA20_ALT)
+
+typedef struct mbedtls_chacha20_context
+{
+    uint32_t state[16];          /*! The state (before round operations). */
+    uint8_t  keystream8[64];     /*! Leftover keystream bytes. */
+    size_t keystream_bytes_used; /*! Number of keystream bytes already used. */
+}
+mbedtls_chacha20_context;
+
+#else  /* MBEDTLS_CHACHA20_ALT */
+#include "chacha20_alt.h"
+#endif /* MBEDTLS_CHACHA20_ALT */
+
+/**
+ * \brief           This function initializes the specified ChaCha20 context.
+ *
+ *                  It must be the first API called before using
+ *                  the context.
+ *
+ *                  It is usually followed by calls to
+ *                  \c mbedtls_chacha20_setkey() and
+ *                  \c mbedtls_chacha20_starts(), then one or more calls to
+ *                  to \c mbedtls_chacha20_update(), and finally to
+ *                  \c mbedtls_chacha20_free().
+ *
+ * \param ctx       The ChaCha20 context to initialize.
+ *                  This must not be \c NULL.
+ */
+void mbedtls_chacha20_init( mbedtls_chacha20_context *ctx );
+
+/**
+ * \brief           This function releases and clears the specified
+ *                  ChaCha20 context.
+ *
+ * \param ctx       The ChaCha20 context to clear. This may be \c NULL,
+ *                  in which case this function is a no-op. If it is not
+ *                  \c NULL, it must point to an initialized context.
+ *
+ */
+void mbedtls_chacha20_free( mbedtls_chacha20_context *ctx );
+
+/**
+ * \brief           This function sets the encryption/decryption key.
+ *
+ * \note            After using this function, you must also call
+ *                  \c mbedtls_chacha20_starts() to set a nonce before you
+ *                  start encrypting/decrypting data with
+ *                  \c mbedtls_chacha_update().
+ *
+ * \param ctx       The ChaCha20 context to which the key should be bound.
+ *                  It must be initialized.
+ * \param key       The encryption/decryption key. This must be \c 32 Bytes
+ *                  in length.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA if ctx or key is NULL.
+ */
+int mbedtls_chacha20_setkey( mbedtls_chacha20_context *ctx,
+                             const unsigned char key[32] );
+
+/**
+ * \brief           This function sets the nonce and initial counter value.
+ *
+ * \note            A ChaCha20 context can be re-used with the same key by
+ *                  calling this function to change the nonce.
+ *
+ * \warning         You must never use the same nonce twice with the same key.
+ *                  This would void any confidentiality guarantees for the
+ *                  messages encrypted with the same nonce and key.
+ *
+ * \param ctx       The ChaCha20 context to which the nonce should be bound.
+ *                  It must be initialized and bound to a key.
+ * \param nonce     The nonce. This must be \c 12 Bytes in size.
+ * \param counter   The initial counter value. This is usually \c 0.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA if ctx or nonce is
+ *                  NULL.
+ */
+int mbedtls_chacha20_starts( mbedtls_chacha20_context* ctx,
+                             const unsigned char nonce[12],
+                             uint32_t counter );
+
+/**
+ * \brief           This function encrypts or decrypts data.
+ *
+ *                  Since ChaCha20 is a stream cipher, the same operation is
+ *                  used for encrypting and decrypting data.
+ *
+ * \note            The \p input and \p output pointers must either be equal or
+ *                  point to non-overlapping buffers.
+ *
+ * \note            \c mbedtls_chacha20_setkey() and
+ *                  \c mbedtls_chacha20_starts() must be called at least once
+ *                  to setup the context before this function can be called.
+ *
+ * \note            This function can be called multiple times in a row in
+ *                  order to encrypt of decrypt data piecewise with the same
+ *                  key and nonce.
+ *
+ * \param ctx       The ChaCha20 context to use for encryption or decryption.
+ *                  It must be initialized and bound to a key and nonce.
+ * \param size      The length of the input data in Bytes.
+ * \param input     The buffer holding the input data.
+ *                  This pointer can be \c NULL if `size == 0`.
+ * \param output    The buffer holding the output data.
+ *                  This must be able to hold \p size Bytes.
+ *                  This pointer can be \c NULL if `size == 0`.
+ *
+ * \return          \c 0 on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_chacha20_update( mbedtls_chacha20_context *ctx,
+                             size_t size,
+                             const unsigned char *input,
+                             unsigned char *output );
+
+/**
+ * \brief           This function encrypts or decrypts data with ChaCha20 and
+ *                  the given key and nonce.
+ *
+ *                  Since ChaCha20 is a stream cipher, the same operation is
+ *                  used for encrypting and decrypting data.
+ *
+ * \warning         You must never use the same (key, nonce) pair more than
+ *                  once. This would void any confidentiality guarantees for
+ *                  the messages encrypted with the same nonce and key.
+ *
+ * \note            The \p input and \p output pointers must either be equal or
+ *                  point to non-overlapping buffers.
+ *
+ * \param key       The encryption/decryption key.
+ *                  This must be \c 32 Bytes in length.
+ * \param nonce     The nonce. This must be \c 12 Bytes in size.
+ * \param counter   The initial counter value. This is usually \c 0.
+ * \param size      The length of the input data in Bytes.
+ * \param input     The buffer holding the input data.
+ *                  This pointer can be \c NULL if `size == 0`.
+ * \param output    The buffer holding the output data.
+ *                  This must be able to hold \p size Bytes.
+ *                  This pointer can be \c NULL if `size == 0`.
+ *
+ * \return          \c 0 on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_chacha20_crypt( const unsigned char key[32],
+                            const unsigned char nonce[12],
+                            uint32_t counter,
+                            size_t size,
+                            const unsigned char* input,
+                            unsigned char* output );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief           The ChaCha20 checkup routine.
+ *
+ * \return          \c 0 on success.
+ * \return          \c 1 on failure.
+ */
+int mbedtls_chacha20_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CHACHA20_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h
new file mode 100644
index 00000000000..c4ec7b5f2a9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/chachapoly.h
@@ -0,0 +1,359 @@
+/**
+ * \file chachapoly.h
+ *
+ * \brief   This file contains the AEAD-ChaCha20-Poly1305 definitions and
+ *          functions.
+ *
+ *          ChaCha20-Poly1305 is an algorithm for Authenticated Encryption
+ *          with Associated Data (AEAD) that can be used to encrypt and
+ *          authenticate data. It is based on ChaCha20 and Poly1305 by Daniel
+ *          Bernstein and was standardized in RFC 7539.
+ *
+ * \author Daniel King <damaki.gh@gmail.com>
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CHACHAPOLY_H
+#define MBEDTLS_CHACHAPOLY_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+/* for shared error codes */
+#include "mbedtls/poly1305.h"
+
+/** The requested operation is not permitted in the current state. */
+#define MBEDTLS_ERR_CHACHAPOLY_BAD_STATE            -0x0054
+/** Authenticated decryption failed: data was not authentic. */
+#define MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED          -0x0056
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum
+{
+    MBEDTLS_CHACHAPOLY_ENCRYPT,     /**< The mode value for performing encryption. */
+    MBEDTLS_CHACHAPOLY_DECRYPT      /**< The mode value for performing decryption. */
+}
+mbedtls_chachapoly_mode_t;
+
+#if !defined(MBEDTLS_CHACHAPOLY_ALT)
+
+#include "mbedtls/chacha20.h"
+
+typedef struct mbedtls_chachapoly_context
+{
+    mbedtls_chacha20_context chacha20_ctx;  /**< The ChaCha20 context. */
+    mbedtls_poly1305_context poly1305_ctx;  /**< The Poly1305 context. */
+    uint64_t aad_len;                       /**< The length (bytes) of the Additional Authenticated Data. */
+    uint64_t ciphertext_len;                /**< The length (bytes) of the ciphertext. */
+    int state;                              /**< The current state of the context. */
+    mbedtls_chachapoly_mode_t mode;         /**< Cipher mode (encrypt or decrypt). */
+}
+mbedtls_chachapoly_context;
+
+#else /* !MBEDTLS_CHACHAPOLY_ALT */
+#include "chachapoly_alt.h"
+#endif /* !MBEDTLS_CHACHAPOLY_ALT */
+
+/**
+ * \brief           This function initializes the specified ChaCha20-Poly1305 context.
+ *
+ *                  It must be the first API called before using
+ *                  the context. It must be followed by a call to
+ *                  \c mbedtls_chachapoly_setkey() before any operation can be
+ *                  done, and to \c mbedtls_chachapoly_free() once all
+ *                  operations with that context have been finished.
+ *
+ *                  In order to encrypt or decrypt full messages at once, for
+ *                  each message you should make a single call to
+ *                  \c mbedtls_chachapoly_crypt_and_tag() or
+ *                  \c mbedtls_chachapoly_auth_decrypt().
+ *
+ *                  In order to encrypt messages piecewise, for each
+ *                  message you should make a call to
+ *                  \c mbedtls_chachapoly_starts(), then 0 or more calls to
+ *                  \c mbedtls_chachapoly_update_aad(), then 0 or more calls to
+ *                  \c mbedtls_chachapoly_update(), then one call to
+ *                  \c mbedtls_chachapoly_finish().
+ *
+ * \warning         Decryption with the piecewise API is discouraged! Always
+ *                  use \c mbedtls_chachapoly_auth_decrypt() when possible!
+ *
+ *                  If however this is not possible because the data is too
+ *                  large to fit in memory, you need to:
+ *
+ *                  - call \c mbedtls_chachapoly_starts() and (if needed)
+ *                  \c mbedtls_chachapoly_update_aad() as above,
+ *                  - call \c mbedtls_chachapoly_update() multiple times and
+ *                  ensure its output (the plaintext) is NOT used in any other
+ *                  way than placing it in temporary storage at this point,
+ *                  - call \c mbedtls_chachapoly_finish() to compute the
+ *                  authentication tag and compared it in constant time to the
+ *                  tag received with the ciphertext.
+ *
+ *                  If the tags are not equal, you must immediately discard
+ *                  all previous outputs of \c mbedtls_chachapoly_update(),
+ *                  otherwise you can now safely use the plaintext.
+ *
+ * \param ctx       The ChachaPoly context to initialize. Must not be \c NULL.
+ */
+void mbedtls_chachapoly_init( mbedtls_chachapoly_context *ctx );
+
+/**
+ * \brief           This function releases and clears the specified
+ *                  ChaCha20-Poly1305 context.
+ *
+ * \param ctx       The ChachaPoly context to clear. This may be \c NULL, in which
+ *                  case this function is a no-op.
+ */
+void mbedtls_chachapoly_free( mbedtls_chachapoly_context *ctx );
+
+/**
+ * \brief           This function sets the ChaCha20-Poly1305
+ *                  symmetric encryption key.
+ *
+ * \param ctx       The ChaCha20-Poly1305 context to which the key should be
+ *                  bound. This must be initialized.
+ * \param key       The \c 256 Bit (\c 32 Bytes) key.
+ *
+ * \return          \c 0 on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_chachapoly_setkey( mbedtls_chachapoly_context *ctx,
+                               const unsigned char key[32] );
+
+/**
+ * \brief           This function starts a ChaCha20-Poly1305 encryption or
+ *                  decryption operation.
+ *
+ * \warning         You must never use the same nonce twice with the same key.
+ *                  This would void any confidentiality and authenticity
+ *                  guarantees for the messages encrypted with the same nonce
+ *                  and key.
+ *
+ * \note            If the context is being used for AAD only (no data to
+ *                  encrypt or decrypt) then \p mode can be set to any value.
+ *
+ * \warning         Decryption with the piecewise API is discouraged, see the
+ *                  warning on \c mbedtls_chachapoly_init().
+ *
+ * \param ctx       The ChaCha20-Poly1305 context. This must be initialized
+ *                  and bound to a key.
+ * \param nonce     The nonce/IV to use for the message.
+ *                  This must be a redable buffer of length \c 12 Bytes.
+ * \param mode      The operation to perform: #MBEDTLS_CHACHAPOLY_ENCRYPT or
+ *                  #MBEDTLS_CHACHAPOLY_DECRYPT (discouraged, see warning).
+ *
+ * \return          \c 0 on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_chachapoly_starts( mbedtls_chachapoly_context *ctx,
+                               const unsigned char nonce[12],
+                               mbedtls_chachapoly_mode_t mode );
+
+/**
+ * \brief           This function feeds additional data to be authenticated
+ *                  into an ongoing ChaCha20-Poly1305 operation.
+ *
+ *                  The Additional Authenticated Data (AAD), also called
+ *                  Associated Data (AD) is only authenticated but not
+ *                  encrypted nor included in the encrypted output. It is
+ *                  usually transmitted separately from the ciphertext or
+ *                  computed locally by each party.
+ *
+ * \note            This function is called before data is encrypted/decrypted.
+ *                  I.e. call this function to process the AAD before calling
+ *                  \c mbedtls_chachapoly_update().
+ *
+ *                  You may call this function multiple times to process
+ *                  an arbitrary amount of AAD. It is permitted to call
+ *                  this function 0 times, if no AAD is used.
+ *
+ *                  This function cannot be called any more if data has
+ *                  been processed by \c mbedtls_chachapoly_update(),
+ *                  or if the context has been finished.
+ *
+ * \warning         Decryption with the piecewise API is discouraged, see the
+ *                  warning on \c mbedtls_chachapoly_init().
+ *
+ * \param ctx       The ChaCha20-Poly1305 context. This must be initialized
+ *                  and bound to a key.
+ * \param aad_len   The length in Bytes of the AAD. The length has no
+ *                  restrictions.
+ * \param aad       Buffer containing the AAD.
+ *                  This pointer can be \c NULL if `aad_len == 0`.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_POLY1305_BAD_INPUT_DATA
+ *                  if \p ctx or \p aad are NULL.
+ * \return          #MBEDTLS_ERR_CHACHAPOLY_BAD_STATE
+ *                  if the operations has not been started or has been
+ *                  finished, or if the AAD has been finished.
+ */
+int mbedtls_chachapoly_update_aad( mbedtls_chachapoly_context *ctx,
+                                   const unsigned char *aad,
+                                   size_t aad_len );
+
+/**
+ * \brief           Thus function feeds data to be encrypted or decrypted
+ *                  into an on-going ChaCha20-Poly1305
+ *                  operation.
+ *
+ *                  The direction (encryption or decryption) depends on the
+ *                  mode that was given when calling
+ *                  \c mbedtls_chachapoly_starts().
+ *
+ *                  You may call this function multiple times to process
+ *                  an arbitrary amount of data. It is permitted to call
+ *                  this function 0 times, if no data is to be encrypted
+ *                  or decrypted.
+ *
+ * \warning         Decryption with the piecewise API is discouraged, see the
+ *                  warning on \c mbedtls_chachapoly_init().
+ *
+ * \param ctx       The ChaCha20-Poly1305 context to use. This must be initialized.
+ * \param len       The length (in bytes) of the data to encrypt or decrypt.
+ * \param input     The buffer containing the data to encrypt or decrypt.
+ *                  This pointer can be \c NULL if `len == 0`.
+ * \param output    The buffer to where the encrypted or decrypted data is
+ *                  written. This must be able to hold \p len bytes.
+ *                  This pointer can be \c NULL if `len == 0`.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_CHACHAPOLY_BAD_STATE
+ *                  if the operation has not been started or has been
+ *                  finished.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_chachapoly_update( mbedtls_chachapoly_context *ctx,
+                               size_t len,
+                               const unsigned char *input,
+                               unsigned char *output );
+
+/**
+ * \brief           This function finished the ChaCha20-Poly1305 operation and
+ *                  generates the MAC (authentication tag).
+ *
+ * \param ctx       The ChaCha20-Poly1305 context to use. This must be initialized.
+ * \param mac       The buffer to where the 128-bit (16 bytes) MAC is written.
+ *
+ * \warning         Decryption with the piecewise API is discouraged, see the
+ *                  warning on \c mbedtls_chachapoly_init().
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_CHACHAPOLY_BAD_STATE
+ *                  if the operation has not been started or has been
+ *                  finished.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_chachapoly_finish( mbedtls_chachapoly_context *ctx,
+                               unsigned char mac[16] );
+
+/**
+ * \brief           This function performs a complete ChaCha20-Poly1305
+ *                  authenticated encryption with the previously-set key.
+ *
+ * \note            Before using this function, you must set the key with
+ *                  \c mbedtls_chachapoly_setkey().
+ *
+ * \warning         You must never use the same nonce twice with the same key.
+ *                  This would void any confidentiality and authenticity
+ *                  guarantees for the messages encrypted with the same nonce
+ *                  and key.
+ *
+ * \param ctx       The ChaCha20-Poly1305 context to use (holds the key).
+ *                  This must be initialized.
+ * \param length    The length (in bytes) of the data to encrypt or decrypt.
+ * \param nonce     The 96-bit (12 bytes) nonce/IV to use.
+ * \param aad       The buffer containing the additional authenticated
+ *                  data (AAD). This pointer can be \c NULL if `aad_len == 0`.
+ * \param aad_len   The length (in bytes) of the AAD data to process.
+ * \param input     The buffer containing the data to encrypt or decrypt.
+ *                  This pointer can be \c NULL if `ilen == 0`.
+ * \param output    The buffer to where the encrypted or decrypted data
+ *                  is written. This pointer can be \c NULL if `ilen == 0`.
+ * \param tag       The buffer to where the computed 128-bit (16 bytes) MAC
+ *                  is written. This must not be \c NULL.
+ *
+ * \return          \c 0 on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_chachapoly_encrypt_and_tag( mbedtls_chachapoly_context *ctx,
+                                        size_t length,
+                                        const unsigned char nonce[12],
+                                        const unsigned char *aad,
+                                        size_t aad_len,
+                                        const unsigned char *input,
+                                        unsigned char *output,
+                                        unsigned char tag[16] );
+
+/**
+ * \brief           This function performs a complete ChaCha20-Poly1305
+ *                  authenticated decryption with the previously-set key.
+ *
+ * \note            Before using this function, you must set the key with
+ *                  \c mbedtls_chachapoly_setkey().
+ *
+ * \param ctx       The ChaCha20-Poly1305 context to use (holds the key).
+ * \param length    The length (in Bytes) of the data to decrypt.
+ * \param nonce     The \c 96 Bit (\c 12 bytes) nonce/IV to use.
+ * \param aad       The buffer containing the additional authenticated data (AAD).
+ *                  This pointer can be \c NULL if `aad_len == 0`.
+ * \param aad_len   The length (in bytes) of the AAD data to process.
+ * \param tag       The buffer holding the authentication tag.
+ *                  This must be a readable buffer of length \c 16 Bytes.
+ * \param input     The buffer containing the data to decrypt.
+ *                  This pointer can be \c NULL if `ilen == 0`.
+ * \param output    The buffer to where the decrypted data is written.
+ *                  This pointer can be \c NULL if `ilen == 0`.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED
+ *                  if the data was not authentic.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_chachapoly_auth_decrypt( mbedtls_chachapoly_context *ctx,
+                                     size_t length,
+                                     const unsigned char nonce[12],
+                                     const unsigned char *aad,
+                                     size_t aad_len,
+                                     const unsigned char tag[16],
+                                     const unsigned char *input,
+                                     unsigned char *output );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief           The ChaCha20-Poly1305 checkup routine.
+ *
+ * \return          \c 0 on success.
+ * \return          \c 1 on failure.
+ */
+int mbedtls_chachapoly_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CHACHAPOLY_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/check_config.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/check_config.h
new file mode 100644
index 00000000000..396fe7dfc2b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/check_config.h
@@ -0,0 +1,899 @@
+/**
+ * \file check_config.h
+ *
+ * \brief Consistency checks for configuration options
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+/*
+ * It is recommended to include this file from your config.h
+ * in order to catch dependency issues early.
+ */
+
+#ifndef MBEDTLS_CHECK_CONFIG_H
+#define MBEDTLS_CHECK_CONFIG_H
+
+/*
+ * We assume CHAR_BIT is 8 in many places. In practice, this is true on our
+ * target platforms, so not an issue, but let's just be extra sure.
+ */
+#include <limits.h>
+#if CHAR_BIT != 8
+#error "mbed TLS requires a platform with 8-bit chars"
+#endif
+
+#if defined(_WIN32)
+#if !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_C is required on Windows"
+#endif
+
+/* Fix the config here. Not convenient to put an #ifdef _WIN32 in config.h as
+ * it would confuse config.py. */
+#if !defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) && \
+    !defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO)
+#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+#endif
+
+#if !defined(MBEDTLS_PLATFORM_VSNPRINTF_ALT) && \
+    !defined(MBEDTLS_PLATFORM_VSNPRINTF_MACRO)
+#define MBEDTLS_PLATFORM_VSNPRINTF_ALT
+#endif
+#endif /* _WIN32 */
+
+#if defined(TARGET_LIKE_MBED) && defined(MBEDTLS_NET_C)
+#error "The NET module is not available for mbed OS - please use the network functions provided by Mbed OS"
+#endif
+
+#if defined(MBEDTLS_DEPRECATED_WARNING) && \
+    !defined(__GNUC__) && !defined(__clang__)
+#error "MBEDTLS_DEPRECATED_WARNING only works with GCC and Clang"
+#endif
+
+#if defined(MBEDTLS_HAVE_TIME_DATE) && !defined(MBEDTLS_HAVE_TIME)
+#error "MBEDTLS_HAVE_TIME_DATE without MBEDTLS_HAVE_TIME does not make sense"
+#endif
+
+#if defined(MBEDTLS_AESNI_C) && !defined(MBEDTLS_HAVE_ASM)
+#error "MBEDTLS_AESNI_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_CTR_DRBG_C) && !defined(MBEDTLS_AES_C)
+#error "MBEDTLS_CTR_DRBG_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_DHM_C) && !defined(MBEDTLS_BIGNUM_C)
+#error "MBEDTLS_DHM_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT) && !defined(MBEDTLS_SSL_TRUNCATED_HMAC)
+#error "MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_CMAC_C) && \
+    !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_DES_C)
+#error "MBEDTLS_CMAC_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_NIST_KW_C) && \
+    ( !defined(MBEDTLS_AES_C) || !defined(MBEDTLS_CIPHER_C) )
+#error "MBEDTLS_NIST_KW_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECDH_C) && !defined(MBEDTLS_ECP_C)
+#error "MBEDTLS_ECDH_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECDSA_C) &&            \
+    ( !defined(MBEDTLS_ECP_C) ||           \
+      !( defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) || \
+         defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) ||   \
+         defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) ||   \
+         defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) ) || \
+      !defined(MBEDTLS_ASN1_PARSE_C) ||    \
+      !defined(MBEDTLS_ASN1_WRITE_C) )
+#error "MBEDTLS_ECDSA_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECJPAKE_C) &&           \
+    ( !defined(MBEDTLS_ECP_C) || !defined(MBEDTLS_MD_C) )
+#error "MBEDTLS_ECJPAKE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)           && \
+    ( defined(MBEDTLS_USE_PSA_CRYPTO)          || \
+      defined(MBEDTLS_ECDH_COMPUTE_SHARED_ALT) || \
+      defined(MBEDTLS_ECDH_GEN_PUBLIC_ALT)     || \
+      defined(MBEDTLS_ECDSA_SIGN_ALT)          || \
+      defined(MBEDTLS_ECDSA_VERIFY_ALT)        || \
+      defined(MBEDTLS_ECDSA_GENKEY_ALT)        || \
+      defined(MBEDTLS_ECP_INTERNAL_ALT)        || \
+      defined(MBEDTLS_ECP_ALT) )
+#error "MBEDTLS_ECP_RESTARTABLE defined, but it cannot coexist with an alternative or PSA-based ECP implementation"
+#endif
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)           && \
+    ! defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+#error "MBEDTLS_ECP_RESTARTABLE defined, but not MBEDTLS_ECDH_LEGACY_CONTEXT"
+#endif
+
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)           && \
+    defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+#error "MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED defined, but MBEDTLS_ECDH_LEGACY_CONTEXT not disabled"
+#endif
+
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC) && !defined(MBEDTLS_HMAC_DRBG_C)
+#error "MBEDTLS_ECDSA_DETERMINISTIC defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_C) && ( !defined(MBEDTLS_BIGNUM_C) || (    \
+    !defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) &&                  \
+    !defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) &&                  \
+    !defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) &&                  \
+    !defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) &&                  \
+    !defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) &&                  \
+    !defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)   &&                  \
+    !defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)   &&                  \
+    !defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)   &&                  \
+    !defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) &&                  \
+    !defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) &&                  \
+    !defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) &&                  \
+    !defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) &&                 \
+    !defined(MBEDTLS_ECP_DP_CURVE448_ENABLED) ) )
+#error "MBEDTLS_ECP_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_C) && !(            \
+    defined(MBEDTLS_ECP_ALT) ||             \
+    defined(MBEDTLS_CTR_DRBG_C) ||          \
+    defined(MBEDTLS_HMAC_DRBG_C) ||         \
+    defined(MBEDTLS_ECP_NO_INTERNAL_RNG))
+#error "MBEDTLS_ECP_C requires a DRBG module unless MBEDTLS_ECP_NO_INTERNAL_RNG is defined or an alternative implementation is used"
+#endif
+
+#if defined(MBEDTLS_PK_PARSE_C) && !defined(MBEDTLS_ASN1_PARSE_C)
+#error "MBEDTLS_PK_PARSE_C defined, but not all prerequesites"
+#endif
+
+#if defined(MBEDTLS_ENTROPY_C) && (!defined(MBEDTLS_SHA512_C) &&      \
+                                    !defined(MBEDTLS_SHA256_C))
+#error "MBEDTLS_ENTROPY_C defined, but not all prerequisites"
+#endif
+#if defined(MBEDTLS_ENTROPY_C) && defined(MBEDTLS_SHA512_C) &&         \
+    defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN) && (MBEDTLS_CTR_DRBG_ENTROPY_LEN > 64)
+#error "MBEDTLS_CTR_DRBG_ENTROPY_LEN value too high"
+#endif
+#if defined(MBEDTLS_ENTROPY_C) &&                                            \
+    ( !defined(MBEDTLS_SHA512_C) || defined(MBEDTLS_ENTROPY_FORCE_SHA256) ) \
+    && defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN) && (MBEDTLS_CTR_DRBG_ENTROPY_LEN > 32)
+#error "MBEDTLS_CTR_DRBG_ENTROPY_LEN value too high"
+#endif
+#if defined(MBEDTLS_ENTROPY_C) && \
+    defined(MBEDTLS_ENTROPY_FORCE_SHA256) && !defined(MBEDTLS_SHA256_C)
+#error "MBEDTLS_ENTROPY_FORCE_SHA256 defined, but not all prerequisites"
+#endif
+
+#if defined(__has_feature)
+#if __has_feature(memory_sanitizer)
+#define MBEDTLS_HAS_MEMSAN
+#endif
+#endif
+#if defined(MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN) &&  !defined(MBEDTLS_HAS_MEMSAN)
+#error "MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN requires building with MemorySanitizer"
+#endif
+#undef MBEDTLS_HAS_MEMSAN
+
+#if defined(MBEDTLS_TEST_NULL_ENTROPY) && \
+    ( !defined(MBEDTLS_ENTROPY_C) || !defined(MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES) )
+#error "MBEDTLS_TEST_NULL_ENTROPY defined, but not all prerequisites"
+#endif
+#if defined(MBEDTLS_TEST_NULL_ENTROPY) && \
+     ( defined(MBEDTLS_ENTROPY_NV_SEED) || defined(MBEDTLS_ENTROPY_HARDWARE_ALT) || \
+    defined(MBEDTLS_HAVEGE_C) )
+#error "MBEDTLS_TEST_NULL_ENTROPY defined, but entropy sources too"
+#endif
+
+#if defined(MBEDTLS_GCM_C) && (                                        \
+        !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_CAMELLIA_C) && !defined(MBEDTLS_ARIA_C) )
+#error "MBEDTLS_GCM_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_RANDOMIZE_JAC_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_ADD_MIXED_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_ADD_MIXED_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_DOUBLE_JAC_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_DOUBLE_JAC_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_NORMALIZE_JAC_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_NORMALIZE_JAC_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_RANDOMIZE_MXZ_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_RANDOMIZE_MXZ_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_NORMALIZE_MXZ_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_NORMALIZE_MXZ_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_NO_FALLBACK) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_NO_FALLBACK defined, but no alternative implementation enabled"
+#endif
+
+#if defined(MBEDTLS_HAVEGE_C) && !defined(MBEDTLS_TIMING_C)
+#error "MBEDTLS_HAVEGE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_HKDF_C) && !defined(MBEDTLS_MD_C)
+#error "MBEDTLS_HKDF_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_HMAC_DRBG_C) && !defined(MBEDTLS_MD_C)
+#error "MBEDTLS_HMAC_DRBG_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) &&                 \
+    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_ECDSA_C) ||          \
+      !defined(MBEDTLS_X509_CRT_PARSE_C) )
+#error "MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) &&                 \
+    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_RSA_C) ||          \
+      !defined(MBEDTLS_X509_CRT_PARSE_C) )
+#error "MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) && !defined(MBEDTLS_DHM_C)
+#error "MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) &&                     \
+    !defined(MBEDTLS_ECDH_C)
+#error "MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) &&                   \
+    ( !defined(MBEDTLS_DHM_C) || !defined(MBEDTLS_RSA_C) ||           \
+      !defined(MBEDTLS_X509_CRT_PARSE_C) || !defined(MBEDTLS_PKCS1_V15) )
+#error "MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) &&                 \
+    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_RSA_C) ||          \
+      !defined(MBEDTLS_X509_CRT_PARSE_C) || !defined(MBEDTLS_PKCS1_V15) )
+#error "MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) &&                 \
+    ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_ECDSA_C) ||          \
+      !defined(MBEDTLS_X509_CRT_PARSE_C) )
+#error "MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) &&                   \
+    ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) || \
+      !defined(MBEDTLS_PKCS1_V15) )
+#error "MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) &&                       \
+    ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) || \
+      !defined(MBEDTLS_PKCS1_V15) )
+#error "MBEDTLS_KEY_EXCHANGE_RSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) &&                    \
+    ( !defined(MBEDTLS_ECJPAKE_C) || !defined(MBEDTLS_SHA256_C) ||      \
+      !defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) )
+#error "MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE) &&              \
+    ( !defined(MBEDTLS_SHA256_C) &&                             \
+      !defined(MBEDTLS_SHA512_C) &&                             \
+      !defined(MBEDTLS_SHA1_C) )
+#error "!MBEDTLS_SSL_KEEP_PEER_CERTIFICATE requires MBEDTLS_SHA512_C, MBEDTLS_SHA256_C or MBEDTLS_SHA1_C"
+#endif
+
+#if defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C) &&                          \
+    ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) )
+#error "MBEDTLS_MEMORY_BUFFER_ALLOC_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_MEMORY_BACKTRACE) && !defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C)
+#error "MBEDTLS_MEMORY_BACKTRACE defined, but not all prerequesites"
+#endif
+
+#if defined(MBEDTLS_MEMORY_DEBUG) && !defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C)
+#error "MBEDTLS_MEMORY_DEBUG defined, but not all prerequesites"
+#endif
+
+#if defined(MBEDTLS_PADLOCK_C) && !defined(MBEDTLS_HAVE_ASM)
+#error "MBEDTLS_PADLOCK_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PEM_PARSE_C) && !defined(MBEDTLS_BASE64_C)
+#error "MBEDTLS_PEM_PARSE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PEM_WRITE_C) && !defined(MBEDTLS_BASE64_C)
+#error "MBEDTLS_PEM_WRITE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PK_C) && \
+    ( !defined(MBEDTLS_RSA_C) && !defined(MBEDTLS_ECP_C) )
+#error "MBEDTLS_PK_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PK_PARSE_C) && !defined(MBEDTLS_PK_C)
+#error "MBEDTLS_PK_PARSE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PK_WRITE_C) && !defined(MBEDTLS_PK_C)
+#error "MBEDTLS_PK_WRITE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PKCS11_C) && !defined(MBEDTLS_PK_C)
+#error "MBEDTLS_PKCS11_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PKCS11_C)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_PKCS11_C is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_PKCS11_C is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_PKCS11_C */
+
+#if defined(MBEDTLS_PLATFORM_EXIT_ALT) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_EXIT_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_EXIT_MACRO) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_EXIT_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_EXIT_MACRO) &&\
+    ( defined(MBEDTLS_PLATFORM_STD_EXIT) ||\
+        defined(MBEDTLS_PLATFORM_EXIT_ALT) )
+#error "MBEDTLS_PLATFORM_EXIT_MACRO and MBEDTLS_PLATFORM_STD_EXIT/MBEDTLS_PLATFORM_EXIT_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_TIME_ALT) &&\
+    ( !defined(MBEDTLS_PLATFORM_C) ||\
+        !defined(MBEDTLS_HAVE_TIME) )
+#error "MBEDTLS_PLATFORM_TIME_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_TIME_MACRO) &&\
+    ( !defined(MBEDTLS_PLATFORM_C) ||\
+        !defined(MBEDTLS_HAVE_TIME) )
+#error "MBEDTLS_PLATFORM_TIME_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_TIME_TYPE_MACRO) &&\
+    ( !defined(MBEDTLS_PLATFORM_C) ||\
+        !defined(MBEDTLS_HAVE_TIME) )
+#error "MBEDTLS_PLATFORM_TIME_TYPE_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_TIME_MACRO) &&\
+    ( defined(MBEDTLS_PLATFORM_STD_TIME) ||\
+        defined(MBEDTLS_PLATFORM_TIME_ALT) )
+#error "MBEDTLS_PLATFORM_TIME_MACRO and MBEDTLS_PLATFORM_STD_TIME/MBEDTLS_PLATFORM_TIME_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_TIME_TYPE_MACRO) &&\
+    ( defined(MBEDTLS_PLATFORM_STD_TIME) ||\
+        defined(MBEDTLS_PLATFORM_TIME_ALT) )
+#error "MBEDTLS_PLATFORM_TIME_TYPE_MACRO and MBEDTLS_PLATFORM_STD_TIME/MBEDTLS_PLATFORM_TIME_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FPRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_FPRINTF_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_FPRINTF_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO) &&\
+    ( defined(MBEDTLS_PLATFORM_STD_FPRINTF) ||\
+        defined(MBEDTLS_PLATFORM_FPRINTF_ALT) )
+#error "MBEDTLS_PLATFORM_FPRINTF_MACRO and MBEDTLS_PLATFORM_STD_FPRINTF/MBEDTLS_PLATFORM_FPRINTF_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FREE_MACRO) &&\
+    ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) )
+#error "MBEDTLS_PLATFORM_FREE_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FREE_MACRO) &&\
+    defined(MBEDTLS_PLATFORM_STD_FREE)
+#error "MBEDTLS_PLATFORM_FREE_MACRO and MBEDTLS_PLATFORM_STD_FREE cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FREE_MACRO) && !defined(MBEDTLS_PLATFORM_CALLOC_MACRO)
+#error "MBEDTLS_PLATFORM_CALLOC_MACRO must be defined if MBEDTLS_PLATFORM_FREE_MACRO is"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) &&\
+    ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) )
+#error "MBEDTLS_PLATFORM_CALLOC_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) &&\
+    defined(MBEDTLS_PLATFORM_STD_CALLOC)
+#error "MBEDTLS_PLATFORM_CALLOC_MACRO and MBEDTLS_PLATFORM_STD_CALLOC cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) && !defined(MBEDTLS_PLATFORM_FREE_MACRO)
+#error "MBEDTLS_PLATFORM_FREE_MACRO must be defined if MBEDTLS_PLATFORM_CALLOC_MACRO is"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_MEMORY) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_MEMORY defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_PRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_PRINTF_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_PRINTF_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO) &&\
+    ( defined(MBEDTLS_PLATFORM_STD_PRINTF) ||\
+        defined(MBEDTLS_PLATFORM_PRINTF_ALT) )
+#error "MBEDTLS_PLATFORM_PRINTF_MACRO and MBEDTLS_PLATFORM_STD_PRINTF/MBEDTLS_PLATFORM_PRINTF_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_SNPRINTF_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_SNPRINTF_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) &&\
+    ( defined(MBEDTLS_PLATFORM_STD_SNPRINTF) ||\
+        defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) )
+#error "MBEDTLS_PLATFORM_SNPRINTF_MACRO and MBEDTLS_PLATFORM_STD_SNPRINTF/MBEDTLS_PLATFORM_SNPRINTF_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_MEM_HDR) &&\
+    !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS)
+#error "MBEDTLS_PLATFORM_STD_MEM_HDR defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_CALLOC) && !defined(MBEDTLS_PLATFORM_MEMORY)
+#error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_FREE) && !defined(MBEDTLS_PLATFORM_MEMORY)
+#error "MBEDTLS_PLATFORM_STD_FREE defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_EXIT) &&\
+    !defined(MBEDTLS_PLATFORM_EXIT_ALT)
+#error "MBEDTLS_PLATFORM_STD_EXIT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_TIME) &&\
+    ( !defined(MBEDTLS_PLATFORM_TIME_ALT) ||\
+        !defined(MBEDTLS_HAVE_TIME) )
+#error "MBEDTLS_PLATFORM_STD_TIME defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_FPRINTF) &&\
+    !defined(MBEDTLS_PLATFORM_FPRINTF_ALT)
+#error "MBEDTLS_PLATFORM_STD_FPRINTF defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_PRINTF) &&\
+    !defined(MBEDTLS_PLATFORM_PRINTF_ALT)
+#error "MBEDTLS_PLATFORM_STD_PRINTF defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_SNPRINTF) &&\
+    !defined(MBEDTLS_PLATFORM_SNPRINTF_ALT)
+#error "MBEDTLS_PLATFORM_STD_SNPRINTF defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ENTROPY_NV_SEED) &&\
+    ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_ENTROPY_C) )
+#error "MBEDTLS_ENTROPY_NV_SEED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_NV_SEED_ALT) &&\
+    !defined(MBEDTLS_ENTROPY_NV_SEED)
+#error "MBEDTLS_PLATFORM_NV_SEED_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_NV_SEED_READ) &&\
+    !defined(MBEDTLS_PLATFORM_NV_SEED_ALT)
+#error "MBEDTLS_PLATFORM_STD_NV_SEED_READ defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_NV_SEED_WRITE) &&\
+    !defined(MBEDTLS_PLATFORM_NV_SEED_ALT)
+#error "MBEDTLS_PLATFORM_STD_NV_SEED_WRITE defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_NV_SEED_READ_MACRO) &&\
+    ( defined(MBEDTLS_PLATFORM_STD_NV_SEED_READ) ||\
+      defined(MBEDTLS_PLATFORM_NV_SEED_ALT) )
+#error "MBEDTLS_PLATFORM_NV_SEED_READ_MACRO and MBEDTLS_PLATFORM_STD_NV_SEED_READ cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO) &&\
+    ( defined(MBEDTLS_PLATFORM_STD_NV_SEED_WRITE) ||\
+      defined(MBEDTLS_PLATFORM_NV_SEED_ALT) )
+#error "MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO and MBEDTLS_PLATFORM_STD_NV_SEED_WRITE cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_C) &&                                    \
+    !( ( ( defined(MBEDTLS_CTR_DRBG_C) || defined(MBEDTLS_HMAC_DRBG_C) ) && \
+         defined(MBEDTLS_ENTROPY_C) ) ||                                \
+       defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) )
+#error "MBEDTLS_PSA_CRYPTO_C defined, but not all prerequisites (missing RNG)"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_SPM) && !defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_PSA_CRYPTO_SPM defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C) &&    \
+    ! ( defined(MBEDTLS_PSA_CRYPTO_C) && \
+        defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) )
+#error "MBEDTLS_PSA_CRYPTO_SE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) &&            \
+    ! defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_PSA_CRYPTO_STORAGE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&      \
+    !( defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) && \
+       defined(MBEDTLS_ENTROPY_NV_SEED) )
+#error "MBEDTLS_PSA_INJECT_ENTROPY defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&              \
+    !defined(MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES)
+#error "MBEDTLS_PSA_INJECT_ENTROPY is not compatible with actual entropy sources"
+#endif
+
+#if defined(MBEDTLS_PSA_INJECT_ENTROPY) &&              \
+    defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+#error "MBEDTLS_PSA_INJECT_ENTROPY is not compatible with MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG"
+#endif
+
+#if defined(MBEDTLS_PSA_ITS_FILE_C) && \
+    !defined(MBEDTLS_FS_IO)
+#error "MBEDTLS_PSA_ITS_FILE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER) && \
+    defined(MBEDTLS_USE_PSA_CRYPTO)
+#error "MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER defined, but it cannot coexist with MBEDTLS_USE_PSA_CRYPTO."
+#endif
+
+#if defined(MBEDTLS_RSA_C) && ( !defined(MBEDTLS_BIGNUM_C) ||         \
+    !defined(MBEDTLS_OID_C) )
+#error "MBEDTLS_RSA_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_RSA_C) && ( !defined(MBEDTLS_PKCS1_V21) &&         \
+    !defined(MBEDTLS_PKCS1_V15) )
+#error "MBEDTLS_RSA_C defined, but none of the PKCS1 versions enabled"
+#endif
+
+#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) &&                        \
+    ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_PKCS1_V21) )
+#error "MBEDTLS_X509_RSASSA_PSS_SUPPORT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SHA512_NO_SHA384) && !defined(MBEDTLS_SHA512_C)
+#error "MBEDTLS_SHA512_NO_SHA384 defined without MBEDTLS_SHA512_C"
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_SSL3) && ( !defined(MBEDTLS_MD5_C) ||     \
+    !defined(MBEDTLS_SHA1_C) )
+#error "MBEDTLS_SSL_PROTO_SSL3 defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1) && ( !defined(MBEDTLS_MD5_C) ||     \
+    !defined(MBEDTLS_SHA1_C) )
+#error "MBEDTLS_SSL_PROTO_TLS1 defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_1) && ( !defined(MBEDTLS_MD5_C) ||     \
+    !defined(MBEDTLS_SHA1_C) )
+#error "MBEDTLS_SSL_PROTO_TLS1_1 defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && ( !defined(MBEDTLS_SHA1_C) &&     \
+    !defined(MBEDTLS_SHA256_C) && !defined(MBEDTLS_SHA512_C) )
+#error "MBEDTLS_SSL_PROTO_TLS1_2 defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL) && ( !defined(MBEDTLS_HKDF_C) && \
+    !defined(MBEDTLS_SHA256_C) && !defined(MBEDTLS_SHA512_C) )
+#error "MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL defined, but not all prerequisites"
+#endif
+
+#if (defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) ||  \
+     defined(MBEDTLS_SSL_PROTO_TLS1_1) || defined(MBEDTLS_SSL_PROTO_TLS1_2)) && \
+    !(defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) ||                          \
+      defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) ||                      \
+      defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) ||                    \
+      defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) ||                  \
+      defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) ||                     \
+      defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) ||                   \
+      defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) ||                          \
+      defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) ||                      \
+      defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) ||                      \
+      defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) ||                    \
+      defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) )
+#error "One or more versions of the TLS protocol are enabled " \
+        "but no key exchange methods defined with MBEDTLS_KEY_EXCHANGE_xxxx"
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)     && \
+    !defined(MBEDTLS_SSL_PROTO_TLS1_1)  && \
+    !defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#error "MBEDTLS_SSL_PROTO_DTLS defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_CLI_C) && !defined(MBEDTLS_SSL_TLS_C)
+#error "MBEDTLS_SSL_CLI_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_TLS_C) && ( !defined(MBEDTLS_CIPHER_C) ||     \
+    !defined(MBEDTLS_MD_C) )
+#error "MBEDTLS_SSL_TLS_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_SRV_C) && !defined(MBEDTLS_SSL_TLS_C)
+#error "MBEDTLS_SSL_SRV_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_TLS_C) && (!defined(MBEDTLS_SSL_PROTO_SSL3) && \
+    !defined(MBEDTLS_SSL_PROTO_TLS1) && !defined(MBEDTLS_SSL_PROTO_TLS1_1) && \
+    !defined(MBEDTLS_SSL_PROTO_TLS1_2))
+#error "MBEDTLS_SSL_TLS_C defined, but no protocols are active"
+#endif
+
+#if defined(MBEDTLS_SSL_TLS_C) && (defined(MBEDTLS_SSL_PROTO_SSL3) && \
+    defined(MBEDTLS_SSL_PROTO_TLS1_1) && !defined(MBEDTLS_SSL_PROTO_TLS1))
+#error "Illegal protocol selection"
+#endif
+
+#if defined(MBEDTLS_SSL_TLS_C) && (defined(MBEDTLS_SSL_PROTO_TLS1) && \
+    defined(MBEDTLS_SSL_PROTO_TLS1_2) && !defined(MBEDTLS_SSL_PROTO_TLS1_1))
+#error "Illegal protocol selection"
+#endif
+
+#if defined(MBEDTLS_SSL_TLS_C) && (defined(MBEDTLS_SSL_PROTO_SSL3) && \
+    defined(MBEDTLS_SSL_PROTO_TLS1_2) && (!defined(MBEDTLS_SSL_PROTO_TLS1) || \
+    !defined(MBEDTLS_SSL_PROTO_TLS1_1)))
+#error "Illegal protocol selection"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && !defined(MBEDTLS_SSL_PROTO_DTLS)
+#error "MBEDTLS_SSL_DTLS_HELLO_VERIFY  defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE) && \
+    !defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY)
+#error "MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE  defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) &&                              \
+    ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_ANTI_REPLAY  defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID) &&                              \
+    ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_CONNECTION_ID  defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)            &&                 \
+    defined(MBEDTLS_SSL_CID_IN_LEN_MAX) &&                 \
+    MBEDTLS_SSL_CID_IN_LEN_MAX > 255
+#error "MBEDTLS_SSL_CID_IN_LEN_MAX too large (max 255)"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)            &&                  \
+    defined(MBEDTLS_SSL_CID_OUT_LEN_MAX) &&                 \
+    MBEDTLS_SSL_CID_OUT_LEN_MAX > 255
+#error "MBEDTLS_SSL_CID_OUT_LEN_MAX too large (max 255)"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) &&                              \
+    ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_BADMAC_LIMIT  defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) &&   \
+    !defined(MBEDTLS_SSL_PROTO_TLS1)   &&      \
+    !defined(MBEDTLS_SSL_PROTO_TLS1_1) &&      \
+    !defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#error "MBEDTLS_SSL_ENCRYPT_THEN_MAC defined, but not all prerequsites"
+#endif
+
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) && \
+    !defined(MBEDTLS_SSL_PROTO_TLS1)   &&          \
+    !defined(MBEDTLS_SSL_PROTO_TLS1_1) &&          \
+    !defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#error "MBEDTLS_SSL_EXTENDED_MASTER_SECRET defined, but not all prerequsites"
+#endif
+
+#if defined(MBEDTLS_SSL_TICKET_C) && !defined(MBEDTLS_CIPHER_C)
+#error "MBEDTLS_SSL_TICKET_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) && \
+    !defined(MBEDTLS_SSL_PROTO_SSL3) && !defined(MBEDTLS_SSL_PROTO_TLS1)
+#error "MBEDTLS_SSL_CBC_RECORD_SPLITTING defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) && \
+        !defined(MBEDTLS_X509_CRT_PARSE_C)
+#error "MBEDTLS_SSL_SERVER_NAME_INDICATION defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_THREADING_PTHREAD)
+#if !defined(MBEDTLS_THREADING_C) || defined(MBEDTLS_THREADING_IMPL)
+#error "MBEDTLS_THREADING_PTHREAD defined, but not all prerequisites"
+#endif
+#define MBEDTLS_THREADING_IMPL
+#endif
+
+#if defined(MBEDTLS_THREADING_ALT)
+#if !defined(MBEDTLS_THREADING_C) || defined(MBEDTLS_THREADING_IMPL)
+#error "MBEDTLS_THREADING_ALT defined, but not all prerequisites"
+#endif
+#define MBEDTLS_THREADING_IMPL
+#endif
+
+#if defined(MBEDTLS_THREADING_C) && !defined(MBEDTLS_THREADING_IMPL)
+#error "MBEDTLS_THREADING_C defined, single threading implementation required"
+#endif
+#undef MBEDTLS_THREADING_IMPL
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO) && !defined(MBEDTLS_PSA_CRYPTO_C)
+#error "MBEDTLS_USE_PSA_CRYPTO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_VERSION_FEATURES) && !defined(MBEDTLS_VERSION_C)
+#error "MBEDTLS_VERSION_FEATURES defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_USE_C) && ( !defined(MBEDTLS_BIGNUM_C) ||  \
+    !defined(MBEDTLS_OID_C) || !defined(MBEDTLS_ASN1_PARSE_C) ||      \
+    !defined(MBEDTLS_PK_PARSE_C) )
+#error "MBEDTLS_X509_USE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CREATE_C) && ( !defined(MBEDTLS_BIGNUM_C) ||  \
+    !defined(MBEDTLS_OID_C) || !defined(MBEDTLS_ASN1_WRITE_C) ||       \
+    !defined(MBEDTLS_PK_WRITE_C) )
+#error "MBEDTLS_X509_CREATE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_CERTS_C) && !defined(MBEDTLS_X509_USE_C)
+#error "MBEDTLS_CERTS_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) )
+#error "MBEDTLS_X509_CRT_PARSE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CRL_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) )
+#error "MBEDTLS_X509_CRL_PARSE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CSR_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) )
+#error "MBEDTLS_X509_CSR_PARSE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CRT_WRITE_C) && ( !defined(MBEDTLS_X509_CREATE_C) )
+#error "MBEDTLS_X509_CRT_WRITE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CSR_WRITE_C) && ( !defined(MBEDTLS_X509_CREATE_C) )
+#error "MBEDTLS_X509_CSR_WRITE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_HAVE_INT32) && defined(MBEDTLS_HAVE_INT64)
+#error "MBEDTLS_HAVE_INT32 and MBEDTLS_HAVE_INT64 cannot be defined simultaneously"
+#endif /* MBEDTLS_HAVE_INT32 && MBEDTLS_HAVE_INT64 */
+
+#if ( defined(MBEDTLS_HAVE_INT32) || defined(MBEDTLS_HAVE_INT64) ) && \
+    defined(MBEDTLS_HAVE_ASM)
+#error "MBEDTLS_HAVE_INT32/MBEDTLS_HAVE_INT64 and MBEDTLS_HAVE_ASM cannot be defined simultaneously"
+#endif /* (MBEDTLS_HAVE_INT32 || MBEDTLS_HAVE_INT64) && MBEDTLS_HAVE_ASM */
+
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_PROTO_SSL3 is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_PROTO_SSL3 is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_SSL_PROTO_SSL3 */
+
+#if defined(MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO is deprecated and will be removed in a future version of Mbed TLS"
+#endif
+#endif /* MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO */
+
+#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL)
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "MBEDTLS_SSL_HW_RECORD_ACCEL is deprecated and will be removed in a future version of Mbed TLS"
+#elif defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "MBEDTLS_SSL_HW_RECORD_ACCEL is deprecated and will be removed in a future version of Mbed TLS"
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP) && ( !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_SRTP defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH) && ( !defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) )
+#error "MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH defined, but not all prerequisites"
+#endif
+
+/*
+ * Avoid warning from -pedantic. This is a convenient place for this
+ * workaround since this is included by every single file before the
+ * #if defined(MBEDTLS_xxx_C) that results in empty translation units.
+ */
+typedef int mbedtls_iso_c_forbids_empty_translation_units;
+
+#endif /* MBEDTLS_CHECK_CONFIG_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/cipher.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/cipher.h
new file mode 100644
index 00000000000..6d83da8827e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/cipher.h
@@ -0,0 +1,1102 @@
+/**
+ * \file cipher.h
+ *
+ * \brief This file contains an abstraction interface for use with the cipher
+ * primitives provided by the library. It provides a common interface to all of
+ * the available cipher operations.
+ *
+ * \author Adriaan de Jong <dejong@fox-it.com>
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CIPHER_H
+#define MBEDTLS_CIPHER_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include "mbedtls/platform_util.h"
+
+#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CCM_C) || defined(MBEDTLS_CHACHAPOLY_C)
+#define MBEDTLS_CIPHER_MODE_AEAD
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+#define MBEDTLS_CIPHER_MODE_WITH_PADDING
+#endif
+
+#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_NULL_CIPHER) || \
+    defined(MBEDTLS_CHACHA20_C)
+#define MBEDTLS_CIPHER_MODE_STREAM
+#endif
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE  -0x6080
+/** Bad input parameters. */
+#define MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA       -0x6100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_CIPHER_ALLOC_FAILED         -0x6180
+/** Input data contains invalid padding and is rejected. */
+#define MBEDTLS_ERR_CIPHER_INVALID_PADDING      -0x6200
+/** Decryption of block requires a full block. */
+#define MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED  -0x6280
+/** Authentication failed (for AEAD modes). */
+#define MBEDTLS_ERR_CIPHER_AUTH_FAILED          -0x6300
+/** The context is invalid. For example, because it was freed. */
+#define MBEDTLS_ERR_CIPHER_INVALID_CONTEXT      -0x6380
+
+/* MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** Cipher hardware accelerator failed. */
+#define MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED      -0x6400
+
+#define MBEDTLS_CIPHER_VARIABLE_IV_LEN     0x01    /**< Cipher accepts IVs of variable length. */
+#define MBEDTLS_CIPHER_VARIABLE_KEY_LEN    0x02    /**< Cipher accepts keys of variable length. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief     Supported cipher types.
+ *
+ * \warning   RC4 and DES are considered weak ciphers and their use
+ *            constitutes a security risk. Arm recommends considering stronger
+ *            ciphers instead.
+ */
+typedef enum {
+    MBEDTLS_CIPHER_ID_NONE = 0,  /**< Placeholder to mark the end of cipher ID lists. */
+    MBEDTLS_CIPHER_ID_NULL,      /**< The identity cipher, treated as a stream cipher. */
+    MBEDTLS_CIPHER_ID_AES,       /**< The AES cipher. */
+    MBEDTLS_CIPHER_ID_DES,       /**< The DES cipher. */
+    MBEDTLS_CIPHER_ID_3DES,      /**< The Triple DES cipher. */
+    MBEDTLS_CIPHER_ID_CAMELLIA,  /**< The Camellia cipher. */
+    MBEDTLS_CIPHER_ID_BLOWFISH,  /**< The Blowfish cipher. */
+    MBEDTLS_CIPHER_ID_ARC4,      /**< The RC4 cipher. */
+    MBEDTLS_CIPHER_ID_ARIA,      /**< The Aria cipher. */
+    MBEDTLS_CIPHER_ID_CHACHA20,  /**< The ChaCha20 cipher. */
+} mbedtls_cipher_id_t;
+
+/**
+ * \brief     Supported {cipher type, cipher mode} pairs.
+ *
+ * \warning   RC4 and DES are considered weak ciphers and their use
+ *            constitutes a security risk. Arm recommends considering stronger
+ *            ciphers instead.
+ */
+typedef enum {
+    MBEDTLS_CIPHER_NONE = 0,             /**< Placeholder to mark the end of cipher-pair lists. */
+    MBEDTLS_CIPHER_NULL,                 /**< The identity stream cipher. */
+    MBEDTLS_CIPHER_AES_128_ECB,          /**< AES cipher with 128-bit ECB mode. */
+    MBEDTLS_CIPHER_AES_192_ECB,          /**< AES cipher with 192-bit ECB mode. */
+    MBEDTLS_CIPHER_AES_256_ECB,          /**< AES cipher with 256-bit ECB mode. */
+    MBEDTLS_CIPHER_AES_128_CBC,          /**< AES cipher with 128-bit CBC mode. */
+    MBEDTLS_CIPHER_AES_192_CBC,          /**< AES cipher with 192-bit CBC mode. */
+    MBEDTLS_CIPHER_AES_256_CBC,          /**< AES cipher with 256-bit CBC mode. */
+    MBEDTLS_CIPHER_AES_128_CFB128,       /**< AES cipher with 128-bit CFB128 mode. */
+    MBEDTLS_CIPHER_AES_192_CFB128,       /**< AES cipher with 192-bit CFB128 mode. */
+    MBEDTLS_CIPHER_AES_256_CFB128,       /**< AES cipher with 256-bit CFB128 mode. */
+    MBEDTLS_CIPHER_AES_128_CTR,          /**< AES cipher with 128-bit CTR mode. */
+    MBEDTLS_CIPHER_AES_192_CTR,          /**< AES cipher with 192-bit CTR mode. */
+    MBEDTLS_CIPHER_AES_256_CTR,          /**< AES cipher with 256-bit CTR mode. */
+    MBEDTLS_CIPHER_AES_128_GCM,          /**< AES cipher with 128-bit GCM mode. */
+    MBEDTLS_CIPHER_AES_192_GCM,          /**< AES cipher with 192-bit GCM mode. */
+    MBEDTLS_CIPHER_AES_256_GCM,          /**< AES cipher with 256-bit GCM mode. */
+    MBEDTLS_CIPHER_CAMELLIA_128_ECB,     /**< Camellia cipher with 128-bit ECB mode. */
+    MBEDTLS_CIPHER_CAMELLIA_192_ECB,     /**< Camellia cipher with 192-bit ECB mode. */
+    MBEDTLS_CIPHER_CAMELLIA_256_ECB,     /**< Camellia cipher with 256-bit ECB mode. */
+    MBEDTLS_CIPHER_CAMELLIA_128_CBC,     /**< Camellia cipher with 128-bit CBC mode. */
+    MBEDTLS_CIPHER_CAMELLIA_192_CBC,     /**< Camellia cipher with 192-bit CBC mode. */
+    MBEDTLS_CIPHER_CAMELLIA_256_CBC,     /**< Camellia cipher with 256-bit CBC mode. */
+    MBEDTLS_CIPHER_CAMELLIA_128_CFB128,  /**< Camellia cipher with 128-bit CFB128 mode. */
+    MBEDTLS_CIPHER_CAMELLIA_192_CFB128,  /**< Camellia cipher with 192-bit CFB128 mode. */
+    MBEDTLS_CIPHER_CAMELLIA_256_CFB128,  /**< Camellia cipher with 256-bit CFB128 mode. */
+    MBEDTLS_CIPHER_CAMELLIA_128_CTR,     /**< Camellia cipher with 128-bit CTR mode. */
+    MBEDTLS_CIPHER_CAMELLIA_192_CTR,     /**< Camellia cipher with 192-bit CTR mode. */
+    MBEDTLS_CIPHER_CAMELLIA_256_CTR,     /**< Camellia cipher with 256-bit CTR mode. */
+    MBEDTLS_CIPHER_CAMELLIA_128_GCM,     /**< Camellia cipher with 128-bit GCM mode. */
+    MBEDTLS_CIPHER_CAMELLIA_192_GCM,     /**< Camellia cipher with 192-bit GCM mode. */
+    MBEDTLS_CIPHER_CAMELLIA_256_GCM,     /**< Camellia cipher with 256-bit GCM mode. */
+    MBEDTLS_CIPHER_DES_ECB,              /**< DES cipher with ECB mode. */
+    MBEDTLS_CIPHER_DES_CBC,              /**< DES cipher with CBC mode. */
+    MBEDTLS_CIPHER_DES_EDE_ECB,          /**< DES cipher with EDE ECB mode. */
+    MBEDTLS_CIPHER_DES_EDE_CBC,          /**< DES cipher with EDE CBC mode. */
+    MBEDTLS_CIPHER_DES_EDE3_ECB,         /**< DES cipher with EDE3 ECB mode. */
+    MBEDTLS_CIPHER_DES_EDE3_CBC,         /**< DES cipher with EDE3 CBC mode. */
+    MBEDTLS_CIPHER_BLOWFISH_ECB,         /**< Blowfish cipher with ECB mode. */
+    MBEDTLS_CIPHER_BLOWFISH_CBC,         /**< Blowfish cipher with CBC mode. */
+    MBEDTLS_CIPHER_BLOWFISH_CFB64,       /**< Blowfish cipher with CFB64 mode. */
+    MBEDTLS_CIPHER_BLOWFISH_CTR,         /**< Blowfish cipher with CTR mode. */
+    MBEDTLS_CIPHER_ARC4_128,             /**< RC4 cipher with 128-bit mode. */
+    MBEDTLS_CIPHER_AES_128_CCM,          /**< AES cipher with 128-bit CCM mode. */
+    MBEDTLS_CIPHER_AES_192_CCM,          /**< AES cipher with 192-bit CCM mode. */
+    MBEDTLS_CIPHER_AES_256_CCM,          /**< AES cipher with 256-bit CCM mode. */
+    MBEDTLS_CIPHER_CAMELLIA_128_CCM,     /**< Camellia cipher with 128-bit CCM mode. */
+    MBEDTLS_CIPHER_CAMELLIA_192_CCM,     /**< Camellia cipher with 192-bit CCM mode. */
+    MBEDTLS_CIPHER_CAMELLIA_256_CCM,     /**< Camellia cipher with 256-bit CCM mode. */
+    MBEDTLS_CIPHER_ARIA_128_ECB,         /**< Aria cipher with 128-bit key and ECB mode. */
+    MBEDTLS_CIPHER_ARIA_192_ECB,         /**< Aria cipher with 192-bit key and ECB mode. */
+    MBEDTLS_CIPHER_ARIA_256_ECB,         /**< Aria cipher with 256-bit key and ECB mode. */
+    MBEDTLS_CIPHER_ARIA_128_CBC,         /**< Aria cipher with 128-bit key and CBC mode. */
+    MBEDTLS_CIPHER_ARIA_192_CBC,         /**< Aria cipher with 192-bit key and CBC mode. */
+    MBEDTLS_CIPHER_ARIA_256_CBC,         /**< Aria cipher with 256-bit key and CBC mode. */
+    MBEDTLS_CIPHER_ARIA_128_CFB128,      /**< Aria cipher with 128-bit key and CFB-128 mode. */
+    MBEDTLS_CIPHER_ARIA_192_CFB128,      /**< Aria cipher with 192-bit key and CFB-128 mode. */
+    MBEDTLS_CIPHER_ARIA_256_CFB128,      /**< Aria cipher with 256-bit key and CFB-128 mode. */
+    MBEDTLS_CIPHER_ARIA_128_CTR,         /**< Aria cipher with 128-bit key and CTR mode. */
+    MBEDTLS_CIPHER_ARIA_192_CTR,         /**< Aria cipher with 192-bit key and CTR mode. */
+    MBEDTLS_CIPHER_ARIA_256_CTR,         /**< Aria cipher with 256-bit key and CTR mode. */
+    MBEDTLS_CIPHER_ARIA_128_GCM,         /**< Aria cipher with 128-bit key and GCM mode. */
+    MBEDTLS_CIPHER_ARIA_192_GCM,         /**< Aria cipher with 192-bit key and GCM mode. */
+    MBEDTLS_CIPHER_ARIA_256_GCM,         /**< Aria cipher with 256-bit key and GCM mode. */
+    MBEDTLS_CIPHER_ARIA_128_CCM,         /**< Aria cipher with 128-bit key and CCM mode. */
+    MBEDTLS_CIPHER_ARIA_192_CCM,         /**< Aria cipher with 192-bit key and CCM mode. */
+    MBEDTLS_CIPHER_ARIA_256_CCM,         /**< Aria cipher with 256-bit key and CCM mode. */
+    MBEDTLS_CIPHER_AES_128_OFB,          /**< AES 128-bit cipher in OFB mode. */
+    MBEDTLS_CIPHER_AES_192_OFB,          /**< AES 192-bit cipher in OFB mode. */
+    MBEDTLS_CIPHER_AES_256_OFB,          /**< AES 256-bit cipher in OFB mode. */
+    MBEDTLS_CIPHER_AES_128_XTS,          /**< AES 128-bit cipher in XTS block mode. */
+    MBEDTLS_CIPHER_AES_256_XTS,          /**< AES 256-bit cipher in XTS block mode. */
+    MBEDTLS_CIPHER_CHACHA20,             /**< ChaCha20 stream cipher. */
+    MBEDTLS_CIPHER_CHACHA20_POLY1305,    /**< ChaCha20-Poly1305 AEAD cipher. */
+    MBEDTLS_CIPHER_AES_128_KW,           /**< AES cipher with 128-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_192_KW,           /**< AES cipher with 192-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_256_KW,           /**< AES cipher with 256-bit NIST KW mode. */
+    MBEDTLS_CIPHER_AES_128_KWP,          /**< AES cipher with 128-bit NIST KWP mode. */
+    MBEDTLS_CIPHER_AES_192_KWP,          /**< AES cipher with 192-bit NIST KWP mode. */
+    MBEDTLS_CIPHER_AES_256_KWP,          /**< AES cipher with 256-bit NIST KWP mode. */
+} mbedtls_cipher_type_t;
+
+/** Supported cipher modes. */
+typedef enum {
+    MBEDTLS_MODE_NONE = 0,               /**< None.                        */
+    MBEDTLS_MODE_ECB,                    /**< The ECB cipher mode.         */
+    MBEDTLS_MODE_CBC,                    /**< The CBC cipher mode.         */
+    MBEDTLS_MODE_CFB,                    /**< The CFB cipher mode.         */
+    MBEDTLS_MODE_OFB,                    /**< The OFB cipher mode.         */
+    MBEDTLS_MODE_CTR,                    /**< The CTR cipher mode.         */
+    MBEDTLS_MODE_GCM,                    /**< The GCM cipher mode.         */
+    MBEDTLS_MODE_STREAM,                 /**< The stream cipher mode.      */
+    MBEDTLS_MODE_CCM,                    /**< The CCM cipher mode.         */
+    MBEDTLS_MODE_XTS,                    /**< The XTS cipher mode.         */
+    MBEDTLS_MODE_CHACHAPOLY,             /**< The ChaCha-Poly cipher mode. */
+    MBEDTLS_MODE_KW,                     /**< The SP800-38F KW mode */
+    MBEDTLS_MODE_KWP,                    /**< The SP800-38F KWP mode */
+} mbedtls_cipher_mode_t;
+
+/** Supported cipher padding types. */
+typedef enum {
+    MBEDTLS_PADDING_PKCS7 = 0,     /**< PKCS7 padding (default).        */
+    MBEDTLS_PADDING_ONE_AND_ZEROS, /**< ISO/IEC 7816-4 padding.         */
+    MBEDTLS_PADDING_ZEROS_AND_LEN, /**< ANSI X.923 padding.             */
+    MBEDTLS_PADDING_ZEROS,         /**< Zero padding (not reversible). */
+    MBEDTLS_PADDING_NONE,          /**< Never pad (full blocks only).   */
+} mbedtls_cipher_padding_t;
+
+/** Type of operation. */
+typedef enum {
+    MBEDTLS_OPERATION_NONE = -1,
+    MBEDTLS_DECRYPT = 0,
+    MBEDTLS_ENCRYPT,
+} mbedtls_operation_t;
+
+enum {
+    /** Undefined key length. */
+    MBEDTLS_KEY_LENGTH_NONE = 0,
+    /** Key length, in bits (including parity), for DES keys. */
+    MBEDTLS_KEY_LENGTH_DES  = 64,
+    /** Key length in bits, including parity, for DES in two-key EDE. */
+    MBEDTLS_KEY_LENGTH_DES_EDE = 128,
+    /** Key length in bits, including parity, for DES in three-key EDE. */
+    MBEDTLS_KEY_LENGTH_DES_EDE3 = 192,
+};
+
+/** Maximum length of any IV, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_IV_LENGTH defined
+ * in ssl_internal.h. */
+#define MBEDTLS_MAX_IV_LENGTH      16
+
+/** Maximum block size of any cipher, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_BLOCK_LENGTH defined
+ * in ssl_internal.h. */
+#define MBEDTLS_MAX_BLOCK_LENGTH   16
+
+/** Maximum key length, in Bytes. */
+/* This should ideally be derived automatically from list of ciphers.
+ * For now, only check whether XTS is enabled which uses 64 Byte keys,
+ * and use 32 Bytes as an upper bound for the maximum key length otherwise.
+ * This should be kept in sync with MBEDTLS_SSL_MAX_BLOCK_LENGTH defined
+ * in ssl_internal.h, which however deliberately ignores the case of XTS
+ * since the latter isn't used in SSL/TLS. */
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+#define MBEDTLS_MAX_KEY_LENGTH     64
+#else
+#define MBEDTLS_MAX_KEY_LENGTH     32
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
+/**
+ * Base cipher information (opaque struct).
+ */
+typedef struct mbedtls_cipher_base_t mbedtls_cipher_base_t;
+
+/**
+ * CMAC context (opaque struct).
+ */
+typedef struct mbedtls_cmac_context_t mbedtls_cmac_context_t;
+
+/**
+ * Cipher information. Allows calling cipher functions
+ * in a generic way.
+ */
+typedef struct mbedtls_cipher_info_t
+{
+    /** Full cipher identifier. For example,
+     * MBEDTLS_CIPHER_AES_256_CBC.
+     */
+    mbedtls_cipher_type_t type;
+
+    /** The cipher mode. For example, MBEDTLS_MODE_CBC. */
+    mbedtls_cipher_mode_t mode;
+
+    /** The cipher key length, in bits. This is the
+     * default length for variable sized ciphers.
+     * Includes parity bits for ciphers like DES.
+     */
+    unsigned int key_bitlen;
+
+    /** Name of the cipher. */
+    const char * name;
+
+    /** IV or nonce size, in Bytes.
+     * For ciphers that accept variable IV sizes,
+     * this is the recommended size.
+     */
+    unsigned int iv_size;
+
+    /** Bitflag comprised of MBEDTLS_CIPHER_VARIABLE_IV_LEN and
+     *  MBEDTLS_CIPHER_VARIABLE_KEY_LEN indicating whether the
+     *  cipher supports variable IV or variable key sizes, respectively.
+     */
+    int flags;
+
+    /** The block size, in Bytes. */
+    unsigned int block_size;
+
+    /** Struct for base cipher information and functions. */
+    const mbedtls_cipher_base_t *base;
+
+} mbedtls_cipher_info_t;
+
+/**
+ * Generic cipher context.
+ */
+typedef struct mbedtls_cipher_context_t
+{
+    /** Information about the associated cipher. */
+    const mbedtls_cipher_info_t *cipher_info;
+
+    /** Key length to use. */
+    int key_bitlen;
+
+    /** Operation that the key of the context has been
+     * initialized for.
+     */
+    mbedtls_operation_t operation;
+
+#if defined(MBEDTLS_CIPHER_MODE_WITH_PADDING)
+    /** Padding functions to use, if relevant for
+     * the specific cipher mode.
+     */
+    void (*add_padding)( unsigned char *output, size_t olen, size_t data_len );
+    int (*get_padding)( unsigned char *input, size_t ilen, size_t *data_len );
+#endif
+
+    /** Buffer for input that has not been processed yet. */
+    unsigned char unprocessed_data[MBEDTLS_MAX_BLOCK_LENGTH];
+
+    /** Number of Bytes that have not been processed yet. */
+    size_t unprocessed_len;
+
+    /** Current IV or NONCE_COUNTER for CTR-mode, data unit (or sector) number
+     * for XTS-mode. */
+    unsigned char iv[MBEDTLS_MAX_IV_LENGTH];
+
+    /** IV size in Bytes, for ciphers with variable-length IVs. */
+    size_t iv_size;
+
+    /** The cipher-specific context. */
+    void *cipher_ctx;
+
+#if defined(MBEDTLS_CMAC_C)
+    /** CMAC-specific context. */
+    mbedtls_cmac_context_t *cmac_ctx;
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    /** Indicates whether the cipher operations should be performed
+     *  by Mbed TLS' own crypto library or an external implementation
+     *  of the PSA Crypto API.
+     *  This is unset if the cipher context was established through
+     *  mbedtls_cipher_setup(), and set if it was established through
+     *  mbedtls_cipher_setup_psa().
+     */
+    unsigned char psa_enabled;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+} mbedtls_cipher_context_t;
+
+/**
+ * \brief This function retrieves the list of ciphers supported
+ *        by the generic cipher module.
+ *
+ *        For any cipher identifier in the returned list, you can
+ *        obtain the corresponding generic cipher information structure
+ *        via mbedtls_cipher_info_from_type(), which can then be used
+ *        to prepare a cipher context via mbedtls_cipher_setup().
+ *
+ *
+ * \return      A statically-allocated array of cipher identifiers
+ *              of type cipher_type_t. The last entry is zero.
+ */
+const int *mbedtls_cipher_list( void );
+
+/**
+ * \brief               This function retrieves the cipher-information
+ *                      structure associated with the given cipher name.
+ *
+ * \param cipher_name   Name of the cipher to search for. This must not be
+ *                      \c NULL.
+ *
+ * \return              The cipher information structure associated with the
+ *                      given \p cipher_name.
+ * \return              \c NULL if the associated cipher information is not found.
+ */
+const mbedtls_cipher_info_t *mbedtls_cipher_info_from_string( const char *cipher_name );
+
+/**
+ * \brief               This function retrieves the cipher-information
+ *                      structure associated with the given cipher type.
+ *
+ * \param cipher_type   Type of the cipher to search for.
+ *
+ * \return              The cipher information structure associated with the
+ *                      given \p cipher_type.
+ * \return              \c NULL if the associated cipher information is not found.
+ */
+const mbedtls_cipher_info_t *mbedtls_cipher_info_from_type( const mbedtls_cipher_type_t cipher_type );
+
+/**
+ * \brief               This function retrieves the cipher-information
+ *                      structure associated with the given cipher ID,
+ *                      key size and mode.
+ *
+ * \param cipher_id     The ID of the cipher to search for. For example,
+ *                      #MBEDTLS_CIPHER_ID_AES.
+ * \param key_bitlen    The length of the key in bits.
+ * \param mode          The cipher mode. For example, #MBEDTLS_MODE_CBC.
+ *
+ * \return              The cipher information structure associated with the
+ *                      given \p cipher_id.
+ * \return              \c NULL if the associated cipher information is not found.
+ */
+const mbedtls_cipher_info_t *mbedtls_cipher_info_from_values( const mbedtls_cipher_id_t cipher_id,
+                                              int key_bitlen,
+                                              const mbedtls_cipher_mode_t mode );
+
+/**
+ * \brief               This function initializes a \p cipher_context as NONE.
+ *
+ * \param ctx           The context to be initialized. This must not be \c NULL.
+ */
+void mbedtls_cipher_init( mbedtls_cipher_context_t *ctx );
+
+/**
+ * \brief               This function frees and clears the cipher-specific
+ *                      context of \p ctx. Freeing \p ctx itself remains the
+ *                      responsibility of the caller.
+ *
+ * \param ctx           The context to be freed. If this is \c NULL, the
+ *                      function has no effect, otherwise this must point to an
+ *                      initialized context.
+ */
+void mbedtls_cipher_free( mbedtls_cipher_context_t *ctx );
+
+
+/**
+ * \brief               This function initializes a cipher context for
+ *                      use with the given cipher primitive.
+ *
+ * \param ctx           The context to initialize. This must be initialized.
+ * \param cipher_info   The cipher to use.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_ALLOC_FAILED if allocation of the
+ *                      cipher-specific context fails.
+ *
+ * \internal Currently, the function also clears the structure.
+ * In future versions, the caller will be required to call
+ * mbedtls_cipher_init() on the structure first.
+ */
+int mbedtls_cipher_setup( mbedtls_cipher_context_t *ctx,
+                          const mbedtls_cipher_info_t *cipher_info );
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief               This function initializes a cipher context for
+ *                      PSA-based use with the given cipher primitive.
+ *
+ * \note                See #MBEDTLS_USE_PSA_CRYPTO for information on PSA.
+ *
+ * \param ctx           The context to initialize. May not be \c NULL.
+ * \param cipher_info   The cipher to use.
+ * \param taglen        For AEAD ciphers, the length in bytes of the
+ *                      authentication tag to use. Subsequent uses of
+ *                      mbedtls_cipher_auth_encrypt() or
+ *                      mbedtls_cipher_auth_decrypt() must provide
+ *                      the same tag length.
+ *                      For non-AEAD ciphers, the value must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_ALLOC_FAILED if allocation of the
+ *                      cipher-specific context fails.
+ */
+int mbedtls_cipher_setup_psa( mbedtls_cipher_context_t *ctx,
+                              const mbedtls_cipher_info_t *cipher_info,
+                              size_t taglen );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+/**
+ * \brief        This function returns the block size of the given cipher.
+ *
+ * \param ctx    The context of the cipher. This must be initialized.
+ *
+ * \return       The block size of the underlying cipher.
+ * \return       \c 0 if \p ctx has not been initialized.
+ */
+static inline unsigned int mbedtls_cipher_get_block_size(
+    const mbedtls_cipher_context_t *ctx )
+{
+    MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, 0 );
+    if( ctx->cipher_info == NULL )
+        return 0;
+
+    return ctx->cipher_info->block_size;
+}
+
+/**
+ * \brief        This function returns the mode of operation for
+ *               the cipher. For example, MBEDTLS_MODE_CBC.
+ *
+ * \param ctx    The context of the cipher. This must be initialized.
+ *
+ * \return       The mode of operation.
+ * \return       #MBEDTLS_MODE_NONE if \p ctx has not been initialized.
+ */
+static inline mbedtls_cipher_mode_t mbedtls_cipher_get_cipher_mode(
+    const mbedtls_cipher_context_t *ctx )
+{
+    MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, MBEDTLS_MODE_NONE );
+    if( ctx->cipher_info == NULL )
+        return MBEDTLS_MODE_NONE;
+
+    return ctx->cipher_info->mode;
+}
+
+/**
+ * \brief       This function returns the size of the IV or nonce
+ *              of the cipher, in Bytes.
+ *
+ * \param ctx   The context of the cipher. This must be initialized.
+ *
+ * \return      The recommended IV size if no IV has been set.
+ * \return      \c 0 for ciphers not using an IV or a nonce.
+ * \return      The actual size if an IV has been set.
+ */
+static inline int mbedtls_cipher_get_iv_size(
+    const mbedtls_cipher_context_t *ctx )
+{
+    MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, 0 );
+    if( ctx->cipher_info == NULL )
+        return 0;
+
+    if( ctx->iv_size != 0 )
+        return (int) ctx->iv_size;
+
+    return (int) ctx->cipher_info->iv_size;
+}
+
+/**
+ * \brief               This function returns the type of the given cipher.
+ *
+ * \param ctx           The context of the cipher. This must be initialized.
+ *
+ * \return              The type of the cipher.
+ * \return              #MBEDTLS_CIPHER_NONE if \p ctx has not been initialized.
+ */
+static inline mbedtls_cipher_type_t mbedtls_cipher_get_type(
+    const mbedtls_cipher_context_t *ctx )
+{
+    MBEDTLS_INTERNAL_VALIDATE_RET(
+        ctx != NULL, MBEDTLS_CIPHER_NONE );
+    if( ctx->cipher_info == NULL )
+        return MBEDTLS_CIPHER_NONE;
+
+    return ctx->cipher_info->type;
+}
+
+/**
+ * \brief               This function returns the name of the given cipher
+ *                      as a string.
+ *
+ * \param ctx           The context of the cipher. This must be initialized.
+ *
+ * \return              The name of the cipher.
+ * \return              NULL if \p ctx has not been not initialized.
+ */
+static inline const char *mbedtls_cipher_get_name(
+    const mbedtls_cipher_context_t *ctx )
+{
+    MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, 0 );
+    if( ctx->cipher_info == NULL )
+        return 0;
+
+    return ctx->cipher_info->name;
+}
+
+/**
+ * \brief               This function returns the key length of the cipher.
+ *
+ * \param ctx           The context of the cipher. This must be initialized.
+ *
+ * \return              The key length of the cipher in bits.
+ * \return              #MBEDTLS_KEY_LENGTH_NONE if ctx \p has not been
+ *                      initialized.
+ */
+static inline int mbedtls_cipher_get_key_bitlen(
+    const mbedtls_cipher_context_t *ctx )
+{
+    MBEDTLS_INTERNAL_VALIDATE_RET(
+        ctx != NULL, MBEDTLS_KEY_LENGTH_NONE );
+    if( ctx->cipher_info == NULL )
+        return MBEDTLS_KEY_LENGTH_NONE;
+
+    return (int) ctx->cipher_info->key_bitlen;
+}
+
+/**
+ * \brief          This function returns the operation of the given cipher.
+ *
+ * \param ctx      The context of the cipher. This must be initialized.
+ *
+ * \return         The type of operation: #MBEDTLS_ENCRYPT or #MBEDTLS_DECRYPT.
+ * \return         #MBEDTLS_OPERATION_NONE if \p ctx has not been initialized.
+ */
+static inline mbedtls_operation_t mbedtls_cipher_get_operation(
+    const mbedtls_cipher_context_t *ctx )
+{
+    MBEDTLS_INTERNAL_VALIDATE_RET(
+        ctx != NULL, MBEDTLS_OPERATION_NONE );
+    if( ctx->cipher_info == NULL )
+        return MBEDTLS_OPERATION_NONE;
+
+    return ctx->operation;
+}
+
+/**
+ * \brief               This function sets the key to use with the given context.
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a cipher information structure.
+ * \param key           The key to use. This must be a readable buffer of at
+ *                      least \p key_bitlen Bits.
+ * \param key_bitlen    The key length to use, in Bits.
+ * \param operation     The operation that the key will be used for:
+ *                      #MBEDTLS_ENCRYPT or #MBEDTLS_DECRYPT.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_setkey( mbedtls_cipher_context_t *ctx,
+                           const unsigned char *key,
+                           int key_bitlen,
+                           const mbedtls_operation_t operation );
+
+#if defined(MBEDTLS_CIPHER_MODE_WITH_PADDING)
+/**
+ * \brief               This function sets the padding mode, for cipher modes
+ *                      that use padding.
+ *
+ *                      The default passing mode is PKCS7 padding.
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a cipher information structure.
+ * \param mode          The padding mode.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE
+ *                      if the selected padding mode is not supported.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA if the cipher mode
+ *                      does not support padding.
+ */
+int mbedtls_cipher_set_padding_mode( mbedtls_cipher_context_t *ctx,
+                                     mbedtls_cipher_padding_t mode );
+#endif /* MBEDTLS_CIPHER_MODE_WITH_PADDING */
+
+/**
+ * \brief           This function sets the initialization vector (IV)
+ *                  or nonce.
+ *
+ * \note            Some ciphers do not use IVs nor nonce. For these
+ *                  ciphers, this function has no effect.
+ *
+ * \param ctx       The generic cipher context. This must be initialized and
+ *                  bound to a cipher information structure.
+ * \param iv        The IV to use, or NONCE_COUNTER for CTR-mode ciphers. This
+ *                  must be a readable buffer of at least \p iv_len Bytes.
+ * \param iv_len    The IV length for ciphers with variable-size IV.
+ *                  This parameter is discarded by ciphers with fixed-size IV.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                  parameter-verification failure.
+ */
+int mbedtls_cipher_set_iv( mbedtls_cipher_context_t *ctx,
+                           const unsigned char *iv,
+                           size_t iv_len );
+
+/**
+ * \brief         This function resets the cipher state.
+ *
+ * \param ctx     The generic cipher context. This must be initialized.
+ *
+ * \return        \c 0 on success.
+ * \return        #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                parameter-verification failure.
+ */
+int mbedtls_cipher_reset( mbedtls_cipher_context_t *ctx );
+
+#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CHACHAPOLY_C)
+/**
+ * \brief               This function adds additional data for AEAD ciphers.
+ *                      Currently supported with GCM and ChaCha20+Poly1305.
+ *                      This must be called exactly once, after
+ *                      mbedtls_cipher_reset().
+ *
+ * \param ctx           The generic cipher context. This must be initialized.
+ * \param ad            The additional data to use. This must be a readable
+ *                      buffer of at least \p ad_len Bytes.
+ * \param ad_len        The length of \p ad in Bytes.
+ *
+ * \return              \c 0 on success.
+ * \return              A specific error code on failure.
+ */
+int mbedtls_cipher_update_ad( mbedtls_cipher_context_t *ctx,
+                      const unsigned char *ad, size_t ad_len );
+#endif /* MBEDTLS_GCM_C || MBEDTLS_CHACHAPOLY_C */
+
+/**
+ * \brief               The generic cipher update function. It encrypts or
+ *                      decrypts using the given cipher context. Writes as
+ *                      many block-sized blocks of data as possible to output.
+ *                      Any data that cannot be written immediately is either
+ *                      added to the next block, or flushed when
+ *                      mbedtls_cipher_finish() is called.
+ *                      Exception: For MBEDTLS_MODE_ECB, expects a single block
+ *                      in size. For example, 16 Bytes for AES.
+ *
+ * \note                If the underlying cipher is used in GCM mode, all calls
+ *                      to this function, except for the last one before
+ *                      mbedtls_cipher_finish(), must have \p ilen as a
+ *                      multiple of the block size of the cipher.
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes.
+ * \param ilen          The length of the input data.
+ * \param output        The buffer for the output data. This must be able to
+ *                      hold at least `ilen + block_size`. This must not be the
+ *                      same buffer as \p input.
+ * \param olen          The length of the output data, to be updated with the
+ *                      actual number of Bytes written. This must not be
+ *                      \c NULL.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE on an
+ *                      unsupported mode for a cipher.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx,
+                           const unsigned char *input,
+                           size_t ilen, unsigned char *output,
+                           size_t *olen );
+
+/**
+ * \brief               The generic cipher finalization function. If data still
+ *                      needs to be flushed from an incomplete block, the data
+ *                      contained in it is padded to the size of
+ *                      the last block, and written to the \p output buffer.
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key.
+ * \param output        The buffer to write data to. This needs to be a writable
+ *                      buffer of at least \p block_size Bytes.
+ * \param olen          The length of the data written to the \p output buffer.
+ *                      This may not be \c NULL.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED on decryption
+ *                      expecting a full block but not receiving one.
+ * \return              #MBEDTLS_ERR_CIPHER_INVALID_PADDING on invalid padding
+ *                      while decrypting.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_finish( mbedtls_cipher_context_t *ctx,
+                   unsigned char *output, size_t *olen );
+
+#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CHACHAPOLY_C)
+/**
+ * \brief               This function writes a tag for AEAD ciphers.
+ *                      Currently supported with GCM and ChaCha20+Poly1305.
+ *                      This must be called after mbedtls_cipher_finish().
+ *
+ * \param ctx           The generic cipher context. This must be initialized,
+ *                      bound to a key, and have just completed a cipher
+ *                      operation through mbedtls_cipher_finish() the tag for
+ *                      which should be written.
+ * \param tag           The buffer to write the tag to. This must be a writable
+ *                      buffer of at least \p tag_len Bytes.
+ * \param tag_len       The length of the tag to write.
+ *
+ * \return              \c 0 on success.
+ * \return              A specific error code on failure.
+ */
+int mbedtls_cipher_write_tag( mbedtls_cipher_context_t *ctx,
+                      unsigned char *tag, size_t tag_len );
+
+/**
+ * \brief               This function checks the tag for AEAD ciphers.
+ *                      Currently supported with GCM and ChaCha20+Poly1305.
+ *                      This must be called after mbedtls_cipher_finish().
+ *
+ * \param ctx           The generic cipher context. This must be initialized.
+ * \param tag           The buffer holding the tag. This must be a readable
+ *                      buffer of at least \p tag_len Bytes.
+ * \param tag_len       The length of the tag to check.
+ *
+ * \return              \c 0 on success.
+ * \return              A specific error code on failure.
+ */
+int mbedtls_cipher_check_tag( mbedtls_cipher_context_t *ctx,
+                      const unsigned char *tag, size_t tag_len );
+#endif /* MBEDTLS_GCM_C || MBEDTLS_CHACHAPOLY_C */
+
+/**
+ * \brief               The generic all-in-one encryption/decryption function,
+ *                      for all ciphers except AEAD constructs.
+ *
+ * \param ctx           The generic cipher context. This must be initialized.
+ * \param iv            The IV to use, or NONCE_COUNTER for CTR-mode ciphers.
+ *                      This must be a readable buffer of at least \p iv_len
+ *                      Bytes.
+ * \param iv_len        The IV length for ciphers with variable-size IV.
+ *                      This parameter is discarded by ciphers with fixed-size
+ *                      IV.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes.
+ * \param ilen          The length of the input data in Bytes.
+ * \param output        The buffer for the output data. This must be able to
+ *                      hold at least `ilen + block_size`. This must not be the
+ *                      same buffer as \p input.
+ * \param olen          The length of the output data, to be updated with the
+ *                      actual number of Bytes written. This must not be
+ *                      \c NULL.
+ *
+ * \note                Some ciphers do not use IVs nor nonce. For these
+ *                      ciphers, use \p iv = NULL and \p iv_len = 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED on decryption
+ *                      expecting a full block but not receiving one.
+ * \return              #MBEDTLS_ERR_CIPHER_INVALID_PADDING on invalid padding
+ *                      while decrypting.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx,
+                  const unsigned char *iv, size_t iv_len,
+                  const unsigned char *input, size_t ilen,
+                  unsigned char *output, size_t *olen );
+
+#if defined(MBEDTLS_CIPHER_MODE_AEAD)
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_WARNING */
+/**
+ * \brief               The generic authenticated encryption (AEAD) function.
+ *
+ * \deprecated          Superseded by mbedtls_cipher_auth_encrypt_ext().
+ *
+ * \note                This function only supports AEAD algorithms, not key
+ *                      wrapping algorithms such as NIST_KW; for this, see
+ *                      mbedtls_cipher_auth_encrypt_ext().
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key associated with an AEAD algorithm.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and must not be \c NULL.
+ * \param iv_len        The length of the nonce. This must satisfy the
+ *                      constraints imposed by the AEAD cipher used.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
+ * \param ad_len        The length of \p ad.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
+ * \param ilen          The length of the input data.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p ilen Bytes, and must
+ *                      not be \c NULL.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag           The buffer for the authentication tag. This must be a
+ *                      writable buffer of at least \p tag_len Bytes. See note
+ *                      below regarding restrictions with PSA-based contexts.
+ * \param tag_len       The desired length of the authentication tag. This
+ *                      must match the constraints imposed by the AEAD cipher
+ *                      used, and in particular must not be \c 0.
+ *
+ * \note                If the context is based on PSA (that is, it was set up
+ *                      with mbedtls_cipher_setup_psa()), then it is required
+ *                      that \c tag == output + ilen. That is, the tag must be
+ *                      appended to the ciphertext as recommended by RFC 5116.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_encrypt( mbedtls_cipher_context_t *ctx,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *ad, size_t ad_len,
+                         const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t *olen,
+                         unsigned char *tag, size_t tag_len )
+                         MBEDTLS_DEPRECATED;
+
+/**
+ * \brief               The generic authenticated decryption (AEAD) function.
+ *
+ * \deprecated          Superseded by mbedtls_cipher_auth_decrypt_ext().
+ *
+ * \note                This function only supports AEAD algorithms, not key
+ *                      wrapping algorithms such as NIST_KW; for this, see
+ *                      mbedtls_cipher_auth_decrypt_ext().
+ *
+ * \note                If the data is not authentic, then the output buffer
+ *                      is zeroed out to prevent the unauthentic plaintext being
+ *                      used, making this interface safer.
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key associated with an AEAD algorithm.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and must not be \c NULL.
+ * \param iv_len        The length of the nonce. This must satisfy the
+ *                      constraints imposed by the AEAD cipher used.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
+ * \param ad_len        The length of \p ad.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
+ * \param ilen          The length of the input data.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p ilen Bytes, and must
+ *                      not be \c NULL.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag           The buffer for the authentication tag. This must be a
+ *                      readable buffer of at least \p tag_len Bytes. See note
+ *                      below regarding restrictions with PSA-based contexts.
+ * \param tag_len       The length of the authentication tag. This must match
+ *                      the constraints imposed by the AEAD cipher used, and in
+ *                      particular must not be \c 0.
+ *
+ * \note                If the context is based on PSA (that is, it was set up
+ *                      with mbedtls_cipher_setup_psa()), then it is required
+ *                      that \c tag == input + len. That is, the tag must be
+ *                      appended to the ciphertext as recommended by RFC 5116.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_AUTH_FAILED if data is not authentic.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_decrypt( mbedtls_cipher_context_t *ctx,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *ad, size_t ad_len,
+                         const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t *olen,
+                         const unsigned char *tag, size_t tag_len )
+                         MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+#endif /* MBEDTLS_CIPHER_MODE_AEAD */
+
+#if defined(MBEDTLS_CIPHER_MODE_AEAD) || defined(MBEDTLS_NIST_KW_C)
+/**
+ * \brief               The authenticated encryption (AEAD/NIST_KW) function.
+ *
+ * \note                For AEAD modes, the tag will be appended to the
+ *                      ciphertext, as recommended by RFC 5116.
+ *                      (NIST_KW doesn't have a separate tag.)
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key, with an AEAD algorithm or NIST_KW.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and may be \c NULL if \p
+ *                      iv_len is \c 0.
+ * \param iv_len        The length of the nonce. For AEAD ciphers, this must
+ *                      satisfy the constraints imposed by the cipher used.
+ *                      For NIST_KW, this must be \c 0.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
+ * \param ad_len        The length of \p ad. For NIST_KW, this must be \c 0.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
+ * \param ilen          The length of the input data.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p output_len Bytes, and
+ *                      must not be \c NULL.
+ * \param output_len    The length of the \p output buffer in Bytes. For AEAD
+ *                      ciphers, this must be at least \p ilen + \p tag_len.
+ *                      For NIST_KW, this must be at least \p ilen + 8
+ *                      (rounded up to a multiple of 8 if KWP is used);
+ *                      \p ilen + 15 is always a safe value.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag_len       The desired length of the authentication tag. For AEAD
+ *                      ciphers, this must match the constraints imposed by
+ *                      the cipher used, and in particular must not be \c 0.
+ *                      For NIST_KW, this must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_encrypt_ext( mbedtls_cipher_context_t *ctx,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *ad, size_t ad_len,
+                         const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t output_len,
+                         size_t *olen, size_t tag_len );
+
+/**
+ * \brief               The authenticated encryption (AEAD/NIST_KW) function.
+ *
+ * \note                If the data is not authentic, then the output buffer
+ *                      is zeroed out to prevent the unauthentic plaintext being
+ *                      used, making this interface safer.
+ *
+ * \note                For AEAD modes, the tag must be appended to the
+ *                      ciphertext, as recommended by RFC 5116.
+ *                      (NIST_KW doesn't have a separate tag.)
+ *
+ * \param ctx           The generic cipher context. This must be initialized and
+ *                      bound to a key, with an AEAD algorithm or NIST_KW.
+ * \param iv            The nonce to use. This must be a readable buffer of
+ *                      at least \p iv_len Bytes and may be \c NULL if \p
+ *                      iv_len is \c 0.
+ * \param iv_len        The length of the nonce. For AEAD ciphers, this must
+ *                      satisfy the constraints imposed by the cipher used.
+ *                      For NIST_KW, this must be \c 0.
+ * \param ad            The additional data to authenticate. This must be a
+ *                      readable buffer of at least \p ad_len Bytes, and may
+ *                      be \c NULL is \p ad_len is \c 0.
+ * \param ad_len        The length of \p ad. For NIST_KW, this must be \c 0.
+ * \param input         The buffer holding the input data. This must be a
+ *                      readable buffer of at least \p ilen Bytes, and may be
+ *                      \c NULL if \p ilen is \c 0.
+ * \param ilen          The length of the input data. For AEAD ciphers this
+ *                      must be at least \p tag_len. For NIST_KW this must be
+ *                      at least \c 8.
+ * \param output        The buffer for the output data. This must be a
+ *                      writable buffer of at least \p output_len Bytes, and
+ *                      may be \c NULL if \p output_len is \c 0.
+ * \param output_len    The length of the \p output buffer in Bytes. For AEAD
+ *                      ciphers, this must be at least \p ilen - \p tag_len.
+ *                      For NIST_KW, this must be at least \p ilen - 8.
+ * \param olen          This will be filled with the actual number of Bytes
+ *                      written to the \p output buffer. This must point to a
+ *                      writable object of type \c size_t.
+ * \param tag_len       The actual length of the authentication tag. For AEAD
+ *                      ciphers, this must match the constraints imposed by
+ *                      the cipher used, and in particular must not be \c 0.
+ *                      For NIST_KW, this must be \c 0.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ *                      parameter-verification failure.
+ * \return              #MBEDTLS_ERR_CIPHER_AUTH_FAILED if data is not authentic.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_decrypt_ext( mbedtls_cipher_context_t *ctx,
+                         const unsigned char *iv, size_t iv_len,
+                         const unsigned char *ad, size_t ad_len,
+                         const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t output_len,
+                         size_t *olen, size_t tag_len );
+#endif /* MBEDTLS_CIPHER_MODE_AEAD || MBEDTLS_NIST_KW_C */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CIPHER_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h
new file mode 100644
index 00000000000..2484c01c7a4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/cipher_internal.h
@@ -0,0 +1,150 @@
+/**
+ * \file cipher_internal.h
+ *
+ * \brief Cipher wrappers.
+ *
+ * \author Adriaan de Jong <dejong@fox-it.com>
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_CIPHER_WRAP_H
+#define MBEDTLS_CIPHER_WRAP_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Base cipher information. The non-mode specific functions and values.
+ */
+struct mbedtls_cipher_base_t
+{
+    /** Base Cipher type (e.g. MBEDTLS_CIPHER_ID_AES) */
+    mbedtls_cipher_id_t cipher;
+
+    /** Encrypt using ECB */
+    int (*ecb_func)( void *ctx, mbedtls_operation_t mode,
+                     const unsigned char *input, unsigned char *output );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+    /** Encrypt using CBC */
+    int (*cbc_func)( void *ctx, mbedtls_operation_t mode, size_t length,
+                     unsigned char *iv, const unsigned char *input,
+                     unsigned char *output );
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+    /** Encrypt using CFB (Full length) */
+    int (*cfb_func)( void *ctx, mbedtls_operation_t mode, size_t length, size_t *iv_off,
+                     unsigned char *iv, const unsigned char *input,
+                     unsigned char *output );
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_OFB)
+    /** Encrypt using OFB (Full length) */
+    int (*ofb_func)( void *ctx, size_t length, size_t *iv_off,
+                     unsigned char *iv,
+                     const unsigned char *input,
+                     unsigned char *output );
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+    /** Encrypt using CTR */
+    int (*ctr_func)( void *ctx, size_t length, size_t *nc_off,
+                     unsigned char *nonce_counter, unsigned char *stream_block,
+                     const unsigned char *input, unsigned char *output );
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+    /** Encrypt or decrypt using XTS. */
+    int (*xts_func)( void *ctx, mbedtls_operation_t mode, size_t length,
+                     const unsigned char data_unit[16],
+                     const unsigned char *input, unsigned char *output );
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_STREAM)
+    /** Encrypt using STREAM */
+    int (*stream_func)( void *ctx, size_t length,
+                        const unsigned char *input, unsigned char *output );
+#endif
+
+    /** Set key for encryption purposes */
+    int (*setkey_enc_func)( void *ctx, const unsigned char *key,
+                            unsigned int key_bitlen );
+
+    /** Set key for decryption purposes */
+    int (*setkey_dec_func)( void *ctx, const unsigned char *key,
+                            unsigned int key_bitlen);
+
+    /** Allocate a new context */
+    void * (*ctx_alloc_func)( void );
+
+    /** Free the given context */
+    void (*ctx_free_func)( void *ctx );
+
+};
+
+typedef struct
+{
+    mbedtls_cipher_type_t type;
+    const mbedtls_cipher_info_t *info;
+} mbedtls_cipher_definition_t;
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+typedef enum
+{
+    MBEDTLS_CIPHER_PSA_KEY_UNSET = 0,
+    MBEDTLS_CIPHER_PSA_KEY_OWNED, /* Used for PSA-based cipher contexts which */
+                                  /* use raw key material internally imported */
+                                  /* as a volatile key, and which hence need  */
+                                  /* to destroy that key when the context is  */
+                                  /* freed.                                   */
+    MBEDTLS_CIPHER_PSA_KEY_NOT_OWNED, /* Used for PSA-based cipher contexts   */
+                                      /* which use a key provided by the      */
+                                      /* user, and which hence will not be    */
+                                      /* destroyed when the context is freed. */
+} mbedtls_cipher_psa_key_ownership;
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    psa_key_id_t slot;
+    mbedtls_cipher_psa_key_ownership slot_state;
+} mbedtls_cipher_context_psa;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+extern const mbedtls_cipher_definition_t mbedtls_cipher_definitions[];
+
+extern int mbedtls_cipher_supported[];
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CIPHER_WRAP_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/cmac.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/cmac.h
new file mode 100644
index 00000000000..8934886af74
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/cmac.h
@@ -0,0 +1,247 @@
+/**
+ * \file cmac.h
+ *
+ * \brief This file contains CMAC definitions and functions.
+ *
+ * The Cipher-based Message Authentication Code (CMAC) Mode for
+ * Authentication is defined in <em>RFC-4493: The AES-CMAC Algorithm</em>.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CMAC_H
+#define MBEDTLS_CMAC_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/cipher.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** CMAC hardware accelerator failed. */
+#define MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED -0x007A
+
+#define MBEDTLS_AES_BLOCK_SIZE          16
+#define MBEDTLS_DES3_BLOCK_SIZE         8
+
+#if defined(MBEDTLS_AES_C)
+#define MBEDTLS_CIPHER_BLKSIZE_MAX      16  /**< The longest block used by CMAC is that of AES. */
+#else
+#define MBEDTLS_CIPHER_BLKSIZE_MAX      8   /**< The longest block used by CMAC is that of 3DES. */
+#endif
+
+#if !defined(MBEDTLS_CMAC_ALT)
+
+/**
+ * The CMAC context structure.
+ */
+struct mbedtls_cmac_context_t
+{
+    /** The internal state of the CMAC algorithm.  */
+    unsigned char       state[MBEDTLS_CIPHER_BLKSIZE_MAX];
+
+    /** Unprocessed data - either data that was not block aligned and is still
+     *  pending processing, or the final block. */
+    unsigned char       unprocessed_block[MBEDTLS_CIPHER_BLKSIZE_MAX];
+
+    /** The length of data pending processing. */
+    size_t              unprocessed_len;
+};
+
+#else  /* !MBEDTLS_CMAC_ALT */
+#include "cmac_alt.h"
+#endif /* !MBEDTLS_CMAC_ALT */
+
+/**
+ * \brief               This function starts a new CMAC computation
+ *                      by setting the CMAC key, and preparing to authenticate
+ *                      the input data.
+ *                      It must be called with an initialized cipher context.
+ *
+ *                      Once this function has completed, data can be supplied
+ *                      to the CMAC computation by calling
+ *                      mbedtls_cipher_cmac_update().
+ *
+ *                      To start a CMAC computation using the same key as a previous
+ *                      CMAC computation, use mbedtls_cipher_cmac_finish().
+ *
+ * \note                When the CMAC implementation is supplied by an alternate
+ *                      implementation (through #MBEDTLS_CMAC_ALT), some ciphers
+ *                      may not be supported by that implementation, and thus
+ *                      return an error. Alternate implementations must support
+ *                      AES-128 and AES-256, and may support AES-192 and 3DES.
+ *
+ * \param ctx           The cipher context used for the CMAC operation, initialized
+ *                      as one of the following types: MBEDTLS_CIPHER_AES_128_ECB,
+ *                      MBEDTLS_CIPHER_AES_192_ECB, MBEDTLS_CIPHER_AES_256_ECB,
+ *                      or MBEDTLS_CIPHER_DES_EDE3_ECB.
+ * \param key           The CMAC key.
+ * \param keybits       The length of the CMAC key in bits.
+ *                      Must be supported by the cipher.
+ *
+ * \return              \c 0 on success.
+ * \return              A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_cmac_starts( mbedtls_cipher_context_t *ctx,
+                                const unsigned char *key, size_t keybits );
+
+/**
+ * \brief               This function feeds an input buffer into an ongoing CMAC
+ *                      computation.
+ *
+ *                      The CMAC computation must have previously been started
+ *                      by calling mbedtls_cipher_cmac_starts() or
+ *                      mbedtls_cipher_cmac_reset().
+ *
+ *                      Call this function as many times as needed to input the
+ *                      data to be authenticated.
+ *                      Once all of the required data has been input,
+ *                      call mbedtls_cipher_cmac_finish() to obtain the result
+ *                      of the CMAC operation.
+ *
+ * \param ctx           The cipher context used for the CMAC operation.
+ * \param input         The buffer holding the input data.
+ * \param ilen          The length of the input data.
+ *
+ * \return             \c 0 on success.
+ * \return             #MBEDTLS_ERR_MD_BAD_INPUT_DATA
+ *                     if parameter verification fails.
+ */
+int mbedtls_cipher_cmac_update( mbedtls_cipher_context_t *ctx,
+                                const unsigned char *input, size_t ilen );
+
+/**
+ * \brief               This function finishes an ongoing CMAC operation, and
+ *                      writes the result to the output buffer.
+ *
+ *                      It should be followed either by
+ *                      mbedtls_cipher_cmac_reset(), which starts another CMAC
+ *                      operation with the same key, or mbedtls_cipher_free(),
+ *                      which clears the cipher context.
+ *
+ * \param ctx           The cipher context used for the CMAC operation.
+ * \param output        The output buffer for the CMAC checksum result.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_MD_BAD_INPUT_DATA
+ *                      if parameter verification fails.
+ */
+int mbedtls_cipher_cmac_finish( mbedtls_cipher_context_t *ctx,
+                                unsigned char *output );
+
+/**
+ * \brief               This function starts a new CMAC operation with the same
+ *                      key as the previous one.
+ *
+ *                      It should be called after finishing the previous CMAC
+ *                      operation with mbedtls_cipher_cmac_finish().
+ *                      After calling this function,
+ *                      call mbedtls_cipher_cmac_update() to supply the new
+ *                      CMAC operation with data.
+ *
+ * \param ctx           The cipher context used for the CMAC operation.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_MD_BAD_INPUT_DATA
+ *                      if parameter verification fails.
+ */
+int mbedtls_cipher_cmac_reset( mbedtls_cipher_context_t *ctx );
+
+/**
+ * \brief               This function calculates the full generic CMAC
+ *                      on the input buffer with the provided key.
+ *
+ *                      The function allocates the context, performs the
+ *                      calculation, and frees the context.
+ *
+ *                      The CMAC result is calculated as
+ *                      output = generic CMAC(cmac key, input buffer).
+ *
+ * \note                When the CMAC implementation is supplied by an alternate
+ *                      implementation (through #MBEDTLS_CMAC_ALT), some ciphers
+ *                      may not be supported by that implementation, and thus
+ *                      return an error. Alternate implementations must support
+ *                      AES-128 and AES-256, and may support AES-192 and 3DES.
+ *
+ * \param cipher_info   The cipher information.
+ * \param key           The CMAC key.
+ * \param keylen        The length of the CMAC key in bits.
+ * \param input         The buffer holding the input data.
+ * \param ilen          The length of the input data.
+ * \param output        The buffer for the generic CMAC result.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_MD_BAD_INPUT_DATA
+ *                      if parameter verification fails.
+ */
+int mbedtls_cipher_cmac( const mbedtls_cipher_info_t *cipher_info,
+                         const unsigned char *key, size_t keylen,
+                         const unsigned char *input, size_t ilen,
+                         unsigned char *output );
+
+#if defined(MBEDTLS_AES_C)
+/**
+ * \brief           This function implements the AES-CMAC-PRF-128 pseudorandom
+ *                  function, as defined in
+ *                  <em>RFC-4615: The Advanced Encryption Standard-Cipher-based
+ *                  Message Authentication Code-Pseudo-Random Function-128
+ *                  (AES-CMAC-PRF-128) Algorithm for the Internet Key
+ *                  Exchange Protocol (IKE).</em>
+ *
+ * \param key       The key to use.
+ * \param key_len   The key length in Bytes.
+ * \param input     The buffer holding the input data.
+ * \param in_len    The length of the input data in Bytes.
+ * \param output    The buffer holding the generated 16 Bytes of
+ *                  pseudorandom output.
+ *
+ * \return          \c 0 on success.
+ */
+int mbedtls_aes_cmac_prf_128( const unsigned char *key, size_t key_len,
+                              const unsigned char *input, size_t in_len,
+                              unsigned char output[16] );
+#endif /* MBEDTLS_AES_C */
+
+#if defined(MBEDTLS_SELF_TEST) && ( defined(MBEDTLS_AES_C) || defined(MBEDTLS_DES_C) )
+/**
+ * \brief          The CMAC checkup routine.
+ *
+ * \note           In case the CMAC routines are provided by an alternative
+ *                 implementation (i.e. #MBEDTLS_CMAC_ALT is defined), the
+ *                 checkup routine will succeed even if the implementation does
+ *                 not support the less widely used AES-192 or 3DES primitives.
+ *                 The self-test requires at least AES-128 and AES-256 to be
+ *                 supported by the underlying implementation.
+ *
+ * \return         \c 0 on success.
+ * \return         \c 1 on failure.
+ */
+int mbedtls_cmac_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST && ( MBEDTLS_AES_C || MBEDTLS_DES_C ) */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CMAC_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h
new file mode 100644
index 00000000000..40177512cab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/compat-1.3.h
@@ -0,0 +1,2529 @@
+/**
+ * \file compat-1.3.h
+ *
+ * \brief Compatibility definitions for using mbed TLS with client code written
+ *  for the PolarSSL naming conventions.
+ *
+ * \deprecated Use the new names directly instead
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "Including compat-1.3.h is deprecated"
+#endif
+
+#ifndef MBEDTLS_COMPAT13_H
+#define MBEDTLS_COMPAT13_H
+
+/*
+ * config.h options
+ */
+#if defined MBEDTLS_AESNI_C
+#define POLARSSL_AESNI_C MBEDTLS_AESNI_C
+#endif
+#if defined MBEDTLS_AES_ALT
+#define POLARSSL_AES_ALT MBEDTLS_AES_ALT
+#endif
+#if defined MBEDTLS_AES_C
+#define POLARSSL_AES_C MBEDTLS_AES_C
+#endif
+#if defined MBEDTLS_AES_ROM_TABLES
+#define POLARSSL_AES_ROM_TABLES MBEDTLS_AES_ROM_TABLES
+#endif
+#if defined MBEDTLS_ARC4_ALT
+#define POLARSSL_ARC4_ALT MBEDTLS_ARC4_ALT
+#endif
+#if defined MBEDTLS_ARC4_C
+#define POLARSSL_ARC4_C MBEDTLS_ARC4_C
+#endif
+#if defined MBEDTLS_ASN1_PARSE_C
+#define POLARSSL_ASN1_PARSE_C MBEDTLS_ASN1_PARSE_C
+#endif
+#if defined MBEDTLS_ASN1_WRITE_C
+#define POLARSSL_ASN1_WRITE_C MBEDTLS_ASN1_WRITE_C
+#endif
+#if defined MBEDTLS_BASE64_C
+#define POLARSSL_BASE64_C MBEDTLS_BASE64_C
+#endif
+#if defined MBEDTLS_BIGNUM_C
+#define POLARSSL_BIGNUM_C MBEDTLS_BIGNUM_C
+#endif
+#if defined MBEDTLS_BLOWFISH_ALT
+#define POLARSSL_BLOWFISH_ALT MBEDTLS_BLOWFISH_ALT
+#endif
+#if defined MBEDTLS_BLOWFISH_C
+#define POLARSSL_BLOWFISH_C MBEDTLS_BLOWFISH_C
+#endif
+#if defined MBEDTLS_CAMELLIA_ALT
+#define POLARSSL_CAMELLIA_ALT MBEDTLS_CAMELLIA_ALT
+#endif
+#if defined MBEDTLS_CAMELLIA_C
+#define POLARSSL_CAMELLIA_C MBEDTLS_CAMELLIA_C
+#endif
+#if defined MBEDTLS_CAMELLIA_SMALL_MEMORY
+#define POLARSSL_CAMELLIA_SMALL_MEMORY MBEDTLS_CAMELLIA_SMALL_MEMORY
+#endif
+#if defined MBEDTLS_CCM_C
+#define POLARSSL_CCM_C MBEDTLS_CCM_C
+#endif
+#if defined MBEDTLS_CERTS_C
+#define POLARSSL_CERTS_C MBEDTLS_CERTS_C
+#endif
+#if defined MBEDTLS_CIPHER_C
+#define POLARSSL_CIPHER_C MBEDTLS_CIPHER_C
+#endif
+#if defined MBEDTLS_CIPHER_MODE_CBC
+#define POLARSSL_CIPHER_MODE_CBC MBEDTLS_CIPHER_MODE_CBC
+#endif
+#if defined MBEDTLS_CIPHER_MODE_CFB
+#define POLARSSL_CIPHER_MODE_CFB MBEDTLS_CIPHER_MODE_CFB
+#endif
+#if defined MBEDTLS_CIPHER_MODE_CTR
+#define POLARSSL_CIPHER_MODE_CTR MBEDTLS_CIPHER_MODE_CTR
+#endif
+#if defined MBEDTLS_CIPHER_NULL_CIPHER
+#define POLARSSL_CIPHER_NULL_CIPHER MBEDTLS_CIPHER_NULL_CIPHER
+#endif
+#if defined MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+#define POLARSSL_CIPHER_PADDING_ONE_AND_ZEROS MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+#endif
+#if defined MBEDTLS_CIPHER_PADDING_PKCS7
+#define POLARSSL_CIPHER_PADDING_PKCS7 MBEDTLS_CIPHER_PADDING_PKCS7
+#endif
+#if defined MBEDTLS_CIPHER_PADDING_ZEROS
+#define POLARSSL_CIPHER_PADDING_ZEROS MBEDTLS_CIPHER_PADDING_ZEROS
+#endif
+#if defined MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+#define POLARSSL_CIPHER_PADDING_ZEROS_AND_LEN MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+#endif
+#if defined MBEDTLS_CTR_DRBG_C
+#define POLARSSL_CTR_DRBG_C MBEDTLS_CTR_DRBG_C
+#endif
+#if defined MBEDTLS_DEBUG_C
+#define POLARSSL_DEBUG_C MBEDTLS_DEBUG_C
+#endif
+#if defined MBEDTLS_DEPRECATED_REMOVED
+#define POLARSSL_DEPRECATED_REMOVED MBEDTLS_DEPRECATED_REMOVED
+#endif
+#if defined MBEDTLS_DEPRECATED_WARNING
+#define POLARSSL_DEPRECATED_WARNING MBEDTLS_DEPRECATED_WARNING
+#endif
+#if defined MBEDTLS_DES_ALT
+#define POLARSSL_DES_ALT MBEDTLS_DES_ALT
+#endif
+#if defined MBEDTLS_DES_C
+#define POLARSSL_DES_C MBEDTLS_DES_C
+#endif
+#if defined MBEDTLS_DHM_C
+#define POLARSSL_DHM_C MBEDTLS_DHM_C
+#endif
+#if defined MBEDTLS_ECDH_C
+#define POLARSSL_ECDH_C MBEDTLS_ECDH_C
+#endif
+#if defined MBEDTLS_ECDSA_C
+#define POLARSSL_ECDSA_C MBEDTLS_ECDSA_C
+#endif
+#if defined MBEDTLS_ECDSA_DETERMINISTIC
+#define POLARSSL_ECDSA_DETERMINISTIC MBEDTLS_ECDSA_DETERMINISTIC
+#endif
+#if defined MBEDTLS_ECP_C
+#define POLARSSL_ECP_C MBEDTLS_ECP_C
+#endif
+#if defined MBEDTLS_ECP_DP_BP256R1_ENABLED
+#define POLARSSL_ECP_DP_BP256R1_ENABLED MBEDTLS_ECP_DP_BP256R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_BP384R1_ENABLED
+#define POLARSSL_ECP_DP_BP384R1_ENABLED MBEDTLS_ECP_DP_BP384R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define POLARSSL_ECP_DP_BP512R1_ENABLED MBEDTLS_ECP_DP_BP512R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#define POLARSSL_ECP_DP_M255_ENABLED MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define POLARSSL_ECP_DP_SECP192K1_ENABLED MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define POLARSSL_ECP_DP_SECP192R1_ENABLED MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define POLARSSL_ECP_DP_SECP224K1_ENABLED MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define POLARSSL_ECP_DP_SECP224R1_ENABLED MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#define POLARSSL_ECP_DP_SECP256K1_ENABLED MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define POLARSSL_ECP_DP_SECP256R1_ENABLED MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define POLARSSL_ECP_DP_SECP384R1_ENABLED MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define POLARSSL_ECP_DP_SECP521R1_ENABLED MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_FIXED_POINT_OPTIM
+#define POLARSSL_ECP_FIXED_POINT_OPTIM MBEDTLS_ECP_FIXED_POINT_OPTIM
+#endif
+#if defined MBEDTLS_ECP_MAX_BITS
+#define POLARSSL_ECP_MAX_BITS MBEDTLS_ECP_MAX_BITS
+#endif
+#if defined MBEDTLS_ECP_NIST_OPTIM
+#define POLARSSL_ECP_NIST_OPTIM MBEDTLS_ECP_NIST_OPTIM
+#endif
+#if defined MBEDTLS_ECP_WINDOW_SIZE
+#define POLARSSL_ECP_WINDOW_SIZE MBEDTLS_ECP_WINDOW_SIZE
+#endif
+#if defined MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+#define POLARSSL_ENABLE_WEAK_CIPHERSUITES MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+#endif
+#if defined MBEDTLS_ENTROPY_C
+#define POLARSSL_ENTROPY_C MBEDTLS_ENTROPY_C
+#endif
+#if defined MBEDTLS_ENTROPY_FORCE_SHA256
+#define POLARSSL_ENTROPY_FORCE_SHA256 MBEDTLS_ENTROPY_FORCE_SHA256
+#endif
+#if defined MBEDTLS_ERROR_C
+#define POLARSSL_ERROR_C MBEDTLS_ERROR_C
+#endif
+#if defined MBEDTLS_ERROR_STRERROR_DUMMY
+#define POLARSSL_ERROR_STRERROR_DUMMY MBEDTLS_ERROR_STRERROR_DUMMY
+#endif
+#if defined MBEDTLS_FS_IO
+#define POLARSSL_FS_IO MBEDTLS_FS_IO
+#endif
+#if defined MBEDTLS_GCM_C
+#define POLARSSL_GCM_C MBEDTLS_GCM_C
+#endif
+#if defined MBEDTLS_GENPRIME
+#define POLARSSL_GENPRIME MBEDTLS_GENPRIME
+#endif
+#if defined MBEDTLS_HAVEGE_C
+#define POLARSSL_HAVEGE_C MBEDTLS_HAVEGE_C
+#endif
+#if defined MBEDTLS_HAVE_ASM
+#define POLARSSL_HAVE_ASM MBEDTLS_HAVE_ASM
+#endif
+#if defined MBEDTLS_HAVE_SSE2
+#define POLARSSL_HAVE_SSE2 MBEDTLS_HAVE_SSE2
+#endif
+#if defined MBEDTLS_HAVE_TIME
+#define POLARSSL_HAVE_TIME MBEDTLS_HAVE_TIME
+#endif
+#if defined MBEDTLS_HMAC_DRBG_C
+#define POLARSSL_HMAC_DRBG_C MBEDTLS_HMAC_DRBG_C
+#endif
+#if defined MBEDTLS_HMAC_DRBG_MAX_INPUT
+#define POLARSSL_HMAC_DRBG_MAX_INPUT MBEDTLS_HMAC_DRBG_MAX_INPUT
+#endif
+#if defined MBEDTLS_HMAC_DRBG_MAX_REQUEST
+#define POLARSSL_HMAC_DRBG_MAX_REQUEST MBEDTLS_HMAC_DRBG_MAX_REQUEST
+#endif
+#if defined MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT
+#define POLARSSL_HMAC_DRBG_MAX_SEED_INPUT MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT
+#endif
+#if defined MBEDTLS_HMAC_DRBG_RESEED_INTERVAL
+#define POLARSSL_HMAC_DRBG_RESEED_INTERVAL MBEDTLS_HMAC_DRBG_RESEED_INTERVAL
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE_DHE_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_DHE_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE_ECDHE_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_ECDHE_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_ECDH_ECDSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_ECDH_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE_RSA_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+#endif
+#if defined MBEDTLS_MD2_ALT
+#define POLARSSL_MD2_ALT MBEDTLS_MD2_ALT
+#endif
+#if defined MBEDTLS_MD2_C
+#define POLARSSL_MD2_C MBEDTLS_MD2_C
+#endif
+#if defined MBEDTLS_MD2_PROCESS_ALT
+#define POLARSSL_MD2_PROCESS_ALT MBEDTLS_MD2_PROCESS_ALT
+#endif
+#if defined MBEDTLS_MD4_ALT
+#define POLARSSL_MD4_ALT MBEDTLS_MD4_ALT
+#endif
+#if defined MBEDTLS_MD4_C
+#define POLARSSL_MD4_C MBEDTLS_MD4_C
+#endif
+#if defined MBEDTLS_MD4_PROCESS_ALT
+#define POLARSSL_MD4_PROCESS_ALT MBEDTLS_MD4_PROCESS_ALT
+#endif
+#if defined MBEDTLS_MD5_ALT
+#define POLARSSL_MD5_ALT MBEDTLS_MD5_ALT
+#endif
+#if defined MBEDTLS_MD5_C
+#define POLARSSL_MD5_C MBEDTLS_MD5_C
+#endif
+#if defined MBEDTLS_MD5_PROCESS_ALT
+#define POLARSSL_MD5_PROCESS_ALT MBEDTLS_MD5_PROCESS_ALT
+#endif
+#if defined MBEDTLS_MD_C
+#define POLARSSL_MD_C MBEDTLS_MD_C
+#endif
+#if defined MBEDTLS_MEMORY_ALIGN_MULTIPLE
+#define POLARSSL_MEMORY_ALIGN_MULTIPLE MBEDTLS_MEMORY_ALIGN_MULTIPLE
+#endif
+#if defined MBEDTLS_MEMORY_BACKTRACE
+#define POLARSSL_MEMORY_BACKTRACE MBEDTLS_MEMORY_BACKTRACE
+#endif
+#if defined MBEDTLS_MEMORY_BUFFER_ALLOC_C
+#define POLARSSL_MEMORY_BUFFER_ALLOC_C MBEDTLS_MEMORY_BUFFER_ALLOC_C
+#endif
+#if defined MBEDTLS_MEMORY_DEBUG
+#define POLARSSL_MEMORY_DEBUG MBEDTLS_MEMORY_DEBUG
+#endif
+#if defined MBEDTLS_MPI_MAX_SIZE
+#define POLARSSL_MPI_MAX_SIZE MBEDTLS_MPI_MAX_SIZE
+#endif
+#if defined MBEDTLS_MPI_WINDOW_SIZE
+#define POLARSSL_MPI_WINDOW_SIZE MBEDTLS_MPI_WINDOW_SIZE
+#endif
+#if defined MBEDTLS_NET_C
+#define POLARSSL_NET_C MBEDTLS_NET_C
+#endif
+#if defined MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+#define POLARSSL_NO_DEFAULT_ENTROPY_SOURCES MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+#endif
+#if defined MBEDTLS_NO_PLATFORM_ENTROPY
+#define POLARSSL_NO_PLATFORM_ENTROPY MBEDTLS_NO_PLATFORM_ENTROPY
+#endif
+#if defined MBEDTLS_OID_C
+#define POLARSSL_OID_C MBEDTLS_OID_C
+#endif
+#if defined MBEDTLS_PADLOCK_C
+#define POLARSSL_PADLOCK_C MBEDTLS_PADLOCK_C
+#endif
+#if defined MBEDTLS_PEM_PARSE_C
+#define POLARSSL_PEM_PARSE_C MBEDTLS_PEM_PARSE_C
+#endif
+#if defined MBEDTLS_PEM_WRITE_C
+#define POLARSSL_PEM_WRITE_C MBEDTLS_PEM_WRITE_C
+#endif
+#if defined MBEDTLS_PKCS11_C
+#define POLARSSL_PKCS11_C MBEDTLS_PKCS11_C
+#endif
+#if defined MBEDTLS_PKCS12_C
+#define POLARSSL_PKCS12_C MBEDTLS_PKCS12_C
+#endif
+#if defined MBEDTLS_PKCS1_V15
+#define POLARSSL_PKCS1_V15 MBEDTLS_PKCS1_V15
+#endif
+#if defined MBEDTLS_PKCS1_V21
+#define POLARSSL_PKCS1_V21 MBEDTLS_PKCS1_V21
+#endif
+#if defined MBEDTLS_PKCS5_C
+#define POLARSSL_PKCS5_C MBEDTLS_PKCS5_C
+#endif
+#if defined MBEDTLS_PK_C
+#define POLARSSL_PK_C MBEDTLS_PK_C
+#endif
+#if defined MBEDTLS_PK_PARSE_C
+#define POLARSSL_PK_PARSE_C MBEDTLS_PK_PARSE_C
+#endif
+#if defined MBEDTLS_PK_PARSE_EC_EXTENDED
+#define POLARSSL_PK_PARSE_EC_EXTENDED MBEDTLS_PK_PARSE_EC_EXTENDED
+#endif
+#if defined MBEDTLS_PK_RSA_ALT_SUPPORT
+#define POLARSSL_PK_RSA_ALT_SUPPORT MBEDTLS_PK_RSA_ALT_SUPPORT
+#endif
+#if defined MBEDTLS_PK_WRITE_C
+#define POLARSSL_PK_WRITE_C MBEDTLS_PK_WRITE_C
+#endif
+#if defined MBEDTLS_PLATFORM_C
+#define POLARSSL_PLATFORM_C MBEDTLS_PLATFORM_C
+#endif
+#if defined MBEDTLS_PLATFORM_EXIT_ALT
+#define POLARSSL_PLATFORM_EXIT_ALT MBEDTLS_PLATFORM_EXIT_ALT
+#endif
+#if defined MBEDTLS_PLATFORM_EXIT_MACRO
+#define POLARSSL_PLATFORM_EXIT_MACRO MBEDTLS_PLATFORM_EXIT_MACRO
+#endif
+#if defined MBEDTLS_PLATFORM_FPRINTF_ALT
+#define POLARSSL_PLATFORM_FPRINTF_ALT MBEDTLS_PLATFORM_FPRINTF_ALT
+#endif
+#if defined MBEDTLS_PLATFORM_FPRINTF_MACRO
+#define POLARSSL_PLATFORM_FPRINTF_MACRO MBEDTLS_PLATFORM_FPRINTF_MACRO
+#endif
+#if defined MBEDTLS_PLATFORM_FREE_MACRO
+#define POLARSSL_PLATFORM_FREE_MACRO MBEDTLS_PLATFORM_FREE_MACRO
+#endif
+#if defined MBEDTLS_PLATFORM_MEMORY
+#define POLARSSL_PLATFORM_MEMORY MBEDTLS_PLATFORM_MEMORY
+#endif
+#if defined MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+#define POLARSSL_PLATFORM_NO_STD_FUNCTIONS MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+#endif
+#if defined MBEDTLS_PLATFORM_PRINTF_ALT
+#define POLARSSL_PLATFORM_PRINTF_ALT MBEDTLS_PLATFORM_PRINTF_ALT
+#endif
+#if defined MBEDTLS_PLATFORM_PRINTF_MACRO
+#define POLARSSL_PLATFORM_PRINTF_MACRO MBEDTLS_PLATFORM_PRINTF_MACRO
+#endif
+#if defined MBEDTLS_PLATFORM_SNPRINTF_ALT
+#define POLARSSL_PLATFORM_SNPRINTF_ALT MBEDTLS_PLATFORM_SNPRINTF_ALT
+#endif
+#if defined MBEDTLS_PLATFORM_SNPRINTF_MACRO
+#define POLARSSL_PLATFORM_SNPRINTF_MACRO MBEDTLS_PLATFORM_SNPRINTF_MACRO
+#endif
+#if defined MBEDTLS_PLATFORM_STD_EXIT
+#define POLARSSL_PLATFORM_STD_EXIT MBEDTLS_PLATFORM_STD_EXIT
+#endif
+#if defined MBEDTLS_PLATFORM_STD_FPRINTF
+#define POLARSSL_PLATFORM_STD_FPRINTF MBEDTLS_PLATFORM_STD_FPRINTF
+#endif
+#if defined MBEDTLS_PLATFORM_STD_FREE
+#define POLARSSL_PLATFORM_STD_FREE MBEDTLS_PLATFORM_STD_FREE
+#endif
+#if defined MBEDTLS_PLATFORM_STD_MEM_HDR
+#define POLARSSL_PLATFORM_STD_MEM_HDR MBEDTLS_PLATFORM_STD_MEM_HDR
+#endif
+#if defined MBEDTLS_PLATFORM_STD_PRINTF
+#define POLARSSL_PLATFORM_STD_PRINTF MBEDTLS_PLATFORM_STD_PRINTF
+#endif
+#if defined MBEDTLS_PLATFORM_STD_SNPRINTF
+#define POLARSSL_PLATFORM_STD_SNPRINTF MBEDTLS_PLATFORM_STD_SNPRINTF
+#endif
+#if defined MBEDTLS_PSK_MAX_LEN
+#define POLARSSL_PSK_MAX_LEN MBEDTLS_PSK_MAX_LEN
+#endif
+#if defined MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+#define POLARSSL_REMOVE_ARC4_CIPHERSUITES MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+#endif
+#if defined MBEDTLS_RIPEMD160_ALT
+#define POLARSSL_RIPEMD160_ALT MBEDTLS_RIPEMD160_ALT
+#endif
+#if defined MBEDTLS_RIPEMD160_C
+#define POLARSSL_RIPEMD160_C MBEDTLS_RIPEMD160_C
+#endif
+#if defined MBEDTLS_RIPEMD160_PROCESS_ALT
+#define POLARSSL_RIPEMD160_PROCESS_ALT MBEDTLS_RIPEMD160_PROCESS_ALT
+#endif
+#if defined MBEDTLS_RSA_C
+#define POLARSSL_RSA_C MBEDTLS_RSA_C
+#endif
+#if defined MBEDTLS_RSA_NO_CRT
+#define POLARSSL_RSA_NO_CRT MBEDTLS_RSA_NO_CRT
+#endif
+#if defined MBEDTLS_SELF_TEST
+#define POLARSSL_SELF_TEST MBEDTLS_SELF_TEST
+#endif
+#if defined MBEDTLS_SHA1_ALT
+#define POLARSSL_SHA1_ALT MBEDTLS_SHA1_ALT
+#endif
+#if defined MBEDTLS_SHA1_C
+#define POLARSSL_SHA1_C MBEDTLS_SHA1_C
+#endif
+#if defined MBEDTLS_SHA1_PROCESS_ALT
+#define POLARSSL_SHA1_PROCESS_ALT MBEDTLS_SHA1_PROCESS_ALT
+#endif
+#if defined MBEDTLS_SHA256_ALT
+#define POLARSSL_SHA256_ALT MBEDTLS_SHA256_ALT
+#endif
+#if defined MBEDTLS_SHA256_C
+#define POLARSSL_SHA256_C MBEDTLS_SHA256_C
+#endif
+#if defined MBEDTLS_SHA256_PROCESS_ALT
+#define POLARSSL_SHA256_PROCESS_ALT MBEDTLS_SHA256_PROCESS_ALT
+#endif
+#if defined MBEDTLS_SHA512_ALT
+#define POLARSSL_SHA512_ALT MBEDTLS_SHA512_ALT
+#endif
+#if defined MBEDTLS_SHA512_C
+#define POLARSSL_SHA512_C MBEDTLS_SHA512_C
+#endif
+#if defined MBEDTLS_SHA512_PROCESS_ALT
+#define POLARSSL_SHA512_PROCESS_ALT MBEDTLS_SHA512_PROCESS_ALT
+#endif
+#if defined MBEDTLS_SSL_ALL_ALERT_MESSAGES
+#define POLARSSL_SSL_ALL_ALERT_MESSAGES MBEDTLS_SSL_ALL_ALERT_MESSAGES
+#endif
+#if defined MBEDTLS_SSL_ALPN
+#define POLARSSL_SSL_ALPN MBEDTLS_SSL_ALPN
+#endif
+#if defined MBEDTLS_SSL_CACHE_C
+#define POLARSSL_SSL_CACHE_C MBEDTLS_SSL_CACHE_C
+#endif
+#if defined MBEDTLS_SSL_CBC_RECORD_SPLITTING
+#define POLARSSL_SSL_CBC_RECORD_SPLITTING MBEDTLS_SSL_CBC_RECORD_SPLITTING
+#endif
+#if defined MBEDTLS_SSL_CLI_C
+#define POLARSSL_SSL_CLI_C MBEDTLS_SSL_CLI_C
+#endif
+#if defined MBEDTLS_SSL_COOKIE_C
+#define POLARSSL_SSL_COOKIE_C MBEDTLS_SSL_COOKIE_C
+#endif
+#if defined MBEDTLS_SSL_COOKIE_TIMEOUT
+#define POLARSSL_SSL_COOKIE_TIMEOUT MBEDTLS_SSL_COOKIE_TIMEOUT
+#endif
+#if defined MBEDTLS_SSL_DEBUG_ALL
+#define POLARSSL_SSL_DEBUG_ALL MBEDTLS_SSL_DEBUG_ALL
+#endif
+#if defined MBEDTLS_SSL_DTLS_ANTI_REPLAY
+#define POLARSSL_SSL_DTLS_ANTI_REPLAY MBEDTLS_SSL_DTLS_ANTI_REPLAY
+#endif
+#if defined MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+#define POLARSSL_SSL_DTLS_BADMAC_LIMIT MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+#endif
+#if defined MBEDTLS_SSL_DTLS_HELLO_VERIFY
+#define POLARSSL_SSL_DTLS_HELLO_VERIFY MBEDTLS_SSL_DTLS_HELLO_VERIFY
+#endif
+#if defined MBEDTLS_SSL_ENCRYPT_THEN_MAC
+#define POLARSSL_SSL_ENCRYPT_THEN_MAC MBEDTLS_SSL_ENCRYPT_THEN_MAC
+#endif
+#if defined MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+#define POLARSSL_SSL_EXTENDED_MASTER_SECRET MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+#endif
+#if defined MBEDTLS_SSL_FALLBACK_SCSV
+#define POLARSSL_SSL_FALLBACK_SCSV MBEDTLS_SSL_FALLBACK_SCSV
+#endif
+#if defined MBEDTLS_SSL_HW_RECORD_ACCEL
+#define POLARSSL_SSL_HW_RECORD_ACCEL MBEDTLS_SSL_HW_RECORD_ACCEL
+#endif
+#if defined MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+#define POLARSSL_SSL_MAX_FRAGMENT_LENGTH MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+#endif
+#if defined MBEDTLS_SSL_PROTO_DTLS
+#define POLARSSL_SSL_PROTO_DTLS MBEDTLS_SSL_PROTO_DTLS
+#endif
+#if defined MBEDTLS_SSL_PROTO_SSL3
+#define POLARSSL_SSL_PROTO_SSL3 MBEDTLS_SSL_PROTO_SSL3
+#endif
+#if defined MBEDTLS_SSL_PROTO_TLS1
+#define POLARSSL_SSL_PROTO_TLS1 MBEDTLS_SSL_PROTO_TLS1
+#endif
+#if defined MBEDTLS_SSL_PROTO_TLS1_1
+#define POLARSSL_SSL_PROTO_TLS1_1 MBEDTLS_SSL_PROTO_TLS1_1
+#endif
+#if defined MBEDTLS_SSL_PROTO_TLS1_2
+#define POLARSSL_SSL_PROTO_TLS1_2 MBEDTLS_SSL_PROTO_TLS1_2
+#endif
+#if defined MBEDTLS_SSL_RENEGOTIATION
+#define POLARSSL_SSL_RENEGOTIATION MBEDTLS_SSL_RENEGOTIATION
+#endif
+#if defined MBEDTLS_SSL_SERVER_NAME_INDICATION
+#define POLARSSL_SSL_SERVER_NAME_INDICATION MBEDTLS_SSL_SERVER_NAME_INDICATION
+#endif
+#if defined MBEDTLS_SSL_SESSION_TICKETS
+#define POLARSSL_SSL_SESSION_TICKETS MBEDTLS_SSL_SESSION_TICKETS
+#endif
+#if defined MBEDTLS_SSL_SRV_C
+#define POLARSSL_SSL_SRV_C MBEDTLS_SSL_SRV_C
+#endif
+#if defined MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+#define POLARSSL_SSL_SRV_RESPECT_CLIENT_PREFERENCE MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+#endif
+#if defined MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+#define POLARSSL_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+#endif
+#if defined MBEDTLS_SSL_TLS_C
+#define POLARSSL_SSL_TLS_C MBEDTLS_SSL_TLS_C
+#endif
+#if defined MBEDTLS_SSL_TRUNCATED_HMAC
+#define POLARSSL_SSL_TRUNCATED_HMAC MBEDTLS_SSL_TRUNCATED_HMAC
+#endif
+#if defined MBEDTLS_THREADING_ALT
+#define POLARSSL_THREADING_ALT MBEDTLS_THREADING_ALT
+#endif
+#if defined MBEDTLS_THREADING_C
+#define POLARSSL_THREADING_C MBEDTLS_THREADING_C
+#endif
+#if defined MBEDTLS_THREADING_PTHREAD
+#define POLARSSL_THREADING_PTHREAD MBEDTLS_THREADING_PTHREAD
+#endif
+#if defined MBEDTLS_TIMING_ALT
+#define POLARSSL_TIMING_ALT MBEDTLS_TIMING_ALT
+#endif
+#if defined MBEDTLS_TIMING_C
+#define POLARSSL_TIMING_C MBEDTLS_TIMING_C
+#endif
+#if defined MBEDTLS_VERSION_C
+#define POLARSSL_VERSION_C MBEDTLS_VERSION_C
+#endif
+#if defined MBEDTLS_VERSION_FEATURES
+#define POLARSSL_VERSION_FEATURES MBEDTLS_VERSION_FEATURES
+#endif
+#if defined MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+#define POLARSSL_X509_ALLOW_EXTENSIONS_NON_V3 MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+#endif
+#if defined MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+#define POLARSSL_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+#endif
+#if defined MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#define POLARSSL_X509_CHECK_EXTENDED_KEY_USAGE MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#endif
+#if defined MBEDTLS_X509_CHECK_KEY_USAGE
+#define POLARSSL_X509_CHECK_KEY_USAGE MBEDTLS_X509_CHECK_KEY_USAGE
+#endif
+#if defined MBEDTLS_X509_CREATE_C
+#define POLARSSL_X509_CREATE_C MBEDTLS_X509_CREATE_C
+#endif
+#if defined MBEDTLS_X509_CRL_PARSE_C
+#define POLARSSL_X509_CRL_PARSE_C MBEDTLS_X509_CRL_PARSE_C
+#endif
+#if defined MBEDTLS_X509_CRT_PARSE_C
+#define POLARSSL_X509_CRT_PARSE_C MBEDTLS_X509_CRT_PARSE_C
+#endif
+#if defined MBEDTLS_X509_CRT_WRITE_C
+#define POLARSSL_X509_CRT_WRITE_C MBEDTLS_X509_CRT_WRITE_C
+#endif
+#if defined MBEDTLS_X509_CSR_PARSE_C
+#define POLARSSL_X509_CSR_PARSE_C MBEDTLS_X509_CSR_PARSE_C
+#endif
+#if defined MBEDTLS_X509_CSR_WRITE_C
+#define POLARSSL_X509_CSR_WRITE_C MBEDTLS_X509_CSR_WRITE_C
+#endif
+#if defined MBEDTLS_X509_MAX_INTERMEDIATE_CA
+#define POLARSSL_X509_MAX_INTERMEDIATE_CA MBEDTLS_X509_MAX_INTERMEDIATE_CA
+#endif
+#if defined MBEDTLS_X509_RSASSA_PSS_SUPPORT
+#define POLARSSL_X509_RSASSA_PSS_SUPPORT MBEDTLS_X509_RSASSA_PSS_SUPPORT
+#endif
+#if defined MBEDTLS_X509_USE_C
+#define POLARSSL_X509_USE_C MBEDTLS_X509_USE_C
+#endif
+#if defined MBEDTLS_XTEA_ALT
+#define POLARSSL_XTEA_ALT MBEDTLS_XTEA_ALT
+#endif
+#if defined MBEDTLS_XTEA_C
+#define POLARSSL_XTEA_C MBEDTLS_XTEA_C
+#endif
+#if defined MBEDTLS_ZLIB_SUPPORT
+#define POLARSSL_ZLIB_SUPPORT MBEDTLS_ZLIB_SUPPORT
+#endif
+
+/*
+ * Misc names (macros, types, functions, enum constants...)
+ */
+#define AES_DECRYPT MBEDTLS_AES_DECRYPT
+#define AES_ENCRYPT MBEDTLS_AES_ENCRYPT
+#define ASN1_BIT_STRING MBEDTLS_ASN1_BIT_STRING
+#define ASN1_BMP_STRING MBEDTLS_ASN1_BMP_STRING
+#define ASN1_BOOLEAN MBEDTLS_ASN1_BOOLEAN
+#define ASN1_CHK_ADD MBEDTLS_ASN1_CHK_ADD
+#define ASN1_CONSTRUCTED MBEDTLS_ASN1_CONSTRUCTED
+#define ASN1_CONTEXT_SPECIFIC MBEDTLS_ASN1_CONTEXT_SPECIFIC
+#define ASN1_GENERALIZED_TIME MBEDTLS_ASN1_GENERALIZED_TIME
+#define ASN1_IA5_STRING MBEDTLS_ASN1_IA5_STRING
+#define ASN1_INTEGER MBEDTLS_ASN1_INTEGER
+#define ASN1_NULL MBEDTLS_ASN1_NULL
+#define ASN1_OCTET_STRING MBEDTLS_ASN1_OCTET_STRING
+#define ASN1_OID MBEDTLS_ASN1_OID
+#define ASN1_PRIMITIVE MBEDTLS_ASN1_PRIMITIVE
+#define ASN1_PRINTABLE_STRING MBEDTLS_ASN1_PRINTABLE_STRING
+#define ASN1_SEQUENCE MBEDTLS_ASN1_SEQUENCE
+#define ASN1_SET MBEDTLS_ASN1_SET
+#define ASN1_T61_STRING MBEDTLS_ASN1_T61_STRING
+#define ASN1_UNIVERSAL_STRING MBEDTLS_ASN1_UNIVERSAL_STRING
+#define ASN1_UTC_TIME MBEDTLS_ASN1_UTC_TIME
+#define ASN1_UTF8_STRING MBEDTLS_ASN1_UTF8_STRING
+#define BADCERT_CN_MISMATCH MBEDTLS_X509_BADCERT_CN_MISMATCH
+#define BADCERT_EXPIRED MBEDTLS_X509_BADCERT_EXPIRED
+#define BADCERT_FUTURE MBEDTLS_X509_BADCERT_FUTURE
+#define BADCERT_MISSING MBEDTLS_X509_BADCERT_MISSING
+#define BADCERT_NOT_TRUSTED MBEDTLS_X509_BADCERT_NOT_TRUSTED
+#define BADCERT_OTHER MBEDTLS_X509_BADCERT_OTHER
+#define BADCERT_REVOKED MBEDTLS_X509_BADCERT_REVOKED
+#define BADCERT_SKIP_VERIFY MBEDTLS_X509_BADCERT_SKIP_VERIFY
+#define BADCRL_EXPIRED MBEDTLS_X509_BADCRL_EXPIRED
+#define BADCRL_FUTURE MBEDTLS_X509_BADCRL_FUTURE
+#define BADCRL_NOT_TRUSTED MBEDTLS_X509_BADCRL_NOT_TRUSTED
+#define BLOWFISH_BLOCKSIZE MBEDTLS_BLOWFISH_BLOCKSIZE
+#define BLOWFISH_DECRYPT MBEDTLS_BLOWFISH_DECRYPT
+#define BLOWFISH_ENCRYPT MBEDTLS_BLOWFISH_ENCRYPT
+#define BLOWFISH_MAX_KEY MBEDTLS_BLOWFISH_MAX_KEY_BITS
+#define BLOWFISH_MIN_KEY MBEDTLS_BLOWFISH_MIN_KEY_BITS
+#define BLOWFISH_ROUNDS MBEDTLS_BLOWFISH_ROUNDS
+#define CAMELLIA_DECRYPT MBEDTLS_CAMELLIA_DECRYPT
+#define CAMELLIA_ENCRYPT MBEDTLS_CAMELLIA_ENCRYPT
+#define COLLECT_SIZE MBEDTLS_HAVEGE_COLLECT_SIZE
+#define CTR_DRBG_BLOCKSIZE MBEDTLS_CTR_DRBG_BLOCKSIZE
+#define CTR_DRBG_ENTROPY_LEN MBEDTLS_CTR_DRBG_ENTROPY_LEN
+#define CTR_DRBG_KEYBITS MBEDTLS_CTR_DRBG_KEYBITS
+#define CTR_DRBG_KEYSIZE MBEDTLS_CTR_DRBG_KEYSIZE
+#define CTR_DRBG_MAX_INPUT MBEDTLS_CTR_DRBG_MAX_INPUT
+#define CTR_DRBG_MAX_REQUEST MBEDTLS_CTR_DRBG_MAX_REQUEST
+#define CTR_DRBG_MAX_SEED_INPUT MBEDTLS_CTR_DRBG_MAX_SEED_INPUT
+#define CTR_DRBG_PR_OFF MBEDTLS_CTR_DRBG_PR_OFF
+#define CTR_DRBG_PR_ON MBEDTLS_CTR_DRBG_PR_ON
+#define CTR_DRBG_RESEED_INTERVAL MBEDTLS_CTR_DRBG_RESEED_INTERVAL
+#define CTR_DRBG_SEEDLEN MBEDTLS_CTR_DRBG_SEEDLEN
+#define DEPRECATED MBEDTLS_DEPRECATED
+#define DES_DECRYPT MBEDTLS_DES_DECRYPT
+#define DES_ENCRYPT MBEDTLS_DES_ENCRYPT
+#define DES_KEY_SIZE MBEDTLS_DES_KEY_SIZE
+#define ENTROPY_BLOCK_SIZE MBEDTLS_ENTROPY_BLOCK_SIZE
+#define ENTROPY_MAX_GATHER MBEDTLS_ENTROPY_MAX_GATHER
+#define ENTROPY_MAX_SEED_SIZE MBEDTLS_ENTROPY_MAX_SEED_SIZE
+#define ENTROPY_MAX_SOURCES MBEDTLS_ENTROPY_MAX_SOURCES
+#define ENTROPY_MIN_HARDCLOCK MBEDTLS_ENTROPY_MIN_HARDCLOCK
+#define ENTROPY_MIN_HAVEGE MBEDTLS_ENTROPY_MIN_HAVEGE
+#define ENTROPY_MIN_PLATFORM MBEDTLS_ENTROPY_MIN_PLATFORM
+#define ENTROPY_SOURCE_MANUAL MBEDTLS_ENTROPY_SOURCE_MANUAL
+#define EXT_AUTHORITY_KEY_IDENTIFIER MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER
+#define EXT_BASIC_CONSTRAINTS MBEDTLS_X509_EXT_BASIC_CONSTRAINTS
+#define EXT_CERTIFICATE_POLICIES MBEDTLS_X509_EXT_CERTIFICATE_POLICIES
+#define EXT_CRL_DISTRIBUTION_POINTS MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS
+#define EXT_EXTENDED_KEY_USAGE MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE
+#define EXT_FRESHEST_CRL MBEDTLS_X509_EXT_FRESHEST_CRL
+#define EXT_INIHIBIT_ANYPOLICY MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY
+#define EXT_ISSUER_ALT_NAME MBEDTLS_X509_EXT_ISSUER_ALT_NAME
+#define EXT_KEY_USAGE MBEDTLS_X509_EXT_KEY_USAGE
+#define EXT_NAME_CONSTRAINTS MBEDTLS_X509_EXT_NAME_CONSTRAINTS
+#define EXT_NS_CERT_TYPE MBEDTLS_X509_EXT_NS_CERT_TYPE
+#define EXT_POLICY_CONSTRAINTS MBEDTLS_X509_EXT_POLICY_CONSTRAINTS
+#define EXT_POLICY_MAPPINGS MBEDTLS_X509_EXT_POLICY_MAPPINGS
+#define EXT_SUBJECT_ALT_NAME MBEDTLS_X509_EXT_SUBJECT_ALT_NAME
+#define EXT_SUBJECT_DIRECTORY_ATTRS MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS
+#define EXT_SUBJECT_KEY_IDENTIFIER MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER
+#define GCM_DECRYPT MBEDTLS_GCM_DECRYPT
+#define GCM_ENCRYPT MBEDTLS_GCM_ENCRYPT
+#define KU_CRL_SIGN MBEDTLS_X509_KU_CRL_SIGN
+#define KU_DATA_ENCIPHERMENT MBEDTLS_X509_KU_DATA_ENCIPHERMENT
+#define KU_DIGITAL_SIGNATURE MBEDTLS_X509_KU_DIGITAL_SIGNATURE
+#define KU_KEY_AGREEMENT MBEDTLS_X509_KU_KEY_AGREEMENT
+#define KU_KEY_CERT_SIGN MBEDTLS_X509_KU_KEY_CERT_SIGN
+#define KU_KEY_ENCIPHERMENT MBEDTLS_X509_KU_KEY_ENCIPHERMENT
+#define KU_NON_REPUDIATION MBEDTLS_X509_KU_NON_REPUDIATION
+#define LN_2_DIV_LN_10_SCALE100 MBEDTLS_LN_2_DIV_LN_10_SCALE100
+#define MEMORY_VERIFY_ALLOC MBEDTLS_MEMORY_VERIFY_ALLOC
+#define MEMORY_VERIFY_ALWAYS MBEDTLS_MEMORY_VERIFY_ALWAYS
+#define MEMORY_VERIFY_FREE MBEDTLS_MEMORY_VERIFY_FREE
+#define MEMORY_VERIFY_NONE MBEDTLS_MEMORY_VERIFY_NONE
+#define MPI_CHK MBEDTLS_MPI_CHK
+#define NET_PROTO_TCP MBEDTLS_NET_PROTO_TCP
+#define NET_PROTO_UDP MBEDTLS_NET_PROTO_UDP
+#define NS_CERT_TYPE_EMAIL MBEDTLS_X509_NS_CERT_TYPE_EMAIL
+#define NS_CERT_TYPE_EMAIL_CA MBEDTLS_X509_NS_CERT_TYPE_EMAIL_CA
+#define NS_CERT_TYPE_OBJECT_SIGNING MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING
+#define NS_CERT_TYPE_OBJECT_SIGNING_CA MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING_CA
+#define NS_CERT_TYPE_RESERVED MBEDTLS_X509_NS_CERT_TYPE_RESERVED
+#define NS_CERT_TYPE_SSL_CA MBEDTLS_X509_NS_CERT_TYPE_SSL_CA
+#define NS_CERT_TYPE_SSL_CLIENT MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT
+#define NS_CERT_TYPE_SSL_SERVER MBEDTLS_X509_NS_CERT_TYPE_SSL_SERVER
+#define OID_ANSI_X9_62 MBEDTLS_OID_ANSI_X9_62
+#define OID_ANSI_X9_62_FIELD_TYPE MBEDTLS_OID_ANSI_X9_62_FIELD_TYPE
+#define OID_ANSI_X9_62_PRIME_FIELD MBEDTLS_OID_ANSI_X9_62_PRIME_FIELD
+#define OID_ANSI_X9_62_SIG MBEDTLS_OID_ANSI_X9_62_SIG
+#define OID_ANSI_X9_62_SIG_SHA2 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2
+#define OID_ANY_EXTENDED_KEY_USAGE MBEDTLS_OID_ANY_EXTENDED_KEY_USAGE
+#define OID_AT MBEDTLS_OID_AT
+#define OID_AT_CN MBEDTLS_OID_AT_CN
+#define OID_AT_COUNTRY MBEDTLS_OID_AT_COUNTRY
+#define OID_AT_DN_QUALIFIER MBEDTLS_OID_AT_DN_QUALIFIER
+#define OID_AT_GENERATION_QUALIFIER MBEDTLS_OID_AT_GENERATION_QUALIFIER
+#define OID_AT_GIVEN_NAME MBEDTLS_OID_AT_GIVEN_NAME
+#define OID_AT_INITIALS MBEDTLS_OID_AT_INITIALS
+#define OID_AT_LOCALITY MBEDTLS_OID_AT_LOCALITY
+#define OID_AT_ORGANIZATION MBEDTLS_OID_AT_ORGANIZATION
+#define OID_AT_ORG_UNIT MBEDTLS_OID_AT_ORG_UNIT
+#define OID_AT_POSTAL_ADDRESS MBEDTLS_OID_AT_POSTAL_ADDRESS
+#define OID_AT_POSTAL_CODE MBEDTLS_OID_AT_POSTAL_CODE
+#define OID_AT_PSEUDONYM MBEDTLS_OID_AT_PSEUDONYM
+#define OID_AT_SERIAL_NUMBER MBEDTLS_OID_AT_SERIAL_NUMBER
+#define OID_AT_STATE MBEDTLS_OID_AT_STATE
+#define OID_AT_SUR_NAME MBEDTLS_OID_AT_SUR_NAME
+#define OID_AT_TITLE MBEDTLS_OID_AT_TITLE
+#define OID_AT_UNIQUE_IDENTIFIER MBEDTLS_OID_AT_UNIQUE_IDENTIFIER
+#define OID_AUTHORITY_KEY_IDENTIFIER MBEDTLS_OID_AUTHORITY_KEY_IDENTIFIER
+#define OID_BASIC_CONSTRAINTS MBEDTLS_OID_BASIC_CONSTRAINTS
+#define OID_CERTICOM MBEDTLS_OID_CERTICOM
+#define OID_CERTIFICATE_POLICIES MBEDTLS_OID_CERTIFICATE_POLICIES
+#define OID_CLIENT_AUTH MBEDTLS_OID_CLIENT_AUTH
+#define OID_CMP MBEDTLS_OID_CMP
+#define OID_CODE_SIGNING MBEDTLS_OID_CODE_SIGNING
+#define OID_COUNTRY_US MBEDTLS_OID_COUNTRY_US
+#define OID_CRL_DISTRIBUTION_POINTS MBEDTLS_OID_CRL_DISTRIBUTION_POINTS
+#define OID_CRL_NUMBER MBEDTLS_OID_CRL_NUMBER
+#define OID_DES_CBC MBEDTLS_OID_DES_CBC
+#define OID_DES_EDE3_CBC MBEDTLS_OID_DES_EDE3_CBC
+#define OID_DIGEST_ALG_MD2 MBEDTLS_OID_DIGEST_ALG_MD2
+#define OID_DIGEST_ALG_MD4 MBEDTLS_OID_DIGEST_ALG_MD4
+#define OID_DIGEST_ALG_MD5 MBEDTLS_OID_DIGEST_ALG_MD5
+#define OID_DIGEST_ALG_SHA1 MBEDTLS_OID_DIGEST_ALG_SHA1
+#define OID_DIGEST_ALG_SHA224 MBEDTLS_OID_DIGEST_ALG_SHA224
+#define OID_DIGEST_ALG_SHA256 MBEDTLS_OID_DIGEST_ALG_SHA256
+#define OID_DIGEST_ALG_SHA384 MBEDTLS_OID_DIGEST_ALG_SHA384
+#define OID_DIGEST_ALG_SHA512 MBEDTLS_OID_DIGEST_ALG_SHA512
+#define OID_DOMAIN_COMPONENT MBEDTLS_OID_DOMAIN_COMPONENT
+#define OID_ECDSA_SHA1 MBEDTLS_OID_ECDSA_SHA1
+#define OID_ECDSA_SHA224 MBEDTLS_OID_ECDSA_SHA224
+#define OID_ECDSA_SHA256 MBEDTLS_OID_ECDSA_SHA256
+#define OID_ECDSA_SHA384 MBEDTLS_OID_ECDSA_SHA384
+#define OID_ECDSA_SHA512 MBEDTLS_OID_ECDSA_SHA512
+#define OID_EC_ALG_ECDH MBEDTLS_OID_EC_ALG_ECDH
+#define OID_EC_ALG_UNRESTRICTED MBEDTLS_OID_EC_ALG_UNRESTRICTED
+#define OID_EC_BRAINPOOL_V1 MBEDTLS_OID_EC_BRAINPOOL_V1
+#define OID_EC_GRP_BP256R1 MBEDTLS_OID_EC_GRP_BP256R1
+#define OID_EC_GRP_BP384R1 MBEDTLS_OID_EC_GRP_BP384R1
+#define OID_EC_GRP_BP512R1 MBEDTLS_OID_EC_GRP_BP512R1
+#define OID_EC_GRP_SECP192K1 MBEDTLS_OID_EC_GRP_SECP192K1
+#define OID_EC_GRP_SECP192R1 MBEDTLS_OID_EC_GRP_SECP192R1
+#define OID_EC_GRP_SECP224K1 MBEDTLS_OID_EC_GRP_SECP224K1
+#define OID_EC_GRP_SECP224R1 MBEDTLS_OID_EC_GRP_SECP224R1
+#define OID_EC_GRP_SECP256K1 MBEDTLS_OID_EC_GRP_SECP256K1
+#define OID_EC_GRP_SECP256R1 MBEDTLS_OID_EC_GRP_SECP256R1
+#define OID_EC_GRP_SECP384R1 MBEDTLS_OID_EC_GRP_SECP384R1
+#define OID_EC_GRP_SECP521R1 MBEDTLS_OID_EC_GRP_SECP521R1
+#define OID_EMAIL_PROTECTION MBEDTLS_OID_EMAIL_PROTECTION
+#define OID_EXTENDED_KEY_USAGE MBEDTLS_OID_EXTENDED_KEY_USAGE
+#define OID_FRESHEST_CRL MBEDTLS_OID_FRESHEST_CRL
+#define OID_GOV MBEDTLS_OID_GOV
+#define OID_HMAC_SHA1 MBEDTLS_OID_HMAC_SHA1
+#define OID_ID_CE MBEDTLS_OID_ID_CE
+#define OID_INIHIBIT_ANYPOLICY MBEDTLS_OID_INIHIBIT_ANYPOLICY
+#define OID_ISO_CCITT_DS MBEDTLS_OID_ISO_CCITT_DS
+#define OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ISO_IDENTIFIED_ORG
+#define OID_ISO_ITU_COUNTRY MBEDTLS_OID_ISO_ITU_COUNTRY
+#define OID_ISO_ITU_US_ORG MBEDTLS_OID_ISO_ITU_US_ORG
+#define OID_ISO_MEMBER_BODIES MBEDTLS_OID_ISO_MEMBER_BODIES
+#define OID_ISSUER_ALT_NAME MBEDTLS_OID_ISSUER_ALT_NAME
+#define OID_KEY_USAGE MBEDTLS_OID_KEY_USAGE
+#define OID_KP MBEDTLS_OID_KP
+#define OID_MGF1 MBEDTLS_OID_MGF1
+#define OID_NAME_CONSTRAINTS MBEDTLS_OID_NAME_CONSTRAINTS
+#define OID_NETSCAPE MBEDTLS_OID_NETSCAPE
+#define OID_NS_BASE_URL MBEDTLS_OID_NS_BASE_URL
+#define OID_NS_CA_POLICY_URL MBEDTLS_OID_NS_CA_POLICY_URL
+#define OID_NS_CA_REVOCATION_URL MBEDTLS_OID_NS_CA_REVOCATION_URL
+#define OID_NS_CERT MBEDTLS_OID_NS_CERT
+#define OID_NS_CERT_SEQUENCE MBEDTLS_OID_NS_CERT_SEQUENCE
+#define OID_NS_CERT_TYPE MBEDTLS_OID_NS_CERT_TYPE
+#define OID_NS_COMMENT MBEDTLS_OID_NS_COMMENT
+#define OID_NS_DATA_TYPE MBEDTLS_OID_NS_DATA_TYPE
+#define OID_NS_RENEWAL_URL MBEDTLS_OID_NS_RENEWAL_URL
+#define OID_NS_REVOCATION_URL MBEDTLS_OID_NS_REVOCATION_URL
+#define OID_NS_SSL_SERVER_NAME MBEDTLS_OID_NS_SSL_SERVER_NAME
+#define OID_OCSP_SIGNING MBEDTLS_OID_OCSP_SIGNING
+#define OID_OIW_SECSIG MBEDTLS_OID_OIW_SECSIG
+#define OID_OIW_SECSIG_ALG MBEDTLS_OID_OIW_SECSIG_ALG
+#define OID_OIW_SECSIG_SHA1 MBEDTLS_OID_OIW_SECSIG_SHA1
+#define OID_ORGANIZATION MBEDTLS_OID_ORGANIZATION
+#define OID_ORG_ANSI_X9_62 MBEDTLS_OID_ORG_ANSI_X9_62
+#define OID_ORG_CERTICOM MBEDTLS_OID_ORG_CERTICOM
+#define OID_ORG_DOD MBEDTLS_OID_ORG_DOD
+#define OID_ORG_GOV MBEDTLS_OID_ORG_GOV
+#define OID_ORG_NETSCAPE MBEDTLS_OID_ORG_NETSCAPE
+#define OID_ORG_OIW MBEDTLS_OID_ORG_OIW
+#define OID_ORG_RSA_DATA_SECURITY MBEDTLS_OID_ORG_RSA_DATA_SECURITY
+#define OID_ORG_TELETRUST MBEDTLS_OID_ORG_TELETRUST
+#define OID_PKCS MBEDTLS_OID_PKCS
+#define OID_PKCS1 MBEDTLS_OID_PKCS1
+#define OID_PKCS12 MBEDTLS_OID_PKCS12
+#define OID_PKCS12_PBE MBEDTLS_OID_PKCS12_PBE
+#define OID_PKCS12_PBE_SHA1_DES2_EDE_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_DES2_EDE_CBC
+#define OID_PKCS12_PBE_SHA1_DES3_EDE_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_DES3_EDE_CBC
+#define OID_PKCS12_PBE_SHA1_RC2_128_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_128_CBC
+#define OID_PKCS12_PBE_SHA1_RC2_40_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_40_CBC
+#define OID_PKCS12_PBE_SHA1_RC4_128 MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_128
+#define OID_PKCS12_PBE_SHA1_RC4_40 MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_40
+#define OID_PKCS1_MD2 MBEDTLS_OID_PKCS1_MD2
+#define OID_PKCS1_MD4 MBEDTLS_OID_PKCS1_MD4
+#define OID_PKCS1_MD5 MBEDTLS_OID_PKCS1_MD5
+#define OID_PKCS1_RSA MBEDTLS_OID_PKCS1_RSA
+#define OID_PKCS1_SHA1 MBEDTLS_OID_PKCS1_SHA1
+#define OID_PKCS1_SHA224 MBEDTLS_OID_PKCS1_SHA224
+#define OID_PKCS1_SHA256 MBEDTLS_OID_PKCS1_SHA256
+#define OID_PKCS1_SHA384 MBEDTLS_OID_PKCS1_SHA384
+#define OID_PKCS1_SHA512 MBEDTLS_OID_PKCS1_SHA512
+#define OID_PKCS5 MBEDTLS_OID_PKCS5
+#define OID_PKCS5_PBES2 MBEDTLS_OID_PKCS5_PBES2
+#define OID_PKCS5_PBE_MD2_DES_CBC MBEDTLS_OID_PKCS5_PBE_MD2_DES_CBC
+#define OID_PKCS5_PBE_MD2_RC2_CBC MBEDTLS_OID_PKCS5_PBE_MD2_RC2_CBC
+#define OID_PKCS5_PBE_MD5_DES_CBC MBEDTLS_OID_PKCS5_PBE_MD5_DES_CBC
+#define OID_PKCS5_PBE_MD5_RC2_CBC MBEDTLS_OID_PKCS5_PBE_MD5_RC2_CBC
+#define OID_PKCS5_PBE_SHA1_DES_CBC MBEDTLS_OID_PKCS5_PBE_SHA1_DES_CBC
+#define OID_PKCS5_PBE_SHA1_RC2_CBC MBEDTLS_OID_PKCS5_PBE_SHA1_RC2_CBC
+#define OID_PKCS5_PBKDF2 MBEDTLS_OID_PKCS5_PBKDF2
+#define OID_PKCS5_PBMAC1 MBEDTLS_OID_PKCS5_PBMAC1
+#define OID_PKCS9 MBEDTLS_OID_PKCS9
+#define OID_PKCS9_CSR_EXT_REQ MBEDTLS_OID_PKCS9_CSR_EXT_REQ
+#define OID_PKCS9_EMAIL MBEDTLS_OID_PKCS9_EMAIL
+#define OID_PKIX MBEDTLS_OID_PKIX
+#define OID_POLICY_CONSTRAINTS MBEDTLS_OID_POLICY_CONSTRAINTS
+#define OID_POLICY_MAPPINGS MBEDTLS_OID_POLICY_MAPPINGS
+#define OID_PRIVATE_KEY_USAGE_PERIOD MBEDTLS_OID_PRIVATE_KEY_USAGE_PERIOD
+#define OID_RSASSA_PSS MBEDTLS_OID_RSASSA_PSS
+#define OID_RSA_COMPANY MBEDTLS_OID_RSA_COMPANY
+#define OID_RSA_SHA_OBS MBEDTLS_OID_RSA_SHA_OBS
+#define OID_SERVER_AUTH MBEDTLS_OID_SERVER_AUTH
+#define OID_SIZE MBEDTLS_OID_SIZE
+#define OID_SUBJECT_ALT_NAME MBEDTLS_OID_SUBJECT_ALT_NAME
+#define OID_SUBJECT_DIRECTORY_ATTRS MBEDTLS_OID_SUBJECT_DIRECTORY_ATTRS
+#define OID_SUBJECT_KEY_IDENTIFIER MBEDTLS_OID_SUBJECT_KEY_IDENTIFIER
+#define OID_TELETRUST MBEDTLS_OID_TELETRUST
+#define OID_TIME_STAMPING MBEDTLS_OID_TIME_STAMPING
+#define PADLOCK_ACE MBEDTLS_PADLOCK_ACE
+#define PADLOCK_ALIGN16 MBEDTLS_PADLOCK_ALIGN16
+#define PADLOCK_PHE MBEDTLS_PADLOCK_PHE
+#define PADLOCK_PMM MBEDTLS_PADLOCK_PMM
+#define PADLOCK_RNG MBEDTLS_PADLOCK_RNG
+#define PKCS12_DERIVE_IV MBEDTLS_PKCS12_DERIVE_IV
+#define PKCS12_DERIVE_KEY MBEDTLS_PKCS12_DERIVE_KEY
+#define PKCS12_DERIVE_MAC_KEY MBEDTLS_PKCS12_DERIVE_MAC_KEY
+#define PKCS12_PBE_DECRYPT MBEDTLS_PKCS12_PBE_DECRYPT
+#define PKCS12_PBE_ENCRYPT MBEDTLS_PKCS12_PBE_ENCRYPT
+#define PKCS5_DECRYPT MBEDTLS_PKCS5_DECRYPT
+#define PKCS5_ENCRYPT MBEDTLS_PKCS5_ENCRYPT
+#define POLARSSL_AESNI_AES MBEDTLS_AESNI_AES
+#define POLARSSL_AESNI_CLMUL MBEDTLS_AESNI_CLMUL
+#define POLARSSL_AESNI_H MBEDTLS_AESNI_H
+#define POLARSSL_AES_H MBEDTLS_AES_H
+#define POLARSSL_ARC4_H MBEDTLS_ARC4_H
+#define POLARSSL_ASN1_H MBEDTLS_ASN1_H
+#define POLARSSL_ASN1_WRITE_H MBEDTLS_ASN1_WRITE_H
+#define POLARSSL_BASE64_H MBEDTLS_BASE64_H
+#define POLARSSL_BIGNUM_H MBEDTLS_BIGNUM_H
+#define POLARSSL_BLOWFISH_H MBEDTLS_BLOWFISH_H
+#define POLARSSL_BN_MUL_H MBEDTLS_BN_MUL_H
+#define POLARSSL_CAMELLIA_H MBEDTLS_CAMELLIA_H
+#define POLARSSL_CCM_H MBEDTLS_CCM_H
+#define POLARSSL_CERTS_H MBEDTLS_CERTS_H
+#define POLARSSL_CHECK_CONFIG_H MBEDTLS_CHECK_CONFIG_H
+#define POLARSSL_CIPHERSUITE_NODTLS MBEDTLS_CIPHERSUITE_NODTLS
+#define POLARSSL_CIPHERSUITE_SHORT_TAG MBEDTLS_CIPHERSUITE_SHORT_TAG
+#define POLARSSL_CIPHERSUITE_WEAK MBEDTLS_CIPHERSUITE_WEAK
+#define POLARSSL_CIPHER_AES_128_CBC MBEDTLS_CIPHER_AES_128_CBC
+#define POLARSSL_CIPHER_AES_128_CCM MBEDTLS_CIPHER_AES_128_CCM
+#define POLARSSL_CIPHER_AES_128_CFB128 MBEDTLS_CIPHER_AES_128_CFB128
+#define POLARSSL_CIPHER_AES_128_CTR MBEDTLS_CIPHER_AES_128_CTR
+#define POLARSSL_CIPHER_AES_128_ECB MBEDTLS_CIPHER_AES_128_ECB
+#define POLARSSL_CIPHER_AES_128_GCM MBEDTLS_CIPHER_AES_128_GCM
+#define POLARSSL_CIPHER_AES_192_CBC MBEDTLS_CIPHER_AES_192_CBC
+#define POLARSSL_CIPHER_AES_192_CCM MBEDTLS_CIPHER_AES_192_CCM
+#define POLARSSL_CIPHER_AES_192_CFB128 MBEDTLS_CIPHER_AES_192_CFB128
+#define POLARSSL_CIPHER_AES_192_CTR MBEDTLS_CIPHER_AES_192_CTR
+#define POLARSSL_CIPHER_AES_192_ECB MBEDTLS_CIPHER_AES_192_ECB
+#define POLARSSL_CIPHER_AES_192_GCM MBEDTLS_CIPHER_AES_192_GCM
+#define POLARSSL_CIPHER_AES_256_CBC MBEDTLS_CIPHER_AES_256_CBC
+#define POLARSSL_CIPHER_AES_256_CCM MBEDTLS_CIPHER_AES_256_CCM
+#define POLARSSL_CIPHER_AES_256_CFB128 MBEDTLS_CIPHER_AES_256_CFB128
+#define POLARSSL_CIPHER_AES_256_CTR MBEDTLS_CIPHER_AES_256_CTR
+#define POLARSSL_CIPHER_AES_256_ECB MBEDTLS_CIPHER_AES_256_ECB
+#define POLARSSL_CIPHER_AES_256_GCM MBEDTLS_CIPHER_AES_256_GCM
+#define POLARSSL_CIPHER_ARC4_128 MBEDTLS_CIPHER_ARC4_128
+#define POLARSSL_CIPHER_BLOWFISH_CBC MBEDTLS_CIPHER_BLOWFISH_CBC
+#define POLARSSL_CIPHER_BLOWFISH_CFB64 MBEDTLS_CIPHER_BLOWFISH_CFB64
+#define POLARSSL_CIPHER_BLOWFISH_CTR MBEDTLS_CIPHER_BLOWFISH_CTR
+#define POLARSSL_CIPHER_BLOWFISH_ECB MBEDTLS_CIPHER_BLOWFISH_ECB
+#define POLARSSL_CIPHER_CAMELLIA_128_CBC MBEDTLS_CIPHER_CAMELLIA_128_CBC
+#define POLARSSL_CIPHER_CAMELLIA_128_CCM MBEDTLS_CIPHER_CAMELLIA_128_CCM
+#define POLARSSL_CIPHER_CAMELLIA_128_CFB128 MBEDTLS_CIPHER_CAMELLIA_128_CFB128
+#define POLARSSL_CIPHER_CAMELLIA_128_CTR MBEDTLS_CIPHER_CAMELLIA_128_CTR
+#define POLARSSL_CIPHER_CAMELLIA_128_ECB MBEDTLS_CIPHER_CAMELLIA_128_ECB
+#define POLARSSL_CIPHER_CAMELLIA_128_GCM MBEDTLS_CIPHER_CAMELLIA_128_GCM
+#define POLARSSL_CIPHER_CAMELLIA_192_CBC MBEDTLS_CIPHER_CAMELLIA_192_CBC
+#define POLARSSL_CIPHER_CAMELLIA_192_CCM MBEDTLS_CIPHER_CAMELLIA_192_CCM
+#define POLARSSL_CIPHER_CAMELLIA_192_CFB128 MBEDTLS_CIPHER_CAMELLIA_192_CFB128
+#define POLARSSL_CIPHER_CAMELLIA_192_CTR MBEDTLS_CIPHER_CAMELLIA_192_CTR
+#define POLARSSL_CIPHER_CAMELLIA_192_ECB MBEDTLS_CIPHER_CAMELLIA_192_ECB
+#define POLARSSL_CIPHER_CAMELLIA_192_GCM MBEDTLS_CIPHER_CAMELLIA_192_GCM
+#define POLARSSL_CIPHER_CAMELLIA_256_CBC MBEDTLS_CIPHER_CAMELLIA_256_CBC
+#define POLARSSL_CIPHER_CAMELLIA_256_CCM MBEDTLS_CIPHER_CAMELLIA_256_CCM
+#define POLARSSL_CIPHER_CAMELLIA_256_CFB128 MBEDTLS_CIPHER_CAMELLIA_256_CFB128
+#define POLARSSL_CIPHER_CAMELLIA_256_CTR MBEDTLS_CIPHER_CAMELLIA_256_CTR
+#define POLARSSL_CIPHER_CAMELLIA_256_ECB MBEDTLS_CIPHER_CAMELLIA_256_ECB
+#define POLARSSL_CIPHER_CAMELLIA_256_GCM MBEDTLS_CIPHER_CAMELLIA_256_GCM
+#define POLARSSL_CIPHER_DES_CBC MBEDTLS_CIPHER_DES_CBC
+#define POLARSSL_CIPHER_DES_ECB MBEDTLS_CIPHER_DES_ECB
+#define POLARSSL_CIPHER_DES_EDE3_CBC MBEDTLS_CIPHER_DES_EDE3_CBC
+#define POLARSSL_CIPHER_DES_EDE3_ECB MBEDTLS_CIPHER_DES_EDE3_ECB
+#define POLARSSL_CIPHER_DES_EDE_CBC MBEDTLS_CIPHER_DES_EDE_CBC
+#define POLARSSL_CIPHER_DES_EDE_ECB MBEDTLS_CIPHER_DES_EDE_ECB
+#define POLARSSL_CIPHER_H MBEDTLS_CIPHER_H
+#define POLARSSL_CIPHER_ID_3DES MBEDTLS_CIPHER_ID_3DES
+#define POLARSSL_CIPHER_ID_AES MBEDTLS_CIPHER_ID_AES
+#define POLARSSL_CIPHER_ID_ARC4 MBEDTLS_CIPHER_ID_ARC4
+#define POLARSSL_CIPHER_ID_BLOWFISH MBEDTLS_CIPHER_ID_BLOWFISH
+#define POLARSSL_CIPHER_ID_CAMELLIA MBEDTLS_CIPHER_ID_CAMELLIA
+#define POLARSSL_CIPHER_ID_DES MBEDTLS_CIPHER_ID_DES
+#define POLARSSL_CIPHER_ID_NONE MBEDTLS_CIPHER_ID_NONE
+#define POLARSSL_CIPHER_ID_NULL MBEDTLS_CIPHER_ID_NULL
+#define POLARSSL_CIPHER_MODE_AEAD MBEDTLS_CIPHER_MODE_AEAD
+#define POLARSSL_CIPHER_MODE_STREAM MBEDTLS_CIPHER_MODE_STREAM
+#define POLARSSL_CIPHER_MODE_WITH_PADDING MBEDTLS_CIPHER_MODE_WITH_PADDING
+#define POLARSSL_CIPHER_NONE MBEDTLS_CIPHER_NONE
+#define POLARSSL_CIPHER_NULL MBEDTLS_CIPHER_NULL
+#define POLARSSL_CIPHER_VARIABLE_IV_LEN MBEDTLS_CIPHER_VARIABLE_IV_LEN
+#define POLARSSL_CIPHER_VARIABLE_KEY_LEN MBEDTLS_CIPHER_VARIABLE_KEY_LEN
+#define POLARSSL_CIPHER_WRAP_H MBEDTLS_CIPHER_WRAP_H
+#define POLARSSL_CONFIG_H MBEDTLS_CONFIG_H
+#define POLARSSL_CTR_DRBG_H MBEDTLS_CTR_DRBG_H
+#define POLARSSL_DEBUG_H MBEDTLS_DEBUG_H
+#define POLARSSL_DECRYPT MBEDTLS_DECRYPT
+#define POLARSSL_DES_H MBEDTLS_DES_H
+#define POLARSSL_DHM_H MBEDTLS_DHM_H
+#define POLARSSL_DHM_RFC3526_MODP_2048_G MBEDTLS_DHM_RFC3526_MODP_2048_G
+#define POLARSSL_DHM_RFC3526_MODP_2048_P MBEDTLS_DHM_RFC3526_MODP_2048_P
+#define POLARSSL_DHM_RFC3526_MODP_3072_G MBEDTLS_DHM_RFC3526_MODP_3072_G
+#define POLARSSL_DHM_RFC3526_MODP_3072_P MBEDTLS_DHM_RFC3526_MODP_3072_P
+#define POLARSSL_DHM_RFC5114_MODP_2048_G MBEDTLS_DHM_RFC5114_MODP_2048_G
+#define POLARSSL_DHM_RFC5114_MODP_2048_P MBEDTLS_DHM_RFC5114_MODP_2048_P
+#define POLARSSL_ECDH_H MBEDTLS_ECDH_H
+#define POLARSSL_ECDH_OURS MBEDTLS_ECDH_OURS
+#define POLARSSL_ECDH_THEIRS MBEDTLS_ECDH_THEIRS
+#define POLARSSL_ECDSA_H MBEDTLS_ECDSA_H
+#define POLARSSL_ECP_DP_BP256R1 MBEDTLS_ECP_DP_BP256R1
+#define POLARSSL_ECP_DP_BP384R1 MBEDTLS_ECP_DP_BP384R1
+#define POLARSSL_ECP_DP_BP512R1 MBEDTLS_ECP_DP_BP512R1
+#define POLARSSL_ECP_DP_M255 MBEDTLS_ECP_DP_CURVE25519
+#define POLARSSL_ECP_DP_MAX MBEDTLS_ECP_DP_MAX
+#define POLARSSL_ECP_DP_NONE MBEDTLS_ECP_DP_NONE
+#define POLARSSL_ECP_DP_SECP192K1 MBEDTLS_ECP_DP_SECP192K1
+#define POLARSSL_ECP_DP_SECP192R1 MBEDTLS_ECP_DP_SECP192R1
+#define POLARSSL_ECP_DP_SECP224K1 MBEDTLS_ECP_DP_SECP224K1
+#define POLARSSL_ECP_DP_SECP224R1 MBEDTLS_ECP_DP_SECP224R1
+#define POLARSSL_ECP_DP_SECP256K1 MBEDTLS_ECP_DP_SECP256K1
+#define POLARSSL_ECP_DP_SECP256R1 MBEDTLS_ECP_DP_SECP256R1
+#define POLARSSL_ECP_DP_SECP384R1 MBEDTLS_ECP_DP_SECP384R1
+#define POLARSSL_ECP_DP_SECP521R1 MBEDTLS_ECP_DP_SECP521R1
+#define POLARSSL_ECP_H MBEDTLS_ECP_H
+#define POLARSSL_ECP_MAX_BYTES MBEDTLS_ECP_MAX_BYTES
+#define POLARSSL_ECP_MAX_PT_LEN MBEDTLS_ECP_MAX_PT_LEN
+#define POLARSSL_ECP_PF_COMPRESSED MBEDTLS_ECP_PF_COMPRESSED
+#define POLARSSL_ECP_PF_UNCOMPRESSED MBEDTLS_ECP_PF_UNCOMPRESSED
+#define POLARSSL_ECP_TLS_NAMED_CURVE MBEDTLS_ECP_TLS_NAMED_CURVE
+#define POLARSSL_ENCRYPT MBEDTLS_ENCRYPT
+#define POLARSSL_ENTROPY_H MBEDTLS_ENTROPY_H
+#define POLARSSL_ENTROPY_POLL_H MBEDTLS_ENTROPY_POLL_H
+#define POLARSSL_ENTROPY_SHA256_ACCUMULATOR MBEDTLS_ENTROPY_SHA256_ACCUMULATOR
+#define POLARSSL_ENTROPY_SHA512_ACCUMULATOR MBEDTLS_ENTROPY_SHA512_ACCUMULATOR
+#define POLARSSL_ERROR_H MBEDTLS_ERROR_H
+#define POLARSSL_ERR_AES_INVALID_INPUT_LENGTH MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH
+#define POLARSSL_ERR_AES_INVALID_KEY_LENGTH MBEDTLS_ERR_AES_INVALID_KEY_LENGTH
+#define POLARSSL_ERR_ASN1_BUF_TOO_SMALL MBEDTLS_ERR_ASN1_BUF_TOO_SMALL
+#define POLARSSL_ERR_ASN1_INVALID_DATA MBEDTLS_ERR_ASN1_INVALID_DATA
+#define POLARSSL_ERR_ASN1_INVALID_LENGTH MBEDTLS_ERR_ASN1_INVALID_LENGTH
+#define POLARSSL_ERR_ASN1_LENGTH_MISMATCH MBEDTLS_ERR_ASN1_LENGTH_MISMATCH
+#define POLARSSL_ERR_ASN1_MALLOC_FAILED MBEDTLS_ERR_ASN1_ALLOC_FAILED
+#define POLARSSL_ERR_ASN1_OUT_OF_DATA MBEDTLS_ERR_ASN1_OUT_OF_DATA
+#define POLARSSL_ERR_ASN1_UNEXPECTED_TAG MBEDTLS_ERR_ASN1_UNEXPECTED_TAG
+#define POLARSSL_ERR_BASE64_BUFFER_TOO_SMALL MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL
+#define POLARSSL_ERR_BASE64_INVALID_CHARACTER MBEDTLS_ERR_BASE64_INVALID_CHARACTER
+#define POLARSSL_ERR_BLOWFISH_INVALID_INPUT_LENGTH MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH
+#define POLARSSL_ERR_BLOWFISH_INVALID_KEY_LENGTH MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH
+#define POLARSSL_ERR_CAMELLIA_INVALID_INPUT_LENGTH MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH
+#define POLARSSL_ERR_CAMELLIA_INVALID_KEY_LENGTH MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH
+#define POLARSSL_ERR_CCM_AUTH_FAILED MBEDTLS_ERR_CCM_AUTH_FAILED
+#define POLARSSL_ERR_CCM_BAD_INPUT MBEDTLS_ERR_CCM_BAD_INPUT
+#define POLARSSL_ERR_CIPHER_ALLOC_FAILED MBEDTLS_ERR_CIPHER_ALLOC_FAILED
+#define POLARSSL_ERR_CIPHER_AUTH_FAILED MBEDTLS_ERR_CIPHER_AUTH_FAILED
+#define POLARSSL_ERR_CIPHER_BAD_INPUT_DATA MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA
+#define POLARSSL_ERR_CIPHER_FEATURE_UNAVAILABLE MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_CIPHER_FULL_BLOCK_EXPECTED MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED
+#define POLARSSL_ERR_CIPHER_INVALID_PADDING MBEDTLS_ERR_CIPHER_INVALID_PADDING
+#define POLARSSL_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED
+#define POLARSSL_ERR_CTR_DRBG_FILE_IO_ERROR MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR
+#define POLARSSL_ERR_CTR_DRBG_INPUT_TOO_BIG MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG
+#define POLARSSL_ERR_CTR_DRBG_REQUEST_TOO_BIG MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG
+#define POLARSSL_ERR_DES_INVALID_INPUT_LENGTH MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH
+#define POLARSSL_ERR_DHM_BAD_INPUT_DATA MBEDTLS_ERR_DHM_BAD_INPUT_DATA
+#define POLARSSL_ERR_DHM_CALC_SECRET_FAILED MBEDTLS_ERR_DHM_CALC_SECRET_FAILED
+#define POLARSSL_ERR_DHM_FILE_IO_ERROR MBEDTLS_ERR_DHM_FILE_IO_ERROR
+#define POLARSSL_ERR_DHM_INVALID_FORMAT MBEDTLS_ERR_DHM_INVALID_FORMAT
+#define POLARSSL_ERR_DHM_MAKE_PARAMS_FAILED MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED
+#define POLARSSL_ERR_DHM_MAKE_PUBLIC_FAILED MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED
+#define POLARSSL_ERR_DHM_MALLOC_FAILED MBEDTLS_ERR_DHM_ALLOC_FAILED
+#define POLARSSL_ERR_DHM_READ_PARAMS_FAILED MBEDTLS_ERR_DHM_READ_PARAMS_FAILED
+#define POLARSSL_ERR_DHM_READ_PUBLIC_FAILED MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED
+#define POLARSSL_ERR_ECP_BAD_INPUT_DATA MBEDTLS_ERR_ECP_BAD_INPUT_DATA
+#define POLARSSL_ERR_ECP_BUFFER_TOO_SMALL MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL
+#define POLARSSL_ERR_ECP_FEATURE_UNAVAILABLE MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_ECP_INVALID_KEY MBEDTLS_ERR_ECP_INVALID_KEY
+#define POLARSSL_ERR_ECP_MALLOC_FAILED MBEDTLS_ERR_ECP_ALLOC_FAILED
+#define POLARSSL_ERR_ECP_RANDOM_FAILED MBEDTLS_ERR_ECP_RANDOM_FAILED
+#define POLARSSL_ERR_ECP_SIG_LEN_MISMATCH MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH
+#define POLARSSL_ERR_ECP_VERIFY_FAILED MBEDTLS_ERR_ECP_VERIFY_FAILED
+#define POLARSSL_ERR_ENTROPY_FILE_IO_ERROR MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR
+#define POLARSSL_ERR_ENTROPY_MAX_SOURCES MBEDTLS_ERR_ENTROPY_MAX_SOURCES
+#define POLARSSL_ERR_ENTROPY_NO_SOURCES_DEFINED MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED
+#define POLARSSL_ERR_ENTROPY_SOURCE_FAILED MBEDTLS_ERR_ENTROPY_SOURCE_FAILED
+#define POLARSSL_ERR_GCM_AUTH_FAILED MBEDTLS_ERR_GCM_AUTH_FAILED
+#define POLARSSL_ERR_GCM_BAD_INPUT MBEDTLS_ERR_GCM_BAD_INPUT
+#define POLARSSL_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED
+#define POLARSSL_ERR_HMAC_DRBG_FILE_IO_ERROR MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR
+#define POLARSSL_ERR_HMAC_DRBG_INPUT_TOO_BIG MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG
+#define POLARSSL_ERR_HMAC_DRBG_REQUEST_TOO_BIG MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG
+#define POLARSSL_ERR_MD_ALLOC_FAILED MBEDTLS_ERR_MD_ALLOC_FAILED
+#define POLARSSL_ERR_MD_BAD_INPUT_DATA MBEDTLS_ERR_MD_BAD_INPUT_DATA
+#define POLARSSL_ERR_MD_FEATURE_UNAVAILABLE MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_MD_FILE_IO_ERROR MBEDTLS_ERR_MD_FILE_IO_ERROR
+#define POLARSSL_ERR_MPI_BAD_INPUT_DATA MBEDTLS_ERR_MPI_BAD_INPUT_DATA
+#define POLARSSL_ERR_MPI_BUFFER_TOO_SMALL MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL
+#define POLARSSL_ERR_MPI_DIVISION_BY_ZERO MBEDTLS_ERR_MPI_DIVISION_BY_ZERO
+#define POLARSSL_ERR_MPI_FILE_IO_ERROR MBEDTLS_ERR_MPI_FILE_IO_ERROR
+#define POLARSSL_ERR_MPI_INVALID_CHARACTER MBEDTLS_ERR_MPI_INVALID_CHARACTER
+#define POLARSSL_ERR_MPI_MALLOC_FAILED MBEDTLS_ERR_MPI_ALLOC_FAILED
+#define POLARSSL_ERR_MPI_NEGATIVE_VALUE MBEDTLS_ERR_MPI_NEGATIVE_VALUE
+#define POLARSSL_ERR_MPI_NOT_ACCEPTABLE MBEDTLS_ERR_MPI_NOT_ACCEPTABLE
+#define POLARSSL_ERR_NET_ACCEPT_FAILED MBEDTLS_ERR_NET_ACCEPT_FAILED
+#define POLARSSL_ERR_NET_BIND_FAILED MBEDTLS_ERR_NET_BIND_FAILED
+#define POLARSSL_ERR_NET_CONNECT_FAILED MBEDTLS_ERR_NET_CONNECT_FAILED
+#define POLARSSL_ERR_NET_CONN_RESET MBEDTLS_ERR_NET_CONN_RESET
+#define POLARSSL_ERR_NET_LISTEN_FAILED MBEDTLS_ERR_NET_LISTEN_FAILED
+#define POLARSSL_ERR_NET_RECV_FAILED MBEDTLS_ERR_NET_RECV_FAILED
+#define POLARSSL_ERR_NET_SEND_FAILED MBEDTLS_ERR_NET_SEND_FAILED
+#define POLARSSL_ERR_NET_SOCKET_FAILED MBEDTLS_ERR_NET_SOCKET_FAILED
+#define POLARSSL_ERR_NET_TIMEOUT MBEDTLS_ERR_SSL_TIMEOUT
+#define POLARSSL_ERR_NET_UNKNOWN_HOST MBEDTLS_ERR_NET_UNKNOWN_HOST
+#define POLARSSL_ERR_NET_WANT_READ MBEDTLS_ERR_SSL_WANT_READ
+#define POLARSSL_ERR_NET_WANT_WRITE MBEDTLS_ERR_SSL_WANT_WRITE
+#define POLARSSL_ERR_OID_BUF_TOO_SMALL MBEDTLS_ERR_OID_BUF_TOO_SMALL
+#define POLARSSL_ERR_OID_NOT_FOUND MBEDTLS_ERR_OID_NOT_FOUND
+#define POLARSSL_ERR_PADLOCK_DATA_MISALIGNED MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED
+#define POLARSSL_ERR_PEM_BAD_INPUT_DATA MBEDTLS_ERR_PEM_BAD_INPUT_DATA
+#define POLARSSL_ERR_PEM_FEATURE_UNAVAILABLE MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_PEM_INVALID_DATA MBEDTLS_ERR_PEM_INVALID_DATA
+#define POLARSSL_ERR_PEM_INVALID_ENC_IV MBEDTLS_ERR_PEM_INVALID_ENC_IV
+#define POLARSSL_ERR_PEM_MALLOC_FAILED MBEDTLS_ERR_PEM_ALLOC_FAILED
+#define POLARSSL_ERR_PEM_NO_HEADER_FOOTER_PRESENT MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT
+#define POLARSSL_ERR_PEM_PASSWORD_MISMATCH MBEDTLS_ERR_PEM_PASSWORD_MISMATCH
+#define POLARSSL_ERR_PEM_PASSWORD_REQUIRED MBEDTLS_ERR_PEM_PASSWORD_REQUIRED
+#define POLARSSL_ERR_PEM_UNKNOWN_ENC_ALG MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG
+#define POLARSSL_ERR_PKCS12_BAD_INPUT_DATA MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA
+#define POLARSSL_ERR_PKCS12_FEATURE_UNAVAILABLE MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_PKCS12_PASSWORD_MISMATCH MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH
+#define POLARSSL_ERR_PKCS12_PBE_INVALID_FORMAT MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT
+#define POLARSSL_ERR_PKCS5_BAD_INPUT_DATA MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA
+#define POLARSSL_ERR_PKCS5_FEATURE_UNAVAILABLE MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_PKCS5_INVALID_FORMAT MBEDTLS_ERR_PKCS5_INVALID_FORMAT
+#define POLARSSL_ERR_PKCS5_PASSWORD_MISMATCH MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH
+#define POLARSSL_ERR_PK_BAD_INPUT_DATA MBEDTLS_ERR_PK_BAD_INPUT_DATA
+#define POLARSSL_ERR_PK_FEATURE_UNAVAILABLE MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_PK_FILE_IO_ERROR MBEDTLS_ERR_PK_FILE_IO_ERROR
+#define POLARSSL_ERR_PK_INVALID_ALG MBEDTLS_ERR_PK_INVALID_ALG
+#define POLARSSL_ERR_PK_INVALID_PUBKEY MBEDTLS_ERR_PK_INVALID_PUBKEY
+#define POLARSSL_ERR_PK_KEY_INVALID_FORMAT MBEDTLS_ERR_PK_KEY_INVALID_FORMAT
+#define POLARSSL_ERR_PK_KEY_INVALID_VERSION MBEDTLS_ERR_PK_KEY_INVALID_VERSION
+#define POLARSSL_ERR_PK_MALLOC_FAILED MBEDTLS_ERR_PK_ALLOC_FAILED
+#define POLARSSL_ERR_PK_PASSWORD_MISMATCH MBEDTLS_ERR_PK_PASSWORD_MISMATCH
+#define POLARSSL_ERR_PK_PASSWORD_REQUIRED MBEDTLS_ERR_PK_PASSWORD_REQUIRED
+#define POLARSSL_ERR_PK_SIG_LEN_MISMATCH MBEDTLS_ERR_PK_SIG_LEN_MISMATCH
+#define POLARSSL_ERR_PK_TYPE_MISMATCH MBEDTLS_ERR_PK_TYPE_MISMATCH
+#define POLARSSL_ERR_PK_UNKNOWN_NAMED_CURVE MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE
+#define POLARSSL_ERR_PK_UNKNOWN_PK_ALG MBEDTLS_ERR_PK_UNKNOWN_PK_ALG
+#define POLARSSL_ERR_RSA_BAD_INPUT_DATA MBEDTLS_ERR_RSA_BAD_INPUT_DATA
+#define POLARSSL_ERR_RSA_INVALID_PADDING MBEDTLS_ERR_RSA_INVALID_PADDING
+#define POLARSSL_ERR_RSA_KEY_CHECK_FAILED MBEDTLS_ERR_RSA_KEY_CHECK_FAILED
+#define POLARSSL_ERR_RSA_KEY_GEN_FAILED MBEDTLS_ERR_RSA_KEY_GEN_FAILED
+#define POLARSSL_ERR_RSA_OUTPUT_TOO_LARGE MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE
+#define POLARSSL_ERR_RSA_PRIVATE_FAILED MBEDTLS_ERR_RSA_PRIVATE_FAILED
+#define POLARSSL_ERR_RSA_PUBLIC_FAILED MBEDTLS_ERR_RSA_PUBLIC_FAILED
+#define POLARSSL_ERR_RSA_RNG_FAILED MBEDTLS_ERR_RSA_RNG_FAILED
+#define POLARSSL_ERR_RSA_VERIFY_FAILED MBEDTLS_ERR_RSA_VERIFY_FAILED
+#define POLARSSL_ERR_SSL_BAD_HS_CERTIFICATE MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE
+#define POLARSSL_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST
+#define POLARSSL_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY
+#define POLARSSL_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC
+#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_HELLO MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO
+#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE
+#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS
+#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP
+#define POLARSSL_ERR_SSL_BAD_HS_FINISHED MBEDTLS_ERR_SSL_BAD_HS_FINISHED
+#define POLARSSL_ERR_SSL_BAD_HS_NEW_SESSION_TICKET MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET
+#define POLARSSL_ERR_SSL_BAD_HS_PROTOCOL_VERSION MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION
+#define POLARSSL_ERR_SSL_BAD_HS_SERVER_HELLO MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO
+#define POLARSSL_ERR_SSL_BAD_HS_SERVER_HELLO_DONE MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE
+#define POLARSSL_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE
+#define POLARSSL_ERR_SSL_BAD_INPUT_DATA MBEDTLS_ERR_SSL_BAD_INPUT_DATA
+#define POLARSSL_ERR_SSL_BUFFER_TOO_SMALL MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL
+#define POLARSSL_ERR_SSL_CA_CHAIN_REQUIRED MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED
+#define POLARSSL_ERR_SSL_CERTIFICATE_REQUIRED MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED
+#define POLARSSL_ERR_SSL_CERTIFICATE_TOO_LARGE MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE
+#define POLARSSL_ERR_SSL_COMPRESSION_FAILED MBEDTLS_ERR_SSL_COMPRESSION_FAILED
+#define POLARSSL_ERR_SSL_CONN_EOF MBEDTLS_ERR_SSL_CONN_EOF
+#define POLARSSL_ERR_SSL_COUNTER_WRAPPING MBEDTLS_ERR_SSL_COUNTER_WRAPPING
+#define POLARSSL_ERR_SSL_FATAL_ALERT_MESSAGE MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE
+#define POLARSSL_ERR_SSL_FEATURE_UNAVAILABLE MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_SSL_HELLO_VERIFY_REQUIRED MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED
+#define POLARSSL_ERR_SSL_HW_ACCEL_FAILED MBEDTLS_ERR_SSL_HW_ACCEL_FAILED
+#define POLARSSL_ERR_SSL_HW_ACCEL_FALLTHROUGH MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH
+#define POLARSSL_ERR_SSL_INTERNAL_ERROR MBEDTLS_ERR_SSL_INTERNAL_ERROR
+#define POLARSSL_ERR_SSL_INVALID_MAC MBEDTLS_ERR_SSL_INVALID_MAC
+#define POLARSSL_ERR_SSL_INVALID_RECORD MBEDTLS_ERR_SSL_INVALID_RECORD
+#define POLARSSL_ERR_SSL_MALLOC_FAILED MBEDTLS_ERR_SSL_ALLOC_FAILED
+#define POLARSSL_ERR_SSL_NO_CIPHER_CHOSEN MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN
+#define POLARSSL_ERR_SSL_NO_CLIENT_CERTIFICATE MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE
+#define POLARSSL_ERR_SSL_NO_RNG MBEDTLS_ERR_SSL_NO_RNG
+#define POLARSSL_ERR_SSL_NO_USABLE_CIPHERSUITE MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE
+#define POLARSSL_ERR_SSL_PEER_CLOSE_NOTIFY MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY
+#define POLARSSL_ERR_SSL_PEER_VERIFY_FAILED MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED
+#define POLARSSL_ERR_SSL_PK_TYPE_MISMATCH MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH
+#define POLARSSL_ERR_SSL_PRIVATE_KEY_REQUIRED MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED
+#define POLARSSL_ERR_SSL_SESSION_TICKET_EXPIRED MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED
+#define POLARSSL_ERR_SSL_UNEXPECTED_MESSAGE MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE
+#define POLARSSL_ERR_SSL_UNKNOWN_CIPHER MBEDTLS_ERR_SSL_UNKNOWN_CIPHER
+#define POLARSSL_ERR_SSL_UNKNOWN_IDENTITY MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY
+#define POLARSSL_ERR_SSL_WAITING_SERVER_HELLO_RENEGO MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO
+#define POLARSSL_ERR_THREADING_BAD_INPUT_DATA MBEDTLS_ERR_THREADING_BAD_INPUT_DATA
+#define POLARSSL_ERR_THREADING_FEATURE_UNAVAILABLE MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_THREADING_MUTEX_ERROR MBEDTLS_ERR_THREADING_MUTEX_ERROR
+#define POLARSSL_ERR_X509_BAD_INPUT_DATA MBEDTLS_ERR_X509_BAD_INPUT_DATA
+#define POLARSSL_ERR_X509_CERT_UNKNOWN_FORMAT MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT
+#define POLARSSL_ERR_X509_CERT_VERIFY_FAILED MBEDTLS_ERR_X509_CERT_VERIFY_FAILED
+#define POLARSSL_ERR_X509_FEATURE_UNAVAILABLE MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_X509_FILE_IO_ERROR MBEDTLS_ERR_X509_FILE_IO_ERROR
+#define POLARSSL_ERR_X509_INVALID_ALG MBEDTLS_ERR_X509_INVALID_ALG
+#define POLARSSL_ERR_X509_INVALID_DATE MBEDTLS_ERR_X509_INVALID_DATE
+#define POLARSSL_ERR_X509_INVALID_EXTENSIONS MBEDTLS_ERR_X509_INVALID_EXTENSIONS
+#define POLARSSL_ERR_X509_INVALID_FORMAT MBEDTLS_ERR_X509_INVALID_FORMAT
+#define POLARSSL_ERR_X509_INVALID_NAME MBEDTLS_ERR_X509_INVALID_NAME
+#define POLARSSL_ERR_X509_INVALID_SERIAL MBEDTLS_ERR_X509_INVALID_SERIAL
+#define POLARSSL_ERR_X509_INVALID_SIGNATURE MBEDTLS_ERR_X509_INVALID_SIGNATURE
+#define POLARSSL_ERR_X509_INVALID_VERSION MBEDTLS_ERR_X509_INVALID_VERSION
+#define POLARSSL_ERR_X509_MALLOC_FAILED MBEDTLS_ERR_X509_ALLOC_FAILED
+#define POLARSSL_ERR_X509_SIG_MISMATCH MBEDTLS_ERR_X509_SIG_MISMATCH
+#define POLARSSL_ERR_X509_UNKNOWN_OID MBEDTLS_ERR_X509_UNKNOWN_OID
+#define POLARSSL_ERR_X509_UNKNOWN_SIG_ALG MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG
+#define POLARSSL_ERR_X509_UNKNOWN_VERSION MBEDTLS_ERR_X509_UNKNOWN_VERSION
+#define POLARSSL_ERR_XTEA_INVALID_INPUT_LENGTH MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH
+#define POLARSSL_GCM_H MBEDTLS_GCM_H
+#define POLARSSL_HAVEGE_H MBEDTLS_HAVEGE_H
+#define POLARSSL_HAVE_INT32 MBEDTLS_HAVE_INT32
+#define POLARSSL_HAVE_INT64 MBEDTLS_HAVE_INT64
+#define POLARSSL_HAVE_UDBL MBEDTLS_HAVE_UDBL
+#define POLARSSL_HAVE_X86 MBEDTLS_HAVE_X86
+#define POLARSSL_HAVE_X86_64 MBEDTLS_HAVE_X86_64
+#define POLARSSL_HMAC_DRBG_H MBEDTLS_HMAC_DRBG_H
+#define POLARSSL_HMAC_DRBG_PR_OFF MBEDTLS_HMAC_DRBG_PR_OFF
+#define POLARSSL_HMAC_DRBG_PR_ON MBEDTLS_HMAC_DRBG_PR_ON
+#define POLARSSL_KEY_EXCHANGE_DHE_PSK MBEDTLS_KEY_EXCHANGE_DHE_PSK
+#define POLARSSL_KEY_EXCHANGE_DHE_RSA MBEDTLS_KEY_EXCHANGE_DHE_RSA
+#define POLARSSL_KEY_EXCHANGE_ECDHE_ECDSA MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA
+#define POLARSSL_KEY_EXCHANGE_ECDHE_PSK MBEDTLS_KEY_EXCHANGE_ECDHE_PSK
+#define POLARSSL_KEY_EXCHANGE_ECDHE_RSA MBEDTLS_KEY_EXCHANGE_ECDHE_RSA
+#define POLARSSL_KEY_EXCHANGE_ECDH_ECDSA MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA
+#define POLARSSL_KEY_EXCHANGE_ECDH_RSA MBEDTLS_KEY_EXCHANGE_ECDH_RSA
+#define POLARSSL_KEY_EXCHANGE_NONE MBEDTLS_KEY_EXCHANGE_NONE
+#define POLARSSL_KEY_EXCHANGE_PSK MBEDTLS_KEY_EXCHANGE_PSK
+#define POLARSSL_KEY_EXCHANGE_RSA MBEDTLS_KEY_EXCHANGE_RSA
+#define POLARSSL_KEY_EXCHANGE_RSA_PSK MBEDTLS_KEY_EXCHANGE_RSA_PSK
+#define POLARSSL_KEY_EXCHANGE__SOME__ECDHE_ENABLED MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED
+#define POLARSSL_KEY_EXCHANGE__SOME__PSK_ENABLED MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE__WITH_CERT__ENABLED MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED
+#define POLARSSL_KEY_LENGTH_DES MBEDTLS_KEY_LENGTH_DES
+#define POLARSSL_KEY_LENGTH_DES_EDE MBEDTLS_KEY_LENGTH_DES_EDE
+#define POLARSSL_KEY_LENGTH_DES_EDE3 MBEDTLS_KEY_LENGTH_DES_EDE3
+#define POLARSSL_KEY_LENGTH_NONE MBEDTLS_KEY_LENGTH_NONE
+#define POLARSSL_MAX_BLOCK_LENGTH MBEDTLS_MAX_BLOCK_LENGTH
+#define POLARSSL_MAX_IV_LENGTH MBEDTLS_MAX_IV_LENGTH
+#define POLARSSL_MD2_H MBEDTLS_MD2_H
+#define POLARSSL_MD4_H MBEDTLS_MD4_H
+#define POLARSSL_MD5_H MBEDTLS_MD5_H
+#define POLARSSL_MD_H MBEDTLS_MD_H
+#define POLARSSL_MD_MAX_SIZE MBEDTLS_MD_MAX_SIZE
+#define POLARSSL_MD_MD2 MBEDTLS_MD_MD2
+#define POLARSSL_MD_MD4 MBEDTLS_MD_MD4
+#define POLARSSL_MD_MD5 MBEDTLS_MD_MD5
+#define POLARSSL_MD_NONE MBEDTLS_MD_NONE
+#define POLARSSL_MD_RIPEMD160 MBEDTLS_MD_RIPEMD160
+#define POLARSSL_MD_SHA1 MBEDTLS_MD_SHA1
+#define POLARSSL_MD_SHA224 MBEDTLS_MD_SHA224
+#define POLARSSL_MD_SHA256 MBEDTLS_MD_SHA256
+#define POLARSSL_MD_SHA384 MBEDTLS_MD_SHA384
+#define POLARSSL_MD_SHA512 MBEDTLS_MD_SHA512
+#define POLARSSL_MD_WRAP_H MBEDTLS_MD_WRAP_H
+#define POLARSSL_MEMORY_BUFFER_ALLOC_H MBEDTLS_MEMORY_BUFFER_ALLOC_H
+#define POLARSSL_MODE_CBC MBEDTLS_MODE_CBC
+#define POLARSSL_MODE_CCM MBEDTLS_MODE_CCM
+#define POLARSSL_MODE_CFB MBEDTLS_MODE_CFB
+#define POLARSSL_MODE_CTR MBEDTLS_MODE_CTR
+#define POLARSSL_MODE_ECB MBEDTLS_MODE_ECB
+#define POLARSSL_MODE_GCM MBEDTLS_MODE_GCM
+#define POLARSSL_MODE_NONE MBEDTLS_MODE_NONE
+#define POLARSSL_MODE_OFB MBEDTLS_MODE_OFB
+#define POLARSSL_MODE_STREAM MBEDTLS_MODE_STREAM
+#define POLARSSL_MPI_MAX_BITS MBEDTLS_MPI_MAX_BITS
+#define POLARSSL_MPI_MAX_BITS_SCALE100 MBEDTLS_MPI_MAX_BITS_SCALE100
+#define POLARSSL_MPI_MAX_LIMBS MBEDTLS_MPI_MAX_LIMBS
+#define POLARSSL_MPI_RW_BUFFER_SIZE MBEDTLS_MPI_RW_BUFFER_SIZE
+#define POLARSSL_NET_H MBEDTLS_NET_SOCKETS_H
+#define POLARSSL_NET_LISTEN_BACKLOG MBEDTLS_NET_LISTEN_BACKLOG
+#define POLARSSL_OID_H MBEDTLS_OID_H
+#define POLARSSL_OPERATION_NONE MBEDTLS_OPERATION_NONE
+#define POLARSSL_PADDING_NONE MBEDTLS_PADDING_NONE
+#define POLARSSL_PADDING_ONE_AND_ZEROS MBEDTLS_PADDING_ONE_AND_ZEROS
+#define POLARSSL_PADDING_PKCS7 MBEDTLS_PADDING_PKCS7
+#define POLARSSL_PADDING_ZEROS MBEDTLS_PADDING_ZEROS
+#define POLARSSL_PADDING_ZEROS_AND_LEN MBEDTLS_PADDING_ZEROS_AND_LEN
+#define POLARSSL_PADLOCK_H MBEDTLS_PADLOCK_H
+#define POLARSSL_PEM_H MBEDTLS_PEM_H
+#define POLARSSL_PKCS11_H MBEDTLS_PKCS11_H
+#define POLARSSL_PKCS12_H MBEDTLS_PKCS12_H
+#define POLARSSL_PKCS5_H MBEDTLS_PKCS5_H
+#define POLARSSL_PK_DEBUG_ECP MBEDTLS_PK_DEBUG_ECP
+#define POLARSSL_PK_DEBUG_MAX_ITEMS MBEDTLS_PK_DEBUG_MAX_ITEMS
+#define POLARSSL_PK_DEBUG_MPI MBEDTLS_PK_DEBUG_MPI
+#define POLARSSL_PK_DEBUG_NONE MBEDTLS_PK_DEBUG_NONE
+#define POLARSSL_PK_ECDSA MBEDTLS_PK_ECDSA
+#define POLARSSL_PK_ECKEY MBEDTLS_PK_ECKEY
+#define POLARSSL_PK_ECKEY_DH MBEDTLS_PK_ECKEY_DH
+#define POLARSSL_PK_H MBEDTLS_PK_H
+#define POLARSSL_PK_NONE MBEDTLS_PK_NONE
+#define POLARSSL_PK_RSA MBEDTLS_PK_RSA
+#define POLARSSL_PK_RSASSA_PSS MBEDTLS_PK_RSASSA_PSS
+#define POLARSSL_PK_RSA_ALT MBEDTLS_PK_RSA_ALT
+#define POLARSSL_PK_WRAP_H MBEDTLS_PK_WRAP_H
+#define POLARSSL_PLATFORM_H MBEDTLS_PLATFORM_H
+#define POLARSSL_PREMASTER_SIZE MBEDTLS_PREMASTER_SIZE
+#define POLARSSL_RIPEMD160_H MBEDTLS_RIPEMD160_H
+#define POLARSSL_RSA_H MBEDTLS_RSA_H
+#define POLARSSL_SHA1_H MBEDTLS_SHA1_H
+#define POLARSSL_SHA256_H MBEDTLS_SHA256_H
+#define POLARSSL_SHA512_H MBEDTLS_SHA512_H
+#define POLARSSL_SSL_CACHE_H MBEDTLS_SSL_CACHE_H
+#define POLARSSL_SSL_CIPHERSUITES_H MBEDTLS_SSL_CIPHERSUITES_H
+#define POLARSSL_SSL_COOKIE_H MBEDTLS_SSL_COOKIE_H
+#define POLARSSL_SSL_H MBEDTLS_SSL_H
+#define POLARSSL_THREADING_H MBEDTLS_THREADING_H
+#define POLARSSL_THREADING_IMPL MBEDTLS_THREADING_IMPL
+#define POLARSSL_TIMING_H MBEDTLS_TIMING_H
+#define POLARSSL_VERSION_H MBEDTLS_VERSION_H
+#define POLARSSL_VERSION_MAJOR MBEDTLS_VERSION_MAJOR
+#define POLARSSL_VERSION_MINOR MBEDTLS_VERSION_MINOR
+#define POLARSSL_VERSION_NUMBER MBEDTLS_VERSION_NUMBER
+#define POLARSSL_VERSION_PATCH MBEDTLS_VERSION_PATCH
+#define POLARSSL_VERSION_STRING MBEDTLS_VERSION_STRING
+#define POLARSSL_VERSION_STRING_FULL MBEDTLS_VERSION_STRING_FULL
+#define POLARSSL_X509_CRL_H MBEDTLS_X509_CRL_H
+#define POLARSSL_X509_CRT_H MBEDTLS_X509_CRT_H
+#define POLARSSL_X509_CSR_H MBEDTLS_X509_CSR_H
+#define POLARSSL_X509_H MBEDTLS_X509_H
+#define POLARSSL_XTEA_H MBEDTLS_XTEA_H
+#define RSA_CRYPT MBEDTLS_RSA_CRYPT
+#define RSA_PKCS_V15 MBEDTLS_RSA_PKCS_V15
+#define RSA_PKCS_V21 MBEDTLS_RSA_PKCS_V21
+#define RSA_PRIVATE MBEDTLS_RSA_PRIVATE
+#define RSA_PUBLIC MBEDTLS_RSA_PUBLIC
+#define RSA_SALT_LEN_ANY MBEDTLS_RSA_SALT_LEN_ANY
+#define RSA_SIGN MBEDTLS_RSA_SIGN
+#define SSL_ALERT_LEVEL_FATAL MBEDTLS_SSL_ALERT_LEVEL_FATAL
+#define SSL_ALERT_LEVEL_WARNING MBEDTLS_SSL_ALERT_LEVEL_WARNING
+#define SSL_ALERT_MSG_ACCESS_DENIED MBEDTLS_SSL_ALERT_MSG_ACCESS_DENIED
+#define SSL_ALERT_MSG_BAD_CERT MBEDTLS_SSL_ALERT_MSG_BAD_CERT
+#define SSL_ALERT_MSG_BAD_RECORD_MAC MBEDTLS_SSL_ALERT_MSG_BAD_RECORD_MAC
+#define SSL_ALERT_MSG_CERT_EXPIRED MBEDTLS_SSL_ALERT_MSG_CERT_EXPIRED
+#define SSL_ALERT_MSG_CERT_REVOKED MBEDTLS_SSL_ALERT_MSG_CERT_REVOKED
+#define SSL_ALERT_MSG_CERT_UNKNOWN MBEDTLS_SSL_ALERT_MSG_CERT_UNKNOWN
+#define SSL_ALERT_MSG_CLOSE_NOTIFY MBEDTLS_SSL_ALERT_MSG_CLOSE_NOTIFY
+#define SSL_ALERT_MSG_DECODE_ERROR MBEDTLS_SSL_ALERT_MSG_DECODE_ERROR
+#define SSL_ALERT_MSG_DECOMPRESSION_FAILURE MBEDTLS_SSL_ALERT_MSG_DECOMPRESSION_FAILURE
+#define SSL_ALERT_MSG_DECRYPTION_FAILED MBEDTLS_SSL_ALERT_MSG_DECRYPTION_FAILED
+#define SSL_ALERT_MSG_DECRYPT_ERROR MBEDTLS_SSL_ALERT_MSG_DECRYPT_ERROR
+#define SSL_ALERT_MSG_EXPORT_RESTRICTION MBEDTLS_SSL_ALERT_MSG_EXPORT_RESTRICTION
+#define SSL_ALERT_MSG_HANDSHAKE_FAILURE MBEDTLS_SSL_ALERT_MSG_HANDSHAKE_FAILURE
+#define SSL_ALERT_MSG_ILLEGAL_PARAMETER MBEDTLS_SSL_ALERT_MSG_ILLEGAL_PARAMETER
+#define SSL_ALERT_MSG_INAPROPRIATE_FALLBACK MBEDTLS_SSL_ALERT_MSG_INAPROPRIATE_FALLBACK
+#define SSL_ALERT_MSG_INSUFFICIENT_SECURITY MBEDTLS_SSL_ALERT_MSG_INSUFFICIENT_SECURITY
+#define SSL_ALERT_MSG_INTERNAL_ERROR MBEDTLS_SSL_ALERT_MSG_INTERNAL_ERROR
+#define SSL_ALERT_MSG_NO_APPLICATION_PROTOCOL MBEDTLS_SSL_ALERT_MSG_NO_APPLICATION_PROTOCOL
+#define SSL_ALERT_MSG_NO_CERT MBEDTLS_SSL_ALERT_MSG_NO_CERT
+#define SSL_ALERT_MSG_NO_RENEGOTIATION MBEDTLS_SSL_ALERT_MSG_NO_RENEGOTIATION
+#define SSL_ALERT_MSG_PROTOCOL_VERSION MBEDTLS_SSL_ALERT_MSG_PROTOCOL_VERSION
+#define SSL_ALERT_MSG_RECORD_OVERFLOW MBEDTLS_SSL_ALERT_MSG_RECORD_OVERFLOW
+#define SSL_ALERT_MSG_UNEXPECTED_MESSAGE MBEDTLS_SSL_ALERT_MSG_UNEXPECTED_MESSAGE
+#define SSL_ALERT_MSG_UNKNOWN_CA MBEDTLS_SSL_ALERT_MSG_UNKNOWN_CA
+#define SSL_ALERT_MSG_UNKNOWN_PSK_IDENTITY MBEDTLS_SSL_ALERT_MSG_UNKNOWN_PSK_IDENTITY
+#define SSL_ALERT_MSG_UNRECOGNIZED_NAME MBEDTLS_SSL_ALERT_MSG_UNRECOGNIZED_NAME
+#define SSL_ALERT_MSG_UNSUPPORTED_CERT MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_CERT
+#define SSL_ALERT_MSG_UNSUPPORTED_EXT MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_EXT
+#define SSL_ALERT_MSG_USER_CANCELED MBEDTLS_SSL_ALERT_MSG_USER_CANCELED
+#define SSL_ANTI_REPLAY_DISABLED MBEDTLS_SSL_ANTI_REPLAY_DISABLED
+#define SSL_ANTI_REPLAY_ENABLED MBEDTLS_SSL_ANTI_REPLAY_ENABLED
+#define SSL_ARC4_DISABLED MBEDTLS_SSL_ARC4_DISABLED
+#define SSL_ARC4_ENABLED MBEDTLS_SSL_ARC4_ENABLED
+#define SSL_BUFFER_LEN ( ( ( MBEDTLS_SSL_IN_BUFFER_LEN ) < ( MBEDTLS_SSL_OUT_BUFFER_LEN ) ) \
+                         ? ( MBEDTLS_SSL_IN_BUFFER_LEN ) : ( MBEDTLS_SSL_OUT_BUFFER_LEN ) )
+#define SSL_CACHE_DEFAULT_MAX_ENTRIES MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES
+#define SSL_CACHE_DEFAULT_TIMEOUT MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT
+#define SSL_CBC_RECORD_SPLITTING_DISABLED MBEDTLS_SSL_CBC_RECORD_SPLITTING_DISABLED
+#define SSL_CBC_RECORD_SPLITTING_ENABLED MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED
+#define SSL_CERTIFICATE_REQUEST MBEDTLS_SSL_CERTIFICATE_REQUEST
+#define SSL_CERTIFICATE_VERIFY MBEDTLS_SSL_CERTIFICATE_VERIFY
+#define SSL_CERT_TYPE_ECDSA_SIGN MBEDTLS_SSL_CERT_TYPE_ECDSA_SIGN
+#define SSL_CERT_TYPE_RSA_SIGN MBEDTLS_SSL_CERT_TYPE_RSA_SIGN
+#define SSL_CHANNEL_INBOUND MBEDTLS_SSL_CHANNEL_INBOUND
+#define SSL_CHANNEL_OUTBOUND MBEDTLS_SSL_CHANNEL_OUTBOUND
+#define SSL_CIPHERSUITES MBEDTLS_SSL_CIPHERSUITES
+#define SSL_CLIENT_CERTIFICATE MBEDTLS_SSL_CLIENT_CERTIFICATE
+#define SSL_CLIENT_CHANGE_CIPHER_SPEC MBEDTLS_SSL_CLIENT_CHANGE_CIPHER_SPEC
+#define SSL_CLIENT_FINISHED MBEDTLS_SSL_CLIENT_FINISHED
+#define SSL_CLIENT_HELLO MBEDTLS_SSL_CLIENT_HELLO
+#define SSL_CLIENT_KEY_EXCHANGE MBEDTLS_SSL_CLIENT_KEY_EXCHANGE
+#define SSL_COMPRESSION_ADD MBEDTLS_SSL_COMPRESSION_ADD
+#define SSL_COMPRESS_DEFLATE MBEDTLS_SSL_COMPRESS_DEFLATE
+#define SSL_COMPRESS_NULL MBEDTLS_SSL_COMPRESS_NULL
+#define SSL_DEBUG_BUF MBEDTLS_SSL_DEBUG_BUF
+#define SSL_DEBUG_CRT MBEDTLS_SSL_DEBUG_CRT
+#define SSL_DEBUG_ECP MBEDTLS_SSL_DEBUG_ECP
+#define SSL_DEBUG_MPI MBEDTLS_SSL_DEBUG_MPI
+#define SSL_DEBUG_MSG MBEDTLS_SSL_DEBUG_MSG
+#define SSL_DEBUG_RET MBEDTLS_SSL_DEBUG_RET
+#define SSL_DEFAULT_TICKET_LIFETIME MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME
+#define SSL_DTLS_TIMEOUT_DFL_MAX MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MAX
+#define SSL_DTLS_TIMEOUT_DFL_MIN MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MIN
+#define SSL_EMPTY_RENEGOTIATION_INFO MBEDTLS_SSL_EMPTY_RENEGOTIATION_INFO
+#define SSL_ETM_DISABLED MBEDTLS_SSL_ETM_DISABLED
+#define SSL_ETM_ENABLED MBEDTLS_SSL_ETM_ENABLED
+#define SSL_EXTENDED_MS_DISABLED MBEDTLS_SSL_EXTENDED_MS_DISABLED
+#define SSL_EXTENDED_MS_ENABLED MBEDTLS_SSL_EXTENDED_MS_ENABLED
+#define SSL_FALLBACK_SCSV MBEDTLS_SSL_FALLBACK_SCSV
+#define SSL_FLUSH_BUFFERS MBEDTLS_SSL_FLUSH_BUFFERS
+#define SSL_HANDSHAKE_OVER MBEDTLS_SSL_HANDSHAKE_OVER
+#define SSL_HANDSHAKE_WRAPUP MBEDTLS_SSL_HANDSHAKE_WRAPUP
+#define SSL_HASH_MD5 MBEDTLS_SSL_HASH_MD5
+#define SSL_HASH_NONE MBEDTLS_SSL_HASH_NONE
+#define SSL_HASH_SHA1 MBEDTLS_SSL_HASH_SHA1
+#define SSL_HASH_SHA224 MBEDTLS_SSL_HASH_SHA224
+#define SSL_HASH_SHA256 MBEDTLS_SSL_HASH_SHA256
+#define SSL_HASH_SHA384 MBEDTLS_SSL_HASH_SHA384
+#define SSL_HASH_SHA512 MBEDTLS_SSL_HASH_SHA512
+#define SSL_HELLO_REQUEST MBEDTLS_SSL_HELLO_REQUEST
+#define SSL_HS_CERTIFICATE MBEDTLS_SSL_HS_CERTIFICATE
+#define SSL_HS_CERTIFICATE_REQUEST MBEDTLS_SSL_HS_CERTIFICATE_REQUEST
+#define SSL_HS_CERTIFICATE_VERIFY MBEDTLS_SSL_HS_CERTIFICATE_VERIFY
+#define SSL_HS_CLIENT_HELLO MBEDTLS_SSL_HS_CLIENT_HELLO
+#define SSL_HS_CLIENT_KEY_EXCHANGE MBEDTLS_SSL_HS_CLIENT_KEY_EXCHANGE
+#define SSL_HS_FINISHED MBEDTLS_SSL_HS_FINISHED
+#define SSL_HS_HELLO_REQUEST MBEDTLS_SSL_HS_HELLO_REQUEST
+#define SSL_HS_HELLO_VERIFY_REQUEST MBEDTLS_SSL_HS_HELLO_VERIFY_REQUEST
+#define SSL_HS_NEW_SESSION_TICKET MBEDTLS_SSL_HS_NEW_SESSION_TICKET
+#define SSL_HS_SERVER_HELLO MBEDTLS_SSL_HS_SERVER_HELLO
+#define SSL_HS_SERVER_HELLO_DONE MBEDTLS_SSL_HS_SERVER_HELLO_DONE
+#define SSL_HS_SERVER_KEY_EXCHANGE MBEDTLS_SSL_HS_SERVER_KEY_EXCHANGE
+#define SSL_INITIAL_HANDSHAKE MBEDTLS_SSL_INITIAL_HANDSHAKE
+#define SSL_IS_CLIENT MBEDTLS_SSL_IS_CLIENT
+#define SSL_IS_FALLBACK MBEDTLS_SSL_IS_FALLBACK
+#define SSL_IS_NOT_FALLBACK MBEDTLS_SSL_IS_NOT_FALLBACK
+#define SSL_IS_SERVER MBEDTLS_SSL_IS_SERVER
+#define SSL_LEGACY_ALLOW_RENEGOTIATION MBEDTLS_SSL_LEGACY_ALLOW_RENEGOTIATION
+#define SSL_LEGACY_BREAK_HANDSHAKE MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE
+#define SSL_LEGACY_NO_RENEGOTIATION MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION
+#define SSL_LEGACY_RENEGOTIATION MBEDTLS_SSL_LEGACY_RENEGOTIATION
+#define SSL_MAC_ADD MBEDTLS_SSL_MAC_ADD
+#define SSL_MAJOR_VERSION_3 MBEDTLS_SSL_MAJOR_VERSION_3
+#define SSL_MAX_CONTENT_LEN MBEDTLS_SSL_MAX_CONTENT_LEN
+#define SSL_MAX_FRAG_LEN_1024 MBEDTLS_SSL_MAX_FRAG_LEN_1024
+#define SSL_MAX_FRAG_LEN_2048 MBEDTLS_SSL_MAX_FRAG_LEN_2048
+#define SSL_MAX_FRAG_LEN_4096 MBEDTLS_SSL_MAX_FRAG_LEN_4096
+#define SSL_MAX_FRAG_LEN_512 MBEDTLS_SSL_MAX_FRAG_LEN_512
+#define SSL_MAX_FRAG_LEN_INVALID MBEDTLS_SSL_MAX_FRAG_LEN_INVALID
+#define SSL_MAX_FRAG_LEN_NONE MBEDTLS_SSL_MAX_FRAG_LEN_NONE
+#define SSL_MAX_MAJOR_VERSION MBEDTLS_SSL_MAX_MAJOR_VERSION
+#define SSL_MAX_MINOR_VERSION MBEDTLS_SSL_MAX_MINOR_VERSION
+#define SSL_MINOR_VERSION_0 MBEDTLS_SSL_MINOR_VERSION_0
+#define SSL_MINOR_VERSION_1 MBEDTLS_SSL_MINOR_VERSION_1
+#define SSL_MINOR_VERSION_2 MBEDTLS_SSL_MINOR_VERSION_2
+#define SSL_MINOR_VERSION_3 MBEDTLS_SSL_MINOR_VERSION_3
+#define SSL_MIN_MAJOR_VERSION MBEDTLS_SSL_MIN_MAJOR_VERSION
+#define SSL_MIN_MINOR_VERSION MBEDTLS_SSL_MIN_MINOR_VERSION
+#define SSL_MSG_ALERT MBEDTLS_SSL_MSG_ALERT
+#define SSL_MSG_APPLICATION_DATA MBEDTLS_SSL_MSG_APPLICATION_DATA
+#define SSL_MSG_CHANGE_CIPHER_SPEC MBEDTLS_SSL_MSG_CHANGE_CIPHER_SPEC
+#define SSL_MSG_HANDSHAKE MBEDTLS_SSL_MSG_HANDSHAKE
+#define SSL_PADDING_ADD MBEDTLS_SSL_PADDING_ADD
+#define SSL_RENEGOTIATION MBEDTLS_SSL_RENEGOTIATION
+#define SSL_RENEGOTIATION_DISABLED MBEDTLS_SSL_RENEGOTIATION_DISABLED
+#define SSL_RENEGOTIATION_DONE MBEDTLS_SSL_RENEGOTIATION_DONE
+#define SSL_RENEGOTIATION_ENABLED MBEDTLS_SSL_RENEGOTIATION_ENABLED
+#define SSL_RENEGOTIATION_NOT_ENFORCED MBEDTLS_SSL_RENEGOTIATION_NOT_ENFORCED
+#define SSL_RENEGOTIATION_PENDING MBEDTLS_SSL_RENEGOTIATION_PENDING
+#define SSL_RENEGO_MAX_RECORDS_DEFAULT MBEDTLS_SSL_RENEGO_MAX_RECORDS_DEFAULT
+#define SSL_RETRANS_FINISHED MBEDTLS_SSL_RETRANS_FINISHED
+#define SSL_RETRANS_PREPARING MBEDTLS_SSL_RETRANS_PREPARING
+#define SSL_RETRANS_SENDING MBEDTLS_SSL_RETRANS_SENDING
+#define SSL_RETRANS_WAITING MBEDTLS_SSL_RETRANS_WAITING
+#define SSL_SECURE_RENEGOTIATION MBEDTLS_SSL_SECURE_RENEGOTIATION
+#define SSL_SERVER_CERTIFICATE MBEDTLS_SSL_SERVER_CERTIFICATE
+#define SSL_SERVER_CHANGE_CIPHER_SPEC MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC
+#define SSL_SERVER_FINISHED MBEDTLS_SSL_SERVER_FINISHED
+#define SSL_SERVER_HELLO MBEDTLS_SSL_SERVER_HELLO
+#define SSL_SERVER_HELLO_DONE MBEDTLS_SSL_SERVER_HELLO_DONE
+#define SSL_SERVER_HELLO_VERIFY_REQUEST_SENT MBEDTLS_SSL_SERVER_HELLO_VERIFY_REQUEST_SENT
+#define SSL_SERVER_KEY_EXCHANGE MBEDTLS_SSL_SERVER_KEY_EXCHANGE
+#define SSL_SERVER_NEW_SESSION_TICKET MBEDTLS_SSL_SERVER_NEW_SESSION_TICKET
+#define SSL_SESSION_TICKETS_DISABLED MBEDTLS_SSL_SESSION_TICKETS_DISABLED
+#define SSL_SESSION_TICKETS_ENABLED MBEDTLS_SSL_SESSION_TICKETS_ENABLED
+#define SSL_SIG_ANON MBEDTLS_SSL_SIG_ANON
+#define SSL_SIG_ECDSA MBEDTLS_SSL_SIG_ECDSA
+#define SSL_SIG_RSA MBEDTLS_SSL_SIG_RSA
+#define SSL_TRANSPORT_DATAGRAM MBEDTLS_SSL_TRANSPORT_DATAGRAM
+#define SSL_TRANSPORT_STREAM MBEDTLS_SSL_TRANSPORT_STREAM
+#define SSL_TRUNCATED_HMAC_LEN MBEDTLS_SSL_TRUNCATED_HMAC_LEN
+#define SSL_TRUNC_HMAC_DISABLED MBEDTLS_SSL_TRUNC_HMAC_DISABLED
+#define SSL_TRUNC_HMAC_ENABLED MBEDTLS_SSL_TRUNC_HMAC_ENABLED
+#define SSL_VERIFY_DATA_MAX_LEN MBEDTLS_SSL_VERIFY_DATA_MAX_LEN
+#define SSL_VERIFY_NONE MBEDTLS_SSL_VERIFY_NONE
+#define SSL_VERIFY_OPTIONAL MBEDTLS_SSL_VERIFY_OPTIONAL
+#define SSL_VERIFY_REQUIRED MBEDTLS_SSL_VERIFY_REQUIRED
+#define TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+#define TLS_DHE_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+#define TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+#define TLS_DHE_PSK_WITH_AES_128_CCM MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM
+#define TLS_DHE_PSK_WITH_AES_128_CCM_8 MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM_8
+#define TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+#define TLS_DHE_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+#define TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+#define TLS_DHE_PSK_WITH_AES_256_CCM MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM
+#define TLS_DHE_PSK_WITH_AES_256_CCM_8 MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM_8
+#define TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+#define TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_DHE_PSK_WITH_NULL_SHA MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA
+#define TLS_DHE_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256
+#define TLS_DHE_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384
+#define TLS_DHE_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+#define TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_DHE_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+#define TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+#define TLS_DHE_RSA_WITH_AES_128_CCM MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM
+#define TLS_DHE_RSA_WITH_AES_128_CCM_8 MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM_8
+#define TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+#define TLS_DHE_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+#define TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+#define TLS_DHE_RSA_WITH_AES_256_CCM MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM
+#define TLS_DHE_RSA_WITH_AES_256_CCM_8 MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM_8
+#define TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+#define TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+#define TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+#define TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+#define TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_DHE_RSA_WITH_DES_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA
+#define TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+#define TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+#define TLS_ECDHE_ECDSA_WITH_AES_128_CCM MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM
+#define TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8
+#define TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+#define TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+#define TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+#define TLS_ECDHE_ECDSA_WITH_AES_256_CCM MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM
+#define TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8
+#define TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_ECDHE_ECDSA_WITH_NULL_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA
+#define TLS_ECDHE_ECDSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+#define TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+#define TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+#define TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+#define TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+#define TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+#define TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_ECDHE_PSK_WITH_NULL_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA
+#define TLS_ECDHE_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256
+#define TLS_ECDHE_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384
+#define TLS_ECDHE_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+#define TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+#define TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+#define TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+#define TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+#define TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+#define TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+#define TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_ECDHE_RSA_WITH_NULL_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA
+#define TLS_ECDHE_RSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+#define TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+#define TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+#define TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+#define TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+#define TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+#define TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+#define TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_ECDH_ECDSA_WITH_NULL_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA
+#define TLS_ECDH_ECDSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+#define TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_ECDH_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+#define TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+#define TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+#define TLS_ECDH_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+#define TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+#define TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+#define TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_ECDH_RSA_WITH_NULL_SHA MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA
+#define TLS_ECDH_RSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+#define TLS_EXT_ALPN MBEDTLS_TLS_EXT_ALPN
+#define TLS_EXT_ENCRYPT_THEN_MAC MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC
+#define TLS_EXT_EXTENDED_MASTER_SECRET MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET
+#define TLS_EXT_MAX_FRAGMENT_LENGTH MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH
+#define TLS_EXT_RENEGOTIATION_INFO MBEDTLS_TLS_EXT_RENEGOTIATION_INFO
+#define TLS_EXT_SERVERNAME MBEDTLS_TLS_EXT_SERVERNAME
+#define TLS_EXT_SERVERNAME_HOSTNAME MBEDTLS_TLS_EXT_SERVERNAME_HOSTNAME
+#define TLS_EXT_SESSION_TICKET MBEDTLS_TLS_EXT_SESSION_TICKET
+#define TLS_EXT_SIG_ALG MBEDTLS_TLS_EXT_SIG_ALG
+#define TLS_EXT_SUPPORTED_ELLIPTIC_CURVES MBEDTLS_TLS_EXT_SUPPORTED_ELLIPTIC_CURVES
+#define TLS_EXT_SUPPORTED_POINT_FORMATS MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS
+#define TLS_EXT_SUPPORTED_POINT_FORMATS_PRESENT MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS_PRESENT
+#define TLS_EXT_TRUNCATED_HMAC MBEDTLS_TLS_EXT_TRUNCATED_HMAC
+#define TLS_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+#define TLS_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+#define TLS_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+#define TLS_PSK_WITH_AES_128_CCM MBEDTLS_TLS_PSK_WITH_AES_128_CCM
+#define TLS_PSK_WITH_AES_128_CCM_8 MBEDTLS_TLS_PSK_WITH_AES_128_CCM_8
+#define TLS_PSK_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+#define TLS_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+#define TLS_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+#define TLS_PSK_WITH_AES_256_CCM MBEDTLS_TLS_PSK_WITH_AES_256_CCM
+#define TLS_PSK_WITH_AES_256_CCM_8 MBEDTLS_TLS_PSK_WITH_AES_256_CCM_8
+#define TLS_PSK_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+#define TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_PSK_WITH_NULL_SHA MBEDTLS_TLS_PSK_WITH_NULL_SHA
+#define TLS_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_PSK_WITH_NULL_SHA256
+#define TLS_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_PSK_WITH_NULL_SHA384
+#define TLS_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+#define TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+#define TLS_RSA_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+#define TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+#define TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+#define TLS_RSA_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+#define TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+#define TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+#define TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_RSA_PSK_WITH_NULL_SHA MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA
+#define TLS_RSA_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256
+#define TLS_RSA_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384
+#define TLS_RSA_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+#define TLS_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+#define TLS_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+#define TLS_RSA_WITH_AES_128_CCM MBEDTLS_TLS_RSA_WITH_AES_128_CCM
+#define TLS_RSA_WITH_AES_128_CCM_8 MBEDTLS_TLS_RSA_WITH_AES_128_CCM_8
+#define TLS_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+#define TLS_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+#define TLS_RSA_WITH_AES_256_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+#define TLS_RSA_WITH_AES_256_CCM MBEDTLS_TLS_RSA_WITH_AES_256_CCM
+#define TLS_RSA_WITH_AES_256_CCM_8 MBEDTLS_TLS_RSA_WITH_AES_256_CCM_8
+#define TLS_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+#define TLS_RSA_WITH_CAMELLIA_128_CBC_SHA MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+#define TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_RSA_WITH_CAMELLIA_256_CBC_SHA MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+#define TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+#define TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_RSA_WITH_DES_CBC_SHA MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA
+#define TLS_RSA_WITH_NULL_MD5 MBEDTLS_TLS_RSA_WITH_NULL_MD5
+#define TLS_RSA_WITH_NULL_SHA MBEDTLS_TLS_RSA_WITH_NULL_SHA
+#define TLS_RSA_WITH_NULL_SHA256 MBEDTLS_TLS_RSA_WITH_NULL_SHA256
+#define TLS_RSA_WITH_RC4_128_MD5 MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+#define TLS_RSA_WITH_RC4_128_SHA MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+#define X509_CRT_VERSION_1 MBEDTLS_X509_CRT_VERSION_1
+#define X509_CRT_VERSION_2 MBEDTLS_X509_CRT_VERSION_2
+#define X509_CRT_VERSION_3 MBEDTLS_X509_CRT_VERSION_3
+#define X509_FORMAT_DER MBEDTLS_X509_FORMAT_DER
+#define X509_FORMAT_PEM MBEDTLS_X509_FORMAT_PEM
+#define X509_MAX_DN_NAME_SIZE MBEDTLS_X509_MAX_DN_NAME_SIZE
+#define X509_RFC5280_MAX_SERIAL_LEN MBEDTLS_X509_RFC5280_MAX_SERIAL_LEN
+#define X509_RFC5280_UTC_TIME_LEN MBEDTLS_X509_RFC5280_UTC_TIME_LEN
+#define XTEA_DECRYPT MBEDTLS_XTEA_DECRYPT
+#define XTEA_ENCRYPT MBEDTLS_XTEA_ENCRYPT
+#define _asn1_bitstring mbedtls_asn1_bitstring
+#define _asn1_buf mbedtls_asn1_buf
+#define _asn1_named_data mbedtls_asn1_named_data
+#define _asn1_sequence mbedtls_asn1_sequence
+#define _ssl_cache_context mbedtls_ssl_cache_context
+#define _ssl_cache_entry mbedtls_ssl_cache_entry
+#define _ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t
+#define _ssl_context mbedtls_ssl_context
+#define _ssl_flight_item mbedtls_ssl_flight_item
+#define _ssl_handshake_params mbedtls_ssl_handshake_params
+#define _ssl_key_cert mbedtls_ssl_key_cert
+#define _ssl_premaster_secret mbedtls_ssl_premaster_secret
+#define _ssl_session mbedtls_ssl_session
+#define _ssl_transform mbedtls_ssl_transform
+#define _x509_crl mbedtls_x509_crl
+#define _x509_crl_entry mbedtls_x509_crl_entry
+#define _x509_crt mbedtls_x509_crt
+#define _x509_csr mbedtls_x509_csr
+#define _x509_time mbedtls_x509_time
+#define _x509write_cert mbedtls_x509write_cert
+#define _x509write_csr mbedtls_x509write_csr
+#define aes_context mbedtls_aes_context
+#define aes_crypt_cbc mbedtls_aes_crypt_cbc
+#define aes_crypt_cfb128 mbedtls_aes_crypt_cfb128
+#define aes_crypt_cfb8 mbedtls_aes_crypt_cfb8
+#define aes_crypt_ctr mbedtls_aes_crypt_ctr
+#define aes_crypt_ecb mbedtls_aes_crypt_ecb
+#define aes_free mbedtls_aes_free
+#define aes_init mbedtls_aes_init
+#define aes_self_test mbedtls_aes_self_test
+#define aes_setkey_dec mbedtls_aes_setkey_dec
+#define aes_setkey_enc mbedtls_aes_setkey_enc
+#define aesni_crypt_ecb mbedtls_aesni_crypt_ecb
+#define aesni_gcm_mult mbedtls_aesni_gcm_mult
+#define aesni_inverse_key mbedtls_aesni_inverse_key
+#define aesni_setkey_enc mbedtls_aesni_setkey_enc
+#define aesni_supports mbedtls_aesni_has_support
+#define alarmed mbedtls_timing_alarmed
+#define arc4_context mbedtls_arc4_context
+#define arc4_crypt mbedtls_arc4_crypt
+#define arc4_free mbedtls_arc4_free
+#define arc4_init mbedtls_arc4_init
+#define arc4_self_test mbedtls_arc4_self_test
+#define arc4_setup mbedtls_arc4_setup
+#define asn1_bitstring mbedtls_asn1_bitstring
+#define asn1_buf mbedtls_asn1_buf
+#define asn1_find_named_data mbedtls_asn1_find_named_data
+#define asn1_free_named_data mbedtls_asn1_free_named_data
+#define asn1_free_named_data_list mbedtls_asn1_free_named_data_list
+#define asn1_get_alg mbedtls_asn1_get_alg
+#define asn1_get_alg_null mbedtls_asn1_get_alg_null
+#define asn1_get_bitstring mbedtls_asn1_get_bitstring
+#define asn1_get_bitstring_null mbedtls_asn1_get_bitstring_null
+#define asn1_get_bool mbedtls_asn1_get_bool
+#define asn1_get_int mbedtls_asn1_get_int
+#define asn1_get_len mbedtls_asn1_get_len
+#define asn1_get_mpi mbedtls_asn1_get_mpi
+#define asn1_get_sequence_of mbedtls_asn1_get_sequence_of
+#define asn1_get_tag mbedtls_asn1_get_tag
+#define asn1_named_data mbedtls_asn1_named_data
+#define asn1_sequence mbedtls_asn1_sequence
+#define asn1_store_named_data mbedtls_asn1_store_named_data
+#define asn1_write_algorithm_identifier mbedtls_asn1_write_algorithm_identifier
+#define asn1_write_bitstring mbedtls_asn1_write_bitstring
+#define asn1_write_bool mbedtls_asn1_write_bool
+#define asn1_write_ia5_string mbedtls_asn1_write_ia5_string
+#define asn1_write_int mbedtls_asn1_write_int
+#define asn1_write_len mbedtls_asn1_write_len
+#define asn1_write_mpi mbedtls_asn1_write_mpi
+#define asn1_write_null mbedtls_asn1_write_null
+#define asn1_write_octet_string mbedtls_asn1_write_octet_string
+#define asn1_write_oid mbedtls_asn1_write_oid
+#define asn1_write_printable_string mbedtls_asn1_write_printable_string
+#define asn1_write_raw_buffer mbedtls_asn1_write_raw_buffer
+#define asn1_write_tag mbedtls_asn1_write_tag
+#define base64_decode mbedtls_base64_decode
+#define base64_encode mbedtls_base64_encode
+#define base64_self_test mbedtls_base64_self_test
+#define blowfish_context mbedtls_blowfish_context
+#define blowfish_crypt_cbc mbedtls_blowfish_crypt_cbc
+#define blowfish_crypt_cfb64 mbedtls_blowfish_crypt_cfb64
+#define blowfish_crypt_ctr mbedtls_blowfish_crypt_ctr
+#define blowfish_crypt_ecb mbedtls_blowfish_crypt_ecb
+#define blowfish_free mbedtls_blowfish_free
+#define blowfish_init mbedtls_blowfish_init
+#define blowfish_setkey mbedtls_blowfish_setkey
+#define camellia_context mbedtls_camellia_context
+#define camellia_crypt_cbc mbedtls_camellia_crypt_cbc
+#define camellia_crypt_cfb128 mbedtls_camellia_crypt_cfb128
+#define camellia_crypt_ctr mbedtls_camellia_crypt_ctr
+#define camellia_crypt_ecb mbedtls_camellia_crypt_ecb
+#define camellia_free mbedtls_camellia_free
+#define camellia_init mbedtls_camellia_init
+#define camellia_self_test mbedtls_camellia_self_test
+#define camellia_setkey_dec mbedtls_camellia_setkey_dec
+#define camellia_setkey_enc mbedtls_camellia_setkey_enc
+#define ccm_auth_decrypt mbedtls_ccm_auth_decrypt
+#define ccm_context mbedtls_ccm_context
+#define ccm_encrypt_and_tag mbedtls_ccm_encrypt_and_tag
+#define ccm_free mbedtls_ccm_free
+#define ccm_init mbedtls_ccm_init
+#define ccm_self_test mbedtls_ccm_self_test
+#define cipher_auth_decrypt mbedtls_cipher_auth_decrypt
+#define cipher_auth_encrypt mbedtls_cipher_auth_encrypt
+#define cipher_base_t mbedtls_cipher_base_t
+#define cipher_check_tag mbedtls_cipher_check_tag
+#define cipher_context_t mbedtls_cipher_context_t
+#define cipher_crypt mbedtls_cipher_crypt
+#define cipher_definition_t mbedtls_cipher_definition_t
+#define cipher_definitions mbedtls_cipher_definitions
+#define cipher_finish mbedtls_cipher_finish
+#define cipher_free mbedtls_cipher_free
+#define cipher_get_block_size mbedtls_cipher_get_block_size
+#define cipher_get_cipher_mode mbedtls_cipher_get_cipher_mode
+#define cipher_get_iv_size mbedtls_cipher_get_iv_size
+#define cipher_get_key_size mbedtls_cipher_get_key_bitlen
+#define cipher_get_name mbedtls_cipher_get_name
+#define cipher_get_operation mbedtls_cipher_get_operation
+#define cipher_get_type mbedtls_cipher_get_type
+#define cipher_id_t mbedtls_cipher_id_t
+#define cipher_info_from_string mbedtls_cipher_info_from_string
+#define cipher_info_from_type mbedtls_cipher_info_from_type
+#define cipher_info_from_values mbedtls_cipher_info_from_values
+#define cipher_info_t mbedtls_cipher_info_t
+#define cipher_init mbedtls_cipher_init
+#define cipher_init_ctx mbedtls_cipher_setup
+#define cipher_list mbedtls_cipher_list
+#define cipher_mode_t mbedtls_cipher_mode_t
+#define cipher_padding_t mbedtls_cipher_padding_t
+#define cipher_reset mbedtls_cipher_reset
+#define cipher_set_iv mbedtls_cipher_set_iv
+#define cipher_set_padding_mode mbedtls_cipher_set_padding_mode
+#define cipher_setkey mbedtls_cipher_setkey
+#define cipher_type_t mbedtls_cipher_type_t
+#define cipher_update mbedtls_cipher_update
+#define cipher_update_ad mbedtls_cipher_update_ad
+#define cipher_write_tag mbedtls_cipher_write_tag
+#define ctr_drbg_context mbedtls_ctr_drbg_context
+#define ctr_drbg_free mbedtls_ctr_drbg_free
+#define ctr_drbg_init mbedtls_ctr_drbg_init
+#define ctr_drbg_random mbedtls_ctr_drbg_random
+#define ctr_drbg_random_with_add mbedtls_ctr_drbg_random_with_add
+#define ctr_drbg_reseed mbedtls_ctr_drbg_reseed
+#define ctr_drbg_self_test mbedtls_ctr_drbg_self_test
+#define ctr_drbg_set_entropy_len mbedtls_ctr_drbg_set_entropy_len
+#define ctr_drbg_set_prediction_resistance mbedtls_ctr_drbg_set_prediction_resistance
+#define ctr_drbg_set_reseed_interval mbedtls_ctr_drbg_set_reseed_interval
+#define ctr_drbg_update mbedtls_ctr_drbg_update
+#define ctr_drbg_update_seed_file mbedtls_ctr_drbg_update_seed_file
+#define ctr_drbg_write_seed_file mbedtls_ctr_drbg_write_seed_file
+#define debug_print_buf mbedtls_debug_print_buf
+#define debug_print_crt mbedtls_debug_print_crt
+#define debug_print_ecp mbedtls_debug_print_ecp
+#define debug_print_mpi mbedtls_debug_print_mpi
+#define debug_print_msg mbedtls_debug_print_msg
+#define debug_print_ret mbedtls_debug_print_ret
+#define debug_set_threshold mbedtls_debug_set_threshold
+#define des3_context mbedtls_des3_context
+#define des3_crypt_cbc mbedtls_des3_crypt_cbc
+#define des3_crypt_ecb mbedtls_des3_crypt_ecb
+#define des3_free mbedtls_des3_free
+#define des3_init mbedtls_des3_init
+#define des3_set2key_dec mbedtls_des3_set2key_dec
+#define des3_set2key_enc mbedtls_des3_set2key_enc
+#define des3_set3key_dec mbedtls_des3_set3key_dec
+#define des3_set3key_enc mbedtls_des3_set3key_enc
+#define des_context mbedtls_des_context
+#define des_crypt_cbc mbedtls_des_crypt_cbc
+#define des_crypt_ecb mbedtls_des_crypt_ecb
+#define des_free mbedtls_des_free
+#define des_init mbedtls_des_init
+#define des_key_check_key_parity mbedtls_des_key_check_key_parity
+#define des_key_check_weak mbedtls_des_key_check_weak
+#define des_key_set_parity mbedtls_des_key_set_parity
+#define des_self_test mbedtls_des_self_test
+#define des_setkey_dec mbedtls_des_setkey_dec
+#define des_setkey_enc mbedtls_des_setkey_enc
+#define dhm_calc_secret mbedtls_dhm_calc_secret
+#define dhm_context mbedtls_dhm_context
+#define dhm_free mbedtls_dhm_free
+#define dhm_init mbedtls_dhm_init
+#define dhm_make_params mbedtls_dhm_make_params
+#define dhm_make_public mbedtls_dhm_make_public
+#define dhm_parse_dhm mbedtls_dhm_parse_dhm
+#define dhm_parse_dhmfile mbedtls_dhm_parse_dhmfile
+#define dhm_read_params mbedtls_dhm_read_params
+#define dhm_read_public mbedtls_dhm_read_public
+#define dhm_self_test mbedtls_dhm_self_test
+#define ecdh_calc_secret mbedtls_ecdh_calc_secret
+#define ecdh_compute_shared mbedtls_ecdh_compute_shared
+#define ecdh_context mbedtls_ecdh_context
+#define ecdh_free mbedtls_ecdh_free
+#define ecdh_gen_public mbedtls_ecdh_gen_public
+#define ecdh_get_params mbedtls_ecdh_get_params
+#define ecdh_init mbedtls_ecdh_init
+#define ecdh_make_params mbedtls_ecdh_make_params
+#define ecdh_make_public mbedtls_ecdh_make_public
+#define ecdh_read_params mbedtls_ecdh_read_params
+#define ecdh_read_public mbedtls_ecdh_read_public
+#define ecdh_side mbedtls_ecdh_side
+#define ecdsa_context mbedtls_ecdsa_context
+#define ecdsa_free mbedtls_ecdsa_free
+#define ecdsa_from_keypair mbedtls_ecdsa_from_keypair
+#define ecdsa_genkey mbedtls_ecdsa_genkey
+#define ecdsa_info mbedtls_ecdsa_info
+#define ecdsa_init mbedtls_ecdsa_init
+#define ecdsa_read_signature mbedtls_ecdsa_read_signature
+#define ecdsa_sign mbedtls_ecdsa_sign
+#define ecdsa_sign_det mbedtls_ecdsa_sign_det
+#define ecdsa_verify mbedtls_ecdsa_verify
+#define ecdsa_write_signature mbedtls_ecdsa_write_signature
+#define ecdsa_write_signature_det mbedtls_ecdsa_write_signature_det
+#define eckey_info mbedtls_eckey_info
+#define eckeydh_info mbedtls_eckeydh_info
+#define ecp_check_privkey mbedtls_ecp_check_privkey
+#define ecp_check_pub_priv mbedtls_ecp_check_pub_priv
+#define ecp_check_pubkey mbedtls_ecp_check_pubkey
+#define ecp_copy mbedtls_ecp_copy
+#define ecp_curve_info mbedtls_ecp_curve_info
+#define ecp_curve_info_from_grp_id mbedtls_ecp_curve_info_from_grp_id
+#define ecp_curve_info_from_name mbedtls_ecp_curve_info_from_name
+#define ecp_curve_info_from_tls_id mbedtls_ecp_curve_info_from_tls_id
+#define ecp_curve_list mbedtls_ecp_curve_list
+#define ecp_gen_key mbedtls_ecp_gen_key
+#define ecp_gen_keypair mbedtls_ecp_gen_keypair
+#define ecp_group mbedtls_ecp_group
+#define ecp_group_copy mbedtls_ecp_group_copy
+#define ecp_group_free mbedtls_ecp_group_free
+#define ecp_group_id mbedtls_ecp_group_id
+#define ecp_group_init mbedtls_ecp_group_init
+#define ecp_grp_id_list mbedtls_ecp_grp_id_list
+#define ecp_is_zero mbedtls_ecp_is_zero
+#define ecp_keypair mbedtls_ecp_keypair
+#define ecp_keypair_free mbedtls_ecp_keypair_free
+#define ecp_keypair_init mbedtls_ecp_keypair_init
+#define ecp_mul mbedtls_ecp_mul
+#define ecp_point mbedtls_ecp_point
+#define ecp_point_free mbedtls_ecp_point_free
+#define ecp_point_init mbedtls_ecp_point_init
+#define ecp_point_read_binary mbedtls_ecp_point_read_binary
+#define ecp_point_read_string mbedtls_ecp_point_read_string
+#define ecp_point_write_binary mbedtls_ecp_point_write_binary
+#define ecp_self_test mbedtls_ecp_self_test
+#define ecp_set_zero mbedtls_ecp_set_zero
+#define ecp_tls_read_group mbedtls_ecp_tls_read_group
+#define ecp_tls_read_point mbedtls_ecp_tls_read_point
+#define ecp_tls_write_group mbedtls_ecp_tls_write_group
+#define ecp_tls_write_point mbedtls_ecp_tls_write_point
+#define ecp_use_known_dp mbedtls_ecp_group_load
+#define entropy_add_source mbedtls_entropy_add_source
+#define entropy_context mbedtls_entropy_context
+#define entropy_free mbedtls_entropy_free
+#define entropy_func mbedtls_entropy_func
+#define entropy_gather mbedtls_entropy_gather
+#define entropy_init mbedtls_entropy_init
+#define entropy_self_test mbedtls_entropy_self_test
+#define entropy_update_manual mbedtls_entropy_update_manual
+#define entropy_update_seed_file mbedtls_entropy_update_seed_file
+#define entropy_write_seed_file mbedtls_entropy_write_seed_file
+#define error_strerror mbedtls_strerror
+#define f_source_ptr mbedtls_entropy_f_source_ptr
+#define gcm_auth_decrypt mbedtls_gcm_auth_decrypt
+#define gcm_context mbedtls_gcm_context
+#define gcm_crypt_and_tag mbedtls_gcm_crypt_and_tag
+#define gcm_finish mbedtls_gcm_finish
+#define gcm_free mbedtls_gcm_free
+#define gcm_init mbedtls_gcm_init
+#define gcm_self_test mbedtls_gcm_self_test
+#define gcm_starts mbedtls_gcm_starts
+#define gcm_update mbedtls_gcm_update
+#define get_timer mbedtls_timing_get_timer
+#define hardclock mbedtls_timing_hardclock
+#define hardclock_poll mbedtls_hardclock_poll
+#define havege_free mbedtls_havege_free
+#define havege_init mbedtls_havege_init
+#define havege_poll mbedtls_havege_poll
+#define havege_random mbedtls_havege_random
+#define havege_state mbedtls_havege_state
+#define hmac_drbg_context mbedtls_hmac_drbg_context
+#define hmac_drbg_free mbedtls_hmac_drbg_free
+#define hmac_drbg_init mbedtls_hmac_drbg_init
+#define hmac_drbg_random mbedtls_hmac_drbg_random
+#define hmac_drbg_random_with_add mbedtls_hmac_drbg_random_with_add
+#define hmac_drbg_reseed mbedtls_hmac_drbg_reseed
+#define hmac_drbg_self_test mbedtls_hmac_drbg_self_test
+#define hmac_drbg_set_entropy_len mbedtls_hmac_drbg_set_entropy_len
+#define hmac_drbg_set_prediction_resistance mbedtls_hmac_drbg_set_prediction_resistance
+#define hmac_drbg_set_reseed_interval mbedtls_hmac_drbg_set_reseed_interval
+#define hmac_drbg_update mbedtls_hmac_drbg_update
+#define hmac_drbg_update_seed_file mbedtls_hmac_drbg_update_seed_file
+#define hmac_drbg_write_seed_file mbedtls_hmac_drbg_write_seed_file
+#define hr_time mbedtls_timing_hr_time
+#define key_exchange_type_t mbedtls_key_exchange_type_t
+#define md mbedtls_md
+#define md2 mbedtls_md2
+#define md2_context mbedtls_md2_context
+#define md2_finish mbedtls_md2_finish
+#define md2_free mbedtls_md2_free
+#define md2_info mbedtls_md2_info
+#define md2_init mbedtls_md2_init
+#define md2_process mbedtls_md2_process
+#define md2_self_test mbedtls_md2_self_test
+#define md2_starts mbedtls_md2_starts
+#define md2_update mbedtls_md2_update
+#define md4 mbedtls_md4
+#define md4_context mbedtls_md4_context
+#define md4_finish mbedtls_md4_finish
+#define md4_free mbedtls_md4_free
+#define md4_info mbedtls_md4_info
+#define md4_init mbedtls_md4_init
+#define md4_process mbedtls_md4_process
+#define md4_self_test mbedtls_md4_self_test
+#define md4_starts mbedtls_md4_starts
+#define md4_update mbedtls_md4_update
+#define md5 mbedtls_md5
+#define md5_context mbedtls_md5_context
+#define md5_finish mbedtls_md5_finish
+#define md5_free mbedtls_md5_free
+#define md5_info mbedtls_md5_info
+#define md5_init mbedtls_md5_init
+#define md5_process mbedtls_md5_process
+#define md5_self_test mbedtls_md5_self_test
+#define md5_starts mbedtls_md5_starts
+#define md5_update mbedtls_md5_update
+#define md_context_t mbedtls_md_context_t
+#define md_file mbedtls_md_file
+#define md_finish mbedtls_md_finish
+#define md_free mbedtls_md_free
+#define md_get_name mbedtls_md_get_name
+#define md_get_size mbedtls_md_get_size
+#define md_get_type mbedtls_md_get_type
+#define md_hmac mbedtls_md_hmac
+#define md_hmac_finish mbedtls_md_hmac_finish
+#define md_hmac_reset mbedtls_md_hmac_reset
+#define md_hmac_starts mbedtls_md_hmac_starts
+#define md_hmac_update mbedtls_md_hmac_update
+#define md_info_from_string mbedtls_md_info_from_string
+#define md_info_from_type mbedtls_md_info_from_type
+#define md_info_t mbedtls_md_info_t
+#define md_init mbedtls_md_init
+#define md_init_ctx mbedtls_md_init_ctx
+#define md_list mbedtls_md_list
+#define md_process mbedtls_md_process
+#define md_starts mbedtls_md_starts
+#define md_type_t mbedtls_md_type_t
+#define md_update mbedtls_md_update
+#define memory_buffer_alloc_cur_get mbedtls_memory_buffer_alloc_cur_get
+#define memory_buffer_alloc_free mbedtls_memory_buffer_alloc_free
+#define memory_buffer_alloc_init mbedtls_memory_buffer_alloc_init
+#define memory_buffer_alloc_max_get mbedtls_memory_buffer_alloc_max_get
+#define memory_buffer_alloc_max_reset mbedtls_memory_buffer_alloc_max_reset
+#define memory_buffer_alloc_self_test mbedtls_memory_buffer_alloc_self_test
+#define memory_buffer_alloc_status mbedtls_memory_buffer_alloc_status
+#define memory_buffer_alloc_verify mbedtls_memory_buffer_alloc_verify
+#define memory_buffer_set_verify mbedtls_memory_buffer_set_verify
+#define mpi mbedtls_mpi
+#define mpi_add_abs mbedtls_mpi_add_abs
+#define mpi_add_int mbedtls_mpi_add_int
+#define mpi_add_mpi mbedtls_mpi_add_mpi
+#define mpi_cmp_abs mbedtls_mpi_cmp_abs
+#define mpi_cmp_int mbedtls_mpi_cmp_int
+#define mpi_cmp_mpi mbedtls_mpi_cmp_mpi
+#define mpi_copy mbedtls_mpi_copy
+#define mpi_div_int mbedtls_mpi_div_int
+#define mpi_div_mpi mbedtls_mpi_div_mpi
+#define mpi_exp_mod mbedtls_mpi_exp_mod
+#define mpi_fill_random mbedtls_mpi_fill_random
+#define mpi_free mbedtls_mpi_free
+#define mpi_gcd mbedtls_mpi_gcd
+#define mpi_gen_prime mbedtls_mpi_gen_prime
+#define mpi_get_bit mbedtls_mpi_get_bit
+#define mpi_grow mbedtls_mpi_grow
+#define mpi_init mbedtls_mpi_init
+#define mpi_inv_mod mbedtls_mpi_inv_mod
+#define mpi_is_prime mbedtls_mpi_is_prime
+#define mpi_lsb mbedtls_mpi_lsb
+#define mpi_lset mbedtls_mpi_lset
+#define mpi_mod_int mbedtls_mpi_mod_int
+#define mpi_mod_mpi mbedtls_mpi_mod_mpi
+#define mpi_msb mbedtls_mpi_bitlen
+#define mpi_mul_int mbedtls_mpi_mul_int
+#define mpi_mul_mpi mbedtls_mpi_mul_mpi
+#define mpi_read_binary mbedtls_mpi_read_binary
+#define mpi_read_file mbedtls_mpi_read_file
+#define mpi_read_string mbedtls_mpi_read_string
+#define mpi_safe_cond_assign mbedtls_mpi_safe_cond_assign
+#define mpi_safe_cond_swap mbedtls_mpi_safe_cond_swap
+#define mpi_self_test mbedtls_mpi_self_test
+#define mpi_set_bit mbedtls_mpi_set_bit
+#define mpi_shift_l mbedtls_mpi_shift_l
+#define mpi_shift_r mbedtls_mpi_shift_r
+#define mpi_shrink mbedtls_mpi_shrink
+#define mpi_size mbedtls_mpi_size
+#define mpi_sub_abs mbedtls_mpi_sub_abs
+#define mpi_sub_int mbedtls_mpi_sub_int
+#define mpi_sub_mpi mbedtls_mpi_sub_mpi
+#define mpi_swap mbedtls_mpi_swap
+#define mpi_write_binary mbedtls_mpi_write_binary
+#define mpi_write_file mbedtls_mpi_write_file
+#define mpi_write_string mbedtls_mpi_write_string
+#define net_accept mbedtls_net_accept
+#define net_bind mbedtls_net_bind
+#define net_close mbedtls_net_free
+#define net_connect mbedtls_net_connect
+#define net_recv mbedtls_net_recv
+#define net_recv_timeout mbedtls_net_recv_timeout
+#define net_send mbedtls_net_send
+#define net_set_block mbedtls_net_set_block
+#define net_set_nonblock mbedtls_net_set_nonblock
+#define net_usleep mbedtls_net_usleep
+#define oid_descriptor_t mbedtls_oid_descriptor_t
+#define oid_get_attr_short_name mbedtls_oid_get_attr_short_name
+#define oid_get_cipher_alg mbedtls_oid_get_cipher_alg
+#define oid_get_ec_grp mbedtls_oid_get_ec_grp
+#define oid_get_extended_key_usage mbedtls_oid_get_extended_key_usage
+#define oid_get_md_alg mbedtls_oid_get_md_alg
+#define oid_get_numeric_string mbedtls_oid_get_numeric_string
+#define oid_get_oid_by_ec_grp mbedtls_oid_get_oid_by_ec_grp
+#define oid_get_oid_by_md mbedtls_oid_get_oid_by_md
+#define oid_get_oid_by_pk_alg mbedtls_oid_get_oid_by_pk_alg
+#define oid_get_oid_by_sig_alg mbedtls_oid_get_oid_by_sig_alg
+#define oid_get_pk_alg mbedtls_oid_get_pk_alg
+#define oid_get_pkcs12_pbe_alg mbedtls_oid_get_pkcs12_pbe_alg
+#define oid_get_sig_alg mbedtls_oid_get_sig_alg
+#define oid_get_sig_alg_desc mbedtls_oid_get_sig_alg_desc
+#define oid_get_x509_ext_type mbedtls_oid_get_x509_ext_type
+#define operation_t mbedtls_operation_t
+#define padlock_supports mbedtls_padlock_has_support
+#define padlock_xcryptcbc mbedtls_padlock_xcryptcbc
+#define padlock_xcryptecb mbedtls_padlock_xcryptecb
+#define pem_context mbedtls_pem_context
+#define pem_free mbedtls_pem_free
+#define pem_init mbedtls_pem_init
+#define pem_read_buffer mbedtls_pem_read_buffer
+#define pem_write_buffer mbedtls_pem_write_buffer
+#define pk_can_do mbedtls_pk_can_do
+#define pk_check_pair mbedtls_pk_check_pair
+#define pk_context mbedtls_pk_context
+#define pk_debug mbedtls_pk_debug
+#define pk_debug_item mbedtls_pk_debug_item
+#define pk_debug_type mbedtls_pk_debug_type
+#define pk_decrypt mbedtls_pk_decrypt
+#define pk_ec mbedtls_pk_ec
+#define pk_encrypt mbedtls_pk_encrypt
+#define pk_free mbedtls_pk_free
+#define pk_get_len mbedtls_pk_get_len
+#define pk_get_name mbedtls_pk_get_name
+#define pk_get_size mbedtls_pk_get_bitlen
+#define pk_get_type mbedtls_pk_get_type
+#define pk_info_from_type mbedtls_pk_info_from_type
+#define pk_info_t mbedtls_pk_info_t
+#define pk_init mbedtls_pk_init
+#define pk_init_ctx mbedtls_pk_setup
+#define pk_init_ctx_rsa_alt mbedtls_pk_setup_rsa_alt
+#define pk_load_file mbedtls_pk_load_file
+#define pk_parse_key mbedtls_pk_parse_key
+#define pk_parse_keyfile mbedtls_pk_parse_keyfile
+#define pk_parse_public_key mbedtls_pk_parse_public_key
+#define pk_parse_public_keyfile mbedtls_pk_parse_public_keyfile
+#define pk_parse_subpubkey mbedtls_pk_parse_subpubkey
+#define pk_rsa mbedtls_pk_rsa
+#define pk_rsa_alt_decrypt_func mbedtls_pk_rsa_alt_decrypt_func
+#define pk_rsa_alt_key_len_func mbedtls_pk_rsa_alt_key_len_func
+#define pk_rsa_alt_sign_func mbedtls_pk_rsa_alt_sign_func
+#define pk_rsassa_pss_options mbedtls_pk_rsassa_pss_options
+#define pk_sign mbedtls_pk_sign
+#define pk_type_t mbedtls_pk_type_t
+#define pk_verify mbedtls_pk_verify
+#define pk_verify_ext mbedtls_pk_verify_ext
+#define pk_write_key_der mbedtls_pk_write_key_der
+#define pk_write_key_pem mbedtls_pk_write_key_pem
+#define pk_write_pubkey mbedtls_pk_write_pubkey
+#define pk_write_pubkey_der mbedtls_pk_write_pubkey_der
+#define pk_write_pubkey_pem mbedtls_pk_write_pubkey_pem
+#define pkcs11_context mbedtls_pkcs11_context
+#define pkcs11_decrypt mbedtls_pkcs11_decrypt
+#define pkcs11_priv_key_free mbedtls_pkcs11_priv_key_free
+#define pkcs11_priv_key_init mbedtls_pkcs11_priv_key_bind
+#define pkcs11_sign mbedtls_pkcs11_sign
+#define pkcs11_x509_cert_init mbedtls_pkcs11_x509_cert_bind
+#define pkcs12_derivation mbedtls_pkcs12_derivation
+#define pkcs12_pbe mbedtls_pkcs12_pbe
+#define pkcs12_pbe_sha1_rc4_128 mbedtls_pkcs12_pbe_sha1_rc4_128
+#define pkcs5_pbes2 mbedtls_pkcs5_pbes2
+#define pkcs5_pbkdf2_hmac mbedtls_pkcs5_pbkdf2_hmac
+#define pkcs5_self_test mbedtls_pkcs5_self_test
+#define platform_entropy_poll mbedtls_platform_entropy_poll
+#define platform_set_exit mbedtls_platform_set_exit
+#define platform_set_fprintf mbedtls_platform_set_fprintf
+#define platform_set_printf mbedtls_platform_set_printf
+#define platform_set_snprintf mbedtls_platform_set_snprintf
+#define polarssl_exit mbedtls_exit
+#define polarssl_fprintf mbedtls_fprintf
+#define polarssl_free mbedtls_free
+#define polarssl_mutex_free mbedtls_mutex_free
+#define polarssl_mutex_init mbedtls_mutex_init
+#define polarssl_mutex_lock mbedtls_mutex_lock
+#define polarssl_mutex_unlock mbedtls_mutex_unlock
+#define polarssl_printf mbedtls_printf
+#define polarssl_snprintf mbedtls_snprintf
+#define polarssl_strerror mbedtls_strerror
+#define ripemd160 mbedtls_ripemd160
+#define ripemd160_context mbedtls_ripemd160_context
+#define ripemd160_finish mbedtls_ripemd160_finish
+#define ripemd160_free mbedtls_ripemd160_free
+#define ripemd160_info mbedtls_ripemd160_info
+#define ripemd160_init mbedtls_ripemd160_init
+#define ripemd160_process mbedtls_ripemd160_process
+#define ripemd160_self_test mbedtls_ripemd160_self_test
+#define ripemd160_starts mbedtls_ripemd160_starts
+#define ripemd160_update mbedtls_ripemd160_update
+#define rsa_alt_context mbedtls_rsa_alt_context
+#define rsa_alt_info mbedtls_rsa_alt_info
+#define rsa_check_privkey mbedtls_rsa_check_privkey
+#define rsa_check_pub_priv mbedtls_rsa_check_pub_priv
+#define rsa_check_pubkey mbedtls_rsa_check_pubkey
+#define rsa_context mbedtls_rsa_context
+#define rsa_copy mbedtls_rsa_copy
+#define rsa_free mbedtls_rsa_free
+#define rsa_gen_key mbedtls_rsa_gen_key
+#define rsa_info mbedtls_rsa_info
+#define rsa_init mbedtls_rsa_init
+#define rsa_pkcs1_decrypt mbedtls_rsa_pkcs1_decrypt
+#define rsa_pkcs1_encrypt mbedtls_rsa_pkcs1_encrypt
+#define rsa_pkcs1_sign mbedtls_rsa_pkcs1_sign
+#define rsa_pkcs1_verify mbedtls_rsa_pkcs1_verify
+#define rsa_private mbedtls_rsa_private
+#define rsa_public mbedtls_rsa_public
+#define rsa_rsaes_oaep_decrypt mbedtls_rsa_rsaes_oaep_decrypt
+#define rsa_rsaes_oaep_encrypt mbedtls_rsa_rsaes_oaep_encrypt
+#define rsa_rsaes_pkcs1_v15_decrypt mbedtls_rsa_rsaes_pkcs1_v15_decrypt
+#define rsa_rsaes_pkcs1_v15_encrypt mbedtls_rsa_rsaes_pkcs1_v15_encrypt
+#define rsa_rsassa_pkcs1_v15_sign mbedtls_rsa_rsassa_pkcs1_v15_sign
+#define rsa_rsassa_pkcs1_v15_verify mbedtls_rsa_rsassa_pkcs1_v15_verify
+#define rsa_rsassa_pss_sign mbedtls_rsa_rsassa_pss_sign
+#define rsa_rsassa_pss_verify mbedtls_rsa_rsassa_pss_verify
+#define rsa_rsassa_pss_verify_ext mbedtls_rsa_rsassa_pss_verify_ext
+#define rsa_self_test mbedtls_rsa_self_test
+#define rsa_set_padding mbedtls_rsa_set_padding
+#define safer_memcmp mbedtls_ssl_safer_memcmp
+#define set_alarm mbedtls_set_alarm
+#define sha1 mbedtls_sha1
+#define sha1_context mbedtls_sha1_context
+#define sha1_finish mbedtls_sha1_finish
+#define sha1_free mbedtls_sha1_free
+#define sha1_info mbedtls_sha1_info
+#define sha1_init mbedtls_sha1_init
+#define sha1_process mbedtls_sha1_process
+#define sha1_self_test mbedtls_sha1_self_test
+#define sha1_starts mbedtls_sha1_starts
+#define sha1_update mbedtls_sha1_update
+#define sha224_info mbedtls_sha224_info
+#define sha256 mbedtls_sha256
+#define sha256_context mbedtls_sha256_context
+#define sha256_finish mbedtls_sha256_finish
+#define sha256_free mbedtls_sha256_free
+#define sha256_info mbedtls_sha256_info
+#define sha256_init mbedtls_sha256_init
+#define sha256_process mbedtls_sha256_process
+#define sha256_self_test mbedtls_sha256_self_test
+#define sha256_starts mbedtls_sha256_starts
+#define sha256_update mbedtls_sha256_update
+#define sha384_info mbedtls_sha384_info
+#define sha512 mbedtls_sha512
+#define sha512_context mbedtls_sha512_context
+#define sha512_finish mbedtls_sha512_finish
+#define sha512_free mbedtls_sha512_free
+#define sha512_info mbedtls_sha512_info
+#define sha512_init mbedtls_sha512_init
+#define sha512_process mbedtls_sha512_process
+#define sha512_self_test mbedtls_sha512_self_test
+#define sha512_starts mbedtls_sha512_starts
+#define sha512_update mbedtls_sha512_update
+#define source_state mbedtls_entropy_source_state
+#define ssl_cache_context mbedtls_ssl_cache_context
+#define ssl_cache_entry mbedtls_ssl_cache_entry
+#define ssl_cache_free mbedtls_ssl_cache_free
+#define ssl_cache_get mbedtls_ssl_cache_get
+#define ssl_cache_init mbedtls_ssl_cache_init
+#define ssl_cache_set mbedtls_ssl_cache_set
+#define ssl_cache_set_max_entries mbedtls_ssl_cache_set_max_entries
+#define ssl_cache_set_timeout mbedtls_ssl_cache_set_timeout
+#define ssl_check_cert_usage mbedtls_ssl_check_cert_usage
+#define ssl_ciphersuite_from_id mbedtls_ssl_ciphersuite_from_id
+#define ssl_ciphersuite_from_string mbedtls_ssl_ciphersuite_from_string
+#define ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t
+#define ssl_ciphersuite_uses_ec mbedtls_ssl_ciphersuite_uses_ec
+#define ssl_ciphersuite_uses_psk mbedtls_ssl_ciphersuite_uses_psk
+#define ssl_close_notify mbedtls_ssl_close_notify
+#define ssl_context mbedtls_ssl_context
+#define ssl_cookie_check mbedtls_ssl_cookie_check
+#define ssl_cookie_check_t mbedtls_ssl_cookie_check_t
+#define ssl_cookie_ctx mbedtls_ssl_cookie_ctx
+#define ssl_cookie_free mbedtls_ssl_cookie_free
+#define ssl_cookie_init mbedtls_ssl_cookie_init
+#define ssl_cookie_set_timeout mbedtls_ssl_cookie_set_timeout
+#define ssl_cookie_setup mbedtls_ssl_cookie_setup
+#define ssl_cookie_write mbedtls_ssl_cookie_write
+#define ssl_cookie_write_t mbedtls_ssl_cookie_write_t
+#define ssl_derive_keys mbedtls_ssl_derive_keys
+#define ssl_dtls_replay_check mbedtls_ssl_dtls_replay_check
+#define ssl_dtls_replay_update mbedtls_ssl_dtls_replay_update
+#define ssl_fetch_input mbedtls_ssl_fetch_input
+#define ssl_flight_item mbedtls_ssl_flight_item
+#define ssl_flush_output mbedtls_ssl_flush_output
+#define ssl_free mbedtls_ssl_free
+#define ssl_get_alpn_protocol mbedtls_ssl_get_alpn_protocol
+#define ssl_get_bytes_avail mbedtls_ssl_get_bytes_avail
+#define ssl_get_ciphersuite mbedtls_ssl_get_ciphersuite
+#define ssl_get_ciphersuite_id mbedtls_ssl_get_ciphersuite_id
+#define ssl_get_ciphersuite_name mbedtls_ssl_get_ciphersuite_name
+#define ssl_get_ciphersuite_sig_pk_alg mbedtls_ssl_get_ciphersuite_sig_pk_alg
+#define ssl_get_peer_cert mbedtls_ssl_get_peer_cert
+#define ssl_get_record_expansion mbedtls_ssl_get_record_expansion
+#define ssl_get_session mbedtls_ssl_get_session
+#define ssl_get_verify_result mbedtls_ssl_get_verify_result
+#define ssl_get_version mbedtls_ssl_get_version
+#define ssl_handshake mbedtls_ssl_handshake
+#define ssl_handshake_client_step mbedtls_ssl_handshake_client_step
+#define ssl_handshake_free mbedtls_ssl_handshake_free
+#define ssl_handshake_params mbedtls_ssl_handshake_params
+#define ssl_handshake_server_step mbedtls_ssl_handshake_server_step
+#define ssl_handshake_step mbedtls_ssl_handshake_step
+#define ssl_handshake_wrapup mbedtls_ssl_handshake_wrapup
+#define ssl_hdr_len mbedtls_ssl_hdr_len
+#define ssl_hs_hdr_len mbedtls_ssl_hs_hdr_len
+#define ssl_hw_record_activate mbedtls_ssl_hw_record_activate
+#define ssl_hw_record_finish mbedtls_ssl_hw_record_finish
+#define ssl_hw_record_init mbedtls_ssl_hw_record_init
+#define ssl_hw_record_read mbedtls_ssl_hw_record_read
+#define ssl_hw_record_reset mbedtls_ssl_hw_record_reset
+#define ssl_hw_record_write mbedtls_ssl_hw_record_write
+#define ssl_init mbedtls_ssl_init
+#define ssl_key_cert mbedtls_ssl_key_cert
+#define ssl_legacy_renegotiation mbedtls_ssl_conf_legacy_renegotiation
+#define ssl_list_ciphersuites mbedtls_ssl_list_ciphersuites
+#define ssl_md_alg_from_hash mbedtls_ssl_md_alg_from_hash
+#define ssl_optimize_checksum mbedtls_ssl_optimize_checksum
+#define ssl_own_cert mbedtls_ssl_own_cert
+#define ssl_own_key mbedtls_ssl_own_key
+#define ssl_parse_certificate mbedtls_ssl_parse_certificate
+#define ssl_parse_change_cipher_spec mbedtls_ssl_parse_change_cipher_spec
+#define ssl_parse_finished mbedtls_ssl_parse_finished
+#define ssl_pk_alg_from_sig mbedtls_ssl_pk_alg_from_sig
+#define ssl_pkcs11_decrypt mbedtls_ssl_pkcs11_decrypt
+#define ssl_pkcs11_key_len mbedtls_ssl_pkcs11_key_len
+#define ssl_pkcs11_sign mbedtls_ssl_pkcs11_sign
+#define ssl_psk_derive_premaster mbedtls_ssl_psk_derive_premaster
+#define ssl_read mbedtls_ssl_read
+#define ssl_read_record mbedtls_ssl_read_record
+#define ssl_read_version mbedtls_ssl_read_version
+#define ssl_recv_flight_completed mbedtls_ssl_recv_flight_completed
+#define ssl_renegotiate mbedtls_ssl_renegotiate
+#define ssl_resend mbedtls_ssl_resend
+#define ssl_reset_checksum mbedtls_ssl_reset_checksum
+#define ssl_send_alert_message mbedtls_ssl_send_alert_message
+#define ssl_send_fatal_handshake_failure mbedtls_ssl_send_fatal_handshake_failure
+#define ssl_send_flight_completed mbedtls_ssl_send_flight_completed
+#define ssl_session mbedtls_ssl_session
+#define ssl_session_free mbedtls_ssl_session_free
+#define ssl_session_init mbedtls_ssl_session_init
+#define ssl_session_reset mbedtls_ssl_session_reset
+#define ssl_set_alpn_protocols mbedtls_ssl_conf_alpn_protocols
+#define ssl_set_arc4_support mbedtls_ssl_conf_arc4_support
+#define ssl_set_authmode mbedtls_ssl_conf_authmode
+#define ssl_set_bio mbedtls_ssl_set_bio
+#define ssl_set_ca_chain mbedtls_ssl_conf_ca_chain
+#define ssl_set_cbc_record_splitting mbedtls_ssl_conf_cbc_record_splitting
+#define ssl_set_ciphersuites mbedtls_ssl_conf_ciphersuites
+#define ssl_set_ciphersuites_for_version mbedtls_ssl_conf_ciphersuites_for_version
+#define ssl_set_client_transport_id mbedtls_ssl_set_client_transport_id
+#define ssl_set_curves mbedtls_ssl_conf_curves
+#define ssl_set_dbg mbedtls_ssl_conf_dbg
+#define ssl_set_dh_param mbedtls_ssl_conf_dh_param
+#define ssl_set_dh_param_ctx mbedtls_ssl_conf_dh_param_ctx
+#define ssl_set_dtls_anti_replay mbedtls_ssl_conf_dtls_anti_replay
+#define ssl_set_dtls_badmac_limit mbedtls_ssl_conf_dtls_badmac_limit
+#define ssl_set_dtls_cookies mbedtls_ssl_conf_dtls_cookies
+#define ssl_set_encrypt_then_mac mbedtls_ssl_conf_encrypt_then_mac
+#define ssl_set_endpoint mbedtls_ssl_conf_endpoint
+#define ssl_set_extended_master_secret mbedtls_ssl_conf_extended_master_secret
+#define ssl_set_fallback mbedtls_ssl_conf_fallback
+#define ssl_set_handshake_timeout mbedtls_ssl_conf_handshake_timeout
+#define ssl_set_hostname mbedtls_ssl_set_hostname
+#define ssl_set_max_frag_len mbedtls_ssl_conf_max_frag_len
+#define ssl_set_max_version mbedtls_ssl_conf_max_version
+#define ssl_set_min_version mbedtls_ssl_conf_min_version
+#define ssl_set_own_cert mbedtls_ssl_conf_own_cert
+#define ssl_set_psk mbedtls_ssl_conf_psk
+#define ssl_set_psk_cb mbedtls_ssl_conf_psk_cb
+#define ssl_set_renegotiation mbedtls_ssl_conf_renegotiation
+#define ssl_set_renegotiation_enforced mbedtls_ssl_conf_renegotiation_enforced
+#define ssl_set_renegotiation_period mbedtls_ssl_conf_renegotiation_period
+#define ssl_set_rng mbedtls_ssl_conf_rng
+#define ssl_set_session mbedtls_ssl_set_session
+#define ssl_set_session_cache mbedtls_ssl_conf_session_cache
+#define ssl_set_session_tickets mbedtls_ssl_conf_session_tickets
+#define ssl_set_sni mbedtls_ssl_conf_sni
+#define ssl_set_transport mbedtls_ssl_conf_transport
+#define ssl_set_truncated_hmac mbedtls_ssl_conf_truncated_hmac
+#define ssl_set_verify mbedtls_ssl_conf_verify
+#define ssl_sig_from_pk mbedtls_ssl_sig_from_pk
+#define ssl_states mbedtls_ssl_states
+#define ssl_transform mbedtls_ssl_transform
+#define ssl_transform_free mbedtls_ssl_transform_free
+#define ssl_write mbedtls_ssl_write
+#define ssl_write_certificate mbedtls_ssl_write_certificate
+#define ssl_write_change_cipher_spec mbedtls_ssl_write_change_cipher_spec
+#define ssl_write_finished mbedtls_ssl_write_finished
+#define ssl_write_record mbedtls_ssl_write_record
+#define ssl_write_version mbedtls_ssl_write_version
+#define supported_ciphers mbedtls_cipher_supported
+#define t_sint mbedtls_mpi_sint
+#define t_udbl mbedtls_t_udbl
+#define t_uint mbedtls_mpi_uint
+#define test_ca_crt mbedtls_test_ca_crt
+#define test_ca_crt_ec mbedtls_test_ca_crt_ec
+#define test_ca_crt_rsa mbedtls_test_ca_crt_rsa
+#define test_ca_key mbedtls_test_ca_key
+#define test_ca_key_ec mbedtls_test_ca_key_ec
+#define test_ca_key_rsa mbedtls_test_ca_key_rsa
+#define test_ca_list mbedtls_test_cas_pem
+#define test_ca_pwd mbedtls_test_ca_pwd
+#define test_ca_pwd_ec mbedtls_test_ca_pwd_ec
+#define test_ca_pwd_rsa mbedtls_test_ca_pwd_rsa
+#define test_cli_crt mbedtls_test_cli_crt
+#define test_cli_crt_ec mbedtls_test_cli_crt_ec
+#define test_cli_crt_rsa mbedtls_test_cli_crt_rsa
+#define test_cli_key mbedtls_test_cli_key
+#define test_cli_key_ec mbedtls_test_cli_key_ec
+#define test_cli_key_rsa mbedtls_test_cli_key_rsa
+#define test_srv_crt mbedtls_test_srv_crt
+#define test_srv_crt_ec mbedtls_test_srv_crt_ec
+#define test_srv_crt_rsa mbedtls_test_srv_crt_rsa
+#define test_srv_key mbedtls_test_srv_key
+#define test_srv_key_ec mbedtls_test_srv_key_ec
+#define test_srv_key_rsa mbedtls_test_srv_key_rsa
+#define threading_mutex_t mbedtls_threading_mutex_t
+#define threading_set_alt mbedtls_threading_set_alt
+#define timing_self_test mbedtls_timing_self_test
+#define version_check_feature mbedtls_version_check_feature
+#define version_get_number mbedtls_version_get_number
+#define version_get_string mbedtls_version_get_string
+#define version_get_string_full mbedtls_version_get_string_full
+#define x509_bitstring mbedtls_x509_bitstring
+#define x509_buf mbedtls_x509_buf
+#define x509_crl mbedtls_x509_crl
+#define x509_crl_entry mbedtls_x509_crl_entry
+#define x509_crl_free mbedtls_x509_crl_free
+#define x509_crl_info mbedtls_x509_crl_info
+#define x509_crl_init mbedtls_x509_crl_init
+#define x509_crl_parse mbedtls_x509_crl_parse
+#define x509_crl_parse_der mbedtls_x509_crl_parse_der
+#define x509_crl_parse_file mbedtls_x509_crl_parse_file
+#define x509_crt mbedtls_x509_crt
+#define x509_crt_check_extended_key_usage mbedtls_x509_crt_check_extended_key_usage
+#define x509_crt_check_key_usage mbedtls_x509_crt_check_key_usage
+#define x509_crt_free mbedtls_x509_crt_free
+#define x509_crt_info mbedtls_x509_crt_info
+#define x509_crt_init mbedtls_x509_crt_init
+#define x509_crt_parse mbedtls_x509_crt_parse
+#define x509_crt_parse_der mbedtls_x509_crt_parse_der
+#define x509_crt_parse_file mbedtls_x509_crt_parse_file
+#define x509_crt_parse_path mbedtls_x509_crt_parse_path
+#define x509_crt_revoked mbedtls_x509_crt_is_revoked
+#define x509_crt_verify mbedtls_x509_crt_verify
+#define x509_csr mbedtls_x509_csr
+#define x509_csr_free mbedtls_x509_csr_free
+#define x509_csr_info mbedtls_x509_csr_info
+#define x509_csr_init mbedtls_x509_csr_init
+#define x509_csr_parse mbedtls_x509_csr_parse
+#define x509_csr_parse_der mbedtls_x509_csr_parse_der
+#define x509_csr_parse_file mbedtls_x509_csr_parse_file
+#define x509_dn_gets mbedtls_x509_dn_gets
+#define x509_get_alg mbedtls_x509_get_alg
+#define x509_get_alg_null mbedtls_x509_get_alg_null
+#define x509_get_ext mbedtls_x509_get_ext
+#define x509_get_name mbedtls_x509_get_name
+#define x509_get_rsassa_pss_params mbedtls_x509_get_rsassa_pss_params
+#define x509_get_serial mbedtls_x509_get_serial
+#define x509_get_sig mbedtls_x509_get_sig
+#define x509_get_sig_alg mbedtls_x509_get_sig_alg
+#define x509_get_time mbedtls_x509_get_time
+#define x509_key_size_helper mbedtls_x509_key_size_helper
+#define x509_name mbedtls_x509_name
+#define x509_self_test mbedtls_x509_self_test
+#define x509_sequence mbedtls_x509_sequence
+#define x509_serial_gets mbedtls_x509_serial_gets
+#define x509_set_extension mbedtls_x509_set_extension
+#define x509_sig_alg_gets mbedtls_x509_sig_alg_gets
+#define x509_string_to_names mbedtls_x509_string_to_names
+#define x509_time mbedtls_x509_time
+#define x509_time_expired mbedtls_x509_time_is_past
+#define x509_time_future mbedtls_x509_time_is_future
+#define x509_write_extensions mbedtls_x509_write_extensions
+#define x509_write_names mbedtls_x509_write_names
+#define x509_write_sig mbedtls_x509_write_sig
+#define x509write_cert mbedtls_x509write_cert
+#define x509write_crt_der mbedtls_x509write_crt_der
+#define x509write_crt_free mbedtls_x509write_crt_free
+#define x509write_crt_init mbedtls_x509write_crt_init
+#define x509write_crt_pem mbedtls_x509write_crt_pem
+#define x509write_crt_set_authority_key_identifier mbedtls_x509write_crt_set_authority_key_identifier
+#define x509write_crt_set_basic_constraints mbedtls_x509write_crt_set_basic_constraints
+#define x509write_crt_set_extension mbedtls_x509write_crt_set_extension
+#define x509write_crt_set_issuer_key mbedtls_x509write_crt_set_issuer_key
+#define x509write_crt_set_issuer_name mbedtls_x509write_crt_set_issuer_name
+#define x509write_crt_set_key_usage mbedtls_x509write_crt_set_key_usage
+#define x509write_crt_set_md_alg mbedtls_x509write_crt_set_md_alg
+#define x509write_crt_set_ns_cert_type mbedtls_x509write_crt_set_ns_cert_type
+#define x509write_crt_set_serial mbedtls_x509write_crt_set_serial
+#define x509write_crt_set_subject_key mbedtls_x509write_crt_set_subject_key
+#define x509write_crt_set_subject_key_identifier mbedtls_x509write_crt_set_subject_key_identifier
+#define x509write_crt_set_subject_name mbedtls_x509write_crt_set_subject_name
+#define x509write_crt_set_validity mbedtls_x509write_crt_set_validity
+#define x509write_crt_set_version mbedtls_x509write_crt_set_version
+#define x509write_csr mbedtls_x509write_csr
+#define x509write_csr_der mbedtls_x509write_csr_der
+#define x509write_csr_free mbedtls_x509write_csr_free
+#define x509write_csr_init mbedtls_x509write_csr_init
+#define x509write_csr_pem mbedtls_x509write_csr_pem
+#define x509write_csr_set_extension mbedtls_x509write_csr_set_extension
+#define x509write_csr_set_key mbedtls_x509write_csr_set_key
+#define x509write_csr_set_key_usage mbedtls_x509write_csr_set_key_usage
+#define x509write_csr_set_md_alg mbedtls_x509write_csr_set_md_alg
+#define x509write_csr_set_ns_cert_type mbedtls_x509write_csr_set_ns_cert_type
+#define x509write_csr_set_subject_name mbedtls_x509write_csr_set_subject_name
+#define xtea_context mbedtls_xtea_context
+#define xtea_crypt_cbc mbedtls_xtea_crypt_cbc
+#define xtea_crypt_ecb mbedtls_xtea_crypt_ecb
+#define xtea_free mbedtls_xtea_free
+#define xtea_init mbedtls_xtea_init
+#define xtea_self_test mbedtls_xtea_self_test
+#define xtea_setup mbedtls_xtea_setup
+
+#endif /* compat-1.3.h */
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/config.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/config.h
new file mode 100644
index 00000000000..87b4e9192e7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/config.h
@@ -0,0 +1,4022 @@
+/**
+ * \file config.h
+ *
+ * \brief Configuration options (set of defines)
+ *
+ *  This set of compile-time options may be used to enable
+ *  or disable features selectively, and reduce the global
+ *  memory footprint.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CONFIG_H
+#define MBEDTLS_CONFIG_H
+
+#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE)
+#define _CRT_SECURE_NO_DEPRECATE 1
+#endif
+
+/**
+ * \name SECTION: System support
+ *
+ * This section sets system specific settings.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_HAVE_ASM
+ *
+ * The compiler has support for asm().
+ *
+ * Requires support for asm() in compiler.
+ *
+ * Used in:
+ *      library/aria.c
+ *      library/timing.c
+ *      include/mbedtls/bn_mul.h
+ *
+ * Required by:
+ *      MBEDTLS_AESNI_C
+ *      MBEDTLS_PADLOCK_C
+ *
+ * Comment to disable the use of assembly code.
+ */
+#define MBEDTLS_HAVE_ASM
+
+/**
+ * \def MBEDTLS_NO_UDBL_DIVISION
+ *
+ * The platform lacks support for double-width integer division (64-bit
+ * division on a 32-bit platform, 128-bit division on a 64-bit platform).
+ *
+ * Used in:
+ *      include/mbedtls/bignum.h
+ *      library/bignum.c
+ *
+ * The bignum code uses double-width division to speed up some operations.
+ * Double-width division is often implemented in software that needs to
+ * be linked with the program. The presence of a double-width integer
+ * type is usually detected automatically through preprocessor macros,
+ * but the automatic detection cannot know whether the code needs to
+ * and can be linked with an implementation of division for that type.
+ * By default division is assumed to be usable if the type is present.
+ * Uncomment this option to prevent the use of double-width division.
+ *
+ * Note that division for the native integer type is always required.
+ * Furthermore, a 64-bit type is always required even on a 32-bit
+ * platform, but it need not support multiplication or division. In some
+ * cases it is also desirable to disable some double-width operations. For
+ * example, if double-width division is implemented in software, disabling
+ * it can reduce code size in some embedded targets.
+ */
+//#define MBEDTLS_NO_UDBL_DIVISION
+
+/**
+ * \def MBEDTLS_NO_64BIT_MULTIPLICATION
+ *
+ * The platform lacks support for 32x32 -> 64-bit multiplication.
+ *
+ * Used in:
+ *      library/poly1305.c
+ *
+ * Some parts of the library may use multiplication of two unsigned 32-bit
+ * operands with a 64-bit result in order to speed up computations. On some
+ * platforms, this is not available in hardware and has to be implemented in
+ * software, usually in a library provided by the toolchain.
+ *
+ * Sometimes it is not desirable to have to link to that library. This option
+ * removes the dependency of that library on platforms that lack a hardware
+ * 64-bit multiplier by embedding a software implementation in Mbed TLS.
+ *
+ * Note that depending on the compiler, this may decrease performance compared
+ * to using the library function provided by the toolchain.
+ */
+//#define MBEDTLS_NO_64BIT_MULTIPLICATION
+
+/**
+ * \def MBEDTLS_HAVE_SSE2
+ *
+ * CPU supports SSE2 instruction set.
+ *
+ * Uncomment if the CPU supports SSE2 (IA-32 specific).
+ */
+//#define MBEDTLS_HAVE_SSE2
+
+/**
+ * \def MBEDTLS_HAVE_TIME
+ *
+ * System has time.h and time().
+ * The time does not need to be correct, only time differences are used,
+ * by contrast with MBEDTLS_HAVE_TIME_DATE
+ *
+ * Defining MBEDTLS_HAVE_TIME allows you to specify MBEDTLS_PLATFORM_TIME_ALT,
+ * MBEDTLS_PLATFORM_TIME_MACRO, MBEDTLS_PLATFORM_TIME_TYPE_MACRO and
+ * MBEDTLS_PLATFORM_STD_TIME.
+ *
+ * Comment if your system does not support time functions
+ */
+#define MBEDTLS_HAVE_TIME
+
+/**
+ * \def MBEDTLS_HAVE_TIME_DATE
+ *
+ * System has time.h, time(), and an implementation for
+ * mbedtls_platform_gmtime_r() (see below).
+ * The time needs to be correct (not necessarily very accurate, but at least
+ * the date should be correct). This is used to verify the validity period of
+ * X.509 certificates.
+ *
+ * Comment if your system does not have a correct clock.
+ *
+ * \note mbedtls_platform_gmtime_r() is an abstraction in platform_util.h that
+ * behaves similarly to the gmtime_r() function from the C standard. Refer to
+ * the documentation for mbedtls_platform_gmtime_r() for more information.
+ *
+ * \note It is possible to configure an implementation for
+ * mbedtls_platform_gmtime_r() at compile-time by using the macro
+ * MBEDTLS_PLATFORM_GMTIME_R_ALT.
+ */
+#define MBEDTLS_HAVE_TIME_DATE
+
+/**
+ * \def MBEDTLS_PLATFORM_MEMORY
+ *
+ * Enable the memory allocation layer.
+ *
+ * By default mbed TLS uses the system-provided calloc() and free().
+ * This allows different allocators (self-implemented or provided) to be
+ * provided to the platform abstraction layer.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY without the
+ * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide
+ * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and
+ * free() function pointer at runtime.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY and specifying
+ * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the
+ * alternate function at compile time.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Enable this layer to allow use of alternative memory allocators.
+ */
+//#define MBEDTLS_PLATFORM_MEMORY
+
+/**
+ * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+ *
+ * Do not assign standard functions in the platform layer (e.g. calloc() to
+ * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF)
+ *
+ * This makes sure there are no linking errors on platforms that do not support
+ * these functions. You will HAVE to provide alternatives, either at runtime
+ * via the platform_set_xxx() functions or at compile time by setting
+ * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a
+ * MBEDTLS_PLATFORM_XXX_MACRO.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Uncomment to prevent default assignment of standard functions in the
+ * platform layer.
+ */
+//#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+
+/**
+ * \def MBEDTLS_PLATFORM_EXIT_ALT
+ *
+ * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the
+ * function in the platform abstraction layer.
+ *
+ * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will
+ * provide a function "mbedtls_platform_set_printf()" that allows you to set an
+ * alternative printf function pointer.
+ *
+ * All these define require MBEDTLS_PLATFORM_C to be defined!
+ *
+ * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows;
+ * it will be enabled automatically by check_config.h
+ *
+ * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as
+ * MBEDTLS_PLATFORM_XXX_MACRO!
+ *
+ * Requires: MBEDTLS_PLATFORM_TIME_ALT requires MBEDTLS_HAVE_TIME
+ *
+ * Uncomment a macro to enable alternate implementation of specific base
+ * platform function
+ */
+//#define MBEDTLS_PLATFORM_EXIT_ALT
+//#define MBEDTLS_PLATFORM_TIME_ALT
+//#define MBEDTLS_PLATFORM_FPRINTF_ALT
+//#define MBEDTLS_PLATFORM_PRINTF_ALT
+//#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+//#define MBEDTLS_PLATFORM_VSNPRINTF_ALT
+//#define MBEDTLS_PLATFORM_NV_SEED_ALT
+//#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT
+
+/**
+ * \def MBEDTLS_DEPRECATED_WARNING
+ *
+ * Mark deprecated functions and features so that they generate a warning if
+ * used. Functionality deprecated in one version will usually be removed in the
+ * next version. You can enable this to help you prepare the transition to a
+ * new major version by making sure your code is not using this functionality.
+ *
+ * This only works with GCC and Clang. With other compilers, you may want to
+ * use MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Uncomment to get warnings on using deprecated functions and features.
+ */
+//#define MBEDTLS_DEPRECATED_WARNING
+
+/**
+ * \def MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Remove deprecated functions and features so that they generate an error if
+ * used. Functionality deprecated in one version will usually be removed in the
+ * next version. You can enable this to help you prepare the transition to a
+ * new major version by making sure your code is not using this functionality.
+ *
+ * Uncomment to get errors on using deprecated functions and features.
+ */
+//#define MBEDTLS_DEPRECATED_REMOVED
+
+/**
+ * \def MBEDTLS_CHECK_PARAMS
+ *
+ * This configuration option controls whether the library validates more of
+ * the parameters passed to it.
+ *
+ * When this flag is not defined, the library only attempts to validate an
+ * input parameter if: (1) they may come from the outside world (such as the
+ * network, the filesystem, etc.) or (2) not validating them could result in
+ * internal memory errors such as overflowing a buffer controlled by the
+ * library. On the other hand, it doesn't attempt to validate parameters whose
+ * values are fully controlled by the application (such as pointers).
+ *
+ * When this flag is defined, the library additionally attempts to validate
+ * parameters that are fully controlled by the application, and should always
+ * be valid if the application code is fully correct and trusted.
+ *
+ * For example, when a function accepts as input a pointer to a buffer that may
+ * contain untrusted data, and its documentation mentions that this pointer
+ * must not be NULL:
+ * - The pointer is checked to be non-NULL only if this option is enabled.
+ * - The content of the buffer is always validated.
+ *
+ * When this flag is defined, if a library function receives a parameter that
+ * is invalid:
+ * 1. The function will invoke the macro MBEDTLS_PARAM_FAILED().
+ * 2. If MBEDTLS_PARAM_FAILED() did not terminate the program, the function
+ *   will immediately return. If the function returns an Mbed TLS error code,
+ *   the error code in this case is MBEDTLS_ERR_xxx_BAD_INPUT_DATA.
+ *
+ * When defining this flag, you also need to arrange a definition for
+ * MBEDTLS_PARAM_FAILED(). You can do this by any of the following methods:
+ * - By default, the library defines MBEDTLS_PARAM_FAILED() to call a
+ *   function mbedtls_param_failed(), but the library does not define this
+ *   function. If you do not make any other arrangements, you must provide
+ *   the function mbedtls_param_failed() in your application.
+ *   See `platform_util.h` for its prototype.
+ * - If you enable the macro #MBEDTLS_CHECK_PARAMS_ASSERT, then the
+ *   library defines MBEDTLS_PARAM_FAILED(\c cond) to be `assert(cond)`.
+ *   You can still supply an alternative definition of
+ *   MBEDTLS_PARAM_FAILED(), which may call `assert`.
+ * - If you define a macro MBEDTLS_PARAM_FAILED() before including `config.h`
+ *   or you uncomment the definition of MBEDTLS_PARAM_FAILED() in `config.h`,
+ *   the library will call the macro that you defined and will not supply
+ *   its own version. Note that if MBEDTLS_PARAM_FAILED() calls `assert`,
+ *   you need to enable #MBEDTLS_CHECK_PARAMS_ASSERT so that library source
+ *   files include `<assert.h>`.
+ *
+ * Uncomment to enable validation of application-controlled parameters.
+ */
+//#define MBEDTLS_CHECK_PARAMS
+
+/**
+ * \def MBEDTLS_CHECK_PARAMS_ASSERT
+ *
+ * Allow MBEDTLS_PARAM_FAILED() to call `assert`, and make it default to
+ * `assert`. This macro is only used if #MBEDTLS_CHECK_PARAMS is defined.
+ *
+ * If this macro is not defined, then MBEDTLS_PARAM_FAILED() defaults to
+ * calling a function mbedtls_param_failed(). See the documentation of
+ * #MBEDTLS_CHECK_PARAMS for details.
+ *
+ * Uncomment to allow MBEDTLS_PARAM_FAILED() to call `assert`.
+ */
+//#define MBEDTLS_CHECK_PARAMS_ASSERT
+
+/* \} name SECTION: System support */
+
+/**
+ * \name SECTION: mbed TLS feature support
+ *
+ * This section sets support for features that are or are not needed
+ * within the modules that are enabled.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_TIMING_ALT
+ *
+ * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(),
+ * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay()
+ *
+ * Only works if you have MBEDTLS_TIMING_C enabled.
+ *
+ * You will need to provide a header "timing_alt.h" and an implementation at
+ * compile time.
+ */
+//#define MBEDTLS_TIMING_ALT
+
+/**
+ * \def MBEDTLS_AES_ALT
+ *
+ * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternate core implementation of a symmetric crypto, an arithmetic or hash
+ * module (e.g. platform specific assembly optimized implementations). Keep
+ * in mind that the function prototypes should remain the same.
+ *
+ * This replaces the whole module. If you only want to replace one of the
+ * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer
+ * provide the "struct mbedtls_aes_context" definition and omit the base
+ * function declarations and implementations. "aes_alt.h" will be included from
+ * "aes.h" to include the new function definitions.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * module.
+ *
+ * \warning   MD2, MD4, MD5, ARC4, DES and SHA-1 are considered weak and their
+ *            use constitutes a security risk. If possible, we recommend
+ *            avoiding dependencies on them, and considering stronger message
+ *            digests and ciphers instead.
+ *
+ */
+//#define MBEDTLS_AES_ALT
+//#define MBEDTLS_ARC4_ALT
+//#define MBEDTLS_ARIA_ALT
+//#define MBEDTLS_BLOWFISH_ALT
+//#define MBEDTLS_CAMELLIA_ALT
+//#define MBEDTLS_CCM_ALT
+//#define MBEDTLS_CHACHA20_ALT
+//#define MBEDTLS_CHACHAPOLY_ALT
+//#define MBEDTLS_CMAC_ALT
+//#define MBEDTLS_DES_ALT
+//#define MBEDTLS_DHM_ALT
+//#define MBEDTLS_ECJPAKE_ALT
+//#define MBEDTLS_GCM_ALT
+//#define MBEDTLS_NIST_KW_ALT
+//#define MBEDTLS_MD2_ALT
+//#define MBEDTLS_MD4_ALT
+//#define MBEDTLS_MD5_ALT
+//#define MBEDTLS_POLY1305_ALT
+//#define MBEDTLS_RIPEMD160_ALT
+//#define MBEDTLS_RSA_ALT
+//#define MBEDTLS_SHA1_ALT
+//#define MBEDTLS_SHA256_ALT
+//#define MBEDTLS_SHA512_ALT
+//#define MBEDTLS_XTEA_ALT
+
+/*
+ * When replacing the elliptic curve module, pleace consider, that it is
+ * implemented with two .c files:
+ *      - ecp.c
+ *      - ecp_curves.c
+ * You can replace them very much like all the other MBEDTLS__MODULE_NAME__ALT
+ * macros as described above. The only difference is that you have to make sure
+ * that you provide functionality for both .c files.
+ */
+//#define MBEDTLS_ECP_ALT
+
+/**
+ * \def MBEDTLS_MD2_PROCESS_ALT
+ *
+ * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you
+ * alternate core implementation of symmetric crypto or hash function. Keep in
+ * mind that function prototypes should remain the same.
+ *
+ * This replaces only one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will
+ * no longer provide the mbedtls_sha1_process() function, but it will still provide
+ * the other function (using your mbedtls_sha1_process() function) and the definition
+ * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible
+ * with this definition.
+ *
+ * \note Because of a signature change, the core AES encryption and decryption routines are
+ *       currently named mbedtls_aes_internal_encrypt and mbedtls_aes_internal_decrypt,
+ *       respectively. When setting up alternative implementations, these functions should
+ *       be overridden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
+ *       must stay untouched.
+ *
+ * \note If you use the AES_xxx_ALT macros, then it is recommended to also set
+ *       MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
+ *       tables.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ *
+ * \warning   MD2, MD4, MD5, DES and SHA-1 are considered weak and their use
+ *            constitutes a security risk. If possible, we recommend avoiding
+ *            dependencies on them, and considering stronger message digests
+ *            and ciphers instead.
+ *
+ * \warning   If both MBEDTLS_ECDSA_SIGN_ALT and MBEDTLS_ECDSA_DETERMINISTIC are
+ *            enabled, then the deterministic ECDH signature functions pass the
+ *            the static HMAC-DRBG as RNG to mbedtls_ecdsa_sign(). Therefore
+ *            alternative implementations should use the RNG only for generating
+ *            the ephemeral key and nothing else. If this is not possible, then
+ *            MBEDTLS_ECDSA_DETERMINISTIC should be disabled and an alternative
+ *            implementation should be provided for mbedtls_ecdsa_sign_det_ext()
+ *            (and for mbedtls_ecdsa_sign_det() too if backward compatibility is
+ *            desirable).
+ *
+ */
+//#define MBEDTLS_MD2_PROCESS_ALT
+//#define MBEDTLS_MD4_PROCESS_ALT
+//#define MBEDTLS_MD5_PROCESS_ALT
+//#define MBEDTLS_RIPEMD160_PROCESS_ALT
+//#define MBEDTLS_SHA1_PROCESS_ALT
+//#define MBEDTLS_SHA256_PROCESS_ALT
+//#define MBEDTLS_SHA512_PROCESS_ALT
+//#define MBEDTLS_DES_SETKEY_ALT
+//#define MBEDTLS_DES_CRYPT_ECB_ALT
+//#define MBEDTLS_DES3_CRYPT_ECB_ALT
+//#define MBEDTLS_AES_SETKEY_ENC_ALT
+//#define MBEDTLS_AES_SETKEY_DEC_ALT
+//#define MBEDTLS_AES_ENCRYPT_ALT
+//#define MBEDTLS_AES_DECRYPT_ALT
+//#define MBEDTLS_ECDH_GEN_PUBLIC_ALT
+//#define MBEDTLS_ECDH_COMPUTE_SHARED_ALT
+//#define MBEDTLS_ECDSA_VERIFY_ALT
+//#define MBEDTLS_ECDSA_SIGN_ALT
+//#define MBEDTLS_ECDSA_GENKEY_ALT
+
+/**
+ * \def MBEDTLS_ECP_INTERNAL_ALT
+ *
+ * Expose a part of the internal interface of the Elliptic Curve Point module.
+ *
+ * MBEDTLS_ECP__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternative core implementation of elliptic curve arithmetic. Keep in mind
+ * that function prototypes should remain the same.
+ *
+ * This partially replaces one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS_ECP_ALT flag. The original implementation
+ * is still present and it is used for group structures not supported by the
+ * alternative.
+ *
+ * The original implementation can in addition be removed by setting the
+ * MBEDTLS_ECP_NO_FALLBACK option, in which case any function for which the
+ * corresponding MBEDTLS_ECP__FUNCTION_NAME__ALT macro is defined will not be
+ * able to fallback to curves not supported by the alternative implementation.
+ *
+ * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT
+ * and implementing the following functions:
+ *      unsigned char mbedtls_internal_ecp_grp_capable(
+ *          const mbedtls_ecp_group *grp )
+ *      int  mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp )
+ *      void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp )
+ * The mbedtls_internal_ecp_grp_capable function should return 1 if the
+ * replacement functions implement arithmetic for the given group and 0
+ * otherwise.
+ * The functions mbedtls_internal_ecp_init and mbedtls_internal_ecp_free are
+ * called before and after each point operation and provide an opportunity to
+ * implement optimized set up and tear down instructions.
+ *
+ * Example: In case you set MBEDTLS_ECP_INTERNAL_ALT and
+ * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac()
+ * function, but will use your mbedtls_internal_ecp_double_jac() if the group
+ * for the operation is supported by your implementation (i.e. your
+ * mbedtls_internal_ecp_grp_capable() function returns 1 for this group). If the
+ * group is not supported by your implementation, then the original mbed TLS
+ * implementation of ecp_double_jac() is used instead, unless this fallback
+ * behaviour is disabled by setting MBEDTLS_ECP_NO_FALLBACK (in which case
+ * ecp_double_jac() will return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE).
+ *
+ * The function prototypes and the definition of mbedtls_ecp_group and
+ * mbedtls_ecp_point will not change based on MBEDTLS_ECP_INTERNAL_ALT, so your
+ * implementation of mbedtls_internal_ecp__function_name__ must be compatible
+ * with their definitions.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ */
+/* Required for all the functions in this section */
+//#define MBEDTLS_ECP_INTERNAL_ALT
+/* Turn off software fallback for curves not supported in hardware */
+//#define MBEDTLS_ECP_NO_FALLBACK
+/* Support for Weierstrass curves with Jacobi representation */
+//#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
+//#define MBEDTLS_ECP_ADD_MIXED_ALT
+//#define MBEDTLS_ECP_DOUBLE_JAC_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_ALT
+/* Support for curves with Montgomery arithmetic */
+//#define MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT
+//#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT
+//#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT
+
+/**
+ * \def MBEDTLS_TEST_NULL_ENTROPY
+ *
+ * Enables testing and use of mbed TLS without any configured entropy sources.
+ * This permits use of the library on platforms before an entropy source has
+ * been integrated (see for example the MBEDTLS_ENTROPY_HARDWARE_ALT or the
+ * MBEDTLS_ENTROPY_NV_SEED switches).
+ *
+ * WARNING! This switch MUST be disabled in production builds, and is suitable
+ * only for development.
+ * Enabling the switch negates any security provided by the library.
+ *
+ * Requires MBEDTLS_ENTROPY_C, MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ */
+//#define MBEDTLS_TEST_NULL_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_HARDWARE_ALT
+ *
+ * Uncomment this macro to let mbed TLS use your own implementation of a
+ * hardware entropy collector.
+ *
+ * Your function must be called \c mbedtls_hardware_poll(), have the same
+ * prototype as declared in entropy_poll.h, and accept NULL as first argument.
+ *
+ * Uncomment to use your own hardware entropy collector.
+ */
+//#define MBEDTLS_ENTROPY_HARDWARE_ALT
+
+/**
+ * \def MBEDTLS_AES_ROM_TABLES
+ *
+ * Use precomputed AES tables stored in ROM.
+ *
+ * Uncomment this macro to use precomputed AES tables stored in ROM.
+ * Comment this macro to generate AES tables in RAM at runtime.
+ *
+ * Tradeoff: Using precomputed ROM tables reduces RAM usage by ~8kb
+ * (or ~2kb if \c MBEDTLS_AES_FEWER_TABLES is used) and reduces the
+ * initialization time before the first AES operation can be performed.
+ * It comes at the cost of additional ~8kb ROM use (resp. ~2kb if \c
+ * MBEDTLS_AES_FEWER_TABLES below is used), and potentially degraded
+ * performance if ROM access is slower than RAM access.
+ *
+ * This option is independent of \c MBEDTLS_AES_FEWER_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_ROM_TABLES
+
+/**
+ * \def MBEDTLS_AES_FEWER_TABLES
+ *
+ * Use less ROM/RAM for AES tables.
+ *
+ * Uncommenting this macro omits 75% of the AES tables from
+ * ROM / RAM (depending on the value of \c MBEDTLS_AES_ROM_TABLES)
+ * by computing their values on the fly during operations
+ * (the tables are entry-wise rotations of one another).
+ *
+ * Tradeoff: Uncommenting this reduces the RAM / ROM footprint
+ * by ~6kb but at the cost of more arithmetic operations during
+ * runtime. Specifically, one has to compare 4 accesses within
+ * different tables to 4 accesses with additional arithmetic
+ * operations within the same table. The performance gain/loss
+ * depends on the system and memory details.
+ *
+ * This option is independent of \c MBEDTLS_AES_ROM_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_FEWER_TABLES
+
+/**
+ * \def MBEDTLS_CAMELLIA_SMALL_MEMORY
+ *
+ * Use less ROM for the Camellia implementation (saves about 768 bytes).
+ *
+ * Uncomment this macro to use less memory for Camellia.
+ */
+//#define MBEDTLS_CAMELLIA_SMALL_MEMORY
+
+/**
+ * \def MBEDTLS_CHECK_RETURN_WARNING
+ *
+ * If this macro is defined, emit a compile-time warning if application code
+ * calls a function without checking its return value, but the return value
+ * should generally be checked in portable applications.
+ *
+ * This is only supported on platforms where #MBEDTLS_CHECK_RETURN is
+ * implemented. Otherwise this option has no effect.
+ *
+ * Uncomment to get warnings on using fallible functions without checking
+ * their return value.
+ *
+ * \note  This feature is a work in progress.
+ *        Warnings will be added to more functions in the future.
+ *
+ * \note  A few functions are considered critical, and ignoring the return
+ *        value of these functions will trigger a warning even if this
+ *        macro is not defined. To completely disable return value check
+ *        warnings, define #MBEDTLS_CHECK_RETURN with an empty expansion.
+ */
+//#define MBEDTLS_CHECK_RETURN_WARNING
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CBC
+ *
+ * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CBC
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CFB
+ *
+ * Enable Cipher Feedback mode (CFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CTR
+ *
+ * Enable Counter Block Cipher mode (CTR) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CTR
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_OFB
+ *
+ * Enable Output Feedback mode (OFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_OFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_XTS
+ *
+ * Enable Xor-encrypt-xor with ciphertext stealing mode (XTS) for AES.
+ */
+#define MBEDTLS_CIPHER_MODE_XTS
+
+/**
+ * \def MBEDTLS_CIPHER_NULL_CIPHER
+ *
+ * Enable NULL cipher.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * encryption or channels without any security!
+ *
+ * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable
+ * the following ciphersuites:
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA
+ *      MBEDTLS_TLS_RSA_WITH_NULL_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_NULL_SHA
+ *      MBEDTLS_TLS_RSA_WITH_NULL_MD5
+ *      MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA
+ *      MBEDTLS_TLS_PSK_WITH_NULL_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_NULL_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_NULL_SHA
+ *
+ * Uncomment this macro to enable the NULL cipher and ciphersuites
+ */
+//#define MBEDTLS_CIPHER_NULL_CIPHER
+
+/**
+ * \def MBEDTLS_CIPHER_PADDING_PKCS7
+ *
+ * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for
+ * specific padding modes in the cipher layer with cipher modes that support
+ * padding (e.g. CBC)
+ *
+ * If you disable all padding modes, only full blocks can be used with CBC.
+ *
+ * Enable padding modes in the cipher layer.
+ */
+#define MBEDTLS_CIPHER_PADDING_PKCS7
+#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+#define MBEDTLS_CIPHER_PADDING_ZEROS
+
+/** \def MBEDTLS_CTR_DRBG_USE_128_BIT_KEY
+ *
+ * Uncomment this macro to use a 128-bit key in the CTR_DRBG module.
+ * By default, CTR_DRBG uses a 256-bit key.
+ */
+//#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY
+
+/**
+ * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+ *
+ * Enable weak ciphersuites in SSL / TLS.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * channels with virtually no security at all!
+ *
+ * This enables the following ciphersuites:
+ *      MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA
+ *
+ * Uncomment this macro to enable weak ciphersuites
+ *
+ * \warning   DES is considered a weak cipher and its use constitutes a
+ *            security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+ *
+ * Remove RC4 ciphersuites by default in SSL / TLS.
+ * This flag removes the ciphersuites based on RC4 from the default list as
+ * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to
+ * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them
+ * explicitly.
+ *
+ * Uncomment this macro to remove RC4 ciphersuites by default.
+ */
+#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_REMOVE_3DES_CIPHERSUITES
+ *
+ * Remove 3DES ciphersuites by default in SSL / TLS.
+ * This flag removes the ciphersuites based on 3DES from the default list as
+ * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible
+ * to enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including
+ * them explicitly.
+ *
+ * A man-in-the-browser attacker can recover authentication tokens sent through
+ * a TLS connection using a 3DES based cipher suite (see "On the Practical
+ * (In-)Security of 64-bit Block Ciphers" by Karthikeyan Bhargavan and Gaëtan
+ * Leurent, see https://sweet32.info/SWEET32_CCS16.pdf). If this attack falls
+ * in your threat model or you are unsure, then you should keep this option
+ * enabled to remove 3DES based cipher suites.
+ *
+ * Comment this macro to keep 3DES in the default ciphersuite list.
+ */
+#define MBEDTLS_REMOVE_3DES_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED
+ *
+ * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve
+ * module.  By default all supported curves are enabled.
+ *
+ * Comment macros to disable the curve and functions for it
+ */
+/* Short Weierstrass curves (supporting ECP, ECDH, ECDSA) */
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+/* Montgomery curves (supporting ECP) */
+#define MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#define MBEDTLS_ECP_DP_CURVE448_ENABLED
+
+/**
+ * \def MBEDTLS_ECP_NIST_OPTIM
+ *
+ * Enable specific 'modulo p' routines for each NIST prime.
+ * Depending on the prime and architecture, makes operations 4 to 8 times
+ * faster on the corresponding curve.
+ *
+ * Comment this macro to disable NIST curves optimisation.
+ */
+#define MBEDTLS_ECP_NIST_OPTIM
+
+/**
+ * \def MBEDTLS_ECP_NO_INTERNAL_RNG
+ *
+ * When this option is disabled, mbedtls_ecp_mul() will make use of an
+ * internal RNG when called with a NULL \c f_rng argument, in order to protect
+ * against some side-channel attacks.
+ *
+ * This protection introduces a dependency of the ECP module on one of the
+ * DRBG modules. For very constrained implementations that don't require this
+ * protection (for example, because you're only doing signature verification,
+ * so not manipulating any secret, or because local/physical side-channel
+ * attacks are outside your threat model), it might be desirable to get rid of
+ * that dependency.
+ *
+ * \warning Enabling this option makes some uses of ECP vulnerable to some
+ * side-channel attacks. Only enable it if you know that's not a problem for
+ * your use case.
+ *
+ * Uncomment this macro to disable some counter-measures in ECP.
+ */
+//#define MBEDTLS_ECP_NO_INTERNAL_RNG
+
+/**
+ * \def MBEDTLS_ECP_RESTARTABLE
+ *
+ * Enable "non-blocking" ECC operations that can return early and be resumed.
+ *
+ * This allows various functions to pause by returning
+ * #MBEDTLS_ERR_ECP_IN_PROGRESS (or, for functions in the SSL module,
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS) and then be called later again in
+ * order to further progress and eventually complete their operation. This is
+ * controlled through mbedtls_ecp_set_max_ops() which limits the maximum
+ * number of ECC operations a function may perform before pausing; see
+ * mbedtls_ecp_set_max_ops() for more information.
+ *
+ * This is useful in non-threaded environments if you want to avoid blocking
+ * for too long on ECC (and, hence, X.509 or SSL/TLS) operations.
+ *
+ * Uncomment this macro to enable restartable ECC computations.
+ *
+ * \note  This option only works with the default software implementation of
+ *        elliptic curve functionality. It is incompatible with
+ *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT, MBEDTLS_ECDSA_XXX_ALT
+ *        and MBEDTLS_ECDH_LEGACY_CONTEXT.
+ */
+//#define MBEDTLS_ECP_RESTARTABLE
+
+/**
+ * \def MBEDTLS_ECDH_LEGACY_CONTEXT
+ *
+ * Use a backward compatible ECDH context.
+ *
+ * Mbed TLS supports two formats for ECDH contexts (#mbedtls_ecdh_context
+ * defined in `ecdh.h`). For most applications, the choice of format makes
+ * no difference, since all library functions can work with either format,
+ * except that the new format is incompatible with MBEDTLS_ECP_RESTARTABLE.
+
+ * The new format used when this option is disabled is smaller
+ * (56 bytes on a 32-bit platform). In future versions of the library, it
+ * will support alternative implementations of ECDH operations.
+ * The new format is incompatible with applications that access
+ * context fields directly and with restartable ECP operations.
+ *
+ * Define this macro if you enable MBEDTLS_ECP_RESTARTABLE or if you
+ * want to access ECDH context fields directly. Otherwise you should
+ * comment out this macro definition.
+ *
+ * This option has no effect if #MBEDTLS_ECDH_C is not enabled.
+ *
+ * \note This configuration option is experimental. Future versions of the
+ *       library may modify the way the ECDH context layout is configured
+ *       and may modify the layout of the new context type.
+ */
+#define MBEDTLS_ECDH_LEGACY_CONTEXT
+
+/**
+ * \def MBEDTLS_ECDSA_DETERMINISTIC
+ *
+ * Enable deterministic ECDSA (RFC 6979).
+ * Standard ECDSA is "fragile" in the sense that lack of entropy when signing
+ * may result in a compromise of the long-term signing key. This is avoided by
+ * the deterministic variant.
+ *
+ * Requires: MBEDTLS_HMAC_DRBG_C, MBEDTLS_ECDSA_C
+ *
+ * Comment this macro to disable deterministic ECDSA.
+ */
+#define MBEDTLS_ECDSA_DETERMINISTIC
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+ *
+ * Enable the PSK based ciphersuite modes in SSL / TLS.
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+ *
+ * Enable the DHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ *
+ * \warning    Using DHE constitutes a security risk as it
+ *             is not possible to validate custom DH parameters.
+ *             If possible, it is recommended users should consider
+ *             preferring other methods of key exchange.
+ *             See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+ *
+ * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+ *
+ * Enable the RSA-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ *           MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+ *
+ * Enable the RSA-only based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ *           MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ */
+#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+ *
+ * Enable the DHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ *           MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *
+ * \warning    Using DHE constitutes a security risk as it
+ *             is not possible to validate custom DH parameters.
+ *             If possible, it is recommended users should consider
+ *             preferring other methods of key exchange.
+ *             See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+ *
+ * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ *           MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+ *
+ * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C,
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+ *
+ * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+ *
+ * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+ *
+ * Enable the ECJPAKE based ciphersuite modes in SSL / TLS.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Requires: MBEDTLS_ECJPAKE_C
+ *           MBEDTLS_SHA256_C
+ *           MBEDTLS_ECP_DP_SECP256R1_ENABLED
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+
+/**
+ * \def MBEDTLS_PK_PARSE_EC_EXTENDED
+ *
+ * Enhance support for reading EC keys using variants of SEC1 not allowed by
+ * RFC 5915 and RFC 5480.
+ *
+ * Currently this means parsing the SpecifiedECDomain choice of EC
+ * parameters (only known groups are supported, not arbitrary domains, to
+ * avoid validation issues).
+ *
+ * Disable if you only need to support RFC 5915 + 5480 key formats.
+ */
+#define MBEDTLS_PK_PARSE_EC_EXTENDED
+
+/**
+ * \def MBEDTLS_ERROR_STRERROR_DUMMY
+ *
+ * Enable a dummy error function to make use of mbedtls_strerror() in
+ * third party libraries easier when MBEDTLS_ERROR_C is disabled
+ * (no effect when MBEDTLS_ERROR_C is enabled).
+ *
+ * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're
+ * not using mbedtls_strerror() or error_strerror() in your application.
+ *
+ * Disable if you run into name conflicts and want to really remove the
+ * mbedtls_strerror()
+ */
+#define MBEDTLS_ERROR_STRERROR_DUMMY
+
+/**
+ * \def MBEDTLS_GENPRIME
+ *
+ * Enable the prime-number generation code.
+ *
+ * Requires: MBEDTLS_BIGNUM_C
+ */
+#define MBEDTLS_GENPRIME
+
+/**
+ * \def MBEDTLS_FS_IO
+ *
+ * Enable functions that use the filesystem.
+ */
+#define MBEDTLS_FS_IO
+
+/**
+ * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ * Do not add default entropy sources. These are the platform specific,
+ * mbedtls_timing_hardclock and HAVEGE based poll functions.
+ *
+ * This is useful to have more control over the added entropy sources in an
+ * application.
+ *
+ * Uncomment this macro to prevent loading of default entropy functions.
+ */
+//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+
+/**
+ * \def MBEDTLS_NO_PLATFORM_ENTROPY
+ *
+ * Do not use built-in platform entropy functions.
+ * This is useful if your platform does not support
+ * standards like the /dev/urandom or Windows CryptoAPI.
+ *
+ * Uncomment this macro to disable the built-in platform entropy functions.
+ */
+//#define MBEDTLS_NO_PLATFORM_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_FORCE_SHA256
+ *
+ * Force the entropy accumulator to use a SHA-256 accumulator instead of the
+ * default SHA-512 based one (if both are available).
+ *
+ * Requires: MBEDTLS_SHA256_C
+ *
+ * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option
+ * if you have performance concerns.
+ *
+ * This option is only useful if both MBEDTLS_SHA256_C and
+ * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used.
+ */
+//#define MBEDTLS_ENTROPY_FORCE_SHA256
+
+/**
+ * \def MBEDTLS_ENTROPY_NV_SEED
+ *
+ * Enable the non-volatile (NV) seed file-based entropy source.
+ * (Also enables the NV seed read/write functions in the platform layer)
+ *
+ * This is crucial (if not required) on systems that do not have a
+ * cryptographic entropy source (in hardware or kernel) available.
+ *
+ * Requires: MBEDTLS_ENTROPY_C, MBEDTLS_PLATFORM_C
+ *
+ * \note The read/write functions that are used by the entropy source are
+ *       determined in the platform layer, and can be modified at runtime and/or
+ *       compile-time depending on the flags (MBEDTLS_PLATFORM_NV_SEED_*) used.
+ *
+ * \note If you use the default implementation functions that read a seedfile
+ *       with regular fopen(), please make sure you make a seedfile with the
+ *       proper name (defined in MBEDTLS_PLATFORM_STD_NV_SEED_FILE) and at
+ *       least MBEDTLS_ENTROPY_BLOCK_SIZE bytes in size that can be read from
+ *       and written to or you will get an entropy source error! The default
+ *       implementation will only use the first MBEDTLS_ENTROPY_BLOCK_SIZE
+ *       bytes from the file.
+ *
+ * \note The entropy collector will write to the seed file before entropy is
+ *       given to an external source, to update it.
+ */
+//#define MBEDTLS_ENTROPY_NV_SEED
+
+/* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+ *
+ * Enable key identifiers that encode a key owner identifier.
+ *
+ * The owner of a key is identified by a value of type ::mbedtls_key_owner_id_t
+ * which is currently hard-coded to be int32_t.
+ *
+ * Note that this option is meant for internal use only and may be removed
+ * without notice. It is incompatible with MBEDTLS_USE_PSA_CRYPTO.
+ */
+//#define MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+
+/**
+ * \def MBEDTLS_MEMORY_DEBUG
+ *
+ * Enable debugging of buffer allocator memory issues. Automatically prints
+ * (to stderr) all (fatal) messages on memory allocation issues. Enables
+ * function for 'debug output' of allocated memory.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Uncomment this macro to let the buffer allocator print out error messages.
+ */
+//#define MBEDTLS_MEMORY_DEBUG
+
+/**
+ * \def MBEDTLS_MEMORY_BACKTRACE
+ *
+ * Include backtrace information with each allocated block.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *           GLIBC-compatible backtrace() an backtrace_symbols() support
+ *
+ * Uncomment this macro to include backtrace information
+ */
+//#define MBEDTLS_MEMORY_BACKTRACE
+
+/**
+ * \def MBEDTLS_PK_RSA_ALT_SUPPORT
+ *
+ * Support external private RSA keys (eg from a HSM) in the PK layer.
+ *
+ * Comment this macro to disable support for external private RSA keys.
+ */
+#define MBEDTLS_PK_RSA_ALT_SUPPORT
+
+/**
+ * \def MBEDTLS_PKCS1_V15
+ *
+ * Enable support for PKCS#1 v1.5 encoding.
+ *
+ * Requires: MBEDTLS_RSA_C
+ *
+ * This enables support for PKCS#1 v1.5 operations.
+ */
+#define MBEDTLS_PKCS1_V15
+
+/**
+ * \def MBEDTLS_PKCS1_V21
+ *
+ * Enable support for PKCS#1 v2.1 encoding.
+ *
+ * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C
+ *
+ * This enables support for RSAES-OAEP and RSASSA-PSS operations.
+ */
+#define MBEDTLS_PKCS1_V21
+
+/** \def MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS
+ *
+ * Enable support for platform built-in keys. If you enable this feature,
+ * you must implement the function mbedtls_psa_platform_get_builtin_key().
+ * See the documentation of that function for more information.
+ *
+ * Built-in keys are typically derived from a hardware unique key or
+ * stored in a secure element.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C.
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS
+
+/** \def MBEDTLS_PSA_CRYPTO_CLIENT
+ *
+ * Enable support for PSA crypto client.
+ *
+ * \note This option allows to include the code necessary for a PSA
+ *       crypto client when the PSA crypto implementation is not included in
+ *       the library (MBEDTLS_PSA_CRYPTO_C disabled). The code included is the
+ *       code to set and get PSA key attributes.
+ *       The development of PSA drivers partially relying on the library to
+ *       fulfill the hardware gaps is another possible usage of this option.
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_CLIENT
+
+/** \def MBEDTLS_PSA_CRYPTO_DRIVERS
+ *
+ * Enable support for the experimental PSA crypto driver interface.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ * \warning This interface is experimental and may change or be removed
+ * without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_DRIVERS
+
+/** \def MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG
+ *
+ * Make the PSA Crypto module use an external random generator provided
+ * by a driver, instead of Mbed TLS's entropy and DRBG modules.
+ *
+ * \note This random generator must deliver random numbers with cryptographic
+ *       quality and high performance. It must supply unpredictable numbers
+ *       with a uniform distribution. The implementation of this function
+ *       is responsible for ensuring that the random generator is seeded
+ *       with sufficient entropy. If you have a hardware TRNG which is slow
+ *       or delivers non-uniform output, declare it as an entropy source
+ *       with mbedtls_entropy_add_source() instead of enabling this option.
+ *
+ * If you enable this option, you must configure the type
+ * ::mbedtls_psa_external_random_context_t in psa/crypto_platform.h
+ * and define a function called mbedtls_psa_external_get_random()
+ * with the following prototype:
+ * ```
+ * psa_status_t mbedtls_psa_external_get_random(
+ *     mbedtls_psa_external_random_context_t *context,
+ *     uint8_t *output, size_t output_size, size_t *output_length);
+ * );
+ * ```
+ * The \c context value is initialized to 0 before the first call.
+ * The function must fill the \c output buffer with \p output_size bytes
+ * of random data and set \c *output_length to \p output_size.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ * \warning If you enable this option, code that uses the PSA cryptography
+ *          interface will not use any of the entropy sources set up for
+ *          the entropy module, nor the NV seed that MBEDTLS_ENTROPY_NV_SEED
+ *          enables.
+ *
+ * \note This option is experimental and may be removed without notice.
+ */
+//#define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_SPM
+ *
+ * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is built for SPM (Secure
+ * Partition Manager) integration which separates the code into two parts: a
+ * NSPE (Non-Secure Process Environment) and an SPE (Secure Process
+ * Environment).
+ *
+ * Module:  library/psa_crypto.c
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ */
+//#define MBEDTLS_PSA_CRYPTO_SPM
+
+/**
+ * \def MBEDTLS_PSA_INJECT_ENTROPY
+ *
+ * Enable support for entropy injection at first boot. This feature is
+ * required on systems that do not have a built-in entropy source (TRNG).
+ * This feature is currently not supported on systems that have a built-in
+ * entropy source.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_STORAGE_C, MBEDTLS_ENTROPY_NV_SEED
+ *
+ */
+//#define MBEDTLS_PSA_INJECT_ENTROPY
+
+/**
+ * \def MBEDTLS_RSA_NO_CRT
+ *
+ * Do not use the Chinese Remainder Theorem
+ * for the RSA private operation.
+ *
+ * Uncomment this macro to disable the use of CRT in RSA.
+ *
+ */
+//#define MBEDTLS_RSA_NO_CRT
+
+/**
+ * \def MBEDTLS_SELF_TEST
+ *
+ * Enable the checkup functions (*_self_test).
+ */
+#define MBEDTLS_SELF_TEST
+
+/**
+ * \def MBEDTLS_SHA256_SMALLER
+ *
+ * Enable an implementation of SHA-256 that has lower ROM footprint but also
+ * lower performance.
+ *
+ * The default implementation is meant to be a reasonnable compromise between
+ * performance and size. This version optimizes more aggressively for size at
+ * the expense of performance. Eg on Cortex-M4 it reduces the size of
+ * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about
+ * 30%.
+ *
+ * Uncomment to enable the smaller implementation of SHA256.
+ */
+//#define MBEDTLS_SHA256_SMALLER
+
+/**
+ * \def MBEDTLS_SHA512_SMALLER
+ *
+ * Enable an implementation of SHA-512 that has lower ROM footprint but also
+ * lower performance.
+ *
+ * Uncomment to enable the smaller implementation of SHA512.
+ */
+//#define MBEDTLS_SHA512_SMALLER
+
+/**
+ * \def MBEDTLS_SHA512_NO_SHA384
+ *
+ * Disable the SHA-384 option of the SHA-512 module. Use this to save some
+ * code size on devices that don't use SHA-384.
+ *
+ * Requires: MBEDTLS_SHA512_C
+ *
+ * Uncomment to disable SHA-384
+ */
+//#define MBEDTLS_SHA512_NO_SHA384
+
+/**
+ * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
+ *
+ * Enable sending of alert messages in case of encountered errors as per RFC.
+ * If you choose not to send the alert messages, mbed TLS can still communicate
+ * with other servers, only debugging of failures is harder.
+ *
+ * The advantage of not sending alert messages, is that no information is given
+ * about reasons for failures thus preventing adversaries of gaining intel.
+ *
+ * Enable sending of all alert messages
+ */
+#define MBEDTLS_SSL_ALL_ALERT_MESSAGES
+
+/**
+ * \def MBEDTLS_SSL_RECORD_CHECKING
+ *
+ * Enable the function mbedtls_ssl_check_record() which can be used to check
+ * the validity and authenticity of an incoming record, to verify that it has
+ * not been seen before. These checks are performed without modifying the
+ * externally visible state of the SSL context.
+ *
+ * See mbedtls_ssl_check_record() for more information.
+ *
+ * Uncomment to enable support for record checking.
+ */
+#define MBEDTLS_SSL_RECORD_CHECKING
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CONNECTION_ID
+ *
+ * Enable support for the DTLS Connection ID extension
+ * (version draft-ietf-tls-dtls-connection-id-05,
+ * https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05)
+ * which allows to identify DTLS connections across changes
+ * in the underlying transport.
+ *
+ * Setting this option enables the SSL APIs `mbedtls_ssl_set_cid()`,
+ * `mbedtls_ssl_get_peer_cid()` and `mbedtls_ssl_conf_cid()`.
+ * See the corresponding documentation for more information.
+ *
+ * \warning The Connection ID extension is still in draft state.
+ *          We make no stability promises for the availability
+ *          or the shape of the API controlled by this option.
+ *
+ * The maximum lengths of outgoing and incoming CIDs can be configured
+ * through the options
+ * - MBEDTLS_SSL_CID_OUT_LEN_MAX
+ * - MBEDTLS_SSL_CID_IN_LEN_MAX.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment to enable the Connection ID extension.
+ */
+//#define MBEDTLS_SSL_DTLS_CONNECTION_ID
+
+/**
+ * \def MBEDTLS_SSL_ASYNC_PRIVATE
+ *
+ * Enable asynchronous external private key operations in SSL. This allows
+ * you to configure an SSL connection to call an external cryptographic
+ * module to perform private key operations instead of performing the
+ * operation inside the library.
+ *
+ */
+//#define MBEDTLS_SSL_ASYNC_PRIVATE
+
+/**
+ * \def MBEDTLS_SSL_CONTEXT_SERIALIZATION
+ *
+ * Enable serialization of the TLS context structures, through use of the
+ * functions mbedtls_ssl_context_save() and mbedtls_ssl_context_load().
+ *
+ * This pair of functions allows one side of a connection to serialize the
+ * context associated with the connection, then free or re-use that context
+ * while the serialized state is persisted elsewhere, and finally deserialize
+ * that state to a live context for resuming read/write operations on the
+ * connection. From a protocol perspective, the state of the connection is
+ * unaffected, in particular this is entirely transparent to the peer.
+ *
+ * Note: this is distinct from TLS session resumption, which is part of the
+ * protocol and fully visible by the peer. TLS session resumption enables
+ * establishing new connections associated to a saved session with shorter,
+ * lighter handshakes, while context serialization is a local optimization in
+ * handling a single, potentially long-lived connection.
+ *
+ * Enabling these APIs makes some SSL structures larger, as 64 extra bytes are
+ * saved after the handshake to allow for more efficient serialization, so if
+ * you don't need this feature you'll save RAM by disabling it.
+ *
+ * Comment to disable the context serialization APIs.
+ */
+#define MBEDTLS_SSL_CONTEXT_SERIALIZATION
+
+/**
+ * \def MBEDTLS_SSL_DEBUG_ALL
+ *
+ * Enable the debug messages in SSL module for all issues.
+ * Debug messages have been disabled in some places to prevent timing
+ * attacks due to (unbalanced) debugging function calls.
+ *
+ * If you need all error reporting you should enable this during debugging,
+ * but remove this for production servers that should log as well.
+ *
+ * Uncomment this macro to report all debug messages on errors introducing
+ * a timing side-channel.
+ *
+ */
+//#define MBEDTLS_SSL_DEBUG_ALL
+
+/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
+ *
+ * Enable support for Encrypt-then-MAC, RFC 7366.
+ *
+ * This allows peers that both support it to use a more robust protection for
+ * ciphersuites using CBC, providing deep resistance against timing attacks
+ * on the padding or underlying cipher.
+ *
+ * This only affects CBC ciphersuites, and is useless if none is defined.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1    or
+ *           MBEDTLS_SSL_PROTO_TLS1_1  or
+ *           MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Encrypt-then-MAC
+ */
+#define MBEDTLS_SSL_ENCRYPT_THEN_MAC
+
+/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+ *
+ * Enable support for RFC 7627: Session Hash and Extended Master Secret
+ * Extension.
+ *
+ * This was introduced as "the proper fix" to the Triple Handshake familiy of
+ * attacks, but it is recommended to always use it (even if you disable
+ * renegotiation), since it actually fixes a more fundamental issue in the
+ * original SSL/TLS design, and has implications beyond Triple Handshake.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1    or
+ *           MBEDTLS_SSL_PROTO_TLS1_1  or
+ *           MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Extended Master Secret.
+ */
+#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+
+/**
+ * \def MBEDTLS_SSL_FALLBACK_SCSV
+ *
+ * Enable support for RFC 7507: Fallback Signaling Cipher Suite Value (SCSV)
+ * for Preventing Protocol Downgrade Attacks.
+ *
+ * For servers, it is recommended to always enable this, unless you support
+ * only one version of TLS, or know for sure that none of your clients
+ * implements a fallback strategy.
+ *
+ * For clients, you only need this if you're using a fallback strategy, which
+ * is not recommended in the first place, unless you absolutely need it to
+ * interoperate with buggy (version-intolerant) servers.
+ *
+ * Comment this macro to disable support for FALLBACK_SCSV
+ */
+#define MBEDTLS_SSL_FALLBACK_SCSV
+
+/**
+ * \def MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+ *
+ * This option controls the availability of the API mbedtls_ssl_get_peer_cert()
+ * giving access to the peer's certificate after completion of the handshake.
+ *
+ * Unless you need mbedtls_ssl_peer_cert() in your application, it is
+ * recommended to disable this option for reduced RAM usage.
+ *
+ * \note If this option is disabled, mbedtls_ssl_get_peer_cert() is still
+ *       defined, but always returns \c NULL.
+ *
+ * \note This option has no influence on the protection against the
+ *       triple handshake attack. Even if it is disabled, Mbed TLS will
+ *       still ensure that certificates do not change during renegotiation,
+ *       for exaple by keeping a hash of the peer's certificate.
+ *
+ * Comment this macro to disable storing the peer's certificate
+ * after the handshake.
+ */
+#define MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+
+/**
+ * \def MBEDTLS_SSL_HW_RECORD_ACCEL
+ *
+ * Enable hooking functions in SSL module for hardware acceleration of
+ * individual records.
+ *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
+ * Uncomment this macro to enable hooking functions.
+ */
+//#define MBEDTLS_SSL_HW_RECORD_ACCEL
+
+/**
+ * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING
+ *
+ * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0.
+ *
+ * This is a countermeasure to the BEAST attack, which also minimizes the risk
+ * of interoperability issues compared to sending 0-length records.
+ *
+ * Comment this macro to disable 1/n-1 record splitting.
+ */
+#define MBEDTLS_SSL_CBC_RECORD_SPLITTING
+
+/**
+ * \def MBEDTLS_SSL_RENEGOTIATION
+ *
+ * Enable support for TLS renegotiation.
+ *
+ * The two main uses of renegotiation are (1) refresh keys on long-lived
+ * connections and (2) client authentication after the initial handshake.
+ * If you don't need renegotiation, it's probably better to disable it, since
+ * it has been associated with security issues in the past and is easy to
+ * misuse/misunderstand.
+ *
+ * Comment this to disable support for renegotiation.
+ *
+ * \note   Even if this option is disabled, both client and server are aware
+ *         of the Renegotiation Indication Extension (RFC 5746) used to
+ *         prevent the SSL renegotiation attack (see RFC 5746 Sect. 1).
+ *         (See \c mbedtls_ssl_conf_legacy_renegotiation for the
+ *          configuration of this extension).
+ *
+ */
+#define MBEDTLS_SSL_RENEGOTIATION
+
+/**
+ * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+ *
+ * Enable support for receiving and parsing SSLv2 Client Hello messages for the
+ * SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
+ * Uncomment this macro to enable support for SSLv2 Client Hello messages.
+ */
+//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+
+/**
+ * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+ *
+ * Pick the ciphersuite according to the client's preferences rather than ours
+ * in the SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to respect client's ciphersuite order
+ */
+//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+
+/**
+ * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ *
+ * Enable support for RFC 6066 max_fragment_length extension in SSL.
+ *
+ * Comment this macro to disable support for the max_fragment_length extension
+ */
+#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+
+/**
+ * \def MBEDTLS_SSL_PROTO_SSL3
+ *
+ * Enable support for SSL 3.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ *           MBEDTLS_SHA1_C
+ *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
+ * Comment this macro to disable support for SSL 3.0
+ */
+//#define MBEDTLS_SSL_PROTO_SSL3
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1
+ *
+ * Enable support for TLS 1.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ *           MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.0
+ */
+#define MBEDTLS_SSL_PROTO_TLS1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_1
+ *
+ * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_MD5_C
+ *           MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.1 / DTLS 1.0
+ */
+#define MBEDTLS_SSL_PROTO_TLS1_1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C
+ *           (Depends on ciphersuites)
+ *
+ * Comment this macro to disable support for TLS 1.2 / DTLS 1.2
+ */
+#define MBEDTLS_SSL_PROTO_TLS1_2
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL
+ *
+ * This macro is used to selectively enable experimental parts
+ * of the code that contribute to the ongoing development of
+ * the prototype TLS 1.3 and DTLS 1.3 implementation, and provide
+ * no other purpose.
+ *
+ * \warning TLS 1.3 and DTLS 1.3 aren't yet supported in Mbed TLS,
+ *          and no feature exposed through this macro is part of the
+ *          public API. In particular, features under the control
+ *          of this macro are experimental and don't come with any
+ *          stability guarantees.
+ *
+ * Uncomment this macro to enable experimental and partial
+ * functionality specific to TLS 1.3.
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL
+
+/**
+ * \def MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Enable support for DTLS (all available versions).
+ *
+ * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0,
+ * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1_1
+ *        or MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for DTLS
+ */
+#define MBEDTLS_SSL_PROTO_DTLS
+
+/**
+ * \def MBEDTLS_SSL_ALPN
+ *
+ * Enable support for RFC 7301 Application Layer Protocol Negotiation.
+ *
+ * Comment this macro to disable support for ALPN.
+ */
+#define MBEDTLS_SSL_ALPN
+
+/**
+ * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY
+ *
+ * Enable support for the anti-replay mechanism in DTLS.
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *           MBEDTLS_SSL_PROTO_DTLS
+ *
+ * \warning Disabling this is often a security risk!
+ * See mbedtls_ssl_conf_dtls_anti_replay() for details.
+ *
+ * Comment this to disable anti-replay in DTLS.
+ */
+#define MBEDTLS_SSL_DTLS_ANTI_REPLAY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Enable support for HelloVerifyRequest on DTLS servers.
+ *
+ * This feature is highly recommended to prevent DTLS servers being used as
+ * amplifiers in DoS attacks against other hosts. It should always be enabled
+ * unless you know for sure amplification cannot be a problem in the
+ * environment in which your server operates.
+ *
+ * \warning Disabling this can ba a security risk! (see above)
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Comment this to disable support for HelloVerifyRequest.
+ */
+#define MBEDTLS_SSL_DTLS_HELLO_VERIFY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_SRTP
+ *
+ * Enable support for negotiation of DTLS-SRTP (RFC 5764)
+ * through the use_srtp extension.
+ *
+ * \note This feature provides the minimum functionality required
+ * to negotiate the use of DTLS-SRTP and to allow the derivation of
+ * the associated SRTP packet protection key material.
+ * In particular, the SRTP packet protection itself, as well as the
+ * demultiplexing of RTP and DTLS packets at the datagram layer
+ * (see Section 5 of RFC 5764), are not handled by this feature.
+ * Instead, after successful completion of a handshake negotiating
+ * the use of DTLS-SRTP, the extended key exporter API
+ * mbedtls_ssl_conf_export_keys_ext_cb() should be used to implement
+ * the key exporter described in Section 4.2 of RFC 5764 and RFC 5705
+ * (this is implemented in the SSL example programs).
+ * The resulting key should then be passed to an SRTP stack.
+ *
+ * Setting this option enables the runtime API
+ * mbedtls_ssl_conf_dtls_srtp_protection_profiles()
+ * through which the supported DTLS-SRTP protection
+ * profiles can be configured. You must call this API at
+ * runtime if you wish to negotiate the use of DTLS-SRTP.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment this to enable support for use_srtp extension.
+ */
+//#define MBEDTLS_SSL_DTLS_SRTP
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+ *
+ * Enable server-side support for clients that reconnect from the same port.
+ *
+ * Some clients unexpectedly close the connection and try to reconnect using the
+ * same source port. This needs special support from the server to handle the
+ * new connection securely, as described in section 4.2.8 of RFC 6347. This
+ * flag enables that support.
+ *
+ * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Comment this to disable support for clients reusing the source port.
+ */
+#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+
+/**
+ * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+ *
+ * Enable support for a limit of records with bad MAC.
+ *
+ * See mbedtls_ssl_conf_dtls_badmac_limit().
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ */
+#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+
+/**
+ * \def MBEDTLS_SSL_SESSION_TICKETS
+ *
+ * Enable support for RFC 5077 session tickets in SSL.
+ * Client-side, provides full support for session tickets (maintenance of a
+ * session store remains the responsibility of the application, though).
+ * Server-side, you also need to provide callbacks for writing and parsing
+ * tickets, including authenticated encryption and key management. Example
+ * callbacks are provided by MBEDTLS_SSL_TICKET_C.
+ *
+ * Comment this macro to disable support for SSL session tickets
+ */
+#define MBEDTLS_SSL_SESSION_TICKETS
+
+/**
+ * \def MBEDTLS_SSL_EXPORT_KEYS
+ *
+ * Enable support for exporting key block and master secret.
+ * This is required for certain users of TLS, e.g. EAP-TLS.
+ *
+ * Comment this macro to disable support for key export
+ */
+#define MBEDTLS_SSL_EXPORT_KEYS
+
+/**
+ * \def MBEDTLS_SSL_SERVER_NAME_INDICATION
+ *
+ * Enable support for RFC 6066 server name indication (SNI) in SSL.
+ *
+ * Requires: MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Comment this macro to disable support for server name indication in SSL
+ */
+#define MBEDTLS_SSL_SERVER_NAME_INDICATION
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC
+ *
+ * Enable support for RFC 6066 truncated HMAC in SSL.
+ *
+ * Comment this macro to disable support for truncated HMAC in SSL
+ */
+#define MBEDTLS_SSL_TRUNCATED_HMAC
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+ *
+ * Fallback to old (pre-2.7), non-conforming implementation of the truncated
+ * HMAC extension which also truncates the HMAC key. Note that this option is
+ * only meant for a transitory upgrade period and will be removed in a future
+ * version of the library.
+ *
+ * \warning The old implementation is non-compliant and has a security weakness
+ *          (2^80 brute force attack on the HMAC key used for a single,
+ *          uninterrupted connection). This should only be enabled temporarily
+ *          when (1) the use of truncated HMAC is essential in order to save
+ *          bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use
+ *          the fixed implementation yet (pre-2.7).
+ *
+ * \deprecated This option is deprecated and will be removed in a
+ *             future version of Mbed TLS.
+ *
+ * Uncomment to fallback to old, non-compliant truncated HMAC implementation.
+ *
+ * Requires: MBEDTLS_SSL_TRUNCATED_HMAC
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+
+/**
+ * \def MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+ *
+ * When this option is enabled, the SSL buffer will be resized automatically
+ * based on the negotiated maximum fragment length in each direction.
+ *
+ * Requires: MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ */
+//#define MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+
+/**
+ * \def MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
+ *
+ * Enable testing of the constant-flow nature of some sensitive functions with
+ * clang's MemorySanitizer. This causes some existing tests to also test
+ * this non-functional property of the code under test.
+ *
+ * This setting requires compiling with clang -fsanitize=memory. The test
+ * suites can then be run normally.
+ *
+ * \warning This macro is only used for extended testing; it is not considered
+ * part of the library's API, so it may change or disappear at any time.
+ *
+ * Uncomment to enable testing of the constant-flow nature of selected code.
+ */
+//#define MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN
+
+/**
+ * \def MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
+ *
+ * Enable testing of the constant-flow nature of some sensitive functions with
+ * valgrind's memcheck tool. This causes some existing tests to also test
+ * this non-functional property of the code under test.
+ *
+ * This setting requires valgrind headers for building, and is only useful for
+ * testing if the tests suites are run with valgrind's memcheck. This can be
+ * done for an individual test suite with 'valgrind ./test_suite_xxx', or when
+ * using CMake, this can be done for all test suites with 'make memcheck'.
+ *
+ * \warning This macro is only used for extended testing; it is not considered
+ * part of the library's API, so it may change or disappear at any time.
+ *
+ * Uncomment to enable testing of the constant-flow nature of selected code.
+ */
+//#define MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND
+
+/**
+ * \def MBEDTLS_TEST_HOOKS
+ *
+ * Enable features for invasive testing such as introspection functions and
+ * hooks for fault injection. This enables additional unit tests.
+ *
+ * Merely enabling this feature should not change the behavior of the product.
+ * It only adds new code, and new branching points where the default behavior
+ * is the same as when this feature is disabled.
+ * However, this feature increases the attack surface: there is an added
+ * risk of vulnerabilities, and more gadgets that can make exploits easier.
+ * Therefore this feature must never be enabled in production.
+ *
+ * See `docs/architecture/testing/mbed-crypto-invasive-testing.md` for more
+ * information.
+ *
+ * Uncomment to enable invasive tests.
+ */
+//#define MBEDTLS_TEST_HOOKS
+
+/**
+ * \def MBEDTLS_THREADING_ALT
+ *
+ * Provide your own alternate threading implementation.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to allow your own alternate threading implementation.
+ */
+//#define MBEDTLS_THREADING_ALT
+
+/**
+ * \def MBEDTLS_THREADING_PTHREAD
+ *
+ * Enable the pthread wrapper layer for the threading layer.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to enable pthread mutexes.
+ */
+//#define MBEDTLS_THREADING_PTHREAD
+
+/**
+ * \def MBEDTLS_USE_PSA_CRYPTO
+ *
+ * Make the X.509 and TLS library use PSA for cryptographic operations, and
+ * enable new APIs for using keys handled by PSA Crypto.
+ *
+ * \note Development of this option is currently in progress, and parts of Mbed
+ * TLS's X.509 and TLS modules are not ported to PSA yet. However, these parts
+ * will still continue to work as usual, so enabling this option should not
+ * break backwards compatibility.
+ *
+ * \note See docs/use-psa-crypto.md for a complete description of what this
+ * option currently does, and of parts that are not affected by it so far.
+ *
+ * \warning This option enables new Mbed TLS APIs which are currently
+ * considered experimental and may change in incompatible ways at any time.
+ * That is, the APIs enabled by this option are not covered by the usual
+ * promises of API stability.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C.
+ *
+ * Uncomment this to enable internal use of PSA Crypto and new associated APIs.
+ */
+//#define MBEDTLS_USE_PSA_CRYPTO
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_CONFIG
+ *
+ * This setting allows support for cryptographic mechanisms through the PSA
+ * API to be configured separately from support through the mbedtls API.
+ *
+ * Uncomment this to enable use of PSA Crypto configuration settings which
+ * can be found in include/psa/crypto_config.h.
+ *
+ * If you enable this option and write your own configuration file, you must
+ * include mbedtls/config_psa.h in your configuration file. The default
+ * provided mbedtls/config.h contains the necessary inclusion.
+ *
+ * This feature is still experimental and is not ready for production since
+ * it is not completed.
+ */
+//#define MBEDTLS_PSA_CRYPTO_CONFIG
+
+/**
+ * \def MBEDTLS_VERSION_FEATURES
+ *
+ * Allow run-time checking of compile-time enabled features. Thus allowing users
+ * to check at run-time if the library is for instance compiled with threading
+ * support via mbedtls_version_check_feature().
+ *
+ * Requires: MBEDTLS_VERSION_C
+ *
+ * Comment this to disable run-time checking and save ROM space
+ */
+#define MBEDTLS_VERSION_FEATURES
+
+/**
+ * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an extension in a v1 or v2 certificate.
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+
+/**
+ * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an unknown critical extension.
+ *
+ * \warning Depending on your PKI use, enabling this can be a security risk!
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+
+/**
+ * \def MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+ *
+ * If set, this enables the X.509 API `mbedtls_x509_crt_verify_with_ca_cb()`
+ * and the SSL API `mbedtls_ssl_conf_ca_cb()` which allow users to configure
+ * the set of trusted certificates through a callback instead of a linked
+ * list.
+ *
+ * This is useful for example in environments where a large number of trusted
+ * certificates is present and storing them in a linked list isn't efficient
+ * enough, or when the set of trusted certificates changes frequently.
+ *
+ * See the documentation of `mbedtls_x509_crt_verify_with_ca_cb()` and
+ * `mbedtls_ssl_conf_ca_cb()` for more information.
+ *
+ * Uncomment to enable trusted certificate callbacks.
+ */
+//#define MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+
+/**
+ * \def MBEDTLS_X509_CHECK_KEY_USAGE
+ *
+ * Enable verification of the keyUsage extension (CA and leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused
+ * (intermediate) CA and leaf certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip keyUsage checking for both CA and leaf certificates.
+ */
+#define MBEDTLS_X509_CHECK_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+ *
+ * Enable verification of the extendedKeyUsage extension (leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip extendedKeyUsage checking for certificates.
+ */
+#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
+ *
+ * Enable parsing and verification of X.509 certificates, CRLs and CSRS
+ * signed with RSASSA-PSS (aka PKCS#1 v2.1).
+ *
+ * Comment this macro to disallow using RSASSA-PSS in certificates.
+ */
+#define MBEDTLS_X509_RSASSA_PSS_SUPPORT
+
+/**
+ * \def MBEDTLS_ZLIB_SUPPORT
+ *
+ * If set, the SSL/TLS module uses ZLIB to support compression and
+ * decompression of packet data.
+ *
+ * \warning TLS-level compression MAY REDUCE SECURITY! See for example the
+ * CRIME attack. Before enabling this option, you should examine with care if
+ * CRIME or similar exploits may be applicable to your use case.
+ *
+ * \note Currently compression can't be used with DTLS.
+ *
+ * \deprecated This feature is deprecated and will be removed
+ *             in the next major revision of the library.
+ *
+ * Used in: library/ssl_tls.c
+ *          library/ssl_cli.c
+ *          library/ssl_srv.c
+ *
+ * This feature requires zlib library and headers to be present.
+ *
+ * Uncomment to enable use of ZLIB
+ */
+//#define MBEDTLS_ZLIB_SUPPORT
+/* \} name SECTION: mbed TLS feature support */
+
+/**
+ * \name SECTION: mbed TLS modules
+ *
+ * This section enables or disables entire modules in mbed TLS
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_AESNI_C
+ *
+ * Enable AES-NI support on x86-64.
+ *
+ * Module:  library/aesni.c
+ * Caller:  library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the AES-NI instructions on x86-64
+ */
+#define MBEDTLS_AESNI_C
+
+/**
+ * \def MBEDTLS_AES_C
+ *
+ * Enable the AES block cipher.
+ *
+ * Module:  library/aes.c
+ * Caller:  library/cipher.c
+ *          library/pem.c
+ *          library/ctr_drbg.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ *
+ * PEM_PARSE uses AES for decrypting encrypted keys.
+ */
+#define MBEDTLS_AES_C
+
+/**
+ * \def MBEDTLS_ARC4_C
+ *
+ * Enable the ARCFOUR stream cipher.
+ *
+ * Module:  library/arc4.c
+ * Caller:  library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ *      MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ *
+ * \warning   ARC4 is considered a weak cipher and its use constitutes a
+ *            security risk. If possible, we recommend avoidng dependencies on
+ *            it, and considering stronger ciphers instead.
+ *
+ */
+#define MBEDTLS_ARC4_C
+
+/**
+ * \def MBEDTLS_ASN1_PARSE_C
+ *
+ * Enable the generic ASN1 parser.
+ *
+ * Module:  library/asn1.c
+ * Caller:  library/x509.c
+ *          library/dhm.c
+ *          library/pkcs12.c
+ *          library/pkcs5.c
+ *          library/pkparse.c
+ */
+#define MBEDTLS_ASN1_PARSE_C
+
+/**
+ * \def MBEDTLS_ASN1_WRITE_C
+ *
+ * Enable the generic ASN1 writer.
+ *
+ * Module:  library/asn1write.c
+ * Caller:  library/ecdsa.c
+ *          library/pkwrite.c
+ *          library/x509_create.c
+ *          library/x509write_crt.c
+ *          library/x509write_csr.c
+ */
+#define MBEDTLS_ASN1_WRITE_C
+
+/**
+ * \def MBEDTLS_BASE64_C
+ *
+ * Enable the Base64 module.
+ *
+ * Module:  library/base64.c
+ * Caller:  library/pem.c
+ *
+ * This module is required for PEM support (required by X.509).
+ */
+#define MBEDTLS_BASE64_C
+
+/**
+ * \def MBEDTLS_BIGNUM_C
+ *
+ * Enable the multi-precision integer library.
+ *
+ * Module:  library/bignum.c
+ * Caller:  library/dhm.c
+ *          library/ecp.c
+ *          library/ecdsa.c
+ *          library/rsa.c
+ *          library/rsa_internal.c
+ *          library/ssl_tls.c
+ *
+ * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support.
+ */
+#define MBEDTLS_BIGNUM_C
+
+/**
+ * \def MBEDTLS_BLOWFISH_C
+ *
+ * Enable the Blowfish block cipher.
+ *
+ * Module:  library/blowfish.c
+ */
+#define MBEDTLS_BLOWFISH_C
+
+/**
+ * \def MBEDTLS_CAMELLIA_C
+ *
+ * Enable the Camellia block cipher.
+ *
+ * Module:  library/camellia.c
+ * Caller:  library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ */
+#define MBEDTLS_CAMELLIA_C
+
+/**
+ * \def MBEDTLS_ARIA_C
+ *
+ * Enable the ARIA block cipher.
+ *
+ * Module:  library/aria.c
+ * Caller:  library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *
+ *      MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384
+ */
+//#define MBEDTLS_ARIA_C
+
+/**
+ * \def MBEDTLS_CCM_C
+ *
+ * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher.
+ *
+ * Module:  library/ccm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-CCM ciphersuites, if other requisites are
+ * enabled as well.
+ */
+#define MBEDTLS_CCM_C
+
+/**
+ * \def MBEDTLS_CERTS_C
+ *
+ * Enable the test certificates.
+ *
+ * Module:  library/certs.c
+ * Caller:
+ *
+ * This module is used for testing (ssl_client/server).
+ */
+#define MBEDTLS_CERTS_C
+
+/**
+ * \def MBEDTLS_CHACHA20_C
+ *
+ * Enable the ChaCha20 stream cipher.
+ *
+ * Module:  library/chacha20.c
+ */
+#define MBEDTLS_CHACHA20_C
+
+/**
+ * \def MBEDTLS_CHACHAPOLY_C
+ *
+ * Enable the ChaCha20-Poly1305 AEAD algorithm.
+ *
+ * Module:  library/chachapoly.c
+ *
+ * This module requires: MBEDTLS_CHACHA20_C, MBEDTLS_POLY1305_C
+ */
+#define MBEDTLS_CHACHAPOLY_C
+
+/**
+ * \def MBEDTLS_CIPHER_C
+ *
+ * Enable the generic cipher layer.
+ *
+ * Module:  library/cipher.c
+ * Caller:  library/ssl_tls.c
+ *
+ * Uncomment to enable generic cipher wrappers.
+ */
+#define MBEDTLS_CIPHER_C
+
+/**
+ * \def MBEDTLS_CMAC_C
+ *
+ * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
+ * ciphers.
+ *
+ * \note When #MBEDTLS_CMAC_ALT is active, meaning that the underlying
+ *       implementation of the CMAC algorithm is provided by an alternate
+ *       implementation, that alternate implementation may opt to not support
+ *       AES-192 or 3DES as underlying block ciphers for the CMAC operation.
+ *
+ * Module:  library/cmac.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
+ *
+ */
+//#define MBEDTLS_CMAC_C
+
+/**
+ * \def MBEDTLS_CTR_DRBG_C
+ *
+ * Enable the CTR_DRBG AES-based random generator.
+ * The CTR_DRBG generator uses AES-256 by default.
+ * To use AES-128 instead, enable \c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY above.
+ *
+ * \note To achieve a 256-bit security strength with CTR_DRBG,
+ *       you must use AES-256 *and* use sufficient entropy.
+ *       See ctr_drbg.h for more details.
+ *
+ * Module:  library/ctr_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * This module provides the CTR_DRBG AES random number generator.
+ */
+#define MBEDTLS_CTR_DRBG_C
+
+/**
+ * \def MBEDTLS_DEBUG_C
+ *
+ * Enable the debug functions.
+ *
+ * Module:  library/debug.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *          library/ssl_tls.c
+ *
+ * This module provides debugging functions.
+ */
+#define MBEDTLS_DEBUG_C
+
+/**
+ * \def MBEDTLS_DES_C
+ *
+ * Enable the DES block cipher.
+ *
+ * Module:  library/des.c
+ * Caller:  library/pem.c
+ *          library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ *
+ * PEM_PARSE uses DES/3DES for decrypting encrypted keys.
+ *
+ * \warning   DES is considered a weak cipher and its use constitutes a
+ *            security risk. We recommend considering stronger ciphers instead.
+ */
+#define MBEDTLS_DES_C
+
+/**
+ * \def MBEDTLS_DHM_C
+ *
+ * Enable the Diffie-Hellman-Merkle module.
+ *
+ * Module:  library/dhm.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ *      DHE-RSA, DHE-PSK
+ *
+ * \warning    Using DHE constitutes a security risk as it
+ *             is not possible to validate custom DH parameters.
+ *             If possible, it is recommended users should consider
+ *             preferring other methods of key exchange.
+ *             See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_DHM_C
+
+/**
+ * \def MBEDTLS_ECDH_C
+ *
+ * Enable the elliptic curve Diffie-Hellman library.
+ *
+ * Module:  library/ecdh.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ *      ECDHE-ECDSA, ECDHE-RSA, DHE-PSK
+ *
+ * Requires: MBEDTLS_ECP_C
+ */
+#define MBEDTLS_ECDH_C
+
+/**
+ * \def MBEDTLS_ECDSA_C
+ *
+ * Enable the elliptic curve DSA library.
+ *
+ * Module:  library/ecdsa.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ *      ECDHE-ECDSA
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C,
+ *           and at least one MBEDTLS_ECP_DP_XXX_ENABLED for a
+ *           short Weierstrass curve.
+ */
+#define MBEDTLS_ECDSA_C
+
+/**
+ * \def MBEDTLS_ECJPAKE_C
+ *
+ * Enable the elliptic curve J-PAKE library.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Module:  library/ecjpake.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ *      ECJPAKE
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C
+ */
+//#define MBEDTLS_ECJPAKE_C
+
+/**
+ * \def MBEDTLS_ECP_C
+ *
+ * Enable the elliptic curve over GF(p) library.
+ *
+ * Module:  library/ecp.c
+ * Caller:  library/ecdh.c
+ *          library/ecdsa.c
+ *          library/ecjpake.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED
+ */
+#define MBEDTLS_ECP_C
+
+/**
+ * \def MBEDTLS_ENTROPY_C
+ *
+ * Enable the platform-specific entropy code.
+ *
+ * Module:  library/entropy.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C
+ *
+ * This module provides a generic entropy pool
+ */
+#define MBEDTLS_ENTROPY_C
+
+/**
+ * \def MBEDTLS_ERROR_C
+ *
+ * Enable error code to error string conversion.
+ *
+ * Module:  library/error.c
+ * Caller:
+ *
+ * This module enables mbedtls_strerror().
+ */
+#define MBEDTLS_ERROR_C
+
+/**
+ * \def MBEDTLS_GCM_C
+ *
+ * Enable the Galois/Counter Mode (GCM).
+ *
+ * Module:  library/gcm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C or MBEDTLS_ARIA_C
+ *
+ * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
+ * requisites are enabled as well.
+ */
+#define MBEDTLS_GCM_C
+
+/**
+ * \def MBEDTLS_HAVEGE_C
+ *
+ * Enable the HAVEGE random generator.
+ *
+ * Warning: the HAVEGE random generator is not suitable for virtualized
+ *          environments
+ *
+ * Warning: the HAVEGE random generator is dependent on timing and specific
+ *          processor traits. It is therefore not advised to use HAVEGE as
+ *          your applications primary random generator or primary entropy pool
+ *          input. As a secondary input to your entropy pool, it IS able add
+ *          the (limited) extra entropy it provides.
+ *
+ * Module:  library/havege.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_TIMING_C
+ *
+ * Uncomment to enable the HAVEGE random generator.
+ */
+//#define MBEDTLS_HAVEGE_C
+
+/**
+ * \def MBEDTLS_HKDF_C
+ *
+ * Enable the HKDF algorithm (RFC 5869).
+ *
+ * Module:  library/hkdf.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the Hashed Message Authentication Code
+ * (HMAC)-based key derivation function (HKDF).
+ */
+#define MBEDTLS_HKDF_C
+
+/**
+ * \def MBEDTLS_HMAC_DRBG_C
+ *
+ * Enable the HMAC_DRBG random generator.
+ *
+ * Module:  library/hmac_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * Uncomment to enable the HMAC_DRBG random number geerator.
+ */
+#define MBEDTLS_HMAC_DRBG_C
+
+/**
+ * \def MBEDTLS_NIST_KW_C
+ *
+ * Enable the Key Wrapping mode for 128-bit block ciphers,
+ * as defined in NIST SP 800-38F. Only KW and KWP modes
+ * are supported. At the moment, only AES is approved by NIST.
+ *
+ * Module:  library/nist_kw.c
+ *
+ * Requires: MBEDTLS_AES_C and MBEDTLS_CIPHER_C
+ */
+//#define MBEDTLS_NIST_KW_C
+
+/**
+ * \def MBEDTLS_MD_C
+ *
+ * Enable the generic message digest layer.
+ *
+ * Module:  library/md.c
+ * Caller:
+ *
+ * Uncomment to enable generic message digest wrappers.
+ */
+#define MBEDTLS_MD_C
+
+/**
+ * \def MBEDTLS_MD2_C
+ *
+ * Enable the MD2 hash algorithm.
+ *
+ * Module:  library/md2.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD2-signed X.509 certs.
+ *
+ * \warning   MD2 is considered a weak message digest and its use constitutes a
+ *            security risk. If possible, we recommend avoiding dependencies on
+ *            it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD2_C
+
+/**
+ * \def MBEDTLS_MD4_C
+ *
+ * Enable the MD4 hash algorithm.
+ *
+ * Module:  library/md4.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD4-signed X.509 certs.
+ *
+ * \warning   MD4 is considered a weak message digest and its use constitutes a
+ *            security risk. If possible, we recommend avoiding dependencies on
+ *            it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD4_C
+
+/**
+ * \def MBEDTLS_MD5_C
+ *
+ * Enable the MD5 hash algorithm.
+ *
+ * Module:  library/md5.c
+ * Caller:  library/md.c
+ *          library/pem.c
+ *          library/ssl_tls.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, and for TLS 1.2
+ * depending on the handshake parameters. Further, it is used for checking
+ * MD5-signed certificates, and for PBKDF1 when decrypting PEM-encoded
+ * encrypted keys.
+ *
+ * \warning   MD5 is considered a weak message digest and its use constitutes a
+ *            security risk. If possible, we recommend avoiding dependencies on
+ *            it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_MD5_C
+
+/**
+ * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Enable the buffer allocator implementation that makes use of a (stack)
+ * based buffer to 'allocate' dynamic memory. (replaces calloc() and free()
+ * calls)
+ *
+ * Module:  library/memory_buffer_alloc.c
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *           MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS)
+ *
+ * Enable this module to enable the buffer memory allocator.
+ */
+//#define MBEDTLS_MEMORY_BUFFER_ALLOC_C
+
+/**
+ * \def MBEDTLS_NET_C
+ *
+ * Enable the TCP and UDP over IPv6/IPv4 networking routines.
+ *
+ * \note This module only works on POSIX/Unix (including Linux, BSD and OS X)
+ * and Windows. For other platforms, you'll want to disable it, and write your
+ * own networking callbacks to be passed to \c mbedtls_ssl_set_bio().
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module:  library/net_sockets.c
+ *
+ * This module provides networking routines.
+ */
+#define MBEDTLS_NET_C
+
+/**
+ * \def MBEDTLS_OID_C
+ *
+ * Enable the OID database.
+ *
+ * Module:  library/oid.c
+ * Caller:  library/asn1write.c
+ *          library/pkcs5.c
+ *          library/pkparse.c
+ *          library/pkwrite.c
+ *          library/rsa.c
+ *          library/x509.c
+ *          library/x509_create.c
+ *          library/x509_crl.c
+ *          library/x509_crt.c
+ *          library/x509_csr.c
+ *          library/x509write_crt.c
+ *          library/x509write_csr.c
+ *
+ * This modules translates between OIDs and internal values.
+ */
+#define MBEDTLS_OID_C
+
+/**
+ * \def MBEDTLS_PADLOCK_C
+ *
+ * Enable VIA Padlock support on x86.
+ *
+ * Module:  library/padlock.c
+ * Caller:  library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the VIA PadLock on x86.
+ */
+#define MBEDTLS_PADLOCK_C
+
+/**
+ * \def MBEDTLS_PEM_PARSE_C
+ *
+ * Enable PEM decoding / parsing.
+ *
+ * Module:  library/pem.c
+ * Caller:  library/dhm.c
+ *          library/pkparse.c
+ *          library/x509_crl.c
+ *          library/x509_crt.c
+ *          library/x509_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for decoding / parsing PEM files.
+ */
+#define MBEDTLS_PEM_PARSE_C
+
+/**
+ * \def MBEDTLS_PEM_WRITE_C
+ *
+ * Enable PEM encoding / writing.
+ *
+ * Module:  library/pem.c
+ * Caller:  library/pkwrite.c
+ *          library/x509write_crt.c
+ *          library/x509write_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for encoding / writing PEM files.
+ */
+#define MBEDTLS_PEM_WRITE_C
+
+/**
+ * \def MBEDTLS_PK_C
+ *
+ * Enable the generic public (asymetric) key layer.
+ *
+ * Module:  library/pk.c
+ * Caller:  library/ssl_tls.c
+ *          library/ssl_cli.c
+ *          library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C
+ *
+ * Uncomment to enable generic public key wrappers.
+ */
+#define MBEDTLS_PK_C
+
+/**
+ * \def MBEDTLS_PK_PARSE_C
+ *
+ * Enable the generic public (asymetric) key parser.
+ *
+ * Module:  library/pkparse.c
+ * Caller:  library/x509_crt.c
+ *          library/x509_csr.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key parse functions.
+ */
+#define MBEDTLS_PK_PARSE_C
+
+/**
+ * \def MBEDTLS_PK_WRITE_C
+ *
+ * Enable the generic public (asymetric) key writer.
+ *
+ * Module:  library/pkwrite.c
+ * Caller:  library/x509write.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key write functions.
+ */
+#define MBEDTLS_PK_WRITE_C
+
+/**
+ * \def MBEDTLS_PKCS5_C
+ *
+ * Enable PKCS#5 functions.
+ *
+ * Module:  library/pkcs5.c
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the PKCS#5 functions.
+ */
+#define MBEDTLS_PKCS5_C
+
+/**
+ * \def MBEDTLS_PKCS11_C
+ *
+ * Enable wrapper for PKCS#11 smartcard support via the pkcs11-helper library.
+ *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
+ * Module:  library/pkcs11.c
+ * Caller:  library/pk.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * This module enables SSL/TLS PKCS #11 smartcard support.
+ * Requires the presence of the PKCS#11 helper library (libpkcs11-helper)
+ */
+//#define MBEDTLS_PKCS11_C
+
+/**
+ * \def MBEDTLS_PKCS12_C
+ *
+ * Enable PKCS#12 PBE functions.
+ * Adds algorithms for parsing PKCS#8 encrypted private keys
+ *
+ * Module:  library/pkcs12.c
+ * Caller:  library/pkparse.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * Can use:  MBEDTLS_ARC4_C
+ *
+ * This module enables PKCS#12 functions.
+ */
+#define MBEDTLS_PKCS12_C
+
+/**
+ * \def MBEDTLS_PLATFORM_C
+ *
+ * Enable the platform abstraction layer that allows you to re-assign
+ * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit().
+ *
+ * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT
+ * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned
+ * above to be specified at runtime or compile time respectively.
+ *
+ * \note This abstraction layer must be enabled on Windows (including MSYS2)
+ * as other module rely on it for a fixed snprintf implementation.
+ *
+ * Module:  library/platform.c
+ * Caller:  Most other .c files
+ *
+ * This module enables abstraction of common (libc) functions.
+ */
+#define MBEDTLS_PLATFORM_C
+
+/**
+ * \def MBEDTLS_POLY1305_C
+ *
+ * Enable the Poly1305 MAC algorithm.
+ *
+ * Module:  library/poly1305.c
+ * Caller:  library/chachapoly.c
+ */
+#define MBEDTLS_POLY1305_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_C
+ *
+ * Enable the Platform Security Architecture cryptography API.
+ *
+ * Module:  library/psa_crypto.c
+ *
+ * Requires: either MBEDTLS_CTR_DRBG_C and MBEDTLS_ENTROPY_C,
+ *           or MBEDTLS_HMAC_DRBG_C and MBEDTLS_ENTROPY_C,
+ *           or MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG.
+ *
+ */
+#define MBEDTLS_PSA_CRYPTO_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_SE_C
+ *
+ * Enable secure element support in the Platform Security Architecture
+ * cryptography API.
+ *
+ * \warning This feature is not yet suitable for production. It is provided
+ *          for API evaluation and testing purposes only.
+ *
+ * Module:  library/psa_crypto_se.c
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C, MBEDTLS_PSA_CRYPTO_STORAGE_C
+ *
+ */
+//#define MBEDTLS_PSA_CRYPTO_SE_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_STORAGE_C
+ *
+ * Enable the Platform Security Architecture persistent key storage.
+ *
+ * Module:  library/psa_crypto_storage.c
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C,
+ *           either MBEDTLS_PSA_ITS_FILE_C or a native implementation of
+ *           the PSA ITS interface
+ */
+#define MBEDTLS_PSA_CRYPTO_STORAGE_C
+
+/**
+ * \def MBEDTLS_PSA_ITS_FILE_C
+ *
+ * Enable the emulation of the Platform Security Architecture
+ * Internal Trusted Storage (PSA ITS) over files.
+ *
+ * Module:  library/psa_its_file.c
+ *
+ * Requires: MBEDTLS_FS_IO
+ */
+#define MBEDTLS_PSA_ITS_FILE_C
+
+/**
+ * \def MBEDTLS_RIPEMD160_C
+ *
+ * Enable the RIPEMD-160 hash algorithm.
+ *
+ * Module:  library/ripemd160.c
+ * Caller:  library/md.c
+ *
+ */
+#define MBEDTLS_RIPEMD160_C
+
+/**
+ * \def MBEDTLS_RSA_C
+ *
+ * Enable the RSA public-key cryptosystem.
+ *
+ * Module:  library/rsa.c
+ *          library/rsa_internal.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *          library/ssl_tls.c
+ *          library/x509.c
+ *
+ * This module is used by the following key exchanges:
+ *      RSA, DHE-RSA, ECDHE-RSA, RSA-PSK
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C
+ */
+#define MBEDTLS_RSA_C
+
+/**
+ * \def MBEDTLS_SHA1_C
+ *
+ * Enable the SHA1 cryptographic hash algorithm.
+ *
+ * Module:  library/sha1.c
+ * Caller:  library/md.c
+ *          library/ssl_cli.c
+ *          library/ssl_srv.c
+ *          library/ssl_tls.c
+ *          library/x509write_crt.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, for TLS 1.2
+ * depending on the handshake parameters, and for SHA1-signed certificates.
+ *
+ * \warning   SHA-1 is considered a weak message digest and its use constitutes
+ *            a security risk. If possible, we recommend avoiding dependencies
+ *            on it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_SHA1_C
+
+/**
+ * \def MBEDTLS_SHA256_C
+ *
+ * Enable the SHA-224 and SHA-256 cryptographic hash algorithms.
+ *
+ * Module:  library/sha256.c
+ * Caller:  library/entropy.c
+ *          library/md.c
+ *          library/ssl_cli.c
+ *          library/ssl_srv.c
+ *          library/ssl_tls.c
+ *
+ * This module adds support for SHA-224 and SHA-256.
+ * This module is required for the SSL/TLS 1.2 PRF function.
+ */
+#define MBEDTLS_SHA256_C
+
+/**
+ * \def MBEDTLS_SHA512_C
+ *
+ * Enable the SHA-384 and SHA-512 cryptographic hash algorithms.
+ *
+ * Module:  library/sha512.c
+ * Caller:  library/entropy.c
+ *          library/md.c
+ *          library/ssl_cli.c
+ *          library/ssl_srv.c
+ *
+ * This module adds support for SHA-384 and SHA-512.
+ */
+#define MBEDTLS_SHA512_C
+
+/**
+ * \def MBEDTLS_SSL_CACHE_C
+ *
+ * Enable simple SSL cache implementation.
+ *
+ * Module:  library/ssl_cache.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_CACHE_C
+ */
+#define MBEDTLS_SSL_CACHE_C
+
+/**
+ * \def MBEDTLS_SSL_COOKIE_C
+ *
+ * Enable basic implementation of DTLS cookies for hello verification.
+ *
+ * Module:  library/ssl_cookie.c
+ * Caller:
+ */
+#define MBEDTLS_SSL_COOKIE_C
+
+/**
+ * \def MBEDTLS_SSL_TICKET_C
+ *
+ * Enable an implementation of TLS server-side callbacks for session tickets.
+ *
+ * Module:  library/ssl_ticket.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_CIPHER_C
+ */
+#define MBEDTLS_SSL_TICKET_C
+
+/**
+ * \def MBEDTLS_SSL_CLI_C
+ *
+ * Enable the SSL/TLS client code.
+ *
+ * Module:  library/ssl_cli.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS client support.
+ */
+#define MBEDTLS_SSL_CLI_C
+
+/**
+ * \def MBEDTLS_SSL_SRV_C
+ *
+ * Enable the SSL/TLS server code.
+ *
+ * Module:  library/ssl_srv.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS server support.
+ */
+#define MBEDTLS_SSL_SRV_C
+
+/**
+ * \def MBEDTLS_SSL_TLS_C
+ *
+ * Enable the generic SSL/TLS code.
+ *
+ * Module:  library/ssl_tls.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ *           and at least one of the MBEDTLS_SSL_PROTO_XXX defines
+ *
+ * This module is required for SSL/TLS.
+ */
+#define MBEDTLS_SSL_TLS_C
+
+/**
+ * \def MBEDTLS_THREADING_C
+ *
+ * Enable the threading abstraction layer.
+ * By default mbed TLS assumes it is used in a non-threaded environment or that
+ * contexts are not shared between threads. If you do intend to use contexts
+ * between threads, you will need to enable this layer to prevent race
+ * conditions. See also our Knowledge Base article about threading:
+ * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
+ *
+ * Module:  library/threading.c
+ *
+ * This allows different threading implementations (self-implemented or
+ * provided).
+ *
+ * You will have to enable either MBEDTLS_THREADING_ALT or
+ * MBEDTLS_THREADING_PTHREAD.
+ *
+ * Enable this layer to allow use of mutexes within mbed TLS
+ */
+//#define MBEDTLS_THREADING_C
+
+/**
+ * \def MBEDTLS_TIMING_C
+ *
+ * Enable the semi-portable timing interface.
+ *
+ * \note The provided implementation only works on POSIX/Unix (including Linux,
+ * BSD and OS X) and Windows. On other platforms, you can either disable that
+ * module and provide your own implementations of the callbacks needed by
+ * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide
+ * your own implementation of the whole module by setting
+ * \c MBEDTLS_TIMING_ALT in the current file.
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module:  library/timing.c
+ * Caller:  library/havege.c
+ *
+ * This module is used by the HAVEGE random number generator.
+ */
+#define MBEDTLS_TIMING_C
+
+/**
+ * \def MBEDTLS_VERSION_C
+ *
+ * Enable run-time version information.
+ *
+ * Module:  library/version.c
+ *
+ * This module provides run-time version information.
+ */
+#define MBEDTLS_VERSION_C
+
+/**
+ * \def MBEDTLS_X509_USE_C
+ *
+ * Enable X.509 core for using certificates.
+ *
+ * Module:  library/x509.c
+ * Caller:  library/x509_crl.c
+ *          library/x509_crt.c
+ *          library/x509_csr.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C,
+ *           MBEDTLS_PK_PARSE_C
+ *
+ * This module is required for the X.509 parsing modules.
+ */
+#define MBEDTLS_X509_USE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Enable X.509 certificate parsing.
+ *
+ * Module:  library/x509_crt.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *          library/ssl_tls.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 certificate parsing.
+ */
+#define MBEDTLS_X509_CRT_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CRL_PARSE_C
+ *
+ * Enable X.509 CRL parsing.
+ *
+ * Module:  library/x509_crl.c
+ * Caller:  library/x509_crt.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 CRL parsing.
+ */
+#define MBEDTLS_X509_CRL_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_PARSE_C
+ *
+ * Enable X.509 Certificate Signing Request (CSR) parsing.
+ *
+ * Module:  library/x509_csr.c
+ * Caller:  library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is used for reading X.509 certificate request.
+ */
+#define MBEDTLS_X509_CSR_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CREATE_C
+ *
+ * Enable X.509 core for creating certificates.
+ *
+ * Module:  library/x509_create.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C
+ *
+ * This module is the basis for creating X.509 certificates and CSRs.
+ */
+#define MBEDTLS_X509_CREATE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_WRITE_C
+ *
+ * Enable creating X.509 certificates.
+ *
+ * Module:  library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate creation.
+ */
+#define MBEDTLS_X509_CRT_WRITE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_WRITE_C
+ *
+ * Enable creating X.509 Certificate Signing Requests (CSR).
+ *
+ * Module:  library/x509_csr_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate request writing.
+ */
+#define MBEDTLS_X509_CSR_WRITE_C
+
+/**
+ * \def MBEDTLS_XTEA_C
+ *
+ * Enable the XTEA block cipher.
+ *
+ * Module:  library/xtea.c
+ * Caller:
+ */
+#define MBEDTLS_XTEA_C
+
+/* \} name SECTION: mbed TLS modules */
+
+/**
+ * \name SECTION: Module configuration options
+ *
+ * This section allows for the setting of module specific sizes and
+ * configuration options. The default values are already present in the
+ * relevant header files and should suffice for the regular use cases.
+ *
+ * Our advice is to enable options and change their values here
+ * only if you have a good reason and know the consequences.
+ *
+ * Please check the respective header file for documentation on these
+ * parameters (to prevent duplicate documentation).
+ * \{
+ */
+
+/* MPI / BIGNUM options */
+//#define MBEDTLS_MPI_WINDOW_SIZE            6 /**< Maximum window size used. */
+//#define MBEDTLS_MPI_MAX_SIZE            1024 /**< Maximum number of bytes for usable MPIs. */
+
+/* CTR_DRBG options */
+//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN               48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */
+//#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL        10000 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_CTR_DRBG_MAX_INPUT                256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_CTR_DRBG_MAX_REQUEST             1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT           384 /**< Maximum size of (re)seed buffer */
+
+/* HMAC_DRBG options */
+//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL   10000 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_HMAC_DRBG_MAX_INPUT           256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST        1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT      384 /**< Maximum size of (re)seed buffer */
+
+/* ECP options */
+//#define MBEDTLS_ECP_MAX_BITS             521 /**< Maximum bit size of groups. Normally determined automatically from the configured curves. */
+//#define MBEDTLS_ECP_WINDOW_SIZE            4 /**< Maximum window size used */
+//#define MBEDTLS_ECP_FIXED_POINT_OPTIM      1 /**< Enable fixed-point speed-up */
+
+/* Entropy options */
+//#define MBEDTLS_ENTROPY_MAX_SOURCES                20 /**< Maximum number of sources supported */
+//#define MBEDTLS_ENTROPY_MAX_GATHER                128 /**< Maximum amount requested from entropy sources */
+//#define MBEDTLS_ENTROPY_MIN_HARDWARE               32 /**< Default minimum number of bytes required for the hardware entropy source mbedtls_hardware_poll() before entropy is released */
+
+/* Memory buffer allocator options */
+//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE      4 /**< Align on multiples of this value */
+
+/* Platform options */
+//#define MBEDTLS_PLATFORM_STD_MEM_HDR   <stdlib.h> /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */
+//#define MBEDTLS_PLATFORM_STD_CALLOC        calloc /**< Default allocator to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_FREE            free /**< Default free to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT            exit /**< Default exit to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_TIME            time /**< Default time to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_STD_FPRINTF      fprintf /**< Default fprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_PRINTF        printf /**< Default printf to use, can be undefined */
+/* Note: your snprintf must correctly zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_STD_SNPRINTF    snprintf /**< Default snprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS       0 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE       1 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_READ   mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE  mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE  "seedfile" /**< Seed file to read/write with default implementation */
+
+/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */
+/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */
+//#define MBEDTLS_PLATFORM_CALLOC_MACRO        calloc /**< Default allocator macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_FREE_MACRO            free /**< Default free macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_EXIT_MACRO            exit /**< Default exit macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_TIME_MACRO            time /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_TIME_TYPE_MACRO       time_t /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_FPRINTF_MACRO      fprintf /**< Default fprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_PRINTF_MACRO        printf /**< Default printf macro to use, can be undefined */
+/* Note: your snprintf must correctly zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO    snprintf /**< Default snprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_VSNPRINTF_MACRO    vsnprintf /**< Default vsnprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO   mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO  mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+
+/**
+ * \brief       This macro is invoked by the library when an invalid parameter
+ *              is detected that is only checked with #MBEDTLS_CHECK_PARAMS
+ *              (see the documentation of that option for context).
+ *
+ *              When you leave this undefined here, the library provides
+ *              a default definition. If the macro #MBEDTLS_CHECK_PARAMS_ASSERT
+ *              is defined, the default definition is `assert(cond)`,
+ *              otherwise the default definition calls a function
+ *              mbedtls_param_failed(). This function is declared in
+ *              `platform_util.h` for the benefit of the library, but
+ *              you need to define in your application.
+ *
+ *              When you define this here, this replaces the default
+ *              definition in platform_util.h (which no longer declares the
+ *              function mbedtls_param_failed()) and it is your responsibility
+ *              to make sure this macro expands to something suitable (in
+ *              particular, that all the necessary declarations are visible
+ *              from within the library - you can ensure that by providing
+ *              them in this file next to the macro definition).
+ *              If you define this macro to call `assert`, also define
+ *              #MBEDTLS_CHECK_PARAMS_ASSERT so that library source files
+ *              include `<assert.h>`.
+ *
+ *              Note that you may define this macro to expand to nothing, in
+ *              which case you don't have to worry about declarations or
+ *              definitions. However, you will then be notified about invalid
+ *              parameters only in non-void functions, and void function will
+ *              just silently return early on invalid parameters, which
+ *              partially negates the benefits of enabling
+ *              #MBEDTLS_CHECK_PARAMS in the first place, so is discouraged.
+ *
+ * \param cond  The expression that should evaluate to true, but doesn't.
+ */
+//#define MBEDTLS_PARAM_FAILED( cond )               assert( cond )
+
+/** \def MBEDTLS_CHECK_RETURN
+ *
+ * This macro is used at the beginning of the declaration of a function
+ * to indicate that its return value should be checked. It should
+ * instruct the compiler to emit a warning or an error if the function
+ * is called without checking its return value.
+ *
+ * There is a default implementation for popular compilers in platform_util.h.
+ * You can override the default implementation by defining your own here.
+ *
+ * If the implementation here is empty, this will effectively disable the
+ * checking of functions' return values.
+ */
+//#define MBEDTLS_CHECK_RETURN __attribute__((__warn_unused_result__))
+
+/** \def MBEDTLS_IGNORE_RETURN
+ *
+ * This macro requires one argument, which should be a C function call.
+ * If that function call would cause a #MBEDTLS_CHECK_RETURN warning, this
+ * warning is suppressed.
+ */
+//#define MBEDTLS_IGNORE_RETURN( result ) ((void) !(result))
+
+/* PSA options */
+/**
+ * Use HMAC_DRBG with the specified hash algorithm for HMAC_DRBG for the
+ * PSA crypto subsystem.
+ *
+ * If this option is unset:
+ * - If CTR_DRBG is available, the PSA subsystem uses it rather than HMAC_DRBG.
+ * - Otherwise, the PSA subsystem uses HMAC_DRBG with either
+ *   #MBEDTLS_MD_SHA512 or #MBEDTLS_MD_SHA256 based on availability and
+ *   on unspecified heuristics.
+ */
+//#define MBEDTLS_PSA_HMAC_DRBG_MD_TYPE MBEDTLS_MD_SHA256
+
+/** \def MBEDTLS_PSA_KEY_SLOT_COUNT
+ * Restrict the PSA library to supporting a maximum amount of simultaneously
+ * loaded keys. A loaded key is a key stored by the PSA Crypto core as a
+ * volatile key, or a persistent key which is loaded temporarily by the
+ * library as part of a crypto operation in flight.
+ *
+ * If this option is unset, the library will fall back to a default value of
+ * 32 keys.
+ */
+//#define MBEDTLS_PSA_KEY_SLOT_COUNT 32
+
+/* SSL Cache options */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT       86400 /**< 1 day  */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES      50 /**< Maximum entries in cache */
+
+/* SSL options */
+
+/** \def MBEDTLS_SSL_MAX_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming and outgoing plaintext fragments.
+ *
+ * This determines the size of both the incoming and outgoing TLS I/O buffers
+ * in such a way that both are capable of holding the specified amount of
+ * plaintext data, regardless of the protection mechanism used.
+ *
+ * To configure incoming and outgoing I/O buffers separately, use
+ * #MBEDTLS_SSL_IN_CONTENT_LEN and #MBEDTLS_SSL_OUT_CONTENT_LEN,
+ * which overwrite the value set by this option.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ *       recommended to use the Maximum Fragment Length (MFL) extension to
+ *       inform the server about this limitation. On the server, there
+ *       is no supported, standardized way of informing the client about
+ *       restriction on the maximum size of incoming messages, and unless
+ *       the limitation has been communicated by other means, it is recommended
+ *       to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ *       while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of both
+ * incoming and outgoing I/O buffers.
+ */
+//#define MBEDTLS_SSL_MAX_CONTENT_LEN             16384
+
+/** \def MBEDTLS_SSL_IN_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming plaintext fragments.
+ *
+ * This determines the size of the incoming TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option is undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ *       recommended to use the Maximum Fragment Length (MFL) extension to
+ *       inform the server about this limitation. On the server, there
+ *       is no supported, standardized way of informing the client about
+ *       restriction on the maximum size of incoming messages, and unless
+ *       the limitation has been communicated by other means, it is recommended
+ *       to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ *       while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of the incoming I/O buffer
+ * independently of the outgoing I/O buffer.
+ */
+//#define MBEDTLS_SSL_IN_CONTENT_LEN              16384
+
+/** \def MBEDTLS_SSL_CID_IN_LEN_MAX
+ *
+ * The maximum length of CIDs used for incoming DTLS messages.
+ *
+ */
+//#define MBEDTLS_SSL_CID_IN_LEN_MAX 32
+
+/** \def MBEDTLS_SSL_CID_OUT_LEN_MAX
+ *
+ * The maximum length of CIDs used for outgoing DTLS messages.
+ *
+ */
+//#define MBEDTLS_SSL_CID_OUT_LEN_MAX 32
+
+/** \def MBEDTLS_SSL_CID_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * when using the Connection ID extension in DTLS 1.2.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ *
+ */
+//#define MBEDTLS_SSL_CID_PADDING_GRANULARITY 16
+
+/** \def MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * in TLS 1.3.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ */
+//#define MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY 1
+
+/** \def MBEDTLS_SSL_OUT_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of outgoing plaintext fragments.
+ *
+ * This determines the size of the outgoing TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * It is possible to save RAM by setting a smaller outward buffer, while keeping
+ * the default inward 16384 byte buffer to conform to the TLS specification.
+ *
+ * The minimum required outward buffer size is determined by the handshake
+ * protocol's usage. Handshaking will fail if the outward buffer is too small.
+ * The specific size requirement depends on the configured ciphers and any
+ * certificate data which is sent during the handshake.
+ *
+ * Uncomment to set the maximum plaintext size of the outgoing I/O buffer
+ * independently of the incoming I/O buffer.
+ */
+//#define MBEDTLS_SSL_OUT_CONTENT_LEN             16384
+
+/** \def MBEDTLS_SSL_DTLS_MAX_BUFFERING
+ *
+ * Maximum number of heap-allocated bytes for the purpose of
+ * DTLS handshake message reassembly and future message buffering.
+ *
+ * This should be at least 9/8 * MBEDTLS_SSL_IN_CONTENT_LEN
+ * to account for a reassembled handshake message of maximum size,
+ * together with its reassembly bitmap.
+ *
+ * A value of 2 * MBEDTLS_SSL_IN_CONTENT_LEN (32768 by default)
+ * should be sufficient for all practical situations as it allows
+ * to reassembly a large handshake message (such as a certificate)
+ * while buffering multiple smaller handshake messages.
+ *
+ */
+//#define MBEDTLS_SSL_DTLS_MAX_BUFFERING             32768
+
+//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME     86400 /**< Lifetime of session tickets (if enabled) */
+//#define MBEDTLS_PSK_MAX_LEN               32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */
+//#define MBEDTLS_SSL_COOKIE_TIMEOUT        60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
+
+/** \def MBEDTLS_TLS_EXT_CID
+ *
+ * At the time of writing, the CID extension has not been assigned its
+ * final value. Set this configuration option to make Mbed TLS use a
+ * different value.
+ *
+ * A future minor revision of Mbed TLS may change the default value of
+ * this option to match evolving standards and usage.
+ */
+//#define MBEDTLS_TLS_EXT_CID                        254
+
+/**
+ * Complete list of ciphersuites to use, in order of preference.
+ *
+ * \warning No dependency checking is done on that field! This option can only
+ * be used to restrict the set of available ciphersuites. It is your
+ * responsibility to make sure the needed modules are active.
+ *
+ * Use this to save a few hundred bytes of ROM (default ordering of all
+ * available ciphersuites) and a few to a few hundred bytes of RAM.
+ *
+ * The value below is only an example, not the default.
+ */
+//#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+
+/* X509 options */
+//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA   8   /**< Maximum number of intermediate CAs in a verification chain. */
+//#define MBEDTLS_X509_MAX_FILE_PATH_LEN     512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */
+
+/**
+ * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
+ * signature and ciphersuite selection. Without this build-time option, SHA-1
+ * support must be activated explicitly through mbedtls_ssl_conf_sig_hashes.
+ * The use of SHA-1 in TLS <= 1.1 and in HMAC-SHA-1 is always allowed by
+ * default. At the time of writing, there is no practical attack on the use
+ * of SHA-1 in handshake signatures, hence this option is turned on by default
+ * to preserve compatibility with existing peers, but the general
+ * warning applies nonetheless:
+ *
+ * \warning   SHA-1 is considered a weak message digest and its use constitutes
+ *            a security risk. If possible, we recommend avoiding dependencies
+ *            on it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
+
+/**
+ * Uncomment the macro to let mbed TLS use your alternate implementation of
+ * mbedtls_platform_zeroize(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * mbedtls_platform_zeroize() is a widely used function across the library to
+ * zero a block of memory. The implementation is expected to be secure in the
+ * sense that it has been written to prevent the compiler from removing calls
+ * to mbedtls_platform_zeroize() as part of redundant code elimination
+ * optimizations. However, it is difficult to guarantee that calls to
+ * mbedtls_platform_zeroize() will not be optimized by the compiler as older
+ * versions of the C language standards do not provide a secure implementation
+ * of memset(). Therefore, MBEDTLS_PLATFORM_ZEROIZE_ALT enables users to
+ * configure their own implementation of mbedtls_platform_zeroize(), for
+ * example by using directives specific to their compiler, features from newer
+ * C standards (e.g using memset_s() in C11) or calling a secure memset() from
+ * their system (e.g explicit_bzero() in BSD).
+ */
+//#define MBEDTLS_PLATFORM_ZEROIZE_ALT
+
+/**
+ * Uncomment the macro to let Mbed TLS use your alternate implementation of
+ * mbedtls_platform_gmtime_r(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * gmtime() is not a thread-safe function as defined in the C standard. The
+ * library will try to use safer implementations of this function, such as
+ * gmtime_r() when available. However, if Mbed TLS cannot identify the target
+ * system, the implementation of mbedtls_platform_gmtime_r() will default to
+ * using the standard gmtime(). In this case, calls from the library to
+ * gmtime() will be guarded by the global mutex mbedtls_threading_gmtime_mutex
+ * if MBEDTLS_THREADING_C is enabled. We recommend that calls from outside the
+ * library are also guarded with this mutex to avoid race conditions. However,
+ * if the macro MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, Mbed TLS will
+ * unconditionally use the implementation for mbedtls_platform_gmtime_r()
+ * supplied at compile time.
+ */
+//#define MBEDTLS_PLATFORM_GMTIME_R_ALT
+
+/**
+ * Enable the verified implementations of ECDH primitives from Project Everest
+ * (currently only Curve25519). This feature changes the layout of ECDH
+ * contexts and therefore is a compatibility break for applications that access
+ * fields of a mbedtls_ecdh_context structure directly. See also
+ * MBEDTLS_ECDH_LEGACY_CONTEXT in include/mbedtls/ecdh.h.
+ */
+//#define MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED
+
+/* \} name SECTION: Customisation configuration options */
+
+/* Target and application specific configurations
+ *
+ * Allow user to override any previous default.
+ *
+ */
+#if defined(MBEDTLS_USER_CONFIG_FILE)
+#include MBEDTLS_USER_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+#include "mbedtls/config_psa.h"
+#endif
+
+#include "mbedtls/check_config.h"
+
+#endif /* MBEDTLS_CONFIG_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/config_psa.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/config_psa.h
new file mode 100644
index 00000000000..189f6c21734
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/config_psa.h
@@ -0,0 +1,836 @@
+/**
+ * \file mbedtls/config_psa.h
+ * \brief PSA crypto configuration options (set of defines)
+ *
+ *  This set of compile-time options takes settings defined in
+ *  include/mbedtls/config.h and include/psa/crypto_config.h and uses
+ *  those definitions to define symbols used in the library code.
+ *
+ *  Users and integrators should not edit this file, please edit
+ *  include/mbedtls/config.h for MBETLS_XXX settings or
+ *  include/psa/crypto_config.h for PSA_WANT_XXX settings.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CONFIG_PSA_H
+#define MBEDTLS_CONFIG_PSA_H
+
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+#include "psa/crypto_config.h"
+#endif /* defined(MBEDTLS_PSA_CRYPTO_CONFIG) */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+/****************************************************************/
+/* De facto synonyms */
+/****************************************************************/
+
+#if defined(PSA_WANT_ALG_ECDSA_ANY) && !defined(PSA_WANT_ALG_ECDSA)
+#define PSA_WANT_ALG_ECDSA PSA_WANT_ALG_ECDSA_ANY
+#elif !defined(PSA_WANT_ALG_ECDSA_ANY) && defined(PSA_WANT_ALG_ECDSA)
+#define PSA_WANT_ALG_ECDSA_ANY PSA_WANT_ALG_ECDSA
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW) && !defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW
+#elif !defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW) && defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW PSA_WANT_ALG_RSA_PKCS1V15_SIGN
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_PSS_ANY_SALT) && !defined(PSA_WANT_ALG_RSA_PSS)
+#define PSA_WANT_ALG_RSA_PSS PSA_WANT_ALG_RSA_PSS_ANY_SALT
+#elif !defined(PSA_WANT_ALG_RSA_PSS_ANY_SALT) && defined(PSA_WANT_ALG_RSA_PSS)
+#define PSA_WANT_ALG_RSA_PSS_ANY_SALT PSA_WANT_ALG_RSA_PSS
+#endif
+
+
+
+/****************************************************************/
+/* Require built-in implementations based on PSA requirements */
+/****************************************************************/
+
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+
+#if defined(PSA_WANT_ALG_DETERMINISTIC_ECDSA)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_DETERMINISTIC_ECDSA)
+#define MBEDTLS_PSA_BUILTIN_ALG_DETERMINISTIC_ECDSA 1
+#define MBEDTLS_ECDSA_DETERMINISTIC
+#define MBEDTLS_ECDSA_C
+#define MBEDTLS_HMAC_DRBG_C
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_DETERMINISTIC_ECDSA */
+#endif /* PSA_WANT_ALG_DETERMINISTIC_ECDSA */
+
+#if defined(PSA_WANT_ALG_ECDH)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_ECDH)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDH 1
+#define MBEDTLS_ECDH_C
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_ECDH */
+#endif /* PSA_WANT_ALG_ECDH */
+
+#if defined(PSA_WANT_ALG_ECDSA)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_ECDSA)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDSA 1
+#define MBEDTLS_ECDSA_C
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_ECDSA */
+#endif /* PSA_WANT_ALG_ECDSA */
+
+#if defined(PSA_WANT_ALG_HKDF)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_HKDF)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define MBEDTLS_PSA_BUILTIN_ALG_HKDF 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_HKDF */
+#endif /* PSA_WANT_ALG_HKDF */
+
+#if defined(PSA_WANT_ALG_HMAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_HMAC)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_HMAC */
+#endif /* PSA_WANT_ALG_HMAC */
+
+#if defined(PSA_WANT_ALG_MD2) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD2)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD2 1
+#define MBEDTLS_MD2_C
+#endif
+
+#if defined(PSA_WANT_ALG_MD4) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD4)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD4 1
+#define MBEDTLS_MD4_C
+#endif
+
+#if defined(PSA_WANT_ALG_MD5) && !defined(MBEDTLS_PSA_ACCEL_ALG_MD5)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD5 1
+#define MBEDTLS_MD5_C
+#endif
+
+#if defined(PSA_WANT_ALG_RIPEMD160) && !defined(MBEDTLS_PSA_ACCEL_ALG_RIPEMD160)
+#define MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160 1
+#define MBEDTLS_RIPEMD160_C
+#endif
+
+#if defined(PSA_WANT_ALG_RSA_OAEP)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_OAEP)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_OAEP 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V21
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_OAEP */
+#endif /* PSA_WANT_ALG_RSA_OAEP */
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_CRYPT)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_CRYPT)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_CRYPT 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V15
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_CRYPT */
+#endif /* PSA_WANT_ALG_RSA_PKCS1V15_CRYPT */
+
+#if defined(PSA_WANT_ALG_RSA_PKCS1V15_SIGN)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_SIGN)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_SIGN 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V15
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PKCS1V15_SIGN */
+#endif /* PSA_WANT_ALG_RSA_PKCS1V15_SIGN */
+
+#if defined(PSA_WANT_ALG_RSA_PSS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_RSA_PSS)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PSS 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PKCS1_V21
+#define MBEDTLS_MD_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_RSA_PSS */
+#endif /* PSA_WANT_ALG_RSA_PSS */
+
+#if defined(PSA_WANT_ALG_SHA_1) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_1)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_1 1
+#define MBEDTLS_SHA1_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_224) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_224)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_224 1
+#define MBEDTLS_SHA256_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_256) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_256)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_256 1
+#define MBEDTLS_SHA256_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_384) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_384)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_384 1
+#define MBEDTLS_SHA512_C
+#endif
+
+#if defined(PSA_WANT_ALG_SHA_512) && !defined(MBEDTLS_PSA_ACCEL_ALG_SHA_512)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_512 1
+#define MBEDTLS_SHA512_C
+#endif
+
+#if defined(PSA_WANT_ALG_TLS12_PRF)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_TLS12_PRF)
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_TLS12_PRF */
+#endif /* PSA_WANT_ALG_TLS12_PRF */
+
+#if defined(PSA_WANT_ALG_TLS12_PSK_TO_MS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_TLS12_PSK_TO_MS)
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_TLS12_PSK_TO_MS */
+#endif /* PSA_WANT_ALG_TLS12_PSK_TO_MS */
+
+#if defined(PSA_WANT_KEY_TYPE_ECC_KEY_PAIR)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_KEY_PAIR)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_KEY_PAIR 1
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_KEY_PAIR */
+#endif /* PSA_WANT_KEY_TYPE_ECC_KEY_PAIR */
+
+#if defined(PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_PUBLIC_KEY)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_PUBLIC_KEY 1
+#define MBEDTLS_ECP_C
+#define MBEDTLS_BIGNUM_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ECC_PUBLIC_KEY */
+#endif /* PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY */
+
+#if defined(PSA_WANT_KEY_TYPE_RSA_KEY_PAIR)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_KEY_PAIR)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_KEY_PAIR 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_GENPRIME
+#define MBEDTLS_PK_PARSE_C
+#define MBEDTLS_PK_WRITE_C
+#define MBEDTLS_PK_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_KEY_PAIR */
+#endif /* PSA_WANT_KEY_TYPE_RSA_KEY_PAIR */
+
+#if defined(PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_PUBLIC_KEY)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_PUBLIC_KEY 1
+#define MBEDTLS_RSA_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PK_PARSE_C
+#define MBEDTLS_PK_WRITE_C
+#define MBEDTLS_PK_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_RSA_PUBLIC_KEY */
+#endif /* PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY */
+
+/* If any of the block modes are requested that don't have an
+ * associated HW assist, define PSA_HAVE_SOFT_BLOCK_MODE for checking
+ * in the block cipher key types. */
+#if (defined(PSA_WANT_ALG_CTR) && !defined(MBEDTLS_PSA_ACCEL_ALG_CTR)) || \
+    (defined(PSA_WANT_ALG_CFB) && !defined(MBEDTLS_PSA_ACCEL_ALG_CFB)) || \
+    (defined(PSA_WANT_ALG_OFB) && !defined(MBEDTLS_PSA_ACCEL_ALG_OFB)) || \
+    (defined(PSA_WANT_ALG_XTS) && !defined(MBEDTLS_PSA_ACCEL_ALG_XTS)) || \
+    defined(PSA_WANT_ALG_ECB_NO_PADDING) || \
+    (defined(PSA_WANT_ALG_CBC_NO_PADDING) && \
+     !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_NO_PADDING)) || \
+    (defined(PSA_WANT_ALG_CBC_PKCS7) && \
+     !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_PKCS7)) || \
+    (defined(PSA_WANT_ALG_CMAC) && !defined(MBEDTLS_PSA_ACCEL_ALG_CMAC))
+#define PSA_HAVE_SOFT_BLOCK_MODE 1
+#endif
+
+#if (defined(PSA_WANT_ALG_GCM) && !defined(MBEDTLS_PSA_ACCEL_ALG_GCM)) || \
+    (defined(PSA_WANT_ALG_CCM) && !defined(MBEDTLS_PSA_ACCEL_ALG_CCM))
+#define PSA_HAVE_SOFT_BLOCK_AEAD 1
+#endif
+
+#if defined(PSA_WANT_KEY_TYPE_AES)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_AES)
+#define PSA_HAVE_SOFT_KEY_TYPE_AES 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_AES */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_AES 1
+#define MBEDTLS_AES_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_AES || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_AES */
+
+#if defined(PSA_WANT_KEY_TYPE_ARC4)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ARC4)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARC4 1
+#define MBEDTLS_ARC4_C
+#endif /*!MBEDTLS_PSA_ACCEL_KEY_TYPE_ARC4 */
+#endif /* PSA_WANT_KEY_TYPE_ARC4 */
+
+#if defined(PSA_WANT_KEY_TYPE_ARIA)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_ARIA)
+#define PSA_HAVE_SOFT_KEY_TYPE_ARIA 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_ARIA */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARIA 1
+#define MBEDTLS_ARIA_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_ARIA || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_ARIA */
+
+#if defined(PSA_WANT_KEY_TYPE_CAMELLIA)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_CAMELLIA)
+#define PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_CAMELLIA */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE) || \
+    defined(PSA_HAVE_SOFT_BLOCK_AEAD)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CAMELLIA 1
+#define MBEDTLS_CAMELLIA_C
+#endif /* PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_CAMELLIA */
+
+#if defined(PSA_WANT_KEY_TYPE_DES)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_DES)
+#define PSA_HAVE_SOFT_KEY_TYPE_DES 1
+#endif /* !MBEDTLS_PSA_ACCEL_KEY_TYPE_DES */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_DES) || \
+    defined(PSA_HAVE_SOFT_BLOCK_MODE)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_DES 1
+#define MBEDTLS_DES_C
+#endif /*PSA_HAVE_SOFT_KEY_TYPE_DES || PSA_HAVE_SOFT_BLOCK_MODE */
+#endif /* PSA_WANT_KEY_TYPE_DES */
+
+#if defined(PSA_WANT_KEY_TYPE_CHACHA20)
+#if !defined(MBEDTLS_PSA_ACCEL_KEY_TYPE_CHACHA20)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CHACHA20 1
+#define MBEDTLS_CHACHA20_C
+#endif /*!MBEDTLS_PSA_ACCEL_KEY_TYPE_CHACHA20 */
+#endif /* PSA_WANT_KEY_TYPE_CHACHA20 */
+
+/* If any of the software block ciphers are selected, define
+ * PSA_HAVE_SOFT_BLOCK_CIPHER, which can be used in any of these
+ * situations. */
+#if defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_DES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define PSA_HAVE_SOFT_BLOCK_CIPHER 1
+#endif
+
+#if defined(PSA_WANT_ALG_STREAM_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#endif /* PSA_WANT_ALG_STREAM_CIPHER */
+
+#if defined(PSA_WANT_ALG_CBC_MAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_MAC)
+#error "CBC-MAC is not yet supported via the PSA API in Mbed TLS."
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_MAC 1
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CBC_MAC */
+#endif /* PSA_WANT_ALG_CBC_MAC */
+
+#if defined(PSA_WANT_ALG_CMAC)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CMAC) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CMAC 1
+#define MBEDTLS_CMAC_C
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CMAC */
+#endif /* PSA_WANT_ALG_CMAC */
+
+#if defined(PSA_WANT_ALG_CTR)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CTR) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CTR 1
+#define MBEDTLS_CIPHER_MODE_CTR
+#endif
+#endif /* PSA_WANT_ALG_CTR */
+
+#if defined(PSA_WANT_ALG_CFB)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CFB) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_CFB 1
+#define MBEDTLS_CIPHER_MODE_CFB
+#endif
+#endif /* PSA_WANT_ALG_CFB */
+
+#if defined(PSA_WANT_ALG_OFB)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_OFB) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_OFB 1
+#define MBEDTLS_CIPHER_MODE_OFB
+#endif
+#endif /* PSA_WANT_ALG_OFB */
+
+#if defined(PSA_WANT_ALG_XTS)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_XTS) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_PSA_BUILTIN_ALG_XTS 1
+#define MBEDTLS_CIPHER_MODE_XTS
+#endif
+#endif /* PSA_WANT_ALG_XTS */
+
+#if defined(PSA_WANT_ALG_ECB_NO_PADDING)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING 1
+#endif
+
+#if defined(PSA_WANT_ALG_CBC_NO_PADDING)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_NO_PADDING) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_CIPHER_MODE_CBC
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING 1
+#endif
+#endif /* PSA_WANT_ALG_CBC_NO_PADDING */
+
+#if defined(PSA_WANT_ALG_CBC_PKCS7)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CBC_PKCS7) || \
+    defined(PSA_HAVE_SOFT_BLOCK_CIPHER)
+#define MBEDTLS_CIPHER_MODE_CBC
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7 1
+#define MBEDTLS_CIPHER_PADDING_PKCS7
+#endif
+#endif /* PSA_WANT_ALG_CBC_PKCS7 */
+
+#if defined(PSA_WANT_ALG_CCM)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CCM) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define MBEDTLS_PSA_BUILTIN_ALG_CCM 1
+#define MBEDTLS_CCM_C
+#endif
+#endif /* PSA_WANT_ALG_CCM */
+
+#if defined(PSA_WANT_ALG_GCM)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_GCM) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_AES) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_ARIA) || \
+    defined(PSA_HAVE_SOFT_KEY_TYPE_CAMELLIA)
+#define MBEDTLS_PSA_BUILTIN_ALG_GCM 1
+#define MBEDTLS_GCM_C
+#endif
+#endif /* PSA_WANT_ALG_GCM */
+
+#if defined(PSA_WANT_ALG_CHACHA20_POLY1305)
+#if !defined(MBEDTLS_PSA_ACCEL_ALG_CHACHA20_POLY1305)
+#if defined(PSA_WANT_KEY_TYPE_CHACHA20)
+#define MBEDTLS_CHACHAPOLY_C
+#define MBEDTLS_PSA_BUILTIN_ALG_CHACHA20_POLY1305 1
+#endif /* PSA_WANT_KEY_TYPE_CHACHA20 */
+#endif /* !MBEDTLS_PSA_ACCEL_ALG_CHACHA20_POLY1305 */
+#endif /* PSA_WANT_ALG_CHACHA20_POLY1305 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_256)
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_256 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_256 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_384)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_384)
+#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_384 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_384 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_384 */
+
+#if defined(PSA_WANT_ECC_BRAINPOOL_P_R1_512)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_512)
+#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_512 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_BRAINPOOL_P_R1_512 */
+#endif /* PSA_WANT_ECC_BRAINPOOL_P_R1_512 */
+
+#if defined(PSA_WANT_ECC_MONTGOMERY_255)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_255)
+#define MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_255 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_255 */
+#endif /* PSA_WANT_ECC_MONTGOMERY_255 */
+
+#if defined(PSA_WANT_ECC_MONTGOMERY_448)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_448)
+/*
+ * Curve448 is not yet supported via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/4249).
+ */
+#error "Curve448 is not yet supported via the PSA API in Mbed TLS."
+#define MBEDTLS_ECP_DP_CURVE448_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_448 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_MONTGOMERY_448 */
+#endif /* PSA_WANT_ECC_MONTGOMERY_448 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_192)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_192)
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_192 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_192 */
+#endif /* PSA_WANT_ECC_SECP_R1_192 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_224)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_224)
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_224 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_224 */
+#endif /* PSA_WANT_ECC_SECP_R1_224 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_256)
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_256 */
+#endif /* PSA_WANT_ECC_SECP_R1_256 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_384)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_384)
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_384 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_384 */
+#endif /* PSA_WANT_ECC_SECP_R1_384 */
+
+#if defined(PSA_WANT_ECC_SECP_R1_521)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_R1_521)
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_521 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_R1_521 */
+#endif /* PSA_WANT_ECC_SECP_R1_521 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_192)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_192)
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_192 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_192 */
+#endif /* PSA_WANT_ECC_SECP_K1_192 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_224)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_224)
+/*
+ * SECP224K1 is buggy via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/3541).
+ */
+#error "SECP224K1 is buggy via the PSA API in Mbed TLS."
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_224 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_224 */
+#endif /* PSA_WANT_ECC_SECP_K1_224 */
+
+#if defined(PSA_WANT_ECC_SECP_K1_256)
+#if !defined(MBEDTLS_PSA_ACCEL_ECC_SECP_K1_256)
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_256 1
+#endif /* !MBEDTLS_PSA_ACCEL_ECC_SECP_K1_256 */
+#endif /* PSA_WANT_ECC_SECP_K1_256 */
+
+
+
+/****************************************************************/
+/* Infer PSA requirements from Mbed TLS capabilities */
+/****************************************************************/
+
+#else /* MBEDTLS_PSA_CRYPTO_CONFIG */
+
+/*
+ * Ensure PSA_WANT_* defines are setup properly if MBEDTLS_PSA_CRYPTO_CONFIG
+ * is not defined
+ */
+
+#if defined(MBEDTLS_CCM_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_CCM 1
+#define PSA_WANT_ALG_CCM 1
+#endif /* MBEDTLS_CCM_C */
+
+#if defined(MBEDTLS_CMAC_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_CMAC 1
+#define PSA_WANT_ALG_CMAC 1
+#endif /* MBEDTLS_CMAC_C */
+
+#if defined(MBEDTLS_ECDH_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDH 1
+#define PSA_WANT_ALG_ECDH 1
+#endif /* MBEDTLS_ECDH_C */
+
+#if defined(MBEDTLS_ECDSA_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECDSA 1
+#define PSA_WANT_ALG_ECDSA 1
+#define PSA_WANT_ALG_ECDSA_ANY 1
+
+// Only add in DETERMINISTIC support if ECDSA is also enabled
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+#define MBEDTLS_PSA_BUILTIN_ALG_DETERMINISTIC_ECDSA 1
+#define PSA_WANT_ALG_DETERMINISTIC_ECDSA 1
+#endif /* MBEDTLS_ECDSA_DETERMINISTIC */
+
+#endif /* MBEDTLS_ECDSA_C */
+
+#if defined(MBEDTLS_ECP_C)
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_KEY_PAIR 1
+#define PSA_WANT_KEY_TYPE_ECC_KEY_PAIR 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ECC_PUBLIC_KEY 1
+#define PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY 1
+#endif /* MBEDTLS_ECP_C */
+
+#if defined(MBEDTLS_GCM_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_GCM 1
+#define PSA_WANT_ALG_GCM 1
+#endif /* MBEDTLS_GCM_C */
+
+#if defined(MBEDTLS_HKDF_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define PSA_WANT_ALG_HMAC 1
+#define MBEDTLS_PSA_BUILTIN_ALG_HKDF 1
+#define PSA_WANT_ALG_HKDF 1
+#endif /* MBEDTLS_HKDF_C */
+
+#if defined(MBEDTLS_MD_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_HMAC 1
+#define PSA_WANT_ALG_HMAC 1
+#define PSA_WANT_KEY_TYPE_HMAC
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF 1
+#define PSA_WANT_ALG_TLS12_PRF 1
+#define MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS 1
+#define PSA_WANT_ALG_TLS12_PSK_TO_MS 1
+#endif /* MBEDTLS_MD_C */
+
+#if defined(MBEDTLS_MD2_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD2 1
+#define PSA_WANT_ALG_MD2 1
+#endif
+
+#if defined(MBEDTLS_MD4_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD4 1
+#define PSA_WANT_ALG_MD4 1
+#endif
+
+#if defined(MBEDTLS_MD5_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_MD5 1
+#define PSA_WANT_ALG_MD5 1
+#endif
+
+#if defined(MBEDTLS_RIPEMD160_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160 1
+#define PSA_WANT_ALG_RIPEMD160 1
+#endif
+
+#if defined(MBEDTLS_RSA_C)
+#if defined(MBEDTLS_PKCS1_V15)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_CRYPT 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_CRYPT 1
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PKCS1V15_SIGN 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN 1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW 1
+#endif /* MBEDTLS_PKCS1_V15 */
+#if defined(MBEDTLS_PKCS1_V21)
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_OAEP 1
+#define PSA_WANT_ALG_RSA_OAEP 1
+#define MBEDTLS_PSA_BUILTIN_ALG_RSA_PSS 1
+#define PSA_WANT_ALG_RSA_PSS 1
+#endif /* MBEDTLS_PKCS1_V21 */
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_KEY_PAIR 1
+#define PSA_WANT_KEY_TYPE_RSA_KEY_PAIR 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_RSA_PUBLIC_KEY 1
+#define PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY 1
+#endif /* MBEDTLS_RSA_C */
+
+#if defined(MBEDTLS_SHA1_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_1 1
+#define PSA_WANT_ALG_SHA_1 1
+#endif
+
+#if defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_224 1
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_256 1
+#define PSA_WANT_ALG_SHA_224 1
+#define PSA_WANT_ALG_SHA_256 1
+#endif
+
+#if defined(MBEDTLS_SHA512_C)
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_384 1
+#define PSA_WANT_ALG_SHA_384 1
+#endif
+#define MBEDTLS_PSA_BUILTIN_ALG_SHA_512 1
+#define PSA_WANT_ALG_SHA_512 1
+#endif
+
+#if defined(MBEDTLS_AES_C)
+#define PSA_WANT_KEY_TYPE_AES 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_AES 1
+#endif
+
+#if defined(MBEDTLS_ARC4_C)
+#define PSA_WANT_KEY_TYPE_ARC4 1
+#define PSA_WANT_ALG_STREAM_CIPHER 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARC4 1
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#endif
+
+#if defined(MBEDTLS_ARIA_C)
+#define PSA_WANT_KEY_TYPE_ARIA 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_ARIA 1
+#endif
+
+#if defined(MBEDTLS_CAMELLIA_C)
+#define PSA_WANT_KEY_TYPE_CAMELLIA 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CAMELLIA 1
+#endif
+
+#if defined(MBEDTLS_DES_C)
+#define PSA_WANT_KEY_TYPE_DES 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_DES 1
+#endif
+
+#if defined(MBEDTLS_CHACHA20_C)
+#define PSA_WANT_KEY_TYPE_CHACHA20 1
+#define PSA_WANT_ALG_STREAM_CIPHER 1
+#define MBEDTLS_PSA_BUILTIN_KEY_TYPE_CHACHA20 1
+#define MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER 1
+#if defined(MBEDTLS_CHACHAPOLY_C)
+#define PSA_WANT_ALG_CHACHA20_POLY1305 1
+#define MBEDTLS_PSA_BUILTIN_ALG_CHACHA20_POLY1305 1
+#endif
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING 1
+#define PSA_WANT_ALG_CBC_NO_PADDING 1
+#if defined(MBEDTLS_CIPHER_PADDING_PKCS7)
+#define MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7 1
+#define PSA_WANT_ALG_CBC_PKCS7 1
+#endif
+#endif
+
+#if defined(MBEDTLS_AES_C) || defined(MBEDTLS_DES_C) || \
+    defined(MBEDTLS_ARIA_C) || defined(MBEDTLS_CAMELLIA_C)
+#define MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING 1
+#define PSA_WANT_ALG_ECB_NO_PADDING 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+#define MBEDTLS_PSA_BUILTIN_ALG_CFB 1
+#define PSA_WANT_ALG_CFB 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+#define MBEDTLS_PSA_BUILTIN_ALG_CTR 1
+#define PSA_WANT_ALG_CTR 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_OFB)
+#define MBEDTLS_PSA_BUILTIN_ALG_OFB 1
+#define PSA_WANT_ALG_OFB 1
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+#define MBEDTLS_PSA_BUILTIN_ALG_XTS 1
+#define PSA_WANT_ALG_XTS 1
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_256 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_256
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_384 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_384
+#endif
+
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_BRAINPOOL_P_R1_512 1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_512
+#endif
+
+#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_255 1
+#define PSA_WANT_ECC_MONTGOMERY_255
+#endif
+
+/* Curve448 is not yet supported via the PSA API (https://github.com/ARMmbed/mbedtls/issues/4249) */
+#if 0 && defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_MONTGOMERY_448 1
+#define PSA_WANT_ECC_MONTGOMERY_448
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_192 1
+#define PSA_WANT_ECC_SECP_R1_192
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_224 1
+#define PSA_WANT_ECC_SECP_R1_224
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_256 1
+#define PSA_WANT_ECC_SECP_R1_256
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_384 1
+#define PSA_WANT_ECC_SECP_R1_384
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_R1_521 1
+#define PSA_WANT_ECC_SECP_R1_521
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_192 1
+#define PSA_WANT_ECC_SECP_K1_192
+#endif
+
+/* SECP224K1 is buggy via the PSA API (https://github.com/ARMmbed/mbedtls/issues/3541) */
+#if 0 && defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_224 1
+#define PSA_WANT_ECC_SECP_K1_224
+#endif
+
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_PSA_BUILTIN_ECC_SECP_K1_256 1
+#define PSA_WANT_ECC_SECP_K1_256
+#endif
+
+#endif /* MBEDTLS_PSA_CRYPTO_CONFIG */
+
+/* These features are always enabled. */
+#define PSA_WANT_KEY_TYPE_DERIVE 1
+#define PSA_WANT_KEY_TYPE_RAW_DATA 1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CONFIG_PSA_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/constant_time.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/constant_time.h
new file mode 100644
index 00000000000..c5de57a01f0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/constant_time.h
@@ -0,0 +1,45 @@
+/**
+ *  Constant-time functions
+ *
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CONSTANT_TIME_H
+#define MBEDTLS_CONSTANT_TIME_H
+
+#include <stddef.h>
+
+
+/** Constant-time buffer comparison without branches.
+ *
+ * This is equivalent to the standard memcmp function, but is likely to be
+ * compiled to code using bitwise operation rather than a branch.
+ *
+ * This function can be used to write constant-time code by replacing branches
+ * with bit operations using masks.
+ *
+ * \param a     Pointer to the first buffer.
+ * \param b     Pointer to the second buffer.
+ * \param n     The number of bytes to compare in the buffer.
+ *
+ * \return      Zero if the content of the two buffer is the same,
+ *              otherwise non-zero.
+ */
+int mbedtls_ct_memcmp( const void *a,
+                       const void *b,
+                       size_t n );
+
+#endif /* MBEDTLS_CONSTANT_TIME_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
new file mode 100644
index 00000000000..dc4adc896d4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
@@ -0,0 +1,611 @@
+/**
+ * \file ctr_drbg.h
+ *
+ * \brief    This file contains definitions and functions for the
+ *           CTR_DRBG pseudorandom generator.
+ *
+ * CTR_DRBG is a standardized way of building a PRNG from a block-cipher
+ * in counter mode operation, as defined in <em>NIST SP 800-90A:
+ * Recommendation for Random Number Generation Using Deterministic Random
+ * Bit Generators</em>.
+ *
+ * The Mbed TLS implementation of CTR_DRBG uses AES-256 (default) or AES-128
+ * (if \c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY is enabled at compile time)
+ * as the underlying block cipher, with a derivation function.
+ *
+ * The security strength as defined in NIST SP 800-90A is
+ * 128 bits when AES-128 is used (\c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY enabled)
+ * and 256 bits otherwise, provided that #MBEDTLS_CTR_DRBG_ENTROPY_LEN is
+ * kept at its default value (and not overridden in config.h) and that the
+ * DRBG instance is set up with default parameters.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more
+ * information.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_CTR_DRBG_H
+#define MBEDTLS_CTR_DRBG_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/aes.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "mbedtls/threading.h"
+#endif
+
+/** The entropy source failed. */
+#define MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED        -0x0034
+/** The requested random buffer length is too big. */
+#define MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG              -0x0036
+/** The input (entropy + additional data) is too large. */
+#define MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG                -0x0038
+/** Read or write error in file. */
+#define MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR                -0x003A
+
+#define MBEDTLS_CTR_DRBG_BLOCKSIZE          16 /**< The block size used by the cipher. */
+
+#if defined(MBEDTLS_CTR_DRBG_USE_128_BIT_KEY)
+#define MBEDTLS_CTR_DRBG_KEYSIZE            16
+/**< The key size in bytes used by the cipher.
+ *
+ * Compile-time choice: 16 bytes (128 bits)
+ * because #MBEDTLS_CTR_DRBG_USE_128_BIT_KEY is enabled.
+ */
+#else
+#define MBEDTLS_CTR_DRBG_KEYSIZE            32
+/**< The key size in bytes used by the cipher.
+ *
+ * Compile-time choice: 32 bytes (256 bits)
+ * because \c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY is disabled.
+ */
+#endif
+
+#define MBEDTLS_CTR_DRBG_KEYBITS            ( MBEDTLS_CTR_DRBG_KEYSIZE * 8 ) /**< The key size for the DRBG operation, in bits. */
+#define MBEDTLS_CTR_DRBG_SEEDLEN            ( MBEDTLS_CTR_DRBG_KEYSIZE + MBEDTLS_CTR_DRBG_BLOCKSIZE ) /**< The seed length, calculated as (counter + AES key). */
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them using the compiler command
+ * line.
+ * \{
+ */
+
+/** \def MBEDTLS_CTR_DRBG_ENTROPY_LEN
+ *
+ * \brief The amount of entropy used per seed by default, in bytes.
+ */
+#if !defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN)
+#if defined(MBEDTLS_SHA512_C) && !defined(MBEDTLS_ENTROPY_FORCE_SHA256)
+/** This is 48 bytes because the entropy module uses SHA-512
+ * (\c MBEDTLS_ENTROPY_FORCE_SHA256 is disabled).
+ */
+#define MBEDTLS_CTR_DRBG_ENTROPY_LEN        48
+
+#else /* defined(MBEDTLS_SHA512_C) && !defined(MBEDTLS_ENTROPY_FORCE_SHA256) */
+
+/** This is 32 bytes because the entropy module uses SHA-256
+ * (the SHA512 module is disabled or
+ * \c MBEDTLS_ENTROPY_FORCE_SHA256 is enabled).
+ */
+#if !defined(MBEDTLS_CTR_DRBG_USE_128_BIT_KEY)
+/** \warning To achieve a 256-bit security strength, you must pass a nonce
+ *           to mbedtls_ctr_drbg_seed().
+ */
+#endif /* !defined(MBEDTLS_CTR_DRBG_USE_128_BIT_KEY) */
+#define MBEDTLS_CTR_DRBG_ENTROPY_LEN        32
+#endif /* defined(MBEDTLS_SHA512_C) && !defined(MBEDTLS_ENTROPY_FORCE_SHA256) */
+#endif /* !defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN) */
+
+#if !defined(MBEDTLS_CTR_DRBG_RESEED_INTERVAL)
+#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL    10000
+/**< The interval before reseed is performed by default. */
+#endif
+
+#if !defined(MBEDTLS_CTR_DRBG_MAX_INPUT)
+#define MBEDTLS_CTR_DRBG_MAX_INPUT          256
+/**< The maximum number of additional input Bytes. */
+#endif
+
+#if !defined(MBEDTLS_CTR_DRBG_MAX_REQUEST)
+#define MBEDTLS_CTR_DRBG_MAX_REQUEST        1024
+/**< The maximum number of requested Bytes per call. */
+#endif
+
+#if !defined(MBEDTLS_CTR_DRBG_MAX_SEED_INPUT)
+#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT     384
+/**< The maximum size of seed or reseed buffer in bytes. */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#define MBEDTLS_CTR_DRBG_PR_OFF             0
+/**< Prediction resistance is disabled. */
+#define MBEDTLS_CTR_DRBG_PR_ON              1
+/**< Prediction resistance is enabled. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if MBEDTLS_CTR_DRBG_ENTROPY_LEN >= MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2
+/** The default length of the nonce read from the entropy source.
+ *
+ * This is \c 0 because a single read from the entropy source is sufficient
+ * to include a nonce.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more information.
+ */
+#define MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN 0
+#else
+/** The default length of the nonce read from the entropy source.
+ *
+ * This is half of the default entropy length because a single read from
+ * the entropy source does not provide enough material to form a nonce.
+ * See the documentation of mbedtls_ctr_drbg_seed() for more information.
+ */
+#define MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN ( MBEDTLS_CTR_DRBG_ENTROPY_LEN + 1 ) / 2
+#endif
+
+/**
+ * \brief          The CTR_DRBG context structure.
+ */
+typedef struct mbedtls_ctr_drbg_context
+{
+    unsigned char counter[16];  /*!< The counter (V). */
+    int reseed_counter;         /*!< The reseed counter.
+                                 * This is the number of requests that have
+                                 * been made since the last (re)seeding,
+                                 * minus one.
+                                 * Before the initial seeding, this field
+                                 * contains the amount of entropy in bytes
+                                 * to use as a nonce for the initial seeding,
+                                 * or -1 if no nonce length has been explicitly
+                                 * set (see mbedtls_ctr_drbg_set_nonce_len()).
+                                 */
+    int prediction_resistance;  /*!< This determines whether prediction
+                                     resistance is enabled, that is
+                                     whether to systematically reseed before
+                                     each random generation. */
+    size_t entropy_len;         /*!< The amount of entropy grabbed on each
+                                     seed or reseed operation, in bytes. */
+    int reseed_interval;        /*!< The reseed interval.
+                                 * This is the maximum number of requests
+                                 * that can be made between reseedings. */
+
+    mbedtls_aes_context aes_ctx;        /*!< The AES context. */
+
+    /*
+     * Callbacks (Entropy)
+     */
+    int (*f_entropy)(void *, unsigned char *, size_t);
+                                /*!< The entropy callback function. */
+
+    void *p_entropy;            /*!< The context for the entropy function. */
+
+#if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized if and only if f_entropy != NULL.
+     * This means that the mutex is initialized during the initial seeding
+     * in mbedtls_ctr_drbg_seed() and freed in mbedtls_ctr_drbg_free().
+     *
+     * Note that this invariant may change without notice. Do not rely on it
+     * and do not access the mutex directly in application code.
+     */
+    mbedtls_threading_mutex_t mutex;
+#endif
+}
+mbedtls_ctr_drbg_context;
+
+/**
+ * \brief               This function initializes the CTR_DRBG context,
+ *                      and prepares it for mbedtls_ctr_drbg_seed()
+ *                      or mbedtls_ctr_drbg_free().
+ *
+ * \note                The reseed interval is
+ *                      #MBEDTLS_CTR_DRBG_RESEED_INTERVAL by default.
+ *                      You can override it by calling
+ *                      mbedtls_ctr_drbg_set_reseed_interval().
+ *
+ * \param ctx           The CTR_DRBG context to initialize.
+ */
+void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
+
+/**
+ * \brief               This function seeds and sets up the CTR_DRBG
+ *                      entropy source for future reseeds.
+ *
+ * A typical choice for the \p f_entropy and \p p_entropy parameters is
+ * to use the entropy module:
+ * - \p f_entropy is mbedtls_entropy_func();
+ * - \p p_entropy is an instance of ::mbedtls_entropy_context initialized
+ *   with mbedtls_entropy_init() (which registers the platform's default
+ *   entropy sources).
+ *
+ * The entropy length is #MBEDTLS_CTR_DRBG_ENTROPY_LEN by default.
+ * You can override it by calling mbedtls_ctr_drbg_set_entropy_len().
+ *
+ * The entropy nonce length is:
+ * - \c 0 if the entropy length is at least 3/2 times the entropy length,
+ *   which guarantees that the security strength is the maximum permitted
+ *   by the key size and entropy length according to NIST SP 800-90A §10.2.1;
+ * - Half the entropy length otherwise.
+ * You can override it by calling mbedtls_ctr_drbg_set_nonce_len().
+ * With the default entropy length, the entropy nonce length is
+ * #MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN.
+ *
+ * You can provide a nonce and personalization string in addition to the
+ * entropy source, to make this instantiation as unique as possible.
+ * See SP 800-90A §8.6.7 for more details about nonces.
+ *
+ * The _seed_material_ value passed to the derivation function in
+ * the CTR_DRBG Instantiate Process described in NIST SP 800-90A §10.2.1.3.2
+ * is the concatenation of the following strings:
+ * - A string obtained by calling \p f_entropy function for the entropy
+ *   length.
+ */
+#if MBEDTLS_CTR_DRBG_ENTROPY_NONCE_LEN == 0
+/**
+ * - If mbedtls_ctr_drbg_set_nonce_len() has been called, a string
+ *   obtained by calling \p f_entropy function for the specified length.
+ */
+#else
+/**
+ * - A string obtained by calling \p f_entropy function for the entropy nonce
+ *   length. If the entropy nonce length is \c 0, this function does not
+ *   make a second call to \p f_entropy.
+ */
+#endif
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
+ * - The \p custom string.
+ *
+ * \note                To achieve the nominal security strength permitted
+ *                      by CTR_DRBG, the entropy length must be:
+ *                      - at least 16 bytes for a 128-bit strength
+ *                      (maximum achievable strength when using AES-128);
+ *                      - at least 32 bytes for a 256-bit strength
+ *                      (maximum achievable strength when using AES-256).
+ *
+ *                      In addition, if you do not pass a nonce in \p custom,
+ *                      the sum of the entropy length
+ *                      and the entropy nonce length must be:
+ *                      - at least 24 bytes for a 128-bit strength
+ *                      (maximum achievable strength when using AES-128);
+ *                      - at least 48 bytes for a 256-bit strength
+ *                      (maximum achievable strength when using AES-256).
+ *
+ * \param ctx           The CTR_DRBG context to seed.
+ *                      It must have been initialized with
+ *                      mbedtls_ctr_drbg_init().
+ *                      After a successful call to mbedtls_ctr_drbg_seed(),
+ *                      you may not call mbedtls_ctr_drbg_seed() again on
+ *                      the same context unless you call
+ *                      mbedtls_ctr_drbg_free() and mbedtls_ctr_drbg_init()
+ *                      again first.
+ *                      After a failed call to mbedtls_ctr_drbg_seed(),
+ *                      you must call mbedtls_ctr_drbg_free().
+ * \param f_entropy     The entropy callback, taking as arguments the
+ *                      \p p_entropy context, the buffer to fill, and the
+ *                      length of the buffer.
+ *                      \p f_entropy is always called with a buffer size
+ *                      less than or equal to the entropy length.
+ * \param p_entropy     The entropy context to pass to \p f_entropy.
+ * \param custom        The personalization string.
+ *                      This can be \c NULL, in which case the personalization
+ *                      string is empty regardless of the value of \p len.
+ * \param len           The length of the personalization string.
+ *                      This must be at most
+ *                      #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT
+ *                      - #MBEDTLS_CTR_DRBG_ENTROPY_LEN.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED on failure.
+ */
+int mbedtls_ctr_drbg_seed( mbedtls_ctr_drbg_context *ctx,
+                   int (*f_entropy)(void *, unsigned char *, size_t),
+                   void *p_entropy,
+                   const unsigned char *custom,
+                   size_t len );
+
+/**
+ * \brief               This function resets CTR_DRBG context to the state immediately
+ *                      after initial call of mbedtls_ctr_drbg_init().
+ *
+ * \param ctx           The CTR_DRBG context to clear.
+ */
+void mbedtls_ctr_drbg_free( mbedtls_ctr_drbg_context *ctx );
+
+/**
+ * \brief               This function turns prediction resistance on or off.
+ *                      The default value is off.
+ *
+ * \note                If enabled, entropy is gathered at the beginning of
+ *                      every call to mbedtls_ctr_drbg_random_with_add()
+ *                      or mbedtls_ctr_drbg_random().
+ *                      Only use this if your entropy source has sufficient
+ *                      throughput.
+ *
+ * \param ctx           The CTR_DRBG context.
+ * \param resistance    #MBEDTLS_CTR_DRBG_PR_ON or #MBEDTLS_CTR_DRBG_PR_OFF.
+ */
+void mbedtls_ctr_drbg_set_prediction_resistance( mbedtls_ctr_drbg_context *ctx,
+                                         int resistance );
+
+/**
+ * \brief               This function sets the amount of entropy grabbed on each
+ *                      seed or reseed.
+ *
+ * The default value is #MBEDTLS_CTR_DRBG_ENTROPY_LEN.
+ *
+ * \note                The security strength of CTR_DRBG is bounded by the
+ *                      entropy length. Thus:
+ *                      - When using AES-256
+ *                        (\c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY is disabled,
+ *                        which is the default),
+ *                        \p len must be at least 32 (in bytes)
+ *                        to achieve a 256-bit strength.
+ *                      - When using AES-128
+ *                        (\c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY is enabled)
+ *                        \p len must be at least 16 (in bytes)
+ *                        to achieve a 128-bit strength.
+ *
+ * \param ctx           The CTR_DRBG context.
+ * \param len           The amount of entropy to grab, in bytes.
+ *                      This must be at most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT
+ *                      and at most the maximum length accepted by the
+ *                      entropy function that is set in the context.
+ */
+void mbedtls_ctr_drbg_set_entropy_len( mbedtls_ctr_drbg_context *ctx,
+                               size_t len );
+
+/**
+ * \brief               This function sets the amount of entropy grabbed
+ *                      as a nonce for the initial seeding.
+ *
+ * Call this function before calling mbedtls_ctr_drbg_seed() to read
+ * a nonce from the entropy source during the initial seeding.
+ *
+ * \param ctx           The CTR_DRBG context.
+ * \param len           The amount of entropy to grab for the nonce, in bytes.
+ *                      This must be at most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT
+ *                      and at most the maximum length accepted by the
+ *                      entropy function that is set in the context.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG if \p len is
+ *                      more than #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED
+ *                      if the initial seeding has already taken place.
+ */
+int mbedtls_ctr_drbg_set_nonce_len( mbedtls_ctr_drbg_context *ctx,
+                                    size_t len );
+
+/**
+ * \brief               This function sets the reseed interval.
+ *
+ * The reseed interval is the number of calls to mbedtls_ctr_drbg_random()
+ * or mbedtls_ctr_drbg_random_with_add() after which the entropy function
+ * is called again.
+ *
+ * The default value is #MBEDTLS_CTR_DRBG_RESEED_INTERVAL.
+ *
+ * \param ctx           The CTR_DRBG context.
+ * \param interval      The reseed interval.
+ */
+void mbedtls_ctr_drbg_set_reseed_interval( mbedtls_ctr_drbg_context *ctx,
+                                   int interval );
+
+/**
+ * \brief               This function reseeds the CTR_DRBG context, that is
+ *                      extracts data from the entropy source.
+ *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
+ * \param ctx           The CTR_DRBG context.
+ * \param additional    Additional data to add to the state. Can be \c NULL.
+ * \param len           The length of the additional data.
+ *                      This must be less than
+ *                      #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT - \c entropy_len
+ *                      where \c entropy_len is the entropy length
+ *                      configured for the context.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED on failure.
+ */
+int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx,
+                     const unsigned char *additional, size_t len );
+
+/**
+ * \brief              This function updates the state of the CTR_DRBG context.
+ *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
+ * \param ctx          The CTR_DRBG context.
+ * \param additional   The data to update the state with. This must not be
+ *                     \c NULL unless \p add_len is \c 0.
+ * \param add_len      Length of \p additional in bytes. This must be at
+ *                     most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT.
+ *
+ * \return             \c 0 on success.
+ * \return             #MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG if
+ *                     \p add_len is more than
+ *                     #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT.
+ * \return             An error from the underlying AES cipher on failure.
+ */
+int mbedtls_ctr_drbg_update_ret( mbedtls_ctr_drbg_context *ctx,
+                                 const unsigned char *additional,
+                                 size_t add_len );
+
+/**
+ * \brief   This function updates a CTR_DRBG instance with additional
+ *          data and uses it to generate random data.
+ *
+ * This function automatically reseeds if the reseed counter is exceeded
+ * or prediction resistance is enabled.
+ *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
+ * \param p_rng         The CTR_DRBG context. This must be a pointer to a
+ *                      #mbedtls_ctr_drbg_context structure.
+ * \param output        The buffer to fill.
+ * \param output_len    The length of the buffer in bytes.
+ * \param additional    Additional data to update. Can be \c NULL, in which
+ *                      case the additional data is empty regardless of
+ *                      the value of \p add_len.
+ * \param add_len       The length of the additional data
+ *                      if \p additional is not \c NULL.
+ *                      This must be less than #MBEDTLS_CTR_DRBG_MAX_INPUT
+ *                      and less than
+ *                      #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT - \c entropy_len
+ *                      where \c entropy_len is the entropy length
+ *                      configured for the context.
+ *
+ * \return    \c 0 on success.
+ * \return    #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED or
+ *            #MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG on failure.
+ */
+int mbedtls_ctr_drbg_random_with_add( void *p_rng,
+                              unsigned char *output, size_t output_len,
+                              const unsigned char *additional, size_t add_len );
+
+/**
+ * \brief   This function uses CTR_DRBG to generate random data.
+ *
+ * This function automatically reseeds if the reseed counter is exceeded
+ * or prediction resistance is enabled.
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
+ * \param p_rng         The CTR_DRBG context. This must be a pointer to a
+ *                      #mbedtls_ctr_drbg_context structure.
+ * \param output        The buffer to fill.
+ * \param output_len    The length of the buffer in bytes.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED or
+ *                      #MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG on failure.
+ */
+int mbedtls_ctr_drbg_random( void *p_rng,
+                     unsigned char *output, size_t output_len );
+
+
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief              This function updates the state of the CTR_DRBG context.
+ *
+ * \deprecated         Superseded by mbedtls_ctr_drbg_update_ret()
+ *                     in 2.16.0.
+ *
+ * \note               If \p add_len is greater than
+ *                     #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT, only the first
+ *                     #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT Bytes are used.
+ *                     The remaining Bytes are silently discarded.
+ *
+ * \param ctx          The CTR_DRBG context.
+ * \param additional   The data to update the state with.
+ * \param add_len      Length of \p additional data.
+ */
+MBEDTLS_DEPRECATED void mbedtls_ctr_drbg_update(
+    mbedtls_ctr_drbg_context *ctx,
+    const unsigned char *additional,
+    size_t add_len );
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief               This function writes a seed file.
+ *
+ * \param ctx           The CTR_DRBG context.
+ * \param path          The name of the file.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR on file error.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED on reseed
+ *                      failure.
+ */
+int mbedtls_ctr_drbg_write_seed_file( mbedtls_ctr_drbg_context *ctx, const char *path );
+
+/**
+ * \brief               This function reads and updates a seed file. The seed
+ *                      is added to this instance.
+ *
+ * \param ctx           The CTR_DRBG context.
+ * \param path          The name of the file.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR on file error.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED on
+ *                      reseed failure.
+ * \return              #MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG if the existing
+ *                      seed file is too large.
+ */
+int mbedtls_ctr_drbg_update_seed_file( mbedtls_ctr_drbg_context *ctx, const char *path );
+#endif /* MBEDTLS_FS_IO */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief               The CTR_DRBG checkup routine.
+ *
+ * \return              \c 0 on success.
+ * \return              \c 1 on failure.
+ */
+int mbedtls_ctr_drbg_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ctr_drbg.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/debug.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/debug.h
new file mode 100644
index 00000000000..3c08244f3da
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/debug.h
@@ -0,0 +1,311 @@
+/**
+ * \file debug.h
+ *
+ * \brief Functions for controlling and providing debug output from the library.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_DEBUG_H
+#define MBEDTLS_DEBUG_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/ssl.h"
+
+#if defined(MBEDTLS_ECP_C)
+#include "mbedtls/ecp.h"
+#endif
+
+#if defined(MBEDTLS_DEBUG_C)
+
+#define MBEDTLS_DEBUG_STRIP_PARENS( ... )   __VA_ARGS__
+
+#define MBEDTLS_SSL_DEBUG_MSG( level, args )                    \
+    mbedtls_debug_print_msg( ssl, level, __FILE__, __LINE__,    \
+                             MBEDTLS_DEBUG_STRIP_PARENS args )
+
+#define MBEDTLS_SSL_DEBUG_RET( level, text, ret )                \
+    mbedtls_debug_print_ret( ssl, level, __FILE__, __LINE__, text, ret )
+
+#define MBEDTLS_SSL_DEBUG_BUF( level, text, buf, len )           \
+    mbedtls_debug_print_buf( ssl, level, __FILE__, __LINE__, text, buf, len )
+
+#if defined(MBEDTLS_BIGNUM_C)
+#define MBEDTLS_SSL_DEBUG_MPI( level, text, X )                  \
+    mbedtls_debug_print_mpi( ssl, level, __FILE__, __LINE__, text, X )
+#endif
+
+#if defined(MBEDTLS_ECP_C)
+#define MBEDTLS_SSL_DEBUG_ECP( level, text, X )                  \
+    mbedtls_debug_print_ecp( ssl, level, __FILE__, __LINE__, text, X )
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+#define MBEDTLS_SSL_DEBUG_CRT( level, text, crt )                \
+    mbedtls_debug_print_crt( ssl, level, __FILE__, __LINE__, text, crt )
+#endif
+
+#if defined(MBEDTLS_ECDH_C)
+#define MBEDTLS_SSL_DEBUG_ECDH( level, ecdh, attr )               \
+    mbedtls_debug_printf_ecdh( ssl, level, __FILE__, __LINE__, ecdh, attr )
+#endif
+
+#else /* MBEDTLS_DEBUG_C */
+
+#define MBEDTLS_SSL_DEBUG_MSG( level, args )            do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_RET( level, text, ret )       do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_BUF( level, text, buf, len )  do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_MPI( level, text, X )         do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_ECP( level, text, X )         do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_CRT( level, text, crt )       do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_ECDH( level, ecdh, attr )     do { } while( 0 )
+
+#endif /* MBEDTLS_DEBUG_C */
+
+/**
+ * \def MBEDTLS_PRINTF_ATTRIBUTE
+ *
+ * Mark a function as having printf attributes, and thus enable checking
+ * via -wFormat and other flags. This does nothing on builds with compilers
+ * that do not support the format attribute
+ *
+ * Module:  library/debug.c
+ * Caller:
+ *
+ * This module provides debugging functions.
+ */
+#if defined(__has_attribute)
+#if __has_attribute(format)
+#if defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 1
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)    \
+    __attribute__((__format__ (gnu_printf, string_index, first_to_check)))
+#else /* defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 1 */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)    \
+    __attribute__((format(printf, string_index, first_to_check)))
+#endif
+#else /* __has_attribute(format) */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)
+#endif /* __has_attribute(format) */
+#else /* defined(__has_attribute) */
+#define MBEDTLS_PRINTF_ATTRIBUTE(string_index, first_to_check)
+#endif
+
+/**
+ * \def MBEDTLS_PRINTF_SIZET
+ *
+ * MBEDTLS_PRINTF_xxx: Due to issues with older window compilers
+ * and MinGW we need to define the printf specifier for size_t
+ * and long long per platform.
+ *
+ * Module:  library/debug.c
+ * Caller:
+ *
+ * This module provides debugging functions.
+ */
+#if (defined(__MINGW32__) && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800)
+   #include <inttypes.h>
+   #define MBEDTLS_PRINTF_SIZET     PRIuPTR
+   #define MBEDTLS_PRINTF_LONGLONG  "I64d"
+#else /* (defined(__MINGW32__)  && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800) */
+   #define MBEDTLS_PRINTF_SIZET     "zu"
+   #define MBEDTLS_PRINTF_LONGLONG  "lld"
+#endif /* (defined(__MINGW32__)  && __USE_MINGW_ANSI_STDIO == 0) || (defined(_MSC_VER) && _MSC_VER < 1800) */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief   Set the threshold error level to handle globally all debug output.
+ *          Debug messages that have a level over the threshold value are
+ *          discarded.
+ *          (Default value: 0 = No debug )
+ *
+ * \param threshold     theshold level of messages to filter on. Messages at a
+ *                      higher level will be discarded.
+ *                          - Debug levels
+ *                              - 0 No debug
+ *                              - 1 Error
+ *                              - 2 State change
+ *                              - 3 Informational
+ *                              - 4 Verbose
+ */
+void mbedtls_debug_set_threshold( int threshold );
+
+/**
+ * \brief    Print a message to the debug output. This function is always used
+ *          through the MBEDTLS_SSL_DEBUG_MSG() macro, which supplies the ssl
+ *          context, file and line number parameters.
+ *
+ * \param ssl       SSL context
+ * \param level     error level of the debug message
+ * \param file      file the message has occurred in
+ * \param line      line number the message has occurred at
+ * \param format    format specifier, in printf format
+ * \param ...       variables used by the format specifier
+ *
+ * \attention       This function is intended for INTERNAL usage within the
+ *                  library only.
+ */
+void mbedtls_debug_print_msg( const mbedtls_ssl_context *ssl, int level,
+                              const char *file, int line,
+                              const char *format, ... ) MBEDTLS_PRINTF_ATTRIBUTE(5, 6);
+
+/**
+ * \brief   Print the return value of a function to the debug output. This
+ *          function is always used through the MBEDTLS_SSL_DEBUG_RET() macro,
+ *          which supplies the ssl context, file and line number parameters.
+ *
+ * \param ssl       SSL context
+ * \param level     error level of the debug message
+ * \param file      file the error has occurred in
+ * \param line      line number the error has occurred in
+ * \param text      the name of the function that returned the error
+ * \param ret       the return code value
+ *
+ * \attention       This function is intended for INTERNAL usage within the
+ *                  library only.
+ */
+void mbedtls_debug_print_ret( const mbedtls_ssl_context *ssl, int level,
+                      const char *file, int line,
+                      const char *text, int ret );
+
+/**
+ * \brief   Output a buffer of size len bytes to the debug output. This function
+ *          is always used through the MBEDTLS_SSL_DEBUG_BUF() macro,
+ *          which supplies the ssl context, file and line number parameters.
+ *
+ * \param ssl       SSL context
+ * \param level     error level of the debug message
+ * \param file      file the error has occurred in
+ * \param line      line number the error has occurred in
+ * \param text      a name or label for the buffer being dumped. Normally the
+ *                  variable or buffer name
+ * \param buf       the buffer to be outputted
+ * \param len       length of the buffer
+ *
+ * \attention       This function is intended for INTERNAL usage within the
+ *                  library only.
+ */
+void mbedtls_debug_print_buf( const mbedtls_ssl_context *ssl, int level,
+                      const char *file, int line, const char *text,
+                      const unsigned char *buf, size_t len );
+
+#if defined(MBEDTLS_BIGNUM_C)
+/**
+ * \brief   Print a MPI variable to the debug output. This function is always
+ *          used through the MBEDTLS_SSL_DEBUG_MPI() macro, which supplies the
+ *          ssl context, file and line number parameters.
+ *
+ * \param ssl       SSL context
+ * \param level     error level of the debug message
+ * \param file      file the error has occurred in
+ * \param line      line number the error has occurred in
+ * \param text      a name or label for the MPI being output. Normally the
+ *                  variable name
+ * \param X         the MPI variable
+ *
+ * \attention       This function is intended for INTERNAL usage within the
+ *                  library only.
+ */
+void mbedtls_debug_print_mpi( const mbedtls_ssl_context *ssl, int level,
+                      const char *file, int line,
+                      const char *text, const mbedtls_mpi *X );
+#endif
+
+#if defined(MBEDTLS_ECP_C)
+/**
+ * \brief   Print an ECP point to the debug output. This function is always
+ *          used through the MBEDTLS_SSL_DEBUG_ECP() macro, which supplies the
+ *          ssl context, file and line number parameters.
+ *
+ * \param ssl       SSL context
+ * \param level     error level of the debug message
+ * \param file      file the error has occurred in
+ * \param line      line number the error has occurred in
+ * \param text      a name or label for the ECP point being output. Normally the
+ *                  variable name
+ * \param X         the ECP point
+ *
+ * \attention       This function is intended for INTERNAL usage within the
+ *                  library only.
+ */
+void mbedtls_debug_print_ecp( const mbedtls_ssl_context *ssl, int level,
+                      const char *file, int line,
+                      const char *text, const mbedtls_ecp_point *X );
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief   Print a X.509 certificate structure to the debug output. This
+ *          function is always used through the MBEDTLS_SSL_DEBUG_CRT() macro,
+ *          which supplies the ssl context, file and line number parameters.
+ *
+ * \param ssl       SSL context
+ * \param level     error level of the debug message
+ * \param file      file the error has occurred in
+ * \param line      line number the error has occurred in
+ * \param text      a name or label for the certificate being output
+ * \param crt       X.509 certificate structure
+ *
+ * \attention       This function is intended for INTERNAL usage within the
+ *                  library only.
+ */
+void mbedtls_debug_print_crt( const mbedtls_ssl_context *ssl, int level,
+                      const char *file, int line,
+                      const char *text, const mbedtls_x509_crt *crt );
+#endif
+
+#if defined(MBEDTLS_ECDH_C)
+typedef enum
+{
+    MBEDTLS_DEBUG_ECDH_Q,
+    MBEDTLS_DEBUG_ECDH_QP,
+    MBEDTLS_DEBUG_ECDH_Z,
+} mbedtls_debug_ecdh_attr;
+
+/**
+ * \brief   Print a field of the ECDH structure in the SSL context to the debug
+ *          output. This function is always used through the
+ *          MBEDTLS_SSL_DEBUG_ECDH() macro, which supplies the ssl context, file
+ *          and line number parameters.
+ *
+ * \param ssl       SSL context
+ * \param level     error level of the debug message
+ * \param file      file the error has occurred in
+ * \param line      line number the error has occurred in
+ * \param ecdh      the ECDH context
+ * \param attr      the identifier of the attribute being output
+ *
+ * \attention       This function is intended for INTERNAL usage within the
+ *                  library only.
+ */
+void mbedtls_debug_printf_ecdh( const mbedtls_ssl_context *ssl, int level,
+                                const char *file, int line,
+                                const mbedtls_ecdh_context *ecdh,
+                                mbedtls_debug_ecdh_attr attr );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* debug.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/des.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/des.h
new file mode 100644
index 00000000000..325aab53644
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/des.h
@@ -0,0 +1,370 @@
+/**
+ * \file des.h
+ *
+ * \brief DES block cipher
+ *
+ * \warning   DES is considered a weak cipher and its use constitutes a
+ *            security risk. We recommend considering stronger ciphers
+ *            instead.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ */
+#ifndef MBEDTLS_DES_H
+#define MBEDTLS_DES_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+#include "mbedtls/platform_util.h"
+
+#include <stddef.h>
+#include <stdint.h>
+
+#define MBEDTLS_DES_ENCRYPT     1
+#define MBEDTLS_DES_DECRYPT     0
+
+/** The data input has an invalid length. */
+#define MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH              -0x0032
+
+/* MBEDTLS_ERR_DES_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** DES hardware accelerator failed. */
+#define MBEDTLS_ERR_DES_HW_ACCEL_FAILED                   -0x0033
+
+#define MBEDTLS_DES_KEY_SIZE    8
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_DES_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          DES context structure
+ *
+ * \warning        DES is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ */
+typedef struct mbedtls_des_context
+{
+    uint32_t sk[32];            /*!<  DES subkeys       */
+}
+mbedtls_des_context;
+
+/**
+ * \brief          Triple-DES context structure
+ */
+typedef struct mbedtls_des3_context
+{
+    uint32_t sk[96];            /*!<  3DES subkeys      */
+}
+mbedtls_des3_context;
+
+#else  /* MBEDTLS_DES_ALT */
+#include "des_alt.h"
+#endif /* MBEDTLS_DES_ALT */
+
+/**
+ * \brief          Initialize DES context
+ *
+ * \param ctx      DES context to be initialized
+ *
+ * \warning        DES is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ */
+void mbedtls_des_init( mbedtls_des_context *ctx );
+
+/**
+ * \brief          Clear DES context
+ *
+ * \param ctx      DES context to be cleared
+ *
+ * \warning        DES is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ */
+void mbedtls_des_free( mbedtls_des_context *ctx );
+
+/**
+ * \brief          Initialize Triple-DES context
+ *
+ * \param ctx      DES3 context to be initialized
+ */
+void mbedtls_des3_init( mbedtls_des3_context *ctx );
+
+/**
+ * \brief          Clear Triple-DES context
+ *
+ * \param ctx      DES3 context to be cleared
+ */
+void mbedtls_des3_free( mbedtls_des3_context *ctx );
+
+/**
+ * \brief          Set key parity on the given key to odd.
+ *
+ *                 DES keys are 56 bits long, but each byte is padded with
+ *                 a parity bit to allow verification.
+ *
+ * \param key      8-byte secret key
+ *
+ * \warning        DES is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ */
+void mbedtls_des_key_set_parity( unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+/**
+ * \brief          Check that key parity on the given key is odd.
+ *
+ *                 DES keys are 56 bits long, but each byte is padded with
+ *                 a parity bit to allow verification.
+ *
+ * \param key      8-byte secret key
+ *
+ * \return         0 is parity was ok, 1 if parity was not correct.
+ *
+ * \warning        DES is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des_key_check_key_parity( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+/**
+ * \brief          Check that key is not a weak or semi-weak DES key
+ *
+ * \param key      8-byte secret key
+ *
+ * \return         0 if no weak key was found, 1 if a weak key was identified.
+ *
+ * \warning        DES is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des_key_check_weak( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+/**
+ * \brief          DES key schedule (56-bit, encryption)
+ *
+ * \param ctx      DES context to be initialized
+ * \param key      8-byte secret key
+ *
+ * \return         0
+ *
+ * \warning        DES is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des_setkey_enc( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+/**
+ * \brief          DES key schedule (56-bit, decryption)
+ *
+ * \param ctx      DES context to be initialized
+ * \param key      8-byte secret key
+ *
+ * \return         0
+ *
+ * \warning        DES is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des_setkey_dec( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+/**
+ * \brief          Triple-DES key schedule (112-bit, encryption)
+ *
+ * \param ctx      3DES context to be initialized
+ * \param key      16-byte secret key
+ *
+ * \return         0
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des3_set2key_enc( mbedtls_des3_context *ctx,
+                      const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] );
+
+/**
+ * \brief          Triple-DES key schedule (112-bit, decryption)
+ *
+ * \param ctx      3DES context to be initialized
+ * \param key      16-byte secret key
+ *
+ * \return         0
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des3_set2key_dec( mbedtls_des3_context *ctx,
+                      const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] );
+
+/**
+ * \brief          Triple-DES key schedule (168-bit, encryption)
+ *
+ * \param ctx      3DES context to be initialized
+ * \param key      24-byte secret key
+ *
+ * \return         0
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des3_set3key_enc( mbedtls_des3_context *ctx,
+                      const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] );
+
+/**
+ * \brief          Triple-DES key schedule (168-bit, decryption)
+ *
+ * \param ctx      3DES context to be initialized
+ * \param key      24-byte secret key
+ *
+ * \return         0
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des3_set3key_dec( mbedtls_des3_context *ctx,
+                      const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] );
+
+/**
+ * \brief          DES-ECB block encryption/decryption
+ *
+ * \param ctx      DES context
+ * \param input    64-bit input block
+ * \param output   64-bit output block
+ *
+ * \return         0 if successful
+ *
+ * \warning        DES is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des_crypt_ecb( mbedtls_des_context *ctx,
+                    const unsigned char input[8],
+                    unsigned char output[8] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief          DES-CBC buffer encryption/decryption
+ *
+ * \note           Upon exit, the content of the IV is updated so that you can
+ *                 call the function same function again on the following
+ *                 block(s) of data and get the same result as if it was
+ *                 encrypted in one call. This allows a "streaming" usage.
+ *                 If on the other hand you need to retain the contents of the
+ *                 IV, you should either save it manually or use the cipher
+ *                 module instead.
+ *
+ * \param ctx      DES context
+ * \param mode     MBEDTLS_DES_ENCRYPT or MBEDTLS_DES_DECRYPT
+ * \param length   length of the input data
+ * \param iv       initialization vector (updated after use)
+ * \param input    buffer holding the input data
+ * \param output   buffer holding the output data
+ *
+ * \warning        DES is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des_crypt_cbc( mbedtls_des_context *ctx,
+                    int mode,
+                    size_t length,
+                    unsigned char iv[8],
+                    const unsigned char *input,
+                    unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+/**
+ * \brief          3DES-ECB block encryption/decryption
+ *
+ * \param ctx      3DES context
+ * \param input    64-bit input block
+ * \param output   64-bit output block
+ *
+ * \return         0 if successful
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des3_crypt_ecb( mbedtls_des3_context *ctx,
+                     const unsigned char input[8],
+                     unsigned char output[8] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief          3DES-CBC buffer encryption/decryption
+ *
+ * \note           Upon exit, the content of the IV is updated so that you can
+ *                 call the function same function again on the following
+ *                 block(s) of data and get the same result as if it was
+ *                 encrypted in one call. This allows a "streaming" usage.
+ *                 If on the other hand you need to retain the contents of the
+ *                 IV, you should either save it manually or use the cipher
+ *                 module instead.
+ *
+ * \param ctx      3DES context
+ * \param mode     MBEDTLS_DES_ENCRYPT or MBEDTLS_DES_DECRYPT
+ * \param length   length of the input data
+ * \param iv       initialization vector (updated after use)
+ * \param input    buffer holding the input data
+ * \param output   buffer holding the output data
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_des3_crypt_cbc( mbedtls_des3_context *ctx,
+                     int mode,
+                     size_t length,
+                     unsigned char iv[8],
+                     const unsigned char *input,
+                     unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+/**
+ * \brief          Internal function for key expansion.
+ *                 (Only exposed to allow overriding it,
+ *                 see MBEDTLS_DES_SETKEY_ALT)
+ *
+ * \param SK       Round keys
+ * \param key      Base key
+ *
+ * \warning        DES is considered a weak cipher and its use constitutes a
+ *                 security risk. We recommend considering stronger ciphers
+ *                 instead.
+ */
+void mbedtls_des_setkey( uint32_t SK[32],
+                         const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ */
+MBEDTLS_CHECK_RETURN_CRITICAL
+int mbedtls_des_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* des.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/dhm.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/dhm.h
new file mode 100644
index 00000000000..c4b15a2c452
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/dhm.h
@@ -0,0 +1,1103 @@
+/**
+ * \file dhm.h
+ *
+ * \brief   This file contains Diffie-Hellman-Merkle (DHM) key exchange
+ *          definitions and functions.
+ *
+ * Diffie-Hellman-Merkle (DHM) key exchange is defined in
+ * <em>RFC-2631: Diffie-Hellman Key Agreement Method</em> and
+ * <em>Public-Key Cryptography Standards (PKCS) #3: Diffie
+ * Hellman Key Agreement Standard</em>.
+ *
+ * <em>RFC-3526: More Modular Exponential (MODP) Diffie-Hellman groups for
+ * Internet Key Exchange (IKE)</em> defines a number of standardized
+ * Diffie-Hellman groups for IKE.
+ *
+ * <em>RFC-5114: Additional Diffie-Hellman Groups for Use with IETF
+ * Standards</em> defines a number of standardized Diffie-Hellman
+ * groups that can be used.
+ *
+ * \warning  The security of the DHM key exchange relies on the proper choice
+ *           of prime modulus - optimally, it should be a safe prime. The usage
+ *           of non-safe primes both decreases the difficulty of the underlying
+ *           discrete logarithm problem and can lead to small subgroup attacks
+ *           leaking private exponent bits when invalid public keys are used
+ *           and not detected. This is especially relevant if the same DHM
+ *           parameters are reused for multiple key exchanges as in static DHM,
+ *           while the criticality of small-subgroup attacks is lower for
+ *           ephemeral DHM.
+ *
+ * \warning  For performance reasons, the code does neither perform primality
+ *           nor safe primality tests, nor the expensive checks for invalid
+ *           subgroups. Moreover, even if these were performed, non-standardized
+ *           primes cannot be trusted because of the possibility of backdoors
+ *           that can't be effectively checked for.
+ *
+ * \warning  Diffie-Hellman-Merkle is therefore a security risk when not using
+ *           standardized primes generated using a trustworthy ("nothing up
+ *           my sleeve") method, such as the RFC 3526 / 7919 primes. In the TLS
+ *           protocol, DH parameters need to be negotiated, so using the default
+ *           primes systematically is not always an option. If possible, use
+ *           Elliptic Curve Diffie-Hellman (ECDH), which has better performance,
+ *           and for which the TLS protocol mandates the use of standard
+ *           parameters.
+ *
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_DHM_H
+#define MBEDTLS_DHM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+#include "mbedtls/bignum.h"
+
+/*
+ * DHM Error codes
+ */
+/** Bad input parameters. */
+#define MBEDTLS_ERR_DHM_BAD_INPUT_DATA                    -0x3080
+/** Reading of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_READ_PARAMS_FAILED                -0x3100
+/** Making of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED                -0x3180
+/** Reading of the public values failed. */
+#define MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED                -0x3200
+/** Making of the public value failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED                -0x3280
+/** Calculation of the DHM secret failed. */
+#define MBEDTLS_ERR_DHM_CALC_SECRET_FAILED                -0x3300
+/** The ASN.1 data is not formatted correctly. */
+#define MBEDTLS_ERR_DHM_INVALID_FORMAT                    -0x3380
+/** Allocation of memory failed. */
+#define MBEDTLS_ERR_DHM_ALLOC_FAILED                      -0x3400
+/** Read or write of file failed. */
+#define MBEDTLS_ERR_DHM_FILE_IO_ERROR                     -0x3480
+
+/* MBEDTLS_ERR_DHM_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** DHM hardware accelerator failed. */
+#define MBEDTLS_ERR_DHM_HW_ACCEL_FAILED                   -0x3500
+
+/** Setting the modulus and generator failed. */
+#define MBEDTLS_ERR_DHM_SET_GROUP_FAILED                  -0x3580
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_DHM_ALT)
+
+/**
+ * \brief          The DHM context structure.
+ */
+typedef struct mbedtls_dhm_context
+{
+    size_t len;         /*!<  The size of \p P in Bytes. */
+    mbedtls_mpi P;      /*!<  The prime modulus. */
+    mbedtls_mpi G;      /*!<  The generator. */
+    mbedtls_mpi X;      /*!<  Our secret value. */
+    mbedtls_mpi GX;     /*!<  Our public key = \c G^X mod \c P. */
+    mbedtls_mpi GY;     /*!<  The public key of the peer = \c G^Y mod \c P. */
+    mbedtls_mpi K;      /*!<  The shared secret = \c G^(XY) mod \c P. */
+    mbedtls_mpi RP;     /*!<  The cached value = \c R^2 mod \c P. */
+    mbedtls_mpi Vi;     /*!<  The blinding value. */
+    mbedtls_mpi Vf;     /*!<  The unblinding value. */
+    mbedtls_mpi pX;     /*!<  The previous \c X. */
+}
+mbedtls_dhm_context;
+
+#else /* MBEDTLS_DHM_ALT */
+#include "dhm_alt.h"
+#endif /* MBEDTLS_DHM_ALT */
+
+/**
+ * \brief          This function initializes the DHM context.
+ *
+ * \param ctx      The DHM context to initialize.
+ */
+void mbedtls_dhm_init( mbedtls_dhm_context *ctx );
+
+/**
+ * \brief          This function parses the DHM parameters in a
+ *                 TLS ServerKeyExchange handshake message
+ *                 (DHM modulus, generator, and public key).
+ *
+ * \note           In a TLS handshake, this is the how the client
+ *                 sets up its DHM context from the server's public
+ *                 DHM key material.
+ *
+ * \param ctx      The DHM context to use. This must be initialized.
+ * \param p        On input, *p must be the start of the input buffer.
+ *                 On output, *p is updated to point to the end of the data
+ *                 that has been read. On success, this is the first byte
+ *                 past the end of the ServerKeyExchange parameters.
+ *                 On error, this is the point at which an error has been
+ *                 detected, which is usually not useful except to debug
+ *                 failures.
+ * \param end      The end of the input buffer.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_read_params( mbedtls_dhm_context *ctx,
+                             unsigned char **p,
+                             const unsigned char *end );
+
+/**
+ * \brief          This function generates a DHM key pair and exports its
+ *                 public part together with the DHM parameters in the format
+ *                 used in a TLS ServerKeyExchange handshake message.
+ *
+ * \note           This function assumes that the DHM parameters \c ctx->P
+ *                 and \c ctx->G have already been properly set. For that, use
+ *                 mbedtls_dhm_set_group() below in conjunction with
+ *                 mbedtls_mpi_read_binary() and mbedtls_mpi_read_string().
+ *
+ * \note           In a TLS handshake, this is the how the server generates
+ *                 and exports its DHM key material.
+ *
+ * \param ctx      The DHM context to use. This must be initialized
+ *                 and have the DHM parameters set. It may or may not
+ *                 already have imported the peer's public key.
+ * \param x_size   The private key size in Bytes.
+ * \param olen     The address at which to store the number of Bytes
+ *                 written on success. This must not be \c NULL.
+ * \param output   The destination buffer. This must be a writable buffer of
+ *                 sufficient size to hold the reduced binary presentation of
+ *                 the modulus, the generator and the public key, each wrapped
+ *                 with a 2-byte length field. It is the responsibility of the
+ *                 caller to ensure that enough space is available. Refer to
+ *                 mbedtls_mpi_size() to computing the byte-size of an MPI.
+ * \param f_rng    The RNG function. Must not be \c NULL.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be
+ *                 \c NULL if \p f_rng doesn't need a context parameter.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_make_params( mbedtls_dhm_context *ctx, int x_size,
+                     unsigned char *output, size_t *olen,
+                     int (*f_rng)(void *, unsigned char *, size_t),
+                     void *p_rng );
+
+/**
+ * \brief          This function sets the prime modulus and generator.
+ *
+ * \note           This function can be used to set \c ctx->P, \c ctx->G
+ *                 in preparation for mbedtls_dhm_make_params().
+ *
+ * \param ctx      The DHM context to configure. This must be initialized.
+ * \param P        The MPI holding the DHM prime modulus. This must be
+ *                 an initialized MPI.
+ * \param G        The MPI holding the DHM generator. This must be an
+ *                 initialized MPI.
+ *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_set_group( mbedtls_dhm_context *ctx,
+                           const mbedtls_mpi *P,
+                           const mbedtls_mpi *G );
+
+/**
+ * \brief          This function imports the raw public value of the peer.
+ *
+ * \note           In a TLS handshake, this is the how the server imports
+ *                 the Client's public DHM key.
+ *
+ * \param ctx      The DHM context to use. This must be initialized and have
+ *                 its DHM parameters set, e.g. via mbedtls_dhm_set_group().
+ *                 It may or may not already have generated its own private key.
+ * \param input    The input buffer containing the \c G^Y value of the peer.
+ *                 This must be a readable buffer of size \p ilen Bytes.
+ * \param ilen     The size of the input buffer \p input in Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_read_public( mbedtls_dhm_context *ctx,
+                     const unsigned char *input, size_t ilen );
+
+/**
+ * \brief          This function creates a DHM key pair and exports
+ *                 the raw public key in big-endian format.
+ *
+ * \note           The destination buffer is always fully written
+ *                 so as to contain a big-endian representation of G^X mod P.
+ *                 If it is larger than \c ctx->len, it is padded accordingly
+ *                 with zero-bytes at the beginning.
+ *
+ * \param ctx      The DHM context to use. This must be initialized and
+ *                 have the DHM parameters set. It may or may not already
+ *                 have imported the peer's public key.
+ * \param x_size   The private key size in Bytes.
+ * \param output   The destination buffer. This must be a writable buffer of
+ *                 size \p olen Bytes.
+ * \param olen     The length of the destination buffer. This must be at least
+ *                 equal to `ctx->len` (the size of \c P).
+ * \param f_rng    The RNG function. This must not be \c NULL.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be \c NULL
+ *                 if \p f_rng doesn't need a context argument.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_make_public( mbedtls_dhm_context *ctx, int x_size,
+                     unsigned char *output, size_t olen,
+                     int (*f_rng)(void *, unsigned char *, size_t),
+                     void *p_rng );
+
+/**
+ * \brief          This function derives and exports the shared secret
+ *                 \c (G^Y)^X mod \c P.
+ *
+ * \note           If \p f_rng is not \c NULL, it is used to blind the input as
+ *                 a countermeasure against timing attacks. Blinding is used
+ *                 only if our private key \c X is re-used, and not used
+ *                 otherwise. We recommend always passing a non-NULL
+ *                 \p f_rng argument.
+ *
+ * \param ctx           The DHM context to use. This must be initialized
+ *                      and have its own private key generated and the peer's
+ *                      public key imported.
+ * \param output        The buffer to write the generated shared key to. This
+ *                      must be a writable buffer of size \p output_size Bytes.
+ * \param output_size   The size of the destination buffer. This must be at
+ *                      least the size of \c ctx->len (the size of \c P).
+ * \param olen          On exit, holds the actual number of Bytes written.
+ * \param f_rng         The RNG function, for blinding purposes. This may
+ *                      b \c NULL if blinding isn't needed.
+ * \param p_rng         The RNG context. This may be \c NULL if \p f_rng
+ *                      doesn't need a context argument.
+ *
+ * \return              \c 0 on success.
+ * \return              An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_calc_secret( mbedtls_dhm_context *ctx,
+                     unsigned char *output, size_t output_size, size_t *olen,
+                     int (*f_rng)(void *, unsigned char *, size_t),
+                     void *p_rng );
+
+/**
+ * \brief          This function frees and clears the components
+ *                 of a DHM context.
+ *
+ * \param ctx      The DHM context to free and clear. This may be \c NULL,
+ *                 in which case this function is a no-op. If it is not \c NULL,
+ *                 it must point to an initialized DHM context.
+ */
+void mbedtls_dhm_free( mbedtls_dhm_context *ctx );
+
+#if defined(MBEDTLS_ASN1_PARSE_C)
+/**
+ * \brief             This function parses DHM parameters in PEM or DER format.
+ *
+ * \param dhm         The DHM context to import the DHM parameters into.
+ *                    This must be initialized.
+ * \param dhmin       The input buffer. This must be a readable buffer of
+ *                    length \p dhminlen Bytes.
+ * \param dhminlen    The size of the input buffer \p dhmin, including the
+ *                    terminating \c NULL Byte for PEM data.
+ *
+ * \return            \c 0 on success.
+ * \return            An \c MBEDTLS_ERR_DHM_XXX or \c MBEDTLS_ERR_PEM_XXX error
+ *                    code on failure.
+ */
+int mbedtls_dhm_parse_dhm( mbedtls_dhm_context *dhm, const unsigned char *dhmin,
+                           size_t dhminlen );
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief          This function loads and parses DHM parameters from a file.
+ *
+ * \param dhm      The DHM context to load the parameters to.
+ *                 This must be initialized.
+ * \param path     The filename to read the DHM parameters from.
+ *                 This must not be \c NULL.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_DHM_XXX or \c MBEDTLS_ERR_PEM_XXX
+ *                 error code on failure.
+ */
+int mbedtls_dhm_parse_dhmfile( mbedtls_dhm_context *dhm, const char *path );
+#endif /* MBEDTLS_FS_IO */
+#endif /* MBEDTLS_ASN1_PARSE_C */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          The DMH checkup routine.
+ *
+ * \return         \c 0 on success.
+ * \return         \c 1 on failure.
+ */
+int mbedtls_dhm_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * RFC 3526, RFC 5114 and RFC 7919 standardize a number of
+ * Diffie-Hellman groups, some of which are included here
+ * for use within the SSL/TLS module and the user's convenience
+ * when configuring the Diffie-Hellman parameters by hand
+ * through \c mbedtls_ssl_conf_dh_param.
+ *
+ * The following lists the source of the above groups in the standards:
+ * - RFC 5114 section 2.2:  2048-bit MODP Group with 224-bit Prime Order Subgroup
+ * - RFC 3526 section 3:    2048-bit MODP Group
+ * - RFC 3526 section 4:    3072-bit MODP Group
+ * - RFC 3526 section 5:    4096-bit MODP Group
+ * - RFC 7919 section A.1:  ffdhe2048
+ * - RFC 7919 section A.2:  ffdhe3072
+ * - RFC 7919 section A.3:  ffdhe4096
+ * - RFC 7919 section A.4:  ffdhe6144
+ * - RFC 7919 section A.5:  ffdhe8192
+ *
+ * The constants with suffix "_p" denote the chosen prime moduli, while
+ * the constants with suffix "_g" denote the chosen generator
+ * of the associated prime field.
+ *
+ * The constants further suffixed with "_bin" are provided in binary format,
+ * while all other constants represent null-terminated strings holding the
+ * hexadecimal presentation of the respective numbers.
+ *
+ * The primes from RFC 3526 and RFC 7919 have been generating by the following
+ * trust-worthy procedure:
+ * - Fix N in { 2048, 3072, 4096, 6144, 8192 } and consider the N-bit number
+ *   the first and last 64 bits are all 1, and the remaining N - 128 bits of
+ *   which are 0x7ff...ff.
+ * - Add the smallest multiple of the first N - 129 bits of the binary expansion
+ *   of pi (for RFC 5236) or e (for RFC 7919) to this intermediate bit-string
+ *   such that the resulting integer is a safe-prime.
+ * - The result is the respective RFC 3526 / 7919 prime, and the corresponding
+ *   generator is always chosen to be 2 (which is a square for these prime,
+ *   hence the corresponding subgroup has order (p-1)/2 and avoids leaking a
+ *   bit in the private exponent).
+ *
+ */
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+/**
+ * \warning The origin of the primes in RFC 5114 is not documented and
+ *          their use therefore constitutes a security risk!
+ *
+ * \deprecated The hex-encoded primes from RFC 5114 are deprecated and are
+ *             likely to be removed in a future version of the library without
+ *             replacement.
+ */
+
+/**
+ * The hexadecimal presentation of the prime underlying the
+ * 2048-bit MODP Group with 224-bit Prime Order Subgroup, as defined
+ * in <em>RFC-5114: Additional Diffie-Hellman Groups for Use with
+ * IETF Standards</em>.
+ */
+#define MBEDTLS_DHM_RFC5114_MODP_2048_P                         \
+    MBEDTLS_DEPRECATED_STRING_CONSTANT(                         \
+        "AD107E1E9123A9D0D660FAA79559C51FA20D64E5683B9FD1"      \
+        "B54B1597B61D0A75E6FA141DF95A56DBAF9A3C407BA1DF15"      \
+        "EB3D688A309C180E1DE6B85A1274A0A66D3F8152AD6AC212"      \
+        "9037C9EDEFDA4DF8D91E8FEF55B7394B7AD5B7D0B6C12207"      \
+        "C9F98D11ED34DBF6C6BA0B2C8BBC27BE6A00E0A0B9C49708"      \
+        "B3BF8A317091883681286130BC8985DB1602E714415D9330"      \
+        "278273C7DE31EFDC7310F7121FD5A07415987D9ADC0A486D"      \
+        "CDF93ACC44328387315D75E198C641A480CD86A1B9E587E8"      \
+        "BE60E69CC928B2B9C52172E413042E9B23F10B0E16E79763"      \
+        "C9B53DCF4BA80A29E3FB73C16B8E75B97EF363E2FFA31F71"      \
+        "CF9DE5384E71B81C0AC4DFFE0C10E64F" )
+
+/**
+ * The hexadecimal presentation of the chosen generator of the 2048-bit MODP
+ * Group with 224-bit Prime Order Subgroup, as defined in <em>RFC-5114:
+ * Additional Diffie-Hellman Groups for Use with IETF Standards</em>.
+ */
+#define MBEDTLS_DHM_RFC5114_MODP_2048_G                         \
+    MBEDTLS_DEPRECATED_STRING_CONSTANT(                         \
+        "AC4032EF4F2D9AE39DF30B5C8FFDAC506CDEBE7B89998CAF"      \
+        "74866A08CFE4FFE3A6824A4E10B9A6F0DD921F01A70C4AFA"      \
+        "AB739D7700C29F52C57DB17C620A8652BE5E9001A8D66AD7"      \
+        "C17669101999024AF4D027275AC1348BB8A762D0521BC98A"      \
+        "E247150422EA1ED409939D54DA7460CDB5F6C6B250717CBE"      \
+        "F180EB34118E98D119529A45D6F834566E3025E316A330EF"      \
+        "BB77A86F0C1AB15B051AE3D428C8F8ACB70A8137150B8EEB"      \
+        "10E183EDD19963DDD9E263E4770589EF6AA21E7F5F2FF381"      \
+        "B539CCE3409D13CD566AFBB48D6C019181E1BCFE94B30269"      \
+        "EDFE72FE9B6AA4BD7B5A0F1C71CFFF4C19C418E1F6EC0179"      \
+        "81BC087F2A7065B384B890D3191F2BFA" )
+
+/**
+ * The hexadecimal presentation of the prime underlying the 2048-bit MODP
+ * Group, as defined in <em>RFC-3526: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ *
+ * \deprecated The hex-encoded primes from RFC 3625 are deprecated and
+ *             superseded by the corresponding macros providing them as
+ *             binary constants. Their hex-encoded constants are likely
+ *             to be removed in a future version of the library.
+ *
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_2048_P                         \
+    MBEDTLS_DEPRECATED_STRING_CONSTANT(                         \
+        "FFFFFFFFFFFFFFFFC90FDAA22168C234C4C6628B80DC1CD1"      \
+        "29024E088A67CC74020BBEA63B139B22514A08798E3404DD"      \
+        "EF9519B3CD3A431B302B0A6DF25F14374FE1356D6D51C245"      \
+        "E485B576625E7EC6F44C42E9A637ED6B0BFF5CB6F406B7ED"      \
+        "EE386BFB5A899FA5AE9F24117C4B1FE649286651ECE45B3D"      \
+        "C2007CB8A163BF0598DA48361C55D39A69163FA8FD24CF5F"      \
+        "83655D23DCA3AD961C62F356208552BB9ED529077096966D"      \
+        "670C354E4ABC9804F1746C08CA18217C32905E462E36CE3B"      \
+        "E39E772C180E86039B2783A2EC07A28FB5C55DF06F4C52C9"      \
+        "DE2BCBF6955817183995497CEA956AE515D2261898FA0510"      \
+        "15728E5A8AACAA68FFFFFFFFFFFFFFFF" )
+
+/**
+ * The hexadecimal presentation of the chosen generator of the 2048-bit MODP
+ * Group, as defined in <em>RFC-3526: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_2048_G                         \
+    MBEDTLS_DEPRECATED_STRING_CONSTANT( "02" )
+
+/**
+ * The hexadecimal presentation of the prime underlying the 3072-bit MODP
+ * Group, as defined in <em>RFC-3072: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_3072_P                         \
+    MBEDTLS_DEPRECATED_STRING_CONSTANT(                         \
+        "FFFFFFFFFFFFFFFFC90FDAA22168C234C4C6628B80DC1CD1"      \
+        "29024E088A67CC74020BBEA63B139B22514A08798E3404DD"      \
+        "EF9519B3CD3A431B302B0A6DF25F14374FE1356D6D51C245"      \
+        "E485B576625E7EC6F44C42E9A637ED6B0BFF5CB6F406B7ED"      \
+        "EE386BFB5A899FA5AE9F24117C4B1FE649286651ECE45B3D"      \
+        "C2007CB8A163BF0598DA48361C55D39A69163FA8FD24CF5F"      \
+        "83655D23DCA3AD961C62F356208552BB9ED529077096966D"      \
+        "670C354E4ABC9804F1746C08CA18217C32905E462E36CE3B"      \
+        "E39E772C180E86039B2783A2EC07A28FB5C55DF06F4C52C9"      \
+        "DE2BCBF6955817183995497CEA956AE515D2261898FA0510"      \
+        "15728E5A8AAAC42DAD33170D04507A33A85521ABDF1CBA64"      \
+        "ECFB850458DBEF0A8AEA71575D060C7DB3970F85A6E1E4C7"      \
+        "ABF5AE8CDB0933D71E8C94E04A25619DCEE3D2261AD2EE6B"      \
+        "F12FFA06D98A0864D87602733EC86A64521F2B18177B200C"      \
+        "BBE117577A615D6C770988C0BAD946E208E24FA074E5AB31"      \
+        "43DB5BFCE0FD108E4B82D120A93AD2CAFFFFFFFFFFFFFFFF" )
+
+/**
+ * The hexadecimal presentation of the chosen generator of the 3072-bit MODP
+ * Group, as defined in <em>RFC-3526: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_3072_G                      \
+    MBEDTLS_DEPRECATED_STRING_CONSTANT( "02" )
+
+/**
+ * The hexadecimal presentation of the prime underlying the 4096-bit MODP
+ * Group, as defined in <em>RFC-3526: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_4096_P                      \
+    MBEDTLS_DEPRECATED_STRING_CONSTANT(                      \
+        "FFFFFFFFFFFFFFFFC90FDAA22168C234C4C6628B80DC1CD1"   \
+        "29024E088A67CC74020BBEA63B139B22514A08798E3404DD"   \
+        "EF9519B3CD3A431B302B0A6DF25F14374FE1356D6D51C245"   \
+        "E485B576625E7EC6F44C42E9A637ED6B0BFF5CB6F406B7ED"   \
+        "EE386BFB5A899FA5AE9F24117C4B1FE649286651ECE45B3D"   \
+        "C2007CB8A163BF0598DA48361C55D39A69163FA8FD24CF5F"   \
+        "83655D23DCA3AD961C62F356208552BB9ED529077096966D"   \
+        "670C354E4ABC9804F1746C08CA18217C32905E462E36CE3B"   \
+        "E39E772C180E86039B2783A2EC07A28FB5C55DF06F4C52C9"   \
+        "DE2BCBF6955817183995497CEA956AE515D2261898FA0510"   \
+        "15728E5A8AAAC42DAD33170D04507A33A85521ABDF1CBA64"   \
+        "ECFB850458DBEF0A8AEA71575D060C7DB3970F85A6E1E4C7"   \
+        "ABF5AE8CDB0933D71E8C94E04A25619DCEE3D2261AD2EE6B"   \
+        "F12FFA06D98A0864D87602733EC86A64521F2B18177B200C"   \
+        "BBE117577A615D6C770988C0BAD946E208E24FA074E5AB31"   \
+        "43DB5BFCE0FD108E4B82D120A92108011A723C12A787E6D7"   \
+        "88719A10BDBA5B2699C327186AF4E23C1A946834B6150BDA"   \
+        "2583E9CA2AD44CE8DBBBC2DB04DE8EF92E8EFC141FBECAA6"   \
+        "287C59474E6BC05D99B2964FA090C3A2233BA186515BE7ED"   \
+        "1F612970CEE2D7AFB81BDD762170481CD0069127D5B05AA9"   \
+        "93B4EA988D8FDDC186FFB7DC90A6C08F4DF435C934063199"   \
+        "FFFFFFFFFFFFFFFF" )
+
+/**
+ * The hexadecimal presentation of the chosen generator of the 4096-bit MODP
+ * Group, as defined in <em>RFC-3526: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_4096_G                      \
+    MBEDTLS_DEPRECATED_STRING_CONSTANT( "02" )
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/*
+ * Trustworthy DHM parameters in binary form
+ */
+
+#define MBEDTLS_DHM_RFC3526_MODP_2048_P_BIN {        \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+     0xC9, 0x0F, 0xDA, 0xA2, 0x21, 0x68, 0xC2, 0x34, \
+     0xC4, 0xC6, 0x62, 0x8B, 0x80, 0xDC, 0x1C, 0xD1, \
+     0x29, 0x02, 0x4E, 0x08, 0x8A, 0x67, 0xCC, 0x74, \
+     0x02, 0x0B, 0xBE, 0xA6, 0x3B, 0x13, 0x9B, 0x22, \
+     0x51, 0x4A, 0x08, 0x79, 0x8E, 0x34, 0x04, 0xDD, \
+     0xEF, 0x95, 0x19, 0xB3, 0xCD, 0x3A, 0x43, 0x1B, \
+     0x30, 0x2B, 0x0A, 0x6D, 0xF2, 0x5F, 0x14, 0x37, \
+     0x4F, 0xE1, 0x35, 0x6D, 0x6D, 0x51, 0xC2, 0x45, \
+     0xE4, 0x85, 0xB5, 0x76, 0x62, 0x5E, 0x7E, 0xC6, \
+     0xF4, 0x4C, 0x42, 0xE9, 0xA6, 0x37, 0xED, 0x6B, \
+     0x0B, 0xFF, 0x5C, 0xB6, 0xF4, 0x06, 0xB7, 0xED, \
+     0xEE, 0x38, 0x6B, 0xFB, 0x5A, 0x89, 0x9F, 0xA5, \
+     0xAE, 0x9F, 0x24, 0x11, 0x7C, 0x4B, 0x1F, 0xE6, \
+     0x49, 0x28, 0x66, 0x51, 0xEC, 0xE4, 0x5B, 0x3D, \
+     0xC2, 0x00, 0x7C, 0xB8, 0xA1, 0x63, 0xBF, 0x05, \
+     0x98, 0xDA, 0x48, 0x36, 0x1C, 0x55, 0xD3, 0x9A, \
+     0x69, 0x16, 0x3F, 0xA8, 0xFD, 0x24, 0xCF, 0x5F, \
+     0x83, 0x65, 0x5D, 0x23, 0xDC, 0xA3, 0xAD, 0x96, \
+     0x1C, 0x62, 0xF3, 0x56, 0x20, 0x85, 0x52, 0xBB, \
+     0x9E, 0xD5, 0x29, 0x07, 0x70, 0x96, 0x96, 0x6D, \
+     0x67, 0x0C, 0x35, 0x4E, 0x4A, 0xBC, 0x98, 0x04, \
+     0xF1, 0x74, 0x6C, 0x08, 0xCA, 0x18, 0x21, 0x7C, \
+     0x32, 0x90, 0x5E, 0x46, 0x2E, 0x36, 0xCE, 0x3B, \
+     0xE3, 0x9E, 0x77, 0x2C, 0x18, 0x0E, 0x86, 0x03, \
+     0x9B, 0x27, 0x83, 0xA2, 0xEC, 0x07, 0xA2, 0x8F, \
+     0xB5, 0xC5, 0x5D, 0xF0, 0x6F, 0x4C, 0x52, 0xC9, \
+     0xDE, 0x2B, 0xCB, 0xF6, 0x95, 0x58, 0x17, 0x18, \
+     0x39, 0x95, 0x49, 0x7C, 0xEA, 0x95, 0x6A, 0xE5, \
+     0x15, 0xD2, 0x26, 0x18, 0x98, 0xFA, 0x05, 0x10, \
+     0x15, 0x72, 0x8E, 0x5A, 0x8A, 0xAC, 0xAA, 0x68, \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC3526_MODP_2048_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC3526_MODP_3072_P_BIN {       \
+    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+    0xC9, 0x0F, 0xDA, 0xA2, 0x21, 0x68, 0xC2, 0x34, \
+    0xC4, 0xC6, 0x62, 0x8B, 0x80, 0xDC, 0x1C, 0xD1, \
+    0x29, 0x02, 0x4E, 0x08, 0x8A, 0x67, 0xCC, 0x74, \
+    0x02, 0x0B, 0xBE, 0xA6, 0x3B, 0x13, 0x9B, 0x22, \
+    0x51, 0x4A, 0x08, 0x79, 0x8E, 0x34, 0x04, 0xDD, \
+    0xEF, 0x95, 0x19, 0xB3, 0xCD, 0x3A, 0x43, 0x1B, \
+    0x30, 0x2B, 0x0A, 0x6D, 0xF2, 0x5F, 0x14, 0x37, \
+    0x4F, 0xE1, 0x35, 0x6D, 0x6D, 0x51, 0xC2, 0x45, \
+    0xE4, 0x85, 0xB5, 0x76, 0x62, 0x5E, 0x7E, 0xC6, \
+    0xF4, 0x4C, 0x42, 0xE9, 0xA6, 0x37, 0xED, 0x6B, \
+    0x0B, 0xFF, 0x5C, 0xB6, 0xF4, 0x06, 0xB7, 0xED, \
+    0xEE, 0x38, 0x6B, 0xFB, 0x5A, 0x89, 0x9F, 0xA5, \
+    0xAE, 0x9F, 0x24, 0x11, 0x7C, 0x4B, 0x1F, 0xE6, \
+    0x49, 0x28, 0x66, 0x51, 0xEC, 0xE4, 0x5B, 0x3D, \
+    0xC2, 0x00, 0x7C, 0xB8, 0xA1, 0x63, 0xBF, 0x05, \
+    0x98, 0xDA, 0x48, 0x36, 0x1C, 0x55, 0xD3, 0x9A, \
+    0x69, 0x16, 0x3F, 0xA8, 0xFD, 0x24, 0xCF, 0x5F, \
+    0x83, 0x65, 0x5D, 0x23, 0xDC, 0xA3, 0xAD, 0x96, \
+    0x1C, 0x62, 0xF3, 0x56, 0x20, 0x85, 0x52, 0xBB, \
+    0x9E, 0xD5, 0x29, 0x07, 0x70, 0x96, 0x96, 0x6D, \
+    0x67, 0x0C, 0x35, 0x4E, 0x4A, 0xBC, 0x98, 0x04, \
+    0xF1, 0x74, 0x6C, 0x08, 0xCA, 0x18, 0x21, 0x7C, \
+    0x32, 0x90, 0x5E, 0x46, 0x2E, 0x36, 0xCE, 0x3B, \
+    0xE3, 0x9E, 0x77, 0x2C, 0x18, 0x0E, 0x86, 0x03, \
+    0x9B, 0x27, 0x83, 0xA2, 0xEC, 0x07, 0xA2, 0x8F, \
+    0xB5, 0xC5, 0x5D, 0xF0, 0x6F, 0x4C, 0x52, 0xC9, \
+    0xDE, 0x2B, 0xCB, 0xF6, 0x95, 0x58, 0x17, 0x18, \
+    0x39, 0x95, 0x49, 0x7C, 0xEA, 0x95, 0x6A, 0xE5, \
+    0x15, 0xD2, 0x26, 0x18, 0x98, 0xFA, 0x05, 0x10, \
+    0x15, 0x72, 0x8E, 0x5A, 0x8A, 0xAA, 0xC4, 0x2D, \
+    0xAD, 0x33, 0x17, 0x0D, 0x04, 0x50, 0x7A, 0x33, \
+    0xA8, 0x55, 0x21, 0xAB, 0xDF, 0x1C, 0xBA, 0x64, \
+    0xEC, 0xFB, 0x85, 0x04, 0x58, 0xDB, 0xEF, 0x0A, \
+    0x8A, 0xEA, 0x71, 0x57, 0x5D, 0x06, 0x0C, 0x7D, \
+    0xB3, 0x97, 0x0F, 0x85, 0xA6, 0xE1, 0xE4, 0xC7, \
+    0xAB, 0xF5, 0xAE, 0x8C, 0xDB, 0x09, 0x33, 0xD7, \
+    0x1E, 0x8C, 0x94, 0xE0, 0x4A, 0x25, 0x61, 0x9D, \
+    0xCE, 0xE3, 0xD2, 0x26, 0x1A, 0xD2, 0xEE, 0x6B, \
+    0xF1, 0x2F, 0xFA, 0x06, 0xD9, 0x8A, 0x08, 0x64, \
+    0xD8, 0x76, 0x02, 0x73, 0x3E, 0xC8, 0x6A, 0x64, \
+    0x52, 0x1F, 0x2B, 0x18, 0x17, 0x7B, 0x20, 0x0C, \
+    0xBB, 0xE1, 0x17, 0x57, 0x7A, 0x61, 0x5D, 0x6C, \
+    0x77, 0x09, 0x88, 0xC0, 0xBA, 0xD9, 0x46, 0xE2, \
+    0x08, 0xE2, 0x4F, 0xA0, 0x74, 0xE5, 0xAB, 0x31, \
+    0x43, 0xDB, 0x5B, 0xFC, 0xE0, 0xFD, 0x10, 0x8E, \
+    0x4B, 0x82, 0xD1, 0x20, 0xA9, 0x3A, 0xD2, 0xCA, \
+    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC3526_MODP_3072_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC3526_MODP_4096_P_BIN  {       \
+    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,  \
+    0xC9, 0x0F, 0xDA, 0xA2, 0x21, 0x68, 0xC2, 0x34,  \
+    0xC4, 0xC6, 0x62, 0x8B, 0x80, 0xDC, 0x1C, 0xD1,  \
+    0x29, 0x02, 0x4E, 0x08, 0x8A, 0x67, 0xCC, 0x74,  \
+    0x02, 0x0B, 0xBE, 0xA6, 0x3B, 0x13, 0x9B, 0x22,  \
+    0x51, 0x4A, 0x08, 0x79, 0x8E, 0x34, 0x04, 0xDD,  \
+    0xEF, 0x95, 0x19, 0xB3, 0xCD, 0x3A, 0x43, 0x1B,  \
+    0x30, 0x2B, 0x0A, 0x6D, 0xF2, 0x5F, 0x14, 0x37,  \
+    0x4F, 0xE1, 0x35, 0x6D, 0x6D, 0x51, 0xC2, 0x45,  \
+    0xE4, 0x85, 0xB5, 0x76, 0x62, 0x5E, 0x7E, 0xC6,  \
+    0xF4, 0x4C, 0x42, 0xE9, 0xA6, 0x37, 0xED, 0x6B,  \
+    0x0B, 0xFF, 0x5C, 0xB6, 0xF4, 0x06, 0xB7, 0xED,  \
+    0xEE, 0x38, 0x6B, 0xFB, 0x5A, 0x89, 0x9F, 0xA5,  \
+    0xAE, 0x9F, 0x24, 0x11, 0x7C, 0x4B, 0x1F, 0xE6,  \
+    0x49, 0x28, 0x66, 0x51, 0xEC, 0xE4, 0x5B, 0x3D,  \
+    0xC2, 0x00, 0x7C, 0xB8, 0xA1, 0x63, 0xBF, 0x05,  \
+    0x98, 0xDA, 0x48, 0x36, 0x1C, 0x55, 0xD3, 0x9A,  \
+    0x69, 0x16, 0x3F, 0xA8, 0xFD, 0x24, 0xCF, 0x5F,  \
+    0x83, 0x65, 0x5D, 0x23, 0xDC, 0xA3, 0xAD, 0x96,  \
+    0x1C, 0x62, 0xF3, 0x56, 0x20, 0x85, 0x52, 0xBB,  \
+    0x9E, 0xD5, 0x29, 0x07, 0x70, 0x96, 0x96, 0x6D,  \
+    0x67, 0x0C, 0x35, 0x4E, 0x4A, 0xBC, 0x98, 0x04,  \
+    0xF1, 0x74, 0x6C, 0x08, 0xCA, 0x18, 0x21, 0x7C,  \
+    0x32, 0x90, 0x5E, 0x46, 0x2E, 0x36, 0xCE, 0x3B,  \
+    0xE3, 0x9E, 0x77, 0x2C, 0x18, 0x0E, 0x86, 0x03,  \
+    0x9B, 0x27, 0x83, 0xA2, 0xEC, 0x07, 0xA2, 0x8F,  \
+    0xB5, 0xC5, 0x5D, 0xF0, 0x6F, 0x4C, 0x52, 0xC9,  \
+    0xDE, 0x2B, 0xCB, 0xF6, 0x95, 0x58, 0x17, 0x18,  \
+    0x39, 0x95, 0x49, 0x7C, 0xEA, 0x95, 0x6A, 0xE5,  \
+    0x15, 0xD2, 0x26, 0x18, 0x98, 0xFA, 0x05, 0x10,  \
+    0x15, 0x72, 0x8E, 0x5A, 0x8A, 0xAA, 0xC4, 0x2D,  \
+    0xAD, 0x33, 0x17, 0x0D, 0x04, 0x50, 0x7A, 0x33,  \
+    0xA8, 0x55, 0x21, 0xAB, 0xDF, 0x1C, 0xBA, 0x64,  \
+    0xEC, 0xFB, 0x85, 0x04, 0x58, 0xDB, 0xEF, 0x0A,  \
+    0x8A, 0xEA, 0x71, 0x57, 0x5D, 0x06, 0x0C, 0x7D,  \
+    0xB3, 0x97, 0x0F, 0x85, 0xA6, 0xE1, 0xE4, 0xC7,  \
+    0xAB, 0xF5, 0xAE, 0x8C, 0xDB, 0x09, 0x33, 0xD7,  \
+    0x1E, 0x8C, 0x94, 0xE0, 0x4A, 0x25, 0x61, 0x9D,  \
+    0xCE, 0xE3, 0xD2, 0x26, 0x1A, 0xD2, 0xEE, 0x6B,  \
+    0xF1, 0x2F, 0xFA, 0x06, 0xD9, 0x8A, 0x08, 0x64,  \
+    0xD8, 0x76, 0x02, 0x73, 0x3E, 0xC8, 0x6A, 0x64,  \
+    0x52, 0x1F, 0x2B, 0x18, 0x17, 0x7B, 0x20, 0x0C,  \
+    0xBB, 0xE1, 0x17, 0x57, 0x7A, 0x61, 0x5D, 0x6C,  \
+    0x77, 0x09, 0x88, 0xC0, 0xBA, 0xD9, 0x46, 0xE2,  \
+    0x08, 0xE2, 0x4F, 0xA0, 0x74, 0xE5, 0xAB, 0x31,  \
+    0x43, 0xDB, 0x5B, 0xFC, 0xE0, 0xFD, 0x10, 0x8E,  \
+    0x4B, 0x82, 0xD1, 0x20, 0xA9, 0x21, 0x08, 0x01,  \
+    0x1A, 0x72, 0x3C, 0x12, 0xA7, 0x87, 0xE6, 0xD7,  \
+    0x88, 0x71, 0x9A, 0x10, 0xBD, 0xBA, 0x5B, 0x26,  \
+    0x99, 0xC3, 0x27, 0x18, 0x6A, 0xF4, 0xE2, 0x3C,  \
+    0x1A, 0x94, 0x68, 0x34, 0xB6, 0x15, 0x0B, 0xDA,  \
+    0x25, 0x83, 0xE9, 0xCA, 0x2A, 0xD4, 0x4C, 0xE8,  \
+    0xDB, 0xBB, 0xC2, 0xDB, 0x04, 0xDE, 0x8E, 0xF9,  \
+    0x2E, 0x8E, 0xFC, 0x14, 0x1F, 0xBE, 0xCA, 0xA6,  \
+    0x28, 0x7C, 0x59, 0x47, 0x4E, 0x6B, 0xC0, 0x5D,  \
+    0x99, 0xB2, 0x96, 0x4F, 0xA0, 0x90, 0xC3, 0xA2,  \
+    0x23, 0x3B, 0xA1, 0x86, 0x51, 0x5B, 0xE7, 0xED,  \
+    0x1F, 0x61, 0x29, 0x70, 0xCE, 0xE2, 0xD7, 0xAF,  \
+    0xB8, 0x1B, 0xDD, 0x76, 0x21, 0x70, 0x48, 0x1C,  \
+    0xD0, 0x06, 0x91, 0x27, 0xD5, 0xB0, 0x5A, 0xA9,  \
+    0x93, 0xB4, 0xEA, 0x98, 0x8D, 0x8F, 0xDD, 0xC1,  \
+    0x86, 0xFF, 0xB7, 0xDC, 0x90, 0xA6, 0xC0, 0x8F,  \
+    0x4D, 0xF4, 0x35, 0xC9, 0x34, 0x06, 0x31, 0x99,  \
+    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC3526_MODP_4096_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE2048_P_BIN {        \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+     0xAD, 0xF8, 0x54, 0x58, 0xA2, 0xBB, 0x4A, 0x9A, \
+     0xAF, 0xDC, 0x56, 0x20, 0x27, 0x3D, 0x3C, 0xF1, \
+     0xD8, 0xB9, 0xC5, 0x83, 0xCE, 0x2D, 0x36, 0x95, \
+     0xA9, 0xE1, 0x36, 0x41, 0x14, 0x64, 0x33, 0xFB, \
+     0xCC, 0x93, 0x9D, 0xCE, 0x24, 0x9B, 0x3E, 0xF9, \
+     0x7D, 0x2F, 0xE3, 0x63, 0x63, 0x0C, 0x75, 0xD8, \
+     0xF6, 0x81, 0xB2, 0x02, 0xAE, 0xC4, 0x61, 0x7A, \
+     0xD3, 0xDF, 0x1E, 0xD5, 0xD5, 0xFD, 0x65, 0x61, \
+     0x24, 0x33, 0xF5, 0x1F, 0x5F, 0x06, 0x6E, 0xD0, \
+     0x85, 0x63, 0x65, 0x55, 0x3D, 0xED, 0x1A, 0xF3, \
+     0xB5, 0x57, 0x13, 0x5E, 0x7F, 0x57, 0xC9, 0x35, \
+     0x98, 0x4F, 0x0C, 0x70, 0xE0, 0xE6, 0x8B, 0x77, \
+     0xE2, 0xA6, 0x89, 0xDA, 0xF3, 0xEF, 0xE8, 0x72, \
+     0x1D, 0xF1, 0x58, 0xA1, 0x36, 0xAD, 0xE7, 0x35, \
+     0x30, 0xAC, 0xCA, 0x4F, 0x48, 0x3A, 0x79, 0x7A, \
+     0xBC, 0x0A, 0xB1, 0x82, 0xB3, 0x24, 0xFB, 0x61, \
+     0xD1, 0x08, 0xA9, 0x4B, 0xB2, 0xC8, 0xE3, 0xFB, \
+     0xB9, 0x6A, 0xDA, 0xB7, 0x60, 0xD7, 0xF4, 0x68, \
+     0x1D, 0x4F, 0x42, 0xA3, 0xDE, 0x39, 0x4D, 0xF4, \
+     0xAE, 0x56, 0xED, 0xE7, 0x63, 0x72, 0xBB, 0x19, \
+     0x0B, 0x07, 0xA7, 0xC8, 0xEE, 0x0A, 0x6D, 0x70, \
+     0x9E, 0x02, 0xFC, 0xE1, 0xCD, 0xF7, 0xE2, 0xEC, \
+     0xC0, 0x34, 0x04, 0xCD, 0x28, 0x34, 0x2F, 0x61, \
+     0x91, 0x72, 0xFE, 0x9C, 0xE9, 0x85, 0x83, 0xFF, \
+     0x8E, 0x4F, 0x12, 0x32, 0xEE, 0xF2, 0x81, 0x83, \
+     0xC3, 0xFE, 0x3B, 0x1B, 0x4C, 0x6F, 0xAD, 0x73, \
+     0x3B, 0xB5, 0xFC, 0xBC, 0x2E, 0xC2, 0x20, 0x05, \
+     0xC5, 0x8E, 0xF1, 0x83, 0x7D, 0x16, 0x83, 0xB2, \
+     0xC6, 0xF3, 0x4A, 0x26, 0xC1, 0xB2, 0xEF, 0xFA, \
+     0x88, 0x6B, 0x42, 0x38, 0x61, 0x28, 0x5C, 0x97, \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE2048_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE3072_P_BIN { \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+     0xAD, 0xF8, 0x54, 0x58, 0xA2, 0xBB, 0x4A, 0x9A, \
+     0xAF, 0xDC, 0x56, 0x20, 0x27, 0x3D, 0x3C, 0xF1, \
+     0xD8, 0xB9, 0xC5, 0x83, 0xCE, 0x2D, 0x36, 0x95, \
+     0xA9, 0xE1, 0x36, 0x41, 0x14, 0x64, 0x33, 0xFB, \
+     0xCC, 0x93, 0x9D, 0xCE, 0x24, 0x9B, 0x3E, 0xF9, \
+     0x7D, 0x2F, 0xE3, 0x63, 0x63, 0x0C, 0x75, 0xD8, \
+     0xF6, 0x81, 0xB2, 0x02, 0xAE, 0xC4, 0x61, 0x7A, \
+     0xD3, 0xDF, 0x1E, 0xD5, 0xD5, 0xFD, 0x65, 0x61, \
+     0x24, 0x33, 0xF5, 0x1F, 0x5F, 0x06, 0x6E, 0xD0, \
+     0x85, 0x63, 0x65, 0x55, 0x3D, 0xED, 0x1A, 0xF3, \
+     0xB5, 0x57, 0x13, 0x5E, 0x7F, 0x57, 0xC9, 0x35, \
+     0x98, 0x4F, 0x0C, 0x70, 0xE0, 0xE6, 0x8B, 0x77, \
+     0xE2, 0xA6, 0x89, 0xDA, 0xF3, 0xEF, 0xE8, 0x72, \
+     0x1D, 0xF1, 0x58, 0xA1, 0x36, 0xAD, 0xE7, 0x35, \
+     0x30, 0xAC, 0xCA, 0x4F, 0x48, 0x3A, 0x79, 0x7A, \
+     0xBC, 0x0A, 0xB1, 0x82, 0xB3, 0x24, 0xFB, 0x61, \
+     0xD1, 0x08, 0xA9, 0x4B, 0xB2, 0xC8, 0xE3, 0xFB, \
+     0xB9, 0x6A, 0xDA, 0xB7, 0x60, 0xD7, 0xF4, 0x68, \
+     0x1D, 0x4F, 0x42, 0xA3, 0xDE, 0x39, 0x4D, 0xF4, \
+     0xAE, 0x56, 0xED, 0xE7, 0x63, 0x72, 0xBB, 0x19, \
+     0x0B, 0x07, 0xA7, 0xC8, 0xEE, 0x0A, 0x6D, 0x70, \
+     0x9E, 0x02, 0xFC, 0xE1, 0xCD, 0xF7, 0xE2, 0xEC, \
+     0xC0, 0x34, 0x04, 0xCD, 0x28, 0x34, 0x2F, 0x61, \
+     0x91, 0x72, 0xFE, 0x9C, 0xE9, 0x85, 0x83, 0xFF, \
+     0x8E, 0x4F, 0x12, 0x32, 0xEE, 0xF2, 0x81, 0x83, \
+     0xC3, 0xFE, 0x3B, 0x1B, 0x4C, 0x6F, 0xAD, 0x73, \
+     0x3B, 0xB5, 0xFC, 0xBC, 0x2E, 0xC2, 0x20, 0x05, \
+     0xC5, 0x8E, 0xF1, 0x83, 0x7D, 0x16, 0x83, 0xB2, \
+     0xC6, 0xF3, 0x4A, 0x26, 0xC1, 0xB2, 0xEF, 0xFA, \
+     0x88, 0x6B, 0x42, 0x38, 0x61, 0x1F, 0xCF, 0xDC, \
+     0xDE, 0x35, 0x5B, 0x3B, 0x65, 0x19, 0x03, 0x5B, \
+     0xBC, 0x34, 0xF4, 0xDE, 0xF9, 0x9C, 0x02, 0x38, \
+     0x61, 0xB4, 0x6F, 0xC9, 0xD6, 0xE6, 0xC9, 0x07, \
+     0x7A, 0xD9, 0x1D, 0x26, 0x91, 0xF7, 0xF7, 0xEE, \
+     0x59, 0x8C, 0xB0, 0xFA, 0xC1, 0x86, 0xD9, 0x1C, \
+     0xAE, 0xFE, 0x13, 0x09, 0x85, 0x13, 0x92, 0x70, \
+     0xB4, 0x13, 0x0C, 0x93, 0xBC, 0x43, 0x79, 0x44, \
+     0xF4, 0xFD, 0x44, 0x52, 0xE2, 0xD7, 0x4D, 0xD3, \
+     0x64, 0xF2, 0xE2, 0x1E, 0x71, 0xF5, 0x4B, 0xFF, \
+     0x5C, 0xAE, 0x82, 0xAB, 0x9C, 0x9D, 0xF6, 0x9E, \
+     0xE8, 0x6D, 0x2B, 0xC5, 0x22, 0x36, 0x3A, 0x0D, \
+     0xAB, 0xC5, 0x21, 0x97, 0x9B, 0x0D, 0xEA, 0xDA, \
+     0x1D, 0xBF, 0x9A, 0x42, 0xD5, 0xC4, 0x48, 0x4E, \
+     0x0A, 0xBC, 0xD0, 0x6B, 0xFA, 0x53, 0xDD, 0xEF, \
+     0x3C, 0x1B, 0x20, 0xEE, 0x3F, 0xD5, 0x9D, 0x7C, \
+     0x25, 0xE4, 0x1D, 0x2B, 0x66, 0xC6, 0x2E, 0x37, \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE3072_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE4096_P_BIN {        \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+     0xAD, 0xF8, 0x54, 0x58, 0xA2, 0xBB, 0x4A, 0x9A, \
+     0xAF, 0xDC, 0x56, 0x20, 0x27, 0x3D, 0x3C, 0xF1, \
+     0xD8, 0xB9, 0xC5, 0x83, 0xCE, 0x2D, 0x36, 0x95, \
+     0xA9, 0xE1, 0x36, 0x41, 0x14, 0x64, 0x33, 0xFB, \
+     0xCC, 0x93, 0x9D, 0xCE, 0x24, 0x9B, 0x3E, 0xF9, \
+     0x7D, 0x2F, 0xE3, 0x63, 0x63, 0x0C, 0x75, 0xD8, \
+     0xF6, 0x81, 0xB2, 0x02, 0xAE, 0xC4, 0x61, 0x7A, \
+     0xD3, 0xDF, 0x1E, 0xD5, 0xD5, 0xFD, 0x65, 0x61, \
+     0x24, 0x33, 0xF5, 0x1F, 0x5F, 0x06, 0x6E, 0xD0, \
+     0x85, 0x63, 0x65, 0x55, 0x3D, 0xED, 0x1A, 0xF3, \
+     0xB5, 0x57, 0x13, 0x5E, 0x7F, 0x57, 0xC9, 0x35, \
+     0x98, 0x4F, 0x0C, 0x70, 0xE0, 0xE6, 0x8B, 0x77, \
+     0xE2, 0xA6, 0x89, 0xDA, 0xF3, 0xEF, 0xE8, 0x72, \
+     0x1D, 0xF1, 0x58, 0xA1, 0x36, 0xAD, 0xE7, 0x35, \
+     0x30, 0xAC, 0xCA, 0x4F, 0x48, 0x3A, 0x79, 0x7A, \
+     0xBC, 0x0A, 0xB1, 0x82, 0xB3, 0x24, 0xFB, 0x61, \
+     0xD1, 0x08, 0xA9, 0x4B, 0xB2, 0xC8, 0xE3, 0xFB, \
+     0xB9, 0x6A, 0xDA, 0xB7, 0x60, 0xD7, 0xF4, 0x68, \
+     0x1D, 0x4F, 0x42, 0xA3, 0xDE, 0x39, 0x4D, 0xF4, \
+     0xAE, 0x56, 0xED, 0xE7, 0x63, 0x72, 0xBB, 0x19, \
+     0x0B, 0x07, 0xA7, 0xC8, 0xEE, 0x0A, 0x6D, 0x70, \
+     0x9E, 0x02, 0xFC, 0xE1, 0xCD, 0xF7, 0xE2, 0xEC, \
+     0xC0, 0x34, 0x04, 0xCD, 0x28, 0x34, 0x2F, 0x61, \
+     0x91, 0x72, 0xFE, 0x9C, 0xE9, 0x85, 0x83, 0xFF, \
+     0x8E, 0x4F, 0x12, 0x32, 0xEE, 0xF2, 0x81, 0x83, \
+     0xC3, 0xFE, 0x3B, 0x1B, 0x4C, 0x6F, 0xAD, 0x73, \
+     0x3B, 0xB5, 0xFC, 0xBC, 0x2E, 0xC2, 0x20, 0x05, \
+     0xC5, 0x8E, 0xF1, 0x83, 0x7D, 0x16, 0x83, 0xB2, \
+     0xC6, 0xF3, 0x4A, 0x26, 0xC1, 0xB2, 0xEF, 0xFA, \
+     0x88, 0x6B, 0x42, 0x38, 0x61, 0x1F, 0xCF, 0xDC, \
+     0xDE, 0x35, 0x5B, 0x3B, 0x65, 0x19, 0x03, 0x5B, \
+     0xBC, 0x34, 0xF4, 0xDE, 0xF9, 0x9C, 0x02, 0x38, \
+     0x61, 0xB4, 0x6F, 0xC9, 0xD6, 0xE6, 0xC9, 0x07, \
+     0x7A, 0xD9, 0x1D, 0x26, 0x91, 0xF7, 0xF7, 0xEE, \
+     0x59, 0x8C, 0xB0, 0xFA, 0xC1, 0x86, 0xD9, 0x1C, \
+     0xAE, 0xFE, 0x13, 0x09, 0x85, 0x13, 0x92, 0x70, \
+     0xB4, 0x13, 0x0C, 0x93, 0xBC, 0x43, 0x79, 0x44, \
+     0xF4, 0xFD, 0x44, 0x52, 0xE2, 0xD7, 0x4D, 0xD3, \
+     0x64, 0xF2, 0xE2, 0x1E, 0x71, 0xF5, 0x4B, 0xFF, \
+     0x5C, 0xAE, 0x82, 0xAB, 0x9C, 0x9D, 0xF6, 0x9E, \
+     0xE8, 0x6D, 0x2B, 0xC5, 0x22, 0x36, 0x3A, 0x0D, \
+     0xAB, 0xC5, 0x21, 0x97, 0x9B, 0x0D, 0xEA, 0xDA, \
+     0x1D, 0xBF, 0x9A, 0x42, 0xD5, 0xC4, 0x48, 0x4E, \
+     0x0A, 0xBC, 0xD0, 0x6B, 0xFA, 0x53, 0xDD, 0xEF, \
+     0x3C, 0x1B, 0x20, 0xEE, 0x3F, 0xD5, 0x9D, 0x7C, \
+     0x25, 0xE4, 0x1D, 0x2B, 0x66, 0x9E, 0x1E, 0xF1, \
+     0x6E, 0x6F, 0x52, 0xC3, 0x16, 0x4D, 0xF4, 0xFB, \
+     0x79, 0x30, 0xE9, 0xE4, 0xE5, 0x88, 0x57, 0xB6, \
+     0xAC, 0x7D, 0x5F, 0x42, 0xD6, 0x9F, 0x6D, 0x18, \
+     0x77, 0x63, 0xCF, 0x1D, 0x55, 0x03, 0x40, 0x04, \
+     0x87, 0xF5, 0x5B, 0xA5, 0x7E, 0x31, 0xCC, 0x7A, \
+     0x71, 0x35, 0xC8, 0x86, 0xEF, 0xB4, 0x31, 0x8A, \
+     0xED, 0x6A, 0x1E, 0x01, 0x2D, 0x9E, 0x68, 0x32, \
+     0xA9, 0x07, 0x60, 0x0A, 0x91, 0x81, 0x30, 0xC4, \
+     0x6D, 0xC7, 0x78, 0xF9, 0x71, 0xAD, 0x00, 0x38, \
+     0x09, 0x29, 0x99, 0xA3, 0x33, 0xCB, 0x8B, 0x7A, \
+     0x1A, 0x1D, 0xB9, 0x3D, 0x71, 0x40, 0x00, 0x3C, \
+     0x2A, 0x4E, 0xCE, 0xA9, 0xF9, 0x8D, 0x0A, 0xCC, \
+     0x0A, 0x82, 0x91, 0xCD, 0xCE, 0xC9, 0x7D, 0xCF, \
+     0x8E, 0xC9, 0xB5, 0x5A, 0x7F, 0x88, 0xA4, 0x6B, \
+     0x4D, 0xB5, 0xA8, 0x51, 0xF4, 0x41, 0x82, 0xE1, \
+     0xC6, 0x8A, 0x00, 0x7E, 0x5E, 0x65, 0x5F, 0x6A, \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE4096_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE6144_P_BIN {        \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+     0xAD, 0xF8, 0x54, 0x58, 0xA2, 0xBB, 0x4A, 0x9A, \
+     0xAF, 0xDC, 0x56, 0x20, 0x27, 0x3D, 0x3C, 0xF1, \
+     0xD8, 0xB9, 0xC5, 0x83, 0xCE, 0x2D, 0x36, 0x95, \
+     0xA9, 0xE1, 0x36, 0x41, 0x14, 0x64, 0x33, 0xFB, \
+     0xCC, 0x93, 0x9D, 0xCE, 0x24, 0x9B, 0x3E, 0xF9, \
+     0x7D, 0x2F, 0xE3, 0x63, 0x63, 0x0C, 0x75, 0xD8, \
+     0xF6, 0x81, 0xB2, 0x02, 0xAE, 0xC4, 0x61, 0x7A, \
+     0xD3, 0xDF, 0x1E, 0xD5, 0xD5, 0xFD, 0x65, 0x61, \
+     0x24, 0x33, 0xF5, 0x1F, 0x5F, 0x06, 0x6E, 0xD0, \
+     0x85, 0x63, 0x65, 0x55, 0x3D, 0xED, 0x1A, 0xF3, \
+     0xB5, 0x57, 0x13, 0x5E, 0x7F, 0x57, 0xC9, 0x35, \
+     0x98, 0x4F, 0x0C, 0x70, 0xE0, 0xE6, 0x8B, 0x77, \
+     0xE2, 0xA6, 0x89, 0xDA, 0xF3, 0xEF, 0xE8, 0x72, \
+     0x1D, 0xF1, 0x58, 0xA1, 0x36, 0xAD, 0xE7, 0x35, \
+     0x30, 0xAC, 0xCA, 0x4F, 0x48, 0x3A, 0x79, 0x7A, \
+     0xBC, 0x0A, 0xB1, 0x82, 0xB3, 0x24, 0xFB, 0x61, \
+     0xD1, 0x08, 0xA9, 0x4B, 0xB2, 0xC8, 0xE3, 0xFB, \
+     0xB9, 0x6A, 0xDA, 0xB7, 0x60, 0xD7, 0xF4, 0x68, \
+     0x1D, 0x4F, 0x42, 0xA3, 0xDE, 0x39, 0x4D, 0xF4, \
+     0xAE, 0x56, 0xED, 0xE7, 0x63, 0x72, 0xBB, 0x19, \
+     0x0B, 0x07, 0xA7, 0xC8, 0xEE, 0x0A, 0x6D, 0x70, \
+     0x9E, 0x02, 0xFC, 0xE1, 0xCD, 0xF7, 0xE2, 0xEC, \
+     0xC0, 0x34, 0x04, 0xCD, 0x28, 0x34, 0x2F, 0x61, \
+     0x91, 0x72, 0xFE, 0x9C, 0xE9, 0x85, 0x83, 0xFF, \
+     0x8E, 0x4F, 0x12, 0x32, 0xEE, 0xF2, 0x81, 0x83, \
+     0xC3, 0xFE, 0x3B, 0x1B, 0x4C, 0x6F, 0xAD, 0x73, \
+     0x3B, 0xB5, 0xFC, 0xBC, 0x2E, 0xC2, 0x20, 0x05, \
+     0xC5, 0x8E, 0xF1, 0x83, 0x7D, 0x16, 0x83, 0xB2, \
+     0xC6, 0xF3, 0x4A, 0x26, 0xC1, 0xB2, 0xEF, 0xFA, \
+     0x88, 0x6B, 0x42, 0x38, 0x61, 0x1F, 0xCF, 0xDC, \
+     0xDE, 0x35, 0x5B, 0x3B, 0x65, 0x19, 0x03, 0x5B, \
+     0xBC, 0x34, 0xF4, 0xDE, 0xF9, 0x9C, 0x02, 0x38, \
+     0x61, 0xB4, 0x6F, 0xC9, 0xD6, 0xE6, 0xC9, 0x07, \
+     0x7A, 0xD9, 0x1D, 0x26, 0x91, 0xF7, 0xF7, 0xEE, \
+     0x59, 0x8C, 0xB0, 0xFA, 0xC1, 0x86, 0xD9, 0x1C, \
+     0xAE, 0xFE, 0x13, 0x09, 0x85, 0x13, 0x92, 0x70, \
+     0xB4, 0x13, 0x0C, 0x93, 0xBC, 0x43, 0x79, 0x44, \
+     0xF4, 0xFD, 0x44, 0x52, 0xE2, 0xD7, 0x4D, 0xD3, \
+     0x64, 0xF2, 0xE2, 0x1E, 0x71, 0xF5, 0x4B, 0xFF, \
+     0x5C, 0xAE, 0x82, 0xAB, 0x9C, 0x9D, 0xF6, 0x9E, \
+     0xE8, 0x6D, 0x2B, 0xC5, 0x22, 0x36, 0x3A, 0x0D, \
+     0xAB, 0xC5, 0x21, 0x97, 0x9B, 0x0D, 0xEA, 0xDA, \
+     0x1D, 0xBF, 0x9A, 0x42, 0xD5, 0xC4, 0x48, 0x4E, \
+     0x0A, 0xBC, 0xD0, 0x6B, 0xFA, 0x53, 0xDD, 0xEF, \
+     0x3C, 0x1B, 0x20, 0xEE, 0x3F, 0xD5, 0x9D, 0x7C, \
+     0x25, 0xE4, 0x1D, 0x2B, 0x66, 0x9E, 0x1E, 0xF1, \
+     0x6E, 0x6F, 0x52, 0xC3, 0x16, 0x4D, 0xF4, 0xFB, \
+     0x79, 0x30, 0xE9, 0xE4, 0xE5, 0x88, 0x57, 0xB6, \
+     0xAC, 0x7D, 0x5F, 0x42, 0xD6, 0x9F, 0x6D, 0x18, \
+     0x77, 0x63, 0xCF, 0x1D, 0x55, 0x03, 0x40, 0x04, \
+     0x87, 0xF5, 0x5B, 0xA5, 0x7E, 0x31, 0xCC, 0x7A, \
+     0x71, 0x35, 0xC8, 0x86, 0xEF, 0xB4, 0x31, 0x8A, \
+     0xED, 0x6A, 0x1E, 0x01, 0x2D, 0x9E, 0x68, 0x32, \
+     0xA9, 0x07, 0x60, 0x0A, 0x91, 0x81, 0x30, 0xC4, \
+     0x6D, 0xC7, 0x78, 0xF9, 0x71, 0xAD, 0x00, 0x38, \
+     0x09, 0x29, 0x99, 0xA3, 0x33, 0xCB, 0x8B, 0x7A, \
+     0x1A, 0x1D, 0xB9, 0x3D, 0x71, 0x40, 0x00, 0x3C, \
+     0x2A, 0x4E, 0xCE, 0xA9, 0xF9, 0x8D, 0x0A, 0xCC, \
+     0x0A, 0x82, 0x91, 0xCD, 0xCE, 0xC9, 0x7D, 0xCF, \
+     0x8E, 0xC9, 0xB5, 0x5A, 0x7F, 0x88, 0xA4, 0x6B, \
+     0x4D, 0xB5, 0xA8, 0x51, 0xF4, 0x41, 0x82, 0xE1, \
+     0xC6, 0x8A, 0x00, 0x7E, 0x5E, 0x0D, 0xD9, 0x02, \
+     0x0B, 0xFD, 0x64, 0xB6, 0x45, 0x03, 0x6C, 0x7A, \
+     0x4E, 0x67, 0x7D, 0x2C, 0x38, 0x53, 0x2A, 0x3A, \
+     0x23, 0xBA, 0x44, 0x42, 0xCA, 0xF5, 0x3E, 0xA6, \
+     0x3B, 0xB4, 0x54, 0x32, 0x9B, 0x76, 0x24, 0xC8, \
+     0x91, 0x7B, 0xDD, 0x64, 0xB1, 0xC0, 0xFD, 0x4C, \
+     0xB3, 0x8E, 0x8C, 0x33, 0x4C, 0x70, 0x1C, 0x3A, \
+     0xCD, 0xAD, 0x06, 0x57, 0xFC, 0xCF, 0xEC, 0x71, \
+     0x9B, 0x1F, 0x5C, 0x3E, 0x4E, 0x46, 0x04, 0x1F, \
+     0x38, 0x81, 0x47, 0xFB, 0x4C, 0xFD, 0xB4, 0x77, \
+     0xA5, 0x24, 0x71, 0xF7, 0xA9, 0xA9, 0x69, 0x10, \
+     0xB8, 0x55, 0x32, 0x2E, 0xDB, 0x63, 0x40, 0xD8, \
+     0xA0, 0x0E, 0xF0, 0x92, 0x35, 0x05, 0x11, 0xE3, \
+     0x0A, 0xBE, 0xC1, 0xFF, 0xF9, 0xE3, 0xA2, 0x6E, \
+     0x7F, 0xB2, 0x9F, 0x8C, 0x18, 0x30, 0x23, 0xC3, \
+     0x58, 0x7E, 0x38, 0xDA, 0x00, 0x77, 0xD9, 0xB4, \
+     0x76, 0x3E, 0x4E, 0x4B, 0x94, 0xB2, 0xBB, 0xC1, \
+     0x94, 0xC6, 0x65, 0x1E, 0x77, 0xCA, 0xF9, 0x92, \
+     0xEE, 0xAA, 0xC0, 0x23, 0x2A, 0x28, 0x1B, 0xF6, \
+     0xB3, 0xA7, 0x39, 0xC1, 0x22, 0x61, 0x16, 0x82, \
+     0x0A, 0xE8, 0xDB, 0x58, 0x47, 0xA6, 0x7C, 0xBE, \
+     0xF9, 0xC9, 0x09, 0x1B, 0x46, 0x2D, 0x53, 0x8C, \
+     0xD7, 0x2B, 0x03, 0x74, 0x6A, 0xE7, 0x7F, 0x5E, \
+     0x62, 0x29, 0x2C, 0x31, 0x15, 0x62, 0xA8, 0x46, \
+     0x50, 0x5D, 0xC8, 0x2D, 0xB8, 0x54, 0x33, 0x8A, \
+     0xE4, 0x9F, 0x52, 0x35, 0xC9, 0x5B, 0x91, 0x17, \
+     0x8C, 0xCF, 0x2D, 0xD5, 0xCA, 0xCE, 0xF4, 0x03, \
+     0xEC, 0x9D, 0x18, 0x10, 0xC6, 0x27, 0x2B, 0x04, \
+     0x5B, 0x3B, 0x71, 0xF9, 0xDC, 0x6B, 0x80, 0xD6, \
+     0x3F, 0xDD, 0x4A, 0x8E, 0x9A, 0xDB, 0x1E, 0x69, \
+     0x62, 0xA6, 0x95, 0x26, 0xD4, 0x31, 0x61, 0xC1, \
+     0xA4, 0x1D, 0x57, 0x0D, 0x79, 0x38, 0xDA, 0xD4, \
+     0xA4, 0x0E, 0x32, 0x9C, 0xD0, 0xE4, 0x0E, 0x65, \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE6144_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE8192_P_BIN {        \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+     0xAD, 0xF8, 0x54, 0x58, 0xA2, 0xBB, 0x4A, 0x9A, \
+     0xAF, 0xDC, 0x56, 0x20, 0x27, 0x3D, 0x3C, 0xF1, \
+     0xD8, 0xB9, 0xC5, 0x83, 0xCE, 0x2D, 0x36, 0x95, \
+     0xA9, 0xE1, 0x36, 0x41, 0x14, 0x64, 0x33, 0xFB, \
+     0xCC, 0x93, 0x9D, 0xCE, 0x24, 0x9B, 0x3E, 0xF9, \
+     0x7D, 0x2F, 0xE3, 0x63, 0x63, 0x0C, 0x75, 0xD8, \
+     0xF6, 0x81, 0xB2, 0x02, 0xAE, 0xC4, 0x61, 0x7A, \
+     0xD3, 0xDF, 0x1E, 0xD5, 0xD5, 0xFD, 0x65, 0x61, \
+     0x24, 0x33, 0xF5, 0x1F, 0x5F, 0x06, 0x6E, 0xD0, \
+     0x85, 0x63, 0x65, 0x55, 0x3D, 0xED, 0x1A, 0xF3, \
+     0xB5, 0x57, 0x13, 0x5E, 0x7F, 0x57, 0xC9, 0x35, \
+     0x98, 0x4F, 0x0C, 0x70, 0xE0, 0xE6, 0x8B, 0x77, \
+     0xE2, 0xA6, 0x89, 0xDA, 0xF3, 0xEF, 0xE8, 0x72, \
+     0x1D, 0xF1, 0x58, 0xA1, 0x36, 0xAD, 0xE7, 0x35, \
+     0x30, 0xAC, 0xCA, 0x4F, 0x48, 0x3A, 0x79, 0x7A, \
+     0xBC, 0x0A, 0xB1, 0x82, 0xB3, 0x24, 0xFB, 0x61, \
+     0xD1, 0x08, 0xA9, 0x4B, 0xB2, 0xC8, 0xE3, 0xFB, \
+     0xB9, 0x6A, 0xDA, 0xB7, 0x60, 0xD7, 0xF4, 0x68, \
+     0x1D, 0x4F, 0x42, 0xA3, 0xDE, 0x39, 0x4D, 0xF4, \
+     0xAE, 0x56, 0xED, 0xE7, 0x63, 0x72, 0xBB, 0x19, \
+     0x0B, 0x07, 0xA7, 0xC8, 0xEE, 0x0A, 0x6D, 0x70, \
+     0x9E, 0x02, 0xFC, 0xE1, 0xCD, 0xF7, 0xE2, 0xEC, \
+     0xC0, 0x34, 0x04, 0xCD, 0x28, 0x34, 0x2F, 0x61, \
+     0x91, 0x72, 0xFE, 0x9C, 0xE9, 0x85, 0x83, 0xFF, \
+     0x8E, 0x4F, 0x12, 0x32, 0xEE, 0xF2, 0x81, 0x83, \
+     0xC3, 0xFE, 0x3B, 0x1B, 0x4C, 0x6F, 0xAD, 0x73, \
+     0x3B, 0xB5, 0xFC, 0xBC, 0x2E, 0xC2, 0x20, 0x05, \
+     0xC5, 0x8E, 0xF1, 0x83, 0x7D, 0x16, 0x83, 0xB2, \
+     0xC6, 0xF3, 0x4A, 0x26, 0xC1, 0xB2, 0xEF, 0xFA, \
+     0x88, 0x6B, 0x42, 0x38, 0x61, 0x1F, 0xCF, 0xDC, \
+     0xDE, 0x35, 0x5B, 0x3B, 0x65, 0x19, 0x03, 0x5B, \
+     0xBC, 0x34, 0xF4, 0xDE, 0xF9, 0x9C, 0x02, 0x38, \
+     0x61, 0xB4, 0x6F, 0xC9, 0xD6, 0xE6, 0xC9, 0x07, \
+     0x7A, 0xD9, 0x1D, 0x26, 0x91, 0xF7, 0xF7, 0xEE, \
+     0x59, 0x8C, 0xB0, 0xFA, 0xC1, 0x86, 0xD9, 0x1C, \
+     0xAE, 0xFE, 0x13, 0x09, 0x85, 0x13, 0x92, 0x70, \
+     0xB4, 0x13, 0x0C, 0x93, 0xBC, 0x43, 0x79, 0x44, \
+     0xF4, 0xFD, 0x44, 0x52, 0xE2, 0xD7, 0x4D, 0xD3, \
+     0x64, 0xF2, 0xE2, 0x1E, 0x71, 0xF5, 0x4B, 0xFF, \
+     0x5C, 0xAE, 0x82, 0xAB, 0x9C, 0x9D, 0xF6, 0x9E, \
+     0xE8, 0x6D, 0x2B, 0xC5, 0x22, 0x36, 0x3A, 0x0D, \
+     0xAB, 0xC5, 0x21, 0x97, 0x9B, 0x0D, 0xEA, 0xDA, \
+     0x1D, 0xBF, 0x9A, 0x42, 0xD5, 0xC4, 0x48, 0x4E, \
+     0x0A, 0xBC, 0xD0, 0x6B, 0xFA, 0x53, 0xDD, 0xEF, \
+     0x3C, 0x1B, 0x20, 0xEE, 0x3F, 0xD5, 0x9D, 0x7C, \
+     0x25, 0xE4, 0x1D, 0x2B, 0x66, 0x9E, 0x1E, 0xF1, \
+     0x6E, 0x6F, 0x52, 0xC3, 0x16, 0x4D, 0xF4, 0xFB, \
+     0x79, 0x30, 0xE9, 0xE4, 0xE5, 0x88, 0x57, 0xB6, \
+     0xAC, 0x7D, 0x5F, 0x42, 0xD6, 0x9F, 0x6D, 0x18, \
+     0x77, 0x63, 0xCF, 0x1D, 0x55, 0x03, 0x40, 0x04, \
+     0x87, 0xF5, 0x5B, 0xA5, 0x7E, 0x31, 0xCC, 0x7A, \
+     0x71, 0x35, 0xC8, 0x86, 0xEF, 0xB4, 0x31, 0x8A, \
+     0xED, 0x6A, 0x1E, 0x01, 0x2D, 0x9E, 0x68, 0x32, \
+     0xA9, 0x07, 0x60, 0x0A, 0x91, 0x81, 0x30, 0xC4, \
+     0x6D, 0xC7, 0x78, 0xF9, 0x71, 0xAD, 0x00, 0x38, \
+     0x09, 0x29, 0x99, 0xA3, 0x33, 0xCB, 0x8B, 0x7A, \
+     0x1A, 0x1D, 0xB9, 0x3D, 0x71, 0x40, 0x00, 0x3C, \
+     0x2A, 0x4E, 0xCE, 0xA9, 0xF9, 0x8D, 0x0A, 0xCC, \
+     0x0A, 0x82, 0x91, 0xCD, 0xCE, 0xC9, 0x7D, 0xCF, \
+     0x8E, 0xC9, 0xB5, 0x5A, 0x7F, 0x88, 0xA4, 0x6B, \
+     0x4D, 0xB5, 0xA8, 0x51, 0xF4, 0x41, 0x82, 0xE1, \
+     0xC6, 0x8A, 0x00, 0x7E, 0x5E, 0x0D, 0xD9, 0x02, \
+     0x0B, 0xFD, 0x64, 0xB6, 0x45, 0x03, 0x6C, 0x7A, \
+     0x4E, 0x67, 0x7D, 0x2C, 0x38, 0x53, 0x2A, 0x3A, \
+     0x23, 0xBA, 0x44, 0x42, 0xCA, 0xF5, 0x3E, 0xA6, \
+     0x3B, 0xB4, 0x54, 0x32, 0x9B, 0x76, 0x24, 0xC8, \
+     0x91, 0x7B, 0xDD, 0x64, 0xB1, 0xC0, 0xFD, 0x4C, \
+     0xB3, 0x8E, 0x8C, 0x33, 0x4C, 0x70, 0x1C, 0x3A, \
+     0xCD, 0xAD, 0x06, 0x57, 0xFC, 0xCF, 0xEC, 0x71, \
+     0x9B, 0x1F, 0x5C, 0x3E, 0x4E, 0x46, 0x04, 0x1F, \
+     0x38, 0x81, 0x47, 0xFB, 0x4C, 0xFD, 0xB4, 0x77, \
+     0xA5, 0x24, 0x71, 0xF7, 0xA9, 0xA9, 0x69, 0x10, \
+     0xB8, 0x55, 0x32, 0x2E, 0xDB, 0x63, 0x40, 0xD8, \
+     0xA0, 0x0E, 0xF0, 0x92, 0x35, 0x05, 0x11, 0xE3, \
+     0x0A, 0xBE, 0xC1, 0xFF, 0xF9, 0xE3, 0xA2, 0x6E, \
+     0x7F, 0xB2, 0x9F, 0x8C, 0x18, 0x30, 0x23, 0xC3, \
+     0x58, 0x7E, 0x38, 0xDA, 0x00, 0x77, 0xD9, 0xB4, \
+     0x76, 0x3E, 0x4E, 0x4B, 0x94, 0xB2, 0xBB, 0xC1, \
+     0x94, 0xC6, 0x65, 0x1E, 0x77, 0xCA, 0xF9, 0x92, \
+     0xEE, 0xAA, 0xC0, 0x23, 0x2A, 0x28, 0x1B, 0xF6, \
+     0xB3, 0xA7, 0x39, 0xC1, 0x22, 0x61, 0x16, 0x82, \
+     0x0A, 0xE8, 0xDB, 0x58, 0x47, 0xA6, 0x7C, 0xBE, \
+     0xF9, 0xC9, 0x09, 0x1B, 0x46, 0x2D, 0x53, 0x8C, \
+     0xD7, 0x2B, 0x03, 0x74, 0x6A, 0xE7, 0x7F, 0x5E, \
+     0x62, 0x29, 0x2C, 0x31, 0x15, 0x62, 0xA8, 0x46, \
+     0x50, 0x5D, 0xC8, 0x2D, 0xB8, 0x54, 0x33, 0x8A, \
+     0xE4, 0x9F, 0x52, 0x35, 0xC9, 0x5B, 0x91, 0x17, \
+     0x8C, 0xCF, 0x2D, 0xD5, 0xCA, 0xCE, 0xF4, 0x03, \
+     0xEC, 0x9D, 0x18, 0x10, 0xC6, 0x27, 0x2B, 0x04, \
+     0x5B, 0x3B, 0x71, 0xF9, 0xDC, 0x6B, 0x80, 0xD6, \
+     0x3F, 0xDD, 0x4A, 0x8E, 0x9A, 0xDB, 0x1E, 0x69, \
+     0x62, 0xA6, 0x95, 0x26, 0xD4, 0x31, 0x61, 0xC1, \
+     0xA4, 0x1D, 0x57, 0x0D, 0x79, 0x38, 0xDA, 0xD4, \
+     0xA4, 0x0E, 0x32, 0x9C, 0xCF, 0xF4, 0x6A, 0xAA, \
+     0x36, 0xAD, 0x00, 0x4C, 0xF6, 0x00, 0xC8, 0x38, \
+     0x1E, 0x42, 0x5A, 0x31, 0xD9, 0x51, 0xAE, 0x64, \
+     0xFD, 0xB2, 0x3F, 0xCE, 0xC9, 0x50, 0x9D, 0x43, \
+     0x68, 0x7F, 0xEB, 0x69, 0xED, 0xD1, 0xCC, 0x5E, \
+     0x0B, 0x8C, 0xC3, 0xBD, 0xF6, 0x4B, 0x10, 0xEF, \
+     0x86, 0xB6, 0x31, 0x42, 0xA3, 0xAB, 0x88, 0x29, \
+     0x55, 0x5B, 0x2F, 0x74, 0x7C, 0x93, 0x26, 0x65, \
+     0xCB, 0x2C, 0x0F, 0x1C, 0xC0, 0x1B, 0xD7, 0x02, \
+     0x29, 0x38, 0x88, 0x39, 0xD2, 0xAF, 0x05, 0xE4, \
+     0x54, 0x50, 0x4A, 0xC7, 0x8B, 0x75, 0x82, 0x82, \
+     0x28, 0x46, 0xC0, 0xBA, 0x35, 0xC3, 0x5F, 0x5C, \
+     0x59, 0x16, 0x0C, 0xC0, 0x46, 0xFD, 0x82, 0x51, \
+     0x54, 0x1F, 0xC6, 0x8C, 0x9C, 0x86, 0xB0, 0x22, \
+     0xBB, 0x70, 0x99, 0x87, 0x6A, 0x46, 0x0E, 0x74, \
+     0x51, 0xA8, 0xA9, 0x31, 0x09, 0x70, 0x3F, 0xEE, \
+     0x1C, 0x21, 0x7E, 0x6C, 0x38, 0x26, 0xE5, 0x2C, \
+     0x51, 0xAA, 0x69, 0x1E, 0x0E, 0x42, 0x3C, 0xFC, \
+     0x99, 0xE9, 0xE3, 0x16, 0x50, 0xC1, 0x21, 0x7B, \
+     0x62, 0x48, 0x16, 0xCD, 0xAD, 0x9A, 0x95, 0xF9, \
+     0xD5, 0xB8, 0x01, 0x94, 0x88, 0xD9, 0xC0, 0xA0, \
+     0xA1, 0xFE, 0x30, 0x75, 0xA5, 0x77, 0xE2, 0x31, \
+     0x83, 0xF8, 0x1D, 0x4A, 0x3F, 0x2F, 0xA4, 0x57, \
+     0x1E, 0xFC, 0x8C, 0xE0, 0xBA, 0x8A, 0x4F, 0xE8, \
+     0xB6, 0x85, 0x5D, 0xFE, 0x72, 0xB0, 0xA6, 0x6E, \
+     0xDE, 0xD2, 0xFB, 0xAB, 0xFB, 0xE5, 0x8A, 0x30, \
+     0xFA, 0xFA, 0xBE, 0x1C, 0x5D, 0x71, 0xA8, 0x7E, \
+     0x2F, 0x74, 0x1E, 0xF8, 0xC1, 0xFE, 0x86, 0xFE, \
+     0xA6, 0xBB, 0xFD, 0xE5, 0x30, 0x67, 0x7F, 0x0D, \
+     0x97, 0xD1, 0x1D, 0x49, 0xF7, 0xA8, 0x44, 0x3D, \
+     0x08, 0x22, 0xE5, 0x06, 0xA9, 0xF4, 0x61, 0x4E, \
+     0x01, 0x1E, 0x2A, 0x94, 0x83, 0x8F, 0xF8, 0x8C, \
+     0xD6, 0x8C, 0x8B, 0xB7, 0xC5, 0xC6, 0x42, 0x4C, \
+     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE8192_G_BIN { 0x02 }
+
+#endif /* dhm.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecdh.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecdh.h
new file mode 100644
index 00000000000..05855cdf10b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecdh.h
@@ -0,0 +1,446 @@
+/**
+ * \file ecdh.h
+ *
+ * \brief This file contains ECDH definitions and functions.
+ *
+ * The Elliptic Curve Diffie-Hellman (ECDH) protocol is an anonymous
+ * key agreement protocol allowing two parties to establish a shared
+ * secret over an insecure channel. Each party must have an
+ * elliptic-curve public–private key pair.
+ *
+ * For more information, see <em>NIST SP 800-56A Rev. 2: Recommendation for
+ * Pair-Wise Key Establishment Schemes Using Discrete Logarithm
+ * Cryptography</em>.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_ECDH_H
+#define MBEDTLS_ECDH_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/ecp.h"
+
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+#undef MBEDTLS_ECDH_LEGACY_CONTEXT
+#include "everest/everest.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Defines the source of the imported EC key.
+ */
+typedef enum
+{
+    MBEDTLS_ECDH_OURS,   /**< Our key. */
+    MBEDTLS_ECDH_THEIRS, /**< The key of the peer. */
+} mbedtls_ecdh_side;
+
+#if !defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+/**
+ * Defines the ECDH implementation used.
+ *
+ * Later versions of the library may add new variants, therefore users should
+ * not make any assumptions about them.
+ */
+typedef enum
+{
+    MBEDTLS_ECDH_VARIANT_NONE = 0,   /*!< Implementation not defined. */
+    MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0,/*!< The default Mbed TLS implementation */
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+    MBEDTLS_ECDH_VARIANT_EVEREST     /*!< Everest implementation */
+#endif
+} mbedtls_ecdh_variant;
+
+/**
+ * The context used by the default ECDH implementation.
+ *
+ * Later versions might change the structure of this context, therefore users
+ * should not make any assumptions about the structure of
+ * mbedtls_ecdh_context_mbed.
+ */
+typedef struct mbedtls_ecdh_context_mbed
+{
+    mbedtls_ecp_group grp;   /*!< The elliptic curve used. */
+    mbedtls_mpi d;           /*!< The private key. */
+    mbedtls_ecp_point Q;     /*!< The public key. */
+    mbedtls_ecp_point Qp;    /*!< The value of the public key of the peer. */
+    mbedtls_mpi z;           /*!< The shared secret. */
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+    mbedtls_ecp_restart_ctx rs; /*!< The restart context for EC computations. */
+#endif
+} mbedtls_ecdh_context_mbed;
+#endif
+
+/**
+ *
+ * \warning         Performing multiple operations concurrently on the same
+ *                  ECDSA context is not supported; objects of this type
+ *                  should not be shared between multiple threads.
+ * \brief           The ECDH context structure.
+ */
+typedef struct mbedtls_ecdh_context
+{
+#if defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+    mbedtls_ecp_group grp;   /*!< The elliptic curve used. */
+    mbedtls_mpi d;           /*!< The private key. */
+    mbedtls_ecp_point Q;     /*!< The public key. */
+    mbedtls_ecp_point Qp;    /*!< The value of the public key of the peer. */
+    mbedtls_mpi z;           /*!< The shared secret. */
+    int point_format;        /*!< The format of point export in TLS messages. */
+    mbedtls_ecp_point Vi;    /*!< The blinding value. */
+    mbedtls_ecp_point Vf;    /*!< The unblinding value. */
+    mbedtls_mpi _d;          /*!< The previous \p d. */
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+    int restart_enabled;        /*!< The flag for restartable mode. */
+    mbedtls_ecp_restart_ctx rs; /*!< The restart context for EC computations. */
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+#else
+    uint8_t point_format;       /*!< The format of point export in TLS messages
+                                  as defined in RFC 4492. */
+    mbedtls_ecp_group_id grp_id;/*!< The elliptic curve used. */
+    mbedtls_ecdh_variant var;   /*!< The ECDH implementation/structure used. */
+    union
+    {
+        mbedtls_ecdh_context_mbed   mbed_ecdh;
+#if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED)
+        mbedtls_ecdh_context_everest everest_ecdh;
+#endif
+    } ctx;                      /*!< Implementation-specific context. The
+                                  context in use is specified by the \c var
+                                  field. */
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+    uint8_t restart_enabled;    /*!< The flag for restartable mode. Functions of
+                                  an alternative implementation not supporting
+                                  restartable mode must return
+                                  MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED error
+                                  if this flag is set. */
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+#endif /* MBEDTLS_ECDH_LEGACY_CONTEXT */
+}
+mbedtls_ecdh_context;
+
+/**
+ * \brief          Check whether a given group can be used for ECDH.
+ *
+ * \param gid      The ECP group ID to check.
+ *
+ * \return         \c 1 if the group can be used, \c 0 otherwise
+ */
+int mbedtls_ecdh_can_do( mbedtls_ecp_group_id gid );
+
+/**
+ * \brief           This function generates an ECDH keypair on an elliptic
+ *                  curve.
+ *
+ *                  This function performs the first of two core computations
+ *                  implemented during the ECDH key exchange. The second core
+ *                  computation is performed by mbedtls_ecdh_compute_shared().
+ *
+ * \see             ecp.h
+ *
+ * \param grp       The ECP group to use. This must be initialized and have
+ *                  domain parameters loaded, for example through
+ *                  mbedtls_ecp_load() or mbedtls_ecp_tls_read_group().
+ * \param d         The destination MPI (private key).
+ *                  This must be initialized.
+ * \param Q         The destination point (public key).
+ *                  This must be initialized.
+ * \param f_rng     The RNG function to use. This must not be \c NULL.
+ * \param p_rng     The RNG context to be passed to \p f_rng. This may be
+ *                  \c NULL in case \p f_rng doesn't need a context argument.
+ *
+ * \return          \c 0 on success.
+ * \return          Another \c MBEDTLS_ERR_ECP_XXX or
+ *                  \c MBEDTLS_MPI_XXX error code on failure.
+ */
+int mbedtls_ecdh_gen_public( mbedtls_ecp_group *grp, mbedtls_mpi *d, mbedtls_ecp_point *Q,
+                     int (*f_rng)(void *, unsigned char *, size_t),
+                     void *p_rng );
+
+/**
+ * \brief           This function computes the shared secret.
+ *
+ *                  This function performs the second of two core computations
+ *                  implemented during the ECDH key exchange. The first core
+ *                  computation is performed by mbedtls_ecdh_gen_public().
+ *
+ * \see             ecp.h
+ *
+ * \note            If \p f_rng is not NULL, it is used to implement
+ *                  countermeasures against side-channel attacks.
+ *                  For more information, see mbedtls_ecp_mul().
+ *
+ * \param grp       The ECP group to use. This must be initialized and have
+ *                  domain parameters loaded, for example through
+ *                  mbedtls_ecp_load() or mbedtls_ecp_tls_read_group().
+ * \param z         The destination MPI (shared secret).
+ *                  This must be initialized.
+ * \param Q         The public key from another party.
+ *                  This must be initialized.
+ * \param d         Our secret exponent (private key).
+ *                  This must be initialized.
+ * \param f_rng     The RNG function. This may be \c NULL if randomization
+ *                  of intermediate results during the ECP computations is
+ *                  not needed (discouraged). See the documentation of
+ *                  mbedtls_ecp_mul() for more.
+ * \param p_rng     The RNG context to be passed to \p f_rng. This may be
+ *                  \c NULL if \p f_rng is \c NULL or doesn't need a
+ *                  context argument.
+ *
+ * \return          \c 0 on success.
+ * \return          Another \c MBEDTLS_ERR_ECP_XXX or
+ *                  \c MBEDTLS_MPI_XXX error code on failure.
+ */
+int mbedtls_ecdh_compute_shared( mbedtls_ecp_group *grp, mbedtls_mpi *z,
+                         const mbedtls_ecp_point *Q, const mbedtls_mpi *d,
+                         int (*f_rng)(void *, unsigned char *, size_t),
+                         void *p_rng );
+
+/**
+ * \brief           This function initializes an ECDH context.
+ *
+ * \param ctx       The ECDH context to initialize. This must not be \c NULL.
+ */
+void mbedtls_ecdh_init( mbedtls_ecdh_context *ctx );
+
+/**
+ * \brief           This function sets up the ECDH context with the information
+ *                  given.
+ *
+ *                  This function should be called after mbedtls_ecdh_init() but
+ *                  before mbedtls_ecdh_make_params(). There is no need to call
+ *                  this function before mbedtls_ecdh_read_params().
+ *
+ *                  This is the first function used by a TLS server for ECDHE
+ *                  ciphersuites.
+ *
+ * \param ctx       The ECDH context to set up. This must be initialized.
+ * \param grp_id    The group id of the group to set up the context for.
+ *
+ * \return          \c 0 on success.
+ */
+int mbedtls_ecdh_setup( mbedtls_ecdh_context *ctx,
+                        mbedtls_ecp_group_id grp_id );
+
+/**
+ * \brief           This function frees a context.
+ *
+ * \param ctx       The context to free. This may be \c NULL, in which
+ *                  case this function does nothing. If it is not \c NULL,
+ *                  it must point to an initialized ECDH context.
+ */
+void mbedtls_ecdh_free( mbedtls_ecdh_context *ctx );
+
+/**
+ * \brief           This function generates an EC key pair and exports its
+ *                  in the format used in a TLS ServerKeyExchange handshake
+ *                  message.
+ *
+ *                  This is the second function used by a TLS server for ECDHE
+ *                  ciphersuites. (It is called after mbedtls_ecdh_setup().)
+ *
+ * \see             ecp.h
+ *
+ * \param ctx       The ECDH context to use. This must be initialized
+ *                  and bound to a group, for example via mbedtls_ecdh_setup().
+ * \param olen      The address at which to store the number of Bytes written.
+ * \param buf       The destination buffer. This must be a writable buffer of
+ *                  length \p blen Bytes.
+ * \param blen      The length of the destination buffer \p buf in Bytes.
+ * \param f_rng     The RNG function to use. This must not be \c NULL.
+ * \param p_rng     The RNG context to be passed to \p f_rng. This may be
+ *                  \c NULL in case \p f_rng doesn't need a context argument.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return          Another \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ */
+int mbedtls_ecdh_make_params( mbedtls_ecdh_context *ctx, size_t *olen,
+                      unsigned char *buf, size_t blen,
+                      int (*f_rng)(void *, unsigned char *, size_t),
+                      void *p_rng );
+
+/**
+ * \brief           This function parses the ECDHE parameters in a
+ *                  TLS ServerKeyExchange handshake message.
+ *
+ * \note            In a TLS handshake, this is the how the client
+ *                  sets up its ECDHE context from the server's public
+ *                  ECDHE key material.
+ *
+ * \see             ecp.h
+ *
+ * \param ctx       The ECDHE context to use. This must be initialized.
+ * \param buf       On input, \c *buf must be the start of the input buffer.
+ *                  On output, \c *buf is updated to point to the end of the
+ *                  data that has been read. On success, this is the first byte
+ *                  past the end of the ServerKeyExchange parameters.
+ *                  On error, this is the point at which an error has been
+ *                  detected, which is usually not useful except to debug
+ *                  failures.
+ * \param end       The end of the input buffer.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ *
+ */
+int mbedtls_ecdh_read_params( mbedtls_ecdh_context *ctx,
+                              const unsigned char **buf,
+                              const unsigned char *end );
+
+/**
+ * \brief           This function sets up an ECDH context from an EC key.
+ *
+ *                  It is used by clients and servers in place of the
+ *                  ServerKeyEchange for static ECDH, and imports ECDH
+ *                  parameters from the EC key information of a certificate.
+ *
+ * \see             ecp.h
+ *
+ * \param ctx       The ECDH context to set up. This must be initialized.
+ * \param key       The EC key to use. This must be initialized.
+ * \param side      Defines the source of the key. Possible values are:
+ *                  - #MBEDTLS_ECDH_OURS: The key is ours.
+ *                  - #MBEDTLS_ECDH_THEIRS: The key is that of the peer.
+ *
+ * \return          \c 0 on success.
+ * \return          Another \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ *
+ */
+int mbedtls_ecdh_get_params( mbedtls_ecdh_context *ctx,
+                             const mbedtls_ecp_keypair *key,
+                             mbedtls_ecdh_side side );
+
+/**
+ * \brief           This function generates a public key and exports it
+ *                  as a TLS ClientKeyExchange payload.
+ *
+ *                  This is the second function used by a TLS client for ECDH(E)
+ *                  ciphersuites.
+ *
+ * \see             ecp.h
+ *
+ * \param ctx       The ECDH context to use. This must be initialized
+ *                  and bound to a group, the latter usually by
+ *                  mbedtls_ecdh_read_params().
+ * \param olen      The address at which to store the number of Bytes written.
+ *                  This must not be \c NULL.
+ * \param buf       The destination buffer. This must be a writable buffer
+ *                  of length \p blen Bytes.
+ * \param blen      The size of the destination buffer \p buf in Bytes.
+ * \param f_rng     The RNG function to use. This must not be \c NULL.
+ * \param p_rng     The RNG context to be passed to \p f_rng. This may be
+ *                  \c NULL in case \p f_rng doesn't need a context argument.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return          Another \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ */
+int mbedtls_ecdh_make_public( mbedtls_ecdh_context *ctx, size_t *olen,
+                      unsigned char *buf, size_t blen,
+                      int (*f_rng)(void *, unsigned char *, size_t),
+                      void *p_rng );
+
+/**
+ * \brief       This function parses and processes the ECDHE payload of a
+ *              TLS ClientKeyExchange message.
+ *
+ *              This is the third function used by a TLS server for ECDH(E)
+ *              ciphersuites. (It is called after mbedtls_ecdh_setup() and
+ *              mbedtls_ecdh_make_params().)
+ *
+ * \see         ecp.h
+ *
+ * \param ctx   The ECDH context to use. This must be initialized
+ *              and bound to a group, for example via mbedtls_ecdh_setup().
+ * \param buf   The pointer to the ClientKeyExchange payload. This must
+ *              be a readable buffer of length \p blen Bytes.
+ * \param blen  The length of the input buffer \p buf in Bytes.
+ *
+ * \return      \c 0 on success.
+ * \return      An \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ */
+int mbedtls_ecdh_read_public( mbedtls_ecdh_context *ctx,
+                              const unsigned char *buf, size_t blen );
+
+/**
+ * \brief           This function derives and exports the shared secret.
+ *
+ *                  This is the last function used by both TLS client
+ *                  and servers.
+ *
+ * \note            If \p f_rng is not NULL, it is used to implement
+ *                  countermeasures against side-channel attacks.
+ *                  For more information, see mbedtls_ecp_mul().
+ *
+ * \see             ecp.h
+
+ * \param ctx       The ECDH context to use. This must be initialized
+ *                  and have its own private key generated and the peer's
+ *                  public key imported.
+ * \param olen      The address at which to store the total number of
+ *                  Bytes written on success. This must not be \c NULL.
+ * \param buf       The buffer to write the generated shared key to. This
+ *                  must be a writable buffer of size \p blen Bytes.
+ * \param blen      The length of the destination buffer \p buf in Bytes.
+ * \param f_rng     The RNG function, for blinding purposes. This may
+ *                  b \c NULL if blinding isn't needed.
+ * \param p_rng     The RNG context. This may be \c NULL if \p f_rng
+ *                  doesn't need a context argument.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return          Another \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ */
+int mbedtls_ecdh_calc_secret( mbedtls_ecdh_context *ctx, size_t *olen,
+                      unsigned char *buf, size_t blen,
+                      int (*f_rng)(void *, unsigned char *, size_t),
+                      void *p_rng );
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief           This function enables restartable EC computations for this
+ *                  context.  (Default: disabled.)
+ *
+ * \see             \c mbedtls_ecp_set_max_ops()
+ *
+ * \note            It is not possible to safely disable restartable
+ *                  computations once enabled, except by free-ing the context,
+ *                  which cancels possible in-progress operations.
+ *
+ * \param ctx       The ECDH context to use. This must be initialized.
+ */
+void mbedtls_ecdh_enable_restart( mbedtls_ecdh_context *ctx );
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ecdh.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h
new file mode 100644
index 00000000000..264a638bb52
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecdsa.h
@@ -0,0 +1,626 @@
+/**
+ * \file ecdsa.h
+ *
+ * \brief This file contains ECDSA definitions and functions.
+ *
+ * The Elliptic Curve Digital Signature Algorithm (ECDSA) is defined in
+ * <em>Standards for Efficient Cryptography Group (SECG):
+ * SEC1 Elliptic Curve Cryptography</em>.
+ * The use of ECDSA for TLS is defined in <em>RFC-4492: Elliptic Curve
+ * Cryptography (ECC) Cipher Suites for Transport Layer Security (TLS)</em>.
+ *
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_ECDSA_H
+#define MBEDTLS_ECDSA_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
+
+/**
+ * \brief           Maximum ECDSA signature size for a given curve bit size
+ *
+ * \param bits      Curve size in bits
+ * \return          Maximum signature size in bytes
+ *
+ * \note            This macro returns a compile-time constant if its argument
+ *                  is one. It may evaluate its argument multiple times.
+ */
+/*
+ *     Ecdsa-Sig-Value ::= SEQUENCE {
+ *         r       INTEGER,
+ *         s       INTEGER
+ *     }
+ *
+ * For each of r and s, the value (V) may include an extra initial "0" bit.
+ */
+#define MBEDTLS_ECDSA_MAX_SIG_LEN( bits )                               \
+    ( /*T,L of SEQUENCE*/ ( ( bits ) >= 61 * 8 ? 3 : 2 ) +              \
+      /*T,L of r,s*/        2 * ( ( ( bits ) >= 127 * 8 ? 3 : 2 ) +     \
+      /*V of r,s*/                ( ( bits ) + 8 ) / 8 ) )
+
+/** The maximal size of an ECDSA signature in Bytes. */
+#define MBEDTLS_ECDSA_MAX_LEN  MBEDTLS_ECDSA_MAX_SIG_LEN( MBEDTLS_ECP_MAX_BITS )
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief           The ECDSA context structure.
+ *
+ * \warning         Performing multiple operations concurrently on the same
+ *                  ECDSA context is not supported; objects of this type
+ *                  should not be shared between multiple threads.
+ */
+typedef mbedtls_ecp_keypair mbedtls_ecdsa_context;
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+
+/**
+ * \brief           Internal restart context for ecdsa_verify()
+ *
+ * \note            Opaque struct, defined in ecdsa.c
+ */
+typedef struct mbedtls_ecdsa_restart_ver mbedtls_ecdsa_restart_ver_ctx;
+
+/**
+ * \brief           Internal restart context for ecdsa_sign()
+ *
+ * \note            Opaque struct, defined in ecdsa.c
+ */
+typedef struct mbedtls_ecdsa_restart_sig mbedtls_ecdsa_restart_sig_ctx;
+
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+/**
+ * \brief           Internal restart context for ecdsa_sign_det()
+ *
+ * \note            Opaque struct, defined in ecdsa.c
+ */
+typedef struct mbedtls_ecdsa_restart_det mbedtls_ecdsa_restart_det_ctx;
+#endif
+
+/**
+ * \brief           General context for resuming ECDSA operations
+ */
+typedef struct
+{
+    mbedtls_ecp_restart_ctx ecp;        /*!<  base context for ECP restart and
+                                              shared administrative info    */
+    mbedtls_ecdsa_restart_ver_ctx *ver; /*!<  ecdsa_verify() sub-context    */
+    mbedtls_ecdsa_restart_sig_ctx *sig; /*!<  ecdsa_sign() sub-context      */
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+    mbedtls_ecdsa_restart_det_ctx *det; /*!<  ecdsa_sign_det() sub-context  */
+#endif
+} mbedtls_ecdsa_restart_ctx;
+
+#else /* MBEDTLS_ECP_RESTARTABLE */
+
+/* Now we can declare functions that take a pointer to that */
+typedef void mbedtls_ecdsa_restart_ctx;
+
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+/**
+ * \brief          This function checks whether a given group can be used
+ *                 for ECDSA.
+ *
+ * \param gid      The ECP group ID to check.
+ *
+ * \return         \c 1 if the group can be used, \c 0 otherwise
+ */
+int mbedtls_ecdsa_can_do( mbedtls_ecp_group_id gid );
+
+/**
+ * \brief           This function computes the ECDSA signature of a
+ *                  previously-hashed message.
+ *
+ * \note            The deterministic version implemented in
+ *                  mbedtls_ecdsa_sign_det() is usually preferred.
+ *
+ * \note            If the bitlength of the message hash is larger than the
+ *                  bitlength of the group order, then the hash is truncated
+ *                  as defined in <em>Standards for Efficient Cryptography Group
+ *                  (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ *                  4.1.3, step 5.
+ *
+ * \see             ecp.h
+ *
+ * \param grp       The context for the elliptic curve to use.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param r         The MPI context in which to store the first part
+ *                  the signature. This must be initialized.
+ * \param s         The MPI context in which to store the second part
+ *                  the signature. This must be initialized.
+ * \param d         The private signing key. This must be initialized.
+ * \param buf       The content to be signed. This is usually the hash of
+ *                  the original data to be signed. This must be a readable
+ *                  buffer of length \p blen Bytes. It may be \c NULL if
+ *                  \p blen is zero.
+ * \param blen      The length of \p buf in Bytes.
+ * \param f_rng     The RNG function. This must not be \c NULL.
+ * \param p_rng     The RNG context to be passed to \p f_rng. This may be
+ *                  \c NULL if \p f_rng doesn't need a context parameter.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX
+ *                  or \c MBEDTLS_MPI_XXX error code on failure.
+ */
+int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s,
+                const mbedtls_mpi *d, const unsigned char *buf, size_t blen,
+                int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief           This function computes the ECDSA signature of a
+ *                  previously-hashed message, deterministic version.
+ *
+ *                  For more information, see <em>RFC-6979: Deterministic
+ *                  Usage of the Digital Signature Algorithm (DSA) and Elliptic
+ *                  Curve Digital Signature Algorithm (ECDSA)</em>.
+ *
+ * \note            If the bitlength of the message hash is larger than the
+ *                  bitlength of the group order, then the hash is truncated as
+ *                  defined in <em>Standards for Efficient Cryptography Group
+ *                  (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ *                  4.1.3, step 5.
+ *
+ * \warning         Since the output of the internal RNG is always the same for
+ *                  the same key and message, this limits the efficiency of
+ *                  blinding and leaks information through side channels. For
+ *                  secure behavior use mbedtls_ecdsa_sign_det_ext() instead.
+ *
+ *                  (Optimally the blinding is a random value that is different
+ *                  on every execution. In this case the blinding is still
+ *                  random from the attackers perspective, but is the same on
+ *                  each execution. This means that this blinding does not
+ *                  prevent attackers from recovering secrets by combining
+ *                  several measurement traces, but may prevent some attacks
+ *                  that exploit relationships between secret data.)
+ *
+ * \see             ecp.h
+ *
+ * \param grp       The context for the elliptic curve to use.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param r         The MPI context in which to store the first part
+ *                  the signature. This must be initialized.
+ * \param s         The MPI context in which to store the second part
+ *                  the signature. This must be initialized.
+ * \param d         The private signing key. This must be initialized
+ *                  and setup, for example through mbedtls_ecp_gen_privkey().
+ * \param buf       The hashed content to be signed. This must be a readable
+ *                  buffer of length \p blen Bytes. It may be \c NULL if
+ *                  \p blen is zero.
+ * \param blen      The length of \p buf in Bytes.
+ * \param md_alg    The hash algorithm used to hash the original data.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX
+ *                  error code on failure.
+ */
+int mbedtls_ecdsa_sign_det( mbedtls_ecp_group *grp, mbedtls_mpi *r,
+                            mbedtls_mpi *s, const mbedtls_mpi *d,
+                            const unsigned char *buf, size_t blen,
+                            mbedtls_md_type_t md_alg ) MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief           This function computes the ECDSA signature of a
+ *                  previously-hashed message, deterministic version.
+ *
+ *                  For more information, see <em>RFC-6979: Deterministic
+ *                  Usage of the Digital Signature Algorithm (DSA) and Elliptic
+ *                  Curve Digital Signature Algorithm (ECDSA)</em>.
+ *
+ * \note            If the bitlength of the message hash is larger than the
+ *                  bitlength of the group order, then the hash is truncated as
+ *                  defined in <em>Standards for Efficient Cryptography Group
+ *                  (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ *                  4.1.3, step 5.
+ *
+ * \see             ecp.h
+ *
+ * \param grp           The context for the elliptic curve to use.
+ *                      This must be initialized and have group parameters
+ *                      set, for example through mbedtls_ecp_group_load().
+ * \param r             The MPI context in which to store the first part
+ *                      the signature. This must be initialized.
+ * \param s             The MPI context in which to store the second part
+ *                      the signature. This must be initialized.
+ * \param d             The private signing key. This must be initialized
+ *                      and setup, for example through mbedtls_ecp_gen_privkey().
+ * \param buf           The hashed content to be signed. This must be a readable
+ *                      buffer of length \p blen Bytes. It may be \c NULL if
+ *                      \p blen is zero.
+ * \param blen          The length of \p buf in Bytes.
+ * \param md_alg        The hash algorithm used to hash the original data.
+ * \param f_rng_blind   The RNG function used for blinding. This must not be
+ *                      \c NULL.
+ * \param p_rng_blind   The RNG context to be passed to \p f_rng. This may be
+ *                      \c NULL if \p f_rng doesn't need a context parameter.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX
+ *                  error code on failure.
+ */
+int mbedtls_ecdsa_sign_det_ext( mbedtls_ecp_group *grp, mbedtls_mpi *r,
+                            mbedtls_mpi *s, const mbedtls_mpi *d,
+                            const unsigned char *buf, size_t blen,
+                            mbedtls_md_type_t md_alg,
+                            int (*f_rng_blind)(void *, unsigned char *, size_t),
+                            void *p_rng_blind );
+#endif /* MBEDTLS_ECDSA_DETERMINISTIC */
+
+/**
+ * \brief           This function verifies the ECDSA signature of a
+ *                  previously-hashed message.
+ *
+ * \note            If the bitlength of the message hash is larger than the
+ *                  bitlength of the group order, then the hash is truncated as
+ *                  defined in <em>Standards for Efficient Cryptography Group
+ *                  (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ *                  4.1.4, step 3.
+ *
+ * \see             ecp.h
+ *
+ * \param grp       The ECP group to use.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param buf       The hashed content that was signed. This must be a readable
+ *                  buffer of length \p blen Bytes. It may be \c NULL if
+ *                  \p blen is zero.
+ * \param blen      The length of \p buf in Bytes.
+ * \param Q         The public key to use for verification. This must be
+ *                  initialized and setup.
+ * \param r         The first integer of the signature.
+ *                  This must be initialized.
+ * \param s         The second integer of the signature.
+ *                  This must be initialized.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the signature
+ *                  is invalid.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX
+ *                  error code on failure for any other reason.
+ */
+int mbedtls_ecdsa_verify( mbedtls_ecp_group *grp,
+                          const unsigned char *buf, size_t blen,
+                          const mbedtls_ecp_point *Q, const mbedtls_mpi *r,
+                          const mbedtls_mpi *s);
+
+/**
+ * \brief           This function computes the ECDSA signature and writes it
+ *                  to a buffer, serialized as defined in <em>RFC-4492:
+ *                  Elliptic Curve Cryptography (ECC) Cipher Suites for
+ *                  Transport Layer Security (TLS)</em>.
+ *
+ * \warning         It is not thread-safe to use the same context in
+ *                  multiple threads.
+ *
+ * \note            The deterministic version is used if
+ *                  #MBEDTLS_ECDSA_DETERMINISTIC is defined. For more
+ *                  information, see <em>RFC-6979: Deterministic Usage
+ *                  of the Digital Signature Algorithm (DSA) and Elliptic
+ *                  Curve Digital Signature Algorithm (ECDSA)</em>.
+ *
+ * \note            If the bitlength of the message hash is larger than the
+ *                  bitlength of the group order, then the hash is truncated as
+ *                  defined in <em>Standards for Efficient Cryptography Group
+ *                  (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ *                  4.1.3, step 5.
+ *
+ * \see             ecp.h
+ *
+ * \param ctx       The ECDSA context to use. This must be initialized
+ *                  and have a group and private key bound to it, for example
+ *                  via mbedtls_ecdsa_genkey() or mbedtls_ecdsa_from_keypair().
+ * \param md_alg    The message digest that was used to hash the message.
+ * \param hash      The message hash to be signed. This must be a readable
+ *                  buffer of length \p blen Bytes.
+ * \param hlen      The length of the hash \p hash in Bytes.
+ * \param sig       The buffer to which to write the signature. This must be a
+ *                  writable buffer of length at least twice as large as the
+ *                  size of the curve used, plus 9. For example, 73 Bytes if
+ *                  a 256-bit curve is used. A buffer length of
+ *                  #MBEDTLS_ECDSA_MAX_LEN is always safe.
+ * \param slen      The address at which to store the actual length of
+ *                  the signature written. Must not be \c NULL.
+ * \param f_rng     The RNG function. This must not be \c NULL if
+ *                  #MBEDTLS_ECDSA_DETERMINISTIC is unset. Otherwise,
+ *                  it is used only for blinding and may be set to \c NULL, but
+ *                  doing so is DEPRECATED.
+ * \param p_rng     The RNG context to be passed to \p f_rng. This may be
+ *                  \c NULL if \p f_rng is \c NULL or doesn't use a context.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX, \c MBEDTLS_ERR_MPI_XXX or
+ *                  \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_ecdsa_write_signature( mbedtls_ecdsa_context *ctx,
+                                   mbedtls_md_type_t md_alg,
+                           const unsigned char *hash, size_t hlen,
+                           unsigned char *sig, size_t *slen,
+                           int (*f_rng)(void *, unsigned char *, size_t),
+                           void *p_rng );
+
+/**
+ * \brief           This function computes the ECDSA signature and writes it
+ *                  to a buffer, in a restartable way.
+ *
+ * \see             \c mbedtls_ecdsa_write_signature()
+ *
+ * \note            This function is like \c mbedtls_ecdsa_write_signature()
+ *                  but it can return early and restart according to the limit
+ *                  set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
+ *
+ * \param ctx       The ECDSA context to use. This must be initialized
+ *                  and have a group and private key bound to it, for example
+ *                  via mbedtls_ecdsa_genkey() or mbedtls_ecdsa_from_keypair().
+ * \param md_alg    The message digest that was used to hash the message.
+ * \param hash      The message hash to be signed. This must be a readable
+ *                  buffer of length \p blen Bytes.
+ * \param hlen      The length of the hash \p hash in Bytes.
+ * \param sig       The buffer to which to write the signature. This must be a
+ *                  writable buffer of length at least twice as large as the
+ *                  size of the curve used, plus 9. For example, 73 Bytes if
+ *                  a 256-bit curve is used. A buffer length of
+ *                  #MBEDTLS_ECDSA_MAX_LEN is always safe.
+ * \param slen      The address at which to store the actual length of
+ *                  the signature written. Must not be \c NULL.
+ * \param f_rng     The RNG function. This must not be \c NULL if
+ *                  #MBEDTLS_ECDSA_DETERMINISTIC is unset. Otherwise,
+ *                  it is unused and may be set to \c NULL.
+ * \param p_rng     The RNG context to be passed to \p f_rng. This may be
+ *                  \c NULL if \p f_rng is \c NULL or doesn't use a context.
+ * \param rs_ctx    The restart context to use. This may be \c NULL to disable
+ *                  restarting. If it is not \c NULL, it must point to an
+ *                  initialized restart context.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return          Another \c MBEDTLS_ERR_ECP_XXX, \c MBEDTLS_ERR_MPI_XXX or
+ *                  \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_ecdsa_write_signature_restartable( mbedtls_ecdsa_context *ctx,
+                           mbedtls_md_type_t md_alg,
+                           const unsigned char *hash, size_t hlen,
+                           unsigned char *sig, size_t *slen,
+                           int (*f_rng)(void *, unsigned char *, size_t),
+                           void *p_rng,
+                           mbedtls_ecdsa_restart_ctx *rs_ctx );
+
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief           This function computes an ECDSA signature and writes
+ *                  it to a buffer, serialized as defined in <em>RFC-4492:
+ *                  Elliptic Curve Cryptography (ECC) Cipher Suites for
+ *                  Transport Layer Security (TLS)</em>.
+ *
+ *                  The deterministic version is defined in <em>RFC-6979:
+ *                  Deterministic Usage of the Digital Signature Algorithm (DSA)
+ *                  and Elliptic Curve Digital Signature Algorithm (ECDSA)</em>.
+ *
+ * \warning         It is not thread-safe to use the same context in
+ *                  multiple threads.
+ *
+ * \note            If the bitlength of the message hash is larger than the
+ *                  bitlength of the group order, then the hash is truncated as
+ *                  defined in <em>Standards for Efficient Cryptography Group
+ *                  (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ *                  4.1.3, step 5.
+ *
+ * \see             ecp.h
+ *
+ * \deprecated      Superseded by mbedtls_ecdsa_write_signature() in
+ *                  Mbed TLS version 2.0 and later.
+ *
+ * \param ctx       The ECDSA context to use. This must be initialized
+ *                  and have a group and private key bound to it, for example
+ *                  via mbedtls_ecdsa_genkey() or mbedtls_ecdsa_from_keypair().
+ * \param hash      The message hash to be signed. This must be a readable
+ *                  buffer of length \p blen Bytes.
+ * \param hlen      The length of the hash \p hash in Bytes.
+ * \param sig       The buffer to which to write the signature. This must be a
+ *                  writable buffer of length at least twice as large as the
+ *                  size of the curve used, plus 9. For example, 73 Bytes if
+ *                  a 256-bit curve is used. A buffer length of
+ *                  #MBEDTLS_ECDSA_MAX_LEN is always safe.
+ * \param slen      The address at which to store the actual length of
+ *                  the signature written. Must not be \c NULL.
+ * \param md_alg    The message digest that was used to hash the message.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX, \c MBEDTLS_ERR_MPI_XXX or
+ *                  \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_ecdsa_write_signature_det( mbedtls_ecdsa_context *ctx,
+                               const unsigned char *hash, size_t hlen,
+                               unsigned char *sig, size_t *slen,
+                               mbedtls_md_type_t md_alg ) MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+#endif /* MBEDTLS_ECDSA_DETERMINISTIC */
+
+/**
+ * \brief           This function reads and verifies an ECDSA signature.
+ *
+ * \note            If the bitlength of the message hash is larger than the
+ *                  bitlength of the group order, then the hash is truncated as
+ *                  defined in <em>Standards for Efficient Cryptography Group
+ *                  (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ *                  4.1.4, step 3.
+ *
+ * \see             ecp.h
+ *
+ * \param ctx       The ECDSA context to use. This must be initialized
+ *                  and have a group and public key bound to it.
+ * \param hash      The message hash that was signed. This must be a readable
+ *                  buffer of length \p size Bytes.
+ * \param hlen      The size of the hash \p hash.
+ * \param sig       The signature to read and verify. This must be a readable
+ *                  buffer of length \p slen Bytes.
+ * \param slen      The size of \p sig in Bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if signature is invalid.
+ * \return          #MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH if there is a valid
+ *                  signature in \p sig, but its length is less than \p siglen.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_ERR_MPI_XXX
+ *                  error code on failure for any other reason.
+ */
+int mbedtls_ecdsa_read_signature( mbedtls_ecdsa_context *ctx,
+                          const unsigned char *hash, size_t hlen,
+                          const unsigned char *sig, size_t slen );
+
+/**
+ * \brief           This function reads and verifies an ECDSA signature,
+ *                  in a restartable way.
+ *
+ * \see             \c mbedtls_ecdsa_read_signature()
+ *
+ * \note            This function is like \c mbedtls_ecdsa_read_signature()
+ *                  but it can return early and restart according to the limit
+ *                  set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
+ *
+ * \param ctx       The ECDSA context to use. This must be initialized
+ *                  and have a group and public key bound to it.
+ * \param hash      The message hash that was signed. This must be a readable
+ *                  buffer of length \p size Bytes.
+ * \param hlen      The size of the hash \p hash.
+ * \param sig       The signature to read and verify. This must be a readable
+ *                  buffer of length \p slen Bytes.
+ * \param slen      The size of \p sig in Bytes.
+ * \param rs_ctx    The restart context to use. This may be \c NULL to disable
+ *                  restarting. If it is not \c NULL, it must point to an
+ *                  initialized restart context.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if signature is invalid.
+ * \return          #MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH if there is a valid
+ *                  signature in \p sig, but its length is less than \p siglen.
+ * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return          Another \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_ERR_MPI_XXX
+ *                  error code on failure for any other reason.
+ */
+int mbedtls_ecdsa_read_signature_restartable( mbedtls_ecdsa_context *ctx,
+                          const unsigned char *hash, size_t hlen,
+                          const unsigned char *sig, size_t slen,
+                          mbedtls_ecdsa_restart_ctx *rs_ctx );
+
+/**
+ * \brief          This function generates an ECDSA keypair on the given curve.
+ *
+ * \see            ecp.h
+ *
+ * \param ctx      The ECDSA context to store the keypair in.
+ *                 This must be initialized.
+ * \param gid      The elliptic curve to use. One of the various
+ *                 \c MBEDTLS_ECP_DP_XXX macros depending on configuration.
+ * \param f_rng    The RNG function to use. This must not be \c NULL.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be
+ *                 \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_ECP_XXX code on failure.
+ */
+int mbedtls_ecdsa_genkey( mbedtls_ecdsa_context *ctx, mbedtls_ecp_group_id gid,
+                  int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+/**
+ * \brief           This function sets up an ECDSA context from an EC key pair.
+ *
+ * \see             ecp.h
+ *
+ * \param ctx       The ECDSA context to setup. This must be initialized.
+ * \param key       The EC key to use. This must be initialized and hold
+ *                  a private-public key pair or a public key. In the former
+ *                  case, the ECDSA context may be used for signature creation
+ *                  and verification after this call. In the latter case, it
+ *                  may be used for signature verification.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX code on failure.
+ */
+int mbedtls_ecdsa_from_keypair( mbedtls_ecdsa_context *ctx,
+                                const mbedtls_ecp_keypair *key );
+
+/**
+ * \brief           This function initializes an ECDSA context.
+ *
+ * \param ctx       The ECDSA context to initialize.
+ *                  This must not be \c NULL.
+ */
+void mbedtls_ecdsa_init( mbedtls_ecdsa_context *ctx );
+
+/**
+ * \brief           This function frees an ECDSA context.
+ *
+ * \param ctx       The ECDSA context to free. This may be \c NULL,
+ *                  in which case this function does nothing. If it
+ *                  is not \c NULL, it must be initialized.
+ */
+void mbedtls_ecdsa_free( mbedtls_ecdsa_context *ctx );
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief           Initialize a restart context.
+ *
+ * \param ctx       The restart context to initialize.
+ *                  This must not be \c NULL.
+ */
+void mbedtls_ecdsa_restart_init( mbedtls_ecdsa_restart_ctx *ctx );
+
+/**
+ * \brief           Free the components of a restart context.
+ *
+ * \param ctx       The restart context to free. This may be \c NULL,
+ *                  in which case this function does nothing. If it
+ *                  is not \c NULL, it must be initialized.
+ */
+void mbedtls_ecdsa_restart_free( mbedtls_ecdsa_restart_ctx *ctx );
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ecdsa.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h
new file mode 100644
index 00000000000..891705d8c4f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecjpake.h
@@ -0,0 +1,275 @@
+/**
+ * \file ecjpake.h
+ *
+ * \brief Elliptic curve J-PAKE
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_ECJPAKE_H
+#define MBEDTLS_ECJPAKE_H
+
+/*
+ * J-PAKE is a password-authenticated key exchange that allows deriving a
+ * strong shared secret from a (potentially low entropy) pre-shared
+ * passphrase, with forward secrecy and mutual authentication.
+ * https://en.wikipedia.org/wiki/Password_Authenticated_Key_Exchange_by_Juggling
+ *
+ * This file implements the Elliptic Curve variant of J-PAKE,
+ * as defined in Chapter 7.4 of the Thread v1.0 Specification,
+ * available to members of the Thread Group http://threadgroup.org/
+ *
+ * As the J-PAKE algorithm is inherently symmetric, so is our API.
+ * Each party needs to send its first round message, in any order, to the
+ * other party, then each sends its second round message, in any order.
+ * The payloads are serialized in a way suitable for use in TLS, but could
+ * also be use outside TLS.
+ */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Roles in the EC J-PAKE exchange
+ */
+typedef enum {
+    MBEDTLS_ECJPAKE_CLIENT = 0,         /**< Client                         */
+    MBEDTLS_ECJPAKE_SERVER,             /**< Server                         */
+} mbedtls_ecjpake_role;
+
+#if !defined(MBEDTLS_ECJPAKE_ALT)
+/**
+ * EC J-PAKE context structure.
+ *
+ * J-PAKE is a symmetric protocol, except for the identifiers used in
+ * Zero-Knowledge Proofs, and the serialization of the second message
+ * (KeyExchange) as defined by the Thread spec.
+ *
+ * In order to benefit from this symmetry, we choose a different naming
+ * convetion from the Thread v1.0 spec. Correspondance is indicated in the
+ * description as a pair C: client name, S: server name
+ */
+typedef struct mbedtls_ecjpake_context
+{
+    const mbedtls_md_info_t *md_info;   /**< Hash to use                    */
+    mbedtls_ecp_group grp;              /**< Elliptic curve                 */
+    mbedtls_ecjpake_role role;          /**< Are we client or server?       */
+    int point_format;                   /**< Format for point export        */
+
+    mbedtls_ecp_point Xm1;              /**< My public key 1   C: X1, S: X3 */
+    mbedtls_ecp_point Xm2;              /**< My public key 2   C: X2, S: X4 */
+    mbedtls_ecp_point Xp1;              /**< Peer public key 1 C: X3, S: X1 */
+    mbedtls_ecp_point Xp2;              /**< Peer public key 2 C: X4, S: X2 */
+    mbedtls_ecp_point Xp;               /**< Peer public key   C: Xs, S: Xc */
+
+    mbedtls_mpi xm1;                    /**< My private key 1  C: x1, S: x3 */
+    mbedtls_mpi xm2;                    /**< My private key 2  C: x2, S: x4 */
+
+    mbedtls_mpi s;                      /**< Pre-shared secret (passphrase) */
+} mbedtls_ecjpake_context;
+
+#else  /* MBEDTLS_ECJPAKE_ALT */
+#include "ecjpake_alt.h"
+#endif /* MBEDTLS_ECJPAKE_ALT */
+
+/**
+ * \brief           Initialize an ECJPAKE context.
+ *
+ * \param ctx       The ECJPAKE context to initialize.
+ *                  This must not be \c NULL.
+ */
+void mbedtls_ecjpake_init( mbedtls_ecjpake_context *ctx );
+
+/**
+ * \brief           Set up an ECJPAKE context for use.
+ *
+ * \note            Currently the only values for hash/curve allowed by the
+ *                  standard are #MBEDTLS_MD_SHA256/#MBEDTLS_ECP_DP_SECP256R1.
+ *
+ * \param ctx       The ECJPAKE context to set up. This must be initialized.
+ * \param role      The role of the caller. This must be either
+ *                  #MBEDTLS_ECJPAKE_CLIENT or #MBEDTLS_ECJPAKE_SERVER.
+ * \param hash      The identifier of the hash function to use,
+ *                  for example #MBEDTLS_MD_SHA256.
+ * \param curve     The identifier of the elliptic curve to use,
+ *                  for example #MBEDTLS_ECP_DP_SECP256R1.
+ * \param secret    The pre-shared secret (passphrase). This must be
+ *                  a readable buffer of length \p len Bytes. It need
+ *                  only be valid for the duration of this call.
+ * \param len       The length of the pre-shared secret \p secret.
+ *
+ * \return          \c 0 if successful.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_ecjpake_setup( mbedtls_ecjpake_context *ctx,
+                           mbedtls_ecjpake_role role,
+                           mbedtls_md_type_t hash,
+                           mbedtls_ecp_group_id curve,
+                           const unsigned char *secret,
+                           size_t len );
+
+/**
+ * \brief           Check if an ECJPAKE context is ready for use.
+ *
+ * \param ctx       The ECJPAKE context to check. This must be
+ *                  initialized.
+ *
+ * \return          \c 0 if the context is ready for use.
+ * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA otherwise.
+ */
+int mbedtls_ecjpake_check( const mbedtls_ecjpake_context *ctx );
+
+/**
+ * \brief           Generate and write the first round message
+ *                  (TLS: contents of the Client/ServerHello extension,
+ *                  excluding extension type and length bytes).
+ *
+ * \param ctx       The ECJPAKE context to use. This must be
+ *                  initialized and set up.
+ * \param buf       The buffer to write the contents to. This must be a
+ *                  writable buffer of length \p len Bytes.
+ * \param len       The length of \p buf in Bytes.
+ * \param olen      The address at which to store the total number
+ *                  of Bytes written to \p buf. This must not be \c NULL.
+ * \param f_rng     The RNG function to use. This must not be \c NULL.
+ * \param p_rng     The RNG parameter to be passed to \p f_rng. This
+ *                  may be \c NULL if \p f_rng doesn't use a context.
+ *
+ * \return          \c 0 if successful.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_ecjpake_write_round_one( mbedtls_ecjpake_context *ctx,
+                            unsigned char *buf, size_t len, size_t *olen,
+                            int (*f_rng)(void *, unsigned char *, size_t),
+                            void *p_rng );
+
+/**
+ * \brief           Read and process the first round message
+ *                  (TLS: contents of the Client/ServerHello extension,
+ *                  excluding extension type and length bytes).
+ *
+ * \param ctx       The ECJPAKE context to use. This must be initialized
+ *                  and set up.
+ * \param buf       The buffer holding the first round message. This must
+ *                  be a readable buffer of length \p len Bytes.
+ * \param len       The length in Bytes of \p buf.
+ *
+ * \return          \c 0 if successful.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_ecjpake_read_round_one( mbedtls_ecjpake_context *ctx,
+                                    const unsigned char *buf,
+                                    size_t len );
+
+/**
+ * \brief           Generate and write the second round message
+ *                  (TLS: contents of the Client/ServerKeyExchange).
+ *
+ * \param ctx       The ECJPAKE context to use. This must be initialized,
+ *                  set up, and already have performed round one.
+ * \param buf       The buffer to write the round two contents to.
+ *                  This must be a writable buffer of length \p len Bytes.
+ * \param len       The size of \p buf in Bytes.
+ * \param olen      The address at which to store the total number of Bytes
+ *                  written to \p buf. This must not be \c NULL.
+ * \param f_rng     The RNG function to use. This must not be \c NULL.
+ * \param p_rng     The RNG parameter to be passed to \p f_rng. This
+ *                  may be \c NULL if \p f_rng doesn't use a context.
+ *
+ * \return          \c 0 if successful.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_ecjpake_write_round_two( mbedtls_ecjpake_context *ctx,
+                            unsigned char *buf, size_t len, size_t *olen,
+                            int (*f_rng)(void *, unsigned char *, size_t),
+                            void *p_rng );
+
+/**
+ * \brief           Read and process the second round message
+ *                  (TLS: contents of the Client/ServerKeyExchange).
+ *
+ * \param ctx       The ECJPAKE context to use. This must be initialized
+ *                  and set up and already have performed round one.
+ * \param buf       The buffer holding the second round message. This must
+ *                  be a readable buffer of length \p len Bytes.
+ * \param len       The length in Bytes of \p buf.
+ *
+ * \return          \c 0 if successful.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_ecjpake_read_round_two( mbedtls_ecjpake_context *ctx,
+                                    const unsigned char *buf,
+                                    size_t len );
+
+/**
+ * \brief           Derive the shared secret
+ *                  (TLS: Pre-Master Secret).
+ *
+ * \param ctx       The ECJPAKE context to use. This must be initialized,
+ *                  set up and have performed both round one and two.
+ * \param buf       The buffer to write the derived secret to. This must
+ *                  be a writable buffer of length \p len Bytes.
+ * \param len       The length of \p buf in Bytes.
+ * \param olen      The address at which to store the total number of Bytes
+ *                  written to \p buf. This must not be \c NULL.
+ * \param f_rng     The RNG function to use. This must not be \c NULL.
+ * \param p_rng     The RNG parameter to be passed to \p f_rng. This
+ *                  may be \c NULL if \p f_rng doesn't use a context.
+ *
+ * \return          \c 0 if successful.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_ecjpake_derive_secret( mbedtls_ecjpake_context *ctx,
+                            unsigned char *buf, size_t len, size_t *olen,
+                            int (*f_rng)(void *, unsigned char *, size_t),
+                            void *p_rng );
+
+/**
+ * \brief           This clears an ECJPAKE context and frees any
+ *                  embedded data structure.
+ *
+ * \param ctx       The ECJPAKE context to free. This may be \c NULL,
+ *                  in which case this function does nothing. If it is not
+ *                  \c NULL, it must point to an initialized ECJPAKE context.
+ */
+void mbedtls_ecjpake_free( mbedtls_ecjpake_context *ctx );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if a test failed
+ */
+int mbedtls_ecjpake_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* ecjpake.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecp.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecp.h
new file mode 100644
index 00000000000..0924341e002
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecp.h
@@ -0,0 +1,1311 @@
+/**
+ * \file ecp.h
+ *
+ * \brief This file provides an API for Elliptic Curves over GF(P) (ECP).
+ *
+ * The use of ECP in cryptography and TLS is defined in
+ * <em>Standards for Efficient Cryptography Group (SECG): SEC1
+ * Elliptic Curve Cryptography</em> and
+ * <em>RFC-4492: Elliptic Curve Cryptography (ECC) Cipher Suites
+ * for Transport Layer Security (TLS)</em>.
+ *
+ * <em>RFC-2409: The Internet Key Exchange (IKE)</em> defines ECP
+ * group types.
+ *
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_ECP_H
+#define MBEDTLS_ECP_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/bignum.h"
+
+/*
+ * ECP error codes
+ */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_ECP_BAD_INPUT_DATA                    -0x4F80
+/** The buffer is too small to write to. */
+#define MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL                  -0x4F00
+/** The requested feature is not available, for example, the requested curve is not supported. */
+#define MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE               -0x4E80
+/** The signature is not valid. */
+#define MBEDTLS_ERR_ECP_VERIFY_FAILED                     -0x4E00
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_ECP_ALLOC_FAILED                      -0x4D80
+/** Generation of random value, such as ephemeral key, failed. */
+#define MBEDTLS_ERR_ECP_RANDOM_FAILED                     -0x4D00
+/** Invalid private or public key. */
+#define MBEDTLS_ERR_ECP_INVALID_KEY                       -0x4C80
+/** The buffer contains a valid signature followed by more data. */
+#define MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH                  -0x4C00
+
+/* MBEDTLS_ERR_ECP_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** The ECP hardware accelerator failed. */
+#define MBEDTLS_ERR_ECP_HW_ACCEL_FAILED                   -0x4B80
+
+/** Operation in progress, call again with the same parameters to continue. */
+#define MBEDTLS_ERR_ECP_IN_PROGRESS                       -0x4B00
+
+/* Flags indicating whether to include code that is specific to certain
+ * types of curves. These flags are for internal library use only. */
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED
+#endif
+#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) || \
+    defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_ECP_MONTGOMERY_ENABLED
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Domain-parameter identifiers: curve, subgroup, and generator.
+ *
+ * \note Only curves over prime fields are supported.
+ *
+ * \warning This library does not support validation of arbitrary domain
+ * parameters. Therefore, only standardized domain parameters from trusted
+ * sources should be used. See mbedtls_ecp_group_load().
+ */
+/* Note: when adding a new curve:
+ * - Add it at the end of this enum, otherwise you'll break the ABI by
+ *   changing the numerical value for existing curves.
+ * - Increment MBEDTLS_ECP_DP_MAX below if needed.
+ * - Update the calculation of MBEDTLS_ECP_MAX_BITS_MIN below.
+ * - Add the corresponding MBEDTLS_ECP_DP_xxx_ENABLED macro definition to
+ *   config.h.
+ * - List the curve as a dependency of MBEDTLS_ECP_C and
+ *   MBEDTLS_ECDSA_C if supported in check_config.h.
+ * - Add the curve to the appropriate curve type macro
+ *   MBEDTLS_ECP_yyy_ENABLED above.
+ * - Add the necessary definitions to ecp_curves.c.
+ * - Add the curve to the ecp_supported_curves array in ecp.c.
+ * - Add the curve to applicable profiles in x509_crt.c if applicable.
+ */
+typedef enum
+{
+    MBEDTLS_ECP_DP_NONE = 0,       /*!< Curve not defined. */
+    MBEDTLS_ECP_DP_SECP192R1,      /*!< Domain parameters for the 192-bit curve defined by FIPS 186-4 and SEC1. */
+    MBEDTLS_ECP_DP_SECP224R1,      /*!< Domain parameters for the 224-bit curve defined by FIPS 186-4 and SEC1. */
+    MBEDTLS_ECP_DP_SECP256R1,      /*!< Domain parameters for the 256-bit curve defined by FIPS 186-4 and SEC1. */
+    MBEDTLS_ECP_DP_SECP384R1,      /*!< Domain parameters for the 384-bit curve defined by FIPS 186-4 and SEC1. */
+    MBEDTLS_ECP_DP_SECP521R1,      /*!< Domain parameters for the 521-bit curve defined by FIPS 186-4 and SEC1. */
+    MBEDTLS_ECP_DP_BP256R1,        /*!< Domain parameters for 256-bit Brainpool curve. */
+    MBEDTLS_ECP_DP_BP384R1,        /*!< Domain parameters for 384-bit Brainpool curve. */
+    MBEDTLS_ECP_DP_BP512R1,        /*!< Domain parameters for 512-bit Brainpool curve. */
+    MBEDTLS_ECP_DP_CURVE25519,     /*!< Domain parameters for Curve25519. */
+    MBEDTLS_ECP_DP_SECP192K1,      /*!< Domain parameters for 192-bit "Koblitz" curve. */
+    MBEDTLS_ECP_DP_SECP224K1,      /*!< Domain parameters for 224-bit "Koblitz" curve. */
+    MBEDTLS_ECP_DP_SECP256K1,      /*!< Domain parameters for 256-bit "Koblitz" curve. */
+    MBEDTLS_ECP_DP_CURVE448,       /*!< Domain parameters for Curve448. */
+} mbedtls_ecp_group_id;
+
+/**
+ * The number of supported curves, plus one for #MBEDTLS_ECP_DP_NONE.
+ *
+ * \note Montgomery curves are currently excluded.
+ */
+#define MBEDTLS_ECP_DP_MAX     12
+
+/*
+ * Curve types
+ */
+typedef enum
+{
+    MBEDTLS_ECP_TYPE_NONE = 0,
+    MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS,    /* y^2 = x^3 + a x + b      */
+    MBEDTLS_ECP_TYPE_MONTGOMERY,           /* y^2 = x^3 + a x^2 + x    */
+} mbedtls_ecp_curve_type;
+
+/**
+ * Curve information, for use by other modules.
+ */
+typedef struct mbedtls_ecp_curve_info
+{
+    mbedtls_ecp_group_id grp_id;    /*!< An internal identifier. */
+    uint16_t tls_id;                /*!< The TLS NamedCurve identifier. */
+    uint16_t bit_size;              /*!< The curve size in bits. */
+    const char *name;               /*!< A human-friendly name. */
+} mbedtls_ecp_curve_info;
+
+/**
+ * \brief           The ECP point structure, in Jacobian coordinates.
+ *
+ * \note            All functions expect and return points satisfying
+ *                  the following condition: <code>Z == 0</code> or
+ *                  <code>Z == 1</code>. Other values of \p Z are
+ *                  used only by internal functions.
+ *                  The point is zero, or "at infinity", if <code>Z == 0</code>.
+ *                  Otherwise, \p X and \p Y are its standard (affine)
+ *                  coordinates.
+ */
+typedef struct mbedtls_ecp_point
+{
+    mbedtls_mpi X;          /*!< The X coordinate of the ECP point. */
+    mbedtls_mpi Y;          /*!< The Y coordinate of the ECP point. */
+    mbedtls_mpi Z;          /*!< The Z coordinate of the ECP point. */
+}
+mbedtls_ecp_point;
+
+/* Determine the minimum safe value of MBEDTLS_ECP_MAX_BITS. */
+#if !defined(MBEDTLS_ECP_C)
+#define MBEDTLS_ECP_MAX_BITS_MIN 0
+/* Note: the curves must be listed in DECREASING size! */
+#elif defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 521
+#elif defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 512
+#elif defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 448
+#elif defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 384
+#elif defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 384
+#elif defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 255
+#elif defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 225 // n is slightly above 2^224
+#elif defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 224
+#elif defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 192
+#elif defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 192
+#else
+#error "MBEDTLS_ECP_C enabled, but no curve?"
+#endif
+
+#if !defined(MBEDTLS_ECP_ALT)
+/*
+ * default mbed TLS elliptic curve arithmetic implementation
+ *
+ * (in case MBEDTLS_ECP_ALT is defined then the developer has to provide an
+ * alternative implementation for the whole module and it will replace this
+ * one.)
+ */
+
+/**
+ * \brief           The ECP group structure.
+ *
+ * We consider two types of curve equations:
+ * <ul><li>Short Weierstrass: <code>y^2 = x^3 + A x + B mod P</code>
+ * (SEC1 + RFC-4492)</li>
+ * <li>Montgomery: <code>y^2 = x^3 + A x^2 + x mod P</code> (Curve25519,
+ * Curve448)</li></ul>
+ * In both cases, the generator (\p G) for a prime-order subgroup is fixed.
+ *
+ * For Short Weierstrass, this subgroup is the whole curve, and its
+ * cardinality is denoted by \p N. Our code requires that \p N is an
+ * odd prime as mbedtls_ecp_mul() requires an odd number, and
+ * mbedtls_ecdsa_sign() requires that it is prime for blinding purposes.
+ *
+ * For Montgomery curves, we do not store \p A, but <code>(A + 2) / 4</code>,
+ * which is the quantity used in the formulas. Additionally, \p nbits is
+ * not the size of \p N but the required size for private keys.
+ *
+ * If \p modp is NULL, reduction modulo \p P is done using a generic algorithm.
+ * Otherwise, \p modp must point to a function that takes an \p mbedtls_mpi in the
+ * range of <code>0..2^(2*pbits)-1</code>, and transforms it in-place to an integer
+ * which is congruent mod \p P to the given MPI, and is close enough to \p pbits
+ * in size, so that it may be efficiently brought in the 0..P-1 range by a few
+ * additions or subtractions. Therefore, it is only an approximative modular
+ * reduction. It must return 0 on success and non-zero on failure.
+ *
+ * \note        Alternative implementations must keep the group IDs distinct. If
+ *              two group structures have the same ID, then they must be
+ *              identical.
+ *
+ */
+typedef struct mbedtls_ecp_group
+{
+    mbedtls_ecp_group_id id;    /*!< An internal group identifier. */
+    mbedtls_mpi P;              /*!< The prime modulus of the base field. */
+    mbedtls_mpi A;              /*!< For Short Weierstrass: \p A in the equation. For
+                                     Montgomery curves: <code>(A + 2) / 4</code>. */
+    mbedtls_mpi B;              /*!< For Short Weierstrass: \p B in the equation.
+                                     For Montgomery curves: unused. */
+    mbedtls_ecp_point G;        /*!< The generator of the subgroup used. */
+    mbedtls_mpi N;              /*!< The order of \p G. */
+    size_t pbits;               /*!< The number of bits in \p P.*/
+    size_t nbits;               /*!< For Short Weierstrass: The number of bits in \p P.
+                                     For Montgomery curves: the number of bits in the
+                                     private keys. */
+    unsigned int h;             /*!< \internal 1 if the constants are static. */
+    int (*modp)(mbedtls_mpi *); /*!< The function for fast pseudo-reduction
+                                     mod \p P (see above).*/
+    int (*t_pre)(mbedtls_ecp_point *, void *);  /*!< Unused. */
+    int (*t_post)(mbedtls_ecp_point *, void *); /*!< Unused. */
+    void *t_data;               /*!< Unused. */
+    mbedtls_ecp_point *T;       /*!< Pre-computed points for ecp_mul_comb(). */
+    size_t T_size;              /*!< The number of pre-computed points. */
+}
+mbedtls_ecp_group;
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h, or define them using the compiler command line.
+ * \{
+ */
+
+#if defined(MBEDTLS_ECP_MAX_BITS)
+
+#if MBEDTLS_ECP_MAX_BITS < MBEDTLS_ECP_MAX_BITS_MIN
+#error "MBEDTLS_ECP_MAX_BITS is smaller than the largest supported curve"
+#endif
+
+#elif defined(MBEDTLS_ECP_C)
+/**
+ * The maximum size of the groups, that is, of \c N and \c P.
+ */
+#define MBEDTLS_ECP_MAX_BITS     MBEDTLS_ECP_MAX_BITS_MIN
+
+#else
+/* MBEDTLS_ECP_MAX_BITS is not relevant without MBEDTLS_ECP_C, but set it
+ * to a nonzero value so that code that unconditionally allocates an array
+ * of a size based on it keeps working if built without ECC support. */
+#define MBEDTLS_ECP_MAX_BITS 1
+#endif
+
+#define MBEDTLS_ECP_MAX_BYTES    ( ( MBEDTLS_ECP_MAX_BITS + 7 ) / 8 )
+#define MBEDTLS_ECP_MAX_PT_LEN   ( 2 * MBEDTLS_ECP_MAX_BYTES + 1 )
+
+#if !defined(MBEDTLS_ECP_WINDOW_SIZE)
+/*
+ * Maximum "window" size used for point multiplication.
+ * Default: a point where higher memory usage yields disminishing performance
+ *          returns.
+ * Minimum value: 2. Maximum value: 7.
+ *
+ * Result is an array of at most ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) )
+ * points used for point multiplication. This value is directly tied to EC
+ * peak memory usage, so decreasing it by one should roughly cut memory usage
+ * by two (if large curves are in use).
+ *
+ * Reduction in size may reduce speed, but larger curves are impacted first.
+ * Sample performances (in ECDHE handshakes/s, with FIXED_POINT_OPTIM = 1):
+ *      w-size:     6       5       4       3       2
+ *      521       145     141     135     120      97
+ *      384       214     209     198     177     146
+ *      256       320     320     303     262     226
+ *      224       475     475     453     398     342
+ *      192       640     640     633     587     476
+ */
+#define MBEDTLS_ECP_WINDOW_SIZE    4   /**< The maximum window size used. */
+#endif /* MBEDTLS_ECP_WINDOW_SIZE */
+
+#if !defined(MBEDTLS_ECP_FIXED_POINT_OPTIM)
+/*
+ * Trade memory for speed on fixed-point multiplication.
+ *
+ * This speeds up repeated multiplication of the generator (that is, the
+ * multiplication in ECDSA signatures, and half of the multiplications in
+ * ECDSA verification and ECDHE) by a factor roughly 3 to 4.
+ *
+ * The cost is increasing EC peak memory usage by a factor roughly 2.
+ *
+ * Change this value to 0 to reduce peak memory usage.
+ */
+#define MBEDTLS_ECP_FIXED_POINT_OPTIM  1   /**< Enable fixed-point speed-up. */
+#endif /* MBEDTLS_ECP_FIXED_POINT_OPTIM */
+
+/* \} name SECTION: Module settings */
+
+#else  /* MBEDTLS_ECP_ALT */
+#include "ecp_alt.h"
+#endif /* MBEDTLS_ECP_ALT */
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+
+/**
+ * \brief           Internal restart context for multiplication
+ *
+ * \note            Opaque struct
+ */
+typedef struct mbedtls_ecp_restart_mul mbedtls_ecp_restart_mul_ctx;
+
+/**
+ * \brief           Internal restart context for ecp_muladd()
+ *
+ * \note            Opaque struct
+ */
+typedef struct mbedtls_ecp_restart_muladd mbedtls_ecp_restart_muladd_ctx;
+
+/**
+ * \brief           General context for resuming ECC operations
+ */
+typedef struct
+{
+    unsigned ops_done;                  /*!<  current ops count             */
+    unsigned depth;                     /*!<  call depth (0 = top-level)    */
+    mbedtls_ecp_restart_mul_ctx *rsm;   /*!<  ecp_mul_comb() sub-context    */
+    mbedtls_ecp_restart_muladd_ctx *ma; /*!<  ecp_muladd() sub-context      */
+} mbedtls_ecp_restart_ctx;
+
+/*
+ * Operation counts for restartable functions
+ */
+#define MBEDTLS_ECP_OPS_CHK   3 /*!< basic ops count for ecp_check_pubkey()  */
+#define MBEDTLS_ECP_OPS_DBL   8 /*!< basic ops count for ecp_double_jac()    */
+#define MBEDTLS_ECP_OPS_ADD  11 /*!< basic ops count for see ecp_add_mixed() */
+#define MBEDTLS_ECP_OPS_INV 120 /*!< empirical equivalent for mpi_mod_inv()  */
+
+/**
+ * \brief           Internal; for restartable functions in other modules.
+ *                  Check and update basic ops budget.
+ *
+ * \param grp       Group structure
+ * \param rs_ctx    Restart context
+ * \param ops       Number of basic ops to do
+ *
+ * \return          \c 0 if doing \p ops basic ops is still allowed,
+ * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS otherwise.
+ */
+int mbedtls_ecp_check_budget( const mbedtls_ecp_group *grp,
+                              mbedtls_ecp_restart_ctx *rs_ctx,
+                              unsigned ops );
+
+/* Utility macro for checking and updating ops budget */
+#define MBEDTLS_ECP_BUDGET( ops )   \
+    MBEDTLS_MPI_CHK( mbedtls_ecp_check_budget( grp, rs_ctx, \
+                                               (unsigned) (ops) ) );
+
+#else /* MBEDTLS_ECP_RESTARTABLE */
+
+#define MBEDTLS_ECP_BUDGET( ops )   /* no-op; for compatibility */
+
+/* We want to declare restartable versions of existing functions anyway */
+typedef void mbedtls_ecp_restart_ctx;
+
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+/**
+ * \brief    The ECP key-pair structure.
+ *
+ * A generic key-pair that may be used for ECDSA and fixed ECDH, for example.
+ *
+ * \note    Members are deliberately in the same order as in the
+ *          ::mbedtls_ecdsa_context structure.
+ */
+typedef struct mbedtls_ecp_keypair
+{
+    mbedtls_ecp_group grp;      /*!<  Elliptic curve and base point     */
+    mbedtls_mpi d;              /*!<  our secret value                  */
+    mbedtls_ecp_point Q;        /*!<  our public value                  */
+}
+mbedtls_ecp_keypair;
+
+/*
+ * Point formats, from RFC 4492's enum ECPointFormat
+ */
+#define MBEDTLS_ECP_PF_UNCOMPRESSED    0   /**< Uncompressed point format. */
+#define MBEDTLS_ECP_PF_COMPRESSED      1   /**< Compressed point format. */
+
+/*
+ * Some other constants from RFC 4492
+ */
+#define MBEDTLS_ECP_TLS_NAMED_CURVE    3   /**< The named_curve of ECCurveType. */
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief           Set the maximum number of basic operations done in a row.
+ *
+ *                  If more operations are needed to complete a computation,
+ *                  #MBEDTLS_ERR_ECP_IN_PROGRESS will be returned by the
+ *                  function performing the computation. It is then the
+ *                  caller's responsibility to either call again with the same
+ *                  parameters until it returns 0 or an error code; or to free
+ *                  the restart context if the operation is to be aborted.
+ *
+ *                  It is strictly required that all input parameters and the
+ *                  restart context be the same on successive calls for the
+ *                  same operation, but output parameters need not be the
+ *                  same; they must not be used until the function finally
+ *                  returns 0.
+ *
+ *                  This only applies to functions whose documentation
+ *                  mentions they may return #MBEDTLS_ERR_ECP_IN_PROGRESS (or
+ *                  #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS for functions in the
+ *                  SSL module). For functions that accept a "restart context"
+ *                  argument, passing NULL disables restart and makes the
+ *                  function equivalent to the function with the same name
+ *                  with \c _restartable removed. For functions in the ECDH
+ *                  module, restart is disabled unless the function accepts
+ *                  an "ECDH context" argument and
+ *                  mbedtls_ecdh_enable_restart() was previously called on
+ *                  that context. For function in the SSL module, restart is
+ *                  only enabled for specific sides and key exchanges
+ *                  (currently only for clients and ECDHE-ECDSA).
+ *
+ * \param max_ops   Maximum number of basic operations done in a row.
+ *                  Default: 0 (unlimited).
+ *                  Lower (non-zero) values mean ECC functions will block for
+ *                  a lesser maximum amount of time.
+ *
+ * \note            A "basic operation" is defined as a rough equivalent of a
+ *                  multiplication in GF(p) for the NIST P-256 curve.
+ *                  As an indication, with default settings, a scalar
+ *                  multiplication (full run of \c mbedtls_ecp_mul()) is:
+ *                  - about 3300 basic operations for P-256
+ *                  - about 9400 basic operations for P-384
+ *
+ * \note            Very low values are not always respected: sometimes
+ *                  functions need to block for a minimum number of
+ *                  operations, and will do so even if max_ops is set to a
+ *                  lower value.  That minimum depends on the curve size, and
+ *                  can be made lower by decreasing the value of
+ *                  \c MBEDTLS_ECP_WINDOW_SIZE.  As an indication, here is the
+ *                  lowest effective value for various curves and values of
+ *                  that parameter (w for short):
+ *                          w=6     w=5     w=4     w=3     w=2
+ *                  P-256   208     208     160     136     124
+ *                  P-384   682     416     320     272     248
+ *                  P-521  1364     832     640     544     496
+ *
+ * \note            This setting is currently ignored by Curve25519.
+ */
+void mbedtls_ecp_set_max_ops( unsigned max_ops );
+
+/**
+ * \brief           Check if restart is enabled (max_ops != 0)
+ *
+ * \return          \c 0 if \c max_ops == 0 (restart disabled)
+ * \return          \c 1 otherwise (restart enabled)
+ */
+int mbedtls_ecp_restart_is_enabled( void );
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+/*
+ * Get the type of a curve
+ */
+mbedtls_ecp_curve_type mbedtls_ecp_get_type( const mbedtls_ecp_group *grp );
+
+/**
+ * \brief           This function retrieves the information defined in
+ *                  mbedtls_ecp_curve_info() for all supported curves.
+ *
+ * \note            This function returns information about all curves
+ *                  supported by the library. Some curves may not be
+ *                  supported for all algorithms. Call mbedtls_ecdh_can_do()
+ *                  or mbedtls_ecdsa_can_do() to check if a curve is
+ *                  supported for ECDH or ECDSA.
+ *
+ * \return          A statically allocated array. The last entry is 0.
+ */
+const mbedtls_ecp_curve_info *mbedtls_ecp_curve_list( void );
+
+/**
+ * \brief           This function retrieves the list of internal group
+ *                  identifiers of all supported curves in the order of
+ *                  preference.
+ *
+ * \note            This function returns information about all curves
+ *                  supported by the library. Some curves may not be
+ *                  supported for all algorithms. Call mbedtls_ecdh_can_do()
+ *                  or mbedtls_ecdsa_can_do() to check if a curve is
+ *                  supported for ECDH or ECDSA.
+ *
+ * \return          A statically allocated array,
+ *                  terminated with MBEDTLS_ECP_DP_NONE.
+ */
+const mbedtls_ecp_group_id *mbedtls_ecp_grp_id_list( void );
+
+/**
+ * \brief           This function retrieves curve information from an internal
+ *                  group identifier.
+ *
+ * \param grp_id    An \c MBEDTLS_ECP_DP_XXX value.
+ *
+ * \return          The associated curve information on success.
+ * \return          NULL on failure.
+ */
+const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_grp_id( mbedtls_ecp_group_id grp_id );
+
+/**
+ * \brief           This function retrieves curve information from a TLS
+ *                  NamedCurve value.
+ *
+ * \param tls_id    An \c MBEDTLS_ECP_DP_XXX value.
+ *
+ * \return          The associated curve information on success.
+ * \return          NULL on failure.
+ */
+const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_tls_id( uint16_t tls_id );
+
+/**
+ * \brief           This function retrieves curve information from a
+ *                  human-readable name.
+ *
+ * \param name      The human-readable name.
+ *
+ * \return          The associated curve information on success.
+ * \return          NULL on failure.
+ */
+const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_name( const char *name );
+
+/**
+ * \brief           This function initializes a point as zero.
+ *
+ * \param pt        The point to initialize.
+ */
+void mbedtls_ecp_point_init( mbedtls_ecp_point *pt );
+
+/**
+ * \brief           This function initializes an ECP group context
+ *                  without loading any domain parameters.
+ *
+ * \note            After this function is called, domain parameters
+ *                  for various ECP groups can be loaded through the
+ *                  mbedtls_ecp_group_load() or mbedtls_ecp_tls_read_group()
+ *                  functions.
+ */
+void mbedtls_ecp_group_init( mbedtls_ecp_group *grp );
+
+/**
+ * \brief           This function initializes a key pair as an invalid one.
+ *
+ * \param key       The key pair to initialize.
+ */
+void mbedtls_ecp_keypair_init( mbedtls_ecp_keypair *key );
+
+/**
+ * \brief           This function frees the components of a point.
+ *
+ * \param pt        The point to free.
+ */
+void mbedtls_ecp_point_free( mbedtls_ecp_point *pt );
+
+/**
+ * \brief           This function frees the components of an ECP group.
+ *
+ * \param grp       The group to free. This may be \c NULL, in which
+ *                  case this function returns immediately. If it is not
+ *                  \c NULL, it must point to an initialized ECP group.
+ */
+void mbedtls_ecp_group_free( mbedtls_ecp_group *grp );
+
+/**
+ * \brief           This function frees the components of a key pair.
+ *
+ * \param key       The key pair to free. This may be \c NULL, in which
+ *                  case this function returns immediately. If it is not
+ *                  \c NULL, it must point to an initialized ECP key pair.
+ */
+void mbedtls_ecp_keypair_free( mbedtls_ecp_keypair *key );
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief           Initialize a restart context.
+ *
+ * \param ctx       The restart context to initialize. This must
+ *                  not be \c NULL.
+ */
+void mbedtls_ecp_restart_init( mbedtls_ecp_restart_ctx *ctx );
+
+/**
+ * \brief           Free the components of a restart context.
+ *
+ * \param ctx       The restart context to free. This may be \c NULL, in which
+ *                  case this function returns immediately. If it is not
+ *                  \c NULL, it must point to an initialized restart context.
+ */
+void mbedtls_ecp_restart_free( mbedtls_ecp_restart_ctx *ctx );
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+/**
+ * \brief           This function copies the contents of point \p Q into
+ *                  point \p P.
+ *
+ * \param P         The destination point. This must be initialized.
+ * \param Q         The source point. This must be initialized.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          Another negative error code for other kinds of failure.
+ */
+int mbedtls_ecp_copy( mbedtls_ecp_point *P, const mbedtls_ecp_point *Q );
+
+/**
+ * \brief           This function copies the contents of group \p src into
+ *                  group \p dst.
+ *
+ * \param dst       The destination group. This must be initialized.
+ * \param src       The source group. This must be initialized.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_group_copy( mbedtls_ecp_group *dst,
+                            const mbedtls_ecp_group *src );
+
+/**
+ * \brief           This function sets a point to the point at infinity.
+ *
+ * \param pt        The point to set. This must be initialized.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_set_zero( mbedtls_ecp_point *pt );
+
+/**
+ * \brief           This function checks if a point is the point at infinity.
+ *
+ * \param pt        The point to test. This must be initialized.
+ *
+ * \return          \c 1 if the point is zero.
+ * \return          \c 0 if the point is non-zero.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_ecp_is_zero( mbedtls_ecp_point *pt );
+
+/**
+ * \brief           This function compares two points.
+ *
+ * \note            This assumes that the points are normalized. Otherwise,
+ *                  they may compare as "not equal" even if they are.
+ *
+ * \param P         The first point to compare. This must be initialized.
+ * \param Q         The second point to compare. This must be initialized.
+ *
+ * \return          \c 0 if the points are equal.
+ * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the points are not equal.
+ */
+int mbedtls_ecp_point_cmp( const mbedtls_ecp_point *P,
+                           const mbedtls_ecp_point *Q );
+
+/**
+ * \brief           This function imports a non-zero point from two ASCII
+ *                  strings.
+ *
+ * \param P         The destination point. This must be initialized.
+ * \param radix     The numeric base of the input.
+ * \param x         The first affine coordinate, as a null-terminated string.
+ * \param y         The second affine coordinate, as a null-terminated string.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_MPI_XXX error code on failure.
+ */
+int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix,
+                           const char *x, const char *y );
+
+/**
+ * \brief           This function exports a point into unsigned binary data.
+ *
+ * \param grp       The group to which the point should belong.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param P         The point to export. This must be initialized.
+ * \param format    The point format. This must be either
+ *                  #MBEDTLS_ECP_PF_COMPRESSED or #MBEDTLS_ECP_PF_UNCOMPRESSED.
+ *                  (For groups without these formats, this parameter is
+ *                  ignored. But it still has to be either of the above
+ *                  values.)
+ * \param olen      The address at which to store the length of
+ *                  the output in Bytes. This must not be \c NULL.
+ * \param buf       The output buffer. This must be a writable buffer
+ *                  of length \p buflen Bytes.
+ * \param buflen    The length of the output buffer \p buf in Bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the output buffer
+ *                  is too small to hold the point.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the point format
+ *                  or the export for the given group is not implemented.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp,
+                                    const mbedtls_ecp_point *P,
+                                    int format, size_t *olen,
+                                    unsigned char *buf, size_t buflen );
+
+/**
+ * \brief           This function imports a point from unsigned binary data.
+ *
+ * \note            This function does not check that the point actually
+ *                  belongs to the given group, see mbedtls_ecp_check_pubkey()
+ *                  for that.
+ *
+ * \param grp       The group to which the point should belong.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param P         The destination context to import the point to.
+ *                  This must be initialized.
+ * \param buf       The input buffer. This must be a readable buffer
+ *                  of length \p ilen Bytes.
+ * \param ilen      The length of the input buffer \p buf in Bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the input is invalid.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the import for the
+ *                  given group is not implemented.
+ */
+int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp,
+                                   mbedtls_ecp_point *P,
+                                   const unsigned char *buf, size_t ilen );
+
+/**
+ * \brief           This function imports a point from a TLS ECPoint record.
+ *
+ * \note            On function return, \p *buf is updated to point immediately
+ *                  after the ECPoint record.
+ *
+ * \param grp       The ECP group to use.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param pt        The destination point.
+ * \param buf       The address of the pointer to the start of the input buffer.
+ * \param len       The length of the buffer.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_MPI_XXX error code on initialization
+ *                  failure.
+ * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid.
+ */
+int mbedtls_ecp_tls_read_point( const mbedtls_ecp_group *grp,
+                                mbedtls_ecp_point *pt,
+                                const unsigned char **buf, size_t len );
+
+/**
+ * \brief           This function exports a point as a TLS ECPoint record
+ *                  defined in RFC 4492, Section 5.4.
+ *
+ * \param grp       The ECP group to use.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param pt        The point to be exported. This must be initialized.
+ * \param format    The point format to use. This must be either
+ *                  #MBEDTLS_ECP_PF_COMPRESSED or #MBEDTLS_ECP_PF_UNCOMPRESSED.
+ * \param olen      The address at which to store the length in Bytes
+ *                  of the data written.
+ * \param buf       The target buffer. This must be a writable buffer of
+ *                  length \p blen Bytes.
+ * \param blen      The length of the target buffer \p buf in Bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the input is invalid.
+ * \return          #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the target buffer
+ *                  is too small to hold the exported point.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_tls_write_point( const mbedtls_ecp_group *grp,
+                                 const mbedtls_ecp_point *pt,
+                                 int format, size_t *olen,
+                                 unsigned char *buf, size_t blen );
+
+/**
+ * \brief           This function sets up an ECP group context
+ *                  from a standardized set of domain parameters.
+ *
+ * \note            The index should be a value of the NamedCurve enum,
+ *                  as defined in <em>RFC-4492: Elliptic Curve Cryptography
+ *                  (ECC) Cipher Suites for Transport Layer Security (TLS)</em>,
+ *                  usually in the form of an \c MBEDTLS_ECP_DP_XXX macro.
+ *
+ * \param grp       The group context to setup. This must be initialized.
+ * \param id        The identifier of the domain parameter set to load.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p id doesn't
+ *                  correspond to a known group.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_group_load( mbedtls_ecp_group *grp, mbedtls_ecp_group_id id );
+
+/**
+ * \brief           This function sets up an ECP group context from a TLS
+ *                  ECParameters record as defined in RFC 4492, Section 5.4.
+ *
+ * \note            The read pointer \p buf is updated to point right after
+ *                  the ECParameters record on exit.
+ *
+ * \param grp       The group context to setup. This must be initialized.
+ * \param buf       The address of the pointer to the start of the input buffer.
+ * \param len       The length of the input buffer \c *buf in Bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the group is not
+ *                  recognized.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_tls_read_group( mbedtls_ecp_group *grp,
+                                const unsigned char **buf, size_t len );
+
+/**
+ * \brief           This function extracts an elliptic curve group ID from a
+ *                  TLS ECParameters record as defined in RFC 4492, Section 5.4.
+ *
+ * \note            The read pointer \p buf is updated to point right after
+ *                  the ECParameters record on exit.
+ *
+ * \param grp       The address at which to store the group id.
+ *                  This must not be \c NULL.
+ * \param buf       The address of the pointer to the start of the input buffer.
+ * \param len       The length of the input buffer \c *buf in Bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the group is not
+ *                  recognized.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_tls_read_group_id( mbedtls_ecp_group_id *grp,
+                                   const unsigned char **buf,
+                                   size_t len );
+/**
+ * \brief           This function exports an elliptic curve as a TLS
+ *                  ECParameters record as defined in RFC 4492, Section 5.4.
+ *
+ * \param grp       The ECP group to be exported.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param olen      The address at which to store the number of Bytes written.
+ *                  This must not be \c NULL.
+ * \param buf       The buffer to write to. This must be a writable buffer
+ *                  of length \p blen Bytes.
+ * \param blen      The length of the output buffer \p buf in Bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the output
+ *                  buffer is too small to hold the exported group.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_tls_write_group( const mbedtls_ecp_group *grp,
+                                 size_t *olen,
+                                 unsigned char *buf, size_t blen );
+
+/**
+ * \brief           This function performs a scalar multiplication of a point
+ *                  by an integer: \p R = \p m * \p P.
+ *
+ *                  It is not thread-safe to use same group in multiple threads.
+ *
+ * \note            To prevent timing attacks, this function
+ *                  executes the exact same sequence of base-field
+ *                  operations for any valid \p m. It avoids any if-branch or
+ *                  array index depending on the value of \p m.
+ *
+ * \note            If \p f_rng is not NULL, it is used to randomize
+ *                  intermediate results to prevent potential timing attacks
+ *                  targeting these results. We recommend always providing
+ *                  a non-NULL \p f_rng. The overhead is negligible.
+ *                  Note: unless #MBEDTLS_ECP_NO_INTERNAL_RNG is defined, when
+ *                  \p f_rng is NULL, an internal RNG (seeded from the value
+ *                  of \p m) will be used instead.
+ *
+ * \param grp       The ECP group to use.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param R         The point in which to store the result of the calculation.
+ *                  This must be initialized.
+ * \param m         The integer by which to multiply. This must be initialized.
+ * \param P         The point to multiply. This must be initialized.
+ * \param f_rng     The RNG function. This may be \c NULL if randomization
+ *                  of intermediate results isn't desired (discouraged).
+ * \param p_rng     The RNG context to be passed to \p p_rng.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_INVALID_KEY if \p m is not a valid private
+ *                  key, or \p P is not a valid public key.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_mul( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
+             const mbedtls_mpi *m, const mbedtls_ecp_point *P,
+             int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+/**
+ * \brief           This function performs multiplication of a point by
+ *                  an integer: \p R = \p m * \p P in a restartable way.
+ *
+ * \see             mbedtls_ecp_mul()
+ *
+ * \note            This function does the same as \c mbedtls_ecp_mul(), but
+ *                  it can return early and restart according to the limit set
+ *                  with \c mbedtls_ecp_set_max_ops() to reduce blocking.
+ *
+ * \param grp       The ECP group to use.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param R         The point in which to store the result of the calculation.
+ *                  This must be initialized.
+ * \param m         The integer by which to multiply. This must be initialized.
+ * \param P         The point to multiply. This must be initialized.
+ * \param f_rng     The RNG function. This may be \c NULL if randomization
+ *                  of intermediate results isn't desired (discouraged).
+ * \param p_rng     The RNG context to be passed to \p p_rng.
+ * \param rs_ctx    The restart context (NULL disables restart).
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_INVALID_KEY if \p m is not a valid private
+ *                  key, or \p P is not a valid public key.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
+             const mbedtls_mpi *m, const mbedtls_ecp_point *P,
+             int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+             mbedtls_ecp_restart_ctx *rs_ctx );
+
+#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED)
+/**
+ * \brief           This function performs multiplication and addition of two
+ *                  points by integers: \p R = \p m * \p P + \p n * \p Q
+ *
+ *                  It is not thread-safe to use same group in multiple threads.
+ *
+ * \note            In contrast to mbedtls_ecp_mul(), this function does not
+ *                  guarantee a constant execution flow and timing.
+ *
+ * \note            This function is only defined for short Weierstrass curves.
+ *                  It may not be included in builds without any short
+ *                  Weierstrass curve.
+ *
+ * \param grp       The ECP group to use.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param R         The point in which to store the result of the calculation.
+ *                  This must be initialized.
+ * \param m         The integer by which to multiply \p P.
+ *                  This must be initialized.
+ * \param P         The point to multiply by \p m. This must be initialized.
+ * \param n         The integer by which to multiply \p Q.
+ *                  This must be initialized.
+ * \param Q         The point to be multiplied by \p n.
+ *                  This must be initialized.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_INVALID_KEY if \p m or \p n are not
+ *                  valid private keys, or \p P or \p Q are not valid public
+ *                  keys.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p grp does not
+ *                  designate a short Weierstrass curve.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
+             const mbedtls_mpi *m, const mbedtls_ecp_point *P,
+             const mbedtls_mpi *n, const mbedtls_ecp_point *Q );
+
+/**
+ * \brief           This function performs multiplication and addition of two
+ *                  points by integers: \p R = \p m * \p P + \p n * \p Q in a
+ *                  restartable way.
+ *
+ * \see             \c mbedtls_ecp_muladd()
+ *
+ * \note            This function works the same as \c mbedtls_ecp_muladd(),
+ *                  but it can return early and restart according to the limit
+ *                  set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
+ *
+ * \note            This function is only defined for short Weierstrass curves.
+ *                  It may not be included in builds without any short
+ *                  Weierstrass curve.
+ *
+ * \param grp       The ECP group to use.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param R         The point in which to store the result of the calculation.
+ *                  This must be initialized.
+ * \param m         The integer by which to multiply \p P.
+ *                  This must be initialized.
+ * \param P         The point to multiply by \p m. This must be initialized.
+ * \param n         The integer by which to multiply \p Q.
+ *                  This must be initialized.
+ * \param Q         The point to be multiplied by \p n.
+ *                  This must be initialized.
+ * \param rs_ctx    The restart context (NULL disables restart).
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_INVALID_KEY if \p m or \p n are not
+ *                  valid private keys, or \p P or \p Q are not valid public
+ *                  keys.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p grp does not
+ *                  designate a short Weierstrass curve.
+ * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_muladd_restartable(
+             mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
+             const mbedtls_mpi *m, const mbedtls_ecp_point *P,
+             const mbedtls_mpi *n, const mbedtls_ecp_point *Q,
+             mbedtls_ecp_restart_ctx *rs_ctx );
+#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */
+
+/**
+ * \brief           This function checks that a point is a valid public key
+ *                  on this curve.
+ *
+ *                  It only checks that the point is non-zero, has
+ *                  valid coordinates and lies on the curve. It does not verify
+ *                  that it is indeed a multiple of \p G. This additional
+ *                  check is computationally more expensive, is not required
+ *                  by standards, and should not be necessary if the group
+ *                  used has a small cofactor. In particular, it is useless for
+ *                  the NIST groups which all have a cofactor of 1.
+ *
+ * \note            This function uses bare components rather than an
+ *                  ::mbedtls_ecp_keypair structure, to ease use with other
+ *                  structures, such as ::mbedtls_ecdh_context or
+ *                  ::mbedtls_ecdsa_context.
+ *
+ * \param grp       The ECP group the point should belong to.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param pt        The point to check. This must be initialized.
+ *
+ * \return          \c 0 if the point is a valid public key.
+ * \return          #MBEDTLS_ERR_ECP_INVALID_KEY if the point is not
+ *                  a valid public key for the given curve.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_check_pubkey( const mbedtls_ecp_group *grp,
+                              const mbedtls_ecp_point *pt );
+
+/**
+ * \brief           This function checks that an \p mbedtls_mpi is a
+ *                  valid private key for this curve.
+ *
+ * \note            This function uses bare components rather than an
+ *                  ::mbedtls_ecp_keypair structure to ease use with other
+ *                  structures, such as ::mbedtls_ecdh_context or
+ *                  ::mbedtls_ecdsa_context.
+ *
+ * \param grp       The ECP group the private key should belong to.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param d         The integer to check. This must be initialized.
+ *
+ * \return          \c 0 if the point is a valid private key.
+ * \return          #MBEDTLS_ERR_ECP_INVALID_KEY if the point is not a valid
+ *                  private key for the given curve.
+ * \return          Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_check_privkey( const mbedtls_ecp_group *grp,
+                               const mbedtls_mpi *d );
+
+/**
+ * \brief           This function generates a private key.
+ *
+ * \param grp       The ECP group to generate a private key for.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param d         The destination MPI (secret part). This must be initialized.
+ * \param f_rng     The RNG function. This must not be \c NULL.
+ * \param p_rng     The RNG parameter to be passed to \p f_rng. This may be
+ *                  \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code
+ *                  on failure.
+ */
+int mbedtls_ecp_gen_privkey( const mbedtls_ecp_group *grp,
+                     mbedtls_mpi *d,
+                     int (*f_rng)(void *, unsigned char *, size_t),
+                     void *p_rng );
+
+/**
+ * \brief           This function generates a keypair with a configurable base
+ *                  point.
+ *
+ * \note            This function uses bare components rather than an
+ *                  ::mbedtls_ecp_keypair structure to ease use with other
+ *                  structures, such as ::mbedtls_ecdh_context or
+ *                  ::mbedtls_ecdsa_context.
+ *
+ * \param grp       The ECP group to generate a key pair for.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param G         The base point to use. This must be initialized
+ *                  and belong to \p grp. It replaces the default base
+ *                  point \c grp->G used by mbedtls_ecp_gen_keypair().
+ * \param d         The destination MPI (secret part).
+ *                  This must be initialized.
+ * \param Q         The destination point (public part).
+ *                  This must be initialized.
+ * \param f_rng     The RNG function. This must not be \c NULL.
+ * \param p_rng     The RNG context to be passed to \p f_rng. This may
+ *                  be \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code
+ *                  on failure.
+ */
+int mbedtls_ecp_gen_keypair_base( mbedtls_ecp_group *grp,
+                                  const mbedtls_ecp_point *G,
+                                  mbedtls_mpi *d, mbedtls_ecp_point *Q,
+                                  int (*f_rng)(void *, unsigned char *, size_t),
+                                  void *p_rng );
+
+/**
+ * \brief           This function generates an ECP keypair.
+ *
+ * \note            This function uses bare components rather than an
+ *                  ::mbedtls_ecp_keypair structure to ease use with other
+ *                  structures, such as ::mbedtls_ecdh_context or
+ *                  ::mbedtls_ecdsa_context.
+ *
+ * \param grp       The ECP group to generate a key pair for.
+ *                  This must be initialized and have group parameters
+ *                  set, for example through mbedtls_ecp_group_load().
+ * \param d         The destination MPI (secret part).
+ *                  This must be initialized.
+ * \param Q         The destination point (public part).
+ *                  This must be initialized.
+ * \param f_rng     The RNG function. This must not be \c NULL.
+ * \param p_rng     The RNG context to be passed to \p f_rng. This may
+ *                  be \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code
+ *                  on failure.
+ */
+int mbedtls_ecp_gen_keypair( mbedtls_ecp_group *grp, mbedtls_mpi *d,
+                             mbedtls_ecp_point *Q,
+                             int (*f_rng)(void *, unsigned char *, size_t),
+                             void *p_rng );
+
+/**
+ * \brief           This function generates an ECP key.
+ *
+ * \param grp_id    The ECP group identifier.
+ * \param key       The destination key. This must be initialized.
+ * \param f_rng     The RNG function to use. This must not be \c NULL.
+ * \param p_rng     The RNG context to be passed to \p f_rng. This may
+ *                  be \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return          \c 0 on success.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code
+ *                  on failure.
+ */
+int mbedtls_ecp_gen_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key,
+                         int (*f_rng)(void *, unsigned char *, size_t),
+                         void *p_rng );
+
+/**
+ * \brief           This function reads an elliptic curve private key.
+ *
+ * \param grp_id    The ECP group identifier.
+ * \param key       The destination key.
+ * \param buf       The buffer containing the binary representation of the
+ *                  key. (Big endian integer for Weierstrass curves, byte
+ *                  string for Montgomery curves.)
+ * \param buflen    The length of the buffer in bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_INVALID_KEY error if the key is
+ *                  invalid.
+ * \return          #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the operation for
+ *                  the group is not implemented.
+ * \return          Another negative error code on different kinds of failure.
+ */
+int mbedtls_ecp_read_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key,
+                          const unsigned char *buf, size_t buflen );
+
+/**
+ * \brief           This function exports an elliptic curve private key.
+ *
+ * \param key       The private key.
+ * \param buf       The output buffer for containing the binary representation
+ *                  of the key. (Big endian integer for Weierstrass curves, byte
+ *                  string for Montgomery curves.)
+ * \param buflen    The total length of the buffer in bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the \p key
+                    representation is larger than the available space in \p buf.
+ * \return          #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the operation for
+ *                  the group is not implemented.
+ * \return          Another negative error code on different kinds of failure.
+ */
+int mbedtls_ecp_write_key( mbedtls_ecp_keypair *key,
+                           unsigned char *buf, size_t buflen );
+
+/**
+ * \brief           This function checks that the keypair objects
+ *                  \p pub and \p prv have the same group and the
+ *                  same public point, and that the private key in
+ *                  \p prv is consistent with the public key.
+ *
+ * \param pub       The keypair structure holding the public key. This
+ *                  must be initialized. If it contains a private key, that
+ *                  part is ignored.
+ * \param prv       The keypair structure holding the full keypair.
+ *                  This must be initialized.
+ *
+ * \return          \c 0 on success, meaning that the keys are valid and match.
+ * \return          #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the keys are invalid or do not match.
+ * \return          An \c MBEDTLS_ERR_ECP_XXX or an \c MBEDTLS_ERR_MPI_XXX
+ *                  error code on calculation failure.
+ */
+int mbedtls_ecp_check_pub_priv( const mbedtls_ecp_keypair *pub,
+                                const mbedtls_ecp_keypair *prv );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          The ECP checkup routine.
+ *
+ * \return         \c 0 on success.
+ * \return         \c 1 on failure.
+ */
+int mbedtls_ecp_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ecp.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h
new file mode 100644
index 00000000000..6a47a8ff27e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ecp_internal.h
@@ -0,0 +1,297 @@
+/**
+ * \file ecp_internal.h
+ *
+ * \brief Function declarations for alternative implementation of elliptic curve
+ * point arithmetic.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+/*
+ * References:
+ *
+ * [1] BERNSTEIN, Daniel J. Curve25519: new Diffie-Hellman speed records.
+ *     <http://cr.yp.to/ecdh/curve25519-20060209.pdf>
+ *
+ * [2] CORON, Jean-S'ebastien. Resistance against differential power analysis
+ *     for elliptic curve cryptosystems. In : Cryptographic Hardware and
+ *     Embedded Systems. Springer Berlin Heidelberg, 1999. p. 292-302.
+ *     <http://link.springer.com/chapter/10.1007/3-540-48059-5_25>
+ *
+ * [3] HEDABOU, Mustapha, PINEL, Pierre, et B'EN'ETEAU, Lucien. A comb method to
+ *     render ECC resistant against Side Channel Attacks. IACR Cryptology
+ *     ePrint Archive, 2004, vol. 2004, p. 342.
+ *     <http://eprint.iacr.org/2004/342.pdf>
+ *
+ * [4] Certicom Research. SEC 2: Recommended Elliptic Curve Domain Parameters.
+ *     <http://www.secg.org/sec2-v2.pdf>
+ *
+ * [5] HANKERSON, Darrel, MENEZES, Alfred J., VANSTONE, Scott. Guide to Elliptic
+ *     Curve Cryptography.
+ *
+ * [6] Digital Signature Standard (DSS), FIPS 186-4.
+ *     <http://nvlpubs.nist.gov/nistpubs/FIPS/NIST.FIPS.186-4.pdf>
+ *
+ * [7] Elliptic Curve Cryptography (ECC) Cipher Suites for Transport Layer
+ *     Security (TLS), RFC 4492.
+ *     <https://tools.ietf.org/search/rfc4492>
+ *
+ * [8] <http://www.hyperelliptic.org/EFD/g1p/auto-shortw-jacobian.html>
+ *
+ * [9] COHEN, Henri. A Course in Computational Algebraic Number Theory.
+ *     Springer Science & Business Media, 1 Aug 2000
+ */
+
+#ifndef MBEDTLS_ECP_INTERNAL_H
+#define MBEDTLS_ECP_INTERNAL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_ECP_INTERNAL_ALT)
+
+/**
+ * \brief           Indicate if the Elliptic Curve Point module extension can
+ *                  handle the group.
+ *
+ * \param grp       The pointer to the elliptic curve group that will be the
+ *                  basis of the cryptographic computations.
+ *
+ * \return          Non-zero if successful.
+ */
+unsigned char mbedtls_internal_ecp_grp_capable( const mbedtls_ecp_group *grp );
+
+/**
+ * \brief           Initialise the Elliptic Curve Point module extension.
+ *
+ *                  If mbedtls_internal_ecp_grp_capable returns true for a
+ *                  group, this function has to be able to initialise the
+ *                  module for it.
+ *
+ *                  This module can be a driver to a crypto hardware
+ *                  accelerator, for which this could be an initialise function.
+ *
+ * \param grp       The pointer to the group the module needs to be
+ *                  initialised for.
+ *
+ * \return          0 if successful.
+ */
+int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp );
+
+/**
+ * \brief           Frees and deallocates the Elliptic Curve Point module
+ *                  extension.
+ *
+ * \param grp       The pointer to the group the module was initialised for.
+ */
+void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp );
+
+#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED)
+
+#if defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT)
+/**
+ * \brief           Randomize jacobian coordinates:
+ *                  (X, Y, Z) -> (l^2 X, l^3 Y, l Z) for random l.
+ *
+ * \param grp       Pointer to the group representing the curve.
+ *
+ * \param pt        The point on the curve to be randomised, given with Jacobian
+ *                  coordinates.
+ *
+ * \param f_rng     A function pointer to the random number generator.
+ *
+ * \param p_rng     A pointer to the random number generator state.
+ *
+ * \return          0 if successful.
+ */
+int mbedtls_internal_ecp_randomize_jac( const mbedtls_ecp_group *grp,
+        mbedtls_ecp_point *pt, int (*f_rng)(void *, unsigned char *, size_t),
+        void *p_rng );
+#endif
+
+#if defined(MBEDTLS_ECP_ADD_MIXED_ALT)
+/**
+ * \brief           Addition: R = P + Q, mixed affine-Jacobian coordinates.
+ *
+ *                  The coordinates of Q must be normalized (= affine),
+ *                  but those of P don't need to. R is not normalized.
+ *
+ *                  This function is used only as a subrutine of
+ *                  ecp_mul_comb().
+ *
+ *                  Special cases: (1) P or Q is zero, (2) R is zero,
+ *                      (3) P == Q.
+ *                  None of these cases can happen as intermediate step in
+ *                  ecp_mul_comb():
+ *                      - at each step, P, Q and R are multiples of the base
+ *                      point, the factor being less than its order, so none of
+ *                      them is zero;
+ *                      - Q is an odd multiple of the base point, P an even
+ *                      multiple, due to the choice of precomputed points in the
+ *                      modified comb method.
+ *                  So branches for these cases do not leak secret information.
+ *
+ *                  We accept Q->Z being unset (saving memory in tables) as
+ *                  meaning 1.
+ *
+ *                  Cost in field operations if done by [5] 3.22:
+ *                      1A := 8M + 3S
+ *
+ * \param grp       Pointer to the group representing the curve.
+ *
+ * \param R         Pointer to a point structure to hold the result.
+ *
+ * \param P         Pointer to the first summand, given with Jacobian
+ *                  coordinates
+ *
+ * \param Q         Pointer to the second summand, given with affine
+ *                  coordinates.
+ *
+ * \return          0 if successful.
+ */
+int mbedtls_internal_ecp_add_mixed( const mbedtls_ecp_group *grp,
+        mbedtls_ecp_point *R, const mbedtls_ecp_point *P,
+        const mbedtls_ecp_point *Q );
+#endif
+
+/**
+ * \brief           Point doubling R = 2 P, Jacobian coordinates.
+ *
+ *                  Cost:   1D := 3M + 4S    (A ==  0)
+ *                          4M + 4S          (A == -3)
+ *                          3M + 6S + 1a     otherwise
+ *                  when the implementation is based on the "dbl-1998-cmo-2"
+ *                  doubling formulas in [8] and standard optimizations are
+ *                  applied when curve parameter A is one of { 0, -3 }.
+ *
+ * \param grp       Pointer to the group representing the curve.
+ *
+ * \param R         Pointer to a point structure to hold the result.
+ *
+ * \param P         Pointer to the point that has to be doubled, given with
+ *                  Jacobian coordinates.
+ *
+ * \return          0 if successful.
+ */
+#if defined(MBEDTLS_ECP_DOUBLE_JAC_ALT)
+int mbedtls_internal_ecp_double_jac( const mbedtls_ecp_group *grp,
+        mbedtls_ecp_point *R, const mbedtls_ecp_point *P );
+#endif
+
+/**
+ * \brief           Normalize jacobian coordinates of an array of (pointers to)
+ *                  points.
+ *
+ *                  Using Montgomery's trick to perform only one inversion mod P
+ *                  the cost is:
+ *                      1N(t) := 1I + (6t - 3)M + 1S
+ *                  (See for example Algorithm 10.3.4. in [9])
+ *
+ *                  This function is used only as a subrutine of
+ *                  ecp_mul_comb().
+ *
+ *                  Warning: fails (returning an error) if one of the points is
+ *                  zero!
+ *                  This should never happen, see choice of w in ecp_mul_comb().
+ *
+ * \param grp       Pointer to the group representing the curve.
+ *
+ * \param T         Array of pointers to the points to normalise.
+ *
+ * \param t_len     Number of elements in the array.
+ *
+ * \return          0 if successful,
+ *                      an error if one of the points is zero.
+ */
+#if defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT)
+int mbedtls_internal_ecp_normalize_jac_many( const mbedtls_ecp_group *grp,
+        mbedtls_ecp_point *T[], size_t t_len );
+#endif
+
+/**
+ * \brief           Normalize jacobian coordinates so that Z == 0 || Z == 1.
+ *
+ *                  Cost in field operations if done by [5] 3.2.1:
+ *                      1N := 1I + 3M + 1S
+ *
+ * \param grp       Pointer to the group representing the curve.
+ *
+ * \param pt        pointer to the point to be normalised. This is an
+ *                  input/output parameter.
+ *
+ * \return          0 if successful.
+ */
+#if defined(MBEDTLS_ECP_NORMALIZE_JAC_ALT)
+int mbedtls_internal_ecp_normalize_jac( const mbedtls_ecp_group *grp,
+        mbedtls_ecp_point *pt );
+#endif
+
+#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */
+
+#if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED)
+
+#if defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT)
+int mbedtls_internal_ecp_double_add_mxz( const mbedtls_ecp_group *grp,
+        mbedtls_ecp_point *R, mbedtls_ecp_point *S, const mbedtls_ecp_point *P,
+        const mbedtls_ecp_point *Q, const mbedtls_mpi *d );
+#endif
+
+/**
+ * \brief           Randomize projective x/z coordinates:
+ *                      (X, Z) -> (l X, l Z) for random l
+ *
+ * \param grp       pointer to the group representing the curve
+ *
+ * \param P         the point on the curve to be randomised given with
+ *                  projective coordinates. This is an input/output parameter.
+ *
+ * \param f_rng     a function pointer to the random number generator
+ *
+ * \param p_rng     a pointer to the random number generator state
+ *
+ * \return          0 if successful
+ */
+#if defined(MBEDTLS_ECP_RANDOMIZE_MXZ_ALT)
+int mbedtls_internal_ecp_randomize_mxz( const mbedtls_ecp_group *grp,
+        mbedtls_ecp_point *P, int (*f_rng)(void *, unsigned char *, size_t),
+        void *p_rng );
+#endif
+
+/**
+ * \brief           Normalize Montgomery x/z coordinates: X = X/Z, Z = 1.
+ *
+ * \param grp       pointer to the group representing the curve
+ *
+ * \param P         pointer to the point to be normalised. This is an
+ *                  input/output parameter.
+ *
+ * \return          0 if successful
+ */
+#if defined(MBEDTLS_ECP_NORMALIZE_MXZ_ALT)
+int mbedtls_internal_ecp_normalize_mxz( const mbedtls_ecp_group *grp,
+        mbedtls_ecp_point *P );
+#endif
+
+#endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */
+
+#endif /* MBEDTLS_ECP_INTERNAL_ALT */
+
+#endif /* ecp_internal.h */
+
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/entropy.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/entropy.h
new file mode 100644
index 00000000000..deb3c50300b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/entropy.h
@@ -0,0 +1,294 @@
+/**
+ * \file entropy.h
+ *
+ * \brief Entropy accumulator implementation
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_ENTROPY_H
+#define MBEDTLS_ENTROPY_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+#if defined(MBEDTLS_SHA512_C) && !defined(MBEDTLS_ENTROPY_FORCE_SHA256)
+#include "mbedtls/sha512.h"
+#define MBEDTLS_ENTROPY_SHA512_ACCUMULATOR
+#else
+#if defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_ENTROPY_SHA256_ACCUMULATOR
+#include "mbedtls/sha256.h"
+#endif
+#endif
+
+#if defined(MBEDTLS_THREADING_C)
+#include "mbedtls/threading.h"
+#endif
+
+#if defined(MBEDTLS_HAVEGE_C)
+#include "mbedtls/havege.h"
+#endif
+
+/** Critical entropy source failure. */
+#define MBEDTLS_ERR_ENTROPY_SOURCE_FAILED                 -0x003C
+/** No more sources can be added. */
+#define MBEDTLS_ERR_ENTROPY_MAX_SOURCES                   -0x003E
+/** No sources have been added to poll. */
+#define MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED            -0x0040
+/** No strong sources have been added to poll. */
+#define MBEDTLS_ERR_ENTROPY_NO_STRONG_SOURCE              -0x003D
+/** Read/write error in file. */
+#define MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR                 -0x003F
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_ENTROPY_MAX_SOURCES)
+#define MBEDTLS_ENTROPY_MAX_SOURCES     20      /**< Maximum number of sources supported */
+#endif
+
+#if !defined(MBEDTLS_ENTROPY_MAX_GATHER)
+#define MBEDTLS_ENTROPY_MAX_GATHER      128     /**< Maximum amount requested from entropy sources */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR)
+#define MBEDTLS_ENTROPY_BLOCK_SIZE      64      /**< Block size of entropy accumulator (SHA-512) */
+#else
+#define MBEDTLS_ENTROPY_BLOCK_SIZE      32      /**< Block size of entropy accumulator (SHA-256) */
+#endif
+
+#define MBEDTLS_ENTROPY_MAX_SEED_SIZE   1024    /**< Maximum size of seed we read from seed file */
+#define MBEDTLS_ENTROPY_SOURCE_MANUAL   MBEDTLS_ENTROPY_MAX_SOURCES
+
+#define MBEDTLS_ENTROPY_SOURCE_STRONG   1       /**< Entropy source is strong   */
+#define MBEDTLS_ENTROPY_SOURCE_WEAK     0       /**< Entropy source is weak     */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief           Entropy poll callback pointer
+ *
+ * \param data      Callback-specific data pointer
+ * \param output    Data to fill
+ * \param len       Maximum size to provide
+ * \param olen      The actual amount of bytes put into the buffer (Can be 0)
+ *
+ * \return          0 if no critical failures occurred,
+ *                  MBEDTLS_ERR_ENTROPY_SOURCE_FAILED otherwise
+ */
+typedef int (*mbedtls_entropy_f_source_ptr)(void *data, unsigned char *output, size_t len,
+                            size_t *olen);
+
+/**
+ * \brief           Entropy source state
+ */
+typedef struct mbedtls_entropy_source_state
+{
+    mbedtls_entropy_f_source_ptr    f_source;   /**< The entropy source callback */
+    void *          p_source;   /**< The callback data pointer */
+    size_t          size;       /**< Amount received in bytes */
+    size_t          threshold;  /**< Minimum bytes required before release */
+    int             strong;     /**< Is the source strong? */
+}
+mbedtls_entropy_source_state;
+
+/**
+ * \brief           Entropy context structure
+ */
+typedef struct mbedtls_entropy_context
+{
+    int accumulator_started; /* 0 after init.
+                              * 1 after the first update.
+                              * -1 after free. */
+#if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR)
+    mbedtls_sha512_context  accumulator;
+#elif defined(MBEDTLS_ENTROPY_SHA256_ACCUMULATOR)
+    mbedtls_sha256_context  accumulator;
+#endif
+    int             source_count; /* Number of entries used in source. */
+    mbedtls_entropy_source_state    source[MBEDTLS_ENTROPY_MAX_SOURCES];
+#if defined(MBEDTLS_HAVEGE_C)
+    mbedtls_havege_state    havege_data;
+#endif
+#if defined(MBEDTLS_THREADING_C)
+    mbedtls_threading_mutex_t mutex;    /*!< mutex                  */
+#endif
+#if defined(MBEDTLS_ENTROPY_NV_SEED)
+    int initial_entropy_run;
+#endif
+}
+mbedtls_entropy_context;
+
+/**
+ * \brief           Initialize the context
+ *
+ * \param ctx       Entropy context to initialize
+ */
+void mbedtls_entropy_init( mbedtls_entropy_context *ctx );
+
+/**
+ * \brief           Free the data in the context
+ *
+ * \param ctx       Entropy context to free
+ */
+void mbedtls_entropy_free( mbedtls_entropy_context *ctx );
+
+/**
+ * \brief           Adds an entropy source to poll
+ *                  (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param ctx       Entropy context
+ * \param f_source  Entropy function
+ * \param p_source  Function data
+ * \param threshold Minimum required from source before entropy is released
+ *                  ( with mbedtls_entropy_func() ) (in bytes)
+ * \param strong    MBEDTLS_ENTROPY_SOURCE_STRONG or
+ *                  MBEDTLS_ENTROPY_SOURCE_WEAK.
+ *                  At least one strong source needs to be added.
+ *                  Weaker sources (such as the cycle counter) can be used as
+ *                  a complement.
+ *
+ * \return          0 if successful or MBEDTLS_ERR_ENTROPY_MAX_SOURCES
+ */
+int mbedtls_entropy_add_source( mbedtls_entropy_context *ctx,
+                        mbedtls_entropy_f_source_ptr f_source, void *p_source,
+                        size_t threshold, int strong );
+
+/**
+ * \brief           Trigger an extra gather poll for the accumulator
+ *                  (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param ctx       Entropy context
+ *
+ * \return          0 if successful, or MBEDTLS_ERR_ENTROPY_SOURCE_FAILED
+ */
+int mbedtls_entropy_gather( mbedtls_entropy_context *ctx );
+
+/**
+ * \brief           Retrieve entropy from the accumulator
+ *                  (Maximum length: MBEDTLS_ENTROPY_BLOCK_SIZE)
+ *                  (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param data      Entropy context
+ * \param output    Buffer to fill
+ * \param len       Number of bytes desired, must be at most MBEDTLS_ENTROPY_BLOCK_SIZE
+ *
+ * \return          0 if successful, or MBEDTLS_ERR_ENTROPY_SOURCE_FAILED
+ */
+int mbedtls_entropy_func( void *data, unsigned char *output, size_t len );
+
+/**
+ * \brief           Add data to the accumulator manually
+ *                  (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param ctx       Entropy context
+ * \param data      Data to add
+ * \param len       Length of data
+ *
+ * \return          0 if successful
+ */
+int mbedtls_entropy_update_manual( mbedtls_entropy_context *ctx,
+                           const unsigned char *data, size_t len );
+
+#if defined(MBEDTLS_ENTROPY_NV_SEED)
+/**
+ * \brief           Trigger an update of the seed file in NV by using the
+ *                  current entropy pool.
+ *
+ * \param ctx       Entropy context
+ *
+ * \return          0 if successful
+ */
+int mbedtls_entropy_update_nv_seed( mbedtls_entropy_context *ctx );
+#endif /* MBEDTLS_ENTROPY_NV_SEED */
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief               Write a seed file
+ *
+ * \param ctx           Entropy context
+ * \param path          Name of the file
+ *
+ * \return              0 if successful,
+ *                      MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR on file error, or
+ *                      MBEDTLS_ERR_ENTROPY_SOURCE_FAILED
+ */
+int mbedtls_entropy_write_seed_file( mbedtls_entropy_context *ctx, const char *path );
+
+/**
+ * \brief               Read and update a seed file. Seed is added to this
+ *                      instance. No more than MBEDTLS_ENTROPY_MAX_SEED_SIZE bytes are
+ *                      read from the seed file. The rest is ignored.
+ *
+ * \param ctx           Entropy context
+ * \param path          Name of the file
+ *
+ * \return              0 if successful,
+ *                      MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR on file error,
+ *                      MBEDTLS_ERR_ENTROPY_SOURCE_FAILED
+ */
+int mbedtls_entropy_update_seed_file( mbedtls_entropy_context *ctx, const char *path );
+#endif /* MBEDTLS_FS_IO */
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief          Checkup routine
+ *
+ *                 This module self-test also calls the entropy self-test,
+ *                 mbedtls_entropy_source_self_test();
+ *
+ * \return         0 if successful, or 1 if a test failed
+ */
+int mbedtls_entropy_self_test( int verbose );
+
+#if defined(MBEDTLS_ENTROPY_HARDWARE_ALT)
+/**
+ * \brief          Checkup routine
+ *
+ *                 Verifies the integrity of the hardware entropy source
+ *                 provided by the function 'mbedtls_hardware_poll()'.
+ *
+ *                 Note this is the only hardware entropy source that is known
+ *                 at link time, and other entropy sources configured
+ *                 dynamically at runtime by the function
+ *                 mbedtls_entropy_add_source() will not be tested.
+ *
+ * \return         0 if successful, or 1 if a test failed
+ */
+int mbedtls_entropy_source_self_test( int verbose );
+#endif /* MBEDTLS_ENTROPY_HARDWARE_ALT */
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* entropy.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h
new file mode 100644
index 00000000000..e1d7491aa21
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/entropy_poll.h
@@ -0,0 +1,108 @@
+/**
+ * \file entropy_poll.h
+ *
+ * \brief Platform-specific and custom entropy polling functions
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_ENTROPY_POLL_H
+#define MBEDTLS_ENTROPY_POLL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Default thresholds for built-in sources, in bytes
+ */
+#define MBEDTLS_ENTROPY_MIN_PLATFORM     32     /**< Minimum for platform source    */
+#define MBEDTLS_ENTROPY_MIN_HAVEGE       32     /**< Minimum for HAVEGE             */
+#define MBEDTLS_ENTROPY_MIN_HARDCLOCK     4     /**< Minimum for mbedtls_timing_hardclock()        */
+#if !defined(MBEDTLS_ENTROPY_MIN_HARDWARE)
+#define MBEDTLS_ENTROPY_MIN_HARDWARE     32     /**< Minimum for the hardware source */
+#endif
+
+/**
+ * \brief           Entropy poll callback that provides 0 entropy.
+ */
+#if defined(MBEDTLS_TEST_NULL_ENTROPY)
+    int mbedtls_null_entropy_poll( void *data,
+                                unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#if !defined(MBEDTLS_NO_PLATFORM_ENTROPY)
+/**
+ * \brief           Platform-specific entropy poll callback
+ */
+int mbedtls_platform_entropy_poll( void *data,
+                           unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#if defined(MBEDTLS_HAVEGE_C)
+/**
+ * \brief           HAVEGE based entropy poll callback
+ *
+ * Requires an HAVEGE state as its data pointer.
+ */
+int mbedtls_havege_poll( void *data,
+                 unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#if defined(MBEDTLS_TIMING_C)
+/**
+ * \brief           mbedtls_timing_hardclock-based entropy poll callback
+ */
+int mbedtls_hardclock_poll( void *data,
+                    unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#if defined(MBEDTLS_ENTROPY_HARDWARE_ALT)
+/**
+ * \brief           Entropy poll callback for a hardware source
+ *
+ * \warning         This is not provided by mbed TLS!
+ *                  See \c MBEDTLS_ENTROPY_HARDWARE_ALT in config.h.
+ *
+ * \note            This must accept NULL as its first argument.
+ */
+int mbedtls_hardware_poll( void *data,
+                           unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#if defined(MBEDTLS_ENTROPY_NV_SEED)
+/**
+ * \brief           Entropy poll callback for a non-volatile seed file
+ *
+ * \note            This must accept NULL as its first argument.
+ */
+int mbedtls_nv_seed_poll( void *data,
+                          unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* entropy_poll.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/error.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/error.h
new file mode 100644
index 00000000000..50f25385080
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/error.h
@@ -0,0 +1,217 @@
+/**
+ * \file error.h
+ *
+ * \brief Error to string translation
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_ERROR_H
+#define MBEDTLS_ERROR_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+/**
+ * Error code layout.
+ *
+ * Currently we try to keep all error codes within the negative space of 16
+ * bits signed integers to support all platforms (-0x0001 - -0x7FFF). In
+ * addition we'd like to give two layers of information on the error if
+ * possible.
+ *
+ * For that purpose the error codes are segmented in the following manner:
+ *
+ * 16 bit error code bit-segmentation
+ *
+ * 1 bit  - Unused (sign bit)
+ * 3 bits - High level module ID
+ * 5 bits - Module-dependent error code
+ * 7 bits - Low level module errors
+ *
+ * For historical reasons, low-level error codes are divided in even and odd,
+ * even codes were assigned first, and -1 is reserved for other errors.
+ *
+ * Low-level module errors (0x0002-0x007E, 0x0001-0x007F)
+ *
+ * Module   Nr  Codes assigned
+ * ERROR     2  0x006E          0x0001
+ * MPI       7  0x0002-0x0010
+ * GCM       3  0x0012-0x0014   0x0013-0x0013
+ * BLOWFISH  3  0x0016-0x0018   0x0017-0x0017
+ * THREADING 3  0x001A-0x001E
+ * AES       5  0x0020-0x0022   0x0021-0x0025
+ * CAMELLIA  3  0x0024-0x0026   0x0027-0x0027
+ * XTEA      2  0x0028-0x0028   0x0029-0x0029
+ * BASE64    2  0x002A-0x002C
+ * OID       1  0x002E-0x002E   0x000B-0x000B
+ * PADLOCK   1  0x0030-0x0030
+ * DES       2  0x0032-0x0032   0x0033-0x0033
+ * CTR_DBRG  4  0x0034-0x003A
+ * ENTROPY   3  0x003C-0x0040   0x003D-0x003F
+ * NET      13  0x0042-0x0052   0x0043-0x0049
+ * ARIA      4  0x0058-0x005E
+ * ASN1      7  0x0060-0x006C
+ * CMAC      1  0x007A-0x007A
+ * PBKDF2    1  0x007C-0x007C
+ * HMAC_DRBG 4                  0x0003-0x0009
+ * CCM       3                  0x000D-0x0011
+ * ARC4      1                  0x0019-0x0019
+ * MD2       1                  0x002B-0x002B
+ * MD4       1                  0x002D-0x002D
+ * MD5       1                  0x002F-0x002F
+ * RIPEMD160 1                  0x0031-0x0031
+ * SHA1      1                  0x0035-0x0035 0x0073-0x0073
+ * SHA256    1                  0x0037-0x0037 0x0074-0x0074
+ * SHA512    1                  0x0039-0x0039 0x0075-0x0075
+ * CHACHA20  3                  0x0051-0x0055
+ * POLY1305  3                  0x0057-0x005B
+ * CHACHAPOLY 2 0x0054-0x0056
+ * PLATFORM  2  0x0070-0x0072
+ *
+ * High-level module nr (3 bits - 0x0...-0x7...)
+ * Name      ID  Nr of Errors
+ * PEM       1   9
+ * PKCS#12   1   4 (Started from top)
+ * X509      2   20
+ * PKCS5     2   4 (Started from top)
+ * DHM       3   11
+ * PK        3   15 (Started from top)
+ * RSA       4   11
+ * ECP       4   10 (Started from top)
+ * MD        5   5
+ * HKDF      5   1 (Started from top)
+ * SSL       5   2 (Started from 0x5F00)
+ * CIPHER    6   8 (Started from 0x6080)
+ * SSL       6   24 (Started from top, plus 0x6000)
+ * SSL       7   32
+ *
+ * Module dependent error code (5 bits 0x.00.-0x.F8.)
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Generic error */
+#define MBEDTLS_ERR_ERROR_GENERIC_ERROR       -0x0001
+/** This is a bug in the library */
+#define MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED -0x006E
+
+/**
+ * \brief Combines a high-level and low-level error code together.
+ *
+ *        Wrapper macro for mbedtls_error_add(). See that function for
+ *        more details.
+ */
+#define MBEDTLS_ERROR_ADD( high, low ) \
+        mbedtls_error_add( high, low, __FILE__, __LINE__ )
+
+#if defined(MBEDTLS_TEST_HOOKS)
+/**
+ * \brief Testing hook called before adding/combining two error codes together.
+ *        Only used when invasive testing is enabled via MBEDTLS_TEST_HOOKS.
+ */
+extern void (*mbedtls_test_hook_error_add)( int, int, const char *, int );
+#endif
+
+/**
+ * \brief Combines a high-level and low-level error code together.
+ *
+ *        This function can be called directly however it is usually
+ *        called via the #MBEDTLS_ERROR_ADD macro.
+ *
+ *        While a value of zero is not a negative error code, it is still an
+ *        error code (that denotes success) and can be combined with both a
+ *        negative error code or another value of zero.
+ *
+ * \note  When invasive testing is enabled via #MBEDTLS_TEST_HOOKS, also try to
+ *        call \link mbedtls_test_hook_error_add \endlink.
+ *
+ * \param high      high-level error code. See error.h for more details.
+ * \param low       low-level error code. See error.h for more details.
+ * \param file      file where this error code addition occurred.
+ * \param line      line where this error code addition occurred.
+ */
+static inline int mbedtls_error_add( int high, int low,
+                                     const char *file, int line )
+{
+#if defined(MBEDTLS_TEST_HOOKS)
+    if( *mbedtls_test_hook_error_add != NULL )
+        ( *mbedtls_test_hook_error_add )( high, low, file, line );
+#endif
+    (void)file;
+    (void)line;
+
+    return( high + low );
+}
+
+/**
+ * \brief Translate a mbed TLS error code into a string representation,
+ *        Result is truncated if necessary and always includes a terminating
+ *        null byte.
+ *
+ * \param errnum    error code
+ * \param buffer    buffer to place representation in
+ * \param buflen    length of the buffer
+ */
+void mbedtls_strerror( int errnum, char *buffer, size_t buflen );
+
+/**
+ * \brief Translate the high-level part of an Mbed TLS error code into a string
+ *        representation.
+ *
+ * This function returns a const pointer to an un-modifiable string. The caller
+ * must not try to modify the string. It is intended to be used mostly for
+ * logging purposes.
+ *
+ * \param error_code    error code
+ *
+ * \return The string representation of the error code, or \c NULL if the error
+ *         code is unknown.
+ */
+const char * mbedtls_high_level_strerr( int error_code );
+
+/**
+ * \brief Translate the low-level part of an Mbed TLS error code into a string
+ *        representation.
+ *
+ * This function returns a const pointer to an un-modifiable string. The caller
+ * must not try to modify the string. It is intended to be used mostly for
+ * logging purposes.
+ *
+ * \param error_code    error code
+ *
+ * \return The string representation of the error code, or \c NULL if the error
+ *         code is unknown.
+ */
+const char * mbedtls_low_level_strerr( int error_code );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* error.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/gcm.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/gcm.h
new file mode 100644
index 00000000000..9723a17b65f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/gcm.h
@@ -0,0 +1,327 @@
+/**
+ * \file gcm.h
+ *
+ * \brief This file contains GCM definitions and functions.
+ *
+ * The Galois/Counter Mode (GCM) for 128-bit block ciphers is defined
+ * in <em>D. McGrew, J. Viega, The Galois/Counter Mode of Operation
+ * (GCM), Natl. Inst. Stand. Technol.</em>
+ *
+ * For more information on GCM, see <em>NIST SP 800-38D: Recommendation for
+ * Block Cipher Modes of Operation: Galois/Counter Mode (GCM) and GMAC</em>.
+ *
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_GCM_H
+#define MBEDTLS_GCM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/cipher.h"
+
+#include <stdint.h>
+
+#define MBEDTLS_GCM_ENCRYPT     1
+#define MBEDTLS_GCM_DECRYPT     0
+
+/** Authenticated decryption failed. */
+#define MBEDTLS_ERR_GCM_AUTH_FAILED                       -0x0012
+
+/* MBEDTLS_ERR_GCM_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** GCM hardware accelerator failed. */
+#define MBEDTLS_ERR_GCM_HW_ACCEL_FAILED                   -0x0013
+
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_GCM_BAD_INPUT                         -0x0014
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_GCM_ALT)
+
+/**
+ * \brief          The GCM context structure.
+ */
+typedef struct mbedtls_gcm_context
+{
+    mbedtls_cipher_context_t cipher_ctx;  /*!< The cipher context used. */
+    uint64_t HL[16];                      /*!< Precalculated HTable low. */
+    uint64_t HH[16];                      /*!< Precalculated HTable high. */
+    uint64_t len;                         /*!< The total length of the encrypted data. */
+    uint64_t add_len;                     /*!< The total length of the additional data. */
+    unsigned char base_ectr[16];          /*!< The first ECTR for tag. */
+    unsigned char y[16];                  /*!< The Y working value. */
+    unsigned char buf[16];                /*!< The buf working value. */
+    int mode;                             /*!< The operation to perform:
+                                               #MBEDTLS_GCM_ENCRYPT or
+                                               #MBEDTLS_GCM_DECRYPT. */
+}
+mbedtls_gcm_context;
+
+#else  /* !MBEDTLS_GCM_ALT */
+#include "gcm_alt.h"
+#endif /* !MBEDTLS_GCM_ALT */
+
+/**
+ * \brief           This function initializes the specified GCM context,
+ *                  to make references valid, and prepares the context
+ *                  for mbedtls_gcm_setkey() or mbedtls_gcm_free().
+ *
+ *                  The function does not bind the GCM context to a particular
+ *                  cipher, nor set the key. For this purpose, use
+ *                  mbedtls_gcm_setkey().
+ *
+ * \param ctx       The GCM context to initialize. This must not be \c NULL.
+ */
+void mbedtls_gcm_init( mbedtls_gcm_context *ctx );
+
+/**
+ * \brief           This function associates a GCM context with a
+ *                  cipher algorithm and a key.
+ *
+ * \param ctx       The GCM context. This must be initialized.
+ * \param cipher    The 128-bit block cipher to use.
+ * \param key       The encryption key. This must be a readable buffer of at
+ *                  least \p keybits bits.
+ * \param keybits   The key size in bits. Valid options are:
+ *                  <ul><li>128 bits</li>
+ *                  <li>192 bits</li>
+ *                  <li>256 bits</li></ul>
+ *
+ * \return          \c 0 on success.
+ * \return          A cipher-specific error code on failure.
+ */
+int mbedtls_gcm_setkey( mbedtls_gcm_context *ctx,
+                        mbedtls_cipher_id_t cipher,
+                        const unsigned char *key,
+                        unsigned int keybits );
+
+/**
+ * \brief           This function performs GCM encryption or decryption of a buffer.
+ *
+ * \note            For encryption, the output buffer can be the same as the
+ *                  input buffer. For decryption, the output buffer cannot be
+ *                  the same as input buffer. If the buffers overlap, the output
+ *                  buffer must trail at least 8 Bytes behind the input buffer.
+ *
+ * \warning         When this function performs a decryption, it outputs the
+ *                  authentication tag and does not verify that the data is
+ *                  authentic. You should use this function to perform encryption
+ *                  only. For decryption, use mbedtls_gcm_auth_decrypt() instead.
+ *
+ * \param ctx       The GCM context to use for encryption or decryption. This
+ *                  must be initialized.
+ * \param mode      The operation to perform:
+ *                  - #MBEDTLS_GCM_ENCRYPT to perform authenticated encryption.
+ *                    The ciphertext is written to \p output and the
+ *                    authentication tag is written to \p tag.
+ *                  - #MBEDTLS_GCM_DECRYPT to perform decryption.
+ *                    The plaintext is written to \p output and the
+ *                    authentication tag is written to \p tag.
+ *                    Note that this mode is not recommended, because it does
+ *                    not verify the authenticity of the data. For this reason,
+ *                    you should use mbedtls_gcm_auth_decrypt() instead of
+ *                    calling this function in decryption mode.
+ * \param length    The length of the input data, which is equal to the length
+ *                  of the output data.
+ * \param iv        The initialization vector. This must be a readable buffer of
+ *                  at least \p iv_len Bytes.
+ * \param iv_len    The length of the IV.
+ * \param add       The buffer holding the additional data. This must be of at
+ *                  least that size in Bytes.
+ * \param add_len   The length of the additional data.
+ * \param input     The buffer holding the input data. If \p length is greater
+ *                  than zero, this must be a readable buffer of at least that
+ *                  size in Bytes.
+ * \param output    The buffer for holding the output data. If \p length is greater
+ *                  than zero, this must be a writable buffer of at least that
+ *                  size in Bytes.
+ * \param tag_len   The length of the tag to generate.
+ * \param tag       The buffer for holding the tag. This must be a writable
+ *                  buffer of at least \p tag_len Bytes.
+ *
+ * \return          \c 0 if the encryption or decryption was performed
+ *                  successfully. Note that in #MBEDTLS_GCM_DECRYPT mode,
+ *                  this does not indicate that the data is authentic.
+ * \return          #MBEDTLS_ERR_GCM_BAD_INPUT if the lengths or pointers are
+ *                  not valid or a cipher-specific error code if the encryption
+ *                  or decryption failed.
+ */
+int mbedtls_gcm_crypt_and_tag( mbedtls_gcm_context *ctx,
+                       int mode,
+                       size_t length,
+                       const unsigned char *iv,
+                       size_t iv_len,
+                       const unsigned char *add,
+                       size_t add_len,
+                       const unsigned char *input,
+                       unsigned char *output,
+                       size_t tag_len,
+                       unsigned char *tag );
+
+/**
+ * \brief           This function performs a GCM authenticated decryption of a
+ *                  buffer.
+ *
+ * \note            For decryption, the output buffer cannot be the same as
+ *                  input buffer. If the buffers overlap, the output buffer
+ *                  must trail at least 8 Bytes behind the input buffer.
+ *
+ * \param ctx       The GCM context. This must be initialized.
+ * \param length    The length of the ciphertext to decrypt, which is also
+ *                  the length of the decrypted plaintext.
+ * \param iv        The initialization vector. This must be a readable buffer
+ *                  of at least \p iv_len Bytes.
+ * \param iv_len    The length of the IV.
+ * \param add       The buffer holding the additional data. This must be of at
+ *                  least that size in Bytes.
+ * \param add_len   The length of the additional data.
+ * \param tag       The buffer holding the tag to verify. This must be a
+ *                  readable buffer of at least \p tag_len Bytes.
+ * \param tag_len   The length of the tag to verify.
+ * \param input     The buffer holding the ciphertext. If \p length is greater
+ *                  than zero, this must be a readable buffer of at least that
+ *                  size.
+ * \param output    The buffer for holding the decrypted plaintext. If \p length
+ *                  is greater than zero, this must be a writable buffer of at
+ *                  least that size.
+ *
+ * \return          \c 0 if successful and authenticated.
+ * \return          #MBEDTLS_ERR_GCM_AUTH_FAILED if the tag does not match.
+ * \return          #MBEDTLS_ERR_GCM_BAD_INPUT if the lengths or pointers are
+ *                  not valid or a cipher-specific error code if the decryption
+ *                  failed.
+ */
+int mbedtls_gcm_auth_decrypt( mbedtls_gcm_context *ctx,
+                      size_t length,
+                      const unsigned char *iv,
+                      size_t iv_len,
+                      const unsigned char *add,
+                      size_t add_len,
+                      const unsigned char *tag,
+                      size_t tag_len,
+                      const unsigned char *input,
+                      unsigned char *output );
+
+/**
+ * \brief           This function starts a GCM encryption or decryption
+ *                  operation.
+ *
+ * \param ctx       The GCM context. This must be initialized.
+ * \param mode      The operation to perform: #MBEDTLS_GCM_ENCRYPT or
+ *                  #MBEDTLS_GCM_DECRYPT.
+ * \param iv        The initialization vector. This must be a readable buffer of
+ *                  at least \p iv_len Bytes.
+ * \param iv_len    The length of the IV.
+ * \param add       The buffer holding the additional data, or \c NULL
+ *                  if \p add_len is \c 0.
+ * \param add_len   The length of the additional data. If \c 0,
+ *                  \p add may be \c NULL.
+ *
+ * \return          \c 0 on success.
+ */
+int mbedtls_gcm_starts( mbedtls_gcm_context *ctx,
+                int mode,
+                const unsigned char *iv,
+                size_t iv_len,
+                const unsigned char *add,
+                size_t add_len );
+
+/**
+ * \brief           This function feeds an input buffer into an ongoing GCM
+ *                  encryption or decryption operation.
+ *
+ *    `             The function expects input to be a multiple of 16
+ *                  Bytes. Only the last call before calling
+ *                  mbedtls_gcm_finish() can be less than 16 Bytes.
+ *
+ * \note            For decryption, the output buffer cannot be the same as
+ *                  input buffer. If the buffers overlap, the output buffer
+ *                  must trail at least 8 Bytes behind the input buffer.
+ *
+ * \param ctx       The GCM context. This must be initialized.
+ * \param length    The length of the input data. This must be a multiple of
+ *                  16 except in the last call before mbedtls_gcm_finish().
+ * \param input     The buffer holding the input data. If \p length is greater
+ *                  than zero, this must be a readable buffer of at least that
+ *                  size in Bytes.
+ * \param output    The buffer for holding the output data. If \p length is
+ *                  greater than zero, this must be a writable buffer of at
+ *                  least that size in Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_GCM_BAD_INPUT on failure.
+ */
+int mbedtls_gcm_update( mbedtls_gcm_context *ctx,
+                size_t length,
+                const unsigned char *input,
+                unsigned char *output );
+
+/**
+ * \brief           This function finishes the GCM operation and generates
+ *                  the authentication tag.
+ *
+ *                  It wraps up the GCM stream, and generates the
+ *                  tag. The tag can have a maximum length of 16 Bytes.
+ *
+ * \param ctx       The GCM context. This must be initialized.
+ * \param tag       The buffer for holding the tag. This must be a writable
+ *                  buffer of at least \p tag_len Bytes.
+ * \param tag_len   The length of the tag to generate. This must be at least
+ *                  four.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_GCM_BAD_INPUT on failure.
+ */
+int mbedtls_gcm_finish( mbedtls_gcm_context *ctx,
+                unsigned char *tag,
+                size_t tag_len );
+
+/**
+ * \brief           This function clears a GCM context and the underlying
+ *                  cipher sub-context.
+ *
+ * \param ctx       The GCM context to clear. If this is \c NULL, the call has
+ *                  no effect. Otherwise, this must be initialized.
+ */
+void mbedtls_gcm_free( mbedtls_gcm_context *ctx );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          The GCM checkup routine.
+ *
+ * \return         \c 0 on success.
+ * \return         \c 1 on failure.
+ */
+int mbedtls_gcm_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* gcm.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/havege.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/havege.h
new file mode 100644
index 00000000000..7d27039e8c7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/havege.h
@@ -0,0 +1,80 @@
+/**
+ * \file havege.h
+ *
+ * \brief HAVEGE: HArdware Volatile Entropy Gathering and Expansion
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_HAVEGE_H
+#define MBEDTLS_HAVEGE_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#define MBEDTLS_HAVEGE_COLLECT_SIZE 1024
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          HAVEGE state structure
+ */
+typedef struct mbedtls_havege_state
+{
+    uint32_t PT1, PT2, offset[2];
+    uint32_t pool[MBEDTLS_HAVEGE_COLLECT_SIZE];
+    uint32_t WALK[8192];
+}
+mbedtls_havege_state;
+
+/**
+ * \brief          HAVEGE initialization
+ *
+ * \param hs       HAVEGE state to be initialized
+ */
+void mbedtls_havege_init( mbedtls_havege_state *hs );
+
+/**
+ * \brief          Clear HAVEGE state
+ *
+ * \param hs       HAVEGE state to be cleared
+ */
+void mbedtls_havege_free( mbedtls_havege_state *hs );
+
+/**
+ * \brief          HAVEGE rand function
+ *
+ * \param p_rng    A HAVEGE state
+ * \param output   Buffer to fill
+ * \param len      Length of buffer
+ *
+ * \return         0
+ */
+int mbedtls_havege_random( void *p_rng, unsigned char *output, size_t len );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* havege.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/hkdf.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/hkdf.h
new file mode 100644
index 00000000000..223004b8ede
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/hkdf.h
@@ -0,0 +1,140 @@
+/**
+ * \file hkdf.h
+ *
+ * \brief   This file contains the HKDF interface.
+ *
+ *          The HMAC-based Extract-and-Expand Key Derivation Function (HKDF) is
+ *          specified by RFC 5869.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_HKDF_H
+#define MBEDTLS_HKDF_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/md.h"
+
+/**
+ *  \name HKDF Error codes
+ *  \{
+ */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_HKDF_BAD_INPUT_DATA  -0x5F80
+/* \} name */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *  \brief  This is the HMAC-based Extract-and-Expand Key Derivation Function
+ *          (HKDF).
+ *
+ *  \param  md        A hash function; md.size denotes the length of the hash
+ *                    function output in bytes.
+ *  \param  salt      An optional salt value (a non-secret random value);
+ *                    if the salt is not provided, a string of all zeros of
+ *                    md.size length is used as the salt.
+ *  \param  salt_len  The length in bytes of the optional \p salt.
+ *  \param  ikm       The input keying material.
+ *  \param  ikm_len   The length in bytes of \p ikm.
+ *  \param  info      An optional context and application specific information
+ *                    string. This can be a zero-length string.
+ *  \param  info_len  The length of \p info in bytes.
+ *  \param  okm       The output keying material of \p okm_len bytes.
+ *  \param  okm_len   The length of the output keying material in bytes. This
+ *                    must be less than or equal to 255 * md.size bytes.
+ *
+ *  \return 0 on success.
+ *  \return #MBEDTLS_ERR_HKDF_BAD_INPUT_DATA when the parameters are invalid.
+ *  \return An MBEDTLS_ERR_MD_* error for errors returned from the underlying
+ *          MD layer.
+ */
+int mbedtls_hkdf( const mbedtls_md_info_t *md, const unsigned char *salt,
+                  size_t salt_len, const unsigned char *ikm, size_t ikm_len,
+                  const unsigned char *info, size_t info_len,
+                  unsigned char *okm, size_t okm_len );
+
+/**
+ *  \brief  Take the input keying material \p ikm and extract from it a
+ *          fixed-length pseudorandom key \p prk.
+ *
+ *  \warning    This function should only be used if the security of it has been
+ *              studied and established in that particular context (eg. TLS 1.3
+ *              key schedule). For standard HKDF security guarantees use
+ *              \c mbedtls_hkdf instead.
+ *
+ *  \param       md        A hash function; md.size denotes the length of the
+ *                         hash function output in bytes.
+ *  \param       salt      An optional salt value (a non-secret random value);
+ *                         if the salt is not provided, a string of all zeros
+ *                         of md.size length is used as the salt.
+ *  \param       salt_len  The length in bytes of the optional \p salt.
+ *  \param       ikm       The input keying material.
+ *  \param       ikm_len   The length in bytes of \p ikm.
+ *  \param[out]  prk       A pseudorandom key of at least md.size bytes.
+ *
+ *  \return 0 on success.
+ *  \return #MBEDTLS_ERR_HKDF_BAD_INPUT_DATA when the parameters are invalid.
+ *  \return An MBEDTLS_ERR_MD_* error for errors returned from the underlying
+ *          MD layer.
+ */
+int mbedtls_hkdf_extract( const mbedtls_md_info_t *md,
+                          const unsigned char *salt, size_t salt_len,
+                          const unsigned char *ikm, size_t ikm_len,
+                          unsigned char *prk );
+
+/**
+ *  \brief  Expand the supplied \p prk into several additional pseudorandom
+ *          keys, which is the output of the HKDF.
+ *
+ *  \warning    This function should only be used if the security of it has been
+ *              studied and established in that particular context (eg. TLS 1.3
+ *              key schedule). For standard HKDF security guarantees use
+ *              \c mbedtls_hkdf instead.
+ *
+ *  \param  md        A hash function; md.size denotes the length of the hash
+ *                    function output in bytes.
+ *  \param  prk       A pseudorandom key of at least md.size bytes. \p prk is
+ *                    usually the output from the HKDF extract step.
+ *  \param  prk_len   The length in bytes of \p prk.
+ *  \param  info      An optional context and application specific information
+ *                    string. This can be a zero-length string.
+ *  \param  info_len  The length of \p info in bytes.
+ *  \param  okm       The output keying material of \p okm_len bytes.
+ *  \param  okm_len   The length of the output keying material in bytes. This
+ *                    must be less than or equal to 255 * md.size bytes.
+ *
+ *  \return 0 on success.
+ *  \return #MBEDTLS_ERR_HKDF_BAD_INPUT_DATA when the parameters are invalid.
+ *  \return An MBEDTLS_ERR_MD_* error for errors returned from the underlying
+ *          MD layer.
+ */
+int mbedtls_hkdf_expand( const mbedtls_md_info_t *md, const unsigned char *prk,
+                         size_t prk_len, const unsigned char *info,
+                         size_t info_len, unsigned char *okm, size_t okm_len );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* hkdf.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
new file mode 100644
index 00000000000..79132d4d910
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
@@ -0,0 +1,474 @@
+/**
+ * \file hmac_drbg.h
+ *
+ * \brief The HMAC_DRBG pseudorandom generator.
+ *
+ * This module implements the HMAC_DRBG pseudorandom generator described
+ * in <em>NIST SP 800-90A: Recommendation for Random Number Generation Using
+ * Deterministic Random Bit Generators</em>.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_HMAC_DRBG_H
+#define MBEDTLS_HMAC_DRBG_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/md.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "mbedtls/threading.h"
+#endif
+
+/*
+ * Error codes
+ */
+/** Too many random requested in single call. */
+#define MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG              -0x0003
+/** Input too large (Entropy + additional). */
+#define MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG                -0x0005
+/** Read/write error in file. */
+#define MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR                -0x0007
+/** The entropy source failed. */
+#define MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED        -0x0009
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_HMAC_DRBG_RESEED_INTERVAL)
+#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL   10000   /**< Interval before reseed is performed by default */
+#endif
+
+#if !defined(MBEDTLS_HMAC_DRBG_MAX_INPUT)
+#define MBEDTLS_HMAC_DRBG_MAX_INPUT         256     /**< Maximum number of additional input bytes */
+#endif
+
+#if !defined(MBEDTLS_HMAC_DRBG_MAX_REQUEST)
+#define MBEDTLS_HMAC_DRBG_MAX_REQUEST       1024    /**< Maximum number of requested bytes per call */
+#endif
+
+#if !defined(MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT)
+#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT    384     /**< Maximum size of (re)seed buffer */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#define MBEDTLS_HMAC_DRBG_PR_OFF   0   /**< No prediction resistance       */
+#define MBEDTLS_HMAC_DRBG_PR_ON    1   /**< Prediction resistance enabled  */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * HMAC_DRBG context.
+ */
+typedef struct mbedtls_hmac_drbg_context
+{
+    /* Working state: the key K is not stored explicitly,
+     * but is implied by the HMAC context */
+    mbedtls_md_context_t md_ctx;                    /*!< HMAC context (inc. K)  */
+    unsigned char V[MBEDTLS_MD_MAX_SIZE];  /*!< V in the spec          */
+    int reseed_counter;                     /*!< reseed counter         */
+
+    /* Administrative state */
+    size_t entropy_len;         /*!< entropy bytes grabbed on each (re)seed */
+    int prediction_resistance;  /*!< enable prediction resistance (Automatic
+                                     reseed before every random generation) */
+    int reseed_interval;        /*!< reseed interval   */
+
+    /* Callbacks */
+    int (*f_entropy)(void *, unsigned char *, size_t); /*!< entropy function */
+    void *p_entropy;            /*!< context for the entropy function        */
+
+#if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized if and only if
+     * md_ctx->md_info != NULL. This means that the mutex is initialized
+     * during the initial seeding in mbedtls_hmac_drbg_seed() or
+     * mbedtls_hmac_drbg_seed_buf() and freed in mbedtls_ctr_drbg_free().
+     *
+     * Note that this invariant may change without notice. Do not rely on it
+     * and do not access the mutex directly in application code.
+     */
+    mbedtls_threading_mutex_t mutex;
+#endif
+} mbedtls_hmac_drbg_context;
+
+/**
+ * \brief               HMAC_DRBG context initialization.
+ *
+ * This function makes the context ready for mbedtls_hmac_drbg_seed(),
+ * mbedtls_hmac_drbg_seed_buf() or mbedtls_hmac_drbg_free().
+ *
+ * \note                The reseed interval is #MBEDTLS_HMAC_DRBG_RESEED_INTERVAL
+ *                      by default. Override this value by calling
+ *                      mbedtls_hmac_drbg_set_reseed_interval().
+ *
+ * \param ctx           HMAC_DRBG context to be initialized.
+ */
+void mbedtls_hmac_drbg_init( mbedtls_hmac_drbg_context *ctx );
+
+/**
+ * \brief               HMAC_DRBG initial seeding.
+ *
+ * Set the initial seed and set up the entropy source for future reseeds.
+ *
+ * A typical choice for the \p f_entropy and \p p_entropy parameters is
+ * to use the entropy module:
+ * - \p f_entropy is mbedtls_entropy_func();
+ * - \p p_entropy is an instance of ::mbedtls_entropy_context initialized
+ *   with mbedtls_entropy_init() (which registers the platform's default
+ *   entropy sources).
+ *
+ * You can provide a personalization string in addition to the
+ * entropy source, to make this instantiation as unique as possible.
+ *
+ * \note                By default, the security strength as defined by NIST is:
+ *                      - 128 bits if \p md_info is SHA-1;
+ *                      - 192 bits if \p md_info is SHA-224;
+ *                      - 256 bits if \p md_info is SHA-256, SHA-384 or SHA-512.
+ *                      Note that SHA-256 is just as efficient as SHA-224.
+ *                      The security strength can be reduced if a smaller
+ *                      entropy length is set with
+ *                      mbedtls_hmac_drbg_set_entropy_len().
+ *
+ * \note                The default entropy length is the security strength
+ *                      (converted from bits to bytes). You can override
+ *                      it by calling mbedtls_hmac_drbg_set_entropy_len().
+ *
+ * \note                During the initial seeding, this function calls
+ *                      the entropy source to obtain a nonce
+ *                      whose length is half the entropy length.
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_hmac_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
+ * \param ctx           HMAC_DRBG context to be seeded.
+ * \param md_info       MD algorithm to use for HMAC_DRBG.
+ * \param f_entropy     The entropy callback, taking as arguments the
+ *                      \p p_entropy context, the buffer to fill, and the
+ *                      length of the buffer.
+ *                      \p f_entropy is always called with a length that is
+ *                      less than or equal to the entropy length.
+ * \param p_entropy     The entropy context to pass to \p f_entropy.
+ * \param custom        The personalization string.
+ *                      This can be \c NULL, in which case the personalization
+ *                      string is empty regardless of the value of \p len.
+ * \param len           The length of the personalization string.
+ *                      This must be at most #MBEDTLS_HMAC_DRBG_MAX_INPUT
+ *                      and also at most
+ *                      #MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT - \p entropy_len * 3 / 2
+ *                      where \p entropy_len is the entropy length
+ *                      described above.
+ *
+ * \return              \c 0 if successful.
+ * \return              #MBEDTLS_ERR_MD_BAD_INPUT_DATA if \p md_info is
+ *                      invalid.
+ * \return              #MBEDTLS_ERR_MD_ALLOC_FAILED if there was not enough
+ *                      memory to allocate context data.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED
+ *                      if the call to \p f_entropy failed.
+ */
+int mbedtls_hmac_drbg_seed( mbedtls_hmac_drbg_context *ctx,
+                    const mbedtls_md_info_t * md_info,
+                    int (*f_entropy)(void *, unsigned char *, size_t),
+                    void *p_entropy,
+                    const unsigned char *custom,
+                    size_t len );
+
+/**
+ * \brief               Initilisation of simpified HMAC_DRBG (never reseeds).
+ *
+ * This function is meant for use in algorithms that need a pseudorandom
+ * input such as deterministic ECDSA.
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_hmac_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
+ * \param ctx           HMAC_DRBG context to be initialised.
+ * \param md_info       MD algorithm to use for HMAC_DRBG.
+ * \param data          Concatenation of the initial entropy string and
+ *                      the additional data.
+ * \param data_len      Length of \p data in bytes.
+ *
+ * \return              \c 0 if successful. or
+ * \return              #MBEDTLS_ERR_MD_BAD_INPUT_DATA if \p md_info is
+ *                      invalid.
+ * \return              #MBEDTLS_ERR_MD_ALLOC_FAILED if there was not enough
+ *                      memory to allocate context data.
+ */
+int mbedtls_hmac_drbg_seed_buf( mbedtls_hmac_drbg_context *ctx,
+                        const mbedtls_md_info_t * md_info,
+                        const unsigned char *data, size_t data_len );
+
+/**
+ * \brief               This function turns prediction resistance on or off.
+ *                      The default value is off.
+ *
+ * \note                If enabled, entropy is gathered at the beginning of
+ *                      every call to mbedtls_hmac_drbg_random_with_add()
+ *                      or mbedtls_hmac_drbg_random().
+ *                      Only use this if your entropy source has sufficient
+ *                      throughput.
+ *
+ * \param ctx           The HMAC_DRBG context.
+ * \param resistance    #MBEDTLS_HMAC_DRBG_PR_ON or #MBEDTLS_HMAC_DRBG_PR_OFF.
+ */
+void mbedtls_hmac_drbg_set_prediction_resistance( mbedtls_hmac_drbg_context *ctx,
+                                          int resistance );
+
+/**
+ * \brief               This function sets the amount of entropy grabbed on each
+ *                      seed or reseed.
+ *
+ * See the documentation of mbedtls_hmac_drbg_seed() for the default value.
+ *
+ * \param ctx           The HMAC_DRBG context.
+ * \param len           The amount of entropy to grab, in bytes.
+ */
+void mbedtls_hmac_drbg_set_entropy_len( mbedtls_hmac_drbg_context *ctx,
+                                size_t len );
+
+/**
+ * \brief               Set the reseed interval.
+ *
+ * The reseed interval is the number of calls to mbedtls_hmac_drbg_random()
+ * or mbedtls_hmac_drbg_random_with_add() after which the entropy function
+ * is called again.
+ *
+ * The default value is #MBEDTLS_HMAC_DRBG_RESEED_INTERVAL.
+ *
+ * \param ctx           The HMAC_DRBG context.
+ * \param interval      The reseed interval.
+ */
+void mbedtls_hmac_drbg_set_reseed_interval( mbedtls_hmac_drbg_context *ctx,
+                                    int interval );
+
+/**
+ * \brief               This function updates the state of the HMAC_DRBG context.
+ *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
+ * \param ctx           The HMAC_DRBG context.
+ * \param additional    The data to update the state with.
+ *                      If this is \c NULL, there is no additional data.
+ * \param add_len       Length of \p additional in bytes.
+ *                      Unused if \p additional is \c NULL.
+ *
+ * \return              \c 0 on success, or an error from the underlying
+ *                      hash calculation.
+ */
+int mbedtls_hmac_drbg_update_ret( mbedtls_hmac_drbg_context *ctx,
+                       const unsigned char *additional, size_t add_len );
+
+/**
+ * \brief               This function reseeds the HMAC_DRBG context, that is
+ *                      extracts data from the entropy source.
+ *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
+ * \param ctx           The HMAC_DRBG context.
+ * \param additional    Additional data to add to the state.
+ *                      If this is \c NULL, there is no additional data
+ *                      and \p len should be \c 0.
+ * \param len           The length of the additional data.
+ *                      This must be at most #MBEDTLS_HMAC_DRBG_MAX_INPUT
+ *                      and also at most
+ *                      #MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT - \p entropy_len
+ *                      where \p entropy_len is the entropy length
+ *                      (see mbedtls_hmac_drbg_set_entropy_len()).
+ *
+ * \return              \c 0 if successful.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED
+ *                      if a call to the entropy function failed.
+ */
+int mbedtls_hmac_drbg_reseed( mbedtls_hmac_drbg_context *ctx,
+                      const unsigned char *additional, size_t len );
+
+/**
+ * \brief   This function updates an HMAC_DRBG instance with additional
+ *          data and uses it to generate random data.
+ *
+ * This function automatically reseeds if the reseed counter is exceeded
+ * or prediction resistance is enabled.
+ *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
+ * \param p_rng         The HMAC_DRBG context. This must be a pointer to a
+ *                      #mbedtls_hmac_drbg_context structure.
+ * \param output        The buffer to fill.
+ * \param output_len    The length of the buffer in bytes.
+ *                      This must be at most #MBEDTLS_HMAC_DRBG_MAX_REQUEST.
+ * \param additional    Additional data to update with.
+ *                      If this is \c NULL, there is no additional data
+ *                      and \p add_len should be \c 0.
+ * \param add_len       The length of the additional data.
+ *                      This must be at most #MBEDTLS_HMAC_DRBG_MAX_INPUT.
+ *
+ * \return              \c 0 if successful.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED
+ *                      if a call to the entropy source failed.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG if
+ *                      \p output_len > #MBEDTLS_HMAC_DRBG_MAX_REQUEST.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG if
+ *                      \p add_len > #MBEDTLS_HMAC_DRBG_MAX_INPUT.
+ */
+int mbedtls_hmac_drbg_random_with_add( void *p_rng,
+                               unsigned char *output, size_t output_len,
+                               const unsigned char *additional,
+                               size_t add_len );
+
+/**
+ * \brief   This function uses HMAC_DRBG to generate random data.
+ *
+ * This function automatically reseeds if the reseed counter is exceeded
+ * or prediction resistance is enabled.
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
+ * \param p_rng         The HMAC_DRBG context. This must be a pointer to a
+ *                      #mbedtls_hmac_drbg_context structure.
+ * \param output        The buffer to fill.
+ * \param out_len       The length of the buffer in bytes.
+ *                      This must be at most #MBEDTLS_HMAC_DRBG_MAX_REQUEST.
+ *
+ * \return              \c 0 if successful.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED
+ *                      if a call to the entropy source failed.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG if
+ *                      \p out_len > #MBEDTLS_HMAC_DRBG_MAX_REQUEST.
+ */
+int mbedtls_hmac_drbg_random( void *p_rng, unsigned char *output, size_t out_len );
+
+/**
+ * \brief               This function resets HMAC_DRBG context to the state immediately
+ *                      after initial call of mbedtls_hmac_drbg_init().
+ *
+ * \param ctx           The HMAC_DRBG context to free.
+ */
+void mbedtls_hmac_drbg_free( mbedtls_hmac_drbg_context *ctx );
+
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief               This function updates the state of the HMAC_DRBG context.
+ *
+ * \deprecated          Superseded by mbedtls_hmac_drbg_update_ret()
+ *                      in 2.16.0.
+ *
+ * \param ctx           The HMAC_DRBG context.
+ * \param additional    The data to update the state with.
+ *                      If this is \c NULL, there is no additional data.
+ * \param add_len       Length of \p additional in bytes.
+ *                      Unused if \p additional is \c NULL.
+ */
+MBEDTLS_DEPRECATED void mbedtls_hmac_drbg_update(
+    mbedtls_hmac_drbg_context *ctx,
+    const unsigned char *additional, size_t add_len );
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief               This function writes a seed file.
+ *
+ * \param ctx           The HMAC_DRBG context.
+ * \param path          The name of the file.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR on file error.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED on reseed
+ *                      failure.
+ */
+int mbedtls_hmac_drbg_write_seed_file( mbedtls_hmac_drbg_context *ctx, const char *path );
+
+/**
+ * \brief               This function reads and updates a seed file. The seed
+ *                      is added to this instance.
+ *
+ * \param ctx           The HMAC_DRBG context.
+ * \param path          The name of the file.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR on file error.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED on
+ *                      reseed failure.
+ * \return              #MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG if the existing
+ *                      seed file is too large.
+ */
+int mbedtls_hmac_drbg_update_seed_file( mbedtls_hmac_drbg_context *ctx, const char *path );
+#endif /* MBEDTLS_FS_IO */
+
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief               The HMAC_DRBG Checkup routine.
+ *
+ * \return              \c 0 if successful.
+ * \return              \c 1 if the test failed.
+ */
+int mbedtls_hmac_drbg_self_test( int verbose );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* hmac_drbg.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md.h
new file mode 100644
index 00000000000..84fafd2ac77
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md.h
@@ -0,0 +1,493 @@
+ /**
+ * \file md.h
+ *
+ * \brief This file contains the generic message-digest wrapper.
+ *
+ * \author Adriaan de Jong <dejong@fox-it.com>
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_MD_H
+#define MBEDTLS_MD_H
+
+#include <stddef.h>
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+#include "mbedtls/platform_util.h"
+
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE                -0x5080
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_MD_BAD_INPUT_DATA                     -0x5100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_MD_ALLOC_FAILED                       -0x5180
+/** Opening or reading of file failed. */
+#define MBEDTLS_ERR_MD_FILE_IO_ERROR                      -0x5200
+
+/* MBEDTLS_ERR_MD_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** MD hardware accelerator failed. */
+#define MBEDTLS_ERR_MD_HW_ACCEL_FAILED                    -0x5280
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief     Supported message digests.
+ *
+ * \warning   MD2, MD4, MD5 and SHA-1 are considered weak message digests and
+ *            their use constitutes a security risk. We recommend considering
+ *            stronger message digests instead.
+ *
+ */
+typedef enum {
+    MBEDTLS_MD_NONE=0,    /**< None. */
+    MBEDTLS_MD_MD2,       /**< The MD2 message digest. */
+    MBEDTLS_MD_MD4,       /**< The MD4 message digest. */
+    MBEDTLS_MD_MD5,       /**< The MD5 message digest. */
+    MBEDTLS_MD_SHA1,      /**< The SHA-1 message digest. */
+    MBEDTLS_MD_SHA224,    /**< The SHA-224 message digest. */
+    MBEDTLS_MD_SHA256,    /**< The SHA-256 message digest. */
+    MBEDTLS_MD_SHA384,    /**< The SHA-384 message digest. */
+    MBEDTLS_MD_SHA512,    /**< The SHA-512 message digest. */
+    MBEDTLS_MD_RIPEMD160, /**< The RIPEMD-160 message digest. */
+} mbedtls_md_type_t;
+
+#if defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_MD_MAX_SIZE         64  /* longest known is SHA512 */
+#else
+#define MBEDTLS_MD_MAX_SIZE         32  /* longest known is SHA256 or less */
+#endif
+
+#if defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_MD_MAX_BLOCK_SIZE         128
+#else
+#define MBEDTLS_MD_MAX_BLOCK_SIZE         64
+#endif
+
+/**
+ * Opaque struct defined in md_internal.h.
+ */
+typedef struct mbedtls_md_info_t mbedtls_md_info_t;
+
+/**
+ * The generic message-digest context.
+ */
+typedef struct mbedtls_md_context_t
+{
+    /** Information about the associated message digest. */
+    const mbedtls_md_info_t *md_info;
+
+    /** The digest-specific context. */
+    void *md_ctx;
+
+    /** The HMAC part of the context. */
+    void *hmac_ctx;
+} mbedtls_md_context_t;
+
+/**
+ * \brief           This function returns the list of digests supported by the
+ *                  generic digest module.
+ *
+ * \note            The list starts with the strongest available hashes.
+ *
+ * \return          A statically allocated array of digests. Each element
+ *                  in the returned list is an integer belonging to the
+ *                  message-digest enumeration #mbedtls_md_type_t.
+ *                  The last entry is 0.
+ */
+const int *mbedtls_md_list( void );
+
+/**
+ * \brief           This function returns the message-digest information
+ *                  associated with the given digest name.
+ *
+ * \param md_name   The name of the digest to search for.
+ *
+ * \return          The message-digest information associated with \p md_name.
+ * \return          NULL if the associated message-digest information is not found.
+ */
+const mbedtls_md_info_t *mbedtls_md_info_from_string( const char *md_name );
+
+/**
+ * \brief           This function returns the message-digest information
+ *                  associated with the given digest type.
+ *
+ * \param md_type   The type of digest to search for.
+ *
+ * \return          The message-digest information associated with \p md_type.
+ * \return          NULL if the associated message-digest information is not found.
+ */
+const mbedtls_md_info_t *mbedtls_md_info_from_type( mbedtls_md_type_t md_type );
+
+/**
+ * \brief           This function initializes a message-digest context without
+ *                  binding it to a particular message-digest algorithm.
+ *
+ *                  This function should always be called first. It prepares the
+ *                  context for mbedtls_md_setup() for binding it to a
+ *                  message-digest algorithm.
+ */
+void mbedtls_md_init( mbedtls_md_context_t *ctx );
+
+/**
+ * \brief           This function clears the internal structure of \p ctx and
+ *                  frees any embedded internal structure, but does not free
+ *                  \p ctx itself.
+ *
+ *                  If you have called mbedtls_md_setup() on \p ctx, you must
+ *                  call mbedtls_md_free() when you are no longer using the
+ *                  context.
+ *                  Calling this function if you have previously
+ *                  called mbedtls_md_init() and nothing else is optional.
+ *                  You must not call this function if you have not called
+ *                  mbedtls_md_init().
+ */
+void mbedtls_md_free( mbedtls_md_context_t *ctx );
+
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief           This function selects the message digest algorithm to use,
+ *                  and allocates internal structures.
+ *
+ *                  It should be called after mbedtls_md_init() or mbedtls_md_free().
+ *                  Makes it necessary to call mbedtls_md_free() later.
+ *
+ * \deprecated      Superseded by mbedtls_md_setup() in 2.0.0
+ *
+ * \param ctx       The context to set up.
+ * \param md_info   The information structure of the message-digest algorithm
+ *                  to use.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ *                  failure.
+ * \return          #MBEDTLS_ERR_MD_ALLOC_FAILED on memory-allocation failure.
+ */
+int mbedtls_md_init_ctx( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info ) MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief           This function selects the message digest algorithm to use,
+ *                  and allocates internal structures.
+ *
+ *                  It should be called after mbedtls_md_init() or
+ *                  mbedtls_md_free(). Makes it necessary to call
+ *                  mbedtls_md_free() later.
+ *
+ * \param ctx       The context to set up.
+ * \param md_info   The information structure of the message-digest algorithm
+ *                  to use.
+ * \param hmac      Defines if HMAC is used. 0: HMAC is not used (saves some memory),
+ *                  or non-zero: HMAC is used with this context.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ *                  failure.
+ * \return          #MBEDTLS_ERR_MD_ALLOC_FAILED on memory-allocation failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_setup( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info, int hmac );
+
+/**
+ * \brief           This function clones the state of an message-digest
+ *                  context.
+ *
+ * \note            You must call mbedtls_md_setup() on \c dst before calling
+ *                  this function.
+ *
+ * \note            The two contexts must have the same type,
+ *                  for example, both are SHA-256.
+ *
+ * \warning         This function clones the message-digest state, not the
+ *                  HMAC state.
+ *
+ * \param dst       The destination context.
+ * \param src       The context to be cloned.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_clone( mbedtls_md_context_t *dst,
+                      const mbedtls_md_context_t *src );
+
+/**
+ * \brief           This function extracts the message-digest size from the
+ *                  message-digest information structure.
+ *
+ * \param md_info   The information structure of the message-digest algorithm
+ *                  to use.
+ *
+ * \return          The size of the message-digest output in Bytes.
+ */
+unsigned char mbedtls_md_get_size( const mbedtls_md_info_t *md_info );
+
+/**
+ * \brief           This function extracts the message-digest type from the
+ *                  message-digest information structure.
+ *
+ * \param md_info   The information structure of the message-digest algorithm
+ *                  to use.
+ *
+ * \return          The type of the message digest.
+ */
+mbedtls_md_type_t mbedtls_md_get_type( const mbedtls_md_info_t *md_info );
+
+/**
+ * \brief           This function extracts the message-digest name from the
+ *                  message-digest information structure.
+ *
+ * \param md_info   The information structure of the message-digest algorithm
+ *                  to use.
+ *
+ * \return          The name of the message digest.
+ */
+const char *mbedtls_md_get_name( const mbedtls_md_info_t *md_info );
+
+/**
+ * \brief           This function starts a message-digest computation.
+ *
+ *                  You must call this function after setting up the context
+ *                  with mbedtls_md_setup(), and before passing data with
+ *                  mbedtls_md_update().
+ *
+ * \param ctx       The generic message-digest context.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ *                  failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_starts( mbedtls_md_context_t *ctx );
+
+/**
+ * \brief           This function feeds an input buffer into an ongoing
+ *                  message-digest computation.
+ *
+ *                  You must call mbedtls_md_starts() before calling this
+ *                  function. You may call this function multiple times.
+ *                  Afterwards, call mbedtls_md_finish().
+ *
+ * \param ctx       The generic message-digest context.
+ * \param input     The buffer holding the input data.
+ * \param ilen      The length of the input data.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ *                  failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_update( mbedtls_md_context_t *ctx, const unsigned char *input, size_t ilen );
+
+/**
+ * \brief           This function finishes the digest operation,
+ *                  and writes the result to the output buffer.
+ *
+ *                  Call this function after a call to mbedtls_md_starts(),
+ *                  followed by any number of calls to mbedtls_md_update().
+ *                  Afterwards, you may either clear the context with
+ *                  mbedtls_md_free(), or call mbedtls_md_starts() to reuse
+ *                  the context for another digest operation with the same
+ *                  algorithm.
+ *
+ * \param ctx       The generic message-digest context.
+ * \param output    The buffer for the generic message-digest checksum result.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ *                  failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_finish( mbedtls_md_context_t *ctx, unsigned char *output );
+
+/**
+ * \brief          This function calculates the message-digest of a buffer,
+ *                 with respect to a configurable message-digest algorithm
+ *                 in a single call.
+ *
+ *                 The result is calculated as
+ *                 Output = message_digest(input buffer).
+ *
+ * \param md_info  The information structure of the message-digest algorithm
+ *                 to use.
+ * \param input    The buffer holding the data.
+ * \param ilen     The length of the input data.
+ * \param output   The generic message-digest checksum result.
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ *                 failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md( const mbedtls_md_info_t *md_info, const unsigned char *input, size_t ilen,
+        unsigned char *output );
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief          This function calculates the message-digest checksum
+ *                 result of the contents of the provided file.
+ *
+ *                 The result is calculated as
+ *                 Output = message_digest(file contents).
+ *
+ * \param md_info  The information structure of the message-digest algorithm
+ *                 to use.
+ * \param path     The input file name.
+ * \param output   The generic message-digest checksum result.
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_MD_FILE_IO_ERROR on an I/O error accessing
+ *                 the file pointed by \p path.
+ * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA if \p md_info was NULL.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_file( const mbedtls_md_info_t *md_info, const char *path,
+                     unsigned char *output );
+#endif /* MBEDTLS_FS_IO */
+
+/**
+ * \brief           This function sets the HMAC key and prepares to
+ *                  authenticate a new message.
+ *
+ *                  Call this function after mbedtls_md_setup(), to use
+ *                  the MD context for an HMAC calculation, then call
+ *                  mbedtls_md_hmac_update() to provide the input data, and
+ *                  mbedtls_md_hmac_finish() to get the HMAC value.
+ *
+ * \param ctx       The message digest context containing an embedded HMAC
+ *                  context.
+ * \param key       The HMAC secret key.
+ * \param keylen    The length of the HMAC key in Bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ *                  failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_hmac_starts( mbedtls_md_context_t *ctx, const unsigned char *key,
+                    size_t keylen );
+
+/**
+ * \brief           This function feeds an input buffer into an ongoing HMAC
+ *                  computation.
+ *
+ *                  Call mbedtls_md_hmac_starts() or mbedtls_md_hmac_reset()
+ *                  before calling this function.
+ *                  You may call this function multiple times to pass the
+ *                  input piecewise.
+ *                  Afterwards, call mbedtls_md_hmac_finish().
+ *
+ * \param ctx       The message digest context containing an embedded HMAC
+ *                  context.
+ * \param input     The buffer holding the input data.
+ * \param ilen      The length of the input data.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ *                  failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_hmac_update( mbedtls_md_context_t *ctx, const unsigned char *input,
+                    size_t ilen );
+
+/**
+ * \brief           This function finishes the HMAC operation, and writes
+ *                  the result to the output buffer.
+ *
+ *                  Call this function after mbedtls_md_hmac_starts() and
+ *                  mbedtls_md_hmac_update() to get the HMAC value. Afterwards
+ *                  you may either call mbedtls_md_free() to clear the context,
+ *                  or call mbedtls_md_hmac_reset() to reuse the context with
+ *                  the same HMAC key.
+ *
+ * \param ctx       The message digest context containing an embedded HMAC
+ *                  context.
+ * \param output    The generic HMAC checksum result.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ *                  failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_hmac_finish( mbedtls_md_context_t *ctx, unsigned char *output);
+
+/**
+ * \brief           This function prepares to authenticate a new message with
+ *                  the same key as the previous HMAC operation.
+ *
+ *                  You may call this function after mbedtls_md_hmac_finish().
+ *                  Afterwards call mbedtls_md_hmac_update() to pass the new
+ *                  input.
+ *
+ * \param ctx       The message digest context containing an embedded HMAC
+ *                  context.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ *                  failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_hmac_reset( mbedtls_md_context_t *ctx );
+
+/**
+ * \brief          This function calculates the full generic HMAC
+ *                 on the input buffer with the provided key.
+ *
+ *                 The function allocates the context, performs the
+ *                 calculation, and frees the context.
+ *
+ *                 The HMAC result is calculated as
+ *                 output = generic HMAC(hmac key, input buffer).
+ *
+ * \param md_info  The information structure of the message-digest algorithm
+ *                 to use.
+ * \param key      The HMAC secret key.
+ * \param keylen   The length of the HMAC secret key in Bytes.
+ * \param input    The buffer holding the input data.
+ * \param ilen     The length of the input data.
+ * \param output   The generic HMAC result.
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ *                 failure.
+ */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_hmac( const mbedtls_md_info_t *md_info, const unsigned char *key, size_t keylen,
+                const unsigned char *input, size_t ilen,
+                unsigned char *output );
+
+/* Internal use */
+MBEDTLS_CHECK_RETURN_TYPICAL
+int mbedtls_md_process( mbedtls_md_context_t *ctx, const unsigned char *data );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_MD_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md2.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md2.h
new file mode 100644
index 00000000000..7f3d5cf446c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md2.h
@@ -0,0 +1,305 @@
+/**
+ * \file md2.h
+ *
+ * \brief MD2 message digest algorithm (hash function)
+ *
+ * \warning MD2 is considered a weak message digest and its use constitutes a
+ *          security risk. We recommend considering stronger message digests
+ *          instead.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ */
+#ifndef MBEDTLS_MD2_H
+#define MBEDTLS_MD2_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/* MBEDTLS_ERR_MD2_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** MD2 hardware accelerator failed */
+#define MBEDTLS_ERR_MD2_HW_ACCEL_FAILED                   -0x002B
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_MD2_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          MD2 context structure
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+typedef struct mbedtls_md2_context
+{
+    unsigned char cksum[16];    /*!< checksum of the data block */
+    unsigned char state[48];    /*!< intermediate digest state  */
+    unsigned char buffer[16];   /*!< data block being processed */
+    size_t left;                /*!< amount of data in buffer   */
+}
+mbedtls_md2_context;
+
+#else  /* MBEDTLS_MD2_ALT */
+#include "md2_alt.h"
+#endif /* MBEDTLS_MD2_ALT */
+
+/**
+ * \brief          Initialize MD2 context
+ *
+ * \param ctx      MD2 context to be initialized
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void mbedtls_md2_init( mbedtls_md2_context *ctx );
+
+/**
+ * \brief          Clear MD2 context
+ *
+ * \param ctx      MD2 context to be cleared
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void mbedtls_md2_free( mbedtls_md2_context *ctx );
+
+/**
+ * \brief          Clone (the state of) an MD2 context
+ *
+ * \param dst      The destination context
+ * \param src      The context to be cloned
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void mbedtls_md2_clone( mbedtls_md2_context *dst,
+                        const mbedtls_md2_context *src );
+
+/**
+ * \brief          MD2 context setup
+ *
+ * \param ctx      context to be initialized
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md2_starts_ret( mbedtls_md2_context *ctx );
+
+/**
+ * \brief          MD2 process buffer
+ *
+ * \param ctx      MD2 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md2_update_ret( mbedtls_md2_context *ctx,
+                            const unsigned char *input,
+                            size_t ilen );
+
+/**
+ * \brief          MD2 final digest
+ *
+ * \param ctx      MD2 context
+ * \param output   MD2 checksum result
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md2_finish_ret( mbedtls_md2_context *ctx,
+                            unsigned char output[16] );
+
+/**
+ * \brief          MD2 process data block (internal use only)
+ *
+ * \param ctx      MD2 context
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_internal_md2_process( mbedtls_md2_context *ctx );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          MD2 context setup
+ *
+ * \deprecated     Superseded by mbedtls_md2_starts_ret() in 2.7.0
+ *
+ * \param ctx      context to be initialized
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md2_starts( mbedtls_md2_context *ctx );
+
+/**
+ * \brief          MD2 process buffer
+ *
+ * \deprecated     Superseded by mbedtls_md2_update_ret() in 2.7.0
+ *
+ * \param ctx      MD2 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md2_update( mbedtls_md2_context *ctx,
+                                            const unsigned char *input,
+                                            size_t ilen );
+
+/**
+ * \brief          MD2 final digest
+ *
+ * \deprecated     Superseded by mbedtls_md2_finish_ret() in 2.7.0
+ *
+ * \param ctx      MD2 context
+ * \param output   MD2 checksum result
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md2_finish( mbedtls_md2_context *ctx,
+                                            unsigned char output[16] );
+
+/**
+ * \brief          MD2 process data block (internal use only)
+ *
+ * \deprecated     Superseded by mbedtls_internal_md2_process() in 2.7.0
+ *
+ * \param ctx      MD2 context
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md2_process( mbedtls_md2_context *ctx );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief          Output = MD2( input buffer )
+ *
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ * \param output   MD2 checksum result
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md2_ret( const unsigned char *input,
+                     size_t ilen,
+                     unsigned char output[16] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          Output = MD2( input buffer )
+ *
+ * \deprecated     Superseded by mbedtls_md2_ret() in 2.7.0
+ *
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ * \param output   MD2 checksum result
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md2( const unsigned char *input,
+                                     size_t ilen,
+                                     unsigned char output[16] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ *
+ * \warning        MD2 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md2_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_md2.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md4.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md4.h
new file mode 100644
index 00000000000..0238c6723a6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md4.h
@@ -0,0 +1,310 @@
+/**
+ * \file md4.h
+ *
+ * \brief MD4 message digest algorithm (hash function)
+ *
+ * \warning MD4 is considered a weak message digest and its use constitutes a
+ *          security risk. We recommend considering stronger message digests
+ *          instead.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ */
+#ifndef MBEDTLS_MD4_H
+#define MBEDTLS_MD4_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_MD4_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** MD4 hardware accelerator failed */
+#define MBEDTLS_ERR_MD4_HW_ACCEL_FAILED                   -0x002D
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_MD4_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          MD4 context structure
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+typedef struct mbedtls_md4_context
+{
+    uint32_t total[2];          /*!< number of bytes processed  */
+    uint32_t state[4];          /*!< intermediate digest state  */
+    unsigned char buffer[64];   /*!< data block being processed */
+}
+mbedtls_md4_context;
+
+#else  /* MBEDTLS_MD4_ALT */
+#include "md4_alt.h"
+#endif /* MBEDTLS_MD4_ALT */
+
+/**
+ * \brief          Initialize MD4 context
+ *
+ * \param ctx      MD4 context to be initialized
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void mbedtls_md4_init( mbedtls_md4_context *ctx );
+
+/**
+ * \brief          Clear MD4 context
+ *
+ * \param ctx      MD4 context to be cleared
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void mbedtls_md4_free( mbedtls_md4_context *ctx );
+
+/**
+ * \brief          Clone (the state of) an MD4 context
+ *
+ * \param dst      The destination context
+ * \param src      The context to be cloned
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void mbedtls_md4_clone( mbedtls_md4_context *dst,
+                        const mbedtls_md4_context *src );
+
+/**
+ * \brief          MD4 context setup
+ *
+ * \param ctx      context to be initialized
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ */
+int mbedtls_md4_starts_ret( mbedtls_md4_context *ctx );
+
+/**
+ * \brief          MD4 process buffer
+ *
+ * \param ctx      MD4 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md4_update_ret( mbedtls_md4_context *ctx,
+                            const unsigned char *input,
+                            size_t ilen );
+
+/**
+ * \brief          MD4 final digest
+ *
+ * \param ctx      MD4 context
+ * \param output   MD4 checksum result
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md4_finish_ret( mbedtls_md4_context *ctx,
+                            unsigned char output[16] );
+
+/**
+ * \brief          MD4 process data block (internal use only)
+ *
+ * \param ctx      MD4 context
+ * \param data     buffer holding one block of data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_internal_md4_process( mbedtls_md4_context *ctx,
+                                  const unsigned char data[64] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          MD4 context setup
+ *
+ * \deprecated     Superseded by mbedtls_md4_starts_ret() in 2.7.0
+ *
+ * \param ctx      context to be initialized
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md4_starts( mbedtls_md4_context *ctx );
+
+/**
+ * \brief          MD4 process buffer
+ *
+ * \deprecated     Superseded by mbedtls_md4_update_ret() in 2.7.0
+ *
+ * \param ctx      MD4 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md4_update( mbedtls_md4_context *ctx,
+                                            const unsigned char *input,
+                                            size_t ilen );
+
+/**
+ * \brief          MD4 final digest
+ *
+ * \deprecated     Superseded by mbedtls_md4_finish_ret() in 2.7.0
+ *
+ * \param ctx      MD4 context
+ * \param output   MD4 checksum result
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md4_finish( mbedtls_md4_context *ctx,
+                                            unsigned char output[16] );
+
+/**
+ * \brief          MD4 process data block (internal use only)
+ *
+ * \deprecated     Superseded by mbedtls_internal_md4_process() in 2.7.0
+ *
+ * \param ctx      MD4 context
+ * \param data     buffer holding one block of data
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md4_process( mbedtls_md4_context *ctx,
+                                             const unsigned char data[64] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief          Output = MD4( input buffer )
+ *
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ * \param output   MD4 checksum result
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md4_ret( const unsigned char *input,
+                     size_t ilen,
+                     unsigned char output[16] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          Output = MD4( input buffer )
+ *
+ * \deprecated     Superseded by mbedtls_md4_ret() in 2.7.0
+ *
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ * \param output   MD4 checksum result
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md4( const unsigned char *input,
+                                     size_t ilen,
+                                     unsigned char output[16] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ *
+ * \warning        MD4 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md4_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_md4.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md5.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md5.h
new file mode 100644
index 00000000000..73e4dd2c2a7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md5.h
@@ -0,0 +1,310 @@
+/**
+ * \file md5.h
+ *
+ * \brief MD5 message digest algorithm (hash function)
+ *
+ * \warning   MD5 is considered a weak message digest and its use constitutes a
+ *            security risk. We recommend considering stronger message
+ *            digests instead.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_MD5_H
+#define MBEDTLS_MD5_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_MD5_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** MD5 hardware accelerator failed */
+#define MBEDTLS_ERR_MD5_HW_ACCEL_FAILED                   -0x002F
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_MD5_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          MD5 context structure
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+typedef struct mbedtls_md5_context
+{
+    uint32_t total[2];          /*!< number of bytes processed  */
+    uint32_t state[4];          /*!< intermediate digest state  */
+    unsigned char buffer[64];   /*!< data block being processed */
+}
+mbedtls_md5_context;
+
+#else  /* MBEDTLS_MD5_ALT */
+#include "md5_alt.h"
+#endif /* MBEDTLS_MD5_ALT */
+
+/**
+ * \brief          Initialize MD5 context
+ *
+ * \param ctx      MD5 context to be initialized
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void mbedtls_md5_init( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          Clear MD5 context
+ *
+ * \param ctx      MD5 context to be cleared
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void mbedtls_md5_free( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          Clone (the state of) an MD5 context
+ *
+ * \param dst      The destination context
+ * \param src      The context to be cloned
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void mbedtls_md5_clone( mbedtls_md5_context *dst,
+                        const mbedtls_md5_context *src );
+
+/**
+ * \brief          MD5 context setup
+ *
+ * \param ctx      context to be initialized
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md5_starts_ret( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          MD5 process buffer
+ *
+ * \param ctx      MD5 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md5_update_ret( mbedtls_md5_context *ctx,
+                            const unsigned char *input,
+                            size_t ilen );
+
+/**
+ * \brief          MD5 final digest
+ *
+ * \param ctx      MD5 context
+ * \param output   MD5 checksum result
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md5_finish_ret( mbedtls_md5_context *ctx,
+                            unsigned char output[16] );
+
+/**
+ * \brief          MD5 process data block (internal use only)
+ *
+ * \param ctx      MD5 context
+ * \param data     buffer holding one block of data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_internal_md5_process( mbedtls_md5_context *ctx,
+                                  const unsigned char data[64] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          MD5 context setup
+ *
+ * \deprecated     Superseded by mbedtls_md5_starts_ret() in 2.7.0
+ *
+ * \param ctx      context to be initialized
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md5_starts( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          MD5 process buffer
+ *
+ * \deprecated     Superseded by mbedtls_md5_update_ret() in 2.7.0
+ *
+ * \param ctx      MD5 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md5_update( mbedtls_md5_context *ctx,
+                                            const unsigned char *input,
+                                            size_t ilen );
+
+/**
+ * \brief          MD5 final digest
+ *
+ * \deprecated     Superseded by mbedtls_md5_finish_ret() in 2.7.0
+ *
+ * \param ctx      MD5 context
+ * \param output   MD5 checksum result
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md5_finish( mbedtls_md5_context *ctx,
+                                            unsigned char output[16] );
+
+/**
+ * \brief          MD5 process data block (internal use only)
+ *
+ * \deprecated     Superseded by mbedtls_internal_md5_process() in 2.7.0
+ *
+ * \param ctx      MD5 context
+ * \param data     buffer holding one block of data
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md5_process( mbedtls_md5_context *ctx,
+                                             const unsigned char data[64] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief          Output = MD5( input buffer )
+ *
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ * \param output   MD5 checksum result
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md5_ret( const unsigned char *input,
+                     size_t ilen,
+                     unsigned char output[16] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          Output = MD5( input buffer )
+ *
+ * \deprecated     Superseded by mbedtls_md5_ret() in 2.7.0
+ *
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ * \param output   MD5 checksum result
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md5( const unsigned char *input,
+                                     size_t ilen,
+                                     unsigned char output[16] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int mbedtls_md5_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_md5.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md_internal.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md_internal.h
new file mode 100644
index 00000000000..f33cdf6086d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/md_internal.h
@@ -0,0 +1,90 @@
+/**
+ * \file md_internal.h
+ *
+ * \brief Message digest wrappers.
+ *
+ * \warning This in an internal header. Do not include directly.
+ *
+ * \author Adriaan de Jong <dejong@fox-it.com>
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_MD_WRAP_H
+#define MBEDTLS_MD_WRAP_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/md.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Message digest information.
+ * Allows message digest functions to be called in a generic way.
+ */
+struct mbedtls_md_info_t
+{
+    /** Name of the message digest */
+    const char * name;
+
+    /** Digest identifier */
+    mbedtls_md_type_t type;
+
+    /** Output length of the digest function in bytes */
+    unsigned char size;
+
+    /** Block length of the digest function in bytes */
+    unsigned char block_size;
+};
+
+#if defined(MBEDTLS_MD2_C)
+extern const mbedtls_md_info_t mbedtls_md2_info;
+#endif
+#if defined(MBEDTLS_MD4_C)
+extern const mbedtls_md_info_t mbedtls_md4_info;
+#endif
+#if defined(MBEDTLS_MD5_C)
+extern const mbedtls_md_info_t mbedtls_md5_info;
+#endif
+#if defined(MBEDTLS_RIPEMD160_C)
+extern const mbedtls_md_info_t mbedtls_ripemd160_info;
+#endif
+#if defined(MBEDTLS_SHA1_C)
+extern const mbedtls_md_info_t mbedtls_sha1_info;
+#endif
+#if defined(MBEDTLS_SHA256_C)
+extern const mbedtls_md_info_t mbedtls_sha224_info;
+extern const mbedtls_md_info_t mbedtls_sha256_info;
+#endif
+#if defined(MBEDTLS_SHA512_C)
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
+extern const mbedtls_md_info_t mbedtls_sha384_info;
+#endif
+extern const mbedtls_md_info_t mbedtls_sha512_info;
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_MD_WRAP_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h
new file mode 100644
index 00000000000..233977252a3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/memory_buffer_alloc.h
@@ -0,0 +1,149 @@
+/**
+ * \file memory_buffer_alloc.h
+ *
+ * \brief Buffer-based memory allocator
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_MEMORY_BUFFER_ALLOC_H
+#define MBEDTLS_MEMORY_BUFFER_ALLOC_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_MEMORY_ALIGN_MULTIPLE)
+#define MBEDTLS_MEMORY_ALIGN_MULTIPLE       4 /**< Align on multiples of this value */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#define MBEDTLS_MEMORY_VERIFY_NONE         0
+#define MBEDTLS_MEMORY_VERIFY_ALLOC        (1 << 0)
+#define MBEDTLS_MEMORY_VERIFY_FREE         (1 << 1)
+#define MBEDTLS_MEMORY_VERIFY_ALWAYS       (MBEDTLS_MEMORY_VERIFY_ALLOC | MBEDTLS_MEMORY_VERIFY_FREE)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief   Initialize use of stack-based memory allocator.
+ *          The stack-based allocator does memory management inside the
+ *          presented buffer and does not call calloc() and free().
+ *          It sets the global mbedtls_calloc() and mbedtls_free() pointers
+ *          to its own functions.
+ *          (Provided mbedtls_calloc() and mbedtls_free() are thread-safe if
+ *           MBEDTLS_THREADING_C is defined)
+ *
+ * \note    This code is not optimized and provides a straight-forward
+ *          implementation of a stack-based memory allocator.
+ *
+ * \param buf   buffer to use as heap
+ * \param len   size of the buffer
+ */
+void mbedtls_memory_buffer_alloc_init( unsigned char *buf, size_t len );
+
+/**
+ * \brief   Free the mutex for thread-safety and clear remaining memory
+ */
+void mbedtls_memory_buffer_alloc_free( void );
+
+/**
+ * \brief   Determine when the allocator should automatically verify the state
+ *          of the entire chain of headers / meta-data.
+ *          (Default: MBEDTLS_MEMORY_VERIFY_NONE)
+ *
+ * \param verify    One of MBEDTLS_MEMORY_VERIFY_NONE, MBEDTLS_MEMORY_VERIFY_ALLOC,
+ *                  MBEDTLS_MEMORY_VERIFY_FREE or MBEDTLS_MEMORY_VERIFY_ALWAYS
+ */
+void mbedtls_memory_buffer_set_verify( int verify );
+
+#if defined(MBEDTLS_MEMORY_DEBUG)
+/**
+ * \brief   Print out the status of the allocated memory (primarily for use
+ *          after a program should have de-allocated all memory)
+ *          Prints out a list of 'still allocated' blocks and their stack
+ *          trace if MBEDTLS_MEMORY_BACKTRACE is defined.
+ */
+void mbedtls_memory_buffer_alloc_status( void );
+
+/**
+ * \brief   Get the peak heap usage so far
+ *
+ * \param max_used      Peak number of bytes in use or committed. This
+ *                      includes bytes in allocated blocks too small to split
+ *                      into smaller blocks but larger than the requested size.
+ * \param max_blocks    Peak number of blocks in use, including free and used
+ */
+void mbedtls_memory_buffer_alloc_max_get( size_t *max_used, size_t *max_blocks );
+
+/**
+ * \brief   Reset peak statistics
+ */
+void mbedtls_memory_buffer_alloc_max_reset( void );
+
+/**
+ * \brief   Get the current heap usage
+ *
+ * \param cur_used      Current number of bytes in use or committed. This
+ *                      includes bytes in allocated blocks too small to split
+ *                      into smaller blocks but larger than the requested size.
+ * \param cur_blocks    Current number of blocks in use, including free and used
+ */
+void mbedtls_memory_buffer_alloc_cur_get( size_t *cur_used, size_t *cur_blocks );
+#endif /* MBEDTLS_MEMORY_DEBUG */
+
+/**
+ * \brief   Verifies that all headers in the memory buffer are correct
+ *          and contain sane values. Helps debug buffer-overflow errors.
+ *
+ *          Prints out first failure if MBEDTLS_MEMORY_DEBUG is defined.
+ *          Prints out full header information if MBEDTLS_MEMORY_DEBUG
+ *          is defined. (Includes stack trace information for each block if
+ *          MBEDTLS_MEMORY_BACKTRACE is defined as well).
+ *
+ * \return             0 if verified, 1 otherwise
+ */
+int mbedtls_memory_buffer_alloc_verify( void );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if a test failed
+ */
+int mbedtls_memory_buffer_alloc_self_test( int verbose );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* memory_buffer_alloc.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/net.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/net.h
new file mode 100644
index 00000000000..66921887da0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/net.h
@@ -0,0 +1,35 @@
+/**
+ * \file net.h
+ *
+ * \brief Deprecated header file that includes net_sockets.h
+ *
+ * \deprecated Superseded by mbedtls/net_sockets.h
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#include "mbedtls/net_sockets.h"
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "Deprecated header file: Superseded by mbedtls/net_sockets.h"
+#endif /* MBEDTLS_DEPRECATED_WARNING */
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
new file mode 100644
index 00000000000..ceb7d5f6527
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
@@ -0,0 +1,301 @@
+/**
+ * \file net_sockets.h
+ *
+ * \brief   Network sockets abstraction layer to integrate Mbed TLS into a
+ *          BSD-style sockets API.
+ *
+ *          The network sockets module provides an example integration of the
+ *          Mbed TLS library into a BSD sockets implementation. The module is
+ *          intended to be an example of how Mbed TLS can be integrated into a
+ *          networking stack, as well as to be Mbed TLS's network integration
+ *          for its supported platforms.
+ *
+ *          The module is intended only to be used with the Mbed TLS library and
+ *          is not intended to be used by third party application software
+ *          directly.
+ *
+ *          The supported platforms are as follows:
+ *              * Microsoft Windows and Windows CE
+ *              * POSIX/Unix platforms including Linux, OS X
+ *
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_NET_SOCKETS_H
+#define MBEDTLS_NET_SOCKETS_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/ssl.h"
+
+#include <stddef.h>
+#include <stdint.h>
+
+/** Failed to open a socket. */
+#define MBEDTLS_ERR_NET_SOCKET_FAILED                     -0x0042
+/** The connection to the given server / port failed. */
+#define MBEDTLS_ERR_NET_CONNECT_FAILED                    -0x0044
+/** Binding of the socket failed. */
+#define MBEDTLS_ERR_NET_BIND_FAILED                       -0x0046
+/** Could not listen on the socket. */
+#define MBEDTLS_ERR_NET_LISTEN_FAILED                     -0x0048
+/** Could not accept the incoming connection. */
+#define MBEDTLS_ERR_NET_ACCEPT_FAILED                     -0x004A
+/** Reading information from the socket failed. */
+#define MBEDTLS_ERR_NET_RECV_FAILED                       -0x004C
+/** Sending information through the socket failed. */
+#define MBEDTLS_ERR_NET_SEND_FAILED                       -0x004E
+/** Connection was reset by peer. */
+#define MBEDTLS_ERR_NET_CONN_RESET                        -0x0050
+/** Failed to get an IP address for the given hostname. */
+#define MBEDTLS_ERR_NET_UNKNOWN_HOST                      -0x0052
+/** Buffer is too small to hold the data. */
+#define MBEDTLS_ERR_NET_BUFFER_TOO_SMALL                  -0x0043
+/** The context is invalid, eg because it was free()ed. */
+#define MBEDTLS_ERR_NET_INVALID_CONTEXT                   -0x0045
+/** Polling the net context failed. */
+#define MBEDTLS_ERR_NET_POLL_FAILED                       -0x0047
+/** Input invalid. */
+#define MBEDTLS_ERR_NET_BAD_INPUT_DATA                    -0x0049
+
+#define MBEDTLS_NET_LISTEN_BACKLOG         10 /**< The backlog that listen() should use. */
+
+#define MBEDTLS_NET_PROTO_TCP 0 /**< The TCP transport protocol */
+#define MBEDTLS_NET_PROTO_UDP 1 /**< The UDP transport protocol */
+
+#define MBEDTLS_NET_POLL_READ  1 /**< Used in \c mbedtls_net_poll to check for pending data  */
+#define MBEDTLS_NET_POLL_WRITE 2 /**< Used in \c mbedtls_net_poll to check if write possible */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Wrapper type for sockets.
+ *
+ * Currently backed by just a file descriptor, but might be more in the future
+ * (eg two file descriptors for combined IPv4 + IPv6 support, or additional
+ * structures for hand-made UDP demultiplexing).
+ */
+typedef struct mbedtls_net_context
+{
+    int fd;             /**< The underlying file descriptor                 */
+}
+mbedtls_net_context;
+
+/**
+ * \brief          Initialize a context
+ *                 Just makes the context ready to be used or freed safely.
+ *
+ * \param ctx      Context to initialize
+ */
+void mbedtls_net_init( mbedtls_net_context *ctx );
+
+/**
+ * \brief          Initiate a connection with host:port in the given protocol
+ *
+ * \param ctx      Socket to use
+ * \param host     Host to connect to
+ * \param port     Port to connect to
+ * \param proto    Protocol: MBEDTLS_NET_PROTO_TCP or MBEDTLS_NET_PROTO_UDP
+ *
+ * \return         0 if successful, or one of:
+ *                      MBEDTLS_ERR_NET_SOCKET_FAILED,
+ *                      MBEDTLS_ERR_NET_UNKNOWN_HOST,
+ *                      MBEDTLS_ERR_NET_CONNECT_FAILED
+ *
+ * \note           Sets the socket in connected mode even with UDP.
+ */
+int mbedtls_net_connect( mbedtls_net_context *ctx, const char *host, const char *port, int proto );
+
+/**
+ * \brief          Create a receiving socket on bind_ip:port in the chosen
+ *                 protocol. If bind_ip == NULL, all interfaces are bound.
+ *
+ * \param ctx      Socket to use
+ * \param bind_ip  IP to bind to, can be NULL
+ * \param port     Port number to use
+ * \param proto    Protocol: MBEDTLS_NET_PROTO_TCP or MBEDTLS_NET_PROTO_UDP
+ *
+ * \return         0 if successful, or one of:
+ *                      MBEDTLS_ERR_NET_SOCKET_FAILED,
+ *                      MBEDTLS_ERR_NET_UNKNOWN_HOST,
+ *                      MBEDTLS_ERR_NET_BIND_FAILED,
+ *                      MBEDTLS_ERR_NET_LISTEN_FAILED
+ *
+ * \note           Regardless of the protocol, opens the sockets and binds it.
+ *                 In addition, make the socket listening if protocol is TCP.
+ */
+int mbedtls_net_bind( mbedtls_net_context *ctx, const char *bind_ip, const char *port, int proto );
+
+/**
+ * \brief           Accept a connection from a remote client
+ *
+ * \param bind_ctx  Relevant socket
+ * \param client_ctx Will contain the connected client socket
+ * \param client_ip Will contain the client IP address, can be NULL
+ * \param buf_size  Size of the client_ip buffer
+ * \param ip_len    Will receive the size of the client IP written,
+ *                  can be NULL if client_ip is null
+ *
+ * \return          0 if successful, or
+ *                  MBEDTLS_ERR_NET_SOCKET_FAILED,
+ *                  MBEDTLS_ERR_NET_BIND_FAILED,
+ *                  MBEDTLS_ERR_NET_ACCEPT_FAILED, or
+ *                  MBEDTLS_ERR_NET_BUFFER_TOO_SMALL if buf_size is too small,
+ *                  MBEDTLS_ERR_SSL_WANT_READ if bind_fd was set to
+ *                  non-blocking and accept() would block.
+ */
+int mbedtls_net_accept( mbedtls_net_context *bind_ctx,
+                        mbedtls_net_context *client_ctx,
+                        void *client_ip, size_t buf_size, size_t *ip_len );
+
+/**
+ * \brief          Check and wait for the context to be ready for read/write
+ *
+ * \note           The current implementation of this function uses
+ *                 select() and returns an error if the file descriptor
+ *                 is \c FD_SETSIZE or greater.
+ *
+ * \param ctx      Socket to check
+ * \param rw       Bitflag composed of MBEDTLS_NET_POLL_READ and
+ *                 MBEDTLS_NET_POLL_WRITE specifying the events
+ *                 to wait for:
+ *                 - If MBEDTLS_NET_POLL_READ is set, the function
+ *                   will return as soon as the net context is available
+ *                   for reading.
+ *                 - If MBEDTLS_NET_POLL_WRITE is set, the function
+ *                   will return as soon as the net context is available
+ *                   for writing.
+ * \param timeout  Maximal amount of time to wait before returning,
+ *                 in milliseconds. If \c timeout is zero, the
+ *                 function returns immediately. If \c timeout is
+ *                 -1u, the function blocks potentially indefinitely.
+ *
+ * \return         Bitmask composed of MBEDTLS_NET_POLL_READ/WRITE
+ *                 on success or timeout, or a negative return code otherwise.
+ */
+int mbedtls_net_poll( mbedtls_net_context *ctx, uint32_t rw, uint32_t timeout );
+
+/**
+ * \brief          Set the socket blocking
+ *
+ * \param ctx      Socket to set
+ *
+ * \return         0 if successful, or a non-zero error code
+ */
+int mbedtls_net_set_block( mbedtls_net_context *ctx );
+
+/**
+ * \brief          Set the socket non-blocking
+ *
+ * \param ctx      Socket to set
+ *
+ * \return         0 if successful, or a non-zero error code
+ */
+int mbedtls_net_set_nonblock( mbedtls_net_context *ctx );
+
+/**
+ * \brief          Portable usleep helper
+ *
+ * \param usec     Amount of microseconds to sleep
+ *
+ * \note           Real amount of time slept will not be less than
+ *                 select()'s timeout granularity (typically, 10ms).
+ */
+void mbedtls_net_usleep( unsigned long usec );
+
+/**
+ * \brief          Read at most 'len' characters. If no error occurs,
+ *                 the actual amount read is returned.
+ *
+ * \param ctx      Socket
+ * \param buf      The buffer to write to
+ * \param len      Maximum length of the buffer
+ *
+ * \return         the number of bytes received,
+ *                 or a non-zero error code; with a non-blocking socket,
+ *                 MBEDTLS_ERR_SSL_WANT_READ indicates read() would block.
+ */
+int mbedtls_net_recv( void *ctx, unsigned char *buf, size_t len );
+
+/**
+ * \brief          Write at most 'len' characters. If no error occurs,
+ *                 the actual amount read is returned.
+ *
+ * \param ctx      Socket
+ * \param buf      The buffer to read from
+ * \param len      The length of the buffer
+ *
+ * \return         the number of bytes sent,
+ *                 or a non-zero error code; with a non-blocking socket,
+ *                 MBEDTLS_ERR_SSL_WANT_WRITE indicates write() would block.
+ */
+int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len );
+
+/**
+ * \brief          Read at most 'len' characters, blocking for at most
+ *                 'timeout' seconds. If no error occurs, the actual amount
+ *                 read is returned.
+ *
+ * \note           The current implementation of this function uses
+ *                 select() and returns an error if the file descriptor
+ *                 is \c FD_SETSIZE or greater.
+ *
+ * \param ctx      Socket
+ * \param buf      The buffer to write to
+ * \param len      Maximum length of the buffer
+ * \param timeout  Maximum number of milliseconds to wait for data
+ *                 0 means no timeout (wait forever)
+ *
+ * \return         The number of bytes received if successful.
+ *                 MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out.
+ *                 MBEDTLS_ERR_SSL_WANT_READ if interrupted by a signal.
+ *                 Another negative error code (MBEDTLS_ERR_NET_xxx)
+ *                 for other failures.
+ *
+ * \note           This function will block (until data becomes available or
+ *                 timeout is reached) even if the socket is set to
+ *                 non-blocking. Handling timeouts with non-blocking reads
+ *                 requires a different strategy.
+ */
+int mbedtls_net_recv_timeout( void *ctx, unsigned char *buf, size_t len,
+                      uint32_t timeout );
+
+/**
+ * \brief          Closes down the connection and free associated data
+ *
+ * \param ctx      The context to close
+ */
+void mbedtls_net_close( mbedtls_net_context *ctx );
+
+/**
+ * \brief          Gracefully shutdown the connection and free associated data
+ *
+ * \param ctx      The context to free
+ */
+void mbedtls_net_free( mbedtls_net_context *ctx );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* net_sockets.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h
new file mode 100644
index 00000000000..7f3e64a525d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/nist_kw.h
@@ -0,0 +1,182 @@
+/**
+ * \file nist_kw.h
+ *
+ * \brief This file provides an API for key wrapping (KW) and key wrapping with
+ *        padding (KWP) as defined in NIST SP 800-38F.
+ *        https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-38F.pdf
+ *
+ *        Key wrapping specifies a deterministic authenticated-encryption mode
+ *        of operation, according to <em>NIST SP 800-38F: Recommendation for
+ *        Block Cipher Modes of Operation: Methods for Key Wrapping</em>. Its
+ *        purpose is to protect cryptographic keys.
+ *
+ *        Its equivalent is RFC 3394 for KW, and RFC 5649 for KWP.
+ *        https://tools.ietf.org/html/rfc3394
+ *        https://tools.ietf.org/html/rfc5649
+ *
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_NIST_KW_H
+#define MBEDTLS_NIST_KW_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/cipher.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum
+{
+    MBEDTLS_KW_MODE_KW = 0,
+    MBEDTLS_KW_MODE_KWP = 1
+} mbedtls_nist_kw_mode_t;
+
+#if !defined(MBEDTLS_NIST_KW_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief    The key wrapping context-type definition. The key wrapping context is passed
+ *           to the APIs called.
+ *
+ * \note     The definition of this type may change in future library versions.
+ *           Don't make any assumptions on this context!
+ */
+typedef struct {
+    mbedtls_cipher_context_t cipher_ctx;    /*!< The cipher context used. */
+} mbedtls_nist_kw_context;
+
+#else  /* MBEDTLS_NIST_key wrapping_ALT */
+#include "nist_kw_alt.h"
+#endif /* MBEDTLS_NIST_KW_ALT */
+
+/**
+ * \brief           This function initializes the specified key wrapping context
+ *                  to make references valid and prepare the context
+ *                  for mbedtls_nist_kw_setkey() or mbedtls_nist_kw_free().
+ *
+ * \param ctx       The key wrapping context to initialize.
+ *
+ */
+void mbedtls_nist_kw_init( mbedtls_nist_kw_context *ctx );
+
+/**
+ * \brief           This function initializes the key wrapping context set in the
+ *                  \p ctx parameter and sets the encryption key.
+ *
+ * \param ctx       The key wrapping context.
+ * \param cipher    The 128-bit block cipher to use. Only AES is supported.
+ * \param key       The Key Encryption Key (KEK).
+ * \param keybits   The KEK size in bits. This must be acceptable by the cipher.
+ * \param is_wrap   Specify whether the operation within the context is wrapping or unwrapping
+ *
+ * \return          \c 0 on success.
+ * \return          \c MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA for any invalid input.
+ * \return          \c MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE for 128-bit block ciphers
+ *                  which are not supported.
+ * \return          cipher-specific error code on failure of the underlying cipher.
+ */
+int mbedtls_nist_kw_setkey( mbedtls_nist_kw_context *ctx,
+                            mbedtls_cipher_id_t cipher,
+                            const unsigned char *key,
+                            unsigned int keybits,
+                            const int is_wrap );
+
+/**
+ * \brief   This function releases and clears the specified key wrapping context
+ *          and underlying cipher sub-context.
+ *
+ * \param ctx       The key wrapping context to clear.
+ */
+void mbedtls_nist_kw_free( mbedtls_nist_kw_context *ctx );
+
+/**
+ * \brief           This function encrypts a buffer using key wrapping.
+ *
+ * \param ctx       The key wrapping context to use for encryption.
+ * \param mode      The key wrapping mode to use (MBEDTLS_KW_MODE_KW or MBEDTLS_KW_MODE_KWP)
+ * \param input     The buffer holding the input data.
+ * \param in_len    The length of the input data in Bytes.
+ *                  The input uses units of 8 Bytes called semiblocks.
+ *                  <ul><li>For KW mode: a multiple of 8 bytes between 16 and 2^57-8 inclusive. </li>
+ *                  <li>For KWP mode: any length between 1 and 2^32-1 inclusive.</li></ul>
+ * \param[out] output    The buffer holding the output data.
+ *                  <ul><li>For KW mode: Must be at least 8 bytes larger than \p in_len.</li>
+ *                  <li>For KWP mode: Must be at least 8 bytes larger rounded up to a multiple of
+ *                  8 bytes for KWP (15 bytes at most).</li></ul>
+ * \param[out] out_len The number of bytes written to the output buffer. \c 0 on failure.
+ * \param[in] out_size The capacity of the output buffer.
+ *
+ * \return          \c 0 on success.
+ * \return          \c MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA for invalid input length.
+ * \return          cipher-specific error code on failure of the underlying cipher.
+ */
+int mbedtls_nist_kw_wrap( mbedtls_nist_kw_context *ctx, mbedtls_nist_kw_mode_t mode,
+                          const unsigned char *input, size_t in_len,
+                          unsigned char *output, size_t* out_len, size_t out_size );
+
+/**
+ * \brief           This function decrypts a buffer using key wrapping.
+ *
+ * \param ctx       The key wrapping context to use for decryption.
+ * \param mode      The key wrapping mode to use (MBEDTLS_KW_MODE_KW or MBEDTLS_KW_MODE_KWP)
+ * \param input     The buffer holding the input data.
+ * \param in_len    The length of the input data in Bytes.
+ *                  The input uses units of 8 Bytes called semiblocks.
+ *                  The input must be a multiple of semiblocks.
+ *                  <ul><li>For KW mode: a multiple of 8 bytes between 24 and 2^57 inclusive. </li>
+ *                  <li>For KWP mode: a multiple of 8 bytes between 16 and 2^32 inclusive.</li></ul>
+ * \param[out] output    The buffer holding the output data.
+ *                  The output buffer's minimal length is 8 bytes shorter than \p in_len.
+ * \param[out] out_len The number of bytes written to the output buffer. \c 0 on failure.
+ *                  For KWP mode, the length could be up to 15 bytes shorter than \p in_len,
+ *                  depending on how much padding was added to the data.
+ * \param[in] out_size The capacity of the output buffer.
+ *
+ * \return          \c 0 on success.
+ * \return          \c MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA for invalid input length.
+ * \return          \c MBEDTLS_ERR_CIPHER_AUTH_FAILED for verification failure of the ciphertext.
+ * \return          cipher-specific error code on failure of the underlying cipher.
+ */
+int mbedtls_nist_kw_unwrap( mbedtls_nist_kw_context *ctx, mbedtls_nist_kw_mode_t mode,
+                            const unsigned char *input, size_t in_len,
+                            unsigned char *output, size_t* out_len, size_t out_size);
+
+
+#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C)
+/**
+ * \brief          The key wrapping checkup routine.
+ *
+ * \return         \c 0 on success.
+ * \return         \c 1 on failure.
+ */
+int mbedtls_nist_kw_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_NIST_KW_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/oid.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/oid.h
new file mode 100644
index 00000000000..1c39186a491
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/oid.h
@@ -0,0 +1,649 @@
+/**
+ * \file oid.h
+ *
+ * \brief Object Identifier (OID) database
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_OID_H
+#define MBEDTLS_OID_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/asn1.h"
+#include "mbedtls/pk.h"
+
+#include <stddef.h>
+
+#if defined(MBEDTLS_CIPHER_C)
+#include "mbedtls/cipher.h"
+#endif
+
+#if defined(MBEDTLS_MD_C)
+#include "mbedtls/md.h"
+#endif
+
+/** OID is not found. */
+#define MBEDTLS_ERR_OID_NOT_FOUND                         -0x002E
+/** output buffer is too small */
+#define MBEDTLS_ERR_OID_BUF_TOO_SMALL                     -0x000B
+
+/* This is for the benefit of X.509, but defined here in order to avoid
+ * having a "backwards" include of x.509.h here */
+/*
+ * X.509 extension types (internal, arbitrary values for bitsets)
+ */
+#define MBEDTLS_OID_X509_EXT_AUTHORITY_KEY_IDENTIFIER    (1 << 0)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_KEY_IDENTIFIER      (1 << 1)
+#define MBEDTLS_OID_X509_EXT_KEY_USAGE                   (1 << 2)
+#define MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES        (1 << 3)
+#define MBEDTLS_OID_X509_EXT_POLICY_MAPPINGS             (1 << 4)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_ALT_NAME            (1 << 5)
+#define MBEDTLS_OID_X509_EXT_ISSUER_ALT_NAME             (1 << 6)
+#define MBEDTLS_OID_X509_EXT_SUBJECT_DIRECTORY_ATTRS     (1 << 7)
+#define MBEDTLS_OID_X509_EXT_BASIC_CONSTRAINTS           (1 << 8)
+#define MBEDTLS_OID_X509_EXT_NAME_CONSTRAINTS            (1 << 9)
+#define MBEDTLS_OID_X509_EXT_POLICY_CONSTRAINTS          (1 << 10)
+#define MBEDTLS_OID_X509_EXT_EXTENDED_KEY_USAGE          (1 << 11)
+#define MBEDTLS_OID_X509_EXT_CRL_DISTRIBUTION_POINTS     (1 << 12)
+#define MBEDTLS_OID_X509_EXT_INIHIBIT_ANYPOLICY          (1 << 13)
+#define MBEDTLS_OID_X509_EXT_FRESHEST_CRL                (1 << 14)
+#define MBEDTLS_OID_X509_EXT_NS_CERT_TYPE                (1 << 16)
+
+/*
+ * Top level OID tuples
+ */
+#define MBEDTLS_OID_ISO_MEMBER_BODIES           "\x2a"          /* {iso(1) member-body(2)} */
+#define MBEDTLS_OID_ISO_IDENTIFIED_ORG          "\x2b"          /* {iso(1) identified-organization(3)} */
+#define MBEDTLS_OID_ISO_CCITT_DS                "\x55"          /* {joint-iso-ccitt(2) ds(5)} */
+#define MBEDTLS_OID_ISO_ITU_COUNTRY             "\x60"          /* {joint-iso-itu-t(2) country(16)} */
+
+/*
+ * ISO Member bodies OID parts
+ */
+#define MBEDTLS_OID_COUNTRY_US                  "\x86\x48"      /* {us(840)} */
+#define MBEDTLS_OID_ORG_RSA_DATA_SECURITY       "\x86\xf7\x0d"  /* {rsadsi(113549)} */
+#define MBEDTLS_OID_RSA_COMPANY                 MBEDTLS_OID_ISO_MEMBER_BODIES MBEDTLS_OID_COUNTRY_US \
+                                        MBEDTLS_OID_ORG_RSA_DATA_SECURITY /* {iso(1) member-body(2) us(840) rsadsi(113549)} */
+#define MBEDTLS_OID_ORG_ANSI_X9_62              "\xce\x3d" /* ansi-X9-62(10045) */
+#define MBEDTLS_OID_ANSI_X9_62                  MBEDTLS_OID_ISO_MEMBER_BODIES MBEDTLS_OID_COUNTRY_US \
+                                        MBEDTLS_OID_ORG_ANSI_X9_62
+
+/*
+ * ISO Identified organization OID parts
+ */
+#define MBEDTLS_OID_ORG_DOD                     "\x06"          /* {dod(6)} */
+#define MBEDTLS_OID_ORG_OIW                     "\x0e"
+#define MBEDTLS_OID_OIW_SECSIG                  MBEDTLS_OID_ORG_OIW "\x03"
+#define MBEDTLS_OID_OIW_SECSIG_ALG              MBEDTLS_OID_OIW_SECSIG "\x02"
+#define MBEDTLS_OID_OIW_SECSIG_SHA1             MBEDTLS_OID_OIW_SECSIG_ALG "\x1a"
+#define MBEDTLS_OID_ORG_CERTICOM                "\x81\x04"  /* certicom(132) */
+#define MBEDTLS_OID_CERTICOM                    MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_CERTICOM
+#define MBEDTLS_OID_ORG_TELETRUST               "\x24" /* teletrust(36) */
+#define MBEDTLS_OID_TELETRUST                   MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_TELETRUST
+
+/*
+ * ISO ITU OID parts
+ */
+#define MBEDTLS_OID_ORGANIZATION                "\x01"          /* {organization(1)} */
+#define MBEDTLS_OID_ISO_ITU_US_ORG              MBEDTLS_OID_ISO_ITU_COUNTRY MBEDTLS_OID_COUNTRY_US MBEDTLS_OID_ORGANIZATION /* {joint-iso-itu-t(2) country(16) us(840) organization(1)} */
+
+#define MBEDTLS_OID_ORG_GOV                     "\x65"          /* {gov(101)} */
+#define MBEDTLS_OID_GOV                         MBEDTLS_OID_ISO_ITU_US_ORG MBEDTLS_OID_ORG_GOV /* {joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101)} */
+
+#define MBEDTLS_OID_ORG_NETSCAPE                "\x86\xF8\x42"  /* {netscape(113730)} */
+#define MBEDTLS_OID_NETSCAPE                    MBEDTLS_OID_ISO_ITU_US_ORG MBEDTLS_OID_ORG_NETSCAPE /* Netscape OID {joint-iso-itu-t(2) country(16) us(840) organization(1) netscape(113730)} */
+
+/* ISO arc for standard certificate and CRL extensions */
+#define MBEDTLS_OID_ID_CE                       MBEDTLS_OID_ISO_CCITT_DS "\x1D" /**< id-ce OBJECT IDENTIFIER  ::=  {joint-iso-ccitt(2) ds(5) 29} */
+
+#define MBEDTLS_OID_NIST_ALG                    MBEDTLS_OID_GOV "\x03\x04" /** { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistAlgorithm(4) */
+
+/**
+ * Private Internet Extensions
+ * { iso(1) identified-organization(3) dod(6) internet(1)
+ *                      security(5) mechanisms(5) pkix(7) }
+ */
+#define MBEDTLS_OID_INTERNET                    MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_DOD "\x01"
+#define MBEDTLS_OID_PKIX                        MBEDTLS_OID_INTERNET "\x05\x05\x07"
+
+/*
+ * Arc for standard naming attributes
+ */
+#define MBEDTLS_OID_AT                          MBEDTLS_OID_ISO_CCITT_DS "\x04" /**< id-at OBJECT IDENTIFIER ::= {joint-iso-ccitt(2) ds(5) 4} */
+#define MBEDTLS_OID_AT_CN                       MBEDTLS_OID_AT "\x03" /**< id-at-commonName AttributeType:= {id-at 3} */
+#define MBEDTLS_OID_AT_SUR_NAME                 MBEDTLS_OID_AT "\x04" /**< id-at-surName AttributeType:= {id-at 4} */
+#define MBEDTLS_OID_AT_SERIAL_NUMBER            MBEDTLS_OID_AT "\x05" /**< id-at-serialNumber AttributeType:= {id-at 5} */
+#define MBEDTLS_OID_AT_COUNTRY                  MBEDTLS_OID_AT "\x06" /**< id-at-countryName AttributeType:= {id-at 6} */
+#define MBEDTLS_OID_AT_LOCALITY                 MBEDTLS_OID_AT "\x07" /**< id-at-locality AttributeType:= {id-at 7} */
+#define MBEDTLS_OID_AT_STATE                    MBEDTLS_OID_AT "\x08" /**< id-at-state AttributeType:= {id-at 8} */
+#define MBEDTLS_OID_AT_ORGANIZATION             MBEDTLS_OID_AT "\x0A" /**< id-at-organizationName AttributeType:= {id-at 10} */
+#define MBEDTLS_OID_AT_ORG_UNIT                 MBEDTLS_OID_AT "\x0B" /**< id-at-organizationalUnitName AttributeType:= {id-at 11} */
+#define MBEDTLS_OID_AT_TITLE                    MBEDTLS_OID_AT "\x0C" /**< id-at-title AttributeType:= {id-at 12} */
+#define MBEDTLS_OID_AT_POSTAL_ADDRESS           MBEDTLS_OID_AT "\x10" /**< id-at-postalAddress AttributeType:= {id-at 16} */
+#define MBEDTLS_OID_AT_POSTAL_CODE              MBEDTLS_OID_AT "\x11" /**< id-at-postalCode AttributeType:= {id-at 17} */
+#define MBEDTLS_OID_AT_GIVEN_NAME               MBEDTLS_OID_AT "\x2A" /**< id-at-givenName AttributeType:= {id-at 42} */
+#define MBEDTLS_OID_AT_INITIALS                 MBEDTLS_OID_AT "\x2B" /**< id-at-initials AttributeType:= {id-at 43} */
+#define MBEDTLS_OID_AT_GENERATION_QUALIFIER     MBEDTLS_OID_AT "\x2C" /**< id-at-generationQualifier AttributeType:= {id-at 44} */
+#define MBEDTLS_OID_AT_UNIQUE_IDENTIFIER        MBEDTLS_OID_AT "\x2D" /**< id-at-uniqueIdentifier AttributType:= {id-at 45} */
+#define MBEDTLS_OID_AT_DN_QUALIFIER             MBEDTLS_OID_AT "\x2E" /**< id-at-dnQualifier AttributeType:= {id-at 46} */
+#define MBEDTLS_OID_AT_PSEUDONYM                MBEDTLS_OID_AT "\x41" /**< id-at-pseudonym AttributeType:= {id-at 65} */
+
+#define MBEDTLS_OID_DOMAIN_COMPONENT            "\x09\x92\x26\x89\x93\xF2\x2C\x64\x01\x19" /** id-domainComponent AttributeType:= {itu-t(0) data(9) pss(2342) ucl(19200300) pilot(100) pilotAttributeType(1) domainComponent(25)} */
+
+/*
+ * OIDs for standard certificate extensions
+ */
+#define MBEDTLS_OID_AUTHORITY_KEY_IDENTIFIER    MBEDTLS_OID_ID_CE "\x23" /**< id-ce-authorityKeyIdentifier OBJECT IDENTIFIER ::=  { id-ce 35 } */
+#define MBEDTLS_OID_SUBJECT_KEY_IDENTIFIER      MBEDTLS_OID_ID_CE "\x0E" /**< id-ce-subjectKeyIdentifier OBJECT IDENTIFIER ::=  { id-ce 14 } */
+#define MBEDTLS_OID_KEY_USAGE                   MBEDTLS_OID_ID_CE "\x0F" /**< id-ce-keyUsage OBJECT IDENTIFIER ::=  { id-ce 15 } */
+#define MBEDTLS_OID_CERTIFICATE_POLICIES        MBEDTLS_OID_ID_CE "\x20" /**< id-ce-certificatePolicies OBJECT IDENTIFIER ::=  { id-ce 32 } */
+#define MBEDTLS_OID_POLICY_MAPPINGS             MBEDTLS_OID_ID_CE "\x21" /**< id-ce-policyMappings OBJECT IDENTIFIER ::=  { id-ce 33 } */
+#define MBEDTLS_OID_SUBJECT_ALT_NAME            MBEDTLS_OID_ID_CE "\x11" /**< id-ce-subjectAltName OBJECT IDENTIFIER ::=  { id-ce 17 } */
+#define MBEDTLS_OID_ISSUER_ALT_NAME             MBEDTLS_OID_ID_CE "\x12" /**< id-ce-issuerAltName OBJECT IDENTIFIER ::=  { id-ce 18 } */
+#define MBEDTLS_OID_SUBJECT_DIRECTORY_ATTRS     MBEDTLS_OID_ID_CE "\x09" /**< id-ce-subjectDirectoryAttributes OBJECT IDENTIFIER ::=  { id-ce 9 } */
+#define MBEDTLS_OID_BASIC_CONSTRAINTS           MBEDTLS_OID_ID_CE "\x13" /**< id-ce-basicConstraints OBJECT IDENTIFIER ::=  { id-ce 19 } */
+#define MBEDTLS_OID_NAME_CONSTRAINTS            MBEDTLS_OID_ID_CE "\x1E" /**< id-ce-nameConstraints OBJECT IDENTIFIER ::=  { id-ce 30 } */
+#define MBEDTLS_OID_POLICY_CONSTRAINTS          MBEDTLS_OID_ID_CE "\x24" /**< id-ce-policyConstraints OBJECT IDENTIFIER ::=  { id-ce 36 } */
+#define MBEDTLS_OID_EXTENDED_KEY_USAGE          MBEDTLS_OID_ID_CE "\x25" /**< id-ce-extKeyUsage OBJECT IDENTIFIER ::= { id-ce 37 } */
+#define MBEDTLS_OID_CRL_DISTRIBUTION_POINTS     MBEDTLS_OID_ID_CE "\x1F" /**< id-ce-cRLDistributionPoints OBJECT IDENTIFIER ::=  { id-ce 31 } */
+#define MBEDTLS_OID_INIHIBIT_ANYPOLICY          MBEDTLS_OID_ID_CE "\x36" /**< id-ce-inhibitAnyPolicy OBJECT IDENTIFIER ::=  { id-ce 54 } */
+#define MBEDTLS_OID_FRESHEST_CRL                MBEDTLS_OID_ID_CE "\x2E" /**< id-ce-freshestCRL OBJECT IDENTIFIER ::=  { id-ce 46 } */
+
+/*
+ * Certificate policies
+ */
+#define MBEDTLS_OID_ANY_POLICY              MBEDTLS_OID_CERTIFICATE_POLICIES "\x00" /**< anyPolicy OBJECT IDENTIFIER ::= { id-ce-certificatePolicies 0 } */
+
+/*
+ * Netscape certificate extensions
+ */
+#define MBEDTLS_OID_NS_CERT                 MBEDTLS_OID_NETSCAPE "\x01"
+#define MBEDTLS_OID_NS_CERT_TYPE            MBEDTLS_OID_NS_CERT  "\x01"
+#define MBEDTLS_OID_NS_BASE_URL             MBEDTLS_OID_NS_CERT  "\x02"
+#define MBEDTLS_OID_NS_REVOCATION_URL       MBEDTLS_OID_NS_CERT  "\x03"
+#define MBEDTLS_OID_NS_CA_REVOCATION_URL    MBEDTLS_OID_NS_CERT  "\x04"
+#define MBEDTLS_OID_NS_RENEWAL_URL          MBEDTLS_OID_NS_CERT  "\x07"
+#define MBEDTLS_OID_NS_CA_POLICY_URL        MBEDTLS_OID_NS_CERT  "\x08"
+#define MBEDTLS_OID_NS_SSL_SERVER_NAME      MBEDTLS_OID_NS_CERT  "\x0C"
+#define MBEDTLS_OID_NS_COMMENT              MBEDTLS_OID_NS_CERT  "\x0D"
+#define MBEDTLS_OID_NS_DATA_TYPE            MBEDTLS_OID_NETSCAPE "\x02"
+#define MBEDTLS_OID_NS_CERT_SEQUENCE        MBEDTLS_OID_NS_DATA_TYPE "\x05"
+
+/*
+ * OIDs for CRL extensions
+ */
+#define MBEDTLS_OID_PRIVATE_KEY_USAGE_PERIOD    MBEDTLS_OID_ID_CE "\x10"
+#define MBEDTLS_OID_CRL_NUMBER                  MBEDTLS_OID_ID_CE "\x14" /**< id-ce-cRLNumber OBJECT IDENTIFIER ::= { id-ce 20 } */
+
+/*
+ * X.509 v3 Extended key usage OIDs
+ */
+#define MBEDTLS_OID_ANY_EXTENDED_KEY_USAGE      MBEDTLS_OID_EXTENDED_KEY_USAGE "\x00" /**< anyExtendedKeyUsage OBJECT IDENTIFIER ::= { id-ce-extKeyUsage 0 } */
+
+#define MBEDTLS_OID_KP                          MBEDTLS_OID_PKIX "\x03" /**< id-kp OBJECT IDENTIFIER ::= { id-pkix 3 } */
+#define MBEDTLS_OID_SERVER_AUTH                 MBEDTLS_OID_KP "\x01" /**< id-kp-serverAuth OBJECT IDENTIFIER ::= { id-kp 1 } */
+#define MBEDTLS_OID_CLIENT_AUTH                 MBEDTLS_OID_KP "\x02" /**< id-kp-clientAuth OBJECT IDENTIFIER ::= { id-kp 2 } */
+#define MBEDTLS_OID_CODE_SIGNING                MBEDTLS_OID_KP "\x03" /**< id-kp-codeSigning OBJECT IDENTIFIER ::= { id-kp 3 } */
+#define MBEDTLS_OID_EMAIL_PROTECTION            MBEDTLS_OID_KP "\x04" /**< id-kp-emailProtection OBJECT IDENTIFIER ::= { id-kp 4 } */
+#define MBEDTLS_OID_TIME_STAMPING               MBEDTLS_OID_KP "\x08" /**< id-kp-timeStamping OBJECT IDENTIFIER ::= { id-kp 8 } */
+#define MBEDTLS_OID_OCSP_SIGNING                MBEDTLS_OID_KP "\x09" /**< id-kp-OCSPSigning OBJECT IDENTIFIER ::= { id-kp 9 } */
+
+/**
+ * Wi-SUN Alliance Field Area Network
+ * { iso(1) identified-organization(3) dod(6) internet(1)
+ *                      private(4) enterprise(1) WiSUN(45605) FieldAreaNetwork(1) }
+ */
+#define MBEDTLS_OID_WISUN_FAN                   MBEDTLS_OID_INTERNET "\x04\x01\x82\xe4\x25\x01"
+
+#define MBEDTLS_OID_ON                          MBEDTLS_OID_PKIX "\x08" /**< id-on OBJECT IDENTIFIER ::= { id-pkix 8 } */
+#define MBEDTLS_OID_ON_HW_MODULE_NAME           MBEDTLS_OID_ON "\x04" /**< id-on-hardwareModuleName OBJECT IDENTIFIER ::= { id-on 4 } */
+
+/*
+ * PKCS definition OIDs
+ */
+
+#define MBEDTLS_OID_PKCS                MBEDTLS_OID_RSA_COMPANY "\x01" /**< pkcs OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) 1 } */
+#define MBEDTLS_OID_PKCS1               MBEDTLS_OID_PKCS "\x01" /**< pkcs-1 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 1 } */
+#define MBEDTLS_OID_PKCS5               MBEDTLS_OID_PKCS "\x05" /**< pkcs-5 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 5 } */
+#define MBEDTLS_OID_PKCS9               MBEDTLS_OID_PKCS "\x09" /**< pkcs-9 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 9 } */
+#define MBEDTLS_OID_PKCS12              MBEDTLS_OID_PKCS "\x0c" /**< pkcs-12 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 12 } */
+
+/*
+ * PKCS#1 OIDs
+ */
+#define MBEDTLS_OID_PKCS1_RSA           MBEDTLS_OID_PKCS1 "\x01" /**< rsaEncryption OBJECT IDENTIFIER ::= { pkcs-1 1 } */
+#define MBEDTLS_OID_PKCS1_MD2           MBEDTLS_OID_PKCS1 "\x02" /**< md2WithRSAEncryption ::= { pkcs-1 2 } */
+#define MBEDTLS_OID_PKCS1_MD4           MBEDTLS_OID_PKCS1 "\x03" /**< md4WithRSAEncryption ::= { pkcs-1 3 } */
+#define MBEDTLS_OID_PKCS1_MD5           MBEDTLS_OID_PKCS1 "\x04" /**< md5WithRSAEncryption ::= { pkcs-1 4 } */
+#define MBEDTLS_OID_PKCS1_SHA1          MBEDTLS_OID_PKCS1 "\x05" /**< sha1WithRSAEncryption ::= { pkcs-1 5 } */
+#define MBEDTLS_OID_PKCS1_SHA224        MBEDTLS_OID_PKCS1 "\x0e" /**< sha224WithRSAEncryption ::= { pkcs-1 14 } */
+#define MBEDTLS_OID_PKCS1_SHA256        MBEDTLS_OID_PKCS1 "\x0b" /**< sha256WithRSAEncryption ::= { pkcs-1 11 } */
+#define MBEDTLS_OID_PKCS1_SHA384        MBEDTLS_OID_PKCS1 "\x0c" /**< sha384WithRSAEncryption ::= { pkcs-1 12 } */
+#define MBEDTLS_OID_PKCS1_SHA512        MBEDTLS_OID_PKCS1 "\x0d" /**< sha512WithRSAEncryption ::= { pkcs-1 13 } */
+
+#define MBEDTLS_OID_RSA_SHA_OBS         "\x2B\x0E\x03\x02\x1D"
+
+#define MBEDTLS_OID_PKCS9_EMAIL         MBEDTLS_OID_PKCS9 "\x01" /**< emailAddress AttributeType ::= { pkcs-9 1 } */
+
+/* RFC 4055 */
+#define MBEDTLS_OID_RSASSA_PSS          MBEDTLS_OID_PKCS1 "\x0a" /**< id-RSASSA-PSS ::= { pkcs-1 10 } */
+#define MBEDTLS_OID_MGF1                MBEDTLS_OID_PKCS1 "\x08" /**< id-mgf1 ::= { pkcs-1 8 } */
+
+/*
+ * Digest algorithms
+ */
+#define MBEDTLS_OID_DIGEST_ALG_MD2              MBEDTLS_OID_RSA_COMPANY "\x02\x02" /**< id-mbedtls_md2 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 2 } */
+#define MBEDTLS_OID_DIGEST_ALG_MD4              MBEDTLS_OID_RSA_COMPANY "\x02\x04" /**< id-mbedtls_md4 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 4 } */
+#define MBEDTLS_OID_DIGEST_ALG_MD5              MBEDTLS_OID_RSA_COMPANY "\x02\x05" /**< id-mbedtls_md5 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 5 } */
+#define MBEDTLS_OID_DIGEST_ALG_SHA1             MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_OIW_SECSIG_SHA1 /**< id-mbedtls_sha1 OBJECT IDENTIFIER ::= { iso(1) identified-organization(3) oiw(14) secsig(3) algorithms(2) 26 } */
+#define MBEDTLS_OID_DIGEST_ALG_SHA224           MBEDTLS_OID_NIST_ALG "\x02\x04" /**< id-sha224 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 4 } */
+#define MBEDTLS_OID_DIGEST_ALG_SHA256           MBEDTLS_OID_NIST_ALG "\x02\x01" /**< id-mbedtls_sha256 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 1 } */
+
+#define MBEDTLS_OID_DIGEST_ALG_SHA384           MBEDTLS_OID_NIST_ALG "\x02\x02" /**< id-sha384 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 2 } */
+
+#define MBEDTLS_OID_DIGEST_ALG_SHA512           MBEDTLS_OID_NIST_ALG "\x02\x03" /**< id-mbedtls_sha512 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 3 } */
+
+#define MBEDTLS_OID_DIGEST_ALG_RIPEMD160        MBEDTLS_OID_TELETRUST "\x03\x02\x01" /**< id-ripemd160 OBJECT IDENTIFIER :: { iso(1) identified-organization(3) teletrust(36) algorithm(3) hashAlgorithm(2) ripemd160(1) } */
+
+#define MBEDTLS_OID_HMAC_SHA1                   MBEDTLS_OID_RSA_COMPANY "\x02\x07" /**< id-hmacWithSHA1 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 7 } */
+
+#define MBEDTLS_OID_HMAC_SHA224                 MBEDTLS_OID_RSA_COMPANY "\x02\x08" /**< id-hmacWithSHA224 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 8 } */
+
+#define MBEDTLS_OID_HMAC_SHA256                 MBEDTLS_OID_RSA_COMPANY "\x02\x09" /**< id-hmacWithSHA256 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 9 } */
+
+#define MBEDTLS_OID_HMAC_SHA384                 MBEDTLS_OID_RSA_COMPANY "\x02\x0A" /**< id-hmacWithSHA384 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 10 } */
+
+#define MBEDTLS_OID_HMAC_SHA512                 MBEDTLS_OID_RSA_COMPANY "\x02\x0B" /**< id-hmacWithSHA512 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 11 } */
+
+/*
+ * Encryption algorithms
+ */
+#define MBEDTLS_OID_DES_CBC                     MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_OIW_SECSIG_ALG "\x07" /**< desCBC OBJECT IDENTIFIER ::= { iso(1) identified-organization(3) oiw(14) secsig(3) algorithms(2) 7 } */
+#define MBEDTLS_OID_DES_EDE3_CBC                MBEDTLS_OID_RSA_COMPANY "\x03\x07" /**< des-ede3-cbc OBJECT IDENTIFIER ::= { iso(1) member-body(2) -- us(840) rsadsi(113549) encryptionAlgorithm(3) 7 } */
+#define MBEDTLS_OID_AES                         MBEDTLS_OID_NIST_ALG "\x01" /** aes OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistAlgorithm(4) 1 } */
+
+/*
+ * Key Wrapping algorithms
+ */
+/*
+ * RFC 5649
+ */
+#define MBEDTLS_OID_AES128_KW                   MBEDTLS_OID_AES "\x05" /** id-aes128-wrap     OBJECT IDENTIFIER ::= { aes 5 } */
+#define MBEDTLS_OID_AES128_KWP                  MBEDTLS_OID_AES "\x08" /** id-aes128-wrap-pad OBJECT IDENTIFIER ::= { aes 8 } */
+#define MBEDTLS_OID_AES192_KW                   MBEDTLS_OID_AES "\x19" /** id-aes192-wrap     OBJECT IDENTIFIER ::= { aes 25 } */
+#define MBEDTLS_OID_AES192_KWP                  MBEDTLS_OID_AES "\x1c" /** id-aes192-wrap-pad OBJECT IDENTIFIER ::= { aes 28 } */
+#define MBEDTLS_OID_AES256_KW                   MBEDTLS_OID_AES "\x2d" /** id-aes256-wrap     OBJECT IDENTIFIER ::= { aes 45 } */
+#define MBEDTLS_OID_AES256_KWP                  MBEDTLS_OID_AES "\x30" /** id-aes256-wrap-pad OBJECT IDENTIFIER ::= { aes 48 } */
+/*
+ * PKCS#5 OIDs
+ */
+#define MBEDTLS_OID_PKCS5_PBKDF2                MBEDTLS_OID_PKCS5 "\x0c" /**< id-PBKDF2 OBJECT IDENTIFIER ::= {pkcs-5 12} */
+#define MBEDTLS_OID_PKCS5_PBES2                 MBEDTLS_OID_PKCS5 "\x0d" /**< id-PBES2 OBJECT IDENTIFIER ::= {pkcs-5 13} */
+#define MBEDTLS_OID_PKCS5_PBMAC1                MBEDTLS_OID_PKCS5 "\x0e" /**< id-PBMAC1 OBJECT IDENTIFIER ::= {pkcs-5 14} */
+
+/*
+ * PKCS#5 PBES1 algorithms
+ */
+#define MBEDTLS_OID_PKCS5_PBE_MD2_DES_CBC       MBEDTLS_OID_PKCS5 "\x01" /**< pbeWithMD2AndDES-CBC OBJECT IDENTIFIER ::= {pkcs-5 1} */
+#define MBEDTLS_OID_PKCS5_PBE_MD2_RC2_CBC       MBEDTLS_OID_PKCS5 "\x04" /**< pbeWithMD2AndRC2-CBC OBJECT IDENTIFIER ::= {pkcs-5 4} */
+#define MBEDTLS_OID_PKCS5_PBE_MD5_DES_CBC       MBEDTLS_OID_PKCS5 "\x03" /**< pbeWithMD5AndDES-CBC OBJECT IDENTIFIER ::= {pkcs-5 3} */
+#define MBEDTLS_OID_PKCS5_PBE_MD5_RC2_CBC       MBEDTLS_OID_PKCS5 "\x06" /**< pbeWithMD5AndRC2-CBC OBJECT IDENTIFIER ::= {pkcs-5 6} */
+#define MBEDTLS_OID_PKCS5_PBE_SHA1_DES_CBC      MBEDTLS_OID_PKCS5 "\x0a" /**< pbeWithSHA1AndDES-CBC OBJECT IDENTIFIER ::= {pkcs-5 10} */
+#define MBEDTLS_OID_PKCS5_PBE_SHA1_RC2_CBC      MBEDTLS_OID_PKCS5 "\x0b" /**< pbeWithSHA1AndRC2-CBC OBJECT IDENTIFIER ::= {pkcs-5 11} */
+
+/*
+ * PKCS#8 OIDs
+ */
+#define MBEDTLS_OID_PKCS9_CSR_EXT_REQ           MBEDTLS_OID_PKCS9 "\x0e" /**< extensionRequest OBJECT IDENTIFIER ::= {pkcs-9 14} */
+
+/*
+ * PKCS#12 PBE OIDs
+ */
+#define MBEDTLS_OID_PKCS12_PBE                      MBEDTLS_OID_PKCS12 "\x01" /**< pkcs-12PbeIds OBJECT IDENTIFIER ::= {pkcs-12 1} */
+
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_128         MBEDTLS_OID_PKCS12_PBE "\x01" /**< pbeWithSHAAnd128BitRC4 OBJECT IDENTIFIER ::= {pkcs-12PbeIds 1} */
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_40          MBEDTLS_OID_PKCS12_PBE "\x02" /**< pbeWithSHAAnd40BitRC4 OBJECT IDENTIFIER ::= {pkcs-12PbeIds 2} */
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_DES3_EDE_CBC    MBEDTLS_OID_PKCS12_PBE "\x03" /**< pbeWithSHAAnd3-KeyTripleDES-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 3} */
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_DES2_EDE_CBC    MBEDTLS_OID_PKCS12_PBE "\x04" /**< pbeWithSHAAnd2-KeyTripleDES-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 4} */
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_128_CBC     MBEDTLS_OID_PKCS12_PBE "\x05" /**< pbeWithSHAAnd128BitRC2-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 5} */
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_40_CBC      MBEDTLS_OID_PKCS12_PBE "\x06" /**< pbeWithSHAAnd40BitRC2-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 6} */
+
+/*
+ * EC key algorithms from RFC 5480
+ */
+
+/* id-ecPublicKey OBJECT IDENTIFIER ::= {
+ *       iso(1) member-body(2) us(840) ansi-X9-62(10045) keyType(2) 1 } */
+#define MBEDTLS_OID_EC_ALG_UNRESTRICTED         MBEDTLS_OID_ANSI_X9_62 "\x02\01"
+
+/*   id-ecDH OBJECT IDENTIFIER ::= {
+ *     iso(1) identified-organization(3) certicom(132)
+ *     schemes(1) ecdh(12) } */
+#define MBEDTLS_OID_EC_ALG_ECDH                 MBEDTLS_OID_CERTICOM "\x01\x0c"
+
+/*
+ * ECParameters namedCurve identifiers, from RFC 5480, RFC 5639, and SEC2
+ */
+
+/* secp192r1 OBJECT IDENTIFIER ::= {
+ *   iso(1) member-body(2) us(840) ansi-X9-62(10045) curves(3) prime(1) 1 } */
+#define MBEDTLS_OID_EC_GRP_SECP192R1        MBEDTLS_OID_ANSI_X9_62 "\x03\x01\x01"
+
+/* secp224r1 OBJECT IDENTIFIER ::= {
+ *   iso(1) identified-organization(3) certicom(132) curve(0) 33 } */
+#define MBEDTLS_OID_EC_GRP_SECP224R1        MBEDTLS_OID_CERTICOM "\x00\x21"
+
+/* secp256r1 OBJECT IDENTIFIER ::= {
+ *   iso(1) member-body(2) us(840) ansi-X9-62(10045) curves(3) prime(1) 7 } */
+#define MBEDTLS_OID_EC_GRP_SECP256R1        MBEDTLS_OID_ANSI_X9_62 "\x03\x01\x07"
+
+/* secp384r1 OBJECT IDENTIFIER ::= {
+ *   iso(1) identified-organization(3) certicom(132) curve(0) 34 } */
+#define MBEDTLS_OID_EC_GRP_SECP384R1        MBEDTLS_OID_CERTICOM "\x00\x22"
+
+/* secp521r1 OBJECT IDENTIFIER ::= {
+ *   iso(1) identified-organization(3) certicom(132) curve(0) 35 } */
+#define MBEDTLS_OID_EC_GRP_SECP521R1        MBEDTLS_OID_CERTICOM "\x00\x23"
+
+/* secp192k1 OBJECT IDENTIFIER ::= {
+ *   iso(1) identified-organization(3) certicom(132) curve(0) 31 } */
+#define MBEDTLS_OID_EC_GRP_SECP192K1        MBEDTLS_OID_CERTICOM "\x00\x1f"
+
+/* secp224k1 OBJECT IDENTIFIER ::= {
+ *   iso(1) identified-organization(3) certicom(132) curve(0) 32 } */
+#define MBEDTLS_OID_EC_GRP_SECP224K1        MBEDTLS_OID_CERTICOM "\x00\x20"
+
+/* secp256k1 OBJECT IDENTIFIER ::= {
+ *   iso(1) identified-organization(3) certicom(132) curve(0) 10 } */
+#define MBEDTLS_OID_EC_GRP_SECP256K1        MBEDTLS_OID_CERTICOM "\x00\x0a"
+
+/* RFC 5639 4.1
+ * ecStdCurvesAndGeneration OBJECT IDENTIFIER::= {iso(1)
+ * identified-organization(3) teletrust(36) algorithm(3) signature-
+ * algorithm(3) ecSign(2) 8}
+ * ellipticCurve OBJECT IDENTIFIER ::= {ecStdCurvesAndGeneration 1}
+ * versionOne OBJECT IDENTIFIER ::= {ellipticCurve 1} */
+#define MBEDTLS_OID_EC_BRAINPOOL_V1         MBEDTLS_OID_TELETRUST "\x03\x03\x02\x08\x01\x01"
+
+/* brainpoolP256r1 OBJECT IDENTIFIER ::= {versionOne 7} */
+#define MBEDTLS_OID_EC_GRP_BP256R1          MBEDTLS_OID_EC_BRAINPOOL_V1 "\x07"
+
+/* brainpoolP384r1 OBJECT IDENTIFIER ::= {versionOne 11} */
+#define MBEDTLS_OID_EC_GRP_BP384R1          MBEDTLS_OID_EC_BRAINPOOL_V1 "\x0B"
+
+/* brainpoolP512r1 OBJECT IDENTIFIER ::= {versionOne 13} */
+#define MBEDTLS_OID_EC_GRP_BP512R1          MBEDTLS_OID_EC_BRAINPOOL_V1 "\x0D"
+
+/*
+ * SEC1 C.1
+ *
+ * prime-field OBJECT IDENTIFIER ::= { id-fieldType 1 }
+ * id-fieldType OBJECT IDENTIFIER ::= { ansi-X9-62 fieldType(1)}
+ */
+#define MBEDTLS_OID_ANSI_X9_62_FIELD_TYPE   MBEDTLS_OID_ANSI_X9_62 "\x01"
+#define MBEDTLS_OID_ANSI_X9_62_PRIME_FIELD  MBEDTLS_OID_ANSI_X9_62_FIELD_TYPE "\x01"
+
+/*
+ * ECDSA signature identifiers, from RFC 5480
+ */
+#define MBEDTLS_OID_ANSI_X9_62_SIG          MBEDTLS_OID_ANSI_X9_62 "\x04" /* signatures(4) */
+#define MBEDTLS_OID_ANSI_X9_62_SIG_SHA2     MBEDTLS_OID_ANSI_X9_62_SIG "\x03" /* ecdsa-with-SHA2(3) */
+
+/* ecdsa-with-SHA1 OBJECT IDENTIFIER ::= {
+ *   iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) 1 } */
+#define MBEDTLS_OID_ECDSA_SHA1              MBEDTLS_OID_ANSI_X9_62_SIG "\x01"
+
+/* ecdsa-with-SHA224 OBJECT IDENTIFIER ::= {
+ *   iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4)
+ *   ecdsa-with-SHA2(3) 1 } */
+#define MBEDTLS_OID_ECDSA_SHA224            MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x01"
+
+/* ecdsa-with-SHA256 OBJECT IDENTIFIER ::= {
+ *   iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4)
+ *   ecdsa-with-SHA2(3) 2 } */
+#define MBEDTLS_OID_ECDSA_SHA256            MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x02"
+
+/* ecdsa-with-SHA384 OBJECT IDENTIFIER ::= {
+ *   iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4)
+ *   ecdsa-with-SHA2(3) 3 } */
+#define MBEDTLS_OID_ECDSA_SHA384            MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x03"
+
+/* ecdsa-with-SHA512 OBJECT IDENTIFIER ::= {
+ *   iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4)
+ *   ecdsa-with-SHA2(3) 4 } */
+#define MBEDTLS_OID_ECDSA_SHA512            MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x04"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Base OID descriptor structure
+ */
+typedef struct mbedtls_oid_descriptor_t
+{
+    const char *asn1;               /*!< OID ASN.1 representation       */
+    size_t asn1_len;                /*!< length of asn1                 */
+    const char *name;               /*!< official name (e.g. from RFC)  */
+    const char *description;        /*!< human friendly description     */
+} mbedtls_oid_descriptor_t;
+
+/**
+ * \brief           Translate an ASN.1 OID into its numeric representation
+ *                  (e.g. "\x2A\x86\x48\x86\xF7\x0D" into "1.2.840.113549")
+ *
+ * \param buf       buffer to put representation in
+ * \param size      size of the buffer
+ * \param oid       OID to translate
+ *
+ * \return          Length of the string written (excluding final NULL) or
+ *                  MBEDTLS_ERR_OID_BUF_TOO_SMALL in case of error
+ */
+int mbedtls_oid_get_numeric_string( char *buf, size_t size, const mbedtls_asn1_buf *oid );
+
+/**
+ * \brief          Translate an X.509 extension OID into local values
+ *
+ * \param oid      OID to use
+ * \param ext_type place to store the extension type
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_x509_ext_type( const mbedtls_asn1_buf *oid, int *ext_type );
+
+/**
+ * \brief          Translate an X.509 attribute type OID into the short name
+ *                 (e.g. the OID for an X520 Common Name into "CN")
+ *
+ * \param oid      OID to use
+ * \param short_name    place to store the string pointer
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_attr_short_name( const mbedtls_asn1_buf *oid, const char **short_name );
+
+/**
+ * \brief          Translate PublicKeyAlgorithm OID into pk_type
+ *
+ * \param oid      OID to use
+ * \param pk_alg   place to store public key algorithm
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_pk_alg( const mbedtls_asn1_buf *oid, mbedtls_pk_type_t *pk_alg );
+
+/**
+ * \brief          Translate pk_type into PublicKeyAlgorithm OID
+ *
+ * \param pk_alg   Public key type to look for
+ * \param oid      place to store ASN.1 OID string pointer
+ * \param olen     length of the OID
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_oid_by_pk_alg( mbedtls_pk_type_t pk_alg,
+                           const char **oid, size_t *olen );
+
+#if defined(MBEDTLS_ECP_C)
+/**
+ * \brief          Translate NamedCurve OID into an EC group identifier
+ *
+ * \param oid      OID to use
+ * \param grp_id   place to store group id
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_ec_grp( const mbedtls_asn1_buf *oid, mbedtls_ecp_group_id *grp_id );
+
+/**
+ * \brief          Translate EC group identifier into NamedCurve OID
+ *
+ * \param grp_id   EC group identifier
+ * \param oid      place to store ASN.1 OID string pointer
+ * \param olen     length of the OID
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_oid_by_ec_grp( mbedtls_ecp_group_id grp_id,
+                           const char **oid, size_t *olen );
+#endif /* MBEDTLS_ECP_C */
+
+#if defined(MBEDTLS_MD_C)
+/**
+ * \brief          Translate SignatureAlgorithm OID into md_type and pk_type
+ *
+ * \param oid      OID to use
+ * \param md_alg   place to store message digest algorithm
+ * \param pk_alg   place to store public key algorithm
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_sig_alg( const mbedtls_asn1_buf *oid,
+                     mbedtls_md_type_t *md_alg, mbedtls_pk_type_t *pk_alg );
+
+/**
+ * \brief          Translate SignatureAlgorithm OID into description
+ *
+ * \param oid      OID to use
+ * \param desc     place to store string pointer
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_sig_alg_desc( const mbedtls_asn1_buf *oid, const char **desc );
+
+/**
+ * \brief          Translate md_type and pk_type into SignatureAlgorithm OID
+ *
+ * \param md_alg   message digest algorithm
+ * \param pk_alg   public key algorithm
+ * \param oid      place to store ASN.1 OID string pointer
+ * \param olen     length of the OID
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_oid_by_sig_alg( mbedtls_pk_type_t pk_alg, mbedtls_md_type_t md_alg,
+                            const char **oid, size_t *olen );
+
+/**
+ * \brief          Translate hash algorithm OID into md_type
+ *
+ * \param oid      OID to use
+ * \param md_alg   place to store message digest algorithm
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_md_alg( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_alg );
+
+/**
+ * \brief          Translate hmac algorithm OID into md_type
+ *
+ * \param oid      OID to use
+ * \param md_hmac  place to store message hmac algorithm
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_md_hmac( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_hmac );
+#endif /* MBEDTLS_MD_C */
+
+/**
+ * \brief          Translate Extended Key Usage OID into description
+ *
+ * \param oid      OID to use
+ * \param desc     place to store string pointer
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_extended_key_usage( const mbedtls_asn1_buf *oid, const char **desc );
+
+/**
+ * \brief          Translate certificate policies OID into description
+ *
+ * \param oid      OID to use
+ * \param desc     place to store string pointer
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_certificate_policies( const mbedtls_asn1_buf *oid, const char **desc );
+
+/**
+ * \brief          Translate md_type into hash algorithm OID
+ *
+ * \param md_alg   message digest algorithm
+ * \param oid      place to store ASN.1 OID string pointer
+ * \param olen     length of the OID
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_oid_by_md( mbedtls_md_type_t md_alg, const char **oid, size_t *olen );
+
+#if defined(MBEDTLS_CIPHER_C)
+/**
+ * \brief          Translate encryption algorithm OID into cipher_type
+ *
+ * \param oid           OID to use
+ * \param cipher_alg    place to store cipher algorithm
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_cipher_alg( const mbedtls_asn1_buf *oid, mbedtls_cipher_type_t *cipher_alg );
+#endif /* MBEDTLS_CIPHER_C */
+
+#if defined(MBEDTLS_PKCS12_C)
+/**
+ * \brief          Translate PKCS#12 PBE algorithm OID into md_type and
+ *                 cipher_type
+ *
+ * \param oid           OID to use
+ * \param md_alg        place to store message digest algorithm
+ * \param cipher_alg    place to store cipher algorithm
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_pkcs12_pbe_alg( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_alg,
+                            mbedtls_cipher_type_t *cipher_alg );
+#endif /* MBEDTLS_PKCS12_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* oid.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/padlock.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/padlock.h
new file mode 100644
index 00000000000..624d02dff55
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/padlock.h
@@ -0,0 +1,125 @@
+/**
+ * \file padlock.h
+ *
+ * \brief VIA PadLock ACE for HW encryption/decryption supported by some
+ *        processors
+ *
+ * \warning These functions are only for internal use by other library
+ *          functions; you must not call them directly.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_PADLOCK_H
+#define MBEDTLS_PADLOCK_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/aes.h"
+
+/** Input data should be aligned. */
+#define MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED               -0x0030
+
+#if defined(__has_feature)
+#if __has_feature(address_sanitizer)
+#define MBEDTLS_HAVE_ASAN
+#endif
+#endif
+
+/* Some versions of ASan result in errors about not enough registers */
+#if defined(MBEDTLS_HAVE_ASM) && defined(__GNUC__) && defined(__i386__) && \
+    !defined(MBEDTLS_HAVE_ASAN)
+
+#ifndef MBEDTLS_HAVE_X86
+#define MBEDTLS_HAVE_X86
+#endif
+
+#include <stdint.h>
+
+#define MBEDTLS_PADLOCK_RNG 0x000C
+#define MBEDTLS_PADLOCK_ACE 0x00C0
+#define MBEDTLS_PADLOCK_PHE 0x0C00
+#define MBEDTLS_PADLOCK_PMM 0x3000
+
+#define MBEDTLS_PADLOCK_ALIGN16(x) (uint32_t *) (16 + ((int32_t) (x) & ~15))
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          Internal PadLock detection routine
+ *
+ * \note           This function is only for internal use by other library
+ *                 functions; you must not call it directly.
+ *
+ * \param feature  The feature to detect
+ *
+ * \return         non-zero if CPU has support for the feature, 0 otherwise
+ */
+int mbedtls_padlock_has_support( int feature );
+
+/**
+ * \brief          Internal PadLock AES-ECB block en(de)cryption
+ *
+ * \note           This function is only for internal use by other library
+ *                 functions; you must not call it directly.
+ *
+ * \param ctx      AES context
+ * \param mode     MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
+ * \param input    16-byte input block
+ * \param output   16-byte output block
+ *
+ * \return         0 if success, 1 if operation failed
+ */
+int mbedtls_padlock_xcryptecb( mbedtls_aes_context *ctx,
+                               int mode,
+                               const unsigned char input[16],
+                               unsigned char output[16] );
+
+/**
+ * \brief          Internal PadLock AES-CBC buffer en(de)cryption
+ *
+ * \note           This function is only for internal use by other library
+ *                 functions; you must not call it directly.
+ *
+ * \param ctx      AES context
+ * \param mode     MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
+ * \param length   length of the input data
+ * \param iv       initialization vector (updated after use)
+ * \param input    buffer holding the input data
+ * \param output   buffer holding the output data
+ *
+ * \return         0 if success, 1 if operation failed
+ */
+int mbedtls_padlock_xcryptcbc( mbedtls_aes_context *ctx,
+                               int mode,
+                               size_t length,
+                               unsigned char iv[16],
+                               const unsigned char *input,
+                               unsigned char *output );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAVE_X86  */
+
+#endif /* padlock.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pem.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pem.h
new file mode 100644
index 00000000000..dfb4ff218e6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pem.h
@@ -0,0 +1,153 @@
+/**
+ * \file pem.h
+ *
+ * \brief Privacy Enhanced Mail (PEM) decoding
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_PEM_H
+#define MBEDTLS_PEM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/**
+ * \name PEM Error codes
+ * These error codes are returned in case of errors reading the
+ * PEM data.
+ * \{
+ */
+/** No PEM header or footer found. */
+#define MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT          -0x1080
+/** PEM string is not as expected. */
+#define MBEDTLS_ERR_PEM_INVALID_DATA                      -0x1100
+/** Failed to allocate memory. */
+#define MBEDTLS_ERR_PEM_ALLOC_FAILED                      -0x1180
+/** RSA IV is not in hex-format. */
+#define MBEDTLS_ERR_PEM_INVALID_ENC_IV                    -0x1200
+/** Unsupported key encryption algorithm. */
+#define MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG                   -0x1280
+/** Private key password can't be empty. */
+#define MBEDTLS_ERR_PEM_PASSWORD_REQUIRED                 -0x1300
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PEM_PASSWORD_MISMATCH                 -0x1380
+/** Unavailable feature, e.g. hashing/encryption combination. */
+#define MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE               -0x1400
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PEM_BAD_INPUT_DATA                    -0x1480
+/* \} name */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_PEM_PARSE_C)
+/**
+ * \brief       PEM context structure
+ */
+typedef struct mbedtls_pem_context
+{
+    unsigned char *buf;     /*!< buffer for decoded data             */
+    size_t buflen;          /*!< length of the buffer                */
+    unsigned char *info;    /*!< buffer for extra header information */
+}
+mbedtls_pem_context;
+
+/**
+ * \brief       PEM context setup
+ *
+ * \param ctx   context to be initialized
+ */
+void mbedtls_pem_init( mbedtls_pem_context *ctx );
+
+/**
+ * \brief       Read a buffer for PEM information and store the resulting
+ *              data into the specified context buffers.
+ *
+ * \param ctx       context to use
+ * \param header    header string to seek and expect
+ * \param footer    footer string to seek and expect
+ * \param data      source data to look in (must be nul-terminated)
+ * \param pwd       password for decryption (can be NULL)
+ * \param pwdlen    length of password
+ * \param use_len   destination for total length used (set after header is
+ *                  correctly read, so unless you get
+ *                  MBEDTLS_ERR_PEM_BAD_INPUT_DATA or
+ *                  MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT, use_len is
+ *                  the length to skip)
+ *
+ * \note            Attempts to check password correctness by verifying if
+ *                  the decrypted text starts with an ASN.1 sequence of
+ *                  appropriate length
+ *
+ * \return          0 on success, or a specific PEM error code
+ */
+int mbedtls_pem_read_buffer( mbedtls_pem_context *ctx, const char *header, const char *footer,
+                     const unsigned char *data,
+                     const unsigned char *pwd,
+                     size_t pwdlen, size_t *use_len );
+
+/**
+ * \brief       PEM context memory freeing
+ *
+ * \param ctx   context to be freed
+ */
+void mbedtls_pem_free( mbedtls_pem_context *ctx );
+#endif /* MBEDTLS_PEM_PARSE_C */
+
+#if defined(MBEDTLS_PEM_WRITE_C)
+/**
+ * \brief           Write a buffer of PEM information from a DER encoded
+ *                  buffer.
+ *
+ * \param header    The header string to write.
+ * \param footer    The footer string to write.
+ * \param der_data  The DER data to encode.
+ * \param der_len   The length of the DER data \p der_data in Bytes.
+ * \param buf       The buffer to write to.
+ * \param buf_len   The length of the output buffer \p buf in Bytes.
+ * \param olen      The address at which to store the total length written
+ *                  or required (if \p buf_len is not enough).
+ *
+ * \note            You may pass \c NULL for \p buf and \c 0 for \p buf_len
+ *                  to request the length of the resulting PEM buffer in
+ *                  `*olen`.
+ *
+ * \note            This function may be called with overlapping \p der_data
+ *                  and \p buf buffers.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL if \p buf isn't large
+ *                  enough to hold the PEM buffer. In  this case, `*olen` holds
+ *                  the required minimum size of \p buf.
+ * \return          Another PEM or BASE64 error code on other kinds of failure.
+ */
+int mbedtls_pem_write_buffer( const char *header, const char *footer,
+                      const unsigned char *der_data, size_t der_len,
+                      unsigned char *buf, size_t buf_len, size_t *olen );
+#endif /* MBEDTLS_PEM_WRITE_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* pem.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pk.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pk.h
new file mode 100644
index 00000000000..8f2abf2a608
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pk.h
@@ -0,0 +1,895 @@
+/**
+ * \file pk.h
+ *
+ * \brief Public Key abstraction layer
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_PK_H
+#define MBEDTLS_PK_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/md.h"
+
+#if defined(MBEDTLS_RSA_C)
+#include "mbedtls/rsa.h"
+#endif
+
+#if defined(MBEDTLS_ECP_C)
+#include "mbedtls/ecp.h"
+#endif
+
+#if defined(MBEDTLS_ECDSA_C)
+#include "mbedtls/ecdsa.h"
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+/** Memory allocation failed. */
+#define MBEDTLS_ERR_PK_ALLOC_FAILED        -0x3F80
+/** Type mismatch, eg attempt to encrypt with an ECDSA key */
+#define MBEDTLS_ERR_PK_TYPE_MISMATCH       -0x3F00
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PK_BAD_INPUT_DATA      -0x3E80
+/** Read/write of file failed. */
+#define MBEDTLS_ERR_PK_FILE_IO_ERROR       -0x3E00
+/** Unsupported key version */
+#define MBEDTLS_ERR_PK_KEY_INVALID_VERSION -0x3D80
+/** Invalid key tag or value. */
+#define MBEDTLS_ERR_PK_KEY_INVALID_FORMAT  -0x3D00
+/** Key algorithm is unsupported (only RSA and EC are supported). */
+#define MBEDTLS_ERR_PK_UNKNOWN_PK_ALG      -0x3C80
+/** Private key password can't be empty. */
+#define MBEDTLS_ERR_PK_PASSWORD_REQUIRED   -0x3C00
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PK_PASSWORD_MISMATCH   -0x3B80
+/** The pubkey tag or value is invalid (only RSA and EC are supported). */
+#define MBEDTLS_ERR_PK_INVALID_PUBKEY      -0x3B00
+/** The algorithm tag or value is invalid. */
+#define MBEDTLS_ERR_PK_INVALID_ALG         -0x3A80
+/** Elliptic curve is unsupported (only NIST curves are supported). */
+#define MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE -0x3A00
+/** Unavailable feature, e.g. RSA disabled for RSA key. */
+#define MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE -0x3980
+/** The buffer contains a valid signature followed by more data. */
+#define MBEDTLS_ERR_PK_SIG_LEN_MISMATCH    -0x3900
+
+/* MBEDTLS_ERR_PK_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** PK hardware accelerator failed. */
+#define MBEDTLS_ERR_PK_HW_ACCEL_FAILED     -0x3880
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          Public key types
+ */
+typedef enum {
+    MBEDTLS_PK_NONE=0,
+    MBEDTLS_PK_RSA,
+    MBEDTLS_PK_ECKEY,
+    MBEDTLS_PK_ECKEY_DH,
+    MBEDTLS_PK_ECDSA,
+    MBEDTLS_PK_RSA_ALT,
+    MBEDTLS_PK_RSASSA_PSS,
+    MBEDTLS_PK_OPAQUE,
+} mbedtls_pk_type_t;
+
+/**
+ * \brief           Options for RSASSA-PSS signature verification.
+ *                  See \c mbedtls_rsa_rsassa_pss_verify_ext()
+ */
+typedef struct mbedtls_pk_rsassa_pss_options
+{
+    mbedtls_md_type_t mgf1_hash_id;
+    int expected_salt_len;
+
+} mbedtls_pk_rsassa_pss_options;
+
+/**
+ * \brief           Maximum size of a signature made by mbedtls_pk_sign().
+ */
+/* We need to set MBEDTLS_PK_SIGNATURE_MAX_SIZE to the maximum signature
+ * size among the supported signature types. Do it by starting at 0,
+ * then incrementally increasing to be large enough for each supported
+ * signature mechanism.
+ *
+ * The resulting value can be 0, for example if MBEDTLS_ECDH_C is enabled
+ * (which allows the pk module to be included) but neither MBEDTLS_ECDSA_C
+ * nor MBEDTLS_RSA_C nor any opaque signature mechanism (PSA or RSA_ALT).
+ */
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE 0
+
+#if ( defined(MBEDTLS_RSA_C) || defined(MBEDTLS_PK_RSA_ALT_SUPPORT) ) && \
+    MBEDTLS_MPI_MAX_SIZE > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* For RSA, the signature can be as large as the bignum module allows.
+ * For RSA_ALT, the signature size is not necessarily tied to what the
+ * bignum module can do, but in the absence of any specific setting,
+ * we use that (rsa_alt_sign_wrap in pk_wrap will check). */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_MPI_MAX_SIZE
+#endif
+
+#if defined(MBEDTLS_ECDSA_C) &&                                 \
+    MBEDTLS_ECDSA_MAX_LEN > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* For ECDSA, the ecdsa module exports a constant for the maximum
+ * signature size. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_ECDSA_MAX_LEN
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#if PSA_SIGNATURE_MAX_SIZE > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* PSA_SIGNATURE_MAX_SIZE is the maximum size of a signature made
+ * through the PSA API in the PSA representation. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE PSA_SIGNATURE_MAX_SIZE
+#endif
+
+#if PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE + 11 > MBEDTLS_PK_SIGNATURE_MAX_SIZE
+/* The Mbed TLS representation is different for ECDSA signatures:
+ * PSA uses the raw concatenation of r and s,
+ * whereas Mbed TLS uses the ASN.1 representation (SEQUENCE of two INTEGERs).
+ * Add the overhead of ASN.1: up to (1+2) + 2 * (1+2+1) for the
+ * types, lengths (represented by up to 2 bytes), and potential leading
+ * zeros of the INTEGERs and the SEQUENCE. */
+#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE
+#define MBEDTLS_PK_SIGNATURE_MAX_SIZE ( PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE + 11 )
+#endif
+#endif /* defined(MBEDTLS_USE_PSA_CRYPTO) */
+
+/**
+ * \brief           Types for interfacing with the debug module
+ */
+typedef enum
+{
+    MBEDTLS_PK_DEBUG_NONE = 0,
+    MBEDTLS_PK_DEBUG_MPI,
+    MBEDTLS_PK_DEBUG_ECP,
+} mbedtls_pk_debug_type;
+
+/**
+ * \brief           Item to send to the debug module
+ */
+typedef struct mbedtls_pk_debug_item
+{
+    mbedtls_pk_debug_type type;
+    const char *name;
+    void *value;
+} mbedtls_pk_debug_item;
+
+/** Maximum number of item send for debugging, plus 1 */
+#define MBEDTLS_PK_DEBUG_MAX_ITEMS 3
+
+/**
+ * \brief           Public key information and operations
+ */
+typedef struct mbedtls_pk_info_t mbedtls_pk_info_t;
+
+/**
+ * \brief           Public key container
+ */
+typedef struct mbedtls_pk_context
+{
+    const mbedtls_pk_info_t *   pk_info; /**< Public key information         */
+    void *                      pk_ctx;  /**< Underlying public key context  */
+} mbedtls_pk_context;
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief           Context for resuming operations
+ */
+typedef struct
+{
+    const mbedtls_pk_info_t *   pk_info; /**< Public key information         */
+    void *                      rs_ctx;  /**< Underlying restart context     */
+} mbedtls_pk_restart_ctx;
+#else /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+/* Now we can declare functions that take a pointer to that */
+typedef void mbedtls_pk_restart_ctx;
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+#if defined(MBEDTLS_RSA_C)
+/**
+ * Quick access to an RSA context inside a PK context.
+ *
+ * \warning You must make sure the PK context actually holds an RSA context
+ * before using this function!
+ */
+static inline mbedtls_rsa_context *mbedtls_pk_rsa( const mbedtls_pk_context pk )
+{
+    return( (mbedtls_rsa_context *) (pk).pk_ctx );
+}
+#endif /* MBEDTLS_RSA_C */
+
+#if defined(MBEDTLS_ECP_C)
+/**
+ * Quick access to an EC context inside a PK context.
+ *
+ * \warning You must make sure the PK context actually holds an EC context
+ * before using this function!
+ */
+static inline mbedtls_ecp_keypair *mbedtls_pk_ec( const mbedtls_pk_context pk )
+{
+    return( (mbedtls_ecp_keypair *) (pk).pk_ctx );
+}
+#endif /* MBEDTLS_ECP_C */
+
+#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT)
+/**
+ * \brief           Types for RSA-alt abstraction
+ */
+typedef int (*mbedtls_pk_rsa_alt_decrypt_func)( void *ctx, int mode, size_t *olen,
+                    const unsigned char *input, unsigned char *output,
+                    size_t output_max_len );
+typedef int (*mbedtls_pk_rsa_alt_sign_func)( void *ctx,
+                    int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+                    int mode, mbedtls_md_type_t md_alg, unsigned int hashlen,
+                    const unsigned char *hash, unsigned char *sig );
+typedef size_t (*mbedtls_pk_rsa_alt_key_len_func)( void *ctx );
+#endif /* MBEDTLS_PK_RSA_ALT_SUPPORT */
+
+/**
+ * \brief           Return information associated with the given PK type
+ *
+ * \param pk_type   PK type to search for.
+ *
+ * \return          The PK info associated with the type or NULL if not found.
+ */
+const mbedtls_pk_info_t *mbedtls_pk_info_from_type( mbedtls_pk_type_t pk_type );
+
+/**
+ * \brief           Initialize a #mbedtls_pk_context (as NONE).
+ *
+ * \param ctx       The context to initialize.
+ *                  This must not be \c NULL.
+ */
+void mbedtls_pk_init( mbedtls_pk_context *ctx );
+
+/**
+ * \brief           Free the components of a #mbedtls_pk_context.
+ *
+ * \param ctx       The context to clear. It must have been initialized.
+ *                  If this is \c NULL, this function does nothing.
+ *
+ * \note            For contexts that have been set up with
+ *                  mbedtls_pk_setup_opaque(), this does not free the underlying
+ *                  PSA key and you still need to call psa_destroy_key()
+ *                  independently if you want to destroy that key.
+ */
+void mbedtls_pk_free( mbedtls_pk_context *ctx );
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief           Initialize a restart context
+ *
+ * \param ctx       The context to initialize.
+ *                  This must not be \c NULL.
+ */
+void mbedtls_pk_restart_init( mbedtls_pk_restart_ctx *ctx );
+
+/**
+ * \brief           Free the components of a restart context
+ *
+ * \param ctx       The context to clear. It must have been initialized.
+ *                  If this is \c NULL, this function does nothing.
+ */
+void mbedtls_pk_restart_free( mbedtls_pk_restart_ctx *ctx );
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+/**
+ * \brief           Initialize a PK context with the information given
+ *                  and allocates the type-specific PK subcontext.
+ *
+ * \param ctx       Context to initialize. It must not have been set
+ *                  up yet (type #MBEDTLS_PK_NONE).
+ * \param info      Information to use
+ *
+ * \return          0 on success,
+ *                  MBEDTLS_ERR_PK_BAD_INPUT_DATA on invalid input,
+ *                  MBEDTLS_ERR_PK_ALLOC_FAILED on allocation failure.
+ *
+ * \note            For contexts holding an RSA-alt key, use
+ *                  \c mbedtls_pk_setup_rsa_alt() instead.
+ */
+int mbedtls_pk_setup( mbedtls_pk_context *ctx, const mbedtls_pk_info_t *info );
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief           Initialize a PK context to wrap a PSA key.
+ *
+ * \note            This function replaces mbedtls_pk_setup() for contexts
+ *                  that wrap a (possibly opaque) PSA key instead of
+ *                  storing and manipulating the key material directly.
+ *
+ * \param ctx       The context to initialize. It must be empty (type NONE).
+ * \param key       The PSA key to wrap, which must hold an ECC key pair
+ *                  (see notes below).
+ *
+ * \note            The wrapped key must remain valid as long as the
+ *                  wrapping PK context is in use, that is at least between
+ *                  the point this function is called and the point
+ *                  mbedtls_pk_free() is called on this context. The wrapped
+ *                  key might then be independently used or destroyed.
+ *
+ * \note            This function is currently only available for ECC key
+ *                  pairs (that is, ECC keys containing private key material).
+ *                  Support for other key types may be added later.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_PK_BAD_INPUT_DATA on invalid input
+ *                  (context already used, invalid key identifier).
+ * \return          #MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE if the key is not an
+ *                  ECC key pair.
+ * \return          #MBEDTLS_ERR_PK_ALLOC_FAILED on allocation failure.
+ */
+int mbedtls_pk_setup_opaque( mbedtls_pk_context *ctx,
+                             const psa_key_id_t key );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT)
+/**
+ * \brief           Initialize an RSA-alt context
+ *
+ * \param ctx       Context to initialize. It must not have been set
+ *                  up yet (type #MBEDTLS_PK_NONE).
+ * \param key       RSA key pointer
+ * \param decrypt_func  Decryption function
+ * \param sign_func     Signing function
+ * \param key_len_func  Function returning key length in bytes
+ *
+ * \return          0 on success, or MBEDTLS_ERR_PK_BAD_INPUT_DATA if the
+ *                  context wasn't already initialized as RSA_ALT.
+ *
+ * \note            This function replaces \c mbedtls_pk_setup() for RSA-alt.
+ */
+int mbedtls_pk_setup_rsa_alt( mbedtls_pk_context *ctx, void * key,
+                         mbedtls_pk_rsa_alt_decrypt_func decrypt_func,
+                         mbedtls_pk_rsa_alt_sign_func sign_func,
+                         mbedtls_pk_rsa_alt_key_len_func key_len_func );
+#endif /* MBEDTLS_PK_RSA_ALT_SUPPORT */
+
+/**
+ * \brief           Get the size in bits of the underlying key
+ *
+ * \param ctx       The context to query. It must have been initialized.
+ *
+ * \return          Key size in bits, or 0 on error
+ */
+size_t mbedtls_pk_get_bitlen( const mbedtls_pk_context *ctx );
+
+/**
+ * \brief           Get the length in bytes of the underlying key
+ *
+ * \param ctx       The context to query. It must have been initialized.
+ *
+ * \return          Key length in bytes, or 0 on error
+ */
+static inline size_t mbedtls_pk_get_len( const mbedtls_pk_context *ctx )
+{
+    return( ( mbedtls_pk_get_bitlen( ctx ) + 7 ) / 8 );
+}
+
+/**
+ * \brief           Tell if a context can do the operation given by type
+ *
+ * \param ctx       The context to query. It must have been initialized.
+ * \param type      The desired type.
+ *
+ * \return          1 if the context can do operations on the given type.
+ * \return          0 if the context cannot do the operations on the given
+ *                  type. This is always the case for a context that has
+ *                  been initialized but not set up, or that has been
+ *                  cleared with mbedtls_pk_free().
+ */
+int mbedtls_pk_can_do( const mbedtls_pk_context *ctx, mbedtls_pk_type_t type );
+
+/**
+ * \brief           Verify signature (including padding if relevant).
+ *
+ * \param ctx       The PK context to use. It must have been set up.
+ * \param md_alg    Hash algorithm used (see notes)
+ * \param hash      Hash of the message to sign
+ * \param hash_len  Hash length or 0 (see notes)
+ * \param sig       Signature to verify
+ * \param sig_len   Signature length
+ *
+ * \return          0 on success (signature is valid),
+ *                  #MBEDTLS_ERR_PK_SIG_LEN_MISMATCH if there is a valid
+ *                  signature in sig but its length is less than \p siglen,
+ *                  or a specific error code.
+ *
+ * \note            For RSA keys, the default padding type is PKCS#1 v1.5.
+ *                  Use \c mbedtls_pk_verify_ext( MBEDTLS_PK_RSASSA_PSS, ... )
+ *                  to verify RSASSA_PSS signatures.
+ *
+ * \note            If hash_len is 0, then the length associated with md_alg
+ *                  is used instead, or an error returned if it is invalid.
+ *
+ * \note            md_alg may be MBEDTLS_MD_NONE, only if hash_len != 0
+ */
+int mbedtls_pk_verify( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
+               const unsigned char *hash, size_t hash_len,
+               const unsigned char *sig, size_t sig_len );
+
+/**
+ * \brief           Restartable version of \c mbedtls_pk_verify()
+ *
+ * \note            Performs the same job as \c mbedtls_pk_verify(), but can
+ *                  return early and restart according to the limit set with
+ *                  \c mbedtls_ecp_set_max_ops() to reduce blocking for ECC
+ *                  operations. For RSA, same as \c mbedtls_pk_verify().
+ *
+ * \param ctx       The PK context to use. It must have been set up.
+ * \param md_alg    Hash algorithm used (see notes)
+ * \param hash      Hash of the message to sign
+ * \param hash_len  Hash length or 0 (see notes)
+ * \param sig       Signature to verify
+ * \param sig_len   Signature length
+ * \param rs_ctx    Restart context (NULL to disable restart)
+ *
+ * \return          See \c mbedtls_pk_verify(), or
+ * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
+ */
+int mbedtls_pk_verify_restartable( mbedtls_pk_context *ctx,
+               mbedtls_md_type_t md_alg,
+               const unsigned char *hash, size_t hash_len,
+               const unsigned char *sig, size_t sig_len,
+               mbedtls_pk_restart_ctx *rs_ctx );
+
+/**
+ * \brief           Verify signature, with options.
+ *                  (Includes verification of the padding depending on type.)
+ *
+ * \param type      Signature type (inc. possible padding type) to verify
+ * \param options   Pointer to type-specific options, or NULL
+ * \param ctx       The PK context to use. It must have been set up.
+ * \param md_alg    Hash algorithm used (see notes)
+ * \param hash      Hash of the message to sign
+ * \param hash_len  Hash length or 0 (see notes)
+ * \param sig       Signature to verify
+ * \param sig_len   Signature length
+ *
+ * \return          0 on success (signature is valid),
+ *                  #MBEDTLS_ERR_PK_TYPE_MISMATCH if the PK context can't be
+ *                  used for this type of signatures,
+ *                  #MBEDTLS_ERR_PK_SIG_LEN_MISMATCH if there is a valid
+ *                  signature in sig but its length is less than \p siglen,
+ *                  or a specific error code.
+ *
+ * \note            If hash_len is 0, then the length associated with md_alg
+ *                  is used instead, or an error returned if it is invalid.
+ *
+ * \note            md_alg may be MBEDTLS_MD_NONE, only if hash_len != 0
+ *
+ * \note            If type is MBEDTLS_PK_RSASSA_PSS, then options must point
+ *                  to a mbedtls_pk_rsassa_pss_options structure,
+ *                  otherwise it must be NULL.
+ */
+int mbedtls_pk_verify_ext( mbedtls_pk_type_t type, const void *options,
+                   mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
+                   const unsigned char *hash, size_t hash_len,
+                   const unsigned char *sig, size_t sig_len );
+
+/**
+ * \brief           Make signature, including padding if relevant.
+ *
+ * \param ctx       The PK context to use. It must have been set up
+ *                  with a private key.
+ * \param md_alg    Hash algorithm used (see notes)
+ * \param hash      Hash of the message to sign
+ * \param hash_len  Hash length or 0 (see notes)
+ * \param sig       Place to write the signature.
+ *                  It must have enough room for the signature.
+ *                  #MBEDTLS_PK_SIGNATURE_MAX_SIZE is always enough.
+ *                  You may use a smaller buffer if it is large enough
+ *                  given the key type.
+ * \param sig_len   On successful return,
+ *                  the number of bytes written to \p sig.
+ * \param f_rng     RNG function
+ * \param p_rng     RNG parameter
+ *
+ * \return          0 on success, or a specific error code.
+ *
+ * \note            For RSA keys, the default padding type is PKCS#1 v1.5.
+ *                  There is no interface in the PK module to make RSASSA-PSS
+ *                  signatures yet.
+ *
+ * \note            If hash_len is 0, then the length associated with md_alg
+ *                  is used instead, or an error returned if it is invalid.
+ *
+ * \note            For RSA, md_alg may be MBEDTLS_MD_NONE if hash_len != 0.
+ *                  For ECDSA, md_alg may never be MBEDTLS_MD_NONE.
+ */
+int mbedtls_pk_sign( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
+             const unsigned char *hash, size_t hash_len,
+             unsigned char *sig, size_t *sig_len,
+             int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+/**
+ * \brief           Restartable version of \c mbedtls_pk_sign()
+ *
+ * \note            Performs the same job as \c mbedtls_pk_sign(), but can
+ *                  return early and restart according to the limit set with
+ *                  \c mbedtls_ecp_set_max_ops() to reduce blocking for ECC
+ *                  operations. For RSA, same as \c mbedtls_pk_sign().
+ *
+ * \param ctx       The PK context to use. It must have been set up
+ *                  with a private key.
+ * \param md_alg    Hash algorithm used (see notes for mbedtls_pk_sign())
+ * \param hash      Hash of the message to sign
+ * \param hash_len  Hash length or 0 (see notes for mbedtls_pk_sign())
+ * \param sig       Place to write the signature.
+ *                  It must have enough room for the signature.
+ *                  #MBEDTLS_PK_SIGNATURE_MAX_SIZE is always enough.
+ *                  You may use a smaller buffer if it is large enough
+ *                  given the key type.
+ * \param sig_len   On successful return,
+ *                  the number of bytes written to \p sig.
+ * \param f_rng     RNG function
+ * \param p_rng     RNG parameter
+ * \param rs_ctx    Restart context (NULL to disable restart)
+ *
+ * \return          See \c mbedtls_pk_sign().
+ * \return          #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ *                  operations was reached: see \c mbedtls_ecp_set_max_ops().
+ */
+int mbedtls_pk_sign_restartable( mbedtls_pk_context *ctx,
+             mbedtls_md_type_t md_alg,
+             const unsigned char *hash, size_t hash_len,
+             unsigned char *sig, size_t *sig_len,
+             int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+             mbedtls_pk_restart_ctx *rs_ctx );
+
+/**
+ * \brief           Decrypt message (including padding if relevant).
+ *
+ * \param ctx       The PK context to use. It must have been set up
+ *                  with a private key.
+ * \param input     Input to decrypt
+ * \param ilen      Input size
+ * \param output    Decrypted output
+ * \param olen      Decrypted message length
+ * \param osize     Size of the output buffer
+ * \param f_rng     RNG function
+ * \param p_rng     RNG parameter
+ *
+ * \note            For RSA keys, the default padding type is PKCS#1 v1.5.
+ *
+ * \return          0 on success, or a specific error code.
+ */
+int mbedtls_pk_decrypt( mbedtls_pk_context *ctx,
+                const unsigned char *input, size_t ilen,
+                unsigned char *output, size_t *olen, size_t osize,
+                int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+/**
+ * \brief           Encrypt message (including padding if relevant).
+ *
+ * \param ctx       The PK context to use. It must have been set up.
+ * \param input     Message to encrypt
+ * \param ilen      Message size
+ * \param output    Encrypted output
+ * \param olen      Encrypted output length
+ * \param osize     Size of the output buffer
+ * \param f_rng     RNG function
+ * \param p_rng     RNG parameter
+ *
+ * \note            For RSA keys, the default padding type is PKCS#1 v1.5.
+ *
+ * \return          0 on success, or a specific error code.
+ */
+int mbedtls_pk_encrypt( mbedtls_pk_context *ctx,
+                const unsigned char *input, size_t ilen,
+                unsigned char *output, size_t *olen, size_t osize,
+                int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+/**
+ * \brief           Check if a public-private pair of keys matches.
+ *
+ * \param pub       Context holding a public key.
+ * \param prv       Context holding a private (and public) key.
+ *
+ * \return          \c 0 on success (keys were checked and match each other).
+ * \return          #MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE if the keys could not
+ *                  be checked - in that case they may or may not match.
+ * \return          #MBEDTLS_ERR_PK_BAD_INPUT_DATA if a context is invalid.
+ * \return          Another non-zero value if the keys do not match.
+ */
+int mbedtls_pk_check_pair( const mbedtls_pk_context *pub, const mbedtls_pk_context *prv );
+
+/**
+ * \brief           Export debug information
+ *
+ * \param ctx       The PK context to use. It must have been initialized.
+ * \param items     Place to write debug items
+ *
+ * \return          0 on success or MBEDTLS_ERR_PK_BAD_INPUT_DATA
+ */
+int mbedtls_pk_debug( const mbedtls_pk_context *ctx, mbedtls_pk_debug_item *items );
+
+/**
+ * \brief           Access the type name
+ *
+ * \param ctx       The PK context to use. It must have been initialized.
+ *
+ * \return          Type name on success, or "invalid PK"
+ */
+const char * mbedtls_pk_get_name( const mbedtls_pk_context *ctx );
+
+/**
+ * \brief           Get the key type
+ *
+ * \param ctx       The PK context to use. It must have been initialized.
+ *
+ * \return          Type on success.
+ * \return          #MBEDTLS_PK_NONE for a context that has not been set up.
+ */
+mbedtls_pk_type_t mbedtls_pk_get_type( const mbedtls_pk_context *ctx );
+
+#if defined(MBEDTLS_PK_PARSE_C)
+/** \ingroup pk_module */
+/**
+ * \brief           Parse a private key in PEM or DER format
+ *
+ * \param ctx       The PK context to fill. It must have been initialized
+ *                  but not set up.
+ * \param key       Input buffer to parse.
+ *                  The buffer must contain the input exactly, with no
+ *                  extra trailing material. For PEM, the buffer must
+ *                  contain a null-terminated string.
+ * \param keylen    Size of \b key in bytes.
+ *                  For PEM data, this includes the terminating null byte,
+ *                  so \p keylen must be equal to `strlen(key) + 1`.
+ * \param pwd       Optional password for decryption.
+ *                  Pass \c NULL if expecting a non-encrypted key.
+ *                  Pass a string of \p pwdlen bytes if expecting an encrypted
+ *                  key; a non-encrypted key will also be accepted.
+ *                  The empty password is not supported.
+ * \param pwdlen    Size of the password in bytes.
+ *                  Ignored if \p pwd is \c NULL.
+ *
+ * \note            On entry, ctx must be empty, either freshly initialised
+ *                  with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a
+ *                  specific key type, check the result with mbedtls_pk_can_do().
+ *
+ * \note            The key is also checked for correctness.
+ *
+ * \return          0 if successful, or a specific PK or PEM error code
+ */
+int mbedtls_pk_parse_key( mbedtls_pk_context *ctx,
+                  const unsigned char *key, size_t keylen,
+                  const unsigned char *pwd, size_t pwdlen );
+
+/** \ingroup pk_module */
+/**
+ * \brief           Parse a public key in PEM or DER format
+ *
+ * \param ctx       The PK context to fill. It must have been initialized
+ *                  but not set up.
+ * \param key       Input buffer to parse.
+ *                  The buffer must contain the input exactly, with no
+ *                  extra trailing material. For PEM, the buffer must
+ *                  contain a null-terminated string.
+ * \param keylen    Size of \b key in bytes.
+ *                  For PEM data, this includes the terminating null byte,
+ *                  so \p keylen must be equal to `strlen(key) + 1`.
+ *
+ * \note            On entry, ctx must be empty, either freshly initialised
+ *                  with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a
+ *                  specific key type, check the result with mbedtls_pk_can_do().
+ *
+ * \note            The key is also checked for correctness.
+ *
+ * \return          0 if successful, or a specific PK or PEM error code
+ */
+int mbedtls_pk_parse_public_key( mbedtls_pk_context *ctx,
+                         const unsigned char *key, size_t keylen );
+
+#if defined(MBEDTLS_FS_IO)
+/** \ingroup pk_module */
+/**
+ * \brief           Load and parse a private key
+ *
+ * \param ctx       The PK context to fill. It must have been initialized
+ *                  but not set up.
+ * \param path      filename to read the private key from
+ * \param password  Optional password to decrypt the file.
+ *                  Pass \c NULL if expecting a non-encrypted key.
+ *                  Pass a null-terminated string if expecting an encrypted
+ *                  key; a non-encrypted key will also be accepted.
+ *                  The empty password is not supported.
+ *
+ * \note            On entry, ctx must be empty, either freshly initialised
+ *                  with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a
+ *                  specific key type, check the result with mbedtls_pk_can_do().
+ *
+ * \note            The key is also checked for correctness.
+ *
+ * \return          0 if successful, or a specific PK or PEM error code
+ */
+int mbedtls_pk_parse_keyfile( mbedtls_pk_context *ctx,
+                      const char *path, const char *password );
+
+/** \ingroup pk_module */
+/**
+ * \brief           Load and parse a public key
+ *
+ * \param ctx       The PK context to fill. It must have been initialized
+ *                  but not set up.
+ * \param path      filename to read the public key from
+ *
+ * \note            On entry, ctx must be empty, either freshly initialised
+ *                  with mbedtls_pk_init() or reset with mbedtls_pk_free(). If
+ *                  you need a specific key type, check the result with
+ *                  mbedtls_pk_can_do().
+ *
+ * \note            The key is also checked for correctness.
+ *
+ * \return          0 if successful, or a specific PK or PEM error code
+ */
+int mbedtls_pk_parse_public_keyfile( mbedtls_pk_context *ctx, const char *path );
+#endif /* MBEDTLS_FS_IO */
+#endif /* MBEDTLS_PK_PARSE_C */
+
+#if defined(MBEDTLS_PK_WRITE_C)
+/**
+ * \brief           Write a private key to a PKCS#1 or SEC1 DER structure
+ *                  Note: data is written at the end of the buffer! Use the
+ *                        return value to determine where you should start
+ *                        using the buffer
+ *
+ * \param ctx       PK context which must contain a valid private key.
+ * \param buf       buffer to write to
+ * \param size      size of the buffer
+ *
+ * \return          length of data written if successful, or a specific
+ *                  error code
+ */
+int mbedtls_pk_write_key_der( mbedtls_pk_context *ctx, unsigned char *buf, size_t size );
+
+/**
+ * \brief           Write a public key to a SubjectPublicKeyInfo DER structure
+ *                  Note: data is written at the end of the buffer! Use the
+ *                        return value to determine where you should start
+ *                        using the buffer
+ *
+ * \param ctx       PK context which must contain a valid public or private key.
+ * \param buf       buffer to write to
+ * \param size      size of the buffer
+ *
+ * \return          length of data written if successful, or a specific
+ *                  error code
+ */
+int mbedtls_pk_write_pubkey_der( mbedtls_pk_context *ctx, unsigned char *buf, size_t size );
+
+#if defined(MBEDTLS_PEM_WRITE_C)
+/**
+ * \brief           Write a public key to a PEM string
+ *
+ * \param ctx       PK context which must contain a valid public or private key.
+ * \param buf       Buffer to write to. The output includes a
+ *                  terminating null byte.
+ * \param size      Size of the buffer in bytes.
+ *
+ * \return          0 if successful, or a specific error code
+ */
+int mbedtls_pk_write_pubkey_pem( mbedtls_pk_context *ctx, unsigned char *buf, size_t size );
+
+/**
+ * \brief           Write a private key to a PKCS#1 or SEC1 PEM string
+ *
+ * \param ctx       PK context which must contain a valid private key.
+ * \param buf       Buffer to write to. The output includes a
+ *                  terminating null byte.
+ * \param size      Size of the buffer in bytes.
+ *
+ * \return          0 if successful, or a specific error code
+ */
+int mbedtls_pk_write_key_pem( mbedtls_pk_context *ctx, unsigned char *buf, size_t size );
+#endif /* MBEDTLS_PEM_WRITE_C */
+#endif /* MBEDTLS_PK_WRITE_C */
+
+/*
+ * WARNING: Low-level functions. You probably do not want to use these unless
+ *          you are certain you do ;)
+ */
+
+#if defined(MBEDTLS_PK_PARSE_C)
+/**
+ * \brief           Parse a SubjectPublicKeyInfo DER structure
+ *
+ * \param p         the position in the ASN.1 data
+ * \param end       end of the buffer
+ * \param pk        The PK context to fill. It must have been initialized
+ *                  but not set up.
+ *
+ * \return          0 if successful, or a specific PK error code
+ */
+int mbedtls_pk_parse_subpubkey( unsigned char **p, const unsigned char *end,
+                        mbedtls_pk_context *pk );
+#endif /* MBEDTLS_PK_PARSE_C */
+
+#if defined(MBEDTLS_PK_WRITE_C)
+/**
+ * \brief           Write a subjectPublicKey to ASN.1 data
+ *                  Note: function works backwards in data buffer
+ *
+ * \param p         reference to current position pointer
+ * \param start     start of the buffer (for bounds-checking)
+ * \param key       PK context which must contain a valid public or private key.
+ *
+ * \return          the length written or a negative error code
+ */
+int mbedtls_pk_write_pubkey( unsigned char **p, unsigned char *start,
+                     const mbedtls_pk_context *key );
+#endif /* MBEDTLS_PK_WRITE_C */
+
+/*
+ * Internal module functions. You probably do not want to use these unless you
+ * know you do.
+ */
+#if defined(MBEDTLS_FS_IO)
+int mbedtls_pk_load_file( const char *path, unsigned char **buf, size_t *n );
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief           Turn an EC key into an opaque one.
+ *
+ * \warning         This is a temporary utility function for tests. It might
+ *                  change or be removed at any time without notice.
+ *
+ * \note            Only ECDSA keys are supported so far. Signing with the
+ *                  specified hash is the only allowed use of that key.
+ *
+ * \param pk        Input: the EC key to import to a PSA key.
+ *                  Output: a PK context wrapping that PSA key.
+ * \param key       Output: a PSA key identifier.
+ *                  It's the caller's responsibility to call
+ *                  psa_destroy_key() on that key identifier after calling
+ *                  mbedtls_pk_free() on the PK context.
+ * \param hash_alg  The hash algorithm to allow for use with that key.
+ *
+ * \return          \c 0 if successful.
+ * \return          An Mbed TLS error code otherwise.
+ */
+int mbedtls_pk_wrap_as_opaque( mbedtls_pk_context *pk,
+                               psa_key_id_t *key,
+                               psa_algorithm_t hash_alg );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_PK_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h
new file mode 100644
index 00000000000..47f7767700c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pk_internal.h
@@ -0,0 +1,140 @@
+/**
+ * \file pk_internal.h
+ *
+ * \brief Public Key abstraction layer: wrapper functions
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_PK_WRAP_H
+#define MBEDTLS_PK_WRAP_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/pk.h"
+
+struct mbedtls_pk_info_t
+{
+    /** Public key type */
+    mbedtls_pk_type_t type;
+
+    /** Type name */
+    const char *name;
+
+    /** Get key size in bits */
+    size_t (*get_bitlen)( const void * );
+
+    /** Tell if the context implements this type (e.g. ECKEY can do ECDSA) */
+    int (*can_do)( mbedtls_pk_type_t type );
+
+    /** Verify signature */
+    int (*verify_func)( void *ctx, mbedtls_md_type_t md_alg,
+                        const unsigned char *hash, size_t hash_len,
+                        const unsigned char *sig, size_t sig_len );
+
+    /** Make signature */
+    int (*sign_func)( void *ctx, mbedtls_md_type_t md_alg,
+                      const unsigned char *hash, size_t hash_len,
+                      unsigned char *sig, size_t *sig_len,
+                      int (*f_rng)(void *, unsigned char *, size_t),
+                      void *p_rng );
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+    /** Verify signature (restartable) */
+    int (*verify_rs_func)( void *ctx, mbedtls_md_type_t md_alg,
+                           const unsigned char *hash, size_t hash_len,
+                           const unsigned char *sig, size_t sig_len,
+                           void *rs_ctx );
+
+    /** Make signature (restartable) */
+    int (*sign_rs_func)( void *ctx, mbedtls_md_type_t md_alg,
+                         const unsigned char *hash, size_t hash_len,
+                         unsigned char *sig, size_t *sig_len,
+                         int (*f_rng)(void *, unsigned char *, size_t),
+                         void *p_rng, void *rs_ctx );
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+    /** Decrypt message */
+    int (*decrypt_func)( void *ctx, const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t *olen, size_t osize,
+                         int (*f_rng)(void *, unsigned char *, size_t),
+                         void *p_rng );
+
+    /** Encrypt message */
+    int (*encrypt_func)( void *ctx, const unsigned char *input, size_t ilen,
+                         unsigned char *output, size_t *olen, size_t osize,
+                         int (*f_rng)(void *, unsigned char *, size_t),
+                         void *p_rng );
+
+    /** Check public-private key pair */
+    int (*check_pair_func)( const void *pub, const void *prv );
+
+    /** Allocate a new context */
+    void * (*ctx_alloc_func)( void );
+
+    /** Free the given context */
+    void (*ctx_free_func)( void *ctx );
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+    /** Allocate the restart context */
+    void * (*rs_alloc_func)( void );
+
+    /** Free the restart context */
+    void (*rs_free_func)( void *rs_ctx );
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+    /** Interface with the debug module */
+    void (*debug_func)( const void *ctx, mbedtls_pk_debug_item *items );
+
+};
+#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT)
+/* Container for RSA-alt */
+typedef struct
+{
+    void *key;
+    mbedtls_pk_rsa_alt_decrypt_func decrypt_func;
+    mbedtls_pk_rsa_alt_sign_func sign_func;
+    mbedtls_pk_rsa_alt_key_len_func key_len_func;
+} mbedtls_rsa_alt_context;
+#endif
+
+#if defined(MBEDTLS_RSA_C)
+extern const mbedtls_pk_info_t mbedtls_rsa_info;
+#endif
+
+#if defined(MBEDTLS_ECP_C)
+extern const mbedtls_pk_info_t mbedtls_eckey_info;
+extern const mbedtls_pk_info_t mbedtls_eckeydh_info;
+#endif
+
+#if defined(MBEDTLS_ECDSA_C)
+extern const mbedtls_pk_info_t mbedtls_ecdsa_info;
+#endif
+
+#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT)
+extern const mbedtls_pk_info_t mbedtls_rsa_alt_info;
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+extern const mbedtls_pk_info_t mbedtls_pk_opaque_info;
+#endif
+
+#endif /* MBEDTLS_PK_WRAP_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h
new file mode 100644
index 00000000000..3530ee16889
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pkcs11.h
@@ -0,0 +1,246 @@
+/**
+ * \file pkcs11.h
+ *
+ * \brief Wrapper for PKCS#11 library libpkcs11-helper
+ *
+ * \author Adriaan de Jong <dejong@fox-it.com>
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_PKCS11_H
+#define MBEDTLS_PKCS11_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_PKCS11_C)
+
+#include "mbedtls/x509_crt.h"
+
+#include <pkcs11-helper-1.0/pkcs11h-certificate.h>
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+
+/**
+ * Context for PKCS #11 private keys.
+ */
+typedef struct mbedtls_pkcs11_context
+{
+        pkcs11h_certificate_t pkcs11h_cert;
+        int len;
+} mbedtls_pkcs11_context;
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
+/**
+ * Initialize a mbedtls_pkcs11_context.
+ * (Just making memory references valid.)
+ *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ */
+MBEDTLS_DEPRECATED void mbedtls_pkcs11_init( mbedtls_pkcs11_context *ctx );
+
+/**
+ * Fill in a mbed TLS certificate, based on the given PKCS11 helper certificate.
+ *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
+ * \param cert          X.509 certificate to fill
+ * \param pkcs11h_cert  PKCS #11 helper certificate
+ *
+ * \return              0 on success.
+ */
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_x509_cert_bind( mbedtls_x509_crt *cert,
+                                        pkcs11h_certificate_t pkcs11h_cert );
+
+/**
+ * Set up a mbedtls_pkcs11_context storing the given certificate. Note that the
+ * mbedtls_pkcs11_context will take over control of the certificate, freeing it when
+ * done.
+ *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
+ * \param priv_key      Private key structure to fill.
+ * \param pkcs11_cert   PKCS #11 helper certificate
+ *
+ * \return              0 on success
+ */
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_priv_key_bind(
+                                        mbedtls_pkcs11_context *priv_key,
+                                        pkcs11h_certificate_t pkcs11_cert );
+
+/**
+ * Free the contents of the given private key context. Note that the structure
+ * itself is not freed.
+ *
+ * \deprecated          This function is deprecated and will be removed in a
+ *                      future version of the library.
+ *
+ * \param priv_key      Private key structure to cleanup
+ */
+MBEDTLS_DEPRECATED void mbedtls_pkcs11_priv_key_free(
+                                            mbedtls_pkcs11_context *priv_key );
+
+/**
+ * \brief          Do an RSA private key decrypt, then remove the message
+ *                 padding
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
+ * \param ctx      PKCS #11 context
+ * \param mode     must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature
+ * \param input    buffer holding the encrypted data
+ * \param output   buffer that will hold the plaintext
+ * \param olen     will contain the plaintext length
+ * \param output_max_len    maximum length of the output buffer
+ *
+ * \return         0 if successful, or an MBEDTLS_ERR_RSA_XXX error code
+ *
+ * \note           The output buffer must be as large as the size
+ *                 of ctx->N (eg. 128 bytes if RSA-1024 is used) otherwise
+ *                 an error is thrown.
+ */
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx,
+                                               int mode, size_t *olen,
+                                               const unsigned char *input,
+                                               unsigned char *output,
+                                               size_t output_max_len );
+
+/**
+ * \brief          Do a private RSA to sign a message digest
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
+ * \param ctx      PKCS #11 context
+ * \param mode     must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature
+ * \param md_alg   a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data)
+ * \param hashlen  message digest length (for MBEDTLS_MD_NONE only)
+ * \param hash     buffer holding the message digest
+ * \param sig      buffer that will hold the ciphertext
+ *
+ * \return         0 if the signing operation was successful,
+ *                 or an MBEDTLS_ERR_RSA_XXX error code
+ *
+ * \note           The "sig" buffer must be as large as the size
+ *                 of ctx->N (eg. 128 bytes if RSA-1024 is used).
+ */
+MBEDTLS_DEPRECATED int mbedtls_pkcs11_sign( mbedtls_pkcs11_context *ctx,
+                                            int mode,
+                                            mbedtls_md_type_t md_alg,
+                                            unsigned int hashlen,
+                                            const unsigned char *hash,
+                                            unsigned char *sig );
+
+/**
+ * SSL/TLS wrappers for PKCS#11 functions
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ */
+MBEDTLS_DEPRECATED static inline int mbedtls_ssl_pkcs11_decrypt( void *ctx,
+                            int mode, size_t *olen,
+                            const unsigned char *input, unsigned char *output,
+                            size_t output_max_len )
+{
+    return mbedtls_pkcs11_decrypt( (mbedtls_pkcs11_context *) ctx, mode, olen, input, output,
+                           output_max_len );
+}
+
+/**
+ * \brief          This function signs a message digest using RSA.
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
+ * \param ctx      The PKCS #11 context.
+ * \param f_rng    The RNG function. This parameter is unused.
+ * \param p_rng    The RNG context. This parameter is unused.
+ * \param mode     The operation to run. This must be set to
+ *                 MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's
+ *                 signature.
+ * \param md_alg   The message digest algorithm. One of the MBEDTLS_MD_XXX
+ *                 must be passed to this function and MBEDTLS_MD_NONE can be
+ *                 used for signing raw data.
+ * \param hashlen  The message digest length (for MBEDTLS_MD_NONE only).
+ * \param hash     The buffer holding the message digest.
+ * \param sig      The buffer that will hold the ciphertext.
+ *
+ * \return         \c 0 if the signing operation was successful.
+ * \return         A non-zero error code on failure.
+ *
+ * \note           The \p sig buffer must be as large as the size of
+ *                 <code>ctx->N</code>. For example, 128 bytes if RSA-1024 is
+ *                 used.
+ */
+MBEDTLS_DEPRECATED static inline int mbedtls_ssl_pkcs11_sign( void *ctx,
+                    int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+                    int mode, mbedtls_md_type_t md_alg, unsigned int hashlen,
+                    const unsigned char *hash, unsigned char *sig )
+{
+    ((void) f_rng);
+    ((void) p_rng);
+    return mbedtls_pkcs11_sign( (mbedtls_pkcs11_context *) ctx, mode, md_alg,
+                        hashlen, hash, sig );
+}
+
+/**
+ * This function gets the length of the private key.
+ *
+ * \deprecated     This function is deprecated and will be removed in a future
+ *                 version of the library.
+ *
+ * \param ctx      The PKCS #11 context.
+ *
+ * \return         The length of the private key.
+ */
+MBEDTLS_DEPRECATED static inline size_t mbedtls_ssl_pkcs11_key_len( void *ctx )
+{
+    return ( (mbedtls_pkcs11_context *) ctx )->len;
+}
+
+#undef MBEDTLS_DEPRECATED
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_PKCS11_C */
+
+#endif /* MBEDTLS_PKCS11_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h
new file mode 100644
index 00000000000..d9e85b1d126
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pkcs12.h
@@ -0,0 +1,140 @@
+/**
+ * \file pkcs12.h
+ *
+ * \brief PKCS#12 Personal Information Exchange Syntax
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_PKCS12_H
+#define MBEDTLS_PKCS12_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/md.h"
+#include "mbedtls/cipher.h"
+#include "mbedtls/asn1.h"
+
+#include <stddef.h>
+
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA                 -0x1F80
+/** Feature not available, e.g. unsupported encryption scheme. */
+#define MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE            -0x1F00
+/** PBE ASN.1 data not as expected. */
+#define MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT             -0x1E80
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH              -0x1E00
+
+#define MBEDTLS_PKCS12_DERIVE_KEY       1   /**< encryption/decryption key */
+#define MBEDTLS_PKCS12_DERIVE_IV        2   /**< initialization vector     */
+#define MBEDTLS_PKCS12_DERIVE_MAC_KEY   3   /**< integrity / MAC key       */
+
+#define MBEDTLS_PKCS12_PBE_DECRYPT      0
+#define MBEDTLS_PKCS12_PBE_ENCRYPT      1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_ASN1_PARSE_C)
+
+/**
+ * \brief            PKCS12 Password Based function (encryption / decryption)
+ *                   for pbeWithSHAAnd128BitRC4
+ *
+ * \param pbe_params an ASN1 buffer containing the pkcs-12PbeParams structure
+ * \param mode       either MBEDTLS_PKCS12_PBE_ENCRYPT or MBEDTLS_PKCS12_PBE_DECRYPT
+ * \param pwd        the password used (may be NULL if no password is used)
+ * \param pwdlen     length of the password (may be 0)
+ * \param input      the input data
+ * \param len        data length
+ * \param output     the output buffer
+ *
+ * \return           0 if successful, or a MBEDTLS_ERR_XXX code
+ */
+int mbedtls_pkcs12_pbe_sha1_rc4_128( mbedtls_asn1_buf *pbe_params, int mode,
+                             const unsigned char *pwd,  size_t pwdlen,
+                             const unsigned char *input, size_t len,
+                             unsigned char *output );
+
+/**
+ * \brief            PKCS12 Password Based function (encryption / decryption)
+ *                   for cipher-based and mbedtls_md-based PBE's
+ *
+ * \param pbe_params an ASN1 buffer containing the pkcs-12 PbeParams structure
+ * \param mode       either #MBEDTLS_PKCS12_PBE_ENCRYPT or
+ *                   #MBEDTLS_PKCS12_PBE_DECRYPT
+ * \param cipher_type the cipher used
+ * \param md_type    the mbedtls_md used
+ * \param pwd        Latin1-encoded password used. This may only be \c NULL when
+ *                   \p pwdlen is 0. No null terminator should be used.
+ * \param pwdlen     length of the password (may be 0)
+ * \param input      the input data
+ * \param len        data length
+ * \param output     the output buffer
+ *
+ * \return           0 if successful, or a MBEDTLS_ERR_XXX code
+ */
+int mbedtls_pkcs12_pbe( mbedtls_asn1_buf *pbe_params, int mode,
+                mbedtls_cipher_type_t cipher_type, mbedtls_md_type_t md_type,
+                const unsigned char *pwd,  size_t pwdlen,
+                const unsigned char *input, size_t len,
+                unsigned char *output );
+
+#endif /* MBEDTLS_ASN1_PARSE_C */
+
+/**
+ * \brief            The PKCS#12 derivation function uses a password and a salt
+ *                   to produce pseudo-random bits for a particular "purpose".
+ *
+ *                   Depending on the given id, this function can produce an
+ *                   encryption/decryption key, an initialization vector or an
+ *                   integrity key.
+ *
+ * \param data       buffer to store the derived data in
+ * \param datalen    length of buffer to fill
+ * \param pwd        The password to use. For compliance with PKCS#12 §B.1, this
+ *                   should be a BMPString, i.e. a Unicode string where each
+ *                   character is encoded as 2 bytes in big-endian order, with
+ *                   no byte order mark and with a null terminator (i.e. the
+ *                   last two bytes should be 0x00 0x00).
+ * \param pwdlen     length of the password (may be 0).
+ * \param salt       Salt buffer to use This may only be \c NULL when
+ *                   \p saltlen is 0.
+ * \param saltlen    length of the salt (may be zero)
+ * \param mbedtls_md mbedtls_md type to use during the derivation
+ * \param id         id that describes the purpose (can be
+ *                   #MBEDTLS_PKCS12_DERIVE_KEY, #MBEDTLS_PKCS12_DERIVE_IV or
+ *                   #MBEDTLS_PKCS12_DERIVE_MAC_KEY)
+ * \param iterations number of iterations
+ *
+ * \return          0 if successful, or a MD, BIGNUM type error.
+ */
+int mbedtls_pkcs12_derivation( unsigned char *data, size_t datalen,
+                       const unsigned char *pwd, size_t pwdlen,
+                       const unsigned char *salt, size_t saltlen,
+                       mbedtls_md_type_t mbedtls_md, int id, int iterations );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* pkcs12.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h
new file mode 100644
index 00000000000..696930f745f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/pkcs5.h
@@ -0,0 +1,111 @@
+/**
+ * \file pkcs5.h
+ *
+ * \brief PKCS#5 functions
+ *
+ * \author Mathias Olsson <mathias@kompetensum.com>
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_PKCS5_H
+#define MBEDTLS_PKCS5_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/asn1.h"
+#include "mbedtls/md.h"
+
+#include <stddef.h>
+#include <stdint.h>
+
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA                  -0x2f80
+/** Unexpected ASN.1 data. */
+#define MBEDTLS_ERR_PKCS5_INVALID_FORMAT                  -0x2f00
+/** Requested encryption or digest alg not available. */
+#define MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE             -0x2e80
+/** Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH               -0x2e00
+
+#define MBEDTLS_PKCS5_DECRYPT      0
+#define MBEDTLS_PKCS5_ENCRYPT      1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_ASN1_PARSE_C)
+
+/**
+ * \brief          PKCS#5 PBES2 function
+ *
+ * \param pbe_params the ASN.1 algorithm parameters
+ * \param mode       either MBEDTLS_PKCS5_DECRYPT or MBEDTLS_PKCS5_ENCRYPT
+ * \param pwd        password to use when generating key
+ * \param pwdlen     length of password
+ * \param data       data to process
+ * \param datalen    length of data
+ * \param output     output buffer
+ *
+ * \returns        0 on success, or a MBEDTLS_ERR_XXX code if verification fails.
+ */
+int mbedtls_pkcs5_pbes2( const mbedtls_asn1_buf *pbe_params, int mode,
+                 const unsigned char *pwd,  size_t pwdlen,
+                 const unsigned char *data, size_t datalen,
+                 unsigned char *output );
+
+#endif /* MBEDTLS_ASN1_PARSE_C */
+
+/**
+ * \brief          PKCS#5 PBKDF2 using HMAC
+ *
+ * \param ctx      Generic HMAC context
+ * \param password Password to use when generating key
+ * \param plen     Length of password
+ * \param salt     Salt to use when generating key
+ * \param slen     Length of salt
+ * \param iteration_count       Iteration count
+ * \param key_length            Length of generated key in bytes
+ * \param output   Generated key. Must be at least as big as key_length
+ *
+ * \returns        0 on success, or a MBEDTLS_ERR_XXX code if verification fails.
+ */
+int mbedtls_pkcs5_pbkdf2_hmac( mbedtls_md_context_t *ctx, const unsigned char *password,
+                       size_t plen, const unsigned char *salt, size_t slen,
+                       unsigned int iteration_count,
+                       uint32_t key_length, unsigned char *output );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ */
+int mbedtls_pkcs5_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* pkcs5.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/platform.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/platform.h
new file mode 100644
index 00000000000..bdef07498d7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/platform.h
@@ -0,0 +1,419 @@
+/**
+ * \file platform.h
+ *
+ * \brief This file contains the definitions and functions of the
+ *        Mbed TLS platform abstraction layer.
+ *
+ *        The platform abstraction layer removes the need for the library
+ *        to directly link to standard C library functions or operating
+ *        system services, making the library easier to port and embed.
+ *        Application developers and users of the library can provide their own
+ *        implementations of these functions, or implementations specific to
+ *        their platform, which can be statically linked to the library or
+ *        dynamically configured at runtime.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_PLATFORM_H
+#define MBEDTLS_PLATFORM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_HAVE_TIME)
+#include "mbedtls/platform_time.h"
+#endif
+
+/** Hardware accelerator failed */
+#define MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED     -0x0070
+/** The requested feature is not supported by the platform */
+#define MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED -0x0072
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+/* The older Microsoft Windows common runtime provides non-conforming
+ * implementations of some standard library functions, including snprintf
+ * and vsnprintf. This affects MSVC and MinGW builds.
+ */
+#if defined(__MINGW32__) || (defined(_MSC_VER) && _MSC_VER <= 1900)
+#define MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF
+#define MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF
+#endif
+
+#if !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS)
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#if !defined(MBEDTLS_PLATFORM_STD_SNPRINTF)
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF)
+#define MBEDTLS_PLATFORM_STD_SNPRINTF   mbedtls_platform_win32_snprintf /**< The default \c snprintf function to use.  */
+#else
+#define MBEDTLS_PLATFORM_STD_SNPRINTF   snprintf /**< The default \c snprintf function to use.  */
+#endif
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_VSNPRINTF)
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF)
+#define MBEDTLS_PLATFORM_STD_VSNPRINTF   mbedtls_platform_win32_vsnprintf /**< The default \c vsnprintf function to use.  */
+#else
+#define MBEDTLS_PLATFORM_STD_VSNPRINTF   vsnprintf /**< The default \c vsnprintf function to use.  */
+#endif
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_PRINTF)
+#define MBEDTLS_PLATFORM_STD_PRINTF   printf /**< The default \c printf function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_FPRINTF)
+#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< The default \c fprintf function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_CALLOC)
+#define MBEDTLS_PLATFORM_STD_CALLOC   calloc /**< The default \c calloc function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_FREE)
+#define MBEDTLS_PLATFORM_STD_FREE       free /**< The default \c free function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_EXIT)
+#define MBEDTLS_PLATFORM_STD_EXIT      exit /**< The default \c exit function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_TIME)
+#define MBEDTLS_PLATFORM_STD_TIME       time    /**< The default \c time function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_EXIT_SUCCESS)
+#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS  EXIT_SUCCESS /**< The default exit value to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_EXIT_FAILURE)
+#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE  EXIT_FAILURE /**< The default exit value to use. */
+#endif
+#if defined(MBEDTLS_FS_IO)
+#if !defined(MBEDTLS_PLATFORM_STD_NV_SEED_READ)
+#define MBEDTLS_PLATFORM_STD_NV_SEED_READ   mbedtls_platform_std_nv_seed_read
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_NV_SEED_WRITE)
+#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE  mbedtls_platform_std_nv_seed_write
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_NV_SEED_FILE)
+#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE   "seedfile"
+#endif
+#endif /* MBEDTLS_FS_IO */
+#else /* MBEDTLS_PLATFORM_NO_STD_FUNCTIONS */
+#if defined(MBEDTLS_PLATFORM_STD_MEM_HDR)
+#include MBEDTLS_PLATFORM_STD_MEM_HDR
+#endif
+#endif /* MBEDTLS_PLATFORM_NO_STD_FUNCTIONS */
+
+
+/* \} name SECTION: Module settings */
+
+/*
+ * The function pointers for calloc and free.
+ */
+#if defined(MBEDTLS_PLATFORM_MEMORY)
+#if defined(MBEDTLS_PLATFORM_FREE_MACRO) && \
+    defined(MBEDTLS_PLATFORM_CALLOC_MACRO)
+#define mbedtls_free       MBEDTLS_PLATFORM_FREE_MACRO
+#define mbedtls_calloc     MBEDTLS_PLATFORM_CALLOC_MACRO
+#else
+/* For size_t */
+#include <stddef.h>
+extern void *mbedtls_calloc( size_t n, size_t size );
+extern void mbedtls_free( void *ptr );
+
+/**
+ * \brief               This function dynamically sets the memory-management
+ *                      functions used by the library, during runtime.
+ *
+ * \param calloc_func   The \c calloc function implementation.
+ * \param free_func     The \c free function implementation.
+ *
+ * \return              \c 0.
+ */
+int mbedtls_platform_set_calloc_free( void * (*calloc_func)( size_t, size_t ),
+                              void (*free_func)( void * ) );
+#endif /* MBEDTLS_PLATFORM_FREE_MACRO && MBEDTLS_PLATFORM_CALLOC_MACRO */
+#else /* !MBEDTLS_PLATFORM_MEMORY */
+#define mbedtls_free       free
+#define mbedtls_calloc     calloc
+#endif /* MBEDTLS_PLATFORM_MEMORY && !MBEDTLS_PLATFORM_{FREE,CALLOC}_MACRO */
+
+/*
+ * The function pointers for fprintf
+ */
+#if defined(MBEDTLS_PLATFORM_FPRINTF_ALT)
+/* We need FILE * */
+#include <stdio.h>
+extern int (*mbedtls_fprintf)( FILE *stream, const char *format, ... );
+
+/**
+ * \brief                This function dynamically configures the fprintf
+ *                       function that is called when the
+ *                       mbedtls_fprintf() function is invoked by the library.
+ *
+ * \param fprintf_func   The \c fprintf function implementation.
+ *
+ * \return               \c 0.
+ */
+int mbedtls_platform_set_fprintf( int (*fprintf_func)( FILE *stream, const char *,
+                                               ... ) );
+#else
+#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO)
+#define mbedtls_fprintf    MBEDTLS_PLATFORM_FPRINTF_MACRO
+#else
+#define mbedtls_fprintf    fprintf
+#endif /* MBEDTLS_PLATFORM_FPRINTF_MACRO */
+#endif /* MBEDTLS_PLATFORM_FPRINTF_ALT */
+
+/*
+ * The function pointers for printf
+ */
+#if defined(MBEDTLS_PLATFORM_PRINTF_ALT)
+extern int (*mbedtls_printf)( const char *format, ... );
+
+/**
+ * \brief               This function dynamically configures the snprintf
+ *                      function that is called when the mbedtls_snprintf()
+ *                      function is invoked by the library.
+ *
+ * \param printf_func   The \c printf function implementation.
+ *
+ * \return              \c 0 on success.
+ */
+int mbedtls_platform_set_printf( int (*printf_func)( const char *, ... ) );
+#else /* !MBEDTLS_PLATFORM_PRINTF_ALT */
+#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO)
+#define mbedtls_printf     MBEDTLS_PLATFORM_PRINTF_MACRO
+#else
+#define mbedtls_printf     printf
+#endif /* MBEDTLS_PLATFORM_PRINTF_MACRO */
+#endif /* MBEDTLS_PLATFORM_PRINTF_ALT */
+
+/*
+ * The function pointers for snprintf
+ *
+ * The snprintf implementation should conform to C99:
+ * - it *must* always correctly zero-terminate the buffer
+ *   (except when n == 0, then it must leave the buffer untouched)
+ * - however it is acceptable to return -1 instead of the required length when
+ *   the destination buffer is too short.
+ */
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF)
+/* For Windows (inc. MSYS2), we provide our own fixed implementation */
+int mbedtls_platform_win32_snprintf( char *s, size_t n, const char *fmt, ... );
+#endif
+
+#if defined(MBEDTLS_PLATFORM_SNPRINTF_ALT)
+extern int (*mbedtls_snprintf)( char * s, size_t n, const char * format, ... );
+
+/**
+ * \brief                 This function allows configuring a custom
+ *                        \c snprintf function pointer.
+ *
+ * \param snprintf_func   The \c snprintf function implementation.
+ *
+ * \return                \c 0 on success.
+ */
+int mbedtls_platform_set_snprintf( int (*snprintf_func)( char * s, size_t n,
+                                                 const char * format, ... ) );
+#else /* MBEDTLS_PLATFORM_SNPRINTF_ALT */
+#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO)
+#define mbedtls_snprintf   MBEDTLS_PLATFORM_SNPRINTF_MACRO
+#else
+#define mbedtls_snprintf   MBEDTLS_PLATFORM_STD_SNPRINTF
+#endif /* MBEDTLS_PLATFORM_SNPRINTF_MACRO */
+#endif /* MBEDTLS_PLATFORM_SNPRINTF_ALT */
+
+/*
+ * The function pointers for vsnprintf
+ *
+ * The vsnprintf implementation should conform to C99:
+ * - it *must* always correctly zero-terminate the buffer
+ *   (except when n == 0, then it must leave the buffer untouched)
+ * - however it is acceptable to return -1 instead of the required length when
+ *   the destination buffer is too short.
+ */
+#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF)
+#include <stdarg.h>
+/* For Older Windows (inc. MSYS2), we provide our own fixed implementation */
+int mbedtls_platform_win32_vsnprintf( char *s, size_t n, const char *fmt, va_list arg );
+#endif
+
+#if defined(MBEDTLS_PLATFORM_VSNPRINTF_ALT)
+#include <stdarg.h>
+extern int (*mbedtls_vsnprintf)( char * s, size_t n, const char * format, va_list arg );
+
+/**
+ * \brief   Set your own snprintf function pointer
+ *
+ * \param   vsnprintf_func   The \c vsnprintf function implementation
+ *
+ * \return  \c 0
+ */
+int mbedtls_platform_set_vsnprintf( int (*vsnprintf_func)( char * s, size_t n,
+                                                 const char * format, va_list arg ) );
+#else /* MBEDTLS_PLATFORM_VSNPRINTF_ALT */
+#if defined(MBEDTLS_PLATFORM_VSNPRINTF_MACRO)
+#define mbedtls_vsnprintf   MBEDTLS_PLATFORM_VSNPRINTF_MACRO
+#else
+#define mbedtls_vsnprintf   vsnprintf
+#endif /* MBEDTLS_PLATFORM_VSNPRINTF_MACRO */
+#endif /* MBEDTLS_PLATFORM_VSNPRINTF_ALT */
+
+/*
+ * The function pointers for exit
+ */
+#if defined(MBEDTLS_PLATFORM_EXIT_ALT)
+extern void (*mbedtls_exit)( int status );
+
+/**
+ * \brief             This function dynamically configures the exit
+ *                    function that is called when the mbedtls_exit()
+ *                    function is invoked by the library.
+ *
+ * \param exit_func   The \c exit function implementation.
+ *
+ * \return            \c 0 on success.
+ */
+int mbedtls_platform_set_exit( void (*exit_func)( int status ) );
+#else
+#if defined(MBEDTLS_PLATFORM_EXIT_MACRO)
+#define mbedtls_exit   MBEDTLS_PLATFORM_EXIT_MACRO
+#else
+#define mbedtls_exit   exit
+#endif /* MBEDTLS_PLATFORM_EXIT_MACRO */
+#endif /* MBEDTLS_PLATFORM_EXIT_ALT */
+
+/*
+ * The default exit values
+ */
+#if defined(MBEDTLS_PLATFORM_STD_EXIT_SUCCESS)
+#define MBEDTLS_EXIT_SUCCESS MBEDTLS_PLATFORM_STD_EXIT_SUCCESS
+#else
+#define MBEDTLS_EXIT_SUCCESS 0
+#endif
+#if defined(MBEDTLS_PLATFORM_STD_EXIT_FAILURE)
+#define MBEDTLS_EXIT_FAILURE MBEDTLS_PLATFORM_STD_EXIT_FAILURE
+#else
+#define MBEDTLS_EXIT_FAILURE 1
+#endif
+
+/*
+ * The function pointers for reading from and writing a seed file to
+ * Non-Volatile storage (NV) in a platform-independent way
+ *
+ * Only enabled when the NV seed entropy source is enabled
+ */
+#if defined(MBEDTLS_ENTROPY_NV_SEED)
+#if !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS) && defined(MBEDTLS_FS_IO)
+/* Internal standard platform definitions */
+int mbedtls_platform_std_nv_seed_read( unsigned char *buf, size_t buf_len );
+int mbedtls_platform_std_nv_seed_write( unsigned char *buf, size_t buf_len );
+#endif
+
+#if defined(MBEDTLS_PLATFORM_NV_SEED_ALT)
+extern int (*mbedtls_nv_seed_read)( unsigned char *buf, size_t buf_len );
+extern int (*mbedtls_nv_seed_write)( unsigned char *buf, size_t buf_len );
+
+/**
+ * \brief   This function allows configuring custom seed file writing and
+ *          reading functions.
+ *
+ * \param   nv_seed_read_func   The seed reading function implementation.
+ * \param   nv_seed_write_func  The seed writing function implementation.
+ *
+ * \return  \c 0 on success.
+ */
+int mbedtls_platform_set_nv_seed(
+            int (*nv_seed_read_func)( unsigned char *buf, size_t buf_len ),
+            int (*nv_seed_write_func)( unsigned char *buf, size_t buf_len )
+            );
+#else
+#if defined(MBEDTLS_PLATFORM_NV_SEED_READ_MACRO) && \
+    defined(MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO)
+#define mbedtls_nv_seed_read    MBEDTLS_PLATFORM_NV_SEED_READ_MACRO
+#define mbedtls_nv_seed_write   MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO
+#else
+#define mbedtls_nv_seed_read    mbedtls_platform_std_nv_seed_read
+#define mbedtls_nv_seed_write   mbedtls_platform_std_nv_seed_write
+#endif
+#endif /* MBEDTLS_PLATFORM_NV_SEED_ALT */
+#endif /* MBEDTLS_ENTROPY_NV_SEED */
+
+#if !defined(MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT)
+
+/**
+ * \brief   The platform context structure.
+ *
+ * \note    This structure may be used to assist platform-specific
+ *          setup or teardown operations.
+ */
+typedef struct mbedtls_platform_context
+{
+    char dummy; /**< A placeholder member, as empty structs are not portable. */
+}
+mbedtls_platform_context;
+
+#else
+#include "platform_alt.h"
+#endif /* !MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT */
+
+/**
+ * \brief   This function performs any platform-specific initialization
+ *          operations.
+ *
+ * \note    This function should be called before any other library functions.
+ *
+ *          Its implementation is platform-specific, and unless
+ *          platform-specific code is provided, it does nothing.
+ *
+ * \note    The usage and necessity of this function is dependent on the platform.
+ *
+ * \param   ctx     The platform context.
+ *
+ * \return  \c 0 on success.
+ */
+int mbedtls_platform_setup( mbedtls_platform_context *ctx );
+/**
+ * \brief   This function performs any platform teardown operations.
+ *
+ * \note    This function should be called after every other Mbed TLS module
+ *          has been correctly freed using the appropriate free function.
+ *
+ *          Its implementation is platform-specific, and unless
+ *          platform-specific code is provided, it does nothing.
+ *
+ * \note    The usage and necessity of this function is dependent on the platform.
+ *
+ * \param   ctx     The platform context.
+ *
+ */
+void mbedtls_platform_teardown( mbedtls_platform_context *ctx );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* platform.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/platform_time.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/platform_time.h
new file mode 100644
index 00000000000..7e7daab6920
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/platform_time.h
@@ -0,0 +1,80 @@
+/**
+ * \file platform_time.h
+ *
+ * \brief mbed TLS Platform time abstraction
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_PLATFORM_TIME_H
+#define MBEDTLS_PLATFORM_TIME_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+/*
+ * The time_t datatype
+ */
+#if defined(MBEDTLS_PLATFORM_TIME_TYPE_MACRO)
+typedef MBEDTLS_PLATFORM_TIME_TYPE_MACRO mbedtls_time_t;
+#else
+/* For time_t */
+#include <time.h>
+typedef time_t mbedtls_time_t;
+#endif /* MBEDTLS_PLATFORM_TIME_TYPE_MACRO */
+
+/*
+ * The function pointers for time
+ */
+#if defined(MBEDTLS_PLATFORM_TIME_ALT)
+extern mbedtls_time_t (*mbedtls_time)( mbedtls_time_t* time );
+
+/**
+ * \brief   Set your own time function pointer
+ *
+ * \param   time_func   the time function implementation
+ *
+ * \return              0
+ */
+int mbedtls_platform_set_time( mbedtls_time_t (*time_func)( mbedtls_time_t* time ) );
+#else
+#if defined(MBEDTLS_PLATFORM_TIME_MACRO)
+#define mbedtls_time    MBEDTLS_PLATFORM_TIME_MACRO
+#else
+#define mbedtls_time   time
+#endif /* MBEDTLS_PLATFORM_TIME_MACRO */
+#endif /* MBEDTLS_PLATFORM_TIME_ALT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* platform_time.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/platform_util.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/platform_util.h
new file mode 100644
index 00000000000..f982db8c01c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/platform_util.h
@@ -0,0 +1,283 @@
+/**
+ * \file platform_util.h
+ *
+ * \brief Common and shared functions used by multiple modules in the Mbed TLS
+ *        library.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_PLATFORM_UTIL_H
+#define MBEDTLS_PLATFORM_UTIL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#if defined(MBEDTLS_HAVE_TIME_DATE)
+#include "mbedtls/platform_time.h"
+#include <time.h>
+#endif /* MBEDTLS_HAVE_TIME_DATE */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_CHECK_PARAMS)
+
+#if defined(MBEDTLS_CHECK_PARAMS_ASSERT)
+/* Allow the user to define MBEDTLS_PARAM_FAILED to something like assert
+ * (which is what our config.h suggests). */
+#include <assert.h>
+#endif /* MBEDTLS_CHECK_PARAMS_ASSERT */
+
+#if defined(MBEDTLS_PARAM_FAILED)
+/** An alternative definition of MBEDTLS_PARAM_FAILED has been set in config.h.
+ *
+ * This flag can be used to check whether it is safe to assume that
+ * MBEDTLS_PARAM_FAILED() will expand to a call to mbedtls_param_failed().
+ */
+#define MBEDTLS_PARAM_FAILED_ALT
+
+#elif defined(MBEDTLS_CHECK_PARAMS_ASSERT)
+#define MBEDTLS_PARAM_FAILED( cond ) assert( cond )
+#define MBEDTLS_PARAM_FAILED_ALT
+
+#else /* MBEDTLS_PARAM_FAILED */
+#define MBEDTLS_PARAM_FAILED( cond ) \
+    mbedtls_param_failed( #cond, __FILE__, __LINE__ )
+
+/**
+ * \brief       User supplied callback function for parameter validation failure.
+ *              See #MBEDTLS_CHECK_PARAMS for context.
+ *
+ *              This function will be called unless an alternative treatement
+ *              is defined through the #MBEDTLS_PARAM_FAILED macro.
+ *
+ *              This function can return, and the operation will be aborted, or
+ *              alternatively, through use of setjmp()/longjmp() can resume
+ *              execution in the application code.
+ *
+ * \param failure_condition The assertion that didn't hold.
+ * \param file  The file where the assertion failed.
+ * \param line  The line in the file where the assertion failed.
+ */
+void mbedtls_param_failed( const char *failure_condition,
+                           const char *file,
+                           int line );
+#endif /* MBEDTLS_PARAM_FAILED */
+
+/* Internal macro meant to be called only from within the library. */
+#define MBEDTLS_INTERNAL_VALIDATE_RET( cond, ret )  \
+    do {                                            \
+        if( !(cond) )                               \
+        {                                           \
+            MBEDTLS_PARAM_FAILED( cond );           \
+            return( ret );                          \
+        }                                           \
+    } while( 0 )
+
+/* Internal macro meant to be called only from within the library. */
+#define MBEDTLS_INTERNAL_VALIDATE( cond )           \
+    do {                                            \
+        if( !(cond) )                               \
+        {                                           \
+            MBEDTLS_PARAM_FAILED( cond );           \
+            return;                                 \
+        }                                           \
+    } while( 0 )
+
+#else /* MBEDTLS_CHECK_PARAMS */
+
+/* Internal macros meant to be called only from within the library. */
+#define MBEDTLS_INTERNAL_VALIDATE_RET( cond, ret )  do { } while( 0 )
+#define MBEDTLS_INTERNAL_VALIDATE( cond )           do { } while( 0 )
+
+#endif /* MBEDTLS_CHECK_PARAMS */
+
+/* Internal helper macros for deprecating API constants. */
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+/* Deliberately don't (yet) export MBEDTLS_DEPRECATED here
+ * to avoid conflict with other headers which define and use
+ * it, too. We might want to move all these definitions here at
+ * some point for uniformity. */
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+MBEDTLS_DEPRECATED typedef char const * mbedtls_deprecated_string_constant_t;
+#define MBEDTLS_DEPRECATED_STRING_CONSTANT( VAL )       \
+    ( (mbedtls_deprecated_string_constant_t) ( VAL ) )
+MBEDTLS_DEPRECATED typedef int mbedtls_deprecated_numeric_constant_t;
+#define MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( VAL )       \
+    ( (mbedtls_deprecated_numeric_constant_t) ( VAL ) )
+#undef MBEDTLS_DEPRECATED
+#else /* MBEDTLS_DEPRECATED_WARNING */
+#define MBEDTLS_DEPRECATED_STRING_CONSTANT( VAL ) VAL
+#define MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( VAL ) VAL
+#endif /* MBEDTLS_DEPRECATED_WARNING */
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/* Implementation of the check-return facility.
+ * See the user documentation in config.h.
+ *
+ * Do not use this macro directly to annotate function: instead,
+ * use one of MBEDTLS_CHECK_RETURN_CRITICAL or MBEDTLS_CHECK_RETURN_TYPICAL
+ * depending on how important it is to check the return value.
+ */
+#if !defined(MBEDTLS_CHECK_RETURN)
+#if defined(__GNUC__)
+#define MBEDTLS_CHECK_RETURN __attribute__((__warn_unused_result__))
+#elif defined(_MSC_VER) && _MSC_VER >= 1700
+#include <sal.h>
+#define MBEDTLS_CHECK_RETURN _Check_return_
+#else
+#define MBEDTLS_CHECK_RETURN
+#endif
+#endif
+
+/** Critical-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that its return value should be checked in all applications.
+ * Omitting the check is very likely to indicate a bug in the application
+ * and will result in a compile-time warning if #MBEDTLS_CHECK_RETURN
+ * is implemented for the compiler in use.
+ *
+ * \note  The use of this macro is a work in progress.
+ *        This macro may be added to more functions in the future.
+ *        Such an extension is not considered an API break, provided that
+ *        there are near-unavoidable circumstances under which the function
+ *        can fail. For example, signature/MAC/AEAD verification functions,
+ *        and functions that require a random generator, are considered
+ *        return-check-critical.
+ */
+#define MBEDTLS_CHECK_RETURN_CRITICAL MBEDTLS_CHECK_RETURN
+
+/** Ordinary-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that its return value should be generally be checked in portable
+ * applications. Omitting the check will result in a compile-time warning if
+ * #MBEDTLS_CHECK_RETURN is implemented for the compiler in use and
+ * #MBEDTLS_CHECK_RETURN_WARNING is enabled in the compile-time configuration.
+ *
+ * You can use #MBEDTLS_IGNORE_RETURN to explicitly ignore the return value
+ * of a function that is annotated with #MBEDTLS_CHECK_RETURN.
+ *
+ * \note  The use of this macro is a work in progress.
+ *        This macro will be added to more functions in the future.
+ *        Eventually this should appear before most functions returning
+ *        an error code (as \c int in the \c mbedtls_xxx API or
+ *        as ::psa_status_t in the \c psa_xxx API).
+ */
+#if defined(MBEDTLS_CHECK_RETURN_WARNING)
+#define MBEDTLS_CHECK_RETURN_TYPICAL MBEDTLS_CHECK_RETURN
+#else
+#define MBEDTLS_CHECK_RETURN_TYPICAL
+#endif
+
+/** Benign-failure function
+ *
+ * This macro appearing at the beginning of the declaration of a function
+ * indicates that it is rarely useful to check its return value.
+ *
+ * This macro has an empty expansion. It exists for documentation purposes:
+ * a #MBEDTLS_CHECK_RETURN_OPTIONAL annotation indicates that the function
+ * has been analyzed for return-check usefuless, whereas the lack of
+ * an annotation indicates that the function has not been analyzed and its
+ * return-check usefulness is unknown.
+ */
+#define MBEDTLS_CHECK_RETURN_OPTIONAL
+
+/** \def MBEDTLS_IGNORE_RETURN
+ *
+ * Call this macro with one argument, a function call, to suppress a warning
+ * from #MBEDTLS_CHECK_RETURN due to that function call.
+ */
+#if !defined(MBEDTLS_IGNORE_RETURN)
+/* GCC doesn't silence the warning with just (void)(result).
+ * (void)!(result) is known to work up at least up to GCC 10, as well
+ * as with Clang and MSVC.
+ *
+ * https://gcc.gnu.org/onlinedocs/gcc-3.4.6/gcc/Non_002dbugs.html
+ * https://stackoverflow.com/questions/40576003/ignoring-warning-wunused-result
+ * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66425#c34
+ */
+#define MBEDTLS_IGNORE_RETURN(result) ( (void) !( result ) )
+#endif
+
+/**
+ * \brief       Securely zeroize a buffer
+ *
+ *              The function is meant to wipe the data contained in a buffer so
+ *              that it can no longer be recovered even if the program memory
+ *              is later compromised. Call this function on sensitive data
+ *              stored on the stack before returning from a function, and on
+ *              sensitive data stored on the heap before freeing the heap
+ *              object.
+ *
+ *              It is extremely difficult to guarantee that calls to
+ *              mbedtls_platform_zeroize() are not removed by aggressive
+ *              compiler optimizations in a portable way. For this reason, Mbed
+ *              TLS provides the configuration option
+ *              MBEDTLS_PLATFORM_ZEROIZE_ALT, which allows users to configure
+ *              mbedtls_platform_zeroize() to use a suitable implementation for
+ *              their platform and needs
+ *
+ * \param buf   Buffer to be zeroized
+ * \param len   Length of the buffer in bytes
+ *
+ */
+void mbedtls_platform_zeroize( void *buf, size_t len );
+
+#if defined(MBEDTLS_HAVE_TIME_DATE)
+/**
+ * \brief      Platform-specific implementation of gmtime_r()
+ *
+ *             The function is a thread-safe abstraction that behaves
+ *             similarly to the gmtime_r() function from Unix/POSIX.
+ *
+ *             Mbed TLS will try to identify the underlying platform and
+ *             make use of an appropriate underlying implementation (e.g.
+ *             gmtime_r() for POSIX and gmtime_s() for Windows). If this is
+ *             not possible, then gmtime() will be used. In this case, calls
+ *             from the library to gmtime() will be guarded by the mutex
+ *             mbedtls_threading_gmtime_mutex if MBEDTLS_THREADING_C is
+ *             enabled. It is recommended that calls from outside the library
+ *             are also guarded by this mutex.
+ *
+ *             If MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, then Mbed TLS will
+ *             unconditionally use the alternative implementation for
+ *             mbedtls_platform_gmtime_r() supplied by the user at compile time.
+ *
+ * \param tt     Pointer to an object containing time (in seconds) since the
+ *               epoch to be converted
+ * \param tm_buf Pointer to an object where the results will be stored
+ *
+ * \return      Pointer to an object of type struct tm on success, otherwise
+ *              NULL
+ */
+struct tm *mbedtls_platform_gmtime_r( const mbedtls_time_t *tt,
+                                      struct tm *tm_buf );
+#endif /* MBEDTLS_HAVE_TIME_DATE */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_PLATFORM_UTIL_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/poly1305.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/poly1305.h
new file mode 100644
index 00000000000..a69ede98b5e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/poly1305.h
@@ -0,0 +1,194 @@
+/**
+ * \file poly1305.h
+ *
+ * \brief   This file contains Poly1305 definitions and functions.
+ *
+ *          Poly1305 is a one-time message authenticator that can be used to
+ *          authenticate messages. Poly1305-AES was created by Daniel
+ *          Bernstein https://cr.yp.to/mac/poly1305-20050329.pdf The generic
+ *          Poly1305 algorithm (not tied to AES) was also standardized in RFC
+ *          7539.
+ *
+ * \author Daniel King <damaki.gh@gmail.com>
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_POLY1305_H
+#define MBEDTLS_POLY1305_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stdint.h>
+#include <stddef.h>
+
+/** Invalid input parameter(s). */
+#define MBEDTLS_ERR_POLY1305_BAD_INPUT_DATA         -0x0057
+
+/* MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE is deprecated and should not be
+ * used. */
+/** Feature not available. For example, s part of the API is not implemented. */
+#define MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE    -0x0059
+
+/* MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED is deprecated and should not be used.
+ */
+/** Poly1305 hardware accelerator failed. */
+#define MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED        -0x005B
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_POLY1305_ALT)
+
+typedef struct mbedtls_poly1305_context
+{
+    uint32_t r[4];      /** The value for 'r' (low 128 bits of the key). */
+    uint32_t s[4];      /** The value for 's' (high 128 bits of the key). */
+    uint32_t acc[5];    /** The accumulator number. */
+    uint8_t queue[16];  /** The current partial block of data. */
+    size_t queue_len;   /** The number of bytes stored in 'queue'. */
+}
+mbedtls_poly1305_context;
+
+#else  /* MBEDTLS_POLY1305_ALT */
+#include "poly1305_alt.h"
+#endif /* MBEDTLS_POLY1305_ALT */
+
+/**
+ * \brief           This function initializes the specified Poly1305 context.
+ *
+ *                  It must be the first API called before using
+ *                  the context.
+ *
+ *                  It is usually followed by a call to
+ *                  \c mbedtls_poly1305_starts(), then one or more calls to
+ *                  \c mbedtls_poly1305_update(), then one call to
+ *                  \c mbedtls_poly1305_finish(), then finally
+ *                  \c mbedtls_poly1305_free().
+ *
+ * \param ctx       The Poly1305 context to initialize. This must
+ *                  not be \c NULL.
+ */
+void mbedtls_poly1305_init( mbedtls_poly1305_context *ctx );
+
+/**
+ * \brief           This function releases and clears the specified
+ *                  Poly1305 context.
+ *
+ * \param ctx       The Poly1305 context to clear. This may be \c NULL, in which
+ *                  case this function is a no-op. If it is not \c NULL, it must
+ *                  point to an initialized Poly1305 context.
+ */
+void mbedtls_poly1305_free( mbedtls_poly1305_context *ctx );
+
+/**
+ * \brief           This function sets the one-time authentication key.
+ *
+ * \warning         The key must be unique and unpredictable for each
+ *                  invocation of Poly1305.
+ *
+ * \param ctx       The Poly1305 context to which the key should be bound.
+ *                  This must be initialized.
+ * \param key       The buffer containing the \c 32 Byte (\c 256 Bit) key.
+ *
+ * \return          \c 0 on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_poly1305_starts( mbedtls_poly1305_context *ctx,
+                             const unsigned char key[32] );
+
+/**
+ * \brief           This functions feeds an input buffer into an ongoing
+ *                  Poly1305 computation.
+ *
+ *                  It is called between \c mbedtls_cipher_poly1305_starts() and
+ *                  \c mbedtls_cipher_poly1305_finish().
+ *                  It can be called repeatedly to process a stream of data.
+ *
+ * \param ctx       The Poly1305 context to use for the Poly1305 operation.
+ *                  This must be initialized and bound to a key.
+ * \param ilen      The length of the input data in Bytes.
+ *                  Any value is accepted.
+ * \param input     The buffer holding the input data.
+ *                  This pointer can be \c NULL if `ilen == 0`.
+ *
+ * \return          \c 0 on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_poly1305_update( mbedtls_poly1305_context *ctx,
+                             const unsigned char *input,
+                             size_t ilen );
+
+/**
+ * \brief           This function generates the Poly1305 Message
+ *                  Authentication Code (MAC).
+ *
+ * \param ctx       The Poly1305 context to use for the Poly1305 operation.
+ *                  This must be initialized and bound to a key.
+ * \param mac       The buffer to where the MAC is written. This must
+ *                  be a writable buffer of length \c 16 Bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_poly1305_finish( mbedtls_poly1305_context *ctx,
+                             unsigned char mac[16] );
+
+/**
+ * \brief           This function calculates the Poly1305 MAC of the input
+ *                  buffer with the provided key.
+ *
+ * \warning         The key must be unique and unpredictable for each
+ *                  invocation of Poly1305.
+ *
+ * \param key       The buffer containing the \c 32 Byte (\c 256 Bit) key.
+ * \param ilen      The length of the input data in Bytes.
+ *                  Any value is accepted.
+ * \param input     The buffer holding the input data.
+ *                  This pointer can be \c NULL if `ilen == 0`.
+ * \param mac       The buffer to where the MAC is written. This must be
+ *                  a writable buffer of length \c 16 Bytes.
+ *
+ * \return          \c 0 on success.
+ * \return          A negative error code on failure.
+ */
+int mbedtls_poly1305_mac( const unsigned char key[32],
+                          const unsigned char *input,
+                          size_t ilen,
+                          unsigned char mac[16] );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief           The Poly1305 checkup routine.
+ *
+ * \return          \c 0 on success.
+ * \return          \c 1 on failure.
+ */
+int mbedtls_poly1305_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_POLY1305_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/psa_util.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/psa_util.h
new file mode 100644
index 00000000000..af7a809e40b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/psa_util.h
@@ -0,0 +1,512 @@
+/**
+ * \file psa_util.h
+ *
+ * \brief Utility functions for the use of the PSA Crypto library.
+ *
+ * \warning This function is not part of the public API and may
+ *          change at any time.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef MBEDTLS_PSA_UTIL_H
+#define MBEDTLS_PSA_UTIL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+
+#include "psa/crypto.h"
+
+#include "mbedtls/ecp.h"
+#include "mbedtls/md.h"
+#include "mbedtls/pk.h"
+#include "mbedtls/oid.h"
+
+#include <string.h>
+
+/* Translations for symmetric crypto. */
+
+static inline psa_key_type_t mbedtls_psa_translate_cipher_type(
+    mbedtls_cipher_type_t cipher )
+{
+    switch( cipher )
+    {
+        case MBEDTLS_CIPHER_AES_128_CCM:
+        case MBEDTLS_CIPHER_AES_192_CCM:
+        case MBEDTLS_CIPHER_AES_256_CCM:
+        case MBEDTLS_CIPHER_AES_128_GCM:
+        case MBEDTLS_CIPHER_AES_192_GCM:
+        case MBEDTLS_CIPHER_AES_256_GCM:
+        case MBEDTLS_CIPHER_AES_128_CBC:
+        case MBEDTLS_CIPHER_AES_192_CBC:
+        case MBEDTLS_CIPHER_AES_256_CBC:
+        case MBEDTLS_CIPHER_AES_128_ECB:
+        case MBEDTLS_CIPHER_AES_192_ECB:
+        case MBEDTLS_CIPHER_AES_256_ECB:
+            return( PSA_KEY_TYPE_AES );
+
+        /* ARIA not yet supported in PSA. */
+        /* case MBEDTLS_CIPHER_ARIA_128_CCM:
+           case MBEDTLS_CIPHER_ARIA_192_CCM:
+           case MBEDTLS_CIPHER_ARIA_256_CCM:
+           case MBEDTLS_CIPHER_ARIA_128_GCM:
+           case MBEDTLS_CIPHER_ARIA_192_GCM:
+           case MBEDTLS_CIPHER_ARIA_256_GCM:
+           case MBEDTLS_CIPHER_ARIA_128_CBC:
+           case MBEDTLS_CIPHER_ARIA_192_CBC:
+           case MBEDTLS_CIPHER_ARIA_256_CBC:
+               return( PSA_KEY_TYPE_ARIA ); */
+
+        default:
+            return( 0 );
+    }
+}
+
+static inline psa_algorithm_t mbedtls_psa_translate_cipher_mode(
+    mbedtls_cipher_mode_t mode, size_t taglen )
+{
+    switch( mode )
+    {
+        case MBEDTLS_MODE_ECB:
+            return( PSA_ALG_ECB_NO_PADDING );
+        case MBEDTLS_MODE_GCM:
+            return( PSA_ALG_AEAD_WITH_SHORTENED_TAG( PSA_ALG_GCM, taglen ) );
+        case MBEDTLS_MODE_CCM:
+            return( PSA_ALG_AEAD_WITH_SHORTENED_TAG( PSA_ALG_CCM, taglen ) );
+        case MBEDTLS_MODE_CBC:
+            if( taglen == 0 )
+                return( PSA_ALG_CBC_NO_PADDING );
+            else
+                return( 0 );
+        default:
+            return( 0 );
+    }
+}
+
+static inline psa_key_usage_t mbedtls_psa_translate_cipher_operation(
+    mbedtls_operation_t op )
+{
+    switch( op )
+    {
+        case MBEDTLS_ENCRYPT:
+            return( PSA_KEY_USAGE_ENCRYPT );
+        case MBEDTLS_DECRYPT:
+            return( PSA_KEY_USAGE_DECRYPT );
+        default:
+            return( 0 );
+    }
+}
+
+/* Translations for hashing. */
+
+static inline psa_algorithm_t mbedtls_psa_translate_md( mbedtls_md_type_t md_alg )
+{
+    switch( md_alg )
+    {
+#if defined(MBEDTLS_MD2_C)
+    case MBEDTLS_MD_MD2:
+        return( PSA_ALG_MD2 );
+#endif
+#if defined(MBEDTLS_MD4_C)
+    case MBEDTLS_MD_MD4:
+        return( PSA_ALG_MD4 );
+#endif
+#if defined(MBEDTLS_MD5_C)
+    case MBEDTLS_MD_MD5:
+        return( PSA_ALG_MD5 );
+#endif
+#if defined(MBEDTLS_SHA1_C)
+    case MBEDTLS_MD_SHA1:
+        return( PSA_ALG_SHA_1 );
+#endif
+#if defined(MBEDTLS_SHA256_C)
+    case MBEDTLS_MD_SHA224:
+        return( PSA_ALG_SHA_224 );
+    case MBEDTLS_MD_SHA256:
+        return( PSA_ALG_SHA_256 );
+#endif
+#if defined(MBEDTLS_SHA512_C)
+    case MBEDTLS_MD_SHA384:
+        return( PSA_ALG_SHA_384 );
+    case MBEDTLS_MD_SHA512:
+        return( PSA_ALG_SHA_512 );
+#endif
+#if defined(MBEDTLS_RIPEMD160_C)
+    case MBEDTLS_MD_RIPEMD160:
+        return( PSA_ALG_RIPEMD160 );
+#endif
+    case MBEDTLS_MD_NONE:
+        return( 0 );
+    default:
+        return( 0 );
+    }
+}
+
+/* Translations for ECC. */
+
+static inline int mbedtls_psa_get_ecc_oid_from_id(
+    psa_ecc_family_t curve, size_t bits,
+    char const **oid, size_t *oid_len )
+{
+    switch( curve )
+    {
+        case PSA_ECC_FAMILY_SECP_R1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+                case 192:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP192R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP192R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+                case 224:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP224R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP224R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP256R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP256R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+                case 384:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP384R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP384R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+                case 521:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP521R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP521R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */
+            }
+            break;
+        case PSA_ECC_FAMILY_SECP_K1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+                case 192:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP192K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP192K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+                case 224:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP224K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP224K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_SECP256K1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_SECP256K1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */
+            }
+            break;
+        case PSA_ECC_FAMILY_BRAINPOOL_P_R1:
+            switch( bits )
+            {
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+                case 256:
+                    *oid = MBEDTLS_OID_EC_GRP_BP256R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP256R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+                case 384:
+                    *oid = MBEDTLS_OID_EC_GRP_BP384R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP384R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+                case 512:
+                    *oid = MBEDTLS_OID_EC_GRP_BP512R1;
+                    *oid_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_EC_GRP_BP512R1 );
+                    return( 0 );
+#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */
+            }
+            break;
+    }
+    (void) oid;
+    (void) oid_len;
+    return( -1 );
+}
+
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH 1
+
+#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 521 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 521 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 192 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 224 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 256 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 384 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */
+
+#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#if MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH < ( 2 * ( ( 512 + 7 ) / 8 ) + 1 )
+#undef MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH
+#define MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH ( 2 * ( ( 512 + 7 ) / 8 ) + 1 )
+#endif
+#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */
+
+
+/* Translations for PK layer */
+
+static inline int mbedtls_psa_err_translate_pk( psa_status_t status )
+{
+    switch( status )
+    {
+        case PSA_SUCCESS:
+            return( 0 );
+        case PSA_ERROR_NOT_SUPPORTED:
+            return( MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE );
+        case PSA_ERROR_INSUFFICIENT_MEMORY:
+            return( MBEDTLS_ERR_PK_ALLOC_FAILED );
+        case PSA_ERROR_INSUFFICIENT_ENTROPY:
+            return( MBEDTLS_ERR_ECP_RANDOM_FAILED );
+        case PSA_ERROR_BAD_STATE:
+            return( MBEDTLS_ERR_PK_BAD_INPUT_DATA );
+        /* All other failures */
+        case PSA_ERROR_COMMUNICATION_FAILURE:
+        case PSA_ERROR_HARDWARE_FAILURE:
+        case PSA_ERROR_CORRUPTION_DETECTED:
+            return( MBEDTLS_ERR_PK_HW_ACCEL_FAILED );
+        default: /* We return the same as for the 'other failures',
+                  * but list them separately nonetheless to indicate
+                  * which failure conditions we have considered. */
+            return( MBEDTLS_ERR_PK_HW_ACCEL_FAILED );
+    }
+}
+
+/* Translations for ECC */
+
+/* This function transforms an ECC group identifier from
+ * https://www.iana.org/assignments/tls-parameters/tls-parameters.xhtml#tls-parameters-8
+ * into a PSA ECC group identifier. */
+#if defined(MBEDTLS_ECP_C)
+static inline psa_key_type_t mbedtls_psa_parse_tls_ecc_group(
+    uint16_t tls_ecc_grp_reg_id, size_t *bits )
+{
+    const mbedtls_ecp_curve_info *curve_info =
+        mbedtls_ecp_curve_info_from_tls_id( tls_ecc_grp_reg_id );
+    if( curve_info == NULL )
+        return( 0 );
+    return( PSA_KEY_TYPE_ECC_KEY_PAIR(
+                mbedtls_ecc_group_to_psa( curve_info->grp_id, bits ) ) );
+}
+#endif /* MBEDTLS_ECP_C */
+
+/* This function takes a buffer holding an EC public key
+ * exported through psa_export_public_key(), and converts
+ * it into an ECPoint structure to be put into a ClientKeyExchange
+ * message in an ECDHE exchange.
+ *
+ * Both the present and the foreseeable future format of EC public keys
+ * used by PSA have the ECPoint structure contained in the exported key
+ * as a subbuffer, and the function merely selects this subbuffer instead
+ * of making a copy.
+ */
+static inline int mbedtls_psa_tls_psa_ec_to_ecpoint( unsigned char *src,
+                                                     size_t srclen,
+                                                     unsigned char **dst,
+                                                     size_t *dstlen )
+{
+    *dst = src;
+    *dstlen = srclen;
+    return( 0 );
+}
+
+/* This function takes a buffer holding an ECPoint structure
+ * (as contained in a TLS ServerKeyExchange message for ECDHE
+ * exchanges) and converts it into a format that the PSA key
+ * agreement API understands.
+ */
+static inline int mbedtls_psa_tls_ecpoint_to_psa_ec( unsigned char const *src,
+                                                     size_t srclen,
+                                                     unsigned char *dst,
+                                                     size_t dstlen,
+                                                     size_t *olen )
+{
+    if( srclen > dstlen )
+        return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL );
+
+    memcpy( dst, src, srclen );
+    *olen = srclen;
+    return( 0 );
+}
+
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+/* Expose whatever RNG the PSA subsystem uses to applications using the
+ * mbedtls_xxx API. The declarations and definitions here need to be
+ * consistent with the implementation in library/psa_crypto_random_impl.h.
+ * See that file for implementation documentation. */
+#if defined(MBEDTLS_PSA_CRYPTO_C)
+
+/* The type of a `f_rng` random generator function that many library functions
+ * take.
+ *
+ * This type name is not part of the Mbed TLS stable API. It may be renamed
+ * or moved without warning.
+ */
+typedef int mbedtls_f_rng_t( void *p_rng, unsigned char *output, size_t output_size );
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+
+/** The random generator function for the PSA subsystem.
+ *
+ * This function is suitable as the `f_rng` random generator function
+ * parameter of many `mbedtls_xxx` functions. Use #MBEDTLS_PSA_RANDOM_STATE
+ * to obtain the \p p_rng parameter.
+ *
+ * The implementation of this function depends on the configuration of the
+ * library.
+ *
+ * \note Depending on the configuration, this may be a function or
+ *       a pointer to a function.
+ *
+ * \note This function may only be used if the PSA crypto subsystem is active.
+ *       This means that you must call psa_crypto_init() before any call to
+ *       this function, and you must not call this function after calling
+ *       mbedtls_psa_crypto_free().
+ *
+ * \param p_rng         The random generator context. This must be
+ *                      #MBEDTLS_PSA_RANDOM_STATE. No other state is
+ *                      supported.
+ * \param output        The buffer to fill. It must have room for
+ *                      \c output_size bytes.
+ * \param output_size   The number of bytes to write to \p output.
+ *                      This function may fail if \p output_size is too
+ *                      large. It is guaranteed to accept any output size
+ *                      requested by Mbed TLS library functions. The
+ *                      maximum request size depends on the library
+ *                      configuration.
+ *
+ * \return              \c 0 on success.
+ * \return              An `MBEDTLS_ERR_ENTROPY_xxx`,
+ *                      `MBEDTLS_ERR_PLATFORM_xxx,
+ *                      `MBEDTLS_ERR_CTR_DRBG_xxx` or
+ *                      `MBEDTLS_ERR_HMAC_DRBG_xxx` on error.
+ */
+int mbedtls_psa_get_random( void *p_rng,
+                            unsigned char *output,
+                            size_t output_size );
+
+/** The random generator state for the PSA subsystem.
+ *
+ * This macro expands to an expression which is suitable as the `p_rng`
+ * random generator state parameter of many `mbedtls_xxx` functions.
+ * It must be used in combination with the random generator function
+ * mbedtls_psa_get_random().
+ *
+ * The implementation of this macro depends on the configuration of the
+ * library. Do not make any assumption on its nature.
+ */
+#define MBEDTLS_PSA_RANDOM_STATE NULL
+
+#else /* !defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) */
+
+#if defined(MBEDTLS_CTR_DRBG_C)
+#include "mbedtls/ctr_drbg.h"
+typedef mbedtls_ctr_drbg_context mbedtls_psa_drbg_context_t;
+static mbedtls_f_rng_t *const mbedtls_psa_get_random = mbedtls_ctr_drbg_random;
+#elif defined(MBEDTLS_HMAC_DRBG_C)
+#include "mbedtls/hmac_drbg.h"
+typedef mbedtls_hmac_drbg_context mbedtls_psa_drbg_context_t;
+static mbedtls_f_rng_t *const mbedtls_psa_get_random = mbedtls_hmac_drbg_random;
+#endif
+extern mbedtls_psa_drbg_context_t *const mbedtls_psa_random_state;
+
+#define MBEDTLS_PSA_RANDOM_STATE mbedtls_psa_random_state
+
+#endif /* !defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) */
+
+#endif /* MBEDTLS_PSA_CRYPTO_C */
+
+#endif /* MBEDTLS_PSA_UTIL_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h
new file mode 100644
index 00000000000..63270d12394
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ripemd160.h
@@ -0,0 +1,236 @@
+/**
+ * \file ripemd160.h
+ *
+ * \brief RIPE MD-160 message digest
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_RIPEMD160_H
+#define MBEDTLS_RIPEMD160_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED is deprecated and should not be used.
+ */
+/** RIPEMD160 hardware accelerator failed */
+#define MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED             -0x0031
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_RIPEMD160_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          RIPEMD-160 context structure
+ */
+typedef struct mbedtls_ripemd160_context
+{
+    uint32_t total[2];          /*!< number of bytes processed  */
+    uint32_t state[5];          /*!< intermediate digest state  */
+    unsigned char buffer[64];   /*!< data block being processed */
+}
+mbedtls_ripemd160_context;
+
+#else  /* MBEDTLS_RIPEMD160_ALT */
+#include "ripemd160_alt.h"
+#endif /* MBEDTLS_RIPEMD160_ALT */
+
+/**
+ * \brief          Initialize RIPEMD-160 context
+ *
+ * \param ctx      RIPEMD-160 context to be initialized
+ */
+void mbedtls_ripemd160_init( mbedtls_ripemd160_context *ctx );
+
+/**
+ * \brief          Clear RIPEMD-160 context
+ *
+ * \param ctx      RIPEMD-160 context to be cleared
+ */
+void mbedtls_ripemd160_free( mbedtls_ripemd160_context *ctx );
+
+/**
+ * \brief          Clone (the state of) an RIPEMD-160 context
+ *
+ * \param dst      The destination context
+ * \param src      The context to be cloned
+ */
+void mbedtls_ripemd160_clone( mbedtls_ripemd160_context *dst,
+                        const mbedtls_ripemd160_context *src );
+
+/**
+ * \brief          RIPEMD-160 context setup
+ *
+ * \param ctx      context to be initialized
+ *
+ * \return         0 if successful
+ */
+int mbedtls_ripemd160_starts_ret( mbedtls_ripemd160_context *ctx );
+
+/**
+ * \brief          RIPEMD-160 process buffer
+ *
+ * \param ctx      RIPEMD-160 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \return         0 if successful
+ */
+int mbedtls_ripemd160_update_ret( mbedtls_ripemd160_context *ctx,
+                                  const unsigned char *input,
+                                  size_t ilen );
+
+/**
+ * \brief          RIPEMD-160 final digest
+ *
+ * \param ctx      RIPEMD-160 context
+ * \param output   RIPEMD-160 checksum result
+ *
+ * \return         0 if successful
+ */
+int mbedtls_ripemd160_finish_ret( mbedtls_ripemd160_context *ctx,
+                                  unsigned char output[20] );
+
+/**
+ * \brief          RIPEMD-160 process data block (internal use only)
+ *
+ * \param ctx      RIPEMD-160 context
+ * \param data     buffer holding one block of data
+ *
+ * \return         0 if successful
+ */
+int mbedtls_internal_ripemd160_process( mbedtls_ripemd160_context *ctx,
+                                        const unsigned char data[64] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          RIPEMD-160 context setup
+ *
+ * \deprecated     Superseded by mbedtls_ripemd160_starts_ret() in 2.7.0
+ *
+ * \param ctx      context to be initialized
+ */
+MBEDTLS_DEPRECATED void mbedtls_ripemd160_starts(
+                                            mbedtls_ripemd160_context *ctx );
+
+/**
+ * \brief          RIPEMD-160 process buffer
+ *
+ * \deprecated     Superseded by mbedtls_ripemd160_update_ret() in 2.7.0
+ *
+ * \param ctx      RIPEMD-160 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ */
+MBEDTLS_DEPRECATED void mbedtls_ripemd160_update(
+                                                mbedtls_ripemd160_context *ctx,
+                                                const unsigned char *input,
+                                                size_t ilen );
+
+/**
+ * \brief          RIPEMD-160 final digest
+ *
+ * \deprecated     Superseded by mbedtls_ripemd160_finish_ret() in 2.7.0
+ *
+ * \param ctx      RIPEMD-160 context
+ * \param output   RIPEMD-160 checksum result
+ */
+MBEDTLS_DEPRECATED void mbedtls_ripemd160_finish(
+                                                mbedtls_ripemd160_context *ctx,
+                                                unsigned char output[20] );
+
+/**
+ * \brief          RIPEMD-160 process data block (internal use only)
+ *
+ * \deprecated     Superseded by mbedtls_internal_ripemd160_process() in 2.7.0
+ *
+ * \param ctx      RIPEMD-160 context
+ * \param data     buffer holding one block of data
+ */
+MBEDTLS_DEPRECATED void mbedtls_ripemd160_process(
+                                            mbedtls_ripemd160_context *ctx,
+                                            const unsigned char data[64] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief          Output = RIPEMD-160( input buffer )
+ *
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ * \param output   RIPEMD-160 checksum result
+ *
+ * \return         0 if successful
+ */
+int mbedtls_ripemd160_ret( const unsigned char *input,
+                           size_t ilen,
+                           unsigned char output[20] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          Output = RIPEMD-160( input buffer )
+ *
+ * \deprecated     Superseded by mbedtls_ripemd160_ret() in 2.7.0
+ *
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ * \param output   RIPEMD-160 checksum result
+ */
+MBEDTLS_DEPRECATED void mbedtls_ripemd160( const unsigned char *input,
+                                           size_t ilen,
+                                           unsigned char output[20] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ */
+int mbedtls_ripemd160_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_ripemd160.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/rsa.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/rsa.h
new file mode 100644
index 00000000000..3c481e12a17
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/rsa.h
@@ -0,0 +1,1351 @@
+/**
+ * \file rsa.h
+ *
+ * \brief This file provides an API for the RSA public-key cryptosystem.
+ *
+ * The RSA public-key cryptosystem is defined in <em>Public-Key
+ * Cryptography Standards (PKCS) #1 v1.5: RSA Encryption</em>
+ * and <em>Public-Key Cryptography Standards (PKCS) #1 v2.1:
+ * RSA Cryptography Specifications</em>.
+ *
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_RSA_H
+#define MBEDTLS_RSA_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/bignum.h"
+#include "mbedtls/md.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "mbedtls/threading.h"
+#endif
+
+/*
+ * RSA Error codes
+ */
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_RSA_BAD_INPUT_DATA                    -0x4080
+/** Input data contains invalid padding and is rejected. */
+#define MBEDTLS_ERR_RSA_INVALID_PADDING                   -0x4100
+/** Something failed during generation of a key. */
+#define MBEDTLS_ERR_RSA_KEY_GEN_FAILED                    -0x4180
+/** Key failed to pass the validity check of the library. */
+#define MBEDTLS_ERR_RSA_KEY_CHECK_FAILED                  -0x4200
+/** The public key operation failed. */
+#define MBEDTLS_ERR_RSA_PUBLIC_FAILED                     -0x4280
+/** The private key operation failed. */
+#define MBEDTLS_ERR_RSA_PRIVATE_FAILED                    -0x4300
+/** The PKCS#1 verification failed. */
+#define MBEDTLS_ERR_RSA_VERIFY_FAILED                     -0x4380
+/** The output buffer for decryption is not large enough. */
+#define MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE                  -0x4400
+/** The random generator failed to generate non-zeros. */
+#define MBEDTLS_ERR_RSA_RNG_FAILED                        -0x4480
+
+/* MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION is deprecated and should not be used.
+ */
+/** The implementation does not offer the requested operation, for example, because of security violations or lack of functionality. */
+#define MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION             -0x4500
+
+/* MBEDTLS_ERR_RSA_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** RSA hardware accelerator failed. */
+#define MBEDTLS_ERR_RSA_HW_ACCEL_FAILED                   -0x4580
+
+/*
+ * RSA constants
+ */
+#define MBEDTLS_RSA_PUBLIC      0 /**< Request private key operation. */
+#define MBEDTLS_RSA_PRIVATE     1 /**< Request public key operation. */
+
+#define MBEDTLS_RSA_PKCS_V15    0 /**< Use PKCS#1 v1.5 encoding. */
+#define MBEDTLS_RSA_PKCS_V21    1 /**< Use PKCS#1 v2.1 encoding. */
+
+#define MBEDTLS_RSA_SIGN        1 /**< Identifier for RSA signature operations. */
+#define MBEDTLS_RSA_CRYPT       2 /**< Identifier for RSA encryption and decryption operations. */
+
+#define MBEDTLS_RSA_SALT_LEN_ANY    -1
+
+/*
+ * The above constants may be used even if the RSA module is compile out,
+ * eg for alternative (PKCS#11) RSA implemenations in the PK layers.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_RSA_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief   The RSA context structure.
+ *
+ * \note    Direct manipulation of the members of this structure
+ *          is deprecated. All manipulation should instead be done through
+ *          the public interface functions.
+ */
+typedef struct mbedtls_rsa_context
+{
+    int ver;                    /*!<  Reserved for internal purposes.
+                                 *    Do not set this field in application
+                                 *    code. Its meaning might change without
+                                 *    notice. */
+    size_t len;                 /*!<  The size of \p N in Bytes. */
+
+    mbedtls_mpi N;              /*!<  The public modulus. */
+    mbedtls_mpi E;              /*!<  The public exponent. */
+
+    mbedtls_mpi D;              /*!<  The private exponent. */
+    mbedtls_mpi P;              /*!<  The first prime factor. */
+    mbedtls_mpi Q;              /*!<  The second prime factor. */
+
+    mbedtls_mpi DP;             /*!<  <code>D % (P - 1)</code>. */
+    mbedtls_mpi DQ;             /*!<  <code>D % (Q - 1)</code>. */
+    mbedtls_mpi QP;             /*!<  <code>1 / (Q % P)</code>. */
+
+    mbedtls_mpi RN;             /*!<  cached <code>R^2 mod N</code>. */
+
+    mbedtls_mpi RP;             /*!<  cached <code>R^2 mod P</code>. */
+    mbedtls_mpi RQ;             /*!<  cached <code>R^2 mod Q</code>. */
+
+    mbedtls_mpi Vi;             /*!<  The cached blinding value. */
+    mbedtls_mpi Vf;             /*!<  The cached un-blinding value. */
+
+    int padding;                /*!< Selects padding mode:
+                                     #MBEDTLS_RSA_PKCS_V15 for 1.5 padding and
+                                     #MBEDTLS_RSA_PKCS_V21 for OAEP or PSS. */
+    int hash_id;                /*!< Hash identifier of mbedtls_md_type_t type,
+                                     as specified in md.h for use in the MGF
+                                     mask generating function used in the
+                                     EME-OAEP and EMSA-PSS encodings. */
+#if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized iff ver != 0. */
+    mbedtls_threading_mutex_t mutex;    /*!<  Thread-safety mutex. */
+#endif
+}
+mbedtls_rsa_context;
+
+#else  /* MBEDTLS_RSA_ALT */
+#include "rsa_alt.h"
+#endif /* MBEDTLS_RSA_ALT */
+
+/**
+ * \brief          This function initializes an RSA context.
+ *
+ * \note           Set padding to #MBEDTLS_RSA_PKCS_V21 for the RSAES-OAEP
+ *                 encryption scheme and the RSASSA-PSS signature scheme.
+ *
+ * \note           The \p hash_id parameter is ignored when using
+ *                 #MBEDTLS_RSA_PKCS_V15 padding.
+ *
+ * \note           The choice of padding mode is strictly enforced for private key
+ *                 operations, since there might be security concerns in
+ *                 mixing padding modes. For public key operations it is
+ *                 a default value, which can be overridden by calling specific
+ *                 \c rsa_rsaes_xxx or \c rsa_rsassa_xxx functions.
+ *
+ * \note           The hash selected in \p hash_id is always used for OEAP
+ *                 encryption. For PSS signatures, it is always used for
+ *                 making signatures, but can be overridden for verifying them.
+ *                 If set to #MBEDTLS_MD_NONE, it is always overridden.
+ *
+ * \param ctx      The RSA context to initialize. This must not be \c NULL.
+ * \param padding  The padding mode to use. This must be either
+ *                 #MBEDTLS_RSA_PKCS_V15 or #MBEDTLS_RSA_PKCS_V21.
+ * \param hash_id  The hash identifier of ::mbedtls_md_type_t type, if
+ *                 \p padding is #MBEDTLS_RSA_PKCS_V21. It is unused
+ *                 otherwise.
+ */
+void mbedtls_rsa_init( mbedtls_rsa_context *ctx,
+                       int padding,
+                       int hash_id );
+
+/**
+ * \brief          This function imports a set of core parameters into an
+ *                 RSA context.
+ *
+ * \note           This function can be called multiple times for successive
+ *                 imports, if the parameters are not simultaneously present.
+ *
+ *                 Any sequence of calls to this function should be followed
+ *                 by a call to mbedtls_rsa_complete(), which checks and
+ *                 completes the provided information to a ready-for-use
+ *                 public or private RSA key.
+ *
+ * \note           See mbedtls_rsa_complete() for more information on which
+ *                 parameters are necessary to set up a private or public
+ *                 RSA key.
+ *
+ * \note           The imported parameters are copied and need not be preserved
+ *                 for the lifetime of the RSA context being set up.
+ *
+ * \param ctx      The initialized RSA context to store the parameters in.
+ * \param N        The RSA modulus. This may be \c NULL.
+ * \param P        The first prime factor of \p N. This may be \c NULL.
+ * \param Q        The second prime factor of \p N. This may be \c NULL.
+ * \param D        The private exponent. This may be \c NULL.
+ * \param E        The public exponent. This may be \c NULL.
+ *
+ * \return         \c 0 on success.
+ * \return         A non-zero error code on failure.
+ */
+int mbedtls_rsa_import( mbedtls_rsa_context *ctx,
+                        const mbedtls_mpi *N,
+                        const mbedtls_mpi *P, const mbedtls_mpi *Q,
+                        const mbedtls_mpi *D, const mbedtls_mpi *E );
+
+/**
+ * \brief          This function imports core RSA parameters, in raw big-endian
+ *                 binary format, into an RSA context.
+ *
+ * \note           This function can be called multiple times for successive
+ *                 imports, if the parameters are not simultaneously present.
+ *
+ *                 Any sequence of calls to this function should be followed
+ *                 by a call to mbedtls_rsa_complete(), which checks and
+ *                 completes the provided information to a ready-for-use
+ *                 public or private RSA key.
+ *
+ * \note           See mbedtls_rsa_complete() for more information on which
+ *                 parameters are necessary to set up a private or public
+ *                 RSA key.
+ *
+ * \note           The imported parameters are copied and need not be preserved
+ *                 for the lifetime of the RSA context being set up.
+ *
+ * \param ctx      The initialized RSA context to store the parameters in.
+ * \param N        The RSA modulus. This may be \c NULL.
+ * \param N_len    The Byte length of \p N; it is ignored if \p N == NULL.
+ * \param P        The first prime factor of \p N. This may be \c NULL.
+ * \param P_len    The Byte length of \p P; it ns ignored if \p P == NULL.
+ * \param Q        The second prime factor of \p N. This may be \c NULL.
+ * \param Q_len    The Byte length of \p Q; it is ignored if \p Q == NULL.
+ * \param D        The private exponent. This may be \c NULL.
+ * \param D_len    The Byte length of \p D; it is ignored if \p D == NULL.
+ * \param E        The public exponent. This may be \c NULL.
+ * \param E_len    The Byte length of \p E; it is ignored if \p E == NULL.
+ *
+ * \return         \c 0 on success.
+ * \return         A non-zero error code on failure.
+ */
+int mbedtls_rsa_import_raw( mbedtls_rsa_context *ctx,
+                            unsigned char const *N, size_t N_len,
+                            unsigned char const *P, size_t P_len,
+                            unsigned char const *Q, size_t Q_len,
+                            unsigned char const *D, size_t D_len,
+                            unsigned char const *E, size_t E_len );
+
+/**
+ * \brief          This function completes an RSA context from
+ *                 a set of imported core parameters.
+ *
+ *                 To setup an RSA public key, precisely \p N and \p E
+ *                 must have been imported.
+ *
+ *                 To setup an RSA private key, sufficient information must
+ *                 be present for the other parameters to be derivable.
+ *
+ *                 The default implementation supports the following:
+ *                 <ul><li>Derive \p P, \p Q from \p N, \p D, \p E.</li>
+ *                 <li>Derive \p N, \p D from \p P, \p Q, \p E.</li></ul>
+ *                 Alternative implementations need not support these.
+ *
+ *                 If this function runs successfully, it guarantees that
+ *                 the RSA context can be used for RSA operations without
+ *                 the risk of failure or crash.
+ *
+ * \warning        This function need not perform consistency checks
+ *                 for the imported parameters. In particular, parameters that
+ *                 are not needed by the implementation might be silently
+ *                 discarded and left unchecked. To check the consistency
+ *                 of the key material, see mbedtls_rsa_check_privkey().
+ *
+ * \param ctx      The initialized RSA context holding imported parameters.
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_RSA_BAD_INPUT_DATA if the attempted derivations
+ *                 failed.
+ *
+ */
+int mbedtls_rsa_complete( mbedtls_rsa_context *ctx );
+
+/**
+ * \brief          This function exports the core parameters of an RSA key.
+ *
+ *                 If this function runs successfully, the non-NULL buffers
+ *                 pointed to by \p N, \p P, \p Q, \p D, and \p E are fully
+ *                 written, with additional unused space filled leading by
+ *                 zero Bytes.
+ *
+ *                 Possible reasons for returning
+ *                 #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED:<ul>
+ *                 <li>An alternative RSA implementation is in use, which
+ *                 stores the key externally, and either cannot or should
+ *                 not export it into RAM.</li>
+ *                 <li>A SW or HW implementation might not support a certain
+ *                 deduction. For example, \p P, \p Q from \p N, \p D,
+ *                 and \p E if the former are not part of the
+ *                 implementation.</li></ul>
+ *
+ *                 If the function fails due to an unsupported operation,
+ *                 the RSA context stays intact and remains usable.
+ *
+ * \param ctx      The initialized RSA context.
+ * \param N        The MPI to hold the RSA modulus.
+ *                 This may be \c NULL if this field need not be exported.
+ * \param P        The MPI to hold the first prime factor of \p N.
+ *                 This may be \c NULL if this field need not be exported.
+ * \param Q        The MPI to hold the second prime factor of \p N.
+ *                 This may be \c NULL if this field need not be exported.
+ * \param D        The MPI to hold the private exponent.
+ *                 This may be \c NULL if this field need not be exported.
+ * \param E        The MPI to hold the public exponent.
+ *                 This may be \c NULL if this field need not be exported.
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED if exporting the
+ *                 requested parameters cannot be done due to missing
+ *                 functionality or because of security policies.
+ * \return         A non-zero return code on any other failure.
+ *
+ */
+int mbedtls_rsa_export( const mbedtls_rsa_context *ctx,
+                        mbedtls_mpi *N, mbedtls_mpi *P, mbedtls_mpi *Q,
+                        mbedtls_mpi *D, mbedtls_mpi *E );
+
+/**
+ * \brief          This function exports core parameters of an RSA key
+ *                 in raw big-endian binary format.
+ *
+ *                 If this function runs successfully, the non-NULL buffers
+ *                 pointed to by \p N, \p P, \p Q, \p D, and \p E are fully
+ *                 written, with additional unused space filled leading by
+ *                 zero Bytes.
+ *
+ *                 Possible reasons for returning
+ *                 #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED:<ul>
+ *                 <li>An alternative RSA implementation is in use, which
+ *                 stores the key externally, and either cannot or should
+ *                 not export it into RAM.</li>
+ *                 <li>A SW or HW implementation might not support a certain
+ *                 deduction. For example, \p P, \p Q from \p N, \p D,
+ *                 and \p E if the former are not part of the
+ *                 implementation.</li></ul>
+ *                 If the function fails due to an unsupported operation,
+ *                 the RSA context stays intact and remains usable.
+ *
+ * \note           The length parameters are ignored if the corresponding
+ *                 buffer pointers are NULL.
+ *
+ * \param ctx      The initialized RSA context.
+ * \param N        The Byte array to store the RSA modulus,
+ *                 or \c NULL if this field need not be exported.
+ * \param N_len    The size of the buffer for the modulus.
+ * \param P        The Byte array to hold the first prime factor of \p N,
+ *                 or \c NULL if this field need not be exported.
+ * \param P_len    The size of the buffer for the first prime factor.
+ * \param Q        The Byte array to hold the second prime factor of \p N,
+ *                 or \c NULL if this field need not be exported.
+ * \param Q_len    The size of the buffer for the second prime factor.
+ * \param D        The Byte array to hold the private exponent,
+ *                 or \c NULL if this field need not be exported.
+ * \param D_len    The size of the buffer for the private exponent.
+ * \param E        The Byte array to hold the public exponent,
+ *                 or \c NULL if this field need not be exported.
+ * \param E_len    The size of the buffer for the public exponent.
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED if exporting the
+ *                 requested parameters cannot be done due to missing
+ *                 functionality or because of security policies.
+ * \return         A non-zero return code on any other failure.
+ */
+int mbedtls_rsa_export_raw( const mbedtls_rsa_context *ctx,
+                            unsigned char *N, size_t N_len,
+                            unsigned char *P, size_t P_len,
+                            unsigned char *Q, size_t Q_len,
+                            unsigned char *D, size_t D_len,
+                            unsigned char *E, size_t E_len );
+
+/**
+ * \brief          This function exports CRT parameters of a private RSA key.
+ *
+ * \note           Alternative RSA implementations not using CRT-parameters
+ *                 internally can implement this function based on
+ *                 mbedtls_rsa_deduce_opt().
+ *
+ * \param ctx      The initialized RSA context.
+ * \param DP       The MPI to hold \c D modulo `P-1`,
+ *                 or \c NULL if it need not be exported.
+ * \param DQ       The MPI to hold \c D modulo `Q-1`,
+ *                 or \c NULL if it need not be exported.
+ * \param QP       The MPI to hold modular inverse of \c Q modulo \c P,
+ *                 or \c NULL if it need not be exported.
+ *
+ * \return         \c 0 on success.
+ * \return         A non-zero error code on failure.
+ *
+ */
+int mbedtls_rsa_export_crt( const mbedtls_rsa_context *ctx,
+                            mbedtls_mpi *DP, mbedtls_mpi *DQ, mbedtls_mpi *QP );
+
+/**
+ * \brief          This function sets padding for an already initialized RSA
+ *                 context. See mbedtls_rsa_init() for details.
+ *
+ * \param ctx      The initialized RSA context to be configured.
+ * \param padding  The padding mode to use. This must be either
+ *                 #MBEDTLS_RSA_PKCS_V15 or #MBEDTLS_RSA_PKCS_V21.
+ * \param hash_id  The #MBEDTLS_RSA_PKCS_V21 hash identifier.
+ */
+void mbedtls_rsa_set_padding( mbedtls_rsa_context *ctx, int padding,
+                              int hash_id );
+
+/**
+ * \brief          This function retrieves the length of RSA modulus in Bytes.
+ *
+ * \param ctx      The initialized RSA context.
+ *
+ * \return         The length of the RSA modulus in Bytes.
+ *
+ */
+size_t mbedtls_rsa_get_len( const mbedtls_rsa_context *ctx );
+
+/**
+ * \brief          This function generates an RSA keypair.
+ *
+ * \note           mbedtls_rsa_init() must be called before this function,
+ *                 to set up the RSA context.
+ *
+ * \param ctx      The initialized RSA context used to hold the key.
+ * \param f_rng    The RNG function to be used for key generation.
+ *                 This must not be \c NULL.
+ * \param p_rng    The RNG context to be passed to \p f_rng.
+ *                 This may be \c NULL if \p f_rng doesn't need a context.
+ * \param nbits    The size of the public key in bits.
+ * \param exponent The public exponent to use. For example, \c 65537.
+ *                 This must be odd and greater than \c 1.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_gen_key( mbedtls_rsa_context *ctx,
+                         int (*f_rng)(void *, unsigned char *, size_t),
+                         void *p_rng,
+                         unsigned int nbits, int exponent );
+
+/**
+ * \brief          This function checks if a context contains at least an RSA
+ *                 public key.
+ *
+ *                 If the function runs successfully, it is guaranteed that
+ *                 enough information is present to perform an RSA public key
+ *                 operation using mbedtls_rsa_public().
+ *
+ * \param ctx      The initialized RSA context to check.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ *
+ */
+int mbedtls_rsa_check_pubkey( const mbedtls_rsa_context *ctx );
+
+/**
+ * \brief      This function checks if a context contains an RSA private key
+ *             and perform basic consistency checks.
+ *
+ * \note       The consistency checks performed by this function not only
+ *             ensure that mbedtls_rsa_private() can be called successfully
+ *             on the given context, but that the various parameters are
+ *             mutually consistent with high probability, in the sense that
+ *             mbedtls_rsa_public() and mbedtls_rsa_private() are inverses.
+ *
+ * \warning    This function should catch accidental misconfigurations
+ *             like swapping of parameters, but it cannot establish full
+ *             trust in neither the quality nor the consistency of the key
+ *             material that was used to setup the given RSA context:
+ *             <ul><li>Consistency: Imported parameters that are irrelevant
+ *             for the implementation might be silently dropped. If dropped,
+ *             the current function does not have access to them,
+ *             and therefore cannot check them. See mbedtls_rsa_complete().
+ *             If you want to check the consistency of the entire
+ *             content of an PKCS1-encoded RSA private key, for example, you
+ *             should use mbedtls_rsa_validate_params() before setting
+ *             up the RSA context.
+ *             Additionally, if the implementation performs empirical checks,
+ *             these checks substantiate but do not guarantee consistency.</li>
+ *             <li>Quality: This function is not expected to perform
+ *             extended quality assessments like checking that the prime
+ *             factors are safe. Additionally, it is the responsibility of the
+ *             user to ensure the trustworthiness of the source of his RSA
+ *             parameters, which goes beyond what is effectively checkable
+ *             by the library.</li></ul>
+ *
+ * \param ctx  The initialized RSA context to check.
+ *
+ * \return     \c 0 on success.
+ * \return     An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_check_privkey( const mbedtls_rsa_context *ctx );
+
+/**
+ * \brief          This function checks a public-private RSA key pair.
+ *
+ *                 It checks each of the contexts, and makes sure they match.
+ *
+ * \param pub      The initialized RSA context holding the public key.
+ * \param prv      The initialized RSA context holding the private key.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_check_pub_priv( const mbedtls_rsa_context *pub,
+                                const mbedtls_rsa_context *prv );
+
+/**
+ * \brief          This function performs an RSA public key operation.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param input    The input buffer. This must be a readable buffer
+ *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ * \param output   The output buffer. This must be a writable buffer
+ *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ *
+ * \note           This function does not handle message padding.
+ *
+ * \note           Make sure to set \p input[0] = 0 or ensure that
+ *                 input is smaller than \p N.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_public( mbedtls_rsa_context *ctx,
+                const unsigned char *input,
+                unsigned char *output );
+
+/**
+ * \brief          This function performs an RSA private key operation.
+ *
+ * \note           Blinding is used if and only if a PRNG is provided.
+ *
+ * \note           If blinding is used, both the base of exponentation
+ *                 and the exponent are blinded, providing protection
+ *                 against some side-channel attacks.
+ *
+ * \warning        It is deprecated and a security risk to not provide
+ *                 a PRNG here and thereby prevent the use of blinding.
+ *                 Future versions of the library may enforce the presence
+ *                 of a PRNG.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG function, used for blinding. It is discouraged
+ *                 and deprecated to pass \c NULL here, in which case
+ *                 blinding will be omitted.
+ * \param p_rng    The RNG context to pass to \p f_rng. This may be \c NULL
+ *                 if \p f_rng is \c NULL or if \p f_rng doesn't need a context.
+ * \param input    The input buffer. This must be a readable buffer
+ *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ * \param output   The output buffer. This must be a writable buffer
+ *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ *
+ */
+int mbedtls_rsa_private( mbedtls_rsa_context *ctx,
+                 int (*f_rng)(void *, unsigned char *, size_t),
+                 void *p_rng,
+                 const unsigned char *input,
+                 unsigned char *output );
+
+/**
+ * \brief          This function adds the message padding, then performs an RSA
+ *                 operation.
+ *
+ *                 It is the generic wrapper for performing a PKCS#1 encryption
+ *                 operation using the \p mode from the context.
+ *
+ * \deprecated     It is deprecated and discouraged to call this function
+ *                 in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ *                 are likely to remove the \p mode argument and have it
+ *                 implicitly set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note           Alternative implementations of RSA need not support
+ *                 mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ *                 return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG to use. It is mandatory for PKCS#1 v2.1 padding
+ *                 encoding, and for PKCS#1 v1.5 padding encoding when used
+ *                 with \p mode set to #MBEDTLS_RSA_PUBLIC. For PKCS#1 v1.5
+ *                 padding encoding and \p mode set to #MBEDTLS_RSA_PRIVATE,
+ *                 it is used for blinding and should be provided in this
+ *                 case; see mbedtls_rsa_private() for more.
+ * \param p_rng    The RNG context to be passed to \p f_rng. May be
+ *                 \c NULL if \p f_rng is \c NULL or if \p f_rng doesn't
+ *                 need a context argument.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param ilen     The length of the plaintext in Bytes.
+ * \param input    The input data to encrypt. This must be a readable
+ *                 buffer of size \p ilen Bytes. It may be \c NULL if
+ *                 `ilen == 0`.
+ * \param output   The output buffer. This must be a writable buffer
+ *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_pkcs1_encrypt( mbedtls_rsa_context *ctx,
+                       int (*f_rng)(void *, unsigned char *, size_t),
+                       void *p_rng,
+                       int mode, size_t ilen,
+                       const unsigned char *input,
+                       unsigned char *output );
+
+/**
+ * \brief          This function performs a PKCS#1 v1.5 encryption operation
+ *                 (RSAES-PKCS1-v1_5-ENCRYPT).
+ *
+ * \deprecated     It is deprecated and discouraged to call this function
+ *                 in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ *                 are likely to remove the \p mode argument and have it
+ *                 implicitly set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note           Alternative implementations of RSA need not support
+ *                 mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ *                 return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG function to use. It is needed for padding generation
+ *                 if \p mode is #MBEDTLS_RSA_PUBLIC. If \p mode is
+ *                 #MBEDTLS_RSA_PRIVATE (discouraged), it is used for
+ *                 blinding and should be provided; see mbedtls_rsa_private().
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may
+ *                 be \c NULL if \p f_rng is \c NULL or if \p f_rng
+ *                 doesn't need a context argument.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param ilen     The length of the plaintext in Bytes.
+ * \param input    The input data to encrypt. This must be a readable
+ *                 buffer of size \p ilen Bytes. It may be \c NULL if
+ *                 `ilen == 0`.
+ * \param output   The output buffer. This must be a writable buffer
+ *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsaes_pkcs1_v15_encrypt( mbedtls_rsa_context *ctx,
+                                 int (*f_rng)(void *, unsigned char *, size_t),
+                                 void *p_rng,
+                                 int mode, size_t ilen,
+                                 const unsigned char *input,
+                                 unsigned char *output );
+
+/**
+ * \brief            This function performs a PKCS#1 v2.1 OAEP encryption
+ *                   operation (RSAES-OAEP-ENCRYPT).
+ *
+ * \note             The output buffer must be as large as the size
+ *                   of ctx->N. For example, 128 Bytes if RSA-1024 is used.
+ *
+ * \deprecated       It is deprecated and discouraged to call this function
+ *                   in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ *                   are likely to remove the \p mode argument and have it
+ *                   implicitly set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note             Alternative implementations of RSA need not support
+ *                   mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ *                   return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx        The initnialized RSA context to use.
+ * \param f_rng      The RNG function to use. This is needed for padding
+ *                   generation and must be provided.
+ * \param p_rng      The RNG context to be passed to \p f_rng. This may
+ *                   be \c NULL if \p f_rng doesn't need a context argument.
+ * \param mode       The mode of operation. This must be either
+ *                   #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param label      The buffer holding the custom label to use.
+ *                   This must be a readable buffer of length \p label_len
+ *                   Bytes. It may be \c NULL if \p label_len is \c 0.
+ * \param label_len  The length of the label in Bytes.
+ * \param ilen       The length of the plaintext buffer \p input in Bytes.
+ * \param input      The input data to encrypt. This must be a readable
+ *                   buffer of size \p ilen Bytes. It may be \c NULL if
+ *                   `ilen == 0`.
+ * \param output     The output buffer. This must be a writable buffer
+ *                   of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                   for an 2048-bit RSA modulus.
+ *
+ * \return           \c 0 on success.
+ * \return           An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsaes_oaep_encrypt( mbedtls_rsa_context *ctx,
+                            int (*f_rng)(void *, unsigned char *, size_t),
+                            void *p_rng,
+                            int mode,
+                            const unsigned char *label, size_t label_len,
+                            size_t ilen,
+                            const unsigned char *input,
+                            unsigned char *output );
+
+/**
+ * \brief          This function performs an RSA operation, then removes the
+ *                 message padding.
+ *
+ *                 It is the generic wrapper for performing a PKCS#1 decryption
+ *                 operation using the \p mode from the context.
+ *
+ * \note           The output buffer length \c output_max_len should be
+ *                 as large as the size \p ctx->len of \p ctx->N (for example,
+ *                 128 Bytes if RSA-1024 is used) to be able to hold an
+ *                 arbitrary decrypted message. If it is not large enough to
+ *                 hold the decryption of the particular ciphertext provided,
+ *                 the function returns \c MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE.
+ *
+ * \deprecated     It is deprecated and discouraged to call this function
+ *                 in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ *                 are likely to remove the \p mode argument and have it
+ *                 implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note           Alternative implementations of RSA need not support
+ *                 mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ *                 return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG function. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ *                 this is used for blinding and should be provided; see
+ *                 mbedtls_rsa_private() for more. If \p mode is
+ *                 #MBEDTLS_RSA_PUBLIC, it is ignored.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be
+ *                 \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param olen     The address at which to store the length of
+ *                 the plaintext. This must not be \c NULL.
+ * \param input    The ciphertext buffer. This must be a readable buffer
+ *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ * \param output   The buffer used to hold the plaintext. This must
+ *                 be a writable buffer of length \p output_max_len Bytes.
+ * \param output_max_len The length in Bytes of the output buffer \p output.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_pkcs1_decrypt( mbedtls_rsa_context *ctx,
+                       int (*f_rng)(void *, unsigned char *, size_t),
+                       void *p_rng,
+                       int mode, size_t *olen,
+                       const unsigned char *input,
+                       unsigned char *output,
+                       size_t output_max_len );
+
+/**
+ * \brief          This function performs a PKCS#1 v1.5 decryption
+ *                 operation (RSAES-PKCS1-v1_5-DECRYPT).
+ *
+ * \note           The output buffer length \c output_max_len should be
+ *                 as large as the size \p ctx->len of \p ctx->N, for example,
+ *                 128 Bytes if RSA-1024 is used, to be able to hold an
+ *                 arbitrary decrypted message. If it is not large enough to
+ *                 hold the decryption of the particular ciphertext provided,
+ *                 the function returns #MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE.
+ *
+ * \deprecated     It is deprecated and discouraged to call this function
+ *                 in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ *                 are likely to remove the \p mode argument and have it
+ *                 implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note           Alternative implementations of RSA need not support
+ *                 mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ *                 return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG function. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ *                 this is used for blinding and should be provided; see
+ *                 mbedtls_rsa_private() for more. If \p mode is
+ *                 #MBEDTLS_RSA_PUBLIC, it is ignored.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be
+ *                 \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param olen     The address at which to store the length of
+ *                 the plaintext. This must not be \c NULL.
+ * \param input    The ciphertext buffer. This must be a readable buffer
+ *                 of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ * \param output   The buffer used to hold the plaintext. This must
+ *                 be a writable buffer of length \p output_max_len Bytes.
+ * \param output_max_len The length in Bytes of the output buffer \p output.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ *
+ */
+int mbedtls_rsa_rsaes_pkcs1_v15_decrypt( mbedtls_rsa_context *ctx,
+                                 int (*f_rng)(void *, unsigned char *, size_t),
+                                 void *p_rng,
+                                 int mode, size_t *olen,
+                                 const unsigned char *input,
+                                 unsigned char *output,
+                                 size_t output_max_len );
+
+/**
+ * \brief            This function performs a PKCS#1 v2.1 OAEP decryption
+ *                   operation (RSAES-OAEP-DECRYPT).
+ *
+ * \note             The output buffer length \c output_max_len should be
+ *                   as large as the size \p ctx->len of \p ctx->N, for
+ *                   example, 128 Bytes if RSA-1024 is used, to be able to
+ *                   hold an arbitrary decrypted message. If it is not
+ *                   large enough to hold the decryption of the particular
+ *                   ciphertext provided, the function returns
+ *                   #MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE.
+ *
+ * \deprecated       It is deprecated and discouraged to call this function
+ *                   in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ *                   are likely to remove the \p mode argument and have it
+ *                   implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note             Alternative implementations of RSA need not support
+ *                   mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ *                   return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx        The initialized RSA context to use.
+ * \param f_rng      The RNG function. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ *                   this is used for blinding and should be provided; see
+ *                   mbedtls_rsa_private() for more. If \p mode is
+ *                   #MBEDTLS_RSA_PUBLIC, it is ignored.
+ * \param p_rng      The RNG context to be passed to \p f_rng. This may be
+ *                   \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode       The mode of operation. This must be either
+ *                   #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param label      The buffer holding the custom label to use.
+ *                   This must be a readable buffer of length \p label_len
+ *                   Bytes. It may be \c NULL if \p label_len is \c 0.
+ * \param label_len  The length of the label in Bytes.
+ * \param olen       The address at which to store the length of
+ *                   the plaintext. This must not be \c NULL.
+ * \param input      The ciphertext buffer. This must be a readable buffer
+ *                   of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                   for an 2048-bit RSA modulus.
+ * \param output     The buffer used to hold the plaintext. This must
+ *                   be a writable buffer of length \p output_max_len Bytes.
+ * \param output_max_len The length in Bytes of the output buffer \p output.
+ *
+ * \return         \c 0 on success.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsaes_oaep_decrypt( mbedtls_rsa_context *ctx,
+                            int (*f_rng)(void *, unsigned char *, size_t),
+                            void *p_rng,
+                            int mode,
+                            const unsigned char *label, size_t label_len,
+                            size_t *olen,
+                            const unsigned char *input,
+                            unsigned char *output,
+                            size_t output_max_len );
+
+/**
+ * \brief          This function performs a private RSA operation to sign
+ *                 a message digest using PKCS#1.
+ *
+ *                 It is the generic wrapper for performing a PKCS#1
+ *                 signature using the \p mode from the context.
+ *
+ * \note           The \p sig buffer must be as large as the size
+ *                 of \p ctx->N. For example, 128 Bytes if RSA-1024 is used.
+ *
+ * \note           For PKCS#1 v2.1 encoding, see comments on
+ *                 mbedtls_rsa_rsassa_pss_sign() for details on
+ *                 \p md_alg and \p hash_id.
+ *
+ * \deprecated     It is deprecated and discouraged to call this function
+ *                 in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ *                 are likely to remove the \p mode argument and have it
+ *                 implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note           Alternative implementations of RSA need not support
+ *                 mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ *                 return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG function to use. If the padding mode is PKCS#1 v2.1,
+ *                 this must be provided. If the padding mode is PKCS#1 v1.5 and
+ *                 \p mode is #MBEDTLS_RSA_PRIVATE, it is used for blinding
+ *                 and should be provided; see mbedtls_rsa_private() for more
+ *                 more. It is ignored otherwise.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be \c NULL
+ *                 if \p f_rng is \c NULL or doesn't need a context argument.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param md_alg   The message-digest algorithm used to hash the original data.
+ *                 Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen  The length of the message digest.
+ *                 Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash     The buffer holding the message digest or raw data.
+ *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ *                 buffer of length \p hashlen Bytes. If \p md_alg is not
+ *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ *                 the size of the hash corresponding to \p md_alg.
+ * \param sig      The buffer to hold the signature. This must be a writable
+ *                 buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus. A buffer length of
+ *                 #MBEDTLS_MPI_MAX_SIZE is always safe.
+ *
+ * \return         \c 0 if the signing operation was successful.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_pkcs1_sign( mbedtls_rsa_context *ctx,
+                    int (*f_rng)(void *, unsigned char *, size_t),
+                    void *p_rng,
+                    int mode,
+                    mbedtls_md_type_t md_alg,
+                    unsigned int hashlen,
+                    const unsigned char *hash,
+                    unsigned char *sig );
+
+/**
+ * \brief          This function performs a PKCS#1 v1.5 signature
+ *                 operation (RSASSA-PKCS1-v1_5-SIGN).
+ *
+ * \deprecated     It is deprecated and discouraged to call this function
+ *                 in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ *                 are likely to remove the \p mode argument and have it
+ *                 implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note           Alternative implementations of RSA need not support
+ *                 mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ *                 return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG function. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ *                 this is used for blinding and should be provided; see
+ *                 mbedtls_rsa_private() for more. If \p mode is
+ *                 #MBEDTLS_RSA_PUBLIC, it is ignored.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be \c NULL
+ *                 if \p f_rng is \c NULL or doesn't need a context argument.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param md_alg   The message-digest algorithm used to hash the original data.
+ *                 Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen  The length of the message digest.
+ *                 Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash     The buffer holding the message digest or raw data.
+ *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ *                 buffer of length \p hashlen Bytes. If \p md_alg is not
+ *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ *                 the size of the hash corresponding to \p md_alg.
+ * \param sig      The buffer to hold the signature. This must be a writable
+ *                 buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus. A buffer length of
+ *                 #MBEDTLS_MPI_MAX_SIZE is always safe.
+ *
+ * \return         \c 0 if the signing operation was successful.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx,
+                               int (*f_rng)(void *, unsigned char *, size_t),
+                               void *p_rng,
+                               int mode,
+                               mbedtls_md_type_t md_alg,
+                               unsigned int hashlen,
+                               const unsigned char *hash,
+                               unsigned char *sig );
+
+/**
+ * \brief          This function performs a PKCS#1 v2.1 PSS signature
+ *                 operation (RSASSA-PSS-SIGN).
+ *
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
+ *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
+ *                 Specifications</em>.
+ *
+ * \note           This function enforces that the provided salt length complies
+ *                 with FIPS 186-4 §5.5 (e) and RFC 8017 (PKCS#1 v2.2) §9.1.1
+ *                 step 3. The constraint is that the hash length plus the salt
+ *                 length plus 2 bytes must be at most the key length. If this
+ *                 constraint is not met, this function returns
+ *                 #MBEDTLS_ERR_RSA_BAD_INPUT_DATA.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG function. It must not be \c NULL.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be \c NULL
+ *                 if \p f_rng doesn't need a context argument.
+ * \param md_alg   The message-digest algorithm used to hash the original data.
+ *                 Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen  The length of the message digest.
+ *                 Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash     The buffer holding the message digest or raw data.
+ *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ *                 buffer of length \p hashlen Bytes. If \p md_alg is not
+ *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ *                 the size of the hash corresponding to \p md_alg.
+ * \param saltlen  The length of the salt that should be used.
+ *                 If passed #MBEDTLS_RSA_SALT_LEN_ANY, the function will use
+ *                 the largest possible salt length up to the hash length,
+ *                 which is the largest permitted by some standards including
+ *                 FIPS 186-4 §5.5.
+ * \param sig      The buffer to hold the signature. This must be a writable
+ *                 buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus. A buffer length of
+ *                 #MBEDTLS_MPI_MAX_SIZE is always safe.
+ *
+ * \return         \c 0 if the signing operation was successful.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pss_sign_ext( mbedtls_rsa_context *ctx,
+                         int (*f_rng)(void *, unsigned char *, size_t),
+                         void *p_rng,
+                         mbedtls_md_type_t md_alg,
+                         unsigned int hashlen,
+                         const unsigned char *hash,
+                         int saltlen,
+                         unsigned char *sig );
+
+/**
+ * \brief          This function performs a PKCS#1 v2.1 PSS signature
+ *                 operation (RSASSA-PSS-SIGN).
+ *
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
+ *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
+ *                 Specifications</em>.
+ *
+ * \note           This function always uses the maximum possible salt size,
+ *                 up to the length of the payload hash. This choice of salt
+ *                 size complies with FIPS 186-4 §5.5 (e) and RFC 8017 (PKCS#1
+ *                 v2.2) §9.1.1 step 3. Furthermore this function enforces a
+ *                 minimum salt size which is the hash size minus 2 bytes. If
+ *                 this minimum size is too large given the key size (the salt
+ *                 size, plus the hash size, plus 2 bytes must be no more than
+ *                 the key size in bytes), this function returns
+ *                 #MBEDTLS_ERR_RSA_BAD_INPUT_DATA.
+ *
+ * \deprecated     It is deprecated and discouraged to call this function
+ *                 in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ *                 are likely to remove the \p mode argument and have it
+ *                 implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note           Alternative implementations of RSA need not support
+ *                 mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ *                 return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx      The initialized RSA context to use.
+ * \param f_rng    The RNG function. It must not be \c NULL.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be \c NULL
+ *                 if \p f_rng doesn't need a context argument.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param md_alg   The message-digest algorithm used to hash the original data.
+ *                 Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen  The length of the message digest.
+ *                 This is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash     The buffer holding the message digest or raw data.
+ *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ *                 buffer of length \p hashlen Bytes. If \p md_alg is not
+ *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ *                 the size of the hash corresponding to \p md_alg.
+ * \param sig      The buffer to hold the signature. This must be a writable
+ *                 buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus. A buffer length of
+ *                 #MBEDTLS_MPI_MAX_SIZE is always safe.
+ *
+ * \return         \c 0 if the signing operation was successful.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pss_sign( mbedtls_rsa_context *ctx,
+                         int (*f_rng)(void *, unsigned char *, size_t),
+                         void *p_rng,
+                         int mode,
+                         mbedtls_md_type_t md_alg,
+                         unsigned int hashlen,
+                         const unsigned char *hash,
+                         unsigned char *sig );
+
+/**
+ * \brief          This function performs a public RSA operation and checks
+ *                 the message digest.
+ *
+ *                 This is the generic wrapper for performing a PKCS#1
+ *                 verification using the mode from the context.
+ *
+ * \note           For PKCS#1 v2.1 encoding, see comments on
+ *                 mbedtls_rsa_rsassa_pss_verify() about \p md_alg and
+ *                 \p hash_id.
+ *
+ * \deprecated     It is deprecated and discouraged to call this function
+ *                 in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ *                 are likely to remove the \p mode argument and have it
+ *                 set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note           Alternative implementations of RSA need not support
+ *                 mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ *                 return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx      The initialized RSA public key context to use.
+ * \param f_rng    The RNG function to use. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ *                 this is used for blinding and should be provided; see
+ *                 mbedtls_rsa_private() for more. Otherwise, it is ignored.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be
+ *                 \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param md_alg   The message-digest algorithm used to hash the original data.
+ *                 Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen  The length of the message digest.
+ *                 This is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash     The buffer holding the message digest or raw data.
+ *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ *                 buffer of length \p hashlen Bytes. If \p md_alg is not
+ *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ *                 the size of the hash corresponding to \p md_alg.
+ * \param sig      The buffer holding the signature. This must be a readable
+ *                 buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ *
+ * \return         \c 0 if the verify operation was successful.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_pkcs1_verify( mbedtls_rsa_context *ctx,
+                      int (*f_rng)(void *, unsigned char *, size_t),
+                      void *p_rng,
+                      int mode,
+                      mbedtls_md_type_t md_alg,
+                      unsigned int hashlen,
+                      const unsigned char *hash,
+                      const unsigned char *sig );
+
+/**
+ * \brief          This function performs a PKCS#1 v1.5 verification
+ *                 operation (RSASSA-PKCS1-v1_5-VERIFY).
+ *
+ * \deprecated     It is deprecated and discouraged to call this function
+ *                 in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ *                 are likely to remove the \p mode argument and have it
+ *                 set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note           Alternative implementations of RSA need not support
+ *                 mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ *                 return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx      The initialized RSA public key context to use.
+ * \param f_rng    The RNG function to use. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ *                 this is used for blinding and should be provided; see
+ *                 mbedtls_rsa_private() for more. Otherwise, it is ignored.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be
+ *                 \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param md_alg   The message-digest algorithm used to hash the original data.
+ *                 Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen  The length of the message digest.
+ *                 This is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash     The buffer holding the message digest or raw data.
+ *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ *                 buffer of length \p hashlen Bytes. If \p md_alg is not
+ *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ *                 the size of the hash corresponding to \p md_alg.
+ * \param sig      The buffer holding the signature. This must be a readable
+ *                 buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ *
+ * \return         \c 0 if the verify operation was successful.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pkcs1_v15_verify( mbedtls_rsa_context *ctx,
+                                 int (*f_rng)(void *, unsigned char *, size_t),
+                                 void *p_rng,
+                                 int mode,
+                                 mbedtls_md_type_t md_alg,
+                                 unsigned int hashlen,
+                                 const unsigned char *hash,
+                                 const unsigned char *sig );
+
+/**
+ * \brief          This function performs a PKCS#1 v2.1 PSS verification
+ *                 operation (RSASSA-PSS-VERIFY).
+ *
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) selects the hash used for the
+ *                 encoding operation and for the mask generation function
+ *                 (MGF1). For more details on the encoding operation and the
+ *                 mask generation function, consult <em>RFC-3447: Public-Key
+ *                 Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
+ *                 Specifications</em>. If the \c hash_id set in \p ctx is
+ *                 #MBEDTLS_MD_NONE, the \p md_alg parameter is used.
+ *
+ * \deprecated     It is deprecated and discouraged to call this function
+ *                 in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ *                 are likely to remove the \p mode argument and have it
+ *                 implicitly set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note           Alternative implementations of RSA need not support
+ *                 mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ *                 return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx      The initialized RSA public key context to use.
+ * \param f_rng    The RNG function to use. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ *                 this is used for blinding and should be provided; see
+ *                 mbedtls_rsa_private() for more. Otherwise, it is ignored.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be
+ *                 \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param md_alg   The message-digest algorithm used to hash the original data.
+ *                 Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen  The length of the message digest.
+ *                 This is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash     The buffer holding the message digest or raw data.
+ *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ *                 buffer of length \p hashlen Bytes. If \p md_alg is not
+ *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ *                 the size of the hash corresponding to \p md_alg.
+ * \param sig      The buffer holding the signature. This must be a readable
+ *                 buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ *
+ * \return         \c 0 if the verify operation was successful.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx,
+                           int (*f_rng)(void *, unsigned char *, size_t),
+                           void *p_rng,
+                           int mode,
+                           mbedtls_md_type_t md_alg,
+                           unsigned int hashlen,
+                           const unsigned char *hash,
+                           const unsigned char *sig );
+
+/**
+ * \brief          This function performs a PKCS#1 v2.1 PSS verification
+ *                 operation (RSASSA-PSS-VERIFY).
+ *
+ * \note           The \p sig buffer must be as large as the size
+ *                 of \p ctx->N. For example, 128 Bytes if RSA-1024 is used.
+ *
+ * \note           The \c hash_id set in \p ctx (when calling
+ *                 mbedtls_rsa_init() or by calling mbedtls_rsa_set_padding()
+ *                 afterwards) is ignored.
+ *
+ * \param ctx      The initialized RSA public key context to use.
+ * \param f_rng    The RNG function to use. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ *                 this is used for blinding and should be provided; see
+ *                 mbedtls_rsa_private() for more. Otherwise, it is ignored.
+ * \param p_rng    The RNG context to be passed to \p f_rng. This may be
+ *                 \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode     The mode of operation. This must be either
+ *                 #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE.
+ * \param md_alg   The message-digest algorithm used to hash the original data.
+ *                 Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen  The length of the message digest.
+ *                 This is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash     The buffer holding the message digest or raw data.
+ *                 If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ *                 buffer of length \p hashlen Bytes. If \p md_alg is not
+ *                 #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ *                 the size of the hash corresponding to \p md_alg.
+ * \param mgf1_hash_id      The message digest algorithm used for the
+ *                          verification operation and the mask generation
+ *                          function (MGF1). For more details on the encoding
+ *                          operation and the mask generation function, consult
+ *                          <em>RFC-3447: Public-Key Cryptography Standards
+ *                          (PKCS) #1 v2.1: RSA Cryptography
+ *                          Specifications</em>.
+ * \param expected_salt_len The length of the salt used in padding. Use
+ *                          #MBEDTLS_RSA_SALT_LEN_ANY to accept any salt length.
+ * \param sig      The buffer holding the signature. This must be a readable
+ *                 buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ *                 for an 2048-bit RSA modulus.
+ *
+ * \return         \c 0 if the verify operation was successful.
+ * \return         An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pss_verify_ext( mbedtls_rsa_context *ctx,
+                               int (*f_rng)(void *, unsigned char *, size_t),
+                               void *p_rng,
+                               int mode,
+                               mbedtls_md_type_t md_alg,
+                               unsigned int hashlen,
+                               const unsigned char *hash,
+                               mbedtls_md_type_t mgf1_hash_id,
+                               int expected_salt_len,
+                               const unsigned char *sig );
+
+/**
+ * \brief          This function copies the components of an RSA context.
+ *
+ * \param dst      The destination context. This must be initialized.
+ * \param src      The source context. This must be initialized.
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory allocation failure.
+ */
+int mbedtls_rsa_copy( mbedtls_rsa_context *dst, const mbedtls_rsa_context *src );
+
+/**
+ * \brief          This function frees the components of an RSA key.
+ *
+ * \param ctx      The RSA context to free. May be \c NULL, in which case
+ *                 this function is a no-op. If it is not \c NULL, it must
+ *                 point to an initialized RSA context.
+ */
+void mbedtls_rsa_free( mbedtls_rsa_context *ctx );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          The RSA checkup routine.
+ *
+ * \return         \c 0 on success.
+ * \return         \c 1 on failure.
+ */
+int mbedtls_rsa_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* rsa.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h
new file mode 100644
index 00000000000..d55492bb16b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/rsa_internal.h
@@ -0,0 +1,224 @@
+/**
+ * \file rsa_internal.h
+ *
+ * \brief Context-independent RSA helper functions
+ *
+ *  This module declares some RSA-related helper functions useful when
+ *  implementing the RSA interface. These functions are provided in a separate
+ *  compilation unit in order to make it easy for designers of alternative RSA
+ *  implementations to use them in their own code, as it is conceived that the
+ *  functionality they provide will be necessary for most complete
+ *  implementations.
+ *
+ *  End-users of Mbed TLS who are not providing their own alternative RSA
+ *  implementations should not use these functions directly, and should instead
+ *  use only the functions declared in rsa.h.
+ *
+ *  The interface provided by this module will be maintained through LTS (Long
+ *  Term Support) branches of Mbed TLS, but may otherwise be subject to change,
+ *  and must be considered an internal interface of the library.
+ *
+ *  There are two classes of helper functions:
+ *
+ *  (1) Parameter-generating helpers. These are:
+ *      - mbedtls_rsa_deduce_primes
+ *      - mbedtls_rsa_deduce_private_exponent
+ *      - mbedtls_rsa_deduce_crt
+ *       Each of these functions takes a set of core RSA parameters and
+ *       generates some other, or CRT related parameters.
+ *
+ *  (2) Parameter-checking helpers. These are:
+ *      - mbedtls_rsa_validate_params
+ *      - mbedtls_rsa_validate_crt
+ *      They take a set of core or CRT related RSA parameters and check their
+ *      validity.
+ *
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ */
+
+#ifndef MBEDTLS_RSA_INTERNAL_H
+#define MBEDTLS_RSA_INTERNAL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/bignum.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * \brief          Compute RSA prime moduli P, Q from public modulus N=PQ
+ *                 and a pair of private and public key.
+ *
+ * \note           This is a 'static' helper function not operating on
+ *                 an RSA context. Alternative implementations need not
+ *                 overwrite it.
+ *
+ * \param N        RSA modulus N = PQ, with P, Q to be found
+ * \param E        RSA public exponent
+ * \param D        RSA private exponent
+ * \param P        Pointer to MPI holding first prime factor of N on success
+ * \param Q        Pointer to MPI holding second prime factor of N on success
+ *
+ * \return
+ *                 - 0 if successful. In this case, P and Q constitute a
+ *                   factorization of N.
+ *                 - A non-zero error code otherwise.
+ *
+ * \note           It is neither checked that P, Q are prime nor that
+ *                 D, E are modular inverses wrt. P-1 and Q-1. For that,
+ *                 use the helper function \c mbedtls_rsa_validate_params.
+ *
+ */
+int mbedtls_rsa_deduce_primes( mbedtls_mpi const *N, mbedtls_mpi const *E,
+                               mbedtls_mpi const *D,
+                               mbedtls_mpi *P, mbedtls_mpi *Q );
+
+/**
+ * \brief          Compute RSA private exponent from
+ *                 prime moduli and public key.
+ *
+ * \note           This is a 'static' helper function not operating on
+ *                 an RSA context. Alternative implementations need not
+ *                 overwrite it.
+ *
+ * \param P        First prime factor of RSA modulus
+ * \param Q        Second prime factor of RSA modulus
+ * \param E        RSA public exponent
+ * \param D        Pointer to MPI holding the private exponent on success.
+ *
+ * \return
+ *                 - 0 if successful. In this case, D is set to a simultaneous
+ *                   modular inverse of E modulo both P-1 and Q-1.
+ *                 - A non-zero error code otherwise.
+ *
+ * \note           This function does not check whether P and Q are primes.
+ *
+ */
+int mbedtls_rsa_deduce_private_exponent( mbedtls_mpi const *P,
+                                         mbedtls_mpi const *Q,
+                                         mbedtls_mpi const *E,
+                                         mbedtls_mpi *D );
+
+
+/**
+ * \brief          Generate RSA-CRT parameters
+ *
+ * \note           This is a 'static' helper function not operating on
+ *                 an RSA context. Alternative implementations need not
+ *                 overwrite it.
+ *
+ * \param P        First prime factor of N
+ * \param Q        Second prime factor of N
+ * \param D        RSA private exponent
+ * \param DP       Output variable for D modulo P-1
+ * \param DQ       Output variable for D modulo Q-1
+ * \param QP       Output variable for the modular inverse of Q modulo P.
+ *
+ * \return         0 on success, non-zero error code otherwise.
+ *
+ * \note           This function does not check whether P, Q are
+ *                 prime and whether D is a valid private exponent.
+ *
+ */
+int mbedtls_rsa_deduce_crt( const mbedtls_mpi *P, const mbedtls_mpi *Q,
+                            const mbedtls_mpi *D, mbedtls_mpi *DP,
+                            mbedtls_mpi *DQ, mbedtls_mpi *QP );
+
+
+/**
+ * \brief          Check validity of core RSA parameters
+ *
+ * \note           This is a 'static' helper function not operating on
+ *                 an RSA context. Alternative implementations need not
+ *                 overwrite it.
+ *
+ * \param N        RSA modulus N = PQ
+ * \param P        First prime factor of N
+ * \param Q        Second prime factor of N
+ * \param D        RSA private exponent
+ * \param E        RSA public exponent
+ * \param f_rng    PRNG to be used for primality check, or NULL
+ * \param p_rng    PRNG context for f_rng, or NULL
+ *
+ * \return
+ *                 - 0 if the following conditions are satisfied
+ *                   if all relevant parameters are provided:
+ *                    - P prime if f_rng != NULL (%)
+ *                    - Q prime if f_rng != NULL (%)
+ *                    - 1 < N = P * Q
+ *                    - 1 < D, E < N
+ *                    - D and E are modular inverses modulo P-1 and Q-1
+ *                   (%) This is only done if MBEDTLS_GENPRIME is defined.
+ *                 - A non-zero error code otherwise.
+ *
+ * \note           The function can be used with a restricted set of arguments
+ *                 to perform specific checks only. E.g., calling it with
+ *                 (-,P,-,-,-) and a PRNG amounts to a primality check for P.
+ */
+int mbedtls_rsa_validate_params( const mbedtls_mpi *N, const mbedtls_mpi *P,
+                                 const mbedtls_mpi *Q, const mbedtls_mpi *D,
+                                 const mbedtls_mpi *E,
+                                 int (*f_rng)(void *, unsigned char *, size_t),
+                                 void *p_rng );
+
+/**
+ * \brief          Check validity of RSA CRT parameters
+ *
+ * \note           This is a 'static' helper function not operating on
+ *                 an RSA context. Alternative implementations need not
+ *                 overwrite it.
+ *
+ * \param P        First prime factor of RSA modulus
+ * \param Q        Second prime factor of RSA modulus
+ * \param D        RSA private exponent
+ * \param DP       MPI to check for D modulo P-1
+ * \param DQ       MPI to check for D modulo P-1
+ * \param QP       MPI to check for the modular inverse of Q modulo P.
+ *
+ * \return
+ *                 - 0 if the following conditions are satisfied:
+ *                    - D = DP mod P-1 if P, D, DP != NULL
+ *                    - Q = DQ mod P-1 if P, D, DQ != NULL
+ *                    - QP = Q^-1 mod P if P, Q, QP != NULL
+ *                 - \c MBEDTLS_ERR_RSA_KEY_CHECK_FAILED if check failed,
+ *                   potentially including \c MBEDTLS_ERR_MPI_XXX if some
+ *                   MPI calculations failed.
+ *                 - \c MBEDTLS_ERR_RSA_BAD_INPUT_DATA if insufficient
+ *                   data was provided to check DP, DQ or QP.
+ *
+ * \note           The function can be used with a restricted set of arguments
+ *                 to perform specific checks only. E.g., calling it with the
+ *                 parameters (P, -, D, DP, -, -) will check DP = D mod P-1.
+ */
+int mbedtls_rsa_validate_crt( const mbedtls_mpi *P,  const mbedtls_mpi *Q,
+                              const mbedtls_mpi *D,  const mbedtls_mpi *DP,
+                              const mbedtls_mpi *DQ, const mbedtls_mpi *QP );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* rsa_internal.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/sha1.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/sha1.h
new file mode 100644
index 00000000000..4c3251b4a12
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/sha1.h
@@ -0,0 +1,352 @@
+/**
+ * \file sha1.h
+ *
+ * \brief This file contains SHA-1 definitions and functions.
+ *
+ * The Secure Hash Algorithm 1 (SHA-1) cryptographic hash function is defined in
+ * <em>FIPS 180-4: Secure Hash Standard (SHS)</em>.
+ *
+ * \warning   SHA-1 is considered a weak message digest and its use constitutes
+ *            a security risk. We recommend considering stronger message
+ *            digests instead.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_SHA1_H
+#define MBEDTLS_SHA1_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** SHA-1 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED                  -0x0035
+/** SHA-1 input data was malformed. */
+#define MBEDTLS_ERR_SHA1_BAD_INPUT_DATA                   -0x0073
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_SHA1_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          The SHA-1 context structure.
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+typedef struct mbedtls_sha1_context
+{
+    uint32_t total[2];          /*!< The number of Bytes processed.  */
+    uint32_t state[5];          /*!< The intermediate digest state.  */
+    unsigned char buffer[64];   /*!< The data block being processed. */
+}
+mbedtls_sha1_context;
+
+#else  /* MBEDTLS_SHA1_ALT */
+#include "sha1_alt.h"
+#endif /* MBEDTLS_SHA1_ALT */
+
+/**
+ * \brief          This function initializes a SHA-1 context.
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \param ctx      The SHA-1 context to initialize.
+ *                 This must not be \c NULL.
+ *
+ */
+void mbedtls_sha1_init( mbedtls_sha1_context *ctx );
+
+/**
+ * \brief          This function clears a SHA-1 context.
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \param ctx      The SHA-1 context to clear. This may be \c NULL,
+ *                 in which case this function does nothing. If it is
+ *                 not \c NULL, it must point to an initialized
+ *                 SHA-1 context.
+ *
+ */
+void mbedtls_sha1_free( mbedtls_sha1_context *ctx );
+
+/**
+ * \brief          This function clones the state of a SHA-1 context.
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \param dst      The SHA-1 context to clone to. This must be initialized.
+ * \param src      The SHA-1 context to clone from. This must be initialized.
+ *
+ */
+void mbedtls_sha1_clone( mbedtls_sha1_context *dst,
+                         const mbedtls_sha1_context *src );
+
+/**
+ * \brief          This function starts a SHA-1 checksum calculation.
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \param ctx      The SHA-1 context to initialize. This must be initialized.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ *
+ */
+int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx );
+
+/**
+ * \brief          This function feeds an input buffer into an ongoing SHA-1
+ *                 checksum calculation.
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \param ctx      The SHA-1 context. This must be initialized
+ *                 and have a hash operation started.
+ * \param input    The buffer holding the input data.
+ *                 This must be a readable buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data \p input in Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx,
+                             const unsigned char *input,
+                             size_t ilen );
+
+/**
+ * \brief          This function finishes the SHA-1 operation, and writes
+ *                 the result to the output buffer.
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \param ctx      The SHA-1 context to use. This must be initialized and
+ *                 have a hash operation started.
+ * \param output   The SHA-1 checksum result. This must be a writable
+ *                 buffer of length \c 20 Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_sha1_finish_ret( mbedtls_sha1_context *ctx,
+                             unsigned char output[20] );
+
+/**
+ * \brief          SHA-1 process data block (internal use only).
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \param ctx      The SHA-1 context to use. This must be initialized.
+ * \param data     The data block being processed. This must be a
+ *                 readable buffer of length \c 64 Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ *
+ */
+int mbedtls_internal_sha1_process( mbedtls_sha1_context *ctx,
+                                   const unsigned char data[64] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          This function starts a SHA-1 checksum calculation.
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \deprecated     Superseded by mbedtls_sha1_starts_ret() in 2.7.0.
+ *
+ * \param ctx      The SHA-1 context to initialize. This must be initialized.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha1_starts( mbedtls_sha1_context *ctx );
+
+/**
+ * \brief          This function feeds an input buffer into an ongoing SHA-1
+ *                 checksum calculation.
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \deprecated     Superseded by mbedtls_sha1_update_ret() in 2.7.0.
+ *
+ * \param ctx      The SHA-1 context. This must be initialized and
+ *                 have a hash operation started.
+ * \param input    The buffer holding the input data.
+ *                 This must be a readable buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data \p input in Bytes.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha1_update( mbedtls_sha1_context *ctx,
+                                             const unsigned char *input,
+                                             size_t ilen );
+
+/**
+ * \brief          This function finishes the SHA-1 operation, and writes
+ *                 the result to the output buffer.
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \deprecated     Superseded by mbedtls_sha1_finish_ret() in 2.7.0.
+ *
+ * \param ctx      The SHA-1 context. This must be initialized and
+ *                 have a hash operation started.
+ * \param output   The SHA-1 checksum result.
+ *                 This must be a writable buffer of length \c 20 Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha1_finish( mbedtls_sha1_context *ctx,
+                                             unsigned char output[20] );
+
+/**
+ * \brief          SHA-1 process data block (internal use only).
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \deprecated     Superseded by mbedtls_internal_sha1_process() in 2.7.0.
+ *
+ * \param ctx      The SHA-1 context. This must be initialized.
+ * \param data     The data block being processed.
+ *                 This must be a readable buffer of length \c 64 bytes.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha1_process( mbedtls_sha1_context *ctx,
+                                              const unsigned char data[64] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief          This function calculates the SHA-1 checksum of a buffer.
+ *
+ *                 The function allocates the context, performs the
+ *                 calculation, and frees the context.
+ *
+ *                 The SHA-1 result is calculated as
+ *                 output = SHA-1(input buffer).
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \param input    The buffer holding the input data.
+ *                 This must be a readable buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data \p input in Bytes.
+ * \param output   The SHA-1 checksum result.
+ *                 This must be a writable buffer of length \c 20 Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ *
+ */
+int mbedtls_sha1_ret( const unsigned char *input,
+                      size_t ilen,
+                      unsigned char output[20] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          This function calculates the SHA-1 checksum of a buffer.
+ *
+ *                 The function allocates the context, performs the
+ *                 calculation, and frees the context.
+ *
+ *                 The SHA-1 result is calculated as
+ *                 output = SHA-1(input buffer).
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \deprecated     Superseded by mbedtls_sha1_ret() in 2.7.0
+ *
+ * \param input    The buffer holding the input data.
+ *                 This must be a readable buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data \p input in Bytes.
+ * \param output   The SHA-1 checksum result. This must be a writable
+ *                 buffer of size \c 20 Bytes.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha1( const unsigned char *input,
+                                      size_t ilen,
+                                      unsigned char output[20] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          The SHA-1 checkup routine.
+ *
+ * \warning        SHA-1 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ * \return         \c 0 on success.
+ * \return         \c 1 on failure.
+ *
+ */
+int mbedtls_sha1_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_sha1.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/sha256.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/sha256.h
new file mode 100644
index 00000000000..5b54be21425
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/sha256.h
@@ -0,0 +1,300 @@
+/**
+ * \file sha256.h
+ *
+ * \brief This file contains SHA-224 and SHA-256 definitions and functions.
+ *
+ * The Secure Hash Algorithms 224 and 256 (SHA-224 and SHA-256) cryptographic
+ * hash functions are defined in <em>FIPS 180-4: Secure Hash Standard (SHS)</em>.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_SHA256_H
+#define MBEDTLS_SHA256_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** SHA-256 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED                -0x0037
+/** SHA-256 input data was malformed. */
+#define MBEDTLS_ERR_SHA256_BAD_INPUT_DATA                 -0x0074
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_SHA256_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          The SHA-256 context structure.
+ *
+ *                 The structure is used both for SHA-256 and for SHA-224
+ *                 checksum calculations. The choice between these two is
+ *                 made in the call to mbedtls_sha256_starts_ret().
+ */
+typedef struct mbedtls_sha256_context
+{
+    uint32_t total[2];          /*!< The number of Bytes processed.  */
+    uint32_t state[8];          /*!< The intermediate digest state.  */
+    unsigned char buffer[64];   /*!< The data block being processed. */
+    int is224;                  /*!< Determines which function to use:
+                                     0: Use SHA-256, or 1: Use SHA-224. */
+}
+mbedtls_sha256_context;
+
+#else  /* MBEDTLS_SHA256_ALT */
+#include "sha256_alt.h"
+#endif /* MBEDTLS_SHA256_ALT */
+
+/**
+ * \brief          This function initializes a SHA-256 context.
+ *
+ * \param ctx      The SHA-256 context to initialize. This must not be \c NULL.
+ */
+void mbedtls_sha256_init( mbedtls_sha256_context *ctx );
+
+/**
+ * \brief          This function clears a SHA-256 context.
+ *
+ * \param ctx      The SHA-256 context to clear. This may be \c NULL, in which
+ *                 case this function returns immediately. If it is not \c NULL,
+ *                 it must point to an initialized SHA-256 context.
+ */
+void mbedtls_sha256_free( mbedtls_sha256_context *ctx );
+
+/**
+ * \brief          This function clones the state of a SHA-256 context.
+ *
+ * \param dst      The destination context. This must be initialized.
+ * \param src      The context to clone. This must be initialized.
+ */
+void mbedtls_sha256_clone( mbedtls_sha256_context *dst,
+                           const mbedtls_sha256_context *src );
+
+/**
+ * \brief          This function starts a SHA-224 or SHA-256 checksum
+ *                 calculation.
+ *
+ * \param ctx      The context to use. This must be initialized.
+ * \param is224    This determines which function to use. This must be
+ *                 either \c 0 for SHA-256, or \c 1 for SHA-224.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 );
+
+/**
+ * \brief          This function feeds an input buffer into an ongoing
+ *                 SHA-256 checksum calculation.
+ *
+ * \param ctx      The SHA-256 context. This must be initialized
+ *                 and have a hash operation started.
+ * \param input    The buffer holding the data. This must be a readable
+ *                 buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data in Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx,
+                               const unsigned char *input,
+                               size_t ilen );
+
+/**
+ * \brief          This function finishes the SHA-256 operation, and writes
+ *                 the result to the output buffer.
+ *
+ * \param ctx      The SHA-256 context. This must be initialized
+ *                 and have a hash operation started.
+ * \param output   The SHA-224 or SHA-256 checksum result.
+ *                 This must be a writable buffer of length \c 32 Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx,
+                               unsigned char output[32] );
+
+/**
+ * \brief          This function processes a single data block within
+ *                 the ongoing SHA-256 computation. This function is for
+ *                 internal use only.
+ *
+ * \param ctx      The SHA-256 context. This must be initialized.
+ * \param data     The buffer holding one block of data. This must
+ *                 be a readable buffer of length \c 64 Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_internal_sha256_process( mbedtls_sha256_context *ctx,
+                                     const unsigned char data[64] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          This function starts a SHA-224 or SHA-256 checksum
+ *                 calculation.
+ *
+ * \deprecated     Superseded by mbedtls_sha256_starts_ret() in 2.7.0.
+ *
+ * \param ctx      The context to use. This must be initialized.
+ * \param is224    Determines which function to use. This must be
+ *                 either \c 0 for SHA-256, or \c 1 for SHA-224.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha256_starts( mbedtls_sha256_context *ctx,
+                                               int is224 );
+
+/**
+ * \brief          This function feeds an input buffer into an ongoing
+ *                 SHA-256 checksum calculation.
+ *
+ * \deprecated     Superseded by mbedtls_sha256_update_ret() in 2.7.0.
+ *
+ * \param ctx      The SHA-256 context to use. This must be
+ *                 initialized and have a hash operation started.
+ * \param input    The buffer holding the data. This must be a readable
+ *                 buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data in Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha256_update( mbedtls_sha256_context *ctx,
+                                               const unsigned char *input,
+                                               size_t ilen );
+
+/**
+ * \brief          This function finishes the SHA-256 operation, and writes
+ *                 the result to the output buffer.
+ *
+ * \deprecated     Superseded by mbedtls_sha256_finish_ret() in 2.7.0.
+ *
+ * \param ctx      The SHA-256 context. This must be initialized and
+ *                 have a hash operation started.
+ * \param output   The SHA-224 or SHA-256 checksum result. This must be
+ *                 a writable buffer of length \c 32 Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha256_finish( mbedtls_sha256_context *ctx,
+                                               unsigned char output[32] );
+
+/**
+ * \brief          This function processes a single data block within
+ *                 the ongoing SHA-256 computation. This function is for
+ *                 internal use only.
+ *
+ * \deprecated     Superseded by mbedtls_internal_sha256_process() in 2.7.0.
+ *
+ * \param ctx      The SHA-256 context. This must be initialized.
+ * \param data     The buffer holding one block of data. This must be
+ *                 a readable buffer of size \c 64 Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha256_process( mbedtls_sha256_context *ctx,
+                                                const unsigned char data[64] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief          This function calculates the SHA-224 or SHA-256
+ *                 checksum of a buffer.
+ *
+ *                 The function allocates the context, performs the
+ *                 calculation, and frees the context.
+ *
+ *                 The SHA-256 result is calculated as
+ *                 output = SHA-256(input buffer).
+ *
+ * \param input    The buffer holding the data. This must be a readable
+ *                 buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data in Bytes.
+ * \param output   The SHA-224 or SHA-256 checksum result. This must
+ *                 be a writable buffer of length \c 32 Bytes.
+ * \param is224    Determines which function to use. This must be
+ *                 either \c 0 for SHA-256, or \c 1 for SHA-224.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_sha256_ret( const unsigned char *input,
+                        size_t ilen,
+                        unsigned char output[32],
+                        int is224 );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
+/**
+ * \brief          This function calculates the SHA-224 or SHA-256 checksum
+ *                 of a buffer.
+ *
+ *                 The function allocates the context, performs the
+ *                 calculation, and frees the context.
+ *
+ *                 The SHA-256 result is calculated as
+ *                 output = SHA-256(input buffer).
+ *
+ * \deprecated     Superseded by mbedtls_sha256_ret() in 2.7.0.
+ *
+ * \param input    The buffer holding the data. This must be a readable
+ *                 buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data in Bytes.
+ * \param output   The SHA-224 or SHA-256 checksum result. This must be
+ *                 a writable buffer of length \c 32 Bytes.
+ * \param is224    Determines which function to use. This must be either
+ *                 \c 0 for SHA-256, or \c 1 for SHA-224.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha256( const unsigned char *input,
+                                        size_t ilen,
+                                        unsigned char output[32],
+                                        int is224 );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          The SHA-224 and SHA-256 checkup routine.
+ *
+ * \return         \c 0 on success.
+ * \return         \c 1 on failure.
+ */
+int mbedtls_sha256_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_sha256.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/sha512.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/sha512.h
new file mode 100644
index 00000000000..cca47c2fe62
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/sha512.h
@@ -0,0 +1,316 @@
+/**
+ * \file sha512.h
+ * \brief This file contains SHA-384 and SHA-512 definitions and functions.
+ *
+ * The Secure Hash Algorithms 384 and 512 (SHA-384 and SHA-512) cryptographic
+ * hash functions are defined in <em>FIPS 180-4: Secure Hash Standard (SHS)</em>.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_SHA512_H
+#define MBEDTLS_SHA512_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** SHA-512 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED                -0x0039
+/** SHA-512 input data was malformed. */
+#define MBEDTLS_ERR_SHA512_BAD_INPUT_DATA                 -0x0075
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_SHA512_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          The SHA-512 context structure.
+ *
+ *                 The structure is used both for SHA-384 and for SHA-512
+ *                 checksum calculations. The choice between these two is
+ *                 made in the call to mbedtls_sha512_starts_ret().
+ */
+typedef struct mbedtls_sha512_context
+{
+    uint64_t total[2];          /*!< The number of Bytes processed. */
+    uint64_t state[8];          /*!< The intermediate digest state. */
+    unsigned char buffer[128];  /*!< The data block being processed. */
+#if !defined(MBEDTLS_SHA512_NO_SHA384)
+    int is384;                  /*!< Determines which function to use:
+                                     0: Use SHA-512, or 1: Use SHA-384. */
+#endif
+}
+mbedtls_sha512_context;
+
+#else  /* MBEDTLS_SHA512_ALT */
+#include "sha512_alt.h"
+#endif /* MBEDTLS_SHA512_ALT */
+
+/**
+ * \brief          This function initializes a SHA-512 context.
+ *
+ * \param ctx      The SHA-512 context to initialize. This must
+ *                 not be \c NULL.
+ */
+void mbedtls_sha512_init( mbedtls_sha512_context *ctx );
+
+/**
+ * \brief          This function clears a SHA-512 context.
+ *
+ * \param ctx      The SHA-512 context to clear. This may be \c NULL,
+ *                 in which case this function does nothing. If it
+ *                 is not \c NULL, it must point to an initialized
+ *                 SHA-512 context.
+ */
+void mbedtls_sha512_free( mbedtls_sha512_context *ctx );
+
+/**
+ * \brief          This function clones the state of a SHA-512 context.
+ *
+ * \param dst      The destination context. This must be initialized.
+ * \param src      The context to clone. This must be initialized.
+ */
+void mbedtls_sha512_clone( mbedtls_sha512_context *dst,
+                           const mbedtls_sha512_context *src );
+
+/**
+ * \brief          This function starts a SHA-384 or SHA-512 checksum
+ *                 calculation.
+ *
+ * \param ctx      The SHA-512 context to use. This must be initialized.
+ * \param is384    Determines which function to use. This must be
+ *                 either \c 0 for SHA-512, or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will return
+ *                 #MBEDTLS_ERR_SHA512_BAD_INPUT_DATA.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_sha512_starts_ret( mbedtls_sha512_context *ctx, int is384 );
+
+/**
+ * \brief          This function feeds an input buffer into an ongoing
+ *                 SHA-512 checksum calculation.
+ *
+ * \param ctx      The SHA-512 context. This must be initialized
+ *                 and have a hash operation started.
+ * \param input    The buffer holding the input data. This must
+ *                 be a readable buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data in Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_sha512_update_ret( mbedtls_sha512_context *ctx,
+                    const unsigned char *input,
+                    size_t ilen );
+
+/**
+ * \brief          This function finishes the SHA-512 operation, and writes
+ *                 the result to the output buffer.
+ *
+ * \param ctx      The SHA-512 context. This must be initialized
+ *                 and have a hash operation started.
+ * \param output   The SHA-384 or SHA-512 checksum result.
+ *                 This must be a writable buffer of length \c 64 Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_sha512_finish_ret( mbedtls_sha512_context *ctx,
+                               unsigned char output[64] );
+
+/**
+ * \brief          This function processes a single data block within
+ *                 the ongoing SHA-512 computation.
+ *                 This function is for internal use only.
+ *
+ * \param ctx      The SHA-512 context. This must be initialized.
+ * \param data     The buffer holding one block of data. This
+ *                 must be a readable buffer of length \c 128 Bytes.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_internal_sha512_process( mbedtls_sha512_context *ctx,
+                                     const unsigned char data[128] );
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief          This function starts a SHA-384 or SHA-512 checksum
+ *                 calculation.
+ *
+ * \deprecated     Superseded by mbedtls_sha512_starts_ret() in 2.7.0
+ *
+ * \param ctx      The SHA-512 context to use. This must be initialized.
+ * \param is384    Determines which function to use. This must be either
+ *                 \c 0 for SHA-512 or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will fail to work.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha512_starts( mbedtls_sha512_context *ctx,
+                                               int is384 );
+
+/**
+ * \brief          This function feeds an input buffer into an ongoing
+ *                 SHA-512 checksum calculation.
+ *
+ * \deprecated     Superseded by mbedtls_sha512_update_ret() in 2.7.0.
+ *
+ * \param ctx      The SHA-512 context. This must be initialized
+ *                 and have a hash operation started.
+ * \param input    The buffer holding the data. This must be a readable
+ *                 buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data in Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha512_update( mbedtls_sha512_context *ctx,
+                                               const unsigned char *input,
+                                               size_t ilen );
+
+/**
+ * \brief          This function finishes the SHA-512 operation, and writes
+ *                 the result to the output buffer.
+ *
+ * \deprecated     Superseded by mbedtls_sha512_finish_ret() in 2.7.0.
+ *
+ * \param ctx      The SHA-512 context. This must be initialized
+ *                 and have a hash operation started.
+ * \param output   The SHA-384 or SHA-512 checksum result. This must
+ *                 be a writable buffer of size \c 64 Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha512_finish( mbedtls_sha512_context *ctx,
+                                               unsigned char output[64] );
+
+/**
+ * \brief          This function processes a single data block within
+ *                 the ongoing SHA-512 computation. This function is for
+ *                 internal use only.
+ *
+ * \deprecated     Superseded by mbedtls_internal_sha512_process() in 2.7.0.
+ *
+ * \param ctx      The SHA-512 context. This must be initialized.
+ * \param data     The buffer holding one block of data. This must be
+ *                 a readable buffer of length \c 128 Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha512_process(
+                                            mbedtls_sha512_context *ctx,
+                                            const unsigned char data[128] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief          This function calculates the SHA-512 or SHA-384
+ *                 checksum of a buffer.
+ *
+ *                 The function allocates the context, performs the
+ *                 calculation, and frees the context.
+ *
+ *                 The SHA-512 result is calculated as
+ *                 output = SHA-512(input buffer).
+ *
+ * \param input    The buffer holding the input data. This must be
+ *                 a readable buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data in Bytes.
+ * \param output   The SHA-384 or SHA-512 checksum result.
+ *                 This must be a writable buffer of length \c 64 Bytes.
+ * \param is384    Determines which function to use. This must be either
+ *                 \c 0 for SHA-512, or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will return
+ *                 #MBEDTLS_ERR_SHA512_BAD_INPUT_DATA.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_sha512_ret( const unsigned char *input,
+                        size_t ilen,
+                        unsigned char output[64],
+                        int is384 );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
+/**
+ * \brief          This function calculates the SHA-512 or SHA-384
+ *                 checksum of a buffer.
+ *
+ *                 The function allocates the context, performs the
+ *                 calculation, and frees the context.
+ *
+ *                 The SHA-512 result is calculated as
+ *                 output = SHA-512(input buffer).
+ *
+ * \deprecated     Superseded by mbedtls_sha512_ret() in 2.7.0
+ *
+ * \param input    The buffer holding the data. This must be a
+ *                 readable buffer of length \p ilen Bytes.
+ * \param ilen     The length of the input data in Bytes.
+ * \param output   The SHA-384 or SHA-512 checksum result. This must
+ *                 be a writable buffer of length \c 64 Bytes.
+ * \param is384    Determines which function to use. This must be either
+ *                 \c 0 for SHA-512, or \c 1 for SHA-384.
+ *
+ * \note           When \c MBEDTLS_SHA512_NO_SHA384 is defined, \p is384 must
+ *                 be \c 0, or the function will fail to work.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha512( const unsigned char *input,
+                                        size_t ilen,
+                                        unsigned char output[64],
+                                        int is384 );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+ /**
+ * \brief          The SHA-384 or SHA-512 checkup routine.
+ *
+ * \return         \c 0 on success.
+ * \return         \c 1 on failure.
+ */
+int mbedtls_sha512_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_sha512.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl.h
new file mode 100644
index 00000000000..209dbf6053c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl.h
@@ -0,0 +1,4427 @@
+/**
+ * \file ssl.h
+ *
+ * \brief SSL/TLS functions.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_SSL_H
+#define MBEDTLS_SSL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/bignum.h"
+#include "mbedtls/ecp.h"
+
+#include "mbedtls/ssl_ciphersuites.h"
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+#include "mbedtls/x509_crt.h"
+#include "mbedtls/x509_crl.h"
+#endif
+
+#if defined(MBEDTLS_DHM_C)
+#include "mbedtls/dhm.h"
+#endif
+
+/* Adding guard for MBEDTLS_ECDSA_C to ensure no compile errors due
+ * to guards also being in ssl_srv.c and ssl_cli.c. There is a gap
+ * in functionality that access to ecdh_ctx structure is needed for
+ * MBEDTLS_ECDSA_C which does not seem correct.
+ */
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C)
+#include "mbedtls/ecdh.h"
+#endif
+
+#if defined(MBEDTLS_ZLIB_SUPPORT)
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "Record compression support via MBEDTLS_ZLIB_SUPPORT is deprecated and will be removed in the next major revision of the library"
+#endif
+
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "Record compression support via MBEDTLS_ZLIB_SUPPORT is deprecated and cannot be used if MBEDTLS_DEPRECATED_REMOVED is set"
+#endif
+
+#include "zlib.h"
+#endif
+
+#if defined(MBEDTLS_HAVE_TIME)
+#include "mbedtls/platform_time.h"
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+/*
+ * SSL Error codes
+ */
+/** The requested feature is not available. */
+#define MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE               -0x7080
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_SSL_BAD_INPUT_DATA                    -0x7100
+/** Verification of the message MAC failed. */
+#define MBEDTLS_ERR_SSL_INVALID_MAC                       -0x7180
+/** An invalid SSL record was received. */
+#define MBEDTLS_ERR_SSL_INVALID_RECORD                    -0x7200
+/** The connection indicated an EOF. */
+#define MBEDTLS_ERR_SSL_CONN_EOF                          -0x7280
+/** An unknown cipher was received. */
+#define MBEDTLS_ERR_SSL_UNKNOWN_CIPHER                    -0x7300
+/** The server has no ciphersuites in common with the client. */
+#define MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN                  -0x7380
+/** No RNG was provided to the SSL module. */
+#define MBEDTLS_ERR_SSL_NO_RNG                            -0x7400
+/** No client certification received from the client, but required by the authentication mode. */
+#define MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE             -0x7480
+/** Our own certificate(s) is/are too large to send in an SSL message. */
+#define MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE             -0x7500
+/** The own certificate is not set, but needed by the server. */
+#define MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED              -0x7580
+/** The own private key or pre-shared key is not set, but needed. */
+#define MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED              -0x7600
+/** No CA Chain is set, but required to operate. */
+#define MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED                 -0x7680
+/** An unexpected message was received from our peer. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE                -0x7700
+/** A fatal alert message was received from our peer. */
+#define MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE               -0x7780
+/** Verification of our peer failed. */
+#define MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED                -0x7800
+/** The peer notified us that the connection is going to be closed. */
+#define MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY                 -0x7880
+/** Processing of the ClientHello handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO               -0x7900
+/** Processing of the ServerHello handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO               -0x7980
+/** Processing of the Certificate handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE                -0x7A00
+/** Processing of the CertificateRequest handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST        -0x7A80
+/** Processing of the ServerKeyExchange handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE        -0x7B00
+/** Processing of the ServerHelloDone handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE          -0x7B80
+/** Processing of the ClientKeyExchange handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE        -0x7C00
+/** Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Read Public. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP     -0x7C80
+/** Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Calculate Secret. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS     -0x7D00
+/** Processing of the CertificateVerify handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY         -0x7D80
+/** Processing of the ChangeCipherSpec handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC         -0x7E00
+/** Processing of the Finished handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_FINISHED                   -0x7E80
+/** Memory allocation failed */
+#define MBEDTLS_ERR_SSL_ALLOC_FAILED                      -0x7F00
+/** Hardware acceleration function returned with error */
+#define MBEDTLS_ERR_SSL_HW_ACCEL_FAILED                   -0x7F80
+/** Hardware acceleration function skipped / left alone data */
+#define MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH              -0x6F80
+/** Processing of the compression / decompression failed */
+#define MBEDTLS_ERR_SSL_COMPRESSION_FAILED                -0x6F00
+/** Handshake protocol not within min/max boundaries */
+#define MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION           -0x6E80
+/** Processing of the NewSessionTicket handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET         -0x6E00
+/** Session ticket has expired. */
+#define MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED            -0x6D80
+/** Public key type mismatch (eg, asked for RSA key exchange and presented EC key) */
+#define MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH                  -0x6D00
+/** Unknown identity received (eg, PSK identity) */
+#define MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY                  -0x6C80
+/** Internal error (eg, unexpected failure in lower-level module) */
+#define MBEDTLS_ERR_SSL_INTERNAL_ERROR                    -0x6C00
+/** A counter would wrap (eg, too many messages exchanged). */
+#define MBEDTLS_ERR_SSL_COUNTER_WRAPPING                  -0x6B80
+/** Unexpected message at ServerHello in renegotiation. */
+#define MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO       -0x6B00
+/** DTLS client must retry for hello verification */
+#define MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED             -0x6A80
+/** A buffer is too small to receive or write a message */
+#define MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL                  -0x6A00
+/** None of the common ciphersuites is usable (eg, no suitable certificate, see debug messages). */
+#define MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE             -0x6980
+/** No data of requested type currently available on underlying transport. */
+#define MBEDTLS_ERR_SSL_WANT_READ                         -0x6900
+/** Connection requires a write call. */
+#define MBEDTLS_ERR_SSL_WANT_WRITE                        -0x6880
+/** The operation timed out. */
+#define MBEDTLS_ERR_SSL_TIMEOUT                           -0x6800
+/** The client initiated a reconnect from the same port. */
+#define MBEDTLS_ERR_SSL_CLIENT_RECONNECT                  -0x6780
+/** Record header looks valid but is not expected. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_RECORD                 -0x6700
+/** The alert message received indicates a non-fatal error. */
+#define MBEDTLS_ERR_SSL_NON_FATAL                         -0x6680
+/** Couldn't set the hash for verifying CertificateVerify */
+#define MBEDTLS_ERR_SSL_INVALID_VERIFY_HASH               -0x6600
+/** Internal-only message signaling that further message-processing should be done */
+#define MBEDTLS_ERR_SSL_CONTINUE_PROCESSING               -0x6580
+/** The asynchronous operation is not completed yet. */
+#define MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS                 -0x6500
+/** Internal-only message signaling that a message arrived early. */
+#define MBEDTLS_ERR_SSL_EARLY_MESSAGE                     -0x6480
+/** An encrypted DTLS-frame with an unexpected CID was received. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_CID                    -0x6000
+/** An operation failed due to an unexpected version or configuration. */
+#define MBEDTLS_ERR_SSL_VERSION_MISMATCH                  -0x5F00
+/** A cryptographic operation is in progress. Try again later. */
+#define MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS                -0x7000
+/** Invalid value in SSL config */
+#define MBEDTLS_ERR_SSL_BAD_CONFIG                        -0x5E80
+
+/*
+ * Various constants
+ */
+#define MBEDTLS_SSL_MAJOR_VERSION_3             3
+#define MBEDTLS_SSL_MINOR_VERSION_0             0   /*!< SSL v3.0 */
+#define MBEDTLS_SSL_MINOR_VERSION_1             1   /*!< TLS v1.0 */
+#define MBEDTLS_SSL_MINOR_VERSION_2             2   /*!< TLS v1.1 */
+#define MBEDTLS_SSL_MINOR_VERSION_3             3   /*!< TLS v1.2 */
+#define MBEDTLS_SSL_MINOR_VERSION_4             4   /*!< TLS v1.3 (experimental) */
+
+#define MBEDTLS_SSL_TRANSPORT_STREAM            0   /*!< TLS      */
+#define MBEDTLS_SSL_TRANSPORT_DATAGRAM          1   /*!< DTLS     */
+
+#define MBEDTLS_SSL_MAX_HOST_NAME_LEN           255 /*!< Maximum host name defined in RFC 1035 */
+#define MBEDTLS_SSL_MAX_ALPN_NAME_LEN           255 /*!< Maximum size in bytes of a protocol name in alpn ext., RFC 7301 */
+
+#define MBEDTLS_SSL_MAX_ALPN_LIST_LEN           65535 /*!< Maximum size in bytes of list in alpn ext., RFC 7301          */
+
+/* RFC 6066 section 4, see also mfl_code_to_length in ssl_tls.c
+ * NONE must be zero so that memset()ing structure to zero works */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_NONE           0   /*!< don't use this extension   */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_512            1   /*!< MaxFragmentLength 2^9      */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_1024           2   /*!< MaxFragmentLength 2^10     */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_2048           3   /*!< MaxFragmentLength 2^11     */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_4096           4   /*!< MaxFragmentLength 2^12     */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_INVALID        5   /*!< first invalid value        */
+
+#define MBEDTLS_SSL_IS_CLIENT                   0
+#define MBEDTLS_SSL_IS_SERVER                   1
+
+#define MBEDTLS_SSL_IS_NOT_FALLBACK             0
+#define MBEDTLS_SSL_IS_FALLBACK                 1
+
+#define MBEDTLS_SSL_EXTENDED_MS_DISABLED        0
+#define MBEDTLS_SSL_EXTENDED_MS_ENABLED         1
+
+#define MBEDTLS_SSL_CID_DISABLED                0
+#define MBEDTLS_SSL_CID_ENABLED                 1
+
+#define MBEDTLS_SSL_ETM_DISABLED                0
+#define MBEDTLS_SSL_ETM_ENABLED                 1
+
+#define MBEDTLS_SSL_COMPRESS_NULL               0
+#define MBEDTLS_SSL_COMPRESS_DEFLATE            1
+
+#define MBEDTLS_SSL_VERIFY_NONE                 0
+#define MBEDTLS_SSL_VERIFY_OPTIONAL             1
+#define MBEDTLS_SSL_VERIFY_REQUIRED             2
+#define MBEDTLS_SSL_VERIFY_UNSET                3 /* Used only for sni_authmode */
+
+#define MBEDTLS_SSL_LEGACY_RENEGOTIATION        0
+#define MBEDTLS_SSL_SECURE_RENEGOTIATION        1
+
+#define MBEDTLS_SSL_RENEGOTIATION_DISABLED      0
+#define MBEDTLS_SSL_RENEGOTIATION_ENABLED       1
+
+#define MBEDTLS_SSL_ANTI_REPLAY_DISABLED        0
+#define MBEDTLS_SSL_ANTI_REPLAY_ENABLED         1
+
+#define MBEDTLS_SSL_RENEGOTIATION_NOT_ENFORCED  -1
+#define MBEDTLS_SSL_RENEGO_MAX_RECORDS_DEFAULT  16
+
+#define MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION     0
+#define MBEDTLS_SSL_LEGACY_ALLOW_RENEGOTIATION  1
+#define MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE      2
+
+#define MBEDTLS_SSL_TRUNC_HMAC_DISABLED         0
+#define MBEDTLS_SSL_TRUNC_HMAC_ENABLED          1
+#define MBEDTLS_SSL_TRUNCATED_HMAC_LEN          10  /* 80 bits, rfc 6066 section 7 */
+
+#define MBEDTLS_SSL_SESSION_TICKETS_DISABLED     0
+#define MBEDTLS_SSL_SESSION_TICKETS_ENABLED      1
+
+#define MBEDTLS_SSL_CBC_RECORD_SPLITTING_DISABLED    0
+#define MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED     1
+
+#define MBEDTLS_SSL_ARC4_ENABLED                0
+#define MBEDTLS_SSL_ARC4_DISABLED               1
+
+#define MBEDTLS_SSL_PRESET_DEFAULT              0
+#define MBEDTLS_SSL_PRESET_SUITEB               2
+
+#define MBEDTLS_SSL_CERT_REQ_CA_LIST_ENABLED       1
+#define MBEDTLS_SSL_CERT_REQ_CA_LIST_DISABLED      0
+
+#define MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED    0
+#define MBEDTLS_SSL_DTLS_SRTP_MKI_SUPPORTED      1
+
+/*
+ * Default range for DTLS retransmission timer value, in milliseconds.
+ * RFC 6347 4.2.4.1 says from 1 second to 60 seconds.
+ */
+#define MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MIN    1000
+#define MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MAX   60000
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME)
+#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME     86400 /**< Lifetime of session tickets (if enabled) */
+#endif
+
+/*
+ * Maximum fragment length in bytes,
+ * determines the size of each of the two internal I/O buffers.
+ *
+ * Note: the RFC defines the default size of SSL / TLS messages. If you
+ * change the value here, other clients / servers may not be able to
+ * communicate with you anymore. Only change this value if you control
+ * both sides of the connection and have it reduced at both sides, or
+ * if you're using the Max Fragment Length extension and you know all your
+ * peers are using it too!
+ */
+#if !defined(MBEDTLS_SSL_MAX_CONTENT_LEN)
+#define MBEDTLS_SSL_MAX_CONTENT_LEN         16384   /**< Size of the input / output buffer */
+#endif
+
+#if !defined(MBEDTLS_SSL_IN_CONTENT_LEN)
+#define MBEDTLS_SSL_IN_CONTENT_LEN MBEDTLS_SSL_MAX_CONTENT_LEN
+#endif
+
+#if !defined(MBEDTLS_SSL_OUT_CONTENT_LEN)
+#define MBEDTLS_SSL_OUT_CONTENT_LEN MBEDTLS_SSL_MAX_CONTENT_LEN
+#endif
+
+/*
+ * Maximum number of heap-allocated bytes for the purpose of
+ * DTLS handshake message reassembly and future message buffering.
+ */
+#if !defined(MBEDTLS_SSL_DTLS_MAX_BUFFERING)
+#define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
+#endif
+
+/*
+ * Maximum length of CIDs for incoming and outgoing messages.
+ */
+#if !defined(MBEDTLS_SSL_CID_IN_LEN_MAX)
+#define MBEDTLS_SSL_CID_IN_LEN_MAX          32
+#endif
+
+#if !defined(MBEDTLS_SSL_CID_OUT_LEN_MAX)
+#define MBEDTLS_SSL_CID_OUT_LEN_MAX         32
+#endif
+
+#if !defined(MBEDTLS_SSL_CID_PADDING_GRANULARITY)
+#define MBEDTLS_SSL_CID_PADDING_GRANULARITY 16
+#endif
+
+#if !defined(MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY)
+#define MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY 1
+#endif
+
+/* \} name SECTION: Module settings */
+
+/*
+ * Length of the verify data for secure renegotiation
+ */
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+#define MBEDTLS_SSL_VERIFY_DATA_MAX_LEN 36
+#else
+#define MBEDTLS_SSL_VERIFY_DATA_MAX_LEN 12
+#endif
+
+/*
+ * Signaling ciphersuite values (SCSV)
+ */
+#define MBEDTLS_SSL_EMPTY_RENEGOTIATION_INFO    0xFF   /**< renegotiation info ext */
+#define MBEDTLS_SSL_FALLBACK_SCSV_VALUE         0x5600 /**< RFC 7507 section 2 */
+
+/*
+ * Supported Signature and Hash algorithms (For TLS 1.2)
+ * RFC 5246 section 7.4.1.4.1
+ */
+#define MBEDTLS_SSL_HASH_NONE                0
+#define MBEDTLS_SSL_HASH_MD5                 1
+#define MBEDTLS_SSL_HASH_SHA1                2
+#define MBEDTLS_SSL_HASH_SHA224              3
+#define MBEDTLS_SSL_HASH_SHA256              4
+#define MBEDTLS_SSL_HASH_SHA384              5
+#define MBEDTLS_SSL_HASH_SHA512              6
+
+#define MBEDTLS_SSL_SIG_ANON                 0
+#define MBEDTLS_SSL_SIG_RSA                  1
+#define MBEDTLS_SSL_SIG_ECDSA                3
+
+/*
+ * Client Certificate Types
+ * RFC 5246 section 7.4.4 plus RFC 4492 section 5.5
+ */
+#define MBEDTLS_SSL_CERT_TYPE_RSA_SIGN       1
+#define MBEDTLS_SSL_CERT_TYPE_ECDSA_SIGN    64
+
+/*
+ * Message, alert and handshake types
+ */
+#define MBEDTLS_SSL_MSG_CHANGE_CIPHER_SPEC     20
+#define MBEDTLS_SSL_MSG_ALERT                  21
+#define MBEDTLS_SSL_MSG_HANDSHAKE              22
+#define MBEDTLS_SSL_MSG_APPLICATION_DATA       23
+#define MBEDTLS_SSL_MSG_CID                    25
+
+#define MBEDTLS_SSL_ALERT_LEVEL_WARNING         1
+#define MBEDTLS_SSL_ALERT_LEVEL_FATAL           2
+
+#define MBEDTLS_SSL_ALERT_MSG_CLOSE_NOTIFY           0  /* 0x00 */
+#define MBEDTLS_SSL_ALERT_MSG_UNEXPECTED_MESSAGE    10  /* 0x0A */
+#define MBEDTLS_SSL_ALERT_MSG_BAD_RECORD_MAC        20  /* 0x14 */
+#define MBEDTLS_SSL_ALERT_MSG_DECRYPTION_FAILED     21  /* 0x15 */
+#define MBEDTLS_SSL_ALERT_MSG_RECORD_OVERFLOW       22  /* 0x16 */
+#define MBEDTLS_SSL_ALERT_MSG_DECOMPRESSION_FAILURE 30  /* 0x1E */
+#define MBEDTLS_SSL_ALERT_MSG_HANDSHAKE_FAILURE     40  /* 0x28 */
+#define MBEDTLS_SSL_ALERT_MSG_NO_CERT               41  /* 0x29 */
+#define MBEDTLS_SSL_ALERT_MSG_BAD_CERT              42  /* 0x2A */
+#define MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_CERT      43  /* 0x2B */
+#define MBEDTLS_SSL_ALERT_MSG_CERT_REVOKED          44  /* 0x2C */
+#define MBEDTLS_SSL_ALERT_MSG_CERT_EXPIRED          45  /* 0x2D */
+#define MBEDTLS_SSL_ALERT_MSG_CERT_UNKNOWN          46  /* 0x2E */
+#define MBEDTLS_SSL_ALERT_MSG_ILLEGAL_PARAMETER     47  /* 0x2F */
+#define MBEDTLS_SSL_ALERT_MSG_UNKNOWN_CA            48  /* 0x30 */
+#define MBEDTLS_SSL_ALERT_MSG_ACCESS_DENIED         49  /* 0x31 */
+#define MBEDTLS_SSL_ALERT_MSG_DECODE_ERROR          50  /* 0x32 */
+#define MBEDTLS_SSL_ALERT_MSG_DECRYPT_ERROR         51  /* 0x33 */
+#define MBEDTLS_SSL_ALERT_MSG_EXPORT_RESTRICTION    60  /* 0x3C */
+#define MBEDTLS_SSL_ALERT_MSG_PROTOCOL_VERSION      70  /* 0x46 */
+#define MBEDTLS_SSL_ALERT_MSG_INSUFFICIENT_SECURITY 71  /* 0x47 */
+#define MBEDTLS_SSL_ALERT_MSG_INTERNAL_ERROR        80  /* 0x50 */
+#define MBEDTLS_SSL_ALERT_MSG_INAPROPRIATE_FALLBACK 86  /* 0x56 */
+#define MBEDTLS_SSL_ALERT_MSG_USER_CANCELED         90  /* 0x5A */
+#define MBEDTLS_SSL_ALERT_MSG_NO_RENEGOTIATION     100  /* 0x64 */
+#define MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_EXT      110  /* 0x6E */
+#define MBEDTLS_SSL_ALERT_MSG_UNRECOGNIZED_NAME    112  /* 0x70 */
+#define MBEDTLS_SSL_ALERT_MSG_UNKNOWN_PSK_IDENTITY 115  /* 0x73 */
+#define MBEDTLS_SSL_ALERT_MSG_NO_APPLICATION_PROTOCOL 120 /* 0x78 */
+
+#define MBEDTLS_SSL_HS_HELLO_REQUEST            0
+#define MBEDTLS_SSL_HS_CLIENT_HELLO             1
+#define MBEDTLS_SSL_HS_SERVER_HELLO             2
+#define MBEDTLS_SSL_HS_HELLO_VERIFY_REQUEST     3
+#define MBEDTLS_SSL_HS_NEW_SESSION_TICKET       4
+#define MBEDTLS_SSL_HS_CERTIFICATE             11
+#define MBEDTLS_SSL_HS_SERVER_KEY_EXCHANGE     12
+#define MBEDTLS_SSL_HS_CERTIFICATE_REQUEST     13
+#define MBEDTLS_SSL_HS_SERVER_HELLO_DONE       14
+#define MBEDTLS_SSL_HS_CERTIFICATE_VERIFY      15
+#define MBEDTLS_SSL_HS_CLIENT_KEY_EXCHANGE     16
+#define MBEDTLS_SSL_HS_FINISHED                20
+
+/*
+ * TLS extensions
+ */
+#define MBEDTLS_TLS_EXT_SERVERNAME                   0
+#define MBEDTLS_TLS_EXT_SERVERNAME_HOSTNAME          0
+
+#define MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH          1
+
+#define MBEDTLS_TLS_EXT_TRUNCATED_HMAC               4
+
+#define MBEDTLS_TLS_EXT_SUPPORTED_ELLIPTIC_CURVES   10
+#define MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS     11
+
+#define MBEDTLS_TLS_EXT_SIG_ALG                     13
+
+#define MBEDTLS_TLS_EXT_USE_SRTP                    14
+
+#define MBEDTLS_TLS_EXT_ALPN                        16
+
+#define MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC            22 /* 0x16 */
+#define MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET  0x0017 /* 23 */
+
+#define MBEDTLS_TLS_EXT_SESSION_TICKET              35
+
+/* The value of the CID extension is still TBD as of
+ * draft-ietf-tls-dtls-connection-id-05
+ * (https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05).
+ *
+ * A future minor revision of Mbed TLS may change the default value of
+ * this option to match evolving standards and usage.
+ */
+#if !defined(MBEDTLS_TLS_EXT_CID)
+#define MBEDTLS_TLS_EXT_CID                        254 /* TBD */
+#endif
+
+#define MBEDTLS_TLS_EXT_ECJPAKE_KKPP               256 /* experimental */
+
+#define MBEDTLS_TLS_EXT_RENEGOTIATION_INFO      0xFF01
+
+/*
+ * Size defines
+ */
+#if !defined(MBEDTLS_PSK_MAX_LEN)
+#define MBEDTLS_PSK_MAX_LEN            32 /* 256 bits */
+#endif
+
+/* Dummy type used only for its size */
+union mbedtls_ssl_premaster_secret
+{
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED)
+    unsigned char _pms_rsa[48];                         /* RFC 5246 8.1.1 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)
+    unsigned char _pms_dhm[MBEDTLS_MPI_MAX_SIZE];      /* RFC 5246 8.1.2 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)    || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)  || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED)     || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
+    unsigned char _pms_ecdh[MBEDTLS_ECP_MAX_BYTES];    /* RFC 4492 5.10 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED)
+    unsigned char _pms_psk[4 + 2 * MBEDTLS_PSK_MAX_LEN];       /* RFC 4279 2 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)
+    unsigned char _pms_dhe_psk[4 + MBEDTLS_MPI_MAX_SIZE
+                                 + MBEDTLS_PSK_MAX_LEN];       /* RFC 4279 3 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)
+    unsigned char _pms_rsa_psk[52 + MBEDTLS_PSK_MAX_LEN];      /* RFC 4279 4 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
+    unsigned char _pms_ecdhe_psk[4 + MBEDTLS_ECP_MAX_BYTES
+                                   + MBEDTLS_PSK_MAX_LEN];     /* RFC 5489 2 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+    unsigned char _pms_ecjpake[32];     /* Thread spec: SHA-256 output */
+#endif
+};
+
+#define MBEDTLS_PREMASTER_SIZE     sizeof( union mbedtls_ssl_premaster_secret )
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * SSL state machine
+ */
+typedef enum
+{
+    MBEDTLS_SSL_HELLO_REQUEST,
+    MBEDTLS_SSL_CLIENT_HELLO,
+    MBEDTLS_SSL_SERVER_HELLO,
+    MBEDTLS_SSL_SERVER_CERTIFICATE,
+    MBEDTLS_SSL_SERVER_KEY_EXCHANGE,
+    MBEDTLS_SSL_CERTIFICATE_REQUEST,
+    MBEDTLS_SSL_SERVER_HELLO_DONE,
+    MBEDTLS_SSL_CLIENT_CERTIFICATE,
+    MBEDTLS_SSL_CLIENT_KEY_EXCHANGE,
+    MBEDTLS_SSL_CERTIFICATE_VERIFY,
+    MBEDTLS_SSL_CLIENT_CHANGE_CIPHER_SPEC,
+    MBEDTLS_SSL_CLIENT_FINISHED,
+    MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC,
+    MBEDTLS_SSL_SERVER_FINISHED,
+    MBEDTLS_SSL_FLUSH_BUFFERS,
+    MBEDTLS_SSL_HANDSHAKE_WRAPUP,
+    MBEDTLS_SSL_HANDSHAKE_OVER,
+    MBEDTLS_SSL_SERVER_NEW_SESSION_TICKET,
+    MBEDTLS_SSL_SERVER_HELLO_VERIFY_REQUEST_SENT,
+}
+mbedtls_ssl_states;
+
+/*
+ * The tls_prf function types.
+ */
+typedef enum
+{
+   MBEDTLS_SSL_TLS_PRF_NONE,
+   MBEDTLS_SSL_TLS_PRF_SSL3,
+   MBEDTLS_SSL_TLS_PRF_TLS1,
+   MBEDTLS_SSL_TLS_PRF_SHA384,
+   MBEDTLS_SSL_TLS_PRF_SHA256
+}
+mbedtls_tls_prf_types;
+/**
+ * \brief          Callback type: send data on the network.
+ *
+ * \note           That callback may be either blocking or non-blocking.
+ *
+ * \param ctx      Context for the send callback (typically a file descriptor)
+ * \param buf      Buffer holding the data to send
+ * \param len      Length of the data to send
+ *
+ * \return         The callback must return the number of bytes sent if any,
+ *                 or a non-zero error code.
+ *                 If performing non-blocking I/O, \c MBEDTLS_ERR_SSL_WANT_WRITE
+ *                 must be returned when the operation would block.
+ *
+ * \note           The callback is allowed to send fewer bytes than requested.
+ *                 It must always return the number of bytes actually sent.
+ */
+typedef int mbedtls_ssl_send_t( void *ctx,
+                                const unsigned char *buf,
+                                size_t len );
+
+/**
+ * \brief          Callback type: receive data from the network.
+ *
+ * \note           That callback may be either blocking or non-blocking.
+ *
+ * \param ctx      Context for the receive callback (typically a file
+ *                 descriptor)
+ * \param buf      Buffer to write the received data to
+ * \param len      Length of the receive buffer
+ *
+ * \returns        If data has been received, the positive number of bytes received.
+ * \returns        \c 0 if the connection has been closed.
+ * \returns        If performing non-blocking I/O, \c MBEDTLS_ERR_SSL_WANT_READ
+ *                 must be returned when the operation would block.
+ * \returns        Another negative error code on other kinds of failures.
+ *
+ * \note           The callback may receive fewer bytes than the length of the
+ *                 buffer. It must always return the number of bytes actually
+ *                 received and written to the buffer.
+ */
+typedef int mbedtls_ssl_recv_t( void *ctx,
+                                unsigned char *buf,
+                                size_t len );
+
+/**
+ * \brief          Callback type: receive data from the network, with timeout
+ *
+ * \note           That callback must block until data is received, or the
+ *                 timeout delay expires, or the operation is interrupted by a
+ *                 signal.
+ *
+ * \param ctx      Context for the receive callback (typically a file descriptor)
+ * \param buf      Buffer to write the received data to
+ * \param len      Length of the receive buffer
+ * \param timeout  Maximum nomber of millisecondes to wait for data
+ *                 0 means no timeout (potentially waiting forever)
+ *
+ * \return         The callback must return the number of bytes received,
+ *                 or a non-zero error code:
+ *                 \c MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out,
+ *                 \c MBEDTLS_ERR_SSL_WANT_READ if interrupted by a signal.
+ *
+ * \note           The callback may receive fewer bytes than the length of the
+ *                 buffer. It must always return the number of bytes actually
+ *                 received and written to the buffer.
+ */
+typedef int mbedtls_ssl_recv_timeout_t( void *ctx,
+                                        unsigned char *buf,
+                                        size_t len,
+                                        uint32_t timeout );
+/**
+ * \brief          Callback type: set a pair of timers/delays to watch
+ *
+ * \param ctx      Context pointer
+ * \param int_ms   Intermediate delay in milliseconds
+ * \param fin_ms   Final delay in milliseconds
+ *                 0 cancels the current timer.
+ *
+ * \note           This callback must at least store the necessary information
+ *                 for the associated \c mbedtls_ssl_get_timer_t callback to
+ *                 return correct information.
+ *
+ * \note           If using a event-driven style of programming, an event must
+ *                 be generated when the final delay is passed. The event must
+ *                 cause a call to \c mbedtls_ssl_handshake() with the proper
+ *                 SSL context to be scheduled. Care must be taken to ensure
+ *                 that at most one such call happens at a time.
+ *
+ * \note           Only one timer at a time must be running. Calling this
+ *                 function while a timer is running must cancel it. Cancelled
+ *                 timers must not generate any event.
+ */
+typedef void mbedtls_ssl_set_timer_t( void * ctx,
+                                      uint32_t int_ms,
+                                      uint32_t fin_ms );
+
+/**
+ * \brief          Callback type: get status of timers/delays
+ *
+ * \param ctx      Context pointer
+ *
+ * \return         This callback must return:
+ *                 -1 if cancelled (fin_ms == 0),
+ *                  0 if none of the delays have passed,
+ *                  1 if only the intermediate delay has passed,
+ *                  2 if the final delay has passed.
+ */
+typedef int mbedtls_ssl_get_timer_t( void * ctx );
+
+/* Defined below */
+typedef struct mbedtls_ssl_session mbedtls_ssl_session;
+typedef struct mbedtls_ssl_context mbedtls_ssl_context;
+typedef struct mbedtls_ssl_config  mbedtls_ssl_config;
+
+/* Defined in ssl_internal.h */
+typedef struct mbedtls_ssl_transform mbedtls_ssl_transform;
+typedef struct mbedtls_ssl_handshake_params mbedtls_ssl_handshake_params;
+typedef struct mbedtls_ssl_sig_hash_set_t mbedtls_ssl_sig_hash_set_t;
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+typedef struct mbedtls_ssl_key_cert mbedtls_ssl_key_cert;
+#endif
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+typedef struct mbedtls_ssl_flight_item mbedtls_ssl_flight_item;
+#endif
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief           Callback type: start external signature operation.
+ *
+ *                  This callback is called during an SSL handshake to start
+ *                  a signature decryption operation using an
+ *                  external processor. The parameter \p cert contains
+ *                  the public key; it is up to the callback function to
+ *                  determine how to access the associated private key.
+ *
+ *                  This function typically sends or enqueues a request, and
+ *                  does not wait for the operation to complete. This allows
+ *                  the handshake step to be non-blocking.
+ *
+ *                  The parameters \p ssl and \p cert are guaranteed to remain
+ *                  valid throughout the handshake. On the other hand, this
+ *                  function must save the contents of \p hash if the value
+ *                  is needed for later processing, because the \p hash buffer
+ *                  is no longer valid after this function returns.
+ *
+ *                  This function may call mbedtls_ssl_set_async_operation_data()
+ *                  to store an operation context for later retrieval
+ *                  by the resume or cancel callback.
+ *
+ * \note            For RSA signatures, this function must produce output
+ *                  that is consistent with PKCS#1 v1.5 in the same way as
+ *                  mbedtls_rsa_pkcs1_sign(). Before the private key operation,
+ *                  apply the padding steps described in RFC 8017, section 9.2
+ *                  "EMSA-PKCS1-v1_5" as follows.
+ *                  - If \p md_alg is #MBEDTLS_MD_NONE, apply the PKCS#1 v1.5
+ *                    encoding, treating \p hash as the DigestInfo to be
+ *                    padded. In other words, apply EMSA-PKCS1-v1_5 starting
+ *                    from step 3, with `T = hash` and `tLen = hash_len`.
+ *                  - If `md_alg != MBEDTLS_MD_NONE`, apply the PKCS#1 v1.5
+ *                    encoding, treating \p hash as the hash to be encoded and
+ *                    padded. In other words, apply EMSA-PKCS1-v1_5 starting
+ *                    from step 2, with `digestAlgorithm` obtained by calling
+ *                    mbedtls_oid_get_oid_by_md() on \p md_alg.
+ *
+ * \note            For ECDSA signatures, the output format is the DER encoding
+ *                  `Ecdsa-Sig-Value` defined in
+ *                  [RFC 4492 section 5.4](https://tools.ietf.org/html/rfc4492#section-5.4).
+ *
+ * \param ssl             The SSL connection instance. It should not be
+ *                        modified other than via
+ *                        mbedtls_ssl_set_async_operation_data().
+ * \param cert            Certificate containing the public key.
+ *                        In simple cases, this is one of the pointers passed to
+ *                        mbedtls_ssl_conf_own_cert() when configuring the SSL
+ *                        connection. However, if other callbacks are used, this
+ *                        property may not hold. For example, if an SNI callback
+ *                        is registered with mbedtls_ssl_conf_sni(), then
+ *                        this callback determines what certificate is used.
+ * \param md_alg          Hash algorithm.
+ * \param hash            Buffer containing the hash. This buffer is
+ *                        no longer valid when the function returns.
+ * \param hash_len        Size of the \c hash buffer in bytes.
+ *
+ * \return          0 if the operation was started successfully and the SSL
+ *                  stack should call the resume callback immediately.
+ * \return          #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if the operation
+ *                  was started successfully and the SSL stack should return
+ *                  immediately without calling the resume callback yet.
+ * \return          #MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH if the external
+ *                  processor does not support this key. The SSL stack will
+ *                  use the private key object instead.
+ * \return          Any other error indicates a fatal failure and is
+ *                  propagated up the call chain. The callback should
+ *                  use \c MBEDTLS_ERR_PK_xxx error codes, and <b>must not</b>
+ *                  use \c MBEDTLS_ERR_SSL_xxx error codes except as
+ *                  directed in the documentation of this callback.
+ */
+typedef int mbedtls_ssl_async_sign_t( mbedtls_ssl_context *ssl,
+                                      mbedtls_x509_crt *cert,
+                                      mbedtls_md_type_t md_alg,
+                                      const unsigned char *hash,
+                                      size_t hash_len );
+
+/**
+ * \brief           Callback type: start external decryption operation.
+ *
+ *                  This callback is called during an SSL handshake to start
+ *                  an RSA decryption operation using an
+ *                  external processor. The parameter \p cert contains
+ *                  the public key; it is up to the callback function to
+ *                  determine how to access the associated private key.
+ *
+ *                  This function typically sends or enqueues a request, and
+ *                  does not wait for the operation to complete. This allows
+ *                  the handshake step to be non-blocking.
+ *
+ *                  The parameters \p ssl and \p cert are guaranteed to remain
+ *                  valid throughout the handshake. On the other hand, this
+ *                  function must save the contents of \p input if the value
+ *                  is needed for later processing, because the \p input buffer
+ *                  is no longer valid after this function returns.
+ *
+ *                  This function may call mbedtls_ssl_set_async_operation_data()
+ *                  to store an operation context for later retrieval
+ *                  by the resume or cancel callback.
+ *
+ * \warning         RSA decryption as used in TLS is subject to a potential
+ *                  timing side channel attack first discovered by Bleichenbacher
+ *                  in 1998. This attack can be remotely exploitable
+ *                  in practice. To avoid this attack, you must ensure that
+ *                  if the callback performs an RSA decryption, the time it
+ *                  takes to execute and return the result does not depend
+ *                  on whether the RSA decryption succeeded or reported
+ *                  invalid padding.
+ *
+ * \param ssl             The SSL connection instance. It should not be
+ *                        modified other than via
+ *                        mbedtls_ssl_set_async_operation_data().
+ * \param cert            Certificate containing the public key.
+ *                        In simple cases, this is one of the pointers passed to
+ *                        mbedtls_ssl_conf_own_cert() when configuring the SSL
+ *                        connection. However, if other callbacks are used, this
+ *                        property may not hold. For example, if an SNI callback
+ *                        is registered with mbedtls_ssl_conf_sni(), then
+ *                        this callback determines what certificate is used.
+ * \param input           Buffer containing the input ciphertext. This buffer
+ *                        is no longer valid when the function returns.
+ * \param input_len       Size of the \p input buffer in bytes.
+ *
+ * \return          0 if the operation was started successfully and the SSL
+ *                  stack should call the resume callback immediately.
+ * \return          #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if the operation
+ *                  was started successfully and the SSL stack should return
+ *                  immediately without calling the resume callback yet.
+ * \return          #MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH if the external
+ *                  processor does not support this key. The SSL stack will
+ *                  use the private key object instead.
+ * \return          Any other error indicates a fatal failure and is
+ *                  propagated up the call chain. The callback should
+ *                  use \c MBEDTLS_ERR_PK_xxx error codes, and <b>must not</b>
+ *                  use \c MBEDTLS_ERR_SSL_xxx error codes except as
+ *                  directed in the documentation of this callback.
+ */
+typedef int mbedtls_ssl_async_decrypt_t( mbedtls_ssl_context *ssl,
+                                         mbedtls_x509_crt *cert,
+                                         const unsigned char *input,
+                                         size_t input_len );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+/**
+ * \brief           Callback type: resume external operation.
+ *
+ *                  This callback is called during an SSL handshake to resume
+ *                  an external operation started by the
+ *                  ::mbedtls_ssl_async_sign_t or
+ *                  ::mbedtls_ssl_async_decrypt_t callback.
+ *
+ *                  This function typically checks the status of a pending
+ *                  request or causes the request queue to make progress, and
+ *                  does not wait for the operation to complete. This allows
+ *                  the handshake step to be non-blocking.
+ *
+ *                  This function may call mbedtls_ssl_get_async_operation_data()
+ *                  to retrieve an operation context set by the start callback.
+ *                  It may call mbedtls_ssl_set_async_operation_data() to modify
+ *                  this context.
+ *
+ *                  Note that when this function returns a status other than
+ *                  #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS, it must free any
+ *                  resources associated with the operation.
+ *
+ * \param ssl             The SSL connection instance. It should not be
+ *                        modified other than via
+ *                        mbedtls_ssl_set_async_operation_data().
+ * \param output          Buffer containing the output (signature or decrypted
+ *                        data) on success.
+ * \param output_len      On success, number of bytes written to \p output.
+ * \param output_size     Size of the \p output buffer in bytes.
+ *
+ * \return          0 if output of the operation is available in the
+ *                  \p output buffer.
+ * \return          #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if the operation
+ *                  is still in progress. Subsequent requests for progress
+ *                  on the SSL connection will call the resume callback
+ *                  again.
+ * \return          Any other error means that the operation is aborted.
+ *                  The SSL handshake is aborted. The callback should
+ *                  use \c MBEDTLS_ERR_PK_xxx error codes, and <b>must not</b>
+ *                  use \c MBEDTLS_ERR_SSL_xxx error codes except as
+ *                  directed in the documentation of this callback.
+ */
+typedef int mbedtls_ssl_async_resume_t( mbedtls_ssl_context *ssl,
+                                        unsigned char *output,
+                                        size_t *output_len,
+                                        size_t output_size );
+
+/**
+ * \brief           Callback type: cancel external operation.
+ *
+ *                  This callback is called if an SSL connection is closed
+ *                  while an asynchronous operation is in progress. Note that
+ *                  this callback is not called if the
+ *                  ::mbedtls_ssl_async_resume_t callback has run and has
+ *                  returned a value other than
+ *                  #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS, since in that case
+ *                  the asynchronous operation has already completed.
+ *
+ *                  This function may call mbedtls_ssl_get_async_operation_data()
+ *                  to retrieve an operation context set by the start callback.
+ *
+ * \param ssl             The SSL connection instance. It should not be
+ *                        modified.
+ */
+typedef void mbedtls_ssl_async_cancel_t( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_MAX_LEN  48
+#if defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA256
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  32
+#elif defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA384
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  48
+#elif defined(MBEDTLS_SHA1_C)
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_TYPE MBEDTLS_MD_SHA1
+#define MBEDTLS_SSL_PEER_CERT_DIGEST_DFL_LEN  20
+#else
+/* This is already checked in check_config.h, but be sure. */
+#error "Bad configuration - need SHA-1, SHA-256 or SHA-512 enabled to compute digest of peer CRT."
+#endif
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED &&
+          !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+
+#define MBEDTLS_TLS_SRTP_MAX_MKI_LENGTH             255
+#define MBEDTLS_TLS_SRTP_MAX_PROFILE_LIST_LENGTH    4
+/*
+ * For code readability use a typedef for DTLS-SRTP profiles
+ *
+ * Use_srtp extension protection profiles values as defined in
+ * http://www.iana.org/assignments/srtp-protection/srtp-protection.xhtml
+ *
+ * Reminder: if this list is expanded mbedtls_ssl_check_srtp_profile_value
+ * must be updated too.
+ */
+#define MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80     ( (uint16_t) 0x0001)
+#define MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32     ( (uint16_t) 0x0002)
+#define MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80          ( (uint16_t) 0x0005)
+#define MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32          ( (uint16_t) 0x0006)
+/* This one is not iana defined, but for code readability. */
+#define MBEDTLS_TLS_SRTP_UNSET                      ( (uint16_t) 0x0000)
+
+typedef uint16_t mbedtls_ssl_srtp_profile;
+
+typedef struct mbedtls_dtls_srtp_info_t
+{
+    /*! The SRTP profile that was negotiated. */
+    mbedtls_ssl_srtp_profile chosen_dtls_srtp_profile;
+    /*! The length of mki_value. */
+    uint16_t mki_len;
+    /*! The mki_value used, with max size of 256 bytes. */
+    unsigned char mki_value[MBEDTLS_TLS_SRTP_MAX_MKI_LENGTH];
+}
+mbedtls_dtls_srtp_info;
+
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
+/*
+ * This structure is used for storing current session data.
+ *
+ * Note: when changing this definition, we need to check and update:
+ *  - in tests/suites/test_suite_ssl.function:
+ *      ssl_populate_session() and ssl_serialize_session_save_load()
+ *  - in library/ssl_tls.c:
+ *      mbedtls_ssl_session_init() and mbedtls_ssl_session_free()
+ *      mbedtls_ssl_session_save() and ssl_session_load()
+ *      ssl_session_copy()
+ */
+struct mbedtls_ssl_session
+{
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+    unsigned char mfl_code;     /*!< MaxFragmentLength negotiated by peer */
+#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
+
+#if defined(MBEDTLS_HAVE_TIME)
+    mbedtls_time_t start;       /*!< starting time      */
+#endif
+    int ciphersuite;            /*!< chosen ciphersuite */
+    int compression;            /*!< chosen compression */
+    size_t id_len;              /*!< session id length  */
+    unsigned char id[32];       /*!< session identifier */
+    unsigned char master[48];   /*!< the master secret  */
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+#if defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+    mbedtls_x509_crt *peer_cert;       /*!< peer X.509 cert chain */
+#else /* MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
+    /*! The digest of the peer's end-CRT. This must be kept to detect CRT
+     *  changes during renegotiation, mitigating the triple handshake attack. */
+    unsigned char *peer_cert_digest;
+    size_t peer_cert_digest_len;
+    mbedtls_md_type_t peer_cert_digest_type;
+#endif /* !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+    uint32_t verify_result;          /*!<  verification result     */
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_CLI_C)
+    unsigned char *ticket;      /*!< RFC 5077 session ticket */
+    size_t ticket_len;          /*!< session ticket length   */
+    uint32_t ticket_lifetime;   /*!< ticket lifetime hint    */
+#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_CLI_C */
+
+#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
+    int trunc_hmac;             /*!< flag for truncated hmac activation   */
+#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */
+
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+    int encrypt_then_mac;       /*!< flag for EtM activation                */
+#endif
+};
+
+/**
+ * SSL/TLS configuration to be shared between mbedtls_ssl_context structures.
+ */
+struct mbedtls_ssl_config
+{
+    /* Group items by size and reorder them to maximize usage of immediate offset access.    */
+
+    /*
+     * Numerical settings (char)
+     */
+
+    unsigned char max_major_ver;    /*!< max. major version used            */
+    unsigned char max_minor_ver;    /*!< max. minor version used            */
+    unsigned char min_major_ver;    /*!< min. major version used            */
+    unsigned char min_minor_ver;    /*!< min. minor version used            */
+
+    /*
+     * Flags (could be bit-fields to save RAM, but separate bytes make
+     * the code smaller on architectures with an instruction for direct
+     * byte access).
+     */
+
+    uint8_t endpoint /*bool*/;      /*!< 0: client, 1: server               */
+    uint8_t transport /*bool*/;     /*!< stream (TLS) or datagram (DTLS)    */
+    uint8_t authmode /*2 bits*/;    /*!< MBEDTLS_SSL_VERIFY_XXX             */
+    /* needed even with renego disabled for LEGACY_BREAK_HANDSHAKE          */
+    uint8_t allow_legacy_renegotiation /*2 bits*/; /*!< MBEDTLS_LEGACY_XXX  */
+#if defined(MBEDTLS_ARC4_C)
+    uint8_t arc4_disabled /*bool*/; /*!< blacklist RC4 ciphersuites?        */
+#endif
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+    uint8_t mfl_code /*3 bits*/;    /*!< desired fragment length            */
+#endif
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+    uint8_t encrypt_then_mac /*bool*/;  /*!< negotiate encrypt-then-mac?    */
+#endif
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+    uint8_t extended_ms /*bool*/;   /*!< negotiate extended master secret?  */
+#endif
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+    uint8_t anti_replay /*bool*/;   /*!< detect and prevent replay?         */
+#endif
+#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
+    uint8_t cbc_record_splitting /*bool*/;  /*!< do cbc record splitting    */
+#endif
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+    uint8_t disable_renegotiation /*bool*/; /*!< disable renegotiation?     */
+#endif
+#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
+    uint8_t trunc_hmac /*bool*/;    /*!< negotiate truncated hmac?          */
+#endif
+#if defined(MBEDTLS_SSL_SESSION_TICKETS)
+    uint8_t session_tickets /*bool*/;   /*!< use session tickets?           */
+#endif
+#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C)
+    uint8_t fallback /*bool*/;      /*!< is this a fallback?                */
+#endif
+#if defined(MBEDTLS_SSL_SRV_C)
+    uint8_t cert_req_ca_list /*bool*/;  /*!< enable sending CA list in
+                                          Certificate Request messages?     */
+#endif
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t ignore_unexpected_cid /*bool*/; /*!< Determines whether DTLS
+                                             *   record with unexpected CID
+                                             *   should lead to failure.    */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    uint8_t dtls_srtp_mki_support /*bool*/; /*!< support having mki_value
+                                                 in the use_srtp extension? */
+#endif
+
+    /*
+     * Numerical settings (int or larger)
+     */
+
+    uint32_t read_timeout;          /*!< timeout for mbedtls_ssl_read (ms)  */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    uint32_t hs_timeout_min;        /*!< initial value of the handshake
+                                         retransmission timeout (ms)        */
+    uint32_t hs_timeout_max;        /*!< maximum value of the handshake
+                                         retransmission timeout (ms)        */
+#endif
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+    int renego_max_records;         /*!< grace period for renegotiation     */
+    unsigned char renego_period[8]; /*!< value of the record counters
+                                         that triggers renegotiation        */
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
+    unsigned int badmac_limit;      /*!< limit of records with a bad MAC    */
+#endif
+
+#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C)
+    unsigned int dhm_min_bitlen;    /*!< min. bit length of the DHM prime   */
+#endif
+
+    /*
+     * Pointers
+     */
+
+    const int *ciphersuite_list[4]; /*!< allowed ciphersuites per version   */
+
+    /** Callback for printing debug output                                  */
+    void (*f_dbg)(void *, int, const char *, int, const char *);
+    void *p_dbg;                    /*!< context for the debug function     */
+
+    /** Callback for getting (pseudo-)random numbers                        */
+    int  (*f_rng)(void *, unsigned char *, size_t);
+    void *p_rng;                    /*!< context for the RNG function       */
+
+    /** Callback to retrieve a session from the cache                       */
+    int (*f_get_cache)(void *, mbedtls_ssl_session *);
+    /** Callback to store a session into the cache                          */
+    int (*f_set_cache)(void *, const mbedtls_ssl_session *);
+    void *p_cache;                  /*!< context for cache callbacks        */
+
+#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
+    /** Callback for setting cert according to SNI extension                */
+    int (*f_sni)(void *, mbedtls_ssl_context *, const unsigned char *, size_t);
+    void *p_sni;                    /*!< context for SNI callback           */
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+    /** Callback to customize X.509 certificate chain verification          */
+    int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *);
+    void *p_vrfy;                   /*!< context for X.509 verify calllback */
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
+    /** Callback to retrieve PSK key from identity                          */
+    int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *, size_t);
+    void *p_psk;                    /*!< context for PSK callback           */
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C)
+    /** Callback to create & write a cookie for ClientHello veirifcation    */
+    int (*f_cookie_write)( void *, unsigned char **, unsigned char *,
+                           const unsigned char *, size_t );
+    /** Callback to verify validity of a ClientHello cookie                 */
+    int (*f_cookie_check)( void *, const unsigned char *, size_t,
+                           const unsigned char *, size_t );
+    void *p_cookie;                 /*!< context for the cookie callbacks   */
+#endif
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_SRV_C)
+    /** Callback to create & write a session ticket                         */
+    int (*f_ticket_write)( void *, const mbedtls_ssl_session *,
+            unsigned char *, const unsigned char *, size_t *, uint32_t * );
+    /** Callback to parse a session ticket into a session structure         */
+    int (*f_ticket_parse)( void *, mbedtls_ssl_session *, unsigned char *, size_t);
+    void *p_ticket;                 /*!< context for the ticket callbacks   */
+#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_SRV_C */
+
+#if defined(MBEDTLS_SSL_EXPORT_KEYS)
+    /** Callback to export key block and master secret                      */
+    int (*f_export_keys)( void *, const unsigned char *,
+            const unsigned char *, size_t, size_t, size_t );
+    /** Callback to export key block, master secret,
+     *  tls_prf and random bytes. Should replace f_export_keys    */
+    int (*f_export_keys_ext)( void *, const unsigned char *,
+                const unsigned char *, size_t, size_t, size_t,
+                const unsigned char[32], const unsigned char[32],
+                mbedtls_tls_prf_types );
+    void *p_export_keys;            /*!< context for key export callback    */
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    size_t cid_len; /*!< The length of CIDs for incoming DTLS records.      */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+    const mbedtls_x509_crt_profile *cert_profile; /*!< verification profile */
+    mbedtls_ssl_key_cert *key_cert; /*!< own certificate/key pair(s)        */
+    mbedtls_x509_crt *ca_chain;     /*!< trusted CAs                        */
+    mbedtls_x509_crl *ca_crl;       /*!< trusted CAs CRLs                   */
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+    mbedtls_x509_crt_ca_cb_t f_ca_cb;
+    void *p_ca_cb;
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+    mbedtls_ssl_async_sign_t *f_async_sign_start; /*!< start asynchronous signature operation */
+    mbedtls_ssl_async_decrypt_t *f_async_decrypt_start; /*!< start asynchronous decryption operation */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+    mbedtls_ssl_async_resume_t *f_async_resume; /*!< resume asynchronous operation */
+    mbedtls_ssl_async_cancel_t *f_async_cancel; /*!< cancel asynchronous operation */
+    void *p_async_config_data; /*!< Configuration data set by mbedtls_ssl_conf_async_private_cb(). */
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
+    const int *sig_hashes;          /*!< allowed signature hashes           */
+#endif
+
+#if defined(MBEDTLS_ECP_C)
+    const mbedtls_ecp_group_id *curve_list; /*!< allowed curves             */
+#endif
+
+#if defined(MBEDTLS_DHM_C)
+    mbedtls_mpi dhm_P;              /*!< prime modulus for DHM              */
+    mbedtls_mpi dhm_G;              /*!< generator for DHM                  */
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_id_t psk_opaque; /*!< PSA key slot holding opaque PSK. This field
+                              *   should only be set via
+                              *   mbedtls_ssl_conf_psk_opaque().
+                              *   If either no PSK or a raw PSK have been
+                              *   configured, this has value \c 0.
+                              */
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+    unsigned char *psk;      /*!< The raw pre-shared key. This field should
+                              *   only be set via mbedtls_ssl_conf_psk().
+                              *   If either no PSK or an opaque PSK
+                              *   have been configured, this has value NULL. */
+    size_t         psk_len;  /*!< The length of the raw pre-shared key.
+                              *   This field should only be set via
+                              *   mbedtls_ssl_conf_psk().
+                              *   Its value is non-zero if and only if
+                              *   \c psk is not \c NULL. */
+
+    unsigned char *psk_identity;    /*!< The PSK identity for PSK negotiation.
+                                     *   This field should only be set via
+                                     *   mbedtls_ssl_conf_psk().
+                                     *   This is set if and only if either
+                                     *   \c psk or \c psk_opaque are set. */
+    size_t         psk_identity_len;/*!< The length of PSK identity.
+                                     *   This field should only be set via
+                                     *   mbedtls_ssl_conf_psk().
+                                     *   Its value is non-zero if and only if
+                                     *   \c psk is not \c NULL or \c psk_opaque
+                                     *   is not \c 0. */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
+
+#if defined(MBEDTLS_SSL_ALPN)
+    const char **alpn_list;         /*!< ordered list of protocols          */
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    /*! ordered list of supported srtp profile */
+    const mbedtls_ssl_srtp_profile *dtls_srtp_profile_list;
+    /*! number of supported profiles */
+    size_t dtls_srtp_profile_list_len;
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+};
+
+struct mbedtls_ssl_context
+{
+    const mbedtls_ssl_config *conf; /*!< configuration information          */
+
+    /*
+     * Miscellaneous
+     */
+    int state;                  /*!< SSL handshake: current state     */
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+    int renego_status;          /*!< Initial, in progress, pending?   */
+    int renego_records_seen;    /*!< Records since renego request, or with DTLS,
+                                  number of retransmissions of request if
+                                  renego_max_records is < 0           */
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+    int major_ver;              /*!< equal to  MBEDTLS_SSL_MAJOR_VERSION_3    */
+    int minor_ver;              /*!< either 0 (SSL3) or 1 (TLS1.0)    */
+
+#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
+    unsigned badmac_seen;       /*!< records with a bad MAC received    */
+#endif /* MBEDTLS_SSL_DTLS_BADMAC_LIMIT */
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+    /** Callback to customize X.509 certificate chain verification          */
+    int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *);
+    void *p_vrfy;                   /*!< context for X.509 verify callback */
+#endif
+
+    mbedtls_ssl_send_t *f_send; /*!< Callback for network send */
+    mbedtls_ssl_recv_t *f_recv; /*!< Callback for network receive */
+    mbedtls_ssl_recv_timeout_t *f_recv_timeout;
+                                /*!< Callback for network receive with timeout */
+
+    void *p_bio;                /*!< context for I/O operations   */
+
+    /*
+     * Session layer
+     */
+    mbedtls_ssl_session *session_in;            /*!<  current session data (in)   */
+    mbedtls_ssl_session *session_out;           /*!<  current session data (out)  */
+    mbedtls_ssl_session *session;               /*!<  negotiated session data     */
+    mbedtls_ssl_session *session_negotiate;     /*!<  session data in negotiation */
+
+    mbedtls_ssl_handshake_params *handshake;    /*!<  params required only during
+                                              the handshake process        */
+
+    /*
+     * Record layer transformations
+     */
+    mbedtls_ssl_transform *transform_in;        /*!<  current transform params (in)   */
+    mbedtls_ssl_transform *transform_out;       /*!<  current transform params (in)   */
+    mbedtls_ssl_transform *transform;           /*!<  negotiated transform params     */
+    mbedtls_ssl_transform *transform_negotiate; /*!<  transform params in negotiation */
+
+    /*
+     * Timers
+     */
+    void *p_timer;              /*!< context for the timer callbacks */
+
+    mbedtls_ssl_set_timer_t *f_set_timer;       /*!< set timer callback */
+    mbedtls_ssl_get_timer_t *f_get_timer;       /*!< get timer callback */
+
+    /*
+     * Record layer (incoming data)
+     */
+    unsigned char *in_buf;      /*!< input buffer                     */
+    unsigned char *in_ctr;      /*!< 64-bit incoming message counter
+                                     TLS: maintained by us
+                                     DTLS: read from peer             */
+    unsigned char *in_hdr;      /*!< start of record header           */
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    unsigned char *in_cid;      /*!< The start of the CID;
+                                 *   (the end is marked by in_len).   */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+    unsigned char *in_len;      /*!< two-bytes message length field   */
+    unsigned char *in_iv;       /*!< ivlen-byte IV                    */
+    unsigned char *in_msg;      /*!< message contents (in_iv+ivlen)   */
+    unsigned char *in_offt;     /*!< read offset in application data  */
+
+    int in_msgtype;             /*!< record header: message type      */
+    size_t in_msglen;           /*!< record header: message length    */
+    size_t in_left;             /*!< amount of data read so far       */
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+    size_t in_buf_len;          /*!< length of input buffer           */
+#endif
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    uint16_t in_epoch;          /*!< DTLS epoch for incoming records  */
+    size_t next_record_offset;  /*!< offset of the next record in datagram
+                                     (equal to in_left if none)       */
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+    uint64_t in_window_top;     /*!< last validated record seq_num    */
+    uint64_t in_window;         /*!< bitmask for replay detection     */
+#endif /* MBEDTLS_SSL_DTLS_ANTI_REPLAY */
+
+    size_t in_hslen;            /*!< current handshake message length,
+                                     including the handshake header   */
+    int nb_zero;                /*!< # of 0-length encrypted messages */
+
+    int keep_current_message;   /*!< drop or reuse current message
+                                     on next call to record layer? */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    uint8_t disable_datagram_packing;  /*!< Disable packing multiple records
+                                        *   within a single datagram.  */
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+    /*
+     * Record layer (outgoing data)
+     */
+    unsigned char *out_buf;     /*!< output buffer                    */
+    unsigned char *out_ctr;     /*!< 64-bit outgoing message counter  */
+    unsigned char *out_hdr;     /*!< start of record header           */
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    unsigned char *out_cid;     /*!< The start of the CID;
+                                 *   (the end is marked by in_len).   */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+    unsigned char *out_len;     /*!< two-bytes message length field   */
+    unsigned char *out_iv;      /*!< ivlen-byte IV                    */
+    unsigned char *out_msg;     /*!< message contents (out_iv+ivlen)  */
+
+    int out_msgtype;            /*!< record header: message type      */
+    size_t out_msglen;          /*!< record header: message length    */
+    size_t out_left;            /*!< amount of data not yet written   */
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+    size_t out_buf_len;         /*!< length of output buffer          */
+#endif
+
+    unsigned char cur_out_ctr[8]; /*!<  Outgoing record sequence  number. */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    uint16_t mtu;               /*!< path mtu, used to fragment outgoing messages */
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+#if defined(MBEDTLS_ZLIB_SUPPORT)
+    unsigned char *compress_buf;        /*!<  zlib data buffer        */
+#endif /* MBEDTLS_ZLIB_SUPPORT */
+#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
+    signed char split_done;     /*!< current record already splitted? */
+#endif /* MBEDTLS_SSL_CBC_RECORD_SPLITTING */
+
+    /*
+     * PKI layer
+     */
+    int client_auth;                    /*!<  flag for client auth.   */
+
+    /*
+     * User settings
+     */
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+    char *hostname;             /*!< expected peer CN for verification
+                                     (and SNI if available)                 */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_SSL_ALPN)
+    const char *alpn_chosen;    /*!<  negotiated protocol                   */
+#endif /* MBEDTLS_SSL_ALPN */
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+    /*
+     * use_srtp extension
+     */
+    mbedtls_dtls_srtp_info dtls_srtp_info;
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
+    /*
+     * Information for DTLS hello verify
+     */
+#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C)
+    unsigned char  *cli_id;         /*!<  transport-level ID of the client  */
+    size_t          cli_id_len;     /*!<  length of cli_id                  */
+#endif /* MBEDTLS_SSL_DTLS_HELLO_VERIFY && MBEDTLS_SSL_SRV_C */
+
+    /*
+     * Secure renegotiation
+     */
+    /* needed to know when to send extension on server */
+    int secure_renegotiation;           /*!<  does peer support legacy or
+                                              secure renegotiation           */
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+    size_t verify_data_len;             /*!<  length of verify data stored   */
+    char own_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!<  previous handshake verify data */
+    char peer_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!<  previous handshake verify data */
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    /* CID configuration to use in subsequent handshakes. */
+
+    /*! The next incoming CID, chosen by the user and applying to
+     *  all subsequent handshakes. This may be different from the
+     *  CID currently used in case the user has re-configured the CID
+     *  after an initial handshake. */
+    unsigned char own_cid[ MBEDTLS_SSL_CID_IN_LEN_MAX ];
+    uint8_t own_cid_len;   /*!< The length of \c own_cid. */
+    uint8_t negotiate_cid; /*!< This indicates whether the CID extension should
+                            *   be negotiated in the next handshake or not.
+                            *   Possible values are #MBEDTLS_SSL_CID_ENABLED
+                            *   and #MBEDTLS_SSL_CID_DISABLED. */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+};
+
+#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL)
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#define MBEDTLS_SSL_CHANNEL_OUTBOUND   MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( 0 )
+#define MBEDTLS_SSL_CHANNEL_INBOUND    MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( 1 )
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED      __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_WARNING */
+
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_init)(
+                    mbedtls_ssl_context *ssl,
+                    const unsigned char *key_enc, const unsigned char *key_dec,
+                    size_t keylen,
+                    const unsigned char *iv_enc,  const unsigned char *iv_dec,
+                    size_t ivlen,
+                    const unsigned char *mac_enc, const unsigned char *mac_dec,
+                    size_t maclen);
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_activate)(
+                                                    mbedtls_ssl_context *ssl,
+                                                    int direction );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_reset)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_write)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_read)(
+                                                    mbedtls_ssl_context *ssl );
+MBEDTLS_DEPRECATED extern int (*mbedtls_ssl_hw_record_finish)(
+                                                    mbedtls_ssl_context *ssl );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */
+
+/**
+ * \brief               Return the name of the ciphersuite associated with the
+ *                      given ID
+ *
+ * \param ciphersuite_id SSL ciphersuite ID
+ *
+ * \return              a string containing the ciphersuite name
+ */
+const char *mbedtls_ssl_get_ciphersuite_name( const int ciphersuite_id );
+
+/**
+ * \brief               Return the ID of the ciphersuite associated with the
+ *                      given name
+ *
+ * \param ciphersuite_name SSL ciphersuite name
+ *
+ * \return              the ID with the ciphersuite or 0 if not found
+ */
+int mbedtls_ssl_get_ciphersuite_id( const char *ciphersuite_name );
+
+/**
+ * \brief          Initialize an SSL context
+ *                 Just makes the context ready for mbedtls_ssl_setup() or
+ *                 mbedtls_ssl_free()
+ *
+ * \param ssl      SSL context
+ */
+void mbedtls_ssl_init( mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Set up an SSL context for use
+ *
+ * \note           No copy of the configuration context is made, it can be
+ *                 shared by many mbedtls_ssl_context structures.
+ *
+ * \warning        The conf structure will be accessed during the session.
+ *                 It must not be modified or freed as long as the session
+ *                 is active.
+ *
+ * \warning        This function must be called exactly once per context.
+ *                 Calling mbedtls_ssl_setup again is not supported, even
+ *                 if no session is active.
+ *
+ * \param ssl      SSL context
+ * \param conf     SSL configuration to use
+ *
+ * \return         0 if successful, or MBEDTLS_ERR_SSL_ALLOC_FAILED if
+ *                 memory allocation failed
+ */
+int mbedtls_ssl_setup( mbedtls_ssl_context *ssl,
+                       const mbedtls_ssl_config *conf );
+
+/**
+ * \brief          Reset an already initialized SSL context for re-use
+ *                 while retaining application-set variables, function
+ *                 pointers and data.
+ *
+ * \param ssl      SSL context
+ * \return         0 if successful, or MBEDTLS_ERR_SSL_ALLOC_FAILED,
+                   MBEDTLS_ERR_SSL_HW_ACCEL_FAILED or
+ *                 MBEDTLS_ERR_SSL_COMPRESSION_FAILED
+ */
+int mbedtls_ssl_session_reset( mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Set the current endpoint type
+ *
+ * \param conf     SSL configuration
+ * \param endpoint must be MBEDTLS_SSL_IS_CLIENT or MBEDTLS_SSL_IS_SERVER
+ */
+void mbedtls_ssl_conf_endpoint( mbedtls_ssl_config *conf, int endpoint );
+
+/**
+ * \brief           Set the transport type (TLS or DTLS).
+ *                  Default: TLS
+ *
+ * \note            For DTLS, you must either provide a recv callback that
+ *                  doesn't block, or one that handles timeouts, see
+ *                  \c mbedtls_ssl_set_bio(). You also need to provide timer
+ *                  callbacks with \c mbedtls_ssl_set_timer_cb().
+ *
+ * \param conf      SSL configuration
+ * \param transport transport type:
+ *                  MBEDTLS_SSL_TRANSPORT_STREAM for TLS,
+ *                  MBEDTLS_SSL_TRANSPORT_DATAGRAM for DTLS.
+ */
+void mbedtls_ssl_conf_transport( mbedtls_ssl_config *conf, int transport );
+
+/**
+ * \brief          Set the certificate verification mode
+ *                 Default: NONE on server, REQUIRED on client
+ *
+ * \param conf     SSL configuration
+ * \param authmode can be:
+ *
+ *  MBEDTLS_SSL_VERIFY_NONE:      peer certificate is not checked
+ *                        (default on server)
+ *                        (insecure on client)
+ *
+ *  MBEDTLS_SSL_VERIFY_OPTIONAL:  peer certificate is checked, however the
+ *                        handshake continues even if verification failed;
+ *                        mbedtls_ssl_get_verify_result() can be called after the
+ *                        handshake is complete.
+ *
+ *  MBEDTLS_SSL_VERIFY_REQUIRED:  peer *must* present a valid certificate,
+ *                        handshake is aborted if verification failed.
+ *                        (default on client)
+ *
+ * \note On client, MBEDTLS_SSL_VERIFY_REQUIRED is the recommended mode.
+ * With MBEDTLS_SSL_VERIFY_OPTIONAL, the user needs to call mbedtls_ssl_get_verify_result() at
+ * the right time(s), which may not be obvious, while REQUIRED always perform
+ * the verification as soon as possible. For example, REQUIRED was protecting
+ * against the "triple handshake" attack even before it was found.
+ */
+void mbedtls_ssl_conf_authmode( mbedtls_ssl_config *conf, int authmode );
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief          Set the verification callback (Optional).
+ *
+ *                 If set, the provided verify callback is called for each
+ *                 certificate in the peer's CRT chain, including the trusted
+ *                 root. For more information, please see the documentation of
+ *                 \c mbedtls_x509_crt_verify().
+ *
+ * \note           For per context callbacks and contexts, please use
+ *                 mbedtls_ssl_set_verify() instead.
+ *
+ * \param conf     The SSL configuration to use.
+ * \param f_vrfy   The verification callback to use during CRT verification.
+ * \param p_vrfy   The opaque context to be passed to the callback.
+ */
+void mbedtls_ssl_conf_verify( mbedtls_ssl_config *conf,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+/**
+ * \brief          Set the random number generator callback
+ *
+ * \param conf     SSL configuration
+ * \param f_rng    RNG function
+ * \param p_rng    RNG parameter
+ */
+void mbedtls_ssl_conf_rng( mbedtls_ssl_config *conf,
+                  int (*f_rng)(void *, unsigned char *, size_t),
+                  void *p_rng );
+
+/**
+ * \brief          Set the debug callback
+ *
+ *                 The callback has the following argument:
+ *                 void *           opaque context for the callback
+ *                 int              debug level
+ *                 const char *     file name
+ *                 int              line number
+ *                 const char *     message
+ *
+ * \param conf     SSL configuration
+ * \param f_dbg    debug function
+ * \param p_dbg    debug parameter
+ */
+void mbedtls_ssl_conf_dbg( mbedtls_ssl_config *conf,
+                  void (*f_dbg)(void *, int, const char *, int, const char *),
+                  void  *p_dbg );
+
+/**
+ * \brief          Set the underlying BIO callbacks for write, read and
+ *                 read-with-timeout.
+ *
+ * \param ssl      SSL context
+ * \param p_bio    parameter (context) shared by BIO callbacks
+ * \param f_send   write callback
+ * \param f_recv   read callback
+ * \param f_recv_timeout blocking read callback with timeout.
+ *
+ * \note           One of f_recv or f_recv_timeout can be NULL, in which case
+ *                 the other is used. If both are non-NULL, f_recv_timeout is
+ *                 used and f_recv is ignored (as if it were NULL).
+ *
+ * \note           The two most common use cases are:
+ *                 - non-blocking I/O, f_recv != NULL, f_recv_timeout == NULL
+ *                 - blocking I/O, f_recv == NULL, f_recv_timout != NULL
+ *
+ * \note           For DTLS, you need to provide either a non-NULL
+ *                 f_recv_timeout callback, or a f_recv that doesn't block.
+ *
+ * \note           See the documentations of \c mbedtls_ssl_send_t,
+ *                 \c mbedtls_ssl_recv_t and \c mbedtls_ssl_recv_timeout_t for
+ *                 the conventions those callbacks must follow.
+ *
+ * \note           On some platforms, net_sockets.c provides
+ *                 \c mbedtls_net_send(), \c mbedtls_net_recv() and
+ *                 \c mbedtls_net_recv_timeout() that are suitable to be used
+ *                 here.
+ */
+void mbedtls_ssl_set_bio( mbedtls_ssl_context *ssl,
+                          void *p_bio,
+                          mbedtls_ssl_send_t *f_send,
+                          mbedtls_ssl_recv_t *f_recv,
+                          mbedtls_ssl_recv_timeout_t *f_recv_timeout );
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+
+
+/**
+ * \brief             Configure the use of the Connection ID (CID)
+ *                    extension in the next handshake.
+ *
+ *                    Reference: draft-ietf-tls-dtls-connection-id-05
+ *                    https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05
+ *
+ *                    The DTLS CID extension allows the reliable association of
+ *                    DTLS records to DTLS connections across changes in the
+ *                    underlying transport (changed IP and Port metadata) by
+ *                    adding explicit connection identifiers (CIDs) to the
+ *                    headers of encrypted DTLS records. The desired CIDs are
+ *                    configured by the application layer and are exchanged in
+ *                    new `ClientHello` / `ServerHello` extensions during the
+ *                    handshake, where each side indicates the CID it wants the
+ *                    peer to use when writing encrypted messages. The CIDs are
+ *                    put to use once records get encrypted: the stack discards
+ *                    any incoming records that don't include the configured CID
+ *                    in their header, and adds the peer's requested CID to the
+ *                    headers of outgoing messages.
+ *
+ *                    This API enables or disables the use of the CID extension
+ *                    in the next handshake and sets the value of the CID to
+ *                    be used for incoming messages.
+ *
+ * \param ssl         The SSL context to configure. This must be initialized.
+ * \param enable      This value determines whether the CID extension should
+ *                    be used or not. Possible values are:
+ *                    - MBEDTLS_SSL_CID_ENABLED to enable the use of the CID.
+ *                    - MBEDTLS_SSL_CID_DISABLED (default) to disable the use
+ *                      of the CID.
+ * \param own_cid     The address of the readable buffer holding the CID we want
+ *                    the peer to use when sending encrypted messages to us.
+ *                    This may be \c NULL if \p own_cid_len is \c 0.
+ *                    This parameter is unused if \p enabled is set to
+ *                    MBEDTLS_SSL_CID_DISABLED.
+ * \param own_cid_len The length of \p own_cid.
+ *                    This parameter is unused if \p enabled is set to
+ *                    MBEDTLS_SSL_CID_DISABLED.
+ *
+ * \note              The value of \p own_cid_len must match the value of the
+ *                    \c len parameter passed to mbedtls_ssl_conf_cid()
+ *                    when configuring the ::mbedtls_ssl_config that \p ssl
+ *                    is bound to.
+ *
+ * \note              This CID configuration applies to subsequent handshakes
+ *                    performed on the SSL context \p ssl, but does not trigger
+ *                    one. You still have to call `mbedtls_ssl_handshake()`
+ *                    (for the initial handshake) or `mbedtls_ssl_renegotiate()`
+ *                    (for a renegotiation handshake) explicitly after a
+ *                    successful call to this function to run the handshake.
+ *
+ * \note              This call cannot guarantee that the use of the CID
+ *                    will be successfully negotiated in the next handshake,
+ *                    because the peer might not support it. Specifically:
+ *                    - On the Client, enabling the use of the CID through
+ *                      this call implies that the `ClientHello` in the next
+ *                      handshake will include the CID extension, thereby
+ *                      offering the use of the CID to the server. Only if
+ *                      the `ServerHello` contains the CID extension, too,
+ *                      the CID extension will actually be put to use.
+ *                    - On the Server, enabling the use of the CID through
+ *                      this call implies that that the server will look for
+ *                      the CID extension in a `ClientHello` from the client,
+ *                      and, if present, reply with a CID extension in its
+ *                      `ServerHello`.
+ *
+ * \note              To check whether the use of the CID was negotiated
+ *                    after the subsequent handshake has completed, please
+ *                    use the API mbedtls_ssl_get_peer_cid().
+ *
+ * \warning           If the use of the CID extension is enabled in this call
+ *                    and the subsequent handshake negotiates its use, Mbed TLS
+ *                    will silently drop every packet whose CID does not match
+ *                    the CID configured in \p own_cid. It is the responsibility
+ *                    of the user to adapt the underlying transport to take care
+ *                    of CID-based demultiplexing before handing datagrams to
+ *                    Mbed TLS.
+ *
+ * \return            \c 0 on success. In this case, the CID configuration
+ *                    applies to the next handshake.
+ * \return            A negative error code on failure.
+ */
+int mbedtls_ssl_set_cid( mbedtls_ssl_context *ssl,
+                         int enable,
+                         unsigned char const *own_cid,
+                         size_t own_cid_len );
+
+/**
+ * \brief              Get information about the use of the CID extension
+ *                     in the current connection.
+ *
+ * \param ssl          The SSL context to query.
+ * \param enabled      The address at which to store whether the CID extension
+ *                     is currently in use or not. If the CID is in use,
+ *                     `*enabled` is set to MBEDTLS_SSL_CID_ENABLED;
+ *                     otherwise, it is set to MBEDTLS_SSL_CID_DISABLED.
+ * \param peer_cid     The address of the buffer in which to store the CID
+ *                     chosen by the peer (if the CID extension is used).
+ *                     This may be \c NULL in case the value of peer CID
+ *                     isn't needed. If it is not \c NULL, \p peer_cid_len
+ *                     must not be \c NULL.
+ * \param peer_cid_len The address at which to store the size of the CID
+ *                     chosen by the peer (if the CID extension is used).
+ *                     This is also the number of Bytes in \p peer_cid that
+ *                     have been written.
+ *                     This may be \c NULL in case the length of the peer CID
+ *                     isn't needed. If it is \c NULL, \p peer_cid must be
+ *                     \c NULL, too.
+ *
+ * \note               This applies to the state of the CID negotiated in
+ *                     the last complete handshake. If a handshake is in
+ *                     progress, this function will attempt to complete
+ *                     the handshake first.
+ *
+ * \note               If CID extensions have been exchanged but both client
+ *                     and server chose to use an empty CID, this function
+ *                     sets `*enabled` to #MBEDTLS_SSL_CID_DISABLED
+ *                     (the rationale for this is that the resulting
+ *                     communication is the same as if the CID extensions
+ *                     hadn't been used).
+ *
+ * \return            \c 0 on success.
+ * \return            A negative error code on failure.
+ */
+int mbedtls_ssl_get_peer_cid( mbedtls_ssl_context *ssl,
+                     int *enabled,
+                     unsigned char peer_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ],
+                     size_t *peer_cid_len );
+
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
+/**
+ * \brief          Set the Maximum Tranport Unit (MTU).
+ *                 Special value: 0 means unset (no limit).
+ *                 This represents the maximum size of a datagram payload
+ *                 handled by the transport layer (usually UDP) as determined
+ *                 by the network link and stack. In practice, this controls
+ *                 the maximum size datagram the DTLS layer will pass to the
+ *                 \c f_send() callback set using \c mbedtls_ssl_set_bio().
+ *
+ * \note           The limit on datagram size is converted to a limit on
+ *                 record payload by subtracting the current overhead of
+ *                 encapsulation and encryption/authentication if any.
+ *
+ * \note           This can be called at any point during the connection, for
+ *                 example when a Path Maximum Transfer Unit (PMTU)
+ *                 estimate becomes available from other sources,
+ *                 such as lower (or higher) protocol layers.
+ *
+ * \note           This setting only controls the size of the packets we send,
+ *                 and does not restrict the size of the datagrams we're
+ *                 willing to receive. Client-side, you can request the
+ *                 server to use smaller records with \c
+ *                 mbedtls_ssl_conf_max_frag_len().
+ *
+ * \note           If both a MTU and a maximum fragment length have been
+ *                 configured (or negotiated with the peer), the resulting
+ *                 lower limit on record payload (see first note) is used.
+ *
+ * \note           This can only be used to decrease the maximum size
+ *                 of datagrams (hence records, see first note) sent. It
+ *                 cannot be used to increase the maximum size of records over
+ *                 the limit set by #MBEDTLS_SSL_OUT_CONTENT_LEN.
+ *
+ * \note           Values lower than the current record layer expansion will
+ *                 result in an error when trying to send data.
+ *
+ * \note           Using record compression together with a non-zero MTU value
+ *                 will result in an error when trying to send data.
+ *
+ * \param ssl      SSL context
+ * \param mtu      Value of the path MTU in bytes
+ */
+void mbedtls_ssl_set_mtu( mbedtls_ssl_context *ssl, uint16_t mtu );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief          Set a connection-specific verification callback (optional).
+ *
+ *                 If set, the provided verify callback is called for each
+ *                 certificate in the peer's CRT chain, including the trusted
+ *                 root. For more information, please see the documentation of
+ *                 \c mbedtls_x509_crt_verify().
+ *
+ * \note           This call is analogous to mbedtls_ssl_conf_verify() but
+ *                 binds the verification callback and context to an SSL context
+ *                 as opposed to an SSL configuration.
+ *                 If mbedtls_ssl_conf_verify() and mbedtls_ssl_set_verify()
+ *                 are both used, mbedtls_ssl_set_verify() takes precedence.
+ *
+ * \param ssl      The SSL context to use.
+ * \param f_vrfy   The verification callback to use during CRT verification.
+ * \param p_vrfy   The opaque context to be passed to the callback.
+ */
+void mbedtls_ssl_set_verify( mbedtls_ssl_context *ssl,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+/**
+ * \brief          Set the timeout period for mbedtls_ssl_read()
+ *                 (Default: no timeout.)
+ *
+ * \param conf     SSL configuration context
+ * \param timeout  Timeout value in milliseconds.
+ *                 Use 0 for no timeout (default).
+ *
+ * \note           With blocking I/O, this will only work if a non-NULL
+ *                 \c f_recv_timeout was set with \c mbedtls_ssl_set_bio().
+ *                 With non-blocking I/O, this will only work if timer
+ *                 callbacks were set with \c mbedtls_ssl_set_timer_cb().
+ *
+ * \note           With non-blocking I/O, you may also skip this function
+ *                 altogether and handle timeouts at the application layer.
+ */
+void mbedtls_ssl_conf_read_timeout( mbedtls_ssl_config *conf, uint32_t timeout );
+
+#if defined(MBEDTLS_SSL_RECORD_CHECKING)
+/**
+ * \brief          Check whether a buffer contains a valid and authentic record
+ *                 that has not been seen before. (DTLS only).
+ *
+ *                 This function does not change the user-visible state
+ *                 of the SSL context. Its sole purpose is to provide
+ *                 an indication of the legitimacy of an incoming record.
+ *
+ *                 This can be useful e.g. in distributed server environments
+ *                 using the DTLS Connection ID feature, in which connections
+ *                 might need to be passed between service instances on a change
+ *                 of peer address, but where such disruptive operations should
+ *                 only happen after the validity of incoming records has been
+ *                 confirmed.
+ *
+ * \param ssl      The SSL context to use.
+ * \param buf      The address of the buffer holding the record to be checked.
+ *                 This must be a read/write buffer of length \p buflen Bytes.
+ * \param buflen   The length of \p buf in Bytes.
+ *
+ * \note           This routine only checks whether the provided buffer begins
+ *                 with a valid and authentic record that has not been seen
+ *                 before, but does not check potential data following the
+ *                 initial record. In particular, it is possible to pass DTLS
+ *                 datagrams containing multiple records, in which case only
+ *                 the first record is checked.
+ *
+ * \note           This function modifies the input buffer \p buf. If you need
+ *                 to preserve the original record, you have to maintain a copy.
+ *
+ * \return         \c 0 if the record is valid and authentic and has not been
+ *                 seen before.
+ * \return         MBEDTLS_ERR_SSL_INVALID_MAC if the check completed
+ *                 successfully but the record was found to be not authentic.
+ * \return         MBEDTLS_ERR_SSL_INVALID_RECORD if the check completed
+ *                 successfully but the record was found to be invalid for
+ *                 a reason different from authenticity checking.
+ * \return         MBEDTLS_ERR_SSL_UNEXPECTED_RECORD if the check completed
+ *                 successfully but the record was found to be unexpected
+ *                 in the state of the SSL context, including replayed records.
+ * \return         Another negative error code on different kinds of failure.
+ *                 In this case, the SSL context becomes unusable and needs
+ *                 to be freed or reset before reuse.
+ */
+int mbedtls_ssl_check_record( mbedtls_ssl_context const *ssl,
+                              unsigned char *buf,
+                              size_t buflen );
+#endif /* MBEDTLS_SSL_RECORD_CHECKING */
+
+/**
+ * \brief          Set the timer callbacks (Mandatory for DTLS.)
+ *
+ * \param ssl      SSL context
+ * \param p_timer  parameter (context) shared by timer callbacks
+ * \param f_set_timer   set timer callback
+ * \param f_get_timer   get timer callback. Must return:
+ *
+ * \note           See the documentation of \c mbedtls_ssl_set_timer_t and
+ *                 \c mbedtls_ssl_get_timer_t for the conventions this pair of
+ *                 callbacks must follow.
+ *
+ * \note           On some platforms, timing.c provides
+ *                 \c mbedtls_timing_set_delay() and
+ *                 \c mbedtls_timing_get_delay() that are suitable for using
+ *                 here, except if using an event-driven style.
+ *
+ * \note           See also the "DTLS tutorial" article in our knowledge base.
+ *                 https://tls.mbed.org/kb/how-to/dtls-tutorial
+ */
+void mbedtls_ssl_set_timer_cb( mbedtls_ssl_context *ssl,
+                               void *p_timer,
+                               mbedtls_ssl_set_timer_t *f_set_timer,
+                               mbedtls_ssl_get_timer_t *f_get_timer );
+
+/**
+ * \brief           Callback type: generate and write session ticket
+ *
+ * \note            This describes what a callback implementation should do.
+ *                  This callback should generate an encrypted and
+ *                  authenticated ticket for the session and write it to the
+ *                  output buffer. Here, ticket means the opaque ticket part
+ *                  of the NewSessionTicket structure of RFC 5077.
+ *
+ * \param p_ticket  Context for the callback
+ * \param session   SSL session to be written in the ticket
+ * \param start     Start of the output buffer
+ * \param end       End of the output buffer
+ * \param tlen      On exit, holds the length written
+ * \param lifetime  On exit, holds the lifetime of the ticket in seconds
+ *
+ * \return          0 if successful, or
+ *                  a specific MBEDTLS_ERR_XXX code.
+ */
+typedef int mbedtls_ssl_ticket_write_t( void *p_ticket,
+                                        const mbedtls_ssl_session *session,
+                                        unsigned char *start,
+                                        const unsigned char *end,
+                                        size_t *tlen,
+                                        uint32_t *lifetime );
+
+#if defined(MBEDTLS_SSL_EXPORT_KEYS)
+/**
+ * \brief           Callback type: Export key block and master secret
+ *
+ * \note            This is required for certain uses of TLS, e.g. EAP-TLS
+ *                  (RFC 5216) and Thread. The key pointers are ephemeral and
+ *                  therefore must not be stored. The master secret and keys
+ *                  should not be used directly except as an input to a key
+ *                  derivation function.
+ *
+ * \param p_expkey  Context for the callback
+ * \param ms        Pointer to master secret (fixed length: 48 bytes)
+ * \param kb        Pointer to key block, see RFC 5246 section 6.3
+ *                  (variable length: 2 * maclen + 2 * keylen + 2 * ivlen).
+ * \param maclen    MAC length
+ * \param keylen    Key length
+ * \param ivlen     IV length
+ *
+ * \return          0 if successful, or
+ *                  a specific MBEDTLS_ERR_XXX code.
+ */
+typedef int mbedtls_ssl_export_keys_t( void *p_expkey,
+                                const unsigned char *ms,
+                                const unsigned char *kb,
+                                size_t maclen,
+                                size_t keylen,
+                                size_t ivlen );
+
+/**
+ * \brief           Callback type: Export key block, master secret,
+ *                                 handshake randbytes and the tls_prf function
+ *                                 used to derive keys.
+ *
+ * \note            This is required for certain uses of TLS, e.g. EAP-TLS
+ *                  (RFC 5216) and Thread. The key pointers are ephemeral and
+ *                  therefore must not be stored. The master secret and keys
+ *                  should not be used directly except as an input to a key
+ *                  derivation function.
+ *
+ * \param p_expkey  Context for the callback.
+ * \param ms        Pointer to master secret (fixed length: 48 bytes).
+ * \param kb            Pointer to key block, see RFC 5246 section 6.3.
+ *                      (variable length: 2 * maclen + 2 * keylen + 2 * ivlen).
+ * \param maclen        MAC length.
+ * \param keylen        Key length.
+ * \param ivlen         IV length.
+ * \param client_random The client random bytes.
+ * \param server_random The server random bytes.
+ * \param tls_prf_type The tls_prf enum type.
+ *
+ * \return          0 if successful, or
+ *                  a specific MBEDTLS_ERR_XXX code.
+ */
+typedef int mbedtls_ssl_export_keys_ext_t( void *p_expkey,
+                                           const unsigned char *ms,
+                                           const unsigned char *kb,
+                                           size_t maclen,
+                                           size_t keylen,
+                                           size_t ivlen,
+                                           const unsigned char client_random[32],
+                                           const unsigned char server_random[32],
+                                           mbedtls_tls_prf_types tls_prf_type );
+#endif /* MBEDTLS_SSL_EXPORT_KEYS */
+
+/**
+ * \brief           Callback type: parse and load session ticket
+ *
+ * \note            This describes what a callback implementation should do.
+ *                  This callback should parse a session ticket as generated
+ *                  by the corresponding mbedtls_ssl_ticket_write_t function,
+ *                  and, if the ticket is authentic and valid, load the
+ *                  session.
+ *
+ * \note            The implementation is allowed to modify the first len
+ *                  bytes of the input buffer, eg to use it as a temporary
+ *                  area for the decrypted ticket contents.
+ *
+ * \param p_ticket  Context for the callback
+ * \param session   SSL session to be loaded
+ * \param buf       Start of the buffer containing the ticket
+ * \param len       Length of the ticket.
+ *
+ * \return          0 if successful, or
+ *                  MBEDTLS_ERR_SSL_INVALID_MAC if not authentic, or
+ *                  MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED if expired, or
+ *                  any other non-zero code for other failures.
+ */
+typedef int mbedtls_ssl_ticket_parse_t( void *p_ticket,
+                                        mbedtls_ssl_session *session,
+                                        unsigned char *buf,
+                                        size_t len );
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_SRV_C)
+/**
+ * \brief           Configure SSL session ticket callbacks (server only).
+ *                  (Default: none.)
+ *
+ * \note            On server, session tickets are enabled by providing
+ *                  non-NULL callbacks.
+ *
+ * \note            On client, use \c mbedtls_ssl_conf_session_tickets().
+ *
+ * \param conf      SSL configuration context
+ * \param f_ticket_write    Callback for writing a ticket
+ * \param f_ticket_parse    Callback for parsing a ticket
+ * \param p_ticket          Context shared by the two callbacks
+ */
+void mbedtls_ssl_conf_session_tickets_cb( mbedtls_ssl_config *conf,
+        mbedtls_ssl_ticket_write_t *f_ticket_write,
+        mbedtls_ssl_ticket_parse_t *f_ticket_parse,
+        void *p_ticket );
+#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_SRV_C */
+
+#if defined(MBEDTLS_SSL_EXPORT_KEYS)
+/**
+ * \brief           Configure key export callback.
+ *                  (Default: none.)
+ *
+ * \note            See \c mbedtls_ssl_export_keys_t.
+ *
+ * \param conf      SSL configuration context
+ * \param f_export_keys     Callback for exporting keys
+ * \param p_export_keys     Context for the callback
+ */
+void mbedtls_ssl_conf_export_keys_cb( mbedtls_ssl_config *conf,
+        mbedtls_ssl_export_keys_t *f_export_keys,
+        void *p_export_keys );
+
+/**
+ * \brief           Configure extended key export callback.
+ *                  (Default: none.)
+ *
+ * \note            See \c mbedtls_ssl_export_keys_ext_t.
+ * \warning         Exported key material must not be used for any purpose
+ *                  before the (D)TLS handshake is completed
+ *
+ * \param conf      SSL configuration context
+ * \param f_export_keys_ext Callback for exporting keys
+ * \param p_export_keys     Context for the callback
+ */
+void mbedtls_ssl_conf_export_keys_ext_cb( mbedtls_ssl_config *conf,
+        mbedtls_ssl_export_keys_ext_t *f_export_keys_ext,
+        void *p_export_keys );
+#endif /* MBEDTLS_SSL_EXPORT_KEYS */
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+/**
+ * \brief           Configure asynchronous private key operation callbacks.
+ *
+ * \param conf              SSL configuration context
+ * \param f_async_sign      Callback to start a signature operation. See
+ *                          the description of ::mbedtls_ssl_async_sign_t
+ *                          for more information. This may be \c NULL if the
+ *                          external processor does not support any signature
+ *                          operation; in this case the private key object
+ *                          associated with the certificate will be used.
+ * \param f_async_decrypt   Callback to start a decryption operation. See
+ *                          the description of ::mbedtls_ssl_async_decrypt_t
+ *                          for more information. This may be \c NULL if the
+ *                          external processor does not support any decryption
+ *                          operation; in this case the private key object
+ *                          associated with the certificate will be used.
+ * \param f_async_resume    Callback to resume an asynchronous operation. See
+ *                          the description of ::mbedtls_ssl_async_resume_t
+ *                          for more information. This may not be \c NULL unless
+ *                          \p f_async_sign and \p f_async_decrypt are both
+ *                          \c NULL.
+ * \param f_async_cancel    Callback to cancel an asynchronous operation. See
+ *                          the description of ::mbedtls_ssl_async_cancel_t
+ *                          for more information. This may be \c NULL if
+ *                          no cleanup is needed.
+ * \param config_data       A pointer to configuration data which can be
+ *                          retrieved with
+ *                          mbedtls_ssl_conf_get_async_config_data(). The
+ *                          library stores this value without dereferencing it.
+ */
+void mbedtls_ssl_conf_async_private_cb( mbedtls_ssl_config *conf,
+                                        mbedtls_ssl_async_sign_t *f_async_sign,
+                                        mbedtls_ssl_async_decrypt_t *f_async_decrypt,
+                                        mbedtls_ssl_async_resume_t *f_async_resume,
+                                        mbedtls_ssl_async_cancel_t *f_async_cancel,
+                                        void *config_data );
+
+/**
+ * \brief           Retrieve the configuration data set by
+ *                  mbedtls_ssl_conf_async_private_cb().
+ *
+ * \param conf      SSL configuration context
+ * \return          The configuration data set by
+ *                  mbedtls_ssl_conf_async_private_cb().
+ */
+void *mbedtls_ssl_conf_get_async_config_data( const mbedtls_ssl_config *conf );
+
+/**
+ * \brief           Retrieve the asynchronous operation user context.
+ *
+ * \note            This function may only be called while a handshake
+ *                  is in progress.
+ *
+ * \param ssl       The SSL context to access.
+ *
+ * \return          The asynchronous operation user context that was last
+ *                  set during the current handshake. If
+ *                  mbedtls_ssl_set_async_operation_data() has not yet been
+ *                  called during the current handshake, this function returns
+ *                  \c NULL.
+ */
+void *mbedtls_ssl_get_async_operation_data( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief           Retrieve the asynchronous operation user context.
+ *
+ * \note            This function may only be called while a handshake
+ *                  is in progress.
+ *
+ * \param ssl       The SSL context to access.
+ * \param ctx       The new value of the asynchronous operation user context.
+ *                  Call mbedtls_ssl_get_async_operation_data() later during the
+ *                  same handshake to retrieve this value.
+ */
+void mbedtls_ssl_set_async_operation_data( mbedtls_ssl_context *ssl,
+                                 void *ctx );
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+
+/**
+ * \brief          Callback type: generate a cookie
+ *
+ * \param ctx      Context for the callback
+ * \param p        Buffer to write to,
+ *                 must be updated to point right after the cookie
+ * \param end      Pointer to one past the end of the output buffer
+ * \param info     Client ID info that was passed to
+ *                 \c mbedtls_ssl_set_client_transport_id()
+ * \param ilen     Length of info in bytes
+ *
+ * \return         The callback must return 0 on success,
+ *                 or a negative error code.
+ */
+typedef int mbedtls_ssl_cookie_write_t( void *ctx,
+                                unsigned char **p, unsigned char *end,
+                                const unsigned char *info, size_t ilen );
+
+/**
+ * \brief          Callback type: verify a cookie
+ *
+ * \param ctx      Context for the callback
+ * \param cookie   Cookie to verify
+ * \param clen     Length of cookie
+ * \param info     Client ID info that was passed to
+ *                 \c mbedtls_ssl_set_client_transport_id()
+ * \param ilen     Length of info in bytes
+ *
+ * \return         The callback must return 0 if cookie is valid,
+ *                 or a negative error code.
+ */
+typedef int mbedtls_ssl_cookie_check_t( void *ctx,
+                                const unsigned char *cookie, size_t clen,
+                                const unsigned char *info, size_t ilen );
+
+#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C)
+/**
+ * \brief           Register callbacks for DTLS cookies
+ *                  (Server only. DTLS only.)
+ *
+ *                  Default: dummy callbacks that fail, in order to force you to
+ *                  register working callbacks (and initialize their context).
+ *
+ *                  To disable HelloVerifyRequest, register NULL callbacks.
+ *
+ * \warning         Disabling hello verification allows your server to be used
+ *                  for amplification in DoS attacks against other hosts.
+ *                  Only disable if you known this can't happen in your
+ *                  particular environment.
+ *
+ * \note            See comments on \c mbedtls_ssl_handshake() about handling
+ *                  the MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED that is expected
+ *                  on the first handshake attempt when this is enabled.
+ *
+ * \note            This is also necessary to handle client reconnection from
+ *                  the same port as described in RFC 6347 section 4.2.8 (only
+ *                  the variant with cookies is supported currently). See
+ *                  comments on \c mbedtls_ssl_read() for details.
+ *
+ * \param conf              SSL configuration
+ * \param f_cookie_write    Cookie write callback
+ * \param f_cookie_check    Cookie check callback
+ * \param p_cookie          Context for both callbacks
+ */
+void mbedtls_ssl_conf_dtls_cookies( mbedtls_ssl_config *conf,
+                           mbedtls_ssl_cookie_write_t *f_cookie_write,
+                           mbedtls_ssl_cookie_check_t *f_cookie_check,
+                           void *p_cookie );
+
+/**
+ * \brief          Set client's transport-level identification info.
+ *                 (Server only. DTLS only.)
+ *
+ *                 This is usually the IP address (and port), but could be
+ *                 anything identify the client depending on the underlying
+ *                 network stack. Used for HelloVerifyRequest with DTLS.
+ *                 This is *not* used to route the actual packets.
+ *
+ * \param ssl      SSL context
+ * \param info     Transport-level info identifying the client (eg IP + port)
+ * \param ilen     Length of info in bytes
+ *
+ * \note           An internal copy is made, so the info buffer can be reused.
+ *
+ * \return         0 on success,
+ *                 MBEDTLS_ERR_SSL_BAD_INPUT_DATA if used on client,
+ *                 MBEDTLS_ERR_SSL_ALLOC_FAILED if out of memory.
+ */
+int mbedtls_ssl_set_client_transport_id( mbedtls_ssl_context *ssl,
+                                 const unsigned char *info,
+                                 size_t ilen );
+
+#endif /* MBEDTLS_SSL_DTLS_HELLO_VERIFY && MBEDTLS_SSL_SRV_C */
+
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+/**
+ * \brief          Enable or disable anti-replay protection for DTLS.
+ *                 (DTLS only, no effect on TLS.)
+ *                 Default: enabled.
+ *
+ * \param conf     SSL configuration
+ * \param mode     MBEDTLS_SSL_ANTI_REPLAY_ENABLED or MBEDTLS_SSL_ANTI_REPLAY_DISABLED.
+ *
+ * \warning        Disabling this is a security risk unless the application
+ *                 protocol handles duplicated packets in a safe way. You
+ *                 should not disable this without careful consideration.
+ *                 However, if your application already detects duplicated
+ *                 packets and needs information about them to adjust its
+ *                 transmission strategy, then you'll want to disable this.
+ */
+void mbedtls_ssl_conf_dtls_anti_replay( mbedtls_ssl_config *conf, char mode );
+#endif /* MBEDTLS_SSL_DTLS_ANTI_REPLAY */
+
+#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
+/**
+ * \brief          Set a limit on the number of records with a bad MAC
+ *                 before terminating the connection.
+ *                 (DTLS only, no effect on TLS.)
+ *                 Default: 0 (disabled).
+ *
+ * \param conf     SSL configuration
+ * \param limit    Limit, or 0 to disable.
+ *
+ * \note           If the limit is N, then the connection is terminated when
+ *                 the Nth non-authentic record is seen.
+ *
+ * \note           Records with an invalid header are not counted, only the
+ *                 ones going through the authentication-decryption phase.
+ *
+ * \note           This is a security trade-off related to the fact that it's
+ *                 often relatively easy for an active attacker ot inject UDP
+ *                 datagrams. On one hand, setting a low limit here makes it
+ *                 easier for such an attacker to forcibly terminated a
+ *                 connection. On the other hand, a high limit or no limit
+ *                 might make us waste resources checking authentication on
+ *                 many bogus packets.
+ */
+void mbedtls_ssl_conf_dtls_badmac_limit( mbedtls_ssl_config *conf, unsigned limit );
+#endif /* MBEDTLS_SSL_DTLS_BADMAC_LIMIT */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+
+/**
+ * \brief          Allow or disallow packing of multiple handshake records
+ *                 within a single datagram.
+ *
+ * \param ssl           The SSL context to configure.
+ * \param allow_packing This determines whether datagram packing may
+ *                      be used or not. A value of \c 0 means that every
+ *                      record will be sent in a separate datagram; a
+ *                      value of \c 1 means that, if space permits,
+ *                      multiple handshake messages (including CCS) belonging to
+ *                      a single flight may be packed within a single datagram.
+ *
+ * \note           This is enabled by default and should only be disabled
+ *                 for test purposes, or if datagram packing causes
+ *                 interoperability issues with peers that don't support it.
+ *
+ * \note           Allowing datagram packing reduces the network load since
+ *                 there's less overhead if multiple messages share the same
+ *                 datagram. Also, it increases the handshake efficiency
+ *                 since messages belonging to a single datagram will not
+ *                 be reordered in transit, and so future message buffering
+ *                 or flight retransmission (if no buffering is used) as
+ *                 means to deal with reordering are needed less frequently.
+ *
+ * \note           Application records are not affected by this option and
+ *                 are currently always sent in separate datagrams.
+ *
+ */
+void mbedtls_ssl_set_datagram_packing( mbedtls_ssl_context *ssl,
+                                       unsigned allow_packing );
+
+/**
+ * \brief          Set retransmit timeout values for the DTLS handshake.
+ *                 (DTLS only, no effect on TLS.)
+ *
+ * \param conf     SSL configuration
+ * \param min      Initial timeout value in milliseconds.
+ *                 Default: 1000 (1 second).
+ * \param max      Maximum timeout value in milliseconds.
+ *                 Default: 60000 (60 seconds).
+ *
+ * \note           Default values are from RFC 6347 section 4.2.4.1.
+ *
+ * \note           The 'min' value should typically be slightly above the
+ *                 expected round-trip time to your peer, plus whatever time
+ *                 it takes for the peer to process the message. For example,
+ *                 if your RTT is about 600ms and you peer needs up to 1s to
+ *                 do the cryptographic operations in the handshake, then you
+ *                 should set 'min' slightly above 1600. Lower values of 'min'
+ *                 might cause spurious resends which waste network resources,
+ *                 while larger value of 'min' will increase overall latency
+ *                 on unreliable network links.
+ *
+ * \note           The more unreliable your network connection is, the larger
+ *                 your max / min ratio needs to be in order to achieve
+ *                 reliable handshakes.
+ *
+ * \note           Messages are retransmitted up to log2(ceil(max/min)) times.
+ *                 For example, if min = 1s and max = 5s, the retransmit plan
+ *                 goes: send ... 1s -> resend ... 2s -> resend ... 4s ->
+ *                 resend ... 5s -> give up and return a timeout error.
+ */
+void mbedtls_ssl_conf_handshake_timeout( mbedtls_ssl_config *conf, uint32_t min, uint32_t max );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+#if defined(MBEDTLS_SSL_SRV_C)
+/**
+ * \brief          Set the session cache callbacks (server-side only)
+ *                 If not set, no session resuming is done (except if session
+ *                 tickets are enabled too).
+ *
+ *                 The session cache has the responsibility to check for stale
+ *                 entries based on timeout. See RFC 5246 for recommendations.
+ *
+ *                 Warning: session.peer_cert is cleared by the SSL/TLS layer on
+ *                 connection shutdown, so do not cache the pointer! Either set
+ *                 it to NULL or make a full copy of the certificate.
+ *
+ *                 The get callback is called once during the initial handshake
+ *                 to enable session resuming. The get function has the
+ *                 following parameters: (void *parameter, mbedtls_ssl_session *session)
+ *                 If a valid entry is found, it should fill the master of
+ *                 the session object with the cached values and return 0,
+ *                 return 1 otherwise. Optionally peer_cert can be set as well
+ *                 if it is properly present in cache entry.
+ *
+ *                 The set callback is called once during the initial handshake
+ *                 to enable session resuming after the entire handshake has
+ *                 been finished. The set function has the following parameters:
+ *                 (void *parameter, const mbedtls_ssl_session *session). The function
+ *                 should create a cache entry for future retrieval based on
+ *                 the data in the session structure and should keep in mind
+ *                 that the mbedtls_ssl_session object presented (and all its referenced
+ *                 data) is cleared by the SSL/TLS layer when the connection is
+ *                 terminated. It is recommended to add metadata to determine if
+ *                 an entry is still valid in the future. Return 0 if
+ *                 successfully cached, return 1 otherwise.
+ *
+ * \param conf           SSL configuration
+ * \param p_cache        parmater (context) for both callbacks
+ * \param f_get_cache    session get callback
+ * \param f_set_cache    session set callback
+ */
+void mbedtls_ssl_conf_session_cache( mbedtls_ssl_config *conf,
+        void *p_cache,
+        int (*f_get_cache)(void *, mbedtls_ssl_session *),
+        int (*f_set_cache)(void *, const mbedtls_ssl_session *) );
+#endif /* MBEDTLS_SSL_SRV_C */
+
+#if defined(MBEDTLS_SSL_CLI_C)
+/**
+ * \brief          Request resumption of session (client-side only)
+ *                 Session data is copied from presented session structure.
+ *
+ * \param ssl      SSL context
+ * \param session  session context
+ *
+ * \return         0 if successful,
+ *                 MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed,
+ *                 MBEDTLS_ERR_SSL_BAD_INPUT_DATA if used server-side or
+ *                 arguments are otherwise invalid
+ *
+ * \sa             mbedtls_ssl_get_session()
+ */
+int mbedtls_ssl_set_session( mbedtls_ssl_context *ssl, const mbedtls_ssl_session *session );
+#endif /* MBEDTLS_SSL_CLI_C */
+
+/**
+ * \brief          Load serialized session data into a session structure.
+ *                 On client, this can be used for loading saved sessions
+ *                 before resuming them with mbedstls_ssl_set_session().
+ *                 On server, this can be used for alternative implementations
+ *                 of session cache or session tickets.
+ *
+ * \warning        If a peer certificate chain is associated with the session,
+ *                 the serialized state will only contain the peer's
+ *                 end-entity certificate and the result of the chain
+ *                 verification (unless verification was disabled), but not
+ *                 the rest of the chain.
+ *
+ * \see            mbedtls_ssl_session_save()
+ * \see            mbedtls_ssl_set_session()
+ *
+ * \param session  The session structure to be populated. It must have been
+ *                 initialised with mbedtls_ssl_session_init() but not
+ *                 populated yet.
+ * \param buf      The buffer holding the serialized session data. It must be a
+ *                 readable buffer of at least \p len bytes.
+ * \param len      The size of the serialized data in bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if input data is invalid.
+ * \return         #MBEDTLS_ERR_SSL_VERSION_MISMATCH if the serialized data
+ *                 was generated in a different version or configuration of
+ *                 Mbed TLS.
+ * \return         Another negative value for other kinds of errors (for
+ *                 example, unsupported features in the embedded certificate).
+ */
+int mbedtls_ssl_session_load( mbedtls_ssl_session *session,
+                              const unsigned char *buf,
+                              size_t len );
+
+/**
+ * \brief          Save session structure as serialized data in a buffer.
+ *                 On client, this can be used for saving session data,
+ *                 potentially in non-volatile storage, for resuming later.
+ *                 On server, this can be used for alternative implementations
+ *                 of session cache or session tickets.
+ *
+ * \see            mbedtls_ssl_session_load()
+ * \see            mbedtls_ssl_get_session_pointer()
+ *
+ * \param session  The session structure to be saved.
+ * \param buf      The buffer to write the serialized data to. It must be a
+ *                 writeable buffer of at least \p len bytes, or may be \c
+ *                 NULL if \p len is \c 0.
+ * \param buf_len  The number of bytes available for writing in \p buf.
+ * \param olen     The size in bytes of the data that has been or would have
+ *                 been written. It must point to a valid \c size_t.
+ *
+ * \note           \p olen is updated to the correct value regardless of
+ *                 whether \p buf_len was large enough. This makes it possible
+ *                 to determine the necessary size by calling this function
+ *                 with \p buf set to \c NULL and \p buf_len to \c 0.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL if \p buf is too small.
+ */
+int mbedtls_ssl_session_save( const mbedtls_ssl_session *session,
+                              unsigned char *buf,
+                              size_t buf_len,
+                              size_t *olen );
+
+/**
+ * \brief          Get a pointer to the current session structure, for example
+ *                 to serialize it.
+ *
+ * \warning        Ownership of the session remains with the SSL context, and
+ *                 the returned pointer is only guaranteed to be valid until
+ *                 the next API call operating on the same \p ssl context.
+ *
+ * \see            mbedtls_ssl_session_save()
+ *
+ * \param ssl      The SSL context.
+ *
+ * \return         A pointer to the current session if successful.
+ * \return         \c NULL if no session is active.
+ */
+const mbedtls_ssl_session *mbedtls_ssl_get_session_pointer( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief               Set the list of allowed ciphersuites and the preference
+ *                      order. First in the list has the highest preference.
+ *                      (Overrides all version-specific lists)
+ *
+ *                      The ciphersuites array is not copied, and must remain
+ *                      valid for the lifetime of the ssl_config.
+ *
+ *                      Note: The server uses its own preferences
+ *                      over the preference of the client unless
+ *                      MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE is defined!
+ *
+ * \param conf          SSL configuration
+ * \param ciphersuites  0-terminated list of allowed ciphersuites
+ */
+void mbedtls_ssl_conf_ciphersuites( mbedtls_ssl_config *conf,
+                                   const int *ciphersuites );
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+#define MBEDTLS_SSL_UNEXPECTED_CID_IGNORE 0
+#define MBEDTLS_SSL_UNEXPECTED_CID_FAIL   1
+/**
+ * \brief               Specify the length of Connection IDs for incoming
+ *                      encrypted DTLS records, as well as the behaviour
+ *                      on unexpected CIDs.
+ *
+ *                      By default, the CID length is set to \c 0,
+ *                      and unexpected CIDs are silently ignored.
+ *
+ * \param conf          The SSL configuration to modify.
+ * \param len           The length in Bytes of the CID fields in encrypted
+ *                      DTLS records using the CID mechanism. This must
+ *                      not be larger than #MBEDTLS_SSL_CID_OUT_LEN_MAX.
+ * \param ignore_other_cids This determines the stack's behaviour when
+ *                          receiving a record with an unexpected CID.
+ *                          Possible values are:
+ *                          - #MBEDTLS_SSL_UNEXPECTED_CID_IGNORE
+ *                            In this case, the record is silently ignored.
+ *                          - #MBEDTLS_SSL_UNEXPECTED_CID_FAIL
+ *                            In this case, the stack fails with the specific
+ *                            error code #MBEDTLS_ERR_SSL_UNEXPECTED_CID.
+ *
+ * \note                The CID specification allows implementations to either
+ *                      use a common length for all incoming connection IDs or
+ *                      allow variable-length incoming IDs. Mbed TLS currently
+ *                      requires a common length for all connections sharing the
+ *                      same SSL configuration; this allows simpler parsing of
+ *                      record headers.
+ *
+ * \return              \c 0 on success.
+ * \return              #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if \p own_cid_len
+ *                      is too large.
+ */
+int mbedtls_ssl_conf_cid( mbedtls_ssl_config *conf, size_t len,
+                          int ignore_other_cids );
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
+/**
+ * \brief               Set the list of allowed ciphersuites and the
+ *                      preference order for a specific version of the protocol.
+ *                      (Only useful on the server side)
+ *
+ *                      The ciphersuites array is not copied, and must remain
+ *                      valid for the lifetime of the ssl_config.
+ *
+ * \param conf          SSL configuration
+ * \param ciphersuites  0-terminated list of allowed ciphersuites
+ * \param major         Major version number (only MBEDTLS_SSL_MAJOR_VERSION_3
+ *                      supported)
+ * \param minor         Minor version number (MBEDTLS_SSL_MINOR_VERSION_0,
+ *                      MBEDTLS_SSL_MINOR_VERSION_1 and MBEDTLS_SSL_MINOR_VERSION_2,
+ *                      MBEDTLS_SSL_MINOR_VERSION_3 supported)
+ *
+ * \note                With DTLS, use MBEDTLS_SSL_MINOR_VERSION_2 for DTLS 1.0
+ *                      and MBEDTLS_SSL_MINOR_VERSION_3 for DTLS 1.2
+ */
+void mbedtls_ssl_conf_ciphersuites_for_version( mbedtls_ssl_config *conf,
+                                       const int *ciphersuites,
+                                       int major, int minor );
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief          Set the X.509 security profile used for verification
+ *
+ * \note           The restrictions are enforced for all certificates in the
+ *                 chain. However, signatures in the handshake are not covered
+ *                 by this setting but by \b mbedtls_ssl_conf_sig_hashes().
+ *
+ * \param conf     SSL configuration
+ * \param profile  Profile to use
+ */
+void mbedtls_ssl_conf_cert_profile( mbedtls_ssl_config *conf,
+                                    const mbedtls_x509_crt_profile *profile );
+
+/**
+ * \brief          Set the data required to verify peer certificate
+ *
+ * \note           See \c mbedtls_x509_crt_verify() for notes regarding the
+ *                 parameters ca_chain (maps to trust_ca for that function)
+ *                 and ca_crl.
+ *
+ * \param conf     SSL configuration
+ * \param ca_chain trusted CA chain (meaning all fully trusted top-level CAs)
+ * \param ca_crl   trusted CA CRLs
+ */
+void mbedtls_ssl_conf_ca_chain( mbedtls_ssl_config *conf,
+                               mbedtls_x509_crt *ca_chain,
+                               mbedtls_x509_crl *ca_crl );
+
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+/**
+ * \brief          Set the trusted certificate callback.
+ *
+ *                 This API allows to register the set of trusted certificates
+ *                 through a callback, instead of a linked list as configured
+ *                 by mbedtls_ssl_conf_ca_chain().
+ *
+ *                 This is useful for example in contexts where a large number
+ *                 of CAs are used, and the inefficiency of maintaining them
+ *                 in a linked list cannot be tolerated. It is also useful when
+ *                 the set of trusted CAs needs to be modified frequently.
+ *
+ *                 See the documentation of `mbedtls_x509_crt_ca_cb_t` for
+ *                 more information.
+ *
+ * \param conf     The SSL configuration to register the callback with.
+ * \param f_ca_cb  The trusted certificate callback to use when verifying
+ *                 certificate chains.
+ * \param p_ca_cb  The context to be passed to \p f_ca_cb (for example,
+ *                 a reference to a trusted CA database).
+ *
+ * \note           This API is incompatible with mbedtls_ssl_conf_ca_chain():
+ *                 Any call to this function overwrites the values set through
+ *                 earlier calls to mbedtls_ssl_conf_ca_chain() or
+ *                 mbedtls_ssl_conf_ca_cb().
+ *
+ * \note           This API is incompatible with CA indication in
+ *                 CertificateRequest messages: A server-side SSL context which
+ *                 is bound to an SSL configuration that uses a CA callback
+ *                 configured via mbedtls_ssl_conf_ca_cb(), and which requires
+ *                 client authentication, will send an empty CA list in the
+ *                 corresponding CertificateRequest message.
+ *
+ * \note           This API is incompatible with mbedtls_ssl_set_hs_ca_chain():
+ *                 If an SSL context is bound to an SSL configuration which uses
+ *                 CA callbacks configured via mbedtls_ssl_conf_ca_cb(), then
+ *                 calls to mbedtls_ssl_set_hs_ca_chain() have no effect.
+ *
+ * \note           The use of this API disables the use of restartable ECC
+ *                 during X.509 CRT signature verification (but doesn't affect
+ *                 other uses).
+ *
+ * \warning        This API is incompatible with the use of CRLs. Any call to
+ *                 mbedtls_ssl_conf_ca_cb() unsets CRLs configured through
+ *                 earlier calls to mbedtls_ssl_conf_ca_chain().
+ *
+ * \warning        In multi-threaded environments, the callback \p f_ca_cb
+ *                 must be thread-safe, and it is the user's responsibility
+ *                 to guarantee this (for example through a mutex
+ *                 contained in the callback context pointed to by \p p_ca_cb).
+ */
+void mbedtls_ssl_conf_ca_cb( mbedtls_ssl_config *conf,
+                             mbedtls_x509_crt_ca_cb_t f_ca_cb,
+                             void *p_ca_cb );
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
+
+/**
+ * \brief          Set own certificate chain and private key
+ *
+ * \note           own_cert should contain in order from the bottom up your
+ *                 certificate chain. The top certificate (self-signed)
+ *                 can be omitted.
+ *
+ * \note           On server, this function can be called multiple times to
+ *                 provision more than one cert/key pair (eg one ECDSA, one
+ *                 RSA with SHA-256, one RSA with SHA-1). An adequate
+ *                 certificate will be selected according to the client's
+ *                 advertised capabilities. In case multiple certificates are
+ *                 adequate, preference is given to the one set by the first
+ *                 call to this function, then second, etc.
+ *
+ * \note           On client, only the first call has any effect. That is,
+ *                 only one client certificate can be provisioned. The
+ *                 server's preferences in its CertficateRequest message will
+ *                 be ignored and our only cert will be sent regardless of
+ *                 whether it matches those preferences - the server can then
+ *                 decide what it wants to do with it.
+ *
+ * \note           The provided \p pk_key needs to match the public key in the
+ *                 first certificate in \p own_cert, or all handshakes using
+ *                 that certificate will fail. It is your responsibility
+ *                 to ensure that; this function will not perform any check.
+ *                 You may use mbedtls_pk_check_pair() in order to perform
+ *                 this check yourself, but be aware that this function can
+ *                 be computationally expensive on some key types.
+ *
+ * \param conf     SSL configuration
+ * \param own_cert own public certificate chain
+ * \param pk_key   own private key
+ *
+ * \return         0 on success or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ */
+int mbedtls_ssl_conf_own_cert( mbedtls_ssl_config *conf,
+                              mbedtls_x509_crt *own_cert,
+                              mbedtls_pk_context *pk_key );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
+/**
+ * \brief          Configure a pre-shared key (PSK) and identity
+ *                 to be used in PSK-based ciphersuites.
+ *
+ * \note           This is mainly useful for clients. Servers will usually
+ *                 want to use \c mbedtls_ssl_conf_psk_cb() instead.
+ *
+ * \note           A PSK set by \c mbedtls_ssl_set_hs_psk() in the PSK callback
+ *                 takes precedence over a PSK configured by this function.
+ *
+ * \warning        Currently, clients can only register a single pre-shared key.
+ *                 Calling this function or mbedtls_ssl_conf_psk_opaque() more
+ *                 than once will overwrite values configured in previous calls.
+ *                 Support for setting multiple PSKs on clients and selecting
+ *                 one based on the identity hint is not a planned feature,
+ *                 but feedback is welcomed.
+ *
+ * \param conf     The SSL configuration to register the PSK with.
+ * \param psk      The pointer to the pre-shared key to use.
+ * \param psk_len  The length of the pre-shared key in bytes.
+ * \param psk_identity      The pointer to the pre-shared key identity.
+ * \param psk_identity_len  The length of the pre-shared key identity
+ *                          in bytes.
+ *
+ * \note           The PSK and its identity are copied internally and
+ *                 hence need not be preserved by the caller for the lifetime
+ *                 of the SSL configuration.
+ *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
+ */
+int mbedtls_ssl_conf_psk( mbedtls_ssl_config *conf,
+                const unsigned char *psk, size_t psk_len,
+                const unsigned char *psk_identity, size_t psk_identity_len );
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief          Configure an opaque pre-shared key (PSK) and identity
+ *                 to be used in PSK-based ciphersuites.
+ *
+ * \note           This is mainly useful for clients. Servers will usually
+ *                 want to use \c mbedtls_ssl_conf_psk_cb() instead.
+ *
+ * \note           An opaque PSK set by \c mbedtls_ssl_set_hs_psk_opaque() in
+ *                 the PSK callback takes precedence over an opaque PSK
+ *                 configured by this function.
+ *
+ * \warning        Currently, clients can only register a single pre-shared key.
+ *                 Calling this function or mbedtls_ssl_conf_psk() more than
+ *                 once will overwrite values configured in previous calls.
+ *                 Support for setting multiple PSKs on clients and selecting
+ *                 one based on the identity hint is not a planned feature,
+ *                 but feedback is welcomed.
+ *
+ * \param conf     The SSL configuration to register the PSK with.
+ * \param psk      The identifier of the key slot holding the PSK.
+ *                 Until \p conf is destroyed or this function is successfully
+ *                 called again, the key slot \p psk must be populated with a
+ *                 key of type PSA_ALG_CATEGORY_KEY_DERIVATION whose policy
+ *                 allows its use for the key derivation algorithm applied
+ *                 in the handshake.
+ * \param psk_identity      The pointer to the pre-shared key identity.
+ * \param psk_identity_len  The length of the pre-shared key identity
+ *                          in bytes.
+ *
+ * \note           The PSK identity hint is copied internally and hence need
+ *                 not be preserved by the caller for the lifetime of the
+ *                 SSL configuration.
+ *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
+ */
+int mbedtls_ssl_conf_psk_opaque( mbedtls_ssl_config *conf,
+                                 psa_key_id_t psk,
+                                 const unsigned char *psk_identity,
+                                 size_t psk_identity_len );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+/**
+ * \brief          Set the pre-shared Key (PSK) for the current handshake.
+ *
+ * \note           This should only be called inside the PSK callback,
+ *                 i.e. the function passed to \c mbedtls_ssl_conf_psk_cb().
+ *
+ * \note           A PSK set by this function takes precedence over a PSK
+ *                 configured by \c mbedtls_ssl_conf_psk().
+ *
+ * \param ssl      The SSL context to configure a PSK for.
+ * \param psk      The pointer to the pre-shared key.
+ * \param psk_len  The length of the pre-shared key in bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
+ */
+int mbedtls_ssl_set_hs_psk( mbedtls_ssl_context *ssl,
+                            const unsigned char *psk, size_t psk_len );
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * \brief          Set an opaque pre-shared Key (PSK) for the current handshake.
+ *
+ * \note           This should only be called inside the PSK callback,
+ *                 i.e. the function passed to \c mbedtls_ssl_conf_psk_cb().
+ *
+ * \note           An opaque PSK set by this function takes precedence over an
+ *                 opaque PSK configured by \c mbedtls_ssl_conf_psk_opaque().
+ *
+ * \param ssl      The SSL context to configure a PSK for.
+ * \param psk      The identifier of the key slot holding the PSK.
+ *                 For the duration of the current handshake, the key slot
+ *                 must be populated with a key of type
+ *                 PSA_ALG_CATEGORY_KEY_DERIVATION whose policy allows its
+ *                 use for the key derivation algorithm
+ *                 applied in the handshake.
+  *
+ * \return         \c 0 if successful.
+ * \return         An \c MBEDTLS_ERR_SSL_XXX error code on failure.
+ */
+int mbedtls_ssl_set_hs_psk_opaque( mbedtls_ssl_context *ssl,
+                                   psa_key_id_t psk );
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+/**
+ * \brief          Set the PSK callback (server-side only).
+ *
+ *                 If set, the PSK callback is called for each
+ *                 handshake where a PSK-based ciphersuite was negotiated.
+ *                 The caller provides the identity received and wants to
+ *                 receive the actual PSK data and length.
+ *
+ *                 The callback has the following parameters:
+ *                 - \c void*: The opaque pointer \p p_psk.
+ *                 - \c mbedtls_ssl_context*: The SSL context to which
+ *                                            the operation applies.
+ *                 - \c const unsigned char*: The PSK identity
+ *                                            selected by the client.
+ *                 - \c size_t: The length of the PSK identity
+ *                              selected by the client.
+ *
+ *                 If a valid PSK identity is found, the callback should use
+ *                 \c mbedtls_ssl_set_hs_psk() or
+ *                 \c mbedtls_ssl_set_hs_psk_opaque()
+ *                 on the SSL context to set the correct PSK and return \c 0.
+ *                 Any other return value will result in a denied PSK identity.
+ *
+ * \note           A dynamic PSK (i.e. set by the PSK callback) takes
+ *                 precedence over a static PSK (i.e. set by
+ *                 \c mbedtls_ssl_conf_psk() or
+ *                 \c mbedtls_ssl_conf_psk_opaque()).
+ *                 This means that if you set a PSK callback using this
+ *                 function, you don't need to set a PSK using
+ *                 \c mbedtls_ssl_conf_psk() or
+ *                 \c mbedtls_ssl_conf_psk_opaque()).
+ *
+ * \param conf     The SSL configuration to register the callback with.
+ * \param f_psk    The callback for selecting and setting the PSK based
+ *                 in the PSK identity chosen by the client.
+ * \param p_psk    A pointer to an opaque structure to be passed to
+ *                 the callback, for example a PSK store.
+ */
+void mbedtls_ssl_conf_psk_cb( mbedtls_ssl_config *conf,
+                     int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *,
+                                  size_t),
+                     void *p_psk );
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
+
+#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_SRV_C)
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
+/**
+ * \brief          Set the Diffie-Hellman public P and G values,
+ *                 read as hexadecimal strings (server-side only)
+ *                 (Default values: MBEDTLS_DHM_RFC3526_MODP_2048_[PG])
+ *
+ * \param conf     SSL configuration
+ * \param dhm_P    Diffie-Hellman-Merkle modulus
+ * \param dhm_G    Diffie-Hellman-Merkle generator
+ *
+ * \deprecated     Superseded by \c mbedtls_ssl_conf_dh_param_bin.
+ *
+ * \return         0 if successful
+ */
+MBEDTLS_DEPRECATED int mbedtls_ssl_conf_dh_param( mbedtls_ssl_config *conf,
+                                                  const char *dhm_P,
+                                                  const char *dhm_G );
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief          Set the Diffie-Hellman public P and G values
+ *                 from big-endian binary presentations.
+ *                 (Default values: MBEDTLS_DHM_RFC3526_MODP_2048_[PG]_BIN)
+ *
+ * \param conf     SSL configuration
+ * \param dhm_P    Diffie-Hellman-Merkle modulus in big-endian binary form
+ * \param P_len    Length of DHM modulus
+ * \param dhm_G    Diffie-Hellman-Merkle generator in big-endian binary form
+ * \param G_len    Length of DHM generator
+ *
+ * \return         0 if successful
+ */
+int mbedtls_ssl_conf_dh_param_bin( mbedtls_ssl_config *conf,
+                                   const unsigned char *dhm_P, size_t P_len,
+                                   const unsigned char *dhm_G,  size_t G_len );
+
+/**
+ * \brief          Set the Diffie-Hellman public P and G values,
+ *                 read from existing context (server-side only)
+ *
+ * \param conf     SSL configuration
+ * \param dhm_ctx  Diffie-Hellman-Merkle context
+ *
+ * \return         0 if successful
+ */
+int mbedtls_ssl_conf_dh_param_ctx( mbedtls_ssl_config *conf, mbedtls_dhm_context *dhm_ctx );
+#endif /* MBEDTLS_DHM_C && defined(MBEDTLS_SSL_SRV_C) */
+
+#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C)
+/**
+ * \brief          Set the minimum length for Diffie-Hellman parameters.
+ *                 (Client-side only.)
+ *                 (Default: 1024 bits.)
+ *
+ * \param conf     SSL configuration
+ * \param bitlen   Minimum bit length of the DHM prime
+ */
+void mbedtls_ssl_conf_dhm_min_bitlen( mbedtls_ssl_config *conf,
+                                      unsigned int bitlen );
+#endif /* MBEDTLS_DHM_C && MBEDTLS_SSL_CLI_C */
+
+#if defined(MBEDTLS_ECP_C)
+/**
+ * \brief          Set the allowed curves in order of preference.
+ *                 (Default: all defined curves in order of decreasing size,
+ *                 except that Montgomery curves come last. This order
+ *                 is likely to change in a future version.)
+ *
+ *                 On server: this only affects selection of the ECDHE curve;
+ *                 the curves used for ECDH and ECDSA are determined by the
+ *                 list of available certificates instead.
+ *
+ *                 On client: this affects the list of curves offered for any
+ *                 use. The server can override our preference order.
+ *
+ *                 Both sides: limits the set of curves accepted for use in
+ *                 ECDHE and in the peer's end-entity certificate.
+ *
+ * \note           This has no influence on which curves are allowed inside the
+ *                 certificate chains, see \c mbedtls_ssl_conf_cert_profile()
+ *                 for that. For the end-entity certificate however, the key
+ *                 will be accepted only if it is allowed both by this list
+ *                 and by the cert profile.
+ *
+ * \note           This list should be ordered by decreasing preference
+ *                 (preferred curve first).
+ *
+ * \param conf     SSL configuration
+ * \param curves   Ordered list of allowed curves,
+ *                 terminated by MBEDTLS_ECP_DP_NONE.
+ */
+void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
+                              const mbedtls_ecp_group_id *curves );
+#endif /* MBEDTLS_ECP_C */
+
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
+/**
+ * \brief          Set the allowed hashes for signatures during the handshake.
+ *                 (Default: all SHA-2 hashes, largest first. Also SHA-1 if
+ *                 the compile-time option
+ *                 `MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE` is enabled.)
+ *
+ * \note           This only affects which hashes are offered and can be used
+ *                 for signatures during the handshake. Hashes for message
+ *                 authentication and the TLS PRF are controlled by the
+ *                 ciphersuite, see \c mbedtls_ssl_conf_ciphersuites(). Hashes
+ *                 used for certificate signature are controlled by the
+ *                 verification profile, see \c mbedtls_ssl_conf_cert_profile().
+ *
+ * \note           This list should be ordered by decreasing preference
+ *                 (preferred hash first).
+ *
+ * \param conf     SSL configuration
+ * \param hashes   Ordered list of allowed signature hashes,
+ *                 terminated by \c MBEDTLS_MD_NONE.
+ */
+void mbedtls_ssl_conf_sig_hashes( mbedtls_ssl_config *conf,
+                                  const int *hashes );
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief          Set or reset the hostname to check against the received
+ *                 server certificate. It sets the ServerName TLS extension,
+ *                 too, if that extension is enabled. (client-side only)
+ *
+ * \param ssl      SSL context
+ * \param hostname the server hostname, may be NULL to clear hostname
+
+ * \note           Maximum hostname length MBEDTLS_SSL_MAX_HOST_NAME_LEN.
+ *
+ * \return         0 if successful, MBEDTLS_ERR_SSL_ALLOC_FAILED on
+ *                 allocation failure, MBEDTLS_ERR_SSL_BAD_INPUT_DATA on
+ *                 too long input hostname.
+ *
+ *                 Hostname set to the one provided on success (cleared
+ *                 when NULL). On allocation failure hostname is cleared.
+ *                 On too long input failure, old hostname is unchanged.
+ */
+int mbedtls_ssl_set_hostname( mbedtls_ssl_context *ssl, const char *hostname );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
+/**
+ * \brief          Set own certificate and key for the current handshake
+ *
+ * \note           Same as \c mbedtls_ssl_conf_own_cert() but for use within
+ *                 the SNI callback.
+ *
+ * \param ssl      SSL context
+ * \param own_cert own public certificate chain
+ * \param pk_key   own private key
+ *
+ * \return         0 on success or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ */
+int mbedtls_ssl_set_hs_own_cert( mbedtls_ssl_context *ssl,
+                                 mbedtls_x509_crt *own_cert,
+                                 mbedtls_pk_context *pk_key );
+
+/**
+ * \brief          Set the data required to verify peer certificate for the
+ *                 current handshake
+ *
+ * \note           Same as \c mbedtls_ssl_conf_ca_chain() but for use within
+ *                 the SNI callback.
+ *
+ * \param ssl      SSL context
+ * \param ca_chain trusted CA chain (meaning all fully trusted top-level CAs)
+ * \param ca_crl   trusted CA CRLs
+ */
+void mbedtls_ssl_set_hs_ca_chain( mbedtls_ssl_context *ssl,
+                                  mbedtls_x509_crt *ca_chain,
+                                  mbedtls_x509_crl *ca_crl );
+
+/**
+ * \brief          Set authmode for the current handshake.
+ *
+ * \note           Same as \c mbedtls_ssl_conf_authmode() but for use within
+ *                 the SNI callback.
+ *
+ * \param ssl      SSL context
+ * \param authmode MBEDTLS_SSL_VERIFY_NONE, MBEDTLS_SSL_VERIFY_OPTIONAL or
+ *                 MBEDTLS_SSL_VERIFY_REQUIRED
+ */
+void mbedtls_ssl_set_hs_authmode( mbedtls_ssl_context *ssl,
+                                  int authmode );
+
+/**
+ * \brief          Set server side ServerName TLS extension callback
+ *                 (optional, server-side only).
+ *
+ *                 If set, the ServerName callback is called whenever the
+ *                 server receives a ServerName TLS extension from the client
+ *                 during a handshake. The ServerName callback has the
+ *                 following parameters: (void *parameter, mbedtls_ssl_context *ssl,
+ *                 const unsigned char *hostname, size_t len). If a suitable
+ *                 certificate is found, the callback must set the
+ *                 certificate(s) and key(s) to use with \c
+ *                 mbedtls_ssl_set_hs_own_cert() (can be called repeatedly),
+ *                 and may optionally adjust the CA and associated CRL with \c
+ *                 mbedtls_ssl_set_hs_ca_chain() as well as the client
+ *                 authentication mode with \c mbedtls_ssl_set_hs_authmode(),
+ *                 then must return 0. If no matching name is found, the
+ *                 callback must either set a default cert, or
+ *                 return non-zero to abort the handshake at this point.
+ *
+ * \param conf     SSL configuration
+ * \param f_sni    verification function
+ * \param p_sni    verification parameter
+ */
+void mbedtls_ssl_conf_sni( mbedtls_ssl_config *conf,
+                  int (*f_sni)(void *, mbedtls_ssl_context *, const unsigned char *,
+                               size_t),
+                  void *p_sni );
+#endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+/**
+ * \brief          Set the EC J-PAKE password for current handshake.
+ *
+ * \note           An internal copy is made, and destroyed as soon as the
+ *                 handshake is completed, or when the SSL context is reset or
+ *                 freed.
+ *
+ * \note           The SSL context needs to be already set up. The right place
+ *                 to call this function is between \c mbedtls_ssl_setup() or
+ *                 \c mbedtls_ssl_reset() and \c mbedtls_ssl_handshake().
+ *
+ * \param ssl      SSL context
+ * \param pw       EC J-PAKE password (pre-shared secret)
+ * \param pw_len   length of pw in bytes
+ *
+ * \return         0 on success, or a negative error code.
+ */
+int mbedtls_ssl_set_hs_ecjpake_password( mbedtls_ssl_context *ssl,
+                                         const unsigned char *pw,
+                                         size_t pw_len );
+#endif /*MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */
+
+#if defined(MBEDTLS_SSL_ALPN)
+/**
+ * \brief          Set the supported Application Layer Protocols.
+ *
+ * \param conf     SSL configuration
+ * \param protos   Pointer to a NULL-terminated list of supported protocols,
+ *                 in decreasing preference order. The pointer to the list is
+ *                 recorded by the library for later reference as required, so
+ *                 the lifetime of the table must be atleast as long as the
+ *                 lifetime of the SSL configuration structure.
+ *
+ * \return         0 on success, or MBEDTLS_ERR_SSL_BAD_INPUT_DATA.
+ */
+int mbedtls_ssl_conf_alpn_protocols( mbedtls_ssl_config *conf, const char **protos );
+
+/**
+ * \brief          Get the name of the negotiated Application Layer Protocol.
+ *                 This function should be called after the handshake is
+ *                 completed.
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Protcol name, or NULL if no protocol was negotiated.
+ */
+const char *mbedtls_ssl_get_alpn_protocol( const mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_ALPN */
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+#if defined(MBEDTLS_DEBUG_C)
+static inline const char *mbedtls_ssl_get_srtp_profile_as_string( mbedtls_ssl_srtp_profile profile )
+{
+    switch( profile )
+    {
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80:
+            return( "MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80" );
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32:
+            return( "MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32" );
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80:
+            return( "MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80" );
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32:
+            return( "MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32" );
+        default: break;
+    }
+    return( "" );
+}
+#endif /* MBEDTLS_DEBUG_C */
+/**
+ * \brief                   Manage support for mki(master key id) value
+ *                          in use_srtp extension.
+ *                          MKI is an optional part of SRTP used for key management
+ *                          and re-keying. See RFC3711 section 3.1 for details.
+ *                          The default value is
+ *                          #MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED.
+ *
+ * \param conf              The SSL configuration to manage mki support.
+ * \param support_mki_value Enable or disable mki usage. Values are
+ *                          #MBEDTLS_SSL_DTLS_SRTP_MKI_UNSUPPORTED
+ *                          or #MBEDTLS_SSL_DTLS_SRTP_MKI_SUPPORTED.
+ */
+void mbedtls_ssl_conf_srtp_mki_value_supported( mbedtls_ssl_config *conf,
+                                                int support_mki_value );
+
+/**
+ * \brief                   Set the supported DTLS-SRTP protection profiles.
+ *
+ * \param conf              SSL configuration
+ * \param profiles          Pointer to a List of MBEDTLS_TLS_SRTP_UNSET terminated
+ *                          supported protection profiles
+ *                          in decreasing preference order.
+ *                          The pointer to the list is recorded by the library
+ *                          for later reference as required, so the lifetime
+ *                          of the table must be at least as long as the lifetime
+ *                          of the SSL configuration structure.
+ *                          The list must not hold more than
+ *                          MBEDTLS_TLS_SRTP_MAX_PROFILE_LIST_LENGTH elements
+ *                          (excluding the terminating MBEDTLS_TLS_SRTP_UNSET).
+ *
+ * \return                  0 on success
+ * \return                  #MBEDTLS_ERR_SSL_BAD_INPUT_DATA when the list of
+ *                          protection profiles is incorrect.
+ */
+int mbedtls_ssl_conf_dtls_srtp_protection_profiles
+                               ( mbedtls_ssl_config *conf,
+                                 const mbedtls_ssl_srtp_profile *profiles );
+
+/**
+ * \brief                  Set the mki_value for the current DTLS-SRTP session.
+ *
+ * \param ssl              SSL context to use.
+ * \param mki_value        The MKI value to set.
+ * \param mki_len          The length of the MKI value.
+ *
+ * \note                   This function is relevant on client side only.
+ *                         The server discovers the mki value during handshake.
+ *                         A mki value set on server side using this function
+ *                         is ignored.
+ *
+ * \return                 0 on success
+ * \return                 #MBEDTLS_ERR_SSL_BAD_INPUT_DATA
+ * \return                 #MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE
+ */
+int mbedtls_ssl_dtls_srtp_set_mki_value( mbedtls_ssl_context *ssl,
+                                         unsigned char *mki_value,
+                                         uint16_t mki_len );
+/**
+ * \brief                  Get the negotiated DTLS-SRTP informations:
+ *                         Protection profile and MKI value.
+ *
+ * \warning                This function must be called after the handshake is
+ *                         completed. The value returned by this function must
+ *                         not be trusted or acted upon before the handshake completes.
+ *
+ * \param ssl              The SSL context to query.
+ * \param dtls_srtp_info   The negotiated DTLS-SRTP informations:
+ *                         - Protection profile in use.
+ *                         A direct mapping of the iana defined value for protection
+ *                         profile on an uint16_t.
+                   http://www.iana.org/assignments/srtp-protection/srtp-protection.xhtml
+ *                         #MBEDTLS_TLS_SRTP_UNSET if the use of SRTP was not negotiated
+ *                         or peer's Hello packet was not parsed yet.
+ *                         - mki size and value( if size is > 0 ).
+ */
+void mbedtls_ssl_get_dtls_srtp_negotiation_result( const mbedtls_ssl_context *ssl,
+                                                   mbedtls_dtls_srtp_info *dtls_srtp_info );
+#endif /* MBEDTLS_SSL_DTLS_SRTP */
+
+/**
+ * \brief          Set the maximum supported version sent from the client side
+ *                 and/or accepted at the server side
+ *                 (Default: MBEDTLS_SSL_MAX_MAJOR_VERSION, MBEDTLS_SSL_MAX_MINOR_VERSION)
+ *
+ * \note           This ignores ciphersuites from higher versions.
+ *
+ * \note           With DTLS, use MBEDTLS_SSL_MINOR_VERSION_2 for DTLS 1.0 and
+ *                 MBEDTLS_SSL_MINOR_VERSION_3 for DTLS 1.2
+ *
+ * \param conf     SSL configuration
+ * \param major    Major version number (only MBEDTLS_SSL_MAJOR_VERSION_3 supported)
+ * \param minor    Minor version number (MBEDTLS_SSL_MINOR_VERSION_0,
+ *                 MBEDTLS_SSL_MINOR_VERSION_1 and MBEDTLS_SSL_MINOR_VERSION_2,
+ *                 MBEDTLS_SSL_MINOR_VERSION_3 supported)
+ */
+void mbedtls_ssl_conf_max_version( mbedtls_ssl_config *conf, int major, int minor );
+
+/**
+ * \brief          Set the minimum accepted SSL/TLS protocol version
+ *                 (Default: TLS 1.0)
+ *
+ * \note           Input outside of the SSL_MAX_XXXXX_VERSION and
+ *                 SSL_MIN_XXXXX_VERSION range is ignored.
+ *
+ * \note           MBEDTLS_SSL_MINOR_VERSION_0 (SSL v3) should be avoided.
+ *
+ * \note           With DTLS, use MBEDTLS_SSL_MINOR_VERSION_2 for DTLS 1.0 and
+ *                 MBEDTLS_SSL_MINOR_VERSION_3 for DTLS 1.2
+ *
+ * \param conf     SSL configuration
+ * \param major    Major version number (only MBEDTLS_SSL_MAJOR_VERSION_3 supported)
+ * \param minor    Minor version number (MBEDTLS_SSL_MINOR_VERSION_0,
+ *                 MBEDTLS_SSL_MINOR_VERSION_1 and MBEDTLS_SSL_MINOR_VERSION_2,
+ *                 MBEDTLS_SSL_MINOR_VERSION_3 supported)
+ */
+void mbedtls_ssl_conf_min_version( mbedtls_ssl_config *conf, int major, int minor );
+
+#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C)
+/**
+ * \brief          Set the fallback flag (client-side only).
+ *                 (Default: MBEDTLS_SSL_IS_NOT_FALLBACK).
+ *
+ * \note           Set to MBEDTLS_SSL_IS_FALLBACK when preparing a fallback
+ *                 connection, that is a connection with max_version set to a
+ *                 lower value than the value you're willing to use. Such
+ *                 fallback connections are not recommended but are sometimes
+ *                 necessary to interoperate with buggy (version-intolerant)
+ *                 servers.
+ *
+ * \warning        You should NOT set this to MBEDTLS_SSL_IS_FALLBACK for
+ *                 non-fallback connections! This would appear to work for a
+ *                 while, then cause failures when the server is upgraded to
+ *                 support a newer TLS version.
+ *
+ * \param conf     SSL configuration
+ * \param fallback MBEDTLS_SSL_IS_NOT_FALLBACK or MBEDTLS_SSL_IS_FALLBACK
+ */
+void mbedtls_ssl_conf_fallback( mbedtls_ssl_config *conf, char fallback );
+#endif /* MBEDTLS_SSL_FALLBACK_SCSV && MBEDTLS_SSL_CLI_C */
+
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+/**
+ * \brief           Enable or disable Encrypt-then-MAC
+ *                  (Default: MBEDTLS_SSL_ETM_ENABLED)
+ *
+ * \note            This should always be enabled, it is a security
+ *                  improvement, and should not cause any interoperability
+ *                  issue (used only if the peer supports it too).
+ *
+ * \param conf      SSL configuration
+ * \param etm       MBEDTLS_SSL_ETM_ENABLED or MBEDTLS_SSL_ETM_DISABLED
+ */
+void mbedtls_ssl_conf_encrypt_then_mac( mbedtls_ssl_config *conf, char etm );
+#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */
+
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+/**
+ * \brief           Enable or disable Extended Master Secret negotiation.
+ *                  (Default: MBEDTLS_SSL_EXTENDED_MS_ENABLED)
+ *
+ * \note            This should always be enabled, it is a security fix to the
+ *                  protocol, and should not cause any interoperability issue
+ *                  (used only if the peer supports it too).
+ *
+ * \param conf      SSL configuration
+ * \param ems       MBEDTLS_SSL_EXTENDED_MS_ENABLED or MBEDTLS_SSL_EXTENDED_MS_DISABLED
+ */
+void mbedtls_ssl_conf_extended_master_secret( mbedtls_ssl_config *conf, char ems );
+#endif /* MBEDTLS_SSL_EXTENDED_MASTER_SECRET */
+
+#if defined(MBEDTLS_ARC4_C)
+/**
+ * \brief          Disable or enable support for RC4
+ *                 (Default: MBEDTLS_SSL_ARC4_DISABLED)
+ *
+ * \warning        Use of RC4 in DTLS/TLS has been prohibited by RFC 7465
+ *                 for security reasons. Use at your own risk.
+ *
+ * \note           This function is deprecated and will be removed in
+ *                 a future version of the library.
+ *                 RC4 is disabled by default at compile time and needs to be
+ *                 actively enabled for use with legacy systems.
+ *
+ * \param conf     SSL configuration
+ * \param arc4     MBEDTLS_SSL_ARC4_ENABLED or MBEDTLS_SSL_ARC4_DISABLED
+ */
+void mbedtls_ssl_conf_arc4_support( mbedtls_ssl_config *conf, char arc4 );
+#endif /* MBEDTLS_ARC4_C */
+
+#if defined(MBEDTLS_SSL_SRV_C)
+/**
+ * \brief          Whether to send a list of acceptable CAs in
+ *                 CertificateRequest messages.
+ *                 (Default: do send)
+ *
+ * \param conf     SSL configuration
+ * \param cert_req_ca_list   MBEDTLS_SSL_CERT_REQ_CA_LIST_ENABLED or
+ *                          MBEDTLS_SSL_CERT_REQ_CA_LIST_DISABLED
+ */
+void mbedtls_ssl_conf_cert_req_ca_list( mbedtls_ssl_config *conf,
+                                          char cert_req_ca_list );
+#endif /* MBEDTLS_SSL_SRV_C */
+
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+/**
+ * \brief          Set the maximum fragment length to emit and/or negotiate.
+ *                 (Typical: the smaller of #MBEDTLS_SSL_IN_CONTENT_LEN and
+ *                 #MBEDTLS_SSL_OUT_CONTENT_LEN, usually `2^14` bytes)
+ *                 (Server: set maximum fragment length to emit,
+ *                 usually negotiated by the client during handshake)
+ *                 (Client: set maximum fragment length to emit *and*
+ *                 negotiate with the server during handshake)
+ *                 (Default: #MBEDTLS_SSL_MAX_FRAG_LEN_NONE)
+ *
+ * \note           On the client side, the maximum fragment length extension
+ *                 *will not* be used, unless the maximum fragment length has
+ *                 been set via this function to a value different than
+ *                 #MBEDTLS_SSL_MAX_FRAG_LEN_NONE.
+ *
+ * \note           With TLS, this currently only affects ApplicationData (sent
+ *                 with \c mbedtls_ssl_read()), not handshake messages.
+ *                 With DTLS, this affects both ApplicationData and handshake.
+ *
+ * \note           This sets the maximum length for a record's payload,
+ *                 excluding record overhead that will be added to it, see
+ *                 \c mbedtls_ssl_get_record_expansion().
+ *
+ * \note           For DTLS, it is also possible to set a limit for the total
+ *                 size of daragrams passed to the transport layer, including
+ *                 record overhead, see \c mbedtls_ssl_set_mtu().
+ *
+ * \param conf     SSL configuration
+ * \param mfl_code Code for maximum fragment length (allowed values:
+ *                 MBEDTLS_SSL_MAX_FRAG_LEN_512,  MBEDTLS_SSL_MAX_FRAG_LEN_1024,
+ *                 MBEDTLS_SSL_MAX_FRAG_LEN_2048, MBEDTLS_SSL_MAX_FRAG_LEN_4096)
+ *
+ * \return         0 if successful or MBEDTLS_ERR_SSL_BAD_INPUT_DATA
+ */
+int mbedtls_ssl_conf_max_frag_len( mbedtls_ssl_config *conf, unsigned char mfl_code );
+#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
+
+#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
+/**
+ * \brief          Activate negotiation of truncated HMAC
+ *                 (Default: MBEDTLS_SSL_TRUNC_HMAC_DISABLED)
+ *
+ * \param conf     SSL configuration
+ * \param truncate Enable or disable (MBEDTLS_SSL_TRUNC_HMAC_ENABLED or
+ *                                    MBEDTLS_SSL_TRUNC_HMAC_DISABLED)
+ */
+void mbedtls_ssl_conf_truncated_hmac( mbedtls_ssl_config *conf, int truncate );
+#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */
+
+#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
+/**
+ * \brief          Enable / Disable 1/n-1 record splitting
+ *                 (Default: MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED)
+ *
+ * \note           Only affects SSLv3 and TLS 1.0, not higher versions.
+ *                 Does not affect non-CBC ciphersuites in any version.
+ *
+ * \param conf     SSL configuration
+ * \param split    MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED or
+ *                 MBEDTLS_SSL_CBC_RECORD_SPLITTING_DISABLED
+ */
+void mbedtls_ssl_conf_cbc_record_splitting( mbedtls_ssl_config *conf, char split );
+#endif /* MBEDTLS_SSL_CBC_RECORD_SPLITTING */
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_CLI_C)
+/**
+ * \brief          Enable / Disable session tickets (client only).
+ *                 (Default: MBEDTLS_SSL_SESSION_TICKETS_ENABLED.)
+ *
+ * \note           On server, use \c mbedtls_ssl_conf_session_tickets_cb().
+ *
+ * \param conf     SSL configuration
+ * \param use_tickets   Enable or disable (MBEDTLS_SSL_SESSION_TICKETS_ENABLED or
+ *                                         MBEDTLS_SSL_SESSION_TICKETS_DISABLED)
+ */
+void mbedtls_ssl_conf_session_tickets( mbedtls_ssl_config *conf, int use_tickets );
+#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_CLI_C */
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+/**
+ * \brief          Enable / Disable renegotiation support for connection when
+ *                 initiated by peer
+ *                 (Default: MBEDTLS_SSL_RENEGOTIATION_DISABLED)
+ *
+ * \warning        It is recommended to always disable renegotation unless you
+ *                 know you need it and you know what you're doing. In the
+ *                 past, there have been several issues associated with
+ *                 renegotiation or a poor understanding of its properties.
+ *
+ * \note           Server-side, enabling renegotiation also makes the server
+ *                 susceptible to a resource DoS by a malicious client.
+ *
+ * \param conf    SSL configuration
+ * \param renegotiation     Enable or disable (MBEDTLS_SSL_RENEGOTIATION_ENABLED or
+ *                                             MBEDTLS_SSL_RENEGOTIATION_DISABLED)
+ */
+void mbedtls_ssl_conf_renegotiation( mbedtls_ssl_config *conf, int renegotiation );
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+/**
+ * \brief          Prevent or allow legacy renegotiation.
+ *                 (Default: MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION)
+ *
+ *                 MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION allows connections to
+ *                 be established even if the peer does not support
+ *                 secure renegotiation, but does not allow renegotiation
+ *                 to take place if not secure.
+ *                 (Interoperable and secure option)
+ *
+ *                 MBEDTLS_SSL_LEGACY_ALLOW_RENEGOTIATION allows renegotiations
+ *                 with non-upgraded peers. Allowing legacy renegotiation
+ *                 makes the connection vulnerable to specific man in the
+ *                 middle attacks. (See RFC 5746)
+ *                 (Most interoperable and least secure option)
+ *
+ *                 MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE breaks off connections
+ *                 if peer does not support secure renegotiation. Results
+ *                 in interoperability issues with non-upgraded peers
+ *                 that do not support renegotiation altogether.
+ *                 (Most secure option, interoperability issues)
+ *
+ * \param conf     SSL configuration
+ * \param allow_legacy  Prevent or allow (SSL_NO_LEGACY_RENEGOTIATION,
+ *                                        SSL_ALLOW_LEGACY_RENEGOTIATION or
+ *                                        MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE)
+ */
+void mbedtls_ssl_conf_legacy_renegotiation( mbedtls_ssl_config *conf, int allow_legacy );
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+/**
+ * \brief          Enforce renegotiation requests.
+ *                 (Default: enforced, max_records = 16)
+ *
+ *                 When we request a renegotiation, the peer can comply or
+ *                 ignore the request. This function allows us to decide
+ *                 whether to enforce our renegotiation requests by closing
+ *                 the connection if the peer doesn't comply.
+ *
+ *                 However, records could already be in transit from the peer
+ *                 when the request is emitted. In order to increase
+ *                 reliability, we can accept a number of records before the
+ *                 expected handshake records.
+ *
+ *                 The optimal value is highly dependent on the specific usage
+ *                 scenario.
+ *
+ * \note           With DTLS and server-initiated renegotiation, the
+ *                 HelloRequest is retransmited every time mbedtls_ssl_read() times
+ *                 out or receives Application Data, until:
+ *                 - max_records records have beens seen, if it is >= 0, or
+ *                 - the number of retransmits that would happen during an
+ *                 actual handshake has been reached.
+ *                 Please remember the request might be lost a few times
+ *                 if you consider setting max_records to a really low value.
+ *
+ * \warning        On client, the grace period can only happen during
+ *                 mbedtls_ssl_read(), as opposed to mbedtls_ssl_write() and mbedtls_ssl_renegotiate()
+ *                 which always behave as if max_record was 0. The reason is,
+ *                 if we receive application data from the server, we need a
+ *                 place to write it, which only happens during mbedtls_ssl_read().
+ *
+ * \param conf     SSL configuration
+ * \param max_records Use MBEDTLS_SSL_RENEGOTIATION_NOT_ENFORCED if you don't want to
+ *                 enforce renegotiation, or a non-negative value to enforce
+ *                 it but allow for a grace period of max_records records.
+ */
+void mbedtls_ssl_conf_renegotiation_enforced( mbedtls_ssl_config *conf, int max_records );
+
+/**
+ * \brief          Set record counter threshold for periodic renegotiation.
+ *                 (Default: 2^48 - 1)
+ *
+ *                 Renegotiation is automatically triggered when a record
+ *                 counter (outgoing or incoming) crosses the defined
+ *                 threshold. The default value is meant to prevent the
+ *                 connection from being closed when the counter is about to
+ *                 reached its maximal value (it is not allowed to wrap).
+ *
+ *                 Lower values can be used to enforce policies such as "keys
+ *                 must be refreshed every N packets with cipher X".
+ *
+ *                 The renegotiation period can be disabled by setting
+ *                 conf->disable_renegotiation to
+ *                 MBEDTLS_SSL_RENEGOTIATION_DISABLED.
+ *
+ * \note           When the configured transport is
+ *                 MBEDTLS_SSL_TRANSPORT_DATAGRAM the maximum renegotiation
+ *                 period is 2^48 - 1, and for MBEDTLS_SSL_TRANSPORT_STREAM,
+ *                 the maximum renegotiation period is 2^64 - 1.
+ *
+ * \param conf     SSL configuration
+ * \param period   The threshold value: a big-endian 64-bit number.
+ */
+void mbedtls_ssl_conf_renegotiation_period( mbedtls_ssl_config *conf,
+                                   const unsigned char period[8] );
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+/**
+ * \brief          Check if there is data already read from the
+ *                 underlying transport but not yet processed.
+ *
+ * \param ssl      SSL context
+ *
+ * \return         0 if nothing's pending, 1 otherwise.
+ *
+ * \note           This is different in purpose and behaviour from
+ *                 \c mbedtls_ssl_get_bytes_avail in that it considers
+ *                 any kind of unprocessed data, not only unread
+ *                 application data. If \c mbedtls_ssl_get_bytes
+ *                 returns a non-zero value, this function will
+ *                 also signal pending data, but the converse does
+ *                 not hold. For example, in DTLS there might be
+ *                 further records waiting to be processed from
+ *                 the current underlying transport's datagram.
+ *
+ * \note           If this function returns 1 (data pending), this
+ *                 does not imply that a subsequent call to
+ *                 \c mbedtls_ssl_read will provide any data;
+ *                 e.g., the unprocessed data might turn out
+ *                 to be an alert or a handshake message.
+ *
+ * \note           This function is useful in the following situation:
+ *                 If the SSL/TLS module successfully returns from an
+ *                 operation - e.g. a handshake or an application record
+ *                 read - and you're awaiting incoming data next, you
+ *                 must not immediately idle on the underlying transport
+ *                 to have data ready, but you need to check the value
+ *                 of this function first. The reason is that the desired
+ *                 data might already be read but not yet processed.
+ *                 If, in contrast, a previous call to the SSL/TLS module
+ *                 returned MBEDTLS_ERR_SSL_WANT_READ, it is not necessary
+ *                 to call this function, as the latter error code entails
+ *                 that all internal data has been processed.
+ *
+ */
+int mbedtls_ssl_check_pending( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Return the number of application data bytes
+ *                 remaining to be read from the current record.
+ *
+ * \param ssl      SSL context
+ *
+ * \return         How many bytes are available in the application
+ *                 data record read buffer.
+ *
+ * \note           When working over a datagram transport, this is
+ *                 useful to detect the current datagram's boundary
+ *                 in case \c mbedtls_ssl_read has written the maximal
+ *                 amount of data fitting into the input buffer.
+ *
+ */
+size_t mbedtls_ssl_get_bytes_avail( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Return the result of the certificate verification
+ *
+ * \param ssl      The SSL context to use.
+ *
+ * \return         \c 0 if the certificate verification was successful.
+ * \return         \c -1u if the result is not available. This may happen
+ *                 e.g. if the handshake aborts early, or a verification
+ *                 callback returned a fatal error.
+ * \return         A bitwise combination of \c MBEDTLS_X509_BADCERT_XXX
+ *                 and \c MBEDTLS_X509_BADCRL_XXX failure flags; see x509.h.
+ */
+uint32_t mbedtls_ssl_get_verify_result( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Return the name of the current ciphersuite
+ *
+ * \param ssl      SSL context
+ *
+ * \return         a string containing the ciphersuite name
+ */
+const char *mbedtls_ssl_get_ciphersuite( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Return the current SSL version (SSLv3/TLSv1/etc)
+ *
+ * \param ssl      SSL context
+ *
+ * \return         a string containing the SSL version
+ */
+const char *mbedtls_ssl_get_version( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Return the (maximum) number of bytes added by the record
+ *                 layer: header + encryption/MAC overhead (inc. padding)
+ *
+ * \note           This function is not available (always returns an error)
+ *                 when record compression is enabled.
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Current maximum record expansion in bytes, or
+ *                 MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE if compression is
+ *                 enabled, which makes expansion much less predictable
+ */
+int mbedtls_ssl_get_record_expansion( const mbedtls_ssl_context *ssl );
+
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+/**
+ * \brief          Return the maximum fragment length (payload, in bytes) for
+ *                 the output buffer. For the client, this is the configured
+ *                 value. For the server, it is the minimum of two - the
+ *                 configured value and the negotiated one.
+ *
+ * \sa             mbedtls_ssl_conf_max_frag_len()
+ * \sa             mbedtls_ssl_get_max_record_payload()
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Current maximum fragment length for the output buffer.
+ */
+size_t mbedtls_ssl_get_output_max_frag_len( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Return the maximum fragment length (payload, in bytes) for
+ *                 the input buffer. This is the negotiated maximum fragment
+ *                 length, or, if there is none, MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *                 If it is not defined either, the value is 2^14. This function
+ *                 works as its predecessor, \c mbedtls_ssl_get_max_frag_len().
+ *
+ * \sa             mbedtls_ssl_conf_max_frag_len()
+ * \sa             mbedtls_ssl_get_max_record_payload()
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Current maximum fragment length for the output buffer.
+ */
+size_t mbedtls_ssl_get_input_max_frag_len( const mbedtls_ssl_context *ssl );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED    __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
+/**
+ * \brief          This function is a deprecated approach to getting the max
+ *                 fragment length. Its an alias for
+ *                 \c mbedtls_ssl_get_output_max_frag_len(), as the behaviour
+ *                 is the same. See \c mbedtls_ssl_get_output_max_frag_len() for
+ *                 more detail.
+ *
+ * \sa             mbedtls_ssl_get_input_max_frag_len()
+ * \sa             mbedtls_ssl_get_output_max_frag_len()
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Current maximum fragment length for the output buffer.
+ */
+MBEDTLS_DEPRECATED size_t mbedtls_ssl_get_max_frag_len(
+                                        const mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
+
+/**
+ * \brief          Return the current maximum outgoing record payload in bytes.
+ *                 This takes into account the config.h setting \c
+ *                 MBEDTLS_SSL_OUT_CONTENT_LEN, the configured and negotiated
+ *                 max fragment length extension if used, and for DTLS the
+ *                 path MTU as configured and current record expansion.
+ *
+ * \note           With DTLS, \c mbedtls_ssl_write() will return an error if
+ *                 called with a larger length value.
+ *                 With TLS, \c mbedtls_ssl_write() will fragment the input if
+ *                 necessary and return the number of bytes written; it is up
+ *                 to the caller to call \c mbedtls_ssl_write() again in
+ *                 order to send the remaining bytes if any.
+ *
+ * \note           This function is not available (always returns an error)
+ *                 when record compression is enabled.
+ *
+ * \sa             mbedtls_ssl_set_mtu()
+ * \sa             mbedtls_ssl_get_output_max_frag_len()
+ * \sa             mbedtls_ssl_get_input_max_frag_len()
+ * \sa             mbedtls_ssl_get_record_expansion()
+ *
+ * \param ssl      SSL context
+ *
+ * \return         Current maximum payload for an outgoing record,
+ *                 or a negative error code.
+ */
+int mbedtls_ssl_get_max_out_record_payload( const mbedtls_ssl_context *ssl );
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief          Return the peer certificate from the current connection.
+ *
+ * \param  ssl     The SSL context to use. This must be initialized and setup.
+ *
+ * \return         The current peer certificate, if available.
+ *                 The returned certificate is owned by the SSL context and
+ *                 is valid only until the next call to the SSL API.
+ * \return         \c NULL if no peer certificate is available. This might
+ *                 be because the chosen ciphersuite doesn't use CRTs
+ *                 (PSK-based ciphersuites, for example), or because
+ *                 #MBEDTLS_SSL_KEEP_PEER_CERTIFICATE has been disabled,
+ *                 allowing the stack to free the peer's CRT to save memory.
+ *
+ * \note           For one-time inspection of the peer's certificate during
+ *                 the handshake, consider registering an X.509 CRT verification
+ *                 callback through mbedtls_ssl_conf_verify() instead of calling
+ *                 this function. Using mbedtls_ssl_conf_verify() also comes at
+ *                 the benefit of allowing you to influence the verification
+ *                 process, for example by masking expected and tolerated
+ *                 verification failures.
+ *
+ * \warning        You must not use the pointer returned by this function
+ *                 after any further call to the SSL API, including
+ *                 mbedtls_ssl_read() and mbedtls_ssl_write(); this is
+ *                 because the pointer might change during renegotiation,
+ *                 which happens transparently to the user.
+ *                 If you want to use the certificate across API calls,
+ *                 you must make a copy.
+ */
+const mbedtls_x509_crt *mbedtls_ssl_get_peer_cert( const mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_SSL_CLI_C)
+/**
+ * \brief          Save session in order to resume it later (client-side only)
+ *                 Session data is copied to presented session structure.
+ *
+ *
+ * \param ssl      SSL context
+ * \param session  session context
+ *
+ * \return         0 if successful,
+ *                 MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed,
+ *                 MBEDTLS_ERR_SSL_BAD_INPUT_DATA if used server-side or
+ *                 arguments are otherwise invalid.
+ *
+ * \note           Only the server certificate is copied, and not the full chain,
+ *                 so you should not attempt to validate the certificate again
+ *                 by calling \c mbedtls_x509_crt_verify() on it.
+ *                 Instead, you should use the results from the verification
+ *                 in the original handshake by calling \c mbedtls_ssl_get_verify_result()
+ *                 after loading the session again into a new SSL context
+ *                 using \c mbedtls_ssl_set_session().
+ *
+ * \note           Once the session object is not needed anymore, you should
+ *                 free it by calling \c mbedtls_ssl_session_free().
+ *
+ * \sa             mbedtls_ssl_set_session()
+ */
+int mbedtls_ssl_get_session( const mbedtls_ssl_context *ssl, mbedtls_ssl_session *session );
+#endif /* MBEDTLS_SSL_CLI_C */
+
+/**
+ * \brief          Perform the SSL handshake
+ *
+ * \param ssl      SSL context
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_WANT_READ or #MBEDTLS_ERR_SSL_WANT_WRITE
+ *                 if the handshake is incomplete and waiting for data to
+ *                 be available for reading from or writing to the underlying
+ *                 transport - in this case you must call this function again
+ *                 when the underlying transport is ready for the operation.
+ * \return         #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if an asynchronous
+ *                 operation is in progress (see
+ *                 mbedtls_ssl_conf_async_private_cb()) - in this case you
+ *                 must call this function again when the operation is ready.
+ * \return         #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS if a cryptographic
+ *                 operation is in progress (see mbedtls_ecp_set_max_ops()) -
+ *                 in this case you must call this function again to complete
+ *                 the handshake when you're done attending other tasks.
+ * \return         #MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED if DTLS is in use
+ *                 and the client did not demonstrate reachability yet - in
+ *                 this case you must stop using the context (see below).
+ * \return         Another SSL error code - in this case you must stop using
+ *                 the context (see below).
+ *
+ * \warning        If this function returns something other than
+ *                 \c 0,
+ *                 #MBEDTLS_ERR_SSL_WANT_READ,
+ *                 #MBEDTLS_ERR_SSL_WANT_WRITE,
+ *                 #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS or
+ *                 #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS,
+ *                 you must stop using the SSL context for reading or writing,
+ *                 and either free it or call \c mbedtls_ssl_session_reset()
+ *                 on it before re-using it for a new connection; the current
+ *                 connection must be closed.
+ *
+ * \note           If DTLS is in use, then you may choose to handle
+ *                 #MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED specially for logging
+ *                 purposes, as it is an expected return value rather than an
+ *                 actual error, but you still need to reset/free the context.
+ *
+ * \note           Remarks regarding event-driven DTLS:
+ *                 If the function returns #MBEDTLS_ERR_SSL_WANT_READ, no datagram
+ *                 from the underlying transport layer is currently being processed,
+ *                 and it is safe to idle until the timer or the underlying transport
+ *                 signal a new event. This is not true for a successful handshake,
+ *                 in which case the datagram of the underlying transport that is
+ *                 currently being processed might or might not contain further
+ *                 DTLS records.
+ */
+int mbedtls_ssl_handshake( mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Perform a single step of the SSL handshake
+ *
+ * \note           The state of the context (ssl->state) will be at
+ *                 the next state after this function returns \c 0. Do not
+ *                 call this function if state is MBEDTLS_SSL_HANDSHAKE_OVER.
+ *
+ * \param ssl      SSL context
+ *
+ * \return         See mbedtls_ssl_handshake().
+ *
+ * \warning        If this function returns something other than \c 0,
+ *                 #MBEDTLS_ERR_SSL_WANT_READ, #MBEDTLS_ERR_SSL_WANT_WRITE,
+ *                 #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS or
+ *                 #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS, you must stop using
+ *                 the SSL context for reading or writing, and either free it
+ *                 or call \c mbedtls_ssl_session_reset() on it before
+ *                 re-using it for a new connection; the current connection
+ *                 must be closed.
+ */
+int mbedtls_ssl_handshake_step( mbedtls_ssl_context *ssl );
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+/**
+ * \brief          Initiate an SSL renegotiation on the running connection.
+ *                 Client: perform the renegotiation right now.
+ *                 Server: request renegotiation, which will be performed
+ *                 during the next call to mbedtls_ssl_read() if honored by
+ *                 client.
+ *
+ * \param ssl      SSL context
+ *
+ * \return         0 if successful, or any mbedtls_ssl_handshake() return
+ *                 value except #MBEDTLS_ERR_SSL_CLIENT_RECONNECT that can't
+ *                 happen during a renegotiation.
+ *
+ * \warning        If this function returns something other than \c 0,
+ *                 #MBEDTLS_ERR_SSL_WANT_READ, #MBEDTLS_ERR_SSL_WANT_WRITE,
+ *                 #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS or
+ *                 #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS, you must stop using
+ *                 the SSL context for reading or writing, and either free it
+ *                 or call \c mbedtls_ssl_session_reset() on it before
+ *                 re-using it for a new connection; the current connection
+ *                 must be closed.
+ *
+ */
+int mbedtls_ssl_renegotiate( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+/**
+ * \brief          Read at most 'len' application data bytes
+ *
+ * \param ssl      SSL context
+ * \param buf      buffer that will hold the data
+ * \param len      maximum number of bytes to read
+ *
+ * \return         The (positive) number of bytes read if successful.
+ * \return         \c 0 if the read end of the underlying transport was closed
+ *                 without sending a CloseNotify beforehand, which might happen
+ *                 because of various reasons (internal error of an underlying
+ *                 stack, non-conformant peer not sending a CloseNotify and
+ *                 such) - in this case you must stop using the context
+ *                 (see below).
+ * \return         #MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY if the underlying
+ *                 transport is still functional, but the peer has
+ *                 acknowledged to not send anything anymore.
+ * \return         #MBEDTLS_ERR_SSL_WANT_READ or #MBEDTLS_ERR_SSL_WANT_WRITE
+ *                 if the handshake is incomplete and waiting for data to
+ *                 be available for reading from or writing to the underlying
+ *                 transport - in this case you must call this function again
+ *                 when the underlying transport is ready for the operation.
+ * \return         #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if an asynchronous
+ *                 operation is in progress (see
+ *                 mbedtls_ssl_conf_async_private_cb()) - in this case you
+ *                 must call this function again when the operation is ready.
+ * \return         #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS if a cryptographic
+ *                 operation is in progress (see mbedtls_ecp_set_max_ops()) -
+ *                 in this case you must call this function again to complete
+ *                 the handshake when you're done attending other tasks.
+ * \return         #MBEDTLS_ERR_SSL_CLIENT_RECONNECT if we're at the server
+ *                 side of a DTLS connection and the client is initiating a
+ *                 new connection using the same source port. See below.
+ * \return         Another SSL error code - in this case you must stop using
+ *                 the context (see below).
+ *
+ * \warning        If this function returns something other than
+ *                 a positive value,
+ *                 #MBEDTLS_ERR_SSL_WANT_READ,
+ *                 #MBEDTLS_ERR_SSL_WANT_WRITE,
+ *                 #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS,
+ *                 #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS or
+ *                 #MBEDTLS_ERR_SSL_CLIENT_RECONNECT,
+ *                 you must stop using the SSL context for reading or writing,
+ *                 and either free it or call \c mbedtls_ssl_session_reset()
+ *                 on it before re-using it for a new connection; the current
+ *                 connection must be closed.
+ *
+ * \note           When this function returns #MBEDTLS_ERR_SSL_CLIENT_RECONNECT
+ *                 (which can only happen server-side), it means that a client
+ *                 is initiating a new connection using the same source port.
+ *                 You can either treat that as a connection close and wait
+ *                 for the client to resend a ClientHello, or directly
+ *                 continue with \c mbedtls_ssl_handshake() with the same
+ *                 context (as it has been reset internally). Either way, you
+ *                 must make sure this is seen by the application as a new
+ *                 connection: application state, if any, should be reset, and
+ *                 most importantly the identity of the client must be checked
+ *                 again. WARNING: not validating the identity of the client
+ *                 again, or not transmitting the new identity to the
+ *                 application layer, would allow authentication bypass!
+ *
+ * \note           Remarks regarding event-driven DTLS:
+ *                 - If the function returns #MBEDTLS_ERR_SSL_WANT_READ, no datagram
+ *                   from the underlying transport layer is currently being processed,
+ *                   and it is safe to idle until the timer or the underlying transport
+ *                   signal a new event.
+ *                 - This function may return MBEDTLS_ERR_SSL_WANT_READ even if data was
+ *                   initially available on the underlying transport, as this data may have
+ *                   been only e.g. duplicated messages or a renegotiation request.
+ *                   Therefore, you must be prepared to receive MBEDTLS_ERR_SSL_WANT_READ even
+ *                   when reacting to an incoming-data event from the underlying transport.
+ *                 - On success, the datagram of the underlying transport that is currently
+ *                   being processed may contain further DTLS records. You should call
+ *                   \c mbedtls_ssl_check_pending to check for remaining records.
+ *
+ */
+int mbedtls_ssl_read( mbedtls_ssl_context *ssl, unsigned char *buf, size_t len );
+
+/**
+ * \brief          Try to write exactly 'len' application data bytes
+ *
+ * \warning        This function will do partial writes in some cases. If the
+ *                 return value is non-negative but less than length, the
+ *                 function must be called again with updated arguments:
+ *                 buf + ret, len - ret (if ret is the return value) until
+ *                 it returns a value equal to the last 'len' argument.
+ *
+ * \param ssl      SSL context
+ * \param buf      buffer holding the data
+ * \param len      how many bytes must be written
+ *
+ * \return         The (non-negative) number of bytes actually written if
+ *                 successful (may be less than \p len).
+ * \return         #MBEDTLS_ERR_SSL_WANT_READ or #MBEDTLS_ERR_SSL_WANT_WRITE
+ *                 if the handshake is incomplete and waiting for data to
+ *                 be available for reading from or writing to the underlying
+ *                 transport - in this case you must call this function again
+ *                 when the underlying transport is ready for the operation.
+ * \return         #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if an asynchronous
+ *                 operation is in progress (see
+ *                 mbedtls_ssl_conf_async_private_cb()) - in this case you
+ *                 must call this function again when the operation is ready.
+ * \return         #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS if a cryptographic
+ *                 operation is in progress (see mbedtls_ecp_set_max_ops()) -
+ *                 in this case you must call this function again to complete
+ *                 the handshake when you're done attending other tasks.
+ * \return         Another SSL error code - in this case you must stop using
+ *                 the context (see below).
+ *
+ * \warning        If this function returns something other than
+ *                 a non-negative value,
+ *                 #MBEDTLS_ERR_SSL_WANT_READ,
+ *                 #MBEDTLS_ERR_SSL_WANT_WRITE,
+ *                 #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS or
+ *                 #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS,
+ *                 you must stop using the SSL context for reading or writing,
+ *                 and either free it or call \c mbedtls_ssl_session_reset()
+ *                 on it before re-using it for a new connection; the current
+ *                 connection must be closed.
+ *
+ * \note           When this function returns #MBEDTLS_ERR_SSL_WANT_WRITE/READ,
+ *                 it must be called later with the *same* arguments,
+ *                 until it returns a value greater that or equal to 0. When
+ *                 the function returns #MBEDTLS_ERR_SSL_WANT_WRITE there may be
+ *                 some partial data in the output buffer, however this is not
+ *                 yet sent.
+ *
+ * \note           If the requested length is greater than the maximum
+ *                 fragment length (either the built-in limit or the one set
+ *                 or negotiated with the peer), then:
+ *                 - with TLS, less bytes than requested are written.
+ *                 - with DTLS, MBEDTLS_ERR_SSL_BAD_INPUT_DATA is returned.
+ *                 \c mbedtls_ssl_get_output_max_frag_len() may be used to
+ *                 query the active maximum fragment length.
+ *
+ * \note           Attempting to write 0 bytes will result in an empty TLS
+ *                 application record being sent.
+ */
+int mbedtls_ssl_write( mbedtls_ssl_context *ssl, const unsigned char *buf, size_t len );
+
+/**
+ * \brief           Send an alert message
+ *
+ * \param ssl       SSL context
+ * \param level     The alert level of the message
+ *                  (MBEDTLS_SSL_ALERT_LEVEL_WARNING or MBEDTLS_SSL_ALERT_LEVEL_FATAL)
+ * \param message   The alert message (SSL_ALERT_MSG_*)
+ *
+ * \return          0 if successful, or a specific SSL error code.
+ *
+ * \note           If this function returns something other than 0 or
+ *                 MBEDTLS_ERR_SSL_WANT_READ/WRITE, you must stop using
+ *                 the SSL context for reading or writing, and either free it or
+ *                 call \c mbedtls_ssl_session_reset() on it before re-using it
+ *                 for a new connection; the current connection must be closed.
+ */
+int mbedtls_ssl_send_alert_message( mbedtls_ssl_context *ssl,
+                            unsigned char level,
+                            unsigned char message );
+/**
+ * \brief          Notify the peer that the connection is being closed
+ *
+ * \param ssl      SSL context
+ *
+ * \return          0 if successful, or a specific SSL error code.
+ *
+ * \note           If this function returns something other than 0 or
+ *                 MBEDTLS_ERR_SSL_WANT_READ/WRITE, you must stop using
+ *                 the SSL context for reading or writing, and either free it or
+ *                 call \c mbedtls_ssl_session_reset() on it before re-using it
+ *                 for a new connection; the current connection must be closed.
+ */
+int mbedtls_ssl_close_notify( mbedtls_ssl_context *ssl );
+
+/**
+ * \brief          Free referenced items in an SSL context and clear memory
+ *
+ * \param ssl      SSL context
+ */
+void mbedtls_ssl_free( mbedtls_ssl_context *ssl );
+
+#if defined(MBEDTLS_SSL_CONTEXT_SERIALIZATION)
+/**
+ * \brief          Save an active connection as serialized data in a buffer.
+ *                 This allows the freeing or re-using of the SSL context
+ *                 while still picking up the connection later in a way that
+ *                 it entirely transparent to the peer.
+ *
+ * \see            mbedtls_ssl_context_load()
+ *
+ * \note           This feature is currently only available under certain
+ *                 conditions, see the documentation of the return value
+ *                 #MBEDTLS_ERR_SSL_BAD_INPUT_DATA for details.
+ *
+ * \note           When this function succeeds, it calls
+ *                 mbedtls_ssl_session_reset() on \p ssl which as a result is
+ *                 no longer associated with the connection that has been
+ *                 serialized. This avoids creating copies of the connection
+ *                 state. You're then free to either re-use the context
+ *                 structure for a different connection, or call
+ *                 mbedtls_ssl_free() on it. See the documentation of
+ *                 mbedtls_ssl_session_reset() for more details.
+ *
+ * \param ssl      The SSL context to save. On success, it is no longer
+ *                 associated with the connection that has been serialized.
+ * \param buf      The buffer to write the serialized data to. It must be a
+ *                 writeable buffer of at least \p buf_len bytes, or may be \c
+ *                 NULL if \p buf_len is \c 0.
+ * \param buf_len  The number of bytes available for writing in \p buf.
+ * \param olen     The size in bytes of the data that has been or would have
+ *                 been written. It must point to a valid \c size_t.
+ *
+ * \note           \p olen is updated to the correct value regardless of
+ *                 whether \p buf_len was large enough. This makes it possible
+ *                 to determine the necessary size by calling this function
+ *                 with \p buf set to \c NULL and \p buf_len to \c 0. However,
+ *                 the value of \p olen is only guaranteed to be correct when
+ *                 the function returns #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL or
+ *                 \c 0. If the return value is different, then the value of
+ *                 \p olen is undefined.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL if \p buf is too small.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed
+ *                 while reseting the context.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if a handshake is in
+ *                 progress, or there is pending data for reading or sending,
+ *                 or the connection does not use DTLS 1.2 with an AEAD
+ *                 ciphersuite, or renegotiation is enabled.
+ */
+int mbedtls_ssl_context_save( mbedtls_ssl_context *ssl,
+                              unsigned char *buf,
+                              size_t buf_len,
+                              size_t *olen );
+
+/**
+ * \brief          Load serialized connection data to an SSL context.
+ *
+ * \see            mbedtls_ssl_context_save()
+ *
+ * \warning        The same serialized data must never be loaded into more
+ *                 that one context. In order to ensure that, after
+ *                 successfully loading serialized data to an SSL context, you
+ *                 should immediately destroy or invalidate all copies of the
+ *                 serialized data that was loaded. Loading the same data in
+ *                 more than one context would cause severe security failures
+ *                 including but not limited to loss of confidentiality.
+ *
+ * \note           Before calling this function, the SSL context must be
+ *                 prepared in one of the two following ways. The first way is
+ *                 to take a context freshly initialised with
+ *                 mbedtls_ssl_init() and call mbedtls_ssl_setup() on it with
+ *                 the same ::mbedtls_ssl_config structure that was used in
+ *                 the original connection. The second way is to
+ *                 call mbedtls_ssl_session_reset() on a context that was
+ *                 previously prepared as above but used in the meantime.
+ *                 Either way, you must not use the context to perform a
+ *                 handshake between calling mbedtls_ssl_setup() or
+ *                 mbedtls_ssl_session_reset() and calling this function. You
+ *                 may however call other setter functions in that time frame
+ *                 as indicated in the note below.
+ *
+ * \note           Before or after calling this function successfully, you
+ *                 also need to configure some connection-specific callbacks
+ *                 and settings before you can use the connection again
+ *                 (unless they were already set before calling
+ *                 mbedtls_ssl_session_reset() and the values are suitable for
+ *                 the present connection). Specifically, you want to call
+ *                 at least mbedtls_ssl_set_bio() and
+ *                 mbedtls_ssl_set_timer_cb(). All other SSL setter functions
+ *                 are not necessary to call, either because they're only used
+ *                 in handshakes, or because the setting is already saved. You
+ *                 might choose to call them anyway, for example in order to
+ *                 share code between the cases of establishing a new
+ *                 connection and the case of loading an already-established
+ *                 connection.
+ *
+ * \note           If you have new information about the path MTU, you want to
+ *                 call mbedtls_ssl_set_mtu() after calling this function, as
+ *                 otherwise this function would overwrite your
+ *                 newly-configured value with the value that was active when
+ *                 the context was saved.
+ *
+ * \note           When this function returns an error code, it calls
+ *                 mbedtls_ssl_free() on \p ssl. In this case, you need to
+ *                 prepare the context with the usual sequence starting with a
+ *                 call to mbedtls_ssl_init() if you want to use it again.
+ *
+ * \param ssl      The SSL context structure to be populated. It must have
+ *                 been prepared as described in the note above.
+ * \param buf      The buffer holding the serialized connection data. It must
+ *                 be a readable buffer of at least \p len bytes.
+ * \param len      The size of the serialized data in bytes.
+ *
+ * \return         \c 0 if successful.
+ * \return         #MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed.
+ * \return         #MBEDTLS_ERR_SSL_VERSION_MISMATCH if the serialized data
+ *                 comes from a different Mbed TLS version or build.
+ * \return         #MBEDTLS_ERR_SSL_BAD_INPUT_DATA if input data is invalid.
+ */
+int mbedtls_ssl_context_load( mbedtls_ssl_context *ssl,
+                              const unsigned char *buf,
+                              size_t len );
+#endif /* MBEDTLS_SSL_CONTEXT_SERIALIZATION */
+
+/**
+ * \brief          Initialize an SSL configuration context
+ *                 Just makes the context ready for
+ *                 mbedtls_ssl_config_defaults() or mbedtls_ssl_config_free().
+ *
+ * \note           You need to call mbedtls_ssl_config_defaults() unless you
+ *                 manually set all of the relevant fields yourself.
+ *
+ * \param conf     SSL configuration context
+ */
+void mbedtls_ssl_config_init( mbedtls_ssl_config *conf );
+
+/**
+ * \brief          Load reasonnable default SSL configuration values.
+ *                 (You need to call mbedtls_ssl_config_init() first.)
+ *
+ * \param conf     SSL configuration context
+ * \param endpoint MBEDTLS_SSL_IS_CLIENT or MBEDTLS_SSL_IS_SERVER
+ * \param transport MBEDTLS_SSL_TRANSPORT_STREAM for TLS, or
+ *                  MBEDTLS_SSL_TRANSPORT_DATAGRAM for DTLS
+ * \param preset   a MBEDTLS_SSL_PRESET_XXX value
+ *
+ * \note           See \c mbedtls_ssl_conf_transport() for notes on DTLS.
+ *
+ * \return         0 if successful, or
+ *                 MBEDTLS_ERR_XXX_ALLOC_FAILED on memory allocation error.
+ */
+int mbedtls_ssl_config_defaults( mbedtls_ssl_config *conf,
+                                 int endpoint, int transport, int preset );
+
+/**
+ * \brief          Free an SSL configuration context
+ *
+ * \param conf     SSL configuration context
+ */
+void mbedtls_ssl_config_free( mbedtls_ssl_config *conf );
+
+/**
+ * \brief          Initialize SSL session structure
+ *
+ * \param session  SSL session
+ */
+void mbedtls_ssl_session_init( mbedtls_ssl_session *session );
+
+/**
+ * \brief          Free referenced items in an SSL session including the
+ *                 peer certificate and clear memory
+ *
+ * \note           A session object can be freed even if the SSL context
+ *                 that was used to retrieve the session is still in use.
+ *
+ * \param session  SSL session
+ */
+void mbedtls_ssl_session_free( mbedtls_ssl_session *session );
+
+/**
+ * \brief          TLS-PRF function for key derivation.
+ *
+ * \param prf      The tls_prf type function type to be used.
+ * \param secret   Secret for the key derivation function.
+ * \param slen     Length of the secret.
+ * \param label    String label for the key derivation function,
+ *                 terminated with null character.
+ * \param random   Random bytes.
+ * \param rlen     Length of the random bytes buffer.
+ * \param dstbuf   The buffer holding the derived key.
+ * \param dlen     Length of the output buffer.
+ *
+ * \return         0 on success. An SSL specific error on failure.
+ */
+int  mbedtls_ssl_tls_prf( const mbedtls_tls_prf_types prf,
+                          const unsigned char *secret, size_t slen,
+                          const char *label,
+                          const unsigned char *random, size_t rlen,
+                          unsigned char *dstbuf, size_t dlen );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ssl.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h
new file mode 100644
index 00000000000..c6ef2960f4d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_cache.h
@@ -0,0 +1,149 @@
+/**
+ * \file ssl_cache.h
+ *
+ * \brief SSL session cache implementation
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_SSL_CACHE_H
+#define MBEDTLS_SSL_CACHE_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/ssl.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "mbedtls/threading.h"
+#endif
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT)
+#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT       86400   /*!< 1 day  */
+#endif
+
+#if !defined(MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES)
+#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES      50   /*!< Maximum entries in cache */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct mbedtls_ssl_cache_context mbedtls_ssl_cache_context;
+typedef struct mbedtls_ssl_cache_entry mbedtls_ssl_cache_entry;
+
+/**
+ * \brief   This structure is used for storing cache entries
+ */
+struct mbedtls_ssl_cache_entry
+{
+#if defined(MBEDTLS_HAVE_TIME)
+    mbedtls_time_t timestamp;           /*!< entry timestamp    */
+#endif
+    mbedtls_ssl_session session;        /*!< entry session      */
+#if defined(MBEDTLS_X509_CRT_PARSE_C) && \
+    defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+    mbedtls_x509_buf peer_cert;         /*!< entry peer_cert    */
+#endif
+    mbedtls_ssl_cache_entry *next;      /*!< chain pointer      */
+};
+
+/**
+ * \brief Cache context
+ */
+struct mbedtls_ssl_cache_context
+{
+    mbedtls_ssl_cache_entry *chain;     /*!< start of the chain     */
+    int timeout;                /*!< cache entry timeout    */
+    int max_entries;            /*!< maximum entries        */
+#if defined(MBEDTLS_THREADING_C)
+    mbedtls_threading_mutex_t mutex;    /*!< mutex                  */
+#endif
+};
+
+/**
+ * \brief          Initialize an SSL cache context
+ *
+ * \param cache    SSL cache context
+ */
+void mbedtls_ssl_cache_init( mbedtls_ssl_cache_context *cache );
+
+/**
+ * \brief          Cache get callback implementation
+ *                 (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param data     SSL cache context
+ * \param session  session to retrieve entry for
+ */
+int mbedtls_ssl_cache_get( void *data, mbedtls_ssl_session *session );
+
+/**
+ * \brief          Cache set callback implementation
+ *                 (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param data     SSL cache context
+ * \param session  session to store entry for
+ */
+int mbedtls_ssl_cache_set( void *data, const mbedtls_ssl_session *session );
+
+#if defined(MBEDTLS_HAVE_TIME)
+/**
+ * \brief          Set the cache timeout
+ *                 (Default: MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT (1 day))
+ *
+ *                 A timeout of 0 indicates no timeout.
+ *
+ * \param cache    SSL cache context
+ * \param timeout  cache entry timeout in seconds
+ */
+void mbedtls_ssl_cache_set_timeout( mbedtls_ssl_cache_context *cache, int timeout );
+#endif /* MBEDTLS_HAVE_TIME */
+
+/**
+ * \brief          Set the maximum number of cache entries
+ *                 (Default: MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES (50))
+ *
+ * \param cache    SSL cache context
+ * \param max      cache entry maximum
+ */
+void mbedtls_ssl_cache_set_max_entries( mbedtls_ssl_cache_context *cache, int max );
+
+/**
+ * \brief          Free referenced items in a cache context and clear memory
+ *
+ * \param cache    SSL cache context
+ */
+void mbedtls_ssl_cache_free( mbedtls_ssl_cache_context *cache );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ssl_cache.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h
new file mode 100644
index 00000000000..93c32a5edac
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_ciphersuites.h
@@ -0,0 +1,556 @@
+/**
+ * \file ssl_ciphersuites.h
+ *
+ * \brief SSL Ciphersuites for mbed TLS
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_SSL_CIPHERSUITES_H
+#define MBEDTLS_SSL_CIPHERSUITES_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/pk.h"
+#include "mbedtls/cipher.h"
+#include "mbedtls/md.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Supported ciphersuites (Official IANA names)
+ */
+#define MBEDTLS_TLS_RSA_WITH_NULL_MD5                    0x01   /**< Weak! */
+#define MBEDTLS_TLS_RSA_WITH_NULL_SHA                    0x02   /**< Weak! */
+
+#define MBEDTLS_TLS_RSA_WITH_RC4_128_MD5                 0x04
+#define MBEDTLS_TLS_RSA_WITH_RC4_128_SHA                 0x05
+#define MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA                 0x09   /**< Weak! Not in TLS 1.2 */
+
+#define MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA            0x0A
+
+#define MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA             0x15   /**< Weak! Not in TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA        0x16
+
+#define MBEDTLS_TLS_PSK_WITH_NULL_SHA                    0x2C   /**< Weak! */
+#define MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA                0x2D   /**< Weak! */
+#define MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA                0x2E   /**< Weak! */
+#define MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA             0x2F
+
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA         0x33
+#define MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA             0x35
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA         0x39
+
+#define MBEDTLS_TLS_RSA_WITH_NULL_SHA256                 0x3B   /**< Weak! */
+#define MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256          0x3C   /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256          0x3D   /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA        0x41
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA    0x45
+
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256      0x67   /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256      0x6B   /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA        0x84
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA    0x88
+
+#define MBEDTLS_TLS_PSK_WITH_RC4_128_SHA                 0x8A
+#define MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA            0x8B
+#define MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA             0x8C
+#define MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA             0x8D
+
+#define MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA             0x8E
+#define MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA        0x8F
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA         0x90
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA         0x91
+
+#define MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA             0x92
+#define MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA        0x93
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA         0x94
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA         0x95
+
+#define MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256          0x9C   /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384          0x9D   /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256      0x9E   /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384      0x9F   /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256          0xA8   /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384          0xA9   /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256      0xAA   /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384      0xAB   /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256      0xAC   /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384      0xAD   /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256          0xAE
+#define MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384          0xAF
+#define MBEDTLS_TLS_PSK_WITH_NULL_SHA256                 0xB0   /**< Weak! */
+#define MBEDTLS_TLS_PSK_WITH_NULL_SHA384                 0xB1   /**< Weak! */
+
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256      0xB2
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384      0xB3
+#define MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256             0xB4   /**< Weak! */
+#define MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384             0xB5   /**< Weak! */
+
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256      0xB6
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384      0xB7
+#define MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256             0xB8   /**< Weak! */
+#define MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384             0xB9   /**< Weak! */
+
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256     0xBA   /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 0xBE   /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256     0xC0   /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 0xC4   /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA             0xC001 /**< Weak! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA          0xC002 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA     0xC003 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA      0xC004 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA      0xC005 /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA            0xC006 /**< Weak! */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA         0xC007 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA    0xC008 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA     0xC009 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA     0xC00A /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA               0xC00B /**< Weak! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA            0xC00C /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA       0xC00D /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA        0xC00E /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA        0xC00F /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA              0xC010 /**< Weak! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA           0xC011 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA      0xC012 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA       0xC013 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA       0xC014 /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256  0xC023 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384  0xC024 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256   0xC025 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384   0xC026 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256    0xC027 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384    0xC028 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256     0xC029 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384     0xC02A /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256  0xC02B /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384  0xC02C /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256   0xC02D /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384   0xC02E /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256    0xC02F /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384    0xC030 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256     0xC031 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384     0xC032 /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA           0xC033 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA      0xC034 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA       0xC035 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA       0xC036 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256    0xC037 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384    0xC038 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA              0xC039 /**< Weak! No SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256           0xC03A /**< Weak! No SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384           0xC03B /**< Weak! No SSL3! */
+
+#define MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256         0xC03C /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384         0xC03D /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256     0xC044 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384     0xC045 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256 0xC048 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384 0xC049 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256  0xC04A /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384  0xC04B /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256   0xC04C /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384   0xC04D /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256    0xC04E /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384    0xC04F /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256         0xC050 /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384         0xC051 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256     0xC052 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384     0xC053 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256 0xC05C /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384 0xC05D /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256  0xC05E /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384  0xC05F /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256   0xC060 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384   0xC061 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256    0xC062 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384    0xC063 /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256         0xC064 /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384         0xC065 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256     0xC066 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384     0xC067 /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256     0xC068 /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384     0xC069 /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256         0xC06A /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384         0xC06B /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256     0xC06C /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384     0xC06D /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256     0xC06E /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384     0xC06F /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256   0xC070 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384   0xC071 /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 0xC072 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 0xC073 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256  0xC074 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384  0xC075 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256   0xC076 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384   0xC077 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256    0xC078 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384    0xC079 /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256         0xC07A /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384         0xC07B /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256     0xC07C /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384     0xC07D /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 0xC086 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 0xC087 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256  0xC088 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384  0xC089 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256   0xC08A /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384   0xC08B /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256    0xC08C /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384    0xC08D /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256       0xC08E /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384       0xC08F /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256   0xC090 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384   0xC091 /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256   0xC092 /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384   0xC093 /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256       0xC094
+#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384       0xC095
+#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256   0xC096
+#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384   0xC097
+#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256   0xC098
+#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384   0xC099
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 0xC09A /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 0xC09B /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_RSA_WITH_AES_128_CCM                0xC09C  /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_AES_256_CCM                0xC09D  /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM            0xC09E  /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM            0xC09F  /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_AES_128_CCM_8              0xC0A0  /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_AES_256_CCM_8              0xC0A1  /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM_8          0xC0A2  /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM_8          0xC0A3  /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_AES_128_CCM                0xC0A4  /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_AES_256_CCM                0xC0A5  /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM            0xC0A6  /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM            0xC0A7  /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_AES_128_CCM_8              0xC0A8  /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_AES_256_CCM_8              0xC0A9  /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM_8          0xC0AA  /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM_8          0xC0AB  /**< TLS 1.2 */
+/* The last two are named with PSK_DHE in the RFC, which looks like a typo */
+
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM        0xC0AC  /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM        0xC0AD  /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8      0xC0AE  /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8      0xC0AF  /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8          0xC0FF  /**< experimental */
+
+/* RFC 7905 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_CHACHA20_POLY1305_SHA256   0xCCA8 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CHACHA20_POLY1305_SHA256 0xCCA9 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_CHACHA20_POLY1305_SHA256     0xCCAA /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_CHACHA20_POLY1305_SHA256         0xCCAB /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_CHACHA20_POLY1305_SHA256   0xCCAC /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_CHACHA20_POLY1305_SHA256     0xCCAD /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_CHACHA20_POLY1305_SHA256     0xCCAE /**< TLS 1.2 */
+
+/* Reminder: update mbedtls_ssl_premaster_secret when adding a new key exchange.
+ * Reminder: update MBEDTLS_KEY_EXCHANGE__xxx below
+ */
+typedef enum {
+    MBEDTLS_KEY_EXCHANGE_NONE = 0,
+    MBEDTLS_KEY_EXCHANGE_RSA,
+    MBEDTLS_KEY_EXCHANGE_DHE_RSA,
+    MBEDTLS_KEY_EXCHANGE_ECDHE_RSA,
+    MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA,
+    MBEDTLS_KEY_EXCHANGE_PSK,
+    MBEDTLS_KEY_EXCHANGE_DHE_PSK,
+    MBEDTLS_KEY_EXCHANGE_RSA_PSK,
+    MBEDTLS_KEY_EXCHANGE_ECDHE_PSK,
+    MBEDTLS_KEY_EXCHANGE_ECDH_RSA,
+    MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA,
+    MBEDTLS_KEY_EXCHANGE_ECJPAKE,
+} mbedtls_key_exchange_type_t;
+
+/* Key exchanges using a certificate */
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED)           || \
+    defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)       || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)   || \
+    defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED)      || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED
+#endif
+
+/* Key exchanges allowing client certificate requests */
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED)           ||       \
+    defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)       ||       \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED)      ||       \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     ||       \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)    ||       \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_CERT_REQ_ALLOWED_ENABLED
+#endif
+
+/* Key exchanges involving server signature in ServerKeyExchange */
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)       || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED
+#endif
+
+/* Key exchanges using ECDH */
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED)      || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED
+#endif
+
+/* Key exchanges that don't involve ephemeral keys */
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED)           || \
+    defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED)           || \
+    defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
+    defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED
+#endif
+
+/* Key exchanges that involve ephemeral keys */
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)       || \
+    defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)       || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)     || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)   || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED
+#endif
+
+/* Key exchanges using a PSK */
+#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED)           || \
+    defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)       || \
+    defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)       || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED
+#endif
+
+/* Key exchanges using DHE */
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)       || \
+    defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED
+#endif
+
+/* Key exchanges using ECDHE */
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED)     || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)   || \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED
+#endif
+
+typedef struct mbedtls_ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t;
+
+#define MBEDTLS_CIPHERSUITE_WEAK       0x01    /**< Weak ciphersuite flag  */
+#define MBEDTLS_CIPHERSUITE_SHORT_TAG  0x02    /**< Short authentication tag,
+                                                     eg for CCM_8 */
+#define MBEDTLS_CIPHERSUITE_NODTLS     0x04    /**< Can't be used with DTLS */
+
+/**
+ * \brief   This structure is used for storing ciphersuite information
+ */
+struct mbedtls_ssl_ciphersuite_t
+{
+    int id;
+    const char * name;
+
+    mbedtls_cipher_type_t cipher;
+    mbedtls_md_type_t mac;
+    mbedtls_key_exchange_type_t key_exchange;
+
+    int min_major_ver;
+    int min_minor_ver;
+    int max_major_ver;
+    int max_minor_ver;
+
+    unsigned char flags;
+};
+
+const int *mbedtls_ssl_list_ciphersuites( void );
+
+const mbedtls_ssl_ciphersuite_t *mbedtls_ssl_ciphersuite_from_string( const char *ciphersuite_name );
+const mbedtls_ssl_ciphersuite_t *mbedtls_ssl_ciphersuite_from_id( int ciphersuite_id );
+
+#if defined(MBEDTLS_PK_C)
+mbedtls_pk_type_t mbedtls_ssl_get_ciphersuite_sig_pk_alg( const mbedtls_ssl_ciphersuite_t *info );
+mbedtls_pk_type_t mbedtls_ssl_get_ciphersuite_sig_alg( const mbedtls_ssl_ciphersuite_t *info );
+#endif
+
+int mbedtls_ssl_ciphersuite_uses_ec( const mbedtls_ssl_ciphersuite_t *info );
+int mbedtls_ssl_ciphersuite_uses_psk( const mbedtls_ssl_ciphersuite_t *info );
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_has_pfs( const mbedtls_ssl_ciphersuite_t *info )
+{
+    switch( info->key_exchange )
+    {
+        case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_DHE_PSK:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_PSK:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+        case MBEDTLS_KEY_EXCHANGE_ECJPAKE:
+            return( 1 );
+
+        default:
+            return( 0 );
+    }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PFS_ENABLED */
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_no_pfs( const mbedtls_ssl_ciphersuite_t *info )
+{
+    switch( info->key_exchange )
+    {
+        case MBEDTLS_KEY_EXCHANGE_ECDH_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA:
+        case MBEDTLS_KEY_EXCHANGE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_PSK:
+        case MBEDTLS_KEY_EXCHANGE_RSA_PSK:
+            return( 1 );
+
+        default:
+            return( 0 );
+    }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_NON_PFS_ENABLED */
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_uses_ecdh( const mbedtls_ssl_ciphersuite_t *info )
+{
+    switch( info->key_exchange )
+    {
+        case MBEDTLS_KEY_EXCHANGE_ECDH_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA:
+            return( 1 );
+
+        default:
+            return( 0 );
+    }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_ECDH_ENABLED */
+
+static inline int mbedtls_ssl_ciphersuite_cert_req_allowed( const mbedtls_ssl_ciphersuite_t *info )
+{
+    switch( info->key_exchange )
+    {
+        case MBEDTLS_KEY_EXCHANGE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+            return( 1 );
+
+        default:
+            return( 0 );
+    }
+}
+
+static inline int mbedtls_ssl_ciphersuite_uses_srv_cert( const mbedtls_ssl_ciphersuite_t *info )
+{
+    switch( info->key_exchange )
+    {
+        case MBEDTLS_KEY_EXCHANGE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_RSA_PSK:
+        case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+            return( 1 );
+
+        default:
+            return( 0 );
+    }
+}
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_uses_dhe( const mbedtls_ssl_ciphersuite_t *info )
+{
+    switch( info->key_exchange )
+    {
+        case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_DHE_PSK:
+            return( 1 );
+
+        default:
+            return( 0 );
+    }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_DHE_ENABLED) */
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_uses_ecdhe( const mbedtls_ssl_ciphersuite_t *info )
+{
+    switch( info->key_exchange )
+    {
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_PSK:
+            return( 1 );
+
+        default:
+            return( 0 );
+    }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_ECDHE_ENABLED) */
+
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_uses_server_signature( const mbedtls_ssl_ciphersuite_t *info )
+{
+    switch( info->key_exchange )
+    {
+        case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+        case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+            return( 1 );
+
+        default:
+            return( 0 );
+    }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE_WITH_SERVER_SIGNATURE_ENABLED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ssl_ciphersuites.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h
new file mode 100644
index 00000000000..0a238708e59
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_cookie.h
@@ -0,0 +1,113 @@
+/**
+ * \file ssl_cookie.h
+ *
+ * \brief DTLS cookie callbacks implementation
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_SSL_COOKIE_H
+#define MBEDTLS_SSL_COOKIE_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/ssl.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "mbedtls/threading.h"
+#endif
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+#ifndef MBEDTLS_SSL_COOKIE_TIMEOUT
+#define MBEDTLS_SSL_COOKIE_TIMEOUT     60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          Context for the default cookie functions.
+ */
+typedef struct mbedtls_ssl_cookie_ctx
+{
+    mbedtls_md_context_t    hmac_ctx;   /*!< context for the HMAC portion   */
+#if !defined(MBEDTLS_HAVE_TIME)
+    unsigned long   serial;     /*!< serial number for expiration   */
+#endif
+    unsigned long   timeout;    /*!< timeout delay, in seconds if HAVE_TIME,
+                                     or in number of tickets issued */
+
+#if defined(MBEDTLS_THREADING_C)
+    mbedtls_threading_mutex_t mutex;
+#endif
+} mbedtls_ssl_cookie_ctx;
+
+/**
+ * \brief          Initialize cookie context
+ */
+void mbedtls_ssl_cookie_init( mbedtls_ssl_cookie_ctx *ctx );
+
+/**
+ * \brief          Setup cookie context (generate keys)
+ */
+int mbedtls_ssl_cookie_setup( mbedtls_ssl_cookie_ctx *ctx,
+                      int (*f_rng)(void *, unsigned char *, size_t),
+                      void *p_rng );
+
+/**
+ * \brief          Set expiration delay for cookies
+ *                 (Default MBEDTLS_SSL_COOKIE_TIMEOUT)
+ *
+ * \param ctx      Cookie contex
+ * \param delay    Delay, in seconds if HAVE_TIME, or in number of cookies
+ *                 issued in the meantime.
+ *                 0 to disable expiration (NOT recommended)
+ */
+void mbedtls_ssl_cookie_set_timeout( mbedtls_ssl_cookie_ctx *ctx, unsigned long delay );
+
+/**
+ * \brief          Free cookie context
+ */
+void mbedtls_ssl_cookie_free( mbedtls_ssl_cookie_ctx *ctx );
+
+/**
+ * \brief          Generate cookie, see \c mbedtls_ssl_cookie_write_t
+ */
+mbedtls_ssl_cookie_write_t mbedtls_ssl_cookie_write;
+
+/**
+ * \brief          Verify cookie, see \c mbedtls_ssl_cookie_write_t
+ */
+mbedtls_ssl_cookie_check_t mbedtls_ssl_cookie_check;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ssl_cookie.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h
new file mode 100644
index 00000000000..6913dc0f668
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_internal.h
@@ -0,0 +1,1308 @@
+/**
+ * \file ssl_internal.h
+ *
+ * \brief Internal functions shared by the SSL modules
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_SSL_INTERNAL_H
+#define MBEDTLS_SSL_INTERNAL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/ssl.h"
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#endif
+
+#if defined(MBEDTLS_MD5_C)
+#include "mbedtls/md5.h"
+#endif
+
+#if defined(MBEDTLS_SHA1_C)
+#include "mbedtls/sha1.h"
+#endif
+
+#if defined(MBEDTLS_SHA256_C)
+#include "mbedtls/sha256.h"
+#endif
+
+#if defined(MBEDTLS_SHA512_C)
+#include "mbedtls/sha512.h"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+#include "mbedtls/ecjpake.h"
+#endif
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+#include "psa/crypto.h"
+#include "mbedtls/psa_util.h"
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+/* Determine minimum supported version */
+#define MBEDTLS_SSL_MIN_MAJOR_VERSION           MBEDTLS_SSL_MAJOR_VERSION_3
+
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+#define MBEDTLS_SSL_MIN_MINOR_VERSION           MBEDTLS_SSL_MINOR_VERSION_0
+#else
+#if defined(MBEDTLS_SSL_PROTO_TLS1)
+#define MBEDTLS_SSL_MIN_MINOR_VERSION           MBEDTLS_SSL_MINOR_VERSION_1
+#else
+#if defined(MBEDTLS_SSL_PROTO_TLS1_1)
+#define MBEDTLS_SSL_MIN_MINOR_VERSION           MBEDTLS_SSL_MINOR_VERSION_2
+#else
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#define MBEDTLS_SSL_MIN_MINOR_VERSION           MBEDTLS_SSL_MINOR_VERSION_3
+#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */
+#endif /* MBEDTLS_SSL_PROTO_TLS1_1 */
+#endif /* MBEDTLS_SSL_PROTO_TLS1   */
+#endif /* MBEDTLS_SSL_PROTO_SSL3   */
+
+#define MBEDTLS_SSL_MIN_VALID_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_1
+#define MBEDTLS_SSL_MIN_VALID_MAJOR_VERSION MBEDTLS_SSL_MAJOR_VERSION_3
+
+/* Determine maximum supported version */
+#define MBEDTLS_SSL_MAX_MAJOR_VERSION           MBEDTLS_SSL_MAJOR_VERSION_3
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#define MBEDTLS_SSL_MAX_MINOR_VERSION           MBEDTLS_SSL_MINOR_VERSION_3
+#else
+#if defined(MBEDTLS_SSL_PROTO_TLS1_1)
+#define MBEDTLS_SSL_MAX_MINOR_VERSION           MBEDTLS_SSL_MINOR_VERSION_2
+#else
+#if defined(MBEDTLS_SSL_PROTO_TLS1)
+#define MBEDTLS_SSL_MAX_MINOR_VERSION           MBEDTLS_SSL_MINOR_VERSION_1
+#else
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+#define MBEDTLS_SSL_MAX_MINOR_VERSION           MBEDTLS_SSL_MINOR_VERSION_0
+#endif /* MBEDTLS_SSL_PROTO_SSL3   */
+#endif /* MBEDTLS_SSL_PROTO_TLS1   */
+#endif /* MBEDTLS_SSL_PROTO_TLS1_1 */
+#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */
+
+/* Shorthand for restartable ECC */
+#if defined(MBEDTLS_ECP_RESTARTABLE) && \
+    defined(MBEDTLS_SSL_CLI_C) && \
+    defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
+    defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
+#define MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED
+#endif
+
+#define MBEDTLS_SSL_INITIAL_HANDSHAKE           0
+#define MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS   1   /* In progress */
+#define MBEDTLS_SSL_RENEGOTIATION_DONE          2   /* Done or aborted */
+#define MBEDTLS_SSL_RENEGOTIATION_PENDING       3   /* Requested (server only) */
+
+/*
+ * DTLS retransmission states, see RFC 6347 4.2.4
+ *
+ * The SENDING state is merged in PREPARING for initial sends,
+ * but is distinct for resends.
+ *
+ * Note: initial state is wrong for server, but is not used anyway.
+ */
+#define MBEDTLS_SSL_RETRANS_PREPARING       0
+#define MBEDTLS_SSL_RETRANS_SENDING         1
+#define MBEDTLS_SSL_RETRANS_WAITING         2
+#define MBEDTLS_SSL_RETRANS_FINISHED        3
+
+/*
+ * Allow extra bytes for record, authentication and encryption overhead:
+ * counter (8) + header (5) + IV(16) + MAC (16-48) + padding (0-256)
+ * and allow for a maximum of 1024 of compression expansion if
+ * enabled.
+ */
+#if defined(MBEDTLS_ZLIB_SUPPORT)
+#define MBEDTLS_SSL_COMPRESSION_ADD          1024
+#else
+#define MBEDTLS_SSL_COMPRESSION_ADD             0
+#endif
+
+/* This macro determines whether CBC is supported. */
+#if defined(MBEDTLS_CIPHER_MODE_CBC) &&                               \
+    ( defined(MBEDTLS_AES_C)      ||                                  \
+      defined(MBEDTLS_CAMELLIA_C) ||                                  \
+      defined(MBEDTLS_ARIA_C)     ||                                  \
+      defined(MBEDTLS_DES_C) )
+#define MBEDTLS_SSL_SOME_SUITES_USE_CBC
+#endif
+
+/* This macro determines whether the CBC construct used in TLS 1.0-1.2 (as
+ * opposed to the very different CBC construct used in SSLv3) is supported. */
+#if defined(MBEDTLS_SSL_SOME_SUITES_USE_CBC) && \
+    ( defined(MBEDTLS_SSL_PROTO_TLS1) ||        \
+      defined(MBEDTLS_SSL_PROTO_TLS1_1) ||      \
+      defined(MBEDTLS_SSL_PROTO_TLS1_2) )
+#define MBEDTLS_SSL_SOME_SUITES_USE_TLS_CBC
+#endif
+
+#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_NULL_CIPHER) ||   \
+    defined(MBEDTLS_SSL_SOME_SUITES_USE_CBC)
+#define MBEDTLS_SSL_SOME_MODES_USE_MAC
+#endif
+
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
+/* Ciphersuites using HMAC */
+#if defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_SSL_MAC_ADD                 48  /* SHA-384 used for HMAC */
+#elif defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_SSL_MAC_ADD                 32  /* SHA-256 used for HMAC */
+#else
+#define MBEDTLS_SSL_MAC_ADD                 20  /* SHA-1   used for HMAC */
+#endif
+#else /* MBEDTLS_SSL_SOME_MODES_USE_MAC */
+/* AEAD ciphersuites: GCM and CCM use a 128 bits tag */
+#define MBEDTLS_SSL_MAC_ADD                 16
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+#define MBEDTLS_SSL_PADDING_ADD            256
+#else
+#define MBEDTLS_SSL_PADDING_ADD              0
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+#define MBEDTLS_SSL_MAX_CID_EXPANSION      MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#else
+#define MBEDTLS_SSL_MAX_CID_EXPANSION        0
+#endif
+
+#define MBEDTLS_SSL_PAYLOAD_OVERHEAD ( MBEDTLS_SSL_COMPRESSION_ADD +    \
+                                       MBEDTLS_MAX_IV_LENGTH +          \
+                                       MBEDTLS_SSL_MAC_ADD +            \
+                                       MBEDTLS_SSL_PADDING_ADD +        \
+                                       MBEDTLS_SSL_MAX_CID_EXPANSION    \
+                                       )
+
+#define MBEDTLS_SSL_IN_PAYLOAD_LEN ( MBEDTLS_SSL_PAYLOAD_OVERHEAD + \
+                                     ( MBEDTLS_SSL_IN_CONTENT_LEN ) )
+
+#define MBEDTLS_SSL_OUT_PAYLOAD_LEN ( MBEDTLS_SSL_PAYLOAD_OVERHEAD + \
+                                      ( MBEDTLS_SSL_OUT_CONTENT_LEN ) )
+
+/* The maximum number of buffered handshake messages. */
+#define MBEDTLS_SSL_MAX_BUFFERED_HS 4
+
+/* Maximum length we can advertise as our max content length for
+   RFC 6066 max_fragment_length extension negotiation purposes
+   (the lesser of both sizes, if they are unequal.)
+ */
+#define MBEDTLS_TLS_EXT_ADV_CONTENT_LEN (                            \
+        (MBEDTLS_SSL_IN_CONTENT_LEN > MBEDTLS_SSL_OUT_CONTENT_LEN)   \
+        ? ( MBEDTLS_SSL_OUT_CONTENT_LEN )                            \
+        : ( MBEDTLS_SSL_IN_CONTENT_LEN )                             \
+        )
+
+/* Maximum size in bytes of list in sig-hash algorithm ext., RFC 5246 */
+#define MBEDTLS_SSL_MAX_SIG_HASH_ALG_LIST_LEN  65534
+
+/* Maximum size in bytes of list in supported elliptic curve ext., RFC 4492 */
+#define MBEDTLS_SSL_MAX_CURVE_LIST_LEN         65535
+
+/*
+ * Check that we obey the standard's message size bounds
+ */
+
+#if MBEDTLS_SSL_MAX_CONTENT_LEN > 16384
+#error "Bad configuration - record content too large."
+#endif
+
+#if MBEDTLS_SSL_IN_CONTENT_LEN > MBEDTLS_SSL_MAX_CONTENT_LEN
+#error "Bad configuration - incoming record content should not be larger than MBEDTLS_SSL_MAX_CONTENT_LEN."
+#endif
+
+#if MBEDTLS_SSL_OUT_CONTENT_LEN > MBEDTLS_SSL_MAX_CONTENT_LEN
+#error "Bad configuration - outgoing record content should not be larger than MBEDTLS_SSL_MAX_CONTENT_LEN."
+#endif
+
+#if MBEDTLS_SSL_IN_PAYLOAD_LEN > MBEDTLS_SSL_MAX_CONTENT_LEN + 2048
+#error "Bad configuration - incoming protected record payload too large."
+#endif
+
+#if MBEDTLS_SSL_OUT_PAYLOAD_LEN > MBEDTLS_SSL_MAX_CONTENT_LEN + 2048
+#error "Bad configuration - outgoing protected record payload too large."
+#endif
+
+/* Calculate buffer sizes */
+
+/* Note: Even though the TLS record header is only 5 bytes
+   long, we're internally using 8 bytes to store the
+   implicit sequence number. */
+#define MBEDTLS_SSL_HEADER_LEN 13
+
+#if !defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+#define MBEDTLS_SSL_IN_BUFFER_LEN  \
+    ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_IN_PAYLOAD_LEN ) )
+#else
+#define MBEDTLS_SSL_IN_BUFFER_LEN  \
+    ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_IN_PAYLOAD_LEN ) \
+      + ( MBEDTLS_SSL_CID_IN_LEN_MAX ) )
+#endif
+
+#if !defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+#define MBEDTLS_SSL_OUT_BUFFER_LEN  \
+    ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_OUT_PAYLOAD_LEN ) )
+#else
+#define MBEDTLS_SSL_OUT_BUFFER_LEN                               \
+    ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_OUT_PAYLOAD_LEN )    \
+      + ( MBEDTLS_SSL_CID_OUT_LEN_MAX ) )
+#endif
+
+#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH)
+static inline size_t mbedtls_ssl_get_output_buflen( const mbedtls_ssl_context *ctx )
+{
+#if defined (MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    return mbedtls_ssl_get_output_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD
+               + MBEDTLS_SSL_CID_OUT_LEN_MAX;
+#else
+    return mbedtls_ssl_get_output_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD;
+#endif
+}
+
+static inline size_t mbedtls_ssl_get_input_buflen( const mbedtls_ssl_context *ctx )
+{
+#if defined (MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    return mbedtls_ssl_get_input_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD
+               + MBEDTLS_SSL_CID_IN_LEN_MAX;
+#else
+    return mbedtls_ssl_get_input_max_frag_len( ctx )
+               + MBEDTLS_SSL_HEADER_LEN + MBEDTLS_SSL_PAYLOAD_OVERHEAD;
+#endif
+}
+#endif
+
+#ifdef MBEDTLS_ZLIB_SUPPORT
+/* Compression buffer holds both IN and OUT buffers, so should be size of the larger */
+#define MBEDTLS_SSL_COMPRESS_BUFFER_LEN (                               \
+        ( MBEDTLS_SSL_IN_BUFFER_LEN > MBEDTLS_SSL_OUT_BUFFER_LEN )      \
+        ? MBEDTLS_SSL_IN_BUFFER_LEN                                     \
+        : MBEDTLS_SSL_OUT_BUFFER_LEN                                    \
+        )
+#endif
+
+/*
+ * TLS extension flags (for extensions with outgoing ServerHello content
+ * that need it (e.g. for RENEGOTIATION_INFO the server already knows because
+ * of state of the renegotiation flag, so no indicator is required)
+ */
+#define MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS_PRESENT (1 << 0)
+#define MBEDTLS_TLS_EXT_ECJPAKE_KKPP_OK                 (1 << 1)
+
+/**
+ * \brief        This function checks if the remaining size in a buffer is
+ *               greater or equal than a needed space.
+ *
+ * \param cur    Pointer to the current position in the buffer.
+ * \param end    Pointer to one past the end of the buffer.
+ * \param need   Needed space in bytes.
+ *
+ * \return       Zero if the needed space is available in the buffer, non-zero
+ *               otherwise.
+ */
+static inline int mbedtls_ssl_chk_buf_ptr( const uint8_t *cur,
+                                           const uint8_t *end, size_t need )
+{
+    return( ( cur > end ) || ( need > (size_t)( end - cur ) ) );
+}
+
+/**
+ * \brief        This macro checks if the remaining size in a buffer is
+ *               greater or equal than a needed space. If it is not the case,
+ *               it returns an SSL_BUFFER_TOO_SMALL error.
+ *
+ * \param cur    Pointer to the current position in the buffer.
+ * \param end    Pointer to one past the end of the buffer.
+ * \param need   Needed space in bytes.
+ *
+ */
+#define MBEDTLS_SSL_CHK_BUF_PTR( cur, end, need )                        \
+    do {                                                                 \
+        if( mbedtls_ssl_chk_buf_ptr( ( cur ), ( end ), ( need ) ) != 0 ) \
+        {                                                                \
+            return( MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL );                  \
+        }                                                                \
+    } while( 0 )
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
+/*
+ * Abstraction for a grid of allowed signature-hash-algorithm pairs.
+ */
+struct mbedtls_ssl_sig_hash_set_t
+{
+    /* At the moment, we only need to remember a single suitable
+     * hash algorithm per signature algorithm. As long as that's
+     * the case - and we don't need a general lookup function -
+     * we can implement the sig-hash-set as a map from signatures
+     * to hash algorithms. */
+    mbedtls_md_type_t rsa;
+    mbedtls_md_type_t ecdsa;
+};
+#endif /* MBEDTLS_SSL_PROTO_TLS1_2 &&
+          MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
+
+typedef int  mbedtls_ssl_tls_prf_cb( const unsigned char *secret, size_t slen,
+                                     const char *label,
+                                     const unsigned char *random, size_t rlen,
+                                     unsigned char *dstbuf, size_t dlen );
+
+/* cipher.h exports the maximum IV, key and block length from
+ * all ciphers enabled in the config, regardless of whether those
+ * ciphers are actually usable in SSL/TLS. Notably, XTS is enabled
+ * in the default configuration and uses 64 Byte keys, but it is
+ * not used for record protection in SSL/TLS.
+ *
+ * In order to prevent unnecessary inflation of key structures,
+ * we introduce SSL-specific variants of the max-{key,block,IV}
+ * macros here which are meant to only take those ciphers into
+ * account which can be negotiated in SSL/TLS.
+ *
+ * Since the current definitions of MBEDTLS_MAX_{KEY|BLOCK|IV}_LENGTH
+ * in cipher.h are rough overapproximations of the real maxima, here
+ * we content ourselves with replicating those overapproximations
+ * for the maximum block and IV length, and excluding XTS from the
+ * computation of the maximum key length. */
+#define MBEDTLS_SSL_MAX_BLOCK_LENGTH 16
+#define MBEDTLS_SSL_MAX_IV_LENGTH    16
+#define MBEDTLS_SSL_MAX_KEY_LENGTH   32
+
+/**
+ * \brief   The data structure holding the cryptographic material (key and IV)
+ *          used for record protection in TLS 1.3.
+ */
+struct mbedtls_ssl_key_set
+{
+    /*! The key for client->server records. */
+    unsigned char client_write_key[ MBEDTLS_SSL_MAX_KEY_LENGTH ];
+    /*! The key for server->client records. */
+    unsigned char server_write_key[ MBEDTLS_SSL_MAX_KEY_LENGTH ];
+    /*! The IV  for client->server records. */
+    unsigned char client_write_iv[ MBEDTLS_SSL_MAX_IV_LENGTH ];
+    /*! The IV  for server->client records. */
+    unsigned char server_write_iv[ MBEDTLS_SSL_MAX_IV_LENGTH ];
+
+    size_t key_len; /*!< The length of client_write_key and
+                     *   server_write_key, in Bytes. */
+    size_t iv_len;  /*!< The length of client_write_iv and
+                     *   server_write_iv, in Bytes. */
+};
+typedef struct mbedtls_ssl_key_set mbedtls_ssl_key_set;
+
+/*
+ * This structure contains the parameters only needed during handshake.
+ */
+struct mbedtls_ssl_handshake_params
+{
+    /*
+     * Handshake specific crypto variables
+     */
+
+    uint8_t max_major_ver;              /*!< max. major version client*/
+    uint8_t max_minor_ver;              /*!< max. minor version client*/
+    uint8_t resume;                     /*!<  session resume indicator*/
+    uint8_t cli_exts;                   /*!< client extension presence*/
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C) &&        \
+    defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
+    uint8_t sni_authmode;               /*!< authmode from SNI callback     */
+#endif
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS)
+    uint8_t new_session_ticket;         /*!< use NewSessionTicket?    */
+#endif /* MBEDTLS_SSL_SESSION_TICKETS */
+
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+    uint8_t extended_ms;                /*!< use Extended Master Secret? */
+#endif
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+    uint8_t async_in_progress;          /*!< an asynchronous operation is in progress */
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    unsigned char retransmit_state;     /*!<  Retransmission state           */
+#endif
+
+#if defined(MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED)
+    uint8_t ecrs_enabled;               /*!< Handshake supports EC restart? */
+    enum { /* this complements ssl->state with info on intra-state operations */
+        ssl_ecrs_none = 0,              /*!< nothing going on (yet)         */
+        ssl_ecrs_crt_verify,            /*!< Certificate: crt_verify()      */
+        ssl_ecrs_ske_start_processing,  /*!< ServerKeyExchange: pk_verify() */
+        ssl_ecrs_cke_ecdh_calc_secret,  /*!< ClientKeyExchange: ECDH step 2 */
+        ssl_ecrs_crt_vrfy_sign,         /*!< CertificateVerify: pk_sign()   */
+    } ecrs_state;                       /*!< current (or last) operation    */
+    mbedtls_x509_crt *ecrs_peer_cert;   /*!< The peer's CRT chain.          */
+    size_t ecrs_n;                      /*!< place for saving a length      */
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2) &&                \
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
+    mbedtls_ssl_sig_hash_set_t hash_algs;             /*!<  Set of suitable sig-hash pairs */
+#endif
+
+    size_t pmslen;                      /*!<  premaster length        */
+
+    mbedtls_ssl_ciphersuite_t const *ciphersuite_info;
+
+    void (*update_checksum)(mbedtls_ssl_context *, const unsigned char *, size_t);
+    void (*calc_verify)(const mbedtls_ssl_context *, unsigned char *, size_t *);
+    void (*calc_finished)(mbedtls_ssl_context *, unsigned char *, int);
+    mbedtls_ssl_tls_prf_cb *tls_prf;
+
+#if defined(MBEDTLS_DHM_C)
+    mbedtls_dhm_context dhm_ctx;                /*!<  DHM key exchange        */
+#endif
+
+/* Adding guard for MBEDTLS_ECDSA_C to ensure no compile errors due
+ * to guards also being in ssl_srv.c and ssl_cli.c. There is a gap
+ * in functionality that access to ecdh_ctx structure is needed for
+ * MBEDTLS_ECDSA_C which does not seem correct.
+ */
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C)
+    mbedtls_ecdh_context ecdh_ctx;              /*!<  ECDH key exchange       */
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_type_t ecdh_psa_type;
+    uint16_t ecdh_bits;
+    psa_key_id_t ecdh_psa_privkey;
+    unsigned char ecdh_psa_peerkey[MBEDTLS_PSA_MAX_EC_PUBKEY_LENGTH];
+    size_t ecdh_psa_peerkey_len;
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C */
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+    mbedtls_ecjpake_context ecjpake_ctx;        /*!< EC J-PAKE key exchange */
+#if defined(MBEDTLS_SSL_CLI_C)
+    unsigned char *ecjpake_cache;               /*!< Cache for ClientHello ext */
+    size_t ecjpake_cache_len;                   /*!< Length of cached data */
+#endif
+#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */
+
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) ||      \
+    defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+    const mbedtls_ecp_curve_info **curves;      /*!<  Supported elliptic curves */
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_key_id_t psk_opaque;            /*!< Opaque PSK from the callback   */
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+    unsigned char *psk;                 /*!<  PSK from the callback         */
+    size_t psk_len;                     /*!<  Length of PSK from callback   */
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+    mbedtls_ssl_key_cert *key_cert;     /*!< chosen key/cert pair (server)  */
+#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
+    mbedtls_ssl_key_cert *sni_key_cert; /*!< key/cert list from SNI         */
+    mbedtls_x509_crt *sni_ca_chain;     /*!< trusted CAs from SNI callback  */
+    mbedtls_x509_crl *sni_ca_crl;       /*!< trusted CAs CRLs from SNI      */
+#endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_SSL_ECP_RESTARTABLE_ENABLED)
+    mbedtls_x509_crt_restart_ctx ecrs_ctx;  /*!< restart context            */
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C) &&        \
+    !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE)
+    mbedtls_pk_context peer_pubkey;     /*!< The public key from the peer.  */
+#endif /* MBEDTLS_X509_CRT_PARSE_C && !MBEDTLS_SSL_KEEP_PEER_CERTIFICATE */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    struct
+    {
+        size_t total_bytes_buffered; /*!< Cumulative size of heap allocated
+                                      *   buffers used for message buffering. */
+
+        uint8_t seen_ccs;               /*!< Indicates if a CCS message has
+                                         *   been seen in the current flight. */
+
+        struct mbedtls_ssl_hs_buffer
+        {
+            unsigned is_valid      : 1;
+            unsigned is_fragmented : 1;
+            unsigned is_complete   : 1;
+            unsigned char *data;
+            size_t data_len;
+        } hs[MBEDTLS_SSL_MAX_BUFFERED_HS];
+
+        struct
+        {
+            unsigned char *data;
+            size_t len;
+            unsigned epoch;
+        } future_record;
+
+    } buffering;
+
+    unsigned int out_msg_seq;           /*!<  Outgoing handshake sequence number */
+    unsigned int in_msg_seq;            /*!<  Incoming handshake sequence number */
+
+    unsigned char *verify_cookie;       /*!<  Cli: HelloVerifyRequest cookie
+                                              Srv: unused                    */
+    unsigned char verify_cookie_len;    /*!<  Cli: cookie length
+                                              Srv: flag for sending a cookie */
+
+    uint32_t retransmit_timeout;        /*!<  Current value of timeout       */
+    mbedtls_ssl_flight_item *flight;    /*!<  Current outgoing flight        */
+    mbedtls_ssl_flight_item *cur_msg;   /*!<  Current message in flight      */
+    unsigned char *cur_msg_p;           /*!<  Position in current message    */
+    unsigned int in_flight_start_seq;   /*!<  Minimum message sequence in the
+                                              flight being received          */
+    mbedtls_ssl_transform *alt_transform_out;   /*!<  Alternative transform for
+                                              resending messages             */
+    unsigned char alt_out_ctr[8];       /*!<  Alternative record epoch/counter
+                                              for resending messages         */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    /* The state of CID configuration in this handshake. */
+
+    uint8_t cid_in_use; /*!< This indicates whether the use of the CID extension
+                         *   has been negotiated. Possible values are
+                         *   #MBEDTLS_SSL_CID_ENABLED and
+                         *   #MBEDTLS_SSL_CID_DISABLED. */
+    unsigned char peer_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ]; /*! The peer's CID */
+    uint8_t peer_cid_len;                                  /*!< The length of
+                                                            *   \c peer_cid.  */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
+    uint16_t mtu;                       /*!<  Handshake mtu, used to fragment outgoing messages */
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+    /*
+     * Checksum contexts
+     */
+#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \
+    defined(MBEDTLS_SSL_PROTO_TLS1_1)
+    mbedtls_md5_context fin_md5;
+    mbedtls_sha1_context fin_sha1;
+#endif
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#if defined(MBEDTLS_SHA256_C)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_hash_operation_t fin_sha256_psa;
+#else
+    mbedtls_sha256_context fin_sha256;
+#endif
+#endif
+#if defined(MBEDTLS_SHA512_C)
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+    psa_hash_operation_t fin_sha384_psa;
+#else
+    mbedtls_sha512_context fin_sha512;
+#endif
+#endif
+#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */
+
+    unsigned char randbytes[64];        /*!<  random bytes            */
+    unsigned char premaster[MBEDTLS_PREMASTER_SIZE];
+                                        /*!<  premaster secret        */
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+    /** Asynchronous operation context. This field is meant for use by the
+     * asynchronous operation callbacks (mbedtls_ssl_config::f_async_sign_start,
+     * mbedtls_ssl_config::f_async_decrypt_start,
+     * mbedtls_ssl_config::f_async_resume, mbedtls_ssl_config::f_async_cancel).
+     * The library does not use it internally. */
+    void *user_async_ctx;
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+};
+
+typedef struct mbedtls_ssl_hs_buffer mbedtls_ssl_hs_buffer;
+
+/*
+ * Representation of decryption/encryption transformations on records
+ *
+ * There are the following general types of record transformations:
+ * - Stream transformations (TLS versions <= 1.2 only)
+ *   Transformation adding a MAC and applying a stream-cipher
+ *   to the authenticated message.
+ * - CBC block cipher transformations ([D]TLS versions <= 1.2 only)
+ *   In addition to the distinction of the order of encryption and
+ *   authentication, there's a fundamental difference between the
+ *   handling in SSL3 & TLS 1.0 and TLS 1.1 and TLS 1.2: For SSL3
+ *   and TLS 1.0, the final IV after processing a record is used
+ *   as the IV for the next record. No explicit IV is contained
+ *   in an encrypted record. The IV for the first record is extracted
+ *   at key extraction time. In contrast, for TLS 1.1 and 1.2, no
+ *   IV is generated at key extraction time, but every encrypted
+ *   record is explicitly prefixed by the IV with which it was encrypted.
+ * - AEAD transformations ([D]TLS versions >= 1.2 only)
+ *   These come in two fundamentally different versions, the first one
+ *   used in TLS 1.2, excluding ChaChaPoly ciphersuites, and the second
+ *   one used for ChaChaPoly ciphersuites in TLS 1.2 as well as for TLS 1.3.
+ *   In the first transformation, the IV to be used for a record is obtained
+ *   as the concatenation of an explicit, static 4-byte IV and the 8-byte
+ *   record sequence number, and explicitly prepending this sequence number
+ *   to the encrypted record. In contrast, in the second transformation
+ *   the IV is obtained by XOR'ing a static IV obtained at key extraction
+ *   time with the 8-byte record sequence number, without prepending the
+ *   latter to the encrypted record.
+ *
+ * Additionally, DTLS 1.2 + CID as well as TLS 1.3 use an inner plaintext
+ * which allows to add flexible length padding and to hide a record's true
+ * content type.
+ *
+ * In addition to type and version, the following parameters are relevant:
+ * - The symmetric cipher algorithm to be used.
+ * - The (static) encryption/decryption keys for the cipher.
+ * - For stream/CBC, the type of message digest to be used.
+ * - For stream/CBC, (static) encryption/decryption keys for the digest.
+ * - For AEAD transformations, the size (potentially 0) of an explicit,
+ *   random initialization vector placed in encrypted records.
+ * - For some transformations (currently AEAD and CBC in SSL3 and TLS 1.0)
+ *   an implicit IV. It may be static (e.g. AEAD) or dynamic (e.g. CBC)
+ *   and (if present) is combined with the explicit IV in a transformation-
+ *   dependent way (e.g. appending in TLS 1.2 and XOR'ing in TLS 1.3).
+ * - For stream/CBC, a flag determining the order of encryption and MAC.
+ * - The details of the transformation depend on the SSL/TLS version.
+ * - The length of the authentication tag.
+ *
+ * Note: Except for CBC in SSL3 and TLS 1.0, these parameters are
+ *       constant across multiple encryption/decryption operations.
+ *       For CBC, the implicit IV needs to be updated after each
+ *       operation.
+ *
+ * The struct below refines this abstract view as follows:
+ * - The cipher underlying the transformation is managed in
+ *   cipher contexts cipher_ctx_{enc/dec}, which must have the
+ *   same cipher type. The mode of these cipher contexts determines
+ *   the type of the transformation in the sense above: e.g., if
+ *   the type is MBEDTLS_CIPHER_AES_256_CBC resp. MBEDTLS_CIPHER_AES_192_GCM
+ *   then the transformation has type CBC resp. AEAD.
+ * - The cipher keys are never stored explicitly but
+ *   are maintained within cipher_ctx_{enc/dec}.
+ * - For stream/CBC transformations, the message digest contexts
+ *   used for the MAC's are stored in md_ctx_{enc/dec}. These contexts
+ *   are unused for AEAD transformations.
+ * - For stream/CBC transformations and versions > SSL3, the
+ *   MAC keys are not stored explicitly but maintained within
+ *   md_ctx_{enc/dec}.
+ * - For stream/CBC transformations and version SSL3, the MAC
+ *   keys are stored explicitly in mac_enc, mac_dec and have
+ *   a fixed size of 20 bytes. These fields are unused for
+ *   AEAD transformations or transformations >= TLS 1.0.
+ * - For transformations using an implicit IV maintained within
+ *   the transformation context, its contents are stored within
+ *   iv_{enc/dec}.
+ * - The value of ivlen indicates the length of the IV.
+ *   This is redundant in case of stream/CBC transformations
+ *   which always use 0 resp. the cipher's block length as the
+ *   IV length, but is needed for AEAD ciphers and may be
+ *   different from the underlying cipher's block length
+ *   in this case.
+ * - The field fixed_ivlen is nonzero for AEAD transformations only
+ *   and indicates the length of the static part of the IV which is
+ *   constant throughout the communication, and which is stored in
+ *   the first fixed_ivlen bytes of the iv_{enc/dec} arrays.
+ *   Note: For CBC in SSL3 and TLS 1.0, the fields iv_{enc/dec}
+ *   still store IV's for continued use across multiple transformations,
+ *   so it is not true that fixed_ivlen == 0 means that iv_{enc/dec} are
+ *   not being used!
+ * - minor_ver denotes the SSL/TLS version
+ * - For stream/CBC transformations, maclen denotes the length of the
+ *   authentication tag, while taglen is unused and 0.
+ * - For AEAD transformations, taglen denotes the length of the
+ *   authentication tag, while maclen is unused and 0.
+ * - For CBC transformations, encrypt_then_mac determines the
+ *   order of encryption and authentication. This field is unused
+ *   in other transformations.
+ *
+ */
+struct mbedtls_ssl_transform
+{
+    /*
+     * Session specific crypto layer
+     */
+    size_t minlen;                      /*!<  min. ciphertext length  */
+    size_t ivlen;                       /*!<  IV length               */
+    size_t fixed_ivlen;                 /*!<  Fixed part of IV (AEAD) */
+    size_t maclen;                      /*!<  MAC(CBC) len            */
+    size_t taglen;                      /*!<  TAG(AEAD) len           */
+
+    unsigned char iv_enc[16];           /*!<  IV (encryption)         */
+    unsigned char iv_dec[16];           /*!<  IV (decryption)         */
+
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
+
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+    /* Needed only for SSL v3.0 secret */
+    unsigned char mac_enc[20];          /*!<  SSL v3.0 secret (enc)   */
+    unsigned char mac_dec[20];          /*!<  SSL v3.0 secret (dec)   */
+#endif /* MBEDTLS_SSL_PROTO_SSL3 */
+
+    mbedtls_md_context_t md_ctx_enc;            /*!<  MAC (encryption)        */
+    mbedtls_md_context_t md_ctx_dec;            /*!<  MAC (decryption)        */
+
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+    int encrypt_then_mac;       /*!< flag for EtM activation                */
+#endif
+
+#endif /* MBEDTLS_SSL_SOME_MODES_USE_MAC */
+
+    mbedtls_cipher_context_t cipher_ctx_enc;    /*!<  encryption context      */
+    mbedtls_cipher_context_t cipher_ctx_dec;    /*!<  decryption context      */
+    int minor_ver;
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t in_cid_len;
+    uint8_t out_cid_len;
+    unsigned char in_cid [ MBEDTLS_SSL_CID_OUT_LEN_MAX ];
+    unsigned char out_cid[ MBEDTLS_SSL_CID_OUT_LEN_MAX ];
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+
+    /*
+     * Session specific compression layer
+     */
+#if defined(MBEDTLS_ZLIB_SUPPORT)
+    z_stream ctx_deflate;               /*!<  compression context     */
+    z_stream ctx_inflate;               /*!<  decompression context   */
+#endif
+
+#if defined(MBEDTLS_SSL_CONTEXT_SERIALIZATION)
+    /* We need the Hello random bytes in order to re-derive keys from the
+     * Master Secret and other session info, see ssl_populate_transform() */
+    unsigned char randbytes[64]; /*!< ServerHello.random+ClientHello.random */
+#endif /* MBEDTLS_SSL_CONTEXT_SERIALIZATION */
+};
+
+/*
+ * Return 1 if the transform uses an AEAD cipher, 0 otherwise.
+ * Equivalently, return 0 if a separate MAC is used, 1 otherwise.
+ */
+static inline int mbedtls_ssl_transform_uses_aead(
+        const mbedtls_ssl_transform *transform )
+{
+#if defined(MBEDTLS_SSL_SOME_MODES_USE_MAC)
+    return( transform->maclen == 0 && transform->taglen != 0 );
+#else
+    (void) transform;
+    return( 1 );
+#endif
+}
+
+/*
+ * Internal representation of record frames
+ *
+ * Instances come in two flavors:
+ * (1) Encrypted
+ *     These always have data_offset = 0
+ * (2) Unencrypted
+ *     These have data_offset set to the amount of
+ *     pre-expansion during record protection. Concretely,
+ *     this is the length of the fixed part of the explicit IV
+ *     used for encryption, or 0 if no explicit IV is used
+ *     (e.g. for CBC in TLS 1.0, or stream ciphers).
+ *
+ * The reason for the data_offset in the unencrypted case
+ * is to allow for in-place conversion of an unencrypted to
+ * an encrypted record. If the offset wasn't included, the
+ * encrypted content would need to be shifted afterwards to
+ * make space for the fixed IV.
+ *
+ */
+#if MBEDTLS_SSL_CID_OUT_LEN_MAX > MBEDTLS_SSL_CID_IN_LEN_MAX
+#define MBEDTLS_SSL_CID_LEN_MAX MBEDTLS_SSL_CID_OUT_LEN_MAX
+#else
+#define MBEDTLS_SSL_CID_LEN_MAX MBEDTLS_SSL_CID_IN_LEN_MAX
+#endif
+
+typedef struct
+{
+    uint8_t ctr[8];         /* In TLS:  The implicit record sequence number.
+                             * In DTLS: The 2-byte epoch followed by
+                             *          the 6-byte sequence number.
+                             * This is stored as a raw big endian byte array
+                             * as opposed to a uint64_t because we rarely
+                             * need to perform arithmetic on this, but do
+                             * need it as a Byte array for the purpose of
+                             * MAC computations.                             */
+    uint8_t type;           /* The record content type.                      */
+    uint8_t ver[2];         /* SSL/TLS version as present on the wire.
+                             * Convert to internal presentation of versions
+                             * using mbedtls_ssl_read_version() and
+                             * mbedtls_ssl_write_version().
+                             * Keep wire-format for MAC computations.        */
+
+    unsigned char *buf;     /* Memory buffer enclosing the record content    */
+    size_t buf_len;         /* Buffer length                                 */
+    size_t data_offset;     /* Offset of record content                      */
+    size_t data_len;        /* Length of record content                      */
+
+#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID)
+    uint8_t cid_len;        /* Length of the CID (0 if not present)          */
+    unsigned char cid[ MBEDTLS_SSL_CID_LEN_MAX ]; /* The CID                 */
+#endif /* MBEDTLS_SSL_DTLS_CONNECTION_ID */
+} mbedtls_record;
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/*
+ * List of certificate + private key pairs
+ */
+struct mbedtls_ssl_key_cert
+{
+    mbedtls_x509_crt *cert;                 /*!< cert                       */
+    mbedtls_pk_context *key;                /*!< private key                */
+    mbedtls_ssl_key_cert *next;             /*!< next key/cert pair         */
+};
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+/*
+ * List of handshake messages kept around for resending
+ */
+struct mbedtls_ssl_flight_item
+{
+    unsigned char *p;       /*!< message, including handshake headers   */
+    size_t len;             /*!< length of p                            */
+    unsigned char type;     /*!< type of the message: handshake or CCS  */
+    mbedtls_ssl_flight_item *next;  /*!< next handshake message(s)              */
+};
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
+    defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
+
+/* Find an entry in a signature-hash set matching a given hash algorithm. */
+mbedtls_md_type_t mbedtls_ssl_sig_hash_set_find( mbedtls_ssl_sig_hash_set_t *set,
+                                                 mbedtls_pk_type_t sig_alg );
+/* Add a signature-hash-pair to a signature-hash set */
+void mbedtls_ssl_sig_hash_set_add( mbedtls_ssl_sig_hash_set_t *set,
+                                   mbedtls_pk_type_t sig_alg,
+                                   mbedtls_md_type_t md_alg );
+/* Allow exactly one hash algorithm for each signature. */
+void mbedtls_ssl_sig_hash_set_const_hash( mbedtls_ssl_sig_hash_set_t *set,
+                                          mbedtls_md_type_t md_alg );
+
+/* Setup an empty signature-hash set */
+static inline void mbedtls_ssl_sig_hash_set_init( mbedtls_ssl_sig_hash_set_t *set )
+{
+    mbedtls_ssl_sig_hash_set_const_hash( set, MBEDTLS_MD_NONE );
+}
+
+#endif /* MBEDTLS_SSL_PROTO_TLS1_2) &&
+          MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
+
+/**
+ * \brief           Free referenced items in an SSL transform context and clear
+ *                  memory
+ *
+ * \param transform SSL transform context
+ */
+void mbedtls_ssl_transform_free( mbedtls_ssl_transform *transform );
+
+/**
+ * \brief           Free referenced items in an SSL handshake context and clear
+ *                  memory
+ *
+ * \param ssl       SSL context
+ */
+void mbedtls_ssl_handshake_free( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_handshake_client_step( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_handshake_server_step( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_handshake_wrapup( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_send_fatal_handshake_failure( mbedtls_ssl_context *ssl );
+
+void mbedtls_ssl_reset_checksum( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_derive_keys( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_handle_message_type( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_prepare_handshake_record( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_update_handshake_status( mbedtls_ssl_context *ssl );
+
+/**
+ * \brief       Update record layer
+ *
+ *              This function roughly separates the implementation
+ *              of the logic of (D)TLS from the implementation
+ *              of the secure transport.
+ *
+ * \param  ssl              The SSL context to use.
+ * \param  update_hs_digest This indicates if the handshake digest
+ *                          should be automatically updated in case
+ *                          a handshake message is found.
+ *
+ * \return      0 or non-zero error code.
+ *
+ * \note        A clarification on what is called 'record layer' here
+ *              is in order, as many sensible definitions are possible:
+ *
+ *              The record layer takes as input an untrusted underlying
+ *              transport (stream or datagram) and transforms it into
+ *              a serially multiplexed, secure transport, which
+ *              conceptually provides the following:
+ *
+ *              (1) Three datagram based, content-agnostic transports
+ *                  for handshake, alert and CCS messages.
+ *              (2) One stream- or datagram-based transport
+ *                  for application data.
+ *              (3) Functionality for changing the underlying transform
+ *                  securing the contents.
+ *
+ *              The interface to this functionality is given as follows:
+ *
+ *              a Updating
+ *                [Currently implemented by mbedtls_ssl_read_record]
+ *
+ *                Check if and on which of the four 'ports' data is pending:
+ *                Nothing, a controlling datagram of type (1), or application
+ *                data (2). In any case data is present, internal buffers
+ *                provide access to the data for the user to process it.
+ *                Consumption of type (1) datagrams is done automatically
+ *                on the next update, invalidating that the internal buffers
+ *                for previous datagrams, while consumption of application
+ *                data (2) is user-controlled.
+ *
+ *              b Reading of application data
+ *                [Currently manual adaption of ssl->in_offt pointer]
+ *
+ *                As mentioned in the last paragraph, consumption of data
+ *                is different from the automatic consumption of control
+ *                datagrams (1) because application data is treated as a stream.
+ *
+ *              c Tracking availability of application data
+ *                [Currently manually through decreasing ssl->in_msglen]
+ *
+ *                For efficiency and to retain datagram semantics for
+ *                application data in case of DTLS, the record layer
+ *                provides functionality for checking how much application
+ *                data is still available in the internal buffer.
+ *
+ *              d Changing the transformation securing the communication.
+ *
+ *              Given an opaque implementation of the record layer in the
+ *              above sense, it should be possible to implement the logic
+ *              of (D)TLS on top of it without the need to know anything
+ *              about the record layer's internals. This is done e.g.
+ *              in all the handshake handling functions, and in the
+ *              application data reading function mbedtls_ssl_read.
+ *
+ * \note        The above tries to give a conceptual picture of the
+ *              record layer, but the current implementation deviates
+ *              from it in some places. For example, our implementation of
+ *              the update functionality through mbedtls_ssl_read_record
+ *              discards datagrams depending on the current state, which
+ *              wouldn't fall under the record layer's responsibility
+ *              following the above definition.
+ *
+ */
+int mbedtls_ssl_read_record( mbedtls_ssl_context *ssl,
+                             unsigned update_hs_digest );
+int mbedtls_ssl_fetch_input( mbedtls_ssl_context *ssl, size_t nb_want );
+
+int mbedtls_ssl_write_handshake_msg( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_write_record( mbedtls_ssl_context *ssl, uint8_t force_flush );
+int mbedtls_ssl_flush_output( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_parse_certificate( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_write_certificate( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_parse_change_cipher_spec( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_write_change_cipher_spec( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_parse_finished( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_write_finished( mbedtls_ssl_context *ssl );
+
+void mbedtls_ssl_optimize_checksum( mbedtls_ssl_context *ssl,
+                            const mbedtls_ssl_ciphersuite_t *ciphersuite_info );
+
+#if defined(MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED)
+int mbedtls_ssl_psk_derive_premaster( mbedtls_ssl_context *ssl, mbedtls_key_exchange_type_t key_ex );
+
+/**
+ * Get the first defined PSK by order of precedence:
+ * 1. handshake PSK set by \c mbedtls_ssl_set_hs_psk() in the PSK callback
+ * 2. static PSK configured by \c mbedtls_ssl_conf_psk()
+ * Return a code and update the pair (PSK, PSK length) passed to this function
+ */
+static inline int mbedtls_ssl_get_psk( const mbedtls_ssl_context *ssl,
+    const unsigned char **psk, size_t *psk_len )
+{
+    if( ssl->handshake->psk != NULL && ssl->handshake->psk_len > 0 )
+    {
+        *psk = ssl->handshake->psk;
+        *psk_len = ssl->handshake->psk_len;
+    }
+
+    else if( ssl->conf->psk != NULL && ssl->conf->psk_len > 0 )
+    {
+        *psk = ssl->conf->psk;
+        *psk_len = ssl->conf->psk_len;
+    }
+
+    else
+    {
+        *psk = NULL;
+        *psk_len = 0;
+        return( MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED );
+    }
+
+    return( 0 );
+}
+
+#if defined(MBEDTLS_USE_PSA_CRYPTO)
+/**
+ * Get the first defined opaque PSK by order of precedence:
+ * 1. handshake PSK set by \c mbedtls_ssl_set_hs_psk_opaque() in the PSK
+ *    callback
+ * 2. static PSK configured by \c mbedtls_ssl_conf_psk_opaque()
+ * Return an opaque PSK
+ */
+static inline psa_key_id_t mbedtls_ssl_get_opaque_psk(
+    const mbedtls_ssl_context *ssl )
+{
+    if( ! mbedtls_svc_key_id_is_null( ssl->handshake->psk_opaque ) )
+        return( ssl->handshake->psk_opaque );
+
+    if( ! mbedtls_svc_key_id_is_null( ssl->conf->psk_opaque ) )
+        return( ssl->conf->psk_opaque );
+
+    return( MBEDTLS_SVC_KEY_ID_INIT );
+}
+#endif /* MBEDTLS_USE_PSA_CRYPTO */
+
+#endif /* MBEDTLS_KEY_EXCHANGE_SOME_PSK_ENABLED */
+
+#if defined(MBEDTLS_PK_C)
+unsigned char mbedtls_ssl_sig_from_pk( mbedtls_pk_context *pk );
+unsigned char mbedtls_ssl_sig_from_pk_alg( mbedtls_pk_type_t type );
+mbedtls_pk_type_t mbedtls_ssl_pk_alg_from_sig( unsigned char sig );
+#endif
+
+mbedtls_md_type_t mbedtls_ssl_md_alg_from_hash( unsigned char hash );
+unsigned char mbedtls_ssl_hash_from_md_alg( int md );
+int mbedtls_ssl_set_calc_verify_md( mbedtls_ssl_context *ssl, int md );
+
+#if defined(MBEDTLS_ECP_C)
+int mbedtls_ssl_check_curve( const mbedtls_ssl_context *ssl, mbedtls_ecp_group_id grp_id );
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED)
+int mbedtls_ssl_check_sig_hash( const mbedtls_ssl_context *ssl,
+                                mbedtls_md_type_t md );
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_SRTP)
+static inline mbedtls_ssl_srtp_profile mbedtls_ssl_check_srtp_profile_value
+                                                    ( const uint16_t srtp_profile_value )
+{
+    switch( srtp_profile_value )
+    {
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_80:
+        case MBEDTLS_TLS_SRTP_AES128_CM_HMAC_SHA1_32:
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_80:
+        case MBEDTLS_TLS_SRTP_NULL_HMAC_SHA1_32:
+            return srtp_profile_value;
+        default: break;
+    }
+    return( MBEDTLS_TLS_SRTP_UNSET );
+}
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+static inline mbedtls_pk_context *mbedtls_ssl_own_key( mbedtls_ssl_context *ssl )
+{
+    mbedtls_ssl_key_cert *key_cert;
+
+    if( ssl->handshake != NULL && ssl->handshake->key_cert != NULL )
+        key_cert = ssl->handshake->key_cert;
+    else
+        key_cert = ssl->conf->key_cert;
+
+    return( key_cert == NULL ? NULL : key_cert->key );
+}
+
+static inline mbedtls_x509_crt *mbedtls_ssl_own_cert( mbedtls_ssl_context *ssl )
+{
+    mbedtls_ssl_key_cert *key_cert;
+
+    if( ssl->handshake != NULL && ssl->handshake->key_cert != NULL )
+        key_cert = ssl->handshake->key_cert;
+    else
+        key_cert = ssl->conf->key_cert;
+
+    return( key_cert == NULL ? NULL : key_cert->cert );
+}
+
+/*
+ * Check usage of a certificate wrt extensions:
+ * keyUsage, extendedKeyUsage (later), and nSCertType (later).
+ *
+ * Warning: cert_endpoint is the endpoint of the cert (ie, of our peer when we
+ * check a cert we received from them)!
+ *
+ * Return 0 if everything is OK, -1 if not.
+ */
+int mbedtls_ssl_check_cert_usage( const mbedtls_x509_crt *cert,
+                          const mbedtls_ssl_ciphersuite_t *ciphersuite,
+                          int cert_endpoint,
+                          uint32_t *flags );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+void mbedtls_ssl_write_version( int major, int minor, int transport,
+                        unsigned char ver[2] );
+void mbedtls_ssl_read_version( int *major, int *minor, int transport,
+                       const unsigned char ver[2] );
+
+static inline size_t mbedtls_ssl_in_hdr_len( const mbedtls_ssl_context *ssl )
+{
+#if !defined(MBEDTLS_SSL_PROTO_DTLS)
+    ((void) ssl);
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM )
+    {
+        return( 13 );
+    }
+    else
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+    {
+        return( 5 );
+    }
+}
+
+static inline size_t mbedtls_ssl_out_hdr_len( const mbedtls_ssl_context *ssl )
+{
+    return( (size_t) ( ssl->out_iv - ssl->out_hdr ) );
+}
+
+static inline size_t mbedtls_ssl_hs_hdr_len( const mbedtls_ssl_context *ssl )
+{
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM )
+        return( 12 );
+#else
+    ((void) ssl);
+#endif
+    return( 4 );
+}
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+void mbedtls_ssl_send_flight_completed( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_recv_flight_completed( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_resend( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_flight_transmit( mbedtls_ssl_context *ssl );
+#endif
+
+/* Visible for testing purposes only */
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+int mbedtls_ssl_dtls_replay_check( mbedtls_ssl_context const *ssl );
+void mbedtls_ssl_dtls_replay_update( mbedtls_ssl_context *ssl );
+#endif
+
+int mbedtls_ssl_session_copy( mbedtls_ssl_session *dst,
+                              const mbedtls_ssl_session *src );
+
+#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \
+    defined(MBEDTLS_SSL_PROTO_TLS1_1)
+int mbedtls_ssl_get_key_exchange_md_ssl_tls( mbedtls_ssl_context *ssl,
+                                        unsigned char *output,
+                                        unsigned char *data, size_t data_len );
+#endif /* MBEDTLS_SSL_PROTO_SSL3 || MBEDTLS_SSL_PROTO_TLS1 || \
+          MBEDTLS_SSL_PROTO_TLS1_1 */
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \
+    defined(MBEDTLS_SSL_PROTO_TLS1_2)
+/* The hash buffer must have at least MBEDTLS_MD_MAX_SIZE bytes of length. */
+int mbedtls_ssl_get_key_exchange_md_tls1_2( mbedtls_ssl_context *ssl,
+                                            unsigned char *hash, size_t *hashlen,
+                                            unsigned char *data, size_t data_len,
+                                            mbedtls_md_type_t md_alg );
+#endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 || \
+          MBEDTLS_SSL_PROTO_TLS1_2 */
+
+#ifdef __cplusplus
+}
+#endif
+
+void mbedtls_ssl_transform_init( mbedtls_ssl_transform *transform );
+int mbedtls_ssl_encrypt_buf( mbedtls_ssl_context *ssl,
+                             mbedtls_ssl_transform *transform,
+                             mbedtls_record *rec,
+                             int (*f_rng)(void *, unsigned char *, size_t),
+                             void *p_rng );
+int mbedtls_ssl_decrypt_buf( mbedtls_ssl_context const *ssl,
+                             mbedtls_ssl_transform *transform,
+                             mbedtls_record *rec );
+
+/* Length of the "epoch" field in the record header */
+static inline size_t mbedtls_ssl_ep_len( const mbedtls_ssl_context *ssl )
+{
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+    if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM )
+        return( 2 );
+#else
+    ((void) ssl);
+#endif
+    return( 0 );
+}
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+int mbedtls_ssl_resend_hello_request( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+void mbedtls_ssl_set_timer( mbedtls_ssl_context *ssl, uint32_t millisecs );
+int mbedtls_ssl_check_timer( mbedtls_ssl_context *ssl );
+
+void mbedtls_ssl_reset_in_out_pointers( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_update_out_pointers( mbedtls_ssl_context *ssl,
+                              mbedtls_ssl_transform *transform );
+void mbedtls_ssl_update_in_pointers( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_session_reset_int( mbedtls_ssl_context *ssl, int partial );
+
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+void mbedtls_ssl_dtls_replay_reset( mbedtls_ssl_context *ssl );
+#endif
+
+void mbedtls_ssl_handshake_wrapup_free_hs_transform( mbedtls_ssl_context *ssl );
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+int mbedtls_ssl_start_renegotiation( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+size_t mbedtls_ssl_get_current_mtu( const mbedtls_ssl_context *ssl );
+void mbedtls_ssl_buffering_free( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_flight_free( mbedtls_ssl_flight_item *flight );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+#endif /* ssl_internal.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
new file mode 100644
index 00000000000..a882eed23b9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
@@ -0,0 +1,140 @@
+/**
+ * \file ssl_ticket.h
+ *
+ * \brief TLS server ticket callbacks implementation
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_SSL_TICKET_H
+#define MBEDTLS_SSL_TICKET_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+/*
+ * This implementation of the session ticket callbacks includes key
+ * management, rotating the keys periodically in order to preserve forward
+ * secrecy, when MBEDTLS_HAVE_TIME is defined.
+ */
+
+#include "mbedtls/ssl.h"
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "mbedtls/threading.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief   Information for session ticket protection
+ */
+typedef struct mbedtls_ssl_ticket_key
+{
+    unsigned char name[4];          /*!< random key identifier              */
+    uint32_t generation_time;       /*!< key generation timestamp (seconds) */
+    mbedtls_cipher_context_t ctx;   /*!< context for auth enc/decryption    */
+}
+mbedtls_ssl_ticket_key;
+
+/**
+ * \brief   Context for session ticket handling functions
+ */
+typedef struct mbedtls_ssl_ticket_context
+{
+    mbedtls_ssl_ticket_key keys[2]; /*!< ticket protection keys             */
+    unsigned char active;           /*!< index of the currently active key  */
+
+    uint32_t ticket_lifetime;       /*!< lifetime of tickets in seconds     */
+
+    /** Callback for getting (pseudo-)random numbers                        */
+    int  (*f_rng)(void *, unsigned char *, size_t);
+    void *p_rng;                    /*!< context for the RNG function       */
+
+#if defined(MBEDTLS_THREADING_C)
+    mbedtls_threading_mutex_t mutex;
+#endif
+}
+mbedtls_ssl_ticket_context;
+
+/**
+ * \brief           Initialize a ticket context.
+ *                  (Just make it ready for mbedtls_ssl_ticket_setup()
+ *                  or mbedtls_ssl_ticket_free().)
+ *
+ * \param ctx       Context to be initialized
+ */
+void mbedtls_ssl_ticket_init( mbedtls_ssl_ticket_context *ctx );
+
+/**
+ * \brief           Prepare context to be actually used
+ *
+ * \param ctx       Context to be set up
+ * \param f_rng     RNG callback function
+ * \param p_rng     RNG callback context
+ * \param cipher    AEAD cipher to use for ticket protection.
+ *                  Recommended value: MBEDTLS_CIPHER_AES_256_GCM.
+ * \param lifetime  Tickets lifetime in seconds
+ *                  Recommended value: 86400 (one day).
+ *
+ * \note            It is highly recommended to select a cipher that is at
+ *                  least as strong as the strongest ciphersuite
+ *                  supported. Usually that means a 256-bit key.
+ *
+ * \note            The lifetime of the keys is twice the lifetime of tickets.
+ *                  It is recommended to pick a reasonnable lifetime so as not
+ *                  to negate the benefits of forward secrecy.
+ *
+ * \return          0 if successful,
+ *                  or a specific MBEDTLS_ERR_XXX error code
+ */
+int mbedtls_ssl_ticket_setup( mbedtls_ssl_ticket_context *ctx,
+    int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+    mbedtls_cipher_type_t cipher,
+    uint32_t lifetime );
+
+/**
+ * \brief           Implementation of the ticket write callback
+ *
+ * \note            See \c mbedtls_ssl_ticket_write_t for description
+ */
+mbedtls_ssl_ticket_write_t mbedtls_ssl_ticket_write;
+
+/**
+ * \brief           Implementation of the ticket parse callback
+ *
+ * \note            See \c mbedtls_ssl_ticket_parse_t for description
+ */
+mbedtls_ssl_ticket_parse_t mbedtls_ssl_ticket_parse;
+
+/**
+ * \brief           Free a context's content and zeroize it.
+ *
+ * \param ctx       Context to be cleaned up
+ */
+void mbedtls_ssl_ticket_free( mbedtls_ssl_ticket_context *ctx );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ssl_ticket.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/threading.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/threading.h
new file mode 100644
index 00000000000..d147c73f066
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/threading.h
@@ -0,0 +1,126 @@
+/**
+ * \file threading.h
+ *
+ * \brief Threading abstraction layer
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_THREADING_H
+#define MBEDTLS_THREADING_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stdlib.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE is deprecated and should not be
+ * used. */
+/** The selected feature is not available. */
+#define MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE         -0x001A
+
+/** Bad input parameters to function. */
+#define MBEDTLS_ERR_THREADING_BAD_INPUT_DATA              -0x001C
+/** Locking / unlocking / free failed with error code. */
+#define MBEDTLS_ERR_THREADING_MUTEX_ERROR                 -0x001E
+
+#if defined(MBEDTLS_THREADING_PTHREAD)
+#include <pthread.h>
+typedef struct mbedtls_threading_mutex_t
+{
+    pthread_mutex_t mutex;
+    /* is_valid is 0 after a failed init or a free, and nonzero after a
+     * successful init. This field is not considered part of the public
+     * API of Mbed TLS and may change without notice. */
+    char is_valid;
+} mbedtls_threading_mutex_t;
+#endif
+
+#if defined(MBEDTLS_THREADING_ALT)
+/* You should define the mbedtls_threading_mutex_t type in your header */
+#include "threading_alt.h"
+
+/**
+ * \brief           Set your alternate threading implementation function
+ *                  pointers and initialize global mutexes. If used, this
+ *                  function must be called once in the main thread before any
+ *                  other mbed TLS function is called, and
+ *                  mbedtls_threading_free_alt() must be called once in the main
+ *                  thread after all other mbed TLS functions.
+ *
+ * \note            mutex_init() and mutex_free() don't return a status code.
+ *                  If mutex_init() fails, it should leave its argument (the
+ *                  mutex) in a state such that mutex_lock() will fail when
+ *                  called with this argument.
+ *
+ * \param mutex_init    the init function implementation
+ * \param mutex_free    the free function implementation
+ * \param mutex_lock    the lock function implementation
+ * \param mutex_unlock  the unlock function implementation
+ */
+void mbedtls_threading_set_alt( void (*mutex_init)( mbedtls_threading_mutex_t * ),
+                       void (*mutex_free)( mbedtls_threading_mutex_t * ),
+                       int (*mutex_lock)( mbedtls_threading_mutex_t * ),
+                       int (*mutex_unlock)( mbedtls_threading_mutex_t * ) );
+
+/**
+ * \brief               Free global mutexes.
+ */
+void mbedtls_threading_free_alt( void );
+#endif /* MBEDTLS_THREADING_ALT */
+
+#if defined(MBEDTLS_THREADING_C)
+/*
+ * The function pointers for mutex_init, mutex_free, mutex_ and mutex_unlock
+ *
+ * All these functions are expected to work or the result will be undefined.
+ */
+extern void (*mbedtls_mutex_init)( mbedtls_threading_mutex_t *mutex );
+extern void (*mbedtls_mutex_free)( mbedtls_threading_mutex_t *mutex );
+extern int (*mbedtls_mutex_lock)( mbedtls_threading_mutex_t *mutex );
+extern int (*mbedtls_mutex_unlock)( mbedtls_threading_mutex_t *mutex );
+
+/*
+ * Global mutexes
+ */
+#if defined(MBEDTLS_FS_IO)
+extern mbedtls_threading_mutex_t mbedtls_threading_readdir_mutex;
+#endif
+
+#if defined(MBEDTLS_HAVE_TIME_DATE) && !defined(MBEDTLS_PLATFORM_GMTIME_R_ALT)
+/* This mutex may or may not be used in the default definition of
+ * mbedtls_platform_gmtime_r(), but in order to determine that,
+ * we need to check POSIX features, hence modify _POSIX_C_SOURCE.
+ * With the current approach, this declaration is orphaned, lacking
+ * an accompanying definition, in case mbedtls_platform_gmtime_r()
+ * doesn't need it, but that's not a problem. */
+extern mbedtls_threading_mutex_t mbedtls_threading_gmtime_mutex;
+#endif /* MBEDTLS_HAVE_TIME_DATE && !MBEDTLS_PLATFORM_GMTIME_R_ALT */
+
+#endif /* MBEDTLS_THREADING_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* threading.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/timing.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/timing.h
new file mode 100644
index 00000000000..b7290cfcabc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/timing.h
@@ -0,0 +1,151 @@
+/**
+ * \file timing.h
+ *
+ * \brief Portable interface to timeouts and to the CPU cycle counter
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_TIMING_H
+#define MBEDTLS_TIMING_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_TIMING_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          timer structure
+ */
+struct mbedtls_timing_hr_time
+{
+    unsigned char opaque[32];
+};
+
+/**
+ * \brief          Context for mbedtls_timing_set/get_delay()
+ */
+typedef struct mbedtls_timing_delay_context
+{
+    struct mbedtls_timing_hr_time   timer;
+    uint32_t                        int_ms;
+    uint32_t                        fin_ms;
+} mbedtls_timing_delay_context;
+
+#else  /* MBEDTLS_TIMING_ALT */
+#include "timing_alt.h"
+#endif /* MBEDTLS_TIMING_ALT */
+
+extern volatile int mbedtls_timing_alarmed;
+
+/**
+ * \brief          Return the CPU cycle counter value
+ *
+ * \warning        This is only a best effort! Do not rely on this!
+ *                 In particular, it is known to be unreliable on virtual
+ *                 machines.
+ *
+ * \note           This value starts at an unspecified origin and
+ *                 may wrap around.
+ */
+unsigned long mbedtls_timing_hardclock( void );
+
+/**
+ * \brief          Return the elapsed time in milliseconds
+ *
+ * \param val      points to a timer structure
+ * \param reset    If 0, query the elapsed time. Otherwise (re)start the timer.
+ *
+ * \return         Elapsed time since the previous reset in ms. When
+ *                 restarting, this is always 0.
+ *
+ * \note           To initialize a timer, call this function with reset=1.
+ *
+ *                 Determining the elapsed time and resetting the timer is not
+ *                 atomic on all platforms, so after the sequence
+ *                 `{ get_timer(1); ...; time1 = get_timer(1); ...; time2 =
+ *                 get_timer(0) }` the value time1+time2 is only approximately
+ *                 the delay since the first reset.
+ */
+unsigned long mbedtls_timing_get_timer( struct mbedtls_timing_hr_time *val, int reset );
+
+/**
+ * \brief          Setup an alarm clock
+ *
+ * \param seconds  delay before the "mbedtls_timing_alarmed" flag is set
+ *                 (must be >=0)
+ *
+ * \warning        Only one alarm at a time  is supported. In a threaded
+ *                 context, this means one for the whole process, not one per
+ *                 thread.
+ */
+void mbedtls_set_alarm( int seconds );
+
+/**
+ * \brief          Set a pair of delays to watch
+ *                 (See \c mbedtls_timing_get_delay().)
+ *
+ * \param data     Pointer to timing data.
+ *                 Must point to a valid \c mbedtls_timing_delay_context struct.
+ * \param int_ms   First (intermediate) delay in milliseconds.
+ *                 The effect if int_ms > fin_ms is unspecified.
+ * \param fin_ms   Second (final) delay in milliseconds.
+ *                 Pass 0 to cancel the current delay.
+ *
+ * \note           To set a single delay, either use \c mbedtls_timing_set_timer
+ *                 directly or use this function with int_ms == fin_ms.
+ */
+void mbedtls_timing_set_delay( void *data, uint32_t int_ms, uint32_t fin_ms );
+
+/**
+ * \brief          Get the status of delays
+ *                 (Memory helper: number of delays passed.)
+ *
+ * \param data     Pointer to timing data
+ *                 Must point to a valid \c mbedtls_timing_delay_context struct.
+ *
+ * \return         -1 if cancelled (fin_ms = 0),
+ *                  0 if none of the delays are passed,
+ *                  1 if only the intermediate delay is passed,
+ *                  2 if the final delay is passed.
+ */
+int mbedtls_timing_get_delay( void *data );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if a test failed
+ */
+int mbedtls_timing_self_test( int verbose );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* timing.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/version.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/version.h
new file mode 100644
index 00000000000..b1a92b2bcf3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/version.h
@@ -0,0 +1,110 @@
+/**
+ * \file version.h
+ *
+ * \brief Run-time version information
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+/*
+ * This set of compile-time defines and run-time variables can be used to
+ * determine the version number of the mbed TLS library used.
+ */
+#ifndef MBEDTLS_VERSION_H
+#define MBEDTLS_VERSION_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+/**
+ * The version number x.y.z is split into three parts.
+ * Major, Minor, Patchlevel
+ */
+#define MBEDTLS_VERSION_MAJOR  2
+#define MBEDTLS_VERSION_MINOR  28
+#define MBEDTLS_VERSION_PATCH  0
+
+/**
+ * The single version number has the following structure:
+ *    MMNNPP00
+ *    Major version | Minor version | Patch version
+ */
+#define MBEDTLS_VERSION_NUMBER         0x021C0000
+#define MBEDTLS_VERSION_STRING         "2.28.0"
+#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.28.0"
+
+#if defined(MBEDTLS_VERSION_C)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Get the version number.
+ *
+ * \return          The constructed version number in the format
+ *                  MMNNPP00 (Major, Minor, Patch).
+ */
+unsigned int mbedtls_version_get_number( void );
+
+/**
+ * Get the version string ("x.y.z").
+ *
+ * \param string    The string that will receive the value.
+ *                  (Should be at least 9 bytes in size)
+ */
+void mbedtls_version_get_string( char *string );
+
+/**
+ * Get the full version string ("mbed TLS x.y.z").
+ *
+ * \param string    The string that will receive the value. The mbed TLS version
+ *                  string will use 18 bytes AT MOST including a terminating
+ *                  null byte.
+ *                  (So the buffer should be at least 18 bytes to receive this
+ *                  version string).
+ */
+void mbedtls_version_get_string_full( char *string );
+
+/**
+ * \brief           Check if support for a feature was compiled into this
+ *                  mbed TLS binary. This allows you to see at runtime if the
+ *                  library was for instance compiled with or without
+ *                  Multi-threading support.
+ *
+ * \note            only checks against defines in the sections "System
+ *                  support", "mbed TLS modules" and "mbed TLS feature
+ *                  support" in config.h
+ *
+ * \param feature   The string for the define to check (e.g. "MBEDTLS_AES_C")
+ *
+ * \return          0 if the feature is present,
+ *                  -1 if the feature is not present and
+ *                  -2 if support for feature checking as a whole was not
+ *                  compiled in.
+ */
+int mbedtls_version_check_feature( const char *feature );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_VERSION_C */
+
+#endif /* version.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509.h
new file mode 100644
index 00000000000..c1775014300
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509.h
@@ -0,0 +1,379 @@
+/**
+ * \file x509.h
+ *
+ * \brief X.509 generic defines and structures
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_X509_H
+#define MBEDTLS_X509_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/asn1.h"
+#include "mbedtls/pk.h"
+
+#if defined(MBEDTLS_RSA_C)
+#include "mbedtls/rsa.h"
+#endif
+
+/**
+ * \addtogroup x509_module
+ * \{
+ */
+
+#if !defined(MBEDTLS_X509_MAX_INTERMEDIATE_CA)
+/**
+ * Maximum number of intermediate CAs in a verification chain.
+ * That is, maximum length of the chain, excluding the end-entity certificate
+ * and the trusted root certificate.
+ *
+ * Set this to a low value to prevent an adversary from making you waste
+ * resources verifying an overlong certificate chain.
+ */
+#define MBEDTLS_X509_MAX_INTERMEDIATE_CA   8
+#endif
+
+/**
+ * \name X509 Error codes
+ * \{
+ */
+/** Unavailable feature, e.g. RSA hashing/encryption combination. */
+#define MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE              -0x2080
+/** Requested OID is unknown. */
+#define MBEDTLS_ERR_X509_UNKNOWN_OID                      -0x2100
+/** The CRT/CRL/CSR format is invalid, e.g. different type expected. */
+#define MBEDTLS_ERR_X509_INVALID_FORMAT                   -0x2180
+/** The CRT/CRL/CSR version element is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_VERSION                  -0x2200
+/** The serial tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_SERIAL                   -0x2280
+/** The algorithm tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_ALG                      -0x2300
+/** The name tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_NAME                     -0x2380
+/** The date tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_DATE                     -0x2400
+/** The signature tag or value invalid. */
+#define MBEDTLS_ERR_X509_INVALID_SIGNATURE                -0x2480
+/** The extension tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_EXTENSIONS               -0x2500
+/** CRT/CRL/CSR has an unsupported version number. */
+#define MBEDTLS_ERR_X509_UNKNOWN_VERSION                  -0x2580
+/** Signature algorithm (oid) is unsupported. */
+#define MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG                  -0x2600
+/** Signature algorithms do not match. (see \c ::mbedtls_x509_crt sig_oid) */
+#define MBEDTLS_ERR_X509_SIG_MISMATCH                     -0x2680
+/** Certificate verification failed, e.g. CRL, CA or signature check failed. */
+#define MBEDTLS_ERR_X509_CERT_VERIFY_FAILED               -0x2700
+/** Format not recognized as DER or PEM. */
+#define MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT              -0x2780
+/** Input invalid. */
+#define MBEDTLS_ERR_X509_BAD_INPUT_DATA                   -0x2800
+/** Allocation of memory failed. */
+#define MBEDTLS_ERR_X509_ALLOC_FAILED                     -0x2880
+/** Read/write of file failed. */
+#define MBEDTLS_ERR_X509_FILE_IO_ERROR                    -0x2900
+/** Destination buffer is too small. */
+#define MBEDTLS_ERR_X509_BUFFER_TOO_SMALL                 -0x2980
+/** A fatal error occurred, eg the chain is too long or the vrfy callback failed. */
+#define MBEDTLS_ERR_X509_FATAL_ERROR                      -0x3000
+/* \} name */
+
+/**
+ * \name X509 Verify codes
+ * \{
+ */
+/* Reminder: update x509_crt_verify_strings[] in library/x509_crt.c */
+#define MBEDTLS_X509_BADCERT_EXPIRED             0x01  /**< The certificate validity has expired. */
+#define MBEDTLS_X509_BADCERT_REVOKED             0x02  /**< The certificate has been revoked (is on a CRL). */
+#define MBEDTLS_X509_BADCERT_CN_MISMATCH         0x04  /**< The certificate Common Name (CN) does not match with the expected CN. */
+#define MBEDTLS_X509_BADCERT_NOT_TRUSTED         0x08  /**< The certificate is not correctly signed by the trusted CA. */
+#define MBEDTLS_X509_BADCRL_NOT_TRUSTED          0x10  /**< The CRL is not correctly signed by the trusted CA. */
+#define MBEDTLS_X509_BADCRL_EXPIRED              0x20  /**< The CRL is expired. */
+#define MBEDTLS_X509_BADCERT_MISSING             0x40  /**< Certificate was missing. */
+#define MBEDTLS_X509_BADCERT_SKIP_VERIFY         0x80  /**< Certificate verification was skipped. */
+#define MBEDTLS_X509_BADCERT_OTHER             0x0100  /**< Other reason (can be used by verify callback) */
+#define MBEDTLS_X509_BADCERT_FUTURE            0x0200  /**< The certificate validity starts in the future. */
+#define MBEDTLS_X509_BADCRL_FUTURE             0x0400  /**< The CRL is from the future */
+#define MBEDTLS_X509_BADCERT_KEY_USAGE         0x0800  /**< Usage does not match the keyUsage extension. */
+#define MBEDTLS_X509_BADCERT_EXT_KEY_USAGE     0x1000  /**< Usage does not match the extendedKeyUsage extension. */
+#define MBEDTLS_X509_BADCERT_NS_CERT_TYPE      0x2000  /**< Usage does not match the nsCertType extension. */
+#define MBEDTLS_X509_BADCERT_BAD_MD            0x4000  /**< The certificate is signed with an unacceptable hash. */
+#define MBEDTLS_X509_BADCERT_BAD_PK            0x8000  /**< The certificate is signed with an unacceptable PK alg (eg RSA vs ECDSA). */
+#define MBEDTLS_X509_BADCERT_BAD_KEY         0x010000  /**< The certificate is signed with an unacceptable key (eg bad curve, RSA too short). */
+#define MBEDTLS_X509_BADCRL_BAD_MD           0x020000  /**< The CRL is signed with an unacceptable hash. */
+#define MBEDTLS_X509_BADCRL_BAD_PK           0x040000  /**< The CRL is signed with an unacceptable PK alg (eg RSA vs ECDSA). */
+#define MBEDTLS_X509_BADCRL_BAD_KEY          0x080000  /**< The CRL is signed with an unacceptable key (eg bad curve, RSA too short). */
+
+/* \} name */
+/* \} addtogroup x509_module */
+
+/*
+ * X.509 v3 Subject Alternative Name types.
+ *      otherName                       [0]     OtherName,
+ *      rfc822Name                      [1]     IA5String,
+ *      dNSName                         [2]     IA5String,
+ *      x400Address                     [3]     ORAddress,
+ *      directoryName                   [4]     Name,
+ *      ediPartyName                    [5]     EDIPartyName,
+ *      uniformResourceIdentifier       [6]     IA5String,
+ *      iPAddress                       [7]     OCTET STRING,
+ *      registeredID                    [8]     OBJECT IDENTIFIER
+ */
+#define MBEDTLS_X509_SAN_OTHER_NAME                      0
+#define MBEDTLS_X509_SAN_RFC822_NAME                     1
+#define MBEDTLS_X509_SAN_DNS_NAME                        2
+#define MBEDTLS_X509_SAN_X400_ADDRESS_NAME               3
+#define MBEDTLS_X509_SAN_DIRECTORY_NAME                  4
+#define MBEDTLS_X509_SAN_EDI_PARTY_NAME                  5
+#define MBEDTLS_X509_SAN_UNIFORM_RESOURCE_IDENTIFIER     6
+#define MBEDTLS_X509_SAN_IP_ADDRESS                      7
+#define MBEDTLS_X509_SAN_REGISTERED_ID                   8
+
+/*
+ * X.509 v3 Key Usage Extension flags
+ * Reminder: update x509_info_key_usage() when adding new flags.
+ */
+#define MBEDTLS_X509_KU_DIGITAL_SIGNATURE            (0x80)  /* bit 0 */
+#define MBEDTLS_X509_KU_NON_REPUDIATION              (0x40)  /* bit 1 */
+#define MBEDTLS_X509_KU_KEY_ENCIPHERMENT             (0x20)  /* bit 2 */
+#define MBEDTLS_X509_KU_DATA_ENCIPHERMENT            (0x10)  /* bit 3 */
+#define MBEDTLS_X509_KU_KEY_AGREEMENT                (0x08)  /* bit 4 */
+#define MBEDTLS_X509_KU_KEY_CERT_SIGN                (0x04)  /* bit 5 */
+#define MBEDTLS_X509_KU_CRL_SIGN                     (0x02)  /* bit 6 */
+#define MBEDTLS_X509_KU_ENCIPHER_ONLY                (0x01)  /* bit 7 */
+#define MBEDTLS_X509_KU_DECIPHER_ONLY              (0x8000)  /* bit 8 */
+
+/*
+ * Netscape certificate types
+ * (http://www.mozilla.org/projects/security/pki/nss/tech-notes/tn3.html)
+ */
+
+#define MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT         (0x80)  /* bit 0 */
+#define MBEDTLS_X509_NS_CERT_TYPE_SSL_SERVER         (0x40)  /* bit 1 */
+#define MBEDTLS_X509_NS_CERT_TYPE_EMAIL              (0x20)  /* bit 2 */
+#define MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING     (0x10)  /* bit 3 */
+#define MBEDTLS_X509_NS_CERT_TYPE_RESERVED           (0x08)  /* bit 4 */
+#define MBEDTLS_X509_NS_CERT_TYPE_SSL_CA             (0x04)  /* bit 5 */
+#define MBEDTLS_X509_NS_CERT_TYPE_EMAIL_CA           (0x02)  /* bit 6 */
+#define MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING_CA  (0x01)  /* bit 7 */
+
+/*
+ * X.509 extension types
+ *
+ * Comments refer to the status for using certificates. Status can be
+ * different for writing certificates or reading CRLs or CSRs.
+ *
+ * Those are defined in oid.h as oid.c needs them in a data structure. Since
+ * these were previously defined here, let's have aliases for compatibility.
+ */
+#define MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER MBEDTLS_OID_X509_EXT_AUTHORITY_KEY_IDENTIFIER
+#define MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER   MBEDTLS_OID_X509_EXT_SUBJECT_KEY_IDENTIFIER
+#define MBEDTLS_X509_EXT_KEY_USAGE                MBEDTLS_OID_X509_EXT_KEY_USAGE
+#define MBEDTLS_X509_EXT_CERTIFICATE_POLICIES     MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES
+#define MBEDTLS_X509_EXT_POLICY_MAPPINGS          MBEDTLS_OID_X509_EXT_POLICY_MAPPINGS
+#define MBEDTLS_X509_EXT_SUBJECT_ALT_NAME         MBEDTLS_OID_X509_EXT_SUBJECT_ALT_NAME         /* Supported (DNS) */
+#define MBEDTLS_X509_EXT_ISSUER_ALT_NAME          MBEDTLS_OID_X509_EXT_ISSUER_ALT_NAME
+#define MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS  MBEDTLS_OID_X509_EXT_SUBJECT_DIRECTORY_ATTRS
+#define MBEDTLS_X509_EXT_BASIC_CONSTRAINTS        MBEDTLS_OID_X509_EXT_BASIC_CONSTRAINTS        /* Supported */
+#define MBEDTLS_X509_EXT_NAME_CONSTRAINTS         MBEDTLS_OID_X509_EXT_NAME_CONSTRAINTS
+#define MBEDTLS_X509_EXT_POLICY_CONSTRAINTS       MBEDTLS_OID_X509_EXT_POLICY_CONSTRAINTS
+#define MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE       MBEDTLS_OID_X509_EXT_EXTENDED_KEY_USAGE
+#define MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS  MBEDTLS_OID_X509_EXT_CRL_DISTRIBUTION_POINTS
+#define MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY       MBEDTLS_OID_X509_EXT_INIHIBIT_ANYPOLICY
+#define MBEDTLS_X509_EXT_FRESHEST_CRL             MBEDTLS_OID_X509_EXT_FRESHEST_CRL
+#define MBEDTLS_X509_EXT_NS_CERT_TYPE             MBEDTLS_OID_X509_EXT_NS_CERT_TYPE
+
+/*
+ * Storage format identifiers
+ * Recognized formats: PEM and DER
+ */
+#define MBEDTLS_X509_FORMAT_DER                 1
+#define MBEDTLS_X509_FORMAT_PEM                 2
+
+#define MBEDTLS_X509_MAX_DN_NAME_SIZE         256 /**< Maximum value size of a DN entry */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup x509_module
+ * \{ */
+
+/**
+ * \name Structures for parsing X.509 certificates, CRLs and CSRs
+ * \{
+ */
+
+/**
+ * Type-length-value structure that allows for ASN1 using DER.
+ */
+typedef mbedtls_asn1_buf mbedtls_x509_buf;
+
+/**
+ * Container for ASN1 bit strings.
+ */
+typedef mbedtls_asn1_bitstring mbedtls_x509_bitstring;
+
+/**
+ * Container for ASN1 named information objects.
+ * It allows for Relative Distinguished Names (e.g. cn=localhost,ou=code,etc.).
+ */
+typedef mbedtls_asn1_named_data mbedtls_x509_name;
+
+/**
+ * Container for a sequence of ASN.1 items
+ */
+typedef mbedtls_asn1_sequence mbedtls_x509_sequence;
+
+/** Container for date and time (precision in seconds). */
+typedef struct mbedtls_x509_time
+{
+    int year, mon, day;         /**< Date. */
+    int hour, min, sec;         /**< Time. */
+}
+mbedtls_x509_time;
+
+/** \} name Structures for parsing X.509 certificates, CRLs and CSRs */
+/** \} addtogroup x509_module */
+
+/**
+ * \brief          Store the certificate DN in printable form into buf;
+ *                 no more than size characters will be written.
+ *
+ * \param buf      Buffer to write to
+ * \param size     Maximum size of buffer
+ * \param dn       The X509 name to represent
+ *
+ * \return         The length of the string written (not including the
+ *                 terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_dn_gets( char *buf, size_t size, const mbedtls_x509_name *dn );
+
+/**
+ * \brief          Store the certificate serial in printable form into buf;
+ *                 no more than size characters will be written.
+ *
+ * \param buf      Buffer to write to
+ * \param size     Maximum size of buffer
+ * \param serial   The X509 serial to represent
+ *
+ * \return         The length of the string written (not including the
+ *                 terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_serial_gets( char *buf, size_t size, const mbedtls_x509_buf *serial );
+
+/**
+ * \brief          Check a given mbedtls_x509_time against the system time
+ *                 and tell if it's in the past.
+ *
+ * \note           Intended usage is "if( is_past( valid_to ) ) ERROR".
+ *                 Hence the return value of 1 if on internal errors.
+ *
+ * \param to       mbedtls_x509_time to check
+ *
+ * \return         1 if the given time is in the past or an error occurred,
+ *                 0 otherwise.
+ */
+int mbedtls_x509_time_is_past( const mbedtls_x509_time *to );
+
+/**
+ * \brief          Check a given mbedtls_x509_time against the system time
+ *                 and tell if it's in the future.
+ *
+ * \note           Intended usage is "if( is_future( valid_from ) ) ERROR".
+ *                 Hence the return value of 1 if on internal errors.
+ *
+ * \param from     mbedtls_x509_time to check
+ *
+ * \return         1 if the given time is in the future or an error occurred,
+ *                 0 otherwise.
+ */
+int mbedtls_x509_time_is_future( const mbedtls_x509_time *from );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ */
+int mbedtls_x509_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+/*
+ * Internal module functions. You probably do not want to use these unless you
+ * know you do.
+ */
+int mbedtls_x509_get_name( unsigned char **p, const unsigned char *end,
+                   mbedtls_x509_name *cur );
+int mbedtls_x509_get_alg_null( unsigned char **p, const unsigned char *end,
+                       mbedtls_x509_buf *alg );
+int mbedtls_x509_get_alg( unsigned char **p, const unsigned char *end,
+                  mbedtls_x509_buf *alg, mbedtls_x509_buf *params );
+#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT)
+int mbedtls_x509_get_rsassa_pss_params( const mbedtls_x509_buf *params,
+                                mbedtls_md_type_t *md_alg, mbedtls_md_type_t *mgf_md,
+                                int *salt_len );
+#endif
+int mbedtls_x509_get_sig( unsigned char **p, const unsigned char *end, mbedtls_x509_buf *sig );
+int mbedtls_x509_get_sig_alg( const mbedtls_x509_buf *sig_oid, const mbedtls_x509_buf *sig_params,
+                      mbedtls_md_type_t *md_alg, mbedtls_pk_type_t *pk_alg,
+                      void **sig_opts );
+int mbedtls_x509_get_time( unsigned char **p, const unsigned char *end,
+                   mbedtls_x509_time *t );
+int mbedtls_x509_get_serial( unsigned char **p, const unsigned char *end,
+                     mbedtls_x509_buf *serial );
+int mbedtls_x509_get_ext( unsigned char **p, const unsigned char *end,
+                  mbedtls_x509_buf *ext, int tag );
+int mbedtls_x509_sig_alg_gets( char *buf, size_t size, const mbedtls_x509_buf *sig_oid,
+                       mbedtls_pk_type_t pk_alg, mbedtls_md_type_t md_alg,
+                       const void *sig_opts );
+int mbedtls_x509_key_size_helper( char *buf, size_t buf_size, const char *name );
+int mbedtls_x509_string_to_names( mbedtls_asn1_named_data **head, const char *name );
+int mbedtls_x509_set_extension( mbedtls_asn1_named_data **head, const char *oid, size_t oid_len,
+                        int critical, const unsigned char *val,
+                        size_t val_len );
+int mbedtls_x509_write_extensions( unsigned char **p, unsigned char *start,
+                           mbedtls_asn1_named_data *first );
+int mbedtls_x509_write_names( unsigned char **p, unsigned char *start,
+                      mbedtls_asn1_named_data *first );
+int mbedtls_x509_write_sig( unsigned char **p, unsigned char *start,
+                    const char *oid, size_t oid_len,
+                    unsigned char *sig, size_t size );
+
+#define MBEDTLS_X509_SAFE_SNPRINTF                          \
+    do {                                                    \
+        if( ret < 0 || (size_t) ret >= n )                  \
+            return( MBEDTLS_ERR_X509_BUFFER_TOO_SMALL );    \
+                                                            \
+        n -= (size_t) ret;                                  \
+        p += (size_t) ret;                                  \
+    } while( 0 )
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* x509.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h
new file mode 100644
index 00000000000..7e9e8885f41
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509_crl.h
@@ -0,0 +1,172 @@
+/**
+ * \file x509_crl.h
+ *
+ * \brief X.509 certificate revocation list parsing
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_X509_CRL_H
+#define MBEDTLS_X509_CRL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/x509.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup x509_module
+ * \{ */
+
+/**
+ * \name Structures and functions for parsing CRLs
+ * \{
+ */
+
+/**
+ * Certificate revocation list entry.
+ * Contains the CA-specific serial numbers and revocation dates.
+ */
+typedef struct mbedtls_x509_crl_entry
+{
+    mbedtls_x509_buf raw;
+
+    mbedtls_x509_buf serial;
+
+    mbedtls_x509_time revocation_date;
+
+    mbedtls_x509_buf entry_ext;
+
+    struct mbedtls_x509_crl_entry *next;
+}
+mbedtls_x509_crl_entry;
+
+/**
+ * Certificate revocation list structure.
+ * Every CRL may have multiple entries.
+ */
+typedef struct mbedtls_x509_crl
+{
+    mbedtls_x509_buf raw;           /**< The raw certificate data (DER). */
+    mbedtls_x509_buf tbs;           /**< The raw certificate body (DER). The part that is To Be Signed. */
+
+    int version;            /**< CRL version (1=v1, 2=v2) */
+    mbedtls_x509_buf sig_oid;       /**< CRL signature type identifier */
+
+    mbedtls_x509_buf issuer_raw;    /**< The raw issuer data (DER). */
+
+    mbedtls_x509_name issuer;       /**< The parsed issuer data (named information object). */
+
+    mbedtls_x509_time this_update;
+    mbedtls_x509_time next_update;
+
+    mbedtls_x509_crl_entry entry;   /**< The CRL entries containing the certificate revocation times for this CA. */
+
+    mbedtls_x509_buf crl_ext;
+
+    mbedtls_x509_buf sig_oid2;
+    mbedtls_x509_buf sig;
+    mbedtls_md_type_t sig_md;           /**< Internal representation of the MD algorithm of the signature algorithm, e.g. MBEDTLS_MD_SHA256 */
+    mbedtls_pk_type_t sig_pk;           /**< Internal representation of the Public Key algorithm of the signature algorithm, e.g. MBEDTLS_PK_RSA */
+    void *sig_opts;             /**< Signature options to be passed to mbedtls_pk_verify_ext(), e.g. for RSASSA-PSS */
+
+    struct mbedtls_x509_crl *next;
+}
+mbedtls_x509_crl;
+
+/**
+ * \brief          Parse a DER-encoded CRL and append it to the chained list
+ *
+ * \param chain    points to the start of the chain
+ * \param buf      buffer holding the CRL data in DER format
+ * \param buflen   size of the buffer
+ *                 (including the terminating null byte for PEM data)
+ *
+ * \return         0 if successful, or a specific X509 or PEM error code
+ */
+int mbedtls_x509_crl_parse_der( mbedtls_x509_crl *chain,
+                        const unsigned char *buf, size_t buflen );
+/**
+ * \brief          Parse one or more CRLs and append them to the chained list
+ *
+ * \note           Multiple CRLs are accepted only if using PEM format
+ *
+ * \param chain    points to the start of the chain
+ * \param buf      buffer holding the CRL data in PEM or DER format
+ * \param buflen   size of the buffer
+ *                 (including the terminating null byte for PEM data)
+ *
+ * \return         0 if successful, or a specific X509 or PEM error code
+ */
+int mbedtls_x509_crl_parse( mbedtls_x509_crl *chain, const unsigned char *buf, size_t buflen );
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief          Load one or more CRLs and append them to the chained list
+ *
+ * \note           Multiple CRLs are accepted only if using PEM format
+ *
+ * \param chain    points to the start of the chain
+ * \param path     filename to read the CRLs from (in PEM or DER encoding)
+ *
+ * \return         0 if successful, or a specific X509 or PEM error code
+ */
+int mbedtls_x509_crl_parse_file( mbedtls_x509_crl *chain, const char *path );
+#endif /* MBEDTLS_FS_IO */
+
+/**
+ * \brief          Returns an informational string about the CRL.
+ *
+ * \param buf      Buffer to write to
+ * \param size     Maximum size of buffer
+ * \param prefix   A line prefix
+ * \param crl      The X509 CRL to represent
+ *
+ * \return         The length of the string written (not including the
+ *                 terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_crl_info( char *buf, size_t size, const char *prefix,
+                   const mbedtls_x509_crl *crl );
+
+/**
+ * \brief          Initialize a CRL (chain)
+ *
+ * \param crl      CRL chain to initialize
+ */
+void mbedtls_x509_crl_init( mbedtls_x509_crl *crl );
+
+/**
+ * \brief          Unallocate all CRL data
+ *
+ * \param crl      CRL chain to free
+ */
+void mbedtls_x509_crl_free( mbedtls_x509_crl *crl );
+
+/* \} name */
+/* \} addtogroup x509_module */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_x509_crl.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
new file mode 100644
index 00000000000..64ccb433ba8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
@@ -0,0 +1,1094 @@
+/**
+ * \file x509_crt.h
+ *
+ * \brief X.509 certificate parsing and writing
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_X509_CRT_H
+#define MBEDTLS_X509_CRT_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/x509.h"
+#include "mbedtls/x509_crl.h"
+#include "mbedtls/bignum.h"
+
+/**
+ * \addtogroup x509_module
+ * \{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name Structures and functions for parsing and writing X.509 certificates
+ * \{
+ */
+
+/**
+ * Container for an X.509 certificate. The certificate may be chained.
+ */
+typedef struct mbedtls_x509_crt
+{
+    int own_buffer;                     /**< Indicates if \c raw is owned
+                                         *   by the structure or not.        */
+    mbedtls_x509_buf raw;               /**< The raw certificate data (DER). */
+    mbedtls_x509_buf tbs;               /**< The raw certificate body (DER). The part that is To Be Signed. */
+
+    int version;                /**< The X.509 version. (1=v1, 2=v2, 3=v3) */
+    mbedtls_x509_buf serial;            /**< Unique id for certificate issued by a specific CA. */
+    mbedtls_x509_buf sig_oid;           /**< Signature algorithm, e.g. sha1RSA */
+
+    mbedtls_x509_buf issuer_raw;        /**< The raw issuer data (DER). Used for quick comparison. */
+    mbedtls_x509_buf subject_raw;       /**< The raw subject data (DER). Used for quick comparison. */
+
+    mbedtls_x509_name issuer;           /**< The parsed issuer data (named information object). */
+    mbedtls_x509_name subject;          /**< The parsed subject data (named information object). */
+
+    mbedtls_x509_time valid_from;       /**< Start time of certificate validity. */
+    mbedtls_x509_time valid_to;         /**< End time of certificate validity. */
+
+    mbedtls_x509_buf pk_raw;
+    mbedtls_pk_context pk;              /**< Container for the public key context. */
+
+    mbedtls_x509_buf issuer_id;         /**< Optional X.509 v2/v3 issuer unique identifier. */
+    mbedtls_x509_buf subject_id;        /**< Optional X.509 v2/v3 subject unique identifier. */
+    mbedtls_x509_buf v3_ext;            /**< Optional X.509 v3 extensions.  */
+    mbedtls_x509_sequence subject_alt_names;    /**< Optional list of raw entries of Subject Alternative Names extension (currently only dNSName and OtherName are listed). */
+
+    mbedtls_x509_sequence certificate_policies; /**< Optional list of certificate policies (Only anyPolicy is printed and enforced, however the rest of the policies are still listed). */
+
+    int ext_types;              /**< Bit string containing detected and parsed extensions */
+    int ca_istrue;              /**< Optional Basic Constraint extension value: 1 if this certificate belongs to a CA, 0 otherwise. */
+    int max_pathlen;            /**< Optional Basic Constraint extension value: The maximum path length to the root certificate. Path length is 1 higher than RFC 5280 'meaning', so 1+ */
+
+    unsigned int key_usage;     /**< Optional key usage extension value: See the values in x509.h */
+
+    mbedtls_x509_sequence ext_key_usage; /**< Optional list of extended key usage OIDs. */
+
+    unsigned char ns_cert_type; /**< Optional Netscape certificate type extension value: See the values in x509.h */
+
+    mbedtls_x509_buf sig;               /**< Signature: hash of the tbs part signed with the private key. */
+    mbedtls_md_type_t sig_md;           /**< Internal representation of the MD algorithm of the signature algorithm, e.g. MBEDTLS_MD_SHA256 */
+    mbedtls_pk_type_t sig_pk;           /**< Internal representation of the Public Key algorithm of the signature algorithm, e.g. MBEDTLS_PK_RSA */
+    void *sig_opts;             /**< Signature options to be passed to mbedtls_pk_verify_ext(), e.g. for RSASSA-PSS */
+
+    struct mbedtls_x509_crt *next;     /**< Next certificate in the CA-chain. */
+}
+mbedtls_x509_crt;
+
+/**
+ * From RFC 5280 section 4.2.1.6:
+ * OtherName ::= SEQUENCE {
+ *      type-id    OBJECT IDENTIFIER,
+ *      value      [0] EXPLICIT ANY DEFINED BY type-id }
+ */
+typedef struct mbedtls_x509_san_other_name
+{
+    /**
+     * The type_id is an OID as deifned in RFC 5280.
+     * To check the value of the type id, you should use
+     * \p MBEDTLS_OID_CMP with a known OID mbedtls_x509_buf.
+     */
+    mbedtls_x509_buf type_id;                   /**< The type id. */
+    union
+    {
+        /**
+         * From RFC 4108 section 5:
+         * HardwareModuleName ::= SEQUENCE {
+         *                         hwType OBJECT IDENTIFIER,
+         *                         hwSerialNum OCTET STRING }
+         */
+        struct
+        {
+            mbedtls_x509_buf oid;               /**< The object identifier. */
+            mbedtls_x509_buf val;               /**< The named value. */
+        }
+        hardware_module_name;
+    }
+    value;
+}
+mbedtls_x509_san_other_name;
+
+/**
+ * A structure for holding the parsed Subject Alternative Name, according to type
+ */
+typedef struct mbedtls_x509_subject_alternative_name
+{
+    int type;                              /**< The SAN type, value of MBEDTLS_X509_SAN_XXX. */
+    union {
+        mbedtls_x509_san_other_name other_name; /**< The otherName supported type. */
+        mbedtls_x509_buf   unstructured_name; /**< The buffer for the un constructed types. Only dnsName currently supported */
+    }
+    san; /**< A union of the supported SAN types */
+}
+mbedtls_x509_subject_alternative_name;
+
+/**
+ * Build flag from an algorithm/curve identifier (pk, md, ecp)
+ * Since 0 is always XXX_NONE, ignore it.
+ */
+#define MBEDTLS_X509_ID_FLAG( id )   ( 1 << ( (id) - 1 ) )
+
+/**
+ * Security profile for certificate verification.
+ *
+ * All lists are bitfields, built by ORing flags from MBEDTLS_X509_ID_FLAG().
+ */
+typedef struct mbedtls_x509_crt_profile
+{
+    uint32_t allowed_mds;       /**< MDs for signatures         */
+    uint32_t allowed_pks;       /**< PK algs for signatures     */
+    uint32_t allowed_curves;    /**< Elliptic curves for ECDSA  */
+    uint32_t rsa_min_bitlen;    /**< Minimum size for RSA keys  */
+}
+mbedtls_x509_crt_profile;
+
+#define MBEDTLS_X509_CRT_VERSION_1              0
+#define MBEDTLS_X509_CRT_VERSION_2              1
+#define MBEDTLS_X509_CRT_VERSION_3              2
+
+#define MBEDTLS_X509_RFC5280_MAX_SERIAL_LEN 32
+#define MBEDTLS_X509_RFC5280_UTC_TIME_LEN   15
+
+#if !defined( MBEDTLS_X509_MAX_FILE_PATH_LEN )
+#define MBEDTLS_X509_MAX_FILE_PATH_LEN 512
+#endif
+
+/**
+ * Container for writing a certificate (CRT)
+ */
+typedef struct mbedtls_x509write_cert
+{
+    int version;
+    mbedtls_mpi serial;
+    mbedtls_pk_context *subject_key;
+    mbedtls_pk_context *issuer_key;
+    mbedtls_asn1_named_data *subject;
+    mbedtls_asn1_named_data *issuer;
+    mbedtls_md_type_t md_alg;
+    char not_before[MBEDTLS_X509_RFC5280_UTC_TIME_LEN + 1];
+    char not_after[MBEDTLS_X509_RFC5280_UTC_TIME_LEN + 1];
+    mbedtls_asn1_named_data *extensions;
+}
+mbedtls_x509write_cert;
+
+/**
+ * Item in a verification chain: cert and flags for it
+ */
+typedef struct {
+    mbedtls_x509_crt *crt;
+    uint32_t flags;
+} mbedtls_x509_crt_verify_chain_item;
+
+/**
+ * Max size of verification chain: end-entity + intermediates + trusted root
+ */
+#define MBEDTLS_X509_MAX_VERIFY_CHAIN_SIZE  ( MBEDTLS_X509_MAX_INTERMEDIATE_CA + 2 )
+
+/**
+ * Verification chain as built by \c mbedtls_crt_verify_chain()
+ */
+typedef struct
+{
+    mbedtls_x509_crt_verify_chain_item items[MBEDTLS_X509_MAX_VERIFY_CHAIN_SIZE];
+    unsigned len;
+
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+    /* This stores the list of potential trusted signers obtained from
+     * the CA callback used for the CRT verification, if configured.
+     * We must track it somewhere because the callback passes its
+     * ownership to the caller. */
+    mbedtls_x509_crt *trust_ca_cb_result;
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
+} mbedtls_x509_crt_verify_chain;
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+
+/**
+ * \brief       Context for resuming X.509 verify operations
+ */
+typedef struct
+{
+    /* for check_signature() */
+    mbedtls_pk_restart_ctx pk;
+
+    /* for find_parent_in() */
+    mbedtls_x509_crt *parent; /* non-null iff parent_in in progress */
+    mbedtls_x509_crt *fallback_parent;
+    int fallback_signature_is_good;
+
+    /* for find_parent() */
+    int parent_is_trusted; /* -1 if find_parent is not in progress */
+
+    /* for verify_chain() */
+    enum {
+        x509_crt_rs_none,
+        x509_crt_rs_find_parent,
+    } in_progress;  /* none if no operation is in progress */
+    int self_cnt;
+    mbedtls_x509_crt_verify_chain ver_chain;
+
+} mbedtls_x509_crt_restart_ctx;
+
+#else /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+/* Now we can declare functions that take a pointer to that */
+typedef void mbedtls_x509_crt_restart_ctx;
+
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * Default security profile. Should provide a good balance between security
+ * and compatibility with current deployments.
+ *
+ * This profile permits:
+ * - SHA2 hashes.
+ * - All supported elliptic curves.
+ * - RSA with 2048 bits and above.
+ *
+ * New minor versions of Mbed TLS may extend this profile, for example if
+ * new curves are added to the library. New minor versions of Mbed TLS will
+ * not reduce this profile unless serious security concerns require it.
+ */
+extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_default;
+
+/**
+ * Expected next default profile. Recommended for new deployments.
+ * Currently targets a 128-bit security level, except for allowing RSA-2048.
+ */
+extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_next;
+
+/**
+ * NSA Suite B profile.
+ */
+extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_suiteb;
+
+/**
+ * \brief          Parse a single DER formatted certificate and add it
+ *                 to the end of the provided chained list.
+ *
+ * \param chain    The pointer to the start of the CRT chain to attach to.
+ *                 When parsing the first CRT in a chain, this should point
+ *                 to an instance of ::mbedtls_x509_crt initialized through
+ *                 mbedtls_x509_crt_init().
+ * \param buf      The buffer holding the DER encoded certificate.
+ * \param buflen   The size in Bytes of \p buf.
+ *
+ * \note           This function makes an internal copy of the CRT buffer
+ *                 \p buf. In particular, \p buf may be destroyed or reused
+ *                 after this call returns. To avoid duplicating the CRT
+ *                 buffer (at the cost of stricter lifetime constraints),
+ *                 use mbedtls_x509_crt_parse_der_nocopy() instead.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_x509_crt_parse_der( mbedtls_x509_crt *chain,
+                                const unsigned char *buf,
+                                size_t buflen );
+
+/**
+ * \brief          The type of certificate extension callbacks.
+ *
+ *                 Callbacks of this type are passed to and used by the
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() routine when
+ *                 it encounters either an unsupported extension or a
+ *                 "certificate policies" extension containing any
+ *                 unsupported certificate policies.
+ *                 Future versions of the library may invoke the callback
+ *                 in other cases, if and when the need arises.
+ *
+ * \param p_ctx    An opaque context passed to the callback.
+ * \param crt      The certificate being parsed.
+ * \param oid      The OID of the extension.
+ * \param critical Whether the extension is critical.
+ * \param p        Pointer to the start of the extension value
+ *                 (the content of the OCTET STRING).
+ * \param end      End of extension value.
+ *
+ * \note           The callback must fail and return a negative error code
+ *                 if it can not parse or does not support the extension.
+ *                 When the callback fails to parse a critical extension
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() also fails.
+ *                 When the callback fails to parse a non critical extension
+ *                 mbedtls_x509_crt_parse_der_with_ext_cb() simply skips
+ *                 the extension and continues parsing.
+ *
+ * \return         \c 0 on success.
+ * \return         A negative error code on failure.
+ */
+typedef int (*mbedtls_x509_crt_ext_cb_t)( void *p_ctx,
+                                          mbedtls_x509_crt const *crt,
+                                          mbedtls_x509_buf const *oid,
+                                          int critical,
+                                          const unsigned char *p,
+                                          const unsigned char *end );
+
+/**
+ * \brief            Parse a single DER formatted certificate and add it
+ *                   to the end of the provided chained list.
+ *
+ * \param chain      The pointer to the start of the CRT chain to attach to.
+ *                   When parsing the first CRT in a chain, this should point
+ *                   to an instance of ::mbedtls_x509_crt initialized through
+ *                   mbedtls_x509_crt_init().
+ * \param buf        The buffer holding the DER encoded certificate.
+ * \param buflen     The size in Bytes of \p buf.
+ * \param make_copy  When not zero this function makes an internal copy of the
+ *                   CRT buffer \p buf. In particular, \p buf may be destroyed
+ *                   or reused after this call returns.
+ *                   When zero this function avoids duplicating the CRT buffer
+ *                   by taking temporary ownership thereof until the CRT
+ *                   is destroyed (like mbedtls_x509_crt_parse_der_nocopy())
+ * \param cb         A callback invoked for every unsupported certificate
+ *                   extension.
+ * \param p_ctx      An opaque context passed to the callback.
+ *
+ * \note             This call is functionally equivalent to
+ *                   mbedtls_x509_crt_parse_der(), and/or
+ *                   mbedtls_x509_crt_parse_der_nocopy()
+ *                   but it calls the callback with every unsupported
+ *                   certificate extension and additionally the
+ *                   "certificate policies" extension if it contains any
+ *                   unsupported certificate policies.
+ *                   The callback must return a negative error code if it
+ *                   does not know how to handle such an extension.
+ *                   When the callback fails to parse a critical extension
+ *                   mbedtls_x509_crt_parse_der_with_ext_cb() also fails.
+ *                   When the callback fails to parse a non critical extension
+ *                   mbedtls_x509_crt_parse_der_with_ext_cb() simply skips
+ *                   the extension and continues parsing.
+ *                   Future versions of the library may invoke the callback
+ *                   in other cases, if and when the need arises.
+ *
+ * \return           \c 0 if successful.
+ * \return           A negative error code on failure.
+ */
+int mbedtls_x509_crt_parse_der_with_ext_cb( mbedtls_x509_crt *chain,
+                                            const unsigned char *buf,
+                                            size_t buflen,
+                                            int make_copy,
+                                            mbedtls_x509_crt_ext_cb_t cb,
+                                            void *p_ctx );
+
+/**
+ * \brief          Parse a single DER formatted certificate and add it
+ *                 to the end of the provided chained list. This is a
+ *                 variant of mbedtls_x509_crt_parse_der() which takes
+ *                 temporary ownership of the CRT buffer until the CRT
+ *                 is destroyed.
+ *
+ * \param chain    The pointer to the start of the CRT chain to attach to.
+ *                 When parsing the first CRT in a chain, this should point
+ *                 to an instance of ::mbedtls_x509_crt initialized through
+ *                 mbedtls_x509_crt_init().
+ * \param buf      The address of the readable buffer holding the DER encoded
+ *                 certificate to use. On success, this buffer must be
+ *                 retained and not be changed for the liftetime of the
+ *                 CRT chain \p chain, that is, until \p chain is destroyed
+ *                 through a call to mbedtls_x509_crt_free().
+ * \param buflen   The size in Bytes of \p buf.
+ *
+ * \note           This call is functionally equivalent to
+ *                 mbedtls_x509_crt_parse_der(), but it avoids creating a
+ *                 copy of the input buffer at the cost of stronger lifetime
+ *                 constraints. This is useful in constrained environments
+ *                 where duplication of the CRT cannot be tolerated.
+ *
+ * \return         \c 0 if successful.
+ * \return         A negative error code on failure.
+ */
+int mbedtls_x509_crt_parse_der_nocopy( mbedtls_x509_crt *chain,
+                                       const unsigned char *buf,
+                                       size_t buflen );
+
+/**
+ * \brief          Parse one DER-encoded or one or more concatenated PEM-encoded
+ *                 certificates and add them to the chained list.
+ *
+ *                 For CRTs in PEM encoding, the function parses permissively:
+ *                 if at least one certificate can be parsed, the function
+ *                 returns the number of certificates for which parsing failed
+ *                 (hence \c 0 if all certificates were parsed successfully).
+ *                 If no certificate could be parsed, the function returns
+ *                 the first (negative) error encountered during parsing.
+ *
+ *                 PEM encoded certificates may be interleaved by other data
+ *                 such as human readable descriptions of their content, as
+ *                 long as the certificates are enclosed in the PEM specific
+ *                 '-----{BEGIN/END} CERTIFICATE-----' delimiters.
+ *
+ * \param chain    The chain to which to add the parsed certificates.
+ * \param buf      The buffer holding the certificate data in PEM or DER format.
+ *                 For certificates in PEM encoding, this may be a concatenation
+ *                 of multiple certificates; for DER encoding, the buffer must
+ *                 comprise exactly one certificate.
+ * \param buflen   The size of \p buf, including the terminating \c NULL byte
+ *                 in case of PEM encoded data.
+ *
+ * \return         \c 0 if all certificates were parsed successfully.
+ * \return         The (positive) number of certificates that couldn't
+ *                 be parsed if parsing was partly successful (see above).
+ * \return         A negative X509 or PEM error code otherwise.
+ *
+ */
+int mbedtls_x509_crt_parse( mbedtls_x509_crt *chain, const unsigned char *buf, size_t buflen );
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief          Load one or more certificates and add them
+ *                 to the chained list. Parses permissively. If some
+ *                 certificates can be parsed, the result is the number
+ *                 of failed certificates it encountered. If none complete
+ *                 correctly, the first error is returned.
+ *
+ * \param chain    points to the start of the chain
+ * \param path     filename to read the certificates from
+ *
+ * \return         0 if all certificates parsed successfully, a positive number
+ *                 if partly successful or a specific X509 or PEM error code
+ */
+int mbedtls_x509_crt_parse_file( mbedtls_x509_crt *chain, const char *path );
+
+/**
+ * \brief          Load one or more certificate files from a path and add them
+ *                 to the chained list. Parses permissively. If some
+ *                 certificates can be parsed, the result is the number
+ *                 of failed certificates it encountered. If none complete
+ *                 correctly, the first error is returned.
+ *
+ * \param chain    points to the start of the chain
+ * \param path     directory / folder to read the certificate files from
+ *
+ * \return         0 if all certificates parsed successfully, a positive number
+ *                 if partly successful or a specific X509 or PEM error code
+ */
+int mbedtls_x509_crt_parse_path( mbedtls_x509_crt *chain, const char *path );
+
+#endif /* MBEDTLS_FS_IO */
+/**
+ * \brief          This function parses an item in the SubjectAlternativeNames
+ *                 extension.
+ *
+ * \param san_buf  The buffer holding the raw data item of the subject
+ *                 alternative name.
+ * \param san      The target structure to populate with the parsed presentation
+ *                 of the subject alternative name encoded in \p san_raw.
+ *
+ * \note           Only "dnsName" and "otherName" of type hardware_module_name
+ *                 as defined in RFC 4180 is supported.
+ *
+ * \note           This function should be called on a single raw data of
+ *                 subject alternative name. For example, after successful
+ *                 certificate parsing, one must iterate on every item in the
+ *                 \p crt->subject_alt_names sequence, and pass it to
+ *                 this function.
+ *
+ * \warning        The target structure contains pointers to the raw data of the
+ *                 parsed certificate, and its lifetime is restricted by the
+ *                 lifetime of the certificate.
+ *
+ * \return         \c 0 on success
+ * \return         #MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE for an unsupported
+ *                 SAN type.
+ * \return         Another negative value for any other failure.
+ */
+int mbedtls_x509_parse_subject_alt_name( const mbedtls_x509_buf *san_buf,
+                                         mbedtls_x509_subject_alternative_name *san );
+/**
+ * \brief          Returns an informational string about the
+ *                 certificate.
+ *
+ * \param buf      Buffer to write to
+ * \param size     Maximum size of buffer
+ * \param prefix   A line prefix
+ * \param crt      The X509 certificate to represent
+ *
+ * \return         The length of the string written (not including the
+ *                 terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_crt_info( char *buf, size_t size, const char *prefix,
+                   const mbedtls_x509_crt *crt );
+
+/**
+ * \brief          Returns an informational string about the
+ *                 verification status of a certificate.
+ *
+ * \param buf      Buffer to write to
+ * \param size     Maximum size of buffer
+ * \param prefix   A line prefix
+ * \param flags    Verification flags created by mbedtls_x509_crt_verify()
+ *
+ * \return         The length of the string written (not including the
+ *                 terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_crt_verify_info( char *buf, size_t size, const char *prefix,
+                          uint32_t flags );
+
+/**
+ * \brief          Verify a chain of certificates.
+ *
+ *                 The verify callback is a user-supplied callback that
+ *                 can clear / modify / add flags for a certificate. If set,
+ *                 the verification callback is called for each
+ *                 certificate in the chain (from the trust-ca down to the
+ *                 presented crt). The parameters for the callback are:
+ *                 (void *parameter, mbedtls_x509_crt *crt, int certificate_depth,
+ *                 int *flags). With the flags representing current flags for
+ *                 that specific certificate and the certificate depth from
+ *                 the bottom (Peer cert depth = 0).
+ *
+ *                 All flags left after returning from the callback
+ *                 are also returned to the application. The function should
+ *                 return 0 for anything (including invalid certificates)
+ *                 other than fatal error, as a non-zero return code
+ *                 immediately aborts the verification process. For fatal
+ *                 errors, a specific error code should be used (different
+ *                 from MBEDTLS_ERR_X509_CERT_VERIFY_FAILED which should not
+ *                 be returned at this point), or MBEDTLS_ERR_X509_FATAL_ERROR
+ *                 can be used if no better code is available.
+ *
+ * \note           In case verification failed, the results can be displayed
+ *                 using \c mbedtls_x509_crt_verify_info()
+ *
+ * \note           Same as \c mbedtls_x509_crt_verify_with_profile() with the
+ *                 default security profile.
+ *
+ * \note           It is your responsibility to provide up-to-date CRLs for
+ *                 all trusted CAs. If no CRL is provided for the CA that was
+ *                 used to sign the certificate, CRL verification is skipped
+ *                 silently, that is *without* setting any flag.
+ *
+ * \note           The \c trust_ca list can contain two types of certificates:
+ *                 (1) those of trusted root CAs, so that certificates
+ *                 chaining up to those CAs will be trusted, and (2)
+ *                 self-signed end-entity certificates to be trusted (for
+ *                 specific peers you know) - in that case, the self-signed
+ *                 certificate doesn't need to have the CA bit set.
+ *
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param cn       The expected Common Name. This will be checked to be
+ *                 present in the certificate's subjectAltNames extension or,
+ *                 if this extension is absent, as a CN component in its
+ *                 Subject name. Currently only DNS names are supported. This
+ *                 may be \c NULL if the CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         \c 0 if the chain is valid with respect to the
+ *                 passed CN, CAs, CRLs and security profile.
+ * \return         #MBEDTLS_ERR_X509_CERT_VERIFY_FAILED in case the
+ *                 certificate chain verification failed. In this case,
+ *                 \c *flags will have one or more
+ *                 \c MBEDTLS_X509_BADCERT_XXX or \c MBEDTLS_X509_BADCRL_XXX
+ *                 flags set.
+ * \return         Another negative error code in case of a fatal error
+ *                 encountered during the verification process.
+ */
+int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt,
+                     mbedtls_x509_crt *trust_ca,
+                     mbedtls_x509_crl *ca_crl,
+                     const char *cn, uint32_t *flags,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy );
+
+/**
+ * \brief          Verify a chain of certificates with respect to
+ *                 a configurable security profile.
+ *
+ * \note           Same as \c mbedtls_x509_crt_verify(), but with explicit
+ *                 security profile.
+ *
+ * \note           The restrictions on keys (RSA minimum size, allowed curves
+ *                 for ECDSA) apply to all certificates: trusted root,
+ *                 intermediate CAs if any, and end entity certificate.
+ *
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param profile  The security profile to use for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         \c 0 if the chain is valid with respect to the
+ *                 passed CN, CAs, CRLs and security profile.
+ * \return         #MBEDTLS_ERR_X509_CERT_VERIFY_FAILED in case the
+ *                 certificate chain verification failed. In this case,
+ *                 \c *flags will have one or more
+ *                 \c MBEDTLS_X509_BADCERT_XXX or \c MBEDTLS_X509_BADCRL_XXX
+ *                 flags set.
+ * \return         Another negative error code in case of a fatal error
+ *                 encountered during the verification process.
+ */
+int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt,
+                     mbedtls_x509_crt *trust_ca,
+                     mbedtls_x509_crl *ca_crl,
+                     const mbedtls_x509_crt_profile *profile,
+                     const char *cn, uint32_t *flags,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy );
+
+/**
+ * \brief          Restartable version of \c mbedtls_crt_verify_with_profile()
+ *
+ * \note           Performs the same job as \c mbedtls_crt_verify_with_profile()
+ *                 but can return early and restart according to the limit
+ *                 set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
+ *
+ * \param crt      The certificate chain to be verified.
+ * \param trust_ca The list of trusted CAs.
+ * \param ca_crl   The list of CRLs for trusted CAs.
+ * \param profile  The security profile to use for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ * \param rs_ctx   The restart context to use. This may be set to \c NULL
+ *                 to disable restartable ECC.
+ *
+ * \return         See \c mbedtls_crt_verify_with_profile(), or
+ * \return         #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ *                 operations was reached: see \c mbedtls_ecp_set_max_ops().
+ */
+int mbedtls_x509_crt_verify_restartable( mbedtls_x509_crt *crt,
+                     mbedtls_x509_crt *trust_ca,
+                     mbedtls_x509_crl *ca_crl,
+                     const mbedtls_x509_crt_profile *profile,
+                     const char *cn, uint32_t *flags,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy,
+                     mbedtls_x509_crt_restart_ctx *rs_ctx );
+
+/**
+ * \brief               The type of trusted certificate callbacks.
+ *
+ *                      Callbacks of this type are passed to and used by the CRT
+ *                      verification routine mbedtls_x509_crt_verify_with_ca_cb()
+ *                      when looking for trusted signers of a given certificate.
+ *
+ *                      On success, the callback returns a list of trusted
+ *                      certificates to be considered as potential signers
+ *                      for the input certificate.
+ *
+ * \param p_ctx         An opaque context passed to the callback.
+ * \param child         The certificate for which to search a potential signer.
+ *                      This will point to a readable certificate.
+ * \param candidate_cas The address at which to store the address of the first
+ *                      entry in the generated linked list of candidate signers.
+ *                      This will not be \c NULL.
+ *
+ * \note                The callback must only return a non-zero value on a
+ *                      fatal error. If, in contrast, the search for a potential
+ *                      signer completes without a single candidate, the
+ *                      callback must return \c 0 and set \c *candidate_cas
+ *                      to \c NULL.
+ *
+ * \return              \c 0 on success. In this case, \c *candidate_cas points
+ *                      to a heap-allocated linked list of instances of
+ *                      ::mbedtls_x509_crt, and ownership of this list is passed
+ *                      to the caller.
+ * \return              A negative error code on failure.
+ */
+typedef int (*mbedtls_x509_crt_ca_cb_t)( void *p_ctx,
+                                         mbedtls_x509_crt const *child,
+                                         mbedtls_x509_crt **candidate_cas );
+
+#if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK)
+/**
+ * \brief          Version of \c mbedtls_x509_crt_verify_with_profile() which
+ *                 uses a callback to acquire the list of trusted CA
+ *                 certificates.
+ *
+ * \param crt      The certificate chain to be verified.
+ * \param f_ca_cb  The callback to be used to query for potential signers
+ *                 of a given child certificate. See the documentation of
+ *                 ::mbedtls_x509_crt_ca_cb_t for more information.
+ * \param p_ca_cb  The opaque context to be passed to \p f_ca_cb.
+ * \param profile  The security profile for the verification.
+ * \param cn       The expected Common Name. This may be \c NULL if the
+ *                 CN need not be verified.
+ * \param flags    The address at which to store the result of the verification.
+ *                 If the verification couldn't be completed, the flag value is
+ *                 set to (uint32_t) -1.
+ * \param f_vrfy   The verification callback to use. See the documentation
+ *                 of mbedtls_x509_crt_verify() for more information.
+ * \param p_vrfy   The context to be passed to \p f_vrfy.
+ *
+ * \return         See \c mbedtls_crt_verify_with_profile().
+ */
+int mbedtls_x509_crt_verify_with_ca_cb( mbedtls_x509_crt *crt,
+                     mbedtls_x509_crt_ca_cb_t f_ca_cb,
+                     void *p_ca_cb,
+                     const mbedtls_x509_crt_profile *profile,
+                     const char *cn, uint32_t *flags,
+                     int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+                     void *p_vrfy );
+
+#endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */
+
+#if defined(MBEDTLS_X509_CHECK_KEY_USAGE)
+/**
+ * \brief          Check usage of certificate against keyUsage extension.
+ *
+ * \param crt      Leaf certificate used.
+ * \param usage    Intended usage(s) (eg MBEDTLS_X509_KU_KEY_ENCIPHERMENT
+ *                 before using the certificate to perform an RSA key
+ *                 exchange).
+ *
+ * \note           Except for decipherOnly and encipherOnly, a bit set in the
+ *                 usage argument means this bit MUST be set in the
+ *                 certificate. For decipherOnly and encipherOnly, it means
+ *                 that bit MAY be set.
+ *
+ * \return         0 is these uses of the certificate are allowed,
+ *                 MBEDTLS_ERR_X509_BAD_INPUT_DATA if the keyUsage extension
+ *                 is present but does not match the usage argument.
+ *
+ * \note           You should only call this function on leaf certificates, on
+ *                 (intermediate) CAs the keyUsage extension is automatically
+ *                 checked by \c mbedtls_x509_crt_verify().
+ */
+int mbedtls_x509_crt_check_key_usage( const mbedtls_x509_crt *crt,
+                                      unsigned int usage );
+#endif /* MBEDTLS_X509_CHECK_KEY_USAGE) */
+
+#if defined(MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE)
+/**
+ * \brief           Check usage of certificate against extendedKeyUsage.
+ *
+ * \param crt       Leaf certificate used.
+ * \param usage_oid Intended usage (eg MBEDTLS_OID_SERVER_AUTH or
+ *                  MBEDTLS_OID_CLIENT_AUTH).
+ * \param usage_len Length of usage_oid (eg given by MBEDTLS_OID_SIZE()).
+ *
+ * \return          0 if this use of the certificate is allowed,
+ *                  MBEDTLS_ERR_X509_BAD_INPUT_DATA if not.
+ *
+ * \note            Usually only makes sense on leaf certificates.
+ */
+int mbedtls_x509_crt_check_extended_key_usage( const mbedtls_x509_crt *crt,
+                                               const char *usage_oid,
+                                               size_t usage_len );
+#endif /* MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE */
+
+#if defined(MBEDTLS_X509_CRL_PARSE_C)
+/**
+ * \brief          Verify the certificate revocation status
+ *
+ * \param crt      a certificate to be verified
+ * \param crl      the CRL to verify against
+ *
+ * \return         1 if the certificate is revoked, 0 otherwise
+ *
+ */
+int mbedtls_x509_crt_is_revoked( const mbedtls_x509_crt *crt, const mbedtls_x509_crl *crl );
+#endif /* MBEDTLS_X509_CRL_PARSE_C */
+
+/**
+ * \brief          Initialize a certificate (chain)
+ *
+ * \param crt      Certificate chain to initialize
+ */
+void mbedtls_x509_crt_init( mbedtls_x509_crt *crt );
+
+/**
+ * \brief          Unallocate all certificate data
+ *
+ * \param crt      Certificate chain to free
+ */
+void mbedtls_x509_crt_free( mbedtls_x509_crt *crt );
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief           Initialize a restart context
+ */
+void mbedtls_x509_crt_restart_init( mbedtls_x509_crt_restart_ctx *ctx );
+
+/**
+ * \brief           Free the components of a restart context
+ */
+void mbedtls_x509_crt_restart_free( mbedtls_x509_crt_restart_ctx *ctx );
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+/* \} name */
+/* \} addtogroup x509_module */
+
+#if defined(MBEDTLS_X509_CRT_WRITE_C)
+/**
+ * \brief           Initialize a CRT writing context
+ *
+ * \param ctx       CRT context to initialize
+ */
+void mbedtls_x509write_crt_init( mbedtls_x509write_cert *ctx );
+
+/**
+ * \brief           Set the verion for a Certificate
+ *                  Default: MBEDTLS_X509_CRT_VERSION_3
+ *
+ * \param ctx       CRT context to use
+ * \param version   version to set (MBEDTLS_X509_CRT_VERSION_1, MBEDTLS_X509_CRT_VERSION_2 or
+ *                                  MBEDTLS_X509_CRT_VERSION_3)
+ */
+void mbedtls_x509write_crt_set_version( mbedtls_x509write_cert *ctx, int version );
+
+/**
+ * \brief           Set the serial number for a Certificate.
+ *
+ * \param ctx       CRT context to use
+ * \param serial    serial number to set
+ *
+ * \return          0 if successful
+ */
+int mbedtls_x509write_crt_set_serial( mbedtls_x509write_cert *ctx, const mbedtls_mpi *serial );
+
+/**
+ * \brief           Set the validity period for a Certificate
+ *                  Timestamps should be in string format for UTC timezone
+ *                  i.e. "YYYYMMDDhhmmss"
+ *                  e.g. "20131231235959" for December 31st 2013
+ *                       at 23:59:59
+ *
+ * \param ctx       CRT context to use
+ * \param not_before    not_before timestamp
+ * \param not_after     not_after timestamp
+ *
+ * \return          0 if timestamp was parsed successfully, or
+ *                  a specific error code
+ */
+int mbedtls_x509write_crt_set_validity( mbedtls_x509write_cert *ctx, const char *not_before,
+                                const char *not_after );
+
+/**
+ * \brief           Set the issuer name for a Certificate
+ *                  Issuer names should contain a comma-separated list
+ *                  of OID types and values:
+ *                  e.g. "C=UK,O=ARM,CN=mbed TLS CA"
+ *
+ * \param ctx           CRT context to use
+ * \param issuer_name   issuer name to set
+ *
+ * \return          0 if issuer name was parsed successfully, or
+ *                  a specific error code
+ */
+int mbedtls_x509write_crt_set_issuer_name( mbedtls_x509write_cert *ctx,
+                                   const char *issuer_name );
+
+/**
+ * \brief           Set the subject name for a Certificate
+ *                  Subject names should contain a comma-separated list
+ *                  of OID types and values:
+ *                  e.g. "C=UK,O=ARM,CN=mbed TLS Server 1"
+ *
+ * \param ctx           CRT context to use
+ * \param subject_name  subject name to set
+ *
+ * \return          0 if subject name was parsed successfully, or
+ *                  a specific error code
+ */
+int mbedtls_x509write_crt_set_subject_name( mbedtls_x509write_cert *ctx,
+                                    const char *subject_name );
+
+/**
+ * \brief           Set the subject public key for the certificate
+ *
+ * \param ctx       CRT context to use
+ * \param key       public key to include
+ */
+void mbedtls_x509write_crt_set_subject_key( mbedtls_x509write_cert *ctx, mbedtls_pk_context *key );
+
+/**
+ * \brief           Set the issuer key used for signing the certificate
+ *
+ * \param ctx       CRT context to use
+ * \param key       private key to sign with
+ */
+void mbedtls_x509write_crt_set_issuer_key( mbedtls_x509write_cert *ctx, mbedtls_pk_context *key );
+
+/**
+ * \brief           Set the MD algorithm to use for the signature
+ *                  (e.g. MBEDTLS_MD_SHA1)
+ *
+ * \param ctx       CRT context to use
+ * \param md_alg    MD algorithm to use
+ */
+void mbedtls_x509write_crt_set_md_alg( mbedtls_x509write_cert *ctx, mbedtls_md_type_t md_alg );
+
+/**
+ * \brief           Generic function to add to or replace an extension in the
+ *                  CRT
+ *
+ * \param ctx       CRT context to use
+ * \param oid       OID of the extension
+ * \param oid_len   length of the OID
+ * \param critical  if the extension is critical (per the RFC's definition)
+ * \param val       value of the extension OCTET STRING
+ * \param val_len   length of the value data
+ *
+ * \return          0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_extension( mbedtls_x509write_cert *ctx,
+                                 const char *oid, size_t oid_len,
+                                 int critical,
+                                 const unsigned char *val, size_t val_len );
+
+/**
+ * \brief           Set the basicConstraints extension for a CRT
+ *
+ * \param ctx       CRT context to use
+ * \param is_ca     is this a CA certificate
+ * \param max_pathlen   maximum length of certificate chains below this
+ *                      certificate (only for CA certificates, -1 is
+ *                      inlimited)
+ *
+ * \return          0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_basic_constraints( mbedtls_x509write_cert *ctx,
+                                         int is_ca, int max_pathlen );
+
+#if defined(MBEDTLS_SHA1_C)
+/**
+ * \brief           Set the subjectKeyIdentifier extension for a CRT
+ *                  Requires that mbedtls_x509write_crt_set_subject_key() has been
+ *                  called before
+ *
+ * \param ctx       CRT context to use
+ *
+ * \return          0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_subject_key_identifier( mbedtls_x509write_cert *ctx );
+
+/**
+ * \brief           Set the authorityKeyIdentifier extension for a CRT
+ *                  Requires that mbedtls_x509write_crt_set_issuer_key() has been
+ *                  called before
+ *
+ * \param ctx       CRT context to use
+ *
+ * \return          0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_authority_key_identifier( mbedtls_x509write_cert *ctx );
+#endif /* MBEDTLS_SHA1_C */
+
+/**
+ * \brief           Set the Key Usage Extension flags
+ *                  (e.g. MBEDTLS_X509_KU_DIGITAL_SIGNATURE | MBEDTLS_X509_KU_KEY_CERT_SIGN)
+ *
+ * \param ctx       CRT context to use
+ * \param key_usage key usage flags to set
+ *
+ * \return          0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_key_usage( mbedtls_x509write_cert *ctx,
+                                         unsigned int key_usage );
+
+/**
+ * \brief           Set the Netscape Cert Type flags
+ *                  (e.g. MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT | MBEDTLS_X509_NS_CERT_TYPE_EMAIL)
+ *
+ * \param ctx           CRT context to use
+ * \param ns_cert_type  Netscape Cert Type flags to set
+ *
+ * \return          0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_ns_cert_type( mbedtls_x509write_cert *ctx,
+                                    unsigned char ns_cert_type );
+
+/**
+ * \brief           Free the contents of a CRT write context
+ *
+ * \param ctx       CRT context to free
+ */
+void mbedtls_x509write_crt_free( mbedtls_x509write_cert *ctx );
+
+/**
+ * \brief           Write a built up certificate to a X509 DER structure
+ *                  Note: data is written at the end of the buffer! Use the
+ *                        return value to determine where you should start
+ *                        using the buffer
+ *
+ * \param ctx       certificate to write away
+ * \param buf       buffer to write to
+ * \param size      size of the buffer
+ * \param f_rng     RNG function (for signature, see note)
+ * \param p_rng     RNG parameter
+ *
+ * \return          length of data written if successful, or a specific
+ *                  error code
+ *
+ * \note            f_rng may be NULL if RSA is used for signature and the
+ *                  signature is made offline (otherwise f_rng is desirable
+ *                  for countermeasures against timing attacks).
+ *                  ECDSA signatures always require a non-NULL f_rng.
+ */
+int mbedtls_x509write_crt_der( mbedtls_x509write_cert *ctx, unsigned char *buf, size_t size,
+                       int (*f_rng)(void *, unsigned char *, size_t),
+                       void *p_rng );
+
+#if defined(MBEDTLS_PEM_WRITE_C)
+/**
+ * \brief           Write a built up certificate to a X509 PEM string
+ *
+ * \param ctx       certificate to write away
+ * \param buf       buffer to write to
+ * \param size      size of the buffer
+ * \param f_rng     RNG function (for signature, see note)
+ * \param p_rng     RNG parameter
+ *
+ * \return          0 if successful, or a specific error code
+ *
+ * \note            f_rng may be NULL if RSA is used for signature and the
+ *                  signature is made offline (otherwise f_rng is desirable
+ *                  for countermeasures against timing attacks).
+ *                  ECDSA signatures always require a non-NULL f_rng.
+ */
+int mbedtls_x509write_crt_pem( mbedtls_x509write_cert *ctx, unsigned char *buf, size_t size,
+                       int (*f_rng)(void *, unsigned char *, size_t),
+                       void *p_rng );
+#endif /* MBEDTLS_PEM_WRITE_C */
+#endif /* MBEDTLS_X509_CRT_WRITE_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_x509_crt.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h
new file mode 100644
index 00000000000..b1dfc21f1fb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/x509_csr.h
@@ -0,0 +1,305 @@
+/**
+ * \file x509_csr.h
+ *
+ * \brief X.509 certificate signing request parsing and writing
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_X509_CSR_H
+#define MBEDTLS_X509_CSR_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/x509.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup x509_module
+ * \{ */
+
+/**
+ * \name Structures and functions for X.509 Certificate Signing Requests (CSR)
+ * \{
+ */
+
+/**
+ * Certificate Signing Request (CSR) structure.
+ */
+typedef struct mbedtls_x509_csr
+{
+    mbedtls_x509_buf raw;           /**< The raw CSR data (DER). */
+    mbedtls_x509_buf cri;           /**< The raw CertificateRequestInfo body (DER). */
+
+    int version;            /**< CSR version (1=v1). */
+
+    mbedtls_x509_buf  subject_raw;  /**< The raw subject data (DER). */
+    mbedtls_x509_name subject;      /**< The parsed subject data (named information object). */
+
+    mbedtls_pk_context pk;          /**< Container for the public key context. */
+
+    mbedtls_x509_buf sig_oid;
+    mbedtls_x509_buf sig;
+    mbedtls_md_type_t sig_md;       /**< Internal representation of the MD algorithm of the signature algorithm, e.g. MBEDTLS_MD_SHA256 */
+    mbedtls_pk_type_t sig_pk;       /**< Internal representation of the Public Key algorithm of the signature algorithm, e.g. MBEDTLS_PK_RSA */
+    void *sig_opts;         /**< Signature options to be passed to mbedtls_pk_verify_ext(), e.g. for RSASSA-PSS */
+}
+mbedtls_x509_csr;
+
+/**
+ * Container for writing a CSR
+ */
+typedef struct mbedtls_x509write_csr
+{
+    mbedtls_pk_context *key;
+    mbedtls_asn1_named_data *subject;
+    mbedtls_md_type_t md_alg;
+    mbedtls_asn1_named_data *extensions;
+}
+mbedtls_x509write_csr;
+
+#if defined(MBEDTLS_X509_CSR_PARSE_C)
+/**
+ * \brief          Load a Certificate Signing Request (CSR) in DER format
+ *
+ * \note           CSR attributes (if any) are currently silently ignored.
+ *
+ * \param csr      CSR context to fill
+ * \param buf      buffer holding the CRL data
+ * \param buflen   size of the buffer
+ *
+ * \return         0 if successful, or a specific X509 error code
+ */
+int mbedtls_x509_csr_parse_der( mbedtls_x509_csr *csr,
+                        const unsigned char *buf, size_t buflen );
+
+/**
+ * \brief          Load a Certificate Signing Request (CSR), DER or PEM format
+ *
+ * \note           See notes for \c mbedtls_x509_csr_parse_der()
+ *
+ * \param csr      CSR context to fill
+ * \param buf      buffer holding the CRL data
+ * \param buflen   size of the buffer
+ *                 (including the terminating null byte for PEM data)
+ *
+ * \return         0 if successful, or a specific X509 or PEM error code
+ */
+int mbedtls_x509_csr_parse( mbedtls_x509_csr *csr, const unsigned char *buf, size_t buflen );
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief          Load a Certificate Signing Request (CSR)
+ *
+ * \note           See notes for \c mbedtls_x509_csr_parse()
+ *
+ * \param csr      CSR context to fill
+ * \param path     filename to read the CSR from
+ *
+ * \return         0 if successful, or a specific X509 or PEM error code
+ */
+int mbedtls_x509_csr_parse_file( mbedtls_x509_csr *csr, const char *path );
+#endif /* MBEDTLS_FS_IO */
+
+/**
+ * \brief          Returns an informational string about the
+ *                 CSR.
+ *
+ * \param buf      Buffer to write to
+ * \param size     Maximum size of buffer
+ * \param prefix   A line prefix
+ * \param csr      The X509 CSR to represent
+ *
+ * \return         The length of the string written (not including the
+ *                 terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_csr_info( char *buf, size_t size, const char *prefix,
+                   const mbedtls_x509_csr *csr );
+
+/**
+ * \brief          Initialize a CSR
+ *
+ * \param csr      CSR to initialize
+ */
+void mbedtls_x509_csr_init( mbedtls_x509_csr *csr );
+
+/**
+ * \brief          Unallocate all CSR data
+ *
+ * \param csr      CSR to free
+ */
+void mbedtls_x509_csr_free( mbedtls_x509_csr *csr );
+#endif /* MBEDTLS_X509_CSR_PARSE_C */
+
+/* \} name */
+/* \} addtogroup x509_module */
+
+#if defined(MBEDTLS_X509_CSR_WRITE_C)
+/**
+ * \brief           Initialize a CSR context
+ *
+ * \param ctx       CSR context to initialize
+ */
+void mbedtls_x509write_csr_init( mbedtls_x509write_csr *ctx );
+
+/**
+ * \brief           Set the subject name for a CSR
+ *                  Subject names should contain a comma-separated list
+ *                  of OID types and values:
+ *                  e.g. "C=UK,O=ARM,CN=mbed TLS Server 1"
+ *
+ * \param ctx           CSR context to use
+ * \param subject_name  subject name to set
+ *
+ * \return          0 if subject name was parsed successfully, or
+ *                  a specific error code
+ */
+int mbedtls_x509write_csr_set_subject_name( mbedtls_x509write_csr *ctx,
+                                    const char *subject_name );
+
+/**
+ * \brief           Set the key for a CSR (public key will be included,
+ *                  private key used to sign the CSR when writing it)
+ *
+ * \param ctx       CSR context to use
+ * \param key       Asymetric key to include
+ */
+void mbedtls_x509write_csr_set_key( mbedtls_x509write_csr *ctx, mbedtls_pk_context *key );
+
+/**
+ * \brief           Set the MD algorithm to use for the signature
+ *                  (e.g. MBEDTLS_MD_SHA1)
+ *
+ * \param ctx       CSR context to use
+ * \param md_alg    MD algorithm to use
+ */
+void mbedtls_x509write_csr_set_md_alg( mbedtls_x509write_csr *ctx, mbedtls_md_type_t md_alg );
+
+/**
+ * \brief           Set the Key Usage Extension flags
+ *                  (e.g. MBEDTLS_X509_KU_DIGITAL_SIGNATURE | MBEDTLS_X509_KU_KEY_CERT_SIGN)
+ *
+ * \param ctx       CSR context to use
+ * \param key_usage key usage flags to set
+ *
+ * \return          0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED
+ *
+ * \note            The <code>decipherOnly</code> flag from the Key Usage
+ *                  extension is represented by bit 8 (i.e.
+ *                  <code>0x8000</code>), which cannot typically be represented
+ *                  in an unsigned char. Therefore, the flag
+ *                  <code>decipherOnly</code> (i.e.
+ *                  #MBEDTLS_X509_KU_DECIPHER_ONLY) cannot be set using this
+ *                  function.
+ */
+int mbedtls_x509write_csr_set_key_usage( mbedtls_x509write_csr *ctx, unsigned char key_usage );
+
+/**
+ * \brief           Set the Netscape Cert Type flags
+ *                  (e.g. MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT | MBEDTLS_X509_NS_CERT_TYPE_EMAIL)
+ *
+ * \param ctx           CSR context to use
+ * \param ns_cert_type  Netscape Cert Type flags to set
+ *
+ * \return          0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_csr_set_ns_cert_type( mbedtls_x509write_csr *ctx,
+                                    unsigned char ns_cert_type );
+
+/**
+ * \brief           Generic function to add to or replace an extension in the
+ *                  CSR
+ *
+ * \param ctx       CSR context to use
+ * \param oid       OID of the extension
+ * \param oid_len   length of the OID
+ * \param val       value of the extension OCTET STRING
+ * \param val_len   length of the value data
+ *
+ * \return          0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_csr_set_extension( mbedtls_x509write_csr *ctx,
+                                 const char *oid, size_t oid_len,
+                                 const unsigned char *val, size_t val_len );
+
+/**
+ * \brief           Free the contents of a CSR context
+ *
+ * \param ctx       CSR context to free
+ */
+void mbedtls_x509write_csr_free( mbedtls_x509write_csr *ctx );
+
+/**
+ * \brief           Write a CSR (Certificate Signing Request) to a
+ *                  DER structure
+ *                  Note: data is written at the end of the buffer! Use the
+ *                        return value to determine where you should start
+ *                        using the buffer
+ *
+ * \param ctx       CSR to write away
+ * \param buf       buffer to write to
+ * \param size      size of the buffer
+ * \param f_rng     RNG function (for signature, see note)
+ * \param p_rng     RNG parameter
+ *
+ * \return          length of data written if successful, or a specific
+ *                  error code
+ *
+ * \note            f_rng may be NULL if RSA is used for signature and the
+ *                  signature is made offline (otherwise f_rng is desirable
+ *                  for countermeasures against timing attacks).
+ *                  ECDSA signatures always require a non-NULL f_rng.
+ */
+int mbedtls_x509write_csr_der( mbedtls_x509write_csr *ctx, unsigned char *buf, size_t size,
+                       int (*f_rng)(void *, unsigned char *, size_t),
+                       void *p_rng );
+
+#if defined(MBEDTLS_PEM_WRITE_C)
+/**
+ * \brief           Write a CSR (Certificate Signing Request) to a
+ *                  PEM string
+ *
+ * \param ctx       CSR to write away
+ * \param buf       buffer to write to
+ * \param size      size of the buffer
+ * \param f_rng     RNG function (for signature, see note)
+ * \param p_rng     RNG parameter
+ *
+ * \return          0 if successful, or a specific error code
+ *
+ * \note            f_rng may be NULL if RSA is used for signature and the
+ *                  signature is made offline (otherwise f_rng is desirable
+ *                  for countermeasures against timing attacks).
+ *                  ECDSA signatures always require a non-NULL f_rng.
+ */
+int mbedtls_x509write_csr_pem( mbedtls_x509write_csr *ctx, unsigned char *buf, size_t size,
+                       int (*f_rng)(void *, unsigned char *, size_t),
+                       void *p_rng );
+#endif /* MBEDTLS_PEM_WRITE_C */
+#endif /* MBEDTLS_X509_CSR_WRITE_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_x509_csr.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/xtea.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/xtea.h
new file mode 100644
index 00000000000..4bdc711fda0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/mbedtls/xtea.h
@@ -0,0 +1,139 @@
+/**
+ * \file xtea.h
+ *
+ * \brief XTEA block cipher (32-bit)
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_XTEA_H
+#define MBEDTLS_XTEA_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#define MBEDTLS_XTEA_ENCRYPT     1
+#define MBEDTLS_XTEA_DECRYPT     0
+
+/** The data input has an invalid length. */
+#define MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH             -0x0028
+
+/* MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED is deprecated and should not be used. */
+/** XTEA hardware accelerator failed. */
+#define MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED                  -0x0029
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_XTEA_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief          XTEA context structure
+ */
+typedef struct mbedtls_xtea_context
+{
+    uint32_t k[4];       /*!< key */
+}
+mbedtls_xtea_context;
+
+#else  /* MBEDTLS_XTEA_ALT */
+#include "xtea_alt.h"
+#endif /* MBEDTLS_XTEA_ALT */
+
+/**
+ * \brief          Initialize XTEA context
+ *
+ * \param ctx      XTEA context to be initialized
+ */
+void mbedtls_xtea_init( mbedtls_xtea_context *ctx );
+
+/**
+ * \brief          Clear XTEA context
+ *
+ * \param ctx      XTEA context to be cleared
+ */
+void mbedtls_xtea_free( mbedtls_xtea_context *ctx );
+
+/**
+ * \brief          XTEA key schedule
+ *
+ * \param ctx      XTEA context to be initialized
+ * \param key      the secret key
+ */
+void mbedtls_xtea_setup( mbedtls_xtea_context *ctx, const unsigned char key[16] );
+
+/**
+ * \brief          XTEA cipher function
+ *
+ * \param ctx      XTEA context
+ * \param mode     MBEDTLS_XTEA_ENCRYPT or MBEDTLS_XTEA_DECRYPT
+ * \param input    8-byte input block
+ * \param output   8-byte output block
+ *
+ * \return         0 if successful
+ */
+int mbedtls_xtea_crypt_ecb( mbedtls_xtea_context *ctx,
+                    int mode,
+                    const unsigned char input[8],
+                    unsigned char output[8] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief          XTEA CBC cipher function
+ *
+ * \param ctx      XTEA context
+ * \param mode     MBEDTLS_XTEA_ENCRYPT or MBEDTLS_XTEA_DECRYPT
+ * \param length   the length of input, multiple of 8
+ * \param iv       initialization vector for CBC mode
+ * \param input    input block
+ * \param output   output block
+ *
+ * \return         0 if successful,
+ *                 MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH if the length % 8 != 0
+ */
+int mbedtls_xtea_crypt_cbc( mbedtls_xtea_context *ctx,
+                    int mode,
+                    size_t length,
+                    unsigned char iv[8],
+                    const unsigned char *input,
+                    unsigned char *output);
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief          Checkup routine
+ *
+ * \return         0 if successful, or 1 if the test failed
+ */
+int mbedtls_xtea_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* xtea.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto.h
new file mode 100644
index 00000000000..b0b57c3a6ba
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto.h
@@ -0,0 +1,3956 @@
+/**
+ * \file psa/crypto.h
+ * \brief Platform Security Architecture cryptography module
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_H
+#define PSA_CRYPTO_H
+
+#include "crypto_platform.h"
+
+#include <stddef.h>
+
+#ifdef __DOXYGEN_ONLY__
+/* This __DOXYGEN_ONLY__ block contains mock definitions for things that
+ * must be defined in the crypto_platform.h header. These mock definitions
+ * are present in this file as a convenience to generate pretty-printed
+ * documentation that includes those definitions. */
+
+/** \defgroup platform Implementation-specific definitions
+ * @{
+ */
+
+/**@}*/
+#endif /* __DOXYGEN_ONLY__ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* The file "crypto_types.h" declares types that encode errors,
+ * algorithms, key types, policies, etc. */
+#include "crypto_types.h"
+
+/** \defgroup version API version
+ * @{
+ */
+
+/**
+ * The major version of this implementation of the PSA Crypto API
+ */
+#define PSA_CRYPTO_API_VERSION_MAJOR 1
+
+/**
+ * The minor version of this implementation of the PSA Crypto API
+ */
+#define PSA_CRYPTO_API_VERSION_MINOR 0
+
+/**@}*/
+
+/* The file "crypto_values.h" declares macros to build and analyze values
+ * of integral types defined in "crypto_types.h". */
+#include "crypto_values.h"
+
+/** \defgroup initialization Library initialization
+ * @{
+ */
+
+/**
+ * \brief Library initialization.
+ *
+ * Applications must call this function before calling any other
+ * function in this module.
+ *
+ * Applications may call this function more than once. Once a call
+ * succeeds, subsequent calls are guaranteed to succeed.
+ *
+ * If the application calls other functions before calling psa_crypto_init(),
+ * the behavior is undefined. Implementations are encouraged to either perform
+ * the operation as if the library had been initialized or to return
+ * #PSA_ERROR_BAD_STATE or some other applicable error. In particular,
+ * implementations should not return a success status if the lack of
+ * initialization may have security implications, for example due to improper
+ * seeding of the random number generator.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ */
+psa_status_t psa_crypto_init(void);
+
+/**@}*/
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** \def PSA_KEY_ATTRIBUTES_INIT
+ *
+ * This macro returns a suitable initializer for a key attribute structure
+ * of type #psa_key_attributes_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_KEY_ATTRIBUTES_INIT {0}
+#endif
+
+/** Return an initial value for a key attributes structure.
+ */
+static psa_key_attributes_t psa_key_attributes_init(void);
+
+/** Declare a key as persistent and set its key identifier.
+ *
+ * If the attribute structure currently declares the key as volatile (which
+ * is the default content of an attribute structure), this function sets
+ * the lifetime attribute to #PSA_KEY_LIFETIME_PERSISTENT.
+ *
+ * This function does not access storage, it merely stores the given
+ * value in the structure.
+ * The persistent key will be written to storage when the attribute
+ * structure is passed to a key creation function such as
+ * psa_import_key(), psa_generate_key(),
+ * psa_key_derivation_output_key() or psa_copy_key().
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes  The attribute structure to write to.
+ * \param key              The persistent identifier for the key.
+ */
+static void psa_set_key_id( psa_key_attributes_t *attributes,
+                            mbedtls_svc_key_id_t key );
+
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+/** Set the owner identifier of a key.
+ *
+ * When key identifiers encode key owner identifiers, psa_set_key_id() does
+ * not allow to define in key attributes the owner of volatile keys as
+ * psa_set_key_id() enforces the key to be persistent.
+ *
+ * This function allows to set in key attributes the owner identifier of a
+ * key. It is intended to be used for volatile keys. For persistent keys,
+ * it is recommended to use the PSA Cryptography API psa_set_key_id() to define
+ * the owner of a key.
+ *
+ * \param[out] attributes  The attribute structure to write to.
+ * \param owner            The key owner identifier.
+ */
+static void mbedtls_set_key_owner_id( psa_key_attributes_t *attributes,
+                                      mbedtls_key_owner_id_t owner );
+#endif
+
+/** Set the location of a persistent key.
+ *
+ * To make a key persistent, you must give it a persistent key identifier
+ * with psa_set_key_id(). By default, a key that has a persistent identifier
+ * is stored in the default storage area identifier by
+ * #PSA_KEY_LIFETIME_PERSISTENT. Call this function to choose a storage
+ * area, or to explicitly declare the key as volatile.
+ *
+ * This function does not access storage, it merely stores the given
+ * value in the structure.
+ * The persistent key will be written to storage when the attribute
+ * structure is passed to a key creation function such as
+ * psa_import_key(), psa_generate_key(),
+ * psa_key_derivation_output_key() or psa_copy_key().
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param lifetime              The lifetime for the key.
+ *                              If this is #PSA_KEY_LIFETIME_VOLATILE, the
+ *                              key will be volatile, and the key identifier
+ *                              attribute is reset to 0.
+ */
+static void psa_set_key_lifetime(psa_key_attributes_t *attributes,
+                                 psa_key_lifetime_t lifetime);
+
+/** Retrieve the key identifier from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The persistent identifier stored in the attribute structure.
+ *         This value is unspecified if the attribute structure declares
+ *         the key as volatile.
+ */
+static mbedtls_svc_key_id_t psa_get_key_id(
+    const psa_key_attributes_t *attributes);
+
+/** Retrieve the lifetime from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The lifetime value stored in the attribute structure.
+ */
+static psa_key_lifetime_t psa_get_key_lifetime(
+    const psa_key_attributes_t *attributes);
+
+/** Declare usage flags for a key.
+ *
+ * Usage flags are part of a key's usage policy. They encode what
+ * kind of operations are permitted on the key. For more details,
+ * refer to the documentation of the type #psa_key_usage_t.
+ *
+ * This function overwrites any usage flags
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param usage_flags           The usage flags to write.
+ */
+static void psa_set_key_usage_flags(psa_key_attributes_t *attributes,
+                                    psa_key_usage_t usage_flags);
+
+/** Retrieve the usage flags from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The usage flags stored in the attribute structure.
+ */
+static psa_key_usage_t psa_get_key_usage_flags(
+    const psa_key_attributes_t *attributes);
+
+/** Declare the permitted algorithm policy for a key.
+ *
+ * The permitted algorithm policy of a key encodes which algorithm or
+ * algorithms are permitted to be used with this key. The following
+ * algorithm policies are supported:
+ * - 0 does not allow any cryptographic operation with the key. The key
+ *   may be used for non-cryptographic actions such as exporting (if
+ *   permitted by the usage flags).
+ * - An algorithm value permits this particular algorithm.
+ * - An algorithm wildcard built from #PSA_ALG_ANY_HASH allows the specified
+ *   signature scheme with any hash algorithm.
+ * - An algorithm built from #PSA_ALG_AT_LEAST_THIS_LENGTH_MAC allows
+ *   any MAC algorithm from the same base class (e.g. CMAC) which
+ *   generates/verifies a MAC length greater than or equal to the length
+ *   encoded in the wildcard algorithm.
+ * - An algorithm built from #PSA_ALG_AEAD_WITH_AT_LEAST_THIS_LENGTH_TAG
+ *   allows any AEAD algorithm from the same base class (e.g. CCM) which
+ *   generates/verifies a tag length greater than or equal to the length
+ *   encoded in the wildcard algorithm.
+ *
+ * This function overwrites any algorithm policy
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param alg                   The permitted algorithm policy to write.
+ */
+static void psa_set_key_algorithm(psa_key_attributes_t *attributes,
+                                  psa_algorithm_t alg);
+
+
+/** Retrieve the algorithm policy from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The algorithm stored in the attribute structure.
+ */
+static psa_algorithm_t psa_get_key_algorithm(
+    const psa_key_attributes_t *attributes);
+
+/** Declare the type of a key.
+ *
+ * This function overwrites any key type
+ * previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param type                  The key type to write.
+ *                              If this is 0, the key type in \p attributes
+ *                              becomes unspecified.
+ */
+static void psa_set_key_type(psa_key_attributes_t *attributes,
+                             psa_key_type_t type);
+
+
+/** Declare the size of a key.
+ *
+ * This function overwrites any key size previously set in \p attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate each of its arguments exactly once.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param bits                  The key size in bits.
+ *                              If this is 0, the key size in \p attributes
+ *                              becomes unspecified. Keys of size 0 are
+ *                              not supported.
+ */
+static void psa_set_key_bits(psa_key_attributes_t *attributes,
+                             size_t bits);
+
+/** Retrieve the key type from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The key type stored in the attribute structure.
+ */
+static psa_key_type_t psa_get_key_type(const psa_key_attributes_t *attributes);
+
+/** Retrieve the key size from key attributes.
+ *
+ * This function may be declared as `static` (i.e. without external
+ * linkage). This function may be provided as a function-like macro,
+ * but in this case it must evaluate its argument exactly once.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The key size stored in the attribute structure, in bits.
+ */
+static size_t psa_get_key_bits(const psa_key_attributes_t *attributes);
+
+/** Retrieve the attributes of a key.
+ *
+ * This function first resets the attribute structure as with
+ * psa_reset_key_attributes(). It then copies the attributes of
+ * the given key into the given attribute structure.
+ *
+ * \note This function may allocate memory or other resources.
+ *       Once you have called this function on an attribute structure,
+ *       you must call psa_reset_key_attributes() to free these resources.
+ *
+ * \param[in] key               Identifier of the key to query.
+ * \param[in,out] attributes    On success, the attributes of the key.
+ *                              On failure, equivalent to a
+ *                              freshly-initialized structure.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_get_key_attributes(mbedtls_svc_key_id_t key,
+                                    psa_key_attributes_t *attributes);
+
+/** Reset a key attribute structure to a freshly initialized state.
+ *
+ * You must initialize the attribute structure as described in the
+ * documentation of the type #psa_key_attributes_t before calling this
+ * function. Once the structure has been initialized, you may call this
+ * function at any time.
+ *
+ * This function frees any auxiliary resources that the structure
+ * may contain.
+ *
+ * \param[in,out] attributes    The attribute structure to reset.
+ */
+void psa_reset_key_attributes(psa_key_attributes_t *attributes);
+
+/**@}*/
+
+/** \defgroup key_management Key management
+ * @{
+ */
+
+/** Remove non-essential copies of key material from memory.
+ *
+ * If the key identifier designates a volatile key, this functions does not do
+ * anything and returns successfully.
+ *
+ * If the key identifier designates a persistent key, then this function will
+ * free all resources associated with the key in volatile memory. The key
+ * data in persistent storage is not affected and the key can still be used.
+ *
+ * \param key Identifier of the key to purge.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key material will have been removed from memory if it is not
+ *         currently required.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not a valid key identifier.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_purge_key(mbedtls_svc_key_id_t key);
+
+/** Make a copy of a key.
+ *
+ * Copy key material from one location to another.
+ *
+ * This function is primarily useful to copy a key from one location
+ * to another, since it populates a key using the material from
+ * another key which may have a different lifetime.
+ *
+ * This function may be used to share a key with a different party,
+ * subject to implementation-defined restrictions on key sharing.
+ *
+ * The policy on the source key must have the usage flag
+ * #PSA_KEY_USAGE_COPY set.
+ * This flag is sufficient to permit the copy if the key has the lifetime
+ * #PSA_KEY_LIFETIME_VOLATILE or #PSA_KEY_LIFETIME_PERSISTENT.
+ * Some secure elements do not provide a way to copy a key without
+ * making it extractable from the secure element. If a key is located
+ * in such a secure element, then the key must have both usage flags
+ * #PSA_KEY_USAGE_COPY and #PSA_KEY_USAGE_EXPORT in order to make
+ * a copy of the key outside the secure element.
+ *
+ * The resulting key may only be used in a way that conforms to
+ * both the policy of the original key and the policy specified in
+ * the \p attributes parameter:
+ * - The usage flags on the resulting key are the bitwise-and of the
+ *   usage flags on the source policy and the usage flags in \p attributes.
+ * - If both allow the same algorithm or wildcard-based
+ *   algorithm policy, the resulting key has the same algorithm policy.
+ * - If either of the policies allows an algorithm and the other policy
+ *   allows a wildcard-based algorithm policy that includes this algorithm,
+ *   the resulting key allows the same algorithm.
+ * - If the policies do not allow any algorithm in common, this function
+ *   fails with the status #PSA_ERROR_INVALID_ARGUMENT.
+ *
+ * The effect of this function on implementation-defined attributes is
+ * implementation-defined.
+ *
+ * \param source_key        The key to copy. It must allow the usage
+ *                          #PSA_KEY_USAGE_COPY. If a private or secret key is
+ *                          being copied outside of a secure element it must
+ *                          also allow #PSA_KEY_USAGE_EXPORT.
+ * \param[in] attributes    The attributes for the new key.
+ *                          They are used as follows:
+ *                          - The key type and size may be 0. If either is
+ *                            nonzero, it must match the corresponding
+ *                            attribute of the source key.
+ *                          - The key location (the lifetime and, for
+ *                            persistent keys, the key identifier) is
+ *                            used directly.
+ *                          - The policy constraints (usage flags and
+ *                            algorithm policy) are combined from
+ *                            the source key and \p attributes so that
+ *                            both sets of restrictions apply, as
+ *                            described in the documentation of this function.
+ * \param[out] target_key   On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p source_key is invalid.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The lifetime or identifier in \p attributes are invalid.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The policy constraints on the source and specified in
+ *         \p attributes are incompatible.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p attributes specifies a key type or key size
+ *         which does not match the attributes of the source key.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The source key does not have the #PSA_KEY_USAGE_COPY usage flag.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The source key is not exportable and its lifetime does not
+ *         allow copying it to the target's lifetime.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_copy_key(mbedtls_svc_key_id_t source_key,
+                          const psa_key_attributes_t *attributes,
+                          mbedtls_svc_key_id_t *target_key);
+
+
+/**
+ * \brief Destroy a key.
+ *
+ * This function destroys a key from both volatile
+ * memory and, if applicable, non-volatile storage. Implementations shall
+ * make a best effort to ensure that that the key material cannot be recovered.
+ *
+ * This function also erases any metadata such as policies and frees
+ * resources associated with the key.
+ *
+ * If a key is currently in use in a multipart operation, then destroying the
+ * key will cause the multipart operation to fail.
+ *
+ * \param key  Identifier of the key to erase. If this is \c 0, do nothing and
+ *             return #PSA_SUCCESS.
+ *
+ * \retval #PSA_SUCCESS
+ *         \p key was a valid identifier and the key material that it
+ *         referred to has been erased. Alternatively, \p key is \c 0.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key cannot be erased because it is
+ *         read-only, either due to a policy or due to physical restrictions.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p key is not a valid identifier nor \c 0.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ *         There was an failure in communication with the cryptoprocessor.
+ *         The key material may still be present in the cryptoprocessor.
+ * \retval #PSA_ERROR_DATA_INVALID
+ *         This error is typically a result of either storage corruption on a
+ *         cleartext storage backend, or an attempt to read data that was
+ *         written by an incompatible version of the library.
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The storage is corrupted. Implementations shall make a best effort
+ *         to erase key material even in this stage, however applications
+ *         should be aware that it may be impossible to guarantee that the
+ *         key material is not recoverable in such cases.
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ *         An unexpected condition which is not a storage corruption or
+ *         a communication failure occurred. The cryptoprocessor may have
+ *         been compromised.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_destroy_key(mbedtls_svc_key_id_t key);
+
+/**@}*/
+
+/** \defgroup import_export Key import and export
+ * @{
+ */
+
+/**
+ * \brief Import a key in binary format.
+ *
+ * This function supports any output from psa_export_key(). Refer to the
+ * documentation of psa_export_public_key() for the format of public keys
+ * and to the documentation of psa_export_key() for the format for
+ * other key types.
+ *
+ * The key data determines the key size. The attributes may optionally
+ * specify a key size; in this case it must match the size determined
+ * from the key data. A key size of 0 in \p attributes indicates that
+ * the key size is solely determined by the key data.
+ *
+ * Implementations must reject an attempt to import a key of size 0.
+ *
+ * This specification supports a single format for each key type.
+ * Implementations may support other formats as long as the standard
+ * format is supported. Implementations that support other formats
+ * should ensure that the formats are clearly unambiguous so as to
+ * minimize the risk that an invalid input is accidentally interpreted
+ * according to a different format.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ *                          The key size is always determined from the
+ *                          \p data buffer.
+ *                          If the key size in \p attributes is nonzero,
+ *                          it must be equal to the size from \p data.
+ * \param[out] key          On success, an identifier to the newly created key.
+ *                          For persistent keys, this is the key identifier
+ *                          defined in \p attributes.
+ *                          \c 0 on failure.
+ * \param[in] data    Buffer containing the key data. The content of this
+ *                    buffer is interpreted according to the type declared
+ *                    in \p attributes.
+ *                    All implementations must support at least the format
+ *                    described in the documentation
+ *                    of psa_export_key() or psa_export_public_key() for
+ *                    the chosen type. Implementations may allow other
+ *                    formats, but should be conservative: implementations
+ *                    should err on the side of rejecting content if it
+ *                    may be erroneous (e.g. wrong type or truncated data).
+ * \param data_length Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The key type or key size is not supported, either by the
+ *         implementation in general or in this particular persistent location.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key attributes, as a whole, are invalid.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key data is not correctly formatted.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size in \p attributes is nonzero and does not match the size
+ *         of the key data.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_import_key(const psa_key_attributes_t *attributes,
+                            const uint8_t *data,
+                            size_t data_length,
+                            mbedtls_svc_key_id_t *key);
+
+
+
+/**
+ * \brief Export a key in binary format.
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an equivalent object.
+ *
+ * If the implementation of psa_import_key() supports other formats
+ * beyond the format specified here, the output from psa_export_key()
+ * must use the representation specified here, not the original
+ * representation.
+ *
+ * For standard key types, the output format is as follows:
+ *
+ * - For symmetric keys (including MAC keys), the format is the
+ *   raw bytes of the key.
+ * - For DES, the key data consists of 8 bytes. The parity bits must be
+ *   correct.
+ * - For Triple-DES, the format is the concatenation of the
+ *   two or three DES keys.
+ * - For RSA key pairs (#PSA_KEY_TYPE_RSA_KEY_PAIR), the format
+ *   is the non-encrypted DER encoding of the representation defined by
+ *   PKCS\#1 (RFC 8017) as `RSAPrivateKey`, version 0.
+ *   ```
+ *   RSAPrivateKey ::= SEQUENCE {
+ *       version             INTEGER,  -- must be 0
+ *       modulus             INTEGER,  -- n
+ *       publicExponent      INTEGER,  -- e
+ *       privateExponent     INTEGER,  -- d
+ *       prime1              INTEGER,  -- p
+ *       prime2              INTEGER,  -- q
+ *       exponent1           INTEGER,  -- d mod (p-1)
+ *       exponent2           INTEGER,  -- d mod (q-1)
+ *       coefficient         INTEGER,  -- (inverse of q) mod p
+ *   }
+ *   ```
+ * - For elliptic curve key pairs (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_KEY_PAIR is true), the format is
+ *   a representation of the private value as a `ceiling(m/8)`-byte string
+ *   where `m` is the bit size associated with the curve, i.e. the bit size
+ *   of the order of the curve's coordinate field. This byte string is
+ *   in little-endian order for Montgomery curves (curve types
+ *   `PSA_ECC_FAMILY_CURVEXXX`), and in big-endian order for Weierstrass
+ *   curves (curve types `PSA_ECC_FAMILY_SECTXXX`, `PSA_ECC_FAMILY_SECPXXX`
+ *   and `PSA_ECC_FAMILY_BRAINPOOL_PXXX`).
+ *   For Weierstrass curves, this is the content of the `privateKey` field of
+ *   the `ECPrivateKey` format defined by RFC 5915.  For Montgomery curves,
+ *   the format is defined by RFC 7748, and output is masked according to §5.
+ *   For twisted Edwards curves, the private key is as defined by RFC 8032
+ *   (a 32-byte string for Edwards25519, a 57-byte string for Edwards448).
+ * - For Diffie-Hellman key exchange key pairs (key types for which
+ *   #PSA_KEY_TYPE_IS_DH_KEY_PAIR is true), the
+ *   format is the representation of the private key `x` as a big-endian byte
+ *   string. The length of the byte string is the private key size in bytes
+ *   (leading zeroes are not stripped).
+ * - For public keys (key types for which #PSA_KEY_TYPE_IS_PUBLIC_KEY is
+ *   true), the format is the same as for psa_export_public_key().
+ *
+ * The policy on the key must have the usage flag #PSA_KEY_USAGE_EXPORT set.
+ *
+ * \param key               Identifier of the key to export. It must allow the
+ *                          usage #PSA_KEY_USAGE_EXPORT, unless it is a public
+ *                          key.
+ * \param[out] data         Buffer where the key data is to be written.
+ * \param data_size         Size of the \p data buffer in bytes.
+ * \param[out] data_length  On success, the number of bytes
+ *                          that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_EXPORT flag.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p data buffer is too small. You can determine a
+ *         sufficient buffer size by calling
+ *         #PSA_EXPORT_KEY_OUTPUT_SIZE(\c type, \c bits)
+ *         where \c type is the key type
+ *         and \c bits is the key size in bits.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_export_key(mbedtls_svc_key_id_t key,
+                            uint8_t *data,
+                            size_t data_size,
+                            size_t *data_length);
+
+/**
+ * \brief Export a public key or the public part of a key pair in binary format.
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an object that is equivalent to the public key.
+ *
+ * This specification supports a single format for each key type.
+ * Implementations may support other formats as long as the standard
+ * format is supported. Implementations that support other formats
+ * should ensure that the formats are clearly unambiguous so as to
+ * minimize the risk that an invalid input is accidentally interpreted
+ * according to a different format.
+ *
+ * For standard key types, the output format is as follows:
+ * - For RSA public keys (#PSA_KEY_TYPE_RSA_PUBLIC_KEY), the DER encoding of
+ *   the representation defined by RFC 3279 &sect;2.3.1 as `RSAPublicKey`.
+ *   ```
+ *   RSAPublicKey ::= SEQUENCE {
+ *      modulus            INTEGER,    -- n
+ *      publicExponent     INTEGER  }  -- e
+ *   ```
+ * - For elliptic curve keys on a twisted Edwards curve (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY is true and #PSA_KEY_TYPE_ECC_GET_FAMILY
+ *   returns #PSA_ECC_FAMILY_TWISTED_EDWARDS), the public key is as defined
+ *   by RFC 8032
+ *   (a 32-byte string for Edwards25519, a 57-byte string for Edwards448).
+ * - For other elliptic curve public keys (key types for which
+ *   #PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY is true), the format is the uncompressed
+ *   representation defined by SEC1 &sect;2.3.3 as the content of an ECPoint.
+ *   Let `m` be the bit size associated with the curve, i.e. the bit size of
+ *   `q` for a curve over `F_q`. The representation consists of:
+ *      - The byte 0x04;
+ *      - `x_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - `y_P` as a `ceiling(m/8)`-byte string, big-endian.
+ * - For Diffie-Hellman key exchange public keys (key types for which
+ *   #PSA_KEY_TYPE_IS_DH_PUBLIC_KEY is true),
+ *   the format is the representation of the public key `y = g^x mod p` as a
+ *   big-endian byte string. The length of the byte string is the length of the
+ *   base prime `p` in bytes.
+ *
+ * Exporting a public key object or the public part of a key pair is
+ * always permitted, regardless of the key's usage flags.
+ *
+ * \param key               Identifier of the key to export.
+ * \param[out] data         Buffer where the key data is to be written.
+ * \param data_size         Size of the \p data buffer in bytes.
+ * \param[out] data_length  On success, the number of bytes
+ *                          that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key is neither a public key nor a key pair.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p data buffer is too small. You can determine a
+ *         sufficient buffer size by calling
+ *         #PSA_EXPORT_KEY_OUTPUT_SIZE(#PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(\c type), \c bits)
+ *         where \c type is the key type
+ *         and \c bits is the key size in bits.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_export_public_key(mbedtls_svc_key_id_t key,
+                                   uint8_t *data,
+                                   size_t data_size,
+                                   size_t *data_length);
+
+
+
+/**@}*/
+
+/** \defgroup hash Message digests
+ * @{
+ */
+
+/** Calculate the hash (digest) of a message.
+ *
+ * \note To verify the hash of a message against an
+ *       expected value, use psa_hash_compare() instead.
+ *
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ * \param[in] input         Buffer containing the message to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] hash         Buffer where the hash is to be written.
+ * \param hash_size         Size of the \p hash buffer in bytes.
+ * \param[out] hash_length  On success, the number of bytes
+ *                          that make up the hash value. This is always
+ *                          #PSA_HASH_LENGTH(\p alg).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p hash_size is too small
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_compute(psa_algorithm_t alg,
+                              const uint8_t *input,
+                              size_t input_length,
+                              uint8_t *hash,
+                              size_t hash_size,
+                              size_t *hash_length);
+
+/** Calculate the hash (digest) of a message and compare it with a
+ * reference value.
+ *
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ * \param[in] input         Buffer containing the message to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] hash         Buffer containing the expected hash value.
+ * \param hash_length       Size of the \p hash buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected hash is identical to the actual hash of the input.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The hash of the message was calculated successfully, but it
+ *         differs from the expected hash.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p input_length or \p hash_length do not match the hash size for \p alg
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_compare(psa_algorithm_t alg,
+                              const uint8_t *input,
+                              size_t input_length,
+                              const uint8_t *hash,
+                              size_t hash_length);
+
+/** The type of the state data structure for multipart hash operations.
+ *
+ * Before calling any function on a hash operation object, the application must
+ * initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_hash_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_hash_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_HASH_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_hash_operation_t operation = PSA_HASH_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_hash_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_hash_operation_t operation;
+ *   operation = psa_hash_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_hash_operation_s psa_hash_operation_t;
+
+/** \def PSA_HASH_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a hash operation object
+ * of type #psa_hash_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_HASH_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a hash operation object.
+ */
+static psa_hash_operation_t psa_hash_operation_init(void);
+
+/** Set up a multipart hash operation.
+ *
+ * The sequence of operations to calculate a hash (message digest)
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_hash_operation_t, e.g. #PSA_HASH_OPERATION_INIT.
+ * -# Call psa_hash_setup() to specify the algorithm.
+ * -# Call psa_hash_update() zero, one or more times, passing a fragment
+ *    of the message each time. The hash that is calculated is the hash
+ *    of the concatenation of these messages in order.
+ * -# To calculate the hash, call psa_hash_finish().
+ *    To compare the hash with an expected value, call psa_hash_verify().
+ *
+ * If an error occurs at any step after a call to psa_hash_setup(), the
+ * operation will need to be reset by a call to psa_hash_abort(). The
+ * application may call psa_hash_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_hash_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_hash_finish() or psa_hash_verify().
+ * - A call to psa_hash_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_hash_operation_t and not yet in use.
+ * \param alg               The hash algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_HASH(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not a supported hash algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p alg is not a hash algorithm.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_setup(psa_hash_operation_t *operation,
+                            psa_algorithm_t alg);
+
+/** Add a message fragment to a multipart hash operation.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \param[in,out] operation Active hash operation.
+ * \param[in] input         Buffer containing the message fragment to hash.
+ * \param input_length      Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it muct be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_update(psa_hash_operation_t *operation,
+                             const uint8_t *input,
+                             size_t input_length);
+
+/** Finish the calculation of the hash of a message.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ * This function calculates the hash of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_hash_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \warning Applications should not call this function if they expect
+ *          a specific value for the hash. Call psa_hash_verify() instead.
+ *          Beware that comparing integrity or authenticity data such as
+ *          hash values with a function such as \c memcmp is risky
+ *          because the time taken by the comparison may leak information
+ *          about the hashed data which could allow an attacker to guess
+ *          a valid hash and thereby bypass security controls.
+ *
+ * \param[in,out] operation     Active hash operation.
+ * \param[out] hash             Buffer where the hash is to be written.
+ * \param hash_size             Size of the \p hash buffer in bytes.
+ * \param[out] hash_length      On success, the number of bytes
+ *                              that make up the hash value. This is always
+ *                              #PSA_HASH_LENGTH(\c alg) where \c alg is the
+ *                              hash algorithm that is calculated.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p hash buffer is too small. You can determine a
+ *         sufficient buffer size by calling #PSA_HASH_LENGTH(\c alg)
+ *         where \c alg is the hash algorithm that is calculated.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_finish(psa_hash_operation_t *operation,
+                             uint8_t *hash,
+                             size_t hash_size,
+                             size_t *hash_length);
+
+/** Finish the calculation of the hash of a message and compare it with
+ * an expected value.
+ *
+ * The application must call psa_hash_setup() before calling this function.
+ * This function calculates the hash of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_hash_update(). It then
+ * compares the calculated hash with the expected hash passed as a
+ * parameter to this function.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_hash_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual hash and the expected hash is performed
+ * in constant time.
+ *
+ * \param[in,out] operation     Active hash operation.
+ * \param[in] hash              Buffer containing the expected hash value.
+ * \param hash_length           Size of the \p hash buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected hash is identical to the actual hash of the message.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The hash of the message was calculated successfully, but it
+ *         differs from the expected hash.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_verify(psa_hash_operation_t *operation,
+                             const uint8_t *hash,
+                             size_t hash_length);
+
+/** Abort a hash operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_hash_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized by one of the methods described in #psa_hash_operation_t.
+ *
+ * In particular, calling psa_hash_abort() after the operation has been
+ * terminated by a call to psa_hash_abort(), psa_hash_finish() or
+ * psa_hash_verify() is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized hash operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_abort(psa_hash_operation_t *operation);
+
+/** Clone a hash operation.
+ *
+ * This function copies the state of an ongoing hash operation to
+ * a new operation object. In other words, this function is equivalent
+ * to calling psa_hash_setup() on \p target_operation with the same
+ * algorithm that \p source_operation was set up for, then
+ * psa_hash_update() on \p target_operation with the same input that
+ * that was passed to \p source_operation. After this function returns, the
+ * two objects are independent, i.e. subsequent calls involving one of
+ * the objects do not affect the other object.
+ *
+ * \param[in] source_operation      The active hash operation to clone.
+ * \param[in,out] target_operation  The operation object to set up.
+ *                                  It must be initialized but not active.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The \p source_operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The \p target_operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_hash_clone(const psa_hash_operation_t *source_operation,
+                            psa_hash_operation_t *target_operation);
+
+/**@}*/
+
+/** \defgroup MAC Message authentication codes
+ * @{
+ */
+
+/** Calculate the MAC (message authentication code) of a message.
+ *
+ * \note To verify the MAC of a message against an
+ *       expected value, use psa_mac_verify() instead.
+ *       Beware that comparing integrity or authenticity data such as
+ *       MAC values with a function such as \c memcmp is risky
+ *       because the time taken by the comparison may leak information
+ *       about the MAC value which could allow an attacker to guess
+ *       a valid MAC and thereby bypass security controls.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must allow the usage PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ * \param[in] input         Buffer containing the input message.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] mac          Buffer where the MAC value is to be written.
+ * \param mac_size          Size of the \p mac buffer in bytes.
+ * \param[out] mac_length   On success, the number of bytes
+ *                          that make up the MAC value.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p mac_size is too small
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_compute(mbedtls_svc_key_id_t key,
+                             psa_algorithm_t alg,
+                             const uint8_t *input,
+                             size_t input_length,
+                             uint8_t *mac,
+                             size_t mac_size,
+                             size_t *mac_length);
+
+/** Calculate the MAC of a message and compare it with a reference value.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must allow the usage PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ * \param[in] input         Buffer containing the input message.
+ * \param input_length      Size of the \p input buffer in bytes.
+ * \param[out] mac          Buffer containing the expected MAC value.
+ * \param mac_length        Size of the \p mac buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected MAC is identical to the actual MAC of the input.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The MAC of the message was calculated successfully, but it
+ *         differs from the expected value.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify(mbedtls_svc_key_id_t key,
+                            psa_algorithm_t alg,
+                            const uint8_t *input,
+                            size_t input_length,
+                            const uint8_t *mac,
+                            size_t mac_length);
+
+/** The type of the state data structure for multipart MAC operations.
+ *
+ * Before calling any function on a MAC operation object, the application must
+ * initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_mac_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_mac_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_MAC_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_mac_operation_t operation = PSA_MAC_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_mac_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_mac_operation_t operation;
+ *   operation = psa_mac_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_mac_operation_s psa_mac_operation_t;
+
+/** \def PSA_MAC_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a MAC operation object of type
+ * #psa_mac_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_MAC_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a MAC operation object.
+ */
+static psa_mac_operation_t psa_mac_operation_init(void);
+
+/** Set up a multipart MAC calculation operation.
+ *
+ * This function sets up the calculation of the MAC
+ * (message authentication code) of a byte string.
+ * To verify the MAC of a message against an
+ * expected value, use psa_mac_verify_setup() instead.
+ *
+ * The sequence of operations to calculate a MAC is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_mac_operation_t, e.g. #PSA_MAC_OPERATION_INIT.
+ * -# Call psa_mac_sign_setup() to specify the algorithm and key.
+ * -# Call psa_mac_update() zero, one or more times, passing a fragment
+ *    of the message each time. The MAC that is calculated is the MAC
+ *    of the concatenation of these messages in order.
+ * -# At the end of the message, call psa_mac_sign_finish() to finish
+ *    calculating the MAC value and retrieve it.
+ *
+ * If an error occurs at any step after a call to psa_mac_sign_setup(), the
+ * operation will need to be reset by a call to psa_mac_abort(). The
+ * application may call psa_mac_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_mac_sign_setup(), the application must
+ * eventually terminate the operation through one of the following methods:
+ * - A successful call to psa_mac_sign_finish().
+ * - A call to psa_mac_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_mac_operation_t and not yet in use.
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must remain valid until the operation terminates.
+ *                          It must allow the usage PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_sign_setup(psa_mac_operation_t *operation,
+                                mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg);
+
+/** Set up a multipart MAC verification operation.
+ *
+ * This function sets up the verification of the MAC
+ * (message authentication code) of a byte string against an expected value.
+ *
+ * The sequence of operations to verify a MAC is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_mac_operation_t, e.g. #PSA_MAC_OPERATION_INIT.
+ * -# Call psa_mac_verify_setup() to specify the algorithm and key.
+ * -# Call psa_mac_update() zero, one or more times, passing a fragment
+ *    of the message each time. The MAC that is calculated is the MAC
+ *    of the concatenation of these messages in order.
+ * -# At the end of the message, call psa_mac_verify_finish() to finish
+ *    calculating the actual MAC of the message and verify it against
+ *    the expected value.
+ *
+ * If an error occurs at any step after a call to psa_mac_verify_setup(), the
+ * operation will need to be reset by a call to psa_mac_abort(). The
+ * application may call psa_mac_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_mac_verify_setup(), the application must
+ * eventually terminate the operation through one of the following methods:
+ * - A successful call to psa_mac_verify_finish().
+ * - A call to psa_mac_abort().
+ *
+ * \param[in,out] operation The operation object to set up. It must have
+ *                          been initialized as per the documentation for
+ *                          #psa_mac_operation_t and not yet in use.
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must remain valid until the operation terminates.
+ *                          It must allow the usage
+ *                          PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param alg               The MAC algorithm to compute (\c PSA_ALG_XXX value
+ *                          such that #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c key is not compatible with \c alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a MAC algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         The key could not be retrieved from storage
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify_setup(psa_mac_operation_t *operation,
+                                  mbedtls_svc_key_id_t key,
+                                  psa_algorithm_t alg);
+
+/** Add a message fragment to a multipart MAC operation.
+ *
+ * The application must call psa_mac_sign_setup() or psa_mac_verify_setup()
+ * before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[in] input         Buffer containing the message fragment to add to
+ *                          the MAC calculation.
+ * \param input_length      Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_update(psa_mac_operation_t *operation,
+                            const uint8_t *input,
+                            size_t input_length);
+
+/** Finish the calculation of the MAC of a message.
+ *
+ * The application must call psa_mac_sign_setup() before calling this function.
+ * This function calculates the MAC of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_mac_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \warning Applications should not call this function if they expect
+ *          a specific value for the MAC. Call psa_mac_verify_finish() instead.
+ *          Beware that comparing integrity or authenticity data such as
+ *          MAC values with a function such as \c memcmp is risky
+ *          because the time taken by the comparison may leak information
+ *          about the MAC value which could allow an attacker to guess
+ *          a valid MAC and thereby bypass security controls.
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[out] mac          Buffer where the MAC value is to be written.
+ * \param mac_size          Size of the \p mac buffer in bytes.
+ * \param[out] mac_length   On success, the number of bytes
+ *                          that make up the MAC value. This is always
+ *                          #PSA_MAC_LENGTH(\c key_type, \c key_bits, \c alg)
+ *                          where \c key_type and \c key_bits are the type and
+ *                          bit-size respectively of the key and \c alg is the
+ *                          MAC algorithm that is calculated.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active mac sign
+ *         operation).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p mac buffer is too small. You can determine a
+ *         sufficient buffer size by calling PSA_MAC_LENGTH().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_sign_finish(psa_mac_operation_t *operation,
+                                 uint8_t *mac,
+                                 size_t mac_size,
+                                 size_t *mac_length);
+
+/** Finish the calculation of the MAC of a message and compare it with
+ * an expected value.
+ *
+ * The application must call psa_mac_verify_setup() before calling this function.
+ * This function calculates the MAC of the message formed by concatenating
+ * the inputs passed to preceding calls to psa_mac_update(). It then
+ * compares the calculated MAC with the expected MAC passed as a
+ * parameter to this function.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_mac_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual MAC and the expected MAC is performed
+ * in constant time.
+ *
+ * \param[in,out] operation Active MAC operation.
+ * \param[in] mac           Buffer containing the expected MAC value.
+ * \param mac_length        Size of the \p mac buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The expected MAC is identical to the actual MAC of the message.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The MAC of the message was calculated successfully, but it
+ *         differs from the expected MAC.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active mac verify
+ *         operation).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_verify_finish(psa_mac_operation_t *operation,
+                                   const uint8_t *mac,
+                                   size_t mac_length);
+
+/** Abort a MAC operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_mac_sign_setup() or psa_mac_verify_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized by one of the methods described in #psa_mac_operation_t.
+ *
+ * In particular, calling psa_mac_abort() after the operation has been
+ * terminated by a call to psa_mac_abort(), psa_mac_sign_finish() or
+ * psa_mac_verify_finish() is safe and has no effect.
+ *
+ * \param[in,out] operation Initialized MAC operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_mac_abort(psa_mac_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup cipher Symmetric ciphers
+ * @{
+ */
+
+/** Encrypt a message using a symmetric cipher.
+ *
+ * This function encrypts a message with a random IV (initialization
+ * vector). Use the multipart operation interface with a
+ * #psa_cipher_operation_t object to provide other forms of IV.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must allow the usage #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param[in] input             Buffer containing the message to encrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ *                              The output contains the IV followed by
+ *                              the ciphertext proper.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_encrypt(mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg,
+                                const uint8_t *input,
+                                size_t input_length,
+                                uint8_t *output,
+                                size_t output_size,
+                                size_t *output_length);
+
+/** Decrypt a message using a symmetric cipher.
+ *
+ * This function decrypts a message encrypted with a symmetric cipher.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param[in] input             Buffer containing the message to decrypt.
+ *                              This consists of the IV followed by the
+ *                              ciphertext proper.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the plaintext is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_decrypt(mbedtls_svc_key_id_t key,
+                                psa_algorithm_t alg,
+                                const uint8_t *input,
+                                size_t input_length,
+                                uint8_t *output,
+                                size_t output_size,
+                                size_t *output_length);
+
+/** The type of the state data structure for multipart cipher operations.
+ *
+ * Before calling any function on a cipher operation object, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_cipher_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_cipher_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_CIPHER_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_cipher_operation_t operation = PSA_CIPHER_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_cipher_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_cipher_operation_t operation;
+ *   operation = psa_cipher_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_cipher_operation_s psa_cipher_operation_t;
+
+/** \def PSA_CIPHER_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a cipher operation object of
+ * type #psa_cipher_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_CIPHER_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a cipher operation object.
+ */
+static psa_cipher_operation_t psa_cipher_operation_init(void);
+
+/** Set the key for a multipart symmetric encryption operation.
+ *
+ * The sequence of operations to encrypt a message with a symmetric cipher
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_cipher_operation_t, e.g.
+ *    #PSA_CIPHER_OPERATION_INIT.
+ * -# Call psa_cipher_encrypt_setup() to specify the algorithm and key.
+ * -# Call either psa_cipher_generate_iv() or psa_cipher_set_iv() to
+ *    generate or set the IV (initialization vector). You should use
+ *    psa_cipher_generate_iv() unless the protocol you are implementing
+ *    requires a specific IV value.
+ * -# Call psa_cipher_update() zero, one or more times, passing a fragment
+ *    of the message each time.
+ * -# Call psa_cipher_finish().
+ *
+ * If an error occurs at any step after a call to psa_cipher_encrypt_setup(),
+ * the operation will need to be reset by a call to psa_cipher_abort(). The
+ * application may call psa_cipher_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_cipher_encrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_cipher_finish().
+ * - A call to psa_cipher_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_cipher_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_encrypt_setup(psa_cipher_operation_t *operation,
+                                      mbedtls_svc_key_id_t key,
+                                      psa_algorithm_t alg);
+
+/** Set the key for a multipart symmetric decryption operation.
+ *
+ * The sequence of operations to decrypt a message with a symmetric cipher
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_cipher_operation_t, e.g.
+ *    #PSA_CIPHER_OPERATION_INIT.
+ * -# Call psa_cipher_decrypt_setup() to specify the algorithm and key.
+ * -# Call psa_cipher_set_iv() with the IV (initialization vector) for the
+ *    decryption. If the IV is prepended to the ciphertext, you can call
+ *    psa_cipher_update() on a buffer containing the IV followed by the
+ *    beginning of the message.
+ * -# Call psa_cipher_update() zero, one or more times, passing a fragment
+ *    of the message each time.
+ * -# Call psa_cipher_finish().
+ *
+ * If an error occurs at any step after a call to psa_cipher_decrypt_setup(),
+ * the operation will need to be reset by a call to psa_cipher_abort(). The
+ * application may call psa_cipher_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_cipher_decrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_cipher_finish().
+ * - A call to psa_cipher_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_cipher_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The cipher algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not a cipher algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_decrypt_setup(psa_cipher_operation_t *operation,
+                                      mbedtls_svc_key_id_t key,
+                                      psa_algorithm_t alg);
+
+/** Generate an IV for a symmetric encryption operation.
+ *
+ * This function generates a random IV (initialization vector), nonce
+ * or initial counter value for the encryption operation as appropriate
+ * for the chosen algorithm, key type and key size.
+ *
+ * The application must call psa_cipher_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[out] iv               Buffer where the generated IV is to be written.
+ * \param iv_size               Size of the \p iv buffer in bytes.
+ * \param[out] iv_length        On success, the number of bytes of the
+ *                              generated IV.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with no IV set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p iv buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_generate_iv(psa_cipher_operation_t *operation,
+                                    uint8_t *iv,
+                                    size_t iv_size,
+                                    size_t *iv_length);
+
+/** Set the IV for a symmetric encryption or decryption operation.
+ *
+ * This function sets the IV (initialization vector), nonce
+ * or initial counter value for the encryption or decryption operation.
+ *
+ * The application must call psa_cipher_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \note When encrypting, applications should use psa_cipher_generate_iv()
+ * instead of this function, unless implementing a protocol that requires
+ * a non-random IV.
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[in] iv                Buffer containing the IV to use.
+ * \param iv_length             Size of the IV in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active cipher
+ *         encrypt operation, with no IV set).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size of \p iv is not acceptable for the chosen algorithm,
+ *         or the chosen algorithm does not use an IV.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_set_iv(psa_cipher_operation_t *operation,
+                               const uint8_t *iv,
+                               size_t iv_length);
+
+/** Encrypt or decrypt a message fragment in an active cipher operation.
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_cipher_encrypt_setup() or psa_cipher_decrypt_setup().
+ *    The choice of setup function determines whether this function
+ *    encrypts or decrypts its input.
+ * 2. If the algorithm requires an IV, call psa_cipher_generate_iv()
+ *    (recommended when encrypting) or psa_cipher_set_iv().
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[in] input             Buffer containing the message fragment to
+ *                              encrypt or decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with an IV set
+ *         if required for the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_update(psa_cipher_operation_t *operation,
+                               const uint8_t *input,
+                               size_t input_length,
+                               uint8_t *output,
+                               size_t output_size,
+                               size_t *output_length);
+
+/** Finish encrypting or decrypting a message in a cipher operation.
+ *
+ * The application must call psa_cipher_encrypt_setup() or
+ * psa_cipher_decrypt_setup() before calling this function. The choice
+ * of setup function determines whether this function encrypts or
+ * decrypts its input.
+ *
+ * This function finishes the encryption or decryption of the message
+ * formed by concatenating the inputs passed to preceding calls to
+ * psa_cipher_update().
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_cipher_abort().
+ *
+ * \param[in,out] operation     Active cipher operation.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input size passed to this operation is not valid for
+ *         this particular algorithm. For example, the algorithm is a based
+ *         on block cipher and requires a whole number of blocks, but the
+ *         total input size is not a multiple of the block size.
+ * \retval #PSA_ERROR_INVALID_PADDING
+ *         This is a decryption operation for an algorithm that includes
+ *         padding, and the ciphertext does not contain valid padding.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with an IV set
+ *         if required for the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_finish(psa_cipher_operation_t *operation,
+                               uint8_t *output,
+                               size_t output_size,
+                               size_t *output_length);
+
+/** Abort a cipher operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_cipher_encrypt_setup() or psa_cipher_decrypt_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized as described in #psa_cipher_operation_t.
+ *
+ * In particular, calling psa_cipher_abort() after the operation has been
+ * terminated by a call to psa_cipher_abort() or psa_cipher_finish()
+ * is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized cipher operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_cipher_abort(psa_cipher_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup aead Authenticated encryption with associated data (AEAD)
+ * @{
+ */
+
+/** Process an authenticated encryption operation.
+ *
+ * \param key                     Identifier of the key to use for the
+ *                                operation. It must allow the usage
+ *                                #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                     The AEAD algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param[in] nonce               Nonce or IV to use.
+ * \param nonce_length            Size of the \p nonce buffer in bytes.
+ * \param[in] additional_data     Additional data that will be authenticated
+ *                                but not encrypted.
+ * \param additional_data_length  Size of \p additional_data in bytes.
+ * \param[in] plaintext           Data that will be authenticated and
+ *                                encrypted.
+ * \param plaintext_length        Size of \p plaintext in bytes.
+ * \param[out] ciphertext         Output buffer for the authenticated and
+ *                                encrypted data. The additional data is not
+ *                                part of this output. For algorithms where the
+ *                                encrypted data and the authentication tag
+ *                                are defined as separate outputs, the
+ *                                authentication tag is appended to the
+ *                                encrypted data.
+ * \param ciphertext_size         Size of the \p ciphertext buffer in bytes.
+ *                                This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\c key_type,
+ *                                  \p alg, \p plaintext_length) where
+ *                                  \c key_type is the type of \p key.
+ *                                - #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p
+ *                                  plaintext_length) evaluates to the maximum
+ *                                  ciphertext size of any supported AEAD
+ *                                  encryption.
+ * \param[out] ciphertext_length  On success, the size of the output
+ *                                in the \p ciphertext buffer.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p ciphertext_size is too small.
+ *         #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\c key_type, \p alg,
+ *         \p plaintext_length) or
+ *         #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p plaintext_length) can be used to
+ *         determine the required buffer size.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_encrypt(mbedtls_svc_key_id_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *nonce,
+                              size_t nonce_length,
+                              const uint8_t *additional_data,
+                              size_t additional_data_length,
+                              const uint8_t *plaintext,
+                              size_t plaintext_length,
+                              uint8_t *ciphertext,
+                              size_t ciphertext_size,
+                              size_t *ciphertext_length);
+
+/** Process an authenticated decryption operation.
+ *
+ * \param key                     Identifier of the key to use for the
+ *                                operation. It must allow the usage
+ *                                #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                     The AEAD algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param[in] nonce               Nonce or IV to use.
+ * \param nonce_length            Size of the \p nonce buffer in bytes.
+ * \param[in] additional_data     Additional data that has been authenticated
+ *                                but not encrypted.
+ * \param additional_data_length  Size of \p additional_data in bytes.
+ * \param[in] ciphertext          Data that has been authenticated and
+ *                                encrypted. For algorithms where the
+ *                                encrypted data and the authentication tag
+ *                                are defined as separate inputs, the buffer
+ *                                must contain the encrypted data followed
+ *                                by the authentication tag.
+ * \param ciphertext_length       Size of \p ciphertext in bytes.
+ * \param[out] plaintext          Output buffer for the decrypted data.
+ * \param plaintext_size          Size of the \p plaintext buffer in bytes.
+ *                                This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\c key_type,
+ *                                  \p alg, \p ciphertext_length) where
+ *                                  \c key_type is the type of \p key.
+ *                                - #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p
+ *                                  ciphertext_length) evaluates to the maximum
+ *                                  plaintext size of any supported AEAD
+ *                                  decryption.
+ * \param[out] plaintext_length   On success, the size of the output
+ *                                in the \p plaintext buffer.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The ciphertext is not authentic.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p plaintext_size is too small.
+ *         #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\c key_type, \p alg,
+ *         \p ciphertext_length) or
+ *         #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p ciphertext_length) can be used
+ *         to determine the required buffer size.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_decrypt(mbedtls_svc_key_id_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *nonce,
+                              size_t nonce_length,
+                              const uint8_t *additional_data,
+                              size_t additional_data_length,
+                              const uint8_t *ciphertext,
+                              size_t ciphertext_length,
+                              uint8_t *plaintext,
+                              size_t plaintext_size,
+                              size_t *plaintext_length);
+
+/** The type of the state data structure for multipart AEAD operations.
+ *
+ * Before calling any function on an AEAD operation object, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_aead_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_aead_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_AEAD_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_aead_operation_t operation = PSA_AEAD_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_aead_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_aead_operation_t operation;
+ *   operation = psa_aead_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation. */
+typedef struct psa_aead_operation_s psa_aead_operation_t;
+
+/** \def PSA_AEAD_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for an AEAD operation object of
+ * type #psa_aead_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_AEAD_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for an AEAD operation object.
+ */
+static psa_aead_operation_t psa_aead_operation_init(void);
+
+/** Set the key for a multipart authenticated encryption operation.
+ *
+ * The sequence of operations to encrypt a message with authentication
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_aead_operation_t, e.g.
+ *    #PSA_AEAD_OPERATION_INIT.
+ * -# Call psa_aead_encrypt_setup() to specify the algorithm and key.
+ * -# If needed, call psa_aead_set_lengths() to specify the length of the
+ *    inputs to the subsequent calls to psa_aead_update_ad() and
+ *    psa_aead_update(). See the documentation of psa_aead_set_lengths()
+ *    for details.
+ * -# Call either psa_aead_generate_nonce() or psa_aead_set_nonce() to
+ *    generate or set the nonce. You should use
+ *    psa_aead_generate_nonce() unless the protocol you are implementing
+ *    requires a specific nonce value.
+ * -# Call psa_aead_update_ad() zero, one or more times, passing a fragment
+ *    of the non-encrypted additional authenticated data each time.
+ * -# Call psa_aead_update() zero, one or more times, passing a fragment
+ *    of the message to encrypt each time.
+ * -# Call psa_aead_finish().
+ *
+ * If an error occurs at any step after a call to psa_aead_encrypt_setup(),
+ * the operation will need to be reset by a call to psa_aead_abort(). The
+ * application may call psa_aead_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_aead_encrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_aead_finish().
+ * - A call to psa_aead_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_aead_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   The AEAD algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_encrypt_setup(psa_aead_operation_t *operation,
+                                    mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg);
+
+/** Set the key for a multipart authenticated decryption operation.
+ *
+ * The sequence of operations to decrypt a message with authentication
+ * is as follows:
+ * -# Allocate an operation object which will be passed to all the functions
+ *    listed here.
+ * -# Initialize the operation object with one of the methods described in the
+ *    documentation for #psa_aead_operation_t, e.g.
+ *    #PSA_AEAD_OPERATION_INIT.
+ * -# Call psa_aead_decrypt_setup() to specify the algorithm and key.
+ * -# If needed, call psa_aead_set_lengths() to specify the length of the
+ *    inputs to the subsequent calls to psa_aead_update_ad() and
+ *    psa_aead_update(). See the documentation of psa_aead_set_lengths()
+ *    for details.
+ * -# Call psa_aead_set_nonce() with the nonce for the decryption.
+ * -# Call psa_aead_update_ad() zero, one or more times, passing a fragment
+ *    of the non-encrypted additional authenticated data each time.
+ * -# Call psa_aead_update() zero, one or more times, passing a fragment
+ *    of the ciphertext to decrypt each time.
+ * -# Call psa_aead_verify().
+ *
+ * If an error occurs at any step after a call to psa_aead_decrypt_setup(),
+ * the operation will need to be reset by a call to psa_aead_abort(). The
+ * application may call psa_aead_abort() at any time after the operation
+ * has been initialized.
+ *
+ * After a successful call to psa_aead_decrypt_setup(), the application must
+ * eventually terminate the operation. The following events terminate an
+ * operation:
+ * - A successful call to psa_aead_verify().
+ * - A call to psa_aead_abort().
+ *
+ * \param[in,out] operation     The operation object to set up. It must have
+ *                              been initialized as per the documentation for
+ *                              #psa_aead_operation_t and not yet in use.
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must remain valid until the operation
+ *                              terminates. It must allow the usage
+ *                              #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   The AEAD algorithm to compute
+ *                              (\c PSA_ALG_XXX value such that
+ *                              #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not compatible with \p alg.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not supported or is not an AEAD algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_decrypt_setup(psa_aead_operation_t *operation,
+                                    mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg);
+
+/** Generate a random nonce for an authenticated encryption operation.
+ *
+ * This function generates a random nonce for the authenticated encryption
+ * operation with an appropriate size for the chosen algorithm, key type
+ * and key size.
+ *
+ * The application must call psa_aead_encrypt_setup() before
+ * calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] nonce            Buffer where the generated nonce is to be
+ *                              written.
+ * \param nonce_size            Size of the \p nonce buffer in bytes.
+ * \param[out] nonce_length     On success, the number of bytes of the
+ *                              generated nonce.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active aead encrypt
+ *         operation, with no nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p nonce buffer is too small.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_generate_nonce(psa_aead_operation_t *operation,
+                                     uint8_t *nonce,
+                                     size_t nonce_size,
+                                     size_t *nonce_length);
+
+/** Set the nonce for an authenticated encryption or decryption operation.
+ *
+ * This function sets the nonce for the authenticated
+ * encryption or decryption operation.
+ *
+ * The application must call psa_aead_encrypt_setup() or
+ * psa_aead_decrypt_setup() before calling this function.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \note When encrypting, applications should use psa_aead_generate_nonce()
+ * instead of this function, unless implementing a protocol that requires
+ * a non-random IV.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] nonce             Buffer containing the nonce to use.
+ * \param nonce_length          Size of the nonce in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, with no nonce
+ *         set).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The size of \p nonce is not acceptable for the chosen algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_set_nonce(psa_aead_operation_t *operation,
+                                const uint8_t *nonce,
+                                size_t nonce_length);
+
+/** Declare the lengths of the message and additional data for AEAD.
+ *
+ * The application must call this function before calling
+ * psa_aead_update_ad() or psa_aead_update() if the algorithm for
+ * the operation requires it. If the algorithm does not require it,
+ * calling this function is optional, but if this function is called
+ * then the implementation must enforce the lengths.
+ *
+ * You may call this function before or after setting the nonce with
+ * psa_aead_set_nonce() or psa_aead_generate_nonce().
+ *
+ * - For #PSA_ALG_CCM, calling this function is required.
+ * - For the other AEAD algorithms defined in this specification, calling
+ *   this function is not required.
+ * - For vendor-defined algorithm, refer to the vendor documentation.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param ad_length             Size of the non-encrypted additional
+ *                              authenticated data in bytes.
+ * \param plaintext_length      Size of the plaintext to encrypt in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, and
+ *         psa_aead_update_ad() and psa_aead_update() must not have been
+ *         called yet).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         At least one of the lengths is not acceptable for the chosen
+ *         algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_set_lengths(psa_aead_operation_t *operation,
+                                  size_t ad_length,
+                                  size_t plaintext_length);
+
+/** Pass additional data to an active AEAD operation.
+ *
+ * Additional data is authenticated, but not encrypted.
+ *
+ * You may call this function multiple times to pass successive fragments
+ * of the additional data. You may not call this function after passing
+ * data to encrypt or decrypt with psa_aead_update().
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_aead_encrypt_setup() or psa_aead_decrypt_setup().
+ * 2. Set the nonce with psa_aead_generate_nonce() or psa_aead_set_nonce().
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \warning When decrypting, until psa_aead_verify() has returned #PSA_SUCCESS,
+ *          there is no guarantee that the input is valid. Therefore, until
+ *          you have called psa_aead_verify() and it has returned #PSA_SUCCESS,
+ *          treat the input as untrusted and prepare to undo any action that
+ *          depends on the input if psa_aead_verify() returns an error status.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] input             Buffer containing the fragment of
+ *                              additional data.
+ * \param input_length          Size of the \p input buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, have a nonce
+ *         set, have lengths set if required by the algorithm, and
+ *         psa_aead_update() must not have been called yet).
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input length overflows the additional data length that
+ *         was previously specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_update_ad(psa_aead_operation_t *operation,
+                                const uint8_t *input,
+                                size_t input_length);
+
+/** Encrypt or decrypt a message fragment in an active AEAD operation.
+ *
+ * Before calling this function, you must:
+ * 1. Call either psa_aead_encrypt_setup() or psa_aead_decrypt_setup().
+ *    The choice of setup function determines whether this function
+ *    encrypts or decrypts its input.
+ * 2. Set the nonce with psa_aead_generate_nonce() or psa_aead_set_nonce().
+ * 3. Call psa_aead_update_ad() to pass all the additional data.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \warning When decrypting, until psa_aead_verify() has returned #PSA_SUCCESS,
+ *          there is no guarantee that the input is valid. Therefore, until
+ *          you have called psa_aead_verify() and it has returned #PSA_SUCCESS:
+ *          - Do not use the output in any way other than storing it in a
+ *            confidential location. If you take any action that depends
+ *            on the tentative decrypted data, this action will need to be
+ *            undone if the input turns out not to be valid. Furthermore,
+ *            if an adversary can observe that this action took place
+ *            (for example through timing), they may be able to use this
+ *            fact as an oracle to decrypt any message encrypted with the
+ *            same key.
+ *          - In particular, do not copy the output anywhere but to a
+ *            memory or storage space that you have exclusive access to.
+ *
+ * This function does not require the input to be aligned to any
+ * particular block boundary. If the implementation can only process
+ * a whole block at a time, it must consume all the input provided, but
+ * it may delay the end of the corresponding output until a subsequent
+ * call to psa_aead_update(), psa_aead_finish() or psa_aead_verify()
+ * provides sufficient input. The amount of data that can be delayed
+ * in this way is bounded by #PSA_AEAD_UPDATE_OUTPUT_SIZE.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[in] input             Buffer containing the message fragment to
+ *                              encrypt or decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[out] output           Buffer where the output is to be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                                algorithm and key:
+ *                                - A sufficient output size is
+ *                                  #PSA_AEAD_UPDATE_OUTPUT_SIZE(\c key_type,
+ *                                  \c alg, \p input_length) where
+ *                                  \c key_type is the type of key and \c alg is
+ *                                  the algorithm that were used to set up the
+ *                                  operation.
+ *                                - #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p
+ *                                  input_length) evaluates to the maximum
+ *                                  output size of any supported AEAD
+ *                                  algorithm.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active, have a nonce
+ *         set, and have lengths set if required by the algorithm).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small.
+ *         #PSA_AEAD_UPDATE_OUTPUT_SIZE(\c key_type, \c alg, \p input_length) or
+ *         #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p input_length) can be used to
+ *         determine the required buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total input length overflows the plaintext length that
+ *         was previously specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_update(psa_aead_operation_t *operation,
+                             const uint8_t *input,
+                             size_t input_length,
+                             uint8_t *output,
+                             size_t output_size,
+                             size_t *output_length);
+
+/** Finish encrypting a message in an AEAD operation.
+ *
+ * The operation must have been set up with psa_aead_encrypt_setup().
+ *
+ * This function finishes the authentication of the additional data
+ * formed by concatenating the inputs passed to preceding calls to
+ * psa_aead_update_ad() with the plaintext formed by concatenating the
+ * inputs passed to preceding calls to psa_aead_update().
+ *
+ * This function has two output buffers:
+ * - \p ciphertext contains trailing ciphertext that was buffered from
+ *   preceding calls to psa_aead_update().
+ * - \p tag contains the authentication tag.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] ciphertext       Buffer where the last part of the ciphertext
+ *                              is to be written.
+ * \param ciphertext_size       Size of the \p ciphertext buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - A sufficient output size is
+ *                                #PSA_AEAD_FINISH_OUTPUT_SIZE(\c key_type,
+ *                                \c alg) where \c key_type is the type of key
+ *                                and \c alg is the algorithm that were used to
+ *                                set up the operation.
+ *                              - #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE evaluates to
+ *                                the maximum output size of any supported AEAD
+ *                                algorithm.
+ * \param[out] ciphertext_length On success, the number of bytes of
+ *                              returned ciphertext.
+ * \param[out] tag              Buffer where the authentication tag is
+ *                              to be written.
+ * \param tag_size              Size of the \p tag buffer in bytes.
+ *                              This must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - The exact tag size is #PSA_AEAD_TAG_LENGTH(\c
+ *                                key_type, \c key_bits, \c alg) where
+ *                                \c key_type and \c key_bits are the type and
+ *                                bit-size of the key, and \c alg is the
+ *                                algorithm that were used in the call to
+ *                                psa_aead_encrypt_setup().
+ *                              - #PSA_AEAD_TAG_MAX_SIZE evaluates to the
+ *                                maximum tag size of any supported AEAD
+ *                                algorithm.
+ * \param[out] tag_length       On success, the number of bytes
+ *                              that make up the returned tag.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active encryption
+ *         operation with a nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p ciphertext or \p tag buffer is too small.
+ *         #PSA_AEAD_FINISH_OUTPUT_SIZE(\c key_type, \c alg) or
+ *         #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE can be used to determine the
+ *         required \p ciphertext buffer size. #PSA_AEAD_TAG_LENGTH(\c key_type,
+ *         \c key_bits, \c alg) or #PSA_AEAD_TAG_MAX_SIZE can be used to
+ *         determine the required \p tag buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update() so far is
+ *         less than the plaintext length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_finish(psa_aead_operation_t *operation,
+                             uint8_t *ciphertext,
+                             size_t ciphertext_size,
+                             size_t *ciphertext_length,
+                             uint8_t *tag,
+                             size_t tag_size,
+                             size_t *tag_length);
+
+/** Finish authenticating and decrypting a message in an AEAD operation.
+ *
+ * The operation must have been set up with psa_aead_decrypt_setup().
+ *
+ * This function finishes the authenticated decryption of the message
+ * components:
+ *
+ * -  The additional data consisting of the concatenation of the inputs
+ *    passed to preceding calls to psa_aead_update_ad().
+ * -  The ciphertext consisting of the concatenation of the inputs passed to
+ *    preceding calls to psa_aead_update().
+ * -  The tag passed to this function call.
+ *
+ * If the authentication tag is correct, this function outputs any remaining
+ * plaintext and reports success. If the authentication tag is not correct,
+ * this function returns #PSA_ERROR_INVALID_SIGNATURE.
+ *
+ * When this function returns successfuly, the operation becomes inactive.
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_aead_abort().
+ *
+ * \note Implementations shall make the best effort to ensure that the
+ * comparison between the actual tag and the expected tag is performed
+ * in constant time.
+ *
+ * \param[in,out] operation     Active AEAD operation.
+ * \param[out] plaintext        Buffer where the last part of the plaintext
+ *                              is to be written. This is the remaining data
+ *                              from previous calls to psa_aead_update()
+ *                              that could not be processed until the end
+ *                              of the input.
+ * \param plaintext_size        Size of the \p plaintext buffer in bytes.
+ *                              This must be appropriate for the selected algorithm and key:
+ *                              - A sufficient output size is
+ *                                #PSA_AEAD_VERIFY_OUTPUT_SIZE(\c key_type,
+ *                                \c alg) where \c key_type is the type of key
+ *                                and \c alg is the algorithm that were used to
+ *                                set up the operation.
+ *                              - #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE evaluates to
+ *                                the maximum output size of any supported AEAD
+ *                                algorithm.
+ * \param[out] plaintext_length On success, the number of bytes of
+ *                              returned plaintext.
+ * \param[in] tag               Buffer containing the authentication tag.
+ * \param tag_length            Size of the \p tag buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculations were successful, but the authentication tag is
+ *         not correct.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be an active decryption
+ *         operation with a nonce set).
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p plaintext buffer is too small.
+ *         #PSA_AEAD_VERIFY_OUTPUT_SIZE(\c key_type, \c alg) or
+ *         #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE can be used to determine the
+ *         required buffer size.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update_ad() so far is
+ *         less than the additional data length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The total length of input to psa_aead_update() so far is
+ *         less than the plaintext length that was previously
+ *         specified with psa_aead_set_lengths().
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_verify(psa_aead_operation_t *operation,
+                             uint8_t *plaintext,
+                             size_t plaintext_size,
+                             size_t *plaintext_length,
+                             const uint8_t *tag,
+                             size_t tag_length);
+
+/** Abort an AEAD operation.
+ *
+ * Aborting an operation frees all associated resources except for the
+ * \p operation structure itself. Once aborted, the operation object
+ * can be reused for another operation by calling
+ * psa_aead_encrypt_setup() or psa_aead_decrypt_setup() again.
+ *
+ * You may call this function any time after the operation object has
+ * been initialized as described in #psa_aead_operation_t.
+ *
+ * In particular, calling psa_aead_abort() after the operation has been
+ * terminated by a call to psa_aead_abort(), psa_aead_finish() or
+ * psa_aead_verify() is safe and has no effect.
+ *
+ * \param[in,out] operation     Initialized AEAD operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_aead_abort(psa_aead_operation_t *operation);
+
+/**@}*/
+
+/** \defgroup asymmetric Asymmetric cryptography
+ * @{
+ */
+
+/**
+ * \brief Sign a message with a private key. For hash-and-sign algorithms,
+ *        this includes the hashing step.
+ *
+ * \note To perform a multi-part hash-and-sign signature algorithm, first use
+ *       a multi-part hash operation and then pass the resulting hash to
+ *       psa_sign_hash(). PSA_ALG_GET_HASH(\p alg) can be used to determine the
+ *       hash algorithm to use.
+ *
+ * \param[in]  key              Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. The key must
+ *                              allow the usage #PSA_KEY_USAGE_SIGN_MESSAGE.
+ * \param[in]  alg              An asymmetric signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_MESSAGE(\p alg)
+ *                              is true), that is compatible with the type of
+ *                              \p key.
+ * \param[in]  input            The input message to sign.
+ * \param[in]  input_length     Size of the \p input buffer in bytes.
+ * \param[out] signature        Buffer where the signature is to be written.
+ * \param[in]  signature_size   Size of the \p signature buffer in bytes. This
+ *                              must be appropriate for the selected
+ *                              algorithm and key:
+ *                              - The required signature size is
+ *                                #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *                                where \c key_type and \c key_bits are the type and
+ *                                bit-size respectively of key.
+ *                              - #PSA_SIGNATURE_MAX_SIZE evaluates to the
+ *                                maximum signature size of any supported
+ *                                signature algorithm.
+ * \param[out] signature_length On success, the number of bytes that make up
+ *                              the returned signature value.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_SIGN_MESSAGE flag,
+ *         or it does not permit the requested algorithm.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p signature buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_sign_message( mbedtls_svc_key_id_t key,
+                               psa_algorithm_t alg,
+                               const uint8_t * input,
+                               size_t input_length,
+                               uint8_t * signature,
+                               size_t signature_size,
+                               size_t * signature_length );
+
+/** \brief Verify the signature of a message with a public key, using
+ *         a hash-and-sign verification algorithm.
+ *
+ * \note To perform a multi-part hash-and-sign signature verification
+ *       algorithm, first use a multi-part hash operation to hash the message
+ *       and then pass the resulting hash to psa_verify_hash().
+ *       PSA_ALG_GET_HASH(\p alg) can be used to determine the hash algorithm
+ *       to use.
+ *
+ * \param[in]  key              Identifier of the key to use for the operation.
+ *                              It must be a public key or an asymmetric key
+ *                              pair. The key must allow the usage
+ *                              #PSA_KEY_USAGE_VERIFY_MESSAGE.
+ * \param[in]  alg              An asymmetric signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_MESSAGE(\p alg)
+ *                              is true), that is compatible with the type of
+ *                              \p key.
+ * \param[in]  input            The message whose signature is to be verified.
+ * \param[in]  input_length     Size of the \p input buffer in bytes.
+ * \param[out] signature        Buffer containing the signature to verify.
+ * \param[in]  signature_length Size of the \p signature buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The key does not have the #PSA_KEY_USAGE_SIGN_MESSAGE flag,
+ *         or it does not permit the requested algorithm.
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculation was performed successfully, but the passed signature
+ *         is not a valid signature.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_verify_message( mbedtls_svc_key_id_t key,
+                                 psa_algorithm_t alg,
+                                 const uint8_t * input,
+                                 size_t input_length,
+                                 const uint8_t * signature,
+                                 size_t signature_length );
+
+/**
+ * \brief Sign a hash or short message with a private key.
+ *
+ * Note that to perform a hash-and-sign signature algorithm, you must
+ * first calculate the hash by calling psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(), or alternatively by calling psa_hash_compute().
+ * Then pass the resulting hash as the \p hash
+ * parameter to this function. You can use #PSA_ALG_SIGN_GET_HASH(\p alg)
+ * to determine the hash algorithm to use.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. The key must
+ *                              allow the usage #PSA_KEY_USAGE_SIGN_HASH.
+ * \param alg                   A signature algorithm (PSA_ALG_XXX
+ *                              value such that #PSA_ALG_IS_SIGN_HASH(\p alg)
+ *                              is true), that is compatible with
+ *                              the type of \p key.
+ * \param[in] hash              The hash or message to sign.
+ * \param hash_length           Size of the \p hash buffer in bytes.
+ * \param[out] signature        Buffer where the signature is to be written.
+ * \param signature_size        Size of the \p signature buffer in bytes.
+ * \param[out] signature_length On success, the number of bytes
+ *                              that make up the returned signature value.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p signature buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_SIGN_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_sign_hash(mbedtls_svc_key_id_t key,
+                           psa_algorithm_t alg,
+                           const uint8_t *hash,
+                           size_t hash_length,
+                           uint8_t *signature,
+                           size_t signature_size,
+                           size_t *signature_length);
+
+/**
+ * \brief Verify the signature of a hash or short message using a public key.
+ *
+ * Note that to perform a hash-and-sign signature algorithm, you must
+ * first calculate the hash by calling psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(), or alternatively by calling psa_hash_compute().
+ * Then pass the resulting hash as the \p hash
+ * parameter to this function. You can use #PSA_ALG_SIGN_GET_HASH(\p alg)
+ * to determine the hash algorithm to use.
+ *
+ * \param key               Identifier of the key to use for the operation. It
+ *                          must be a public key or an asymmetric key pair. The
+ *                          key must allow the usage
+ *                          #PSA_KEY_USAGE_VERIFY_HASH.
+ * \param alg               A signature algorithm (PSA_ALG_XXX
+ *                          value such that #PSA_ALG_IS_SIGN_HASH(\p alg)
+ *                          is true), that is compatible with
+ *                          the type of \p key.
+ * \param[in] hash          The hash or message whose signature is to be
+ *                          verified.
+ * \param hash_length       Size of the \p hash buffer in bytes.
+ * \param[in] signature     Buffer containing the signature to verify.
+ * \param signature_length  Size of the \p signature buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         The signature is valid.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The calculation was perfomed successfully, but the passed
+ *         signature is not a valid signature.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_verify_hash(mbedtls_svc_key_id_t key,
+                             psa_algorithm_t alg,
+                             const uint8_t *hash,
+                             size_t hash_length,
+                             const uint8_t *signature,
+                             size_t signature_length);
+
+/**
+ * \brief Encrypt a short message with a public key.
+ *
+ * \param key                   Identifer of the key to use for the operation.
+ *                              It must be a public key or an asymmetric key
+ *                              pair. It must allow the usage
+ *                              #PSA_KEY_USAGE_ENCRYPT.
+ * \param alg                   An asymmetric encryption algorithm that is
+ *                              compatible with the type of \p key.
+ * \param[in] input             The message to encrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[in] salt              A salt or label, if supported by the
+ *                              encryption algorithm.
+ *                              If the algorithm does not support a
+ *                              salt, pass \c NULL.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass \c NULL.
+ *
+ *                              - For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                                supported.
+ * \param salt_length           Size of the \p salt buffer in bytes.
+ *                              If \p salt is \c NULL, pass 0.
+ * \param[out] output           Buffer where the encrypted message is to
+ *                              be written.
+ * \param output_size           Size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_asymmetric_encrypt(mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg,
+                                    const uint8_t *input,
+                                    size_t input_length,
+                                    const uint8_t *salt,
+                                    size_t salt_length,
+                                    uint8_t *output,
+                                    size_t output_size,
+                                    size_t *output_length);
+
+/**
+ * \brief Decrypt a short message with a private key.
+ *
+ * \param key                   Identifier of the key to use for the operation.
+ *                              It must be an asymmetric key pair. It must
+ *                              allow the usage #PSA_KEY_USAGE_DECRYPT.
+ * \param alg                   An asymmetric encryption algorithm that is
+ *                              compatible with the type of \p key.
+ * \param[in] input             The message to decrypt.
+ * \param input_length          Size of the \p input buffer in bytes.
+ * \param[in] salt              A salt or label, if supported by the
+ *                              encryption algorithm.
+ *                              If the algorithm does not support a
+ *                              salt, pass \c NULL.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass \c NULL.
+ *
+ *                              - For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                                supported.
+ * \param salt_length           Size of the \p salt buffer in bytes.
+ *                              If \p salt is \c NULL, pass 0.
+ * \param[out] output           Buffer where the decrypted message is to
+ *                              be written.
+ * \param output_size           Size of the \c output buffer in bytes.
+ * \param[out] output_length    On success, the number of bytes
+ *                              that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         The size of the \p output buffer is too small. You can
+ *         determine a sufficient buffer size by calling
+ *         #PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(\c key_type, \c key_bits, \p alg)
+ *         where \c key_type and \c key_bits are the type and bit-size
+ *         respectively of \p key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_INVALID_PADDING
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_asymmetric_decrypt(mbedtls_svc_key_id_t key,
+                                    psa_algorithm_t alg,
+                                    const uint8_t *input,
+                                    size_t input_length,
+                                    const uint8_t *salt,
+                                    size_t salt_length,
+                                    uint8_t *output,
+                                    size_t output_size,
+                                    size_t *output_length);
+
+/**@}*/
+
+/** \defgroup key_derivation Key derivation and pseudorandom generation
+ * @{
+ */
+
+/** The type of the state data structure for key derivation operations.
+ *
+ * Before calling any function on a key derivation operation object, the
+ * application must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation;
+ *   memset(&operation, 0, sizeof(operation));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_KEY_DERIVATION_OPERATION_INIT,
+ *   for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation = PSA_KEY_DERIVATION_OPERATION_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_key_derivation_operation_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_key_derivation_operation_t operation;
+ *   operation = psa_key_derivation_operation_init();
+ *   \endcode
+ *
+ * This is an implementation-defined \c struct. Applications should not
+ * make any assumptions about the content of this structure except
+ * as directed by the documentation of a specific implementation.
+ */
+typedef struct psa_key_derivation_s psa_key_derivation_operation_t;
+
+/** \def PSA_KEY_DERIVATION_OPERATION_INIT
+ *
+ * This macro returns a suitable initializer for a key derivation operation
+ * object of type #psa_key_derivation_operation_t.
+ */
+#ifdef __DOXYGEN_ONLY__
+/* This is an example definition for documentation purposes.
+ * Implementations should define a suitable value in `crypto_struct.h`.
+ */
+#define PSA_KEY_DERIVATION_OPERATION_INIT {0}
+#endif
+
+/** Return an initial value for a key derivation operation object.
+ */
+static psa_key_derivation_operation_t psa_key_derivation_operation_init(void);
+
+/** Set up a key derivation operation.
+ *
+ * A key derivation algorithm takes some inputs and uses them to generate
+ * a byte stream in a deterministic way.
+ * This byte stream can be used to produce keys and other
+ * cryptographic material.
+ *
+ * To derive a key:
+ * -# Start with an initialized object of type #psa_key_derivation_operation_t.
+ * -# Call psa_key_derivation_setup() to select the algorithm.
+ * -# Provide the inputs for the key derivation by calling
+ *    psa_key_derivation_input_bytes() or psa_key_derivation_input_key()
+ *    as appropriate. Which inputs are needed, in what order, and whether
+ *    they may be keys and if so of what type depends on the algorithm.
+ * -# Optionally set the operation's maximum capacity with
+ *    psa_key_derivation_set_capacity(). You may do this before, in the middle
+ *    of or after providing inputs. For some algorithms, this step is mandatory
+ *    because the output depends on the maximum capacity.
+ * -# To derive a key, call psa_key_derivation_output_key().
+ *    To derive a byte string for a different purpose, call
+ *    psa_key_derivation_output_bytes().
+ *    Successive calls to these functions use successive output bytes
+ *    calculated by the key derivation algorithm.
+ * -# Clean up the key derivation operation object with
+ *    psa_key_derivation_abort().
+ *
+ * If this function returns an error, the key derivation operation object is
+ * not changed.
+ *
+ * If an error occurs at any step after a call to psa_key_derivation_setup(),
+ * the operation will need to be reset by a call to psa_key_derivation_abort().
+ *
+ * Implementations must reject an attempt to derive a key of size 0.
+ *
+ * \param[in,out] operation       The key derivation operation object
+ *                                to set up. It must
+ *                                have been initialized but not set up yet.
+ * \param alg                     The key derivation algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_KEY_DERIVATION(\p alg) is true).
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c alg is not a key derivation algorithm.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a key derivation algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be inactive).
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_setup(
+    psa_key_derivation_operation_t *operation,
+    psa_algorithm_t alg);
+
+/** Retrieve the current capacity of a key derivation operation.
+ *
+ * The capacity of a key derivation is the maximum number of bytes that it can
+ * return. When you get *N* bytes of output from a key derivation operation,
+ * this reduces its capacity by *N*.
+ *
+ * \param[in] operation     The operation to query.
+ * \param[out] capacity     On success, the capacity of the operation.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_get_capacity(
+    const psa_key_derivation_operation_t *operation,
+    size_t *capacity);
+
+/** Set the maximum capacity of a key derivation operation.
+ *
+ * The capacity of a key derivation operation is the maximum number of bytes
+ * that the key derivation operation can return from this point onwards.
+ *
+ * \param[in,out] operation The key derivation operation object to modify.
+ * \param capacity          The new capacity of the operation.
+ *                          It must be less or equal to the operation's
+ *                          current capacity.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p capacity is larger than the operation's current capacity.
+ *         In this case, the operation object remains valid and its capacity
+ *         remains unchanged.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active).
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_set_capacity(
+    psa_key_derivation_operation_t *operation,
+    size_t capacity);
+
+/** Use the maximum possible capacity for a key derivation operation.
+ *
+ * Use this value as the capacity argument when setting up a key derivation
+ * to indicate that the operation should have the maximum possible capacity.
+ * The value of the maximum possible capacity depends on the key derivation
+ * algorithm.
+ */
+#define PSA_KEY_DERIVATION_UNLIMITED_CAPACITY ((size_t)(-1))
+
+/** Provide an input for key derivation or key agreement.
+ *
+ * Which inputs are required and in what order depends on the algorithm.
+ * Refer to the documentation of each key derivation or key agreement
+ * algorithm for information.
+ *
+ * This function passes direct inputs, which is usually correct for
+ * non-secret inputs. To pass a secret input, which should be in a key
+ * object, call psa_key_derivation_input_key() instead of this function.
+ * Refer to the documentation of individual step types
+ * (`PSA_KEY_DERIVATION_INPUT_xxx` values of type ::psa_key_derivation_step_t)
+ * for more information.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() and must not
+ *                                have produced any output yet.
+ * \param step                    Which step the input data is for.
+ * \param[in] data                Input data to use.
+ * \param data_length             Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step is not compatible with the operation's algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow direct inputs.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this input \p step.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_input_bytes(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    const uint8_t *data,
+    size_t data_length);
+
+/** Provide an input for key derivation in the form of a key.
+ *
+ * Which inputs are required and in what order depends on the algorithm.
+ * Refer to the documentation of each key derivation or key agreement
+ * algorithm for information.
+ *
+ * This function obtains input from a key object, which is usually correct for
+ * secret inputs or for non-secret personalization strings kept in the key
+ * store. To pass a non-secret parameter which is not in the key store,
+ * call psa_key_derivation_input_bytes() instead of this function.
+ * Refer to the documentation of individual step types
+ * (`PSA_KEY_DERIVATION_INPUT_xxx` values of type ::psa_key_derivation_step_t)
+ * for more information.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() and must not
+ *                                have produced any output yet.
+ * \param step                    Which step the input data is for.
+ * \param key                     Identifier of the key. It must have an
+ *                                appropriate type for step and must allow the
+ *                                usage #PSA_KEY_USAGE_DERIVE.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step is not compatible with the operation's algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow key inputs of the given type
+ *         or does not allow key inputs at all.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this input \p step.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_input_key(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    mbedtls_svc_key_id_t key);
+
+/** Perform a key agreement and use the shared secret as input to a key
+ * derivation.
+ *
+ * A key agreement algorithm takes two inputs: a private key \p private_key
+ * a public key \p peer_key.
+ * The result of this function is passed as input to a key derivation.
+ * The output of this key derivation can be extracted by reading from the
+ * resulting operation to produce keys and other cryptographic material.
+ *
+ * If this function returns an error status, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation       The key derivation operation object to use.
+ *                                It must have been set up with
+ *                                psa_key_derivation_setup() with a
+ *                                key agreement and derivation algorithm
+ *                                \c alg (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_KEY_AGREEMENT(\c alg) is true
+ *                                and #PSA_ALG_IS_RAW_KEY_AGREEMENT(\c alg)
+ *                                is false).
+ *                                The operation must be ready for an
+ *                                input of the type given by \p step.
+ * \param step                    Which step the input data is for.
+ * \param private_key             Identifier of the private key to use. It must
+ *                                allow the usage #PSA_KEY_USAGE_DERIVE.
+ * \param[in] peer_key      Public key of the peer. The peer key must be in the
+ *                          same format that psa_import_key() accepts for the
+ *                          public key type corresponding to the type of
+ *                          private_key. That is, this function performs the
+ *                          equivalent of
+ *                          #psa_import_key(...,
+ *                          `peer_key`, `peer_key_length`) where
+ *                          with key attributes indicating the public key
+ *                          type corresponding to the type of `private_key`.
+ *                          For example, for EC keys, this means that peer_key
+ *                          is interpreted as a point on the curve that the
+ *                          private key is on. The standard formats for public
+ *                          keys are documented in the documentation of
+ *                          psa_export_public_key().
+ * \param peer_key_length         Size of \p peer_key in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid for this key agreement \p step.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c private_key is not compatible with \c alg,
+ *         or \p peer_key is not valid for \c alg or not compatible with
+ *         \c private_key.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \c alg is not supported or is not a key derivation algorithm.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \c step does not allow an input resulting from a key agreement.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_key_agreement(
+    psa_key_derivation_operation_t *operation,
+    psa_key_derivation_step_t step,
+    mbedtls_svc_key_id_t private_key,
+    const uint8_t *peer_key,
+    size_t peer_key_length);
+
+/** Read some data from a key derivation operation.
+ *
+ * This function calculates output bytes from a key derivation algorithm and
+ * return those bytes.
+ * If you view the key derivation's output as a stream of bytes, this
+ * function destructively reads the requested number of bytes from the
+ * stream.
+ * The operation's capacity decreases by the number of bytes read.
+ *
+ * If this function returns an error status other than
+ * #PSA_ERROR_INSUFFICIENT_DATA, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * \param[in,out] operation The key derivation operation object to read from.
+ * \param[out] output       Buffer where the output will be written.
+ * \param output_length     Number of bytes to output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INSUFFICIENT_DATA
+ *                          The operation's capacity was less than
+ *                          \p output_length bytes. Note that in this case,
+ *                          no output is written to the output buffer.
+ *                          The operation's capacity is set to 0, thus
+ *                          subsequent calls to this function will not
+ *                          succeed, even with a smaller output buffer.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active and completed
+ *         all required input steps).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_output_bytes(
+    psa_key_derivation_operation_t *operation,
+    uint8_t *output,
+    size_t output_length);
+
+/** Derive a key from an ongoing key derivation operation.
+ *
+ * This function calculates output bytes from a key derivation algorithm
+ * and uses those bytes to generate a key deterministically.
+ * The key's location, usage policy, type and size are taken from
+ * \p attributes.
+ *
+ * If you view the key derivation's output as a stream of bytes, this
+ * function destructively reads as many bytes as required from the
+ * stream.
+ * The operation's capacity decreases by the number of bytes read.
+ *
+ * If this function returns an error status other than
+ * #PSA_ERROR_INSUFFICIENT_DATA, the operation enters an error
+ * state and must be aborted by calling psa_key_derivation_abort().
+ *
+ * How much output is produced and consumed from the operation, and how
+ * the key is derived, depends on the key type and on the key size
+ * (denoted \c bits below):
+ *
+ * - For key types for which the key is an arbitrary sequence of bytes
+ *   of a given size, this function is functionally equivalent to
+ *   calling #psa_key_derivation_output_bytes
+ *   and passing the resulting output to #psa_import_key.
+ *   However, this function has a security benefit:
+ *   if the implementation provides an isolation boundary then
+ *   the key material is not exposed outside the isolation boundary.
+ *   As a consequence, for these key types, this function always consumes
+ *   exactly (\c bits / 8) bytes from the operation.
+ *   The following key types defined in this specification follow this scheme:
+ *
+ *     - #PSA_KEY_TYPE_AES;
+ *     - #PSA_KEY_TYPE_ARC4;
+ *     - #PSA_KEY_TYPE_ARIA;
+ *     - #PSA_KEY_TYPE_CAMELLIA;
+ *     - #PSA_KEY_TYPE_DERIVE;
+ *     - #PSA_KEY_TYPE_HMAC.
+ *
+ * - For ECC keys on a Montgomery elliptic curve
+ *   (#PSA_KEY_TYPE_ECC_KEY_PAIR(\c curve) where \c curve designates a
+ *   Montgomery curve), this function always draws a byte string whose
+ *   length is determined by the curve, and sets the mandatory bits
+ *   accordingly. That is:
+ *
+ *     - Curve25519 (#PSA_ECC_FAMILY_MONTGOMERY, 255 bits): draw a 32-byte
+ *       string and process it as specified in RFC 7748 &sect;5.
+ *     - Curve448 (#PSA_ECC_FAMILY_MONTGOMERY, 448 bits): draw a 56-byte
+ *       string and process it as specified in RFC 7748 &sect;5.
+ *
+ * - For key types for which the key is represented by a single sequence of
+ *   \c bits bits with constraints as to which bit sequences are acceptable,
+ *   this function draws a byte string of length (\c bits / 8) bytes rounded
+ *   up to the nearest whole number of bytes. If the resulting byte string
+ *   is acceptable, it becomes the key, otherwise the drawn bytes are discarded.
+ *   This process is repeated until an acceptable byte string is drawn.
+ *   The byte string drawn from the operation is interpreted as specified
+ *   for the output produced by psa_export_key().
+ *   The following key types defined in this specification follow this scheme:
+ *
+ *     - #PSA_KEY_TYPE_DES.
+ *       Force-set the parity bits, but discard forbidden weak keys.
+ *       For 2-key and 3-key triple-DES, the three keys are generated
+ *       successively (for example, for 3-key triple-DES,
+ *       if the first 8 bytes specify a weak key and the next 8 bytes do not,
+ *       discard the first 8 bytes, use the next 8 bytes as the first key,
+ *       and continue reading output from the operation to derive the other
+ *       two keys).
+ *     - Finite-field Diffie-Hellman keys (#PSA_KEY_TYPE_DH_KEY_PAIR(\c group)
+ *       where \c group designates any Diffie-Hellman group) and
+ *       ECC keys on a Weierstrass elliptic curve
+ *       (#PSA_KEY_TYPE_ECC_KEY_PAIR(\c curve) where \c curve designates a
+ *       Weierstrass curve).
+ *       For these key types, interpret the byte string as integer
+ *       in big-endian order. Discard it if it is not in the range
+ *       [0, *N* - 2] where *N* is the boundary of the private key domain
+ *       (the prime *p* for Diffie-Hellman, the subprime *q* for DSA,
+ *       or the order of the curve's base point for ECC).
+ *       Add 1 to the resulting integer and use this as the private key *x*.
+ *       This method allows compliance to NIST standards, specifically
+ *       the methods titled "key-pair generation by testing candidates"
+ *       in NIST SP 800-56A &sect;5.6.1.1.4 for Diffie-Hellman,
+ *       in FIPS 186-4 &sect;B.1.2 for DSA, and
+ *       in NIST SP 800-56A &sect;5.6.1.2.2 or
+ *       FIPS 186-4 &sect;B.4.2 for elliptic curve keys.
+ *
+ * - For other key types, including #PSA_KEY_TYPE_RSA_KEY_PAIR,
+ *   the way in which the operation output is consumed is
+ *   implementation-defined.
+ *
+ * In all cases, the data that is read is discarded from the operation.
+ * The operation's capacity is decreased by the number of bytes read.
+ *
+ * For algorithms that take an input step #PSA_KEY_DERIVATION_INPUT_SECRET,
+ * the input to that step must be provided with psa_key_derivation_input_key().
+ * Future versions of this specification may include additional restrictions
+ * on the derived key based on the attributes and strength of the secret key.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ * \param[in,out] operation The key derivation operation object to read from.
+ * \param[out] key          On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_INSUFFICIENT_DATA
+ *         There was not enough data to create the desired key.
+ *         Note that in this case, no output is written to the output buffer.
+ *         The operation's capacity is set to 0, thus subsequent calls to
+ *         this function will not succeed, even with a smaller output buffer.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The key type or key size is not supported, either by the
+ *         implementation in general or in this particular location.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The provided key attributes are not valid for the operation.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The #PSA_KEY_DERIVATION_INPUT_SECRET input was not provided through
+ *         a key.
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The operation state is not valid (it must be active and completed
+ *         all required input steps).
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_output_key(
+    const psa_key_attributes_t *attributes,
+    psa_key_derivation_operation_t *operation,
+    mbedtls_svc_key_id_t *key);
+
+/** Abort a key derivation operation.
+ *
+ * Aborting an operation frees all associated resources except for the \c
+ * operation structure itself. Once aborted, the operation object can be reused
+ * for another operation by calling psa_key_derivation_setup() again.
+ *
+ * This function may be called at any time after the operation
+ * object has been initialized as described in #psa_key_derivation_operation_t.
+ *
+ * In particular, it is valid to call psa_key_derivation_abort() twice, or to
+ * call psa_key_derivation_abort() on an operation that has not been set up.
+ *
+ * \param[in,out] operation    The operation to abort.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_key_derivation_abort(
+    psa_key_derivation_operation_t *operation);
+
+/** Perform a key agreement and return the raw shared secret.
+ *
+ * \warning The raw result of a key agreement algorithm such as finite-field
+ * Diffie-Hellman or elliptic curve Diffie-Hellman has biases and should
+ * not be used directly as key material. It should instead be passed as
+ * input to a key derivation algorithm. To chain a key agreement with
+ * a key derivation, use psa_key_derivation_key_agreement() and other
+ * functions from the key derivation interface.
+ *
+ * \param alg                     The key agreement algorithm to compute
+ *                                (\c PSA_ALG_XXX value such that
+ *                                #PSA_ALG_IS_RAW_KEY_AGREEMENT(\p alg)
+ *                                is true).
+ * \param private_key             Identifier of the private key to use. It must
+ *                                allow the usage #PSA_KEY_USAGE_DERIVE.
+ * \param[in] peer_key            Public key of the peer. It must be
+ *                                in the same format that psa_import_key()
+ *                                accepts. The standard formats for public
+ *                                keys are documented in the documentation
+ *                                of psa_export_public_key().
+ * \param peer_key_length         Size of \p peer_key in bytes.
+ * \param[out] output             Buffer where the decrypted message is to
+ *                                be written.
+ * \param output_size             Size of the \c output buffer in bytes.
+ * \param[out] output_length      On success, the number of bytes
+ *                                that make up the returned output.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p alg is not a key agreement algorithm
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p private_key is not compatible with \p alg,
+ *         or \p peer_key is not valid for \p alg or not compatible with
+ *         \p private_key.
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ *         \p output_size is too small
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         \p alg is not a supported key agreement algorithm.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_raw_key_agreement(psa_algorithm_t alg,
+                                   mbedtls_svc_key_id_t private_key,
+                                   const uint8_t *peer_key,
+                                   size_t peer_key_length,
+                                   uint8_t *output,
+                                   size_t output_size,
+                                   size_t *output_length);
+
+/**@}*/
+
+/** \defgroup random Random generation
+ * @{
+ */
+
+/**
+ * \brief Generate random bytes.
+ *
+ * \warning This function **can** fail! Callers MUST check the return status
+ *          and MUST NOT use the content of the output buffer if the return
+ *          status is not #PSA_SUCCESS.
+ *
+ * \note    To generate a key, use psa_generate_key() instead.
+ *
+ * \param[out] output       Output buffer for the generated data.
+ * \param output_size       Number of bytes to generate and output.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_generate_random(uint8_t *output,
+                                 size_t output_size);
+
+/**
+ * \brief Generate a key or key pair.
+ *
+ * The key is generated randomly.
+ * Its location, usage policy, type and size are taken from \p attributes.
+ *
+ * Implementations must reject an attempt to generate a key of size 0.
+ *
+ * The following type-specific considerations apply:
+ * - For RSA keys (#PSA_KEY_TYPE_RSA_KEY_PAIR),
+ *   the public exponent is 65537.
+ *   The modulus is a product of two probabilistic primes
+ *   between 2^{n-1} and 2^n where n is the bit size specified in the
+ *   attributes.
+ *
+ * \param[in] attributes    The attributes for the new key.
+ * \param[out] key          On success, an identifier for the newly created
+ *                          key. For persistent keys, this is the key
+ *                          identifier defined in \p attributes.
+ *                          \c 0 on failure.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         If the key is persistent, the key material and the key's metadata
+ *         have been saved to persistent storage.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         This is an attempt to create a persistent key, and there is
+ *         already a persistent key with the given identifier.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_generate_key(const psa_key_attributes_t *attributes,
+                              mbedtls_svc_key_id_t *key);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/* The file "crypto_sizes.h" contains definitions for size calculation
+ * macros whose definitions are implementation-specific. */
+#include "crypto_sizes.h"
+
+/* The file "crypto_struct.h" contains definitions for
+ * implementation-specific structs that are declared above. */
+#include "crypto_struct.h"
+
+/* The file "crypto_extra.h" contains vendor-specific definitions. This
+ * can include vendor-defined algorithms, extra functions, etc. */
+#include "crypto_extra.h"
+
+#endif /* PSA_CRYPTO_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h
new file mode 100644
index 00000000000..a875b237041
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_builtin_composites.h
@@ -0,0 +1,79 @@
+/*
+ *  Context structure declaration of the Mbed TLS software-based PSA drivers
+ *  called through the PSA Crypto driver dispatch layer.
+ *  This file contains the context structures of those algorithms which need to
+ *  rely on other algorithms, i.e. are 'composite' algorithms.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the Mbed TLS software-based PSA drivers. The
+ * definition of these objects are then used by crypto_struct.h to define the
+ * implementation-defined types of PSA multi-part state objects.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_BUILTIN_COMPOSITES_H
+#define PSA_CRYPTO_BUILTIN_COMPOSITES_H
+
+#include <psa/crypto_driver_common.h>
+
+/*
+ * MAC multi-part operation definitions.
+ */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_CMAC) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC)
+#define MBEDTLS_PSA_BUILTIN_MAC
+#endif
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+typedef struct
+{
+    /** The HMAC algorithm in use */
+    psa_algorithm_t alg;
+    /** The hash context. */
+    struct psa_hash_operation_s hash_ctx;
+    /** The HMAC part of the context. */
+    uint8_t opad[PSA_HMAC_MAX_HASH_BLOCK_SIZE];
+} mbedtls_psa_hmac_operation_t;
+
+#define MBEDTLS_PSA_HMAC_OPERATION_INIT {0, PSA_HASH_OPERATION_INIT, {0}}
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HMAC */
+
+#include "mbedtls/cmac.h"
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    union
+    {
+        unsigned dummy; /* Make the union non-empty even with no supported algorithms. */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+        mbedtls_psa_hmac_operation_t hmac;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HMAC */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_CMAC) || defined(PSA_CRYPTO_DRIVER_TEST)
+        mbedtls_cipher_context_t cmac;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_CMAC */
+    } ctx;
+} mbedtls_psa_mac_operation_t;
+
+#define MBEDTLS_PSA_MAC_OPERATION_INIT {0, {0}}
+
+#endif /* PSA_CRYPTO_BUILTIN_COMPOSITES_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h
new file mode 100644
index 00000000000..62a0e6f3704
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_builtin_primitives.h
@@ -0,0 +1,126 @@
+/*
+ *  Context structure declaration of the Mbed TLS software-based PSA drivers
+ *  called through the PSA Crypto driver dispatch layer.
+ *  This file contains the context structures of those algorithms which do not
+ *  rely on other algorithms, i.e. are 'primitive' algorithms.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the Mbed TLS software-based PSA drivers. The
+ * definition of these objects are then used by crypto_struct.h to define the
+ * implementation-defined types of PSA multi-part state objects.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_BUILTIN_PRIMITIVES_H
+#define PSA_CRYPTO_BUILTIN_PRIMITIVES_H
+
+#include <psa/crypto_driver_common.h>
+
+/*
+ * Hash multi-part operation definitions.
+ */
+
+#include "mbedtls/md2.h"
+#include "mbedtls/md4.h"
+#include "mbedtls/md5.h"
+#include "mbedtls/ripemd160.h"
+#include "mbedtls/sha1.h"
+#include "mbedtls/sha256.h"
+#include "mbedtls/sha512.h"
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD2) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_MD4) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_MD5) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_1) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_224) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_256) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_384) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_512)
+#define MBEDTLS_PSA_BUILTIN_HASH
+#endif
+
+typedef struct
+{
+    psa_algorithm_t alg;
+    union
+    {
+        unsigned dummy; /* Make the union non-empty even with no supported algorithms. */
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD2)
+        mbedtls_md2_context md2;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD4)
+        mbedtls_md4_context md4;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_MD5)
+        mbedtls_md5_context md5;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_RIPEMD160)
+        mbedtls_ripemd160_context ripemd160;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_1)
+        mbedtls_sha1_context sha1;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_256) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_224)
+        mbedtls_sha256_context sha256;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_512) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_SHA_384)
+        mbedtls_sha512_context sha512;
+#endif
+    } ctx;
+} mbedtls_psa_hash_operation_t;
+
+#define MBEDTLS_PSA_HASH_OPERATION_INIT {0, {0}}
+
+/*
+ * Cipher multi-part operation definitions.
+ */
+
+#include "mbedtls/cipher.h"
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_STREAM_CIPHER) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CTR) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CFB) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_OFB) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_XTS) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_ECB_NO_PADDING) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CBC_NO_PADDING) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_CBC_PKCS7)
+#define MBEDTLS_PSA_BUILTIN_CIPHER  1
+#endif
+
+typedef struct {
+    /* Context structure for the Mbed TLS cipher implementation. */
+    psa_algorithm_t alg;
+    uint8_t iv_length;
+    uint8_t block_length;
+    union {
+        unsigned int dummy;
+        mbedtls_cipher_context_t cipher;
+    } ctx;
+} mbedtls_psa_cipher_operation_t;
+
+#define MBEDTLS_PSA_CIPHER_OPERATION_INIT {0, 0, 0, {0}}
+
+#endif /* PSA_CRYPTO_BUILTIN_PRIMITIVES_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_compat.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_compat.h
new file mode 100644
index 00000000000..09ac488398f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_compat.h
@@ -0,0 +1,528 @@
+/**
+ * \file psa/crypto_compat.h
+ *
+ * \brief PSA cryptography module: Backward compatibility aliases
+ *
+ * This header declares alternative names for macro and functions.
+ * New application code should not use these names.
+ * These names may be removed in a future version of Mbed Crypto.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_COMPAT_H
+#define PSA_CRYPTO_COMPAT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * To support both openless APIs and psa_open_key() temporarily, define
+ * psa_key_handle_t to be equal to mbedtls_svc_key_id_t. Do not mark the
+ * type and its utility macros and functions deprecated yet. This will be done
+ * in a subsequent phase.
+ */
+typedef mbedtls_svc_key_id_t psa_key_handle_t;
+
+#define PSA_KEY_HANDLE_INIT MBEDTLS_SVC_KEY_ID_INIT
+
+/** Check whether an handle is null.
+ *
+ * \param handle  Handle
+ *
+ * \return Non-zero if the handle is null, zero otherwise.
+ */
+static inline int psa_key_handle_is_null( psa_key_handle_t handle )
+{
+    return( mbedtls_svc_key_id_is_null( handle ) );
+}
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+/*
+ * Mechanism for declaring deprecated values
+ */
+#if defined(MBEDTLS_DEPRECATED_WARNING) && !defined(MBEDTLS_PSA_DEPRECATED)
+#define MBEDTLS_PSA_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_PSA_DEPRECATED
+#endif
+
+typedef MBEDTLS_PSA_DEPRECATED size_t mbedtls_deprecated_size_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_status_t mbedtls_deprecated_psa_status_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_key_usage_t mbedtls_deprecated_psa_key_usage_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_ecc_family_t mbedtls_deprecated_psa_ecc_family_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_dh_family_t mbedtls_deprecated_psa_dh_family_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_ecc_family_t psa_ecc_curve_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_dh_family_t psa_dh_group_t;
+typedef MBEDTLS_PSA_DEPRECATED psa_algorithm_t mbedtls_deprecated_psa_algorithm_t;
+
+#define PSA_KEY_TYPE_GET_CURVE PSA_KEY_TYPE_ECC_GET_FAMILY
+#define PSA_KEY_TYPE_GET_GROUP PSA_KEY_TYPE_DH_GET_FAMILY
+
+#define MBEDTLS_DEPRECATED_CONSTANT( type, value )      \
+    ( (mbedtls_deprecated_##type) ( value ) )
+
+/*
+ * Deprecated PSA Crypto error code definitions (PSA Crypto API  <= 1.0 beta2)
+ */
+#define PSA_ERROR_UNKNOWN_ERROR \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_GENERIC_ERROR )
+#define PSA_ERROR_OCCUPIED_SLOT \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_ALREADY_EXISTS )
+#define PSA_ERROR_EMPTY_SLOT \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_DOES_NOT_EXIST )
+#define PSA_ERROR_INSUFFICIENT_CAPACITY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_INSUFFICIENT_DATA )
+#define PSA_ERROR_TAMPERING_DETECTED \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_status_t, PSA_ERROR_CORRUPTION_DETECTED )
+
+/*
+ * Deprecated PSA Crypto numerical encodings (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_KEY_USAGE_SIGN \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_key_usage_t, PSA_KEY_USAGE_SIGN_HASH )
+#define PSA_KEY_USAGE_VERIFY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_key_usage_t, PSA_KEY_USAGE_VERIFY_HASH )
+
+/*
+ * Deprecated PSA Crypto size calculation macros (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ASYMMETRIC_SIGNATURE_MAX_SIZE \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_SIGNATURE_MAX_SIZE )
+#define PSA_ASYMMETRIC_SIGN_OUTPUT_SIZE( key_type, key_bits, alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_SIGN_OUTPUT_SIZE( key_type, key_bits, alg ) )
+#define PSA_KEY_EXPORT_MAX_SIZE( key_type, key_bits ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_EXPORT_KEY_OUTPUT_SIZE( key_type, key_bits ) )
+#define PSA_BLOCK_CIPHER_BLOCK_SIZE( type ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_BLOCK_CIPHER_BLOCK_LENGTH( type ) )
+#define PSA_MAX_BLOCK_CIPHER_BLOCK_SIZE \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE )
+#define PSA_HASH_SIZE( alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_HASH_LENGTH( alg ) )
+#define PSA_MAC_FINAL_SIZE( key_type, key_bits, alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_MAC_LENGTH( key_type, key_bits, alg ) )
+#define PSA_ALG_TLS12_PSK_TO_MS_MAX_PSK_LEN \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t, PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE )
+
+/*
+ * Deprecated PSA Crypto function names (PSA Crypto API  <= 1.0 beta3)
+ */
+MBEDTLS_PSA_DEPRECATED static inline psa_status_t psa_asymmetric_sign( psa_key_handle_t key,
+                            psa_algorithm_t alg,
+                            const uint8_t *hash,
+                            size_t hash_length,
+                            uint8_t *signature,
+                            size_t signature_size,
+                            size_t *signature_length )
+{
+    return psa_sign_hash( key, alg, hash, hash_length, signature, signature_size, signature_length );
+}
+
+MBEDTLS_PSA_DEPRECATED static inline psa_status_t psa_asymmetric_verify( psa_key_handle_t key,
+                              psa_algorithm_t alg,
+                              const uint8_t *hash,
+                              size_t hash_length,
+                              const uint8_t *signature,
+                              size_t signature_length )
+{
+    return psa_verify_hash( key, alg, hash, hash_length, signature, signature_length );
+}
+
+/*
+ * Size-specific elliptic curve families.
+ */
+#define PSA_ECC_CURVE_SECP160K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP192K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP224K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP256K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP160R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP192R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP224R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP256R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP384R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP521R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP160R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R2 )
+#define PSA_ECC_CURVE_SECT163K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT233K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT239K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT283K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT409K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT571K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT163R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT193R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT233R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT283R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT409R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT571R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT163R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_SECT193R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_BRAINPOOL_P256R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_BRAINPOOL_P384R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_BRAINPOOL_P512R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_CURVE25519 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+#define PSA_ECC_CURVE_CURVE448 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+
+/*
+ * Curves that changed name due to PSA specification.
+ */
+#define PSA_ECC_CURVE_SECP_K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_K1 )
+#define PSA_ECC_CURVE_SECP_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R1 )
+#define PSA_ECC_CURVE_SECP_R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECP_R2 )
+#define PSA_ECC_CURVE_SECT_K1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_K1 )
+#define PSA_ECC_CURVE_SECT_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R1 )
+#define PSA_ECC_CURVE_SECT_R2 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_SECT_R2 )
+#define PSA_ECC_CURVE_BRAINPOOL_P_R1 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_BRAINPOOL_P_R1 )
+#define PSA_ECC_CURVE_MONTGOMERY \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_ecc_family_t, PSA_ECC_FAMILY_MONTGOMERY )
+
+/*
+ * Finite-field Diffie-Hellman families.
+ */
+#define PSA_DH_GROUP_FFDHE2048 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE3072 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE4096 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE6144 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_FFDHE8192 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+
+/*
+ * Diffie-Hellman families that changed name due to PSA specification.
+ */
+#define PSA_DH_GROUP_RFC7919 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_RFC7919 )
+#define PSA_DH_GROUP_CUSTOM \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_dh_family_t, PSA_DH_FAMILY_CUSTOM )
+
+/*
+ * Deprecated PSA Crypto stream cipher algorithms (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ALG_ARC4 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_STREAM_CIPHER )
+#define PSA_ALG_CHACHA20 \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_STREAM_CIPHER )
+
+/*
+ * Renamed AEAD tag length macros (PSA Crypto API  <= 1.0 beta3)
+ */
+#define PSA_ALG_AEAD_WITH_DEFAULT_TAG_LENGTH( aead_alg ) \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG( aead_alg ) )
+#define PSA_ALG_AEAD_WITH_TAG_LENGTH( aead_alg, tag_length ) \
+    MBEDTLS_DEPRECATED_CONSTANT( psa_algorithm_t, PSA_ALG_AEAD_WITH_SHORTENED_TAG( aead_alg, tag_length ) )
+
+/*
+ * Deprecated PSA AEAD output size macros (PSA Crypto API  <= 1.0 beta3)
+ */
+
+/** The tag size for an AEAD algorithm, in bytes.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    The tag size for the specified algorithm.
+ *                            If the AEAD algorithm does not have an identified
+ *                            tag that can be distinguished from the rest of
+ *                            the ciphertext, return 0.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_TAG_LENGTH_1_ARG( alg )     \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,     \
+        PSA_ALG_IS_AEAD( alg ) ?             \
+        PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) : \
+        0 )
+
+/** The maximum size of the output of psa_aead_encrypt(), in bytes.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_encrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the ciphertext may be smaller.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_SIZE_2_ARG( alg, plaintext_length ) \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                            \
+        PSA_ALG_IS_AEAD( alg ) ?                                    \
+        (plaintext_length) + PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) :   \
+        0 )
+
+/** The maximum size of the output of psa_aead_decrypt(), in bytes.
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_decrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the plaintext may be smaller.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param ciphertext_length   Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_SIZE_2_ARG( alg, ciphertext_length )   \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                               \
+        PSA_ALG_IS_AEAD( alg ) &&                                      \
+            (ciphertext_length) > PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) ? \
+            (ciphertext_length) - PSA_ALG_AEAD_GET_TAG_LENGTH( alg ) : \
+        0 )
+
+/** A sufficient output buffer size for psa_aead_update().
+ *
+ * If the size of the output buffer is at least this large, it is
+ * guaranteed that psa_aead_update() will not fail due to an
+ * insufficient buffer size. The actual size of the output may be smaller
+ * in any given call.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param input_length        Size of the input in bytes.
+ *
+ * \return                    A sufficient output buffer size for the specified
+ *                            algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+/* For all the AEAD modes defined in this specification, it is possible
+ * to emit output without delay. However, hardware may not always be
+ * capable of this. So for modes based on a block cipher, allow the
+ * implementation to delay the output until it has a full block. */
+#define PSA_AEAD_UPDATE_OUTPUT_SIZE_2_ARG( alg, input_length )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                              \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                                      \
+        PSA_ROUND_UP_TO_MULTIPLE( PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, (input_length) ) : \
+        (input_length) )
+
+/** A sufficient ciphertext buffer size for psa_aead_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_finish() will not fail due to an
+ * insufficient ciphertext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient ciphertext buffer size for the
+ *                            specified algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_FINISH_OUTPUT_SIZE_1_ARG( alg )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                        \
+        PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE :                               \
+        0 )
+
+/** A sufficient plaintext buffer size for psa_aead_verify().
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_verify() will not fail due to an
+ * insufficient plaintext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient plaintext buffer size for the
+ *                            specified algorithm.
+ *                            If the AEAD algorithm is not recognized, return 0.
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_SIZE_1_ARG( alg )                        \
+    MBEDTLS_DEPRECATED_CONSTANT( size_t,                                \
+        PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER( alg ) ?                        \
+        PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE :                               \
+        0 )
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/** Open a handle to an existing persistent key.
+ *
+ * Open a handle to a persistent key. A key is persistent if it was created
+ * with a lifetime other than #PSA_KEY_LIFETIME_VOLATILE. A persistent key
+ * always has a nonzero key identifier, set with psa_set_key_id() when
+ * creating the key. Implementations may provide additional pre-provisioned
+ * keys that can be opened with psa_open_key(). Such keys have an application
+ * key identifier in the vendor range, as documented in the description of
+ * #psa_key_id_t.
+ *
+ * The application must eventually close the handle with psa_close_key() or
+ * psa_destroy_key() to release associated resources. If the application dies
+ * without calling one of these functions, the implementation should perform
+ * the equivalent of a call to psa_close_key().
+ *
+ * Some implementations permit an application to open the same key multiple
+ * times. If this is successful, each call to psa_open_key() will return a
+ * different key handle.
+ *
+ * \note This API is not part of the PSA Cryptography API Release 1.0.0
+ * specification. It was defined in the 1.0 Beta 3 version of the
+ * specification but was removed in the 1.0.0 released version. This API is
+ * kept for the time being to not break applications relying on it. It is not
+ * deprecated yet but will be in the near future.
+ *
+ * \note Applications that rely on opening a key multiple times will not be
+ * portable to implementations that only permit a single key handle to be
+ * opened. See also :ref:\`key-handles\`.
+ *
+ *
+ * \param key           The persistent identifier of the key.
+ * \param[out] handle   On success, a handle to the key.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success. The application can now use the value of `*handle`
+ *         to access the key.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ *         The implementation does not have sufficient resources to open the
+ *         key. This can be due to reaching an implementation limit on the
+ *         number of open keys, the number of open key handles, or available
+ *         memory.
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ *         There is no persistent key with key identifier \p key.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p key is not a valid persistent key identifier.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The specified key exists, but the application does not have the
+ *         permission to access it. Note that this specification does not
+ *         define any way to create such a key, but it may be possible
+ *         through implementation-specific means.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_open_key( mbedtls_svc_key_id_t key,
+                           psa_key_handle_t *handle );
+
+/** Close a key handle.
+ *
+ * If the handle designates a volatile key, this will destroy the key material
+ * and free all associated resources, just like psa_destroy_key().
+ *
+ * If this is the last open handle to a persistent key, then closing the handle
+ * will free all resources associated with the key in volatile memory. The key
+ * data in persistent storage is not affected and can be opened again later
+ * with a call to psa_open_key().
+ *
+ * Closing the key handle makes the handle invalid, and the key handle
+ * must not be used again by the application.
+ *
+ * \note This API is not part of the PSA Cryptography API Release 1.0.0
+ * specification. It was defined in the 1.0 Beta 3 version of the
+ * specification but was removed in the 1.0.0 released version. This API is
+ * kept for the time being to not break applications relying on it. It is not
+ * deprecated yet but will be in the near future.
+ *
+ * \note If the key handle was used to set up an active
+ * :ref:\`multipart operation <multipart-operations>\`, then closing the
+ * key handle can cause the multipart operation to fail. Applications should
+ * maintain the key handle until after the multipart operation has finished.
+ *
+ * \param handle        The key handle to close.
+ *                      If this is \c 0, do nothing and return \c PSA_SUCCESS.
+ *
+ * \retval #PSA_SUCCESS
+ *         \p handle was a valid handle or \c 0. It is now closed.
+ * \retval #PSA_ERROR_INVALID_HANDLE
+ *         \p handle is not a valid handle nor \c 0.
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t psa_close_key(psa_key_handle_t handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_COMPAT_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_config.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_config.h
new file mode 100644
index 00000000000..e2446cb26c4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_config.h
@@ -0,0 +1,129 @@
+/**
+ * \file psa/crypto_config.h
+ * \brief PSA crypto configuration options (set of defines)
+ *
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_CONFIG)
+/**
+ * When #MBEDTLS_PSA_CRYPTO_CONFIG is enabled in config.h,
+ * this file determines which cryptographic mechanisms are enabled
+ * through the PSA Cryptography API (\c psa_xxx() functions).
+ *
+ * To enable a cryptographic mechanism, uncomment the definition of
+ * the corresponding \c PSA_WANT_xxx preprocessor symbol.
+ * To disable a cryptographic mechanism, comment out the definition of
+ * the corresponding \c PSA_WANT_xxx preprocessor symbol.
+ * The names of cryptographic mechanisms correspond to values
+ * defined in psa/crypto_values.h, with the prefix \c PSA_WANT_ instead
+ * of \c PSA_.
+ *
+ * Note that many cryptographic mechanisms involve two symbols: one for
+ * the key type (\c PSA_WANT_KEY_TYPE_xxx) and one for the algorithm
+ * (\c PSA_WANT_ALG_xxx). Mechanisms with additional parameters may involve
+ * additional symbols.
+ */
+#else
+/**
+ * When \c MBEDTLS_PSA_CRYPTO_CONFIG is disabled in config.h,
+ * this file is not used, and cryptographic mechanisms are supported
+ * through the PSA API if and only if they are supported through the
+ * mbedtls_xxx API.
+ */
+#endif
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_CONFIG_H
+#define PSA_CRYPTO_CONFIG_H
+
+/*
+ * CBC-MAC is not yet supported via the PSA API in Mbed TLS.
+ */
+//#define PSA_WANT_ALG_CBC_MAC                    1
+#define PSA_WANT_ALG_CBC_NO_PADDING             1
+#define PSA_WANT_ALG_CBC_PKCS7                  1
+#define PSA_WANT_ALG_CCM                        1
+#define PSA_WANT_ALG_CMAC                       1
+#define PSA_WANT_ALG_CFB                        1
+#define PSA_WANT_ALG_CHACHA20_POLY1305          1
+#define PSA_WANT_ALG_CMAC                       1
+#define PSA_WANT_ALG_CTR                        1
+#define PSA_WANT_ALG_DETERMINISTIC_ECDSA        1
+#define PSA_WANT_ALG_ECB_NO_PADDING             1
+#define PSA_WANT_ALG_ECDH                       1
+#define PSA_WANT_ALG_ECDSA                      1
+#define PSA_WANT_ALG_GCM                        1
+#define PSA_WANT_ALG_HKDF                       1
+#define PSA_WANT_ALG_HMAC                       1
+#define PSA_WANT_ALG_MD2                        1
+#define PSA_WANT_ALG_MD4                        1
+#define PSA_WANT_ALG_MD5                        1
+#define PSA_WANT_ALG_OFB                        1
+#define PSA_WANT_ALG_RIPEMD160                  1
+#define PSA_WANT_ALG_RSA_OAEP                   1
+#define PSA_WANT_ALG_RSA_PKCS1V15_CRYPT         1
+#define PSA_WANT_ALG_RSA_PKCS1V15_SIGN          1
+#define PSA_WANT_ALG_RSA_PSS                    1
+#define PSA_WANT_ALG_SHA_1                      1
+#define PSA_WANT_ALG_SHA_224                    1
+#define PSA_WANT_ALG_SHA_256                    1
+#define PSA_WANT_ALG_SHA_384                    1
+#define PSA_WANT_ALG_SHA_512                    1
+#define PSA_WANT_ALG_STREAM_CIPHER              1
+#define PSA_WANT_ALG_TLS12_PRF                  1
+#define PSA_WANT_ALG_TLS12_PSK_TO_MS            1
+#define PSA_WANT_ALG_XTS                        1
+
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_256         1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_384         1
+#define PSA_WANT_ECC_BRAINPOOL_P_R1_512         1
+#define PSA_WANT_ECC_MONTGOMERY_255             1
+/*
+ * Curve448 is not yet supported via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/4249). Thus, do not enable it by
+ * default.
+ */
+//#define PSA_WANT_ECC_MONTGOMERY_448             1
+#define PSA_WANT_ECC_SECP_K1_192                1
+/*
+ * SECP224K1 is buggy via the PSA API in Mbed TLS
+ * (https://github.com/ARMmbed/mbedtls/issues/3541). Thus, do not enable it by
+ * default.
+ */
+//#define PSA_WANT_ECC_SECP_K1_224                1
+#define PSA_WANT_ECC_SECP_K1_256                1
+#define PSA_WANT_ECC_SECP_R1_192                1
+#define PSA_WANT_ECC_SECP_R1_224                1
+#define PSA_WANT_ECC_SECP_R1_256                1
+#define PSA_WANT_ECC_SECP_R1_384                1
+#define PSA_WANT_ECC_SECP_R1_521                1
+
+#define PSA_WANT_KEY_TYPE_DERIVE                1
+#define PSA_WANT_KEY_TYPE_HMAC                  1
+#define PSA_WANT_KEY_TYPE_AES                   1
+#define PSA_WANT_KEY_TYPE_ARC4                  1
+#define PSA_WANT_KEY_TYPE_ARIA                  1
+#define PSA_WANT_KEY_TYPE_CAMELLIA              1
+#define PSA_WANT_KEY_TYPE_CHACHA20              1
+#define PSA_WANT_KEY_TYPE_DES                   1
+#define PSA_WANT_KEY_TYPE_ECC_KEY_PAIR          1
+#define PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY        1
+#define PSA_WANT_KEY_TYPE_RAW_DATA              1
+#define PSA_WANT_KEY_TYPE_RSA_KEY_PAIR          1
+#define PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY        1
+
+#endif /* PSA_CRYPTO_CONFIG_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h
new file mode 100644
index 00000000000..26363c6b2f3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_driver_common.h
@@ -0,0 +1,56 @@
+/**
+ * \file psa/crypto_driver_common.h
+ * \brief Definitions for all PSA crypto drivers
+ *
+ * This file contains common definitions shared by all PSA crypto drivers.
+ * Do not include it directly: instead, include the header file(s) for
+ * the type(s) of driver that you are implementing. For example, if
+ * you are writing a dynamically registered driver for a secure element,
+ * include `psa/crypto_se_driver.h`.
+ *
+ * This file is part of the PSA Crypto Driver Model, containing functions for
+ * driver developers to implement to enable hardware to be called in a
+ * standardized way by a PSA Cryptographic API implementation. The functions
+ * comprising the driver model, which driver authors implement, are not
+ * intended to be called by application developers.
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef PSA_CRYPTO_DRIVER_COMMON_H
+#define PSA_CRYPTO_DRIVER_COMMON_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* Include type definitions (psa_status_t, psa_algorithm_t,
+ * psa_key_type_t, etc.) and macros to build and analyze values
+ * of these types. */
+#include "crypto_types.h"
+#include "crypto_values.h"
+/* Include size definitions which are used to size some arrays in operation
+ * structures. */
+#include <psa/crypto_sizes.h>
+
+/** For encrypt-decrypt functions, whether the operation is an encryption
+ * or a decryption. */
+typedef enum {
+    PSA_CRYPTO_DRIVER_DECRYPT,
+    PSA_CRYPTO_DRIVER_ENCRYPT
+} psa_encrypt_or_decrypt_t;
+
+#endif /* PSA_CRYPTO_DRIVER_COMMON_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h
new file mode 100644
index 00000000000..a7220091ea3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_composites.h
@@ -0,0 +1,93 @@
+/*
+ *  Declaration of context structures for use with the PSA driver wrapper
+ *  interface. This file contains the context structures for 'composite'
+ *  operations, i.e. those operations which need to make use of other operations
+ *  from the primitives (crypto_driver_contexts_primitives.h)
+ *
+ *  Warning: This file will be auto-generated in the future.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the PSA drivers included in the cryptographic
+ * library. The definition of these objects are then used by crypto_struct.h
+ * to define the implementation-defined types of PSA multi-part state objects.
+ */
+/*  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H
+#define PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H
+
+#include "psa/crypto_driver_common.h"
+
+/* Include the context structure definitions for the Mbed TLS software drivers */
+#include "psa/crypto_builtin_composites.h"
+
+/* Include the context structure definitions for those drivers that were
+ * declared during the autogeneration process. */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1)
+#include <libtestdriver1/include/psa/crypto.h>
+#endif
+
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_MAC)
+typedef libtestdriver1_mbedtls_psa_mac_operation_t
+        mbedtls_transparent_test_driver_mac_operation_t;
+typedef libtestdriver1_mbedtls_psa_mac_operation_t
+        mbedtls_opaque_test_driver_mac_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_MAC_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_MAC_OPERATION_INIT
+#define MBEDTLS_OPAQUE_TEST_DRIVER_MAC_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_MAC_OPERATION_INIT
+
+#else
+typedef mbedtls_psa_mac_operation_t
+        mbedtls_transparent_test_driver_mac_operation_t;
+typedef mbedtls_psa_mac_operation_t
+        mbedtls_opaque_test_driver_mac_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_MAC_OPERATION_INIT \
+        MBEDTLS_PSA_MAC_OPERATION_INIT
+#define MBEDTLS_OPAQUE_TEST_DRIVER_MAC_OPERATION_INIT \
+        MBEDTLS_PSA_MAC_OPERATION_INIT
+
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 */
+#endif /* PSA_CRYPTO_DRIVER_TEST */
+
+/* Define the context to be used for an operation that is executed through the
+ * PSA Driver wrapper layer as the union of all possible driver's contexts.
+ *
+ * The union members are the driver's context structures, and the member names
+ * are formatted as `'drivername'_ctx`. This allows for procedural generation
+ * of both this file and the content of psa_crypto_driver_wrappers.c */
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_mac_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_mac_operation_t transparent_test_driver_ctx;
+    mbedtls_opaque_test_driver_mac_operation_t opaque_test_driver_ctx;
+#endif
+} psa_driver_mac_context_t;
+
+#endif /* PSA_CRYPTO_DRIVER_CONTEXTS_COMPOSITES_H */
+/* End of automatically generated file. */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h
new file mode 100644
index 00000000000..2bb01ed432f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_driver_contexts_primitives.h
@@ -0,0 +1,117 @@
+/*
+ *  Declaration of context structures for use with the PSA driver wrapper
+ *  interface. This file contains the context structures for 'primitive'
+ *  operations, i.e. those operations which do not rely on other contexts.
+ *
+ *  Warning: This file will be auto-generated in the future.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * \note This header and its content is not part of the Mbed TLS API and
+ * applications must not depend on it. Its main purpose is to define the
+ * multi-part state objects of the PSA drivers included in the cryptographic
+ * library. The definition of these objects are then used by crypto_struct.h
+ * to define the implementation-defined types of PSA multi-part state objects.
+ */
+/*  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H
+#define PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H
+
+#include "psa/crypto_driver_common.h"
+
+/* Include the context structure definitions for the Mbed TLS software drivers */
+#include "psa/crypto_builtin_primitives.h"
+
+/* Include the context structure definitions for those drivers that were
+ * declared during the autogeneration process. */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1)
+#include <libtestdriver1/include/psa/crypto.h>
+#endif
+
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_CIPHER)
+typedef libtestdriver1_mbedtls_psa_cipher_operation_t
+        mbedtls_transparent_test_driver_cipher_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_CIPHER_OPERATION_INIT
+#else
+typedef mbedtls_psa_cipher_operation_t
+        mbedtls_transparent_test_driver_cipher_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT \
+        MBEDTLS_PSA_CIPHER_OPERATION_INIT
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 &&
+          LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_CIPHER */
+
+#if defined(MBEDTLS_TEST_LIBTESTDRIVER1) && \
+    defined(LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_HASH)
+typedef libtestdriver1_mbedtls_psa_hash_operation_t
+        mbedtls_transparent_test_driver_hash_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_HASH_OPERATION_INIT \
+        LIBTESTDRIVER1_MBEDTLS_PSA_HASH_OPERATION_INIT
+#else
+typedef mbedtls_psa_hash_operation_t
+        mbedtls_transparent_test_driver_hash_operation_t;
+
+#define MBEDTLS_TRANSPARENT_TEST_DRIVER_HASH_OPERATION_INIT \
+        MBEDTLS_PSA_HASH_OPERATION_INIT
+#endif /* MBEDTLS_TEST_LIBTESTDRIVER1 &&
+          LIBTESTDRIVER1_MBEDTLS_PSA_BUILTIN_HASH */
+
+typedef struct {
+    unsigned int initialised : 1;
+    mbedtls_transparent_test_driver_cipher_operation_t ctx;
+} mbedtls_opaque_test_driver_cipher_operation_t;
+
+#define MBEDTLS_OPAQUE_TEST_DRIVER_CIPHER_OPERATION_INIT \
+     { 0, MBEDTLS_TRANSPARENT_TEST_DRIVER_CIPHER_OPERATION_INIT }
+
+#endif /* PSA_CRYPTO_DRIVER_TEST */
+
+/* Define the context to be used for an operation that is executed through the
+ * PSA Driver wrapper layer as the union of all possible driver's contexts.
+ *
+ * The union members are the driver's context structures, and the member names
+ * are formatted as `'drivername'_ctx`. This allows for procedural generation
+ * of both this file and the content of psa_crypto_driver_wrappers.c */
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_hash_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_hash_operation_t test_driver_ctx;
+#endif
+} psa_driver_hash_context_t;
+
+typedef union {
+    unsigned dummy; /* Make sure this union is always non-empty */
+    mbedtls_psa_cipher_operation_t mbedtls_ctx;
+#if defined(PSA_CRYPTO_DRIVER_TEST)
+    mbedtls_transparent_test_driver_cipher_operation_t transparent_test_driver_ctx;
+    mbedtls_opaque_test_driver_cipher_operation_t opaque_test_driver_ctx;
+#endif
+} psa_driver_cipher_context_t;
+
+#endif /* PSA_CRYPTO_DRIVER_CONTEXTS_PRIMITIVES_H */
+/* End of automatically generated file. */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_extra.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_extra.h
new file mode 100644
index 00000000000..3ee0482cbda
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_extra.h
@@ -0,0 +1,819 @@
+/**
+ * \file psa/crypto_extra.h
+ *
+ * \brief PSA cryptography module: Mbed TLS vendor extensions
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file is reserved for vendor-specific definitions.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_EXTRA_H
+#define PSA_CRYPTO_EXTRA_H
+
+#include "mbedtls/platform_util.h"
+
+#include "crypto_types.h"
+#include "crypto_compat.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* UID for secure storage seed */
+#define PSA_CRYPTO_ITS_RANDOM_SEED_UID 0xFFFFFF52
+
+/* See config.h for definition */
+#if !defined(MBEDTLS_PSA_KEY_SLOT_COUNT)
+#define MBEDTLS_PSA_KEY_SLOT_COUNT 32
+#endif
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** \brief Declare the enrollment algorithm for a key.
+ *
+ * An operation on a key may indifferently use the algorithm set with
+ * psa_set_key_algorithm() or with this function.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param alg2                  A second algorithm that the key may be used
+ *                              for, in addition to the algorithm set with
+ *                              psa_set_key_algorithm().
+ *
+ * \warning Setting an enrollment algorithm is not recommended, because
+ *          using the same key with different algorithms can allow some
+ *          attacks based on arithmetic relations between different
+ *          computations made with the same key, or can escalate harmless
+ *          side channels into exploitable ones. Use this function only
+ *          if it is necessary to support a protocol for which it has been
+ *          verified that the usage of the key with multiple algorithms
+ *          is safe.
+ */
+static inline void psa_set_key_enrollment_algorithm(
+    psa_key_attributes_t *attributes,
+    psa_algorithm_t alg2)
+{
+    attributes->core.policy.alg2 = alg2;
+}
+
+/** Retrieve the enrollment algorithm policy from key attributes.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ *
+ * \return The enrollment algorithm stored in the attribute structure.
+ */
+static inline psa_algorithm_t psa_get_key_enrollment_algorithm(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.alg2 );
+}
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+
+/** Retrieve the slot number where a key is stored.
+ *
+ * A slot number is only defined for keys that are stored in a secure
+ * element.
+ *
+ * This information is only useful if the secure element is not entirely
+ * managed through the PSA Cryptography API. It is up to the secure
+ * element driver to decide how PSA slot numbers map to any other interface
+ * that the secure element may have.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ * \param[out] slot_number      On success, the slot number containing the key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key is located in a secure element, and \p *slot_number
+ *         indicates the slot number that contains it.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The caller is not permitted to query the slot number.
+ *         Mbed Crypto currently does not return this error.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The key is not located in a secure element.
+ */
+psa_status_t psa_get_key_slot_number(
+    const psa_key_attributes_t *attributes,
+    psa_key_slot_number_t *slot_number );
+
+/** Choose the slot number where a key is stored.
+ *
+ * This function declares a slot number in the specified attribute
+ * structure.
+ *
+ * A slot number is only meaningful for keys that are stored in a secure
+ * element. It is up to the secure element driver to decide how PSA slot
+ * numbers map to any other interface that the secure element may have.
+ *
+ * \note Setting a slot number in key attributes for a key creation can
+ *       cause the following errors when creating the key:
+ *       - #PSA_ERROR_NOT_SUPPORTED if the selected secure element does
+ *         not support choosing a specific slot number.
+ *       - #PSA_ERROR_NOT_PERMITTED if the caller is not permitted to
+ *         choose slot numbers in general or to choose this specific slot.
+ *       - #PSA_ERROR_INVALID_ARGUMENT if the chosen slot number is not
+ *         valid in general or not valid for this specific key.
+ *       - #PSA_ERROR_ALREADY_EXISTS if there is already a key in the
+ *         selected slot.
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ * \param slot_number           The slot number to set.
+ */
+static inline void psa_set_key_slot_number(
+    psa_key_attributes_t *attributes,
+    psa_key_slot_number_t slot_number )
+{
+    attributes->core.flags |= MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER;
+    attributes->slot_number = slot_number;
+}
+
+/** Remove the slot number attribute from a key attribute structure.
+ *
+ * This function undoes the action of psa_set_key_slot_number().
+ *
+ * \param[out] attributes       The attribute structure to write to.
+ */
+static inline void psa_clear_key_slot_number(
+    psa_key_attributes_t *attributes )
+{
+    attributes->core.flags &= ~MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER;
+}
+
+/** Register a key that is already present in a secure element.
+ *
+ * The key must be located in a secure element designated by the
+ * lifetime field in \p attributes, in the slot set with
+ * psa_set_key_slot_number() in the attribute structure.
+ * This function makes the key available through the key identifier
+ * specified in \p attributes.
+ *
+ * \param[in] attributes        The attributes of the existing key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The key was successfully registered.
+ *         Note that depending on the design of the driver, this may or may
+ *         not guarantee that a key actually exists in the designated slot
+ *         and is compatible with the specified attributes.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a key with the identifier specified in
+ *         \p attributes.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ *         The secure element driver for the specified lifetime does not
+ *         support registering a key.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The identifier in \p attributes is invalid, namely the identifier is
+ *         not in the user range.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p attributes specifies a lifetime which is not located
+ *         in a secure element.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         No slot number is specified in \p attributes,
+ *         or the specified slot number is not valid.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The caller is not authorized to register the specified key slot.
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_DATA_INVALID
+ * \retval #PSA_ERROR_DATA_CORRUPT
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ * \retval #PSA_ERROR_BAD_STATE
+ *         The library has not been previously initialized by psa_crypto_init().
+ *         It is implementation-dependent whether a failure to initialize
+ *         results in this error code.
+ */
+psa_status_t mbedtls_psa_register_se_key(
+    const psa_key_attributes_t *attributes);
+
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+
+/**@}*/
+
+/**
+ * \brief Library deinitialization.
+ *
+ * This function clears all data associated with the PSA layer,
+ * including the whole key store.
+ *
+ * This is an Mbed TLS extension.
+ */
+void mbedtls_psa_crypto_free( void );
+
+/** \brief Statistics about
+ * resource consumption related to the PSA keystore.
+ *
+ * \note The content of this structure is not part of the stable API and ABI
+ *       of Mbed Crypto and may change arbitrarily from version to version.
+ */
+typedef struct mbedtls_psa_stats_s
+{
+    /** Number of slots containing key material for a volatile key. */
+    size_t volatile_slots;
+    /** Number of slots containing key material for a key which is in
+     * internal persistent storage. */
+    size_t persistent_slots;
+    /** Number of slots containing a reference to a key in a
+     * secure element. */
+    size_t external_slots;
+    /** Number of slots which are occupied, but do not contain
+     * key material yet. */
+    size_t half_filled_slots;
+    /** Number of slots that contain cache data. */
+    size_t cache_slots;
+    /** Number of slots that are not used for anything. */
+    size_t empty_slots;
+    /** Number of slots that are locked. */
+    size_t locked_slots;
+    /** Largest key id value among open keys in internal persistent storage. */
+    psa_key_id_t max_open_internal_key_id;
+    /** Largest key id value among open keys in secure elements. */
+    psa_key_id_t max_open_external_key_id;
+} mbedtls_psa_stats_t;
+
+/** \brief Get statistics about
+ * resource consumption related to the PSA keystore.
+ *
+ * \note When Mbed Crypto is built as part of a service, with isolation
+ *       between the application and the keystore, the service may or
+ *       may not expose this function.
+ */
+void mbedtls_psa_get_stats( mbedtls_psa_stats_t *stats );
+
+/**
+ * \brief Inject an initial entropy seed for the random generator into
+ *        secure storage.
+ *
+ * This function injects data to be used as a seed for the random generator
+ * used by the PSA Crypto implementation. On devices that lack a trusted
+ * entropy source (preferably a hardware random number generator),
+ * the Mbed PSA Crypto implementation uses this value to seed its
+ * random generator.
+ *
+ * On devices without a trusted entropy source, this function must be
+ * called exactly once in the lifetime of the device. On devices with
+ * a trusted entropy source, calling this function is optional.
+ * In all cases, this function may only be called before calling any
+ * other function in the PSA Crypto API, including psa_crypto_init().
+ *
+ * When this function returns successfully, it populates a file in
+ * persistent storage. Once the file has been created, this function
+ * can no longer succeed.
+ *
+ * If any error occurs, this function does not change the system state.
+ * You can call this function again after correcting the reason for the
+ * error if possible.
+ *
+ * \warning This function **can** fail! Callers MUST check the return status.
+ *
+ * \warning If you use this function, you should use it as part of a
+ *          factory provisioning process. The value of the injected seed
+ *          is critical to the security of the device. It must be
+ *          *secret*, *unpredictable* and (statistically) *unique per device*.
+ *          You should be generate it randomly using a cryptographically
+ *          secure random generator seeded from trusted entropy sources.
+ *          You should transmit it securely to the device and ensure
+ *          that its value is not leaked or stored anywhere beyond the
+ *          needs of transmitting it from the point of generation to
+ *          the call of this function, and erase all copies of the value
+ *          once this function returns.
+ *
+ * This is an Mbed TLS extension.
+ *
+ * \note This function is only available on the following platforms:
+ * * If the compile-time option MBEDTLS_PSA_INJECT_ENTROPY is enabled.
+ *   Note that you must provide compatible implementations of
+ *   mbedtls_nv_seed_read and mbedtls_nv_seed_write.
+ * * In a client-server integration of PSA Cryptography, on the client side,
+ *   if the server supports this feature.
+ * \param[in] seed          Buffer containing the seed value to inject.
+ * \param[in] seed_size     Size of the \p seed buffer.
+ *                          The size of the seed in bytes must be greater
+ *                          or equal to both #MBEDTLS_ENTROPY_MIN_PLATFORM
+ *                          and #MBEDTLS_ENTROPY_BLOCK_SIZE.
+ *                          It must be less or equal to
+ *                          #MBEDTLS_ENTROPY_MAX_SEED_SIZE.
+ *
+ * \retval #PSA_SUCCESS
+ *         The seed value was injected successfully. The random generator
+ *         of the PSA Crypto implementation is now ready for use.
+ *         You may now call psa_crypto_init() and use the PSA Crypto
+ *         implementation.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         \p seed_size is out of range.
+ * \retval #PSA_ERROR_STORAGE_FAILURE
+ *         There was a failure reading or writing from storage.
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ *         The library has already been initialized. It is no longer
+ *         possible to call this function.
+ */
+psa_status_t mbedtls_psa_inject_entropy(const uint8_t *seed,
+                                        size_t seed_size);
+
+/** \addtogroup crypto_types
+ * @{
+ */
+
+/** DSA public key.
+ *
+ * The import and export format is the
+ * representation of the public key `y = g^x mod p` as a big-endian byte
+ * string. The length of the byte string is the length of the base prime `p`
+ * in bytes.
+ */
+#define PSA_KEY_TYPE_DSA_PUBLIC_KEY                 ((psa_key_type_t)0x4002)
+
+/** DSA key pair (private and public key).
+ *
+ * The import and export format is the
+ * representation of the private key `x` as a big-endian byte string. The
+ * length of the byte string is the private key size in bytes (leading zeroes
+ * are not stripped).
+ *
+ * Determinstic DSA key derivation with psa_generate_derived_key follows
+ * FIPS 186-4 &sect;B.1.2: interpret the byte string as integer
+ * in big-endian order. Discard it if it is not in the range
+ * [0, *N* - 2] where *N* is the boundary of the private key domain
+ * (the prime *p* for Diffie-Hellman, the subprime *q* for DSA,
+ * or the order of the curve's base point for ECC).
+ * Add 1 to the resulting integer and use this as the private key *x*.
+ *
+ */
+#define PSA_KEY_TYPE_DSA_KEY_PAIR                    ((psa_key_type_t)0x7002)
+
+/** Whether a key type is an DSA key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_DSA(type)                                       \
+    (PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) == PSA_KEY_TYPE_DSA_PUBLIC_KEY)
+
+#define PSA_ALG_DSA_BASE                        ((psa_algorithm_t)0x06000400)
+/** DSA signature with hashing.
+ *
+ * This is the signature scheme defined by FIPS 186-4,
+ * with a random per-message secret number (*k*).
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding DSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DSA(hash_alg)                             \
+    (PSA_ALG_DSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_DETERMINISTIC_DSA_BASE          ((psa_algorithm_t)0x06000500)
+#define PSA_ALG_DSA_DETERMINISTIC_FLAG PSA_ALG_ECDSA_DETERMINISTIC_FLAG
+/** Deterministic DSA signature with hashing.
+ *
+ * This is the deterministic variant defined by RFC 6979 of
+ * the signature scheme defined by FIPS 186-4.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding DSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DETERMINISTIC_DSA(hash_alg)                             \
+    (PSA_ALG_DETERMINISTIC_DSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_IS_DSA(alg)                                             \
+    (((alg) & ~PSA_ALG_HASH_MASK & ~PSA_ALG_DSA_DETERMINISTIC_FLAG) ==  \
+     PSA_ALG_DSA_BASE)
+#define PSA_ALG_DSA_IS_DETERMINISTIC(alg)               \
+    (((alg) & PSA_ALG_DSA_DETERMINISTIC_FLAG) != 0)
+#define PSA_ALG_IS_DETERMINISTIC_DSA(alg)                       \
+    (PSA_ALG_IS_DSA(alg) && PSA_ALG_DSA_IS_DETERMINISTIC(alg))
+#define PSA_ALG_IS_RANDOMIZED_DSA(alg)                          \
+    (PSA_ALG_IS_DSA(alg) && !PSA_ALG_DSA_IS_DETERMINISTIC(alg))
+
+
+/* We need to expand the sample definition of this macro from
+ * the API definition. */
+#undef PSA_ALG_IS_VENDOR_HASH_AND_SIGN
+#define PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg)    \
+    PSA_ALG_IS_DSA(alg)
+
+/**@}*/
+
+/** \addtogroup attributes
+ * @{
+ */
+
+/** Custom Diffie-Hellman group.
+ *
+ * For keys of type #PSA_KEY_TYPE_DH_PUBLIC_KEY(#PSA_DH_FAMILY_CUSTOM) or
+ * #PSA_KEY_TYPE_DH_KEY_PAIR(#PSA_DH_FAMILY_CUSTOM), the group data comes
+ * from domain parameters set by psa_set_key_domain_parameters().
+ */
+#define PSA_DH_FAMILY_CUSTOM             ((psa_dh_family_t) 0x7e)
+
+
+/**
+ * \brief Set domain parameters for a key.
+ *
+ * Some key types require additional domain parameters in addition to
+ * the key type identifier and the key size. Use this function instead
+ * of psa_set_key_type() when you need to specify domain parameters.
+ *
+ * The format for the required domain parameters varies based on the key type.
+ *
+ * - For RSA keys (#PSA_KEY_TYPE_RSA_PUBLIC_KEY or #PSA_KEY_TYPE_RSA_KEY_PAIR),
+ *   the domain parameter data consists of the public exponent,
+ *   represented as a big-endian integer with no leading zeros.
+ *   This information is used when generating an RSA key pair.
+ *   When importing a key, the public exponent is read from the imported
+ *   key data and the exponent recorded in the attribute structure is ignored.
+ *   As an exception, the public exponent 65537 is represented by an empty
+ *   byte string.
+ * - For DSA keys (#PSA_KEY_TYPE_DSA_PUBLIC_KEY or #PSA_KEY_TYPE_DSA_KEY_PAIR),
+ *   the `Dss-Parms` format as defined by RFC 3279 &sect;2.3.2.
+ *   ```
+ *   Dss-Parms ::= SEQUENCE  {
+ *      p       INTEGER,
+ *      q       INTEGER,
+ *      g       INTEGER
+ *   }
+ *   ```
+ * - For Diffie-Hellman key exchange keys
+ *   (#PSA_KEY_TYPE_DH_PUBLIC_KEY(#PSA_DH_FAMILY_CUSTOM) or
+ *   #PSA_KEY_TYPE_DH_KEY_PAIR(#PSA_DH_FAMILY_CUSTOM)), the
+ *   `DomainParameters` format as defined by RFC 3279 &sect;2.3.3.
+ *   ```
+ *   DomainParameters ::= SEQUENCE {
+ *      p               INTEGER,                    -- odd prime, p=jq +1
+ *      g               INTEGER,                    -- generator, g
+ *      q               INTEGER,                    -- factor of p-1
+ *      j               INTEGER OPTIONAL,           -- subgroup factor
+ *      validationParms ValidationParms OPTIONAL
+ *   }
+ *   ValidationParms ::= SEQUENCE {
+ *      seed            BIT STRING,
+ *      pgenCounter     INTEGER
+ *   }
+ *   ```
+ *
+ * \note This function may allocate memory or other resources.
+ *       Once you have called this function on an attribute structure,
+ *       you must call psa_reset_key_attributes() to free these resources.
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param[in,out] attributes    Attribute structure where the specified domain
+ *                              parameters will be stored.
+ *                              If this function fails, the content of
+ *                              \p attributes is not modified.
+ * \param type                  Key type (a \c PSA_KEY_TYPE_XXX value).
+ * \param[in] data              Buffer containing the key domain parameters.
+ *                              The content of this buffer is interpreted
+ *                              according to \p type as described above.
+ * \param data_length           Size of the \p data buffer in bytes.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_MEMORY
+ */
+psa_status_t psa_set_key_domain_parameters(psa_key_attributes_t *attributes,
+                                           psa_key_type_t type,
+                                           const uint8_t *data,
+                                           size_t data_length);
+
+/**
+ * \brief Get domain parameters for a key.
+ *
+ * Get the domain parameters for a key with this function, if any. The format
+ * of the domain parameters written to \p data is specified in the
+ * documentation for psa_set_key_domain_parameters().
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param[in] attributes        The key attribute structure to query.
+ * \param[out] data             On success, the key domain parameters.
+ * \param data_size             Size of the \p data buffer in bytes.
+ *                              The buffer is guaranteed to be large
+ *                              enough if its size in bytes is at least
+ *                              the value given by
+ *                              PSA_KEY_DOMAIN_PARAMETERS_SIZE().
+ * \param[out] data_length      On success, the number of bytes
+ *                              that make up the key domain parameters data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_BUFFER_TOO_SMALL
+ */
+psa_status_t psa_get_key_domain_parameters(
+    const psa_key_attributes_t *attributes,
+    uint8_t *data,
+    size_t data_size,
+    size_t *data_length);
+
+/** Safe output buffer size for psa_get_key_domain_parameters().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \note This is an experimental extension to the interface. It may change
+ *       in future versions of the library.
+ *
+ * \param key_type  A supported key type.
+ * \param key_bits  The size of the key in bits.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_get_key_domain_parameters() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported
+ *         by the implementation, this macro shall return either a
+ *         sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_KEY_DOMAIN_PARAMETERS_SIZE(key_type, key_bits)              \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? sizeof(int) :                      \
+     PSA_KEY_TYPE_IS_DH(key_type) ? PSA_DH_KEY_DOMAIN_PARAMETERS_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_DSA(key_type) ? PSA_DSA_KEY_DOMAIN_PARAMETERS_SIZE(key_bits) : \
+     0)
+#define PSA_DH_KEY_DOMAIN_PARAMETERS_SIZE(key_bits)     \
+    (4 + (PSA_BITS_TO_BYTES(key_bits) + 5) * 3 /*without optional parts*/)
+#define PSA_DSA_KEY_DOMAIN_PARAMETERS_SIZE(key_bits)    \
+    (4 + (PSA_BITS_TO_BYTES(key_bits) + 5) * 2 /*p, g*/ + 34 /*q*/)
+
+/**@}*/
+
+/** \defgroup psa_tls_helpers TLS helper functions
+ * @{
+ */
+
+#if defined(MBEDTLS_ECP_C)
+#include <mbedtls/ecp.h>
+
+/** Convert an ECC curve identifier from the Mbed TLS encoding to PSA.
+ *
+ * \note This function is provided solely for the convenience of
+ *       Mbed TLS and may be removed at any time without notice.
+ *
+ * \param grpid         An Mbed TLS elliptic curve identifier
+ *                      (`MBEDTLS_ECP_DP_xxx`).
+ * \param[out] bits     On success, the bit size of the curve.
+ *
+ * \return              The corresponding PSA elliptic curve identifier
+ *                      (`PSA_ECC_FAMILY_xxx`).
+ * \return              \c 0 on failure (\p grpid is not recognized).
+ */
+static inline psa_ecc_family_t mbedtls_ecc_group_to_psa( mbedtls_ecp_group_id grpid,
+                                                        size_t *bits )
+{
+    switch( grpid )
+    {
+        case MBEDTLS_ECP_DP_SECP192R1:
+            *bits = 192;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP224R1:
+            *bits = 224;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP256R1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP384R1:
+            *bits = 384;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_SECP521R1:
+            *bits = 521;
+            return( PSA_ECC_FAMILY_SECP_R1 );
+        case MBEDTLS_ECP_DP_BP256R1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_BP384R1:
+            *bits = 384;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_BP512R1:
+            *bits = 512;
+            return( PSA_ECC_FAMILY_BRAINPOOL_P_R1 );
+        case MBEDTLS_ECP_DP_CURVE25519:
+            *bits = 255;
+            return( PSA_ECC_FAMILY_MONTGOMERY );
+        case MBEDTLS_ECP_DP_SECP192K1:
+            *bits = 192;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_SECP224K1:
+            *bits = 224;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_SECP256K1:
+            *bits = 256;
+            return( PSA_ECC_FAMILY_SECP_K1 );
+        case MBEDTLS_ECP_DP_CURVE448:
+            *bits = 448;
+            return( PSA_ECC_FAMILY_MONTGOMERY );
+        default:
+            *bits = 0;
+            return( 0 );
+    }
+}
+
+/** Convert an ECC curve identifier from the PSA encoding to Mbed TLS.
+ *
+ * \note This function is provided solely for the convenience of
+ *       Mbed TLS and may be removed at any time without notice.
+ *
+ * \param curve         A PSA elliptic curve identifier
+ *                      (`PSA_ECC_FAMILY_xxx`).
+ * \param bits          The bit-length of a private key on \p curve.
+ * \param bits_is_sloppy If true, \p bits may be the bit-length rounded up
+ *                      to the nearest multiple of 8. This allows the caller
+ *                      to infer the exact curve from the length of a key
+ *                      which is supplied as a byte string.
+ *
+ * \return              The corresponding Mbed TLS elliptic curve identifier
+ *                      (`MBEDTLS_ECP_DP_xxx`).
+ * \return              #MBEDTLS_ECP_DP_NONE if \c curve is not recognized.
+ * \return              #MBEDTLS_ECP_DP_NONE if \p bits is not
+ *                      correct for \p curve.
+ */
+mbedtls_ecp_group_id mbedtls_ecc_group_of_psa( psa_ecc_family_t curve,
+                                               size_t bits,
+                                               int bits_is_sloppy );
+#endif /* MBEDTLS_ECP_C */
+
+/**@}*/
+
+/** \defgroup psa_external_rng External random generator
+ * @{
+ */
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+/** External random generator function, implemented by the platform.
+ *
+ * When the compile-time option #MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG is enabled,
+ * this function replaces Mbed TLS's entropy and DRBG modules for all
+ * random generation triggered via PSA crypto interfaces.
+ *
+ * \note This random generator must deliver random numbers with cryptographic
+ *       quality and high performance. It must supply unpredictable numbers
+ *       with a uniform distribution. The implementation of this function
+ *       is responsible for ensuring that the random generator is seeded
+ *       with sufficient entropy. If you have a hardware TRNG which is slow
+ *       or delivers non-uniform output, declare it as an entropy source
+ *       with mbedtls_entropy_add_source() instead of enabling this option.
+ *
+ * \param[in,out] context       Pointer to the random generator context.
+ *                              This is all-bits-zero on the first call
+ *                              and preserved between successive calls.
+ * \param[out] output           Output buffer. On success, this buffer
+ *                              contains random data with a uniform
+ *                              distribution.
+ * \param output_size           The size of the \p output buffer in bytes.
+ * \param[out] output_length    On success, set this value to \p output_size.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success. The output buffer contains \p output_size bytes of
+ *         cryptographic-quality random data, and \c *output_length is
+ *         set to \p output_size.
+ * \retval #PSA_ERROR_INSUFFICIENT_ENTROPY
+ *         The random generator requires extra entropy and there is no
+ *         way to obtain entropy under current environment conditions.
+ *         This error should not happen under normal circumstances since
+ *         this function is responsible for obtaining as much entropy as
+ *         it needs. However implementations of this function may return
+ *         #PSA_ERROR_INSUFFICIENT_ENTROPY if there is no way to obtain
+ *         entropy without blocking indefinitely.
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ *         A failure of the random generator hardware that isn't covered
+ *         by #PSA_ERROR_INSUFFICIENT_ENTROPY.
+ */
+psa_status_t mbedtls_psa_external_get_random(
+    mbedtls_psa_external_random_context_t *context,
+    uint8_t *output, size_t output_size, size_t *output_length );
+#endif /* MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG */
+
+/**@}*/
+
+/** \defgroup psa_builtin_keys Built-in keys
+ * @{
+ */
+
+/** The minimum value for a key identifier that is built into the
+ * implementation.
+ *
+ * The range of key identifiers from #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN
+ * to #MBEDTLS_PSA_KEY_ID_BUILTIN_MAX within the range from
+ * #PSA_KEY_ID_VENDOR_MIN and #PSA_KEY_ID_VENDOR_MAX and must not intersect
+ * with any other set of implementation-chosen key identifiers.
+ *
+ * This value is part of the library's ABI since changing it would invalidate
+ * the values of built-in key identifiers in applications.
+ */
+#define MBEDTLS_PSA_KEY_ID_BUILTIN_MIN          ((psa_key_id_t)0x7fff0000)
+
+/** The maximum value for a key identifier that is built into the
+ * implementation.
+ *
+ * See #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN for more information.
+ */
+#define MBEDTLS_PSA_KEY_ID_BUILTIN_MAX          ((psa_key_id_t)0x7fffefff)
+
+/** A slot number identifying a key in a driver.
+ *
+ * Values of this type are used to identify built-in keys.
+ */
+typedef uint64_t psa_drv_slot_number_t;
+
+#if defined(MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS)
+/** Test whether a key identifier belongs to the builtin key range.
+ *
+ * \param key_id  Key identifier to test.
+ *
+ * \retval 1
+ *         The key identifier is a builtin key identifier.
+ * \retval 0
+ *         The key identifier is not a builtin key identifier.
+ */
+static inline int psa_key_id_is_builtin( psa_key_id_t key_id )
+{
+    return( ( key_id >= MBEDTLS_PSA_KEY_ID_BUILTIN_MIN ) &&
+            ( key_id <= MBEDTLS_PSA_KEY_ID_BUILTIN_MAX ) );
+}
+
+/** Platform function to obtain the location and slot number of a built-in key.
+ *
+ * An application-specific implementation of this function must be provided if
+ * #MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS is enabled. This would typically be provided
+ * as part of a platform's system image.
+ *
+ * #MBEDTLS_SVC_KEY_ID_GET_KEY_ID(\p key_id) needs to be in the range from
+ * #MBEDTLS_PSA_KEY_ID_BUILTIN_MIN to #MBEDTLS_PSA_KEY_ID_BUILTIN_MAX.
+ *
+ * In a multi-application configuration
+ * (\c MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER is defined),
+ * this function should check that #MBEDTLS_SVC_KEY_ID_GET_OWNER_ID(\p key_id)
+ * is allowed to use the given key.
+ *
+ * \param key_id                The key ID for which to retrieve the
+ *                              location and slot attributes.
+ * \param[out] lifetime         On success, the lifetime associated with the key
+ *                              corresponding to \p key_id. Lifetime is a
+ *                              combination of which driver contains the key,
+ *                              and with what persistence level the key is
+ *                              intended to be used. If the platform
+ *                              implementation does not contain specific
+ *                              information about the intended key persistence
+ *                              level, the persistence level may be reported as
+ *                              #PSA_KEY_PERSISTENCE_DEFAULT.
+ * \param[out] slot_number      On success, the slot number known to the driver
+ *                              registered at the lifetime location reported
+ *                              through \p lifetime which corresponds to the
+ *                              requested built-in key.
+ *
+ * \retval #PSA_SUCCESS
+ *         The requested key identifier designates a built-in key.
+ *         In a multi-application configuration, the requested owner
+ *         is allowed to access it.
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ *         The requested key identifier is not a built-in key which is known
+ *         to this function. If a key exists in the key storage with this
+ *         identifier, the data from the storage will be used.
+ * \return (any other error)
+ *         Any other error is propagated to the function that requested the key.
+ *         Common errors include:
+ *         - #PSA_ERROR_NOT_PERMITTED: the key exists but the requested owner
+ *           is not allowed to access it.
+ */
+psa_status_t mbedtls_psa_platform_get_builtin_key(
+    mbedtls_svc_key_id_t key_id,
+    psa_key_lifetime_t *lifetime,
+    psa_drv_slot_number_t *slot_number );
+#endif /* MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS */
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_EXTRA_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_platform.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_platform.h
new file mode 100644
index 00000000000..66f46879305
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_platform.h
@@ -0,0 +1,111 @@
+/**
+ * \file psa/crypto_platform.h
+ *
+ * \brief PSA cryptography module: Mbed TLS platform definitions
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains platform-dependent type definitions.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, implementers should take care to ensure that
+ * the definitions that are exposed to applications match what the
+ * module implements.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_PLATFORM_H
+#define PSA_CRYPTO_PLATFORM_H
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+/* Translate between classic MBEDTLS_xxx feature symbols and PSA_xxx
+ * feature symbols. */
+#include "mbedtls/config_psa.h"
+
+/* PSA requires several types which C99 provides in stdint.h. */
+#include <stdint.h>
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+    !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+#if defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+
+/* Building for the PSA Crypto service on a PSA platform, a key owner is a PSA
+ * partition identifier.
+ *
+ * The function psa_its_identifier_of_slot() in psa_crypto_storage.c that
+ * translates a key identifier to a key storage file name assumes that
+ * mbedtls_key_owner_id_t is an 32 bits integer. This function thus needs
+ * reworking if mbedtls_key_owner_id_t is not defined as a 32 bits integer
+ * here anymore.
+ */
+typedef int32_t mbedtls_key_owner_id_t;
+
+/** Compare two key owner identifiers.
+ *
+ * \param id1 First key owner identifier.
+ * \param id2 Second key owner identifier.
+ *
+ * \return Non-zero if the two key owner identifiers are equal, zero otherwise.
+ */
+static inline int mbedtls_key_owner_id_equal( mbedtls_key_owner_id_t id1,
+                                              mbedtls_key_owner_id_t id2 )
+{
+    return( id1 == id2 );
+}
+
+#endif /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/*
+ * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is being built for SPM
+ * (Secure Partition Manager) integration which separates the code into two
+ * parts: NSPE (Non-Secure Processing Environment) and SPE (Secure Processing
+ * Environment). When building for the SPE, an additional header file should be
+ * included.
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_SPM)
+#define PSA_CRYPTO_SECURE 1
+#include "crypto_spe.h"
+#endif // MBEDTLS_PSA_CRYPTO_SPM
+
+#if defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG)
+/** The type of the context passed to mbedtls_psa_external_get_random().
+ *
+ * Mbed TLS initializes the context to all-bits-zero before calling
+ * mbedtls_psa_external_get_random() for the first time.
+ *
+ * The definition of this type in the Mbed TLS source code is for
+ * demonstration purposes. Implementers of mbedtls_psa_external_get_random()
+ * are expected to replace it with a custom definition.
+ */
+typedef struct {
+    uintptr_t opaque[2];
+} mbedtls_psa_external_random_context_t;
+#endif /* MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG */
+
+#endif /* PSA_CRYPTO_PLATFORM_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h
new file mode 100644
index 00000000000..1dc8f9b5c40
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_se_driver.h
@@ -0,0 +1,1395 @@
+/**
+ * \file psa/crypto_se_driver.h
+ * \brief PSA external cryptoprocessor driver module
+ *
+ * This header declares types and function signatures for cryptography
+ * drivers that access key material via opaque references.
+ * This is meant for cryptoprocessors that have a separate key storage from the
+ * space in which the PSA Crypto implementation runs, typically secure
+ * elements (SEs).
+ *
+ * This file is part of the PSA Crypto Driver HAL (hardware abstraction layer),
+ * containing functions for driver developers to implement to enable hardware
+ * to be called in a standardized way by a PSA Cryptography API
+ * implementation. The functions comprising the driver HAL, which driver
+ * authors implement, are not intended to be called by application developers.
+ */
+
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef PSA_CRYPTO_SE_DRIVER_H
+#define PSA_CRYPTO_SE_DRIVER_H
+
+#include "crypto_driver_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup se_init Secure element driver initialization
+ */
+/**@{*/
+
+/** \brief Driver context structure
+ *
+ * Driver functions receive a pointer to this structure.
+ * Each registered driver has one instance of this structure.
+ *
+ * Implementations must include the fields specified here and
+ * may include other fields.
+ */
+typedef struct {
+    /** A read-only pointer to the driver's persistent data.
+     *
+     * Drivers typically use this persistent data to keep track of
+     * which slot numbers are available. This is only a guideline:
+     * drivers may use the persistent data for any purpose, keeping
+     * in mind the restrictions on when the persistent data is saved
+     * to storage: the persistent data is only saved after calling
+     * certain functions that receive a writable pointer to the
+     * persistent data.
+     *
+     * The core allocates a memory buffer for the persistent data.
+     * The pointer is guaranteed to be suitably aligned for any data type,
+     * like a pointer returned by `malloc` (but the core can use any
+     * method to allocate the buffer, not necessarily `malloc`).
+     *
+     * The size of this buffer is in the \c persistent_data_size field of
+     * this structure.
+     *
+     * Before the driver is initialized for the first time, the content of
+     * the persistent data is all-bits-zero. After a driver upgrade, if the
+     * size of the persistent data has increased, the original data is padded
+     * on the right with zeros; if the size has decreased, the original data
+     * is truncated to the new size.
+     *
+     * This pointer is to read-only data. Only a few driver functions are
+     * allowed to modify the persistent data. These functions receive a
+     * writable pointer. These functions are:
+     * - psa_drv_se_t::p_init
+     * - psa_drv_se_key_management_t::p_allocate
+     * - psa_drv_se_key_management_t::p_destroy
+     *
+     * The PSA Cryptography core saves the persistent data from one
+     * session to the next. It does this before returning from API functions
+     * that call a driver method that is allowed to modify the persistent
+     * data, specifically:
+     * - psa_crypto_init() causes a call to psa_drv_se_t::p_init, and may call
+     *   psa_drv_se_key_management_t::p_destroy to complete an action
+     *   that was interrupted by a power failure.
+     * - Key creation functions cause a call to
+     *   psa_drv_se_key_management_t::p_allocate, and may cause a call to
+     *   psa_drv_se_key_management_t::p_destroy in case an error occurs.
+     * - psa_destroy_key() causes a call to
+     *   psa_drv_se_key_management_t::p_destroy.
+     */
+    const void *const persistent_data;
+
+    /** The size of \c persistent_data in bytes.
+     *
+     * This is always equal to the value of the `persistent_data_size` field
+     * of the ::psa_drv_se_t structure when the driver is registered.
+     */
+    const size_t persistent_data_size;
+
+    /** Driver transient data.
+     *
+     * The core initializes this value to 0 and does not read or modify it
+     * afterwards. The driver may store whatever it wants in this field.
+     */
+    uintptr_t transient_data;
+} psa_drv_se_context_t;
+
+/** \brief A driver initialization function.
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param location                  The location value for which this driver
+ *                                  is registered. The driver will be invoked
+ *                                  for all keys whose lifetime is in this
+ *                                  location.
+ *
+ * \retval #PSA_SUCCESS
+ *         The driver is operational.
+ *         The core will update the persistent data in storage.
+ * \return
+ *         Any other return value prevents the driver from being used in
+ *         this session.
+ *         The core will NOT update the persistent data in storage.
+ */
+typedef psa_status_t (*psa_drv_se_init_t)(psa_drv_se_context_t *drv_context,
+                                          void *persistent_data,
+                                          psa_key_location_t location);
+
+#if defined(__DOXYGEN_ONLY__) || !defined(MBEDTLS_PSA_CRYPTO_SE_C)
+/* Mbed Crypto with secure element support enabled defines this type in
+ * crypto_types.h because it is also visible to applications through an
+ * implementation-specific extension.
+ * For the PSA Cryptography specification, this type is only visible
+ * via crypto_se_driver.h. */
+/** An internal designation of a key slot between the core part of the
+ * PSA Crypto implementation and the driver. The meaning of this value
+ * is driver-dependent. */
+typedef uint64_t psa_key_slot_number_t;
+#endif /* __DOXYGEN_ONLY__ || !MBEDTLS_PSA_CRYPTO_SE_C */
+
+/**@}*/
+
+/** \defgroup se_mac Secure Element Message Authentication Codes
+ * Generation and authentication of Message Authentication Codes (MACs) using
+ * a secure element can be done either as a single function call (via the
+ * `psa_drv_se_mac_generate_t` or `psa_drv_se_mac_verify_t` functions), or in
+ * parts using the following sequence:
+ * - `psa_drv_se_mac_setup_t`
+ * - `psa_drv_se_mac_update_t`
+ * - `psa_drv_se_mac_update_t`
+ * - ...
+ * - `psa_drv_se_mac_finish_t` or `psa_drv_se_mac_finish_verify_t`
+ *
+ * If a previously started secure element MAC operation needs to be terminated,
+ * it should be done so by the `psa_drv_se_mac_abort_t`. Failure to do so may
+ * result in allocated resources not being freed or in other undefined
+ * behavior.
+ */
+/**@{*/
+/** \brief A function that starts a secure element  MAC operation for a PSA
+ * Crypto Driver implementation
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A structure that will contain the
+ *                              hardware-specific MAC context
+ * \param[in] key_slot          The slot of the key to be used for the
+ *                              operation
+ * \param[in] algorithm         The algorithm to be used to underly the MAC
+ *                              operation
+ *
+ * \retval  #PSA_SUCCESS
+ *          Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_setup_t)(psa_drv_se_context_t *drv_context,
+                                               void *op_context,
+                                               psa_key_slot_number_t key_slot,
+                                               psa_algorithm_t algorithm);
+
+/** \brief A function that continues a previously started secure element MAC
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously-established MAC operation to be
+ *                              updated
+ * \param[in] p_input           A buffer containing the message to be appended
+ *                              to the MAC operation
+ * \param[in] input_length      The size in bytes of the input message buffer
+ */
+typedef psa_status_t (*psa_drv_se_mac_update_t)(void *op_context,
+                                                const uint8_t *p_input,
+                                                size_t input_length);
+
+/** \brief a function that completes a previously started secure element MAC
+ * operation by returning the resulting MAC.
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started MAC operation to be
+ *                              finished
+ * \param[out] p_mac            A buffer where the generated MAC will be
+ *                              placed
+ * \param[in] mac_size          The size in bytes of the buffer that has been
+ *                              allocated for the `output` buffer
+ * \param[out] p_mac_length     After completion, will contain the number of
+ *                              bytes placed in the `p_mac` buffer
+ *
+ * \retval  #PSA_SUCCESS
+ *          Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_finish_t)(void *op_context,
+                                                uint8_t *p_mac,
+                                                size_t mac_size,
+                                                size_t *p_mac_length);
+
+/** \brief A function that completes a previously started secure element MAC
+ * operation by comparing the resulting MAC against a provided value
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the previously
+ *                              started MAC operation to be fiinished
+ * \param[in] p_mac             The MAC value against which the resulting MAC
+ *                              will be compared against
+ * \param[in] mac_length        The size in bytes of the value stored in `p_mac`
+ *
+ * \retval #PSA_SUCCESS
+ *         The operation completed successfully and the MACs matched each
+ *         other
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The operation completed successfully, but the calculated MAC did
+ *         not match the provided MAC
+ */
+typedef psa_status_t (*psa_drv_se_mac_finish_verify_t)(void *op_context,
+                                                       const uint8_t *p_mac,
+                                                       size_t mac_length);
+
+/** \brief A function that aborts a previous started secure element MAC
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the previously
+ *                              started MAC operation to be aborted
+ */
+typedef psa_status_t (*psa_drv_se_mac_abort_t)(void *op_context);
+
+/** \brief A function that performs a secure element MAC operation in one
+ * command and returns the calculated MAC
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] p_input           A buffer containing the message to be MACed
+ * \param[in] input_length      The size in bytes of `p_input`
+ * \param[in] key_slot          The slot of the key to be used
+ * \param[in] alg               The algorithm to be used to underlie the MAC
+ *                              operation
+ * \param[out] p_mac            A buffer where the generated MAC will be
+ *                              placed
+ * \param[in] mac_size          The size in bytes of the `p_mac` buffer
+ * \param[out] p_mac_length     After completion, will contain the number of
+ *                              bytes placed in the `output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_mac_generate_t)(psa_drv_se_context_t *drv_context,
+                                                  const uint8_t *p_input,
+                                                  size_t input_length,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t alg,
+                                                  uint8_t *p_mac,
+                                                  size_t mac_size,
+                                                  size_t *p_mac_length);
+
+/** \brief A function that performs a secure element MAC operation in one
+ * command and compares the resulting MAC against a provided value
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in] p_input       A buffer containing the message to be MACed
+ * \param[in] input_length  The size in bytes of `input`
+ * \param[in] key_slot      The slot of the key to be used
+ * \param[in] alg           The algorithm to be used to underlie the MAC
+ *                          operation
+ * \param[in] p_mac         The MAC value against which the resulting MAC will
+ *                          be compared against
+ * \param[in] mac_length   The size in bytes of `mac`
+ *
+ * \retval #PSA_SUCCESS
+ *         The operation completed successfully and the MACs matched each
+ *         other
+ * \retval #PSA_ERROR_INVALID_SIGNATURE
+ *         The operation completed successfully, but the calculated MAC did
+ *         not match the provided MAC
+ */
+typedef psa_status_t (*psa_drv_se_mac_verify_t)(psa_drv_se_context_t *drv_context,
+                                                const uint8_t *p_input,
+                                                size_t input_length,
+                                                psa_key_slot_number_t key_slot,
+                                                psa_algorithm_t alg,
+                                                const uint8_t *p_mac,
+                                                size_t mac_length);
+
+/** \brief A struct containing all of the function pointers needed to
+ * perform secure element MAC operations
+ *
+ * PSA Crypto API implementations should populate the table as appropriate
+ * upon startup.
+ *
+ * If one of the functions is not implemented (such as
+ * `psa_drv_se_mac_generate_t`), it should be set to NULL.
+ *
+ * Driver implementers should ensure that they implement all of the functions
+ * that make sense for their hardware, and that they provide a full solution
+ * (for example, if they support `p_setup`, they should also support
+ * `p_update` and at least one of `p_finish` or `p_finish_verify`).
+ *
+ */
+typedef struct {
+    /**The size in bytes of the hardware-specific secure element MAC context
+     * structure
+    */
+    size_t                    context_size;
+    /** Function that performs a MAC setup operation
+     */
+    psa_drv_se_mac_setup_t          p_setup;
+    /** Function that performs a MAC update operation
+     */
+    psa_drv_se_mac_update_t         p_update;
+    /** Function that completes a MAC operation
+     */
+    psa_drv_se_mac_finish_t         p_finish;
+    /** Function that completes a MAC operation with a verify check
+     */
+    psa_drv_se_mac_finish_verify_t  p_finish_verify;
+    /** Function that aborts a previoustly started MAC operation
+     */
+    psa_drv_se_mac_abort_t          p_abort;
+    /** Function that performs a MAC operation in one call
+     */
+    psa_drv_se_mac_generate_t       p_mac;
+    /** Function that performs a MAC and verify operation in one call
+     */
+    psa_drv_se_mac_verify_t         p_mac_verify;
+} psa_drv_se_mac_t;
+/**@}*/
+
+/** \defgroup se_cipher Secure Element Symmetric Ciphers
+ *
+ * Encryption and Decryption using secure element keys in block modes other
+ * than ECB must be done in multiple parts, using the following flow:
+ * - `psa_drv_se_cipher_setup_t`
+ * - `psa_drv_se_cipher_set_iv_t` (optional depending upon block mode)
+ * - `psa_drv_se_cipher_update_t`
+ * - `psa_drv_se_cipher_update_t`
+ * - ...
+ * - `psa_drv_se_cipher_finish_t`
+ *
+ * If a previously started secure element Cipher operation needs to be
+ * terminated, it should be done so by the `psa_drv_se_cipher_abort_t`. Failure
+ * to do so may result in allocated resources not being freed or in other
+ * undefined behavior.
+ *
+ * In situations where a PSA Cryptographic API implementation is using a block
+ * mode not-supported by the underlying hardware or driver, it can construct
+ * the block mode itself, while calling the `psa_drv_se_cipher_ecb_t` function
+ * for the cipher operations.
+ */
+/**@{*/
+
+/** \brief A function that provides the cipher setup function for a
+ * secure element driver
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A structure that will contain the
+ *                              hardware-specific cipher context.
+ * \param[in] key_slot          The slot of the key to be used for the
+ *                              operation
+ * \param[in] algorithm         The algorithm to be used in the cipher
+ *                              operation
+ * \param[in] direction         Indicates whether the operation is an encrypt
+ *                              or decrypt
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ */
+typedef psa_status_t (*psa_drv_se_cipher_setup_t)(psa_drv_se_context_t *drv_context,
+                                                  void *op_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  psa_encrypt_or_decrypt_t direction);
+
+/** \brief A function that sets the initialization vector (if
+ * necessary) for an secure element cipher operation
+ *
+ * Rationale: The `psa_se_cipher_*` operation in the PSA Cryptographic API has
+ * two IV functions: one to set the IV, and one to generate it internally. The
+ * generate function is not necessary for the drivers to implement as the PSA
+ * Crypto implementation can do the generation using its RNG features.
+ *
+ * \param[in,out] op_context    A structure that contains the previously set up
+ *                              hardware-specific cipher context
+ * \param[in] p_iv              A buffer containing the initialization vector
+ * \param[in] iv_length         The size (in bytes) of the `p_iv` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_set_iv_t)(void *op_context,
+                                                   const uint8_t *p_iv,
+                                                   size_t iv_length);
+
+/** \brief A function that continues a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context        A hardware-specific structure for the
+ *                                  previously started cipher operation
+ * \param[in] p_input               A buffer containing the data to be
+ *                                  encrypted/decrypted
+ * \param[in] input_size            The size in bytes of the buffer pointed to
+ *                                  by `p_input`
+ * \param[out] p_output             The caller-allocated buffer where the
+ *                                  output will be placed
+ * \param[in] output_size           The allocated size in bytes of the
+ *                                  `p_output` buffer
+ * \param[out] p_output_length      After completion, will contain the number
+ *                                  of bytes placed in the `p_output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_update_t)(void *op_context,
+                                                   const uint8_t *p_input,
+                                                   size_t input_size,
+                                                   uint8_t *p_output,
+                                                   size_t output_size,
+                                                   size_t *p_output_length);
+
+/** \brief A function that completes a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started cipher operation
+ * \param[out] p_output         The caller-allocated buffer where the output
+ *                              will be placed
+ * \param[in] output_size       The allocated size in bytes of the `p_output`
+ *                              buffer
+ * \param[out] p_output_length  After completion, will contain the number of
+ *                              bytes placed in the `p_output` buffer
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_cipher_finish_t)(void *op_context,
+                                                   uint8_t *p_output,
+                                                   size_t output_size,
+                                                   size_t *p_output_length);
+
+/** \brief A function that aborts a previously started secure element cipher
+ * operation
+ *
+ * \param[in,out] op_context    A hardware-specific structure for the
+ *                              previously started cipher operation
+ */
+typedef psa_status_t (*psa_drv_se_cipher_abort_t)(void *op_context);
+
+/** \brief A function that performs the ECB block mode for secure element
+ * cipher operations
+ *
+ * Note: this function should only be used with implementations that do not
+ * provide a needed higher-level operation.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          The slot of the key to be used for the operation
+ * \param[in] algorithm         The algorithm to be used in the cipher operation
+ * \param[in] direction         Indicates whether the operation is an encrypt or
+ *                              decrypt
+ * \param[in] p_input           A buffer containing the data to be
+ *                              encrypted/decrypted
+ * \param[in] input_size        The size in bytes of the buffer pointed to by
+ *                              `p_input`
+ * \param[out] p_output         The caller-allocated buffer where the output
+ *                              will be placed
+ * \param[in] output_size       The allocated size in bytes of the `p_output`
+ *                              buffer
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ */
+typedef psa_status_t (*psa_drv_se_cipher_ecb_t)(psa_drv_se_context_t *drv_context,
+                                                psa_key_slot_number_t key_slot,
+                                                psa_algorithm_t algorithm,
+                                                psa_encrypt_or_decrypt_t direction,
+                                                const uint8_t *p_input,
+                                                size_t input_size,
+                                                uint8_t *p_output,
+                                                size_t output_size);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * cipher operations using secure elements.
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented (such as
+ * `psa_drv_se_cipher_ecb_t`), it should be set to NULL.
+ */
+typedef struct {
+    /** The size in bytes of the hardware-specific secure element cipher
+     * context structure
+     */
+    size_t               context_size;
+    /** Function that performs a cipher setup operation */
+    psa_drv_se_cipher_setup_t  p_setup;
+    /** Function that sets a cipher IV (if necessary) */
+    psa_drv_se_cipher_set_iv_t p_set_iv;
+    /** Function that performs a cipher update operation */
+    psa_drv_se_cipher_update_t p_update;
+    /** Function that completes a cipher operation */
+    psa_drv_se_cipher_finish_t p_finish;
+    /** Function that aborts a cipher operation */
+    psa_drv_se_cipher_abort_t  p_abort;
+    /** Function that performs ECB mode for a cipher operation
+     * (Danger: ECB mode should not be used directly by clients of the PSA
+     * Crypto Client API)
+     */
+    psa_drv_se_cipher_ecb_t    p_ecb;
+} psa_drv_se_cipher_t;
+
+/**@}*/
+
+/** \defgroup se_asymmetric Secure Element Asymmetric Cryptography
+ *
+ * Since the amount of data that can (or should) be encrypted or signed using
+ * asymmetric keys is limited by the key size, asymmetric key operations using
+ * keys in a secure element must be done in single function calls.
+ */
+/**@{*/
+
+/**
+ * \brief A function that signs a hash or short message with a private key in
+ * a secure element
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in] key_slot              Key slot of an asymmetric key pair
+ * \param[in] alg                   A signature algorithm that is compatible
+ *                                  with the type of `key`
+ * \param[in] p_hash                The hash to sign
+ * \param[in] hash_length           Size of the `p_hash` buffer in bytes
+ * \param[out] p_signature          Buffer where the signature is to be written
+ * \param[in] signature_size        Size of the `p_signature` buffer in bytes
+ * \param[out] p_signature_length   On success, the number of bytes
+ *                                  that make up the returned signature value
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_sign_t)(psa_drv_se_context_t *drv_context,
+                                                     psa_key_slot_number_t key_slot,
+                                                     psa_algorithm_t alg,
+                                                     const uint8_t *p_hash,
+                                                     size_t hash_length,
+                                                     uint8_t *p_signature,
+                                                     size_t signature_size,
+                                                     size_t *p_signature_length);
+
+/**
+ * \brief A function that verifies the signature a hash or short message using
+ * an asymmetric public key in a secure element
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of a public key or an asymmetric key
+ *                              pair
+ * \param[in] alg               A signature algorithm that is compatible with
+ *                              the type of `key`
+ * \param[in] p_hash            The hash whose signature is to be verified
+ * \param[in] hash_length       Size of the `p_hash` buffer in bytes
+ * \param[in] p_signature       Buffer containing the signature to verify
+ * \param[in] signature_length  Size of the `p_signature` buffer in bytes
+ *
+ * \retval #PSA_SUCCESS
+ *         The signature is valid.
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_verify_t)(psa_drv_se_context_t *drv_context,
+                                                       psa_key_slot_number_t key_slot,
+                                                       psa_algorithm_t alg,
+                                                       const uint8_t *p_hash,
+                                                       size_t hash_length,
+                                                       const uint8_t *p_signature,
+                                                       size_t signature_length);
+
+/**
+ * \brief A function that encrypts a short message with an asymmetric public
+ * key in a secure element
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of a public key or an asymmetric key
+ *                              pair
+ * \param[in] alg               An asymmetric encryption algorithm that is
+ *                              compatible with the type of `key`
+ * \param[in] p_input           The message to encrypt
+ * \param[in] input_length      Size of the `p_input` buffer in bytes
+ * \param[in] p_salt            A salt or label, if supported by the
+ *                              encryption algorithm
+ *                              If the algorithm does not support a
+ *                              salt, pass `NULL`.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass `NULL`.
+ *                              For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                              supported.
+ * \param[in] salt_length       Size of the `p_salt` buffer in bytes
+ *                              If `p_salt` is `NULL`, pass 0.
+ * \param[out] p_output         Buffer where the encrypted message is to
+ *                              be written
+ * \param[in] output_size       Size of the `p_output` buffer in bytes
+ * \param[out] p_output_length  On success, the number of bytes that make up
+ *                              the returned output
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_encrypt_t)(psa_drv_se_context_t *drv_context,
+                                                        psa_key_slot_number_t key_slot,
+                                                        psa_algorithm_t alg,
+                                                        const uint8_t *p_input,
+                                                        size_t input_length,
+                                                        const uint8_t *p_salt,
+                                                        size_t salt_length,
+                                                        uint8_t *p_output,
+                                                        size_t output_size,
+                                                        size_t *p_output_length);
+
+/**
+ * \brief A function that decrypts a short message with an asymmetric private
+ * key in a secure element.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key_slot          Key slot of an asymmetric key pair
+ * \param[in] alg               An asymmetric encryption algorithm that is
+ *                              compatible with the type of `key`
+ * \param[in] p_input           The message to decrypt
+ * \param[in] input_length      Size of the `p_input` buffer in bytes
+ * \param[in] p_salt            A salt or label, if supported by the
+ *                              encryption algorithm
+ *                              If the algorithm does not support a
+ *                              salt, pass `NULL`.
+ *                              If the algorithm supports an optional
+ *                              salt and you do not want to pass a salt,
+ *                              pass `NULL`.
+ *                              For #PSA_ALG_RSA_PKCS1V15_CRYPT, no salt is
+ *                              supported.
+ * \param[in] salt_length       Size of the `p_salt` buffer in bytes
+ *                              If `p_salt` is `NULL`, pass 0.
+ * \param[out] p_output         Buffer where the decrypted message is to
+ *                              be written
+ * \param[in] output_size       Size of the `p_output` buffer in bytes
+ * \param[out] p_output_length  On success, the number of bytes
+ *                              that make up the returned output
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_asymmetric_decrypt_t)(psa_drv_se_context_t *drv_context,
+                                                        psa_key_slot_number_t key_slot,
+                                                        psa_algorithm_t alg,
+                                                        const uint8_t *p_input,
+                                                        size_t input_length,
+                                                        const uint8_t *p_salt,
+                                                        size_t salt_length,
+                                                        uint8_t *p_output,
+                                                        size_t output_size,
+                                                        size_t *p_output_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * asymmetric cryptographic operations using secure elements.
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that performs an asymmetric sign operation */
+    psa_drv_se_asymmetric_sign_t    p_sign;
+    /** Function that performs an asymmetric verify operation */
+    psa_drv_se_asymmetric_verify_t  p_verify;
+    /** Function that performs an asymmetric encrypt operation */
+    psa_drv_se_asymmetric_encrypt_t p_encrypt;
+    /** Function that performs an asymmetric decrypt operation */
+    psa_drv_se_asymmetric_decrypt_t p_decrypt;
+} psa_drv_se_asymmetric_t;
+
+/**@}*/
+
+/** \defgroup se_aead Secure Element Authenticated Encryption with Additional Data
+ * Authenticated Encryption with Additional Data (AEAD) operations with secure
+ * elements must be done in one function call. While this creates a burden for
+ * implementers as there must be sufficient space in memory for the entire
+ * message, it prevents decrypted data from being made available before the
+ * authentication operation is complete and the data is known to be authentic.
+ */
+/**@{*/
+
+/** \brief A function that performs a secure element authenticated encryption
+ * operation
+ *
+ * \param[in,out] drv_context           The driver context structure.
+ * \param[in] key_slot                  Slot containing the key to use.
+ * \param[in] algorithm                 The AEAD algorithm to compute
+ *                                      (\c PSA_ALG_XXX value such that
+ *                                      #PSA_ALG_IS_AEAD(`alg`) is true)
+ * \param[in] p_nonce                   Nonce or IV to use
+ * \param[in] nonce_length              Size of the `p_nonce` buffer in bytes
+ * \param[in] p_additional_data         Additional data that will be
+ *                                      authenticated but not encrypted
+ * \param[in] additional_data_length    Size of `p_additional_data` in bytes
+ * \param[in] p_plaintext               Data that will be authenticated and
+ *                                      encrypted
+ * \param[in] plaintext_length          Size of `p_plaintext` in bytes
+ * \param[out] p_ciphertext             Output buffer for the authenticated and
+ *                                      encrypted data. The additional data is
+ *                                      not part of this output. For algorithms
+ *                                      where the encrypted data and the
+ *                                      authentication tag are defined as
+ *                                      separate outputs, the authentication
+ *                                      tag is appended to the encrypted data.
+ * \param[in] ciphertext_size           Size of the `p_ciphertext` buffer in
+ *                                      bytes
+ * \param[out] p_ciphertext_length      On success, the size of the output in
+ *                                      the `p_ciphertext` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_aead_encrypt_t)(psa_drv_se_context_t *drv_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  const uint8_t *p_nonce,
+                                                  size_t nonce_length,
+                                                  const uint8_t *p_additional_data,
+                                                  size_t additional_data_length,
+                                                  const uint8_t *p_plaintext,
+                                                  size_t plaintext_length,
+                                                  uint8_t *p_ciphertext,
+                                                  size_t ciphertext_size,
+                                                  size_t *p_ciphertext_length);
+
+/** A function that peforms a secure element authenticated decryption operation
+ *
+ * \param[in,out] drv_context           The driver context structure.
+ * \param[in] key_slot                  Slot containing the key to use
+ * \param[in] algorithm                 The AEAD algorithm to compute
+ *                                      (\c PSA_ALG_XXX value such that
+ *                                      #PSA_ALG_IS_AEAD(`alg`) is true)
+ * \param[in] p_nonce                   Nonce or IV to use
+ * \param[in] nonce_length              Size of the `p_nonce` buffer in bytes
+ * \param[in] p_additional_data         Additional data that has been
+ *                                      authenticated but not encrypted
+ * \param[in] additional_data_length    Size of `p_additional_data` in bytes
+ * \param[in] p_ciphertext              Data that has been authenticated and
+ *                                      encrypted.
+ *                                      For algorithms where the encrypted data
+ *                                      and the authentication tag are defined
+ *                                      as separate inputs, the buffer must
+ *                                      contain the encrypted data followed by
+ *                                      the authentication tag.
+ * \param[in] ciphertext_length         Size of `p_ciphertext` in bytes
+ * \param[out] p_plaintext              Output buffer for the decrypted data
+ * \param[in] plaintext_size            Size of the `p_plaintext` buffer in
+ *                                      bytes
+ * \param[out] p_plaintext_length       On success, the size of the output in
+ *                                      the `p_plaintext` buffer
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_aead_decrypt_t)(psa_drv_se_context_t *drv_context,
+                                                  psa_key_slot_number_t key_slot,
+                                                  psa_algorithm_t algorithm,
+                                                  const uint8_t *p_nonce,
+                                                  size_t nonce_length,
+                                                  const uint8_t *p_additional_data,
+                                                  size_t additional_data_length,
+                                                  const uint8_t *p_ciphertext,
+                                                  size_t ciphertext_length,
+                                                  uint8_t *p_plaintext,
+                                                  size_t plaintext_size,
+                                                  size_t *p_plaintext_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to implement
+ * secure element Authenticated Encryption with Additional Data operations
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that performs the AEAD encrypt operation */
+    psa_drv_se_aead_encrypt_t p_encrypt;
+    /** Function that performs the AEAD decrypt operation */
+    psa_drv_se_aead_decrypt_t p_decrypt;
+} psa_drv_se_aead_t;
+/**@}*/
+
+/** \defgroup se_key_management Secure Element Key Management
+ * Currently, key management is limited to importing keys in the clear,
+ * destroying keys, and exporting keys in the clear.
+ * Whether a key may be exported is determined by the key policies in place
+ * on the key slot.
+ */
+/**@{*/
+
+/** An enumeration indicating how a key is created.
+ */
+typedef enum
+{
+    PSA_KEY_CREATION_IMPORT, /**< During psa_import_key() */
+    PSA_KEY_CREATION_GENERATE, /**< During psa_generate_key() */
+    PSA_KEY_CREATION_DERIVE, /**< During psa_key_derivation_output_key() */
+    PSA_KEY_CREATION_COPY, /**< During psa_copy_key() */
+
+#ifndef __DOXYGEN_ONLY__
+    /** A key is being registered with mbedtls_psa_register_se_key().
+     *
+     * The core only passes this value to
+     * psa_drv_se_key_management_t::p_validate_slot_number, not to
+     * psa_drv_se_key_management_t::p_allocate. The call to
+     * `p_validate_slot_number` is not followed by any other call to the
+     * driver: the key is considered successfully registered if the call to
+     * `p_validate_slot_number` succeeds, or if `p_validate_slot_number` is
+     * null.
+     *
+     * With this creation method, the driver must return #PSA_SUCCESS if
+     * the given attributes are compatible with the existing key in the slot,
+     * and #PSA_ERROR_DOES_NOT_EXIST if the driver can determine that there
+     * is no key with the specified slot number.
+     *
+     * This is an Mbed Crypto extension.
+     */
+    PSA_KEY_CREATION_REGISTER,
+#endif
+} psa_key_creation_method_t;
+
+/** \brief A function that allocates a slot for a key.
+ *
+ * To create a key in a specific slot in a secure element, the core
+ * first calls this function to determine a valid slot number,
+ * then calls a function to create the key material in that slot.
+ * In nominal conditions (that is, if no error occurs),
+ * the effect of a call to a key creation function in the PSA Cryptography
+ * API with a lifetime that places the key in a secure element is the
+ * following:
+ * -# The core calls psa_drv_se_key_management_t::p_allocate
+ *    (or in some implementations
+ *    psa_drv_se_key_management_t::p_validate_slot_number). The driver
+ *    selects (or validates) a suitable slot number given the key attributes
+ *    and the state of the secure element.
+ * -# The core calls a key creation function in the driver.
+ *
+ * The key creation functions in the PSA Cryptography API are:
+ * - psa_import_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_IMPORT
+ *   then a call to psa_drv_se_key_management_t::p_import.
+ * - psa_generate_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_GENERATE
+ *   then a call to psa_drv_se_key_management_t::p_import.
+ * - psa_key_derivation_output_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_DERIVE
+ *   then a call to psa_drv_se_key_derivation_t::p_derive.
+ * - psa_copy_key(), which causes
+ *   a call to `p_allocate` with \p method = #PSA_KEY_CREATION_COPY
+ *   then a call to psa_drv_se_key_management_t::p_export.
+ *
+ * In case of errors, other behaviors are possible.
+ * - If the PSA Cryptography subsystem dies after the first step,
+ *   for example because the device has lost power abruptly,
+ *   the second step may never happen, or may happen after a reset
+ *   and re-initialization. Alternatively, after a reset and
+ *   re-initialization, the core may call
+ *   psa_drv_se_key_management_t::p_destroy on the slot number that
+ *   was allocated (or validated) instead of calling a key creation function.
+ * - If an error occurs, the core may call
+ *   psa_drv_se_key_management_t::p_destroy on the slot number that
+ *   was allocated (or validated) instead of calling a key creation function.
+ *
+ * Errors and system resets also have an impact on the driver's persistent
+ * data. If a reset happens before the overall key creation process is
+ * completed (before or after the second step above), it is unspecified
+ * whether the persistent data after the reset is identical to what it
+ * was before or after the call to `p_allocate` (or `p_validate_slot_number`).
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param[in] attributes            Attributes of the key.
+ * \param method                    The way in which the key is being created.
+ * \param[out] key_slot             Slot where the key will be stored.
+ *                                  This must be a valid slot for a key of the
+ *                                  chosen type. It must be unoccupied.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ *         The core will record \c *key_slot as the key slot where the key
+ *         is stored and will update the persistent data in storage.
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_INSUFFICIENT_STORAGE
+ */
+typedef psa_status_t (*psa_drv_se_allocate_key_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    const psa_key_attributes_t *attributes,
+    psa_key_creation_method_t method,
+    psa_key_slot_number_t *key_slot);
+
+/** \brief A function that determines whether a slot number is valid
+ * for a key.
+ *
+ * To create a key in a specific slot in a secure element, the core
+ * first calls this function to validate the choice of slot number,
+ * then calls a function to create the key material in that slot.
+ * See the documentation of #psa_drv_se_allocate_key_t for more details.
+ *
+ * As of the PSA Cryptography API specification version 1.0, there is no way
+ * for applications to trigger a call to this function. However some
+ * implementations offer the capability to create or declare a key in
+ * a specific slot via implementation-specific means, generally for the
+ * sake of initial device provisioning or onboarding. Such a mechanism may
+ * be added to a future version of the PSA Cryptography API specification.
+ *
+ * This function may update the driver's persistent data through
+ * \p persistent_data. The core will save the updated persistent data at the
+ * end of the key creation process. See the description of
+ * ::psa_drv_se_allocate_key_t for more information.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param[in] attributes        Attributes of the key.
+ * \param method                The way in which the key is being created.
+ * \param[in] key_slot          Slot where the key is to be stored.
+ *
+ * \retval #PSA_SUCCESS
+ *         The given slot number is valid for a key with the given
+ *         attributes.
+ * \retval #PSA_ERROR_INVALID_ARGUMENT
+ *         The given slot number is not valid for a key with the
+ *         given attributes. This includes the case where the slot
+ *         number is not valid at all.
+ * \retval #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a key with the specified slot number.
+ *         Drivers may choose to return this error from the key
+ *         creation function instead.
+ */
+typedef psa_status_t (*psa_drv_se_validate_slot_number_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    const psa_key_attributes_t *attributes,
+    psa_key_creation_method_t method,
+    psa_key_slot_number_t key_slot);
+
+/** \brief A function that imports a key into a secure element in binary format
+ *
+ * This function can support any output from psa_export_key(). Refer to the
+ * documentation of psa_export_key() for the format for each key type.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param key_slot              Slot where the key will be stored.
+ *                              This must be a valid slot for a key of the
+ *                              chosen type. It must be unoccupied.
+ * \param[in] attributes        The key attributes, including the lifetime,
+ *                              the key type and the usage policy.
+ *                              Drivers should not access the key size stored
+ *                              in the attributes: it may not match the
+ *                              data passed in \p data.
+ *                              Drivers can call psa_get_key_lifetime(),
+ *                              psa_get_key_type(),
+ *                              psa_get_key_usage_flags() and
+ *                              psa_get_key_algorithm() to access this
+ *                              information.
+ * \param[in] data              Buffer containing the key data.
+ * \param[in] data_length       Size of the \p data buffer in bytes.
+ * \param[out] bits             On success, the key size in bits. The driver
+ *                              must determine this value after parsing the
+ *                              key according to the key type.
+ *                              This value is not used if the function fails.
+ *
+ * \retval #PSA_SUCCESS
+ *         Success.
+ */
+typedef psa_status_t (*psa_drv_se_import_key_t)(
+    psa_drv_se_context_t *drv_context,
+    psa_key_slot_number_t key_slot,
+    const psa_key_attributes_t *attributes,
+    const uint8_t *data,
+    size_t data_length,
+    size_t *bits);
+
+/**
+ * \brief A function that destroys a secure element key and restore the slot to
+ * its default state
+ *
+ * This function destroys the content of the key from a secure element.
+ * Implementations shall make a best effort to ensure that any previous content
+ * of the slot is unrecoverable.
+ *
+ * This function returns the specified slot to its default state.
+ *
+ * \param[in,out] drv_context       The driver context structure.
+ * \param[in,out] persistent_data   A pointer to the persistent data
+ *                                  that allows writing.
+ * \param key_slot                  The key slot to erase.
+ *
+ * \retval #PSA_SUCCESS
+ *         The slot's content, if any, has been erased.
+ */
+typedef psa_status_t (*psa_drv_se_destroy_key_t)(
+    psa_drv_se_context_t *drv_context,
+    void *persistent_data,
+    psa_key_slot_number_t key_slot);
+
+/**
+ * \brief A function that exports a secure element key in binary format
+ *
+ * The output of this function can be passed to psa_import_key() to
+ * create an equivalent object.
+ *
+ * If a key is created with `psa_import_key()` and then exported with
+ * this function, it is not guaranteed that the resulting data is
+ * identical: the implementation may choose a different representation
+ * of the same key if the format permits it.
+ *
+ * This function should generate output in the same format that
+ * `psa_export_key()` does. Refer to the
+ * documentation of `psa_export_key()` for the format for each key type.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in] key               Slot whose content is to be exported. This must
+ *                              be an occupied key slot.
+ * \param[out] p_data           Buffer where the key data is to be written.
+ * \param[in] data_size         Size of the `p_data` buffer in bytes.
+ * \param[out] p_data_length    On success, the number of bytes
+ *                              that make up the key data.
+ *
+ * \retval #PSA_SUCCESS
+ * \retval #PSA_ERROR_DOES_NOT_EXIST
+ * \retval #PSA_ERROR_NOT_PERMITTED
+ * \retval #PSA_ERROR_NOT_SUPPORTED
+ * \retval #PSA_ERROR_COMMUNICATION_FAILURE
+ * \retval #PSA_ERROR_HARDWARE_FAILURE
+ * \retval #PSA_ERROR_CORRUPTION_DETECTED
+ */
+typedef psa_status_t (*psa_drv_se_export_key_t)(psa_drv_se_context_t *drv_context,
+                                                psa_key_slot_number_t key,
+                                                uint8_t *p_data,
+                                                size_t data_size,
+                                                size_t *p_data_length);
+
+/**
+ * \brief A function that generates a symmetric or asymmetric key on a secure
+ * element
+ *
+ * If the key type \c type recorded in \p attributes
+ * is asymmetric (#PSA_KEY_TYPE_IS_ASYMMETRIC(\c type) = 1),
+ * the driver may export the public key at the time of generation,
+ * in the format documented for psa_export_public_key() by writing it
+ * to the \p pubkey buffer.
+ * This is optional, intended for secure elements that output the
+ * public key at generation time and that cannot export the public key
+ * later. Drivers that do not need this feature should leave
+ * \p *pubkey_length set to 0 and should
+ * implement the psa_drv_key_management_t::p_export_public function.
+ * Some implementations do not support this feature, in which case
+ * \p pubkey is \c NULL and \p pubkey_size is 0.
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param key_slot              Slot where the key will be stored.
+ *                              This must be a valid slot for a key of the
+ *                              chosen type. It must be unoccupied.
+ * \param[in] attributes        The key attributes, including the lifetime,
+ *                              the key type and size, and the usage policy.
+ *                              Drivers can call psa_get_key_lifetime(),
+ *                              psa_get_key_type(), psa_get_key_bits(),
+ *                              psa_get_key_usage_flags() and
+ *                              psa_get_key_algorithm() to access this
+ *                              information.
+ * \param[out] pubkey           A buffer where the driver can write the
+ *                              public key, when generating an asymmetric
+ *                              key pair.
+ *                              This is \c NULL when generating a symmetric
+ *                              key or if the core does not support
+ *                              exporting the public key at generation time.
+ * \param pubkey_size           The size of the `pubkey` buffer in bytes.
+ *                              This is 0 when generating a symmetric
+ *                              key or if the core does not support
+ *                              exporting the public key at generation time.
+ * \param[out] pubkey_length    On entry, this is always 0.
+ *                              On success, the number of bytes written to
+ *                              \p pubkey. If this is 0 or unchanged on return,
+ *                              the core will not read the \p pubkey buffer,
+ *                              and will instead call the driver's
+ *                              psa_drv_key_management_t::p_export_public
+ *                              function to export the public key when needed.
+ */
+typedef psa_status_t (*psa_drv_se_generate_key_t)(
+    psa_drv_se_context_t *drv_context,
+    psa_key_slot_number_t key_slot,
+    const psa_key_attributes_t *attributes,
+    uint8_t *pubkey, size_t pubkey_size, size_t *pubkey_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to for secure
+ * element key management
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup or at build time.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** Function that allocates a slot for a key. */
+    psa_drv_se_allocate_key_t   p_allocate;
+    /** Function that checks the validity of a slot for a key. */
+    psa_drv_se_validate_slot_number_t p_validate_slot_number;
+    /** Function that performs a key import operation */
+    psa_drv_se_import_key_t     p_import;
+    /** Function that performs a generation */
+    psa_drv_se_generate_key_t   p_generate;
+    /** Function that performs a key destroy operation */
+    psa_drv_se_destroy_key_t    p_destroy;
+    /** Function that performs a key export operation */
+    psa_drv_se_export_key_t     p_export;
+    /** Function that performs a public key export operation */
+    psa_drv_se_export_key_t     p_export_public;
+} psa_drv_se_key_management_t;
+
+/**@}*/
+
+/** \defgroup driver_derivation Secure Element Key Derivation and Agreement
+ * Key derivation is the process of generating new key material using an
+ * existing key and additional parameters, iterating through a basic
+ * cryptographic function, such as a hash.
+ * Key agreement is a part of cryptographic protocols that allows two parties
+ * to agree on the same key value, but starting from different original key
+ * material.
+ * The flows are similar, and the PSA Crypto Driver Model uses the same functions
+ * for both of the flows.
+ *
+ * There are two different final functions for the flows,
+ * `psa_drv_se_key_derivation_derive` and `psa_drv_se_key_derivation_export`.
+ * `psa_drv_se_key_derivation_derive` is used when the key material should be
+ * placed in a slot on the hardware and not exposed to the caller.
+ * `psa_drv_se_key_derivation_export` is used when the key material should be
+ * returned to the PSA Cryptographic API implementation.
+ *
+ * Different key derivation algorithms require a different number of inputs.
+ * Instead of having an API that takes as input variable length arrays, which
+ * can be problemmatic to manage on embedded platforms, the inputs are passed
+ * to the driver via a function, `psa_drv_se_key_derivation_collateral`, that
+ * is called multiple times with different `collateral_id`s. Thus, for a key
+ * derivation algorithm that required 3 parameter inputs, the flow would look
+ * something like:
+ * ~~~~~~~~~~~~~{.c}
+ * psa_drv_se_key_derivation_setup(kdf_algorithm, source_key, dest_key_size_bytes);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_0,
+ *                                      p_collateral_0,
+ *                                      collateral_0_size);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_1,
+ *                                      p_collateral_1,
+ *                                      collateral_1_size);
+ * psa_drv_se_key_derivation_collateral(kdf_algorithm_collateral_id_2,
+ *                                      p_collateral_2,
+ *                                      collateral_2_size);
+ * psa_drv_se_key_derivation_derive();
+ * ~~~~~~~~~~~~~
+ *
+ * key agreement example:
+ * ~~~~~~~~~~~~~{.c}
+ * psa_drv_se_key_derivation_setup(alg, source_key. dest_key_size_bytes);
+ * psa_drv_se_key_derivation_collateral(DHE_PUBKEY, p_pubkey, pubkey_size);
+ * psa_drv_se_key_derivation_export(p_session_key,
+ *                                  session_key_size,
+ *                                  &session_key_length);
+ * ~~~~~~~~~~~~~
+ */
+/**@{*/
+
+/** \brief A function that Sets up a secure element key derivation operation by
+ * specifying the algorithm and the source key sot
+ *
+ * \param[in,out] drv_context   The driver context structure.
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] kdf_alg           The algorithm to be used for the key derivation
+ * \param[in] source_key        The key to be used as the source material for
+ *                              the key derivation
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_setup_t)(psa_drv_se_context_t *drv_context,
+                                                          void *op_context,
+                                                          psa_algorithm_t kdf_alg,
+                                                          psa_key_slot_number_t source_key);
+
+/** \brief A function that provides collateral (parameters) needed for a secure
+ * element key derivation or key agreement operation
+ *
+ * Since many key derivation algorithms require multiple parameters, it is
+ * expected that this function may be called multiple times for the same
+ * operation, each with a different algorithm-specific `collateral_id`
+ *
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] collateral_id     An ID for the collateral being provided
+ * \param[in] p_collateral      A buffer containing the collateral data
+ * \param[in] collateral_size   The size in bytes of the collateral
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_collateral_t)(void *op_context,
+                                                               uint32_t collateral_id,
+                                                               const uint8_t *p_collateral,
+                                                               size_t collateral_size);
+
+/** \brief A function that performs the final secure element key derivation
+ * step and place the generated key material in a slot
+ *
+ * \param[in,out] op_context    A hardware-specific structure containing any
+ *                              context information for the implementation
+ * \param[in] dest_key          The slot where the generated key material
+ *                              should be placed
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_derive_t)(void *op_context,
+                                                          psa_key_slot_number_t dest_key);
+
+/** \brief A function that performs the final step of a secure element key
+ * agreement and place the generated key material in a buffer
+ *
+ * \param[out] p_output         Buffer in which to place the generated key
+ *                              material
+ * \param[in] output_size       The size in bytes of `p_output`
+ * \param[out] p_output_length  Upon success, contains the number of bytes of
+ *                              key material placed in `p_output`
+ *
+ * \retval #PSA_SUCCESS
+ */
+typedef psa_status_t (*psa_drv_se_key_derivation_export_t)(void *op_context,
+                                                           uint8_t *p_output,
+                                                           size_t output_size,
+                                                           size_t *p_output_length);
+
+/**
+ * \brief A struct containing all of the function pointers needed to for secure
+ * element key derivation and agreement
+ *
+ * PSA Crypto API implementations should populate instances of the table as
+ * appropriate upon startup.
+ *
+ * If one of the functions is not implemented, it should be set to NULL.
+ */
+typedef struct {
+    /** The driver-specific size of the key derivation context */
+    size_t                           context_size;
+    /** Function that performs a key derivation setup */
+    psa_drv_se_key_derivation_setup_t      p_setup;
+    /** Function that sets key derivation collateral */
+    psa_drv_se_key_derivation_collateral_t p_collateral;
+    /** Function that performs a final key derivation step */
+    psa_drv_se_key_derivation_derive_t     p_derive;
+    /** Function that perforsm a final key derivation or agreement and
+     * exports the key */
+    psa_drv_se_key_derivation_export_t     p_export;
+} psa_drv_se_key_derivation_t;
+
+/**@}*/
+
+/** \defgroup se_registration Secure element driver registration
+ */
+/**@{*/
+
+/** A structure containing pointers to all the entry points of a
+ * secure element driver.
+ *
+ * Future versions of this specification may add extra substructures at
+ * the end of this structure.
+ */
+typedef struct {
+    /** The version of the driver HAL that this driver implements.
+     * This is a protection against loading driver binaries built against
+     * a different version of this specification.
+     * Use #PSA_DRV_SE_HAL_VERSION.
+     */
+    uint32_t hal_version;
+
+    /** The size of the driver's persistent data in bytes.
+     *
+     * This can be 0 if the driver does not need persistent data.
+     *
+     * See the documentation of psa_drv_se_context_t::persistent_data
+     * for more information about why and how a driver can use
+     * persistent data.
+     */
+    size_t persistent_data_size;
+
+    /** The driver initialization function.
+     *
+     * This function is called once during the initialization of the
+     * PSA Cryptography subsystem, before any other function of the
+     * driver is called. If this function returns a failure status,
+     * the driver will be unusable, at least until the next system reset.
+     *
+     * If this field is \c NULL, it is equivalent to a function that does
+     * nothing and returns #PSA_SUCCESS.
+     */
+    psa_drv_se_init_t p_init;
+
+    const psa_drv_se_key_management_t *key_management;
+    const psa_drv_se_mac_t *mac;
+    const psa_drv_se_cipher_t *cipher;
+    const psa_drv_se_aead_t *aead;
+    const psa_drv_se_asymmetric_t *asymmetric;
+    const psa_drv_se_key_derivation_t *derivation;
+} psa_drv_se_t;
+
+/** The current version of the secure element driver HAL.
+ */
+/* 0.0.0 patchlevel 5 */
+#define PSA_DRV_SE_HAL_VERSION 0x00000005
+
+/** Register an external cryptoprocessor (secure element) driver.
+ *
+ * This function is only intended to be used by driver code, not by
+ * application code. In implementations with separation between the
+ * PSA cryptography module and applications, this function should
+ * only be available to callers that run in the same memory space as
+ * the cryptography module, and should not be exposed to applications
+ * running in a different memory space.
+ *
+ * This function may be called before psa_crypto_init(). It is
+ * implementation-defined whether this function may be called
+ * after psa_crypto_init().
+ *
+ * \note Implementations store metadata about keys including the lifetime
+ *       value, which contains the driver's location indicator. Therefore,
+ *       from one instantiation of the PSA Cryptography
+ *       library to the next one, if there is a key in storage with a certain
+ *       lifetime value, you must always register the same driver (or an
+ *       updated version that communicates with the same secure element)
+ *       with the same location value.
+ *
+ * \param location      The location value through which this driver will
+ *                      be exposed to applications.
+ *                      This driver will be used for all keys such that
+ *                      `location == #PSA_KEY_LIFETIME_GET_LOCATION( lifetime )`.
+ *                      The value #PSA_KEY_LOCATION_LOCAL_STORAGE is reserved
+ *                      and may not be used for drivers. Implementations
+ *                      may reserve other values.
+ * \param[in] methods   The method table of the driver. This structure must
+ *                      remain valid for as long as the cryptography
+ *                      module keeps running. It is typically a global
+ *                      constant.
+ *
+ * \return #PSA_SUCCESS
+ *         The driver was successfully registered. Applications can now
+ *         use \p location to access keys through the methods passed to
+ *         this function.
+ * \return #PSA_ERROR_BAD_STATE
+ *         This function was called after the initialization of the
+ *         cryptography module, and this implementation does not support
+ *         driver registration at this stage.
+ * \return #PSA_ERROR_ALREADY_EXISTS
+ *         There is already a registered driver for this value of \p location.
+ * \return #PSA_ERROR_INVALID_ARGUMENT
+ *         \p location is a reserved value.
+ * \return #PSA_ERROR_NOT_SUPPORTED
+ *         `methods->hal_version` is not supported by this implementation.
+ * \return #PSA_ERROR_INSUFFICIENT_MEMORY
+ * \return #PSA_ERROR_NOT_PERMITTED
+ * \return #PSA_ERROR_STORAGE_FAILURE
+ * \return #PSA_ERROR_DATA_CORRUPT
+ */
+psa_status_t psa_register_se_driver(
+    psa_key_location_t location,
+    const psa_drv_se_t *methods);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_SE_DRIVER_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_sizes.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_sizes.h
new file mode 100644
index 00000000000..e2ae5965d4f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_sizes.h
@@ -0,0 +1,1171 @@
+/**
+ * \file psa/crypto_sizes.h
+ *
+ * \brief PSA cryptography module: Mbed TLS buffer size macros
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains the definitions of macros that are useful to
+ * compute buffer sizes. The signatures and semantics of these macros
+ * are standardized, but the definitions are not, because they depend on
+ * the available algorithms and, in some cases, on permitted tolerances
+ * on buffer sizes.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, implementers should take care to ensure that
+ * the definitions that are exposed to applications match what the
+ * module implements.
+ *
+ * Macros that compute sizes whose values do not depend on the
+ * implementation are in crypto.h.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_SIZES_H
+#define PSA_CRYPTO_SIZES_H
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#define PSA_BITS_TO_BYTES(bits) (((bits) + 7) / 8)
+#define PSA_BYTES_TO_BITS(bytes) ((bytes) * 8)
+
+#define PSA_ROUND_UP_TO_MULTIPLE(block_size, length) \
+    (((length) + (block_size) - 1) / (block_size) * (block_size))
+
+/** The size of the output of psa_hash_finish(), in bytes.
+ *
+ * This is also the hash size that psa_hash_verify() expects.
+ *
+ * \param alg   A hash algorithm (\c PSA_ALG_XXX value such that
+ *              #PSA_ALG_IS_HASH(\p alg) is true), or an HMAC algorithm
+ *              (#PSA_ALG_HMAC(\c hash_alg) where \c hash_alg is a
+ *              hash algorithm).
+ *
+ * \return The hash size for the specified hash algorithm.
+ *         If the hash algorithm is not recognized, return 0.
+ */
+#define PSA_HASH_LENGTH(alg)                                        \
+    (                                                               \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD2 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD4 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD5 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_RIPEMD160 ? 20 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_1 ? 20 :          \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_224 ? 28 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_256 ? 32 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_384 ? 48 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_224 ? 28 :    \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_256 ? 32 :    \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_224 ? 28 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_256 ? 32 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_384 ? 48 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_512 ? 64 :       \
+        0)
+
+/** The input block size of a hash algorithm, in bytes.
+ *
+ * Hash algorithms process their input data in blocks. Hash operations will
+ * retain any partial blocks until they have enough input to fill the block or
+ * until the operation is finished.
+ * This affects the output from psa_hash_suspend().
+ *
+ * \param alg   A hash algorithm (\c PSA_ALG_XXX value such that
+ *              PSA_ALG_IS_HASH(\p alg) is true).
+ *
+ * \return      The block size in bytes for the specified hash algorithm.
+ *              If the hash algorithm is not recognized, return 0.
+ *              An implementation can return either 0 or the correct size for a
+ *              hash algorithm that it recognizes, but does not support.
+ */
+#define PSA_HASH_BLOCK_LENGTH(alg)                                  \
+    (                                                               \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD2 ? 16 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD4 ? 64 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_MD5 ? 64 :            \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_RIPEMD160 ? 64 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_1 ? 64 :          \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_224 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_256 ? 64 :        \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_384 ? 128 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512 ? 128 :       \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_224 ? 128 :   \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA_512_256 ? 128 :   \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_224 ? 144 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_256 ? 136 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_384 ? 104 :      \
+        PSA_ALG_HMAC_GET_HASH(alg) == PSA_ALG_SHA3_512 ? 72 :       \
+        0)
+
+/** \def PSA_HASH_MAX_SIZE
+ *
+ * Maximum size of a hash.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a hash in bytes.
+ */
+/* Note: for HMAC-SHA-3, the block size is 144 bytes for HMAC-SHA3-226,
+ * 136 bytes for HMAC-SHA3-256, 104 bytes for SHA3-384, 72 bytes for
+ * HMAC-SHA3-512. */
+#if defined(PSA_WANT_ALG_SHA_512) || defined(PSA_WANT_ALG_SHA_384)
+#define PSA_HASH_MAX_SIZE 64
+#define PSA_HMAC_MAX_HASH_BLOCK_SIZE 128
+#else
+#define PSA_HASH_MAX_SIZE 32
+#define PSA_HMAC_MAX_HASH_BLOCK_SIZE 64
+#endif
+
+/** \def PSA_MAC_MAX_SIZE
+ *
+ * Maximum size of a MAC.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a MAC in bytes.
+ */
+/* All non-HMAC MACs have a maximum size that's smaller than the
+ * minimum possible value of PSA_HASH_MAX_SIZE in this implementation. */
+/* Note that the encoding of truncated MAC algorithms limits this value
+ * to 64 bytes.
+ */
+#define PSA_MAC_MAX_SIZE PSA_HASH_MAX_SIZE
+
+/** The length of a tag for an AEAD algorithm, in bytes.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to store the
+ * tag output from psa_aead_finish().
+ *
+ * See also #PSA_AEAD_TAG_MAX_SIZE.
+ *
+ * \param key_type            The type of the AEAD key.
+ * \param key_bits            The size of the AEAD key in bits.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    The tag length for the specified algorithm and key.
+ *                            If the AEAD algorithm does not have an identified
+ *                            tag that can be distinguished from the rest of
+ *                            the ciphertext, return 0.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_TAG_LENGTH(key_type, key_bits, alg)                        \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                            \
+     PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :                                     \
+     ((void) (key_bits), 0))
+
+/** The maximum tag size for all supported AEAD algorithms, in bytes.
+ *
+ * See also #PSA_AEAD_TAG_LENGTH(\p key_type, \p key_bits, \p alg).
+ */
+#define PSA_AEAD_TAG_MAX_SIZE       16
+
+/* The maximum size of an RSA key on this implementation, in bits.
+ * This is a vendor-specific macro.
+ *
+ * Mbed TLS does not set a hard limit on the size of RSA keys: any key
+ * whose parameters fit in a bignum is accepted. However large keys can
+ * induce a large memory usage and long computation times. Unlike other
+ * auxiliary macros in this file and in crypto.h, which reflect how the
+ * library is configured, this macro defines how the library is
+ * configured. This implementation refuses to import or generate an
+ * RSA key whose size is larger than the value defined here.
+ *
+ * Note that an implementation may set different size limits for different
+ * operations, and does not need to accept all key sizes up to the limit. */
+#define PSA_VENDOR_RSA_MAX_KEY_BITS 4096
+
+/* The maximum size of an ECC key on this implementation, in bits.
+ * This is a vendor-specific macro. */
+#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 521
+#elif defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 512
+#elif defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 448
+#elif defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 384
+#elif defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 384
+#elif defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 256
+#elif defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 255
+#elif defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 224
+#elif defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 224
+#elif defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 192
+#elif defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 192
+#else
+#define PSA_VENDOR_ECC_MAX_CURVE_BITS 0
+#endif
+
+/** This macro returns the maximum supported length of the PSK for the
+ * TLS-1.2 PSK-to-MS key derivation
+ * (#PSA_ALG_TLS12_PSK_TO_MS(\c hash_alg)).
+ *
+ * The maximum supported length does not depend on the chosen hash algorithm.
+ *
+ * Quoting RFC 4279, Sect 5.3:
+ * TLS implementations supporting these ciphersuites MUST support
+ * arbitrary PSK identities up to 128 octets in length, and arbitrary
+ * PSKs up to 64 octets in length.  Supporting longer identities and
+ * keys is RECOMMENDED.
+ *
+ * Therefore, no implementation should define a value smaller than 64
+ * for #PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE.
+ */
+#define PSA_TLS12_PSK_TO_MS_PSK_MAX_SIZE 128
+
+/** The maximum size of a block cipher. */
+#define PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE 16
+
+/** The size of the output of psa_mac_sign_finish(), in bytes.
+ *
+ * This is also the MAC size that psa_mac_verify_finish() expects.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type      The type of the MAC key.
+ * \param key_bits      The size of the MAC key in bits.
+ * \param alg           A MAC algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_MAC(\p alg) is true).
+ *
+ * \return              The MAC size for the specified algorithm with
+ *                      the specified key parameters.
+ * \return              0 if the MAC algorithm is not recognized.
+ * \return              Either 0 or the correct size for a MAC algorithm that
+ *                      the implementation recognizes, but does not support.
+ * \return              Unspecified if the key parameters are not consistent
+ *                      with the algorithm.
+ */
+#define PSA_MAC_LENGTH(key_type, key_bits, alg)                                   \
+    ((alg) & PSA_ALG_MAC_TRUNCATION_MASK ? PSA_MAC_TRUNCATED_LENGTH(alg) :        \
+     PSA_ALG_IS_HMAC(alg) ? PSA_HASH_LENGTH(PSA_ALG_HMAC_GET_HASH(alg)) :         \
+     PSA_ALG_IS_BLOCK_CIPHER_MAC(alg) ? PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     ((void)(key_type), (void)(key_bits), 0))
+
+/** The maximum size of the output of psa_aead_encrypt(), in bytes.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_encrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the ciphertext may be smaller.
+ *
+ * See also #PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(\p plaintext_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_SIZE(key_type, alg, plaintext_length) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                      \
+     (plaintext_length) + PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :          \
+     0)
+
+/** A sufficient output buffer size for psa_aead_encrypt(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the ciphertext buffer is at least this large, it is guaranteed
+ * that psa_aead_encrypt() will not fail due to an insufficient buffer size.
+ *
+ * \note This macro returns a compile-time constant if its arguments are
+ *       compile-time constants.
+ *
+ * See also #PSA_AEAD_ENCRYPT_OUTPUT_SIZE(\p key_type, \p alg,
+ * \p plaintext_length).
+ *
+ * \param plaintext_length    Size of the plaintext in bytes.
+ *
+ * \return                    A sufficient output buffer size for any of the
+ *                            supported key types and AEAD algorithms.
+ *
+ */
+#define PSA_AEAD_ENCRYPT_OUTPUT_MAX_SIZE(plaintext_length)          \
+    ((plaintext_length) + PSA_AEAD_TAG_MAX_SIZE)
+
+
+/** The maximum size of the output of psa_aead_decrypt(), in bytes.
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_decrypt() will not fail due to an
+ * insufficient buffer size. Depending on the algorithm, the actual size of
+ * the plaintext may be smaller.
+ *
+ * See also #PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(\p ciphertext_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param ciphertext_length   Size of the plaintext in bytes.
+ *
+ * \return                    The AEAD ciphertext size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_SIZE(key_type, alg, ciphertext_length) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&                      \
+         (ciphertext_length) > PSA_ALG_AEAD_GET_TAG_LENGTH(alg) ?      \
+         (ciphertext_length) - PSA_ALG_AEAD_GET_TAG_LENGTH(alg) :      \
+     0)
+
+/** A sufficient output buffer size for psa_aead_decrypt(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the plaintext buffer is at least this large, it is guaranteed
+ * that psa_aead_decrypt() will not fail due to an insufficient buffer size.
+ *
+ * \note This macro returns a compile-time constant if its arguments are
+ *       compile-time constants.
+ *
+ * See also #PSA_AEAD_DECRYPT_OUTPUT_SIZE(\p key_type, \p alg,
+ * \p ciphertext_length).
+ *
+ * \param ciphertext_length   Size of the ciphertext in bytes.
+ *
+ * \return                    A sufficient output buffer size for any of the
+ *                            supported key types and AEAD algorithms.
+ *
+ */
+#define PSA_AEAD_DECRYPT_OUTPUT_MAX_SIZE(ciphertext_length)     \
+     (ciphertext_length)
+
+/** The default nonce size for an AEAD algorithm, in bytes.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to
+ * store the nonce output from #psa_aead_generate_nonce().
+ *
+ * See also #PSA_AEAD_NONCE_MAX_SIZE.
+ *
+ * \note This is not the maximum size of nonce supported as input to
+ *       #psa_aead_set_nonce(), #psa_aead_encrypt() or #psa_aead_decrypt(),
+ *       just the default size that is generated by #psa_aead_generate_nonce().
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  A symmetric key type that is compatible with
+ *                  algorithm \p alg.
+ *
+ * \param alg       An AEAD algorithm (\c PSA_ALG_XXX value such that
+ *                  #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return The default nonce size for the specified key type and algorithm.
+ *         If the key type or AEAD algorithm is not recognized,
+ *         or the parameters are incompatible, return 0.
+ */
+#define PSA_AEAD_NONCE_LENGTH(key_type, alg) \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) == 16 ? \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_CCM) ? 13 : \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_GCM) ? 12 : \
+          0 : \
+     (key_type) == PSA_KEY_TYPE_CHACHA20 && \
+          MBEDTLS_PSA_ALG_AEAD_EQUAL(alg, PSA_ALG_CHACHA20_POLY1305) ? 12 : \
+     0)
+
+/** The maximum default nonce size among all supported pairs of key types and
+ *  AEAD algorithms, in bytes.
+ *
+ * This is equal to or greater than any value that #PSA_AEAD_NONCE_LENGTH()
+ * may return.
+ *
+ * \note This is not the maximum size of nonce supported as input to
+ *       #psa_aead_set_nonce(), #psa_aead_encrypt() or #psa_aead_decrypt(),
+ *       just the largest size that may be generated by
+ *       #psa_aead_generate_nonce().
+ */
+#define PSA_AEAD_NONCE_MAX_SIZE 13
+
+/** A sufficient output buffer size for psa_aead_update().
+ *
+ * If the size of the output buffer is at least this large, it is
+ * guaranteed that psa_aead_update() will not fail due to an
+ * insufficient buffer size. The actual size of the output may be smaller
+ * in any given call.
+ *
+ * See also #PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ * \param input_length        Size of the input in bytes.
+ *
+ * \return                    A sufficient output buffer size for the specified
+ *                            algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+/* For all the AEAD modes defined in this specification, it is possible
+ * to emit output without delay. However, hardware may not always be
+ * capable of this. So for modes based on a block cipher, allow the
+ * implementation to delay the output until it has a full block. */
+#define PSA_AEAD_UPDATE_OUTPUT_SIZE(key_type, alg, input_length)                             \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 ?                                             \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?                                              \
+         PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type), (input_length)) : \
+         (input_length) : \
+     0)
+
+/** A sufficient output buffer size for psa_aead_update(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_aead_update() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_AEAD_UPDATE_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length      Size of the input in bytes.
+ */
+#define PSA_AEAD_UPDATE_OUTPUT_MAX_SIZE(input_length)                           \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, (input_length)))
+
+/** A sufficient ciphertext buffer size for psa_aead_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_aead_finish() will not fail due to an
+ * insufficient ciphertext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * See also #PSA_AEAD_FINISH_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type            A symmetric key type that is
+                              compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient ciphertext buffer size for the
+ *                            specified algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_FINISH_OUTPUT_SIZE(key_type, alg) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&  \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?    \
+         PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     0)
+
+/** A sufficient ciphertext buffer size for psa_aead_finish(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * See also #PSA_AEAD_FINISH_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_AEAD_FINISH_OUTPUT_MAX_SIZE     (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+/** A sufficient plaintext buffer size for psa_aead_verify().
+ *
+ * If the size of the plaintext buffer is at least this large, it is
+ * guaranteed that psa_aead_verify() will not fail due to an
+ * insufficient plaintext buffer size. The actual size of the output may
+ * be smaller in any given call.
+ *
+ * See also #PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type            A symmetric key type that is
+ *                            compatible with algorithm \p alg.
+ * \param alg                 An AEAD algorithm
+ *                            (\c PSA_ALG_XXX value such that
+ *                            #PSA_ALG_IS_AEAD(\p alg) is true).
+ *
+ * \return                    A sufficient plaintext buffer size for the
+ *                            specified algorithm.
+ *                            If the key type or AEAD algorithm is not
+ *                            recognized, or the parameters are incompatible,
+ *                            return 0.
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_SIZE(key_type, alg) \
+    (PSA_AEAD_NONCE_LENGTH(key_type, alg) != 0 &&  \
+         PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg) ?    \
+         PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     0)
+
+/** A sufficient plaintext buffer size for psa_aead_verify(), for any of the
+ *  supported key types and AEAD algorithms.
+ *
+ * See also #PSA_AEAD_VERIFY_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_AEAD_VERIFY_OUTPUT_MAX_SIZE     (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+#define PSA_RSA_MINIMUM_PADDING_SIZE(alg)                         \
+    (PSA_ALG_IS_RSA_OAEP(alg) ?                                   \
+     2 * PSA_HASH_LENGTH(PSA_ALG_RSA_OAEP_GET_HASH(alg)) + 1 :    \
+     11 /*PKCS#1v1.5*/)
+
+/**
+ * \brief ECDSA signature size for a given curve bit size
+ *
+ * \param curve_bits    Curve size in bits.
+ * \return              Signature size in bytes.
+ *
+ * \note This macro returns a compile-time constant if its argument is one.
+ */
+#define PSA_ECDSA_SIGNATURE_SIZE(curve_bits)    \
+    (PSA_BITS_TO_BYTES(curve_bits) * 2)
+
+/** Sufficient signature buffer size for psa_sign_hash().
+ *
+ * This macro returns a sufficient buffer size for a signature using a key
+ * of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the signature may be smaller
+ * (some algorithms produce a variable-size signature).
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The signature algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_sign_hash() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_SIGN_OUTPUT_SIZE(key_type, key_bits, alg)        \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? ((void)alg, PSA_BITS_TO_BYTES(key_bits)) : \
+     PSA_KEY_TYPE_IS_ECC(key_type) ? PSA_ECDSA_SIGNATURE_SIZE(key_bits) : \
+     ((void)alg, 0))
+
+#define PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE     \
+    PSA_ECDSA_SIGNATURE_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS)
+
+/** \def PSA_SIGNATURE_MAX_SIZE
+ *
+ * Maximum size of an asymmetric signature.
+ *
+ * This macro expands to a compile-time constant integer. This value
+ * is the maximum size of a signature in bytes.
+ */
+#define PSA_SIGNATURE_MAX_SIZE                               \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS) > PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE ? \
+     PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS) :                   \
+     PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE)
+
+/** Sufficient output buffer size for psa_asymmetric_encrypt().
+ *
+ * This macro returns a sufficient buffer size for a ciphertext produced using
+ * a key of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the ciphertext may be smaller, depending
+ * on the algorithm.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The asymmetric encryption algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_asymmetric_encrypt() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(key_type, key_bits, alg)     \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ?                                    \
+     ((void)alg, PSA_BITS_TO_BYTES(key_bits)) :                         \
+     0)
+
+/** A sufficient output buffer size for psa_asymmetric_encrypt(), for any
+ *  supported asymmetric encryption.
+ *
+ * See also #PSA_ASYMMETRIC_ENCRYPT_OUTPUT_SIZE(\p key_type, \p key_bits, \p alg).
+ */
+/* This macro assumes that RSA is the only supported asymmetric encryption. */
+#define PSA_ASYMMETRIC_ENCRYPT_OUTPUT_MAX_SIZE          \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS))
+
+/** Sufficient output buffer size for psa_asymmetric_decrypt().
+ *
+ * This macro returns a sufficient buffer size for a plaintext produced using
+ * a key of the specified type and size, with the specified algorithm.
+ * Note that the actual size of the plaintext may be smaller, depending
+ * on the algorithm.
+ *
+ * \warning This function may call its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  An asymmetric key type (this may indifferently be a
+ *                  key pair type or a public key type).
+ * \param key_bits  The size of the key in bits.
+ * \param alg       The asymmetric encryption algorithm.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_asymmetric_decrypt() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the
+ *         return value is unspecified.
+ */
+#define PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(key_type, key_bits, alg)     \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ?                                    \
+     PSA_BITS_TO_BYTES(key_bits) - PSA_RSA_MINIMUM_PADDING_SIZE(alg) :  \
+     0)
+
+/** A sufficient output buffer size for psa_asymmetric_decrypt(), for any
+ *  supported asymmetric decryption.
+ *
+ * This macro assumes that RSA is the only supported asymmetric encryption.
+ *
+ * See also #PSA_ASYMMETRIC_DECRYPT_OUTPUT_SIZE(\p key_type, \p key_bits, \p alg).
+ */
+#define PSA_ASYMMETRIC_DECRYPT_OUTPUT_MAX_SIZE          \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_RSA_MAX_KEY_BITS))
+
+/* Maximum size of the ASN.1 encoding of an INTEGER with the specified
+ * number of bits.
+ *
+ * This definition assumes that bits <= 2^19 - 9 so that the length field
+ * is at most 3 bytes. The length of the encoding is the length of the
+ * bit string padded to a whole number of bytes plus:
+ * - 1 type byte;
+ * - 1 to 3 length bytes;
+ * - 0 to 1 bytes of leading 0 due to the sign bit.
+ */
+#define PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(bits)      \
+    ((bits) / 8 + 5)
+
+/* Maximum size of the export encoding of an RSA public key.
+ * Assumes that the public exponent is less than 2^32.
+ *
+ * RSAPublicKey  ::=  SEQUENCE  {
+ *    modulus            INTEGER,    -- n
+ *    publicExponent     INTEGER  }  -- e
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - n : INTEGER;
+ * - 7 bytes for the public exponent.
+ */
+#define PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) + 11)
+
+/* Maximum size of the export encoding of an RSA key pair.
+ * Assumes thatthe public exponent is less than 2^32 and that the size
+ * difference between the two primes is at most 1 bit.
+ *
+ * RSAPrivateKey ::= SEQUENCE {
+ *     version           Version,  -- 0
+ *     modulus           INTEGER,  -- N-bit
+ *     publicExponent    INTEGER,  -- 32-bit
+ *     privateExponent   INTEGER,  -- N-bit
+ *     prime1            INTEGER,  -- N/2-bit
+ *     prime2            INTEGER,  -- N/2-bit
+ *     exponent1         INTEGER,  -- N/2-bit
+ *     exponent2         INTEGER,  -- N/2-bit
+ *     coefficient       INTEGER,  -- N/2-bit
+ * }
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - 3 bytes of version;
+ * - 7 half-size INTEGERs plus 2 full-size INTEGERs,
+ *   overapproximated as 9 half-size INTEGERS;
+ * - 7 bytes for the public exponent.
+ */
+#define PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (9 * PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE((key_bits) / 2 + 1) + 14)
+
+/* Maximum size of the export encoding of a DSA public key.
+ *
+ * SubjectPublicKeyInfo  ::=  SEQUENCE  {
+ *      algorithm            AlgorithmIdentifier,
+ *      subjectPublicKey     BIT STRING  } -- contains DSAPublicKey
+ * AlgorithmIdentifier  ::=  SEQUENCE  {
+ *      algorithm               OBJECT IDENTIFIER,
+ *      parameters              Dss-Parms  } -- SEQUENCE of 3 INTEGERs
+ * DSAPublicKey  ::=  INTEGER -- public key, Y
+ *
+ * - 3 * 4 bytes of SEQUENCE overhead;
+ * - 1 + 1 + 7 bytes of algorithm (DSA OID);
+ * - 4 bytes of BIT STRING overhead;
+ * - 3 full-size INTEGERs (p, g, y);
+ * - 1 + 1 + 32 bytes for 1 sub-size INTEGER (q <= 256 bits).
+ */
+#define PSA_KEY_EXPORT_DSA_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) * 3 + 59)
+
+/* Maximum size of the export encoding of a DSA key pair.
+ *
+ * DSAPrivateKey ::= SEQUENCE {
+ *     version             Version,  -- 0
+ *     prime               INTEGER,  -- p
+ *     subprime            INTEGER,  -- q
+ *     generator           INTEGER,  -- g
+ *     public              INTEGER,  -- y
+ *     private             INTEGER,  -- x
+ * }
+ *
+ * - 4 bytes of SEQUENCE overhead;
+ * - 3 bytes of version;
+ * - 3 full-size INTEGERs (p, g, y);
+ * - 2 * (1 + 1 + 32) bytes for 2 sub-size INTEGERs (q, x <= 256 bits).
+ */
+#define PSA_KEY_EXPORT_DSA_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(key_bits) * 3 + 75)
+
+/* Maximum size of the export encoding of an ECC public key.
+ *
+ * The representation of an ECC public key is:
+ *      - The byte 0x04;
+ *      - `x_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - `y_P` as a `ceiling(m/8)`-byte string, big-endian;
+ *      - where m is the bit size associated with the curve.
+ *
+ * - 1 byte + 2 * point size.
+ */
+#define PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits)        \
+    (2 * PSA_BITS_TO_BYTES(key_bits) + 1)
+
+/* Maximum size of the export encoding of an ECC key pair.
+ *
+ * An ECC key pair is represented by the secret value.
+ */
+#define PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(key_bits)   \
+    (PSA_BITS_TO_BYTES(key_bits))
+
+/** Sufficient output buffer size for psa_export_key() or
+ * psa_export_public_key().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * The following code illustrates how to allocate enough memory to export
+ * a key by querying the key type and size at runtime.
+ * \code{c}
+ * psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ * psa_status_t status;
+ * status = psa_get_key_attributes(key, &attributes);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * psa_key_type_t key_type = psa_get_key_type(&attributes);
+ * size_t key_bits = psa_get_key_bits(&attributes);
+ * size_t buffer_size = PSA_EXPORT_KEY_OUTPUT_SIZE(key_type, key_bits);
+ * psa_reset_key_attributes(&attributes);
+ * uint8_t *buffer = malloc(buffer_size);
+ * if (buffer == NULL) handle_error(...);
+ * size_t buffer_length;
+ * status = psa_export_key(key, buffer, buffer_size, &buffer_length);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * \endcode
+ *
+ * \param key_type  A supported key type.
+ * \param key_bits  The size of the key in bits.
+ *
+ * \return If the parameters are valid and supported, return
+ *         a buffer size in bytes that guarantees that
+ *         psa_export_key() or psa_export_public_key() will not fail with
+ *         #PSA_ERROR_BUFFER_TOO_SMALL.
+ *         If the parameters are a valid combination that is not supported,
+ *         return either a sensible size or 0.
+ *         If the parameters are not valid, the return value is unspecified.
+ */
+#define PSA_EXPORT_KEY_OUTPUT_SIZE(key_type, key_bits)                                              \
+    (PSA_KEY_TYPE_IS_UNSTRUCTURED(key_type) ? PSA_BITS_TO_BYTES(key_bits) :                         \
+     (key_type) == PSA_KEY_TYPE_RSA_KEY_PAIR ? PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(key_bits) :     \
+     (key_type) == PSA_KEY_TYPE_RSA_PUBLIC_KEY ? PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     (key_type) == PSA_KEY_TYPE_DSA_KEY_PAIR ? PSA_KEY_EXPORT_DSA_KEY_PAIR_MAX_SIZE(key_bits) :     \
+     (key_type) == PSA_KEY_TYPE_DSA_PUBLIC_KEY ? PSA_KEY_EXPORT_DSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_ECC_KEY_PAIR(key_type) ? PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(key_bits) :      \
+     PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY(key_type) ? PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits) :  \
+     0)
+
+/** Sufficient output buffer size for psa_export_public_key().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * The following code illustrates how to allocate enough memory to export
+ * a public key by querying the key type and size at runtime.
+ * \code{c}
+ * psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ * psa_status_t status;
+ * status = psa_get_key_attributes(key, &attributes);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * psa_key_type_t key_type = psa_get_key_type(&attributes);
+ * size_t key_bits = psa_get_key_bits(&attributes);
+ * size_t buffer_size = PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(key_type, key_bits);
+ * psa_reset_key_attributes(&attributes);
+ * uint8_t *buffer = malloc(buffer_size);
+ * if (buffer == NULL) handle_error(...);
+ * size_t buffer_length;
+ * status = psa_export_public_key(key, buffer, buffer_size, &buffer_length);
+ * if (status != PSA_SUCCESS) handle_error(...);
+ * \endcode
+ *
+ * \param key_type      A public key or key pair key type.
+ * \param key_bits      The size of the key in bits.
+ *
+ * \return              If the parameters are valid and supported, return
+ *                      a buffer size in bytes that guarantees that
+ *                      psa_export_public_key() will not fail with
+ *                      #PSA_ERROR_BUFFER_TOO_SMALL.
+ *                      If the parameters are a valid combination that is not
+ *                      supported, return either a sensible size or 0.
+ *                      If the parameters are not valid,
+ *                      the return value is unspecified.
+ *
+ *                      If the parameters are valid and supported,
+ *                      return the same result as
+ *                      #PSA_EXPORT_KEY_OUTPUT_SIZE(
+ *                          \p #PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(\p key_type),
+ *                          \p key_bits).
+ */
+#define PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(key_type, key_bits)                           \
+    (PSA_KEY_TYPE_IS_RSA(key_type) ? PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     PSA_KEY_TYPE_IS_ECC(key_type) ? PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(key_bits) : \
+     0)
+
+/** Sufficient buffer size for exporting any asymmetric key pair.
+ *
+ * This macro expands to a compile-time constant integer. This value is
+ * a sufficient buffer size when calling psa_export_key() to export any
+ * asymmetric key pair, regardless of the exact key type and key size.
+ *
+ * See also #PSA_EXPORT_KEY_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_EXPORT_KEY_PAIR_MAX_SIZE                                            \
+    (PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) >        \
+     PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS) ?      \
+     PSA_KEY_EXPORT_RSA_KEY_PAIR_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) :        \
+     PSA_KEY_EXPORT_ECC_KEY_PAIR_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** Sufficient buffer size for exporting any asymmetric public key.
+ *
+ * This macro expands to a compile-time constant integer. This value is
+ * a sufficient buffer size when calling psa_export_key() or
+ * psa_export_public_key() to export any asymmetric public key,
+ * regardless of the exact key type and key size.
+ *
+ * See also #PSA_EXPORT_PUBLIC_KEY_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_EXPORT_PUBLIC_KEY_MAX_SIZE                                          \
+    (PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) >      \
+     PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS) ?    \
+     PSA_KEY_EXPORT_RSA_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_RSA_MAX_KEY_BITS) :      \
+     PSA_KEY_EXPORT_ECC_PUBLIC_KEY_MAX_SIZE(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** Sufficient output buffer size for psa_raw_key_agreement().
+ *
+ * This macro returns a compile-time constant if its arguments are
+ * compile-time constants.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * See also #PSA_RAW_KEY_AGREEMENT_OUTPUT_MAX_SIZE.
+ *
+ * \param key_type      A supported key type.
+ * \param key_bits      The size of the key in bits.
+ *
+ * \return              If the parameters are valid and supported, return
+ *                      a buffer size in bytes that guarantees that
+ *                      psa_raw_key_agreement() will not fail with
+ *                      #PSA_ERROR_BUFFER_TOO_SMALL.
+ *                      If the parameters are a valid combination that
+ *                      is not supported, return either a sensible size or 0.
+ *                      If the parameters are not valid,
+ *                      the return value is unspecified.
+ */
+/* FFDH is not yet supported in PSA. */
+#define PSA_RAW_KEY_AGREEMENT_OUTPUT_SIZE(key_type, key_bits)   \
+    (PSA_KEY_TYPE_IS_ECC_KEY_PAIR(key_type) ?                   \
+     PSA_BITS_TO_BYTES(key_bits) :                              \
+     0)
+
+/** Maximum size of the output from psa_raw_key_agreement().
+ *
+ * This macro expands to a compile-time constant integer. This value is the
+ * maximum size of the output any raw key agreement algorithm, in bytes.
+ *
+ * See also #PSA_RAW_KEY_AGREEMENT_OUTPUT_SIZE(\p key_type, \p key_bits).
+ */
+#define PSA_RAW_KEY_AGREEMENT_OUTPUT_MAX_SIZE   \
+    (PSA_BITS_TO_BYTES(PSA_VENDOR_ECC_MAX_CURVE_BITS))
+
+/** The default IV size for a cipher algorithm, in bytes.
+ *
+ * The IV that is generated as part of a call to #psa_cipher_encrypt() is always
+ * the default IV length for the algorithm.
+ *
+ * This macro can be used to allocate a buffer of sufficient size to
+ * store the IV output from #psa_cipher_generate_iv() when using
+ * a multi-part cipher operation.
+ *
+ * See also #PSA_CIPHER_IV_MAX_SIZE.
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type  A symmetric key type that is compatible with algorithm \p alg.
+ *
+ * \param alg       A cipher algorithm (\c PSA_ALG_XXX value such that #PSA_ALG_IS_CIPHER(\p alg) is true).
+ *
+ * \return The default IV size for the specified key type and algorithm.
+ *         If the algorithm does not use an IV, return 0.
+ *         If the key type or cipher algorithm is not recognized,
+ *         or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_IV_LENGTH(key_type, alg) \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) > 1 && \
+        ((alg) == PSA_ALG_CTR || \
+         (alg) == PSA_ALG_CFB || \
+         (alg) == PSA_ALG_OFB || \
+         (alg) == PSA_ALG_XTS || \
+         (alg) == PSA_ALG_CBC_NO_PADDING || \
+         (alg) == PSA_ALG_CBC_PKCS7) ? PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) : \
+     (key_type) == PSA_KEY_TYPE_CHACHA20 && \
+         (alg) == PSA_ALG_STREAM_CIPHER ? 12 : \
+     0)
+
+/** The maximum IV size for all supported cipher algorithms, in bytes.
+ *
+ * See also #PSA_CIPHER_IV_LENGTH().
+ */
+#define PSA_CIPHER_IV_MAX_SIZE 16
+
+/** The maximum size of the output of psa_cipher_encrypt(), in bytes.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_encrypt() will not fail due to an insufficient buffer size.
+ * Depending on the algorithm, the actual size of the output might be smaller.
+ *
+ * See also #PSA_CIPHER_ENCRYPT_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \warning This macro may evaluate its arguments multiple times or
+ *          zero times, so you should not pass arguments that contain
+ *          side effects.
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible,
+ *                      return 0.
+ */
+#define PSA_CIPHER_ENCRYPT_OUTPUT_SIZE(key_type, alg, input_length)             \
+    (alg == PSA_ALG_CBC_PKCS7 ?                                                 \
+     (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) != 0 ?                            \
+     PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type),          \
+                              (input_length) + 1) +                             \
+     PSA_CIPHER_IV_LENGTH((key_type), (alg)) : 0) :                             \
+     (PSA_ALG_IS_CIPHER(alg) ?                                                  \
+      (input_length) + PSA_CIPHER_IV_LENGTH((key_type), (alg)) :                \
+     0))
+
+/** A sufficient output buffer size for psa_cipher_encrypt(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_encrypt() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_ENCRYPT_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ *
+ */
+#define PSA_CIPHER_ENCRYPT_OUTPUT_MAX_SIZE(input_length)                        \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE,                  \
+                              (input_length) + 1) +                             \
+     PSA_CIPHER_IV_MAX_SIZE)
+
+/** The maximum size of the output of psa_cipher_decrypt(), in bytes.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_decrypt() will not fail due to an insufficient buffer size.
+ * Depending on the algorithm, the actual size of the output might be smaller.
+ *
+ * See also #PSA_CIPHER_DECRYPT_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible,
+ *                      return 0.
+ */
+#define PSA_CIPHER_DECRYPT_OUTPUT_SIZE(key_type, alg, input_length)                 \
+    (PSA_ALG_IS_CIPHER(alg) &&                                                      \
+     ((key_type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC ? \
+     (input_length) :                                                               \
+     0)
+
+/** A sufficient output buffer size for psa_cipher_decrypt(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_decrypt() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_DECRYPT_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ */
+#define PSA_CIPHER_DECRYPT_OUTPUT_MAX_SIZE(input_length)    \
+    (input_length)
+
+/** A sufficient output buffer size for psa_cipher_update().
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_update() will not fail due to an insufficient buffer size.
+ * The actual size of the output might be smaller in any given call.
+ *
+ * See also #PSA_CIPHER_UPDATE_OUTPUT_MAX_SIZE(\p input_length).
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \param input_length  Size of the input in bytes.
+ *
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_UPDATE_OUTPUT_SIZE(key_type, alg, input_length)              \
+    (PSA_ALG_IS_CIPHER(alg) ?                                                   \
+    (PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) != 0 ?                             \
+     (((alg) == PSA_ALG_CBC_PKCS7      ||                                       \
+       (alg) == PSA_ALG_CBC_NO_PADDING ||                                       \
+       (alg) == PSA_ALG_ECB_NO_PADDING) ?                                       \
+      PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type),         \
+                                input_length) :                                 \
+      (input_length)) : 0) :                                                    \
+     0)
+
+/** A sufficient output buffer size for psa_cipher_update(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * If the size of the output buffer is at least this large, it is guaranteed
+ * that psa_cipher_update() will not fail due to an insufficient buffer size.
+ *
+ * See also #PSA_CIPHER_UPDATE_OUTPUT_SIZE(\p key_type, \p alg, \p input_length).
+ *
+ * \param input_length  Size of the input in bytes.
+ */
+#define PSA_CIPHER_UPDATE_OUTPUT_MAX_SIZE(input_length)     \
+    (PSA_ROUND_UP_TO_MULTIPLE(PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE, input_length))
+
+/** A sufficient ciphertext buffer size for psa_cipher_finish().
+ *
+ * If the size of the ciphertext buffer is at least this large, it is
+ * guaranteed that psa_cipher_finish() will not fail due to an insufficient
+ * ciphertext buffer size. The actual size of the output might be smaller in
+ * any given call.
+ *
+ * See also #PSA_CIPHER_FINISH_OUTPUT_MAX_SIZE().
+ *
+ * \param key_type      A symmetric key type that is compatible with algorithm
+ *                      alg.
+ * \param alg           A cipher algorithm (PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_CIPHER(\p alg) is true).
+ * \return              A sufficient output size for the specified key type and
+ *                      algorithm. If the key type or cipher algorithm is not
+ *                      recognized, or the parameters are incompatible, return 0.
+ */
+#define PSA_CIPHER_FINISH_OUTPUT_SIZE(key_type, alg)    \
+    (PSA_ALG_IS_CIPHER(alg) ?                           \
+     (alg == PSA_ALG_CBC_PKCS7 ?                        \
+      PSA_BLOCK_CIPHER_BLOCK_LENGTH(key_type) :         \
+      0) :                                              \
+     0)
+
+/** A sufficient ciphertext buffer size for psa_cipher_finish(), for any of the
+ *  supported key types and cipher algorithms.
+ *
+ * See also #PSA_CIPHER_FINISH_OUTPUT_SIZE(\p key_type, \p alg).
+ */
+#define PSA_CIPHER_FINISH_OUTPUT_MAX_SIZE           \
+    (PSA_BLOCK_CIPHER_BLOCK_MAX_SIZE)
+
+#endif /* PSA_CRYPTO_SIZES_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_struct.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_struct.h
new file mode 100644
index 00000000000..23a02a5d8ef
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_struct.h
@@ -0,0 +1,478 @@
+/**
+ * \file psa/crypto_struct.h
+ *
+ * \brief PSA cryptography module: Mbed TLS structured type implementations
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h.
+ *
+ * This file contains the definitions of some data structures with
+ * implementation-specific definitions.
+ *
+ * In implementations with isolation between the application and the
+ * cryptography module, it is expected that the front-end and the back-end
+ * would have different versions of this file.
+ *
+ * <h3>Design notes about multipart operation structures</h3>
+ *
+ * For multipart operations without driver delegation support, each multipart
+ * operation structure contains a `psa_algorithm_t alg` field which indicates
+ * which specific algorithm the structure is for. When the structure is not in
+ * use, `alg` is 0. Most of the structure consists of a union which is
+ * discriminated by `alg`.
+ *
+ * For multipart operations with driver delegation support, each multipart
+ * operation structure contains an `unsigned int id` field indicating which
+ * driver got assigned to do the operation. When the structure is not in use,
+ * 'id' is 0. The structure contains also a driver context which is the union
+ * of the contexts of all drivers able to handle the type of multipart
+ * operation.
+ *
+ * Note that when `alg` or `id` is 0, the content of other fields is undefined.
+ * In particular, it is not guaranteed that a freshly-initialized structure
+ * is all-zero: we initialize structures to something like `{0, 0}`, which
+ * is only guaranteed to initializes the first member of the union;
+ * GCC and Clang initialize the whole structure to 0 (at the time of writing),
+ * but MSVC and CompCert don't.
+ *
+ * In Mbed Crypto, multipart operation structures live independently from
+ * the key. This allows Mbed Crypto to free the key objects when destroying
+ * a key slot. If a multipart operation needs to remember the key after
+ * the setup function returns, the operation structure needs to contain a
+ * copy of the key.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_STRUCT_H
+#define PSA_CRYPTO_STRUCT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include the Mbed TLS configuration file, the way Mbed TLS does it
+ * in each of its header files. */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "mbedtls/cmac.h"
+#include "mbedtls/gcm.h"
+
+/* Include the context definition for the compiled-in drivers for the primitive
+ * algorithms. */
+#include "psa/crypto_driver_contexts_primitives.h"
+
+struct psa_hash_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_driver_wrappers.h.
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. the driver context is not active, in use). */
+    unsigned int id;
+    psa_driver_hash_context_t ctx;
+};
+
+#define PSA_HASH_OPERATION_INIT {0, {0}}
+static inline struct psa_hash_operation_s psa_hash_operation_init( void )
+{
+    const struct psa_hash_operation_s v = PSA_HASH_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_cipher_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_crypto_driver_wrappers.h
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. none of the driver contexts are active). */
+    unsigned int id;
+
+    unsigned int iv_required : 1;
+    unsigned int iv_set : 1;
+
+    uint8_t default_iv_length;
+
+    psa_driver_cipher_context_t ctx;
+};
+
+#define PSA_CIPHER_OPERATION_INIT {0, 0, 0, 0, {0}}
+static inline struct psa_cipher_operation_s psa_cipher_operation_init( void )
+{
+    const struct psa_cipher_operation_s v = PSA_CIPHER_OPERATION_INIT;
+    return( v );
+}
+
+/* Include the context definition for the compiled-in drivers for the composite
+ * algorithms. */
+#include "psa/crypto_driver_contexts_composites.h"
+
+struct psa_mac_operation_s
+{
+    /** Unique ID indicating which driver got assigned to do the
+     * operation. Since driver contexts are driver-specific, swapping
+     * drivers halfway through the operation is not supported.
+     * ID values are auto-generated in psa_driver_wrappers.h
+     * ID value zero means the context is not valid or not assigned to
+     * any driver (i.e. none of the driver contexts are active). */
+    unsigned int id;
+    uint8_t mac_size;
+    unsigned int is_sign : 1;
+    psa_driver_mac_context_t ctx;
+};
+
+#define PSA_MAC_OPERATION_INIT {0, 0, 0, {0}}
+static inline struct psa_mac_operation_s psa_mac_operation_init( void )
+{
+    const struct psa_mac_operation_s v = PSA_MAC_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_aead_operation_s
+{
+    psa_algorithm_t alg;
+    unsigned int key_set : 1;
+    unsigned int iv_set : 1;
+    uint8_t iv_size;
+    uint8_t block_size;
+    union
+    {
+        unsigned dummy; /* Enable easier initializing of the union. */
+        mbedtls_cipher_context_t cipher;
+    } ctx;
+};
+
+#define PSA_AEAD_OPERATION_INIT {0, 0, 0, 0, 0, {0}}
+static inline struct psa_aead_operation_s psa_aead_operation_init( void )
+{
+    const struct psa_aead_operation_s v = PSA_AEAD_OPERATION_INIT;
+    return( v );
+}
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HKDF)
+typedef struct
+{
+    uint8_t *info;
+    size_t info_length;
+#if PSA_HASH_MAX_SIZE > 0xff
+#error "PSA_HASH_MAX_SIZE does not fit in uint8_t"
+#endif
+    uint8_t offset_in_block;
+    uint8_t block_number;
+    unsigned int state : 2;
+    unsigned int info_set : 1;
+    uint8_t output_block[PSA_HASH_MAX_SIZE];
+    uint8_t prk[PSA_HASH_MAX_SIZE];
+    struct psa_mac_operation_s hmac;
+} psa_hkdf_key_derivation_t;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_HKDF */
+
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS)
+typedef enum
+{
+    PSA_TLS12_PRF_STATE_INIT,       /* no input provided */
+    PSA_TLS12_PRF_STATE_SEED_SET,   /* seed has been set */
+    PSA_TLS12_PRF_STATE_KEY_SET,    /* key has been set */
+    PSA_TLS12_PRF_STATE_LABEL_SET,  /* label has been set */
+    PSA_TLS12_PRF_STATE_OUTPUT      /* output has been started */
+} psa_tls12_prf_key_derivation_state_t;
+
+typedef struct psa_tls12_prf_key_derivation_s
+{
+#if PSA_HASH_MAX_SIZE > 0xff
+#error "PSA_HASH_MAX_SIZE does not fit in uint8_t"
+#endif
+
+    /* Indicates how many bytes in the current HMAC block have
+     * not yet been read by the user. */
+    uint8_t left_in_block;
+
+    /* The 1-based number of the block. */
+    uint8_t block_number;
+
+    psa_tls12_prf_key_derivation_state_t state;
+
+    uint8_t *secret;
+    size_t secret_length;
+    uint8_t *seed;
+    size_t seed_length;
+    uint8_t *label;
+    size_t label_length;
+
+    uint8_t Ai[PSA_HASH_MAX_SIZE];
+
+    /* `HMAC_hash( prk, A(i) + seed )` in the notation of RFC 5246, Sect. 5. */
+    uint8_t output_block[PSA_HASH_MAX_SIZE];
+} psa_tls12_prf_key_derivation_t;
+#endif /* MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) ||
+        * MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS */
+
+struct psa_key_derivation_s
+{
+    psa_algorithm_t alg;
+    unsigned int can_output_key : 1;
+    size_t capacity;
+    union
+    {
+        /* Make the union non-empty even with no supported algorithms. */
+        uint8_t dummy;
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_HKDF)
+        psa_hkdf_key_derivation_t hkdf;
+#endif
+#if defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PRF) || \
+    defined(MBEDTLS_PSA_BUILTIN_ALG_TLS12_PSK_TO_MS)
+        psa_tls12_prf_key_derivation_t tls12_prf;
+#endif
+    } ctx;
+};
+
+/* This only zeroes out the first byte in the union, the rest is unspecified. */
+#define PSA_KEY_DERIVATION_OPERATION_INIT {0, 0, 0, {0}}
+static inline struct psa_key_derivation_s psa_key_derivation_operation_init( void )
+{
+    const struct psa_key_derivation_s v = PSA_KEY_DERIVATION_OPERATION_INIT;
+    return( v );
+}
+
+struct psa_key_policy_s
+{
+    psa_key_usage_t usage;
+    psa_algorithm_t alg;
+    psa_algorithm_t alg2;
+};
+typedef struct psa_key_policy_s psa_key_policy_t;
+
+#define PSA_KEY_POLICY_INIT {0, 0, 0}
+static inline struct psa_key_policy_s psa_key_policy_init( void )
+{
+    const struct psa_key_policy_s v = PSA_KEY_POLICY_INIT;
+    return( v );
+}
+
+/* The type used internally for key sizes.
+ * Public interfaces use size_t, but internally we use a smaller type. */
+typedef uint16_t psa_key_bits_t;
+/* The maximum value of the type used to represent bit-sizes.
+ * This is used to mark an invalid key size. */
+#define PSA_KEY_BITS_TOO_LARGE ( (psa_key_bits_t) ( -1 ) )
+/* The maximum size of a key in bits.
+ * Currently defined as the maximum that can be represented, rounded down
+ * to a whole number of bytes.
+ * This is an uncast value so that it can be used in preprocessor
+ * conditionals. */
+#define PSA_MAX_KEY_BITS 0xfff8
+
+/** A mask of flags that can be stored in key attributes.
+ *
+ * This type is also used internally to store flags in slots. Internal
+ * flags are defined in library/psa_crypto_core.h. Internal flags may have
+ * the same value as external flags if they are properly handled during
+ * key creation and in psa_get_key_attributes.
+ */
+typedef uint16_t psa_key_attributes_flag_t;
+
+#define MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER     \
+    ( (psa_key_attributes_flag_t) 0x0001 )
+
+/* A mask of key attribute flags used externally only.
+ * Only meant for internal checks inside the library. */
+#define MBEDTLS_PSA_KA_MASK_EXTERNAL_ONLY (      \
+        MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER |    \
+        0 )
+
+/* A mask of key attribute flags used both internally and externally.
+ * Currently there aren't any. */
+#define MBEDTLS_PSA_KA_MASK_DUAL_USE (          \
+        0 )
+
+typedef struct
+{
+    psa_key_type_t type;
+    psa_key_bits_t bits;
+    psa_key_lifetime_t lifetime;
+    mbedtls_svc_key_id_t id;
+    psa_key_policy_t policy;
+    psa_key_attributes_flag_t flags;
+} psa_core_key_attributes_t;
+
+#define PSA_CORE_KEY_ATTRIBUTES_INIT {PSA_KEY_TYPE_NONE, 0, PSA_KEY_LIFETIME_VOLATILE, MBEDTLS_SVC_KEY_ID_INIT, PSA_KEY_POLICY_INIT, 0}
+
+struct psa_key_attributes_s
+{
+    psa_core_key_attributes_t core;
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+    psa_key_slot_number_t slot_number;
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+    void *domain_parameters;
+    size_t domain_parameters_size;
+};
+
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+#define PSA_KEY_ATTRIBUTES_INIT {PSA_CORE_KEY_ATTRIBUTES_INIT, 0, NULL, 0}
+#else
+#define PSA_KEY_ATTRIBUTES_INIT {PSA_CORE_KEY_ATTRIBUTES_INIT, NULL, 0}
+#endif
+
+static inline struct psa_key_attributes_s psa_key_attributes_init( void )
+{
+    const struct psa_key_attributes_s v = PSA_KEY_ATTRIBUTES_INIT;
+    return( v );
+}
+
+static inline void psa_set_key_id( psa_key_attributes_t *attributes,
+                                   mbedtls_svc_key_id_t key )
+{
+    psa_key_lifetime_t lifetime = attributes->core.lifetime;
+
+    attributes->core.id = key;
+
+    if( PSA_KEY_LIFETIME_IS_VOLATILE( lifetime ) )
+    {
+        attributes->core.lifetime =
+            PSA_KEY_LIFETIME_FROM_PERSISTENCE_AND_LOCATION(
+                PSA_KEY_LIFETIME_PERSISTENT,
+                PSA_KEY_LIFETIME_GET_LOCATION( lifetime ) );
+    }
+}
+
+static inline mbedtls_svc_key_id_t psa_get_key_id(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.id );
+}
+
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+static inline void mbedtls_set_key_owner_id( psa_key_attributes_t *attributes,
+                                             mbedtls_key_owner_id_t owner )
+{
+    attributes->core.id.owner = owner;
+}
+#endif
+
+static inline void psa_set_key_lifetime(psa_key_attributes_t *attributes,
+                                        psa_key_lifetime_t lifetime)
+{
+    attributes->core.lifetime = lifetime;
+    if( PSA_KEY_LIFETIME_IS_VOLATILE( lifetime ) )
+    {
+#ifdef MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER
+        attributes->core.id.key_id = 0;
+#else
+        attributes->core.id = 0;
+#endif
+    }
+}
+
+static inline psa_key_lifetime_t psa_get_key_lifetime(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.lifetime );
+}
+
+static inline void psa_extend_key_usage_flags( psa_key_usage_t *usage_flags )
+{
+    if( *usage_flags & PSA_KEY_USAGE_SIGN_HASH )
+        *usage_flags |= PSA_KEY_USAGE_SIGN_MESSAGE;
+
+    if( *usage_flags & PSA_KEY_USAGE_VERIFY_HASH )
+        *usage_flags |= PSA_KEY_USAGE_VERIFY_MESSAGE;
+}
+
+static inline void psa_set_key_usage_flags(psa_key_attributes_t *attributes,
+                                           psa_key_usage_t usage_flags)
+{
+    psa_extend_key_usage_flags( &usage_flags );
+    attributes->core.policy.usage = usage_flags;
+}
+
+static inline psa_key_usage_t psa_get_key_usage_flags(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.usage );
+}
+
+static inline void psa_set_key_algorithm(psa_key_attributes_t *attributes,
+                                         psa_algorithm_t alg)
+{
+    attributes->core.policy.alg = alg;
+}
+
+static inline psa_algorithm_t psa_get_key_algorithm(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.policy.alg );
+}
+
+/* This function is declared in crypto_extra.h, which comes after this
+ * header file, but we need the function here, so repeat the declaration. */
+psa_status_t psa_set_key_domain_parameters(psa_key_attributes_t *attributes,
+                                           psa_key_type_t type,
+                                           const uint8_t *data,
+                                           size_t data_length);
+
+static inline void psa_set_key_type(psa_key_attributes_t *attributes,
+                                    psa_key_type_t type)
+{
+    if( attributes->domain_parameters == NULL )
+    {
+        /* Common case: quick path */
+        attributes->core.type = type;
+    }
+    else
+    {
+        /* Call the bigger function to free the old domain paramteres.
+         * Ignore any errors which may arise due to type requiring
+         * non-default domain parameters, since this function can't
+         * report errors. */
+        (void) psa_set_key_domain_parameters( attributes, type, NULL, 0 );
+    }
+}
+
+static inline psa_key_type_t psa_get_key_type(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.type );
+}
+
+static inline void psa_set_key_bits(psa_key_attributes_t *attributes,
+                                    size_t bits)
+{
+    if( bits > PSA_MAX_KEY_BITS )
+        attributes->core.bits = PSA_KEY_BITS_TOO_LARGE;
+    else
+        attributes->core.bits = (psa_key_bits_t) bits;
+}
+
+static inline size_t psa_get_key_bits(
+    const psa_key_attributes_t *attributes)
+{
+    return( attributes->core.bits );
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PSA_CRYPTO_STRUCT_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_types.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_types.h
new file mode 100644
index 00000000000..386c7d794b4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_types.h
@@ -0,0 +1,383 @@
+/**
+ * \file psa/crypto_types.h
+ *
+ * \brief PSA cryptography module: type aliases.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h. Drivers must include the appropriate driver
+ * header file.
+ *
+ * This file contains portable definitions of integral types for properties
+ * of cryptographic keys, designations of cryptographic algorithms, and
+ * error codes returned by the library.
+ *
+ * This header file does not declare any function.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_TYPES_H
+#define PSA_CRYPTO_TYPES_H
+
+#include "crypto_platform.h"
+
+/* If MBEDTLS_PSA_CRYPTO_C is defined, make sure MBEDTLS_PSA_CRYPTO_CLIENT
+ * is defined as well to include all PSA code.
+ */
+#if defined(MBEDTLS_PSA_CRYPTO_C)
+#define MBEDTLS_PSA_CRYPTO_CLIENT
+#endif /* MBEDTLS_PSA_CRYPTO_C */
+
+#include <stdint.h>
+
+/** \defgroup error Error codes
+ * @{
+ */
+
+/**
+ * \brief Function return status.
+ *
+ * This is either #PSA_SUCCESS (which is zero), indicating success,
+ * or a small negative value indicating that an error occurred. Errors are
+ * encoded as one of the \c PSA_ERROR_xxx values defined here. */
+/* If #PSA_SUCCESS is already defined, it means that #psa_status_t
+ * is also defined in an external header, so prevent its multiple
+ * definition.
+ */
+#ifndef PSA_SUCCESS
+typedef int32_t psa_status_t;
+#endif
+
+/**@}*/
+
+/** \defgroup crypto_types Key and algorithm types
+ * @{
+ */
+
+/** \brief Encoding of a key type.
+ */
+typedef uint16_t psa_key_type_t;
+
+/** The type of PSA elliptic curve family identifiers.
+ *
+ * The curve identifier is required to create an ECC key using the
+ * PSA_KEY_TYPE_ECC_KEY_PAIR() or PSA_KEY_TYPE_ECC_PUBLIC_KEY()
+ * macros.
+ *
+ * Values defined by this standard will never be in the range 0x80-0xff.
+ * Vendors who define additional families must use an encoding in this range.
+ */
+typedef uint8_t psa_ecc_family_t;
+
+/** The type of PSA Diffie-Hellman group family identifiers.
+ *
+ * The group identifier is required to create an Diffie-Hellman key using the
+ * PSA_KEY_TYPE_DH_KEY_PAIR() or PSA_KEY_TYPE_DH_PUBLIC_KEY()
+ * macros.
+ *
+ * Values defined by this standard will never be in the range 0x80-0xff.
+ * Vendors who define additional families must use an encoding in this range.
+ */
+typedef uint8_t psa_dh_family_t;
+
+/** \brief Encoding of a cryptographic algorithm.
+ *
+ * For algorithms that can be applied to multiple key types, this type
+ * does not encode the key type. For example, for symmetric ciphers
+ * based on a block cipher, #psa_algorithm_t encodes the block cipher
+ * mode and the padding mode while the block cipher itself is encoded
+ * via #psa_key_type_t.
+ */
+typedef uint32_t psa_algorithm_t;
+
+/**@}*/
+
+/** \defgroup key_lifetimes Key lifetimes
+ * @{
+ */
+
+/** Encoding of key lifetimes.
+ *
+ * The lifetime of a key indicates where it is stored and what system actions
+ * may create and destroy it.
+ *
+ * Lifetime values have the following structure:
+ * - Bits 0-7 (#PSA_KEY_LIFETIME_GET_PERSISTENCE(\c lifetime)):
+ *   persistence level. This value indicates what device management
+ *   actions can cause it to be destroyed. In particular, it indicates
+ *   whether the key is _volatile_ or _persistent_.
+ *   See ::psa_key_persistence_t for more information.
+ * - Bits 8-31 (#PSA_KEY_LIFETIME_GET_LOCATION(\c lifetime)):
+ *   location indicator. This value indicates which part of the system
+ *   has access to the key material and can perform operations using the key.
+ *   See ::psa_key_location_t for more information.
+ *
+ * Volatile keys are automatically destroyed when the application instance
+ * terminates or on a power reset of the device. Persistent keys are
+ * preserved until the application explicitly destroys them or until an
+ * integration-specific device management event occurs (for example,
+ * a factory reset).
+ *
+ * Persistent keys have a key identifier of type #mbedtls_svc_key_id_t.
+ * This identifier remains valid throughout the lifetime of the key,
+ * even if the application instance that created the key terminates.
+ * The application can call psa_open_key() to open a persistent key that
+ * it created previously.
+ *
+ * The default lifetime of a key is #PSA_KEY_LIFETIME_VOLATILE. The lifetime
+ * #PSA_KEY_LIFETIME_PERSISTENT is supported if persistent storage is
+ * available. Other lifetime values may be supported depending on the
+ * library configuration.
+ */
+typedef uint32_t psa_key_lifetime_t;
+
+/** Encoding of key persistence levels.
+ *
+ * What distinguishes different persistence levels is what device management
+ * events may cause keys to be destroyed. _Volatile_ keys are destroyed
+ * by a power reset. Persistent keys may be destroyed by events such as
+ * a transfer of ownership or a factory reset. What management events
+ * actually affect persistent keys at different levels is outside the
+ * scope of the PSA Cryptography specification.
+ *
+ * The PSA Cryptography specification defines the following values of
+ * persistence levels:
+ * - \c 0 = #PSA_KEY_PERSISTENCE_VOLATILE: volatile key.
+ *   A volatile key is automatically destroyed by the implementation when
+ *   the application instance terminates. In particular, a volatile key
+ *   is automatically destroyed on a power reset of the device.
+ * - \c 1 = #PSA_KEY_PERSISTENCE_DEFAULT:
+ *   persistent key with a default lifetime.
+ * - \c 2-254: currently not supported by Mbed TLS.
+ * - \c 255 = #PSA_KEY_PERSISTENCE_READ_ONLY:
+ *   read-only or write-once key.
+ *   A key with this persistence level cannot be destroyed.
+ *   Mbed TLS does not currently offer a way to create such keys, but
+ *   integrations of Mbed TLS can use it for built-in keys that the
+ *   application cannot modify (for example, a hardware unique key (HUK)).
+ *
+ * \note Key persistence levels are 8-bit values. Key management
+ *       interfaces operate on lifetimes (type ::psa_key_lifetime_t) which
+ *       encode the persistence as the lower 8 bits of a 32-bit value.
+ */
+typedef uint8_t psa_key_persistence_t;
+
+/** Encoding of key location indicators.
+ *
+ * If an integration of Mbed TLS can make calls to external
+ * cryptoprocessors such as secure elements, the location of a key
+ * indicates which secure element performs the operations on the key.
+ * Depending on the design of the secure element, the key
+ * material may be stored either in the secure element, or
+ * in wrapped (encrypted) form alongside the key metadata in the
+ * primary local storage.
+ *
+ * The PSA Cryptography API specification defines the following values of
+ * location indicators:
+ * - \c 0: primary local storage.
+ *   This location is always available.
+ *   The primary local storage is typically the same storage area that
+ *   contains the key metadata.
+ * - \c 1: primary secure element.
+ *   Integrations of Mbed TLS should support this value if there is a secure
+ *   element attached to the operating environment.
+ *   As a guideline, secure elements may provide higher resistance against
+ *   side channel and physical attacks than the primary local storage, but may
+ *   have restrictions on supported key types, sizes, policies and operations
+ *   and may have different performance characteristics.
+ * - \c 2-0x7fffff: other locations defined by a PSA specification.
+ *   The PSA Cryptography API does not currently assign any meaning to these
+ *   locations, but future versions of that specification or other PSA
+ *   specifications may do so.
+ * - \c 0x800000-0xffffff: vendor-defined locations.
+ *   No PSA specification will assign a meaning to locations in this range.
+ *
+ * \note Key location indicators are 24-bit values. Key management
+ *       interfaces operate on lifetimes (type ::psa_key_lifetime_t) which
+ *       encode the location as the upper 24 bits of a 32-bit value.
+ */
+typedef uint32_t psa_key_location_t;
+
+/** Encoding of identifiers of persistent keys.
+ *
+ * - Applications may freely choose key identifiers in the range
+ *   #PSA_KEY_ID_USER_MIN to #PSA_KEY_ID_USER_MAX.
+ * - The implementation may define additional key identifiers in the range
+ *   #PSA_KEY_ID_VENDOR_MIN to #PSA_KEY_ID_VENDOR_MAX.
+ * - 0 is reserved as an invalid key identifier.
+ * - Key identifiers outside these ranges are reserved for future use.
+ */
+typedef uint32_t psa_key_id_t;
+
+#if !defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+typedef psa_key_id_t mbedtls_svc_key_id_t;
+
+#else /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+/* Implementation-specific: The Mbed Cryptography library can be built as
+ * part of a multi-client service that exposes the PSA Cryptograpy API in each
+ * client and encodes the client identity in the key identifier argument of
+ * functions such as psa_open_key().
+ */
+typedef struct
+{
+    psa_key_id_t key_id;
+    mbedtls_key_owner_id_t owner;
+} mbedtls_svc_key_id_t;
+
+#endif /* !MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/**@}*/
+
+/** \defgroup policy Key policies
+ * @{
+ */
+
+/** \brief Encoding of permitted usage on a key. */
+typedef uint32_t psa_key_usage_t;
+
+/**@}*/
+
+/** \defgroup attributes Key attributes
+ * @{
+ */
+
+/** The type of a structure containing key attributes.
+ *
+ * This is an opaque structure that can represent the metadata of a key
+ * object. Metadata that can be stored in attributes includes:
+ * - The location of the key in storage, indicated by its key identifier
+ *   and its lifetime.
+ * - The key's policy, comprising usage flags and a specification of
+ *   the permitted algorithm(s).
+ * - Information about the key itself: the key type and its size.
+ * - Additional implementation-defined attributes.
+ *
+ * The actual key material is not considered an attribute of a key.
+ * Key attributes do not contain information that is generally considered
+ * highly confidential.
+ *
+ * An attribute structure works like a simple data structure where each function
+ * `psa_set_key_xxx` sets a field and the corresponding function
+ * `psa_get_key_xxx` retrieves the value of the corresponding field.
+ * However, a future version of the library  may report values that are
+ * equivalent to the original one, but have a different encoding. Invalid
+ * values may be mapped to different, also invalid values.
+ *
+ * An attribute structure may contain references to auxiliary resources,
+ * for example pointers to allocated memory or indirect references to
+ * pre-calculated values. In order to free such resources, the application
+ * must call psa_reset_key_attributes(). As an exception, calling
+ * psa_reset_key_attributes() on an attribute structure is optional if
+ * the structure has only been modified by the following functions
+ * since it was initialized or last reset with psa_reset_key_attributes():
+ * - psa_set_key_id()
+ * - psa_set_key_lifetime()
+ * - psa_set_key_type()
+ * - psa_set_key_bits()
+ * - psa_set_key_usage_flags()
+ * - psa_set_key_algorithm()
+ *
+ * Before calling any function on a key attribute structure, the application
+ * must initialize it by any of the following means:
+ * - Set the structure to all-bits-zero, for example:
+ *   \code
+ *   psa_key_attributes_t attributes;
+ *   memset(&attributes, 0, sizeof(attributes));
+ *   \endcode
+ * - Initialize the structure to logical zero values, for example:
+ *   \code
+ *   psa_key_attributes_t attributes = {0};
+ *   \endcode
+ * - Initialize the structure to the initializer #PSA_KEY_ATTRIBUTES_INIT,
+ *   for example:
+ *   \code
+ *   psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
+ *   \endcode
+ * - Assign the result of the function psa_key_attributes_init()
+ *   to the structure, for example:
+ *   \code
+ *   psa_key_attributes_t attributes;
+ *   attributes = psa_key_attributes_init();
+ *   \endcode
+ *
+ * A freshly initialized attribute structure contains the following
+ * values:
+ *
+ * - lifetime: #PSA_KEY_LIFETIME_VOLATILE.
+ * - key identifier: 0 (which is not a valid key identifier).
+ * - type: \c 0 (meaning that the type is unspecified).
+ * - key size: \c 0 (meaning that the size is unspecified).
+ * - usage flags: \c 0 (which allows no usage except exporting a public key).
+ * - algorithm: \c 0 (which allows no cryptographic usage, but allows
+ *   exporting).
+ *
+ * A typical sequence to create a key is as follows:
+ * -# Create and initialize an attribute structure.
+ * -# If the key is persistent, call psa_set_key_id().
+ *    Also call psa_set_key_lifetime() to place the key in a non-default
+ *    location.
+ * -# Set the key policy with psa_set_key_usage_flags() and
+ *    psa_set_key_algorithm().
+ * -# Set the key type with psa_set_key_type().
+ *    Skip this step if copying an existing key with psa_copy_key().
+ * -# When generating a random key with psa_generate_key() or deriving a key
+ *    with psa_key_derivation_output_key(), set the desired key size with
+ *    psa_set_key_bits().
+ * -# Call a key creation function: psa_import_key(), psa_generate_key(),
+ *    psa_key_derivation_output_key() or psa_copy_key(). This function reads
+ *    the attribute structure, creates a key with these attributes, and
+ *    outputs a key identifier to the newly created key.
+ * -# The attribute structure is now no longer necessary.
+ *    You may call psa_reset_key_attributes(), although this is optional
+ *    with the workflow presented here because the attributes currently
+ *    defined in this specification do not require any additional resources
+ *    beyond the structure itself.
+ *
+ * A typical sequence to query a key's attributes is as follows:
+ * -# Call psa_get_key_attributes().
+ * -# Call `psa_get_key_xxx` functions to retrieve the attribute(s) that
+ *    you are interested in.
+ * -# Call psa_reset_key_attributes() to free any resources that may be
+ *    used by the attribute structure.
+ *
+ * Once a key has been created, it is impossible to change its attributes.
+ */
+typedef struct psa_key_attributes_s psa_key_attributes_t;
+
+
+#ifndef __DOXYGEN_ONLY__
+#if defined(MBEDTLS_PSA_CRYPTO_SE_C)
+/* Mbed Crypto defines this type in crypto_types.h because it is also
+ * visible to applications through an implementation-specific extension.
+ * For the PSA Cryptography specification, this type is only visible
+ * via crypto_se_driver.h. */
+typedef uint64_t psa_key_slot_number_t;
+#endif /* MBEDTLS_PSA_CRYPTO_SE_C */
+#endif /* !__DOXYGEN_ONLY__ */
+
+/**@}*/
+
+/** \defgroup derivation Key derivation
+ * @{
+ */
+
+/** \brief Encoding of the step of a key derivation. */
+typedef uint16_t psa_key_derivation_step_t;
+
+/**@}*/
+
+#endif /* PSA_CRYPTO_TYPES_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_values.h b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_values.h
new file mode 100644
index 00000000000..fafe93cf9ba
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/mbedtls/include/psa/crypto_values.h
@@ -0,0 +1,2325 @@
+/**
+ * \file psa/crypto_values.h
+ *
+ * \brief PSA cryptography module: macros to build and analyze integer values.
+ *
+ * \note This file may not be included directly. Applications must
+ * include psa/crypto.h. Drivers must include the appropriate driver
+ * header file.
+ *
+ * This file contains portable definitions of macros to build and analyze
+ * values of integral types that encode properties of cryptographic keys,
+ * designations of cryptographic algorithms, and error codes returned by
+ * the library.
+ *
+ * This header file only defines preprocessor macros.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef PSA_CRYPTO_VALUES_H
+#define PSA_CRYPTO_VALUES_H
+
+/** \defgroup error Error codes
+ * @{
+ */
+
+/* PSA error codes */
+
+/** The action was completed successfully. */
+#define PSA_SUCCESS ((psa_status_t)0)
+
+/** An error occurred that does not correspond to any defined
+ * failure cause.
+ *
+ * Implementations may use this error code if none of the other standard
+ * error codes are applicable. */
+#define PSA_ERROR_GENERIC_ERROR         ((psa_status_t)-132)
+
+/** The requested operation or a parameter is not supported
+ * by this implementation.
+ *
+ * Implementations should return this error code when an enumeration
+ * parameter such as a key type, algorithm, etc. is not recognized.
+ * If a combination of parameters is recognized and identified as
+ * not valid, return #PSA_ERROR_INVALID_ARGUMENT instead. */
+#define PSA_ERROR_NOT_SUPPORTED         ((psa_status_t)-134)
+
+/** The requested action is denied by a policy.
+ *
+ * Implementations should return this error code when the parameters
+ * are recognized as valid and supported, and a policy explicitly
+ * denies the requested operation.
+ *
+ * If a subset of the parameters of a function call identify a
+ * forbidden operation, and another subset of the parameters are
+ * not valid or not supported, it is unspecified whether the function
+ * returns #PSA_ERROR_NOT_PERMITTED, #PSA_ERROR_NOT_SUPPORTED or
+ * #PSA_ERROR_INVALID_ARGUMENT. */
+#define PSA_ERROR_NOT_PERMITTED         ((psa_status_t)-133)
+
+/** An output buffer is too small.
+ *
+ * Applications can call the \c PSA_xxx_SIZE macro listed in the function
+ * description to determine a sufficient buffer size.
+ *
+ * Implementations should preferably return this error code only
+ * in cases when performing the operation with a larger output
+ * buffer would succeed. However implementations may return this
+ * error if a function has invalid or unsupported parameters in addition
+ * to the parameters that determine the necessary output buffer size. */
+#define PSA_ERROR_BUFFER_TOO_SMALL      ((psa_status_t)-138)
+
+/** Asking for an item that already exists
+ *
+ * Implementations should return this error, when attempting
+ * to write an item (like a key) that already exists. */
+#define PSA_ERROR_ALREADY_EXISTS        ((psa_status_t)-139)
+
+/** Asking for an item that doesn't exist
+ *
+ * Implementations should return this error, if a requested item (like
+ * a key) does not exist. */
+#define PSA_ERROR_DOES_NOT_EXIST        ((psa_status_t)-140)
+
+/** The requested action cannot be performed in the current state.
+ *
+ * Multipart operations return this error when one of the
+ * functions is called out of sequence. Refer to the function
+ * descriptions for permitted sequencing of functions.
+ *
+ * Implementations shall not return this error code to indicate
+ * that a key either exists or not,
+ * but shall instead return #PSA_ERROR_ALREADY_EXISTS or #PSA_ERROR_DOES_NOT_EXIST
+ * as applicable.
+ *
+ * Implementations shall not return this error code to indicate that a
+ * key identifier is invalid, but shall return #PSA_ERROR_INVALID_HANDLE
+ * instead. */
+#define PSA_ERROR_BAD_STATE             ((psa_status_t)-137)
+
+/** The parameters passed to the function are invalid.
+ *
+ * Implementations may return this error any time a parameter or
+ * combination of parameters are recognized as invalid.
+ *
+ * Implementations shall not return this error code to indicate that a
+ * key identifier is invalid, but shall return #PSA_ERROR_INVALID_HANDLE
+ * instead.
+ */
+#define PSA_ERROR_INVALID_ARGUMENT      ((psa_status_t)-135)
+
+/** There is not enough runtime memory.
+ *
+ * If the action is carried out across multiple security realms, this
+ * error can refer to available memory in any of the security realms. */
+#define PSA_ERROR_INSUFFICIENT_MEMORY   ((psa_status_t)-141)
+
+/** There is not enough persistent storage.
+ *
+ * Functions that modify the key storage return this error code if
+ * there is insufficient storage space on the host media. In addition,
+ * many functions that do not otherwise access storage may return this
+ * error code if the implementation requires a mandatory log entry for
+ * the requested action and the log storage space is full. */
+#define PSA_ERROR_INSUFFICIENT_STORAGE  ((psa_status_t)-142)
+
+/** There was a communication failure inside the implementation.
+ *
+ * This can indicate a communication failure between the application
+ * and an external cryptoprocessor or between the cryptoprocessor and
+ * an external volatile or persistent memory. A communication failure
+ * may be transient or permanent depending on the cause.
+ *
+ * \warning If a function returns this error, it is undetermined
+ * whether the requested action has completed or not. Implementations
+ * should return #PSA_SUCCESS on successful completion whenever
+ * possible, however functions may return #PSA_ERROR_COMMUNICATION_FAILURE
+ * if the requested action was completed successfully in an external
+ * cryptoprocessor but there was a breakdown of communication before
+ * the cryptoprocessor could report the status to the application.
+ */
+#define PSA_ERROR_COMMUNICATION_FAILURE ((psa_status_t)-145)
+
+/** There was a storage failure that may have led to data loss.
+ *
+ * This error indicates that some persistent storage is corrupted.
+ * It should not be used for a corruption of volatile memory
+ * (use #PSA_ERROR_CORRUPTION_DETECTED), for a communication error
+ * between the cryptoprocessor and its external storage (use
+ * #PSA_ERROR_COMMUNICATION_FAILURE), or when the storage is
+ * in a valid state but is full (use #PSA_ERROR_INSUFFICIENT_STORAGE).
+ *
+ * Note that a storage failure does not indicate that any data that was
+ * previously read is invalid. However this previously read data may no
+ * longer be readable from storage.
+ *
+ * When a storage failure occurs, it is no longer possible to ensure
+ * the global integrity of the keystore. Depending on the global
+ * integrity guarantees offered by the implementation, access to other
+ * data may or may not fail even if the data is still readable but
+ * its integrity cannot be guaranteed.
+ *
+ * Implementations should only use this error code to report a
+ * permanent storage corruption. However application writers should
+ * keep in mind that transient errors while reading the storage may be
+ * reported using this error code. */
+#define PSA_ERROR_STORAGE_FAILURE       ((psa_status_t)-146)
+
+/** A hardware failure was detected.
+ *
+ * A hardware failure may be transient or permanent depending on the
+ * cause. */
+#define PSA_ERROR_HARDWARE_FAILURE      ((psa_status_t)-147)
+
+/** A tampering attempt was detected.
+ *
+ * If an application receives this error code, there is no guarantee
+ * that previously accessed or computed data was correct and remains
+ * confidential. Applications should not perform any security function
+ * and should enter a safe failure state.
+ *
+ * Implementations may return this error code if they detect an invalid
+ * state that cannot happen during normal operation and that indicates
+ * that the implementation's security guarantees no longer hold. Depending
+ * on the implementation architecture and on its security and safety goals,
+ * the implementation may forcibly terminate the application.
+ *
+ * This error code is intended as a last resort when a security breach
+ * is detected and it is unsure whether the keystore data is still
+ * protected. Implementations shall only return this error code
+ * to report an alarm from a tampering detector, to indicate that
+ * the confidentiality of stored data can no longer be guaranteed,
+ * or to indicate that the integrity of previously returned data is now
+ * considered compromised. Implementations shall not use this error code
+ * to indicate a hardware failure that merely makes it impossible to
+ * perform the requested operation (use #PSA_ERROR_COMMUNICATION_FAILURE,
+ * #PSA_ERROR_STORAGE_FAILURE, #PSA_ERROR_HARDWARE_FAILURE,
+ * #PSA_ERROR_INSUFFICIENT_ENTROPY or other applicable error code
+ * instead).
+ *
+ * This error indicates an attack against the application. Implementations
+ * shall not return this error code as a consequence of the behavior of
+ * the application itself. */
+#define PSA_ERROR_CORRUPTION_DETECTED    ((psa_status_t)-151)
+
+/** There is not enough entropy to generate random data needed
+ * for the requested action.
+ *
+ * This error indicates a failure of a hardware random generator.
+ * Application writers should note that this error can be returned not
+ * only by functions whose purpose is to generate random data, such
+ * as key, IV or nonce generation, but also by functions that execute
+ * an algorithm with a randomized result, as well as functions that
+ * use randomization of intermediate computations as a countermeasure
+ * to certain attacks.
+ *
+ * Implementations should avoid returning this error after psa_crypto_init()
+ * has succeeded. Implementations should generate sufficient
+ * entropy during initialization and subsequently use a cryptographically
+ * secure pseudorandom generator (PRNG). However implementations may return
+ * this error at any time if a policy requires the PRNG to be reseeded
+ * during normal operation. */
+#define PSA_ERROR_INSUFFICIENT_ENTROPY  ((psa_status_t)-148)
+
+/** The signature, MAC or hash is incorrect.
+ *
+ * Verification functions return this error if the verification
+ * calculations completed successfully, and the value to be verified
+ * was determined to be incorrect.
+ *
+ * If the value to verify has an invalid size, implementations may return
+ * either #PSA_ERROR_INVALID_ARGUMENT or #PSA_ERROR_INVALID_SIGNATURE. */
+#define PSA_ERROR_INVALID_SIGNATURE     ((psa_status_t)-149)
+
+/** The decrypted padding is incorrect.
+ *
+ * \warning In some protocols, when decrypting data, it is essential that
+ * the behavior of the application does not depend on whether the padding
+ * is correct, down to precise timing. Applications should prefer
+ * protocols that use authenticated encryption rather than plain
+ * encryption. If the application must perform a decryption of
+ * unauthenticated data, the application writer should take care not
+ * to reveal whether the padding is invalid.
+ *
+ * Implementations should strive to make valid and invalid padding
+ * as close as possible to indistinguishable to an external observer.
+ * In particular, the timing of a decryption operation should not
+ * depend on the validity of the padding. */
+#define PSA_ERROR_INVALID_PADDING       ((psa_status_t)-150)
+
+/** Return this error when there's insufficient data when attempting
+ * to read from a resource. */
+#define PSA_ERROR_INSUFFICIENT_DATA     ((psa_status_t)-143)
+
+/** The key identifier is not valid. See also :ref:\`key-handles\`.
+ */
+#define PSA_ERROR_INVALID_HANDLE        ((psa_status_t)-136)
+
+/** Stored data has been corrupted.
+ *
+ * This error indicates that some persistent storage has suffered corruption.
+ * It does not indicate the following situations, which have specific error
+ * codes:
+ *
+ * - A corruption of volatile memory - use #PSA_ERROR_CORRUPTION_DETECTED.
+ * - A communication error between the cryptoprocessor and its external
+ *   storage - use #PSA_ERROR_COMMUNICATION_FAILURE.
+ * - When the storage is in a valid state but is full - use
+ *   #PSA_ERROR_INSUFFICIENT_STORAGE.
+ * - When the storage fails for other reasons - use
+ *   #PSA_ERROR_STORAGE_FAILURE.
+ * - When the stored data is not valid - use #PSA_ERROR_DATA_INVALID.
+ *
+ * \note A storage corruption does not indicate that any data that was
+ * previously read is invalid. However this previously read data might no
+ * longer be readable from storage.
+ *
+ * When a storage failure occurs, it is no longer possible to ensure the
+ * global integrity of the keystore.
+ */
+#define PSA_ERROR_DATA_CORRUPT          ((psa_status_t)-152)
+
+/** Data read from storage is not valid for the implementation.
+ *
+ * This error indicates that some data read from storage does not have a valid
+ * format. It does not indicate the following situations, which have specific
+ * error codes:
+ *
+ * - When the storage or stored data is corrupted - use #PSA_ERROR_DATA_CORRUPT
+ * - When the storage fails for other reasons - use #PSA_ERROR_STORAGE_FAILURE
+ * - An invalid argument to the API - use #PSA_ERROR_INVALID_ARGUMENT
+ *
+ * This error is typically a result of either storage corruption on a
+ * cleartext storage backend, or an attempt to read data that was
+ * written by an incompatible version of the library.
+ */
+#define PSA_ERROR_DATA_INVALID          ((psa_status_t)-153)
+
+/**@}*/
+
+/** \defgroup crypto_types Key and algorithm types
+ * @{
+ */
+
+/** An invalid key type value.
+ *
+ * Zero is not the encoding of any key type.
+ */
+#define PSA_KEY_TYPE_NONE                           ((psa_key_type_t)0x0000)
+
+/** Vendor-defined key type flag.
+ *
+ * Key types defined by this standard will never have the
+ * #PSA_KEY_TYPE_VENDOR_FLAG bit set. Vendors who define additional key types
+ * must use an encoding with the #PSA_KEY_TYPE_VENDOR_FLAG bit set and should
+ * respect the bitwise structure used by standard encodings whenever practical.
+ */
+#define PSA_KEY_TYPE_VENDOR_FLAG                    ((psa_key_type_t)0x8000)
+
+#define PSA_KEY_TYPE_CATEGORY_MASK                  ((psa_key_type_t)0x7000)
+#define PSA_KEY_TYPE_CATEGORY_RAW                   ((psa_key_type_t)0x1000)
+#define PSA_KEY_TYPE_CATEGORY_SYMMETRIC             ((psa_key_type_t)0x2000)
+#define PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY            ((psa_key_type_t)0x4000)
+#define PSA_KEY_TYPE_CATEGORY_KEY_PAIR              ((psa_key_type_t)0x7000)
+
+#define PSA_KEY_TYPE_CATEGORY_FLAG_PAIR             ((psa_key_type_t)0x3000)
+
+/** Whether a key type is vendor-defined.
+ *
+ * See also #PSA_KEY_TYPE_VENDOR_FLAG.
+ */
+#define PSA_KEY_TYPE_IS_VENDOR_DEFINED(type) \
+    (((type) & PSA_KEY_TYPE_VENDOR_FLAG) != 0)
+
+/** Whether a key type is an unstructured array of bytes.
+ *
+ * This encompasses both symmetric keys and non-key data.
+ */
+#define PSA_KEY_TYPE_IS_UNSTRUCTURED(type) \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_RAW || \
+     ((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC)
+
+/** Whether a key type is asymmetric: either a key pair or a public key. */
+#define PSA_KEY_TYPE_IS_ASYMMETRIC(type)                                \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK                               \
+      & ~PSA_KEY_TYPE_CATEGORY_FLAG_PAIR) ==                            \
+     PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY)
+/** Whether a key type is the public part of a key pair. */
+#define PSA_KEY_TYPE_IS_PUBLIC_KEY(type)                                \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_PUBLIC_KEY)
+/** Whether a key type is a key pair containing a private part and a public
+ * part. */
+#define PSA_KEY_TYPE_IS_KEY_PAIR(type)                                   \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_KEY_PAIR)
+/** The key pair type corresponding to a public key type.
+ *
+ * You may also pass a key pair type as \p type, it will be left unchanged.
+ *
+ * \param type      A public key type or key pair type.
+ *
+ * \return          The corresponding key pair type.
+ *                  If \p type is not a public key or a key pair,
+ *                  the return value is undefined.
+ */
+#define PSA_KEY_TYPE_KEY_PAIR_OF_PUBLIC_KEY(type)        \
+    ((type) | PSA_KEY_TYPE_CATEGORY_FLAG_PAIR)
+/** The public key type corresponding to a key pair type.
+ *
+ * You may also pass a key pair type as \p type, it will be left unchanged.
+ *
+ * \param type      A public key type or key pair type.
+ *
+ * \return          The corresponding public key type.
+ *                  If \p type is not a public key or a key pair,
+ *                  the return value is undefined.
+ */
+#define PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type)        \
+    ((type) & ~PSA_KEY_TYPE_CATEGORY_FLAG_PAIR)
+
+/** Raw data.
+ *
+ * A "key" of this type cannot be used for any cryptographic operation.
+ * Applications may use this type to store arbitrary data in the keystore. */
+#define PSA_KEY_TYPE_RAW_DATA                       ((psa_key_type_t)0x1001)
+
+/** HMAC key.
+ *
+ * The key policy determines which underlying hash algorithm the key can be
+ * used for.
+ *
+ * HMAC keys should generally have the same size as the underlying hash.
+ * This size can be calculated with #PSA_HASH_LENGTH(\c alg) where
+ * \c alg is the HMAC algorithm or the underlying hash algorithm. */
+#define PSA_KEY_TYPE_HMAC                           ((psa_key_type_t)0x1100)
+
+/** A secret for key derivation.
+ *
+ * The key policy determines which key derivation algorithm the key
+ * can be used for.
+ */
+#define PSA_KEY_TYPE_DERIVE                         ((psa_key_type_t)0x1200)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the AES block cipher.
+ *
+ * The size of the key can be 16 bytes (AES-128), 24 bytes (AES-192) or
+ * 32 bytes (AES-256).
+ */
+#define PSA_KEY_TYPE_AES                            ((psa_key_type_t)0x2400)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the
+ * ARIA block cipher. */
+#define PSA_KEY_TYPE_ARIA                           ((psa_key_type_t)0x2406)
+
+/** Key for a cipher or MAC algorithm based on DES or 3DES (Triple-DES).
+ *
+ * The size of the key can be 64 bits (single DES), 128 bits (2-key 3DES) or
+ * 192 bits (3-key 3DES).
+ *
+ * Note that single DES and 2-key 3DES are weak and strongly
+ * deprecated and should only be used to decrypt legacy data. 3-key 3DES
+ * is weak and deprecated and should only be used in legacy protocols.
+ */
+#define PSA_KEY_TYPE_DES                            ((psa_key_type_t)0x2301)
+
+/** Key for a cipher, AEAD or MAC algorithm based on the
+ * Camellia block cipher. */
+#define PSA_KEY_TYPE_CAMELLIA                       ((psa_key_type_t)0x2403)
+
+/** Key for the RC4 stream cipher.
+ *
+ * Note that RC4 is weak and deprecated and should only be used in
+ * legacy protocols. */
+#define PSA_KEY_TYPE_ARC4                           ((psa_key_type_t)0x2002)
+
+/** Key for the ChaCha20 stream cipher or the Chacha20-Poly1305 AEAD algorithm.
+ *
+ * ChaCha20 and the ChaCha20_Poly1305 construction are defined in RFC 7539.
+ *
+ * Implementations must support 12-byte nonces, may support 8-byte nonces,
+ * and should reject other sizes.
+ */
+#define PSA_KEY_TYPE_CHACHA20                       ((psa_key_type_t)0x2004)
+
+/** RSA public key.
+ *
+ * The size of an RSA key is the bit size of the modulus.
+ */
+#define PSA_KEY_TYPE_RSA_PUBLIC_KEY                 ((psa_key_type_t)0x4001)
+/** RSA key pair (private and public key).
+ *
+ * The size of an RSA key is the bit size of the modulus.
+ */
+#define PSA_KEY_TYPE_RSA_KEY_PAIR                   ((psa_key_type_t)0x7001)
+/** Whether a key type is an RSA key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_RSA(type)                                       \
+    (PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) == PSA_KEY_TYPE_RSA_PUBLIC_KEY)
+
+#define PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE            ((psa_key_type_t)0x4100)
+#define PSA_KEY_TYPE_ECC_KEY_PAIR_BASE              ((psa_key_type_t)0x7100)
+#define PSA_KEY_TYPE_ECC_CURVE_MASK                 ((psa_key_type_t)0x00ff)
+/** Elliptic curve key pair.
+ *
+ * The size of an elliptic curve key is the bit size associated with the curve,
+ * i.e. the bit size of *q* for a curve over a field *F<sub>q</sub>*.
+ * See the documentation of `PSA_ECC_FAMILY_xxx` curve families for details.
+ *
+ * \param curve     A value of type ::psa_ecc_family_t that
+ *                  identifies the ECC curve to be used.
+ */
+#define PSA_KEY_TYPE_ECC_KEY_PAIR(curve)         \
+    (PSA_KEY_TYPE_ECC_KEY_PAIR_BASE | (curve))
+/** Elliptic curve public key.
+ *
+ * The size of an elliptic curve public key is the same as the corresponding
+ * private key (see #PSA_KEY_TYPE_ECC_KEY_PAIR and the documentation of
+ * `PSA_ECC_FAMILY_xxx` curve families).
+ *
+ * \param curve     A value of type ::psa_ecc_family_t that
+ *                  identifies the ECC curve to be used.
+ */
+#define PSA_KEY_TYPE_ECC_PUBLIC_KEY(curve)              \
+    (PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE | (curve))
+
+/** Whether a key type is an elliptic curve key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_ECC(type)                                       \
+    ((PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) &                        \
+      ~PSA_KEY_TYPE_ECC_CURVE_MASK) == PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE)
+/** Whether a key type is an elliptic curve key pair. */
+#define PSA_KEY_TYPE_IS_ECC_KEY_PAIR(type)                               \
+    (((type) & ~PSA_KEY_TYPE_ECC_CURVE_MASK) ==                         \
+     PSA_KEY_TYPE_ECC_KEY_PAIR_BASE)
+/** Whether a key type is an elliptic curve public key. */
+#define PSA_KEY_TYPE_IS_ECC_PUBLIC_KEY(type)                            \
+    (((type) & ~PSA_KEY_TYPE_ECC_CURVE_MASK) ==                         \
+     PSA_KEY_TYPE_ECC_PUBLIC_KEY_BASE)
+
+/** Extract the curve from an elliptic curve key type. */
+#define PSA_KEY_TYPE_ECC_GET_FAMILY(type)                        \
+    ((psa_ecc_family_t) (PSA_KEY_TYPE_IS_ECC(type) ?             \
+                        ((type) & PSA_KEY_TYPE_ECC_CURVE_MASK) : \
+                        0))
+
+/** SEC Koblitz curves over prime fields.
+ *
+ * This family comprises the following curves:
+ * secp192k1, secp224k1, secp256k1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECP_K1           ((psa_ecc_family_t) 0x17)
+
+/** SEC random curves over prime fields.
+ *
+ * This family comprises the following curves:
+ * secp192k1, secp224r1, secp256r1, secp384r1, secp521r1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECP_R1           ((psa_ecc_family_t) 0x12)
+/* SECP160R2 (SEC2 v1, obsolete) */
+#define PSA_ECC_FAMILY_SECP_R2           ((psa_ecc_family_t) 0x1b)
+
+/** SEC Koblitz curves over binary fields.
+ *
+ * This family comprises the following curves:
+ * sect163k1, sect233k1, sect239k1, sect283k1, sect409k1, sect571k1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_K1           ((psa_ecc_family_t) 0x27)
+
+/** SEC random curves over binary fields.
+ *
+ * This family comprises the following curves:
+ * sect163r1, sect233r1, sect283r1, sect409r1, sect571r1.
+ * They are defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_R1           ((psa_ecc_family_t) 0x22)
+
+/** SEC additional random curves over binary fields.
+ *
+ * This family comprises the following curve:
+ * sect163r2.
+ * It is defined in _Standards for Efficient Cryptography_,
+ * _SEC 2: Recommended Elliptic Curve Domain Parameters_.
+ * https://www.secg.org/sec2-v2.pdf
+ */
+#define PSA_ECC_FAMILY_SECT_R2           ((psa_ecc_family_t) 0x2b)
+
+/** Brainpool P random curves.
+ *
+ * This family comprises the following curves:
+ * brainpoolP160r1, brainpoolP192r1, brainpoolP224r1, brainpoolP256r1,
+ * brainpoolP320r1, brainpoolP384r1, brainpoolP512r1.
+ * It is defined in RFC 5639.
+ */
+#define PSA_ECC_FAMILY_BRAINPOOL_P_R1    ((psa_ecc_family_t) 0x30)
+
+/** Curve25519 and Curve448.
+ *
+ * This family comprises the following Montgomery curves:
+ * - 255-bit: Bernstein et al.,
+ *   _Curve25519: new Diffie-Hellman speed records_, LNCS 3958, 2006.
+ *   The algorithm #PSA_ALG_ECDH performs X25519 when used with this curve.
+ * - 448-bit: Hamburg,
+ *   _Ed448-Goldilocks, a new elliptic curve_, NIST ECC Workshop, 2015.
+ *   The algorithm #PSA_ALG_ECDH performs X448 when used with this curve.
+ */
+#define PSA_ECC_FAMILY_MONTGOMERY        ((psa_ecc_family_t) 0x41)
+
+/** The twisted Edwards curves Ed25519 and Ed448.
+ *
+ * These curves are suitable for EdDSA (#PSA_ALG_PURE_EDDSA for both curves,
+ * #PSA_ALG_ED25519PH for the 255-bit curve,
+ * #PSA_ALG_ED448PH for the 448-bit curve).
+ *
+ * This family comprises the following twisted Edwards curves:
+ * - 255-bit: Edwards25519, the twisted Edwards curve birationally equivalent
+ *   to Curve25519.
+ *   Bernstein et al., _Twisted Edwards curves_, Africacrypt 2008.
+ * - 448-bit: Edwards448, the twisted Edwards curve birationally equivalent
+ *   to Curve448.
+ *   Hamburg, _Ed448-Goldilocks, a new elliptic curve_, NIST ECC Workshop, 2015.
+ */
+#define PSA_ECC_FAMILY_TWISTED_EDWARDS   ((psa_ecc_family_t) 0x42)
+
+#define PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE             ((psa_key_type_t)0x4200)
+#define PSA_KEY_TYPE_DH_KEY_PAIR_BASE               ((psa_key_type_t)0x7200)
+#define PSA_KEY_TYPE_DH_GROUP_MASK                  ((psa_key_type_t)0x00ff)
+/** Diffie-Hellman key pair.
+ *
+ * \param group     A value of type ::psa_dh_family_t that identifies the
+ *                  Diffie-Hellman group to be used.
+ */
+#define PSA_KEY_TYPE_DH_KEY_PAIR(group)          \
+    (PSA_KEY_TYPE_DH_KEY_PAIR_BASE | (group))
+/** Diffie-Hellman public key.
+ *
+ * \param group     A value of type ::psa_dh_family_t that identifies the
+ *                  Diffie-Hellman group to be used.
+ */
+#define PSA_KEY_TYPE_DH_PUBLIC_KEY(group)               \
+    (PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE | (group))
+
+/** Whether a key type is a Diffie-Hellman key (pair or public-only). */
+#define PSA_KEY_TYPE_IS_DH(type)                                        \
+    ((PSA_KEY_TYPE_PUBLIC_KEY_OF_KEY_PAIR(type) &                        \
+      ~PSA_KEY_TYPE_DH_GROUP_MASK) == PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE)
+/** Whether a key type is a Diffie-Hellman key pair. */
+#define PSA_KEY_TYPE_IS_DH_KEY_PAIR(type)                               \
+    (((type) & ~PSA_KEY_TYPE_DH_GROUP_MASK) ==                         \
+     PSA_KEY_TYPE_DH_KEY_PAIR_BASE)
+/** Whether a key type is a Diffie-Hellman public key. */
+#define PSA_KEY_TYPE_IS_DH_PUBLIC_KEY(type)                            \
+    (((type) & ~PSA_KEY_TYPE_DH_GROUP_MASK) ==                         \
+     PSA_KEY_TYPE_DH_PUBLIC_KEY_BASE)
+
+/** Extract the group from a Diffie-Hellman key type. */
+#define PSA_KEY_TYPE_DH_GET_FAMILY(type)                        \
+    ((psa_dh_family_t) (PSA_KEY_TYPE_IS_DH(type) ?              \
+                       ((type) & PSA_KEY_TYPE_DH_GROUP_MASK) :  \
+                       0))
+
+/** Diffie-Hellman groups defined in RFC 7919 Appendix A.
+ *
+ * This family includes groups with the following key sizes (in bits):
+ * 2048, 3072, 4096, 6144, 8192. A given implementation may support
+ * all of these sizes or only a subset.
+ */
+#define PSA_DH_FAMILY_RFC7919            ((psa_dh_family_t) 0x03)
+
+#define PSA_GET_KEY_TYPE_BLOCK_SIZE_EXPONENT(type)      \
+    (((type) >> 8) & 7)
+/** The block size of a block cipher.
+ *
+ * \param type  A cipher key type (value of type #psa_key_type_t).
+ *
+ * \return      The block size for a block cipher, or 1 for a stream cipher.
+ *              The return value is undefined if \p type is not a supported
+ *              cipher key type.
+ *
+ * \note It is possible to build stream cipher algorithms on top of a block
+ *       cipher, for example CTR mode (#PSA_ALG_CTR).
+ *       This macro only takes the key type into account, so it cannot be
+ *       used to determine the size of the data that #psa_cipher_update()
+ *       might buffer for future processing in general.
+ *
+ * \note This macro returns a compile-time constant if its argument is one.
+ *
+ * \warning This macro may evaluate its argument multiple times.
+ */
+#define PSA_BLOCK_CIPHER_BLOCK_LENGTH(type)                                     \
+    (((type) & PSA_KEY_TYPE_CATEGORY_MASK) == PSA_KEY_TYPE_CATEGORY_SYMMETRIC ? \
+     1u << PSA_GET_KEY_TYPE_BLOCK_SIZE_EXPONENT(type) :                         \
+     0u)
+
+/** Vendor-defined algorithm flag.
+ *
+ * Algorithms defined by this standard will never have the #PSA_ALG_VENDOR_FLAG
+ * bit set. Vendors who define additional algorithms must use an encoding with
+ * the #PSA_ALG_VENDOR_FLAG bit set and should respect the bitwise structure
+ * used by standard encodings whenever practical.
+ */
+#define PSA_ALG_VENDOR_FLAG                     ((psa_algorithm_t)0x80000000)
+
+#define PSA_ALG_CATEGORY_MASK                   ((psa_algorithm_t)0x7f000000)
+#define PSA_ALG_CATEGORY_HASH                   ((psa_algorithm_t)0x02000000)
+#define PSA_ALG_CATEGORY_MAC                    ((psa_algorithm_t)0x03000000)
+#define PSA_ALG_CATEGORY_CIPHER                 ((psa_algorithm_t)0x04000000)
+#define PSA_ALG_CATEGORY_AEAD                   ((psa_algorithm_t)0x05000000)
+#define PSA_ALG_CATEGORY_SIGN                   ((psa_algorithm_t)0x06000000)
+#define PSA_ALG_CATEGORY_ASYMMETRIC_ENCRYPTION  ((psa_algorithm_t)0x07000000)
+#define PSA_ALG_CATEGORY_KEY_DERIVATION         ((psa_algorithm_t)0x08000000)
+#define PSA_ALG_CATEGORY_KEY_AGREEMENT          ((psa_algorithm_t)0x09000000)
+
+/** Whether an algorithm is vendor-defined.
+ *
+ * See also #PSA_ALG_VENDOR_FLAG.
+ */
+#define PSA_ALG_IS_VENDOR_DEFINED(alg)                                  \
+    (((alg) & PSA_ALG_VENDOR_FLAG) != 0)
+
+/** Whether the specified algorithm is a hash algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a hash algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HASH(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_HASH)
+
+/** Whether the specified algorithm is a MAC algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a MAC algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_MAC(alg)                                             \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_MAC)
+
+/** Whether the specified algorithm is a symmetric cipher algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a symmetric cipher algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_CIPHER(alg)                                          \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_CIPHER)
+
+/** Whether the specified algorithm is an authenticated encryption
+ * with associated data (AEAD) algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an AEAD algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_AEAD(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_AEAD)
+
+/** Whether the specified algorithm is an asymmetric signature algorithm,
+ * also known as public-key signature algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an asymmetric signature algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN(alg)                                            \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_SIGN)
+
+/** Whether the specified algorithm is an asymmetric encryption algorithm,
+ * also known as public-key encryption algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an asymmetric encryption algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_ASYMMETRIC_ENCRYPTION(alg)                           \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_ASYMMETRIC_ENCRYPTION)
+
+/** Whether the specified algorithm is a key agreement algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a key agreement algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_KEY_AGREEMENT(alg)                                   \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_KEY_AGREEMENT)
+
+/** Whether the specified algorithm is a key derivation algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a key derivation algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_KEY_DERIVATION(alg)                                  \
+    (((alg) & PSA_ALG_CATEGORY_MASK) == PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+/** An invalid algorithm identifier value. */
+#define PSA_ALG_NONE                            ((psa_algorithm_t)0)
+
+#define PSA_ALG_HASH_MASK                       ((psa_algorithm_t)0x000000ff)
+/** MD2 */
+#define PSA_ALG_MD2                             ((psa_algorithm_t)0x02000001)
+/** MD4 */
+#define PSA_ALG_MD4                             ((psa_algorithm_t)0x02000002)
+/** MD5 */
+#define PSA_ALG_MD5                             ((psa_algorithm_t)0x02000003)
+/** PSA_ALG_RIPEMD160 */
+#define PSA_ALG_RIPEMD160                       ((psa_algorithm_t)0x02000004)
+/** SHA1 */
+#define PSA_ALG_SHA_1                           ((psa_algorithm_t)0x02000005)
+/** SHA2-224 */
+#define PSA_ALG_SHA_224                         ((psa_algorithm_t)0x02000008)
+/** SHA2-256 */
+#define PSA_ALG_SHA_256                         ((psa_algorithm_t)0x02000009)
+/** SHA2-384 */
+#define PSA_ALG_SHA_384                         ((psa_algorithm_t)0x0200000a)
+/** SHA2-512 */
+#define PSA_ALG_SHA_512                         ((psa_algorithm_t)0x0200000b)
+/** SHA2-512/224 */
+#define PSA_ALG_SHA_512_224                     ((psa_algorithm_t)0x0200000c)
+/** SHA2-512/256 */
+#define PSA_ALG_SHA_512_256                     ((psa_algorithm_t)0x0200000d)
+/** SHA3-224 */
+#define PSA_ALG_SHA3_224                        ((psa_algorithm_t)0x02000010)
+/** SHA3-256 */
+#define PSA_ALG_SHA3_256                        ((psa_algorithm_t)0x02000011)
+/** SHA3-384 */
+#define PSA_ALG_SHA3_384                        ((psa_algorithm_t)0x02000012)
+/** SHA3-512 */
+#define PSA_ALG_SHA3_512                        ((psa_algorithm_t)0x02000013)
+/** The first 512 bits (64 bytes) of the SHAKE256 output.
+ *
+ * This is the prehashing for Ed448ph (see #PSA_ALG_ED448PH). For other
+ * scenarios where a hash function based on SHA3/SHAKE is desired, SHA3-512
+ * has the same output size and a (theoretically) higher security strength.
+ */
+#define PSA_ALG_SHAKE256_512                    ((psa_algorithm_t)0x02000015)
+
+/** In a hash-and-sign algorithm policy, allow any hash algorithm.
+ *
+ * This value may be used to form the algorithm usage field of a policy
+ * for a signature algorithm that is parametrized by a hash. The key
+ * may then be used to perform operations using the same signature
+ * algorithm parametrized with any supported hash.
+ *
+ * That is, suppose that `PSA_xxx_SIGNATURE` is one of the following macros:
+ * - #PSA_ALG_RSA_PKCS1V15_SIGN, #PSA_ALG_RSA_PSS, #PSA_ALG_RSA_PSS_ANY_SALT,
+ * - #PSA_ALG_ECDSA, #PSA_ALG_DETERMINISTIC_ECDSA.
+ * Then you may create and use a key as follows:
+ * - Set the key usage field using #PSA_ALG_ANY_HASH, for example:
+ *   ```
+ *   psa_set_key_usage_flags(&attributes, PSA_KEY_USAGE_SIGN_HASH); // or VERIFY
+ *   psa_set_key_algorithm(&attributes, PSA_xxx_SIGNATURE(PSA_ALG_ANY_HASH));
+ *   ```
+ * - Import or generate key material.
+ * - Call psa_sign_hash() or psa_verify_hash(), passing
+ *   an algorithm built from `PSA_xxx_SIGNATURE` and a specific hash. Each
+ *   call to sign or verify a message may use a different hash.
+ *   ```
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA_256), ...);
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA_512), ...);
+ *   psa_sign_hash(key, PSA_xxx_SIGNATURE(PSA_ALG_SHA3_256), ...);
+ *   ```
+ *
+ * This value may not be used to build other algorithms that are
+ * parametrized over a hash. For any valid use of this macro to build
+ * an algorithm \c alg, #PSA_ALG_IS_HASH_AND_SIGN(\c alg) is true.
+ *
+ * This value may not be used to build an algorithm specification to
+ * perform an operation. It is only valid to build policies.
+ */
+#define PSA_ALG_ANY_HASH                        ((psa_algorithm_t)0x020000ff)
+
+#define PSA_ALG_MAC_SUBCATEGORY_MASK            ((psa_algorithm_t)0x00c00000)
+#define PSA_ALG_HMAC_BASE                       ((psa_algorithm_t)0x03800000)
+/** Macro to build an HMAC algorithm.
+ *
+ * For example, #PSA_ALG_HMAC(#PSA_ALG_SHA_256) is HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding HMAC algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_HMAC(hash_alg)                                  \
+    (PSA_ALG_HMAC_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_HMAC_GET_HASH(hmac_alg)                             \
+    (PSA_ALG_CATEGORY_HASH | ((hmac_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is an HMAC algorithm.
+ *
+ * HMAC is a family of MAC algorithms that are based on a hash function.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an HMAC algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HMAC(alg)                                            \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_MAC_SUBCATEGORY_MASK)) == \
+     PSA_ALG_HMAC_BASE)
+
+/* In the encoding of a MAC algorithm, the bits corresponding to
+ * PSA_ALG_MAC_TRUNCATION_MASK encode the length to which the MAC is
+ * truncated. As an exception, the value 0 means the untruncated algorithm,
+ * whatever its length is. The length is encoded in 6 bits, so it can
+ * reach up to 63; the largest MAC is 64 bytes so its trivial truncation
+ * to full length is correctly encoded as 0 and any non-trivial truncation
+ * is correctly encoded as a value between 1 and 63. */
+#define PSA_ALG_MAC_TRUNCATION_MASK             ((psa_algorithm_t)0x003f0000)
+#define PSA_MAC_TRUNCATION_OFFSET 16
+
+/* In the encoding of a MAC algorithm, the bit corresponding to
+ * #PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG encodes the fact that the algorithm
+ * is a wildcard algorithm. A key with such wildcard algorithm as permitted
+ * algorithm policy can be used with any algorithm corresponding to the
+ * same base class and having a (potentially truncated) MAC length greater or
+ * equal than the one encoded in #PSA_ALG_MAC_TRUNCATION_MASK. */
+#define PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG   ((psa_algorithm_t)0x00008000)
+
+/** Macro to build a truncated MAC algorithm.
+ *
+ * A truncated MAC algorithm is identical to the corresponding MAC
+ * algorithm except that the MAC value for the truncated algorithm
+ * consists of only the first \p mac_length bytes of the MAC value
+ * for the untruncated algorithm.
+ *
+ * \note    This macro may allow constructing algorithm identifiers that
+ *          are not valid, either because the specified length is larger
+ *          than the untruncated MAC or because the specified length is
+ *          smaller than permitted by the implementation.
+ *
+ * \note    It is implementation-defined whether a truncated MAC that
+ *          is truncated to the same length as the MAC of the untruncated
+ *          algorithm is considered identical to the untruncated algorithm
+ *          for policy comparison purposes.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true). This may be a truncated or untruncated
+ *                      MAC algorithm.
+ * \param mac_length    Desired length of the truncated MAC in bytes.
+ *                      This must be at most the full length of the MAC
+ *                      and must be at least an implementation-specified
+ *                      minimum. The implementation-specified minimum
+ *                      shall not be zero.
+ *
+ * \return              The corresponding MAC algorithm with the specified
+ *                      length.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm or if \p mac_length is too small or
+ *                      too large for the specified MAC algorithm.
+ */
+#define PSA_ALG_TRUNCATED_MAC(mac_alg, mac_length)              \
+    (((mac_alg) & ~(PSA_ALG_MAC_TRUNCATION_MASK |               \
+                    PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG)) |   \
+     ((mac_length) << PSA_MAC_TRUNCATION_OFFSET & PSA_ALG_MAC_TRUNCATION_MASK))
+
+/** Macro to build the base MAC algorithm corresponding to a truncated
+ * MAC algorithm.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true). This may be a truncated or untruncated
+ *                      MAC algorithm.
+ *
+ * \return              The corresponding base MAC algorithm.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm.
+ */
+#define PSA_ALG_FULL_LENGTH_MAC(mac_alg)                        \
+    ((mac_alg) & ~(PSA_ALG_MAC_TRUNCATION_MASK |                \
+                   PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG))
+
+/** Length to which a MAC algorithm is truncated.
+ *
+ * \param mac_alg       A MAC algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                      is true).
+ *
+ * \return              Length of the truncated MAC in bytes.
+ * \return              0 if \p mac_alg is a non-truncated MAC algorithm.
+ * \return              Unspecified if \p mac_alg is not a supported
+ *                      MAC algorithm.
+ */
+#define PSA_MAC_TRUNCATED_LENGTH(mac_alg)                               \
+    (((mac_alg) & PSA_ALG_MAC_TRUNCATION_MASK) >> PSA_MAC_TRUNCATION_OFFSET)
+
+/** Macro to build a MAC minimum-MAC-length wildcard algorithm.
+ *
+ * A minimum-MAC-length MAC wildcard algorithm permits all MAC algorithms
+ * sharing the same base algorithm, and where the (potentially truncated) MAC
+ * length of the specific algorithm is equal to or larger then the wildcard
+ * algorithm's minimum MAC length.
+ *
+ * \note    When setting the minimum required MAC length to less than the
+ *          smallest MAC length allowed by the base algorithm, this effectively
+ *          becomes an 'any-MAC-length-allowed' policy for that base algorithm.
+ *
+ * \param mac_alg         A MAC algorithm identifier (value of type
+ *                        #psa_algorithm_t such that #PSA_ALG_IS_MAC(\p mac_alg)
+ *                        is true).
+ * \param min_mac_length  Desired minimum length of the message authentication
+ *                        code in bytes. This must be at most the untruncated
+ *                        length of the MAC and must be at least 1.
+ *
+ * \return                The corresponding MAC wildcard algorithm with the
+ *                        specified minimum length.
+ * \return                Unspecified if \p mac_alg is not a supported MAC
+ *                        algorithm or if \p min_mac_length is less than 1 or
+ *                        too large for the specified MAC algorithm.
+ */
+#define PSA_ALG_AT_LEAST_THIS_LENGTH_MAC(mac_alg, min_mac_length)   \
+    ( PSA_ALG_TRUNCATED_MAC(mac_alg, min_mac_length) |              \
+      PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG )
+
+#define PSA_ALG_CIPHER_MAC_BASE                 ((psa_algorithm_t)0x03c00000)
+/** The CBC-MAC construction over a block cipher
+ *
+ * \warning CBC-MAC is insecure in many cases.
+ * A more secure mode, such as #PSA_ALG_CMAC, is recommended.
+ */
+#define PSA_ALG_CBC_MAC                         ((psa_algorithm_t)0x03c00100)
+/** The CMAC construction over a block cipher */
+#define PSA_ALG_CMAC                            ((psa_algorithm_t)0x03c00200)
+
+/** Whether the specified algorithm is a MAC algorithm based on a block cipher.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a MAC algorithm based on a block cipher, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_BLOCK_CIPHER_MAC(alg)                                \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_MAC_SUBCATEGORY_MASK)) == \
+     PSA_ALG_CIPHER_MAC_BASE)
+
+#define PSA_ALG_CIPHER_STREAM_FLAG              ((psa_algorithm_t)0x00800000)
+#define PSA_ALG_CIPHER_FROM_BLOCK_FLAG          ((psa_algorithm_t)0x00400000)
+
+/** Whether the specified algorithm is a stream cipher.
+ *
+ * A stream cipher is a symmetric cipher that encrypts or decrypts messages
+ * by applying a bitwise-xor with a stream of bytes that is generated
+ * from a key.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a stream cipher algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier or if it is not a symmetric cipher algorithm.
+ */
+#define PSA_ALG_IS_STREAM_CIPHER(alg)            \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_CIPHER_STREAM_FLAG)) == \
+        (PSA_ALG_CATEGORY_CIPHER | PSA_ALG_CIPHER_STREAM_FLAG))
+
+/** The stream cipher mode of a stream cipher algorithm.
+ *
+ * The underlying stream cipher is determined by the key type.
+ * - To use ChaCha20, use a key type of #PSA_KEY_TYPE_CHACHA20.
+ * - To use ARC4, use a key type of #PSA_KEY_TYPE_ARC4.
+ */
+#define PSA_ALG_STREAM_CIPHER                   ((psa_algorithm_t)0x04800100)
+
+/** The CTR stream cipher mode.
+ *
+ * CTR is a stream cipher which is built from a block cipher.
+ * The underlying block cipher is determined by the key type.
+ * For example, to use AES-128-CTR, use this algorithm with
+ * a key of type #PSA_KEY_TYPE_AES and a length of 128 bits (16 bytes).
+ */
+#define PSA_ALG_CTR                             ((psa_algorithm_t)0x04c01000)
+
+/** The CFB stream cipher mode.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_CFB                             ((psa_algorithm_t)0x04c01100)
+
+/** The OFB stream cipher mode.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_OFB                             ((psa_algorithm_t)0x04c01200)
+
+/** The XTS cipher mode.
+ *
+ * XTS is a cipher mode which is built from a block cipher. It requires at
+ * least one full block of input, but beyond this minimum the input
+ * does not need to be a whole number of blocks.
+ */
+#define PSA_ALG_XTS                             ((psa_algorithm_t)0x0440ff00)
+
+/** The Electronic Code Book (ECB) mode of a block cipher, with no padding.
+ *
+ * \warning ECB mode does not protect the confidentiality of the encrypted data
+ * except in extremely narrow circumstances. It is recommended that applications
+ * only use ECB if they need to construct an operating mode that the
+ * implementation does not provide. Implementations are encouraged to provide
+ * the modes that applications need in preference to supporting direct access
+ * to ECB.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This symmetric cipher mode can only be used with messages whose lengths are a
+ * multiple of the block size of the chosen block cipher.
+ *
+ * ECB mode does not accept an initialization vector (IV). When using a
+ * multi-part cipher operation with this algorithm, psa_cipher_generate_iv()
+ * and psa_cipher_set_iv() must not be called.
+ */
+#define PSA_ALG_ECB_NO_PADDING                  ((psa_algorithm_t)0x04404400)
+
+/** The CBC block cipher chaining mode, with no padding.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This symmetric cipher mode can only be used with messages whose lengths
+ * are whole number of blocks for the chosen block cipher.
+ */
+#define PSA_ALG_CBC_NO_PADDING                  ((psa_algorithm_t)0x04404000)
+
+/** The CBC block cipher chaining mode with PKCS#7 padding.
+ *
+ * The underlying block cipher is determined by the key type.
+ *
+ * This is the padding method defined by PKCS#7 (RFC 2315) &sect;10.3.
+ */
+#define PSA_ALG_CBC_PKCS7                       ((psa_algorithm_t)0x04404100)
+
+#define PSA_ALG_AEAD_FROM_BLOCK_FLAG            ((psa_algorithm_t)0x00400000)
+
+/** Whether the specified algorithm is an AEAD mode on a block cipher.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is an AEAD algorithm which is an AEAD mode based on
+ *         a block cipher, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_AEAD_ON_BLOCK_CIPHER(alg)    \
+    (((alg) & (PSA_ALG_CATEGORY_MASK | PSA_ALG_AEAD_FROM_BLOCK_FLAG)) == \
+     (PSA_ALG_CATEGORY_AEAD | PSA_ALG_AEAD_FROM_BLOCK_FLAG))
+
+/** The CCM authenticated encryption algorithm.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_CCM                             ((psa_algorithm_t)0x05500100)
+
+/** The GCM authenticated encryption algorithm.
+ *
+ * The underlying block cipher is determined by the key type.
+ */
+#define PSA_ALG_GCM                             ((psa_algorithm_t)0x05500200)
+
+/** The Chacha20-Poly1305 AEAD algorithm.
+ *
+ * The ChaCha20_Poly1305 construction is defined in RFC 7539.
+ *
+ * Implementations must support 12-byte nonces, may support 8-byte nonces,
+ * and should reject other sizes.
+ *
+ * Implementations must support 16-byte tags and should reject other sizes.
+ */
+#define PSA_ALG_CHACHA20_POLY1305               ((psa_algorithm_t)0x05100500)
+
+/* In the encoding of a AEAD algorithm, the bits corresponding to
+ * PSA_ALG_AEAD_TAG_LENGTH_MASK encode the length of the AEAD tag.
+ * The constants for default lengths follow this encoding.
+ */
+#define PSA_ALG_AEAD_TAG_LENGTH_MASK            ((psa_algorithm_t)0x003f0000)
+#define PSA_AEAD_TAG_LENGTH_OFFSET 16
+
+/* In the encoding of an AEAD algorithm, the bit corresponding to
+ * #PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG encodes the fact that the algorithm
+ * is a wildcard algorithm. A key with such wildcard algorithm as permitted
+ * algorithm policy can be used with any algorithm corresponding to the
+ * same base class and having a tag length greater than or equal to the one
+ * encoded in #PSA_ALG_AEAD_TAG_LENGTH_MASK. */
+#define PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG  ((psa_algorithm_t)0x00008000)
+
+/** Macro to build a shortened AEAD algorithm.
+ *
+ * A shortened AEAD algorithm is similar to the corresponding AEAD
+ * algorithm, but has an authentication tag that consists of fewer bytes.
+ * Depending on the algorithm, the tag length may affect the calculation
+ * of the ciphertext.
+ *
+ * \param aead_alg      An AEAD algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_AEAD(\p aead_alg)
+ *                      is true).
+ * \param tag_length    Desired length of the authentication tag in bytes.
+ *
+ * \return              The corresponding AEAD algorithm with the specified
+ *                      length.
+ * \return              Unspecified if \p aead_alg is not a supported
+ *                      AEAD algorithm or if \p tag_length is not valid
+ *                      for the specified AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, tag_length)           \
+    (((aead_alg) & ~(PSA_ALG_AEAD_TAG_LENGTH_MASK |                     \
+                     PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG)) |         \
+     ((tag_length) << PSA_AEAD_TAG_LENGTH_OFFSET &                      \
+      PSA_ALG_AEAD_TAG_LENGTH_MASK))
+
+/** Retrieve the tag length of a specified AEAD algorithm
+ *
+ * \param aead_alg      An AEAD algorithm identifier (value of type
+ *                      #psa_algorithm_t such that #PSA_ALG_IS_AEAD(\p aead_alg)
+ *                      is true).
+ *
+ * \return              The tag length specified by the input algorithm.
+ * \return              Unspecified if \p aead_alg is not a supported
+ *                      AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_GET_TAG_LENGTH(aead_alg)                           \
+    (((aead_alg) & PSA_ALG_AEAD_TAG_LENGTH_MASK) >>                     \
+      PSA_AEAD_TAG_LENGTH_OFFSET )
+
+/** Calculate the corresponding AEAD algorithm with the default tag length.
+ *
+ * \param aead_alg      An AEAD algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_AEAD(\p aead_alg) is true).
+ *
+ * \return              The corresponding AEAD algorithm with the default
+ *                      tag length for that algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG(aead_alg)                   \
+    (                                                                    \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_CCM) \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_GCM) \
+        PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, PSA_ALG_CHACHA20_POLY1305) \
+        0)
+#define PSA_ALG_AEAD_WITH_DEFAULT_LENGTH_TAG_CASE(aead_alg, ref)         \
+    PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, 0) ==                      \
+    PSA_ALG_AEAD_WITH_SHORTENED_TAG(ref, 0) ?                            \
+    ref :
+
+/** Macro to build an AEAD minimum-tag-length wildcard algorithm.
+ *
+ * A minimum-tag-length AEAD wildcard algorithm permits all AEAD algorithms
+ * sharing the same base algorithm, and where the tag length of the specific
+ * algorithm is equal to or larger then the minimum tag length specified by the
+ * wildcard algorithm.
+ *
+ * \note    When setting the minimum required tag length to less than the
+ *          smallest tag length allowed by the base algorithm, this effectively
+ *          becomes an 'any-tag-length-allowed' policy for that base algorithm.
+ *
+ * \param aead_alg        An AEAD algorithm identifier (value of type
+ *                        #psa_algorithm_t such that
+ *                        #PSA_ALG_IS_AEAD(\p aead_alg) is true).
+ * \param min_tag_length  Desired minimum length of the authentication tag in
+ *                        bytes. This must be at least 1 and at most the largest
+ *                        allowed tag length of the algorithm.
+ *
+ * \return                The corresponding AEAD wildcard algorithm with the
+ *                        specified minimum length.
+ * \return                Unspecified if \p aead_alg is not a supported
+ *                        AEAD algorithm or if \p min_tag_length is less than 1
+ *                        or too large for the specified AEAD algorithm.
+ */
+#define PSA_ALG_AEAD_WITH_AT_LEAST_THIS_LENGTH_TAG(aead_alg, min_tag_length) \
+    ( PSA_ALG_AEAD_WITH_SHORTENED_TAG(aead_alg, min_tag_length) |            \
+      PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG )
+
+#define PSA_ALG_RSA_PKCS1V15_SIGN_BASE          ((psa_algorithm_t)0x06000200)
+/** RSA PKCS#1 v1.5 signature with hashing.
+ *
+ * This is the signature scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSASSA-PKCS1-v1_5.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PKCS#1 v1.5 signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PKCS1V15_SIGN(hash_alg)                             \
+    (PSA_ALG_RSA_PKCS1V15_SIGN_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** Raw PKCS#1 v1.5 signature.
+ *
+ * The input to this algorithm is the DigestInfo structure used by
+ * RFC 8017 (PKCS#1: RSA Cryptography Specifications), &sect;9.2
+ * steps 3&ndash;6.
+ */
+#define PSA_ALG_RSA_PKCS1V15_SIGN_RAW PSA_ALG_RSA_PKCS1V15_SIGN_BASE
+#define PSA_ALG_IS_RSA_PKCS1V15_SIGN(alg)                               \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PKCS1V15_SIGN_BASE)
+
+#define PSA_ALG_RSA_PSS_BASE               ((psa_algorithm_t)0x06000300)
+#define PSA_ALG_RSA_PSS_ANY_SALT_BASE      ((psa_algorithm_t)0x06001300)
+/** RSA PSS signature with hashing.
+ *
+ * This is the signature scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSASSA-PSS, with the message generation function MGF1, and with
+ * a salt length equal to the length of the hash. The specified
+ * hash algorithm is used to hash the input message, to create the
+ * salted hash, and for the mask generation.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PSS signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PSS(hash_alg)                               \
+    (PSA_ALG_RSA_PSS_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** RSA PSS signature with hashing with relaxed verification.
+ *
+ * This algorithm has the same behavior as #PSA_ALG_RSA_PSS when signing,
+ * but allows an arbitrary salt length (including \c 0) when verifying a
+ * signature.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding RSA PSS signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_PSS_ANY_SALT(hash_alg)                      \
+    (PSA_ALG_RSA_PSS_ANY_SALT_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is RSA PSS with standard salt.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS_STANDARD_SALT(alg)                   \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PSS_BASE)
+
+/** Whether the specified algorithm is RSA PSS with any salt.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS_ANY_SALT_BASE(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS_ANY_SALT(alg)                                \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_PSS_ANY_SALT_BASE)
+
+/** Whether the specified algorithm is RSA PSS.
+ *
+ * This includes any of the RSA PSS algorithm variants, regardless of the
+ * constraints on salt length.
+ *
+ * \param alg           An algorithm value or an algorithm policy wildcard.
+ *
+ * \return              1 if \p alg is of the form
+ *                      #PSA_ALG_RSA_PSS(\c hash_alg) or
+ *                      #PSA_ALG_RSA_PSS_ANY_SALT_BASE(\c hash_alg),
+ *                      where \c hash_alg is a hash algorithm or
+ *                      #PSA_ALG_ANY_HASH. 0 otherwise.
+ *                      This macro may return either 0 or 1 if \p alg is not
+ *                      a supported algorithm identifier or policy.
+ */
+#define PSA_ALG_IS_RSA_PSS(alg)                                 \
+    (PSA_ALG_IS_RSA_PSS_STANDARD_SALT(alg) ||                   \
+     PSA_ALG_IS_RSA_PSS_ANY_SALT(alg))
+
+#define PSA_ALG_ECDSA_BASE                      ((psa_algorithm_t)0x06000600)
+/** ECDSA signature with hashing.
+ *
+ * This is the ECDSA signature scheme defined by ANSI X9.62,
+ * with a random per-message secret number (*k*).
+ *
+ * The representation of the signature as a byte string consists of
+ * the concatentation of the signature values *r* and *s*. Each of
+ * *r* and *s* is encoded as an *N*-octet string, where *N* is the length
+ * of the base point of the curve in octets. Each value is represented
+ * in big-endian order (most significant octet first).
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding ECDSA signature algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_ECDSA(hash_alg)                                 \
+    (PSA_ALG_ECDSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** ECDSA signature without hashing.
+ *
+ * This is the same signature scheme as #PSA_ALG_ECDSA(), but
+ * without specifying a hash algorithm. This algorithm may only be
+ * used to sign or verify a sequence of bytes that should be an
+ * already-calculated hash. Note that the input is padded with
+ * zeros on the left or truncated on the left as required to fit
+ * the curve size.
+ */
+#define PSA_ALG_ECDSA_ANY PSA_ALG_ECDSA_BASE
+#define PSA_ALG_DETERMINISTIC_ECDSA_BASE        ((psa_algorithm_t)0x06000700)
+/** Deterministic ECDSA signature with hashing.
+ *
+ * This is the deterministic ECDSA signature scheme defined by RFC 6979.
+ *
+ * The representation of a signature is the same as with #PSA_ALG_ECDSA().
+ *
+ * Note that when this algorithm is used for verification, signatures
+ * made with randomized ECDSA (#PSA_ALG_ECDSA(\p hash_alg)) with the
+ * same private key are accepted. In other words,
+ * #PSA_ALG_DETERMINISTIC_ECDSA(\p hash_alg) differs from
+ * #PSA_ALG_ECDSA(\p hash_alg) only for signature, not for verification.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *                      This includes #PSA_ALG_ANY_HASH
+ *                      when specifying the algorithm in a usage policy.
+ *
+ * \return              The corresponding deterministic ECDSA signature
+ *                      algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_DETERMINISTIC_ECDSA(hash_alg)                           \
+    (PSA_ALG_DETERMINISTIC_ECDSA_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_ECDSA_DETERMINISTIC_FLAG        ((psa_algorithm_t)0x00000100)
+#define PSA_ALG_IS_ECDSA(alg)                                           \
+    (((alg) & ~PSA_ALG_HASH_MASK & ~PSA_ALG_ECDSA_DETERMINISTIC_FLAG) ==  \
+     PSA_ALG_ECDSA_BASE)
+#define PSA_ALG_ECDSA_IS_DETERMINISTIC(alg)             \
+    (((alg) & PSA_ALG_ECDSA_DETERMINISTIC_FLAG) != 0)
+#define PSA_ALG_IS_DETERMINISTIC_ECDSA(alg)                             \
+    (PSA_ALG_IS_ECDSA(alg) && PSA_ALG_ECDSA_IS_DETERMINISTIC(alg))
+#define PSA_ALG_IS_RANDOMIZED_ECDSA(alg)                                \
+    (PSA_ALG_IS_ECDSA(alg) && !PSA_ALG_ECDSA_IS_DETERMINISTIC(alg))
+
+/** Edwards-curve digital signature algorithm without prehashing (PureEdDSA),
+ * using standard parameters.
+ *
+ * Contexts are not supported in the current version of this specification
+ * because there is no suitable signature interface that can take the
+ * context as a parameter. A future version of this specification may add
+ * suitable functions and extend this algorithm to support contexts.
+ *
+ * PureEdDSA requires an elliptic curve key on a twisted Edwards curve.
+ * In this specification, the following curves are supported:
+ * - #PSA_ECC_FAMILY_TWISTED_EDWARDS, 255-bit: Ed25519 as specified
+ *   in RFC 8032.
+ *   The curve is Edwards25519.
+ *   The hash function used internally is SHA-512.
+ * - #PSA_ECC_FAMILY_TWISTED_EDWARDS, 448-bit: Ed448 as specified
+ *   in RFC 8032.
+ *   The curve is Edwards448.
+ *   The hash function used internally is the first 114 bytes of the
+ *   SHAKE256 output.
+ *
+ * This algorithm can be used with psa_sign_message() and
+ * psa_verify_message(). Since there is no prehashing, it cannot be used
+ * with psa_sign_hash() or psa_verify_hash().
+ *
+ * The signature format is the concatenation of R and S as defined by
+ * RFC 8032 §5.1.6 and §5.2.6 (a 64-byte string for Ed25519, a 114-byte
+ * string for Ed448).
+ */
+#define PSA_ALG_PURE_EDDSA                      ((psa_algorithm_t)0x06000800)
+
+#define PSA_ALG_HASH_EDDSA_BASE                 ((psa_algorithm_t)0x06000900)
+#define PSA_ALG_IS_HASH_EDDSA(alg)              \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_HASH_EDDSA_BASE)
+
+/** Edwards-curve digital signature algorithm with prehashing (HashEdDSA),
+ * using SHA-512 and the Edwards25519 curve.
+ *
+ * See #PSA_ALG_PURE_EDDSA regarding context support and the signature format.
+ *
+ * This algorithm is Ed25519 as specified in RFC 8032.
+ * The curve is Edwards25519.
+ * The prehash is SHA-512.
+ * The hash function used internally is SHA-512.
+ *
+ * This is a hash-and-sign algorithm: to calculate a signature,
+ * you can either:
+ * - call psa_sign_message() on the message;
+ * - or calculate the SHA-512 hash of the message
+ *   with psa_hash_compute()
+ *   or with a multi-part hash operation started with psa_hash_setup(),
+ *   using the hash algorithm #PSA_ALG_SHA_512,
+ *   then sign the calculated hash with psa_sign_hash().
+ * Verifying a signature is similar, using psa_verify_message() or
+ * psa_verify_hash() instead of the signature function.
+ */
+#define PSA_ALG_ED25519PH                               \
+    (PSA_ALG_HASH_EDDSA_BASE | (PSA_ALG_SHA_512 & PSA_ALG_HASH_MASK))
+
+/** Edwards-curve digital signature algorithm with prehashing (HashEdDSA),
+ * using SHAKE256 and the Edwards448 curve.
+ *
+ * See #PSA_ALG_PURE_EDDSA regarding context support and the signature format.
+ *
+ * This algorithm is Ed448 as specified in RFC 8032.
+ * The curve is Edwards448.
+ * The prehash is the first 64 bytes of the SHAKE256 output.
+ * The hash function used internally is the first 114 bytes of the
+ * SHAKE256 output.
+ *
+ * This is a hash-and-sign algorithm: to calculate a signature,
+ * you can either:
+ * - call psa_sign_message() on the message;
+ * - or calculate the first 64 bytes of the SHAKE256 output of the message
+ *   with psa_hash_compute()
+ *   or with a multi-part hash operation started with psa_hash_setup(),
+ *   using the hash algorithm #PSA_ALG_SHAKE256_512,
+ *   then sign the calculated hash with psa_sign_hash().
+ * Verifying a signature is similar, using psa_verify_message() or
+ * psa_verify_hash() instead of the signature function.
+ */
+#define PSA_ALG_ED448PH                                 \
+    (PSA_ALG_HASH_EDDSA_BASE | (PSA_ALG_SHAKE256_512 & PSA_ALG_HASH_MASK))
+
+/* Default definition, to be overridden if the library is extended with
+ * more hash-and-sign algorithms that we want to keep out of this header
+ * file. */
+#define PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg) 0
+
+/** Whether the specified algorithm is a signature algorithm that can be used
+ * with psa_sign_hash() and psa_verify_hash().
+ *
+ * This encompasses all strict hash-and-sign algorithms categorized by
+ * PSA_ALG_IS_HASH_AND_SIGN(), as well as algorithms that follow the
+ * paradigm more loosely:
+ * - #PSA_ALG_RSA_PKCS1V15_SIGN_RAW (expects its input to be an encoded hash)
+ * - #PSA_ALG_ECDSA_ANY (doesn't specify what kind of hash the input is)
+ *
+ * \param alg An algorithm identifier (value of type psa_algorithm_t).
+ *
+ * \return 1 if alg is a signature algorithm that can be used to sign a
+ *         hash. 0 if alg is a signature algorithm that can only be used
+ *         to sign a message. 0 if alg is not a signature algorithm.
+ *         This macro can return either 0 or 1 if alg is not a
+ *         supported algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN_HASH(alg)                                       \
+    (PSA_ALG_IS_RSA_PSS(alg) || PSA_ALG_IS_RSA_PKCS1V15_SIGN(alg) ||    \
+     PSA_ALG_IS_ECDSA(alg) || PSA_ALG_IS_HASH_EDDSA(alg) ||             \
+     PSA_ALG_IS_VENDOR_HASH_AND_SIGN(alg))
+
+/** Whether the specified algorithm is a signature algorithm that can be used
+ * with psa_sign_message() and psa_verify_message().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if alg is a signature algorithm that can be used to sign a
+ *         message. 0 if \p alg is a signature algorithm that can only be used
+ *         to sign an already-calculated hash. 0 if \p alg is not a signature
+ *         algorithm. This macro can return either 0 or 1 if \p alg is not a
+ *         supported algorithm identifier.
+ */
+#define PSA_ALG_IS_SIGN_MESSAGE(alg)                                    \
+    (PSA_ALG_IS_SIGN_HASH(alg) || (alg) == PSA_ALG_PURE_EDDSA )
+
+/** Whether the specified algorithm is a hash-and-sign algorithm.
+ *
+ * Hash-and-sign algorithms are asymmetric (public-key) signature algorithms
+ * structured in two parts: first the calculation of a hash in a way that
+ * does not depend on the key, then the calculation of a signature from the
+ * hash value and the key. Hash-and-sign algorithms encode the hash
+ * used for the hashing step, and you can call #PSA_ALG_SIGN_GET_HASH
+ * to extract this algorithm.
+ *
+ * Thus, for a hash-and-sign algorithm,
+ * `psa_sign_message(key, alg, input, ...)` is equivalent to
+ * ```
+ * psa_hash_compute(PSA_ALG_SIGN_GET_HASH(alg), input, ..., hash, ...);
+ * psa_sign_hash(key, alg, hash, ..., signature, ...);
+ * ```
+ * Most usefully, separating the hash from the signature allows the hash
+ * to be calculated in multiple steps with psa_hash_setup(), psa_hash_update()
+ * and psa_hash_finish(). Likewise psa_verify_message() is equivalent to
+ * calculating the hash and then calling psa_verify_hash().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a hash-and-sign algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_HASH_AND_SIGN(alg)                                   \
+    (PSA_ALG_IS_SIGN_HASH(alg) &&                                       \
+     ((alg) & PSA_ALG_HASH_MASK) != 0)
+
+/** Get the hash used by a hash-and-sign signature algorithm.
+ *
+ * A hash-and-sign algorithm is a signature algorithm which is
+ * composed of two phases: first a hashing phase which does not use
+ * the key and produces a hash of the input message, then a signing
+ * phase which only uses the hash and the key and not the message
+ * itself.
+ *
+ * \param alg   A signature algorithm (\c PSA_ALG_XXX value such that
+ *              #PSA_ALG_IS_SIGN(\p alg) is true).
+ *
+ * \return      The underlying hash algorithm if \p alg is a hash-and-sign
+ *              algorithm.
+ * \return      0 if \p alg is a signature algorithm that does not
+ *              follow the hash-and-sign structure.
+ * \return      Unspecified if \p alg is not a signature algorithm or
+ *              if it is not supported by the implementation.
+ */
+#define PSA_ALG_SIGN_GET_HASH(alg)                                     \
+    (PSA_ALG_IS_HASH_AND_SIGN(alg) ?                                   \
+     ((alg) & PSA_ALG_HASH_MASK) | PSA_ALG_CATEGORY_HASH :             \
+     0)
+
+/** RSA PKCS#1 v1.5 encryption.
+ */
+#define PSA_ALG_RSA_PKCS1V15_CRYPT              ((psa_algorithm_t)0x07000200)
+
+#define PSA_ALG_RSA_OAEP_BASE                   ((psa_algorithm_t)0x07000300)
+/** RSA OAEP encryption.
+ *
+ * This is the encryption scheme defined by RFC 8017
+ * (PKCS#1: RSA Cryptography Specifications) under the name
+ * RSAES-OAEP, with the message generation function MGF1.
+ *
+ * \param hash_alg      The hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true) to use
+ *                      for MGF1.
+ *
+ * \return              The corresponding RSA OAEP encryption algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_RSA_OAEP(hash_alg)                              \
+    (PSA_ALG_RSA_OAEP_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+#define PSA_ALG_IS_RSA_OAEP(alg)                                \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_RSA_OAEP_BASE)
+#define PSA_ALG_RSA_OAEP_GET_HASH(alg)                          \
+    (PSA_ALG_IS_RSA_OAEP(alg) ?                                 \
+     ((alg) & PSA_ALG_HASH_MASK) | PSA_ALG_CATEGORY_HASH :      \
+     0)
+
+#define PSA_ALG_HKDF_BASE                       ((psa_algorithm_t)0x08000100)
+/** Macro to build an HKDF algorithm.
+ *
+ * For example, `PSA_ALG_HKDF(PSA_ALG_SHA256)` is HKDF using HMAC-SHA-256.
+ *
+ * This key derivation algorithm uses the following inputs:
+ * - #PSA_KEY_DERIVATION_INPUT_SALT is the salt used in the "extract" step.
+ *   It is optional; if omitted, the derivation uses an empty salt.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key used in the "extract" step.
+ * - #PSA_KEY_DERIVATION_INPUT_INFO is the info string used in the "expand" step.
+ * You must pass #PSA_KEY_DERIVATION_INPUT_SALT before #PSA_KEY_DERIVATION_INPUT_SECRET.
+ * You may pass #PSA_KEY_DERIVATION_INPUT_INFO at any time after steup and before
+ * starting to generate output.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding HKDF algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_HKDF(hash_alg)                                  \
+    (PSA_ALG_HKDF_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+/** Whether the specified algorithm is an HKDF algorithm.
+ *
+ * HKDF is a family of key derivation algorithms that are based on a hash
+ * function and the HMAC construction.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is an HKDF algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_HKDF(alg)                            \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_HKDF_BASE)
+#define PSA_ALG_HKDF_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_TLS12_PRF_BASE                  ((psa_algorithm_t)0x08000200)
+/** Macro to build a TLS-1.2 PRF algorithm.
+ *
+ * TLS 1.2 uses a custom pseudorandom function (PRF) for key schedule,
+ * specified in Section 5 of RFC 5246. It is based on HMAC and can be
+ * used with either SHA-256 or SHA-384.
+ *
+ * This key derivation algorithm uses the following inputs, which must be
+ * passed in the order given here:
+ * - #PSA_KEY_DERIVATION_INPUT_SEED is the seed.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key.
+ * - #PSA_KEY_DERIVATION_INPUT_LABEL is the label.
+ *
+ * For the application to TLS-1.2 key expansion, the seed is the
+ * concatenation of ServerHello.Random + ClientHello.Random,
+ * and the label is "key expansion".
+ *
+ * For example, `PSA_ALG_TLS12_PRF(PSA_ALG_SHA256)` represents the
+ * TLS 1.2 PRF using HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding TLS-1.2 PRF algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_TLS12_PRF(hash_alg)                                  \
+    (PSA_ALG_TLS12_PRF_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is a TLS-1.2 PRF algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a TLS-1.2 PRF algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_TLS12_PRF(alg)                                    \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_TLS12_PRF_BASE)
+#define PSA_ALG_TLS12_PRF_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_TLS12_PSK_TO_MS_BASE            ((psa_algorithm_t)0x08000300)
+/** Macro to build a TLS-1.2 PSK-to-MasterSecret algorithm.
+ *
+ * In a pure-PSK handshake in TLS 1.2, the master secret is derived
+ * from the PreSharedKey (PSK) through the application of padding
+ * (RFC 4279, Section 2) and the TLS-1.2 PRF (RFC 5246, Section 5).
+ * The latter is based on HMAC and can be used with either SHA-256
+ * or SHA-384.
+ *
+ * This key derivation algorithm uses the following inputs, which must be
+ * passed in the order given here:
+ * - #PSA_KEY_DERIVATION_INPUT_SEED is the seed.
+ * - #PSA_KEY_DERIVATION_INPUT_SECRET is the secret key.
+ * - #PSA_KEY_DERIVATION_INPUT_LABEL is the label.
+ *
+ * For the application to TLS-1.2, the seed (which is
+ * forwarded to the TLS-1.2 PRF) is the concatenation of the
+ * ClientHello.Random + ServerHello.Random,
+ * and the label is "master secret" or "extended master secret".
+ *
+ * For example, `PSA_ALG_TLS12_PSK_TO_MS(PSA_ALG_SHA256)` represents the
+ * TLS-1.2 PSK to MasterSecret derivation PRF using HMAC-SHA-256.
+ *
+ * \param hash_alg      A hash algorithm (\c PSA_ALG_XXX value such that
+ *                      #PSA_ALG_IS_HASH(\p hash_alg) is true).
+ *
+ * \return              The corresponding TLS-1.2 PSK to MS algorithm.
+ * \return              Unspecified if \p hash_alg is not a supported
+ *                      hash algorithm.
+ */
+#define PSA_ALG_TLS12_PSK_TO_MS(hash_alg)                                  \
+    (PSA_ALG_TLS12_PSK_TO_MS_BASE | ((hash_alg) & PSA_ALG_HASH_MASK))
+
+/** Whether the specified algorithm is a TLS-1.2 PSK to MS algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a TLS-1.2 PSK to MS algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key derivation algorithm identifier.
+ */
+#define PSA_ALG_IS_TLS12_PSK_TO_MS(alg)                                    \
+    (((alg) & ~PSA_ALG_HASH_MASK) == PSA_ALG_TLS12_PSK_TO_MS_BASE)
+#define PSA_ALG_TLS12_PSK_TO_MS_GET_HASH(hkdf_alg)                         \
+    (PSA_ALG_CATEGORY_HASH | ((hkdf_alg) & PSA_ALG_HASH_MASK))
+
+#define PSA_ALG_KEY_DERIVATION_MASK             ((psa_algorithm_t)0xfe00ffff)
+#define PSA_ALG_KEY_AGREEMENT_MASK              ((psa_algorithm_t)0xffff0000)
+
+/** Macro to build a combined algorithm that chains a key agreement with
+ * a key derivation.
+ *
+ * \param ka_alg        A key agreement algorithm (\c PSA_ALG_XXX value such
+ *                      that #PSA_ALG_IS_KEY_AGREEMENT(\p ka_alg) is true).
+ * \param kdf_alg       A key derivation algorithm (\c PSA_ALG_XXX value such
+ *                      that #PSA_ALG_IS_KEY_DERIVATION(\p kdf_alg) is true).
+ *
+ * \return              The corresponding key agreement and derivation
+ *                      algorithm.
+ * \return              Unspecified if \p ka_alg is not a supported
+ *                      key agreement algorithm or \p kdf_alg is not a
+ *                      supported key derivation algorithm.
+ */
+#define PSA_ALG_KEY_AGREEMENT(ka_alg, kdf_alg)  \
+    ((ka_alg) | (kdf_alg))
+
+#define PSA_ALG_KEY_AGREEMENT_GET_KDF(alg)                              \
+    (((alg) & PSA_ALG_KEY_DERIVATION_MASK) | PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+#define PSA_ALG_KEY_AGREEMENT_GET_BASE(alg)                             \
+    (((alg) & PSA_ALG_KEY_AGREEMENT_MASK) | PSA_ALG_CATEGORY_KEY_AGREEMENT)
+
+/** Whether the specified algorithm is a raw key agreement algorithm.
+ *
+ * A raw key agreement algorithm is one that does not specify
+ * a key derivation function.
+ * Usually, raw key agreement algorithms are constructed directly with
+ * a \c PSA_ALG_xxx macro while non-raw key agreement algorithms are
+ * constructed with #PSA_ALG_KEY_AGREEMENT().
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \p alg is a raw key agreement algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \p alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_RAW_KEY_AGREEMENT(alg)                               \
+    (PSA_ALG_IS_KEY_AGREEMENT(alg) &&                                   \
+     PSA_ALG_KEY_AGREEMENT_GET_KDF(alg) == PSA_ALG_CATEGORY_KEY_DERIVATION)
+
+#define PSA_ALG_IS_KEY_DERIVATION_OR_AGREEMENT(alg)     \
+    ((PSA_ALG_IS_KEY_DERIVATION(alg) || PSA_ALG_IS_KEY_AGREEMENT(alg)))
+
+/** The finite-field Diffie-Hellman (DH) key agreement algorithm.
+ *
+ * The shared secret produced by key agreement is
+ * `g^{ab}` in big-endian format.
+ * It is `ceiling(m / 8)` bytes long where `m` is the size of the prime `p`
+ * in bits.
+ */
+#define PSA_ALG_FFDH                            ((psa_algorithm_t)0x09010000)
+
+/** Whether the specified algorithm is a finite field Diffie-Hellman algorithm.
+ *
+ * This includes the raw finite field Diffie-Hellman algorithm as well as
+ * finite-field Diffie-Hellman followed by any supporter key derivation
+ * algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a finite field Diffie-Hellman algorithm, 0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key agreement algorithm identifier.
+ */
+#define PSA_ALG_IS_FFDH(alg) \
+    (PSA_ALG_KEY_AGREEMENT_GET_BASE(alg) == PSA_ALG_FFDH)
+
+/** The elliptic curve Diffie-Hellman (ECDH) key agreement algorithm.
+ *
+ * The shared secret produced by key agreement is the x-coordinate of
+ * the shared secret point. It is always `ceiling(m / 8)` bytes long where
+ * `m` is the bit size associated with the curve, i.e. the bit size of the
+ * order of the curve's coordinate field. When `m` is not a multiple of 8,
+ * the byte containing the most significant bit of the shared secret
+ * is padded with zero bits. The byte order is either little-endian
+ * or big-endian depending on the curve type.
+ *
+ * - For Montgomery curves (curve types `PSA_ECC_FAMILY_CURVEXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in little-endian byte order.
+ *   The bit size is 448 for Curve448 and 255 for Curve25519.
+ * - For Weierstrass curves over prime fields (curve types
+ *   `PSA_ECC_FAMILY_SECPXXX` and `PSA_ECC_FAMILY_BRAINPOOL_PXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in big-endian byte order.
+ *   The bit size is `m = ceiling(log_2(p))` for the field `F_p`.
+ * - For Weierstrass curves over binary fields (curve types
+ *   `PSA_ECC_FAMILY_SECTXXX`),
+ *   the shared secret is the x-coordinate of `d_A Q_B = d_B Q_A`
+ *   in big-endian byte order.
+ *   The bit size is `m` for the field `F_{2^m}`.
+ */
+#define PSA_ALG_ECDH                            ((psa_algorithm_t)0x09020000)
+
+/** Whether the specified algorithm is an elliptic curve Diffie-Hellman
+ * algorithm.
+ *
+ * This includes the raw elliptic curve Diffie-Hellman algorithm as well as
+ * elliptic curve Diffie-Hellman followed by any supporter key derivation
+ * algorithm.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is an elliptic curve Diffie-Hellman algorithm,
+ *         0 otherwise.
+ *         This macro may return either 0 or 1 if \c alg is not a supported
+ *         key agreement algorithm identifier.
+ */
+#define PSA_ALG_IS_ECDH(alg) \
+    (PSA_ALG_KEY_AGREEMENT_GET_BASE(alg) == PSA_ALG_ECDH)
+
+/** Whether the specified algorithm encoding is a wildcard.
+ *
+ * Wildcard values may only be used to set the usage algorithm field in
+ * a policy, not to perform an operation.
+ *
+ * \param alg An algorithm identifier (value of type #psa_algorithm_t).
+ *
+ * \return 1 if \c alg is a wildcard algorithm encoding.
+ * \return 0 if \c alg is a non-wildcard algorithm encoding (suitable for
+ *         an operation).
+ * \return This macro may return either 0 or 1 if \c alg is not a supported
+ *         algorithm identifier.
+ */
+#define PSA_ALG_IS_WILDCARD(alg)                            \
+    (PSA_ALG_IS_HASH_AND_SIGN(alg) ?                        \
+     PSA_ALG_SIGN_GET_HASH(alg) == PSA_ALG_ANY_HASH :       \
+     PSA_ALG_IS_MAC(alg) ?                                  \
+     (alg & PSA_ALG_MAC_AT_LEAST_THIS_LENGTH_FLAG) != 0 :   \
+     PSA_ALG_IS_AEAD(alg) ?                                 \
+     (alg & PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG) != 0 :  \
+     (alg) == PSA_ALG_ANY_HASH)
+
+/**@}*/
+
+/** \defgroup key_lifetimes Key lifetimes
+ * @{
+ */
+
+/** The default lifetime for volatile keys.
+ *
+ * A volatile key only exists as long as the identifier to it is not destroyed.
+ * The key material is guaranteed to be erased on a power reset.
+ *
+ * A key with this lifetime is typically stored in the RAM area of the
+ * PSA Crypto subsystem. However this is an implementation choice.
+ * If an implementation stores data about the key in a non-volatile memory,
+ * it must release all the resources associated with the key and erase the
+ * key material if the calling application terminates.
+ */
+#define PSA_KEY_LIFETIME_VOLATILE               ((psa_key_lifetime_t)0x00000000)
+
+/** The default lifetime for persistent keys.
+ *
+ * A persistent key remains in storage until it is explicitly destroyed or
+ * until the corresponding storage area is wiped. This specification does
+ * not define any mechanism to wipe a storage area, but integrations may
+ * provide their own mechanism (for example to perform a factory reset,
+ * to prepare for device refurbishment, or to uninstall an application).
+ *
+ * This lifetime value is the default storage area for the calling
+ * application. Integrations of Mbed TLS may support other persistent lifetimes.
+ * See ::psa_key_lifetime_t for more information.
+ */
+#define PSA_KEY_LIFETIME_PERSISTENT             ((psa_key_lifetime_t)0x00000001)
+
+/** The persistence level of volatile keys.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_VOLATILE            ((psa_key_persistence_t)0x00)
+
+/** The default persistence level for persistent keys.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_DEFAULT             ((psa_key_persistence_t)0x01)
+
+/** A persistence level indicating that a key is never destroyed.
+ *
+ * See ::psa_key_persistence_t for more information.
+ */
+#define PSA_KEY_PERSISTENCE_READ_ONLY           ((psa_key_persistence_t)0xff)
+
+#define PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime)      \
+    ((psa_key_persistence_t)((lifetime) & 0x000000ff))
+
+#define PSA_KEY_LIFETIME_GET_LOCATION(lifetime)      \
+    ((psa_key_location_t)((lifetime) >> 8))
+
+/** Whether a key lifetime indicates that the key is volatile.
+ *
+ * A volatile key is automatically destroyed by the implementation when
+ * the application instance terminates. In particular, a volatile key
+ * is automatically destroyed on a power reset of the device.
+ *
+ * A key that is not volatile is persistent. Persistent keys are
+ * preserved until the application explicitly destroys them or until an
+ * implementation-specific device management event occurs (for example,
+ * a factory reset).
+ *
+ * \param lifetime      The lifetime value to query (value of type
+ *                      ::psa_key_lifetime_t).
+ *
+ * \return \c 1 if the key is volatile, otherwise \c 0.
+ */
+#define PSA_KEY_LIFETIME_IS_VOLATILE(lifetime)  \
+    (PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime) == \
+     PSA_KEY_PERSISTENCE_VOLATILE)
+
+/** Whether a key lifetime indicates that the key is read-only.
+ *
+ * Read-only keys cannot be created or destroyed through the PSA Crypto API.
+ * They must be created through platform-specific means that bypass the API.
+ *
+ * Some platforms may offer ways to destroy read-only keys. For example,
+ * consider a platform with multiple levels of privilege, where a
+ * low-privilege application can use a key but is not allowed to destroy
+ * it, and the platform exposes the key to the application with a read-only
+ * lifetime. High-privilege code can destroy the key even though the
+ * application sees the key as read-only.
+ *
+ * \param lifetime      The lifetime value to query (value of type
+ *                      ::psa_key_lifetime_t).
+ *
+ * \return \c 1 if the key is read-only, otherwise \c 0.
+ */
+#define PSA_KEY_LIFETIME_IS_READ_ONLY(lifetime)  \
+    (PSA_KEY_LIFETIME_GET_PERSISTENCE(lifetime) == \
+     PSA_KEY_PERSISTENCE_READ_ONLY)
+
+/** Construct a lifetime from a persistence level and a location.
+ *
+ * \param persistence   The persistence level
+ *                      (value of type ::psa_key_persistence_t).
+ * \param location      The location indicator
+ *                      (value of type ::psa_key_location_t).
+ *
+ * \return The constructed lifetime value.
+ */
+#define PSA_KEY_LIFETIME_FROM_PERSISTENCE_AND_LOCATION(persistence, location) \
+    ((location) << 8 | (persistence))
+
+/** The local storage area for persistent keys.
+ *
+ * This storage area is available on all systems that can store persistent
+ * keys without delegating the storage to a third-party cryptoprocessor.
+ *
+ * See ::psa_key_location_t for more information.
+ */
+#define PSA_KEY_LOCATION_LOCAL_STORAGE          ((psa_key_location_t)0x000000)
+
+#define PSA_KEY_LOCATION_VENDOR_FLAG            ((psa_key_location_t)0x800000)
+
+/** The null key identifier.
+ */
+#define PSA_KEY_ID_NULL                         ((psa_key_id_t)0)
+/** The minimum value for a key identifier chosen by the application.
+ */
+#define PSA_KEY_ID_USER_MIN                     ((psa_key_id_t)0x00000001)
+/** The maximum value for a key identifier chosen by the application.
+ */
+#define PSA_KEY_ID_USER_MAX                     ((psa_key_id_t)0x3fffffff)
+/** The minimum value for a key identifier chosen by the implementation.
+ */
+#define PSA_KEY_ID_VENDOR_MIN                   ((psa_key_id_t)0x40000000)
+/** The maximum value for a key identifier chosen by the implementation.
+ */
+#define PSA_KEY_ID_VENDOR_MAX                   ((psa_key_id_t)0x7fffffff)
+
+
+#if !defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER)
+
+#define MBEDTLS_SVC_KEY_ID_INIT ( (psa_key_id_t)0 )
+#define MBEDTLS_SVC_KEY_ID_GET_KEY_ID( id ) ( id )
+#define MBEDTLS_SVC_KEY_ID_GET_OWNER_ID( id ) ( 0 )
+
+/** Utility to initialize a key identifier at runtime.
+ *
+ * \param unused  Unused parameter.
+ * \param key_id  Identifier of the key.
+ */
+static inline mbedtls_svc_key_id_t mbedtls_svc_key_id_make(
+    unsigned int unused, psa_key_id_t key_id )
+{
+    (void)unused;
+
+    return( key_id );
+}
+
+/** Compare two key identifiers.
+ *
+ * \param id1 First key identifier.
+ * \param id2 Second key identifier.
+ *
+ * \return Non-zero if the two key identifier are equal, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_equal( mbedtls_svc_key_id_t id1,
+                                            mbedtls_svc_key_id_t id2 )
+{
+    return( id1 == id2 );
+}
+
+/** Check whether a key identifier is null.
+ *
+ * \param key Key identifier.
+ *
+ * \return Non-zero if the key identifier is null, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_is_null( mbedtls_svc_key_id_t key )
+{
+    return( key == 0 );
+}
+
+#else /* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+#define MBEDTLS_SVC_KEY_ID_INIT ( (mbedtls_svc_key_id_t){ 0, 0 } )
+#define MBEDTLS_SVC_KEY_ID_GET_KEY_ID( id ) ( ( id ).key_id )
+#define MBEDTLS_SVC_KEY_ID_GET_OWNER_ID( id ) ( ( id ).owner )
+
+/** Utility to initialize a key identifier at runtime.
+ *
+ * \param owner_id Identifier of the key owner.
+ * \param key_id   Identifier of the key.
+ */
+static inline mbedtls_svc_key_id_t mbedtls_svc_key_id_make(
+    mbedtls_key_owner_id_t owner_id, psa_key_id_t key_id )
+{
+    return( (mbedtls_svc_key_id_t){ .key_id = key_id,
+                                    .owner = owner_id } );
+}
+
+/** Compare two key identifiers.
+ *
+ * \param id1 First key identifier.
+ * \param id2 Second key identifier.
+ *
+ * \return Non-zero if the two key identifier are equal, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_equal( mbedtls_svc_key_id_t id1,
+                                            mbedtls_svc_key_id_t id2 )
+{
+    return( ( id1.key_id == id2.key_id ) &&
+            mbedtls_key_owner_id_equal( id1.owner, id2.owner ) );
+}
+
+/** Check whether a key identifier is null.
+ *
+ * \param key Key identifier.
+ *
+ * \return Non-zero if the key identifier is null, zero otherwise.
+ */
+static inline int mbedtls_svc_key_id_is_null( mbedtls_svc_key_id_t key )
+{
+    return( key.key_id == 0 );
+}
+
+#endif /* !MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER */
+
+/**@}*/
+
+/** \defgroup policy Key policies
+ * @{
+ */
+
+/** Whether the key may be exported.
+ *
+ * A public key or the public part of a key pair may always be exported
+ * regardless of the value of this permission flag.
+ *
+ * If a key does not have export permission, implementations shall not
+ * allow the key to be exported in plain form from the cryptoprocessor,
+ * whether through psa_export_key() or through a proprietary interface.
+ * The key may however be exportable in a wrapped form, i.e. in a form
+ * where it is encrypted by another key.
+ */
+#define PSA_KEY_USAGE_EXPORT                    ((psa_key_usage_t)0x00000001)
+
+/** Whether the key may be copied.
+ *
+ * This flag allows the use of psa_copy_key() to make a copy of the key
+ * with the same policy or a more restrictive policy.
+ *
+ * For lifetimes for which the key is located in a secure element which
+ * enforce the non-exportability of keys, copying a key outside the secure
+ * element also requires the usage flag #PSA_KEY_USAGE_EXPORT.
+ * Copying the key inside the secure element is permitted with just
+ * #PSA_KEY_USAGE_COPY if the secure element supports it.
+ * For keys with the lifetime #PSA_KEY_LIFETIME_VOLATILE or
+ * #PSA_KEY_LIFETIME_PERSISTENT, the usage flag #PSA_KEY_USAGE_COPY
+ * is sufficient to permit the copy.
+ */
+#define PSA_KEY_USAGE_COPY                      ((psa_key_usage_t)0x00000002)
+
+/** Whether the key may be used to encrypt a message.
+ *
+ * This flag allows the key to be used for a symmetric encryption operation,
+ * for an AEAD encryption-and-authentication operation,
+ * or for an asymmetric encryption operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_ENCRYPT                   ((psa_key_usage_t)0x00000100)
+
+/** Whether the key may be used to decrypt a message.
+ *
+ * This flag allows the key to be used for a symmetric decryption operation,
+ * for an AEAD decryption-and-verification operation,
+ * or for an asymmetric decryption operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_DECRYPT                   ((psa_key_usage_t)0x00000200)
+
+/** Whether the key may be used to sign a message.
+ *
+ * This flag allows the key to be used for a MAC calculation operation or for
+ * an asymmetric message signature operation, if otherwise permitted by the
+ * key’s type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_SIGN_MESSAGE              ((psa_key_usage_t)0x00000400)
+
+/** Whether the key may be used to verify a message.
+ *
+ * This flag allows the key to be used for a MAC verification operation or for
+ * an asymmetric message signature verification operation, if otherwise
+ * permitted by the key’s type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_VERIFY_MESSAGE            ((psa_key_usage_t)0x00000800)
+
+/** Whether the key may be used to sign a message.
+ *
+ * This flag allows the key to be used for a MAC calculation operation
+ * or for an asymmetric signature operation,
+ * if otherwise permitted by the key's type and policy.
+ *
+ * For a key pair, this concerns the private key.
+ */
+#define PSA_KEY_USAGE_SIGN_HASH                 ((psa_key_usage_t)0x00001000)
+
+/** Whether the key may be used to verify a message signature.
+ *
+ * This flag allows the key to be used for a MAC verification operation
+ * or for an asymmetric signature verification operation,
+ * if otherwise permitted by by the key's type and policy.
+ *
+ * For a key pair, this concerns the public key.
+ */
+#define PSA_KEY_USAGE_VERIFY_HASH               ((psa_key_usage_t)0x00002000)
+
+/** Whether the key may be used to derive other keys.
+ */
+#define PSA_KEY_USAGE_DERIVE                    ((psa_key_usage_t)0x00004000)
+
+/**@}*/
+
+/** \defgroup derivation Key derivation
+ * @{
+ */
+
+/** A secret input for key derivation.
+ *
+ * This should be a key of type #PSA_KEY_TYPE_DERIVE
+ * (passed to psa_key_derivation_input_key())
+ * or the shared secret resulting from a key agreement
+ * (obtained via psa_key_derivation_key_agreement()).
+ *
+ * The secret can also be a direct input (passed to
+ * key_derivation_input_bytes()). In this case, the derivation operation
+ * may not be used to derive keys: the operation will only allow
+ * psa_key_derivation_output_bytes(), not psa_key_derivation_output_key().
+ */
+#define PSA_KEY_DERIVATION_INPUT_SECRET     ((psa_key_derivation_step_t)0x0101)
+
+/** A label for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_LABEL      ((psa_key_derivation_step_t)0x0201)
+
+/** A salt for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_SALT       ((psa_key_derivation_step_t)0x0202)
+
+/** An information string for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_INFO       ((psa_key_derivation_step_t)0x0203)
+
+/** A seed for key derivation.
+ *
+ * This should be a direct input.
+ * It can also be a key of type #PSA_KEY_TYPE_RAW_DATA.
+ */
+#define PSA_KEY_DERIVATION_INPUT_SEED       ((psa_key_derivation_step_t)0x0204)
+
+/**@}*/
+
+/** \defgroup helper_macros Helper macros
+ * @{
+ */
+
+/* Helper macros */
+
+/** Check if two AEAD algorithm identifiers refer to the same AEAD algorithm
+ *  regardless of the tag length they encode.
+ *
+ * \param aead_alg_1 An AEAD algorithm identifier.
+ * \param aead_alg_2 An AEAD algorithm identifier.
+ *
+ * \return           1 if both identifiers refer to the same AEAD algorithm,
+ *                   0 otherwise.
+ *                   Unspecified if neither \p aead_alg_1 nor \p aead_alg_2 are
+ *                   a supported AEAD algorithm.
+ */
+#define MBEDTLS_PSA_ALG_AEAD_EQUAL(aead_alg_1, aead_alg_2) \
+    (!(((aead_alg_1) ^ (aead_alg_2)) & \
+       ~(PSA_ALG_AEAD_TAG_LENGTH_MASK | PSA_ALG_AEAD_AT_LEAST_THIS_LENGTH_FLAG)))
+
+/**@}*/
+
+#endif /* PSA_CRYPTO_VALUES_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/aes/esp_aes.h b/tools/sdk/esp32s3/include/mbedtls/port/include/aes/esp_aes.h
new file mode 100644
index 00000000000..c9c43169602
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/aes/esp_aes.h
@@ -0,0 +1,356 @@
+/**
+ * \brief AES block cipher, ESP hardware accelerated version
+ * Based on mbedTLS FIPS-197 compliant version.
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  Additions Copyright (C) 2016, Espressif Systems (Shanghai) PTE Ltd
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *
+ */
+
+#pragma once
+
+#include "esp_types.h"
+#include "hal/aes_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+#define ERR_ESP_AES_INVALID_KEY_LENGTH                -0x0020  /**< Invalid key length. */
+#define ERR_ESP_AES_INVALID_INPUT_LENGTH              -0x0022  /**< Invalid data input length. */
+
+/**
+ * \brief          AES context structure
+ *
+ */
+typedef struct {
+    uint8_t key_bytes;
+    volatile uint8_t key_in_hardware; /* This variable is used for fault injection checks, so marked volatile to avoid optimisation */
+    uint8_t key[32];
+} esp_aes_context;
+
+/**
+ * \brief The AES XTS context-type definition.
+ */
+typedef struct
+{
+    esp_aes_context crypt; /*!< The AES context to use for AES block
+                                        encryption or decryption. */
+    esp_aes_context tweak; /*!< The AES context used for tweak
+                                        computation. */
+} esp_aes_xts_context;
+
+
+
+
+/**
+ * \brief Lock access to AES hardware unit
+ *
+ * AES hardware unit can only be used by one
+ * consumer at a time.
+ *
+ * esp_aes_xxx API calls automatically manage locking & unlocking of
+ * hardware, this function is only needed if you want to call
+ * ets_aes_xxx functions directly.
+ */
+void esp_aes_acquire_hardware( void );
+
+/**
+ * \brief Unlock access to AES hardware unit
+ *
+ * esp_aes_xxx API calls automatically manage locking & unlocking of
+ * hardware, this function is only needed if you want to call
+ * ets_aes_xxx functions directly.
+ */
+void esp_aes_release_hardware( void );
+
+/**
+ * \brief          Initialize AES context
+ *
+ * \param ctx      AES context to be initialized
+ */
+void esp_aes_init( esp_aes_context *ctx );
+
+/**
+ * \brief          Clear AES context
+ *
+ * \param ctx      AES context to be cleared
+ */
+void esp_aes_free( esp_aes_context *ctx );
+
+/**
+ * \brief          This function initializes the specified AES XTS context.
+ *
+ *                 It must be the first API called before using
+ *                 the context.
+ *
+ * \param ctx      The AES XTS context to initialize.
+ */
+void esp_aes_xts_init( esp_aes_xts_context *ctx );
+
+/**
+ * \brief          This function releases and clears the specified AES XTS context.
+ *
+ * \param ctx      The AES XTS context to clear.
+ */
+void esp_aes_xts_free( esp_aes_xts_context *ctx );
+
+/**
+ * \brief          AES set key schedule (encryption or decryption)
+ *
+ * \param ctx      AES context to be initialized
+ * \param key      encryption key
+ * \param keybits  must be 128, 192 or 256
+ *
+ * \return         0 if successful, or ERR_AES_INVALID_KEY_LENGTH
+ */
+int esp_aes_setkey( esp_aes_context *ctx, const unsigned char *key, unsigned int keybits );
+
+/**
+ * \brief          AES-ECB block encryption/decryption
+ *
+ * \param ctx      AES context
+ * \param mode     AES_ENCRYPT or AES_DECRYPT
+ * \param input    16-byte input block
+ * \param output   16-byte output block
+ *
+ * \return         0 if successful
+ */
+int esp_aes_crypt_ecb( esp_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16] );
+
+/**
+ * \brief          AES-CBC buffer encryption/decryption
+ *                 Length should be a multiple of the block
+ *                 size (16 bytes)
+ *
+ * \note           Upon exit, the content of the IV is updated so that you can
+ *                 call the function same function again on the following
+ *                 block(s) of data and get the same result as if it was
+ *                 encrypted in one call. This allows a "streaming" usage.
+ *                 If on the other hand you need to retain the contents of the
+ *                 IV, you should either save it manually or use the cipher
+ *                 module instead.
+ *
+ * \param ctx      AES context
+ * \param mode     AES_ENCRYPT or AES_DECRYPT
+ * \param length   length of the input data
+ * \param iv       initialization vector (updated after use)
+ * \param input    buffer holding the input data
+ * \param output   buffer holding the output data
+ *
+ * \return         0 if successful, or ERR_AES_INVALID_INPUT_LENGTH
+ */
+int esp_aes_crypt_cbc( esp_aes_context *ctx,
+                       int mode,
+                       size_t length,
+                       unsigned char iv[16],
+                       const unsigned char *input,
+                       unsigned char *output );
+
+
+/**
+ * \brief          AES-CFB128 buffer encryption/decryption.
+ *
+ * Note: Due to the nature of CFB you should use the same key schedule for
+ * both encryption and decryption. So a context initialized with
+ * esp_aes_setkey_enc() for both AES_ENCRYPT and AES_DECRYPT.
+ *
+ * \note           Upon exit, the content of the IV is updated so that you can
+ *                 call the function same function again on the following
+ *                 block(s) of data and get the same result as if it was
+ *                 encrypted in one call. This allows a "streaming" usage.
+ *                 If on the other hand you need to retain the contents of the
+ *                 IV, you should either save it manually or use the cipher
+ *                 module instead.
+ *
+ * \param ctx      AES context
+ * \param mode     AES_ENCRYPT or AES_DECRYPT
+ * \param length   length of the input data
+ * \param iv_off   offset in IV (updated after use)
+ * \param iv       initialization vector (updated after use)
+ * \param input    buffer holding the input data
+ * \param output   buffer holding the output data
+ *
+ * \return         0 if successful
+ */
+int esp_aes_crypt_cfb128( esp_aes_context *ctx,
+                          int mode,
+                          size_t length,
+                          size_t *iv_off,
+                          unsigned char iv[16],
+                          const unsigned char *input,
+                          unsigned char *output );
+
+/**
+ * \brief          AES-CFB8 buffer encryption/decryption.
+ *
+ * Note: Due to the nature of CFB you should use the same key schedule for
+ * both encryption and decryption. So a context initialized with
+ * esp_aes_setkey_enc() for both AES_ENCRYPT and AES_DECRYPT.
+ *
+ * \note           Upon exit, the content of the IV is updated so that you can
+ *                 call the function same function again on the following
+ *                 block(s) of data and get the same result as if it was
+ *                 encrypted in one call. This allows a "streaming" usage.
+ *                 If on the other hand you need to retain the contents of the
+ *                 IV, you should either save it manually or use the cipher
+ *                 module instead.
+ *
+ * \param ctx      AES context
+ * \param mode     AES_ENCRYPT or AES_DECRYPT
+ * \param length   length of the input data
+ * \param iv       initialization vector (updated after use)
+ * \param input    buffer holding the input data
+ * \param output   buffer holding the output data
+ *
+ * \return         0 if successful
+ */
+int esp_aes_crypt_cfb8( esp_aes_context *ctx,
+                        int mode,
+                        size_t length,
+                        unsigned char iv[16],
+                        const unsigned char *input,
+                        unsigned char *output );
+
+/**
+ * \brief               AES-CTR buffer encryption/decryption
+ *
+ * Warning: You have to keep the maximum use of your counter in mind!
+ *
+ * Note: Due to the nature of CTR you should use the same key schedule for
+ * both encryption and decryption. So a context initialized with
+ * esp_aes_setkey_enc() for both AES_ENCRYPT and AES_DECRYPT.
+ *
+ * \param ctx           AES context
+ * \param length        The length of the data
+ * \param nc_off        The offset in the current stream_block (for resuming
+ *                      within current cipher stream). The offset pointer to
+ *                      should be 0 at the start of a stream.
+ * \param nonce_counter The 128-bit nonce and counter.
+ * \param stream_block  The saved stream-block for resuming. Is overwritten
+ *                      by the function.
+ * \param input         The input data stream
+ * \param output        The output data stream
+ *
+ * \return         0 if successful
+ */
+int esp_aes_crypt_ctr( esp_aes_context *ctx,
+                       size_t length,
+                       size_t *nc_off,
+                       unsigned char nonce_counter[16],
+                       unsigned char stream_block[16],
+                       const unsigned char *input,
+                       unsigned char *output );
+
+/**
+ * \brief       This function performs an AES-OFB (Output Feedback Mode)
+ *              encryption or decryption operation.
+ *
+ * \param ctx      The AES context to use for encryption or decryption.
+ *                 It must be initialized and bound to a key.
+ * \param length   The length of the input data.
+ * \param iv_off   The offset in IV (updated after use).
+ *                 It must point to a valid \c size_t.
+ * \param iv       The initialization vector (updated after use).
+ *                 It must be a readable and writeable buffer of \c 16 Bytes.
+ * \param input    The buffer holding the input data.
+ *                 It must be readable and of size \p length Bytes.
+ * \param output   The buffer holding the output data.
+ *                 It must be writeable and of size \p length Bytes.
+ *
+ * \return         \c 0 on success.
+ */
+int esp_aes_crypt_ofb( esp_aes_context *ctx,
+                       size_t length,
+                       size_t *iv_off,
+                       unsigned char iv[16],
+                       const unsigned char *input,
+                       unsigned char *output );
+
+/**
+ * \brief          This function prepares an XTS context for encryption and
+ *                 sets the encryption key.
+ *
+ * \param ctx      The AES XTS context to which the key should be bound.
+ * \param key      The encryption key. This is comprised of the XTS key1
+ *                 concatenated with the XTS key2.
+ * \param keybits  The size of \p key passed in bits. Valid options are:
+ *                 <ul><li>256 bits (each of key1 and key2 is a 128-bit key)</li>
+ *                 <li>512 bits (each of key1 and key2 is a 256-bit key)</li></ul>
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
+ */
+int esp_aes_xts_setkey_enc( esp_aes_xts_context *ctx,
+                                const unsigned char *key,
+                                unsigned int keybits );
+
+/**
+ * \brief          This function prepares an XTS context for decryption and
+ *                 sets the decryption key.
+ *
+ * \param ctx      The AES XTS context to which the key should be bound.
+ * \param key      The decryption key. This is comprised of the XTS key1
+ *                 concatenated with the XTS key2.
+ * \param keybits  The size of \p key passed in bits. Valid options are:
+ *                 <ul><li>256 bits (each of key1 and key2 is a 128-bit key)</li>
+ *                 <li>512 bits (each of key1 and key2 is a 256-bit key)</li></ul>
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
+ */
+int esp_aes_xts_setkey_dec( esp_aes_xts_context *ctx,
+                                const unsigned char *key,
+                                unsigned int keybits );
+
+
+/**
+ * \brief           Internal AES block encryption function
+ *                  (Only exposed to allow overriding it,
+ *                  see AES_ENCRYPT_ALT)
+ *
+ * \param ctx       AES context
+ * \param input     Plaintext block
+ * \param output    Output (ciphertext) block
+ */
+int esp_internal_aes_encrypt( esp_aes_context *ctx, const unsigned char input[16], unsigned char output[16] );
+
+/**
+ * \brief           Internal AES block decryption function
+ *                  (Only exposed to allow overriding it,
+ *                  see AES_DECRYPT_ALT)
+ *
+ * \param ctx       AES context
+ * \param input     Ciphertext block
+ * \param output    Output (plaintext) block
+ */
+int esp_internal_aes_decrypt( esp_aes_context *ctx, const unsigned char input[16], unsigned char output[16] );
+
+/** AES-XTS buffer encryption/decryption */
+int esp_aes_crypt_xts( esp_aes_xts_context *ctx, int mode, size_t length, const unsigned char data_unit[16], const unsigned char *input, unsigned char *output );
+
+/** Deprecated, see esp_aes_internal_decrypt */
+void esp_aes_decrypt( esp_aes_context *ctx, const unsigned char input[16], unsigned char output[16] ) __attribute__((deprecated));
+
+/** Deprecated, see esp_aes_internal_encrypt */
+void esp_aes_encrypt( esp_aes_context *ctx, const unsigned char input[16], unsigned char output[16] ) __attribute__((deprecated));
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/aes/esp_aes_gcm.h b/tools/sdk/esp32s3/include/mbedtls/port/include/aes/esp_aes_gcm.h
new file mode 100644
index 00000000000..92c81205f8e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/aes/esp_aes_gcm.h
@@ -0,0 +1,239 @@
+/**
+ * \brief AES GCM block cipher, ESP hardware accelerated version
+ * Based on mbedTLS FIPS-197 compliant version.
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  Additions Copyright (C) 2019-2020, Espressif Systems (Shanghai) PTE Ltd
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *
+ */
+
+#pragma once
+
+#include "aes/esp_aes.h"
+#include "mbedtls/cipher.h"
+#include "soc/lldesc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#define MBEDTLS_ERR_GCM_AUTH_FAILED      -0x0012  /**< Authenticated decryption failed. */
+#define MBEDTLS_ERR_GCM_BAD_INPUT        -0x0014  /**< Bad input parameters to function.*/
+
+typedef enum {
+    ESP_AES_GCM_STATE_INIT,
+    ESP_AES_GCM_STATE_START,
+    ESP_AES_GCM_STATE_UPDATE,
+    ESP_AES_GCM_STATE_FINISH
+} esp_aes_gcm_state;
+/**
+ * \brief          The GCM context structure.
+ */
+typedef struct {
+    uint8_t H[16];                        /*!< Initial hash value */
+    uint8_t ghash[16];                    /*!< GHASH value. */
+    uint8_t J0[16];
+    uint64_t HL[16];                      /*!< Precalculated HTable low. */
+    uint64_t HH[16];                      /*!< Precalculated HTable high. */
+    uint8_t ori_j0[16];                   /*!< J0 from first iteration. */
+    const uint8_t *iv;
+    size_t iv_len;                       /*!< The length of IV. */
+    uint64_t aad_len;                     /*!< The total length of the additional data. */
+    size_t data_len;
+    int mode;
+    const unsigned char *aad;             /*!< The additional data. */
+    esp_aes_context aes_ctx;
+    esp_aes_gcm_state gcm_state;
+} esp_gcm_context;
+
+
+/**
+ * \brief           This function initializes the specified GCM context
+ *
+ * \param ctx       The GCM context to initialize.
+ */
+void esp_aes_gcm_init( esp_gcm_context *ctx);
+
+/**
+ * \brief           This function associates a GCM context with a
+ *                  key.
+ *
+ * \param ctx       The GCM context to initialize.
+ * \param cipher    The 128-bit block cipher to use.
+ * \param key       The encryption key.
+ * \param keybits   The key size in bits. Valid options are:
+ *                  <ul><li>128 bits</li>
+ *                  <li>192 bits</li>
+ *                  <li>256 bits</li></ul>
+ *
+ * \return          \c 0 on success.
+ * \return          A cipher-specific error code on failure.
+ */
+int esp_aes_gcm_setkey( esp_gcm_context *ctx,
+                        mbedtls_cipher_id_t cipher,
+                        const unsigned char *key,
+                        unsigned int keybits );
+
+/**
+ * \brief           This function starts a GCM encryption or decryption
+ *                  operation.
+ *
+ * \param ctx       The GCM context.
+ * \param mode      The operation to perform: #MBEDTLS_GCM_ENCRYPT or
+ *                  #MBEDTLS_GCM_DECRYPT.
+ * \param iv        The initialization vector.
+ * \param iv_len    The length of the IV.
+ * \param add       The buffer holding the additional data, or NULL
+ *                  if \p aad_len is 0.
+ * \param aad_len   The length of the additional data. If 0,
+ *                  \p add is NULL.
+ *
+ * \return          \c 0 on success.
+ */
+int esp_aes_gcm_starts( esp_gcm_context *ctx,
+                        int mode,
+                        const unsigned char *iv,
+                        size_t iv_len,
+                        const unsigned char *aad,
+                        size_t aad_len );
+
+/**
+ * \brief           This function feeds an input buffer into an ongoing GCM
+ *                  encryption or decryption operation.
+ *
+ *    `             The function expects input to be a multiple of 16
+ *                  Bytes. Only the last call before calling
+ *                  mbedtls_gcm_finish() can be less than 16 Bytes.
+ *
+ * \note            For decryption, the output buffer cannot be the same as
+ *                  input buffer. If the buffers overlap, the output buffer
+ *                  must trail at least 8 Bytes behind the input buffer.
+ *
+ * \param ctx       The GCM context.
+ * \param length    The length of the input data. This must be a multiple of
+ *                  16 except in the last call before mbedtls_gcm_finish().
+ * \param input     The buffer holding the input data.
+ * \param output    The buffer for holding the output data.
+ *
+ * \return         \c 0 on success.
+ * \return         #MBEDTLS_ERR_GCM_BAD_INPUT on failure.
+ */
+int esp_aes_gcm_update( esp_gcm_context *ctx,
+                        size_t length,
+                        const unsigned char *input,
+                        unsigned char *output );
+
+/**
+ * \brief           This function finishes the GCM operation and generates
+ *                  the authentication tag.
+ *
+ *                  It wraps up the GCM stream, and generates the
+ *                  tag. The tag can have a maximum length of 16 Bytes.
+ *
+ * \param ctx       The GCM context.
+ * \param tag       The buffer for holding the tag.
+ * \param tag_len   The length of the tag to generate. Must be at least four.
+ *
+ * \return          \c 0 on success.
+ * \return          #MBEDTLS_ERR_GCM_BAD_INPUT on failure.
+ */
+int esp_aes_gcm_finish( esp_gcm_context *ctx,
+                        unsigned char *tag,
+                        size_t tag_len );
+
+/**
+ * \brief           This function clears a GCM context
+ *
+ * \param ctx       The GCM context to clear.
+ */
+void esp_aes_gcm_free( esp_gcm_context *ctx);
+
+/**
+ * \brief           This function performs GCM encryption or decryption of a buffer.
+ *
+ * \note            For encryption, the output buffer can be the same as the
+ *                  input buffer. For decryption, the output buffer cannot be
+ *                  the same as input buffer. If the buffers overlap, the output
+ *                  buffer must trail at least 8 Bytes behind the input buffer.
+ *
+ * \param ctx       The GCM context to use for encryption or decryption.
+ * \param mode      The operation to perform: #MBEDTLS_GCM_ENCRYPT or
+ *                  #MBEDTLS_GCM_DECRYPT.
+ * \param length    The length of the input data. This must be a multiple of
+ *                  16 except in the last call before mbedtls_gcm_finish().
+ * \param iv        The initialization vector.
+ * \param iv_len    The length of the IV.
+ * \param add       The buffer holding the additional data.
+ * \param aad_len   The length of the additional data.
+ * \param input     The buffer holding the input data.
+ * \param output    The buffer for holding the output data.
+ * \param tag_len   The length of the tag to generate.
+ * \param tag       The buffer for holding the tag.
+ *
+ * \return         \c 0 on success.
+ */
+int esp_aes_gcm_crypt_and_tag( esp_gcm_context *ctx,
+                               int mode,
+                               size_t length,
+                               const unsigned char *iv,
+                               size_t iv_len,
+                               const unsigned char *add,
+                               size_t aad_len,
+                               const unsigned char *input,
+                               unsigned char *output,
+                               size_t tag_len,
+                               unsigned char *tag );
+
+
+/**
+ * \brief           This function performs a GCM authenticated decryption of a
+ *                  buffer.
+ *
+ * \note            For decryption, the output buffer cannot be the same as
+ *                  input buffer. If the buffers overlap, the output buffer
+ *                  must trail at least 8 Bytes behind the input buffer.
+ *
+ * \param ctx       The GCM context.
+ * \param length    The length of the input data. This must be a multiple
+ *                  of 16 except in the last call before mbedtls_gcm_finish().
+ * \param iv        The initialization vector.
+ * \param iv_len    The length of the IV.
+ * \param add       The buffer holding the additional data.
+ * \param aad_len   The length of the additional data.
+ * \param tag       The buffer holding the tag.
+ * \param tag_len   The length of the tag.
+ * \param input     The buffer holding the input data.
+ * \param output    The buffer for holding the output data.
+ *
+ * \return         0 if successful and authenticated.
+ * \return         #MBEDTLS_ERR_GCM_AUTH_FAILED if the tag does not match.
+ */
+int esp_aes_gcm_auth_decrypt( esp_gcm_context *ctx,
+                              size_t length,
+                              const unsigned char *iv,
+                              size_t iv_len,
+                              const unsigned char *add,
+                              size_t aad_len,
+                              const unsigned char *tag,
+                              size_t tag_len,
+                              const unsigned char *input,
+                              unsigned char *output );
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/aes/esp_aes_internal.h b/tools/sdk/esp32s3/include/mbedtls/port/include/aes/esp_aes_internal.h
new file mode 100644
index 00000000000..35a7d3935a5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/aes/esp_aes_internal.h
@@ -0,0 +1,54 @@
+/**
+ * \brief AES block cipher, ESP-IDF hardware accelerated version
+ * Based on mbedTLS FIPS-197 compliant version.
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  Additions Copyright (C) 2016, Espressif Systems (Shanghai) PTE Ltd
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *  Internal API
+ */
+
+#pragma once
+
+
+#include "aes/esp_aes.h"
+#include "aes/esp_aes_gcm.h"
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+bool valid_key_length(const esp_aes_context *ctx);
+
+
+/**
+ * @brief           Run a AES-GCM conversion using DMA
+ *
+ * @param ctx       Aes context
+ * @param input     Pointer to input data
+ * @param output    Pointer to output data
+ * @param len       Length of the input data
+ * @param aad_desc  GCM additional data DMA descriptor
+ * @param aad_len   GCM additional data length
+ * @return int      -1 on error
+ */
+int esp_aes_process_dma_gcm(esp_aes_context *ctx, const unsigned char *input, unsigned char *output, size_t len, lldesc_t *aad_desc, size_t aad_len);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/aes_alt.h b/tools/sdk/esp32s3/include/mbedtls/port/include/aes_alt.h
new file mode 100644
index 00000000000..2f8e958b27d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/aes_alt.h
@@ -0,0 +1,69 @@
+/**
+ * \file aes_alt.h
+ *
+ * \brief AES block cipher
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *
+ */
+#ifndef AES_ALT_H
+#define AES_ALT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_AES_ALT)
+#include "aes/esp_aes.h"
+
+typedef esp_aes_context mbedtls_aes_context;
+
+#define mbedtls_aes_init            esp_aes_init
+#define mbedtls_aes_free            esp_aes_free
+#define mbedtls_aes_setkey_enc      esp_aes_setkey
+#define mbedtls_aes_setkey_dec      esp_aes_setkey
+#define mbedtls_aes_crypt_ecb       esp_aes_crypt_ecb
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+#define mbedtls_aes_crypt_cbc       esp_aes_crypt_cbc
+#endif
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+#define mbedtls_aes_crypt_cfb128    esp_aes_crypt_cfb128
+#define mbedtls_aes_crypt_cfb8      esp_aes_crypt_cfb8
+#endif
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+#define mbedtls_aes_crypt_ctr       esp_aes_crypt_ctr
+#endif
+#if defined(MBEDTLS_CIPHER_MODE_OFB)
+#define mbedtls_aes_crypt_ofb       esp_aes_crypt_ofb
+#endif
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+typedef esp_aes_xts_context mbedtls_aes_xts_context;
+#define mbedtls_aes_xts_init            esp_aes_xts_init
+#define mbedtls_aes_xts_free            esp_aes_xts_free
+#define mbedtls_aes_xts_setkey_enc      esp_aes_xts_setkey_enc
+#define mbedtls_aes_xts_setkey_dec      esp_aes_xts_setkey_dec
+#define mbedtls_aes_crypt_xts       esp_aes_crypt_xts
+#endif
+#define mbedtls_internal_aes_encrypt         esp_internal_aes_encrypt
+#define mbedtls_internal_aes_decrypt         esp_internal_aes_decrypt
+#endif /* MBEDTLS_AES_ALT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/bignum_impl.h b/tools/sdk/esp32s3/include/mbedtls/port/include/bignum_impl.h
new file mode 100644
index 00000000000..838a9d4af40
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/bignum_impl.h
@@ -0,0 +1,83 @@
+#ifndef _ESP_BIGNUM_H_
+#define _ESP_BIGNUM_H_
+
+#include <mbedtls/bignum.h>
+#include <stdbool.h>
+
+/* Use montgomery exponentiation (HAC 14.94) for calculating X ^ Y mod M,
+   this may be faster for some targets. The hardware acceleration support for modular
+   exponentiation on the ESP32 is slow for public key operations, so use montgomery
+   exponentiation instead.
+*/
+#if CONFIG_IDF_TARGET_ESP32
+#define ESP_MPI_USE_MONT_EXP
+#endif
+
+/**
+ * @brief Enable the MPI hardware and acquire the lock
+ *
+ */
+void esp_mpi_enable_hardware_hw_op( void );
+
+/**
+ * @brief Disable the MPI hardware and release the lock
+ *
+ */
+void esp_mpi_disable_hardware_hw_op( void );
+
+/**
+ * @brief Calculate the number of words needed to represent the input word in hardware
+ *
+ * @param words The number of words to be represented
+ *
+ * @return size_t Number of words required
+ */
+size_t esp_mpi_hardware_words(size_t words);
+
+/**
+ * @brief Starts a (X * Y) Mod M calculation in hardware. Rinv and M_prime needs to be precalculated in software.
+ *
+ */
+void esp_mpi_mul_mpi_mod_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M, const mbedtls_mpi *Rinv, mbedtls_mpi_uint Mprime, size_t hw_words);
+
+/**
+ * @brief Starts a (X * Y) calculation in hardware.
+ *
+ */
+void esp_mpi_mul_mpi_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words);
+
+/**
+ * @brief Special-case of (X * Y), where we use hardware montgomery mod
+   multiplication to calculate result where either A or B are >2048 bits so
+   can't use the standard multiplication method.
+ *
+ */
+void esp_mpi_mult_mpi_failover_mod_mult_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words);
+
+/**
+ * @brief Read out the result from the previous calculation.
+ *
+ */
+void esp_mpi_read_result_hw_op(mbedtls_mpi *Z, size_t z_words);
+
+#ifdef ESP_MPI_USE_MONT_EXP
+/**
+ * @brief Starts a montgomery multiplication calculation in hardware
+ *
+ */
+int esp_mont_hw_op(mbedtls_mpi* Z, const mbedtls_mpi* X, const mbedtls_mpi* Y, const mbedtls_mpi* M,
+                mbedtls_mpi_uint Mprime,
+                size_t hw_words,
+                bool again);
+
+#else
+
+/**
+ * @brief Starts a (X ^ Y) Mod M calculation in hardware. Rinv and M_prime needs to be precalculated in software.
+ *
+ */
+void esp_mpi_exp_mpi_mod_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M, const mbedtls_mpi *Rinv, mbedtls_mpi_uint Mprime, size_t hw_words);
+
+#endif //ESP_MPI_USE_MONT_EXP
+
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/esp32/aes.h b/tools/sdk/esp32s3/include/mbedtls/port/include/esp32/aes.h
new file mode 100644
index 00000000000..3eb87a78c87
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/esp32/aes.h
@@ -0,0 +1,31 @@
+/**
+ * \brief AES block cipher, ESP32 hardware accelerated version
+ * Based on mbedTLS FIPS-197 compliant version.
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  Additions Copyright (C) 2016, Espressif Systems (Shanghai) PTE Ltd
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *
+ */
+
+#ifndef ESP_AES_H
+#define ESP_AES_H
+
+#warning "esp32/aes.h is deprecated, please use aes/esp_aes.h instead"
+
+#include "aes/esp_aes.h"
+
+#endif /* aes.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/esp32/sha.h b/tools/sdk/esp32s3/include/mbedtls/port/include/esp32/sha.h
new file mode 100644
index 00000000000..14d39b3d62b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/esp32/sha.h
@@ -0,0 +1,20 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+
+#include "sha/sha_parallel_engine.h"
+
+#warning esp32/sha.h is deprecated, please use sha_parallel_engine.h instead
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/esp32s2/aes.h b/tools/sdk/esp32s3/include/mbedtls/port/include/esp32s2/aes.h
new file mode 100644
index 00000000000..09a3b3d59b5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/esp32s2/aes.h
@@ -0,0 +1,33 @@
+/**
+ * \brief AES block cipher, ESP32 hardware accelerated version
+ * Based on mbedTLS FIPS-197 compliant version.
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  Additions Copyright (C) 2016-20, Espressif Systems (Shanghai) PTE Ltd
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *
+ */
+
+#ifndef ESP_AES_H
+#define ESP_AES_H
+
+
+//#warning "esp32s2/aes.h is deprecated, please use aes/esp_aes.h instead"
+
+#include "aes/esp_aes.h"
+
+
+#endif /* aes.h */
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/esp32s2/gcm.h b/tools/sdk/esp32s3/include/mbedtls/port/include/esp32s2/gcm.h
new file mode 100644
index 00000000000..726783e8ccd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/esp32s2/gcm.h
@@ -0,0 +1,27 @@
+/**
+ * \brief AES block cipher, ESP32C hardware accelerated version
+ * Based on mbedTLS FIPS-197 compliant version.
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  Additions Copyright (C) 2019-2020, Espressif Systems (Shanghai) PTE Ltd
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *
+ */
+#pragma once
+
+#warning "esp32s2/gcm.h is deprecated, please use aes/esp_aes_gcm.h instead"
+
+#include "aes/esp_aes_gcm.h"
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/esp32s2/sha.h b/tools/sdk/esp32s3/include/mbedtls/port/include/esp32s2/sha.h
new file mode 100644
index 00000000000..1e9e3f36224
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/esp32s2/sha.h
@@ -0,0 +1,19 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "sha/sha_dma.h"
+
+#warning esp32s2/sha.h is deprecated, please use sha/sha_dma.h instead
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/esp_crypto_shared_gdma.h b/tools/sdk/esp32s3/include/mbedtls/port/include/esp_crypto_shared_gdma.h
new file mode 100644
index 00000000000..46aa0383b14
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/esp_crypto_shared_gdma.h
@@ -0,0 +1,55 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/lldesc.h"
+#include "esp_private/gdma.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Start a GDMA transfer on the shared crypto DMA channel
+ *
+ * @note Will allocate a GDMA channel for AES & SHA if no such channel is already allocated
+ *
+ * @param input Input linked list descriptor
+ * @param output Output linked list descriptor
+ * @param peripheral Crypto peripheral to connect the DMA to, either GDMA_TRIG_PERIPH_AES or
+ *                   GDMA_TRIG_PERIPH_SHA
+ * @return esp_err_t ESP_FAIL if no GDMA channel available
+ */
+esp_err_t esp_crypto_shared_gdma_start(const lldesc_t *input, const lldesc_t *output, gdma_trigger_peripheral_t peripheral);
+
+
+/**
+ * @brief Frees any shared crypto DMA channel, if esp_crypto_shared_gdma_start is called after
+ *        this, new GDMA channels will be allocated.
+ *
+ * @note Function is meant to be called from user code, and thus takes AES/SHA lock.
+ *       This means this function should not be called from code which already takes these locks,
+ *       i.e. inside our AES/SHA code.
+ *
+ *       If you are continously using AES/SHA (e.g. because of a wifi connection) then it's not recommended
+ *       to use this API. Freeing the channel is mainly for use cases where you are finished with the crypto peripherals
+ *       and need the DMA channel for other peripherals. An example would be doing some processing after disconnecting WiFi
+ */
+void esp_crypto_shared_gdma_free(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/esp_ds/esp_rsa_sign_alt.h b/tools/sdk/esp32s3/include/mbedtls/port/include/esp_ds/esp_rsa_sign_alt.h
new file mode 100644
index 00000000000..51fc22e2fa8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/esp_ds/esp_rsa_sign_alt.h
@@ -0,0 +1,86 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifndef _ESP_RSA_SIGN_ALT_H_
+#define _ESP_RSA_SIGN_ALT_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "esp_ds.h"
+#include "mbedtls/md.h"
+
+/**
+ * @brief      ESP-DS data context
+ *
+ * @note       This structure includes encrypted private key parameters such as ciphertext_c, initialization vector, efuse_key_id, RSA key length, which are obtained when DS peripheral is configured.
+ */
+
+/* Context for encrypted private key data required for DS */
+typedef struct esp_ds_data_ctx {
+    esp_ds_data_t *esp_ds_data;
+    uint8_t efuse_key_id; /* efuse block id in which DS_KEY is stored e.g. 0,1*/
+    uint16_t rsa_length_bits; /* length of RSA private key in bits e.g. 2048 */
+} esp_ds_data_ctx_t;
+
+/**
+ * @brief       Initializes internal DS data context
+ *
+ * This function allocates and initializes internal ds data context which is used for Digital Signature operation.
+ *
+ * @in          ds_data     ds_data context containing encrypted private key parameters
+ * @return
+ *              - ESP_OK  In case of succees
+ *              - ESP_ERR_NO_MEM In case internal context could not be allocated.
+ *              - ESP_ERR_INVALID_ARG in case input parametrers are NULL
+ *
+ */
+esp_err_t esp_ds_init_data_ctx(esp_ds_data_ctx_t *ds_data);
+
+/**
+ *
+ * @brief      Release the ds lock acquired for the DS operation (then the DS peripheral can be used for other TLS connection)
+ *
+ */
+void esp_ds_release_ds_lock(void);
+
+/**
+ *
+ * @brief       Alternate implementation for mbedtls_rsa_rsassa_pkcs1_v15_sign, Internally makes use
+ *              of DS module to perform hardware accelerated RSA sign operation
+ */
+int esp_ds_rsa_sign( void *ctx,
+                     int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+                     int mode, mbedtls_md_type_t md_alg, unsigned int hashlen,
+                     const unsigned char *hash, unsigned char *sig );
+
+/*
+ * @brief       Get RSA key length in bytes from internal DS context
+ *
+ * @return      RSA key length in bytes
+ */
+size_t esp_ds_get_keylen(void *ctx);
+
+/*
+ * @brief       Set timeout (equal to TLS session timeout), so that DS module usage can be synchronized in case of multiple TLS connections using DS module,
+ */
+void esp_ds_set_session_timeout(int timeout);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_RSA_SIGN_ALT_H_ */
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/esp_mem.h b/tools/sdk/esp32s3/include/mbedtls/port/include/esp_mem.h
new file mode 100644
index 00000000000..da740830478
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/esp_mem.h
@@ -0,0 +1,20 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdlib.h>
+
+void *esp_mbedtls_mem_calloc(size_t n, size_t size);
+void esp_mbedtls_mem_free(void *ptr);
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/gcm_alt.h b/tools/sdk/esp32s3/include/mbedtls/port/include/gcm_alt.h
new file mode 100644
index 00000000000..7210d92b877
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/gcm_alt.h
@@ -0,0 +1,57 @@
+/**
+ * \file gcm_alt.h
+ *
+ * \brief AES block cipher
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *
+ */
+#ifndef GCM_ALT_H
+#define GCM_ALT_H
+
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_GCM_ALT)
+
+#if SOC_AES_SUPPORT_GCM
+#include "aes/esp_aes_gcm.h"
+
+
+typedef esp_gcm_context mbedtls_gcm_context;
+
+#define mbedtls_gcm_init            esp_aes_gcm_init
+#define mbedtls_gcm_free            esp_aes_gcm_free
+#define mbedtls_gcm_setkey          esp_aes_gcm_setkey
+#define mbedtls_gcm_starts          esp_aes_gcm_starts
+#define mbedtls_gcm_update          esp_aes_gcm_update
+#define mbedtls_gcm_finish          esp_aes_gcm_finish
+#define mbedtls_gcm_auth_decrypt    esp_aes_gcm_auth_decrypt
+#define mbedtls_gcm_crypt_and_tag   esp_aes_gcm_crypt_and_tag
+
+#endif // SOC_AES_SUPPORT_GCM
+
+#endif /* MBEDTLS_GCM_ALT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/mbedtls/bignum.h b/tools/sdk/esp32s3/include/mbedtls/port/include/mbedtls/bignum.h
new file mode 100644
index 00000000000..4f84bed7407
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/mbedtls/bignum.h
@@ -0,0 +1,99 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include_next "mbedtls/bignum.h"
+#include "sdkconfig.h"
+
+/**
+ * This is a wrapper for the main mbedtls/bignum.h. This wrapper
+ * provides a few additional ESP32-only functions.
+ *
+ * This is because we don't set MBEDTLS_BIGNUM_ALT in the same way we
+ * do for AES, SHA, etc. Because we still use most of the bignum.h
+ * implementation and just replace a few hardware accelerated
+ * functions (see MBEDTLS_MPI_EXP_MOD_ALT & MBEDTLS_MPI_MUL_MPI_ALT in
+ * esp_config.h).
+ *
+ * @note Unlike the other hardware accelerator support functions in esp32/hwcrypto, there is no
+ * generic "hwcrypto/bignum.h" header for using these functions without mbedTLS. The reason for this
+ * is that all of the function implementations depend strongly upon the mbedTLS MPI implementation.
+ */
+
+/**
+ * @brief Lock access to RSA Accelerator (MPI/bignum operations)
+ *
+ * RSA Accelerator hardware unit can only be used by one
+ * consumer at a time.
+ *
+ * @note This function is non-recursive (do not call it twice from the
+ * same task.)
+ *
+ * @note You do not need to call this if you are using the mbedTLS bignum.h
+ * API or esp_mpi_xxx functions. This function is only needed if you
+ * want to call ROM RSA functions or access the registers directly.
+ *
+ */
+void esp_mpi_acquire_hardware(void);
+
+/**
+ * @brief Unlock access to RSA Accelerator (MPI/bignum operations)
+ *
+ * Has to be called once for each call to esp_mpi_acquire_hardware().
+ *
+ * @note You do not need to call this if you are using the mbedTLS bignum.h
+ * API or esp_mpi_xxx functions. This function is only needed if you
+ * want to call ROM RSA functions or access the registers directly.
+ */
+void esp_mpi_release_hardware(void);
+
+#if CONFIG_MBEDTLS_HARDWARE_MPI
+
+/* @brief MPI modular mupltiplication function
+ *
+ * Calculates Z = (X * Y) mod M using MPI hardware acceleration.
+ *
+ * This is not part of the standard mbedTLS bignum API.
+ *
+ * @note All of X, Y & Z should be less than 4096 bit long or an error is returned.
+ *
+ * @param Z Result bignum, should be pre-initialised with mbedtls_mpi_init().
+ * @param X First multiplication argument.
+ * @param Y Second multiplication argument.
+ * @param M Modulus value for result.
+ *
+ * @return 0 on success, mbedTLS MPI error codes on failure.
+ */
+int esp_mpi_mul_mpi_mod(mbedtls_mpi *Z, const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M);
+
+#if CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI
+
+/**
+ * @brief          Perform a sliding-window exponentiation: X = A^E mod N
+ *
+ * @param X        The destination MPI. This must point to an initialized MPI.
+ * @param A        The base of the exponentiation.
+ *                 This must point to an initialized MPI.
+ * @param E        The exponent MPI. This must point to an initialized MPI.
+ * @param N        The base for the modular reduction. This must point to an
+ *                 initialized MPI.
+ * @param _RR      A helper MPI depending solely on \p N which can be used to
+ *                 speed-up multiple modular exponentiations for the same value
+ *                 of \p N. This may be \c NULL. If it is not \c NULL, it must
+ *                 point to an initialized MPI.
+ *
+ * @return         \c 0 if successful.
+ * @return         #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * @return         #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \c N is negative or
+ *                 even, or if \c E is negative.
+ * @return         Another negative error code on different kinds of failures.
+ *
+ */
+int mbedtls_mpi_exp_mod_soft(mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *E, const mbedtls_mpi *N, mbedtls_mpi *_RR);
+
+#endif // CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI
+
+#endif // CONFIG_MBEDTLS_HARDWARE_MPI
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/mbedtls/esp_config.h b/tools/sdk/esp32s3/include/mbedtls/port/include/mbedtls/esp_config.h
new file mode 100644
index 00000000000..607d35ffc69
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/mbedtls/esp_config.h
@@ -0,0 +1,2767 @@
+/**
+ *
+ * \brief Default mbedTLS configuration options for ESP-IDF
+ *
+ *  This set of compile-time options may be used to enable
+ *  or disable features selectively, and reduce the global
+ *  memory footprint.
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+
+#ifndef ESP_CONFIG_H
+#define ESP_CONFIG_H
+
+#include "sdkconfig.h"
+#include "mbedtls/config.h"
+#include "soc/soc_caps.h"
+
+/**
+ * \name SECTION: System support
+ *
+ * This section sets system specific settings.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_HAVE_TIME
+ *
+ * System has time.h and time().
+ * The time does not need to be correct, only time differences are used,
+ * by contrast with MBEDTLS_HAVE_TIME_DATE
+ *
+ * Comment if your system does not support time functions
+ */
+#ifdef CONFIG_MBEDTLS_HAVE_TIME
+#define MBEDTLS_HAVE_TIME
+#else
+#undef MBEDTLS_HAVE_TIME
+#endif
+
+/**
+ * \def MBEDTLS_HAVE_TIME_DATE
+ *
+ * System has time.h and time(), gmtime() and the clock is correct.
+ * The time needs to be correct (not necesarily very accurate, but at least
+ * the date should be correct). This is used to verify the validity period of
+ * X.509 certificates.
+ *
+ * Comment if your system does not have a correct clock.
+ */
+#ifdef CONFIG_MBEDTLS_HAVE_TIME_DATE
+#define MBEDTLS_HAVE_TIME_DATE
+#else
+#undef MBEDTLS_HAVE_TIME_DATE
+#endif
+
+/**
+ * \def MBEDTLS_PLATFORM_MEMORY
+ *
+ * Enable the memory allocation layer.
+ *
+ * By default mbed TLS uses the system-provided calloc() and free().
+ * This allows different allocators (self-implemented or provided) to be
+ * provided to the platform abstraction layer.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY without the
+ * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide
+ * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and
+ * free() function pointer at runtime.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY and specifying
+ * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the
+ * alternate function at compile time.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Enable this layer to allow use of alternative memory allocators.
+ */
+#define MBEDTLS_PLATFORM_MEMORY
+
+/** Override calloc(), free() except for case where memory allocation scheme is not set to custom */
+#ifndef CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC
+#include "esp_mem.h"
+#define MBEDTLS_PLATFORM_STD_CALLOC		esp_mbedtls_mem_calloc
+#define MBEDTLS_PLATFORM_STD_FREE		esp_mbedtls_mem_free
+#endif
+
+/* \} name SECTION: System support */
+
+/**
+ * \name SECTION: mbed TLS feature support
+ *
+ * This section sets support for features that are or are not needed
+ * within the modules that are enabled.
+ * \{
+ */
+
+/* The following units have ESP32 hardware support,
+   uncommenting each _ALT macro will use the
+   hardware-accelerated implementation. */
+#ifdef CONFIG_MBEDTLS_HARDWARE_AES
+#define MBEDTLS_AES_ALT
+#else
+#undef MBEDTLS_AES_ALT
+#endif
+
+#ifdef CONFIG_MBEDTLS_HARDWARE_GCM
+#define MBEDTLS_GCM_ALT
+#else
+#undef MBEDTLS_GCM_ALT
+#endif
+
+/* MBEDTLS_SHAxx_ALT to enable hardware SHA support
+   with software fallback.
+*/
+#ifdef CONFIG_MBEDTLS_HARDWARE_SHA
+#define MBEDTLS_SHA1_ALT
+#define MBEDTLS_SHA256_ALT
+
+#if SOC_SHA_SUPPORT_SHA512
+#define MBEDTLS_SHA512_ALT
+#else
+#undef MBEDTLS_SHA512_ALT
+#endif
+
+#else
+#undef MBEDTLS_SHA1_ALT
+#undef MBEDTLS_SHA256_ALT
+#undef MBEDTLS_SHA512_ALT
+#endif
+
+/* MBEDTLS_MDx_ALT to enable ROM MD support
+   with software fallback.
+*/
+#ifdef CONFIG_MBEDTLS_ROM_MD5
+#define MBEDTLS_MD5_ALT
+#else
+#undef MBEDTLS_MD5_ALT
+#endif
+
+/* The following MPI (bignum) functions have hardware support.
+ * Uncommenting these macros will use the hardware-accelerated
+ * implementations.
+ */
+#ifdef CONFIG_MBEDTLS_HARDWARE_MPI
+#ifdef CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI
+    /* Prefer hardware and fallback to software */
+    #define MBEDTLS_MPI_EXP_MOD_ALT_FALLBACK
+#else
+    /* Hardware only mode */
+    #define MBEDTLS_MPI_EXP_MOD_ALT
+#endif
+#define MBEDTLS_MPI_MUL_MPI_ALT
+#else
+#undef MBEDTLS_MPI_EXP_MOD_ALT_FALLBACK
+#undef MBEDTLS_MPI_EXP_MOD_ALT
+#undef MBEDTLS_MPI_MUL_MPI_ALT
+#endif
+
+#ifdef CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN
+#define MBEDTLS_ECDSA_SIGN_ALT
+#endif
+
+#ifdef CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY
+#define MBEDTLS_ECDSA_VERIFY_ALT
+#endif
+
+/**
+ * \def MBEDTLS_ENTROPY_HARDWARE_ALT
+ *
+ * Uncomment this macro to let mbed TLS use your own implementation of a
+ * hardware entropy collector.
+ *
+ * Your function must be called \c mbedtls_hardware_poll(), have the same
+ * prototype as declared in entropy_poll.h, and accept NULL as first argument.
+ *
+ * Uncomment to use your own hardware entropy collector.
+ */
+#define MBEDTLS_ENTROPY_HARDWARE_ALT
+
+/**
+ * \def MBEDTLS_AES_ROM_TABLES
+ *
+ * Store the AES tables in ROM.
+ *
+ * Uncomment this macro to store the AES tables in ROM.
+ */
+#define MBEDTLS_AES_ROM_TABLES
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CBC
+ *
+ * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CBC
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CFB
+ *
+ * Enable Cipher Feedback mode (CFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CTR
+ *
+ * Enable Counter Block Cipher mode (CTR) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CTR
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_OFB
+ *
+ * Enable Output Feedback mode (OFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_OFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_XTS
+ *
+ * Enable Xor-encrypt-xor with ciphertext stealing mode (XTS) for AES.
+ */
+#define MBEDTLS_CIPHER_MODE_XTS
+
+/**
+ * \def MBEDTLS_CIPHER_PADDING_PKCS7
+ *
+ * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for
+ * specific padding modes in the cipher layer with cipher modes that support
+ * padding (e.g. CBC)
+ *
+ * If you disable all padding modes, only full blocks can be used with CBC.
+ *
+ * Enable padding modes in the cipher layer.
+ */
+#define MBEDTLS_CIPHER_PADDING_PKCS7
+#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+#define MBEDTLS_CIPHER_PADDING_ZEROS
+
+/**
+ * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES & MBEDTLS_ARC4_C
+ *
+ * MBEDTLS_ARC4_C
+ * Enable the ARCFOUR stream cipher.
+ *
+ * This module enables/disables the following ciphersuites
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ *      MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ *
+ * MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+ * This flag removes the ciphersuites based on RC4 from the default list as
+ * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to
+ * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them
+ * explicitly.
+ *
+ * Uncomment this macro to remove RC4 ciphersuites by default.
+ */
+#ifdef CONFIG_MBEDTLS_RC4_ENABLED
+#define MBEDTLS_ARC4_C
+#undef MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+#elif defined CONFIG_MBEDTLS_RC4_ENABLED_NO_DEFAULT
+#define MBEDTLS_ARC4_C
+#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+#else
+#undef MBEDTLS_ARC4_C
+#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+#endif
+
+/**
+ * \def MBEDTLS_ECP_RESTARTABLE
+ *
+ * Enable "non-blocking" ECC operations that can return early and be resumed.
+ *
+ * This allows various functions to pause by returning
+ * #MBEDTLS_ERR_ECP_IN_PROGRESS (or, for functions in the SSL module,
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS) and then be called later again in
+ * order to further progress and eventually complete their operation. This is
+ * controlled through mbedtls_ecp_set_max_ops() which limits the maximum
+ * number of ECC operations a function may perform before pausing; see
+ * mbedtls_ecp_set_max_ops() for more information.
+ *
+ * This is useful in non-threaded environments if you want to avoid blocking
+ * for too long on ECC (and, hence, X.509 or SSL/TLS) operations.
+ *
+ * Uncomment this macro to enable restartable ECC computations.
+ *
+ * \note  This option only works with the default software implementation of
+ *        elliptic curve functionality. It is incompatible with
+ *        MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT, MBEDTLS_ECDSA_XXX_ALT
+ *        and MBEDTLS_ECDH_LEGACY_CONTEXT.
+ */
+#ifdef CONFIG_MBEDTLS_ECP_RESTARTABLE
+#define MBEDTLS_ECP_RESTARTABLE
+#endif
+
+/**
+ * \def MBEDTLS_ECDH_LEGACY_CONTEXT
+ *
+ * Use a backward compatible ECDH context.
+ *
+ * Mbed TLS supports two formats for ECDH contexts (#mbedtls_ecdh_context
+ * defined in `ecdh.h`). For most applications, the choice of format makes
+ * no difference, since all library functions can work with either format,
+ * except that the new format is incompatible with MBEDTLS_ECP_RESTARTABLE.
+
+ * The new format used when this option is disabled is smaller
+ * (56 bytes on a 32-bit platform). In future versions of the library, it
+ * will support alternative implementations of ECDH operations.
+ * The new format is incompatible with applications that access
+ * context fields directly and with restartable ECP operations.
+ *
+ * Define this macro if you enable MBEDTLS_ECP_RESTARTABLE or if you
+ * want to access ECDH context fields directly. Otherwise you should
+ * comment out this macro definition.
+ *
+ * This option has no effect if #MBEDTLS_ECDH_C is not enabled.
+ *
+ * \note This configuration option is experimental. Future versions of the
+ *       library may modify the way the ECDH context layout is configured
+ *       and may modify the layout of the new context type.
+ */
+#ifdef CONFIG_MBEDTLS_ECDH_LEGACY_CONTEXT
+#define MBEDTLS_ECDH_LEGACY_CONTEXT
+#endif
+
+/**
+ * \def MBEDTLS_CMAC_C
+ *
+ * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
+ * ciphers.
+ *
+ * \note When #MBEDTLS_CMAC_ALT is active, meaning that the underlying
+ *       implementation of the CMAC algorithm is provided by an alternate
+ *       implementation, that alternate implementation may opt to not support
+ *       AES-192 or 3DES as underlying block ciphers for the CMAC operation.
+ *
+ * Module:  library/cmac.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
+ *
+ */
+#ifdef CONFIG_MBEDTLS_CMAC_C
+#define MBEDTLS_CMAC_C
+#endif
+
+/**
+ * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED
+ *
+ * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve
+ * module.  By default all supported curves are enabled.
+ *
+ * Comment macros to disable the curve and functions for it
+ */
+/* Short Weierstrass curves (supporting ECP, ECDH, ECDSA) */
+#ifdef CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#endif
+#ifdef CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#endif
+#ifdef CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#endif
+#ifdef CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#endif
+#ifdef CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#endif
+#ifdef CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#endif
+#ifdef CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#endif
+#ifdef CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#endif
+#ifdef CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_BP256R1_ENABLED
+#endif
+#ifdef CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED
+#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_BP384R1_ENABLED
+#endif
+#ifdef CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_BP512R1_ENABLED
+#endif
+/* Montgomery curves (supporting ECP) */
+#ifdef CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#define MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#else
+#undef MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#endif
+#ifdef MBEDTLS_ECP_DP_CURVE448_ENABLED
+#undef MBEDTLS_ECP_DP_CURVE448_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_ECP_NIST_OPTIM
+ *
+ * Enable specific 'modulo p' routines for each NIST prime.
+ * Depending on the prime and architecture, makes operations 4 to 8 times
+ * faster on the corresponding curve.
+ *
+ * Comment this macro to disable NIST curves optimisation.
+ */
+#ifdef CONFIG_MBEDTLS_ECP_NIST_OPTIM
+#define MBEDTLS_ECP_NIST_OPTIM
+#else
+#undef MBEDTLS_ECP_NIST_OPTIM
+#endif
+
+/**
+ * \def MBEDTLS_ECDSA_DETERMINISTIC
+ *
+ * Enable deterministic ECDSA (RFC 6979).
+ * Standard ECDSA is "fragile" in the sense that lack of entropy when signing
+ * may result in a compromise of the long-term signing key. This is avoided by
+ * the deterministic variant.
+ *
+ * Requires: MBEDTLS_HMAC_DRBG_C, MBEDTLS_ECDSA_C
+ *
+ * Comment this macro to disable deterministic ECDSA.
+ */
+#ifdef CONFIG_MBEDTLS_ECDSA_DETERMINISTIC
+#define MBEDTLS_ECDSA_DETERMINISTIC
+#else
+#undef MBEDTLS_ECDSA_DETERMINISTIC
+#endif
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+ *
+ * Enable the PSK based ciphersuite modes in SSL / TLS.
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ */
+#ifdef CONFIG_MBEDTLS_KEY_EXCHANGE_PSK
+#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+#else
+#undef MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+ *
+ * Enable the DHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ */
+#ifdef CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK
+#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+#else
+#undef MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+ *
+ * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ */
+#ifdef CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+#else
+#undef MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+ *
+ * Enable the RSA-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ *           MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ */
+#ifdef CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK
+#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+#else
+#undef MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+ *
+ * Enable the RSA-only based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ *           MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ */
+#ifdef CONFIG_MBEDTLS_KEY_EXCHANGE_RSA
+#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+#else
+#undef MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+ *
+ * Enable the DHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ *           MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ */
+#ifdef CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA
+#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+#else
+#undef MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+ *
+ * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ *           MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ */
+#ifdef CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+#else
+#undef MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+ *
+ * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C,
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ */
+#ifdef CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+#else
+#undef MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+ *
+ * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+#ifdef CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA
+#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+#else
+#undef MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+ *
+ * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+#ifdef CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA
+#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+#else
+#undef MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+ *
+ * Enable the ECJPAKE based ciphersuite modes in SSL / TLS.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Requires: MBEDTLS_ECJPAKE_C
+ *           MBEDTLS_SHA256_C
+ *           MBEDTLS_ECP_DP_SECP256R1_ENABLED
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8
+ */
+#ifdef CONFIG_MBEDTLS_KEY_EXCHANGE_ECJPAKE
+#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+#else
+#undef MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+#endif
+
+/**
+ * \def MBEDTLS_PK_PARSE_EC_EXTENDED
+ *
+ * Enhance support for reading EC keys using variants of SEC1 not allowed by
+ * RFC 5915 and RFC 5480.
+ *
+ * Currently this means parsing the SpecifiedECDomain choice of EC
+ * parameters (only known groups are supported, not arbitrary domains, to
+ * avoid validation issues).
+ *
+ * Disable if you only need to support RFC 5915 + 5480 key formats.
+ */
+#define MBEDTLS_PK_PARSE_EC_EXTENDED
+
+/**
+ * \def MBEDTLS_ERROR_STRERROR_DUMMY
+ *
+ * Enable a dummy error function to make use of mbedtls_strerror() in
+ * third party libraries easier when MBEDTLS_ERROR_C is disabled
+ * (no effect when MBEDTLS_ERROR_C is enabled).
+ *
+ * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're
+ * not using mbedtls_strerror() or error_strerror() in your application.
+ *
+ * Disable if you run into name conflicts and want to really remove the
+ * mbedtls_strerror()
+ */
+#define MBEDTLS_ERROR_STRERROR_DUMMY
+
+/**
+ * \def MBEDTLS_GENPRIME
+ *
+ * Enable the prime-number generation code.
+ *
+ * Requires: MBEDTLS_BIGNUM_C
+ */
+#define MBEDTLS_GENPRIME
+
+/**
+ * \def MBEDTLS_FS_IO
+ *
+ * Enable functions that use the filesystem.
+ */
+#define MBEDTLS_FS_IO
+
+/**
+ * \def MBEDTLS_NO_PLATFORM_ENTROPY
+ *
+ * Do not use built-in platform entropy functions.
+ * This is useful if your platform does not support
+ * standards like the /dev/urandom or Windows CryptoAPI.
+ *
+ * Uncomment this macro to disable the built-in platform entropy functions.
+ */
+#define MBEDTLS_NO_PLATFORM_ENTROPY
+
+/**
+ * \def MBEDTLS_PK_RSA_ALT_SUPPORT
+ *
+ * Support external private RSA keys (eg from a HSM) in the PK layer.
+ *
+ * Comment this macro to disable support for external private RSA keys.
+ */
+#define MBEDTLS_PK_RSA_ALT_SUPPORT
+
+/**
+ * \def MBEDTLS_PKCS1_V15
+ *
+ * Enable support for PKCS#1 v1.5 encoding.
+ *
+ * Requires: MBEDTLS_RSA_C
+ *
+ * This enables support for PKCS#1 v1.5 operations.
+ */
+#define MBEDTLS_PKCS1_V15
+
+/**
+ * \def MBEDTLS_PKCS1_V21
+ *
+ * Enable support for PKCS#1 v2.1 encoding.
+ *
+ * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C
+ *
+ * This enables support for RSAES-OAEP and RSASSA-PSS operations.
+ */
+#define MBEDTLS_PKCS1_V21
+
+/**
+ * \def MBEDTLS_SELF_TEST
+ *
+ * Enable the checkup functions (*_self_test).
+ */
+#define MBEDTLS_SELF_TEST
+
+/**
+ * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
+ *
+ * Enable sending of alert messages in case of encountered errors as per RFC.
+ * If you choose not to send the alert messages, mbed TLS can still communicate
+ * with other servers, only debugging of failures is harder.
+ *
+ * The advantage of not sending alert messages, is that no information is given
+ * about reasons for failures thus preventing adversaries of gaining intel.
+ *
+ * Enable sending of all alert messages
+ */
+#define MBEDTLS_SSL_ALL_ALERT_MESSAGES
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CONNECTION_ID
+ *
+ * Enable support for the DTLS Connection ID extension
+ * (version draft-ietf-tls-dtls-connection-id-05,
+ * https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05)
+ * which allows to identify DTLS connections across changes
+ * in the underlying transport.
+ *
+ * Setting this option enables the SSL APIs `mbedtls_ssl_set_cid()`,
+ * `mbedtls_ssl_get_peer_cid()` and `mbedtls_ssl_conf_cid()`.
+ * See the corresponding documentation for more information.
+ *
+ * \warning The Connection ID extension is still in draft state.
+ *          We make no stability promises for the availability
+ *          or the shape of the API controlled by this option.
+ *
+ * The maximum lengths of outgoing and incoming CIDs can be configured
+ * through the options
+ * - MBEDTLS_SSL_CID_OUT_LEN_MAX
+ * - MBEDTLS_SSL_CID_IN_LEN_MAX.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment to enable the Connection ID extension.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_DTLS_CONNECTION_ID
+#else
+#undef MBEDTLS_SSL_DTLS_CONNECTION_ID
+#endif
+
+/**
+ * \def MBEDTLS_SSL_CONTEXT_SERIALIZATION
+ *
+ * Enable serialization of the TLS context structures, through use of the
+ * functions mbedtls_ssl_context_save() and mbedtls_ssl_context_load().
+ *
+ * This pair of functions allows one side of a connection to serialize the
+ * context associated with the connection, then free or re-use that context
+ * while the serialized state is persisted elsewhere, and finally deserialize
+ * that state to a live context for resuming read/write operations on the
+ * connection. From a protocol perspective, the state of the connection is
+ * unaffected, in particular this is entirely transparent to the peer.
+ *
+ * Note: this is distinct from TLS session resumption, which is part of the
+ * protocol and fully visible by the peer. TLS session resumption enables
+ * establishing new connections associated to a saved session with shorter,
+ * lighter handshakes, while context serialization is a local optimization in
+ * handling a single, potentially long-lived connection.
+ *
+ * Enabling these APIs makes some SSL structures larger, as 64 extra bytes are
+ * saved after the handshake to allow for more efficient serialization, so if
+ * you don't need this feature you'll save RAM by disabling it.
+ *
+ * Comment to disable the context serialization APIs.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#define MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#else
+#undef MBEDTLS_SSL_CONTEXT_SERIALIZATION
+#endif
+
+/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
+ *
+ * Enable support for Encrypt-then-MAC, RFC 7366.
+ *
+ * This allows peers that both support it to use a more robust protection for
+ * ciphersuites using CBC, providing deep resistance against timing attacks
+ * on the padding or underlying cipher.
+ *
+ * This only affects CBC ciphersuites, and is useless if none is defined.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1    or
+ *           MBEDTLS_SSL_PROTO_TLS1_1  or
+ *           MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Encrypt-then-MAC
+ */
+#ifdef CONFIG_MBEDTLS_TLS_ENABLED
+#define MBEDTLS_SSL_ENCRYPT_THEN_MAC
+#else
+#undef MBEDTLS_SSL_ENCRYPT_THEN_MAC
+#endif
+
+/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+ *
+ * Enable support for RFC 7627: Session Hash and Extended Master Secret
+ * Extension.
+ *
+ * This was introduced as "the proper fix" to the Triple Handshake familiy of
+ * attacks, but it is recommended to always use it (even if you disable
+ * renegotiation), since it actually fixes a more fundamental issue in the
+ * original SSL/TLS design, and has implications beyond Triple Handshake.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1    or
+ *           MBEDTLS_SSL_PROTO_TLS1_1  or
+ *           MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Extended Master Secret.
+ */
+#ifdef CONFIG_MBEDTLS_TLS_ENABLED
+#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+#else
+#undef MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+#endif
+
+/**
+ * \def MBEDTLS_SSL_FALLBACK_SCSV
+ *
+ * Enable support for RFC 7507: Fallback Signaling Cipher Suite Value (SCSV)
+ * for Preventing Protocol Downgrade Attacks.
+ *
+ * For servers, it is recommended to always enable this, unless you support
+ * only one version of TLS, or know for sure that none of your clients
+ * implements a fallback strategy.
+ *
+ * For clients, you only need this if you're using a fallback strategy, which
+ * is not recommended in the first place, unless you absolutely need it to
+ * interoperate with buggy (version-intolerant) servers.
+ *
+ * Comment this macro to disable support for FALLBACK_SCSV
+ */
+#define MBEDTLS_SSL_FALLBACK_SCSV
+
+/**
+ * \def MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+ *
+ * This option controls the availability of the API mbedtls_ssl_get_peer_cert()
+ * giving access to the peer's certificate after completion of the handshake.
+ *
+ * Unless you need mbedtls_ssl_peer_cert() in your application, it is
+ * recommended to disable this option for reduced RAM usage.
+ *
+ * \note If this option is disabled, mbedtls_ssl_get_peer_cert() is still
+ *       defined, but always returns \c NULL.
+ *
+ * \note This option has no influence on the protection against the
+ *       triple handshake attack. Even if it is disabled, Mbed TLS will
+ *       still ensure that certificates do not change during renegotiation,
+ *       for exaple by keeping a hash of the peer's certificate.
+ *
+ * Comment this macro to disable storing the peer's certificate
+ * after the handshake.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#define MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#else
+#undef MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
+#endif
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1
+ *
+ * Enable support for TLS 1.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ *           MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.0
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_TLS1
+#define MBEDTLS_SSL_PROTO_TLS1
+#else
+#undef MBEDTLS_SSL_PROTO_TLS1
+#endif
+
+/**
+ * \def MBEDTLS_SSL_PROTO_SSL3
+ *
+ * Enable support for SSL 3.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ *           MBEDTLS_SHA1_C
+ *
+ * \deprecated This option is deprecated and will be removed in a future
+ *             version of Mbed TLS.
+ *
+ * Comment this macro to disable support for SSL 3.0
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_SSL3
+#define MBEDTLS_SSL_PROTO_SSL3
+#else
+#undef MBEDTLS_SSL_PROTO_SSL3
+#endif
+
+/**
+ * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING
+ *
+ * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0.
+ *
+ * This is a countermeasure to the BEAST attack, which also minimizes the risk
+ * of interoperability issues compared to sending 0-length records.
+ *
+ * Comment this macro to disable 1/n-1 record splitting.
+ */
+#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1)
+#define MBEDTLS_SSL_CBC_RECORD_SPLITTING
+#else
+#undef MBEDTLS_SSL_CBC_RECORD_SPLITTING
+#endif
+
+/**
+ * \def MBEDTLS_SSL_RENEGOTIATION
+ *
+ * Disable support for TLS renegotiation.
+ *
+ * The two main uses of renegotiation are (1) refresh keys on long-lived
+ * connections and (2) client authentication after the initial handshake.
+ * If you don't need renegotiation, it's probably better to disable it, since
+ * it has been associated with security issues in the past and is easy to
+ * misuse/misunderstand.
+ *
+ * Comment this to disable support for renegotiation.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_RENEGOTIATION
+#define MBEDTLS_SSL_RENEGOTIATION
+#else
+#undef MBEDTLS_SSL_RENEGOTIATION
+#endif
+
+/**
+ * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ *
+ * Enable support for RFC 6066 max_fragment_length extension in SSL.
+ *
+ * Comment this macro to disable support for the max_fragment_length extension
+ */
+#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_1
+ *
+ * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_MD5_C
+ *           MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.1 / DTLS 1.0
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_TLS1_1
+#define MBEDTLS_SSL_PROTO_TLS1_1
+#else
+#undef MBEDTLS_SSL_PROTO_TLS1_1
+#endif
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C
+ *           (Depends on ciphersuites)
+ *
+ * Comment this macro to disable support for TLS 1.2 / DTLS 1.2
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_TLS1_2
+#define MBEDTLS_SSL_PROTO_TLS1_2
+#else
+#undef MBEDTLS_SSL_PROTO_TLS1_2
+#endif
+
+/**
+ * \def MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Enable support for DTLS (all available versions).
+ *
+ * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0,
+ * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1_1
+ *        or MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for DTLS
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_DTLS
+#define MBEDTLS_SSL_PROTO_DTLS
+#else
+#undef MBEDTLS_SSL_PROTO_DTLS
+#endif
+
+/**
+ * \def MBEDTLS_SSL_ALPN
+ *
+ * Enable support for RFC 7301 Application Layer Protocol Negotiation.
+ *
+ * Comment this macro to disable support for ALPN.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_ALPN
+#define MBEDTLS_SSL_ALPN
+#else
+#undef MBEDTLS_SSL_ALPN
+#endif
+
+/**
+ * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY
+ *
+ * Enable support for the anti-replay mechanism in DTLS.
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *           MBEDTLS_SSL_PROTO_DTLS
+ *
+ * \warning Disabling this is often a security risk!
+ * See mbedtls_ssl_conf_dtls_anti_replay() for details.
+ *
+ * Comment this to disable anti-replay in DTLS.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_DTLS
+#define MBEDTLS_SSL_DTLS_ANTI_REPLAY
+#else
+#undef MBEDTLS_SSL_DTLS_ANTI_REPLAY
+#endif
+
+/**
+ * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Enable support for HelloVerifyRequest on DTLS servers.
+ *
+ * This feature is highly recommended to prevent DTLS servers being used as
+ * amplifiers in DoS attacks against other hosts. It should always be enabled
+ * unless you know for sure amplification cannot be a problem in the
+ * environment in which your server operates.
+ *
+ * \warning Disabling this can ba a security risk! (see above)
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Comment this to disable support for HelloVerifyRequest.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_DTLS
+#define MBEDTLS_SSL_DTLS_HELLO_VERIFY
+#else
+#undef MBEDTLS_SSL_DTLS_HELLO_VERIFY
+#endif
+
+/**
+ * \def MBEDTLS_SSL_DTLS_SRTP
+ *
+ * Enable support for negotiation of DTLS-SRTP (RFC 5764)
+ * through the use_srtp extension.
+ *
+ * \note This feature provides the minimum functionality required
+ * to negotiate the use of DTLS-SRTP and to allow the derivation of
+ * the associated SRTP packet protection key material.
+ * In particular, the SRTP packet protection itself, as well as the
+ * demultiplexing of RTP and DTLS packets at the datagram layer
+ * (see Section 5 of RFC 5764), are not handled by this feature.
+ * Instead, after successful completion of a handshake negotiating
+ * the use of DTLS-SRTP, the extended key exporter API
+ * mbedtls_ssl_conf_export_keys_ext_cb() should be used to implement
+ * the key exporter described in Section 4.2 of RFC 5764 and RFC 5705
+ * (this is implemented in the SSL example programs).
+ * The resulting key should then be passed to an SRTP stack.
+ *
+ * Setting this option enables the runtime API
+ * mbedtls_ssl_conf_dtls_srtp_protection_profiles()
+ * through which the supported DTLS-SRTP protection
+ * profiles can be configured. You must call this API at
+ * runtime if you wish to negotiate the use of DTLS-SRTP.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Uncomment this to enable support for use_srtp extension.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_DTLS
+#define MBEDTLS_SSL_DTLS_SRTP
+#else
+#undef MBEDTLS_SSL_DTLS_SRTP
+#endif
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+ *
+ * Enable server-side support for clients that reconnect from the same port.
+ *
+ * Some clients unexpectedly close the connection and try to reconnect using the
+ * same source port. This needs special support from the server to handle the
+ * new connection securely, as described in section 4.2.8 of RFC 6347. This
+ * flag enables that support.
+ *
+ * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Comment this to disable support for clients reusing the source port.
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_DTLS
+#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+#else
+#undef MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+#endif
+
+/**
+ * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+ *
+ * Enable support for a limit of records with bad MAC.
+ *
+ * See mbedtls_ssl_conf_dtls_badmac_limit().
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ */
+#ifdef CONFIG_MBEDTLS_SSL_PROTO_DTLS
+#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+#else
+#undef MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+#endif
+
+/**
+ * \def MBEDTLS_SSL_SESSION_TICKETS
+ *
+ * Enable support for RFC 5077 session tickets in SSL.
+ * Client-side, provides full support for session tickets (maintainance of a
+ * session store remains the responsibility of the application, though).
+ * Server-side, you also need to provide callbacks for writing and parsing
+ * tickets, including authenticated encryption and key management. Example
+ * callbacks are provided by MBEDTLS_SSL_TICKET_C.
+ *
+ * Comment this macro to disable support for SSL session tickets
+ */
+#ifdef CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS
+#define MBEDTLS_SSL_SESSION_TICKETS
+#else
+#undef MBEDTLS_SSL_SESSION_TICKETS
+#endif
+
+/**
+ * \def MBEDTLS_SSL_EXPORT_KEYS
+ *
+ * Enable support for exporting key block and master secret.
+ * This is required for certain users of TLS, e.g. EAP-TLS.
+ *
+ * Comment this macro to disable support for key export
+ */
+#define MBEDTLS_SSL_EXPORT_KEYS
+
+/**
+ * \def MBEDTLS_SSL_SERVER_NAME_INDICATION
+ *
+ * Enable support for RFC 6066 server name indication (SNI) in SSL.
+ *
+ * Requires: MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Comment this macro to disable support for server name indication in SSL
+ */
+#define MBEDTLS_SSL_SERVER_NAME_INDICATION
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC
+ *
+ * Enable support for RFC 6066 truncated HMAC in SSL.
+ *
+ * Comment this macro to disable support for truncated HMAC in SSL
+ */
+#define MBEDTLS_SSL_TRUNCATED_HMAC
+
+/**
+ * \def MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+ *
+ * When this option is enabled, the SSL buffer will be resized automatically
+ * based on the negotiated maximum fragment length in each direction.
+ *
+ * Requires: MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ */
+#if defined MBEDTLS_SSL_MAX_FRAGMENT_LENGTH && CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#define MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#else
+#undef MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH
+#endif
+
+/**
+ *
+ * \def MBEDTLS_VERSION_FEATURES
+ *
+ * Allow run-time checking of compile-time enabled features. Thus allowing users
+ * to check at run-time if the library is for instance compiled with threading
+ * support via mbedtls_version_check_feature().
+ *
+ * Requires: MBEDTLS_VERSION_C
+ *
+ * Comment this to disable run-time checking and save ROM space
+ */
+#define MBEDTLS_VERSION_FEATURES
+
+/**
+ * \def MBEDTLS_X509_CHECK_KEY_USAGE
+ *
+ * Enable verification of the keyUsage extension (CA and leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused
+ * (intermediate) CA and leaf certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip keyUsage checking for both CA and leaf certificates.
+ */
+#ifdef CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE
+#define MBEDTLS_X509_CHECK_KEY_USAGE
+#else
+#undef MBEDTLS_X509_CHECK_KEY_USAGE
+#endif
+
+/**
+ * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+ *
+ * Enable verification of the extendedKeyUsage extension (leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip extendedKeyUsage checking for certificates.
+ */
+#ifdef CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#else
+#undef MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#endif
+
+/**
+ * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
+ *
+ * Enable parsing and verification of X.509 certificates, CRLs and CSRS
+ * signed with RSASSA-PSS (aka PKCS#1 v2.1).
+ *
+ * Comment this macro to disallow using RSASSA-PSS in certificates.
+ */
+#define MBEDTLS_X509_RSASSA_PSS_SUPPORT
+
+
+/* \} name SECTION: mbed TLS feature support */
+
+/**
+ * \name SECTION: mbed TLS modules
+ *
+ * This section enables or disables entire modules in mbed TLS
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_AESNI_C
+ *
+ * Enable AES-NI support on x86-64.
+ *
+ * Module:  library/aesni.c
+ * Caller:  library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the AES-NI instructions on x86-64
+ */
+#define MBEDTLS_AESNI_C
+
+/**
+ * \def MBEDTLS_AES_C
+ *
+ * Enable the AES block cipher.
+ *
+ * Module:  library/aes.c
+ * Caller:  library/ssl_tls.c
+ *          library/pem.c
+ *          library/ctr_drbg.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ *
+ * PEM_PARSE uses AES for decrypting encrypted keys.
+ */
+#ifdef CONFIG_MBEDTLS_AES_C
+#define MBEDTLS_AES_C
+#else
+#undef MBEDTLS_AES_C
+#endif
+
+/**
+ * \def MBEDTLS_ASN1_PARSE_C
+ *
+ * Enable the generic ASN1 parser.
+ *
+ * Module:  library/asn1.c
+ * Caller:  library/x509.c
+ *          library/dhm.c
+ *          library/pkcs12.c
+ *          library/pkcs5.c
+ *          library/pkparse.c
+ */
+#define MBEDTLS_ASN1_PARSE_C
+
+/**
+ * \def MBEDTLS_ASN1_WRITE_C
+ *
+ * Enable the generic ASN1 writer.
+ *
+ * Module:  library/asn1write.c
+ * Caller:  library/ecdsa.c
+ *          library/pkwrite.c
+ *          library/x509_create.c
+ *          library/x509write_crt.c
+ *          library/mbedtls_x509write_csr.c
+ */
+#define MBEDTLS_ASN1_WRITE_C
+
+/**
+ * \def MBEDTLS_BASE64_C
+ *
+ * Enable the Base64 module.
+ *
+ * Module:  library/base64.c
+ * Caller:  library/pem.c
+ *
+ * This module is required for PEM support (required by X.509).
+ */
+#define MBEDTLS_BASE64_C
+
+/**
+ * \def MBEDTLS_BIGNUM_C
+ *
+ * Enable the multi-precision integer library.
+ *
+ * Module:  library/bignum.c
+ * Caller:  library/dhm.c
+ *          library/ecp.c
+ *          library/ecdsa.c
+ *          library/rsa.c
+ *          library/ssl_tls.c
+ *
+ * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support.
+ */
+#define MBEDTLS_BIGNUM_C
+
+/**
+ * \def MBEDTLS_BLOWFISH_C
+ *
+ * Enable the Blowfish block cipher.
+ *
+ * Module:  library/blowfish.c
+ */
+#ifdef CONFIG_MBEDTLS_BLOWFISH_C
+#define MBEDTLS_BLOWFISH_C
+#else
+#undef MBEDTLS_BLOWFISH_C
+#endif
+
+/**
+ * \def MBEDTLS_CAMELLIA_C
+ *
+ * Enable the Camellia block cipher.
+ *
+ * Module:  library/camellia.c
+ * Caller:  library/ssl_tls.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ *      MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ */
+#ifdef CONFIG_MBEDTLS_CAMELLIA_C
+#define MBEDTLS_CAMELLIA_C
+#else
+#undef MBEDTLS_CAMELLIA_C
+#endif
+
+/**
+ * \def MBEDTLS_CCM_C
+ *
+ * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher.
+ *
+ * Module:  library/ccm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-CCM ciphersuites, if other requisites are
+ * enabled as well.
+ */
+#ifdef CONFIG_MBEDTLS_CCM_C
+#define MBEDTLS_CCM_C
+#else
+#undef MBEDTLS_CCM_C
+#endif
+
+/**
+ * \def MBEDTLS_CERTS_C
+ *
+ * Enable the test certificates.
+ *
+ * Module:  library/certs.c
+ * Caller:
+ *
+ * This module is used for testing (ssl_client/server).
+ */
+#define MBEDTLS_CERTS_C
+
+/**
+ * \def MBEDTLS_CHACHA20_C
+ *
+ * Enable the ChaCha20 stream cipher.
+ *
+ * Module:  library/chacha20.c
+ */
+#ifdef CONFIG_MBEDTLS_CHACHA20_C
+#define MBEDTLS_CHACHA20_C
+#else
+#undef MBEDTLS_CHACHA20_C
+#endif
+
+/**
+ * \def MBEDTLS_CHACHAPOLY_C
+ *
+ * Enable the ChaCha20-Poly1305 AEAD algorithm.
+ *
+ * Module:  library/chachapoly.c
+ *
+ * This module requires: MBEDTLS_CHACHA20_C, MBEDTLS_POLY1305_C
+ */
+#ifdef CONFIG_MBEDTLS_CHACHAPOLY_C
+#define MBEDTLS_CHACHAPOLY_C
+#else
+#undef MBEDTLS_CHACHAPOLY_C
+#endif
+
+/**
+ * \def MBEDTLS_CIPHER_C
+ *
+ * Enable the generic cipher layer.
+ *
+ * Module:  library/cipher.c
+ * Caller:  library/ssl_tls.c
+ *
+ * Uncomment to enable generic cipher wrappers.
+ */
+#define MBEDTLS_CIPHER_C
+
+/**
+ * \def MBEDTLS_CTR_DRBG_C
+ *
+ * Enable the CTR_DRBG AES-256-based random generator.
+ *
+ * Module:  library/ctr_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * This module provides the CTR_DRBG AES-256 random number generator.
+ */
+#define MBEDTLS_CTR_DRBG_C
+
+/**
+ * \def MBEDTLS_DEBUG_C
+ *
+ * Enable the debug functions.
+ *
+ * Module:  library/debug.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *          library/ssl_tls.c
+ *
+ * This module provides debugging functions.
+ */
+#if CONFIG_MBEDTLS_DEBUG
+#define MBEDTLS_DEBUG_C
+#else
+#undef MBEDTLS_DEBUG_C
+#endif
+
+/**
+ * \def MBEDTLS_DES_C
+ *
+ * Enable the DES block cipher.
+ *
+ * Module:  library/des.c
+ * Caller:  library/pem.c
+ *          library/ssl_tls.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *      MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ *      MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ *
+ * PEM_PARSE uses DES/3DES for decrypting encrypted keys.
+ */
+#ifdef CONFIG_MBEDTLS_DES_C
+#define MBEDTLS_DES_C
+#else
+#undef MBEDTLS_DES_C
+#endif
+
+/**
+ * \def MBEDTLS_DHM_C
+ *
+ * Enable the Diffie-Hellman-Merkle module.
+ *
+ * Module:  library/dhm.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ *      DHE-RSA, DHE-PSK
+ */
+#define MBEDTLS_DHM_C
+
+/**
+ * \def MBEDTLS_ECDH_C
+ *
+ * Enable the elliptic curve Diffie-Hellman library.
+ *
+ * Module:  library/ecdh.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ *      ECDHE-ECDSA, ECDHE-RSA, DHE-PSK
+ *
+ * Requires: MBEDTLS_ECP_C
+ */
+#ifdef CONFIG_MBEDTLS_ECDH_C
+#define MBEDTLS_ECDH_C
+#else
+#undef MBEDTLS_ECDH_C
+#endif
+
+/**
+ * \def MBEDTLS_ECDSA_C
+ *
+ * Enable the elliptic curve DSA library.
+ *
+ * Module:  library/ecdsa.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ *      ECDHE-ECDSA
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C,
+ *           and at least one MBEDTLS_ECP_DP_XXX_ENABLED for a
+ *           short Weierstrass curve.
+ */
+#ifdef CONFIG_MBEDTLS_ECDSA_C
+#define MBEDTLS_ECDSA_C
+#else
+#undef MBEDTLS_ECDSA_C
+#endif
+
+/**
+ * \def MBEDTLS_ECJPAKE_C
+ *
+ * Enable the elliptic curve J-PAKE library.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Module:  library/ecjpake.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ *      ECJPAKE
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C
+ */
+#ifdef CONFIG_MBEDTLS_ECJPAKE_C
+#define MBEDTLS_ECJPAKE_C
+#else
+#undef MBEDTLS_ECJPAKE_C
+#endif
+
+/**
+ * \def MBEDTLS_ECP_C
+ *
+ * Enable the elliptic curve over GF(p) library.
+ *
+ * Module:  library/ecp.c
+ * Caller:  library/ecdh.c
+ *          library/ecdsa.c
+ *          library/ecjpake.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED
+ */
+#ifdef CONFIG_MBEDTLS_ECP_C
+#define MBEDTLS_ECP_C
+#else
+#undef MBEDTLS_ECP_C
+#endif
+
+/**
+ * \def MBEDTLS_ENTROPY_C
+ *
+ * Enable the platform-specific entropy code.
+ *
+ * Module:  library/entropy.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C
+ *
+ * This module provides a generic entropy pool
+ */
+#define MBEDTLS_ENTROPY_C
+
+/**
+ * \def MBEDTLS_ERROR_C
+ *
+ * Enable error code to error string conversion.
+ *
+ * Module:  library/error.c
+ * Caller:
+ *
+ * This module enables mbedtls_strerror().
+ */
+#define MBEDTLS_ERROR_C
+
+/**
+ * \def MBEDTLS_GCM_C
+ *
+ * Enable the Galois/Counter Mode (GCM).
+ *
+ * Module:  library/gcm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C or MBEDTLS_ARIA_C
+ *
+ * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
+ * requisites are enabled as well.
+ */
+#ifdef CONFIG_MBEDTLS_GCM_C
+#define MBEDTLS_GCM_C
+#else
+#undef MBEDTLS_GCM_C
+#endif
+
+/**
+ * \def MBEDTLS_HKDF_C
+ *
+ * Enable the HKDF algorithm (RFC 5869).
+ *
+ * Module:  library/hkdf.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module enables support for the Hashed Message Authentication Code
+ * (HMAC)-based key derivation function (HKDF).
+ */
+#ifdef CONFIG_MBEDTLS_HKDF_C
+#define MBEDTLS_HKDF_C
+#else
+#undef MBEDTLS_HKDF_C
+#endif
+
+/**
+ * \def MBEDTLS_HMAC_DRBG_C
+ *
+ * Enable the HMAC_DRBG random generator.
+ *
+ * Module:  library/hmac_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * Uncomment to enable the HMAC_DRBG random number geerator.
+ */
+#define MBEDTLS_HMAC_DRBG_C
+
+/**
+ * \def MBEDTLS_MD_C
+ *
+ * Enable the generic message digest layer.
+ *
+ * Module:  library/mbedtls_md.c
+ * Caller:
+ *
+ * Uncomment to enable generic message digest wrappers.
+ */
+#define MBEDTLS_MD_C
+
+/**
+ * \def MBEDTLS_MD5_C
+ *
+ * Enable the MD5 hash algorithm.
+ *
+ * Module:  library/mbedtls_md5.c
+ * Caller:  library/mbedtls_md.c
+ *          library/pem.c
+ *          library/ssl_tls.c
+ *
+ * This module is required for SSL/TLS and X.509.
+ * PEM_PARSE uses MD5 for decrypting encrypted keys.
+ */
+#define MBEDTLS_MD5_C
+
+/**
+ * \def MBEDTLS_NET_C
+ *
+ * Enable the TCP/IP networking routines.
+ *
+ * Module:  library/net.c
+ *
+ * This module provides TCP/IP networking routines.
+ */
+#ifdef MBEDTLS_NET_C
+#undef MBEDTLS_NET_C
+#endif
+
+/**
+ * \def MBEDTLS_OID_C
+ *
+ * Enable the OID database.
+ *
+ * Module:  library/oid.c
+ * Caller:  library/asn1write.c
+ *          library/pkcs5.c
+ *          library/pkparse.c
+ *          library/pkwrite.c
+ *          library/rsa.c
+ *          library/x509.c
+ *          library/x509_create.c
+ *          library/mbedtls_x509_crl.c
+ *          library/mbedtls_x509_crt.c
+ *          library/mbedtls_x509_csr.c
+ *          library/x509write_crt.c
+ *          library/mbedtls_x509write_csr.c
+ *
+ * This modules translates between OIDs and internal values.
+ */
+#define MBEDTLS_OID_C
+
+/**
+ * \def MBEDTLS_PADLOCK_C
+ *
+ * Enable VIA Padlock support on x86.
+ *
+ * Module:  library/padlock.c
+ * Caller:  library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the VIA PadLock on x86.
+ */
+#define MBEDTLS_PADLOCK_C
+
+/**
+ * \def MBEDTLS_PEM_PARSE_C
+ *
+ * Enable PEM decoding / parsing.
+ *
+ * Module:  library/pem.c
+ * Caller:  library/dhm.c
+ *          library/pkparse.c
+ *          library/mbedtls_x509_crl.c
+ *          library/mbedtls_x509_crt.c
+ *          library/mbedtls_x509_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for decoding / parsing PEM files.
+ */
+#ifdef CONFIG_MBEDTLS_PEM_PARSE_C
+#define MBEDTLS_PEM_PARSE_C
+#else
+#undef MBEDTLS_PEM_PARSE_C
+#endif
+
+/**
+ * \def MBEDTLS_PEM_WRITE_C
+ *
+ * Enable PEM encoding / writing.
+ *
+ * Module:  library/pem.c
+ * Caller:  library/pkwrite.c
+ *          library/x509write_crt.c
+ *          library/mbedtls_x509write_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for encoding / writing PEM files.
+ */
+#ifdef CONFIG_MBEDTLS_PEM_WRITE_C
+#define MBEDTLS_PEM_WRITE_C
+#else
+#undef MBEDTLS_PEM_WRITE_C
+#endif
+
+/**
+ * \def MBEDTLS_PK_C
+ *
+ * Enable the generic public (asymetric) key layer.
+ *
+ * Module:  library/pk.c
+ * Caller:  library/ssl_tls.c
+ *          library/ssl_cli.c
+ *          library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C
+ *
+ * Uncomment to enable generic public key wrappers.
+ */
+#define MBEDTLS_PK_C
+
+/**
+ * \def MBEDTLS_PK_PARSE_C
+ *
+ * Enable the generic public (asymetric) key parser.
+ *
+ * Module:  library/pkparse.c
+ * Caller:  library/mbedtls_x509_crt.c
+ *          library/mbedtls_x509_csr.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key parse functions.
+ */
+#define MBEDTLS_PK_PARSE_C
+
+/**
+ * \def MBEDTLS_PK_WRITE_C
+ *
+ * Enable the generic public (asymetric) key writer.
+ *
+ * Module:  library/pkwrite.c
+ * Caller:  library/x509write.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key write functions.
+ */
+#define MBEDTLS_PK_WRITE_C
+
+/**
+ * \def MBEDTLS_PKCS5_C
+ *
+ * Enable PKCS#5 functions.
+ *
+ * Module:  library/pkcs5.c
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the PKCS#5 functions.
+ */
+#define MBEDTLS_PKCS5_C
+
+/**
+ * \def MBEDTLS_PKCS12_C
+ *
+ * Enable PKCS#12 PBE functions.
+ * Adds algorithms for parsing PKCS#8 encrypted private keys
+ *
+ * Module:  library/pkcs12.c
+ * Caller:  library/pkparse.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * Can use:  MBEDTLS_ARC4_C
+ *
+ * This module enables PKCS#12 functions.
+ */
+#define MBEDTLS_PKCS12_C
+
+/**
+ * \def MBEDTLS_PLATFORM_C
+ *
+ * Enable the platform abstraction layer that allows you to re-assign
+ * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit().
+ *
+ * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT
+ * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned
+ * above to be specified at runtime or compile time respectively.
+ *
+ * \note This abstraction layer must be enabled on Windows (including MSYS2)
+ * as other module rely on it for a fixed snprintf implementation.
+ *
+ * Module:  library/platform.c
+ * Caller:  Most other .c files
+ *
+ * This module enables abstraction of common (libc) functions.
+ */
+#define MBEDTLS_PLATFORM_C
+
+/**
+ * \def MBEDTLS_POLY1305_C
+ *
+ * Enable the Poly1305 MAC algorithm.
+ *
+ * Module:  library/poly1305.c
+ * Caller:  library/chachapoly.c
+ */
+#ifdef CONFIG_MBEDTLS_POLY1305_C
+#define MBEDTLS_POLY1305_C
+#else
+#undef MBEDTLS_POLY1305_C
+#endif
+
+/**
+ * \def MBEDTLS_RIPEMD160_C
+ *
+ * Enable the RIPEMD-160 hash algorithm.
+ *
+ * Module:  library/mbedtls_ripemd160.c
+ * Caller:  library/mbedtls_md.c
+ *
+ */
+#ifdef CONFIG_MBEDTLS_RIPEMD160_C
+#define MBEDTLS_RIPEMD160_C
+#else
+#undef MBEDTLS_RIPEMD160_C
+#endif
+
+/**
+ * \def MBEDTLS_RSA_C
+ *
+ * Enable the RSA public-key cryptosystem.
+ *
+ * Module:  library/rsa.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *          library/ssl_tls.c
+ *          library/x509.c
+ *
+ * This module is used by the following key exchanges:
+ *      RSA, DHE-RSA, ECDHE-RSA, RSA-PSK
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C
+ */
+#define MBEDTLS_RSA_C
+
+/**
+ * \def MBEDTLS_SHA1_C
+ *
+ * Enable the SHA1 cryptographic hash algorithm.
+ *
+ * Module:  library/mbedtls_sha1.c
+ * Caller:  library/mbedtls_md.c
+ *          library/ssl_cli.c
+ *          library/ssl_srv.c
+ *          library/ssl_tls.c
+ *          library/x509write_crt.c
+ *
+ * This module is required for SSL/TLS and SHA1-signed certificates.
+ */
+#define MBEDTLS_SHA1_C
+
+/**
+ * \def MBEDTLS_SHA256_C
+ *
+ * Enable the SHA-224 and SHA-256 cryptographic hash algorithms.
+ *
+ * Module:  library/mbedtls_sha256.c
+ * Caller:  library/entropy.c
+ *          library/mbedtls_md.c
+ *          library/ssl_cli.c
+ *          library/ssl_srv.c
+ *          library/ssl_tls.c
+ *
+ * This module adds support for SHA-224 and SHA-256.
+ * This module is required for the SSL/TLS 1.2 PRF function.
+ */
+#define MBEDTLS_SHA256_C
+
+/**
+ * \def MBEDTLS_SHA512_C
+ *
+ * Enable the SHA-384 and SHA-512 cryptographic hash algorithms.
+ *
+ * Module:  library/mbedtls_sha512.c
+ * Caller:  library/entropy.c
+ *          library/mbedtls_md.c
+ *          library/ssl_cli.c
+ *          library/ssl_srv.c
+ *
+ * This module adds support for SHA-384 and SHA-512.
+ */
+#ifdef CONFIG_MBEDTLS_SHA512_C
+#define MBEDTLS_SHA512_C
+#else
+#undef MBEDTLS_SHA512_C
+#endif
+
+/**
+ * \def MBEDTLS_SSL_CACHE_C
+ *
+ * Enable simple SSL cache implementation.
+ *
+ * Module:  library/ssl_cache.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_CACHE_C
+ */
+#define MBEDTLS_SSL_CACHE_C
+
+/**
+ * \def MBEDTLS_SSL_COOKIE_C
+ *
+ * Enable basic implementation of DTLS cookies for hello verification.
+ *
+ * Module:  library/ssl_cookie.c
+ * Caller:
+ */
+#define MBEDTLS_SSL_COOKIE_C
+
+/**
+ * \def MBEDTLS_SSL_TICKET_C
+ *
+ * Enable an implementation of TLS server-side callbacks for session tickets.
+ *
+ * Module:  library/ssl_ticket.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_CIPHER_C
+ */
+#ifdef CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS
+#define MBEDTLS_SSL_TICKET_C
+#else
+#undef MBEDTLS_SSL_TICKET_C
+#endif
+
+/**
+ * \def MBEDTLS_SSL_CLI_C
+ *
+ * Enable the SSL/TLS client code.
+ *
+ * Module:  library/ssl_cli.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS client support.
+ */
+#ifdef CONFIG_MBEDTLS_TLS_CLIENT
+#define MBEDTLS_SSL_CLI_C
+#else
+#undef MBEDTLS_SSL_CLI_C
+#endif
+
+/**
+ * \def MBEDTLS_SSL_SRV_C
+ *
+ * Enable the SSL/TLS server code.
+ *
+ * Module:  library/ssl_srv.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS server support.
+ */
+#ifdef CONFIG_MBEDTLS_TLS_SERVER
+#define MBEDTLS_SSL_SRV_C
+#else
+#undef MBEDTLS_SSL_SRV_C
+#endif
+
+/**
+ * \def MBEDTLS_SSL_TLS_C
+ *
+ * Enable the generic SSL/TLS code.
+ *
+ * Module:  library/ssl_tls.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ *           and at least one of the MBEDTLS_SSL_PROTO_XXX defines
+ *
+ * This module is required for SSL/TLS.
+ */
+#ifdef CONFIG_MBEDTLS_TLS_ENABLED
+#define MBEDTLS_SSL_TLS_C
+#else
+#undef MBEDTLS_SSL_TLS_C
+#endif
+
+/**
+ * \def MBEDTLS_TIMING_C
+ *
+ * Enable the semi-portable timing interface.
+ *
+ * \note The provided implementation only works on POSIX/Unix (including Linux,
+ * BSD and OS X) and Windows. On other platforms, you can either disable that
+ * module and provide your own implementations of the callbacks needed by
+ * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide
+ * your own implementation of the whole module by setting
+ * \c MBEDTLS_TIMING_ALT in the current file.
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module:  library/timing.c
+ * Caller:  library/havege.c
+ *
+ * This module is used by the HAVEGE random number generator.
+ */
+#ifdef MBEDTLS_TIMING_C
+#undef MBEDTLS_TIMING_C
+#endif
+
+/**
+ * \def MBEDTLS_VERSION_C
+ *
+ * Enable run-time version information.
+ *
+ * Module:  library/version.c
+ *
+ * This module provides run-time version information.
+ */
+#define MBEDTLS_VERSION_C
+
+/**
+ * \def MBEDTLS_X509_USE_C
+ *
+ * Enable X.509 core for using certificates.
+ *
+ * Module:  library/x509.c
+ * Caller:  library/mbedtls_x509_crl.c
+ *          library/mbedtls_x509_crt.c
+ *          library/mbedtls_x509_csr.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C,
+ *           MBEDTLS_PK_PARSE_C
+ *
+ * This module is required for the X.509 parsing modules.
+ */
+#define MBEDTLS_X509_USE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Enable X.509 certificate parsing.
+ *
+ * Module:  library/mbedtls_x509_crt.c
+ * Caller:  library/ssl_cli.c
+ *          library/ssl_srv.c
+ *          library/ssl_tls.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 certificate parsing.
+ */
+#define MBEDTLS_X509_CRT_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CRL_PARSE_C
+ *
+ * Enable X.509 CRL parsing.
+ *
+ * Module:  library/mbedtls_x509_crl.c
+ * Caller:  library/mbedtls_x509_crt.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 CRL parsing.
+ */
+#ifdef CONFIG_MBEDTLS_X509_CRL_PARSE_C
+#define MBEDTLS_X509_CRL_PARSE_C
+#else
+#undef MBEDTLS_X509_CRL_PARSE_C
+#endif
+
+/**
+ * \def MBEDTLS_X509_CSR_PARSE_C
+ *
+ * Enable X.509 Certificate Signing Request (CSR) parsing.
+ *
+ * Module:  library/mbedtls_x509_csr.c
+ * Caller:  library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is used for reading X.509 certificate request.
+ */
+#ifdef CONFIG_MBEDTLS_X509_CSR_PARSE_C
+#define MBEDTLS_X509_CSR_PARSE_C
+#else
+#undef MBEDTLS_X509_CSR_PARSE_C
+#endif
+
+/**
+ * \def MBEDTLS_X509_CREATE_C
+ *
+ * Enable X.509 core for creating certificates.
+ *
+ * Module:  library/x509_create.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C
+ *
+ * This module is the basis for creating X.509 certificates and CSRs.
+ */
+#define MBEDTLS_X509_CREATE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_WRITE_C
+ *
+ * Enable creating X.509 certificates.
+ *
+ * Module:  library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate creation.
+ */
+#define MBEDTLS_X509_CRT_WRITE_C
+
+/**
+ * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+ *
+  * Alow the X509 parser to not break-off when parsing an X509 certificate
+ * and encountering an unknown critical extension.
+ *
+ * Module:  library/x509_crt.c
+ *
+ * Requires: MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This module is supports loading of certificates with extensions that
+ * may not be supported by mbedtls.
+ */
+#ifdef CONFIG_MBEDTLS_ALLOW_UNSUPPORTED_CRITICAL_EXT
+#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+#else
+#undef MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+#endif
+
+/**
+ * \def MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+ *
+ * If set, this enables the X.509 API `mbedtls_x509_crt_verify_with_ca_cb()`
+ * and the SSL API `mbedtls_ssl_conf_ca_cb()` which allow users to configure
+ * the set of trusted certificates through a callback instead of a linked
+ * list.
+ *
+ * This is useful for example in environments where a large number of trusted
+ * certificates is present and storing them in a linked list isn't efficient
+ * enough, or when the set of trusted certificates changes frequently.
+ *
+ * See the documentation of `mbedtls_x509_crt_verify_with_ca_cb()` and
+ * `mbedtls_ssl_conf_ca_cb()` for more information.
+ *
+ * Uncomment to enable trusted certificate callbacks.
+ */
+#ifdef CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK
+#define MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+#else
+#undef MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
+#endif
+
+/**
+ * \def MBEDTLS_X509_CSR_WRITE_C
+ *
+ * Enable creating X.509 Certificate Signing Requests (CSR).
+ *
+ * Module:  library/x509_csr_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate request writing.
+ */
+#define MBEDTLS_X509_CSR_WRITE_C
+
+/**
+ * \def MBEDTLS_XTEA_C
+ *
+ * Enable the XTEA block cipher.
+ *
+ * Module:  library/xtea.c
+ * Caller:
+ */
+#ifdef CONFIG_MBEDTLS_XTEA_C
+#define MBEDTLS_XTEA_C
+#else
+#undef MBEDTLS_XTEA_C
+#endif
+
+/* \} name SECTION: mbed TLS modules */
+
+/**
+ * \name SECTION: Module configuration options
+ *
+ * This section allows for the setting of module specific sizes and
+ * configuration options. The default values are already present in the
+ * relevant header files and should suffice for the regular use cases.
+ *
+ * Our advice is to enable options and change their values here
+ * only if you have a good reason and know the consequences.
+ *
+ * Please check the respective header file for documentation on these
+ * parameters (to prevent duplicate documentation).
+ * \{
+ */
+
+/* SSL options */
+#ifndef CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN
+
+#define MBEDTLS_SSL_MAX_CONTENT_LEN             CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN /**< Maxium fragment length in bytes, determines the size of each of the two internal I/O buffers */
+
+#else
+
+/** \def MBEDTLS_SSL_IN_CONTENT_LEN
+ *
+ * Maximum incoming fragment length in bytes.
+ *
+ * Uncomment to set the size of the inward TLS buffer independently of the
+ * outward buffer.
+ */
+#define MBEDTLS_SSL_IN_CONTENT_LEN              CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN
+
+/** \def MBEDTLS_SSL_CID_IN_LEN_MAX
+ *
+ * The maximum length of CIDs used for incoming DTLS messages.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_IN_LEN_MAX              CONFIG_MBEDTLS_SSL_CID_IN_LEN_MAX
+#else
+#undef MBEDTLS_SSL_CID_IN_LEN_MAX
+#endif
+
+
+/** \def MBEDTLS_SSL_CID_OUT_LEN_MAX
+ *
+ * The maximum length of CIDs used for outgoing DTLS messages.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_OUT_LEN_MAX            CONFIG_MBEDTLS_SSL_CID_OUT_LEN_MAX
+#else
+#undef MBEDTLS_SSL_CID_OUT_LEN_MAX
+#endif
+
+/** \def MBEDTLS_SSL_CID_PADDING_GRANULARITY
+ *
+ * This option controls the use of record plaintext padding
+ * when using the Connection ID extension in DTLS 1.2.
+ *
+ * The padding will always be chosen so that the length of the
+ * padded plaintext is a multiple of the value of this option.
+ *
+ * Note: A value of \c 1 means that no padding will be used
+ *       for outgoing records.
+ *
+ * Note: On systems lacking division instructions,
+ *       a power of two should be preferred.
+ *
+ */
+#ifdef CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID
+#define MBEDTLS_SSL_CID_PADDING_GRANULARITY    CONFIG_MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#else
+#undef MBEDTLS_SSL_CID_PADDING_GRANULARITY
+#endif
+
+
+/** \def MBEDTLS_SSL_OUT_CONTENT_LEN
+ *
+ * Maximum outgoing fragment length in bytes.
+ *
+ * Uncomment to set the size of the outward TLS buffer independently of the
+ * inward buffer.
+ *
+ * It is possible to save RAM by setting a smaller outward buffer, while keeping
+ * the default inward 16384 byte buffer to conform to the TLS specification.
+ *
+ * The minimum required outward buffer size is determined by the handshake
+ * protocol's usage. Handshaking will fail if the outward buffer is too small.
+ * The specific size requirement depends on the configured ciphers and any
+ * certificate data which is sent during the handshake.
+ *
+ * For absolute minimum RAM usage, it's best to enable
+ * MBEDTLS_SSL_MAX_FRAGMENT_LENGTH and reduce MBEDTLS_SSL_MAX_CONTENT_LEN. This
+ * reduces both incoming and outgoing buffer sizes. However this is only
+ * guaranteed if the other end of the connection also supports the TLS
+ * max_fragment_len extension. Otherwise the connection may fail.
+ */
+#define MBEDTLS_SSL_OUT_CONTENT_LEN             CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN
+
+#endif /* !CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN */
+
+/**
+ * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
+ * signature and ciphersuite selection. Without this build-time option, SHA-1
+ * support must be activated explicitly through mbedtls_ssl_conf_sig_hashes.
+ * The use of SHA-1 in TLS <= 1.1 and in HMAC-SHA-1 is always allowed by
+ * default. At the time of writing, there is no practical attack on the use
+ * of SHA-1 in handshake signatures, hence this option is turned on by default
+ * for compatibility with existing peers.
+ *
+ * \warning   SHA-1 is considered a weak message digest and its use constitutes
+ *            a security risk. If possible, we recommend avoiding dependencies
+ *            on it, and considering stronger message digests instead.
+ */
+#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
+
+/**
+ * \def MBEDTLS_THREADING_C
+ *
+ * Enable the threading abstraction layer.
+ * By default mbed TLS assumes it is used in a non-threaded environment or that
+ * contexts are not shared between threads. If you do intend to use contexts
+ * between threads, you will need to enable this layer to prevent race
+ * conditions. See also our Knowledge Base article about threading:
+ * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
+ *
+ * Module:  library/threading.c
+ *
+ * This allows different threading implementations (self-implemented or
+ * provided).
+ *
+ * You will have to enable either MBEDTLS_THREADING_ALT or
+ * MBEDTLS_THREADING_PTHREAD.
+ *
+ * Enable this layer to allow use of mutexes within mbed TLS
+ */
+#ifdef CONFIG_MBEDTLS_THREADING_C
+#define MBEDTLS_THREADING_C
+#else
+#undef MBEDTLS_THREADING_C
+#endif
+
+/**
+ * \def MBEDTLS_THREADING_ALT
+ *
+ * Provide your own alternate threading implementation.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to allow your own alternate threading implementation.
+ */
+#ifdef CONFIG_MBEDTLS_THREADING_ALT
+#define MBEDTLS_THREADING_ALT
+#else
+#undef MBEDTLS_THREADING_ALT
+#endif
+
+/**
+ * \def MBEDTLS_THREADING_PTHREAD
+ *
+ * Enable the pthread wrapper layer for the threading layer.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to enable pthread mutexes.
+ */
+#ifdef CONFIG_MBEDTLS_THREADING_PTHREAD
+#define MBEDTLS_THREADING_PTHREAD
+#else
+#undef MBEDTLS_THREADING_PTHREAD
+#endif
+
+/**
+ * \def MBEDTLS_NIST_KW_C
+ *
+ * Enable AES key wrapping as per NIST
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * Uncomment this to enable aes key wrap.
+ */
+#ifdef CONFIG_MBEDTLS_NIST_KW_C
+#define MBEDTLS_NIST_KW_C
+#else
+#undef MBEDTLS_NIST_KW_C
+#endif
+
+/* \} name SECTION: Module configuration options */
+
+#if defined(TARGET_LIKE_MBED)
+#include "mbedtls/target_config.h"
+#endif
+
+/*
+ * Allow user to override any previous default.
+ *
+ * Use two macro names for that, as:
+ * - with yotta the prefix YOTTA_CFG_ is forced
+ * - without yotta is looks weird to have a YOTTA prefix.
+ */
+#if defined(YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE)
+#include YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE
+#elif defined(MBEDTLS_USER_CONFIG_FILE)
+#include MBEDTLS_USER_CONFIG_FILE
+#endif
+
+#include "mbedtls/check_config.h"
+
+#endif /* MBEDTLS_CONFIG_H */
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/mbedtls/esp_debug.h b/tools/sdk/esp32s3/include/mbedtls/port/include/mbedtls/esp_debug.h
new file mode 100644
index 00000000000..ecd4688f9c2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/mbedtls/esp_debug.h
@@ -0,0 +1,59 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ESP_DEBUG_H_
+#define _ESP_DEBUG_H_
+
+#include "mbedtls/ssl.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "sdkconfig.h"
+#ifdef CONFIG_MBEDTLS_DEBUG
+
+/** @brief Enable mbedTLS debug logging via the esp_log mechanism.
+ *
+ * mbedTLS internal debugging is filtered from a specified mbedTLS
+ * threshold level to esp_log level at runtime:
+ *
+ * - 1 - Warning
+ * - 2 - Info
+ * - 3 - Debug
+ * - 4 - Verbose
+ *
+ * (Note that mbedTLS debug thresholds are not always consistently used.)
+ *
+ * This function will set the esp log level for "mbedtls" to the specified mbedTLS
+ * threshold level that matches. However, the overall max ESP log level must be set high
+ * enough in menuconfig, or some messages may be filtered at compile time.
+ *
+ * @param conf mbedtls_ssl_config structure
+ * @param mbedTLS debug threshold, 0-4. Messages are filtered at runtime.
+ */
+void mbedtls_esp_enable_debug_log(mbedtls_ssl_config *conf, int threshold);
+
+/** @brief Disable mbedTLS debug logging via the esp_log mechanism.
+ *
+ */
+void mbedtls_esp_disable_debug_log(mbedtls_ssl_config *conf);
+
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_DEBUG_H__ */
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/md/esp_md.h b/tools/sdk/esp32s3/include/mbedtls/port/include/md/esp_md.h
new file mode 100644
index 00000000000..e61b6c4e477
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/md/esp_md.h
@@ -0,0 +1,154 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+
+#pragma once
+
+#include "esp_rom_md5.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct MD5Context mbedtls_md5_context;
+
+/**
+ * \brief          Initialize MD5 context
+ *
+ * \param ctx      MD5 context to be initialized
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_init_ret( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          Clear MD5 context
+ *
+ * \param ctx      MD5 context to be cleared
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_free( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          Clone (the state of) an MD5 context
+ *
+ * \param dst      The destination context
+ * \param src      The context to be cloned
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_clone( mbedtls_md5_context *dst, const mbedtls_md5_context *src );
+
+/**
+ * \brief          MD5 process buffer
+ *
+ * \param ctx      MD5 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_update_ret( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen );
+
+/**
+ * \brief          MD5 final digest
+ *
+ * \param ctx      MD5 context
+ * \param output   MD5 checksum result
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_finish_ret( mbedtls_md5_context *ctx, unsigned char output[16] );
+
+/**
+ * \brief          MD5 process data block (internal use only)
+ *
+ * \param ctx      MD5 context
+ * \param data     buffer holding one block of data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_process( mbedtls_md5_context *ctx, const unsigned char data[64] );
+
+/**
+ * \brief          MD5 context setup
+ *
+ * \deprecated     Superseded by mbedtls_md5_starts_ret() in 2.7.0
+ *
+ * \param ctx      context to be initialized
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_init( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          MD5 process buffer
+ *
+ * \deprecated     Superseded by mbedtls_md5_update_ret() in 2.7.0
+ *
+ * \param ctx      MD5 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_update( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen );
+
+/**
+ * \brief          MD5 final digest
+ *
+ * \deprecated     Superseded by mbedtls_md5_finish_ret() in 2.7.0
+ *
+ * \param ctx      MD5 context
+ * \param output   MD5 checksum result
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_finish( mbedtls_md5_context *ctx, unsigned char output[16] );
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/md5_alt.h b/tools/sdk/esp32s3/include/mbedtls/port/include/md5_alt.h
new file mode 100644
index 00000000000..4777d047f1c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/md5_alt.h
@@ -0,0 +1,50 @@
+/**
+ * \file md5_alt.h
+ *
+ * \brief MD5 block cipher
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *
+ */
+#ifndef MD5_ALT_H
+#define MD5_ALT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_MD5_ALT)
+#include "md/esp_md.h"
+
+#define mbedtls_md5_init                        esp_md5_init
+#define mbedtls_md5_update                      esp_md5_update
+#define mbedtls_md5_finish                      esp_md5_finish
+#define mbedtls_md5_starts_ret                  esp_md5_init_ret
+#define mbedtls_md5_update_ret                  esp_md5_update_ret
+#define mbedtls_md5_finish_ret                  esp_md5_finish_ret
+
+#define mbedtls_md5_free                        esp_md5_free
+#define mbedtls_md5_clone                       esp_md5_clone
+#define mbedtls_internal_md5_process            esp_md5_process
+
+#endif /* MBEDTLS_MD5_ALT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/rsa_sign_alt.h b/tools/sdk/esp32s3/include/mbedtls/port/include/rsa_sign_alt.h
new file mode 100644
index 00000000000..aacac95563e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/rsa_sign_alt.h
@@ -0,0 +1,36 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifndef _RSA_SIGN_ALT_H_
+#define _RSA_SIGN_ALT_H_
+
+#ifdef __cpluscplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_ESP_TLS_USE_DS_PERIPHERAL
+#include "esp_ds/esp_rsa_sign_alt.h"
+#else
+
+#error "DS configuration flags not activated, please enable required menuconfig flags"
+
+#endif
+
+#ifdef __cpluscplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/sha/sha_dma.h b/tools/sdk/esp32s3/include/mbedtls/port/include/sha/sha_dma.h
new file mode 100644
index 00000000000..af12f23a598
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/sha/sha_dma.h
@@ -0,0 +1,159 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "hal/sha_types.h"
+
+/** @brief Low-level support functions for the hardware SHA engine using DMA
+ *
+ * @note If you're looking for a SHA API to use, try mbedtls component
+ * mbedtls/shaXX.h. That API supports hardware acceleration.
+ *
+ * The API in this header provides some building blocks for implementing a
+ * full SHA API such as the one in mbedtls, and also a basic SHA function esp_sha().
+ *
+ * Some technical details about the hardware SHA engine:
+ *
+ * - The crypto DMA is shared between the SHA and AES engine, it is not
+ *   possible for them to run calcalutions in parallel.
+ *
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/** @brief Calculate SHA1 or SHA2 sum of some data, using hardware SHA engine
+ *
+ * @note For more versatile SHA calculations, where data doesn't need
+ * to be passed all at once, try the mbedTLS mbedtls/shaX.h APIs.
+ *
+ * @note It is not necessary to lock any SHA hardware before calling
+ * this function, thread safety is managed internally.
+ *
+ * @param sha_type SHA algorithm to use.
+ *
+ * @param input Input data buffer.
+ *
+ * @param ilen Length of input data in bytes.
+ *
+ * @param output Buffer for output SHA digest. Output is 20 bytes for
+ * sha_type SHA1, 32 bytes for sha_type SHA2_256, 48 bytes for
+ * sha_type SHA2_384, 64 bytes for sha_type SHA2_512.
+ */
+void esp_sha(esp_sha_type sha_type, const unsigned char *input, size_t ilen, unsigned char *output);
+
+/** @brief Execute SHA block operation using DMA
+ *
+ * @note This is a piece of a SHA algorithm, rather than an entire SHA
+ * algorithm.
+ *
+ * @note Call esp_sha_aquire_hardware() before calling this
+ * function.
+ *
+ * @param sha_type SHA algorithm to use.
+ *
+ * @param input Pointer to the input data. Block size is
+ * determined by algorithm (SHA1/SHA2_256 = 64 bytes,
+ * SHA2_384/SHA2_512 = 128 bytes)
+ *
+ * @param ilen length of input data should be multiple of block length.
+ *
+ * @param buf Pointer to blocks of data that will be prepended
+ * to data_block before hashing. Useful when there is two sources of
+ * data that need to be efficiently calculated in a single SHA DMA
+ * operation.
+ *
+ * @param buf_len length of buf data should be multiple of block length.
+ * Should not be longer than the maximum amount of bytes in a single block
+ * (128 bytes)
+ *
+ * @param is_first_block If this parameter is true, the SHA state will
+ * be initialised (with the initial state of the given SHA algorithm)
+ * before the block is calculated. If false, the existing state of the
+ * SHA engine will be used.
+ *
+ * @param t The number of bits for the SHA512/t hash function, with
+ * output truncated to t bits. Used for calculating the inital hash.
+ * t is any positive integer between 1 and 512, except 384.
+ *
+ * @return 0 if successful
+ */
+int esp_sha_dma(esp_sha_type sha_type, const void *input, uint32_t ilen,
+                const void *buf, uint32_t buf_len, bool is_first_block);
+
+/**
+ * @brief Read out the current state of the SHA digest
+ *
+ * @note This is a piece of a SHA algorithm, rather than an entire SHA algorithm.
+ *
+ * @note Call esp_sha_aquire_hardware() before calling this
+ * function.
+ *
+ * If the SHA suffix padding block has been executed already, the
+ * value that is read is the SHA digest.
+ * Otherwise, the value that is read is an interim SHA state.
+ *
+ * @param sha_type SHA algorithm in use.
+ * @param digest_state Pointer to a memory buffer to hold the SHA state. Size
+ * is 20 bytes (SHA1), 32 bytes (SHA2_256), or 64 bytes (SHA2_384, SHA2_512).
+ */
+void esp_sha_read_digest_state(esp_sha_type sha_type, void *digest_state);
+
+/**
+ * @brief Set the current state of the SHA digest
+ *
+ * @note Call esp_sha_aquire_hardware() before calling this
+ * function.
+ *
+ * When resuming a
+ *
+ * @param sha_type SHA algorithm in use.
+ * @param digest_state
+ */
+void esp_sha_write_digest_state(esp_sha_type sha_type, void *digest_state);
+
+
+/**
+ * @brief Enables the SHA and crypto DMA peripheral and takes the
+ * locks for both of them.
+ */
+void esp_sha_acquire_hardware(void);
+
+/**
+ * @brief Disables the SHA and crypto DMA peripheral and releases the
+ * locks.
+ */
+void esp_sha_release_hardware(void);
+
+/**
+ * @brief Sets the initial hash value for SHA512/t.
+ *
+ * @note Is generated according to the algorithm described in the TRM,
+ * chapter SHA-Accelerator
+ *
+ * @note The engine must be locked until the value is used for an operation
+ * or read out. Else you risk another operation overwriting it.
+ *
+ * @param t
+ *
+ * @return 0 if successful
+ */
+int esp_sha_512_t_init_hash(uint16_t t);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/sha/sha_parallel_engine.h b/tools/sdk/esp32s3/include/mbedtls/port/include/sha/sha_parallel_engine.h
new file mode 100644
index 00000000000..cf6f0607da5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/sha/sha_parallel_engine.h
@@ -0,0 +1,205 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "hal/sha_types.h"
+#include "esp_types.h"
+
+/** @brief Low-level support functions for the hardware SHA engine
+ *
+ * @note If you're looking for a SHA API to use, try mbedtls component
+ * mbedtls/shaXX.h. That API supports hardware acceleration.
+ *
+ * The API in this header provides some building blocks for implementing a
+ * full SHA API such as the one in mbedtls, and also a basic SHA function esp_sha().
+ *
+ * Some technical details about the hardware SHA engine:
+ *
+ * - SHA accelerator engine calculates one digest at a time, per SHA
+ *   algorithm type. It initialises and maintains the digest state
+ *   internally. It is possible to read out an in-progress SHA digest
+ *   state, but it is not possible to restore a SHA digest state
+ *   into the engine.
+ *
+ * - The memory block SHA_TEXT_BASE is shared between all SHA digest
+ *   engines, so all engines must be idle before this memory block is
+ *   modified.
+ *
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/** @brief Calculate SHA1 or SHA2 sum of some data, using hardware SHA engine
+ *
+ * @note For more versatile SHA calculations, where data doesn't need
+ * to be passed all at once, try the mbedTLS mbedtls/shaX.h APIs. The
+ * hardware-accelerated mbedTLS implementation is also faster when
+ * hashing large amounts of data.
+ *
+ * @note It is not necessary to lock any SHA hardware before calling
+ * this function, thread safety is managed internally.
+ *
+ * @note If a TLS connection is open then this function may block
+ * indefinitely waiting for a SHA engine to become available. Use the
+ * mbedTLS SHA API to avoid this problem.
+ *
+ * @param sha_type SHA algorithm to use.
+ *
+ * @param input Input data buffer.
+ *
+ * @param ilen Length of input data in bytes.
+ *
+ * @param output Buffer for output SHA digest. Output is 20 bytes for
+ * sha_type SHA1, 32 bytes for sha_type SHA2_256, 48 bytes for
+ * sha_type SHA2_384, 64 bytes for sha_type SHA2_512.
+ */
+void esp_sha(esp_sha_type sha_type, const unsigned char *input, size_t ilen, unsigned char *output);
+
+/* @brief Begin to execute a single SHA block operation
+ *
+ * @note This is a piece of a SHA algorithm, rather than an entire SHA
+ * algorithm.
+ *
+ * @note Call esp_sha_try_lock_engine() before calling this
+ * function. Do not call esp_sha_lock_memory_block() beforehand, this
+ * is done inside the function.
+ *
+ * @param sha_type SHA algorithm to use.
+ *
+ * @param data_block Pointer to block of data. Block size is
+ * determined by algorithm (SHA1/SHA2_256 = 64 bytes,
+ * SHA2_384/SHA2_512 = 128 bytes)
+ *
+ * @param is_first_block If this parameter is true, the SHA state will
+ * be initialised (with the initial state of the given SHA algorithm)
+ * before the block is calculated. If false, the existing state of the
+ * SHA engine will be used.
+ *
+ * @return As a performance optimisation, this function returns before
+ * the SHA block operation is complete. Both this function and
+ * esp_sha_read_state() will automatically wait for any previous
+ * operation to complete before they begin. If using the SHA registers
+ * directly in another way, call esp_sha_wait_idle() after calling this
+ * function but before accessing the SHA registers.
+ */
+void esp_sha_block(esp_sha_type sha_type, const void *data_block, bool is_first_block);
+
+/** @brief Read out the current state of the SHA digest loaded in the engine.
+ *
+ * @note This is a piece of a SHA algorithm, rather than an entire SHA algorithm.
+ *
+ * @note Call esp_sha_try_lock_engine() before calling this
+ * function. Do not call esp_sha_lock_memory_block() beforehand, this
+ * is done inside the function.
+ *
+ * If the SHA suffix padding block has been executed already, the
+ * value that is read is the SHA digest (in big endian
+ * format). Otherwise, the value that is read is an interim SHA state.
+ *
+ * @note If sha_type is SHA2_384, only 48 bytes of state will be read.
+ * This is enough for the final SHA2_384 digest, but if you want the
+ * interim SHA-384 state (to continue digesting) then pass SHA2_512 instead.
+ *
+ * @param sha_type SHA algorithm in use.
+ *
+ * @param state Pointer to a memory buffer to hold the SHA state. Size
+ * is 20 bytes (SHA1), 32 bytes (SHA2_256), 48 bytes (SHA2_384) or 64 bytes (SHA2_512).
+ *
+ */
+void esp_sha_read_digest_state(esp_sha_type sha_type, void *digest_state);
+
+/**
+ * @brief Obtain exclusive access to a particular SHA engine
+ *
+ * @param sha_type Type of SHA engine to use.
+ *
+ * Blocks until engine is available. Note: Can block indefinitely
+ * while a TLS connection is open, suggest using
+ * esp_sha_try_lock_engine() and failing over to software SHA.
+ */
+void esp_sha_lock_engine(esp_sha_type sha_type);
+
+/**
+ * @brief Try and obtain exclusive access to a particular SHA engine
+ *
+ * @param sha_type Type of SHA engine to use.
+ *
+ * @return Returns true if the SHA engine is locked for exclusive
+ * use. Call esp_sha_unlock_sha_engine() when done.  Returns false if
+ * the SHA engine is already in use, caller should use software SHA
+ * algorithm for this digest.
+ */
+bool esp_sha_try_lock_engine(esp_sha_type sha_type);
+
+/**
+ * @brief Unlock an engine previously locked with esp_sha_lock_engine() or esp_sha_try_lock_engine()
+ *
+ * @param sha_type Type of engine to release.
+ */
+void esp_sha_unlock_engine(esp_sha_type sha_type);
+
+/**
+ * @brief Acquire exclusive access to the SHA shared memory block at SHA_TEXT_BASE
+ *
+ * This memory block is shared across all the SHA algorithm types.
+ *
+ * Caller should have already locked a SHA engine before calling this function.
+ *
+ * Note that it is possible to obtain exclusive access to the memory block even
+ * while it is in use by the SHA engine. Caller should use esp_sha_wait_idle()
+ * to ensure the SHA engine is not reading from the memory block in hardware.
+ *
+ * @note This function enters a critical section. Do not block while holding this lock.
+ *
+ * @note You do not need to lock the memory block before calling esp_sha_block() or esp_sha_read_digest_state(), these functions handle memory block locking internally.
+ *
+ * Call esp_sha_unlock_memory_block() when done.
+ */
+void esp_sha_lock_memory_block(void);
+
+/**
+ * @brief Release exclusive access to the SHA register memory block at SHA_TEXT_BASE
+ *
+ * Caller should have already locked a SHA engine before calling this function.
+ *
+ * This function releases the critical section entered by esp_sha_lock_memory_block().
+ *
+ * Call following esp_sha_lock_memory_block().
+ */
+void esp_sha_unlock_memory_block(void);
+
+/** @brief Wait for the SHA engine to finish any current operation
+ *
+ * @note This function does not ensure exclusive access to any SHA
+ * engine. Caller should use esp_sha_try_lock_engine() and
+ * esp_sha_lock_memory_block() as required.
+ *
+ * @note Functions declared in this header file wait for SHA engine
+ * completion automatically, so you don't need to use this API for
+ * these. However if accessing SHA registers directly, you will need
+ * to call this before accessing SHA registers if using the
+ * esp_sha_block() function.
+ *
+ * @note This function busy-waits, so wastes CPU resources.
+ * Best to delay calling until you are about to need it.
+ *
+ */
+void esp_sha_wait_idle(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/sha1_alt.h b/tools/sdk/esp32s3/include/mbedtls/port/include/sha1_alt.h
new file mode 100644
index 00000000000..f97c0e49b8f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/sha1_alt.h
@@ -0,0 +1,80 @@
+/*
+ *  SHA-1 implementation with hardware ESP32 support added.
+ *  Uses mbedTLS software implementation for failover when concurrent
+ *  SHA operations are in use.
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  Additions Copyright (C) 2016, Espressif Systems (Shanghai) PTE LTD
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ */
+#ifndef _SHA1_ALT_H_
+#define _SHA1_ALT_H_
+
+#if defined(MBEDTLS_SHA1_ALT)
+
+#include "hal/sha_types.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_SHA_SUPPORT_PARALLEL_ENG
+
+typedef enum {
+    ESP_MBEDTLS_SHA1_UNUSED, /* first block hasn't been processed yet */
+    ESP_MBEDTLS_SHA1_HARDWARE, /* using hardware SHA engine */
+    ESP_MBEDTLS_SHA1_SOFTWARE, /* using software SHA */
+} esp_mbedtls_sha1_mode;
+
+/**
+ * \brief          SHA-1 context structure
+ */
+typedef struct {
+    uint32_t total[2];          /*!< number of bytes processed  */
+    uint32_t state[5];          /*!< intermediate digest state  */
+    unsigned char buffer[64];   /*!< data block being processed */
+    esp_mbedtls_sha1_mode mode;
+} mbedtls_sha1_context;
+
+#elif SOC_SHA_SUPPORT_DMA
+
+typedef enum {
+    ESP_SHA1_STATE_INIT,
+    ESP_SHA1_STATE_IN_PROCESS
+} esp_sha1_state;
+
+/**
+ * \brief          SHA-1 context structure
+ */
+typedef struct {
+    uint32_t total[2];          /*!< number of bytes processed  */
+    uint32_t state[5];          /*!< intermediate digest state  */
+    unsigned char buffer[64];   /*!< data block being processed */
+    int first_block;            /*!< if first then true else false */
+    esp_sha_type mode;
+    esp_sha1_state sha_state;
+} mbedtls_sha1_context;
+
+#endif
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/sha256_alt.h b/tools/sdk/esp32s3/include/mbedtls/port/include/sha256_alt.h
new file mode 100644
index 00000000000..5d3b6135c57
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/sha256_alt.h
@@ -0,0 +1,79 @@
+/*
+ *  SHA-256 implementation with hardware ESP32 support added.
+ *  Uses mbedTLS software implementation for failover when concurrent
+ *  SHA operations are in use.
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  Additions Copyright (C) 2016, Espressif Systems (Shanghai) PTE LTD
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ */
+#ifndef _SHA256_ALT_H_
+#define _SHA256_ALT_H_
+
+#if defined(MBEDTLS_SHA256_ALT)
+
+#include "hal/sha_types.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_SHA_SUPPORT_PARALLEL_ENG
+typedef enum {
+    ESP_MBEDTLS_SHA256_UNUSED, /* first block hasn't been processed yet */
+    ESP_MBEDTLS_SHA256_HARDWARE, /* using hardware SHA engine */
+    ESP_MBEDTLS_SHA256_SOFTWARE, /* using software SHA */
+} esp_mbedtls_sha256_mode;
+
+/**
+ * \brief          SHA-256 context structure
+ */
+typedef struct {
+    uint32_t total[2];          /*!< number of bytes processed  */
+    uint32_t state[8];          /*!< intermediate digest state  */
+    unsigned char buffer[64];   /*!< data block being processed */
+    int is224;                  /*!< 0 => SHA-256, else SHA-224 */
+    esp_mbedtls_sha256_mode mode;
+} mbedtls_sha256_context;
+
+#elif SOC_SHA_SUPPORT_DMA
+typedef enum {
+    ESP_SHA256_STATE_INIT,
+    ESP_SHA256_STATE_IN_PROCESS
+} esp_sha256_state;
+
+/**
+ * \brief          SHA-256 context structure
+ */
+typedef struct {
+    uint32_t total[2];          /*!< number of bytes processed  */
+    uint32_t state[8];          /*!< intermediate digest state  */
+    unsigned char buffer[64];   /*!< data block being processed */
+    int first_block;           /*!< if first then true, else false */
+    esp_sha_type mode;
+    esp_sha256_state sha_state;
+} mbedtls_sha256_context;
+
+#endif
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/mbedtls/port/include/sha512_alt.h b/tools/sdk/esp32s3/include/mbedtls/port/include/sha512_alt.h
new file mode 100644
index 00000000000..9472abceffc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mbedtls/port/include/sha512_alt.h
@@ -0,0 +1,97 @@
+/*
+ *  SHA-512 implementation with hardware ESP32 support added.
+ *  Uses mbedTLS software implementation for failover when concurrent
+ *  SHA operations are in use.
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  Additions Copyright (C) 2016, Espressif Systems (Shanghai) PTE LTD
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ */
+#ifndef _SHA512_ALT_H_
+#define _SHA512_ALT_H_
+
+#if defined(MBEDTLS_SHA512_ALT)
+
+#include "hal/sha_types.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#if SOC_SHA_SUPPORT_PARALLEL_ENG
+
+typedef enum {
+    ESP_MBEDTLS_SHA512_UNUSED, /* first block hasn't been processed yet */
+    ESP_MBEDTLS_SHA512_HARDWARE, /* using hardware SHA engine */
+    ESP_MBEDTLS_SHA512_SOFTWARE, /* using software SHA */
+} esp_mbedtls_sha512_mode;
+
+/**
+ * \brief          SHA-512 context structure
+ */
+typedef struct {
+    uint64_t total[2];          /*!< number of bytes processed  */
+    uint64_t state[8];          /*!< intermediate digest state  */
+    unsigned char buffer[128];  /*!< data block being processed */
+    int is384;                  /*!< 0 => SHA-512, else SHA-384 */
+    esp_mbedtls_sha512_mode mode;
+} mbedtls_sha512_context;
+
+#elif SOC_SHA_SUPPORT_DMA
+
+typedef enum {
+    ESP_SHA512_STATE_INIT,
+    ESP_SHA512_STATE_IN_PROCESS
+} esp_sha512_state;
+
+/**
+ * \brief          SHA-512 context structure
+ */
+typedef struct {
+    uint64_t total[2];          /*!< number of bytes processed  */
+    uint64_t state[8];          /*!< intermediate digest state  */
+    unsigned char buffer[128];  /*!< data block being processed */
+    int first_block;
+    esp_sha_type mode;
+    uint32_t t_val;             /*!< t_val for 512/t mode */
+    esp_sha512_state sha_state;
+} mbedtls_sha512_context;
+
+/**
+ * @brief Sets the specfic algorithm for SHA512
+ *
+ * @param ctx The mbedtls sha512 context
+ *
+ * @param type The mode, used for setting SHA2_512224 and SHA2_512256:
+ *
+ */
+void esp_sha512_set_mode(mbedtls_sha512_context *ctx, esp_sha_type type);
+
+/* For SHA512/t mode the intial hash value will depend on t */
+void esp_sha512_set_t( mbedtls_sha512_context *ctx, uint16_t t_val);
+
+
+#endif
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/mdns/include/mdns.h b/tools/sdk/esp32s3/include/mdns/include/mdns.h
new file mode 100644
index 00000000000..35c8d538abc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mdns/include/mdns.h
@@ -0,0 +1,686 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef ESP_MDNS_H_
+#define ESP_MDNS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <esp_netif.h>
+#include "esp_event.h"
+
+#define MDNS_TYPE_A                 0x0001
+#define MDNS_TYPE_PTR               0x000C
+#define MDNS_TYPE_TXT               0x0010
+#define MDNS_TYPE_AAAA              0x001C
+#define MDNS_TYPE_SRV               0x0021
+#define MDNS_TYPE_OPT               0x0029
+#define MDNS_TYPE_NSEC              0x002F
+#define MDNS_TYPE_ANY               0x00FF
+
+/**
+ * @brief   Asynchronous query handle
+ */
+typedef struct mdns_search_once_s mdns_search_once_t;
+
+/**
+ * @brief   mDNS enum to specify the ip_protocol type
+ */
+typedef enum {
+    MDNS_IP_PROTOCOL_V4,
+    MDNS_IP_PROTOCOL_V6,
+    MDNS_IP_PROTOCOL_MAX
+} mdns_ip_protocol_t;
+
+/**
+ * @brief   mDNS basic text item structure
+ *          Used in mdns_service_add()
+ */
+typedef struct {
+    const char * key;                       /*!< item key name */
+    const char * value;                     /*!< item value string */
+} mdns_txt_item_t;
+
+/**
+ * @brief   mDNS query linked list IP item
+ */
+typedef struct mdns_ip_addr_s {
+    esp_ip_addr_t addr;                     /*!< IP address */
+    struct mdns_ip_addr_s * next;           /*!< next IP, or NULL for the last IP in the list */
+} mdns_ip_addr_t;
+
+typedef enum mdns_if_internal {
+    MDNS_IF_STA = 0,
+    MDNS_IF_AP = 1,
+    MDNS_IF_ETH = 2,
+    MDNS_IF_MAX
+} mdns_if_t;
+
+/**
+ * @brief   mDNS query result structure
+ */
+typedef struct mdns_result_s {
+    struct mdns_result_s * next;            /*!< next result, or NULL for the last result in the list */
+
+    mdns_if_t tcpip_if;                     /*!< interface index */
+    uint32_t ttl;                           /*!< time to live */
+
+    mdns_ip_protocol_t ip_protocol;         /*!< ip_protocol type of the interface (v4/v6) */
+    // PTR
+    char * instance_name;                   /*!< instance name */
+    char * service_type;                    /*!< service type */
+    char * proto;                           /*!< srevice protocol */
+    // SRV
+    char * hostname;                        /*!< hostname */
+    uint16_t port;                          /*!< service port */
+    // TXT
+    mdns_txt_item_t * txt;                  /*!< txt record */
+    uint8_t *txt_value_len;                 /*!< array of txt value len of each record */
+    size_t txt_count;                       /*!< number of txt items */
+    // A and AAAA
+    mdns_ip_addr_t * addr;                  /*!< linked list of IP addresses found */
+} mdns_result_t;
+
+typedef void (*mdns_query_notify_t)(mdns_search_once_t *search);
+
+/**
+ * @brief  Initialize mDNS on given interface
+ *
+ * @return
+ *     - ESP_OK on success
+ *     - ESP_ERR_INVALID_STATE when failed to register event handler
+ *     - ESP_ERR_NO_MEM on memory error
+ *     - ESP_FAIL when failed to start mdns task
+ */
+esp_err_t mdns_init(void);
+
+/**
+ * @brief  Stop and free mDNS server
+ *
+ */
+void mdns_free(void);
+
+/**
+ * @brief  Set the hostname for mDNS server
+ *         required if you want to advertise services
+ *
+ * @param  hostname     Hostname to set
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_hostname_set(const char * hostname);
+
+/**
+ * @brief  Adds a hostname and address to be delegated
+ *         A/AAAA queries will be replied for the hostname and
+ *         services can be added to this host.
+ *
+ * @param  hostname     Hostname to add
+ * @param  address_list The IP address list of the host
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_STATE mDNS is not running
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM memory error
+ *
+ */
+esp_err_t mdns_delegate_hostname_add(const char * hostname, const mdns_ip_addr_t *address_list);
+
+/**
+ * @brief  Remove a delegated hostname
+ *         All the services added to this host will also be removed.
+ *
+ * @param  hostname     Hostname to remove
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_STATE mDNS is not running
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM memory error
+ *
+ */
+esp_err_t mdns_delegate_hostname_remove(const char * hostname);
+
+/**
+ * @brief  Query whether a hostname has been added
+ *
+ * @param  hostname     Hostname to query
+ *
+ * @return
+ *     - true   The hostname has been added.
+ *     - false  The hostname has not been added.
+ *
+ */
+bool mdns_hostname_exists(const char * hostname);
+
+/**
+ * @brief  Set the default instance name for mDNS server
+ *
+ * @param  instance_name     Instance name to set
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_instance_name_set(const char * instance_name);
+
+/**
+ * @brief  Add service to mDNS server
+ *
+ * @note The value length of txt items will be automatically decided by strlen
+ *
+ * @param  instance_name    instance name to set. If NULL,
+ *                          global instance name or hostname will be used.
+ *                          Note that MDNS_MULTIPLE_INSTANCE config option
+ *                          needs to be enabled for adding multiple instances
+ *                          with the same instance type.
+ * @param  service_type     service type (_http, _ftp, etc)
+ * @param  proto            service protocol (_tcp, _udp)
+ * @param  port             service port
+ * @param  txt              string array of TXT data (eg. {{"var","val"},{"other","2"}})
+ * @param  num_items        number of items in TXT data
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM memory error
+ *     - ESP_FAIL failed to add service
+ */
+esp_err_t mdns_service_add(const char * instance_name, const char * service_type, const char * proto, uint16_t port, mdns_txt_item_t txt[], size_t num_items);
+
+/**
+ * @brief  Add service to mDNS server with a delegated hostname
+ *
+ * @note The value length of txt items will be automatically decided by strlen
+ *
+ * @param  instance_name    instance name to set. If NULL,
+ *                          global instance name or hostname will be used
+ *                          Note that MDNS_MULTIPLE_INSTANCE config option
+ *                          needs to be enabled for adding multiple instances
+ *                          with the same instance type.
+ * @param  service_type     service type (_http, _ftp, etc)
+ * @param  proto            service protocol (_tcp, _udp)
+ * @param  hostname         service hostname. If NULL, local hostname will be used.
+ * @param  port             service port
+ * @param  txt              string array of TXT data (eg. {{"var","val"},{"other","2"}})
+ * @param  num_items        number of items in TXT data
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NO_MEM memory error
+ *     - ESP_FAIL failed to add service
+ */
+esp_err_t mdns_service_add_for_host(const char * instance_name, const char * service_type, const char * proto,
+                                    const char * hostname, uint16_t port, mdns_txt_item_t txt[], size_t num_items);
+
+/**
+ * @brief  Check whether a service has been added.
+ *
+ * @param  service_type     service type (_http, _ftp, etc)
+ * @param  proto            service protocol (_tcp, _udp)
+ * @param  hostname         service hostname. If NULL, checks for the local hostname.
+ *
+ * @return
+ *     - true   Correspondding service has been added.
+ *     - false  Service not found.
+ */
+bool mdns_service_exists(const char * service_type, const char * proto, const char * hostname);
+
+
+/**
+ * @brief  Check whether a service has been added.
+ *
+ * @param  instance         instance name
+ * @param  service_type     service type (_http, _ftp, etc)
+ * @param  proto            service protocol (_tcp, _udp)
+ * @param  hostname         service hostname. If NULL, checks for the local hostname.
+ *
+ * @return
+ *     - true   Correspondding service has been added.
+ *     - false  Service not found.
+ */
+bool mdns_service_exists_with_instance(const char *instance, const char *service_type, const char *proto,
+                                       const char *hostname);
+
+/**
+ * @brief  Remove service from mDNS server
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_remove(const char * service_type, const char * proto);
+
+/**
+ * @brief  Remove service from mDNS server with hostname
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ * @param  hostname     service hostname. If NULL, local hostname will be used.
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_remove_for_host(const char * service_type, const char * proto, const char *hostname);
+
+/**
+ * @brief  Set instance name for service
+ *
+ * @param  service_type     service type (_http, _ftp, etc)
+ * @param  proto            service protocol (_tcp, _udp)
+ * @param  instance_name    instance name to set
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_instance_name_set(const char * service_type, const char * proto, const char * instance_name);
+
+/**
+ * @brief  Set instance name for service with hostname
+ *
+ * @param  service_type     service type (_http, _ftp, etc)
+ * @param  proto            service protocol (_tcp, _udp)
+ * @param  hostname         service hostname. If NULL, local hostname will be used.
+ * @param  instance_name    instance name to set
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_instance_name_set_for_host(const char * service_type, const char * proto, const char * hostname,
+                                                  const char * instance_name);
+
+/**
+ * @brief  Set service port
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ * @param  port         service port
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_port_set(const char * service_type, const char * proto, uint16_t port);
+
+
+/**
+ * @brief  Set service port with hostname
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ * @param  hostname     service hostname. If NULL, local hostname will be used.
+ * @param  port         service port
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_port_set_for_host(const char * service_type, const char * proto, const char * hostname,
+                                         uint16_t port);
+
+/**
+ * @brief  Replace all TXT items for service
+ *
+ * @note The value length of txt items will be automatically decided by strlen
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ * @param  txt          array of TXT data (eg. {{"var","val"},{"other","2"}})
+ * @param  num_items    number of items in TXT data
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_txt_set(const char * service_type, const char * proto, mdns_txt_item_t txt[], uint8_t num_items);
+
+/**
+ * @brief  Replace all TXT items for service with hostname
+ *
+ * @note The value length of txt items will be automatically decided by strlen
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ * @param  hostname     service hostname. If NULL, local hostname will be used.
+ * @param  txt          array of TXT data (eg. {{"var","val"},{"other","2"}})
+ * @param  num_items    number of items in TXT data
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_txt_set_for_host(const char * service_type, const char * proto, const char * hostname,
+                                        mdns_txt_item_t txt[], uint8_t num_items);
+
+/**
+ * @brief  Set/Add TXT item for service TXT record
+ *
+ * @note The value length will be automatically decided by strlen
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ * @param  key          the key that you want to add/update
+ * @param  value        the new value of the key
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_txt_item_set(const char * service_type, const char * proto, const char * key, const char * value);
+
+/**
+ * @brief  Set/Add TXT item for service TXT record
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ * @param  key          the key that you want to add/update
+ * @param  value        the new value of the key
+ * @param  value_len    the length of the value
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_txt_item_set_with_explicit_value_len(const char *service_type, const char *proto,
+                                                            const char *key, const char *value, uint8_t value_len);
+
+/**
+ * @brief  Set/Add TXT item for service TXT record with hostname
+ *
+ * @note The value length will be automatically decided by strlen
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ * @param  hostname     service hostname. If NULL, local hostname will be used.
+ * @param  key          the key that you want to add/update
+ * @param  value        the new value of the key
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_txt_item_set_for_host(const char * service_type, const char * proto, const char * hostname,
+                                             const char * key, const char * value);
+
+/**
+ * @brief  Set/Add TXT item for service TXT record with hostname and txt value length
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ * @param  hostname     service hostname. If NULL, local hostname will be used.
+ * @param  key          the key that you want to add/update
+ * @param  value        the new value of the key
+ * @param  value_len    the length of the value
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_txt_item_set_for_host_with_explicit_value_len(const char *service_type, const char *proto,
+                                                                     const char *hostname, const char *key,
+                                                                     const char *value, uint8_t value_len);
+
+/**
+ * @brief  Remove TXT item for service TXT record
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ * @param  key          the key that you want to remove
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_txt_item_remove(const char * service_type, const char * proto, const char * key);
+
+/**
+ * @brief  Remove TXT item for service TXT record with hostname
+ *
+ * @param  service_type service type (_http, _ftp, etc)
+ * @param  proto        service protocol (_tcp, _udp)
+ * @param  hostname     service hostname. If NULL, local hostname will be used.
+ * @param  key          the key that you want to remove
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ *     - ESP_ERR_NOT_FOUND Service not found
+ *     - ESP_ERR_NO_MEM memory error
+ */
+esp_err_t mdns_service_txt_item_remove_for_host(const char * service_type, const char * proto, const char * hostname,
+                                                const char * key);
+
+/**
+ * @brief  Remove and free all services from mDNS server
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t mdns_service_remove_all(void);
+
+/**
+ * @brief Deletes the finished query. Call this only after the search has ended!
+ *
+ * @param search pointer to search object
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_STATE  search has not finished
+ *     - ESP_ERR_INVALID_ARG    pointer to search object is NULL
+ */
+esp_err_t mdns_query_async_delete(mdns_search_once_t* search);
+
+/**
+ * @brief Get results from search pointer. Results available as a pointer to the output parameter.
+ *        Pointer to search object has to be deleted via `mdns_query_async_delete` once the query has finished.
+ *        The results although have to be freed manually.
+ *
+ * @param search pointer to search object
+ * @param timeout time in milliseconds to wait for answers
+ * @param results pointer to the results of the query
+ *
+ * @return
+ *      True if search has finished before or at timeout
+ *      False if search timeout is over
+ */
+bool mdns_query_async_get_results(mdns_search_once_t* search, uint32_t timeout, mdns_result_t ** results);
+
+/**
+ * @brief  Query mDNS for host or service asynchronousely.
+ *         Search has to be tested for progress and deleted manually!
+ *
+ * @param  name         service instance or host name (NULL for PTR queries)
+ * @param  service_type service type (_http, _arduino, _ftp etc.) (NULL for host queries)
+ * @param  proto        service protocol (_tcp, _udp, etc.) (NULL for host queries)
+ * @param  type         type of query (MDNS_TYPE_*)
+ * @param  timeout      time in milliseconds during which mDNS query is active
+ * @param  max_results  maximum results to be collected
+ * @param  notifier     Notification function to be called when the result is ready, can be NULL
+ *
+ * @return mdns_search_once_s pointer to new search object if query initiated successfully.
+ *         NULL otherwise.
+ */
+mdns_search_once_t *mdns_query_async_new(const char *name, const char *service_type, const char *proto, uint16_t type,
+                                         uint32_t timeout, size_t max_results, mdns_query_notify_t notifier);
+
+/**
+ * @brief  Query mDNS for host or service
+ *         All following query methods are derived from this one
+ *
+ * @param  name         service instance or host name (NULL for PTR queries)
+ * @param  service_type service type (_http, _arduino, _ftp etc.) (NULL for host queries)
+ * @param  proto        service protocol (_tcp, _udp, etc.) (NULL for host queries)
+ * @param  type         type of query (MDNS_TYPE_*)
+ * @param  timeout      time in milliseconds to wait for answers.
+ * @param  max_results  maximum results to be collected
+ * @param  results      pointer to the results of the query
+ *                      results must be freed using mdns_query_results_free below
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_STATE  mDNS is not running
+ *     - ESP_ERR_NO_MEM         memory error
+ *     - ESP_ERR_INVALID_ARG    timeout was not given
+ */
+esp_err_t mdns_query(const char * name, const char * service_type, const char * proto, uint16_t type, uint32_t timeout, size_t max_results, mdns_result_t ** results);
+
+/**
+ * @brief  Free query results
+ *
+ * @param  results      linked list of results to be freed
+ */
+void mdns_query_results_free(mdns_result_t * results);
+
+/**
+ * @brief  Query mDNS for service
+ *
+ * @param  service_type service type (_http, _arduino, _ftp etc.)
+ * @param  proto        service protocol (_tcp, _udp, etc.)
+ * @param  timeout      time in milliseconds to wait for answer.
+ * @param  max_results  maximum results to be collected
+ * @param  results      pointer to the results of the query
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_STATE  mDNS is not running
+ *     - ESP_ERR_NO_MEM         memory error
+ *     - ESP_ERR_INVALID_ARG    parameter error
+ */
+esp_err_t mdns_query_ptr(const char * service_type, const char * proto, uint32_t timeout, size_t max_results, mdns_result_t ** results);
+
+/**
+ * @brief  Query mDNS for SRV record
+ *
+ * @param  instance_name    service instance name
+ * @param  service_type     service type (_http, _arduino, _ftp etc.)
+ * @param  proto            service protocol (_tcp, _udp, etc.)
+ * @param  timeout          time in milliseconds to wait for answer.
+ * @param  result           pointer to the result of the query
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_STATE  mDNS is not running
+ *     - ESP_ERR_NO_MEM         memory error
+ *     - ESP_ERR_INVALID_ARG    parameter error
+ */
+esp_err_t mdns_query_srv(const char * instance_name, const char * service_type, const char * proto, uint32_t timeout, mdns_result_t ** result);
+
+/**
+ * @brief  Query mDNS for TXT record
+ *
+ * @param  instance_name    service instance name
+ * @param  service_type     service type (_http, _arduino, _ftp etc.)
+ * @param  proto            service protocol (_tcp, _udp, etc.)
+ * @param  timeout          time in milliseconds to wait for answer.
+ * @param  result           pointer to the result of the query
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_STATE  mDNS is not running
+ *     - ESP_ERR_NO_MEM         memory error
+ *     - ESP_ERR_INVALID_ARG    parameter error
+ */
+esp_err_t mdns_query_txt(const char * instance_name, const char * service_type, const char * proto, uint32_t timeout, mdns_result_t ** result);
+
+/**
+ * @brief  Query mDNS for A record
+ *
+ * @param  host_name    host name to look for
+ * @param  timeout      time in milliseconds to wait for answer.
+ * @param  addr         pointer to the resulting IP4 address
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_STATE  mDNS is not running
+ *     - ESP_ERR_NO_MEM         memory error
+ *     - ESP_ERR_INVALID_ARG    parameter error
+ */
+esp_err_t mdns_query_a(const char * host_name, uint32_t timeout, esp_ip4_addr_t * addr);
+
+#if CONFIG_LWIP_IPV6
+/**
+ * @brief  Query mDNS for A record
+ *
+ * Please note that hostname must not contain domain name, as mDNS uses '.local' domain.
+ *
+ * @param  host_name    host name to look for
+ * @param  timeout      time in milliseconds to wait for answer. If 0, max_results needs to be defined
+ * @param  addr         pointer to the resulting IP6 address
+ *
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_STATE  mDNS is not running
+ *     - ESP_ERR_NO_MEM         memory error
+ *     - ESP_ERR_INVALID_ARG    parameter error
+ */
+esp_err_t mdns_query_aaaa(const char * host_name, uint32_t timeout, esp_ip6_addr_t * addr);
+#endif
+
+/**
+ * @brief   System event handler
+ *          This method controls the service state on all active interfaces and applications are required
+ *          to call it from the system event handler for normal operation of mDNS service.
+ *
+ * Please note that hostname must not contain domain name, as mDNS uses '.local' domain.
+ *
+ * @param  ctx          The system event context
+ * @param  event        The system event
+ */
+esp_err_t mdns_handle_system_event(void *ctx, system_event_t *event) __attribute__((deprecated));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ESP_MDNS_H_ */
diff --git a/tools/sdk/esp32s3/include/mdns/include/mdns_console.h b/tools/sdk/esp32s3/include/mdns/include/mdns_console.h
new file mode 100644
index 00000000000..059e03de5a3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mdns/include/mdns_console.h
@@ -0,0 +1,22 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _MDNS_CONSOLE_H_
+#define _MDNS_CONSOLE_H_
+
+/**
+ * @brief  Register MDNS functions with the console component
+ */
+void mdns_console_register(void);
+
+#endif /* _MDNS_CONSOLE_H_ */
diff --git a/tools/sdk/esp32s3/include/mqtt/esp-mqtt/include/mqtt_client.h b/tools/sdk/esp32s3/include/mqtt/esp-mqtt/include/mqtt_client.h
new file mode 100644
index 00000000000..475581b50db
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mqtt/esp-mqtt/include/mqtt_client.h
@@ -0,0 +1,411 @@
+/*
+ * This file is subject to the terms and conditions defined in
+ * file 'LICENSE', which is part of this source code package.
+ * Tuan PM <tuanpm at live dot com>
+ */
+
+#ifndef _MQTT_CLIENT_H_
+#define _MQTT_CLIENT_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+#include "esp_err.h"
+#include "esp_event.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef ESP_EVENT_DECLARE_BASE
+// Define event loop types if macros not available
+typedef void *esp_event_loop_handle_t;
+typedef void *esp_event_handler_t;
+#endif
+
+typedef struct esp_mqtt_client *esp_mqtt_client_handle_t;
+
+/**
+ * @brief MQTT event types.
+ *
+ * User event handler receives context data in `esp_mqtt_event_t` structure with
+ *  - `user_context` - user data from `esp_mqtt_client_config_t`
+ *  - `client` - mqtt client handle
+ *  - various other data depending on event type
+ *
+ */
+typedef enum {
+    MQTT_EVENT_ANY = -1,
+    MQTT_EVENT_ERROR = 0,          /*!< on error event, additional context: connection return code, error handle from esp_tls (if supported) */
+    MQTT_EVENT_CONNECTED,          /*!< connected event, additional context: session_present flag */
+    MQTT_EVENT_DISCONNECTED,       /*!< disconnected event */
+    MQTT_EVENT_SUBSCRIBED,         /*!< subscribed event, additional context: msg_id */
+    MQTT_EVENT_UNSUBSCRIBED,       /*!< unsubscribed event */
+    MQTT_EVENT_PUBLISHED,          /*!< published event, additional context:  msg_id */
+    MQTT_EVENT_DATA,               /*!< data event, additional context:
+                                        - msg_id               message id
+                                        - topic                pointer to the received topic
+                                        - topic_len            length of the topic
+                                        - data                 pointer to the received data
+                                        - data_len             length of the data for this event
+                                        - current_data_offset  offset of the current data for this event
+                                        - total_data_len       total length of the data received
+                                        - retain               retain flag of the message
+                                        Note: Multiple MQTT_EVENT_DATA could be fired for one message, if it is
+                                        longer than internal buffer. In that case only first event contains topic
+                                        pointer and length, other contain data only with current data length
+                                        and current data offset updating.
+                                         */
+    MQTT_EVENT_BEFORE_CONNECT,     /*!< The event occurs before connecting */
+    MQTT_EVENT_DELETED,            /*!< Notification on delete of one message from the internal outbox,
+                                        if the message couldn't have been sent and acknowledged before expiring
+                                        defined in OUTBOX_EXPIRED_TIMEOUT_MS.
+                                        (events are not posted upon deletion of successfully acknowledged messages)
+                                        - This event id is posted only if MQTT_REPORT_DELETED_MESSAGES==1
+                                        - Additional context: msg_id (id of the deleted message).
+                                        */
+} esp_mqtt_event_id_t;
+
+/**
+ * MQTT connection error codes propagated via ERROR event
+ */
+typedef enum {
+    MQTT_CONNECTION_ACCEPTED = 0,                   /*!< Connection accepted  */
+    MQTT_CONNECTION_REFUSE_PROTOCOL,                /*!< MQTT connection refused reason: Wrong protocol */
+    MQTT_CONNECTION_REFUSE_ID_REJECTED,             /*!< MQTT connection refused reason: ID rejected */
+    MQTT_CONNECTION_REFUSE_SERVER_UNAVAILABLE,      /*!< MQTT connection refused reason: Server unavailable */
+    MQTT_CONNECTION_REFUSE_BAD_USERNAME,            /*!< MQTT connection refused reason: Wrong user */
+    MQTT_CONNECTION_REFUSE_NOT_AUTHORIZED           /*!< MQTT connection refused reason: Wrong username or password */
+} esp_mqtt_connect_return_code_t;
+
+/**
+ * MQTT connection error codes propagated via ERROR event
+ */
+typedef enum {
+    MQTT_ERROR_TYPE_NONE = 0,
+    MQTT_ERROR_TYPE_TCP_TRANSPORT,
+    MQTT_ERROR_TYPE_CONNECTION_REFUSED,
+} esp_mqtt_error_type_t;
+
+/**
+ * MQTT_ERROR_TYPE_TCP_TRANSPORT error type hold all sorts of transport layer errors,
+ * including ESP-TLS error, but in the past only the errors from MQTT_ERROR_TYPE_ESP_TLS layer
+ * were reported, so the ESP-TLS error type is re-defined here for backward compatibility
+ */
+#define MQTT_ERROR_TYPE_ESP_TLS MQTT_ERROR_TYPE_TCP_TRANSPORT
+
+typedef enum {
+    MQTT_TRANSPORT_UNKNOWN = 0x0,
+    MQTT_TRANSPORT_OVER_TCP,      /*!< MQTT over TCP, using scheme: ``mqtt`` */
+    MQTT_TRANSPORT_OVER_SSL,      /*!< MQTT over SSL, using scheme: ``mqtts`` */
+    MQTT_TRANSPORT_OVER_WS,       /*!< MQTT over Websocket, using scheme:: ``ws`` */
+    MQTT_TRANSPORT_OVER_WSS       /*!< MQTT over Websocket Secure, using scheme: ``wss`` */
+} esp_mqtt_transport_t;
+
+/**
+ *  MQTT protocol version used for connection
+ */
+typedef enum {
+    MQTT_PROTOCOL_UNDEFINED = 0,
+    MQTT_PROTOCOL_V_3_1,
+    MQTT_PROTOCOL_V_3_1_1
+} esp_mqtt_protocol_ver_t;
+
+/**
+ * @brief MQTT error code structure to be passed as a contextual information into ERROR event
+ *
+ * Important: This structure extends `esp_tls_last_error` error structure and is backward compatible with it
+ * (so might be down-casted and treated as `esp_tls_last_error` error, but recommended to update applications if used this way previously)
+ *
+ * Use this structure directly checking error_type first and then appropriate error code depending on the source of the error:
+ *
+ * | error_type | related member variables | note |
+ * | MQTT_ERROR_TYPE_TCP_TRANSPORT | esp_tls_last_esp_err, esp_tls_stack_err, esp_tls_cert_verify_flags, sock_errno | Error reported from tcp_transport/esp-tls |
+ * | MQTT_ERROR_TYPE_CONNECTION_REFUSED | connect_return_code | Internal error reported from MQTT broker on connection |
+ */
+typedef struct esp_mqtt_error_codes {
+    /* compatible portion of the struct corresponding to struct esp_tls_last_error */
+    esp_err_t esp_tls_last_esp_err;              /*!< last esp_err code reported from esp-tls component */
+    int       esp_tls_stack_err;                 /*!< tls specific error code reported from underlying tls stack */
+    int       esp_tls_cert_verify_flags;         /*!< tls flags reported from underlying tls stack during certificate verification */
+    /* esp-mqtt specific structure extension */
+    esp_mqtt_error_type_t error_type;            /*!< error type referring to the source of the error */
+    esp_mqtt_connect_return_code_t connect_return_code; /*!< connection refused error code reported from MQTT broker on connection */
+    /* tcp_transport extension */
+    int       esp_transport_sock_errno;         /*!< errno from the underlying socket */
+
+} esp_mqtt_error_codes_t;
+
+/**
+ * MQTT event configuration structure
+ */
+typedef struct {
+    esp_mqtt_event_id_t event_id;       /*!< MQTT event type */
+    esp_mqtt_client_handle_t client;    /*!< MQTT client handle for this event */
+    void *user_context;                 /*!< User context passed from MQTT client config */
+    char *data;                         /*!< Data associated with this event */
+    int data_len;                       /*!< Length of the data for this event */
+    int total_data_len;                 /*!< Total length of the data (longer data are supplied with multiple events) */
+    int current_data_offset;            /*!< Actual offset for the data associated with this event */
+    char *topic;                        /*!< Topic associated with this event */
+    int topic_len;                      /*!< Length of the topic for this event associated with this event */
+    int msg_id;                         /*!< MQTT messaged id of message */
+    int session_present;                /*!< MQTT session_present flag for connection event */
+    esp_mqtt_error_codes_t *error_handle; /*!< esp-mqtt error handle including esp-tls errors as well as internal mqtt errors */
+    bool retain;                        /*!< Retained flag of the message associated with this event */
+} esp_mqtt_event_t;
+
+typedef esp_mqtt_event_t *esp_mqtt_event_handle_t;
+
+typedef esp_err_t (* mqtt_event_callback_t)(esp_mqtt_event_handle_t event);
+
+/**
+ * MQTT client configuration structure
+ */
+typedef struct {
+    mqtt_event_callback_t event_handle;     /*!< handle for MQTT events as a callback in legacy mode */
+    esp_event_loop_handle_t event_loop_handle; /*!< handle for MQTT event loop library */
+    const char *host;                       /*!< MQTT server domain (ipv4 as string) */
+    const char *uri;                        /*!< Complete MQTT broker URI */
+    uint32_t port;                          /*!< MQTT server port */
+    const char *client_id;                  /*!< default client id is ``ESP32_%CHIPID%`` where %CHIPID% are last 3 bytes of MAC address in hex format */
+    const char *username;                   /*!< MQTT username */
+    const char *password;                   /*!< MQTT password */
+    const char *lwt_topic;                  /*!< LWT (Last Will and Testament) message topic (NULL by default) */
+    const char *lwt_msg;                    /*!< LWT message (NULL by default) */
+    int lwt_qos;                            /*!< LWT message qos */
+    int lwt_retain;                         /*!< LWT retained message flag */
+    int lwt_msg_len;                        /*!< LWT message length */
+    int disable_clean_session;              /*!< mqtt clean session, default clean_session is true */
+    int keepalive;                          /*!< mqtt keepalive, default is 120 seconds */
+    bool disable_auto_reconnect;            /*!< this mqtt client will reconnect to server (when errors/disconnect). Set disable_auto_reconnect=true to disable */
+    void *user_context;                     /*!< pass user context to this option, then can receive that context in ``event->user_context`` */
+    int task_prio;                          /*!< MQTT task priority, default is 5, can be changed in ``make menuconfig`` */
+    int task_stack;                         /*!< MQTT task stack size, default is 6144 bytes, can be changed in ``make menuconfig`` */
+    int buffer_size;                        /*!< size of MQTT send/receive buffer, default is 1024 (only receive buffer size if ``out_buffer_size`` defined) */
+    const char *cert_pem;                   /*!< Pointer to certificate data in PEM or DER format for server verify (with SSL), default is NULL, not required to verify the server. PEM-format must have a terminating NULL-character. DER-format requires the length to be passed in cert_len. */
+    size_t cert_len;                        /*!< Length of the buffer pointed to by cert_pem. May be 0 for null-terminated pem */
+    const char *client_cert_pem;            /*!< Pointer to certificate data in PEM or DER format for SSL mutual authentication, default is NULL, not required if mutual authentication is not needed. If it is not NULL, also `client_key_pem` has to be provided. PEM-format must have a terminating NULL-character. DER-format requires the length to be passed in client_cert_len. */
+    size_t client_cert_len;                 /*!< Length of the buffer pointed to by client_cert_pem. May be 0 for null-terminated pem */
+    const char *client_key_pem;             /*!< Pointer to private key data in PEM or DER format for SSL mutual authentication, default is NULL, not required if mutual authentication is not needed. If it is not NULL, also `client_cert_pem` has to be provided. PEM-format must have a terminating NULL-character. DER-format requires the length to be passed in client_key_len */
+    size_t client_key_len;                  /*!< Length of the buffer pointed to by client_key_pem. May be 0 for null-terminated pem */
+    esp_mqtt_transport_t transport;         /*!< overrides URI transport */
+    int refresh_connection_after_ms;        /*!< Refresh connection after this value (in milliseconds) */
+    const struct psk_key_hint *psk_hint_key;     /*!< Pointer to PSK struct defined in esp_tls.h to enable PSK authentication (as alternative to certificate verification). If not NULL and server/client certificates are NULL, PSK is enabled */
+    bool          use_global_ca_store;      /*!< Use a global ca_store for all the connections in which this bool is set. */
+    esp_err_t (*crt_bundle_attach)(void *conf); /*!< Pointer to ESP x509 Certificate Bundle attach function for the usage of certification bundles in mqtts */
+    int reconnect_timeout_ms;               /*!< Reconnect to the broker after this value in miliseconds if auto reconnect is not disabled (defaults to 10s) */
+    const char **alpn_protos;               /*!< NULL-terminated list of supported application protocols to be used for ALPN */
+    const char *clientkey_password;         /*!< Client key decryption password string */
+    int clientkey_password_len;             /*!< String length of the password pointed to by clientkey_password */
+    esp_mqtt_protocol_ver_t protocol_ver;   /*!< MQTT protocol version used for connection, defaults to value from menuconfig*/
+    int out_buffer_size;                    /*!< size of MQTT output buffer. If not defined, both output and input buffers have the same size defined as ``buffer_size`` */
+    bool skip_cert_common_name_check;       /*!< Skip any validation of server certificate CN field, this reduces the security of TLS and makes the mqtt client susceptible to MITM attacks  */
+    bool use_secure_element;                /*!< enable secure element for enabling SSL connection */
+    void *ds_data;                          /*!< carrier of handle for digital signature parameters */
+    int network_timeout_ms;                 /*!< Abort network operation if it is not completed after this value, in milliseconds (defaults to 10s) */
+    bool disable_keepalive;                 /*!< Set disable_keepalive=true to turn off keep-alive mechanism, false by default (keepalive is active by default). Note: setting the config value `keepalive` to `0` doesn't disable keepalive feature, but uses a default keepalive period */
+    const char *path;                       /*!< Path in the URI*/
+    int message_retransmit_timeout;         /*!< timeout for retansmit of failded packet */
+} esp_mqtt_client_config_t;
+
+/**
+ * @brief Creates mqtt client handle based on the configuration
+ *
+ * @param config    mqtt configuration structure
+ *
+ * @return mqtt_client_handle if successfully created, NULL on error
+ */
+esp_mqtt_client_handle_t esp_mqtt_client_init(const esp_mqtt_client_config_t *config);
+
+/**
+ * @brief Sets mqtt connection URI. This API is usually used to overrides the URI
+ * configured in esp_mqtt_client_init
+ *
+ * @param client    mqtt client handle
+ * @param uri
+ *
+ * @return ESP_FAIL if URI parse error, ESP_OK on success
+ */
+esp_err_t esp_mqtt_client_set_uri(esp_mqtt_client_handle_t client, const char *uri);
+
+/**
+ * @brief Starts mqtt client with already created client handle
+ *
+ * @param client    mqtt client handle
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on wrong initialization
+ *         ESP_FAIL on other error
+ */
+esp_err_t esp_mqtt_client_start(esp_mqtt_client_handle_t client);
+
+/**
+ * @brief This api is typically used to force reconnection upon a specific event
+ *
+ * @param client    mqtt client handle
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on wrong initialization
+ *         ESP_FAIL if client is in invalid state
+ */
+esp_err_t esp_mqtt_client_reconnect(esp_mqtt_client_handle_t client);
+
+/**
+ * @brief This api is typically used to force disconnection from the broker
+ *
+ * @param client    mqtt client handle
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on wrong initialization
+ */
+esp_err_t esp_mqtt_client_disconnect(esp_mqtt_client_handle_t client);
+
+/**
+ * @brief Stops mqtt client tasks
+ *
+ *  * Notes:
+ *  - Cannot be called from the mqtt event handler
+ *
+ * @param client    mqtt client handle
+ *
+ * @return ESP_OK on success
+ *         ESP_ERR_INVALID_ARG on wrong initialization
+ *         ESP_FAIL if client is in invalid state
+ */
+esp_err_t esp_mqtt_client_stop(esp_mqtt_client_handle_t client);
+
+/**
+ * @brief Subscribe the client to defined topic with defined qos
+ *
+ * Notes:
+ * - Client must be connected to send subscribe message
+ * - This API is could be executed from a user task or
+ * from a mqtt event callback i.e. internal mqtt task
+ * (API is protected by internal mutex, so it might block
+ * if a longer data receive operation is in progress.
+ *
+ * @param client    mqtt client handle
+ * @param topic
+ * @param qos
+ *
+ * @return message_id of the subscribe message on success
+ *         -1 on failure
+ */
+int esp_mqtt_client_subscribe(esp_mqtt_client_handle_t client, const char *topic, int qos);
+
+/**
+ * @brief Unsubscribe the client from defined topic
+ *
+ * Notes:
+ * - Client must be connected to send unsubscribe message
+ * - It is thread safe, please refer to `esp_mqtt_client_subscribe` for details
+ *
+ * @param client    mqtt client handle
+ * @param topic
+ *
+ * @return message_id of the subscribe message on success
+ *         -1 on failure
+ */
+int esp_mqtt_client_unsubscribe(esp_mqtt_client_handle_t client, const char *topic);
+
+/**
+ * @brief Client to send a publish message to the broker
+ *
+ * Notes:
+ * - This API might block for several seconds, either due to network timeout (10s)
+ *   or if publishing payloads longer than internal buffer (due to message
+ *   fragmentation)
+ * - Client doesn't have to be connected for this API to work, enqueueing the messages
+ *   with qos>1 (returning -1 for all the qos=0 messages if disconnected).
+ *   If MQTT_SKIP_PUBLISH_IF_DISCONNECTED is enabled, this API will not attempt to publish
+ *   when the client is not connected and will always return -1.
+ * - It is thread safe, please refer to `esp_mqtt_client_subscribe` for details
+ *
+ * @param client    mqtt client handle
+ * @param topic     topic string
+ * @param data      payload string (set to NULL, sending empty payload message)
+ * @param len       data length, if set to 0, length is calculated from payload string
+ * @param qos       qos of publish message
+ * @param retain    retain flag
+ *
+ * @return message_id of the publish message (for QoS 0 message_id will always be zero) on success.
+ *         -1 on failure.
+ */
+int esp_mqtt_client_publish(esp_mqtt_client_handle_t client, const char *topic, const char *data, int len, int qos, int retain);
+
+/**
+ * @brief Enqueue a message to the outbox, to be sent later. Typically used for messages with qos>0, but could
+ * be also used for qos=0 messages if store=true.
+ *
+ * This API generates and stores the publish message into the internal outbox and the actual sending
+ * to the network is performed in the mqtt-task context (in contrast to the esp_mqtt_client_publish()
+ * which sends the publish message immediately in the user task's context).
+ * Thus, it could be used as a non blocking version of esp_mqtt_client_publish().
+ *
+ * @param client    mqtt client handle
+ * @param topic     topic string
+ * @param data      payload string (set to NULL, sending empty payload message)
+ * @param len       data length, if set to 0, length is calculated from payload string
+ * @param qos       qos of publish message
+ * @param retain    retain flag
+ * @param store     if true, all messages are enqueued; otherwise only qos1 and qos 2 are enqueued
+ *
+ * @return message_id if queued successfully, -1 otherwise
+ */
+int esp_mqtt_client_enqueue(esp_mqtt_client_handle_t client, const char *topic, const char *data, int len, int qos, int retain, bool store);
+
+/**
+ * @brief Destroys the client handle
+ *
+ * Notes:
+ *  - Cannot be called from the mqtt event handler
+ *
+ * @param client    mqtt client handle
+ *
+ * @return ESP_OK
+ *         ESP_ERR_INVALID_ARG on wrong initialization
+ */
+esp_err_t esp_mqtt_client_destroy(esp_mqtt_client_handle_t client);
+
+/**
+ * @brief Set configuration structure, typically used when updating the config (i.e. on "before_connect" event
+ *
+ * @param client    mqtt client handle
+ *
+ * @param config    mqtt configuration structure
+ *
+ * @return ESP_ERR_NO_MEM if failed to allocate
+ *         ESP_ERR_INVALID_ARG if conflicts on transport configuration.
+ *         ESP_OK on success
+ */
+esp_err_t esp_mqtt_set_config(esp_mqtt_client_handle_t client, const esp_mqtt_client_config_t *config);
+
+/**
+ * @brief Registers mqtt event
+ *
+ * @param client            mqtt client handle
+ * @param event             event type
+ * @param event_handler     handler callback
+ * @param event_handler_arg handlers context
+ *
+ * @return ESP_ERR_NO_MEM if failed to allocate
+ *         ESP_ERR_INVALID_ARG on wrong initialization
+ *         ESP_OK on success
+ */
+esp_err_t esp_mqtt_client_register_event(esp_mqtt_client_handle_t client, esp_mqtt_event_id_t event, esp_event_handler_t event_handler, void *event_handler_arg);
+
+/**
+ * @brief Get outbox size
+ *
+ * @param client            mqtt client handle
+ * @return outbox size
+ *         0 on wrong initialization
+ */
+int esp_mqtt_client_get_outbox_size(esp_mqtt_client_handle_t client);
+
+#ifdef __cplusplus
+}
+#endif //__cplusplus
+
+#endif
diff --git a/tools/sdk/esp32s3/include/mqtt/esp-mqtt/include/mqtt_supported_features.h b/tools/sdk/esp32s3/include/mqtt/esp-mqtt/include/mqtt_supported_features.h
new file mode 100644
index 00000000000..6e49182e222
--- /dev/null
+++ b/tools/sdk/esp32s3/include/mqtt/esp-mqtt/include/mqtt_supported_features.h
@@ -0,0 +1,68 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _MQTT_SUPPORTED_FEATURES_H_
+#define _MQTT_SUPPORTED_FEATURES_H_
+
+#if __has_include("esp_idf_version.h")
+#include "esp_idf_version.h"
+#endif
+
+/**
+ * @brief This header defines supported features of IDF which mqtt module
+ *        could use depending on specific version of ESP-IDF.
+ *        In case "esp_idf_version.h" were not found, all additional
+ *        features would be disabled
+ */
+
+#ifdef ESP_IDF_VERSION
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(3, 3, 0)
+// Features supported from 3.3
+#define MQTT_SUPPORTED_FEATURE_EVENT_LOOP
+#define MQTT_SUPPORTED_FEATURE_SKIP_CRT_CMN_NAME_CHECK
+#endif
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 0, 0)
+// Features supported in 4.0
+#define MQTT_SUPPORTED_FEATURE_WS_SUBPROTOCOL
+#define MQTT_SUPPORTED_FEATURE_TRANSPORT_ERR_REPORTING
+#endif
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0)
+// Features supported in 4.1
+#define MQTT_SUPPORTED_FEATURE_PSK_AUTHENTICATION
+#define MQTT_SUPPORTED_FEATURE_DER_CERTIFICATES
+#define MQTT_SUPPORTED_FEATURE_ALPN
+#define MQTT_SUPPORTED_FEATURE_CLIENT_KEY_PASSWORD
+#endif
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0)
+// Features supported in 4.2
+#define MQTT_SUPPORTED_FEATURE_SECURE_ELEMENT
+#endif
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 3, 0)
+// Features supported in 4.3
+#define MQTT_SUPPORTED_FEATURE_DIGITAL_SIGNATURE
+#define MQTT_SUPPORTED_FEATURE_TRANSPORT_SOCK_ERRNO_REPORTING
+#endif
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0)
+// Features supported in 4.4
+#define MQTT_SUPPORTED_FEATURE_CERTIFICATE_BUNDLE
+#endif
+
+#endif /* ESP_IDF_VERSION */
+#endif // _MQTT_SUPPORTED_FEATURES_H_
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/assert.h b/tools/sdk/esp32s3/include/newlib/platform_include/assert.h
new file mode 100644
index 00000000000..39db39a6f04
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/assert.h
@@ -0,0 +1,52 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/* This header file wraps newlib's own unmodified assert.h and adds
+   support for silent assertion failure.
+*/
+#pragma once
+#include <sdkconfig.h>
+#include <stdlib.h>
+#include <stdint.h>
+
+#include_next <assert.h>
+
+/* moved part of libc provided assert to here allows
+ * tweaking the assert macro to use __builtin_expect()
+ * and reduce jumps in the "asserts OK" code path
+ *
+ * Note: using __builtin_expect() not likely() to avoid defining the likely
+ * macro in namespace of non-IDF code that may include this standard header.
+ */
+#undef assert
+
+/* __FILENAME__ points to the file name instead of path + filename
+ * e.g __FILE__ points to "/apps/test.c" where as __FILENAME__ points to "test.c"
+ */
+#define __FILENAME__ (__builtin_strrchr( "/" __FILE__, '/') + 1)
+
+#if defined(NDEBUG)
+
+#define assert(__e) ((void)(__e))
+
+#elif CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT
+
+#define assert(__e) (__builtin_expect(!!(__e), 1) ? (void)0 : __assert_func(NULL, 0, NULL, NULL))
+
+#else // !CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT
+
+#define assert(__e) (__builtin_expect(!!(__e), 1) ? (void)0 : __assert_func (__FILENAME__, __LINE__, \
+                                                                             __ASSERT_FUNC, #__e))
+#endif
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/endian.h b/tools/sdk/esp32s3/include/newlib/platform_include/endian.h
new file mode 100644
index 00000000000..f4f825c406d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/endian.h
@@ -0,0 +1,200 @@
+/*
+ * All the code below is a rework of
+ * https://github.com/freebsd/freebsd/blob/master/sys/sys/endian.h
+ * to import symbols defining non-standard endian handling functions.
+ * The aforementioned source code license terms are included here.
+ * For further license info, please look at https://github.com/freebsd/freebsd
+ */
+
+/*-
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020 Francesco Giancane <francesco.giancane@accenture.com>
+ * SPDX-FileCopyrightText: 2002 Thomas Moestl <tmm@FreeBSD.org>
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND Apache-2.0
+ *
+ * Copyright (c) 2002 Thomas Moestl <tmm@FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#pragma once
+
+#include <stdint.h>
+
+/*
+ * This is a compatibility header for <endian.h>.
+ * In xtensa-newlib distribution it is located in <machine/endian.h>
+ * but most program expect to be plain <endian.h>.
+ */
+#include <machine/endian.h>
+
+/*
+ * General byte order swapping functions.
+ */
+#define	bswap16(x)	__bswap16(x)
+#define	bswap32(x)	__bswap32(x)
+#define	bswap64(x)	__bswap64(x)
+
+/*
+ * Host to big endian, host to little endian, big endian to host, and little
+ * endian to host byte order functions as detailed in byteorder(9).
+ */
+#if _BYTE_ORDER == _LITTLE_ENDIAN
+#define	htobe16(x)	bswap16((x))
+#define	htobe32(x)	bswap32((x))
+#define	htobe64(x)	bswap64((x))
+#define	htole16(x)	((uint16_t)(x))
+#define	htole32(x)	((uint32_t)(x))
+#define	htole64(x)	((uint64_t)(x))
+
+#define	be16toh(x)	bswap16((x))
+#define	be32toh(x)	bswap32((x))
+#define	be64toh(x)	bswap64((x))
+#define	le16toh(x)	((uint16_t)(x))
+#define	le32toh(x)	((uint32_t)(x))
+#define	le64toh(x)	((uint64_t)(x))
+#else /* _BYTE_ORDER != _LITTLE_ENDIAN */
+#define	htobe16(x)	((uint16_t)(x))
+#define	htobe32(x)	((uint32_t)(x))
+#define	htobe64(x)	((uint64_t)(x))
+#define	htole16(x)	bswap16((x))
+#define	htole32(x)	bswap32((x))
+#define	htole64(x)	bswap64((x))
+
+#define	be16toh(x)	((uint16_t)(x))
+#define	be32toh(x)	((uint32_t)(x))
+#define	be64toh(x)	((uint64_t)(x))
+#define	le16toh(x)	bswap16((x))
+#define	le32toh(x)	bswap32((x))
+#define	le64toh(x)	bswap64((x))
+#endif /* _BYTE_ORDER == _LITTLE_ENDIAN */
+
+/* Alignment-agnostic encode/decode bytestream to/from little/big endian. */
+
+static __inline uint16_t
+be16dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return ((p[0] << 8) | p[1]);
+}
+
+static __inline uint32_t
+be32dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return (((unsigned)p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]);
+}
+
+static __inline uint64_t
+be64dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return (((uint64_t)be32dec(p) << 32) | be32dec(p + 4));
+}
+
+static __inline uint16_t
+le16dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return ((p[1] << 8) | p[0]);
+}
+
+static __inline uint32_t
+le32dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return (((unsigned)p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]);
+}
+
+static __inline uint64_t
+le64dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return (((uint64_t)le32dec(p + 4) << 32) | le32dec(p));
+}
+
+static __inline void
+be16enc(void *pp, uint16_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	p[0] = (u >> 8) & 0xff;
+	p[1] = u & 0xff;
+}
+
+static __inline void
+be32enc(void *pp, uint32_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	p[0] = (u >> 24) & 0xff;
+	p[1] = (u >> 16) & 0xff;
+	p[2] = (u >> 8) & 0xff;
+	p[3] = u & 0xff;
+}
+
+static __inline void
+be64enc(void *pp, uint64_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	be32enc(p, (uint32_t)(u >> 32));
+	be32enc(p + 4, (uint32_t)(u & 0xffffffffU));
+}
+
+static __inline void
+le16enc(void *pp, uint16_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	p[0] = u & 0xff;
+	p[1] = (u >> 8) & 0xff;
+}
+
+static __inline void
+le32enc(void *pp, uint32_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	p[0] = u & 0xff;
+	p[1] = (u >> 8) & 0xff;
+	p[2] = (u >> 16) & 0xff;
+	p[3] = (u >> 24) & 0xff;
+}
+
+static __inline void
+le64enc(void *pp, uint64_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	le32enc(p, (uint32_t)(u & 0xffffffffU));
+	le32enc(p + 4, (uint32_t)(u >> 32));
+}
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/errno.h b/tools/sdk/esp32s3/include/newlib/platform_include/errno.h
new file mode 100644
index 00000000000..85fb2e15b85
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/errno.h
@@ -0,0 +1,39 @@
+
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ESP_PLATFORM_ERRNO_H_
+#define _ESP_PLATFORM_ERRNO_H_
+
+#include_next "errno.h"
+
+//
+// Possibly define some missing errors
+//
+#ifndef ESHUTDOWN
+#define ESHUTDOWN      108  /* Cannot send after transport endpoint shutdown */
+#endif
+
+#ifndef EAI_SOCKTYPE
+#define	EAI_SOCKTYPE	10	/* ai_socktype not supported */
+#endif
+
+#ifndef EAI_AGAIN
+#define	EAI_AGAIN	     2   /* temporary failure in name resolution */
+#endif
+
+#ifndef EAI_BADFLAGS
+#define	EAI_BADFLAGS	 3	 /* invalid value for ai_flags */
+#endif
+
+#endif // _ESP_PLATFORM_ERRNO_H_
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/esp_newlib.h b/tools/sdk/esp32s3/include/newlib/platform_include/esp_newlib.h
new file mode 100644
index 00000000000..fe06a33486a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/esp_newlib.h
@@ -0,0 +1,65 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_NEWLIB_H__
+#define __ESP_NEWLIB_H__
+
+#include <sys/reent.h>
+
+/*
+ * Initialize newlib time functions
+ */
+void esp_newlib_time_init(void);
+
+/**
+ * Replacement for newlib's _REENT_INIT_PTR and __sinit.
+ *
+ * Called from startup code and FreeRTOS, not intended to be called from
+ * application code.
+ */
+void esp_reent_init(struct _reent* r);
+
+/**
+ * Clean up some of lazily allocated buffers in REENT structures.
+ */
+void esp_reent_cleanup(void);
+
+/**
+ * Function which sets up newlib in ROM for use with ESP-IDF
+ *
+ * Includes defining the syscall table, setting up any common locks, etc.
+ *
+ * Called from the startup code, not intended to be called from application
+ * code.
+ */
+void esp_newlib_init(void);
+
+void esp_setup_syscall_table(void) __attribute__((deprecated("Please call esp_newlib_init() in newer code")));
+
+/**
+ * Update current microsecond time from RTC
+ */
+void esp_set_time_from_rtc(void);
+
+/*
+ * Sync counters RTC and FRC. Update boot_time.
+ */
+void esp_sync_counters_rtc_and_frc(void);
+
+/**
+ * Initialize newlib static locks
+ */
+void esp_newlib_locks_init(void);
+
+#endif //__ESP_NEWLIB_H__
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/net/if.h b/tools/sdk/esp32s3/include/newlib/platform_include/net/if.h
new file mode 100644
index 00000000000..4a60be47724
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/net/if.h
@@ -0,0 +1,40 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ESP_PLATFORM_NET_IF_H_
+#define _ESP_PLATFORM_NET_IF_H_
+
+#include "lwip/sockets.h"
+#include "lwip/if_api.h"
+
+#define	MSG_DONTROUTE   0x4     /* send without using routing tables */
+#define	SOCK_SEQPACKET  5       /* sequenced packet stream */
+#define	MSG_EOR         0x8     /* data completes record */
+#define	SOCK_SEQPACKET  5       /* sequenced packet stream */
+#define	SOMAXCONN       128
+
+#define	IPV6_UNICAST_HOPS   4  /* int; IP6 hops */
+
+#define	NI_MAXHOST  1025
+#define	NI_MAXSERV  32
+#define	NI_NUMERICSERV  0x00000008
+#define	NI_DGRAM        0x00000010
+
+typedef u32_t socklen_t;
+
+
+unsigned int if_nametoindex(const char *ifname);
+
+char *if_indextoname(unsigned int ifindex, char *ifname);
+
+#endif // _ESP_PLATFORM_NET_IF_H_
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/pthread.h b/tools/sdk/esp32s3/include/newlib/platform_include/pthread.h
new file mode 100644
index 00000000000..66d0cee39bb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/pthread.h
@@ -0,0 +1,35 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef __ESP_PLATFORM_PTHREAD_H__
+#define __ESP_PLATFORM_PTHREAD_H__
+
+#include <sys/types.h>
+#include <sys/time.h>
+#include <sys/features.h>
+
+#include_next <pthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int pthread_condattr_getclock(const pthread_condattr_t * attr, clockid_t * clock_id);
+
+int pthread_condattr_setclock(pthread_condattr_t *attr, clockid_t clock_id);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ESP_PLATFORM_PTHREAD_H__
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/dirent.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/dirent.h
new file mode 100644
index 00000000000..bfa49f5ea45
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/dirent.h
@@ -0,0 +1,68 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stddef.h>
+#include <stdint.h>
+
+/**
+ * This header file provides POSIX-compatible definitions of directory
+ * access data types. Starting with newlib 3.3, related functions are defined
+ * in 'dirent.h' bundled with newlib.
+ * See http://pubs.opengroup.org/onlinepubs/7908799/xsh/dirent.h.html
+ * for reference.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Opaque directory structure
+ */
+typedef struct {
+    uint16_t dd_vfs_idx; /*!< VFS index, not to be used by applications */
+    uint16_t dd_rsv;     /*!< field reserved for future extension */
+    /* remaining fields are defined by VFS implementation */
+} DIR;
+
+/**
+ * @brief Directory entry structure
+ */
+struct dirent {
+    int d_ino;          /*!< file number */
+    uint8_t d_type;     /*!< not defined in POSIX, but present in BSD and Linux */
+#define DT_UNKNOWN  0
+#define DT_REG      1
+#define DT_DIR      2
+#if __BSD_VISIBLE
+#define MAXNAMLEN 255
+    char d_name[MAXNAMLEN+1];   /*!< zero-terminated file name */
+#else
+    char d_name[256];
+#endif
+};
+
+DIR* opendir(const char* name);
+struct dirent* readdir(DIR* pdir);
+long telldir(DIR* pdir);
+void seekdir(DIR* pdir, long loc);
+void rewinddir(DIR* pdir);
+int closedir(DIR* pdir);
+int readdir_r(DIR* pdir, struct dirent* entry, struct dirent** out_dirent);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/ioctl.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/ioctl.h
new file mode 100644
index 00000000000..90cbb47d663
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/ioctl.h
@@ -0,0 +1,25 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int ioctl(int fd, int request, ...);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/lock.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/lock.h
new file mode 100644
index 00000000000..1581a293e83
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/lock.h
@@ -0,0 +1,41 @@
+#pragma once
+
+#include_next <sys/lock.h>
+
+#ifdef _RETARGETABLE_LOCKING
+
+/* Actual platfrom-specific definition of struct __lock.
+ * The size here should be sufficient for a FreeRTOS mutex.
+ * This is checked by a static assertion in locks.c
+ *
+ * Note 1: this might need to be made dependent on whether FreeRTOS
+ * is included in the build.
+ *
+ * Note 2: the size is made sufficient for the case when
+ * configUSE_TRACE_FACILITY is enabled. If it is disabled,
+ * this definition wastes 8 bytes.
+ */
+struct __lock {
+   int reserved[23];
+};
+
+/* Compatibility definitions for the legacy ESP-specific locking implementation.
+ * These used to be provided by libc/sys/xtensa/sys/lock.h in newlib.
+ * Newer versions of newlib don't have this ESP-specific lock.h header, and are
+ * built with _RETARGETABLE_LOCKING enabled, instead.
+ */
+
+typedef _LOCK_T _lock_t;
+
+void _lock_init(_lock_t *plock);
+void _lock_init_recursive(_lock_t *plock);
+void _lock_close(_lock_t *plock);
+void _lock_close_recursive(_lock_t *plock);
+void _lock_acquire(_lock_t *plock);
+void _lock_acquire_recursive(_lock_t *plock);
+int _lock_try_acquire(_lock_t *plock);
+int _lock_try_acquire_recursive(_lock_t *plock);
+void _lock_release(_lock_t *plock);
+void _lock_release_recursive(_lock_t *plock);
+
+#endif // _RETARGETABLE_LOCKING
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/poll.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/poll.h
new file mode 100644
index 00000000000..030da6bf480
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/poll.h
@@ -0,0 +1,48 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_PLATFORM_SYS_POLL_H_
+#define _ESP_PLATFORM_SYS_POLL_H_
+
+#define POLLIN      (1u << 0)      /* data other than high-priority may be read without blocking */
+#define POLLRDNORM  (1u << 1)      /* normal data may be read without blocking */
+#define POLLRDBAND  (1u << 2)      /* priority data may be read without blocking */
+#define POLLPRI     (POLLRDBAND)   /* high-priority data may be read without blocking */
+// Note: POLLPRI is made equivalent to POLLRDBAND in order to fit all these events into one byte
+#define POLLOUT     (1u << 3)      /* normal data may be written without blocking */
+#define POLLWRNORM  (POLLOUT)      /* equivalent to POLLOUT */
+#define POLLWRBAND  (1u << 4)      /* priority data my be written */
+#define POLLERR     (1u << 5)      /* some poll error occurred */
+#define POLLHUP     (1u << 6)      /* file descriptor was "hung up" */
+#define POLLNVAL    (1u << 7)      /* the specified file descriptor is invalid */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct pollfd {
+    int fd;        /* The descriptor. */
+    short events;  /* The event(s) is/are specified here. */
+    short revents; /* Events found are returned here. */
+};
+
+typedef unsigned int nfds_t;
+
+int poll(struct pollfd *fds, nfds_t nfds, int timeout);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif // _ESP_PLATFORM_SYS_POLL_H_
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/random.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/random.h
new file mode 100644
index 00000000000..afbf4dfd036
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/random.h
@@ -0,0 +1,30 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __SYS_RANDOM__
+#define __SYS_RANDOM__
+
+#include <sys/types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ssize_t getrandom(void *buf, size_t buflen, unsigned int flags);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif //__SYS_RANDOM__
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/reent.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/reent.h
new file mode 100644
index 00000000000..f58eb0ed6dc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/reent.h
@@ -0,0 +1,23 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include_next<sys/reent.h>
+
+/* This function is not part of the newlib API, it is defined in libc/stdio/local.h
+ * There is no nice way to get __cleanup member populated while avoiding __sinit,
+ * so extern declaration is used here.
+ */
+extern void _cleanup_r(struct _reent* r);
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/select.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/select.h
new file mode 100644
index 00000000000..cc6429bd910
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/select.h
@@ -0,0 +1,50 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_SYS_SELECT_H__
+#define __ESP_SYS_SELECT_H__
+
+/* Newlib 2.2.0 does not provide sys/select.h, and fd_set is defined in sys/types.h */
+#include <sys/types.h>
+#ifndef fd_set
+#include_next <sys/select.h>
+#else // fd_set
+#include <sys/time.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *errorfds, struct timeval *timeout);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif // fd_set
+
+#if defined(FD_ISSET) || defined(FD_SET) || defined(FD_CLR)
+#undef FD_SET
+#undef FD_CLR
+#undef FD_ISSET
+
+#define __FD_SAFE_SET(n, code) do { if ((unsigned)(n) < FD_SETSIZE) { code; } } while(0)
+#define __FD_SAFE_GET(n, code) (((unsigned)(n) < FD_SETSIZE) ? (code) : 0)
+
+#define FD_SET(n, p)	__FD_SAFE_SET(n, ((p)->fds_bits[(n) / NFDBITS] |=  (1L << ((n) % NFDBITS))))
+#define FD_CLR(n, p)	__FD_SAFE_SET(n, ((p)->fds_bits[(n) / NFDBITS] &= ~(1L << ((n) % NFDBITS))))
+#define FD_ISSET(n, p)	__FD_SAFE_GET(n, ((p)->fds_bits[(n) / NFDBITS] &   (1L << ((n) % NFDBITS))))
+#endif // FD_ISSET || FD_SET || FD_CLR
+
+#endif //__ESP_SYS_SELECT_H__
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/termios.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/termios.h
new file mode 100644
index 00000000000..c27e107be32
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/termios.h
@@ -0,0 +1,296 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+// This header file is based on the termios header of
+// "The Single UNIX (r) Specification, Version 2, Copyright (c)  1997 The Open Group".
+
+#ifndef __ESP_SYS_TERMIOS_H__
+#define __ESP_SYS_TERMIOS_H__
+
+// ESP-IDF NOTE: This header provides only a compatibility layer for macros and functions defined in sys/termios.h.
+// Not everything has a defined meaning for ESP-IDF (e.g. process leader IDs) and therefore are likely to be stubbed
+// in actual implementations.
+
+
+#include <stdint.h>
+#include <sys/types.h>
+#include "sdkconfig.h"
+
+#ifdef CONFIG_VFS_SUPPORT_TERMIOS
+
+// subscripts for the array c_cc:
+#define VEOF                        0           /** EOF character */
+#define VEOL                        1           /** EOL character */
+#define VERASE                      2           /** ERASE character */
+#define VINTR                       3           /** INTR character */
+#define VKILL                       4           /** KILL character */
+#define VMIN                        5           /** MIN value */
+#define VQUIT                       6           /** QUIT character */
+#define VSTART                      7           /** START character */
+#define VSTOP                       8           /** STOP character */
+#define VSUSP                       9           /** SUSP character */
+#define VTIME                      10           /** TIME value */
+#define NCCS                       (VTIME + 1)  /** Size of the array c_cc for control characters */
+
+// input modes for use as flags in the c_iflag field
+#define BRKINT      (1u << 0)       /** Signal interrupt on break. */
+#define ICRNL       (1u << 1)       /** Map CR to NL on input. */
+#define IGNBRK      (1u << 2)       /** Ignore break condition. */
+#define IGNCR       (1u << 3)       /** Ignore CR. */
+#define IGNPAR      (1u << 4)       /** Ignore characters with parity errors. */
+#define INLCR       (1u << 5)       /** Map NL to CR on input. */
+#define INPCK       (1u << 6)       /** Enable input parity check. */
+#define ISTRIP      (1u << 7)       /** Strip character. */
+#define IUCLC       (1u << 8)       /** Map upper-case to lower-case on input (LEGACY). */
+#define IXANY       (1u << 9)       /** Enable any character to restart output. */
+#define IXOFF       (1u << 10)      /** Enable start/stop input control. */
+#define IXON        (1u << 11)      /** Enable start/stop output control. */
+#define PARMRK      (1u << 12)      /** Mark parity errors. */
+
+// output Modes for use as flags in the c_oflag field
+#define OPOST       (1u <<  0)       /** Post-process output */
+#define OLCUC       (1u <<  1)       /** Map lower-case to upper-case on output (LEGACY). */
+#define ONLCR       (1u <<  2)       /** Map NL to CR-NL on output. */
+#define OCRNL       (1u <<  3)       /** Map CR to NL on output. */
+#define ONOCR       (1u <<  4)       /** No CR output at column 0. */
+#define ONLRET      (1u <<  5)       /** NL performs CR function. */
+#define OFILL       (1u <<  6)       /** Use fill characters for delay. */
+#define NLDLY       (1u <<  7)       /** Select newline delays: */
+#define   NL0       (0u <<  7)       /** Newline character type 0. */
+#define   NL1       (1u <<  7)       /** Newline character type 1. */
+#define CRDLY       (3u <<  8)       /** Select carriage-return delays: */
+#define   CR0       (0u <<  8)       /** Carriage-return delay type 0. */
+#define   CR1       (1u <<  8)       /** Carriage-return delay type 1. */
+#define   CR2       (2u <<  8)       /** Carriage-return delay type 2. */
+#define   CR3       (3u <<  8)       /** Carriage-return delay type 3. */
+#define TABDLY      (3u << 10)       /** Select horizontal-tab delays: */
+#define   TAB0      (0u << 10)       /** Horizontal-tab delay type 0. */
+#define   TAB1      (1u << 10)       /** Horizontal-tab delay type 1. */
+#define   TAB2      (2u << 10)       /** Horizontal-tab delay type 2. */
+#define   TAB3      (3u << 10)       /** Expand tabs to spaces. */
+#define BSDLY       (1u << 12)       /** Select backspace delays: */
+#define   BS0       (0u << 12)       /** Backspace-delay type 0. */
+#define   BS1       (1u << 12)       /** Backspace-delay type 1. */
+#define VTDLY       (1u << 13)       /** Select vertical-tab delays: */
+#define   VT0       (0u << 13)       /** Vertical-tab delay type 0. */
+#define   VT1       (1u << 13)       /** Vertical-tab delay type 1. */
+#define FFDLY       (1u << 14)       /** Select form-feed delays: */
+#define   FF0       (0u << 14)       /** Form-feed delay type 0. */
+#define   FF1       (1u << 14)       /** Form-feed delay type 1. */
+
+// Baud Rate Selection. Valid values for objects of type speed_t:
+// CBAUD range B0 - B38400
+#define B0          0   /** Hang up */
+#define B50         1
+#define B75         2
+#define B110        3
+#define B134        4
+#define B150        5
+#define B200        6
+#define B300        7
+#define B600        8
+#define B1200       9
+#define B1800      10
+#define B2400      11
+#define B4800      12
+#define B9600      13
+#define B19200     14
+#define B38400     15
+// CBAUDEX range B57600 - B4000000
+#define B57600     16
+#define B115200    17
+#define B230400    18
+#define B460800    19
+#define B500000    20
+#define B576000    21
+#define B921600    22
+#define B1000000   23
+#define B1152000   24
+#define B1500000   25
+#define B2000000   26
+#define B2500000   27
+#define B3000000   28
+#define B3500000   29
+#define B4000000   30
+
+// Control Modes for the c_cflag field:
+#define CSIZE      (3u << 0)        /* Character size: */
+#define   CS5      (0u << 0)        /** 5 bits. */
+#define   CS6      (1u << 0)        /** 6 bits. */
+#define   CS7      (2u << 0)        /** 7 bits. */
+#define   CS8      (3u << 0)        /** 8 bits. */
+#define CSTOPB     (1u << 2)        /** Send two stop bits, else one. */
+#define CREAD      (1u << 3)        /** Enable receiver. */
+#define PARENB     (1u << 4)        /** Parity enable. */
+#define PARODD     (1u << 5)        /** Odd parity, else even. */
+#define HUPCL      (1u << 6)        /** Hang up on last close. */
+#define CLOCAL     (1u << 7)        /** Ignore modem status lines. */
+#define CBAUD      (1u << 8)        /** Use baud rates defined by B0-B38400 macros. */
+#define CBAUDEX    (1u << 9)        /** Use baud rates defined by B57600-B4000000 macros. */
+#define BOTHER     (1u << 10)       /** Use custom baud rates */
+
+// Local Modes for c_lflag field:
+#define ECHO       (1u << 0)        /** Enable echo. */
+#define ECHOE      (1u << 1)        /** Echo erase character as error-correcting backspace. */
+#define ECHOK      (1u << 2)        /** Echo KILL. */
+#define ECHONL     (1u << 3)        /** Echo NL. */
+#define ICANON     (1u << 4)        /** Canonical input (erase and kill processing). */
+#define IEXTEN     (1u << 5)        /** Enable extended input character processing. */
+#define ISIG       (1u << 6)        /** Enable signals. */
+#define NOFLSH     (1u << 7)        /** Disable flush after interrupt or quit. */
+#define TOSTOP     (1u << 8)        /** Send SIGTTOU for background output. */
+#define XCASE      (1u << 9)        /** Canonical upper/lower presentation (LEGACY). */
+
+// Attribute Selection constants for use with tcsetattr():
+#define TCSANOW    0                /** Change attributes immediately. */
+#define TCSADRAIN  1                /** Change attributes when output has drained. */
+#define TCSAFLUSH  2                /** Change attributes when output has drained; also flush pending input. */
+
+// Line Control constants for use with tcflush():
+#define TCIFLUSH    0               /** Flush pending input. Flush untransmitted output. */
+#define TCIOFLUSH   1               /** Flush both pending input and untransmitted output. */
+#define TCOFLUSH    2               /** Flush untransmitted output. */
+
+// constants for use with tcflow():
+#define TCIOFF      0               /** Transmit a STOP character, intended to suspend input data. */
+#define TCION       1               /** Transmit a START character, intended to restart input data. */
+#define TCOOFF      2               /** Suspend output. */
+#define TCOON       3               /** Restart output. */
+
+typedef uint8_t cc_t;
+typedef uint32_t speed_t;
+typedef uint16_t tcflag_t;
+
+struct termios
+{
+    tcflag_t c_iflag;    /** Input modes */
+    tcflag_t c_oflag;    /** Output modes */
+    tcflag_t c_cflag;    /** Control modes */
+    tcflag_t c_lflag;    /** Local modes */
+    cc_t     c_cc[NCCS]; /** Control characters */
+    speed_t  c_ispeed;   /** input baud rate */
+    speed_t  c_ospeed;   /** output baud rate */
+};
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Extracts the input baud rate from the input structure exactly (without interpretation).
+ *
+ * @param p input termios structure
+ * @return input baud rate
+ */
+speed_t cfgetispeed(const struct termios *p);
+
+/**
+ * @brief Extracts the output baud rate from the input structure exactly (without interpretation).
+ *
+ * @param p input termios structure
+ * @return output baud rate
+ */
+speed_t cfgetospeed(const struct termios *p);
+
+/**
+ * @brief Set input baud rate in the termios structure
+ *
+ * There is no effect in hardware until a subsequent call of tcsetattr().
+ *
+ * @param p input termios structure
+ * @param sp input baud rate
+ * @return 0 when successful, -1 otherwise with errno set
+ */
+int cfsetispeed(struct termios *p, speed_t sp);
+
+/**
+ * @brief Set output baud rate in the termios structure
+ *
+ * There is no effect in hardware until a subsequent call of tcsetattr().
+ *
+ * @param p input termios structure
+ * @param sp output baud rate
+ * @return 0 when successful, -1 otherwise with errno set
+ */
+int cfsetospeed(struct termios *p, speed_t sp);
+
+/**
+ * @brief Wait for transmission of output
+ *
+ * @param fd file descriptor of the terminal
+ * @return 0 when successful, -1 otherwise with errno set
+ */
+int tcdrain(int fd);
+
+/**
+ * @brief Suspend or restart the transmission or reception of data
+ *
+ * @param fd file descriptor of the terminal
+ * @param action selects actions to do
+ * @return 0 when successful, -1 otherwise with errno set
+ */
+int tcflow(int fd, int action);
+
+/**
+ * @brief Flush non-transmitted output data and non-read input data
+ *
+ * @param fd file descriptor of the terminal
+ * @param select selects what should be flushed
+ * @return 0 when successful, -1 otherwise with errno set
+ */
+int tcflush(int fd, int select);
+
+/**
+ * @brief Gets the parameters of the terminal
+ *
+ * @param fd file descriptor of the terminal
+ * @param p output termios structure
+ * @return 0 when successful, -1 otherwise with errno set
+ */
+int tcgetattr(int fd, struct termios *p);
+
+/**
+ * @brief Get process group ID for session leader for controlling terminal
+ *
+ * @param fd file descriptor of the terminal
+ * @return process group ID when successful, -1 otherwise with errno set
+ */
+pid_t tcgetsid(int fd);
+
+/**
+ * @brief Send a break for a specific duration
+ *
+ * @param fd file descriptor of the terminal
+ * @param duration duration of break
+ * @return 0 when successful, -1 otherwise with errno set
+ */
+int tcsendbreak(int fd, int duration);
+
+/**
+ * @brief Sets the parameters of the terminal
+ *
+ * @param fd file descriptor of the terminal
+ * @param optional_actions optional actions
+ * @param p input termios structure
+ * @return 0 when successful, -1 otherwise with errno set
+ */
+int tcsetattr(int fd, int optional_actions, const struct termios *p);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif // CONFIG_VFS_SUPPORT_TERMIOS
+
+#endif //__ESP_SYS_TERMIOS_H__
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/time.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/time.h
new file mode 100644
index 00000000000..ecf3f70e74e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/time.h
@@ -0,0 +1,17 @@
+#pragma once
+/* Newlib sys/time.h defines timerisset, timerclear, timercmp, timeradd, timersub macros
+   for __CYGWIN__ and __rtems__. We want to define these macros in IDF as well.
+   Since we wish to use un-modified newlib headers until a patched newlib version is
+   available, temporarily define __rtems__ here before including sys/time.h.
+   __rtems__ is chosen instead of __CYGWIN__ since there are no other checks in sys/time.h
+   which depend on __rtems__.
+
+   Also, so that __rtems__ define does not affect other headers included from sys/time.h,
+   we include them here in advance (_ansi.h and sys/types.h).
+ */
+
+#include <_ansi.h>
+#include <sys/types.h>
+#define __rtems__
+#include_next <sys/time.h>
+#undef __rtems__
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/uio.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/uio.h
new file mode 100644
index 00000000000..3ff3eba8716
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/uio.h
@@ -0,0 +1,24 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <sys/types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct iovec;
+
+int writev(int s, const struct iovec *iov, int iovcnt);
+
+ssize_t readv(int fd, const struct iovec *iov, int iovcnt);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/un.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/un.h
new file mode 100644
index 00000000000..a99b1832593
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/un.h
@@ -0,0 +1,24 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ESP_PLATFORM_SYS_UN_H_
+#define _ESP_PLATFORM_SYS_UN_H_
+
+#define	AF_UNIX		1		/* local to host (pipes) */
+
+struct sockaddr_un {
+            short                    sun_family;                /*AF_UNIX*/
+            char                     sun_path[108];             /*path name */
+};
+
+#endif // _ESP_PLATFORM_SYS_UN_H_
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/unistd.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/unistd.h
new file mode 100644
index 00000000000..c3149486a22
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/unistd.h
@@ -0,0 +1,31 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _ESP_SYS_UNISTD_H
+#define _ESP_SYS_UNISTD_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include_next <sys/unistd.h>
+
+int truncate(const char *, off_t __length);
+int gethostname(char *__name, size_t __len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _SYS_UNISTD_H */
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/sys/utime.h b/tools/sdk/esp32s3/include/newlib/platform_include/sys/utime.h
new file mode 100644
index 00000000000..3251d3ce432
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/sys/utime.h
@@ -0,0 +1,35 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _UTIME_H_
+#define _UTIME_H_
+
+#include <sys/time.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct utimbuf {
+    time_t actime;       // access time
+    time_t modtime;      // modification time
+};
+
+int utime(const char *path, const struct utimbuf *times);
+
+#ifdef __cplusplus
+};
+#endif
+
+#endif /* _UTIME_H_ */
diff --git a/tools/sdk/esp32s3/include/newlib/platform_include/time.h b/tools/sdk/esp32s3/include/newlib/platform_include/time.h
new file mode 100644
index 00000000000..bbffaad8b9e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/newlib/platform_include/time.h
@@ -0,0 +1,39 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _ESP_TIME_H
+#define _ESP_TIME_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include_next <time.h>
+
+#define _POSIX_TIMERS 1
+#ifndef CLOCK_MONOTONIC
+#define CLOCK_MONOTONIC (clockid_t)4
+#endif
+#ifndef CLOCK_BOOTTIME
+#define CLOCK_BOOTTIME (clockid_t)4
+#endif
+
+int clock_settime(clockid_t clock_id, const struct timespec *tp);
+int clock_gettime(clockid_t clock_id, struct timespec *tp);
+int clock_getres(clockid_t clock_id, struct timespec *res);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _ESP_TIME_H */
diff --git a/tools/sdk/esp32s3/include/nghttp/nghttp2/lib/includes/nghttp2/nghttp2.h b/tools/sdk/esp32s3/include/nghttp/nghttp2/lib/includes/nghttp2/nghttp2.h
new file mode 100644
index 00000000000..9be6eea5c02
--- /dev/null
+++ b/tools/sdk/esp32s3/include/nghttp/nghttp2/lib/includes/nghttp2/nghttp2.h
@@ -0,0 +1,5510 @@
+/*
+ * nghttp2 - HTTP/2 C Library
+ *
+ * Copyright (c) 2013, 2014 Tatsuhiro Tsujikawa
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef NGHTTP2_H
+#define NGHTTP2_H
+
+/* Define WIN32 when build target is Win32 API (borrowed from
+   libcurl) */
+#if (defined(_WIN32) || defined(__WIN32__)) && !defined(WIN32)
+#  define WIN32
+#endif
+
+/* Compatibility for non-Clang compilers */
+#ifndef __has_declspec_attribute
+#  define __has_declspec_attribute(x) 0
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdlib.h>
+#if defined(_MSC_VER) && (_MSC_VER < 1800)
+/* MSVC < 2013 does not have inttypes.h because it is not C99
+   compliant.  See compiler macros and version number in
+   https://sourceforge.net/p/predef/wiki/Compilers/ */
+#  include <stdint.h>
+#else /* !defined(_MSC_VER) || (_MSC_VER >= 1800) */
+#  include <inttypes.h>
+#endif /* !defined(_MSC_VER) || (_MSC_VER >= 1800) */
+#include <sys/types.h>
+#include <stdarg.h>
+
+#include <nghttp2/nghttp2ver.h>
+
+#ifdef NGHTTP2_STATICLIB
+#  define NGHTTP2_EXTERN
+#elif defined(WIN32) || (__has_declspec_attribute(dllexport) &&                \
+                         __has_declspec_attribute(dllimport))
+#  ifdef BUILDING_NGHTTP2
+#    define NGHTTP2_EXTERN __declspec(dllexport)
+#  else /* !BUILDING_NGHTTP2 */
+#    define NGHTTP2_EXTERN __declspec(dllimport)
+#  endif /* !BUILDING_NGHTTP2 */
+#else    /* !defined(WIN32) */
+#  ifdef BUILDING_NGHTTP2
+#    define NGHTTP2_EXTERN __attribute__((visibility("default")))
+#  else /* !BUILDING_NGHTTP2 */
+#    define NGHTTP2_EXTERN
+#  endif /* !BUILDING_NGHTTP2 */
+#endif   /* !defined(WIN32) */
+
+/**
+ * @macro
+ *
+ * The protocol version identification string of this library
+ * supports.  This identifier is used if HTTP/2 is used over TLS.
+ */
+#define NGHTTP2_PROTO_VERSION_ID "h2"
+/**
+ * @macro
+ *
+ * The length of :macro:`NGHTTP2_PROTO_VERSION_ID`.
+ */
+#define NGHTTP2_PROTO_VERSION_ID_LEN 2
+
+/**
+ * @macro
+ *
+ * The serialized form of ALPN protocol identifier this library
+ * supports.  Notice that first byte is the length of following
+ * protocol identifier.  This is the same wire format of `TLS ALPN
+ * extension <https://tools.ietf.org/html/rfc7301>`_.  This is useful
+ * to process incoming ALPN tokens in wire format.
+ */
+#define NGHTTP2_PROTO_ALPN "\x2h2"
+
+/**
+ * @macro
+ *
+ * The length of :macro:`NGHTTP2_PROTO_ALPN`.
+ */
+#define NGHTTP2_PROTO_ALPN_LEN (sizeof(NGHTTP2_PROTO_ALPN) - 1)
+
+/**
+ * @macro
+ *
+ * The protocol version identification string of this library
+ * supports.  This identifier is used if HTTP/2 is used over cleartext
+ * TCP.
+ */
+#define NGHTTP2_CLEARTEXT_PROTO_VERSION_ID "h2c"
+
+/**
+ * @macro
+ *
+ * The length of :macro:`NGHTTP2_CLEARTEXT_PROTO_VERSION_ID`.
+ */
+#define NGHTTP2_CLEARTEXT_PROTO_VERSION_ID_LEN 3
+
+struct nghttp2_session;
+/**
+ * @struct
+ *
+ * The primary structure to hold the resources needed for a HTTP/2
+ * session.  The details of this structure are intentionally hidden
+ * from the public API.
+ */
+typedef struct nghttp2_session nghttp2_session;
+
+/**
+ * @macro
+ *
+ * The age of :type:`nghttp2_info`
+ */
+#define NGHTTP2_VERSION_AGE 1
+
+/**
+ * @struct
+ *
+ * This struct is what `nghttp2_version()` returns.  It holds
+ * information about the particular nghttp2 version.
+ */
+typedef struct {
+  /**
+   * Age of this struct.  This instance of nghttp2 sets it to
+   * :macro:`NGHTTP2_VERSION_AGE` but a future version may bump it and
+   * add more struct fields at the bottom
+   */
+  int age;
+  /**
+   * the :macro:`NGHTTP2_VERSION_NUM` number (since age ==1)
+   */
+  int version_num;
+  /**
+   * points to the :macro:`NGHTTP2_VERSION` string (since age ==1)
+   */
+  const char *version_str;
+  /**
+   * points to the :macro:`NGHTTP2_PROTO_VERSION_ID` string this
+   * instance implements (since age ==1)
+   */
+  const char *proto_str;
+  /* -------- the above fields all exist when age == 1 */
+} nghttp2_info;
+
+/**
+ * @macro
+ *
+ * The default weight of stream dependency.
+ */
+#define NGHTTP2_DEFAULT_WEIGHT 16
+
+/**
+ * @macro
+ *
+ * The maximum weight of stream dependency.
+ */
+#define NGHTTP2_MAX_WEIGHT 256
+
+/**
+ * @macro
+ *
+ * The minimum weight of stream dependency.
+ */
+#define NGHTTP2_MIN_WEIGHT 1
+
+/**
+ * @macro
+ *
+ * The maximum window size
+ */
+#define NGHTTP2_MAX_WINDOW_SIZE ((int32_t)((1U << 31) - 1))
+
+/**
+ * @macro
+ *
+ * The initial window size for stream level flow control.
+ */
+#define NGHTTP2_INITIAL_WINDOW_SIZE ((1 << 16) - 1)
+/**
+ * @macro
+ *
+ * The initial window size for connection level flow control.
+ */
+#define NGHTTP2_INITIAL_CONNECTION_WINDOW_SIZE ((1 << 16) - 1)
+
+/**
+ * @macro
+ *
+ * The default header table size.
+ */
+#define NGHTTP2_DEFAULT_HEADER_TABLE_SIZE (1 << 12)
+
+/**
+ * @macro
+ *
+ * The client magic string, which is the first 24 bytes byte string of
+ * client connection preface.
+ */
+#define NGHTTP2_CLIENT_MAGIC "PRI * HTTP/2.0\r\n\r\nSM\r\n\r\n"
+
+/**
+ * @macro
+ *
+ * The length of :macro:`NGHTTP2_CLIENT_MAGIC`.
+ */
+#define NGHTTP2_CLIENT_MAGIC_LEN 24
+
+/**
+ * @macro
+ *
+ * The default max number of settings per SETTINGS frame
+ */
+#define NGHTTP2_DEFAULT_MAX_SETTINGS 32
+
+/**
+ * @enum
+ *
+ * Error codes used in this library.  The code range is [-999, -500],
+ * inclusive. The following values are defined:
+ */
+typedef enum {
+  /**
+   * Invalid argument passed.
+   */
+  NGHTTP2_ERR_INVALID_ARGUMENT = -501,
+  /**
+   * Out of buffer space.
+   */
+  NGHTTP2_ERR_BUFFER_ERROR = -502,
+  /**
+   * The specified protocol version is not supported.
+   */
+  NGHTTP2_ERR_UNSUPPORTED_VERSION = -503,
+  /**
+   * Used as a return value from :type:`nghttp2_send_callback`,
+   * :type:`nghttp2_recv_callback` and
+   * :type:`nghttp2_send_data_callback` to indicate that the operation
+   * would block.
+   */
+  NGHTTP2_ERR_WOULDBLOCK = -504,
+  /**
+   * General protocol error
+   */
+  NGHTTP2_ERR_PROTO = -505,
+  /**
+   * The frame is invalid.
+   */
+  NGHTTP2_ERR_INVALID_FRAME = -506,
+  /**
+   * The peer performed a shutdown on the connection.
+   */
+  NGHTTP2_ERR_EOF = -507,
+  /**
+   * Used as a return value from
+   * :func:`nghttp2_data_source_read_callback` to indicate that data
+   * transfer is postponed.  See
+   * :func:`nghttp2_data_source_read_callback` for details.
+   */
+  NGHTTP2_ERR_DEFERRED = -508,
+  /**
+   * Stream ID has reached the maximum value.  Therefore no stream ID
+   * is available.
+   */
+  NGHTTP2_ERR_STREAM_ID_NOT_AVAILABLE = -509,
+  /**
+   * The stream is already closed; or the stream ID is invalid.
+   */
+  NGHTTP2_ERR_STREAM_CLOSED = -510,
+  /**
+   * RST_STREAM has been added to the outbound queue.  The stream is
+   * in closing state.
+   */
+  NGHTTP2_ERR_STREAM_CLOSING = -511,
+  /**
+   * The transmission is not allowed for this stream (e.g., a frame
+   * with END_STREAM flag set has already sent).
+   */
+  NGHTTP2_ERR_STREAM_SHUT_WR = -512,
+  /**
+   * The stream ID is invalid.
+   */
+  NGHTTP2_ERR_INVALID_STREAM_ID = -513,
+  /**
+   * The state of the stream is not valid (e.g., DATA cannot be sent
+   * to the stream if response HEADERS has not been sent).
+   */
+  NGHTTP2_ERR_INVALID_STREAM_STATE = -514,
+  /**
+   * Another DATA frame has already been deferred.
+   */
+  NGHTTP2_ERR_DEFERRED_DATA_EXIST = -515,
+  /**
+   * Starting new stream is not allowed (e.g., GOAWAY has been sent
+   * and/or received).
+   */
+  NGHTTP2_ERR_START_STREAM_NOT_ALLOWED = -516,
+  /**
+   * GOAWAY has already been sent.
+   */
+  NGHTTP2_ERR_GOAWAY_ALREADY_SENT = -517,
+  /**
+   * The received frame contains the invalid header block (e.g., There
+   * are duplicate header names; or the header names are not encoded
+   * in US-ASCII character set and not lower cased; or the header name
+   * is zero-length string; or the header value contains multiple
+   * in-sequence NUL bytes).
+   */
+  NGHTTP2_ERR_INVALID_HEADER_BLOCK = -518,
+  /**
+   * Indicates that the context is not suitable to perform the
+   * requested operation.
+   */
+  NGHTTP2_ERR_INVALID_STATE = -519,
+  /**
+   * The user callback function failed due to the temporal error.
+   */
+  NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE = -521,
+  /**
+   * The length of the frame is invalid, either too large or too small.
+   */
+  NGHTTP2_ERR_FRAME_SIZE_ERROR = -522,
+  /**
+   * Header block inflate/deflate error.
+   */
+  NGHTTP2_ERR_HEADER_COMP = -523,
+  /**
+   * Flow control error
+   */
+  NGHTTP2_ERR_FLOW_CONTROL = -524,
+  /**
+   * Insufficient buffer size given to function.
+   */
+  NGHTTP2_ERR_INSUFF_BUFSIZE = -525,
+  /**
+   * Callback was paused by the application
+   */
+  NGHTTP2_ERR_PAUSE = -526,
+  /**
+   * There are too many in-flight SETTING frame and no more
+   * transmission of SETTINGS is allowed.
+   */
+  NGHTTP2_ERR_TOO_MANY_INFLIGHT_SETTINGS = -527,
+  /**
+   * The server push is disabled.
+   */
+  NGHTTP2_ERR_PUSH_DISABLED = -528,
+  /**
+   * DATA or HEADERS frame for a given stream has been already
+   * submitted and has not been fully processed yet.  Application
+   * should wait for the transmission of the previously submitted
+   * frame before submitting another.
+   */
+  NGHTTP2_ERR_DATA_EXIST = -529,
+  /**
+   * The current session is closing due to a connection error or
+   * `nghttp2_session_terminate_session()` is called.
+   */
+  NGHTTP2_ERR_SESSION_CLOSING = -530,
+  /**
+   * Invalid HTTP header field was received and stream is going to be
+   * closed.
+   */
+  NGHTTP2_ERR_HTTP_HEADER = -531,
+  /**
+   * Violation in HTTP messaging rule.
+   */
+  NGHTTP2_ERR_HTTP_MESSAGING = -532,
+  /**
+   * Stream was refused.
+   */
+  NGHTTP2_ERR_REFUSED_STREAM = -533,
+  /**
+   * Unexpected internal error, but recovered.
+   */
+  NGHTTP2_ERR_INTERNAL = -534,
+  /**
+   * Indicates that a processing was canceled.
+   */
+  NGHTTP2_ERR_CANCEL = -535,
+  /**
+   * When a local endpoint expects to receive SETTINGS frame, it
+   * receives an other type of frame.
+   */
+  NGHTTP2_ERR_SETTINGS_EXPECTED = -536,
+  /**
+   * When a local endpoint receives too many settings entries
+   * in a single SETTINGS frame.
+   */
+  NGHTTP2_ERR_TOO_MANY_SETTINGS = -537,
+  /**
+   * The errors < :enum:`NGHTTP2_ERR_FATAL` mean that the library is
+   * under unexpected condition and processing was terminated (e.g.,
+   * out of memory).  If application receives this error code, it must
+   * stop using that :type:`nghttp2_session` object and only allowed
+   * operation for that object is deallocate it using
+   * `nghttp2_session_del()`.
+   */
+  NGHTTP2_ERR_FATAL = -900,
+  /**
+   * Out of memory.  This is a fatal error.
+   */
+  NGHTTP2_ERR_NOMEM = -901,
+  /**
+   * The user callback function failed.  This is a fatal error.
+   */
+  NGHTTP2_ERR_CALLBACK_FAILURE = -902,
+  /**
+   * Invalid client magic (see :macro:`NGHTTP2_CLIENT_MAGIC`) was
+   * received and further processing is not possible.
+   */
+  NGHTTP2_ERR_BAD_CLIENT_MAGIC = -903,
+  /**
+   * Possible flooding by peer was detected in this HTTP/2 session.
+   * Flooding is measured by how many PING and SETTINGS frames with
+   * ACK flag set are queued for transmission.  These frames are
+   * response for the peer initiated frames, and peer can cause memory
+   * exhaustion on server side to send these frames forever and does
+   * not read network.
+   */
+  NGHTTP2_ERR_FLOODED = -904
+} nghttp2_error;
+
+/**
+ * @struct
+ *
+ * The object representing single contiguous buffer.
+ */
+typedef struct {
+  /**
+   * The pointer to the buffer.
+   */
+  uint8_t *base;
+  /**
+   * The length of the buffer.
+   */
+  size_t len;
+} nghttp2_vec;
+
+struct nghttp2_rcbuf;
+
+/**
+ * @struct
+ *
+ * The object representing reference counted buffer.  The details of
+ * this structure are intentionally hidden from the public API.
+ */
+typedef struct nghttp2_rcbuf nghttp2_rcbuf;
+
+/**
+ * @function
+ *
+ * Increments the reference count of |rcbuf| by 1.
+ */
+NGHTTP2_EXTERN void nghttp2_rcbuf_incref(nghttp2_rcbuf *rcbuf);
+
+/**
+ * @function
+ *
+ * Decrements the reference count of |rcbuf| by 1.  If the reference
+ * count becomes zero, the object pointed by |rcbuf| will be freed.
+ * In this case, application must not use |rcbuf| again.
+ */
+NGHTTP2_EXTERN void nghttp2_rcbuf_decref(nghttp2_rcbuf *rcbuf);
+
+/**
+ * @function
+ *
+ * Returns the underlying buffer managed by |rcbuf|.
+ */
+NGHTTP2_EXTERN nghttp2_vec nghttp2_rcbuf_get_buf(nghttp2_rcbuf *rcbuf);
+
+/**
+ * @function
+ *
+ * Returns nonzero if the underlying buffer is statically allocated,
+ * and 0 otherwise. This can be useful for language bindings that wish
+ * to avoid creating duplicate strings for these buffers.
+ */
+NGHTTP2_EXTERN int nghttp2_rcbuf_is_static(const nghttp2_rcbuf *rcbuf);
+
+/**
+ * @enum
+ *
+ * The flags for header field name/value pair.
+ */
+typedef enum {
+  /**
+   * No flag set.
+   */
+  NGHTTP2_NV_FLAG_NONE = 0,
+  /**
+   * Indicates that this name/value pair must not be indexed ("Literal
+   * Header Field never Indexed" representation must be used in HPACK
+   * encoding).  Other implementation calls this bit as "sensitive".
+   */
+  NGHTTP2_NV_FLAG_NO_INDEX = 0x01,
+  /**
+   * This flag is set solely by application.  If this flag is set, the
+   * library does not make a copy of header field name.  This could
+   * improve performance.
+   */
+  NGHTTP2_NV_FLAG_NO_COPY_NAME = 0x02,
+  /**
+   * This flag is set solely by application.  If this flag is set, the
+   * library does not make a copy of header field value.  This could
+   * improve performance.
+   */
+  NGHTTP2_NV_FLAG_NO_COPY_VALUE = 0x04
+} nghttp2_nv_flag;
+
+/**
+ * @struct
+ *
+ * The name/value pair, which mainly used to represent header fields.
+ */
+typedef struct {
+  /**
+   * The |name| byte string.  If this struct is presented from library
+   * (e.g., :type:`nghttp2_on_frame_recv_callback`), |name| is
+   * guaranteed to be NULL-terminated.  For some callbacks
+   * (:type:`nghttp2_before_frame_send_callback`,
+   * :type:`nghttp2_on_frame_send_callback`, and
+   * :type:`nghttp2_on_frame_not_send_callback`), it may not be
+   * NULL-terminated if header field is passed from application with
+   * the flag :enum:`NGHTTP2_NV_FLAG_NO_COPY_NAME`).  When application
+   * is constructing this struct, |name| is not required to be
+   * NULL-terminated.
+   */
+  uint8_t *name;
+  /**
+   * The |value| byte string.  If this struct is presented from
+   * library (e.g., :type:`nghttp2_on_frame_recv_callback`), |value|
+   * is guaranteed to be NULL-terminated.  For some callbacks
+   * (:type:`nghttp2_before_frame_send_callback`,
+   * :type:`nghttp2_on_frame_send_callback`, and
+   * :type:`nghttp2_on_frame_not_send_callback`), it may not be
+   * NULL-terminated if header field is passed from application with
+   * the flag :enum:`NGHTTP2_NV_FLAG_NO_COPY_VALUE`).  When
+   * application is constructing this struct, |value| is not required
+   * to be NULL-terminated.
+   */
+  uint8_t *value;
+  /**
+   * The length of the |name|, excluding terminating NULL.
+   */
+  size_t namelen;
+  /**
+   * The length of the |value|, excluding terminating NULL.
+   */
+  size_t valuelen;
+  /**
+   * Bitwise OR of one or more of :type:`nghttp2_nv_flag`.
+   */
+  uint8_t flags;
+} nghttp2_nv;
+
+/**
+ * @enum
+ *
+ * The frame types in HTTP/2 specification.
+ */
+typedef enum {
+  /**
+   * The DATA frame.
+   */
+  NGHTTP2_DATA = 0,
+  /**
+   * The HEADERS frame.
+   */
+  NGHTTP2_HEADERS = 0x01,
+  /**
+   * The PRIORITY frame.
+   */
+  NGHTTP2_PRIORITY = 0x02,
+  /**
+   * The RST_STREAM frame.
+   */
+  NGHTTP2_RST_STREAM = 0x03,
+  /**
+   * The SETTINGS frame.
+   */
+  NGHTTP2_SETTINGS = 0x04,
+  /**
+   * The PUSH_PROMISE frame.
+   */
+  NGHTTP2_PUSH_PROMISE = 0x05,
+  /**
+   * The PING frame.
+   */
+  NGHTTP2_PING = 0x06,
+  /**
+   * The GOAWAY frame.
+   */
+  NGHTTP2_GOAWAY = 0x07,
+  /**
+   * The WINDOW_UPDATE frame.
+   */
+  NGHTTP2_WINDOW_UPDATE = 0x08,
+  /**
+   * The CONTINUATION frame.  This frame type won't be passed to any
+   * callbacks because the library processes this frame type and its
+   * preceding HEADERS/PUSH_PROMISE as a single frame.
+   */
+  NGHTTP2_CONTINUATION = 0x09,
+  /**
+   * The ALTSVC frame, which is defined in `RFC 7383
+   * <https://tools.ietf.org/html/rfc7838#section-4>`_.
+   */
+  NGHTTP2_ALTSVC = 0x0a,
+  /**
+   * The ORIGIN frame, which is defined by `RFC 8336
+   * <https://tools.ietf.org/html/rfc8336>`_.
+   */
+  NGHTTP2_ORIGIN = 0x0c
+} nghttp2_frame_type;
+
+/**
+ * @enum
+ *
+ * The flags for HTTP/2 frames.  This enum defines all flags for all
+ * frames.
+ */
+typedef enum {
+  /**
+   * No flag set.
+   */
+  NGHTTP2_FLAG_NONE = 0,
+  /**
+   * The END_STREAM flag.
+   */
+  NGHTTP2_FLAG_END_STREAM = 0x01,
+  /**
+   * The END_HEADERS flag.
+   */
+  NGHTTP2_FLAG_END_HEADERS = 0x04,
+  /**
+   * The ACK flag.
+   */
+  NGHTTP2_FLAG_ACK = 0x01,
+  /**
+   * The PADDED flag.
+   */
+  NGHTTP2_FLAG_PADDED = 0x08,
+  /**
+   * The PRIORITY flag.
+   */
+  NGHTTP2_FLAG_PRIORITY = 0x20
+} nghttp2_flag;
+
+/**
+ * @enum
+ * The SETTINGS ID.
+ */
+typedef enum {
+  /**
+   * SETTINGS_HEADER_TABLE_SIZE
+   */
+  NGHTTP2_SETTINGS_HEADER_TABLE_SIZE = 0x01,
+  /**
+   * SETTINGS_ENABLE_PUSH
+   */
+  NGHTTP2_SETTINGS_ENABLE_PUSH = 0x02,
+  /**
+   * SETTINGS_MAX_CONCURRENT_STREAMS
+   */
+  NGHTTP2_SETTINGS_MAX_CONCURRENT_STREAMS = 0x03,
+  /**
+   * SETTINGS_INITIAL_WINDOW_SIZE
+   */
+  NGHTTP2_SETTINGS_INITIAL_WINDOW_SIZE = 0x04,
+  /**
+   * SETTINGS_MAX_FRAME_SIZE
+   */
+  NGHTTP2_SETTINGS_MAX_FRAME_SIZE = 0x05,
+  /**
+   * SETTINGS_MAX_HEADER_LIST_SIZE
+   */
+  NGHTTP2_SETTINGS_MAX_HEADER_LIST_SIZE = 0x06,
+  /**
+   * SETTINGS_ENABLE_CONNECT_PROTOCOL
+   * (`RFC 8441 <https://tools.ietf.org/html/rfc8441>`_)
+   */
+  NGHTTP2_SETTINGS_ENABLE_CONNECT_PROTOCOL = 0x08
+} nghttp2_settings_id;
+/* Note: If we add SETTINGS, update the capacity of
+   NGHTTP2_INBOUND_NUM_IV as well */
+
+/**
+ * @macro
+ *
+ * .. warning::
+ *
+ *   Deprecated.  The initial max concurrent streams is 0xffffffffu.
+ *
+ * Default maximum number of incoming concurrent streams.  Use
+ * `nghttp2_submit_settings()` with
+ * :enum:`NGHTTP2_SETTINGS_MAX_CONCURRENT_STREAMS` to change the
+ * maximum number of incoming concurrent streams.
+ *
+ * .. note::
+ *
+ *   The maximum number of outgoing concurrent streams is 100 by
+ *   default.
+ */
+#define NGHTTP2_INITIAL_MAX_CONCURRENT_STREAMS ((1U << 31) - 1)
+
+/**
+ * @enum
+ * The status codes for the RST_STREAM and GOAWAY frames.
+ */
+typedef enum {
+  /**
+   * No errors.
+   */
+  NGHTTP2_NO_ERROR = 0x00,
+  /**
+   * PROTOCOL_ERROR
+   */
+  NGHTTP2_PROTOCOL_ERROR = 0x01,
+  /**
+   * INTERNAL_ERROR
+   */
+  NGHTTP2_INTERNAL_ERROR = 0x02,
+  /**
+   * FLOW_CONTROL_ERROR
+   */
+  NGHTTP2_FLOW_CONTROL_ERROR = 0x03,
+  /**
+   * SETTINGS_TIMEOUT
+   */
+  NGHTTP2_SETTINGS_TIMEOUT = 0x04,
+  /**
+   * STREAM_CLOSED
+   */
+  NGHTTP2_STREAM_CLOSED = 0x05,
+  /**
+   * FRAME_SIZE_ERROR
+   */
+  NGHTTP2_FRAME_SIZE_ERROR = 0x06,
+  /**
+   * REFUSED_STREAM
+   */
+  NGHTTP2_REFUSED_STREAM = 0x07,
+  /**
+   * CANCEL
+   */
+  NGHTTP2_CANCEL = 0x08,
+  /**
+   * COMPRESSION_ERROR
+   */
+  NGHTTP2_COMPRESSION_ERROR = 0x09,
+  /**
+   * CONNECT_ERROR
+   */
+  NGHTTP2_CONNECT_ERROR = 0x0a,
+  /**
+   * ENHANCE_YOUR_CALM
+   */
+  NGHTTP2_ENHANCE_YOUR_CALM = 0x0b,
+  /**
+   * INADEQUATE_SECURITY
+   */
+  NGHTTP2_INADEQUATE_SECURITY = 0x0c,
+  /**
+   * HTTP_1_1_REQUIRED
+   */
+  NGHTTP2_HTTP_1_1_REQUIRED = 0x0d
+} nghttp2_error_code;
+
+/**
+ * @struct
+ * The frame header.
+ */
+typedef struct {
+  /**
+   * The length field of this frame, excluding frame header.
+   */
+  size_t length;
+  /**
+   * The stream identifier (aka, stream ID)
+   */
+  int32_t stream_id;
+  /**
+   * The type of this frame.  See `nghttp2_frame_type`.
+   */
+  uint8_t type;
+  /**
+   * The flags.
+   */
+  uint8_t flags;
+  /**
+   * Reserved bit in frame header.  Currently, this is always set to 0
+   * and application should not expect something useful in here.
+   */
+  uint8_t reserved;
+} nghttp2_frame_hd;
+
+/**
+ * @union
+ *
+ * This union represents the some kind of data source passed to
+ * :type:`nghttp2_data_source_read_callback`.
+ */
+typedef union {
+  /**
+   * The integer field, suitable for a file descriptor.
+   */
+  int fd;
+  /**
+   * The pointer to an arbitrary object.
+   */
+  void *ptr;
+} nghttp2_data_source;
+
+/**
+ * @enum
+ *
+ * The flags used to set in |data_flags| output parameter in
+ * :type:`nghttp2_data_source_read_callback`.
+ */
+typedef enum {
+  /**
+   * No flag set.
+   */
+  NGHTTP2_DATA_FLAG_NONE = 0,
+  /**
+   * Indicates EOF was sensed.
+   */
+  NGHTTP2_DATA_FLAG_EOF = 0x01,
+  /**
+   * Indicates that END_STREAM flag must not be set even if
+   * NGHTTP2_DATA_FLAG_EOF is set.  Usually this flag is used to send
+   * trailer fields with `nghttp2_submit_request()` or
+   * `nghttp2_submit_response()`.
+   */
+  NGHTTP2_DATA_FLAG_NO_END_STREAM = 0x02,
+  /**
+   * Indicates that application will send complete DATA frame in
+   * :type:`nghttp2_send_data_callback`.
+   */
+  NGHTTP2_DATA_FLAG_NO_COPY = 0x04
+} nghttp2_data_flag;
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when the library wants to read data from
+ * the |source|.  The read data is sent in the stream |stream_id|.
+ * The implementation of this function must read at most |length|
+ * bytes of data from |source| (or possibly other places) and store
+ * them in |buf| and return number of data stored in |buf|.  If EOF is
+ * reached, set :enum:`NGHTTP2_DATA_FLAG_EOF` flag in |*data_flags|.
+ *
+ * Sometime it is desirable to avoid copying data into |buf| and let
+ * application to send data directly.  To achieve this, set
+ * :enum:`NGHTTP2_DATA_FLAG_NO_COPY` to |*data_flags| (and possibly
+ * other flags, just like when we do copy), and return the number of
+ * bytes to send without copying data into |buf|.  The library, seeing
+ * :enum:`NGHTTP2_DATA_FLAG_NO_COPY`, will invoke
+ * :type:`nghttp2_send_data_callback`.  The application must send
+ * complete DATA frame in that callback.
+ *
+ * If this callback is set by `nghttp2_submit_request()`,
+ * `nghttp2_submit_response()` or `nghttp2_submit_headers()` and
+ * `nghttp2_submit_data()` with flag parameter
+ * :enum:`NGHTTP2_FLAG_END_STREAM` set, and
+ * :enum:`NGHTTP2_DATA_FLAG_EOF` flag is set to |*data_flags|, DATA
+ * frame will have END_STREAM flag set.  Usually, this is expected
+ * behaviour and all are fine.  One exception is send trailer fields.
+ * You cannot send trailer fields after sending frame with END_STREAM
+ * set.  To avoid this problem, one can set
+ * :enum:`NGHTTP2_DATA_FLAG_NO_END_STREAM` along with
+ * :enum:`NGHTTP2_DATA_FLAG_EOF` to signal the library not to set
+ * END_STREAM in DATA frame.  Then application can use
+ * `nghttp2_submit_trailer()` to send trailer fields.
+ * `nghttp2_submit_trailer()` can be called inside this callback.
+ *
+ * If the application wants to postpone DATA frames (e.g.,
+ * asynchronous I/O, or reading data blocks for long time), it is
+ * achieved by returning :enum:`NGHTTP2_ERR_DEFERRED` without reading
+ * any data in this invocation.  The library removes DATA frame from
+ * the outgoing queue temporarily.  To move back deferred DATA frame
+ * to outgoing queue, call `nghttp2_session_resume_data()`.
+ *
+ * By default, |length| is limited to 16KiB at maximum.  If peer
+ * allows larger frames, application can enlarge transmission buffer
+ * size.  See :type:`nghttp2_data_source_read_length_callback` for
+ * more details.
+ *
+ * If the application just wants to return from
+ * `nghttp2_session_send()` or `nghttp2_session_mem_send()` without
+ * sending anything, return :enum:`NGHTTP2_ERR_PAUSE`.
+ *
+ * In case of error, there are 2 choices. Returning
+ * :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE` will close the stream
+ * by issuing RST_STREAM with :enum:`NGHTTP2_INTERNAL_ERROR`.  If a
+ * different error code is desirable, use
+ * `nghttp2_submit_rst_stream()` with a desired error code and then
+ * return :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE`.  Returning
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE` will signal the entire session
+ * failure.
+ */
+typedef ssize_t (*nghttp2_data_source_read_callback)(
+    nghttp2_session *session, int32_t stream_id, uint8_t *buf, size_t length,
+    uint32_t *data_flags, nghttp2_data_source *source, void *user_data);
+
+/**
+ * @struct
+ *
+ * This struct represents the data source and the way to read a chunk
+ * of data from it.
+ */
+typedef struct {
+  /**
+   * The data source.
+   */
+  nghttp2_data_source source;
+  /**
+   * The callback function to read a chunk of data from the |source|.
+   */
+  nghttp2_data_source_read_callback read_callback;
+} nghttp2_data_provider;
+
+/**
+ * @struct
+ *
+ * The DATA frame.  The received data is delivered via
+ * :type:`nghttp2_on_data_chunk_recv_callback`.
+ */
+typedef struct {
+  nghttp2_frame_hd hd;
+  /**
+   * The length of the padding in this frame.  This includes PAD_HIGH
+   * and PAD_LOW.
+   */
+  size_t padlen;
+} nghttp2_data;
+
+/**
+ * @enum
+ *
+ * The category of HEADERS, which indicates the role of the frame.  In
+ * HTTP/2 spec, request, response, push response and other arbitrary
+ * headers (e.g., trailer fields) are all called just HEADERS.  To
+ * give the application the role of incoming HEADERS frame, we define
+ * several categories.
+ */
+typedef enum {
+  /**
+   * The HEADERS frame is opening new stream, which is analogous to
+   * SYN_STREAM in SPDY.
+   */
+  NGHTTP2_HCAT_REQUEST = 0,
+  /**
+   * The HEADERS frame is the first response headers, which is
+   * analogous to SYN_REPLY in SPDY.
+   */
+  NGHTTP2_HCAT_RESPONSE = 1,
+  /**
+   * The HEADERS frame is the first headers sent against reserved
+   * stream.
+   */
+  NGHTTP2_HCAT_PUSH_RESPONSE = 2,
+  /**
+   * The HEADERS frame which does not apply for the above categories,
+   * which is analogous to HEADERS in SPDY.  If non-final response
+   * (e.g., status 1xx) is used, final response HEADERS frame will be
+   * categorized here.
+   */
+  NGHTTP2_HCAT_HEADERS = 3
+} nghttp2_headers_category;
+
+/**
+ * @struct
+ *
+ * The structure to specify stream dependency.
+ */
+typedef struct {
+  /**
+   * The stream ID of the stream to depend on.  Specifying 0 makes
+   * stream not depend any other stream.
+   */
+  int32_t stream_id;
+  /**
+   * The weight of this dependency.
+   */
+  int32_t weight;
+  /**
+   * nonzero means exclusive dependency
+   */
+  uint8_t exclusive;
+} nghttp2_priority_spec;
+
+/**
+ * @struct
+ *
+ * The HEADERS frame.  It has the following members:
+ */
+typedef struct {
+  /**
+   * The frame header.
+   */
+  nghttp2_frame_hd hd;
+  /**
+   * The length of the padding in this frame.  This includes PAD_HIGH
+   * and PAD_LOW.
+   */
+  size_t padlen;
+  /**
+   * The priority specification
+   */
+  nghttp2_priority_spec pri_spec;
+  /**
+   * The name/value pairs.
+   */
+  nghttp2_nv *nva;
+  /**
+   * The number of name/value pairs in |nva|.
+   */
+  size_t nvlen;
+  /**
+   * The category of this HEADERS frame.
+   */
+  nghttp2_headers_category cat;
+} nghttp2_headers;
+
+/**
+ * @struct
+ *
+ * The PRIORITY frame.  It has the following members:
+ */
+typedef struct {
+  /**
+   * The frame header.
+   */
+  nghttp2_frame_hd hd;
+  /**
+   * The priority specification.
+   */
+  nghttp2_priority_spec pri_spec;
+} nghttp2_priority;
+
+/**
+ * @struct
+ *
+ * The RST_STREAM frame.  It has the following members:
+ */
+typedef struct {
+  /**
+   * The frame header.
+   */
+  nghttp2_frame_hd hd;
+  /**
+   * The error code.  See :type:`nghttp2_error_code`.
+   */
+  uint32_t error_code;
+} nghttp2_rst_stream;
+
+/**
+ * @struct
+ *
+ * The SETTINGS ID/Value pair.  It has the following members:
+ */
+typedef struct {
+  /**
+   * The SETTINGS ID.  See :type:`nghttp2_settings_id`.
+   */
+  int32_t settings_id;
+  /**
+   * The value of this entry.
+   */
+  uint32_t value;
+} nghttp2_settings_entry;
+
+/**
+ * @struct
+ *
+ * The SETTINGS frame.  It has the following members:
+ */
+typedef struct {
+  /**
+   * The frame header.
+   */
+  nghttp2_frame_hd hd;
+  /**
+   * The number of SETTINGS ID/Value pairs in |iv|.
+   */
+  size_t niv;
+  /**
+   * The pointer to the array of SETTINGS ID/Value pair.
+   */
+  nghttp2_settings_entry *iv;
+} nghttp2_settings;
+
+/**
+ * @struct
+ *
+ * The PUSH_PROMISE frame.  It has the following members:
+ */
+typedef struct {
+  /**
+   * The frame header.
+   */
+  nghttp2_frame_hd hd;
+  /**
+   * The length of the padding in this frame.  This includes PAD_HIGH
+   * and PAD_LOW.
+   */
+  size_t padlen;
+  /**
+   * The name/value pairs.
+   */
+  nghttp2_nv *nva;
+  /**
+   * The number of name/value pairs in |nva|.
+   */
+  size_t nvlen;
+  /**
+   * The promised stream ID
+   */
+  int32_t promised_stream_id;
+  /**
+   * Reserved bit.  Currently this is always set to 0 and application
+   * should not expect something useful in here.
+   */
+  uint8_t reserved;
+} nghttp2_push_promise;
+
+/**
+ * @struct
+ *
+ * The PING frame.  It has the following members:
+ */
+typedef struct {
+  /**
+   * The frame header.
+   */
+  nghttp2_frame_hd hd;
+  /**
+   * The opaque data
+   */
+  uint8_t opaque_data[8];
+} nghttp2_ping;
+
+/**
+ * @struct
+ *
+ * The GOAWAY frame.  It has the following members:
+ */
+typedef struct {
+  /**
+   * The frame header.
+   */
+  nghttp2_frame_hd hd;
+  /**
+   * The last stream stream ID.
+   */
+  int32_t last_stream_id;
+  /**
+   * The error code.  See :type:`nghttp2_error_code`.
+   */
+  uint32_t error_code;
+  /**
+   * The additional debug data
+   */
+  uint8_t *opaque_data;
+  /**
+   * The length of |opaque_data| member.
+   */
+  size_t opaque_data_len;
+  /**
+   * Reserved bit.  Currently this is always set to 0 and application
+   * should not expect something useful in here.
+   */
+  uint8_t reserved;
+} nghttp2_goaway;
+
+/**
+ * @struct
+ *
+ * The WINDOW_UPDATE frame.  It has the following members:
+ */
+typedef struct {
+  /**
+   * The frame header.
+   */
+  nghttp2_frame_hd hd;
+  /**
+   * The window size increment.
+   */
+  int32_t window_size_increment;
+  /**
+   * Reserved bit.  Currently this is always set to 0 and application
+   * should not expect something useful in here.
+   */
+  uint8_t reserved;
+} nghttp2_window_update;
+
+/**
+ * @struct
+ *
+ * The extension frame.  It has following members:
+ */
+typedef struct {
+  /**
+   * The frame header.
+   */
+  nghttp2_frame_hd hd;
+  /**
+   * The pointer to extension payload.  The exact pointer type is
+   * determined by hd.type.
+   *
+   * Currently, no extension is supported.  This is a place holder for
+   * the future extensions.
+   */
+  void *payload;
+} nghttp2_extension;
+
+/**
+ * @union
+ *
+ * This union includes all frames to pass them to various function
+ * calls as nghttp2_frame type.  The CONTINUATION frame is omitted
+ * from here because the library deals with it internally.
+ */
+typedef union {
+  /**
+   * The frame header, which is convenient to inspect frame header.
+   */
+  nghttp2_frame_hd hd;
+  /**
+   * The DATA frame.
+   */
+  nghttp2_data data;
+  /**
+   * The HEADERS frame.
+   */
+  nghttp2_headers headers;
+  /**
+   * The PRIORITY frame.
+   */
+  nghttp2_priority priority;
+  /**
+   * The RST_STREAM frame.
+   */
+  nghttp2_rst_stream rst_stream;
+  /**
+   * The SETTINGS frame.
+   */
+  nghttp2_settings settings;
+  /**
+   * The PUSH_PROMISE frame.
+   */
+  nghttp2_push_promise push_promise;
+  /**
+   * The PING frame.
+   */
+  nghttp2_ping ping;
+  /**
+   * The GOAWAY frame.
+   */
+  nghttp2_goaway goaway;
+  /**
+   * The WINDOW_UPDATE frame.
+   */
+  nghttp2_window_update window_update;
+  /**
+   * The extension frame.
+   */
+  nghttp2_extension ext;
+} nghttp2_frame;
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when |session| wants to send data to the
+ * remote peer.  The implementation of this function must send at most
+ * |length| bytes of data stored in |data|.  The |flags| is currently
+ * not used and always 0. It must return the number of bytes sent if
+ * it succeeds.  If it cannot send any single byte without blocking,
+ * it must return :enum:`NGHTTP2_ERR_WOULDBLOCK`.  For other errors,
+ * it must return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  The
+ * |user_data| pointer is the third argument passed in to the call to
+ * `nghttp2_session_client_new()` or `nghttp2_session_server_new()`.
+ *
+ * This callback is required if the application uses
+ * `nghttp2_session_send()` to send data to the remote endpoint.  If
+ * the application uses solely `nghttp2_session_mem_send()` instead,
+ * this callback function is unnecessary.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_send_callback()`.
+ *
+ * .. note::
+ *
+ *   The |length| may be very small.  If that is the case, and
+ *   application disables Nagle algorithm (``TCP_NODELAY``), then just
+ *   writing |data| to the network stack leads to very small packet,
+ *   and it is very inefficient.  An application should be responsible
+ *   to buffer up small chunks of data as necessary to avoid this
+ *   situation.
+ */
+typedef ssize_t (*nghttp2_send_callback)(nghttp2_session *session,
+                                         const uint8_t *data, size_t length,
+                                         int flags, void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when :enum:`NGHTTP2_DATA_FLAG_NO_COPY` is
+ * used in :type:`nghttp2_data_source_read_callback` to send complete
+ * DATA frame.
+ *
+ * The |frame| is a DATA frame to send.  The |framehd| is the
+ * serialized frame header (9 bytes). The |length| is the length of
+ * application data to send (this does not include padding).  The
+ * |source| is the same pointer passed to
+ * :type:`nghttp2_data_source_read_callback`.
+ *
+ * The application first must send frame header |framehd| of length 9
+ * bytes.  If ``frame->data.padlen > 0``, send 1 byte of value
+ * ``frame->data.padlen - 1``.  Then send exactly |length| bytes of
+ * application data.  Finally, if ``frame->data.padlen > 1``, send
+ * ``frame->data.padlen - 1`` bytes of zero as padding.
+ *
+ * The application has to send complete DATA frame in this callback.
+ * If all data were written successfully, return 0.
+ *
+ * If it cannot send any data at all, just return
+ * :enum:`NGHTTP2_ERR_WOULDBLOCK`; the library will call this callback
+ * with the same parameters later (It is recommended to send complete
+ * DATA frame at once in this function to deal with error; if partial
+ * frame data has already sent, it is impossible to send another data
+ * in that state, and all we can do is tear down connection).  When
+ * data is fully processed, but application wants to make
+ * `nghttp2_session_mem_send()` or `nghttp2_session_send()` return
+ * immediately without processing next frames, return
+ * :enum:`NGHTTP2_ERR_PAUSE`.  If application decided to reset this
+ * stream, return :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE`, then
+ * the library will send RST_STREAM with INTERNAL_ERROR as error code.
+ * The application can also return
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`, which will result in
+ * connection closure.  Returning any other value is treated as
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE` is returned.
+ */
+typedef int (*nghttp2_send_data_callback)(nghttp2_session *session,
+                                          nghttp2_frame *frame,
+                                          const uint8_t *framehd, size_t length,
+                                          nghttp2_data_source *source,
+                                          void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when |session| wants to receive data from
+ * the remote peer.  The implementation of this function must read at
+ * most |length| bytes of data and store it in |buf|.  The |flags| is
+ * currently not used and always 0.  It must return the number of
+ * bytes written in |buf| if it succeeds.  If it cannot read any
+ * single byte without blocking, it must return
+ * :enum:`NGHTTP2_ERR_WOULDBLOCK`.  If it gets EOF before it reads any
+ * single byte, it must return :enum:`NGHTTP2_ERR_EOF`.  For other
+ * errors, it must return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ * Returning 0 is treated as :enum:`NGHTTP2_ERR_WOULDBLOCK`.  The
+ * |user_data| pointer is the third argument passed in to the call to
+ * `nghttp2_session_client_new()` or `nghttp2_session_server_new()`.
+ *
+ * This callback is required if the application uses
+ * `nghttp2_session_recv()` to receive data from the remote endpoint.
+ * If the application uses solely `nghttp2_session_mem_recv()`
+ * instead, this callback function is unnecessary.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_recv_callback()`.
+ */
+typedef ssize_t (*nghttp2_recv_callback)(nghttp2_session *session, uint8_t *buf,
+                                         size_t length, int flags,
+                                         void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked by `nghttp2_session_recv()` and
+ * `nghttp2_session_mem_recv()` when a frame is received.  The
+ * |user_data| pointer is the third argument passed in to the call to
+ * `nghttp2_session_client_new()` or `nghttp2_session_server_new()`.
+ *
+ * If frame is HEADERS or PUSH_PROMISE, the ``nva`` and ``nvlen``
+ * member of their data structure are always ``NULL`` and 0
+ * respectively.  The header name/value pairs are emitted via
+ * :type:`nghttp2_on_header_callback`.
+ *
+ * For HEADERS, PUSH_PROMISE and DATA frames, this callback may be
+ * called after stream is closed (see
+ * :type:`nghttp2_on_stream_close_callback`).  The application should
+ * check that stream is still alive using its own stream management or
+ * :func:`nghttp2_session_get_stream_user_data()`.
+ *
+ * Only HEADERS and DATA frame can signal the end of incoming data.
+ * If ``frame->hd.flags & NGHTTP2_FLAG_END_STREAM`` is nonzero, the
+ * |frame| is the last frame from the remote peer in this stream.
+ *
+ * This callback won't be called for CONTINUATION frames.
+ * HEADERS/PUSH_PROMISE + CONTINUATIONs are treated as single frame.
+ *
+ * The implementation of this function must return 0 if it succeeds.
+ * If nonzero value is returned, it is treated as fatal error and
+ * `nghttp2_session_recv()` and `nghttp2_session_mem_recv()` functions
+ * immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_on_frame_recv_callback()`.
+ */
+typedef int (*nghttp2_on_frame_recv_callback)(nghttp2_session *session,
+                                              const nghttp2_frame *frame,
+                                              void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked by `nghttp2_session_recv()` and
+ * `nghttp2_session_mem_recv()` when an invalid non-DATA frame is
+ * received.  The error is indicated by the |lib_error_code|, which is
+ * one of the values defined in :type:`nghttp2_error`.  When this
+ * callback function is invoked, the library automatically submits
+ * either RST_STREAM or GOAWAY frame.  The |user_data| pointer is the
+ * third argument passed in to the call to
+ * `nghttp2_session_client_new()` or `nghttp2_session_server_new()`.
+ *
+ * If frame is HEADERS or PUSH_PROMISE, the ``nva`` and ``nvlen``
+ * member of their data structure are always ``NULL`` and 0
+ * respectively.
+ *
+ * The implementation of this function must return 0 if it succeeds.
+ * If nonzero is returned, it is treated as fatal error and
+ * `nghttp2_session_recv()` and `nghttp2_session_mem_recv()` functions
+ * immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_on_invalid_frame_recv_callback()`.
+ */
+typedef int (*nghttp2_on_invalid_frame_recv_callback)(
+    nghttp2_session *session, const nghttp2_frame *frame, int lib_error_code,
+    void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when a chunk of data in DATA frame is
+ * received.  The |stream_id| is the stream ID this DATA frame belongs
+ * to.  The |flags| is the flags of DATA frame which this data chunk
+ * is contained.  ``(flags & NGHTTP2_FLAG_END_STREAM) != 0`` does not
+ * necessarily mean this chunk of data is the last one in the stream.
+ * You should use :type:`nghttp2_on_frame_recv_callback` to know all
+ * data frames are received.  The |user_data| pointer is the third
+ * argument passed in to the call to `nghttp2_session_client_new()` or
+ * `nghttp2_session_server_new()`.
+ *
+ * If the application uses `nghttp2_session_mem_recv()`, it can return
+ * :enum:`NGHTTP2_ERR_PAUSE` to make `nghttp2_session_mem_recv()`
+ * return without processing further input bytes.  The memory by
+ * pointed by the |data| is retained until
+ * `nghttp2_session_mem_recv()` or `nghttp2_session_recv()` is called.
+ * The application must retain the input bytes which was used to
+ * produce the |data| parameter, because it may refer to the memory
+ * region included in the input bytes.
+ *
+ * The implementation of this function must return 0 if it succeeds.
+ * If nonzero is returned, it is treated as fatal error, and
+ * `nghttp2_session_recv()` and `nghttp2_session_mem_recv()` functions
+ * immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_on_data_chunk_recv_callback()`.
+ */
+typedef int (*nghttp2_on_data_chunk_recv_callback)(nghttp2_session *session,
+                                                   uint8_t flags,
+                                                   int32_t stream_id,
+                                                   const uint8_t *data,
+                                                   size_t len, void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked just before the non-DATA frame |frame| is
+ * sent.  The |user_data| pointer is the third argument passed in to
+ * the call to `nghttp2_session_client_new()` or
+ * `nghttp2_session_server_new()`.
+ *
+ * The implementation of this function must return 0 if it succeeds.
+ * It can also return :enum:`NGHTTP2_ERR_CANCEL` to cancel the
+ * transmission of the given frame.
+ *
+ * If there is a fatal error while executing this callback, the
+ * implementation should return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`,
+ * which makes `nghttp2_session_send()` and
+ * `nghttp2_session_mem_send()` functions immediately return
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ *
+ * If the other value is returned, it is treated as if
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE` is returned.  But the
+ * implementation should not rely on this since the library may define
+ * new return value to extend its capability.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_before_frame_send_callback()`.
+ */
+typedef int (*nghttp2_before_frame_send_callback)(nghttp2_session *session,
+                                                  const nghttp2_frame *frame,
+                                                  void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked after the frame |frame| is sent.  The
+ * |user_data| pointer is the third argument passed in to the call to
+ * `nghttp2_session_client_new()` or `nghttp2_session_server_new()`.
+ *
+ * The implementation of this function must return 0 if it succeeds.
+ * If nonzero is returned, it is treated as fatal error and
+ * `nghttp2_session_send()` and `nghttp2_session_mem_send()` functions
+ * immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_on_frame_send_callback()`.
+ */
+typedef int (*nghttp2_on_frame_send_callback)(nghttp2_session *session,
+                                              const nghttp2_frame *frame,
+                                              void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked after the non-DATA frame |frame| is not
+ * sent because of the error.  The error is indicated by the
+ * |lib_error_code|, which is one of the values defined in
+ * :type:`nghttp2_error`.  The |user_data| pointer is the third
+ * argument passed in to the call to `nghttp2_session_client_new()` or
+ * `nghttp2_session_server_new()`.
+ *
+ * The implementation of this function must return 0 if it succeeds.
+ * If nonzero is returned, it is treated as fatal error and
+ * `nghttp2_session_send()` and `nghttp2_session_mem_send()` functions
+ * immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ *
+ * `nghttp2_session_get_stream_user_data()` can be used to get
+ * associated data.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_on_frame_not_send_callback()`.
+ */
+typedef int (*nghttp2_on_frame_not_send_callback)(nghttp2_session *session,
+                                                  const nghttp2_frame *frame,
+                                                  int lib_error_code,
+                                                  void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when the stream |stream_id| is closed.
+ * The reason of closure is indicated by the |error_code|.  The
+ * |error_code| is usually one of :enum:`nghttp2_error_code`, but that
+ * is not guaranteed.  The stream_user_data, which was specified in
+ * `nghttp2_submit_request()` or `nghttp2_submit_headers()`, is still
+ * available in this function.  The |user_data| pointer is the third
+ * argument passed in to the call to `nghttp2_session_client_new()` or
+ * `nghttp2_session_server_new()`.
+ *
+ * This function is also called for a stream in reserved state.
+ *
+ * The implementation of this function must return 0 if it succeeds.
+ * If nonzero is returned, it is treated as fatal error and
+ * `nghttp2_session_recv()`, `nghttp2_session_mem_recv()`,
+ * `nghttp2_session_send()`, and `nghttp2_session_mem_send()`
+ * functions immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_on_stream_close_callback()`.
+ */
+typedef int (*nghttp2_on_stream_close_callback)(nghttp2_session *session,
+                                                int32_t stream_id,
+                                                uint32_t error_code,
+                                                void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when the reception of header block in
+ * HEADERS or PUSH_PROMISE is started.  Each header name/value pair
+ * will be emitted by :type:`nghttp2_on_header_callback`.
+ *
+ * The ``frame->hd.flags`` may not have
+ * :enum:`NGHTTP2_FLAG_END_HEADERS` flag set, which indicates that one
+ * or more CONTINUATION frames are involved.  But the application does
+ * not need to care about that because the header name/value pairs are
+ * emitted transparently regardless of CONTINUATION frames.
+ *
+ * The server applications probably create an object to store
+ * information about new stream if ``frame->hd.type ==
+ * NGHTTP2_HEADERS`` and ``frame->headers.cat ==
+ * NGHTTP2_HCAT_REQUEST``.  If |session| is configured as server side,
+ * ``frame->headers.cat`` is either ``NGHTTP2_HCAT_REQUEST``
+ * containing request headers or ``NGHTTP2_HCAT_HEADERS`` containing
+ * trailer fields and never get PUSH_PROMISE in this callback.
+ *
+ * For the client applications, ``frame->hd.type`` is either
+ * ``NGHTTP2_HEADERS`` or ``NGHTTP2_PUSH_PROMISE``.  In case of
+ * ``NGHTTP2_HEADERS``, ``frame->headers.cat ==
+ * NGHTTP2_HCAT_RESPONSE`` means that it is the first response
+ * headers, but it may be non-final response which is indicated by 1xx
+ * status code.  In this case, there may be zero or more HEADERS frame
+ * with ``frame->headers.cat == NGHTTP2_HCAT_HEADERS`` which has
+ * non-final response code and finally client gets exactly one HEADERS
+ * frame with ``frame->headers.cat == NGHTTP2_HCAT_HEADERS``
+ * containing final response headers (non-1xx status code).  The
+ * trailer fields also has ``frame->headers.cat ==
+ * NGHTTP2_HCAT_HEADERS`` which does not contain any status code.
+ *
+ * Returning :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE` will close
+ * the stream (promised stream if frame is PUSH_PROMISE) by issuing
+ * RST_STREAM with :enum:`NGHTTP2_INTERNAL_ERROR`.  In this case,
+ * :type:`nghttp2_on_header_callback` and
+ * :type:`nghttp2_on_frame_recv_callback` will not be invoked.  If a
+ * different error code is desirable, use
+ * `nghttp2_submit_rst_stream()` with a desired error code and then
+ * return :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE`.  Again, use
+ * ``frame->push_promise.promised_stream_id`` as stream_id parameter
+ * in `nghttp2_submit_rst_stream()` if frame is PUSH_PROMISE.
+ *
+ * The implementation of this function must return 0 if it succeeds.
+ * It can return :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE` to
+ * reset the stream (promised stream if frame is PUSH_PROMISE).  For
+ * critical errors, it must return
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  If the other value is
+ * returned, it is treated as if :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`
+ * is returned.  If :enum:`NGHTTP2_ERR_CALLBACK_FAILURE` is returned,
+ * `nghttp2_session_mem_recv()` function will immediately return
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_on_begin_headers_callback()`.
+ */
+typedef int (*nghttp2_on_begin_headers_callback)(nghttp2_session *session,
+                                                 const nghttp2_frame *frame,
+                                                 void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when a header name/value pair is received
+ * for the |frame|.  The |name| of length |namelen| is header name.
+ * The |value| of length |valuelen| is header value.  The |flags| is
+ * bitwise OR of one or more of :type:`nghttp2_nv_flag`.
+ *
+ * If :enum:`NGHTTP2_NV_FLAG_NO_INDEX` is set in |flags|, the receiver
+ * must not index this name/value pair when forwarding it to the next
+ * hop.  More specifically, "Literal Header Field never Indexed"
+ * representation must be used in HPACK encoding.
+ *
+ * When this callback is invoked, ``frame->hd.type`` is either
+ * :enum:`NGHTTP2_HEADERS` or :enum:`NGHTTP2_PUSH_PROMISE`.  After all
+ * header name/value pairs are processed with this callback, and no
+ * error has been detected, :type:`nghttp2_on_frame_recv_callback`
+ * will be invoked.  If there is an error in decompression,
+ * :type:`nghttp2_on_frame_recv_callback` for the |frame| will not be
+ * invoked.
+ *
+ * Both |name| and |value| are guaranteed to be NULL-terminated.  The
+ * |namelen| and |valuelen| do not include terminal NULL.  If
+ * `nghttp2_option_set_no_http_messaging()` is used with nonzero
+ * value, NULL character may be included in |name| or |value| before
+ * terminating NULL.
+ *
+ * Please note that unless `nghttp2_option_set_no_http_messaging()` is
+ * used, nghttp2 library does perform validation against the |name|
+ * and the |value| using `nghttp2_check_header_name()` and
+ * `nghttp2_check_header_value()`.  In addition to this, nghttp2
+ * performs validation based on HTTP Messaging rule, which is briefly
+ * explained in :ref:`http-messaging` section.
+ *
+ * If the application uses `nghttp2_session_mem_recv()`, it can return
+ * :enum:`NGHTTP2_ERR_PAUSE` to make `nghttp2_session_mem_recv()`
+ * return without processing further input bytes.  The memory pointed
+ * by |frame|, |name| and |value| parameters are retained until
+ * `nghttp2_session_mem_recv()` or `nghttp2_session_recv()` is called.
+ * The application must retain the input bytes which was used to
+ * produce these parameters, because it may refer to the memory region
+ * included in the input bytes.
+ *
+ * Returning :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE` will close
+ * the stream (promised stream if frame is PUSH_PROMISE) by issuing
+ * RST_STREAM with :enum:`NGHTTP2_INTERNAL_ERROR`.  In this case,
+ * :type:`nghttp2_on_header_callback` and
+ * :type:`nghttp2_on_frame_recv_callback` will not be invoked.  If a
+ * different error code is desirable, use
+ * `nghttp2_submit_rst_stream()` with a desired error code and then
+ * return :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE`.  Again, use
+ * ``frame->push_promise.promised_stream_id`` as stream_id parameter
+ * in `nghttp2_submit_rst_stream()` if frame is PUSH_PROMISE.
+ *
+ * The implementation of this function must return 0 if it succeeds.
+ * It may return :enum:`NGHTTP2_ERR_PAUSE` or
+ * :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE`.  For other critical
+ * failures, it must return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  If
+ * the other nonzero value is returned, it is treated as
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  If
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE` is returned,
+ * `nghttp2_session_recv()` and `nghttp2_session_mem_recv()` functions
+ * immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_on_header_callback()`.
+ *
+ * .. warning::
+ *
+ *   Application should properly limit the total buffer size to store
+ *   incoming header fields.  Without it, peer may send large number
+ *   of header fields or large header fields to cause out of memory in
+ *   local endpoint.  Due to how HPACK works, peer can do this
+ *   effectively without using much memory on their own.
+ */
+typedef int (*nghttp2_on_header_callback)(nghttp2_session *session,
+                                          const nghttp2_frame *frame,
+                                          const uint8_t *name, size_t namelen,
+                                          const uint8_t *value, size_t valuelen,
+                                          uint8_t flags, void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when a header name/value pair is received
+ * for the |frame|.  The |name| is header name.  The |value| is header
+ * value.  The |flags| is bitwise OR of one or more of
+ * :type:`nghttp2_nv_flag`.
+ *
+ * This callback behaves like :type:`nghttp2_on_header_callback`,
+ * except that |name| and |value| are stored in reference counted
+ * buffer.  If application wishes to keep these references without
+ * copying them, use `nghttp2_rcbuf_incref()` to increment their
+ * reference count.  It is the application's responsibility to call
+ * `nghttp2_rcbuf_decref()` if they called `nghttp2_rcbuf_incref()` so
+ * as not to leak memory.  If the |session| is created by
+ * `nghttp2_session_server_new3()` or `nghttp2_session_client_new3()`,
+ * the function to free memory is the one belongs to the mem
+ * parameter.  As long as this free function alives, |name| and
+ * |value| can live after |session| was destroyed.
+ */
+typedef int (*nghttp2_on_header_callback2)(nghttp2_session *session,
+                                           const nghttp2_frame *frame,
+                                           nghttp2_rcbuf *name,
+                                           nghttp2_rcbuf *value, uint8_t flags,
+                                           void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when a invalid header name/value pair is
+ * received for the |frame|.
+ *
+ * The parameter and behaviour are similar to
+ * :type:`nghttp2_on_header_callback`.  The difference is that this
+ * callback is only invoked when a invalid header name/value pair is
+ * received which is treated as stream error if this callback is not
+ * set.  Only invalid regular header field are passed to this
+ * callback.  In other words, invalid pseudo header field is not
+ * passed to this callback.  Also header fields which includes upper
+ * cased latter are also treated as error without passing them to this
+ * callback.
+ *
+ * This callback is only considered if HTTP messaging validation is
+ * turned on (which is on by default, see
+ * `nghttp2_option_set_no_http_messaging()`).
+ *
+ * With this callback, application inspects the incoming invalid
+ * field, and it also can reset stream from this callback by returning
+ * :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE`.  By default, the
+ * error code is :enum:`NGHTTP2_PROTOCOL_ERROR`.  To change the error
+ * code, call `nghttp2_submit_rst_stream()` with the error code of
+ * choice in addition to returning
+ * :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE`.
+ *
+ * If 0 is returned, the header field is ignored, and the stream is
+ * not reset.
+ */
+typedef int (*nghttp2_on_invalid_header_callback)(
+    nghttp2_session *session, const nghttp2_frame *frame, const uint8_t *name,
+    size_t namelen, const uint8_t *value, size_t valuelen, uint8_t flags,
+    void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when a invalid header name/value pair is
+ * received for the |frame|.
+ *
+ * The parameter and behaviour are similar to
+ * :type:`nghttp2_on_header_callback2`.  The difference is that this
+ * callback is only invoked when a invalid header name/value pair is
+ * received which is silently ignored if this callback is not set.
+ * Only invalid regular header field are passed to this callback.  In
+ * other words, invalid pseudo header field is not passed to this
+ * callback.  Also header fields which includes upper cased latter are
+ * also treated as error without passing them to this callback.
+ *
+ * This callback is only considered if HTTP messaging validation is
+ * turned on (which is on by default, see
+ * `nghttp2_option_set_no_http_messaging()`).
+ *
+ * With this callback, application inspects the incoming invalid
+ * field, and it also can reset stream from this callback by returning
+ * :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE`.  By default, the
+ * error code is :enum:`NGHTTP2_INTERNAL_ERROR`.  To change the error
+ * code, call `nghttp2_submit_rst_stream()` with the error code of
+ * choice in addition to returning
+ * :enum:`NGHTTP2_ERR_TEMPORAL_CALLBACK_FAILURE`.
+ */
+typedef int (*nghttp2_on_invalid_header_callback2)(
+    nghttp2_session *session, const nghttp2_frame *frame, nghttp2_rcbuf *name,
+    nghttp2_rcbuf *value, uint8_t flags, void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when the library asks application how
+ * many padding bytes are required for the transmission of the
+ * |frame|.  The application must choose the total length of payload
+ * including padded bytes in range [frame->hd.length, max_payloadlen],
+ * inclusive.  Choosing number not in this range will be treated as
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  Returning
+ * ``frame->hd.length`` means no padding is added.  Returning
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE` will make
+ * `nghttp2_session_send()` and `nghttp2_session_mem_send()` functions
+ * immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_select_padding_callback()`.
+ */
+typedef ssize_t (*nghttp2_select_padding_callback)(nghttp2_session *session,
+                                                   const nghttp2_frame *frame,
+                                                   size_t max_payloadlen,
+                                                   void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when library wants to get max length of
+ * data to send data to the remote peer.  The implementation of this
+ * function should return a value in the following range.  [1,
+ * min(|session_remote_window_size|, |stream_remote_window_size|,
+ * |remote_max_frame_size|)].  If a value greater than this range is
+ * returned than the max allow value will be used.  Returning a value
+ * smaller than this range is treated as
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  The |frame_type| is provided
+ * for future extensibility and identifies the type of frame (see
+ * :type:`nghttp2_frame_type`) for which to get the length for.
+ * Currently supported frame types are: :enum:`NGHTTP2_DATA`.
+ *
+ * This callback can be used to control the length in bytes for which
+ * :type:`nghttp2_data_source_read_callback` is allowed to send to the
+ * remote endpoint.  This callback is optional.  Returning
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE` will signal the entire session
+ * failure.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_data_source_read_length_callback()`.
+ */
+typedef ssize_t (*nghttp2_data_source_read_length_callback)(
+    nghttp2_session *session, uint8_t frame_type, int32_t stream_id,
+    int32_t session_remote_window_size, int32_t stream_remote_window_size,
+    uint32_t remote_max_frame_size, void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when a frame header is received.  The
+ * |hd| points to received frame header.
+ *
+ * Unlike :type:`nghttp2_on_frame_recv_callback`, this callback will
+ * also be called when frame header of CONTINUATION frame is received.
+ *
+ * If both :type:`nghttp2_on_begin_frame_callback` and
+ * :type:`nghttp2_on_begin_headers_callback` are set and HEADERS or
+ * PUSH_PROMISE is received, :type:`nghttp2_on_begin_frame_callback`
+ * will be called first.
+ *
+ * The implementation of this function must return 0 if it succeeds.
+ * If nonzero value is returned, it is treated as fatal error and
+ * `nghttp2_session_recv()` and `nghttp2_session_mem_recv()` functions
+ * immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ *
+ * To set this callback to :type:`nghttp2_session_callbacks`, use
+ * `nghttp2_session_callbacks_set_on_begin_frame_callback()`.
+ */
+typedef int (*nghttp2_on_begin_frame_callback)(nghttp2_session *session,
+                                               const nghttp2_frame_hd *hd,
+                                               void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when chunk of extension frame payload is
+ * received.  The |hd| points to frame header.  The received
+ * chunk is |data| of length |len|.
+ *
+ * The implementation of this function must return 0 if it succeeds.
+ *
+ * To abort processing this extension frame, return
+ * :enum:`NGHTTP2_ERR_CANCEL`.
+ *
+ * If fatal error occurred, application should return
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  In this case,
+ * `nghttp2_session_recv()` and `nghttp2_session_mem_recv()` functions
+ * immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  If the
+ * other values are returned, currently they are treated as
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ */
+typedef int (*nghttp2_on_extension_chunk_recv_callback)(
+    nghttp2_session *session, const nghttp2_frame_hd *hd, const uint8_t *data,
+    size_t len, void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when library asks the application to
+ * unpack extension payload from its wire format.  The extension
+ * payload has been passed to the application using
+ * :type:`nghttp2_on_extension_chunk_recv_callback`.  The frame header
+ * is already unpacked by the library and provided as |hd|.
+ *
+ * To receive extension frames, the application must tell desired
+ * extension frame type to the library using
+ * `nghttp2_option_set_user_recv_extension_type()`.
+ *
+ * The implementation of this function may store the pointer to the
+ * created object as a result of unpacking in |*payload|, and returns
+ * 0.  The pointer stored in |*payload| is opaque to the library, and
+ * the library does not own its pointer.  |*payload| is initialized as
+ * ``NULL``.  The |*payload| is available as ``frame->ext.payload`` in
+ * :type:`nghttp2_on_frame_recv_callback`.  Therefore if application
+ * can free that memory inside :type:`nghttp2_on_frame_recv_callback`
+ * callback.  Of course, application has a liberty not ot use
+ * |*payload|, and do its own mechanism to process extension frames.
+ *
+ * To abort processing this extension frame, return
+ * :enum:`NGHTTP2_ERR_CANCEL`.
+ *
+ * If fatal error occurred, application should return
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  In this case,
+ * `nghttp2_session_recv()` and `nghttp2_session_mem_recv()` functions
+ * immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  If the
+ * other values are returned, currently they are treated as
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ */
+typedef int (*nghttp2_unpack_extension_callback)(nghttp2_session *session,
+                                                 void **payload,
+                                                 const nghttp2_frame_hd *hd,
+                                                 void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when library asks the application to pack
+ * extension payload in its wire format.  The frame header will be
+ * packed by library.  Application must pack payload only.
+ * ``frame->ext.payload`` is the object passed to
+ * `nghttp2_submit_extension()` as payload parameter.  Application
+ * must pack extension payload to the |buf| of its capacity |len|
+ * bytes.  The |len| is at least 16KiB.
+ *
+ * The implementation of this function should return the number of
+ * bytes written into |buf| when it succeeds.
+ *
+ * To abort processing this extension frame, return
+ * :enum:`NGHTTP2_ERR_CANCEL`, and
+ * :type:`nghttp2_on_frame_not_send_callback` will be invoked.
+ *
+ * If fatal error occurred, application should return
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  In this case,
+ * `nghttp2_session_send()` and `nghttp2_session_mem_send()` functions
+ * immediately return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  If the
+ * other values are returned, currently they are treated as
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  If the return value is
+ * strictly larger than |len|, it is treated as
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.
+ */
+typedef ssize_t (*nghttp2_pack_extension_callback)(nghttp2_session *session,
+                                                   uint8_t *buf, size_t len,
+                                                   const nghttp2_frame *frame,
+                                                   void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when library provides the error message
+ * intended for human consumption.  This callback is solely for
+ * debugging purpose.  The |msg| is typically NULL-terminated string
+ * of length |len|.  |len| does not include the sentinel NULL
+ * character.
+ *
+ * This function is deprecated.  The new application should use
+ * :type:`nghttp2_error_callback2`.
+ *
+ * The format of error message may change between nghttp2 library
+ * versions.  The application should not depend on the particular
+ * format.
+ *
+ * Normally, application should return 0 from this callback.  If fatal
+ * error occurred while doing something in this callback, application
+ * should return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  In this case,
+ * library will return immediately with return value
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  Currently, if nonzero value
+ * is returned from this callback, they are treated as
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`, but application should not
+ * rely on this details.
+ */
+typedef int (*nghttp2_error_callback)(nghttp2_session *session, const char *msg,
+                                      size_t len, void *user_data);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when library provides the error code, and
+ * message.  This callback is solely for debugging purpose.
+ * |lib_error_code| is one of error code defined in
+ * :enum:`nghttp2_error`.  The |msg| is typically NULL-terminated
+ * string of length |len|, and intended for human consumption.  |len|
+ * does not include the sentinel NULL character.
+ *
+ * The format of error message may change between nghttp2 library
+ * versions.  The application should not depend on the particular
+ * format.
+ *
+ * Normally, application should return 0 from this callback.  If fatal
+ * error occurred while doing something in this callback, application
+ * should return :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  In this case,
+ * library will return immediately with return value
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`.  Currently, if nonzero value
+ * is returned from this callback, they are treated as
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`, but application should not
+ * rely on this details.
+ */
+typedef int (*nghttp2_error_callback2)(nghttp2_session *session,
+                                       int lib_error_code, const char *msg,
+                                       size_t len, void *user_data);
+
+struct nghttp2_session_callbacks;
+
+/**
+ * @struct
+ *
+ * Callback functions for :type:`nghttp2_session`.  The details of
+ * this structure are intentionally hidden from the public API.
+ */
+typedef struct nghttp2_session_callbacks nghttp2_session_callbacks;
+
+/**
+ * @function
+ *
+ * Initializes |*callbacks_ptr| with NULL values.
+ *
+ * The initialized object can be used when initializing multiple
+ * :type:`nghttp2_session` objects.
+ *
+ * When the application finished using this object, it can use
+ * `nghttp2_session_callbacks_del()` to free its memory.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_callbacks_new(nghttp2_session_callbacks **callbacks_ptr);
+
+/**
+ * @function
+ *
+ * Frees any resources allocated for |callbacks|.  If |callbacks| is
+ * ``NULL``, this function does nothing.
+ */
+NGHTTP2_EXTERN void
+nghttp2_session_callbacks_del(nghttp2_session_callbacks *callbacks);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when a session wants to send data to
+ * the remote peer.  This callback is not necessary if the application
+ * uses solely `nghttp2_session_mem_send()` to serialize data to
+ * transmit.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_send_callback(
+    nghttp2_session_callbacks *cbs, nghttp2_send_callback send_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when the a session wants to receive
+ * data from the remote peer.  This callback is not necessary if the
+ * application uses solely `nghttp2_session_mem_recv()` to process
+ * received data.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_recv_callback(
+    nghttp2_session_callbacks *cbs, nghttp2_recv_callback recv_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked by `nghttp2_session_recv()` and
+ * `nghttp2_session_mem_recv()` when a frame is received.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_on_frame_recv_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_frame_recv_callback on_frame_recv_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked by `nghttp2_session_recv()` and
+ * `nghttp2_session_mem_recv()` when an invalid non-DATA frame is
+ * received.
+ */
+NGHTTP2_EXTERN void
+nghttp2_session_callbacks_set_on_invalid_frame_recv_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_invalid_frame_recv_callback on_invalid_frame_recv_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when a chunk of data in DATA frame
+ * is received.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_on_data_chunk_recv_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_data_chunk_recv_callback on_data_chunk_recv_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked before a non-DATA frame is sent.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_before_frame_send_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_before_frame_send_callback before_frame_send_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked after a frame is sent.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_on_frame_send_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_frame_send_callback on_frame_send_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when a non-DATA frame is not sent
+ * because of an error.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_on_frame_not_send_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_frame_not_send_callback on_frame_not_send_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when the stream is closed.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_on_stream_close_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_stream_close_callback on_stream_close_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when the reception of header block
+ * in HEADERS or PUSH_PROMISE is started.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_on_begin_headers_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_begin_headers_callback on_begin_headers_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when a header name/value pair is
+ * received.  If both
+ * `nghttp2_session_callbacks_set_on_header_callback()` and
+ * `nghttp2_session_callbacks_set_on_header_callback2()` are used to
+ * set callbacks, the latter has the precedence.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_on_header_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_header_callback on_header_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when a header name/value pair is
+ * received.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_on_header_callback2(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_header_callback2 on_header_callback2);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when a invalid header name/value
+ * pair is received.  If both
+ * `nghttp2_session_callbacks_set_on_invalid_header_callback()` and
+ * `nghttp2_session_callbacks_set_on_invalid_header_callback2()` are
+ * used to set callbacks, the latter takes the precedence.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_on_invalid_header_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_invalid_header_callback on_invalid_header_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when a invalid header name/value
+ * pair is received.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_on_invalid_header_callback2(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_invalid_header_callback2 on_invalid_header_callback2);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when the library asks application
+ * how many padding bytes are required for the transmission of the
+ * given frame.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_select_padding_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_select_padding_callback select_padding_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function determine the length allowed in
+ * :type:`nghttp2_data_source_read_callback`.
+ */
+NGHTTP2_EXTERN void
+nghttp2_session_callbacks_set_data_source_read_length_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_data_source_read_length_callback data_source_read_length_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when a frame header is received.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_on_begin_frame_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_begin_frame_callback on_begin_frame_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when
+ * :enum:`NGHTTP2_DATA_FLAG_NO_COPY` is used in
+ * :type:`nghttp2_data_source_read_callback` to avoid data copy.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_send_data_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_send_data_callback send_data_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when the library asks the
+ * application to pack extension frame payload in wire format.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_pack_extension_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_pack_extension_callback pack_extension_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when the library asks the
+ * application to unpack extension frame payload from wire format.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_unpack_extension_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_unpack_extension_callback unpack_extension_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when chunk of extension frame
+ * payload is received.
+ */
+NGHTTP2_EXTERN void
+nghttp2_session_callbacks_set_on_extension_chunk_recv_callback(
+    nghttp2_session_callbacks *cbs,
+    nghttp2_on_extension_chunk_recv_callback on_extension_chunk_recv_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when library tells error message to
+ * the application.
+ *
+ * This function is deprecated.  The new application should use
+ * `nghttp2_session_callbacks_set_error_callback2()`.
+ *
+ * If both :type:`nghttp2_error_callback` and
+ * :type:`nghttp2_error_callback2` are set, the latter takes
+ * precedence.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_error_callback(
+    nghttp2_session_callbacks *cbs, nghttp2_error_callback error_callback);
+
+/**
+ * @function
+ *
+ * Sets callback function invoked when library tells error code, and
+ * message to the application.
+ *
+ * If both :type:`nghttp2_error_callback` and
+ * :type:`nghttp2_error_callback2` are set, the latter takes
+ * precedence.
+ */
+NGHTTP2_EXTERN void nghttp2_session_callbacks_set_error_callback2(
+    nghttp2_session_callbacks *cbs, nghttp2_error_callback2 error_callback2);
+
+/**
+ * @functypedef
+ *
+ * Custom memory allocator to replace malloc().  The |mem_user_data|
+ * is the mem_user_data member of :type:`nghttp2_mem` structure.
+ */
+typedef void *(*nghttp2_malloc)(size_t size, void *mem_user_data);
+
+/**
+ * @functypedef
+ *
+ * Custom memory allocator to replace free().  The |mem_user_data| is
+ * the mem_user_data member of :type:`nghttp2_mem` structure.
+ */
+typedef void (*nghttp2_free)(void *ptr, void *mem_user_data);
+
+/**
+ * @functypedef
+ *
+ * Custom memory allocator to replace calloc().  The |mem_user_data|
+ * is the mem_user_data member of :type:`nghttp2_mem` structure.
+ */
+typedef void *(*nghttp2_calloc)(size_t nmemb, size_t size, void *mem_user_data);
+
+/**
+ * @functypedef
+ *
+ * Custom memory allocator to replace realloc().  The |mem_user_data|
+ * is the mem_user_data member of :type:`nghttp2_mem` structure.
+ */
+typedef void *(*nghttp2_realloc)(void *ptr, size_t size, void *mem_user_data);
+
+/**
+ * @struct
+ *
+ * Custom memory allocator functions and user defined pointer.  The
+ * |mem_user_data| member is passed to each allocator function.  This
+ * can be used, for example, to achieve per-session memory pool.
+ *
+ * In the following example code, ``my_malloc``, ``my_free``,
+ * ``my_calloc`` and ``my_realloc`` are the replacement of the
+ * standard allocators ``malloc``, ``free``, ``calloc`` and
+ * ``realloc`` respectively::
+ *
+ *     void *my_malloc_cb(size_t size, void *mem_user_data) {
+ *       return my_malloc(size);
+ *     }
+ *
+ *     void my_free_cb(void *ptr, void *mem_user_data) { my_free(ptr); }
+ *
+ *     void *my_calloc_cb(size_t nmemb, size_t size, void *mem_user_data) {
+ *       return my_calloc(nmemb, size);
+ *     }
+ *
+ *     void *my_realloc_cb(void *ptr, size_t size, void *mem_user_data) {
+ *       return my_realloc(ptr, size);
+ *     }
+ *
+ *     void session_new() {
+ *       nghttp2_session *session;
+ *       nghttp2_session_callbacks *callbacks;
+ *       nghttp2_mem mem = {NULL, my_malloc_cb, my_free_cb, my_calloc_cb,
+ *                          my_realloc_cb};
+ *
+ *       ...
+ *
+ *       nghttp2_session_client_new3(&session, callbacks, NULL, NULL, &mem);
+ *
+ *       ...
+ *     }
+ */
+typedef struct {
+  /**
+   * An arbitrary user supplied data.  This is passed to each
+   * allocator function.
+   */
+  void *mem_user_data;
+  /**
+   * Custom allocator function to replace malloc().
+   */
+  nghttp2_malloc malloc;
+  /**
+   * Custom allocator function to replace free().
+   */
+  nghttp2_free free;
+  /**
+   * Custom allocator function to replace calloc().
+   */
+  nghttp2_calloc calloc;
+  /**
+   * Custom allocator function to replace realloc().
+   */
+  nghttp2_realloc realloc;
+} nghttp2_mem;
+
+struct nghttp2_option;
+
+/**
+ * @struct
+ *
+ * Configuration options for :type:`nghttp2_session`.  The details of
+ * this structure are intentionally hidden from the public API.
+ */
+typedef struct nghttp2_option nghttp2_option;
+
+/**
+ * @function
+ *
+ * Initializes |*option_ptr| with default values.
+ *
+ * When the application finished using this object, it can use
+ * `nghttp2_option_del()` to free its memory.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int nghttp2_option_new(nghttp2_option **option_ptr);
+
+/**
+ * @function
+ *
+ * Frees any resources allocated for |option|.  If |option| is
+ * ``NULL``, this function does nothing.
+ */
+NGHTTP2_EXTERN void nghttp2_option_del(nghttp2_option *option);
+
+/**
+ * @function
+ *
+ * This option prevents the library from sending WINDOW_UPDATE for a
+ * connection automatically.  If this option is set to nonzero, the
+ * library won't send WINDOW_UPDATE for DATA until application calls
+ * `nghttp2_session_consume()` to indicate the consumed amount of
+ * data.  Don't use `nghttp2_submit_window_update()` for this purpose.
+ * By default, this option is set to zero.
+ */
+NGHTTP2_EXTERN void
+nghttp2_option_set_no_auto_window_update(nghttp2_option *option, int val);
+
+/**
+ * @function
+ *
+ * This option sets the SETTINGS_MAX_CONCURRENT_STREAMS value of
+ * remote endpoint as if it is received in SETTINGS frame.  Without
+ * specifying this option, the maximum number of outgoing concurrent
+ * streams is initially limited to 100 to avoid issues when the local
+ * endpoint submits lots of requests before receiving initial SETTINGS
+ * frame from the remote endpoint, since sending them at once to the
+ * remote endpoint could lead to rejection of some of the requests.
+ * This value will be overwritten when the local endpoint receives
+ * initial SETTINGS frame from the remote endpoint, either to the
+ * value advertised in SETTINGS_MAX_CONCURRENT_STREAMS or to the
+ * default value (unlimited) if none was advertised.
+ */
+NGHTTP2_EXTERN void
+nghttp2_option_set_peer_max_concurrent_streams(nghttp2_option *option,
+                                               uint32_t val);
+
+/**
+ * @function
+ *
+ * By default, nghttp2 library, if configured as server, requires
+ * first 24 bytes of client magic byte string (MAGIC).  In most cases,
+ * this will simplify the implementation of server.  But sometimes
+ * server may want to detect the application protocol based on first
+ * few bytes on clear text communication.
+ *
+ * If this option is used with nonzero |val|, nghttp2 library does not
+ * handle MAGIC.  It still checks following SETTINGS frame.  This
+ * means that applications should deal with MAGIC by themselves.
+ *
+ * If this option is not used or used with zero value, if MAGIC does
+ * not match :macro:`NGHTTP2_CLIENT_MAGIC`, `nghttp2_session_recv()`
+ * and `nghttp2_session_mem_recv()` will return error
+ * :enum:`NGHTTP2_ERR_BAD_CLIENT_MAGIC`, which is fatal error.
+ */
+NGHTTP2_EXTERN void
+nghttp2_option_set_no_recv_client_magic(nghttp2_option *option, int val);
+
+/**
+ * @function
+ *
+ * By default, nghttp2 library enforces subset of HTTP Messaging rules
+ * described in `HTTP/2 specification, section 8
+ * <https://tools.ietf.org/html/rfc7540#section-8>`_.  See
+ * :ref:`http-messaging` section for details.  For those applications
+ * who use nghttp2 library as non-HTTP use, give nonzero to |val| to
+ * disable this enforcement.  Please note that disabling this feature
+ * does not change the fundamental client and server model of HTTP.
+ * That is, even if the validation is disabled, only client can send
+ * requests.
+ */
+NGHTTP2_EXTERN void nghttp2_option_set_no_http_messaging(nghttp2_option *option,
+                                                         int val);
+
+/**
+ * @function
+ *
+ * RFC 7540 does not enforce any limit on the number of incoming
+ * reserved streams (in RFC 7540 terms, streams in reserved (remote)
+ * state).  This only affects client side, since only server can push
+ * streams.  Malicious server can push arbitrary number of streams,
+ * and make client's memory exhausted.  This option can set the
+ * maximum number of such incoming streams to avoid possible memory
+ * exhaustion.  If this option is set, and pushed streams are
+ * automatically closed on reception, without calling user provided
+ * callback, if they exceed the given limit.  The default value is
+ * 200.  If session is configured as server side, this option has no
+ * effect.  Server can control the number of streams to push.
+ */
+NGHTTP2_EXTERN void
+nghttp2_option_set_max_reserved_remote_streams(nghttp2_option *option,
+                                               uint32_t val);
+
+/**
+ * @function
+ *
+ * Sets extension frame type the application is willing to handle with
+ * user defined callbacks (see
+ * :type:`nghttp2_on_extension_chunk_recv_callback` and
+ * :type:`nghttp2_unpack_extension_callback`).  The |type| is
+ * extension frame type, and must be strictly greater than 0x9.
+ * Otherwise, this function does nothing.  The application can call
+ * this function multiple times to set more than one frame type to
+ * receive.  The application does not have to call this function if it
+ * just sends extension frames.
+ */
+NGHTTP2_EXTERN void
+nghttp2_option_set_user_recv_extension_type(nghttp2_option *option,
+                                            uint8_t type);
+
+/**
+ * @function
+ *
+ * Sets extension frame type the application is willing to receive
+ * using builtin handler.  The |type| is the extension frame type to
+ * receive, and must be strictly greater than 0x9.  Otherwise, this
+ * function does nothing.  The application can call this function
+ * multiple times to set more than one frame type to receive.  The
+ * application does not have to call this function if it just sends
+ * extension frames.
+ *
+ * If same frame type is passed to both
+ * `nghttp2_option_set_builtin_recv_extension_type()` and
+ * `nghttp2_option_set_user_recv_extension_type()`, the latter takes
+ * precedence.
+ */
+NGHTTP2_EXTERN void
+nghttp2_option_set_builtin_recv_extension_type(nghttp2_option *option,
+                                               uint8_t type);
+
+/**
+ * @function
+ *
+ * This option prevents the library from sending PING frame with ACK
+ * flag set automatically when PING frame without ACK flag set is
+ * received.  If this option is set to nonzero, the library won't send
+ * PING frame with ACK flag set in the response for incoming PING
+ * frame.  The application can send PING frame with ACK flag set using
+ * `nghttp2_submit_ping()` with :enum:`NGHTTP2_FLAG_ACK` as flags
+ * parameter.
+ */
+NGHTTP2_EXTERN void nghttp2_option_set_no_auto_ping_ack(nghttp2_option *option,
+                                                        int val);
+
+/**
+ * @function
+ *
+ * This option sets the maximum length of header block (a set of
+ * header fields per one HEADERS frame) to send.  The length of a
+ * given set of header fields is calculated using
+ * `nghttp2_hd_deflate_bound()`.  The default value is 64KiB.  If
+ * application attempts to send header fields larger than this limit,
+ * the transmission of the frame fails with error code
+ * :enum:`NGHTTP2_ERR_FRAME_SIZE_ERROR`.
+ */
+NGHTTP2_EXTERN void
+nghttp2_option_set_max_send_header_block_length(nghttp2_option *option,
+                                                size_t val);
+
+/**
+ * @function
+ *
+ * This option sets the maximum dynamic table size for deflating
+ * header fields.  The default value is 4KiB.  In HTTP/2, receiver of
+ * deflated header block can specify maximum dynamic table size.  The
+ * actual maximum size is the minimum of the size receiver specified
+ * and this option value.
+ */
+NGHTTP2_EXTERN void
+nghttp2_option_set_max_deflate_dynamic_table_size(nghttp2_option *option,
+                                                  size_t val);
+
+/**
+ * @function
+ *
+ * This option prevents the library from retaining closed streams to
+ * maintain the priority tree.  If this option is set to nonzero,
+ * applications can discard closed stream completely to save memory.
+ */
+NGHTTP2_EXTERN void nghttp2_option_set_no_closed_streams(nghttp2_option *option,
+                                                         int val);
+
+/**
+ * @function
+ *
+ * This function sets the maximum number of outgoing SETTINGS ACK and
+ * PING ACK frames retained in :type:`nghttp2_session` object.  If
+ * more than those frames are retained, the peer is considered to be
+ * misbehaving and session will be closed.  The default value is 1000.
+ */
+NGHTTP2_EXTERN void nghttp2_option_set_max_outbound_ack(nghttp2_option *option,
+                                                        size_t val);
+
+/**
+ * @function
+ *
+ * This function sets the maximum number of SETTINGS entries per
+ * SETTINGS frame that will be accepted. If more than those entries
+ * are received, the peer is considered to be misbehaving and session
+ * will be closed. The default value is 32.
+ */
+NGHTTP2_EXTERN void nghttp2_option_set_max_settings(nghttp2_option *option,
+                                                    size_t val);
+
+/**
+ * @function
+ *
+ * Initializes |*session_ptr| for client use.  The all members of
+ * |callbacks| are copied to |*session_ptr|.  Therefore |*session_ptr|
+ * does not store |callbacks|.  The |user_data| is an arbitrary user
+ * supplied data, which will be passed to the callback functions.
+ *
+ * The :type:`nghttp2_send_callback` must be specified.  If the
+ * application code uses `nghttp2_session_recv()`, the
+ * :type:`nghttp2_recv_callback` must be specified.  The other members
+ * of |callbacks| can be ``NULL``.
+ *
+ * If this function fails, |*session_ptr| is left untouched.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_client_new(nghttp2_session **session_ptr,
+                           const nghttp2_session_callbacks *callbacks,
+                           void *user_data);
+
+/**
+ * @function
+ *
+ * Initializes |*session_ptr| for server use.  The all members of
+ * |callbacks| are copied to |*session_ptr|. Therefore |*session_ptr|
+ * does not store |callbacks|.  The |user_data| is an arbitrary user
+ * supplied data, which will be passed to the callback functions.
+ *
+ * The :type:`nghttp2_send_callback` must be specified.  If the
+ * application code uses `nghttp2_session_recv()`, the
+ * :type:`nghttp2_recv_callback` must be specified.  The other members
+ * of |callbacks| can be ``NULL``.
+ *
+ * If this function fails, |*session_ptr| is left untouched.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_server_new(nghttp2_session **session_ptr,
+                           const nghttp2_session_callbacks *callbacks,
+                           void *user_data);
+
+/**
+ * @function
+ *
+ * Like `nghttp2_session_client_new()`, but with additional options
+ * specified in the |option|.
+ *
+ * The |option| can be ``NULL`` and the call is equivalent to
+ * `nghttp2_session_client_new()`.
+ *
+ * This function does not take ownership |option|.  The application is
+ * responsible for freeing |option| if it finishes using the object.
+ *
+ * The library code does not refer to |option| after this function
+ * returns.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_client_new2(nghttp2_session **session_ptr,
+                            const nghttp2_session_callbacks *callbacks,
+                            void *user_data, const nghttp2_option *option);
+
+/**
+ * @function
+ *
+ * Like `nghttp2_session_server_new()`, but with additional options
+ * specified in the |option|.
+ *
+ * The |option| can be ``NULL`` and the call is equivalent to
+ * `nghttp2_session_server_new()`.
+ *
+ * This function does not take ownership |option|.  The application is
+ * responsible for freeing |option| if it finishes using the object.
+ *
+ * The library code does not refer to |option| after this function
+ * returns.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_server_new2(nghttp2_session **session_ptr,
+                            const nghttp2_session_callbacks *callbacks,
+                            void *user_data, const nghttp2_option *option);
+
+/**
+ * @function
+ *
+ * Like `nghttp2_session_client_new2()`, but with additional custom
+ * memory allocator specified in the |mem|.
+ *
+ * The |mem| can be ``NULL`` and the call is equivalent to
+ * `nghttp2_session_client_new2()`.
+ *
+ * This function does not take ownership |mem|.  The application is
+ * responsible for freeing |mem|.
+ *
+ * The library code does not refer to |mem| pointer after this
+ * function returns, so the application can safely free it.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int nghttp2_session_client_new3(
+    nghttp2_session **session_ptr, const nghttp2_session_callbacks *callbacks,
+    void *user_data, const nghttp2_option *option, nghttp2_mem *mem);
+
+/**
+ * @function
+ *
+ * Like `nghttp2_session_server_new2()`, but with additional custom
+ * memory allocator specified in the |mem|.
+ *
+ * The |mem| can be ``NULL`` and the call is equivalent to
+ * `nghttp2_session_server_new2()`.
+ *
+ * This function does not take ownership |mem|.  The application is
+ * responsible for freeing |mem|.
+ *
+ * The library code does not refer to |mem| pointer after this
+ * function returns, so the application can safely free it.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int nghttp2_session_server_new3(
+    nghttp2_session **session_ptr, const nghttp2_session_callbacks *callbacks,
+    void *user_data, const nghttp2_option *option, nghttp2_mem *mem);
+
+/**
+ * @function
+ *
+ * Frees any resources allocated for |session|.  If |session| is
+ * ``NULL``, this function does nothing.
+ */
+NGHTTP2_EXTERN void nghttp2_session_del(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Sends pending frames to the remote peer.
+ *
+ * This function retrieves the highest prioritized frame from the
+ * outbound queue and sends it to the remote peer.  It does this as
+ * many as possible until the user callback
+ * :type:`nghttp2_send_callback` returns
+ * :enum:`NGHTTP2_ERR_WOULDBLOCK` or the outbound queue becomes empty.
+ * This function calls several callback functions which are passed
+ * when initializing the |session|.  Here is the simple time chart
+ * which tells when each callback is invoked:
+ *
+ * 1. Get the next frame to send from outbound queue.
+ *
+ * 2. Prepare transmission of the frame.
+ *
+ * 3. If the control frame cannot be sent because some preconditions
+ *    are not met (e.g., request HEADERS cannot be sent after GOAWAY),
+ *    :type:`nghttp2_on_frame_not_send_callback` is invoked.  Abort
+ *    the following steps.
+ *
+ * 4. If the frame is HEADERS, PUSH_PROMISE or DATA,
+ *    :type:`nghttp2_select_padding_callback` is invoked.
+ *
+ * 5. If the frame is request HEADERS, the stream is opened here.
+ *
+ * 6. :type:`nghttp2_before_frame_send_callback` is invoked.
+ *
+ * 7. If :enum:`NGHTTP2_ERR_CANCEL` is returned from
+ *    :type:`nghttp2_before_frame_send_callback`, the current frame
+ *    transmission is canceled, and
+ *    :type:`nghttp2_on_frame_not_send_callback` is invoked.  Abort
+ *    the following steps.
+ *
+ * 8. :type:`nghttp2_send_callback` is invoked one or more times to
+ *    send the frame.
+ *
+ * 9. :type:`nghttp2_on_frame_send_callback` is invoked.
+ *
+ * 10. If the transmission of the frame triggers closure of the
+ *     stream, the stream is closed and
+ *     :type:`nghttp2_on_stream_close_callback` is invoked.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`
+ *     The callback function failed.
+ */
+NGHTTP2_EXTERN int nghttp2_session_send(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns the serialized data to send.
+ *
+ * This function behaves like `nghttp2_session_send()` except that it
+ * does not use :type:`nghttp2_send_callback` to transmit data.
+ * Instead, it assigns the pointer to the serialized data to the
+ * |*data_ptr| and returns its length.  The other callbacks are called
+ * in the same way as they are in `nghttp2_session_send()`.
+ *
+ * If no data is available to send, this function returns 0.
+ *
+ * This function may not return all serialized data in one invocation.
+ * To get all data, call this function repeatedly until it returns 0
+ * or one of negative error codes.
+ *
+ * The assigned |*data_ptr| is valid until the next call of
+ * `nghttp2_session_mem_send()` or `nghttp2_session_send()`.
+ *
+ * The caller must send all data before sending the next chunk of
+ * data.
+ *
+ * This function returns the length of the data pointed by the
+ * |*data_ptr| if it succeeds, or one of the following negative error
+ * codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ *
+ * .. note::
+ *
+ *   This function may produce very small byte string.  If that is the
+ *   case, and application disables Nagle algorithm (``TCP_NODELAY``),
+ *   then writing this small chunk leads to very small packet, and it
+ *   is very inefficient.  An application should be responsible to
+ *   buffer up small chunks of data as necessary to avoid this
+ *   situation.
+ */
+NGHTTP2_EXTERN ssize_t nghttp2_session_mem_send(nghttp2_session *session,
+                                                const uint8_t **data_ptr);
+
+/**
+ * @function
+ *
+ * Receives frames from the remote peer.
+ *
+ * This function receives as many frames as possible until the user
+ * callback :type:`nghttp2_recv_callback` returns
+ * :enum:`NGHTTP2_ERR_WOULDBLOCK`.  This function calls several
+ * callback functions which are passed when initializing the
+ * |session|.  Here is the simple time chart which tells when each
+ * callback is invoked:
+ *
+ * 1. :type:`nghttp2_recv_callback` is invoked one or more times to
+ *    receive frame header.
+ *
+ * 2. When frame header is received,
+ *    :type:`nghttp2_on_begin_frame_callback` is invoked.
+ *
+ * 3. If the frame is DATA frame:
+ *
+ *    1. :type:`nghttp2_recv_callback` is invoked to receive DATA
+ *       payload. For each chunk of data,
+ *       :type:`nghttp2_on_data_chunk_recv_callback` is invoked.
+ *
+ *    2. If one DATA frame is completely received,
+ *       :type:`nghttp2_on_frame_recv_callback` is invoked.  If the
+ *       reception of the frame triggers the closure of the stream,
+ *       :type:`nghttp2_on_stream_close_callback` is invoked.
+ *
+ * 4. If the frame is the control frame:
+ *
+ *    1. :type:`nghttp2_recv_callback` is invoked one or more times to
+ *       receive whole frame.
+ *
+ *    2. If the received frame is valid, then following actions are
+ *       taken.  If the frame is either HEADERS or PUSH_PROMISE,
+ *       :type:`nghttp2_on_begin_headers_callback` is invoked.  Then
+ *       :type:`nghttp2_on_header_callback` is invoked for each header
+ *       name/value pair.  For invalid header field,
+ *       :type:`nghttp2_on_invalid_header_callback` is called.  After
+ *       all name/value pairs are emitted successfully,
+ *       :type:`nghttp2_on_frame_recv_callback` is invoked.  For other
+ *       frames, :type:`nghttp2_on_frame_recv_callback` is invoked.
+ *       If the reception of the frame triggers the closure of the
+ *       stream, :type:`nghttp2_on_stream_close_callback` is invoked.
+ *
+ *    3. If the received frame is unpacked but is interpreted as
+ *       invalid, :type:`nghttp2_on_invalid_frame_recv_callback` is
+ *       invoked.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_EOF`
+ *     The remote peer did shutdown on the connection.
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`
+ *     The callback function failed.
+ * :enum:`NGHTTP2_ERR_BAD_CLIENT_MAGIC`
+ *     Invalid client magic was detected.  This error only returns
+ *     when |session| was configured as server and
+ *     `nghttp2_option_set_no_recv_client_magic()` is not used with
+ *     nonzero value.
+ * :enum:`NGHTTP2_ERR_FLOODED`
+ *     Flooding was detected in this HTTP/2 session, and it must be
+ *     closed.  This is most likely caused by misbehaviour of peer.
+ */
+NGHTTP2_EXTERN int nghttp2_session_recv(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Processes data |in| as an input from the remote endpoint.  The
+ * |inlen| indicates the number of bytes in the |in|.
+ *
+ * This function behaves like `nghttp2_session_recv()` except that it
+ * does not use :type:`nghttp2_recv_callback` to receive data; the
+ * |in| is the only data for the invocation of this function.  If all
+ * bytes are processed, this function returns.  The other callbacks
+ * are called in the same way as they are in `nghttp2_session_recv()`.
+ *
+ * In the current implementation, this function always tries to
+ * processes all input data unless either an error occurs or
+ * :enum:`NGHTTP2_ERR_PAUSE` is returned from
+ * :type:`nghttp2_on_header_callback` or
+ * :type:`nghttp2_on_data_chunk_recv_callback`.  If
+ * :enum:`NGHTTP2_ERR_PAUSE` is used, the return value includes the
+ * number of bytes which was used to produce the data or frame for the
+ * callback.
+ *
+ * This function returns the number of processed bytes, or one of the
+ * following negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_CALLBACK_FAILURE`
+ *     The callback function failed.
+ * :enum:`NGHTTP2_ERR_BAD_CLIENT_MAGIC`
+ *     Invalid client magic was detected.  This error only returns
+ *     when |session| was configured as server and
+ *     `nghttp2_option_set_no_recv_client_magic()` is not used with
+ *     nonzero value.
+ * :enum:`NGHTTP2_ERR_FLOODED`
+ *     Flooding was detected in this HTTP/2 session, and it must be
+ *     closed.  This is most likely caused by misbehaviour of peer.
+ */
+NGHTTP2_EXTERN ssize_t nghttp2_session_mem_recv(nghttp2_session *session,
+                                                const uint8_t *in,
+                                                size_t inlen);
+
+/**
+ * @function
+ *
+ * Puts back previously deferred DATA frame in the stream |stream_id|
+ * to the outbound queue.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The stream does not exist; or no deferred data exist.
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int nghttp2_session_resume_data(nghttp2_session *session,
+                                               int32_t stream_id);
+
+/**
+ * @function
+ *
+ * Returns nonzero value if |session| wants to receive data from the
+ * remote peer.
+ *
+ * If both `nghttp2_session_want_read()` and
+ * `nghttp2_session_want_write()` return 0, the application should
+ * drop the connection.
+ */
+NGHTTP2_EXTERN int nghttp2_session_want_read(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns nonzero value if |session| wants to send data to the remote
+ * peer.
+ *
+ * If both `nghttp2_session_want_read()` and
+ * `nghttp2_session_want_write()` return 0, the application should
+ * drop the connection.
+ */
+NGHTTP2_EXTERN int nghttp2_session_want_write(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns stream_user_data for the stream |stream_id|.  The
+ * stream_user_data is provided by `nghttp2_submit_request()`,
+ * `nghttp2_submit_headers()` or
+ * `nghttp2_session_set_stream_user_data()`.  Unless it is set using
+ * `nghttp2_session_set_stream_user_data()`, if the stream is
+ * initiated by the remote endpoint, stream_user_data is always
+ * ``NULL``.  If the stream does not exist, this function returns
+ * ``NULL``.
+ */
+NGHTTP2_EXTERN void *
+nghttp2_session_get_stream_user_data(nghttp2_session *session,
+                                     int32_t stream_id);
+
+/**
+ * @function
+ *
+ * Sets the |stream_user_data| to the stream denoted by the
+ * |stream_id|.  If a stream user data is already set to the stream,
+ * it is replaced with the |stream_user_data|.  It is valid to specify
+ * ``NULL`` in the |stream_user_data|, which nullifies the associated
+ * data pointer.
+ *
+ * It is valid to set the |stream_user_data| to the stream reserved by
+ * PUSH_PROMISE frame.
+ *
+ * This function returns 0 if it succeeds, or one of following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The stream does not exist
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_set_stream_user_data(nghttp2_session *session,
+                                     int32_t stream_id, void *stream_user_data);
+
+/**
+ * @function
+ *
+ * Sets |user_data| to |session|, overwriting the existing user data
+ * specified in `nghttp2_session_client_new()`, or
+ * `nghttp2_session_server_new()`.
+ */
+NGHTTP2_EXTERN void nghttp2_session_set_user_data(nghttp2_session *session,
+                                                  void *user_data);
+
+/**
+ * @function
+ *
+ * Returns the number of frames in the outbound queue.  This does not
+ * include the deferred DATA frames.
+ */
+NGHTTP2_EXTERN size_t
+nghttp2_session_get_outbound_queue_size(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns the number of DATA payload in bytes received without
+ * WINDOW_UPDATE transmission for the stream |stream_id|.  The local
+ * (receive) window size can be adjusted by
+ * `nghttp2_submit_window_update()`.  This function takes into account
+ * that and returns effective data length.  In particular, if the
+ * local window size is reduced by submitting negative
+ * window_size_increment with `nghttp2_submit_window_update()`, this
+ * function returns the number of bytes less than actually received.
+ *
+ * This function returns -1 if it fails.
+ */
+NGHTTP2_EXTERN int32_t nghttp2_session_get_stream_effective_recv_data_length(
+    nghttp2_session *session, int32_t stream_id);
+
+/**
+ * @function
+ *
+ * Returns the local (receive) window size for the stream |stream_id|.
+ * The local window size can be adjusted by
+ * `nghttp2_submit_window_update()`.  This function takes into account
+ * that and returns effective window size.
+ *
+ * This function does not take into account the amount of received
+ * data from the remote endpoint.  Use
+ * `nghttp2_session_get_stream_local_window_size()` to know the amount
+ * of data the remote endpoint can send without receiving stream level
+ * WINDOW_UPDATE frame.  Note that each stream is still subject to the
+ * connection level flow control.
+ *
+ * This function returns -1 if it fails.
+ */
+NGHTTP2_EXTERN int32_t nghttp2_session_get_stream_effective_local_window_size(
+    nghttp2_session *session, int32_t stream_id);
+
+/**
+ * @function
+ *
+ * Returns the amount of flow-controlled payload (e.g., DATA) that the
+ * remote endpoint can send without receiving stream level
+ * WINDOW_UPDATE frame.  It is also subject to the connection level
+ * flow control.  So the actual amount of data to send is
+ * min(`nghttp2_session_get_stream_local_window_size()`,
+ * `nghttp2_session_get_local_window_size()`).
+ *
+ * This function returns -1 if it fails.
+ */
+NGHTTP2_EXTERN int32_t nghttp2_session_get_stream_local_window_size(
+    nghttp2_session *session, int32_t stream_id);
+
+/**
+ * @function
+ *
+ * Returns the number of DATA payload in bytes received without
+ * WINDOW_UPDATE transmission for a connection.  The local (receive)
+ * window size can be adjusted by `nghttp2_submit_window_update()`.
+ * This function takes into account that and returns effective data
+ * length.  In particular, if the local window size is reduced by
+ * submitting negative window_size_increment with
+ * `nghttp2_submit_window_update()`, this function returns the number
+ * of bytes less than actually received.
+ *
+ * This function returns -1 if it fails.
+ */
+NGHTTP2_EXTERN int32_t
+nghttp2_session_get_effective_recv_data_length(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns the local (receive) window size for a connection.  The
+ * local window size can be adjusted by
+ * `nghttp2_submit_window_update()`.  This function takes into account
+ * that and returns effective window size.
+ *
+ * This function does not take into account the amount of received
+ * data from the remote endpoint.  Use
+ * `nghttp2_session_get_local_window_size()` to know the amount of
+ * data the remote endpoint can send without receiving
+ * connection-level WINDOW_UPDATE frame.  Note that each stream is
+ * still subject to the stream level flow control.
+ *
+ * This function returns -1 if it fails.
+ */
+NGHTTP2_EXTERN int32_t
+nghttp2_session_get_effective_local_window_size(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns the amount of flow-controlled payload (e.g., DATA) that the
+ * remote endpoint can send without receiving connection level
+ * WINDOW_UPDATE frame.  Note that each stream is still subject to the
+ * stream level flow control (see
+ * `nghttp2_session_get_stream_local_window_size()`).
+ *
+ * This function returns -1 if it fails.
+ */
+NGHTTP2_EXTERN int32_t
+nghttp2_session_get_local_window_size(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns the remote window size for a given stream |stream_id|.
+ *
+ * This is the amount of flow-controlled payload (e.g., DATA) that the
+ * local endpoint can send without stream level WINDOW_UPDATE.  There
+ * is also connection level flow control, so the effective size of
+ * payload that the local endpoint can actually send is
+ * min(`nghttp2_session_get_stream_remote_window_size()`,
+ * `nghttp2_session_get_remote_window_size()`).
+ *
+ * This function returns -1 if it fails.
+ */
+NGHTTP2_EXTERN int32_t nghttp2_session_get_stream_remote_window_size(
+    nghttp2_session *session, int32_t stream_id);
+
+/**
+ * @function
+ *
+ * Returns the remote window size for a connection.
+ *
+ * This function always succeeds.
+ */
+NGHTTP2_EXTERN int32_t
+nghttp2_session_get_remote_window_size(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns 1 if local peer half closed the given stream |stream_id|.
+ * Returns 0 if it did not.  Returns -1 if no such stream exists.
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_get_stream_local_close(nghttp2_session *session,
+                                       int32_t stream_id);
+
+/**
+ * @function
+ *
+ * Returns 1 if remote peer half closed the given stream |stream_id|.
+ * Returns 0 if it did not.  Returns -1 if no such stream exists.
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_get_stream_remote_close(nghttp2_session *session,
+                                        int32_t stream_id);
+
+/**
+ * @function
+ *
+ * Returns the current dynamic table size of HPACK inflater, including
+ * the overhead 32 bytes per entry described in RFC 7541.
+ */
+NGHTTP2_EXTERN size_t
+nghttp2_session_get_hd_inflate_dynamic_table_size(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns the current dynamic table size of HPACK deflater including
+ * the overhead 32 bytes per entry described in RFC 7541.
+ */
+NGHTTP2_EXTERN size_t
+nghttp2_session_get_hd_deflate_dynamic_table_size(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Signals the session so that the connection should be terminated.
+ *
+ * The last stream ID is the minimum value between the stream ID of a
+ * stream for which :type:`nghttp2_on_frame_recv_callback` was called
+ * most recently and the last stream ID we have sent to the peer
+ * previously.
+ *
+ * The |error_code| is the error code of this GOAWAY frame.  The
+ * pre-defined error code is one of :enum:`nghttp2_error_code`.
+ *
+ * After the transmission, both `nghttp2_session_want_read()` and
+ * `nghttp2_session_want_write()` return 0.
+ *
+ * This function should be called when the connection should be
+ * terminated after sending GOAWAY.  If the remaining streams should
+ * be processed after GOAWAY, use `nghttp2_submit_goaway()` instead.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int nghttp2_session_terminate_session(nghttp2_session *session,
+                                                     uint32_t error_code);
+
+/**
+ * @function
+ *
+ * Signals the session so that the connection should be terminated.
+ *
+ * This function behaves like `nghttp2_session_terminate_session()`,
+ * but the last stream ID can be specified by the application for fine
+ * grained control of stream.  The HTTP/2 specification does not allow
+ * last_stream_id to be increased.  So the actual value sent as
+ * last_stream_id is the minimum value between the given
+ * |last_stream_id| and the last_stream_id we have previously sent to
+ * the peer.
+ *
+ * The |last_stream_id| is peer's stream ID or 0.  So if |session| is
+ * initialized as client, |last_stream_id| must be even or 0.  If
+ * |session| is initialized as server, |last_stream_id| must be odd or
+ * 0.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |last_stream_id| is invalid.
+ */
+NGHTTP2_EXTERN int nghttp2_session_terminate_session2(nghttp2_session *session,
+                                                      int32_t last_stream_id,
+                                                      uint32_t error_code);
+
+/**
+ * @function
+ *
+ * Signals to the client that the server started graceful shutdown
+ * procedure.
+ *
+ * This function is only usable for server.  If this function is
+ * called with client side session, this function returns
+ * :enum:`NGHTTP2_ERR_INVALID_STATE`.
+ *
+ * To gracefully shutdown HTTP/2 session, server should call this
+ * function to send GOAWAY with last_stream_id (1u << 31) - 1.  And
+ * after some delay (e.g., 1 RTT), send another GOAWAY with the stream
+ * ID that the server has some processing using
+ * `nghttp2_submit_goaway()`.  See also
+ * `nghttp2_session_get_last_proc_stream_id()`.
+ *
+ * Unlike `nghttp2_submit_goaway()`, this function just sends GOAWAY
+ * and does nothing more.  This is a mere indication to the client
+ * that session shutdown is imminent.  The application should call
+ * `nghttp2_submit_goaway()` with appropriate last_stream_id after
+ * this call.
+ *
+ * If one or more GOAWAY frame have been already sent by either
+ * `nghttp2_submit_goaway()` or `nghttp2_session_terminate_session()`,
+ * this function has no effect.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_STATE`
+ *     The |session| is initialized as client.
+ */
+NGHTTP2_EXTERN int nghttp2_submit_shutdown_notice(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns the value of SETTINGS |id| notified by a remote endpoint.
+ * The |id| must be one of values defined in
+ * :enum:`nghttp2_settings_id`.
+ */
+NGHTTP2_EXTERN uint32_t nghttp2_session_get_remote_settings(
+    nghttp2_session *session, nghttp2_settings_id id);
+
+/**
+ * @function
+ *
+ * Returns the value of SETTINGS |id| of local endpoint acknowledged
+ * by the remote endpoint.  The |id| must be one of the values defined
+ * in :enum:`nghttp2_settings_id`.
+ */
+NGHTTP2_EXTERN uint32_t nghttp2_session_get_local_settings(
+    nghttp2_session *session, nghttp2_settings_id id);
+
+/**
+ * @function
+ *
+ * Tells the |session| that next stream ID is |next_stream_id|.  The
+ * |next_stream_id| must be equal or greater than the value returned
+ * by `nghttp2_session_get_next_stream_id()`.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |next_stream_id| is strictly less than the value
+ *     `nghttp2_session_get_next_stream_id()` returns; or
+ *     |next_stream_id| is invalid (e.g., even integer for client, or
+ *     odd integer for server).
+ */
+NGHTTP2_EXTERN int nghttp2_session_set_next_stream_id(nghttp2_session *session,
+                                                      int32_t next_stream_id);
+
+/**
+ * @function
+ *
+ * Returns the next outgoing stream ID.  Notice that return type is
+ * uint32_t.  If we run out of stream ID for this session, this
+ * function returns 1 << 31.
+ */
+NGHTTP2_EXTERN uint32_t
+nghttp2_session_get_next_stream_id(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Tells the |session| that |size| bytes for a stream denoted by
+ * |stream_id| were consumed by application and are ready to
+ * WINDOW_UPDATE.  The consumed bytes are counted towards both
+ * connection and stream level WINDOW_UPDATE (see
+ * `nghttp2_session_consume_connection()` and
+ * `nghttp2_session_consume_stream()` to update consumption
+ * independently).  This function is intended to be used without
+ * automatic window update (see
+ * `nghttp2_option_set_no_auto_window_update()`).
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |stream_id| is 0.
+ * :enum:`NGHTTP2_ERR_INVALID_STATE`
+ *     Automatic WINDOW_UPDATE is not disabled.
+ */
+NGHTTP2_EXTERN int nghttp2_session_consume(nghttp2_session *session,
+                                           int32_t stream_id, size_t size);
+
+/**
+ * @function
+ *
+ * Like `nghttp2_session_consume()`, but this only tells library that
+ * |size| bytes were consumed only for connection level.  Note that
+ * HTTP/2 maintains connection and stream level flow control windows
+ * independently.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_STATE`
+ *     Automatic WINDOW_UPDATE is not disabled.
+ */
+NGHTTP2_EXTERN int nghttp2_session_consume_connection(nghttp2_session *session,
+                                                      size_t size);
+
+/**
+ * @function
+ *
+ * Like `nghttp2_session_consume()`, but this only tells library that
+ * |size| bytes were consumed only for stream denoted by |stream_id|.
+ * Note that HTTP/2 maintains connection and stream level flow control
+ * windows independently.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |stream_id| is 0.
+ * :enum:`NGHTTP2_ERR_INVALID_STATE`
+ *     Automatic WINDOW_UPDATE is not disabled.
+ */
+NGHTTP2_EXTERN int nghttp2_session_consume_stream(nghttp2_session *session,
+                                                  int32_t stream_id,
+                                                  size_t size);
+
+/**
+ * @function
+ *
+ * Changes priority of existing stream denoted by |stream_id|.  The
+ * new priority specification is |pri_spec|.
+ *
+ * The priority is changed silently and instantly, and no PRIORITY
+ * frame will be sent to notify the peer of this change.  This
+ * function may be useful for server to change the priority of pushed
+ * stream.
+ *
+ * If |session| is initialized as server, and ``pri_spec->stream_id``
+ * points to the idle stream, the idle stream is created if it does
+ * not exist.  The created idle stream will depend on root stream
+ * (stream 0) with weight 16.
+ *
+ * Otherwise, if stream denoted by ``pri_spec->stream_id`` is not
+ * found, we use default priority instead of given |pri_spec|.  That
+ * is make stream depend on root stream with weight 16.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     Attempted to depend on itself; or no stream exist for the given
+ *     |stream_id|; or |stream_id| is 0
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_change_stream_priority(nghttp2_session *session,
+                                       int32_t stream_id,
+                                       const nghttp2_priority_spec *pri_spec);
+
+/**
+ * @function
+ *
+ * Creates idle stream with the given |stream_id|, and priority
+ * |pri_spec|.
+ *
+ * The stream creation is done without sending PRIORITY frame, which
+ * means that peer does not know about the existence of this idle
+ * stream in the local endpoint.
+ *
+ * RFC 7540 does not disallow the use of creation of idle stream with
+ * odd or even stream ID regardless of client or server.  So this
+ * function can create odd or even stream ID regardless of client or
+ * server.  But probably it is a bit safer to use the stream ID the
+ * local endpoint can initiate (in other words, use odd stream ID for
+ * client, and even stream ID for server), to avoid potential
+ * collision from peer's instruction.  Also we can use
+ * `nghttp2_session_set_next_stream_id()` to avoid to open created
+ * idle streams accidentally if we follow this recommendation.
+ *
+ * If |session| is initialized as server, and ``pri_spec->stream_id``
+ * points to the idle stream, the idle stream is created if it does
+ * not exist.  The created idle stream will depend on root stream
+ * (stream 0) with weight 16.
+ *
+ * Otherwise, if stream denoted by ``pri_spec->stream_id`` is not
+ * found, we use default priority instead of given |pri_spec|.  That
+ * is make stream depend on root stream with weight 16.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     Attempted to depend on itself; or stream denoted by |stream_id|
+ *     already exists; or |stream_id| cannot be used to create idle
+ *     stream (in other words, local endpoint has already opened
+ *     stream ID greater than or equal to the given stream ID; or
+ *     |stream_id| is 0
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_create_idle_stream(nghttp2_session *session, int32_t stream_id,
+                                   const nghttp2_priority_spec *pri_spec);
+
+/**
+ * @function
+ *
+ * Performs post-process of HTTP Upgrade request.  This function can
+ * be called from both client and server, but the behavior is very
+ * different in each other.
+ *
+ * .. warning::
+ *
+ *   This function is deprecated in favor of
+ *   `nghttp2_session_upgrade2()`, because this function lacks the
+ *   parameter to tell the library the request method used in the
+ *   original HTTP request.  This information is required for client
+ *   to validate actual response body length against content-length
+ *   header field (see `nghttp2_option_set_no_http_messaging()`).  If
+ *   HEAD is used in request, the length of response body must be 0
+ *   regardless of value included in content-length header field.
+ *
+ * If called from client side, the |settings_payload| must be the
+ * value sent in ``HTTP2-Settings`` header field and must be decoded
+ * by base64url decoder.  The |settings_payloadlen| is the length of
+ * |settings_payload|.  The |settings_payload| is unpacked and its
+ * setting values will be submitted using `nghttp2_submit_settings()`.
+ * This means that the client application code does not need to submit
+ * SETTINGS by itself.  The stream with stream ID=1 is opened and the
+ * |stream_user_data| is used for its stream_user_data.  The opened
+ * stream becomes half-closed (local) state.
+ *
+ * If called from server side, the |settings_payload| must be the
+ * value received in ``HTTP2-Settings`` header field and must be
+ * decoded by base64url decoder.  The |settings_payloadlen| is the
+ * length of |settings_payload|.  It is treated as if the SETTINGS
+ * frame with that payload is received.  Thus, callback functions for
+ * the reception of SETTINGS frame will be invoked.  The stream with
+ * stream ID=1 is opened.  The |stream_user_data| is ignored.  The
+ * opened stream becomes half-closed (remote).
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |settings_payload| is badly formed.
+ * :enum:`NGHTTP2_ERR_PROTO`
+ *     The stream ID 1 is already used or closed; or is not available.
+ */
+NGHTTP2_EXTERN int nghttp2_session_upgrade(nghttp2_session *session,
+                                           const uint8_t *settings_payload,
+                                           size_t settings_payloadlen,
+                                           void *stream_user_data);
+
+/**
+ * @function
+ *
+ * Performs post-process of HTTP Upgrade request.  This function can
+ * be called from both client and server, but the behavior is very
+ * different in each other.
+ *
+ * If called from client side, the |settings_payload| must be the
+ * value sent in ``HTTP2-Settings`` header field and must be decoded
+ * by base64url decoder.  The |settings_payloadlen| is the length of
+ * |settings_payload|.  The |settings_payload| is unpacked and its
+ * setting values will be submitted using `nghttp2_submit_settings()`.
+ * This means that the client application code does not need to submit
+ * SETTINGS by itself.  The stream with stream ID=1 is opened and the
+ * |stream_user_data| is used for its stream_user_data.  The opened
+ * stream becomes half-closed (local) state.
+ *
+ * If called from server side, the |settings_payload| must be the
+ * value received in ``HTTP2-Settings`` header field and must be
+ * decoded by base64url decoder.  The |settings_payloadlen| is the
+ * length of |settings_payload|.  It is treated as if the SETTINGS
+ * frame with that payload is received.  Thus, callback functions for
+ * the reception of SETTINGS frame will be invoked.  The stream with
+ * stream ID=1 is opened.  The |stream_user_data| is ignored.  The
+ * opened stream becomes half-closed (remote).
+ *
+ * If the request method is HEAD, pass nonzero value to
+ * |head_request|.  Otherwise, pass 0.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |settings_payload| is badly formed.
+ * :enum:`NGHTTP2_ERR_PROTO`
+ *     The stream ID 1 is already used or closed; or is not available.
+ */
+NGHTTP2_EXTERN int nghttp2_session_upgrade2(nghttp2_session *session,
+                                            const uint8_t *settings_payload,
+                                            size_t settings_payloadlen,
+                                            int head_request,
+                                            void *stream_user_data);
+
+/**
+ * @function
+ *
+ * Serializes the SETTINGS values |iv| in the |buf|.  The size of the
+ * |buf| is specified by |buflen|.  The number of entries in the |iv|
+ * array is given by |niv|.  The required space in |buf| for the |niv|
+ * entries is ``6*niv`` bytes and if the given buffer is too small, an
+ * error is returned.  This function is used mainly for creating a
+ * SETTINGS payload to be sent with the ``HTTP2-Settings`` header
+ * field in an HTTP Upgrade request.  The data written in |buf| is NOT
+ * base64url encoded and the application is responsible for encoding.
+ *
+ * This function returns the number of bytes written in |buf|, or one
+ * of the following negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |iv| contains duplicate settings ID or invalid value.
+ *
+ * :enum:`NGHTTP2_ERR_INSUFF_BUFSIZE`
+ *     The provided |buflen| size is too small to hold the output.
+ */
+NGHTTP2_EXTERN ssize_t nghttp2_pack_settings_payload(
+    uint8_t *buf, size_t buflen, const nghttp2_settings_entry *iv, size_t niv);
+
+/**
+ * @function
+ *
+ * Returns string describing the |lib_error_code|.  The
+ * |lib_error_code| must be one of the :enum:`nghttp2_error`.
+ */
+NGHTTP2_EXTERN const char *nghttp2_strerror(int lib_error_code);
+
+/**
+ * @function
+ *
+ * Returns string representation of HTTP/2 error code |error_code|
+ * (e.g., ``PROTOCOL_ERROR`` is returned if ``error_code ==
+ * NGHTTP2_PROTOCOL_ERROR``).  If string representation is unknown for
+ * given |error_code|, this function returns string ``unknown``.
+ */
+NGHTTP2_EXTERN const char *nghttp2_http2_strerror(uint32_t error_code);
+
+/**
+ * @function
+ *
+ * Initializes |pri_spec| with the |stream_id| of the stream to depend
+ * on with |weight| and its exclusive flag.  If |exclusive| is
+ * nonzero, exclusive flag is set.
+ *
+ * The |weight| must be in [:enum:`NGHTTP2_MIN_WEIGHT`,
+ * :enum:`NGHTTP2_MAX_WEIGHT`], inclusive.
+ */
+NGHTTP2_EXTERN void nghttp2_priority_spec_init(nghttp2_priority_spec *pri_spec,
+                                               int32_t stream_id,
+                                               int32_t weight, int exclusive);
+
+/**
+ * @function
+ *
+ * Initializes |pri_spec| with the default values.  The default values
+ * are: stream_id = 0, weight = :macro:`NGHTTP2_DEFAULT_WEIGHT` and
+ * exclusive = 0.
+ */
+NGHTTP2_EXTERN void
+nghttp2_priority_spec_default_init(nghttp2_priority_spec *pri_spec);
+
+/**
+ * @function
+ *
+ * Returns nonzero if the |pri_spec| is filled with default values.
+ */
+NGHTTP2_EXTERN int
+nghttp2_priority_spec_check_default(const nghttp2_priority_spec *pri_spec);
+
+/**
+ * @function
+ *
+ * Submits HEADERS frame and optionally one or more DATA frames.
+ *
+ * The |pri_spec| is priority specification of this request.  ``NULL``
+ * means the default priority (see
+ * `nghttp2_priority_spec_default_init()`).  To specify the priority,
+ * use `nghttp2_priority_spec_init()`.  If |pri_spec| is not ``NULL``,
+ * this function will copy its data members.
+ *
+ * The ``pri_spec->weight`` must be in [:enum:`NGHTTP2_MIN_WEIGHT`,
+ * :enum:`NGHTTP2_MAX_WEIGHT`], inclusive.  If ``pri_spec->weight`` is
+ * strictly less than :enum:`NGHTTP2_MIN_WEIGHT`, it becomes
+ * :enum:`NGHTTP2_MIN_WEIGHT`.  If it is strictly greater than
+ * :enum:`NGHTTP2_MAX_WEIGHT`, it becomes :enum:`NGHTTP2_MAX_WEIGHT`.
+ *
+ * The |nva| is an array of name/value pair :type:`nghttp2_nv` with
+ * |nvlen| elements.  The application is responsible to include
+ * required pseudo-header fields (header field whose name starts with
+ * ":") in |nva| and must place pseudo-headers before regular header
+ * fields.
+ *
+ * This function creates copies of all name/value pairs in |nva|.  It
+ * also lower-cases all names in |nva|.  The order of elements in
+ * |nva| is preserved.  For header fields with
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_NAME` and
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_VALUE` are set, header field name
+ * and value are not copied respectively.  With
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_NAME`, application is responsible to
+ * pass header field name in lowercase.  The application should
+ * maintain the references to them until
+ * :type:`nghttp2_on_frame_send_callback` or
+ * :type:`nghttp2_on_frame_not_send_callback` is called.
+ *
+ * HTTP/2 specification has requirement about header fields in the
+ * request HEADERS.  See the specification for more details.
+ *
+ * If |data_prd| is not ``NULL``, it provides data which will be sent
+ * in subsequent DATA frames.  In this case, a method that allows
+ * request message bodies
+ * (https://tools.ietf.org/html/rfc7231#section-4) must be specified
+ * with ``:method`` key in |nva| (e.g. ``POST``).  This function does
+ * not take ownership of the |data_prd|.  The function copies the
+ * members of the |data_prd|.  If |data_prd| is ``NULL``, HEADERS have
+ * END_STREAM set.  The |stream_user_data| is data associated to the
+ * stream opened by this request and can be an arbitrary pointer,
+ * which can be retrieved later by
+ * `nghttp2_session_get_stream_user_data()`.
+ *
+ * This function returns assigned stream ID if it succeeds, or one of
+ * the following negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_STREAM_ID_NOT_AVAILABLE`
+ *     No stream ID is available because maximum stream ID was
+ *     reached.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     Trying to depend on itself (new stream ID equals
+ *     ``pri_spec->stream_id``).
+ * :enum:`NGHTTP2_ERR_PROTO`
+ *     The |session| is server session.
+ *
+ * .. warning::
+ *
+ *   This function returns assigned stream ID if it succeeds.  But
+ *   that stream is not created yet.  The application must not submit
+ *   frame to that stream ID before
+ *   :type:`nghttp2_before_frame_send_callback` is called for this
+ *   frame.  This means `nghttp2_session_get_stream_user_data()` does
+ *   not work before the callback.  But
+ *   `nghttp2_session_set_stream_user_data()` handles this situation
+ *   specially, and it can set data to a stream during this period.
+ *
+ */
+NGHTTP2_EXTERN int32_t nghttp2_submit_request(
+    nghttp2_session *session, const nghttp2_priority_spec *pri_spec,
+    const nghttp2_nv *nva, size_t nvlen, const nghttp2_data_provider *data_prd,
+    void *stream_user_data);
+
+/**
+ * @function
+ *
+ * Submits response HEADERS frame and optionally one or more DATA
+ * frames against the stream |stream_id|.
+ *
+ * The |nva| is an array of name/value pair :type:`nghttp2_nv` with
+ * |nvlen| elements.  The application is responsible to include
+ * required pseudo-header fields (header field whose name starts with
+ * ":") in |nva| and must place pseudo-headers before regular header
+ * fields.
+ *
+ * This function creates copies of all name/value pairs in |nva|.  It
+ * also lower-cases all names in |nva|.  The order of elements in
+ * |nva| is preserved.  For header fields with
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_NAME` and
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_VALUE` are set, header field name
+ * and value are not copied respectively.  With
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_NAME`, application is responsible to
+ * pass header field name in lowercase.  The application should
+ * maintain the references to them until
+ * :type:`nghttp2_on_frame_send_callback` or
+ * :type:`nghttp2_on_frame_not_send_callback` is called.
+ *
+ * HTTP/2 specification has requirement about header fields in the
+ * response HEADERS.  See the specification for more details.
+ *
+ * If |data_prd| is not ``NULL``, it provides data which will be sent
+ * in subsequent DATA frames.  This function does not take ownership
+ * of the |data_prd|.  The function copies the members of the
+ * |data_prd|.  If |data_prd| is ``NULL``, HEADERS will have
+ * END_STREAM flag set.
+ *
+ * This method can be used as normal HTTP response and push response.
+ * When pushing a resource using this function, the |session| must be
+ * configured using `nghttp2_session_server_new()` or its variants and
+ * the target stream denoted by the |stream_id| must be reserved using
+ * `nghttp2_submit_push_promise()`.
+ *
+ * To send non-final response headers (e.g., HTTP status 101), don't
+ * use this function because this function half-closes the outbound
+ * stream.  Instead, use `nghttp2_submit_headers()` for this purpose.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |stream_id| is 0.
+ * :enum:`NGHTTP2_ERR_DATA_EXIST`
+ *     DATA or HEADERS has been already submitted and not fully
+ *     processed yet.  Normally, this does not happen, but when
+ *     application wrongly calls `nghttp2_submit_response()` twice,
+ *     this may happen.
+ * :enum:`NGHTTP2_ERR_PROTO`
+ *     The |session| is client session.
+ *
+ * .. warning::
+ *
+ *   Calling this function twice for the same stream ID may lead to
+ *   program crash.  It is generally considered to a programming error
+ *   to commit response twice.
+ */
+NGHTTP2_EXTERN int
+nghttp2_submit_response(nghttp2_session *session, int32_t stream_id,
+                        const nghttp2_nv *nva, size_t nvlen,
+                        const nghttp2_data_provider *data_prd);
+
+/**
+ * @function
+ *
+ * Submits trailer fields HEADERS against the stream |stream_id|.
+ *
+ * The |nva| is an array of name/value pair :type:`nghttp2_nv` with
+ * |nvlen| elements.  The application must not include pseudo-header
+ * fields (headers whose names starts with ":") in |nva|.
+ *
+ * This function creates copies of all name/value pairs in |nva|.  It
+ * also lower-cases all names in |nva|.  The order of elements in
+ * |nva| is preserved.  For header fields with
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_NAME` and
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_VALUE` are set, header field name
+ * and value are not copied respectively.  With
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_NAME`, application is responsible to
+ * pass header field name in lowercase.  The application should
+ * maintain the references to them until
+ * :type:`nghttp2_on_frame_send_callback` or
+ * :type:`nghttp2_on_frame_not_send_callback` is called.
+ *
+ * For server, trailer fields must follow response HEADERS or response
+ * DATA without END_STREAM flat set.  The library does not enforce
+ * this requirement, and applications should do this for themselves.
+ * If `nghttp2_submit_trailer()` is called before any response HEADERS
+ * submission (usually by `nghttp2_submit_response()`), the content of
+ * |nva| will be sent as response headers, which will result in error.
+ *
+ * This function has the same effect with `nghttp2_submit_headers()`,
+ * with flags = :enum:`NGHTTP2_FLAG_END_STREAM` and both pri_spec and
+ * stream_user_data to NULL.
+ *
+ * To submit trailer fields after `nghttp2_submit_response()` is
+ * called, the application has to specify
+ * :type:`nghttp2_data_provider` to `nghttp2_submit_response()`.
+ * Inside of :type:`nghttp2_data_source_read_callback`, when setting
+ * :enum:`NGHTTP2_DATA_FLAG_EOF`, also set
+ * :enum:`NGHTTP2_DATA_FLAG_NO_END_STREAM`.  After that, the
+ * application can send trailer fields using
+ * `nghttp2_submit_trailer()`.  `nghttp2_submit_trailer()` can be used
+ * inside :type:`nghttp2_data_source_read_callback`.
+ *
+ * This function returns 0 if it succeeds and |stream_id| is -1.
+ * Otherwise, this function returns 0 if it succeeds, or one of the
+ * following negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |stream_id| is 0.
+ */
+NGHTTP2_EXTERN int nghttp2_submit_trailer(nghttp2_session *session,
+                                          int32_t stream_id,
+                                          const nghttp2_nv *nva, size_t nvlen);
+
+/**
+ * @function
+ *
+ * Submits HEADERS frame. The |flags| is bitwise OR of the
+ * following values:
+ *
+ * * :enum:`NGHTTP2_FLAG_END_STREAM`
+ *
+ * If |flags| includes :enum:`NGHTTP2_FLAG_END_STREAM`, this frame has
+ * END_STREAM flag set.
+ *
+ * The library handles the CONTINUATION frame internally and it
+ * correctly sets END_HEADERS to the last sequence of the PUSH_PROMISE
+ * or CONTINUATION frame.
+ *
+ * If the |stream_id| is -1, this frame is assumed as request (i.e.,
+ * request HEADERS frame which opens new stream).  In this case, the
+ * assigned stream ID will be returned.  Otherwise, specify stream ID
+ * in |stream_id|.
+ *
+ * The |pri_spec| is priority specification of this request.  ``NULL``
+ * means the default priority (see
+ * `nghttp2_priority_spec_default_init()`).  To specify the priority,
+ * use `nghttp2_priority_spec_init()`.  If |pri_spec| is not ``NULL``,
+ * this function will copy its data members.
+ *
+ * The ``pri_spec->weight`` must be in [:enum:`NGHTTP2_MIN_WEIGHT`,
+ * :enum:`NGHTTP2_MAX_WEIGHT`], inclusive.  If ``pri_spec->weight`` is
+ * strictly less than :enum:`NGHTTP2_MIN_WEIGHT`, it becomes
+ * :enum:`NGHTTP2_MIN_WEIGHT`.  If it is strictly greater than
+ * :enum:`NGHTTP2_MAX_WEIGHT`, it becomes :enum:`NGHTTP2_MAX_WEIGHT`.
+ *
+ * The |nva| is an array of name/value pair :type:`nghttp2_nv` with
+ * |nvlen| elements.  The application is responsible to include
+ * required pseudo-header fields (header field whose name starts with
+ * ":") in |nva| and must place pseudo-headers before regular header
+ * fields.
+ *
+ * This function creates copies of all name/value pairs in |nva|.  It
+ * also lower-cases all names in |nva|.  The order of elements in
+ * |nva| is preserved.  For header fields with
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_NAME` and
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_VALUE` are set, header field name
+ * and value are not copied respectively.  With
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_NAME`, application is responsible to
+ * pass header field name in lowercase.  The application should
+ * maintain the references to them until
+ * :type:`nghttp2_on_frame_send_callback` or
+ * :type:`nghttp2_on_frame_not_send_callback` is called.
+ *
+ * The |stream_user_data| is a pointer to an arbitrary data which is
+ * associated to the stream this frame will open.  Therefore it is
+ * only used if this frame opens streams, in other words, it changes
+ * stream state from idle or reserved to open.
+ *
+ * This function is low-level in a sense that the application code can
+ * specify flags directly.  For usual HTTP request,
+ * `nghttp2_submit_request()` is useful.  Likewise, for HTTP response,
+ * prefer `nghttp2_submit_response()`.
+ *
+ * This function returns newly assigned stream ID if it succeeds and
+ * |stream_id| is -1.  Otherwise, this function returns 0 if it
+ * succeeds, or one of the following negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_STREAM_ID_NOT_AVAILABLE`
+ *     No stream ID is available because maximum stream ID was
+ *     reached.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |stream_id| is 0; or trying to depend on itself (stream ID
+ *     equals ``pri_spec->stream_id``).
+ * :enum:`NGHTTP2_ERR_DATA_EXIST`
+ *     DATA or HEADERS has been already submitted and not fully
+ *     processed yet.  This happens if stream denoted by |stream_id|
+ *     is in reserved state.
+ * :enum:`NGHTTP2_ERR_PROTO`
+ *     The |stream_id| is -1, and |session| is server session.
+ *
+ * .. warning::
+ *
+ *   This function returns assigned stream ID if it succeeds and
+ *   |stream_id| is -1.  But that stream is not opened yet.  The
+ *   application must not submit frame to that stream ID before
+ *   :type:`nghttp2_before_frame_send_callback` is called for this
+ *   frame.
+ *
+ */
+NGHTTP2_EXTERN int32_t nghttp2_submit_headers(
+    nghttp2_session *session, uint8_t flags, int32_t stream_id,
+    const nghttp2_priority_spec *pri_spec, const nghttp2_nv *nva, size_t nvlen,
+    void *stream_user_data);
+
+/**
+ * @function
+ *
+ * Submits one or more DATA frames to the stream |stream_id|.  The
+ * data to be sent are provided by |data_prd|.  If |flags| contains
+ * :enum:`NGHTTP2_FLAG_END_STREAM`, the last DATA frame has END_STREAM
+ * flag set.
+ *
+ * This function does not take ownership of the |data_prd|.  The
+ * function copies the members of the |data_prd|.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_DATA_EXIST`
+ *     DATA or HEADERS has been already submitted and not fully
+ *     processed yet.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |stream_id| is 0.
+ * :enum:`NGHTTP2_ERR_STREAM_CLOSED`
+ *     The stream was already closed; or the |stream_id| is invalid.
+ *
+ * .. note::
+ *
+ *   Currently, only one DATA or HEADERS is allowed for a stream at a
+ *   time.  Submitting these frames more than once before first DATA
+ *   or HEADERS is finished results in :enum:`NGHTTP2_ERR_DATA_EXIST`
+ *   error code.  The earliest callback which tells that previous
+ *   frame is done is :type:`nghttp2_on_frame_send_callback`.  In side
+ *   that callback, new data can be submitted using
+ *   `nghttp2_submit_data()`.  Of course, all data except for last one
+ *   must not have :enum:`NGHTTP2_FLAG_END_STREAM` flag set in
+ *   |flags|.  This sounds a bit complicated, and we recommend to use
+ *   `nghttp2_submit_request()` and `nghttp2_submit_response()` to
+ *   avoid this cascading issue.  The experience shows that for HTTP
+ *   use, these two functions are enough to implement both client and
+ *   server.
+ */
+NGHTTP2_EXTERN int nghttp2_submit_data(nghttp2_session *session, uint8_t flags,
+                                       int32_t stream_id,
+                                       const nghttp2_data_provider *data_prd);
+
+/**
+ * @function
+ *
+ * Submits PRIORITY frame to change the priority of stream |stream_id|
+ * to the priority specification |pri_spec|.
+ *
+ * The |flags| is currently ignored and should be
+ * :enum:`NGHTTP2_FLAG_NONE`.
+ *
+ * The |pri_spec| is priority specification of this request.  ``NULL``
+ * is not allowed for this function. To specify the priority, use
+ * `nghttp2_priority_spec_init()`.  This function will copy its data
+ * members.
+ *
+ * The ``pri_spec->weight`` must be in [:enum:`NGHTTP2_MIN_WEIGHT`,
+ * :enum:`NGHTTP2_MAX_WEIGHT`], inclusive.  If ``pri_spec->weight`` is
+ * strictly less than :enum:`NGHTTP2_MIN_WEIGHT`, it becomes
+ * :enum:`NGHTTP2_MIN_WEIGHT`.  If it is strictly greater than
+ * :enum:`NGHTTP2_MAX_WEIGHT`, it becomes :enum:`NGHTTP2_MAX_WEIGHT`.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |stream_id| is 0; or the |pri_spec| is NULL; or trying to
+ *     depend on itself.
+ */
+NGHTTP2_EXTERN int
+nghttp2_submit_priority(nghttp2_session *session, uint8_t flags,
+                        int32_t stream_id,
+                        const nghttp2_priority_spec *pri_spec);
+
+/**
+ * @function
+ *
+ * Submits RST_STREAM frame to cancel/reject the stream |stream_id|
+ * with the error code |error_code|.
+ *
+ * The pre-defined error code is one of :enum:`nghttp2_error_code`.
+ *
+ * The |flags| is currently ignored and should be
+ * :enum:`NGHTTP2_FLAG_NONE`.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |stream_id| is 0.
+ */
+NGHTTP2_EXTERN int nghttp2_submit_rst_stream(nghttp2_session *session,
+                                             uint8_t flags, int32_t stream_id,
+                                             uint32_t error_code);
+
+/**
+ * @function
+ *
+ * Stores local settings and submits SETTINGS frame.  The |iv| is the
+ * pointer to the array of :type:`nghttp2_settings_entry`.  The |niv|
+ * indicates the number of :type:`nghttp2_settings_entry`.
+ *
+ * The |flags| is currently ignored and should be
+ * :enum:`NGHTTP2_FLAG_NONE`.
+ *
+ * This function does not take ownership of the |iv|.  This function
+ * copies all the elements in the |iv|.
+ *
+ * While updating individual stream's local window size, if the window
+ * size becomes strictly larger than NGHTTP2_MAX_WINDOW_SIZE,
+ * RST_STREAM is issued against such a stream.
+ *
+ * SETTINGS with :enum:`NGHTTP2_FLAG_ACK` is automatically submitted
+ * by the library and application could not send it at its will.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |iv| contains invalid value (e.g., initial window size
+ *     strictly greater than (1 << 31) - 1.
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int nghttp2_submit_settings(nghttp2_session *session,
+                                           uint8_t flags,
+                                           const nghttp2_settings_entry *iv,
+                                           size_t niv);
+
+/**
+ * @function
+ *
+ * Submits PUSH_PROMISE frame.
+ *
+ * The |flags| is currently ignored.  The library handles the
+ * CONTINUATION frame internally and it correctly sets END_HEADERS to
+ * the last sequence of the PUSH_PROMISE or CONTINUATION frame.
+ *
+ * The |stream_id| must be client initiated stream ID.
+ *
+ * The |nva| is an array of name/value pair :type:`nghttp2_nv` with
+ * |nvlen| elements.  The application is responsible to include
+ * required pseudo-header fields (header field whose name starts with
+ * ":") in |nva| and must place pseudo-headers before regular header
+ * fields.
+ *
+ * This function creates copies of all name/value pairs in |nva|.  It
+ * also lower-cases all names in |nva|.  The order of elements in
+ * |nva| is preserved.  For header fields with
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_NAME` and
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_VALUE` are set, header field name
+ * and value are not copied respectively.  With
+ * :enum:`NGHTTP2_NV_FLAG_NO_COPY_NAME`, application is responsible to
+ * pass header field name in lowercase.  The application should
+ * maintain the references to them until
+ * :type:`nghttp2_on_frame_send_callback` or
+ * :type:`nghttp2_on_frame_not_send_callback` is called.
+ *
+ * The |promised_stream_user_data| is a pointer to an arbitrary data
+ * which is associated to the promised stream this frame will open and
+ * make it in reserved state.  It is available using
+ * `nghttp2_session_get_stream_user_data()`.  The application can
+ * access it in :type:`nghttp2_before_frame_send_callback` and
+ * :type:`nghttp2_on_frame_send_callback` of this frame.
+ *
+ * The client side is not allowed to use this function.
+ *
+ * To submit response headers and data, use
+ * `nghttp2_submit_response()`.
+ *
+ * This function returns assigned promised stream ID if it succeeds,
+ * or one of the following negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_PROTO`
+ *     This function was invoked when |session| is initialized as
+ *     client.
+ * :enum:`NGHTTP2_ERR_STREAM_ID_NOT_AVAILABLE`
+ *     No stream ID is available because maximum stream ID was
+ *     reached.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |stream_id| is 0; The |stream_id| does not designate stream
+ *     that peer initiated.
+ * :enum:`NGHTTP2_ERR_STREAM_CLOSED`
+ *     The stream was already closed; or the |stream_id| is invalid.
+ *
+ * .. warning::
+ *
+ *   This function returns assigned promised stream ID if it succeeds.
+ *   As of 1.16.0, stream object for pushed resource is created when
+ *   this function succeeds.  In that case, the application can submit
+ *   push response for the promised frame.
+ *
+ *   In 1.15.0 or prior versions, pushed stream is not opened yet when
+ *   this function succeeds.  The application must not submit frame to
+ *   that stream ID before :type:`nghttp2_before_frame_send_callback`
+ *   is called for this frame.
+ *
+ */
+NGHTTP2_EXTERN int32_t nghttp2_submit_push_promise(
+    nghttp2_session *session, uint8_t flags, int32_t stream_id,
+    const nghttp2_nv *nva, size_t nvlen, void *promised_stream_user_data);
+
+/**
+ * @function
+ *
+ * Submits PING frame.  You don't have to send PING back when you
+ * received PING frame.  The library automatically submits PING frame
+ * in this case.
+ *
+ * The |flags| is bitwise OR of 0 or more of the following value.
+ *
+ * * :enum:`NGHTTP2_FLAG_ACK`
+ *
+ * Unless `nghttp2_option_set_no_auto_ping_ack()` is used, the |flags|
+ * should be :enum:`NGHTTP2_FLAG_NONE`.
+ *
+ * If the |opaque_data| is non ``NULL``, then it should point to the 8
+ * bytes array of memory to specify opaque data to send with PING
+ * frame.  If the |opaque_data| is ``NULL``, zero-cleared 8 bytes will
+ * be sent as opaque data.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int nghttp2_submit_ping(nghttp2_session *session, uint8_t flags,
+                                       const uint8_t *opaque_data);
+
+/**
+ * @function
+ *
+ * Submits GOAWAY frame with the last stream ID |last_stream_id| and
+ * the error code |error_code|.
+ *
+ * The pre-defined error code is one of :enum:`nghttp2_error_code`.
+ *
+ * The |flags| is currently ignored and should be
+ * :enum:`NGHTTP2_FLAG_NONE`.
+ *
+ * The |last_stream_id| is peer's stream ID or 0.  So if |session| is
+ * initialized as client, |last_stream_id| must be even or 0.  If
+ * |session| is initialized as server, |last_stream_id| must be odd or
+ * 0.
+ *
+ * The HTTP/2 specification says last_stream_id must not be increased
+ * from the value previously sent.  So the actual value sent as
+ * last_stream_id is the minimum value between the given
+ * |last_stream_id| and the last_stream_id previously sent to the
+ * peer.
+ *
+ * If the |opaque_data| is not ``NULL`` and |opaque_data_len| is not
+ * zero, those data will be sent as additional debug data.  The
+ * library makes a copy of the memory region pointed by |opaque_data|
+ * with the length |opaque_data_len|, so the caller does not need to
+ * keep this memory after the return of this function.  If the
+ * |opaque_data_len| is 0, the |opaque_data| could be ``NULL``.
+ *
+ * After successful transmission of GOAWAY, following things happen.
+ * All incoming streams having strictly more than |last_stream_id| are
+ * closed.  All incoming HEADERS which starts new stream are simply
+ * ignored.  After all active streams are handled, both
+ * `nghttp2_session_want_read()` and `nghttp2_session_want_write()`
+ * return 0 and the application can close session.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |opaque_data_len| is too large; the |last_stream_id| is
+ *     invalid.
+ */
+NGHTTP2_EXTERN int nghttp2_submit_goaway(nghttp2_session *session,
+                                         uint8_t flags, int32_t last_stream_id,
+                                         uint32_t error_code,
+                                         const uint8_t *opaque_data,
+                                         size_t opaque_data_len);
+
+/**
+ * @function
+ *
+ * Returns the last stream ID of a stream for which
+ * :type:`nghttp2_on_frame_recv_callback` was invoked most recently.
+ * The returned value can be used as last_stream_id parameter for
+ * `nghttp2_submit_goaway()` and
+ * `nghttp2_session_terminate_session2()`.
+ *
+ * This function always succeeds.
+ */
+NGHTTP2_EXTERN int32_t
+nghttp2_session_get_last_proc_stream_id(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns nonzero if new request can be sent from local endpoint.
+ *
+ * This function return 0 if request is not allowed for this session.
+ * There are several reasons why request is not allowed.  Some of the
+ * reasons are: session is server; stream ID has been spent; GOAWAY
+ * has been sent or received.
+ *
+ * The application can call `nghttp2_submit_request()` without
+ * consulting this function.  In that case, `nghttp2_submit_request()`
+ * may return error.  Or, request is failed to sent, and
+ * :type:`nghttp2_on_stream_close_callback` is called.
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_check_request_allowed(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns nonzero if |session| is initialized as server side session.
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_check_server_session(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Submits WINDOW_UPDATE frame.
+ *
+ * The |flags| is currently ignored and should be
+ * :enum:`NGHTTP2_FLAG_NONE`.
+ *
+ * The |stream_id| is the stream ID to send this WINDOW_UPDATE.  To
+ * send connection level WINDOW_UPDATE, specify 0 to |stream_id|.
+ *
+ * If the |window_size_increment| is positive, the WINDOW_UPDATE with
+ * that value as window_size_increment is queued.  If the
+ * |window_size_increment| is larger than the received bytes from the
+ * remote endpoint, the local window size is increased by that
+ * difference.  If the sole purpose is to increase the local window
+ * size, consider to use `nghttp2_session_set_local_window_size()`.
+ *
+ * If the |window_size_increment| is negative, the local window size
+ * is decreased by -|window_size_increment|.  If automatic
+ * WINDOW_UPDATE is enabled
+ * (`nghttp2_option_set_no_auto_window_update()`), and the library
+ * decided that the WINDOW_UPDATE should be submitted, then
+ * WINDOW_UPDATE is queued with the current received bytes count.  If
+ * the sole purpose is to decrease the local window size, consider to
+ * use `nghttp2_session_set_local_window_size()`.
+ *
+ * If the |window_size_increment| is 0, the function does nothing and
+ * returns 0.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_FLOW_CONTROL`
+ *     The local window size overflow or gets negative.
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int nghttp2_submit_window_update(nghttp2_session *session,
+                                                uint8_t flags,
+                                                int32_t stream_id,
+                                                int32_t window_size_increment);
+
+/**
+ * @function
+ *
+ * Set local window size (local endpoints's window size) to the given
+ * |window_size| for the given stream denoted by |stream_id|.  To
+ * change connection level window size, specify 0 to |stream_id|.  To
+ * increase window size, this function may submit WINDOW_UPDATE frame
+ * to transmission queue.
+ *
+ * The |flags| is currently ignored and should be
+ * :enum:`NGHTTP2_FLAG_NONE`.
+ *
+ * This sounds similar to `nghttp2_submit_window_update()`, but there
+ * are 2 differences.  The first difference is that this function
+ * takes the absolute value of window size to set, rather than the
+ * delta.  To change the window size, this may be easier to use since
+ * the application just declares the intended window size, rather than
+ * calculating delta.  The second difference is that
+ * `nghttp2_submit_window_update()` affects the received bytes count
+ * which has not acked yet.  By the specification of
+ * `nghttp2_submit_window_update()`, to strictly increase the local
+ * window size, we have to submit delta including all received bytes
+ * count, which might not be desirable in some cases.  On the other
+ * hand, this function does not affect the received bytes count.  It
+ * just sets the local window size to the given value.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The |stream_id| is negative.
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int
+nghttp2_session_set_local_window_size(nghttp2_session *session, uint8_t flags,
+                                      int32_t stream_id, int32_t window_size);
+
+/**
+ * @function
+ *
+ * Submits extension frame.
+ *
+ * Application can pass arbitrary frame flags and stream ID in |flags|
+ * and |stream_id| respectively.  The |payload| is opaque pointer, and
+ * it can be accessible though ``frame->ext.payload`` in
+ * :type:`nghttp2_pack_extension_callback`.  The library will not own
+ * passed |payload| pointer.
+ *
+ * The application must set :type:`nghttp2_pack_extension_callback`
+ * using `nghttp2_session_callbacks_set_pack_extension_callback()`.
+ *
+ * The application should retain the memory pointed by |payload| until
+ * the transmission of extension frame is done (which is indicated by
+ * :type:`nghttp2_on_frame_send_callback`), or transmission fails
+ * (which is indicated by :type:`nghttp2_on_frame_not_send_callback`).
+ * If application does not touch this memory region after packing it
+ * into a wire format, application can free it inside
+ * :type:`nghttp2_pack_extension_callback`.
+ *
+ * The standard HTTP/2 frame cannot be sent with this function, so
+ * |type| must be strictly grater than 0x9.  Otherwise, this function
+ * will fail with error code :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_INVALID_STATE`
+ *     If :type:`nghttp2_pack_extension_callback` is not set.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     If  |type| specifies  standard  HTTP/2 frame  type.  The  frame
+ *     types  in the  rage [0x0,  0x9], both  inclusive, are  standard
+ *     HTTP/2 frame type, and cannot be sent using this function.
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory
+ */
+NGHTTP2_EXTERN int nghttp2_submit_extension(nghttp2_session *session,
+                                            uint8_t type, uint8_t flags,
+                                            int32_t stream_id, void *payload);
+
+/**
+ * @struct
+ *
+ * The payload of ALTSVC frame.  ALTSVC frame is a non-critical
+ * extension to HTTP/2.  If this frame is received, and
+ * `nghttp2_option_set_user_recv_extension_type()` is not set, and
+ * `nghttp2_option_set_builtin_recv_extension_type()` is set for
+ * :enum:`NGHTTP2_ALTSVC`, ``nghttp2_extension.payload`` will point to
+ * this struct.
+ *
+ * It has the following members:
+ */
+typedef struct {
+  /**
+   * The pointer to origin which this alternative service is
+   * associated with.  This is not necessarily NULL-terminated.
+   */
+  uint8_t *origin;
+  /**
+   * The length of the |origin|.
+   */
+  size_t origin_len;
+  /**
+   * The pointer to Alt-Svc field value contained in ALTSVC frame.
+   * This is not necessarily NULL-terminated.
+   */
+  uint8_t *field_value;
+  /**
+   * The length of the |field_value|.
+   */
+  size_t field_value_len;
+} nghttp2_ext_altsvc;
+
+/**
+ * @function
+ *
+ * Submits ALTSVC frame.
+ *
+ * ALTSVC frame is a non-critical extension to HTTP/2, and defined in
+ * `RFC 7383 <https://tools.ietf.org/html/rfc7838#section-4>`_.
+ *
+ * The |flags| is currently ignored and should be
+ * :enum:`NGHTTP2_FLAG_NONE`.
+ *
+ * The |origin| points to the origin this alternative service is
+ * associated with.  The |origin_len| is the length of the origin.  If
+ * |stream_id| is 0, the origin must be specified.  If |stream_id| is
+ * not zero, the origin must be empty (in other words, |origin_len|
+ * must be 0).
+ *
+ * The ALTSVC frame is only usable from server side.  If this function
+ * is invoked with client side session, this function returns
+ * :enum:`NGHTTP2_ERR_INVALID_STATE`.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory
+ * :enum:`NGHTTP2_ERR_INVALID_STATE`
+ *     The function is called from client side session
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     The sum of |origin_len| and |field_value_len| is larger than
+ *     16382; or |origin_len| is 0 while |stream_id| is 0; or
+ *     |origin_len| is not 0 while |stream_id| is not 0.
+ */
+NGHTTP2_EXTERN int nghttp2_submit_altsvc(nghttp2_session *session,
+                                         uint8_t flags, int32_t stream_id,
+                                         const uint8_t *origin,
+                                         size_t origin_len,
+                                         const uint8_t *field_value,
+                                         size_t field_value_len);
+
+/**
+ * @struct
+ *
+ * The single entry of an origin.
+ */
+typedef struct {
+  /**
+   * The pointer to origin.  No validation is made against this field
+   * by the library.  This is not necessarily NULL-terminated.
+   */
+  uint8_t *origin;
+  /**
+   * The length of the |origin|.
+   */
+  size_t origin_len;
+} nghttp2_origin_entry;
+
+/**
+ * @struct
+ *
+ * The payload of ORIGIN frame.  ORIGIN frame is a non-critical
+ * extension to HTTP/2 and defined by `RFC 8336
+ * <https://tools.ietf.org/html/rfc8336>`_.
+ *
+ * If this frame is received, and
+ * `nghttp2_option_set_user_recv_extension_type()` is not set, and
+ * `nghttp2_option_set_builtin_recv_extension_type()` is set for
+ * :enum:`NGHTTP2_ORIGIN`, ``nghttp2_extension.payload`` will point to
+ * this struct.
+ *
+ * It has the following members:
+ */
+typedef struct {
+  /**
+   * The number of origins contained in |ov|.
+   */
+  size_t nov;
+  /**
+   * The pointer to the array of origins contained in ORIGIN frame.
+   */
+  nghttp2_origin_entry *ov;
+} nghttp2_ext_origin;
+
+/**
+ * @function
+ *
+ * Submits ORIGIN frame.
+ *
+ * ORIGIN frame is a non-critical extension to HTTP/2 and defined by
+ * `RFC 8336 <https://tools.ietf.org/html/rfc8336>`_.
+ *
+ * The |flags| is currently ignored and should be
+ * :enum:`NGHTTP2_FLAG_NONE`.
+ *
+ * The |ov| points to the array of origins.  The |nov| specifies the
+ * number of origins included in |ov|.  This function creates copies
+ * of all elements in |ov|.
+ *
+ * The ORIGIN frame is only usable by a server.  If this function is
+ * invoked with client side session, this function returns
+ * :enum:`NGHTTP2_ERR_INVALID_STATE`.
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory
+ * :enum:`NGHTTP2_ERR_INVALID_STATE`
+ *     The function is called from client side session.
+ * :enum:`NGHTTP2_ERR_INVALID_ARGUMENT`
+ *     There are too many origins, or an origin is too large to fit
+ *     into a default frame payload.
+ */
+NGHTTP2_EXTERN int nghttp2_submit_origin(nghttp2_session *session,
+                                         uint8_t flags,
+                                         const nghttp2_origin_entry *ov,
+                                         size_t nov);
+
+/**
+ * @function
+ *
+ * Compares ``lhs->name`` of length ``lhs->namelen`` bytes and
+ * ``rhs->name`` of length ``rhs->namelen`` bytes.  Returns negative
+ * integer if ``lhs->name`` is found to be less than ``rhs->name``; or
+ * returns positive integer if ``lhs->name`` is found to be greater
+ * than ``rhs->name``; or returns 0 otherwise.
+ */
+NGHTTP2_EXTERN int nghttp2_nv_compare_name(const nghttp2_nv *lhs,
+                                           const nghttp2_nv *rhs);
+
+/**
+ * @function
+ *
+ * A helper function for dealing with NPN in client side or ALPN in
+ * server side.  The |in| contains peer's protocol list in preferable
+ * order.  The format of |in| is length-prefixed and not
+ * null-terminated.  For example, ``h2`` and
+ * ``http/1.1`` stored in |in| like this::
+ *
+ *     in[0] = 2
+ *     in[1..2] = "h2"
+ *     in[3] = 8
+ *     in[4..11] = "http/1.1"
+ *     inlen = 12
+ *
+ * The selection algorithm is as follows:
+ *
+ * 1. If peer's list contains HTTP/2 protocol the library supports,
+ *    it is selected and returns 1. The following step is not taken.
+ *
+ * 2. If peer's list contains ``http/1.1``, this function selects
+ *    ``http/1.1`` and returns 0.  The following step is not taken.
+ *
+ * 3. This function selects nothing and returns -1 (So called
+ *    non-overlap case).  In this case, |out| and |outlen| are left
+ *    untouched.
+ *
+ * Selecting ``h2`` means that ``h2`` is written into |*out| and its
+ * length (which is 2) is assigned to |*outlen|.
+ *
+ * For ALPN, refer to https://tools.ietf.org/html/rfc7301
+ *
+ * See http://technotes.googlecode.com/git/nextprotoneg.html for more
+ * details about NPN.
+ *
+ * For NPN, to use this method you should do something like::
+ *
+ *     static int select_next_proto_cb(SSL* ssl,
+ *                                     unsigned char **out,
+ *                                     unsigned char *outlen,
+ *                                     const unsigned char *in,
+ *                                     unsigned int inlen,
+ *                                     void *arg)
+ *     {
+ *         int rv;
+ *         rv = nghttp2_select_next_protocol(out, outlen, in, inlen);
+ *         if (rv == -1) {
+ *             return SSL_TLSEXT_ERR_NOACK;
+ *         }
+ *         if (rv == 1) {
+ *             ((MyType*)arg)->http2_selected = 1;
+ *         }
+ *         return SSL_TLSEXT_ERR_OK;
+ *     }
+ *     ...
+ *     SSL_CTX_set_next_proto_select_cb(ssl_ctx, select_next_proto_cb, my_obj);
+ *
+ */
+NGHTTP2_EXTERN int nghttp2_select_next_protocol(unsigned char **out,
+                                                unsigned char *outlen,
+                                                const unsigned char *in,
+                                                unsigned int inlen);
+
+/**
+ * @function
+ *
+ * Returns a pointer to a nghttp2_info struct with version information
+ * about the run-time library in use.  The |least_version| argument
+ * can be set to a 24 bit numerical value for the least accepted
+ * version number and if the condition is not met, this function will
+ * return a ``NULL``.  Pass in 0 to skip the version checking.
+ */
+NGHTTP2_EXTERN nghttp2_info *nghttp2_version(int least_version);
+
+/**
+ * @function
+ *
+ * Returns nonzero if the :type:`nghttp2_error` library error code
+ * |lib_error| is fatal.
+ */
+NGHTTP2_EXTERN int nghttp2_is_fatal(int lib_error_code);
+
+/**
+ * @function
+ *
+ * Returns nonzero if HTTP header field name |name| of length |len| is
+ * valid according to http://tools.ietf.org/html/rfc7230#section-3.2
+ *
+ * Because this is a header field name in HTTP2, the upper cased alphabet
+ * is treated as error.
+ */
+NGHTTP2_EXTERN int nghttp2_check_header_name(const uint8_t *name, size_t len);
+
+/**
+ * @function
+ *
+ * Returns nonzero if HTTP header field value |value| of length |len|
+ * is valid according to
+ * http://tools.ietf.org/html/rfc7230#section-3.2
+ */
+NGHTTP2_EXTERN int nghttp2_check_header_value(const uint8_t *value, size_t len);
+
+/**
+ * @function
+ *
+ * Returns nonzero if the |value| which is supposed to the value of
+ * :authority or host header field is valid according to
+ * https://tools.ietf.org/html/rfc3986#section-3.2
+ *
+ * |value| is valid if it merely consists of the allowed characters.
+ * In particular, it does not check whether |value| follows the syntax
+ * of authority.
+ */
+NGHTTP2_EXTERN int nghttp2_check_authority(const uint8_t *value, size_t len);
+
+/* HPACK API */
+
+struct nghttp2_hd_deflater;
+
+/**
+ * @struct
+ *
+ * HPACK deflater object.
+ */
+typedef struct nghttp2_hd_deflater nghttp2_hd_deflater;
+
+/**
+ * @function
+ *
+ * Initializes |*deflater_ptr| for deflating name/values pairs.
+ *
+ * The |max_deflate_dynamic_table_size| is the upper bound of header
+ * table size the deflater will use.
+ *
+ * If this function fails, |*deflater_ptr| is left untouched.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int
+nghttp2_hd_deflate_new(nghttp2_hd_deflater **deflater_ptr,
+                       size_t max_deflate_dynamic_table_size);
+
+/**
+ * @function
+ *
+ * Like `nghttp2_hd_deflate_new()`, but with additional custom memory
+ * allocator specified in the |mem|.
+ *
+ * The |mem| can be ``NULL`` and the call is equivalent to
+ * `nghttp2_hd_deflate_new()`.
+ *
+ * This function does not take ownership |mem|.  The application is
+ * responsible for freeing |mem|.
+ *
+ * The library code does not refer to |mem| pointer after this
+ * function returns, so the application can safely free it.
+ */
+NGHTTP2_EXTERN int
+nghttp2_hd_deflate_new2(nghttp2_hd_deflater **deflater_ptr,
+                        size_t max_deflate_dynamic_table_size,
+                        nghttp2_mem *mem);
+
+/**
+ * @function
+ *
+ * Deallocates any resources allocated for |deflater|.
+ */
+NGHTTP2_EXTERN void nghttp2_hd_deflate_del(nghttp2_hd_deflater *deflater);
+
+/**
+ * @function
+ *
+ * Changes header table size of the |deflater| to
+ * |settings_max_dynamic_table_size| bytes.  This may trigger eviction
+ * in the dynamic table.
+ *
+ * The |settings_max_dynamic_table_size| should be the value received
+ * in SETTINGS_HEADER_TABLE_SIZE.
+ *
+ * The deflater never uses more memory than
+ * ``max_deflate_dynamic_table_size`` bytes specified in
+ * `nghttp2_hd_deflate_new()`.  Therefore, if
+ * |settings_max_dynamic_table_size| >
+ * ``max_deflate_dynamic_table_size``, resulting maximum table size
+ * becomes ``max_deflate_dynamic_table_size``.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int
+nghttp2_hd_deflate_change_table_size(nghttp2_hd_deflater *deflater,
+                                     size_t settings_max_dynamic_table_size);
+
+/**
+ * @function
+ *
+ * Deflates the |nva|, which has the |nvlen| name/value pairs, into
+ * the |buf| of length |buflen|.
+ *
+ * If |buf| is not large enough to store the deflated header block,
+ * this function fails with :enum:`NGHTTP2_ERR_INSUFF_BUFSIZE`.  The
+ * caller should use `nghttp2_hd_deflate_bound()` to know the upper
+ * bound of buffer size required to deflate given header name/value
+ * pairs.
+ *
+ * Once this function fails, subsequent call of this function always
+ * returns :enum:`NGHTTP2_ERR_HEADER_COMP`.
+ *
+ * After this function returns, it is safe to delete the |nva|.
+ *
+ * This function returns the number of bytes written to |buf| if it
+ * succeeds, or one of the following negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_HEADER_COMP`
+ *     Deflation process has failed.
+ * :enum:`NGHTTP2_ERR_INSUFF_BUFSIZE`
+ *     The provided |buflen| size is too small to hold the output.
+ */
+NGHTTP2_EXTERN ssize_t nghttp2_hd_deflate_hd(nghttp2_hd_deflater *deflater,
+                                             uint8_t *buf, size_t buflen,
+                                             const nghttp2_nv *nva,
+                                             size_t nvlen);
+
+/**
+ * @function
+ *
+ * Deflates the |nva|, which has the |nvlen| name/value pairs, into
+ * the |veclen| size of buf vector |vec|.  The each size of buffer
+ * must be set in len field of :type:`nghttp2_vec`.  If and only if
+ * one chunk is filled up completely, next chunk will be used.  If
+ * |vec| is not large enough to store the deflated header block, this
+ * function fails with :enum:`NGHTTP2_ERR_INSUFF_BUFSIZE`.  The caller
+ * should use `nghttp2_hd_deflate_bound()` to know the upper bound of
+ * buffer size required to deflate given header name/value pairs.
+ *
+ * Once this function fails, subsequent call of this function always
+ * returns :enum:`NGHTTP2_ERR_HEADER_COMP`.
+ *
+ * After this function returns, it is safe to delete the |nva|.
+ *
+ * This function returns the number of bytes written to |vec| if it
+ * succeeds, or one of the following negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_HEADER_COMP`
+ *     Deflation process has failed.
+ * :enum:`NGHTTP2_ERR_INSUFF_BUFSIZE`
+ *     The provided |buflen| size is too small to hold the output.
+ */
+NGHTTP2_EXTERN ssize_t nghttp2_hd_deflate_hd_vec(nghttp2_hd_deflater *deflater,
+                                                 const nghttp2_vec *vec,
+                                                 size_t veclen,
+                                                 const nghttp2_nv *nva,
+                                                 size_t nvlen);
+
+/**
+ * @function
+ *
+ * Returns an upper bound on the compressed size after deflation of
+ * |nva| of length |nvlen|.
+ */
+NGHTTP2_EXTERN size_t nghttp2_hd_deflate_bound(nghttp2_hd_deflater *deflater,
+                                               const nghttp2_nv *nva,
+                                               size_t nvlen);
+
+/**
+ * @function
+ *
+ * Returns the number of entries that header table of |deflater|
+ * contains.  This is the sum of the number of static table and
+ * dynamic table, so the return value is at least 61.
+ */
+NGHTTP2_EXTERN
+size_t nghttp2_hd_deflate_get_num_table_entries(nghttp2_hd_deflater *deflater);
+
+/**
+ * @function
+ *
+ * Returns the table entry denoted by |idx| from header table of
+ * |deflater|.  The |idx| is 1-based, and idx=1 returns first entry of
+ * static table.  idx=62 returns first entry of dynamic table if it
+ * exists.  Specifying idx=0 is error, and this function returns NULL.
+ * If |idx| is strictly greater than the number of entries the tables
+ * contain, this function returns NULL.
+ */
+NGHTTP2_EXTERN
+const nghttp2_nv *
+nghttp2_hd_deflate_get_table_entry(nghttp2_hd_deflater *deflater, size_t idx);
+
+/**
+ * @function
+ *
+ * Returns the used dynamic table size, including the overhead 32
+ * bytes per entry described in RFC 7541.
+ */
+NGHTTP2_EXTERN
+size_t nghttp2_hd_deflate_get_dynamic_table_size(nghttp2_hd_deflater *deflater);
+
+/**
+ * @function
+ *
+ * Returns the maximum dynamic table size.
+ */
+NGHTTP2_EXTERN
+size_t
+nghttp2_hd_deflate_get_max_dynamic_table_size(nghttp2_hd_deflater *deflater);
+
+struct nghttp2_hd_inflater;
+
+/**
+ * @struct
+ *
+ * HPACK inflater object.
+ */
+typedef struct nghttp2_hd_inflater nghttp2_hd_inflater;
+
+/**
+ * @function
+ *
+ * Initializes |*inflater_ptr| for inflating name/values pairs.
+ *
+ * If this function fails, |*inflater_ptr| is left untouched.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ */
+NGHTTP2_EXTERN int nghttp2_hd_inflate_new(nghttp2_hd_inflater **inflater_ptr);
+
+/**
+ * @function
+ *
+ * Like `nghttp2_hd_inflate_new()`, but with additional custom memory
+ * allocator specified in the |mem|.
+ *
+ * The |mem| can be ``NULL`` and the call is equivalent to
+ * `nghttp2_hd_inflate_new()`.
+ *
+ * This function does not take ownership |mem|.  The application is
+ * responsible for freeing |mem|.
+ *
+ * The library code does not refer to |mem| pointer after this
+ * function returns, so the application can safely free it.
+ */
+NGHTTP2_EXTERN int nghttp2_hd_inflate_new2(nghttp2_hd_inflater **inflater_ptr,
+                                           nghttp2_mem *mem);
+
+/**
+ * @function
+ *
+ * Deallocates any resources allocated for |inflater|.
+ */
+NGHTTP2_EXTERN void nghttp2_hd_inflate_del(nghttp2_hd_inflater *inflater);
+
+/**
+ * @function
+ *
+ * Changes header table size in the |inflater|.  This may trigger
+ * eviction in the dynamic table.
+ *
+ * The |settings_max_dynamic_table_size| should be the value
+ * transmitted in SETTINGS_HEADER_TABLE_SIZE.
+ *
+ * This function must not be called while header block is being
+ * inflated.  In other words, this function must be called after
+ * initialization of |inflater|, but before calling
+ * `nghttp2_hd_inflate_hd2()`, or after
+ * `nghttp2_hd_inflate_end_headers()`.  Otherwise,
+ * `NGHTTP2_ERR_INVALID_STATE` was returned.
+ *
+ * This function returns 0 if it succeeds, or one of the following
+ * negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_INVALID_STATE`
+ *     The function is called while header block is being inflated.
+ *     Probably, application missed to call
+ *     `nghttp2_hd_inflate_end_headers()`.
+ */
+NGHTTP2_EXTERN int
+nghttp2_hd_inflate_change_table_size(nghttp2_hd_inflater *inflater,
+                                     size_t settings_max_dynamic_table_size);
+
+/**
+ * @enum
+ *
+ * The flags for header inflation.
+ */
+typedef enum {
+  /**
+   * No flag set.
+   */
+  NGHTTP2_HD_INFLATE_NONE = 0,
+  /**
+   * Indicates all headers were inflated.
+   */
+  NGHTTP2_HD_INFLATE_FINAL = 0x01,
+  /**
+   * Indicates a header was emitted.
+   */
+  NGHTTP2_HD_INFLATE_EMIT = 0x02
+} nghttp2_hd_inflate_flag;
+
+/**
+ * @function
+ *
+ * .. warning::
+ *
+ *   Deprecated.  Use `nghttp2_hd_inflate_hd2()` instead.
+ *
+ * Inflates name/value block stored in |in| with length |inlen|.  This
+ * function performs decompression.  For each successful emission of
+ * header name/value pair, :enum:`NGHTTP2_HD_INFLATE_EMIT` is set in
+ * |*inflate_flags| and name/value pair is assigned to the |nv_out|
+ * and the function returns.  The caller must not free the members of
+ * |nv_out|.
+ *
+ * The |nv_out| may include pointers to the memory region in the |in|.
+ * The caller must retain the |in| while the |nv_out| is used.
+ *
+ * The application should call this function repeatedly until the
+ * ``(*inflate_flags) & NGHTTP2_HD_INFLATE_FINAL`` is nonzero and
+ * return value is non-negative.  This means the all input values are
+ * processed successfully.  Then the application must call
+ * `nghttp2_hd_inflate_end_headers()` to prepare for the next header
+ * block input.
+ *
+ * The caller can feed complete compressed header block.  It also can
+ * feed it in several chunks.  The caller must set |in_final| to
+ * nonzero if the given input is the last block of the compressed
+ * header.
+ *
+ * This function returns the number of bytes processed if it succeeds,
+ * or one of the following negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_HEADER_COMP`
+ *     Inflation process has failed.
+ * :enum:`NGHTTP2_ERR_BUFFER_ERROR`
+ *     The header field name or value is too large.
+ *
+ * Example follows::
+ *
+ *     int inflate_header_block(nghttp2_hd_inflater *hd_inflater,
+ *                              uint8_t *in, size_t inlen, int final)
+ *     {
+ *         ssize_t rv;
+ *
+ *         for(;;) {
+ *             nghttp2_nv nv;
+ *             int inflate_flags = 0;
+ *
+ *             rv = nghttp2_hd_inflate_hd(hd_inflater, &nv, &inflate_flags,
+ *                                        in, inlen, final);
+ *
+ *             if(rv < 0) {
+ *                 fprintf(stderr, "inflate failed with error code %zd", rv);
+ *                 return -1;
+ *             }
+ *
+ *             in += rv;
+ *             inlen -= rv;
+ *
+ *             if(inflate_flags & NGHTTP2_HD_INFLATE_EMIT) {
+ *                 fwrite(nv.name, nv.namelen, 1, stderr);
+ *                 fprintf(stderr, ": ");
+ *                 fwrite(nv.value, nv.valuelen, 1, stderr);
+ *                 fprintf(stderr, "\n");
+ *             }
+ *             if(inflate_flags & NGHTTP2_HD_INFLATE_FINAL) {
+ *                 nghttp2_hd_inflate_end_headers(hd_inflater);
+ *                 break;
+ *             }
+ *             if((inflate_flags & NGHTTP2_HD_INFLATE_EMIT) == 0 &&
+ *                inlen == 0) {
+ *                break;
+ *             }
+ *         }
+ *
+ *         return 0;
+ *     }
+ *
+ */
+NGHTTP2_EXTERN ssize_t nghttp2_hd_inflate_hd(nghttp2_hd_inflater *inflater,
+                                             nghttp2_nv *nv_out,
+                                             int *inflate_flags, uint8_t *in,
+                                             size_t inlen, int in_final);
+
+/**
+ * @function
+ *
+ * Inflates name/value block stored in |in| with length |inlen|.  This
+ * function performs decompression.  For each successful emission of
+ * header name/value pair, :enum:`NGHTTP2_HD_INFLATE_EMIT` is set in
+ * |*inflate_flags| and name/value pair is assigned to the |nv_out|
+ * and the function returns.  The caller must not free the members of
+ * |nv_out|.
+ *
+ * The |nv_out| may include pointers to the memory region in the |in|.
+ * The caller must retain the |in| while the |nv_out| is used.
+ *
+ * The application should call this function repeatedly until the
+ * ``(*inflate_flags) & NGHTTP2_HD_INFLATE_FINAL`` is nonzero and
+ * return value is non-negative.  If that happens, all given input
+ * data (|inlen| bytes) are processed successfully.  Then the
+ * application must call `nghttp2_hd_inflate_end_headers()` to prepare
+ * for the next header block input.
+ *
+ * In other words, if |in_final| is nonzero, and this function returns
+ * |inlen|, you can assert that :enum:`NGHTTP2_HD_INFLATE_FINAL` is
+ * set in |*inflate_flags|.
+ *
+ * The caller can feed complete compressed header block.  It also can
+ * feed it in several chunks.  The caller must set |in_final| to
+ * nonzero if the given input is the last block of the compressed
+ * header.
+ *
+ * This function returns the number of bytes processed if it succeeds,
+ * or one of the following negative error codes:
+ *
+ * :enum:`NGHTTP2_ERR_NOMEM`
+ *     Out of memory.
+ * :enum:`NGHTTP2_ERR_HEADER_COMP`
+ *     Inflation process has failed.
+ * :enum:`NGHTTP2_ERR_BUFFER_ERROR`
+ *     The header field name or value is too large.
+ *
+ * Example follows::
+ *
+ *     int inflate_header_block(nghttp2_hd_inflater *hd_inflater,
+ *                              uint8_t *in, size_t inlen, int final)
+ *     {
+ *         ssize_t rv;
+ *
+ *         for(;;) {
+ *             nghttp2_nv nv;
+ *             int inflate_flags = 0;
+ *
+ *             rv = nghttp2_hd_inflate_hd2(hd_inflater, &nv, &inflate_flags,
+ *                                         in, inlen, final);
+ *
+ *             if(rv < 0) {
+ *                 fprintf(stderr, "inflate failed with error code %zd", rv);
+ *                 return -1;
+ *             }
+ *
+ *             in += rv;
+ *             inlen -= rv;
+ *
+ *             if(inflate_flags & NGHTTP2_HD_INFLATE_EMIT) {
+ *                 fwrite(nv.name, nv.namelen, 1, stderr);
+ *                 fprintf(stderr, ": ");
+ *                 fwrite(nv.value, nv.valuelen, 1, stderr);
+ *                 fprintf(stderr, "\n");
+ *             }
+ *             if(inflate_flags & NGHTTP2_HD_INFLATE_FINAL) {
+ *                 nghttp2_hd_inflate_end_headers(hd_inflater);
+ *                 break;
+ *             }
+ *             if((inflate_flags & NGHTTP2_HD_INFLATE_EMIT) == 0 &&
+ *                inlen == 0) {
+ *                break;
+ *             }
+ *         }
+ *
+ *         return 0;
+ *     }
+ *
+ */
+NGHTTP2_EXTERN ssize_t nghttp2_hd_inflate_hd2(nghttp2_hd_inflater *inflater,
+                                              nghttp2_nv *nv_out,
+                                              int *inflate_flags,
+                                              const uint8_t *in, size_t inlen,
+                                              int in_final);
+
+/**
+ * @function
+ *
+ * Signals the end of decompression for one header block.
+ *
+ * This function returns 0 if it succeeds. Currently this function
+ * always succeeds.
+ */
+NGHTTP2_EXTERN int
+nghttp2_hd_inflate_end_headers(nghttp2_hd_inflater *inflater);
+
+/**
+ * @function
+ *
+ * Returns the number of entries that header table of |inflater|
+ * contains.  This is the sum of the number of static table and
+ * dynamic table, so the return value is at least 61.
+ */
+NGHTTP2_EXTERN
+size_t nghttp2_hd_inflate_get_num_table_entries(nghttp2_hd_inflater *inflater);
+
+/**
+ * @function
+ *
+ * Returns the table entry denoted by |idx| from header table of
+ * |inflater|.  The |idx| is 1-based, and idx=1 returns first entry of
+ * static table.  idx=62 returns first entry of dynamic table if it
+ * exists.  Specifying idx=0 is error, and this function returns NULL.
+ * If |idx| is strictly greater than the number of entries the tables
+ * contain, this function returns NULL.
+ */
+NGHTTP2_EXTERN
+const nghttp2_nv *
+nghttp2_hd_inflate_get_table_entry(nghttp2_hd_inflater *inflater, size_t idx);
+
+/**
+ * @function
+ *
+ * Returns the used dynamic table size, including the overhead 32
+ * bytes per entry described in RFC 7541.
+ */
+NGHTTP2_EXTERN
+size_t nghttp2_hd_inflate_get_dynamic_table_size(nghttp2_hd_inflater *inflater);
+
+/**
+ * @function
+ *
+ * Returns the maximum dynamic table size.
+ */
+NGHTTP2_EXTERN
+size_t
+nghttp2_hd_inflate_get_max_dynamic_table_size(nghttp2_hd_inflater *inflater);
+
+struct nghttp2_stream;
+
+/**
+ * @struct
+ *
+ * The structure to represent HTTP/2 stream.  The details of this
+ * structure are intentionally hidden from the public API.
+ */
+typedef struct nghttp2_stream nghttp2_stream;
+
+/**
+ * @function
+ *
+ * Returns pointer to :type:`nghttp2_stream` object denoted by
+ * |stream_id|.  If stream was not found, returns NULL.
+ *
+ * Returns imaginary root stream (see
+ * `nghttp2_session_get_root_stream()`) if 0 is given in |stream_id|.
+ *
+ * Unless |stream_id| == 0, the returned pointer is valid until next
+ * call of `nghttp2_session_send()`, `nghttp2_session_mem_send()`,
+ * `nghttp2_session_recv()`, and `nghttp2_session_mem_recv()`.
+ */
+NGHTTP2_EXTERN nghttp2_stream *
+nghttp2_session_find_stream(nghttp2_session *session, int32_t stream_id);
+
+/**
+ * @enum
+ *
+ * State of stream as described in RFC 7540.
+ */
+typedef enum {
+  /**
+   * idle state.
+   */
+  NGHTTP2_STREAM_STATE_IDLE = 1,
+  /**
+   * open state.
+   */
+  NGHTTP2_STREAM_STATE_OPEN,
+  /**
+   * reserved (local) state.
+   */
+  NGHTTP2_STREAM_STATE_RESERVED_LOCAL,
+  /**
+   * reserved (remote) state.
+   */
+  NGHTTP2_STREAM_STATE_RESERVED_REMOTE,
+  /**
+   * half closed (local) state.
+   */
+  NGHTTP2_STREAM_STATE_HALF_CLOSED_LOCAL,
+  /**
+   * half closed (remote) state.
+   */
+  NGHTTP2_STREAM_STATE_HALF_CLOSED_REMOTE,
+  /**
+   * closed state.
+   */
+  NGHTTP2_STREAM_STATE_CLOSED
+} nghttp2_stream_proto_state;
+
+/**
+ * @function
+ *
+ * Returns state of |stream|.  The root stream retrieved by
+ * `nghttp2_session_get_root_stream()` will have stream state
+ * :enum:`NGHTTP2_STREAM_STATE_IDLE`.
+ */
+NGHTTP2_EXTERN nghttp2_stream_proto_state
+nghttp2_stream_get_state(nghttp2_stream *stream);
+
+/**
+ * @function
+ *
+ * Returns root of dependency tree, which is imaginary stream with
+ * stream ID 0.  The returned pointer is valid until |session| is
+ * freed by `nghttp2_session_del()`.
+ */
+NGHTTP2_EXTERN nghttp2_stream *
+nghttp2_session_get_root_stream(nghttp2_session *session);
+
+/**
+ * @function
+ *
+ * Returns the parent stream of |stream| in dependency tree.  Returns
+ * NULL if there is no such stream.
+ */
+NGHTTP2_EXTERN nghttp2_stream *
+nghttp2_stream_get_parent(nghttp2_stream *stream);
+
+NGHTTP2_EXTERN int32_t nghttp2_stream_get_stream_id(nghttp2_stream *stream);
+
+/**
+ * @function
+ *
+ * Returns the next sibling stream of |stream| in dependency tree.
+ * Returns NULL if there is no such stream.
+ */
+NGHTTP2_EXTERN nghttp2_stream *
+nghttp2_stream_get_next_sibling(nghttp2_stream *stream);
+
+/**
+ * @function
+ *
+ * Returns the previous sibling stream of |stream| in dependency tree.
+ * Returns NULL if there is no such stream.
+ */
+NGHTTP2_EXTERN nghttp2_stream *
+nghttp2_stream_get_previous_sibling(nghttp2_stream *stream);
+
+/**
+ * @function
+ *
+ * Returns the first child stream of |stream| in dependency tree.
+ * Returns NULL if there is no such stream.
+ */
+NGHTTP2_EXTERN nghttp2_stream *
+nghttp2_stream_get_first_child(nghttp2_stream *stream);
+
+/**
+ * @function
+ *
+ * Returns dependency weight to the parent stream of |stream|.
+ */
+NGHTTP2_EXTERN int32_t nghttp2_stream_get_weight(nghttp2_stream *stream);
+
+/**
+ * @function
+ *
+ * Returns the sum of the weight for |stream|'s children.
+ */
+NGHTTP2_EXTERN int32_t
+nghttp2_stream_get_sum_dependency_weight(nghttp2_stream *stream);
+
+/**
+ * @functypedef
+ *
+ * Callback function invoked when the library outputs debug logging.
+ * The function is called with arguments suitable for ``vfprintf(3)``
+ *
+ * The debug output is only enabled if the library is built with
+ * ``DEBUGBUILD`` macro defined.
+ */
+typedef void (*nghttp2_debug_vprintf_callback)(const char *format,
+                                               va_list args);
+
+/**
+ * @function
+ *
+ * Sets a debug output callback called by the library when built with
+ * ``DEBUGBUILD`` macro defined.  If this option is not used, debug
+ * log is written into standard error output.
+ *
+ * For builds without ``DEBUGBUILD`` macro defined, this function is
+ * noop.
+ *
+ * Note that building with ``DEBUGBUILD`` may cause significant
+ * performance penalty to libnghttp2 because of extra processing.  It
+ * should be used for debugging purpose only.
+ *
+ * .. Warning::
+ *
+ *   Building with ``DEBUGBUILD`` may cause significant performance
+ *   penalty to libnghttp2 because of extra processing.  It should be
+ *   used for debugging purpose only.  We write this two times because
+ *   this is important.
+ */
+NGHTTP2_EXTERN void nghttp2_set_debug_vprintf_callback(
+    nghttp2_debug_vprintf_callback debug_vprintf_callback);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NGHTTP2_H */
diff --git a/tools/sdk/esp32s3/include/nghttp/port/include/http_parser.h b/tools/sdk/esp32s3/include/nghttp/port/include/http_parser.h
new file mode 100644
index 00000000000..105ae510a8a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/nghttp/port/include/http_parser.h
@@ -0,0 +1,362 @@
+/* Copyright Joyent, Inc. and other Node contributors. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+#ifndef http_parser_h
+#define http_parser_h
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Also update SONAME in the Makefile whenever you change these. */
+#define HTTP_PARSER_VERSION_MAJOR 2
+#define HTTP_PARSER_VERSION_MINOR 7
+#define HTTP_PARSER_VERSION_PATCH 0
+
+#include <sys/types.h>
+#if defined(_WIN32) && !defined(__MINGW32__) && \
+  (!defined(_MSC_VER) || _MSC_VER<1600) && !defined(__WINE__)
+#include <BaseTsd.h>
+#include <stddef.h>
+typedef __int8 int8_t;
+typedef unsigned __int8 uint8_t;
+typedef __int16 int16_t;
+typedef unsigned __int16 uint16_t;
+typedef __int32 int32_t;
+typedef unsigned __int32 uint32_t;
+typedef __int64 int64_t;
+typedef unsigned __int64 uint64_t;
+#else
+#include <stdint.h>
+#endif
+
+/* Compile with -DHTTP_PARSER_STRICT=0 to make less checks, but run
+ * faster
+ */
+#ifndef HTTP_PARSER_STRICT
+# define HTTP_PARSER_STRICT 1
+#endif
+
+/* Maximium header size allowed. If the macro is not defined
+ * before including this header then the default is used. To
+ * change the maximum header size, define the macro in the build
+ * environment (e.g. -DHTTP_MAX_HEADER_SIZE=<value>). To remove
+ * the effective limit on the size of the header, define the macro
+ * to a very large number (e.g. -DHTTP_MAX_HEADER_SIZE=0x7fffffff)
+ */
+#ifndef HTTP_MAX_HEADER_SIZE
+# define HTTP_MAX_HEADER_SIZE (80*1024)
+#endif
+
+typedef struct http_parser http_parser;
+typedef struct http_parser_settings http_parser_settings;
+
+
+/* Callbacks should return non-zero to indicate an error. The parser will
+ * then halt execution.
+ *
+ * The one exception is on_headers_complete. In a HTTP_RESPONSE parser
+ * returning '1' from on_headers_complete will tell the parser that it
+ * should not expect a body. This is used when receiving a response to a
+ * HEAD request which may contain 'Content-Length' or 'Transfer-Encoding:
+ * chunked' headers that indicate the presence of a body.
+ *
+ * Returning `2` from on_headers_complete will tell parser that it should not
+ * expect neither a body nor any futher responses on this connection. This is
+ * useful for handling responses to a CONNECT request which may not contain
+ * `Upgrade` or `Connection: upgrade` headers.
+ *
+ * http_data_cb does not return data chunks. It will be called arbitrarily
+ * many times for each string. E.G. you might get 10 callbacks for "on_url"
+ * each providing just a few characters more data.
+ */
+typedef int (*http_data_cb) (http_parser*, const char *at, size_t length);
+typedef int (*http_cb) (http_parser*);
+
+
+/* Request Methods */
+#define HTTP_METHOD_MAP(XX)         \
+  XX(0,  DELETE,      DELETE)       \
+  XX(1,  GET,         GET)          \
+  XX(2,  HEAD,        HEAD)         \
+  XX(3,  POST,        POST)         \
+  XX(4,  PUT,         PUT)          \
+  /* pathological */                \
+  XX(5,  CONNECT,     CONNECT)      \
+  XX(6,  OPTIONS,     OPTIONS)      \
+  XX(7,  TRACE,       TRACE)        \
+  /* WebDAV */                      \
+  XX(8,  COPY,        COPY)         \
+  XX(9,  LOCK,        LOCK)         \
+  XX(10, MKCOL,       MKCOL)        \
+  XX(11, MOVE,        MOVE)         \
+  XX(12, PROPFIND,    PROPFIND)     \
+  XX(13, PROPPATCH,   PROPPATCH)    \
+  XX(14, SEARCH,      SEARCH)       \
+  XX(15, UNLOCK,      UNLOCK)       \
+  XX(16, BIND,        BIND)         \
+  XX(17, REBIND,      REBIND)       \
+  XX(18, UNBIND,      UNBIND)       \
+  XX(19, ACL,         ACL)          \
+  /* subversion */                  \
+  XX(20, REPORT,      REPORT)       \
+  XX(21, MKACTIVITY,  MKACTIVITY)   \
+  XX(22, CHECKOUT,    CHECKOUT)     \
+  XX(23, MERGE,       MERGE)        \
+  /* upnp */                        \
+  XX(24, MSEARCH,     M-SEARCH)     \
+  XX(25, NOTIFY,      NOTIFY)       \
+  XX(26, SUBSCRIBE,   SUBSCRIBE)    \
+  XX(27, UNSUBSCRIBE, UNSUBSCRIBE)  \
+  /* RFC-5789 */                    \
+  XX(28, PATCH,       PATCH)        \
+  XX(29, PURGE,       PURGE)        \
+  /* CalDAV */                      \
+  XX(30, MKCALENDAR,  MKCALENDAR)   \
+  /* RFC-2068, section 19.6.1.2 */  \
+  XX(31, LINK,        LINK)         \
+  XX(32, UNLINK,      UNLINK)       \
+
+enum http_method
+  {
+#define XX(num, name, string) HTTP_##name = num,
+  HTTP_METHOD_MAP(XX)
+#undef XX
+  };
+
+
+enum http_parser_type { HTTP_REQUEST, HTTP_RESPONSE, HTTP_BOTH };
+
+
+/* Flag values for http_parser.flags field */
+enum flags
+  { F_CHUNKED               = 1 << 0
+  , F_CONNECTION_KEEP_ALIVE = 1 << 1
+  , F_CONNECTION_CLOSE      = 1 << 2
+  , F_CONNECTION_UPGRADE    = 1 << 3
+  , F_TRAILING              = 1 << 4
+  , F_UPGRADE               = 1 << 5
+  , F_SKIPBODY              = 1 << 6
+  , F_CONTENTLENGTH         = 1 << 7
+  };
+
+
+/* Map for errno-related constants
+ *
+ * The provided argument should be a macro that takes 2 arguments.
+ */
+#define HTTP_ERRNO_MAP(XX)                                           \
+  /* No error */                                                     \
+  XX(OK, "success")                                                  \
+                                                                     \
+  /* Callback-related errors */                                      \
+  XX(CB_message_begin, "the on_message_begin callback failed")       \
+  XX(CB_url, "the on_url callback failed")                           \
+  XX(CB_header_field, "the on_header_field callback failed")         \
+  XX(CB_header_value, "the on_header_value callback failed")         \
+  XX(CB_headers_complete, "the on_headers_complete callback failed") \
+  XX(CB_body, "the on_body callback failed")                         \
+  XX(CB_message_complete, "the on_message_complete callback failed") \
+  XX(CB_status, "the on_status callback failed")                     \
+  XX(CB_chunk_header, "the on_chunk_header callback failed")         \
+  XX(CB_chunk_complete, "the on_chunk_complete callback failed")     \
+                                                                     \
+  /* Parsing-related errors */                                       \
+  XX(INVALID_EOF_STATE, "stream ended at an unexpected time")        \
+  XX(HEADER_OVERFLOW,                                                \
+     "too many header bytes seen; overflow detected")                \
+  XX(CLOSED_CONNECTION,                                              \
+     "data received after completed connection: close message")      \
+  XX(INVALID_VERSION, "invalid HTTP version")                        \
+  XX(INVALID_STATUS, "invalid HTTP status code")                     \
+  XX(INVALID_METHOD, "invalid HTTP method")                          \
+  XX(INVALID_URL, "invalid URL")                                     \
+  XX(INVALID_HOST, "invalid host")                                   \
+  XX(INVALID_PORT, "invalid port")                                   \
+  XX(INVALID_PATH, "invalid path")                                   \
+  XX(INVALID_QUERY_STRING, "invalid query string")                   \
+  XX(INVALID_FRAGMENT, "invalid fragment")                           \
+  XX(LF_EXPECTED, "LF character expected")                           \
+  XX(INVALID_HEADER_TOKEN, "invalid character in header")            \
+  XX(INVALID_CONTENT_LENGTH,                                         \
+     "invalid character in content-length header")                   \
+  XX(UNEXPECTED_CONTENT_LENGTH,                                      \
+     "unexpected content-length header")                             \
+  XX(INVALID_CHUNK_SIZE,                                             \
+     "invalid character in chunk size header")                       \
+  XX(INVALID_CONSTANT, "invalid constant string")                    \
+  XX(INVALID_INTERNAL_STATE, "encountered unexpected internal state")\
+  XX(STRICT, "strict mode assertion failed")                         \
+  XX(PAUSED, "parser is paused")                                     \
+  XX(UNKNOWN, "an unknown error occurred")
+
+
+/* Define HPE_* values for each errno value above */
+#define HTTP_ERRNO_GEN(n, s) HPE_##n,
+enum http_errno {
+  HTTP_ERRNO_MAP(HTTP_ERRNO_GEN)
+};
+#undef HTTP_ERRNO_GEN
+
+
+/* Get an http_errno value from an http_parser */
+#define HTTP_PARSER_ERRNO(p)            ((enum http_errno) (p)->http_errno)
+
+
+struct http_parser {
+  /** PRIVATE **/
+  unsigned int type : 2;         /* enum http_parser_type */
+  unsigned int flags : 8;        /* F_* values from 'flags' enum; semi-public */
+  unsigned int state : 7;        /* enum state from http_parser.c */
+  unsigned int header_state : 7; /* enum header_state from http_parser.c */
+  unsigned int index : 7;        /* index into current matcher */
+  unsigned int lenient_http_headers : 1;
+
+  uint32_t nread;          /* # bytes read in various scenarios */
+  uint64_t content_length; /* # bytes in body (0 if no Content-Length header) */
+
+  /** READ-ONLY **/
+  unsigned short http_major;
+  unsigned short http_minor;
+  unsigned int status_code : 16; /* responses only */
+  unsigned int method : 8;       /* requests only */
+  unsigned int http_errno : 7;
+
+  /* 1 = Upgrade header was present and the parser has exited because of that.
+   * 0 = No upgrade header present.
+   * Should be checked when http_parser_execute() returns in addition to
+   * error checking.
+   */
+  unsigned int upgrade : 1;
+
+  /** PUBLIC **/
+  void *data; /* A pointer to get hook to the "connection" or "socket" object */
+};
+
+
+struct http_parser_settings {
+  http_cb      on_message_begin;
+  http_data_cb on_url;
+  http_data_cb on_status;
+  http_data_cb on_header_field;
+  http_data_cb on_header_value;
+  http_cb      on_headers_complete;
+  http_data_cb on_body;
+  http_cb      on_message_complete;
+  /* When on_chunk_header is called, the current chunk length is stored
+   * in parser->content_length.
+   */
+  http_cb      on_chunk_header;
+  http_cb      on_chunk_complete;
+};
+
+
+enum http_parser_url_fields
+  { UF_SCHEMA           = 0
+  , UF_HOST             = 1
+  , UF_PORT             = 2
+  , UF_PATH             = 3
+  , UF_QUERY            = 4
+  , UF_FRAGMENT         = 5
+  , UF_USERINFO         = 6
+  , UF_MAX              = 7
+  };
+
+
+/* Result structure for http_parser_parse_url().
+ *
+ * Callers should index into field_data[] with UF_* values iff field_set
+ * has the relevant (1 << UF_*) bit set. As a courtesy to clients (and
+ * because we probably have padding left over), we convert any port to
+ * a uint16_t.
+ */
+struct http_parser_url {
+  uint16_t field_set;           /* Bitmask of (1 << UF_*) values */
+  uint16_t port;                /* Converted UF_PORT string */
+
+  struct {
+    uint16_t off;               /* Offset into buffer in which field starts */
+    uint16_t len;               /* Length of run in buffer */
+  } field_data[UF_MAX];
+};
+
+
+/* Returns the library version. Bits 16-23 contain the major version number,
+ * bits 8-15 the minor version number and bits 0-7 the patch level.
+ * Usage example:
+ *
+ *   unsigned long version = http_parser_version();
+ *   unsigned major = (version >> 16) & 255;
+ *   unsigned minor = (version >> 8) & 255;
+ *   unsigned patch = version & 255;
+ *   printf("http_parser v%u.%u.%u\n", major, minor, patch);
+ */
+unsigned long http_parser_version(void);
+
+void http_parser_init(http_parser *parser, enum http_parser_type type);
+
+
+/* Initialize http_parser_settings members to 0
+ */
+void http_parser_settings_init(http_parser_settings *settings);
+
+
+/* Executes the parser. Returns number of parsed bytes. Sets
+ * `parser->http_errno` on error. */
+size_t http_parser_execute(http_parser *parser,
+                           const http_parser_settings *settings,
+                           const char *data,
+                           size_t len);
+
+
+/* If http_should_keep_alive() in the on_headers_complete or
+ * on_message_complete callback returns 0, then this should be
+ * the last message on the connection.
+ * If you are the server, respond with the "Connection: close" header.
+ * If you are the client, close the connection.
+ */
+int http_should_keep_alive(const http_parser *parser);
+
+/* Returns a string version of the HTTP method. */
+const char *http_method_str(enum http_method m);
+
+/* Return a string name of the given error */
+const char *http_errno_name(enum http_errno err);
+
+/* Return a string description of the given error */
+const char *http_errno_description(enum http_errno err);
+
+/* Initialize all http_parser_url members to 0 */
+void http_parser_url_init(struct http_parser_url *u);
+
+/* Parse a URL; return nonzero on failure */
+int http_parser_parse_url(const char *buf, size_t buflen,
+                          int is_connect,
+                          struct http_parser_url *u);
+
+/* Pause or un-pause the parser; a nonzero value pauses */
+void http_parser_pause(http_parser *parser, int paused);
+
+/* Checks if this is the final chunk of the body. */
+int http_body_is_final(const http_parser *parser);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/nghttp/port/include/nghttp2/nghttp2ver.h b/tools/sdk/esp32s3/include/nghttp/port/include/nghttp2/nghttp2ver.h
new file mode 100644
index 00000000000..ccbbfb3f4af
--- /dev/null
+++ b/tools/sdk/esp32s3/include/nghttp/port/include/nghttp2/nghttp2ver.h
@@ -0,0 +1,42 @@
+/*
+ * nghttp2 - HTTP/2 C Library
+ *
+ * Copyright (c) 2012, 2013 Tatsuhiro Tsujikawa
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef NGHTTP2VER_H
+#define NGHTTP2VER_H
+
+/**
+ * @macro
+ * Version number of the nghttp2 library release
+ */
+#define NGHTTP2_VERSION "v1.22.0"
+
+/**
+ * @macro
+ * Numerical representation of the version number of the nghttp2 library
+ * release. This is a 24 bit number with 8 bits for major number, 8 bits
+ * for minor and 8 bits for patch. Version 1.2.3 becomes 0x010203.
+ */
+#define NGHTTP2_VERSION_NUM 0x012200
+
+#endif /* NGHTTP2VER_H */
diff --git a/tools/sdk/esp32s3/include/nvs_flash/include/nvs.h b/tools/sdk/esp32s3/include/nvs_flash/include/nvs.h
new file mode 100644
index 00000000000..6a45327bbae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/nvs_flash/include/nvs.h
@@ -0,0 +1,667 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef ESP_NVS_H
+#define ESP_NVS_H
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+#include "esp_attr.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Opaque pointer type representing non-volatile storage handle
+ */
+typedef uint32_t nvs_handle_t;
+
+/*
+ * Pre-IDF V4.0 uses nvs_handle, so leaving the original typedef here for compatibility.
+ */
+typedef nvs_handle_t nvs_handle IDF_DEPRECATED("Replace with nvs_handle_t");
+
+#define ESP_ERR_NVS_BASE                    0x1100                     /*!< Starting number of error codes */
+#define ESP_ERR_NVS_NOT_INITIALIZED         (ESP_ERR_NVS_BASE + 0x01)  /*!< The storage driver is not initialized */
+#define ESP_ERR_NVS_NOT_FOUND               (ESP_ERR_NVS_BASE + 0x02)  /*!< Id namespace doesn’t exist yet and mode is NVS_READONLY */
+#define ESP_ERR_NVS_TYPE_MISMATCH           (ESP_ERR_NVS_BASE + 0x03)  /*!< The type of set or get operation doesn't match the type of value stored in NVS */
+#define ESP_ERR_NVS_READ_ONLY               (ESP_ERR_NVS_BASE + 0x04)  /*!< Storage handle was opened as read only */
+#define ESP_ERR_NVS_NOT_ENOUGH_SPACE        (ESP_ERR_NVS_BASE + 0x05)  /*!< There is not enough space in the underlying storage to save the value */
+#define ESP_ERR_NVS_INVALID_NAME            (ESP_ERR_NVS_BASE + 0x06)  /*!< Namespace name doesn’t satisfy constraints */
+#define ESP_ERR_NVS_INVALID_HANDLE          (ESP_ERR_NVS_BASE + 0x07)  /*!< Handle has been closed or is NULL */
+#define ESP_ERR_NVS_REMOVE_FAILED           (ESP_ERR_NVS_BASE + 0x08)  /*!< The value wasn’t updated because flash write operation has failed. The value was written however, and update will be finished after re-initialization of nvs, provided that flash operation doesn’t fail again. */
+#define ESP_ERR_NVS_KEY_TOO_LONG            (ESP_ERR_NVS_BASE + 0x09)  /*!< Key name is too long */
+#define ESP_ERR_NVS_PAGE_FULL               (ESP_ERR_NVS_BASE + 0x0a)  /*!< Internal error; never returned by nvs API functions */
+#define ESP_ERR_NVS_INVALID_STATE           (ESP_ERR_NVS_BASE + 0x0b)  /*!< NVS is in an inconsistent state due to a previous error. Call nvs_flash_init and nvs_open again, then retry. */
+#define ESP_ERR_NVS_INVALID_LENGTH          (ESP_ERR_NVS_BASE + 0x0c)  /*!< String or blob length is not sufficient to store data */
+#define ESP_ERR_NVS_NO_FREE_PAGES           (ESP_ERR_NVS_BASE + 0x0d)  /*!< NVS partition doesn't contain any empty pages. This may happen if NVS partition was truncated. Erase the whole partition and call nvs_flash_init again. */
+#define ESP_ERR_NVS_VALUE_TOO_LONG          (ESP_ERR_NVS_BASE + 0x0e)  /*!< String or blob length is longer than supported by the implementation */
+#define ESP_ERR_NVS_PART_NOT_FOUND          (ESP_ERR_NVS_BASE + 0x0f)  /*!< Partition with specified name is not found in the partition table */
+
+#define ESP_ERR_NVS_NEW_VERSION_FOUND       (ESP_ERR_NVS_BASE + 0x10)  /*!< NVS partition contains data in new format and cannot be recognized by this version of code */
+#define ESP_ERR_NVS_XTS_ENCR_FAILED         (ESP_ERR_NVS_BASE + 0x11)  /*!< XTS encryption failed while writing NVS entry */
+#define ESP_ERR_NVS_XTS_DECR_FAILED         (ESP_ERR_NVS_BASE + 0x12)  /*!< XTS decryption failed while reading NVS entry */
+#define ESP_ERR_NVS_XTS_CFG_FAILED          (ESP_ERR_NVS_BASE + 0x13)  /*!< XTS configuration setting failed */
+#define ESP_ERR_NVS_XTS_CFG_NOT_FOUND       (ESP_ERR_NVS_BASE + 0x14)  /*!< XTS configuration not found */
+#define ESP_ERR_NVS_ENCR_NOT_SUPPORTED      (ESP_ERR_NVS_BASE + 0x15)  /*!< NVS encryption is not supported in this version */
+#define ESP_ERR_NVS_KEYS_NOT_INITIALIZED    (ESP_ERR_NVS_BASE + 0x16)  /*!< NVS key partition is uninitialized */
+#define ESP_ERR_NVS_CORRUPT_KEY_PART        (ESP_ERR_NVS_BASE + 0x17)  /*!< NVS key partition is corrupt */
+#define ESP_ERR_NVS_WRONG_ENCRYPTION        (ESP_ERR_NVS_BASE + 0x19)  /*!< NVS partition is marked as encrypted with generic flash encryption. This is forbidden since the NVS encryption works differently. */
+
+#define ESP_ERR_NVS_CONTENT_DIFFERS         (ESP_ERR_NVS_BASE + 0x18)  /*!< Internal error; never returned by nvs API functions.  NVS key is different in comparison */
+
+#define NVS_DEFAULT_PART_NAME               "nvs"   /*!< Default partition name of the NVS partition in the partition table */
+
+#define NVS_PART_NAME_MAX_SIZE              16   /*!< maximum length of partition name (excluding null terminator) */
+#define NVS_KEY_NAME_MAX_SIZE               16   /*!< Maximal length of NVS key name (including null terminator) */
+
+/**
+ * @brief Mode of opening the non-volatile storage
+ */
+typedef enum {
+	NVS_READONLY,  /*!< Read only */
+	NVS_READWRITE  /*!< Read and write */
+} nvs_open_mode_t;
+
+/*
+ * Pre-IDF V4.0 uses nvs_open_mode, so leaving the original typedef here for compatibility.
+ */
+typedef nvs_open_mode_t nvs_open_mode IDF_DEPRECATED("Replace with nvs_open_mode_t");
+
+
+/**
+ * @brief Types of variables
+ *
+ */
+typedef enum {
+    NVS_TYPE_U8    = 0x01,  /*!< Type uint8_t */
+    NVS_TYPE_I8    = 0x11,  /*!< Type int8_t */
+    NVS_TYPE_U16   = 0x02,  /*!< Type uint16_t */
+    NVS_TYPE_I16   = 0x12,  /*!< Type int16_t */
+    NVS_TYPE_U32   = 0x04,  /*!< Type uint32_t */
+    NVS_TYPE_I32   = 0x14,  /*!< Type int32_t */
+    NVS_TYPE_U64   = 0x08,  /*!< Type uint64_t */
+    NVS_TYPE_I64   = 0x18,  /*!< Type int64_t */
+    NVS_TYPE_STR   = 0x21,  /*!< Type string */
+    NVS_TYPE_BLOB  = 0x42,  /*!< Type blob */
+    NVS_TYPE_ANY   = 0xff   /*!< Must be last */
+} nvs_type_t;
+
+/**
+ * @brief information about entry obtained from nvs_entry_info function
+ */
+typedef struct {
+    char namespace_name[16];    /*!< Namespace to which key-value belong */
+    char key[NVS_KEY_NAME_MAX_SIZE];               /*!< Key of stored key-value pair */
+    nvs_type_t type;            /*!< Type of stored key-value pair */
+} nvs_entry_info_t;
+
+/**
+ * Opaque pointer type representing iterator to nvs entries
+ */
+typedef struct nvs_opaque_iterator_t *nvs_iterator_t;
+
+/**
+ * @brief      Open non-volatile storage with a given namespace from the default NVS partition
+ *
+ * Multiple internal ESP-IDF and third party application modules can store
+ * their key-value pairs in the NVS module. In order to reduce possible
+ * conflicts on key names, each module can use its own namespace.
+ * The default NVS partition is the one that is labelled "nvs" in the partition
+ * table.
+ *
+ * @param[in]  name        Namespace name. Maximal length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+ * @param[in]  open_mode   NVS_READWRITE or NVS_READONLY. If NVS_READONLY, will
+ *                         open a handle for reading only. All write requests will
+ *             be rejected for this handle.
+ * @param[out] out_handle  If successful (return code is zero), handle will be
+ *                         returned in this argument.
+ *
+ * @return
+ *             - ESP_OK if storage handle was opened successfully
+ *             - ESP_ERR_NVS_NOT_INITIALIZED if the storage driver is not initialized
+ *             - ESP_ERR_NVS_PART_NOT_FOUND if the partition with label "nvs" is not found
+ *             - ESP_ERR_NVS_NOT_FOUND id namespace doesn't exist yet and
+ *               mode is NVS_READONLY
+ *             - ESP_ERR_NVS_INVALID_NAME if namespace name doesn't satisfy constraints
+ *             - ESP_ERR_NO_MEM in case memory could not be allocated for the internal structures
+ *             - other error codes from the underlying storage driver
+ */
+esp_err_t nvs_open(const char* name, nvs_open_mode_t open_mode, nvs_handle_t *out_handle);
+
+/**
+ * @brief      Open non-volatile storage with a given namespace from specified partition
+ *
+ * The behaviour is same as nvs_open() API. However this API can operate on a specified NVS
+ * partition instead of default NVS partition. Note that the specified partition must be registered
+ * with NVS using nvs_flash_init_partition() API.
+ *
+ * @param[in]  part_name   Label (name) of the partition of interest for object read/write/erase
+ * @param[in]  name        Namespace name. Maximal length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+ * @param[in]  open_mode   NVS_READWRITE or NVS_READONLY. If NVS_READONLY, will
+ *                         open a handle for reading only. All write requests will
+ *             be rejected for this handle.
+ * @param[out] out_handle  If successful (return code is zero), handle will be
+ *                         returned in this argument.
+ *
+ * @return
+ *             - ESP_OK if storage handle was opened successfully
+ *             - ESP_ERR_NVS_NOT_INITIALIZED if the storage driver is not initialized
+ *             - ESP_ERR_NVS_PART_NOT_FOUND if the partition with specified name is not found
+ *             - ESP_ERR_NVS_NOT_FOUND id namespace doesn't exist yet and
+ *               mode is NVS_READONLY
+ *             - ESP_ERR_NVS_INVALID_NAME if namespace name doesn't satisfy constraints
+ *             - ESP_ERR_NO_MEM in case memory could not be allocated for the internal structures
+ *             - other error codes from the underlying storage driver
+ */
+esp_err_t nvs_open_from_partition(const char *part_name, const char* name, nvs_open_mode_t open_mode, nvs_handle_t *out_handle);
+
+/**@{*/
+/**
+ * @brief      set int8_t value for given key
+ *
+ * Set value for the key, given its name. Note that the actual storage will not be updated
+ * until \c nvs_commit is called.
+ *
+ * @param[in]  handle  Handle obtained from nvs_open function.
+ *                     Handles that were opened read only cannot be used.
+ * @param[in]  key     Key name. Maximal length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+ * @param[in]  value   The value to set.
+ *
+ * @return
+ *             - ESP_OK if value was set successfully
+ *             - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL
+ *             - ESP_ERR_NVS_READ_ONLY if storage handle was opened as read only
+ *             - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints
+ *             - ESP_ERR_NVS_NOT_ENOUGH_SPACE if there is not enough space in the
+ *               underlying storage to save the value
+ *             - ESP_ERR_NVS_REMOVE_FAILED if the value wasn't updated because flash
+ *               write operation has failed. The value was written however, and
+ *               update will be finished after re-initialization of nvs, provided that
+ *               flash operation doesn't fail again.
+ */
+esp_err_t nvs_set_i8 (nvs_handle_t handle, const char* key, int8_t value);
+
+/**
+ * @brief      set uint8_t value for given key
+ *
+ * This function is the same as \c nvs_set_i8 except for the data type.
+ */
+esp_err_t nvs_set_u8 (nvs_handle_t handle, const char* key, uint8_t value);
+
+/**
+ * @brief      set int16_t value for given key
+ *
+ * This function is the same as \c nvs_set_i8 except for the data type.
+ */
+esp_err_t nvs_set_i16 (nvs_handle_t handle, const char* key, int16_t value);
+
+/**
+ * @brief      set uint16_t value for given key
+ *
+ * This function is the same as \c nvs_set_i8 except for the data type.
+ */
+esp_err_t nvs_set_u16 (nvs_handle_t handle, const char* key, uint16_t value);
+
+/**
+ * @brief      set int32_t value for given key
+ *
+ * This function is the same as \c nvs_set_i8 except for the data type.
+ */
+esp_err_t nvs_set_i32 (nvs_handle_t handle, const char* key, int32_t value);
+
+/**
+ * @brief      set uint32_t value for given key
+ *
+ * This function is the same as \c nvs_set_i8 except for the data type.
+ */
+esp_err_t nvs_set_u32 (nvs_handle_t handle, const char* key, uint32_t value);
+
+/**
+ * @brief      set int64_t value for given key
+ *
+ * This function is the same as \c nvs_set_i8 except for the data type.
+ */
+esp_err_t nvs_set_i64 (nvs_handle_t handle, const char* key, int64_t value);
+
+/**
+ * @brief      set uint64_t value for given key
+ *
+ * This function is the same as \c nvs_set_i8 except for the data type.
+ */
+esp_err_t nvs_set_u64 (nvs_handle_t handle, const char* key, uint64_t value);
+
+/**
+ * @brief      set string for given key
+ *
+ * Set value for the key, given its name. Note that the actual storage will not be updated
+ * until \c nvs_commit is called.
+ *
+ * @param[in]  handle  Handle obtained from nvs_open function.
+ *                     Handles that were opened read only cannot be used.
+ * @param[in]  key     Key name. Maximal length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+ * @param[in]  value   The value to set.
+ *                     For strings, the maximum length (including null character) is
+ *                     4000 bytes, if there is one complete page free for writing.
+ *                     This decreases, however, if the free space is fragmented.
+ *
+ * @return
+ *             - ESP_OK if value was set successfully
+ *             - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL
+ *             - ESP_ERR_NVS_READ_ONLY if storage handle was opened as read only
+ *             - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints
+ *             - ESP_ERR_NVS_NOT_ENOUGH_SPACE if there is not enough space in the
+ *               underlying storage to save the value
+ *             - ESP_ERR_NVS_REMOVE_FAILED if the value wasn't updated because flash
+ *               write operation has failed. The value was written however, and
+ *               update will be finished after re-initialization of nvs, provided that
+ *               flash operation doesn't fail again.
+ *             - ESP_ERR_NVS_VALUE_TOO_LONG if the string value is too long
+ */
+esp_err_t nvs_set_str (nvs_handle_t handle, const char* key, const char* value);
+/**@}*/
+
+/**
+ * @brief       set variable length binary value for given key
+ *
+ * This family of functions set value for the key, given its name. Note that
+ * actual storage will not be updated until nvs_commit function is called.
+ *
+ * @param[in]  handle  Handle obtained from nvs_open function.
+ *                     Handles that were opened read only cannot be used.
+ * @param[in]  key     Key name. Maximal length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+ * @param[in]  value   The value to set.
+ * @param[in]  length  length of binary value to set, in bytes; Maximum length is
+ *                     508000 bytes or (97.6% of the partition size - 4000) bytes
+ *                     whichever is lower.
+ *
+ * @return
+ *             - ESP_OK if value was set successfully
+ *             - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL
+ *             - ESP_ERR_NVS_READ_ONLY if storage handle was opened as read only
+ *             - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints
+ *             - ESP_ERR_NVS_NOT_ENOUGH_SPACE if there is not enough space in the
+ *               underlying storage to save the value
+ *             - ESP_ERR_NVS_REMOVE_FAILED if the value wasn't updated because flash
+ *               write operation has failed. The value was written however, and
+ *               update will be finished after re-initialization of nvs, provided that
+ *               flash operation doesn't fail again.
+ *             - ESP_ERR_NVS_VALUE_TOO_LONG if the value is too long
+ */
+esp_err_t nvs_set_blob(nvs_handle_t handle, const char* key, const void* value, size_t length);
+
+/**@{*/
+/**
+ * @brief      get int8_t value for given key
+ *
+ * These functions retrieve value for the key, given its name. If \c key does not
+ * exist, or the requested variable type doesn't match the type which was used
+ * when setting a value, an error is returned.
+ *
+ * In case of any error, out_value is not modified.
+ *
+ * \c out_value has to be a pointer to an already allocated variable of the given type.
+ *
+ * \code{c}
+ * // Example of using nvs_get_i32:
+ * int32_t max_buffer_size = 4096; // default value
+ * esp_err_t err = nvs_get_i32(my_handle, "max_buffer_size", &max_buffer_size);
+ * assert(err == ESP_OK || err == ESP_ERR_NVS_NOT_FOUND);
+ * // if ESP_ERR_NVS_NOT_FOUND was returned, max_buffer_size will still
+ * // have its default value.
+ *
+ * \endcode
+ *
+ * @param[in]     handle     Handle obtained from nvs_open function.
+ * @param[in]     key        Key name. Maximal length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+ * @param         out_value  Pointer to the output value.
+ *                           May be NULL for nvs_get_str and nvs_get_blob, in this
+ *                           case required length will be returned in length argument.
+ *
+ * @return
+ *             - ESP_OK if the value was retrieved successfully
+ *             - ESP_ERR_NVS_NOT_FOUND if the requested key doesn't exist
+ *             - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL
+ *             - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints
+ *             - ESP_ERR_NVS_INVALID_LENGTH if length is not sufficient to store data
+ */
+esp_err_t nvs_get_i8 (nvs_handle_t handle, const char* key, int8_t* out_value);
+
+/**
+ * @brief      get uint8_t value for given key
+ *
+ * This function is the same as \c nvs_get_i8 except for the data type.
+ */
+esp_err_t nvs_get_u8 (nvs_handle_t handle, const char* key, uint8_t* out_value);
+
+/**
+ * @brief      get int16_t value for given key
+ *
+ * This function is the same as \c nvs_get_i8 except for the data type.
+ */
+esp_err_t nvs_get_i16 (nvs_handle_t handle, const char* key, int16_t* out_value);
+
+/**
+ * @brief      get uint16_t value for given key
+ *
+ * This function is the same as \c nvs_get_i8 except for the data type.
+ */
+esp_err_t nvs_get_u16 (nvs_handle_t handle, const char* key, uint16_t* out_value);
+
+/**
+ * @brief      get int32_t value for given key
+ *
+ * This function is the same as \c nvs_get_i8 except for the data type.
+ */
+esp_err_t nvs_get_i32 (nvs_handle_t handle, const char* key, int32_t* out_value);
+
+/**
+ * @brief      get uint32_t value for given key
+ *
+ * This function is the same as \c nvs_get_i8 except for the data type.
+ */
+esp_err_t nvs_get_u32 (nvs_handle_t handle, const char* key, uint32_t* out_value);
+
+/**
+ * @brief      get int64_t value for given key
+ *
+ * This function is the same as \c nvs_get_i8 except for the data type.
+ */
+esp_err_t nvs_get_i64 (nvs_handle_t handle, const char* key, int64_t* out_value);
+
+/**
+ * @brief      get uint64_t value for given key
+ *
+ * This function is the same as \c nvs_get_i8 except for the data type.
+ */
+esp_err_t nvs_get_u64 (nvs_handle_t handle, const char* key, uint64_t* out_value);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      get string value for given key
+ *
+ * These functions retrieve the data of an entry, given its key. If key does not
+ * exist, or the requested variable type doesn't match the type which was used
+ * when setting a value, an error is returned.
+ *
+ * In case of any error, out_value is not modified.
+ *
+ * All functions expect out_value to be a pointer to an already allocated variable
+ * of the given type.
+ *
+ * nvs_get_str and nvs_get_blob functions support WinAPI-style length queries.
+ * To get the size necessary to store the value, call nvs_get_str or nvs_get_blob
+ * with zero out_value and non-zero pointer to length. Variable pointed to
+ * by length argument will be set to the required length. For nvs_get_str,
+ * this length includes the zero terminator. When calling nvs_get_str and
+ * nvs_get_blob with non-zero out_value, length has to be non-zero and has to
+ * point to the length available in out_value.
+ * It is suggested that nvs_get/set_str is used for zero-terminated C strings, and
+ * nvs_get/set_blob used for arbitrary data structures.
+ *
+ * \code{c}
+ * // Example (without error checking) of using nvs_get_str to get a string into dynamic array:
+ * size_t required_size;
+ * nvs_get_str(my_handle, "server_name", NULL, &required_size);
+ * char* server_name = malloc(required_size);
+ * nvs_get_str(my_handle, "server_name", server_name, &required_size);
+ *
+ * // Example (without error checking) of using nvs_get_blob to get a binary data
+ * into a static array:
+ * uint8_t mac_addr[6];
+ * size_t size = sizeof(mac_addr);
+ * nvs_get_blob(my_handle, "dst_mac_addr", mac_addr, &size);
+ * \endcode
+ *
+ * @param[in]     handle     Handle obtained from nvs_open function.
+ * @param[in]     key        Key name. Maximal length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+ * @param[out]    out_value  Pointer to the output value.
+ *                           May be NULL for nvs_get_str and nvs_get_blob, in this
+ *                           case required length will be returned in length argument.
+ * @param[inout]  length     A non-zero pointer to the variable holding the length of out_value.
+ *                           In case out_value a zero, will be set to the length
+ *                           required to hold the value. In case out_value is not
+ *                           zero, will be set to the actual length of the value
+ *                           written. For nvs_get_str this includes zero terminator.
+ *
+ * @return
+ *             - ESP_OK if the value was retrieved successfully
+ *             - ESP_ERR_NVS_NOT_FOUND if the requested key doesn't exist
+ *             - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL
+ *             - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints
+ *             - ESP_ERR_NVS_INVALID_LENGTH if \c length is not sufficient to store data
+ */
+esp_err_t nvs_get_str (nvs_handle_t handle, const char* key, char* out_value, size_t* length);
+
+/**
+ * @brief      get blob value for given key
+ *
+ * This function behaves the same as \c nvs_get_str, except for the data type.
+ */
+esp_err_t nvs_get_blob(nvs_handle_t handle, const char* key, void* out_value, size_t* length);
+/**@}*/
+
+/**
+ * @brief      Erase key-value pair with given key name.
+ *
+ * Note that actual storage may not be updated until nvs_commit function is called.
+ *
+ * @param[in]  handle  Storage handle obtained with nvs_open.
+ *                     Handles that were opened read only cannot be used.
+ *
+ * @param[in]  key     Key name. Maximal length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+ *
+ * @return
+ *              - ESP_OK if erase operation was successful
+ *              - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL
+ *              - ESP_ERR_NVS_READ_ONLY if handle was opened as read only
+ *              - ESP_ERR_NVS_NOT_FOUND if the requested key doesn't exist
+ *              - other error codes from the underlying storage driver
+ */
+esp_err_t nvs_erase_key(nvs_handle_t handle, const char* key);
+
+/**
+ * @brief      Erase all key-value pairs in a namespace
+ *
+ * Note that actual storage may not be updated until nvs_commit function is called.
+ *
+ * @param[in]  handle  Storage handle obtained with nvs_open.
+ *                     Handles that were opened read only cannot be used.
+ *
+ * @return
+ *              - ESP_OK if erase operation was successful
+ *              - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL
+ *              - ESP_ERR_NVS_READ_ONLY if handle was opened as read only
+ *              - other error codes from the underlying storage driver
+ */
+esp_err_t nvs_erase_all(nvs_handle_t handle);
+
+/**
+ * @brief      Write any pending changes to non-volatile storage
+ *
+ * After setting any values, nvs_commit() must be called to ensure changes are written
+ * to non-volatile storage. Individual implementations may write to storage at other times,
+ * but this is not guaranteed.
+ *
+ * @param[in]  handle  Storage handle obtained with nvs_open.
+ *                     Handles that were opened read only cannot be used.
+ *
+ * @return
+ *             - ESP_OK if the changes have been written successfully
+ *             - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL
+ *             - other error codes from the underlying storage driver
+ */
+esp_err_t nvs_commit(nvs_handle_t handle);
+
+/**
+ * @brief      Close the storage handle and free any allocated resources
+ *
+ * This function should be called for each handle opened with nvs_open once
+ * the handle is not in use any more. Closing the handle may not automatically
+ * write the changes to nonvolatile storage. This has to be done explicitly using
+ * nvs_commit function.
+ * Once this function is called on a handle, the handle should no longer be used.
+ *
+ * @param[in]  handle  Storage handle to close
+ */
+void nvs_close(nvs_handle_t handle);
+
+/**
+ * @note Info about storage space NVS.
+ */
+typedef struct {
+    size_t used_entries;      /**< Amount of used entries. */
+    size_t free_entries;      /**< Amount of free entries. */
+    size_t total_entries;     /**< Amount all available entries. */
+    size_t namespace_count;   /**< Amount name space. */
+} nvs_stats_t;
+
+/**
+ * @brief      Fill structure nvs_stats_t. It provides info about used memory the partition.
+ *
+ * This function calculates to runtime the number of used entries, free entries, total entries,
+ * and amount namespace in partition.
+ *
+ * \code{c}
+ * // Example of nvs_get_stats() to get the number of used entries and free entries:
+ * nvs_stats_t nvs_stats;
+ * nvs_get_stats(NULL, &nvs_stats);
+ * printf("Count: UsedEntries = (%d), FreeEntries = (%d), AllEntries = (%d)\n",
+          nvs_stats.used_entries, nvs_stats.free_entries, nvs_stats.total_entries);
+ * \endcode
+ *
+ * @param[in]   part_name   Partition name NVS in the partition table.
+ *                          If pass a NULL than will use NVS_DEFAULT_PART_NAME ("nvs").
+ *
+ * @param[out]  nvs_stats   Returns filled structure nvs_states_t.
+ *                          It provides info about used memory the partition.
+ *
+ *
+ * @return
+ *             - ESP_OK if the changes have been written successfully.
+ *               Return param nvs_stats will be filled.
+ *             - ESP_ERR_NVS_PART_NOT_FOUND if the partition with label "name" is not found.
+ *               Return param nvs_stats will be filled 0.
+ *             - ESP_ERR_NVS_NOT_INITIALIZED if the storage driver is not initialized.
+ *               Return param nvs_stats will be filled 0.
+ *             - ESP_ERR_INVALID_ARG if nvs_stats equal to NULL.
+ *             - ESP_ERR_INVALID_STATE if there is page with the status of INVALID.
+ *               Return param nvs_stats will be filled not with correct values because
+ *               not all pages will be counted. Counting will be interrupted at the first INVALID page.
+ */
+esp_err_t nvs_get_stats(const char *part_name, nvs_stats_t *nvs_stats);
+
+/**
+ * @brief      Calculate all entries in a namespace.
+ *
+ * An entry represents the smallest storage unit in NVS.
+ * Strings and blobs may occupy more than one entry.
+ * Note that to find out the total number of entries occupied by the namespace,
+ * add one to the returned value used_entries (if err is equal to ESP_OK).
+ * Because the name space entry takes one entry.
+ *
+ * \code{c}
+ * // Example of nvs_get_used_entry_count() to get amount of all key-value pairs in one namespace:
+ * nvs_handle_t handle;
+ * nvs_open("namespace1", NVS_READWRITE, &handle);
+ * ...
+ * size_t used_entries;
+ * size_t total_entries_namespace;
+ * if(nvs_get_used_entry_count(handle, &used_entries) == ESP_OK){
+ *     // the total number of entries occupied by the namespace
+ *     total_entries_namespace = used_entries + 1;
+ * }
+ * \endcode
+ *
+ * @param[in]   handle              Handle obtained from nvs_open function.
+ *
+ * @param[out]  used_entries        Returns amount of used entries from a namespace.
+ *
+ *
+ * @return
+ *             - ESP_OK if the changes have been written successfully.
+ *               Return param used_entries will be filled valid value.
+ *             - ESP_ERR_NVS_NOT_INITIALIZED if the storage driver is not initialized.
+ *               Return param used_entries will be filled 0.
+ *             - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL.
+ *               Return param used_entries will be filled 0.
+ *             - ESP_ERR_INVALID_ARG if used_entries equal to NULL.
+ *             - Other error codes from the underlying storage driver.
+ *               Return param used_entries will be filled 0.
+ */
+esp_err_t nvs_get_used_entry_count(nvs_handle_t handle, size_t* used_entries);
+
+/**
+ * @brief       Create an iterator to enumerate NVS entries based on one or more parameters
+ *
+ * \code{c}
+ * // Example of listing all the key-value pairs of any type under specified partition and namespace
+ * nvs_iterator_t it = nvs_entry_find(partition, namespace, NVS_TYPE_ANY);
+ * while (it != NULL) {
+ *         nvs_entry_info_t info;
+ *         nvs_entry_info(it, &info);
+ *         it = nvs_entry_next(it);
+ *         printf("key '%s', type '%d' \n", info.key, info.type);
+ * };
+ * // Note: no need to release iterator obtained from nvs_entry_find function when
+ * //       nvs_entry_find or nvs_entry_next function return NULL, indicating no other
+ * //       element for specified criteria was found.
+ * }
+ * \endcode
+ *
+ * @param[in]   part_name       Partition name
+ *
+ * @param[in]   namespace_name  Set this value if looking for entries with
+ *                              a specific namespace. Pass NULL otherwise.
+ *
+ * @param[in]   type            One of nvs_type_t values.
+ *
+ * @return
+ *          Iterator used to enumerate all the entries found,
+ *          or NULL if no entry satisfying criteria was found.
+ *          Iterator obtained through this function has to be released
+ *          using nvs_release_iterator when not used any more.
+ */
+nvs_iterator_t nvs_entry_find(const char *part_name, const char *namespace_name, nvs_type_t type);
+
+/**
+ * @brief       Returns next item matching the iterator criteria, NULL if no such item exists.
+ *
+ * Note that any copies of the iterator will be invalid after this call.
+ *
+ * @param[in]   iterator     Iterator obtained from nvs_entry_find function. Must be non-NULL.
+ *
+ * @return
+ *          NULL if no entry was found, valid nvs_iterator_t otherwise.
+ */
+nvs_iterator_t nvs_entry_next(nvs_iterator_t iterator);
+
+/**
+ * @brief       Fills nvs_entry_info_t structure with information about entry pointed to by the iterator.
+ *
+ * @param[in]   iterator     Iterator obtained from nvs_entry_find or nvs_entry_next function. Must be non-NULL.
+ *
+ * @param[out]  out_info     Structure to which entry information is copied.
+ */
+void nvs_entry_info(nvs_iterator_t iterator, nvs_entry_info_t *out_info);
+
+/**
+ * @brief       Release iterator
+ *
+ * @param[in]   iterator    Release iterator obtained from nvs_entry_find function. NULL argument is allowed.
+ *
+ */
+void nvs_release_iterator(nvs_iterator_t iterator);
+
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif //ESP_NVS_H
diff --git a/tools/sdk/esp32s3/include/nvs_flash/include/nvs_flash.h b/tools/sdk/esp32s3/include/nvs_flash/include/nvs_flash.h
new file mode 100644
index 00000000000..7e3d6a79858
--- /dev/null
+++ b/tools/sdk/esp32s3/include/nvs_flash/include/nvs_flash.h
@@ -0,0 +1,257 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef nvs_flash_h
+#define nvs_flash_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "nvs.h"
+#include "esp_partition.h"
+
+
+#define NVS_KEY_SIZE 32 // AES-256
+
+/**
+ * @brief Key for encryption and decryption
+ */
+typedef struct {
+    uint8_t eky[NVS_KEY_SIZE]; /*!<  XTS encryption and decryption key*/
+    uint8_t tky[NVS_KEY_SIZE]; /*!<  XTS tweak key */
+} nvs_sec_cfg_t;
+
+/**
+ * @brief Initialize the default NVS partition.
+ *
+ * This API initialises the default NVS partition. The default NVS partition
+ * is the one that is labeled "nvs" in the partition table.
+ *
+ * When "NVS_ENCRYPTION" is enabled in the menuconfig, this API enables
+ * the NVS encryption for the default NVS partition as follows
+ *      1. Read security configurations from the first NVS key
+ *         partition listed in the partition table. (NVS key partition is
+ *         any "data" type partition which has the subtype value set to "nvs_keys")
+ *      2. If the NVS key partiton obtained in the previous step is empty,
+ *         generate and store new keys in that NVS key partiton.
+ *      3. Internally call "nvs_flash_secure_init()" with
+ *         the security configurations obtained/generated in the previous steps.
+ *
+ * Post initialization NVS read/write APIs
+ * remain the same irrespective of NVS encryption.
+ *
+ * @return
+ *      - ESP_OK if storage was successfully initialized.
+ *      - ESP_ERR_NVS_NO_FREE_PAGES if the NVS storage contains no empty pages
+ *        (which may happen if NVS partition was truncated)
+ *      - ESP_ERR_NOT_FOUND if no partition with label "nvs" is found in the partition table
+ *      - ESP_ERR_NO_MEM in case memory could not be allocated for the internal structures
+ *      - one of the error codes from the underlying flash storage driver
+ *      - error codes from nvs_flash_read_security_cfg API (when "NVS_ENCRYPTION" is enabled).
+ *      - error codes from nvs_flash_generate_keys API (when "NVS_ENCRYPTION" is enabled).
+ *      - error codes from nvs_flash_secure_init_partition API (when "NVS_ENCRYPTION" is enabled) .
+ */
+esp_err_t nvs_flash_init(void);
+
+/**
+ * @brief Initialize NVS flash storage for the specified partition.
+ *
+ * @param[in]  partition_label   Label of the partition. Must be no longer than 16 characters.
+ *
+ * @return
+ *      - ESP_OK if storage was successfully initialized.
+ *      - ESP_ERR_NVS_NO_FREE_PAGES if the NVS storage contains no empty pages
+ *        (which may happen if NVS partition was truncated)
+ *      - ESP_ERR_NOT_FOUND if specified partition is not found in the partition table
+ *      - ESP_ERR_NO_MEM in case memory could not be allocated for the internal structures
+ *      - one of the error codes from the underlying flash storage driver
+ */
+esp_err_t nvs_flash_init_partition(const char *partition_label);
+
+/**
+ * @brief Initialize NVS flash storage for the partition specified by partition pointer.
+ *
+ * @param[in] partition pointer to a partition obtained by the ESP partition API.
+ *
+ * @return
+ *      - ESP_OK if storage was successfully initialized
+ *      - ESP_ERR_NVS_NO_FREE_PAGES if the NVS storage contains no empty pages
+ *        (which may happen if NVS partition was truncated)
+ *      - ESP_ERR_INVALID_ARG in case partition is NULL
+ *      - ESP_ERR_NO_MEM in case memory could not be allocated for the internal structures
+ *      - one of the error codes from the underlying flash storage driver
+ */
+esp_err_t nvs_flash_init_partition_ptr(const esp_partition_t *partition);
+
+/**
+ * @brief Deinitialize NVS storage for the default NVS partition
+ *
+ * Default NVS partition is the partition with "nvs" label in the partition table.
+ *
+ * @return
+ *      - ESP_OK on success (storage was deinitialized)
+ *      - ESP_ERR_NVS_NOT_INITIALIZED if the storage was not initialized prior to this call
+ */
+esp_err_t nvs_flash_deinit(void);
+
+/**
+ * @brief Deinitialize NVS storage for the given NVS partition
+ *
+ * @param[in]  partition_label   Label of the partition
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NVS_NOT_INITIALIZED if the storage for given partition was not
+ *        initialized prior to this call
+ */
+esp_err_t nvs_flash_deinit_partition(const char* partition_label);
+
+/**
+ * @brief Erase the default NVS partition
+ *
+ * Erases all contents of the default NVS partition (one with label "nvs").
+ *
+ * @note If the partition is initialized, this function first de-initializes it. Afterwards, the partition has to
+ *       be initialized again to be used.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_FOUND if there is no NVS partition labeled "nvs" in the
+ *        partition table
+ *      - different error in case de-initialization fails (shouldn't happen)
+ */
+esp_err_t nvs_flash_erase(void);
+
+/**
+ * @brief Erase specified NVS partition
+ *
+ * Erase all content of a specified NVS partition
+ *
+ * @note If the partition is initialized, this function first de-initializes it. Afterwards, the partition has to
+ *       be initialized again to be used.
+ *
+ * @param[in]  part_name    Name (label) of the partition which should be erased
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_FOUND if there is no NVS partition with the specified name
+ *        in the partition table
+ *      - different error in case de-initialization fails (shouldn't happen)
+ */
+esp_err_t nvs_flash_erase_partition(const char *part_name);
+
+/**
+ * @brief Erase custom partition.
+ *
+ * Erase all content of specified custom partition.
+ *
+ * @note
+ *  If the partition is initialized, this function first de-initializes it.
+ *  Afterwards, the partition has to be initialized again to be used.
+ *
+ * @param[in] partition pointer to a partition obtained by the ESP partition API.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_FOUND if there is no partition with the specified
+ *        parameters in the partition table
+ *      - ESP_ERR_INVALID_ARG in case partition is NULL
+ *      - one of the error codes from the underlying flash storage driver
+ */
+esp_err_t nvs_flash_erase_partition_ptr(const esp_partition_t *partition);
+
+/**
+ * @brief Initialize the default NVS partition.
+ *
+ * This API initialises the default NVS partition. The default NVS partition
+ * is the one that is labeled "nvs" in the partition table.
+ *
+ * @param[in]  cfg Security configuration (keys) to be used for NVS encryption/decryption.
+ *                              If cfg is NULL, no encryption is used.
+ *
+ * @return
+ *      - ESP_OK if storage has been initialized successfully.
+ *      - ESP_ERR_NVS_NO_FREE_PAGES if the NVS storage contains no empty pages
+ *        (which may happen if NVS partition was truncated)
+ *      - ESP_ERR_NOT_FOUND if no partition with label "nvs" is found in the partition table
+ *      - ESP_ERR_NO_MEM in case memory could not be allocated for the internal structures
+ *      - one of the error codes from the underlying flash storage driver
+ */
+esp_err_t nvs_flash_secure_init(nvs_sec_cfg_t* cfg);
+
+/**
+ * @brief Initialize NVS flash storage for the specified partition.
+ *
+ * @param[in]  partition_label   Label of the partition. Note that internally, a reference to
+ *                               passed value is kept and it should be accessible for future operations
+ *
+ * @param[in]  cfg Security configuration (keys) to be used for NVS encryption/decryption.
+ *                              If cfg is null, no encryption/decryption is used.
+ * @return
+ *      - ESP_OK if storage has been initialized successfully.
+ *      - ESP_ERR_NVS_NO_FREE_PAGES if the NVS storage contains no empty pages
+ *        (which may happen if NVS partition was truncated)
+ *      - ESP_ERR_NOT_FOUND if specified partition is not found in the partition table
+ *      - ESP_ERR_NO_MEM in case memory could not be allocated for the internal structures
+ *      - one of the error codes from the underlying flash storage driver
+ */
+esp_err_t nvs_flash_secure_init_partition(const char *partition_label, nvs_sec_cfg_t* cfg);
+
+/**
+ * @brief Generate and store NVS keys in the provided esp partition
+ *
+ * @param[in]  partition Pointer to partition structure obtained using
+ *                       esp_partition_find_first or esp_partition_get.
+ *                       Must be non-NULL.
+ * @param[out] cfg       Pointer to nvs security configuration structure.
+ *                       Pointer must be non-NULL.
+ *                       Generated keys will be populated in this structure.
+ *
+ *
+ * @return
+ *      -ESP_OK, if cfg was read successfully;
+ *      -ESP_INVALID_ARG, if partition or cfg;
+ *      -or error codes from esp_partition_write/erase APIs.
+ */
+
+esp_err_t nvs_flash_generate_keys(const esp_partition_t* partition, nvs_sec_cfg_t* cfg);
+
+
+/**
+ * @brief Read NVS security configuration from a partition.
+ *
+ * @param[in]  partition Pointer to partition structure obtained using
+ *                       esp_partition_find_first or esp_partition_get.
+ *                       Must be non-NULL.
+ * @param[out] cfg       Pointer to nvs security configuration structure.
+ *                       Pointer must be non-NULL.
+ *
+ * @note  Provided partition is assumed to be marked 'encrypted'.
+ *
+ * @return
+ *      -ESP_OK, if cfg was read successfully;
+ *      -ESP_INVALID_ARG, if partition or cfg;
+ *      -ESP_ERR_NVS_KEYS_NOT_INITIALIZED, if the partition is not yet written with keys.
+ *      -ESP_ERR_NVS_CORRUPT_KEY_PART, if the partition containing keys is found to be corrupt
+ *      -or error codes from esp_partition_read API.
+ */
+
+esp_err_t nvs_flash_read_security_cfg(const esp_partition_t* partition, nvs_sec_cfg_t* cfg);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* nvs_flash_h */
diff --git a/tools/sdk/esp32s3/include/nvs_flash/include/nvs_handle.hpp b/tools/sdk/esp32s3/include/nvs_flash/include/nvs_handle.hpp
new file mode 100644
index 00000000000..287866fad65
--- /dev/null
+++ b/tools/sdk/esp32s3/include/nvs_flash/include/nvs_handle.hpp
@@ -0,0 +1,280 @@
+#ifndef NVS_HANDLE_HPP_
+#define NVS_HANDLE_HPP_
+
+#include <string>
+#include <memory>
+#include <type_traits>
+
+#include "nvs.h"
+
+namespace nvs {
+
+/**
+ * The possible blob types. This is a helper definition for template functions.
+ */
+enum class ItemType : uint8_t {
+    U8   = NVS_TYPE_U8,
+    I8   = NVS_TYPE_I8,
+    U16  = NVS_TYPE_U16,
+    I16  = NVS_TYPE_I16,
+    U32  = NVS_TYPE_U32,
+    I32  = NVS_TYPE_I32,
+    U64  = NVS_TYPE_U64,
+    I64  = NVS_TYPE_I64,
+    SZ   = NVS_TYPE_STR,
+    BLOB = 0x41,
+    BLOB_DATA = NVS_TYPE_BLOB,
+    BLOB_IDX  = 0x48,
+    ANY  = NVS_TYPE_ANY
+};
+
+
+/**
+ * @brief A handle allowing nvs-entry related operations on the NVS.
+ *
+ * @note The scope of this handle may vary depending on the implementation, but normally would be the namespace of
+ * a particular partition. Outside that scope, nvs entries can't be accessed/altered.
+ */
+class NVSHandle {
+public:
+    virtual ~NVSHandle() { }
+
+    /**
+     * @brief      set value for given key
+     *
+     * Sets value for key. Note that physical storage will not be updated until nvs_commit function is called.
+     *
+     * @param[in]  key     Key name. Maximal length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+     * @param[in]  value   The value to set. Allowed types are the ones declared in ItemType as well as enums.
+     *                     For strings, the maximum length (including null character) is
+     *                     4000 bytes, if there is one complete page free for writing.
+     *                     This decreases, however, if the free space is fragmented.
+     *                     Note that enums loose their type information when stored in NVS. Ensure that the correct
+     *                     enum type is used during retrieval with \ref get_item!
+     *
+     * @return
+     *             - ESP_OK if value was set successfully
+     *             - ESP_ERR_NVS_READ_ONLY if storage handle was opened as read only
+     *             - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints
+     *             - ESP_ERR_NVS_NOT_ENOUGH_SPACE if there is not enough space in the
+     *               underlying storage to save the value
+     *             - ESP_ERR_NVS_REMOVE_FAILED if the value wasn't updated because flash
+     *               write operation has failed. The value was written however, and
+     *               update will be finished after re-initialization of nvs, provided that
+     *               flash operation doesn't fail again.
+     *             - ESP_ERR_NVS_VALUE_TOO_LONG if the string value is too long
+     */
+    template<typename T>
+    esp_err_t set_item(const char *key, T value);
+    virtual
+    esp_err_t set_string(const char *key, const char* value) = 0;
+
+    /**
+     * @brief      get value for given key
+     *
+     * These functions retrieve value for the key, given its name. If key does not
+     * exist, or the requested variable type doesn't match the type which was used
+     * when setting a value, an error is returned.
+     *
+     * In case of any error, out_value is not modified.
+     *
+     * @param[in]     key        Key name. Maximal length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+     * @param         value      The output value. All integral types which are declared in ItemType as well as enums
+     *                           are allowed. Note however that enums lost their type information when stored in NVS.
+     *                           Ensure that the correct enum type is used during retrieval with \ref get_item!
+     *
+     * @return
+     *             - ESP_OK if the value was retrieved successfully
+     *             - ESP_ERR_NVS_NOT_FOUND if the requested key doesn't exist
+     *             - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints
+     *             - ESP_ERR_NVS_INVALID_LENGTH if length is not sufficient to store data
+     */
+    template<typename T>
+    esp_err_t get_item(const char *key, T &value);
+
+    /**
+     * @brief       set variable length binary value for given key
+     *
+     * This family of functions set value for the key, given its name. Note that
+     * actual storage will not be updated until nvs_commit function is called.
+     *
+     * @param[in]  key     Key name. Maximal length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+     * @param[in]  blob    The blob value to set.
+     * @param[in]  len     length of binary value to set, in bytes; Maximum length is
+     *                     508000 bytes or (97.6% of the partition size - 4000) bytes
+     *                     whichever is lower.
+     *
+     * @return
+     *             - ESP_OK if value was set successfully
+     *             - ESP_ERR_NVS_READ_ONLY if storage handle was opened as read only
+     *             - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints
+     *             - ESP_ERR_NVS_NOT_ENOUGH_SPACE if there is not enough space in the
+     *               underlying storage to save the value
+     *             - ESP_ERR_NVS_REMOVE_FAILED if the value wasn't updated because flash
+     *               write operation has failed. The value was written however, and
+     *               update will be finished after re-initialization of nvs, provided that
+     *               flash operation doesn't fail again.
+     *             - ESP_ERR_NVS_VALUE_TOO_LONG if the value is too long
+     *
+     * @note compare to \ref nvs_set_blob in nvs.h
+     */
+    virtual esp_err_t set_blob(const char *key, const void* blob, size_t len) = 0;
+
+    /**
+     * @brief      get value for given key
+     *
+     * These functions retrieve the data of an entry, given its key. If key does not
+     * exist, or the requested variable type doesn't match the type which was used
+     * when setting a value, an error is returned.
+     *
+     * In case of any error, out_value is not modified.
+     *
+     * Both functions expect out_value to be a pointer to an already allocated variable
+     * of the given type.
+     *
+     * It is suggested that nvs_get/set_str is used for zero-terminated short C strings, and
+     * nvs_get/set_blob is used for arbitrary data structures and long C strings.
+     *
+     * @param[in]     key        Key name. Maximum length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+     * @param         out_str/   Pointer to the output value.
+     *                out_blob
+     * @param[inout]  len        The length of the output buffer pointed to by out_str/out_blob.
+     *                           Use \c get_item_size to query the size of the item beforehand.
+     *
+     * @return
+     *             - ESP_OK if the value was retrieved successfully
+     *             - ESP_ERR_NVS_NOT_FOUND if the requested key doesn't exist
+     *             - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints
+     *             - ESP_ERR_NVS_INVALID_LENGTH if length is not sufficient to store data
+     */
+    virtual esp_err_t get_string(const char *key, char* out_str, size_t len) = 0;
+    virtual esp_err_t get_blob(const char *key, void* out_blob, size_t len) = 0;
+
+    /**
+     * @brief Look up the size of an entry's data.
+     *
+     * @param[in]     datatype   Data type to search for.
+     * @param[in]     key        Key name. Maximum length is (NVS_KEY_NAME_MAX_SIZE-1) characters. Shouldn't be empty.
+     * @param[out]    size       Size of the item, if it exists.
+     *                           For strings, this size includes the zero terminator.
+     *
+     * @return     - ESP_OK if the item with specified type and key exists. Its size will be returned via \c size.
+     *             - ESP_ERR_NVS_NOT_FOUND if an item with the requested key and type doesn't exist or any other
+     *               error occurs.
+     */
+    virtual esp_err_t get_item_size(ItemType datatype, const char *key, size_t &size) = 0;
+
+    /**
+     * @brief Erases an entry.
+     */
+    virtual esp_err_t erase_item(const char* key) = 0;
+
+    /**
+     * Erases all entries in the scope of this handle. The scope may vary, depending on the implementation.
+     *
+     * @not If you want to erase the whole nvs flash (partition), refer to \ref
+     */
+    virtual esp_err_t erase_all() = 0;
+
+    /**
+     * Commits all changes done through this handle so far.
+     * Currently, NVS writes to storage right after the set and get functions,
+     * but this is not guaranteed.
+     */
+    virtual esp_err_t commit() = 0;
+
+    /**
+     * @brief      Calculate all entries in the scope of the handle.
+     *
+     * @param[out]  used_entries Returns amount of used entries from a namespace on success.
+     *
+     *
+     * @return
+     *             - ESP_OK if the changes have been written successfully.
+     *               Return param used_entries will be filled valid value.
+     *             - ESP_ERR_NVS_NOT_INITIALIZED if the storage driver is not initialized.
+     *               Return param used_entries will be filled 0.
+     *             - ESP_ERR_INVALID_ARG if nvs_stats equal to NULL.
+     *             - Other error codes from the underlying storage driver.
+     *               Return param used_entries will be filled 0.
+     */
+    virtual esp_err_t get_used_entry_count(size_t& usedEntries) = 0;
+
+protected:
+    virtual esp_err_t set_typed_item(ItemType datatype, const char *key, const void* data, size_t dataSize) = 0;
+
+    virtual esp_err_t get_typed_item(ItemType datatype, const char *key, void* data, size_t dataSize) = 0;
+};
+
+/**
+ * @brief Opens non-volatile storage and returns a handle object.
+ *
+ * The handle is automatically closed on desctruction. The scope of the handle is the namespace ns_name
+ * in a particular partition partition_name.
+ * The parameters partition_name, ns_name and open_mode have the same meaning and restrictions as the parameters
+ * part_name, name and open_mode in \ref nvs_open_from_partition, respectively.
+ *
+ * @param err an optional pointer to an esp_err_t result of the open operation, having the same meaning as the return
+ * value in \ref nvs_open_from_partition:
+ *             - ESP_OK if storage handle was opened successfully
+ *             - ESP_ERR_NVS_NOT_INITIALIZED if the storage driver is not initialized
+ *             - ESP_ERR_NVS_PART_NOT_FOUND if the partition with label "nvs" is not found
+ *             - ESP_ERR_NVS_NOT_FOUND id namespace doesn't exist yet and
+ *               mode is NVS_READONLY
+ *             - ESP_ERR_NVS_INVALID_NAME if namespace name doesn't satisfy constraints
+ *             - other error codes from the underlying storage driver
+ *
+ * @return shared pointer of an nvs handle on success, an empty shared pointer otherwise
+ */
+std::unique_ptr<NVSHandle> open_nvs_handle_from_partition(const char *partition_name,
+        const char *ns_name,
+        nvs_open_mode_t open_mode,
+        esp_err_t *err = nullptr);
+
+/**
+ * @brief This function does the same as \ref open_nvs_handle_from_partition but uses the default nvs partition
+ * instead of a partition_name parameter.
+ */
+std::unique_ptr<NVSHandle> open_nvs_handle(const char *ns_name,
+        nvs_open_mode_t open_mode,
+        esp_err_t *err = nullptr);
+
+// Helper functions for template usage
+/**
+ * Help to translate all integral types into ItemType.
+ */
+template<typename T, typename std::enable_if<std::is_integral<T>::value, void*>::type = nullptr>
+constexpr ItemType itemTypeOf()
+{
+    return static_cast<ItemType>(((std::is_signed<T>::value)?0x10:0x00) | sizeof(T));
+}
+
+/**
+ * Help to translate all enum types into integral ItemType.
+ */
+template<typename T, typename std::enable_if<std::is_enum<T>::value, int>::type = 0>
+constexpr ItemType itemTypeOf()
+{
+    return static_cast<ItemType>(((std::is_signed<T>::value)?0x10:0x00) | sizeof(T));
+}
+
+template<typename T>
+constexpr ItemType itemTypeOf(const T&)
+{
+    return itemTypeOf<T>();
+}
+
+// Template Implementations
+template<typename T>
+esp_err_t NVSHandle::set_item(const char *key, T value) {
+    return set_typed_item(itemTypeOf(value), key, &value, sizeof(value));
+}
+
+template<typename T>
+esp_err_t NVSHandle::get_item(const char *key, T &value) {
+    return get_typed_item(itemTypeOf(value), key, &value, sizeof(value));
+}
+
+} // nvs
+
+#endif // NVS_HANDLE_HPP_
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/ssl3.h b/tools/sdk/esp32s3/include/openssl/include/internal/ssl3.h
new file mode 100644
index 00000000000..007b392f3e0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/ssl3.h
@@ -0,0 +1,44 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL3_H_
+#define _SSL3_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+# define SSL3_AD_CLOSE_NOTIFY             0
+# define SSL3_AD_UNEXPECTED_MESSAGE      10/* fatal */
+# define SSL3_AD_BAD_RECORD_MAC          20/* fatal */
+# define SSL3_AD_DECOMPRESSION_FAILURE   30/* fatal */
+# define SSL3_AD_HANDSHAKE_FAILURE       40/* fatal */
+# define SSL3_AD_NO_CERTIFICATE          41
+# define SSL3_AD_BAD_CERTIFICATE         42
+# define SSL3_AD_UNSUPPORTED_CERTIFICATE 43
+# define SSL3_AD_CERTIFICATE_REVOKED     44
+# define SSL3_AD_CERTIFICATE_EXPIRED     45
+# define SSL3_AD_CERTIFICATE_UNKNOWN     46
+# define SSL3_AD_ILLEGAL_PARAMETER       47/* fatal */
+
+# define SSL3_AL_WARNING                  1
+# define SSL3_AL_FATAL                    2
+
+#define SSL3_VERSION                 0x0300
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/ssl_cert.h b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_cert.h
new file mode 100644
index 00000000000..86cf31ad513
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_cert.h
@@ -0,0 +1,55 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL_CERT_H_
+#define _SSL_CERT_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "ssl_types.h"
+
+/**
+ * @brief create a certification object include private key object according to input certification
+ *
+ * @param ic - input certification point
+ *
+ * @return certification object point
+ */
+CERT *__ssl_cert_new(CERT *ic);
+
+/**
+ * @brief create a certification object include private key object
+ *
+ * @param none
+ *
+ * @return certification object point
+ */
+CERT* ssl_cert_new(void);
+
+/**
+ * @brief free a certification object
+ *
+ * @param cert - certification object point
+ *
+ * @return none
+ */
+void ssl_cert_free(CERT *cert);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/ssl_code.h b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_code.h
new file mode 100644
index 00000000000..18e687e5f9a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_code.h
@@ -0,0 +1,128 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL_CODE_H_
+#define _SSL_CODE_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "ssl3.h"
+#include "tls1.h"
+#include "x509_vfy.h"
+
+/* Used in SSL_set_mode() -- supported mode when using BIO */
+#define SSL_MODE_ENABLE_PARTIAL_WRITE       0x00000001L
+#define SSL_MODE_ACCEPT_MOVING_WRITE_BUFFER 0x00000002L
+
+/* Used in SSL_set_shutdown()/SSL_get_shutdown(); */
+# define SSL_SENT_SHUTDOWN       1
+# define SSL_RECEIVED_SHUTDOWN   2
+
+# define SSL_VERIFY_NONE                 0x00
+# define SSL_VERIFY_PEER                 0x01
+# define SSL_VERIFY_FAIL_IF_NO_PEER_CERT 0x02
+# define SSL_VERIFY_CLIENT_ONCE          0x04
+
+/*
+ * The following 3 states are kept in ssl->rlayer.rstate when reads fail, you
+ * should not need these
+ */
+# define SSL_ST_READ_HEADER                      0xF0
+# define SSL_ST_READ_BODY                        0xF1
+# define SSL_ST_READ_DONE                        0xF2
+
+# define SSL_NOTHING            1
+# define SSL_WRITING            2
+# define SSL_READING            3
+# define SSL_X509_LOOKUP        4
+# define SSL_ASYNC_PAUSED       5
+# define SSL_ASYNC_NO_JOBS      6
+
+
+# define SSL_ERROR_NONE                  0
+# define SSL_ERROR_SSL                   1
+# define SSL_ERROR_WANT_READ             2
+# define SSL_ERROR_WANT_WRITE            3
+# define SSL_ERROR_WANT_X509_LOOKUP      4
+# define SSL_ERROR_SYSCALL               5/* look at error stack/return value/errno */
+# define SSL_ERROR_ZERO_RETURN           6
+# define SSL_ERROR_WANT_CONNECT          7
+# define SSL_ERROR_WANT_ACCEPT           8
+# define SSL_ERROR_WANT_ASYNC            9
+# define SSL_ERROR_WANT_ASYNC_JOB       10
+
+/* Message flow states */
+typedef enum {
+    /* No handshake in progress */
+    MSG_FLOW_UNINITED,
+    /* A permanent error with this connection */
+    MSG_FLOW_ERROR,
+    /* We are about to renegotiate */
+    MSG_FLOW_RENEGOTIATE,
+    /* We are reading messages */
+    MSG_FLOW_READING,
+    /* We are writing messages */
+    MSG_FLOW_WRITING,
+    /* Handshake has finished */
+    MSG_FLOW_FINISHED
+} MSG_FLOW_STATE;
+
+/* SSL subsystem states */
+typedef enum {
+    TLS_ST_BEFORE,
+    TLS_ST_OK,
+    DTLS_ST_CR_HELLO_VERIFY_REQUEST,
+    TLS_ST_CR_SRVR_HELLO,
+    TLS_ST_CR_CERT,
+    TLS_ST_CR_CERT_STATUS,
+    TLS_ST_CR_KEY_EXCH,
+    TLS_ST_CR_CERT_REQ,
+    TLS_ST_CR_SRVR_DONE,
+    TLS_ST_CR_SESSION_TICKET,
+    TLS_ST_CR_CHANGE,
+    TLS_ST_CR_FINISHED,
+    TLS_ST_CW_CLNT_HELLO,
+    TLS_ST_CW_CERT,
+    TLS_ST_CW_KEY_EXCH,
+    TLS_ST_CW_CERT_VRFY,
+    TLS_ST_CW_CHANGE,
+    TLS_ST_CW_NEXT_PROTO,
+    TLS_ST_CW_FINISHED,
+    TLS_ST_SW_HELLO_REQ,
+    TLS_ST_SR_CLNT_HELLO,
+    DTLS_ST_SW_HELLO_VERIFY_REQUEST,
+    TLS_ST_SW_SRVR_HELLO,
+    TLS_ST_SW_CERT,
+    TLS_ST_SW_KEY_EXCH,
+    TLS_ST_SW_CERT_REQ,
+    TLS_ST_SW_SRVR_DONE,
+    TLS_ST_SR_CERT,
+    TLS_ST_SR_KEY_EXCH,
+    TLS_ST_SR_CERT_VRFY,
+    TLS_ST_SR_NEXT_PROTO,
+    TLS_ST_SR_CHANGE,
+    TLS_ST_SR_FINISHED,
+    TLS_ST_SW_SESSION_TICKET,
+    TLS_ST_SW_CERT_STATUS,
+    TLS_ST_SW_CHANGE,
+    TLS_ST_SW_FINISHED
+} OSSL_HANDSHAKE_STATE;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/ssl_dbg.h b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_dbg.h
new file mode 100644
index 00000000000..12ba25f99d8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_dbg.h
@@ -0,0 +1,191 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL_DEBUG_H_
+#define _SSL_DEBUG_H_
+
+#include "platform/ssl_opt.h"
+#include "platform/ssl_port.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifdef CONFIG_OPENSSL_DEBUG_LEVEL
+    #define SSL_DEBUG_LEVEL CONFIG_OPENSSL_DEBUG_LEVEL
+#else
+    #define SSL_DEBUG_LEVEL 0
+#endif
+
+#define SSL_DEBUG_ON  (SSL_DEBUG_LEVEL + 1)
+#define SSL_DEBUG_OFF (SSL_DEBUG_LEVEL - 1)
+
+#ifdef CONFIG_OPENSSL_DEBUG
+    #ifndef SSL_DEBUG_LOG
+        #error "SSL_DEBUG_LOG is not defined"
+    #endif
+
+    #ifndef SSL_DEBUG_FL
+        #define SSL_DEBUG_FL "\n"
+    #endif
+
+    #define SSL_SHOW_LOCATION()                         \
+        SSL_DEBUG_LOG("SSL assert : %s %d\n",           \
+            __FILE__, __LINE__)
+
+    #define SSL_DEBUG(level, fmt, ...)                  \
+    {                                                   \
+        if (level > SSL_DEBUG_LEVEL) {                  \
+            SSL_DEBUG_LOG(fmt SSL_DEBUG_FL, ##__VA_ARGS__); \
+        }                                               \
+    }
+#else /* CONFIG_OPENSSL_DEBUG */
+    #define SSL_SHOW_LOCATION()
+
+    #define SSL_DEBUG(level, fmt, ...)
+#endif /* CONFIG_OPENSSL_DEBUG */
+
+/**
+ * OpenSSL assert function
+ *
+ * if select "CONFIG_OPENSSL_ASSERT_DEBUG", SSL_ASSERT* will show error file name and line
+ * if select "CONFIG_OPENSSL_ASSERT_EXIT", SSL_ASSERT* will just return error code.
+ * if select "CONFIG_OPENSSL_ASSERT_DEBUG_EXIT" SSL_ASSERT* will show error file name and line,
+ * then return error code.
+ * if select "CONFIG_OPENSSL_ASSERT_DEBUG_BLOCK", SSL_ASSERT* will show error file name and line,
+ * then block here with "while (1)"
+ *
+ * SSL_ASSERT1 may will return "-1", so function's return argument is integer.
+ * SSL_ASSERT2 may will return "NULL", so function's return argument is a point.
+ * SSL_ASSERT2 may will return nothing, so function's return argument is "void".
+ */
+#if defined(CONFIG_OPENSSL_ASSERT_DEBUG)
+    #define SSL_ASSERT1(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            SSL_SHOW_LOCATION();                        \
+        }                                               \
+    }
+
+    #define SSL_ASSERT2(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            SSL_SHOW_LOCATION();                        \
+        }                                               \
+    }
+
+    #define SSL_ASSERT3(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            SSL_SHOW_LOCATION();                        \
+        }                                               \
+    }
+#elif defined(CONFIG_OPENSSL_ASSERT_EXIT)
+    #define SSL_ASSERT1(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            return -1;                                  \
+        }                                               \
+    }
+
+    #define SSL_ASSERT2(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            return NULL;                                \
+        }                                               \
+    }
+
+    #define SSL_ASSERT3(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            return ;                                    \
+        }                                               \
+    }
+#elif defined(CONFIG_OPENSSL_ASSERT_DEBUG_EXIT)
+    #define SSL_ASSERT1(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            SSL_SHOW_LOCATION();                        \
+            return -1;                                  \
+        }                                               \
+    }
+
+    #define SSL_ASSERT2(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            SSL_SHOW_LOCATION();                        \
+            return NULL;                                \
+        }                                               \
+    }
+
+    #define SSL_ASSERT3(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            SSL_SHOW_LOCATION();                        \
+            return ;                                    \
+        }                                               \
+    }
+#elif defined(CONFIG_OPENSSL_ASSERT_DEBUG_BLOCK)
+    #define SSL_ASSERT1(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            SSL_SHOW_LOCATION();                        \
+            while (1);                                  \
+        }                                               \
+    }
+
+    #define SSL_ASSERT2(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            SSL_SHOW_LOCATION();                        \
+            while (1);                                  \
+        }                                               \
+    }
+
+    #define SSL_ASSERT3(s)                              \
+    {                                                   \
+        if (!(s)) {                                     \
+            SSL_SHOW_LOCATION();                        \
+            while (1);                                  \
+        }                                               \
+    }
+#else
+    #define SSL_ASSERT1(s)
+    #define SSL_ASSERT2(s)
+    #define SSL_ASSERT3(s)
+#endif
+
+#define SSL_PLATFORM_DEBUG_LEVEL SSL_DEBUG_OFF
+#define SSL_PLATFORM_ERROR_LEVEL SSL_DEBUG_ON
+
+#define SSL_CERT_DEBUG_LEVEL     SSL_DEBUG_OFF
+#define SSL_CERT_ERROR_LEVEL     SSL_DEBUG_ON
+
+#define SSL_PKEY_DEBUG_LEVEL     SSL_DEBUG_OFF
+#define SSL_PKEY_ERROR_LEVEL     SSL_DEBUG_ON
+
+#define SSL_X509_DEBUG_LEVEL     SSL_DEBUG_OFF
+#define SSL_X509_ERROR_LEVEL     SSL_DEBUG_ON
+
+#define SSL_LIB_DEBUG_LEVEL      SSL_DEBUG_OFF
+#define SSL_LIB_ERROR_LEVEL      SSL_DEBUG_ON
+
+#define SSL_STACK_DEBUG_LEVEL    SSL_DEBUG_OFF
+#define SSL_STACK_ERROR_LEVEL    SSL_DEBUG_ON
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/ssl_lib.h b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_lib.h
new file mode 100644
index 00000000000..bf7de22fdf0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_lib.h
@@ -0,0 +1,28 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL_LIB_H_
+#define _SSL_LIB_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "ssl_types.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/ssl_methods.h b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_methods.h
new file mode 100644
index 00000000000..17cf9bb6974
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_methods.h
@@ -0,0 +1,122 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL_METHODS_H_
+#define _SSL_METHODS_H_
+
+#include "ssl_types.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+ * TLS method function implement
+ */
+#define IMPLEMENT_TLS_METHOD_FUNC(func_name, \
+                    new, free, \
+                    handshake, shutdown, clear, \
+                    read, send, pending, \
+                    set_fd, set_hostname, get_fd,	\
+                    set_bufflen, \
+                    get_verify_result, \
+                    get_state) \
+        static const SSL_METHOD_FUNC func_name LOCAL_ATRR = { \
+                new, \
+                free, \
+                handshake, \
+                shutdown, \
+                clear, \
+                read, \
+                send, \
+                pending, \
+                set_fd, \
+		set_hostname, \
+                get_fd, \
+                set_bufflen, \
+                get_verify_result, \
+                get_state \
+        };
+
+#define IMPLEMENT_TLS_METHOD(ver, mode, fun, func_name) \
+    const SSL_METHOD* func_name(void) { \
+        static const SSL_METHOD func_name##_data LOCAL_ATRR = { \
+                ver, \
+                mode, \
+                &(fun), \
+        }; \
+        return &func_name##_data; \
+    }
+
+#define IMPLEMENT_SSL_METHOD(ver, mode, fun, func_name) \
+    const SSL_METHOD* func_name(void) { \
+        static const SSL_METHOD func_name##_data LOCAL_ATRR = { \
+                ver, \
+                mode, \
+                &(fun), \
+        }; \
+        return &func_name##_data; \
+    }
+
+#define IMPLEMENT_X509_METHOD(func_name, \
+                new, \
+                free, \
+                load, \
+                show_info) \
+    const X509_METHOD* func_name(void) { \
+        static const X509_METHOD func_name##_data LOCAL_ATRR = { \
+                new, \
+                free, \
+                load, \
+                show_info \
+        }; \
+        return &func_name##_data; \
+    }
+
+#define IMPLEMENT_PKEY_METHOD(func_name, \
+                new, \
+                free, \
+                load) \
+    const PKEY_METHOD* func_name(void) { \
+        static const PKEY_METHOD func_name##_data LOCAL_ATRR = { \
+                new, \
+                free, \
+                load \
+        }; \
+        return &func_name##_data; \
+    }
+
+/**
+ * @brief get X509 object method
+ *
+ * @param none
+ *
+ * @return X509 object method point
+ */
+const X509_METHOD* X509_method(void);
+
+/**
+ * @brief get private key object method
+ *
+ * @param none
+ *
+ * @return private key object method point
+ */
+const PKEY_METHOD* EVP_PKEY_method(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/ssl_pkey.h b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_pkey.h
new file mode 100644
index 00000000000..a8cfa33df41
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_pkey.h
@@ -0,0 +1,132 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL_PKEY_H_
+#define _SSL_PKEY_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "ssl_types.h"
+
+/**
+ * @brief create a private key object according to input private key
+ *
+ * @param ipk - input private key point
+ *
+ * @return new private key object point
+ */
+EVP_PKEY* __EVP_PKEY_new(EVP_PKEY *ipk);
+
+/**
+ * @brief create a private key object
+ *
+ * @param none
+ *
+ * @return private key object point
+ */
+EVP_PKEY* EVP_PKEY_new(void);
+
+/**
+ * @brief load a character key context into system context. If '*a' is pointed to the
+ *        private key, then load key into it. Or create a new private key object
+ *
+ * @param type   - private key type
+ * @param a      - a point pointed to a private key point
+ * @param pp     - a point pointed to the key context memory point
+ * @param length - key bytes
+ *
+ * @return private key object point
+ */
+EVP_PKEY* d2i_PrivateKey(int type,
+                         EVP_PKEY **a,
+                         const unsigned char **pp,
+                         long length);
+
+/**
+ * @brief decodes and load a buffer BIO into a EVP key context. If '*a' is pointed to the
+ *        private key, then load key into it. Or create a new private key object
+ *
+ * @param bp BIO object containing the key
+ * @param a Pointer to an existing EVP_KEY or NULL if a new key shall be created
+ *
+ * @return Created or updated EVP_PKEY
+ */
+EVP_PKEY *d2i_PrivateKey_bio(BIO *bp, EVP_PKEY **a);
+
+/**
+ * @brief Same as d2i_PrivateKey_bio
+ *
+ * @param bp BIO object containing the key
+ * @param a Pointer to an existing EVP_KEY or NULL if a new key shall be created
+ *
+ * @return Created or updated EVP_PKEY
+ */
+RSA *d2i_RSAPrivateKey_bio(BIO *bp,RSA **rsa);
+
+/**
+ * @brief loads a private key in PEM format from BIO object
+ *
+ * @param bp BIO object containing the key
+ * @param x  Pointer to an existent PKEY or NULL if a new key shall be created
+ * @param cb Password callback (not used)
+ * @param u User context (not used)
+ *
+ * @return Created or updated EVP_PKEY
+ */
+EVP_PKEY *PEM_read_bio_PrivateKey(BIO *bp, EVP_PKEY **x, pem_password_cb *cb, void *u);
+
+/**
+ * @brief RSA key in PEM format from BIO object
+ *
+ * @param bp BIO object containing the key
+ * @param x  Pointer to an existent PKEY or NULL if a new key shall be created
+ * @param cb Password callback (not used)
+ * @param u User context (not used)
+ *
+ * @return Created or updated EVP_PKEY
+ */
+
+RSA *PEM_read_bio_RSAPrivateKey(BIO *bp, RSA **rsa, pem_password_cb *cb, void *u);
+
+/**
+ * @brief free a private key object
+ *
+ * @param pkey - private key object point
+ *
+ * @return none
+ */
+void EVP_PKEY_free(EVP_PKEY *x);
+
+/**
+ * @brief load private key into the SSL
+ *
+ * @param type - private key type
+ * @param ssl  - SSL point
+ * @param len  - data bytes
+ * @param d    - data point
+ *
+ * @return result
+ *     0 : failed
+ *     1 : OK
+ */
+ int SSL_use_PrivateKey_ASN1(int type, SSL *ssl, const unsigned char *d, long len);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/ssl_stack.h b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_stack.h
new file mode 100644
index 00000000000..f1efa5795f1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_stack.h
@@ -0,0 +1,95 @@
+#ifndef _SSL_STACK_H_
+#define _SSL_STACK_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "ssl_types.h"
+
+#define STACK_OF(type)  struct stack_st_##type
+
+#define SKM_DEFINE_STACK_OF(t1, t2, t3) \
+    STACK_OF(t1); \
+    static ossl_inline STACK_OF(t1) *sk_##t1##_new_null(void) \
+    { \
+        return (STACK_OF(t1) *)OPENSSL_sk_new_null(); \
+    } \
+
+#define DEFINE_STACK_OF(t) SKM_DEFINE_STACK_OF(t, t, t)
+typedef struct asn1_string_st ASN1_OCTET_STRING;
+
+struct stack_st_GENERAL_NAME;
+typedef struct GENERAL_NAME_st {
+    int type;
+    union {
+        char *ptr;
+        struct asn1_string_st* dNSName;
+        ASN1_OCTET_STRING* iPAddress;
+    } d;
+} GENERAL_NAME;
+
+typedef struct asn1_string_st ASN1_OCTET_STRING;
+typedef struct X509_name_st X509_NAME;
+typedef struct asn1_string_st ASN1_STRING;
+typedef struct X509_name_entry_st X509_NAME_ENTRY;
+
+typedef struct asn1_string_st {
+    int type;
+    int length;
+    void *data;
+} ASN1_IA5STRING;
+
+typedef STACK_OF(GENERAL_NAME) GENERAL_NAMES;
+
+/**
+ * @brief get nr of stack items
+ *
+ * @param sk Stack structure pointer
+ *
+ * @return number of items in the stack
+ */
+size_t sk_GENERAL_NAME_num(const struct stack_st_GENERAL_NAME *sk);
+
+/**
+ * @brief get GENERAL_NAME value from the stack
+ *
+ * @param sk Stack structure pointer
+ * @param i Index to stack item
+ *
+ * @return GENERAL_NAME object pointer
+ */
+GENERAL_NAME *sk_GENERAL_NAME_value(const struct stack_st_GENERAL_NAME *sk, size_t i);
+
+/**
+ * @brief create a openssl stack object
+ *
+ * @param c - stack function
+ *
+ * @return openssl stack object point
+ */
+OPENSSL_STACK* OPENSSL_sk_new(OPENSSL_sk_compfunc c);
+
+/**
+ * @brief create a NULL function openssl stack object
+ *
+ * @param none
+ *
+ * @return openssl stack object point
+ */
+OPENSSL_STACK *OPENSSL_sk_new_null(void);
+
+/**
+ * @brief free openssl stack object
+ *
+ * @param openssl stack object point
+ *
+ * @return none
+ */
+void OPENSSL_sk_free(OPENSSL_STACK *stack);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/ssl_types.h b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_types.h
new file mode 100644
index 00000000000..2871d3a83a8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_types.h
@@ -0,0 +1,346 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL_TYPES_H_
+#define _SSL_TYPES_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "ssl_code.h"
+#include <stddef.h>
+#include <stdint.h>
+
+typedef void SSL_CIPHER;
+
+typedef void X509_STORE_CTX;
+typedef void X509_STORE;
+
+typedef void RSA;
+
+typedef void STACK;
+
+typedef void DH;
+
+#define ossl_inline inline
+
+#define SSL_METHOD_CALL(f, s, ...)        s->method->func->ssl_##f(s, ##__VA_ARGS__)
+#define X509_METHOD_CALL(f, x, ...)       x->method->x509_##f(x, ##__VA_ARGS__)
+#define EVP_PKEY_METHOD_CALL(f, k, ...)   k->method->pkey_##f(k, ##__VA_ARGS__)
+
+typedef int (*OPENSSL_sk_compfunc)(const void *, const void *);
+typedef int (*openssl_verify_callback)(int, X509_STORE_CTX *);
+struct stack_st;
+typedef struct stack_st OPENSSL_STACK;
+
+struct ssl_method_st;
+typedef struct ssl_method_st SSL_METHOD;
+
+struct ssl_method_func_st;
+typedef struct ssl_method_func_st SSL_METHOD_FUNC;
+
+struct record_layer_st;
+typedef struct record_layer_st RECORD_LAYER;
+
+struct ossl_statem_st;
+typedef struct ossl_statem_st OSSL_STATEM;
+
+struct ssl_session_st;
+typedef struct ssl_session_st SSL_SESSION;
+
+struct ssl_ctx_st;
+typedef struct ssl_ctx_st SSL_CTX;
+
+struct ssl_st;
+typedef struct ssl_st SSL;
+
+struct cert_st;
+typedef struct cert_st CERT;
+
+struct x509_st;
+typedef struct x509_st X509;
+
+struct X509_VERIFY_PARAM_st;
+typedef struct X509_VERIFY_PARAM_st X509_VERIFY_PARAM;
+
+struct evp_pkey_st;
+typedef struct evp_pkey_st EVP_PKEY;
+
+struct x509_method_st;
+typedef struct x509_method_st X509_METHOD;
+
+struct pkey_method_st;
+typedef struct pkey_method_st PKEY_METHOD;
+
+struct ssl_alpn_st;
+typedef struct ssl_alpn_st SSL_ALPN;
+
+struct bio_st;
+typedef struct bio_st BIO;
+
+struct stack_st {
+
+    char **data;
+
+    int num_alloc;
+
+    OPENSSL_sk_compfunc c;
+};
+
+struct evp_pkey_st {
+
+    void *pkey_pm;
+
+    const PKEY_METHOD *method;
+
+    int ref_counter;
+};
+
+struct x509_st {
+
+    /* X509 certification platform private point */
+    void *x509_pm;
+
+    const X509_METHOD *method;
+
+    int ref_counter;
+};
+
+struct cert_st {
+
+    int sec_level;
+
+    X509 *x509;
+
+    EVP_PKEY *pkey;
+
+};
+
+struct ossl_statem_st {
+
+    MSG_FLOW_STATE state;
+
+    int hand_state;
+};
+
+struct record_layer_st {
+
+    int rstate;
+
+    int read_ahead;
+};
+
+struct ssl_session_st {
+
+    long timeout;
+
+    long time;
+
+    X509 *peer;
+};
+
+struct X509_VERIFY_PARAM_st {
+
+    int depth;
+
+};
+
+struct bio_st {
+
+    unsigned char * data;
+    int dlen;
+    BIO* peer;
+    size_t offset;
+    size_t roffset;
+    size_t size;
+    size_t flags;
+    size_t type;
+
+};
+
+typedef enum { ALPN_INIT, ALPN_ENABLE, ALPN_DISABLE, ALPN_ERROR } ALPN_STATUS;
+struct ssl_alpn_st {
+     ALPN_STATUS alpn_status;
+     /* This is dynamically allocated */
+     char *alpn_string;
+     /* This only points to the members in the string */
+#define ALPN_LIST_MAX 10
+     const char *alpn_list[ALPN_LIST_MAX];
+};
+
+typedef int pem_password_cb(char *buf, int size, int rwflag, void *userdata);
+
+
+struct ssl_ctx_st
+{
+    int version;
+
+    int references;
+
+    unsigned long options;
+
+    SSL_ALPN ssl_alpn;
+
+    const SSL_METHOD *method;
+
+    CERT *cert;
+
+    X509 *client_CA;
+
+    int verify_mode;
+
+    int (*default_verify_callback) (int ok, X509_STORE_CTX *ctx);
+
+    long session_timeout;
+
+    int read_ahead;
+
+    int read_buffer_len;
+
+    X509_VERIFY_PARAM param;
+
+    void *default_passwd_callback_userdata;
+
+    pem_password_cb *default_passwd_callback;
+
+    struct stack_st_X509 *extra_certs;
+
+    int max_version;
+    int min_version;
+
+};
+
+struct ssl_st
+{
+    /* protocol version(one of SSL3.0, TLS1.0, etc.) */
+    int version;
+
+    unsigned long options;
+
+    /* shut things down(0x01 : sent, 0x02 : received) */
+    int shutdown;
+
+    CERT *cert;
+
+    X509 *client_CA;
+
+    SSL_CTX  *ctx;
+
+    const SSL_METHOD *method;
+
+    RECORD_LAYER rlayer;
+
+    /* where we are */
+    OSSL_STATEM statem;
+
+    SSL_SESSION *session;
+
+    int verify_mode;
+
+    int (*verify_callback) (int ok, X509_STORE_CTX *ctx);
+
+    int rwstate;
+
+    long verify_result;
+
+    X509_VERIFY_PARAM param;
+
+    uint32_t mode;
+
+    void (*info_callback) (const SSL *ssl, int type, int val);
+
+    /* SSL low-level system arch point */
+    void *ssl_pm;
+    void *bio;
+};
+
+struct ssl_method_st {
+    /* protocol version(one of SSL3.0, TLS1.0, etc.) */
+    int version;
+
+    /* SSL mode(client(0) , server(1), not known(-1)) */
+    int endpoint;
+
+    const SSL_METHOD_FUNC *func;
+};
+
+struct ssl_method_func_st {
+
+    int (*ssl_new)(SSL *ssl);
+
+    void (*ssl_free)(SSL *ssl);
+
+    int (*ssl_handshake)(SSL *ssl);
+
+    int (*ssl_shutdown)(SSL *ssl);
+
+    int (*ssl_clear)(SSL *ssl);
+
+    int (*ssl_read)(SSL *ssl, void *buffer, int len);
+
+    int (*ssl_send)(SSL *ssl, const void *buffer, int len);
+
+    int (*ssl_pending)(const SSL *ssl);
+
+    void (*ssl_set_fd)(SSL *ssl, int fd, int mode);
+
+    void (*ssl_set_hostname)(SSL *ssl, const char *hostname);
+
+    int (*ssl_get_fd)(const SSL *ssl, int mode);
+
+    void (*ssl_set_bufflen)(SSL *ssl, int len);
+
+    long (*ssl_get_verify_result)(const SSL *ssl);
+
+    OSSL_HANDSHAKE_STATE (*ssl_get_state)(const SSL *ssl);
+};
+
+struct x509_method_st {
+
+    int (*x509_new)(X509 *x, X509 *m_x);
+
+    void (*x509_free)(X509 *x);
+
+    int (*x509_load)(X509 *x, const unsigned char *buf, int len);
+
+    int (*x509_show_info)(X509 *x);
+};
+
+struct pkey_method_st {
+
+    int (*pkey_new)(EVP_PKEY *pkey, EVP_PKEY *m_pkey);
+
+    void (*pkey_free)(EVP_PKEY *pkey);
+
+    int (*pkey_load)(EVP_PKEY *pkey, const unsigned char *buf, int len);
+};
+
+struct bio_method_st {
+
+    unsigned type;
+
+    unsigned size;
+};
+
+
+typedef int (*next_proto_cb)(SSL *ssl, unsigned char **out,
+                             unsigned char *outlen, const unsigned char *in,
+                             unsigned int inlen, void *arg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/ssl_x509.h b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_x509.h
new file mode 100644
index 00000000000..454fbdcb23c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/ssl_x509.h
@@ -0,0 +1,152 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL_X509_H_
+#define _SSL_X509_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "ssl_types.h"
+#include "ssl_stack.h"
+
+DEFINE_STACK_OF(X509_NAME)
+
+/**
+ * @brief create a X509 certification object according to input X509 certification
+ *
+ * @param ix - input X509 certification point
+ *
+ * @return new X509 certification object point
+ */
+X509* __X509_new(X509 *ix);
+
+/**
+ * @brief create a X509 certification object
+ *
+ * @param none
+ *
+ * @return X509 certification object point
+ */
+X509* X509_new(void);
+
+/**
+ * @brief load a character certification context into system context. If '*cert' is pointed to the
+ *        certification, then load certification into it. Or create a new X509 certification object
+ *
+ * @param cert   - a point pointed to X509 certification
+ * @param buffer - a point pointed to the certification context memory point
+ * @param length - certification bytes
+ *
+ * @return X509 certification object point
+ */
+X509* d2i_X509(X509 **cert, const unsigned char *buffer, long len);
+
+/**
+ * @brief free a X509 certification object
+ *
+ * @param x - X509 certification object point
+ *
+ * @return none
+ */
+void X509_free(X509 *x);
+
+/**
+ * @brief set SSL context client CA certification
+ *
+ * @param ctx - SSL context point
+ * @param x   - X509 certification point
+ *
+ * @return result
+ *     0 : failed
+ *     1 : OK
+ */
+int SSL_CTX_add_client_CA(SSL_CTX *ctx, X509 *x);
+
+/**
+ * @brief add CA client certification into the SSL
+ *
+ * @param ssl - SSL point
+ * @param x   - X509 certification point
+ *
+ * @return result
+ *     0 : failed
+ *     1 : OK
+ */
+int SSL_add_client_CA(SSL *ssl, X509 *x);
+
+/**
+ * @brief load certification into the SSL
+ *
+ * @param ssl - SSL point
+ * @param len - data bytes
+ * @param d   - data point
+ *
+ * @return result
+ *     0 : failed
+ *     1 : OK
+ *
+ */
+int SSL_use_certificate_ASN1(SSL *ssl, int len, const unsigned char *d);
+
+
+/**
+ * @brief set SSL context client CA certification
+ *
+ * @param store - pointer to X509_STORE
+ * @param x     -  pointer to X509 certification point
+ *
+ * @return result
+ *     0 : failed
+ *     1 : OK
+ */
+int X509_STORE_add_cert(X509_STORE *store, X509 *x);
+
+/**
+ * @brief load a character certification context into system context.
+ *
+ * If '*cert' is pointed to the certification, then load certification
+ * into it, or create a new X509 certification object.
+ *
+ * @param bp     - pointer to  BIO
+ * @param buffer - pointer to the certification context memory
+ * @param cb     - pointer to a callback which queries pass phrase used
+                   for encrypted PEM structure
+ * @param u      - pointer to arbitary data passed by application to callback
+ *
+ * @return X509 certification object point
+ */
+X509 * PEM_read_bio_X509(BIO *bp, X509 **x, pem_password_cb cb, void *u);
+
+/**
+ * @brief load a character certification context into system context.
+ *
+ * Current implementation directly calls PEM_read_bio_X509
+ *
+ * @param bp     - pointer to  BIO
+ * @param buffer - pointer to the certification context memory
+ * @param cb     - pointer to the callback (not implemented)
+ * @param u      - pointer to arbitrary data (not implemented)
+ *
+ * @return X509 certification object point
+ */
+X509 *PEM_read_bio_X509_AUX(BIO *bp, X509 **cert, pem_password_cb *cb, void *u);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/tls1.h b/tools/sdk/esp32s3/include/openssl/include/internal/tls1.h
new file mode 100644
index 00000000000..a9da53e063e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/tls1.h
@@ -0,0 +1,55 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _TLS1_H_
+#define _TLS1_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+# define TLS1_AD_DECRYPTION_FAILED       21
+# define TLS1_AD_RECORD_OVERFLOW         22
+# define TLS1_AD_UNKNOWN_CA              48/* fatal */
+# define TLS1_AD_ACCESS_DENIED           49/* fatal */
+# define TLS1_AD_DECODE_ERROR            50/* fatal */
+# define TLS1_AD_DECRYPT_ERROR           51
+# define TLS1_AD_EXPORT_RESTRICTION      60/* fatal */
+# define TLS1_AD_PROTOCOL_VERSION        70/* fatal */
+# define TLS1_AD_INSUFFICIENT_SECURITY   71/* fatal */
+# define TLS1_AD_INTERNAL_ERROR          80/* fatal */
+# define TLS1_AD_INAPPROPRIATE_FALLBACK  86/* fatal */
+# define TLS1_AD_USER_CANCELLED          90
+# define TLS1_AD_NO_RENEGOTIATION        100
+/* codes 110-114 are from RFC3546 */
+# define TLS1_AD_UNSUPPORTED_EXTENSION   110
+# define TLS1_AD_CERTIFICATE_UNOBTAINABLE 111
+# define TLS1_AD_UNRECOGNIZED_NAME       112
+# define TLS1_AD_BAD_CERTIFICATE_STATUS_RESPONSE 113
+# define TLS1_AD_BAD_CERTIFICATE_HASH_VALUE 114
+# define TLS1_AD_UNKNOWN_PSK_IDENTITY    115/* fatal */
+# define TLS1_AD_NO_APPLICATION_PROTOCOL 120 /* fatal */
+
+/* Special value for method supporting multiple versions */
+#define TLS_ANY_VERSION                 0x10000
+
+#define TLS1_VERSION                    0x0301
+#define TLS1_1_VERSION                  0x0302
+#define TLS1_2_VERSION                  0x0303
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/internal/x509_vfy.h b/tools/sdk/esp32s3/include/openssl/include/internal/x509_vfy.h
new file mode 100644
index 00000000000..fec367d5fd8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/internal/x509_vfy.h
@@ -0,0 +1,111 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _X509_VFY_H_
+#define _X509_VFY_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define         X509_V_OK                                       0
+#define         X509_V_ERR_UNSPECIFIED                          1
+#define         X509_V_ERR_UNABLE_TO_GET_ISSUER_CERT            2
+#define         X509_V_ERR_UNABLE_TO_GET_CRL                    3
+#define         X509_V_ERR_UNABLE_TO_DECRYPT_CERT_SIGNATURE     4
+#define         X509_V_ERR_UNABLE_TO_DECRYPT_CRL_SIGNATURE      5
+#define         X509_V_ERR_UNABLE_TO_DECODE_ISSUER_PUBLIC_KEY   6
+#define         X509_V_ERR_CERT_SIGNATURE_FAILURE               7
+#define         X509_V_ERR_CRL_SIGNATURE_FAILURE                8
+#define         X509_V_ERR_CERT_NOT_YET_VALID                   9
+#define         X509_V_ERR_CERT_HAS_EXPIRED                     10
+#define         X509_V_ERR_CRL_NOT_YET_VALID                    11
+#define         X509_V_ERR_CRL_HAS_EXPIRED                      12
+#define         X509_V_ERR_ERROR_IN_CERT_NOT_BEFORE_FIELD       13
+#define         X509_V_ERR_ERROR_IN_CERT_NOT_AFTER_FIELD        14
+#define         X509_V_ERR_ERROR_IN_CRL_LAST_UPDATE_FIELD       15
+#define         X509_V_ERR_ERROR_IN_CRL_NEXT_UPDATE_FIELD       16
+#define         X509_V_ERR_OUT_OF_MEM                           17
+#define         X509_V_ERR_DEPTH_ZERO_SELF_SIGNED_CERT          18
+#define         X509_V_ERR_SELF_SIGNED_CERT_IN_CHAIN            19
+#define         X509_V_ERR_UNABLE_TO_GET_ISSUER_CERT_LOCALLY    20
+#define         X509_V_ERR_UNABLE_TO_VERIFY_LEAF_SIGNATURE      21
+#define         X509_V_ERR_CERT_CHAIN_TOO_LONG                  22
+#define         X509_V_ERR_CERT_REVOKED                         23
+#define         X509_V_ERR_INVALID_CA                           24
+#define         X509_V_ERR_PATH_LENGTH_EXCEEDED                 25
+#define         X509_V_ERR_INVALID_PURPOSE                      26
+#define         X509_V_ERR_CERT_UNTRUSTED                       27
+#define         X509_V_ERR_CERT_REJECTED                        28
+/* These are 'informational' when looking for issuer cert */
+#define         X509_V_ERR_SUBJECT_ISSUER_MISMATCH              29
+#define         X509_V_ERR_AKID_SKID_MISMATCH                   30
+#define         X509_V_ERR_AKID_ISSUER_SERIAL_MISMATCH          31
+#define         X509_V_ERR_KEYUSAGE_NO_CERTSIGN                 32
+#define         X509_V_ERR_UNABLE_TO_GET_CRL_ISSUER             33
+#define         X509_V_ERR_UNHANDLED_CRITICAL_EXTENSION         34
+#define         X509_V_ERR_KEYUSAGE_NO_CRL_SIGN                 35
+#define         X509_V_ERR_UNHANDLED_CRITICAL_CRL_EXTENSION     36
+#define         X509_V_ERR_INVALID_NON_CA                       37
+#define         X509_V_ERR_PROXY_PATH_LENGTH_EXCEEDED           38
+#define         X509_V_ERR_KEYUSAGE_NO_DIGITAL_SIGNATURE        39
+#define         X509_V_ERR_PROXY_CERTIFICATES_NOT_ALLOWED       40
+#define         X509_V_ERR_INVALID_EXTENSION                    41
+#define         X509_V_ERR_INVALID_POLICY_EXTENSION             42
+#define         X509_V_ERR_NO_EXPLICIT_POLICY                   43
+#define         X509_V_ERR_DIFFERENT_CRL_SCOPE                  44
+#define         X509_V_ERR_UNSUPPORTED_EXTENSION_FEATURE        45
+#define         X509_V_ERR_UNNESTED_RESOURCE                    46
+#define         X509_V_ERR_PERMITTED_VIOLATION                  47
+#define         X509_V_ERR_EXCLUDED_VIOLATION                   48
+#define         X509_V_ERR_SUBTREE_MINMAX                       49
+/* The application is not happy */
+#define         X509_V_ERR_APPLICATION_VERIFICATION             50
+#define         X509_V_ERR_UNSUPPORTED_CONSTRAINT_TYPE          51
+#define         X509_V_ERR_UNSUPPORTED_CONSTRAINT_SYNTAX        52
+#define         X509_V_ERR_UNSUPPORTED_NAME_SYNTAX              53
+#define         X509_V_ERR_CRL_PATH_VALIDATION_ERROR            54
+/* Another issuer check debug option */
+#define         X509_V_ERR_PATH_LOOP                            55
+/* Suite B mode algorithm violation */
+#define         X509_V_ERR_SUITE_B_INVALID_VERSION              56
+#define         X509_V_ERR_SUITE_B_INVALID_ALGORITHM            57
+#define         X509_V_ERR_SUITE_B_INVALID_CURVE                58
+#define         X509_V_ERR_SUITE_B_INVALID_SIGNATURE_ALGORITHM  59
+#define         X509_V_ERR_SUITE_B_LOS_NOT_ALLOWED              60
+#define         X509_V_ERR_SUITE_B_CANNOT_SIGN_P_384_WITH_P_256 61
+/* Host, email and IP check errors */
+#define         X509_V_ERR_HOSTNAME_MISMATCH                    62
+#define         X509_V_ERR_EMAIL_MISMATCH                       63
+#define         X509_V_ERR_IP_ADDRESS_MISMATCH                  64
+/* DANE TLSA errors */
+#define         X509_V_ERR_DANE_NO_MATCH                        65
+/* security level errors */
+#define         X509_V_ERR_EE_KEY_TOO_SMALL                     66
+#define         X509_V_ERR_CA_KEY_TOO_SMALL                     67
+#define         X509_V_ERR_CA_MD_TOO_WEAK                       68
+/* Caller error */
+#define         X509_V_ERR_INVALID_CALL                         69
+/* Issuer lookup error */
+#define         X509_V_ERR_STORE_LOOKUP                         70
+/* Certificate transparency */
+#define         X509_V_ERR_NO_VALID_SCTS                        71
+
+#define         X509_V_ERR_PROXY_SUBJECT_NAME_VIOLATION         72
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/openssl/bio.h b/tools/sdk/esp32s3/include/openssl/include/openssl/bio.h
new file mode 100644
index 00000000000..1fc049b6500
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/openssl/bio.h
@@ -0,0 +1,179 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _OPENSSL_BIO_H
+#define _OPENSSL_BIO_H
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* These are the 'types' of BIOs */
+#define BIO_TYPE_NONE 0
+#define BIO_TYPE_MEM (1 | 0x0400)
+#define BIO_TYPE_BIO (19 | 0x0400)        /* (half a) BIO pair */
+
+/* Bio object flags */
+#define BIO_FLAGS_READ		0x01
+#define BIO_FLAGS_WRITE		0x02
+
+#define BIO_should_read(a)		BIO_test_flags(a, BIO_FLAGS_READ)
+#define BIO_should_write(a)		BIO_test_flags(a, BIO_FLAGS_WRITE)
+
+typedef struct bio_st BIO;
+typedef struct bio_method_st BIO_METHOD;
+
+/**
+ * @brief Create a BIO object as a file type
+ * Current implementation return NULL as file types are discouraged on ESP platform
+ *
+ * @param filename Filename
+ * @param mode Mode
+ *
+ * @return BIO object
+ */
+BIO *BIO_new_file(const char *filename, const char *mode);
+
+/**
+ * @brief Create a BIO object as a membuf type
+ * Current implementation takes a shallow copy of the buffer
+ *
+ * @param buf Pointer to the buffer
+ * @param len Length of the buffer
+ *
+ * @return BIO object
+ */
+BIO *BIO_new_mem_buf(void *buf, int len);
+
+/**
+ * @brief create a BIO object
+ *
+ * @param method - pointer to BIO_METHOD
+ *
+ * @return pointer to BIO object
+ */
+BIO *BIO_new(BIO_METHOD * method);
+
+/**
+ * @brief get the memory BIO method function
+ */
+void *BIO_s_mem(void);
+
+/**
+ * @brief free a BIO  object
+ *
+ * @param x - pointer to BIO object
+ */
+void BIO_free(BIO *b);
+
+/**
+ * @brief Create a connected pair of BIOs bio1, bio2 with write buffer sizes writebuf1 and writebuf2
+ *
+ * @param out1    pointer to BIO1
+ * @param writebuf1    write size of BIO1 (0 means default size will be used)
+ * @param out2    pointer to BIO2
+ * @param writebuf2    write size of BIO2 (0 means default size will be used)
+ *
+ * @return result
+ *      0 : failed
+ *      1 : OK
+ */
+int BIO_new_bio_pair(BIO **out1, size_t writebuf1, BIO **out2, size_t writebuf2);
+
+/**
+ * @brief Write data to BIO
+ *
+ * BIO_TYPE_BIO behaves the same way as OpenSSL bio object, other BIO types mock
+ * this functionality to avoid excessive allocation/copy, so the 'data' cannot
+ * be freed after the function is called, it should remain valid until BIO object is in use.
+ *
+ * @param b    - pointer to BIO
+ * @param data - pointer to data
+ * @param dlen - data bytes
+ *
+ * @return result
+ *      -1, 0 : failed
+ *      1 : OK
+ */
+int BIO_write(BIO *b, const void *data, int dlen);
+
+/**
+ * @brief Read data from BIO
+ *
+ * BIO_TYPE_BIO behaves the same way as OpenSSL bio object.
+ * Other types just hold pointer
+ *
+ * @param b    - pointer to BIO
+ * @param data - pointer to data
+ * @param dlen - data bytes
+ *
+ * @return result
+ *      -1, 0 : failed
+ *      1 : OK
+ */
+int BIO_read(BIO *bio, void *data, int len);
+
+/**
+ * @brief Get number of pending characters in the BIOs write buffers.
+ *
+ * @param b Pointer to BIO
+ *
+ * @return Amount of pending data
+ */
+size_t BIO_wpending(const BIO *bio);
+
+/**
+ * @brief Get number of pending characters in the BIOs read buffers.
+ *
+ * @param b Pointer to BIO
+ *
+ * @return Amount of pending data
+ */
+size_t BIO_ctrl_pending(const BIO *bio);
+
+/**
+ * @brief Get the maximum length of data that can be currently written to the BIO
+ *
+ * @param b Pointer to BIO
+ *
+ * @return Max length of writable data
+ */
+size_t BIO_ctrl_get_write_guarantee(BIO *bio);
+
+/**
+ * @brief Returns the type of a BIO.
+ *
+ * @param b Pointer to BIO
+ *
+ * @return Type of the BIO object
+ */
+int BIO_method_type(const BIO *b);
+
+/**
+ * @brief Test flags of a BIO.
+ *
+ * @param b Pointer to BIO
+ * @param flags Flags
+ *
+ * @return BIO object flags masked with the supplied flags
+ */
+int  BIO_test_flags(const BIO *b, int flags);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_OPENSSL_BIO_H
diff --git a/tools/sdk/esp32s3/include/openssl/include/openssl/err.h b/tools/sdk/esp32s3/include/openssl/include/openssl/err.h
new file mode 100644
index 00000000000..f4247a4a7cc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/openssl/err.h
@@ -0,0 +1,228 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _OPENSSL_ERR_H
+#define _OPENSSL_ERR_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @note This file contains a very simple implementation of error stack
+ * for ESP APIs stubs to OpenSSL
+ */
+
+#define OPENSSL_PUT_SYSTEM_ERROR() \
+  ERR_put_error(ERR_LIB_SYS, 0, 0, __FILE__, __LINE__);
+
+#define OPENSSL_PUT_LIB_ERROR(lib, code) \
+  ERR_put_error(lib, 0, code, __FILE__, __LINE__);
+
+#define ERR_GET_LIB(packed_error) ((int)(((packed_error) >> 24) & 0xff))
+#define ERR_GET_REASON(packed_error) ((int)((packed_error) & 0xffff))
+#define ERR_R_PEM_LIB ERR_LIB_PEM
+/* inherent openssl errors */
+# define ERR_R_FATAL                             64
+# define ERR_R_MALLOC_FAILURE                    (1|ERR_R_FATAL)
+# define ERR_R_SHOULD_NOT_HAVE_BEEN_CALLED       (2|ERR_R_FATAL)
+# define ERR_R_PASSED_NULL_PARAMETER             (3|ERR_R_FATAL)
+# define ERR_R_INTERNAL_ERROR                    (4|ERR_R_FATAL)
+# define ERR_R_DISABLED                          (5|ERR_R_FATAL)
+# define ERR_R_INIT_FAIL                         (6|ERR_R_FATAL)
+# define ERR_R_PASSED_INVALID_ARGUMENT           (7)
+# define ERR_R_OPERATION_FAIL                    (8|ERR_R_FATAL)
+# define ERR_R_INVALID_PROVIDER_FUNCTIONS        (9|ERR_R_FATAL)
+# define ERR_R_INTERRUPTED_OR_CANCELLED          (10)
+
+enum {
+    ERR_LIB_NONE = 1,
+    ERR_LIB_SYS,
+    ERR_LIB_BN,
+    ERR_LIB_RSA,
+    ERR_LIB_DH,
+    ERR_LIB_EVP,
+    ERR_LIB_BUF,
+    ERR_LIB_OBJ,
+    ERR_LIB_PEM,
+    ERR_LIB_DSA,
+    ERR_LIB_X509,
+    ERR_LIB_ASN1,
+    ERR_LIB_CONF,
+    ERR_LIB_CRYPTO,
+    ERR_LIB_EC,
+    ERR_LIB_SSL,
+    ERR_LIB_BIO,
+    ERR_LIB_PKCS7,
+    ERR_LIB_PKCS8,
+    ERR_LIB_X509V3,
+    ERR_LIB_RAND,
+    ERR_LIB_ENGINE,
+    ERR_LIB_OCSP,
+    ERR_LIB_UI,
+    ERR_LIB_COMP,
+    ERR_LIB_ECDSA,
+    ERR_LIB_ECDH,
+    ERR_LIB_HMAC,
+    ERR_LIB_DIGEST,
+    ERR_LIB_CIPHER,
+    ERR_LIB_HKDF,
+    ERR_LIB_USER,
+    ERR_NUM_LIBS
+};
+
+/**
+ * @brief clear the SSL error code
+ *
+ * @param none
+ *
+ * @return none
+ */
+void ERR_clear_error(void);
+
+/**
+ * @brief get the current SSL error code
+ *
+ * @param none
+ *
+ * @return current SSL error number
+ */
+uint32_t ERR_get_error(void);
+
+/**
+ * @brief peek the current SSL error code, not clearing it
+ *
+ * @param none
+ *
+ * @return current SSL error number
+ */
+uint32_t ERR_peek_error(void);
+
+/**
+ * @brief peek the last SSL error code, not clearing it
+ *
+ * @param none
+ *
+ * @return current SSL error number
+ */
+uint32_t ERR_peek_last_error(void);
+
+/**
+ * @brief register the SSL error strings
+ *
+ * @param none
+ *
+ * @return none
+ */
+void ERR_load_SSL_strings(void);
+
+/**
+ * @brief clear the SSL error code
+ *
+ * @param none
+ *
+ * @return none
+ */
+void ERR_clear_error(void);
+
+/**
+ * @brief peek the current SSL error code, not clearing it
+ *
+ * @param none
+ *
+ * @return current SSL error number
+ */
+uint32_t ERR_peek_error(void);
+
+/**
+ * @brief peek the last SSL error code, not clearing it
+ *
+ * @param none
+ *
+ * @return current SSL error number
+ */
+uint32_t ERR_peek_last_error(void);
+
+/**
+ * @brief capture the current error to the error structure
+ *
+ * @param library Related library
+ * @param unused Not used (used for compliant function prototype)
+ * @param reason The actual error code
+ * @param file File name of the error report
+ * @param line Line number of the error report
+ *
+ */
+void ERR_put_error(int library, int unused, int reason, const char *file, unsigned line);
+
+/**
+ * @brief Peek the current SSL error, not clearing it
+ *
+ * @param file file name of the reported error
+ * @param line line number of the reported error
+ * @param data Associated data to the reported error
+ * @param flags Flags associated to the error
+ *
+ * @return current SSL error number
+ */
+uint32_t ERR_peek_error_line_data(const char **file, int *line,
+                                  const char **data, int *flags);
+
+/**
+ * @brief Get the current SSL error
+ *
+ * @param file file name of the reported error
+ * @param line line number of the reported error
+ * @param data Associated data to the reported error
+ * @param flags Flags associated to the error
+ *
+ * @return current SSL error number
+ */
+uint32_t ERR_get_error_line_data(const char **file, int *line,
+                                  const char **data, int *flags);
+
+/**
+ * @brief API provided as a declaration only
+ *
+ */
+void SSL_load_error_strings(void);
+
+/**
+ * @brief API provided as a declaration only
+ *
+ */
+void ERR_free_strings(void);
+
+/**
+ * @brief API provided as a declaration only
+ *
+ */
+void ERR_remove_state(unsigned long pid);
+
+/**
+ * @brief Returns error string -- Not implemented
+ *
+ * @param packed_error Packed error code
+ *
+ * @return NULL
+ */
+const char *ERR_reason_error_string(uint32_t packed_error);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _OPENSSL_ERR_H
diff --git a/tools/sdk/esp32s3/include/openssl/include/openssl/ssl.h b/tools/sdk/esp32s3/include/openssl/include/openssl/ssl.h
new file mode 100644
index 00000000000..f63d5f46ca4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/openssl/ssl.h
@@ -0,0 +1,1900 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#if !defined(ESP_OPENSSL_SUPPRESS_LEGACY_WARNING)
+#warning "OpenSSL component will be removed from ESP-IDF in v5.0, please use esp_tls instead"
+#endif
+
+#ifndef _SSL_H_
+#define _SSL_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "internal/ssl_x509.h"
+#include "internal/ssl_pkey.h"
+#include "openssl/bio.h"
+#include "openssl/err.h"
+
+/*
+{
+*/
+
+#define SSL_CB_ALERT 0x4000
+
+#define X509_CHECK_FLAG_ALWAYS_CHECK_SUBJECT		(1 << 0)
+#define X509_CHECK_FLAG_NO_WILDCARDS			(1 << 1)
+#define X509_CHECK_FLAG_NO_PARTIAL_WILDCARDS		(1 << 2)
+#define X509_CHECK_FLAG_MULTI_LABEL_WILDCARDS		(1 << 3)
+#define X509_CHECK_FLAG_SINGLE_LABEL_SUBDOMAINS		(1 << 4)
+
+/**
+ * @brief create a SSL context
+ *
+ * @param method - the SSL context method point
+ *
+ * @return the context point
+ */
+SSL_CTX* SSL_CTX_new(const SSL_METHOD *method);
+
+/**
+ * @brief free a SSL context
+ *
+ * @param method - the SSL context point
+ *
+ * @return none
+ */
+void SSL_CTX_free(SSL_CTX *ctx);
+
+/**
+ * @brief create a SSL
+ *
+ * @param ctx - the SSL context point
+ *
+ * @return the SSL point
+ */
+SSL* SSL_new(SSL_CTX *ctx);
+
+/**
+ * @brief free the SSL
+ *
+ * @param ssl - the SSL point
+ *
+ * @return none
+ */
+void SSL_free(SSL *ssl);
+
+/**
+ * @brief connect to the remote SSL server
+ *
+ * @param ssl - the SSL point
+ *
+ * @return result
+ *     1 : OK
+ *    -1 : failed
+ */
+int SSL_connect(SSL *ssl);
+
+/**
+ * @brief accept the remote connection
+ *
+ * @param ssl - the SSL point
+ *
+ * @return result
+ *     1 : OK
+ *    -1 : failed
+ */
+int SSL_accept(SSL *ssl);
+
+/**
+ * @brief read data from to remote
+ *
+ * @param ssl    - the SSL point which has been connected
+ * @param buffer - the received data buffer point
+ * @param len    - the received data length
+ *
+ * @return result
+ *     > 0 : OK, and return received data bytes
+ *     = 0 : connection is closed
+ *     < 0 : an error catch
+ */
+int SSL_read(SSL *ssl, void *buffer, int len);
+
+/**
+ * @brief send the data to remote
+ *
+ * @param ssl    - the SSL point which has been connected
+ * @param buffer - the send data buffer point
+ * @param len    - the send data length
+ *
+ * @return result
+ *     > 0 : OK, and return sent data bytes
+ *     = 0 : connection is closed
+ *     < 0 : an error catch
+ */
+int SSL_write(SSL *ssl, const void *buffer, int len);
+
+/**
+ * @brief get the verifying result of the SSL certification
+ *
+ * @param ssl - the SSL point
+ *
+ * @return the result of verifying
+ */
+long SSL_get_verify_result(const SSL *ssl);
+
+/**
+ * @brief shutdown the connection
+ *
+ * @param ssl - the SSL point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : shutdown is not finished
+ *    -1 : an error catch
+ */
+int SSL_shutdown(SSL *ssl);
+
+/**
+ * @brief bind the socket file description into the SSL
+ *
+ * @param ssl - the SSL point
+ * @param fd  - socket handle
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_set_fd(SSL *ssl, int fd);
+
+/**
+ * @brief Set the hostname for SNI
+ *
+ * @param ssl - the SSL context point
+ * @param hostname  - pointer to the hostname
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_set_tlsext_host_name(SSL* ssl, const char *hostname);
+
+/**
+ * @brief These functions load the private key into the SSL_CTX or SSL object
+ *
+ * @param ctx  - the SSL context point
+ * @param pkey - private key object point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_PrivateKey(SSL_CTX *ctx, EVP_PKEY *pkey);
+
+/**
+ * @brief These functions load the certification into the SSL_CTX or SSL object
+ *
+ * @param ctx  - the SSL context point
+ * @param pkey - certification object point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_certificate(SSL_CTX *ctx, X509 *x);
+
+/**
+ * @brief create the target SSL context client method
+ *
+ * @param none
+ *
+ * @return the SSLV2.3 version SSL context client method
+ */
+const SSL_METHOD* SSLv23_client_method(void);
+
+/**
+ * @brief create the target SSL context client method
+ *
+ * @param none
+ *
+ * @return the TLSV1.0 version SSL context client method
+ */
+const SSL_METHOD* TLSv1_client_method(void);
+
+/**
+ * @brief create the target SSL context client method
+ *
+ * @param none
+ *
+ * @return the SSLV1.0 version SSL context client method
+ */
+const SSL_METHOD* SSLv3_client_method(void);
+
+/**
+ * @brief create the target SSL context client method
+ *
+ * @param none
+ *
+ * @return the TLSV1.1 version SSL context client method
+ */
+const SSL_METHOD* TLSv1_1_client_method(void);
+
+/**
+ * @brief create the target SSL context client method
+ *
+ * @param none
+ *
+ * @return the TLSV1.2 version SSL context client method
+ */
+const SSL_METHOD* TLSv1_2_client_method(void);
+
+/**
+ * @brief create the target SSL context server method
+ *
+ * @param none
+ *
+ * @return the TLS any version SSL context client method
+ */
+const SSL_METHOD* TLS_client_method(void);
+
+/**
+ * @brief create the target SSL context server method
+ *
+ * @param none
+ *
+ * @return the SSLV2.3 version SSL context server method
+ */
+const SSL_METHOD* SSLv23_server_method(void);
+
+/**
+ * @brief create the target SSL context server method
+ *
+ * @param none
+ *
+ * @return the TLSV1.1 version SSL context server method
+ */
+const SSL_METHOD* TLSv1_1_server_method(void);
+
+/**
+ * @brief create the target SSL context server method
+ *
+ * @param none
+ *
+ * @return the TLSV1.2 version SSL context server method
+ */
+const SSL_METHOD* TLSv1_2_server_method(void);
+
+/**
+ * @brief create the target SSL context server method
+ *
+ * @param none
+ *
+ * @return the TLSV1.0 version SSL context server method
+ */
+const SSL_METHOD* TLSv1_server_method(void);
+
+/**
+ * @brief create the target SSL context server method
+ *
+ * @param none
+ *
+ * @return the SSLV3.0 version SSL context server method
+ */
+const SSL_METHOD* SSLv3_server_method(void);
+
+/**
+ * @brief create the target SSL context server method
+ *
+ * @param none
+ *
+ * @return the TLS any version SSL context server method
+ */
+const SSL_METHOD* TLS_server_method(void);
+
+/**
+ * @brief create the target SSL context method
+ *
+ * @return the TLS any version SSL context method
+ */
+const SSL_METHOD* TLS_method(void);
+
+/**
+ * @brief create the target SSL context method
+ *
+ * @return the TLS1.2 version SSL context method
+ */
+const SSL_METHOD* TLSv1_2_method(void);
+
+/**
+ * @brief create the target SSL context method
+ *
+ * @return the TLS1.1 version SSL context method
+ */
+const SSL_METHOD* TLSv1_1_method(void);
+
+/**
+ * @brief create the target SSL context method
+ *
+ * @return the TLS1.0 version SSL context method
+ */
+const SSL_METHOD* TLSv1_method(void);
+
+/**
+ * @brief create the target SSL context method
+ *
+ * @return the SSLV3.0 version SSL context method
+ */
+const SSL_METHOD* SSLv3_method(void);
+
+/**
+ * @brief create the target SSL context method
+ *
+ * @param none
+ *
+ * @return the SSLV2.3 version SSL context method
+ */
+const SSL_METHOD* SSLv23_method(void);
+
+/**
+ * @brief Set minimum protocol version for defined context
+ *
+ * @param ctx SSL context
+ *
+ * @return 1 on success
+ */
+int SSL_CTX_set_min_proto_version(SSL_CTX *ctx, int version);
+
+/**
+ * @brief Set maximum protocol version for defined context
+ *
+ * @param ctx SSL context
+ *
+ * @return 1 on success
+ */
+int SSL_CTX_set_max_proto_version(SSL_CTX *ctx, int version);
+
+/**
+ * @brief set the SSL context ALPN select callback function
+ *
+ * @param ctx - SSL context point
+ * @param cb  - ALPN select callback function
+ * @param arg - ALPN select callback function entry private data point
+ *
+ * @return none
+ */
+void SSL_CTX_set_alpn_select_cb(SSL_CTX *ctx,
+                                int (*cb) (SSL *ssl,
+                                           const unsigned char **out,
+                                           unsigned char *outlen,
+                                           const unsigned char *in,
+                                           unsigned int inlen,
+                                           void *arg),
+                                void *arg);
+
+
+/**
+ * @brief set the SSL context ALPN select protocol
+ *
+ * @param ctx        - SSL context point
+ * @param protos     - ALPN protocol name
+ * @param protos_len - ALPN protocol name bytes
+ *
+ * @return result
+ *     0 : OK
+ *     1 : failed
+ */
+int SSL_CTX_set_alpn_protos(SSL_CTX *ctx, const unsigned char *protos, unsigned int protos_len);
+
+/**
+ * @brief set the SSL context next ALPN select callback function
+ *
+ * @param ctx - SSL context point
+ * @param cb  - ALPN select callback function
+ * @param arg - ALPN select callback function entry private data point
+ *
+ * @return none
+ */
+void SSL_CTX_set_next_proto_select_cb(SSL_CTX *ctx,
+                                      int (*cb) (SSL *ssl,
+                                                 unsigned char **out,
+                                                 unsigned char *outlen,
+                                                 const unsigned char *in,
+                                                 unsigned int inlen,
+                                                 void *arg),
+                                      void *arg);
+
+/**
+ * @brief initialize the SSL library
+ *
+ * @param none
+ *
+ * @return none
+ */
+void SSL_library_init(void);
+
+/**
+ * @brief generates a human-readable string representing the error code e
+ *        and store it into the "ret" point memory
+ *
+ * @param e   - error code
+ * @param ret - memory point to store the string
+ *
+ * @return the result string point
+ */
+char *ERR_error_string(unsigned long e, char *ret);
+
+/**
+ * @brief add the SSL context option
+ *
+ * @param ctx - SSL context point
+ * @param opt - new SSL context option
+ *
+ * @return the SSL context option
+ */
+unsigned long SSL_CTX_set_options(SSL_CTX *ctx, unsigned long opt);
+
+/**
+ * @brief add the SSL context mode
+ *
+ * @param ctx - SSL context point
+ * @param mod - new SSL context mod
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_set_mode(SSL_CTX *ctx, int mod);
+
+/*
+}
+*/
+
+/**
+ * @brief perform the SSL handshake
+ *
+ * @param ssl - SSL point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ *    -1 : a error catch
+ */
+int SSL_do_handshake(SSL *ssl);
+
+/**
+ * @brief get the SSL current version
+ *
+ * @param ssl - SSL point
+ *
+ * @return the version string
+ */
+const char *SSL_get_version(const SSL *ssl);
+
+/**
+ * @brief set  the SSL context version
+ *
+ * @param ctx  - SSL context point
+ * @param meth - SSL method point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_set_ssl_version(SSL_CTX *ctx, const SSL_METHOD *meth);
+
+/**
+ * @brief get the bytes numbers which are to be read
+ *
+ * @param ssl  - SSL point
+ *
+ * @return bytes number
+ */
+int SSL_pending(const SSL *ssl);
+
+/**
+ * @brief check if SSL want nothing
+ *
+ * @param ssl - SSL point
+ *
+ * @return result
+ *     0 : false
+ *     1 : true
+ */
+int SSL_want_nothing(const SSL *ssl);
+
+/**
+ * @brief check if SSL want to read
+ *
+ * @param ssl - SSL point
+ *
+ * @return result
+ *     0 : false
+ *     1 : true
+ */
+int SSL_want_read(const SSL *ssl);
+
+/**
+ * @brief check if SSL want to write
+ *
+ * @param ssl - SSL point
+ *
+ * @return result
+ *     0 : false
+ *     1 : true
+ */
+int SSL_want_write(const SSL *ssl);
+
+/**
+ * @brief get the SSL context current method
+ *
+ * @param ctx - SSL context point
+ *
+ * @return the SSL context current method
+ */
+const SSL_METHOD *SSL_CTX_get_ssl_method(SSL_CTX *ctx);
+
+/**
+ * @brief get the SSL current method
+ *
+ * @param ssl - SSL point
+ *
+ * @return the SSL current method
+ */
+const SSL_METHOD *SSL_get_ssl_method(SSL *ssl);
+
+/**
+ * @brief set the SSL method
+ *
+ * @param ssl  - SSL point
+ * @param meth - SSL method point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_set_ssl_method(SSL *ssl, const SSL_METHOD *method);
+
+/**
+ * @brief add CA client certification into the SSL
+ *
+ * @param ssl - SSL point
+ * @param x   - CA certification point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_add_client_CA(SSL *ssl, X509 *x);
+
+/**
+ * @brief add CA client certification into the SSL context
+ *
+ * @param ctx - SSL context point
+ * @param x   - CA certification point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_add_client_CA(SSL_CTX *ctx, X509 *x);
+
+/**
+ * @brief set the SSL CA certification list
+ *
+ * @param ssl       - SSL point
+ * @param name_list - CA certification list
+ *
+ * @return none
+ */
+void SSL_set_client_CA_list(SSL *ssl, STACK_OF(X509_NAME) *name_list);
+
+/**
+ * @brief set the SSL context CA certification list
+ *
+ * @param ctx       - SSL context point
+ * @param name_list - CA certification list
+ *
+ * @return none
+ */
+void SSL_CTX_set_client_CA_list(SSL_CTX *ctx, STACK_OF(X509_NAME) *name_list);
+
+/**
+ * @briefget the SSL CA certification list
+ *
+ * @param ssl - SSL point
+ *
+ * @return CA certification list
+ */
+STACK_OF(X509_NAME) *SSL_get_client_CA_list(const SSL *ssl);
+
+/**
+ * @brief get the SSL context CA certification list
+ *
+ * @param ctx - SSL context point
+ *
+ * @return CA certification list
+ */
+STACK_OF(X509_NAME) *SSL_CTX_get_client_CA_list(const SSL_CTX *ctx);
+
+/**
+ * @brief get the SSL certification point
+ *
+ * @param ssl - SSL point
+ *
+ * @return SSL certification point
+ */
+X509 *SSL_get_certificate(const SSL *ssl);
+
+/**
+ * @brief get the SSL private key point
+ *
+ * @param ssl - SSL point
+ *
+ * @return SSL private key point
+ */
+EVP_PKEY *SSL_get_privatekey(const SSL *ssl);
+
+/**
+ * @brief set the SSL information callback function
+ *
+ * @param ssl - SSL point
+ * @param cb  - information callback function
+ *
+ * @return none
+ */
+void SSL_set_info_callback(SSL *ssl, void (*cb) (const SSL *ssl, int type, int val));
+
+/**
+ * @brief get the SSL state
+ *
+ * @param ssl - SSL point
+ *
+ * @return SSL state
+ */
+OSSL_HANDSHAKE_STATE SSL_get_state(const SSL *ssl);
+
+/**
+ * @brief set the SSL context read buffer length
+ *
+ * @param ctx - SSL context point
+ * @param len - read buffer length
+ *
+ * @return none
+ */
+void SSL_CTX_set_default_read_buffer_len(SSL_CTX *ctx, size_t len);
+
+/**
+ * @brief set the SSL read buffer length
+ *
+ * @param ssl - SSL point
+ * @param len - read buffer length
+ *
+ * @return none
+ */
+void SSL_set_default_read_buffer_len(SSL *ssl, size_t len);
+
+/**
+ * @brief set the SSL security level
+ *
+ * @param ssl   - SSL point
+ * @param level - security level
+ *
+ * @return none
+ */
+void SSL_set_security_level(SSL *ssl, int level);
+
+/**
+ * @brief get the SSL security level
+ *
+ * @param ssl - SSL point
+ *
+ * @return security level
+ */
+int SSL_get_security_level(const SSL *ssl);
+
+/**
+ * @brief get the SSL verifying mode of the SSL context
+ *
+ * @param ctx - SSL context point
+ *
+ * @return verifying mode
+ */
+int SSL_CTX_get_verify_mode(const SSL_CTX *ctx);
+
+/**
+ * @brief get the SSL verifying depth of the SSL context
+ *
+ * @param ctx - SSL context point
+ *
+ * @return verifying depth
+ */
+int SSL_CTX_get_verify_depth(const SSL_CTX *ctx);
+
+/**
+ * @brief set the SSL context verifying of the SSL context
+ *
+ * @param ctx             - SSL context point
+ * @param mode            - verifying mode
+ * @param verify_callback - verifying callback function
+ *
+ * @return none
+ */
+void SSL_CTX_set_verify(SSL_CTX *ctx, int mode, int (*verify_callback)(int, X509_STORE_CTX *));
+
+/**
+ * @brief set the SSL verifying of the SSL context
+ *
+ * @param ctx             - SSL point
+ * @param mode            - verifying mode
+ * @param verify_callback - verifying callback function
+ *
+ * @return none
+ */
+void SSL_set_verify(SSL *s, int mode, int (*verify_callback)(int, X509_STORE_CTX *));
+
+/**
+ * @brief set the SSL verify depth of the SSL context
+ *
+ * @param ctx   - SSL context point
+ * @param depth - verifying depth
+ *
+ * @return none
+ */
+void SSL_CTX_set_verify_depth(SSL_CTX *ctx, int depth);
+
+/**
+ * @brief certification verifying callback function
+ *
+ * @param preverify_ok - verifying result
+ * @param x509_ctx     - X509 certification point
+ *
+ * @return verifying result
+ */
+int verify_callback(int preverify_ok, X509_STORE_CTX *x509_ctx);
+
+/**
+ * @brief set the session timeout time
+ *
+ * @param ctx - SSL context point
+ * @param t   - new session timeout time
+ *
+ * @return old session timeout time
+ */
+long SSL_CTX_set_timeout(SSL_CTX *ctx, long t);
+
+/**
+ * @brief get the session timeout time
+ *
+ * @param ctx - SSL context point
+ *
+ * @return current session timeout time
+ */
+long SSL_CTX_get_timeout(const SSL_CTX *ctx);
+
+/**
+ * @brief set the SSL context cipher through the list string
+ *
+ * @param ctx - SSL context point
+ * @param str - cipher controller list string
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_set_cipher_list(SSL_CTX *ctx, const char *str);
+
+/**
+ * @brief set the SSL cipher through the list string
+ *
+ * @param ssl - SSL point
+ * @param str - cipher controller list string
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_set_cipher_list(SSL *ssl, const char *str);
+
+/**
+ * @brief get the SSL cipher list string
+ *
+ * @param ssl - SSL point
+ *
+ * @return cipher controller list string
+ */
+const char *SSL_get_cipher_list(const SSL *ssl, int n);
+
+/**
+ * @brief get the SSL cipher
+ *
+ * @param ssl - SSL point
+ *
+ * @return current cipher
+ */
+const SSL_CIPHER *SSL_get_current_cipher(const SSL *ssl);
+
+/**
+ * @brief get the SSL cipher string
+ *
+ * @param ssl - SSL point
+ *
+ * @return cipher string
+ */
+const char *SSL_get_cipher(const SSL *ssl);
+
+/**
+ * @brief get the SSL context object X509 certification storage
+ *
+ * @param ctx - SSL context point
+ *
+ * @return x509 certification storage
+ */
+X509_STORE *SSL_CTX_get_cert_store(const SSL_CTX *ctx);
+
+/**
+ * @brief set the SSL context object X509 certification store
+ *
+ * @param ctx   - SSL context point
+ * @param store - X509 certification store
+ *
+ * @return none
+ */
+void SSL_CTX_set_cert_store(SSL_CTX *ctx, X509_STORE *store);
+
+/**
+ * @brief get the SSL specifical statement
+ *
+ * @param ssl - SSL point
+ *
+ * @return specifical statement
+ */
+int SSL_want(const SSL *ssl);
+
+/**
+ * @brief check if the SSL is SSL_X509_LOOKUP state
+ *
+ * @param ssl - SSL point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_want_x509_lookup(const SSL *ssl);
+
+/**
+ * @brief reset the SSL
+ *
+ * @param ssl - SSL point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_clear(SSL *ssl);
+
+/**
+ * @brief get the socket handle of the SSL
+ *
+ * @param ssl - SSL point
+ *
+ * @return result
+ *     >= 0 : yes, and return socket handle
+ *      < 0 : a error catch
+ */
+int SSL_get_fd(const SSL *ssl);
+
+/**
+ * @brief get the read only socket handle of the SSL
+ *
+ * @param ssl - SSL point
+ *
+ * @return result
+ *     >= 0 : yes, and return socket handle
+ *      < 0 : a error catch
+ */
+int SSL_get_rfd(const SSL *ssl);
+
+/**
+ * @brief get the write only socket handle of the SSL
+ *
+ * @param ssl - SSL point
+ *
+ * @return result
+ *     >= 0 : yes, and return socket handle
+ *      < 0 : a error catch
+ */
+int SSL_get_wfd(const SSL *ssl);
+
+/**
+ * @brief set the SSL if we can read as many as data
+ *
+ * @param ssl - SSL point
+ * @param yes - enable the function
+ *
+ * @return none
+ */
+void SSL_set_read_ahead(SSL *s, int yes);
+
+/**
+ * @brief set the SSL context if we can read as many as data
+ *
+ * @param ctx - SSL context point
+ * @param yes - enbale the function
+ *
+ * @return none
+ */
+void SSL_CTX_set_read_ahead(SSL_CTX *ctx, int yes);
+
+/**
+ * @brief get the SSL ahead signal if we can read as many as data
+ *
+ * @param ssl - SSL point
+ *
+ * @return SSL context ahead signal
+ */
+int SSL_get_read_ahead(const SSL *ssl);
+
+/**
+ * @brief get the SSL context ahead signal if we can read as many as data
+ *
+ * @param ctx - SSL context point
+ *
+ * @return SSL context ahead signal
+ */
+long SSL_CTX_get_read_ahead(SSL_CTX *ctx);
+
+/**
+ * @brief check if some data can be read
+ *
+ * @param ssl - SSL point
+ *
+ * @return
+ *         1 : there are bytes to be read
+ *         0 : no data
+ */
+int SSL_has_pending(const SSL *ssl);
+
+/**
+ * @brief load the X509 certification into SSL context
+ *
+ * @param ctx - SSL context point
+ * @param x   - X509 certification point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_certificate(SSL_CTX *ctx, X509 *x);//loads the certificate x into ctx
+
+/**
+ * @brief load the ASN1 certification into SSL context
+ *
+ * @param ctx - SSL context point
+ * @param len - certification length
+ * @param d   - data point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_certificate_ASN1(SSL_CTX *ctx, int len, const unsigned char *d);
+
+/**
+ * @brief load the certification file into SSL context
+ *
+ * @param ctx  - SSL context point
+ * @param file - certification file name
+ * @param type - certification encoding type
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_certificate_file(SSL_CTX *ctx, const char *file, int type);
+
+/**
+ * @brief load the certification chain file into SSL context
+ *
+ * @param ctx  - SSL context point
+ * @param file - certification chain file name
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_certificate_chain_file(SSL_CTX *ctx, const char *file);
+
+
+/**
+ * @brief load the ASN1 private key into SSL context
+ *
+ * @param ctx - SSL context point
+ * @param d   - data point
+ * @param len - private key length
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_PrivateKey_ASN1(int pk, SSL_CTX *ctx, const unsigned char *d,  long len);//adds the private key of type pk stored at memory location d (length len) to ctx
+
+/**
+ * @brief load the private key file into SSL context
+ *
+ * @param ctx  - SSL context point
+ * @param file - private key file name
+ * @param type - private key encoding type
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_PrivateKey_file(SSL_CTX *ctx, const char *file, int type);
+
+/**
+ * @brief load the RSA private key into SSL context
+ *
+ * @param ctx - SSL context point
+ * @param x   - RSA private key point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_RSAPrivateKey(SSL_CTX *ctx, RSA *rsa);
+
+/**
+ * @brief load the RSA ASN1 private key into SSL context
+ *
+ * @param ctx - SSL context point
+ * @param d   - data point
+ * @param len - RSA private key length
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_RSAPrivateKey_ASN1(SSL_CTX *ctx, const unsigned char *d, long len);
+
+/**
+ * @brief load the RSA private key file into SSL context
+ *
+ * @param ctx  - SSL context point
+ * @param file - RSA private key file name
+ * @param type - private key encoding type
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_RSAPrivateKey_file(SSL_CTX *ctx, const char *file, int type);
+
+
+/**
+ * @brief check if the private key and certification is matched
+ *
+ * @param ctx  - SSL context point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_check_private_key(const SSL_CTX *ctx);
+
+/**
+ * @brief set the SSL context server information
+ *
+ * @param ctx               - SSL context point
+ * @param serverinfo        - server information string
+ * @param serverinfo_length - server information length
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_serverinfo(SSL_CTX *ctx, const unsigned char *serverinfo, size_t serverinfo_length);
+
+/**
+ * @brief load  the SSL context server infomation file into SSL context
+ *
+ * @param ctx  - SSL context point
+ * @param file - server information file
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_serverinfo_file(SSL_CTX *ctx, const char *file);
+
+/**
+ * @brief SSL select next function
+ *
+ * @param out        - point of output data point
+ * @param outlen     - output data length
+ * @param in         - input data
+ * @param inlen      - input data length
+ * @param client     - client data point
+ * @param client_len -client data length
+ *
+ * @return NPN state
+ *         OPENSSL_NPN_UNSUPPORTED : not support
+ *         OPENSSL_NPN_NEGOTIATED  : negotiated
+ *         OPENSSL_NPN_NO_OVERLAP  : no overlap
+ */
+int SSL_select_next_proto(unsigned char **out, unsigned char *outlen,
+                          const unsigned char *in, unsigned int inlen,
+                          const unsigned char *client, unsigned int client_len);
+
+/**
+ * @brief load the extra certification chain into the SSL context
+ *
+ * @param ctx  - SSL context point
+ * @param x509 - X509 certification
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+long SSL_CTX_add_extra_chain_cert(SSL_CTX *ctx, X509 *);
+
+/**
+ * @brief control the SSL context
+ *
+ * @param ctx  - SSL context point
+ * @param cmd  - command
+ * @param larg - parameter length
+ * @param parg - parameter point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+long SSL_CTX_ctrl(SSL_CTX *ctx, int cmd, long larg, char *parg);
+
+/**
+ * @brief get the SSL context cipher
+ *
+ * @param ctx - SSL context point
+ *
+ * @return SSL context cipher
+ */
+STACK *SSL_CTX_get_ciphers(const SSL_CTX *ctx);
+
+/**
+ * @brief check if the SSL context can read as many as data
+ *
+ * @param ctx - SSL context point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+long SSL_CTX_get_default_read_ahead(SSL_CTX *ctx);
+
+/**
+ * @brief get the SSL context extra data
+ *
+ * @param ctx - SSL context point
+ * @param idx - index
+ *
+ * @return data point
+ */
+char *SSL_CTX_get_ex_data(const SSL_CTX *ctx, int idx);
+
+/**
+ * @brief get the SSL context quiet shutdown option
+ *
+ * @param ctx - SSL context point
+ *
+ * @return quiet shutdown option
+ */
+int SSL_CTX_get_quiet_shutdown(const SSL_CTX *ctx);
+
+/**
+ * @brief load the SSL context CA file
+ *
+ * @param ctx    - SSL context point
+ * @param CAfile - CA certification file
+ * @param CApath - CA certification file path
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_load_verify_locations(SSL_CTX *ctx, const char *CAfile, const char *CApath);
+
+/**
+ * @brief add SSL context reference count by '1'
+ *
+ * @param ctx - SSL context point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_up_ref(SSL_CTX *ctx);
+
+/**
+ * @brief set SSL context application private data
+ *
+ * @param ctx - SSL context point
+ * @param arg - private data
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_set_app_data(SSL_CTX *ctx, void *arg);
+
+/**
+ * @brief set SSL context client certification callback function
+ *
+ * @param ctx - SSL context point
+ * @param cb  - callback function
+ *
+ * @return none
+ */
+void SSL_CTX_set_client_cert_cb(SSL_CTX *ctx, int (*cb)(SSL *ssl, X509 **x509, EVP_PKEY **pkey));
+
+/**
+ * @brief set the SSL context if we can read as many as data
+ *
+ * @param ctx - SSL context point
+ * @param m   - enable the fuction
+ *
+ * @return none
+ */
+void SSL_CTX_set_default_read_ahead(SSL_CTX *ctx, int m);
+
+/**
+ * @brief set SSL context default verifying path
+ *
+ * @param ctx - SSL context point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_set_default_verify_paths(SSL_CTX *ctx);
+
+/**
+ * @brief set SSL context default verifying directory
+ *
+ * @param ctx - SSL context point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_set_default_verify_dir(SSL_CTX *ctx);
+
+/**
+ * @brief set SSL context default verifying file
+ *
+ * @param ctx - SSL context point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_set_default_verify_file(SSL_CTX *ctx);
+
+/**
+ * @brief set SSL context extra data
+ *
+ * @param ctx - SSL context point
+ * @param idx - data index
+ * @param arg - data point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_set_ex_data(SSL_CTX *s, int idx, char *arg);
+
+/**
+ * @brief clear the SSL context option bit of "op"
+ *
+ * @param ctx - SSL context point
+ * @param op  - option
+ *
+ * @return SSL context option
+ */
+unsigned long SSL_CTX_clear_options(SSL_CTX *ctx, unsigned long op);
+
+/**
+ * @brief get the SSL context option
+ *
+ * @param ctx - SSL context point
+ * @param op  - option
+ *
+ * @return SSL context option
+ */
+unsigned long SSL_CTX_get_options(SSL_CTX *ctx);
+
+/**
+ * @brief set the SSL context quiet shutdown mode
+ *
+ * @param ctx  - SSL context point
+ * @param mode - mode
+ *
+ * @return none
+ */
+void SSL_CTX_set_quiet_shutdown(SSL_CTX *ctx, int mode);
+
+/**
+ * @brief get the SSL context X509 certification
+ *
+ * @param ctx - SSL context point
+ *
+ * @return X509 certification
+ */
+X509 *SSL_CTX_get0_certificate(const SSL_CTX *ctx);
+
+/**
+ * @brief get the SSL context private key
+ *
+ * @param ctx - SSL context point
+ *
+ * @return private key
+ */
+EVP_PKEY *SSL_CTX_get0_privatekey(const SSL_CTX *ctx);
+
+/**
+ * @brief set SSL context PSK identity hint
+ *
+ * @param ctx  - SSL context point
+ * @param hint - PSK identity hint
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_CTX_use_psk_identity_hint(SSL_CTX *ctx, const char *hint);
+
+/**
+ * @brief set SSL context PSK server callback function
+ *
+ * @param ctx      - SSL context point
+ * @param callback - callback function
+ *
+ * @return none
+ */
+void SSL_CTX_set_psk_server_callback(SSL_CTX *ctx,
+                                     unsigned int (*callback)(SSL *ssl,
+                                                              const char *identity,
+                                                              unsigned char *psk,
+                                                              int max_psk_len));
+/**
+ * @brief get alert description string
+ *
+ * @param value - alert value
+ *
+ * @return alert description string
+ */
+const char *SSL_alert_desc_string(int value);
+
+/**
+ * @brief get alert description long string
+ *
+ * @param value - alert value
+ *
+ * @return alert description long string
+ */
+const char *SSL_alert_desc_string_long(int value);
+
+/**
+ * @brief get alert type string
+ *
+ * @param value - alert value
+ *
+ * @return alert type string
+ */
+const char *SSL_alert_type_string(int value);
+
+/**
+ * @brief get alert type long string
+ *
+ * @param value - alert value
+ *
+ * @return alert type long string
+ */
+const char *SSL_alert_type_string_long(int value);
+
+/**
+ * @brief get SSL context of the SSL
+ *
+ * @param ssl - SSL point
+ *
+ * @return SSL context
+ */
+SSL_CTX *SSL_get_SSL_CTX(const SSL *ssl);
+
+/**
+ * @brief get SSL application data
+ *
+ * @param ssl - SSL point
+ *
+ * @return application data
+ */
+void *SSL_get_app_data(SSL *ssl);
+
+/**
+ * @brief get SSL error code
+ *
+ * @param ssl       - SSL point
+ * @param ret_code  - SSL return code
+ *
+ * @return SSL error number
+ */
+int SSL_get_error(const SSL *ssl, int ret_code);
+
+/**
+ * @brief get SSL cipher bits
+ *
+ * @param ssl - SSL point
+ * @param alg_bits - algorithm bits
+ *
+ * @return strength bits
+ */
+int SSL_get_cipher_bits(const SSL *ssl, int *alg_bits);
+
+/**
+ * @brief get SSL cipher name
+ *
+ * @param ssl - SSL point
+ *
+ * @return SSL cipher name
+ */
+char *SSL_get_cipher_name(const SSL *ssl);
+
+/**
+ * @brief get SSL cipher version
+ *
+ * @param ssl - SSL point
+ *
+ * @return SSL cipher version
+ */
+char *SSL_get_cipher_version(const SSL *ssl);
+
+/**
+ * @brief get SSL extra data
+ *
+ * @param ssl - SSL point
+ * @param idx - data index
+ *
+ * @return extra data
+ */
+char *SSL_get_ex_data(const SSL *ssl, int idx);
+
+/**
+ * @brief get index of the SSL extra data X509 storage context
+ *
+ * @param none
+ *
+ * @return data index
+ */
+int SSL_get_ex_data_X509_STORE_CTX_idx(void);
+
+/**
+ * @brief get peer certification chain
+ *
+ * @param ssl - SSL point
+ *
+ * @return certification chain
+ */
+STACK *SSL_get_peer_cert_chain(const SSL *ssl);
+
+/**
+ * @brief get peer certification
+ *
+ * @param ssl - SSL point
+ *
+ * @return certification
+ */
+X509 *SSL_get_peer_certificate(const SSL *ssl);
+
+/**
+ * @brief get SSL quiet shutdown mode
+ *
+ * @param ssl - SSL point
+ *
+ * @return quiet shutdown mode
+ */
+int SSL_get_quiet_shutdown(const SSL *ssl);
+
+/**
+ * @brief get SSL read only IO handle
+ *
+ * @param ssl - SSL point
+ *
+ * @return IO handle
+ */
+BIO *SSL_get_rbio(const SSL *ssl);
+
+/**
+ * @brief get SSL shared ciphers
+ *
+ * @param ssl - SSL point
+ * @param buf - buffer to store the ciphers
+ * @param len - buffer len
+ *
+ * @return shared ciphers
+ */
+char *SSL_get_shared_ciphers(const SSL *ssl, char *buf, int len);
+
+/**
+ * @brief get SSL shutdown mode
+ *
+ * @param ssl - SSL point
+ *
+ * @return shutdown mode
+ */
+int SSL_get_shutdown(const SSL *ssl);
+
+/**
+ * @brief get SSL session time
+ *
+ * @param ssl - SSL point
+ *
+ * @return session time
+ */
+long SSL_get_time(const SSL *ssl);
+
+/**
+ * @brief get SSL session timeout time
+ *
+ * @param ssl - SSL point
+ *
+ * @return session timeout time
+ */
+long SSL_get_timeout(const SSL *ssl);
+
+/**
+ * @brief get SSL verifying mode
+ *
+ * @param ssl - SSL point
+ *
+ * @return verifying mode
+ */
+int SSL_get_verify_mode(const SSL *ssl);
+
+/**
+ * @brief get SSL verify parameters
+ *
+ * @param ssl - SSL point
+ *
+ * @return verify parameters
+ */
+X509_VERIFY_PARAM *SSL_get0_param(SSL *ssl);
+
+/**
+ * @brief set expected hostname the peer cert CN should have
+ *
+ * @param param - verify parameters from SSL_get0_param()
+ *
+ * @param name - the expected hostname
+ *
+ * @param namelen - the length of the hostname, or 0 if NUL terminated
+ *
+ * @return verify parameters
+ */
+int X509_VERIFY_PARAM_set1_host(X509_VERIFY_PARAM *param,
+                                const char *name, size_t namelen);
+
+/**
+ * @brief set parameters for X509 host verify action
+ *
+ * @param param -verify parameters from SSL_get0_param()
+ *
+ * @param flags - bitfield of X509_CHECK_FLAG_... parameters to set
+ *
+ * @return 1 for success, 0 for failure
+ */
+int X509_VERIFY_PARAM_set_hostflags(X509_VERIFY_PARAM *param,
+                    unsigned long flags);
+
+/**
+ * @brief clear parameters for X509 host verify action
+ *
+ * @param param -verify parameters from SSL_get0_param()
+ *
+ * @param flags - bitfield of X509_CHECK_FLAG_... parameters to clear
+ *
+ * @return 1 for success, 0 for failure
+ */
+int X509_VERIFY_PARAM_clear_hostflags(X509_VERIFY_PARAM *param,
+                      unsigned long flags);
+
+/**
+ * @brief get SSL write only IO handle
+ *
+ * @param ssl - SSL point
+ *
+ * @return IO handle
+ */
+BIO *SSL_get_wbio(const SSL *ssl);
+
+/**
+ * @brief load SSL client CA certification file
+ *
+ * @param file - file name
+ *
+ * @return certification loading object
+ */
+STACK *SSL_load_client_CA_file(const char *file);
+
+/**
+ * @brief add SSL reference by '1'
+ *
+ * @param ssl - SSL point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_up_ref(SSL *ssl);
+
+/**
+ * @brief read and put data into buf, but not clear the SSL low-level storage
+ *
+ * @param ssl - SSL point
+ * @param buf - storage buffer point
+ * @param num - data bytes
+ *
+ * @return result
+ *     > 0 : OK, and return read bytes
+ *     = 0 : connect is closed
+ *     < 0 : a error catch
+ */
+int SSL_peek(SSL *ssl, void *buf, int num);
+
+/**
+ * @brief make SSL renegotiate
+ *
+ * @param ssl - SSL point
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_renegotiate(SSL *ssl);
+
+/**
+ * @brief get the state string where SSL is reading
+ *
+ * @param ssl - SSL point
+ *
+ * @return state string
+ */
+const char *SSL_rstate_string(SSL *ssl);
+
+/**
+ * @brief get the statement long string where SSL is reading
+ *
+ * @param ssl - SSL point
+ *
+ * @return statement long string
+ */
+const char *SSL_rstate_string_long(SSL *ssl);
+
+/**
+ * @brief set SSL accept statement
+ *
+ * @param ssl - SSL point
+ *
+ * @return none
+ */
+void SSL_set_accept_state(SSL *ssl);
+
+/**
+ * @brief set SSL application data
+ *
+ * @param ssl - SSL point
+ * @param arg - SSL application data point
+ *
+ * @return none
+ */
+void SSL_set_app_data(SSL *ssl, void *arg);
+
+/**
+ * @brief set SSL BIO
+ *
+ * @param ssl  - SSL point
+ * @param rbio - read only IO
+ * @param wbio - write only IO
+ *
+ * @return none
+ */
+void SSL_set_bio(SSL *ssl, BIO *rbio, BIO *wbio);
+
+/**
+ * @brief clear SSL option
+ *
+ * @param ssl - SSL point
+ * @param op  - clear option
+ *
+ * @return SSL option
+ */
+unsigned long SSL_clear_options(SSL *ssl, unsigned long op);
+
+/**
+ * @brief get SSL option
+ *
+ * @param ssl - SSL point
+ *
+ * @return SSL option
+ */
+unsigned long SSL_get_options(SSL *ssl);
+
+/**
+ * @brief clear SSL option
+ *
+ * @param ssl - SSL point
+ * @param op  - setting option
+ *
+ * @return SSL option
+ */
+unsigned long SSL_set_options(SSL *ssl, unsigned long op);
+
+/**
+ * @brief set SSL quiet shutdown mode
+ *
+ * @param ssl  - SSL point
+ * @param mode - quiet shutdown mode
+ *
+ * @return none
+ */
+void SSL_set_quiet_shutdown(SSL *ssl, int mode);
+
+/**
+ * @brief set SSL shutdown mode
+ *
+ * @param ssl  - SSL point
+ * @param mode - shutdown mode
+ *
+ * @return none
+ */
+void SSL_set_shutdown(SSL *ssl, int mode);
+
+/**
+ * @brief set SSL session time
+ *
+ * @param ssl - SSL point
+ * @param t   - session time
+ *
+ * @return session time
+ */
+void SSL_set_time(SSL *ssl, long t);
+
+/**
+ * @brief set SSL session timeout time
+ *
+ * @param ssl - SSL point
+ * @param t   - session timeout time
+ *
+ * @return session timeout time
+ */
+void SSL_set_timeout(SSL *ssl, long t);
+
+/**
+ * @brief get SSL statement string
+ *
+ * @param ssl - SSL point
+ *
+ * @return SSL statement string
+ */
+const char *SSL_state_string(const SSL *ssl);
+
+/**
+ * @brief get SSL statement long string
+ *
+ * @param ssl - SSL point
+ *
+ * @return SSL statement long string
+ */
+char *SSL_state_string_long(const SSL *ssl);
+
+/**
+ * @brief get SSL renegotiation count
+ *
+ * @param ssl - SSL point
+ *
+ * @return renegotiation count
+ */
+long SSL_total_renegotiations(SSL *ssl);
+
+/**
+ * @brief get SSL version
+ *
+ * @param ssl - SSL point
+ *
+ * @return SSL version
+ */
+int SSL_version(const SSL *ssl);
+
+/**
+ * @brief set SSL PSK identity hint
+ *
+ * @param ssl  - SSL point
+ * @param hint - identity hint
+ *
+ * @return result
+ *     1 : OK
+ *     0 : failed
+ */
+int SSL_use_psk_identity_hint(SSL *ssl, const char *hint);
+
+/**
+ * @brief get SSL PSK identity hint
+ *
+ * @param ssl - SSL point
+ *
+ * @return identity hint
+ */
+const char *SSL_get_psk_identity_hint(SSL *ssl);
+
+/**
+ * @brief get SSL PSK identity
+ *
+ * @param ssl - SSL point
+ *
+ * @return identity
+ */
+const char *SSL_get_psk_identity(SSL *ssl);
+
+/**
+ * @brief set the SSL verify depth of the SSL
+ *
+ * @param ssl - SSL context
+ * @param depth - Depth level to verify
+ *
+ */
+void SSL_set_verify_depth(SSL *ssl, int depth);
+
+/**
+ * @brief Get default verify callback
+ *
+ * @param ctx             - SSL context
+ * @return verify_callback - verifying callback function
+ *
+ */
+openssl_verify_callback SSL_CTX_get_verify_callback(const SSL_CTX *ctx);
+
+/**
+ * @brief Get default verify callback
+ *
+ * @param ctx             - SSL context
+ * @return verify_callback - verifying callback function
+ *
+ */
+openssl_verify_callback SSL_get_verify_callback(const SSL *s);
+
+/**
+ * @brief Frees RSA object
+ *
+ * Current implementation calls directly EVP_PKEY free
+ *
+ * @param r RSA object
+ *
+ */
+void RSA_free(RSA *r);
+
+/**
+ * @brief Sets SSL mode, partially implemented
+ *
+ * @param ssl SSL context
+ *
+ * @return the new mode bitmask after adding mode
+ */
+uint32_t SSL_set_mode(SSL *ssl, uint32_t mode);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/platform/ssl_opt.h b/tools/sdk/esp32s3/include/openssl/include/platform/ssl_opt.h
new file mode 100644
index 00000000000..a9c55e8c469
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/platform/ssl_opt.h
@@ -0,0 +1,20 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL_OPT_H_
+#define _SSL_OPT_H_
+
+#include "sdkconfig.h"
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/platform/ssl_pm.h b/tools/sdk/esp32s3/include/openssl/include/platform/ssl_pm.h
new file mode 100644
index 00000000000..f028a0cee88
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/platform/ssl_pm.h
@@ -0,0 +1,63 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL_PM_H_
+#define _SSL_PM_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include <string.h>
+#include "ssl_types.h"
+#include "ssl_port.h"
+
+#define LOCAL_ATRR
+
+int ssl_pm_new(SSL *ssl);
+void ssl_pm_free(SSL *ssl);
+
+int ssl_pm_handshake(SSL *ssl);
+int ssl_pm_shutdown(SSL *ssl);
+int ssl_pm_clear(SSL *ssl);
+
+int ssl_pm_read(SSL *ssl, void *buffer, int len);
+int ssl_pm_send(SSL *ssl, const void *buffer, int len);
+int ssl_pm_pending(const SSL *ssl);
+
+void ssl_pm_set_fd(SSL *ssl, int fd, int mode);
+int ssl_pm_get_fd(const SSL *ssl, int mode);
+
+void ssl_pm_set_hostname(SSL *ssl, const char *hostname);
+
+OSSL_HANDSHAKE_STATE ssl_pm_get_state(const SSL *ssl);
+
+void ssl_pm_set_bufflen(SSL *ssl, int len);
+
+int x509_pm_show_info(X509 *x);
+int x509_pm_new(X509 *x, X509 *m_x);
+void x509_pm_free(X509 *x);
+int x509_pm_load(X509 *x, const unsigned char *buffer, int len);
+
+int pkey_pm_new(EVP_PKEY *pk, EVP_PKEY *m_pk);
+void pkey_pm_free(EVP_PKEY *pk);
+int pkey_pm_load(EVP_PKEY *pk, const unsigned char *buffer, int len);
+
+long ssl_pm_get_verify_result(const SSL *ssl);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/openssl/include/platform/ssl_port.h b/tools/sdk/esp32s3/include/openssl/include/platform/ssl_port.h
new file mode 100644
index 00000000000..492ea405b2e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/openssl/include/platform/ssl_port.h
@@ -0,0 +1,45 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SSL_PORT_H_
+#define _SSL_PORT_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "esp_types.h"
+#include "esp_log.h"
+#include "string.h"
+#include "malloc.h"
+
+void *ssl_mem_zalloc(size_t size);
+
+#define ssl_mem_malloc malloc
+#define ssl_mem_free   free
+
+#define ssl_memcpy     memcpy
+#define ssl_strlen     strlen
+
+#define ssl_speed_up_enter()
+#define ssl_speed_up_exit()
+
+#define SSL_DEBUG_FL
+#define SSL_DEBUG_LOG(fmt, ...) ESP_LOGI("openssl", fmt, ##__VA_ARGS__)
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/perfmon/include/perfmon.h b/tools/sdk/esp32s3/include/perfmon/include/perfmon.h
new file mode 100644
index 00000000000..4c23bd5be70
--- /dev/null
+++ b/tools/sdk/esp32s3/include/perfmon/include/perfmon.h
@@ -0,0 +1,29 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _PERF_MON_H_
+#define _PERF_MON_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_log.h"
+
+#include "xtensa_perfmon_access.h"
+#include "xtensa_perfmon_masks.h"
+#include "xtensa_perfmon_apis.h"
+#include "xtensa/xt_perf_consts.h"
+
+#endif // _PERF_MON_H_
diff --git a/tools/sdk/esp32s3/include/perfmon/include/xtensa_perfmon_access.h b/tools/sdk/esp32s3/include/perfmon/include/xtensa_perfmon_access.h
new file mode 100644
index 00000000000..301b6e8baef
--- /dev/null
+++ b/tools/sdk/esp32s3/include/perfmon/include/xtensa_perfmon_access.h
@@ -0,0 +1,125 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _PERF_MON_ACCESS_H_
+#define _PERF_MON_ACCESS_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_log.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief      Init Performance Monitoor
+ *
+ * Initialize performance monitor register with define values
+ *
+ * @param[in] id: performance counter number
+ * @param[in] select: select value from PMCTRLx register
+ * @param[in] mask: mask value from PMCTRLx register
+ * @param[in] kernelcnt: kernelcnt value from PMCTRLx register
+ * @param[in] tracelevel: tracelevel value from PMCTRLx register
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if one of the arguments is not correct
+ */
+esp_err_t xtensa_perfmon_init(int id, uint16_t select, uint16_t mask, int kernelcnt, int tracelevel);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Reset PM counter
+ *
+ * Reset PM counter. Writes 0 to the PMx register.
+ *
+ * @param[in] id: performance counter number
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if id out of range
+ */
+esp_err_t xtensa_perfmon_reset(int id);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Start PM counters
+ *
+ * Start all PM counters synchronously. Write 1 to the PGM register
+ */
+void xtensa_perfmon_start(void);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Stop PM counters
+ *
+ * Stop all PM counters synchronously. Write 0 to the PGM register
+ */
+void xtensa_perfmon_stop(void);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Read PM counter
+ *
+ * Read value of defined PM counter.
+ *
+ * @param[in] id: performance counter number
+ *
+ * @return
+ *      - Performance counter value
+ */
+uint32_t xtensa_perfmon_value(int id);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Read PM overflow state
+ *
+ * Read overflow value of defined PM counter.
+ *
+ * @param[in] id: performance counter number
+ *
+ * @return
+ *      - ESP_OK if there is no overflow (overflow = 0)
+ *      - ESP_FAIL if overflow occure (overflow = 1)
+ */
+esp_err_t xtensa_perfmon_overflow(int id);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Dump PM values
+ *
+ * Dump all PM register to the console.
+ *
+ */
+void xtensa_perfmon_dump(void);
+/**@}*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _PERF_MON_ACCESS_H_
diff --git a/tools/sdk/esp32s3/include/perfmon/include/xtensa_perfmon_apis.h b/tools/sdk/esp32s3/include/perfmon/include/xtensa_perfmon_apis.h
new file mode 100644
index 00000000000..0b52f2ce801
--- /dev/null
+++ b/tools/sdk/esp32s3/include/perfmon/include/xtensa_perfmon_apis.h
@@ -0,0 +1,80 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _xtensa_perfmon_apis_H_
+#define _xtensa_perfmon_apis_H_
+#include "xtensa_perfmon_access.h"
+#include "xtensa_perfmon_masks.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**
+ * @brief Performance monitor configuration structure
+ *
+ * Structure to configure performance counter to measure dedicated function
+ */
+typedef struct xtensa_perfmon_config {
+    int repeat_count;       /*!< how much times function will be called before the calback will be repeated */
+    float max_deviation;    /*!<  Difference between min and max counter number 0..1, 0 - no difference, 1 - not used */
+    void *call_params;      /*!<  This pointer will be passed to the call_function as a parameter */
+    void (*call_function)(void *params); /*!< pointer to the function that have to be called */
+    void (*callback)(void *params, uint32_t select, uint32_t mask, uint32_t value); /*!< pointer to the function that will be called with result parameters */
+    void *callback_params;  /*!<  parameter that will be passed to the callback */
+    int tracelevel;         /*!<  trace level for all counters.
+                                  In case of negative value, the filter will be ignored.
+                                  If it's >=0, then the perfmon will count only when interrupt level > tracelevel. It's useful to monitor interrupts. */
+    uint32_t  counters_size;/*!<  amount of counter in the list */
+    const uint32_t *select_mask;  /*!<  list of the select/mask parameters */
+} xtensa_perfmon_config_t;
+
+
+/**
+ * @brief      Execute PM
+ *
+ * Execute performance counter for dedicated function with defined parameters
+ *
+ * @param[in] config: pointer to the configuration structure
+ *
+ * @return
+ *      - ESP_OK if no errors
+ *      - ESP_ERR_INVALID_ARG if one of the required parameters not defined
+ *      - ESP_FAIL - counter overflow
+ */
+esp_err_t xtensa_perfmon_exec(const xtensa_perfmon_config_t *config);
+
+/**
+ * @brief      Dump PM results
+ *
+ * Callback to dump perfmon result to a FILE* stream specified in
+ * perfmon_config_t::callback_params. If callback_params is set to NULL, will print to stdout
+ *
+ * @param[in] params:   used parameters passed from configuration (callback_params).
+ *                      This parameter expected as FILE* hanle, where data will be stored.
+ *                      If this parameter NULL, then data will be stored to the stdout.
+ * @param[in] select:   select value for current counter
+ * @param[in] mask:     mask value for current counter
+ * @param[in] value:    counter value for current counter
+ *
+ */
+void xtensa_perfmon_view_cb(void *params, uint32_t select, uint32_t mask, uint32_t value);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _xtensa_perfmon_apis_H_
diff --git a/tools/sdk/esp32s3/include/perfmon/include/xtensa_perfmon_masks.h b/tools/sdk/esp32s3/include/perfmon/include/xtensa_perfmon_masks.h
new file mode 100644
index 00000000000..4b3bf371d6c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/perfmon/include/xtensa_perfmon_masks.h
@@ -0,0 +1,74 @@
+
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _xtensa_perfmon_masks_H_
+#define _xtensa_perfmon_masks_H_
+#include <inttypes.h>
+#include "xtensa/xt_perf_consts.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief Description for select parameter
+ *
+ * Structure defines description for different select values for performance counters
+ */
+typedef struct xtensa_perfmon_select {
+    int select; /*!<  Selected counter */
+    const char *description; /*!<  Description for selected counter */
+} xtensa_perfmon_select_t;
+
+/**
+ * @brief Description for mask parameter
+ *
+ * Structure defines description for different select and mask values for performance counters
+ */
+typedef struct xtensa_perfmon_masks {
+    int select; /*!<  Selected counter */
+    int mask; /*!<  Selected mask for counter */
+    const char *description; /*!<  Description for selected mask */
+} xtensa_perfmon_masks_t;
+
+// Maximum amount of performance counter events
+#define MAX_PERFMON_EVENTS 119
+
+/**
+ * @brief Select value description table
+ *
+ * Table contains description for different 'select' values for performance counter
+ */
+extern const xtensa_perfmon_select_t xtensa_perfmon_select_table[];
+
+/**
+ * @brief Mask value description table
+ *
+ * Table contains description for different 'select' and 'mask' values for performance counter
+ */
+extern const xtensa_perfmon_masks_t xtensa_perfmon_masks_table[];
+
+/**
+ * @brief All available counters
+ *
+ * Table contains all available counters
+ */
+extern const uint32_t xtensa_perfmon_select_mask_all[MAX_PERFMON_EVENTS * 2];
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _xtensa_perfmon_masks_H_
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protobuf-c/protobuf-c.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protobuf-c/protobuf-c.h
new file mode 100755
index 00000000000..c8fa4fc2a7c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protobuf-c/protobuf-c.h
@@ -0,0 +1,1106 @@
+/*
+ * Copyright (c) 2008-2017, Dave Benson and the protobuf-c authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ *     * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following disclaimer
+ * in the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*! \file
+ * \mainpage Introduction
+ *
+ * This is [protobuf-c], a C implementation of [Protocol Buffers].
+ *
+ * This file defines the public API for the `libprotobuf-c` support library.
+ * This API includes interfaces that can be used directly by client code as well
+ * as the interfaces used by the code generated by the `protoc-c` compiler.
+ *
+ * The `libprotobuf-c` support library performs the actual serialization and
+ * deserialization of Protocol Buffers messages. It interacts with structures,
+ * definitions, and metadata generated by the `protoc-c` compiler from .proto
+ * files.
+ *
+ * \authors Dave Benson and the `protobuf-c` authors.
+ *
+ * \copyright 2008-2014. Licensed under the terms of the [BSD-2-Clause] license.
+ *
+ * [protobuf-c]:       https://github.com/protobuf-c/protobuf-c
+ * [Protocol Buffers]: https://developers.google.com/protocol-buffers/
+ * [BSD-2-Clause]:     http://opensource.org/licenses/BSD-2-Clause
+ *
+ * \page gencode Generated Code
+ *
+ * For each enum, we generate a C enum. For each message, we generate a C
+ * structure which can be cast to a `ProtobufCMessage`.
+ *
+ * For each enum and message, we generate a descriptor object that allows us to
+ * implement a kind of reflection on the structures.
+ *
+ * First, some naming conventions:
+ *
+ * - The name of the type for enums and messages and services is camel case
+ *   (meaning WordsAreCrammedTogether) except that double underscores are used
+ *   to delimit scopes. For example, the following `.proto` file:
+ *
+~~~{.proto}
+        package foo.bar;
+        message BazBah {
+            optional int32 val = 1;
+        }
+~~~
+ *
+ * would generate a C type `Foo__Bar__BazBah`.
+ *
+ * - Identifiers for functions and globals are all lowercase, with camel case
+ *   words separated by single underscores. For example, one of the function
+ *   prototypes generated by `protoc-c` for the above example:
+ *
+~~~{.c}
+Foo__Bar__BazBah *
+       foo__bar__baz_bah__unpack
+                     (ProtobufCAllocator  *allocator,
+                      size_t               len,
+                      const uint8_t       *data);
+~~~
+ *
+ * - Identifiers for enum values contain an uppercase prefix which embeds the
+ *   package name and the enum type name.
+ *
+ * - A double underscore is used to separate further components of identifier
+ *   names.
+ *
+ * For example, in the name of the unpack function above, the package name
+ * `foo.bar` has become `foo__bar`, the message name BazBah has become
+ * `baz_bah`, and the method name is `unpack`. These are all joined with double
+ * underscores to form the C identifier `foo__bar__baz_bah__unpack`.
+ *
+ * We also generate descriptor objects for messages and enums. These are
+ * declared in the `.pb-c.h` files:
+ *
+~~~{.c}
+extern const ProtobufCMessageDescriptor foo__bar__baz_bah__descriptor;
+~~~
+ *
+ * The message structures all begin with `ProtobufCMessageDescriptor *` which is
+ * sufficient to allow them to be cast to `ProtobufCMessage`.
+ *
+ * For each message defined in a `.proto` file, we generate a number of
+ * functions and macros. Each function name contains a prefix based on the
+ * package name and message name in order to make it a unique C identifier.
+ *
+ * - `INIT`. Statically initializes a message object, initializing its
+ *   descriptor and setting its fields to default values. Uninitialized
+ *   messages cannot be processed by the protobuf-c library.
+ *
+~~~{.c}
+#define FOO__BAR__BAZ_BAH__INIT \
+ { PROTOBUF_C_MESSAGE_INIT (&foo__bar__baz_bah__descriptor), 0 }
+~~~
+ * - `init()`. Initializes a message object, initializing its descriptor and
+ *   setting its fields to default values. Uninitialized messages cannot be
+ *   processed by the protobuf-c library.
+ *
+~~~{.c}
+void foo__bar__baz_bah__init
+                     (Foo__Bar__BazBah *message);
+~~~
+ * - `unpack()`. Unpacks data for a particular message format. Note that the
+ *   `allocator` parameter is usually `NULL` to indicate that the system's
+ *   `malloc()` and `free()` functions should be used for dynamically allocating
+ *   memory.
+ *
+~~~{.c}
+Foo__Bar__BazBah *
+       foo__bar__baz_bah__unpack
+                     (ProtobufCAllocator  *allocator,
+                      size_t               len,
+                      const uint8_t       *data);
+~~~
+ *
+ * - `free_unpacked()`. Frees a message object obtained with the `unpack()`
+ *   method. Freeing `NULL` is allowed (the same as with `free()`).
+ *
+~~~{.c}
+void   foo__bar__baz_bah__free_unpacked
+                     (Foo__Bar__BazBah *message,
+                      ProtobufCAllocator *allocator);
+~~~
+ *
+ * - `get_packed_size()`. Calculates the length in bytes of the serialized
+ *   representation of the message object.
+ *
+~~~{.c}
+size_t foo__bar__baz_bah__get_packed_size
+                     (const Foo__Bar__BazBah   *message);
+~~~
+ *
+ * - `pack()`. Pack a message object into a preallocated buffer. Assumes that
+ *   the buffer is large enough. (Use `get_packed_size()` first.)
+ *
+~~~{.c}
+size_t foo__bar__baz_bah__pack
+                     (const Foo__Bar__BazBah   *message,
+                      uint8_t             *out);
+~~~
+ *
+ * - `pack_to_buffer()`. Packs a message into a "virtual buffer". This is an
+ *   object which defines an "append bytes" callback to consume data as it is
+ *   serialized.
+ *
+~~~{.c}
+size_t foo__bar__baz_bah__pack_to_buffer
+                     (const Foo__Bar__BazBah   *message,
+                      ProtobufCBuffer     *buffer);
+~~~
+ *
+ * \page pack Packing and unpacking messages
+ *
+ * To pack a message, first compute the packed size of the message with
+ * protobuf_c_message_get_packed_size(), then allocate a buffer of at least
+ * that size, then call protobuf_c_message_pack().
+ *
+ * Alternatively, a message can be serialized without calculating the final size
+ * first. Use the protobuf_c_message_pack_to_buffer() function and provide a
+ * ProtobufCBuffer object which implements an "append" method that consumes
+ * data.
+ *
+ * To unpack a message, call the protobuf_c_message_unpack() function. The
+ * result can be cast to an object of the type that matches the descriptor for
+ * the message.
+ *
+ * The result of unpacking a message should be freed with
+ * protobuf_c_message_free_unpacked().
+ */
+
+#ifndef PROTOBUF_C_H
+#define PROTOBUF_C_H
+
+#include <assert.h>
+#include <limits.h>
+#include <stddef.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+# define PROTOBUF_C__BEGIN_DECLS	extern "C" {
+# define PROTOBUF_C__END_DECLS		}
+#else
+# define PROTOBUF_C__BEGIN_DECLS
+# define PROTOBUF_C__END_DECLS
+#endif
+
+PROTOBUF_C__BEGIN_DECLS
+
+#if defined(_WIN32) && defined(PROTOBUF_C_USE_SHARED_LIB)
+# ifdef PROTOBUF_C_EXPORT
+#  define PROTOBUF_C__API __declspec(dllexport)
+# else
+#  define PROTOBUF_C__API __declspec(dllimport)
+# endif
+#else
+# define PROTOBUF_C__API
+#endif
+
+#if !defined(PROTOBUF_C__NO_DEPRECATED) && \
+	((__GNUC__ > 3) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 1))
+# define PROTOBUF_C__DEPRECATED __attribute__((__deprecated__))
+#else
+# define PROTOBUF_C__DEPRECATED
+#endif
+
+#ifndef PROTOBUF_C__FORCE_ENUM_TO_BE_INT_SIZE
+ #define PROTOBUF_C__FORCE_ENUM_TO_BE_INT_SIZE(enum_name) \
+  , _##enum_name##_IS_INT_SIZE = INT_MAX
+#endif
+
+#define PROTOBUF_C__SERVICE_DESCRIPTOR_MAGIC    0x14159bc3
+#define PROTOBUF_C__MESSAGE_DESCRIPTOR_MAGIC    0x28aaeef9
+#define PROTOBUF_C__ENUM_DESCRIPTOR_MAGIC       0x114315af
+
+/* Empty string used for initializers */
+extern const char protobuf_c_empty_string[];
+
+/**
+ * \defgroup api Public API
+ *
+ * This is the public API for `libprotobuf-c`. These interfaces are stable and
+ * subject to Semantic Versioning guarantees.
+ *
+ * @{
+ */
+
+/**
+ * Values for the `flags` word in `ProtobufCFieldDescriptor`.
+ */
+typedef enum {
+	/** Set if the field is repeated and marked with the `packed` option. */
+	PROTOBUF_C_FIELD_FLAG_PACKED		= (1 << 0),
+
+	/** Set if the field is marked with the `deprecated` option. */
+	PROTOBUF_C_FIELD_FLAG_DEPRECATED	= (1 << 1),
+
+	/** Set if the field is a member of a oneof (union). */
+	PROTOBUF_C_FIELD_FLAG_ONEOF		= (1 << 2),
+} ProtobufCFieldFlag;
+
+/**
+ * Message field rules.
+ *
+ * \see [Defining A Message Type] in the Protocol Buffers documentation.
+ *
+ * [Defining A Message Type]:
+ *      https://developers.google.com/protocol-buffers/docs/proto#simple
+ */
+typedef enum {
+	/** A well-formed message must have exactly one of this field. */
+	PROTOBUF_C_LABEL_REQUIRED,
+
+	/**
+	 * A well-formed message can have zero or one of this field (but not
+	 * more than one).
+	 */
+	PROTOBUF_C_LABEL_OPTIONAL,
+
+	/**
+	 * This field can be repeated any number of times (including zero) in a
+	 * well-formed message. The order of the repeated values will be
+	 * preserved.
+	 */
+	PROTOBUF_C_LABEL_REPEATED,
+
+	/**
+	 * This field has no label. This is valid only in proto3 and is
+	 * equivalent to OPTIONAL but no "has" quantifier will be consulted.
+	 */
+	PROTOBUF_C_LABEL_NONE,
+} ProtobufCLabel;
+
+/**
+ * Field value types.
+ *
+ * \see [Scalar Value Types] in the Protocol Buffers documentation.
+ *
+ * [Scalar Value Types]:
+ *      https://developers.google.com/protocol-buffers/docs/proto#scalar
+ */
+typedef enum {
+	PROTOBUF_C_TYPE_INT32,      /**< int32 */
+	PROTOBUF_C_TYPE_SINT32,     /**< signed int32 */
+	PROTOBUF_C_TYPE_SFIXED32,   /**< signed int32 (4 bytes) */
+	PROTOBUF_C_TYPE_INT64,      /**< int64 */
+	PROTOBUF_C_TYPE_SINT64,     /**< signed int64 */
+	PROTOBUF_C_TYPE_SFIXED64,   /**< signed int64 (8 bytes) */
+	PROTOBUF_C_TYPE_UINT32,     /**< unsigned int32 */
+	PROTOBUF_C_TYPE_FIXED32,    /**< unsigned int32 (4 bytes) */
+	PROTOBUF_C_TYPE_UINT64,     /**< unsigned int64 */
+	PROTOBUF_C_TYPE_FIXED64,    /**< unsigned int64 (8 bytes) */
+	PROTOBUF_C_TYPE_FLOAT,      /**< float */
+	PROTOBUF_C_TYPE_DOUBLE,     /**< double */
+	PROTOBUF_C_TYPE_BOOL,       /**< boolean */
+	PROTOBUF_C_TYPE_ENUM,       /**< enumerated type */
+	PROTOBUF_C_TYPE_STRING,     /**< UTF-8 or ASCII string */
+	PROTOBUF_C_TYPE_BYTES,      /**< arbitrary byte sequence */
+	PROTOBUF_C_TYPE_MESSAGE,    /**< nested message */
+} ProtobufCType;
+
+/**
+ * Field wire types.
+ *
+ * \see [Message Structure] in the Protocol Buffers documentation.
+ *
+ * [Message Structure]:
+ *      https://developers.google.com/protocol-buffers/docs/encoding#structure
+ */
+typedef enum {
+	PROTOBUF_C_WIRE_TYPE_VARINT = 0,
+	PROTOBUF_C_WIRE_TYPE_64BIT = 1,
+	PROTOBUF_C_WIRE_TYPE_LENGTH_PREFIXED = 2,
+	/* "Start group" and "end group" wire types are unsupported. */
+	PROTOBUF_C_WIRE_TYPE_32BIT = 5,
+} ProtobufCWireType;
+
+struct ProtobufCAllocator;
+struct ProtobufCBinaryData;
+struct ProtobufCBuffer;
+struct ProtobufCBufferSimple;
+struct ProtobufCEnumDescriptor;
+struct ProtobufCEnumValue;
+struct ProtobufCEnumValueIndex;
+struct ProtobufCFieldDescriptor;
+struct ProtobufCIntRange;
+struct ProtobufCMessage;
+struct ProtobufCMessageDescriptor;
+struct ProtobufCMessageUnknownField;
+struct ProtobufCMethodDescriptor;
+struct ProtobufCService;
+struct ProtobufCServiceDescriptor;
+
+typedef struct ProtobufCAllocator ProtobufCAllocator;
+typedef struct ProtobufCBinaryData ProtobufCBinaryData;
+typedef struct ProtobufCBuffer ProtobufCBuffer;
+typedef struct ProtobufCBufferSimple ProtobufCBufferSimple;
+typedef struct ProtobufCEnumDescriptor ProtobufCEnumDescriptor;
+typedef struct ProtobufCEnumValue ProtobufCEnumValue;
+typedef struct ProtobufCEnumValueIndex ProtobufCEnumValueIndex;
+typedef struct ProtobufCFieldDescriptor ProtobufCFieldDescriptor;
+typedef struct ProtobufCIntRange ProtobufCIntRange;
+typedef struct ProtobufCMessage ProtobufCMessage;
+typedef struct ProtobufCMessageDescriptor ProtobufCMessageDescriptor;
+typedef struct ProtobufCMessageUnknownField ProtobufCMessageUnknownField;
+typedef struct ProtobufCMethodDescriptor ProtobufCMethodDescriptor;
+typedef struct ProtobufCService ProtobufCService;
+typedef struct ProtobufCServiceDescriptor ProtobufCServiceDescriptor;
+
+/** Boolean type. */
+typedef int protobuf_c_boolean;
+
+typedef void (*ProtobufCClosure)(const ProtobufCMessage *, void *closure_data);
+typedef void (*ProtobufCMessageInit)(ProtobufCMessage *);
+typedef void (*ProtobufCServiceDestroy)(ProtobufCService *);
+
+/**
+ * Structure for defining a custom memory allocator.
+ */
+struct ProtobufCAllocator {
+	/** Function to allocate memory. */
+	void		*(*alloc)(void *allocator_data, size_t size);
+
+	/** Function to free memory. */
+	void		(*free)(void *allocator_data, void *pointer);
+
+	/** Opaque pointer passed to `alloc` and `free` functions. */
+	void		*allocator_data;
+};
+
+/**
+ * Structure for the protobuf `bytes` scalar type.
+ *
+ * The data contained in a `ProtobufCBinaryData` is an arbitrary sequence of
+ * bytes. It may contain embedded `NUL` characters and is not required to be
+ * `NUL`-terminated.
+ */
+struct ProtobufCBinaryData {
+	size_t	len;        /**< Number of bytes in the `data` field. */
+	uint8_t	*data;      /**< Data bytes. */
+};
+
+/**
+ * Structure for defining a virtual append-only buffer. Used by
+ * protobuf_c_message_pack_to_buffer() to abstract the consumption of serialized
+ * bytes.
+ *
+ * `ProtobufCBuffer` "subclasses" may be defined on the stack. For example, to
+ * write to a `FILE` object:
+ *
+~~~{.c}
+typedef struct {
+        ProtobufCBuffer base;
+        FILE *fp;
+} BufferAppendToFile;
+
+static void
+my_buffer_file_append(ProtobufCBuffer *buffer,
+                      size_t len,
+                      const uint8_t *data)
+{
+        BufferAppendToFile *file_buf = (BufferAppendToFile *) buffer;
+        fwrite(data, len, 1, file_buf->fp); // XXX: No error handling!
+}
+~~~
+ *
+ * To use this new type of ProtobufCBuffer, it could be called as follows:
+ *
+~~~{.c}
+...
+BufferAppendToFile tmp = {0};
+tmp.base.append = my_buffer_file_append;
+tmp.fp = fp;
+protobuf_c_message_pack_to_buffer(&message, &tmp);
+...
+~~~
+ */
+struct ProtobufCBuffer {
+	/** Append function. Consumes the `len` bytes stored at `data`. */
+	void		(*append)(ProtobufCBuffer *buffer,
+				  size_t len,
+				  const uint8_t *data);
+};
+
+/**
+ * Simple buffer "subclass" of `ProtobufCBuffer`.
+ *
+ * A `ProtobufCBufferSimple` object is declared on the stack and uses a
+ * scratch buffer provided by the user for the initial allocation. It performs
+ * exponential resizing, using dynamically allocated memory. A
+ * `ProtobufCBufferSimple` object can be created and used as follows:
+ *
+~~~{.c}
+uint8_t pad[128];
+ProtobufCBufferSimple simple = PROTOBUF_C_BUFFER_SIMPLE_INIT(pad);
+ProtobufCBuffer *buffer = (ProtobufCBuffer *) &simple;
+~~~
+ *
+ * `buffer` can now be used with `protobuf_c_message_pack_to_buffer()`. Once a
+ * message has been serialized to a `ProtobufCBufferSimple` object, the
+ * serialized data bytes can be accessed from the `.data` field.
+ *
+ * To free the memory allocated by a `ProtobufCBufferSimple` object, if any,
+ * call PROTOBUF_C_BUFFER_SIMPLE_CLEAR() on the object, for example:
+ *
+~~~{.c}
+PROTOBUF_C_BUFFER_SIMPLE_CLEAR(&simple);
+~~~
+ *
+ * \see PROTOBUF_C_BUFFER_SIMPLE_INIT
+ * \see PROTOBUF_C_BUFFER_SIMPLE_CLEAR
+ */
+struct ProtobufCBufferSimple {
+	/** "Base class". */
+	ProtobufCBuffer		base;
+	/** Number of bytes allocated in `data`. */
+	size_t			alloced;
+	/** Number of bytes currently stored in `data`. */
+	size_t			len;
+	/** Data bytes. */
+	uint8_t			*data;
+	/** Whether `data` must be freed. */
+	protobuf_c_boolean	must_free_data;
+	/** Allocator to use. May be NULL to indicate the system allocator. */
+	ProtobufCAllocator	*allocator;
+};
+
+/**
+ * Describes an enumeration as a whole, with all of its values.
+ */
+struct ProtobufCEnumDescriptor {
+	/** Magic value checked to ensure that the API is used correctly. */
+	uint32_t			magic;
+
+	/** The qualified name (e.g., "namespace.Type"). */
+	const char			*name;
+	/** The unqualified name as given in the .proto file (e.g., "Type"). */
+	const char			*short_name;
+	/** Identifier used in generated C code. */
+	const char			*c_name;
+	/** The dot-separated namespace. */
+	const char			*package_name;
+
+	/** Number elements in `values`. */
+	unsigned			n_values;
+	/** Array of distinct values, sorted by numeric value. */
+	const ProtobufCEnumValue	*values;
+
+	/** Number of elements in `values_by_name`. */
+	unsigned			n_value_names;
+	/** Array of named values, including aliases, sorted by name. */
+	const ProtobufCEnumValueIndex	*values_by_name;
+
+	/** Number of elements in `value_ranges`. */
+	unsigned			n_value_ranges;
+	/** Value ranges, for faster lookups by numeric value. */
+	const ProtobufCIntRange		*value_ranges;
+
+	/** Reserved for future use. */
+	void				*reserved1;
+	/** Reserved for future use. */
+	void				*reserved2;
+	/** Reserved for future use. */
+	void				*reserved3;
+	/** Reserved for future use. */
+	void				*reserved4;
+};
+
+/**
+ * Represents a single value of an enumeration.
+ */
+struct ProtobufCEnumValue {
+	/** The string identifying this value in the .proto file. */
+	const char	*name;
+
+	/** The string identifying this value in generated C code. */
+	const char	*c_name;
+
+	/** The numeric value assigned in the .proto file. */
+	int		value;
+};
+
+/**
+ * Used by `ProtobufCEnumDescriptor` to look up enum values.
+ */
+struct ProtobufCEnumValueIndex {
+	/** Name of the enum value. */
+	const char      *name;
+	/** Index into values[] array. */
+	unsigned        index;
+};
+
+/**
+ * Describes a single field in a message.
+ */
+struct ProtobufCFieldDescriptor {
+	/** Name of the field as given in the .proto file. */
+	const char		*name;
+
+	/** Tag value of the field as given in the .proto file. */
+	uint32_t		id;
+
+	/** Whether the field is `REQUIRED`, `OPTIONAL`, or `REPEATED`. */
+	ProtobufCLabel		label;
+
+	/** The type of the field. */
+	ProtobufCType		type;
+
+	/**
+	 * The offset in bytes of the message's C structure's quantifier field
+	 * (the `has_MEMBER` field for optional members or the `n_MEMBER` field
+	 * for repeated members or the case enum for oneofs).
+	 */
+	unsigned		quantifier_offset;
+
+	/**
+	 * The offset in bytes into the message's C structure for the member
+	 * itself.
+	 */
+	unsigned		offset;
+
+	/**
+	 * A type-specific descriptor.
+	 *
+	 * If `type` is `PROTOBUF_C_TYPE_ENUM`, then `descriptor` points to the
+	 * corresponding `ProtobufCEnumDescriptor`.
+	 *
+	 * If `type` is `PROTOBUF_C_TYPE_MESSAGE`, then `descriptor` points to
+	 * the corresponding `ProtobufCMessageDescriptor`.
+	 *
+	 * Otherwise this field is NULL.
+	 */
+	const void		*descriptor; /* for MESSAGE and ENUM types */
+
+	/** The default value for this field, if defined. May be NULL. */
+	const void		*default_value;
+
+	/**
+	 * A flag word. Zero or more of the bits defined in the
+	 * `ProtobufCFieldFlag` enum may be set.
+	 */
+	uint32_t		flags;
+
+	/** Reserved for future use. */
+	unsigned		reserved_flags;
+	/** Reserved for future use. */
+	void			*reserved2;
+	/** Reserved for future use. */
+	void			*reserved3;
+};
+
+/**
+ * Helper structure for optimizing int => index lookups in the case
+ * where the keys are mostly consecutive values, as they presumably are for
+ * enums and fields.
+ *
+ * The data structures requires that the values in the original array are
+ * sorted.
+ */
+struct ProtobufCIntRange {
+	int             start_value;
+	unsigned        orig_index;
+	/*
+	 * NOTE: the number of values in the range can be inferred by looking
+	 * at the next element's orig_index. A dummy element is added to make
+	 * this simple.
+	 */
+};
+
+/**
+ * An instance of a message.
+ *
+ * `ProtobufCMessage` is a light-weight "base class" for all messages.
+ *
+ * In particular, `ProtobufCMessage` doesn't have any allocation policy
+ * associated with it. That's because it's common to create `ProtobufCMessage`
+ * objects on the stack. In fact, that's what we recommend for sending messages.
+ * If the object is allocated from the stack, you can't really have a memory
+ * leak.
+ *
+ * This means that calls to functions like protobuf_c_message_unpack() which
+ * return a `ProtobufCMessage` must be paired with a call to a free function,
+ * like protobuf_c_message_free_unpacked().
+ */
+struct ProtobufCMessage {
+	/** The descriptor for this message type. */
+	const ProtobufCMessageDescriptor	*descriptor;
+	/** The number of elements in `unknown_fields`. */
+	unsigned				n_unknown_fields;
+	/** The fields that weren't recognized by the parser. */
+	ProtobufCMessageUnknownField		*unknown_fields;
+};
+
+/**
+ * Describes a message.
+ */
+struct ProtobufCMessageDescriptor {
+	/** Magic value checked to ensure that the API is used correctly. */
+	uint32_t			magic;
+
+	/** The qualified name (e.g., "namespace.Type"). */
+	const char			*name;
+	/** The unqualified name as given in the .proto file (e.g., "Type"). */
+	const char			*short_name;
+	/** Identifier used in generated C code. */
+	const char			*c_name;
+	/** The dot-separated namespace. */
+	const char			*package_name;
+
+	/**
+	 * Size in bytes of the C structure representing an instance of this
+	 * type of message.
+	 */
+	size_t				sizeof_message;
+
+	/** Number of elements in `fields`. */
+	unsigned			n_fields;
+	/** Field descriptors, sorted by tag number. */
+	const ProtobufCFieldDescriptor	*fields;
+	/** Used for looking up fields by name. */
+	const unsigned			*fields_sorted_by_name;
+
+	/** Number of elements in `field_ranges`. */
+	unsigned			n_field_ranges;
+	/** Used for looking up fields by id. */
+	const ProtobufCIntRange		*field_ranges;
+
+	/** Message initialisation function. */
+	ProtobufCMessageInit		message_init;
+
+	/** Reserved for future use. */
+	void				*reserved1;
+	/** Reserved for future use. */
+	void				*reserved2;
+	/** Reserved for future use. */
+	void				*reserved3;
+};
+
+/**
+ * An unknown message field.
+ */
+struct ProtobufCMessageUnknownField {
+	/** The tag number. */
+	uint32_t		tag;
+	/** The wire type of the field. */
+	ProtobufCWireType	wire_type;
+	/** Number of bytes in `data`. */
+	size_t			len;
+	/** Field data. */
+	uint8_t			*data;
+};
+
+/**
+ * Method descriptor.
+ */
+struct ProtobufCMethodDescriptor {
+	/** Method name. */
+	const char				*name;
+	/** Input message descriptor. */
+	const ProtobufCMessageDescriptor	*input;
+	/** Output message descriptor. */
+	const ProtobufCMessageDescriptor	*output;
+};
+
+/**
+ * Service.
+ */
+struct ProtobufCService {
+	/** Service descriptor. */
+	const ProtobufCServiceDescriptor *descriptor;
+	/** Function to invoke the service. */
+	void (*invoke)(ProtobufCService *service,
+		       unsigned method_index,
+		       const ProtobufCMessage *input,
+		       ProtobufCClosure closure,
+		       void *closure_data);
+	/** Function to destroy the service. */
+	void (*destroy)(ProtobufCService *service);
+};
+
+/**
+ * Service descriptor.
+ */
+struct ProtobufCServiceDescriptor {
+	/** Magic value checked to ensure that the API is used correctly. */
+	uint32_t			magic;
+
+	/** Service name. */
+	const char			*name;
+	/** Short version of service name. */
+	const char			*short_name;
+	/** C identifier for the service name. */
+	const char			*c_name;
+	/** Package name. */
+	const char			*package;
+	/** Number of elements in `methods`. */
+	unsigned			n_methods;
+	/** Method descriptors, in the order defined in the .proto file. */
+	const ProtobufCMethodDescriptor	*methods;
+	/** Sort index of methods. */
+	const unsigned			*method_indices_by_name;
+};
+
+/**
+ * Get the version of the protobuf-c library. Note that this is the version of
+ * the library linked against, not the version of the headers compiled against.
+ *
+ * \return A string containing the version number of protobuf-c.
+ */
+PROTOBUF_C__API
+const char *
+protobuf_c_version(void);
+
+/**
+ * Get the version of the protobuf-c library. Note that this is the version of
+ * the library linked against, not the version of the headers compiled against.
+ *
+ * \return A 32 bit unsigned integer containing the version number of
+ *      protobuf-c, represented in base-10 as (MAJOR*1E6) + (MINOR*1E3) + PATCH.
+ */
+PROTOBUF_C__API
+uint32_t
+protobuf_c_version_number(void);
+
+/**
+ * The version of the protobuf-c headers, represented as a string using the same
+ * format as protobuf_c_version().
+ */
+#define PROTOBUF_C_VERSION		"1.3.0"
+
+/**
+ * The version of the protobuf-c headers, represented as an integer using the
+ * same format as protobuf_c_version_number().
+ */
+#define PROTOBUF_C_VERSION_NUMBER	1003000
+
+/**
+ * The minimum protoc-c version which works with the current version of the
+ * protobuf-c headers.
+ */
+#define PROTOBUF_C_MIN_COMPILER_VERSION	1000000
+
+/**
+ * Look up a `ProtobufCEnumValue` from a `ProtobufCEnumDescriptor` by name.
+ *
+ * \param desc
+ *      The `ProtobufCEnumDescriptor` object.
+ * \param name
+ *      The `name` field from the corresponding `ProtobufCEnumValue` object to
+ *      match.
+ * \return
+ *      A `ProtobufCEnumValue` object.
+ * \retval NULL
+ *      If not found or if the optimize_for = CODE_SIZE option was set.
+ */
+PROTOBUF_C__API
+const ProtobufCEnumValue *
+protobuf_c_enum_descriptor_get_value_by_name(
+	const ProtobufCEnumDescriptor *desc,
+	const char *name);
+
+/**
+ * Look up a `ProtobufCEnumValue` from a `ProtobufCEnumDescriptor` by numeric
+ * value.
+ *
+ * \param desc
+ *      The `ProtobufCEnumDescriptor` object.
+ * \param value
+ *      The `value` field from the corresponding `ProtobufCEnumValue` object to
+ *      match.
+ *
+ * \return
+ *      A `ProtobufCEnumValue` object.
+ * \retval NULL
+ *      If not found.
+ */
+PROTOBUF_C__API
+const ProtobufCEnumValue *
+protobuf_c_enum_descriptor_get_value(
+	const ProtobufCEnumDescriptor *desc,
+	int value);
+
+/**
+ * Look up a `ProtobufCFieldDescriptor` from a `ProtobufCMessageDescriptor` by
+ * the name of the field.
+ *
+ * \param desc
+ *      The `ProtobufCMessageDescriptor` object.
+ * \param name
+ *      The name of the field.
+ * \return
+ *      A `ProtobufCFieldDescriptor` object.
+ * \retval NULL
+ *      If not found or if the optimize_for = CODE_SIZE option was set.
+ */
+PROTOBUF_C__API
+const ProtobufCFieldDescriptor *
+protobuf_c_message_descriptor_get_field_by_name(
+	const ProtobufCMessageDescriptor *desc,
+	const char *name);
+
+/**
+ * Look up a `ProtobufCFieldDescriptor` from a `ProtobufCMessageDescriptor` by
+ * the tag value of the field.
+ *
+ * \param desc
+ *      The `ProtobufCMessageDescriptor` object.
+ * \param value
+ *      The tag value of the field.
+ * \return
+ *      A `ProtobufCFieldDescriptor` object.
+ * \retval NULL
+ *      If not found.
+ */
+PROTOBUF_C__API
+const ProtobufCFieldDescriptor *
+protobuf_c_message_descriptor_get_field(
+	const ProtobufCMessageDescriptor *desc,
+	unsigned value);
+
+/**
+ * Determine the number of bytes required to store the serialised message.
+ *
+ * \param message
+ *      The message object to serialise.
+ * \return
+ *      Number of bytes.
+ */
+PROTOBUF_C__API
+size_t
+protobuf_c_message_get_packed_size(const ProtobufCMessage *message);
+
+/**
+ * Serialise a message from its in-memory representation.
+ *
+ * This function stores the serialised bytes of the message in a pre-allocated
+ * buffer.
+ *
+ * \param message
+ *      The message object to serialise.
+ * \param[out] out
+ *      Buffer to store the bytes of the serialised message. This buffer must
+ *      have enough space to store the packed message. Use
+ *      protobuf_c_message_get_packed_size() to determine the number of bytes
+ *      required.
+ * \return
+ *      Number of bytes stored in `out`.
+ */
+PROTOBUF_C__API
+size_t
+protobuf_c_message_pack(const ProtobufCMessage *message, uint8_t *out);
+
+/**
+ * Serialise a message from its in-memory representation to a virtual buffer.
+ *
+ * This function calls the `append` method of a `ProtobufCBuffer` object to
+ * consume the bytes generated by the serialiser.
+ *
+ * \param message
+ *      The message object to serialise.
+ * \param buffer
+ *      The virtual buffer object.
+ * \return
+ *      Number of bytes passed to the virtual buffer.
+ */
+PROTOBUF_C__API
+size_t
+protobuf_c_message_pack_to_buffer(
+	const ProtobufCMessage *message,
+	ProtobufCBuffer *buffer);
+
+/**
+ * Unpack a serialised message into an in-memory representation.
+ *
+ * \param descriptor
+ *      The message descriptor.
+ * \param allocator
+ *      `ProtobufCAllocator` to use for memory allocation. May be NULL to
+ *      specify the default allocator.
+ * \param len
+ *      Length in bytes of the serialised message.
+ * \param data
+ *      Pointer to the serialised message.
+ * \return
+ *      An unpacked message object.
+ * \retval NULL
+ *      If an error occurred during unpacking.
+ */
+PROTOBUF_C__API
+ProtobufCMessage *
+protobuf_c_message_unpack(
+	const ProtobufCMessageDescriptor *descriptor,
+	ProtobufCAllocator *allocator,
+	size_t len,
+	const uint8_t *data);
+
+/**
+ * Free an unpacked message object.
+ *
+ * This function should be used to deallocate the memory used by a call to
+ * protobuf_c_message_unpack().
+ *
+ * \param message
+ *      The message object to free. May be NULL.
+ * \param allocator
+ *      `ProtobufCAllocator` to use for memory deallocation. May be NULL to
+ *      specify the default allocator.
+ */
+PROTOBUF_C__API
+void
+protobuf_c_message_free_unpacked(
+	ProtobufCMessage *message,
+	ProtobufCAllocator *allocator);
+
+/**
+ * Check the validity of a message object.
+ *
+ * Makes sure all required fields (`PROTOBUF_C_LABEL_REQUIRED`) are present.
+ * Recursively checks nested messages.
+ *
+ * \retval TRUE
+ *      Message is valid.
+ * \retval FALSE
+ *      Message is invalid.
+ */
+PROTOBUF_C__API
+protobuf_c_boolean
+protobuf_c_message_check(const ProtobufCMessage *);
+
+/** Message initialiser. */
+#define PROTOBUF_C_MESSAGE_INIT(descriptor) { descriptor, 0, NULL }
+
+/**
+ * Initialise a message object from a message descriptor.
+ *
+ * \param descriptor
+ *      Message descriptor.
+ * \param message
+ *      Allocated block of memory of size `descriptor->sizeof_message`.
+ */
+PROTOBUF_C__API
+void
+protobuf_c_message_init(
+	const ProtobufCMessageDescriptor *descriptor,
+	void *message);
+
+/**
+ * Free a service.
+ *
+ * \param service
+ *      The service object to free.
+ */
+PROTOBUF_C__API
+void
+protobuf_c_service_destroy(ProtobufCService *service);
+
+/**
+ * Look up a `ProtobufCMethodDescriptor` by name.
+ *
+ * \param desc
+ *      Service descriptor.
+ * \param name
+ *      Name of the method.
+ *
+ * \return
+ *      A `ProtobufCMethodDescriptor` object.
+ * \retval NULL
+ *      If not found or if the optimize_for = CODE_SIZE option was set.
+ */
+PROTOBUF_C__API
+const ProtobufCMethodDescriptor *
+protobuf_c_service_descriptor_get_method_by_name(
+	const ProtobufCServiceDescriptor *desc,
+	const char *name);
+
+/**
+ * Initialise a `ProtobufCBufferSimple` object.
+ */
+#define PROTOBUF_C_BUFFER_SIMPLE_INIT(array_of_bytes)                   \
+{                                                                       \
+	{ protobuf_c_buffer_simple_append },                            \
+	sizeof(array_of_bytes),                                         \
+	0,                                                              \
+	(array_of_bytes),                                               \
+	0,                                                              \
+	NULL                                                            \
+}
+
+/**
+ * Clear a `ProtobufCBufferSimple` object, freeing any allocated memory.
+ */
+#define PROTOBUF_C_BUFFER_SIMPLE_CLEAR(simp_buf)                        \
+do {                                                                    \
+	if ((simp_buf)->must_free_data) {                               \
+		if ((simp_buf)->allocator != NULL)                      \
+			(simp_buf)->allocator->free(                    \
+				(simp_buf)->allocator,                  \
+				(simp_buf)->data);			\
+		else                                                    \
+			free((simp_buf)->data);                         \
+	}                                                               \
+} while (0)
+
+/**
+ * The `append` method for `ProtobufCBufferSimple`.
+ *
+ * \param buffer
+ *      The buffer object to append to. Must actually be a
+ *      `ProtobufCBufferSimple` object.
+ * \param len
+ *      Number of bytes in `data`.
+ * \param data
+ *      Data to append.
+ */
+PROTOBUF_C__API
+void
+protobuf_c_buffer_simple_append(
+	ProtobufCBuffer *buffer,
+	size_t len,
+	const unsigned char *data);
+
+PROTOBUF_C__API
+void
+protobuf_c_service_generated_init(
+	ProtobufCService *service,
+	const ProtobufCServiceDescriptor *descriptor,
+	ProtobufCServiceDestroy destroy);
+
+PROTOBUF_C__API
+void
+protobuf_c_service_invoke_internal(
+	ProtobufCService *service,
+	unsigned method_index,
+	const ProtobufCMessage *input,
+	ProtobufCClosure closure,
+	void *closure_data);
+
+/**@}*/
+
+PROTOBUF_C__END_DECLS
+
+#endif /* PROTOBUF_C_H */
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_bytes_field.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_bytes_field.h
new file mode 100644
index 00000000000..c4a71e85b47
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_bytes_field.h
@@ -0,0 +1,100 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_BYTES_FIELD_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_BYTES_FIELD_H__
+
+#include <map>
+#include <string>
+#include <protoc-c/c_field.h>
+
+namespace google {
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+class BytesFieldGenerator : public FieldGenerator {
+ public:
+  explicit BytesFieldGenerator(const FieldDescriptor* descriptor);
+  ~BytesFieldGenerator();
+
+  // implements FieldGenerator ---------------------------------------
+  void GenerateStructMembers(io::Printer* printer) const;
+  void GenerateDescriptorInitializer(io::Printer* printer) const;
+  void GenerateDefaultValueDeclarations(io::Printer* printer) const;
+  void GenerateDefaultValueImplementations(io::Printer* printer) const;
+  string GetDefaultValue(void) const;
+  void GenerateStaticInit(io::Printer* printer) const;
+
+ private:
+  std::map<string, string> variables_;
+
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(BytesFieldGenerator);
+};
+
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+}  // namespace google
+
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_STRING_FIELD_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_enum.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_enum.h
new file mode 100644
index 00000000000..9eb9a6679ce
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_enum.h
@@ -0,0 +1,118 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_ENUM_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_ENUM_H__
+
+#include <string>
+#include <google/protobuf/descriptor.h>
+
+namespace google {
+namespace protobuf {
+  namespace io {
+    class Printer;             // printer.h
+  }
+}
+
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+class EnumGenerator {
+ public:
+  // See generator.cc for the meaning of dllexport_decl.
+  explicit EnumGenerator(const EnumDescriptor* descriptor,
+                         const string& dllexport_decl);
+  ~EnumGenerator();
+
+  // Header stuff.
+
+  // Generate header code defining the enum.  This code should be placed
+  // within the enum's package namespace, but NOT within any class, even for
+  // nested enums.
+  void GenerateDefinition(io::Printer* printer);
+
+  void GenerateDescriptorDeclarations(io::Printer* printer);
+
+
+  // Source file stuff.
+
+  // Generate the ProtobufCEnumDescriptor for this enum
+  void GenerateEnumDescriptor(io::Printer* printer);
+
+  // Generate static initializer for a ProtobufCEnumValue
+  // given the index of the value in the enum.
+  void GenerateValueInitializer(io::Printer *printer, int index);
+
+ private:
+  const EnumDescriptor* descriptor_;
+  string dllexport_decl_;
+
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(EnumGenerator);
+};
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_ENUM_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_enum_field.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_enum_field.h
new file mode 100644
index 00000000000..11df6824693
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_enum_field.h
@@ -0,0 +1,98 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_ENUM_FIELD_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_ENUM_FIELD_H__
+
+#include <map>
+#include <string>
+#include <protoc-c/c_field.h>
+
+namespace google {
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+class EnumFieldGenerator : public FieldGenerator {
+ public:
+  explicit EnumFieldGenerator(const FieldDescriptor* descriptor);
+  ~EnumFieldGenerator();
+
+  // implements FieldGenerator ---------------------------------------
+  void GenerateStructMembers(io::Printer* printer) const;
+  void GenerateDescriptorInitializer(io::Printer* printer) const;
+  string GetDefaultValue(void) const;
+  void GenerateStaticInit(io::Printer* printer) const;
+
+ private:
+  std::map<string, string> variables_;
+
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(EnumFieldGenerator);
+};
+
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_ENUM_FIELD_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_extension.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_extension.h
new file mode 100644
index 00000000000..ddbf270e5a1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_extension.h
@@ -0,0 +1,110 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_EXTENSION_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_EXTENSION_H__
+
+#include <string>
+#include <google/protobuf/stubs/common.h>
+
+namespace google {
+namespace protobuf {
+  class FieldDescriptor;       // descriptor.h
+  namespace io {
+    class Printer;             // printer.h
+  }
+}
+
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+// Generates code for an extension, which may be within the scope of some
+// message or may be at file scope.  This is much simpler than FieldGenerator
+// since extensions are just simple identifiers with interesting types.
+class ExtensionGenerator {
+ public:
+  // See generator.cc for the meaning of dllexport_decl.
+  explicit ExtensionGenerator(const FieldDescriptor* descriptor,
+                              const string& dllexport_decl);
+  ~ExtensionGenerator();
+
+  // Header stuff.
+  void GenerateDeclaration(io::Printer* printer);
+
+  // Source file stuff.
+  void GenerateDefinition(io::Printer* printer);
+
+ private:
+  const FieldDescriptor* descriptor_;
+  string type_traits_;
+  string dllexport_decl_;
+
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(ExtensionGenerator);
+};
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_MESSAGE_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_field.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_field.h
new file mode 100644
index 00000000000..91f1a03dafb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_field.h
@@ -0,0 +1,132 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_FIELD_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_FIELD_H__
+
+#include <google/protobuf/stubs/common.h>
+#include <google/protobuf/descriptor.h>
+
+namespace google {
+namespace protobuf {
+  namespace io {
+    class Printer;             // printer.h
+  }
+}
+
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+class FieldGenerator {
+ public:
+  explicit FieldGenerator(const FieldDescriptor *descriptor) : descriptor_(descriptor) {}
+  virtual ~FieldGenerator();
+
+  // Generate definitions to be included in the structure.
+  virtual void GenerateStructMembers(io::Printer* printer) const = 0;
+
+  // Generate a static initializer for this field.
+  virtual void GenerateDescriptorInitializer(io::Printer* printer) const = 0;
+
+  virtual void GenerateDefaultValueDeclarations(io::Printer* printer) const { }
+  virtual void GenerateDefaultValueImplementations(io::Printer* printer) const { }
+  virtual string GetDefaultValue() const = 0;
+
+  // Generate members to initialize this field from a static initializer
+  virtual void GenerateStaticInit(io::Printer* printer) const = 0;
+
+
+ protected:
+  void GenerateDescriptorInitializerGeneric(io::Printer* printer,
+                                            bool optional_uses_has,
+                                            const string &type_macro,
+                                            const string &descriptor_addr) const;
+  const FieldDescriptor *descriptor_;
+
+ private:
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(FieldGenerator);
+};
+
+// Convenience class which constructs FieldGenerators for a Descriptor.
+class FieldGeneratorMap {
+ public:
+  explicit FieldGeneratorMap(const Descriptor* descriptor);
+  ~FieldGeneratorMap();
+
+  const FieldGenerator& get(const FieldDescriptor* field) const;
+
+ private:
+  const Descriptor* descriptor_;
+  scoped_array<scoped_ptr<FieldGenerator> > field_generators_;
+
+  static FieldGenerator* MakeGenerator(const FieldDescriptor* field);
+
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(FieldGeneratorMap);
+};
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_FIELD_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_file.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_file.h
new file mode 100644
index 00000000000..ed38ce425c3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_file.h
@@ -0,0 +1,117 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_FILE_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_FILE_H__
+
+#include <string>
+#include <vector>
+#include <google/protobuf/stubs/common.h>
+#include <protoc-c/c_field.h>
+
+namespace google {
+namespace protobuf {
+  class FileDescriptor;        // descriptor.h
+  namespace io {
+    class Printer;             // printer.h
+  }
+}
+
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+class EnumGenerator;           // enum.h
+class MessageGenerator;        // message.h
+class ServiceGenerator;        // service.h
+class ExtensionGenerator;      // extension.h
+
+class FileGenerator {
+ public:
+  // See generator.cc for the meaning of dllexport_decl.
+  explicit FileGenerator(const FileDescriptor* file,
+                         const string& dllexport_decl);
+  ~FileGenerator();
+
+  void GenerateHeader(io::Printer* printer);
+  void GenerateSource(io::Printer* printer);
+
+ private:
+  const FileDescriptor* file_;
+
+  scoped_array<scoped_ptr<MessageGenerator> > message_generators_;
+  scoped_array<scoped_ptr<EnumGenerator> > enum_generators_;
+  scoped_array<scoped_ptr<ServiceGenerator> > service_generators_;
+  scoped_array<scoped_ptr<ExtensionGenerator> > extension_generators_;
+
+  // E.g. if the package is foo.bar, package_parts_ is {"foo", "bar"}.
+  vector<string> package_parts_;
+
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(FileGenerator);
+};
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_FILE_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_generator.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_generator.h
new file mode 100644
index 00000000000..f454710b36f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_generator.h
@@ -0,0 +1,100 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+// Generates C code for a given .proto file.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_GENERATOR_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_GENERATOR_H__
+
+#include <string>
+#include <google/protobuf/compiler/code_generator.h>
+
+namespace google {
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+// CodeGenerator implementation which generates a C++ source file and
+// header.  If you create your own protocol compiler binary and you want
+// it to support C++ output, you can do so by registering an instance of this
+// CodeGenerator with the CommandLineInterface in your main() function.
+class LIBPROTOC_EXPORT CGenerator : public CodeGenerator {
+ public:
+  CGenerator();
+  ~CGenerator();
+
+  // implements CodeGenerator ----------------------------------------
+  bool Generate(const FileDescriptor* file,
+                const string& parameter,
+                OutputDirectory* output_directory,
+                string* error) const;
+
+ private:
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(CGenerator);
+};
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_GENERATOR_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_helpers.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_helpers.h
new file mode 100644
index 00000000000..9dc8c5e859c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_helpers.h
@@ -0,0 +1,197 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_HELPERS_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_HELPERS_H__
+
+#include <string>
+#include <vector>
+#include <sstream>
+#include <google/protobuf/descriptor.h>
+#include <google/protobuf/descriptor.pb.h>
+#include <google/protobuf/io/printer.h>
+
+namespace google {
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+// Returns the non-nested type name for the given type.  If "qualified" is
+// true, prefix the type with the full namespace.  For example, if you had:
+//   package foo.bar;
+//   message Baz { message Qux {} }
+// Then the qualified ClassName for Qux would be:
+//   Foo__Bar__Baz_Qux
+// While the non-qualified version would be:
+//   Baz_Qux
+string ClassName(const Descriptor* descriptor, bool qualified);
+string ClassName(const EnumDescriptor* enum_descriptor, bool qualified);
+
+// --- Borrowed from stubs. ---
+template <typename T> string SimpleItoa(T n) {
+  std::stringstream stream;
+  stream << n;
+  return stream.str();
+}
+
+string SimpleFtoa(float f);
+string SimpleDtoa(double f);
+void SplitStringUsing(const string &str, const char *delim, std::vector<string> *out);
+string CEscape(const string& src);
+string StringReplace(const string& s, const string& oldsub, const string& newsub, bool replace_all);
+inline bool HasSuffixString(const string& str, const string& suffix) { return str.size() >= suffix.size() && str.compare(str.size() - suffix.size(), suffix.size(), suffix) == 0; }
+inline string StripSuffixString(const string& str, const string& suffix) { if (HasSuffixString(str, suffix)) { return str.substr(0, str.size() - suffix.size()); } else { return str; } }
+char* FastHexToBuffer(int i, char* buffer);
+
+
+// Get the (unqualified) name that should be used for this field in C code.
+// The name is coerced to lower-case to emulate proto1 behavior.  People
+// should be using lowercase-with-underscores style for proto field names
+// anyway, so normally this just returns field->name().
+string FieldName(const FieldDescriptor* field);
+
+// Get macro string for deprecated field
+string FieldDeprecated(const FieldDescriptor* field);
+
+// Returns the scope where the field was defined (for extensions, this is
+// different from the message type to which the field applies).
+inline const Descriptor* FieldScope(const FieldDescriptor* field) {
+  return field->is_extension() ?
+    field->extension_scope() : field->containing_type();
+}
+
+// convert a CamelCase class name into an all uppercase affair
+// with underscores separating words, e.g. MyClass becomes MY_CLASS.
+string CamelToUpper(const string &class_name);
+string CamelToLower(const string &class_name);
+
+// lowercased, underscored name to camel case
+string ToCamel(const string &name);
+
+// lowercase the string
+string ToLower(const string &class_name);
+string ToUpper(const string &class_name);
+
+// full_name() to lowercase with underscores
+string FullNameToLower(const string &full_name);
+string FullNameToUpper(const string &full_name);
+
+// full_name() to c-typename (with underscores for packages, otherwise camel case)
+string FullNameToC(const string &class_name);
+
+// Splits, indents, formats, and prints comment lines
+void PrintComment (io::Printer* printer, string comment);
+
+// make a string of spaces as long as input
+string ConvertToSpaces(const string &input);
+
+// Strips ".proto" or ".protodevel" from the end of a filename.
+string StripProto(const string& filename);
+
+// Get the C++ type name for a primitive type (e.g. "double", "::google::protobuf::int32", etc.).
+// Note:  non-built-in type names will be qualified, meaning they will start
+// with a ::.  If you are using the type as a template parameter, you will
+// need to insure there is a space between the < and the ::, because the
+// ridiculous C++ standard defines "<:" to be a synonym for "[".
+const char* PrimitiveTypeName(FieldDescriptor::CppType type);
+
+// Get the declared type name in CamelCase format, as is used e.g. for the
+// methods of WireFormat.  For example, TYPE_INT32 becomes "Int32".
+const char* DeclaredTypeMethodName(FieldDescriptor::Type type);
+
+// Convert a file name into a valid identifier.
+string FilenameIdentifier(const string& filename);
+
+// Return the name of the BuildDescriptors() function for a given file.
+string GlobalBuildDescriptorsName(const string& filename);
+
+// return 'required', 'optional', or 'repeated'
+string GetLabelName(FieldDescriptor::Label label);
+
+
+// write IntRanges entries for a bunch of sorted values.
+// returns the number of ranges there are to bsearch.
+unsigned WriteIntRanges(io::Printer* printer, int n_values, const int *values, const string &name);
+
+struct NameIndex
+{
+  unsigned index;
+  const char *name;
+};
+int compare_name_indices_by_name(const void*, const void*);
+
+// Return the syntax version of the file containing the field.
+// This wrapper is needed to be able to compile against protobuf2.
+inline int FieldSyntax(const FieldDescriptor* field) {
+#ifdef HAVE_PROTO3
+  return field->file()->syntax() == FileDescriptor::SYNTAX_PROTO3 ? 3 : 2;
+#else
+  return 2;
+#endif
+}
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_HELPERS_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_message.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_message.h
new file mode 100644
index 00000000000..8b115d1c8cb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_message.h
@@ -0,0 +1,141 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_MESSAGE_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_MESSAGE_H__
+
+#include <string>
+#include <google/protobuf/stubs/common.h>
+#include <protoc-c/c_field.h>
+
+namespace google {
+namespace protobuf {
+  namespace io {
+    class Printer;             // printer.h
+  }
+}
+
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+class EnumGenerator;           // enum.h
+class ExtensionGenerator;      // extension.h
+
+class MessageGenerator {
+ public:
+  // See generator.cc for the meaning of dllexport_decl.
+  explicit MessageGenerator(const Descriptor* descriptor,
+                            const string& dllexport_decl);
+  ~MessageGenerator();
+
+  // Header stuff.
+
+  // Generate typedef.
+  void GenerateStructTypedef(io::Printer* printer);
+
+  // Generate descriptor prototype
+  void GenerateDescriptorDeclarations(io::Printer* printer);
+
+  // Generate descriptor prototype
+  void GenerateClosureTypedef(io::Printer* printer);
+
+  // Generate definitions of all nested enums (must come before class
+  // definitions because those classes use the enums definitions).
+  void GenerateEnumDefinitions(io::Printer* printer);
+
+  // Generate definitions for this class and all its nested types.
+  void GenerateStructDefinition(io::Printer* printer);
+
+  // Generate __INIT macro for populating this structure
+  void GenerateStructStaticInitMacro(io::Printer* printer);
+
+  // Generate standard helper functions declarations for this message.
+  void GenerateHelperFunctionDeclarations(io::Printer* printer, bool is_submessage);
+
+  // Source file stuff.
+
+  // Generate code that initializes the global variable storing the message's
+  // descriptor.
+  void GenerateMessageDescriptor(io::Printer* printer);
+  void GenerateHelperFunctionDefinitions(io::Printer* printer, bool is_submessage);
+
+ private:
+
+  string GetDefaultValueC(const FieldDescriptor *fd);
+
+  const Descriptor* descriptor_;
+  string dllexport_decl_;
+  FieldGeneratorMap field_generators_;
+  scoped_array<scoped_ptr<MessageGenerator> > nested_generators_;
+  scoped_array<scoped_ptr<EnumGenerator> > enum_generators_;
+  scoped_array<scoped_ptr<ExtensionGenerator> > extension_generators_;
+
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(MessageGenerator);
+};
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_MESSAGE_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_message_field.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_message_field.h
new file mode 100644
index 00000000000..b059fb031b0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_message_field.h
@@ -0,0 +1,97 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_MESSAGE_FIELD_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_MESSAGE_FIELD_H__
+
+#include <map>
+#include <string>
+#include <protoc-c/c_field.h>
+
+namespace google {
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+class MessageFieldGenerator : public FieldGenerator {
+ public:
+  explicit MessageFieldGenerator(const FieldDescriptor* descriptor);
+  ~MessageFieldGenerator();
+
+  // implements FieldGenerator ---------------------------------------
+  void GenerateStructMembers(io::Printer* printer) const;
+  void GenerateDescriptorInitializer(io::Printer* printer) const;
+  string GetDefaultValue(void) const;
+  void GenerateStaticInit(io::Printer* printer) const;
+
+ private:
+
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(MessageFieldGenerator);
+};
+
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_MESSAGE_FIELD_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_primitive_field.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_primitive_field.h
new file mode 100644
index 00000000000..5ff254c5dd8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_primitive_field.h
@@ -0,0 +1,96 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_PRIMITIVE_FIELD_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_PRIMITIVE_FIELD_H__
+
+#include <map>
+#include <string>
+#include <protoc-c/c_field.h>
+
+namespace google {
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+class PrimitiveFieldGenerator : public FieldGenerator {
+ public:
+  explicit PrimitiveFieldGenerator(const FieldDescriptor* descriptor);
+  ~PrimitiveFieldGenerator();
+
+  // implements FieldGenerator ---------------------------------------
+  void GenerateStructMembers(io::Printer* printer) const;
+  void GenerateDescriptorInitializer(io::Printer* printer) const;
+  string GetDefaultValue(void) const;
+  void GenerateStaticInit(io::Printer* printer) const;
+
+ private:
+
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(PrimitiveFieldGenerator);
+};
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_PRIMITIVE_FIELD_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_service.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_service.h
new file mode 100644
index 00000000000..6f1798ca724
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_service.h
@@ -0,0 +1,112 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_SERVICE_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_SERVICE_H__
+
+#include <map>
+#include <string>
+#include <google/protobuf/descriptor.h>
+
+namespace google {
+namespace protobuf {
+  namespace io {
+    class Printer;             // printer.h
+  }
+}
+
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+class ServiceGenerator {
+ public:
+  // See generator.cc for the meaning of dllexport_decl.
+  explicit ServiceGenerator(const ServiceDescriptor* descriptor,
+                            const string& dllexport_decl);
+  ~ServiceGenerator();
+
+  // Header stuff.
+  void GenerateMainHFile(io::Printer* printer);
+  void GenerateVfuncs(io::Printer* printer);
+  void GenerateInitMacros(io::Printer* printer);
+  void GenerateDescriptorDeclarations(io::Printer* printer);
+  void GenerateCallersDeclarations(io::Printer* printer);
+
+  // Source file stuff.
+  void GenerateCFile(io::Printer* printer);
+  void GenerateServiceDescriptor(io::Printer* printer);
+  void GenerateInit(io::Printer* printer);
+  void GenerateCallersImplementations(io::Printer* printer);
+
+  const ServiceDescriptor* descriptor_;
+  std::map<string, string> vars_;
+
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(ServiceGenerator);
+};
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_SERVICE_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_string_field.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_string_field.h
new file mode 100644
index 00000000000..68f0d25b7dd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/protoc-c/c_string_field.h
@@ -0,0 +1,100 @@
+// Protocol Buffers - Google's data interchange format
+// Copyright 2008 Google Inc.  All rights reserved.
+// http://code.google.com/p/protobuf/
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//     * Neither the name of Google Inc. nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Author: kenton@google.com (Kenton Varda)
+//  Based on original Protocol Buffers design by
+//  Sanjay Ghemawat, Jeff Dean, and others.
+
+// Copyright (c) 2008-2013, Dave Benson.  All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+//     * Redistributions in binary form must reproduce the above
+// copyright notice, this list of conditions and the following disclaimer
+// in the documentation and/or other materials provided with the
+// distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Modified to implement C code by Dave Benson.
+
+#ifndef GOOGLE_PROTOBUF_COMPILER_C_STRING_FIELD_H__
+#define GOOGLE_PROTOBUF_COMPILER_C_STRING_FIELD_H__
+
+#include <map>
+#include <string>
+#include <protoc-c/c_field.h>
+
+namespace google {
+namespace protobuf {
+namespace compiler {
+namespace c {
+
+class StringFieldGenerator : public FieldGenerator {
+ public:
+  explicit StringFieldGenerator(const FieldDescriptor* descriptor);
+  ~StringFieldGenerator();
+
+  // implements FieldGenerator ---------------------------------------
+  void GenerateStructMembers(io::Printer* printer) const;
+  void GenerateDescriptorInitializer(io::Printer* printer) const;
+  void GenerateDefaultValueDeclarations(io::Printer* printer) const;
+  void GenerateDefaultValueImplementations(io::Printer* printer) const;
+  string GetDefaultValue(void) const;
+  void GenerateStaticInit(io::Printer* printer) const;
+
+ private:
+  std::map<string, string> variables_;
+
+  GOOGLE_DISALLOW_EVIL_CONSTRUCTORS(StringFieldGenerator);
+};
+
+
+}  // namespace c
+}  // namespace compiler
+}  // namespace protobuf
+
+}  // namespace google
+#endif  // GOOGLE_PROTOBUF_COMPILER_C_STRING_FIELD_H__
diff --git a/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/t/generated-code2/common-test-arrays.h b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/t/generated-code2/common-test-arrays.h
new file mode 100644
index 00000000000..1535d38e821
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protobuf-c/protobuf-c/t/generated-code2/common-test-arrays.h
@@ -0,0 +1,62 @@
+
+/* data included from the c++ packed-data generator,
+   and from the c test code. */
+
+#define THOUSAND     1000
+#define MILLION      1000000
+#define BILLION      1000000000LL
+#define TRILLION     1000000000000LL
+#define QUADRILLION  1000000000000000LL
+#define QUINTILLION  1000000000000000000LL
+
+int32_t int32_arr0[2] = { -1, 1 };
+int32_t int32_arr1[5] = { 42, 666, -1123123, 0, 47 };
+int32_t int32_arr_min_max[2] = { INT32_MIN, INT32_MAX };
+
+uint32_t uint32_roundnumbers[4] = { BILLION, MILLION, 1, 0 };
+uint32_t uint32_0_max[2] = { 0, UINT32_MAX };
+
+int64_t int64_roundnumbers[15] = { -QUINTILLION, -QUADRILLION, -TRILLION,
+                                   -BILLION, -MILLION, -THOUSAND,
+                                   1,
+                                   THOUSAND, MILLION, BILLION,
+                                   TRILLION, QUADRILLION, QUINTILLION };
+int64_t int64_min_max[2] = { INT64_MIN, INT64_MAX };
+
+uint64_t uint64_roundnumbers[9] = { 1,
+                                   THOUSAND, MILLION, BILLION,
+                                   TRILLION, QUADRILLION, QUINTILLION };
+uint64_t uint64_0_1_max[3] = { 0, 1, UINT64_MAX };
+uint64_t uint64_random[] = {0,
+                          666,
+                          4200000000ULL,
+                          16ULL * (uint64_t) QUINTILLION + 33 };
+
+#define FLOATING_POINT_RANDOM \
+-1000.0, -100.0, -42.0, 0, 666, 131313
+float float_random[] = { FLOATING_POINT_RANDOM };
+double double_random[] = { FLOATING_POINT_RANDOM };
+
+protobuf_c_boolean boolean_0[]  = {0 };
+protobuf_c_boolean boolean_1[]  = {1 };
+protobuf_c_boolean boolean_random[] = {0,1,1,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1,1,0,1,1,0,1,1,0 };
+
+TEST_ENUM_SMALL_TYPE_NAME enum_small_0[] = { TEST_ENUM_SMALL(VALUE) };
+TEST_ENUM_SMALL_TYPE_NAME enum_small_1[] = { TEST_ENUM_SMALL(OTHER_VALUE) };
+#define T(v) (TEST_ENUM_SMALL_TYPE_NAME)(v)
+TEST_ENUM_SMALL_TYPE_NAME enum_small_random[] = {T(0),T(1),T(1),T(0),T(0),T(1),T(1),T(1),T(0),T(0),T(0),T(0),T(0),T(1),T(1),T(1),T(1),T(1),T(1),T(0),T(1),T(1),T(0),T(1),T(1),T(0) };
+#undef T
+
+#define T(v) (TEST_ENUM_TYPE_NAME)(v)
+TEST_ENUM_TYPE_NAME enum_0[] = { T(0) };
+TEST_ENUM_TYPE_NAME enum_1[] = { T(1) };
+TEST_ENUM_TYPE_NAME enum_random[] = { 
+   T(0), T(268435455), T(127), T(16384), T(16383),
+   T(2097152), T(2097151), T(128), T(268435456),
+   T(0), T(2097152), T(268435455), T(127), T(16383), T(16384) };
+#undef T
+
+char *repeated_strings_0[] = { (char*)"onestring" };
+char *repeated_strings_1[] = { (char*)"two", (char*)"string" };
+char *repeated_strings_2[] = { (char*)"many", (char*)"tiny", (char*)"little", (char*)"strings", (char*)"should", (char*)"be", (char*)"handled" };
+char *repeated_strings_3[] = { (char*)"one very long strings XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX" };
diff --git a/tools/sdk/esp32s3/include/protocomm/include/common/protocomm.h b/tools/sdk/esp32s3/include/protocomm/include/common/protocomm.h
new file mode 100644
index 00000000000..b5c57992ccd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protocomm/include/common/protocomm.h
@@ -0,0 +1,268 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <protocomm_security.h>
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Function prototype for protocomm endpoint handler
+ */
+typedef esp_err_t (*protocomm_req_handler_t)(
+    uint32_t        session_id, /*!< Session ID for identifying protocomm client */
+    const uint8_t  *inbuf,      /*!< Pointer to user provided input data buffer */
+    ssize_t         inlen,      /*!< Length o the input buffer */
+    uint8_t       **outbuf,     /*!< Pointer to output buffer allocated by handler */
+    ssize_t        *outlen,     /*!< Length of the allocated output buffer */
+    void           *priv_data   /*!< Private data passed to the handler (NULL if not used) */
+);
+
+/**
+ * @brief   This structure corresponds to a unique instance of protocomm
+ *          returned when the API `protocomm_new()` is called. The remaining
+ *          Protocomm APIs require this object as the first parameter.
+ *
+ * @note    Structure of the protocomm object is kept private
+ */
+typedef struct protocomm protocomm_t;
+
+/**
+ * @brief   Create a new protocomm instance
+ *
+ * This API will return a new dynamically allocated protocomm instance
+ * with all elements of the protocomm_t structure initialized to NULL.
+ *
+ * @return
+ *  - protocomm_t* : On success
+ *  - NULL : No memory for allocating new instance
+ */
+protocomm_t *protocomm_new(void);
+
+/**
+ * @brief   Delete a protocomm instance
+ *
+ * This API will deallocate a protocomm instance that was created
+ * using `protocomm_new()`.
+ *
+ * @param[in] pc    Pointer to the protocomm instance to be deleted
+ */
+void protocomm_delete(protocomm_t *pc);
+
+/**
+ * @brief   Add endpoint request handler for a protocomm instance
+ *
+ * This API will bind an endpoint handler function to the specified
+ * endpoint name, along with any private data that needs to be pass to
+ * the handler at the time of call.
+ *
+ * @note
+ *  - An endpoint must be bound to a valid protocomm instance,
+ *    created using `protocomm_new()`.
+ *  - This function internally calls the registered `add_endpoint()`
+ *    function of the selected transport which is a member of the
+ *    protocomm_t instance structure.
+ *
+ * @param[in] pc        Pointer to the protocomm instance
+ * @param[in] ep_name   Endpoint identifier(name) string
+ * @param[in] h         Endpoint handler function
+ * @param[in] priv_data Pointer to private data to be passed as a
+ *                      parameter to the handler function on call.
+ *                      Pass NULL if not needed.
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_FAIL : Error adding endpoint / Endpoint with this name already exists
+ *  - ESP_ERR_NO_MEM : Error allocating endpoint resource
+ *  - ESP_ERR_INVALID_ARG : Null instance/name/handler arguments
+ */
+esp_err_t protocomm_add_endpoint(protocomm_t *pc, const char *ep_name,
+                                 protocomm_req_handler_t h, void *priv_data);
+
+/**
+ * @brief   Remove endpoint request handler for a protocomm instance
+ *
+ * This API will remove a registered endpoint handler identified by
+ * an endpoint name.
+ *
+ * @note
+ *  - This function internally calls the registered `remove_endpoint()`
+ *    function which is a member of the protocomm_t instance structure.
+ *
+ * @param[in] pc        Pointer to the protocomm instance
+ * @param[in] ep_name   Endpoint identifier(name) string
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_ERR_NOT_FOUND : Endpoint with specified name doesn't exist
+ *  - ESP_ERR_INVALID_ARG : Null instance/name arguments
+ */
+esp_err_t protocomm_remove_endpoint(protocomm_t *pc, const char *ep_name);
+
+/**
+ * @brief   Allocates internal resources for new transport session
+ *
+ * @note
+ *  - An endpoint must be bound to a valid protocomm instance,
+ *    created using `protocomm_new()`.
+ *
+ * @param[in]  pc         Pointer to the protocomm instance
+ * @param[in]  session_id Unique ID for a communication session
+ *
+ * @return
+ *  - ESP_OK : Request handled successfully
+ *  - ESP_ERR_NO_MEM : Error allocating internal resource
+ *  - ESP_ERR_INVALID_ARG : Null instance/name arguments
+ */
+esp_err_t protocomm_open_session(protocomm_t *pc, uint32_t session_id);
+
+/**
+ * @brief   Frees internal resources used by a transport session
+ *
+ * @note
+ *  - An endpoint must be bound to a valid protocomm instance,
+ *    created using `protocomm_new()`.
+ *
+ * @param[in]  pc         Pointer to the protocomm instance
+ * @param[in]  session_id Unique ID for a communication session
+ *
+ * @return
+ *  - ESP_OK : Request handled successfully
+ *  - ESP_ERR_INVALID_ARG : Null instance/name arguments
+ */
+esp_err_t protocomm_close_session(protocomm_t *pc, uint32_t session_id);
+
+/**
+ * @brief   Calls the registered handler of an endpoint session
+ *          for processing incoming data and generating the response
+ *
+ * @note
+ *  - An endpoint must be bound to a valid protocomm instance,
+ *    created using `protocomm_new()`.
+ *  - Resulting output buffer must be deallocated by the caller.
+ *
+ * @param[in]  pc         Pointer to the protocomm instance
+ * @param[in]  ep_name    Endpoint identifier(name) string
+ * @param[in]  session_id Unique ID for a communication session
+ * @param[in]  inbuf      Input buffer contains input request data which is to be
+ *                        processed by the registered handler
+ * @param[in]  inlen      Length of the input buffer
+ * @param[out] outbuf     Pointer to internally allocated output buffer,
+ *                        where the resulting response data output from
+ *                        the registered handler is to be stored
+ * @param[out] outlen     Buffer length of the allocated output buffer
+ *
+ * @return
+ *  - ESP_OK : Request handled successfully
+ *  - ESP_FAIL : Internal error in execution of registered handler
+ *  - ESP_ERR_NO_MEM : Error allocating internal resource
+ *  - ESP_ERR_NOT_FOUND : Endpoint with specified name doesn't exist
+ *  - ESP_ERR_INVALID_ARG : Null instance/name arguments
+ */
+esp_err_t protocomm_req_handle(protocomm_t *pc, const char *ep_name, uint32_t session_id,
+                               const uint8_t *inbuf, ssize_t inlen,
+                               uint8_t **outbuf, ssize_t *outlen);
+
+/**
+ * @brief   Add endpoint security for a protocomm instance
+ *
+ * This API will bind a security session establisher to the specified
+ * endpoint name, along with any proof of possession that may be required
+ * for authenticating a session client.
+ *
+ * @note
+ *  - An endpoint must be bound to a valid protocomm instance,
+ *    created using `protocomm_new()`.
+ *  - The choice of security can be any `protocomm_security_t` instance.
+ *    Choices `protocomm_security0` and `protocomm_security1` are readily available.
+ *
+ * @param[in] pc        Pointer to the protocomm instance
+ * @param[in] ep_name   Endpoint identifier(name) string
+ * @param[in] sec       Pointer to endpoint security instance
+ * @param[in] pop       Pointer to proof of possession for authenticating a client
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_FAIL : Error adding endpoint / Endpoint with this name already exists
+ *  - ESP_ERR_INVALID_STATE : Security endpoint already set
+ *  - ESP_ERR_NO_MEM : Error allocating endpoint resource
+ *  - ESP_ERR_INVALID_ARG : Null instance/name/handler arguments
+ */
+esp_err_t protocomm_set_security(protocomm_t *pc, const char *ep_name,
+                                 const protocomm_security_t *sec,
+                                 const protocomm_security_pop_t *pop);
+
+/**
+ * @brief   Remove endpoint security for a protocomm instance
+ *
+ * This API will remove a registered security endpoint identified by
+ * an endpoint name.
+ *
+ * @param[in] pc        Pointer to the protocomm instance
+ * @param[in] ep_name   Endpoint identifier(name) string
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_ERR_NOT_FOUND : Endpoint with specified name doesn't exist
+ *  - ESP_ERR_INVALID_ARG : Null instance/name arguments
+ */
+esp_err_t protocomm_unset_security(protocomm_t *pc, const char *ep_name);
+
+/**
+ * @brief   Set endpoint for version verification
+ *
+ * This API can be used for setting an application specific protocol
+ * version which can be verified by clients through the endpoint.
+ *
+ * @note
+ *  - An endpoint must be bound to a valid protocomm instance,
+ *    created using `protocomm_new()`.
+
+ * @param[in] pc        Pointer to the protocomm instance
+ * @param[in] ep_name   Endpoint identifier(name) string
+ * @param[in] version   Version identifier(name) string
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_FAIL : Error adding endpoint / Endpoint with this name already exists
+ *  - ESP_ERR_INVALID_STATE : Version endpoint already set
+ *  - ESP_ERR_NO_MEM : Error allocating endpoint resource
+ *  - ESP_ERR_INVALID_ARG : Null instance/name/handler arguments
+ */
+esp_err_t protocomm_set_version(protocomm_t *pc, const char *ep_name,
+                                const char *version);
+
+/**
+ * @brief   Remove version verification endpoint from a protocomm instance
+ *
+ * This API will remove a registered version endpoint identified by
+ * an endpoint name.
+ *
+ * @param[in] pc        Pointer to the protocomm instance
+ * @param[in] ep_name   Endpoint identifier(name) string
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_ERR_NOT_FOUND : Endpoint with specified name doesn't exist
+ *  - ESP_ERR_INVALID_ARG : Null instance/name arguments
+ */
+esp_err_t protocomm_unset_version(protocomm_t *pc, const char *ep_name);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/protocomm/include/security/protocomm_security.h b/tools/sdk/esp32s3/include/protocomm/include/security/protocomm_security.h
new file mode 100644
index 00000000000..04ca8b33556
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protocomm/include/security/protocomm_security.h
@@ -0,0 +1,108 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   Proof Of Possession for authenticating a secure session
+ */
+typedef struct protocomm_security_pop {
+    /**
+     * Pointer to buffer containing the proof of possession data
+     */
+    const uint8_t *data;
+
+    /**
+     * Length (in bytes) of the proof of possession data
+     */
+    uint16_t len;
+} protocomm_security_pop_t;
+
+typedef void * protocomm_security_handle_t;
+
+/**
+ * @brief   Protocomm security object structure.
+ *
+ * The member functions are used for implementing secure
+ * protocomm sessions.
+ *
+ * @note    This structure should not have any dynamic
+ *          members to allow re-entrancy
+ */
+typedef struct protocomm_security {
+    /**
+     * Unique version number of security implementation
+     */
+    int ver;
+
+    /**
+     * Function for initializing/allocating security
+     * infrastructure
+     */
+    esp_err_t (*init)(protocomm_security_handle_t *handle);
+
+    /**
+     * Function for deallocating security infrastructure
+     */
+    esp_err_t (*cleanup)(protocomm_security_handle_t handle);
+
+    /**
+     * Starts new secure transport session with specified ID
+     */
+    esp_err_t (*new_transport_session)(protocomm_security_handle_t handle,
+                                       uint32_t session_id);
+
+    /**
+     * Closes a secure transport session with specified ID
+     */
+    esp_err_t (*close_transport_session)(protocomm_security_handle_t handle,
+                                         uint32_t session_id);
+
+    /**
+     * Handler function for authenticating connection
+     * request and establishing secure session
+     */
+    esp_err_t (*security_req_handler)(protocomm_security_handle_t handle,
+                                      const protocomm_security_pop_t *pop,
+                                      uint32_t session_id,
+                                      const uint8_t *inbuf, ssize_t inlen,
+                                      uint8_t **outbuf, ssize_t *outlen,
+                                      void *priv_data);
+
+    /**
+     * Function which implements the encryption algorithm
+     */
+    esp_err_t (*encrypt)(protocomm_security_handle_t handle,
+                         uint32_t session_id,
+                         const uint8_t *inbuf, ssize_t inlen,
+                         uint8_t *outbuf, ssize_t *outlen);
+
+    /**
+     * Function which implements the decryption algorithm
+     */
+    esp_err_t (*decrypt)(protocomm_security_handle_t handle,
+                         uint32_t session_id,
+                         const uint8_t *inbuf, ssize_t inlen,
+                         uint8_t *outbuf, ssize_t *outlen);
+} protocomm_security_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/protocomm/include/security/protocomm_security0.h b/tools/sdk/esp32s3/include/protocomm/include/security/protocomm_security0.h
new file mode 100644
index 00000000000..9ae8744d470
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protocomm/include/security/protocomm_security0.h
@@ -0,0 +1,33 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <protocomm_security.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   Protocomm security version 0 implementation
+ *
+ * This is a simple implementation to be used when no
+ * security is required for the protocomm instance
+ */
+extern const protocomm_security_t protocomm_security0;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/protocomm/include/security/protocomm_security1.h b/tools/sdk/esp32s3/include/protocomm/include/security/protocomm_security1.h
new file mode 100644
index 00000000000..12a05c322aa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protocomm/include/security/protocomm_security1.h
@@ -0,0 +1,33 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <protocomm_security.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   Protocomm security version 1 implementation
+ *
+ * This is a full fledged security implementation using
+ * Curve25519 key exchange and AES-256-CTR encryption
+ */
+extern const protocomm_security_t protocomm_security1;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/protocomm/include/transports/protocomm_ble.h b/tools/sdk/esp32s3/include/protocomm/include/transports/protocomm_ble.h
new file mode 100644
index 00000000000..f899f95b188
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protocomm/include/transports/protocomm_ble.h
@@ -0,0 +1,124 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <protocomm.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * BLE device name cannot be larger than this value
+ * 31 bytes (max scan response size) - 1 byte (length) - 1 byte (type) = 29 bytes
+ */
+#define MAX_BLE_DEVNAME_LEN 29
+#define BLE_UUID128_VAL_LENGTH  16
+ /**
+ * Theoretically, the limit for max manufacturer length remains same as BLE
+ * device name i.e. 31 bytes (max scan response size) - 1 byte (length) - 1
+ * byte (type) = 29 bytes
+ * However, manufacturer data goes along with BLE device name in scan response.
+ * So, it is important to understand the actual length should be smaller than
+ * (29 - (BLE device name length) - 2). */
+#define MAX_BLE_MANUFACTURER_DATA_LEN 29
+
+/**
+ * @brief   This structure maps handler required by protocomm layer to
+ *          UUIDs which are used to uniquely identify BLE characteristics
+ *          from a smartphone or a similar client device.
+ */
+typedef struct name_uuid {
+    /**
+     * Name of the handler, which is passed to protocomm layer
+     */
+    const char *name;
+
+    /**
+     * UUID to be assigned to the BLE characteristic which is
+     * mapped to the handler
+     */
+    uint16_t uuid;
+} protocomm_ble_name_uuid_t;
+
+/**
+ * @brief   Config parameters for protocomm BLE service
+ */
+typedef struct protocomm_ble_config {
+    /**
+     * BLE device name being broadcast at the time of provisioning
+     */
+    char         device_name[MAX_BLE_DEVNAME_LEN];
+
+    /**
+     * 128 bit UUID of the provisioning service
+     */
+    uint8_t      service_uuid[BLE_UUID128_VAL_LENGTH];
+
+    /**
+     * BLE device manufacturer data pointer in advertisement
+     */
+    uint8_t      *manufacturer_data;
+
+    /**
+     * BLE device manufacturer data length in advertisement
+     */
+    ssize_t      manufacturer_data_len;
+
+    /**
+     * Number of entries in the Name-UUID lookup table
+     */
+    ssize_t      nu_lookup_count;
+
+    /**
+     * Pointer to the Name-UUID lookup table
+     */
+    protocomm_ble_name_uuid_t *nu_lookup;
+
+    /* BLE bonding */
+    unsigned ble_bonding:1;
+
+} protocomm_ble_config_t;
+
+/**
+ * @brief   Start Bluetooth Low Energy based transport layer for provisioning
+ *
+ * Initialize and start required BLE service for provisioning. This includes
+ * the initialization for characteristics/service for BLE.
+ *
+ * @param[in] pc        Protocomm instance pointer obtained from protocomm_new()
+ * @param[in] config    Pointer to config structure for initializing BLE
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_FAIL : Simple BLE start error
+ *  - ESP_ERR_NO_MEM : Error allocating memory for internal resources
+ *  - ESP_ERR_INVALID_STATE : Error in ble config
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ */
+esp_err_t protocomm_ble_start(protocomm_t *pc, const protocomm_ble_config_t *config);
+
+/**
+ * @brief   Stop Bluetooth Low Energy based transport layer for provisioning
+ *
+ * Stops service/task responsible for BLE based interactions for provisioning
+ *
+ * @note    You might want to optionally reclaim memory from Bluetooth.
+ *          Refer to the documentation of `esp_bt_mem_release` in that case.
+ *
+ * @param[in] pc    Same protocomm instance that was passed to protocomm_ble_start()
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_FAIL : Simple BLE stop error
+ *  - ESP_ERR_INVALID_ARG : Null / incorrect protocomm instance
+ */
+esp_err_t protocomm_ble_stop(protocomm_t *pc);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/protocomm/include/transports/protocomm_console.h b/tools/sdk/esp32s3/include/protocomm/include/transports/protocomm_console.h
new file mode 100644
index 00000000000..767bcd7ca01
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protocomm/include/transports/protocomm_console.h
@@ -0,0 +1,67 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <protocomm.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define PROTOCOMM_CONSOLE_DEFAULT_CONFIG() { \
+    .stack_size     = 4096,                  \
+    .task_priority  = tskIDLE_PRIORITY + 3,  \
+}
+
+/**
+ * @brief   Config parameters for protocomm console
+ */
+typedef struct {
+    size_t   stack_size;        /*!< Stack size of console task */
+    unsigned task_priority;     /*!< Priority of console task */
+} protocomm_console_config_t;
+
+/**
+ * @brief   Start console based protocomm transport
+ *
+ * @note    This is a singleton. ie. Protocomm can have multiple instances, but only
+ *          one instance can be bound to a console based transport layer.
+ *
+ * @param[in] pc     Protocomm instance pointer obtained from protocomm_new()
+ * @param[in] config Config param structure for protocomm console
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_NOT_SUPPORTED : Transport layer bound to another protocomm instance
+ *  - ESP_ERR_INVALID_STATE : Transport layer already bound to this protocomm instance
+ *  - ESP_FAIL : Failed to start console thread
+ */
+esp_err_t protocomm_console_start(protocomm_t *pc, const protocomm_console_config_t *config);
+
+/**
+ * @brief   Stop console protocomm transport
+ *
+ * @param[in] pc    Same protocomm instance that was passed to protocomm_console_start()
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_ERR_INVALID_ARG : Null / incorrect protocomm instance pointer
+ */
+esp_err_t protocomm_console_stop(protocomm_t *pc);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/protocomm/include/transports/protocomm_httpd.h b/tools/sdk/esp32s3/include/protocomm/include/transports/protocomm_httpd.h
new file mode 100644
index 00000000000..2baf7545512
--- /dev/null
+++ b/tools/sdk/esp32s3/include/protocomm/include/transports/protocomm_httpd.h
@@ -0,0 +1,107 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <protocomm.h>
+
+#define PROTOCOMM_HTTPD_DEFAULT_CONFIG() {   \
+    .port           = 80,                    \
+    .stack_size     = 4096,                  \
+    .task_priority  = tskIDLE_PRIORITY + 5,  \
+}
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   Config parameters for protocomm HTTP server
+ */
+typedef struct {
+
+    uint16_t port;          /*!< Port on which the HTTP server will listen */
+
+    /**
+     * Stack size of server task, adjusted depending
+     * upon stack usage of endpoint handler
+     */
+    size_t   stack_size;
+    unsigned task_priority; /*!< Priority of server task */
+} protocomm_http_server_config_t; /*!< HTTP Server Configuration, if HTTP Server has not been started already */
+
+/** Protocomm HTTPD Configuration Data
+ */
+typedef union {
+    /** HTTP Server Handle, if ext_handle_provided is set to true
+     */
+    void *handle;
+
+    /** HTTP Server Configuration, if a server is not already active
+     */
+    protocomm_http_server_config_t config;
+} protocomm_httpd_config_data_t;
+
+/**
+ * @brief   Config parameters for protocomm HTTP server
+ */
+typedef struct {
+    /** Flag to indicate of an external HTTP Server Handle has been provided.
+     * In such as case, protocomm will use the same HTTP Server and not start
+     * a new one internally.
+     */
+    bool ext_handle_provided;
+    /** Protocomm HTTPD Configuration Data */
+    protocomm_httpd_config_data_t data;
+} protocomm_httpd_config_t;
+
+/**
+ * @brief   Start HTTPD protocomm transport
+ *
+ * This API internally creates a framework to allow endpoint registration and security
+ * configuration for the protocomm.
+ *
+ * @note    This is a singleton. ie. Protocomm can have multiple instances, but only
+ *          one instance can be bound to an HTTP transport layer.
+ *
+ * @param[in] pc        Protocomm instance pointer obtained from protocomm_new()
+ * @param[in] config    Pointer to config structure for initializing HTTP server
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_ERR_INVALID_ARG : Null arguments
+ *  - ESP_ERR_NOT_SUPPORTED : Transport layer bound to another protocomm instance
+ *  - ESP_ERR_INVALID_STATE : Transport layer already bound to this protocomm instance
+ *  - ESP_ERR_NO_MEM : Memory allocation for server resource failed
+ *  - ESP_ERR_HTTPD_* : HTTP server error on start
+ */
+esp_err_t protocomm_httpd_start(protocomm_t *pc, const protocomm_httpd_config_t *config);
+
+/**
+ * @brief   Stop HTTPD protocomm transport
+ *
+ * This API cleans up the HTTPD transport protocomm and frees all the handlers registered
+ * with the protocomm.
+ *
+ * @param[in] pc    Same protocomm instance that was passed to protocomm_httpd_start()
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_ERR_INVALID_ARG : Null / incorrect protocomm instance pointer
+ */
+esp_err_t protocomm_httpd_stop(protocomm_t *pc);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/pthread/include/esp_pthread.h b/tools/sdk/esp32s3/include/pthread/include/esp_pthread.h
new file mode 100644
index 00000000000..874dc36f366
--- /dev/null
+++ b/tools/sdk/esp32s3/include/pthread/include/esp_pthread.h
@@ -0,0 +1,92 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_err.h"
+#include "freertos/FreeRTOSConfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef PTHREAD_STACK_MIN
+#define PTHREAD_STACK_MIN    CONFIG_PTHREAD_STACK_MIN
+#endif
+
+/** pthread configuration structure that influences pthread creation */
+typedef struct {
+    size_t stack_size;  ///< The stack size of the pthread
+    size_t prio;        ///< The thread's priority
+    bool inherit_cfg;   ///< Inherit this configuration further
+    const char* thread_name;  ///< The thread name.
+    int pin_to_core;    ///< The core id to pin the thread to. Has the same value range as xCoreId argument of xTaskCreatePinnedToCore.
+} esp_pthread_cfg_t;
+
+/**
+ * @brief Creates a default pthread configuration based
+ * on the values set via menuconfig.
+ *
+ * @return
+ *      A default configuration structure.
+ */
+esp_pthread_cfg_t esp_pthread_get_default_config(void);
+
+/**
+ * @brief Configure parameters for creating pthread
+ *
+ * This API allows you to configure how the subsequent
+ * pthread_create() call will behave. This call can be used to setup
+ * configuration parameters like stack size, priority, configuration
+ * inheritance etc.
+ *
+ * If the 'inherit' flag in the configuration structure is enabled,
+ * then the same configuration is also inherited in the thread
+ * subtree.
+ *
+ * @note Passing non-NULL attributes to pthread_create() will override
+ *       the stack_size parameter set using this API
+ *
+ * @param cfg The pthread config parameters
+ *
+ * @return
+ *      - ESP_OK if configuration was successfully set
+ *      - ESP_ERR_NO_MEM if out of memory
+ *      - ESP_ERR_INVALID_ARG if stack_size is less than PTHREAD_STACK_MIN
+ */
+esp_err_t esp_pthread_set_cfg(const esp_pthread_cfg_t *cfg);
+
+/**
+ * @brief Get current pthread creation configuration
+ *
+ * This will retrieve the current configuration that will be used for
+ * creating threads.
+ *
+ * @param p Pointer to the pthread config structure that will be
+ * updated with the currently configured parameters
+ *
+ * @return
+ *      - ESP_OK if the configuration was available
+ *      - ESP_ERR_NOT_FOUND if a configuration wasn't previously set
+ */
+esp_err_t esp_pthread_get_cfg(esp_pthread_cfg_t *p);
+
+/**
+ * @brief Initialize pthread library
+ */
+esp_err_t esp_pthread_init(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/qrcode/include/qrcode.h b/tools/sdk/esp32s3/include/qrcode/include/qrcode.h
new file mode 100644
index 00000000000..27de85f5baa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/qrcode/include/qrcode.h
@@ -0,0 +1,122 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <esp_err.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief  Generate and display QR Code on the console
+  *         Encodes the given string into a QR Code & displays it on the console
+  *
+  * @attention 1. Can successfully encode a UTF-8 string of up to 2953 bytes or an alphanumeric
+  *               string of up to 4296 characters or any digit string of up to 7089 characters
+  *
+  * @note This API is kept for backward compatibility
+  *
+  * @param  text  string to encode into a QR Code.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_FAIL: Failed to encode string into a QR Code
+  *    - ESP_ERR_NO_MEM: Failed to allocate buffer for given MAX_QRCODE_VERSION
+  */
+esp_err_t qrcode_display(const char *text);
+
+/**
+  * @brief  QR Code handle used by the display function
+  */
+typedef const uint8_t * esp_qrcode_handle_t;
+
+/**
+  * @brief  QR Code configuration options
+  */
+typedef struct {
+    void (*display_func)(esp_qrcode_handle_t qrcode);   /**< Function called for displaying the QR Code after encoding is complete */
+    int max_qrcode_version;                             /**< Max QR Code Version to be used. Range: 2 - 40 */
+    int qrcode_ecc_level;                               /**< Error Correction Level for QR Code */
+} esp_qrcode_config_t;
+
+/**
+  * @brief  Error Correction Level in a QR Code Symbol
+  */
+enum {
+    ESP_QRCODE_ECC_LOW,     /**< QR Code Error Tolerance of 7% */
+    ESP_QRCODE_ECC_MED,     /**< QR Code Error Tolerance of 15% */
+    ESP_QRCODE_ECC_QUART,   /**< QR Code Error Tolerance of 25% */
+    ESP_QRCODE_ECC_HIGH     /**< QR Code Error Tolerance of 30% */
+};
+
+/**
+  * @brief  Encodes the given string into a QR Code and calls the display function
+  *
+  * @attention 1. Can successfully encode a UTF-8 string of up to 2953 bytes or an alphanumeric
+  *               string of up to 4296 characters or any digit string of up to 7089 characters
+  *
+  * @param  cfg   Configuration used for QR Code encoding.
+  * @param  text  String to encode into a QR Code.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_FAIL: Failed to encode string into a QR Code
+  *    - ESP_ERR_NO_MEM: Failed to allocate buffer for given max_qrcode_version
+  */
+esp_err_t esp_qrcode_generate(esp_qrcode_config_t *cfg, const char *text);
+
+/**
+  * @brief  Displays QR Code on the console
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  */
+void esp_qrcode_print_console(esp_qrcode_handle_t qrcode);
+
+/**
+  * @brief  Returns the side length of the given QR Code
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  *
+  * @return
+  *    - val[21, 177]: Side length of QR Code
+  */
+int esp_qrcode_get_size(esp_qrcode_handle_t qrcode);
+
+/**
+  * @brief  Returns the Pixel value for the given coordinates
+  *         False indicates White and True indicates Black
+  *
+  * @attention 1. Coordinates for top left corner are (x=0, y=0)
+  * @attention 2. For out of bound coordinates false (White) is returned
+  *
+  * @param  qrcode  QR Code handle used by the display function.
+  * @param  x  X-Coordinate of QR Code module
+  * @param  y  Y-Coordinate of QR Code module
+  *
+  * @return
+  *    - true: (x, y) Pixel is Black
+  *    - false: (x, y) Pixel is White
+  */
+bool esp_qrcode_get_module(esp_qrcode_handle_t qrcode, int x, int y);
+
+#define ESP_QRCODE_CONFIG_DEFAULT() (esp_qrcode_config_t) { \
+    .display_func = esp_qrcode_print_console, \
+    .max_qrcode_version = 10, \
+    .qrcode_ecc_level = ESP_QRCODE_ECC_LOW, \
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_common_events.h b/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_common_events.h
new file mode 100644
index 00000000000..b77f8a3d142
--- /dev/null
+++ b/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_common_events.h
@@ -0,0 +1,60 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** ESP RainMaker Common Event Base */
+ESP_EVENT_DECLARE_BASE(RMAKER_COMMON_EVENT);
+
+typedef enum {
+    /** Node reboot has been triggered. The associated event data is the time in seconds
+     * (type: uint8_t) after which the node will reboot. Note that this time may not be
+     * accurate as the events are received asynchronously.*/
+    RMAKER_EVENT_REBOOT,
+    /** Wi-Fi credentials reset. Triggered after calling esp_rmaker_wifi_reset() */
+    RMAKER_EVENT_WIFI_RESET,
+    /** Node reset to factory defaults. Triggered after calling esp_rmaker_factory_reset() */
+    RMAKER_EVENT_FACTORY_RESET,
+    /** Connected to MQTT Broker */
+    RMAKER_MQTT_EVENT_CONNECTED,
+    /** Disconnected from MQTT Broker */
+    RMAKER_MQTT_EVENT_DISCONNECTED,
+    /** MQTT message published successfully.
+     * Event data will contain the message ID (integer) of published message.
+     */
+    RMAKER_MQTT_EVENT_PUBLISHED,
+    /** POSIX Timezone Changed. Associated data would be NULL terminated POSIX Timezone
+     * Eg. "PST8PDT,M3.2.0,M11.1.0" */
+    RMAKER_EVENT_TZ_POSIX_CHANGED,
+    /** Timezone Changed. Associated data would be NULL terminated Timezone.
+     * Eg. "America/Los_Angeles"
+     * Note that whenever this event is received, the RMAKER_EVENT_TZ_POSIX_CHANGED event
+     * will also be received, but not necessarily vice versa.
+     */
+    RMAKER_EVENT_TZ_CHANGED,
+    /**
+     * MQTT message deleted from the outbox if the message couldn't have been sent and acknowledged.
+     * Event data will contain the message ID (integer) of deleted message.
+     * Valid only if CONFIG_MQTT_REPORT_DELETED_MESSAGES is enabled.
+     */
+    RMAKER_MQTT_EVENT_MSG_DELETED,
+} esp_rmaker_common_event_t;
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_factory.h b/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_factory.h
new file mode 100644
index 00000000000..9ef781b798b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_factory.h
@@ -0,0 +1,61 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** Initialize Factory NVS
+ *
+ * This initializes the Factory NVS partition which will store data
+ * that should not be cleared even after a reset to factory.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_factory_init(void);
+
+/** Get value from factory NVS
+ *
+ * This will search for the specified key in the Factory NVS partition,
+ * allocate the required memory to hold it, copy the value and return
+ * the pointer to it. It is responsibility of the caller to free the
+ * memory when the value is no more required.
+ *
+ * @param[in] key The key of the value to be read from factory NVS.
+ *
+ * @return pointer to the value on success.
+ * @return NULL on failure.
+ */
+void *esp_rmaker_factory_get(const char *key);
+
+/** Set a value in factory NVS
+ *
+ * This will write the value for the specified key into factory NVS.
+ *
+ * @param[in] key The key for the value to be set in factory NVS.
+ * @param[in] data Pointer to the value.
+ * @param[in] len Length of the value.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_factory_set(const char *key, void *value, size_t len);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_mqtt_glue.h b/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_mqtt_glue.h
new file mode 100644
index 00000000000..95744bdf58c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_mqtt_glue.h
@@ -0,0 +1,160 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define RMAKER_MQTT_QOS0    0
+#define RMAKER_MQTT_QOS1    1
+
+/** MQTT Connection parameters */
+typedef struct {
+    /** MQTT Host */
+    char *mqtt_host;
+    /** Client ID */
+    char *client_id;
+    /** Client Certificate in NULL terminated PEM format */
+    char *client_cert;
+    /** Client Key in NULL terminated PEM format */
+    char *client_key;
+    /** Server Certificate in NULL terminated PEM format */
+    char *server_cert;
+} esp_rmaker_mqtt_conn_params_t;
+
+/** MQTT Get Connection Parameters function prototype
+ *
+ * @return Pointer to \ref esp_rmaker_mqtt_conn_params_t on success.
+ * @return NULL on failure.
+ */
+typedef esp_rmaker_mqtt_conn_params_t *(*esp_rmaker_mqtt_get_conn_params_t)(void);
+
+/** MQTT Subscribe callback prototype
+ *
+ * @param[in] topic Topic on which the message was received
+ * @param[in] payload Data received in the message
+ * @param[in] payload_len Length of the data
+ * @param[in] priv_data The private data passed during subscription
+ */
+typedef void (*esp_rmaker_mqtt_subscribe_cb_t)(const char *topic, void *payload, size_t payload_len, void *priv_data);
+
+/** MQTT Init function prototype
+ *
+ * @param[in] conn_params The MQTT connection parameters. If NULL is passed, it should internally use the
+ * \ref esp_rmaker_mqtt_get_conn_params call if registered.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_init_t)(esp_rmaker_mqtt_conn_params_t *conn_params);
+
+/** MQTT Deinit function prototype
+ *
+ * Call this function after MQTT has disconnected.
+ */
+typedef void (*esp_rmaker_mqtt_deinit_t)(void);
+
+/** MQTT Connect function prototype
+ *
+ * Starts the connection attempts to the MQTT broker.
+ * This should ideally be called after successful network connection.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_connect_t)(void);
+
+/** MQTT Disconnect function prototype
+ *
+ * Disconnects from the MQTT broker.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_disconnect_t)(void);
+
+/** MQTT Publish Message function prototype
+ *
+ * @param[in] topic The MQTT topic on which the message should be published.
+ * @param[in] data Data to be published.
+ * @param[in] data_len Length of the data.
+ * @param[in] qos Quality of service for the message.
+ * @param[out] msg_id If a non NULL pointer is passed, the id of the published message will be returned in this.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_publish_t)(const char *topic, void *data, size_t data_len, uint8_t qos, int *msg_id);
+
+/** MQTT Subscribe function prototype
+ *
+ * @param[in] topic The topic to be subscribed to.
+ * @param[in] cb The callback to be invoked when a message is received on the given topic.
+ * @param[in] qos Quality of service for the subscription.
+ * @param[in] priv_data Optional private data to be passed to the callback.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_subscribe_t)(const char *topic, esp_rmaker_mqtt_subscribe_cb_t cb, uint8_t qos, void *priv_data);
+
+/** MQTT Unsubscribe function prototype
+ *
+ * @param[in] topic Topic from which to unsubscribe.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+typedef esp_err_t (*esp_rmaker_mqtt_unsubscribe_t)(const char *topic);
+
+/**  MQTT configuration */
+typedef struct {
+    /** Flag to indicate if the MQTT config setup is done */
+    bool setup_done;
+    /** Pointer to the Get MQTT params function. */
+    esp_rmaker_mqtt_get_conn_params_t get_conn_params;
+    /** Pointer to MQTT Init function. */
+    esp_rmaker_mqtt_init_t init;
+    /** Pointer to MQTT Deinit function. */
+    esp_rmaker_mqtt_deinit_t deinit;
+    /** Pointer to MQTT Connect function. */
+    esp_rmaker_mqtt_connect_t connect;
+    /** Pointer to MQTQ Disconnect function */
+    esp_rmaker_mqtt_disconnect_t disconnect;
+    /** Pointer to MQTT Publish function */
+    esp_rmaker_mqtt_publish_t publish;
+    /** Pointer to MQTT Subscribe function */
+    esp_rmaker_mqtt_subscribe_t subscribe;
+    /** Pointer to MQTT Unsubscribe function */
+    esp_rmaker_mqtt_unsubscribe_t unsubscribe;
+} esp_rmaker_mqtt_config_t;
+
+/** Setup MQTT Glue
+ *
+ * This function initializes MQTT glue layer with all the default functions.
+ *
+ * @param[out] mqtt_config Pointer to an allocated MQTT configuration structure.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of any error.
+ */
+esp_err_t esp_rmaker_mqtt_glue_setup(esp_rmaker_mqtt_config_t *mqtt_config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_utils.h b/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_utils.h
new file mode 100644
index 00000000000..86ab691d492
--- /dev/null
+++ b/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_utils.h
@@ -0,0 +1,205 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <sntp.h>
+#include <esp_err.h>
+#include <esp_heap_caps.h>
+#include <sdkconfig.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#ifdef CONFIG_SPIRAM
+#define MEM_ALLOC_EXTRAM(size)         heap_caps_malloc(size, MALLOC_CAP_SPIRAM)
+#define MEM_CALLOC_EXTRAM(num, size)   heap_caps_calloc(num, size, MALLOC_CAP_SPIRAM)
+#define MEM_REALLOC_EXTRAM(ptr, size)  heap_caps_realloc(ptr, size, MALLOC_CAP_SPIRAM)
+#else
+#define MEM_ALLOC_EXTRAM(size)         malloc(size)
+#define MEM_CALLOC_EXTRAM(num, size)   calloc(num, size)
+#define MEM_REALLOC_EXTRAM(ptr, size)  realloc(ptr, size)
+#endif
+
+typedef struct esp_rmaker_time_config {
+    /** If not specified, then 'CONFIG_ESP_RMAKER_SNTP_SERVER_NAME' is used as the SNTP server. */
+    char *sntp_server_name;
+    /** Optional callback to invoke, whenever time is synchronised. This will be called
+     * periodically as per the SNTP polling interval (which is 60min by default).
+     * If kept NULL, the default callback will be invoked, which will just print the
+     * current local time.
+     */
+    sntp_sync_time_cb_t sync_time_cb;
+} esp_rmaker_time_config_t;
+
+/** Reboot the device after a delay
+ *
+ * This API just starts a reboot timer and returns immediately.
+ * The actual reboot is trigerred asynchronously in the timer callback.
+ * This is useful if you want to reboot after a delay, to allow other tasks to finish
+ * their operations (Eg. MQTT publish to indicate OTA success). The \ref RMAKER_EVENT_REBOOT
+ * event is triggered when the reboot timer is started.
+ *
+ * @param[in] seconds Time in seconds after which the device should reboot.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_reboot(int8_t seconds);
+
+/** Reset Wi-Fi credentials and (optionally) reboot
+ *
+ * This will reset just the Wi-Fi credentials and (optionally) trigger a reboot.
+ * This is useful when you want to keep all the entries in NVS memory
+ * intact, but just change the Wi-Fi credentials. The \ref RMAKER_EVENT_WIFI_RESET
+ * event is triggered when this API is called. The actual reset will happen after a
+ * delay if reset_seconds is not zero.
+ *
+ * @note This reset and reboot operations will happen asynchronously depending
+ * on the values passed to the API.
+ *
+ * @param[in] reset_seconds Time in seconds after which the reset should get triggered.
+ * This will help other modules take some actions before the device actually resets.
+ * If set to zero, the operation would be performed immediately.
+ * @param[in] reboot_seconds Time in seconds after which the device should reboot. If set
+ * to negative value, the device will not reboot at all.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_wifi_reset(int8_t reset_seconds, int8_t reboot_seconds);
+
+/** Reset to factory defaults and reboot
+ *
+ * This will clear entire NVS partition and (optionally) trigger a reboot.
+ * The \ref RMAKER_EVENT_FACTORY_RESET event is triggered when this API is called.
+ * The actual reset will happen after a delay if reset_seconds is not zero.
+ *
+ * @note This reset and reboot operations will happen asynchronously depending
+ * on the values passed to the API.
+ *
+ * @param[in] reset_seconds Time in seconds after which the reset should get triggered.
+ * This will help other modules take some actions before the device actually resets.
+ * If set to zero, the operation would be performed immediately.
+ * @param[in] reboot_seconds Time in seconds after which the device should reboot. If set
+ * to negative value, the device will not reboot at all.
+ *
+ * @return ESP_OK on success.
+ * @return error on failure.
+ */
+esp_err_t esp_rmaker_factory_reset(int8_t reset_seconds, int8_t reboot_seconds);
+
+/** Initialize time synchronization
+ *
+ * This API initializes SNTP for time synchronization.
+ *
+ * @param[in] config Configuration to be used for SNTP time synchronization. The default configuration is used if NULL is passed.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_sync_init(esp_rmaker_time_config_t *config);
+
+/** Check if current time is updated
+ *
+ * This API checks if the current system time is updated against the reference time of 1-Jan-2019.
+ *
+ * @return true if time is updated
+ * @return false if time is not updated
+ */
+bool esp_rmaker_time_check(void);
+
+/** Wait for time synchronization
+ *
+ * This API waits for the system time to be updated against the reference time of 1-Jan-2019.
+ * This is a blocking call.
+ *
+ * @param[in] ticks_to_wait Number of ticks to wait for time synchronization. Accepted values: 0 to portMAX_DELAY.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_wait_for_sync(uint32_t ticks_to_wait);
+
+/** Set POSIX timezone
+ *
+ * Set the timezone (TZ environment variable) as per the POSIX format
+ * specified in the [GNU libc documentation](https://www.gnu.org/software/libc/manual/html_node/TZ-Variable.html).
+ * Eg. For China: "CST-8"
+ *     For US Pacific Time (including daylight saving information): "PST8PDT,M3.2.0,M11.1.0"
+ *
+ * @param[in] tz_posix NULL terminated TZ POSIX string
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_set_timezone_posix(const char *tz_posix);
+
+/** Set timezone location string
+ *
+ * Set the timezone as a user friendly location string.
+ * Check [here](https://rainmaker.espressif.com/docs/time-service.html) for a list of valid values.
+ *
+ * Eg. For China: "Asia/Shanghai"
+ *     For US Pacific Time: "America/Los_Angeles"
+ *
+ * @note Setting timezone using this API internally also sets the POSIX timezone string.
+ *
+ * @param[in] tz NULL terminated Timezone location string
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_time_set_timezone(const char *tz);
+
+/** Get the current POSIX timezone
+ *
+ * This fetches the current timezone in POSIX format, read from NVS.
+ *
+ * @return Pointer to a NULL terminated POSIX timezone string on success.
+ *      Freeing this is the responsibility of the caller.
+ * @return NULL on failure.
+ */
+char *esp_rmaker_time_get_timezone_posix(void);
+
+/** Get the current timezone
+ *
+ * This fetches the current timezone in POSIX format, read from NVS.
+ *
+ * @return Pointer to a NULL terminated timezone string on success.
+ *      Freeing this is the responsibility of the caller.
+ * @return NULL on failure.
+ */
+char *esp_rmaker_time_get_timezone(void);
+
+/** Get printable local time string
+ *
+ * Get a printable local time string, with information of timezone and Daylight Saving.
+ * Eg. "Tue Sep  1 09:04:38 2020 -0400[EDT], DST: Yes"
+ * "Tue Sep  1 21:04:04 2020 +0800[CST], DST: No"
+ *
+ *
+ * @param[out] buf Pointer to a pre-allocated buffer into which the time string will
+ *                  be populated.
+ * @param[in] buf_len Length of the above buffer.
+ *
+ * @return ESP_OK on success
+ * @return error on failure
+ */
+esp_err_t esp_rmaker_get_local_time_str(char *buf, size_t buf_len);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_work_queue.h b/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_work_queue.h
new file mode 100644
index 00000000000..0e696d46848
--- /dev/null
+++ b/tools/sdk/esp32s3/include/rmaker_common/include/esp_rmaker_work_queue.h
@@ -0,0 +1,82 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <esp_err.h>
+#include <esp_event.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+/** Prototype for ESP RainMaker Work Queue Function
+ *
+ * @param[in] priv_data The private data associated with the work function.
+ */
+typedef void (*esp_rmaker_work_fn_t)(void *priv_data);
+
+/** Initializes the Work Queue
+ *
+ * This initializes the work queue, which is basically a mechanism to run
+ * tasks in the context of a dedicated thread. You can start queueing tasks
+ * after this, but they will get executed only after calling
+ * esp_rmaker_work_queue_start().
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_init(void);
+
+/** De-initialize the Work Queue
+ *
+ * This de-initializes the work queue. Note that the work queue needs to
+ * be stopped using esp_rmaker_work_queue_stop() before calling this.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_deinit(void);
+
+/** Start the Work Queue
+ *
+ * This starts the Work Queue thread which then starts executing the tasks queued.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_start(void);
+
+/** Stop the Work Queue
+ *
+ * This stops a running Work Queue.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_stop(void);
+
+/** Queue execution of a function in the Work Queue's context
+ *
+ * This API queues a work function for execution in the Work Queue Task's context.
+ *
+ * @param[in] work_fn The Work function to be queued.
+ * @param[in] priv_data Private data to be passed to the work function.
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t esp_rmaker_work_queue_add_task(esp_rmaker_work_fn_t work_fn, void *priv_data);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/sdmmc/include/sdmmc_cmd.h b/tools/sdk/esp32s3/include/sdmmc/include/sdmmc_cmd.h
new file mode 100644
index 00000000000..9b7319641e2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/sdmmc/include/sdmmc_cmd.h
@@ -0,0 +1,277 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdio.h>
+#include "esp_err.h"
+#include "driver/sdmmc_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Probe and initialize SD/MMC card using given host
+ *
+ * @note Only SD cards (SDSC and SDHC/SDXC) are supported now.
+ *       Support for MMC/eMMC cards will be added later.
+ *
+ * @param host  pointer to structure defining host controller
+ * @param out_card  pointer to structure which will receive information
+ *                  about the card when the function completes
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t sdmmc_card_init(const sdmmc_host_t* host,
+        sdmmc_card_t* out_card);
+
+/**
+ * @brief Print information about the card to a stream
+ * @param stream  stream obtained using fopen or fdopen
+ * @param card  card information structure initialized using sdmmc_card_init
+ */
+void sdmmc_card_print_info(FILE* stream, const sdmmc_card_t* card);
+
+/**
+ * Get status of SD/MMC card
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t sdmmc_get_status(sdmmc_card_t* card);
+
+/**
+ * Write given number of sectors to SD/MMC card
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @param src   pointer to data buffer to read data from; data size must be
+ *              equal to sector_count * card->csd.sector_size
+ * @param start_sector  sector where to start writing
+ * @param sector_count  number of sectors to write
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t sdmmc_write_sectors(sdmmc_card_t* card, const void* src,
+        size_t start_sector, size_t sector_count);
+
+/**
+ * Read given number of sectors from the SD/MMC card
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @param dst   pointer to data buffer to write into; buffer size must be
+ *              at least sector_count * card->csd.sector_size
+ * @param start_sector  sector where to start reading
+ * @param sector_count  number of sectors to read
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t sdmmc_read_sectors(sdmmc_card_t* card, void* dst,
+        size_t start_sector, size_t sector_count);
+
+/**
+ * Read one byte from an SDIO card using IO_RW_DIRECT (CMD52)
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @param function  IO function number
+ * @param reg  byte address within IO function
+ * @param[out] out_byte  output, receives the value read from the card
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t sdmmc_io_read_byte(sdmmc_card_t* card, uint32_t function,
+        uint32_t reg, uint8_t *out_byte);
+
+/**
+ * Write one byte to an SDIO card using IO_RW_DIRECT (CMD52)
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @param function  IO function number
+ * @param reg  byte address within IO function
+ * @param in_byte  value to be written
+ * @param[out] out_byte  if not NULL, receives new byte value read
+ *                       from the card (read-after-write).
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t sdmmc_io_write_byte(sdmmc_card_t* card, uint32_t function,
+        uint32_t reg, uint8_t in_byte, uint8_t* out_byte);
+
+/**
+ * Read multiple bytes from an SDIO card using IO_RW_EXTENDED (CMD53)
+ *
+ * This function performs read operation using CMD53 in byte mode.
+ * For block mode, see sdmmc_io_read_blocks.
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @param function  IO function number
+ * @param addr  byte address within IO function where reading starts
+ * @param dst  buffer which receives the data read from card
+ * @param size  number of bytes to read
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_SIZE if size exceeds 512 bytes
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t sdmmc_io_read_bytes(sdmmc_card_t* card, uint32_t function,
+        uint32_t addr, void* dst, size_t size);
+
+/**
+ * Write multiple bytes to an SDIO card using IO_RW_EXTENDED (CMD53)
+ *
+ * This function performs write operation using CMD53 in byte mode.
+ * For block mode, see sdmmc_io_write_blocks.
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @param function  IO function number
+ * @param addr  byte address within IO function where writing starts
+ * @param src  data to be written
+ * @param size  number of bytes to write
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_SIZE if size exceeds 512 bytes
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t sdmmc_io_write_bytes(sdmmc_card_t* card, uint32_t function,
+        uint32_t addr, const void* src, size_t size);
+
+/**
+ * Read blocks of data from an SDIO card using IO_RW_EXTENDED (CMD53)
+ *
+ * This function performs read operation using CMD53 in block mode.
+ * For byte mode, see sdmmc_io_read_bytes.
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @param function  IO function number
+ * @param addr  byte address within IO function where writing starts
+ * @param dst  buffer which receives the data read from card
+ * @param size  number of bytes to read, must be divisible by the card block
+ *              size.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_SIZE if size is not divisible by 512 bytes
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t sdmmc_io_read_blocks(sdmmc_card_t* card, uint32_t function,
+        uint32_t addr, void* dst, size_t size);
+
+/**
+ * Write blocks of data to an SDIO card using IO_RW_EXTENDED (CMD53)
+ *
+ * This function performs write operation using CMD53 in block mode.
+ * For byte mode, see sdmmc_io_write_bytes.
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @param function  IO function number
+ * @param addr  byte address within IO function where writing starts
+ * @param src  data to be written
+ * @param size  number of bytes to read, must be divisible by the card block
+ *              size.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_SIZE if size is not divisible by 512 bytes
+ *      - One of the error codes from SDMMC host controller
+ */
+esp_err_t sdmmc_io_write_blocks(sdmmc_card_t* card, uint32_t function,
+        uint32_t addr, const void* src, size_t size);
+
+/**
+ * Enable SDIO interrupt in the SDMMC host
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_SUPPORTED if the host controller does not support
+ *        IO interrupts
+ */
+esp_err_t sdmmc_io_enable_int(sdmmc_card_t* card);
+
+/**
+ * Block until an SDIO interrupt is received
+ *
+ * Slave uses D1 line to signal interrupt condition to the host.
+ * This function can be used to wait for the interrupt.
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @param timeout_ticks  time to wait for the interrupt, in RTOS ticks
+ * @return
+ *      - ESP_OK if the interrupt is received
+ *      - ESP_ERR_NOT_SUPPORTED if the host controller does not support
+ *        IO interrupts
+ *      - ESP_ERR_TIMEOUT if the interrupt does not happen in timeout_ticks
+ */
+esp_err_t sdmmc_io_wait_int(sdmmc_card_t* card, TickType_t timeout_ticks);
+
+/**
+ * Get the data of CIS region of an SDIO card.
+ *
+ * You may provide a buffer not sufficient to store all the CIS data. In this
+ * case, this function stores as much data into your buffer as possible. Also,
+ * this function will try to get and return the size required for you.
+ *
+ * @param card  pointer to card information structure previously initialized
+ *              using sdmmc_card_init
+ * @param out_buffer Output buffer of the CIS data
+ * @param buffer_size Size of the buffer.
+ * @param inout_cis_size Mandatory, pointer to a size, input and output.
+ *              - input: Limitation of maximum searching range, should be 0 or larger than
+ *                      buffer_size. The function searches for CIS_CODE_END until this range. Set to
+ *                      0 to search infinitely.
+ *              - output: The size required to store all the CIS data, if CIS_CODE_END is found.
+ *
+ * @return
+ *      - ESP_OK: on success
+ *      - ESP_ERR_INVALID_RESPONSE: if the card does not (correctly) support CIS.
+ *      - ESP_ERR_INVALID_SIZE: CIS_CODE_END found, but buffer_size is less than
+ *              required size, which is stored in the inout_cis_size then.
+ *      - ESP_ERR_NOT_FOUND: if the CIS_CODE_END not found. Increase input value of
+ *              inout_cis_size or set it to 0, if you still want to search for the end;
+ *              output value of inout_cis_size is invalid in this case.
+ *      - and other error code return from sdmmc_io_read_bytes
+ */
+esp_err_t sdmmc_io_get_cis_data(sdmmc_card_t* card, uint8_t* out_buffer, size_t buffer_size, size_t* inout_cis_size);
+
+/**
+ * Parse and print the CIS information of an SDIO card.
+ *
+ * @note Not all the CIS codes and all kinds of tuples are supported. If you
+ * see some unresolved code, you can add the parsing of these code in
+ * sdmmc_io.c and contribute to the IDF through the Github repository.
+ *
+ *              using sdmmc_card_init
+ * @param buffer Buffer to parse
+ * @param buffer_size Size of the buffer.
+ * @param fp File pointer to print to, set to NULL to print to stdout.
+ *
+ * @return
+ *      - ESP_OK: on success
+ *      - ESP_ERR_NOT_SUPPORTED: if the value from the card is not supported to be parsed.
+ *      - ESP_ERR_INVALID_SIZE: if the CIS size fields are not correct.
+ */
+esp_err_t sdmmc_io_print_cis_info(uint8_t* buffer, size_t buffer_size, FILE* fp);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/adc_channel.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/adc_channel.h
new file mode 100644
index 00000000000..f15ac9cb7b6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/adc_channel.h
@@ -0,0 +1,78 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SOC_ADC_CHANNEL_H
+#define _SOC_ADC_CHANNEL_H
+
+#define ADC1_GPIO1_CHANNEL     ADC1_CHANNEL_0
+#define ADC1_CHANNEL_0_GPIO_NUM 1
+
+#define ADC1_GPIO2_CHANNEL     ADC1_CHANNEL_1
+#define ADC1_CHANNEL_1_GPIO_NUM 2
+
+#define ADC1_GPIO3_CHANNEL     ADC1_CHANNEL_2
+#define ADC1_CHANNEL_2_GPIO_NUM 3
+
+#define ADC1_GPIO4_CHANNEL     ADC1_CHANNEL_3
+#define ADC1_CHANNEL_3_GPIO_NUM 4
+
+#define ADC1_GPIO5_CHANNEL     ADC1_CHANNEL_4
+#define ADC1_CHANNEL_4_GPIO_NUM 5
+
+#define ADC1_GPIO6_CHANNEL     ADC1_CHANNEL_5
+#define ADC1_CHANNEL_5_GPIO_NUM 6
+
+#define ADC1_GPIO7_CHANNEL     ADC1_CHANNEL_6
+#define ADC1_CHANNEL_6_GPIO_NUM 7
+
+#define ADC1_GPIO8_CHANNEL     ADC1_CHANNEL_7
+#define ADC1_CHANNEL_7_GPIO_NUM 8
+
+#define ADC1_GPIO9_CHANNEL     ADC1_CHANNEL_8
+#define ADC1_CHANNEL_8_GPIO_NUM 9
+
+#define ADC1_GPIO10_CHANNEL     ADC1_CHANNEL_9
+#define ADC1_CHANNEL_9_GPIO_NUM 10
+
+#define ADC2_GPIO11_CHANNEL      ADC2_CHANNEL_0
+#define ADC2_CHANNEL_0_GPIO_NUM 11
+
+#define ADC2_GPIO12_CHANNEL      ADC2_CHANNEL_1
+#define ADC2_CHANNEL_1_GPIO_NUM 12
+
+#define ADC2_GPIO13_CHANNEL      ADC2_CHANNEL_2
+#define ADC2_CHANNEL_2_GPIO_NUM 13
+
+#define ADC2_GPIO14_CHANNEL     ADC2_CHANNEL_3
+#define ADC2_CHANNEL_3_GPIO_NUM 14
+
+#define ADC2_GPIO15_CHANNEL     ADC2_CHANNEL_4
+#define ADC2_CHANNEL_4_GPIO_NUM 15
+
+#define ADC2_GPIO16_CHANNEL     ADC2_CHANNEL_5
+#define ADC2_CHANNEL_5_GPIO_NUM 16
+
+#define ADC2_GPIO17_CHANNEL     ADC2_CHANNEL_6
+#define ADC2_CHANNEL_6_GPIO_NUM 17
+
+#define ADC2_GPIO18_CHANNEL     ADC2_CHANNEL_7
+#define ADC2_CHANNEL_7_GPIO_NUM 18
+
+#define ADC2_GPIO19_CHANNEL     ADC2_CHANNEL_8
+#define ADC2_CHANNEL_8_GPIO_NUM 19
+
+#define ADC2_GPIO20_CHANNEL     ADC2_CHANNEL_9
+#define ADC2_CHANNEL_9_GPIO_NUM 20
+
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_ctrl_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_ctrl_reg.h
new file mode 100644
index 00000000000..c5ed6b4ae62
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_ctrl_reg.h
@@ -0,0 +1,663 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_APB_CTRL_REG_H_
+#define _SOC_APB_CTRL_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define APB_CTRL_SYSCLK_CONF_REG          (DR_REG_APB_CTRL_BASE + 0x0)
+/* APB_CTRL_RST_TICK_CNT : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_RST_TICK_CNT    (BIT(12))
+#define APB_CTRL_RST_TICK_CNT_M  (BIT(12))
+#define APB_CTRL_RST_TICK_CNT_V  0x1
+#define APB_CTRL_RST_TICK_CNT_S  12
+/* APB_CTRL_CLK_EN : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_CLK_EN    (BIT(11))
+#define APB_CTRL_CLK_EN_M  (BIT(11))
+#define APB_CTRL_CLK_EN_V  0x1
+#define APB_CTRL_CLK_EN_S  11
+/* APB_CTRL_CLK_320M_EN : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_CLK_320M_EN    (BIT(10))
+#define APB_CTRL_CLK_320M_EN_M  (BIT(10))
+#define APB_CTRL_CLK_320M_EN_V  0x1
+#define APB_CTRL_CLK_320M_EN_S  10
+/* APB_CTRL_PRE_DIV_CNT : R/W ;bitpos:[9:0] ;default: 10'h1 ; */
+/*description: .*/
+#define APB_CTRL_PRE_DIV_CNT    0x000003FF
+#define APB_CTRL_PRE_DIV_CNT_M  ((APB_CTRL_PRE_DIV_CNT_V)<<(APB_CTRL_PRE_DIV_CNT_S))
+#define APB_CTRL_PRE_DIV_CNT_V  0x3FF
+#define APB_CTRL_PRE_DIV_CNT_S  0
+
+#define APB_CTRL_TICK_CONF_REG          (DR_REG_APB_CTRL_BASE + 0x4)
+/* APB_CTRL_TICK_ENABLE : R/W ;bitpos:[16] ;default: 1'd1 ; */
+/*description: .*/
+#define APB_CTRL_TICK_ENABLE    (BIT(16))
+#define APB_CTRL_TICK_ENABLE_M  (BIT(16))
+#define APB_CTRL_TICK_ENABLE_V  0x1
+#define APB_CTRL_TICK_ENABLE_S  16
+/* APB_CTRL_CK8M_TICK_NUM : R/W ;bitpos:[15:8] ;default: 8'd7 ; */
+/*description: .*/
+#define APB_CTRL_CK8M_TICK_NUM    0x000000FF
+#define APB_CTRL_CK8M_TICK_NUM_M  ((APB_CTRL_CK8M_TICK_NUM_V)<<(APB_CTRL_CK8M_TICK_NUM_S))
+#define APB_CTRL_CK8M_TICK_NUM_V  0xFF
+#define APB_CTRL_CK8M_TICK_NUM_S  8
+/* APB_CTRL_XTAL_TICK_NUM : R/W ;bitpos:[7:0] ;default: 8'd39 ; */
+/*description: .*/
+#define APB_CTRL_XTAL_TICK_NUM    0x000000FF
+#define APB_CTRL_XTAL_TICK_NUM_M  ((APB_CTRL_XTAL_TICK_NUM_V)<<(APB_CTRL_XTAL_TICK_NUM_S))
+#define APB_CTRL_XTAL_TICK_NUM_V  0xFF
+#define APB_CTRL_XTAL_TICK_NUM_S  0
+
+#define APB_CTRL_CLK_OUT_EN_REG          (DR_REG_APB_CTRL_BASE + 0x8)
+/* APB_CTRL_CLK_XTAL_OEN : R/W ;bitpos:[10] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_CLK_XTAL_OEN    (BIT(10))
+#define APB_CTRL_CLK_XTAL_OEN_M  (BIT(10))
+#define APB_CTRL_CLK_XTAL_OEN_V  0x1
+#define APB_CTRL_CLK_XTAL_OEN_S  10
+/* APB_CTRL_CLK40X_BB_OEN : R/W ;bitpos:[9] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_CLK40X_BB_OEN    (BIT(9))
+#define APB_CTRL_CLK40X_BB_OEN_M  (BIT(9))
+#define APB_CTRL_CLK40X_BB_OEN_V  0x1
+#define APB_CTRL_CLK40X_BB_OEN_S  9
+/* APB_CTRL_CLK_DAC_CPU_OEN : R/W ;bitpos:[8] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_CLK_DAC_CPU_OEN    (BIT(8))
+#define APB_CTRL_CLK_DAC_CPU_OEN_M  (BIT(8))
+#define APB_CTRL_CLK_DAC_CPU_OEN_V  0x1
+#define APB_CTRL_CLK_DAC_CPU_OEN_S  8
+/* APB_CTRL_CLK_ADC_INF_OEN : R/W ;bitpos:[7] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_CLK_ADC_INF_OEN    (BIT(7))
+#define APB_CTRL_CLK_ADC_INF_OEN_M  (BIT(7))
+#define APB_CTRL_CLK_ADC_INF_OEN_V  0x1
+#define APB_CTRL_CLK_ADC_INF_OEN_S  7
+/* APB_CTRL_CLK_320M_OEN : R/W ;bitpos:[6] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_CLK_320M_OEN    (BIT(6))
+#define APB_CTRL_CLK_320M_OEN_M  (BIT(6))
+#define APB_CTRL_CLK_320M_OEN_V  0x1
+#define APB_CTRL_CLK_320M_OEN_S  6
+/* APB_CTRL_CLK160_OEN : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_CLK160_OEN    (BIT(5))
+#define APB_CTRL_CLK160_OEN_M  (BIT(5))
+#define APB_CTRL_CLK160_OEN_V  0x1
+#define APB_CTRL_CLK160_OEN_S  5
+/* APB_CTRL_CLK80_OEN : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_CLK80_OEN    (BIT(4))
+#define APB_CTRL_CLK80_OEN_M  (BIT(4))
+#define APB_CTRL_CLK80_OEN_V  0x1
+#define APB_CTRL_CLK80_OEN_S  4
+/* APB_CTRL_CLK_BB_OEN : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_CLK_BB_OEN    (BIT(3))
+#define APB_CTRL_CLK_BB_OEN_M  (BIT(3))
+#define APB_CTRL_CLK_BB_OEN_V  0x1
+#define APB_CTRL_CLK_BB_OEN_S  3
+/* APB_CTRL_CLK44_OEN : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_CLK44_OEN    (BIT(2))
+#define APB_CTRL_CLK44_OEN_M  (BIT(2))
+#define APB_CTRL_CLK44_OEN_V  0x1
+#define APB_CTRL_CLK44_OEN_S  2
+/* APB_CTRL_CLK22_OEN : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_CLK22_OEN    (BIT(1))
+#define APB_CTRL_CLK22_OEN_M  (BIT(1))
+#define APB_CTRL_CLK22_OEN_V  0x1
+#define APB_CTRL_CLK22_OEN_S  1
+/* APB_CTRL_CLK20_OEN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_CLK20_OEN    (BIT(0))
+#define APB_CTRL_CLK20_OEN_M  (BIT(0))
+#define APB_CTRL_CLK20_OEN_V  0x1
+#define APB_CTRL_CLK20_OEN_S  0
+
+#define APB_CTRL_WIFI_BB_CFG_REG          (DR_REG_APB_CTRL_BASE + 0xC)
+/* APB_CTRL_WIFI_BB_CFG : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define APB_CTRL_WIFI_BB_CFG    0xFFFFFFFF
+#define APB_CTRL_WIFI_BB_CFG_M  ((APB_CTRL_WIFI_BB_CFG_V)<<(APB_CTRL_WIFI_BB_CFG_S))
+#define APB_CTRL_WIFI_BB_CFG_V  0xFFFFFFFF
+#define APB_CTRL_WIFI_BB_CFG_S  0
+
+#define APB_CTRL_WIFI_BB_CFG_2_REG          (DR_REG_APB_CTRL_BASE + 0x10)
+/* APB_CTRL_WIFI_BB_CFG_2 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define APB_CTRL_WIFI_BB_CFG_2    0xFFFFFFFF
+#define APB_CTRL_WIFI_BB_CFG_2_M  ((APB_CTRL_WIFI_BB_CFG_2_V)<<(APB_CTRL_WIFI_BB_CFG_2_S))
+#define APB_CTRL_WIFI_BB_CFG_2_V  0xFFFFFFFF
+#define APB_CTRL_WIFI_BB_CFG_2_S  0
+
+#define APB_CTRL_WIFI_CLK_EN_REG          (DR_REG_APB_CTRL_BASE + 0x14)
+/* APB_CTRL_WIFI_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'hfffce030 ; */
+/*description: .*/
+#define APB_CTRL_WIFI_CLK_EN    0xFFFFFFFF
+#define APB_CTRL_WIFI_CLK_EN_M  ((APB_CTRL_WIFI_CLK_EN_V)<<(APB_CTRL_WIFI_CLK_EN_S))
+#define APB_CTRL_WIFI_CLK_EN_V  0xFFFFFFFF
+#define APB_CTRL_WIFI_CLK_EN_S  0
+
+#define APB_CTRL_WIFI_RST_EN_REG          (DR_REG_APB_CTRL_BASE + 0x18)
+/* APB_CTRL_WIFI_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define APB_CTRL_WIFI_RST    0xFFFFFFFF
+#define APB_CTRL_WIFI_RST_M  ((APB_CTRL_WIFI_RST_V)<<(APB_CTRL_WIFI_RST_S))
+#define APB_CTRL_WIFI_RST_V  0xFFFFFFFF
+#define APB_CTRL_WIFI_RST_S  0
+
+#define APB_CTRL_HOST_INF_SEL_REG          (DR_REG_APB_CTRL_BASE + 0x1C)
+/* APB_CTRL_PERI_IO_SWAP : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define APB_CTRL_PERI_IO_SWAP    0x000000FF
+#define APB_CTRL_PERI_IO_SWAP_M  ((APB_CTRL_PERI_IO_SWAP_V)<<(APB_CTRL_PERI_IO_SWAP_S))
+#define APB_CTRL_PERI_IO_SWAP_V  0xFF
+#define APB_CTRL_PERI_IO_SWAP_S  0
+
+#define APB_CTRL_EXT_MEM_PMS_LOCK_REG          (DR_REG_APB_CTRL_BASE + 0x20)
+/* APB_CTRL_EXT_MEM_PMS_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_EXT_MEM_PMS_LOCK    (BIT(0))
+#define APB_CTRL_EXT_MEM_PMS_LOCK_M  (BIT(0))
+#define APB_CTRL_EXT_MEM_PMS_LOCK_V  0x1
+#define APB_CTRL_EXT_MEM_PMS_LOCK_S  0
+
+#define APB_CTRL_EXT_MEM_WRITEBACK_BYPASS_REG          (DR_REG_APB_CTRL_BASE + 0x24)
+/* APB_CTRL_WRITEBACK_BYPASS : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set 1 to bypass cache writeback request to external memory so that spi will not
+check its attribute..*/
+#define APB_CTRL_WRITEBACK_BYPASS    (BIT(0))
+#define APB_CTRL_WRITEBACK_BYPASS_M  (BIT(0))
+#define APB_CTRL_WRITEBACK_BYPASS_V  0x1
+#define APB_CTRL_WRITEBACK_BYPASS_S  0
+
+#define APB_CTRL_FLASH_ACE0_ATTR_REG          (DR_REG_APB_CTRL_BASE + 0x28)
+/* APB_CTRL_FLASH_ACE0_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE0_ATTR    0x000001FF
+#define APB_CTRL_FLASH_ACE0_ATTR_M  ((APB_CTRL_FLASH_ACE0_ATTR_V)<<(APB_CTRL_FLASH_ACE0_ATTR_S))
+#define APB_CTRL_FLASH_ACE0_ATTR_V  0x1FF
+#define APB_CTRL_FLASH_ACE0_ATTR_S  0
+
+#define APB_CTRL_FLASH_ACE1_ATTR_REG          (DR_REG_APB_CTRL_BASE + 0x2C)
+/* APB_CTRL_FLASH_ACE1_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE1_ATTR    0x000001FF
+#define APB_CTRL_FLASH_ACE1_ATTR_M  ((APB_CTRL_FLASH_ACE1_ATTR_V)<<(APB_CTRL_FLASH_ACE1_ATTR_S))
+#define APB_CTRL_FLASH_ACE1_ATTR_V  0x1FF
+#define APB_CTRL_FLASH_ACE1_ATTR_S  0
+
+#define APB_CTRL_FLASH_ACE2_ATTR_REG          (DR_REG_APB_CTRL_BASE + 0x30)
+/* APB_CTRL_FLASH_ACE2_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE2_ATTR    0x000001FF
+#define APB_CTRL_FLASH_ACE2_ATTR_M  ((APB_CTRL_FLASH_ACE2_ATTR_V)<<(APB_CTRL_FLASH_ACE2_ATTR_S))
+#define APB_CTRL_FLASH_ACE2_ATTR_V  0x1FF
+#define APB_CTRL_FLASH_ACE2_ATTR_S  0
+
+#define APB_CTRL_FLASH_ACE3_ATTR_REG          (DR_REG_APB_CTRL_BASE + 0x34)
+/* APB_CTRL_FLASH_ACE3_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE3_ATTR    0x000001FF
+#define APB_CTRL_FLASH_ACE3_ATTR_M  ((APB_CTRL_FLASH_ACE3_ATTR_V)<<(APB_CTRL_FLASH_ACE3_ATTR_S))
+#define APB_CTRL_FLASH_ACE3_ATTR_V  0x1FF
+#define APB_CTRL_FLASH_ACE3_ATTR_S  0
+
+#define APB_CTRL_FLASH_ACE0_ADDR_REG          (DR_REG_APB_CTRL_BASE + 0x38)
+/* APB_CTRL_FLASH_ACE0_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE0_ADDR_S    0xFFFFFFFF
+#define APB_CTRL_FLASH_ACE0_ADDR_S_M  ((APB_CTRL_FLASH_ACE0_ADDR_S_V)<<(APB_CTRL_FLASH_ACE0_ADDR_S_S))
+#define APB_CTRL_FLASH_ACE0_ADDR_S_V  0xFFFFFFFF
+#define APB_CTRL_FLASH_ACE0_ADDR_S_S  0
+
+#define APB_CTRL_FLASH_ACE1_ADDR_REG          (DR_REG_APB_CTRL_BASE + 0x3C)
+/* APB_CTRL_FLASH_ACE1_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h10000000 ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE1_ADDR_S    0xFFFFFFFF
+#define APB_CTRL_FLASH_ACE1_ADDR_S_M  ((APB_CTRL_FLASH_ACE1_ADDR_S_V)<<(APB_CTRL_FLASH_ACE1_ADDR_S_S))
+#define APB_CTRL_FLASH_ACE1_ADDR_S_V  0xFFFFFFFF
+#define APB_CTRL_FLASH_ACE1_ADDR_S_S  0
+
+#define APB_CTRL_FLASH_ACE2_ADDR_REG          (DR_REG_APB_CTRL_BASE + 0x40)
+/* APB_CTRL_FLASH_ACE2_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h20000000 ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE2_ADDR_S    0xFFFFFFFF
+#define APB_CTRL_FLASH_ACE2_ADDR_S_M  ((APB_CTRL_FLASH_ACE2_ADDR_S_V)<<(APB_CTRL_FLASH_ACE2_ADDR_S_S))
+#define APB_CTRL_FLASH_ACE2_ADDR_S_V  0xFFFFFFFF
+#define APB_CTRL_FLASH_ACE2_ADDR_S_S  0
+
+#define APB_CTRL_FLASH_ACE3_ADDR_REG          (DR_REG_APB_CTRL_BASE + 0x44)
+/* APB_CTRL_FLASH_ACE3_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h30000000 ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE3_ADDR_S    0xFFFFFFFF
+#define APB_CTRL_FLASH_ACE3_ADDR_S_M  ((APB_CTRL_FLASH_ACE3_ADDR_S_V)<<(APB_CTRL_FLASH_ACE3_ADDR_S_S))
+#define APB_CTRL_FLASH_ACE3_ADDR_S_V  0xFFFFFFFF
+#define APB_CTRL_FLASH_ACE3_ADDR_S_S  0
+
+#define APB_CTRL_FLASH_ACE0_SIZE_REG          (DR_REG_APB_CTRL_BASE + 0x48)
+/* APB_CTRL_FLASH_ACE0_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE0_SIZE    0x0000FFFF
+#define APB_CTRL_FLASH_ACE0_SIZE_M  ((APB_CTRL_FLASH_ACE0_SIZE_V)<<(APB_CTRL_FLASH_ACE0_SIZE_S))
+#define APB_CTRL_FLASH_ACE0_SIZE_V  0xFFFF
+#define APB_CTRL_FLASH_ACE0_SIZE_S  0
+
+#define APB_CTRL_FLASH_ACE1_SIZE_REG          (DR_REG_APB_CTRL_BASE + 0x4C)
+/* APB_CTRL_FLASH_ACE1_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE1_SIZE    0x0000FFFF
+#define APB_CTRL_FLASH_ACE1_SIZE_M  ((APB_CTRL_FLASH_ACE1_SIZE_V)<<(APB_CTRL_FLASH_ACE1_SIZE_S))
+#define APB_CTRL_FLASH_ACE1_SIZE_V  0xFFFF
+#define APB_CTRL_FLASH_ACE1_SIZE_S  0
+
+#define APB_CTRL_FLASH_ACE2_SIZE_REG          (DR_REG_APB_CTRL_BASE + 0x50)
+/* APB_CTRL_FLASH_ACE2_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE2_SIZE    0x0000FFFF
+#define APB_CTRL_FLASH_ACE2_SIZE_M  ((APB_CTRL_FLASH_ACE2_SIZE_V)<<(APB_CTRL_FLASH_ACE2_SIZE_S))
+#define APB_CTRL_FLASH_ACE2_SIZE_V  0xFFFF
+#define APB_CTRL_FLASH_ACE2_SIZE_S  0
+
+#define APB_CTRL_FLASH_ACE3_SIZE_REG          (DR_REG_APB_CTRL_BASE + 0x54)
+/* APB_CTRL_FLASH_ACE3_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define APB_CTRL_FLASH_ACE3_SIZE    0x0000FFFF
+#define APB_CTRL_FLASH_ACE3_SIZE_M  ((APB_CTRL_FLASH_ACE3_SIZE_V)<<(APB_CTRL_FLASH_ACE3_SIZE_S))
+#define APB_CTRL_FLASH_ACE3_SIZE_V  0xFFFF
+#define APB_CTRL_FLASH_ACE3_SIZE_S  0
+
+#define APB_CTRL_SRAM_ACE0_ATTR_REG          (DR_REG_APB_CTRL_BASE + 0x58)
+/* APB_CTRL_SRAM_ACE0_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE0_ATTR    0x000001FF
+#define APB_CTRL_SRAM_ACE0_ATTR_M  ((APB_CTRL_SRAM_ACE0_ATTR_V)<<(APB_CTRL_SRAM_ACE0_ATTR_S))
+#define APB_CTRL_SRAM_ACE0_ATTR_V  0x1FF
+#define APB_CTRL_SRAM_ACE0_ATTR_S  0
+
+#define APB_CTRL_SRAM_ACE1_ATTR_REG          (DR_REG_APB_CTRL_BASE + 0x5C)
+/* APB_CTRL_SRAM_ACE1_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE1_ATTR    0x000001FF
+#define APB_CTRL_SRAM_ACE1_ATTR_M  ((APB_CTRL_SRAM_ACE1_ATTR_V)<<(APB_CTRL_SRAM_ACE1_ATTR_S))
+#define APB_CTRL_SRAM_ACE1_ATTR_V  0x1FF
+#define APB_CTRL_SRAM_ACE1_ATTR_S  0
+
+#define APB_CTRL_SRAM_ACE2_ATTR_REG          (DR_REG_APB_CTRL_BASE + 0x60)
+/* APB_CTRL_SRAM_ACE2_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE2_ATTR    0x000001FF
+#define APB_CTRL_SRAM_ACE2_ATTR_M  ((APB_CTRL_SRAM_ACE2_ATTR_V)<<(APB_CTRL_SRAM_ACE2_ATTR_S))
+#define APB_CTRL_SRAM_ACE2_ATTR_V  0x1FF
+#define APB_CTRL_SRAM_ACE2_ATTR_S  0
+
+#define APB_CTRL_SRAM_ACE3_ATTR_REG          (DR_REG_APB_CTRL_BASE + 0x64)
+/* APB_CTRL_SRAM_ACE3_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE3_ATTR    0x000001FF
+#define APB_CTRL_SRAM_ACE3_ATTR_M  ((APB_CTRL_SRAM_ACE3_ATTR_V)<<(APB_CTRL_SRAM_ACE3_ATTR_S))
+#define APB_CTRL_SRAM_ACE3_ATTR_V  0x1FF
+#define APB_CTRL_SRAM_ACE3_ATTR_S  0
+
+#define APB_CTRL_SRAM_ACE0_ADDR_REG          (DR_REG_APB_CTRL_BASE + 0x68)
+/* APB_CTRL_SRAM_ACE0_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE0_ADDR_S    0xFFFFFFFF
+#define APB_CTRL_SRAM_ACE0_ADDR_S_M  ((APB_CTRL_SRAM_ACE0_ADDR_S_V)<<(APB_CTRL_SRAM_ACE0_ADDR_S_S))
+#define APB_CTRL_SRAM_ACE0_ADDR_S_V  0xFFFFFFFF
+#define APB_CTRL_SRAM_ACE0_ADDR_S_S  0
+
+#define APB_CTRL_SRAM_ACE1_ADDR_REG          (DR_REG_APB_CTRL_BASE + 0x6C)
+/* APB_CTRL_SRAM_ACE1_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h10000000 ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE1_ADDR_S    0xFFFFFFFF
+#define APB_CTRL_SRAM_ACE1_ADDR_S_M  ((APB_CTRL_SRAM_ACE1_ADDR_S_V)<<(APB_CTRL_SRAM_ACE1_ADDR_S_S))
+#define APB_CTRL_SRAM_ACE1_ADDR_S_V  0xFFFFFFFF
+#define APB_CTRL_SRAM_ACE1_ADDR_S_S  0
+
+#define APB_CTRL_SRAM_ACE2_ADDR_REG          (DR_REG_APB_CTRL_BASE + 0x70)
+/* APB_CTRL_SRAM_ACE2_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h20000000 ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE2_ADDR_S    0xFFFFFFFF
+#define APB_CTRL_SRAM_ACE2_ADDR_S_M  ((APB_CTRL_SRAM_ACE2_ADDR_S_V)<<(APB_CTRL_SRAM_ACE2_ADDR_S_S))
+#define APB_CTRL_SRAM_ACE2_ADDR_S_V  0xFFFFFFFF
+#define APB_CTRL_SRAM_ACE2_ADDR_S_S  0
+
+#define APB_CTRL_SRAM_ACE3_ADDR_REG          (DR_REG_APB_CTRL_BASE + 0x74)
+/* APB_CTRL_SRAM_ACE3_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h30000000 ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE3_ADDR_S    0xFFFFFFFF
+#define APB_CTRL_SRAM_ACE3_ADDR_S_M  ((APB_CTRL_SRAM_ACE3_ADDR_S_V)<<(APB_CTRL_SRAM_ACE3_ADDR_S_S))
+#define APB_CTRL_SRAM_ACE3_ADDR_S_V  0xFFFFFFFF
+#define APB_CTRL_SRAM_ACE3_ADDR_S_S  0
+
+#define APB_CTRL_SRAM_ACE0_SIZE_REG          (DR_REG_APB_CTRL_BASE + 0x78)
+/* APB_CTRL_SRAM_ACE0_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE0_SIZE    0x0000FFFF
+#define APB_CTRL_SRAM_ACE0_SIZE_M  ((APB_CTRL_SRAM_ACE0_SIZE_V)<<(APB_CTRL_SRAM_ACE0_SIZE_S))
+#define APB_CTRL_SRAM_ACE0_SIZE_V  0xFFFF
+#define APB_CTRL_SRAM_ACE0_SIZE_S  0
+
+#define APB_CTRL_SRAM_ACE1_SIZE_REG          (DR_REG_APB_CTRL_BASE + 0x7C)
+/* APB_CTRL_SRAM_ACE1_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE1_SIZE    0x0000FFFF
+#define APB_CTRL_SRAM_ACE1_SIZE_M  ((APB_CTRL_SRAM_ACE1_SIZE_V)<<(APB_CTRL_SRAM_ACE1_SIZE_S))
+#define APB_CTRL_SRAM_ACE1_SIZE_V  0xFFFF
+#define APB_CTRL_SRAM_ACE1_SIZE_S  0
+
+#define APB_CTRL_SRAM_ACE2_SIZE_REG          (DR_REG_APB_CTRL_BASE + 0x80)
+/* APB_CTRL_SRAM_ACE2_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE2_SIZE    0x0000FFFF
+#define APB_CTRL_SRAM_ACE2_SIZE_M  ((APB_CTRL_SRAM_ACE2_SIZE_V)<<(APB_CTRL_SRAM_ACE2_SIZE_S))
+#define APB_CTRL_SRAM_ACE2_SIZE_V  0xFFFF
+#define APB_CTRL_SRAM_ACE2_SIZE_S  0
+
+#define APB_CTRL_SRAM_ACE3_SIZE_REG          (DR_REG_APB_CTRL_BASE + 0x84)
+/* APB_CTRL_SRAM_ACE3_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define APB_CTRL_SRAM_ACE3_SIZE    0x0000FFFF
+#define APB_CTRL_SRAM_ACE3_SIZE_M  ((APB_CTRL_SRAM_ACE3_SIZE_V)<<(APB_CTRL_SRAM_ACE3_SIZE_S))
+#define APB_CTRL_SRAM_ACE3_SIZE_V  0xFFFF
+#define APB_CTRL_SRAM_ACE3_SIZE_S  0
+
+#define APB_CTRL_SPI_MEM_PMS_CTRL_REG          (DR_REG_APB_CTRL_BASE + 0x88)
+/* APB_CTRL_SPI_MEM_REJECT_CDE : RO ;bitpos:[6:2] ;default: 5'h0 ; */
+/*description: .*/
+#define APB_CTRL_SPI_MEM_REJECT_CDE    0x0000001F
+#define APB_CTRL_SPI_MEM_REJECT_CDE_M  ((APB_CTRL_SPI_MEM_REJECT_CDE_V)<<(APB_CTRL_SPI_MEM_REJECT_CDE_S))
+#define APB_CTRL_SPI_MEM_REJECT_CDE_V  0x1F
+#define APB_CTRL_SPI_MEM_REJECT_CDE_S  2
+/* APB_CTRL_SPI_MEM_REJECT_CLR : WOD ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_SPI_MEM_REJECT_CLR    (BIT(1))
+#define APB_CTRL_SPI_MEM_REJECT_CLR_M  (BIT(1))
+#define APB_CTRL_SPI_MEM_REJECT_CLR_V  0x1
+#define APB_CTRL_SPI_MEM_REJECT_CLR_S  1
+/* APB_CTRL_SPI_MEM_REJECT_INT : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_SPI_MEM_REJECT_INT    (BIT(0))
+#define APB_CTRL_SPI_MEM_REJECT_INT_M  (BIT(0))
+#define APB_CTRL_SPI_MEM_REJECT_INT_V  0x1
+#define APB_CTRL_SPI_MEM_REJECT_INT_S  0
+
+#define APB_CTRL_SPI_MEM_REJECT_ADDR_REG          (DR_REG_APB_CTRL_BASE + 0x8C)
+/* APB_CTRL_SPI_MEM_REJECT_ADDR : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define APB_CTRL_SPI_MEM_REJECT_ADDR    0xFFFFFFFF
+#define APB_CTRL_SPI_MEM_REJECT_ADDR_M  ((APB_CTRL_SPI_MEM_REJECT_ADDR_V)<<(APB_CTRL_SPI_MEM_REJECT_ADDR_S))
+#define APB_CTRL_SPI_MEM_REJECT_ADDR_V  0xFFFFFFFF
+#define APB_CTRL_SPI_MEM_REJECT_ADDR_S  0
+
+#define APB_CTRL_SDIO_CTRL_REG          (DR_REG_APB_CTRL_BASE + 0x90)
+/* APB_CTRL_SDIO_WIN_ACCESS_EN : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: .*/
+#define APB_CTRL_SDIO_WIN_ACCESS_EN    (BIT(0))
+#define APB_CTRL_SDIO_WIN_ACCESS_EN_M  (BIT(0))
+#define APB_CTRL_SDIO_WIN_ACCESS_EN_V  0x1
+#define APB_CTRL_SDIO_WIN_ACCESS_EN_S  0
+
+#define APB_CTRL_REDCY_SIG0_REG          (DR_REG_APB_CTRL_BASE + 0x94)
+/* APB_CTRL_REDCY_ANDOR : RO ;bitpos:[31] ;default: 1'h0 ; */
+/*description: .*/
+#define APB_CTRL_REDCY_ANDOR    (BIT(31))
+#define APB_CTRL_REDCY_ANDOR_M  (BIT(31))
+#define APB_CTRL_REDCY_ANDOR_V  0x1
+#define APB_CTRL_REDCY_ANDOR_S  31
+/* APB_CTRL_REDCY_SIG0 : R/W ;bitpos:[30:0] ;default: 31'h0 ; */
+/*description: .*/
+#define APB_CTRL_REDCY_SIG0    0x7FFFFFFF
+#define APB_CTRL_REDCY_SIG0_M  ((APB_CTRL_REDCY_SIG0_V)<<(APB_CTRL_REDCY_SIG0_S))
+#define APB_CTRL_REDCY_SIG0_V  0x7FFFFFFF
+#define APB_CTRL_REDCY_SIG0_S  0
+
+#define APB_CTRL_REDCY_SIG1_REG          (DR_REG_APB_CTRL_BASE + 0x98)
+/* APB_CTRL_REDCY_NANDOR : RO ;bitpos:[31] ;default: 1'h0 ; */
+/*description: .*/
+#define APB_CTRL_REDCY_NANDOR    (BIT(31))
+#define APB_CTRL_REDCY_NANDOR_M  (BIT(31))
+#define APB_CTRL_REDCY_NANDOR_V  0x1
+#define APB_CTRL_REDCY_NANDOR_S  31
+/* APB_CTRL_REDCY_SIG1 : R/W ;bitpos:[30:0] ;default: 31'h0 ; */
+/*description: .*/
+#define APB_CTRL_REDCY_SIG1    0x7FFFFFFF
+#define APB_CTRL_REDCY_SIG1_M  ((APB_CTRL_REDCY_SIG1_V)<<(APB_CTRL_REDCY_SIG1_S))
+#define APB_CTRL_REDCY_SIG1_V  0x7FFFFFFF
+#define APB_CTRL_REDCY_SIG1_S  0
+
+#define APB_CTRL_FRONT_END_MEM_PD_REG          (DR_REG_APB_CTRL_BASE + 0x9C)
+/* APB_CTRL_FREQ_MEM_FORCE_PD : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_FREQ_MEM_FORCE_PD    (BIT(7))
+#define APB_CTRL_FREQ_MEM_FORCE_PD_M  (BIT(7))
+#define APB_CTRL_FREQ_MEM_FORCE_PD_V  0x1
+#define APB_CTRL_FREQ_MEM_FORCE_PD_S  7
+/* APB_CTRL_FREQ_MEM_FORCE_PU : R/W ;bitpos:[6] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_FREQ_MEM_FORCE_PU    (BIT(6))
+#define APB_CTRL_FREQ_MEM_FORCE_PU_M  (BIT(6))
+#define APB_CTRL_FREQ_MEM_FORCE_PU_V  0x1
+#define APB_CTRL_FREQ_MEM_FORCE_PU_S  6
+/* APB_CTRL_DC_MEM_FORCE_PD : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_DC_MEM_FORCE_PD    (BIT(5))
+#define APB_CTRL_DC_MEM_FORCE_PD_M  (BIT(5))
+#define APB_CTRL_DC_MEM_FORCE_PD_V  0x1
+#define APB_CTRL_DC_MEM_FORCE_PD_S  5
+/* APB_CTRL_DC_MEM_FORCE_PU : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_DC_MEM_FORCE_PU    (BIT(4))
+#define APB_CTRL_DC_MEM_FORCE_PU_M  (BIT(4))
+#define APB_CTRL_DC_MEM_FORCE_PU_V  0x1
+#define APB_CTRL_DC_MEM_FORCE_PU_S  4
+/* APB_CTRL_PBUS_MEM_FORCE_PD : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_PBUS_MEM_FORCE_PD    (BIT(3))
+#define APB_CTRL_PBUS_MEM_FORCE_PD_M  (BIT(3))
+#define APB_CTRL_PBUS_MEM_FORCE_PD_V  0x1
+#define APB_CTRL_PBUS_MEM_FORCE_PD_S  3
+/* APB_CTRL_PBUS_MEM_FORCE_PU : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_PBUS_MEM_FORCE_PU    (BIT(2))
+#define APB_CTRL_PBUS_MEM_FORCE_PU_M  (BIT(2))
+#define APB_CTRL_PBUS_MEM_FORCE_PU_V  0x1
+#define APB_CTRL_PBUS_MEM_FORCE_PU_S  2
+/* APB_CTRL_AGC_MEM_FORCE_PD : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_AGC_MEM_FORCE_PD    (BIT(1))
+#define APB_CTRL_AGC_MEM_FORCE_PD_M  (BIT(1))
+#define APB_CTRL_AGC_MEM_FORCE_PD_V  0x1
+#define APB_CTRL_AGC_MEM_FORCE_PD_S  1
+/* APB_CTRL_AGC_MEM_FORCE_PU : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_CTRL_AGC_MEM_FORCE_PU    (BIT(0))
+#define APB_CTRL_AGC_MEM_FORCE_PU_M  (BIT(0))
+#define APB_CTRL_AGC_MEM_FORCE_PU_V  0x1
+#define APB_CTRL_AGC_MEM_FORCE_PU_S  0
+
+#define APB_CTRL_SPI_MEM_ECC_CTRL_REG          (DR_REG_APB_CTRL_BASE + 0xA0)
+/* APB_CTRL_SRAM_PAGE_SIZE : R/W ;bitpos:[21:20] ;default: 2'd2 ; */
+/*description: Set the page size of the used MSPI external RAM. 0: 256 bytes. 1: 512 bytes. 2:
+1024 bytes. 3: 2048 bytes..*/
+#define APB_CTRL_SRAM_PAGE_SIZE    0x00000003
+#define APB_CTRL_SRAM_PAGE_SIZE_M  ((APB_CTRL_SRAM_PAGE_SIZE_V)<<(APB_CTRL_SRAM_PAGE_SIZE_S))
+#define APB_CTRL_SRAM_PAGE_SIZE_V  0x3
+#define APB_CTRL_SRAM_PAGE_SIZE_S  20
+/* APB_CTRL_FLASH_PAGE_SIZE : R/W ;bitpos:[19:18] ;default: 2'd0 ; */
+/*description: Set the page size of the used MSPI flash. 0: 256 bytes. 1: 512 bytes. 2: 1024 by
+tes. 3: 2048 bytes..*/
+#define APB_CTRL_FLASH_PAGE_SIZE    0x00000003
+#define APB_CTRL_FLASH_PAGE_SIZE_M  ((APB_CTRL_FLASH_PAGE_SIZE_V)<<(APB_CTRL_FLASH_PAGE_SIZE_S))
+#define APB_CTRL_FLASH_PAGE_SIZE_V  0x3
+#define APB_CTRL_FLASH_PAGE_SIZE_S  18
+
+#define APB_CTRL_CLKGATE_FORCE_ON_REG          (DR_REG_APB_CTRL_BASE + 0xA8)
+/* APB_CTRL_SRAM_CLKGATE_FORCE_ON : R/W ;bitpos:[13:3] ;default: ~11'b0 ; */
+/*description: .*/
+#define APB_CTRL_SRAM_CLKGATE_FORCE_ON    0x000007FF
+#define APB_CTRL_SRAM_CLKGATE_FORCE_ON_M  ((APB_CTRL_SRAM_CLKGATE_FORCE_ON_V)<<(APB_CTRL_SRAM_CLKGATE_FORCE_ON_S))
+#define APB_CTRL_SRAM_CLKGATE_FORCE_ON_V  0x7FF
+#define APB_CTRL_SRAM_CLKGATE_FORCE_ON_S  3
+/* APB_CTRL_ROM_CLKGATE_FORCE_ON : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define APB_CTRL_ROM_CLKGATE_FORCE_ON    0x00000007
+#define APB_CTRL_ROM_CLKGATE_FORCE_ON_M  ((APB_CTRL_ROM_CLKGATE_FORCE_ON_V)<<(APB_CTRL_ROM_CLKGATE_FORCE_ON_S))
+#define APB_CTRL_ROM_CLKGATE_FORCE_ON_V  0x7
+#define APB_CTRL_ROM_CLKGATE_FORCE_ON_S  0
+
+#define APB_CTRL_MEM_POWER_DOWN_REG          (DR_REG_APB_CTRL_BASE + 0xAC)
+/* APB_CTRL_SRAM_POWER_DOWN : R/W ;bitpos:[13:3] ;default: 11'b0 ; */
+/*description: .*/
+#define APB_CTRL_SRAM_POWER_DOWN    0x000007FF
+#define APB_CTRL_SRAM_POWER_DOWN_M  ((APB_CTRL_SRAM_POWER_DOWN_V)<<(APB_CTRL_SRAM_POWER_DOWN_S))
+#define APB_CTRL_SRAM_POWER_DOWN_V  0x7FF
+#define APB_CTRL_SRAM_POWER_DOWN_S  3
+/* APB_CTRL_ROM_POWER_DOWN : R/W ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: .*/
+#define APB_CTRL_ROM_POWER_DOWN    0x00000007
+#define APB_CTRL_ROM_POWER_DOWN_M  ((APB_CTRL_ROM_POWER_DOWN_V)<<(APB_CTRL_ROM_POWER_DOWN_S))
+#define APB_CTRL_ROM_POWER_DOWN_V  0x7
+#define APB_CTRL_ROM_POWER_DOWN_S  0
+
+#define APB_CTRL_MEM_POWER_UP_REG          (DR_REG_APB_CTRL_BASE + 0xB0)
+/* APB_CTRL_SRAM_POWER_UP : R/W ;bitpos:[13:3] ;default: ~11'b0 ; */
+/*description: .*/
+#define APB_CTRL_SRAM_POWER_UP    0x000007FF
+#define APB_CTRL_SRAM_POWER_UP_M  ((APB_CTRL_SRAM_POWER_UP_V)<<(APB_CTRL_SRAM_POWER_UP_S))
+#define APB_CTRL_SRAM_POWER_UP_V  0x7FF
+#define APB_CTRL_SRAM_POWER_UP_S  3
+/* APB_CTRL_ROM_POWER_UP : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define APB_CTRL_ROM_POWER_UP    0x00000007
+#define APB_CTRL_ROM_POWER_UP_M  ((APB_CTRL_ROM_POWER_UP_V)<<(APB_CTRL_ROM_POWER_UP_S))
+#define APB_CTRL_ROM_POWER_UP_V  0x7
+#define APB_CTRL_ROM_POWER_UP_S  0
+
+#define APB_CTRL_RETENTION_CTRL_REG          (DR_REG_APB_CTRL_BASE + 0xB4)
+/* APB_CTRL_NOBYPASS_CPU_ISO_RST : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_NOBYPASS_CPU_ISO_RST    (BIT(27))
+#define APB_CTRL_NOBYPASS_CPU_ISO_RST_M  (BIT(27))
+#define APB_CTRL_NOBYPASS_CPU_ISO_RST_V  0x1
+#define APB_CTRL_NOBYPASS_CPU_ISO_RST_S  27
+/* APB_CTRL_RETENTION_CPU_LINK_ADDR : R/W ;bitpos:[26:0] ;default: 27'd0 ; */
+/*description: .*/
+#define APB_CTRL_RETENTION_CPU_LINK_ADDR    0x07FFFFFF
+#define APB_CTRL_RETENTION_CPU_LINK_ADDR_M  ((APB_CTRL_RETENTION_CPU_LINK_ADDR_V)<<(APB_CTRL_RETENTION_CPU_LINK_ADDR_S))
+#define APB_CTRL_RETENTION_CPU_LINK_ADDR_V  0x7FFFFFF
+#define APB_CTRL_RETENTION_CPU_LINK_ADDR_S  0
+
+#define APB_CTRL_RETENTION_CTRL1_REG          (DR_REG_APB_CTRL_BASE + 0xB8)
+/* APB_CTRL_RETENTION_TAG_LINK_ADDR : R/W ;bitpos:[26:0] ;default: 27'd0 ; */
+/*description: .*/
+#define APB_CTRL_RETENTION_TAG_LINK_ADDR    0x07FFFFFF
+#define APB_CTRL_RETENTION_TAG_LINK_ADDR_M  ((APB_CTRL_RETENTION_TAG_LINK_ADDR_V)<<(APB_CTRL_RETENTION_TAG_LINK_ADDR_S))
+#define APB_CTRL_RETENTION_TAG_LINK_ADDR_V  0x7FFFFFF
+#define APB_CTRL_RETENTION_TAG_LINK_ADDR_S  0
+
+#define APB_CTRL_RETENTION_CTRL2_REG          (DR_REG_APB_CTRL_BASE + 0xBC)
+/* APB_CTRL_RET_ICACHE_ENABLE : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_RET_ICACHE_ENABLE    (BIT(31))
+#define APB_CTRL_RET_ICACHE_ENABLE_M  (BIT(31))
+#define APB_CTRL_RET_ICACHE_ENABLE_V  0x1
+#define APB_CTRL_RET_ICACHE_ENABLE_S  31
+/* APB_CTRL_RET_ICACHE_START_POINT : R/W ;bitpos:[29:22] ;default: 8'd0 ; */
+/*description: .*/
+#define APB_CTRL_RET_ICACHE_START_POINT    0x000000FF
+#define APB_CTRL_RET_ICACHE_START_POINT_M  ((APB_CTRL_RET_ICACHE_START_POINT_V)<<(APB_CTRL_RET_ICACHE_START_POINT_S))
+#define APB_CTRL_RET_ICACHE_START_POINT_V  0xFF
+#define APB_CTRL_RET_ICACHE_START_POINT_S  22
+/* APB_CTRL_RET_ICACHE_VLD_SIZE : R/W ;bitpos:[20:13] ;default: 8'hff ; */
+/*description: .*/
+#define APB_CTRL_RET_ICACHE_VLD_SIZE    0x000000FF
+#define APB_CTRL_RET_ICACHE_VLD_SIZE_M  ((APB_CTRL_RET_ICACHE_VLD_SIZE_V)<<(APB_CTRL_RET_ICACHE_VLD_SIZE_S))
+#define APB_CTRL_RET_ICACHE_VLD_SIZE_V  0xFF
+#define APB_CTRL_RET_ICACHE_VLD_SIZE_S  13
+/* APB_CTRL_RET_ICACHE_SIZE : R/W ;bitpos:[11:4] ;default: 8'hff ; */
+/*description: .*/
+#define APB_CTRL_RET_ICACHE_SIZE    0x000000FF
+#define APB_CTRL_RET_ICACHE_SIZE_M  ((APB_CTRL_RET_ICACHE_SIZE_V)<<(APB_CTRL_RET_ICACHE_SIZE_S))
+#define APB_CTRL_RET_ICACHE_SIZE_V  0xFF
+#define APB_CTRL_RET_ICACHE_SIZE_S  4
+
+#define APB_CTRL_RETENTION_CTRL3_REG          (DR_REG_APB_CTRL_BASE + 0xC0)
+/* APB_CTRL_RET_DCACHE_ENABLE : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_RET_DCACHE_ENABLE    (BIT(31))
+#define APB_CTRL_RET_DCACHE_ENABLE_M  (BIT(31))
+#define APB_CTRL_RET_DCACHE_ENABLE_V  0x1
+#define APB_CTRL_RET_DCACHE_ENABLE_S  31
+/* APB_CTRL_RET_DCACHE_START_POINT : R/W ;bitpos:[30:22] ;default: 9'd0 ; */
+/*description: .*/
+#define APB_CTRL_RET_DCACHE_START_POINT    0x000001FF
+#define APB_CTRL_RET_DCACHE_START_POINT_M  ((APB_CTRL_RET_DCACHE_START_POINT_V)<<(APB_CTRL_RET_DCACHE_START_POINT_S))
+#define APB_CTRL_RET_DCACHE_START_POINT_V  0x1FF
+#define APB_CTRL_RET_DCACHE_START_POINT_S  22
+/* APB_CTRL_RET_DCACHE_VLD_SIZE : R/W ;bitpos:[21:13] ;default: 9'h1ff ; */
+/*description: .*/
+#define APB_CTRL_RET_DCACHE_VLD_SIZE    0x000001FF
+#define APB_CTRL_RET_DCACHE_VLD_SIZE_M  ((APB_CTRL_RET_DCACHE_VLD_SIZE_V)<<(APB_CTRL_RET_DCACHE_VLD_SIZE_S))
+#define APB_CTRL_RET_DCACHE_VLD_SIZE_V  0x1FF
+#define APB_CTRL_RET_DCACHE_VLD_SIZE_S  13
+/* APB_CTRL_RET_DCACHE_SIZE : R/W ;bitpos:[12:4] ;default: 9'h1ff ; */
+/*description: .*/
+#define APB_CTRL_RET_DCACHE_SIZE    0x000001FF
+#define APB_CTRL_RET_DCACHE_SIZE_M  ((APB_CTRL_RET_DCACHE_SIZE_V)<<(APB_CTRL_RET_DCACHE_SIZE_S))
+#define APB_CTRL_RET_DCACHE_SIZE_V  0x1FF
+#define APB_CTRL_RET_DCACHE_SIZE_S  4
+
+#define APB_CTRL_RETENTION_CTRL4_REG          (DR_REG_APB_CTRL_BASE + 0xC4)
+/* APB_CTRL_RETENTION_INV_CFG : R/W ;bitpos:[31:0] ;default: ~32'h0 ; */
+/*description: .*/
+#define APB_CTRL_RETENTION_INV_CFG    0xFFFFFFFF
+#define APB_CTRL_RETENTION_INV_CFG_M  ((APB_CTRL_RETENTION_INV_CFG_V)<<(APB_CTRL_RETENTION_INV_CFG_S))
+#define APB_CTRL_RETENTION_INV_CFG_V  0xFFFFFFFF
+#define APB_CTRL_RETENTION_INV_CFG_S  0
+
+#define APB_CTRL_RETENTION_CTRL5_REG          (DR_REG_APB_CTRL_BASE + 0xC8)
+/* APB_CTRL_RETENTION_DISABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_CTRL_RETENTION_DISABLE    (BIT(0))
+#define APB_CTRL_RETENTION_DISABLE_M  (BIT(0))
+#define APB_CTRL_RETENTION_DISABLE_V  0x1
+#define APB_CTRL_RETENTION_DISABLE_S  0
+
+#define APB_CTRL_DATE_REG          (DR_REG_APB_CTRL_BASE + 0x3FC)
+/* APB_CTRL_DATE : R/W ;bitpos:[31:0] ;default: 32'h2101150 ; */
+/*description: Version control.*/
+#define APB_CTRL_DATE    0xFFFFFFFF
+#define APB_CTRL_DATE_M  ((APB_CTRL_DATE_V)<<(APB_CTRL_DATE_S))
+#define APB_CTRL_DATE_V  0xFFFFFFFF
+#define APB_CTRL_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_APB_CTRL_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_ctrl_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_ctrl_struct.h
new file mode 100644
index 00000000000..b47dff17396
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_ctrl_struct.h
@@ -0,0 +1,543 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_APB_CTRL_STRUCT_H_
+#define _SOC_APB_CTRL_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct apb_ctrl_dev_s {
+    union {
+        struct {
+            uint32_t pre_div                       :    10;
+            uint32_t clk_320m_en                   :    1;
+            uint32_t clk_en                        :    1;
+            uint32_t rst_tick                      :    1;
+            uint32_t reserved13                    :    19;
+        };
+        uint32_t val;
+    } clk_conf;
+    union {
+        struct {
+            uint32_t xtal_tick                     :    8;
+            uint32_t ck8m_tick                     :    8;
+            uint32_t tick_enable                   :    1;
+            uint32_t reserved17                    :    15;
+        };
+        uint32_t val;
+    } tick_conf;
+    union {
+        struct {
+            uint32_t clk20_oen                     :    1;
+            uint32_t clk22_oen                     :    1;
+            uint32_t clk44_oen                     :    1;
+            uint32_t clk_bb_oen                    :    1;
+            uint32_t clk80_oen                     :    1;
+            uint32_t clk160_oen                    :    1;
+            uint32_t clk_320m_oen                  :    1;
+            uint32_t clk_adc_inf_oen               :    1;
+            uint32_t clk_dac_cpu_oen               :    1;
+            uint32_t clk40x_bb_oen                 :    1;
+            uint32_t clk_xtal_oen                  :    1;
+            uint32_t reserved11                    :    21;
+        };
+        uint32_t val;
+    } clk_out_en;
+    uint32_t wifi_bb_cfg;
+    uint32_t wifi_bb_cfg_2;
+    uint32_t wifi_clk_en;
+    uint32_t wifi_rst_en;
+    union {
+        struct {
+            uint32_t peri_io_swap                  :    8;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } host_inf_sel;
+    union {
+        struct {
+            uint32_t ext_mem_pms_lock              :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } ext_mem_pms_lock;
+    union {
+        struct {
+            uint32_t writeback_bypass              :    1;  /*Set 1 to bypass cache writeback request to external memory so that spi will not check its attribute.*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } ext_mem_writeback_bypass;
+    union {
+        struct {
+            uint32_t flash_ace0_attr               :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } flash_ace0_attr;
+    union {
+        struct {
+            uint32_t flash_ace1_attr               :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } flash_ace1_attr;
+    union {
+        struct {
+            uint32_t flash_ace2_attr               :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } flash_ace2_attr;
+    union {
+        struct {
+            uint32_t flash_ace3_attr               :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } flash_ace3_attr;
+    uint32_t flash_ace0_addr;
+    uint32_t flash_ace1_addr;
+    uint32_t flash_ace2_addr;
+    uint32_t flash_ace3_addr;
+    union {
+        struct {
+            uint32_t flash_ace0_size               :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } flash_ace0_size;
+    union {
+        struct {
+            uint32_t flash_ace1_size               :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } flash_ace1_size;
+    union {
+        struct {
+            uint32_t flash_ace2_size               :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } flash_ace2_size;
+    union {
+        struct {
+            uint32_t flash_ace3_size               :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } flash_ace3_size;
+    union {
+        struct {
+            uint32_t sram_ace0_attr                :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } sram_ace0_attr;
+    union {
+        struct {
+            uint32_t sram_ace1_attr                :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } sram_ace1_attr;
+    union {
+        struct {
+            uint32_t sram_ace2_attr                :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } sram_ace2_attr;
+    union {
+        struct {
+            uint32_t sram_ace3_attr                :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } sram_ace3_attr;
+    uint32_t sram_ace0_addr;
+    uint32_t sram_ace1_addr;
+    uint32_t sram_ace2_addr;
+    uint32_t sram_ace3_addr;
+    union {
+        struct {
+            uint32_t sram_ace0_size                :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } sram_ace0_size;
+    union {
+        struct {
+            uint32_t sram_ace1_size                :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } sram_ace1_size;
+    union {
+        struct {
+            uint32_t sram_ace2_size                :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } sram_ace2_size;
+    union {
+        struct {
+            uint32_t sram_ace3_size                :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } sram_ace3_size;
+    union {
+        struct {
+            uint32_t spi_mem_reject_int            :    1;
+            uint32_t spi_mem_reject_clr            :    1;
+            uint32_t spi_mem_reject_cde            :    5;
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } spi_mem_pms_ctrl;
+    uint32_t spi_mem_reject_addr;
+    union {
+        struct {
+            uint32_t sdio_win_access_en            :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } sdio_ctrl;
+    union {
+        struct {
+            uint32_t redcy_sig0                    :    31;
+            uint32_t redcy_andor                   :    1;
+        };
+        uint32_t val;
+    } redcy_sig0;
+    union {
+        struct {
+            uint32_t redcy_sig1                    :    31;
+            uint32_t redcy_nandor                  :    1;
+        };
+        uint32_t val;
+    } redcy_sig1;
+    union {
+        struct {
+            uint32_t agc_mem_force_pu              :    1;
+            uint32_t agc_mem_force_pd              :    1;
+            uint32_t pbus_mem_force_pu             :    1;
+            uint32_t pbus_mem_force_pd             :    1;
+            uint32_t dc_mem_force_pu               :    1;
+            uint32_t dc_mem_force_pd               :    1;
+            uint32_t freq_mem_force_pu             :    1;
+            uint32_t freq_mem_force_pd             :    1;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } front_end_mem_pd;
+    union {
+        struct {
+            uint32_t reserved0                     :    18;  /*reserved*/
+            uint32_t flash_page_size               :    2;  /*Set the page size of the used MSPI flash. 0: 256 bytes. 1: 512 bytes. 2: 1024 bytes. 3: 2048 bytes.*/
+            uint32_t sram_page_size                :    2;  /*Set the page size of the used MSPI external RAM. 0: 256 bytes. 1: 512 bytes. 2: 1024 bytes. 3: 2048 bytes.*/
+            uint32_t reserved22                    :    10;  /*reserved*/
+        };
+        uint32_t val;
+    } spi_mem_ecc_ctrl;
+    uint32_t reserved_a4;
+    union {
+        struct {
+            uint32_t rom_clkgate_force_on          :    3;
+            uint32_t sram_clkgate_force_on         :    11;
+            uint32_t reserved14                    :    18;
+        };
+        uint32_t val;
+    } clkgate_force_on;
+    union {
+        struct {
+            uint32_t rom_power_down                :    3;
+            uint32_t sram_power_down               :    11;
+            uint32_t reserved14                    :    18;
+        };
+        uint32_t val;
+    } mem_power_down;
+    union {
+        struct {
+            uint32_t rom_power_up                  :    3;
+            uint32_t sram_power_up                 :    11;
+            uint32_t reserved14                    :    18;
+        };
+        uint32_t val;
+    } mem_power_up;
+    union {
+        struct {
+            uint32_t retention_cpu_link_addr       :    27;
+            uint32_t nobypass_cpu_iso_rst          :    1;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } retention_ctrl;
+    union {
+        struct {
+            uint32_t retention_tag_link_addr       :    27;
+            uint32_t reserved27                    :    5;
+        };
+        uint32_t val;
+    } retention_ctrl1;
+    union {
+        struct {
+            uint32_t reserved0                     :    4;
+            uint32_t ret_icache_size               :    8;
+            uint32_t reserved12                    :    1;
+            uint32_t ret_icache_vld_size           :    8;
+            uint32_t reserved21                    :    1;
+            uint32_t ret_icache_start_point        :    8;
+            uint32_t reserved30                    :    1;
+            uint32_t ret_icache_enable             :    1;
+        };
+        uint32_t val;
+    } retention_ctrl2;
+    union {
+        struct {
+            uint32_t reserved0                     :    4;
+            uint32_t ret_dcache_size               :    9;
+            uint32_t ret_dcache_vld_size           :    9;
+            uint32_t ret_dcache_start_point        :    9;
+            uint32_t ret_dcache_enable             :    1;
+        };
+        uint32_t val;
+    } retention_ctrl3;
+    uint32_t retention_ctrl4;
+    union {
+        struct {
+            uint32_t retention_disable             :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } retention_ctrl5;
+    uint32_t reserved_cc;
+    uint32_t reserved_d0;
+    uint32_t reserved_d4;
+    uint32_t reserved_d8;
+    uint32_t reserved_dc;
+    uint32_t reserved_e0;
+    uint32_t reserved_e4;
+    uint32_t reserved_e8;
+    uint32_t reserved_ec;
+    uint32_t reserved_f0;
+    uint32_t reserved_f4;
+    uint32_t reserved_f8;
+    uint32_t reserved_fc;
+    uint32_t reserved_100;
+    uint32_t reserved_104;
+    uint32_t reserved_108;
+    uint32_t reserved_10c;
+    uint32_t reserved_110;
+    uint32_t reserved_114;
+    uint32_t reserved_118;
+    uint32_t reserved_11c;
+    uint32_t reserved_120;
+    uint32_t reserved_124;
+    uint32_t reserved_128;
+    uint32_t reserved_12c;
+    uint32_t reserved_130;
+    uint32_t reserved_134;
+    uint32_t reserved_138;
+    uint32_t reserved_13c;
+    uint32_t reserved_140;
+    uint32_t reserved_144;
+    uint32_t reserved_148;
+    uint32_t reserved_14c;
+    uint32_t reserved_150;
+    uint32_t reserved_154;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    uint32_t reserved_1fc;
+    uint32_t reserved_200;
+    uint32_t reserved_204;
+    uint32_t reserved_208;
+    uint32_t reserved_20c;
+    uint32_t reserved_210;
+    uint32_t reserved_214;
+    uint32_t reserved_218;
+    uint32_t reserved_21c;
+    uint32_t reserved_220;
+    uint32_t reserved_224;
+    uint32_t reserved_228;
+    uint32_t reserved_22c;
+    uint32_t reserved_230;
+    uint32_t reserved_234;
+    uint32_t reserved_238;
+    uint32_t reserved_23c;
+    uint32_t reserved_240;
+    uint32_t reserved_244;
+    uint32_t reserved_248;
+    uint32_t reserved_24c;
+    uint32_t reserved_250;
+    uint32_t reserved_254;
+    uint32_t reserved_258;
+    uint32_t reserved_25c;
+    uint32_t reserved_260;
+    uint32_t reserved_264;
+    uint32_t reserved_268;
+    uint32_t reserved_26c;
+    uint32_t reserved_270;
+    uint32_t reserved_274;
+    uint32_t reserved_278;
+    uint32_t reserved_27c;
+    uint32_t reserved_280;
+    uint32_t reserved_284;
+    uint32_t reserved_288;
+    uint32_t reserved_28c;
+    uint32_t reserved_290;
+    uint32_t reserved_294;
+    uint32_t reserved_298;
+    uint32_t reserved_29c;
+    uint32_t reserved_2a0;
+    uint32_t reserved_2a4;
+    uint32_t reserved_2a8;
+    uint32_t reserved_2ac;
+    uint32_t reserved_2b0;
+    uint32_t reserved_2b4;
+    uint32_t reserved_2b8;
+    uint32_t reserved_2bc;
+    uint32_t reserved_2c0;
+    uint32_t reserved_2c4;
+    uint32_t reserved_2c8;
+    uint32_t reserved_2cc;
+    uint32_t reserved_2d0;
+    uint32_t reserved_2d4;
+    uint32_t reserved_2d8;
+    uint32_t reserved_2dc;
+    uint32_t reserved_2e0;
+    uint32_t reserved_2e4;
+    uint32_t reserved_2e8;
+    uint32_t reserved_2ec;
+    uint32_t reserved_2f0;
+    uint32_t reserved_2f4;
+    uint32_t reserved_2f8;
+    uint32_t reserved_2fc;
+    uint32_t reserved_300;
+    uint32_t reserved_304;
+    uint32_t reserved_308;
+    uint32_t reserved_30c;
+    uint32_t reserved_310;
+    uint32_t reserved_314;
+    uint32_t reserved_318;
+    uint32_t reserved_31c;
+    uint32_t reserved_320;
+    uint32_t reserved_324;
+    uint32_t reserved_328;
+    uint32_t reserved_32c;
+    uint32_t reserved_330;
+    uint32_t reserved_334;
+    uint32_t reserved_338;
+    uint32_t reserved_33c;
+    uint32_t reserved_340;
+    uint32_t reserved_344;
+    uint32_t reserved_348;
+    uint32_t reserved_34c;
+    uint32_t reserved_350;
+    uint32_t reserved_354;
+    uint32_t reserved_358;
+    uint32_t reserved_35c;
+    uint32_t reserved_360;
+    uint32_t reserved_364;
+    uint32_t reserved_368;
+    uint32_t reserved_36c;
+    uint32_t reserved_370;
+    uint32_t reserved_374;
+    uint32_t reserved_378;
+    uint32_t reserved_37c;
+    uint32_t reserved_380;
+    uint32_t reserved_384;
+    uint32_t reserved_388;
+    uint32_t reserved_38c;
+    uint32_t reserved_390;
+    uint32_t reserved_394;
+    uint32_t reserved_398;
+    uint32_t reserved_39c;
+    uint32_t reserved_3a0;
+    uint32_t reserved_3a4;
+    uint32_t reserved_3a8;
+    uint32_t reserved_3ac;
+    uint32_t reserved_3b0;
+    uint32_t reserved_3b4;
+    uint32_t reserved_3b8;
+    uint32_t reserved_3bc;
+    uint32_t reserved_3c0;
+    uint32_t reserved_3c4;
+    uint32_t reserved_3c8;
+    uint32_t reserved_3cc;
+    uint32_t reserved_3d0;
+    uint32_t reserved_3d4;
+    uint32_t reserved_3d8;
+    uint32_t reserved_3dc;
+    uint32_t reserved_3e0;
+    uint32_t reserved_3e4;
+    uint32_t reserved_3e8;
+    uint32_t reserved_3ec;
+    uint32_t reserved_3f0;
+    uint32_t reserved_3f4;
+    uint32_t reserved_3f8;
+    uint32_t date;
+} apb_ctrl_dev_t;
+extern apb_ctrl_dev_t APB_CTRL;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_APB_CTRL_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_saradc_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_saradc_reg.h
new file mode 100644
index 00000000000..b9c88f22547
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_saradc_reg.h
@@ -0,0 +1,646 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_APB_SARADC_REG_H_
+#define _SOC_APB_SARADC_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define APB_SARADC_CTRL_REG          (DR_REG_APB_SARADC_BASE + 0x0)
+/* APB_SARADC_WAIT_ARB_CYCLE : R/W ;bitpos:[31:30] ;default: 2'd1 ; */
+/*description: wait arbit signal stable after sar_done.*/
+#define APB_SARADC_WAIT_ARB_CYCLE    0x00000003
+#define APB_SARADC_WAIT_ARB_CYCLE_M  ((APB_SARADC_WAIT_ARB_CYCLE_V)<<(APB_SARADC_WAIT_ARB_CYCLE_S))
+#define APB_SARADC_WAIT_ARB_CYCLE_V  0x3
+#define APB_SARADC_WAIT_ARB_CYCLE_S  30
+/* APB_SARADC_XPD_SAR_FORCE : R/W ;bitpos:[28:27] ;default: 2'd0 ; */
+/*description: force option to xpd sar blocks.*/
+#define APB_SARADC_XPD_SAR_FORCE    0x00000003
+#define APB_SARADC_XPD_SAR_FORCE_M  ((APB_SARADC_XPD_SAR_FORCE_V)<<(APB_SARADC_XPD_SAR_FORCE_S))
+#define APB_SARADC_XPD_SAR_FORCE_V  0x3
+#define APB_SARADC_XPD_SAR_FORCE_S  27
+/* APB_SARADC_DATA_TO_I2S : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: 1: I2S input data is from SAR ADC (for DMA), 0: I2S input data is from GPIO matr
+ix.*/
+#define APB_SARADC_DATA_TO_I2S    (BIT(26))
+#define APB_SARADC_DATA_TO_I2S_M  (BIT(26))
+#define APB_SARADC_DATA_TO_I2S_V  0x1
+#define APB_SARADC_DATA_TO_I2S_S  26
+/* APB_SARADC_DATA_SAR_SEL : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: 1: sar_sel will be coded by the MSB of the 16-bit output data, in this case the
+resolution should not be larger than 11 bits..*/
+#define APB_SARADC_DATA_SAR_SEL    (BIT(25))
+#define APB_SARADC_DATA_SAR_SEL_M  (BIT(25))
+#define APB_SARADC_DATA_SAR_SEL_V  0x1
+#define APB_SARADC_DATA_SAR_SEL_S  25
+/* APB_SARADC_SAR2_PATT_P_CLEAR : R/W ;bitpos:[24] ;default: 1'd0 ; */
+/*description: clear the pointer of pattern table for DIG ADC2 CTRL.*/
+#define APB_SARADC_SAR2_PATT_P_CLEAR    (BIT(24))
+#define APB_SARADC_SAR2_PATT_P_CLEAR_M  (BIT(24))
+#define APB_SARADC_SAR2_PATT_P_CLEAR_V  0x1
+#define APB_SARADC_SAR2_PATT_P_CLEAR_S  24
+/* APB_SARADC_SAR1_PATT_P_CLEAR : R/W ;bitpos:[23] ;default: 1'd0 ; */
+/*description: clear the pointer of pattern table for DIG ADC1 CTRL.*/
+#define APB_SARADC_SAR1_PATT_P_CLEAR    (BIT(23))
+#define APB_SARADC_SAR1_PATT_P_CLEAR_M  (BIT(23))
+#define APB_SARADC_SAR1_PATT_P_CLEAR_V  0x1
+#define APB_SARADC_SAR1_PATT_P_CLEAR_S  23
+/* APB_SARADC_SAR2_PATT_LEN : R/W ;bitpos:[22:19] ;default: 4'd15 ; */
+/*description:  0 ~ 15 means length 1 ~ 16.*/
+#define APB_SARADC_SAR2_PATT_LEN    0x0000000F
+#define APB_SARADC_SAR2_PATT_LEN_M  ((APB_SARADC_SAR2_PATT_LEN_V)<<(APB_SARADC_SAR2_PATT_LEN_S))
+#define APB_SARADC_SAR2_PATT_LEN_V  0xF
+#define APB_SARADC_SAR2_PATT_LEN_S  19
+/* APB_SARADC_SAR1_PATT_LEN : R/W ;bitpos:[18:15] ;default: 4'd15 ; */
+/*description:  0 ~ 15 means length 1 ~ 16.*/
+#define APB_SARADC_SAR1_PATT_LEN    0x0000000F
+#define APB_SARADC_SAR1_PATT_LEN_M  ((APB_SARADC_SAR1_PATT_LEN_V)<<(APB_SARADC_SAR1_PATT_LEN_S))
+#define APB_SARADC_SAR1_PATT_LEN_V  0xF
+#define APB_SARADC_SAR1_PATT_LEN_S  15
+/* APB_SARADC_SAR_CLK_DIV : R/W ;bitpos:[14:7] ;default: 8'd4 ; */
+/*description: SAR clock divider.*/
+#define APB_SARADC_SAR_CLK_DIV    0x000000FF
+#define APB_SARADC_SAR_CLK_DIV_M  ((APB_SARADC_SAR_CLK_DIV_V)<<(APB_SARADC_SAR_CLK_DIV_S))
+#define APB_SARADC_SAR_CLK_DIV_V  0xFF
+#define APB_SARADC_SAR_CLK_DIV_S  7
+/* APB_SARADC_SAR_CLK_GATED : R/W ;bitpos:[6] ;default: 1'b1 ; */
+/*description: .*/
+#define APB_SARADC_SAR_CLK_GATED    (BIT(6))
+#define APB_SARADC_SAR_CLK_GATED_M  (BIT(6))
+#define APB_SARADC_SAR_CLK_GATED_V  0x1
+#define APB_SARADC_SAR_CLK_GATED_S  6
+/* APB_SARADC_SAR_SEL : R/W ;bitpos:[5] ;default: 1'd0 ; */
+/*description:  0: SAR1, 1: SAR2, only work for single SAR mode.*/
+#define APB_SARADC_SAR_SEL    (BIT(5))
+#define APB_SARADC_SAR_SEL_M  (BIT(5))
+#define APB_SARADC_SAR_SEL_V  0x1
+#define APB_SARADC_SAR_SEL_S  5
+/* APB_SARADC_WORK_MODE : R/W ;bitpos:[4:3] ;default: 2'd0 ; */
+/*description:  0: single mode, 1: double mode, 2: alternate mode.*/
+#define APB_SARADC_WORK_MODE    0x00000003
+#define APB_SARADC_WORK_MODE_M  ((APB_SARADC_WORK_MODE_V)<<(APB_SARADC_WORK_MODE_S))
+#define APB_SARADC_WORK_MODE_V  0x3
+#define APB_SARADC_WORK_MODE_S  3
+/* APB_SARADC_START : R/W ;bitpos:[1] ;default: 1'd0 ; */
+/*description: .*/
+#define APB_SARADC_START    (BIT(1))
+#define APB_SARADC_START_M  (BIT(1))
+#define APB_SARADC_START_V  0x1
+#define APB_SARADC_START_S  1
+/* APB_SARADC_START_FORCE : R/W ;bitpos:[0] ;default: 1'd0 ; */
+/*description: .*/
+#define APB_SARADC_START_FORCE    (BIT(0))
+#define APB_SARADC_START_FORCE_M  (BIT(0))
+#define APB_SARADC_START_FORCE_V  0x1
+#define APB_SARADC_START_FORCE_S  0
+
+#define APB_SARADC_CTRL2_REG          (DR_REG_APB_SARADC_BASE + 0x4)
+/* APB_SARADC_TIMER_EN : R/W ;bitpos:[24] ;default: 1'd0 ; */
+/*description: to enable saradc timer trigger.*/
+#define APB_SARADC_TIMER_EN    (BIT(24))
+#define APB_SARADC_TIMER_EN_M  (BIT(24))
+#define APB_SARADC_TIMER_EN_V  0x1
+#define APB_SARADC_TIMER_EN_S  24
+/* APB_SARADC_TIMER_TARGET : R/W ;bitpos:[23:12] ;default: 12'd10 ; */
+/*description: to set saradc timer target.*/
+#define APB_SARADC_TIMER_TARGET    0x00000FFF
+#define APB_SARADC_TIMER_TARGET_M  ((APB_SARADC_TIMER_TARGET_V)<<(APB_SARADC_TIMER_TARGET_S))
+#define APB_SARADC_TIMER_TARGET_V  0xFFF
+#define APB_SARADC_TIMER_TARGET_S  12
+/* APB_SARADC_TIMER_SEL : R/W ;bitpos:[11] ;default: 1'd0 ; */
+/*description: 1: select saradc timer 0: i2s_ws trigger.*/
+#define APB_SARADC_TIMER_SEL    (BIT(11))
+#define APB_SARADC_TIMER_SEL_M  (BIT(11))
+#define APB_SARADC_TIMER_SEL_V  0x1
+#define APB_SARADC_TIMER_SEL_S  11
+/* APB_SARADC_SAR2_INV : R/W ;bitpos:[10] ;default: 1'd0 ; */
+/*description: 1: data to DIG ADC2 CTRL is inverted, otherwise not.*/
+#define APB_SARADC_SAR2_INV    (BIT(10))
+#define APB_SARADC_SAR2_INV_M  (BIT(10))
+#define APB_SARADC_SAR2_INV_V  0x1
+#define APB_SARADC_SAR2_INV_S  10
+/* APB_SARADC_SAR1_INV : R/W ;bitpos:[9] ;default: 1'd0 ; */
+/*description: 1: data to DIG ADC1 CTRL is inverted, otherwise not.*/
+#define APB_SARADC_SAR1_INV    (BIT(9))
+#define APB_SARADC_SAR1_INV_M  (BIT(9))
+#define APB_SARADC_SAR1_INV_V  0x1
+#define APB_SARADC_SAR1_INV_S  9
+/* APB_SARADC_MAX_MEAS_NUM : R/W ;bitpos:[8:1] ;default: 8'd255 ; */
+/*description: max conversion number.*/
+#define APB_SARADC_MAX_MEAS_NUM    0x000000FF
+#define APB_SARADC_MAX_MEAS_NUM_M  ((APB_SARADC_MAX_MEAS_NUM_V)<<(APB_SARADC_MAX_MEAS_NUM_S))
+#define APB_SARADC_MAX_MEAS_NUM_V  0xFF
+#define APB_SARADC_MAX_MEAS_NUM_S  1
+/* APB_SARADC_MEAS_NUM_LIMIT : R/W ;bitpos:[0] ;default: 1'd0 ; */
+/*description: .*/
+#define APB_SARADC_MEAS_NUM_LIMIT    (BIT(0))
+#define APB_SARADC_MEAS_NUM_LIMIT_M  (BIT(0))
+#define APB_SARADC_MEAS_NUM_LIMIT_V  0x1
+#define APB_SARADC_MEAS_NUM_LIMIT_S  0
+
+#define APB_SARADC_FILTER_CTRL1_REG          (DR_REG_APB_SARADC_BASE + 0x8)
+/* APB_SARADC_FILTER_FACTOR0 : R/W ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define APB_SARADC_FILTER_FACTOR0    0x00000007
+#define APB_SARADC_FILTER_FACTOR0_M  ((APB_SARADC_FILTER_FACTOR0_V)<<(APB_SARADC_FILTER_FACTOR0_S))
+#define APB_SARADC_FILTER_FACTOR0_V  0x7
+#define APB_SARADC_FILTER_FACTOR0_S  29
+/* APB_SARADC_FILTER_FACTOR1 : R/W ;bitpos:[28:26] ;default: 3'd0 ; */
+/*description: .*/
+#define APB_SARADC_FILTER_FACTOR1    0x00000007
+#define APB_SARADC_FILTER_FACTOR1_M  ((APB_SARADC_FILTER_FACTOR1_V)<<(APB_SARADC_FILTER_FACTOR1_S))
+#define APB_SARADC_FILTER_FACTOR1_V  0x7
+#define APB_SARADC_FILTER_FACTOR1_S  26
+
+#define APB_SARADC_FSM_WAIT_REG          (DR_REG_APB_SARADC_BASE + 0xC)
+/* APB_SARADC_STANDBY_WAIT : R/W ;bitpos:[23:16] ;default: 8'd255 ; */
+/*description: .*/
+#define APB_SARADC_STANDBY_WAIT    0x000000FF
+#define APB_SARADC_STANDBY_WAIT_M  ((APB_SARADC_STANDBY_WAIT_V)<<(APB_SARADC_STANDBY_WAIT_S))
+#define APB_SARADC_STANDBY_WAIT_V  0xFF
+#define APB_SARADC_STANDBY_WAIT_S  16
+/* APB_SARADC_RSTB_WAIT : R/W ;bitpos:[15:8] ;default: 8'd8 ; */
+/*description: .*/
+#define APB_SARADC_RSTB_WAIT    0x000000FF
+#define APB_SARADC_RSTB_WAIT_M  ((APB_SARADC_RSTB_WAIT_V)<<(APB_SARADC_RSTB_WAIT_S))
+#define APB_SARADC_RSTB_WAIT_V  0xFF
+#define APB_SARADC_RSTB_WAIT_S  8
+/* APB_SARADC_XPD_WAIT : R/W ;bitpos:[7:0] ;default: 8'd8 ; */
+/*description: .*/
+#define APB_SARADC_XPD_WAIT    0x000000FF
+#define APB_SARADC_XPD_WAIT_M  ((APB_SARADC_XPD_WAIT_V)<<(APB_SARADC_XPD_WAIT_S))
+#define APB_SARADC_XPD_WAIT_V  0xFF
+#define APB_SARADC_XPD_WAIT_S  0
+
+#define APB_SARADC_SAR1_STATUS_REG          (DR_REG_APB_SARADC_BASE + 0x10)
+/* APB_SARADC_SAR1_STATUS : RO ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: .*/
+#define APB_SARADC_SAR1_STATUS    0xFFFFFFFF
+#define APB_SARADC_SAR1_STATUS_M  ((APB_SARADC_SAR1_STATUS_V)<<(APB_SARADC_SAR1_STATUS_S))
+#define APB_SARADC_SAR1_STATUS_V  0xFFFFFFFF
+#define APB_SARADC_SAR1_STATUS_S  0
+
+#define APB_SARADC_SAR2_STATUS_REG          (DR_REG_APB_SARADC_BASE + 0x14)
+/* APB_SARADC_SAR2_STATUS : RO ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: .*/
+#define APB_SARADC_SAR2_STATUS    0xFFFFFFFF
+#define APB_SARADC_SAR2_STATUS_M  ((APB_SARADC_SAR2_STATUS_V)<<(APB_SARADC_SAR2_STATUS_S))
+#define APB_SARADC_SAR2_STATUS_V  0xFFFFFFFF
+#define APB_SARADC_SAR2_STATUS_S  0
+
+#define APB_SARADC_SAR1_PATT_TAB1_REG          (DR_REG_APB_SARADC_BASE + 0x18)
+/* APB_SARADC_SAR1_PATT_TAB1 : R/W ;bitpos:[23:0] ;default: 24'h0 ; */
+/*description: item 0 ~ 3 for pattern table 1 (each item one byte).*/
+#define APB_SARADC_SAR1_PATT_TAB1    0x00FFFFFF
+#define APB_SARADC_SAR1_PATT_TAB1_M  ((APB_SARADC_SAR1_PATT_TAB1_V)<<(APB_SARADC_SAR1_PATT_TAB1_S))
+#define APB_SARADC_SAR1_PATT_TAB1_V  0xFFFFFF
+#define APB_SARADC_SAR1_PATT_TAB1_S  0
+
+#define APB_SARADC_SAR1_PATT_TAB2_REG          (DR_REG_APB_SARADC_BASE + 0x1C)
+/* APB_SARADC_SAR1_PATT_TAB2 : R/W ;bitpos:[23:0] ;default: 24'h0 ; */
+/*description: Item 4 ~ 7 for pattern table 1 (each item one byte).*/
+#define APB_SARADC_SAR1_PATT_TAB2    0x00FFFFFF
+#define APB_SARADC_SAR1_PATT_TAB2_M  ((APB_SARADC_SAR1_PATT_TAB2_V)<<(APB_SARADC_SAR1_PATT_TAB2_S))
+#define APB_SARADC_SAR1_PATT_TAB2_V  0xFFFFFF
+#define APB_SARADC_SAR1_PATT_TAB2_S  0
+
+#define APB_SARADC_SAR1_PATT_TAB3_REG          (DR_REG_APB_SARADC_BASE + 0x20)
+/* APB_SARADC_SAR1_PATT_TAB3 : R/W ;bitpos:[23:0] ;default: 24'h0 ; */
+/*description: Item 8 ~ 11 for pattern table 1 (each item one byte).*/
+#define APB_SARADC_SAR1_PATT_TAB3    0x00FFFFFF
+#define APB_SARADC_SAR1_PATT_TAB3_M  ((APB_SARADC_SAR1_PATT_TAB3_V)<<(APB_SARADC_SAR1_PATT_TAB3_S))
+#define APB_SARADC_SAR1_PATT_TAB3_V  0xFFFFFF
+#define APB_SARADC_SAR1_PATT_TAB3_S  0
+
+#define APB_SARADC_SAR1_PATT_TAB4_REG          (DR_REG_APB_SARADC_BASE + 0x24)
+/* APB_SARADC_SAR1_PATT_TAB4 : R/W ;bitpos:[23:0] ;default: 24'h0 ; */
+/*description: Item 12 ~ 15 for pattern table 1 (each item one byte).*/
+#define APB_SARADC_SAR1_PATT_TAB4    0x00FFFFFF
+#define APB_SARADC_SAR1_PATT_TAB4_M  ((APB_SARADC_SAR1_PATT_TAB4_V)<<(APB_SARADC_SAR1_PATT_TAB4_S))
+#define APB_SARADC_SAR1_PATT_TAB4_V  0xFFFFFF
+#define APB_SARADC_SAR1_PATT_TAB4_S  0
+
+#define APB_SARADC_SAR2_PATT_TAB1_REG          (DR_REG_APB_SARADC_BASE + 0x28)
+/* APB_SARADC_SAR2_PATT_TAB1 : R/W ;bitpos:[23:0] ;default: 24'h0 ; */
+/*description: item 0 ~ 3 for pattern table 2 (each item one byte).*/
+#define APB_SARADC_SAR2_PATT_TAB1    0x00FFFFFF
+#define APB_SARADC_SAR2_PATT_TAB1_M  ((APB_SARADC_SAR2_PATT_TAB1_V)<<(APB_SARADC_SAR2_PATT_TAB1_S))
+#define APB_SARADC_SAR2_PATT_TAB1_V  0xFFFFFF
+#define APB_SARADC_SAR2_PATT_TAB1_S  0
+
+#define APB_SARADC_SAR2_PATT_TAB2_REG          (DR_REG_APB_SARADC_BASE + 0x2C)
+/* APB_SARADC_SAR2_PATT_TAB2 : R/W ;bitpos:[23:0] ;default: 24'h0 ; */
+/*description: Item 4 ~ 7 for pattern table 2 (each item one byte).*/
+#define APB_SARADC_SAR2_PATT_TAB2    0x00FFFFFF
+#define APB_SARADC_SAR2_PATT_TAB2_M  ((APB_SARADC_SAR2_PATT_TAB2_V)<<(APB_SARADC_SAR2_PATT_TAB2_S))
+#define APB_SARADC_SAR2_PATT_TAB2_V  0xFFFFFF
+#define APB_SARADC_SAR2_PATT_TAB2_S  0
+
+#define APB_SARADC_SAR2_PATT_TAB3_REG          (DR_REG_APB_SARADC_BASE + 0x30)
+/* APB_SARADC_SAR2_PATT_TAB3 : R/W ;bitpos:[23:0] ;default: 24'h0 ; */
+/*description: Item 8 ~ 11 for pattern table 2 (each item one byte).*/
+#define APB_SARADC_SAR2_PATT_TAB3    0x00FFFFFF
+#define APB_SARADC_SAR2_PATT_TAB3_M  ((APB_SARADC_SAR2_PATT_TAB3_V)<<(APB_SARADC_SAR2_PATT_TAB3_S))
+#define APB_SARADC_SAR2_PATT_TAB3_V  0xFFFFFF
+#define APB_SARADC_SAR2_PATT_TAB3_S  0
+
+#define APB_SARADC_SAR2_PATT_TAB4_REG          (DR_REG_APB_SARADC_BASE + 0x34)
+/* APB_SARADC_SAR2_PATT_TAB4 : R/W ;bitpos:[23:0] ;default: 24'h0 ; */
+/*description: Item 12 ~ 15 for pattern table 2 (each item one byte).*/
+#define APB_SARADC_SAR2_PATT_TAB4    0x00FFFFFF
+#define APB_SARADC_SAR2_PATT_TAB4_M  ((APB_SARADC_SAR2_PATT_TAB4_V)<<(APB_SARADC_SAR2_PATT_TAB4_S))
+#define APB_SARADC_SAR2_PATT_TAB4_V  0xFFFFFF
+#define APB_SARADC_SAR2_PATT_TAB4_S  0
+
+#define APB_SARADC_APB_ADC_ARB_CTRL_REG          (DR_REG_APB_SARADC_BASE + 0x38)
+/* APB_SARADC_ADC_ARB_FIX_PRIORITY : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: adc2 arbiter uses fixed priority.*/
+#define APB_SARADC_ADC_ARB_FIX_PRIORITY    (BIT(12))
+#define APB_SARADC_ADC_ARB_FIX_PRIORITY_M  (BIT(12))
+#define APB_SARADC_ADC_ARB_FIX_PRIORITY_V  0x1
+#define APB_SARADC_ADC_ARB_FIX_PRIORITY_S  12
+/* APB_SARADC_ADC_ARB_WIFI_PRIORITY : R/W ;bitpos:[11:10] ;default: 2'd2 ; */
+/*description: Set adc2 arbiter wifi priority.*/
+#define APB_SARADC_ADC_ARB_WIFI_PRIORITY    0x00000003
+#define APB_SARADC_ADC_ARB_WIFI_PRIORITY_M  ((APB_SARADC_ADC_ARB_WIFI_PRIORITY_V)<<(APB_SARADC_ADC_ARB_WIFI_PRIORITY_S))
+#define APB_SARADC_ADC_ARB_WIFI_PRIORITY_V  0x3
+#define APB_SARADC_ADC_ARB_WIFI_PRIORITY_S  10
+/* APB_SARADC_ADC_ARB_RTC_PRIORITY : R/W ;bitpos:[9:8] ;default: 2'd1 ; */
+/*description: Set adc2 arbiter rtc priority.*/
+#define APB_SARADC_ADC_ARB_RTC_PRIORITY    0x00000003
+#define APB_SARADC_ADC_ARB_RTC_PRIORITY_M  ((APB_SARADC_ADC_ARB_RTC_PRIORITY_V)<<(APB_SARADC_ADC_ARB_RTC_PRIORITY_S))
+#define APB_SARADC_ADC_ARB_RTC_PRIORITY_V  0x3
+#define APB_SARADC_ADC_ARB_RTC_PRIORITY_S  8
+/* APB_SARADC_ADC_ARB_APB_PRIORITY : R/W ;bitpos:[7:6] ;default: 2'd0 ; */
+/*description: Set adc2 arbiterapb priority.*/
+#define APB_SARADC_ADC_ARB_APB_PRIORITY    0x00000003
+#define APB_SARADC_ADC_ARB_APB_PRIORITY_M  ((APB_SARADC_ADC_ARB_APB_PRIORITY_V)<<(APB_SARADC_ADC_ARB_APB_PRIORITY_S))
+#define APB_SARADC_ADC_ARB_APB_PRIORITY_V  0x3
+#define APB_SARADC_ADC_ARB_APB_PRIORITY_S  6
+/* APB_SARADC_ADC_ARB_GRANT_FORCE : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: adc2 arbiter force grant.*/
+#define APB_SARADC_ADC_ARB_GRANT_FORCE    (BIT(5))
+#define APB_SARADC_ADC_ARB_GRANT_FORCE_M  (BIT(5))
+#define APB_SARADC_ADC_ARB_GRANT_FORCE_V  0x1
+#define APB_SARADC_ADC_ARB_GRANT_FORCE_S  5
+/* APB_SARADC_ADC_ARB_WIFI_FORCE : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: adc2 arbiter force to enable wifi controller.*/
+#define APB_SARADC_ADC_ARB_WIFI_FORCE    (BIT(4))
+#define APB_SARADC_ADC_ARB_WIFI_FORCE_M  (BIT(4))
+#define APB_SARADC_ADC_ARB_WIFI_FORCE_V  0x1
+#define APB_SARADC_ADC_ARB_WIFI_FORCE_S  4
+/* APB_SARADC_ADC_ARB_RTC_FORCE : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: adc2 arbiter force to enable rtc controller.*/
+#define APB_SARADC_ADC_ARB_RTC_FORCE    (BIT(3))
+#define APB_SARADC_ADC_ARB_RTC_FORCE_M  (BIT(3))
+#define APB_SARADC_ADC_ARB_RTC_FORCE_V  0x1
+#define APB_SARADC_ADC_ARB_RTC_FORCE_S  3
+/* APB_SARADC_ADC_ARB_APB_FORCE : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: adc2 arbiter force to enableapb controller.*/
+#define APB_SARADC_ADC_ARB_APB_FORCE    (BIT(2))
+#define APB_SARADC_ADC_ARB_APB_FORCE_M  (BIT(2))
+#define APB_SARADC_ADC_ARB_APB_FORCE_V  0x1
+#define APB_SARADC_ADC_ARB_APB_FORCE_S  2
+
+#define APB_SARADC_FILTER_CTRL0_REG          (DR_REG_APB_SARADC_BASE + 0x3C)
+/* APB_SARADC_FILTER_RESET : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: enable apb_adc1_filter.*/
+#define APB_SARADC_FILTER_RESET    (BIT(31))
+#define APB_SARADC_FILTER_RESET_M  (BIT(31))
+#define APB_SARADC_FILTER_RESET_V  0x1
+#define APB_SARADC_FILTER_RESET_S  31
+/* APB_SARADC_FILTER_CHANNEL0 : R/W ;bitpos:[23:19] ;default: 5'hd ; */
+/*description: apb_adc1_filter_factor.*/
+#define APB_SARADC_FILTER_CHANNEL0    0x0000001F
+#define APB_SARADC_FILTER_CHANNEL0_M  ((APB_SARADC_FILTER_CHANNEL0_V)<<(APB_SARADC_FILTER_CHANNEL0_S))
+#define APB_SARADC_FILTER_CHANNEL0_V  0x1F
+#define APB_SARADC_FILTER_CHANNEL0_S  19
+/* APB_SARADC_FILTER_CHANNEL1 : R/W ;bitpos:[18:14] ;default: 5'hd ; */
+/*description: .*/
+#define APB_SARADC_FILTER_CHANNEL1    0x0000001F
+#define APB_SARADC_FILTER_CHANNEL1_M  ((APB_SARADC_FILTER_CHANNEL1_V)<<(APB_SARADC_FILTER_CHANNEL1_S))
+#define APB_SARADC_FILTER_CHANNEL1_V  0x1F
+#define APB_SARADC_FILTER_CHANNEL1_S  14
+
+#define APB_SARADC_APB_SARADC1_DATA_STATUS_REG          (DR_REG_APB_SARADC_BASE + 0x40)
+/* APB_SARADC_ADC1_DATA : RO ;bitpos:[16:0] ;default: 17'd0 ; */
+/*description: .*/
+#define APB_SARADC_ADC1_DATA    0x0001FFFF
+#define APB_SARADC_ADC1_DATA_M  ((APB_SARADC_ADC1_DATA_V)<<(APB_SARADC_ADC1_DATA_S))
+#define APB_SARADC_ADC1_DATA_V  0x1FFFF
+#define APB_SARADC_ADC1_DATA_S  0
+
+#define APB_SARADC_THRES0_CTRL_REG          (DR_REG_APB_SARADC_BASE + 0x44)
+/* APB_SARADC_THRES0_LOW : R/W ;bitpos:[30:18] ;default: 13'd0 ; */
+/*description: saradc1's thres0 monitor thres.*/
+#define APB_SARADC_THRES0_LOW    0x00001FFF
+#define APB_SARADC_THRES0_LOW_M  ((APB_SARADC_THRES0_LOW_V)<<(APB_SARADC_THRES0_LOW_S))
+#define APB_SARADC_THRES0_LOW_V  0x1FFF
+#define APB_SARADC_THRES0_LOW_S  18
+/* APB_SARADC_THRES0_HIGH : R/W ;bitpos:[17:5] ;default: 13'h1fff ; */
+/*description: saradc1's thres0 monitor thres.*/
+#define APB_SARADC_THRES0_HIGH    0x00001FFF
+#define APB_SARADC_THRES0_HIGH_M  ((APB_SARADC_THRES0_HIGH_V)<<(APB_SARADC_THRES0_HIGH_S))
+#define APB_SARADC_THRES0_HIGH_V  0x1FFF
+#define APB_SARADC_THRES0_HIGH_S  5
+/* APB_SARADC_THRES0_CHANNEL : R/W ;bitpos:[4:0] ;default: 5'd13 ; */
+/*description: .*/
+#define APB_SARADC_THRES0_CHANNEL    0x0000001F
+#define APB_SARADC_THRES0_CHANNEL_M  ((APB_SARADC_THRES0_CHANNEL_V)<<(APB_SARADC_THRES0_CHANNEL_S))
+#define APB_SARADC_THRES0_CHANNEL_V  0x1F
+#define APB_SARADC_THRES0_CHANNEL_S  0
+
+#define APB_SARADC_THRES1_CTRL_REG          (DR_REG_APB_SARADC_BASE + 0x48)
+/* APB_SARADC_THRES1_LOW : R/W ;bitpos:[30:18] ;default: 13'd0 ; */
+/*description: saradc1's thres0 monitor thres.*/
+#define APB_SARADC_THRES1_LOW    0x00001FFF
+#define APB_SARADC_THRES1_LOW_M  ((APB_SARADC_THRES1_LOW_V)<<(APB_SARADC_THRES1_LOW_S))
+#define APB_SARADC_THRES1_LOW_V  0x1FFF
+#define APB_SARADC_THRES1_LOW_S  18
+/* APB_SARADC_THRES1_HIGH : R/W ;bitpos:[17:5] ;default: 13'h1fff ; */
+/*description: saradc1's thres0 monitor thres.*/
+#define APB_SARADC_THRES1_HIGH    0x00001FFF
+#define APB_SARADC_THRES1_HIGH_M  ((APB_SARADC_THRES1_HIGH_V)<<(APB_SARADC_THRES1_HIGH_S))
+#define APB_SARADC_THRES1_HIGH_V  0x1FFF
+#define APB_SARADC_THRES1_HIGH_S  5
+/* APB_SARADC_THRES1_CHANNEL : R/W ;bitpos:[4:0] ;default: 5'd13 ; */
+/*description: .*/
+#define APB_SARADC_THRES1_CHANNEL    0x0000001F
+#define APB_SARADC_THRES1_CHANNEL_M  ((APB_SARADC_THRES1_CHANNEL_V)<<(APB_SARADC_THRES1_CHANNEL_S))
+#define APB_SARADC_THRES1_CHANNEL_V  0x1F
+#define APB_SARADC_THRES1_CHANNEL_S  0
+
+#define APB_SARADC_THRES_CTRL_REG          (DR_REG_APB_SARADC_BASE + 0x58)
+/* APB_SARADC_THRES0_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES0_EN    (BIT(31))
+#define APB_SARADC_THRES0_EN_M  (BIT(31))
+#define APB_SARADC_THRES0_EN_V  0x1
+#define APB_SARADC_THRES0_EN_S  31
+/* APB_SARADC_THRES1_EN : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES1_EN    (BIT(30))
+#define APB_SARADC_THRES1_EN_M  (BIT(30))
+#define APB_SARADC_THRES1_EN_V  0x1
+#define APB_SARADC_THRES1_EN_S  30
+/* APB_SARADC_THRES2_EN : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES2_EN    (BIT(29))
+#define APB_SARADC_THRES2_EN_M  (BIT(29))
+#define APB_SARADC_THRES2_EN_V  0x1
+#define APB_SARADC_THRES2_EN_S  29
+/* APB_SARADC_THRES3_EN : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES3_EN    (BIT(28))
+#define APB_SARADC_THRES3_EN_M  (BIT(28))
+#define APB_SARADC_THRES3_EN_V  0x1
+#define APB_SARADC_THRES3_EN_S  28
+/* APB_SARADC_THRES_ALL_EN : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: .*/
+#define APB_SARADC_THRES_ALL_EN    (BIT(27))
+#define APB_SARADC_THRES_ALL_EN_M  (BIT(27))
+#define APB_SARADC_THRES_ALL_EN_V  0x1
+#define APB_SARADC_THRES_ALL_EN_S  27
+
+#define APB_SARADC_INT_ENA_REG          (DR_REG_APB_SARADC_BASE + 0x5C)
+/* APB_SARADC_ADC1_DONE_INT_ENA : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_ADC1_DONE_INT_ENA    (BIT(31))
+#define APB_SARADC_ADC1_DONE_INT_ENA_M  (BIT(31))
+#define APB_SARADC_ADC1_DONE_INT_ENA_V  0x1
+#define APB_SARADC_ADC1_DONE_INT_ENA_S  31
+/* APB_SARADC_ADC2_DONE_INT_ENA : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_ADC2_DONE_INT_ENA    (BIT(30))
+#define APB_SARADC_ADC2_DONE_INT_ENA_M  (BIT(30))
+#define APB_SARADC_ADC2_DONE_INT_ENA_V  0x1
+#define APB_SARADC_ADC2_DONE_INT_ENA_S  30
+/* APB_SARADC_THRES0_HIGH_INT_ENA : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES0_HIGH_INT_ENA    (BIT(29))
+#define APB_SARADC_THRES0_HIGH_INT_ENA_M  (BIT(29))
+#define APB_SARADC_THRES0_HIGH_INT_ENA_V  0x1
+#define APB_SARADC_THRES0_HIGH_INT_ENA_S  29
+/* APB_SARADC_THRES1_HIGH_INT_ENA : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES1_HIGH_INT_ENA    (BIT(28))
+#define APB_SARADC_THRES1_HIGH_INT_ENA_M  (BIT(28))
+#define APB_SARADC_THRES1_HIGH_INT_ENA_V  0x1
+#define APB_SARADC_THRES1_HIGH_INT_ENA_S  28
+/* APB_SARADC_THRES0_LOW_INT_ENA : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES0_LOW_INT_ENA    (BIT(27))
+#define APB_SARADC_THRES0_LOW_INT_ENA_M  (BIT(27))
+#define APB_SARADC_THRES0_LOW_INT_ENA_V  0x1
+#define APB_SARADC_THRES0_LOW_INT_ENA_S  27
+/* APB_SARADC_THRES1_LOW_INT_ENA : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES1_LOW_INT_ENA    (BIT(26))
+#define APB_SARADC_THRES1_LOW_INT_ENA_M  (BIT(26))
+#define APB_SARADC_THRES1_LOW_INT_ENA_V  0x1
+#define APB_SARADC_THRES1_LOW_INT_ENA_S  26
+
+#define APB_SARADC_INT_RAW_REG          (DR_REG_APB_SARADC_BASE + 0x60)
+/* APB_SARADC_ADC1_DONE_INT_RAW : RO ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_ADC1_DONE_INT_RAW    (BIT(31))
+#define APB_SARADC_ADC1_DONE_INT_RAW_M  (BIT(31))
+#define APB_SARADC_ADC1_DONE_INT_RAW_V  0x1
+#define APB_SARADC_ADC1_DONE_INT_RAW_S  31
+/* APB_SARADC_ADC2_DONE_INT_RAW : RO ;bitpos:[30] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_ADC2_DONE_INT_RAW    (BIT(30))
+#define APB_SARADC_ADC2_DONE_INT_RAW_M  (BIT(30))
+#define APB_SARADC_ADC2_DONE_INT_RAW_V  0x1
+#define APB_SARADC_ADC2_DONE_INT_RAW_S  30
+/* APB_SARADC_THRES0_HIGH_INT_RAW : RO ;bitpos:[29] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES0_HIGH_INT_RAW    (BIT(29))
+#define APB_SARADC_THRES0_HIGH_INT_RAW_M  (BIT(29))
+#define APB_SARADC_THRES0_HIGH_INT_RAW_V  0x1
+#define APB_SARADC_THRES0_HIGH_INT_RAW_S  29
+/* APB_SARADC_THRES1_HIGH_INT_RAW : RO ;bitpos:[28] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES1_HIGH_INT_RAW    (BIT(28))
+#define APB_SARADC_THRES1_HIGH_INT_RAW_M  (BIT(28))
+#define APB_SARADC_THRES1_HIGH_INT_RAW_V  0x1
+#define APB_SARADC_THRES1_HIGH_INT_RAW_S  28
+/* APB_SARADC_THRES0_LOW_INT_RAW : RO ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES0_LOW_INT_RAW    (BIT(27))
+#define APB_SARADC_THRES0_LOW_INT_RAW_M  (BIT(27))
+#define APB_SARADC_THRES0_LOW_INT_RAW_V  0x1
+#define APB_SARADC_THRES0_LOW_INT_RAW_S  27
+/* APB_SARADC_THRES1_LOW_INT_RAW : RO ;bitpos:[26] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES1_LOW_INT_RAW    (BIT(26))
+#define APB_SARADC_THRES1_LOW_INT_RAW_M  (BIT(26))
+#define APB_SARADC_THRES1_LOW_INT_RAW_V  0x1
+#define APB_SARADC_THRES1_LOW_INT_RAW_S  26
+
+#define APB_SARADC_INT_ST_REG          (DR_REG_APB_SARADC_BASE + 0x64)
+/* APB_SARADC_ADC1_DONE_INT_ST : RO ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_ADC1_DONE_INT_ST    (BIT(31))
+#define APB_SARADC_ADC1_DONE_INT_ST_M  (BIT(31))
+#define APB_SARADC_ADC1_DONE_INT_ST_V  0x1
+#define APB_SARADC_ADC1_DONE_INT_ST_S  31
+/* APB_SARADC_ADC2_DONE_INT_ST : RO ;bitpos:[30] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_ADC2_DONE_INT_ST    (BIT(30))
+#define APB_SARADC_ADC2_DONE_INT_ST_M  (BIT(30))
+#define APB_SARADC_ADC2_DONE_INT_ST_V  0x1
+#define APB_SARADC_ADC2_DONE_INT_ST_S  30
+/* APB_SARADC_THRES0_HIGH_INT_ST : RO ;bitpos:[29] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES0_HIGH_INT_ST    (BIT(29))
+#define APB_SARADC_THRES0_HIGH_INT_ST_M  (BIT(29))
+#define APB_SARADC_THRES0_HIGH_INT_ST_V  0x1
+#define APB_SARADC_THRES0_HIGH_INT_ST_S  29
+/* APB_SARADC_THRES1_HIGH_INT_ST : RO ;bitpos:[28] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES1_HIGH_INT_ST    (BIT(28))
+#define APB_SARADC_THRES1_HIGH_INT_ST_M  (BIT(28))
+#define APB_SARADC_THRES1_HIGH_INT_ST_V  0x1
+#define APB_SARADC_THRES1_HIGH_INT_ST_S  28
+/* APB_SARADC_THRES0_LOW_INT_ST : RO ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES0_LOW_INT_ST    (BIT(27))
+#define APB_SARADC_THRES0_LOW_INT_ST_M  (BIT(27))
+#define APB_SARADC_THRES0_LOW_INT_ST_V  0x1
+#define APB_SARADC_THRES0_LOW_INT_ST_S  27
+/* APB_SARADC_THRES1_LOW_INT_ST : RO ;bitpos:[26] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES1_LOW_INT_ST    (BIT(26))
+#define APB_SARADC_THRES1_LOW_INT_ST_M  (BIT(26))
+#define APB_SARADC_THRES1_LOW_INT_ST_V  0x1
+#define APB_SARADC_THRES1_LOW_INT_ST_S  26
+
+#define APB_SARADC_INT_CLR_REG          (DR_REG_APB_SARADC_BASE + 0x68)
+/* APB_SARADC_ADC1_DONE_INT_CLR : WO ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_ADC1_DONE_INT_CLR    (BIT(31))
+#define APB_SARADC_ADC1_DONE_INT_CLR_M  (BIT(31))
+#define APB_SARADC_ADC1_DONE_INT_CLR_V  0x1
+#define APB_SARADC_ADC1_DONE_INT_CLR_S  31
+/* APB_SARADC_ADC2_DONE_INT_CLR : WO ;bitpos:[30] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_ADC2_DONE_INT_CLR    (BIT(30))
+#define APB_SARADC_ADC2_DONE_INT_CLR_M  (BIT(30))
+#define APB_SARADC_ADC2_DONE_INT_CLR_V  0x1
+#define APB_SARADC_ADC2_DONE_INT_CLR_S  30
+/* APB_SARADC_THRES0_HIGH_INT_CLR : WO ;bitpos:[29] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES0_HIGH_INT_CLR    (BIT(29))
+#define APB_SARADC_THRES0_HIGH_INT_CLR_M  (BIT(29))
+#define APB_SARADC_THRES0_HIGH_INT_CLR_V  0x1
+#define APB_SARADC_THRES0_HIGH_INT_CLR_S  29
+/* APB_SARADC_THRES1_HIGH_INT_CLR : WO ;bitpos:[28] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES1_HIGH_INT_CLR    (BIT(28))
+#define APB_SARADC_THRES1_HIGH_INT_CLR_M  (BIT(28))
+#define APB_SARADC_THRES1_HIGH_INT_CLR_V  0x1
+#define APB_SARADC_THRES1_HIGH_INT_CLR_S  28
+/* APB_SARADC_THRES0_LOW_INT_CLR : WO ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES0_LOW_INT_CLR    (BIT(27))
+#define APB_SARADC_THRES0_LOW_INT_CLR_M  (BIT(27))
+#define APB_SARADC_THRES0_LOW_INT_CLR_V  0x1
+#define APB_SARADC_THRES0_LOW_INT_CLR_S  27
+/* APB_SARADC_THRES1_LOW_INT_CLR : WO ;bitpos:[26] ;default: 1'b0 ; */
+/*description: .*/
+#define APB_SARADC_THRES1_LOW_INT_CLR    (BIT(26))
+#define APB_SARADC_THRES1_LOW_INT_CLR_M  (BIT(26))
+#define APB_SARADC_THRES1_LOW_INT_CLR_V  0x1
+#define APB_SARADC_THRES1_LOW_INT_CLR_S  26
+
+#define APB_SARADC_DMA_CONF_REG          (DR_REG_APB_SARADC_BASE + 0x6C)
+/* APB_SARADC_APB_ADC_TRANS : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: enable apb_adc use spi_dma.*/
+#define APB_SARADC_APB_ADC_TRANS    (BIT(31))
+#define APB_SARADC_APB_ADC_TRANS_M  (BIT(31))
+#define APB_SARADC_APB_ADC_TRANS_V  0x1
+#define APB_SARADC_APB_ADC_TRANS_S  31
+/* APB_SARADC_APB_ADC_RESET_FSM : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: reset_apb_adc_state.*/
+#define APB_SARADC_APB_ADC_RESET_FSM    (BIT(30))
+#define APB_SARADC_APB_ADC_RESET_FSM_M  (BIT(30))
+#define APB_SARADC_APB_ADC_RESET_FSM_V  0x1
+#define APB_SARADC_APB_ADC_RESET_FSM_S  30
+/* APB_SARADC_APB_ADC_EOF_NUM : R/W ;bitpos:[15:0] ;default: 16'd255 ; */
+/*description: the dma_in_suc_eof gen when sample cnt = spi_eof_num.*/
+#define APB_SARADC_APB_ADC_EOF_NUM    0x0000FFFF
+#define APB_SARADC_APB_ADC_EOF_NUM_M  ((APB_SARADC_APB_ADC_EOF_NUM_V)<<(APB_SARADC_APB_ADC_EOF_NUM_S))
+#define APB_SARADC_APB_ADC_EOF_NUM_V  0xFFFF
+#define APB_SARADC_APB_ADC_EOF_NUM_S  0
+
+#define APB_SARADC_APB_ADC_CLKM_CONF_REG          (DR_REG_APB_SARADC_BASE + 0x70)
+/* APB_SARADC_CLK_SEL : R/W ;bitpos:[22:21] ;default: 2'b0 ; */
+/*description: Set this bit to enable clk_apll.*/
+#define APB_SARADC_CLK_SEL    0x00000003
+#define APB_SARADC_CLK_SEL_M  ((APB_SARADC_CLK_SEL_V)<<(APB_SARADC_CLK_SEL_S))
+#define APB_SARADC_CLK_SEL_V  0x3
+#define APB_SARADC_CLK_SEL_S  21
+/* APB_SARADC_CLK_EN : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: .*/
+#define APB_SARADC_CLK_EN    (BIT(20))
+#define APB_SARADC_CLK_EN_M  (BIT(20))
+#define APB_SARADC_CLK_EN_V  0x1
+#define APB_SARADC_CLK_EN_S  20
+/* APB_SARADC_CLKM_DIV_A : R/W ;bitpos:[19:14] ;default: 6'h0 ; */
+/*description: Fractional clock divider denominator value.*/
+#define APB_SARADC_CLKM_DIV_A    0x0000003F
+#define APB_SARADC_CLKM_DIV_A_M  ((APB_SARADC_CLKM_DIV_A_V)<<(APB_SARADC_CLKM_DIV_A_S))
+#define APB_SARADC_CLKM_DIV_A_V  0x3F
+#define APB_SARADC_CLKM_DIV_A_S  14
+/* APB_SARADC_CLKM_DIV_B : R/W ;bitpos:[13:8] ;default: 6'h0 ; */
+/*description: Fractional clock divider numerator value.*/
+#define APB_SARADC_CLKM_DIV_B    0x0000003F
+#define APB_SARADC_CLKM_DIV_B_M  ((APB_SARADC_CLKM_DIV_B_V)<<(APB_SARADC_CLKM_DIV_B_S))
+#define APB_SARADC_CLKM_DIV_B_V  0x3F
+#define APB_SARADC_CLKM_DIV_B_S  8
+/* APB_SARADC_CLKM_DIV_NUM : R/W ;bitpos:[7:0] ;default: 8'd4 ; */
+/*description: Integral I2S clock divider value.*/
+#define APB_SARADC_CLKM_DIV_NUM    0x000000FF
+#define APB_SARADC_CLKM_DIV_NUM_M  ((APB_SARADC_CLKM_DIV_NUM_V)<<(APB_SARADC_CLKM_DIV_NUM_S))
+#define APB_SARADC_CLKM_DIV_NUM_V  0xFF
+#define APB_SARADC_CLKM_DIV_NUM_S  0
+
+#define APB_SARADC_APB_SARADC2_DATA_STATUS_REG          (DR_REG_APB_SARADC_BASE + 0x78)
+/* APB_SARADC_ADC2_DATA : RO ;bitpos:[16:0] ;default: 17'd0 ; */
+/*description: .*/
+#define APB_SARADC_ADC2_DATA    0x0001FFFF
+#define APB_SARADC_ADC2_DATA_M  ((APB_SARADC_ADC2_DATA_V)<<(APB_SARADC_ADC2_DATA_S))
+#define APB_SARADC_ADC2_DATA_V  0x1FFFF
+#define APB_SARADC_ADC2_DATA_S  0
+
+#define APB_SARADC_APB_CTRL_DATE_REG          (DR_REG_APB_SARADC_BASE + 0x3FC)
+/* APB_SARADC_APB_CTRL_DATE : R/W ;bitpos:[31:0] ;default: 32'h02101180 ; */
+/*description: .*/
+#define APB_SARADC_APB_CTRL_DATE    0xFFFFFFFF
+#define APB_SARADC_APB_CTRL_DATE_M  ((APB_SARADC_APB_CTRL_DATE_V)<<(APB_SARADC_APB_CTRL_DATE_S))
+#define APB_SARADC_APB_CTRL_DATE_V  0xFFFFFFFF
+#define APB_SARADC_APB_CTRL_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_APB_SARADC_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_saradc_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_saradc_struct.h
new file mode 100644
index 00000000000..53e2fe41c0d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/apb_saradc_struct.h
@@ -0,0 +1,456 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _SOC_APB_SARADC_STRUCT_H_
+#define _SOC_APB_SARADC_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct apb_saradc_dev_s {
+    union {
+        struct {
+            uint32_t start_force                   :    1;
+            uint32_t start                         :    1;
+            uint32_t reserved2                     :    1;
+            uint32_t work_mode                     :    2;  /* 0: single mode, 1: double mode, 2: alternate mode*/
+            uint32_t sar_sel                       :    1;  /* 0: SAR1, 1: SAR2, only work for single SAR mode*/
+            uint32_t sar_clk_gated                 :    1;
+            uint32_t sar_clk_div                   :    8;  /*SAR clock divider*/
+            uint32_t sar1_patt_len                 :    4;  /* 0 ~ 15 means length 1 ~ 16*/
+            uint32_t sar2_patt_len                 :    4;  /* 0 ~ 15 means length 1 ~ 16*/
+            uint32_t sar1_patt_p_clear             :    1;  /*clear the pointer of pattern table for DIG ADC1 CTRL*/
+            uint32_t sar2_patt_p_clear             :    1;  /*clear the pointer of pattern table for DIG ADC2 CTRL*/
+            uint32_t data_sar_sel                  :    1;  /*1: sar_sel will be coded by the MSB of the 16-bit output data, in this case the resolution should not be larger than 11 bits.*/
+            uint32_t data_to_i2s                   :    1;  /*1: I2S input data is from SAR ADC (for DMA), 0: I2S input data is from GPIO matrix*/
+            uint32_t xpd_sar_force                 :    2;  /*force option to xpd sar blocks*/
+            uint32_t reserved29                    :    1;
+            uint32_t wait_arb_cycle                :    2;  /*wait arbit signal stable after sar_done*/
+        };
+        uint32_t val;
+    } ctrl;
+    union {
+        struct {
+            uint32_t meas_num_limit                :    1;
+            uint32_t max_meas_num                  :    8;  /*max conversion number*/
+            uint32_t sar1_inv                      :    1;  /*1: data to DIG ADC1 CTRL is inverted, otherwise not*/
+            uint32_t sar2_inv                      :    1;  /*1: data to DIG ADC2 CTRL is inverted, otherwise not*/
+            uint32_t timer_sel                     :    1;  /*1: select saradc timer 0: i2s_ws trigger*/
+            uint32_t timer_target                  :    12;  /*to set saradc timer target*/
+            uint32_t timer_en                      :    1;  /*to enable saradc timer trigger*/
+            uint32_t reserved25                    :    7;
+        };
+        uint32_t val;
+    } ctrl2;
+    union {
+        struct {
+            uint32_t reserved0                     :    26;
+            uint32_t filter_factor1                :    3;
+            uint32_t filter_factor0                :    3;
+        };
+        uint32_t val;
+    } filter_ctrl1;
+    union {
+        struct {
+            uint32_t xpd_wait                      :    8;
+            uint32_t rstb_wait                     :    8;
+            uint32_t standby_wait                  :    8;
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } fsm_wait;
+    uint32_t sar1_status;
+    uint32_t sar2_status;
+    union {
+        struct {
+            uint32_t sar1_patt_tab                 :    24;  /*item 0 ~ 3 for pattern table 1 (each item one byte)*/
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } sar1_patt_tab[4];
+    union {
+        struct {
+            uint32_t sar2_patt_tab                 :    24;  /*item 0 ~ 3 for pattern table 2 (each item one byte)*/
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } sar2_patt_tab[4];
+    union {
+        struct {
+            uint32_t reserved0                     :    2;
+            uint32_t adc_arb_apb_force             :    1;  /*adc2 arbiter force to enableapb controller*/
+            uint32_t adc_arb_rtc_force             :    1;  /*adc2 arbiter force to enable rtc controller*/
+            uint32_t adc_arb_wifi_force            :    1;  /*adc2 arbiter force to enable wifi controller*/
+            uint32_t adc_arb_grant_force           :    1;  /*adc2 arbiter force grant*/
+            uint32_t adc_arb_apb_priority          :    2;  /*Set adc2 arbiterapb priority*/
+            uint32_t adc_arb_rtc_priority          :    2;  /*Set adc2 arbiter rtc priority*/
+            uint32_t adc_arb_wifi_priority         :    2;  /*Set adc2 arbiter wifi priority*/
+            uint32_t adc_arb_fix_priority          :    1;  /*adc2 arbiter uses fixed priority*/
+            uint32_t reserved13                    :    19;
+        };
+        uint32_t val;
+    } apb_adc_arb_ctrl;
+    union {
+        struct {
+            uint32_t reserved0                     :    14;
+            uint32_t filter_channel1               :    5;
+            uint32_t filter_channel0               :    5;  /*apb_adc1_filter_factor*/
+            uint32_t reserved24                    :    7;
+            uint32_t filter_reset                  :    1;  /*enable apb_adc1_filter*/
+        };
+        uint32_t val;
+    } filter_ctrl0;
+    union {
+        struct {
+            uint32_t adc1_data                     :    17;
+            uint32_t reserved17                    :    15;
+        };
+        uint32_t val;
+    } apb_saradc1_data_status;
+    union {
+        struct {
+            uint32_t thres0_channel                :    5;
+            uint32_t thres0_high                   :    13;  /*saradc1's thres0 monitor thres*/
+            uint32_t thres0_low                    :    13;  /*saradc1's thres0 monitor thres*/
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } thres0_ctrl;
+    union {
+        struct {
+            uint32_t thres1_channel                :    5;
+            uint32_t thres1_high                   :    13;  /*saradc1's thres0 monitor thres*/
+            uint32_t thres1_low                    :    13;  /*saradc1's thres0 monitor thres*/
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } thres1_ctrl;
+    uint32_t reserved_4c;
+    uint32_t reserved_50;
+    uint32_t reserved_54;
+    union {
+        struct {
+            uint32_t reserved0                     :    27;
+            uint32_t thres_all_en                  :    1;
+            uint32_t thres3_en                     :    1;
+            uint32_t thres2_en                     :    1;
+            uint32_t thres1_en                     :    1;
+            uint32_t thres0_en                     :    1;
+        };
+        uint32_t val;
+    } thres_ctrl;
+    union {
+        struct {
+            uint32_t reserved0                     :    26;
+            uint32_t thres1_low                    :    1;
+            uint32_t thres0_low                    :    1;
+            uint32_t thres1_high                   :    1;
+            uint32_t thres0_high                   :    1;
+            uint32_t adc2_done                     :    1;
+            uint32_t adc1_done                     :    1;
+        };
+        uint32_t val;
+    } int_ena;
+    union {
+        struct {
+            uint32_t reserved0                     :    26;
+            uint32_t thres1_low                    :    1;
+            uint32_t thres0_low                    :    1;
+            uint32_t thres1_high                   :    1;
+            uint32_t thres0_high                   :    1;
+            uint32_t adc2_done                     :    1;
+            uint32_t adc1_done                     :    1;
+        };
+        uint32_t val;
+    } int_raw;
+    union {
+        struct {
+            uint32_t reserved0                     :    26;
+            uint32_t thres1_low                    :    1;
+            uint32_t thres0_low                    :    1;
+            uint32_t thres1_high                   :    1;
+            uint32_t thres0_high                   :    1;
+            uint32_t adc2_done                     :    1;
+            uint32_t adc1_done                     :    1;
+        };
+        uint32_t val;
+    } int_st;
+    union {
+        struct {
+            uint32_t reserved0                     :    26;
+            uint32_t thres1_low                    :    1;
+            uint32_t thres0_low                    :    1;
+            uint32_t thres1_high                   :    1;
+            uint32_t thres0_high                   :    1;
+            uint32_t adc2_done                     :    1;
+            uint32_t adc1_done                     :    1;
+        };
+        uint32_t val;
+    } int_clr;
+    union {
+        struct {
+            uint32_t apb_adc_eof_num               :    16;  /*the dma_in_suc_eof gen when sample cnt = spi_eof_num*/
+            uint32_t reserved16                    :    14;
+            uint32_t apb_adc_reset_fsm             :    1;  /*reset_apb_adc_state*/
+            uint32_t apb_adc_trans                 :    1;  /*enable apb_adc use spi_dma*/
+        };
+        uint32_t val;
+    } dma_conf;
+    union {
+        struct {
+            uint32_t clkm_div_num                  :    8;  /*Integral I2S clock divider value*/
+            uint32_t clkm_div_b                    :    6;  /*Fractional clock divider numerator value*/
+            uint32_t clkm_div_a                    :    6;  /*Fractional clock divider denominator value*/
+            uint32_t clk_en                        :    1;
+            uint32_t clk_sel                       :    2;  /*Set this bit to enable clk_apll*/
+            uint32_t reserved23                    :    9;
+        };
+        uint32_t val;
+    } apb_adc_clkm_conf;
+    uint32_t reserved_74;
+    union {
+        struct {
+            uint32_t adc2_data                     :    17;
+            uint32_t reserved17                    :    15;
+        };
+        uint32_t val;
+    } apb_saradc2_data_status;
+    uint32_t reserved_7c;
+    uint32_t reserved_80;
+    uint32_t reserved_84;
+    uint32_t reserved_88;
+    uint32_t reserved_8c;
+    uint32_t reserved_90;
+    uint32_t reserved_94;
+    uint32_t reserved_98;
+    uint32_t reserved_9c;
+    uint32_t reserved_a0;
+    uint32_t reserved_a4;
+    uint32_t reserved_a8;
+    uint32_t reserved_ac;
+    uint32_t reserved_b0;
+    uint32_t reserved_b4;
+    uint32_t reserved_b8;
+    uint32_t reserved_bc;
+    uint32_t reserved_c0;
+    uint32_t reserved_c4;
+    uint32_t reserved_c8;
+    uint32_t reserved_cc;
+    uint32_t reserved_d0;
+    uint32_t reserved_d4;
+    uint32_t reserved_d8;
+    uint32_t reserved_dc;
+    uint32_t reserved_e0;
+    uint32_t reserved_e4;
+    uint32_t reserved_e8;
+    uint32_t reserved_ec;
+    uint32_t reserved_f0;
+    uint32_t reserved_f4;
+    uint32_t reserved_f8;
+    uint32_t reserved_fc;
+    uint32_t reserved_100;
+    uint32_t reserved_104;
+    uint32_t reserved_108;
+    uint32_t reserved_10c;
+    uint32_t reserved_110;
+    uint32_t reserved_114;
+    uint32_t reserved_118;
+    uint32_t reserved_11c;
+    uint32_t reserved_120;
+    uint32_t reserved_124;
+    uint32_t reserved_128;
+    uint32_t reserved_12c;
+    uint32_t reserved_130;
+    uint32_t reserved_134;
+    uint32_t reserved_138;
+    uint32_t reserved_13c;
+    uint32_t reserved_140;
+    uint32_t reserved_144;
+    uint32_t reserved_148;
+    uint32_t reserved_14c;
+    uint32_t reserved_150;
+    uint32_t reserved_154;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    uint32_t reserved_1fc;
+    uint32_t reserved_200;
+    uint32_t reserved_204;
+    uint32_t reserved_208;
+    uint32_t reserved_20c;
+    uint32_t reserved_210;
+    uint32_t reserved_214;
+    uint32_t reserved_218;
+    uint32_t reserved_21c;
+    uint32_t reserved_220;
+    uint32_t reserved_224;
+    uint32_t reserved_228;
+    uint32_t reserved_22c;
+    uint32_t reserved_230;
+    uint32_t reserved_234;
+    uint32_t reserved_238;
+    uint32_t reserved_23c;
+    uint32_t reserved_240;
+    uint32_t reserved_244;
+    uint32_t reserved_248;
+    uint32_t reserved_24c;
+    uint32_t reserved_250;
+    uint32_t reserved_254;
+    uint32_t reserved_258;
+    uint32_t reserved_25c;
+    uint32_t reserved_260;
+    uint32_t reserved_264;
+    uint32_t reserved_268;
+    uint32_t reserved_26c;
+    uint32_t reserved_270;
+    uint32_t reserved_274;
+    uint32_t reserved_278;
+    uint32_t reserved_27c;
+    uint32_t reserved_280;
+    uint32_t reserved_284;
+    uint32_t reserved_288;
+    uint32_t reserved_28c;
+    uint32_t reserved_290;
+    uint32_t reserved_294;
+    uint32_t reserved_298;
+    uint32_t reserved_29c;
+    uint32_t reserved_2a0;
+    uint32_t reserved_2a4;
+    uint32_t reserved_2a8;
+    uint32_t reserved_2ac;
+    uint32_t reserved_2b0;
+    uint32_t reserved_2b4;
+    uint32_t reserved_2b8;
+    uint32_t reserved_2bc;
+    uint32_t reserved_2c0;
+    uint32_t reserved_2c4;
+    uint32_t reserved_2c8;
+    uint32_t reserved_2cc;
+    uint32_t reserved_2d0;
+    uint32_t reserved_2d4;
+    uint32_t reserved_2d8;
+    uint32_t reserved_2dc;
+    uint32_t reserved_2e0;
+    uint32_t reserved_2e4;
+    uint32_t reserved_2e8;
+    uint32_t reserved_2ec;
+    uint32_t reserved_2f0;
+    uint32_t reserved_2f4;
+    uint32_t reserved_2f8;
+    uint32_t reserved_2fc;
+    uint32_t reserved_300;
+    uint32_t reserved_304;
+    uint32_t reserved_308;
+    uint32_t reserved_30c;
+    uint32_t reserved_310;
+    uint32_t reserved_314;
+    uint32_t reserved_318;
+    uint32_t reserved_31c;
+    uint32_t reserved_320;
+    uint32_t reserved_324;
+    uint32_t reserved_328;
+    uint32_t reserved_32c;
+    uint32_t reserved_330;
+    uint32_t reserved_334;
+    uint32_t reserved_338;
+    uint32_t reserved_33c;
+    uint32_t reserved_340;
+    uint32_t reserved_344;
+    uint32_t reserved_348;
+    uint32_t reserved_34c;
+    uint32_t reserved_350;
+    uint32_t reserved_354;
+    uint32_t reserved_358;
+    uint32_t reserved_35c;
+    uint32_t reserved_360;
+    uint32_t reserved_364;
+    uint32_t reserved_368;
+    uint32_t reserved_36c;
+    uint32_t reserved_370;
+    uint32_t reserved_374;
+    uint32_t reserved_378;
+    uint32_t reserved_37c;
+    uint32_t reserved_380;
+    uint32_t reserved_384;
+    uint32_t reserved_388;
+    uint32_t reserved_38c;
+    uint32_t reserved_390;
+    uint32_t reserved_394;
+    uint32_t reserved_398;
+    uint32_t reserved_39c;
+    uint32_t reserved_3a0;
+    uint32_t reserved_3a4;
+    uint32_t reserved_3a8;
+    uint32_t reserved_3ac;
+    uint32_t reserved_3b0;
+    uint32_t reserved_3b4;
+    uint32_t reserved_3b8;
+    uint32_t reserved_3bc;
+    uint32_t reserved_3c0;
+    uint32_t reserved_3c4;
+    uint32_t reserved_3c8;
+    uint32_t reserved_3cc;
+    uint32_t reserved_3d0;
+    uint32_t reserved_3d4;
+    uint32_t reserved_3d8;
+    uint32_t reserved_3dc;
+    uint32_t reserved_3e0;
+    uint32_t reserved_3e4;
+    uint32_t reserved_3e8;
+    uint32_t reserved_3ec;
+    uint32_t reserved_3f0;
+    uint32_t reserved_3f4;
+    uint32_t reserved_3f8;
+    uint32_t apb_ctrl_date;
+} apb_saradc_dev_t;
+extern apb_saradc_dev_t APB_SARADC;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_APB_SARADC_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/assist_debug_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/assist_debug_reg.h
new file mode 100644
index 00000000000..0bf71c44d33
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/assist_debug_reg.h
@@ -0,0 +1,1338 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_ASSIST_DEBUG_REG_H_
+#define _SOC_ASSIST_DEBUG_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ASSIST_DEBUG_CORE_0_INTERRUPT_ENA_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x0)
+/* ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_ENA : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_ENA    (BIT(11))
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_ENA_M  (BIT(11))
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_ENA_S  11
+/* ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_ENA    (BIT(10))
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_ENA_M  (BIT(10))
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_ENA_S  10
+/* ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_ENA    (BIT(9))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_ENA_M  (BIT(9))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_ENA_S  9
+/* ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_ENA    (BIT(8))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_ENA_M  (BIT(8))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_ENA_S  8
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_ENA    (BIT(7))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_ENA_M  (BIT(7))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_ENA_S  7
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_ENA    (BIT(6))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_ENA_M  (BIT(6))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_ENA_S  6
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_ENA    (BIT(5))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_ENA_M  (BIT(5))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_ENA_S  5
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_ENA    (BIT(4))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_ENA_M  (BIT(4))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_ENA_S  4
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_ENA    (BIT(3))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_ENA_M  (BIT(3))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_ENA_S  3
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_ENA    (BIT(2))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_ENA_M  (BIT(2))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_ENA_S  2
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_ENA    (BIT(1))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_ENA_M  (BIT(1))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_ENA_S  1
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_ENA    (BIT(0))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_ENA_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_ENA_S  0
+
+#define ASSIST_DEBUG_CORE_0_INTERRUPT_RAW_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x4)
+/* ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_RAW : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_RAW    (BIT(11))
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_RAW_M  (BIT(11))
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_RAW_S  11
+/* ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_RAW : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_RAW    (BIT(10))
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_RAW_M  (BIT(10))
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_RAW_S  10
+/* ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_RAW : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_RAW    (BIT(9))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_RAW_M  (BIT(9))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_RAW_S  9
+/* ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_RAW : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_RAW    (BIT(8))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_RAW_M  (BIT(8))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_RAW_S  8
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_RAW : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_RAW    (BIT(7))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_RAW_M  (BIT(7))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_RAW_S  7
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_RAW : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_RAW    (BIT(6))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_RAW_M  (BIT(6))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_RAW_S  6
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_RAW : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_RAW    (BIT(5))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_RAW_M  (BIT(5))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_RAW_S  5
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_RAW : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_RAW    (BIT(4))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_RAW_M  (BIT(4))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_RAW_S  4
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_RAW : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_RAW    (BIT(3))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_RAW_M  (BIT(3))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_RAW_S  3
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_RAW : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_RAW    (BIT(2))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_RAW_M  (BIT(2))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_RAW_S  2
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_RAW : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_RAW    (BIT(1))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_RAW_M  (BIT(1))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_RAW_S  1
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_RAW : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_RAW    (BIT(0))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_RAW_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_RAW_S  0
+
+#define ASSIST_DEBUG_CORE_0_INTERRUPT_RLS_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x8)
+/* ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_RLS : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_RLS    (BIT(11))
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_RLS_M  (BIT(11))
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_RLS_S  11
+/* ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_RLS : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_RLS    (BIT(10))
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_RLS_M  (BIT(10))
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_RLS_S  10
+/* ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_RLS : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_RLS    (BIT(9))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_RLS_M  (BIT(9))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_RLS_S  9
+/* ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_RLS : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_RLS    (BIT(8))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_RLS_M  (BIT(8))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_RLS_S  8
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_RLS : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_RLS    (BIT(7))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_RLS_M  (BIT(7))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_RLS_S  7
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_RLS : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_RLS    (BIT(6))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_RLS_M  (BIT(6))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_RLS_S  6
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_RLS : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_RLS    (BIT(5))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_RLS_M  (BIT(5))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_RLS_S  5
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_RLS : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_RLS    (BIT(4))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_RLS_M  (BIT(4))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_RLS_S  4
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_RLS : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_RLS    (BIT(3))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_RLS_M  (BIT(3))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_RLS_S  3
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_RLS : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_RLS    (BIT(2))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_RLS_M  (BIT(2))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_RLS_S  2
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_RLS : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_RLS    (BIT(1))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_RLS_M  (BIT(1))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_RLS_S  1
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_RLS : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_RLS    (BIT(0))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_RLS_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_RLS_S  0
+
+#define ASSIST_DEBUG_CORE_0_INTERRUPT_CLR_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xC)
+/* ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_CLR : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_CLR    (BIT(11))
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_CLR_M  (BIT(11))
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_CLR_S  11
+/* ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_CLR : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_CLR    (BIT(10))
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_CLR_M  (BIT(10))
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_CLR_S  10
+/* ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_CLR : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_CLR    (BIT(9))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_CLR_M  (BIT(9))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_CLR_S  9
+/* ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_CLR : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_CLR    (BIT(8))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_CLR_M  (BIT(8))
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_CLR_S  8
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_CLR : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_CLR    (BIT(7))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_CLR_M  (BIT(7))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_WR_CLR_S  7
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_CLR : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_CLR    (BIT(6))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_CLR_M  (BIT(6))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_RD_CLR_S  6
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_CLR : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_CLR    (BIT(5))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_CLR_M  (BIT(5))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_WR_CLR_S  5
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_CLR : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_CLR    (BIT(4))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_CLR_M  (BIT(4))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_RD_CLR_S  4
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_CLR : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_CLR    (BIT(3))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_CLR_M  (BIT(3))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_WR_CLR_S  3
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_CLR : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_CLR    (BIT(2))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_CLR_M  (BIT(2))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_RD_CLR_S  2
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_CLR : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_CLR    (BIT(1))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_CLR_M  (BIT(1))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_WR_CLR_S  1
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_CLR : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_CLR    (BIT(0))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_CLR_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_RD_CLR_S  0
+
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MIN_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x10)
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MIN : R/W ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MIN    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MIN_M  ((ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MIN_V)<<(ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MIN_S))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MIN_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MIN_S  0
+
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MAX_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x14)
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MAX : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MAX    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MAX_M  ((ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MAX_V)<<(ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MAX_S))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MAX_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MAX_S  0
+
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MIN_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x18)
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MIN : R/W ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MIN    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MIN_M  ((ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MIN_V)<<(ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MIN_S))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MIN_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MIN_S  0
+
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MAX_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x1C)
+/* ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MAX : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MAX    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MAX_M  ((ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MAX_V)<<(ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MAX_S))
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MAX_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MAX_S  0
+
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_MIN_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x20)
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_0_MIN : R/W ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_MIN    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_MIN_M  ((ASSIST_DEBUG_CORE_0_AREA_PIF_0_MIN_V)<<(ASSIST_DEBUG_CORE_0_AREA_PIF_0_MIN_S))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_MIN_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_MIN_S  0
+
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_MAX_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x24)
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_0_MAX : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_MAX    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_MAX_M  ((ASSIST_DEBUG_CORE_0_AREA_PIF_0_MAX_V)<<(ASSIST_DEBUG_CORE_0_AREA_PIF_0_MAX_S))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_MAX_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_0_MAX_S  0
+
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_MIN_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x28)
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_1_MIN : R/W ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_MIN    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_MIN_M  ((ASSIST_DEBUG_CORE_0_AREA_PIF_1_MIN_V)<<(ASSIST_DEBUG_CORE_0_AREA_PIF_1_MIN_S))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_MIN_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_MIN_S  0
+
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_MAX_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x2C)
+/* ASSIST_DEBUG_CORE_0_AREA_PIF_1_MAX : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_MAX    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_MAX_M  ((ASSIST_DEBUG_CORE_0_AREA_PIF_1_MAX_V)<<(ASSIST_DEBUG_CORE_0_AREA_PIF_1_MAX_S))
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_MAX_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_PIF_1_MAX_S  0
+
+#define ASSIST_DEBUG_CORE_0_AREA_SP_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x30)
+/* ASSIST_DEBUG_CORE_0_AREA_SP : R/W ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_SP    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_SP_M  ((ASSIST_DEBUG_CORE_0_AREA_SP_V)<<(ASSIST_DEBUG_CORE_0_AREA_SP_S))
+#define ASSIST_DEBUG_CORE_0_AREA_SP_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_SP_S  0
+
+#define ASSIST_DEBUG_CORE_0_AREA_PC_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x34)
+/* ASSIST_DEBUG_CORE_0_AREA_PC : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_AREA_PC    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_PC_M  ((ASSIST_DEBUG_CORE_0_AREA_PC_V)<<(ASSIST_DEBUG_CORE_0_AREA_PC_S))
+#define ASSIST_DEBUG_CORE_0_AREA_PC_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_AREA_PC_S  0
+
+#define ASSIST_DEBUG_CORE_0_SP_UNSTABLE_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x38)
+/* ASSIST_DEBUG_CORE_0_SP_UNSTABLE : R/W ;bitpos:[7:0] ;default: 8'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_UNSTABLE    0x000000FF
+#define ASSIST_DEBUG_CORE_0_SP_UNSTABLE_M  ((ASSIST_DEBUG_CORE_0_SP_UNSTABLE_V)<<(ASSIST_DEBUG_CORE_0_SP_UNSTABLE_S))
+#define ASSIST_DEBUG_CORE_0_SP_UNSTABLE_V  0xFF
+#define ASSIST_DEBUG_CORE_0_SP_UNSTABLE_S  0
+
+#define ASSIST_DEBUG_CORE_0_SP_MIN_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x3C)
+/* ASSIST_DEBUG_CORE_0_SP_MIN : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_MIN    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_SP_MIN_M  ((ASSIST_DEBUG_CORE_0_SP_MIN_V)<<(ASSIST_DEBUG_CORE_0_SP_MIN_S))
+#define ASSIST_DEBUG_CORE_0_SP_MIN_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_SP_MIN_S  0
+
+#define ASSIST_DEBUG_CORE_0_SP_MAX_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x40)
+/* ASSIST_DEBUG_CORE_0_SP_MAX : R/W ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_MAX    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_SP_MAX_M  ((ASSIST_DEBUG_CORE_0_SP_MAX_V)<<(ASSIST_DEBUG_CORE_0_SP_MAX_S))
+#define ASSIST_DEBUG_CORE_0_SP_MAX_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_SP_MAX_S  0
+
+#define ASSIST_DEBUG_CORE_0_SP_PC_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x44)
+/* ASSIST_DEBUG_CORE_0_SP_PC : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_SP_PC    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_SP_PC_M  ((ASSIST_DEBUG_CORE_0_SP_PC_V)<<(ASSIST_DEBUG_CORE_0_SP_PC_S))
+#define ASSIST_DEBUG_CORE_0_SP_PC_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_SP_PC_S  0
+
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGENABLE_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x48)
+/* ASSIST_DEBUG_CORE_0_RCD_PDEBUGENABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGENABLE    (BIT(0))
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGENABLE_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGENABLE_V  0x1
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGENABLE_S  0
+
+#define ASSIST_DEBUG_CORE_0_RCD_RECORDING_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x4C)
+/* ASSIST_DEBUG_CORE_0_RCD_RECORDING : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_RCD_RECORDING    (BIT(0))
+#define ASSIST_DEBUG_CORE_0_RCD_RECORDING_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_0_RCD_RECORDING_V  0x1
+#define ASSIST_DEBUG_CORE_0_RCD_RECORDING_S  0
+
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGINST_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x50)
+/* ASSIST_DEBUG_CORE_0_RCD_PDEBUGINST : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGINST    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGINST_M  ((ASSIST_DEBUG_CORE_0_RCD_PDEBUGINST_V)<<(ASSIST_DEBUG_CORE_0_RCD_PDEBUGINST_S))
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGINST_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGINST_S  0
+
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGSTATUS_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x54)
+/* ASSIST_DEBUG_CORE_0_RCD_PDEBUGSTATUS : RO ;bitpos:[7:0] ;default: 8'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGSTATUS    0x000000FF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGSTATUS_M  ((ASSIST_DEBUG_CORE_0_RCD_PDEBUGSTATUS_V)<<(ASSIST_DEBUG_CORE_0_RCD_PDEBUGSTATUS_S))
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGSTATUS_V  0xFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGSTATUS_S  0
+
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGDATA_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x58)
+/* ASSIST_DEBUG_CORE_0_RCD_PDEBUGDATA : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGDATA    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGDATA_M  ((ASSIST_DEBUG_CORE_0_RCD_PDEBUGDATA_V)<<(ASSIST_DEBUG_CORE_0_RCD_PDEBUGDATA_S))
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGDATA_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGDATA_S  0
+
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x5C)
+/* ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_M  ((ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_V)<<(ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_S))
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_S  0
+
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0STAT_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x60)
+/* ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0STAT : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0STAT    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0STAT_M  ((ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0STAT_V)<<(ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0STAT_S))
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0STAT_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0STAT_S  0
+
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0ADDR_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x64)
+/* ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0ADDR : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0ADDR    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0ADDR_M  ((ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0ADDR_V)<<(ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0ADDR_S))
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0ADDR_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0ADDR_S  0
+
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0DATA_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x68)
+/* ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0DATA : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0DATA    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0DATA_M  ((ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0DATA_V)<<(ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0DATA_S))
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0DATA_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0DATA_S  0
+
+#define ASSIST_DEBUG_CORE_0_RCD_SP_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x6C)
+/* ASSIST_DEBUG_CORE_0_RCD_SP : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_RCD_SP    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_SP_M  ((ASSIST_DEBUG_CORE_0_RCD_SP_V)<<(ASSIST_DEBUG_CORE_0_RCD_SP_S))
+#define ASSIST_DEBUG_CORE_0_RCD_SP_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_RCD_SP_S  0
+
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_0_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x70)
+/* ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_LOADSTORE_0 : RO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_LOADSTORE_0    (BIT(25))
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_LOADSTORE_0_M  (BIT(25))
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_LOADSTORE_0_V  0x1
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_LOADSTORE_0_S  25
+/* ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_WR_0 : RO ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_WR_0    (BIT(24))
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_WR_0_M  (BIT(24))
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_WR_0_V  0x1
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_WR_0_S  24
+/* ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_0 : RO ;bitpos:[23:0] ;default: 24'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_0    0x00FFFFFF
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_0_M  ((ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_0_V)<<(ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_0_S))
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_0_V  0xFFFFFF
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_0_S  0
+
+#define ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_1_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x74)
+/* ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_LOADSTORE_1 : RO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_LOADSTORE_1    (BIT(25))
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_LOADSTORE_1_M  (BIT(25))
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_LOADSTORE_1_V  0x1
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_LOADSTORE_1_S  25
+/* ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_WR_1 : RO ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_WR_1    (BIT(24))
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_WR_1_M  (BIT(24))
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_WR_1_V  0x1
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_WR_1_S  24
+/* ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_1 : RO ;bitpos:[23:0] ;default: 24'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_1    0x00FFFFFF
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_1_M  ((ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_1_V)<<(ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_1_S))
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_1_V  0xFFFFFF
+#define ASSIST_DEBUG_CORE_0_IRAM0_RECORDING_ADDR_1_S  0
+
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_0_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x78)
+/* ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_WR_0 : RO ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_WR_0    (BIT(22))
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_WR_0_M  (BIT(22))
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_WR_0_V  0x1
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_WR_0_S  22
+/* ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_0 : RO ;bitpos:[21:0] ;default: 24'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_0    0x003FFFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_0_M  ((ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_0_V)<<(ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_0_S))
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_0_V  0x3FFFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_0_S  0
+
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_1_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x7C)
+/* ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_0 : RO ;bitpos:[15:0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_0    0x0000FFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_0_M  ((ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_0_V)<<(ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_0_S))
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_0_V  0xFFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_0_S  0
+
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_2_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x80)
+/* ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_0 : RO ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_0    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_0_M  ((ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_0_V)<<(ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_0_S))
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_0_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_0_S  0
+
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_3_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x84)
+/* ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_WR_1 : RO ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_WR_1    (BIT(22))
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_WR_1_M  (BIT(22))
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_WR_1_V  0x1
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_WR_1_S  22
+/* ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_1 : RO ;bitpos:[21:0] ;default: 24'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_1    0x003FFFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_1_M  ((ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_1_V)<<(ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_1_S))
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_1_V  0x3FFFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_ADDR_1_S  0
+
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_4_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x88)
+/* ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_1 : RO ;bitpos:[15:0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_1    0x0000FFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_1_M  ((ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_1_V)<<(ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_1_S))
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_1_V  0xFFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_BYTEEN_1_S  0
+
+#define ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_5_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x8C)
+/* ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_1 : RO ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_1    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_1_M  ((ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_1_V)<<(ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_1_S))
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_1_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_0_DRAM0_RECORDING_PC_1_S  0
+
+#define ASSIST_DEBUG_CORE_1_INTERRUPT_ENA_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x90)
+/* ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_ENA : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_ENA    (BIT(11))
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_ENA_M  (BIT(11))
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_ENA_S  11
+/* ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_ENA    (BIT(10))
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_ENA_M  (BIT(10))
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_ENA_S  10
+/* ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_ENA    (BIT(9))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_ENA_M  (BIT(9))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_ENA_S  9
+/* ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_ENA    (BIT(8))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_ENA_M  (BIT(8))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_ENA_S  8
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_ENA    (BIT(7))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_ENA_M  (BIT(7))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_ENA_S  7
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_ENA    (BIT(6))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_ENA_M  (BIT(6))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_ENA_S  6
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_ENA    (BIT(5))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_ENA_M  (BIT(5))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_ENA_S  5
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_ENA    (BIT(4))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_ENA_M  (BIT(4))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_ENA_S  4
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_ENA    (BIT(3))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_ENA_M  (BIT(3))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_ENA_S  3
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_ENA    (BIT(2))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_ENA_M  (BIT(2))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_ENA_S  2
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_ENA    (BIT(1))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_ENA_M  (BIT(1))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_ENA_S  1
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_ENA    (BIT(0))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_ENA_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_ENA_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_ENA_S  0
+
+#define ASSIST_DEBUG_CORE_1_INTERRUPT_RAW_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x94)
+/* ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_RAW : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_RAW    (BIT(11))
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_RAW_M  (BIT(11))
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_RAW_S  11
+/* ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_RAW : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_RAW    (BIT(10))
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_RAW_M  (BIT(10))
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_RAW_S  10
+/* ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_RAW : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_RAW    (BIT(9))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_RAW_M  (BIT(9))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_RAW_S  9
+/* ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_RAW : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_RAW    (BIT(8))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_RAW_M  (BIT(8))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_RAW_S  8
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_RAW : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_RAW    (BIT(7))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_RAW_M  (BIT(7))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_RAW_S  7
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_RAW : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_RAW    (BIT(6))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_RAW_M  (BIT(6))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_RAW_S  6
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_RAW : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_RAW    (BIT(5))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_RAW_M  (BIT(5))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_RAW_S  5
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_RAW : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_RAW    (BIT(4))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_RAW_M  (BIT(4))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_RAW_S  4
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_RAW : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_RAW    (BIT(3))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_RAW_M  (BIT(3))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_RAW_S  3
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_RAW : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_RAW    (BIT(2))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_RAW_M  (BIT(2))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_RAW_S  2
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_RAW : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_RAW    (BIT(1))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_RAW_M  (BIT(1))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_RAW_S  1
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_RAW : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_RAW    (BIT(0))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_RAW_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_RAW_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_RAW_S  0
+
+#define ASSIST_DEBUG_CORE_1_INTERRUPT_RLS_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x98)
+/* ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_RLS : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_RLS    (BIT(11))
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_RLS_M  (BIT(11))
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_RLS_S  11
+/* ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_RLS : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_RLS    (BIT(10))
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_RLS_M  (BIT(10))
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_RLS_S  10
+/* ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_RLS : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_RLS    (BIT(9))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_RLS_M  (BIT(9))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_RLS_S  9
+/* ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_RLS : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_RLS    (BIT(8))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_RLS_M  (BIT(8))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_RLS_S  8
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_RLS : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_RLS    (BIT(7))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_RLS_M  (BIT(7))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_RLS_S  7
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_RLS : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_RLS    (BIT(6))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_RLS_M  (BIT(6))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_RLS_S  6
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_RLS : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_RLS    (BIT(5))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_RLS_M  (BIT(5))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_RLS_S  5
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_RLS : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_RLS    (BIT(4))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_RLS_M  (BIT(4))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_RLS_S  4
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_RLS : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_RLS    (BIT(3))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_RLS_M  (BIT(3))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_RLS_S  3
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_RLS : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_RLS    (BIT(2))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_RLS_M  (BIT(2))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_RLS_S  2
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_RLS : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_RLS    (BIT(1))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_RLS_M  (BIT(1))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_RLS_S  1
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_RLS : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_RLS    (BIT(0))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_RLS_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_RLS_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_RLS_S  0
+
+#define ASSIST_DEBUG_CORE_1_INTERRUPT_CLR_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x9C)
+/* ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_CLR : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_CLR    (BIT(11))
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_CLR_M  (BIT(11))
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_CLR_S  11
+/* ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_CLR : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_CLR    (BIT(10))
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_CLR_M  (BIT(10))
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_CLR_S  10
+/* ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_CLR : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_CLR    (BIT(9))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_CLR_M  (BIT(9))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_CLR_S  9
+/* ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_CLR : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_CLR    (BIT(8))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_CLR_M  (BIT(8))
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_CLR_S  8
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_CLR : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_CLR    (BIT(7))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_CLR_M  (BIT(7))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_WR_CLR_S  7
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_CLR : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_CLR    (BIT(6))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_CLR_M  (BIT(6))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_RD_CLR_S  6
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_CLR : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_CLR    (BIT(5))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_CLR_M  (BIT(5))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_WR_CLR_S  5
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_CLR : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_CLR    (BIT(4))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_CLR_M  (BIT(4))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_RD_CLR_S  4
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_CLR : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_CLR    (BIT(3))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_CLR_M  (BIT(3))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_WR_CLR_S  3
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_CLR : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_CLR    (BIT(2))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_CLR_M  (BIT(2))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_RD_CLR_S  2
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_CLR : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_CLR    (BIT(1))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_CLR_M  (BIT(1))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_WR_CLR_S  1
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_CLR : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_CLR    (BIT(0))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_CLR_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_CLR_V  0x1
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_RD_CLR_S  0
+
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MIN_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xA0)
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MIN : R/W ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MIN    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MIN_M  ((ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MIN_V)<<(ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MIN_S))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MIN_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MIN_S  0
+
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MAX_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xA4)
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MAX : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MAX    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MAX_M  ((ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MAX_V)<<(ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MAX_S))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MAX_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_0_MAX_S  0
+
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MIN_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xA8)
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MIN : R/W ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MIN    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MIN_M  ((ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MIN_V)<<(ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MIN_S))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MIN_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MIN_S  0
+
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MAX_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xAC)
+/* ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MAX : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MAX    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MAX_M  ((ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MAX_V)<<(ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MAX_S))
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MAX_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_DRAM0_1_MAX_S  0
+
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_MIN_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xB0)
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_0_MIN : R/W ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_MIN    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_MIN_M  ((ASSIST_DEBUG_CORE_1_AREA_PIF_0_MIN_V)<<(ASSIST_DEBUG_CORE_1_AREA_PIF_0_MIN_S))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_MIN_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_MIN_S  0
+
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_MAX_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xB4)
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_0_MAX : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_MAX    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_MAX_M  ((ASSIST_DEBUG_CORE_1_AREA_PIF_0_MAX_V)<<(ASSIST_DEBUG_CORE_1_AREA_PIF_0_MAX_S))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_MAX_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_0_MAX_S  0
+
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_MIN_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xB8)
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_1_MIN : R/W ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_MIN    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_MIN_M  ((ASSIST_DEBUG_CORE_1_AREA_PIF_1_MIN_V)<<(ASSIST_DEBUG_CORE_1_AREA_PIF_1_MIN_S))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_MIN_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_MIN_S  0
+
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_MAX_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xBC)
+/* ASSIST_DEBUG_CORE_1_AREA_PIF_1_MAX : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_MAX    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_MAX_M  ((ASSIST_DEBUG_CORE_1_AREA_PIF_1_MAX_V)<<(ASSIST_DEBUG_CORE_1_AREA_PIF_1_MAX_S))
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_MAX_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_PIF_1_MAX_S  0
+
+#define ASSIST_DEBUG_CORE_1_AREA_PC_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xC0)
+/* ASSIST_DEBUG_CORE_1_AREA_PC : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_PC    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_PC_M  ((ASSIST_DEBUG_CORE_1_AREA_PC_V)<<(ASSIST_DEBUG_CORE_1_AREA_PC_S))
+#define ASSIST_DEBUG_CORE_1_AREA_PC_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_PC_S  0
+
+#define ASSIST_DEBUG_CORE_1_AREA_SP_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xC4)
+/* ASSIST_DEBUG_CORE_1_AREA_SP : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_AREA_SP    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_SP_M  ((ASSIST_DEBUG_CORE_1_AREA_SP_V)<<(ASSIST_DEBUG_CORE_1_AREA_SP_S))
+#define ASSIST_DEBUG_CORE_1_AREA_SP_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_AREA_SP_S  0
+
+#define ASSIST_DEBUG_CORE_1_SP_UNSTABLE_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xC8)
+/* ASSIST_DEBUG_CORE_1_SP_UNSTABLE : R/W ;bitpos:[7:0] ;default: 8'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_UNSTABLE    0x000000FF
+#define ASSIST_DEBUG_CORE_1_SP_UNSTABLE_M  ((ASSIST_DEBUG_CORE_1_SP_UNSTABLE_V)<<(ASSIST_DEBUG_CORE_1_SP_UNSTABLE_S))
+#define ASSIST_DEBUG_CORE_1_SP_UNSTABLE_V  0xFF
+#define ASSIST_DEBUG_CORE_1_SP_UNSTABLE_S  0
+
+#define ASSIST_DEBUG_CORE_1_SP_MIN_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xCC)
+/* ASSIST_DEBUG_CORE_1_SP_MIN : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_MIN    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_SP_MIN_M  ((ASSIST_DEBUG_CORE_1_SP_MIN_V)<<(ASSIST_DEBUG_CORE_1_SP_MIN_S))
+#define ASSIST_DEBUG_CORE_1_SP_MIN_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_SP_MIN_S  0
+
+#define ASSIST_DEBUG_CORE_1_SP_MAX_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xD0)
+/* ASSIST_DEBUG_CORE_1_SP_MAX : R/W ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_MAX    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_SP_MAX_M  ((ASSIST_DEBUG_CORE_1_SP_MAX_V)<<(ASSIST_DEBUG_CORE_1_SP_MAX_S))
+#define ASSIST_DEBUG_CORE_1_SP_MAX_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_SP_MAX_S  0
+
+#define ASSIST_DEBUG_CORE_1_SP_PC_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xD4)
+/* ASSIST_DEBUG_CORE_1_SP_PC : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_SP_PC    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_SP_PC_M  ((ASSIST_DEBUG_CORE_1_SP_PC_V)<<(ASSIST_DEBUG_CORE_1_SP_PC_S))
+#define ASSIST_DEBUG_CORE_1_SP_PC_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_SP_PC_S  0
+
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGENABLE_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xD8)
+/* ASSIST_DEBUG_CORE_1_RCD_PDEBUGENABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGENABLE    (BIT(0))
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGENABLE_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGENABLE_V  0x1
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGENABLE_S  0
+
+#define ASSIST_DEBUG_CORE_1_RCD_RECORDING_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xDC)
+/* ASSIST_DEBUG_CORE_1_RCD_RECORDING : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_RCD_RECORDING    (BIT(0))
+#define ASSIST_DEBUG_CORE_1_RCD_RECORDING_M  (BIT(0))
+#define ASSIST_DEBUG_CORE_1_RCD_RECORDING_V  0x1
+#define ASSIST_DEBUG_CORE_1_RCD_RECORDING_S  0
+
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGINST_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xE0)
+/* ASSIST_DEBUG_CORE_1_RCD_PDEBUGINST : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGINST    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGINST_M  ((ASSIST_DEBUG_CORE_1_RCD_PDEBUGINST_V)<<(ASSIST_DEBUG_CORE_1_RCD_PDEBUGINST_S))
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGINST_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGINST_S  0
+
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGSTATUS_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xE4)
+/* ASSIST_DEBUG_CORE_1_RCD_PDEBUGSTATUS : RO ;bitpos:[7:0] ;default: 8'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGSTATUS    0x000000FF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGSTATUS_M  ((ASSIST_DEBUG_CORE_1_RCD_PDEBUGSTATUS_V)<<(ASSIST_DEBUG_CORE_1_RCD_PDEBUGSTATUS_S))
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGSTATUS_V  0xFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGSTATUS_S  0
+
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGDATA_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xE8)
+/* ASSIST_DEBUG_CORE_1_RCD_PDEBUGDATA : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGDATA    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGDATA_M  ((ASSIST_DEBUG_CORE_1_RCD_PDEBUGDATA_V)<<(ASSIST_DEBUG_CORE_1_RCD_PDEBUGDATA_S))
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGDATA_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGDATA_S  0
+
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xEC)
+/* ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC_M  ((ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC_V)<<(ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC_S))
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC_S  0
+
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0STAT_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xF0)
+/* ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0STAT : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0STAT    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0STAT_M  ((ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0STAT_V)<<(ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0STAT_S))
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0STAT_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0STAT_S  0
+
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0ADDR_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xF4)
+/* ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0ADDR : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0ADDR    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0ADDR_M  ((ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0ADDR_V)<<(ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0ADDR_S))
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0ADDR_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0ADDR_S  0
+
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0DATA_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xF8)
+/* ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0DATA : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0DATA    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0DATA_M  ((ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0DATA_V)<<(ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0DATA_S))
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0DATA_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0DATA_S  0
+
+#define ASSIST_DEBUG_CORE_1_RCD_SP_REG          (DR_REG_ASSIST_DEBUG_BASE + 0xFC)
+/* ASSIST_DEBUG_CORE_1_RCD_SP : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_RCD_SP    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_SP_M  ((ASSIST_DEBUG_CORE_1_RCD_SP_V)<<(ASSIST_DEBUG_CORE_1_RCD_SP_S))
+#define ASSIST_DEBUG_CORE_1_RCD_SP_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_RCD_SP_S  0
+
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_0_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x100)
+/* ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_LOADSTORE_0 : RO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_LOADSTORE_0    (BIT(25))
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_LOADSTORE_0_M  (BIT(25))
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_LOADSTORE_0_V  0x1
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_LOADSTORE_0_S  25
+/* ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_WR_0 : RO ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_WR_0    (BIT(24))
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_WR_0_M  (BIT(24))
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_WR_0_V  0x1
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_WR_0_S  24
+/* ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_0 : RO ;bitpos:[23:0] ;default: 24'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_0    0x00FFFFFF
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_0_M  ((ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_0_V)<<(ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_0_S))
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_0_V  0xFFFFFF
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_0_S  0
+
+#define ASSIST_DEBUG_CORE_1_IRAM0_EXCEPTION_MONITOR_1_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x104)
+/* ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_LOADSTORE_1 : RO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_LOADSTORE_1    (BIT(25))
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_LOADSTORE_1_M  (BIT(25))
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_LOADSTORE_1_V  0x1
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_LOADSTORE_1_S  25
+/* ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_WR_1 : RO ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_WR_1    (BIT(24))
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_WR_1_M  (BIT(24))
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_WR_1_V  0x1
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_WR_1_S  24
+/* ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_1 : RO ;bitpos:[23:0] ;default: 24'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_1    0x00FFFFFF
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_1_M  ((ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_1_V)<<(ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_1_S))
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_1_V  0xFFFFFF
+#define ASSIST_DEBUG_CORE_1_IRAM0_RECORDING_ADDR_1_S  0
+
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_0_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x108)
+/* ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_WR_0 : RO ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_WR_0    (BIT(22))
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_WR_0_M  (BIT(22))
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_WR_0_V  0x1
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_WR_0_S  22
+/* ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_0 : RO ;bitpos:[21:0] ;default: 24'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_0    0x003FFFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_0_M  ((ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_0_V)<<(ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_0_S))
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_0_V  0x3FFFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_0_S  0
+
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_1_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x10C)
+/* ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_0 : RO ;bitpos:[15:0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_0    0x0000FFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_0_M  ((ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_0_V)<<(ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_0_S))
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_0_V  0xFFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_0_S  0
+
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_2_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x110)
+/* ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_0 : RO ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_0    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_0_M  ((ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_0_V)<<(ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_0_S))
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_0_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_0_S  0
+
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_3_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x114)
+/* ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_WR_1 : RO ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_WR_1    (BIT(22))
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_WR_1_M  (BIT(22))
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_WR_1_V  0x1
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_WR_1_S  22
+/* ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_1 : RO ;bitpos:[21:0] ;default: 24'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_1    0x003FFFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_1_M  ((ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_1_V)<<(ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_1_S))
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_1_V  0x3FFFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_ADDR_1_S  0
+
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_4_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x118)
+/* ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_1 : RO ;bitpos:[15:0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_1    0x0000FFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_1_M  ((ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_1_V)<<(ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_1_S))
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_1_V  0xFFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_BYTEEN_1_S  0
+
+#define ASSIST_DEBUG_CORE_1_DRAM0_EXCEPTION_MONITOR_5_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x11C)
+/* ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_1 : RO ;bitpos:[31:0] ;default: ~32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_1    0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_1_M  ((ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_1_V)<<(ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_1_S))
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_1_V  0xFFFFFFFF
+#define ASSIST_DEBUG_CORE_1_DRAM0_RECORDING_PC_1_S  0
+
+#define ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x120)
+/* ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_0 : R/W ;bitpos:[19:0] ;default: ~20'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_0    0x000FFFFF
+#define ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_0_M  ((ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_0_V)<<(ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_0_S))
+#define ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_0_V  0xFFFFF
+#define ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_0_S  0
+
+#define ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x124)
+/* ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_1 : R/W ;bitpos:[19:0] ;default: ~20'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_1    0x000FFFFF
+#define ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_1_M  ((ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_1_V)<<(ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_1_S))
+#define ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_1_V  0xFFFFF
+#define ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_LIMIT_CYCLE_1_S  0
+
+#define ASSIST_DEBUG_LOG_SETTING_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x128)
+/* ASSIST_DEBUG_LOG_MEM_LOOP_ENABLE : R/W ;bitpos:[6] ;default: 1'b1 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_MEM_LOOP_ENABLE    (BIT(6))
+#define ASSIST_DEBUG_LOG_MEM_LOOP_ENABLE_M  (BIT(6))
+#define ASSIST_DEBUG_LOG_MEM_LOOP_ENABLE_V  0x1
+#define ASSIST_DEBUG_LOG_MEM_LOOP_ENABLE_S  6
+/* ASSIST_DEBUG_LOG_MODE : R/W ;bitpos:[5:3] ;default: 3'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_MODE    0x00000007
+#define ASSIST_DEBUG_LOG_MODE_M  ((ASSIST_DEBUG_LOG_MODE_V)<<(ASSIST_DEBUG_LOG_MODE_S))
+#define ASSIST_DEBUG_LOG_MODE_V  0x7
+#define ASSIST_DEBUG_LOG_MODE_S  3
+/* ASSIST_DEBUG_LOG_ENA : R/W ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_ENA    0x00000007
+#define ASSIST_DEBUG_LOG_ENA_M  ((ASSIST_DEBUG_LOG_ENA_V)<<(ASSIST_DEBUG_LOG_ENA_S))
+#define ASSIST_DEBUG_LOG_ENA_V  0x7
+#define ASSIST_DEBUG_LOG_ENA_S  0
+
+#define ASSIST_DEBUG_LOG_DATA_0_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x12C)
+/* ASSIST_DEBUG_LOG_DATA_0 : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_DATA_0    0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_DATA_0_M  ((ASSIST_DEBUG_LOG_DATA_0_V)<<(ASSIST_DEBUG_LOG_DATA_0_S))
+#define ASSIST_DEBUG_LOG_DATA_0_V  0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_DATA_0_S  0
+
+#define ASSIST_DEBUG_LOG_DATA_1_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x130)
+/* ASSIST_DEBUG_LOG_DATA_1 : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_DATA_1    0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_DATA_1_M  ((ASSIST_DEBUG_LOG_DATA_1_V)<<(ASSIST_DEBUG_LOG_DATA_1_S))
+#define ASSIST_DEBUG_LOG_DATA_1_V  0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_DATA_1_S  0
+
+#define ASSIST_DEBUG_LOG_DATA_2_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x134)
+/* ASSIST_DEBUG_LOG_DATA_2 : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_DATA_2    0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_DATA_2_M  ((ASSIST_DEBUG_LOG_DATA_2_V)<<(ASSIST_DEBUG_LOG_DATA_2_S))
+#define ASSIST_DEBUG_LOG_DATA_2_V  0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_DATA_2_S  0
+
+#define ASSIST_DEBUG_LOG_DATA_3_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x138)
+/* ASSIST_DEBUG_LOG_DATA_3 : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_DATA_3    0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_DATA_3_M  ((ASSIST_DEBUG_LOG_DATA_3_V)<<(ASSIST_DEBUG_LOG_DATA_3_S))
+#define ASSIST_DEBUG_LOG_DATA_3_V  0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_DATA_3_S  0
+
+#define ASSIST_DEBUG_LOG_DATA_MASK_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x13C)
+/* ASSIST_DEBUG_LOG_DATA_SIZE : R/W ;bitpos:[15:0] ;default: 16'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_DATA_SIZE    0x0000FFFF
+#define ASSIST_DEBUG_LOG_DATA_SIZE_M  ((ASSIST_DEBUG_LOG_DATA_SIZE_V)<<(ASSIST_DEBUG_LOG_DATA_SIZE_S))
+#define ASSIST_DEBUG_LOG_DATA_SIZE_V  0xFFFF
+#define ASSIST_DEBUG_LOG_DATA_SIZE_S  0
+
+#define ASSIST_DEBUG_LOG_MIN_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x140)
+/* ASSIST_DEBUG_LOG_MIN : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_MIN    0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_MIN_M  ((ASSIST_DEBUG_LOG_MIN_V)<<(ASSIST_DEBUG_LOG_MIN_S))
+#define ASSIST_DEBUG_LOG_MIN_V  0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_MIN_S  0
+
+#define ASSIST_DEBUG_LOG_MAX_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x144)
+/* ASSIST_DEBUG_LOG_MAX : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_MAX    0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_MAX_M  ((ASSIST_DEBUG_LOG_MAX_V)<<(ASSIST_DEBUG_LOG_MAX_S))
+#define ASSIST_DEBUG_LOG_MAX_V  0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_MAX_S  0
+
+#define ASSIST_DEBUG_LOG_MEM_START_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x148)
+/* ASSIST_DEBUG_LOG_MEM_START : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_MEM_START    0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_MEM_START_M  ((ASSIST_DEBUG_LOG_MEM_START_V)<<(ASSIST_DEBUG_LOG_MEM_START_S))
+#define ASSIST_DEBUG_LOG_MEM_START_V  0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_MEM_START_S  0
+
+#define ASSIST_DEBUG_LOG_MEM_END_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x14C)
+/* ASSIST_DEBUG_LOG_MEM_END : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_MEM_END    0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_MEM_END_M  ((ASSIST_DEBUG_LOG_MEM_END_V)<<(ASSIST_DEBUG_LOG_MEM_END_S))
+#define ASSIST_DEBUG_LOG_MEM_END_V  0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_MEM_END_S  0
+
+#define ASSIST_DEBUG_LOG_MEM_WRITING_ADDR_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x150)
+/* ASSIST_DEBUG_LOG_MEM_WRITING_ADDR : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_MEM_WRITING_ADDR    0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_MEM_WRITING_ADDR_M  ((ASSIST_DEBUG_LOG_MEM_WRITING_ADDR_V)<<(ASSIST_DEBUG_LOG_MEM_WRITING_ADDR_S))
+#define ASSIST_DEBUG_LOG_MEM_WRITING_ADDR_V  0xFFFFFFFF
+#define ASSIST_DEBUG_LOG_MEM_WRITING_ADDR_S  0
+
+#define ASSIST_DEBUG_LOG_MEM_FULL_FLAG_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x154)
+/* ASSIST_DEBUG_LOG_MEM_FULL_FLAG : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define ASSIST_DEBUG_LOG_MEM_FULL_FLAG    (BIT(0))
+#define ASSIST_DEBUG_LOG_MEM_FULL_FLAG_M  (BIT(0))
+#define ASSIST_DEBUG_LOG_MEM_FULL_FLAG_V  0x1
+#define ASSIST_DEBUG_LOG_MEM_FULL_FLAG_S  0
+
+#define ASSIST_DEBUG_REG_DATE_REG          (DR_REG_ASSIST_DEBUG_BASE + 0x1FC)
+/* ASSIST_DEBUG_REG_DATE : R/W ;bitpos:[27:0] ;default: 28'h2003040 ; */
+/*description: .*/
+#define ASSIST_DEBUG_REG_DATE    0x0FFFFFFF
+#define ASSIST_DEBUG_REG_DATE_M  ((ASSIST_DEBUG_REG_DATE_V)<<(ASSIST_DEBUG_REG_DATE_S))
+#define ASSIST_DEBUG_REG_DATE_V  0xFFFFFFF
+#define ASSIST_DEBUG_REG_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_ASSIST_DEBUG_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/assist_debug_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/assist_debug_struct.h
new file mode 100644
index 00000000000..a6152af468c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/assist_debug_struct.h
@@ -0,0 +1,466 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_ASSIST_DEBUG_STRUCT_H_
+#define _SOC_ASSIST_DEBUG_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct assist_debug_dev_s {
+    union {
+        struct {
+            uint32_t core_0_area_dram0_0_rd        :    1;
+            uint32_t core_0_area_dram0_0_wr        :    1;
+            uint32_t core_0_area_dram0_1_rd        :    1;
+            uint32_t core_0_area_dram0_1_wr        :    1;
+            uint32_t core_0_area_pif_0_rd          :    1;
+            uint32_t core_0_area_pif_0_wr          :    1;
+            uint32_t core_0_area_pif_1_rd          :    1;
+            uint32_t core_0_area_pif_1_wr          :    1;
+            uint32_t core_0_sp_spill_min           :    1;
+            uint32_t core_0_sp_spill_max           :    1;
+            uint32_t core_0_iram0_exception_monitor:    1;
+            uint32_t core_0_dram0_exception_monitor:    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_0_interrupt_ena;
+    union {
+        struct {
+            uint32_t core_0_area_dram0_0_rd        :    1;
+            uint32_t core_0_area_dram0_0_wr        :    1;
+            uint32_t core_0_area_dram0_1_rd        :    1;
+            uint32_t core_0_area_dram0_1_wr        :    1;
+            uint32_t core_0_area_pif_0_rd          :    1;
+            uint32_t core_0_area_pif_0_wr          :    1;
+            uint32_t core_0_area_pif_1_rd          :    1;
+            uint32_t core_0_area_pif_1_wr          :    1;
+            uint32_t core_0_sp_spill_min           :    1;
+            uint32_t core_0_sp_spill_max           :    1;
+            uint32_t core_0_iram0_exception_monitor:    1;
+            uint32_t core_0_dram0_exception_monitor:    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_0_interrupt_raw;
+    union {
+        struct {
+            uint32_t core_0_area_dram0_0_rd        :    1;
+            uint32_t core_0_area_dram0_0_wr        :    1;
+            uint32_t core_0_area_dram0_1_rd        :    1;
+            uint32_t core_0_area_dram0_1_wr        :    1;
+            uint32_t core_0_area_pif_0_rd          :    1;
+            uint32_t core_0_area_pif_0_wr          :    1;
+            uint32_t core_0_area_pif_1_rd          :    1;
+            uint32_t core_0_area_pif_1_wr          :    1;
+            uint32_t core_0_sp_spill_min           :    1;
+            uint32_t core_0_sp_spill_max           :    1;
+            uint32_t core_0_iram0_exception_monitor:    1;
+            uint32_t core_0_dram0_exception_monitor:    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_0_interrupt_rls;
+    union {
+        struct {
+            uint32_t core_0_area_dram0_0_rd        :    1;
+            uint32_t core_0_area_dram0_0_wr        :    1;
+            uint32_t core_0_area_dram0_1_rd        :    1;
+            uint32_t core_0_area_dram0_1_wr        :    1;
+            uint32_t core_0_area_pif_0_rd          :    1;
+            uint32_t core_0_area_pif_0_wr          :    1;
+            uint32_t core_0_area_pif_1_rd          :    1;
+            uint32_t core_0_area_pif_1_wr          :    1;
+            uint32_t core_0_sp_spill_min           :    1;
+            uint32_t core_0_sp_spill_max           :    1;
+            uint32_t core_0_iram0_exception_monitor:    1;
+            uint32_t core_0_dram0_exception_monitor:    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_0_interrupt_clr;
+    uint32_t core_0_area_dram0_0_min;
+    uint32_t core_0_area_dram0_0_max;
+    uint32_t core_0_area_dram0_1_min;
+    uint32_t core_0_area_dram0_1_max;
+    uint32_t core_0_area_pif_0_min;
+    uint32_t core_0_area_pif_0_max;
+    uint32_t core_0_area_pif_1_min;
+    uint32_t core_0_area_pif_1_max;
+    uint32_t core_0_area_sp;
+    uint32_t core_0_area_pc;
+    union {
+        struct {
+            uint32_t core_0_sp_unstable            :    8;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } core_0_sp_unstable;
+    uint32_t core_0_sp_min;
+    uint32_t core_0_sp_max;
+    uint32_t core_0_sp_pc;
+    union {
+        struct {
+            uint32_t core_0_rcd_pdebugenable       :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_0_rcd_pdebugenable;
+    union {
+        struct {
+            uint32_t core_0_rcd_recording          :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_0_rcd_recording;
+    uint32_t core_0_rcd_pdebuginst;
+    union {
+        struct {
+            uint32_t core_0_rcd_pdebugstatus       :    8;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } core_0_rcd_pdebugstatus;
+    uint32_t core_0_rcd_pdebugdata;
+    uint32_t core_0_rcd_pdebugpc;
+    uint32_t core_0_rcd_pdebugls0stat;
+    uint32_t core_0_rcd_pdebugls0addr;
+    uint32_t core_0_rcd_pdebugls0data;
+    uint32_t core_0_rcd_sp;
+    union {
+        struct {
+            uint32_t core_0_iram0_recording_addr_0 :    24;
+            uint32_t core_0_iram0_recording_wr_0   :    1;
+            uint32_t core_0_iram0_recording_loadstore_0:    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } core_0_iram0_exception_monitor_0;
+    union {
+        struct {
+            uint32_t core_0_iram0_recording_addr_1 :    24;
+            uint32_t core_0_iram0_recording_wr_1   :    1;
+            uint32_t core_0_iram0_recording_loadstore_1:    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } core_0_iram0_exception_monitor_1;
+    union {
+        struct {
+            uint32_t core_0_dram0_recording_addr_0 :    22;
+            uint32_t core_0_dram0_recording_wr_0   :    1;
+            uint32_t reserved23                    :    9;
+        };
+        uint32_t val;
+    } core_0_dram0_exception_monitor_0;
+    union {
+        struct {
+            uint32_t core_0_dram0_recording_byteen_0:    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } core_0_dram0_exception_monitor_1;
+    uint32_t core_0_dram0_exception_monitor_2;
+    union {
+        struct {
+            uint32_t core_0_dram0_recording_addr_1 :    22;
+            uint32_t core_0_dram0_recording_wr_1   :    1;
+            uint32_t reserved23                    :    9;
+        };
+        uint32_t val;
+    } core_0_dram0_exception_monitor_3;
+    union {
+        struct {
+            uint32_t core_0_dram0_recording_byteen_1:    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } core_0_dram0_exception_monitor_4;
+    uint32_t core_0_dram0_exception_monitor_5;
+    union {
+        struct {
+            uint32_t core_1_area_dram0_0_rd        :    1;
+            uint32_t core_1_area_dram0_0_wr        :    1;
+            uint32_t core_1_area_dram0_1_rd        :    1;
+            uint32_t core_1_area_dram0_1_wr        :    1;
+            uint32_t core_1_area_pif_0_rd          :    1;
+            uint32_t core_1_area_pif_0_wr          :    1;
+            uint32_t core_1_area_pif_1_rd          :    1;
+            uint32_t core_1_area_pif_1_wr          :    1;
+            uint32_t core_1_sp_spill_min           :    1;
+            uint32_t core_1_sp_spill_max           :    1;
+            uint32_t core_1_iram0_exception_monitor:    1;
+            uint32_t core_1_dram0_exception_monitor:    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_1_interrupt_ena;
+    union {
+        struct {
+            uint32_t core_1_area_dram0_0_rd        :    1;
+            uint32_t core_1_area_dram0_0_wr        :    1;
+            uint32_t core_1_area_dram0_1_rd        :    1;
+            uint32_t core_1_area_dram0_1_wr        :    1;
+            uint32_t core_1_area_pif_0_rd          :    1;
+            uint32_t core_1_area_pif_0_wr          :    1;
+            uint32_t core_1_area_pif_1_rd          :    1;
+            uint32_t core_1_area_pif_1_wr          :    1;
+            uint32_t core_1_sp_spill_min           :    1;
+            uint32_t core_1_sp_spill_max           :    1;
+            uint32_t core_1_iram0_exception_monitor:    1;
+            uint32_t core_1_dram0_exception_monitor:    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_1_interrupt_raw;
+    union {
+        struct {
+            uint32_t core_1_area_dram0_0_rd        :    1;
+            uint32_t core_1_area_dram0_0_wr        :    1;
+            uint32_t core_1_area_dram0_1_rd        :    1;
+            uint32_t core_1_area_dram0_1_wr        :    1;
+            uint32_t core_1_area_pif_0_rd          :    1;
+            uint32_t core_1_area_pif_0_wr          :    1;
+            uint32_t core_1_area_pif_1_rd          :    1;
+            uint32_t core_1_area_pif_1_wr          :    1;
+            uint32_t core_1_sp_spill_min           :    1;
+            uint32_t core_1_sp_spill_max           :    1;
+            uint32_t core_1_iram0_exception_monitor:    1;
+            uint32_t core_1_dram0_exception_monitor:    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_1_interrupt_rls;
+    union {
+        struct {
+            uint32_t core_1_area_dram0_0_rd        :    1;
+            uint32_t core_1_area_dram0_0_wr        :    1;
+            uint32_t core_1_area_dram0_1_rd        :    1;
+            uint32_t core_1_area_dram0_1_wr        :    1;
+            uint32_t core_1_area_pif_0_rd          :    1;
+            uint32_t core_1_area_pif_0_wr          :    1;
+            uint32_t core_1_area_pif_1_rd          :    1;
+            uint32_t core_1_area_pif_1_wr          :    1;
+            uint32_t core_1_sp_spill_min           :    1;
+            uint32_t core_1_sp_spill_max           :    1;
+            uint32_t core_1_iram0_exception_monitor:    1;
+            uint32_t core_1_dram0_exception_monitor:    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_1_interrupt_clr;
+    uint32_t core_1_area_dram0_0_min;
+    uint32_t core_1_area_dram0_0_max;
+    uint32_t core_1_area_dram0_1_min;
+    uint32_t core_1_area_dram0_1_max;
+    uint32_t core_1_area_pif_0_min;
+    uint32_t core_1_area_pif_0_max;
+    uint32_t core_1_area_pif_1_min;
+    uint32_t core_1_area_pif_1_max;
+    uint32_t core_1_area_pc;
+    uint32_t core_1_area_sp;
+    union {
+        struct {
+            uint32_t core_1_sp_unstable            :    8;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } core_1_sp_unstable;
+    uint32_t core_1_sp_min;
+    uint32_t core_1_sp_max;
+    uint32_t core_1_sp_pc;
+    union {
+        struct {
+            uint32_t core_1_rcd_pdebugenable       :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_1_rcd_pdebugenable;
+    union {
+        struct {
+            uint32_t core_1_rcd_recording          :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_1_rcd_recording;
+    uint32_t core_1_rcd_pdebuginst;
+    union {
+        struct {
+            uint32_t core_1_rcd_pdebugstatus       :    8;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } core_1_rcd_pdebugstatus;
+    uint32_t core_1_rcd_pdebugdata;
+    uint32_t core_1_rcd_pdebugpc;
+    uint32_t core_1_rcd_pdebugls0stat;
+    uint32_t core_1_rcd_pdebugls0addr;
+    uint32_t core_1_rcd_pdebugls0data;
+    uint32_t core_1_rcd_sp;
+    union {
+        struct {
+            uint32_t core_1_iram0_recording_addr_0 :    24;
+            uint32_t core_1_iram0_recording_wr_0   :    1;
+            uint32_t core_1_iram0_recording_loadstore_0:    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } core_1_iram0_exception_monitor_0;
+    union {
+        struct {
+            uint32_t core_1_iram0_recording_addr_1 :    24;
+            uint32_t core_1_iram0_recording_wr_1   :    1;
+            uint32_t core_1_iram0_recording_loadstore_1:    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } core_1_iram0_exception_monitor_1;
+    union {
+        struct {
+            uint32_t core_1_dram0_recording_addr_0 :    22;
+            uint32_t core_1_dram0_recording_wr_0   :    1;
+            uint32_t reserved23                    :    9;
+        };
+        uint32_t val;
+    } core_1_dram0_exception_monitor_0;
+    union {
+        struct {
+            uint32_t core_1_dram0_recording_byteen_0:    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } core_1_dram0_exception_monitor_1;
+    uint32_t core_1_dram0_exception_monitor_2;
+    union {
+        struct {
+            uint32_t core_1_dram0_recording_addr_1 :    22;
+            uint32_t core_1_dram0_recording_wr_1   :    1;
+            uint32_t reserved23                    :    9;
+        };
+        uint32_t val;
+    } core_1_dram0_exception_monitor_3;
+    union {
+        struct {
+            uint32_t core_1_dram0_recording_byteen_1:    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } core_1_dram0_exception_monitor_4;
+    uint32_t core_1_dram0_exception_monitor_5;
+    union {
+        struct {
+            uint32_t core_x_iram0_dram0_limit_cycle_0:    20;
+            uint32_t reserved20                    :    12;
+        };
+        uint32_t val;
+    } core_x_iram0_dram0_exception_monitor_0;
+    union {
+        struct {
+            uint32_t core_x_iram0_dram0_limit_cycle_1:    20;
+            uint32_t reserved20                    :    12;
+        };
+        uint32_t val;
+    } core_x_iram0_dram0_exception_monitor_1;
+    union {
+        struct {
+            uint32_t log                           :    3;
+            uint32_t log_mode                      :    3;
+            uint32_t log_mem_loopble               :    1;
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } log_setting;
+    uint32_t log_data_0;
+    uint32_t log_data_1;
+    uint32_t log_data_2;
+    uint32_t log_data_3;
+    union {
+        struct {
+            uint32_t log_data_size                 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } log_data_mask;
+    uint32_t log_min;
+    uint32_t log_max;
+    uint32_t log_mem_start;
+    uint32_t log_mem_end;
+    uint32_t log_mem_writing_addr;
+    union {
+        struct {
+            uint32_t log_mem_full_flag             :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } log_mem_full_flag;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    union {
+        struct {
+            uint32_t assist_debug_reg_date         :    28;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } reg_date;
+} assist_debug_dev_t;
+extern assist_debug_dev_t ASSIST_DEBUG;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_ASSIST_DEBUG_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/bb_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/bb_reg.h
new file mode 100644
index 00000000000..186b6f0d2eb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/bb_reg.h
@@ -0,0 +1,37 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/* Some of the baseband control registers.
+ * PU/PD fields defined here are used in sleep related functions.
+ */
+
+#define BBPD_CTRL (DR_REG_BB_BASE + 0x0054)
+#define BB_FFT_FORCE_PU (BIT(3))
+#define BB_FFT_FORCE_PU_M (BIT(3))
+#define BB_FFT_FORCE_PU_V 1
+#define BB_FFT_FORCE_PU_S 3
+#define BB_FFT_FORCE_PD (BIT(2))
+#define BB_FFT_FORCE_PD_M (BIT(2))
+#define BB_FFT_FORCE_PD_V 1
+#define BB_FFT_FORCE_PD_S 2
+#define BB_DC_EST_FORCE_PU (BIT(1))
+#define BB_DC_EST_FORCE_PU_M (BIT(1))
+#define BB_DC_EST_FORCE_PU_V 1
+#define BB_DC_EST_FORCE_PU_S 1
+#define BB_DC_EST_FORCE_PD (BIT(0))
+#define BB_DC_EST_FORCE_PD_M (BIT(0))
+#define BB_DC_EST_FORCE_PD_V 1
+#define BB_DC_EST_FORCE_PD_S 0
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/boot_mode.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/boot_mode.h
new file mode 100644
index 00000000000..d66451f43b2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/boot_mode.h
@@ -0,0 +1,98 @@
+// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc.h"
+
+/*SPI Boot*/
+#define IS_1XXX(v)                              (((v)&0x08)==0x08)
+
+/*Download Boot, USB/SPI(or SDIO_V2)/UART0/UART1*/
+#define IS_00XX(v)                              (((v)&0x0c)==0x00)
+
+/*Download Boot, SDIO/UART0/UART1,FEI_FEO V2*/
+#define IS_0000(v)                              (((v)&0x0f)==0x00)
+
+/*Download Boot, SDIO/UART0/UART1,FEI_REO V2*/
+#define IS_0001(v)                              (((v)&0x0f)==0x01)
+
+/*Download Boot, SDIO/UART0/UART1,REI_FEO V2*/
+#define IS_0010(v)                              (((v)&0x0f)==0x02)
+
+/*Download Boot, SDIO/UART0/UART1,REI_REO V2*/
+#define IS_0011(v)                              (((v)&0x0f)==0x03)
+
+/*legacy SPI Boot*/
+#define IS_0100(v)                              (((v)&0x0f)==0x04)
+
+/*ATE/ANALOG Mode*/
+#define IS_0101(v)                              (((v)&0x0f)==0x05)
+
+/*SPI(or SDIO_V1) download Mode*/
+#define IS_0110(v)                              (((v)&0x0f)==0x06)
+
+/*Diagnostic Mode+UART0 download Mode*/
+#define IS_0111(v)                              (((v)&0x0f)==0x07)
+
+
+
+#define BOOT_MODE_GET()                         (GPIO_REG_READ(GPIO_STRAP_REG))
+
+/*do not include download mode*/
+#define ETS_IS_UART_BOOT()                      IS_0111(BOOT_MODE_GET())
+
+/*all spi boot including spi/legacy*/
+#define ETS_IS_FLASH_BOOT()                     (IS_1XXX(BOOT_MODE_GET()) || IS_0100(BOOT_MODE_GET()))
+
+/*all faster spi boot including spi*/
+#define ETS_IS_FAST_FLASH_BOOT()                IS_1XXX(BOOT_MODE_GET())
+
+#if SUPPORT_SDIO_DOWNLOAD
+
+/*all sdio V2 of failing edge input, failing edge output*/
+#define ETS_IS_SDIO_FEI_FEO_V2_BOOT()           IS_0000(BOOT_MODE_GET())
+
+/*all sdio V2 of failing edge input, raising edge output*/
+#define ETS_IS_SDIO_FEI_REO_V2_BOOT()           IS_0001(BOOT_MODE_GET())
+
+/*all sdio V2 of raising edge input, failing edge output*/
+#define ETS_IS_SDIO_REI_FEO_V2_BOOT()           IS_0010(BOOT_MODE_GET())
+
+/*all sdio V2 of raising edge input, raising edge output*/
+#define ETS_IS_SDIO_REI_REO_V2_BOOT()           IS_0011(BOOT_MODE_GET())
+
+/*all sdio V1 of raising edge input, failing edge output*/
+#define ETS_IS_SDIO_REI_FEO_V1_BOOT()           IS_0110(BOOT_MODE_GET())
+
+/*do not include joint download mode*/
+#define ETS_IS_SDIO_BOOT()                      IS_0110(BOOT_MODE_GET())
+#else
+
+/*do not include joint download mode*/
+#define ETS_IS_SPI_DOWNLOAD_BOOT()              IS_0110(BOOT_MODE_GET())
+
+#endif
+
+/*joint download boot*/
+#define ETS_IS_JOINT_DOWNLOAD_BOOT()                  IS_00XX(BOOT_MODE_GET())
+
+/*ATE mode*/
+#define ETS_IS_ATE_BOOT()                       IS_0101(BOOT_MODE_GET())
+
+/*used by  ETS_IS_SDIO_UART_BOOT*/
+#define SEL_NO_BOOT                             0
+#define SEL_SDIO_BOOT                           BIT0
+#define SEL_UART_BOOT                           BIT1
+#define SEL_SPI_SLAVE_BOOT                      BIT2
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/brownout_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/brownout_caps.h
new file mode 100644
index 00000000000..797d33ebb9f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/brownout_caps.h
@@ -0,0 +1,25 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SOC_BROWNOUT_RESET_SUPPORTED 1
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/cache_memory.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/cache_memory.h
new file mode 100644
index 00000000000..2d6f337c819
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/cache_memory.h
@@ -0,0 +1,102 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*IRAM0 is connected with Cache IBUS0*/
+#define IRAM0_ADDRESS_LOW               0x40000000
+#define IRAM0_ADDRESS_HIGH              0x44000000
+#define IRAM0_CACHE_ADDRESS_LOW         0x42000000
+#define IRAM0_CACHE_ADDRESS_HIGH        0x44000000
+
+/*DRAM0 is connected with Cache DBUS0*/
+#define DRAM0_ADDRESS_LOW               0x3C000000
+#define DRAM0_ADDRESS_HIGH              0x40000000
+#define DRAM0_CACHE_ADDRESS_LOW         0x3C000000
+#define DRAM0_CACHE_ADDRESS_HIGH        0x3E000000
+#define DRAM0_CACHE_OPERATION_HIGH      DRAM0_CACHE_ADDRESS_HIGH
+#define ESP_CACHE_TEMP_ADDR             0x3C800000
+
+#define BUS_SIZE(bus_name)                 (bus_name##_ADDRESS_HIGH - bus_name##_ADDRESS_LOW)
+#define ADDRESS_IN_BUS(bus_name, vaddr)    ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH)
+
+#define ADDRESS_IN_IRAM0(vaddr)            ADDRESS_IN_BUS(IRAM0, vaddr)
+#define ADDRESS_IN_IRAM0_CACHE(vaddr)      ADDRESS_IN_BUS(IRAM0_CACHE, vaddr)
+#define ADDRESS_IN_DRAM0(vaddr)            ADDRESS_IN_BUS(DRAM0, vaddr)
+#define ADDRESS_IN_DRAM0_CACHE(vaddr)      ADDRESS_IN_BUS(DRAM0_CACHE, vaddr)
+
+#define BUS_IRAM0_CACHE_SIZE              BUS_SIZE(IRAM0_CACHE)
+#define BUS_DRAM0_CACHE_SIZE              BUS_SIZE(DRAM0_CACHE)
+
+#define CACHE_IBUS                      0
+#define CACHE_IBUS_MMU_START            0
+#define CACHE_IBUS_MMU_END              0x800
+
+#define CACHE_DBUS                      1
+#define CACHE_DBUS_MMU_START            0
+#define CACHE_DBUS_MMU_END              0x800
+
+#define CACHE_IROM_MMU_START            0
+#define CACHE_IROM_MMU_END              Cache_Get_IROM_MMU_End()
+#define CACHE_IROM_MMU_SIZE             (CACHE_IROM_MMU_END - CACHE_IROM_MMU_START)
+
+#define CACHE_DROM_MMU_START            CACHE_IROM_MMU_END
+#define CACHE_DROM_MMU_END              Cache_Get_DROM_MMU_End()
+#define CACHE_DROM_MMU_SIZE             (CACHE_DROM_MMU_END - CACHE_DROM_MMU_START)
+
+#define CACHE_DROM_MMU_MAX_END          0x400
+
+#define ICACHE_MMU_SIZE                 0x800
+#define DCACHE_MMU_SIZE                 0x800
+
+#define MMU_BUS_START(i)                0
+#define MMU_BUS_SIZE(i)                 0x800
+
+#define MMU_INVALID                     BIT(14)
+#define MMU_TYPE                        BIT(15)
+#define MMU_ACCESS_FLASH                0
+#define MMU_ACCESS_SPIRAM               BIT(15)
+
+#define CACHE_MAX_SYNC_NUM 0x400000
+#define CACHE_MAX_LOCK_NUM 0x8000
+
+#define FLASH_MMU_TABLE ((volatile uint32_t*) DR_REG_MMU_TABLE)
+#define FLASH_MMU_TABLE_SIZE (ICACHE_MMU_SIZE/sizeof(uint32_t))
+
+#define MMU_TABLE_INVALID_VAL 0x4000
+#define FLASH_MMU_TABLE_INVALID_VAL DPORT_MMU_TABLE_INVALID_VAL
+#define MMU_ADDRESS_MASK 0x3fff
+#define MMU_PAGE_SIZE 0x10000
+#define INVALID_PHY_PAGE 0xffff
+
+#define BUS_ADDR_SIZE 0x2000000
+#define BUS_ADDR_MASK (BUS_ADDR_SIZE - 1)
+
+#define CACHE_ICACHE_LOW_SHIFT         0
+#define CACHE_ICACHE_HIGH_SHIFT        2
+#define CACHE_DCACHE_LOW_SHIFT         4
+#define CACHE_DCACHE_HIGH_SHIFT        6
+
+#define CACHE_MEMORY_IBANK0_ADDR        0x40370000
+#define CACHE_MEMORY_IBANK1_ADDR        0x40374000
+
+#define CACHE_MEMORY_DBANK0_ADDR        0x3fcf0000
+#define CACHE_MEMORY_DBANK1_ADDR        0x3fcf8000
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/clkout_channel.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/clkout_channel.h
new file mode 100644
index 00000000000..6ddaeb13eeb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/clkout_channel.h
@@ -0,0 +1,23 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+//CLKOUT channels
+#define CLKOUT_GPIO20_DIRECT_CHANNEL         CLKOUT_CHANNEL_1
+#define CLKOUT_CHANNEL_1_DIRECT_GPIO_NUM     20
+#define CLKOUT_GPIO19_DIRECT_CHANNEL         CLKOUT_CHANNEL_2
+#define CLKOUT_CHANNEL_2_DIRECT_GPIO_NUM     19
+#define CLKOUT_GPIO18_DIRECT_CHANNEL         CLKOUT_CHANNEL_3
+#define CLKOUT_CHANNEL_3_DIRECT_GPIO_NUM     18
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/cpu.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/cpu.h
new file mode 100644
index 00000000000..ad7f7c11d57
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/cpu.h
@@ -0,0 +1,131 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include "xtensa/corebits.h"
+
+/* C macros for xtensa special register read/write/exchange */
+
+#define RSR(reg, curval)  asm volatile ("rsr %0, " #reg : "=r" (curval));
+#define WSR(reg, newval)  asm volatile ("wsr %0, " #reg : : "r" (newval));
+#define XSR(reg, swapval) asm volatile ("xsr %0, " #reg : "+r" (swapval));
+
+/** @brief Read current stack pointer address
+ *
+ */
+static inline void *get_sp(void)
+{
+    void *sp;
+    asm volatile ("mov %0, sp;" : "=r" (sp));
+    return sp;
+}
+
+/* Functions to set page attributes for Region Protection option in the CPU.
+ * See Xtensa ISA Reference manual for explanation of arguments (section 4.6.3.2).
+ */
+
+static inline void cpu_write_dtlb(uint32_t vpn, unsigned attr)
+{
+    asm volatile ("wdtlb  %1, %0; dsync\n" :: "r" (vpn), "r" (attr));
+}
+
+
+static inline void cpu_write_itlb(unsigned vpn, unsigned attr)
+{
+    asm volatile ("witlb  %1, %0; isync\n" :: "r" (vpn), "r" (attr));
+}
+
+/**
+ * @brief Configure memory region protection
+ *
+ * Make page 0 access raise an exception.
+ * Also protect some other unused pages so we can catch weirdness.
+ * Useful attribute values:
+ * 0 — cached, RW
+ * 2 — bypass cache, RWX (default value after CPU reset)
+ * 15 — no access, raise exception
+ */
+
+static inline void cpu_configure_region_protection(void)
+{
+    const uint32_t pages_to_protect[] = {0x00000000, 0x80000000, 0xa0000000, 0xc0000000, 0xe0000000};
+    for (int i = 0; i < sizeof(pages_to_protect) / sizeof(pages_to_protect[0]); ++i) {
+        cpu_write_dtlb(pages_to_protect[i], 0xf);
+        cpu_write_itlb(pages_to_protect[i], 0xf);
+    }
+    cpu_write_dtlb(0x20000000, 0);
+    cpu_write_itlb(0x20000000, 0);
+}
+
+/**
+ * @brief Stall CPU using RTC controller
+ * @param cpu_id ID of the CPU to stall (0 = PRO, 1 = APP)
+ */
+void esp_cpu_stall(int cpu_id);
+
+/**
+ * @brief Un-stall CPU using RTC controller
+ * @param cpu_id ID of the CPU to un-stall (0 = PRO, 1 = APP)
+ */
+void esp_cpu_unstall(int cpu_id);
+
+/**
+ * @brief Reset CPU using RTC controller
+ * @param cpu_id ID of the CPU to reset (0 = PRO, 1 = APP)
+ */
+void esp_cpu_reset(int cpu_id);
+
+
+/**
+ * @brief Returns true if a JTAG debugger is attached to CPU
+ * OCD (on chip debug) port.
+ *
+ * @note If "Make exception and panic handlers JTAG/OCD aware"
+ * is disabled, this function always returns false.
+ */
+bool esp_cpu_in_ocd_debug_mode(void);
+
+/**
+ * @brief Convert the PC register value to its true address
+ *
+ * The address of the current instruction is not stored as an exact uint32_t
+ * representation in PC register. This function will convert the value stored in
+ * the PC register to a uint32_t address.
+ *
+ * @param pc_raw The PC as stored in register format.
+ *
+ * @return Address in uint32_t format
+ */
+static inline uint32_t esp_cpu_process_stack_pc(uint32_t pc)
+{
+    if (pc & 0x80000000) {
+        //Top two bits of a0 (return address) specify window increment. Overwrite to map to address space.
+        pc = (pc & 0x3fffffff) | 0x40000000;
+    }
+    //Minus 3 to get PC of previous instruction (i.e. instruction executed before return address)
+    return pc - 3;
+}
+
+typedef uint32_t esp_cpu_ccount_t;
+
+static inline esp_cpu_ccount_t esp_cpu_get_ccount(void)
+{
+    uint32_t result;
+    RSR(CCOUNT, result);
+    return result;
+}
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/cpu_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/cpu_caps.h
new file mode 100644
index 00000000000..b773df45dcc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/cpu_caps.h
@@ -0,0 +1,22 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define SOC_CPU_BREAKPOINTS_NUM         2
+#define SOC_CPU_WATCHPOINTS_NUM         2
+
+#define SOC_CPU_WATCHPOINT_SIZE         64 // bytes
+
+#define SOC_CPU_HAS_FPU             1
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/dport_access.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/dport_access.h
new file mode 100644
index 00000000000..1223fb8b3aa
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/dport_access.h
@@ -0,0 +1,105 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#include "esp32s3/dport_access.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ESP32S3 does not have DPORT bus, so these macros are all same as the non-DPORT versions
+
+// _DPORT_REG_WRITE & DPORT_REG_WRITE are equivalent.
+#define _DPORT_REG_READ(_r)        (*(volatile uint32_t *)(_r))
+#define _DPORT_REG_WRITE(_r, _v)   (*(volatile uint32_t *)(_r)) = (_v)
+
+// Write value to DPORT register (does not require protecting)
+#define DPORT_REG_WRITE(_r, _v)   _DPORT_REG_WRITE((_r), (_v))
+
+#define DPORT_REG_READ(_r)    _DPORT_REG_READ(_r)
+#define DPORT_SEQUENCE_REG_READ(_r)    _DPORT_REG_READ(_r)
+
+//get bit or get bits from register
+#define DPORT_REG_GET_BIT(_r, _b)  (DPORT_REG_READ(_r) & (_b))
+
+//set bit or set bits to register
+#define DPORT_REG_SET_BIT(_r, _b)  DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
+
+//clear bit or clear bits of register
+#define DPORT_REG_CLR_BIT(_r, _b)  DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
+
+//set bits of register controlled by mask
+#define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b) & (_m))))
+
+//get field from register, uses field _S & _V to determine mask
+#define DPORT_REG_GET_FIELD(_r, _f) ((DPORT_REG_READ(_r) >> (_f##_S)) & (_f##_V))
+
+//set field to register, used when _f is not left shifted by _f##_S
+#define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) << (_f##_S))))|(((_v) & (_f##_V))<<(_f##_S))))
+
+//get field value from a variable, used when _f is not left shifted by _f##_S
+#define DPORT_VALUE_GET_FIELD(_r, _f) (((_r) >> (_f##_S)) & (_f))
+
+//get field value from a variable, used when _f is left shifted by _f##_S
+#define DPORT_VALUE_GET_FIELD2(_r, _f) (((_r) & (_f))>> (_f##_S))
+
+//set field value to a variable, used when _f is not left shifted by _f##_S
+#define DPORT_VALUE_SET_FIELD(_r, _f, _v) ((_r)=(((_r) & ~((_f) << (_f##_S)))|((_v)<<(_f##_S))))
+
+//set field value to a variable, used when _f is left shifted by _f##_S
+#define DPORT_VALUE_SET_FIELD2(_r, _f, _v) ((_r)=(((_r) & ~(_f))|((_v)<<(_f##_S))))
+
+//generate a value from a field value, used when _f is not left shifted by _f##_S
+#define DPORT_FIELD_TO_VALUE(_f, _v) (((_v)&(_f))<<_f##_S)
+
+//generate a value from a field value, used when _f is left shifted by _f##_S
+#define DPORT_FIELD_TO_VALUE2(_f, _v) (((_v)<<_f##_S) & (_f))
+
+//Register read macros with an underscore prefix access DPORT memory directly. In IDF apps, use the non-underscore versions to be SMP-safe.
+#define _DPORT_READ_PERI_REG(addr) (*((volatile uint32_t *)(addr)))
+#define _DPORT_WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)(addr))) = (uint32_t)(val)
+#define _DPORT_REG_SET_BIT(_r, _b)  _DPORT_REG_WRITE((_r), (_DPORT_REG_READ(_r)|(_b)))
+#define _DPORT_REG_CLR_BIT(_r, _b)  _DPORT_REG_WRITE((_r), (_DPORT_REG_READ(_r) & (~(_b))))
+
+#define DPORT_READ_PERI_REG(addr)       _DPORT_READ_PERI_REG(addr)
+
+//write value to register
+#define DPORT_WRITE_PERI_REG(addr, val) _DPORT_WRITE_PERI_REG((addr), (val))
+
+//clear bits of register controlled by mask
+#define DPORT_CLEAR_PERI_REG_MASK(reg, mask) DPORT_WRITE_PERI_REG((reg), (DPORT_READ_PERI_REG(reg)&(~(mask))))
+
+//set bits of register controlled by mask
+#define DPORT_SET_PERI_REG_MASK(reg, mask)   DPORT_WRITE_PERI_REG((reg), (DPORT_READ_PERI_REG(reg)|(mask)))
+
+//get bits of register controlled by mask
+#define DPORT_GET_PERI_REG_MASK(reg, mask)   (DPORT_READ_PERI_REG(reg) & (mask))
+
+//get bits of register controlled by highest bit and lowest bit
+#define DPORT_GET_PERI_REG_BITS(reg, hipos,lowpos)     ((DPORT_READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1))
+
+//set bits of register controlled by mask and shift
+#define DPORT_SET_PERI_REG_BITS(reg,bit_map,value,shift) DPORT_WRITE_PERI_REG((reg), ((DPORT_READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & bit_map)<<(shift))))
+
+//get field of register
+#define DPORT_GET_PERI_REG_BITS2(reg, mask,shift)      ((DPORT_READ_PERI_REG(reg)>>(shift))&(mask))
+//}}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/dport_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/dport_reg.h
new file mode 100644
index 00000000000..e17afb79b5c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/dport_reg.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "interrupt_reg.h"
+#include "system_reg.h"
+#include "sensitive_reg.h"
+#include "soc.h"
+
+#define DPORT_DATE_REG SYSTEM_DATE_REG
+
+#ifndef __ASSEMBLER__
+#include "dport_access.h"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/efuse_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/efuse_reg.h
new file mode 100644
index 00000000000..b4d10f3f661
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/efuse_reg.h
@@ -0,0 +1,1940 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _SOC_EFUSE_REG_H_
+#define _SOC_EFUSE_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define EFUSE_PGM_DATA0_REG          (DR_REG_EFUSE_BASE + 0x0)
+/* EFUSE_PGM_DATA_0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The content of the 0th 32-bit data to be programmed..*/
+#define EFUSE_PGM_DATA_0    0xFFFFFFFF
+#define EFUSE_PGM_DATA_0_M  ((EFUSE_PGM_DATA_0_V)<<(EFUSE_PGM_DATA_0_S))
+#define EFUSE_PGM_DATA_0_V  0xFFFFFFFF
+#define EFUSE_PGM_DATA_0_S  0
+
+#define EFUSE_PGM_DATA1_REG          (DR_REG_EFUSE_BASE + 0x4)
+/* EFUSE_PGM_DATA_1 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The content of the 1st 32-bit data to be programmed..*/
+#define EFUSE_PGM_DATA_1    0xFFFFFFFF
+#define EFUSE_PGM_DATA_1_M  ((EFUSE_PGM_DATA_1_V)<<(EFUSE_PGM_DATA_1_S))
+#define EFUSE_PGM_DATA_1_V  0xFFFFFFFF
+#define EFUSE_PGM_DATA_1_S  0
+
+#define EFUSE_PGM_DATA2_REG          (DR_REG_EFUSE_BASE + 0x8)
+/* EFUSE_PGM_DATA_2 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The content of the 2nd 32-bit data to be programmed..*/
+#define EFUSE_PGM_DATA_2    0xFFFFFFFF
+#define EFUSE_PGM_DATA_2_M  ((EFUSE_PGM_DATA_2_V)<<(EFUSE_PGM_DATA_2_S))
+#define EFUSE_PGM_DATA_2_V  0xFFFFFFFF
+#define EFUSE_PGM_DATA_2_S  0
+
+#define EFUSE_PGM_DATA3_REG          (DR_REG_EFUSE_BASE + 0xC)
+/* EFUSE_PGM_DATA_3 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The content of the 3rd 32-bit data to be programmed..*/
+#define EFUSE_PGM_DATA_3    0xFFFFFFFF
+#define EFUSE_PGM_DATA_3_M  ((EFUSE_PGM_DATA_3_V)<<(EFUSE_PGM_DATA_3_S))
+#define EFUSE_PGM_DATA_3_V  0xFFFFFFFF
+#define EFUSE_PGM_DATA_3_S  0
+
+#define EFUSE_PGM_DATA4_REG          (DR_REG_EFUSE_BASE + 0x10)
+/* EFUSE_PGM_DATA_4 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The content of the 4th 32-bit data to be programmed..*/
+#define EFUSE_PGM_DATA_4    0xFFFFFFFF
+#define EFUSE_PGM_DATA_4_M  ((EFUSE_PGM_DATA_4_V)<<(EFUSE_PGM_DATA_4_S))
+#define EFUSE_PGM_DATA_4_V  0xFFFFFFFF
+#define EFUSE_PGM_DATA_4_S  0
+
+#define EFUSE_PGM_DATA5_REG          (DR_REG_EFUSE_BASE + 0x14)
+/* EFUSE_PGM_DATA_5 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The content of the 5th 32-bit data to be programmed..*/
+#define EFUSE_PGM_DATA_5    0xFFFFFFFF
+#define EFUSE_PGM_DATA_5_M  ((EFUSE_PGM_DATA_5_V)<<(EFUSE_PGM_DATA_5_S))
+#define EFUSE_PGM_DATA_5_V  0xFFFFFFFF
+#define EFUSE_PGM_DATA_5_S  0
+
+#define EFUSE_PGM_DATA6_REG          (DR_REG_EFUSE_BASE + 0x18)
+/* EFUSE_PGM_DATA_6 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The content of the 6th 32-bit data to be programmed..*/
+#define EFUSE_PGM_DATA_6    0xFFFFFFFF
+#define EFUSE_PGM_DATA_6_M  ((EFUSE_PGM_DATA_6_V)<<(EFUSE_PGM_DATA_6_S))
+#define EFUSE_PGM_DATA_6_V  0xFFFFFFFF
+#define EFUSE_PGM_DATA_6_S  0
+
+#define EFUSE_PGM_DATA7_REG          (DR_REG_EFUSE_BASE + 0x1C)
+/* EFUSE_PGM_DATA_7 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The content of the 7th 32-bit data to be programmed..*/
+#define EFUSE_PGM_DATA_7    0xFFFFFFFF
+#define EFUSE_PGM_DATA_7_M  ((EFUSE_PGM_DATA_7_V)<<(EFUSE_PGM_DATA_7_S))
+#define EFUSE_PGM_DATA_7_V  0xFFFFFFFF
+#define EFUSE_PGM_DATA_7_S  0
+
+#define EFUSE_PGM_CHECK_VALUE0_REG          (DR_REG_EFUSE_BASE + 0x20)
+/* EFUSE_PGM_RS_DATA_0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The content of the 0th 32-bit RS code to be programmed..*/
+#define EFUSE_PGM_RS_DATA_0    0xFFFFFFFF
+#define EFUSE_PGM_RS_DATA_0_M  ((EFUSE_PGM_RS_DATA_0_V)<<(EFUSE_PGM_RS_DATA_0_S))
+#define EFUSE_PGM_RS_DATA_0_V  0xFFFFFFFF
+#define EFUSE_PGM_RS_DATA_0_S  0
+
+#define EFUSE_PGM_CHECK_VALUE1_REG          (DR_REG_EFUSE_BASE + 0x24)
+/* EFUSE_PGM_RS_DATA_1 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The content of the 1st 32-bit RS code to be programmed..*/
+#define EFUSE_PGM_RS_DATA_1    0xFFFFFFFF
+#define EFUSE_PGM_RS_DATA_1_M  ((EFUSE_PGM_RS_DATA_1_V)<<(EFUSE_PGM_RS_DATA_1_S))
+#define EFUSE_PGM_RS_DATA_1_V  0xFFFFFFFF
+#define EFUSE_PGM_RS_DATA_1_S  0
+
+#define EFUSE_PGM_CHECK_VALUE2_REG          (DR_REG_EFUSE_BASE + 0x28)
+/* EFUSE_PGM_RS_DATA_2 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The content of the 2nd 32-bit RS code to be programmed..*/
+#define EFUSE_PGM_RS_DATA_2    0xFFFFFFFF
+#define EFUSE_PGM_RS_DATA_2_M  ((EFUSE_PGM_RS_DATA_2_V)<<(EFUSE_PGM_RS_DATA_2_S))
+#define EFUSE_PGM_RS_DATA_2_V  0xFFFFFFFF
+#define EFUSE_PGM_RS_DATA_2_S  0
+
+#define EFUSE_RD_WR_DIS_REG          (DR_REG_EFUSE_BASE + 0x2C)
+/* EFUSE_WR_DIS : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Disable programming of individual eFuses..*/
+#define EFUSE_WR_DIS    0xFFFFFFFF
+#define EFUSE_WR_DIS_M  ((EFUSE_WR_DIS_V)<<(EFUSE_WR_DIS_S))
+#define EFUSE_WR_DIS_V  0xFFFFFFFF
+#define EFUSE_WR_DIS_S  0
+
+#define EFUSE_RD_REPEAT_DATA0_REG          (DR_REG_EFUSE_BASE + 0x30)
+/* EFUSE_VDD_SPI_DREFH : RO ;bitpos:[31:30] ;default: 2'h0 ; */
+/*description: SPI regulator high voltage reference..*/
+#define EFUSE_VDD_SPI_DREFH    0x00000003
+#define EFUSE_VDD_SPI_DREFH_M  ((EFUSE_VDD_SPI_DREFH_V)<<(EFUSE_VDD_SPI_DREFH_S))
+#define EFUSE_VDD_SPI_DREFH_V  0x3
+#define EFUSE_VDD_SPI_DREFH_S  30
+/* EFUSE_VDD_SPI_MODECURLIM : RO ;bitpos:[29] ;default: 1'b0 ; */
+/*description: SPI regulator switches current limit mode..*/
+#define EFUSE_VDD_SPI_MODECURLIM    (BIT(29))
+#define EFUSE_VDD_SPI_MODECURLIM_M  (BIT(29))
+#define EFUSE_VDD_SPI_MODECURLIM_V  0x1
+#define EFUSE_VDD_SPI_MODECURLIM_S  29
+/* EFUSE_BTLC_GPIO_ENABLE : RO ;bitpos:[28:27] ;default: 2'h0 ; */
+/*description: Enable btlc gpio..*/
+#define EFUSE_BTLC_GPIO_ENABLE    0x00000003
+#define EFUSE_BTLC_GPIO_ENABLE_M  ((EFUSE_BTLC_GPIO_ENABLE_V)<<(EFUSE_BTLC_GPIO_ENABLE_S))
+#define EFUSE_BTLC_GPIO_ENABLE_V  0x3
+#define EFUSE_BTLC_GPIO_ENABLE_S  27
+/* EFUSE_EXT_PHY_ENABLE : RO ;bitpos:[26] ;default: 1'b0 ; */
+/*description: Set this bit to enable external PHY..*/
+#define EFUSE_EXT_PHY_ENABLE    (BIT(26))
+#define EFUSE_EXT_PHY_ENABLE_M  (BIT(26))
+#define EFUSE_EXT_PHY_ENABLE_V  0x1
+#define EFUSE_EXT_PHY_ENABLE_S  26
+/* EFUSE_USB_EXCHG_PINS : RO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: Set this bit to exchange USB D+ and D- pins..*/
+#define EFUSE_USB_EXCHG_PINS    (BIT(25))
+#define EFUSE_USB_EXCHG_PINS_M  (BIT(25))
+#define EFUSE_USB_EXCHG_PINS_V  0x1
+#define EFUSE_USB_EXCHG_PINS_S  25
+/* EFUSE_USB_DREFL : RO ;bitpos:[24:23] ;default: 2'h0 ; */
+/*description: Controls single-end input threshold vrefl, 0.8 V to 1.04 V with step of 80 mV, s
+tored in eFuse..*/
+#define EFUSE_USB_DREFL    0x00000003
+#define EFUSE_USB_DREFL_M  ((EFUSE_USB_DREFL_V)<<(EFUSE_USB_DREFL_S))
+#define EFUSE_USB_DREFL_V  0x3
+#define EFUSE_USB_DREFL_S  23
+/* EFUSE_USB_DREFH : RO ;bitpos:[22:21] ;default: 2'h0 ; */
+/*description: Controls single-end input threshold vrefh, 1.76 V to 2 V with step of 80 mV, sto
+red in eFuse..*/
+#define EFUSE_USB_DREFH    0x00000003
+#define EFUSE_USB_DREFH_M  ((EFUSE_USB_DREFH_V)<<(EFUSE_USB_DREFH_S))
+#define EFUSE_USB_DREFH_V  0x3
+#define EFUSE_USB_DREFH_S  21
+/* EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT : RO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: Set this bit to disable flash encryption when in download boot modes..*/
+#define EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT    (BIT(20))
+#define EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_M  (BIT(20))
+#define EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_V  0x1
+#define EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_S  20
+/* EFUSE_DIS_PAD_JTAG : RO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: Set this bit to disable JTAG in the hard way. JTAG is disabled permanently..*/
+#define EFUSE_DIS_PAD_JTAG    (BIT(19))
+#define EFUSE_DIS_PAD_JTAG_M  (BIT(19))
+#define EFUSE_DIS_PAD_JTAG_V  0x1
+#define EFUSE_DIS_PAD_JTAG_S  19
+/* EFUSE_SOFT_DIS_JTAG : RO ;bitpos:[18:16] ;default: 3'h0 ; */
+/*description: Set these bits to disable JTAG in the soft way (odd number 1 means disable ). JT
+AG can be enabled in HMAC module..*/
+#define EFUSE_SOFT_DIS_JTAG    0x00000007
+#define EFUSE_SOFT_DIS_JTAG_M  ((EFUSE_SOFT_DIS_JTAG_V)<<(EFUSE_SOFT_DIS_JTAG_S))
+#define EFUSE_SOFT_DIS_JTAG_V  0x7
+#define EFUSE_SOFT_DIS_JTAG_S  16
+/* EFUSE_DIS_APP_CPU : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: Disable app cpu..*/
+#define EFUSE_DIS_APP_CPU    (BIT(15))
+#define EFUSE_DIS_APP_CPU_M  (BIT(15))
+#define EFUSE_DIS_APP_CPU_V  0x1
+#define EFUSE_DIS_APP_CPU_S  15
+/* EFUSE_DIS_CAN : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: Set this bit to disable CAN function..*/
+#define EFUSE_DIS_CAN    (BIT(14))
+#define EFUSE_DIS_CAN_M  (BIT(14))
+#define EFUSE_DIS_CAN_V  0x1
+#define EFUSE_DIS_CAN_S  14
+/* EFUSE_DIS_USB : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: Set this bit to disable USB function..*/
+#define EFUSE_DIS_USB    (BIT(13))
+#define EFUSE_DIS_USB_M  (BIT(13))
+#define EFUSE_DIS_USB_V  0x1
+#define EFUSE_DIS_USB_S  13
+/* EFUSE_DIS_FORCE_DOWNLOAD : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to disable the function that forces chip into download mode..*/
+#define EFUSE_DIS_FORCE_DOWNLOAD    (BIT(12))
+#define EFUSE_DIS_FORCE_DOWNLOAD_M  (BIT(12))
+#define EFUSE_DIS_FORCE_DOWNLOAD_V  0x1
+#define EFUSE_DIS_FORCE_DOWNLOAD_S  12
+/* EFUSE_DIS_DOWNLOAD_DCACHE : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: Set this bit to disable Dcache in download mode ( boot_mode[3:0] is 0, 1, 2, 3,
+6, 7)..*/
+#define EFUSE_DIS_DOWNLOAD_DCACHE    (BIT(11))
+#define EFUSE_DIS_DOWNLOAD_DCACHE_M  (BIT(11))
+#define EFUSE_DIS_DOWNLOAD_DCACHE_V  0x1
+#define EFUSE_DIS_DOWNLOAD_DCACHE_S  11
+/* EFUSE_DIS_DOWNLOAD_ICACHE : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: Set this bit to disable Icache in download mode (boot_mode[3:0] is 0, 1, 2, 3, 6
+, 7)..*/
+#define EFUSE_DIS_DOWNLOAD_ICACHE    (BIT(10))
+#define EFUSE_DIS_DOWNLOAD_ICACHE_M  (BIT(10))
+#define EFUSE_DIS_DOWNLOAD_ICACHE_V  0x1
+#define EFUSE_DIS_DOWNLOAD_ICACHE_S  10
+/* EFUSE_DIS_DCACHE : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Set this bit to disable Dcache..*/
+#define EFUSE_DIS_DCACHE    (BIT(9))
+#define EFUSE_DIS_DCACHE_M  (BIT(9))
+#define EFUSE_DIS_DCACHE_V  0x1
+#define EFUSE_DIS_DCACHE_S  9
+/* EFUSE_DIS_ICACHE : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set this bit to disable Icache..*/
+#define EFUSE_DIS_ICACHE    (BIT(8))
+#define EFUSE_DIS_ICACHE_M  (BIT(8))
+#define EFUSE_DIS_ICACHE_V  0x1
+#define EFUSE_DIS_ICACHE_S  8
+/* EFUSE_RPT4_RESERVED5 : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Reserved */
+#define EFUSE_RPT4_RESERVED5    (BIT(7))
+#define EFUSE_RPT4_RESERVED5_M  (BIT(7))
+#define EFUSE_RPT4_RESERVED5_V  0x1
+#define EFUSE_RPT4_RESERVED5_S  7
+/* EFUSE_RD_DIS : RO ;bitpos:[6:0] ;default: 7'h0 ; */
+/*description: Set this bit to disable reading from BlOCK4-10..*/
+#define EFUSE_RD_DIS    0x0000007F
+#define EFUSE_RD_DIS_M  ((EFUSE_RD_DIS_V)<<(EFUSE_RD_DIS_S))
+#define EFUSE_RD_DIS_V  0x7F
+#define EFUSE_RD_DIS_S  0
+
+#define EFUSE_RD_REPEAT_DATA1_REG          (DR_REG_EFUSE_BASE + 0x34)
+/* EFUSE_KEY_PURPOSE_1 : RO ;bitpos:[31:28] ;default: 4'h0 ; */
+/*description: Purpose of Key1..*/
+#define EFUSE_KEY_PURPOSE_1    0x0000000F
+#define EFUSE_KEY_PURPOSE_1_M  ((EFUSE_KEY_PURPOSE_1_V)<<(EFUSE_KEY_PURPOSE_1_S))
+#define EFUSE_KEY_PURPOSE_1_V  0xF
+#define EFUSE_KEY_PURPOSE_1_S  28
+/* EFUSE_KEY_PURPOSE_0 : RO ;bitpos:[27:24] ;default: 4'h0 ; */
+/*description: Purpose of Key0..*/
+#define EFUSE_KEY_PURPOSE_0    0x0000000F
+#define EFUSE_KEY_PURPOSE_0_M  ((EFUSE_KEY_PURPOSE_0_V)<<(EFUSE_KEY_PURPOSE_0_S))
+#define EFUSE_KEY_PURPOSE_0_V  0xF
+#define EFUSE_KEY_PURPOSE_0_S  24
+/* EFUSE_SECURE_BOOT_KEY_REVOKE2 : RO ;bitpos:[23] ;default: 1'b0 ; */
+/*description: Set this bit to enable revoking third secure boot key..*/
+#define EFUSE_SECURE_BOOT_KEY_REVOKE2    (BIT(23))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE2_M  (BIT(23))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE2_V  0x1
+#define EFUSE_SECURE_BOOT_KEY_REVOKE2_S  23
+/* EFUSE_SECURE_BOOT_KEY_REVOKE1 : RO ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Set this bit to enable revoking second secure boot key..*/
+#define EFUSE_SECURE_BOOT_KEY_REVOKE1    (BIT(22))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE1_M  (BIT(22))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE1_V  0x1
+#define EFUSE_SECURE_BOOT_KEY_REVOKE1_S  22
+/* EFUSE_SECURE_BOOT_KEY_REVOKE0 : RO ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to enable revoking first secure boot key..*/
+#define EFUSE_SECURE_BOOT_KEY_REVOKE0    (BIT(21))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE0_M  (BIT(21))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE0_V  0x1
+#define EFUSE_SECURE_BOOT_KEY_REVOKE0_S  21
+/* EFUSE_SPI_BOOT_CRYPT_CNT : RO ;bitpos:[20:18] ;default: 3'h0 ; */
+/*description: Set this bit to enable SPI boot encrypt/decrypt. Odd number of 1: enable. even n
+umber of 1: disable..*/
+#define EFUSE_SPI_BOOT_CRYPT_CNT    0x00000007
+#define EFUSE_SPI_BOOT_CRYPT_CNT_M  ((EFUSE_SPI_BOOT_CRYPT_CNT_V)<<(EFUSE_SPI_BOOT_CRYPT_CNT_S))
+#define EFUSE_SPI_BOOT_CRYPT_CNT_V  0x7
+#define EFUSE_SPI_BOOT_CRYPT_CNT_S  18
+/* EFUSE_WDT_DELAY_SEL : RO ;bitpos:[17:16] ;default: 2'h0 ; */
+/*description: Selects RTC watchdog timeout threshold, in unit of slow clock cycle. 0: 40000. 1
+: 80000. 2: 160000. 3:320000..*/
+#define EFUSE_WDT_DELAY_SEL    0x00000003
+#define EFUSE_WDT_DELAY_SEL_M  ((EFUSE_WDT_DELAY_SEL_V)<<(EFUSE_WDT_DELAY_SEL_S))
+#define EFUSE_WDT_DELAY_SEL_V  0x3
+#define EFUSE_WDT_DELAY_SEL_S  16
+/* EFUSE_VDD_SPI_DCAP : RO ;bitpos:[15:14] ;default: 2'h0 ; */
+/*description: Prevents SPI regulator from overshoot..*/
+#define EFUSE_VDD_SPI_DCAP    0x00000003
+#define EFUSE_VDD_SPI_DCAP_M  ((EFUSE_VDD_SPI_DCAP_V)<<(EFUSE_VDD_SPI_DCAP_S))
+#define EFUSE_VDD_SPI_DCAP_V  0x3
+#define EFUSE_VDD_SPI_DCAP_S  14
+/* EFUSE_VDD_SPI_INIT : RO ;bitpos:[13:12] ;default: 2'h0 ; */
+/*description: Adds resistor from LDO output to ground. 0: no resistance 1: 6 K 2: 4 K 3: 2 K..*/
+#define EFUSE_VDD_SPI_INIT    0x00000003
+#define EFUSE_VDD_SPI_INIT_M  ((EFUSE_VDD_SPI_INIT_V)<<(EFUSE_VDD_SPI_INIT_S))
+#define EFUSE_VDD_SPI_INIT_V  0x3
+#define EFUSE_VDD_SPI_INIT_S  12
+/* EFUSE_VDD_SPI_DCURLIM : RO ;bitpos:[11:9]] ;default: 3'h0 ; */
+/*description: Tunes the current limit threshold of SPI regulator when tieh=0, about 800 mA/(8+
+d)..*/
+#define EFUSE_VDD_SPI_DCURLIM    0x00000007
+#define EFUSE_VDD_SPI_DCURLIM_M  ((EFUSE_VDD_SPI_DCURLIM_V)<<(EFUSE_VDD_SPI_DCURLIM_S))
+#define EFUSE_VDD_SPI_DCURLIM_V  0x7
+#define EFUSE_VDD_SPI_DCURLIM_S  9
+/* EFUSE_VDD_SPI_ENCURLIM : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set SPI regulator to 1 to enable output current limit..*/
+#define EFUSE_VDD_SPI_ENCURLIM    (BIT(8))
+#define EFUSE_VDD_SPI_ENCURLIM_M  (BIT(8))
+#define EFUSE_VDD_SPI_ENCURLIM_V  0x1
+#define EFUSE_VDD_SPI_ENCURLIM_S  8
+/* EFUSE_VDD_SPI_EN_INIT : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set SPI regulator to 0 to configure init[1:0]=0..*/
+#define EFUSE_VDD_SPI_EN_INIT    (BIT(7))
+#define EFUSE_VDD_SPI_EN_INIT_M  (BIT(7))
+#define EFUSE_VDD_SPI_EN_INIT_V  0x1
+#define EFUSE_VDD_SPI_EN_INIT_S  7
+/* EFUSE_VDD_SPI_FORCE : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit and force to use the configuration of eFuse to configure VDD_SPI..*/
+#define EFUSE_VDD_SPI_FORCE    (BIT(6))
+#define EFUSE_VDD_SPI_FORCE_M  (BIT(6))
+#define EFUSE_VDD_SPI_FORCE_V  0x1
+#define EFUSE_VDD_SPI_FORCE_S  6
+/* EFUSE_VDD_SPI_TIEH : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: SPI regulator output is short connected to VDD3P3_RTC_IO..*/
+#define EFUSE_VDD_SPI_TIEH    (BIT(5))
+#define EFUSE_VDD_SPI_TIEH_M  (BIT(5))
+#define EFUSE_VDD_SPI_TIEH_V  0x1
+#define EFUSE_VDD_SPI_TIEH_S  5
+/* EFUSE_VDD_SPI_XPD : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: SPI regulator power up signal..*/
+#define EFUSE_VDD_SPI_XPD    (BIT(4))
+#define EFUSE_VDD_SPI_XPD_M  (BIT(4))
+#define EFUSE_VDD_SPI_XPD_V  0x1
+#define EFUSE_VDD_SPI_XPD_S  4
+/* EFUSE_VDD_SPI_DREFL : RO ;bitpos:[3:2] ;default: 2'h0 ; */
+/*description: SPI regulator low voltage reference..*/
+#define EFUSE_VDD_SPI_DREFL    0x00000003
+#define EFUSE_VDD_SPI_DREFL_M  ((EFUSE_VDD_SPI_DREFL_V)<<(EFUSE_VDD_SPI_DREFL_S))
+#define EFUSE_VDD_SPI_DREFL_V  0x3
+#define EFUSE_VDD_SPI_DREFL_S  2
+/* EFUSE_VDD_SPI_DREFM : RO ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: SPI regulator medium voltage reference..*/
+#define EFUSE_VDD_SPI_DREFM    0x00000003
+#define EFUSE_VDD_SPI_DREFM_M  ((EFUSE_VDD_SPI_DREFM_V)<<(EFUSE_VDD_SPI_DREFM_S))
+#define EFUSE_VDD_SPI_DREFM_V  0x3
+#define EFUSE_VDD_SPI_DREFM_S  0
+
+#define EFUSE_RD_REPEAT_DATA2_REG          (DR_REG_EFUSE_BASE + 0x38)
+/* EFUSE_FLASH_TPUW : RO ;bitpos:[31:28] ;default: 4'h0 ; */
+/*description: Configures flash waiting time after power-up, in unit of ms. If the value is les
+s than 15, the waiting time is the configurable value; Otherwise, the waiting ti
+me is twice the configurable value..*/
+#define EFUSE_FLASH_TPUW    0x0000000F
+#define EFUSE_FLASH_TPUW_M  ((EFUSE_FLASH_TPUW_V)<<(EFUSE_FLASH_TPUW_S))
+#define EFUSE_FLASH_TPUW_V  0xF
+#define EFUSE_FLASH_TPUW_S  28
+/* EFUSE_POWER_GLITCH_DSENSE : RO ;bitpos:[27:26] ;default: 2'h0 ; */
+/*description: Sample delay configuration of power glitch..*/
+#define EFUSE_POWER_GLITCH_DSENSE    0x00000003
+#define EFUSE_POWER_GLITCH_DSENSE_M  ((EFUSE_POWER_GLITCH_DSENSE_V)<<(EFUSE_POWER_GLITCH_DSENSE_S))
+#define EFUSE_POWER_GLITCH_DSENSE_V  0x3
+#define EFUSE_POWER_GLITCH_DSENSE_S  26
+/* EFUSE_USB_PHY_SEL : RO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: This bit is used to switch internal PHY and external PHY for USB OTG and USB Dev
+ice. 0: internal PHY is assigned to USB Device while external PHY is assigned to
+ USB OTG. 1: internal PHY is assigned to USB OTG while external PHY is assigned
+to USB Device..*/
+#define EFUSE_USB_PHY_SEL    (BIT(25))
+#define EFUSE_USB_PHY_SEL_M  (BIT(25))
+#define EFUSE_USB_PHY_SEL_V  0x1
+#define EFUSE_USB_PHY_SEL_S  25
+/* EFUSE_STRAP_JTAG_SEL : RO ;bitpos:[24] ;default: 1'b0 ; */
+/*description: Set this bit to enable selection between usb_to_jtag and pad_to_jtag through str
+apping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0..*/
+#define EFUSE_STRAP_JTAG_SEL    (BIT(24))
+#define EFUSE_STRAP_JTAG_SEL_M  (BIT(24))
+#define EFUSE_STRAP_JTAG_SEL_V  0x1
+#define EFUSE_STRAP_JTAG_SEL_S  24
+/* EFUSE_DIS_USB_DEVICE : RO ;bitpos:[23] ;default: 1'b0 ; */
+/*description: Set this bit to disable usb device..*/
+#define EFUSE_DIS_USB_DEVICE    (BIT(23))
+#define EFUSE_DIS_USB_DEVICE_M  (BIT(23))
+#define EFUSE_DIS_USB_DEVICE_V  0x1
+#define EFUSE_DIS_USB_DEVICE_S  23
+/* EFUSE_DIS_USB_JTAG : RO ;bitpos:[22] ;default: 6'h0 ; */
+/*description: Set this bit to disable function of usb switch to jtag in module of usb device..*/
+#define EFUSE_DIS_USB_JTAG    (BIT(22))
+#define EFUSE_DIS_USB_JTAG_M  (BIT(22))
+#define EFUSE_DIS_USB_JTAG_V  0x1
+#define EFUSE_DIS_USB_JTAG_S  22
+/* EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE : RO ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to enable revoking aggressive secure boot..*/
+#define EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE    (BIT(21))
+#define EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE_M  (BIT(21))
+#define EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE_V  0x1
+#define EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE_S  21
+/* EFUSE_SECURE_BOOT_EN : RO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: Set this bit to enable secure boot..*/
+#define EFUSE_SECURE_BOOT_EN    (BIT(20))
+#define EFUSE_SECURE_BOOT_EN_M  (BIT(20))
+#define EFUSE_SECURE_BOOT_EN_V  0x1
+#define EFUSE_SECURE_BOOT_EN_S  20
+/* EFUSE_RPT4_RESERVED0 : RO ;bitpos:[19:16] ;default: 4'h0 ; */
+/*description: Reserved (used for four backups method)..*/
+#define EFUSE_RPT4_RESERVED0    0x0000000F
+#define EFUSE_RPT4_RESERVED0_M  ((EFUSE_RPT4_RESERVED0_V)<<(EFUSE_RPT4_RESERVED0_S))
+#define EFUSE_RPT4_RESERVED0_V  0xF
+#define EFUSE_RPT4_RESERVED0_S  16
+/* EFUSE_KEY_PURPOSE_5 : RO ;bitpos:[15:12] ;default: 4'h0 ; */
+/*description: Purpose of Key5..*/
+#define EFUSE_KEY_PURPOSE_5    0x0000000F
+#define EFUSE_KEY_PURPOSE_5_M  ((EFUSE_KEY_PURPOSE_5_V)<<(EFUSE_KEY_PURPOSE_5_S))
+#define EFUSE_KEY_PURPOSE_5_V  0xF
+#define EFUSE_KEY_PURPOSE_5_S  12
+/* EFUSE_KEY_PURPOSE_4 : RO ;bitpos:[11:8] ;default: 4'h0 ; */
+/*description: Purpose of Key4..*/
+#define EFUSE_KEY_PURPOSE_4    0x0000000F
+#define EFUSE_KEY_PURPOSE_4_M  ((EFUSE_KEY_PURPOSE_4_V)<<(EFUSE_KEY_PURPOSE_4_S))
+#define EFUSE_KEY_PURPOSE_4_V  0xF
+#define EFUSE_KEY_PURPOSE_4_S  8
+/* EFUSE_KEY_PURPOSE_3 : RO ;bitpos:[7:4] ;default: 4'h0 ; */
+/*description: Purpose of Key3..*/
+#define EFUSE_KEY_PURPOSE_3    0x0000000F
+#define EFUSE_KEY_PURPOSE_3_M  ((EFUSE_KEY_PURPOSE_3_V)<<(EFUSE_KEY_PURPOSE_3_S))
+#define EFUSE_KEY_PURPOSE_3_V  0xF
+#define EFUSE_KEY_PURPOSE_3_S  4
+/* EFUSE_KEY_PURPOSE_2 : RO ;bitpos:[3:0] ;default: 4'h0 ; */
+/*description: Purpose of Key2..*/
+#define EFUSE_KEY_PURPOSE_2    0x0000000F
+#define EFUSE_KEY_PURPOSE_2_M  ((EFUSE_KEY_PURPOSE_2_V)<<(EFUSE_KEY_PURPOSE_2_S))
+#define EFUSE_KEY_PURPOSE_2_V  0xF
+#define EFUSE_KEY_PURPOSE_2_S  0
+
+#define EFUSE_RD_REPEAT_DATA3_REG          (DR_REG_EFUSE_BASE + 0x3C)
+/* EFUSE_RPT4_RESERVED1 : RO ;bitpos:[31] ;default: 1'h0 ; */
+/*description: Reserved (used for four backups method)..*/
+#define EFUSE_RPT4_RESERVED1    (BIT(31))
+#define EFUSE_RPT4_RESERVED1_M  (BIT(31))
+#define EFUSE_RPT4_RESERVED1_V  0x1
+#define EFUSE_RPT4_RESERVED1_S  31
+/* EFUSE_POWERGLITCH_EN : RO ;bitpos:[30] ;default: 1'b0 ; */
+/*description: Set this bit to enable power glitch function..*/
+#define EFUSE_POWERGLITCH_EN    (BIT(30))
+#define EFUSE_POWERGLITCH_EN_M  (BIT(30))
+#define EFUSE_POWERGLITCH_EN_V  0x1
+#define EFUSE_POWERGLITCH_EN_S  30
+/* EFUSE_SECURE_VERSION : RO ;bitpos:[29:14] ;default: 16'h0 ; */
+/*description: Secure version (used by ESP-IDF anti-rollback feature)..*/
+#define EFUSE_SECURE_VERSION    0x0000FFFF
+#define EFUSE_SECURE_VERSION_M  ((EFUSE_SECURE_VERSION_V)<<(EFUSE_SECURE_VERSION_S))
+#define EFUSE_SECURE_VERSION_V  0xFFFF
+#define EFUSE_SECURE_VERSION_S  14
+/* EFUSE_FORCE_SEND_RESUME : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: Set this bit to force ROM code to send a resume command during SPI boot..*/
+#define EFUSE_FORCE_SEND_RESUME    (BIT(13))
+#define EFUSE_FORCE_SEND_RESUME_M  (BIT(13))
+#define EFUSE_FORCE_SEND_RESUME_V  0x1
+#define EFUSE_FORCE_SEND_RESUME_S  13
+/* EFUSE_FLASH_ECC_EN : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set 1 to enable ECC for flash boot..*/
+#define EFUSE_FLASH_ECC_EN    (BIT(12))
+#define EFUSE_FLASH_ECC_EN_M  (BIT(12))
+#define EFUSE_FLASH_ECC_EN_V  0x1
+#define EFUSE_FLASH_ECC_EN_S  12
+/* EFUSE_FLASH_PAGE_SIZE : RO ;bitpos:[11:10] ;default: 2'h0 ; */
+/*description: Set Flash page size..*/
+#define EFUSE_FLASH_PAGE_SIZE    0x00000003
+#define EFUSE_FLASH_PAGE_SIZE_M  ((EFUSE_FLASH_PAGE_SIZE_V)<<(EFUSE_FLASH_PAGE_SIZE_S))
+#define EFUSE_FLASH_PAGE_SIZE_V  0x3
+#define EFUSE_FLASH_PAGE_SIZE_S  10
+/* EFUSE_FLASH_TYPE : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Set the maximum lines of SPI flash. 0: four lines. 1: eight lines..*/
+#define EFUSE_FLASH_TYPE    (BIT(9))
+#define EFUSE_FLASH_TYPE_M  (BIT(9))
+#define EFUSE_FLASH_TYPE_V  0x1
+#define EFUSE_FLASH_TYPE_S  9
+/* EFUSE_PIN_POWER_SELECTION : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: GPIO33-GPIO37 power supply selection in ROM code. 0: VDD3P3_CPU. 1: VDD_SPI..*/
+#define EFUSE_PIN_POWER_SELECTION    (BIT(8))
+#define EFUSE_PIN_POWER_SELECTION_M  (BIT(8))
+#define EFUSE_PIN_POWER_SELECTION_V  0x1
+#define EFUSE_PIN_POWER_SELECTION_S  8
+/* EFUSE_UART_PRINT_CONTROL : RO ;bitpos:[7:6] ;default: 2'h0 ; */
+/*description: Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO
+8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled..*/
+#define EFUSE_UART_PRINT_CONTROL    0x00000003
+#define EFUSE_UART_PRINT_CONTROL_M  ((EFUSE_UART_PRINT_CONTROL_V)<<(EFUSE_UART_PRINT_CONTROL_S))
+#define EFUSE_UART_PRINT_CONTROL_V  0x3
+#define EFUSE_UART_PRINT_CONTROL_S  6
+/* EFUSE_ENABLE_SECURITY_DOWNLOAD : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to enable secure UART download mode..*/
+#define EFUSE_ENABLE_SECURITY_DOWNLOAD    (BIT(5))
+#define EFUSE_ENABLE_SECURITY_DOWNLOAD_M  (BIT(5))
+#define EFUSE_ENABLE_SECURITY_DOWNLOAD_V  0x1
+#define EFUSE_ENABLE_SECURITY_DOWNLOAD_S  5
+/* EFUSE_DIS_USB_DOWNLOAD_MODE : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to disable UART download mode through USB..*/
+#define EFUSE_DIS_USB_DOWNLOAD_MODE    (BIT(4))
+#define EFUSE_DIS_USB_DOWNLOAD_MODE_M  (BIT(4))
+#define EFUSE_DIS_USB_DOWNLOAD_MODE_V  0x1
+#define EFUSE_DIS_USB_DOWNLOAD_MODE_S  4
+/* EFUSE_FLASH_ECC_MODE : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set ECC mode in ROM, 0: ROM would Enable Flash ECC 16to18 byte mode. 1:ROM would
+ use 16to17 byte mode..*/
+#define EFUSE_FLASH_ECC_MODE    (BIT(3))
+#define EFUSE_FLASH_ECC_MODE_M  (BIT(3))
+#define EFUSE_FLASH_ECC_MODE_V  0x1
+#define EFUSE_FLASH_ECC_MODE_S  3
+/* EFUSE_UART_PRINT_CHANNEL : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Selectes the default UART print channel. 0: UART0. 1: UART1..*/
+#define EFUSE_UART_PRINT_CHANNEL    (BIT(2))
+#define EFUSE_UART_PRINT_CHANNEL_M  (BIT(2))
+#define EFUSE_UART_PRINT_CHANNEL_V  0x1
+#define EFUSE_UART_PRINT_CHANNEL_S  2
+/* EFUSE_DIS_LEGACY_SPI_BOOT : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4)..*/
+#define EFUSE_DIS_LEGACY_SPI_BOOT    (BIT(1))
+#define EFUSE_DIS_LEGACY_SPI_BOOT_M  (BIT(1))
+#define EFUSE_DIS_LEGACY_SPI_BOOT_V  0x1
+#define EFUSE_DIS_LEGACY_SPI_BOOT_S  1
+/* EFUSE_DIS_DOWNLOAD_MODE : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to disable download mode (boot_mode[3:0] = 0, 1, 2, 3, 6, 7)..*/
+#define EFUSE_DIS_DOWNLOAD_MODE    (BIT(0))
+#define EFUSE_DIS_DOWNLOAD_MODE_M  (BIT(0))
+#define EFUSE_DIS_DOWNLOAD_MODE_V  0x1
+#define EFUSE_DIS_DOWNLOAD_MODE_S  0
+
+#define EFUSE_RD_REPEAT_DATA4_REG          (DR_REG_EFUSE_BASE + 0x40)
+/* EFUSE_RPT4_RESERVED2 : RO ;bitpos:[23:0] ;default: 24'h0 ; */
+/*description: Reserved (used for four backups method)..*/
+#define EFUSE_RPT4_RESERVED2    0x00FFFFFF
+#define EFUSE_RPT4_RESERVED2_M  ((EFUSE_RPT4_RESERVED2_V)<<(EFUSE_RPT4_RESERVED2_S))
+#define EFUSE_RPT4_RESERVED2_V  0xFFFFFF
+#define EFUSE_RPT4_RESERVED2_S  0
+
+#define EFUSE_RD_MAC_SPI_SYS_0_REG          (DR_REG_EFUSE_BASE + 0x44)
+/* EFUSE_MAC_0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the low 32 bits of MAC address..*/
+#define EFUSE_MAC_0    0xFFFFFFFF
+#define EFUSE_MAC_0_M  ((EFUSE_MAC_0_V)<<(EFUSE_MAC_0_S))
+#define EFUSE_MAC_0_V  0xFFFFFFFF
+#define EFUSE_MAC_0_S  0
+
+#define EFUSE_RD_MAC_SPI_SYS_1_REG          (DR_REG_EFUSE_BASE + 0x48)
+/* EFUSE_SPI_PAD_CONF_0 : RO ;bitpos:[31:16] ;default: 16'h0 ; */
+/*description: Stores the zeroth part of SPI_PAD_CONF..*/
+#define EFUSE_SPI_PAD_CONF_0    0x0000FFFF
+#define EFUSE_SPI_PAD_CONF_0_M  ((EFUSE_SPI_PAD_CONF_0_V)<<(EFUSE_SPI_PAD_CONF_0_S))
+#define EFUSE_SPI_PAD_CONF_0_V  0xFFFF
+#define EFUSE_SPI_PAD_CONF_0_S  16
+/* EFUSE_MAC_1 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: Stores the high 16 bits of MAC address..*/
+#define EFUSE_MAC_1    0x0000FFFF
+#define EFUSE_MAC_1_M  ((EFUSE_MAC_1_V)<<(EFUSE_MAC_1_S))
+#define EFUSE_MAC_1_V  0xFFFF
+#define EFUSE_MAC_1_S  0
+
+#define EFUSE_RD_MAC_SPI_SYS_2_REG          (DR_REG_EFUSE_BASE + 0x4C)
+/* EFUSE_SPI_PAD_CONF_1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the first part of SPI_PAD_CONF..*/
+#define EFUSE_SPI_PAD_CONF_1    0xFFFFFFFF
+#define EFUSE_SPI_PAD_CONF_1_M  ((EFUSE_SPI_PAD_CONF_1_V)<<(EFUSE_SPI_PAD_CONF_1_S))
+#define EFUSE_SPI_PAD_CONF_1_V  0xFFFFFFFF
+#define EFUSE_SPI_PAD_CONF_1_S  0
+
+#define EFUSE_RD_MAC_SPI_SYS_3_REG          (DR_REG_EFUSE_BASE + 0x50)
+/* EFUSE_SYS_DATA_PART0_0 : RO ;bitpos:[31:18] ;default: 14'h0 ; */
+/*description: Stores the fist 14 bits of the zeroth part of system data..*/
+#define EFUSE_SYS_DATA_PART0_0    0x00003FFF
+#define EFUSE_SYS_DATA_PART0_0_M  ((EFUSE_SYS_DATA_PART0_0_V)<<(EFUSE_SYS_DATA_PART0_0_S))
+#define EFUSE_SYS_DATA_PART0_0_V  0x3FFF
+#define EFUSE_SYS_DATA_PART0_0_S  18
+/* EFUSE_SPI_PAD_CONF_2 : RO ;bitpos:[17:0] ;default: 18'h0 ; */
+/*description: Stores the second part of SPI_PAD_CONF..*/
+#define EFUSE_SPI_PAD_CONF_2    0x0003FFFF
+#define EFUSE_SPI_PAD_CONF_2_M  ((EFUSE_SPI_PAD_CONF_2_V)<<(EFUSE_SPI_PAD_CONF_2_S))
+#define EFUSE_SPI_PAD_CONF_2_V  0x3FFFF
+#define EFUSE_SPI_PAD_CONF_2_S  0
+
+#define EFUSE_RD_MAC_SPI_SYS_4_REG          (DR_REG_EFUSE_BASE + 0x54)
+/* EFUSE_SYS_DATA_PART0_1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fist 32 bits of the zeroth part of system data..*/
+#define EFUSE_SYS_DATA_PART0_1    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART0_1_M  ((EFUSE_SYS_DATA_PART0_1_V)<<(EFUSE_SYS_DATA_PART0_1_S))
+#define EFUSE_SYS_DATA_PART0_1_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART0_1_S  0
+
+#define EFUSE_RD_MAC_SPI_SYS_5_REG          (DR_REG_EFUSE_BASE + 0x58)
+/* EFUSE_SYS_DATA_PART0_2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the second 32 bits of the zeroth part of system data..*/
+#define EFUSE_SYS_DATA_PART0_2    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART0_2_M  ((EFUSE_SYS_DATA_PART0_2_V)<<(EFUSE_SYS_DATA_PART0_2_S))
+#define EFUSE_SYS_DATA_PART0_2_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART0_2_S  0
+
+#define EFUSE_RD_SYS_PART1_DATA0_REG          (DR_REG_EFUSE_BASE + 0x5C)
+/* EFUSE_SYS_DATA_PART1_0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the zeroth 32 bits of the first part of system data..*/
+#define EFUSE_SYS_DATA_PART1_0    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_0_M  ((EFUSE_SYS_DATA_PART1_0_V)<<(EFUSE_SYS_DATA_PART1_0_S))
+#define EFUSE_SYS_DATA_PART1_0_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_0_S  0
+
+#define EFUSE_RD_SYS_PART1_DATA1_REG          (DR_REG_EFUSE_BASE + 0x60)
+/* EFUSE_SYS_DATA_PART1_1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the first 32 bits of the first part of system data..*/
+#define EFUSE_SYS_DATA_PART1_1    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_1_M  ((EFUSE_SYS_DATA_PART1_1_V)<<(EFUSE_SYS_DATA_PART1_1_S))
+#define EFUSE_SYS_DATA_PART1_1_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_1_S  0
+
+#define EFUSE_RD_SYS_PART1_DATA2_REG          (DR_REG_EFUSE_BASE + 0x64)
+/* EFUSE_SYS_DATA_PART1_2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the second 32 bits of the first part of system data..*/
+#define EFUSE_SYS_DATA_PART1_2    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_2_M  ((EFUSE_SYS_DATA_PART1_2_V)<<(EFUSE_SYS_DATA_PART1_2_S))
+#define EFUSE_SYS_DATA_PART1_2_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_2_S  0
+
+#define EFUSE_RD_SYS_PART1_DATA3_REG          (DR_REG_EFUSE_BASE + 0x68)
+/* EFUSE_SYS_DATA_PART1_3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the third 32 bits of the first part of system data..*/
+#define EFUSE_SYS_DATA_PART1_3    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_3_M  ((EFUSE_SYS_DATA_PART1_3_V)<<(EFUSE_SYS_DATA_PART1_3_S))
+#define EFUSE_SYS_DATA_PART1_3_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_3_S  0
+
+#define EFUSE_RD_SYS_PART1_DATA4_REG          (DR_REG_EFUSE_BASE + 0x6C)
+/* EFUSE_SYS_DATA_PART1_4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fourth 32 bits of the first part of system data..*/
+#define EFUSE_SYS_DATA_PART1_4    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_4_M  ((EFUSE_SYS_DATA_PART1_4_V)<<(EFUSE_SYS_DATA_PART1_4_S))
+#define EFUSE_SYS_DATA_PART1_4_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_4_S  0
+
+#define EFUSE_RD_SYS_PART1_DATA5_REG          (DR_REG_EFUSE_BASE + 0x70)
+/* EFUSE_SYS_DATA_PART1_5 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fifth 32 bits of the first part of system data..*/
+#define EFUSE_SYS_DATA_PART1_5    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_5_M  ((EFUSE_SYS_DATA_PART1_5_V)<<(EFUSE_SYS_DATA_PART1_5_S))
+#define EFUSE_SYS_DATA_PART1_5_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_5_S  0
+
+#define EFUSE_RD_SYS_PART1_DATA6_REG          (DR_REG_EFUSE_BASE + 0x74)
+/* EFUSE_SYS_DATA_PART1_6 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the sixth 32 bits of the first part of system data..*/
+#define EFUSE_SYS_DATA_PART1_6    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_6_M  ((EFUSE_SYS_DATA_PART1_6_V)<<(EFUSE_SYS_DATA_PART1_6_S))
+#define EFUSE_SYS_DATA_PART1_6_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_6_S  0
+
+#define EFUSE_RD_SYS_PART1_DATA7_REG          (DR_REG_EFUSE_BASE + 0x78)
+/* EFUSE_SYS_DATA_PART1_7 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the seventh 32 bits of the first part of system data..*/
+#define EFUSE_SYS_DATA_PART1_7    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_7_M  ((EFUSE_SYS_DATA_PART1_7_V)<<(EFUSE_SYS_DATA_PART1_7_S))
+#define EFUSE_SYS_DATA_PART1_7_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART1_7_S  0
+
+#define EFUSE_RD_USR_DATA0_REG          (DR_REG_EFUSE_BASE + 0x7C)
+/* EFUSE_USR_DATA0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the zeroth 32 bits of BLOCK3 (user)..*/
+#define EFUSE_USR_DATA0    0xFFFFFFFF
+#define EFUSE_USR_DATA0_M  ((EFUSE_USR_DATA0_V)<<(EFUSE_USR_DATA0_S))
+#define EFUSE_USR_DATA0_V  0xFFFFFFFF
+#define EFUSE_USR_DATA0_S  0
+
+#define EFUSE_RD_USR_DATA1_REG          (DR_REG_EFUSE_BASE + 0x80)
+/* EFUSE_USR_DATA1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the first 32 bits of BLOCK3 (user)..*/
+#define EFUSE_USR_DATA1    0xFFFFFFFF
+#define EFUSE_USR_DATA1_M  ((EFUSE_USR_DATA1_V)<<(EFUSE_USR_DATA1_S))
+#define EFUSE_USR_DATA1_V  0xFFFFFFFF
+#define EFUSE_USR_DATA1_S  0
+
+#define EFUSE_RD_USR_DATA2_REG          (DR_REG_EFUSE_BASE + 0x84)
+/* EFUSE_USR_DATA2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the second 32 bits of BLOCK3 (user)..*/
+#define EFUSE_USR_DATA2    0xFFFFFFFF
+#define EFUSE_USR_DATA2_M  ((EFUSE_USR_DATA2_V)<<(EFUSE_USR_DATA2_S))
+#define EFUSE_USR_DATA2_V  0xFFFFFFFF
+#define EFUSE_USR_DATA2_S  0
+
+#define EFUSE_RD_USR_DATA3_REG          (DR_REG_EFUSE_BASE + 0x88)
+/* EFUSE_USR_DATA3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the third 32 bits of BLOCK3 (user)..*/
+#define EFUSE_USR_DATA3    0xFFFFFFFF
+#define EFUSE_USR_DATA3_M  ((EFUSE_USR_DATA3_V)<<(EFUSE_USR_DATA3_S))
+#define EFUSE_USR_DATA3_V  0xFFFFFFFF
+#define EFUSE_USR_DATA3_S  0
+
+#define EFUSE_RD_USR_DATA4_REG          (DR_REG_EFUSE_BASE + 0x8C)
+/* EFUSE_USR_DATA4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fourth 32 bits of BLOCK3 (user)..*/
+#define EFUSE_USR_DATA4    0xFFFFFFFF
+#define EFUSE_USR_DATA4_M  ((EFUSE_USR_DATA4_V)<<(EFUSE_USR_DATA4_S))
+#define EFUSE_USR_DATA4_V  0xFFFFFFFF
+#define EFUSE_USR_DATA4_S  0
+
+#define EFUSE_RD_USR_DATA5_REG          (DR_REG_EFUSE_BASE + 0x90)
+/* EFUSE_USR_DATA5 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fifth 32 bits of BLOCK3 (user)..*/
+#define EFUSE_USR_DATA5    0xFFFFFFFF
+#define EFUSE_USR_DATA5_M  ((EFUSE_USR_DATA5_V)<<(EFUSE_USR_DATA5_S))
+#define EFUSE_USR_DATA5_V  0xFFFFFFFF
+#define EFUSE_USR_DATA5_S  0
+
+#define EFUSE_RD_USR_DATA6_REG          (DR_REG_EFUSE_BASE + 0x94)
+/* EFUSE_USR_DATA6 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the sixth 32 bits of BLOCK3 (user)..*/
+#define EFUSE_USR_DATA6    0xFFFFFFFF
+#define EFUSE_USR_DATA6_M  ((EFUSE_USR_DATA6_V)<<(EFUSE_USR_DATA6_S))
+#define EFUSE_USR_DATA6_V  0xFFFFFFFF
+#define EFUSE_USR_DATA6_S  0
+
+#define EFUSE_RD_USR_DATA7_REG          (DR_REG_EFUSE_BASE + 0x98)
+/* EFUSE_USR_DATA7 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the seventh 32 bits of BLOCK3 (user)..*/
+#define EFUSE_USR_DATA7    0xFFFFFFFF
+#define EFUSE_USR_DATA7_M  ((EFUSE_USR_DATA7_V)<<(EFUSE_USR_DATA7_S))
+#define EFUSE_USR_DATA7_V  0xFFFFFFFF
+#define EFUSE_USR_DATA7_S  0
+
+#define EFUSE_RD_KEY0_DATA0_REG          (DR_REG_EFUSE_BASE + 0x9C)
+/* EFUSE_KEY0_DATA0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the zeroth 32 bits of KEY0..*/
+#define EFUSE_KEY0_DATA0    0xFFFFFFFF
+#define EFUSE_KEY0_DATA0_M  ((EFUSE_KEY0_DATA0_V)<<(EFUSE_KEY0_DATA0_S))
+#define EFUSE_KEY0_DATA0_V  0xFFFFFFFF
+#define EFUSE_KEY0_DATA0_S  0
+
+#define EFUSE_RD_KEY0_DATA1_REG          (DR_REG_EFUSE_BASE + 0xA0)
+/* EFUSE_KEY0_DATA1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the first 32 bits of KEY0..*/
+#define EFUSE_KEY0_DATA1    0xFFFFFFFF
+#define EFUSE_KEY0_DATA1_M  ((EFUSE_KEY0_DATA1_V)<<(EFUSE_KEY0_DATA1_S))
+#define EFUSE_KEY0_DATA1_V  0xFFFFFFFF
+#define EFUSE_KEY0_DATA1_S  0
+
+#define EFUSE_RD_KEY0_DATA2_REG          (DR_REG_EFUSE_BASE + 0xA4)
+/* EFUSE_KEY0_DATA2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the second 32 bits of KEY0..*/
+#define EFUSE_KEY0_DATA2    0xFFFFFFFF
+#define EFUSE_KEY0_DATA2_M  ((EFUSE_KEY0_DATA2_V)<<(EFUSE_KEY0_DATA2_S))
+#define EFUSE_KEY0_DATA2_V  0xFFFFFFFF
+#define EFUSE_KEY0_DATA2_S  0
+
+#define EFUSE_RD_KEY0_DATA3_REG          (DR_REG_EFUSE_BASE + 0xA8)
+/* EFUSE_KEY0_DATA3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the third 32 bits of KEY0..*/
+#define EFUSE_KEY0_DATA3    0xFFFFFFFF
+#define EFUSE_KEY0_DATA3_M  ((EFUSE_KEY0_DATA3_V)<<(EFUSE_KEY0_DATA3_S))
+#define EFUSE_KEY0_DATA3_V  0xFFFFFFFF
+#define EFUSE_KEY0_DATA3_S  0
+
+#define EFUSE_RD_KEY0_DATA4_REG          (DR_REG_EFUSE_BASE + 0xAC)
+/* EFUSE_KEY0_DATA4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fourth 32 bits of KEY0..*/
+#define EFUSE_KEY0_DATA4    0xFFFFFFFF
+#define EFUSE_KEY0_DATA4_M  ((EFUSE_KEY0_DATA4_V)<<(EFUSE_KEY0_DATA4_S))
+#define EFUSE_KEY0_DATA4_V  0xFFFFFFFF
+#define EFUSE_KEY0_DATA4_S  0
+
+#define EFUSE_RD_KEY0_DATA5_REG          (DR_REG_EFUSE_BASE + 0xB0)
+/* EFUSE_KEY0_DATA5 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fifth 32 bits of KEY0..*/
+#define EFUSE_KEY0_DATA5    0xFFFFFFFF
+#define EFUSE_KEY0_DATA5_M  ((EFUSE_KEY0_DATA5_V)<<(EFUSE_KEY0_DATA5_S))
+#define EFUSE_KEY0_DATA5_V  0xFFFFFFFF
+#define EFUSE_KEY0_DATA5_S  0
+
+#define EFUSE_RD_KEY0_DATA6_REG          (DR_REG_EFUSE_BASE + 0xB4)
+/* EFUSE_KEY0_DATA6 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the sixth 32 bits of KEY0..*/
+#define EFUSE_KEY0_DATA6    0xFFFFFFFF
+#define EFUSE_KEY0_DATA6_M  ((EFUSE_KEY0_DATA6_V)<<(EFUSE_KEY0_DATA6_S))
+#define EFUSE_KEY0_DATA6_V  0xFFFFFFFF
+#define EFUSE_KEY0_DATA6_S  0
+
+#define EFUSE_RD_KEY0_DATA7_REG          (DR_REG_EFUSE_BASE + 0xB8)
+/* EFUSE_KEY0_DATA7 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the seventh 32 bits of KEY0..*/
+#define EFUSE_KEY0_DATA7    0xFFFFFFFF
+#define EFUSE_KEY0_DATA7_M  ((EFUSE_KEY0_DATA7_V)<<(EFUSE_KEY0_DATA7_S))
+#define EFUSE_KEY0_DATA7_V  0xFFFFFFFF
+#define EFUSE_KEY0_DATA7_S  0
+
+#define EFUSE_RD_KEY1_DATA0_REG          (DR_REG_EFUSE_BASE + 0xBC)
+/* EFUSE_KEY1_DATA0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the zeroth 32 bits of KEY1..*/
+#define EFUSE_KEY1_DATA0    0xFFFFFFFF
+#define EFUSE_KEY1_DATA0_M  ((EFUSE_KEY1_DATA0_V)<<(EFUSE_KEY1_DATA0_S))
+#define EFUSE_KEY1_DATA0_V  0xFFFFFFFF
+#define EFUSE_KEY1_DATA0_S  0
+
+#define EFUSE_RD_KEY1_DATA1_REG          (DR_REG_EFUSE_BASE + 0xC0)
+/* EFUSE_KEY1_DATA1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the first 32 bits of KEY1..*/
+#define EFUSE_KEY1_DATA1    0xFFFFFFFF
+#define EFUSE_KEY1_DATA1_M  ((EFUSE_KEY1_DATA1_V)<<(EFUSE_KEY1_DATA1_S))
+#define EFUSE_KEY1_DATA1_V  0xFFFFFFFF
+#define EFUSE_KEY1_DATA1_S  0
+
+#define EFUSE_RD_KEY1_DATA2_REG          (DR_REG_EFUSE_BASE + 0xC4)
+/* EFUSE_KEY1_DATA2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the second 32 bits of KEY1..*/
+#define EFUSE_KEY1_DATA2    0xFFFFFFFF
+#define EFUSE_KEY1_DATA2_M  ((EFUSE_KEY1_DATA2_V)<<(EFUSE_KEY1_DATA2_S))
+#define EFUSE_KEY1_DATA2_V  0xFFFFFFFF
+#define EFUSE_KEY1_DATA2_S  0
+
+#define EFUSE_RD_KEY1_DATA3_REG          (DR_REG_EFUSE_BASE + 0xC8)
+/* EFUSE_KEY1_DATA3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the third 32 bits of KEY1..*/
+#define EFUSE_KEY1_DATA3    0xFFFFFFFF
+#define EFUSE_KEY1_DATA3_M  ((EFUSE_KEY1_DATA3_V)<<(EFUSE_KEY1_DATA3_S))
+#define EFUSE_KEY1_DATA3_V  0xFFFFFFFF
+#define EFUSE_KEY1_DATA3_S  0
+
+#define EFUSE_RD_KEY1_DATA4_REG          (DR_REG_EFUSE_BASE + 0xCC)
+/* EFUSE_KEY1_DATA4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fourth 32 bits of KEY1..*/
+#define EFUSE_KEY1_DATA4    0xFFFFFFFF
+#define EFUSE_KEY1_DATA4_M  ((EFUSE_KEY1_DATA4_V)<<(EFUSE_KEY1_DATA4_S))
+#define EFUSE_KEY1_DATA4_V  0xFFFFFFFF
+#define EFUSE_KEY1_DATA4_S  0
+
+#define EFUSE_RD_KEY1_DATA5_REG          (DR_REG_EFUSE_BASE + 0xD0)
+/* EFUSE_KEY1_DATA5 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fifth 32 bits of KEY1..*/
+#define EFUSE_KEY1_DATA5    0xFFFFFFFF
+#define EFUSE_KEY1_DATA5_M  ((EFUSE_KEY1_DATA5_V)<<(EFUSE_KEY1_DATA5_S))
+#define EFUSE_KEY1_DATA5_V  0xFFFFFFFF
+#define EFUSE_KEY1_DATA5_S  0
+
+#define EFUSE_RD_KEY1_DATA6_REG          (DR_REG_EFUSE_BASE + 0xD4)
+/* EFUSE_KEY1_DATA6 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the sixth 32 bits of KEY1..*/
+#define EFUSE_KEY1_DATA6    0xFFFFFFFF
+#define EFUSE_KEY1_DATA6_M  ((EFUSE_KEY1_DATA6_V)<<(EFUSE_KEY1_DATA6_S))
+#define EFUSE_KEY1_DATA6_V  0xFFFFFFFF
+#define EFUSE_KEY1_DATA6_S  0
+
+#define EFUSE_RD_KEY1_DATA7_REG          (DR_REG_EFUSE_BASE + 0xD8)
+/* EFUSE_KEY1_DATA7 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the seventh 32 bits of KEY1..*/
+#define EFUSE_KEY1_DATA7    0xFFFFFFFF
+#define EFUSE_KEY1_DATA7_M  ((EFUSE_KEY1_DATA7_V)<<(EFUSE_KEY1_DATA7_S))
+#define EFUSE_KEY1_DATA7_V  0xFFFFFFFF
+#define EFUSE_KEY1_DATA7_S  0
+
+#define EFUSE_RD_KEY2_DATA0_REG          (DR_REG_EFUSE_BASE + 0xDC)
+/* EFUSE_KEY2_DATA0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the zeroth 32 bits of KEY2..*/
+#define EFUSE_KEY2_DATA0    0xFFFFFFFF
+#define EFUSE_KEY2_DATA0_M  ((EFUSE_KEY2_DATA0_V)<<(EFUSE_KEY2_DATA0_S))
+#define EFUSE_KEY2_DATA0_V  0xFFFFFFFF
+#define EFUSE_KEY2_DATA0_S  0
+
+#define EFUSE_RD_KEY2_DATA1_REG          (DR_REG_EFUSE_BASE + 0xE0)
+/* EFUSE_KEY2_DATA1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the first 32 bits of KEY2..*/
+#define EFUSE_KEY2_DATA1    0xFFFFFFFF
+#define EFUSE_KEY2_DATA1_M  ((EFUSE_KEY2_DATA1_V)<<(EFUSE_KEY2_DATA1_S))
+#define EFUSE_KEY2_DATA1_V  0xFFFFFFFF
+#define EFUSE_KEY2_DATA1_S  0
+
+#define EFUSE_RD_KEY2_DATA2_REG          (DR_REG_EFUSE_BASE + 0xE4)
+/* EFUSE_KEY2_DATA2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the second 32 bits of KEY2..*/
+#define EFUSE_KEY2_DATA2    0xFFFFFFFF
+#define EFUSE_KEY2_DATA2_M  ((EFUSE_KEY2_DATA2_V)<<(EFUSE_KEY2_DATA2_S))
+#define EFUSE_KEY2_DATA2_V  0xFFFFFFFF
+#define EFUSE_KEY2_DATA2_S  0
+
+#define EFUSE_RD_KEY2_DATA3_REG          (DR_REG_EFUSE_BASE + 0xE8)
+/* EFUSE_KEY2_DATA3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the third 32 bits of KEY2..*/
+#define EFUSE_KEY2_DATA3    0xFFFFFFFF
+#define EFUSE_KEY2_DATA3_M  ((EFUSE_KEY2_DATA3_V)<<(EFUSE_KEY2_DATA3_S))
+#define EFUSE_KEY2_DATA3_V  0xFFFFFFFF
+#define EFUSE_KEY2_DATA3_S  0
+
+#define EFUSE_RD_KEY2_DATA4_REG          (DR_REG_EFUSE_BASE + 0xEC)
+/* EFUSE_KEY2_DATA4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fourth 32 bits of KEY2..*/
+#define EFUSE_KEY2_DATA4    0xFFFFFFFF
+#define EFUSE_KEY2_DATA4_M  ((EFUSE_KEY2_DATA4_V)<<(EFUSE_KEY2_DATA4_S))
+#define EFUSE_KEY2_DATA4_V  0xFFFFFFFF
+#define EFUSE_KEY2_DATA4_S  0
+
+#define EFUSE_RD_KEY2_DATA5_REG          (DR_REG_EFUSE_BASE + 0xF0)
+/* EFUSE_KEY2_DATA5 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fifth 32 bits of KEY2..*/
+#define EFUSE_KEY2_DATA5    0xFFFFFFFF
+#define EFUSE_KEY2_DATA5_M  ((EFUSE_KEY2_DATA5_V)<<(EFUSE_KEY2_DATA5_S))
+#define EFUSE_KEY2_DATA5_V  0xFFFFFFFF
+#define EFUSE_KEY2_DATA5_S  0
+
+#define EFUSE_RD_KEY2_DATA6_REG          (DR_REG_EFUSE_BASE + 0xF4)
+/* EFUSE_KEY2_DATA6 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the sixth 32 bits of KEY2..*/
+#define EFUSE_KEY2_DATA6    0xFFFFFFFF
+#define EFUSE_KEY2_DATA6_M  ((EFUSE_KEY2_DATA6_V)<<(EFUSE_KEY2_DATA6_S))
+#define EFUSE_KEY2_DATA6_V  0xFFFFFFFF
+#define EFUSE_KEY2_DATA6_S  0
+
+#define EFUSE_RD_KEY2_DATA7_REG          (DR_REG_EFUSE_BASE + 0xF8)
+/* EFUSE_KEY2_DATA7 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the seventh 32 bits of KEY2..*/
+#define EFUSE_KEY2_DATA7    0xFFFFFFFF
+#define EFUSE_KEY2_DATA7_M  ((EFUSE_KEY2_DATA7_V)<<(EFUSE_KEY2_DATA7_S))
+#define EFUSE_KEY2_DATA7_V  0xFFFFFFFF
+#define EFUSE_KEY2_DATA7_S  0
+
+#define EFUSE_RD_KEY3_DATA0_REG          (DR_REG_EFUSE_BASE + 0xFC)
+/* EFUSE_KEY3_DATA0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the zeroth 32 bits of KEY3..*/
+#define EFUSE_KEY3_DATA0    0xFFFFFFFF
+#define EFUSE_KEY3_DATA0_M  ((EFUSE_KEY3_DATA0_V)<<(EFUSE_KEY3_DATA0_S))
+#define EFUSE_KEY3_DATA0_V  0xFFFFFFFF
+#define EFUSE_KEY3_DATA0_S  0
+
+#define EFUSE_RD_KEY3_DATA1_REG          (DR_REG_EFUSE_BASE + 0x100)
+/* EFUSE_KEY3_DATA1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the first 32 bits of KEY3..*/
+#define EFUSE_KEY3_DATA1    0xFFFFFFFF
+#define EFUSE_KEY3_DATA1_M  ((EFUSE_KEY3_DATA1_V)<<(EFUSE_KEY3_DATA1_S))
+#define EFUSE_KEY3_DATA1_V  0xFFFFFFFF
+#define EFUSE_KEY3_DATA1_S  0
+
+#define EFUSE_RD_KEY3_DATA2_REG          (DR_REG_EFUSE_BASE + 0x104)
+/* EFUSE_KEY3_DATA2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the second 32 bits of KEY3..*/
+#define EFUSE_KEY3_DATA2    0xFFFFFFFF
+#define EFUSE_KEY3_DATA2_M  ((EFUSE_KEY3_DATA2_V)<<(EFUSE_KEY3_DATA2_S))
+#define EFUSE_KEY3_DATA2_V  0xFFFFFFFF
+#define EFUSE_KEY3_DATA2_S  0
+
+#define EFUSE_RD_KEY3_DATA3_REG          (DR_REG_EFUSE_BASE + 0x108)
+/* EFUSE_KEY3_DATA3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the third 32 bits of KEY3..*/
+#define EFUSE_KEY3_DATA3    0xFFFFFFFF
+#define EFUSE_KEY3_DATA3_M  ((EFUSE_KEY3_DATA3_V)<<(EFUSE_KEY3_DATA3_S))
+#define EFUSE_KEY3_DATA3_V  0xFFFFFFFF
+#define EFUSE_KEY3_DATA3_S  0
+
+#define EFUSE_RD_KEY3_DATA4_REG          (DR_REG_EFUSE_BASE + 0x10C)
+/* EFUSE_KEY3_DATA4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fourth 32 bits of KEY3..*/
+#define EFUSE_KEY3_DATA4    0xFFFFFFFF
+#define EFUSE_KEY3_DATA4_M  ((EFUSE_KEY3_DATA4_V)<<(EFUSE_KEY3_DATA4_S))
+#define EFUSE_KEY3_DATA4_V  0xFFFFFFFF
+#define EFUSE_KEY3_DATA4_S  0
+
+#define EFUSE_RD_KEY3_DATA5_REG          (DR_REG_EFUSE_BASE + 0x110)
+/* EFUSE_KEY3_DATA5 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fifth 32 bits of KEY3..*/
+#define EFUSE_KEY3_DATA5    0xFFFFFFFF
+#define EFUSE_KEY3_DATA5_M  ((EFUSE_KEY3_DATA5_V)<<(EFUSE_KEY3_DATA5_S))
+#define EFUSE_KEY3_DATA5_V  0xFFFFFFFF
+#define EFUSE_KEY3_DATA5_S  0
+
+#define EFUSE_RD_KEY3_DATA6_REG          (DR_REG_EFUSE_BASE + 0x114)
+/* EFUSE_KEY3_DATA6 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the sixth 32 bits of KEY3..*/
+#define EFUSE_KEY3_DATA6    0xFFFFFFFF
+#define EFUSE_KEY3_DATA6_M  ((EFUSE_KEY3_DATA6_V)<<(EFUSE_KEY3_DATA6_S))
+#define EFUSE_KEY3_DATA6_V  0xFFFFFFFF
+#define EFUSE_KEY3_DATA6_S  0
+
+#define EFUSE_RD_KEY3_DATA7_REG          (DR_REG_EFUSE_BASE + 0x118)
+/* EFUSE_KEY3_DATA7 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the seventh 32 bits of KEY3..*/
+#define EFUSE_KEY3_DATA7    0xFFFFFFFF
+#define EFUSE_KEY3_DATA7_M  ((EFUSE_KEY3_DATA7_V)<<(EFUSE_KEY3_DATA7_S))
+#define EFUSE_KEY3_DATA7_V  0xFFFFFFFF
+#define EFUSE_KEY3_DATA7_S  0
+
+#define EFUSE_RD_KEY4_DATA0_REG          (DR_REG_EFUSE_BASE + 0x11C)
+/* EFUSE_KEY4_DATA0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the zeroth 32 bits of KEY4..*/
+#define EFUSE_KEY4_DATA0    0xFFFFFFFF
+#define EFUSE_KEY4_DATA0_M  ((EFUSE_KEY4_DATA0_V)<<(EFUSE_KEY4_DATA0_S))
+#define EFUSE_KEY4_DATA0_V  0xFFFFFFFF
+#define EFUSE_KEY4_DATA0_S  0
+
+#define EFUSE_RD_KEY4_DATA1_REG          (DR_REG_EFUSE_BASE + 0x120)
+/* EFUSE_KEY4_DATA1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the first 32 bits of KEY4..*/
+#define EFUSE_KEY4_DATA1    0xFFFFFFFF
+#define EFUSE_KEY4_DATA1_M  ((EFUSE_KEY4_DATA1_V)<<(EFUSE_KEY4_DATA1_S))
+#define EFUSE_KEY4_DATA1_V  0xFFFFFFFF
+#define EFUSE_KEY4_DATA1_S  0
+
+#define EFUSE_RD_KEY4_DATA2_REG          (DR_REG_EFUSE_BASE + 0x124)
+/* EFUSE_KEY4_DATA2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the second 32 bits of KEY4..*/
+#define EFUSE_KEY4_DATA2    0xFFFFFFFF
+#define EFUSE_KEY4_DATA2_M  ((EFUSE_KEY4_DATA2_V)<<(EFUSE_KEY4_DATA2_S))
+#define EFUSE_KEY4_DATA2_V  0xFFFFFFFF
+#define EFUSE_KEY4_DATA2_S  0
+
+#define EFUSE_RD_KEY4_DATA3_REG          (DR_REG_EFUSE_BASE + 0x128)
+/* EFUSE_KEY4_DATA3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the third 32 bits of KEY4..*/
+#define EFUSE_KEY4_DATA3    0xFFFFFFFF
+#define EFUSE_KEY4_DATA3_M  ((EFUSE_KEY4_DATA3_V)<<(EFUSE_KEY4_DATA3_S))
+#define EFUSE_KEY4_DATA3_V  0xFFFFFFFF
+#define EFUSE_KEY4_DATA3_S  0
+
+#define EFUSE_RD_KEY4_DATA4_REG          (DR_REG_EFUSE_BASE + 0x12C)
+/* EFUSE_KEY4_DATA4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fourth 32 bits of KEY4..*/
+#define EFUSE_KEY4_DATA4    0xFFFFFFFF
+#define EFUSE_KEY4_DATA4_M  ((EFUSE_KEY4_DATA4_V)<<(EFUSE_KEY4_DATA4_S))
+#define EFUSE_KEY4_DATA4_V  0xFFFFFFFF
+#define EFUSE_KEY4_DATA4_S  0
+
+#define EFUSE_RD_KEY4_DATA5_REG          (DR_REG_EFUSE_BASE + 0x130)
+/* EFUSE_KEY4_DATA5 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fifth 32 bits of KEY4..*/
+#define EFUSE_KEY4_DATA5    0xFFFFFFFF
+#define EFUSE_KEY4_DATA5_M  ((EFUSE_KEY4_DATA5_V)<<(EFUSE_KEY4_DATA5_S))
+#define EFUSE_KEY4_DATA5_V  0xFFFFFFFF
+#define EFUSE_KEY4_DATA5_S  0
+
+#define EFUSE_RD_KEY4_DATA6_REG          (DR_REG_EFUSE_BASE + 0x134)
+/* EFUSE_KEY4_DATA6 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the sixth 32 bits of KEY4..*/
+#define EFUSE_KEY4_DATA6    0xFFFFFFFF
+#define EFUSE_KEY4_DATA6_M  ((EFUSE_KEY4_DATA6_V)<<(EFUSE_KEY4_DATA6_S))
+#define EFUSE_KEY4_DATA6_V  0xFFFFFFFF
+#define EFUSE_KEY4_DATA6_S  0
+
+#define EFUSE_RD_KEY4_DATA7_REG          (DR_REG_EFUSE_BASE + 0x138)
+/* EFUSE_KEY4_DATA7 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the seventh 32 bits of KEY4..*/
+#define EFUSE_KEY4_DATA7    0xFFFFFFFF
+#define EFUSE_KEY4_DATA7_M  ((EFUSE_KEY4_DATA7_V)<<(EFUSE_KEY4_DATA7_S))
+#define EFUSE_KEY4_DATA7_V  0xFFFFFFFF
+#define EFUSE_KEY4_DATA7_S  0
+
+#define EFUSE_RD_KEY5_DATA0_REG          (DR_REG_EFUSE_BASE + 0x13C)
+/* EFUSE_KEY5_DATA0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the zeroth 32 bits of KEY5..*/
+#define EFUSE_KEY5_DATA0    0xFFFFFFFF
+#define EFUSE_KEY5_DATA0_M  ((EFUSE_KEY5_DATA0_V)<<(EFUSE_KEY5_DATA0_S))
+#define EFUSE_KEY5_DATA0_V  0xFFFFFFFF
+#define EFUSE_KEY5_DATA0_S  0
+
+#define EFUSE_RD_KEY5_DATA1_REG          (DR_REG_EFUSE_BASE + 0x140)
+/* EFUSE_KEY5_DATA1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the first 32 bits of KEY5..*/
+#define EFUSE_KEY5_DATA1    0xFFFFFFFF
+#define EFUSE_KEY5_DATA1_M  ((EFUSE_KEY5_DATA1_V)<<(EFUSE_KEY5_DATA1_S))
+#define EFUSE_KEY5_DATA1_V  0xFFFFFFFF
+#define EFUSE_KEY5_DATA1_S  0
+
+#define EFUSE_RD_KEY5_DATA2_REG          (DR_REG_EFUSE_BASE + 0x144)
+/* EFUSE_KEY5_DATA2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the second 32 bits of KEY5..*/
+#define EFUSE_KEY5_DATA2    0xFFFFFFFF
+#define EFUSE_KEY5_DATA2_M  ((EFUSE_KEY5_DATA2_V)<<(EFUSE_KEY5_DATA2_S))
+#define EFUSE_KEY5_DATA2_V  0xFFFFFFFF
+#define EFUSE_KEY5_DATA2_S  0
+
+#define EFUSE_RD_KEY5_DATA3_REG          (DR_REG_EFUSE_BASE + 0x148)
+/* EFUSE_KEY5_DATA3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the third 32 bits of KEY5..*/
+#define EFUSE_KEY5_DATA3    0xFFFFFFFF
+#define EFUSE_KEY5_DATA3_M  ((EFUSE_KEY5_DATA3_V)<<(EFUSE_KEY5_DATA3_S))
+#define EFUSE_KEY5_DATA3_V  0xFFFFFFFF
+#define EFUSE_KEY5_DATA3_S  0
+
+#define EFUSE_RD_KEY5_DATA4_REG          (DR_REG_EFUSE_BASE + 0x14C)
+/* EFUSE_KEY5_DATA4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fourth 32 bits of KEY5..*/
+#define EFUSE_KEY5_DATA4    0xFFFFFFFF
+#define EFUSE_KEY5_DATA4_M  ((EFUSE_KEY5_DATA4_V)<<(EFUSE_KEY5_DATA4_S))
+#define EFUSE_KEY5_DATA4_V  0xFFFFFFFF
+#define EFUSE_KEY5_DATA4_S  0
+
+#define EFUSE_RD_KEY5_DATA5_REG          (DR_REG_EFUSE_BASE + 0x150)
+/* EFUSE_KEY5_DATA5 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the fifth 32 bits of KEY5..*/
+#define EFUSE_KEY5_DATA5    0xFFFFFFFF
+#define EFUSE_KEY5_DATA5_M  ((EFUSE_KEY5_DATA5_V)<<(EFUSE_KEY5_DATA5_S))
+#define EFUSE_KEY5_DATA5_V  0xFFFFFFFF
+#define EFUSE_KEY5_DATA5_S  0
+
+#define EFUSE_RD_KEY5_DATA6_REG          (DR_REG_EFUSE_BASE + 0x154)
+/* EFUSE_KEY5_DATA6 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the sixth 32 bits of KEY5..*/
+#define EFUSE_KEY5_DATA6    0xFFFFFFFF
+#define EFUSE_KEY5_DATA6_M  ((EFUSE_KEY5_DATA6_V)<<(EFUSE_KEY5_DATA6_S))
+#define EFUSE_KEY5_DATA6_V  0xFFFFFFFF
+#define EFUSE_KEY5_DATA6_S  0
+
+#define EFUSE_RD_KEY5_DATA7_REG          (DR_REG_EFUSE_BASE + 0x158)
+/* EFUSE_KEY5_DATA7 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the seventh 32 bits of KEY5..*/
+#define EFUSE_KEY5_DATA7    0xFFFFFFFF
+#define EFUSE_KEY5_DATA7_M  ((EFUSE_KEY5_DATA7_V)<<(EFUSE_KEY5_DATA7_S))
+#define EFUSE_KEY5_DATA7_V  0xFFFFFFFF
+#define EFUSE_KEY5_DATA7_S  0
+
+#define EFUSE_RD_SYS_PART2_DATA0_REG          (DR_REG_EFUSE_BASE + 0x15C)
+/* EFUSE_SYS_DATA_PART2_0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the 0th 32 bits of the 2nd part of system data..*/
+#define EFUSE_SYS_DATA_PART2_0    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_0_M  ((EFUSE_SYS_DATA_PART2_0_V)<<(EFUSE_SYS_DATA_PART2_0_S))
+#define EFUSE_SYS_DATA_PART2_0_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_0_S  0
+
+#define EFUSE_RD_SYS_PART2_DATA1_REG          (DR_REG_EFUSE_BASE + 0x160)
+/* EFUSE_SYS_DATA_PART2_1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the 1st 32 bits of the 2nd part of system data..*/
+#define EFUSE_SYS_DATA_PART2_1    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_1_M  ((EFUSE_SYS_DATA_PART2_1_V)<<(EFUSE_SYS_DATA_PART2_1_S))
+#define EFUSE_SYS_DATA_PART2_1_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_1_S  0
+
+#define EFUSE_RD_SYS_PART2_DATA2_REG          (DR_REG_EFUSE_BASE + 0x164)
+/* EFUSE_SYS_DATA_PART2_2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the 2nd 32 bits of the 2nd part of system data..*/
+#define EFUSE_SYS_DATA_PART2_2    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_2_M  ((EFUSE_SYS_DATA_PART2_2_V)<<(EFUSE_SYS_DATA_PART2_2_S))
+#define EFUSE_SYS_DATA_PART2_2_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_2_S  0
+
+#define EFUSE_RD_SYS_PART2_DATA3_REG          (DR_REG_EFUSE_BASE + 0x168)
+/* EFUSE_SYS_DATA_PART2_3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the 3rd 32 bits of the 2nd part of system data..*/
+#define EFUSE_SYS_DATA_PART2_3    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_3_M  ((EFUSE_SYS_DATA_PART2_3_V)<<(EFUSE_SYS_DATA_PART2_3_S))
+#define EFUSE_SYS_DATA_PART2_3_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_3_S  0
+
+#define EFUSE_RD_SYS_PART2_DATA4_REG          (DR_REG_EFUSE_BASE + 0x16C)
+/* EFUSE_SYS_DATA_PART2_4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the 4th 32 bits of the 2nd part of system data..*/
+#define EFUSE_SYS_DATA_PART2_4    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_4_M  ((EFUSE_SYS_DATA_PART2_4_V)<<(EFUSE_SYS_DATA_PART2_4_S))
+#define EFUSE_SYS_DATA_PART2_4_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_4_S  0
+
+#define EFUSE_RD_SYS_PART2_DATA5_REG          (DR_REG_EFUSE_BASE + 0x170)
+/* EFUSE_SYS_DATA_PART2_5 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the 5th 32 bits of the 2nd part of system data..*/
+#define EFUSE_SYS_DATA_PART2_5    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_5_M  ((EFUSE_SYS_DATA_PART2_5_V)<<(EFUSE_SYS_DATA_PART2_5_S))
+#define EFUSE_SYS_DATA_PART2_5_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_5_S  0
+
+#define EFUSE_RD_SYS_PART2_DATA6_REG          (DR_REG_EFUSE_BASE + 0x174)
+/* EFUSE_SYS_DATA_PART2_6 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the 6th 32 bits of the 2nd part of system data..*/
+#define EFUSE_SYS_DATA_PART2_6    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_6_M  ((EFUSE_SYS_DATA_PART2_6_V)<<(EFUSE_SYS_DATA_PART2_6_S))
+#define EFUSE_SYS_DATA_PART2_6_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_6_S  0
+
+#define EFUSE_RD_SYS_PART2_DATA7_REG          (DR_REG_EFUSE_BASE + 0x178)
+/* EFUSE_SYS_DATA_PART2_7 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: Stores the 7th 32 bits of the 2nd part of system data..*/
+#define EFUSE_SYS_DATA_PART2_7    0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_7_M  ((EFUSE_SYS_DATA_PART2_7_V)<<(EFUSE_SYS_DATA_PART2_7_S))
+#define EFUSE_SYS_DATA_PART2_7_V  0xFFFFFFFF
+#define EFUSE_SYS_DATA_PART2_7_S  0
+
+#define EFUSE_RD_REPEAT_ERR0_REG          (DR_REG_EFUSE_BASE + 0x17C)
+/* EFUSE_VDD_SPI_DREFH_ERR : RO ;bitpos:[31:30] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_DREFH_ERR    0x00000003
+#define EFUSE_VDD_SPI_DREFH_ERR_M  ((EFUSE_VDD_SPI_DREFH_ERR_V)<<(EFUSE_VDD_SPI_DREFH_ERR_S))
+#define EFUSE_VDD_SPI_DREFH_ERR_V  0x3
+#define EFUSE_VDD_SPI_DREFH_ERR_S  30
+/* EFUSE_VDD_SPI_MODECURLIM_ERR : RO ;bitpos:[29] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_MODECURLIM_ERR    (BIT(29))
+#define EFUSE_VDD_SPI_MODECURLIM_ERR_M  (BIT(29))
+#define EFUSE_VDD_SPI_MODECURLIM_ERR_V  0x1
+#define EFUSE_VDD_SPI_MODECURLIM_ERR_S  29
+/* EFUSE_BTLC_GPIO_ENABLE_ERR : RO ;bitpos:[28:27] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_BTLC_GPIO_ENABLE_ERR    0x00000003
+#define EFUSE_BTLC_GPIO_ENABLE_ERR_M  ((EFUSE_BTLC_GPIO_ENABLE_ERR_V)<<(EFUSE_BTLC_GPIO_ENABLE_ERR_S))
+#define EFUSE_BTLC_GPIO_ENABLE_ERR_V  0x3
+#define EFUSE_BTLC_GPIO_ENABLE_ERR_S  27
+/* EFUSE_EXT_PHY_ENABLE_ERR : RO ;bitpos:[26] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_EXT_PHY_ENABLE_ERR    (BIT(26))
+#define EFUSE_EXT_PHY_ENABLE_ERR_M  (BIT(26))
+#define EFUSE_EXT_PHY_ENABLE_ERR_V  0x1
+#define EFUSE_EXT_PHY_ENABLE_ERR_S  26
+/* EFUSE_USB_EXCHG_PINS_ERR : RO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_USB_EXCHG_PINS_ERR    (BIT(25))
+#define EFUSE_USB_EXCHG_PINS_ERR_M  (BIT(25))
+#define EFUSE_USB_EXCHG_PINS_ERR_V  0x1
+#define EFUSE_USB_EXCHG_PINS_ERR_S  25
+/* EFUSE_USB_DREFL_ERR : RO ;bitpos:[24:23] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_USB_DREFL_ERR    0x00000003
+#define EFUSE_USB_DREFL_ERR_M  ((EFUSE_USB_DREFL_ERR_V)<<(EFUSE_USB_DREFL_ERR_S))
+#define EFUSE_USB_DREFL_ERR_V  0x3
+#define EFUSE_USB_DREFL_ERR_S  23
+/* EFUSE_USB_DREFH_ERR : RO ;bitpos:[22:21] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_USB_DREFH_ERR    0x00000003
+#define EFUSE_USB_DREFH_ERR_M  ((EFUSE_USB_DREFH_ERR_V)<<(EFUSE_USB_DREFH_ERR_S))
+#define EFUSE_USB_DREFH_ERR_V  0x3
+#define EFUSE_USB_DREFH_ERR_S  21
+/* EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_ERR : RO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_ERR    (BIT(20))
+#define EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_ERR_M  (BIT(20))
+#define EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_ERR_V  0x1
+#define EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_ERR_S  20
+/* EFUSE_DIS_PAD_JTAG_ERR : RO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_PAD_JTAG_ERR    (BIT(19))
+#define EFUSE_DIS_PAD_JTAG_ERR_M  (BIT(19))
+#define EFUSE_DIS_PAD_JTAG_ERR_V  0x1
+#define EFUSE_DIS_PAD_JTAG_ERR_S  19
+/* EFUSE_SOFT_DIS_JTAG_ERR : RO ;bitpos:[18:16] ;default: 3'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_SOFT_DIS_JTAG_ERR    0x00000007
+#define EFUSE_SOFT_DIS_JTAG_ERR_M  ((EFUSE_SOFT_DIS_JTAG_ERR_V)<<(EFUSE_SOFT_DIS_JTAG_ERR_S))
+#define EFUSE_SOFT_DIS_JTAG_ERR_V  0x7
+#define EFUSE_SOFT_DIS_JTAG_ERR_S  16
+/* EFUSE_DIS_APP_CPU_ERR : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_APP_CPU_ERR    (BIT(15))
+#define EFUSE_DIS_APP_CPU_ERR_M  (BIT(15))
+#define EFUSE_DIS_APP_CPU_ERR_V  0x1
+#define EFUSE_DIS_APP_CPU_ERR_S  15
+/* EFUSE_DIS_CAN_ERR : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_CAN_ERR    (BIT(14))
+#define EFUSE_DIS_CAN_ERR_M  (BIT(14))
+#define EFUSE_DIS_CAN_ERR_V  0x1
+#define EFUSE_DIS_CAN_ERR_S  14
+/* EFUSE_DIS_USB_ERR : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_USB_ERR    (BIT(13))
+#define EFUSE_DIS_USB_ERR_M  (BIT(13))
+#define EFUSE_DIS_USB_ERR_V  0x1
+#define EFUSE_DIS_USB_ERR_S  13
+/* EFUSE_DIS_FORCE_DOWNLOAD_ERR : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_FORCE_DOWNLOAD_ERR    (BIT(12))
+#define EFUSE_DIS_FORCE_DOWNLOAD_ERR_M  (BIT(12))
+#define EFUSE_DIS_FORCE_DOWNLOAD_ERR_V  0x1
+#define EFUSE_DIS_FORCE_DOWNLOAD_ERR_S  12
+/* EFUSE_DIS_DOWNLOAD_DCACHE_ERR : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_DOWNLOAD_DCACHE_ERR    (BIT(11))
+#define EFUSE_DIS_DOWNLOAD_DCACHE_ERR_M  (BIT(11))
+#define EFUSE_DIS_DOWNLOAD_DCACHE_ERR_V  0x1
+#define EFUSE_DIS_DOWNLOAD_DCACHE_ERR_S  11
+/* EFUSE_DIS_DOWNLOAD_ICACHE_ERR : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_DOWNLOAD_ICACHE_ERR    (BIT(10))
+#define EFUSE_DIS_DOWNLOAD_ICACHE_ERR_M  (BIT(10))
+#define EFUSE_DIS_DOWNLOAD_ICACHE_ERR_V  0x1
+#define EFUSE_DIS_DOWNLOAD_ICACHE_ERR_S  10
+/* EFUSE_DIS_DCACHE_ERR : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_DCACHE_ERR    (BIT(9))
+#define EFUSE_DIS_DCACHE_ERR_M  (BIT(9))
+#define EFUSE_DIS_DCACHE_ERR_V  0x1
+#define EFUSE_DIS_DCACHE_ERR_S  9
+/* EFUSE_DIS_ICACHE_ERR : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_ICACHE_ERR    (BIT(8))
+#define EFUSE_DIS_ICACHE_ERR_M  (BIT(8))
+#define EFUSE_DIS_ICACHE_ERR_V  0x1
+#define EFUSE_DIS_ICACHE_ERR_S  8
+/* EFUSE_RPT4_RESERVED5_ERR : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Reserved*/
+#define EFUSE_RPT4_RESERVED5_ERR  (BIT(7))
+#define EFUSE_RPT4_RESERVED5_ERR_M  (BIT(7))
+#define EFUSE_RPT4_RESERVED5_ERR_V  0x1
+#define EFUSE_RPT4_RESERVED5_ERR_S  7
+/* EFUSE_RD_DIS_ERR : RO ;bitpos:[6:0] ;default: 7'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_RD_DIS_ERR    0x0000007F
+#define EFUSE_RD_DIS_ERR_M  ((EFUSE_RD_DIS_ERR_V)<<(EFUSE_RD_DIS_ERR_S))
+#define EFUSE_RD_DIS_ERR_V  0x7F
+#define EFUSE_RD_DIS_ERR_S  0
+
+#define EFUSE_RD_REPEAT_ERR1_REG          (DR_REG_EFUSE_BASE + 0x180)
+/* EFUSE_KEY_PURPOSE_1_ERR : RO ;bitpos:[31:28] ;default: 4'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_KEY_PURPOSE_1_ERR    0x0000000F
+#define EFUSE_KEY_PURPOSE_1_ERR_M  ((EFUSE_KEY_PURPOSE_1_ERR_V)<<(EFUSE_KEY_PURPOSE_1_ERR_S))
+#define EFUSE_KEY_PURPOSE_1_ERR_V  0xF
+#define EFUSE_KEY_PURPOSE_1_ERR_S  28
+/* EFUSE_KEY_PURPOSE_0_ERR : RO ;bitpos:[27:24] ;default: 4'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_KEY_PURPOSE_0_ERR    0x0000000F
+#define EFUSE_KEY_PURPOSE_0_ERR_M  ((EFUSE_KEY_PURPOSE_0_ERR_V)<<(EFUSE_KEY_PURPOSE_0_ERR_S))
+#define EFUSE_KEY_PURPOSE_0_ERR_V  0xF
+#define EFUSE_KEY_PURPOSE_0_ERR_S  24
+/* EFUSE_SECURE_BOOT_KEY_REVOKE2_ERR : RO ;bitpos:[23] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_SECURE_BOOT_KEY_REVOKE2_ERR    (BIT(23))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE2_ERR_M  (BIT(23))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE2_ERR_V  0x1
+#define EFUSE_SECURE_BOOT_KEY_REVOKE2_ERR_S  23
+/* EFUSE_SECURE_BOOT_KEY_REVOKE1_ERR : RO ;bitpos:[22] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_SECURE_BOOT_KEY_REVOKE1_ERR    (BIT(22))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE1_ERR_M  (BIT(22))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE1_ERR_V  0x1
+#define EFUSE_SECURE_BOOT_KEY_REVOKE1_ERR_S  22
+/* EFUSE_SECURE_BOOT_KEY_REVOKE0_ERR : RO ;bitpos:[21] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_SECURE_BOOT_KEY_REVOKE0_ERR    (BIT(21))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE0_ERR_M  (BIT(21))
+#define EFUSE_SECURE_BOOT_KEY_REVOKE0_ERR_V  0x1
+#define EFUSE_SECURE_BOOT_KEY_REVOKE0_ERR_S  21
+/* EFUSE_SPI_BOOT_CRYPT_CNT_ERR : RO ;bitpos:[20:18] ;default: 3'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_SPI_BOOT_CRYPT_CNT_ERR    0x00000007
+#define EFUSE_SPI_BOOT_CRYPT_CNT_ERR_M  ((EFUSE_SPI_BOOT_CRYPT_CNT_ERR_V)<<(EFUSE_SPI_BOOT_CRYPT_CNT_ERR_S))
+#define EFUSE_SPI_BOOT_CRYPT_CNT_ERR_V  0x7
+#define EFUSE_SPI_BOOT_CRYPT_CNT_ERR_S  18
+/* EFUSE_WDT_DELAY_SEL_ERR : RO ;bitpos:[17:16] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_WDT_DELAY_SEL_ERR    0x00000003
+#define EFUSE_WDT_DELAY_SEL_ERR_M  ((EFUSE_WDT_DELAY_SEL_ERR_V)<<(EFUSE_WDT_DELAY_SEL_ERR_S))
+#define EFUSE_WDT_DELAY_SEL_ERR_V  0x3
+#define EFUSE_WDT_DELAY_SEL_ERR_S  16
+/* EFUSE_VDD_SPI_DCAP_ERR : RO ;bitpos:[15:14] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_DCAP_ERR    0x00000003
+#define EFUSE_VDD_SPI_DCAP_ERR_M  ((EFUSE_VDD_SPI_DCAP_ERR_V)<<(EFUSE_VDD_SPI_DCAP_ERR_S))
+#define EFUSE_VDD_SPI_DCAP_ERR_V  0x3
+#define EFUSE_VDD_SPI_DCAP_ERR_S  14
+/* EFUSE_VDD_SPI_INIT_ERR : RO ;bitpos:[13:12] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_INIT_ERR    0x00000003
+#define EFUSE_VDD_SPI_INIT_ERR_M  ((EFUSE_VDD_SPI_INIT_ERR_V)<<(EFUSE_VDD_SPI_INIT_ERR_S))
+#define EFUSE_VDD_SPI_INIT_ERR_V  0x3
+#define EFUSE_VDD_SPI_INIT_ERR_S  12
+/* EFUSE_VDD_SPI_DCURLIM_ERR : RO ;bitpos:[11:9]] ;default: 3'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_DCURLIM_ERR    0x00000007
+#define EFUSE_VDD_SPI_DCURLIM_ERR_M  ((EFUSE_VDD_SPI_DCURLIM_ERR_V)<<(EFUSE_VDD_SPI_DCURLIM_ERR_S))
+#define EFUSE_VDD_SPI_DCURLIM_ERR_V  0x7
+#define EFUSE_VDD_SPI_DCURLIM_ERR_S  9
+/* EFUSE_VDD_SPI_ENCURLIM_ERR : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_ENCURLIM_ERR    (BIT(8))
+#define EFUSE_VDD_SPI_ENCURLIM_ERR_M  (BIT(8))
+#define EFUSE_VDD_SPI_ENCURLIM_ERR_V  0x1
+#define EFUSE_VDD_SPI_ENCURLIM_ERR_S  8
+/* EFUSE_VDD_SPI_EN_INIT_ERR : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_EN_INIT_ERR    (BIT(7))
+#define EFUSE_VDD_SPI_EN_INIT_ERR_M  (BIT(7))
+#define EFUSE_VDD_SPI_EN_INIT_ERR_V  0x1
+#define EFUSE_VDD_SPI_EN_INIT_ERR_S  7
+/* EFUSE_VDD_SPI_FORCE_ERR : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_FORCE_ERR    (BIT(6))
+#define EFUSE_VDD_SPI_FORCE_ERR_M  (BIT(6))
+#define EFUSE_VDD_SPI_FORCE_ERR_V  0x1
+#define EFUSE_VDD_SPI_FORCE_ERR_S  6
+/* EFUSE_VDD_SPI_TIEH_ERR : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_TIEH_ERR    (BIT(5))
+#define EFUSE_VDD_SPI_TIEH_ERR_M  (BIT(5))
+#define EFUSE_VDD_SPI_TIEH_ERR_V  0x1
+#define EFUSE_VDD_SPI_TIEH_ERR_S  5
+/* EFUSE_VDD_SPI_XPD_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_XPD_ERR    (BIT(4))
+#define EFUSE_VDD_SPI_XPD_ERR_M  (BIT(4))
+#define EFUSE_VDD_SPI_XPD_ERR_V  0x1
+#define EFUSE_VDD_SPI_XPD_ERR_S  4
+/* EFUSE_VDD_SPI_DREFL_ERR : RO ;bitpos:[3:2] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_DREFL_ERR    0x00000003
+#define EFUSE_VDD_SPI_DREFL_ERR_M  ((EFUSE_VDD_SPI_DREFL_ERR_V)<<(EFUSE_VDD_SPI_DREFL_ERR_S))
+#define EFUSE_VDD_SPI_DREFL_ERR_V  0x3
+#define EFUSE_VDD_SPI_DREFL_ERR_S  2
+/* EFUSE_VDD_SPI_DREFM_ERR : RO ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_VDD_SPI_DREFM_ERR    0x00000003
+#define EFUSE_VDD_SPI_DREFM_ERR_M  ((EFUSE_VDD_SPI_DREFM_ERR_V)<<(EFUSE_VDD_SPI_DREFM_ERR_S))
+#define EFUSE_VDD_SPI_DREFM_ERR_V  0x3
+#define EFUSE_VDD_SPI_DREFM_ERR_S  0
+
+#define EFUSE_RD_REPEAT_ERR2_REG          (DR_REG_EFUSE_BASE + 0x184)
+/* EFUSE_FLASH_TPUW_ERR : RO ;bitpos:[31:28] ;default: 4'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_FLASH_TPUW_ERR    0x0000000F
+#define EFUSE_FLASH_TPUW_ERR_M  ((EFUSE_FLASH_TPUW_ERR_V)<<(EFUSE_FLASH_TPUW_ERR_S))
+#define EFUSE_FLASH_TPUW_ERR_V  0xF
+#define EFUSE_FLASH_TPUW_ERR_S  28
+/* EFUSE_POWER_GLITCH_DSENSE_ERR : RO ;bitpos:[27:26] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_POWER_GLITCH_DSENSE_ERR    0x00000003
+#define EFUSE_POWER_GLITCH_DSENSE_ERR_M  ((EFUSE_POWER_GLITCH_DSENSE_ERR_V)<<(EFUSE_POWER_GLITCH_DSENSE_ERR_S))
+#define EFUSE_POWER_GLITCH_DSENSE_ERR_V  0x3
+#define EFUSE_POWER_GLITCH_DSENSE_ERR_S  26
+/* EFUSE_USB_PHY_SEL_ERR : RO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_USB_PHY_SEL_ERR    (BIT(25))
+#define EFUSE_USB_PHY_SEL_ERR_M  (BIT(25))
+#define EFUSE_USB_PHY_SEL_ERR_V  0x1
+#define EFUSE_USB_PHY_SEL_ERR_S  25
+/* EFUSE_STRAP_JTAG_SEL_ERR : RO ;bitpos:[24] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_STRAP_JTAG_SEL_ERR    (BIT(24))
+#define EFUSE_STRAP_JTAG_SEL_ERR_M  (BIT(24))
+#define EFUSE_STRAP_JTAG_SEL_ERR_V  0x1
+#define EFUSE_STRAP_JTAG_SEL_ERR_S  24
+/* EFUSE_DIS_USB_DEVICE_ERR : RO ;bitpos:[23] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_USB_DEVICE_ERR    (BIT(23))
+#define EFUSE_DIS_USB_DEVICE_ERR_M  (BIT(23))
+#define EFUSE_DIS_USB_DEVICE_ERR_V  0x1
+#define EFUSE_DIS_USB_DEVICE_ERR_S  23
+/* EFUSE_DIS_USB_JTAG_ERR : RO ;bitpos:[22] ;default: 6'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_USB_JTAG_ERR    (BIT(22))
+#define EFUSE_DIS_USB_JTAG_ERR_M  (BIT(22))
+#define EFUSE_DIS_USB_JTAG_ERR_V  0x1
+#define EFUSE_DIS_USB_JTAG_ERR_S  22
+/* EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE_ERR : RO ;bitpos:[21] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE_ERR    (BIT(21))
+#define EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE_ERR_M  (BIT(21))
+#define EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE_ERR_V  0x1
+#define EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE_ERR_S  21
+/* EFUSE_SECURE_BOOT_EN_ERR : RO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_SECURE_BOOT_EN_ERR    (BIT(20))
+#define EFUSE_SECURE_BOOT_EN_ERR_M  (BIT(20))
+#define EFUSE_SECURE_BOOT_EN_ERR_V  0x1
+#define EFUSE_SECURE_BOOT_EN_ERR_S  20
+/* EFUSE_RPT4_RESERVED0_ERR : RO ;bitpos:[19:16] ;default: 4'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_RPT4_RESERVED0_ERR    0x0000000F
+#define EFUSE_RPT4_RESERVED0_ERR_M  ((EFUSE_RPT4_RESERVED0_ERR_V)<<(EFUSE_RPT4_RESERVED0_ERR_S))
+#define EFUSE_RPT4_RESERVED0_ERR_V  0xF
+#define EFUSE_RPT4_RESERVED0_ERR_S  16
+/* EFUSE_KEY_PURPOSE_5_ERR : RO ;bitpos:[15:12] ;default: 4'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_KEY_PURPOSE_5_ERR    0x0000000F
+#define EFUSE_KEY_PURPOSE_5_ERR_M  ((EFUSE_KEY_PURPOSE_5_ERR_V)<<(EFUSE_KEY_PURPOSE_5_ERR_S))
+#define EFUSE_KEY_PURPOSE_5_ERR_V  0xF
+#define EFUSE_KEY_PURPOSE_5_ERR_S  12
+/* EFUSE_KEY_PURPOSE_4_ERR : RO ;bitpos:[11:8] ;default: 4'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_KEY_PURPOSE_4_ERR    0x0000000F
+#define EFUSE_KEY_PURPOSE_4_ERR_M  ((EFUSE_KEY_PURPOSE_4_ERR_V)<<(EFUSE_KEY_PURPOSE_4_ERR_S))
+#define EFUSE_KEY_PURPOSE_4_ERR_V  0xF
+#define EFUSE_KEY_PURPOSE_4_ERR_S  8
+/* EFUSE_KEY_PURPOSE_3_ERR : RO ;bitpos:[7:4] ;default: 4'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_KEY_PURPOSE_3_ERR    0x0000000F
+#define EFUSE_KEY_PURPOSE_3_ERR_M  ((EFUSE_KEY_PURPOSE_3_ERR_V)<<(EFUSE_KEY_PURPOSE_3_ERR_S))
+#define EFUSE_KEY_PURPOSE_3_ERR_V  0xF
+#define EFUSE_KEY_PURPOSE_3_ERR_S  4
+/* EFUSE_KEY_PURPOSE_2_ERR : RO ;bitpos:[3:0] ;default: 4'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_KEY_PURPOSE_2_ERR    0x0000000F
+#define EFUSE_KEY_PURPOSE_2_ERR_M  ((EFUSE_KEY_PURPOSE_2_ERR_V)<<(EFUSE_KEY_PURPOSE_2_ERR_S))
+#define EFUSE_KEY_PURPOSE_2_ERR_V  0xF
+#define EFUSE_KEY_PURPOSE_2_ERR_S  0
+
+#define EFUSE_RD_REPEAT_ERR3_REG          (DR_REG_EFUSE_BASE + 0x188)
+/* EFUSE_RPT4_RESERVED1_ERR : RO ;bitpos:[31] ;default: 1'h0 ; */
+/*description: Reserved..*/
+#define EFUSE_RPT4_RESERVED1_ERR    (BIT(31))
+#define EFUSE_RPT4_RESERVED1_ERR_M  (BIT(31))
+#define EFUSE_RPT4_RESERVED1_ERR_V  0x1
+#define EFUSE_RPT4_RESERVED1_ERR_S  31
+/* EFUSE_POWERGLITCH_EN_ERR : RO ;bitpos:[30] ;default: 1'b0 ; */
+/*description: .*/
+#define EFUSE_POWERGLITCH_EN_ERR    (BIT(30))
+#define EFUSE_POWERGLITCH_EN_ERR_M  (BIT(30))
+#define EFUSE_POWERGLITCH_EN_ERR_V  0x1
+#define EFUSE_POWERGLITCH_EN_ERR_S  30
+/* EFUSE_SECURE_VERSION_ERR : RO ;bitpos:[29:14] ;default: 16'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_SECURE_VERSION_ERR    0x0000FFFF
+#define EFUSE_SECURE_VERSION_ERR_M  ((EFUSE_SECURE_VERSION_ERR_V)<<(EFUSE_SECURE_VERSION_ERR_S))
+#define EFUSE_SECURE_VERSION_ERR_V  0xFFFF
+#define EFUSE_SECURE_VERSION_ERR_S  14
+/* EFUSE_FORCE_SEND_RESUME_ERR : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_FORCE_SEND_RESUME_ERR    (BIT(13))
+#define EFUSE_FORCE_SEND_RESUME_ERR_M  (BIT(13))
+#define EFUSE_FORCE_SEND_RESUME_ERR_V  0x1
+#define EFUSE_FORCE_SEND_RESUME_ERR_S  13
+/* EFUSE_FLASH_ECC_EN_ERR : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_FLASH_ECC_EN_ERR    (BIT(12))
+#define EFUSE_FLASH_ECC_EN_ERR_M  (BIT(12))
+#define EFUSE_FLASH_ECC_EN_ERR_V  0x1
+#define EFUSE_FLASH_ECC_EN_ERR_S  12
+/* EFUSE_FLASH_PAGE_SIZE_ERR : RO ;bitpos:[11:10] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_FLASH_PAGE_SIZE_ERR    0x00000003
+#define EFUSE_FLASH_PAGE_SIZE_ERR_M  ((EFUSE_FLASH_PAGE_SIZE_ERR_V)<<(EFUSE_FLASH_PAGE_SIZE_ERR_S))
+#define EFUSE_FLASH_PAGE_SIZE_ERR_V  0x3
+#define EFUSE_FLASH_PAGE_SIZE_ERR_S  10
+/* EFUSE_FLASH_TYPE_ERR : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_FLASH_TYPE_ERR    (BIT(9))
+#define EFUSE_FLASH_TYPE_ERR_M  (BIT(9))
+#define EFUSE_FLASH_TYPE_ERR_V  0x1
+#define EFUSE_FLASH_TYPE_ERR_S  9
+/* EFUSE_PIN_POWER_SELECTION_ERR : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_PIN_POWER_SELECTION_ERR    (BIT(8))
+#define EFUSE_PIN_POWER_SELECTION_ERR_M  (BIT(8))
+#define EFUSE_PIN_POWER_SELECTION_ERR_V  0x1
+#define EFUSE_PIN_POWER_SELECTION_ERR_S  8
+/* EFUSE_UART_PRINT_CONTROL_ERR : RO ;bitpos:[7:6] ;default: 2'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_UART_PRINT_CONTROL_ERR    0x00000003
+#define EFUSE_UART_PRINT_CONTROL_ERR_M  ((EFUSE_UART_PRINT_CONTROL_ERR_V)<<(EFUSE_UART_PRINT_CONTROL_ERR_S))
+#define EFUSE_UART_PRINT_CONTROL_ERR_V  0x3
+#define EFUSE_UART_PRINT_CONTROL_ERR_S  6
+/* EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR    (BIT(5))
+#define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_M  (BIT(5))
+#define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_V  0x1
+#define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_S  5
+/* EFUSE_DIS_USB_DOWNLOAD_MODE_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR    (BIT(4))
+#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_M  (BIT(4))
+#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_V  0x1
+#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_S  4
+/* EFUSE_FLASH_ECC_MODE_ERR : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_FLASH_ECC_MODE_ERR    (BIT(3))
+#define EFUSE_FLASH_ECC_MODE_ERR_M  (BIT(3))
+#define EFUSE_FLASH_ECC_MODE_ERR_V  0x1
+#define EFUSE_FLASH_ECC_MODE_ERR_S  3
+/* EFUSE_UART_PRINT_CHANNEL_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_UART_PRINT_CHANNEL_ERR    (BIT(2))
+#define EFUSE_UART_PRINT_CHANNEL_ERR_M  (BIT(2))
+#define EFUSE_UART_PRINT_CHANNEL_ERR_V  0x1
+#define EFUSE_UART_PRINT_CHANNEL_ERR_S  2
+/* EFUSE_DIS_LEGACY_SPI_BOOT_ERR : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR    (BIT(1))
+#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_M  (BIT(1))
+#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_V  0x1
+#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_S  1
+/* EFUSE_DIS_DOWNLOAD_MODE_ERR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_DIS_DOWNLOAD_MODE_ERR    (BIT(0))
+#define EFUSE_DIS_DOWNLOAD_MODE_ERR_M  (BIT(0))
+#define EFUSE_DIS_DOWNLOAD_MODE_ERR_V  0x1
+#define EFUSE_DIS_DOWNLOAD_MODE_ERR_S  0
+
+#define EFUSE_RD_REPEAT_ERR4_REG          (DR_REG_EFUSE_BASE + 0x18C)
+/* EFUSE_RPT4_RESERVED2_ERR : RO ;bitpos:[23:0] ;default: 24'h0 ; */
+/*description: If any bits in this filed are 1, then it indicates a programming error..*/
+#define EFUSE_RPT4_RESERVED2_ERR    0x00FFFFFF
+#define EFUSE_RPT4_RESERVED2_ERR_M  ((EFUSE_RPT4_RESERVED2_ERR_V)<<(EFUSE_RPT4_RESERVED2_ERR_S))
+#define EFUSE_RPT4_RESERVED2_ERR_V  0xFFFFFF
+#define EFUSE_RPT4_RESERVED2_ERR_S  0
+
+#define EFUSE_RD_RS_ERR0_REG          (DR_REG_EFUSE_BASE + 0x1C0)
+/* EFUSE_KEY4_FAIL : RO ;bitpos:[31] ;default: 1'b0 ; */
+/*description: 0: Means no failure and that the data of key4 is reliable 1: Means that programm
+ing key4 failed and the number of error bytes is over 6..*/
+#define EFUSE_KEY4_FAIL    (BIT(31))
+#define EFUSE_KEY4_FAIL_M  (BIT(31))
+#define EFUSE_KEY4_FAIL_V  0x1
+#define EFUSE_KEY4_FAIL_S  31
+/* EFUSE_KEY4_ERR_NUM : RO ;bitpos:[30:28] ;default: 3'h0 ; */
+/*description: The value of this signal means the number of error bytes..*/
+#define EFUSE_KEY4_ERR_NUM    0x00000007
+#define EFUSE_KEY4_ERR_NUM_M  ((EFUSE_KEY4_ERR_NUM_V)<<(EFUSE_KEY4_ERR_NUM_S))
+#define EFUSE_KEY4_ERR_NUM_V  0x7
+#define EFUSE_KEY4_ERR_NUM_S  28
+/* EFUSE_KEY3_FAIL : RO ;bitpos:[27] ;default: 1'b0 ; */
+/*description: 0: Means no failure and that the data of key3 is reliable 1: Means that programm
+ing key3 failed and the number of error bytes is over 6..*/
+#define EFUSE_KEY3_FAIL    (BIT(27))
+#define EFUSE_KEY3_FAIL_M  (BIT(27))
+#define EFUSE_KEY3_FAIL_V  0x1
+#define EFUSE_KEY3_FAIL_S  27
+/* EFUSE_KEY3_ERR_NUM : RO ;bitpos:[26:24] ;default: 3'h0 ; */
+/*description: The value of this signal means the number of error bytes..*/
+#define EFUSE_KEY3_ERR_NUM    0x00000007
+#define EFUSE_KEY3_ERR_NUM_M  ((EFUSE_KEY3_ERR_NUM_V)<<(EFUSE_KEY3_ERR_NUM_S))
+#define EFUSE_KEY3_ERR_NUM_V  0x7
+#define EFUSE_KEY3_ERR_NUM_S  24
+/* EFUSE_KEY2_FAIL : RO ;bitpos:[23] ;default: 1'b0 ; */
+/*description: 0: Means no failure and that the data of key2 is reliable 1: Means that programm
+ing key2 failed and the number of error bytes is over 6..*/
+#define EFUSE_KEY2_FAIL    (BIT(23))
+#define EFUSE_KEY2_FAIL_M  (BIT(23))
+#define EFUSE_KEY2_FAIL_V  0x1
+#define EFUSE_KEY2_FAIL_S  23
+/* EFUSE_KEY2_ERR_NUM : RO ;bitpos:[22:20] ;default: 3'h0 ; */
+/*description: The value of this signal means the number of error bytes..*/
+#define EFUSE_KEY2_ERR_NUM    0x00000007
+#define EFUSE_KEY2_ERR_NUM_M  ((EFUSE_KEY2_ERR_NUM_V)<<(EFUSE_KEY2_ERR_NUM_S))
+#define EFUSE_KEY2_ERR_NUM_V  0x7
+#define EFUSE_KEY2_ERR_NUM_S  20
+/* EFUSE_KEY1_FAIL : RO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: 0: Means no failure and that the data of key1 is reliable 1: Means that programm
+ing key1 failed and the number of error bytes is over 6..*/
+#define EFUSE_KEY1_FAIL    (BIT(19))
+#define EFUSE_KEY1_FAIL_M  (BIT(19))
+#define EFUSE_KEY1_FAIL_V  0x1
+#define EFUSE_KEY1_FAIL_S  19
+/* EFUSE_KEY1_ERR_NUM : RO ;bitpos:[18:16] ;default: 3'h0 ; */
+/*description: The value of this signal means the number of error bytes..*/
+#define EFUSE_KEY1_ERR_NUM    0x00000007
+#define EFUSE_KEY1_ERR_NUM_M  ((EFUSE_KEY1_ERR_NUM_V)<<(EFUSE_KEY1_ERR_NUM_S))
+#define EFUSE_KEY1_ERR_NUM_V  0x7
+#define EFUSE_KEY1_ERR_NUM_S  16
+/* EFUSE_KEY0_FAIL : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: 0: Means no failure and that the data of key0 is reliable 1: Means that programm
+ing key0 failed and the number of error bytes is over 6..*/
+#define EFUSE_KEY0_FAIL    (BIT(15))
+#define EFUSE_KEY0_FAIL_M  (BIT(15))
+#define EFUSE_KEY0_FAIL_V  0x1
+#define EFUSE_KEY0_FAIL_S  15
+/* EFUSE_KEY0_ERR_NUM : RO ;bitpos:[14:12] ;default: 3'h0 ; */
+/*description: The value of this signal means the number of error bytes..*/
+#define EFUSE_KEY0_ERR_NUM    0x00000007
+#define EFUSE_KEY0_ERR_NUM_M  ((EFUSE_KEY0_ERR_NUM_V)<<(EFUSE_KEY0_ERR_NUM_S))
+#define EFUSE_KEY0_ERR_NUM_V  0x7
+#define EFUSE_KEY0_ERR_NUM_S  12
+/* EFUSE_USR_DATA_FAIL : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: 0: Means no failure and that the user data is reliable 1: Means that programming
+ user data failed and the number of error bytes is over 6..*/
+#define EFUSE_USR_DATA_FAIL    (BIT(11))
+#define EFUSE_USR_DATA_FAIL_M  (BIT(11))
+#define EFUSE_USR_DATA_FAIL_V  0x1
+#define EFUSE_USR_DATA_FAIL_S  11
+/* EFUSE_USR_DATA_ERR_NUM : RO ;bitpos:[10:8] ;default: 3'h0 ; */
+/*description: The value of this signal means the number of error bytes..*/
+#define EFUSE_USR_DATA_ERR_NUM    0x00000007
+#define EFUSE_USR_DATA_ERR_NUM_M  ((EFUSE_USR_DATA_ERR_NUM_V)<<(EFUSE_USR_DATA_ERR_NUM_S))
+#define EFUSE_USR_DATA_ERR_NUM_V  0x7
+#define EFUSE_USR_DATA_ERR_NUM_S  8
+/* EFUSE_SYS_PART1_FAIL : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: 0: Means no failure and that the data of system part1 is reliable 1: Means that
+programming user data failed and the number of error bytes is over 6..*/
+#define EFUSE_SYS_PART1_FAIL    (BIT(7))
+#define EFUSE_SYS_PART1_FAIL_M  (BIT(7))
+#define EFUSE_SYS_PART1_FAIL_V  0x1
+#define EFUSE_SYS_PART1_FAIL_S  7
+/* EFUSE_SYS_PART1_NUM : RO ;bitpos:[6:4] ;default: 3'h0 ; */
+/*description: The value of this signal means the number of error bytes..*/
+#define EFUSE_SYS_PART1_NUM    0x00000007
+#define EFUSE_SYS_PART1_NUM_M  ((EFUSE_SYS_PART1_NUM_V)<<(EFUSE_SYS_PART1_NUM_S))
+#define EFUSE_SYS_PART1_NUM_V  0x7
+#define EFUSE_SYS_PART1_NUM_S  4
+/* EFUSE_MAC_SPI_8M_FAIL : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: 0: Means no failure and that the data of MAC_SPI_8M is reliable 1: Means that pr
+ogramming user data failed and the number of error bytes is over 6..*/
+#define EFUSE_MAC_SPI_8M_FAIL    (BIT(3))
+#define EFUSE_MAC_SPI_8M_FAIL_M  (BIT(3))
+#define EFUSE_MAC_SPI_8M_FAIL_V  0x1
+#define EFUSE_MAC_SPI_8M_FAIL_S  3
+/* EFUSE_MAC_SPI_8M_ERR_NUM : RO ;bitpos:[2:0] ;default: 3'h0 ; */
+/*description: The value of this signal means the number of error bytes..*/
+#define EFUSE_MAC_SPI_8M_ERR_NUM    0x00000007
+#define EFUSE_MAC_SPI_8M_ERR_NUM_M  ((EFUSE_MAC_SPI_8M_ERR_NUM_V)<<(EFUSE_MAC_SPI_8M_ERR_NUM_S))
+#define EFUSE_MAC_SPI_8M_ERR_NUM_V  0x7
+#define EFUSE_MAC_SPI_8M_ERR_NUM_S  0
+
+#define EFUSE_RD_RS_ERR1_REG          (DR_REG_EFUSE_BASE + 0x1C4)
+/* EFUSE_SYS_PART2_FAIL : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: 0: Means no failure and that the data of system part2 is reliable 1: Means that
+programming user data failed and the number of error bytes is over 6..*/
+#define EFUSE_SYS_PART2_FAIL    (BIT(7))
+#define EFUSE_SYS_PART2_FAIL_M  (BIT(7))
+#define EFUSE_SYS_PART2_FAIL_V  0x1
+#define EFUSE_SYS_PART2_FAIL_S  7
+/* EFUSE_SYS_PART2_ERR_NUM : RO ;bitpos:[6:4] ;default: 3'h0 ; */
+/*description: The value of this signal means the number of error bytes..*/
+#define EFUSE_SYS_PART2_ERR_NUM    0x00000007
+#define EFUSE_SYS_PART2_ERR_NUM_M  ((EFUSE_SYS_PART2_ERR_NUM_V)<<(EFUSE_SYS_PART2_ERR_NUM_S))
+#define EFUSE_SYS_PART2_ERR_NUM_V  0x7
+#define EFUSE_SYS_PART2_ERR_NUM_S  4
+/* EFUSE_KEY5_FAIL : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: 0: Means no failure and that the data of KEY5 is reliable 1: Means that programm
+ing user data failed and the number of error bytes is over 6..*/
+#define EFUSE_KEY5_FAIL    (BIT(3))
+#define EFUSE_KEY5_FAIL_M  (BIT(3))
+#define EFUSE_KEY5_FAIL_V  0x1
+#define EFUSE_KEY5_FAIL_S  3
+/* EFUSE_KEY5_ERR_NUM : RO ;bitpos:[2:0] ;default: 3'h0 ; */
+/*description: The value of this signal means the number of error bytes..*/
+#define EFUSE_KEY5_ERR_NUM    0x00000007
+#define EFUSE_KEY5_ERR_NUM_M  ((EFUSE_KEY5_ERR_NUM_V)<<(EFUSE_KEY5_ERR_NUM_S))
+#define EFUSE_KEY5_ERR_NUM_V  0x7
+#define EFUSE_KEY5_ERR_NUM_S  0
+
+#define EFUSE_CLK_REG          (DR_REG_EFUSE_BASE + 0x1C8)
+/* EFUSE_CLK_EN : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: Set this bit and force to enable clock signal of eFuse memory..*/
+#define EFUSE_CLK_EN    (BIT(16))
+#define EFUSE_CLK_EN_M  (BIT(16))
+#define EFUSE_CLK_EN_V  0x1
+#define EFUSE_CLK_EN_S  16
+/* EFUSE_MEM_FORCE_PU : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to force eFuse SRAM into working mode..*/
+#define EFUSE_MEM_FORCE_PU    (BIT(2))
+#define EFUSE_MEM_FORCE_PU_M  (BIT(2))
+#define EFUSE_MEM_FORCE_PU_V  0x1
+#define EFUSE_MEM_FORCE_PU_S  2
+/* EFUSE_MEM_CLK_FORCE_ON : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: Set this bit and force to activate clock signal of eFuse SRAM..*/
+#define EFUSE_MEM_CLK_FORCE_ON    (BIT(1))
+#define EFUSE_MEM_CLK_FORCE_ON_M  (BIT(1))
+#define EFUSE_MEM_CLK_FORCE_ON_V  0x1
+#define EFUSE_MEM_CLK_FORCE_ON_S  1
+/* EFUSE_MEM_FORCE_PD : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to force eFuse SRAM into power-saving mode..*/
+#define EFUSE_MEM_FORCE_PD    (BIT(0))
+#define EFUSE_MEM_FORCE_PD_M  (BIT(0))
+#define EFUSE_MEM_FORCE_PD_V  0x1
+#define EFUSE_MEM_FORCE_PD_S  0
+
+#define EFUSE_CONF_REG          (DR_REG_EFUSE_BASE + 0x1CC)
+/* EFUSE_OP_CODE : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: 0x5A5A: Operate programming command 0x5AA5: Operate read command..*/
+#define EFUSE_OP_CODE    0x0000FFFF
+#define EFUSE_OP_CODE_M  ((EFUSE_OP_CODE_V)<<(EFUSE_OP_CODE_S))
+#define EFUSE_OP_CODE_V  0xFFFF
+#define EFUSE_OP_CODE_S  0
+
+#define EFUSE_WRITE_OP_CODE 0x5a5a
+#define EFUSE_READ_OP_CODE  0x5aa5
+
+#define EFUSE_STATUS_REG          (DR_REG_EFUSE_BASE + 0x1D0)
+/* EFUSE_REPEAT_ERR_CNT : RO ;bitpos:[17:10] ;default: 8'h0 ; */
+/*description: Indicates the number of error bits during programming BLOCK0..*/
+#define EFUSE_REPEAT_ERR_CNT    0x000000FF
+#define EFUSE_REPEAT_ERR_CNT_M  ((EFUSE_REPEAT_ERR_CNT_V)<<(EFUSE_REPEAT_ERR_CNT_S))
+#define EFUSE_REPEAT_ERR_CNT_V  0xFF
+#define EFUSE_REPEAT_ERR_CNT_S  10
+/* EFUSE_OTP_VDDQ_IS_SW : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The value of OTP_VDDQ_IS_SW..*/
+#define EFUSE_OTP_VDDQ_IS_SW    (BIT(9))
+#define EFUSE_OTP_VDDQ_IS_SW_M  (BIT(9))
+#define EFUSE_OTP_VDDQ_IS_SW_V  0x1
+#define EFUSE_OTP_VDDQ_IS_SW_S  9
+/* EFUSE_OTP_PGENB_SW : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The value of OTP_PGENB_SW..*/
+#define EFUSE_OTP_PGENB_SW    (BIT(8))
+#define EFUSE_OTP_PGENB_SW_M  (BIT(8))
+#define EFUSE_OTP_PGENB_SW_V  0x1
+#define EFUSE_OTP_PGENB_SW_S  8
+/* EFUSE_OTP_CSB_SW : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The value of OTP_CSB_SW..*/
+#define EFUSE_OTP_CSB_SW    (BIT(7))
+#define EFUSE_OTP_CSB_SW_M  (BIT(7))
+#define EFUSE_OTP_CSB_SW_V  0x1
+#define EFUSE_OTP_CSB_SW_S  7
+/* EFUSE_OTP_STROBE_SW : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The value of OTP_STROBE_SW..*/
+#define EFUSE_OTP_STROBE_SW    (BIT(6))
+#define EFUSE_OTP_STROBE_SW_M  (BIT(6))
+#define EFUSE_OTP_STROBE_SW_V  0x1
+#define EFUSE_OTP_STROBE_SW_S  6
+/* EFUSE_OTP_VDDQ_C_SYNC2 : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The value of OTP_VDDQ_C_SYNC2..*/
+#define EFUSE_OTP_VDDQ_C_SYNC2    (BIT(5))
+#define EFUSE_OTP_VDDQ_C_SYNC2_M  (BIT(5))
+#define EFUSE_OTP_VDDQ_C_SYNC2_V  0x1
+#define EFUSE_OTP_VDDQ_C_SYNC2_S  5
+/* EFUSE_OTP_LOAD_SW : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The value of OTP_LOAD_SW..*/
+#define EFUSE_OTP_LOAD_SW    (BIT(4))
+#define EFUSE_OTP_LOAD_SW_M  (BIT(4))
+#define EFUSE_OTP_LOAD_SW_V  0x1
+#define EFUSE_OTP_LOAD_SW_S  4
+/* EFUSE_STATE : RO ;bitpos:[3:0] ;default: 4'h0 ; */
+/*description: Indicates the state of the eFuse state machine..*/
+#define EFUSE_STATE    0x0000000F
+#define EFUSE_STATE_M  ((EFUSE_STATE_V)<<(EFUSE_STATE_S))
+#define EFUSE_STATE_V  0xF
+#define EFUSE_STATE_S  0
+
+#define EFUSE_CMD_REG          (DR_REG_EFUSE_BASE + 0x1D4)
+/* EFUSE_BLK_NUM : R/W ;bitpos:[5:2] ;default: 4'h0 ; */
+/*description: The serial number of the block to be programmed. Value 0-10 corresponds to block
+ number 0-10, respectively..*/
+#define EFUSE_BLK_NUM    0x0000000F
+#define EFUSE_BLK_NUM_M  ((EFUSE_BLK_NUM_V)<<(EFUSE_BLK_NUM_S))
+#define EFUSE_BLK_NUM_V  0xF
+#define EFUSE_BLK_NUM_S  2
+/* EFUSE_PGM_CMD : R/WS/SC ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to send programming command..*/
+#define EFUSE_PGM_CMD    (BIT(1))
+#define EFUSE_PGM_CMD_M  (BIT(1))
+#define EFUSE_PGM_CMD_V  0x1
+#define EFUSE_PGM_CMD_S  1
+/* EFUSE_READ_CMD : R/WS/SC ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to send read command..*/
+#define EFUSE_READ_CMD    (BIT(0))
+#define EFUSE_READ_CMD_M  (BIT(0))
+#define EFUSE_READ_CMD_V  0x1
+#define EFUSE_READ_CMD_S  0
+
+#define EFUSE_INT_RAW_REG          (DR_REG_EFUSE_BASE + 0x1D8)
+/* EFUSE_PGM_DONE_INT_RAW : R/WC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw bit signal for pgm_done interrupt..*/
+#define EFUSE_PGM_DONE_INT_RAW    (BIT(1))
+#define EFUSE_PGM_DONE_INT_RAW_M  (BIT(1))
+#define EFUSE_PGM_DONE_INT_RAW_V  0x1
+#define EFUSE_PGM_DONE_INT_RAW_S  1
+/* EFUSE_READ_DONE_INT_RAW : R/WC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw bit signal for read_done interrupt..*/
+#define EFUSE_READ_DONE_INT_RAW    (BIT(0))
+#define EFUSE_READ_DONE_INT_RAW_M  (BIT(0))
+#define EFUSE_READ_DONE_INT_RAW_V  0x1
+#define EFUSE_READ_DONE_INT_RAW_S  0
+
+#define EFUSE_INT_ST_REG          (DR_REG_EFUSE_BASE + 0x1DC)
+/* EFUSE_PGM_DONE_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The status signal for pgm_done interrupt..*/
+#define EFUSE_PGM_DONE_INT_ST    (BIT(1))
+#define EFUSE_PGM_DONE_INT_ST_M  (BIT(1))
+#define EFUSE_PGM_DONE_INT_ST_V  0x1
+#define EFUSE_PGM_DONE_INT_ST_S  1
+/* EFUSE_READ_DONE_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The status signal for read_done interrupt..*/
+#define EFUSE_READ_DONE_INT_ST    (BIT(0))
+#define EFUSE_READ_DONE_INT_ST_M  (BIT(0))
+#define EFUSE_READ_DONE_INT_ST_V  0x1
+#define EFUSE_READ_DONE_INT_ST_S  0
+
+#define EFUSE_INT_ENA_REG          (DR_REG_EFUSE_BASE + 0x1E0)
+/* EFUSE_PGM_DONE_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The enable signal for pgm_done interrupt..*/
+#define EFUSE_PGM_DONE_INT_ENA    (BIT(1))
+#define EFUSE_PGM_DONE_INT_ENA_M  (BIT(1))
+#define EFUSE_PGM_DONE_INT_ENA_V  0x1
+#define EFUSE_PGM_DONE_INT_ENA_S  1
+/* EFUSE_READ_DONE_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The enable signal for read_done interrupt..*/
+#define EFUSE_READ_DONE_INT_ENA    (BIT(0))
+#define EFUSE_READ_DONE_INT_ENA_M  (BIT(0))
+#define EFUSE_READ_DONE_INT_ENA_V  0x1
+#define EFUSE_READ_DONE_INT_ENA_S  0
+
+#define EFUSE_INT_CLR_REG          (DR_REG_EFUSE_BASE + 0x1E4)
+/* EFUSE_PGM_DONE_INT_CLR : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The clear signal for pgm_done interrupt..*/
+#define EFUSE_PGM_DONE_INT_CLR    (BIT(1))
+#define EFUSE_PGM_DONE_INT_CLR_M  (BIT(1))
+#define EFUSE_PGM_DONE_INT_CLR_V  0x1
+#define EFUSE_PGM_DONE_INT_CLR_S  1
+/* EFUSE_READ_DONE_INT_CLR : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The clear signal for read_done interrupt..*/
+#define EFUSE_READ_DONE_INT_CLR    (BIT(0))
+#define EFUSE_READ_DONE_INT_CLR_M  (BIT(0))
+#define EFUSE_READ_DONE_INT_CLR_V  0x1
+#define EFUSE_READ_DONE_INT_CLR_S  0
+
+#define EFUSE_DAC_CONF_REG          (DR_REG_EFUSE_BASE + 0x1E8)
+/* EFUSE_OE_CLR : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: Reduces the power supply of the programming voltage..*/
+#define EFUSE_OE_CLR    (BIT(17))
+#define EFUSE_OE_CLR_M  (BIT(17))
+#define EFUSE_OE_CLR_V  0x1
+#define EFUSE_OE_CLR_S  17
+/* EFUSE_DAC_NUM : R/W ;bitpos:[16:9] ;default: 8'd255 ; */
+/*description: Controls the rising period of the programming voltage..*/
+#define EFUSE_DAC_NUM    0x000000FF
+#define EFUSE_DAC_NUM_M  ((EFUSE_DAC_NUM_V)<<(EFUSE_DAC_NUM_S))
+#define EFUSE_DAC_NUM_V  0xFF
+#define EFUSE_DAC_NUM_S  9
+/* EFUSE_DAC_CLK_PAD_SEL : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Don't care..*/
+#define EFUSE_DAC_CLK_PAD_SEL    (BIT(8))
+#define EFUSE_DAC_CLK_PAD_SEL_M  (BIT(8))
+#define EFUSE_DAC_CLK_PAD_SEL_V  0x1
+#define EFUSE_DAC_CLK_PAD_SEL_S  8
+/* EFUSE_DAC_CLK_DIV : R/W ;bitpos:[7:0] ;default: 8'd28 ; */
+/*description: Controls the division factor of the rising clock of the programming voltage..*/
+#define EFUSE_DAC_CLK_DIV    0x000000FF
+#define EFUSE_DAC_CLK_DIV_M  ((EFUSE_DAC_CLK_DIV_V)<<(EFUSE_DAC_CLK_DIV_S))
+#define EFUSE_DAC_CLK_DIV_V  0xFF
+#define EFUSE_DAC_CLK_DIV_S  0
+
+#define EFUSE_RD_TIM_CONF_REG          (DR_REG_EFUSE_BASE + 0x1EC)
+/* EFUSE_READ_INIT_NUM : R/W ;bitpos:[31:24] ;default: 8'h12 ; */
+/*description: Configures the initial read time of eFuse..*/
+#define EFUSE_READ_INIT_NUM    0x000000FF
+#define EFUSE_READ_INIT_NUM_M  ((EFUSE_READ_INIT_NUM_V)<<(EFUSE_READ_INIT_NUM_S))
+#define EFUSE_READ_INIT_NUM_V  0xFF
+#define EFUSE_READ_INIT_NUM_S  24
+
+#define EFUSE_WR_TIM_CONF0_REG          (DR_REG_EFUSE_BASE + 0x1F0)
+
+#define EFUSE_WR_TIM_CONF1_REG          (DR_REG_EFUSE_BASE + 0x1F4)
+/* EFUSE_PWR_ON_NUM : R/W ;bitpos:[23:8] ;default: 16'h2880 ; */
+/*description: Configures the power up time for VDDQ..*/
+#define EFUSE_PWR_ON_NUM    0x0000FFFF
+#define EFUSE_PWR_ON_NUM_M  ((EFUSE_PWR_ON_NUM_V)<<(EFUSE_PWR_ON_NUM_S))
+#define EFUSE_PWR_ON_NUM_V  0xFFFF
+#define EFUSE_PWR_ON_NUM_S  8
+
+#define EFUSE_WR_TIM_CONF2_REG          (DR_REG_EFUSE_BASE + 0x1F8)
+/* EFUSE_PWR_OFF_NUM : R/W ;bitpos:[15:0] ;default: 16'h190 ; */
+/*description: Configures the power outage time for VDDQ..*/
+#define EFUSE_PWR_OFF_NUM    0x0000FFFF
+#define EFUSE_PWR_OFF_NUM_M  ((EFUSE_PWR_OFF_NUM_V)<<(EFUSE_PWR_OFF_NUM_S))
+#define EFUSE_PWR_OFF_NUM_V  0xFFFF
+#define EFUSE_PWR_OFF_NUM_S  0
+
+#define EFUSE_DATE_REG          (DR_REG_EFUSE_BASE + 0x1FC)
+/* EFUSE_DATE : R/W ;bitpos:[27:0] ;default: 28'h2101180 ; */
+/*description: Stores eFuse version..*/
+#define EFUSE_DATE    0x0FFFFFFF
+#define EFUSE_DATE_M  ((EFUSE_DATE_V)<<(EFUSE_DATE_S))
+#define EFUSE_DATE_V  0xFFFFFFF
+#define EFUSE_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_EFUSE_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/efuse_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/efuse_struct.h
new file mode 100644
index 00000000000..bd45983ba26
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/efuse_struct.h
@@ -0,0 +1,476 @@
+// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_EFUSE_STRUCT_H_
+#define _SOC_EFUSE_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct efuse_dev_s {
+    uint32_t pgm_data0;
+    uint32_t pgm_data1;
+    uint32_t pgm_data2;
+    uint32_t pgm_data3;
+    uint32_t pgm_data4;
+    uint32_t pgm_data5;
+    uint32_t pgm_data6;
+    uint32_t pgm_data7;
+    uint32_t pgm_check_value0;
+    uint32_t pgm_check_value1;
+    uint32_t pgm_check_value2;
+    uint32_t rd_wr_dis;
+    union {
+        struct {
+            uint32_t reg_rd_dis                    :    7;  /*Set this bit to disable reading from BlOCK4-10.*/
+            uint32_t reg_rpt4_reserved5            :    1;  /*Reserved*/
+            uint32_t reg_dis_icache                :    1;  /*Set this bit to disable Icache.*/
+            uint32_t reg_dis_dcache                :    1;  /*Set this bit to disable Dcache.*/
+            uint32_t reg_dis_download_icache       :    1;  /*Set this bit to disable Icache in download mode (boot_mode[3:0] is 0, 1, 2, 3, 6, 7).*/
+            uint32_t reg_dis_download_dcache       :    1;  /*Set this bit to disable Dcache in download mode ( boot_mode[3:0] is 0, 1, 2, 3, 6, 7).*/
+            uint32_t reg_dis_force_download        :    1;  /*Set this bit to disable the function that forces chip into download mode.*/
+            uint32_t reg_dis_usb                   :    1;  /*Set this bit to disable USB function.*/
+            uint32_t reg_dis_can                   :    1;  /*Set this bit to disable CAN function.*/
+            uint32_t reg_dis_app_cpu               :    1;  /*Disable app cpu.*/
+            uint32_t reg_soft_dis_jtag             :    3;  /*Set these bits to disable JTAG in the soft way (odd number 1 means disable ). JTAG can be enabled in HMAC module.*/
+            uint32_t reg_dis_pad_jtag              :    1;  /*Set this bit to disable JTAG in the hard way. JTAG is disabled permanently.*/
+            uint32_t reg_dis_download_manual_encrypt:    1;  /*Set this bit to disable flash encryption when in download boot modes.*/
+            uint32_t reg_usb_drefh                 :    2;  /*Controls single-end input threshold vrefh, 1.76 V to 2 V with step of 80 mV, stored in eFuse.*/
+            uint32_t reg_usb_drefl                 :    2;  /*Controls single-end input threshold vrefl, 0.8 V to 1.04 V with step of 80 mV, stored in eFuse.*/
+            uint32_t reg_usb_exchg_pins            :    1;  /*Set this bit to exchange USB D+ and D- pins.*/
+            uint32_t reg_ext_phy_enable            :    1;  /*Set this bit to enable external PHY.*/
+            uint32_t reg_btlc_gpio_enable          :    2;  /*Enable btlc gpio.*/
+            uint32_t reg_vdd_spi_modecurlim        :    1;  /*SPI regulator switches current limit mode.*/
+            uint32_t reg_vdd_spi_drefh             :    2;  /*SPI regulator high voltage reference.*/
+        };
+        uint32_t val;
+    } rd_repeat_data0;
+    union {
+        struct {
+            uint32_t reg_vdd_spi_drefm             :    2;  /*SPI regulator medium voltage reference.*/
+            uint32_t reg_vdd_spi_drefl             :    2;  /*SPI regulator low voltage reference.*/
+            uint32_t reg_vdd_spi_xpd               :    1;  /*SPI regulator power up signal.*/
+            uint32_t reg_vdd_spi_tieh              :    1;  /*SPI regulator output is short connected to VDD3P3_RTC_IO.*/
+            uint32_t reg_vdd_spi_force             :    1;  /*Set this bit and force to use the configuration of eFuse to configure VDD_SPI.*/
+            uint32_t reg_vdd_spi_en_init           :    1;  /*Set SPI regulator to 0 to configure init[1:0]=0.*/
+            uint32_t reg_vdd_spi_encurlim          :    1;  /*Set SPI regulator to 1 to enable output current limit.*/
+            uint32_t reg_vdd_spi_dcurlim           :    3;  /*Tunes the current limit threshold of SPI regulator when tieh=0, about 800 mA/(8+d).*/
+            uint32_t reg_vdd_spi_init              :    2;  /*Adds resistor from LDO output to ground. 0: no resistance 1: 6 K 2: 4 K 3: 2 K.*/
+            uint32_t reg_vdd_spi_dcap              :    2;  /*Prevents SPI regulator from overshoot.*/
+            uint32_t reg_wdt_delay_sel             :    2;  /*Selects RTC watchdog timeout threshold, in unit of slow clock cycle. 0: 40000. 1: 80000. 2: 160000. 3:320000.*/
+            uint32_t reg_spi_boot_crypt_cnt        :    3;  /*Set this bit to enable SPI boot encrypt/decrypt. Odd number of 1: enable. even number of 1: disable.*/
+            uint32_t reg_secure_boot_key_revoke0   :    1;  /*Set this bit to enable revoking first secure boot key.*/
+            uint32_t reg_secure_boot_key_revoke1   :    1;  /*Set this bit to enable revoking second secure boot key.*/
+            uint32_t reg_secure_boot_key_revoke2   :    1;  /*Set this bit to enable revoking third secure boot key.*/
+            uint32_t reg_key_purpose_0             :    4;  /*Purpose of Key0.*/
+            uint32_t reg_key_purpose_1             :    4;  /*Purpose of Key1.*/
+        };
+        uint32_t val;
+    } rd_repeat_data1;
+    union {
+        struct {
+            uint32_t reg_key_purpose_2             :    4;  /*Purpose of Key2.*/
+            uint32_t reg_key_purpose_3             :    4;  /*Purpose of Key3.*/
+            uint32_t reg_key_purpose_4             :    4;  /*Purpose of Key4.*/
+            uint32_t reg_key_purpose_5             :    4;  /*Purpose of Key5.*/
+            uint32_t reg_rpt4_reserved0            :    4;  /*Reserved (used for four backups method).*/
+            uint32_t reg_secure_boot_en            :    1;  /*Set this bit to enable secure boot.*/
+            uint32_t reg_secure_boot_aggressive_revoke:    1;  /*Set this bit to enable revoking aggressive secure boot.*/
+            uint32_t reg_dis_usb_jtag              :    1;  /*Set this bit to disable function of usb switch to jtag in module of usb device.*/
+            uint32_t reg_dis_usb_device            :    1;  /*Set this bit to disable usb device.*/
+            uint32_t reg_strap_jtag_sel            :    1;  /*Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.*/
+            uint32_t reg_usb_phy_sel               :    1;  /*This bit is used to switch internal PHY and external PHY for USB OTG and USB Device. 0: internal PHY is assigned to USB Device while external PHY is assigned to USB OTG. 1: internal PHY is assigned to USB OTG while external PHY is assigned to USB Device.*/
+            uint32_t reg_power_glitch_dsense       :    2;  /*Sample delay configuration of power glitch.*/
+            uint32_t reg_flash_tpuw                :    4;  /*Configures flash waiting time after power-up, in unit of ms. If the value is less than 15, the waiting time is the configurable value; Otherwise, the waiting time is twice the configurable value.*/
+        };
+        uint32_t val;
+    } rd_repeat_data2;
+    union {
+        struct {
+            uint32_t reg_dis_download_mode         :    1;  /*Set this bit to disable download mode (boot_mode[3:0] = 0, 1, 2, 3, 6, 7).*/
+            uint32_t reg_dis_legacy_spi_boot       :    1;  /*Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4).*/
+            uint32_t reg_uart_print_channel        :    1;  /*Selectes the default UART print channel. 0: UART0. 1: UART1.*/
+            uint32_t reg_flash_ecc_mode            :    1;  /*Set ECC mode in ROM, 0: ROM would Enable Flash ECC 16to18 byte mode. 1:ROM would use 16to17 byte mode.*/
+            uint32_t reg_dis_usb_download_mode     :    1;  /*Set this bit to disable UART download mode through USB.*/
+            uint32_t reg_enable_security_download  :    1;  /*Set this bit to enable secure UART download mode.*/
+            uint32_t reg_uart_print_control        :    2;  /*Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled.*/
+            uint32_t reg_pin_power_selection       :    1;  /*GPIO33-GPIO37 power supply selection in ROM code. 0: VDD3P3_CPU. 1: VDD_SPI.*/
+            uint32_t reg_flash_type                :    1;  /*Set the maximum lines of SPI flash. 0: four lines. 1: eight lines.*/
+            uint32_t reg_flash_page_size           :    2;  /*Set Flash page size.*/
+            uint32_t reg_flash_ecc_en              :    1;  /*Set 1 to enable ECC for flash boot.*/
+            uint32_t reg_force_send_resume         :    1;  /*Set this bit to force ROM code to send a resume command during SPI boot.*/
+            uint32_t reg_secure_version            :    16;  /*Secure version (used by ESP-IDF anti-rollback feature).*/
+            uint32_t reg_powerglitch_en            :    1;  /*Set this bit to enable power glitch function.*/
+            uint32_t reg_rpt4_reserved1            :    1;  /*Reserved (used for four backups method).*/
+        };
+        uint32_t val;
+    } rd_repeat_data3;
+    union {
+        struct {
+            uint32_t reg_rpt4_reserved2            :    24;  /*Reserved (used for four backups method).*/
+            uint32_t reserved24                    :    8;  /*Reserved.*/
+        };
+        uint32_t val;
+    } rd_repeat_data4;
+    uint32_t rd_mac_spi_sys_0;
+    union {
+        struct {
+            uint32_t reg_mac_1                     :    16;  /*Stores the high 16 bits of MAC address.*/
+            uint32_t reg_spi_pad_conf_0            :    16;  /*Stores the zeroth part of SPI_PAD_CONF.*/
+        };
+        uint32_t val;
+    } rd_mac_spi_sys_1;
+    uint32_t rd_mac_spi_sys_2;
+    union {
+        struct {
+            uint32_t reg_spi_pad_conf_2            :    18;  /*Stores the second part of SPI_PAD_CONF.*/
+            uint32_t reg_sys_data_part0_0          :    14;  /*Stores the fist 14 bits of the zeroth part of system data.*/
+        };
+        uint32_t val;
+    } rd_mac_spi_sys_3;
+    uint32_t rd_mac_spi_sys_4;
+    uint32_t rd_mac_spi_sys_5;
+    uint32_t rd_sys_part1_data0;
+    uint32_t rd_sys_part1_data1;
+    uint32_t rd_sys_part1_data2;
+    uint32_t rd_sys_part1_data3;
+    uint32_t rd_sys_part1_data4;
+    uint32_t rd_sys_part1_data5;
+    uint32_t rd_sys_part1_data6;
+    uint32_t rd_sys_part1_data7;
+    uint32_t rd_usr_data0;
+    uint32_t rd_usr_data1;
+    uint32_t rd_usr_data2;
+    uint32_t rd_usr_data3;
+    uint32_t rd_usr_data4;
+    uint32_t rd_usr_data5;
+    uint32_t rd_usr_data6;
+    uint32_t rd_usr_data7;
+    uint32_t rd_key0_data0;
+    uint32_t rd_key0_data1;
+    uint32_t rd_key0_data2;
+    uint32_t rd_key0_data3;
+    uint32_t rd_key0_data4;
+    uint32_t rd_key0_data5;
+    uint32_t rd_key0_data6;
+    uint32_t rd_key0_data7;
+    uint32_t rd_key1_data0;
+    uint32_t rd_key1_data1;
+    uint32_t rd_key1_data2;
+    uint32_t rd_key1_data3;
+    uint32_t rd_key1_data4;
+    uint32_t rd_key1_data5;
+    uint32_t rd_key1_data6;
+    uint32_t rd_key1_data7;
+    uint32_t rd_key2_data0;
+    uint32_t rd_key2_data1;
+    uint32_t rd_key2_data2;
+    uint32_t rd_key2_data3;
+    uint32_t rd_key2_data4;
+    uint32_t rd_key2_data5;
+    uint32_t rd_key2_data6;
+    uint32_t rd_key2_data7;
+    uint32_t rd_key3_data0;
+    uint32_t rd_key3_data1;
+    uint32_t rd_key3_data2;
+    uint32_t rd_key3_data3;
+    uint32_t rd_key3_data4;
+    uint32_t rd_key3_data5;
+    uint32_t rd_key3_data6;
+    uint32_t rd_key3_data7;
+    uint32_t rd_key4_data0;
+    uint32_t rd_key4_data1;
+    uint32_t rd_key4_data2;
+    uint32_t rd_key4_data3;
+    uint32_t rd_key4_data4;
+    uint32_t rd_key4_data5;
+    uint32_t rd_key4_data6;
+    uint32_t rd_key4_data7;
+    uint32_t rd_key5_data0;
+    uint32_t rd_key5_data1;
+    uint32_t rd_key5_data2;
+    uint32_t rd_key5_data3;
+    uint32_t rd_key5_data4;
+    uint32_t rd_key5_data5;
+    uint32_t rd_key5_data6;
+    uint32_t rd_key5_data7;
+    uint32_t rd_sys_part2_data0;
+    uint32_t rd_sys_part2_data1;
+    uint32_t rd_sys_part2_data2;
+    uint32_t rd_sys_part2_data3;
+    uint32_t rd_sys_part2_data4;
+    uint32_t rd_sys_part2_data5;
+    uint32_t rd_sys_part2_data6;
+    uint32_t rd_sys_part2_data7;
+    union {
+        struct {
+            uint32_t reg_rd_dis_err                :    7;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_rpt4_reserved5_err        :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_icache_err            :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_dcache_err            :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_download_icache_err   :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_download_dcache_err   :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_force_download_err    :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_usb_err               :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_can_err               :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_app_cpu_err           :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_soft_dis_jtag_err         :    3;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_pad_jtag_err          :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_download_manual_encrypt_err:    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_usb_drefh_err             :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_usb_drefl_err             :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_usb_exchg_pins_err        :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_ext_phy_enable_err        :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_btlc_gpio_enable_err      :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_vdd_spi_modecurlim_err    :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_vdd_spi_drefh_err         :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+        };
+        uint32_t val;
+    } rd_repeat_err0;
+    union {
+        struct {
+            uint32_t reg_vdd_spi_drefm_err         :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_vdd_spi_drefl_err         :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_vdd_spi_xpd_err           :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_vdd_spi_tieh_err          :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_vdd_spi_force_err         :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_vdd_spi_en_init_err       :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_vdd_spi_encurlim_err      :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_vdd_spi_dcurlim_err       :    3;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_vdd_spi_init_err          :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_vdd_spi_dcap_err          :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_wdt_delay_sel_err         :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_spi_boot_crypt_cnt_err    :    3;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_secure_boot_key_revoke0_err:    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_secure_boot_key_revoke1_err:    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_secure_boot_key_revoke2_err:    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_key_purpose_0_err         :    4;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_key_purpose_1_err         :    4;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+        };
+        uint32_t val;
+    } rd_repeat_err1;
+    union {
+        struct {
+            uint32_t reg_key_purpose_2_err         :    4;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_key_purpose_3_err         :    4;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_key_purpose_4_err         :    4;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_key_purpose_5_err         :    4;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_rpt4_reserved0_err        :    4;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_secure_boot_en_err        :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_secure_boot_aggressive_revoke_err:    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_usb_jtag_err          :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_usb_device_err        :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_strap_jtag_sel_err        :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_usb_phy_sel_err           :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_power_glitch_dsense_err   :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_flash_tpuw_err            :    4;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+        };
+        uint32_t val;
+    } rd_repeat_err2;
+    union {
+        struct {
+            uint32_t reg_dis_download_mode_err     :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_legacy_spi_boot_err   :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_uart_print_channel_err    :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_flash_ecc_mode_err        :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_dis_usb_download_mode_err :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_enable_security_download_err:    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_uart_print_control_err    :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_pin_power_selection_err   :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_flash_type_err            :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_flash_page_size_err       :    2;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_flash_ecc_en_err          :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_force_send_resume_err     :    1;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_secure_version_err        :    16;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reg_powerglitch_en_err        :    1;
+            uint32_t reg_rpt4_reserved1_err        :    1;  /*Reserved.*/
+        };
+        uint32_t val;
+    } rd_repeat_err3;
+    union {
+        struct {
+            uint32_t reg_rpt4_reserved2_err        :    24;  /*If any bits in this filed are 1, then it indicates a programming error.*/
+            uint32_t reserved24                    :    8;  /*Reserved.*/
+        };
+        uint32_t val;
+    } rd_repeat_err4;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    union {
+        struct {
+            uint32_t rd_mac_spi_8m_err_num: 3;     /*The value of this signal means the number of error bytes.*/
+            uint32_t rd_mac_spi_8m_fail:    1;     /*0: Means no failure and that the data of MAC_SPI_8M is reliable 1: Means that programming user data failed and the number of error bytes is over 6.*/
+            uint32_t rd_sys_part1_num:      3;     /*The value of this signal means the number of error bytes.*/
+            uint32_t rd_sys_part1_fail:     1;     /*0: Means no failure and that the data of system part1 is reliable 1: Means that programming user data failed and the number of error bytes is over 6.*/
+            uint32_t rd_usr_data_err_num:   3;     /*The value of this signal means the number of error bytes.*/
+            uint32_t rd_usr_data_fail:      1;     /*0: Means no failure and that the user data is reliable 1: Means that programming user data failed and the number of error bytes is over 6.*/
+            uint32_t rd_key0_err_num:       3;     /*The value of this signal means the number of error bytes.*/
+            uint32_t rd_key0_fail:          1;     /*0: Means no failure and that the data of key$n is reliable 1: Means that programming key$n failed and the number of error bytes is over 6.*/
+            uint32_t rd_key1_err_num:       3;     /*The value of this signal means the number of error bytes.*/
+            uint32_t rd_key1_fail:          1;     /*0: Means no failure and that the data of key$n is reliable 1: Means that programming key$n failed and the number of error bytes is over 6.*/
+            uint32_t rd_key2_err_num:       3;     /*The value of this signal means the number of error bytes.*/
+            uint32_t rd_key2_fail:          1;     /*0: Means no failure and that the data of key$n is reliable 1: Means that programming key$n failed and the number of error bytes is over 6.*/
+            uint32_t rd_key3_err_num:       3;     /*The value of this signal means the number of error bytes.*/
+            uint32_t rd_key3_fail:          1;     /*0: Means no failure and that the data of key$n is reliable 1: Means that programming key$n failed and the number of error bytes is over 6.*/
+            uint32_t rd_key4_err_num:       3;     /*The value of this signal means the number of error bytes.*/
+            uint32_t rd_key4_fail:          1;     /*0: Means no failure and that the data of key$n is reliable 1: Means that programming key$n failed and the number of error bytes is over 6.*/
+        };
+        uint32_t val;
+    } rd_rs_err0;
+    union {
+        struct {
+            uint32_t rd_key5_err_num:   3;         /*The value of this signal means the number of error bytes.*/
+            uint32_t rd_key5_fail:      1;         /*0: Means no failure and that the data of KEY5 is reliable 1: Means that programming user data failed and the number of error bytes is over 6.*/
+            uint32_t rd_sys_part2_num:  3;         /*The value of this signal means the number of error bytes.*/
+            uint32_t rd_sys_part2_fail: 1;         /*0: Means no failure and that the data of system part2 is reliable 1: Means that programming user data failed and the number of error bytes is over 6.*/
+            uint32_t reserved8:        24;         /*Reserved.*/
+        };
+        uint32_t val;
+    } rd_rs_err1;
+    union {
+        struct {
+            uint32_t mem_force_pd:     1;          /*Set this bit to force eFuse SRAM into power-saving mode.*/
+            uint32_t mem_clk_force_on: 1;          /*Set this bit and force to activate clock signal of eFuse SRAM.*/
+            uint32_t mem_force_pu:     1;          /*Set this bit to force eFuse SRAM into working mode.*/
+            uint32_t reserved3:       13;          /*Reserved.*/
+            uint32_t clk_en:           1;          /*Set this bit and force to enable clock signal of eFuse memory.*/
+            uint32_t reserved17:      15;          /*Reserved.*/
+        };
+        uint32_t val;
+    } clk;
+    union {
+        struct {
+            uint32_t op_code:   16;                /*0x5A5A: Operate programming command 0x5AA5: Operate read command.*/
+            uint32_t reserved16: 16;               /*Reserved.*/
+        };
+        uint32_t val;
+    } conf;
+    union {
+        struct {
+            uint32_t state:            4;          /*Indicates the state of the eFuse state machine.*/
+            uint32_t otp_load_sw:      1;          /*The value of OTP_LOAD_SW.*/
+            uint32_t otp_vddq_c_sync2: 1;          /*The value of OTP_VDDQ_C_SYNC2.*/
+            uint32_t otp_strobe_sw:    1;          /*The value of OTP_STROBE_SW.*/
+            uint32_t otp_csb_sw:       1;          /*The value of OTP_CSB_SW.*/
+            uint32_t otp_pgenb_sw:     1;          /*The value of OTP_PGENB_SW.*/
+            uint32_t otp_vddq_is_sw:   1;          /*The value of OTP_VDDQ_IS_SW.*/
+            uint32_t repeat_err_cnt:   8;          /*Indicates the number of error bits during programming BLOCK0.*/
+            uint32_t reserved18:      14;          /*Reserved.*/
+        };
+        uint32_t val;
+    } status;
+    union {
+        struct {
+            uint32_t read_cmd:   1;                /*Set this bit to send read command.*/
+            uint32_t pgm_cmd:    1;                /*Set this bit to send programming command.*/
+            uint32_t blk_num:    4;                /*The serial number of the block to be programmed. Value 0-10 corresponds to block number 0-10  respectively.*/
+            uint32_t reserved6: 26;                /*Reserved.*/
+        };
+        uint32_t val;
+    } cmd;
+    union {
+        struct {
+            uint32_t read_done:         1;         /*The raw bit signal for read_done interrupt.*/
+            uint32_t pgm_done:          1;         /*The raw bit signal for pgm_done interrupt.*/
+            uint32_t reserved2:        30;         /*Reserved.*/
+        };
+        uint32_t val;
+    } int_raw;
+    union {
+        struct {
+            uint32_t read_done:        1;          /*The status signal for read_done interrupt.*/
+            uint32_t pgm_done:         1;          /*The status signal for pgm_done interrupt.*/
+            uint32_t reserved2:       30;          /*Reserved.*/
+        };
+        uint32_t val;
+    } int_st;
+    union {
+        struct {
+            uint32_t read_done:         1;         /*The enable signal for read_done interrupt.*/
+            uint32_t pgm_done:          1;         /*The enable signal for pgm_done interrupt.*/
+            uint32_t reserved2:        30;         /*Reserved.*/
+        };
+        uint32_t val;
+    } int_ena;
+    union {
+        struct {
+            uint32_t read_done:         1;         /*The clear signal for read_done interrupt.*/
+            uint32_t pgm_done:          1;         /*The clear signal for pgm_done interrupt.*/
+            uint32_t reserved2:        30;         /*Reserved.*/
+        };
+        uint32_t val;
+    } int_clr;
+    union {
+        struct {
+            uint32_t dac_clk_div:     8;           /*Controls the division factor of the rising clock of the programming voltage.*/
+            uint32_t dac_clk_pad_sel: 1;           /*Don't care.*/
+            uint32_t dac_num:         8;           /*Controls the rising period of the programming voltage.*/
+            uint32_t oe_clr:          1;           /*Reduces the power supply of the programming voltage.*/
+            uint32_t reserved18:     14;           /*Reserved.*/
+        };
+        uint32_t val;
+    } dac_conf;
+    union {
+        struct {
+            uint32_t reserved0                     :    24;  /*Reserved. (Default read timing parameter)*/
+            uint32_t reg_read_init_num             :    8;  /*Configures the initial read time of eFuse.*/
+        };
+        uint32_t val;
+    } rd_tim_conf;
+    uint32_t wr_tim_conf0;
+    union {
+        struct {
+            uint32_t tsup_a:     8;                /*Configures the setup time of programming operation.*/
+            uint32_t pwr_on_num: 16;               /*Configures the power up time for VDDQ.*/
+            uint32_t reserved24: 8;                /*Reserved.*/
+        };
+        uint32_t val;
+    } wr_tim_conf1;
+    union {
+        struct {
+            uint32_t pwr_off_num: 16;              /*Configures the power outage time for VDDQ.*/
+            uint32_t reserved16: 16;               /*Reserved.*/
+        };
+        uint32_t val;
+    } wr_tim_conf2;
+    union {
+        struct {
+            uint32_t date:      28;                /*Stores eFuse version.*/
+            uint32_t reserved28: 4;                /*Reserved.*/
+        };
+        uint32_t val;
+    } date;
+} efuse_dev_t;
+
+extern efuse_dev_t EFUSE;
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_EFUSE_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/extmem_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/extmem_reg.h
new file mode 100644
index 00000000000..5763ec6df77
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/extmem_reg.h
@@ -0,0 +1,1676 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_EXTMEM_REG_H_
+#define _SOC_EXTMEM_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define EXTMEM_DCACHE_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x0)
+/* EXTMEM_DCACHE_BLOCKSIZE_MODE : R/W ;bitpos:[4:3] ;default: 2'b0 ; */
+/*description: The bit is used to configure cache block size.0: 16 bytes, 1: 32 bytes,2: 64 byt
+es.*/
+#define EXTMEM_DCACHE_BLOCKSIZE_MODE    0x00000003
+#define EXTMEM_DCACHE_BLOCKSIZE_MODE_M  ((EXTMEM_DCACHE_BLOCKSIZE_MODE_V)<<(EXTMEM_DCACHE_BLOCKSIZE_MODE_S))
+#define EXTMEM_DCACHE_BLOCKSIZE_MODE_V  0x3
+#define EXTMEM_DCACHE_BLOCKSIZE_MODE_S  3
+/* EXTMEM_DCACHE_SIZE_MODE : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to configure cache memory size.0: 32KB, 1: 64KB.*/
+#define EXTMEM_DCACHE_SIZE_MODE    (BIT(2))
+#define EXTMEM_DCACHE_SIZE_MODE_M  (BIT(2))
+#define EXTMEM_DCACHE_SIZE_MODE_V  0x1
+#define EXTMEM_DCACHE_SIZE_MODE_S  2
+/* EXTMEM_DCACHE_ENABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to activate the data cache. 0: disable, 1: enable.*/
+#define EXTMEM_DCACHE_ENABLE    (BIT(0))
+#define EXTMEM_DCACHE_ENABLE_M  (BIT(0))
+#define EXTMEM_DCACHE_ENABLE_V  0x1
+#define EXTMEM_DCACHE_ENABLE_S  0
+
+#define EXTMEM_DCACHE_CTRL1_REG          (DR_REG_EXTMEM_BASE + 0x4)
+/* EXTMEM_DCACHE_SHUT_CORE1_BUS : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: The bit is used to disable core1 dbus, 0: enable, 1: disable.*/
+#define EXTMEM_DCACHE_SHUT_CORE1_BUS    (BIT(1))
+#define EXTMEM_DCACHE_SHUT_CORE1_BUS_M  (BIT(1))
+#define EXTMEM_DCACHE_SHUT_CORE1_BUS_V  0x1
+#define EXTMEM_DCACHE_SHUT_CORE1_BUS_S  1
+/* EXTMEM_DCACHE_SHUT_CORE0_BUS : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: The bit is used to disable core0 dbus, 0: enable, 1: disable.*/
+#define EXTMEM_DCACHE_SHUT_CORE0_BUS    (BIT(0))
+#define EXTMEM_DCACHE_SHUT_CORE0_BUS_M  (BIT(0))
+#define EXTMEM_DCACHE_SHUT_CORE0_BUS_V  0x1
+#define EXTMEM_DCACHE_SHUT_CORE0_BUS_S  0
+
+#define EXTMEM_DCACHE_TAG_POWER_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x8)
+/* EXTMEM_DCACHE_TAG_MEM_FORCE_PU : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: The bit is used to power dcache tag memory up, 0: follow  rtc_lslp_pd, 1: power
+up.*/
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_PU    (BIT(2))
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_PU_M  (BIT(2))
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_PU_V  0x1
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_PU_S  2
+/* EXTMEM_DCACHE_TAG_MEM_FORCE_PD : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to power dcache tag memory down, 0: follow  rtc_lslp_pd, 1: powe
+r down.*/
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_PD    (BIT(1))
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_PD_M  (BIT(1))
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_PD_V  0x1
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_PD_S  1
+/* EXTMEM_DCACHE_TAG_MEM_FORCE_ON : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: The bit is used to close clock gating of dcache tag memory. 1: close gating, 0:
+open clock gating..*/
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_ON    (BIT(0))
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_ON_M  (BIT(0))
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_ON_V  0x1
+#define EXTMEM_DCACHE_TAG_MEM_FORCE_ON_S  0
+
+#define EXTMEM_DCACHE_PRELOCK_CTRL_REG          (DR_REG_EXTMEM_BASE + 0xC)
+/* EXTMEM_DCACHE_PRELOCK_SCT1_EN : R/W ;bitpos:[1] ;default: 1'h0 ; */
+/*description: The bit is used to enable the second section of prelock function..*/
+#define EXTMEM_DCACHE_PRELOCK_SCT1_EN    (BIT(1))
+#define EXTMEM_DCACHE_PRELOCK_SCT1_EN_M  (BIT(1))
+#define EXTMEM_DCACHE_PRELOCK_SCT1_EN_V  0x1
+#define EXTMEM_DCACHE_PRELOCK_SCT1_EN_S  1
+/* EXTMEM_DCACHE_PRELOCK_SCT0_EN : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: The bit is used to enable the first section of prelock function..*/
+#define EXTMEM_DCACHE_PRELOCK_SCT0_EN    (BIT(0))
+#define EXTMEM_DCACHE_PRELOCK_SCT0_EN_M  (BIT(0))
+#define EXTMEM_DCACHE_PRELOCK_SCT0_EN_V  0x1
+#define EXTMEM_DCACHE_PRELOCK_SCT0_EN_S  0
+
+#define EXTMEM_DCACHE_PRELOCK_SCT0_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x10)
+/* EXTMEM_DCACHE_PRELOCK_SCT0_ADDR : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The bits are used to configure the first start virtual address of data prelock,
+which is combined with DCACHE_PRELOCK_SCT0_SIZE_REG.*/
+#define EXTMEM_DCACHE_PRELOCK_SCT0_ADDR    0xFFFFFFFF
+#define EXTMEM_DCACHE_PRELOCK_SCT0_ADDR_M  ((EXTMEM_DCACHE_PRELOCK_SCT0_ADDR_V)<<(EXTMEM_DCACHE_PRELOCK_SCT0_ADDR_S))
+#define EXTMEM_DCACHE_PRELOCK_SCT0_ADDR_V  0xFFFFFFFF
+#define EXTMEM_DCACHE_PRELOCK_SCT0_ADDR_S  0
+
+#define EXTMEM_DCACHE_PRELOCK_SCT1_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x14)
+/* EXTMEM_DCACHE_PRELOCK_SCT1_ADDR : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The bits are used to configure the second start virtual address of data prelock,
+ which is combined with DCACHE_PRELOCK_SCT1_SIZE_REG.*/
+#define EXTMEM_DCACHE_PRELOCK_SCT1_ADDR    0xFFFFFFFF
+#define EXTMEM_DCACHE_PRELOCK_SCT1_ADDR_M  ((EXTMEM_DCACHE_PRELOCK_SCT1_ADDR_V)<<(EXTMEM_DCACHE_PRELOCK_SCT1_ADDR_S))
+#define EXTMEM_DCACHE_PRELOCK_SCT1_ADDR_V  0xFFFFFFFF
+#define EXTMEM_DCACHE_PRELOCK_SCT1_ADDR_S  0
+
+#define EXTMEM_DCACHE_PRELOCK_SCT_SIZE_REG          (DR_REG_EXTMEM_BASE + 0x18)
+/* EXTMEM_DCACHE_PRELOCK_SCT0_SIZE : R/W ;bitpos:[31:16] ;default: 16'h0 ; */
+/*description: The bits are used to configure the first length of data locking, which is combin
+ed with DCACHE_PRELOCK_SCT0_ADDR_REG.*/
+#define EXTMEM_DCACHE_PRELOCK_SCT0_SIZE    0x0000FFFF
+#define EXTMEM_DCACHE_PRELOCK_SCT0_SIZE_M  ((EXTMEM_DCACHE_PRELOCK_SCT0_SIZE_V)<<(EXTMEM_DCACHE_PRELOCK_SCT0_SIZE_S))
+#define EXTMEM_DCACHE_PRELOCK_SCT0_SIZE_V  0xFFFF
+#define EXTMEM_DCACHE_PRELOCK_SCT0_SIZE_S  16
+/* EXTMEM_DCACHE_PRELOCK_SCT1_SIZE : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: The bits are used to configure the second length of data locking, which is combi
+ned with DCACHE_PRELOCK_SCT1_ADDR_REG.*/
+#define EXTMEM_DCACHE_PRELOCK_SCT1_SIZE    0x0000FFFF
+#define EXTMEM_DCACHE_PRELOCK_SCT1_SIZE_M  ((EXTMEM_DCACHE_PRELOCK_SCT1_SIZE_V)<<(EXTMEM_DCACHE_PRELOCK_SCT1_SIZE_S))
+#define EXTMEM_DCACHE_PRELOCK_SCT1_SIZE_V  0xFFFF
+#define EXTMEM_DCACHE_PRELOCK_SCT1_SIZE_S  0
+
+#define EXTMEM_DCACHE_LOCK_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x1C)
+/* EXTMEM_DCACHE_LOCK_DONE : RO ;bitpos:[2] ;default: 1'b1 ; */
+/*description: The bit is used to indicate unlock/lock operation is finished..*/
+#define EXTMEM_DCACHE_LOCK_DONE    (BIT(2))
+#define EXTMEM_DCACHE_LOCK_DONE_M  (BIT(2))
+#define EXTMEM_DCACHE_LOCK_DONE_V  0x1
+#define EXTMEM_DCACHE_LOCK_DONE_S  2
+/* EXTMEM_DCACHE_UNLOCK_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to enable unlock operation. It will be cleared by hardware after
+ unlock operation done..*/
+#define EXTMEM_DCACHE_UNLOCK_ENA    (BIT(1))
+#define EXTMEM_DCACHE_UNLOCK_ENA_M  (BIT(1))
+#define EXTMEM_DCACHE_UNLOCK_ENA_V  0x1
+#define EXTMEM_DCACHE_UNLOCK_ENA_S  1
+/* EXTMEM_DCACHE_LOCK_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to enable lock operation. It will be cleared by hardware after l
+ock operation done..*/
+#define EXTMEM_DCACHE_LOCK_ENA    (BIT(0))
+#define EXTMEM_DCACHE_LOCK_ENA_M  (BIT(0))
+#define EXTMEM_DCACHE_LOCK_ENA_V  0x1
+#define EXTMEM_DCACHE_LOCK_ENA_S  0
+
+#define EXTMEM_DCACHE_LOCK_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x20)
+/* EXTMEM_DCACHE_LOCK_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address for lock operations. It
+ should be combined with DCACHE_LOCK_SIZE_REG..*/
+#define EXTMEM_DCACHE_LOCK_ADDR    0xFFFFFFFF
+#define EXTMEM_DCACHE_LOCK_ADDR_M  ((EXTMEM_DCACHE_LOCK_ADDR_V)<<(EXTMEM_DCACHE_LOCK_ADDR_S))
+#define EXTMEM_DCACHE_LOCK_ADDR_V  0xFFFFFFFF
+#define EXTMEM_DCACHE_LOCK_ADDR_S  0
+
+#define EXTMEM_DCACHE_LOCK_SIZE_REG          (DR_REG_EXTMEM_BASE + 0x24)
+/* EXTMEM_DCACHE_LOCK_SIZE : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: The bits are used to configure the length for lock operations. The bits are the
+counts of cache block. It should be combined with DCACHE_LOCK_ADDR_REG..*/
+#define EXTMEM_DCACHE_LOCK_SIZE    0x0000FFFF
+#define EXTMEM_DCACHE_LOCK_SIZE_M  ((EXTMEM_DCACHE_LOCK_SIZE_V)<<(EXTMEM_DCACHE_LOCK_SIZE_S))
+#define EXTMEM_DCACHE_LOCK_SIZE_V  0xFFFF
+#define EXTMEM_DCACHE_LOCK_SIZE_S  0
+
+#define EXTMEM_DCACHE_SYNC_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x28)
+/* EXTMEM_DCACHE_SYNC_DONE : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to indicate clean/writeback/invalidate operation is finished..*/
+#define EXTMEM_DCACHE_SYNC_DONE    (BIT(3))
+#define EXTMEM_DCACHE_SYNC_DONE_M  (BIT(3))
+#define EXTMEM_DCACHE_SYNC_DONE_V  0x1
+#define EXTMEM_DCACHE_SYNC_DONE_S  3
+/* EXTMEM_DCACHE_CLEAN_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to enable clean operation. It will be cleared by hardware after
+clean operation done..*/
+#define EXTMEM_DCACHE_CLEAN_ENA    (BIT(2))
+#define EXTMEM_DCACHE_CLEAN_ENA_M  (BIT(2))
+#define EXTMEM_DCACHE_CLEAN_ENA_V  0x1
+#define EXTMEM_DCACHE_CLEAN_ENA_S  2
+/* EXTMEM_DCACHE_WRITEBACK_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to enable writeback operation. It will be cleared by hardware af
+ter writeback operation done..*/
+#define EXTMEM_DCACHE_WRITEBACK_ENA    (BIT(1))
+#define EXTMEM_DCACHE_WRITEBACK_ENA_M  (BIT(1))
+#define EXTMEM_DCACHE_WRITEBACK_ENA_V  0x1
+#define EXTMEM_DCACHE_WRITEBACK_ENA_S  1
+/* EXTMEM_DCACHE_INVALIDATE_ENA : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: The bit is used to enable invalidate operation. It will be cleared by hardware a
+fter invalidate operation done..*/
+#define EXTMEM_DCACHE_INVALIDATE_ENA    (BIT(0))
+#define EXTMEM_DCACHE_INVALIDATE_ENA_M  (BIT(0))
+#define EXTMEM_DCACHE_INVALIDATE_ENA_V  0x1
+#define EXTMEM_DCACHE_INVALIDATE_ENA_S  0
+
+#define EXTMEM_DCACHE_SYNC_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x2C)
+/* EXTMEM_DCACHE_SYNC_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address for clean operations. I
+t should be combined with DCACHE_SYNC_SIZE_REG..*/
+#define EXTMEM_DCACHE_SYNC_ADDR    0xFFFFFFFF
+#define EXTMEM_DCACHE_SYNC_ADDR_M  ((EXTMEM_DCACHE_SYNC_ADDR_V)<<(EXTMEM_DCACHE_SYNC_ADDR_S))
+#define EXTMEM_DCACHE_SYNC_ADDR_V  0xFFFFFFFF
+#define EXTMEM_DCACHE_SYNC_ADDR_S  0
+
+#define EXTMEM_DCACHE_SYNC_SIZE_REG          (DR_REG_EXTMEM_BASE + 0x30)
+/* EXTMEM_DCACHE_SYNC_SIZE : R/W ;bitpos:[22:0] ;default: 23'h0 ; */
+/*description: The bits are used to configure the length for sync operations. The bits are the
+counts of cache block. It should be combined with DCACHE_SYNC_ADDR_REG..*/
+#define EXTMEM_DCACHE_SYNC_SIZE    0x007FFFFF
+#define EXTMEM_DCACHE_SYNC_SIZE_M  ((EXTMEM_DCACHE_SYNC_SIZE_V)<<(EXTMEM_DCACHE_SYNC_SIZE_S))
+#define EXTMEM_DCACHE_SYNC_SIZE_V  0x7FFFFF
+#define EXTMEM_DCACHE_SYNC_SIZE_S  0
+
+#define EXTMEM_DCACHE_OCCUPY_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x34)
+/* EXTMEM_DCACHE_OCCUPY_DONE : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: The bit is used to indicate occupy operation is finished..*/
+#define EXTMEM_DCACHE_OCCUPY_DONE    (BIT(1))
+#define EXTMEM_DCACHE_OCCUPY_DONE_M  (BIT(1))
+#define EXTMEM_DCACHE_OCCUPY_DONE_V  0x1
+#define EXTMEM_DCACHE_OCCUPY_DONE_S  1
+/* EXTMEM_DCACHE_OCCUPY_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to enable occupy operation. It will be cleared by hardware after
+ issuing Auot-Invalidate Operation..*/
+#define EXTMEM_DCACHE_OCCUPY_ENA    (BIT(0))
+#define EXTMEM_DCACHE_OCCUPY_ENA_M  (BIT(0))
+#define EXTMEM_DCACHE_OCCUPY_ENA_V  0x1
+#define EXTMEM_DCACHE_OCCUPY_ENA_S  0
+
+#define EXTMEM_DCACHE_OCCUPY_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x38)
+/* EXTMEM_DCACHE_OCCUPY_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address for occupy operation. I
+t should be combined with DCACHE_OCCUPY_SIZE_REG..*/
+#define EXTMEM_DCACHE_OCCUPY_ADDR    0xFFFFFFFF
+#define EXTMEM_DCACHE_OCCUPY_ADDR_M  ((EXTMEM_DCACHE_OCCUPY_ADDR_V)<<(EXTMEM_DCACHE_OCCUPY_ADDR_S))
+#define EXTMEM_DCACHE_OCCUPY_ADDR_V  0xFFFFFFFF
+#define EXTMEM_DCACHE_OCCUPY_ADDR_S  0
+
+#define EXTMEM_DCACHE_OCCUPY_SIZE_REG          (DR_REG_EXTMEM_BASE + 0x3C)
+/* EXTMEM_DCACHE_OCCUPY_SIZE : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: The bits are used to configure the length for occupy operation. The bits are the
+ counts of cache block. It should be combined with DCACHE_OCCUPY_ADDR_REG..*/
+#define EXTMEM_DCACHE_OCCUPY_SIZE    0x0000FFFF
+#define EXTMEM_DCACHE_OCCUPY_SIZE_M  ((EXTMEM_DCACHE_OCCUPY_SIZE_V)<<(EXTMEM_DCACHE_OCCUPY_SIZE_S))
+#define EXTMEM_DCACHE_OCCUPY_SIZE_V  0xFFFF
+#define EXTMEM_DCACHE_OCCUPY_SIZE_S  0
+
+#define EXTMEM_DCACHE_PRELOAD_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x40)
+/* EXTMEM_DCACHE_PRELOAD_ORDER : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to configure the direction of preload operation. 1: descending,
+0: ascending..*/
+#define EXTMEM_DCACHE_PRELOAD_ORDER    (BIT(2))
+#define EXTMEM_DCACHE_PRELOAD_ORDER_M  (BIT(2))
+#define EXTMEM_DCACHE_PRELOAD_ORDER_V  0x1
+#define EXTMEM_DCACHE_PRELOAD_ORDER_S  2
+/* EXTMEM_DCACHE_PRELOAD_DONE : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: The bit is used to indicate preload operation is finished..*/
+#define EXTMEM_DCACHE_PRELOAD_DONE    (BIT(1))
+#define EXTMEM_DCACHE_PRELOAD_DONE_M  (BIT(1))
+#define EXTMEM_DCACHE_PRELOAD_DONE_V  0x1
+#define EXTMEM_DCACHE_PRELOAD_DONE_S  1
+/* EXTMEM_DCACHE_PRELOAD_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to enable preload operation. It will be cleared by hardware afte
+r preload operation done..*/
+#define EXTMEM_DCACHE_PRELOAD_ENA    (BIT(0))
+#define EXTMEM_DCACHE_PRELOAD_ENA_M  (BIT(0))
+#define EXTMEM_DCACHE_PRELOAD_ENA_V  0x1
+#define EXTMEM_DCACHE_PRELOAD_ENA_S  0
+
+#define EXTMEM_DCACHE_PRELOAD_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x44)
+/* EXTMEM_DCACHE_PRELOAD_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address for preload operation.
+It should be combined with DCACHE_PRELOAD_SIZE_REG..*/
+#define EXTMEM_DCACHE_PRELOAD_ADDR    0xFFFFFFFF
+#define EXTMEM_DCACHE_PRELOAD_ADDR_M  ((EXTMEM_DCACHE_PRELOAD_ADDR_V)<<(EXTMEM_DCACHE_PRELOAD_ADDR_S))
+#define EXTMEM_DCACHE_PRELOAD_ADDR_V  0xFFFFFFFF
+#define EXTMEM_DCACHE_PRELOAD_ADDR_S  0
+
+#define EXTMEM_DCACHE_PRELOAD_SIZE_REG          (DR_REG_EXTMEM_BASE + 0x48)
+/* EXTMEM_DCACHE_PRELOAD_SIZE : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: The bits are used to configure the length for preload operation. The bits are th
+e counts of cache block. It should be combined with DCACHE_PRELOAD_ADDR_REG...*/
+#define EXTMEM_DCACHE_PRELOAD_SIZE    0x0000FFFF
+#define EXTMEM_DCACHE_PRELOAD_SIZE_M  ((EXTMEM_DCACHE_PRELOAD_SIZE_V)<<(EXTMEM_DCACHE_PRELOAD_SIZE_S))
+#define EXTMEM_DCACHE_PRELOAD_SIZE_V  0xFFFF
+#define EXTMEM_DCACHE_PRELOAD_SIZE_S  0
+
+#define EXTMEM_DCACHE_AUTOLOAD_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x4C)
+/* EXTMEM_DCACHE_AUTOLOAD_BUFFER_CLEAR : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The bit is used to clear autoload buffer in dcache..*/
+#define EXTMEM_DCACHE_AUTOLOAD_BUFFER_CLEAR    (BIT(9))
+#define EXTMEM_DCACHE_AUTOLOAD_BUFFER_CLEAR_M  (BIT(9))
+#define EXTMEM_DCACHE_AUTOLOAD_BUFFER_CLEAR_V  0x1
+#define EXTMEM_DCACHE_AUTOLOAD_BUFFER_CLEAR_S  9
+/* EXTMEM_DCACHE_AUTOLOAD_SIZE : R/W ;bitpos:[8:7] ;default: 2'h0 ; */
+/*description: The bits are used to configure the numbers of the cache block for the issuing au
+toload operation..*/
+#define EXTMEM_DCACHE_AUTOLOAD_SIZE    0x00000003
+#define EXTMEM_DCACHE_AUTOLOAD_SIZE_M  ((EXTMEM_DCACHE_AUTOLOAD_SIZE_V)<<(EXTMEM_DCACHE_AUTOLOAD_SIZE_S))
+#define EXTMEM_DCACHE_AUTOLOAD_SIZE_V  0x3
+#define EXTMEM_DCACHE_AUTOLOAD_SIZE_S  7
+/* EXTMEM_DCACHE_AUTOLOAD_RQST : R/W ;bitpos:[6:5] ;default: 2'b0 ; */
+/*description: The bits are used to configure trigger conditions for autoload. 0/3: cache miss,
+ 1: cache hit, 2: both cache miss and hit..*/
+#define EXTMEM_DCACHE_AUTOLOAD_RQST    0x00000003
+#define EXTMEM_DCACHE_AUTOLOAD_RQST_M  ((EXTMEM_DCACHE_AUTOLOAD_RQST_V)<<(EXTMEM_DCACHE_AUTOLOAD_RQST_S))
+#define EXTMEM_DCACHE_AUTOLOAD_RQST_V  0x3
+#define EXTMEM_DCACHE_AUTOLOAD_RQST_S  5
+/* EXTMEM_DCACHE_AUTOLOAD_ORDER : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bits are used to configure the direction of autoload. 1: descending, 0: asce
+nding..*/
+#define EXTMEM_DCACHE_AUTOLOAD_ORDER    (BIT(4))
+#define EXTMEM_DCACHE_AUTOLOAD_ORDER_M  (BIT(4))
+#define EXTMEM_DCACHE_AUTOLOAD_ORDER_V  0x1
+#define EXTMEM_DCACHE_AUTOLOAD_ORDER_S  4
+/* EXTMEM_DCACHE_AUTOLOAD_DONE : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: The bit is used to indicate autoload operation is finished..*/
+#define EXTMEM_DCACHE_AUTOLOAD_DONE    (BIT(3))
+#define EXTMEM_DCACHE_AUTOLOAD_DONE_M  (BIT(3))
+#define EXTMEM_DCACHE_AUTOLOAD_DONE_V  0x1
+#define EXTMEM_DCACHE_AUTOLOAD_DONE_S  3
+/* EXTMEM_DCACHE_AUTOLOAD_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to enable and disable autoload operation. It is combined with dc
+ache_autoload_done. 1: enable, 0: disable. .*/
+#define EXTMEM_DCACHE_AUTOLOAD_ENA    (BIT(2))
+#define EXTMEM_DCACHE_AUTOLOAD_ENA_M  (BIT(2))
+#define EXTMEM_DCACHE_AUTOLOAD_ENA_V  0x1
+#define EXTMEM_DCACHE_AUTOLOAD_ENA_S  2
+/* EXTMEM_DCACHE_AUTOLOAD_SCT1_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bits are used to enable the second section for autoload operation..*/
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_ENA    (BIT(1))
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_ENA_M  (BIT(1))
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_ENA_V  0x1
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_ENA_S  1
+/* EXTMEM_DCACHE_AUTOLOAD_SCT0_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bits are used to enable the first section for autoload operation..*/
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_ENA    (BIT(0))
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_ENA_M  (BIT(0))
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_ENA_V  0x1
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_ENA_S  0
+
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x50)
+/* EXTMEM_DCACHE_AUTOLOAD_SCT0_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address of the first section fo
+r autoload operation. It should be combined with dcache_autoload_sct0_ena..*/
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_ADDR    0xFFFFFFFF
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_ADDR_M  ((EXTMEM_DCACHE_AUTOLOAD_SCT0_ADDR_V)<<(EXTMEM_DCACHE_AUTOLOAD_SCT0_ADDR_S))
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_ADDR_V  0xFFFFFFFF
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_ADDR_S  0
+
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_SIZE_REG          (DR_REG_EXTMEM_BASE + 0x54)
+/* EXTMEM_DCACHE_AUTOLOAD_SCT0_SIZE : R/W ;bitpos:[26:0] ;default: 27'h0 ; */
+/*description: The bits are used to configure the length of the first section for autoload oper
+ation. It should be combined with dcache_autoload_sct0_ena..*/
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_SIZE    0x07FFFFFF
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_SIZE_M  ((EXTMEM_DCACHE_AUTOLOAD_SCT0_SIZE_V)<<(EXTMEM_DCACHE_AUTOLOAD_SCT0_SIZE_S))
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_SIZE_V  0x7FFFFFF
+#define EXTMEM_DCACHE_AUTOLOAD_SCT0_SIZE_S  0
+
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x58)
+/* EXTMEM_DCACHE_AUTOLOAD_SCT1_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address of the second section f
+or autoload operation. It should be combined with dcache_autoload_sct1_ena..*/
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_ADDR    0xFFFFFFFF
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_ADDR_M  ((EXTMEM_DCACHE_AUTOLOAD_SCT1_ADDR_V)<<(EXTMEM_DCACHE_AUTOLOAD_SCT1_ADDR_S))
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_ADDR_V  0xFFFFFFFF
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_ADDR_S  0
+
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_SIZE_REG          (DR_REG_EXTMEM_BASE + 0x5C)
+/* EXTMEM_DCACHE_AUTOLOAD_SCT1_SIZE : R/W ;bitpos:[26:0] ;default: 27'h0 ; */
+/*description: The bits are used to configure the length of the second section for autoload ope
+ration. It should be combined with dcache_autoload_sct1_ena..*/
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_SIZE    0x07FFFFFF
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_SIZE_M  ((EXTMEM_DCACHE_AUTOLOAD_SCT1_SIZE_V)<<(EXTMEM_DCACHE_AUTOLOAD_SCT1_SIZE_S))
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_SIZE_V  0x7FFFFFF
+#define EXTMEM_DCACHE_AUTOLOAD_SCT1_SIZE_S  0
+
+#define EXTMEM_ICACHE_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x60)
+/* EXTMEM_ICACHE_BLOCKSIZE_MODE : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to configure cache block size.0: 16 bytes, 1: 32 bytes.*/
+#define EXTMEM_ICACHE_BLOCKSIZE_MODE    (BIT(3))
+#define EXTMEM_ICACHE_BLOCKSIZE_MODE_M  (BIT(3))
+#define EXTMEM_ICACHE_BLOCKSIZE_MODE_V  0x1
+#define EXTMEM_ICACHE_BLOCKSIZE_MODE_S  3
+/* EXTMEM_ICACHE_SIZE_MODE : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to configure cache memory size.0: 16KB, 1: 32KB.*/
+#define EXTMEM_ICACHE_SIZE_MODE    (BIT(2))
+#define EXTMEM_ICACHE_SIZE_MODE_M  (BIT(2))
+#define EXTMEM_ICACHE_SIZE_MODE_V  0x1
+#define EXTMEM_ICACHE_SIZE_MODE_S  2
+/* EXTMEM_ICACHE_WAY_MODE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to configure cache way mode.0: 4-way, 1: 8-way.*/
+#define EXTMEM_ICACHE_WAY_MODE    (BIT(1))
+#define EXTMEM_ICACHE_WAY_MODE_M  (BIT(1))
+#define EXTMEM_ICACHE_WAY_MODE_V  0x1
+#define EXTMEM_ICACHE_WAY_MODE_S  1
+/* EXTMEM_ICACHE_ENABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to activate the data cache. 0: disable, 1: enable.*/
+#define EXTMEM_ICACHE_ENABLE    (BIT(0))
+#define EXTMEM_ICACHE_ENABLE_M  (BIT(0))
+#define EXTMEM_ICACHE_ENABLE_V  0x1
+#define EXTMEM_ICACHE_ENABLE_S  0
+
+#define EXTMEM_ICACHE_CTRL1_REG          (DR_REG_EXTMEM_BASE + 0x64)
+/* EXTMEM_ICACHE_SHUT_CORE1_BUS : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: The bit is used to disable core1 ibus, 0: enable, 1: disable.*/
+#define EXTMEM_ICACHE_SHUT_CORE1_BUS    (BIT(1))
+#define EXTMEM_ICACHE_SHUT_CORE1_BUS_M  (BIT(1))
+#define EXTMEM_ICACHE_SHUT_CORE1_BUS_V  0x1
+#define EXTMEM_ICACHE_SHUT_CORE1_BUS_S  1
+/* EXTMEM_ICACHE_SHUT_CORE0_BUS : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: The bit is used to disable core0 ibus, 0: enable, 1: disable.*/
+#define EXTMEM_ICACHE_SHUT_CORE0_BUS    (BIT(0))
+#define EXTMEM_ICACHE_SHUT_CORE0_BUS_M  (BIT(0))
+#define EXTMEM_ICACHE_SHUT_CORE0_BUS_V  0x1
+#define EXTMEM_ICACHE_SHUT_CORE0_BUS_S  0
+
+#define EXTMEM_ICACHE_TAG_POWER_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x68)
+/* EXTMEM_ICACHE_TAG_MEM_FORCE_PU : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: The bit is used to power  icache tag memory up, 0: follow rtc_lslp, 1: power up.*/
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_PU    (BIT(2))
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_PU_M  (BIT(2))
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_PU_V  0x1
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_PU_S  2
+/* EXTMEM_ICACHE_TAG_MEM_FORCE_PD : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to power  icache tag memory down, 0: follow rtc_lslp, 1: power d
+own.*/
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_PD    (BIT(1))
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_PD_M  (BIT(1))
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_PD_V  0x1
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_PD_S  1
+/* EXTMEM_ICACHE_TAG_MEM_FORCE_ON : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: The bit is used to close clock gating of  icache tag memory. 1: close gating, 0:
+ open clock gating..*/
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_ON    (BIT(0))
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_ON_M  (BIT(0))
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_ON_V  0x1
+#define EXTMEM_ICACHE_TAG_MEM_FORCE_ON_S  0
+
+#define EXTMEM_ICACHE_PRELOCK_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x6C)
+/* EXTMEM_ICACHE_PRELOCK_SCT1_EN : R/W ;bitpos:[1] ;default: 1'h0 ; */
+/*description: The bit is used to enable the second section of prelock function..*/
+#define EXTMEM_ICACHE_PRELOCK_SCT1_EN    (BIT(1))
+#define EXTMEM_ICACHE_PRELOCK_SCT1_EN_M  (BIT(1))
+#define EXTMEM_ICACHE_PRELOCK_SCT1_EN_V  0x1
+#define EXTMEM_ICACHE_PRELOCK_SCT1_EN_S  1
+/* EXTMEM_ICACHE_PRELOCK_SCT0_EN : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: The bit is used to enable the first section of prelock function..*/
+#define EXTMEM_ICACHE_PRELOCK_SCT0_EN    (BIT(0))
+#define EXTMEM_ICACHE_PRELOCK_SCT0_EN_M  (BIT(0))
+#define EXTMEM_ICACHE_PRELOCK_SCT0_EN_V  0x1
+#define EXTMEM_ICACHE_PRELOCK_SCT0_EN_S  0
+
+#define EXTMEM_ICACHE_PRELOCK_SCT0_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x70)
+/* EXTMEM_ICACHE_PRELOCK_SCT0_ADDR : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The bits are used to configure the first start virtual address of data prelock,
+which is combined with ICACHE_PRELOCK_SCT0_SIZE_REG.*/
+#define EXTMEM_ICACHE_PRELOCK_SCT0_ADDR    0xFFFFFFFF
+#define EXTMEM_ICACHE_PRELOCK_SCT0_ADDR_M  ((EXTMEM_ICACHE_PRELOCK_SCT0_ADDR_V)<<(EXTMEM_ICACHE_PRELOCK_SCT0_ADDR_S))
+#define EXTMEM_ICACHE_PRELOCK_SCT0_ADDR_V  0xFFFFFFFF
+#define EXTMEM_ICACHE_PRELOCK_SCT0_ADDR_S  0
+
+#define EXTMEM_ICACHE_PRELOCK_SCT1_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x74)
+/* EXTMEM_ICACHE_PRELOCK_SCT1_ADDR : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The bits are used to configure the second start virtual address of data prelock,
+ which is combined with ICACHE_PRELOCK_SCT1_SIZE_REG.*/
+#define EXTMEM_ICACHE_PRELOCK_SCT1_ADDR    0xFFFFFFFF
+#define EXTMEM_ICACHE_PRELOCK_SCT1_ADDR_M  ((EXTMEM_ICACHE_PRELOCK_SCT1_ADDR_V)<<(EXTMEM_ICACHE_PRELOCK_SCT1_ADDR_S))
+#define EXTMEM_ICACHE_PRELOCK_SCT1_ADDR_V  0xFFFFFFFF
+#define EXTMEM_ICACHE_PRELOCK_SCT1_ADDR_S  0
+
+#define EXTMEM_ICACHE_PRELOCK_SCT_SIZE_REG          (DR_REG_EXTMEM_BASE + 0x78)
+/* EXTMEM_ICACHE_PRELOCK_SCT0_SIZE : R/W ;bitpos:[31:16] ;default: 16'h0 ; */
+/*description: The bits are used to configure the first length of data locking, which is combin
+ed with ICACHE_PRELOCK_SCT0_ADDR_REG.*/
+#define EXTMEM_ICACHE_PRELOCK_SCT0_SIZE    0x0000FFFF
+#define EXTMEM_ICACHE_PRELOCK_SCT0_SIZE_M  ((EXTMEM_ICACHE_PRELOCK_SCT0_SIZE_V)<<(EXTMEM_ICACHE_PRELOCK_SCT0_SIZE_S))
+#define EXTMEM_ICACHE_PRELOCK_SCT0_SIZE_V  0xFFFF
+#define EXTMEM_ICACHE_PRELOCK_SCT0_SIZE_S  16
+/* EXTMEM_ICACHE_PRELOCK_SCT1_SIZE : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: The bits are used to configure the second length of data locking, which is combi
+ned with ICACHE_PRELOCK_SCT1_ADDR_REG.*/
+#define EXTMEM_ICACHE_PRELOCK_SCT1_SIZE    0x0000FFFF
+#define EXTMEM_ICACHE_PRELOCK_SCT1_SIZE_M  ((EXTMEM_ICACHE_PRELOCK_SCT1_SIZE_V)<<(EXTMEM_ICACHE_PRELOCK_SCT1_SIZE_S))
+#define EXTMEM_ICACHE_PRELOCK_SCT1_SIZE_V  0xFFFF
+#define EXTMEM_ICACHE_PRELOCK_SCT1_SIZE_S  0
+
+#define EXTMEM_ICACHE_LOCK_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x7C)
+/* EXTMEM_ICACHE_LOCK_DONE : RO ;bitpos:[2] ;default: 1'b1 ; */
+/*description: The bit is used to indicate unlock/lock operation is finished..*/
+#define EXTMEM_ICACHE_LOCK_DONE    (BIT(2))
+#define EXTMEM_ICACHE_LOCK_DONE_M  (BIT(2))
+#define EXTMEM_ICACHE_LOCK_DONE_V  0x1
+#define EXTMEM_ICACHE_LOCK_DONE_S  2
+/* EXTMEM_ICACHE_UNLOCK_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to enable unlock operation. It will be cleared by hardware after
+ unlock operation done..*/
+#define EXTMEM_ICACHE_UNLOCK_ENA    (BIT(1))
+#define EXTMEM_ICACHE_UNLOCK_ENA_M  (BIT(1))
+#define EXTMEM_ICACHE_UNLOCK_ENA_V  0x1
+#define EXTMEM_ICACHE_UNLOCK_ENA_S  1
+/* EXTMEM_ICACHE_LOCK_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to enable lock operation. It will be cleared by hardware after l
+ock operation done..*/
+#define EXTMEM_ICACHE_LOCK_ENA    (BIT(0))
+#define EXTMEM_ICACHE_LOCK_ENA_M  (BIT(0))
+#define EXTMEM_ICACHE_LOCK_ENA_V  0x1
+#define EXTMEM_ICACHE_LOCK_ENA_S  0
+
+#define EXTMEM_ICACHE_LOCK_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x80)
+/* EXTMEM_ICACHE_LOCK_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address for lock operations. It
+ should be combined with ICACHE_LOCK_SIZE_REG..*/
+#define EXTMEM_ICACHE_LOCK_ADDR    0xFFFFFFFF
+#define EXTMEM_ICACHE_LOCK_ADDR_M  ((EXTMEM_ICACHE_LOCK_ADDR_V)<<(EXTMEM_ICACHE_LOCK_ADDR_S))
+#define EXTMEM_ICACHE_LOCK_ADDR_V  0xFFFFFFFF
+#define EXTMEM_ICACHE_LOCK_ADDR_S  0
+
+#define EXTMEM_ICACHE_LOCK_SIZE_REG          (DR_REG_EXTMEM_BASE + 0x84)
+/* EXTMEM_ICACHE_LOCK_SIZE : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: The bits are used to configure the length for lock operations. The bits are the
+counts of cache block. It should be combined with ICACHE_LOCK_ADDR_REG..*/
+#define EXTMEM_ICACHE_LOCK_SIZE    0x0000FFFF
+#define EXTMEM_ICACHE_LOCK_SIZE_M  ((EXTMEM_ICACHE_LOCK_SIZE_V)<<(EXTMEM_ICACHE_LOCK_SIZE_S))
+#define EXTMEM_ICACHE_LOCK_SIZE_V  0xFFFF
+#define EXTMEM_ICACHE_LOCK_SIZE_S  0
+
+#define EXTMEM_ICACHE_SYNC_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x88)
+/* EXTMEM_ICACHE_SYNC_DONE : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to indicate invalidate operation is finished..*/
+#define EXTMEM_ICACHE_SYNC_DONE    (BIT(1))
+#define EXTMEM_ICACHE_SYNC_DONE_M  (BIT(1))
+#define EXTMEM_ICACHE_SYNC_DONE_V  0x1
+#define EXTMEM_ICACHE_SYNC_DONE_S  1
+/* EXTMEM_ICACHE_INVALIDATE_ENA : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: The bit is used to enable invalidate operation. It will be cleared by hardware a
+fter invalidate operation done..*/
+#define EXTMEM_ICACHE_INVALIDATE_ENA    (BIT(0))
+#define EXTMEM_ICACHE_INVALIDATE_ENA_M  (BIT(0))
+#define EXTMEM_ICACHE_INVALIDATE_ENA_V  0x1
+#define EXTMEM_ICACHE_INVALIDATE_ENA_S  0
+
+#define EXTMEM_ICACHE_SYNC_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x8C)
+/* EXTMEM_ICACHE_SYNC_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address for clean operations. I
+t should be combined with ICACHE_SYNC_SIZE_REG..*/
+#define EXTMEM_ICACHE_SYNC_ADDR    0xFFFFFFFF
+#define EXTMEM_ICACHE_SYNC_ADDR_M  ((EXTMEM_ICACHE_SYNC_ADDR_V)<<(EXTMEM_ICACHE_SYNC_ADDR_S))
+#define EXTMEM_ICACHE_SYNC_ADDR_V  0xFFFFFFFF
+#define EXTMEM_ICACHE_SYNC_ADDR_S  0
+
+#define EXTMEM_ICACHE_SYNC_SIZE_REG          (DR_REG_EXTMEM_BASE + 0x90)
+/* EXTMEM_ICACHE_SYNC_SIZE : R/W ;bitpos:[22:0] ;default: 23'h0 ; */
+/*description: The bits are used to configure the length for sync operations. The bits are the
+counts of cache block. It should be combined with ICACHE_SYNC_ADDR_REG..*/
+#define EXTMEM_ICACHE_SYNC_SIZE    0x007FFFFF
+#define EXTMEM_ICACHE_SYNC_SIZE_M  ((EXTMEM_ICACHE_SYNC_SIZE_V)<<(EXTMEM_ICACHE_SYNC_SIZE_S))
+#define EXTMEM_ICACHE_SYNC_SIZE_V  0x7FFFFF
+#define EXTMEM_ICACHE_SYNC_SIZE_S  0
+
+#define EXTMEM_ICACHE_PRELOAD_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x94)
+/* EXTMEM_ICACHE_PRELOAD_ORDER : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to configure the direction of preload operation. 1: descending,
+0: ascending..*/
+#define EXTMEM_ICACHE_PRELOAD_ORDER    (BIT(2))
+#define EXTMEM_ICACHE_PRELOAD_ORDER_M  (BIT(2))
+#define EXTMEM_ICACHE_PRELOAD_ORDER_V  0x1
+#define EXTMEM_ICACHE_PRELOAD_ORDER_S  2
+/* EXTMEM_ICACHE_PRELOAD_DONE : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: The bit is used to indicate preload operation is finished..*/
+#define EXTMEM_ICACHE_PRELOAD_DONE    (BIT(1))
+#define EXTMEM_ICACHE_PRELOAD_DONE_M  (BIT(1))
+#define EXTMEM_ICACHE_PRELOAD_DONE_V  0x1
+#define EXTMEM_ICACHE_PRELOAD_DONE_S  1
+/* EXTMEM_ICACHE_PRELOAD_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to enable preload operation. It will be cleared by hardware afte
+r preload operation done..*/
+#define EXTMEM_ICACHE_PRELOAD_ENA    (BIT(0))
+#define EXTMEM_ICACHE_PRELOAD_ENA_M  (BIT(0))
+#define EXTMEM_ICACHE_PRELOAD_ENA_V  0x1
+#define EXTMEM_ICACHE_PRELOAD_ENA_S  0
+
+#define EXTMEM_ICACHE_PRELOAD_ADDR_REG          (DR_REG_EXTMEM_BASE + 0x98)
+/* EXTMEM_ICACHE_PRELOAD_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address for preload operation.
+It should be combined with ICACHE_PRELOAD_SIZE_REG..*/
+#define EXTMEM_ICACHE_PRELOAD_ADDR    0xFFFFFFFF
+#define EXTMEM_ICACHE_PRELOAD_ADDR_M  ((EXTMEM_ICACHE_PRELOAD_ADDR_V)<<(EXTMEM_ICACHE_PRELOAD_ADDR_S))
+#define EXTMEM_ICACHE_PRELOAD_ADDR_V  0xFFFFFFFF
+#define EXTMEM_ICACHE_PRELOAD_ADDR_S  0
+
+#define EXTMEM_ICACHE_PRELOAD_SIZE_REG          (DR_REG_EXTMEM_BASE + 0x9C)
+/* EXTMEM_ICACHE_PRELOAD_SIZE : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: The bits are used to configure the length for preload operation. The bits are th
+e counts of cache block. It should be combined with ICACHE_PRELOAD_ADDR_REG...*/
+#define EXTMEM_ICACHE_PRELOAD_SIZE    0x0000FFFF
+#define EXTMEM_ICACHE_PRELOAD_SIZE_M  ((EXTMEM_ICACHE_PRELOAD_SIZE_V)<<(EXTMEM_ICACHE_PRELOAD_SIZE_S))
+#define EXTMEM_ICACHE_PRELOAD_SIZE_V  0xFFFF
+#define EXTMEM_ICACHE_PRELOAD_SIZE_S  0
+
+#define EXTMEM_ICACHE_AUTOLOAD_CTRL_REG          (DR_REG_EXTMEM_BASE + 0xA0)
+/* EXTMEM_ICACHE_AUTOLOAD_BUFFER_CLEAR : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The bit is used to clear autoload buffer in icache..*/
+#define EXTMEM_ICACHE_AUTOLOAD_BUFFER_CLEAR    (BIT(9))
+#define EXTMEM_ICACHE_AUTOLOAD_BUFFER_CLEAR_M  (BIT(9))
+#define EXTMEM_ICACHE_AUTOLOAD_BUFFER_CLEAR_V  0x1
+#define EXTMEM_ICACHE_AUTOLOAD_BUFFER_CLEAR_S  9
+/* EXTMEM_ICACHE_AUTOLOAD_SIZE : R/W ;bitpos:[8:7] ;default: 2'h0 ; */
+/*description: The bits are used to configure the numbers of the cache block for the issuing au
+toload operation..*/
+#define EXTMEM_ICACHE_AUTOLOAD_SIZE    0x00000003
+#define EXTMEM_ICACHE_AUTOLOAD_SIZE_M  ((EXTMEM_ICACHE_AUTOLOAD_SIZE_V)<<(EXTMEM_ICACHE_AUTOLOAD_SIZE_S))
+#define EXTMEM_ICACHE_AUTOLOAD_SIZE_V  0x3
+#define EXTMEM_ICACHE_AUTOLOAD_SIZE_S  7
+/* EXTMEM_ICACHE_AUTOLOAD_RQST : R/W ;bitpos:[6:5] ;default: 2'b0 ; */
+/*description: The bits are used to configure trigger conditions for autoload. 0/3: cache miss,
+ 1: cache hit, 2: both cache miss and hit..*/
+#define EXTMEM_ICACHE_AUTOLOAD_RQST    0x00000003
+#define EXTMEM_ICACHE_AUTOLOAD_RQST_M  ((EXTMEM_ICACHE_AUTOLOAD_RQST_V)<<(EXTMEM_ICACHE_AUTOLOAD_RQST_S))
+#define EXTMEM_ICACHE_AUTOLOAD_RQST_V  0x3
+#define EXTMEM_ICACHE_AUTOLOAD_RQST_S  5
+/* EXTMEM_ICACHE_AUTOLOAD_ORDER : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bits are used to configure the direction of autoload. 1: descending, 0: asce
+nding..*/
+#define EXTMEM_ICACHE_AUTOLOAD_ORDER    (BIT(4))
+#define EXTMEM_ICACHE_AUTOLOAD_ORDER_M  (BIT(4))
+#define EXTMEM_ICACHE_AUTOLOAD_ORDER_V  0x1
+#define EXTMEM_ICACHE_AUTOLOAD_ORDER_S  4
+/* EXTMEM_ICACHE_AUTOLOAD_DONE : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: The bit is used to indicate autoload operation is finished..*/
+#define EXTMEM_ICACHE_AUTOLOAD_DONE    (BIT(3))
+#define EXTMEM_ICACHE_AUTOLOAD_DONE_M  (BIT(3))
+#define EXTMEM_ICACHE_AUTOLOAD_DONE_V  0x1
+#define EXTMEM_ICACHE_AUTOLOAD_DONE_S  3
+/* EXTMEM_ICACHE_AUTOLOAD_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to enable and disable autoload operation. It is combined with ic
+ache_autoload_done. 1: enable, 0: disable. .*/
+#define EXTMEM_ICACHE_AUTOLOAD_ENA    (BIT(2))
+#define EXTMEM_ICACHE_AUTOLOAD_ENA_M  (BIT(2))
+#define EXTMEM_ICACHE_AUTOLOAD_ENA_V  0x1
+#define EXTMEM_ICACHE_AUTOLOAD_ENA_S  2
+/* EXTMEM_ICACHE_AUTOLOAD_SCT1_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bits are used to enable the second section for autoload operation..*/
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_ENA    (BIT(1))
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_ENA_M  (BIT(1))
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_ENA_V  0x1
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_ENA_S  1
+/* EXTMEM_ICACHE_AUTOLOAD_SCT0_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bits are used to enable the first section for autoload operation..*/
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_ENA    (BIT(0))
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_ENA_M  (BIT(0))
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_ENA_V  0x1
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_ENA_S  0
+
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_ADDR_REG          (DR_REG_EXTMEM_BASE + 0xA4)
+/* EXTMEM_ICACHE_AUTOLOAD_SCT0_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address of the first section fo
+r autoload operation. It should be combined with icache_autoload_sct0_ena..*/
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_ADDR    0xFFFFFFFF
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_ADDR_M  ((EXTMEM_ICACHE_AUTOLOAD_SCT0_ADDR_V)<<(EXTMEM_ICACHE_AUTOLOAD_SCT0_ADDR_S))
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_ADDR_V  0xFFFFFFFF
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_ADDR_S  0
+
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_SIZE_REG          (DR_REG_EXTMEM_BASE + 0xA8)
+/* EXTMEM_ICACHE_AUTOLOAD_SCT0_SIZE : R/W ;bitpos:[26:0] ;default: 27'h0 ; */
+/*description: The bits are used to configure the length of the first section for autoload oper
+ation. It should be combined with icache_autoload_sct0_ena..*/
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_SIZE    0x07FFFFFF
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_SIZE_M  ((EXTMEM_ICACHE_AUTOLOAD_SCT0_SIZE_V)<<(EXTMEM_ICACHE_AUTOLOAD_SCT0_SIZE_S))
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_SIZE_V  0x7FFFFFF
+#define EXTMEM_ICACHE_AUTOLOAD_SCT0_SIZE_S  0
+
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_ADDR_REG          (DR_REG_EXTMEM_BASE + 0xAC)
+/* EXTMEM_ICACHE_AUTOLOAD_SCT1_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address of the second section f
+or autoload operation. It should be combined with icache_autoload_sct1_ena..*/
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_ADDR    0xFFFFFFFF
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_ADDR_M  ((EXTMEM_ICACHE_AUTOLOAD_SCT1_ADDR_V)<<(EXTMEM_ICACHE_AUTOLOAD_SCT1_ADDR_S))
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_ADDR_V  0xFFFFFFFF
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_ADDR_S  0
+
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_SIZE_REG          (DR_REG_EXTMEM_BASE + 0xB0)
+/* EXTMEM_ICACHE_AUTOLOAD_SCT1_SIZE : R/W ;bitpos:[26:0] ;default: 27'h0 ; */
+/*description: The bits are used to configure the length of the second section for autoload ope
+ration. It should be combined with icache_autoload_sct1_ena..*/
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_SIZE    0x07FFFFFF
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_SIZE_M  ((EXTMEM_ICACHE_AUTOLOAD_SCT1_SIZE_V)<<(EXTMEM_ICACHE_AUTOLOAD_SCT1_SIZE_S))
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_SIZE_V  0x7FFFFFF
+#define EXTMEM_ICACHE_AUTOLOAD_SCT1_SIZE_S  0
+
+#define EXTMEM_IBUS_TO_FLASH_START_VADDR_REG          (DR_REG_EXTMEM_BASE + 0xB4)
+/* EXTMEM_IBUS_TO_FLASH_START_VADDR : R/W ;bitpos:[31:0] ;default: 32'h44000000 ; */
+/*description: The bits are used to configure the start virtual address of ibus to access flash
+. The register is used to give constraints to ibus access counter..*/
+#define EXTMEM_IBUS_TO_FLASH_START_VADDR    0xFFFFFFFF
+#define EXTMEM_IBUS_TO_FLASH_START_VADDR_M  ((EXTMEM_IBUS_TO_FLASH_START_VADDR_V)<<(EXTMEM_IBUS_TO_FLASH_START_VADDR_S))
+#define EXTMEM_IBUS_TO_FLASH_START_VADDR_V  0xFFFFFFFF
+#define EXTMEM_IBUS_TO_FLASH_START_VADDR_S  0
+
+#define EXTMEM_IBUS_TO_FLASH_END_VADDR_REG          (DR_REG_EXTMEM_BASE + 0xB8)
+/* EXTMEM_IBUS_TO_FLASH_END_VADDR : R/W ;bitpos:[31:0] ;default: 32'h47ffffff ; */
+/*description: The bits are used to configure the end virtual address of ibus to access flash.
+The register is used to give constraints to ibus access counter..*/
+#define EXTMEM_IBUS_TO_FLASH_END_VADDR    0xFFFFFFFF
+#define EXTMEM_IBUS_TO_FLASH_END_VADDR_M  ((EXTMEM_IBUS_TO_FLASH_END_VADDR_V)<<(EXTMEM_IBUS_TO_FLASH_END_VADDR_S))
+#define EXTMEM_IBUS_TO_FLASH_END_VADDR_V  0xFFFFFFFF
+#define EXTMEM_IBUS_TO_FLASH_END_VADDR_S  0
+
+#define EXTMEM_DBUS_TO_FLASH_START_VADDR_REG          (DR_REG_EXTMEM_BASE + 0xBC)
+/* EXTMEM_DBUS_TO_FLASH_START_VADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the start virtual address of dbus to access flash
+. The register is used to give constraints to dbus access counter..*/
+#define EXTMEM_DBUS_TO_FLASH_START_VADDR    0xFFFFFFFF
+#define EXTMEM_DBUS_TO_FLASH_START_VADDR_M  ((EXTMEM_DBUS_TO_FLASH_START_VADDR_V)<<(EXTMEM_DBUS_TO_FLASH_START_VADDR_S))
+#define EXTMEM_DBUS_TO_FLASH_START_VADDR_V  0xFFFFFFFF
+#define EXTMEM_DBUS_TO_FLASH_START_VADDR_S  0
+
+#define EXTMEM_DBUS_TO_FLASH_END_VADDR_REG          (DR_REG_EXTMEM_BASE + 0xC0)
+/* EXTMEM_DBUS_TO_FLASH_END_VADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The bits are used to configure the end virtual address of dbus to access flash.
+The register is used to give constraints to dbus access counter..*/
+#define EXTMEM_DBUS_TO_FLASH_END_VADDR    0xFFFFFFFF
+#define EXTMEM_DBUS_TO_FLASH_END_VADDR_M  ((EXTMEM_DBUS_TO_FLASH_END_VADDR_V)<<(EXTMEM_DBUS_TO_FLASH_END_VADDR_S))
+#define EXTMEM_DBUS_TO_FLASH_END_VADDR_V  0xFFFFFFFF
+#define EXTMEM_DBUS_TO_FLASH_END_VADDR_S  0
+
+#define EXTMEM_CACHE_ACS_CNT_CLR_REG          (DR_REG_EXTMEM_BASE + 0xC4)
+/* EXTMEM_ICACHE_ACS_CNT_CLR : WOD ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to clear icache counter..*/
+#define EXTMEM_ICACHE_ACS_CNT_CLR    (BIT(1))
+#define EXTMEM_ICACHE_ACS_CNT_CLR_M  (BIT(1))
+#define EXTMEM_ICACHE_ACS_CNT_CLR_V  0x1
+#define EXTMEM_ICACHE_ACS_CNT_CLR_S  1
+/* EXTMEM_DCACHE_ACS_CNT_CLR : WOD ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to clear dcache counter..*/
+#define EXTMEM_DCACHE_ACS_CNT_CLR    (BIT(0))
+#define EXTMEM_DCACHE_ACS_CNT_CLR_M  (BIT(0))
+#define EXTMEM_DCACHE_ACS_CNT_CLR_V  0x1
+#define EXTMEM_DCACHE_ACS_CNT_CLR_S  0
+
+#define EXTMEM_IBUS_ACS_MISS_CNT_REG          (DR_REG_EXTMEM_BASE + 0xC8)
+/* EXTMEM_IBUS_ACS_MISS_CNT : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The bits are used to count the number of the cache miss caused by ibus access fl
+ash/spiram..*/
+#define EXTMEM_IBUS_ACS_MISS_CNT    0xFFFFFFFF
+#define EXTMEM_IBUS_ACS_MISS_CNT_M  ((EXTMEM_IBUS_ACS_MISS_CNT_V)<<(EXTMEM_IBUS_ACS_MISS_CNT_S))
+#define EXTMEM_IBUS_ACS_MISS_CNT_V  0xFFFFFFFF
+#define EXTMEM_IBUS_ACS_MISS_CNT_S  0
+
+#define EXTMEM_IBUS_ACS_CNT_REG          (DR_REG_EXTMEM_BASE + 0xCC)
+/* EXTMEM_IBUS_ACS_CNT : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The bits are used to count the number of ibus access flash/spiram through icache
+..*/
+#define EXTMEM_IBUS_ACS_CNT    0xFFFFFFFF
+#define EXTMEM_IBUS_ACS_CNT_M  ((EXTMEM_IBUS_ACS_CNT_V)<<(EXTMEM_IBUS_ACS_CNT_S))
+#define EXTMEM_IBUS_ACS_CNT_V  0xFFFFFFFF
+#define EXTMEM_IBUS_ACS_CNT_S  0
+
+#define EXTMEM_DBUS_ACS_FLASH_MISS_CNT_REG          (DR_REG_EXTMEM_BASE + 0xD0)
+/* EXTMEM_DBUS_ACS_FLASH_MISS_CNT : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The bits are used to count the number of the cache miss caused by dbus access fl
+ash..*/
+#define EXTMEM_DBUS_ACS_FLASH_MISS_CNT    0xFFFFFFFF
+#define EXTMEM_DBUS_ACS_FLASH_MISS_CNT_M  ((EXTMEM_DBUS_ACS_FLASH_MISS_CNT_V)<<(EXTMEM_DBUS_ACS_FLASH_MISS_CNT_S))
+#define EXTMEM_DBUS_ACS_FLASH_MISS_CNT_V  0xFFFFFFFF
+#define EXTMEM_DBUS_ACS_FLASH_MISS_CNT_S  0
+
+#define EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT_REG          (DR_REG_EXTMEM_BASE + 0xD4)
+/* EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The bits are used to count the number of the cache miss caused by dbus access sp
+iram..*/
+#define EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT    0xFFFFFFFF
+#define EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT_M  ((EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT_V)<<(EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT_S))
+#define EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT_V  0xFFFFFFFF
+#define EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT_S  0
+
+#define EXTMEM_DBUS_ACS_CNT_REG          (DR_REG_EXTMEM_BASE + 0xD8)
+/* EXTMEM_DBUS_ACS_CNT : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The bits are used to count the number of dbus access flash/spiram through dcache
+..*/
+#define EXTMEM_DBUS_ACS_CNT    0xFFFFFFFF
+#define EXTMEM_DBUS_ACS_CNT_M  ((EXTMEM_DBUS_ACS_CNT_V)<<(EXTMEM_DBUS_ACS_CNT_S))
+#define EXTMEM_DBUS_ACS_CNT_V  0xFFFFFFFF
+#define EXTMEM_DBUS_ACS_CNT_S  0
+
+#define EXTMEM_CACHE_ILG_INT_ENA_REG          (DR_REG_EXTMEM_BASE + 0xDC)
+/* EXTMEM_DBUS_CNT_OVF_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by dbus counter overflow..*/
+#define EXTMEM_DBUS_CNT_OVF_INT_ENA    (BIT(8))
+#define EXTMEM_DBUS_CNT_OVF_INT_ENA_M  (BIT(8))
+#define EXTMEM_DBUS_CNT_OVF_INT_ENA_V  0x1
+#define EXTMEM_DBUS_CNT_OVF_INT_ENA_S  8
+/* EXTMEM_IBUS_CNT_OVF_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by ibus counter overflow..*/
+#define EXTMEM_IBUS_CNT_OVF_INT_ENA    (BIT(7))
+#define EXTMEM_IBUS_CNT_OVF_INT_ENA_M  (BIT(7))
+#define EXTMEM_IBUS_CNT_OVF_INT_ENA_V  0x1
+#define EXTMEM_IBUS_CNT_OVF_INT_ENA_S  7
+/* EXTMEM_DCACHE_OCCUPY_EXC_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by dcache trying to replace a line whose blo
+cks all have been occupied by occupy-mode..*/
+#define EXTMEM_DCACHE_OCCUPY_EXC_INT_ENA    (BIT(6))
+#define EXTMEM_DCACHE_OCCUPY_EXC_INT_ENA_M  (BIT(6))
+#define EXTMEM_DCACHE_OCCUPY_EXC_INT_ENA_V  0x1
+#define EXTMEM_DCACHE_OCCUPY_EXC_INT_ENA_S  6
+/* EXTMEM_MMU_ENTRY_FAULT_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by mmu entry fault..*/
+#define EXTMEM_MMU_ENTRY_FAULT_INT_ENA    (BIT(5))
+#define EXTMEM_MMU_ENTRY_FAULT_INT_ENA_M  (BIT(5))
+#define EXTMEM_MMU_ENTRY_FAULT_INT_ENA_V  0x1
+#define EXTMEM_MMU_ENTRY_FAULT_INT_ENA_S  5
+/* EXTMEM_DCACHE_WRITE_FLASH_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by dcache trying to write flash..*/
+#define EXTMEM_DCACHE_WRITE_FLASH_INT_ENA    (BIT(4))
+#define EXTMEM_DCACHE_WRITE_FLASH_INT_ENA_M  (BIT(4))
+#define EXTMEM_DCACHE_WRITE_FLASH_INT_ENA_V  0x1
+#define EXTMEM_DCACHE_WRITE_FLASH_INT_ENA_S  4
+/* EXTMEM_DCACHE_PRELOAD_OP_FAULT_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by preload configurations fault..*/
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_INT_ENA    (BIT(3))
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_INT_ENA_M  (BIT(3))
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_INT_ENA_V  0x1
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_INT_ENA_S  3
+/* EXTMEM_DCACHE_SYNC_OP_FAULT_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by sync configurations fault..*/
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_INT_ENA    (BIT(2))
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_INT_ENA_M  (BIT(2))
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_INT_ENA_V  0x1
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_INT_ENA_S  2
+/* EXTMEM_ICACHE_PRELOAD_OP_FAULT_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by preload configurations fault..*/
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_INT_ENA    (BIT(1))
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_INT_ENA_M  (BIT(1))
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_INT_ENA_V  0x1
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_INT_ENA_S  1
+/* EXTMEM_ICACHE_SYNC_OP_FAULT_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by sync configurations fault..*/
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_INT_ENA    (BIT(0))
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_INT_ENA_M  (BIT(0))
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_INT_ENA_V  0x1
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_INT_ENA_S  0
+
+#define EXTMEM_CACHE_ILG_INT_CLR_REG          (DR_REG_EXTMEM_BASE + 0xE0)
+/* EXTMEM_DBUS_CNT_OVF_INT_CLR : WOD ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by dbus counter overflow..*/
+#define EXTMEM_DBUS_CNT_OVF_INT_CLR    (BIT(8))
+#define EXTMEM_DBUS_CNT_OVF_INT_CLR_M  (BIT(8))
+#define EXTMEM_DBUS_CNT_OVF_INT_CLR_V  0x1
+#define EXTMEM_DBUS_CNT_OVF_INT_CLR_S  8
+/* EXTMEM_IBUS_CNT_OVF_INT_CLR : WOD ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by ibus counter overflow..*/
+#define EXTMEM_IBUS_CNT_OVF_INT_CLR    (BIT(7))
+#define EXTMEM_IBUS_CNT_OVF_INT_CLR_M  (BIT(7))
+#define EXTMEM_IBUS_CNT_OVF_INT_CLR_V  0x1
+#define EXTMEM_IBUS_CNT_OVF_INT_CLR_S  7
+/* EXTMEM_DCACHE_OCCUPY_EXC_INT_CLR : WOD ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by dcache trying to replace a line whose bloc
+ks all have been occupied by occupy-mode..*/
+#define EXTMEM_DCACHE_OCCUPY_EXC_INT_CLR    (BIT(6))
+#define EXTMEM_DCACHE_OCCUPY_EXC_INT_CLR_M  (BIT(6))
+#define EXTMEM_DCACHE_OCCUPY_EXC_INT_CLR_V  0x1
+#define EXTMEM_DCACHE_OCCUPY_EXC_INT_CLR_S  6
+/* EXTMEM_MMU_ENTRY_FAULT_INT_CLR : WOD ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by mmu entry fault..*/
+#define EXTMEM_MMU_ENTRY_FAULT_INT_CLR    (BIT(5))
+#define EXTMEM_MMU_ENTRY_FAULT_INT_CLR_M  (BIT(5))
+#define EXTMEM_MMU_ENTRY_FAULT_INT_CLR_V  0x1
+#define EXTMEM_MMU_ENTRY_FAULT_INT_CLR_S  5
+/* EXTMEM_DCACHE_WRITE_FLASH_INT_CLR : WOD ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by dcache trying to write flash..*/
+#define EXTMEM_DCACHE_WRITE_FLASH_INT_CLR    (BIT(4))
+#define EXTMEM_DCACHE_WRITE_FLASH_INT_CLR_M  (BIT(4))
+#define EXTMEM_DCACHE_WRITE_FLASH_INT_CLR_V  0x1
+#define EXTMEM_DCACHE_WRITE_FLASH_INT_CLR_S  4
+/* EXTMEM_DCACHE_PRELOAD_OP_FAULT_INT_CLR : WOD ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by preload configurations fault..*/
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_INT_CLR    (BIT(3))
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_INT_CLR_M  (BIT(3))
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_INT_CLR_V  0x1
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_INT_CLR_S  3
+/* EXTMEM_DCACHE_SYNC_OP_FAULT_INT_CLR : WOD ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by sync configurations fault..*/
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_INT_CLR    (BIT(2))
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_INT_CLR_M  (BIT(2))
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_INT_CLR_V  0x1
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_INT_CLR_S  2
+/* EXTMEM_ICACHE_PRELOAD_OP_FAULT_INT_CLR : WOD ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by preload configurations fault..*/
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_INT_CLR    (BIT(1))
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_INT_CLR_M  (BIT(1))
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_INT_CLR_V  0x1
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_INT_CLR_S  1
+/* EXTMEM_ICACHE_SYNC_OP_FAULT_INT_CLR : WOD ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by sync configurations fault..*/
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_INT_CLR    (BIT(0))
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_INT_CLR_M  (BIT(0))
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_INT_CLR_V  0x1
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_INT_CLR_S  0
+
+#define EXTMEM_CACHE_ILG_INT_ST_REG          (DR_REG_EXTMEM_BASE + 0xE4)
+/* EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT_OVF_ST : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by dbus access spiram miss counter overflo
+w..*/
+#define EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT_OVF_ST    (BIT(11))
+#define EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT_OVF_ST_M  (BIT(11))
+#define EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT_OVF_ST_V  0x1
+#define EXTMEM_DBUS_ACS_SPIRAM_MISS_CNT_OVF_ST_S  11
+/* EXTMEM_DBUS_ACS_FLASH_MISS_CNT_OVF_ST : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by dbus access flash miss counter overflow
+..*/
+#define EXTMEM_DBUS_ACS_FLASH_MISS_CNT_OVF_ST    (BIT(10))
+#define EXTMEM_DBUS_ACS_FLASH_MISS_CNT_OVF_ST_M  (BIT(10))
+#define EXTMEM_DBUS_ACS_FLASH_MISS_CNT_OVF_ST_V  0x1
+#define EXTMEM_DBUS_ACS_FLASH_MISS_CNT_OVF_ST_S  10
+/* EXTMEM_DBUS_ACS_CNT_OVF_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by dbus access flash/spiram counter overfl
+ow..*/
+#define EXTMEM_DBUS_ACS_CNT_OVF_ST    (BIT(9))
+#define EXTMEM_DBUS_ACS_CNT_OVF_ST_M  (BIT(9))
+#define EXTMEM_DBUS_ACS_CNT_OVF_ST_V  0x1
+#define EXTMEM_DBUS_ACS_CNT_OVF_ST_S  9
+/* EXTMEM_IBUS_ACS_MISS_CNT_OVF_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by ibus access flash/spiram miss counter o
+verflow..*/
+#define EXTMEM_IBUS_ACS_MISS_CNT_OVF_ST    (BIT(8))
+#define EXTMEM_IBUS_ACS_MISS_CNT_OVF_ST_M  (BIT(8))
+#define EXTMEM_IBUS_ACS_MISS_CNT_OVF_ST_V  0x1
+#define EXTMEM_IBUS_ACS_MISS_CNT_OVF_ST_S  8
+/* EXTMEM_IBUS_ACS_CNT_OVF_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by ibus access flash/spiram counter overfl
+ow..*/
+#define EXTMEM_IBUS_ACS_CNT_OVF_ST    (BIT(7))
+#define EXTMEM_IBUS_ACS_CNT_OVF_ST_M  (BIT(7))
+#define EXTMEM_IBUS_ACS_CNT_OVF_ST_V  0x1
+#define EXTMEM_IBUS_ACS_CNT_OVF_ST_S  7
+/* EXTMEM_DCACHE_OCCUPY_EXC_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by dcache trying to replace a line whose b
+locks all have been occupied by occupy-mode..*/
+#define EXTMEM_DCACHE_OCCUPY_EXC_ST    (BIT(6))
+#define EXTMEM_DCACHE_OCCUPY_EXC_ST_M  (BIT(6))
+#define EXTMEM_DCACHE_OCCUPY_EXC_ST_V  0x1
+#define EXTMEM_DCACHE_OCCUPY_EXC_ST_S  6
+/* EXTMEM_MMU_ENTRY_FAULT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by mmu entry fault..*/
+#define EXTMEM_MMU_ENTRY_FAULT_ST    (BIT(5))
+#define EXTMEM_MMU_ENTRY_FAULT_ST_M  (BIT(5))
+#define EXTMEM_MMU_ENTRY_FAULT_ST_V  0x1
+#define EXTMEM_MMU_ENTRY_FAULT_ST_S  5
+/* EXTMEM_DCACHE_WRITE_FLASH_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by dcache trying to write flash..*/
+#define EXTMEM_DCACHE_WRITE_FLASH_ST    (BIT(4))
+#define EXTMEM_DCACHE_WRITE_FLASH_ST_M  (BIT(4))
+#define EXTMEM_DCACHE_WRITE_FLASH_ST_V  0x1
+#define EXTMEM_DCACHE_WRITE_FLASH_ST_S  4
+/* EXTMEM_DCACHE_PRELOAD_OP_FAULT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by preload configurations fault..*/
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_ST    (BIT(3))
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_ST_M  (BIT(3))
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_ST_V  0x1
+#define EXTMEM_DCACHE_PRELOAD_OP_FAULT_ST_S  3
+/* EXTMEM_DCACHE_SYNC_OP_FAULT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by sync configurations fault..*/
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_ST    (BIT(2))
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_ST_M  (BIT(2))
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_ST_V  0x1
+#define EXTMEM_DCACHE_SYNC_OP_FAULT_ST_S  2
+/* EXTMEM_ICACHE_PRELOAD_OP_FAULT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by preload configurations fault..*/
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_ST    (BIT(1))
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_ST_M  (BIT(1))
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_ST_V  0x1
+#define EXTMEM_ICACHE_PRELOAD_OP_FAULT_ST_S  1
+/* EXTMEM_ICACHE_SYNC_OP_FAULT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by sync configurations fault..*/
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_ST    (BIT(0))
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_ST_M  (BIT(0))
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_ST_V  0x1
+#define EXTMEM_ICACHE_SYNC_OP_FAULT_ST_S  0
+
+#define EXTMEM_CORE0_ACS_CACHE_INT_ENA_REG          (DR_REG_EXTMEM_BASE + 0xE8)
+/* EXTMEM_CORE0_DBUS_REJECT_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by authentication fail..*/
+#define EXTMEM_CORE0_DBUS_REJECT_INT_ENA    (BIT(4))
+#define EXTMEM_CORE0_DBUS_REJECT_INT_ENA_M  (BIT(4))
+#define EXTMEM_CORE0_DBUS_REJECT_INT_ENA_V  0x1
+#define EXTMEM_CORE0_DBUS_REJECT_INT_ENA_S  4
+/* EXTMEM_CORE0_DBUS_ACS_MSK_DC_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by cpu access dcache while the corresponding
+ dbus is disabled which include speculative access..*/
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DC_INT_ENA    (BIT(3))
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DC_INT_ENA_M  (BIT(3))
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DC_INT_ENA_V  0x1
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DC_INT_ENA_S  3
+/* EXTMEM_CORE0_IBUS_REJECT_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by authentication fail..*/
+#define EXTMEM_CORE0_IBUS_REJECT_INT_ENA    (BIT(2))
+#define EXTMEM_CORE0_IBUS_REJECT_INT_ENA_M  (BIT(2))
+#define EXTMEM_CORE0_IBUS_REJECT_INT_ENA_V  0x1
+#define EXTMEM_CORE0_IBUS_REJECT_INT_ENA_S  2
+/* EXTMEM_CORE0_IBUS_WR_IC_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by ibus trying to write icache.*/
+#define EXTMEM_CORE0_IBUS_WR_IC_INT_ENA    (BIT(1))
+#define EXTMEM_CORE0_IBUS_WR_IC_INT_ENA_M  (BIT(1))
+#define EXTMEM_CORE0_IBUS_WR_IC_INT_ENA_V  0x1
+#define EXTMEM_CORE0_IBUS_WR_IC_INT_ENA_S  1
+/* EXTMEM_CORE0_IBUS_ACS_MSK_IC_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by cpu access icache while the corresponding
+ ibus is disabled which include speculative access..*/
+#define EXTMEM_CORE0_IBUS_ACS_MSK_IC_INT_ENA    (BIT(0))
+#define EXTMEM_CORE0_IBUS_ACS_MSK_IC_INT_ENA_M  (BIT(0))
+#define EXTMEM_CORE0_IBUS_ACS_MSK_IC_INT_ENA_V  0x1
+#define EXTMEM_CORE0_IBUS_ACS_MSK_IC_INT_ENA_S  0
+
+#define EXTMEM_CORE0_ACS_CACHE_INT_CLR_REG          (DR_REG_EXTMEM_BASE + 0xEC)
+/* EXTMEM_CORE0_DBUS_REJECT_INT_CLR : WOD ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by authentication fail..*/
+#define EXTMEM_CORE0_DBUS_REJECT_INT_CLR    (BIT(4))
+#define EXTMEM_CORE0_DBUS_REJECT_INT_CLR_M  (BIT(4))
+#define EXTMEM_CORE0_DBUS_REJECT_INT_CLR_V  0x1
+#define EXTMEM_CORE0_DBUS_REJECT_INT_CLR_S  4
+/* EXTMEM_CORE0_DBUS_ACS_MSK_DC_INT_CLR : WOD ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by cpu access dcache while the corresponding
+dbus is disabled or dcache is disabled which include speculative access..*/
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DC_INT_CLR    (BIT(3))
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DC_INT_CLR_M  (BIT(3))
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DC_INT_CLR_V  0x1
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DC_INT_CLR_S  3
+/* EXTMEM_CORE0_IBUS_REJECT_INT_CLR : WOD ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by authentication fail..*/
+#define EXTMEM_CORE0_IBUS_REJECT_INT_CLR    (BIT(2))
+#define EXTMEM_CORE0_IBUS_REJECT_INT_CLR_M  (BIT(2))
+#define EXTMEM_CORE0_IBUS_REJECT_INT_CLR_V  0x1
+#define EXTMEM_CORE0_IBUS_REJECT_INT_CLR_S  2
+/* EXTMEM_CORE0_IBUS_WR_IC_INT_CLR : WOD ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by ibus trying to write icache.*/
+#define EXTMEM_CORE0_IBUS_WR_IC_INT_CLR    (BIT(1))
+#define EXTMEM_CORE0_IBUS_WR_IC_INT_CLR_M  (BIT(1))
+#define EXTMEM_CORE0_IBUS_WR_IC_INT_CLR_V  0x1
+#define EXTMEM_CORE0_IBUS_WR_IC_INT_CLR_S  1
+/* EXTMEM_CORE0_IBUS_ACS_MSK_IC_INT_CLR : WOD ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by cpu access icache while the corresponding
+ibus is disabled or icache is disabled which include speculative access..*/
+#define EXTMEM_CORE0_IBUS_ACS_MSK_IC_INT_CLR    (BIT(0))
+#define EXTMEM_CORE0_IBUS_ACS_MSK_IC_INT_CLR_M  (BIT(0))
+#define EXTMEM_CORE0_IBUS_ACS_MSK_IC_INT_CLR_V  0x1
+#define EXTMEM_CORE0_IBUS_ACS_MSK_IC_INT_CLR_S  0
+
+#define EXTMEM_CORE0_ACS_CACHE_INT_ST_REG          (DR_REG_EXTMEM_BASE + 0xF0)
+/* EXTMEM_CORE0_DBUS_REJECT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by authentication fail..*/
+#define EXTMEM_CORE0_DBUS_REJECT_ST    (BIT(4))
+#define EXTMEM_CORE0_DBUS_REJECT_ST_M  (BIT(4))
+#define EXTMEM_CORE0_DBUS_REJECT_ST_V  0x1
+#define EXTMEM_CORE0_DBUS_REJECT_ST_S  4
+/* EXTMEM_CORE0_DBUS_ACS_MSK_DCACHE_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by cpu access dcache while the core0_dbus
+is disabled or dcache is disabled which include speculative access..*/
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DCACHE_ST    (BIT(3))
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DCACHE_ST_M  (BIT(3))
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DCACHE_ST_V  0x1
+#define EXTMEM_CORE0_DBUS_ACS_MSK_DCACHE_ST_S  3
+/* EXTMEM_CORE0_IBUS_REJECT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by authentication fail..*/
+#define EXTMEM_CORE0_IBUS_REJECT_ST    (BIT(2))
+#define EXTMEM_CORE0_IBUS_REJECT_ST_M  (BIT(2))
+#define EXTMEM_CORE0_IBUS_REJECT_ST_V  0x1
+#define EXTMEM_CORE0_IBUS_REJECT_ST_S  2
+/* EXTMEM_CORE0_IBUS_WR_ICACHE_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by ibus trying to write icache.*/
+#define EXTMEM_CORE0_IBUS_WR_ICACHE_ST    (BIT(1))
+#define EXTMEM_CORE0_IBUS_WR_ICACHE_ST_M  (BIT(1))
+#define EXTMEM_CORE0_IBUS_WR_ICACHE_ST_V  0x1
+#define EXTMEM_CORE0_IBUS_WR_ICACHE_ST_S  1
+/* EXTMEM_CORE0_IBUS_ACS_MSK_ICACHE_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by cpu access  icache while the core0_ibus
+ is disabled or icache is disabled which include speculative access..*/
+#define EXTMEM_CORE0_IBUS_ACS_MSK_ICACHE_ST    (BIT(0))
+#define EXTMEM_CORE0_IBUS_ACS_MSK_ICACHE_ST_M  (BIT(0))
+#define EXTMEM_CORE0_IBUS_ACS_MSK_ICACHE_ST_V  0x1
+#define EXTMEM_CORE0_IBUS_ACS_MSK_ICACHE_ST_S  0
+
+#define EXTMEM_CORE1_ACS_CACHE_INT_ENA_REG          (DR_REG_EXTMEM_BASE + 0xF4)
+/* EXTMEM_CORE1_DBUS_REJECT_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by authentication fail..*/
+#define EXTMEM_CORE1_DBUS_REJECT_INT_ENA    (BIT(4))
+#define EXTMEM_CORE1_DBUS_REJECT_INT_ENA_M  (BIT(4))
+#define EXTMEM_CORE1_DBUS_REJECT_INT_ENA_V  0x1
+#define EXTMEM_CORE1_DBUS_REJECT_INT_ENA_S  4
+/* EXTMEM_CORE1_DBUS_ACS_MSK_DC_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by cpu access dcache while the corresponding
+ dbus is disabled which include speculative access..*/
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DC_INT_ENA    (BIT(3))
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DC_INT_ENA_M  (BIT(3))
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DC_INT_ENA_V  0x1
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DC_INT_ENA_S  3
+/* EXTMEM_CORE1_IBUS_REJECT_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by authentication fail..*/
+#define EXTMEM_CORE1_IBUS_REJECT_INT_ENA    (BIT(2))
+#define EXTMEM_CORE1_IBUS_REJECT_INT_ENA_M  (BIT(2))
+#define EXTMEM_CORE1_IBUS_REJECT_INT_ENA_V  0x1
+#define EXTMEM_CORE1_IBUS_REJECT_INT_ENA_S  2
+/* EXTMEM_CORE1_IBUS_WR_IC_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by ibus trying to write icache.*/
+#define EXTMEM_CORE1_IBUS_WR_IC_INT_ENA    (BIT(1))
+#define EXTMEM_CORE1_IBUS_WR_IC_INT_ENA_M  (BIT(1))
+#define EXTMEM_CORE1_IBUS_WR_IC_INT_ENA_V  0x1
+#define EXTMEM_CORE1_IBUS_WR_IC_INT_ENA_S  1
+/* EXTMEM_CORE1_IBUS_ACS_MSK_IC_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to enable interrupt by cpu access icache while the corresponding
+ ibus is disabled which include speculative access..*/
+#define EXTMEM_CORE1_IBUS_ACS_MSK_IC_INT_ENA    (BIT(0))
+#define EXTMEM_CORE1_IBUS_ACS_MSK_IC_INT_ENA_M  (BIT(0))
+#define EXTMEM_CORE1_IBUS_ACS_MSK_IC_INT_ENA_V  0x1
+#define EXTMEM_CORE1_IBUS_ACS_MSK_IC_INT_ENA_S  0
+
+#define EXTMEM_CORE1_ACS_CACHE_INT_CLR_REG          (DR_REG_EXTMEM_BASE + 0xF8)
+/* EXTMEM_CORE1_DBUS_REJECT_INT_CLR : WOD ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by authentication fail..*/
+#define EXTMEM_CORE1_DBUS_REJECT_INT_CLR    (BIT(4))
+#define EXTMEM_CORE1_DBUS_REJECT_INT_CLR_M  (BIT(4))
+#define EXTMEM_CORE1_DBUS_REJECT_INT_CLR_V  0x1
+#define EXTMEM_CORE1_DBUS_REJECT_INT_CLR_S  4
+/* EXTMEM_CORE1_DBUS_ACS_MSK_DC_INT_CLR : WOD ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by cpu access dcache while the corresponding
+dbus is disabled or dcache is disabled which include speculative access..*/
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DC_INT_CLR    (BIT(3))
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DC_INT_CLR_M  (BIT(3))
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DC_INT_CLR_V  0x1
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DC_INT_CLR_S  3
+/* EXTMEM_CORE1_IBUS_REJECT_INT_CLR : WOD ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by authentication fail..*/
+#define EXTMEM_CORE1_IBUS_REJECT_INT_CLR    (BIT(2))
+#define EXTMEM_CORE1_IBUS_REJECT_INT_CLR_M  (BIT(2))
+#define EXTMEM_CORE1_IBUS_REJECT_INT_CLR_V  0x1
+#define EXTMEM_CORE1_IBUS_REJECT_INT_CLR_S  2
+/* EXTMEM_CORE1_IBUS_WR_IC_INT_CLR : WOD ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by ibus trying to write icache.*/
+#define EXTMEM_CORE1_IBUS_WR_IC_INT_CLR    (BIT(1))
+#define EXTMEM_CORE1_IBUS_WR_IC_INT_CLR_M  (BIT(1))
+#define EXTMEM_CORE1_IBUS_WR_IC_INT_CLR_V  0x1
+#define EXTMEM_CORE1_IBUS_WR_IC_INT_CLR_S  1
+/* EXTMEM_CORE1_IBUS_ACS_MSK_IC_INT_CLR : WOD ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to clear interrupt by cpu access icache while the corresponding
+ibus is disabled or icache is disabled which include speculative access..*/
+#define EXTMEM_CORE1_IBUS_ACS_MSK_IC_INT_CLR    (BIT(0))
+#define EXTMEM_CORE1_IBUS_ACS_MSK_IC_INT_CLR_M  (BIT(0))
+#define EXTMEM_CORE1_IBUS_ACS_MSK_IC_INT_CLR_V  0x1
+#define EXTMEM_CORE1_IBUS_ACS_MSK_IC_INT_CLR_S  0
+
+#define EXTMEM_CORE1_ACS_CACHE_INT_ST_REG          (DR_REG_EXTMEM_BASE + 0xFC)
+/* EXTMEM_CORE1_DBUS_REJECT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by authentication fail..*/
+#define EXTMEM_CORE1_DBUS_REJECT_ST    (BIT(4))
+#define EXTMEM_CORE1_DBUS_REJECT_ST_M  (BIT(4))
+#define EXTMEM_CORE1_DBUS_REJECT_ST_V  0x1
+#define EXTMEM_CORE1_DBUS_REJECT_ST_S  4
+/* EXTMEM_CORE1_DBUS_ACS_MSK_DCACHE_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by cpu access dcache while the core1_dbus
+is disabled or dcache is disabled which include speculative access..*/
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DCACHE_ST    (BIT(3))
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DCACHE_ST_M  (BIT(3))
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DCACHE_ST_V  0x1
+#define EXTMEM_CORE1_DBUS_ACS_MSK_DCACHE_ST_S  3
+/* EXTMEM_CORE1_IBUS_REJECT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by authentication fail..*/
+#define EXTMEM_CORE1_IBUS_REJECT_ST    (BIT(2))
+#define EXTMEM_CORE1_IBUS_REJECT_ST_M  (BIT(2))
+#define EXTMEM_CORE1_IBUS_REJECT_ST_V  0x1
+#define EXTMEM_CORE1_IBUS_REJECT_ST_S  2
+/* EXTMEM_CORE1_IBUS_WR_ICACHE_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by ibus trying to write icache.*/
+#define EXTMEM_CORE1_IBUS_WR_ICACHE_ST    (BIT(1))
+#define EXTMEM_CORE1_IBUS_WR_ICACHE_ST_M  (BIT(1))
+#define EXTMEM_CORE1_IBUS_WR_ICACHE_ST_V  0x1
+#define EXTMEM_CORE1_IBUS_WR_ICACHE_ST_S  1
+/* EXTMEM_CORE1_IBUS_ACS_MSK_ICACHE_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to indicate interrupt by cpu access  icache while the core1_ibus
+ is disabled or  icache is disabled which include speculative access..*/
+#define EXTMEM_CORE1_IBUS_ACS_MSK_ICACHE_ST    (BIT(0))
+#define EXTMEM_CORE1_IBUS_ACS_MSK_ICACHE_ST_M  (BIT(0))
+#define EXTMEM_CORE1_IBUS_ACS_MSK_ICACHE_ST_V  0x1
+#define EXTMEM_CORE1_IBUS_ACS_MSK_ICACHE_ST_S  0
+
+#define EXTMEM_CORE0_DBUS_REJECT_ST_REG          (DR_REG_EXTMEM_BASE + 0x100)
+/* EXTMEM_CORE0_DBUS_WORLD : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The bit is used to indicate the world of CPU access dbus when authentication fai
+l. 0: WORLD0, 1: WORLD1.*/
+#define EXTMEM_CORE0_DBUS_WORLD    (BIT(6))
+#define EXTMEM_CORE0_DBUS_WORLD_M  (BIT(6))
+#define EXTMEM_CORE0_DBUS_WORLD_V  0x1
+#define EXTMEM_CORE0_DBUS_WORLD_S  6
+/* EXTMEM_CORE0_DBUS_ATTR : RO ;bitpos:[5:3] ;default: 3'b0 ; */
+/*description: The bits are used to indicate the attribute of CPU access dbus when authenticati
+on fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able..*/
+#define EXTMEM_CORE0_DBUS_ATTR    0x00000007
+#define EXTMEM_CORE0_DBUS_ATTR_M  ((EXTMEM_CORE0_DBUS_ATTR_V)<<(EXTMEM_CORE0_DBUS_ATTR_S))
+#define EXTMEM_CORE0_DBUS_ATTR_V  0x7
+#define EXTMEM_CORE0_DBUS_ATTR_S  3
+/* EXTMEM_CORE0_DBUS_TAG_ATTR : RO ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: The bits are used to indicate the attribute of data from external memory when au
+thentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able..*/
+#define EXTMEM_CORE0_DBUS_TAG_ATTR    0x00000007
+#define EXTMEM_CORE0_DBUS_TAG_ATTR_M  ((EXTMEM_CORE0_DBUS_TAG_ATTR_V)<<(EXTMEM_CORE0_DBUS_TAG_ATTR_S))
+#define EXTMEM_CORE0_DBUS_TAG_ATTR_V  0x7
+#define EXTMEM_CORE0_DBUS_TAG_ATTR_S  0
+
+#define EXTMEM_CORE0_DBUS_REJECT_VADDR_REG          (DR_REG_EXTMEM_BASE + 0x104)
+/* EXTMEM_CORE0_DBUS_VADDR : RO ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: The bits are used to indicate the virtual address of CPU access dbus when authen
+tication fail..*/
+#define EXTMEM_CORE0_DBUS_VADDR    0xFFFFFFFF
+#define EXTMEM_CORE0_DBUS_VADDR_M  ((EXTMEM_CORE0_DBUS_VADDR_V)<<(EXTMEM_CORE0_DBUS_VADDR_S))
+#define EXTMEM_CORE0_DBUS_VADDR_V  0xFFFFFFFF
+#define EXTMEM_CORE0_DBUS_VADDR_S  0
+
+#define EXTMEM_CORE0_IBUS_REJECT_ST_REG          (DR_REG_EXTMEM_BASE + 0x108)
+/* EXTMEM_CORE0_IBUS_WORLD : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The bit is used to indicate the world of CPU access ibus when authentication fai
+l. 0: WORLD0, 1: WORLD1.*/
+#define EXTMEM_CORE0_IBUS_WORLD    (BIT(6))
+#define EXTMEM_CORE0_IBUS_WORLD_M  (BIT(6))
+#define EXTMEM_CORE0_IBUS_WORLD_V  0x1
+#define EXTMEM_CORE0_IBUS_WORLD_S  6
+/* EXTMEM_CORE0_IBUS_ATTR : RO ;bitpos:[5:3] ;default: 3'b0 ; */
+/*description: The bits are used to indicate the attribute of CPU access ibus when authenticati
+on fail. 0: invalidate, 1: execute-able, 2: read-able.*/
+#define EXTMEM_CORE0_IBUS_ATTR    0x00000007
+#define EXTMEM_CORE0_IBUS_ATTR_M  ((EXTMEM_CORE0_IBUS_ATTR_V)<<(EXTMEM_CORE0_IBUS_ATTR_S))
+#define EXTMEM_CORE0_IBUS_ATTR_V  0x7
+#define EXTMEM_CORE0_IBUS_ATTR_S  3
+/* EXTMEM_CORE0_IBUS_TAG_ATTR : RO ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: The bits are used to indicate the attribute of data from external memory when au
+thentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able..*/
+#define EXTMEM_CORE0_IBUS_TAG_ATTR    0x00000007
+#define EXTMEM_CORE0_IBUS_TAG_ATTR_M  ((EXTMEM_CORE0_IBUS_TAG_ATTR_V)<<(EXTMEM_CORE0_IBUS_TAG_ATTR_S))
+#define EXTMEM_CORE0_IBUS_TAG_ATTR_V  0x7
+#define EXTMEM_CORE0_IBUS_TAG_ATTR_S  0
+
+#define EXTMEM_CORE0_IBUS_REJECT_VADDR_REG          (DR_REG_EXTMEM_BASE + 0x10C)
+/* EXTMEM_CORE0_IBUS_VADDR : RO ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: The bits are used to indicate the virtual address of CPU access  ibus when authe
+ntication fail..*/
+#define EXTMEM_CORE0_IBUS_VADDR    0xFFFFFFFF
+#define EXTMEM_CORE0_IBUS_VADDR_M  ((EXTMEM_CORE0_IBUS_VADDR_V)<<(EXTMEM_CORE0_IBUS_VADDR_S))
+#define EXTMEM_CORE0_IBUS_VADDR_V  0xFFFFFFFF
+#define EXTMEM_CORE0_IBUS_VADDR_S  0
+
+#define EXTMEM_CORE1_DBUS_REJECT_ST_REG          (DR_REG_EXTMEM_BASE + 0x110)
+/* EXTMEM_CORE1_DBUS_WORLD : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The bit is used to indicate the world of CPU access dbus when authentication fai
+l. 0: WORLD0, 1: WORLD1.*/
+#define EXTMEM_CORE1_DBUS_WORLD    (BIT(6))
+#define EXTMEM_CORE1_DBUS_WORLD_M  (BIT(6))
+#define EXTMEM_CORE1_DBUS_WORLD_V  0x1
+#define EXTMEM_CORE1_DBUS_WORLD_S  6
+/* EXTMEM_CORE1_DBUS_ATTR : RO ;bitpos:[5:3] ;default: 3'b0 ; */
+/*description: The bits are used to indicate the attribute of CPU access dbus when authenticati
+on fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able..*/
+#define EXTMEM_CORE1_DBUS_ATTR    0x00000007
+#define EXTMEM_CORE1_DBUS_ATTR_M  ((EXTMEM_CORE1_DBUS_ATTR_V)<<(EXTMEM_CORE1_DBUS_ATTR_S))
+#define EXTMEM_CORE1_DBUS_ATTR_V  0x7
+#define EXTMEM_CORE1_DBUS_ATTR_S  3
+/* EXTMEM_CORE1_DBUS_TAG_ATTR : RO ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: The bits are used to indicate the attribute of data from external memory when au
+thentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able..*/
+#define EXTMEM_CORE1_DBUS_TAG_ATTR    0x00000007
+#define EXTMEM_CORE1_DBUS_TAG_ATTR_M  ((EXTMEM_CORE1_DBUS_TAG_ATTR_V)<<(EXTMEM_CORE1_DBUS_TAG_ATTR_S))
+#define EXTMEM_CORE1_DBUS_TAG_ATTR_V  0x7
+#define EXTMEM_CORE1_DBUS_TAG_ATTR_S  0
+
+#define EXTMEM_CORE1_DBUS_REJECT_VADDR_REG          (DR_REG_EXTMEM_BASE + 0x114)
+/* EXTMEM_CORE1_DBUS_VADDR : RO ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: The bits are used to indicate the virtual address of CPU access dbus when authen
+tication fail..*/
+#define EXTMEM_CORE1_DBUS_VADDR    0xFFFFFFFF
+#define EXTMEM_CORE1_DBUS_VADDR_M  ((EXTMEM_CORE1_DBUS_VADDR_V)<<(EXTMEM_CORE1_DBUS_VADDR_S))
+#define EXTMEM_CORE1_DBUS_VADDR_V  0xFFFFFFFF
+#define EXTMEM_CORE1_DBUS_VADDR_S  0
+
+#define EXTMEM_CORE1_IBUS_REJECT_ST_REG          (DR_REG_EXTMEM_BASE + 0x118)
+/* EXTMEM_CORE1_IBUS_WORLD : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The bit is used to indicate the world of CPU access ibus when authentication fai
+l. 0: WORLD0, 1: WORLD1.*/
+#define EXTMEM_CORE1_IBUS_WORLD    (BIT(6))
+#define EXTMEM_CORE1_IBUS_WORLD_M  (BIT(6))
+#define EXTMEM_CORE1_IBUS_WORLD_V  0x1
+#define EXTMEM_CORE1_IBUS_WORLD_S  6
+/* EXTMEM_CORE1_IBUS_ATTR : RO ;bitpos:[5:3] ;default: 3'b0 ; */
+/*description: The bits are used to indicate the attribute of CPU access ibus when authenticati
+on fail. 0: invalidate, 1: execute-able, 2: read-able.*/
+#define EXTMEM_CORE1_IBUS_ATTR    0x00000007
+#define EXTMEM_CORE1_IBUS_ATTR_M  ((EXTMEM_CORE1_IBUS_ATTR_V)<<(EXTMEM_CORE1_IBUS_ATTR_S))
+#define EXTMEM_CORE1_IBUS_ATTR_V  0x7
+#define EXTMEM_CORE1_IBUS_ATTR_S  3
+/* EXTMEM_CORE1_IBUS_TAG_ATTR : RO ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: The bits are used to indicate the attribute of data from external memory when au
+thentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able..*/
+#define EXTMEM_CORE1_IBUS_TAG_ATTR    0x00000007
+#define EXTMEM_CORE1_IBUS_TAG_ATTR_M  ((EXTMEM_CORE1_IBUS_TAG_ATTR_V)<<(EXTMEM_CORE1_IBUS_TAG_ATTR_S))
+#define EXTMEM_CORE1_IBUS_TAG_ATTR_V  0x7
+#define EXTMEM_CORE1_IBUS_TAG_ATTR_S  0
+
+#define EXTMEM_CORE1_IBUS_REJECT_VADDR_REG          (DR_REG_EXTMEM_BASE + 0x11C)
+/* EXTMEM_CORE1_IBUS_VADDR : RO ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: The bits are used to indicate the virtual address of CPU access  ibus when authe
+ntication fail..*/
+#define EXTMEM_CORE1_IBUS_VADDR    0xFFFFFFFF
+#define EXTMEM_CORE1_IBUS_VADDR_M  ((EXTMEM_CORE1_IBUS_VADDR_V)<<(EXTMEM_CORE1_IBUS_VADDR_S))
+#define EXTMEM_CORE1_IBUS_VADDR_V  0xFFFFFFFF
+#define EXTMEM_CORE1_IBUS_VADDR_S  0
+
+#define EXTMEM_CACHE_MMU_FAULT_CONTENT_REG          (DR_REG_EXTMEM_BASE + 0x120)
+/* EXTMEM_CACHE_MMU_FAULT_CODE : RO ;bitpos:[19:16] ;default: 4'h0 ; */
+/*description: The right-most 3 bits are used to indicate the operations which cause mmu fault
+occurrence. 0: default, 1: cpu miss, 2: preload miss, 3: writeback, 4: cpu miss
+evict recovery address, 5: load miss evict recovery address, 6: external dma tx,
+ 7: external dma rx. The most significant bit is used to indicate this operation
+ occurs in which one icache. .*/
+#define EXTMEM_CACHE_MMU_FAULT_CODE    0x0000000F
+#define EXTMEM_CACHE_MMU_FAULT_CODE_M  ((EXTMEM_CACHE_MMU_FAULT_CODE_V)<<(EXTMEM_CACHE_MMU_FAULT_CODE_S))
+#define EXTMEM_CACHE_MMU_FAULT_CODE_V  0xF
+#define EXTMEM_CACHE_MMU_FAULT_CODE_S  16
+/* EXTMEM_CACHE_MMU_FAULT_CONTENT : RO ;bitpos:[15:0] ;default: 17'h0 ; */
+/*description: The bits are used to indicate the content of mmu entry which cause mmu fault...*/
+#define EXTMEM_CACHE_MMU_FAULT_CONTENT    0x0000FFFF
+#define EXTMEM_CACHE_MMU_FAULT_CONTENT_M  ((EXTMEM_CACHE_MMU_FAULT_CONTENT_V)<<(EXTMEM_CACHE_MMU_FAULT_CONTENT_S))
+#define EXTMEM_CACHE_MMU_FAULT_CONTENT_V  0xFFFF
+#define EXTMEM_CACHE_MMU_FAULT_CONTENT_S  0
+
+#define EXTMEM_CACHE_MMU_FAULT_VADDR_REG          (DR_REG_EXTMEM_BASE + 0x124)
+/* EXTMEM_CACHE_MMU_FAULT_VADDR : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: The bits are used to indicate the virtual address which cause mmu fault...*/
+#define EXTMEM_CACHE_MMU_FAULT_VADDR    0xFFFFFFFF
+#define EXTMEM_CACHE_MMU_FAULT_VADDR_M  ((EXTMEM_CACHE_MMU_FAULT_VADDR_V)<<(EXTMEM_CACHE_MMU_FAULT_VADDR_S))
+#define EXTMEM_CACHE_MMU_FAULT_VADDR_V  0xFFFFFFFF
+#define EXTMEM_CACHE_MMU_FAULT_VADDR_S  0
+
+#define EXTMEM_CACHE_WRAP_AROUND_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x128)
+/* EXTMEM_CACHE_SRAM_RD_WRAP_AROUND : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to enable wrap around mode when read data from spiram..*/
+#define EXTMEM_CACHE_SRAM_RD_WRAP_AROUND    (BIT(1))
+#define EXTMEM_CACHE_SRAM_RD_WRAP_AROUND_M  (BIT(1))
+#define EXTMEM_CACHE_SRAM_RD_WRAP_AROUND_V  0x1
+#define EXTMEM_CACHE_SRAM_RD_WRAP_AROUND_S  1
+/* EXTMEM_CACHE_FLASH_WRAP_AROUND : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to enable wrap around mode when read data from flash..*/
+#define EXTMEM_CACHE_FLASH_WRAP_AROUND    (BIT(0))
+#define EXTMEM_CACHE_FLASH_WRAP_AROUND_M  (BIT(0))
+#define EXTMEM_CACHE_FLASH_WRAP_AROUND_V  0x1
+#define EXTMEM_CACHE_FLASH_WRAP_AROUND_S  0
+
+#define EXTMEM_CACHE_MMU_POWER_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x12C)
+/* EXTMEM_CACHE_MMU_MEM_FORCE_PU : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power up.*/
+#define EXTMEM_CACHE_MMU_MEM_FORCE_PU    (BIT(2))
+#define EXTMEM_CACHE_MMU_MEM_FORCE_PU_M  (BIT(2))
+#define EXTMEM_CACHE_MMU_MEM_FORCE_PU_V  0x1
+#define EXTMEM_CACHE_MMU_MEM_FORCE_PU_S  2
+/* EXTMEM_CACHE_MMU_MEM_FORCE_PD : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power down.*/
+#define EXTMEM_CACHE_MMU_MEM_FORCE_PD    (BIT(1))
+#define EXTMEM_CACHE_MMU_MEM_FORCE_PD_M  (BIT(1))
+#define EXTMEM_CACHE_MMU_MEM_FORCE_PD_V  0x1
+#define EXTMEM_CACHE_MMU_MEM_FORCE_PD_S  1
+/* EXTMEM_CACHE_MMU_MEM_FORCE_ON : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: The bit is used to enable clock gating to save power when access mmu memory, 0:
+enable, 1: disable.*/
+#define EXTMEM_CACHE_MMU_MEM_FORCE_ON    (BIT(0))
+#define EXTMEM_CACHE_MMU_MEM_FORCE_ON_M  (BIT(0))
+#define EXTMEM_CACHE_MMU_MEM_FORCE_ON_V  0x1
+#define EXTMEM_CACHE_MMU_MEM_FORCE_ON_S  0
+
+#define EXTMEM_CACHE_STATE_REG          (DR_REG_EXTMEM_BASE + 0x130)
+/* EXTMEM_DCACHE_STATE : RO ;bitpos:[23:12] ;default: 12'h001 ; */
+/*description: The bit is used to indicate whether dcache main fsm is in idle state or not. 1:
+in idle state,  0: not in idle state.*/
+#define EXTMEM_DCACHE_STATE    0x00000FFF
+#define EXTMEM_DCACHE_STATE_M  ((EXTMEM_DCACHE_STATE_V)<<(EXTMEM_DCACHE_STATE_S))
+#define EXTMEM_DCACHE_STATE_V  0xFFF
+#define EXTMEM_DCACHE_STATE_S  12
+/* EXTMEM_ICACHE_STATE : RO ;bitpos:[11:0] ;default: 12'h001 ; */
+/*description: The bit is used to indicate whether  icache main fsm is in idle state or not. 1:
+ in idle state,  0: not in idle state.*/
+#define EXTMEM_ICACHE_STATE    0x00000FFF
+#define EXTMEM_ICACHE_STATE_M  ((EXTMEM_ICACHE_STATE_V)<<(EXTMEM_ICACHE_STATE_S))
+#define EXTMEM_ICACHE_STATE_V  0xFFF
+#define EXTMEM_ICACHE_STATE_S  0
+
+#define EXTMEM_CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE_REG          (DR_REG_EXTMEM_BASE + 0x134)
+/* EXTMEM_RECORD_DISABLE_G0CB_DECRYPT : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Reserved..*/
+#define EXTMEM_RECORD_DISABLE_G0CB_DECRYPT    (BIT(1))
+#define EXTMEM_RECORD_DISABLE_G0CB_DECRYPT_M  (BIT(1))
+#define EXTMEM_RECORD_DISABLE_G0CB_DECRYPT_V  0x1
+#define EXTMEM_RECORD_DISABLE_G0CB_DECRYPT_S  1
+/* EXTMEM_RECORD_DISABLE_DB_ENCRYPT : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Reserved..*/
+#define EXTMEM_RECORD_DISABLE_DB_ENCRYPT    (BIT(0))
+#define EXTMEM_RECORD_DISABLE_DB_ENCRYPT_M  (BIT(0))
+#define EXTMEM_RECORD_DISABLE_DB_ENCRYPT_V  0x1
+#define EXTMEM_RECORD_DISABLE_DB_ENCRYPT_S  0
+
+#define EXTMEM_CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON_REG          (DR_REG_EXTMEM_BASE + 0x138)
+/* EXTMEM_CLK_FORCE_ON_CRYPT : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: The bit is used to close clock gating of external memory encrypt and decrypt clo
+ck. 1: close gating, 0: open clock gating..*/
+#define EXTMEM_CLK_FORCE_ON_CRYPT    (BIT(2))
+#define EXTMEM_CLK_FORCE_ON_CRYPT_M  (BIT(2))
+#define EXTMEM_CLK_FORCE_ON_CRYPT_V  0x1
+#define EXTMEM_CLK_FORCE_ON_CRYPT_S  2
+/* EXTMEM_CLK_FORCE_ON_AUTO_CRYPT : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: The bit is used to close clock gating of automatic crypt clock. 1: close gating,
+ 0: open clock gating..*/
+#define EXTMEM_CLK_FORCE_ON_AUTO_CRYPT    (BIT(1))
+#define EXTMEM_CLK_FORCE_ON_AUTO_CRYPT_M  (BIT(1))
+#define EXTMEM_CLK_FORCE_ON_AUTO_CRYPT_V  0x1
+#define EXTMEM_CLK_FORCE_ON_AUTO_CRYPT_S  1
+/* EXTMEM_CLK_FORCE_ON_MANUAL_CRYPT : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: The bit is used to close clock gating of manual crypt clock. 1: close gating, 0:
+ open clock gating..*/
+#define EXTMEM_CLK_FORCE_ON_MANUAL_CRYPT    (BIT(0))
+#define EXTMEM_CLK_FORCE_ON_MANUAL_CRYPT_M  (BIT(0))
+#define EXTMEM_CLK_FORCE_ON_MANUAL_CRYPT_V  0x1
+#define EXTMEM_CLK_FORCE_ON_MANUAL_CRYPT_S  0
+
+#define EXTMEM_CACHE_BRIDGE_ARBITER_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x13C)
+/* EXTMEM_ALLOC_WB_HOLD_ARBITER : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Reserved..*/
+#define EXTMEM_ALLOC_WB_HOLD_ARBITER    (BIT(0))
+#define EXTMEM_ALLOC_WB_HOLD_ARBITER_M  (BIT(0))
+#define EXTMEM_ALLOC_WB_HOLD_ARBITER_V  0x1
+#define EXTMEM_ALLOC_WB_HOLD_ARBITER_S  0
+
+#define EXTMEM_CACHE_PRELOAD_INT_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x140)
+/* EXTMEM_DCACHE_PRELOAD_INT_CLR : WOD ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The bit is used to clear the interrupt by dcache pre-load done..*/
+#define EXTMEM_DCACHE_PRELOAD_INT_CLR    (BIT(5))
+#define EXTMEM_DCACHE_PRELOAD_INT_CLR_M  (BIT(5))
+#define EXTMEM_DCACHE_PRELOAD_INT_CLR_V  0x1
+#define EXTMEM_DCACHE_PRELOAD_INT_CLR_S  5
+/* EXTMEM_DCACHE_PRELOAD_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bit is used to enable the interrupt by dcache pre-load done..*/
+#define EXTMEM_DCACHE_PRELOAD_INT_ENA    (BIT(4))
+#define EXTMEM_DCACHE_PRELOAD_INT_ENA_M  (BIT(4))
+#define EXTMEM_DCACHE_PRELOAD_INT_ENA_V  0x1
+#define EXTMEM_DCACHE_PRELOAD_INT_ENA_S  4
+/* EXTMEM_DCACHE_PRELOAD_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to indicate the interrupt by dcache pre-load done..*/
+#define EXTMEM_DCACHE_PRELOAD_INT_ST    (BIT(3))
+#define EXTMEM_DCACHE_PRELOAD_INT_ST_M  (BIT(3))
+#define EXTMEM_DCACHE_PRELOAD_INT_ST_V  0x1
+#define EXTMEM_DCACHE_PRELOAD_INT_ST_S  3
+/* EXTMEM_ICACHE_PRELOAD_INT_CLR : WOD ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to clear the interrupt by  icache pre-load done..*/
+#define EXTMEM_ICACHE_PRELOAD_INT_CLR    (BIT(2))
+#define EXTMEM_ICACHE_PRELOAD_INT_CLR_M  (BIT(2))
+#define EXTMEM_ICACHE_PRELOAD_INT_CLR_V  0x1
+#define EXTMEM_ICACHE_PRELOAD_INT_CLR_S  2
+/* EXTMEM_ICACHE_PRELOAD_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to enable the interrupt by  icache pre-load done..*/
+#define EXTMEM_ICACHE_PRELOAD_INT_ENA    (BIT(1))
+#define EXTMEM_ICACHE_PRELOAD_INT_ENA_M  (BIT(1))
+#define EXTMEM_ICACHE_PRELOAD_INT_ENA_V  0x1
+#define EXTMEM_ICACHE_PRELOAD_INT_ENA_S  1
+/* EXTMEM_ICACHE_PRELOAD_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to indicate the interrupt by  icache pre-load done..*/
+#define EXTMEM_ICACHE_PRELOAD_INT_ST    (BIT(0))
+#define EXTMEM_ICACHE_PRELOAD_INT_ST_M  (BIT(0))
+#define EXTMEM_ICACHE_PRELOAD_INT_ST_V  0x1
+#define EXTMEM_ICACHE_PRELOAD_INT_ST_S  0
+
+#define EXTMEM_CACHE_SYNC_INT_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x144)
+/* EXTMEM_DCACHE_SYNC_INT_CLR : WOD ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The bit is used to clear the interrupt by dcache sync done..*/
+#define EXTMEM_DCACHE_SYNC_INT_CLR    (BIT(5))
+#define EXTMEM_DCACHE_SYNC_INT_CLR_M  (BIT(5))
+#define EXTMEM_DCACHE_SYNC_INT_CLR_V  0x1
+#define EXTMEM_DCACHE_SYNC_INT_CLR_S  5
+/* EXTMEM_DCACHE_SYNC_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The bit is used to enable the interrupt by dcache sync done..*/
+#define EXTMEM_DCACHE_SYNC_INT_ENA    (BIT(4))
+#define EXTMEM_DCACHE_SYNC_INT_ENA_M  (BIT(4))
+#define EXTMEM_DCACHE_SYNC_INT_ENA_V  0x1
+#define EXTMEM_DCACHE_SYNC_INT_ENA_S  4
+/* EXTMEM_DCACHE_SYNC_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The bit is used to indicate the interrupt by dcache sync done..*/
+#define EXTMEM_DCACHE_SYNC_INT_ST    (BIT(3))
+#define EXTMEM_DCACHE_SYNC_INT_ST_M  (BIT(3))
+#define EXTMEM_DCACHE_SYNC_INT_ST_V  0x1
+#define EXTMEM_DCACHE_SYNC_INT_ST_S  3
+/* EXTMEM_ICACHE_SYNC_INT_CLR : WOD ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The bit is used to clear the interrupt by  icache sync done..*/
+#define EXTMEM_ICACHE_SYNC_INT_CLR    (BIT(2))
+#define EXTMEM_ICACHE_SYNC_INT_CLR_M  (BIT(2))
+#define EXTMEM_ICACHE_SYNC_INT_CLR_V  0x1
+#define EXTMEM_ICACHE_SYNC_INT_CLR_S  2
+/* EXTMEM_ICACHE_SYNC_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to enable the interrupt by  icache sync done..*/
+#define EXTMEM_ICACHE_SYNC_INT_ENA    (BIT(1))
+#define EXTMEM_ICACHE_SYNC_INT_ENA_M  (BIT(1))
+#define EXTMEM_ICACHE_SYNC_INT_ENA_V  0x1
+#define EXTMEM_ICACHE_SYNC_INT_ENA_S  1
+/* EXTMEM_ICACHE_SYNC_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to indicate the interrupt by  icache sync done..*/
+#define EXTMEM_ICACHE_SYNC_INT_ST    (BIT(0))
+#define EXTMEM_ICACHE_SYNC_INT_ST_M  (BIT(0))
+#define EXTMEM_ICACHE_SYNC_INT_ST_V  0x1
+#define EXTMEM_ICACHE_SYNC_INT_ST_S  0
+
+#define EXTMEM_CACHE_MMU_OWNER_REG          (DR_REG_EXTMEM_BASE + 0x148)
+/* EXTMEM_CACHE_MMU_OWNER : R/W ;bitpos:[23:0] ;default: 24'h0 ; */
+/*description: The bits are used to specify the owner of MMU.bit0: icache, bit1: dcache, bit2:
+dma, bit3: reserved..*/
+#define EXTMEM_CACHE_MMU_OWNER    0x00FFFFFF
+#define EXTMEM_CACHE_MMU_OWNER_M  ((EXTMEM_CACHE_MMU_OWNER_V)<<(EXTMEM_CACHE_MMU_OWNER_S))
+#define EXTMEM_CACHE_MMU_OWNER_V  0xFFFFFF
+#define EXTMEM_CACHE_MMU_OWNER_S  0
+
+#define EXTMEM_CACHE_CONF_MISC_REG          (DR_REG_EXTMEM_BASE + 0x14C)
+/* EXTMEM_CACHE_TRACE_ENA : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: The bit is used to enable cache trace function..*/
+#define EXTMEM_CACHE_TRACE_ENA    (BIT(2))
+#define EXTMEM_CACHE_TRACE_ENA_M  (BIT(2))
+#define EXTMEM_CACHE_TRACE_ENA_V  0x1
+#define EXTMEM_CACHE_TRACE_ENA_S  2
+/* EXTMEM_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: The bit is used to disable checking mmu entry fault by sync operation..*/
+#define EXTMEM_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT    (BIT(1))
+#define EXTMEM_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT_M  (BIT(1))
+#define EXTMEM_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT_V  0x1
+#define EXTMEM_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT_S  1
+/* EXTMEM_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: The bit is used to disable checking mmu entry fault by preload operation..*/
+#define EXTMEM_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT    (BIT(0))
+#define EXTMEM_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT_M  (BIT(0))
+#define EXTMEM_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT_V  0x1
+#define EXTMEM_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT_S  0
+
+#define EXTMEM_DCACHE_FREEZE_REG          (DR_REG_EXTMEM_BASE + 0x150)
+/* EXTMEM_DCACHE_FREEZE_DONE : RO ;bitpos:[2] ;default: 1'b1 ; */
+/*description: The bit is used to indicate dcache freeze success.*/
+#define EXTMEM_DCACHE_FREEZE_DONE    (BIT(2))
+#define EXTMEM_DCACHE_FREEZE_DONE_M  (BIT(2))
+#define EXTMEM_DCACHE_FREEZE_DONE_V  0x1
+#define EXTMEM_DCACHE_FREEZE_DONE_S  2
+/* EXTMEM_DCACHE_FREEZE_MODE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to configure freeze mode, 0:  assert busy if CPU miss 1: assert
+hit if CPU miss.*/
+#define EXTMEM_DCACHE_FREEZE_MODE    (BIT(1))
+#define EXTMEM_DCACHE_FREEZE_MODE_M  (BIT(1))
+#define EXTMEM_DCACHE_FREEZE_MODE_V  0x1
+#define EXTMEM_DCACHE_FREEZE_MODE_S  1
+/* EXTMEM_DCACHE_FREEZE_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to enable dcache freeze mode.*/
+#define EXTMEM_DCACHE_FREEZE_ENA    (BIT(0))
+#define EXTMEM_DCACHE_FREEZE_ENA_M  (BIT(0))
+#define EXTMEM_DCACHE_FREEZE_ENA_V  0x1
+#define EXTMEM_DCACHE_FREEZE_ENA_S  0
+
+#define EXTMEM_ICACHE_FREEZE_REG          (DR_REG_EXTMEM_BASE + 0x154)
+/* EXTMEM_ICACHE_FREEZE_DONE : RO ;bitpos:[2] ;default: 1'b1 ; */
+/*description: The bit is used to indicate icache freeze success.*/
+#define EXTMEM_ICACHE_FREEZE_DONE    (BIT(2))
+#define EXTMEM_ICACHE_FREEZE_DONE_M  (BIT(2))
+#define EXTMEM_ICACHE_FREEZE_DONE_V  0x1
+#define EXTMEM_ICACHE_FREEZE_DONE_S  2
+/* EXTMEM_ICACHE_FREEZE_MODE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The bit is used to configure freeze mode, 0:  assert busy if CPU miss 1: assert
+hit if CPU miss.*/
+#define EXTMEM_ICACHE_FREEZE_MODE    (BIT(1))
+#define EXTMEM_ICACHE_FREEZE_MODE_M  (BIT(1))
+#define EXTMEM_ICACHE_FREEZE_MODE_V  0x1
+#define EXTMEM_ICACHE_FREEZE_MODE_S  1
+/* EXTMEM_ICACHE_FREEZE_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to enable icache freeze mode.*/
+#define EXTMEM_ICACHE_FREEZE_ENA    (BIT(0))
+#define EXTMEM_ICACHE_FREEZE_ENA_M  (BIT(0))
+#define EXTMEM_ICACHE_FREEZE_ENA_V  0x1
+#define EXTMEM_ICACHE_FREEZE_ENA_S  0
+
+#define EXTMEM_ICACHE_ATOMIC_OPERATE_ENA_REG          (DR_REG_EXTMEM_BASE + 0x158)
+/* EXTMEM_ICACHE_ATOMIC_OPERATE_ENA : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: The bit is used to activate icache atomic operation protection. In this case, sy
+nc/lock operation can not interrupt miss-work. This feature does not work during
+ invalidateAll operation..*/
+#define EXTMEM_ICACHE_ATOMIC_OPERATE_ENA    (BIT(0))
+#define EXTMEM_ICACHE_ATOMIC_OPERATE_ENA_M  (BIT(0))
+#define EXTMEM_ICACHE_ATOMIC_OPERATE_ENA_V  0x1
+#define EXTMEM_ICACHE_ATOMIC_OPERATE_ENA_S  0
+
+#define EXTMEM_DCACHE_ATOMIC_OPERATE_ENA_REG          (DR_REG_EXTMEM_BASE + 0x15C)
+/* EXTMEM_DCACHE_ATOMIC_OPERATE_ENA : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: The bit is used to activate dcache atomic operation protection. In this case, sy
+nc/lock/occupy operation can not interrupt miss-work. This feature does not work
+ during invalidateAll operation..*/
+#define EXTMEM_DCACHE_ATOMIC_OPERATE_ENA    (BIT(0))
+#define EXTMEM_DCACHE_ATOMIC_OPERATE_ENA_M  (BIT(0))
+#define EXTMEM_DCACHE_ATOMIC_OPERATE_ENA_V  0x1
+#define EXTMEM_DCACHE_ATOMIC_OPERATE_ENA_S  0
+
+#define EXTMEM_CACHE_REQUEST_REG          (DR_REG_EXTMEM_BASE + 0x160)
+/* EXTMEM_CACHE_REQUEST_BYPASS : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The bit is used to disable request recording which could cause performance issue.*/
+#define EXTMEM_CACHE_REQUEST_BYPASS    (BIT(0))
+#define EXTMEM_CACHE_REQUEST_BYPASS_M  (BIT(0))
+#define EXTMEM_CACHE_REQUEST_BYPASS_V  0x1
+#define EXTMEM_CACHE_REQUEST_BYPASS_S  0
+
+#define EXTMEM_CLOCK_GATE_REG          (DR_REG_EXTMEM_BASE + 0x164)
+/* EXTMEM_CLK_EN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: Reserved..*/
+#define EXTMEM_CLK_EN    (BIT(0))
+#define EXTMEM_CLK_EN_M  (BIT(0))
+#define EXTMEM_CLK_EN_V  0x1
+#define EXTMEM_CLK_EN_S  0
+
+#define EXTMEM_CACHE_TAG_OBJECT_CTRL_REG          (DR_REG_EXTMEM_BASE + 0x180)
+/* EXTMEM_DCACHE_TAG_OBJECT : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to set dcache tag memory as object. This bit should be onehot with
+the others fields inside this register..*/
+#define EXTMEM_DCACHE_TAG_OBJECT    (BIT(1))
+#define EXTMEM_DCACHE_TAG_OBJECT_M  (BIT(1))
+#define EXTMEM_DCACHE_TAG_OBJECT_V  0x1
+#define EXTMEM_DCACHE_TAG_OBJECT_S  1
+/* EXTMEM_ICACHE_TAG_OBJECT : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to set icache tag memory as object. This bit should be onehot with
+the others fields inside this register..*/
+#define EXTMEM_ICACHE_TAG_OBJECT    (BIT(0))
+#define EXTMEM_ICACHE_TAG_OBJECT_M  (BIT(0))
+#define EXTMEM_ICACHE_TAG_OBJECT_V  0x1
+#define EXTMEM_ICACHE_TAG_OBJECT_S  0
+
+#define EXTMEM_CACHE_TAG_WAY_OBJECT_REG          (DR_REG_EXTMEM_BASE + 0x184)
+/* EXTMEM_CACHE_TAG_WAY_OBJECT : R/W ;bitpos:[2:0] ;default: 3'h0 ; */
+/*description: Set this bits to select which way of the tag-object will be accessed. 0: way0, 1
+: way1, 2: way2, 3: way3, .., 7: way7..*/
+#define EXTMEM_CACHE_TAG_WAY_OBJECT    0x00000007
+#define EXTMEM_CACHE_TAG_WAY_OBJECT_M  ((EXTMEM_CACHE_TAG_WAY_OBJECT_V)<<(EXTMEM_CACHE_TAG_WAY_OBJECT_S))
+#define EXTMEM_CACHE_TAG_WAY_OBJECT_V  0x7
+#define EXTMEM_CACHE_TAG_WAY_OBJECT_S  0
+
+#define EXTMEM_CACHE_VADDR_REG          (DR_REG_EXTMEM_BASE + 0x188)
+/* EXTMEM_CACHE_VADDR : R/W ;bitpos:[31:0] ;default: 32'h00000000 ; */
+/*description: Those bits stores the virtual address which will decide where inside the specifi
+ed tag memory object will be accessed..*/
+#define EXTMEM_CACHE_VADDR    0xFFFFFFFF
+#define EXTMEM_CACHE_VADDR_M  ((EXTMEM_CACHE_VADDR_V)<<(EXTMEM_CACHE_VADDR_S))
+#define EXTMEM_CACHE_VADDR_V  0xFFFFFFFF
+#define EXTMEM_CACHE_VADDR_S  0
+
+#define EXTMEM_CACHE_TAG_CONTENT_REG          (DR_REG_EXTMEM_BASE + 0x18C)
+/* EXTMEM_CACHE_TAG_CONTENT : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This is a constant place where we can write data to or read data from the tag me
+mory on the specified cache..*/
+#define EXTMEM_CACHE_TAG_CONTENT    0xFFFFFFFF
+#define EXTMEM_CACHE_TAG_CONTENT_M  ((EXTMEM_CACHE_TAG_CONTENT_V)<<(EXTMEM_CACHE_TAG_CONTENT_S))
+#define EXTMEM_CACHE_TAG_CONTENT_V  0xFFFFFFFF
+#define EXTMEM_CACHE_TAG_CONTENT_S  0
+
+#define EXTMEM_DATE_REG          (DR_REG_EXTMEM_BASE + 0x3FC)
+/* EXTMEM_DATE : R/W ;bitpos:[27:0] ;default: 28'h2012310 ; */
+/*description: version information..*/
+#define EXTMEM_DATE    0x0FFFFFFF
+#define EXTMEM_DATE_M  ((EXTMEM_DATE_V)<<(EXTMEM_DATE_S))
+#define EXTMEM_DATE_V  0xFFFFFFF
+#define EXTMEM_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_EXTMEM_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/extmem_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/extmem_struct.h
new file mode 100644
index 00000000000..58ca6462942
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/extmem_struct.h
@@ -0,0 +1,798 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_EXTMEM_STRUCT_H_
+#define _SOC_EXTMEM_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct extmem_dev_s {
+    union {
+        struct {
+            uint32_t dcache_enable                 :    1;  /*The bit is used to activate the data cache. 0: disable, 1: enable*/
+            uint32_t reserved1                     :    1;  /*Reserved*/
+            uint32_t dcache_size_mode              :    1;  /*The bit is used to configure cache memory size.0: 32KB, 1: 64KB*/
+            uint32_t dcache_blocksize_mode         :    2;  /*The bit is used to configure cache block size.0: 16 bytes, 1: 32 bytes,2: 64 bytes*/
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } dcache_ctrl;
+    union {
+        struct {
+            uint32_t dcache_shut_core0_bus         :    1;  /*The bit is used to disable core0 dbus, 0: enable, 1: disable*/
+            uint32_t dcache_shut_core1_bus         :    1;  /*The bit is used to disable core1 dbus, 0: enable, 1: disable*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } dcache_ctrl1;
+    union {
+        struct {
+            uint32_t dcache_tag_mem_force_on       :    1;  /*The bit is used to close clock gating of dcache tag memory. 1: close gating, 0: open clock gating.*/
+            uint32_t dcache_tag_mem_force_pd       :    1;  /*The bit is used to power dcache tag memory down, 0: follow  rtc_lslp_pd, 1: power down*/
+            uint32_t dcache_tag_mem_force_pu       :    1;  /*The bit is used to power dcache tag memory up, 0: follow  rtc_lslp_pd, 1: power up*/
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } dcache_tag_power_ctrl;
+    union {
+        struct {
+            uint32_t dcache_prelock_sct0_en        :    1;  /*The bit is used to enable the first section of prelock function.*/
+            uint32_t dcache_prelock_sct1_en        :    1;  /*The bit is used to enable the second section of prelock function.*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } dcache_prelock_ctrl;
+    uint32_t dcache_prelock_sct0_addr;
+    uint32_t dcache_prelock_sct1_addr;
+    union {
+        struct {
+            uint32_t dcache_prelock_sct1_size      :    16;  /*The bits are used to configure the second length of data locking, which is combined with DCACHE_PRELOCK_SCT1_ADDR_REG*/
+            uint32_t dcache_prelock_sct0_size      :    16;  /*The bits are used to configure the first length of data locking, which is combined with DCACHE_PRELOCK_SCT0_ADDR_REG*/
+        };
+        uint32_t val;
+    } dcache_prelock_sct_size;
+    union {
+        struct {
+            uint32_t dcache_lock_ena               :    1;  /*The bit is used to enable lock operation. It will be cleared by hardware after lock operation done.*/
+            uint32_t dcache_unlock_ena             :    1;  /*The bit is used to enable unlock operation. It will be cleared by hardware after unlock operation done.*/
+            uint32_t dcache_lock_done              :    1;  /*The bit is used to indicate unlock/lock operation is finished.*/
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } dcache_lock_ctrl;
+    uint32_t dcache_lock_addr;
+    union {
+        struct {
+            uint32_t dcache_lock_size              :    16;  /*The bits are used to configure the length for lock operations. The bits are the counts of cache block. It should be combined with DCACHE_LOCK_ADDR_REG.*/
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } dcache_lock_size;
+    union {
+        struct {
+            uint32_t dcache_invalidate_ena         :    1;  /*The bit is used to enable invalidate operation. It will be cleared by hardware after invalidate operation done.*/
+            uint32_t dcache_writeback_ena          :    1;  /*The bit is used to enable writeback operation. It will be cleared by hardware after writeback operation done.*/
+            uint32_t dcache_clean_ena              :    1;  /*The bit is used to enable clean operation. It will be cleared by hardware after clean operation done.*/
+            uint32_t dcache_sync_done              :    1;  /*The bit is used to indicate clean/writeback/invalidate operation is finished.*/
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } dcache_sync_ctrl;
+    uint32_t dcache_sync_addr;
+    union {
+        struct {
+            uint32_t dcache_sync_size              :    23;  /*The bits are used to configure the length for sync operations. The bits are the counts of cache block. It should be combined with DCACHE_SYNC_ADDR_REG.*/
+            uint32_t reserved23                    :    9;
+        };
+        uint32_t val;
+    } dcache_sync_size;
+    union {
+        struct {
+            uint32_t dcache_occupy_ena             :    1;  /*The bit is used to enable occupy operation. It will be cleared by hardware after issuing Auot-Invalidate Operation.*/
+            uint32_t dcache_occupy_done            :    1;  /*The bit is used to indicate occupy operation is finished.*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } dcache_occupy_ctrl;
+    uint32_t dcache_occupy_addr;
+    union {
+        struct {
+            uint32_t dcache_occupy_size            :    16;  /*The bits are used to configure the length for occupy operation. The bits are the counts of cache block. It should be combined with DCACHE_OCCUPY_ADDR_REG.*/
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } dcache_occupy_size;
+    union {
+        struct {
+            uint32_t dcache_preload_ena            :    1;  /*The bit is used to enable preload operation. It will be cleared by hardware after preload operation done.*/
+            uint32_t dcache_preload_done           :    1;  /*The bit is used to indicate preload operation is finished.*/
+            uint32_t dcache_preload_order          :    1;  /*The bit is used to configure the direction of preload operation. 1: descending, 0: ascending.*/
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } dcache_preload_ctrl;
+    uint32_t dcache_preload_addr;
+    union {
+        struct {
+            uint32_t dcache_preload_size           :    16;  /*The bits are used to configure the length for preload operation. The bits are the counts of cache block. It should be combined with DCACHE_PRELOAD_ADDR_REG..*/
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } dcache_preload_size;
+    union {
+        struct {
+            uint32_t dcache_autoload_sct0_ena      :    1;  /*The bits are used to enable the first section for autoload operation.*/
+            uint32_t dcache_autoload_sct1_ena      :    1;  /*The bits are used to enable the second section for autoload operation.*/
+            uint32_t dcache_autoload_ena           :    1;  /*The bit is used to enable and disable autoload operation. It is combined with dcache_autoload_done. 1: enable, 0: disable. */
+            uint32_t dcache_autoload_done          :    1;  /*The bit is used to indicate autoload operation is finished.*/
+            uint32_t dcache_autoload_order         :    1;  /*The bits are used to configure the direction of autoload. 1: descending, 0: ascending.*/
+            uint32_t dcache_autoload_rqst          :    2;  /*The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit.*/
+            uint32_t dcache_autoload_size          :    2;  /*The bits are used to configure the numbers of the cache block for the issuing autoload operation.*/
+            uint32_t dcache_autoload_buffer_clear  :    1;  /*The bit is used to clear autoload buffer in dcache.*/
+            uint32_t reserved10                    :    22;
+        };
+        uint32_t val;
+    } dcache_autoload_ctrl;
+    uint32_t dcache_autoload_sct0_addr;
+    union {
+        struct {
+            uint32_t dcache_autoload_sct0_size     :    27;  /*The bits are used to configure the length of the first section for autoload operation. It should be combined with dcache_autoload_sct0_ena.*/
+            uint32_t reserved27                    :    5;
+        };
+        uint32_t val;
+    } dcache_autoload_sct0_size;
+    uint32_t dcache_autoload_sct1_addr;
+    union {
+        struct {
+            uint32_t dcache_autoload_sct1_size     :    27;  /*The bits are used to configure the length of the second section for autoload operation. It should be combined with dcache_autoload_sct1_ena.*/
+            uint32_t reserved27                    :    5;
+        };
+        uint32_t val;
+    } dcache_autoload_sct1_size;
+    union {
+        struct {
+            uint32_t icache_enable                 :    1;  /*The bit is used to activate the data cache. 0: disable, 1: enable*/
+            uint32_t icache_way_mode               :    1;  /*The bit is used to configure cache way mode.0: 4-way, 1: 8-way*/
+            uint32_t icache_size_mode              :    1;  /*The bit is used to configure cache memory size.0: 16KB, 1: 32KB*/
+            uint32_t icache_blocksize_mode         :    1;  /*The bit is used to configure cache block size.0: 16 bytes, 1: 32 bytes*/
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } icache_ctrl;
+    union {
+        struct {
+            uint32_t icache_shut_core0_bus         :    1;  /*The bit is used to disable core0 ibus, 0: enable, 1: disable*/
+            uint32_t icache_shut_core1_bus         :    1;  /*The bit is used to disable core1 ibus, 0: enable, 1: disable*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } icache_ctrl1;
+    union {
+        struct {
+            uint32_t icache_tag_mem_force_on       :    1;  /*The bit is used to close clock gating of  icache tag memory. 1: close gating, 0: open clock gating.*/
+            uint32_t icache_tag_mem_force_pd       :    1;  /*The bit is used to power  icache tag memory down, 0: follow rtc_lslp, 1: power down*/
+            uint32_t icache_tag_mem_force_pu       :    1;  /*The bit is used to power  icache tag memory up, 0: follow rtc_lslp, 1: power up*/
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } icache_tag_power_ctrl;
+    union {
+        struct {
+            uint32_t icache_prelock_sct0_en        :    1;  /*The bit is used to enable the first section of prelock function.*/
+            uint32_t icache_prelock_sct1_en        :    1;  /*The bit is used to enable the second section of prelock function.*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } icache_prelock_ctrl;
+    uint32_t icache_prelock_sct0_addr;
+    uint32_t icache_prelock_sct1_addr;
+    union {
+        struct {
+            uint32_t icache_prelock_sct1_size      :    16;  /*The bits are used to configure the second length of data locking, which is combined with ICACHE_PRELOCK_SCT1_ADDR_REG*/
+            uint32_t icache_prelock_sct0_size      :    16;  /*The bits are used to configure the first length of data locking, which is combined with ICACHE_PRELOCK_SCT0_ADDR_REG*/
+        };
+        uint32_t val;
+    } icache_prelock_sct_size;
+    union {
+        struct {
+            uint32_t icache_lock_ena               :    1;  /*The bit is used to enable lock operation. It will be cleared by hardware after lock operation done.*/
+            uint32_t icache_unlock_ena             :    1;  /*The bit is used to enable unlock operation. It will be cleared by hardware after unlock operation done.*/
+            uint32_t icache_lock_done              :    1;  /*The bit is used to indicate unlock/lock operation is finished.*/
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } icache_lock_ctrl;
+    uint32_t icache_lock_addr;
+    union {
+        struct {
+            uint32_t icache_lock_size              :    16;  /*The bits are used to configure the length for lock operations. The bits are the counts of cache block. It should be combined with ICACHE_LOCK_ADDR_REG.*/
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } icache_lock_size;
+    union {
+        struct {
+            uint32_t icache_invalidate_ena         :    1;  /*The bit is used to enable invalidate operation. It will be cleared by hardware after invalidate operation done.*/
+            uint32_t icache_sync_done              :    1;  /*The bit is used to indicate invalidate operation is finished.*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } icache_sync_ctrl;
+    uint32_t icache_sync_addr;
+    union {
+        struct {
+            uint32_t icache_sync_size              :    23;  /*The bits are used to configure the length for sync operations. The bits are the counts of cache block. It should be combined with ICACHE_SYNC_ADDR_REG.*/
+            uint32_t reserved23                    :    9;
+        };
+        uint32_t val;
+    } icache_sync_size;
+    union {
+        struct {
+            uint32_t icache_preload_ena            :    1;  /*The bit is used to enable preload operation. It will be cleared by hardware after preload operation done.*/
+            uint32_t icache_preload_done           :    1;  /*The bit is used to indicate preload operation is finished.*/
+            uint32_t icache_preload_order          :    1;  /*The bit is used to configure the direction of preload operation. 1: descending, 0: ascending.*/
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } icache_preload_ctrl;
+    uint32_t icache_preload_addr;
+    union {
+        struct {
+            uint32_t icache_preload_size           :    16;  /*The bits are used to configure the length for preload operation. The bits are the counts of cache block. It should be combined with ICACHE_PRELOAD_ADDR_REG..*/
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } icache_preload_size;
+    union {
+        struct {
+            uint32_t icache_autoload_sct0_ena      :    1;  /*The bits are used to enable the first section for autoload operation.*/
+            uint32_t icache_autoload_sct1_ena      :    1;  /*The bits are used to enable the second section for autoload operation.*/
+            uint32_t icache_autoload_ena           :    1;  /*The bit is used to enable and disable autoload operation. It is combined with icache_autoload_done. 1: enable, 0: disable. */
+            uint32_t icache_autoload_done          :    1;  /*The bit is used to indicate autoload operation is finished.*/
+            uint32_t icache_autoload_order         :    1;  /*The bits are used to configure the direction of autoload. 1: descending, 0: ascending.*/
+            uint32_t icache_autoload_rqst          :    2;  /*The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit.*/
+            uint32_t icache_autoload_size          :    2;  /*The bits are used to configure the numbers of the cache block for the issuing autoload operation.*/
+            uint32_t icache_autoload_buffer_clear  :    1;  /*The bit is used to clear autoload buffer in icache.*/
+            uint32_t reserved10                    :    22;
+        };
+        uint32_t val;
+    } icache_autoload_ctrl;
+    uint32_t icache_autoload_sct0_addr;
+    union {
+        struct {
+            uint32_t icache_autoload_sct0_size     :    27;  /*The bits are used to configure the length of the first section for autoload operation. It should be combined with icache_autoload_sct0_ena.*/
+            uint32_t reserved27                    :    5;
+        };
+        uint32_t val;
+    } icache_autoload_sct0_size;
+    uint32_t icache_autoload_sct1_addr;
+    union {
+        struct {
+            uint32_t icache_autoload_sct1_size     :    27;  /*The bits are used to configure the length of the second section for autoload operation. It should be combined with icache_autoload_sct1_ena.*/
+            uint32_t reserved27                    :    5;
+        };
+        uint32_t val;
+    } icache_autoload_sct1_size;
+    uint32_t ibus_to_flash_start_vaddr;
+    uint32_t ibus_to_flash_end_vaddr;
+    uint32_t dbus_to_flash_start_vaddr;
+    uint32_t dbus_to_flash_end_vaddr;
+    union {
+        struct {
+            uint32_t dcache_acs_cnt_clr            :    1;  /*The bit is used to clear dcache counter.*/
+            uint32_t icache_acs_cnt_clr            :    1;  /*The bit is used to clear icache counter.*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } cache_acs_cnt_clr;
+    uint32_t ibus_acs_miss_cnt;
+    uint32_t ibus_acs_cnt;
+    uint32_t dbus_acs_flash_miss_cnt;
+    uint32_t dbus_acs_spiram_miss_cnt;
+    uint32_t dbus_acs_cnt;
+    union {
+        struct {
+            uint32_t icache_sync_op_fault          :    1;  /*The bit is used to enable interrupt by sync configurations fault.*/
+            uint32_t icache_preload_op_fault       :    1;  /*The bit is used to enable interrupt by preload configurations fault.*/
+            uint32_t dcache_sync_op_fault          :    1;  /*The bit is used to enable interrupt by sync configurations fault.*/
+            uint32_t dcache_preload_op_fault       :    1;  /*The bit is used to enable interrupt by preload configurations fault.*/
+            uint32_t dcache_write_flash            :    1;  /*The bit is used to enable interrupt by dcache trying to write flash.*/
+            uint32_t mmu_entry_fault               :    1;  /*The bit is used to enable interrupt by mmu entry fault.*/
+            uint32_t dcache_occupy_exc             :    1;  /*The bit is used to enable interrupt by dcache trying to replace a line whose blocks all have been occupied by occupy-mode.*/
+            uint32_t ibus_cnt_ovf                  :    1;  /*The bit is used to enable interrupt by ibus counter overflow.*/
+            uint32_t dbus_cnt_ovf                  :    1;  /*The bit is used to enable interrupt by dbus counter overflow.*/
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } cache_ilg_int_ena;
+    union {
+        struct {
+            uint32_t icache_sync_op_fault          :    1;  /*The bit is used to clear interrupt by sync configurations fault.*/
+            uint32_t icache_preload_op_fault       :    1;  /*The bit is used to clear interrupt by preload configurations fault.*/
+            uint32_t dcache_sync_op_fault          :    1;  /*The bit is used to clear interrupt by sync configurations fault.*/
+            uint32_t dcache_preload_op_fault       :    1;  /*The bit is used to clear interrupt by preload configurations fault.*/
+            uint32_t dcache_write_flash            :    1;  /*The bit is used to clear interrupt by dcache trying to write flash.*/
+            uint32_t mmu_entry_fault               :    1;  /*The bit is used to clear interrupt by mmu entry fault.*/
+            uint32_t dcache_occupy_exc             :    1;  /*The bit is used to clear interrupt by dcache trying to replace a line whose blocks all have been occupied by occupy-mode.*/
+            uint32_t ibus_cnt_ovf                  :    1;  /*The bit is used to clear interrupt by ibus counter overflow.*/
+            uint32_t dbus_cnt_ovf                  :    1;  /*The bit is used to clear interrupt by dbus counter overflow.*/
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } cache_ilg_int_clr;
+    union {
+        struct {
+            uint32_t icache_sync_op_fault_st       :    1;  /*The bit is used to indicate interrupt by sync configurations fault.*/
+            uint32_t icache_preload_op_fault_st    :    1;  /*The bit is used to indicate interrupt by preload configurations fault.*/
+            uint32_t dcache_sync_op_fault_st       :    1;  /*The bit is used to indicate interrupt by sync configurations fault.*/
+            uint32_t dcache_preload_op_fault_st    :    1;  /*The bit is used to indicate interrupt by preload configurations fault.*/
+            uint32_t dcache_write_flash_st         :    1;  /*The bit is used to indicate interrupt by dcache trying to write flash.*/
+            uint32_t mmu_entry_fault_st            :    1;  /*The bit is used to indicate interrupt by mmu entry fault.*/
+            uint32_t dcache_occupy_exc_st          :    1;  /*The bit is used to indicate interrupt by dcache trying to replace a line whose blocks all have been occupied by occupy-mode.*/
+            uint32_t ibus_acs_cnt_ovf_st           :    1;  /*The bit is used to indicate interrupt by ibus access flash/spiram counter overflow.*/
+            uint32_t ibus_acs_miss_cnt_ovf_st      :    1;  /*The bit is used to indicate interrupt by ibus access flash/spiram miss counter overflow.*/
+            uint32_t dbus_acs_cnt_ovf_st           :    1;  /*The bit is used to indicate interrupt by dbus access flash/spiram counter overflow.*/
+            uint32_t dbus_acs_flash_miss_cnt_ovf_st:    1;  /*The bit is used to indicate interrupt by dbus access flash miss counter overflow.*/
+            uint32_t dbus_acs_spiram_miss_cnt_ovf_st:    1;  /*The bit is used to indicate interrupt by dbus access spiram miss counter overflow.*/
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } cache_ilg_int_st;
+    union {
+        struct {
+            uint32_t core0_ibus_acs_msk_ic         :    1;  /*The bit is used to enable interrupt by cpu access icache while the corresponding ibus is disabled which include speculative access.*/
+            uint32_t core0_ibus_wr_ic              :    1;  /*The bit is used to enable interrupt by ibus trying to write icache*/
+            uint32_t core0_ibus_reject             :    1;  /*The bit is used to enable interrupt by authentication fail.*/
+            uint32_t core0_dbus_acs_msk_dc         :    1;  /*The bit is used to enable interrupt by cpu access dcache while the corresponding dbus is disabled which include speculative access.*/
+            uint32_t core0_dbus_reject             :    1;  /*The bit is used to enable interrupt by authentication fail.*/
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } core0_acs_cache_int_ena;
+    union {
+        struct {
+            uint32_t core0_ibus_acs_msk_ic         :    1;  /*The bit is used to clear interrupt by cpu access icache while the corresponding ibus is disabled or icache is disabled which include speculative access.*/
+            uint32_t core0_ibus_wr_ic              :    1;  /*The bit is used to clear interrupt by ibus trying to write icache*/
+            uint32_t core0_ibus_reject             :    1;  /*The bit is used to clear interrupt by authentication fail.*/
+            uint32_t core0_dbus_acs_msk_dc         :    1;  /*The bit is used to clear interrupt by cpu access dcache while the corresponding dbus is disabled or dcache is disabled which include speculative access.*/
+            uint32_t core0_dbus_reject             :    1;  /*The bit is used to clear interrupt by authentication fail.*/
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } core0_acs_cache_int_clr;
+    union {
+        struct {
+            uint32_t core0_ibus_acs_msk_icache_st  :    1;  /*The bit is used to indicate interrupt by cpu access  icache while the core0_ibus is disabled or icache is disabled which include speculative access.*/
+            uint32_t core0_ibus_wr_icache_st       :    1;  /*The bit is used to indicate interrupt by ibus trying to write icache*/
+            uint32_t core0_ibus_reject_st          :    1;  /*The bit is used to indicate interrupt by authentication fail.*/
+            uint32_t core0_dbus_acs_msk_dcache_st  :    1;  /*The bit is used to indicate interrupt by cpu access dcache while the core0_dbus is disabled or dcache is disabled which include speculative access.*/
+            uint32_t core0_dbus_reject_st          :    1;  /*The bit is used to indicate interrupt by authentication fail.*/
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } core0_acs_cache_int_st;
+    union {
+        struct {
+            uint32_t core1_ibus_acs_msk_ic         :    1;  /*The bit is used to enable interrupt by cpu access icache while the corresponding ibus is disabled which include speculative access.*/
+            uint32_t core1_ibus_wr_ic              :    1;  /*The bit is used to enable interrupt by ibus trying to write icache*/
+            uint32_t core1_ibus_reject             :    1;  /*The bit is used to enable interrupt by authentication fail.*/
+            uint32_t core1_dbus_acs_msk_dc         :    1;  /*The bit is used to enable interrupt by cpu access dcache while the corresponding dbus is disabled which include speculative access.*/
+            uint32_t core1_dbus_reject             :    1;  /*The bit is used to enable interrupt by authentication fail.*/
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } core1_acs_cache_int_ena;
+    union {
+        struct {
+            uint32_t core1_ibus_acs_msk_ic         :    1;  /*The bit is used to clear interrupt by cpu access icache while the corresponding ibus is disabled or icache is disabled which include speculative access.*/
+            uint32_t core1_ibus_wr_ic              :    1;  /*The bit is used to clear interrupt by ibus trying to write icache*/
+            uint32_t core1_ibus_reject             :    1;  /*The bit is used to clear interrupt by authentication fail.*/
+            uint32_t core1_dbus_acs_msk_dc         :    1;  /*The bit is used to clear interrupt by cpu access dcache while the corresponding dbus is disabled or dcache is disabled which include speculative access.*/
+            uint32_t core1_dbus_reject             :    1;  /*The bit is used to clear interrupt by authentication fail.*/
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } core1_acs_cache_int_clr;
+    union {
+        struct {
+            uint32_t core1_ibus_acs_msk_icache_st  :    1;  /*The bit is used to indicate interrupt by cpu access  icache while the core1_ibus is disabled or  icache is disabled which include speculative access.*/
+            uint32_t core1_ibus_wr_icache_st       :    1;  /*The bit is used to indicate interrupt by ibus trying to write icache*/
+            uint32_t core1_ibus_reject_st          :    1;  /*The bit is used to indicate interrupt by authentication fail.*/
+            uint32_t core1_dbus_acs_msk_dcache_st  :    1;  /*The bit is used to indicate interrupt by cpu access dcache while the core1_dbus is disabled or dcache is disabled which include speculative access.*/
+            uint32_t core1_dbus_reject_st          :    1;  /*The bit is used to indicate interrupt by authentication fail.*/
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } core1_acs_cache_int_st;
+    union {
+        struct {
+            uint32_t core0_dbus_tag_attr           :    3;  /*The bits are used to indicate the attribute of data from external memory when authentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able.*/
+            uint32_t core0_dbus_attr               :    3;  /*The bits are used to indicate the attribute of CPU access dbus when authentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able.*/
+            uint32_t core0_dbus_world              :    1;  /*The bit is used to indicate the world of CPU access dbus when authentication fail. 0: WORLD0, 1: WORLD1*/
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } core0_dbus_reject_st;
+    uint32_t core0_dbus_reject_vaddr;
+    union {
+        struct {
+            uint32_t core0_ibus_tag_attr           :    3;  /*The bits are used to indicate the attribute of data from external memory when authentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able.*/
+            uint32_t core0_ibus_attr               :    3;  /*The bits are used to indicate the attribute of CPU access ibus when authentication fail. 0: invalidate, 1: execute-able, 2: read-able*/
+            uint32_t core0_ibus_world              :    1;  /*The bit is used to indicate the world of CPU access ibus when authentication fail. 0: WORLD0, 1: WORLD1*/
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } core0_ibus_reject_st;
+    uint32_t core0_ibus_reject_vaddr;
+    union {
+        struct {
+            uint32_t core1_dbus_tag_attr           :    3;  /*The bits are used to indicate the attribute of data from external memory when authentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able.*/
+            uint32_t core1_dbus_attr               :    3;  /*The bits are used to indicate the attribute of CPU access dbus when authentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able.*/
+            uint32_t core1_dbus_world              :    1;  /*The bit is used to indicate the world of CPU access dbus when authentication fail. 0: WORLD0, 1: WORLD1*/
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } core1_dbus_reject_st;
+    uint32_t core1_dbus_reject_vaddr;
+    union {
+        struct {
+            uint32_t core1_ibus_tag_attr           :    3;  /*The bits are used to indicate the attribute of data from external memory when authentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able.*/
+            uint32_t core1_ibus_attr               :    3;  /*The bits are used to indicate the attribute of CPU access ibus when authentication fail. 0: invalidate, 1: execute-able, 2: read-able*/
+            uint32_t core1_ibus_world              :    1;  /*The bit is used to indicate the world of CPU access ibus when authentication fail. 0: WORLD0, 1: WORLD1*/
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } core1_ibus_reject_st;
+    uint32_t core1_ibus_reject_vaddr;
+    union {
+        struct {
+            uint32_t cache_mmu_fault_content       :    16;  /*The bits are used to indicate the content of mmu entry which cause mmu fault..*/
+            uint32_t cache_mmu_fault_code          :    4;  /*The right-most 3 bits are used to indicate the operations which cause mmu fault occurrence. 0: default, 1: cpu miss, 2: preload miss, 3: writeback, 4: cpu miss evict recovery address, 5: load miss evict recovery address, 6: external dma tx, 7: external dma rx. The most significant bit is used to indicate this operation occurs in which one icache. */
+            uint32_t reserved20                    :    12;
+        };
+        uint32_t val;
+    } cache_mmu_fault_content;
+    uint32_t cache_mmu_fault_vaddr;
+    union {
+        struct {
+            uint32_t cache_flash_wrap_around       :    1;  /*The bit is used to enable wrap around mode when read data from flash.*/
+            uint32_t cache_sram_rd_wrap_around     :    1;  /*The bit is used to enable wrap around mode when read data from spiram.*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } cache_wrap_around_ctrl;
+    union {
+        struct {
+            uint32_t cache_mmu_mem_force_on        :    1;  /*The bit is used to enable clock gating to save power when access mmu memory, 0: enable, 1: disable*/
+            uint32_t cache_mmu_mem_force_pd        :    1;  /*The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power down*/
+            uint32_t cache_mmu_mem_force_pu        :    1;  /*The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power up*/
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } cache_mmu_power_ctrl;
+    union {
+        struct {
+            uint32_t icache_state                  :    12;  /*The bit is used to indicate whether  icache main fsm is in idle state or not. 1: in idle state,  0: not in idle state*/
+            uint32_t dcache_state                  :    12;  /*The bit is used to indicate whether dcache main fsm is in idle state or not. 1: in idle state,  0: not in idle state*/
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } cache_state;
+    union {
+        struct {
+            uint32_t record_disable_db_encrypt     :    1;  /*Reserved.*/
+            uint32_t record_disable_g0cb_decrypt   :    1;  /*Reserved.*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } cache_encrypt_decrypt_record_disable;
+    union {
+        struct {
+            uint32_t clk_force_on_manual_crypt     :    1;  /*The bit is used to close clock gating of manual crypt clock. 1: close gating, 0: open clock gating.*/
+            uint32_t clk_force_on_auto_crypt       :    1;  /*The bit is used to close clock gating of automatic crypt clock. 1: close gating, 0: open clock gating.*/
+            uint32_t clk_force_on_crypt            :    1;  /*The bit is used to close clock gating of external memory encrypt and decrypt clock. 1: close gating, 0: open clock gating.*/
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } cache_encrypt_decrypt_clk_force_on;
+    union {
+        struct {
+            uint32_t alloc_wb_hold_arbiter         :    1;  /*Reserved.*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } cache_bridge_arbiter_ctrl;
+    union {
+        struct {
+            uint32_t icache_preload_ist            :    1;  /*The bit is used to indicate the interrupt by  icache pre-load done.*/
+            uint32_t icache_preload_iena           :    1;  /*The bit is used to enable the interrupt by  icache pre-load done.*/
+            uint32_t icache_preload_iclr           :    1;  /*The bit is used to clear the interrupt by  icache pre-load done.*/
+            uint32_t dcache_preload_ist            :    1;  /*The bit is used to indicate the interrupt by dcache pre-load done.*/
+            uint32_t dcache_preload_iena           :    1;  /*The bit is used to enable the interrupt by dcache pre-load done.*/
+            uint32_t dcache_preload_iclr           :    1;  /*The bit is used to clear the interrupt by dcache pre-load done.*/
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } cache_preload_int_ctrl;
+    union {
+        struct {
+            uint32_t icache_sync_ist               :    1;  /*The bit is used to indicate the interrupt by  icache sync done.*/
+            uint32_t icache_sync_iena              :    1;  /*The bit is used to enable the interrupt by  icache sync done.*/
+            uint32_t icache_sync_iclr              :    1;  /*The bit is used to clear the interrupt by  icache sync done.*/
+            uint32_t dcache_sync_ist               :    1;  /*The bit is used to indicate the interrupt by dcache sync done.*/
+            uint32_t dcache_sync_iena              :    1;  /*The bit is used to enable the interrupt by dcache sync done.*/
+            uint32_t dcache_sync_iclr              :    1;  /*The bit is used to clear the interrupt by dcache sync done.*/
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } cache_sync_int_ctrl;
+    union {
+        struct {
+            uint32_t cache_mmu_owner               :    24;  /*The bits are used to specify the owner of MMU.bit0: icache, bit1: dcache, bit2: dma, bit3: reserved.*/
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } cache_mmu_owner;
+    union {
+        struct {
+            uint32_t cache_ignore_preload_mmu_entry_fault:    1;  /*The bit is used to disable checking mmu entry fault by preload operation.*/
+            uint32_t cache_ignore_sync_mmu_entry_fault:    1;  /*The bit is used to disable checking mmu entry fault by sync operation.*/
+            uint32_t cache_trace_ena               :    1;  /*The bit is used to enable cache trace function.*/
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } cache_conf_misc;
+    union {
+        struct {
+            uint32_t dcache_freeze_ena             :    1;  /*The bit is used to enable dcache freeze mode*/
+            uint32_t dcache_freeze_mode            :    1;  /*The bit is used to configure freeze mode, 0:  assert busy if CPU miss 1: assert hit if CPU miss*/
+            uint32_t dcache_freeze_done            :    1;  /*The bit is used to indicate dcache freeze success*/
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } dcache_freeze;
+    union {
+        struct {
+            uint32_t icache_freeze_ena             :    1;  /*The bit is used to enable icache freeze mode*/
+            uint32_t icache_freeze_mode            :    1;  /*The bit is used to configure freeze mode, 0:  assert busy if CPU miss 1: assert hit if CPU miss*/
+            uint32_t icache_freeze_done            :    1;  /*The bit is used to indicate icache freeze success*/
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } icache_freeze;
+    union {
+        struct {
+            uint32_t icache_atomic_operate_ena     :    1;  /*The bit is used to activate icache atomic operation protection. In this case, sync/lock operation can not interrupt miss-work. This feature does not work during invalidateAll operation.*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } icache_atomic_operate_ena;
+    union {
+        struct {
+            uint32_t dcache_atomic_operate_ena     :    1;  /*The bit is used to activate dcache atomic operation protection. In this case, sync/lock/occupy operation can not interrupt miss-work. This feature does not work during invalidateAll operation.*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dcache_atomic_operate_ena;
+    union {
+        struct {
+            uint32_t cache_request_bypass          :    1;  /*The bit is used to disable request recording which could cause performance issue*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } cache_request;
+    union {
+        struct {
+            uint32_t clk_en                        :    1;  /*Reserved.*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } clock_gate;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    union {
+        struct {
+            uint32_t icache_tag_object             :    1;  /*Set this bit to set icache tag memory as object. This bit should be onehot with the others fields inside this register.*/
+            uint32_t dcache_tag_object             :    1;  /*Set this bit to set dcache tag memory as object. This bit should be onehot with the others fields inside this register.*/
+            uint32_t reserved2                     :    30;  /*Reserved*/
+        };
+        uint32_t val;
+    } cache_tag_object_ctrl;
+    union {
+        struct {
+            uint32_t cache_tag_way_object          :    3;  /*Set this bits to select which way of the tag-object will be accessed. 0: way0, 1: way1, 2: way2, 3: way3, .., 7: way7.*/
+            uint32_t reserved3                     :    29;  /*Reserved*/
+        };
+        uint32_t val;
+    } cache_tag_way_object;
+    uint32_t cache_vaddr;
+    uint32_t cache_tag_content;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    uint32_t reserved_1fc;
+    uint32_t reserved_200;
+    uint32_t reserved_204;
+    uint32_t reserved_208;
+    uint32_t reserved_20c;
+    uint32_t reserved_210;
+    uint32_t reserved_214;
+    uint32_t reserved_218;
+    uint32_t reserved_21c;
+    uint32_t reserved_220;
+    uint32_t reserved_224;
+    uint32_t reserved_228;
+    uint32_t reserved_22c;
+    uint32_t reserved_230;
+    uint32_t reserved_234;
+    uint32_t reserved_238;
+    uint32_t reserved_23c;
+    uint32_t reserved_240;
+    uint32_t reserved_244;
+    uint32_t reserved_248;
+    uint32_t reserved_24c;
+    uint32_t reserved_250;
+    uint32_t reserved_254;
+    uint32_t reserved_258;
+    uint32_t reserved_25c;
+    uint32_t reserved_260;
+    uint32_t reserved_264;
+    uint32_t reserved_268;
+    uint32_t reserved_26c;
+    uint32_t reserved_270;
+    uint32_t reserved_274;
+    uint32_t reserved_278;
+    uint32_t reserved_27c;
+    uint32_t reserved_280;
+    uint32_t reserved_284;
+    uint32_t reserved_288;
+    uint32_t reserved_28c;
+    uint32_t reserved_290;
+    uint32_t reserved_294;
+    uint32_t reserved_298;
+    uint32_t reserved_29c;
+    uint32_t reserved_2a0;
+    uint32_t reserved_2a4;
+    uint32_t reserved_2a8;
+    uint32_t reserved_2ac;
+    uint32_t reserved_2b0;
+    uint32_t reserved_2b4;
+    uint32_t reserved_2b8;
+    uint32_t reserved_2bc;
+    uint32_t reserved_2c0;
+    uint32_t reserved_2c4;
+    uint32_t reserved_2c8;
+    uint32_t reserved_2cc;
+    uint32_t reserved_2d0;
+    uint32_t reserved_2d4;
+    uint32_t reserved_2d8;
+    uint32_t reserved_2dc;
+    uint32_t reserved_2e0;
+    uint32_t reserved_2e4;
+    uint32_t reserved_2e8;
+    uint32_t reserved_2ec;
+    uint32_t reserved_2f0;
+    uint32_t reserved_2f4;
+    uint32_t reserved_2f8;
+    uint32_t reserved_2fc;
+    uint32_t reserved_300;
+    uint32_t reserved_304;
+    uint32_t reserved_308;
+    uint32_t reserved_30c;
+    uint32_t reserved_310;
+    uint32_t reserved_314;
+    uint32_t reserved_318;
+    uint32_t reserved_31c;
+    uint32_t reserved_320;
+    uint32_t reserved_324;
+    uint32_t reserved_328;
+    uint32_t reserved_32c;
+    uint32_t reserved_330;
+    uint32_t reserved_334;
+    uint32_t reserved_338;
+    uint32_t reserved_33c;
+    uint32_t reserved_340;
+    uint32_t reserved_344;
+    uint32_t reserved_348;
+    uint32_t reserved_34c;
+    uint32_t reserved_350;
+    uint32_t reserved_354;
+    uint32_t reserved_358;
+    uint32_t reserved_35c;
+    uint32_t reserved_360;
+    uint32_t reserved_364;
+    uint32_t reserved_368;
+    uint32_t reserved_36c;
+    uint32_t reserved_370;
+    uint32_t reserved_374;
+    uint32_t reserved_378;
+    uint32_t reserved_37c;
+    uint32_t reserved_380;
+    uint32_t reserved_384;
+    uint32_t reserved_388;
+    uint32_t reserved_38c;
+    uint32_t reserved_390;
+    uint32_t reserved_394;
+    uint32_t reserved_398;
+    uint32_t reserved_39c;
+    uint32_t reserved_3a0;
+    uint32_t reserved_3a4;
+    uint32_t reserved_3a8;
+    uint32_t reserved_3ac;
+    uint32_t reserved_3b0;
+    uint32_t reserved_3b4;
+    uint32_t reserved_3b8;
+    uint32_t reserved_3bc;
+    uint32_t reserved_3c0;
+    uint32_t reserved_3c4;
+    uint32_t reserved_3c8;
+    uint32_t reserved_3cc;
+    uint32_t reserved_3d0;
+    uint32_t reserved_3d4;
+    uint32_t reserved_3d8;
+    uint32_t reserved_3dc;
+    uint32_t reserved_3e0;
+    uint32_t reserved_3e4;
+    uint32_t reserved_3e8;
+    uint32_t reserved_3ec;
+    uint32_t reserved_3f0;
+    uint32_t reserved_3f4;
+    uint32_t reserved_3f8;
+    union {
+        struct {
+            uint32_t extmem_reg_date               :    28;  /*version information.*/
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } date;
+} extmem_dev_t;
+extern extmem_dev_t EXTMEM;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_EXTMEM_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/fe_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/fe_reg.h
new file mode 100644
index 00000000000..5d76651de5b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/fe_reg.h
@@ -0,0 +1,41 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc.h"
+
+/* Some of the RF frontend control registers.
+ * PU/PD fields defined here are used in sleep related functions.
+ */
+
+#define FE_GEN_CTRL (DR_REG_FE_BASE + 0x0090)
+#define FE_IQ_EST_FORCE_PU (BIT(5))
+#define FE_IQ_EST_FORCE_PU_M (BIT(5))
+#define FE_IQ_EST_FORCE_PU_V 1
+#define FE_IQ_EST_FORCE_PU_S 5
+#define FE_IQ_EST_FORCE_PD (BIT(4))
+#define FE_IQ_EST_FORCE_PD_M (BIT(4))
+#define FE_IQ_EST_FORCE_PD_V 1
+#define FE_IQ_EST_FORCE_PD_S 4
+
+#define FE2_TX_INTERP_CTRL (DR_REG_FE2_BASE + 0x00f0)
+#define FE2_TX_INF_FORCE_PU (BIT(10))
+#define FE2_TX_INF_FORCE_PU_M (BIT(10))
+#define FE2_TX_INF_FORCE_PU_V 1
+#define FE2_TX_INF_FORCE_PU_S 10
+#define FE2_TX_INF_FORCE_PD (BIT(9))
+#define FE2_TX_INF_FORCE_PD_M (BIT(9))
+#define FE2_TX_INF_FORCE_PD_V 1
+#define FE2_TX_INF_FORCE_PD_S 9
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gdma_channel.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gdma_channel.h
new file mode 100644
index 00000000000..2aaf59c35ab
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gdma_channel.h
@@ -0,0 +1,30 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+// The following macros have a format SOC_[periph][instance_id] to make it work with `GDMA_MAKE_TRIGGER`
+#define SOC_GDMA_TRIG_PERIPH_M2M0    (-1)
+#define SOC_GDMA_TRIG_PERIPH_SPI2    (0)
+#define SOC_GDMA_TRIG_PERIPH_SPI3    (1)
+#define SOC_GDMA_TRIG_PERIPH_UART0   (2)
+#define SOC_GDMA_TRIG_PERIPH_I2S0    (3)
+#define SOC_GDMA_TRIG_PERIPH_I2S1    (4)
+#define SOC_GDMA_TRIG_PERIPH_LCD0    (5)
+#define SOC_GDMA_TRIG_PERIPH_CAM0    (5)
+#define SOC_GDMA_TRIG_PERIPH_AES0    (6)
+#define SOC_GDMA_TRIG_PERIPH_SHA0    (7)
+#define SOC_GDMA_TRIG_PERIPH_ADC0    (8)
+#define SOC_GDMA_TRIG_PERIPH_DAC0    (8)
+#define SOC_GDMA_TRIG_PERIPH_RMT0    (9)
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gdma_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gdma_reg.h
new file mode 100644
index 00000000000..eb2e0dbd26c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gdma_reg.h
@@ -0,0 +1,5427 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_GDMA_REG_H_
+#define _SOC_GDMA_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define GDMA_IN_CONF0_CH0_REG          (DR_REG_GDMA_BASE + 0x0)
+/* GDMA_MEM_TRANS_EN_CH0 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit 1 to enable automatic transmitting data from memory to memory via D
+MA..*/
+#define GDMA_MEM_TRANS_EN_CH0    (BIT(4))
+#define GDMA_MEM_TRANS_EN_CH0_M  (BIT(4))
+#define GDMA_MEM_TRANS_EN_CH0_V  0x1
+#define GDMA_MEM_TRANS_EN_CH0_S  4
+/* GDMA_IN_DATA_BURST_EN_CH0 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Rx channel 0 receiving data
+when accessing internal SRAM. .*/
+#define GDMA_IN_DATA_BURST_EN_CH0    (BIT(3))
+#define GDMA_IN_DATA_BURST_EN_CH0_M  (BIT(3))
+#define GDMA_IN_DATA_BURST_EN_CH0_V  0x1
+#define GDMA_IN_DATA_BURST_EN_CH0_S  3
+/* GDMA_INDSCR_BURST_EN_CH0 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Rx channel 0 reading link de
+scriptor when accessing internal SRAM. .*/
+#define GDMA_INDSCR_BURST_EN_CH0    (BIT(2))
+#define GDMA_INDSCR_BURST_EN_CH0_M  (BIT(2))
+#define GDMA_INDSCR_BURST_EN_CH0_V  0x1
+#define GDMA_INDSCR_BURST_EN_CH0_S  2
+/* GDMA_IN_LOOP_TEST_CH0 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_LOOP_TEST_CH0    (BIT(1))
+#define GDMA_IN_LOOP_TEST_CH0_M  (BIT(1))
+#define GDMA_IN_LOOP_TEST_CH0_V  0x1
+#define GDMA_IN_LOOP_TEST_CH0_S  1
+/* GDMA_IN_RST_CH0 : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: This bit is used to reset DMA channel 0 Rx FSM and Rx FIFO pointer..*/
+#define GDMA_IN_RST_CH0    (BIT(0))
+#define GDMA_IN_RST_CH0_M  (BIT(0))
+#define GDMA_IN_RST_CH0_V  0x1
+#define GDMA_IN_RST_CH0_S  0
+
+#define GDMA_IN_CONF1_CH0_REG          (DR_REG_GDMA_BASE + 0x4)
+/* GDMA_IN_EXT_MEM_BK_SIZE_CH0 : R/W ;bitpos:[14:13] ;default: 2'b0 ; */
+/*description: Block size of Rx channel 0 when DMA access external SRAM. 0: 16 bytes      1: 32
+ bytes    2/3:reserved.*/
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH0    0x00000003
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH0_M  ((GDMA_IN_EXT_MEM_BK_SIZE_CH0_V)<<(GDMA_IN_EXT_MEM_BK_SIZE_CH0_S))
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH0_V  0x3
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH0_S  13
+/* GDMA_IN_CHECK_OWNER_CH0 : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to enable checking the owner attribute of the link descriptor..*/
+#define GDMA_IN_CHECK_OWNER_CH0    (BIT(12))
+#define GDMA_IN_CHECK_OWNER_CH0_M  (BIT(12))
+#define GDMA_IN_CHECK_OWNER_CH0_V  0x1
+#define GDMA_IN_CHECK_OWNER_CH0_S  12
+/* GDMA_DMA_INFIFO_FULL_THRS_CH0 : R/W ;bitpos:[11:0] ;default: 12'hc ; */
+/*description: This register is used to generate the INFIFO_FULL_WM_INT interrupt when Rx chann
+el 0 received byte number in Rx FIFO is up to the value of the register..*/
+#define GDMA_DMA_INFIFO_FULL_THRS_CH0    0x00000FFF
+#define GDMA_DMA_INFIFO_FULL_THRS_CH0_M  ((GDMA_DMA_INFIFO_FULL_THRS_CH0_V)<<(GDMA_DMA_INFIFO_FULL_THRS_CH0_S))
+#define GDMA_DMA_INFIFO_FULL_THRS_CH0_V  0xFFF
+#define GDMA_DMA_INFIFO_FULL_THRS_CH0_S  0
+
+#define GDMA_IN_INT_RAW_CH0_REG          (DR_REG_GDMA_BASE + 0x8)
+/* GDMA_INFIFO_UDF_L3_CH0_INT_RAW : R/WTC/SS ;bitpos:[9] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Rx channel 0 is
+underflow. .*/
+#define GDMA_INFIFO_UDF_L3_CH0_INT_RAW    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH0_INT_RAW_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH0_INT_RAW_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH0_INT_RAW_S  9
+/* GDMA_INFIFO_OVF_L3_CH0_INT_RAW : R/WTC/SS ;bitpos:[8] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Rx channel 0 is
+overflow. .*/
+#define GDMA_INFIFO_OVF_L3_CH0_INT_RAW    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH0_INT_RAW_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH0_INT_RAW_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH0_INT_RAW_S  8
+/* GDMA_INFIFO_UDF_L1_CH0_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Rx channel 0 is
+underflow. .*/
+#define GDMA_INFIFO_UDF_L1_CH0_INT_RAW    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH0_INT_RAW_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH0_INT_RAW_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH0_INT_RAW_S  7
+/* GDMA_INFIFO_OVF_L1_CH0_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Rx channel 0 is
+overflow. .*/
+#define GDMA_INFIFO_OVF_L1_CH0_INT_RAW    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH0_INT_RAW_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH0_INT_RAW_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH0_INT_RAW_S  6
+/* GDMA_INFIFO_FULL_WM_CH0_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when received data byte number is up t
+o threshold configured by REG_DMA_INFIFO_FULL_THRS_CH0 in Rx FIFO of channel 0..*/
+#define GDMA_INFIFO_FULL_WM_CH0_INT_RAW    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH0_INT_RAW_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH0_INT_RAW_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH0_INT_RAW_S  5
+/* GDMA_IN_DSCR_EMPTY_CH0_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when Rx buffer pointed by inlink is fu
+ll and receiving data is not completed, but there is no more inlink for Rx chann
+el 0..*/
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_RAW    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_RAW_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_RAW_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_RAW_S  4
+/* GDMA_IN_DSCR_ERR_CH0_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when detecting inlink descriptor error
+, including owner error, the second and third word error of inlink descriptor fo
+r Rx channel 0..*/
+#define GDMA_IN_DSCR_ERR_CH0_INT_RAW    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH0_INT_RAW_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH0_INT_RAW_V  0x1
+#define GDMA_IN_DSCR_ERR_CH0_INT_RAW_S  3
+/* GDMA_IN_ERR_EOF_CH0_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when data error is detected only in th
+e case that the peripheral is UHCI0 for Rx channel 0. For other peripherals, thi
+s raw interrupt is reserved..*/
+#define GDMA_IN_ERR_EOF_CH0_INT_RAW    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH0_INT_RAW_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH0_INT_RAW_V  0x1
+#define GDMA_IN_ERR_EOF_CH0_INT_RAW_S  2
+/* GDMA_IN_SUC_EOF_CH0_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one inli
+nk descriptor has been received for Rx channel 0. For UHCI0, the raw interrupt b
+it turns to high level when the last data pointed by one inlink descriptor has b
+een received and no data error is detected for Rx channel 0..*/
+#define GDMA_IN_SUC_EOF_CH0_INT_RAW    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH0_INT_RAW_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH0_INT_RAW_V  0x1
+#define GDMA_IN_SUC_EOF_CH0_INT_RAW_S  1
+/* GDMA_IN_DONE_CH0_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one inli
+nk descriptor has been received for Rx channel 0..*/
+#define GDMA_IN_DONE_CH0_INT_RAW    (BIT(0))
+#define GDMA_IN_DONE_CH0_INT_RAW_M  (BIT(0))
+#define GDMA_IN_DONE_CH0_INT_RAW_V  0x1
+#define GDMA_IN_DONE_CH0_INT_RAW_S  0
+
+#define GDMA_IN_INT_ST_CH0_REG          (DR_REG_GDMA_BASE + 0xC)
+/* GDMA_INFIFO_UDF_L3_CH0_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH0_INT_ST    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH0_INT_ST_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH0_INT_ST_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH0_INT_ST_S  9
+/* GDMA_INFIFO_OVF_L3_CH0_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH0_INT_ST    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH0_INT_ST_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH0_INT_ST_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH0_INT_ST_S  8
+/* GDMA_INFIFO_UDF_L1_CH0_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH0_INT_ST    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH0_INT_ST_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH0_INT_ST_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH0_INT_ST_S  7
+/* GDMA_INFIFO_OVF_L1_CH0_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH0_INT_ST    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH0_INT_ST_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH0_INT_ST_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH0_INT_ST_S  6
+/* GDMA_INFIFO_FULL_WM_CH0_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_INFIFO_FULL_WM_CH0_INT_ST    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH0_INT_ST_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH0_INT_ST_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH0_INT_ST_S  5
+/* GDMA_IN_DSCR_EMPTY_CH0_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_ST    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_ST_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_ST_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_ST_S  4
+/* GDMA_IN_DSCR_ERR_CH0_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH0_INT_ST    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH0_INT_ST_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH0_INT_ST_V  0x1
+#define GDMA_IN_DSCR_ERR_CH0_INT_ST_S  3
+/* GDMA_IN_ERR_EOF_CH0_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH0_INT_ST    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH0_INT_ST_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH0_INT_ST_V  0x1
+#define GDMA_IN_ERR_EOF_CH0_INT_ST_S  2
+/* GDMA_IN_SUC_EOF_CH0_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH0_INT_ST    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH0_INT_ST_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH0_INT_ST_V  0x1
+#define GDMA_IN_SUC_EOF_CH0_INT_ST_S  1
+/* GDMA_IN_DONE_CH0_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH0_INT_ST    (BIT(0))
+#define GDMA_IN_DONE_CH0_INT_ST_M  (BIT(0))
+#define GDMA_IN_DONE_CH0_INT_ST_V  0x1
+#define GDMA_IN_DONE_CH0_INT_ST_S  0
+
+#define GDMA_IN_INT_ENA_CH0_REG          (DR_REG_GDMA_BASE + 0x10)
+/* GDMA_INFIFO_UDF_L3_CH0_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH0_INT_ENA    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH0_INT_ENA_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH0_INT_ENA_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH0_INT_ENA_S  9
+/* GDMA_INFIFO_OVF_L3_CH0_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH0_INT_ENA    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH0_INT_ENA_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH0_INT_ENA_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH0_INT_ENA_S  8
+/* GDMA_INFIFO_UDF_L1_CH0_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH0_INT_ENA    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH0_INT_ENA_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH0_INT_ENA_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH0_INT_ENA_S  7
+/* GDMA_INFIFO_OVF_L1_CH0_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH0_INT_ENA    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH0_INT_ENA_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH0_INT_ENA_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH0_INT_ENA_S  6
+/* GDMA_INFIFO_FULL_WM_CH0_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_INFIFO_FULL_WM_CH0_INT_ENA    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH0_INT_ENA_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH0_INT_ENA_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH0_INT_ENA_S  5
+/* GDMA_IN_DSCR_EMPTY_CH0_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_ENA    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_ENA_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_ENA_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_ENA_S  4
+/* GDMA_IN_DSCR_ERR_CH0_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH0_INT_ENA    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH0_INT_ENA_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH0_INT_ENA_V  0x1
+#define GDMA_IN_DSCR_ERR_CH0_INT_ENA_S  3
+/* GDMA_IN_ERR_EOF_CH0_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH0_INT_ENA    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH0_INT_ENA_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH0_INT_ENA_V  0x1
+#define GDMA_IN_ERR_EOF_CH0_INT_ENA_S  2
+/* GDMA_IN_SUC_EOF_CH0_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH0_INT_ENA    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH0_INT_ENA_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH0_INT_ENA_V  0x1
+#define GDMA_IN_SUC_EOF_CH0_INT_ENA_S  1
+/* GDMA_IN_DONE_CH0_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH0_INT_ENA    (BIT(0))
+#define GDMA_IN_DONE_CH0_INT_ENA_M  (BIT(0))
+#define GDMA_IN_DONE_CH0_INT_ENA_V  0x1
+#define GDMA_IN_DONE_CH0_INT_ENA_S  0
+
+#define GDMA_IN_INT_CLR_CH0_REG          (DR_REG_GDMA_BASE + 0x14)
+/* GDMA_INFIFO_UDF_L3_CH0_INT_CLR : WT ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH0_INT_CLR    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH0_INT_CLR_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH0_INT_CLR_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH0_INT_CLR_S  9
+/* GDMA_INFIFO_OVF_L3_CH0_INT_CLR : WT ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH0_INT_CLR    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH0_INT_CLR_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH0_INT_CLR_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH0_INT_CLR_S  8
+/* GDMA_INFIFO_UDF_L1_CH0_INT_CLR : WT ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH0_INT_CLR    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH0_INT_CLR_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH0_INT_CLR_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH0_INT_CLR_S  7
+/* GDMA_INFIFO_OVF_L1_CH0_INT_CLR : WT ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH0_INT_CLR    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH0_INT_CLR_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH0_INT_CLR_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH0_INT_CLR_S  6
+/* GDMA_DMA_INFIFO_FULL_WM_CH0_INT_CLR : WT ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_DMA_INFIFO_FULL_WM_CH0_INT_CLR    (BIT(5))
+#define GDMA_DMA_INFIFO_FULL_WM_CH0_INT_CLR_M  (BIT(5))
+#define GDMA_DMA_INFIFO_FULL_WM_CH0_INT_CLR_V  0x1
+#define GDMA_DMA_INFIFO_FULL_WM_CH0_INT_CLR_S  5
+/* GDMA_IN_DSCR_EMPTY_CH0_INT_CLR : WT ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_CLR    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_CLR_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_CLR_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH0_INT_CLR_S  4
+/* GDMA_IN_DSCR_ERR_CH0_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH0_INT_CLR    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH0_INT_CLR_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH0_INT_CLR_V  0x1
+#define GDMA_IN_DSCR_ERR_CH0_INT_CLR_S  3
+/* GDMA_IN_ERR_EOF_CH0_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH0_INT_CLR    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH0_INT_CLR_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH0_INT_CLR_V  0x1
+#define GDMA_IN_ERR_EOF_CH0_INT_CLR_S  2
+/* GDMA_IN_SUC_EOF_CH0_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH0_INT_CLR    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH0_INT_CLR_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH0_INT_CLR_V  0x1
+#define GDMA_IN_SUC_EOF_CH0_INT_CLR_S  1
+/* GDMA_IN_DONE_CH0_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH0_INT_CLR    (BIT(0))
+#define GDMA_IN_DONE_CH0_INT_CLR_M  (BIT(0))
+#define GDMA_IN_DONE_CH0_INT_CLR_V  0x1
+#define GDMA_IN_DONE_CH0_INT_CLR_S  0
+
+#define GDMA_INFIFO_STATUS_CH0_REG          (DR_REG_GDMA_BASE + 0x18)
+/* GDMA_IN_BUF_HUNGRY_CH0 : RO ;bitpos:[28] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_BUF_HUNGRY_CH0    (BIT(28))
+#define GDMA_IN_BUF_HUNGRY_CH0_M  (BIT(28))
+#define GDMA_IN_BUF_HUNGRY_CH0_V  0x1
+#define GDMA_IN_BUF_HUNGRY_CH0_S  28
+/* GDMA_IN_REMAIN_UNDER_4B_L3_CH0 : RO ;bitpos:[27] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH0    (BIT(27))
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH0_M  (BIT(27))
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH0_V  0x1
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH0_S  27
+/* GDMA_IN_REMAIN_UNDER_3B_L3_CH0 : RO ;bitpos:[26] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH0    (BIT(26))
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH0_M  (BIT(26))
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH0_V  0x1
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH0_S  26
+/* GDMA_IN_REMAIN_UNDER_2B_L3_CH0 : RO ;bitpos:[25] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH0    (BIT(25))
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH0_M  (BIT(25))
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH0_V  0x1
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH0_S  25
+/* GDMA_IN_REMAIN_UNDER_1B_L3_CH0 : RO ;bitpos:[24] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH0    (BIT(24))
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH0_M  (BIT(24))
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH0_V  0x1
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH0_S  24
+/* GDMA_INFIFO_CNT_L3_CH0 : RO ;bitpos:[23:19] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L3 Rx FIFO for Rx channel 0..*/
+#define GDMA_INFIFO_CNT_L3_CH0    0x0000001F
+#define GDMA_INFIFO_CNT_L3_CH0_M  ((GDMA_INFIFO_CNT_L3_CH0_V)<<(GDMA_INFIFO_CNT_L3_CH0_S))
+#define GDMA_INFIFO_CNT_L3_CH0_V  0x1F
+#define GDMA_INFIFO_CNT_L3_CH0_S  19
+/* GDMA_INFIFO_CNT_L2_CH0 : RO ;bitpos:[18:12] ;default: 7'b0 ; */
+/*description: The register stores the byte number of the data in L2 Rx FIFO for Rx channel 0..*/
+#define GDMA_INFIFO_CNT_L2_CH0    0x0000007F
+#define GDMA_INFIFO_CNT_L2_CH0_M  ((GDMA_INFIFO_CNT_L2_CH0_V)<<(GDMA_INFIFO_CNT_L2_CH0_S))
+#define GDMA_INFIFO_CNT_L2_CH0_V  0x7F
+#define GDMA_INFIFO_CNT_L2_CH0_S  12
+/* GDMA_INFIFO_CNT_L1_CH0 : RO ;bitpos:[11:6] ;default: 6'b0 ; */
+/*description: The register stores the byte number of the data in L1 Rx FIFO for Rx channel 0..*/
+#define GDMA_INFIFO_CNT_L1_CH0    0x0000003F
+#define GDMA_INFIFO_CNT_L1_CH0_M  ((GDMA_INFIFO_CNT_L1_CH0_V)<<(GDMA_INFIFO_CNT_L1_CH0_S))
+#define GDMA_INFIFO_CNT_L1_CH0_V  0x3F
+#define GDMA_INFIFO_CNT_L1_CH0_S  6
+/* GDMA_INFIFO_EMPTY_L3_CH0 : RO ;bitpos:[5] ;default: 1'b1 ; */
+/*description: L3 Rx FIFO empty signal for Rx channel 0..*/
+#define GDMA_INFIFO_EMPTY_L3_CH0    (BIT(5))
+#define GDMA_INFIFO_EMPTY_L3_CH0_M  (BIT(5))
+#define GDMA_INFIFO_EMPTY_L3_CH0_V  0x1
+#define GDMA_INFIFO_EMPTY_L3_CH0_S  5
+/* GDMA_INFIFO_FULL_L3_CH0 : RO ;bitpos:[4] ;default: 1'b1 ; */
+/*description: L3 Rx FIFO full signal for Rx channel 0..*/
+#define GDMA_INFIFO_FULL_L3_CH0    (BIT(4))
+#define GDMA_INFIFO_FULL_L3_CH0_M  (BIT(4))
+#define GDMA_INFIFO_FULL_L3_CH0_V  0x1
+#define GDMA_INFIFO_FULL_L3_CH0_S  4
+/* GDMA_INFIFO_EMPTY_L2_CH0 : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: L2 Rx FIFO empty signal for Rx channel 0..*/
+#define GDMA_INFIFO_EMPTY_L2_CH0    (BIT(3))
+#define GDMA_INFIFO_EMPTY_L2_CH0_M  (BIT(3))
+#define GDMA_INFIFO_EMPTY_L2_CH0_V  0x1
+#define GDMA_INFIFO_EMPTY_L2_CH0_S  3
+/* GDMA_INFIFO_FULL_L2_CH0 : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: L2 Rx FIFO full signal for Rx channel 0..*/
+#define GDMA_INFIFO_FULL_L2_CH0    (BIT(2))
+#define GDMA_INFIFO_FULL_L2_CH0_M  (BIT(2))
+#define GDMA_INFIFO_FULL_L2_CH0_V  0x1
+#define GDMA_INFIFO_FULL_L2_CH0_S  2
+/* GDMA_INFIFO_EMPTY_L1_CH0 : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: L1 Rx FIFO empty signal for Rx channel 0..*/
+#define GDMA_INFIFO_EMPTY_L1_CH0    (BIT(1))
+#define GDMA_INFIFO_EMPTY_L1_CH0_M  (BIT(1))
+#define GDMA_INFIFO_EMPTY_L1_CH0_V  0x1
+#define GDMA_INFIFO_EMPTY_L1_CH0_S  1
+/* GDMA_INFIFO_FULL_L1_CH0 : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: L1 Rx FIFO full signal for Rx channel 0..*/
+#define GDMA_INFIFO_FULL_L1_CH0    (BIT(0))
+#define GDMA_INFIFO_FULL_L1_CH0_M  (BIT(0))
+#define GDMA_INFIFO_FULL_L1_CH0_V  0x1
+#define GDMA_INFIFO_FULL_L1_CH0_S  0
+
+#define GDMA_IN_POP_CH0_REG          (DR_REG_GDMA_BASE + 0x1C)
+/* GDMA_INFIFO_POP_CH0 : R/W/SC ;bitpos:[12] ;default: 1'h0 ; */
+/*description: Set this bit to pop data from DMA FIFO..*/
+#define GDMA_INFIFO_POP_CH0    (BIT(12))
+#define GDMA_INFIFO_POP_CH0_M  (BIT(12))
+#define GDMA_INFIFO_POP_CH0_V  0x1
+#define GDMA_INFIFO_POP_CH0_S  12
+/* GDMA_INFIFO_RDATA_CH0 : RO ;bitpos:[11:0] ;default: 12'h800 ; */
+/*description: This register stores the data popping from DMA FIFO..*/
+#define GDMA_INFIFO_RDATA_CH0    0x00000FFF
+#define GDMA_INFIFO_RDATA_CH0_M  ((GDMA_INFIFO_RDATA_CH0_V)<<(GDMA_INFIFO_RDATA_CH0_S))
+#define GDMA_INFIFO_RDATA_CH0_V  0xFFF
+#define GDMA_INFIFO_RDATA_CH0_S  0
+
+#define GDMA_IN_LINK_CH0_REG          (DR_REG_GDMA_BASE + 0x20)
+/* GDMA_INLINK_PARK_CH0 : RO ;bitpos:[24] ;default: 1'h1 ; */
+/*description: 1: the inlink descriptor's FSM is in idle state.  0: the inlink descriptor's FSM
+ is working..*/
+#define GDMA_INLINK_PARK_CH0    (BIT(24))
+#define GDMA_INLINK_PARK_CH0_M  (BIT(24))
+#define GDMA_INLINK_PARK_CH0_V  0x1
+#define GDMA_INLINK_PARK_CH0_S  24
+/* GDMA_INLINK_RESTART_CH0 : R/W/SC ;bitpos:[23] ;default: 1'b0 ; */
+/*description: Set this bit to mount a new inlink descriptor..*/
+#define GDMA_INLINK_RESTART_CH0    (BIT(23))
+#define GDMA_INLINK_RESTART_CH0_M  (BIT(23))
+#define GDMA_INLINK_RESTART_CH0_V  0x1
+#define GDMA_INLINK_RESTART_CH0_S  23
+/* GDMA_INLINK_START_CH0 : R/W/SC ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Set this bit to start dealing with the inlink descriptors..*/
+#define GDMA_INLINK_START_CH0    (BIT(22))
+#define GDMA_INLINK_START_CH0_M  (BIT(22))
+#define GDMA_INLINK_START_CH0_V  0x1
+#define GDMA_INLINK_START_CH0_S  22
+/* GDMA_INLINK_STOP_CH0 : R/W/SC ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to stop dealing with the inlink descriptors..*/
+#define GDMA_INLINK_STOP_CH0    (BIT(21))
+#define GDMA_INLINK_STOP_CH0_M  (BIT(21))
+#define GDMA_INLINK_STOP_CH0_V  0x1
+#define GDMA_INLINK_STOP_CH0_S  21
+/* GDMA_INLINK_AUTO_RET_CH0 : R/W ;bitpos:[20] ;default: 1'b1 ; */
+/*description: Set this bit to return to current inlink descriptor's address, when there are so
+me errors in current receiving data..*/
+#define GDMA_INLINK_AUTO_RET_CH0    (BIT(20))
+#define GDMA_INLINK_AUTO_RET_CH0_M  (BIT(20))
+#define GDMA_INLINK_AUTO_RET_CH0_V  0x1
+#define GDMA_INLINK_AUTO_RET_CH0_S  20
+/* GDMA_INLINK_ADDR_CH0 : R/W ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: This register stores the 20 least significant bits of the first inlink descripto
+r's address..*/
+#define GDMA_INLINK_ADDR_CH0    0x000FFFFF
+#define GDMA_INLINK_ADDR_CH0_M  ((GDMA_INLINK_ADDR_CH0_V)<<(GDMA_INLINK_ADDR_CH0_S))
+#define GDMA_INLINK_ADDR_CH0_V  0xFFFFF
+#define GDMA_INLINK_ADDR_CH0_S  0
+
+#define GDMA_IN_STATE_CH0_REG          (DR_REG_GDMA_BASE + 0x24)
+/* GDMA_IN_STATE_CH0 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_STATE_CH0    0x00000007
+#define GDMA_IN_STATE_CH0_M  ((GDMA_IN_STATE_CH0_V)<<(GDMA_IN_STATE_CH0_S))
+#define GDMA_IN_STATE_CH0_V  0x7
+#define GDMA_IN_STATE_CH0_S  20
+/* GDMA_IN_DSCR_STATE_CH0 : RO ;bitpos:[19:18] ;default: 2'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_DSCR_STATE_CH0    0x00000003
+#define GDMA_IN_DSCR_STATE_CH0_M  ((GDMA_IN_DSCR_STATE_CH0_V)<<(GDMA_IN_DSCR_STATE_CH0_S))
+#define GDMA_IN_DSCR_STATE_CH0_V  0x3
+#define GDMA_IN_DSCR_STATE_CH0_S  18
+/* GDMA_INLINK_DSCR_ADDR_CH0 : RO ;bitpos:[17:0] ;default: 18'b0 ; */
+/*description: This register stores the current inlink descriptor's address..*/
+#define GDMA_INLINK_DSCR_ADDR_CH0    0x0003FFFF
+#define GDMA_INLINK_DSCR_ADDR_CH0_M  ((GDMA_INLINK_DSCR_ADDR_CH0_V)<<(GDMA_INLINK_DSCR_ADDR_CH0_S))
+#define GDMA_INLINK_DSCR_ADDR_CH0_V  0x3FFFF
+#define GDMA_INLINK_DSCR_ADDR_CH0_S  0
+
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH0_REG          (DR_REG_GDMA_BASE + 0x28)
+/* GDMA_IN_SUC_EOF_DES_ADDR_CH0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the inlink descriptor when the EOF bit in th
+is descriptor is 1..*/
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH0    0xFFFFFFFF
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH0_M  ((GDMA_IN_SUC_EOF_DES_ADDR_CH0_V)<<(GDMA_IN_SUC_EOF_DES_ADDR_CH0_S))
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH0_V  0xFFFFFFFF
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH0_S  0
+
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH0_REG          (DR_REG_GDMA_BASE + 0x2C)
+/* GDMA_IN_ERR_EOF_DES_ADDR_CH0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the inlink descriptor when there are some er
+rors in current receiving data. Only used when peripheral is UHCI0..*/
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH0    0xFFFFFFFF
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH0_M  ((GDMA_IN_ERR_EOF_DES_ADDR_CH0_V)<<(GDMA_IN_ERR_EOF_DES_ADDR_CH0_S))
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH0_V  0xFFFFFFFF
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH0_S  0
+
+#define GDMA_IN_DSCR_CH0_REG          (DR_REG_GDMA_BASE + 0x30)
+/* GDMA_INLINK_DSCR_CH0 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the current inlink descriptor x..*/
+#define GDMA_INLINK_DSCR_CH0    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_CH0_M  ((GDMA_INLINK_DSCR_CH0_V)<<(GDMA_INLINK_DSCR_CH0_S))
+#define GDMA_INLINK_DSCR_CH0_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_CH0_S  0
+
+#define GDMA_IN_DSCR_BF0_CH0_REG          (DR_REG_GDMA_BASE + 0x34)
+/* GDMA_INLINK_DSCR_BF0_CH0 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the last inlink descriptor x-1..*/
+#define GDMA_INLINK_DSCR_BF0_CH0    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF0_CH0_M  ((GDMA_INLINK_DSCR_BF0_CH0_V)<<(GDMA_INLINK_DSCR_BF0_CH0_S))
+#define GDMA_INLINK_DSCR_BF0_CH0_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF0_CH0_S  0
+
+#define GDMA_IN_DSCR_BF1_CH0_REG          (DR_REG_GDMA_BASE + 0x38)
+/* GDMA_INLINK_DSCR_BF1_CH0 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the second-to-last inlink descriptor x-2..*/
+#define GDMA_INLINK_DSCR_BF1_CH0    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF1_CH0_M  ((GDMA_INLINK_DSCR_BF1_CH0_V)<<(GDMA_INLINK_DSCR_BF1_CH0_S))
+#define GDMA_INLINK_DSCR_BF1_CH0_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF1_CH0_S  0
+
+#define GDMA_IN_WIGHT_CH0_REG          (DR_REG_GDMA_BASE + 0x3C)
+/* GDMA_RX_WEIGHT_CH0 : R/W ;bitpos:[11:8] ;default: 4'hf ; */
+/*description: The weight of Rx channel 0. .*/
+#define GDMA_RX_WEIGHT_CH0    0x0000000F
+#define GDMA_RX_WEIGHT_CH0_M  ((GDMA_RX_WEIGHT_CH0_V)<<(GDMA_RX_WEIGHT_CH0_S))
+#define GDMA_RX_WEIGHT_CH0_V  0xF
+#define GDMA_RX_WEIGHT_CH0_S  8
+
+#define GDMA_IN_PRI_CH0_REG          (DR_REG_GDMA_BASE + 0x44)
+/* GDMA_RX_PRI_CH0 : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: The priority of Rx channel 0. The larger of the value, the higher of the priorit
+y..*/
+#define GDMA_RX_PRI_CH0    0x0000000F
+#define GDMA_RX_PRI_CH0_M  ((GDMA_RX_PRI_CH0_V)<<(GDMA_RX_PRI_CH0_S))
+#define GDMA_RX_PRI_CH0_V  0xF
+#define GDMA_RX_PRI_CH0_S  0
+
+#define GDMA_IN_PERI_SEL_CH0_REG          (DR_REG_GDMA_BASE + 0x48)
+/* GDMA_PERI_IN_SEL_CH0 : R/W ;bitpos:[5:0] ;default: 6'h3f ; */
+/*description: This register is used to select peripheral for Rx channel 0. 0:SPI2. 1: SPI3. 2:
+ UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT..*/
+#define GDMA_PERI_IN_SEL_CH0    0x0000003F
+#define GDMA_PERI_IN_SEL_CH0_M  ((GDMA_PERI_IN_SEL_CH0_V)<<(GDMA_PERI_IN_SEL_CH0_S))
+#define GDMA_PERI_IN_SEL_CH0_V  0x3F
+#define GDMA_PERI_IN_SEL_CH0_S  0
+
+#define GDMA_OUT_CONF0_CH0_REG          (DR_REG_GDMA_BASE + 0x60)
+/* GDMA_OUT_DATA_BURST_EN_CH0 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Tx channel 0 transmitting da
+ta when accessing internal SRAM. .*/
+#define GDMA_OUT_DATA_BURST_EN_CH0    (BIT(5))
+#define GDMA_OUT_DATA_BURST_EN_CH0_M  (BIT(5))
+#define GDMA_OUT_DATA_BURST_EN_CH0_V  0x1
+#define GDMA_OUT_DATA_BURST_EN_CH0_S  5
+/* GDMA_OUTDSCR_BURST_EN_CH0 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Tx channel 0 reading link de
+scriptor when accessing internal SRAM. .*/
+#define GDMA_OUTDSCR_BURST_EN_CH0    (BIT(4))
+#define GDMA_OUTDSCR_BURST_EN_CH0_M  (BIT(4))
+#define GDMA_OUTDSCR_BURST_EN_CH0_V  0x1
+#define GDMA_OUTDSCR_BURST_EN_CH0_S  4
+/* GDMA_OUT_EOF_MODE_CH0 : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: EOF flag generation mode when transmitting data. 1: EOF flag for Tx channel 0 is
+ generated when data need to transmit has been popped from FIFO in DMA.*/
+#define GDMA_OUT_EOF_MODE_CH0    (BIT(3))
+#define GDMA_OUT_EOF_MODE_CH0_M  (BIT(3))
+#define GDMA_OUT_EOF_MODE_CH0_V  0x1
+#define GDMA_OUT_EOF_MODE_CH0_S  3
+/* GDMA_OUT_AUTO_WRBACK_CH0 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to enable automatic outlink-writeback when all the data in tx buffe
+r has been transmitted..*/
+#define GDMA_OUT_AUTO_WRBACK_CH0    (BIT(2))
+#define GDMA_OUT_AUTO_WRBACK_CH0_M  (BIT(2))
+#define GDMA_OUT_AUTO_WRBACK_CH0_V  0x1
+#define GDMA_OUT_AUTO_WRBACK_CH0_S  2
+/* GDMA_OUT_LOOP_TEST_CH0 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_LOOP_TEST_CH0    (BIT(1))
+#define GDMA_OUT_LOOP_TEST_CH0_M  (BIT(1))
+#define GDMA_OUT_LOOP_TEST_CH0_V  0x1
+#define GDMA_OUT_LOOP_TEST_CH0_S  1
+/* GDMA_OUT_RST_CH0 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to reset DMA channel 0 Tx FSM and Tx FIFO pointer..*/
+#define GDMA_OUT_RST_CH0    (BIT(0))
+#define GDMA_OUT_RST_CH0_M  (BIT(0))
+#define GDMA_OUT_RST_CH0_V  0x1
+#define GDMA_OUT_RST_CH0_S  0
+
+#define GDMA_OUT_CONF1_CH0_REG          (DR_REG_GDMA_BASE + 0x64)
+/* GDMA_OUT_EXT_MEM_BK_SIZE_CH0 : R/W ;bitpos:[14:13] ;default: 2'b0 ; */
+/*description: Block size of Tx channel 0 when DMA access external SRAM. 0: 16 bytes      1: 32
+ bytes    2/3:reserved.*/
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH0    0x00000003
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH0_M  ((GDMA_OUT_EXT_MEM_BK_SIZE_CH0_V)<<(GDMA_OUT_EXT_MEM_BK_SIZE_CH0_S))
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH0_V  0x3
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH0_S  13
+/* GDMA_OUT_CHECK_OWNER_CH0 : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to enable checking the owner attribute of the link descriptor..*/
+#define GDMA_OUT_CHECK_OWNER_CH0    (BIT(12))
+#define GDMA_OUT_CHECK_OWNER_CH0_M  (BIT(12))
+#define GDMA_OUT_CHECK_OWNER_CH0_V  0x1
+#define GDMA_OUT_CHECK_OWNER_CH0_S  12
+
+#define GDMA_OUT_INT_RAW_CH0_REG          (DR_REG_GDMA_BASE + 0x68)
+/* GDMA_OUTFIFO_UDF_L3_CH0_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Tx channel 0 is
+underflow. .*/
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_RAW    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_RAW_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_RAW_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH0_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Tx channel 0 is
+overflow. .*/
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_RAW    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_RAW_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_RAW_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH0_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Tx channel 0 is
+underflow. .*/
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_RAW    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_RAW_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_RAW_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH0_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Tx channel 0 is
+overflow. .*/
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_RAW    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_RAW_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_RAW_S  4
+/* GDMA_OUT_TOTAL_EOF_CH0_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when data corresponding a outlink (inc
+ludes one link descriptor or few link descriptors) is transmitted out for Tx cha
+nnel 0..*/
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_RAW    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_RAW_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_RAW_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_RAW_S  3
+/* GDMA_OUT_DSCR_ERR_CH0_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when detecting outlink descriptor erro
+r, including owner error, the second and third word error of outlink descriptor
+for Tx channel 0..*/
+#define GDMA_OUT_DSCR_ERR_CH0_INT_RAW    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH0_INT_RAW_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH0_INT_RAW_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH0_INT_RAW_S  2
+/* GDMA_OUT_EOF_CH0_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one outl
+ink descriptor has been read from memory for Tx channel 0. .*/
+#define GDMA_OUT_EOF_CH0_INT_RAW    (BIT(1))
+#define GDMA_OUT_EOF_CH0_INT_RAW_M  (BIT(1))
+#define GDMA_OUT_EOF_CH0_INT_RAW_V  0x1
+#define GDMA_OUT_EOF_CH0_INT_RAW_S  1
+/* GDMA_OUT_DONE_CH0_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one outl
+ink descriptor has been transmitted to peripherals for Tx channel 0..*/
+#define GDMA_OUT_DONE_CH0_INT_RAW    (BIT(0))
+#define GDMA_OUT_DONE_CH0_INT_RAW_M  (BIT(0))
+#define GDMA_OUT_DONE_CH0_INT_RAW_V  0x1
+#define GDMA_OUT_DONE_CH0_INT_RAW_S  0
+
+#define GDMA_OUT_INT_ST_CH0_REG          (DR_REG_GDMA_BASE + 0x6C)
+/* GDMA_OUTFIFO_UDF_L3_CH0_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_ST    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_ST_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_ST_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_ST_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH0_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_ST    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_ST_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_ST_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_ST_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH0_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_ST    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_ST_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_ST_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_ST_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH0_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_ST    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_ST_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_ST_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_ST_S  4
+/* GDMA_OUT_TOTAL_EOF_CH0_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_ST    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_ST_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_ST_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_ST_S  3
+/* GDMA_OUT_DSCR_ERR_CH0_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH0_INT_ST    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH0_INT_ST_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH0_INT_ST_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH0_INT_ST_S  2
+/* GDMA_OUT_EOF_CH0_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH0_INT_ST    (BIT(1))
+#define GDMA_OUT_EOF_CH0_INT_ST_M  (BIT(1))
+#define GDMA_OUT_EOF_CH0_INT_ST_V  0x1
+#define GDMA_OUT_EOF_CH0_INT_ST_S  1
+/* GDMA_OUT_DONE_CH0_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH0_INT_ST    (BIT(0))
+#define GDMA_OUT_DONE_CH0_INT_ST_M  (BIT(0))
+#define GDMA_OUT_DONE_CH0_INT_ST_V  0x1
+#define GDMA_OUT_DONE_CH0_INT_ST_S  0
+
+#define GDMA_OUT_INT_ENA_CH0_REG          (DR_REG_GDMA_BASE + 0x70)
+/* GDMA_OUTFIFO_UDF_L3_CH0_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_ENA    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_ENA_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_ENA_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH0_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_ENA    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_ENA_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_ENA_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH0_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_ENA    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_ENA_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_ENA_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH0_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_ENA    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_ENA_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_ENA_S  4
+/* GDMA_OUT_TOTAL_EOF_CH0_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_ENA    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_ENA_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_ENA_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_ENA_S  3
+/* GDMA_OUT_DSCR_ERR_CH0_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH0_INT_ENA    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH0_INT_ENA_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH0_INT_ENA_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH0_INT_ENA_S  2
+/* GDMA_OUT_EOF_CH0_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH0_INT_ENA    (BIT(1))
+#define GDMA_OUT_EOF_CH0_INT_ENA_M  (BIT(1))
+#define GDMA_OUT_EOF_CH0_INT_ENA_V  0x1
+#define GDMA_OUT_EOF_CH0_INT_ENA_S  1
+/* GDMA_OUT_DONE_CH0_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH0_INT_ENA    (BIT(0))
+#define GDMA_OUT_DONE_CH0_INT_ENA_M  (BIT(0))
+#define GDMA_OUT_DONE_CH0_INT_ENA_V  0x1
+#define GDMA_OUT_DONE_CH0_INT_ENA_S  0
+
+#define GDMA_OUT_INT_CLR_CH0_REG          (DR_REG_GDMA_BASE + 0x74)
+/* GDMA_OUTFIFO_UDF_L3_CH0_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_CLR    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_CLR_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH0_INT_CLR_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH0_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_CLR    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_CLR_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH0_INT_CLR_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH0_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_CLR    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_CLR_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH0_INT_CLR_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH0_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_CLR    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_CLR_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH0_INT_CLR_S  4
+/* GDMA_OUT_TOTAL_EOF_CH0_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_CLR    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_CLR_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_CLR_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH0_INT_CLR_S  3
+/* GDMA_OUT_DSCR_ERR_CH0_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH0_INT_CLR    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH0_INT_CLR_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH0_INT_CLR_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH0_INT_CLR_S  2
+/* GDMA_OUT_EOF_CH0_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH0_INT_CLR    (BIT(1))
+#define GDMA_OUT_EOF_CH0_INT_CLR_M  (BIT(1))
+#define GDMA_OUT_EOF_CH0_INT_CLR_V  0x1
+#define GDMA_OUT_EOF_CH0_INT_CLR_S  1
+/* GDMA_OUT_DONE_CH0_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH0_INT_CLR    (BIT(0))
+#define GDMA_OUT_DONE_CH0_INT_CLR_M  (BIT(0))
+#define GDMA_OUT_DONE_CH0_INT_CLR_V  0x1
+#define GDMA_OUT_DONE_CH0_INT_CLR_S  0
+
+#define GDMA_OUTFIFO_STATUS_CH0_REG          (DR_REG_GDMA_BASE + 0x78)
+/* GDMA_OUT_REMAIN_UNDER_4B_L3_CH0 : RO ;bitpos:[26] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH0    (BIT(26))
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH0_M  (BIT(26))
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH0_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH0_S  26
+/* GDMA_OUT_REMAIN_UNDER_3B_L3_CH0 : RO ;bitpos:[25] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH0    (BIT(25))
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH0_M  (BIT(25))
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH0_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH0_S  25
+/* GDMA_OUT_REMAIN_UNDER_2B_L3_CH0 : RO ;bitpos:[24] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH0    (BIT(24))
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH0_M  (BIT(24))
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH0_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH0_S  24
+/* GDMA_OUT_REMAIN_UNDER_1B_L3_CH0 : RO ;bitpos:[23] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH0    (BIT(23))
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH0_M  (BIT(23))
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH0_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH0_S  23
+/* GDMA_OUTFIFO_CNT_L3_CH0 : RO ;bitpos:[22:18] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L3 Tx FIFO for Tx channel 0..*/
+#define GDMA_OUTFIFO_CNT_L3_CH0    0x0000001F
+#define GDMA_OUTFIFO_CNT_L3_CH0_M  ((GDMA_OUTFIFO_CNT_L3_CH0_V)<<(GDMA_OUTFIFO_CNT_L3_CH0_S))
+#define GDMA_OUTFIFO_CNT_L3_CH0_V  0x1F
+#define GDMA_OUTFIFO_CNT_L3_CH0_S  18
+/* GDMA_OUTFIFO_CNT_L2_CH0 : RO ;bitpos:[17:11] ;default: 7'b0 ; */
+/*description: The register stores the byte number of the data in L2 Tx FIFO for Tx channel 0..*/
+#define GDMA_OUTFIFO_CNT_L2_CH0    0x0000007F
+#define GDMA_OUTFIFO_CNT_L2_CH0_M  ((GDMA_OUTFIFO_CNT_L2_CH0_V)<<(GDMA_OUTFIFO_CNT_L2_CH0_S))
+#define GDMA_OUTFIFO_CNT_L2_CH0_V  0x7F
+#define GDMA_OUTFIFO_CNT_L2_CH0_S  11
+/* GDMA_OUTFIFO_CNT_L1_CH0 : RO ;bitpos:[10:6] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L1 Tx FIFO for Tx channel 0..*/
+#define GDMA_OUTFIFO_CNT_L1_CH0    0x0000001F
+#define GDMA_OUTFIFO_CNT_L1_CH0_M  ((GDMA_OUTFIFO_CNT_L1_CH0_V)<<(GDMA_OUTFIFO_CNT_L1_CH0_S))
+#define GDMA_OUTFIFO_CNT_L1_CH0_V  0x1F
+#define GDMA_OUTFIFO_CNT_L1_CH0_S  6
+/* GDMA_OUTFIFO_EMPTY_L3_CH0 : RO ;bitpos:[5] ;default: 1'b1 ; */
+/*description: L3 Tx FIFO empty signal for Tx channel 0..*/
+#define GDMA_OUTFIFO_EMPTY_L3_CH0    (BIT(5))
+#define GDMA_OUTFIFO_EMPTY_L3_CH0_M  (BIT(5))
+#define GDMA_OUTFIFO_EMPTY_L3_CH0_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L3_CH0_S  5
+/* GDMA_OUTFIFO_FULL_L3_CH0 : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: L3 Tx FIFO full signal for Tx channel 0..*/
+#define GDMA_OUTFIFO_FULL_L3_CH0    (BIT(4))
+#define GDMA_OUTFIFO_FULL_L3_CH0_M  (BIT(4))
+#define GDMA_OUTFIFO_FULL_L3_CH0_V  0x1
+#define GDMA_OUTFIFO_FULL_L3_CH0_S  4
+/* GDMA_OUTFIFO_EMPTY_L2_CH0 : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: L2 Tx FIFO empty signal for Tx channel 0..*/
+#define GDMA_OUTFIFO_EMPTY_L2_CH0    (BIT(3))
+#define GDMA_OUTFIFO_EMPTY_L2_CH0_M  (BIT(3))
+#define GDMA_OUTFIFO_EMPTY_L2_CH0_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L2_CH0_S  3
+/* GDMA_OUTFIFO_FULL_L2_CH0 : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: L2 Tx FIFO full signal for Tx channel 0..*/
+#define GDMA_OUTFIFO_FULL_L2_CH0    (BIT(2))
+#define GDMA_OUTFIFO_FULL_L2_CH0_M  (BIT(2))
+#define GDMA_OUTFIFO_FULL_L2_CH0_V  0x1
+#define GDMA_OUTFIFO_FULL_L2_CH0_S  2
+/* GDMA_OUTFIFO_EMPTY_L1_CH0 : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: L1 Tx FIFO empty signal for Tx channel 0..*/
+#define GDMA_OUTFIFO_EMPTY_L1_CH0    (BIT(1))
+#define GDMA_OUTFIFO_EMPTY_L1_CH0_M  (BIT(1))
+#define GDMA_OUTFIFO_EMPTY_L1_CH0_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L1_CH0_S  1
+/* GDMA_OUTFIFO_FULL_L1_CH0 : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: L1 Tx FIFO full signal for Tx channel 0..*/
+#define GDMA_OUTFIFO_FULL_L1_CH0    (BIT(0))
+#define GDMA_OUTFIFO_FULL_L1_CH0_M  (BIT(0))
+#define GDMA_OUTFIFO_FULL_L1_CH0_V  0x1
+#define GDMA_OUTFIFO_FULL_L1_CH0_S  0
+
+#define GDMA_OUT_PUSH_CH0_REG          (DR_REG_GDMA_BASE + 0x7C)
+/* GDMA_OUTFIFO_PUSH_CH0 : R/W/SC ;bitpos:[9] ;default: 1'h0 ; */
+/*description: Set this bit to push data into DMA FIFO..*/
+#define GDMA_OUTFIFO_PUSH_CH0    (BIT(9))
+#define GDMA_OUTFIFO_PUSH_CH0_M  (BIT(9))
+#define GDMA_OUTFIFO_PUSH_CH0_V  0x1
+#define GDMA_OUTFIFO_PUSH_CH0_S  9
+/* GDMA_OUTFIFO_WDATA_CH0 : R/W ;bitpos:[8:0] ;default: 9'h0 ; */
+/*description: This register stores the data that need to be pushed into DMA FIFO..*/
+#define GDMA_OUTFIFO_WDATA_CH0    0x000001FF
+#define GDMA_OUTFIFO_WDATA_CH0_M  ((GDMA_OUTFIFO_WDATA_CH0_V)<<(GDMA_OUTFIFO_WDATA_CH0_S))
+#define GDMA_OUTFIFO_WDATA_CH0_V  0x1FF
+#define GDMA_OUTFIFO_WDATA_CH0_S  0
+
+#define GDMA_OUT_LINK_CH0_REG          (DR_REG_GDMA_BASE + 0x80)
+/* GDMA_OUTLINK_PARK_CH0 : RO ;bitpos:[23] ;default: 1'h1 ; */
+/*description: 1: the outlink descriptor's FSM is in idle state.  0: the outlink descriptor's F
+SM is working..*/
+#define GDMA_OUTLINK_PARK_CH0    (BIT(23))
+#define GDMA_OUTLINK_PARK_CH0_M  (BIT(23))
+#define GDMA_OUTLINK_PARK_CH0_V  0x1
+#define GDMA_OUTLINK_PARK_CH0_S  23
+/* GDMA_OUTLINK_RESTART_CH0 : R/W/SC ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Set this bit to restart a new outlink from the last address. .*/
+#define GDMA_OUTLINK_RESTART_CH0    (BIT(22))
+#define GDMA_OUTLINK_RESTART_CH0_M  (BIT(22))
+#define GDMA_OUTLINK_RESTART_CH0_V  0x1
+#define GDMA_OUTLINK_RESTART_CH0_S  22
+/* GDMA_OUTLINK_START_CH0 : R/W/SC ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to start dealing with the outlink descriptors..*/
+#define GDMA_OUTLINK_START_CH0    (BIT(21))
+#define GDMA_OUTLINK_START_CH0_M  (BIT(21))
+#define GDMA_OUTLINK_START_CH0_V  0x1
+#define GDMA_OUTLINK_START_CH0_S  21
+/* GDMA_OUTLINK_STOP_CH0 : R/W/SC ;bitpos:[20] ;default: 1'b0 ; */
+/*description: Set this bit to stop dealing with the outlink descriptors..*/
+#define GDMA_OUTLINK_STOP_CH0    (BIT(20))
+#define GDMA_OUTLINK_STOP_CH0_M  (BIT(20))
+#define GDMA_OUTLINK_STOP_CH0_V  0x1
+#define GDMA_OUTLINK_STOP_CH0_S  20
+/* GDMA_OUTLINK_ADDR_CH0 : R/W ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: This register stores the 20 least significant bits of the first outlink descript
+or's address..*/
+#define GDMA_OUTLINK_ADDR_CH0    0x000FFFFF
+#define GDMA_OUTLINK_ADDR_CH0_M  ((GDMA_OUTLINK_ADDR_CH0_V)<<(GDMA_OUTLINK_ADDR_CH0_S))
+#define GDMA_OUTLINK_ADDR_CH0_V  0xFFFFF
+#define GDMA_OUTLINK_ADDR_CH0_S  0
+
+#define GDMA_OUT_STATE_CH0_REG          (DR_REG_GDMA_BASE + 0x84)
+/* GDMA_OUT_STATE_CH0 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_STATE_CH0    0x00000007
+#define GDMA_OUT_STATE_CH0_M  ((GDMA_OUT_STATE_CH0_V)<<(GDMA_OUT_STATE_CH0_S))
+#define GDMA_OUT_STATE_CH0_V  0x7
+#define GDMA_OUT_STATE_CH0_S  20
+/* GDMA_OUT_DSCR_STATE_CH0 : RO ;bitpos:[19:18] ;default: 2'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_DSCR_STATE_CH0    0x00000003
+#define GDMA_OUT_DSCR_STATE_CH0_M  ((GDMA_OUT_DSCR_STATE_CH0_V)<<(GDMA_OUT_DSCR_STATE_CH0_S))
+#define GDMA_OUT_DSCR_STATE_CH0_V  0x3
+#define GDMA_OUT_DSCR_STATE_CH0_S  18
+/* GDMA_OUTLINK_DSCR_ADDR_CH0 : RO ;bitpos:[17:0] ;default: 18'b0 ; */
+/*description: This register stores the current outlink descriptor's address..*/
+#define GDMA_OUTLINK_DSCR_ADDR_CH0    0x0003FFFF
+#define GDMA_OUTLINK_DSCR_ADDR_CH0_M  ((GDMA_OUTLINK_DSCR_ADDR_CH0_V)<<(GDMA_OUTLINK_DSCR_ADDR_CH0_S))
+#define GDMA_OUTLINK_DSCR_ADDR_CH0_V  0x3FFFF
+#define GDMA_OUTLINK_DSCR_ADDR_CH0_S  0
+
+#define GDMA_OUT_EOF_DES_ADDR_CH0_REG          (DR_REG_GDMA_BASE + 0x88)
+/* GDMA_OUT_EOF_DES_ADDR_CH0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the outlink descriptor when the EOF bit in t
+his descriptor is 1..*/
+#define GDMA_OUT_EOF_DES_ADDR_CH0    0xFFFFFFFF
+#define GDMA_OUT_EOF_DES_ADDR_CH0_M  ((GDMA_OUT_EOF_DES_ADDR_CH0_V)<<(GDMA_OUT_EOF_DES_ADDR_CH0_S))
+#define GDMA_OUT_EOF_DES_ADDR_CH0_V  0xFFFFFFFF
+#define GDMA_OUT_EOF_DES_ADDR_CH0_S  0
+
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH0_REG          (DR_REG_GDMA_BASE + 0x8C)
+/* GDMA_OUT_EOF_BFR_DES_ADDR_CH0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the outlink descriptor before the last outli
+nk descriptor..*/
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH0    0xFFFFFFFF
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH0_M  ((GDMA_OUT_EOF_BFR_DES_ADDR_CH0_V)<<(GDMA_OUT_EOF_BFR_DES_ADDR_CH0_S))
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH0_V  0xFFFFFFFF
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH0_S  0
+
+#define GDMA_OUT_DSCR_CH0_REG          (DR_REG_GDMA_BASE + 0x90)
+/* GDMA_OUTLINK_DSCR_CH0 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the current outlink descriptor y..*/
+#define GDMA_OUTLINK_DSCR_CH0    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_CH0_M  ((GDMA_OUTLINK_DSCR_CH0_V)<<(GDMA_OUTLINK_DSCR_CH0_S))
+#define GDMA_OUTLINK_DSCR_CH0_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_CH0_S  0
+
+#define GDMA_OUT_DSCR_BF0_CH0_REG          (DR_REG_GDMA_BASE + 0x94)
+/* GDMA_OUTLINK_DSCR_BF0_CH0 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the last outlink descriptor y-1..*/
+#define GDMA_OUTLINK_DSCR_BF0_CH0    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF0_CH0_M  ((GDMA_OUTLINK_DSCR_BF0_CH0_V)<<(GDMA_OUTLINK_DSCR_BF0_CH0_S))
+#define GDMA_OUTLINK_DSCR_BF0_CH0_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF0_CH0_S  0
+
+#define GDMA_OUT_DSCR_BF1_CH0_REG          (DR_REG_GDMA_BASE + 0x98)
+/* GDMA_OUTLINK_DSCR_BF1_CH0 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the second-to-last inlink descriptor x-2..*/
+#define GDMA_OUTLINK_DSCR_BF1_CH0    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF1_CH0_M  ((GDMA_OUTLINK_DSCR_BF1_CH0_V)<<(GDMA_OUTLINK_DSCR_BF1_CH0_S))
+#define GDMA_OUTLINK_DSCR_BF1_CH0_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF1_CH0_S  0
+
+#define GDMA_OUT_WIGHT_CH0_REG          (DR_REG_GDMA_BASE + 0x9C)
+/* GDMA_TX_WEIGHT_CH0 : R/W ;bitpos:[11:8] ;default: 4'hf ; */
+/*description: The weight of Tx channel 0. .*/
+#define GDMA_TX_WEIGHT_CH0    0x0000000F
+#define GDMA_TX_WEIGHT_CH0_M  ((GDMA_TX_WEIGHT_CH0_V)<<(GDMA_TX_WEIGHT_CH0_S))
+#define GDMA_TX_WEIGHT_CH0_V  0xF
+#define GDMA_TX_WEIGHT_CH0_S  8
+
+#define GDMA_OUT_PRI_CH0_REG          (DR_REG_GDMA_BASE + 0xA4)
+/* GDMA_TX_PRI_CH0 : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: The priority of Tx channel 0. The larger of the value, the higher of the priorit
+y..*/
+#define GDMA_TX_PRI_CH0    0x0000000F
+#define GDMA_TX_PRI_CH0_M  ((GDMA_TX_PRI_CH0_V)<<(GDMA_TX_PRI_CH0_S))
+#define GDMA_TX_PRI_CH0_V  0xF
+#define GDMA_TX_PRI_CH0_S  0
+
+#define GDMA_OUT_PERI_SEL_CH0_REG          (DR_REG_GDMA_BASE + 0xA8)
+/* GDMA_PERI_OUT_SEL_CH0 : R/W ;bitpos:[5:0] ;default: 6'h3f ; */
+/*description: This register is used to select peripheral for Tx channel 0. 0:SPI2. 1: SPI3. 2:
+ UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.; 7: AE
+S. 8: SHA. 9: ADC_DAC..*/
+#define GDMA_PERI_OUT_SEL_CH0    0x0000003F
+#define GDMA_PERI_OUT_SEL_CH0_M  ((GDMA_PERI_OUT_SEL_CH0_V)<<(GDMA_PERI_OUT_SEL_CH0_S))
+#define GDMA_PERI_OUT_SEL_CH0_V  0x3F
+#define GDMA_PERI_OUT_SEL_CH0_S  0
+
+#define GDMA_IN_CONF0_CH1_REG          (DR_REG_GDMA_BASE + 0xC0)
+/* GDMA_MEM_TRANS_EN_CH1 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit 1 to enable automatic transmitting data from memory to memory via D
+MA..*/
+#define GDMA_MEM_TRANS_EN_CH1    (BIT(4))
+#define GDMA_MEM_TRANS_EN_CH1_M  (BIT(4))
+#define GDMA_MEM_TRANS_EN_CH1_V  0x1
+#define GDMA_MEM_TRANS_EN_CH1_S  4
+/* GDMA_IN_DATA_BURST_EN_CH1 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Rx channel 1 receiving data
+when accessing internal SRAM. .*/
+#define GDMA_IN_DATA_BURST_EN_CH1    (BIT(3))
+#define GDMA_IN_DATA_BURST_EN_CH1_M  (BIT(3))
+#define GDMA_IN_DATA_BURST_EN_CH1_V  0x1
+#define GDMA_IN_DATA_BURST_EN_CH1_S  3
+/* GDMA_INDSCR_BURST_EN_CH1 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Rx channel 1 reading link de
+scriptor when accessing internal SRAM. .*/
+#define GDMA_INDSCR_BURST_EN_CH1    (BIT(2))
+#define GDMA_INDSCR_BURST_EN_CH1_M  (BIT(2))
+#define GDMA_INDSCR_BURST_EN_CH1_V  0x1
+#define GDMA_INDSCR_BURST_EN_CH1_S  2
+/* GDMA_IN_LOOP_TEST_CH1 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_LOOP_TEST_CH1    (BIT(1))
+#define GDMA_IN_LOOP_TEST_CH1_M  (BIT(1))
+#define GDMA_IN_LOOP_TEST_CH1_V  0x1
+#define GDMA_IN_LOOP_TEST_CH1_S  1
+/* GDMA_IN_RST_CH1 : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: This bit is used to reset DMA channel 1 Rx FSM and Rx FIFO pointer..*/
+#define GDMA_IN_RST_CH1    (BIT(0))
+#define GDMA_IN_RST_CH1_M  (BIT(0))
+#define GDMA_IN_RST_CH1_V  0x1
+#define GDMA_IN_RST_CH1_S  0
+
+#define GDMA_IN_CONF1_CH1_REG          (DR_REG_GDMA_BASE + 0xC4)
+/* GDMA_IN_EXT_MEM_BK_SIZE_CH1 : R/W ;bitpos:[14:13] ;default: 2'b0 ; */
+/*description: Block size of Rx channel 1 when DMA access external SRAM. 0: 16 bytes      1: 32
+ bytes    2/3:reserved.*/
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH1    0x00000003
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH1_M  ((GDMA_IN_EXT_MEM_BK_SIZE_CH1_V)<<(GDMA_IN_EXT_MEM_BK_SIZE_CH1_S))
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH1_V  0x3
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH1_S  13
+/* GDMA_IN_CHECK_OWNER_CH1 : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to enable checking the owner attribute of the link descriptor..*/
+#define GDMA_IN_CHECK_OWNER_CH1    (BIT(12))
+#define GDMA_IN_CHECK_OWNER_CH1_M  (BIT(12))
+#define GDMA_IN_CHECK_OWNER_CH1_V  0x1
+#define GDMA_IN_CHECK_OWNER_CH1_S  12
+/* GDMA_DMA_INFIFO_FULL_THRS_CH1 : R/W ;bitpos:[11:0] ;default: 12'hc ; */
+/*description: This register is used to generate the INFIFO_FULL_WM_INT interrupt when Rx chann
+el 0 received byte number in Rx FIFO is up to the value of the register..*/
+#define GDMA_DMA_INFIFO_FULL_THRS_CH1    0x00000FFF
+#define GDMA_DMA_INFIFO_FULL_THRS_CH1_M  ((GDMA_DMA_INFIFO_FULL_THRS_CH1_V)<<(GDMA_DMA_INFIFO_FULL_THRS_CH1_S))
+#define GDMA_DMA_INFIFO_FULL_THRS_CH1_V  0xFFF
+#define GDMA_DMA_INFIFO_FULL_THRS_CH1_S  0
+
+#define GDMA_IN_INT_RAW_CH1_REG          (DR_REG_GDMA_BASE + 0xC8)
+/* GDMA_INFIFO_UDF_L3_CH1_INT_RAW : R/WTC/SS ;bitpos:[9] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Rx channel 1 is
+underflow. .*/
+#define GDMA_INFIFO_UDF_L3_CH1_INT_RAW    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH1_INT_RAW_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH1_INT_RAW_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH1_INT_RAW_S  9
+/* GDMA_INFIFO_OVF_L3_CH1_INT_RAW : R/WTC/SS ;bitpos:[8] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Rx channel 1 is
+overflow. .*/
+#define GDMA_INFIFO_OVF_L3_CH1_INT_RAW    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH1_INT_RAW_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH1_INT_RAW_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH1_INT_RAW_S  8
+/* GDMA_INFIFO_UDF_L1_CH1_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Rx channel 1 is
+underflow. .*/
+#define GDMA_INFIFO_UDF_L1_CH1_INT_RAW    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH1_INT_RAW_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH1_INT_RAW_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH1_INT_RAW_S  7
+/* GDMA_INFIFO_OVF_L1_CH1_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Rx channel 1 is
+overflow. .*/
+#define GDMA_INFIFO_OVF_L1_CH1_INT_RAW    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH1_INT_RAW_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH1_INT_RAW_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH1_INT_RAW_S  6
+/* GDMA_INFIFO_FULL_WM_CH1_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when received data byte number is up t
+o threshold configured by REG_DMA_INFIFO_FULL_THRS_CH0 in Rx FIFO of channel 1..*/
+#define GDMA_INFIFO_FULL_WM_CH1_INT_RAW    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH1_INT_RAW_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH1_INT_RAW_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH1_INT_RAW_S  5
+/* GDMA_IN_DSCR_EMPTY_CH1_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when Rx buffer pointed by inlink is fu
+ll and receiving data is not completed, but there is no more inlink for Rx chann
+el 1..*/
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_RAW    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_RAW_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_RAW_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_RAW_S  4
+/* GDMA_IN_DSCR_ERR_CH1_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when detecting inlink descriptor error
+, including owner error, the second and third word error of inlink descriptor fo
+r Rx channel 1..*/
+#define GDMA_IN_DSCR_ERR_CH1_INT_RAW    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH1_INT_RAW_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH1_INT_RAW_V  0x1
+#define GDMA_IN_DSCR_ERR_CH1_INT_RAW_S  3
+/* GDMA_IN_ERR_EOF_CH1_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when data error is detected only in th
+e case that the peripheral is UHCI0 for Rx channel 1. For other peripherals, thi
+s raw interrupt is reserved..*/
+#define GDMA_IN_ERR_EOF_CH1_INT_RAW    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH1_INT_RAW_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH1_INT_RAW_V  0x1
+#define GDMA_IN_ERR_EOF_CH1_INT_RAW_S  2
+/* GDMA_IN_SUC_EOF_CH1_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one inli
+nk descriptor has been received for Rx channel 1. For UHCI0, the raw interrupt b
+it turns to high level when the last data pointed by one inlink descriptor has b
+een received and no data error is detected for Rx channel 0..*/
+#define GDMA_IN_SUC_EOF_CH1_INT_RAW    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH1_INT_RAW_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH1_INT_RAW_V  0x1
+#define GDMA_IN_SUC_EOF_CH1_INT_RAW_S  1
+/* GDMA_IN_DONE_CH1_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one inli
+nk descriptor has been received for Rx channel 1..*/
+#define GDMA_IN_DONE_CH1_INT_RAW    (BIT(0))
+#define GDMA_IN_DONE_CH1_INT_RAW_M  (BIT(0))
+#define GDMA_IN_DONE_CH1_INT_RAW_V  0x1
+#define GDMA_IN_DONE_CH1_INT_RAW_S  0
+
+#define GDMA_IN_INT_ST_CH1_REG          (DR_REG_GDMA_BASE + 0xCC)
+/* GDMA_INFIFO_UDF_L3_CH1_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH1_INT_ST    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH1_INT_ST_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH1_INT_ST_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH1_INT_ST_S  9
+/* GDMA_INFIFO_OVF_L3_CH1_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH1_INT_ST    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH1_INT_ST_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH1_INT_ST_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH1_INT_ST_S  8
+/* GDMA_INFIFO_UDF_L1_CH1_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH1_INT_ST    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH1_INT_ST_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH1_INT_ST_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH1_INT_ST_S  7
+/* GDMA_INFIFO_OVF_L1_CH1_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH1_INT_ST    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH1_INT_ST_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH1_INT_ST_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH1_INT_ST_S  6
+/* GDMA_INFIFO_FULL_WM_CH1_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_INFIFO_FULL_WM_CH1_INT_ST    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH1_INT_ST_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH1_INT_ST_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH1_INT_ST_S  5
+/* GDMA_IN_DSCR_EMPTY_CH1_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_ST    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_ST_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_ST_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_ST_S  4
+/* GDMA_IN_DSCR_ERR_CH1_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH1_INT_ST    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH1_INT_ST_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH1_INT_ST_V  0x1
+#define GDMA_IN_DSCR_ERR_CH1_INT_ST_S  3
+/* GDMA_IN_ERR_EOF_CH1_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH1_INT_ST    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH1_INT_ST_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH1_INT_ST_V  0x1
+#define GDMA_IN_ERR_EOF_CH1_INT_ST_S  2
+/* GDMA_IN_SUC_EOF_CH1_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH1_INT_ST    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH1_INT_ST_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH1_INT_ST_V  0x1
+#define GDMA_IN_SUC_EOF_CH1_INT_ST_S  1
+/* GDMA_IN_DONE_CH1_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH1_INT_ST    (BIT(0))
+#define GDMA_IN_DONE_CH1_INT_ST_M  (BIT(0))
+#define GDMA_IN_DONE_CH1_INT_ST_V  0x1
+#define GDMA_IN_DONE_CH1_INT_ST_S  0
+
+#define GDMA_IN_INT_ENA_CH1_REG          (DR_REG_GDMA_BASE + 0xD0)
+/* GDMA_INFIFO_UDF_L3_CH1_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH1_INT_ENA    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH1_INT_ENA_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH1_INT_ENA_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH1_INT_ENA_S  9
+/* GDMA_INFIFO_OVF_L3_CH1_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH1_INT_ENA    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH1_INT_ENA_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH1_INT_ENA_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH1_INT_ENA_S  8
+/* GDMA_INFIFO_UDF_L1_CH1_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH1_INT_ENA    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH1_INT_ENA_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH1_INT_ENA_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH1_INT_ENA_S  7
+/* GDMA_INFIFO_OVF_L1_CH1_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH1_INT_ENA    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH1_INT_ENA_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH1_INT_ENA_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH1_INT_ENA_S  6
+/* GDMA_INFIFO_FULL_WM_CH1_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_INFIFO_FULL_WM_CH1_INT_ENA    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH1_INT_ENA_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH1_INT_ENA_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH1_INT_ENA_S  5
+/* GDMA_IN_DSCR_EMPTY_CH1_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_ENA    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_ENA_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_ENA_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_ENA_S  4
+/* GDMA_IN_DSCR_ERR_CH1_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH1_INT_ENA    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH1_INT_ENA_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH1_INT_ENA_V  0x1
+#define GDMA_IN_DSCR_ERR_CH1_INT_ENA_S  3
+/* GDMA_IN_ERR_EOF_CH1_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH1_INT_ENA    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH1_INT_ENA_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH1_INT_ENA_V  0x1
+#define GDMA_IN_ERR_EOF_CH1_INT_ENA_S  2
+/* GDMA_IN_SUC_EOF_CH1_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH1_INT_ENA    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH1_INT_ENA_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH1_INT_ENA_V  0x1
+#define GDMA_IN_SUC_EOF_CH1_INT_ENA_S  1
+/* GDMA_IN_DONE_CH1_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH1_INT_ENA    (BIT(0))
+#define GDMA_IN_DONE_CH1_INT_ENA_M  (BIT(0))
+#define GDMA_IN_DONE_CH1_INT_ENA_V  0x1
+#define GDMA_IN_DONE_CH1_INT_ENA_S  0
+
+#define GDMA_IN_INT_CLR_CH1_REG          (DR_REG_GDMA_BASE + 0xD4)
+/* GDMA_INFIFO_UDF_L3_CH1_INT_CLR : WT ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH1_INT_CLR    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH1_INT_CLR_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH1_INT_CLR_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH1_INT_CLR_S  9
+/* GDMA_INFIFO_OVF_L3_CH1_INT_CLR : WT ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH1_INT_CLR    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH1_INT_CLR_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH1_INT_CLR_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH1_INT_CLR_S  8
+/* GDMA_INFIFO_UDF_L1_CH1_INT_CLR : WT ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH1_INT_CLR    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH1_INT_CLR_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH1_INT_CLR_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH1_INT_CLR_S  7
+/* GDMA_INFIFO_OVF_L1_CH1_INT_CLR : WT ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH1_INT_CLR    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH1_INT_CLR_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH1_INT_CLR_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH1_INT_CLR_S  6
+/* GDMA_DMA_INFIFO_FULL_WM_CH1_INT_CLR : WT ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_DMA_INFIFO_FULL_WM_CH1_INT_CLR    (BIT(5))
+#define GDMA_DMA_INFIFO_FULL_WM_CH1_INT_CLR_M  (BIT(5))
+#define GDMA_DMA_INFIFO_FULL_WM_CH1_INT_CLR_V  0x1
+#define GDMA_DMA_INFIFO_FULL_WM_CH1_INT_CLR_S  5
+/* GDMA_IN_DSCR_EMPTY_CH1_INT_CLR : WT ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_CLR    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_CLR_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_CLR_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH1_INT_CLR_S  4
+/* GDMA_IN_DSCR_ERR_CH1_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH1_INT_CLR    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH1_INT_CLR_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH1_INT_CLR_V  0x1
+#define GDMA_IN_DSCR_ERR_CH1_INT_CLR_S  3
+/* GDMA_IN_ERR_EOF_CH1_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH1_INT_CLR    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH1_INT_CLR_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH1_INT_CLR_V  0x1
+#define GDMA_IN_ERR_EOF_CH1_INT_CLR_S  2
+/* GDMA_IN_SUC_EOF_CH1_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH1_INT_CLR    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH1_INT_CLR_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH1_INT_CLR_V  0x1
+#define GDMA_IN_SUC_EOF_CH1_INT_CLR_S  1
+/* GDMA_IN_DONE_CH1_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH1_INT_CLR    (BIT(0))
+#define GDMA_IN_DONE_CH1_INT_CLR_M  (BIT(0))
+#define GDMA_IN_DONE_CH1_INT_CLR_V  0x1
+#define GDMA_IN_DONE_CH1_INT_CLR_S  0
+
+#define GDMA_INFIFO_STATUS_CH1_REG          (DR_REG_GDMA_BASE + 0xD8)
+/* GDMA_IN_BUF_HUNGRY_CH1 : RO ;bitpos:[28] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_BUF_HUNGRY_CH1    (BIT(28))
+#define GDMA_IN_BUF_HUNGRY_CH1_M  (BIT(28))
+#define GDMA_IN_BUF_HUNGRY_CH1_V  0x1
+#define GDMA_IN_BUF_HUNGRY_CH1_S  28
+/* GDMA_IN_REMAIN_UNDER_4B_L3_CH1 : RO ;bitpos:[27] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH1    (BIT(27))
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH1_M  (BIT(27))
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH1_V  0x1
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH1_S  27
+/* GDMA_IN_REMAIN_UNDER_3B_L3_CH1 : RO ;bitpos:[26] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH1    (BIT(26))
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH1_M  (BIT(26))
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH1_V  0x1
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH1_S  26
+/* GDMA_IN_REMAIN_UNDER_2B_L3_CH1 : RO ;bitpos:[25] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH1    (BIT(25))
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH1_M  (BIT(25))
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH1_V  0x1
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH1_S  25
+/* GDMA_IN_REMAIN_UNDER_1B_L3_CH1 : RO ;bitpos:[24] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH1    (BIT(24))
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH1_M  (BIT(24))
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH1_V  0x1
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH1_S  24
+/* GDMA_INFIFO_CNT_L3_CH1 : RO ;bitpos:[23:19] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L3 Rx FIFO for Rx channel 1..*/
+#define GDMA_INFIFO_CNT_L3_CH1    0x0000001F
+#define GDMA_INFIFO_CNT_L3_CH1_M  ((GDMA_INFIFO_CNT_L3_CH1_V)<<(GDMA_INFIFO_CNT_L3_CH1_S))
+#define GDMA_INFIFO_CNT_L3_CH1_V  0x1F
+#define GDMA_INFIFO_CNT_L3_CH1_S  19
+/* GDMA_INFIFO_CNT_L2_CH1 : RO ;bitpos:[18:12] ;default: 7'b0 ; */
+/*description: The register stores the byte number of the data in L2 Rx FIFO for Rx channel 1..*/
+#define GDMA_INFIFO_CNT_L2_CH1    0x0000007F
+#define GDMA_INFIFO_CNT_L2_CH1_M  ((GDMA_INFIFO_CNT_L2_CH1_V)<<(GDMA_INFIFO_CNT_L2_CH1_S))
+#define GDMA_INFIFO_CNT_L2_CH1_V  0x7F
+#define GDMA_INFIFO_CNT_L2_CH1_S  12
+/* GDMA_INFIFO_CNT_L1_CH1 : RO ;bitpos:[11:6] ;default: 6'b0 ; */
+/*description: The register stores the byte number of the data in L1 Rx FIFO for Rx channel 1..*/
+#define GDMA_INFIFO_CNT_L1_CH1    0x0000003F
+#define GDMA_INFIFO_CNT_L1_CH1_M  ((GDMA_INFIFO_CNT_L1_CH1_V)<<(GDMA_INFIFO_CNT_L1_CH1_S))
+#define GDMA_INFIFO_CNT_L1_CH1_V  0x3F
+#define GDMA_INFIFO_CNT_L1_CH1_S  6
+/* GDMA_INFIFO_EMPTY_L3_CH1 : RO ;bitpos:[5] ;default: 1'b1 ; */
+/*description: L3 Rx FIFO empty signal for Rx channel 1..*/
+#define GDMA_INFIFO_EMPTY_L3_CH1    (BIT(5))
+#define GDMA_INFIFO_EMPTY_L3_CH1_M  (BIT(5))
+#define GDMA_INFIFO_EMPTY_L3_CH1_V  0x1
+#define GDMA_INFIFO_EMPTY_L3_CH1_S  5
+/* GDMA_INFIFO_FULL_L3_CH1 : RO ;bitpos:[4] ;default: 1'b1 ; */
+/*description: L3 Rx FIFO full signal for Rx channel 1..*/
+#define GDMA_INFIFO_FULL_L3_CH1    (BIT(4))
+#define GDMA_INFIFO_FULL_L3_CH1_M  (BIT(4))
+#define GDMA_INFIFO_FULL_L3_CH1_V  0x1
+#define GDMA_INFIFO_FULL_L3_CH1_S  4
+/* GDMA_INFIFO_EMPTY_L2_CH1 : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: L2 Rx FIFO empty signal for Rx channel 1..*/
+#define GDMA_INFIFO_EMPTY_L2_CH1    (BIT(3))
+#define GDMA_INFIFO_EMPTY_L2_CH1_M  (BIT(3))
+#define GDMA_INFIFO_EMPTY_L2_CH1_V  0x1
+#define GDMA_INFIFO_EMPTY_L2_CH1_S  3
+/* GDMA_INFIFO_FULL_L2_CH1 : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: L2 Rx FIFO full signal for Rx channel 1..*/
+#define GDMA_INFIFO_FULL_L2_CH1    (BIT(2))
+#define GDMA_INFIFO_FULL_L2_CH1_M  (BIT(2))
+#define GDMA_INFIFO_FULL_L2_CH1_V  0x1
+#define GDMA_INFIFO_FULL_L2_CH1_S  2
+/* GDMA_INFIFO_EMPTY_L1_CH1 : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: L1 Rx FIFO empty signal for Rx channel 1..*/
+#define GDMA_INFIFO_EMPTY_L1_CH1    (BIT(1))
+#define GDMA_INFIFO_EMPTY_L1_CH1_M  (BIT(1))
+#define GDMA_INFIFO_EMPTY_L1_CH1_V  0x1
+#define GDMA_INFIFO_EMPTY_L1_CH1_S  1
+/* GDMA_INFIFO_FULL_L1_CH1 : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: L1 Rx FIFO full signal for Rx channel 1..*/
+#define GDMA_INFIFO_FULL_L1_CH1    (BIT(0))
+#define GDMA_INFIFO_FULL_L1_CH1_M  (BIT(0))
+#define GDMA_INFIFO_FULL_L1_CH1_V  0x1
+#define GDMA_INFIFO_FULL_L1_CH1_S  0
+
+#define GDMA_IN_POP_CH1_REG          (DR_REG_GDMA_BASE + 0xDC)
+/* GDMA_INFIFO_POP_CH1 : R/W/SC ;bitpos:[12] ;default: 1'h0 ; */
+/*description: Set this bit to pop data from DMA FIFO..*/
+#define GDMA_INFIFO_POP_CH1    (BIT(12))
+#define GDMA_INFIFO_POP_CH1_M  (BIT(12))
+#define GDMA_INFIFO_POP_CH1_V  0x1
+#define GDMA_INFIFO_POP_CH1_S  12
+/* GDMA_INFIFO_RDATA_CH1 : RO ;bitpos:[11:0] ;default: 12'h800 ; */
+/*description: This register stores the data popping from DMA FIFO..*/
+#define GDMA_INFIFO_RDATA_CH1    0x00000FFF
+#define GDMA_INFIFO_RDATA_CH1_M  ((GDMA_INFIFO_RDATA_CH1_V)<<(GDMA_INFIFO_RDATA_CH1_S))
+#define GDMA_INFIFO_RDATA_CH1_V  0xFFF
+#define GDMA_INFIFO_RDATA_CH1_S  0
+
+#define GDMA_IN_LINK_CH1_REG          (DR_REG_GDMA_BASE + 0xE0)
+/* GDMA_INLINK_PARK_CH1 : RO ;bitpos:[24] ;default: 1'h1 ; */
+/*description: 1: the inlink descriptor's FSM is in idle state.  0: the inlink descriptor's FSM
+ is working..*/
+#define GDMA_INLINK_PARK_CH1    (BIT(24))
+#define GDMA_INLINK_PARK_CH1_M  (BIT(24))
+#define GDMA_INLINK_PARK_CH1_V  0x1
+#define GDMA_INLINK_PARK_CH1_S  24
+/* GDMA_INLINK_RESTART_CH1 : R/W/SC ;bitpos:[23] ;default: 1'b0 ; */
+/*description: Set this bit to mount a new inlink descriptor..*/
+#define GDMA_INLINK_RESTART_CH1    (BIT(23))
+#define GDMA_INLINK_RESTART_CH1_M  (BIT(23))
+#define GDMA_INLINK_RESTART_CH1_V  0x1
+#define GDMA_INLINK_RESTART_CH1_S  23
+/* GDMA_INLINK_START_CH1 : R/W/SC ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Set this bit to start dealing with the inlink descriptors..*/
+#define GDMA_INLINK_START_CH1    (BIT(22))
+#define GDMA_INLINK_START_CH1_M  (BIT(22))
+#define GDMA_INLINK_START_CH1_V  0x1
+#define GDMA_INLINK_START_CH1_S  22
+/* GDMA_INLINK_STOP_CH1 : R/W/SC ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to stop dealing with the inlink descriptors..*/
+#define GDMA_INLINK_STOP_CH1    (BIT(21))
+#define GDMA_INLINK_STOP_CH1_M  (BIT(21))
+#define GDMA_INLINK_STOP_CH1_V  0x1
+#define GDMA_INLINK_STOP_CH1_S  21
+/* GDMA_INLINK_AUTO_RET_CH1 : R/W ;bitpos:[20] ;default: 1'b1 ; */
+/*description: Set this bit to return to current inlink descriptor's address, when there are so
+me errors in current receiving data..*/
+#define GDMA_INLINK_AUTO_RET_CH1    (BIT(20))
+#define GDMA_INLINK_AUTO_RET_CH1_M  (BIT(20))
+#define GDMA_INLINK_AUTO_RET_CH1_V  0x1
+#define GDMA_INLINK_AUTO_RET_CH1_S  20
+/* GDMA_INLINK_ADDR_CH1 : R/W ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: This register stores the 20 least significant bits of the first inlink descripto
+r's address..*/
+#define GDMA_INLINK_ADDR_CH1    0x000FFFFF
+#define GDMA_INLINK_ADDR_CH1_M  ((GDMA_INLINK_ADDR_CH1_V)<<(GDMA_INLINK_ADDR_CH1_S))
+#define GDMA_INLINK_ADDR_CH1_V  0xFFFFF
+#define GDMA_INLINK_ADDR_CH1_S  0
+
+#define GDMA_IN_STATE_CH1_REG          (DR_REG_GDMA_BASE + 0xE4)
+/* GDMA_IN_STATE_CH1 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_STATE_CH1    0x00000007
+#define GDMA_IN_STATE_CH1_M  ((GDMA_IN_STATE_CH1_V)<<(GDMA_IN_STATE_CH1_S))
+#define GDMA_IN_STATE_CH1_V  0x7
+#define GDMA_IN_STATE_CH1_S  20
+/* GDMA_IN_DSCR_STATE_CH1 : RO ;bitpos:[19:18] ;default: 2'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_DSCR_STATE_CH1    0x00000003
+#define GDMA_IN_DSCR_STATE_CH1_M  ((GDMA_IN_DSCR_STATE_CH1_V)<<(GDMA_IN_DSCR_STATE_CH1_S))
+#define GDMA_IN_DSCR_STATE_CH1_V  0x3
+#define GDMA_IN_DSCR_STATE_CH1_S  18
+/* GDMA_INLINK_DSCR_ADDR_CH1 : RO ;bitpos:[17:0] ;default: 18'b0 ; */
+/*description: This register stores the current inlink descriptor's address..*/
+#define GDMA_INLINK_DSCR_ADDR_CH1    0x0003FFFF
+#define GDMA_INLINK_DSCR_ADDR_CH1_M  ((GDMA_INLINK_DSCR_ADDR_CH1_V)<<(GDMA_INLINK_DSCR_ADDR_CH1_S))
+#define GDMA_INLINK_DSCR_ADDR_CH1_V  0x3FFFF
+#define GDMA_INLINK_DSCR_ADDR_CH1_S  0
+
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH1_REG          (DR_REG_GDMA_BASE + 0xE8)
+/* GDMA_IN_SUC_EOF_DES_ADDR_CH1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the inlink descriptor when the EOF bit in th
+is descriptor is 1..*/
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH1    0xFFFFFFFF
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH1_M  ((GDMA_IN_SUC_EOF_DES_ADDR_CH1_V)<<(GDMA_IN_SUC_EOF_DES_ADDR_CH1_S))
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH1_V  0xFFFFFFFF
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH1_S  0
+
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH1_REG          (DR_REG_GDMA_BASE + 0xEC)
+/* GDMA_IN_ERR_EOF_DES_ADDR_CH1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the inlink descriptor when there are some er
+rors in current receiving data. Only used when peripheral is UHCI0..*/
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH1    0xFFFFFFFF
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH1_M  ((GDMA_IN_ERR_EOF_DES_ADDR_CH1_V)<<(GDMA_IN_ERR_EOF_DES_ADDR_CH1_S))
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH1_V  0xFFFFFFFF
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH1_S  0
+
+#define GDMA_IN_DSCR_CH1_REG          (DR_REG_GDMA_BASE + 0xF0)
+/* GDMA_INLINK_DSCR_CH1 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the current inlink descriptor x..*/
+#define GDMA_INLINK_DSCR_CH1    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_CH1_M  ((GDMA_INLINK_DSCR_CH1_V)<<(GDMA_INLINK_DSCR_CH1_S))
+#define GDMA_INLINK_DSCR_CH1_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_CH1_S  0
+
+#define GDMA_IN_DSCR_BF0_CH1_REG          (DR_REG_GDMA_BASE + 0xF4)
+/* GDMA_INLINK_DSCR_BF0_CH1 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the last inlink descriptor x-1..*/
+#define GDMA_INLINK_DSCR_BF0_CH1    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF0_CH1_M  ((GDMA_INLINK_DSCR_BF0_CH1_V)<<(GDMA_INLINK_DSCR_BF0_CH1_S))
+#define GDMA_INLINK_DSCR_BF0_CH1_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF0_CH1_S  0
+
+#define GDMA_IN_DSCR_BF1_CH1_REG          (DR_REG_GDMA_BASE + 0xF8)
+/* GDMA_INLINK_DSCR_BF1_CH1 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the second-to-last inlink descriptor x-2..*/
+#define GDMA_INLINK_DSCR_BF1_CH1    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF1_CH1_M  ((GDMA_INLINK_DSCR_BF1_CH1_V)<<(GDMA_INLINK_DSCR_BF1_CH1_S))
+#define GDMA_INLINK_DSCR_BF1_CH1_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF1_CH1_S  0
+
+#define GDMA_IN_WIGHT_CH1_REG          (DR_REG_GDMA_BASE + 0xFC)
+/* GDMA_RX_WEIGHT_CH1 : R/W ;bitpos:[11:8] ;default: 4'hf ; */
+/*description: The weight of Rx channel 1. .*/
+#define GDMA_RX_WEIGHT_CH1    0x0000000F
+#define GDMA_RX_WEIGHT_CH1_M  ((GDMA_RX_WEIGHT_CH1_V)<<(GDMA_RX_WEIGHT_CH1_S))
+#define GDMA_RX_WEIGHT_CH1_V  0xF
+#define GDMA_RX_WEIGHT_CH1_S  8
+
+#define GDMA_IN_PRI_CH1_REG          (DR_REG_GDMA_BASE + 0x104)
+/* GDMA_RX_PRI_CH1 : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: The priority of Rx channel 1. The larger of the value, the higher of the priorit
+y..*/
+#define GDMA_RX_PRI_CH1    0x0000000F
+#define GDMA_RX_PRI_CH1_M  ((GDMA_RX_PRI_CH1_V)<<(GDMA_RX_PRI_CH1_S))
+#define GDMA_RX_PRI_CH1_V  0xF
+#define GDMA_RX_PRI_CH1_S  0
+
+#define GDMA_IN_PERI_SEL_CH1_REG          (DR_REG_GDMA_BASE + 0x108)
+/* GDMA_PERI_IN_SEL_CH1 : R/W ;bitpos:[5:0] ;default: 6'h3f ; */
+/*description: This register is used to select peripheral for Rx channel 1. 0:SPI2. 1: SPI3. 2:
+ UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT..*/
+#define GDMA_PERI_IN_SEL_CH1    0x0000003F
+#define GDMA_PERI_IN_SEL_CH1_M  ((GDMA_PERI_IN_SEL_CH1_V)<<(GDMA_PERI_IN_SEL_CH1_S))
+#define GDMA_PERI_IN_SEL_CH1_V  0x3F
+#define GDMA_PERI_IN_SEL_CH1_S  0
+
+#define GDMA_OUT_CONF0_CH1_REG          (DR_REG_GDMA_BASE + 0x120)
+/* GDMA_OUT_DATA_BURST_EN_CH1 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Tx channel 1 transmitting da
+ta when accessing internal SRAM. .*/
+#define GDMA_OUT_DATA_BURST_EN_CH1    (BIT(5))
+#define GDMA_OUT_DATA_BURST_EN_CH1_M  (BIT(5))
+#define GDMA_OUT_DATA_BURST_EN_CH1_V  0x1
+#define GDMA_OUT_DATA_BURST_EN_CH1_S  5
+/* GDMA_OUTDSCR_BURST_EN_CH1 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Tx channel 1 reading link de
+scriptor when accessing internal SRAM. .*/
+#define GDMA_OUTDSCR_BURST_EN_CH1    (BIT(4))
+#define GDMA_OUTDSCR_BURST_EN_CH1_M  (BIT(4))
+#define GDMA_OUTDSCR_BURST_EN_CH1_V  0x1
+#define GDMA_OUTDSCR_BURST_EN_CH1_S  4
+/* GDMA_OUT_EOF_MODE_CH1 : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: EOF flag generation mode when transmitting data. 1: EOF flag for Tx channel 0 is
+ generated when data need to transmit has been popped from FIFO in DMA.*/
+#define GDMA_OUT_EOF_MODE_CH1    (BIT(3))
+#define GDMA_OUT_EOF_MODE_CH1_M  (BIT(3))
+#define GDMA_OUT_EOF_MODE_CH1_V  0x1
+#define GDMA_OUT_EOF_MODE_CH1_S  3
+/* GDMA_OUT_AUTO_WRBACK_CH1 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to enable automatic outlink-writeback when all the data in tx buffe
+r has been transmitted..*/
+#define GDMA_OUT_AUTO_WRBACK_CH1    (BIT(2))
+#define GDMA_OUT_AUTO_WRBACK_CH1_M  (BIT(2))
+#define GDMA_OUT_AUTO_WRBACK_CH1_V  0x1
+#define GDMA_OUT_AUTO_WRBACK_CH1_S  2
+/* GDMA_OUT_LOOP_TEST_CH1 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_LOOP_TEST_CH1    (BIT(1))
+#define GDMA_OUT_LOOP_TEST_CH1_M  (BIT(1))
+#define GDMA_OUT_LOOP_TEST_CH1_V  0x1
+#define GDMA_OUT_LOOP_TEST_CH1_S  1
+/* GDMA_OUT_RST_CH1 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to reset DMA channel 0 Tx FSM and Tx FIFO pointer..*/
+#define GDMA_OUT_RST_CH1    (BIT(0))
+#define GDMA_OUT_RST_CH1_M  (BIT(0))
+#define GDMA_OUT_RST_CH1_V  0x1
+#define GDMA_OUT_RST_CH1_S  0
+
+#define GDMA_OUT_CONF1_CH1_REG          (DR_REG_GDMA_BASE + 0x124)
+/* GDMA_OUT_EXT_MEM_BK_SIZE_CH1 : R/W ;bitpos:[14:13] ;default: 2'b0 ; */
+/*description: Block size of Tx channel 1 when DMA access external SRAM. 0: 16 bytes      1: 32
+ bytes    2/3:reserved.*/
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH1    0x00000003
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH1_M  ((GDMA_OUT_EXT_MEM_BK_SIZE_CH1_V)<<(GDMA_OUT_EXT_MEM_BK_SIZE_CH1_S))
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH1_V  0x3
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH1_S  13
+/* GDMA_OUT_CHECK_OWNER_CH1 : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to enable checking the owner attribute of the link descriptor..*/
+#define GDMA_OUT_CHECK_OWNER_CH1    (BIT(12))
+#define GDMA_OUT_CHECK_OWNER_CH1_M  (BIT(12))
+#define GDMA_OUT_CHECK_OWNER_CH1_V  0x1
+#define GDMA_OUT_CHECK_OWNER_CH1_S  12
+
+#define GDMA_OUT_INT_RAW_CH1_REG          (DR_REG_GDMA_BASE + 0x128)
+/* GDMA_OUTFIFO_UDF_L3_CH1_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Tx channel 1 is
+underflow. .*/
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_RAW    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_RAW_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_RAW_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH1_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Tx channel 1 is
+overflow. .*/
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_RAW    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_RAW_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_RAW_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH1_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Tx channel 1 is
+underflow. .*/
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_RAW    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_RAW_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_RAW_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH1_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Tx channel 1 is
+overflow. .*/
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_RAW    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_RAW_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_RAW_S  4
+/* GDMA_OUT_TOTAL_EOF_CH1_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when data corresponding a outlink (inc
+ludes one link descriptor or few link descriptors) is transmitted out for Tx cha
+nnel 1..*/
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_RAW    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_RAW_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_RAW_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_RAW_S  3
+/* GDMA_OUT_DSCR_ERR_CH1_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when detecting outlink descriptor erro
+r, including owner error, the second and third word error of outlink descriptor
+for Tx channel 1..*/
+#define GDMA_OUT_DSCR_ERR_CH1_INT_RAW    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH1_INT_RAW_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH1_INT_RAW_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH1_INT_RAW_S  2
+/* GDMA_OUT_EOF_CH1_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one outl
+ink descriptor has been read from memory for Tx channel 1. .*/
+#define GDMA_OUT_EOF_CH1_INT_RAW    (BIT(1))
+#define GDMA_OUT_EOF_CH1_INT_RAW_M  (BIT(1))
+#define GDMA_OUT_EOF_CH1_INT_RAW_V  0x1
+#define GDMA_OUT_EOF_CH1_INT_RAW_S  1
+/* GDMA_OUT_DONE_CH1_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one outl
+ink descriptor has been transmitted to peripherals for Tx channel 1..*/
+#define GDMA_OUT_DONE_CH1_INT_RAW    (BIT(0))
+#define GDMA_OUT_DONE_CH1_INT_RAW_M  (BIT(0))
+#define GDMA_OUT_DONE_CH1_INT_RAW_V  0x1
+#define GDMA_OUT_DONE_CH1_INT_RAW_S  0
+
+#define GDMA_OUT_INT_ST_CH1_REG          (DR_REG_GDMA_BASE + 0x12C)
+/* GDMA_OUTFIFO_UDF_L3_CH1_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_ST    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_ST_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_ST_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_ST_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH1_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_ST    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_ST_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_ST_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_ST_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH1_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_ST    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_ST_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_ST_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_ST_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH1_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_ST    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_ST_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_ST_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_ST_S  4
+/* GDMA_OUT_TOTAL_EOF_CH1_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_ST    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_ST_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_ST_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_ST_S  3
+/* GDMA_OUT_DSCR_ERR_CH1_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH1_INT_ST    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH1_INT_ST_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH1_INT_ST_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH1_INT_ST_S  2
+/* GDMA_OUT_EOF_CH1_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH1_INT_ST    (BIT(1))
+#define GDMA_OUT_EOF_CH1_INT_ST_M  (BIT(1))
+#define GDMA_OUT_EOF_CH1_INT_ST_V  0x1
+#define GDMA_OUT_EOF_CH1_INT_ST_S  1
+/* GDMA_OUT_DONE_CH1_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH1_INT_ST    (BIT(0))
+#define GDMA_OUT_DONE_CH1_INT_ST_M  (BIT(0))
+#define GDMA_OUT_DONE_CH1_INT_ST_V  0x1
+#define GDMA_OUT_DONE_CH1_INT_ST_S  0
+
+#define GDMA_OUT_INT_ENA_CH1_REG          (DR_REG_GDMA_BASE + 0x130)
+/* GDMA_OUTFIFO_UDF_L3_CH1_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_ENA    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_ENA_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_ENA_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH1_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_ENA    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_ENA_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_ENA_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH1_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_ENA    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_ENA_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_ENA_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH1_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_ENA    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_ENA_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_ENA_S  4
+/* GDMA_OUT_TOTAL_EOF_CH1_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_ENA    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_ENA_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_ENA_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_ENA_S  3
+/* GDMA_OUT_DSCR_ERR_CH1_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH1_INT_ENA    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH1_INT_ENA_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH1_INT_ENA_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH1_INT_ENA_S  2
+/* GDMA_OUT_EOF_CH1_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH1_INT_ENA    (BIT(1))
+#define GDMA_OUT_EOF_CH1_INT_ENA_M  (BIT(1))
+#define GDMA_OUT_EOF_CH1_INT_ENA_V  0x1
+#define GDMA_OUT_EOF_CH1_INT_ENA_S  1
+/* GDMA_OUT_DONE_CH1_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH1_INT_ENA    (BIT(0))
+#define GDMA_OUT_DONE_CH1_INT_ENA_M  (BIT(0))
+#define GDMA_OUT_DONE_CH1_INT_ENA_V  0x1
+#define GDMA_OUT_DONE_CH1_INT_ENA_S  0
+
+#define GDMA_OUT_INT_CLR_CH1_REG          (DR_REG_GDMA_BASE + 0x134)
+/* GDMA_OUTFIFO_UDF_L3_CH1_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_CLR    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_CLR_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH1_INT_CLR_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH1_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_CLR    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_CLR_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH1_INT_CLR_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH1_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_CLR    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_CLR_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH1_INT_CLR_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH1_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_CLR    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_CLR_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH1_INT_CLR_S  4
+/* GDMA_OUT_TOTAL_EOF_CH1_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_CLR    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_CLR_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_CLR_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH1_INT_CLR_S  3
+/* GDMA_OUT_DSCR_ERR_CH1_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH1_INT_CLR    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH1_INT_CLR_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH1_INT_CLR_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH1_INT_CLR_S  2
+/* GDMA_OUT_EOF_CH1_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH1_INT_CLR    (BIT(1))
+#define GDMA_OUT_EOF_CH1_INT_CLR_M  (BIT(1))
+#define GDMA_OUT_EOF_CH1_INT_CLR_V  0x1
+#define GDMA_OUT_EOF_CH1_INT_CLR_S  1
+/* GDMA_OUT_DONE_CH1_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH1_INT_CLR    (BIT(0))
+#define GDMA_OUT_DONE_CH1_INT_CLR_M  (BIT(0))
+#define GDMA_OUT_DONE_CH1_INT_CLR_V  0x1
+#define GDMA_OUT_DONE_CH1_INT_CLR_S  0
+
+#define GDMA_OUTFIFO_STATUS_CH1_REG          (DR_REG_GDMA_BASE + 0x138)
+/* GDMA_OUT_REMAIN_UNDER_4B_L3_CH1 : RO ;bitpos:[26] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH1    (BIT(26))
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH1_M  (BIT(26))
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH1_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH1_S  26
+/* GDMA_OUT_REMAIN_UNDER_3B_L3_CH1 : RO ;bitpos:[25] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH1    (BIT(25))
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH1_M  (BIT(25))
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH1_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH1_S  25
+/* GDMA_OUT_REMAIN_UNDER_2B_L3_CH1 : RO ;bitpos:[24] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH1    (BIT(24))
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH1_M  (BIT(24))
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH1_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH1_S  24
+/* GDMA_OUT_REMAIN_UNDER_1B_L3_CH1 : RO ;bitpos:[23] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH1    (BIT(23))
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH1_M  (BIT(23))
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH1_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH1_S  23
+/* GDMA_OUTFIFO_CNT_L3_CH1 : RO ;bitpos:[22:18] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L3 Tx FIFO for Tx channel 1..*/
+#define GDMA_OUTFIFO_CNT_L3_CH1    0x0000001F
+#define GDMA_OUTFIFO_CNT_L3_CH1_M  ((GDMA_OUTFIFO_CNT_L3_CH1_V)<<(GDMA_OUTFIFO_CNT_L3_CH1_S))
+#define GDMA_OUTFIFO_CNT_L3_CH1_V  0x1F
+#define GDMA_OUTFIFO_CNT_L3_CH1_S  18
+/* GDMA_OUTFIFO_CNT_L2_CH1 : RO ;bitpos:[17:11] ;default: 7'b0 ; */
+/*description: The register stores the byte number of the data in L2 Tx FIFO for Tx channel 1..*/
+#define GDMA_OUTFIFO_CNT_L2_CH1    0x0000007F
+#define GDMA_OUTFIFO_CNT_L2_CH1_M  ((GDMA_OUTFIFO_CNT_L2_CH1_V)<<(GDMA_OUTFIFO_CNT_L2_CH1_S))
+#define GDMA_OUTFIFO_CNT_L2_CH1_V  0x7F
+#define GDMA_OUTFIFO_CNT_L2_CH1_S  11
+/* GDMA_OUTFIFO_CNT_L1_CH1 : RO ;bitpos:[10:6] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L1 Tx FIFO for Tx channel 1..*/
+#define GDMA_OUTFIFO_CNT_L1_CH1    0x0000001F
+#define GDMA_OUTFIFO_CNT_L1_CH1_M  ((GDMA_OUTFIFO_CNT_L1_CH1_V)<<(GDMA_OUTFIFO_CNT_L1_CH1_S))
+#define GDMA_OUTFIFO_CNT_L1_CH1_V  0x1F
+#define GDMA_OUTFIFO_CNT_L1_CH1_S  6
+/* GDMA_OUTFIFO_EMPTY_L3_CH1 : RO ;bitpos:[5] ;default: 1'b1 ; */
+/*description: L3 Tx FIFO empty signal for Tx channel 1..*/
+#define GDMA_OUTFIFO_EMPTY_L3_CH1    (BIT(5))
+#define GDMA_OUTFIFO_EMPTY_L3_CH1_M  (BIT(5))
+#define GDMA_OUTFIFO_EMPTY_L3_CH1_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L3_CH1_S  5
+/* GDMA_OUTFIFO_FULL_L3_CH1 : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: L3 Tx FIFO full signal for Tx channel 1..*/
+#define GDMA_OUTFIFO_FULL_L3_CH1    (BIT(4))
+#define GDMA_OUTFIFO_FULL_L3_CH1_M  (BIT(4))
+#define GDMA_OUTFIFO_FULL_L3_CH1_V  0x1
+#define GDMA_OUTFIFO_FULL_L3_CH1_S  4
+/* GDMA_OUTFIFO_EMPTY_L2_CH1 : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: L2 Tx FIFO empty signal for Tx channel 1..*/
+#define GDMA_OUTFIFO_EMPTY_L2_CH1    (BIT(3))
+#define GDMA_OUTFIFO_EMPTY_L2_CH1_M  (BIT(3))
+#define GDMA_OUTFIFO_EMPTY_L2_CH1_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L2_CH1_S  3
+/* GDMA_OUTFIFO_FULL_L2_CH1 : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: L2 Tx FIFO full signal for Tx channel 1..*/
+#define GDMA_OUTFIFO_FULL_L2_CH1    (BIT(2))
+#define GDMA_OUTFIFO_FULL_L2_CH1_M  (BIT(2))
+#define GDMA_OUTFIFO_FULL_L2_CH1_V  0x1
+#define GDMA_OUTFIFO_FULL_L2_CH1_S  2
+/* GDMA_OUTFIFO_EMPTY_L1_CH1 : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: L1 Tx FIFO empty signal for Tx channel 1..*/
+#define GDMA_OUTFIFO_EMPTY_L1_CH1    (BIT(1))
+#define GDMA_OUTFIFO_EMPTY_L1_CH1_M  (BIT(1))
+#define GDMA_OUTFIFO_EMPTY_L1_CH1_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L1_CH1_S  1
+/* GDMA_OUTFIFO_FULL_L1_CH1 : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: L1 Tx FIFO full signal for Tx channel 1..*/
+#define GDMA_OUTFIFO_FULL_L1_CH1    (BIT(0))
+#define GDMA_OUTFIFO_FULL_L1_CH1_M  (BIT(0))
+#define GDMA_OUTFIFO_FULL_L1_CH1_V  0x1
+#define GDMA_OUTFIFO_FULL_L1_CH1_S  0
+
+#define GDMA_OUT_PUSH_CH1_REG          (DR_REG_GDMA_BASE + 0x13C)
+/* GDMA_OUTFIFO_PUSH_CH1 : R/W/SC ;bitpos:[9] ;default: 1'h0 ; */
+/*description: Set this bit to push data into DMA FIFO..*/
+#define GDMA_OUTFIFO_PUSH_CH1    (BIT(9))
+#define GDMA_OUTFIFO_PUSH_CH1_M  (BIT(9))
+#define GDMA_OUTFIFO_PUSH_CH1_V  0x1
+#define GDMA_OUTFIFO_PUSH_CH1_S  9
+/* GDMA_OUTFIFO_WDATA_CH1 : R/W ;bitpos:[8:0] ;default: 9'h0 ; */
+/*description: This register stores the data that need to be pushed into DMA FIFO..*/
+#define GDMA_OUTFIFO_WDATA_CH1    0x000001FF
+#define GDMA_OUTFIFO_WDATA_CH1_M  ((GDMA_OUTFIFO_WDATA_CH1_V)<<(GDMA_OUTFIFO_WDATA_CH1_S))
+#define GDMA_OUTFIFO_WDATA_CH1_V  0x1FF
+#define GDMA_OUTFIFO_WDATA_CH1_S  0
+
+#define GDMA_OUT_LINK_CH1_REG          (DR_REG_GDMA_BASE + 0x140)
+/* GDMA_OUTLINK_PARK_CH1 : RO ;bitpos:[23] ;default: 1'h1 ; */
+/*description: 1: the outlink descriptor's FSM is in idle state.  0: the outlink descriptor's F
+SM is working..*/
+#define GDMA_OUTLINK_PARK_CH1    (BIT(23))
+#define GDMA_OUTLINK_PARK_CH1_M  (BIT(23))
+#define GDMA_OUTLINK_PARK_CH1_V  0x1
+#define GDMA_OUTLINK_PARK_CH1_S  23
+/* GDMA_OUTLINK_RESTART_CH1 : R/W/SC ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Set this bit to restart a new outlink from the last address. .*/
+#define GDMA_OUTLINK_RESTART_CH1    (BIT(22))
+#define GDMA_OUTLINK_RESTART_CH1_M  (BIT(22))
+#define GDMA_OUTLINK_RESTART_CH1_V  0x1
+#define GDMA_OUTLINK_RESTART_CH1_S  22
+/* GDMA_OUTLINK_START_CH1 : R/W/SC ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to start dealing with the outlink descriptors..*/
+#define GDMA_OUTLINK_START_CH1    (BIT(21))
+#define GDMA_OUTLINK_START_CH1_M  (BIT(21))
+#define GDMA_OUTLINK_START_CH1_V  0x1
+#define GDMA_OUTLINK_START_CH1_S  21
+/* GDMA_OUTLINK_STOP_CH1 : R/W/SC ;bitpos:[20] ;default: 1'b0 ; */
+/*description: Set this bit to stop dealing with the outlink descriptors..*/
+#define GDMA_OUTLINK_STOP_CH1    (BIT(20))
+#define GDMA_OUTLINK_STOP_CH1_M  (BIT(20))
+#define GDMA_OUTLINK_STOP_CH1_V  0x1
+#define GDMA_OUTLINK_STOP_CH1_S  20
+/* GDMA_OUTLINK_ADDR_CH1 : R/W ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: This register stores the 20 least significant bits of the first outlink descript
+or's address..*/
+#define GDMA_OUTLINK_ADDR_CH1    0x000FFFFF
+#define GDMA_OUTLINK_ADDR_CH1_M  ((GDMA_OUTLINK_ADDR_CH1_V)<<(GDMA_OUTLINK_ADDR_CH1_S))
+#define GDMA_OUTLINK_ADDR_CH1_V  0xFFFFF
+#define GDMA_OUTLINK_ADDR_CH1_S  0
+
+#define GDMA_OUT_STATE_CH1_REG          (DR_REG_GDMA_BASE + 0x144)
+/* GDMA_OUT_STATE_CH1 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_STATE_CH1    0x00000007
+#define GDMA_OUT_STATE_CH1_M  ((GDMA_OUT_STATE_CH1_V)<<(GDMA_OUT_STATE_CH1_S))
+#define GDMA_OUT_STATE_CH1_V  0x7
+#define GDMA_OUT_STATE_CH1_S  20
+/* GDMA_OUT_DSCR_STATE_CH1 : RO ;bitpos:[19:18] ;default: 2'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_DSCR_STATE_CH1    0x00000003
+#define GDMA_OUT_DSCR_STATE_CH1_M  ((GDMA_OUT_DSCR_STATE_CH1_V)<<(GDMA_OUT_DSCR_STATE_CH1_S))
+#define GDMA_OUT_DSCR_STATE_CH1_V  0x3
+#define GDMA_OUT_DSCR_STATE_CH1_S  18
+/* GDMA_OUTLINK_DSCR_ADDR_CH1 : RO ;bitpos:[17:0] ;default: 18'b0 ; */
+/*description: This register stores the current outlink descriptor's address..*/
+#define GDMA_OUTLINK_DSCR_ADDR_CH1    0x0003FFFF
+#define GDMA_OUTLINK_DSCR_ADDR_CH1_M  ((GDMA_OUTLINK_DSCR_ADDR_CH1_V)<<(GDMA_OUTLINK_DSCR_ADDR_CH1_S))
+#define GDMA_OUTLINK_DSCR_ADDR_CH1_V  0x3FFFF
+#define GDMA_OUTLINK_DSCR_ADDR_CH1_S  0
+
+#define GDMA_OUT_EOF_DES_ADDR_CH1_REG          (DR_REG_GDMA_BASE + 0x148)
+/* GDMA_OUT_EOF_DES_ADDR_CH1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the outlink descriptor when the EOF bit in t
+his descriptor is 1..*/
+#define GDMA_OUT_EOF_DES_ADDR_CH1    0xFFFFFFFF
+#define GDMA_OUT_EOF_DES_ADDR_CH1_M  ((GDMA_OUT_EOF_DES_ADDR_CH1_V)<<(GDMA_OUT_EOF_DES_ADDR_CH1_S))
+#define GDMA_OUT_EOF_DES_ADDR_CH1_V  0xFFFFFFFF
+#define GDMA_OUT_EOF_DES_ADDR_CH1_S  0
+
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH1_REG          (DR_REG_GDMA_BASE + 0x14C)
+/* GDMA_OUT_EOF_BFR_DES_ADDR_CH1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the outlink descriptor before the last outli
+nk descriptor..*/
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH1    0xFFFFFFFF
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH1_M  ((GDMA_OUT_EOF_BFR_DES_ADDR_CH1_V)<<(GDMA_OUT_EOF_BFR_DES_ADDR_CH1_S))
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH1_V  0xFFFFFFFF
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH1_S  0
+
+#define GDMA_OUT_DSCR_CH1_REG          (DR_REG_GDMA_BASE + 0x150)
+/* GDMA_OUTLINK_DSCR_CH1 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the current outlink descriptor y..*/
+#define GDMA_OUTLINK_DSCR_CH1    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_CH1_M  ((GDMA_OUTLINK_DSCR_CH1_V)<<(GDMA_OUTLINK_DSCR_CH1_S))
+#define GDMA_OUTLINK_DSCR_CH1_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_CH1_S  0
+
+#define GDMA_OUT_DSCR_BF0_CH1_REG          (DR_REG_GDMA_BASE + 0x154)
+/* GDMA_OUTLINK_DSCR_BF0_CH1 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the last outlink descriptor y-1..*/
+#define GDMA_OUTLINK_DSCR_BF0_CH1    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF0_CH1_M  ((GDMA_OUTLINK_DSCR_BF0_CH1_V)<<(GDMA_OUTLINK_DSCR_BF0_CH1_S))
+#define GDMA_OUTLINK_DSCR_BF0_CH1_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF0_CH1_S  0
+
+#define GDMA_OUT_DSCR_BF1_CH1_REG          (DR_REG_GDMA_BASE + 0x158)
+/* GDMA_OUTLINK_DSCR_BF1_CH1 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the second-to-last inlink descriptor x-2..*/
+#define GDMA_OUTLINK_DSCR_BF1_CH1    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF1_CH1_M  ((GDMA_OUTLINK_DSCR_BF1_CH1_V)<<(GDMA_OUTLINK_DSCR_BF1_CH1_S))
+#define GDMA_OUTLINK_DSCR_BF1_CH1_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF1_CH1_S  0
+
+#define GDMA_OUT_WIGHT_CH1_REG          (DR_REG_GDMA_BASE + 0x15C)
+/* GDMA_TX_WEIGHT_CH1 : R/W ;bitpos:[11:8] ;default: 4'hf ; */
+/*description: The weight of Tx channel 1. .*/
+#define GDMA_TX_WEIGHT_CH1    0x0000000F
+#define GDMA_TX_WEIGHT_CH1_M  ((GDMA_TX_WEIGHT_CH1_V)<<(GDMA_TX_WEIGHT_CH1_S))
+#define GDMA_TX_WEIGHT_CH1_V  0xF
+#define GDMA_TX_WEIGHT_CH1_S  8
+
+#define GDMA_OUT_PRI_CH1_REG          (DR_REG_GDMA_BASE + 0x164)
+/* GDMA_TX_PRI_CH1 : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: The priority of Tx channel 1. The larger of the value, the higher of the priorit
+y..*/
+#define GDMA_TX_PRI_CH1    0x0000000F
+#define GDMA_TX_PRI_CH1_M  ((GDMA_TX_PRI_CH1_V)<<(GDMA_TX_PRI_CH1_S))
+#define GDMA_TX_PRI_CH1_V  0xF
+#define GDMA_TX_PRI_CH1_S  0
+
+#define GDMA_OUT_PERI_SEL_CH1_REG          (DR_REG_GDMA_BASE + 0x168)
+/* GDMA_PERI_OUT_SEL_CH1 : R/W ;bitpos:[5:0] ;default: 6'h3f ; */
+/*description: This register is used to select peripheral for Tx channel 1. 0:SPI2. 1: SPI3. 2:
+ UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.; 7: AE
+S. 8: SHA. 9: ADC_DAC..*/
+#define GDMA_PERI_OUT_SEL_CH1    0x0000003F
+#define GDMA_PERI_OUT_SEL_CH1_M  ((GDMA_PERI_OUT_SEL_CH1_V)<<(GDMA_PERI_OUT_SEL_CH1_S))
+#define GDMA_PERI_OUT_SEL_CH1_V  0x3F
+#define GDMA_PERI_OUT_SEL_CH1_S  0
+
+#define GDMA_IN_CONF0_CH2_REG          (DR_REG_GDMA_BASE + 0x180)
+/* GDMA_MEM_TRANS_EN_CH2 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit 1 to enable automatic transmitting data from memory to memory via D
+MA..*/
+#define GDMA_MEM_TRANS_EN_CH2    (BIT(4))
+#define GDMA_MEM_TRANS_EN_CH2_M  (BIT(4))
+#define GDMA_MEM_TRANS_EN_CH2_V  0x1
+#define GDMA_MEM_TRANS_EN_CH2_S  4
+/* GDMA_IN_DATA_BURST_EN_CH2 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Rx channel 2 receiving data
+when accessing internal SRAM. .*/
+#define GDMA_IN_DATA_BURST_EN_CH2    (BIT(3))
+#define GDMA_IN_DATA_BURST_EN_CH2_M  (BIT(3))
+#define GDMA_IN_DATA_BURST_EN_CH2_V  0x1
+#define GDMA_IN_DATA_BURST_EN_CH2_S  3
+/* GDMA_INDSCR_BURST_EN_CH2 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Rx channel 2 reading link de
+scriptor when accessing internal SRAM. .*/
+#define GDMA_INDSCR_BURST_EN_CH2    (BIT(2))
+#define GDMA_INDSCR_BURST_EN_CH2_M  (BIT(2))
+#define GDMA_INDSCR_BURST_EN_CH2_V  0x1
+#define GDMA_INDSCR_BURST_EN_CH2_S  2
+/* GDMA_IN_LOOP_TEST_CH2 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_LOOP_TEST_CH2    (BIT(1))
+#define GDMA_IN_LOOP_TEST_CH2_M  (BIT(1))
+#define GDMA_IN_LOOP_TEST_CH2_V  0x1
+#define GDMA_IN_LOOP_TEST_CH2_S  1
+/* GDMA_IN_RST_CH2 : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: This bit is used to reset DMA channel 2 Rx FSM and Rx FIFO pointer..*/
+#define GDMA_IN_RST_CH2    (BIT(0))
+#define GDMA_IN_RST_CH2_M  (BIT(0))
+#define GDMA_IN_RST_CH2_V  0x1
+#define GDMA_IN_RST_CH2_S  0
+
+#define GDMA_IN_CONF1_CH2_REG          (DR_REG_GDMA_BASE + 0x184)
+/* GDMA_IN_EXT_MEM_BK_SIZE_CH2 : R/W ;bitpos:[14:13] ;default: 2'b0 ; */
+/*description: Block size of Rx channel 2 when DMA access external SRAM. 0: 16 bytes      1: 32
+ bytes    2/3:reserved.*/
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH2    0x00000003
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH2_M  ((GDMA_IN_EXT_MEM_BK_SIZE_CH2_V)<<(GDMA_IN_EXT_MEM_BK_SIZE_CH2_S))
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH2_V  0x3
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH2_S  13
+/* GDMA_IN_CHECK_OWNER_CH2 : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to enable checking the owner attribute of the link descriptor..*/
+#define GDMA_IN_CHECK_OWNER_CH2    (BIT(12))
+#define GDMA_IN_CHECK_OWNER_CH2_M  (BIT(12))
+#define GDMA_IN_CHECK_OWNER_CH2_V  0x1
+#define GDMA_IN_CHECK_OWNER_CH2_S  12
+/* GDMA_DMA_INFIFO_FULL_THRS_CH2 : R/W ;bitpos:[11:0] ;default: 12'hc ; */
+/*description: This register is used to generate the INFIFO_FULL_WM_INT interrupt when Rx chann
+el 2 received byte number in Rx FIFO is up to the value of the register..*/
+#define GDMA_DMA_INFIFO_FULL_THRS_CH2    0x00000FFF
+#define GDMA_DMA_INFIFO_FULL_THRS_CH2_M  ((GDMA_DMA_INFIFO_FULL_THRS_CH2_V)<<(GDMA_DMA_INFIFO_FULL_THRS_CH2_S))
+#define GDMA_DMA_INFIFO_FULL_THRS_CH2_V  0xFFF
+#define GDMA_DMA_INFIFO_FULL_THRS_CH2_S  0
+
+#define GDMA_IN_INT_RAW_CH2_REG          (DR_REG_GDMA_BASE + 0x188)
+/* GDMA_INFIFO_UDF_L3_CH2_INT_RAW : R/WTC/SS ;bitpos:[9] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Rx channel 2 is
+underflow. .*/
+#define GDMA_INFIFO_UDF_L3_CH2_INT_RAW    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH2_INT_RAW_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH2_INT_RAW_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH2_INT_RAW_S  9
+/* GDMA_INFIFO_OVF_L3_CH2_INT_RAW : R/WTC/SS ;bitpos:[8] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Rx channel 2 is
+overflow. .*/
+#define GDMA_INFIFO_OVF_L3_CH2_INT_RAW    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH2_INT_RAW_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH2_INT_RAW_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH2_INT_RAW_S  8
+/* GDMA_INFIFO_UDF_L1_CH2_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Rx channel 2 is
+underflow. .*/
+#define GDMA_INFIFO_UDF_L1_CH2_INT_RAW    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH2_INT_RAW_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH2_INT_RAW_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH2_INT_RAW_S  7
+/* GDMA_INFIFO_OVF_L1_CH2_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Rx channel 2 is
+overflow. .*/
+#define GDMA_INFIFO_OVF_L1_CH2_INT_RAW    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH2_INT_RAW_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH2_INT_RAW_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH2_INT_RAW_S  6
+/* GDMA_INFIFO_FULL_WM_CH2_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when received data byte number is up t
+o threshold configured by REG_DMA_INFIFO_FULL_THRS_CH0 in Rx FIFO of channel 2..*/
+#define GDMA_INFIFO_FULL_WM_CH2_INT_RAW    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH2_INT_RAW_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH2_INT_RAW_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH2_INT_RAW_S  5
+/* GDMA_IN_DSCR_EMPTY_CH2_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when Rx buffer pointed by inlink is fu
+ll and receiving data is not completed, but there is no more inlink for Rx chann
+el 2..*/
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_RAW    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_RAW_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_RAW_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_RAW_S  4
+/* GDMA_IN_DSCR_ERR_CH2_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when detecting inlink descriptor error
+, including owner error, the second and third word error of inlink descriptor fo
+r Rx channel 2..*/
+#define GDMA_IN_DSCR_ERR_CH2_INT_RAW    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH2_INT_RAW_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH2_INT_RAW_V  0x1
+#define GDMA_IN_DSCR_ERR_CH2_INT_RAW_S  3
+/* GDMA_IN_ERR_EOF_CH2_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when data error is detected only in th
+e case that the peripheral is UHCI0 for Rx channel 2. For other peripherals, thi
+s raw interrupt is reserved..*/
+#define GDMA_IN_ERR_EOF_CH2_INT_RAW    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH2_INT_RAW_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH2_INT_RAW_V  0x1
+#define GDMA_IN_ERR_EOF_CH2_INT_RAW_S  2
+/* GDMA_IN_SUC_EOF_CH2_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one inli
+nk descriptor has been received for Rx channel 2. For UHCI0, the raw interrupt b
+it turns to high level when the last data pointed by one inlink descriptor has b
+een received and no data error is detected for Rx channel 0..*/
+#define GDMA_IN_SUC_EOF_CH2_INT_RAW    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH2_INT_RAW_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH2_INT_RAW_V  0x1
+#define GDMA_IN_SUC_EOF_CH2_INT_RAW_S  1
+/* GDMA_IN_DONE_CH2_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one inli
+nk descriptor has been received for Rx channel 2..*/
+#define GDMA_IN_DONE_CH2_INT_RAW    (BIT(0))
+#define GDMA_IN_DONE_CH2_INT_RAW_M  (BIT(0))
+#define GDMA_IN_DONE_CH2_INT_RAW_V  0x1
+#define GDMA_IN_DONE_CH2_INT_RAW_S  0
+
+#define GDMA_IN_INT_ST_CH2_REG          (DR_REG_GDMA_BASE + 0x18C)
+/* GDMA_INFIFO_UDF_L3_CH2_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH2_INT_ST    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH2_INT_ST_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH2_INT_ST_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH2_INT_ST_S  9
+/* GDMA_INFIFO_OVF_L3_CH2_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH2_INT_ST    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH2_INT_ST_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH2_INT_ST_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH2_INT_ST_S  8
+/* GDMA_INFIFO_UDF_L1_CH2_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH2_INT_ST    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH2_INT_ST_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH2_INT_ST_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH2_INT_ST_S  7
+/* GDMA_INFIFO_OVF_L1_CH2_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH2_INT_ST    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH2_INT_ST_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH2_INT_ST_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH2_INT_ST_S  6
+/* GDMA_INFIFO_FULL_WM_CH2_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_INFIFO_FULL_WM_CH2_INT_ST    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH2_INT_ST_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH2_INT_ST_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH2_INT_ST_S  5
+/* GDMA_IN_DSCR_EMPTY_CH2_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_ST    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_ST_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_ST_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_ST_S  4
+/* GDMA_IN_DSCR_ERR_CH2_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH2_INT_ST    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH2_INT_ST_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH2_INT_ST_V  0x1
+#define GDMA_IN_DSCR_ERR_CH2_INT_ST_S  3
+/* GDMA_IN_ERR_EOF_CH2_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH2_INT_ST    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH2_INT_ST_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH2_INT_ST_V  0x1
+#define GDMA_IN_ERR_EOF_CH2_INT_ST_S  2
+/* GDMA_IN_SUC_EOF_CH2_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH2_INT_ST    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH2_INT_ST_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH2_INT_ST_V  0x1
+#define GDMA_IN_SUC_EOF_CH2_INT_ST_S  1
+/* GDMA_IN_DONE_CH2_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH2_INT_ST    (BIT(0))
+#define GDMA_IN_DONE_CH2_INT_ST_M  (BIT(0))
+#define GDMA_IN_DONE_CH2_INT_ST_V  0x1
+#define GDMA_IN_DONE_CH2_INT_ST_S  0
+
+#define GDMA_IN_INT_ENA_CH2_REG          (DR_REG_GDMA_BASE + 0x190)
+/* GDMA_INFIFO_UDF_L3_CH2_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH2_INT_ENA    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH2_INT_ENA_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH2_INT_ENA_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH2_INT_ENA_S  9
+/* GDMA_INFIFO_OVF_L3_CH2_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH2_INT_ENA    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH2_INT_ENA_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH2_INT_ENA_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH2_INT_ENA_S  8
+/* GDMA_INFIFO_UDF_L1_CH2_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH2_INT_ENA    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH2_INT_ENA_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH2_INT_ENA_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH2_INT_ENA_S  7
+/* GDMA_INFIFO_OVF_L1_CH2_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH2_INT_ENA    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH2_INT_ENA_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH2_INT_ENA_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH2_INT_ENA_S  6
+/* GDMA_INFIFO_FULL_WM_CH2_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_INFIFO_FULL_WM_CH2_INT_ENA    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH2_INT_ENA_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH2_INT_ENA_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH2_INT_ENA_S  5
+/* GDMA_IN_DSCR_EMPTY_CH2_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_ENA    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_ENA_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_ENA_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_ENA_S  4
+/* GDMA_IN_DSCR_ERR_CH2_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH2_INT_ENA    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH2_INT_ENA_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH2_INT_ENA_V  0x1
+#define GDMA_IN_DSCR_ERR_CH2_INT_ENA_S  3
+/* GDMA_IN_ERR_EOF_CH2_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH2_INT_ENA    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH2_INT_ENA_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH2_INT_ENA_V  0x1
+#define GDMA_IN_ERR_EOF_CH2_INT_ENA_S  2
+/* GDMA_IN_SUC_EOF_CH2_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH2_INT_ENA    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH2_INT_ENA_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH2_INT_ENA_V  0x1
+#define GDMA_IN_SUC_EOF_CH2_INT_ENA_S  1
+/* GDMA_IN_DONE_CH2_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH2_INT_ENA    (BIT(0))
+#define GDMA_IN_DONE_CH2_INT_ENA_M  (BIT(0))
+#define GDMA_IN_DONE_CH2_INT_ENA_V  0x1
+#define GDMA_IN_DONE_CH2_INT_ENA_S  0
+
+#define GDMA_IN_INT_CLR_CH2_REG          (DR_REG_GDMA_BASE + 0x194)
+/* GDMA_INFIFO_UDF_L3_CH2_INT_CLR : WT ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH2_INT_CLR    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH2_INT_CLR_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH2_INT_CLR_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH2_INT_CLR_S  9
+/* GDMA_INFIFO_OVF_L3_CH2_INT_CLR : WT ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH2_INT_CLR    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH2_INT_CLR_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH2_INT_CLR_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH2_INT_CLR_S  8
+/* GDMA_INFIFO_UDF_L1_CH2_INT_CLR : WT ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH2_INT_CLR    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH2_INT_CLR_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH2_INT_CLR_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH2_INT_CLR_S  7
+/* GDMA_INFIFO_OVF_L1_CH2_INT_CLR : WT ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH2_INT_CLR    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH2_INT_CLR_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH2_INT_CLR_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH2_INT_CLR_S  6
+/* GDMA_DMA_INFIFO_FULL_WM_CH2_INT_CLR : WT ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_DMA_INFIFO_FULL_WM_CH2_INT_CLR    (BIT(5))
+#define GDMA_DMA_INFIFO_FULL_WM_CH2_INT_CLR_M  (BIT(5))
+#define GDMA_DMA_INFIFO_FULL_WM_CH2_INT_CLR_V  0x1
+#define GDMA_DMA_INFIFO_FULL_WM_CH2_INT_CLR_S  5
+/* GDMA_IN_DSCR_EMPTY_CH2_INT_CLR : WT ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_CLR    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_CLR_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_CLR_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH2_INT_CLR_S  4
+/* GDMA_IN_DSCR_ERR_CH2_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH2_INT_CLR    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH2_INT_CLR_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH2_INT_CLR_V  0x1
+#define GDMA_IN_DSCR_ERR_CH2_INT_CLR_S  3
+/* GDMA_IN_ERR_EOF_CH2_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH2_INT_CLR    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH2_INT_CLR_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH2_INT_CLR_V  0x1
+#define GDMA_IN_ERR_EOF_CH2_INT_CLR_S  2
+/* GDMA_IN_SUC_EOF_CH2_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH2_INT_CLR    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH2_INT_CLR_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH2_INT_CLR_V  0x1
+#define GDMA_IN_SUC_EOF_CH2_INT_CLR_S  1
+/* GDMA_IN_DONE_CH2_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH2_INT_CLR    (BIT(0))
+#define GDMA_IN_DONE_CH2_INT_CLR_M  (BIT(0))
+#define GDMA_IN_DONE_CH2_INT_CLR_V  0x1
+#define GDMA_IN_DONE_CH2_INT_CLR_S  0
+
+#define GDMA_INFIFO_STATUS_CH2_REG          (DR_REG_GDMA_BASE + 0x198)
+/* GDMA_IN_BUF_HUNGRY_CH2 : RO ;bitpos:[28] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_BUF_HUNGRY_CH2    (BIT(28))
+#define GDMA_IN_BUF_HUNGRY_CH2_M  (BIT(28))
+#define GDMA_IN_BUF_HUNGRY_CH2_V  0x1
+#define GDMA_IN_BUF_HUNGRY_CH2_S  28
+/* GDMA_IN_REMAIN_UNDER_4B_L3_CH2 : RO ;bitpos:[27] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH2    (BIT(27))
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH2_M  (BIT(27))
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH2_V  0x1
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH2_S  27
+/* GDMA_IN_REMAIN_UNDER_3B_L3_CH2 : RO ;bitpos:[26] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH2    (BIT(26))
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH2_M  (BIT(26))
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH2_V  0x1
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH2_S  26
+/* GDMA_IN_REMAIN_UNDER_2B_L3_CH2 : RO ;bitpos:[25] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH2    (BIT(25))
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH2_M  (BIT(25))
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH2_V  0x1
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH2_S  25
+/* GDMA_IN_REMAIN_UNDER_1B_L3_CH2 : RO ;bitpos:[24] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH2    (BIT(24))
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH2_M  (BIT(24))
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH2_V  0x1
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH2_S  24
+/* GDMA_INFIFO_CNT_L3_CH2 : RO ;bitpos:[23:19] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L3 Rx FIFO for Rx channel 2..*/
+#define GDMA_INFIFO_CNT_L3_CH2    0x0000001F
+#define GDMA_INFIFO_CNT_L3_CH2_M  ((GDMA_INFIFO_CNT_L3_CH2_V)<<(GDMA_INFIFO_CNT_L3_CH2_S))
+#define GDMA_INFIFO_CNT_L3_CH2_V  0x1F
+#define GDMA_INFIFO_CNT_L3_CH2_S  19
+/* GDMA_INFIFO_CNT_L2_CH2 : RO ;bitpos:[18:12] ;default: 7'b0 ; */
+/*description: The register stores the byte number of the data in L2 Rx FIFO for Rx channel 2..*/
+#define GDMA_INFIFO_CNT_L2_CH2    0x0000007F
+#define GDMA_INFIFO_CNT_L2_CH2_M  ((GDMA_INFIFO_CNT_L2_CH2_V)<<(GDMA_INFIFO_CNT_L2_CH2_S))
+#define GDMA_INFIFO_CNT_L2_CH2_V  0x7F
+#define GDMA_INFIFO_CNT_L2_CH2_S  12
+/* GDMA_INFIFO_CNT_L1_CH2 : RO ;bitpos:[11:6] ;default: 6'b0 ; */
+/*description: The register stores the byte number of the data in L1 Rx FIFO for Rx channel 2..*/
+#define GDMA_INFIFO_CNT_L1_CH2    0x0000003F
+#define GDMA_INFIFO_CNT_L1_CH2_M  ((GDMA_INFIFO_CNT_L1_CH2_V)<<(GDMA_INFIFO_CNT_L1_CH2_S))
+#define GDMA_INFIFO_CNT_L1_CH2_V  0x3F
+#define GDMA_INFIFO_CNT_L1_CH2_S  6
+/* GDMA_INFIFO_EMPTY_L3_CH2 : RO ;bitpos:[5] ;default: 1'b1 ; */
+/*description: L3 Rx FIFO empty signal for Rx channel 2..*/
+#define GDMA_INFIFO_EMPTY_L3_CH2    (BIT(5))
+#define GDMA_INFIFO_EMPTY_L3_CH2_M  (BIT(5))
+#define GDMA_INFIFO_EMPTY_L3_CH2_V  0x1
+#define GDMA_INFIFO_EMPTY_L3_CH2_S  5
+/* GDMA_INFIFO_FULL_L3_CH2 : RO ;bitpos:[4] ;default: 1'b1 ; */
+/*description: L3 Rx FIFO full signal for Rx channel 2..*/
+#define GDMA_INFIFO_FULL_L3_CH2    (BIT(4))
+#define GDMA_INFIFO_FULL_L3_CH2_M  (BIT(4))
+#define GDMA_INFIFO_FULL_L3_CH2_V  0x1
+#define GDMA_INFIFO_FULL_L3_CH2_S  4
+/* GDMA_INFIFO_EMPTY_L2_CH2 : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: L2 Rx FIFO empty signal for Rx channel 2..*/
+#define GDMA_INFIFO_EMPTY_L2_CH2    (BIT(3))
+#define GDMA_INFIFO_EMPTY_L2_CH2_M  (BIT(3))
+#define GDMA_INFIFO_EMPTY_L2_CH2_V  0x1
+#define GDMA_INFIFO_EMPTY_L2_CH2_S  3
+/* GDMA_INFIFO_FULL_L2_CH2 : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: L2 Rx FIFO full signal for Rx channel 2..*/
+#define GDMA_INFIFO_FULL_L2_CH2    (BIT(2))
+#define GDMA_INFIFO_FULL_L2_CH2_M  (BIT(2))
+#define GDMA_INFIFO_FULL_L2_CH2_V  0x1
+#define GDMA_INFIFO_FULL_L2_CH2_S  2
+/* GDMA_INFIFO_EMPTY_L1_CH2 : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: L1 Rx FIFO empty signal for Rx channel 2..*/
+#define GDMA_INFIFO_EMPTY_L1_CH2    (BIT(1))
+#define GDMA_INFIFO_EMPTY_L1_CH2_M  (BIT(1))
+#define GDMA_INFIFO_EMPTY_L1_CH2_V  0x1
+#define GDMA_INFIFO_EMPTY_L1_CH2_S  1
+/* GDMA_INFIFO_FULL_L1_CH2 : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: L1 Rx FIFO full signal for Rx channel 2..*/
+#define GDMA_INFIFO_FULL_L1_CH2    (BIT(0))
+#define GDMA_INFIFO_FULL_L1_CH2_M  (BIT(0))
+#define GDMA_INFIFO_FULL_L1_CH2_V  0x1
+#define GDMA_INFIFO_FULL_L1_CH2_S  0
+
+#define GDMA_IN_POP_CH2_REG          (DR_REG_GDMA_BASE + 0x19C)
+/* GDMA_INFIFO_POP_CH2 : R/W/SC ;bitpos:[12] ;default: 1'h0 ; */
+/*description: Set this bit to pop data from DMA FIFO..*/
+#define GDMA_INFIFO_POP_CH2    (BIT(12))
+#define GDMA_INFIFO_POP_CH2_M  (BIT(12))
+#define GDMA_INFIFO_POP_CH2_V  0x1
+#define GDMA_INFIFO_POP_CH2_S  12
+/* GDMA_INFIFO_RDATA_CH2 : RO ;bitpos:[11:0] ;default: 12'h800 ; */
+/*description: This register stores the data popping from DMA FIFO..*/
+#define GDMA_INFIFO_RDATA_CH2    0x00000FFF
+#define GDMA_INFIFO_RDATA_CH2_M  ((GDMA_INFIFO_RDATA_CH2_V)<<(GDMA_INFIFO_RDATA_CH2_S))
+#define GDMA_INFIFO_RDATA_CH2_V  0xFFF
+#define GDMA_INFIFO_RDATA_CH2_S  0
+
+#define GDMA_IN_LINK_CH2_REG          (DR_REG_GDMA_BASE + 0x1A0)
+/* GDMA_INLINK_PARK_CH2 : RO ;bitpos:[24] ;default: 1'h1 ; */
+/*description: 1: the inlink descriptor's FSM is in idle state.  0: the inlink descriptor's FSM
+ is working..*/
+#define GDMA_INLINK_PARK_CH2    (BIT(24))
+#define GDMA_INLINK_PARK_CH2_M  (BIT(24))
+#define GDMA_INLINK_PARK_CH2_V  0x1
+#define GDMA_INLINK_PARK_CH2_S  24
+/* GDMA_INLINK_RESTART_CH2 : R/W/SC ;bitpos:[23] ;default: 1'b0 ; */
+/*description: Set this bit to mount a new inlink descriptor..*/
+#define GDMA_INLINK_RESTART_CH2    (BIT(23))
+#define GDMA_INLINK_RESTART_CH2_M  (BIT(23))
+#define GDMA_INLINK_RESTART_CH2_V  0x1
+#define GDMA_INLINK_RESTART_CH2_S  23
+/* GDMA_INLINK_START_CH2 : R/W/SC ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Set this bit to start dealing with the inlink descriptors..*/
+#define GDMA_INLINK_START_CH2    (BIT(22))
+#define GDMA_INLINK_START_CH2_M  (BIT(22))
+#define GDMA_INLINK_START_CH2_V  0x1
+#define GDMA_INLINK_START_CH2_S  22
+/* GDMA_INLINK_STOP_CH2 : R/W/SC ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to stop dealing with the inlink descriptors..*/
+#define GDMA_INLINK_STOP_CH2    (BIT(21))
+#define GDMA_INLINK_STOP_CH2_M  (BIT(21))
+#define GDMA_INLINK_STOP_CH2_V  0x1
+#define GDMA_INLINK_STOP_CH2_S  21
+/* GDMA_INLINK_AUTO_RET_CH2 : R/W ;bitpos:[20] ;default: 1'b1 ; */
+/*description: Set this bit to return to current inlink descriptor's address, when there are so
+me errors in current receiving data..*/
+#define GDMA_INLINK_AUTO_RET_CH2    (BIT(20))
+#define GDMA_INLINK_AUTO_RET_CH2_M  (BIT(20))
+#define GDMA_INLINK_AUTO_RET_CH2_V  0x1
+#define GDMA_INLINK_AUTO_RET_CH2_S  20
+/* GDMA_INLINK_ADDR_CH2 : R/W ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: This register stores the 20 least significant bits of the first inlink descripto
+r's address..*/
+#define GDMA_INLINK_ADDR_CH2    0x000FFFFF
+#define GDMA_INLINK_ADDR_CH2_M  ((GDMA_INLINK_ADDR_CH2_V)<<(GDMA_INLINK_ADDR_CH2_S))
+#define GDMA_INLINK_ADDR_CH2_V  0xFFFFF
+#define GDMA_INLINK_ADDR_CH2_S  0
+
+#define GDMA_IN_STATE_CH2_REG          (DR_REG_GDMA_BASE + 0x1A4)
+/* GDMA_IN_STATE_CH2 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_STATE_CH2    0x00000007
+#define GDMA_IN_STATE_CH2_M  ((GDMA_IN_STATE_CH2_V)<<(GDMA_IN_STATE_CH2_S))
+#define GDMA_IN_STATE_CH2_V  0x7
+#define GDMA_IN_STATE_CH2_S  20
+/* GDMA_IN_DSCR_STATE_CH2 : RO ;bitpos:[19:18] ;default: 2'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_DSCR_STATE_CH2    0x00000003
+#define GDMA_IN_DSCR_STATE_CH2_M  ((GDMA_IN_DSCR_STATE_CH2_V)<<(GDMA_IN_DSCR_STATE_CH2_S))
+#define GDMA_IN_DSCR_STATE_CH2_V  0x3
+#define GDMA_IN_DSCR_STATE_CH2_S  18
+/* GDMA_INLINK_DSCR_ADDR_CH2 : RO ;bitpos:[17:0] ;default: 18'b0 ; */
+/*description: This register stores the current inlink descriptor's address..*/
+#define GDMA_INLINK_DSCR_ADDR_CH2    0x0003FFFF
+#define GDMA_INLINK_DSCR_ADDR_CH2_M  ((GDMA_INLINK_DSCR_ADDR_CH2_V)<<(GDMA_INLINK_DSCR_ADDR_CH2_S))
+#define GDMA_INLINK_DSCR_ADDR_CH2_V  0x3FFFF
+#define GDMA_INLINK_DSCR_ADDR_CH2_S  0
+
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH2_REG          (DR_REG_GDMA_BASE + 0x1A8)
+/* GDMA_IN_SUC_EOF_DES_ADDR_CH2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the inlink descriptor when the EOF bit in th
+is descriptor is 1..*/
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH2    0xFFFFFFFF
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH2_M  ((GDMA_IN_SUC_EOF_DES_ADDR_CH2_V)<<(GDMA_IN_SUC_EOF_DES_ADDR_CH2_S))
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH2_V  0xFFFFFFFF
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH2_S  0
+
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH2_REG          (DR_REG_GDMA_BASE + 0x1AC)
+/* GDMA_IN_ERR_EOF_DES_ADDR_CH2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the inlink descriptor when there are some er
+rors in current receiving data. Only used when peripheral is UHCI0..*/
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH2    0xFFFFFFFF
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH2_M  ((GDMA_IN_ERR_EOF_DES_ADDR_CH2_V)<<(GDMA_IN_ERR_EOF_DES_ADDR_CH2_S))
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH2_V  0xFFFFFFFF
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH2_S  0
+
+#define GDMA_IN_DSCR_CH2_REG          (DR_REG_GDMA_BASE + 0x1B0)
+/* GDMA_INLINK_DSCR_CH2 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the current inlink descriptor x..*/
+#define GDMA_INLINK_DSCR_CH2    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_CH2_M  ((GDMA_INLINK_DSCR_CH2_V)<<(GDMA_INLINK_DSCR_CH2_S))
+#define GDMA_INLINK_DSCR_CH2_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_CH2_S  0
+
+#define GDMA_IN_DSCR_BF0_CH2_REG          (DR_REG_GDMA_BASE + 0x1B4)
+/* GDMA_INLINK_DSCR_BF0_CH2 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the last inlink descriptor x-1..*/
+#define GDMA_INLINK_DSCR_BF0_CH2    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF0_CH2_M  ((GDMA_INLINK_DSCR_BF0_CH2_V)<<(GDMA_INLINK_DSCR_BF0_CH2_S))
+#define GDMA_INLINK_DSCR_BF0_CH2_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF0_CH2_S  0
+
+#define GDMA_IN_DSCR_BF1_CH2_REG          (DR_REG_GDMA_BASE + 0x1B8)
+/* GDMA_INLINK_DSCR_BF1_CH2 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the second-to-last inlink descriptor x-2..*/
+#define GDMA_INLINK_DSCR_BF1_CH2    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF1_CH2_M  ((GDMA_INLINK_DSCR_BF1_CH2_V)<<(GDMA_INLINK_DSCR_BF1_CH2_S))
+#define GDMA_INLINK_DSCR_BF1_CH2_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF1_CH2_S  0
+
+#define GDMA_IN_WIGHT_CH2_REG          (DR_REG_GDMA_BASE + 0x1BC)
+/* GDMA_RX_WEIGHT_CH2 : R/W ;bitpos:[11:8] ;default: 4'hf ; */
+/*description: The weight of Rx channel 2. .*/
+#define GDMA_RX_WEIGHT_CH2    0x0000000F
+#define GDMA_RX_WEIGHT_CH2_M  ((GDMA_RX_WEIGHT_CH2_V)<<(GDMA_RX_WEIGHT_CH2_S))
+#define GDMA_RX_WEIGHT_CH2_V  0xF
+#define GDMA_RX_WEIGHT_CH2_S  8
+
+#define GDMA_IN_PRI_CH2_REG          (DR_REG_GDMA_BASE + 0x1C4)
+/* GDMA_RX_PRI_CH2 : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: The priority of Rx channel 2. The larger of the value, the higher of the priorit
+y..*/
+#define GDMA_RX_PRI_CH2    0x0000000F
+#define GDMA_RX_PRI_CH2_M  ((GDMA_RX_PRI_CH2_V)<<(GDMA_RX_PRI_CH2_S))
+#define GDMA_RX_PRI_CH2_V  0xF
+#define GDMA_RX_PRI_CH2_S  0
+
+#define GDMA_IN_PERI_SEL_CH2_REG          (DR_REG_GDMA_BASE + 0x1C8)
+/* GDMA_PERI_IN_SEL_CH2 : R/W ;bitpos:[5:0] ;default: 6'h3f ; */
+/*description: This register is used to select peripheral for Rx channel 2. 0:SPI2. 1: SPI3. 2:
+ UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT..*/
+#define GDMA_PERI_IN_SEL_CH2    0x0000003F
+#define GDMA_PERI_IN_SEL_CH2_M  ((GDMA_PERI_IN_SEL_CH2_V)<<(GDMA_PERI_IN_SEL_CH2_S))
+#define GDMA_PERI_IN_SEL_CH2_V  0x3F
+#define GDMA_PERI_IN_SEL_CH2_S  0
+
+#define GDMA_OUT_CONF0_CH2_REG          (DR_REG_GDMA_BASE + 0x1E0)
+/* GDMA_OUT_DATA_BURST_EN_CH2 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Tx channel 2 transmitting da
+ta when accessing internal SRAM. .*/
+#define GDMA_OUT_DATA_BURST_EN_CH2    (BIT(5))
+#define GDMA_OUT_DATA_BURST_EN_CH2_M  (BIT(5))
+#define GDMA_OUT_DATA_BURST_EN_CH2_V  0x1
+#define GDMA_OUT_DATA_BURST_EN_CH2_S  5
+/* GDMA_OUTDSCR_BURST_EN_CH2 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Tx channel 2 reading link de
+scriptor when accessing internal SRAM. .*/
+#define GDMA_OUTDSCR_BURST_EN_CH2    (BIT(4))
+#define GDMA_OUTDSCR_BURST_EN_CH2_M  (BIT(4))
+#define GDMA_OUTDSCR_BURST_EN_CH2_V  0x1
+#define GDMA_OUTDSCR_BURST_EN_CH2_S  4
+/* GDMA_OUT_EOF_MODE_CH2 : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: EOF flag generation mode when transmitting data. 1: EOF flag for Tx channel 0 is
+ generated when data need to transmit has been popped from FIFO in DMA.*/
+#define GDMA_OUT_EOF_MODE_CH2    (BIT(3))
+#define GDMA_OUT_EOF_MODE_CH2_M  (BIT(3))
+#define GDMA_OUT_EOF_MODE_CH2_V  0x1
+#define GDMA_OUT_EOF_MODE_CH2_S  3
+/* GDMA_OUT_AUTO_WRBACK_CH2 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to enable automatic outlink-writeback when all the data in tx buffe
+r has been transmitted..*/
+#define GDMA_OUT_AUTO_WRBACK_CH2    (BIT(2))
+#define GDMA_OUT_AUTO_WRBACK_CH2_M  (BIT(2))
+#define GDMA_OUT_AUTO_WRBACK_CH2_V  0x1
+#define GDMA_OUT_AUTO_WRBACK_CH2_S  2
+/* GDMA_OUT_LOOP_TEST_CH2 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_LOOP_TEST_CH2    (BIT(1))
+#define GDMA_OUT_LOOP_TEST_CH2_M  (BIT(1))
+#define GDMA_OUT_LOOP_TEST_CH2_V  0x1
+#define GDMA_OUT_LOOP_TEST_CH2_S  1
+/* GDMA_OUT_RST_CH2 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to reset DMA channel 2 Tx FSM and Tx FIFO pointer..*/
+#define GDMA_OUT_RST_CH2    (BIT(0))
+#define GDMA_OUT_RST_CH2_M  (BIT(0))
+#define GDMA_OUT_RST_CH2_V  0x1
+#define GDMA_OUT_RST_CH2_S  0
+
+#define GDMA_OUT_CONF1_CH2_REG          (DR_REG_GDMA_BASE + 0x1E4)
+/* GDMA_OUT_EXT_MEM_BK_SIZE_CH2 : R/W ;bitpos:[14:13] ;default: 2'b0 ; */
+/*description: Block size of Tx channel 2 when DMA access external SRAM. 0: 16 bytes      1: 32
+ bytes    2/3:reserved.*/
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH2    0x00000003
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH2_M  ((GDMA_OUT_EXT_MEM_BK_SIZE_CH2_V)<<(GDMA_OUT_EXT_MEM_BK_SIZE_CH2_S))
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH2_V  0x3
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH2_S  13
+/* GDMA_OUT_CHECK_OWNER_CH2 : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to enable checking the owner attribute of the link descriptor..*/
+#define GDMA_OUT_CHECK_OWNER_CH2    (BIT(12))
+#define GDMA_OUT_CHECK_OWNER_CH2_M  (BIT(12))
+#define GDMA_OUT_CHECK_OWNER_CH2_V  0x1
+#define GDMA_OUT_CHECK_OWNER_CH2_S  12
+
+#define GDMA_OUT_INT_RAW_CH2_REG          (DR_REG_GDMA_BASE + 0x1E8)
+/* GDMA_OUTFIFO_UDF_L3_CH2_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Tx channel 2 is
+underflow. .*/
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_RAW    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_RAW_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_RAW_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH2_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Tx channel 2 is
+overflow. .*/
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_RAW    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_RAW_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_RAW_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH2_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Tx channel 2 is
+underflow. .*/
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_RAW    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_RAW_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_RAW_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH2_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Tx channel 2 is
+overflow. .*/
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_RAW    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_RAW_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_RAW_S  4
+/* GDMA_OUT_TOTAL_EOF_CH2_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when data corresponding a outlink (inc
+ludes one link descriptor or few link descriptors) is transmitted out for Tx cha
+nnel 2..*/
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_RAW    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_RAW_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_RAW_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_RAW_S  3
+/* GDMA_OUT_DSCR_ERR_CH2_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when detecting outlink descriptor erro
+r, including owner error, the second and third word error of outlink descriptor
+for Tx channel 2..*/
+#define GDMA_OUT_DSCR_ERR_CH2_INT_RAW    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH2_INT_RAW_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH2_INT_RAW_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH2_INT_RAW_S  2
+/* GDMA_OUT_EOF_CH2_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one outl
+ink descriptor has been read from memory for Tx channel 2. .*/
+#define GDMA_OUT_EOF_CH2_INT_RAW    (BIT(1))
+#define GDMA_OUT_EOF_CH2_INT_RAW_M  (BIT(1))
+#define GDMA_OUT_EOF_CH2_INT_RAW_V  0x1
+#define GDMA_OUT_EOF_CH2_INT_RAW_S  1
+/* GDMA_OUT_DONE_CH2_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one outl
+ink descriptor has been transmitted to peripherals for Tx channel 2..*/
+#define GDMA_OUT_DONE_CH2_INT_RAW    (BIT(0))
+#define GDMA_OUT_DONE_CH2_INT_RAW_M  (BIT(0))
+#define GDMA_OUT_DONE_CH2_INT_RAW_V  0x1
+#define GDMA_OUT_DONE_CH2_INT_RAW_S  0
+
+#define GDMA_OUT_INT_ST_CH2_REG          (DR_REG_GDMA_BASE + 0x1EC)
+/* GDMA_OUTFIFO_UDF_L3_CH2_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_ST    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_ST_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_ST_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_ST_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH2_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_ST    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_ST_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_ST_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_ST_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH2_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_ST    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_ST_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_ST_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_ST_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH2_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_ST    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_ST_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_ST_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_ST_S  4
+/* GDMA_OUT_TOTAL_EOF_CH2_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_ST    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_ST_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_ST_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_ST_S  3
+/* GDMA_OUT_DSCR_ERR_CH2_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH2_INT_ST    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH2_INT_ST_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH2_INT_ST_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH2_INT_ST_S  2
+/* GDMA_OUT_EOF_CH2_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH2_INT_ST    (BIT(1))
+#define GDMA_OUT_EOF_CH2_INT_ST_M  (BIT(1))
+#define GDMA_OUT_EOF_CH2_INT_ST_V  0x1
+#define GDMA_OUT_EOF_CH2_INT_ST_S  1
+/* GDMA_OUT_DONE_CH2_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH2_INT_ST    (BIT(0))
+#define GDMA_OUT_DONE_CH2_INT_ST_M  (BIT(0))
+#define GDMA_OUT_DONE_CH2_INT_ST_V  0x1
+#define GDMA_OUT_DONE_CH2_INT_ST_S  0
+
+#define GDMA_OUT_INT_ENA_CH2_REG          (DR_REG_GDMA_BASE + 0x1F0)
+/* GDMA_OUTFIFO_UDF_L3_CH2_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_ENA    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_ENA_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_ENA_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH2_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_ENA    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_ENA_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_ENA_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH2_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_ENA    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_ENA_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_ENA_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH2_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_ENA    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_ENA_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_ENA_S  4
+/* GDMA_OUT_TOTAL_EOF_CH2_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_ENA    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_ENA_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_ENA_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_ENA_S  3
+/* GDMA_OUT_DSCR_ERR_CH2_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH2_INT_ENA    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH2_INT_ENA_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH2_INT_ENA_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH2_INT_ENA_S  2
+/* GDMA_OUT_EOF_CH2_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH2_INT_ENA    (BIT(1))
+#define GDMA_OUT_EOF_CH2_INT_ENA_M  (BIT(1))
+#define GDMA_OUT_EOF_CH2_INT_ENA_V  0x1
+#define GDMA_OUT_EOF_CH2_INT_ENA_S  1
+/* GDMA_OUT_DONE_CH2_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH2_INT_ENA    (BIT(0))
+#define GDMA_OUT_DONE_CH2_INT_ENA_M  (BIT(0))
+#define GDMA_OUT_DONE_CH2_INT_ENA_V  0x1
+#define GDMA_OUT_DONE_CH2_INT_ENA_S  0
+
+#define GDMA_OUT_INT_CLR_CH2_REG          (DR_REG_GDMA_BASE + 0x1F4)
+/* GDMA_OUTFIFO_UDF_L3_CH2_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_CLR    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_CLR_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH2_INT_CLR_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH2_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_CLR    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_CLR_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH2_INT_CLR_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH2_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_CLR    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_CLR_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH2_INT_CLR_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH2_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_CLR    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_CLR_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH2_INT_CLR_S  4
+/* GDMA_OUT_TOTAL_EOF_CH2_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_CLR    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_CLR_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_CLR_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH2_INT_CLR_S  3
+/* GDMA_OUT_DSCR_ERR_CH2_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH2_INT_CLR    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH2_INT_CLR_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH2_INT_CLR_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH2_INT_CLR_S  2
+/* GDMA_OUT_EOF_CH2_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH2_INT_CLR    (BIT(1))
+#define GDMA_OUT_EOF_CH2_INT_CLR_M  (BIT(1))
+#define GDMA_OUT_EOF_CH2_INT_CLR_V  0x1
+#define GDMA_OUT_EOF_CH2_INT_CLR_S  1
+/* GDMA_OUT_DONE_CH2_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH2_INT_CLR    (BIT(0))
+#define GDMA_OUT_DONE_CH2_INT_CLR_M  (BIT(0))
+#define GDMA_OUT_DONE_CH2_INT_CLR_V  0x1
+#define GDMA_OUT_DONE_CH2_INT_CLR_S  0
+
+#define GDMA_OUTFIFO_STATUS_CH2_REG          (DR_REG_GDMA_BASE + 0x1F8)
+/* GDMA_OUT_REMAIN_UNDER_4B_L3_CH2 : RO ;bitpos:[26] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH2    (BIT(26))
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH2_M  (BIT(26))
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH2_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH2_S  26
+/* GDMA_OUT_REMAIN_UNDER_3B_L3_CH2 : RO ;bitpos:[25] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH2    (BIT(25))
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH2_M  (BIT(25))
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH2_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH2_S  25
+/* GDMA_OUT_REMAIN_UNDER_2B_L3_CH2 : RO ;bitpos:[24] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH2    (BIT(24))
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH2_M  (BIT(24))
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH2_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH2_S  24
+/* GDMA_OUT_REMAIN_UNDER_1B_L3_CH2 : RO ;bitpos:[23] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH2    (BIT(23))
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH2_M  (BIT(23))
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH2_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH2_S  23
+/* GDMA_OUTFIFO_CNT_L3_CH2 : RO ;bitpos:[22:18] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L3 Tx FIFO for Tx channel 2..*/
+#define GDMA_OUTFIFO_CNT_L3_CH2    0x0000001F
+#define GDMA_OUTFIFO_CNT_L3_CH2_M  ((GDMA_OUTFIFO_CNT_L3_CH2_V)<<(GDMA_OUTFIFO_CNT_L3_CH2_S))
+#define GDMA_OUTFIFO_CNT_L3_CH2_V  0x1F
+#define GDMA_OUTFIFO_CNT_L3_CH2_S  18
+/* GDMA_OUTFIFO_CNT_L2_CH2 : RO ;bitpos:[17:11] ;default: 7'b0 ; */
+/*description: The register stores the byte number of the data in L2 Tx FIFO for Tx channel 2..*/
+#define GDMA_OUTFIFO_CNT_L2_CH2    0x0000007F
+#define GDMA_OUTFIFO_CNT_L2_CH2_M  ((GDMA_OUTFIFO_CNT_L2_CH2_V)<<(GDMA_OUTFIFO_CNT_L2_CH2_S))
+#define GDMA_OUTFIFO_CNT_L2_CH2_V  0x7F
+#define GDMA_OUTFIFO_CNT_L2_CH2_S  11
+/* GDMA_OUTFIFO_CNT_L1_CH2 : RO ;bitpos:[10:6] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L1 Tx FIFO for Tx channel 2..*/
+#define GDMA_OUTFIFO_CNT_L1_CH2    0x0000001F
+#define GDMA_OUTFIFO_CNT_L1_CH2_M  ((GDMA_OUTFIFO_CNT_L1_CH2_V)<<(GDMA_OUTFIFO_CNT_L1_CH2_S))
+#define GDMA_OUTFIFO_CNT_L1_CH2_V  0x1F
+#define GDMA_OUTFIFO_CNT_L1_CH2_S  6
+/* GDMA_OUTFIFO_EMPTY_L3_CH2 : RO ;bitpos:[5] ;default: 1'b1 ; */
+/*description: L3 Tx FIFO empty signal for Tx channel 2..*/
+#define GDMA_OUTFIFO_EMPTY_L3_CH2    (BIT(5))
+#define GDMA_OUTFIFO_EMPTY_L3_CH2_M  (BIT(5))
+#define GDMA_OUTFIFO_EMPTY_L3_CH2_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L3_CH2_S  5
+/* GDMA_OUTFIFO_FULL_L3_CH2 : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: L3 Tx FIFO full signal for Tx channel 2..*/
+#define GDMA_OUTFIFO_FULL_L3_CH2    (BIT(4))
+#define GDMA_OUTFIFO_FULL_L3_CH2_M  (BIT(4))
+#define GDMA_OUTFIFO_FULL_L3_CH2_V  0x1
+#define GDMA_OUTFIFO_FULL_L3_CH2_S  4
+/* GDMA_OUTFIFO_EMPTY_L2_CH2 : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: L2 Tx FIFO empty signal for Tx channel 2..*/
+#define GDMA_OUTFIFO_EMPTY_L2_CH2    (BIT(3))
+#define GDMA_OUTFIFO_EMPTY_L2_CH2_M  (BIT(3))
+#define GDMA_OUTFIFO_EMPTY_L2_CH2_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L2_CH2_S  3
+/* GDMA_OUTFIFO_FULL_L2_CH2 : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: L2 Tx FIFO full signal for Tx channel 2..*/
+#define GDMA_OUTFIFO_FULL_L2_CH2    (BIT(2))
+#define GDMA_OUTFIFO_FULL_L2_CH2_M  (BIT(2))
+#define GDMA_OUTFIFO_FULL_L2_CH2_V  0x1
+#define GDMA_OUTFIFO_FULL_L2_CH2_S  2
+/* GDMA_OUTFIFO_EMPTY_L1_CH2 : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: L1 Tx FIFO empty signal for Tx channel 2..*/
+#define GDMA_OUTFIFO_EMPTY_L1_CH2    (BIT(1))
+#define GDMA_OUTFIFO_EMPTY_L1_CH2_M  (BIT(1))
+#define GDMA_OUTFIFO_EMPTY_L1_CH2_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L1_CH2_S  1
+/* GDMA_OUTFIFO_FULL_L1_CH2 : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: L1 Tx FIFO full signal for Tx channel 2..*/
+#define GDMA_OUTFIFO_FULL_L1_CH2    (BIT(0))
+#define GDMA_OUTFIFO_FULL_L1_CH2_M  (BIT(0))
+#define GDMA_OUTFIFO_FULL_L1_CH2_V  0x1
+#define GDMA_OUTFIFO_FULL_L1_CH2_S  0
+
+#define GDMA_OUT_PUSH_CH2_REG          (DR_REG_GDMA_BASE + 0x1FC)
+/* GDMA_OUTFIFO_PUSH_CH2 : R/W/SC ;bitpos:[9] ;default: 1'h0 ; */
+/*description: Set this bit to push data into DMA FIFO..*/
+#define GDMA_OUTFIFO_PUSH_CH2    (BIT(9))
+#define GDMA_OUTFIFO_PUSH_CH2_M  (BIT(9))
+#define GDMA_OUTFIFO_PUSH_CH2_V  0x1
+#define GDMA_OUTFIFO_PUSH_CH2_S  9
+/* GDMA_OUTFIFO_WDATA_CH2 : R/W ;bitpos:[8:0] ;default: 9'h0 ; */
+/*description: This register stores the data that need to be pushed into DMA FIFO..*/
+#define GDMA_OUTFIFO_WDATA_CH2    0x000001FF
+#define GDMA_OUTFIFO_WDATA_CH2_M  ((GDMA_OUTFIFO_WDATA_CH2_V)<<(GDMA_OUTFIFO_WDATA_CH2_S))
+#define GDMA_OUTFIFO_WDATA_CH2_V  0x1FF
+#define GDMA_OUTFIFO_WDATA_CH2_S  0
+
+#define GDMA_OUT_LINK_CH2_REG          (DR_REG_GDMA_BASE + 0x200)
+/* GDMA_OUTLINK_PARK_CH2 : RO ;bitpos:[23] ;default: 1'h1 ; */
+/*description: 1: the outlink descriptor's FSM is in idle state.  0: the outlink descriptor's F
+SM is working..*/
+#define GDMA_OUTLINK_PARK_CH2    (BIT(23))
+#define GDMA_OUTLINK_PARK_CH2_M  (BIT(23))
+#define GDMA_OUTLINK_PARK_CH2_V  0x1
+#define GDMA_OUTLINK_PARK_CH2_S  23
+/* GDMA_OUTLINK_RESTART_CH2 : R/W/SC ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Set this bit to restart a new outlink from the last address. .*/
+#define GDMA_OUTLINK_RESTART_CH2    (BIT(22))
+#define GDMA_OUTLINK_RESTART_CH2_M  (BIT(22))
+#define GDMA_OUTLINK_RESTART_CH2_V  0x1
+#define GDMA_OUTLINK_RESTART_CH2_S  22
+/* GDMA_OUTLINK_START_CH2 : R/W/SC ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to start dealing with the outlink descriptors..*/
+#define GDMA_OUTLINK_START_CH2    (BIT(21))
+#define GDMA_OUTLINK_START_CH2_M  (BIT(21))
+#define GDMA_OUTLINK_START_CH2_V  0x1
+#define GDMA_OUTLINK_START_CH2_S  21
+/* GDMA_OUTLINK_STOP_CH2 : R/W/SC ;bitpos:[20] ;default: 1'b0 ; */
+/*description: Set this bit to stop dealing with the outlink descriptors..*/
+#define GDMA_OUTLINK_STOP_CH2    (BIT(20))
+#define GDMA_OUTLINK_STOP_CH2_M  (BIT(20))
+#define GDMA_OUTLINK_STOP_CH2_V  0x1
+#define GDMA_OUTLINK_STOP_CH2_S  20
+/* GDMA_OUTLINK_ADDR_CH2 : R/W ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: This register stores the 20 least significant bits of the first outlink descript
+or's address..*/
+#define GDMA_OUTLINK_ADDR_CH2    0x000FFFFF
+#define GDMA_OUTLINK_ADDR_CH2_M  ((GDMA_OUTLINK_ADDR_CH2_V)<<(GDMA_OUTLINK_ADDR_CH2_S))
+#define GDMA_OUTLINK_ADDR_CH2_V  0xFFFFF
+#define GDMA_OUTLINK_ADDR_CH2_S  0
+
+#define GDMA_OUT_STATE_CH2_REG          (DR_REG_GDMA_BASE + 0x204)
+/* GDMA_OUT_STATE_CH2 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_STATE_CH2    0x00000007
+#define GDMA_OUT_STATE_CH2_M  ((GDMA_OUT_STATE_CH2_V)<<(GDMA_OUT_STATE_CH2_S))
+#define GDMA_OUT_STATE_CH2_V  0x7
+#define GDMA_OUT_STATE_CH2_S  20
+/* GDMA_OUT_DSCR_STATE_CH2 : RO ;bitpos:[19:18] ;default: 2'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_DSCR_STATE_CH2    0x00000003
+#define GDMA_OUT_DSCR_STATE_CH2_M  ((GDMA_OUT_DSCR_STATE_CH2_V)<<(GDMA_OUT_DSCR_STATE_CH2_S))
+#define GDMA_OUT_DSCR_STATE_CH2_V  0x3
+#define GDMA_OUT_DSCR_STATE_CH2_S  18
+/* GDMA_OUTLINK_DSCR_ADDR_CH2 : RO ;bitpos:[17:0] ;default: 18'b0 ; */
+/*description: This register stores the current outlink descriptor's address..*/
+#define GDMA_OUTLINK_DSCR_ADDR_CH2    0x0003FFFF
+#define GDMA_OUTLINK_DSCR_ADDR_CH2_M  ((GDMA_OUTLINK_DSCR_ADDR_CH2_V)<<(GDMA_OUTLINK_DSCR_ADDR_CH2_S))
+#define GDMA_OUTLINK_DSCR_ADDR_CH2_V  0x3FFFF
+#define GDMA_OUTLINK_DSCR_ADDR_CH2_S  0
+
+#define GDMA_OUT_EOF_DES_ADDR_CH2_REG          (DR_REG_GDMA_BASE + 0x208)
+/* GDMA_OUT_EOF_DES_ADDR_CH2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the outlink descriptor when the EOF bit in t
+his descriptor is 1..*/
+#define GDMA_OUT_EOF_DES_ADDR_CH2    0xFFFFFFFF
+#define GDMA_OUT_EOF_DES_ADDR_CH2_M  ((GDMA_OUT_EOF_DES_ADDR_CH2_V)<<(GDMA_OUT_EOF_DES_ADDR_CH2_S))
+#define GDMA_OUT_EOF_DES_ADDR_CH2_V  0xFFFFFFFF
+#define GDMA_OUT_EOF_DES_ADDR_CH2_S  0
+
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH2_REG          (DR_REG_GDMA_BASE + 0x20C)
+/* GDMA_OUT_EOF_BFR_DES_ADDR_CH2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the outlink descriptor before the last outli
+nk descriptor..*/
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH2    0xFFFFFFFF
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH2_M  ((GDMA_OUT_EOF_BFR_DES_ADDR_CH2_V)<<(GDMA_OUT_EOF_BFR_DES_ADDR_CH2_S))
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH2_V  0xFFFFFFFF
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH2_S  0
+
+#define GDMA_OUT_DSCR_CH2_REG          (DR_REG_GDMA_BASE + 0x210)
+/* GDMA_OUTLINK_DSCR_CH2 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the current outlink descriptor y..*/
+#define GDMA_OUTLINK_DSCR_CH2    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_CH2_M  ((GDMA_OUTLINK_DSCR_CH2_V)<<(GDMA_OUTLINK_DSCR_CH2_S))
+#define GDMA_OUTLINK_DSCR_CH2_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_CH2_S  0
+
+#define GDMA_OUT_DSCR_BF0_CH2_REG          (DR_REG_GDMA_BASE + 0x214)
+/* GDMA_OUTLINK_DSCR_BF0_CH2 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the last outlink descriptor y-1..*/
+#define GDMA_OUTLINK_DSCR_BF0_CH2    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF0_CH2_M  ((GDMA_OUTLINK_DSCR_BF0_CH2_V)<<(GDMA_OUTLINK_DSCR_BF0_CH2_S))
+#define GDMA_OUTLINK_DSCR_BF0_CH2_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF0_CH2_S  0
+
+#define GDMA_OUT_DSCR_BF1_CH2_REG          (DR_REG_GDMA_BASE + 0x218)
+/* GDMA_OUTLINK_DSCR_BF1_CH2 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the second-to-last inlink descriptor x-2..*/
+#define GDMA_OUTLINK_DSCR_BF1_CH2    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF1_CH2_M  ((GDMA_OUTLINK_DSCR_BF1_CH2_V)<<(GDMA_OUTLINK_DSCR_BF1_CH2_S))
+#define GDMA_OUTLINK_DSCR_BF1_CH2_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF1_CH2_S  0
+
+#define GDMA_OUT_WIGHT_CH2_REG          (DR_REG_GDMA_BASE + 0x21C)
+/* GDMA_TX_WEIGHT_CH2 : R/W ;bitpos:[11:8] ;default: 4'hf ; */
+/*description: The weight of Tx channel 2. .*/
+#define GDMA_TX_WEIGHT_CH2    0x0000000F
+#define GDMA_TX_WEIGHT_CH2_M  ((GDMA_TX_WEIGHT_CH2_V)<<(GDMA_TX_WEIGHT_CH2_S))
+#define GDMA_TX_WEIGHT_CH2_V  0xF
+#define GDMA_TX_WEIGHT_CH2_S  8
+
+#define GDMA_OUT_PRI_CH2_REG          (DR_REG_GDMA_BASE + 0x224)
+/* GDMA_TX_PRI_CH2 : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: The priority of Tx channel 2. The larger of the value, the higher of the priorit
+y..*/
+#define GDMA_TX_PRI_CH2    0x0000000F
+#define GDMA_TX_PRI_CH2_M  ((GDMA_TX_PRI_CH2_V)<<(GDMA_TX_PRI_CH2_S))
+#define GDMA_TX_PRI_CH2_V  0xF
+#define GDMA_TX_PRI_CH2_S  0
+
+#define GDMA_OUT_PERI_SEL_CH2_REG          (DR_REG_GDMA_BASE + 0x228)
+/* GDMA_PERI_OUT_SEL_CH2 : R/W ;bitpos:[5:0] ;default: 6'h3f ; */
+/*description: This register is used to select peripheral for Tx channel 2. 0:SPI2. 1: SPI3. 2:
+ UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.; 7: AE
+S. 8: SHA. 9: ADC_DAC..*/
+#define GDMA_PERI_OUT_SEL_CH2    0x0000003F
+#define GDMA_PERI_OUT_SEL_CH2_M  ((GDMA_PERI_OUT_SEL_CH2_V)<<(GDMA_PERI_OUT_SEL_CH2_S))
+#define GDMA_PERI_OUT_SEL_CH2_V  0x3F
+#define GDMA_PERI_OUT_SEL_CH2_S  0
+
+#define GDMA_IN_CONF0_CH3_REG          (DR_REG_GDMA_BASE + 0x240)
+/* GDMA_MEM_TRANS_EN_CH3 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit 1 to enable automatic transmitting data from memory to memory via D
+MA..*/
+#define GDMA_MEM_TRANS_EN_CH3    (BIT(4))
+#define GDMA_MEM_TRANS_EN_CH3_M  (BIT(4))
+#define GDMA_MEM_TRANS_EN_CH3_V  0x1
+#define GDMA_MEM_TRANS_EN_CH3_S  4
+/* GDMA_IN_DATA_BURST_EN_CH3 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Rx channel 2 receiving data
+when accessing internal SRAM. .*/
+#define GDMA_IN_DATA_BURST_EN_CH3    (BIT(3))
+#define GDMA_IN_DATA_BURST_EN_CH3_M  (BIT(3))
+#define GDMA_IN_DATA_BURST_EN_CH3_V  0x1
+#define GDMA_IN_DATA_BURST_EN_CH3_S  3
+/* GDMA_INDSCR_BURST_EN_CH3 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Rx channel 2 reading link de
+scriptor when accessing internal SRAM. .*/
+#define GDMA_INDSCR_BURST_EN_CH3    (BIT(2))
+#define GDMA_INDSCR_BURST_EN_CH3_M  (BIT(2))
+#define GDMA_INDSCR_BURST_EN_CH3_V  0x1
+#define GDMA_INDSCR_BURST_EN_CH3_S  2
+/* GDMA_IN_LOOP_TEST_CH3 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_LOOP_TEST_CH3    (BIT(1))
+#define GDMA_IN_LOOP_TEST_CH3_M  (BIT(1))
+#define GDMA_IN_LOOP_TEST_CH3_V  0x1
+#define GDMA_IN_LOOP_TEST_CH3_S  1
+/* GDMA_IN_RST_CH3 : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: This bit is used to reset DMA channel 3 Rx FSM and Rx FIFO pointer..*/
+#define GDMA_IN_RST_CH3    (BIT(0))
+#define GDMA_IN_RST_CH3_M  (BIT(0))
+#define GDMA_IN_RST_CH3_V  0x1
+#define GDMA_IN_RST_CH3_S  0
+
+#define GDMA_IN_CONF1_CH3_REG          (DR_REG_GDMA_BASE + 0x244)
+/* GDMA_IN_EXT_MEM_BK_SIZE_CH3 : R/W ;bitpos:[14:13] ;default: 2'b0 ; */
+/*description: Block size of Rx channel 3 when DMA access external SRAM. 0: 16 bytes      1: 32
+ bytes    2/3:reserved.*/
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH3    0x00000003
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH3_M  ((GDMA_IN_EXT_MEM_BK_SIZE_CH3_V)<<(GDMA_IN_EXT_MEM_BK_SIZE_CH3_S))
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH3_V  0x3
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH3_S  13
+/* GDMA_IN_CHECK_OWNER_CH3 : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to enable checking the owner attribute of the link descriptor..*/
+#define GDMA_IN_CHECK_OWNER_CH3    (BIT(12))
+#define GDMA_IN_CHECK_OWNER_CH3_M  (BIT(12))
+#define GDMA_IN_CHECK_OWNER_CH3_V  0x1
+#define GDMA_IN_CHECK_OWNER_CH3_S  12
+/* GDMA_DMA_INFIFO_FULL_THRS_CH3 : R/W ;bitpos:[11:0] ;default: 12'hc ; */
+/*description: This register is used to generate the INFIFO_FULL_WM_INT interrupt when Rx chann
+el 3 received byte number in Rx FIFO is up to the value of the register..*/
+#define GDMA_DMA_INFIFO_FULL_THRS_CH3    0x00000FFF
+#define GDMA_DMA_INFIFO_FULL_THRS_CH3_M  ((GDMA_DMA_INFIFO_FULL_THRS_CH3_V)<<(GDMA_DMA_INFIFO_FULL_THRS_CH3_S))
+#define GDMA_DMA_INFIFO_FULL_THRS_CH3_V  0xFFF
+#define GDMA_DMA_INFIFO_FULL_THRS_CH3_S  0
+
+#define GDMA_IN_INT_RAW_CH3_REG          (DR_REG_GDMA_BASE + 0x248)
+/* GDMA_INFIFO_UDF_L3_CH3_INT_RAW : R/WTC/SS ;bitpos:[9] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Rx channel 3 is
+underflow. .*/
+#define GDMA_INFIFO_UDF_L3_CH3_INT_RAW    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH3_INT_RAW_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH3_INT_RAW_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH3_INT_RAW_S  9
+/* GDMA_INFIFO_OVF_L3_CH3_INT_RAW : R/WTC/SS ;bitpos:[8] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Rx channel 3 is
+overflow. .*/
+#define GDMA_INFIFO_OVF_L3_CH3_INT_RAW    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH3_INT_RAW_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH3_INT_RAW_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH3_INT_RAW_S  8
+/* GDMA_INFIFO_UDF_L1_CH3_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Rx channel 3 is
+underflow. .*/
+#define GDMA_INFIFO_UDF_L1_CH3_INT_RAW    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH3_INT_RAW_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH3_INT_RAW_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH3_INT_RAW_S  7
+/* GDMA_INFIFO_OVF_L1_CH3_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Rx channel 3 is
+overflow. .*/
+#define GDMA_INFIFO_OVF_L1_CH3_INT_RAW    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH3_INT_RAW_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH3_INT_RAW_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH3_INT_RAW_S  6
+/* GDMA_INFIFO_FULL_WM_CH3_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when received data byte number is up t
+o threshold configured by REG_DMA_INFIFO_FULL_THRS_CH0 in Rx FIFO of channel 3..*/
+#define GDMA_INFIFO_FULL_WM_CH3_INT_RAW    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH3_INT_RAW_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH3_INT_RAW_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH3_INT_RAW_S  5
+/* GDMA_IN_DSCR_EMPTY_CH3_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when Rx buffer pointed by inlink is fu
+ll and receiving data is not completed, but there is no more inlink for Rx chann
+el 3..*/
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_RAW    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_RAW_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_RAW_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_RAW_S  4
+/* GDMA_IN_DSCR_ERR_CH3_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when detecting inlink descriptor error
+, including owner error, the second and third word error of inlink descriptor fo
+r Rx channel 3..*/
+#define GDMA_IN_DSCR_ERR_CH3_INT_RAW    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH3_INT_RAW_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH3_INT_RAW_V  0x1
+#define GDMA_IN_DSCR_ERR_CH3_INT_RAW_S  3
+/* GDMA_IN_ERR_EOF_CH3_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when data error is detected only in th
+e case that the peripheral is UHCI0 for Rx channel 3. For other peripherals, thi
+s raw interrupt is reserved..*/
+#define GDMA_IN_ERR_EOF_CH3_INT_RAW    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH3_INT_RAW_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH3_INT_RAW_V  0x1
+#define GDMA_IN_ERR_EOF_CH3_INT_RAW_S  2
+/* GDMA_IN_SUC_EOF_CH3_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one inli
+nk descriptor has been received for Rx channel 3. For UHCI0, the raw interrupt b
+it turns to high level when the last data pointed by one inlink descriptor has b
+een received and no data error is detected for Rx channel 0..*/
+#define GDMA_IN_SUC_EOF_CH3_INT_RAW    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH3_INT_RAW_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH3_INT_RAW_V  0x1
+#define GDMA_IN_SUC_EOF_CH3_INT_RAW_S  1
+/* GDMA_IN_DONE_CH3_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one inli
+nk descriptor has been received for Rx channel 3..*/
+#define GDMA_IN_DONE_CH3_INT_RAW    (BIT(0))
+#define GDMA_IN_DONE_CH3_INT_RAW_M  (BIT(0))
+#define GDMA_IN_DONE_CH3_INT_RAW_V  0x1
+#define GDMA_IN_DONE_CH3_INT_RAW_S  0
+
+#define GDMA_IN_INT_ST_CH3_REG          (DR_REG_GDMA_BASE + 0x24C)
+/* GDMA_INFIFO_UDF_L3_CH3_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH3_INT_ST    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH3_INT_ST_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH3_INT_ST_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH3_INT_ST_S  9
+/* GDMA_INFIFO_OVF_L3_CH3_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH3_INT_ST    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH3_INT_ST_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH3_INT_ST_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH3_INT_ST_S  8
+/* GDMA_INFIFO_UDF_L1_CH3_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH3_INT_ST    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH3_INT_ST_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH3_INT_ST_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH3_INT_ST_S  7
+/* GDMA_INFIFO_OVF_L1_CH3_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH3_INT_ST    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH3_INT_ST_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH3_INT_ST_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH3_INT_ST_S  6
+/* GDMA_INFIFO_FULL_WM_CH3_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_INFIFO_FULL_WM_CH3_INT_ST    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH3_INT_ST_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH3_INT_ST_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH3_INT_ST_S  5
+/* GDMA_IN_DSCR_EMPTY_CH3_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_ST    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_ST_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_ST_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_ST_S  4
+/* GDMA_IN_DSCR_ERR_CH3_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH3_INT_ST    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH3_INT_ST_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH3_INT_ST_V  0x1
+#define GDMA_IN_DSCR_ERR_CH3_INT_ST_S  3
+/* GDMA_IN_ERR_EOF_CH3_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH3_INT_ST    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH3_INT_ST_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH3_INT_ST_V  0x1
+#define GDMA_IN_ERR_EOF_CH3_INT_ST_S  2
+/* GDMA_IN_SUC_EOF_CH3_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH3_INT_ST    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH3_INT_ST_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH3_INT_ST_V  0x1
+#define GDMA_IN_SUC_EOF_CH3_INT_ST_S  1
+/* GDMA_IN_DONE_CH3_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH3_INT_ST    (BIT(0))
+#define GDMA_IN_DONE_CH3_INT_ST_M  (BIT(0))
+#define GDMA_IN_DONE_CH3_INT_ST_V  0x1
+#define GDMA_IN_DONE_CH3_INT_ST_S  0
+
+#define GDMA_IN_INT_ENA_CH3_REG          (DR_REG_GDMA_BASE + 0x250)
+/* GDMA_INFIFO_UDF_L3_CH3_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH3_INT_ENA    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH3_INT_ENA_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH3_INT_ENA_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH3_INT_ENA_S  9
+/* GDMA_INFIFO_OVF_L3_CH3_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH3_INT_ENA    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH3_INT_ENA_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH3_INT_ENA_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH3_INT_ENA_S  8
+/* GDMA_INFIFO_UDF_L1_CH3_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH3_INT_ENA    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH3_INT_ENA_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH3_INT_ENA_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH3_INT_ENA_S  7
+/* GDMA_INFIFO_OVF_L1_CH3_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH3_INT_ENA    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH3_INT_ENA_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH3_INT_ENA_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH3_INT_ENA_S  6
+/* GDMA_INFIFO_FULL_WM_CH3_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_INFIFO_FULL_WM_CH3_INT_ENA    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH3_INT_ENA_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH3_INT_ENA_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH3_INT_ENA_S  5
+/* GDMA_IN_DSCR_EMPTY_CH3_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_ENA    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_ENA_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_ENA_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_ENA_S  4
+/* GDMA_IN_DSCR_ERR_CH3_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH3_INT_ENA    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH3_INT_ENA_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH3_INT_ENA_V  0x1
+#define GDMA_IN_DSCR_ERR_CH3_INT_ENA_S  3
+/* GDMA_IN_ERR_EOF_CH3_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH3_INT_ENA    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH3_INT_ENA_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH3_INT_ENA_V  0x1
+#define GDMA_IN_ERR_EOF_CH3_INT_ENA_S  2
+/* GDMA_IN_SUC_EOF_CH3_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH3_INT_ENA    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH3_INT_ENA_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH3_INT_ENA_V  0x1
+#define GDMA_IN_SUC_EOF_CH3_INT_ENA_S  1
+/* GDMA_IN_DONE_CH3_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH3_INT_ENA    (BIT(0))
+#define GDMA_IN_DONE_CH3_INT_ENA_M  (BIT(0))
+#define GDMA_IN_DONE_CH3_INT_ENA_V  0x1
+#define GDMA_IN_DONE_CH3_INT_ENA_S  0
+
+#define GDMA_IN_INT_CLR_CH3_REG          (DR_REG_GDMA_BASE + 0x254)
+/* GDMA_INFIFO_UDF_L3_CH3_INT_CLR : WT ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH3_INT_CLR    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH3_INT_CLR_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH3_INT_CLR_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH3_INT_CLR_S  9
+/* GDMA_INFIFO_OVF_L3_CH3_INT_CLR : WT ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH3_INT_CLR    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH3_INT_CLR_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH3_INT_CLR_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH3_INT_CLR_S  8
+/* GDMA_INFIFO_UDF_L1_CH3_INT_CLR : WT ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH3_INT_CLR    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH3_INT_CLR_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH3_INT_CLR_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH3_INT_CLR_S  7
+/* GDMA_INFIFO_OVF_L1_CH3_INT_CLR : WT ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH3_INT_CLR    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH3_INT_CLR_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH3_INT_CLR_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH3_INT_CLR_S  6
+/* GDMA_DMA_INFIFO_FULL_WM_CH3_INT_CLR : WT ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_DMA_INFIFO_FULL_WM_CH3_INT_CLR    (BIT(5))
+#define GDMA_DMA_INFIFO_FULL_WM_CH3_INT_CLR_M  (BIT(5))
+#define GDMA_DMA_INFIFO_FULL_WM_CH3_INT_CLR_V  0x1
+#define GDMA_DMA_INFIFO_FULL_WM_CH3_INT_CLR_S  5
+/* GDMA_IN_DSCR_EMPTY_CH3_INT_CLR : WT ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_CLR    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_CLR_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_CLR_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH3_INT_CLR_S  4
+/* GDMA_IN_DSCR_ERR_CH3_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH3_INT_CLR    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH3_INT_CLR_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH3_INT_CLR_V  0x1
+#define GDMA_IN_DSCR_ERR_CH3_INT_CLR_S  3
+/* GDMA_IN_ERR_EOF_CH3_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH3_INT_CLR    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH3_INT_CLR_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH3_INT_CLR_V  0x1
+#define GDMA_IN_ERR_EOF_CH3_INT_CLR_S  2
+/* GDMA_IN_SUC_EOF_CH3_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH3_INT_CLR    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH3_INT_CLR_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH3_INT_CLR_V  0x1
+#define GDMA_IN_SUC_EOF_CH3_INT_CLR_S  1
+/* GDMA_IN_DONE_CH3_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH3_INT_CLR    (BIT(0))
+#define GDMA_IN_DONE_CH3_INT_CLR_M  (BIT(0))
+#define GDMA_IN_DONE_CH3_INT_CLR_V  0x1
+#define GDMA_IN_DONE_CH3_INT_CLR_S  0
+
+#define GDMA_INFIFO_STATUS_CH3_REG          (DR_REG_GDMA_BASE + 0x258)
+/* GDMA_IN_BUF_HUNGRY_CH3 : RO ;bitpos:[28] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_BUF_HUNGRY_CH3    (BIT(28))
+#define GDMA_IN_BUF_HUNGRY_CH3_M  (BIT(28))
+#define GDMA_IN_BUF_HUNGRY_CH3_V  0x1
+#define GDMA_IN_BUF_HUNGRY_CH3_S  28
+/* GDMA_IN_REMAIN_UNDER_4B_L3_CH3 : RO ;bitpos:[27] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH3    (BIT(27))
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH3_M  (BIT(27))
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH3_V  0x1
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH3_S  27
+/* GDMA_IN_REMAIN_UNDER_3B_L3_CH3 : RO ;bitpos:[26] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH3    (BIT(26))
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH3_M  (BIT(26))
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH3_V  0x1
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH3_S  26
+/* GDMA_IN_REMAIN_UNDER_2B_L3_CH3 : RO ;bitpos:[25] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH3    (BIT(25))
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH3_M  (BIT(25))
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH3_V  0x1
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH3_S  25
+/* GDMA_IN_REMAIN_UNDER_1B_L3_CH3 : RO ;bitpos:[24] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH3    (BIT(24))
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH3_M  (BIT(24))
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH3_V  0x1
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH3_S  24
+/* GDMA_INFIFO_CNT_L3_CH3 : RO ;bitpos:[23:19] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L3 Rx FIFO for Rx channel 3..*/
+#define GDMA_INFIFO_CNT_L3_CH3    0x0000001F
+#define GDMA_INFIFO_CNT_L3_CH3_M  ((GDMA_INFIFO_CNT_L3_CH3_V)<<(GDMA_INFIFO_CNT_L3_CH3_S))
+#define GDMA_INFIFO_CNT_L3_CH3_V  0x1F
+#define GDMA_INFIFO_CNT_L3_CH3_S  19
+/* GDMA_INFIFO_CNT_L2_CH3 : RO ;bitpos:[18:12] ;default: 7'b0 ; */
+/*description: The register stores the byte number of the data in L2 Rx FIFO for Rx channel 3..*/
+#define GDMA_INFIFO_CNT_L2_CH3    0x0000007F
+#define GDMA_INFIFO_CNT_L2_CH3_M  ((GDMA_INFIFO_CNT_L2_CH3_V)<<(GDMA_INFIFO_CNT_L2_CH3_S))
+#define GDMA_INFIFO_CNT_L2_CH3_V  0x7F
+#define GDMA_INFIFO_CNT_L2_CH3_S  12
+/* GDMA_INFIFO_CNT_L1_CH3 : RO ;bitpos:[11:6] ;default: 6'b0 ; */
+/*description: The register stores the byte number of the data in L1 Rx FIFO for Rx channel 3..*/
+#define GDMA_INFIFO_CNT_L1_CH3    0x0000003F
+#define GDMA_INFIFO_CNT_L1_CH3_M  ((GDMA_INFIFO_CNT_L1_CH3_V)<<(GDMA_INFIFO_CNT_L1_CH3_S))
+#define GDMA_INFIFO_CNT_L1_CH3_V  0x3F
+#define GDMA_INFIFO_CNT_L1_CH3_S  6
+/* GDMA_INFIFO_EMPTY_L3_CH3 : RO ;bitpos:[5] ;default: 1'b1 ; */
+/*description: L3 Rx FIFO empty signal for Rx channel 3..*/
+#define GDMA_INFIFO_EMPTY_L3_CH3    (BIT(5))
+#define GDMA_INFIFO_EMPTY_L3_CH3_M  (BIT(5))
+#define GDMA_INFIFO_EMPTY_L3_CH3_V  0x1
+#define GDMA_INFIFO_EMPTY_L3_CH3_S  5
+/* GDMA_INFIFO_FULL_L3_CH3 : RO ;bitpos:[4] ;default: 1'b1 ; */
+/*description: L3 Rx FIFO full signal for Rx channel 3..*/
+#define GDMA_INFIFO_FULL_L3_CH3    (BIT(4))
+#define GDMA_INFIFO_FULL_L3_CH3_M  (BIT(4))
+#define GDMA_INFIFO_FULL_L3_CH3_V  0x1
+#define GDMA_INFIFO_FULL_L3_CH3_S  4
+/* GDMA_INFIFO_EMPTY_L2_CH3 : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: L2 Rx FIFO empty signal for Rx channel 3..*/
+#define GDMA_INFIFO_EMPTY_L2_CH3    (BIT(3))
+#define GDMA_INFIFO_EMPTY_L2_CH3_M  (BIT(3))
+#define GDMA_INFIFO_EMPTY_L2_CH3_V  0x1
+#define GDMA_INFIFO_EMPTY_L2_CH3_S  3
+/* GDMA_INFIFO_FULL_L2_CH3 : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: L2 Rx FIFO full signal for Rx channel 3..*/
+#define GDMA_INFIFO_FULL_L2_CH3    (BIT(2))
+#define GDMA_INFIFO_FULL_L2_CH3_M  (BIT(2))
+#define GDMA_INFIFO_FULL_L2_CH3_V  0x1
+#define GDMA_INFIFO_FULL_L2_CH3_S  2
+/* GDMA_INFIFO_EMPTY_L1_CH3 : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: L1 Rx FIFO empty signal for Rx channel 3..*/
+#define GDMA_INFIFO_EMPTY_L1_CH3    (BIT(1))
+#define GDMA_INFIFO_EMPTY_L1_CH3_M  (BIT(1))
+#define GDMA_INFIFO_EMPTY_L1_CH3_V  0x1
+#define GDMA_INFIFO_EMPTY_L1_CH3_S  1
+/* GDMA_INFIFO_FULL_L1_CH3 : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: L1 Rx FIFO full signal for Rx channel 3..*/
+#define GDMA_INFIFO_FULL_L1_CH3    (BIT(0))
+#define GDMA_INFIFO_FULL_L1_CH3_M  (BIT(0))
+#define GDMA_INFIFO_FULL_L1_CH3_V  0x1
+#define GDMA_INFIFO_FULL_L1_CH3_S  0
+
+#define GDMA_IN_POP_CH3_REG          (DR_REG_GDMA_BASE + 0x25C)
+/* GDMA_INFIFO_POP_CH3 : R/W/SC ;bitpos:[12] ;default: 1'h0 ; */
+/*description: Set this bit to pop data from DMA FIFO..*/
+#define GDMA_INFIFO_POP_CH3    (BIT(12))
+#define GDMA_INFIFO_POP_CH3_M  (BIT(12))
+#define GDMA_INFIFO_POP_CH3_V  0x1
+#define GDMA_INFIFO_POP_CH3_S  12
+/* GDMA_INFIFO_RDATA_CH3 : RO ;bitpos:[11:0] ;default: 12'h800 ; */
+/*description: This register stores the data popping from DMA FIFO..*/
+#define GDMA_INFIFO_RDATA_CH3    0x00000FFF
+#define GDMA_INFIFO_RDATA_CH3_M  ((GDMA_INFIFO_RDATA_CH3_V)<<(GDMA_INFIFO_RDATA_CH3_S))
+#define GDMA_INFIFO_RDATA_CH3_V  0xFFF
+#define GDMA_INFIFO_RDATA_CH3_S  0
+
+#define GDMA_IN_LINK_CH3_REG          (DR_REG_GDMA_BASE + 0x260)
+/* GDMA_INLINK_PARK_CH3 : RO ;bitpos:[24] ;default: 1'h1 ; */
+/*description: 1: the inlink descriptor's FSM is in idle state.  0: the inlink descriptor's FSM
+ is working..*/
+#define GDMA_INLINK_PARK_CH3    (BIT(24))
+#define GDMA_INLINK_PARK_CH3_M  (BIT(24))
+#define GDMA_INLINK_PARK_CH3_V  0x1
+#define GDMA_INLINK_PARK_CH3_S  24
+/* GDMA_INLINK_RESTART_CH3 : R/W/SC ;bitpos:[23] ;default: 1'b0 ; */
+/*description: Set this bit to mount a new inlink descriptor..*/
+#define GDMA_INLINK_RESTART_CH3    (BIT(23))
+#define GDMA_INLINK_RESTART_CH3_M  (BIT(23))
+#define GDMA_INLINK_RESTART_CH3_V  0x1
+#define GDMA_INLINK_RESTART_CH3_S  23
+/* GDMA_INLINK_START_CH3 : R/W/SC ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Set this bit to start dealing with the inlink descriptors..*/
+#define GDMA_INLINK_START_CH3    (BIT(22))
+#define GDMA_INLINK_START_CH3_M  (BIT(22))
+#define GDMA_INLINK_START_CH3_V  0x1
+#define GDMA_INLINK_START_CH3_S  22
+/* GDMA_INLINK_STOP_CH3 : R/W/SC ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to stop dealing with the inlink descriptors..*/
+#define GDMA_INLINK_STOP_CH3    (BIT(21))
+#define GDMA_INLINK_STOP_CH3_M  (BIT(21))
+#define GDMA_INLINK_STOP_CH3_V  0x1
+#define GDMA_INLINK_STOP_CH3_S  21
+/* GDMA_INLINK_AUTO_RET_CH3 : R/W ;bitpos:[20] ;default: 1'b1 ; */
+/*description: Set this bit to return to current inlink descriptor's address, when there are so
+me errors in current receiving data..*/
+#define GDMA_INLINK_AUTO_RET_CH3    (BIT(20))
+#define GDMA_INLINK_AUTO_RET_CH3_M  (BIT(20))
+#define GDMA_INLINK_AUTO_RET_CH3_V  0x1
+#define GDMA_INLINK_AUTO_RET_CH3_S  20
+/* GDMA_INLINK_ADDR_CH3 : R/W ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: This register stores the 20 least significant bits of the first inlink descripto
+r's address..*/
+#define GDMA_INLINK_ADDR_CH3    0x000FFFFF
+#define GDMA_INLINK_ADDR_CH3_M  ((GDMA_INLINK_ADDR_CH3_V)<<(GDMA_INLINK_ADDR_CH3_S))
+#define GDMA_INLINK_ADDR_CH3_V  0xFFFFF
+#define GDMA_INLINK_ADDR_CH3_S  0
+
+#define GDMA_IN_STATE_CH3_REG          (DR_REG_GDMA_BASE + 0x264)
+/* GDMA_IN_STATE_CH3 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_STATE_CH3    0x00000007
+#define GDMA_IN_STATE_CH3_M  ((GDMA_IN_STATE_CH3_V)<<(GDMA_IN_STATE_CH3_S))
+#define GDMA_IN_STATE_CH3_V  0x7
+#define GDMA_IN_STATE_CH3_S  20
+/* GDMA_IN_DSCR_STATE_CH3 : RO ;bitpos:[19:18] ;default: 2'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_DSCR_STATE_CH3    0x00000003
+#define GDMA_IN_DSCR_STATE_CH3_M  ((GDMA_IN_DSCR_STATE_CH3_V)<<(GDMA_IN_DSCR_STATE_CH3_S))
+#define GDMA_IN_DSCR_STATE_CH3_V  0x3
+#define GDMA_IN_DSCR_STATE_CH3_S  18
+/* GDMA_INLINK_DSCR_ADDR_CH3 : RO ;bitpos:[17:0] ;default: 18'b0 ; */
+/*description: This register stores the current inlink descriptor's address..*/
+#define GDMA_INLINK_DSCR_ADDR_CH3    0x0003FFFF
+#define GDMA_INLINK_DSCR_ADDR_CH3_M  ((GDMA_INLINK_DSCR_ADDR_CH3_V)<<(GDMA_INLINK_DSCR_ADDR_CH3_S))
+#define GDMA_INLINK_DSCR_ADDR_CH3_V  0x3FFFF
+#define GDMA_INLINK_DSCR_ADDR_CH3_S  0
+
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH3_REG          (DR_REG_GDMA_BASE + 0x268)
+/* GDMA_IN_SUC_EOF_DES_ADDR_CH3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the inlink descriptor when the EOF bit in th
+is descriptor is 1..*/
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH3    0xFFFFFFFF
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH3_M  ((GDMA_IN_SUC_EOF_DES_ADDR_CH3_V)<<(GDMA_IN_SUC_EOF_DES_ADDR_CH3_S))
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH3_V  0xFFFFFFFF
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH3_S  0
+
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH3_REG          (DR_REG_GDMA_BASE + 0x26C)
+/* GDMA_IN_ERR_EOF_DES_ADDR_CH3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the inlink descriptor when there are some er
+rors in current receiving data. Only used when peripheral is UHCI0..*/
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH3    0xFFFFFFFF
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH3_M  ((GDMA_IN_ERR_EOF_DES_ADDR_CH3_V)<<(GDMA_IN_ERR_EOF_DES_ADDR_CH3_S))
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH3_V  0xFFFFFFFF
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH3_S  0
+
+#define GDMA_IN_DSCR_CH3_REG          (DR_REG_GDMA_BASE + 0x270)
+/* GDMA_INLINK_DSCR_CH3 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the current inlink descriptor x..*/
+#define GDMA_INLINK_DSCR_CH3    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_CH3_M  ((GDMA_INLINK_DSCR_CH3_V)<<(GDMA_INLINK_DSCR_CH3_S))
+#define GDMA_INLINK_DSCR_CH3_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_CH3_S  0
+
+#define GDMA_IN_DSCR_BF0_CH3_REG          (DR_REG_GDMA_BASE + 0x274)
+/* GDMA_INLINK_DSCR_BF0_CH3 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the last inlink descriptor x-1..*/
+#define GDMA_INLINK_DSCR_BF0_CH3    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF0_CH3_M  ((GDMA_INLINK_DSCR_BF0_CH3_V)<<(GDMA_INLINK_DSCR_BF0_CH3_S))
+#define GDMA_INLINK_DSCR_BF0_CH3_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF0_CH3_S  0
+
+#define GDMA_IN_DSCR_BF1_CH3_REG          (DR_REG_GDMA_BASE + 0x278)
+/* GDMA_INLINK_DSCR_BF1_CH3 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the second-to-last inlink descriptor x-2..*/
+#define GDMA_INLINK_DSCR_BF1_CH3    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF1_CH3_M  ((GDMA_INLINK_DSCR_BF1_CH3_V)<<(GDMA_INLINK_DSCR_BF1_CH3_S))
+#define GDMA_INLINK_DSCR_BF1_CH3_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF1_CH3_S  0
+
+#define GDMA_IN_WIGHT_CH3_REG          (DR_REG_GDMA_BASE + 0x27C)
+/* GDMA_RX_WEIGHT_CH3 : R/W ;bitpos:[11:8] ;default: 4'hf ; */
+/*description: The weight of Rx channel 3. .*/
+#define GDMA_RX_WEIGHT_CH3    0x0000000F
+#define GDMA_RX_WEIGHT_CH3_M  ((GDMA_RX_WEIGHT_CH3_V)<<(GDMA_RX_WEIGHT_CH3_S))
+#define GDMA_RX_WEIGHT_CH3_V  0xF
+#define GDMA_RX_WEIGHT_CH3_S  8
+
+#define GDMA_IN_PRI_CH3_REG          (DR_REG_GDMA_BASE + 0x284)
+/* GDMA_RX_PRI_CH3 : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: The priority of Rx channel 3. The larger of the value, the higher of the priorit
+y..*/
+#define GDMA_RX_PRI_CH3    0x0000000F
+#define GDMA_RX_PRI_CH3_M  ((GDMA_RX_PRI_CH3_V)<<(GDMA_RX_PRI_CH3_S))
+#define GDMA_RX_PRI_CH3_V  0xF
+#define GDMA_RX_PRI_CH3_S  0
+
+#define GDMA_IN_PERI_SEL_CH3_REG          (DR_REG_GDMA_BASE + 0x288)
+/* GDMA_PERI_IN_SEL_CH3 : R/W ;bitpos:[5:0] ;default: 6'h3f ; */
+/*description: This register is used to select peripheral for Rx channel 3. 0:SPI2. 1: SPI3. 2:
+ UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT..*/
+#define GDMA_PERI_IN_SEL_CH3    0x0000003F
+#define GDMA_PERI_IN_SEL_CH3_M  ((GDMA_PERI_IN_SEL_CH3_V)<<(GDMA_PERI_IN_SEL_CH3_S))
+#define GDMA_PERI_IN_SEL_CH3_V  0x3F
+#define GDMA_PERI_IN_SEL_CH3_S  0
+
+#define GDMA_OUT_CONF0_CH3_REG          (DR_REG_GDMA_BASE + 0x2A0)
+/* GDMA_OUT_DATA_BURST_EN_CH3 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Tx channel 3 transmitting da
+ta when accessing internal SRAM. .*/
+#define GDMA_OUT_DATA_BURST_EN_CH3    (BIT(5))
+#define GDMA_OUT_DATA_BURST_EN_CH3_M  (BIT(5))
+#define GDMA_OUT_DATA_BURST_EN_CH3_V  0x1
+#define GDMA_OUT_DATA_BURST_EN_CH3_S  5
+/* GDMA_OUTDSCR_BURST_EN_CH3 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Tx channel 3 reading link de
+scriptor when accessing internal SRAM. .*/
+#define GDMA_OUTDSCR_BURST_EN_CH3    (BIT(4))
+#define GDMA_OUTDSCR_BURST_EN_CH3_M  (BIT(4))
+#define GDMA_OUTDSCR_BURST_EN_CH3_V  0x1
+#define GDMA_OUTDSCR_BURST_EN_CH3_S  4
+/* GDMA_OUT_EOF_MODE_CH3 : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: EOF flag generation mode when transmitting data. 1: EOF flag for Tx channel 3 is
+ generated when data need to transmit has been popped from FIFO in DMA.*/
+#define GDMA_OUT_EOF_MODE_CH3    (BIT(3))
+#define GDMA_OUT_EOF_MODE_CH3_M  (BIT(3))
+#define GDMA_OUT_EOF_MODE_CH3_V  0x1
+#define GDMA_OUT_EOF_MODE_CH3_S  3
+/* GDMA_OUT_AUTO_WRBACK_CH3 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to enable automatic outlink-writeback when all the data in tx buffe
+r has been transmitted..*/
+#define GDMA_OUT_AUTO_WRBACK_CH3    (BIT(2))
+#define GDMA_OUT_AUTO_WRBACK_CH3_M  (BIT(2))
+#define GDMA_OUT_AUTO_WRBACK_CH3_V  0x1
+#define GDMA_OUT_AUTO_WRBACK_CH3_S  2
+/* GDMA_OUT_LOOP_TEST_CH3 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_LOOP_TEST_CH3    (BIT(1))
+#define GDMA_OUT_LOOP_TEST_CH3_M  (BIT(1))
+#define GDMA_OUT_LOOP_TEST_CH3_V  0x1
+#define GDMA_OUT_LOOP_TEST_CH3_S  1
+/* GDMA_OUT_RST_CH3 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to reset DMA channel 3 Tx FSM and Tx FIFO pointer..*/
+#define GDMA_OUT_RST_CH3    (BIT(0))
+#define GDMA_OUT_RST_CH3_M  (BIT(0))
+#define GDMA_OUT_RST_CH3_V  0x1
+#define GDMA_OUT_RST_CH3_S  0
+
+#define GDMA_OUT_CONF1_CH3_REG          (DR_REG_GDMA_BASE + 0x2A4)
+/* GDMA_OUT_EXT_MEM_BK_SIZE_CH3 : R/W ;bitpos:[14:13] ;default: 2'b0 ; */
+/*description: Block size of Tx channel 3 when DMA access external SRAM. 0: 16 bytes      1: 32
+ bytes    2/3:reserved.*/
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH3    0x00000003
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH3_M  ((GDMA_OUT_EXT_MEM_BK_SIZE_CH3_V)<<(GDMA_OUT_EXT_MEM_BK_SIZE_CH3_S))
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH3_V  0x3
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH3_S  13
+/* GDMA_OUT_CHECK_OWNER_CH3 : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to enable checking the owner attribute of the link descriptor..*/
+#define GDMA_OUT_CHECK_OWNER_CH3    (BIT(12))
+#define GDMA_OUT_CHECK_OWNER_CH3_M  (BIT(12))
+#define GDMA_OUT_CHECK_OWNER_CH3_V  0x1
+#define GDMA_OUT_CHECK_OWNER_CH3_S  12
+
+#define GDMA_OUT_INT_RAW_CH3_REG          (DR_REG_GDMA_BASE + 0x2A8)
+/* GDMA_OUTFIFO_UDF_L3_CH3_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Tx channel 3 is
+underflow. .*/
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_RAW    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_RAW_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_RAW_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH3_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Tx channel 3 is
+overflow. .*/
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_RAW    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_RAW_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_RAW_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH3_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Tx channel 3 is
+underflow. .*/
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_RAW    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_RAW_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_RAW_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH3_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Tx channel 3 is
+overflow. .*/
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_RAW    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_RAW_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_RAW_S  4
+/* GDMA_OUT_TOTAL_EOF_CH3_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when data corresponding a outlink (inc
+ludes one link descriptor or few link descriptors) is transmitted out for Tx cha
+nnel 3..*/
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_RAW    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_RAW_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_RAW_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_RAW_S  3
+/* GDMA_OUT_DSCR_ERR_CH3_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when detecting outlink descriptor erro
+r, including owner error, the second and third word error of outlink descriptor
+for Tx channel 3..*/
+#define GDMA_OUT_DSCR_ERR_CH3_INT_RAW    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH3_INT_RAW_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH3_INT_RAW_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH3_INT_RAW_S  2
+/* GDMA_OUT_EOF_CH3_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one outl
+ink descriptor has been read from memory for Tx channel 3. .*/
+#define GDMA_OUT_EOF_CH3_INT_RAW    (BIT(1))
+#define GDMA_OUT_EOF_CH3_INT_RAW_M  (BIT(1))
+#define GDMA_OUT_EOF_CH3_INT_RAW_V  0x1
+#define GDMA_OUT_EOF_CH3_INT_RAW_S  1
+/* GDMA_OUT_DONE_CH3_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one outl
+ink descriptor has been transmitted to peripherals for Tx channel 3..*/
+#define GDMA_OUT_DONE_CH3_INT_RAW    (BIT(0))
+#define GDMA_OUT_DONE_CH3_INT_RAW_M  (BIT(0))
+#define GDMA_OUT_DONE_CH3_INT_RAW_V  0x1
+#define GDMA_OUT_DONE_CH3_INT_RAW_S  0
+
+#define GDMA_OUT_INT_ST_CH3_REG          (DR_REG_GDMA_BASE + 0x2AC)
+/* GDMA_OUTFIFO_UDF_L3_CH3_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_ST    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_ST_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_ST_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_ST_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH3_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_ST    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_ST_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_ST_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_ST_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH3_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_ST    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_ST_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_ST_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_ST_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH3_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_ST    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_ST_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_ST_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_ST_S  4
+/* GDMA_OUT_TOTAL_EOF_CH3_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_ST    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_ST_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_ST_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_ST_S  3
+/* GDMA_OUT_DSCR_ERR_CH3_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH3_INT_ST    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH3_INT_ST_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH3_INT_ST_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH3_INT_ST_S  2
+/* GDMA_OUT_EOF_CH3_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH3_INT_ST    (BIT(1))
+#define GDMA_OUT_EOF_CH3_INT_ST_M  (BIT(1))
+#define GDMA_OUT_EOF_CH3_INT_ST_V  0x1
+#define GDMA_OUT_EOF_CH3_INT_ST_S  1
+/* GDMA_OUT_DONE_CH3_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH3_INT_ST    (BIT(0))
+#define GDMA_OUT_DONE_CH3_INT_ST_M  (BIT(0))
+#define GDMA_OUT_DONE_CH3_INT_ST_V  0x1
+#define GDMA_OUT_DONE_CH3_INT_ST_S  0
+
+#define GDMA_OUT_INT_ENA_CH3_REG          (DR_REG_GDMA_BASE + 0x2B0)
+/* GDMA_OUTFIFO_UDF_L3_CH3_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_ENA    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_ENA_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_ENA_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH3_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_ENA    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_ENA_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_ENA_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH3_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_ENA    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_ENA_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_ENA_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH3_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_ENA    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_ENA_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_ENA_S  4
+/* GDMA_OUT_TOTAL_EOF_CH3_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_ENA    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_ENA_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_ENA_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_ENA_S  3
+/* GDMA_OUT_DSCR_ERR_CH3_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH3_INT_ENA    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH3_INT_ENA_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH3_INT_ENA_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH3_INT_ENA_S  2
+/* GDMA_OUT_EOF_CH3_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH3_INT_ENA    (BIT(1))
+#define GDMA_OUT_EOF_CH3_INT_ENA_M  (BIT(1))
+#define GDMA_OUT_EOF_CH3_INT_ENA_V  0x1
+#define GDMA_OUT_EOF_CH3_INT_ENA_S  1
+/* GDMA_OUT_DONE_CH3_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH3_INT_ENA    (BIT(0))
+#define GDMA_OUT_DONE_CH3_INT_ENA_M  (BIT(0))
+#define GDMA_OUT_DONE_CH3_INT_ENA_V  0x1
+#define GDMA_OUT_DONE_CH3_INT_ENA_S  0
+
+#define GDMA_OUT_INT_CLR_CH3_REG          (DR_REG_GDMA_BASE + 0x2B4)
+/* GDMA_OUTFIFO_UDF_L3_CH3_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_CLR    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_CLR_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH3_INT_CLR_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH3_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_CLR    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_CLR_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH3_INT_CLR_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH3_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_CLR    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_CLR_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH3_INT_CLR_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH3_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_CLR    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_CLR_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH3_INT_CLR_S  4
+/* GDMA_OUT_TOTAL_EOF_CH3_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_CLR    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_CLR_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_CLR_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH3_INT_CLR_S  3
+/* GDMA_OUT_DSCR_ERR_CH3_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH3_INT_CLR    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH3_INT_CLR_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH3_INT_CLR_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH3_INT_CLR_S  2
+/* GDMA_OUT_EOF_CH3_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH3_INT_CLR    (BIT(1))
+#define GDMA_OUT_EOF_CH3_INT_CLR_M  (BIT(1))
+#define GDMA_OUT_EOF_CH3_INT_CLR_V  0x1
+#define GDMA_OUT_EOF_CH3_INT_CLR_S  1
+/* GDMA_OUT_DONE_CH3_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH3_INT_CLR    (BIT(0))
+#define GDMA_OUT_DONE_CH3_INT_CLR_M  (BIT(0))
+#define GDMA_OUT_DONE_CH3_INT_CLR_V  0x1
+#define GDMA_OUT_DONE_CH3_INT_CLR_S  0
+
+#define GDMA_OUTFIFO_STATUS_CH3_REG          (DR_REG_GDMA_BASE + 0x2B8)
+/* GDMA_OUT_REMAIN_UNDER_4B_L3_CH3 : RO ;bitpos:[26] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH3    (BIT(26))
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH3_M  (BIT(26))
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH3_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH3_S  26
+/* GDMA_OUT_REMAIN_UNDER_3B_L3_CH3 : RO ;bitpos:[25] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH3    (BIT(25))
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH3_M  (BIT(25))
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH3_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH3_S  25
+/* GDMA_OUT_REMAIN_UNDER_2B_L3_CH3 : RO ;bitpos:[24] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH3    (BIT(24))
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH3_M  (BIT(24))
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH3_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH3_S  24
+/* GDMA_OUT_REMAIN_UNDER_1B_L3_CH3 : RO ;bitpos:[23] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH3    (BIT(23))
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH3_M  (BIT(23))
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH3_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH3_S  23
+/* GDMA_OUTFIFO_CNT_L3_CH3 : RO ;bitpos:[22:18] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L3 Tx FIFO for Tx channel 3..*/
+#define GDMA_OUTFIFO_CNT_L3_CH3    0x0000001F
+#define GDMA_OUTFIFO_CNT_L3_CH3_M  ((GDMA_OUTFIFO_CNT_L3_CH3_V)<<(GDMA_OUTFIFO_CNT_L3_CH3_S))
+#define GDMA_OUTFIFO_CNT_L3_CH3_V  0x1F
+#define GDMA_OUTFIFO_CNT_L3_CH3_S  18
+/* GDMA_OUTFIFO_CNT_L2_CH3 : RO ;bitpos:[17:11] ;default: 7'b0 ; */
+/*description: The register stores the byte number of the data in L2 Tx FIFO for Tx channel 3..*/
+#define GDMA_OUTFIFO_CNT_L2_CH3    0x0000007F
+#define GDMA_OUTFIFO_CNT_L2_CH3_M  ((GDMA_OUTFIFO_CNT_L2_CH3_V)<<(GDMA_OUTFIFO_CNT_L2_CH3_S))
+#define GDMA_OUTFIFO_CNT_L2_CH3_V  0x7F
+#define GDMA_OUTFIFO_CNT_L2_CH3_S  11
+/* GDMA_OUTFIFO_CNT_L1_CH3 : RO ;bitpos:[10:6] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L1 Tx FIFO for Tx channel 3..*/
+#define GDMA_OUTFIFO_CNT_L1_CH3    0x0000001F
+#define GDMA_OUTFIFO_CNT_L1_CH3_M  ((GDMA_OUTFIFO_CNT_L1_CH3_V)<<(GDMA_OUTFIFO_CNT_L1_CH3_S))
+#define GDMA_OUTFIFO_CNT_L1_CH3_V  0x1F
+#define GDMA_OUTFIFO_CNT_L1_CH3_S  6
+/* GDMA_OUTFIFO_EMPTY_L3_CH3 : RO ;bitpos:[5] ;default: 1'b1 ; */
+/*description: L3 Tx FIFO empty signal for Tx channel 3..*/
+#define GDMA_OUTFIFO_EMPTY_L3_CH3    (BIT(5))
+#define GDMA_OUTFIFO_EMPTY_L3_CH3_M  (BIT(5))
+#define GDMA_OUTFIFO_EMPTY_L3_CH3_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L3_CH3_S  5
+/* GDMA_OUTFIFO_FULL_L3_CH3 : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: L3 Tx FIFO full signal for Tx channel 3..*/
+#define GDMA_OUTFIFO_FULL_L3_CH3    (BIT(4))
+#define GDMA_OUTFIFO_FULL_L3_CH3_M  (BIT(4))
+#define GDMA_OUTFIFO_FULL_L3_CH3_V  0x1
+#define GDMA_OUTFIFO_FULL_L3_CH3_S  4
+/* GDMA_OUTFIFO_EMPTY_L2_CH3 : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: L2 Tx FIFO empty signal for Tx channel 3..*/
+#define GDMA_OUTFIFO_EMPTY_L2_CH3    (BIT(3))
+#define GDMA_OUTFIFO_EMPTY_L2_CH3_M  (BIT(3))
+#define GDMA_OUTFIFO_EMPTY_L2_CH3_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L2_CH3_S  3
+/* GDMA_OUTFIFO_FULL_L2_CH3 : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: L2 Tx FIFO full signal for Tx channel 3..*/
+#define GDMA_OUTFIFO_FULL_L2_CH3    (BIT(2))
+#define GDMA_OUTFIFO_FULL_L2_CH3_M  (BIT(2))
+#define GDMA_OUTFIFO_FULL_L2_CH3_V  0x1
+#define GDMA_OUTFIFO_FULL_L2_CH3_S  2
+/* GDMA_OUTFIFO_EMPTY_L1_CH3 : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: L1 Tx FIFO empty signal for Tx channel 3..*/
+#define GDMA_OUTFIFO_EMPTY_L1_CH3    (BIT(1))
+#define GDMA_OUTFIFO_EMPTY_L1_CH3_M  (BIT(1))
+#define GDMA_OUTFIFO_EMPTY_L1_CH3_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L1_CH3_S  1
+/* GDMA_OUTFIFO_FULL_L1_CH3 : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: L1 Tx FIFO full signal for Tx channel 3..*/
+#define GDMA_OUTFIFO_FULL_L1_CH3    (BIT(0))
+#define GDMA_OUTFIFO_FULL_L1_CH3_M  (BIT(0))
+#define GDMA_OUTFIFO_FULL_L1_CH3_V  0x1
+#define GDMA_OUTFIFO_FULL_L1_CH3_S  0
+
+#define GDMA_OUT_PUSH_CH3_REG          (DR_REG_GDMA_BASE + 0x2BC)
+/* GDMA_OUTFIFO_PUSH_CH3 : R/W/SC ;bitpos:[9] ;default: 1'h0 ; */
+/*description: Set this bit to push data into DMA FIFO..*/
+#define GDMA_OUTFIFO_PUSH_CH3    (BIT(9))
+#define GDMA_OUTFIFO_PUSH_CH3_M  (BIT(9))
+#define GDMA_OUTFIFO_PUSH_CH3_V  0x1
+#define GDMA_OUTFIFO_PUSH_CH3_S  9
+/* GDMA_OUTFIFO_WDATA_CH3 : R/W ;bitpos:[8:0] ;default: 9'h0 ; */
+/*description: This register stores the data that need to be pushed into DMA FIFO..*/
+#define GDMA_OUTFIFO_WDATA_CH3    0x000001FF
+#define GDMA_OUTFIFO_WDATA_CH3_M  ((GDMA_OUTFIFO_WDATA_CH3_V)<<(GDMA_OUTFIFO_WDATA_CH3_S))
+#define GDMA_OUTFIFO_WDATA_CH3_V  0x1FF
+#define GDMA_OUTFIFO_WDATA_CH3_S  0
+
+#define GDMA_OUT_LINK_CH3_REG          (DR_REG_GDMA_BASE + 0x2C0)
+/* GDMA_OUTLINK_PARK_CH3 : RO ;bitpos:[23] ;default: 1'h1 ; */
+/*description: 1: the outlink descriptor's FSM is in idle state.  0: the outlink descriptor's F
+SM is working..*/
+#define GDMA_OUTLINK_PARK_CH3    (BIT(23))
+#define GDMA_OUTLINK_PARK_CH3_M  (BIT(23))
+#define GDMA_OUTLINK_PARK_CH3_V  0x1
+#define GDMA_OUTLINK_PARK_CH3_S  23
+/* GDMA_OUTLINK_RESTART_CH3 : R/W/SC ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Set this bit to restart a new outlink from the last address. .*/
+#define GDMA_OUTLINK_RESTART_CH3    (BIT(22))
+#define GDMA_OUTLINK_RESTART_CH3_M  (BIT(22))
+#define GDMA_OUTLINK_RESTART_CH3_V  0x1
+#define GDMA_OUTLINK_RESTART_CH3_S  22
+/* GDMA_OUTLINK_START_CH3 : R/W/SC ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to start dealing with the outlink descriptors..*/
+#define GDMA_OUTLINK_START_CH3    (BIT(21))
+#define GDMA_OUTLINK_START_CH3_M  (BIT(21))
+#define GDMA_OUTLINK_START_CH3_V  0x1
+#define GDMA_OUTLINK_START_CH3_S  21
+/* GDMA_OUTLINK_STOP_CH3 : R/W/SC ;bitpos:[20] ;default: 1'b0 ; */
+/*description: Set this bit to stop dealing with the outlink descriptors..*/
+#define GDMA_OUTLINK_STOP_CH3    (BIT(20))
+#define GDMA_OUTLINK_STOP_CH3_M  (BIT(20))
+#define GDMA_OUTLINK_STOP_CH3_V  0x1
+#define GDMA_OUTLINK_STOP_CH3_S  20
+/* GDMA_OUTLINK_ADDR_CH3 : R/W ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: This register stores the 20 least significant bits of the first outlink descript
+or's address..*/
+#define GDMA_OUTLINK_ADDR_CH3    0x000FFFFF
+#define GDMA_OUTLINK_ADDR_CH3_M  ((GDMA_OUTLINK_ADDR_CH3_V)<<(GDMA_OUTLINK_ADDR_CH3_S))
+#define GDMA_OUTLINK_ADDR_CH3_V  0xFFFFF
+#define GDMA_OUTLINK_ADDR_CH3_S  0
+
+#define GDMA_OUT_STATE_CH3_REG          (DR_REG_GDMA_BASE + 0x2C4)
+/* GDMA_OUT_STATE_CH3 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_STATE_CH3    0x00000007
+#define GDMA_OUT_STATE_CH3_M  ((GDMA_OUT_STATE_CH3_V)<<(GDMA_OUT_STATE_CH3_S))
+#define GDMA_OUT_STATE_CH3_V  0x7
+#define GDMA_OUT_STATE_CH3_S  20
+/* GDMA_OUT_DSCR_STATE_CH3 : RO ;bitpos:[19:18] ;default: 2'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_DSCR_STATE_CH3    0x00000003
+#define GDMA_OUT_DSCR_STATE_CH3_M  ((GDMA_OUT_DSCR_STATE_CH3_V)<<(GDMA_OUT_DSCR_STATE_CH3_S))
+#define GDMA_OUT_DSCR_STATE_CH3_V  0x3
+#define GDMA_OUT_DSCR_STATE_CH3_S  18
+/* GDMA_OUTLINK_DSCR_ADDR_CH3 : RO ;bitpos:[17:0] ;default: 18'b0 ; */
+/*description: This register stores the current outlink descriptor's address..*/
+#define GDMA_OUTLINK_DSCR_ADDR_CH3    0x0003FFFF
+#define GDMA_OUTLINK_DSCR_ADDR_CH3_M  ((GDMA_OUTLINK_DSCR_ADDR_CH3_V)<<(GDMA_OUTLINK_DSCR_ADDR_CH3_S))
+#define GDMA_OUTLINK_DSCR_ADDR_CH3_V  0x3FFFF
+#define GDMA_OUTLINK_DSCR_ADDR_CH3_S  0
+
+#define GDMA_OUT_EOF_DES_ADDR_CH3_REG          (DR_REG_GDMA_BASE + 0x2C8)
+/* GDMA_OUT_EOF_DES_ADDR_CH3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the outlink descriptor when the EOF bit in t
+his descriptor is 1..*/
+#define GDMA_OUT_EOF_DES_ADDR_CH3    0xFFFFFFFF
+#define GDMA_OUT_EOF_DES_ADDR_CH3_M  ((GDMA_OUT_EOF_DES_ADDR_CH3_V)<<(GDMA_OUT_EOF_DES_ADDR_CH3_S))
+#define GDMA_OUT_EOF_DES_ADDR_CH3_V  0xFFFFFFFF
+#define GDMA_OUT_EOF_DES_ADDR_CH3_S  0
+
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH3_REG          (DR_REG_GDMA_BASE + 0x2CC)
+/* GDMA_OUT_EOF_BFR_DES_ADDR_CH3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the outlink descriptor before the last outli
+nk descriptor..*/
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH3    0xFFFFFFFF
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH3_M  ((GDMA_OUT_EOF_BFR_DES_ADDR_CH3_V)<<(GDMA_OUT_EOF_BFR_DES_ADDR_CH3_S))
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH3_V  0xFFFFFFFF
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH3_S  0
+
+#define GDMA_OUT_DSCR_CH3_REG          (DR_REG_GDMA_BASE + 0x2D0)
+/* GDMA_OUTLINK_DSCR_CH3 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the current outlink descriptor y..*/
+#define GDMA_OUTLINK_DSCR_CH3    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_CH3_M  ((GDMA_OUTLINK_DSCR_CH3_V)<<(GDMA_OUTLINK_DSCR_CH3_S))
+#define GDMA_OUTLINK_DSCR_CH3_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_CH3_S  0
+
+#define GDMA_OUT_DSCR_BF0_CH3_REG          (DR_REG_GDMA_BASE + 0x2D4)
+/* GDMA_OUTLINK_DSCR_BF0_CH3 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the last outlink descriptor y-1..*/
+#define GDMA_OUTLINK_DSCR_BF0_CH3    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF0_CH3_M  ((GDMA_OUTLINK_DSCR_BF0_CH3_V)<<(GDMA_OUTLINK_DSCR_BF0_CH3_S))
+#define GDMA_OUTLINK_DSCR_BF0_CH3_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF0_CH3_S  0
+
+#define GDMA_OUT_DSCR_BF1_CH3_REG          (DR_REG_GDMA_BASE + 0x2D8)
+/* GDMA_OUTLINK_DSCR_BF1_CH3 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the second-to-last inlink descriptor x-2..*/
+#define GDMA_OUTLINK_DSCR_BF1_CH3    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF1_CH3_M  ((GDMA_OUTLINK_DSCR_BF1_CH3_V)<<(GDMA_OUTLINK_DSCR_BF1_CH3_S))
+#define GDMA_OUTLINK_DSCR_BF1_CH3_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF1_CH3_S  0
+
+#define GDMA_OUT_WIGHT_CH3_REG          (DR_REG_GDMA_BASE + 0x2DC)
+/* GDMA_TX_WEIGHT_CH3 : R/W ;bitpos:[11:8] ;default: 4'hf ; */
+/*description: The weight of Tx channel 3. .*/
+#define GDMA_TX_WEIGHT_CH3    0x0000000F
+#define GDMA_TX_WEIGHT_CH3_M  ((GDMA_TX_WEIGHT_CH3_V)<<(GDMA_TX_WEIGHT_CH3_S))
+#define GDMA_TX_WEIGHT_CH3_V  0xF
+#define GDMA_TX_WEIGHT_CH3_S  8
+
+#define GDMA_OUT_PRI_CH3_REG          (DR_REG_GDMA_BASE + 0x2E4)
+/* GDMA_TX_PRI_CH3 : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: The priority of Tx channel 3. The larger of the value, the higher of the priorit
+y..*/
+#define GDMA_TX_PRI_CH3    0x0000000F
+#define GDMA_TX_PRI_CH3_M  ((GDMA_TX_PRI_CH3_V)<<(GDMA_TX_PRI_CH3_S))
+#define GDMA_TX_PRI_CH3_V  0xF
+#define GDMA_TX_PRI_CH3_S  0
+
+#define GDMA_OUT_PERI_SEL_CH3_REG          (DR_REG_GDMA_BASE + 0x2E8)
+/* GDMA_PERI_OUT_SEL_CH3 : R/W ;bitpos:[5:0] ;default: 6'h3f ; */
+/*description: This register is used to select peripheral for Tx channel 3. 0:SPI2. 1: SPI3. 2:
+ UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.; 7: AE
+S. 8: SHA. 9: ADC_DAC..*/
+#define GDMA_PERI_OUT_SEL_CH3    0x0000003F
+#define GDMA_PERI_OUT_SEL_CH3_M  ((GDMA_PERI_OUT_SEL_CH3_V)<<(GDMA_PERI_OUT_SEL_CH3_S))
+#define GDMA_PERI_OUT_SEL_CH3_V  0x3F
+#define GDMA_PERI_OUT_SEL_CH3_S  0
+
+#define GDMA_IN_CONF0_CH4_REG          (DR_REG_GDMA_BASE + 0x300)
+/* GDMA_MEM_TRANS_EN_CH4 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit 1 to enable automatic transmitting data from memory to memory via D
+MA..*/
+#define GDMA_MEM_TRANS_EN_CH4    (BIT(4))
+#define GDMA_MEM_TRANS_EN_CH4_M  (BIT(4))
+#define GDMA_MEM_TRANS_EN_CH4_V  0x1
+#define GDMA_MEM_TRANS_EN_CH4_S  4
+/* GDMA_IN_DATA_BURST_EN_CH4 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Rx channel 2 receiving data
+when accessing internal SRAM. .*/
+#define GDMA_IN_DATA_BURST_EN_CH4    (BIT(3))
+#define GDMA_IN_DATA_BURST_EN_CH4_M  (BIT(3))
+#define GDMA_IN_DATA_BURST_EN_CH4_V  0x1
+#define GDMA_IN_DATA_BURST_EN_CH4_S  3
+/* GDMA_INDSCR_BURST_EN_CH4 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Rx channel 2 reading link de
+scriptor when accessing internal SRAM. .*/
+#define GDMA_INDSCR_BURST_EN_CH4    (BIT(2))
+#define GDMA_INDSCR_BURST_EN_CH4_M  (BIT(2))
+#define GDMA_INDSCR_BURST_EN_CH4_V  0x1
+#define GDMA_INDSCR_BURST_EN_CH4_S  2
+/* GDMA_IN_LOOP_TEST_CH4 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_LOOP_TEST_CH4    (BIT(1))
+#define GDMA_IN_LOOP_TEST_CH4_M  (BIT(1))
+#define GDMA_IN_LOOP_TEST_CH4_V  0x1
+#define GDMA_IN_LOOP_TEST_CH4_S  1
+/* GDMA_IN_RST_CH4 : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: This bit is used to reset DMA channel 4 Rx FSM and Rx FIFO pointer..*/
+#define GDMA_IN_RST_CH4    (BIT(0))
+#define GDMA_IN_RST_CH4_M  (BIT(0))
+#define GDMA_IN_RST_CH4_V  0x1
+#define GDMA_IN_RST_CH4_S  0
+
+#define GDMA_IN_CONF1_CH4_REG          (DR_REG_GDMA_BASE + 0x304)
+/* GDMA_IN_EXT_MEM_BK_SIZE_CH4 : R/W ;bitpos:[14:13] ;default: 2'b0 ; */
+/*description: Block size of Rx channel 4 when DMA access external SRAM. 0: 16 bytes      1: 32
+ bytes    2/3:reserved.*/
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH4    0x00000003
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH4_M  ((GDMA_IN_EXT_MEM_BK_SIZE_CH4_V)<<(GDMA_IN_EXT_MEM_BK_SIZE_CH4_S))
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH4_V  0x3
+#define GDMA_IN_EXT_MEM_BK_SIZE_CH4_S  13
+/* GDMA_IN_CHECK_OWNER_CH4 : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to enable checking the owner attribute of the link descriptor..*/
+#define GDMA_IN_CHECK_OWNER_CH4    (BIT(12))
+#define GDMA_IN_CHECK_OWNER_CH4_M  (BIT(12))
+#define GDMA_IN_CHECK_OWNER_CH4_V  0x1
+#define GDMA_IN_CHECK_OWNER_CH4_S  12
+/* GDMA_DMA_INFIFO_FULL_THRS_CH4 : R/W ;bitpos:[11:0] ;default: 12'hc ; */
+/*description: This register is used to generate the INFIFO_FULL_WM_INT interrupt when Rx chann
+el 4 received byte number in Rx FIFO is up to the value of the register..*/
+#define GDMA_DMA_INFIFO_FULL_THRS_CH4    0x00000FFF
+#define GDMA_DMA_INFIFO_FULL_THRS_CH4_M  ((GDMA_DMA_INFIFO_FULL_THRS_CH4_V)<<(GDMA_DMA_INFIFO_FULL_THRS_CH4_S))
+#define GDMA_DMA_INFIFO_FULL_THRS_CH4_V  0xFFF
+#define GDMA_DMA_INFIFO_FULL_THRS_CH4_S  0
+
+#define GDMA_IN_INT_RAW_CH4_REG          (DR_REG_GDMA_BASE + 0x308)
+/* GDMA_INFIFO_UDF_L3_CH4_INT_RAW : R/WTC/SS ;bitpos:[9] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Rx channel 4 is
+underflow. .*/
+#define GDMA_INFIFO_UDF_L3_CH4_INT_RAW    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH4_INT_RAW_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH4_INT_RAW_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH4_INT_RAW_S  9
+/* GDMA_INFIFO_OVF_L3_CH4_INT_RAW : R/WTC/SS ;bitpos:[8] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Rx channel 4 is
+overflow. .*/
+#define GDMA_INFIFO_OVF_L3_CH4_INT_RAW    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH4_INT_RAW_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH4_INT_RAW_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH4_INT_RAW_S  8
+/* GDMA_INFIFO_UDF_L1_CH4_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Rx channel 4 is
+underflow. .*/
+#define GDMA_INFIFO_UDF_L1_CH4_INT_RAW    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH4_INT_RAW_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH4_INT_RAW_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH4_INT_RAW_S  7
+/* GDMA_INFIFO_OVF_L1_CH4_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Rx channel 4 is
+overflow. .*/
+#define GDMA_INFIFO_OVF_L1_CH4_INT_RAW    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH4_INT_RAW_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH4_INT_RAW_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH4_INT_RAW_S  6
+/* GDMA_INFIFO_FULL_WM_CH4_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when received data byte number is up t
+o threshold configured by REG_DMA_INFIFO_FULL_THRS_CH0 in Rx FIFO of channel 4..*/
+#define GDMA_INFIFO_FULL_WM_CH4_INT_RAW    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH4_INT_RAW_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH4_INT_RAW_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH4_INT_RAW_S  5
+/* GDMA_IN_DSCR_EMPTY_CH4_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when Rx buffer pointed by inlink is fu
+ll and receiving data is not completed, but there is no more inlink for Rx chann
+el 4..*/
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_RAW    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_RAW_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_RAW_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_RAW_S  4
+/* GDMA_IN_DSCR_ERR_CH4_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when detecting inlink descriptor error
+, including owner error, the second and third word error of inlink descriptor fo
+r Rx channel 4..*/
+#define GDMA_IN_DSCR_ERR_CH4_INT_RAW    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH4_INT_RAW_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH4_INT_RAW_V  0x1
+#define GDMA_IN_DSCR_ERR_CH4_INT_RAW_S  3
+/* GDMA_IN_ERR_EOF_CH4_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when data error is detected only in th
+e case that the peripheral is UHCI0 for Rx channel 4. For other peripherals, thi
+s raw interrupt is reserved..*/
+#define GDMA_IN_ERR_EOF_CH4_INT_RAW    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH4_INT_RAW_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH4_INT_RAW_V  0x1
+#define GDMA_IN_ERR_EOF_CH4_INT_RAW_S  2
+/* GDMA_IN_SUC_EOF_CH4_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one inli
+nk descriptor has been received for Rx channel 4. For UHCI0, the raw interrupt b
+it turns to high level when the last data pointed by one inlink descriptor has b
+een received and no data error is detected for Rx channel 0..*/
+#define GDMA_IN_SUC_EOF_CH4_INT_RAW    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH4_INT_RAW_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH4_INT_RAW_V  0x1
+#define GDMA_IN_SUC_EOF_CH4_INT_RAW_S  1
+/* GDMA_IN_DONE_CH4_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one inli
+nk descriptor has been received for Rx channel 4..*/
+#define GDMA_IN_DONE_CH4_INT_RAW    (BIT(0))
+#define GDMA_IN_DONE_CH4_INT_RAW_M  (BIT(0))
+#define GDMA_IN_DONE_CH4_INT_RAW_V  0x1
+#define GDMA_IN_DONE_CH4_INT_RAW_S  0
+
+#define GDMA_IN_INT_ST_CH4_REG          (DR_REG_GDMA_BASE + 0x30C)
+/* GDMA_INFIFO_UDF_L3_CH4_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH4_INT_ST    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH4_INT_ST_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH4_INT_ST_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH4_INT_ST_S  9
+/* GDMA_INFIFO_OVF_L3_CH4_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH4_INT_ST    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH4_INT_ST_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH4_INT_ST_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH4_INT_ST_S  8
+/* GDMA_INFIFO_UDF_L1_CH4_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH4_INT_ST    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH4_INT_ST_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH4_INT_ST_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH4_INT_ST_S  7
+/* GDMA_INFIFO_OVF_L1_CH4_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH4_INT_ST    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH4_INT_ST_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH4_INT_ST_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH4_INT_ST_S  6
+/* GDMA_INFIFO_FULL_WM_CH4_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_INFIFO_FULL_WM_CH4_INT_ST    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH4_INT_ST_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH4_INT_ST_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH4_INT_ST_S  5
+/* GDMA_IN_DSCR_EMPTY_CH4_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_ST    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_ST_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_ST_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_ST_S  4
+/* GDMA_IN_DSCR_ERR_CH4_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH4_INT_ST    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH4_INT_ST_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH4_INT_ST_V  0x1
+#define GDMA_IN_DSCR_ERR_CH4_INT_ST_S  3
+/* GDMA_IN_ERR_EOF_CH4_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH4_INT_ST    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH4_INT_ST_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH4_INT_ST_V  0x1
+#define GDMA_IN_ERR_EOF_CH4_INT_ST_S  2
+/* GDMA_IN_SUC_EOF_CH4_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH4_INT_ST    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH4_INT_ST_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH4_INT_ST_V  0x1
+#define GDMA_IN_SUC_EOF_CH4_INT_ST_S  1
+/* GDMA_IN_DONE_CH4_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH4_INT_ST    (BIT(0))
+#define GDMA_IN_DONE_CH4_INT_ST_M  (BIT(0))
+#define GDMA_IN_DONE_CH4_INT_ST_V  0x1
+#define GDMA_IN_DONE_CH4_INT_ST_S  0
+
+#define GDMA_IN_INT_ENA_CH4_REG          (DR_REG_GDMA_BASE + 0x310)
+/* GDMA_INFIFO_UDF_L3_CH4_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH4_INT_ENA    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH4_INT_ENA_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH4_INT_ENA_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH4_INT_ENA_S  9
+/* GDMA_INFIFO_OVF_L3_CH4_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH4_INT_ENA    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH4_INT_ENA_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH4_INT_ENA_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH4_INT_ENA_S  8
+/* GDMA_INFIFO_UDF_L1_CH4_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH4_INT_ENA    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH4_INT_ENA_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH4_INT_ENA_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH4_INT_ENA_S  7
+/* GDMA_INFIFO_OVF_L1_CH4_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH4_INT_ENA    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH4_INT_ENA_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH4_INT_ENA_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH4_INT_ENA_S  6
+/* GDMA_INFIFO_FULL_WM_CH4_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_INFIFO_FULL_WM_CH4_INT_ENA    (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH4_INT_ENA_M  (BIT(5))
+#define GDMA_INFIFO_FULL_WM_CH4_INT_ENA_V  0x1
+#define GDMA_INFIFO_FULL_WM_CH4_INT_ENA_S  5
+/* GDMA_IN_DSCR_EMPTY_CH4_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_ENA    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_ENA_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_ENA_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_ENA_S  4
+/* GDMA_IN_DSCR_ERR_CH4_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH4_INT_ENA    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH4_INT_ENA_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH4_INT_ENA_V  0x1
+#define GDMA_IN_DSCR_ERR_CH4_INT_ENA_S  3
+/* GDMA_IN_ERR_EOF_CH4_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH4_INT_ENA    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH4_INT_ENA_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH4_INT_ENA_V  0x1
+#define GDMA_IN_ERR_EOF_CH4_INT_ENA_S  2
+/* GDMA_IN_SUC_EOF_CH4_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH4_INT_ENA    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH4_INT_ENA_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH4_INT_ENA_V  0x1
+#define GDMA_IN_SUC_EOF_CH4_INT_ENA_S  1
+/* GDMA_IN_DONE_CH4_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH4_INT_ENA    (BIT(0))
+#define GDMA_IN_DONE_CH4_INT_ENA_M  (BIT(0))
+#define GDMA_IN_DONE_CH4_INT_ENA_V  0x1
+#define GDMA_IN_DONE_CH4_INT_ENA_S  0
+
+#define GDMA_IN_INT_CLR_CH4_REG          (DR_REG_GDMA_BASE + 0x314)
+/* GDMA_INFIFO_UDF_L3_CH4_INT_CLR : WT ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L3_CH4_INT_CLR    (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH4_INT_CLR_M  (BIT(9))
+#define GDMA_INFIFO_UDF_L3_CH4_INT_CLR_V  0x1
+#define GDMA_INFIFO_UDF_L3_CH4_INT_CLR_S  9
+/* GDMA_INFIFO_OVF_L3_CH4_INT_CLR : WT ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L3_CH4_INT_CLR    (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH4_INT_CLR_M  (BIT(8))
+#define GDMA_INFIFO_OVF_L3_CH4_INT_CLR_V  0x1
+#define GDMA_INFIFO_OVF_L3_CH4_INT_CLR_S  8
+/* GDMA_INFIFO_UDF_L1_CH4_INT_CLR : WT ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_UDF_L1_CH4_INT_CLR    (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH4_INT_CLR_M  (BIT(7))
+#define GDMA_INFIFO_UDF_L1_CH4_INT_CLR_V  0x1
+#define GDMA_INFIFO_UDF_L1_CH4_INT_CLR_S  7
+/* GDMA_INFIFO_OVF_L1_CH4_INT_CLR : WT ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_INFIFO_OVF_L1_CH4_INT_CLR    (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH4_INT_CLR_M  (BIT(6))
+#define GDMA_INFIFO_OVF_L1_CH4_INT_CLR_V  0x1
+#define GDMA_INFIFO_OVF_L1_CH4_INT_CLR_S  6
+/* GDMA_DMA_INFIFO_FULL_WM_CH4_INT_CLR : WT ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the INFIFO_FULL_WM_CH_INT interrupt..*/
+#define GDMA_DMA_INFIFO_FULL_WM_CH4_INT_CLR    (BIT(5))
+#define GDMA_DMA_INFIFO_FULL_WM_CH4_INT_CLR_M  (BIT(5))
+#define GDMA_DMA_INFIFO_FULL_WM_CH4_INT_CLR_V  0x1
+#define GDMA_DMA_INFIFO_FULL_WM_CH4_INT_CLR_S  5
+/* GDMA_IN_DSCR_EMPTY_CH4_INT_CLR : WT ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DSCR_EMPTY_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_CLR    (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_CLR_M  (BIT(4))
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_CLR_V  0x1
+#define GDMA_IN_DSCR_EMPTY_CH4_INT_CLR_S  4
+/* GDMA_IN_DSCR_ERR_CH4_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_IN_DSCR_ERR_CH4_INT_CLR    (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH4_INT_CLR_M  (BIT(3))
+#define GDMA_IN_DSCR_ERR_CH4_INT_CLR_V  0x1
+#define GDMA_IN_DSCR_ERR_CH4_INT_CLR_S  3
+/* GDMA_IN_ERR_EOF_CH4_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_ERR_EOF_CH_INT interrupt..*/
+#define GDMA_IN_ERR_EOF_CH4_INT_CLR    (BIT(2))
+#define GDMA_IN_ERR_EOF_CH4_INT_CLR_M  (BIT(2))
+#define GDMA_IN_ERR_EOF_CH4_INT_CLR_V  0x1
+#define GDMA_IN_ERR_EOF_CH4_INT_CLR_S  2
+/* GDMA_IN_SUC_EOF_CH4_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_SUC_EOF_CH_INT interrupt..*/
+#define GDMA_IN_SUC_EOF_CH4_INT_CLR    (BIT(1))
+#define GDMA_IN_SUC_EOF_CH4_INT_CLR_M  (BIT(1))
+#define GDMA_IN_SUC_EOF_CH4_INT_CLR_V  0x1
+#define GDMA_IN_SUC_EOF_CH4_INT_CLR_S  1
+/* GDMA_IN_DONE_CH4_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the IN_DONE_CH_INT interrupt..*/
+#define GDMA_IN_DONE_CH4_INT_CLR    (BIT(0))
+#define GDMA_IN_DONE_CH4_INT_CLR_M  (BIT(0))
+#define GDMA_IN_DONE_CH4_INT_CLR_V  0x1
+#define GDMA_IN_DONE_CH4_INT_CLR_S  0
+
+#define GDMA_INFIFO_STATUS_CH4_REG          (DR_REG_GDMA_BASE + 0x318)
+/* GDMA_IN_BUF_HUNGRY_CH4 : RO ;bitpos:[28] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_BUF_HUNGRY_CH4    (BIT(28))
+#define GDMA_IN_BUF_HUNGRY_CH4_M  (BIT(28))
+#define GDMA_IN_BUF_HUNGRY_CH4_V  0x1
+#define GDMA_IN_BUF_HUNGRY_CH4_S  28
+/* GDMA_IN_REMAIN_UNDER_4B_L3_CH4 : RO ;bitpos:[27] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH4    (BIT(27))
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH4_M  (BIT(27))
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH4_V  0x1
+#define GDMA_IN_REMAIN_UNDER_4B_L3_CH4_S  27
+/* GDMA_IN_REMAIN_UNDER_3B_L3_CH4 : RO ;bitpos:[26] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH4    (BIT(26))
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH4_M  (BIT(26))
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH4_V  0x1
+#define GDMA_IN_REMAIN_UNDER_3B_L3_CH4_S  26
+/* GDMA_IN_REMAIN_UNDER_2B_L3_CH4 : RO ;bitpos:[25] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH4    (BIT(25))
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH4_M  (BIT(25))
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH4_V  0x1
+#define GDMA_IN_REMAIN_UNDER_2B_L3_CH4_S  25
+/* GDMA_IN_REMAIN_UNDER_1B_L3_CH4 : RO ;bitpos:[24] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH4    (BIT(24))
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH4_M  (BIT(24))
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH4_V  0x1
+#define GDMA_IN_REMAIN_UNDER_1B_L3_CH4_S  24
+/* GDMA_INFIFO_CNT_L3_CH4 : RO ;bitpos:[23:19] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L3 Rx FIFO for Rx channel 4..*/
+#define GDMA_INFIFO_CNT_L3_CH4    0x0000001F
+#define GDMA_INFIFO_CNT_L3_CH4_M  ((GDMA_INFIFO_CNT_L3_CH4_V)<<(GDMA_INFIFO_CNT_L3_CH4_S))
+#define GDMA_INFIFO_CNT_L3_CH4_V  0x1F
+#define GDMA_INFIFO_CNT_L3_CH4_S  19
+/* GDMA_INFIFO_CNT_L2_CH4 : RO ;bitpos:[18:12] ;default: 7'b0 ; */
+/*description: The register stores the byte number of the data in L2 Rx FIFO for Rx channel 4..*/
+#define GDMA_INFIFO_CNT_L2_CH4    0x0000007F
+#define GDMA_INFIFO_CNT_L2_CH4_M  ((GDMA_INFIFO_CNT_L2_CH4_V)<<(GDMA_INFIFO_CNT_L2_CH4_S))
+#define GDMA_INFIFO_CNT_L2_CH4_V  0x7F
+#define GDMA_INFIFO_CNT_L2_CH4_S  12
+/* GDMA_INFIFO_CNT_L1_CH4 : RO ;bitpos:[11:6] ;default: 6'b0 ; */
+/*description: The register stores the byte number of the data in L1 Rx FIFO for Rx channel 4..*/
+#define GDMA_INFIFO_CNT_L1_CH4    0x0000003F
+#define GDMA_INFIFO_CNT_L1_CH4_M  ((GDMA_INFIFO_CNT_L1_CH4_V)<<(GDMA_INFIFO_CNT_L1_CH4_S))
+#define GDMA_INFIFO_CNT_L1_CH4_V  0x3F
+#define GDMA_INFIFO_CNT_L1_CH4_S  6
+/* GDMA_INFIFO_EMPTY_L3_CH4 : RO ;bitpos:[5] ;default: 1'b1 ; */
+/*description: L3 Rx FIFO empty signal for Rx channel 4..*/
+#define GDMA_INFIFO_EMPTY_L3_CH4    (BIT(5))
+#define GDMA_INFIFO_EMPTY_L3_CH4_M  (BIT(5))
+#define GDMA_INFIFO_EMPTY_L3_CH4_V  0x1
+#define GDMA_INFIFO_EMPTY_L3_CH4_S  5
+/* GDMA_INFIFO_FULL_L3_CH4 : RO ;bitpos:[4] ;default: 1'b1 ; */
+/*description: L3 Rx FIFO full signal for Rx channel 4..*/
+#define GDMA_INFIFO_FULL_L3_CH4    (BIT(4))
+#define GDMA_INFIFO_FULL_L3_CH4_M  (BIT(4))
+#define GDMA_INFIFO_FULL_L3_CH4_V  0x1
+#define GDMA_INFIFO_FULL_L3_CH4_S  4
+/* GDMA_INFIFO_EMPTY_L2_CH4 : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: L2 Rx FIFO empty signal for Rx channel 4..*/
+#define GDMA_INFIFO_EMPTY_L2_CH4    (BIT(3))
+#define GDMA_INFIFO_EMPTY_L2_CH4_M  (BIT(3))
+#define GDMA_INFIFO_EMPTY_L2_CH4_V  0x1
+#define GDMA_INFIFO_EMPTY_L2_CH4_S  3
+/* GDMA_INFIFO_FULL_L2_CH4 : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: L2 Rx FIFO full signal for Rx channel 4..*/
+#define GDMA_INFIFO_FULL_L2_CH4    (BIT(2))
+#define GDMA_INFIFO_FULL_L2_CH4_M  (BIT(2))
+#define GDMA_INFIFO_FULL_L2_CH4_V  0x1
+#define GDMA_INFIFO_FULL_L2_CH4_S  2
+/* GDMA_INFIFO_EMPTY_L1_CH4 : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: L1 Rx FIFO empty signal for Rx channel 4..*/
+#define GDMA_INFIFO_EMPTY_L1_CH4    (BIT(1))
+#define GDMA_INFIFO_EMPTY_L1_CH4_M  (BIT(1))
+#define GDMA_INFIFO_EMPTY_L1_CH4_V  0x1
+#define GDMA_INFIFO_EMPTY_L1_CH4_S  1
+/* GDMA_INFIFO_FULL_L1_CH4 : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: L1 Rx FIFO full signal for Rx channel 4..*/
+#define GDMA_INFIFO_FULL_L1_CH4    (BIT(0))
+#define GDMA_INFIFO_FULL_L1_CH4_M  (BIT(0))
+#define GDMA_INFIFO_FULL_L1_CH4_V  0x1
+#define GDMA_INFIFO_FULL_L1_CH4_S  0
+
+#define GDMA_IN_POP_CH4_REG          (DR_REG_GDMA_BASE + 0x31C)
+/* GDMA_INFIFO_POP_CH4 : R/W/SC ;bitpos:[12] ;default: 1'h0 ; */
+/*description: Set this bit to pop data from DMA FIFO..*/
+#define GDMA_INFIFO_POP_CH4    (BIT(12))
+#define GDMA_INFIFO_POP_CH4_M  (BIT(12))
+#define GDMA_INFIFO_POP_CH4_V  0x1
+#define GDMA_INFIFO_POP_CH4_S  12
+/* GDMA_INFIFO_RDATA_CH4 : RO ;bitpos:[11:0] ;default: 12'h800 ; */
+/*description: This register stores the data popping from DMA FIFO..*/
+#define GDMA_INFIFO_RDATA_CH4    0x00000FFF
+#define GDMA_INFIFO_RDATA_CH4_M  ((GDMA_INFIFO_RDATA_CH4_V)<<(GDMA_INFIFO_RDATA_CH4_S))
+#define GDMA_INFIFO_RDATA_CH4_V  0xFFF
+#define GDMA_INFIFO_RDATA_CH4_S  0
+
+#define GDMA_IN_LINK_CH4_REG          (DR_REG_GDMA_BASE + 0x320)
+/* GDMA_INLINK_PARK_CH4 : RO ;bitpos:[24] ;default: 1'h1 ; */
+/*description: 1: the inlink descriptor's FSM is in idle state.  0: the inlink descriptor's FSM
+ is working..*/
+#define GDMA_INLINK_PARK_CH4    (BIT(24))
+#define GDMA_INLINK_PARK_CH4_M  (BIT(24))
+#define GDMA_INLINK_PARK_CH4_V  0x1
+#define GDMA_INLINK_PARK_CH4_S  24
+/* GDMA_INLINK_RESTART_CH4 : R/W/SC ;bitpos:[23] ;default: 1'b0 ; */
+/*description: Set this bit to mount a new inlink descriptor..*/
+#define GDMA_INLINK_RESTART_CH4    (BIT(23))
+#define GDMA_INLINK_RESTART_CH4_M  (BIT(23))
+#define GDMA_INLINK_RESTART_CH4_V  0x1
+#define GDMA_INLINK_RESTART_CH4_S  23
+/* GDMA_INLINK_START_CH4 : R/W/SC ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Set this bit to start dealing with the inlink descriptors..*/
+#define GDMA_INLINK_START_CH4    (BIT(22))
+#define GDMA_INLINK_START_CH4_M  (BIT(22))
+#define GDMA_INLINK_START_CH4_V  0x1
+#define GDMA_INLINK_START_CH4_S  22
+/* GDMA_INLINK_STOP_CH4 : R/W/SC ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to stop dealing with the inlink descriptors..*/
+#define GDMA_INLINK_STOP_CH4    (BIT(21))
+#define GDMA_INLINK_STOP_CH4_M  (BIT(21))
+#define GDMA_INLINK_STOP_CH4_V  0x1
+#define GDMA_INLINK_STOP_CH4_S  21
+/* GDMA_INLINK_AUTO_RET_CH4 : R/W ;bitpos:[20] ;default: 1'b1 ; */
+/*description: Set this bit to return to current inlink descriptor's address, when there are so
+me errors in current receiving data..*/
+#define GDMA_INLINK_AUTO_RET_CH4    (BIT(20))
+#define GDMA_INLINK_AUTO_RET_CH4_M  (BIT(20))
+#define GDMA_INLINK_AUTO_RET_CH4_V  0x1
+#define GDMA_INLINK_AUTO_RET_CH4_S  20
+/* GDMA_INLINK_ADDR_CH4 : R/W ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: This register stores the 20 least significant bits of the first inlink descripto
+r's address..*/
+#define GDMA_INLINK_ADDR_CH4    0x000FFFFF
+#define GDMA_INLINK_ADDR_CH4_M  ((GDMA_INLINK_ADDR_CH4_V)<<(GDMA_INLINK_ADDR_CH4_S))
+#define GDMA_INLINK_ADDR_CH4_V  0xFFFFF
+#define GDMA_INLINK_ADDR_CH4_S  0
+
+#define GDMA_IN_STATE_CH4_REG          (DR_REG_GDMA_BASE + 0x324)
+/* GDMA_IN_STATE_CH4 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_STATE_CH4    0x00000007
+#define GDMA_IN_STATE_CH4_M  ((GDMA_IN_STATE_CH4_V)<<(GDMA_IN_STATE_CH4_S))
+#define GDMA_IN_STATE_CH4_V  0x7
+#define GDMA_IN_STATE_CH4_S  20
+/* GDMA_IN_DSCR_STATE_CH4 : RO ;bitpos:[19:18] ;default: 2'b0 ; */
+/*description: reserved.*/
+#define GDMA_IN_DSCR_STATE_CH4    0x00000003
+#define GDMA_IN_DSCR_STATE_CH4_M  ((GDMA_IN_DSCR_STATE_CH4_V)<<(GDMA_IN_DSCR_STATE_CH4_S))
+#define GDMA_IN_DSCR_STATE_CH4_V  0x3
+#define GDMA_IN_DSCR_STATE_CH4_S  18
+/* GDMA_INLINK_DSCR_ADDR_CH4 : RO ;bitpos:[17:0] ;default: 18'b0 ; */
+/*description: This register stores the current inlink descriptor's address..*/
+#define GDMA_INLINK_DSCR_ADDR_CH4    0x0003FFFF
+#define GDMA_INLINK_DSCR_ADDR_CH4_M  ((GDMA_INLINK_DSCR_ADDR_CH4_V)<<(GDMA_INLINK_DSCR_ADDR_CH4_S))
+#define GDMA_INLINK_DSCR_ADDR_CH4_V  0x3FFFF
+#define GDMA_INLINK_DSCR_ADDR_CH4_S  0
+
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH4_REG          (DR_REG_GDMA_BASE + 0x328)
+/* GDMA_IN_SUC_EOF_DES_ADDR_CH4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the inlink descriptor when the EOF bit in th
+is descriptor is 1..*/
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH4    0xFFFFFFFF
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH4_M  ((GDMA_IN_SUC_EOF_DES_ADDR_CH4_V)<<(GDMA_IN_SUC_EOF_DES_ADDR_CH4_S))
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH4_V  0xFFFFFFFF
+#define GDMA_IN_SUC_EOF_DES_ADDR_CH4_S  0
+
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH4_REG          (DR_REG_GDMA_BASE + 0x32C)
+/* GDMA_IN_ERR_EOF_DES_ADDR_CH4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the inlink descriptor when there are some er
+rors in current receiving data. Only used when peripheral is UHCI0..*/
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH4    0xFFFFFFFF
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH4_M  ((GDMA_IN_ERR_EOF_DES_ADDR_CH4_V)<<(GDMA_IN_ERR_EOF_DES_ADDR_CH4_S))
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH4_V  0xFFFFFFFF
+#define GDMA_IN_ERR_EOF_DES_ADDR_CH4_S  0
+
+#define GDMA_IN_DSCR_CH4_REG          (DR_REG_GDMA_BASE + 0x330)
+/* GDMA_INLINK_DSCR_CH4 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the current inlink descriptor x..*/
+#define GDMA_INLINK_DSCR_CH4    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_CH4_M  ((GDMA_INLINK_DSCR_CH4_V)<<(GDMA_INLINK_DSCR_CH4_S))
+#define GDMA_INLINK_DSCR_CH4_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_CH4_S  0
+
+#define GDMA_IN_DSCR_BF0_CH4_REG          (DR_REG_GDMA_BASE + 0x334)
+/* GDMA_INLINK_DSCR_BF0_CH4 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the last inlink descriptor x-1..*/
+#define GDMA_INLINK_DSCR_BF0_CH4    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF0_CH4_M  ((GDMA_INLINK_DSCR_BF0_CH4_V)<<(GDMA_INLINK_DSCR_BF0_CH4_S))
+#define GDMA_INLINK_DSCR_BF0_CH4_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF0_CH4_S  0
+
+#define GDMA_IN_DSCR_BF1_CH4_REG          (DR_REG_GDMA_BASE + 0x338)
+/* GDMA_INLINK_DSCR_BF1_CH4 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the second-to-last inlink descriptor x-2..*/
+#define GDMA_INLINK_DSCR_BF1_CH4    0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF1_CH4_M  ((GDMA_INLINK_DSCR_BF1_CH4_V)<<(GDMA_INLINK_DSCR_BF1_CH4_S))
+#define GDMA_INLINK_DSCR_BF1_CH4_V  0xFFFFFFFF
+#define GDMA_INLINK_DSCR_BF1_CH4_S  0
+
+#define GDMA_IN_WIGHT_CH4_REG          (DR_REG_GDMA_BASE + 0x33C)
+/* GDMA_RX_WEIGHT_CH4 : R/W ;bitpos:[11:8] ;default: 4'hf ; */
+/*description: The weight of Rx channel 4. .*/
+#define GDMA_RX_WEIGHT_CH4    0x0000000F
+#define GDMA_RX_WEIGHT_CH4_M  ((GDMA_RX_WEIGHT_CH4_V)<<(GDMA_RX_WEIGHT_CH4_S))
+#define GDMA_RX_WEIGHT_CH4_V  0xF
+#define GDMA_RX_WEIGHT_CH4_S  8
+
+#define GDMA_IN_PRI_CH4_REG          (DR_REG_GDMA_BASE + 0x344)
+/* GDMA_RX_PRI_CH4 : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: The priority of Rx channel 4. The larger of the value, the higher of the priorit
+y..*/
+#define GDMA_RX_PRI_CH4    0x0000000F
+#define GDMA_RX_PRI_CH4_M  ((GDMA_RX_PRI_CH4_V)<<(GDMA_RX_PRI_CH4_S))
+#define GDMA_RX_PRI_CH4_V  0xF
+#define GDMA_RX_PRI_CH4_S  0
+
+#define GDMA_IN_PERI_SEL_CH4_REG          (DR_REG_GDMA_BASE + 0x348)
+/* GDMA_PERI_IN_SEL_CH4 : R/W ;bitpos:[5:0] ;default: 6'h3f ; */
+/*description: This register is used to select peripheral for Rx channel 5. 0:SPI2. 1: SPI3. 2:
+ UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT..*/
+#define GDMA_PERI_IN_SEL_CH4    0x0000003F
+#define GDMA_PERI_IN_SEL_CH4_M  ((GDMA_PERI_IN_SEL_CH4_V)<<(GDMA_PERI_IN_SEL_CH4_S))
+#define GDMA_PERI_IN_SEL_CH4_V  0x3F
+#define GDMA_PERI_IN_SEL_CH4_S  0
+
+#define GDMA_OUT_CONF0_CH4_REG          (DR_REG_GDMA_BASE + 0x360)
+/* GDMA_OUT_DATA_BURST_EN_CH4 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Tx channel 4 transmitting da
+ta when accessing internal SRAM. .*/
+#define GDMA_OUT_DATA_BURST_EN_CH4    (BIT(5))
+#define GDMA_OUT_DATA_BURST_EN_CH4_M  (BIT(5))
+#define GDMA_OUT_DATA_BURST_EN_CH4_V  0x1
+#define GDMA_OUT_DATA_BURST_EN_CH4_S  5
+/* GDMA_OUTDSCR_BURST_EN_CH4 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to 1 to enable INCR burst transfer for Tx channel 4 reading link de
+scriptor when accessing internal SRAM. .*/
+#define GDMA_OUTDSCR_BURST_EN_CH4    (BIT(4))
+#define GDMA_OUTDSCR_BURST_EN_CH4_M  (BIT(4))
+#define GDMA_OUTDSCR_BURST_EN_CH4_V  0x1
+#define GDMA_OUTDSCR_BURST_EN_CH4_S  4
+/* GDMA_OUT_EOF_MODE_CH4 : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: EOF flag generation mode when transmitting data. 1: EOF flag for Tx channel 4 is
+ generated when data need to transmit has been popped from FIFO in DMA.*/
+#define GDMA_OUT_EOF_MODE_CH4    (BIT(3))
+#define GDMA_OUT_EOF_MODE_CH4_M  (BIT(3))
+#define GDMA_OUT_EOF_MODE_CH4_V  0x1
+#define GDMA_OUT_EOF_MODE_CH4_S  3
+/* GDMA_OUT_AUTO_WRBACK_CH4 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to enable automatic outlink-writeback when all the data in tx buffe
+r has been transmitted..*/
+#define GDMA_OUT_AUTO_WRBACK_CH4    (BIT(2))
+#define GDMA_OUT_AUTO_WRBACK_CH4_M  (BIT(2))
+#define GDMA_OUT_AUTO_WRBACK_CH4_V  0x1
+#define GDMA_OUT_AUTO_WRBACK_CH4_S  2
+/* GDMA_OUT_LOOP_TEST_CH4 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_LOOP_TEST_CH4    (BIT(1))
+#define GDMA_OUT_LOOP_TEST_CH4_M  (BIT(1))
+#define GDMA_OUT_LOOP_TEST_CH4_V  0x1
+#define GDMA_OUT_LOOP_TEST_CH4_S  1
+/* GDMA_OUT_RST_CH4 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to reset DMA channel 4 Tx FSM and Tx FIFO pointer..*/
+#define GDMA_OUT_RST_CH4    (BIT(0))
+#define GDMA_OUT_RST_CH4_M  (BIT(0))
+#define GDMA_OUT_RST_CH4_V  0x1
+#define GDMA_OUT_RST_CH4_S  0
+
+#define GDMA_OUT_CONF1_CH4_REG          (DR_REG_GDMA_BASE + 0x364)
+/* GDMA_OUT_EXT_MEM_BK_SIZE_CH4 : R/W ;bitpos:[14:13] ;default: 2'b0 ; */
+/*description: Block size of Tx channel 4 when DMA access external SRAM. 0: 16 bytes      1: 32
+ bytes    2/3:reserved.*/
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH4    0x00000003
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH4_M  ((GDMA_OUT_EXT_MEM_BK_SIZE_CH4_V)<<(GDMA_OUT_EXT_MEM_BK_SIZE_CH4_S))
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH4_V  0x3
+#define GDMA_OUT_EXT_MEM_BK_SIZE_CH4_S  13
+/* GDMA_OUT_CHECK_OWNER_CH4 : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to enable checking the owner attribute of the link descriptor..*/
+#define GDMA_OUT_CHECK_OWNER_CH4    (BIT(12))
+#define GDMA_OUT_CHECK_OWNER_CH4_M  (BIT(12))
+#define GDMA_OUT_CHECK_OWNER_CH4_V  0x1
+#define GDMA_OUT_CHECK_OWNER_CH4_S  12
+
+#define GDMA_OUT_INT_RAW_CH4_REG          (DR_REG_GDMA_BASE + 0x368)
+/* GDMA_OUTFIFO_UDF_L3_CH4_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Tx channel 4 is
+underflow. .*/
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_RAW    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_RAW_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_RAW_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH4_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 3 fifo of Tx channel 4 is
+overflow. .*/
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_RAW    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_RAW_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_RAW_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH4_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Tx channel 4 is
+underflow. .*/
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_RAW    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_RAW_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_RAW_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH4_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: This raw interrupt bit turns to high level when level 1 fifo of Tx channel 4 is
+overflow. .*/
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_RAW    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_RAW_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_RAW_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_RAW_S  4
+/* GDMA_OUT_TOTAL_EOF_CH4_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when data corresponding a outlink (inc
+ludes one link descriptor or few link descriptors) is transmitted out for Tx cha
+nnel 4..*/
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_RAW    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_RAW_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_RAW_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_RAW_S  3
+/* GDMA_OUT_DSCR_ERR_CH4_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when detecting outlink descriptor erro
+r, including owner error, the second and third word error of outlink descriptor
+for Tx channel 4..*/
+#define GDMA_OUT_DSCR_ERR_CH4_INT_RAW    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH4_INT_RAW_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH4_INT_RAW_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH4_INT_RAW_S  2
+/* GDMA_OUT_EOF_CH4_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one outl
+ink descriptor has been read from memory for Tx channel 4. .*/
+#define GDMA_OUT_EOF_CH4_INT_RAW    (BIT(1))
+#define GDMA_OUT_EOF_CH4_INT_RAW_M  (BIT(1))
+#define GDMA_OUT_EOF_CH4_INT_RAW_V  0x1
+#define GDMA_OUT_EOF_CH4_INT_RAW_S  1
+/* GDMA_OUT_DONE_CH4_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when the last data pointed by one outl
+ink descriptor has been transmitted to peripherals for Tx channel 4..*/
+#define GDMA_OUT_DONE_CH4_INT_RAW    (BIT(0))
+#define GDMA_OUT_DONE_CH4_INT_RAW_M  (BIT(0))
+#define GDMA_OUT_DONE_CH4_INT_RAW_V  0x1
+#define GDMA_OUT_DONE_CH4_INT_RAW_S  0
+
+#define GDMA_OUT_INT_ST_CH4_REG          (DR_REG_GDMA_BASE + 0x36C)
+/* GDMA_OUTFIFO_UDF_L3_CH4_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_ST    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_ST_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_ST_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_ST_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH4_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_ST    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_ST_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_ST_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_ST_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH4_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_ST    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_ST_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_ST_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_ST_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH4_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_ST    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_ST_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_ST_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_ST_S  4
+/* GDMA_OUT_TOTAL_EOF_CH4_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_ST    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_ST_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_ST_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_ST_S  3
+/* GDMA_OUT_DSCR_ERR_CH4_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH4_INT_ST    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH4_INT_ST_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH4_INT_ST_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH4_INT_ST_S  2
+/* GDMA_OUT_EOF_CH4_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH4_INT_ST    (BIT(1))
+#define GDMA_OUT_EOF_CH4_INT_ST_M  (BIT(1))
+#define GDMA_OUT_EOF_CH4_INT_ST_V  0x1
+#define GDMA_OUT_EOF_CH4_INT_ST_S  1
+/* GDMA_OUT_DONE_CH4_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH4_INT_ST    (BIT(0))
+#define GDMA_OUT_DONE_CH4_INT_ST_M  (BIT(0))
+#define GDMA_OUT_DONE_CH4_INT_ST_V  0x1
+#define GDMA_OUT_DONE_CH4_INT_ST_S  0
+
+#define GDMA_OUT_INT_ENA_CH4_REG          (DR_REG_GDMA_BASE + 0x370)
+/* GDMA_OUTFIFO_UDF_L3_CH4_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_ENA    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_ENA_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_ENA_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH4_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_ENA    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_ENA_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_ENA_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH4_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_ENA    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_ENA_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_ENA_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH4_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_ENA    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_ENA_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_ENA_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_ENA_S  4
+/* GDMA_OUT_TOTAL_EOF_CH4_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_ENA    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_ENA_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_ENA_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_ENA_S  3
+/* GDMA_OUT_DSCR_ERR_CH4_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH4_INT_ENA    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH4_INT_ENA_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH4_INT_ENA_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH4_INT_ENA_S  2
+/* GDMA_OUT_EOF_CH4_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH4_INT_ENA    (BIT(1))
+#define GDMA_OUT_EOF_CH4_INT_ENA_M  (BIT(1))
+#define GDMA_OUT_EOF_CH4_INT_ENA_V  0x1
+#define GDMA_OUT_EOF_CH4_INT_ENA_S  1
+/* GDMA_OUT_DONE_CH4_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH4_INT_ENA    (BIT(0))
+#define GDMA_OUT_DONE_CH4_INT_ENA_M  (BIT(0))
+#define GDMA_OUT_DONE_CH4_INT_ENA_V  0x1
+#define GDMA_OUT_DONE_CH4_INT_ENA_S  0
+
+#define GDMA_OUT_INT_CLR_CH4_REG          (DR_REG_GDMA_BASE + 0x374)
+/* GDMA_OUTFIFO_UDF_L3_CH4_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_UDF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_CLR    (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_CLR_M  (BIT(7))
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_UDF_L3_CH4_INT_CLR_S  7
+/* GDMA_OUTFIFO_OVF_L3_CH4_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_OVF_L3_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_CLR    (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_CLR_M  (BIT(6))
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_OVF_L3_CH4_INT_CLR_S  6
+/* GDMA_OUTFIFO_UDF_L1_CH4_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_UDF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_CLR    (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_CLR_M  (BIT(5))
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_UDF_L1_CH4_INT_CLR_S  5
+/* GDMA_OUTFIFO_OVF_L1_CH4_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUTFIFO_OVF_L1_CH_INT interrupt..*/
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_CLR    (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_CLR_M  (BIT(4))
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_CLR_V  0x1
+#define GDMA_OUTFIFO_OVF_L1_CH4_INT_CLR_S  4
+/* GDMA_OUT_TOTAL_EOF_CH4_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_TOTAL_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_CLR    (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_CLR_M  (BIT(3))
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_CLR_V  0x1
+#define GDMA_OUT_TOTAL_EOF_CH4_INT_CLR_S  3
+/* GDMA_OUT_DSCR_ERR_CH4_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_DSCR_ERR_CH_INT interrupt..*/
+#define GDMA_OUT_DSCR_ERR_CH4_INT_CLR    (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH4_INT_CLR_M  (BIT(2))
+#define GDMA_OUT_DSCR_ERR_CH4_INT_CLR_V  0x1
+#define GDMA_OUT_DSCR_ERR_CH4_INT_CLR_S  2
+/* GDMA_OUT_EOF_CH4_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_EOF_CH_INT interrupt..*/
+#define GDMA_OUT_EOF_CH4_INT_CLR    (BIT(1))
+#define GDMA_OUT_EOF_CH4_INT_CLR_M  (BIT(1))
+#define GDMA_OUT_EOF_CH4_INT_CLR_V  0x1
+#define GDMA_OUT_EOF_CH4_INT_CLR_S  1
+/* GDMA_OUT_DONE_CH4_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the OUT_DONE_CH_INT interrupt..*/
+#define GDMA_OUT_DONE_CH4_INT_CLR    (BIT(0))
+#define GDMA_OUT_DONE_CH4_INT_CLR_M  (BIT(0))
+#define GDMA_OUT_DONE_CH4_INT_CLR_V  0x1
+#define GDMA_OUT_DONE_CH4_INT_CLR_S  0
+
+#define GDMA_OUTFIFO_STATUS_CH4_REG          (DR_REG_GDMA_BASE + 0x378)
+/* GDMA_OUT_REMAIN_UNDER_4B_L3_CH4 : RO ;bitpos:[26] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH4    (BIT(26))
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH4_M  (BIT(26))
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH4_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_4B_L3_CH4_S  26
+/* GDMA_OUT_REMAIN_UNDER_3B_L3_CH4 : RO ;bitpos:[25] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH4    (BIT(25))
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH4_M  (BIT(25))
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH4_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_3B_L3_CH4_S  25
+/* GDMA_OUT_REMAIN_UNDER_2B_L3_CH4 : RO ;bitpos:[24] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH4    (BIT(24))
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH4_M  (BIT(24))
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH4_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_2B_L3_CH4_S  24
+/* GDMA_OUT_REMAIN_UNDER_1B_L3_CH4 : RO ;bitpos:[23] ;default: 1'b1 ; */
+/*description: reserved.*/
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH4    (BIT(23))
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH4_M  (BIT(23))
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH4_V  0x1
+#define GDMA_OUT_REMAIN_UNDER_1B_L3_CH4_S  23
+/* GDMA_OUTFIFO_CNT_L3_CH4 : RO ;bitpos:[22:18] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L3 Tx FIFO for Tx channel 4..*/
+#define GDMA_OUTFIFO_CNT_L3_CH4    0x0000001F
+#define GDMA_OUTFIFO_CNT_L3_CH4_M  ((GDMA_OUTFIFO_CNT_L3_CH4_V)<<(GDMA_OUTFIFO_CNT_L3_CH4_S))
+#define GDMA_OUTFIFO_CNT_L3_CH4_V  0x1F
+#define GDMA_OUTFIFO_CNT_L3_CH4_S  18
+/* GDMA_OUTFIFO_CNT_L2_CH4 : RO ;bitpos:[17:11] ;default: 7'b0 ; */
+/*description: The register stores the byte number of the data in L2 Tx FIFO for Tx channel 4..*/
+#define GDMA_OUTFIFO_CNT_L2_CH4    0x0000007F
+#define GDMA_OUTFIFO_CNT_L2_CH4_M  ((GDMA_OUTFIFO_CNT_L2_CH4_V)<<(GDMA_OUTFIFO_CNT_L2_CH4_S))
+#define GDMA_OUTFIFO_CNT_L2_CH4_V  0x7F
+#define GDMA_OUTFIFO_CNT_L2_CH4_S  11
+/* GDMA_OUTFIFO_CNT_L1_CH4 : RO ;bitpos:[10:6] ;default: 5'b0 ; */
+/*description: The register stores the byte number of the data in L1 Tx FIFO for Tx channel 4..*/
+#define GDMA_OUTFIFO_CNT_L1_CH4    0x0000001F
+#define GDMA_OUTFIFO_CNT_L1_CH4_M  ((GDMA_OUTFIFO_CNT_L1_CH4_V)<<(GDMA_OUTFIFO_CNT_L1_CH4_S))
+#define GDMA_OUTFIFO_CNT_L1_CH4_V  0x1F
+#define GDMA_OUTFIFO_CNT_L1_CH4_S  6
+/* GDMA_OUTFIFO_EMPTY_L3_CH4 : RO ;bitpos:[5] ;default: 1'b1 ; */
+/*description: L3 Tx FIFO empty signal for Tx channel 4..*/
+#define GDMA_OUTFIFO_EMPTY_L3_CH4    (BIT(5))
+#define GDMA_OUTFIFO_EMPTY_L3_CH4_M  (BIT(5))
+#define GDMA_OUTFIFO_EMPTY_L3_CH4_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L3_CH4_S  5
+/* GDMA_OUTFIFO_FULL_L3_CH4 : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: L3 Tx FIFO full signal for Tx channel 4..*/
+#define GDMA_OUTFIFO_FULL_L3_CH4    (BIT(4))
+#define GDMA_OUTFIFO_FULL_L3_CH4_M  (BIT(4))
+#define GDMA_OUTFIFO_FULL_L3_CH4_V  0x1
+#define GDMA_OUTFIFO_FULL_L3_CH4_S  4
+/* GDMA_OUTFIFO_EMPTY_L2_CH4 : RO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: L2 Tx FIFO empty signal for Tx channel 4..*/
+#define GDMA_OUTFIFO_EMPTY_L2_CH4    (BIT(3))
+#define GDMA_OUTFIFO_EMPTY_L2_CH4_M  (BIT(3))
+#define GDMA_OUTFIFO_EMPTY_L2_CH4_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L2_CH4_S  3
+/* GDMA_OUTFIFO_FULL_L2_CH4 : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: L2 Tx FIFO full signal for Tx channel 4..*/
+#define GDMA_OUTFIFO_FULL_L2_CH4    (BIT(2))
+#define GDMA_OUTFIFO_FULL_L2_CH4_M  (BIT(2))
+#define GDMA_OUTFIFO_FULL_L2_CH4_V  0x1
+#define GDMA_OUTFIFO_FULL_L2_CH4_S  2
+/* GDMA_OUTFIFO_EMPTY_L1_CH4 : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: L1 Tx FIFO empty signal for Tx channel 4..*/
+#define GDMA_OUTFIFO_EMPTY_L1_CH4    (BIT(1))
+#define GDMA_OUTFIFO_EMPTY_L1_CH4_M  (BIT(1))
+#define GDMA_OUTFIFO_EMPTY_L1_CH4_V  0x1
+#define GDMA_OUTFIFO_EMPTY_L1_CH4_S  1
+/* GDMA_OUTFIFO_FULL_L1_CH4 : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: L1 Tx FIFO full signal for Tx channel 4..*/
+#define GDMA_OUTFIFO_FULL_L1_CH4    (BIT(0))
+#define GDMA_OUTFIFO_FULL_L1_CH4_M  (BIT(0))
+#define GDMA_OUTFIFO_FULL_L1_CH4_V  0x1
+#define GDMA_OUTFIFO_FULL_L1_CH4_S  0
+
+#define GDMA_OUT_PUSH_CH4_REG          (DR_REG_GDMA_BASE + 0x37C)
+/* GDMA_OUTFIFO_PUSH_CH4 : R/W/SC ;bitpos:[9] ;default: 1'h0 ; */
+/*description: Set this bit to push data into DMA FIFO..*/
+#define GDMA_OUTFIFO_PUSH_CH4    (BIT(9))
+#define GDMA_OUTFIFO_PUSH_CH4_M  (BIT(9))
+#define GDMA_OUTFIFO_PUSH_CH4_V  0x1
+#define GDMA_OUTFIFO_PUSH_CH4_S  9
+/* GDMA_OUTFIFO_WDATA_CH4 : R/W ;bitpos:[8:0] ;default: 9'h0 ; */
+/*description: This register stores the data that need to be pushed into DMA FIFO..*/
+#define GDMA_OUTFIFO_WDATA_CH4    0x000001FF
+#define GDMA_OUTFIFO_WDATA_CH4_M  ((GDMA_OUTFIFO_WDATA_CH4_V)<<(GDMA_OUTFIFO_WDATA_CH4_S))
+#define GDMA_OUTFIFO_WDATA_CH4_V  0x1FF
+#define GDMA_OUTFIFO_WDATA_CH4_S  0
+
+#define GDMA_OUT_LINK_CH4_REG          (DR_REG_GDMA_BASE + 0x380)
+/* GDMA_OUTLINK_PARK_CH4 : RO ;bitpos:[23] ;default: 1'h1 ; */
+/*description: 1: the outlink descriptor's FSM is in idle state.  0: the outlink descriptor's F
+SM is working..*/
+#define GDMA_OUTLINK_PARK_CH4    (BIT(23))
+#define GDMA_OUTLINK_PARK_CH4_M  (BIT(23))
+#define GDMA_OUTLINK_PARK_CH4_V  0x1
+#define GDMA_OUTLINK_PARK_CH4_S  23
+/* GDMA_OUTLINK_RESTART_CH4 : R/W/SC ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Set this bit to restart a new outlink from the last address. .*/
+#define GDMA_OUTLINK_RESTART_CH4    (BIT(22))
+#define GDMA_OUTLINK_RESTART_CH4_M  (BIT(22))
+#define GDMA_OUTLINK_RESTART_CH4_V  0x1
+#define GDMA_OUTLINK_RESTART_CH4_S  22
+/* GDMA_OUTLINK_START_CH4 : R/W/SC ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set this bit to start dealing with the outlink descriptors..*/
+#define GDMA_OUTLINK_START_CH4    (BIT(21))
+#define GDMA_OUTLINK_START_CH4_M  (BIT(21))
+#define GDMA_OUTLINK_START_CH4_V  0x1
+#define GDMA_OUTLINK_START_CH4_S  21
+/* GDMA_OUTLINK_STOP_CH4 : R/W/SC ;bitpos:[20] ;default: 1'b0 ; */
+/*description: Set this bit to stop dealing with the outlink descriptors..*/
+#define GDMA_OUTLINK_STOP_CH4    (BIT(20))
+#define GDMA_OUTLINK_STOP_CH4_M  (BIT(20))
+#define GDMA_OUTLINK_STOP_CH4_V  0x1
+#define GDMA_OUTLINK_STOP_CH4_S  20
+/* GDMA_OUTLINK_ADDR_CH4 : R/W ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: This register stores the 20 least significant bits of the first outlink descript
+or's address..*/
+#define GDMA_OUTLINK_ADDR_CH4    0x000FFFFF
+#define GDMA_OUTLINK_ADDR_CH4_M  ((GDMA_OUTLINK_ADDR_CH4_V)<<(GDMA_OUTLINK_ADDR_CH4_S))
+#define GDMA_OUTLINK_ADDR_CH4_V  0xFFFFF
+#define GDMA_OUTLINK_ADDR_CH4_S  0
+
+#define GDMA_OUT_STATE_CH4_REG          (DR_REG_GDMA_BASE + 0x384)
+/* GDMA_OUT_STATE_CH4 : RO ;bitpos:[22:20] ;default: 3'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_STATE_CH4    0x00000007
+#define GDMA_OUT_STATE_CH4_M  ((GDMA_OUT_STATE_CH4_V)<<(GDMA_OUT_STATE_CH4_S))
+#define GDMA_OUT_STATE_CH4_V  0x7
+#define GDMA_OUT_STATE_CH4_S  20
+/* GDMA_OUT_DSCR_STATE_CH4 : RO ;bitpos:[19:18] ;default: 2'b0 ; */
+/*description: reserved.*/
+#define GDMA_OUT_DSCR_STATE_CH4    0x00000003
+#define GDMA_OUT_DSCR_STATE_CH4_M  ((GDMA_OUT_DSCR_STATE_CH4_V)<<(GDMA_OUT_DSCR_STATE_CH4_S))
+#define GDMA_OUT_DSCR_STATE_CH4_V  0x3
+#define GDMA_OUT_DSCR_STATE_CH4_S  18
+/* GDMA_OUTLINK_DSCR_ADDR_CH4 : RO ;bitpos:[17:0] ;default: 18'b0 ; */
+/*description: This register stores the current outlink descriptor's address..*/
+#define GDMA_OUTLINK_DSCR_ADDR_CH4    0x0003FFFF
+#define GDMA_OUTLINK_DSCR_ADDR_CH4_M  ((GDMA_OUTLINK_DSCR_ADDR_CH4_V)<<(GDMA_OUTLINK_DSCR_ADDR_CH4_S))
+#define GDMA_OUTLINK_DSCR_ADDR_CH4_V  0x3FFFF
+#define GDMA_OUTLINK_DSCR_ADDR_CH4_S  0
+
+#define GDMA_OUT_EOF_DES_ADDR_CH4_REG          (DR_REG_GDMA_BASE + 0x388)
+/* GDMA_OUT_EOF_DES_ADDR_CH4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the outlink descriptor when the EOF bit in t
+his descriptor is 1..*/
+#define GDMA_OUT_EOF_DES_ADDR_CH4    0xFFFFFFFF
+#define GDMA_OUT_EOF_DES_ADDR_CH4_M  ((GDMA_OUT_EOF_DES_ADDR_CH4_V)<<(GDMA_OUT_EOF_DES_ADDR_CH4_S))
+#define GDMA_OUT_EOF_DES_ADDR_CH4_V  0xFFFFFFFF
+#define GDMA_OUT_EOF_DES_ADDR_CH4_S  0
+
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH4_REG          (DR_REG_GDMA_BASE + 0x38C)
+/* GDMA_OUT_EOF_BFR_DES_ADDR_CH4 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: This register stores the address of the outlink descriptor before the last outli
+nk descriptor..*/
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH4    0xFFFFFFFF
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH4_M  ((GDMA_OUT_EOF_BFR_DES_ADDR_CH4_V)<<(GDMA_OUT_EOF_BFR_DES_ADDR_CH4_S))
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH4_V  0xFFFFFFFF
+#define GDMA_OUT_EOF_BFR_DES_ADDR_CH4_S  0
+
+#define GDMA_OUT_DSCR_CH4_REG          (DR_REG_GDMA_BASE + 0x390)
+/* GDMA_OUTLINK_DSCR_CH4 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the current outlink descriptor y..*/
+#define GDMA_OUTLINK_DSCR_CH4    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_CH4_M  ((GDMA_OUTLINK_DSCR_CH4_V)<<(GDMA_OUTLINK_DSCR_CH4_S))
+#define GDMA_OUTLINK_DSCR_CH4_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_CH4_S  0
+
+#define GDMA_OUT_DSCR_BF0_CH4_REG          (DR_REG_GDMA_BASE + 0x394)
+/* GDMA_OUTLINK_DSCR_BF0_CH4 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the last outlink descriptor y-1..*/
+#define GDMA_OUTLINK_DSCR_BF0_CH4    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF0_CH4_M  ((GDMA_OUTLINK_DSCR_BF0_CH4_V)<<(GDMA_OUTLINK_DSCR_BF0_CH4_S))
+#define GDMA_OUTLINK_DSCR_BF0_CH4_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF0_CH4_S  0
+
+#define GDMA_OUT_DSCR_BF1_CH4_REG          (DR_REG_GDMA_BASE + 0x398)
+/* GDMA_OUTLINK_DSCR_BF1_CH4 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The address of the second-to-last inlink descriptor x-2..*/
+#define GDMA_OUTLINK_DSCR_BF1_CH4    0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF1_CH4_M  ((GDMA_OUTLINK_DSCR_BF1_CH4_V)<<(GDMA_OUTLINK_DSCR_BF1_CH4_S))
+#define GDMA_OUTLINK_DSCR_BF1_CH4_V  0xFFFFFFFF
+#define GDMA_OUTLINK_DSCR_BF1_CH4_S  0
+
+#define GDMA_OUT_WIGHT_CH4_REG          (DR_REG_GDMA_BASE + 0x39C)
+/* GDMA_TX_WEIGHT_CH4 : R/W ;bitpos:[11:8] ;default: 4'hf ; */
+/*description: The weight of Tx channel 4. .*/
+#define GDMA_TX_WEIGHT_CH4    0x0000000F
+#define GDMA_TX_WEIGHT_CH4_M  ((GDMA_TX_WEIGHT_CH4_V)<<(GDMA_TX_WEIGHT_CH4_S))
+#define GDMA_TX_WEIGHT_CH4_V  0xF
+#define GDMA_TX_WEIGHT_CH4_S  8
+
+#define GDMA_OUT_PRI_CH4_REG          (DR_REG_GDMA_BASE + 0x3A4)
+/* GDMA_TX_PRI_CH4 : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: The priority of Tx channel 4. The larger of the value, the higher of the priorit
+y..*/
+#define GDMA_TX_PRI_CH4    0x0000000F
+#define GDMA_TX_PRI_CH4_M  ((GDMA_TX_PRI_CH4_V)<<(GDMA_TX_PRI_CH4_S))
+#define GDMA_TX_PRI_CH4_V  0xF
+#define GDMA_TX_PRI_CH4_S  0
+
+#define GDMA_OUT_PERI_SEL_CH4_REG          (DR_REG_GDMA_BASE + 0x3A8)
+/* GDMA_PERI_OUT_SEL_CH4 : R/W ;bitpos:[5:0] ;default: 6'h3f ; */
+/*description: This register is used to select peripheral for Tx channel 4. 0:SPI2. 1: SPI3. 2:
+ UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.; 7: AE
+S. 8: SHA. 9: ADC_DAC..*/
+#define GDMA_PERI_OUT_SEL_CH4    0x0000003F
+#define GDMA_PERI_OUT_SEL_CH4_M  ((GDMA_PERI_OUT_SEL_CH4_V)<<(GDMA_PERI_OUT_SEL_CH4_S))
+#define GDMA_PERI_OUT_SEL_CH4_V  0x3F
+#define GDMA_PERI_OUT_SEL_CH4_S  0
+
+#define GDMA_AHB_TEST_REG          (DR_REG_GDMA_BASE + 0x3C0)
+/* GDMA_AHB_TESTADDR : R/W ;bitpos:[5:4] ;default: 2'b0 ; */
+/*description: reserved.*/
+#define GDMA_AHB_TESTADDR    0x00000003
+#define GDMA_AHB_TESTADDR_M  ((GDMA_AHB_TESTADDR_V)<<(GDMA_AHB_TESTADDR_S))
+#define GDMA_AHB_TESTADDR_V  0x3
+#define GDMA_AHB_TESTADDR_S  4
+/* GDMA_AHB_TESTMODE : R/W ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: reserved.*/
+#define GDMA_AHB_TESTMODE    0x00000007
+#define GDMA_AHB_TESTMODE_M  ((GDMA_AHB_TESTMODE_V)<<(GDMA_AHB_TESTMODE_S))
+#define GDMA_AHB_TESTMODE_V  0x7
+#define GDMA_AHB_TESTMODE_S  0
+
+#define GDMA_PD_CONF_REG          (DR_REG_GDMA_BASE + 0x3C4)
+/* GDMA_DMA_RAM_CLK_FO : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: 1: Force to open the clock and bypass the gate-clock when accessing the RAM in D
+MA. 0: A gate-clock will be used when accessing the RAM in DMA..*/
+#define GDMA_DMA_RAM_CLK_FO    (BIT(6))
+#define GDMA_DMA_RAM_CLK_FO_M  (BIT(6))
+#define GDMA_DMA_RAM_CLK_FO_V  0x1
+#define GDMA_DMA_RAM_CLK_FO_S  6
+/* GDMA_DMA_RAM_FORCE_PU : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/*description: .*/
+#define GDMA_DMA_RAM_FORCE_PU    (BIT(5))
+#define GDMA_DMA_RAM_FORCE_PU_M  (BIT(5))
+#define GDMA_DMA_RAM_FORCE_PU_V  0x1
+#define GDMA_DMA_RAM_FORCE_PU_S  5
+/* GDMA_DMA_RAM_FORCE_PD : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: power down.*/
+#define GDMA_DMA_RAM_FORCE_PD    (BIT(4))
+#define GDMA_DMA_RAM_FORCE_PD_M  (BIT(4))
+#define GDMA_DMA_RAM_FORCE_PD_V  0x1
+#define GDMA_DMA_RAM_FORCE_PD_S  4
+
+#define GDMA_MISC_CONF_REG          (DR_REG_GDMA_BASE + 0x3C8)
+/* GDMA_CLK_EN : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define GDMA_CLK_EN    (BIT(4))
+#define GDMA_CLK_EN_M  (BIT(4))
+#define GDMA_CLK_EN_V  0x1
+#define GDMA_CLK_EN_S  4
+/* GDMA_ARB_PRI_DIS : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to disable priority arbitration function..*/
+#define GDMA_ARB_PRI_DIS    (BIT(2))
+#define GDMA_ARB_PRI_DIS_M  (BIT(2))
+#define GDMA_ARB_PRI_DIS_V  0x1
+#define GDMA_ARB_PRI_DIS_S  2
+/* GDMA_AHBM_RST_EXTER : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit, then clear this bit to reset the external ahb FSM..*/
+#define GDMA_AHBM_RST_EXTER    (BIT(1))
+#define GDMA_AHBM_RST_EXTER_M  (BIT(1))
+#define GDMA_AHBM_RST_EXTER_V  0x1
+#define GDMA_AHBM_RST_EXTER_S  1
+/* GDMA_AHBM_RST_INTER : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit, then clear this bit to reset the internal ahb FSM..*/
+#define GDMA_AHBM_RST_INTER    (BIT(0))
+#define GDMA_AHBM_RST_INTER_M  (BIT(0))
+#define GDMA_AHBM_RST_INTER_V  0x1
+#define GDMA_AHBM_RST_INTER_S  0
+
+#define GDMA_IN_SRAM_SIZE_CH0_REG          (DR_REG_GDMA_BASE + 0x3CC)
+/* GDMA_IN_SIZE_CH0 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/*description: This register is used to configure the size of L2 Tx FIFO for Rx channel 0. 0:16
+ bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 byte
+s. 7: 72 bytes. 8: 80 bytes..*/
+#define GDMA_IN_SIZE_CH0    0x0000007F
+#define GDMA_IN_SIZE_CH0_M  ((GDMA_IN_SIZE_CH0_V)<<(GDMA_IN_SIZE_CH0_S))
+#define GDMA_IN_SIZE_CH0_V  0x7F
+#define GDMA_IN_SIZE_CH0_S  0
+
+#define GDMA_OUT_SRAM_SIZE_CH0_REG          (DR_REG_GDMA_BASE + 0x3D0)
+/* GDMA_OUT_SIZE_CH0 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/*description: This register is used to configure the size of L2 Tx FIFO for Tx channel 0. 0:16
+ bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 byte
+s. 7: 72 bytes. 8: 80 bytes..*/
+#define GDMA_OUT_SIZE_CH0    0x0000007F
+#define GDMA_OUT_SIZE_CH0_M  ((GDMA_OUT_SIZE_CH0_V)<<(GDMA_OUT_SIZE_CH0_S))
+#define GDMA_OUT_SIZE_CH0_V  0x7F
+#define GDMA_OUT_SIZE_CH0_S  0
+
+#define GDMA_IN_SRAM_SIZE_CH1_REG          (DR_REG_GDMA_BASE + 0x3D4)
+/* GDMA_IN_SIZE_CH1 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/*description: This register is used to configure the size of L2 Tx FIFO for Rx channel 1. 0:16
+ bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 byte
+s. 7: 72 bytes. 8: 80 bytes..*/
+#define GDMA_IN_SIZE_CH1    0x0000007F
+#define GDMA_IN_SIZE_CH1_M  ((GDMA_IN_SIZE_CH1_V)<<(GDMA_IN_SIZE_CH1_S))
+#define GDMA_IN_SIZE_CH1_V  0x7F
+#define GDMA_IN_SIZE_CH1_S  0
+
+#define GDMA_OUT_SRAM_SIZE_CH1_REG          (DR_REG_GDMA_BASE + 0x3D8)
+/* GDMA_OUT_SIZE_CH1 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/*description: This register is used to configure the size of L2 Tx FIFO for Tx channel 1. 0:16
+ bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 byte
+s. 7: 72 bytes. 8: 80 bytes..*/
+#define GDMA_OUT_SIZE_CH1    0x0000007F
+#define GDMA_OUT_SIZE_CH1_M  ((GDMA_OUT_SIZE_CH1_V)<<(GDMA_OUT_SIZE_CH1_S))
+#define GDMA_OUT_SIZE_CH1_V  0x7F
+#define GDMA_OUT_SIZE_CH1_S  0
+
+#define GDMA_IN_SRAM_SIZE_CH2_REG          (DR_REG_GDMA_BASE + 0x3DC)
+/* GDMA_IN_SIZE_CH2 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/*description: This register is used to configure the size of L2 Tx FIFO for Rx channel 2. 0:16
+ bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 byte
+s. 7: 72 bytes. 8: 80 bytes..*/
+#define GDMA_IN_SIZE_CH2    0x0000007F
+#define GDMA_IN_SIZE_CH2_M  ((GDMA_IN_SIZE_CH2_V)<<(GDMA_IN_SIZE_CH2_S))
+#define GDMA_IN_SIZE_CH2_V  0x7F
+#define GDMA_IN_SIZE_CH2_S  0
+
+#define GDMA_OUT_SRAM_SIZE_CH2_REG          (DR_REG_GDMA_BASE + 0x3E0)
+/* GDMA_OUT_SIZE_CH2 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/*description: This register is used to configure the size of L2 Tx FIFO for Tx channel 2. 0:16
+ bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 byte
+s. 7: 72 bytes. 8: 80 bytes..*/
+#define GDMA_OUT_SIZE_CH2    0x0000007F
+#define GDMA_OUT_SIZE_CH2_M  ((GDMA_OUT_SIZE_CH2_V)<<(GDMA_OUT_SIZE_CH2_S))
+#define GDMA_OUT_SIZE_CH2_V  0x7F
+#define GDMA_OUT_SIZE_CH2_S  0
+
+#define GDMA_IN_SRAM_SIZE_CH3_REG          (DR_REG_GDMA_BASE + 0x3E4)
+/* GDMA_IN_SIZE_CH3 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/*description: This register is used to configure the size of L2 Tx FIFO for Rx channel 3. 0:16
+ bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 byte
+s. 7: 72 bytes. 8: 80 bytes..*/
+#define GDMA_IN_SIZE_CH3    0x0000007F
+#define GDMA_IN_SIZE_CH3_M  ((GDMA_IN_SIZE_CH3_V)<<(GDMA_IN_SIZE_CH3_S))
+#define GDMA_IN_SIZE_CH3_V  0x7F
+#define GDMA_IN_SIZE_CH3_S  0
+
+#define GDMA_OUT_SRAM_SIZE_CH3_REG          (DR_REG_GDMA_BASE + 0x3E8)
+/* GDMA_OUT_SIZE_CH3 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/*description: This register is used to configure the size of L2 Tx FIFO for Tx channel 3. 0:16
+ bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 byte
+s. 7: 72 bytes. 8: 80 bytes..*/
+#define GDMA_OUT_SIZE_CH3    0x0000007F
+#define GDMA_OUT_SIZE_CH3_M  ((GDMA_OUT_SIZE_CH3_V)<<(GDMA_OUT_SIZE_CH3_S))
+#define GDMA_OUT_SIZE_CH3_V  0x7F
+#define GDMA_OUT_SIZE_CH3_S  0
+
+#define GDMA_IN_SRAM_SIZE_CH4_REG          (DR_REG_GDMA_BASE + 0x3EC)
+/* GDMA_IN_SIZE_CH4 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/*description: This register is used to configure the size of L2 Tx FIFO for Rx channel 4. 0:16
+ bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 byte
+s. 7: 72 bytes. 8: 80 bytes..*/
+#define GDMA_IN_SIZE_CH4    0x0000007F
+#define GDMA_IN_SIZE_CH4_M  ((GDMA_IN_SIZE_CH4_V)<<(GDMA_IN_SIZE_CH4_S))
+#define GDMA_IN_SIZE_CH4_V  0x7F
+#define GDMA_IN_SIZE_CH4_S  0
+
+#define GDMA_OUT_SRAM_SIZE_CH4_REG          (DR_REG_GDMA_BASE + 0x3F0)
+/* GDMA_OUT_SIZE_CH4 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/*description: This register is used to configure the size of L2 Tx FIFO for Tx channel 4. 0:16
+ bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 byte
+s. 7: 72 bytes. 8: 80 bytes..*/
+#define GDMA_OUT_SIZE_CH4    0x0000007F
+#define GDMA_OUT_SIZE_CH4_M  ((GDMA_OUT_SIZE_CH4_V)<<(GDMA_OUT_SIZE_CH4_S))
+#define GDMA_OUT_SIZE_CH4_V  0x7F
+#define GDMA_OUT_SIZE_CH4_S  0
+
+#define GDMA_EXTMEM_REJECT_ADDR_REG          (DR_REG_GDMA_BASE + 0x3F4)
+/* GDMA_EXTMEM_REJECT_ADDR : RO ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: This register store the first address rejected by permission control when access
+ing external RAM..*/
+#define GDMA_EXTMEM_REJECT_ADDR    0xFFFFFFFF
+#define GDMA_EXTMEM_REJECT_ADDR_M  ((GDMA_EXTMEM_REJECT_ADDR_V)<<(GDMA_EXTMEM_REJECT_ADDR_S))
+#define GDMA_EXTMEM_REJECT_ADDR_V  0xFFFFFFFF
+#define GDMA_EXTMEM_REJECT_ADDR_S  0
+
+#define GDMA_EXTMEM_REJECT_ST_REG          (DR_REG_GDMA_BASE + 0x3F8)
+/* GDMA_EXTMEM_REJECT_PERI_NUM : RO ;bitpos:[11:6] ;default: 6'b0 ; */
+/*description: This register indicate reject accessing from which peripheral..*/
+#define GDMA_EXTMEM_REJECT_PERI_NUM    0x0000003F
+#define GDMA_EXTMEM_REJECT_PERI_NUM_M  ((GDMA_EXTMEM_REJECT_PERI_NUM_V)<<(GDMA_EXTMEM_REJECT_PERI_NUM_S))
+#define GDMA_EXTMEM_REJECT_PERI_NUM_V  0x3F
+#define GDMA_EXTMEM_REJECT_PERI_NUM_S  6
+/* GDMA_EXTMEM_REJECT_CHANNEL_NUM : RO ;bitpos:[5:2] ;default: 4'b0 ; */
+/*description: The register indicate the reject accessing from which channel..*/
+#define GDMA_EXTMEM_REJECT_CHANNEL_NUM    0x0000000F
+#define GDMA_EXTMEM_REJECT_CHANNEL_NUM_M  ((GDMA_EXTMEM_REJECT_CHANNEL_NUM_V)<<(GDMA_EXTMEM_REJECT_CHANNEL_NUM_S))
+#define GDMA_EXTMEM_REJECT_CHANNEL_NUM_V  0xF
+#define GDMA_EXTMEM_REJECT_CHANNEL_NUM_S  2
+/* GDMA_EXTMEM_REJECT_ATTR : RO ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: The reject accessing. Bit 0: if this bit is 1, the rejected accessing is READ. B
+it 1: if this bit is 1, the rejected accessing is WRITE..*/
+#define GDMA_EXTMEM_REJECT_ATTR    0x00000003
+#define GDMA_EXTMEM_REJECT_ATTR_M  ((GDMA_EXTMEM_REJECT_ATTR_V)<<(GDMA_EXTMEM_REJECT_ATTR_S))
+#define GDMA_EXTMEM_REJECT_ATTR_V  0x3
+#define GDMA_EXTMEM_REJECT_ATTR_S  0
+
+#define GDMA_EXTMEM_REJECT_INT_RAW_REG          (DR_REG_GDMA_BASE + 0x3FC)
+/* GDMA_EXTMEM_REJECT_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when accessing external RAM is rejecte
+d by permission control..*/
+#define GDMA_EXTMEM_REJECT_INT_RAW    (BIT(0))
+#define GDMA_EXTMEM_REJECT_INT_RAW_M  (BIT(0))
+#define GDMA_EXTMEM_REJECT_INT_RAW_V  0x1
+#define GDMA_EXTMEM_REJECT_INT_RAW_S  0
+
+#define GDMA_EXTMEM_REJECT_INT_ST_REG          (DR_REG_GDMA_BASE + 0x400)
+/* GDMA_EXTMEM_REJECT_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the EXTMEM_REJECT_INT interrupt..*/
+#define GDMA_EXTMEM_REJECT_INT_ST    (BIT(0))
+#define GDMA_EXTMEM_REJECT_INT_ST_M  (BIT(0))
+#define GDMA_EXTMEM_REJECT_INT_ST_V  0x1
+#define GDMA_EXTMEM_REJECT_INT_ST_S  0
+
+#define GDMA_EXTMEM_REJECT_INT_ENA_REG          (DR_REG_GDMA_BASE + 0x404)
+/* GDMA_EXTMEM_REJECT_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the EXTMEM_REJECT_INT interrupt..*/
+#define GDMA_EXTMEM_REJECT_INT_ENA    (BIT(0))
+#define GDMA_EXTMEM_REJECT_INT_ENA_M  (BIT(0))
+#define GDMA_EXTMEM_REJECT_INT_ENA_V  0x1
+#define GDMA_EXTMEM_REJECT_INT_ENA_S  0
+
+#define GDMA_EXTMEM_REJECT_INT_CLR_REG          (DR_REG_GDMA_BASE + 0x408)
+/* GDMA_EXTMEM_REJECT_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the EXTMEM_REJECT_INT interrupt..*/
+#define GDMA_EXTMEM_REJECT_INT_CLR    (BIT(0))
+#define GDMA_EXTMEM_REJECT_INT_CLR_M  (BIT(0))
+#define GDMA_EXTMEM_REJECT_INT_CLR_V  0x1
+#define GDMA_EXTMEM_REJECT_INT_CLR_S  0
+
+#define GDMA_DATE_REG          (DR_REG_GDMA_BASE + 0x40C)
+/* GDMA_DATE : R/W ;bitpos:[31:0] ;default: 32'h2101180 ; */
+/*description: register version..*/
+#define GDMA_DATE    0xFFFFFFFF
+#define GDMA_DATE_M  ((GDMA_DATE_V)<<(GDMA_DATE_S))
+#define GDMA_DATE_V  0xFFFFFFFF
+#define GDMA_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_GDMA_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gdma_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gdma_struct.h
new file mode 100644
index 00000000000..730333e67d3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gdma_struct.h
@@ -0,0 +1,448 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_GDMA_STRUCT_H_
+#define _SOC_GDMA_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct gdma_dev_s {
+    struct {
+        struct {
+            union {
+                struct {
+                    uint32_t in_rst                        :    1;  /*This bit is used to reset DMA channel 0 Rx FSM and Rx FIFO pointer.*/
+                    uint32_t in_loop_test                  :    1;  /*reserved*/
+                    uint32_t indscr_burst_en               :    1;  /*Set this bit to 1 to enable INCR burst transfer for Rx channel 0 reading link descriptor when accessing internal SRAM. */
+                    uint32_t in_data_burst_en              :    1;  /*Set this bit to 1 to enable INCR burst transfer for Rx channel 0 receiving data when accessing internal SRAM. */
+                    uint32_t mem_trans_en                  :    1;  /*Set this bit 1 to enable automatic transmitting data from memory to memory via DMA.*/
+                    uint32_t reserved5                     :    1;  /*reserved*/
+                    uint32_t reserved6                     :    26;  /*reserved*/
+                };
+                uint32_t val;
+            } conf0;
+            union {
+                struct {
+                    uint32_t dma_infifo_full_thrs          :    12;  /*This register is used to generate the INFIFO_FULL_WM_INT interrupt when Rx channel 0 received byte number in Rx FIFO is up to the value of the register.*/
+                    uint32_t in_check_owner                :    1;  /*Set this bit to enable checking the owner attribute of the link descriptor.*/
+                    uint32_t in_ext_mem_bk_size            :    2;  /*Block size of Rx channel 0 when DMA access external SRAM. 0: 16 bytes      1: 32 bytes    2/3:reserved*/
+                    uint32_t reserved15                    :    17;  /*reserved*/
+                };
+                uint32_t val;
+            } conf1;
+            union {
+                struct {
+                    uint32_t in_done                       :    1;  /*The raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received for Rx channel 0.*/
+                    uint32_t in_suc_eof                    :    1;  /*The raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received for Rx channel 0. For UHCI0, the raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received and no data error is detected for Rx channel 0.*/
+                    uint32_t in_err_eof                    :    1;  /*The raw interrupt bit turns to high level when data error is detected only in the case that the peripheral is UHCI0 for Rx channel 0. For other peripherals, this raw interrupt is reserved.*/
+                    uint32_t in_dscr_err                   :    1;  /*The raw interrupt bit turns to high level when detecting inlink descriptor error, including owner error, the second and third word error of inlink descriptor for Rx channel 0.*/
+                    uint32_t in_dscr_empty                 :    1;  /*The raw interrupt bit turns to high level when Rx buffer pointed by inlink is full and receiving data is not completed, but there is no more inlink for Rx channel 0.*/
+                    uint32_t infifo_full_wm                :    1;  /*The raw interrupt bit turns to high level when received data byte number is up to threshold configured by REG_DMA_INFIFO_FULL_THRS_CH0 in Rx FIFO of channel 0.*/
+                    uint32_t infifo_ovf_l1                 :    1;  /*This raw interrupt bit turns to high level when level 1 fifo of Rx channel 0 is overflow. */
+                    uint32_t infifo_udf_l1                 :    1;  /*This raw interrupt bit turns to high level when level 1 fifo of Rx channel 0 is underflow. */
+                    uint32_t infifo_ovf_l3                 :    1;  /*This raw interrupt bit turns to high level when level 3 fifo of Rx channel 0 is overflow. */
+                    uint32_t infifo_udf_l3                 :    1;  /*This raw interrupt bit turns to high level when level 3 fifo of Rx channel 0 is underflow. */
+                    uint32_t reserved10                    :    22;  /*reserved*/
+                };
+                uint32_t val;
+            } int_raw;
+            union {
+                struct {
+                    uint32_t in_done                       :    1;  /*The raw interrupt status bit for the IN_DONE_CH_INT interrupt.*/
+                    uint32_t in_suc_eof                    :    1;  /*The raw interrupt status bit for the IN_SUC_EOF_CH_INT interrupt.*/
+                    uint32_t in_err_eof                    :    1;  /*The raw interrupt status bit for the IN_ERR_EOF_CH_INT interrupt.*/
+                    uint32_t in_dscr_err                   :    1;  /*The raw interrupt status bit for the IN_DSCR_ERR_CH_INT interrupt.*/
+                    uint32_t in_dscr_empty                 :    1;  /*The raw interrupt status bit for the IN_DSCR_EMPTY_CH_INT interrupt.*/
+                    uint32_t infifo_full_wm                :    1;  /*The raw interrupt status bit for the INFIFO_FULL_WM_CH_INT interrupt.*/
+                    uint32_t infifo_ovf_l1                 :    1;  /*The raw interrupt status bit for the INFIFO_OVF_L1_CH_INT interrupt.*/
+                    uint32_t infifo_udf_l1                 :    1;  /*The raw interrupt status bit for the INFIFO_UDF_L1_CH_INT interrupt.*/
+                    uint32_t infifo_ovf_l3                 :    1;  /*The raw interrupt status bit for the INFIFO_OVF_L3_CH_INT interrupt.*/
+                    uint32_t infifo_udf_l3                 :    1;  /*The raw interrupt status bit for the INFIFO_UDF_L3_CH_INT interrupt.*/
+                    uint32_t reserved10                    :    22;  /*reserved*/
+                };
+                uint32_t val;
+            } int_st;
+            union {
+                struct {
+                    uint32_t in_done                       :    1;  /*The interrupt enable bit for the IN_DONE_CH_INT interrupt.*/
+                    uint32_t in_suc_eof                    :    1;  /*The interrupt enable bit for the IN_SUC_EOF_CH_INT interrupt.*/
+                    uint32_t in_err_eof                    :    1;  /*The interrupt enable bit for the IN_ERR_EOF_CH_INT interrupt.*/
+                    uint32_t in_dscr_err                   :    1;  /*The interrupt enable bit for the IN_DSCR_ERR_CH_INT interrupt.*/
+                    uint32_t in_dscr_empty                 :    1;  /*The interrupt enable bit for the IN_DSCR_EMPTY_CH_INT interrupt.*/
+                    uint32_t infifo_full_wm                :    1;  /*The interrupt enable bit for the INFIFO_FULL_WM_CH_INT interrupt.*/
+                    uint32_t infifo_ovf_l1                 :    1;  /*The interrupt enable bit for the INFIFO_OVF_L1_CH_INT interrupt.*/
+                    uint32_t infifo_udf_l1                 :    1;  /*The interrupt enable bit for the INFIFO_UDF_L1_CH_INT interrupt.*/
+                    uint32_t infifo_ovf_l3                 :    1;  /*The interrupt enable bit for the INFIFO_OVF_L3_CH_INT interrupt.*/
+                    uint32_t infifo_udf_l3                 :    1;  /*The interrupt enable bit for the INFIFO_UDF_L3_CH_INT interrupt.*/
+                    uint32_t reserved10                    :    22;  /*reserved*/
+                };
+                uint32_t val;
+            } int_ena;
+            union {
+                struct {
+                    uint32_t in_done                       :    1;  /*Set this bit to clear the IN_DONE_CH_INT interrupt.*/
+                    uint32_t in_suc_eof                    :    1;  /*Set this bit to clear the IN_SUC_EOF_CH_INT interrupt.*/
+                    uint32_t in_err_eof                    :    1;  /*Set this bit to clear the IN_ERR_EOF_CH_INT interrupt.*/
+                    uint32_t in_dscr_err                   :    1;  /*Set this bit to clear the IN_DSCR_ERR_CH_INT interrupt.*/
+                    uint32_t in_dscr_empty                 :    1;  /*Set this bit to clear the IN_DSCR_EMPTY_CH_INT interrupt.*/
+                    uint32_t dma_infifo_full_wm            :    1;  /*Set this bit to clear the INFIFO_FULL_WM_CH_INT interrupt.*/
+                    uint32_t infifo_ovf_l1                 :    1;  /*Set this bit to clear the INFIFO_OVF_L1_CH_INT interrupt.*/
+                    uint32_t infifo_udf_l1                 :    1;  /*Set this bit to clear the INFIFO_UDF_L1_CH_INT interrupt.*/
+                    uint32_t infifo_ovf_l3                 :    1;  /*Set this bit to clear the INFIFO_OVF_L3_CH_INT interrupt.*/
+                    uint32_t infifo_udf_l3                 :    1;  /*Set this bit to clear the INFIFO_UDF_L3_CH_INT interrupt.*/
+                    uint32_t reserved10                    :    22;  /*reserved*/
+                };
+                uint32_t val;
+            } int_clr;
+            union {
+                struct {
+                    uint32_t infifo_full_l1                :    1;  /*L1 Rx FIFO full signal for Rx channel 0.*/
+                    uint32_t infifo_empty_l1               :    1;  /*L1 Rx FIFO empty signal for Rx channel 0.*/
+                    uint32_t infifo_full_l2                :    1;  /*L2 Rx FIFO full signal for Rx channel 0.*/
+                    uint32_t infifo_empty_l2               :    1;  /*L2 Rx FIFO empty signal for Rx channel 0.*/
+                    uint32_t infifo_full_l3                :    1;  /*L3 Rx FIFO full signal for Rx channel 0.*/
+                    uint32_t infifo_empty_l3               :    1;  /*L3 Rx FIFO empty signal for Rx channel 0.*/
+                    uint32_t infifo_cnt_l1                 :    6;  /*The register stores the byte number of the data in L1 Rx FIFO for Rx channel 0.*/
+                    uint32_t infifo_cnt_l2                 :    7;  /*The register stores the byte number of the data in L2 Rx FIFO for Rx channel 0.*/
+                    uint32_t infifo_cnt_l3                 :    5;  /*The register stores the byte number of the data in L3 Rx FIFO for Rx channel 0.*/
+                    uint32_t in_remain_under_1b_l3         :    1;  /*reserved*/
+                    uint32_t in_remain_under_2b_l3         :    1;  /*reserved*/
+                    uint32_t in_remain_under_3b_l3         :    1;  /*reserved*/
+                    uint32_t in_remain_under_4b_l3         :    1;  /*reserved*/
+                    uint32_t in_buf_hungry                 :    1;  /*reserved*/
+                    uint32_t reserved29                    :    3;  /*reserved*/
+                };
+                uint32_t val;
+            } infifo_status;
+            union {
+                struct {
+                    uint32_t infifo_rdata                  :    12;  /*This register stores the data popping from DMA FIFO.*/
+                    uint32_t infifo_pop                    :    1;  /*Set this bit to pop data from DMA FIFO.*/
+                    uint32_t reserved13                    :    19;  /*reserved*/
+                };
+                uint32_t val;
+            } pop;
+            union {
+                struct {
+                    uint32_t addr                          :    20;  /*This register stores the 20 least significant bits of the first inlink descriptor's address.*/
+                    uint32_t auto_ret                      :    1;  /*Set this bit to return to current inlink descriptor's address, when there are some errors in current receiving data.*/
+                    uint32_t stop                          :    1;  /*Set this bit to stop dealing with the inlink descriptors.*/
+                    uint32_t start                         :    1;  /*Set this bit to start dealing with the inlink descriptors.*/
+                    uint32_t restart                       :    1;  /*Set this bit to mount a new inlink descriptor.*/
+                    uint32_t park                          :    1;  /*1: the inlink descriptor's FSM is in idle state.  0: the inlink descriptor's FSM is working.*/
+                    uint32_t reserved25                    :    7;
+                };
+                uint32_t val;
+            } link;
+            union {
+                struct {
+                    uint32_t dscr_addr                     :    18;  /*This register stores the current inlink descriptor's address.*/
+                    uint32_t in_dscr_state                 :    2;  /*reserved*/
+                    uint32_t in_state                      :    3;  /*reserved*/
+                    uint32_t reserved23                    :    9;  /*reserved*/
+                };
+                uint32_t val;
+            } state;
+            uint32_t suc_eof_des_addr;
+            uint32_t err_eof_des_addr;
+            uint32_t dscr;
+            uint32_t dscr_bf0;
+            uint32_t dscr_bf1;
+            union {
+                struct {
+                    uint32_t reserved0                     :    8;
+                    uint32_t rx_weight                     :    4;  /*The weight of Rx channel 0. */
+                    uint32_t reserved12                    :    20;
+                };
+                uint32_t val;
+            } wight;
+            uint32_t reserved_40;
+            union {
+                struct {
+                    uint32_t rx_pri                        :    4;  /*The priority of Rx channel 0. The larger of the value, the higher of the priority.*/
+                    uint32_t reserved4                     :    28;
+                };
+                uint32_t val;
+            } pri;
+            union {
+                struct {
+                    uint32_t sel                           :    6;  /*This register is used to select peripheral for Rx channel 0. 0:SPI2. 1: SPI3. 2: UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.*/
+                    uint32_t reserved6                     :    26;
+                };
+                uint32_t val;
+            } peri_sel;
+            uint32_t reserved_4c;
+            uint32_t reserved_50;
+            uint32_t reserved_54;
+            uint32_t reserved_58;
+            uint32_t reserved_5c;
+        } in;
+        struct {
+            union {
+                struct {
+                    uint32_t out_rst                       :    1;  /*This bit is used to reset DMA channel 0 Tx FSM and Tx FIFO pointer.*/
+                    uint32_t out_loop_test                 :    1;  /*reserved*/
+                    uint32_t out_auto_wrback               :    1;  /*Set this bit to enable automatic outlink-writeback when all the data in tx buffer has been transmitted.*/
+                    uint32_t out_eof_mode                  :    1;  /*EOF flag generation mode when transmitting data. 1: EOF flag for Tx channel 0 is generated when data need to transmit has been popped from FIFO in DMA*/
+                    uint32_t outdscr_burst_en              :    1;  /*Set this bit to 1 to enable INCR burst transfer for Tx channel 0 reading link descriptor when accessing internal SRAM. */
+                    uint32_t out_data_burst_en             :    1;  /*Set this bit to 1 to enable INCR burst transfer for Tx channel 0 transmitting data when accessing internal SRAM. */
+                    uint32_t reserved6                     :    1;
+                    uint32_t reserved7                     :    25;
+                };
+                uint32_t val;
+            } conf0;
+            union {
+                struct {
+                    uint32_t reserved0                     :    12;
+                    uint32_t out_check_owner               :    1;  /*Set this bit to enable checking the owner attribute of the link descriptor.*/
+                    uint32_t out_ext_mem_bk_size           :    2;  /*Block size of Tx channel 0 when DMA access external SRAM. 0: 16 bytes      1: 32 bytes    2/3:reserved*/
+                    uint32_t reserved15                    :    17;  /*reserved*/
+                };
+                uint32_t val;
+            } conf1;
+            union {
+                struct {
+                    uint32_t out_done                      :    1;  /*The raw interrupt bit turns to high level when the last data pointed by one outlink descriptor has been transmitted to peripherals for Tx channel 0.*/
+                    uint32_t out_eof                       :    1;  /*The raw interrupt bit turns to high level when the last data pointed by one outlink descriptor has been read from memory for Tx channel 0. */
+                    uint32_t out_dscr_err                  :    1;  /*The raw interrupt bit turns to high level when detecting outlink descriptor error, including owner error, the second and third word error of outlink descriptor for Tx channel 0.*/
+                    uint32_t out_total_eof                 :    1;  /*The raw interrupt bit turns to high level when data corresponding a outlink (includes one link descriptor or few link descriptors) is transmitted out for Tx channel 0.*/
+                    uint32_t outfifo_ovf_l1                :    1;  /*This raw interrupt bit turns to high level when level 1 fifo of Tx channel 0 is overflow. */
+                    uint32_t outfifo_udf_l1                :    1;  /*This raw interrupt bit turns to high level when level 1 fifo of Tx channel 0 is underflow. */
+                    uint32_t outfifo_ovf_l3                :    1;  /*This raw interrupt bit turns to high level when level 3 fifo of Tx channel 0 is overflow. */
+                    uint32_t outfifo_udf_l3                :    1;  /*This raw interrupt bit turns to high level when level 3 fifo of Tx channel 0 is underflow. */
+                    uint32_t reserved8                     :    24;  /*reserved*/
+                };
+                uint32_t val;
+            } int_raw;
+            union {
+                struct {
+                    uint32_t out_done                      :    1;  /*The raw interrupt status bit for the OUT_DONE_CH_INT interrupt.*/
+                    uint32_t out_eof                       :    1;  /*The raw interrupt status bit for the OUT_EOF_CH_INT interrupt.*/
+                    uint32_t out_dscr_err                  :    1;  /*The raw interrupt status bit for the OUT_DSCR_ERR_CH_INT interrupt.*/
+                    uint32_t out_total_eof                 :    1;  /*The raw interrupt status bit for the OUT_TOTAL_EOF_CH_INT interrupt.*/
+                    uint32_t outfifo_ovf_l1                :    1;  /*The raw interrupt status bit for the OUTFIFO_OVF_L1_CH_INT interrupt.*/
+                    uint32_t outfifo_udf_l1                :    1;  /*The raw interrupt status bit for the OUTFIFO_UDF_L1_CH_INT interrupt.*/
+                    uint32_t outfifo_ovf_l3                :    1;  /*The raw interrupt status bit for the OUTFIFO_OVF_L3_CH_INT interrupt.*/
+                    uint32_t outfifo_udf_l3                :    1;  /*The raw interrupt status bit for the OUTFIFO_UDF_L3_CH_INT interrupt.*/
+                    uint32_t reserved8                     :    24;  /*reserved*/
+                };
+                uint32_t val;
+            } int_st;
+            union {
+                struct {
+                    uint32_t out_done                      :    1;  /*The interrupt enable bit for the OUT_DONE_CH_INT interrupt.*/
+                    uint32_t out_eof                       :    1;  /*The interrupt enable bit for the OUT_EOF_CH_INT interrupt.*/
+                    uint32_t out_dscr_err                  :    1;  /*The interrupt enable bit for the OUT_DSCR_ERR_CH_INT interrupt.*/
+                    uint32_t out_total_eof                 :    1;  /*The interrupt enable bit for the OUT_TOTAL_EOF_CH_INT interrupt.*/
+                    uint32_t outfifo_ovf_l1                :    1;  /*The interrupt enable bit for the OUTFIFO_OVF_L1_CH_INT interrupt.*/
+                    uint32_t outfifo_udf_l1                :    1;  /*The interrupt enable bit for the OUTFIFO_UDF_L1_CH_INT interrupt.*/
+                    uint32_t outfifo_ovf_l3                :    1;  /*The interrupt enable bit for the OUTFIFO_OVF_L3_CH_INT interrupt.*/
+                    uint32_t outfifo_udf_l3                :    1;  /*The interrupt enable bit for the OUTFIFO_UDF_L3_CH_INT interrupt.*/
+                    uint32_t reserved8                     :    24;  /*reserved*/
+                };
+                uint32_t val;
+            } int_ena;
+            union {
+                struct {
+                    uint32_t out_done                      :    1;  /*Set this bit to clear the OUT_DONE_CH_INT interrupt.*/
+                    uint32_t out_eof                       :    1;  /*Set this bit to clear the OUT_EOF_CH_INT interrupt.*/
+                    uint32_t out_dscr_err                  :    1;  /*Set this bit to clear the OUT_DSCR_ERR_CH_INT interrupt.*/
+                    uint32_t out_total_eof                 :    1;  /*Set this bit to clear the OUT_TOTAL_EOF_CH_INT interrupt.*/
+                    uint32_t outfifo_ovf_l1                :    1;  /*Set this bit to clear the OUTFIFO_OVF_L1_CH_INT interrupt.*/
+                    uint32_t outfifo_udf_l1                :    1;  /*Set this bit to clear the OUTFIFO_UDF_L1_CH_INT interrupt.*/
+                    uint32_t outfifo_ovf_l3                :    1;  /*Set this bit to clear the OUTFIFO_OVF_L3_CH_INT interrupt.*/
+                    uint32_t outfifo_udf_l3                :    1;  /*Set this bit to clear the OUTFIFO_UDF_L3_CH_INT interrupt.*/
+                    uint32_t reserved8                     :    24;  /*reserved*/
+                };
+                uint32_t val;
+            } int_clr;
+            union {
+                struct {
+                    uint32_t outfifo_full_l1               :    1;  /*L1 Tx FIFO full signal for Tx channel 0.*/
+                    uint32_t outfifo_empty_l1              :    1;  /*L1 Tx FIFO empty signal for Tx channel 0.*/
+                    uint32_t outfifo_full_l2               :    1;  /*L2 Tx FIFO full signal for Tx channel 0.*/
+                    uint32_t outfifo_empty_l2              :    1;  /*L2 Tx FIFO empty signal for Tx channel 0.*/
+                    uint32_t outfifo_full_l3               :    1;  /*L3 Tx FIFO full signal for Tx channel 0.*/
+                    uint32_t outfifo_empty_l3              :    1;  /*L3 Tx FIFO empty signal for Tx channel 0.*/
+                    uint32_t outfifo_cnt_l1                :    5;  /*The register stores the byte number of the data in L1 Tx FIFO for Tx channel 0.*/
+                    uint32_t outfifo_cnt_l2                :    7;  /*The register stores the byte number of the data in L2 Tx FIFO for Tx channel 0.*/
+                    uint32_t outfifo_cnt_l3                :    5;  /*The register stores the byte number of the data in L3 Tx FIFO for Tx channel 0.*/
+                    uint32_t out_remain_under_1b_l3        :    1;  /*reserved*/
+                    uint32_t out_remain_under_2b_l3        :    1;  /*reserved*/
+                    uint32_t out_remain_under_3b_l3        :    1;  /*reserved*/
+                    uint32_t out_remain_under_4b_l3        :    1;  /*reserved*/
+                    uint32_t reserved27                    :    5;  /*reserved*/
+                };
+                uint32_t val;
+            } outfifo_status;
+            union {
+                struct {
+                    uint32_t outfifo_wdata                 :    9;  /*This register stores the data that need to be pushed into DMA FIFO.*/
+                    uint32_t outfifo_push                  :    1;  /*Set this bit to push data into DMA FIFO.*/
+                    uint32_t reserved10                    :    22;  /*reserved*/
+                };
+                uint32_t val;
+            } push;
+            union {
+                struct {
+                    uint32_t addr                          :    20;  /*This register stores the 20 least significant bits of the first outlink descriptor's address.*/
+                    uint32_t stop                          :    1;  /*Set this bit to stop dealing with the outlink descriptors.*/
+                    uint32_t start                         :    1;  /*Set this bit to start dealing with the outlink descriptors.*/
+                    uint32_t restart                       :    1;  /*Set this bit to restart a new outlink from the last address. */
+                    uint32_t park                          :    1;  /*1: the outlink descriptor's FSM is in idle state.  0: the outlink descriptor's FSM is working.*/
+                    uint32_t reserved24                    :    8;
+                };
+                uint32_t val;
+            } link;
+            union {
+                struct {
+                    uint32_t dscr_addr                     :    18;  /*This register stores the current outlink descriptor's address.*/
+                    uint32_t out_dscr_state                :    2;  /*reserved*/
+                    uint32_t out_state                     :    3;  /*reserved*/
+                    uint32_t reserved23                    :    9;  /*reserved*/
+                };
+                uint32_t val;
+            } state;
+            uint32_t eof_des_addr;
+            uint32_t eof_bfr_des_addr;
+            uint32_t dscr;
+            uint32_t dscr_bf0;
+            uint32_t dscr_bf1;
+            union {
+                struct {
+                    uint32_t reserved0                     :    8;
+                    uint32_t tx_weight                     :    4;  /*The weight of Tx channel 0. */
+                    uint32_t reserved12                    :    20;
+                };
+                uint32_t val;
+            } wight;
+            uint32_t reserved_a0;
+            union {
+                struct {
+                    uint32_t tx_pri                        :    4;  /*The priority of Tx channel 0. The larger of the value, the higher of the priority.*/
+                    uint32_t reserved4                     :    28;
+                };
+                uint32_t val;
+            } pri;
+            union {
+                struct {
+                    uint32_t sel                           :    6;  /*This register is used to select peripheral for Tx channel 0. 0:SPI2. 1: SPI3. 2: UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.; 7: AES. 8: SHA. 9: ADC_DAC.*/
+                    uint32_t reserved6                     :    26;
+                };
+                uint32_t val;
+            } peri_sel;
+            uint32_t reserved_ac;
+            uint32_t reserved_b0;
+            uint32_t reserved_b4;
+            uint32_t reserved_b8;
+            uint32_t reserved_bc;
+        } out;
+    } channel[5];
+    union {
+        struct {
+            uint32_t ahb_testmode                  :    3;  /*reserved*/
+            uint32_t reserved3                     :    1;  /*reserved*/
+            uint32_t ahb_testaddr                  :    2;  /*reserved*/
+            uint32_t reserved6                     :    26;  /*reserved*/
+        };
+        uint32_t val;
+    } ahb_test;
+    union {
+        struct {
+            uint32_t reserved0                     :    4;  /*reserved*/
+            uint32_t dma_ram_force_pd              :    1;  /*power down*/
+            uint32_t dma_ram_force_pu              :    1;
+            uint32_t dma_ram_clk_fo                :    1;  /*1: Force to open the clock and bypass the gate-clock when accessing the RAM in DMA. 0: A gate-clock will be used when accessing the RAM in DMA.*/
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } pd_conf;
+    union {
+        struct {
+            uint32_t ahbm_rst_inter                :    1;  /*Set this bit, then clear this bit to reset the internal ahb FSM.*/
+            uint32_t ahbm_rst_exter                :    1;  /*Set this bit, then clear this bit to reset the external ahb FSM.*/
+            uint32_t arb_pri_dis                   :    1;  /*Set this bit to disable priority arbitration function.*/
+            uint32_t reserved3                     :    1;
+            uint32_t clk_en                        :    1;
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } misc_conf;
+    struct {
+        union {
+            struct {
+                uint32_t in_size                       :    7;  /*This register is used to configure the size of L2 Tx FIFO for Rx channel 0. 0:16 bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 bytes. 7: 72 bytes. 8: 80 bytes.*/
+                uint32_t reserved7                     :    25;
+            };
+            uint32_t val;
+        } in;
+        union {
+            struct {
+                uint32_t out_size                      :    7;  /*This register is used to configure the size of L2 Tx FIFO for Tx channel 0. 0:16 bytes. 1:24 bytes. 2:32 bytes. 3: 40 bytes. 4: 48 bytes. 5:56 bytes. 6: 64 bytes. 7: 72 bytes. 8: 80 bytes.*/
+                uint32_t reserved7                     :    25;
+            };
+            uint32_t val;
+        } out;
+    } sram_size[5];
+    uint32_t extmem_reject_addr;
+    union {
+        struct {
+            uint32_t extmem_reject_attr            :    2;  /*The reject accessing. Bit 0: if this bit is 1, the rejected accessing is READ. Bit 1: if this bit is 1, the rejected accessing is WRITE.*/
+            uint32_t extmem_reject_channel_num     :    4;  /*The register indicate the reject accessing from which channel.*/
+            uint32_t extmem_reject_peri_num        :    6;  /*This register indicate reject accessing from which peripheral.*/
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } extmem_reject_st;
+    union {
+        struct {
+            uint32_t extmem_reject                 :    1;  /*The raw interrupt bit turns to high level when accessing external RAM is rejected by permission control.*/
+            uint32_t reserved1                     :    31;  /*reserved*/
+        };
+        uint32_t val;
+    } extmem_reject_int_raw;
+    union {
+        struct {
+            uint32_t extmem_reject                 :    1;  /*The raw interrupt status bit for the EXTMEM_REJECT_INT interrupt.*/
+            uint32_t reserved1                     :    31;  /*reserved*/
+        };
+        uint32_t val;
+    } extmem_reject_int_st;
+    union {
+        struct {
+            uint32_t extmem_reject                 :    1;  /*The interrupt enable bit for the EXTMEM_REJECT_INT interrupt.*/
+            uint32_t reserved1                     :    31;  /*reserved*/
+        };
+        uint32_t val;
+    } extmem_reject_int_ena;
+    union {
+        struct {
+            uint32_t extmem_reject                 :    1;  /*Set this bit to clear the EXTMEM_REJECT_INT interrupt.*/
+            uint32_t reserved1                     :    31;  /*reserved*/
+        };
+        uint32_t val;
+    } extmem_reject_int_clr;
+    uint32_t date;
+} gdma_dev_t;
+extern gdma_dev_t GDMA;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_GDMA_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_caps.h
new file mode 100644
index 00000000000..e2ddcdbb539
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_caps.h
@@ -0,0 +1,40 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ESP32-S3 has 1 GPIO peripheral
+#define SOC_GPIO_PORT           (1)
+#define SOC_GPIO_PIN_COUNT      (49)
+
+// On ESP32-S3, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
+#define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1)
+// Force hold is a new function of ESP32-S3
+#define SOC_GPIO_SUPPORT_FORCE_HOLD      (1)
+
+// 0~48 except from 22~25 are valid
+#define SOC_GPIO_VALID_GPIO_MASK         (0x1FFFFFFFFFFFFULL & ~(0ULL | BIT22 | BIT23 | BIT24 | BIT25))
+// No GPIO is input only
+#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK  (SOC_GPIO_VALID_GPIO_MASK)
+
+// Support to configure slept status
+#define SOC_GPIO_SUPPORT_SLP_SWITCH  (1)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_pins.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_pins.h
new file mode 100644
index 00000000000..428ed9a0d18
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_pins.h
@@ -0,0 +1,27 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define GPIO_MATRIX_CONST_ONE_INPUT   (0x38)
+#define GPIO_MATRIX_CONST_ZERO_INPUT  (0x3C)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_reg.h
new file mode 100644
index 00000000000..39656ffce35
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_reg.h
@@ -0,0 +1,9224 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_GPIO_REG_H_
+#define _SOC_GPIO_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "soc.h"
+
+#define GPIO_PIN_CONFIG_MSB                    12
+#define GPIO_PIN_CONFIG_LSB                     11
+#define GPIO_PIN_CONFIG_MASK                   0x00001800
+#define GPIO_PIN_CONFIG_GET(x)                 (((x) & GPIO_PIN_CONFIG_MASK) >> GPIO_PIN_CONFIG_LSB)
+#define GPIO_PIN_CONFIG_SET(x)                  (((x) << GPIO_PIN_CONFIG_LSB) & GPIO_PIN_CONFIG_MASK)
+
+#define GPIO_WAKEUP_ENABLE                     1
+#define GPIO_WAKEUP_DISABLE                    (~GPIO_WAKEUP_ENABLE)
+#define GPIO_PIN_WAKEUP_ENABLE_MSB             10
+#define GPIO_PIN_WAKEUP_ENABLE_LSB              10
+#define GPIO_PIN_WAKEUP_ENABLE_MASK            0x00000400
+#define GPIO_PIN_WAKEUP_ENABLE_GET(x)          (((x) & GPIO_PIN_WAKEUP_ENABLE_MASK) >> GPIO_PIN_WAKEUP_ENABLE_LSB)
+#define GPIO_PIN_WAKEUP_ENABLE_SET(x)           (((x) << GPIO_PIN_WAKEUP_ENABLE_LSB) & GPIO_PIN_WAKEUP_ENABLE_MASK)
+
+#define GPIO_PIN_INT_TYPE_MASK                 0x380
+#define GPIO_PIN_INT_TYPE_MSB                  9
+#define GPIO_PIN_INT_TYPE_LSB                  7
+#define GPIO_PIN_INT_TYPE_GET(x)               (((x) & GPIO_PIN_INT_TYPE_MASK) >> GPIO_PIN_INT_TYPE_LSB)
+#define GPIO_PIN_INT_TYPE_SET(x)               (((x) << GPIO_PIN_INT_TYPE_LSB) & GPIO_PIN_INT_TYPE_MASK)
+
+#define GPIO_PAD_DRIVER_ENABLE                 1
+#define GPIO_PAD_DRIVER_DISABLE                        (~GPIO_PAD_DRIVER_ENABLE)
+#define GPIO_PIN_PAD_DRIVER_MSB                        2
+#define GPIO_PIN_PAD_DRIVER_LSB                        2
+#define GPIO_PIN_PAD_DRIVER_MASK               0x00000004
+#define GPIO_PIN_PAD_DRIVER_GET(x)             (((x) & GPIO_PIN_PAD_DRIVER_MASK) >> GPIO_PIN_PAD_DRIVER_LSB)
+#define GPIO_PIN_PAD_DRIVER_SET(x)             (((x) << GPIO_PIN_PAD_DRIVER_LSB) & GPIO_PIN_PAD_DRIVER_MASK)
+
+#define GPIO_BT_SELECT_REG          (DR_REG_GPIO_BASE + 0x0)
+/* GPIO_BT_SEL : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_BT_SEL    0xFFFFFFFF
+#define GPIO_BT_SEL_M  ((GPIO_BT_SEL_V)<<(GPIO_BT_SEL_S))
+#define GPIO_BT_SEL_V  0xFFFFFFFF
+#define GPIO_BT_SEL_S  0
+
+#define GPIO_OUT_REG          (DR_REG_GPIO_BASE + 0x4)
+/* GPIO_OUT_DATA : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_OUT_DATA    0xFFFFFFFF
+#define GPIO_OUT_DATA_M  ((GPIO_OUT_DATA_V)<<(GPIO_OUT_DATA_S))
+#define GPIO_OUT_DATA_V  0xFFFFFFFF
+#define GPIO_OUT_DATA_S  0
+
+#define GPIO_OUT_W1TS_REG          (DR_REG_GPIO_BASE + 0x8)
+/* GPIO_OUT_W1TS : WO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_OUT_W1TS    0xFFFFFFFF
+#define GPIO_OUT_W1TS_M  ((GPIO_OUT_W1TS_V)<<(GPIO_OUT_W1TS_S))
+#define GPIO_OUT_W1TS_V  0xFFFFFFFF
+#define GPIO_OUT_W1TS_S  0
+
+#define GPIO_OUT_W1TC_REG          (DR_REG_GPIO_BASE + 0xC)
+/* GPIO_OUT_W1TC : WO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_OUT_W1TC    0xFFFFFFFF
+#define GPIO_OUT_W1TC_M  ((GPIO_OUT_W1TC_V)<<(GPIO_OUT_W1TC_S))
+#define GPIO_OUT_W1TC_V  0xFFFFFFFF
+#define GPIO_OUT_W1TC_S  0
+
+#define GPIO_OUT1_REG          (DR_REG_GPIO_BASE + 0x10)
+/* GPIO_OUT1_DATA : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define GPIO_OUT1_DATA    0x003FFFFF
+#define GPIO_OUT1_DATA_M  ((GPIO_OUT1_DATA_V)<<(GPIO_OUT1_DATA_S))
+#define GPIO_OUT1_DATA_V  0x3FFFFF
+#define GPIO_OUT1_DATA_S  0
+
+#define GPIO_OUT1_W1TS_REG          (DR_REG_GPIO_BASE + 0x14)
+/* GPIO_OUT1_W1TS : WO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define GPIO_OUT1_W1TS    0x003FFFFF
+#define GPIO_OUT1_W1TS_M  ((GPIO_OUT1_W1TS_V)<<(GPIO_OUT1_W1TS_S))
+#define GPIO_OUT1_W1TS_V  0x3FFFFF
+#define GPIO_OUT1_W1TS_S  0
+
+#define GPIO_OUT1_W1TC_REG          (DR_REG_GPIO_BASE + 0x18)
+/* GPIO_OUT1_W1TC : WO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define GPIO_OUT1_W1TC    0x003FFFFF
+#define GPIO_OUT1_W1TC_M  ((GPIO_OUT1_W1TC_V)<<(GPIO_OUT1_W1TC_S))
+#define GPIO_OUT1_W1TC_V  0x3FFFFF
+#define GPIO_OUT1_W1TC_S  0
+
+#define GPIO_SDIO_SELECT_REG          (DR_REG_GPIO_BASE + 0x1C)
+/* GPIO_SDIO_SEL : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define GPIO_SDIO_SEL    0x000000FF
+#define GPIO_SDIO_SEL_M  ((GPIO_SDIO_SEL_V)<<(GPIO_SDIO_SEL_S))
+#define GPIO_SDIO_SEL_V  0xFF
+#define GPIO_SDIO_SEL_S  0
+
+#define GPIO_ENABLE_REG          (DR_REG_GPIO_BASE + 0x20)
+/* GPIO_ENABLE_DATA : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_ENABLE_DATA    0xFFFFFFFF
+#define GPIO_ENABLE_DATA_M  ((GPIO_ENABLE_DATA_V)<<(GPIO_ENABLE_DATA_S))
+#define GPIO_ENABLE_DATA_V  0xFFFFFFFF
+#define GPIO_ENABLE_DATA_S  0
+
+#define GPIO_ENABLE_W1TS_REG          (DR_REG_GPIO_BASE + 0x24)
+/* GPIO_ENABLE_W1TS : WO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_ENABLE_W1TS    0xFFFFFFFF
+#define GPIO_ENABLE_W1TS_M  ((GPIO_ENABLE_W1TS_V)<<(GPIO_ENABLE_W1TS_S))
+#define GPIO_ENABLE_W1TS_V  0xFFFFFFFF
+#define GPIO_ENABLE_W1TS_S  0
+
+#define GPIO_ENABLE_W1TC_REG          (DR_REG_GPIO_BASE + 0x28)
+/* GPIO_ENABLE_W1TC : WO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_ENABLE_W1TC    0xFFFFFFFF
+#define GPIO_ENABLE_W1TC_M  ((GPIO_ENABLE_W1TC_V)<<(GPIO_ENABLE_W1TC_S))
+#define GPIO_ENABLE_W1TC_V  0xFFFFFFFF
+#define GPIO_ENABLE_W1TC_S  0
+
+#define GPIO_ENABLE1_REG          (DR_REG_GPIO_BASE + 0x2C)
+/* GPIO_ENABLE_DATA : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define GPIO_ENABLE1_DATA    0x003FFFFF
+#define GPIO_ENABLE1_DATA_M  ((GPIO_ENABLE1_DATA_V)<<(GPIO_ENABLE1_DATA_S))
+#define GPIO_ENABLE1_DATA_V  0x3FFFFF
+#define GPIO_ENABLE1_DATA_S  0
+
+#define GPIO_ENABLE1_W1TS_REG          (DR_REG_GPIO_BASE + 0x30)
+/* GPIO_ENABLE1_W1TS : WO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define GPIO_ENABLE1_W1TS    0x003FFFFF
+#define GPIO_ENABLE1_W1TS_M  ((GPIO_ENABLE1_W1TS_V)<<(GPIO_ENABLE1_W1TS_S))
+#define GPIO_ENABLE1_W1TS_V  0x3FFFFF
+#define GPIO_ENABLE1_W1TS_S  0
+
+#define GPIO_ENABLE1_W1TC_REG          (DR_REG_GPIO_BASE + 0x34)
+/* GPIO_ENABLE1_W1TC : WO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define GPIO_ENABLE1_W1TC    0x003FFFFF
+#define GPIO_ENABLE1_W1TC_M  ((GPIO_ENABLE1_W1TC_V)<<(GPIO_ENABLE1_W1TC_S))
+#define GPIO_ENABLE1_W1TC_V  0x3FFFFF
+#define GPIO_ENABLE1_W1TC_S  0
+
+#define GPIO_STRAP_REG          (DR_REG_GPIO_BASE + 0x38)
+/* GPIO_STRAPPING : RO ;bitpos:[15:0] ;default:  ; */
+/*description: .*/
+#define GPIO_STRAPPING    0x0000FFFF
+#define GPIO_STRAPPING_M  ((GPIO_STRAPPING_V)<<(GPIO_STRAPPING_S))
+#define GPIO_STRAPPING_V  0xFFFF
+#define GPIO_STRAPPING_S  0
+
+#define GPIO_IN_REG          (DR_REG_GPIO_BASE + 0x3C)
+/* GPIO_IN_DATA : RO ;bitpos:[31:0] ;default:  ; */
+/*description: .*/
+#define GPIO_IN_DATA    0xFFFFFFFF
+#define GPIO_IN_DATA_M  ((GPIO_IN_DATA_V)<<(GPIO_IN_DATA_S))
+#define GPIO_IN_DATA_V  0xFFFFFFFF
+#define GPIO_IN_DATA_S  0
+
+#define GPIO_IN1_REG          (DR_REG_GPIO_BASE + 0x40)
+/* GPIO_IN_DATA : RO ;bitpos:[21:0] ;default:  ; */
+/*description: .*/
+#define GPIO_IN1_DATA    0x003FFFFF
+#define GPIO_IN1_DATA_M  ((GPIO_IN1_DATA_V)<<(GPIO_IN1_DATA_S))
+#define GPIO_IN1_DATA_V  0x3FFFFF
+#define GPIO_IN1_DATA_S  0
+
+#define GPIO_STATUS_REG          (DR_REG_GPIO_BASE + 0x44)
+/* GPIO_STATUS_INT : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_STATUS_INT    0xFFFFFFFF
+#define GPIO_STATUS_INT_M  ((GPIO_STATUS_INT_V)<<(GPIO_STATUS_INT_S))
+#define GPIO_STATUS_INT_V  0xFFFFFFFF
+#define GPIO_STATUS_INT_S  0
+
+#define GPIO_STATUS_W1TS_REG          (DR_REG_GPIO_BASE + 0x48)
+/* GPIO_STATUS_W1TS : WO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_STATUS_W1TS    0xFFFFFFFF
+#define GPIO_STATUS_W1TS_M  ((GPIO_STATUS_W1TS_V)<<(GPIO_STATUS_W1TS_S))
+#define GPIO_STATUS_W1TS_V  0xFFFFFFFF
+#define GPIO_STATUS_W1TS_S  0
+
+#define GPIO_STATUS_W1TC_REG          (DR_REG_GPIO_BASE + 0x4C)
+/* GPIO_STATUS_W1TC : WO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_STATUS_W1TC    0xFFFFFFFF
+#define GPIO_STATUS_W1TC_M  ((GPIO_STATUS_W1TC_V)<<(GPIO_STATUS_W1TC_S))
+#define GPIO_STATUS_W1TC_V  0xFFFFFFFF
+#define GPIO_STATUS_W1TC_S  0
+
+#define GPIO_STATUS1_REG          (DR_REG_GPIO_BASE + 0x50)
+/* GPIO_STATUS_INT : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define GPIO_STATUS1_INT    0x003FFFFF
+#define GPIO_STATUS1_INT_M  ((GPIO_STATUS1_INT_V)<<(GPIO_STATUS1_INT_S))
+#define GPIO_STATUS1_INT_V  0x3FFFFF
+#define GPIO_STATUS1_INT_S  0
+
+#define GPIO_STATUS1_W1TS_REG          (DR_REG_GPIO_BASE + 0x54)
+/* GPIO_STATUS1_W1TS : WO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define GPIO_STATUS1_W1TS    0x003FFFFF
+#define GPIO_STATUS1_W1TS_M  ((GPIO_STATUS1_W1TS_V)<<(GPIO_STATUS1_W1TS_S))
+#define GPIO_STATUS1_W1TS_V  0x3FFFFF
+#define GPIO_STATUS1_W1TS_S  0
+
+#define GPIO_STATUS1_W1TC_REG          (DR_REG_GPIO_BASE + 0x58)
+/* GPIO_STATUS1_W1TC : WO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define GPIO_STATUS1_W1TC    0x003FFFFF
+#define GPIO_STATUS1_W1TC_M  ((GPIO_STATUS1_W1TC_V)<<(GPIO_STATUS1_W1TC_S))
+#define GPIO_STATUS1_W1TC_V  0x3FFFFF
+#define GPIO_STATUS1_W1TC_S  0
+
+#define GPIO_PCPU_INT_REG          (DR_REG_GPIO_BASE + 0x5C)
+/* GPIO_PROCPU_INT : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_PROCPU_INT    0xFFFFFFFF
+#define GPIO_PROCPU_INT_M  ((GPIO_PROCPU_INT_V)<<(GPIO_PROCPU_INT_S))
+#define GPIO_PROCPU_INT_V  0xFFFFFFFF
+#define GPIO_PROCPU_INT_S  0
+
+#define GPIO_PCPU_NMI_INT_REG          (DR_REG_GPIO_BASE + 0x60)
+/* GPIO_PROCPU_NMI_INT : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_PROCPU_NMI_INT    0xFFFFFFFF
+#define GPIO_PROCPU_NMI_INT_M  ((GPIO_PROCPU_NMI_INT_V)<<(GPIO_PROCPU_NMI_INT_S))
+#define GPIO_PROCPU_NMI_INT_V  0xFFFFFFFF
+#define GPIO_PROCPU_NMI_INT_S  0
+
+#define GPIO_CPUSDIO_INT_REG          (DR_REG_GPIO_BASE + 0x64)
+/* GPIO_SDIO_INT : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_SDIO_INT    0xFFFFFFFF
+#define GPIO_SDIO_INT_M  ((GPIO_SDIO_INT_V)<<(GPIO_SDIO_INT_S))
+#define GPIO_SDIO_INT_V  0xFFFFFFFF
+#define GPIO_SDIO_INT_S  0
+
+#define GPIO_PCPU_INT1_REG          (DR_REG_GPIO_BASE + 0x68)
+/* GPIO_PROCPU_INT_H : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: */
+#define GPIO_PROCPU_INT_H  0x003FFFFF
+#define GPIO_PROCPU_INT_H_M  ((GPIO_PROCPU_INT_H_V)<<(GPIO_PROCPU_INT_H_S))
+#define GPIO_PROCPU_INT_H_V  0x3FFFFF
+#define GPIO_PROCPU_INT_H_S  0
+
+#define GPIO_PCPU_NMI_INT1_REG          (DR_REG_GPIO_BASE + 0x6C)
+/* GPIO_PROCPU_NMI_INT_H : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: */
+#define GPIO_PROCPU_NMI_INT_H  0x003FFFFF
+#define GPIO_PROCPU_NMI_INT_H_M  ((GPIO_PROCPU_NMI_INT_H_V)<<(GPIO_PROCPU_NMI_INT_H_S))
+#define GPIO_PROCPU_NMI_INT_H_V  0x3FFFFF
+#define GPIO_PROCPU_NMI_INT_H_S  0
+
+#define GPIO_CPUSDIO_INT1_REG          (DR_REG_GPIO_BASE + 0x70)
+/* GPIO_SDIO_INT_H : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: */
+#define GPIO_SDIO_INT_H  0x003FFFFF
+#define GPIO_SDIO_INT_H_M  ((GPIO_SDIO_INT_H_V)<<(GPIO_SDIO_INT_H_S))
+#define GPIO_SDIO_INT_H_V  0x3FFFFF
+#define GPIO_SDIO_INT_H_S  0
+
+#define GPIO_PIN0_REG          (DR_REG_GPIO_BASE + 0x74)
+/* GPIO_PIN0_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN0_INT_ENA    0x0000001F
+#define GPIO_PIN0_INT_ENA_M  ((GPIO_PIN0_INT_ENA_V)<<(GPIO_PIN0_INT_ENA_S))
+#define GPIO_PIN0_INT_ENA_V  0x1F
+#define GPIO_PIN0_INT_ENA_S  13
+/* GPIO_PIN0_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN0_CONFIG    0x00000003
+#define GPIO_PIN0_CONFIG_M  ((GPIO_PIN0_CONFIG_V)<<(GPIO_PIN0_CONFIG_S))
+#define GPIO_PIN0_CONFIG_V  0x3
+#define GPIO_PIN0_CONFIG_S  11
+/* GPIO_PIN0_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN0_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN0_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN0_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN0_WAKEUP_ENABLE_S  10
+/* GPIO_PIN0_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN0_INT_TYPE    0x00000007
+#define GPIO_PIN0_INT_TYPE_M  ((GPIO_PIN0_INT_TYPE_V)<<(GPIO_PIN0_INT_TYPE_S))
+#define GPIO_PIN0_INT_TYPE_V  0x7
+#define GPIO_PIN0_INT_TYPE_S  7
+/* GPIO_PIN0_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN0_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN0_SYNC1_BYPASS_M  ((GPIO_PIN0_SYNC1_BYPASS_V)<<(GPIO_PIN0_SYNC1_BYPASS_S))
+#define GPIO_PIN0_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN0_SYNC1_BYPASS_S  3
+/* GPIO_PIN0_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN0_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN0_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN0_PAD_DRIVER_V  0x1
+#define GPIO_PIN0_PAD_DRIVER_S  2
+/* GPIO_PIN0_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN0_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN0_SYNC2_BYPASS_M  ((GPIO_PIN0_SYNC2_BYPASS_V)<<(GPIO_PIN0_SYNC2_BYPASS_S))
+#define GPIO_PIN0_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN0_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN1_REG          (DR_REG_GPIO_BASE + 0x78)
+/* GPIO_PIN1_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN1_INT_ENA    0x0000001F
+#define GPIO_PIN1_INT_ENA_M  ((GPIO_PIN1_INT_ENA_V)<<(GPIO_PIN1_INT_ENA_S))
+#define GPIO_PIN1_INT_ENA_V  0x1F
+#define GPIO_PIN1_INT_ENA_S  13
+/* GPIO_PIN1_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN1_CONFIG    0x00000003
+#define GPIO_PIN1_CONFIG_M  ((GPIO_PIN1_CONFIG_V)<<(GPIO_PIN1_CONFIG_S))
+#define GPIO_PIN1_CONFIG_V  0x3
+#define GPIO_PIN1_CONFIG_S  11
+/* GPIO_PIN1_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN1_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN1_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN1_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN1_WAKEUP_ENABLE_S  10
+/* GPIO_PIN1_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN1_INT_TYPE    0x00000007
+#define GPIO_PIN1_INT_TYPE_M  ((GPIO_PIN1_INT_TYPE_V)<<(GPIO_PIN1_INT_TYPE_S))
+#define GPIO_PIN1_INT_TYPE_V  0x7
+#define GPIO_PIN1_INT_TYPE_S  7
+/* GPIO_PIN1_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN1_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN1_SYNC1_BYPASS_M  ((GPIO_PIN1_SYNC1_BYPASS_V)<<(GPIO_PIN1_SYNC1_BYPASS_S))
+#define GPIO_PIN1_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN1_SYNC1_BYPASS_S  3
+/* GPIO_PIN1_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN1_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN1_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN1_PAD_DRIVER_V  0x1
+#define GPIO_PIN1_PAD_DRIVER_S  2
+/* GPIO_PIN1_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN1_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN1_SYNC2_BYPASS_M  ((GPIO_PIN1_SYNC2_BYPASS_V)<<(GPIO_PIN1_SYNC2_BYPASS_S))
+#define GPIO_PIN1_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN1_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN2_REG          (DR_REG_GPIO_BASE + 0x7C)
+/* GPIO_PIN2_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN2_INT_ENA    0x0000001F
+#define GPIO_PIN2_INT_ENA_M  ((GPIO_PIN2_INT_ENA_V)<<(GPIO_PIN2_INT_ENA_S))
+#define GPIO_PIN2_INT_ENA_V  0x1F
+#define GPIO_PIN2_INT_ENA_S  13
+/* GPIO_PIN2_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN2_CONFIG    0x00000003
+#define GPIO_PIN2_CONFIG_M  ((GPIO_PIN2_CONFIG_V)<<(GPIO_PIN2_CONFIG_S))
+#define GPIO_PIN2_CONFIG_V  0x3
+#define GPIO_PIN2_CONFIG_S  11
+/* GPIO_PIN2_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN2_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN2_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN2_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN2_WAKEUP_ENABLE_S  10
+/* GPIO_PIN2_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN2_INT_TYPE    0x00000007
+#define GPIO_PIN2_INT_TYPE_M  ((GPIO_PIN2_INT_TYPE_V)<<(GPIO_PIN2_INT_TYPE_S))
+#define GPIO_PIN2_INT_TYPE_V  0x7
+#define GPIO_PIN2_INT_TYPE_S  7
+/* GPIO_PIN2_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN2_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN2_SYNC1_BYPASS_M  ((GPIO_PIN2_SYNC1_BYPASS_V)<<(GPIO_PIN2_SYNC1_BYPASS_S))
+#define GPIO_PIN2_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN2_SYNC1_BYPASS_S  3
+/* GPIO_PIN2_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN2_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN2_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN2_PAD_DRIVER_V  0x1
+#define GPIO_PIN2_PAD_DRIVER_S  2
+/* GPIO_PIN2_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN2_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN2_SYNC2_BYPASS_M  ((GPIO_PIN2_SYNC2_BYPASS_V)<<(GPIO_PIN2_SYNC2_BYPASS_S))
+#define GPIO_PIN2_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN2_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN3_REG          (DR_REG_GPIO_BASE + 0x80)
+/* GPIO_PIN3_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN3_INT_ENA    0x0000001F
+#define GPIO_PIN3_INT_ENA_M  ((GPIO_PIN3_INT_ENA_V)<<(GPIO_PIN3_INT_ENA_S))
+#define GPIO_PIN3_INT_ENA_V  0x1F
+#define GPIO_PIN3_INT_ENA_S  13
+/* GPIO_PIN3_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN3_CONFIG    0x00000003
+#define GPIO_PIN3_CONFIG_M  ((GPIO_PIN3_CONFIG_V)<<(GPIO_PIN3_CONFIG_S))
+#define GPIO_PIN3_CONFIG_V  0x3
+#define GPIO_PIN3_CONFIG_S  11
+/* GPIO_PIN3_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN3_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN3_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN3_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN3_WAKEUP_ENABLE_S  10
+/* GPIO_PIN3_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN3_INT_TYPE    0x00000007
+#define GPIO_PIN3_INT_TYPE_M  ((GPIO_PIN3_INT_TYPE_V)<<(GPIO_PIN3_INT_TYPE_S))
+#define GPIO_PIN3_INT_TYPE_V  0x7
+#define GPIO_PIN3_INT_TYPE_S  7
+/* GPIO_PIN3_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN3_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN3_SYNC1_BYPASS_M  ((GPIO_PIN3_SYNC1_BYPASS_V)<<(GPIO_PIN3_SYNC1_BYPASS_S))
+#define GPIO_PIN3_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN3_SYNC1_BYPASS_S  3
+/* GPIO_PIN3_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN3_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN3_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN3_PAD_DRIVER_V  0x1
+#define GPIO_PIN3_PAD_DRIVER_S  2
+/* GPIO_PIN3_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN3_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN3_SYNC2_BYPASS_M  ((GPIO_PIN3_SYNC2_BYPASS_V)<<(GPIO_PIN3_SYNC2_BYPASS_S))
+#define GPIO_PIN3_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN3_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN4_REG          (DR_REG_GPIO_BASE + 0x84)
+/* GPIO_PIN4_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN4_INT_ENA    0x0000001F
+#define GPIO_PIN4_INT_ENA_M  ((GPIO_PIN4_INT_ENA_V)<<(GPIO_PIN4_INT_ENA_S))
+#define GPIO_PIN4_INT_ENA_V  0x1F
+#define GPIO_PIN4_INT_ENA_S  13
+/* GPIO_PIN4_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN4_CONFIG    0x00000003
+#define GPIO_PIN4_CONFIG_M  ((GPIO_PIN4_CONFIG_V)<<(GPIO_PIN4_CONFIG_S))
+#define GPIO_PIN4_CONFIG_V  0x3
+#define GPIO_PIN4_CONFIG_S  11
+/* GPIO_PIN4_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN4_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN4_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN4_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN4_WAKEUP_ENABLE_S  10
+/* GPIO_PIN4_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN4_INT_TYPE    0x00000007
+#define GPIO_PIN4_INT_TYPE_M  ((GPIO_PIN4_INT_TYPE_V)<<(GPIO_PIN4_INT_TYPE_S))
+#define GPIO_PIN4_INT_TYPE_V  0x7
+#define GPIO_PIN4_INT_TYPE_S  7
+/* GPIO_PIN4_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN4_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN4_SYNC1_BYPASS_M  ((GPIO_PIN4_SYNC1_BYPASS_V)<<(GPIO_PIN4_SYNC1_BYPASS_S))
+#define GPIO_PIN4_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN4_SYNC1_BYPASS_S  3
+/* GPIO_PIN4_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN4_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN4_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN4_PAD_DRIVER_V  0x1
+#define GPIO_PIN4_PAD_DRIVER_S  2
+/* GPIO_PIN4_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN4_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN4_SYNC2_BYPASS_M  ((GPIO_PIN4_SYNC2_BYPASS_V)<<(GPIO_PIN4_SYNC2_BYPASS_S))
+#define GPIO_PIN4_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN4_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN5_REG          (DR_REG_GPIO_BASE + 0x88)
+/* GPIO_PIN5_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN5_INT_ENA    0x0000001F
+#define GPIO_PIN5_INT_ENA_M  ((GPIO_PIN5_INT_ENA_V)<<(GPIO_PIN5_INT_ENA_S))
+#define GPIO_PIN5_INT_ENA_V  0x1F
+#define GPIO_PIN5_INT_ENA_S  13
+/* GPIO_PIN5_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN5_CONFIG    0x00000003
+#define GPIO_PIN5_CONFIG_M  ((GPIO_PIN5_CONFIG_V)<<(GPIO_PIN5_CONFIG_S))
+#define GPIO_PIN5_CONFIG_V  0x3
+#define GPIO_PIN5_CONFIG_S  11
+/* GPIO_PIN5_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN5_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN5_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN5_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN5_WAKEUP_ENABLE_S  10
+/* GPIO_PIN5_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN5_INT_TYPE    0x00000007
+#define GPIO_PIN5_INT_TYPE_M  ((GPIO_PIN5_INT_TYPE_V)<<(GPIO_PIN5_INT_TYPE_S))
+#define GPIO_PIN5_INT_TYPE_V  0x7
+#define GPIO_PIN5_INT_TYPE_S  7
+/* GPIO_PIN5_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN5_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN5_SYNC1_BYPASS_M  ((GPIO_PIN5_SYNC1_BYPASS_V)<<(GPIO_PIN5_SYNC1_BYPASS_S))
+#define GPIO_PIN5_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN5_SYNC1_BYPASS_S  3
+/* GPIO_PIN5_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN5_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN5_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN5_PAD_DRIVER_V  0x1
+#define GPIO_PIN5_PAD_DRIVER_S  2
+/* GPIO_PIN5_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN5_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN5_SYNC2_BYPASS_M  ((GPIO_PIN5_SYNC2_BYPASS_V)<<(GPIO_PIN5_SYNC2_BYPASS_S))
+#define GPIO_PIN5_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN5_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN6_REG          (DR_REG_GPIO_BASE + 0x8C)
+/* GPIO_PIN6_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN6_INT_ENA    0x0000001F
+#define GPIO_PIN6_INT_ENA_M  ((GPIO_PIN6_INT_ENA_V)<<(GPIO_PIN6_INT_ENA_S))
+#define GPIO_PIN6_INT_ENA_V  0x1F
+#define GPIO_PIN6_INT_ENA_S  13
+/* GPIO_PIN6_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN6_CONFIG    0x00000003
+#define GPIO_PIN6_CONFIG_M  ((GPIO_PIN6_CONFIG_V)<<(GPIO_PIN6_CONFIG_S))
+#define GPIO_PIN6_CONFIG_V  0x3
+#define GPIO_PIN6_CONFIG_S  11
+/* GPIO_PIN6_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN6_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN6_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN6_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN6_WAKEUP_ENABLE_S  10
+/* GPIO_PIN6_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN6_INT_TYPE    0x00000007
+#define GPIO_PIN6_INT_TYPE_M  ((GPIO_PIN6_INT_TYPE_V)<<(GPIO_PIN6_INT_TYPE_S))
+#define GPIO_PIN6_INT_TYPE_V  0x7
+#define GPIO_PIN6_INT_TYPE_S  7
+/* GPIO_PIN6_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN6_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN6_SYNC1_BYPASS_M  ((GPIO_PIN6_SYNC1_BYPASS_V)<<(GPIO_PIN6_SYNC1_BYPASS_S))
+#define GPIO_PIN6_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN6_SYNC1_BYPASS_S  3
+/* GPIO_PIN6_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN6_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN6_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN6_PAD_DRIVER_V  0x1
+#define GPIO_PIN6_PAD_DRIVER_S  2
+/* GPIO_PIN6_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN6_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN6_SYNC2_BYPASS_M  ((GPIO_PIN6_SYNC2_BYPASS_V)<<(GPIO_PIN6_SYNC2_BYPASS_S))
+#define GPIO_PIN6_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN6_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN7_REG          (DR_REG_GPIO_BASE + 0x90)
+/* GPIO_PIN7_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN7_INT_ENA    0x0000001F
+#define GPIO_PIN7_INT_ENA_M  ((GPIO_PIN7_INT_ENA_V)<<(GPIO_PIN7_INT_ENA_S))
+#define GPIO_PIN7_INT_ENA_V  0x1F
+#define GPIO_PIN7_INT_ENA_S  13
+/* GPIO_PIN7_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN7_CONFIG    0x00000003
+#define GPIO_PIN7_CONFIG_M  ((GPIO_PIN7_CONFIG_V)<<(GPIO_PIN7_CONFIG_S))
+#define GPIO_PIN7_CONFIG_V  0x3
+#define GPIO_PIN7_CONFIG_S  11
+/* GPIO_PIN7_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN7_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN7_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN7_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN7_WAKEUP_ENABLE_S  10
+/* GPIO_PIN7_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN7_INT_TYPE    0x00000007
+#define GPIO_PIN7_INT_TYPE_M  ((GPIO_PIN7_INT_TYPE_V)<<(GPIO_PIN7_INT_TYPE_S))
+#define GPIO_PIN7_INT_TYPE_V  0x7
+#define GPIO_PIN7_INT_TYPE_S  7
+/* GPIO_PIN7_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN7_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN7_SYNC1_BYPASS_M  ((GPIO_PIN7_SYNC1_BYPASS_V)<<(GPIO_PIN7_SYNC1_BYPASS_S))
+#define GPIO_PIN7_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN7_SYNC1_BYPASS_S  3
+/* GPIO_PIN7_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN7_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN7_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN7_PAD_DRIVER_V  0x1
+#define GPIO_PIN7_PAD_DRIVER_S  2
+/* GPIO_PIN7_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN7_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN7_SYNC2_BYPASS_M  ((GPIO_PIN7_SYNC2_BYPASS_V)<<(GPIO_PIN7_SYNC2_BYPASS_S))
+#define GPIO_PIN7_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN7_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN8_REG          (DR_REG_GPIO_BASE + 0x94)
+/* GPIO_PIN8_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN8_INT_ENA    0x0000001F
+#define GPIO_PIN8_INT_ENA_M  ((GPIO_PIN8_INT_ENA_V)<<(GPIO_PIN8_INT_ENA_S))
+#define GPIO_PIN8_INT_ENA_V  0x1F
+#define GPIO_PIN8_INT_ENA_S  13
+/* GPIO_PIN8_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN8_CONFIG    0x00000003
+#define GPIO_PIN8_CONFIG_M  ((GPIO_PIN8_CONFIG_V)<<(GPIO_PIN8_CONFIG_S))
+#define GPIO_PIN8_CONFIG_V  0x3
+#define GPIO_PIN8_CONFIG_S  11
+/* GPIO_PIN8_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN8_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN8_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN8_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN8_WAKEUP_ENABLE_S  10
+/* GPIO_PIN8_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN8_INT_TYPE    0x00000007
+#define GPIO_PIN8_INT_TYPE_M  ((GPIO_PIN8_INT_TYPE_V)<<(GPIO_PIN8_INT_TYPE_S))
+#define GPIO_PIN8_INT_TYPE_V  0x7
+#define GPIO_PIN8_INT_TYPE_S  7
+/* GPIO_PIN8_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN8_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN8_SYNC1_BYPASS_M  ((GPIO_PIN8_SYNC1_BYPASS_V)<<(GPIO_PIN8_SYNC1_BYPASS_S))
+#define GPIO_PIN8_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN8_SYNC1_BYPASS_S  3
+/* GPIO_PIN8_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN8_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN8_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN8_PAD_DRIVER_V  0x1
+#define GPIO_PIN8_PAD_DRIVER_S  2
+/* GPIO_PIN8_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN8_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN8_SYNC2_BYPASS_M  ((GPIO_PIN8_SYNC2_BYPASS_V)<<(GPIO_PIN8_SYNC2_BYPASS_S))
+#define GPIO_PIN8_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN8_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN9_REG          (DR_REG_GPIO_BASE + 0x98)
+/* GPIO_PIN9_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN9_INT_ENA    0x0000001F
+#define GPIO_PIN9_INT_ENA_M  ((GPIO_PIN9_INT_ENA_V)<<(GPIO_PIN9_INT_ENA_S))
+#define GPIO_PIN9_INT_ENA_V  0x1F
+#define GPIO_PIN9_INT_ENA_S  13
+/* GPIO_PIN9_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN9_CONFIG    0x00000003
+#define GPIO_PIN9_CONFIG_M  ((GPIO_PIN9_CONFIG_V)<<(GPIO_PIN9_CONFIG_S))
+#define GPIO_PIN9_CONFIG_V  0x3
+#define GPIO_PIN9_CONFIG_S  11
+/* GPIO_PIN9_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN9_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN9_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN9_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN9_WAKEUP_ENABLE_S  10
+/* GPIO_PIN9_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN9_INT_TYPE    0x00000007
+#define GPIO_PIN9_INT_TYPE_M  ((GPIO_PIN9_INT_TYPE_V)<<(GPIO_PIN9_INT_TYPE_S))
+#define GPIO_PIN9_INT_TYPE_V  0x7
+#define GPIO_PIN9_INT_TYPE_S  7
+/* GPIO_PIN9_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN9_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN9_SYNC1_BYPASS_M  ((GPIO_PIN9_SYNC1_BYPASS_V)<<(GPIO_PIN9_SYNC1_BYPASS_S))
+#define GPIO_PIN9_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN9_SYNC1_BYPASS_S  3
+/* GPIO_PIN9_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN9_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN9_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN9_PAD_DRIVER_V  0x1
+#define GPIO_PIN9_PAD_DRIVER_S  2
+/* GPIO_PIN9_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN9_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN9_SYNC2_BYPASS_M  ((GPIO_PIN9_SYNC2_BYPASS_V)<<(GPIO_PIN9_SYNC2_BYPASS_S))
+#define GPIO_PIN9_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN9_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN10_REG          (DR_REG_GPIO_BASE + 0x9C)
+/* GPIO_PIN10_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN10_INT_ENA    0x0000001F
+#define GPIO_PIN10_INT_ENA_M  ((GPIO_PIN10_INT_ENA_V)<<(GPIO_PIN10_INT_ENA_S))
+#define GPIO_PIN10_INT_ENA_V  0x1F
+#define GPIO_PIN10_INT_ENA_S  13
+/* GPIO_PIN10_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN10_CONFIG    0x00000003
+#define GPIO_PIN10_CONFIG_M  ((GPIO_PIN10_CONFIG_V)<<(GPIO_PIN10_CONFIG_S))
+#define GPIO_PIN10_CONFIG_V  0x3
+#define GPIO_PIN10_CONFIG_S  11
+/* GPIO_PIN10_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN10_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN10_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN10_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN10_WAKEUP_ENABLE_S  10
+/* GPIO_PIN10_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN10_INT_TYPE    0x00000007
+#define GPIO_PIN10_INT_TYPE_M  ((GPIO_PIN10_INT_TYPE_V)<<(GPIO_PIN10_INT_TYPE_S))
+#define GPIO_PIN10_INT_TYPE_V  0x7
+#define GPIO_PIN10_INT_TYPE_S  7
+/* GPIO_PIN10_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN10_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN10_SYNC1_BYPASS_M  ((GPIO_PIN10_SYNC1_BYPASS_V)<<(GPIO_PIN10_SYNC1_BYPASS_S))
+#define GPIO_PIN10_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN10_SYNC1_BYPASS_S  3
+/* GPIO_PIN10_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN10_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN10_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN10_PAD_DRIVER_V  0x1
+#define GPIO_PIN10_PAD_DRIVER_S  2
+/* GPIO_PIN10_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN10_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN10_SYNC2_BYPASS_M  ((GPIO_PIN10_SYNC2_BYPASS_V)<<(GPIO_PIN10_SYNC2_BYPASS_S))
+#define GPIO_PIN10_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN10_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN11_REG          (DR_REG_GPIO_BASE + 0xA0)
+/* GPIO_PIN11_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN11_INT_ENA    0x0000001F
+#define GPIO_PIN11_INT_ENA_M  ((GPIO_PIN11_INT_ENA_V)<<(GPIO_PIN11_INT_ENA_S))
+#define GPIO_PIN11_INT_ENA_V  0x1F
+#define GPIO_PIN11_INT_ENA_S  13
+/* GPIO_PIN11_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN11_CONFIG    0x00000003
+#define GPIO_PIN11_CONFIG_M  ((GPIO_PIN11_CONFIG_V)<<(GPIO_PIN11_CONFIG_S))
+#define GPIO_PIN11_CONFIG_V  0x3
+#define GPIO_PIN11_CONFIG_S  11
+/* GPIO_PIN11_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN11_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN11_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN11_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN11_WAKEUP_ENABLE_S  10
+/* GPIO_PIN11_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN11_INT_TYPE    0x00000007
+#define GPIO_PIN11_INT_TYPE_M  ((GPIO_PIN11_INT_TYPE_V)<<(GPIO_PIN11_INT_TYPE_S))
+#define GPIO_PIN11_INT_TYPE_V  0x7
+#define GPIO_PIN11_INT_TYPE_S  7
+/* GPIO_PIN11_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN11_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN11_SYNC1_BYPASS_M  ((GPIO_PIN11_SYNC1_BYPASS_V)<<(GPIO_PIN11_SYNC1_BYPASS_S))
+#define GPIO_PIN11_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN11_SYNC1_BYPASS_S  3
+/* GPIO_PIN11_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN11_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN11_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN11_PAD_DRIVER_V  0x1
+#define GPIO_PIN11_PAD_DRIVER_S  2
+/* GPIO_PIN11_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN11_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN11_SYNC2_BYPASS_M  ((GPIO_PIN11_SYNC2_BYPASS_V)<<(GPIO_PIN11_SYNC2_BYPASS_S))
+#define GPIO_PIN11_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN11_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN12_REG          (DR_REG_GPIO_BASE + 0xA4)
+/* GPIO_PIN12_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN12_INT_ENA    0x0000001F
+#define GPIO_PIN12_INT_ENA_M  ((GPIO_PIN12_INT_ENA_V)<<(GPIO_PIN12_INT_ENA_S))
+#define GPIO_PIN12_INT_ENA_V  0x1F
+#define GPIO_PIN12_INT_ENA_S  13
+/* GPIO_PIN12_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN12_CONFIG    0x00000003
+#define GPIO_PIN12_CONFIG_M  ((GPIO_PIN12_CONFIG_V)<<(GPIO_PIN12_CONFIG_S))
+#define GPIO_PIN12_CONFIG_V  0x3
+#define GPIO_PIN12_CONFIG_S  11
+/* GPIO_PIN12_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN12_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN12_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN12_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN12_WAKEUP_ENABLE_S  10
+/* GPIO_PIN12_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN12_INT_TYPE    0x00000007
+#define GPIO_PIN12_INT_TYPE_M  ((GPIO_PIN12_INT_TYPE_V)<<(GPIO_PIN12_INT_TYPE_S))
+#define GPIO_PIN12_INT_TYPE_V  0x7
+#define GPIO_PIN12_INT_TYPE_S  7
+/* GPIO_PIN12_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN12_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN12_SYNC1_BYPASS_M  ((GPIO_PIN12_SYNC1_BYPASS_V)<<(GPIO_PIN12_SYNC1_BYPASS_S))
+#define GPIO_PIN12_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN12_SYNC1_BYPASS_S  3
+/* GPIO_PIN12_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN12_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN12_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN12_PAD_DRIVER_V  0x1
+#define GPIO_PIN12_PAD_DRIVER_S  2
+/* GPIO_PIN12_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN12_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN12_SYNC2_BYPASS_M  ((GPIO_PIN12_SYNC2_BYPASS_V)<<(GPIO_PIN12_SYNC2_BYPASS_S))
+#define GPIO_PIN12_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN12_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN13_REG          (DR_REG_GPIO_BASE + 0xA8)
+/* GPIO_PIN13_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN13_INT_ENA    0x0000001F
+#define GPIO_PIN13_INT_ENA_M  ((GPIO_PIN13_INT_ENA_V)<<(GPIO_PIN13_INT_ENA_S))
+#define GPIO_PIN13_INT_ENA_V  0x1F
+#define GPIO_PIN13_INT_ENA_S  13
+/* GPIO_PIN13_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN13_CONFIG    0x00000003
+#define GPIO_PIN13_CONFIG_M  ((GPIO_PIN13_CONFIG_V)<<(GPIO_PIN13_CONFIG_S))
+#define GPIO_PIN13_CONFIG_V  0x3
+#define GPIO_PIN13_CONFIG_S  11
+/* GPIO_PIN13_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN13_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN13_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN13_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN13_WAKEUP_ENABLE_S  10
+/* GPIO_PIN13_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN13_INT_TYPE    0x00000007
+#define GPIO_PIN13_INT_TYPE_M  ((GPIO_PIN13_INT_TYPE_V)<<(GPIO_PIN13_INT_TYPE_S))
+#define GPIO_PIN13_INT_TYPE_V  0x7
+#define GPIO_PIN13_INT_TYPE_S  7
+/* GPIO_PIN13_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN13_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN13_SYNC1_BYPASS_M  ((GPIO_PIN13_SYNC1_BYPASS_V)<<(GPIO_PIN13_SYNC1_BYPASS_S))
+#define GPIO_PIN13_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN13_SYNC1_BYPASS_S  3
+/* GPIO_PIN13_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN13_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN13_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN13_PAD_DRIVER_V  0x1
+#define GPIO_PIN13_PAD_DRIVER_S  2
+/* GPIO_PIN13_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN13_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN13_SYNC2_BYPASS_M  ((GPIO_PIN13_SYNC2_BYPASS_V)<<(GPIO_PIN13_SYNC2_BYPASS_S))
+#define GPIO_PIN13_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN13_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN14_REG          (DR_REG_GPIO_BASE + 0xAC)
+/* GPIO_PIN14_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN14_INT_ENA    0x0000001F
+#define GPIO_PIN14_INT_ENA_M  ((GPIO_PIN14_INT_ENA_V)<<(GPIO_PIN14_INT_ENA_S))
+#define GPIO_PIN14_INT_ENA_V  0x1F
+#define GPIO_PIN14_INT_ENA_S  13
+/* GPIO_PIN14_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN14_CONFIG    0x00000003
+#define GPIO_PIN14_CONFIG_M  ((GPIO_PIN14_CONFIG_V)<<(GPIO_PIN14_CONFIG_S))
+#define GPIO_PIN14_CONFIG_V  0x3
+#define GPIO_PIN14_CONFIG_S  11
+/* GPIO_PIN14_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN14_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN14_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN14_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN14_WAKEUP_ENABLE_S  10
+/* GPIO_PIN14_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN14_INT_TYPE    0x00000007
+#define GPIO_PIN14_INT_TYPE_M  ((GPIO_PIN14_INT_TYPE_V)<<(GPIO_PIN14_INT_TYPE_S))
+#define GPIO_PIN14_INT_TYPE_V  0x7
+#define GPIO_PIN14_INT_TYPE_S  7
+/* GPIO_PIN14_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN14_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN14_SYNC1_BYPASS_M  ((GPIO_PIN14_SYNC1_BYPASS_V)<<(GPIO_PIN14_SYNC1_BYPASS_S))
+#define GPIO_PIN14_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN14_SYNC1_BYPASS_S  3
+/* GPIO_PIN14_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN14_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN14_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN14_PAD_DRIVER_V  0x1
+#define GPIO_PIN14_PAD_DRIVER_S  2
+/* GPIO_PIN14_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN14_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN14_SYNC2_BYPASS_M  ((GPIO_PIN14_SYNC2_BYPASS_V)<<(GPIO_PIN14_SYNC2_BYPASS_S))
+#define GPIO_PIN14_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN14_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN15_REG          (DR_REG_GPIO_BASE + 0xB0)
+/* GPIO_PIN15_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN15_INT_ENA    0x0000001F
+#define GPIO_PIN15_INT_ENA_M  ((GPIO_PIN15_INT_ENA_V)<<(GPIO_PIN15_INT_ENA_S))
+#define GPIO_PIN15_INT_ENA_V  0x1F
+#define GPIO_PIN15_INT_ENA_S  13
+/* GPIO_PIN15_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN15_CONFIG    0x00000003
+#define GPIO_PIN15_CONFIG_M  ((GPIO_PIN15_CONFIG_V)<<(GPIO_PIN15_CONFIG_S))
+#define GPIO_PIN15_CONFIG_V  0x3
+#define GPIO_PIN15_CONFIG_S  11
+/* GPIO_PIN15_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN15_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN15_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN15_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN15_WAKEUP_ENABLE_S  10
+/* GPIO_PIN15_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN15_INT_TYPE    0x00000007
+#define GPIO_PIN15_INT_TYPE_M  ((GPIO_PIN15_INT_TYPE_V)<<(GPIO_PIN15_INT_TYPE_S))
+#define GPIO_PIN15_INT_TYPE_V  0x7
+#define GPIO_PIN15_INT_TYPE_S  7
+/* GPIO_PIN15_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN15_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN15_SYNC1_BYPASS_M  ((GPIO_PIN15_SYNC1_BYPASS_V)<<(GPIO_PIN15_SYNC1_BYPASS_S))
+#define GPIO_PIN15_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN15_SYNC1_BYPASS_S  3
+/* GPIO_PIN15_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN15_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN15_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN15_PAD_DRIVER_V  0x1
+#define GPIO_PIN15_PAD_DRIVER_S  2
+/* GPIO_PIN15_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN15_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN15_SYNC2_BYPASS_M  ((GPIO_PIN15_SYNC2_BYPASS_V)<<(GPIO_PIN15_SYNC2_BYPASS_S))
+#define GPIO_PIN15_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN15_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN16_REG          (DR_REG_GPIO_BASE + 0xB4)
+/* GPIO_PIN16_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN16_INT_ENA    0x0000001F
+#define GPIO_PIN16_INT_ENA_M  ((GPIO_PIN16_INT_ENA_V)<<(GPIO_PIN16_INT_ENA_S))
+#define GPIO_PIN16_INT_ENA_V  0x1F
+#define GPIO_PIN16_INT_ENA_S  13
+/* GPIO_PIN16_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN16_CONFIG    0x00000003
+#define GPIO_PIN16_CONFIG_M  ((GPIO_PIN16_CONFIG_V)<<(GPIO_PIN16_CONFIG_S))
+#define GPIO_PIN16_CONFIG_V  0x3
+#define GPIO_PIN16_CONFIG_S  11
+/* GPIO_PIN16_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN16_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN16_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN16_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN16_WAKEUP_ENABLE_S  10
+/* GPIO_PIN16_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN16_INT_TYPE    0x00000007
+#define GPIO_PIN16_INT_TYPE_M  ((GPIO_PIN16_INT_TYPE_V)<<(GPIO_PIN16_INT_TYPE_S))
+#define GPIO_PIN16_INT_TYPE_V  0x7
+#define GPIO_PIN16_INT_TYPE_S  7
+/* GPIO_PIN16_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN16_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN16_SYNC1_BYPASS_M  ((GPIO_PIN16_SYNC1_BYPASS_V)<<(GPIO_PIN16_SYNC1_BYPASS_S))
+#define GPIO_PIN16_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN16_SYNC1_BYPASS_S  3
+/* GPIO_PIN16_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN16_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN16_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN16_PAD_DRIVER_V  0x1
+#define GPIO_PIN16_PAD_DRIVER_S  2
+/* GPIO_PIN16_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN16_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN16_SYNC2_BYPASS_M  ((GPIO_PIN16_SYNC2_BYPASS_V)<<(GPIO_PIN16_SYNC2_BYPASS_S))
+#define GPIO_PIN16_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN16_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN17_REG          (DR_REG_GPIO_BASE + 0xB8)
+/* GPIO_PIN17_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN17_INT_ENA    0x0000001F
+#define GPIO_PIN17_INT_ENA_M  ((GPIO_PIN17_INT_ENA_V)<<(GPIO_PIN17_INT_ENA_S))
+#define GPIO_PIN17_INT_ENA_V  0x1F
+#define GPIO_PIN17_INT_ENA_S  13
+/* GPIO_PIN17_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN17_CONFIG    0x00000003
+#define GPIO_PIN17_CONFIG_M  ((GPIO_PIN17_CONFIG_V)<<(GPIO_PIN17_CONFIG_S))
+#define GPIO_PIN17_CONFIG_V  0x3
+#define GPIO_PIN17_CONFIG_S  11
+/* GPIO_PIN17_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN17_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN17_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN17_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN17_WAKEUP_ENABLE_S  10
+/* GPIO_PIN17_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN17_INT_TYPE    0x00000007
+#define GPIO_PIN17_INT_TYPE_M  ((GPIO_PIN17_INT_TYPE_V)<<(GPIO_PIN17_INT_TYPE_S))
+#define GPIO_PIN17_INT_TYPE_V  0x7
+#define GPIO_PIN17_INT_TYPE_S  7
+/* GPIO_PIN17_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN17_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN17_SYNC1_BYPASS_M  ((GPIO_PIN17_SYNC1_BYPASS_V)<<(GPIO_PIN17_SYNC1_BYPASS_S))
+#define GPIO_PIN17_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN17_SYNC1_BYPASS_S  3
+/* GPIO_PIN17_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN17_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN17_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN17_PAD_DRIVER_V  0x1
+#define GPIO_PIN17_PAD_DRIVER_S  2
+/* GPIO_PIN17_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN17_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN17_SYNC2_BYPASS_M  ((GPIO_PIN17_SYNC2_BYPASS_V)<<(GPIO_PIN17_SYNC2_BYPASS_S))
+#define GPIO_PIN17_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN17_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN18_REG          (DR_REG_GPIO_BASE + 0xBC)
+/* GPIO_PIN18_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN18_INT_ENA    0x0000001F
+#define GPIO_PIN18_INT_ENA_M  ((GPIO_PIN18_INT_ENA_V)<<(GPIO_PIN18_INT_ENA_S))
+#define GPIO_PIN18_INT_ENA_V  0x1F
+#define GPIO_PIN18_INT_ENA_S  13
+/* GPIO_PIN18_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN18_CONFIG    0x00000003
+#define GPIO_PIN18_CONFIG_M  ((GPIO_PIN18_CONFIG_V)<<(GPIO_PIN18_CONFIG_S))
+#define GPIO_PIN18_CONFIG_V  0x3
+#define GPIO_PIN18_CONFIG_S  11
+/* GPIO_PIN18_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN18_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN18_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN18_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN18_WAKEUP_ENABLE_S  10
+/* GPIO_PIN18_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN18_INT_TYPE    0x00000007
+#define GPIO_PIN18_INT_TYPE_M  ((GPIO_PIN18_INT_TYPE_V)<<(GPIO_PIN18_INT_TYPE_S))
+#define GPIO_PIN18_INT_TYPE_V  0x7
+#define GPIO_PIN18_INT_TYPE_S  7
+/* GPIO_PIN18_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN18_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN18_SYNC1_BYPASS_M  ((GPIO_PIN18_SYNC1_BYPASS_V)<<(GPIO_PIN18_SYNC1_BYPASS_S))
+#define GPIO_PIN18_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN18_SYNC1_BYPASS_S  3
+/* GPIO_PIN18_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN18_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN18_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN18_PAD_DRIVER_V  0x1
+#define GPIO_PIN18_PAD_DRIVER_S  2
+/* GPIO_PIN18_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN18_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN18_SYNC2_BYPASS_M  ((GPIO_PIN18_SYNC2_BYPASS_V)<<(GPIO_PIN18_SYNC2_BYPASS_S))
+#define GPIO_PIN18_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN18_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN19_REG          (DR_REG_GPIO_BASE + 0xC0)
+/* GPIO_PIN19_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN19_INT_ENA    0x0000001F
+#define GPIO_PIN19_INT_ENA_M  ((GPIO_PIN19_INT_ENA_V)<<(GPIO_PIN19_INT_ENA_S))
+#define GPIO_PIN19_INT_ENA_V  0x1F
+#define GPIO_PIN19_INT_ENA_S  13
+/* GPIO_PIN19_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN19_CONFIG    0x00000003
+#define GPIO_PIN19_CONFIG_M  ((GPIO_PIN19_CONFIG_V)<<(GPIO_PIN19_CONFIG_S))
+#define GPIO_PIN19_CONFIG_V  0x3
+#define GPIO_PIN19_CONFIG_S  11
+/* GPIO_PIN19_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN19_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN19_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN19_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN19_WAKEUP_ENABLE_S  10
+/* GPIO_PIN19_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN19_INT_TYPE    0x00000007
+#define GPIO_PIN19_INT_TYPE_M  ((GPIO_PIN19_INT_TYPE_V)<<(GPIO_PIN19_INT_TYPE_S))
+#define GPIO_PIN19_INT_TYPE_V  0x7
+#define GPIO_PIN19_INT_TYPE_S  7
+/* GPIO_PIN19_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN19_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN19_SYNC1_BYPASS_M  ((GPIO_PIN19_SYNC1_BYPASS_V)<<(GPIO_PIN19_SYNC1_BYPASS_S))
+#define GPIO_PIN19_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN19_SYNC1_BYPASS_S  3
+/* GPIO_PIN19_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN19_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN19_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN19_PAD_DRIVER_V  0x1
+#define GPIO_PIN19_PAD_DRIVER_S  2
+/* GPIO_PIN19_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN19_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN19_SYNC2_BYPASS_M  ((GPIO_PIN19_SYNC2_BYPASS_V)<<(GPIO_PIN19_SYNC2_BYPASS_S))
+#define GPIO_PIN19_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN19_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN20_REG          (DR_REG_GPIO_BASE + 0xC4)
+/* GPIO_PIN20_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN20_INT_ENA    0x0000001F
+#define GPIO_PIN20_INT_ENA_M  ((GPIO_PIN20_INT_ENA_V)<<(GPIO_PIN20_INT_ENA_S))
+#define GPIO_PIN20_INT_ENA_V  0x1F
+#define GPIO_PIN20_INT_ENA_S  13
+/* GPIO_PIN20_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN20_CONFIG    0x00000003
+#define GPIO_PIN20_CONFIG_M  ((GPIO_PIN20_CONFIG_V)<<(GPIO_PIN20_CONFIG_S))
+#define GPIO_PIN20_CONFIG_V  0x3
+#define GPIO_PIN20_CONFIG_S  11
+/* GPIO_PIN20_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN20_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN20_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN20_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN20_WAKEUP_ENABLE_S  10
+/* GPIO_PIN20_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN20_INT_TYPE    0x00000007
+#define GPIO_PIN20_INT_TYPE_M  ((GPIO_PIN20_INT_TYPE_V)<<(GPIO_PIN20_INT_TYPE_S))
+#define GPIO_PIN20_INT_TYPE_V  0x7
+#define GPIO_PIN20_INT_TYPE_S  7
+/* GPIO_PIN20_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN20_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN20_SYNC1_BYPASS_M  ((GPIO_PIN20_SYNC1_BYPASS_V)<<(GPIO_PIN20_SYNC1_BYPASS_S))
+#define GPIO_PIN20_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN20_SYNC1_BYPASS_S  3
+/* GPIO_PIN20_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN20_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN20_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN20_PAD_DRIVER_V  0x1
+#define GPIO_PIN20_PAD_DRIVER_S  2
+/* GPIO_PIN20_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN20_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN20_SYNC2_BYPASS_M  ((GPIO_PIN20_SYNC2_BYPASS_V)<<(GPIO_PIN20_SYNC2_BYPASS_S))
+#define GPIO_PIN20_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN20_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN21_REG          (DR_REG_GPIO_BASE + 0xC8)
+/* GPIO_PIN21_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN21_INT_ENA    0x0000001F
+#define GPIO_PIN21_INT_ENA_M  ((GPIO_PIN21_INT_ENA_V)<<(GPIO_PIN21_INT_ENA_S))
+#define GPIO_PIN21_INT_ENA_V  0x1F
+#define GPIO_PIN21_INT_ENA_S  13
+/* GPIO_PIN21_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN21_CONFIG    0x00000003
+#define GPIO_PIN21_CONFIG_M  ((GPIO_PIN21_CONFIG_V)<<(GPIO_PIN21_CONFIG_S))
+#define GPIO_PIN21_CONFIG_V  0x3
+#define GPIO_PIN21_CONFIG_S  11
+/* GPIO_PIN21_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN21_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN21_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN21_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN21_WAKEUP_ENABLE_S  10
+/* GPIO_PIN21_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN21_INT_TYPE    0x00000007
+#define GPIO_PIN21_INT_TYPE_M  ((GPIO_PIN21_INT_TYPE_V)<<(GPIO_PIN21_INT_TYPE_S))
+#define GPIO_PIN21_INT_TYPE_V  0x7
+#define GPIO_PIN21_INT_TYPE_S  7
+/* GPIO_PIN21_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN21_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN21_SYNC1_BYPASS_M  ((GPIO_PIN21_SYNC1_BYPASS_V)<<(GPIO_PIN21_SYNC1_BYPASS_S))
+#define GPIO_PIN21_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN21_SYNC1_BYPASS_S  3
+/* GPIO_PIN21_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN21_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN21_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN21_PAD_DRIVER_V  0x1
+#define GPIO_PIN21_PAD_DRIVER_S  2
+/* GPIO_PIN21_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN21_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN21_SYNC2_BYPASS_M  ((GPIO_PIN21_SYNC2_BYPASS_V)<<(GPIO_PIN21_SYNC2_BYPASS_S))
+#define GPIO_PIN21_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN21_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN22_REG          (DR_REG_GPIO_BASE + 0xCC)
+/* GPIO_PIN22_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN22_INT_ENA    0x0000001F
+#define GPIO_PIN22_INT_ENA_M  ((GPIO_PIN22_INT_ENA_V)<<(GPIO_PIN22_INT_ENA_S))
+#define GPIO_PIN22_INT_ENA_V  0x1F
+#define GPIO_PIN22_INT_ENA_S  13
+/* GPIO_PIN22_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN22_CONFIG    0x00000003
+#define GPIO_PIN22_CONFIG_M  ((GPIO_PIN22_CONFIG_V)<<(GPIO_PIN22_CONFIG_S))
+#define GPIO_PIN22_CONFIG_V  0x3
+#define GPIO_PIN22_CONFIG_S  11
+/* GPIO_PIN22_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN22_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN22_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN22_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN22_WAKEUP_ENABLE_S  10
+/* GPIO_PIN22_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN22_INT_TYPE    0x00000007
+#define GPIO_PIN22_INT_TYPE_M  ((GPIO_PIN22_INT_TYPE_V)<<(GPIO_PIN22_INT_TYPE_S))
+#define GPIO_PIN22_INT_TYPE_V  0x7
+#define GPIO_PIN22_INT_TYPE_S  7
+/* GPIO_PIN22_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN22_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN22_SYNC1_BYPASS_M  ((GPIO_PIN22_SYNC1_BYPASS_V)<<(GPIO_PIN22_SYNC1_BYPASS_S))
+#define GPIO_PIN22_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN22_SYNC1_BYPASS_S  3
+/* GPIO_PIN22_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN22_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN22_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN22_PAD_DRIVER_V  0x1
+#define GPIO_PIN22_PAD_DRIVER_S  2
+/* GPIO_PIN22_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN22_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN22_SYNC2_BYPASS_M  ((GPIO_PIN22_SYNC2_BYPASS_V)<<(GPIO_PIN22_SYNC2_BYPASS_S))
+#define GPIO_PIN22_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN22_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN23_REG          (DR_REG_GPIO_BASE + 0xD0)
+/* GPIO_PIN23_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN23_INT_ENA    0x0000001F
+#define GPIO_PIN23_INT_ENA_M  ((GPIO_PIN23_INT_ENA_V)<<(GPIO_PIN23_INT_ENA_S))
+#define GPIO_PIN23_INT_ENA_V  0x1F
+#define GPIO_PIN23_INT_ENA_S  13
+/* GPIO_PIN23_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN23_CONFIG    0x00000003
+#define GPIO_PIN23_CONFIG_M  ((GPIO_PIN23_CONFIG_V)<<(GPIO_PIN23_CONFIG_S))
+#define GPIO_PIN23_CONFIG_V  0x3
+#define GPIO_PIN23_CONFIG_S  11
+/* GPIO_PIN23_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN23_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN23_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN23_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN23_WAKEUP_ENABLE_S  10
+/* GPIO_PIN23_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN23_INT_TYPE    0x00000007
+#define GPIO_PIN23_INT_TYPE_M  ((GPIO_PIN23_INT_TYPE_V)<<(GPIO_PIN23_INT_TYPE_S))
+#define GPIO_PIN23_INT_TYPE_V  0x7
+#define GPIO_PIN23_INT_TYPE_S  7
+/* GPIO_PIN23_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN23_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN23_SYNC1_BYPASS_M  ((GPIO_PIN23_SYNC1_BYPASS_V)<<(GPIO_PIN23_SYNC1_BYPASS_S))
+#define GPIO_PIN23_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN23_SYNC1_BYPASS_S  3
+/* GPIO_PIN23_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN23_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN23_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN23_PAD_DRIVER_V  0x1
+#define GPIO_PIN23_PAD_DRIVER_S  2
+/* GPIO_PIN23_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN23_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN23_SYNC2_BYPASS_M  ((GPIO_PIN23_SYNC2_BYPASS_V)<<(GPIO_PIN23_SYNC2_BYPASS_S))
+#define GPIO_PIN23_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN23_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN24_REG          (DR_REG_GPIO_BASE + 0xD4)
+/* GPIO_PIN24_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN24_INT_ENA    0x0000001F
+#define GPIO_PIN24_INT_ENA_M  ((GPIO_PIN24_INT_ENA_V)<<(GPIO_PIN24_INT_ENA_S))
+#define GPIO_PIN24_INT_ENA_V  0x1F
+#define GPIO_PIN24_INT_ENA_S  13
+/* GPIO_PIN24_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN24_CONFIG    0x00000003
+#define GPIO_PIN24_CONFIG_M  ((GPIO_PIN24_CONFIG_V)<<(GPIO_PIN24_CONFIG_S))
+#define GPIO_PIN24_CONFIG_V  0x3
+#define GPIO_PIN24_CONFIG_S  11
+/* GPIO_PIN24_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN24_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN24_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN24_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN24_WAKEUP_ENABLE_S  10
+/* GPIO_PIN24_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN24_INT_TYPE    0x00000007
+#define GPIO_PIN24_INT_TYPE_M  ((GPIO_PIN24_INT_TYPE_V)<<(GPIO_PIN24_INT_TYPE_S))
+#define GPIO_PIN24_INT_TYPE_V  0x7
+#define GPIO_PIN24_INT_TYPE_S  7
+/* GPIO_PIN24_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN24_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN24_SYNC1_BYPASS_M  ((GPIO_PIN24_SYNC1_BYPASS_V)<<(GPIO_PIN24_SYNC1_BYPASS_S))
+#define GPIO_PIN24_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN24_SYNC1_BYPASS_S  3
+/* GPIO_PIN24_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN24_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN24_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN24_PAD_DRIVER_V  0x1
+#define GPIO_PIN24_PAD_DRIVER_S  2
+/* GPIO_PIN24_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN24_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN24_SYNC2_BYPASS_M  ((GPIO_PIN24_SYNC2_BYPASS_V)<<(GPIO_PIN24_SYNC2_BYPASS_S))
+#define GPIO_PIN24_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN24_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN25_REG          (DR_REG_GPIO_BASE + 0xD8)
+/* GPIO_PIN25_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN25_INT_ENA    0x0000001F
+#define GPIO_PIN25_INT_ENA_M  ((GPIO_PIN25_INT_ENA_V)<<(GPIO_PIN25_INT_ENA_S))
+#define GPIO_PIN25_INT_ENA_V  0x1F
+#define GPIO_PIN25_INT_ENA_S  13
+/* GPIO_PIN25_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN25_CONFIG    0x00000003
+#define GPIO_PIN25_CONFIG_M  ((GPIO_PIN25_CONFIG_V)<<(GPIO_PIN25_CONFIG_S))
+#define GPIO_PIN25_CONFIG_V  0x3
+#define GPIO_PIN25_CONFIG_S  11
+/* GPIO_PIN25_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN25_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN25_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN25_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN25_WAKEUP_ENABLE_S  10
+/* GPIO_PIN25_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN25_INT_TYPE    0x00000007
+#define GPIO_PIN25_INT_TYPE_M  ((GPIO_PIN25_INT_TYPE_V)<<(GPIO_PIN25_INT_TYPE_S))
+#define GPIO_PIN25_INT_TYPE_V  0x7
+#define GPIO_PIN25_INT_TYPE_S  7
+/* GPIO_PIN25_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN25_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN25_SYNC1_BYPASS_M  ((GPIO_PIN25_SYNC1_BYPASS_V)<<(GPIO_PIN25_SYNC1_BYPASS_S))
+#define GPIO_PIN25_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN25_SYNC1_BYPASS_S  3
+/* GPIO_PIN25_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN25_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN25_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN25_PAD_DRIVER_V  0x1
+#define GPIO_PIN25_PAD_DRIVER_S  2
+/* GPIO_PIN25_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN25_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN25_SYNC2_BYPASS_M  ((GPIO_PIN25_SYNC2_BYPASS_V)<<(GPIO_PIN25_SYNC2_BYPASS_S))
+#define GPIO_PIN25_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN25_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN26_REG          (DR_REG_GPIO_BASE + 0xDC)
+/* GPIO_PIN26_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN26_INT_ENA    0x0000001F
+#define GPIO_PIN26_INT_ENA_M  ((GPIO_PIN26_INT_ENA_V)<<(GPIO_PIN26_INT_ENA_S))
+#define GPIO_PIN26_INT_ENA_V  0x1F
+#define GPIO_PIN26_INT_ENA_S  13
+/* GPIO_PIN26_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN26_CONFIG    0x00000003
+#define GPIO_PIN26_CONFIG_M  ((GPIO_PIN26_CONFIG_V)<<(GPIO_PIN26_CONFIG_S))
+#define GPIO_PIN26_CONFIG_V  0x3
+#define GPIO_PIN26_CONFIG_S  11
+/* GPIO_PIN26_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN26_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN26_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN26_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN26_WAKEUP_ENABLE_S  10
+/* GPIO_PIN26_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN26_INT_TYPE    0x00000007
+#define GPIO_PIN26_INT_TYPE_M  ((GPIO_PIN26_INT_TYPE_V)<<(GPIO_PIN26_INT_TYPE_S))
+#define GPIO_PIN26_INT_TYPE_V  0x7
+#define GPIO_PIN26_INT_TYPE_S  7
+/* GPIO_PIN26_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN26_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN26_SYNC1_BYPASS_M  ((GPIO_PIN26_SYNC1_BYPASS_V)<<(GPIO_PIN26_SYNC1_BYPASS_S))
+#define GPIO_PIN26_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN26_SYNC1_BYPASS_S  3
+/* GPIO_PIN26_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN26_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN26_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN26_PAD_DRIVER_V  0x1
+#define GPIO_PIN26_PAD_DRIVER_S  2
+/* GPIO_PIN26_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN26_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN26_SYNC2_BYPASS_M  ((GPIO_PIN26_SYNC2_BYPASS_V)<<(GPIO_PIN26_SYNC2_BYPASS_S))
+#define GPIO_PIN26_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN26_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN27_REG          (DR_REG_GPIO_BASE + 0xE0)
+/* GPIO_PIN27_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN27_INT_ENA    0x0000001F
+#define GPIO_PIN27_INT_ENA_M  ((GPIO_PIN27_INT_ENA_V)<<(GPIO_PIN27_INT_ENA_S))
+#define GPIO_PIN27_INT_ENA_V  0x1F
+#define GPIO_PIN27_INT_ENA_S  13
+/* GPIO_PIN27_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN27_CONFIG    0x00000003
+#define GPIO_PIN27_CONFIG_M  ((GPIO_PIN27_CONFIG_V)<<(GPIO_PIN27_CONFIG_S))
+#define GPIO_PIN27_CONFIG_V  0x3
+#define GPIO_PIN27_CONFIG_S  11
+/* GPIO_PIN27_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN27_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN27_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN27_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN27_WAKEUP_ENABLE_S  10
+/* GPIO_PIN27_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN27_INT_TYPE    0x00000007
+#define GPIO_PIN27_INT_TYPE_M  ((GPIO_PIN27_INT_TYPE_V)<<(GPIO_PIN27_INT_TYPE_S))
+#define GPIO_PIN27_INT_TYPE_V  0x7
+#define GPIO_PIN27_INT_TYPE_S  7
+/* GPIO_PIN27_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN27_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN27_SYNC1_BYPASS_M  ((GPIO_PIN27_SYNC1_BYPASS_V)<<(GPIO_PIN27_SYNC1_BYPASS_S))
+#define GPIO_PIN27_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN27_SYNC1_BYPASS_S  3
+/* GPIO_PIN27_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN27_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN27_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN27_PAD_DRIVER_V  0x1
+#define GPIO_PIN27_PAD_DRIVER_S  2
+/* GPIO_PIN27_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN27_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN27_SYNC2_BYPASS_M  ((GPIO_PIN27_SYNC2_BYPASS_V)<<(GPIO_PIN27_SYNC2_BYPASS_S))
+#define GPIO_PIN27_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN27_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN28_REG          (DR_REG_GPIO_BASE + 0xE4)
+/* GPIO_PIN28_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN28_INT_ENA    0x0000001F
+#define GPIO_PIN28_INT_ENA_M  ((GPIO_PIN28_INT_ENA_V)<<(GPIO_PIN28_INT_ENA_S))
+#define GPIO_PIN28_INT_ENA_V  0x1F
+#define GPIO_PIN28_INT_ENA_S  13
+/* GPIO_PIN28_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN28_CONFIG    0x00000003
+#define GPIO_PIN28_CONFIG_M  ((GPIO_PIN28_CONFIG_V)<<(GPIO_PIN28_CONFIG_S))
+#define GPIO_PIN28_CONFIG_V  0x3
+#define GPIO_PIN28_CONFIG_S  11
+/* GPIO_PIN28_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN28_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN28_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN28_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN28_WAKEUP_ENABLE_S  10
+/* GPIO_PIN28_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN28_INT_TYPE    0x00000007
+#define GPIO_PIN28_INT_TYPE_M  ((GPIO_PIN28_INT_TYPE_V)<<(GPIO_PIN28_INT_TYPE_S))
+#define GPIO_PIN28_INT_TYPE_V  0x7
+#define GPIO_PIN28_INT_TYPE_S  7
+/* GPIO_PIN28_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN28_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN28_SYNC1_BYPASS_M  ((GPIO_PIN28_SYNC1_BYPASS_V)<<(GPIO_PIN28_SYNC1_BYPASS_S))
+#define GPIO_PIN28_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN28_SYNC1_BYPASS_S  3
+/* GPIO_PIN28_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN28_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN28_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN28_PAD_DRIVER_V  0x1
+#define GPIO_PIN28_PAD_DRIVER_S  2
+/* GPIO_PIN28_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN28_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN28_SYNC2_BYPASS_M  ((GPIO_PIN28_SYNC2_BYPASS_V)<<(GPIO_PIN28_SYNC2_BYPASS_S))
+#define GPIO_PIN28_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN28_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN29_REG          (DR_REG_GPIO_BASE + 0xE8)
+/* GPIO_PIN29_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN29_INT_ENA    0x0000001F
+#define GPIO_PIN29_INT_ENA_M  ((GPIO_PIN29_INT_ENA_V)<<(GPIO_PIN29_INT_ENA_S))
+#define GPIO_PIN29_INT_ENA_V  0x1F
+#define GPIO_PIN29_INT_ENA_S  13
+/* GPIO_PIN29_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN29_CONFIG    0x00000003
+#define GPIO_PIN29_CONFIG_M  ((GPIO_PIN29_CONFIG_V)<<(GPIO_PIN29_CONFIG_S))
+#define GPIO_PIN29_CONFIG_V  0x3
+#define GPIO_PIN29_CONFIG_S  11
+/* GPIO_PIN29_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN29_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN29_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN29_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN29_WAKEUP_ENABLE_S  10
+/* GPIO_PIN29_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN29_INT_TYPE    0x00000007
+#define GPIO_PIN29_INT_TYPE_M  ((GPIO_PIN29_INT_TYPE_V)<<(GPIO_PIN29_INT_TYPE_S))
+#define GPIO_PIN29_INT_TYPE_V  0x7
+#define GPIO_PIN29_INT_TYPE_S  7
+/* GPIO_PIN29_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN29_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN29_SYNC1_BYPASS_M  ((GPIO_PIN29_SYNC1_BYPASS_V)<<(GPIO_PIN29_SYNC1_BYPASS_S))
+#define GPIO_PIN29_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN29_SYNC1_BYPASS_S  3
+/* GPIO_PIN29_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN29_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN29_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN29_PAD_DRIVER_V  0x1
+#define GPIO_PIN29_PAD_DRIVER_S  2
+/* GPIO_PIN29_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN29_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN29_SYNC2_BYPASS_M  ((GPIO_PIN29_SYNC2_BYPASS_V)<<(GPIO_PIN29_SYNC2_BYPASS_S))
+#define GPIO_PIN29_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN29_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN30_REG          (DR_REG_GPIO_BASE + 0xEC)
+/* GPIO_PIN30_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN30_INT_ENA    0x0000001F
+#define GPIO_PIN30_INT_ENA_M  ((GPIO_PIN30_INT_ENA_V)<<(GPIO_PIN30_INT_ENA_S))
+#define GPIO_PIN30_INT_ENA_V  0x1F
+#define GPIO_PIN30_INT_ENA_S  13
+/* GPIO_PIN30_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN30_CONFIG    0x00000003
+#define GPIO_PIN30_CONFIG_M  ((GPIO_PIN30_CONFIG_V)<<(GPIO_PIN30_CONFIG_S))
+#define GPIO_PIN30_CONFIG_V  0x3
+#define GPIO_PIN30_CONFIG_S  11
+/* GPIO_PIN30_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN30_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN30_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN30_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN30_WAKEUP_ENABLE_S  10
+/* GPIO_PIN30_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN30_INT_TYPE    0x00000007
+#define GPIO_PIN30_INT_TYPE_M  ((GPIO_PIN30_INT_TYPE_V)<<(GPIO_PIN30_INT_TYPE_S))
+#define GPIO_PIN30_INT_TYPE_V  0x7
+#define GPIO_PIN30_INT_TYPE_S  7
+/* GPIO_PIN30_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN30_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN30_SYNC1_BYPASS_M  ((GPIO_PIN30_SYNC1_BYPASS_V)<<(GPIO_PIN30_SYNC1_BYPASS_S))
+#define GPIO_PIN30_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN30_SYNC1_BYPASS_S  3
+/* GPIO_PIN30_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN30_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN30_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN30_PAD_DRIVER_V  0x1
+#define GPIO_PIN30_PAD_DRIVER_S  2
+/* GPIO_PIN30_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN30_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN30_SYNC2_BYPASS_M  ((GPIO_PIN30_SYNC2_BYPASS_V)<<(GPIO_PIN30_SYNC2_BYPASS_S))
+#define GPIO_PIN30_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN30_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN31_REG          (DR_REG_GPIO_BASE + 0xF0)
+/* GPIO_PIN31_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN31_INT_ENA    0x0000001F
+#define GPIO_PIN31_INT_ENA_M  ((GPIO_PIN31_INT_ENA_V)<<(GPIO_PIN31_INT_ENA_S))
+#define GPIO_PIN31_INT_ENA_V  0x1F
+#define GPIO_PIN31_INT_ENA_S  13
+/* GPIO_PIN31_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN31_CONFIG    0x00000003
+#define GPIO_PIN31_CONFIG_M  ((GPIO_PIN31_CONFIG_V)<<(GPIO_PIN31_CONFIG_S))
+#define GPIO_PIN31_CONFIG_V  0x3
+#define GPIO_PIN31_CONFIG_S  11
+/* GPIO_PIN31_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN31_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN31_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN31_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN31_WAKEUP_ENABLE_S  10
+/* GPIO_PIN31_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN31_INT_TYPE    0x00000007
+#define GPIO_PIN31_INT_TYPE_M  ((GPIO_PIN31_INT_TYPE_V)<<(GPIO_PIN31_INT_TYPE_S))
+#define GPIO_PIN31_INT_TYPE_V  0x7
+#define GPIO_PIN31_INT_TYPE_S  7
+/* GPIO_PIN31_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN31_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN31_SYNC1_BYPASS_M  ((GPIO_PIN31_SYNC1_BYPASS_V)<<(GPIO_PIN31_SYNC1_BYPASS_S))
+#define GPIO_PIN31_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN31_SYNC1_BYPASS_S  3
+/* GPIO_PIN31_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN31_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN31_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN31_PAD_DRIVER_V  0x1
+#define GPIO_PIN31_PAD_DRIVER_S  2
+/* GPIO_PIN31_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN31_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN31_SYNC2_BYPASS_M  ((GPIO_PIN31_SYNC2_BYPASS_V)<<(GPIO_PIN31_SYNC2_BYPASS_S))
+#define GPIO_PIN31_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN31_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN32_REG          (DR_REG_GPIO_BASE + 0xF4)
+/* GPIO_PIN32_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN32_INT_ENA    0x0000001F
+#define GPIO_PIN32_INT_ENA_M  ((GPIO_PIN32_INT_ENA_V)<<(GPIO_PIN32_INT_ENA_S))
+#define GPIO_PIN32_INT_ENA_V  0x1F
+#define GPIO_PIN32_INT_ENA_S  13
+/* GPIO_PIN32_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN32_CONFIG    0x00000003
+#define GPIO_PIN32_CONFIG_M  ((GPIO_PIN32_CONFIG_V)<<(GPIO_PIN32_CONFIG_S))
+#define GPIO_PIN32_CONFIG_V  0x3
+#define GPIO_PIN32_CONFIG_S  11
+/* GPIO_PIN32_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN32_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN32_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN32_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN32_WAKEUP_ENABLE_S  10
+/* GPIO_PIN32_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN32_INT_TYPE    0x00000007
+#define GPIO_PIN32_INT_TYPE_M  ((GPIO_PIN32_INT_TYPE_V)<<(GPIO_PIN32_INT_TYPE_S))
+#define GPIO_PIN32_INT_TYPE_V  0x7
+#define GPIO_PIN32_INT_TYPE_S  7
+/* GPIO_PIN32_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN32_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN32_SYNC1_BYPASS_M  ((GPIO_PIN32_SYNC1_BYPASS_V)<<(GPIO_PIN32_SYNC1_BYPASS_S))
+#define GPIO_PIN32_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN32_SYNC1_BYPASS_S  3
+/* GPIO_PIN32_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN32_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN32_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN32_PAD_DRIVER_V  0x1
+#define GPIO_PIN32_PAD_DRIVER_S  2
+/* GPIO_PIN32_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN32_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN32_SYNC2_BYPASS_M  ((GPIO_PIN32_SYNC2_BYPASS_V)<<(GPIO_PIN32_SYNC2_BYPASS_S))
+#define GPIO_PIN32_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN32_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN33_REG          (DR_REG_GPIO_BASE + 0xF8)
+/* GPIO_PIN33_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN33_INT_ENA    0x0000001F
+#define GPIO_PIN33_INT_ENA_M  ((GPIO_PIN33_INT_ENA_V)<<(GPIO_PIN33_INT_ENA_S))
+#define GPIO_PIN33_INT_ENA_V  0x1F
+#define GPIO_PIN33_INT_ENA_S  13
+/* GPIO_PIN33_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN33_CONFIG    0x00000003
+#define GPIO_PIN33_CONFIG_M  ((GPIO_PIN33_CONFIG_V)<<(GPIO_PIN33_CONFIG_S))
+#define GPIO_PIN33_CONFIG_V  0x3
+#define GPIO_PIN33_CONFIG_S  11
+/* GPIO_PIN33_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN33_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN33_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN33_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN33_WAKEUP_ENABLE_S  10
+/* GPIO_PIN33_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN33_INT_TYPE    0x00000007
+#define GPIO_PIN33_INT_TYPE_M  ((GPIO_PIN33_INT_TYPE_V)<<(GPIO_PIN33_INT_TYPE_S))
+#define GPIO_PIN33_INT_TYPE_V  0x7
+#define GPIO_PIN33_INT_TYPE_S  7
+/* GPIO_PIN33_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN33_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN33_SYNC1_BYPASS_M  ((GPIO_PIN33_SYNC1_BYPASS_V)<<(GPIO_PIN33_SYNC1_BYPASS_S))
+#define GPIO_PIN33_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN33_SYNC1_BYPASS_S  3
+/* GPIO_PIN33_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN33_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN33_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN33_PAD_DRIVER_V  0x1
+#define GPIO_PIN33_PAD_DRIVER_S  2
+/* GPIO_PIN33_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN33_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN33_SYNC2_BYPASS_M  ((GPIO_PIN33_SYNC2_BYPASS_V)<<(GPIO_PIN33_SYNC2_BYPASS_S))
+#define GPIO_PIN33_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN33_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN34_REG          (DR_REG_GPIO_BASE + 0xFC)
+/* GPIO_PIN34_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN34_INT_ENA    0x0000001F
+#define GPIO_PIN34_INT_ENA_M  ((GPIO_PIN34_INT_ENA_V)<<(GPIO_PIN34_INT_ENA_S))
+#define GPIO_PIN34_INT_ENA_V  0x1F
+#define GPIO_PIN34_INT_ENA_S  13
+/* GPIO_PIN34_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN34_CONFIG    0x00000003
+#define GPIO_PIN34_CONFIG_M  ((GPIO_PIN34_CONFIG_V)<<(GPIO_PIN34_CONFIG_S))
+#define GPIO_PIN34_CONFIG_V  0x3
+#define GPIO_PIN34_CONFIG_S  11
+/* GPIO_PIN34_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN34_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN34_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN34_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN34_WAKEUP_ENABLE_S  10
+/* GPIO_PIN34_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN34_INT_TYPE    0x00000007
+#define GPIO_PIN34_INT_TYPE_M  ((GPIO_PIN34_INT_TYPE_V)<<(GPIO_PIN34_INT_TYPE_S))
+#define GPIO_PIN34_INT_TYPE_V  0x7
+#define GPIO_PIN34_INT_TYPE_S  7
+/* GPIO_PIN34_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN34_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN34_SYNC1_BYPASS_M  ((GPIO_PIN34_SYNC1_BYPASS_V)<<(GPIO_PIN34_SYNC1_BYPASS_S))
+#define GPIO_PIN34_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN34_SYNC1_BYPASS_S  3
+/* GPIO_PIN34_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN34_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN34_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN34_PAD_DRIVER_V  0x1
+#define GPIO_PIN34_PAD_DRIVER_S  2
+/* GPIO_PIN34_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN34_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN34_SYNC2_BYPASS_M  ((GPIO_PIN34_SYNC2_BYPASS_V)<<(GPIO_PIN34_SYNC2_BYPASS_S))
+#define GPIO_PIN34_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN34_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN35_REG          (DR_REG_GPIO_BASE + 0x100)
+/* GPIO_PIN35_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN35_INT_ENA    0x0000001F
+#define GPIO_PIN35_INT_ENA_M  ((GPIO_PIN35_INT_ENA_V)<<(GPIO_PIN35_INT_ENA_S))
+#define GPIO_PIN35_INT_ENA_V  0x1F
+#define GPIO_PIN35_INT_ENA_S  13
+/* GPIO_PIN35_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN35_CONFIG    0x00000003
+#define GPIO_PIN35_CONFIG_M  ((GPIO_PIN35_CONFIG_V)<<(GPIO_PIN35_CONFIG_S))
+#define GPIO_PIN35_CONFIG_V  0x3
+#define GPIO_PIN35_CONFIG_S  11
+/* GPIO_PIN35_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN35_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN35_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN35_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN35_WAKEUP_ENABLE_S  10
+/* GPIO_PIN35_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN35_INT_TYPE    0x00000007
+#define GPIO_PIN35_INT_TYPE_M  ((GPIO_PIN35_INT_TYPE_V)<<(GPIO_PIN35_INT_TYPE_S))
+#define GPIO_PIN35_INT_TYPE_V  0x7
+#define GPIO_PIN35_INT_TYPE_S  7
+/* GPIO_PIN35_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN35_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN35_SYNC1_BYPASS_M  ((GPIO_PIN35_SYNC1_BYPASS_V)<<(GPIO_PIN35_SYNC1_BYPASS_S))
+#define GPIO_PIN35_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN35_SYNC1_BYPASS_S  3
+/* GPIO_PIN35_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN35_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN35_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN35_PAD_DRIVER_V  0x1
+#define GPIO_PIN35_PAD_DRIVER_S  2
+/* GPIO_PIN35_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN35_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN35_SYNC2_BYPASS_M  ((GPIO_PIN35_SYNC2_BYPASS_V)<<(GPIO_PIN35_SYNC2_BYPASS_S))
+#define GPIO_PIN35_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN35_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN36_REG          (DR_REG_GPIO_BASE + 0x104)
+/* GPIO_PIN36_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN36_INT_ENA    0x0000001F
+#define GPIO_PIN36_INT_ENA_M  ((GPIO_PIN36_INT_ENA_V)<<(GPIO_PIN36_INT_ENA_S))
+#define GPIO_PIN36_INT_ENA_V  0x1F
+#define GPIO_PIN36_INT_ENA_S  13
+/* GPIO_PIN36_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN36_CONFIG    0x00000003
+#define GPIO_PIN36_CONFIG_M  ((GPIO_PIN36_CONFIG_V)<<(GPIO_PIN36_CONFIG_S))
+#define GPIO_PIN36_CONFIG_V  0x3
+#define GPIO_PIN36_CONFIG_S  11
+/* GPIO_PIN36_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN36_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN36_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN36_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN36_WAKEUP_ENABLE_S  10
+/* GPIO_PIN36_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN36_INT_TYPE    0x00000007
+#define GPIO_PIN36_INT_TYPE_M  ((GPIO_PIN36_INT_TYPE_V)<<(GPIO_PIN36_INT_TYPE_S))
+#define GPIO_PIN36_INT_TYPE_V  0x7
+#define GPIO_PIN36_INT_TYPE_S  7
+/* GPIO_PIN36_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN36_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN36_SYNC1_BYPASS_M  ((GPIO_PIN36_SYNC1_BYPASS_V)<<(GPIO_PIN36_SYNC1_BYPASS_S))
+#define GPIO_PIN36_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN36_SYNC1_BYPASS_S  3
+/* GPIO_PIN36_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN36_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN36_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN36_PAD_DRIVER_V  0x1
+#define GPIO_PIN36_PAD_DRIVER_S  2
+/* GPIO_PIN36_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN36_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN36_SYNC2_BYPASS_M  ((GPIO_PIN36_SYNC2_BYPASS_V)<<(GPIO_PIN36_SYNC2_BYPASS_S))
+#define GPIO_PIN36_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN36_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN37_REG          (DR_REG_GPIO_BASE + 0x108)
+/* GPIO_PIN37_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN37_INT_ENA    0x0000001F
+#define GPIO_PIN37_INT_ENA_M  ((GPIO_PIN37_INT_ENA_V)<<(GPIO_PIN37_INT_ENA_S))
+#define GPIO_PIN37_INT_ENA_V  0x1F
+#define GPIO_PIN37_INT_ENA_S  13
+/* GPIO_PIN37_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN37_CONFIG    0x00000003
+#define GPIO_PIN37_CONFIG_M  ((GPIO_PIN37_CONFIG_V)<<(GPIO_PIN37_CONFIG_S))
+#define GPIO_PIN37_CONFIG_V  0x3
+#define GPIO_PIN37_CONFIG_S  11
+/* GPIO_PIN37_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN37_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN37_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN37_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN37_WAKEUP_ENABLE_S  10
+/* GPIO_PIN37_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN37_INT_TYPE    0x00000007
+#define GPIO_PIN37_INT_TYPE_M  ((GPIO_PIN37_INT_TYPE_V)<<(GPIO_PIN37_INT_TYPE_S))
+#define GPIO_PIN37_INT_TYPE_V  0x7
+#define GPIO_PIN37_INT_TYPE_S  7
+/* GPIO_PIN37_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN37_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN37_SYNC1_BYPASS_M  ((GPIO_PIN37_SYNC1_BYPASS_V)<<(GPIO_PIN37_SYNC1_BYPASS_S))
+#define GPIO_PIN37_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN37_SYNC1_BYPASS_S  3
+/* GPIO_PIN37_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN37_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN37_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN37_PAD_DRIVER_V  0x1
+#define GPIO_PIN37_PAD_DRIVER_S  2
+/* GPIO_PIN37_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN37_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN37_SYNC2_BYPASS_M  ((GPIO_PIN37_SYNC2_BYPASS_V)<<(GPIO_PIN37_SYNC2_BYPASS_S))
+#define GPIO_PIN37_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN37_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN38_REG          (DR_REG_GPIO_BASE + 0x10C)
+/* GPIO_PIN38_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN38_INT_ENA    0x0000001F
+#define GPIO_PIN38_INT_ENA_M  ((GPIO_PIN38_INT_ENA_V)<<(GPIO_PIN38_INT_ENA_S))
+#define GPIO_PIN38_INT_ENA_V  0x1F
+#define GPIO_PIN38_INT_ENA_S  13
+/* GPIO_PIN38_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN38_CONFIG    0x00000003
+#define GPIO_PIN38_CONFIG_M  ((GPIO_PIN38_CONFIG_V)<<(GPIO_PIN38_CONFIG_S))
+#define GPIO_PIN38_CONFIG_V  0x3
+#define GPIO_PIN38_CONFIG_S  11
+/* GPIO_PIN38_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN38_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN38_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN38_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN38_WAKEUP_ENABLE_S  10
+/* GPIO_PIN38_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN38_INT_TYPE    0x00000007
+#define GPIO_PIN38_INT_TYPE_M  ((GPIO_PIN38_INT_TYPE_V)<<(GPIO_PIN38_INT_TYPE_S))
+#define GPIO_PIN38_INT_TYPE_V  0x7
+#define GPIO_PIN38_INT_TYPE_S  7
+/* GPIO_PIN38_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN38_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN38_SYNC1_BYPASS_M  ((GPIO_PIN38_SYNC1_BYPASS_V)<<(GPIO_PIN38_SYNC1_BYPASS_S))
+#define GPIO_PIN38_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN38_SYNC1_BYPASS_S  3
+/* GPIO_PIN38_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN38_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN38_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN38_PAD_DRIVER_V  0x1
+#define GPIO_PIN38_PAD_DRIVER_S  2
+/* GPIO_PIN38_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN38_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN38_SYNC2_BYPASS_M  ((GPIO_PIN38_SYNC2_BYPASS_V)<<(GPIO_PIN38_SYNC2_BYPASS_S))
+#define GPIO_PIN38_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN38_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN39_REG          (DR_REG_GPIO_BASE + 0x110)
+/* GPIO_PIN39_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN39_INT_ENA    0x0000001F
+#define GPIO_PIN39_INT_ENA_M  ((GPIO_PIN39_INT_ENA_V)<<(GPIO_PIN39_INT_ENA_S))
+#define GPIO_PIN39_INT_ENA_V  0x1F
+#define GPIO_PIN39_INT_ENA_S  13
+/* GPIO_PIN39_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN39_CONFIG    0x00000003
+#define GPIO_PIN39_CONFIG_M  ((GPIO_PIN39_CONFIG_V)<<(GPIO_PIN39_CONFIG_S))
+#define GPIO_PIN39_CONFIG_V  0x3
+#define GPIO_PIN39_CONFIG_S  11
+/* GPIO_PIN39_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN39_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN39_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN39_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN39_WAKEUP_ENABLE_S  10
+/* GPIO_PIN39_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN39_INT_TYPE    0x00000007
+#define GPIO_PIN39_INT_TYPE_M  ((GPIO_PIN39_INT_TYPE_V)<<(GPIO_PIN39_INT_TYPE_S))
+#define GPIO_PIN39_INT_TYPE_V  0x7
+#define GPIO_PIN39_INT_TYPE_S  7
+/* GPIO_PIN39_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN39_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN39_SYNC1_BYPASS_M  ((GPIO_PIN39_SYNC1_BYPASS_V)<<(GPIO_PIN39_SYNC1_BYPASS_S))
+#define GPIO_PIN39_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN39_SYNC1_BYPASS_S  3
+/* GPIO_PIN39_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN39_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN39_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN39_PAD_DRIVER_V  0x1
+#define GPIO_PIN39_PAD_DRIVER_S  2
+/* GPIO_PIN39_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN39_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN39_SYNC2_BYPASS_M  ((GPIO_PIN39_SYNC2_BYPASS_V)<<(GPIO_PIN39_SYNC2_BYPASS_S))
+#define GPIO_PIN39_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN39_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN40_REG          (DR_REG_GPIO_BASE + 0x114)
+/* GPIO_PIN40_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN40_INT_ENA    0x0000001F
+#define GPIO_PIN40_INT_ENA_M  ((GPIO_PIN40_INT_ENA_V)<<(GPIO_PIN40_INT_ENA_S))
+#define GPIO_PIN40_INT_ENA_V  0x1F
+#define GPIO_PIN40_INT_ENA_S  13
+/* GPIO_PIN40_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN40_CONFIG    0x00000003
+#define GPIO_PIN40_CONFIG_M  ((GPIO_PIN40_CONFIG_V)<<(GPIO_PIN40_CONFIG_S))
+#define GPIO_PIN40_CONFIG_V  0x3
+#define GPIO_PIN40_CONFIG_S  11
+/* GPIO_PIN40_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN40_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN40_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN40_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN40_WAKEUP_ENABLE_S  10
+/* GPIO_PIN40_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN40_INT_TYPE    0x00000007
+#define GPIO_PIN40_INT_TYPE_M  ((GPIO_PIN40_INT_TYPE_V)<<(GPIO_PIN40_INT_TYPE_S))
+#define GPIO_PIN40_INT_TYPE_V  0x7
+#define GPIO_PIN40_INT_TYPE_S  7
+/* GPIO_PIN40_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN40_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN40_SYNC1_BYPASS_M  ((GPIO_PIN40_SYNC1_BYPASS_V)<<(GPIO_PIN40_SYNC1_BYPASS_S))
+#define GPIO_PIN40_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN40_SYNC1_BYPASS_S  3
+/* GPIO_PIN40_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN40_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN40_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN40_PAD_DRIVER_V  0x1
+#define GPIO_PIN40_PAD_DRIVER_S  2
+/* GPIO_PIN40_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN40_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN40_SYNC2_BYPASS_M  ((GPIO_PIN40_SYNC2_BYPASS_V)<<(GPIO_PIN40_SYNC2_BYPASS_S))
+#define GPIO_PIN40_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN40_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN41_REG          (DR_REG_GPIO_BASE + 0x118)
+/* GPIO_PIN41_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN41_INT_ENA    0x0000001F
+#define GPIO_PIN41_INT_ENA_M  ((GPIO_PIN41_INT_ENA_V)<<(GPIO_PIN41_INT_ENA_S))
+#define GPIO_PIN41_INT_ENA_V  0x1F
+#define GPIO_PIN41_INT_ENA_S  13
+/* GPIO_PIN41_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN41_CONFIG    0x00000003
+#define GPIO_PIN41_CONFIG_M  ((GPIO_PIN41_CONFIG_V)<<(GPIO_PIN41_CONFIG_S))
+#define GPIO_PIN41_CONFIG_V  0x3
+#define GPIO_PIN41_CONFIG_S  11
+/* GPIO_PIN41_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN41_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN41_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN41_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN41_WAKEUP_ENABLE_S  10
+/* GPIO_PIN41_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN41_INT_TYPE    0x00000007
+#define GPIO_PIN41_INT_TYPE_M  ((GPIO_PIN41_INT_TYPE_V)<<(GPIO_PIN41_INT_TYPE_S))
+#define GPIO_PIN41_INT_TYPE_V  0x7
+#define GPIO_PIN41_INT_TYPE_S  7
+/* GPIO_PIN41_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN41_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN41_SYNC1_BYPASS_M  ((GPIO_PIN41_SYNC1_BYPASS_V)<<(GPIO_PIN41_SYNC1_BYPASS_S))
+#define GPIO_PIN41_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN41_SYNC1_BYPASS_S  3
+/* GPIO_PIN41_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN41_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN41_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN41_PAD_DRIVER_V  0x1
+#define GPIO_PIN41_PAD_DRIVER_S  2
+/* GPIO_PIN41_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN41_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN41_SYNC2_BYPASS_M  ((GPIO_PIN41_SYNC2_BYPASS_V)<<(GPIO_PIN41_SYNC2_BYPASS_S))
+#define GPIO_PIN41_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN41_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN42_REG          (DR_REG_GPIO_BASE + 0x11C)
+/* GPIO_PIN42_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN42_INT_ENA    0x0000001F
+#define GPIO_PIN42_INT_ENA_M  ((GPIO_PIN42_INT_ENA_V)<<(GPIO_PIN42_INT_ENA_S))
+#define GPIO_PIN42_INT_ENA_V  0x1F
+#define GPIO_PIN42_INT_ENA_S  13
+/* GPIO_PIN42_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN42_CONFIG    0x00000003
+#define GPIO_PIN42_CONFIG_M  ((GPIO_PIN42_CONFIG_V)<<(GPIO_PIN42_CONFIG_S))
+#define GPIO_PIN42_CONFIG_V  0x3
+#define GPIO_PIN42_CONFIG_S  11
+/* GPIO_PIN42_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN42_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN42_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN42_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN42_WAKEUP_ENABLE_S  10
+/* GPIO_PIN42_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN42_INT_TYPE    0x00000007
+#define GPIO_PIN42_INT_TYPE_M  ((GPIO_PIN42_INT_TYPE_V)<<(GPIO_PIN42_INT_TYPE_S))
+#define GPIO_PIN42_INT_TYPE_V  0x7
+#define GPIO_PIN42_INT_TYPE_S  7
+/* GPIO_PIN42_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN42_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN42_SYNC1_BYPASS_M  ((GPIO_PIN42_SYNC1_BYPASS_V)<<(GPIO_PIN42_SYNC1_BYPASS_S))
+#define GPIO_PIN42_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN42_SYNC1_BYPASS_S  3
+/* GPIO_PIN42_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN42_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN42_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN42_PAD_DRIVER_V  0x1
+#define GPIO_PIN42_PAD_DRIVER_S  2
+/* GPIO_PIN42_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN42_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN42_SYNC2_BYPASS_M  ((GPIO_PIN42_SYNC2_BYPASS_V)<<(GPIO_PIN42_SYNC2_BYPASS_S))
+#define GPIO_PIN42_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN42_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN43_REG          (DR_REG_GPIO_BASE + 0x120)
+/* GPIO_PIN43_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN43_INT_ENA    0x0000001F
+#define GPIO_PIN43_INT_ENA_M  ((GPIO_PIN43_INT_ENA_V)<<(GPIO_PIN43_INT_ENA_S))
+#define GPIO_PIN43_INT_ENA_V  0x1F
+#define GPIO_PIN43_INT_ENA_S  13
+/* GPIO_PIN43_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN43_CONFIG    0x00000003
+#define GPIO_PIN43_CONFIG_M  ((GPIO_PIN43_CONFIG_V)<<(GPIO_PIN43_CONFIG_S))
+#define GPIO_PIN43_CONFIG_V  0x3
+#define GPIO_PIN43_CONFIG_S  11
+/* GPIO_PIN43_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN43_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN43_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN43_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN43_WAKEUP_ENABLE_S  10
+/* GPIO_PIN43_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN43_INT_TYPE    0x00000007
+#define GPIO_PIN43_INT_TYPE_M  ((GPIO_PIN43_INT_TYPE_V)<<(GPIO_PIN43_INT_TYPE_S))
+#define GPIO_PIN43_INT_TYPE_V  0x7
+#define GPIO_PIN43_INT_TYPE_S  7
+/* GPIO_PIN43_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN43_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN43_SYNC1_BYPASS_M  ((GPIO_PIN43_SYNC1_BYPASS_V)<<(GPIO_PIN43_SYNC1_BYPASS_S))
+#define GPIO_PIN43_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN43_SYNC1_BYPASS_S  3
+/* GPIO_PIN43_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN43_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN43_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN43_PAD_DRIVER_V  0x1
+#define GPIO_PIN43_PAD_DRIVER_S  2
+/* GPIO_PIN43_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN43_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN43_SYNC2_BYPASS_M  ((GPIO_PIN43_SYNC2_BYPASS_V)<<(GPIO_PIN43_SYNC2_BYPASS_S))
+#define GPIO_PIN43_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN43_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN44_REG          (DR_REG_GPIO_BASE + 0x124)
+/* GPIO_PIN44_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN44_INT_ENA    0x0000001F
+#define GPIO_PIN44_INT_ENA_M  ((GPIO_PIN44_INT_ENA_V)<<(GPIO_PIN44_INT_ENA_S))
+#define GPIO_PIN44_INT_ENA_V  0x1F
+#define GPIO_PIN44_INT_ENA_S  13
+/* GPIO_PIN44_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN44_CONFIG    0x00000003
+#define GPIO_PIN44_CONFIG_M  ((GPIO_PIN44_CONFIG_V)<<(GPIO_PIN44_CONFIG_S))
+#define GPIO_PIN44_CONFIG_V  0x3
+#define GPIO_PIN44_CONFIG_S  11
+/* GPIO_PIN44_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN44_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN44_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN44_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN44_WAKEUP_ENABLE_S  10
+/* GPIO_PIN44_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN44_INT_TYPE    0x00000007
+#define GPIO_PIN44_INT_TYPE_M  ((GPIO_PIN44_INT_TYPE_V)<<(GPIO_PIN44_INT_TYPE_S))
+#define GPIO_PIN44_INT_TYPE_V  0x7
+#define GPIO_PIN44_INT_TYPE_S  7
+/* GPIO_PIN44_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN44_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN44_SYNC1_BYPASS_M  ((GPIO_PIN44_SYNC1_BYPASS_V)<<(GPIO_PIN44_SYNC1_BYPASS_S))
+#define GPIO_PIN44_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN44_SYNC1_BYPASS_S  3
+/* GPIO_PIN44_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN44_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN44_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN44_PAD_DRIVER_V  0x1
+#define GPIO_PIN44_PAD_DRIVER_S  2
+/* GPIO_PIN44_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN44_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN44_SYNC2_BYPASS_M  ((GPIO_PIN44_SYNC2_BYPASS_V)<<(GPIO_PIN44_SYNC2_BYPASS_S))
+#define GPIO_PIN44_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN44_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN45_REG          (DR_REG_GPIO_BASE + 0x128)
+/* GPIO_PIN45_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN45_INT_ENA    0x0000001F
+#define GPIO_PIN45_INT_ENA_M  ((GPIO_PIN45_INT_ENA_V)<<(GPIO_PIN45_INT_ENA_S))
+#define GPIO_PIN45_INT_ENA_V  0x1F
+#define GPIO_PIN45_INT_ENA_S  13
+/* GPIO_PIN45_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN45_CONFIG    0x00000003
+#define GPIO_PIN45_CONFIG_M  ((GPIO_PIN45_CONFIG_V)<<(GPIO_PIN45_CONFIG_S))
+#define GPIO_PIN45_CONFIG_V  0x3
+#define GPIO_PIN45_CONFIG_S  11
+/* GPIO_PIN45_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN45_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN45_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN45_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN45_WAKEUP_ENABLE_S  10
+/* GPIO_PIN45_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN45_INT_TYPE    0x00000007
+#define GPIO_PIN45_INT_TYPE_M  ((GPIO_PIN45_INT_TYPE_V)<<(GPIO_PIN45_INT_TYPE_S))
+#define GPIO_PIN45_INT_TYPE_V  0x7
+#define GPIO_PIN45_INT_TYPE_S  7
+/* GPIO_PIN45_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN45_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN45_SYNC1_BYPASS_M  ((GPIO_PIN45_SYNC1_BYPASS_V)<<(GPIO_PIN45_SYNC1_BYPASS_S))
+#define GPIO_PIN45_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN45_SYNC1_BYPASS_S  3
+/* GPIO_PIN45_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN45_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN45_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN45_PAD_DRIVER_V  0x1
+#define GPIO_PIN45_PAD_DRIVER_S  2
+/* GPIO_PIN45_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN45_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN45_SYNC2_BYPASS_M  ((GPIO_PIN45_SYNC2_BYPASS_V)<<(GPIO_PIN45_SYNC2_BYPASS_S))
+#define GPIO_PIN45_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN45_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN46_REG          (DR_REG_GPIO_BASE + 0x12C)
+/* GPIO_PIN46_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN46_INT_ENA    0x0000001F
+#define GPIO_PIN46_INT_ENA_M  ((GPIO_PIN46_INT_ENA_V)<<(GPIO_PIN46_INT_ENA_S))
+#define GPIO_PIN46_INT_ENA_V  0x1F
+#define GPIO_PIN46_INT_ENA_S  13
+/* GPIO_PIN46_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN46_CONFIG    0x00000003
+#define GPIO_PIN46_CONFIG_M  ((GPIO_PIN46_CONFIG_V)<<(GPIO_PIN46_CONFIG_S))
+#define GPIO_PIN46_CONFIG_V  0x3
+#define GPIO_PIN46_CONFIG_S  11
+/* GPIO_PIN46_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN46_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN46_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN46_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN46_WAKEUP_ENABLE_S  10
+/* GPIO_PIN46_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN46_INT_TYPE    0x00000007
+#define GPIO_PIN46_INT_TYPE_M  ((GPIO_PIN46_INT_TYPE_V)<<(GPIO_PIN46_INT_TYPE_S))
+#define GPIO_PIN46_INT_TYPE_V  0x7
+#define GPIO_PIN46_INT_TYPE_S  7
+/* GPIO_PIN46_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN46_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN46_SYNC1_BYPASS_M  ((GPIO_PIN46_SYNC1_BYPASS_V)<<(GPIO_PIN46_SYNC1_BYPASS_S))
+#define GPIO_PIN46_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN46_SYNC1_BYPASS_S  3
+/* GPIO_PIN46_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN46_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN46_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN46_PAD_DRIVER_V  0x1
+#define GPIO_PIN46_PAD_DRIVER_S  2
+/* GPIO_PIN46_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN46_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN46_SYNC2_BYPASS_M  ((GPIO_PIN46_SYNC2_BYPASS_V)<<(GPIO_PIN46_SYNC2_BYPASS_S))
+#define GPIO_PIN46_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN46_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN47_REG          (DR_REG_GPIO_BASE + 0x130)
+/* GPIO_PIN47_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN47_INT_ENA    0x0000001F
+#define GPIO_PIN47_INT_ENA_M  ((GPIO_PIN47_INT_ENA_V)<<(GPIO_PIN47_INT_ENA_S))
+#define GPIO_PIN47_INT_ENA_V  0x1F
+#define GPIO_PIN47_INT_ENA_S  13
+/* GPIO_PIN47_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN47_CONFIG    0x00000003
+#define GPIO_PIN47_CONFIG_M  ((GPIO_PIN47_CONFIG_V)<<(GPIO_PIN47_CONFIG_S))
+#define GPIO_PIN47_CONFIG_V  0x3
+#define GPIO_PIN47_CONFIG_S  11
+/* GPIO_PIN47_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN47_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN47_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN47_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN47_WAKEUP_ENABLE_S  10
+/* GPIO_PIN47_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN47_INT_TYPE    0x00000007
+#define GPIO_PIN47_INT_TYPE_M  ((GPIO_PIN47_INT_TYPE_V)<<(GPIO_PIN47_INT_TYPE_S))
+#define GPIO_PIN47_INT_TYPE_V  0x7
+#define GPIO_PIN47_INT_TYPE_S  7
+/* GPIO_PIN47_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN47_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN47_SYNC1_BYPASS_M  ((GPIO_PIN47_SYNC1_BYPASS_V)<<(GPIO_PIN47_SYNC1_BYPASS_S))
+#define GPIO_PIN47_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN47_SYNC1_BYPASS_S  3
+/* GPIO_PIN47_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN47_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN47_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN47_PAD_DRIVER_V  0x1
+#define GPIO_PIN47_PAD_DRIVER_S  2
+/* GPIO_PIN47_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN47_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN47_SYNC2_BYPASS_M  ((GPIO_PIN47_SYNC2_BYPASS_V)<<(GPIO_PIN47_SYNC2_BYPASS_S))
+#define GPIO_PIN47_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN47_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN48_REG          (DR_REG_GPIO_BASE + 0x134)
+/* GPIO_PIN48_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN48_INT_ENA    0x0000001F
+#define GPIO_PIN48_INT_ENA_M  ((GPIO_PIN48_INT_ENA_V)<<(GPIO_PIN48_INT_ENA_S))
+#define GPIO_PIN48_INT_ENA_V  0x1F
+#define GPIO_PIN48_INT_ENA_S  13
+/* GPIO_PIN48_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN48_CONFIG    0x00000003
+#define GPIO_PIN48_CONFIG_M  ((GPIO_PIN48_CONFIG_V)<<(GPIO_PIN48_CONFIG_S))
+#define GPIO_PIN48_CONFIG_V  0x3
+#define GPIO_PIN48_CONFIG_S  11
+/* GPIO_PIN48_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN48_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN48_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN48_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN48_WAKEUP_ENABLE_S  10
+/* GPIO_PIN48_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN48_INT_TYPE    0x00000007
+#define GPIO_PIN48_INT_TYPE_M  ((GPIO_PIN48_INT_TYPE_V)<<(GPIO_PIN48_INT_TYPE_S))
+#define GPIO_PIN48_INT_TYPE_V  0x7
+#define GPIO_PIN48_INT_TYPE_S  7
+/* GPIO_PIN48_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN48_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN48_SYNC1_BYPASS_M  ((GPIO_PIN48_SYNC1_BYPASS_V)<<(GPIO_PIN48_SYNC1_BYPASS_S))
+#define GPIO_PIN48_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN48_SYNC1_BYPASS_S  3
+/* GPIO_PIN48_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN48_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN48_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN48_PAD_DRIVER_V  0x1
+#define GPIO_PIN48_PAD_DRIVER_S  2
+/* GPIO_PIN48_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN48_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN48_SYNC2_BYPASS_M  ((GPIO_PIN48_SYNC2_BYPASS_V)<<(GPIO_PIN48_SYNC2_BYPASS_S))
+#define GPIO_PIN48_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN48_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN49_REG          (DR_REG_GPIO_BASE + 0x138)
+/* GPIO_PIN49_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN49_INT_ENA    0x0000001F
+#define GPIO_PIN49_INT_ENA_M  ((GPIO_PIN49_INT_ENA_V)<<(GPIO_PIN49_INT_ENA_S))
+#define GPIO_PIN49_INT_ENA_V  0x1F
+#define GPIO_PIN49_INT_ENA_S  13
+/* GPIO_PIN49_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN49_CONFIG    0x00000003
+#define GPIO_PIN49_CONFIG_M  ((GPIO_PIN49_CONFIG_V)<<(GPIO_PIN49_CONFIG_S))
+#define GPIO_PIN49_CONFIG_V  0x3
+#define GPIO_PIN49_CONFIG_S  11
+/* GPIO_PIN49_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN49_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN49_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN49_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN49_WAKEUP_ENABLE_S  10
+/* GPIO_PIN49_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN49_INT_TYPE    0x00000007
+#define GPIO_PIN49_INT_TYPE_M  ((GPIO_PIN49_INT_TYPE_V)<<(GPIO_PIN49_INT_TYPE_S))
+#define GPIO_PIN49_INT_TYPE_V  0x7
+#define GPIO_PIN49_INT_TYPE_S  7
+/* GPIO_PIN49_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN49_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN49_SYNC1_BYPASS_M  ((GPIO_PIN49_SYNC1_BYPASS_V)<<(GPIO_PIN49_SYNC1_BYPASS_S))
+#define GPIO_PIN49_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN49_SYNC1_BYPASS_S  3
+/* GPIO_PIN49_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN49_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN49_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN49_PAD_DRIVER_V  0x1
+#define GPIO_PIN49_PAD_DRIVER_S  2
+/* GPIO_PIN49_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN49_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN49_SYNC2_BYPASS_M  ((GPIO_PIN49_SYNC2_BYPASS_V)<<(GPIO_PIN49_SYNC2_BYPASS_S))
+#define GPIO_PIN49_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN49_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN50_REG          (DR_REG_GPIO_BASE + 0x13C)
+/* GPIO_PIN50_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN50_INT_ENA    0x0000001F
+#define GPIO_PIN50_INT_ENA_M  ((GPIO_PIN50_INT_ENA_V)<<(GPIO_PIN50_INT_ENA_S))
+#define GPIO_PIN50_INT_ENA_V  0x1F
+#define GPIO_PIN50_INT_ENA_S  13
+/* GPIO_PIN50_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN50_CONFIG    0x00000003
+#define GPIO_PIN50_CONFIG_M  ((GPIO_PIN50_CONFIG_V)<<(GPIO_PIN50_CONFIG_S))
+#define GPIO_PIN50_CONFIG_V  0x3
+#define GPIO_PIN50_CONFIG_S  11
+/* GPIO_PIN50_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN50_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN50_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN50_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN50_WAKEUP_ENABLE_S  10
+/* GPIO_PIN50_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN50_INT_TYPE    0x00000007
+#define GPIO_PIN50_INT_TYPE_M  ((GPIO_PIN50_INT_TYPE_V)<<(GPIO_PIN50_INT_TYPE_S))
+#define GPIO_PIN50_INT_TYPE_V  0x7
+#define GPIO_PIN50_INT_TYPE_S  7
+/* GPIO_PIN50_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN50_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN50_SYNC1_BYPASS_M  ((GPIO_PIN50_SYNC1_BYPASS_V)<<(GPIO_PIN50_SYNC1_BYPASS_S))
+#define GPIO_PIN50_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN50_SYNC1_BYPASS_S  3
+/* GPIO_PIN50_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN50_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN50_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN50_PAD_DRIVER_V  0x1
+#define GPIO_PIN50_PAD_DRIVER_S  2
+/* GPIO_PIN50_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN50_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN50_SYNC2_BYPASS_M  ((GPIO_PIN50_SYNC2_BYPASS_V)<<(GPIO_PIN50_SYNC2_BYPASS_S))
+#define GPIO_PIN50_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN50_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN51_REG          (DR_REG_GPIO_BASE + 0x140)
+/* GPIO_PIN51_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN51_INT_ENA    0x0000001F
+#define GPIO_PIN51_INT_ENA_M  ((GPIO_PIN51_INT_ENA_V)<<(GPIO_PIN51_INT_ENA_S))
+#define GPIO_PIN51_INT_ENA_V  0x1F
+#define GPIO_PIN51_INT_ENA_S  13
+/* GPIO_PIN51_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN51_CONFIG    0x00000003
+#define GPIO_PIN51_CONFIG_M  ((GPIO_PIN51_CONFIG_V)<<(GPIO_PIN51_CONFIG_S))
+#define GPIO_PIN51_CONFIG_V  0x3
+#define GPIO_PIN51_CONFIG_S  11
+/* GPIO_PIN51_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN51_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN51_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN51_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN51_WAKEUP_ENABLE_S  10
+/* GPIO_PIN51_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN51_INT_TYPE    0x00000007
+#define GPIO_PIN51_INT_TYPE_M  ((GPIO_PIN51_INT_TYPE_V)<<(GPIO_PIN51_INT_TYPE_S))
+#define GPIO_PIN51_INT_TYPE_V  0x7
+#define GPIO_PIN51_INT_TYPE_S  7
+/* GPIO_PIN51_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN51_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN51_SYNC1_BYPASS_M  ((GPIO_PIN51_SYNC1_BYPASS_V)<<(GPIO_PIN51_SYNC1_BYPASS_S))
+#define GPIO_PIN51_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN51_SYNC1_BYPASS_S  3
+/* GPIO_PIN51_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN51_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN51_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN51_PAD_DRIVER_V  0x1
+#define GPIO_PIN51_PAD_DRIVER_S  2
+/* GPIO_PIN51_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN51_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN51_SYNC2_BYPASS_M  ((GPIO_PIN51_SYNC2_BYPASS_V)<<(GPIO_PIN51_SYNC2_BYPASS_S))
+#define GPIO_PIN51_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN51_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN52_REG          (DR_REG_GPIO_BASE + 0x144)
+/* GPIO_PIN52_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN52_INT_ENA    0x0000001F
+#define GPIO_PIN52_INT_ENA_M  ((GPIO_PIN52_INT_ENA_V)<<(GPIO_PIN52_INT_ENA_S))
+#define GPIO_PIN52_INT_ENA_V  0x1F
+#define GPIO_PIN52_INT_ENA_S  13
+/* GPIO_PIN52_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN52_CONFIG    0x00000003
+#define GPIO_PIN52_CONFIG_M  ((GPIO_PIN52_CONFIG_V)<<(GPIO_PIN52_CONFIG_S))
+#define GPIO_PIN52_CONFIG_V  0x3
+#define GPIO_PIN52_CONFIG_S  11
+/* GPIO_PIN52_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN52_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN52_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN52_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN52_WAKEUP_ENABLE_S  10
+/* GPIO_PIN52_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN52_INT_TYPE    0x00000007
+#define GPIO_PIN52_INT_TYPE_M  ((GPIO_PIN52_INT_TYPE_V)<<(GPIO_PIN52_INT_TYPE_S))
+#define GPIO_PIN52_INT_TYPE_V  0x7
+#define GPIO_PIN52_INT_TYPE_S  7
+/* GPIO_PIN52_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN52_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN52_SYNC1_BYPASS_M  ((GPIO_PIN52_SYNC1_BYPASS_V)<<(GPIO_PIN52_SYNC1_BYPASS_S))
+#define GPIO_PIN52_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN52_SYNC1_BYPASS_S  3
+/* GPIO_PIN52_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN52_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN52_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN52_PAD_DRIVER_V  0x1
+#define GPIO_PIN52_PAD_DRIVER_S  2
+/* GPIO_PIN52_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN52_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN52_SYNC2_BYPASS_M  ((GPIO_PIN52_SYNC2_BYPASS_V)<<(GPIO_PIN52_SYNC2_BYPASS_S))
+#define GPIO_PIN52_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN52_SYNC2_BYPASS_S  0
+
+#define GPIO_PIN53_REG          (DR_REG_GPIO_BASE + 0x148)
+/* GPIO_PIN53_INT_ENA : R/W ;bitpos:[17:13] ;default: 5'h0 ; */
+/*description: .*/
+#define GPIO_PIN53_INT_ENA    0x0000001F
+#define GPIO_PIN53_INT_ENA_M  ((GPIO_PIN53_INT_ENA_V)<<(GPIO_PIN53_INT_ENA_S))
+#define GPIO_PIN53_INT_ENA_V  0x1F
+#define GPIO_PIN53_INT_ENA_S  13
+/* GPIO_PIN53_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN53_CONFIG    0x00000003
+#define GPIO_PIN53_CONFIG_M  ((GPIO_PIN53_CONFIG_V)<<(GPIO_PIN53_CONFIG_S))
+#define GPIO_PIN53_CONFIG_V  0x3
+#define GPIO_PIN53_CONFIG_S  11
+/* GPIO_PIN53_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN53_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN53_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN53_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN53_WAKEUP_ENABLE_S  10
+/* GPIO_PIN53_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
+/*description: .*/
+#define GPIO_PIN53_INT_TYPE    0x00000007
+#define GPIO_PIN53_INT_TYPE_M  ((GPIO_PIN53_INT_TYPE_V)<<(GPIO_PIN53_INT_TYPE_S))
+#define GPIO_PIN53_INT_TYPE_V  0x7
+#define GPIO_PIN53_INT_TYPE_S  7
+/* GPIO_PIN53_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN53_SYNC1_BYPASS    0x00000003
+#define GPIO_PIN53_SYNC1_BYPASS_M  ((GPIO_PIN53_SYNC1_BYPASS_V)<<(GPIO_PIN53_SYNC1_BYPASS_S))
+#define GPIO_PIN53_SYNC1_BYPASS_V  0x3
+#define GPIO_PIN53_SYNC1_BYPASS_S  3
+/* GPIO_PIN53_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_PIN53_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN53_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN53_PAD_DRIVER_V  0x1
+#define GPIO_PIN53_PAD_DRIVER_S  2
+/* GPIO_PIN53_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: .*/
+#define GPIO_PIN53_SYNC2_BYPASS    0x00000003
+#define GPIO_PIN53_SYNC2_BYPASS_M  ((GPIO_PIN53_SYNC2_BYPASS_V)<<(GPIO_PIN53_SYNC2_BYPASS_S))
+#define GPIO_PIN53_SYNC2_BYPASS_V  0x3
+#define GPIO_PIN53_SYNC2_BYPASS_S  0
+
+#define GPIO_STATUS_NEXT_REG          (DR_REG_GPIO_BASE + 0x14C)
+/* GPIO_STATUS_INTERRUPT_NEXT : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define GPIO_STATUS_INTERRUPT_NEXT    0xFFFFFFFF
+#define GPIO_STATUS_INTERRUPT_NEXT_M  ((GPIO_STATUS_INTERRUPT_NEXT_V)<<(GPIO_STATUS_INTERRUPT_NEXT_S))
+#define GPIO_STATUS_INTERRUPT_NEXT_V  0xFFFFFFFF
+#define GPIO_STATUS_INTERRUPT_NEXT_S  0
+
+#define GPIO_STATUS_NEXT1_REG          (DR_REG_GPIO_BASE + 0x150)
+/* GPIO_STATUS_INTERRUPT_NEXT1 : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: */
+#define GPIO_STATUS_INTERRUPT_NEXT1  0x003FFFFF
+#define GPIO_STATUS_INTERRUPT_NEXT1_M  ((GPIO_STATUS_INTERRUPT_NEXT1_V)<<(GPIO_STATUS_INTERRUPT_NEXT1_S))
+#define GPIO_STATUS_INTERRUPT_NEXT1_V  0x3FFFFF
+#define GPIO_STATUS_INTERRUPT_NEXT1_S  0
+
+#define GPIO_FUNC0_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x154)
+/* GPIO_SIG0_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG0_IN_SEL    (BIT(7))
+#define GPIO_SIG0_IN_SEL_M  (BIT(7))
+#define GPIO_SIG0_IN_SEL_V  0x1
+#define GPIO_SIG0_IN_SEL_S  7
+/* GPIO_FUNC0_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC0_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC0_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC0_IN_INV_SEL_V  0x1
+#define GPIO_FUNC0_IN_INV_SEL_S  6
+/* GPIO_FUNC0_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC0_IN_SEL    0x0000003F
+#define GPIO_FUNC0_IN_SEL_M  ((GPIO_FUNC0_IN_SEL_V)<<(GPIO_FUNC0_IN_SEL_S))
+#define GPIO_FUNC0_IN_SEL_V  0x3F
+#define GPIO_FUNC0_IN_SEL_S  0
+
+#define GPIO_FUNC1_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x158)
+/* GPIO_SIG1_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG1_IN_SEL    (BIT(7))
+#define GPIO_SIG1_IN_SEL_M  (BIT(7))
+#define GPIO_SIG1_IN_SEL_V  0x1
+#define GPIO_SIG1_IN_SEL_S  7
+/* GPIO_FUNC1_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC1_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC1_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC1_IN_INV_SEL_V  0x1
+#define GPIO_FUNC1_IN_INV_SEL_S  6
+/* GPIO_FUNC1_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC1_IN_SEL    0x0000003F
+#define GPIO_FUNC1_IN_SEL_M  ((GPIO_FUNC1_IN_SEL_V)<<(GPIO_FUNC1_IN_SEL_S))
+#define GPIO_FUNC1_IN_SEL_V  0x3F
+#define GPIO_FUNC1_IN_SEL_S  0
+
+#define GPIO_FUNC2_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x15C)
+/* GPIO_SIG2_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG2_IN_SEL    (BIT(7))
+#define GPIO_SIG2_IN_SEL_M  (BIT(7))
+#define GPIO_SIG2_IN_SEL_V  0x1
+#define GPIO_SIG2_IN_SEL_S  7
+/* GPIO_FUNC2_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC2_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC2_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC2_IN_INV_SEL_V  0x1
+#define GPIO_FUNC2_IN_INV_SEL_S  6
+/* GPIO_FUNC2_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC2_IN_SEL    0x0000003F
+#define GPIO_FUNC2_IN_SEL_M  ((GPIO_FUNC2_IN_SEL_V)<<(GPIO_FUNC2_IN_SEL_S))
+#define GPIO_FUNC2_IN_SEL_V  0x3F
+#define GPIO_FUNC2_IN_SEL_S  0
+
+#define GPIO_FUNC3_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x160)
+/* GPIO_SIG3_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG3_IN_SEL    (BIT(7))
+#define GPIO_SIG3_IN_SEL_M  (BIT(7))
+#define GPIO_SIG3_IN_SEL_V  0x1
+#define GPIO_SIG3_IN_SEL_S  7
+/* GPIO_FUNC3_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC3_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC3_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC3_IN_INV_SEL_V  0x1
+#define GPIO_FUNC3_IN_INV_SEL_S  6
+/* GPIO_FUNC3_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC3_IN_SEL    0x0000003F
+#define GPIO_FUNC3_IN_SEL_M  ((GPIO_FUNC3_IN_SEL_V)<<(GPIO_FUNC3_IN_SEL_S))
+#define GPIO_FUNC3_IN_SEL_V  0x3F
+#define GPIO_FUNC3_IN_SEL_S  0
+
+#define GPIO_FUNC4_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x164)
+/* GPIO_SIG4_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG4_IN_SEL    (BIT(7))
+#define GPIO_SIG4_IN_SEL_M  (BIT(7))
+#define GPIO_SIG4_IN_SEL_V  0x1
+#define GPIO_SIG4_IN_SEL_S  7
+/* GPIO_FUNC4_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC4_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC4_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC4_IN_INV_SEL_V  0x1
+#define GPIO_FUNC4_IN_INV_SEL_S  6
+/* GPIO_FUNC4_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC4_IN_SEL    0x0000003F
+#define GPIO_FUNC4_IN_SEL_M  ((GPIO_FUNC4_IN_SEL_V)<<(GPIO_FUNC4_IN_SEL_S))
+#define GPIO_FUNC4_IN_SEL_V  0x3F
+#define GPIO_FUNC4_IN_SEL_S  0
+
+#define GPIO_FUNC5_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x168)
+/* GPIO_SIG5_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG5_IN_SEL    (BIT(7))
+#define GPIO_SIG5_IN_SEL_M  (BIT(7))
+#define GPIO_SIG5_IN_SEL_V  0x1
+#define GPIO_SIG5_IN_SEL_S  7
+/* GPIO_FUNC5_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC5_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC5_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC5_IN_INV_SEL_V  0x1
+#define GPIO_FUNC5_IN_INV_SEL_S  6
+/* GPIO_FUNC5_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC5_IN_SEL    0x0000003F
+#define GPIO_FUNC5_IN_SEL_M  ((GPIO_FUNC5_IN_SEL_V)<<(GPIO_FUNC5_IN_SEL_S))
+#define GPIO_FUNC5_IN_SEL_V  0x3F
+#define GPIO_FUNC5_IN_SEL_S  0
+
+#define GPIO_FUNC6_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x16C)
+/* GPIO_SIG6_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG6_IN_SEL    (BIT(7))
+#define GPIO_SIG6_IN_SEL_M  (BIT(7))
+#define GPIO_SIG6_IN_SEL_V  0x1
+#define GPIO_SIG6_IN_SEL_S  7
+/* GPIO_FUNC6_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC6_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC6_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC6_IN_INV_SEL_V  0x1
+#define GPIO_FUNC6_IN_INV_SEL_S  6
+/* GPIO_FUNC6_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC6_IN_SEL    0x0000003F
+#define GPIO_FUNC6_IN_SEL_M  ((GPIO_FUNC6_IN_SEL_V)<<(GPIO_FUNC6_IN_SEL_S))
+#define GPIO_FUNC6_IN_SEL_V  0x3F
+#define GPIO_FUNC6_IN_SEL_S  0
+
+#define GPIO_FUNC7_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x170)
+/* GPIO_SIG7_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG7_IN_SEL    (BIT(7))
+#define GPIO_SIG7_IN_SEL_M  (BIT(7))
+#define GPIO_SIG7_IN_SEL_V  0x1
+#define GPIO_SIG7_IN_SEL_S  7
+/* GPIO_FUNC7_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC7_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC7_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC7_IN_INV_SEL_V  0x1
+#define GPIO_FUNC7_IN_INV_SEL_S  6
+/* GPIO_FUNC7_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC7_IN_SEL    0x0000003F
+#define GPIO_FUNC7_IN_SEL_M  ((GPIO_FUNC7_IN_SEL_V)<<(GPIO_FUNC7_IN_SEL_S))
+#define GPIO_FUNC7_IN_SEL_V  0x3F
+#define GPIO_FUNC7_IN_SEL_S  0
+
+#define GPIO_FUNC8_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x174)
+/* GPIO_SIG8_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG8_IN_SEL    (BIT(7))
+#define GPIO_SIG8_IN_SEL_M  (BIT(7))
+#define GPIO_SIG8_IN_SEL_V  0x1
+#define GPIO_SIG8_IN_SEL_S  7
+/* GPIO_FUNC8_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC8_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC8_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC8_IN_INV_SEL_V  0x1
+#define GPIO_FUNC8_IN_INV_SEL_S  6
+/* GPIO_FUNC8_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC8_IN_SEL    0x0000003F
+#define GPIO_FUNC8_IN_SEL_M  ((GPIO_FUNC8_IN_SEL_V)<<(GPIO_FUNC8_IN_SEL_S))
+#define GPIO_FUNC8_IN_SEL_V  0x3F
+#define GPIO_FUNC8_IN_SEL_S  0
+
+#define GPIO_FUNC9_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x178)
+/* GPIO_SIG9_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG9_IN_SEL    (BIT(7))
+#define GPIO_SIG9_IN_SEL_M  (BIT(7))
+#define GPIO_SIG9_IN_SEL_V  0x1
+#define GPIO_SIG9_IN_SEL_S  7
+/* GPIO_FUNC9_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC9_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC9_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC9_IN_INV_SEL_V  0x1
+#define GPIO_FUNC9_IN_INV_SEL_S  6
+/* GPIO_FUNC9_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC9_IN_SEL    0x0000003F
+#define GPIO_FUNC9_IN_SEL_M  ((GPIO_FUNC9_IN_SEL_V)<<(GPIO_FUNC9_IN_SEL_S))
+#define GPIO_FUNC9_IN_SEL_V  0x3F
+#define GPIO_FUNC9_IN_SEL_S  0
+
+#define GPIO_FUNC10_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x17C)
+/* GPIO_SIG10_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG10_IN_SEL    (BIT(7))
+#define GPIO_SIG10_IN_SEL_M  (BIT(7))
+#define GPIO_SIG10_IN_SEL_V  0x1
+#define GPIO_SIG10_IN_SEL_S  7
+/* GPIO_FUNC10_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC10_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC10_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC10_IN_INV_SEL_V  0x1
+#define GPIO_FUNC10_IN_INV_SEL_S  6
+/* GPIO_FUNC10_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC10_IN_SEL    0x0000003F
+#define GPIO_FUNC10_IN_SEL_M  ((GPIO_FUNC10_IN_SEL_V)<<(GPIO_FUNC10_IN_SEL_S))
+#define GPIO_FUNC10_IN_SEL_V  0x3F
+#define GPIO_FUNC10_IN_SEL_S  0
+
+#define GPIO_FUNC11_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x180)
+/* GPIO_SIG11_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG11_IN_SEL    (BIT(7))
+#define GPIO_SIG11_IN_SEL_M  (BIT(7))
+#define GPIO_SIG11_IN_SEL_V  0x1
+#define GPIO_SIG11_IN_SEL_S  7
+/* GPIO_FUNC11_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC11_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC11_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC11_IN_INV_SEL_V  0x1
+#define GPIO_FUNC11_IN_INV_SEL_S  6
+/* GPIO_FUNC11_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC11_IN_SEL    0x0000003F
+#define GPIO_FUNC11_IN_SEL_M  ((GPIO_FUNC11_IN_SEL_V)<<(GPIO_FUNC11_IN_SEL_S))
+#define GPIO_FUNC11_IN_SEL_V  0x3F
+#define GPIO_FUNC11_IN_SEL_S  0
+
+#define GPIO_FUNC12_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x184)
+/* GPIO_SIG12_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG12_IN_SEL    (BIT(7))
+#define GPIO_SIG12_IN_SEL_M  (BIT(7))
+#define GPIO_SIG12_IN_SEL_V  0x1
+#define GPIO_SIG12_IN_SEL_S  7
+/* GPIO_FUNC12_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC12_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC12_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC12_IN_INV_SEL_V  0x1
+#define GPIO_FUNC12_IN_INV_SEL_S  6
+/* GPIO_FUNC12_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC12_IN_SEL    0x0000003F
+#define GPIO_FUNC12_IN_SEL_M  ((GPIO_FUNC12_IN_SEL_V)<<(GPIO_FUNC12_IN_SEL_S))
+#define GPIO_FUNC12_IN_SEL_V  0x3F
+#define GPIO_FUNC12_IN_SEL_S  0
+
+#define GPIO_FUNC13_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x188)
+/* GPIO_SIG13_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG13_IN_SEL    (BIT(7))
+#define GPIO_SIG13_IN_SEL_M  (BIT(7))
+#define GPIO_SIG13_IN_SEL_V  0x1
+#define GPIO_SIG13_IN_SEL_S  7
+/* GPIO_FUNC13_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC13_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC13_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC13_IN_INV_SEL_V  0x1
+#define GPIO_FUNC13_IN_INV_SEL_S  6
+/* GPIO_FUNC13_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC13_IN_SEL    0x0000003F
+#define GPIO_FUNC13_IN_SEL_M  ((GPIO_FUNC13_IN_SEL_V)<<(GPIO_FUNC13_IN_SEL_S))
+#define GPIO_FUNC13_IN_SEL_V  0x3F
+#define GPIO_FUNC13_IN_SEL_S  0
+
+#define GPIO_FUNC14_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x18C)
+/* GPIO_SIG14_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG14_IN_SEL    (BIT(7))
+#define GPIO_SIG14_IN_SEL_M  (BIT(7))
+#define GPIO_SIG14_IN_SEL_V  0x1
+#define GPIO_SIG14_IN_SEL_S  7
+/* GPIO_FUNC14_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC14_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC14_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC14_IN_INV_SEL_V  0x1
+#define GPIO_FUNC14_IN_INV_SEL_S  6
+/* GPIO_FUNC14_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC14_IN_SEL    0x0000003F
+#define GPIO_FUNC14_IN_SEL_M  ((GPIO_FUNC14_IN_SEL_V)<<(GPIO_FUNC14_IN_SEL_S))
+#define GPIO_FUNC14_IN_SEL_V  0x3F
+#define GPIO_FUNC14_IN_SEL_S  0
+
+#define GPIO_FUNC15_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x190)
+/* GPIO_SIG15_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG15_IN_SEL    (BIT(7))
+#define GPIO_SIG15_IN_SEL_M  (BIT(7))
+#define GPIO_SIG15_IN_SEL_V  0x1
+#define GPIO_SIG15_IN_SEL_S  7
+/* GPIO_FUNC15_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC15_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC15_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC15_IN_INV_SEL_V  0x1
+#define GPIO_FUNC15_IN_INV_SEL_S  6
+/* GPIO_FUNC15_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC15_IN_SEL    0x0000003F
+#define GPIO_FUNC15_IN_SEL_M  ((GPIO_FUNC15_IN_SEL_V)<<(GPIO_FUNC15_IN_SEL_S))
+#define GPIO_FUNC15_IN_SEL_V  0x3F
+#define GPIO_FUNC15_IN_SEL_S  0
+
+#define GPIO_FUNC16_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x194)
+/* GPIO_SIG16_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG16_IN_SEL    (BIT(7))
+#define GPIO_SIG16_IN_SEL_M  (BIT(7))
+#define GPIO_SIG16_IN_SEL_V  0x1
+#define GPIO_SIG16_IN_SEL_S  7
+/* GPIO_FUNC16_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC16_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC16_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC16_IN_INV_SEL_V  0x1
+#define GPIO_FUNC16_IN_INV_SEL_S  6
+/* GPIO_FUNC16_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC16_IN_SEL    0x0000003F
+#define GPIO_FUNC16_IN_SEL_M  ((GPIO_FUNC16_IN_SEL_V)<<(GPIO_FUNC16_IN_SEL_S))
+#define GPIO_FUNC16_IN_SEL_V  0x3F
+#define GPIO_FUNC16_IN_SEL_S  0
+
+#define GPIO_FUNC17_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x198)
+/* GPIO_SIG17_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG17_IN_SEL    (BIT(7))
+#define GPIO_SIG17_IN_SEL_M  (BIT(7))
+#define GPIO_SIG17_IN_SEL_V  0x1
+#define GPIO_SIG17_IN_SEL_S  7
+/* GPIO_FUNC17_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC17_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC17_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC17_IN_INV_SEL_V  0x1
+#define GPIO_FUNC17_IN_INV_SEL_S  6
+/* GPIO_FUNC17_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC17_IN_SEL    0x0000003F
+#define GPIO_FUNC17_IN_SEL_M  ((GPIO_FUNC17_IN_SEL_V)<<(GPIO_FUNC17_IN_SEL_S))
+#define GPIO_FUNC17_IN_SEL_V  0x3F
+#define GPIO_FUNC17_IN_SEL_S  0
+
+#define GPIO_FUNC18_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x19C)
+/* GPIO_SIG18_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG18_IN_SEL    (BIT(7))
+#define GPIO_SIG18_IN_SEL_M  (BIT(7))
+#define GPIO_SIG18_IN_SEL_V  0x1
+#define GPIO_SIG18_IN_SEL_S  7
+/* GPIO_FUNC18_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC18_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC18_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC18_IN_INV_SEL_V  0x1
+#define GPIO_FUNC18_IN_INV_SEL_S  6
+/* GPIO_FUNC18_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC18_IN_SEL    0x0000003F
+#define GPIO_FUNC18_IN_SEL_M  ((GPIO_FUNC18_IN_SEL_V)<<(GPIO_FUNC18_IN_SEL_S))
+#define GPIO_FUNC18_IN_SEL_V  0x3F
+#define GPIO_FUNC18_IN_SEL_S  0
+
+#define GPIO_FUNC19_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1A0)
+/* GPIO_SIG19_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG19_IN_SEL    (BIT(7))
+#define GPIO_SIG19_IN_SEL_M  (BIT(7))
+#define GPIO_SIG19_IN_SEL_V  0x1
+#define GPIO_SIG19_IN_SEL_S  7
+/* GPIO_FUNC19_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC19_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC19_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC19_IN_INV_SEL_V  0x1
+#define GPIO_FUNC19_IN_INV_SEL_S  6
+/* GPIO_FUNC19_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC19_IN_SEL    0x0000003F
+#define GPIO_FUNC19_IN_SEL_M  ((GPIO_FUNC19_IN_SEL_V)<<(GPIO_FUNC19_IN_SEL_S))
+#define GPIO_FUNC19_IN_SEL_V  0x3F
+#define GPIO_FUNC19_IN_SEL_S  0
+
+#define GPIO_FUNC20_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1A4)
+/* GPIO_SIG20_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG20_IN_SEL    (BIT(7))
+#define GPIO_SIG20_IN_SEL_M  (BIT(7))
+#define GPIO_SIG20_IN_SEL_V  0x1
+#define GPIO_SIG20_IN_SEL_S  7
+/* GPIO_FUNC20_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC20_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC20_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC20_IN_INV_SEL_V  0x1
+#define GPIO_FUNC20_IN_INV_SEL_S  6
+/* GPIO_FUNC20_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC20_IN_SEL    0x0000003F
+#define GPIO_FUNC20_IN_SEL_M  ((GPIO_FUNC20_IN_SEL_V)<<(GPIO_FUNC20_IN_SEL_S))
+#define GPIO_FUNC20_IN_SEL_V  0x3F
+#define GPIO_FUNC20_IN_SEL_S  0
+
+#define GPIO_FUNC21_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1A8)
+/* GPIO_SIG21_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG21_IN_SEL    (BIT(7))
+#define GPIO_SIG21_IN_SEL_M  (BIT(7))
+#define GPIO_SIG21_IN_SEL_V  0x1
+#define GPIO_SIG21_IN_SEL_S  7
+/* GPIO_FUNC21_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC21_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC21_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC21_IN_INV_SEL_V  0x1
+#define GPIO_FUNC21_IN_INV_SEL_S  6
+/* GPIO_FUNC21_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC21_IN_SEL    0x0000003F
+#define GPIO_FUNC21_IN_SEL_M  ((GPIO_FUNC21_IN_SEL_V)<<(GPIO_FUNC21_IN_SEL_S))
+#define GPIO_FUNC21_IN_SEL_V  0x3F
+#define GPIO_FUNC21_IN_SEL_S  0
+
+#define GPIO_FUNC22_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1AC)
+/* GPIO_SIG22_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG22_IN_SEL    (BIT(7))
+#define GPIO_SIG22_IN_SEL_M  (BIT(7))
+#define GPIO_SIG22_IN_SEL_V  0x1
+#define GPIO_SIG22_IN_SEL_S  7
+/* GPIO_FUNC22_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC22_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC22_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC22_IN_INV_SEL_V  0x1
+#define GPIO_FUNC22_IN_INV_SEL_S  6
+/* GPIO_FUNC22_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC22_IN_SEL    0x0000003F
+#define GPIO_FUNC22_IN_SEL_M  ((GPIO_FUNC22_IN_SEL_V)<<(GPIO_FUNC22_IN_SEL_S))
+#define GPIO_FUNC22_IN_SEL_V  0x3F
+#define GPIO_FUNC22_IN_SEL_S  0
+
+#define GPIO_FUNC23_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1B0)
+/* GPIO_SIG23_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG23_IN_SEL    (BIT(7))
+#define GPIO_SIG23_IN_SEL_M  (BIT(7))
+#define GPIO_SIG23_IN_SEL_V  0x1
+#define GPIO_SIG23_IN_SEL_S  7
+/* GPIO_FUNC23_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC23_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC23_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC23_IN_INV_SEL_V  0x1
+#define GPIO_FUNC23_IN_INV_SEL_S  6
+/* GPIO_FUNC23_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC23_IN_SEL    0x0000003F
+#define GPIO_FUNC23_IN_SEL_M  ((GPIO_FUNC23_IN_SEL_V)<<(GPIO_FUNC23_IN_SEL_S))
+#define GPIO_FUNC23_IN_SEL_V  0x3F
+#define GPIO_FUNC23_IN_SEL_S  0
+
+#define GPIO_FUNC24_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1B4)
+/* GPIO_SIG24_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG24_IN_SEL    (BIT(7))
+#define GPIO_SIG24_IN_SEL_M  (BIT(7))
+#define GPIO_SIG24_IN_SEL_V  0x1
+#define GPIO_SIG24_IN_SEL_S  7
+/* GPIO_FUNC24_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC24_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC24_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC24_IN_INV_SEL_V  0x1
+#define GPIO_FUNC24_IN_INV_SEL_S  6
+/* GPIO_FUNC24_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC24_IN_SEL    0x0000003F
+#define GPIO_FUNC24_IN_SEL_M  ((GPIO_FUNC24_IN_SEL_V)<<(GPIO_FUNC24_IN_SEL_S))
+#define GPIO_FUNC24_IN_SEL_V  0x3F
+#define GPIO_FUNC24_IN_SEL_S  0
+
+#define GPIO_FUNC25_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1B8)
+/* GPIO_SIG25_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG25_IN_SEL    (BIT(7))
+#define GPIO_SIG25_IN_SEL_M  (BIT(7))
+#define GPIO_SIG25_IN_SEL_V  0x1
+#define GPIO_SIG25_IN_SEL_S  7
+/* GPIO_FUNC25_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC25_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC25_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC25_IN_INV_SEL_V  0x1
+#define GPIO_FUNC25_IN_INV_SEL_S  6
+/* GPIO_FUNC25_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC25_IN_SEL    0x0000003F
+#define GPIO_FUNC25_IN_SEL_M  ((GPIO_FUNC25_IN_SEL_V)<<(GPIO_FUNC25_IN_SEL_S))
+#define GPIO_FUNC25_IN_SEL_V  0x3F
+#define GPIO_FUNC25_IN_SEL_S  0
+
+#define GPIO_FUNC26_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1BC)
+/* GPIO_SIG26_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG26_IN_SEL    (BIT(7))
+#define GPIO_SIG26_IN_SEL_M  (BIT(7))
+#define GPIO_SIG26_IN_SEL_V  0x1
+#define GPIO_SIG26_IN_SEL_S  7
+/* GPIO_FUNC26_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC26_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC26_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC26_IN_INV_SEL_V  0x1
+#define GPIO_FUNC26_IN_INV_SEL_S  6
+/* GPIO_FUNC26_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC26_IN_SEL    0x0000003F
+#define GPIO_FUNC26_IN_SEL_M  ((GPIO_FUNC26_IN_SEL_V)<<(GPIO_FUNC26_IN_SEL_S))
+#define GPIO_FUNC26_IN_SEL_V  0x3F
+#define GPIO_FUNC26_IN_SEL_S  0
+
+#define GPIO_FUNC27_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1C0)
+/* GPIO_SIG27_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG27_IN_SEL    (BIT(7))
+#define GPIO_SIG27_IN_SEL_M  (BIT(7))
+#define GPIO_SIG27_IN_SEL_V  0x1
+#define GPIO_SIG27_IN_SEL_S  7
+/* GPIO_FUNC27_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC27_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC27_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC27_IN_INV_SEL_V  0x1
+#define GPIO_FUNC27_IN_INV_SEL_S  6
+/* GPIO_FUNC27_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC27_IN_SEL    0x0000003F
+#define GPIO_FUNC27_IN_SEL_M  ((GPIO_FUNC27_IN_SEL_V)<<(GPIO_FUNC27_IN_SEL_S))
+#define GPIO_FUNC27_IN_SEL_V  0x3F
+#define GPIO_FUNC27_IN_SEL_S  0
+
+#define GPIO_FUNC28_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1C4)
+/* GPIO_SIG28_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG28_IN_SEL    (BIT(7))
+#define GPIO_SIG28_IN_SEL_M  (BIT(7))
+#define GPIO_SIG28_IN_SEL_V  0x1
+#define GPIO_SIG28_IN_SEL_S  7
+/* GPIO_FUNC28_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC28_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC28_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC28_IN_INV_SEL_V  0x1
+#define GPIO_FUNC28_IN_INV_SEL_S  6
+/* GPIO_FUNC28_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC28_IN_SEL    0x0000003F
+#define GPIO_FUNC28_IN_SEL_M  ((GPIO_FUNC28_IN_SEL_V)<<(GPIO_FUNC28_IN_SEL_S))
+#define GPIO_FUNC28_IN_SEL_V  0x3F
+#define GPIO_FUNC28_IN_SEL_S  0
+
+#define GPIO_FUNC29_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1C8)
+/* GPIO_SIG29_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG29_IN_SEL    (BIT(7))
+#define GPIO_SIG29_IN_SEL_M  (BIT(7))
+#define GPIO_SIG29_IN_SEL_V  0x1
+#define GPIO_SIG29_IN_SEL_S  7
+/* GPIO_FUNC29_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC29_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC29_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC29_IN_INV_SEL_V  0x1
+#define GPIO_FUNC29_IN_INV_SEL_S  6
+/* GPIO_FUNC29_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC29_IN_SEL    0x0000003F
+#define GPIO_FUNC29_IN_SEL_M  ((GPIO_FUNC29_IN_SEL_V)<<(GPIO_FUNC29_IN_SEL_S))
+#define GPIO_FUNC29_IN_SEL_V  0x3F
+#define GPIO_FUNC29_IN_SEL_S  0
+
+#define GPIO_FUNC30_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1CC)
+/* GPIO_SIG30_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG30_IN_SEL    (BIT(7))
+#define GPIO_SIG30_IN_SEL_M  (BIT(7))
+#define GPIO_SIG30_IN_SEL_V  0x1
+#define GPIO_SIG30_IN_SEL_S  7
+/* GPIO_FUNC30_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC30_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC30_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC30_IN_INV_SEL_V  0x1
+#define GPIO_FUNC30_IN_INV_SEL_S  6
+/* GPIO_FUNC30_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC30_IN_SEL    0x0000003F
+#define GPIO_FUNC30_IN_SEL_M  ((GPIO_FUNC30_IN_SEL_V)<<(GPIO_FUNC30_IN_SEL_S))
+#define GPIO_FUNC30_IN_SEL_V  0x3F
+#define GPIO_FUNC30_IN_SEL_S  0
+
+#define GPIO_FUNC31_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1D0)
+/* GPIO_SIG31_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG31_IN_SEL    (BIT(7))
+#define GPIO_SIG31_IN_SEL_M  (BIT(7))
+#define GPIO_SIG31_IN_SEL_V  0x1
+#define GPIO_SIG31_IN_SEL_S  7
+/* GPIO_FUNC31_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC31_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC31_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC31_IN_INV_SEL_V  0x1
+#define GPIO_FUNC31_IN_INV_SEL_S  6
+/* GPIO_FUNC31_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC31_IN_SEL    0x0000003F
+#define GPIO_FUNC31_IN_SEL_M  ((GPIO_FUNC31_IN_SEL_V)<<(GPIO_FUNC31_IN_SEL_S))
+#define GPIO_FUNC31_IN_SEL_V  0x3F
+#define GPIO_FUNC31_IN_SEL_S  0
+
+#define GPIO_FUNC32_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1D4)
+/* GPIO_SIG32_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG32_IN_SEL    (BIT(7))
+#define GPIO_SIG32_IN_SEL_M  (BIT(7))
+#define GPIO_SIG32_IN_SEL_V  0x1
+#define GPIO_SIG32_IN_SEL_S  7
+/* GPIO_FUNC32_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC32_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC32_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC32_IN_INV_SEL_V  0x1
+#define GPIO_FUNC32_IN_INV_SEL_S  6
+/* GPIO_FUNC32_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC32_IN_SEL    0x0000003F
+#define GPIO_FUNC32_IN_SEL_M  ((GPIO_FUNC32_IN_SEL_V)<<(GPIO_FUNC32_IN_SEL_S))
+#define GPIO_FUNC32_IN_SEL_V  0x3F
+#define GPIO_FUNC32_IN_SEL_S  0
+
+#define GPIO_FUNC33_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1D8)
+/* GPIO_SIG33_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG33_IN_SEL    (BIT(7))
+#define GPIO_SIG33_IN_SEL_M  (BIT(7))
+#define GPIO_SIG33_IN_SEL_V  0x1
+#define GPIO_SIG33_IN_SEL_S  7
+/* GPIO_FUNC33_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC33_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC33_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC33_IN_INV_SEL_V  0x1
+#define GPIO_FUNC33_IN_INV_SEL_S  6
+/* GPIO_FUNC33_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC33_IN_SEL    0x0000003F
+#define GPIO_FUNC33_IN_SEL_M  ((GPIO_FUNC33_IN_SEL_V)<<(GPIO_FUNC33_IN_SEL_S))
+#define GPIO_FUNC33_IN_SEL_V  0x3F
+#define GPIO_FUNC33_IN_SEL_S  0
+
+#define GPIO_FUNC34_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1DC)
+/* GPIO_SIG34_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG34_IN_SEL    (BIT(7))
+#define GPIO_SIG34_IN_SEL_M  (BIT(7))
+#define GPIO_SIG34_IN_SEL_V  0x1
+#define GPIO_SIG34_IN_SEL_S  7
+/* GPIO_FUNC34_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC34_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC34_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC34_IN_INV_SEL_V  0x1
+#define GPIO_FUNC34_IN_INV_SEL_S  6
+/* GPIO_FUNC34_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC34_IN_SEL    0x0000003F
+#define GPIO_FUNC34_IN_SEL_M  ((GPIO_FUNC34_IN_SEL_V)<<(GPIO_FUNC34_IN_SEL_S))
+#define GPIO_FUNC34_IN_SEL_V  0x3F
+#define GPIO_FUNC34_IN_SEL_S  0
+
+#define GPIO_FUNC35_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1E0)
+/* GPIO_SIG35_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG35_IN_SEL    (BIT(7))
+#define GPIO_SIG35_IN_SEL_M  (BIT(7))
+#define GPIO_SIG35_IN_SEL_V  0x1
+#define GPIO_SIG35_IN_SEL_S  7
+/* GPIO_FUNC35_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC35_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC35_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC35_IN_INV_SEL_V  0x1
+#define GPIO_FUNC35_IN_INV_SEL_S  6
+/* GPIO_FUNC35_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC35_IN_SEL    0x0000003F
+#define GPIO_FUNC35_IN_SEL_M  ((GPIO_FUNC35_IN_SEL_V)<<(GPIO_FUNC35_IN_SEL_S))
+#define GPIO_FUNC35_IN_SEL_V  0x3F
+#define GPIO_FUNC35_IN_SEL_S  0
+
+#define GPIO_FUNC36_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1E4)
+/* GPIO_SIG36_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG36_IN_SEL    (BIT(7))
+#define GPIO_SIG36_IN_SEL_M  (BIT(7))
+#define GPIO_SIG36_IN_SEL_V  0x1
+#define GPIO_SIG36_IN_SEL_S  7
+/* GPIO_FUNC36_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC36_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC36_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC36_IN_INV_SEL_V  0x1
+#define GPIO_FUNC36_IN_INV_SEL_S  6
+/* GPIO_FUNC36_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC36_IN_SEL    0x0000003F
+#define GPIO_FUNC36_IN_SEL_M  ((GPIO_FUNC36_IN_SEL_V)<<(GPIO_FUNC36_IN_SEL_S))
+#define GPIO_FUNC36_IN_SEL_V  0x3F
+#define GPIO_FUNC36_IN_SEL_S  0
+
+#define GPIO_FUNC37_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1E8)
+/* GPIO_SIG37_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG37_IN_SEL    (BIT(7))
+#define GPIO_SIG37_IN_SEL_M  (BIT(7))
+#define GPIO_SIG37_IN_SEL_V  0x1
+#define GPIO_SIG37_IN_SEL_S  7
+/* GPIO_FUNC37_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC37_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC37_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC37_IN_INV_SEL_V  0x1
+#define GPIO_FUNC37_IN_INV_SEL_S  6
+/* GPIO_FUNC37_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC37_IN_SEL    0x0000003F
+#define GPIO_FUNC37_IN_SEL_M  ((GPIO_FUNC37_IN_SEL_V)<<(GPIO_FUNC37_IN_SEL_S))
+#define GPIO_FUNC37_IN_SEL_V  0x3F
+#define GPIO_FUNC37_IN_SEL_S  0
+
+#define GPIO_FUNC38_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1EC)
+/* GPIO_SIG38_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG38_IN_SEL    (BIT(7))
+#define GPIO_SIG38_IN_SEL_M  (BIT(7))
+#define GPIO_SIG38_IN_SEL_V  0x1
+#define GPIO_SIG38_IN_SEL_S  7
+/* GPIO_FUNC38_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC38_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC38_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC38_IN_INV_SEL_V  0x1
+#define GPIO_FUNC38_IN_INV_SEL_S  6
+/* GPIO_FUNC38_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC38_IN_SEL    0x0000003F
+#define GPIO_FUNC38_IN_SEL_M  ((GPIO_FUNC38_IN_SEL_V)<<(GPIO_FUNC38_IN_SEL_S))
+#define GPIO_FUNC38_IN_SEL_V  0x3F
+#define GPIO_FUNC38_IN_SEL_S  0
+
+#define GPIO_FUNC39_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1F0)
+/* GPIO_SIG39_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG39_IN_SEL    (BIT(7))
+#define GPIO_SIG39_IN_SEL_M  (BIT(7))
+#define GPIO_SIG39_IN_SEL_V  0x1
+#define GPIO_SIG39_IN_SEL_S  7
+/* GPIO_FUNC39_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC39_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC39_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC39_IN_INV_SEL_V  0x1
+#define GPIO_FUNC39_IN_INV_SEL_S  6
+/* GPIO_FUNC39_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC39_IN_SEL    0x0000003F
+#define GPIO_FUNC39_IN_SEL_M  ((GPIO_FUNC39_IN_SEL_V)<<(GPIO_FUNC39_IN_SEL_S))
+#define GPIO_FUNC39_IN_SEL_V  0x3F
+#define GPIO_FUNC39_IN_SEL_S  0
+
+#define GPIO_FUNC40_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1F4)
+/* GPIO_SIG40_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG40_IN_SEL    (BIT(7))
+#define GPIO_SIG40_IN_SEL_M  (BIT(7))
+#define GPIO_SIG40_IN_SEL_V  0x1
+#define GPIO_SIG40_IN_SEL_S  7
+/* GPIO_FUNC40_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC40_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC40_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC40_IN_INV_SEL_V  0x1
+#define GPIO_FUNC40_IN_INV_SEL_S  6
+/* GPIO_FUNC40_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC40_IN_SEL    0x0000003F
+#define GPIO_FUNC40_IN_SEL_M  ((GPIO_FUNC40_IN_SEL_V)<<(GPIO_FUNC40_IN_SEL_S))
+#define GPIO_FUNC40_IN_SEL_V  0x3F
+#define GPIO_FUNC40_IN_SEL_S  0
+
+#define GPIO_FUNC41_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1F8)
+/* GPIO_SIG41_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG41_IN_SEL    (BIT(7))
+#define GPIO_SIG41_IN_SEL_M  (BIT(7))
+#define GPIO_SIG41_IN_SEL_V  0x1
+#define GPIO_SIG41_IN_SEL_S  7
+/* GPIO_FUNC41_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC41_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC41_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC41_IN_INV_SEL_V  0x1
+#define GPIO_FUNC41_IN_INV_SEL_S  6
+/* GPIO_FUNC41_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC41_IN_SEL    0x0000003F
+#define GPIO_FUNC41_IN_SEL_M  ((GPIO_FUNC41_IN_SEL_V)<<(GPIO_FUNC41_IN_SEL_S))
+#define GPIO_FUNC41_IN_SEL_V  0x3F
+#define GPIO_FUNC41_IN_SEL_S  0
+
+#define GPIO_FUNC42_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x1FC)
+/* GPIO_SIG42_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG42_IN_SEL    (BIT(7))
+#define GPIO_SIG42_IN_SEL_M  (BIT(7))
+#define GPIO_SIG42_IN_SEL_V  0x1
+#define GPIO_SIG42_IN_SEL_S  7
+/* GPIO_FUNC42_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC42_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC42_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC42_IN_INV_SEL_V  0x1
+#define GPIO_FUNC42_IN_INV_SEL_S  6
+/* GPIO_FUNC42_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC42_IN_SEL    0x0000003F
+#define GPIO_FUNC42_IN_SEL_M  ((GPIO_FUNC42_IN_SEL_V)<<(GPIO_FUNC42_IN_SEL_S))
+#define GPIO_FUNC42_IN_SEL_V  0x3F
+#define GPIO_FUNC42_IN_SEL_S  0
+
+#define GPIO_FUNC43_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x200)
+/* GPIO_SIG43_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG43_IN_SEL    (BIT(7))
+#define GPIO_SIG43_IN_SEL_M  (BIT(7))
+#define GPIO_SIG43_IN_SEL_V  0x1
+#define GPIO_SIG43_IN_SEL_S  7
+/* GPIO_FUNC43_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC43_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC43_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC43_IN_INV_SEL_V  0x1
+#define GPIO_FUNC43_IN_INV_SEL_S  6
+/* GPIO_FUNC43_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC43_IN_SEL    0x0000003F
+#define GPIO_FUNC43_IN_SEL_M  ((GPIO_FUNC43_IN_SEL_V)<<(GPIO_FUNC43_IN_SEL_S))
+#define GPIO_FUNC43_IN_SEL_V  0x3F
+#define GPIO_FUNC43_IN_SEL_S  0
+
+#define GPIO_FUNC44_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x204)
+/* GPIO_SIG44_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG44_IN_SEL    (BIT(7))
+#define GPIO_SIG44_IN_SEL_M  (BIT(7))
+#define GPIO_SIG44_IN_SEL_V  0x1
+#define GPIO_SIG44_IN_SEL_S  7
+/* GPIO_FUNC44_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC44_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC44_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC44_IN_INV_SEL_V  0x1
+#define GPIO_FUNC44_IN_INV_SEL_S  6
+/* GPIO_FUNC44_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC44_IN_SEL    0x0000003F
+#define GPIO_FUNC44_IN_SEL_M  ((GPIO_FUNC44_IN_SEL_V)<<(GPIO_FUNC44_IN_SEL_S))
+#define GPIO_FUNC44_IN_SEL_V  0x3F
+#define GPIO_FUNC44_IN_SEL_S  0
+
+#define GPIO_FUNC45_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x208)
+/* GPIO_SIG45_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG45_IN_SEL    (BIT(7))
+#define GPIO_SIG45_IN_SEL_M  (BIT(7))
+#define GPIO_SIG45_IN_SEL_V  0x1
+#define GPIO_SIG45_IN_SEL_S  7
+/* GPIO_FUNC45_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC45_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC45_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC45_IN_INV_SEL_V  0x1
+#define GPIO_FUNC45_IN_INV_SEL_S  6
+/* GPIO_FUNC45_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC45_IN_SEL    0x0000003F
+#define GPIO_FUNC45_IN_SEL_M  ((GPIO_FUNC45_IN_SEL_V)<<(GPIO_FUNC45_IN_SEL_S))
+#define GPIO_FUNC45_IN_SEL_V  0x3F
+#define GPIO_FUNC45_IN_SEL_S  0
+
+#define GPIO_FUNC46_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x20C)
+/* GPIO_SIG46_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG46_IN_SEL    (BIT(7))
+#define GPIO_SIG46_IN_SEL_M  (BIT(7))
+#define GPIO_SIG46_IN_SEL_V  0x1
+#define GPIO_SIG46_IN_SEL_S  7
+/* GPIO_FUNC46_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC46_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC46_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC46_IN_INV_SEL_V  0x1
+#define GPIO_FUNC46_IN_INV_SEL_S  6
+/* GPIO_FUNC46_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC46_IN_SEL    0x0000003F
+#define GPIO_FUNC46_IN_SEL_M  ((GPIO_FUNC46_IN_SEL_V)<<(GPIO_FUNC46_IN_SEL_S))
+#define GPIO_FUNC46_IN_SEL_V  0x3F
+#define GPIO_FUNC46_IN_SEL_S  0
+
+#define GPIO_FUNC47_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x210)
+/* GPIO_SIG47_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG47_IN_SEL    (BIT(7))
+#define GPIO_SIG47_IN_SEL_M  (BIT(7))
+#define GPIO_SIG47_IN_SEL_V  0x1
+#define GPIO_SIG47_IN_SEL_S  7
+/* GPIO_FUNC47_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC47_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC47_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC47_IN_INV_SEL_V  0x1
+#define GPIO_FUNC47_IN_INV_SEL_S  6
+/* GPIO_FUNC47_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC47_IN_SEL    0x0000003F
+#define GPIO_FUNC47_IN_SEL_M  ((GPIO_FUNC47_IN_SEL_V)<<(GPIO_FUNC47_IN_SEL_S))
+#define GPIO_FUNC47_IN_SEL_V  0x3F
+#define GPIO_FUNC47_IN_SEL_S  0
+
+#define GPIO_FUNC48_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x214)
+/* GPIO_SIG48_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG48_IN_SEL    (BIT(7))
+#define GPIO_SIG48_IN_SEL_M  (BIT(7))
+#define GPIO_SIG48_IN_SEL_V  0x1
+#define GPIO_SIG48_IN_SEL_S  7
+/* GPIO_FUNC48_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC48_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC48_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC48_IN_INV_SEL_V  0x1
+#define GPIO_FUNC48_IN_INV_SEL_S  6
+/* GPIO_FUNC48_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC48_IN_SEL    0x0000003F
+#define GPIO_FUNC48_IN_SEL_M  ((GPIO_FUNC48_IN_SEL_V)<<(GPIO_FUNC48_IN_SEL_S))
+#define GPIO_FUNC48_IN_SEL_V  0x3F
+#define GPIO_FUNC48_IN_SEL_S  0
+
+#define GPIO_FUNC49_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x218)
+/* GPIO_SIG49_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG49_IN_SEL    (BIT(7))
+#define GPIO_SIG49_IN_SEL_M  (BIT(7))
+#define GPIO_SIG49_IN_SEL_V  0x1
+#define GPIO_SIG49_IN_SEL_S  7
+/* GPIO_FUNC49_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC49_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC49_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC49_IN_INV_SEL_V  0x1
+#define GPIO_FUNC49_IN_INV_SEL_S  6
+/* GPIO_FUNC49_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC49_IN_SEL    0x0000003F
+#define GPIO_FUNC49_IN_SEL_M  ((GPIO_FUNC49_IN_SEL_V)<<(GPIO_FUNC49_IN_SEL_S))
+#define GPIO_FUNC49_IN_SEL_V  0x3F
+#define GPIO_FUNC49_IN_SEL_S  0
+
+#define GPIO_FUNC50_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x21C)
+/* GPIO_SIG50_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG50_IN_SEL    (BIT(7))
+#define GPIO_SIG50_IN_SEL_M  (BIT(7))
+#define GPIO_SIG50_IN_SEL_V  0x1
+#define GPIO_SIG50_IN_SEL_S  7
+/* GPIO_FUNC50_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC50_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC50_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC50_IN_INV_SEL_V  0x1
+#define GPIO_FUNC50_IN_INV_SEL_S  6
+/* GPIO_FUNC50_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC50_IN_SEL    0x0000003F
+#define GPIO_FUNC50_IN_SEL_M  ((GPIO_FUNC50_IN_SEL_V)<<(GPIO_FUNC50_IN_SEL_S))
+#define GPIO_FUNC50_IN_SEL_V  0x3F
+#define GPIO_FUNC50_IN_SEL_S  0
+
+#define GPIO_FUNC51_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x220)
+/* GPIO_SIG51_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG51_IN_SEL    (BIT(7))
+#define GPIO_SIG51_IN_SEL_M  (BIT(7))
+#define GPIO_SIG51_IN_SEL_V  0x1
+#define GPIO_SIG51_IN_SEL_S  7
+/* GPIO_FUNC51_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC51_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC51_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC51_IN_INV_SEL_V  0x1
+#define GPIO_FUNC51_IN_INV_SEL_S  6
+/* GPIO_FUNC51_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC51_IN_SEL    0x0000003F
+#define GPIO_FUNC51_IN_SEL_M  ((GPIO_FUNC51_IN_SEL_V)<<(GPIO_FUNC51_IN_SEL_S))
+#define GPIO_FUNC51_IN_SEL_V  0x3F
+#define GPIO_FUNC51_IN_SEL_S  0
+
+#define GPIO_FUNC52_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x224)
+/* GPIO_SIG52_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG52_IN_SEL    (BIT(7))
+#define GPIO_SIG52_IN_SEL_M  (BIT(7))
+#define GPIO_SIG52_IN_SEL_V  0x1
+#define GPIO_SIG52_IN_SEL_S  7
+/* GPIO_FUNC52_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC52_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC52_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC52_IN_INV_SEL_V  0x1
+#define GPIO_FUNC52_IN_INV_SEL_S  6
+/* GPIO_FUNC52_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC52_IN_SEL    0x0000003F
+#define GPIO_FUNC52_IN_SEL_M  ((GPIO_FUNC52_IN_SEL_V)<<(GPIO_FUNC52_IN_SEL_S))
+#define GPIO_FUNC52_IN_SEL_V  0x3F
+#define GPIO_FUNC52_IN_SEL_S  0
+
+#define GPIO_FUNC53_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x228)
+/* GPIO_SIG53_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG53_IN_SEL    (BIT(7))
+#define GPIO_SIG53_IN_SEL_M  (BIT(7))
+#define GPIO_SIG53_IN_SEL_V  0x1
+#define GPIO_SIG53_IN_SEL_S  7
+/* GPIO_FUNC53_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC53_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC53_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC53_IN_INV_SEL_V  0x1
+#define GPIO_FUNC53_IN_INV_SEL_S  6
+/* GPIO_FUNC53_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC53_IN_SEL    0x0000003F
+#define GPIO_FUNC53_IN_SEL_M  ((GPIO_FUNC53_IN_SEL_V)<<(GPIO_FUNC53_IN_SEL_S))
+#define GPIO_FUNC53_IN_SEL_V  0x3F
+#define GPIO_FUNC53_IN_SEL_S  0
+
+#define GPIO_FUNC54_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x22C)
+/* GPIO_SIG54_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG54_IN_SEL    (BIT(7))
+#define GPIO_SIG54_IN_SEL_M  (BIT(7))
+#define GPIO_SIG54_IN_SEL_V  0x1
+#define GPIO_SIG54_IN_SEL_S  7
+/* GPIO_FUNC54_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC54_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC54_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC54_IN_INV_SEL_V  0x1
+#define GPIO_FUNC54_IN_INV_SEL_S  6
+/* GPIO_FUNC54_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC54_IN_SEL    0x0000003F
+#define GPIO_FUNC54_IN_SEL_M  ((GPIO_FUNC54_IN_SEL_V)<<(GPIO_FUNC54_IN_SEL_S))
+#define GPIO_FUNC54_IN_SEL_V  0x3F
+#define GPIO_FUNC54_IN_SEL_S  0
+
+#define GPIO_FUNC55_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x230)
+/* GPIO_SIG55_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG55_IN_SEL    (BIT(7))
+#define GPIO_SIG55_IN_SEL_M  (BIT(7))
+#define GPIO_SIG55_IN_SEL_V  0x1
+#define GPIO_SIG55_IN_SEL_S  7
+/* GPIO_FUNC55_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC55_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC55_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC55_IN_INV_SEL_V  0x1
+#define GPIO_FUNC55_IN_INV_SEL_S  6
+/* GPIO_FUNC55_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC55_IN_SEL    0x0000003F
+#define GPIO_FUNC55_IN_SEL_M  ((GPIO_FUNC55_IN_SEL_V)<<(GPIO_FUNC55_IN_SEL_S))
+#define GPIO_FUNC55_IN_SEL_V  0x3F
+#define GPIO_FUNC55_IN_SEL_S  0
+
+#define GPIO_FUNC56_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x234)
+/* GPIO_SIG56_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG56_IN_SEL    (BIT(7))
+#define GPIO_SIG56_IN_SEL_M  (BIT(7))
+#define GPIO_SIG56_IN_SEL_V  0x1
+#define GPIO_SIG56_IN_SEL_S  7
+/* GPIO_FUNC56_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC56_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC56_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC56_IN_INV_SEL_V  0x1
+#define GPIO_FUNC56_IN_INV_SEL_S  6
+/* GPIO_FUNC56_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC56_IN_SEL    0x0000003F
+#define GPIO_FUNC56_IN_SEL_M  ((GPIO_FUNC56_IN_SEL_V)<<(GPIO_FUNC56_IN_SEL_S))
+#define GPIO_FUNC56_IN_SEL_V  0x3F
+#define GPIO_FUNC56_IN_SEL_S  0
+
+#define GPIO_FUNC57_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x238)
+/* GPIO_SIG57_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG57_IN_SEL    (BIT(7))
+#define GPIO_SIG57_IN_SEL_M  (BIT(7))
+#define GPIO_SIG57_IN_SEL_V  0x1
+#define GPIO_SIG57_IN_SEL_S  7
+/* GPIO_FUNC57_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC57_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC57_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC57_IN_INV_SEL_V  0x1
+#define GPIO_FUNC57_IN_INV_SEL_S  6
+/* GPIO_FUNC57_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC57_IN_SEL    0x0000003F
+#define GPIO_FUNC57_IN_SEL_M  ((GPIO_FUNC57_IN_SEL_V)<<(GPIO_FUNC57_IN_SEL_S))
+#define GPIO_FUNC57_IN_SEL_V  0x3F
+#define GPIO_FUNC57_IN_SEL_S  0
+
+#define GPIO_FUNC58_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x23C)
+/* GPIO_SIG58_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG58_IN_SEL    (BIT(7))
+#define GPIO_SIG58_IN_SEL_M  (BIT(7))
+#define GPIO_SIG58_IN_SEL_V  0x1
+#define GPIO_SIG58_IN_SEL_S  7
+/* GPIO_FUNC58_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC58_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC58_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC58_IN_INV_SEL_V  0x1
+#define GPIO_FUNC58_IN_INV_SEL_S  6
+/* GPIO_FUNC58_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC58_IN_SEL    0x0000003F
+#define GPIO_FUNC58_IN_SEL_M  ((GPIO_FUNC58_IN_SEL_V)<<(GPIO_FUNC58_IN_SEL_S))
+#define GPIO_FUNC58_IN_SEL_V  0x3F
+#define GPIO_FUNC58_IN_SEL_S  0
+
+#define GPIO_FUNC59_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x240)
+/* GPIO_SIG59_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG59_IN_SEL    (BIT(7))
+#define GPIO_SIG59_IN_SEL_M  (BIT(7))
+#define GPIO_SIG59_IN_SEL_V  0x1
+#define GPIO_SIG59_IN_SEL_S  7
+/* GPIO_FUNC59_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC59_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC59_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC59_IN_INV_SEL_V  0x1
+#define GPIO_FUNC59_IN_INV_SEL_S  6
+/* GPIO_FUNC59_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC59_IN_SEL    0x0000003F
+#define GPIO_FUNC59_IN_SEL_M  ((GPIO_FUNC59_IN_SEL_V)<<(GPIO_FUNC59_IN_SEL_S))
+#define GPIO_FUNC59_IN_SEL_V  0x3F
+#define GPIO_FUNC59_IN_SEL_S  0
+
+#define GPIO_FUNC60_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x244)
+/* GPIO_SIG60_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG60_IN_SEL    (BIT(7))
+#define GPIO_SIG60_IN_SEL_M  (BIT(7))
+#define GPIO_SIG60_IN_SEL_V  0x1
+#define GPIO_SIG60_IN_SEL_S  7
+/* GPIO_FUNC60_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC60_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC60_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC60_IN_INV_SEL_V  0x1
+#define GPIO_FUNC60_IN_INV_SEL_S  6
+/* GPIO_FUNC60_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC60_IN_SEL    0x0000003F
+#define GPIO_FUNC60_IN_SEL_M  ((GPIO_FUNC60_IN_SEL_V)<<(GPIO_FUNC60_IN_SEL_S))
+#define GPIO_FUNC60_IN_SEL_V  0x3F
+#define GPIO_FUNC60_IN_SEL_S  0
+
+#define GPIO_FUNC61_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x248)
+/* GPIO_SIG61_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG61_IN_SEL    (BIT(7))
+#define GPIO_SIG61_IN_SEL_M  (BIT(7))
+#define GPIO_SIG61_IN_SEL_V  0x1
+#define GPIO_SIG61_IN_SEL_S  7
+/* GPIO_FUNC61_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC61_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC61_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC61_IN_INV_SEL_V  0x1
+#define GPIO_FUNC61_IN_INV_SEL_S  6
+/* GPIO_FUNC61_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC61_IN_SEL    0x0000003F
+#define GPIO_FUNC61_IN_SEL_M  ((GPIO_FUNC61_IN_SEL_V)<<(GPIO_FUNC61_IN_SEL_S))
+#define GPIO_FUNC61_IN_SEL_V  0x3F
+#define GPIO_FUNC61_IN_SEL_S  0
+
+#define GPIO_FUNC62_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x24C)
+/* GPIO_SIG62_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG62_IN_SEL    (BIT(7))
+#define GPIO_SIG62_IN_SEL_M  (BIT(7))
+#define GPIO_SIG62_IN_SEL_V  0x1
+#define GPIO_SIG62_IN_SEL_S  7
+/* GPIO_FUNC62_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC62_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC62_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC62_IN_INV_SEL_V  0x1
+#define GPIO_FUNC62_IN_INV_SEL_S  6
+/* GPIO_FUNC62_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC62_IN_SEL    0x0000003F
+#define GPIO_FUNC62_IN_SEL_M  ((GPIO_FUNC62_IN_SEL_V)<<(GPIO_FUNC62_IN_SEL_S))
+#define GPIO_FUNC62_IN_SEL_V  0x3F
+#define GPIO_FUNC62_IN_SEL_S  0
+
+#define GPIO_FUNC63_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x250)
+/* GPIO_SIG63_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG63_IN_SEL    (BIT(7))
+#define GPIO_SIG63_IN_SEL_M  (BIT(7))
+#define GPIO_SIG63_IN_SEL_V  0x1
+#define GPIO_SIG63_IN_SEL_S  7
+/* GPIO_FUNC63_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC63_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC63_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC63_IN_INV_SEL_V  0x1
+#define GPIO_FUNC63_IN_INV_SEL_S  6
+/* GPIO_FUNC63_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC63_IN_SEL    0x0000003F
+#define GPIO_FUNC63_IN_SEL_M  ((GPIO_FUNC63_IN_SEL_V)<<(GPIO_FUNC63_IN_SEL_S))
+#define GPIO_FUNC63_IN_SEL_V  0x3F
+#define GPIO_FUNC63_IN_SEL_S  0
+
+#define GPIO_FUNC64_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x254)
+/* GPIO_SIG64_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG64_IN_SEL    (BIT(7))
+#define GPIO_SIG64_IN_SEL_M  (BIT(7))
+#define GPIO_SIG64_IN_SEL_V  0x1
+#define GPIO_SIG64_IN_SEL_S  7
+/* GPIO_FUNC64_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC64_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC64_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC64_IN_INV_SEL_V  0x1
+#define GPIO_FUNC64_IN_INV_SEL_S  6
+/* GPIO_FUNC64_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC64_IN_SEL    0x0000003F
+#define GPIO_FUNC64_IN_SEL_M  ((GPIO_FUNC64_IN_SEL_V)<<(GPIO_FUNC64_IN_SEL_S))
+#define GPIO_FUNC64_IN_SEL_V  0x3F
+#define GPIO_FUNC64_IN_SEL_S  0
+
+#define GPIO_FUNC65_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x258)
+/* GPIO_SIG65_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG65_IN_SEL    (BIT(7))
+#define GPIO_SIG65_IN_SEL_M  (BIT(7))
+#define GPIO_SIG65_IN_SEL_V  0x1
+#define GPIO_SIG65_IN_SEL_S  7
+/* GPIO_FUNC65_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC65_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC65_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC65_IN_INV_SEL_V  0x1
+#define GPIO_FUNC65_IN_INV_SEL_S  6
+/* GPIO_FUNC65_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC65_IN_SEL    0x0000003F
+#define GPIO_FUNC65_IN_SEL_M  ((GPIO_FUNC65_IN_SEL_V)<<(GPIO_FUNC65_IN_SEL_S))
+#define GPIO_FUNC65_IN_SEL_V  0x3F
+#define GPIO_FUNC65_IN_SEL_S  0
+
+#define GPIO_FUNC66_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x25C)
+/* GPIO_SIG66_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG66_IN_SEL    (BIT(7))
+#define GPIO_SIG66_IN_SEL_M  (BIT(7))
+#define GPIO_SIG66_IN_SEL_V  0x1
+#define GPIO_SIG66_IN_SEL_S  7
+/* GPIO_FUNC66_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC66_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC66_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC66_IN_INV_SEL_V  0x1
+#define GPIO_FUNC66_IN_INV_SEL_S  6
+/* GPIO_FUNC66_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC66_IN_SEL    0x0000003F
+#define GPIO_FUNC66_IN_SEL_M  ((GPIO_FUNC66_IN_SEL_V)<<(GPIO_FUNC66_IN_SEL_S))
+#define GPIO_FUNC66_IN_SEL_V  0x3F
+#define GPIO_FUNC66_IN_SEL_S  0
+
+#define GPIO_FUNC67_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x260)
+/* GPIO_SIG67_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG67_IN_SEL    (BIT(7))
+#define GPIO_SIG67_IN_SEL_M  (BIT(7))
+#define GPIO_SIG67_IN_SEL_V  0x1
+#define GPIO_SIG67_IN_SEL_S  7
+/* GPIO_FUNC67_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC67_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC67_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC67_IN_INV_SEL_V  0x1
+#define GPIO_FUNC67_IN_INV_SEL_S  6
+/* GPIO_FUNC67_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC67_IN_SEL    0x0000003F
+#define GPIO_FUNC67_IN_SEL_M  ((GPIO_FUNC67_IN_SEL_V)<<(GPIO_FUNC67_IN_SEL_S))
+#define GPIO_FUNC67_IN_SEL_V  0x3F
+#define GPIO_FUNC67_IN_SEL_S  0
+
+#define GPIO_FUNC68_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x264)
+/* GPIO_SIG68_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG68_IN_SEL    (BIT(7))
+#define GPIO_SIG68_IN_SEL_M  (BIT(7))
+#define GPIO_SIG68_IN_SEL_V  0x1
+#define GPIO_SIG68_IN_SEL_S  7
+/* GPIO_FUNC68_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC68_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC68_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC68_IN_INV_SEL_V  0x1
+#define GPIO_FUNC68_IN_INV_SEL_S  6
+/* GPIO_FUNC68_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC68_IN_SEL    0x0000003F
+#define GPIO_FUNC68_IN_SEL_M  ((GPIO_FUNC68_IN_SEL_V)<<(GPIO_FUNC68_IN_SEL_S))
+#define GPIO_FUNC68_IN_SEL_V  0x3F
+#define GPIO_FUNC68_IN_SEL_S  0
+
+#define GPIO_FUNC69_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x268)
+/* GPIO_SIG69_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG69_IN_SEL    (BIT(7))
+#define GPIO_SIG69_IN_SEL_M  (BIT(7))
+#define GPIO_SIG69_IN_SEL_V  0x1
+#define GPIO_SIG69_IN_SEL_S  7
+/* GPIO_FUNC69_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC69_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC69_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC69_IN_INV_SEL_V  0x1
+#define GPIO_FUNC69_IN_INV_SEL_S  6
+/* GPIO_FUNC69_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC69_IN_SEL    0x0000003F
+#define GPIO_FUNC69_IN_SEL_M  ((GPIO_FUNC69_IN_SEL_V)<<(GPIO_FUNC69_IN_SEL_S))
+#define GPIO_FUNC69_IN_SEL_V  0x3F
+#define GPIO_FUNC69_IN_SEL_S  0
+
+#define GPIO_FUNC70_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x26C)
+/* GPIO_SIG70_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG70_IN_SEL    (BIT(7))
+#define GPIO_SIG70_IN_SEL_M  (BIT(7))
+#define GPIO_SIG70_IN_SEL_V  0x1
+#define GPIO_SIG70_IN_SEL_S  7
+/* GPIO_FUNC70_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC70_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC70_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC70_IN_INV_SEL_V  0x1
+#define GPIO_FUNC70_IN_INV_SEL_S  6
+/* GPIO_FUNC70_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC70_IN_SEL    0x0000003F
+#define GPIO_FUNC70_IN_SEL_M  ((GPIO_FUNC70_IN_SEL_V)<<(GPIO_FUNC70_IN_SEL_S))
+#define GPIO_FUNC70_IN_SEL_V  0x3F
+#define GPIO_FUNC70_IN_SEL_S  0
+
+#define GPIO_FUNC71_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x270)
+/* GPIO_SIG71_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG71_IN_SEL    (BIT(7))
+#define GPIO_SIG71_IN_SEL_M  (BIT(7))
+#define GPIO_SIG71_IN_SEL_V  0x1
+#define GPIO_SIG71_IN_SEL_S  7
+/* GPIO_FUNC71_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC71_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC71_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC71_IN_INV_SEL_V  0x1
+#define GPIO_FUNC71_IN_INV_SEL_S  6
+/* GPIO_FUNC71_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC71_IN_SEL    0x0000003F
+#define GPIO_FUNC71_IN_SEL_M  ((GPIO_FUNC71_IN_SEL_V)<<(GPIO_FUNC71_IN_SEL_S))
+#define GPIO_FUNC71_IN_SEL_V  0x3F
+#define GPIO_FUNC71_IN_SEL_S  0
+
+#define GPIO_FUNC72_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x274)
+/* GPIO_SIG72_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG72_IN_SEL    (BIT(7))
+#define GPIO_SIG72_IN_SEL_M  (BIT(7))
+#define GPIO_SIG72_IN_SEL_V  0x1
+#define GPIO_SIG72_IN_SEL_S  7
+/* GPIO_FUNC72_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC72_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC72_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC72_IN_INV_SEL_V  0x1
+#define GPIO_FUNC72_IN_INV_SEL_S  6
+/* GPIO_FUNC72_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC72_IN_SEL    0x0000003F
+#define GPIO_FUNC72_IN_SEL_M  ((GPIO_FUNC72_IN_SEL_V)<<(GPIO_FUNC72_IN_SEL_S))
+#define GPIO_FUNC72_IN_SEL_V  0x3F
+#define GPIO_FUNC72_IN_SEL_S  0
+
+#define GPIO_FUNC73_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x278)
+/* GPIO_SIG73_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG73_IN_SEL    (BIT(7))
+#define GPIO_SIG73_IN_SEL_M  (BIT(7))
+#define GPIO_SIG73_IN_SEL_V  0x1
+#define GPIO_SIG73_IN_SEL_S  7
+/* GPIO_FUNC73_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC73_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC73_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC73_IN_INV_SEL_V  0x1
+#define GPIO_FUNC73_IN_INV_SEL_S  6
+/* GPIO_FUNC73_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC73_IN_SEL    0x0000003F
+#define GPIO_FUNC73_IN_SEL_M  ((GPIO_FUNC73_IN_SEL_V)<<(GPIO_FUNC73_IN_SEL_S))
+#define GPIO_FUNC73_IN_SEL_V  0x3F
+#define GPIO_FUNC73_IN_SEL_S  0
+
+#define GPIO_FUNC74_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x27C)
+/* GPIO_SIG74_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG74_IN_SEL    (BIT(7))
+#define GPIO_SIG74_IN_SEL_M  (BIT(7))
+#define GPIO_SIG74_IN_SEL_V  0x1
+#define GPIO_SIG74_IN_SEL_S  7
+/* GPIO_FUNC74_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC74_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC74_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC74_IN_INV_SEL_V  0x1
+#define GPIO_FUNC74_IN_INV_SEL_S  6
+/* GPIO_FUNC74_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC74_IN_SEL    0x0000003F
+#define GPIO_FUNC74_IN_SEL_M  ((GPIO_FUNC74_IN_SEL_V)<<(GPIO_FUNC74_IN_SEL_S))
+#define GPIO_FUNC74_IN_SEL_V  0x3F
+#define GPIO_FUNC74_IN_SEL_S  0
+
+#define GPIO_FUNC75_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x280)
+/* GPIO_SIG75_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG75_IN_SEL    (BIT(7))
+#define GPIO_SIG75_IN_SEL_M  (BIT(7))
+#define GPIO_SIG75_IN_SEL_V  0x1
+#define GPIO_SIG75_IN_SEL_S  7
+/* GPIO_FUNC75_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC75_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC75_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC75_IN_INV_SEL_V  0x1
+#define GPIO_FUNC75_IN_INV_SEL_S  6
+/* GPIO_FUNC75_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC75_IN_SEL    0x0000003F
+#define GPIO_FUNC75_IN_SEL_M  ((GPIO_FUNC75_IN_SEL_V)<<(GPIO_FUNC75_IN_SEL_S))
+#define GPIO_FUNC75_IN_SEL_V  0x3F
+#define GPIO_FUNC75_IN_SEL_S  0
+
+#define GPIO_FUNC76_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x284)
+/* GPIO_SIG76_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG76_IN_SEL    (BIT(7))
+#define GPIO_SIG76_IN_SEL_M  (BIT(7))
+#define GPIO_SIG76_IN_SEL_V  0x1
+#define GPIO_SIG76_IN_SEL_S  7
+/* GPIO_FUNC76_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC76_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC76_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC76_IN_INV_SEL_V  0x1
+#define GPIO_FUNC76_IN_INV_SEL_S  6
+/* GPIO_FUNC76_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC76_IN_SEL    0x0000003F
+#define GPIO_FUNC76_IN_SEL_M  ((GPIO_FUNC76_IN_SEL_V)<<(GPIO_FUNC76_IN_SEL_S))
+#define GPIO_FUNC76_IN_SEL_V  0x3F
+#define GPIO_FUNC76_IN_SEL_S  0
+
+#define GPIO_FUNC77_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x288)
+/* GPIO_SIG77_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG77_IN_SEL    (BIT(7))
+#define GPIO_SIG77_IN_SEL_M  (BIT(7))
+#define GPIO_SIG77_IN_SEL_V  0x1
+#define GPIO_SIG77_IN_SEL_S  7
+/* GPIO_FUNC77_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC77_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC77_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC77_IN_INV_SEL_V  0x1
+#define GPIO_FUNC77_IN_INV_SEL_S  6
+/* GPIO_FUNC77_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC77_IN_SEL    0x0000003F
+#define GPIO_FUNC77_IN_SEL_M  ((GPIO_FUNC77_IN_SEL_V)<<(GPIO_FUNC77_IN_SEL_S))
+#define GPIO_FUNC77_IN_SEL_V  0x3F
+#define GPIO_FUNC77_IN_SEL_S  0
+
+#define GPIO_FUNC78_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x28C)
+/* GPIO_SIG78_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG78_IN_SEL    (BIT(7))
+#define GPIO_SIG78_IN_SEL_M  (BIT(7))
+#define GPIO_SIG78_IN_SEL_V  0x1
+#define GPIO_SIG78_IN_SEL_S  7
+/* GPIO_FUNC78_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC78_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC78_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC78_IN_INV_SEL_V  0x1
+#define GPIO_FUNC78_IN_INV_SEL_S  6
+/* GPIO_FUNC78_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC78_IN_SEL    0x0000003F
+#define GPIO_FUNC78_IN_SEL_M  ((GPIO_FUNC78_IN_SEL_V)<<(GPIO_FUNC78_IN_SEL_S))
+#define GPIO_FUNC78_IN_SEL_V  0x3F
+#define GPIO_FUNC78_IN_SEL_S  0
+
+#define GPIO_FUNC79_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x290)
+/* GPIO_SIG79_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG79_IN_SEL    (BIT(7))
+#define GPIO_SIG79_IN_SEL_M  (BIT(7))
+#define GPIO_SIG79_IN_SEL_V  0x1
+#define GPIO_SIG79_IN_SEL_S  7
+/* GPIO_FUNC79_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC79_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC79_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC79_IN_INV_SEL_V  0x1
+#define GPIO_FUNC79_IN_INV_SEL_S  6
+/* GPIO_FUNC79_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC79_IN_SEL    0x0000003F
+#define GPIO_FUNC79_IN_SEL_M  ((GPIO_FUNC79_IN_SEL_V)<<(GPIO_FUNC79_IN_SEL_S))
+#define GPIO_FUNC79_IN_SEL_V  0x3F
+#define GPIO_FUNC79_IN_SEL_S  0
+
+#define GPIO_FUNC80_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x294)
+/* GPIO_SIG80_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG80_IN_SEL    (BIT(7))
+#define GPIO_SIG80_IN_SEL_M  (BIT(7))
+#define GPIO_SIG80_IN_SEL_V  0x1
+#define GPIO_SIG80_IN_SEL_S  7
+/* GPIO_FUNC80_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC80_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC80_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC80_IN_INV_SEL_V  0x1
+#define GPIO_FUNC80_IN_INV_SEL_S  6
+/* GPIO_FUNC80_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC80_IN_SEL    0x0000003F
+#define GPIO_FUNC80_IN_SEL_M  ((GPIO_FUNC80_IN_SEL_V)<<(GPIO_FUNC80_IN_SEL_S))
+#define GPIO_FUNC80_IN_SEL_V  0x3F
+#define GPIO_FUNC80_IN_SEL_S  0
+
+#define GPIO_FUNC81_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x298)
+/* GPIO_SIG81_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG81_IN_SEL    (BIT(7))
+#define GPIO_SIG81_IN_SEL_M  (BIT(7))
+#define GPIO_SIG81_IN_SEL_V  0x1
+#define GPIO_SIG81_IN_SEL_S  7
+/* GPIO_FUNC81_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC81_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC81_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC81_IN_INV_SEL_V  0x1
+#define GPIO_FUNC81_IN_INV_SEL_S  6
+/* GPIO_FUNC81_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC81_IN_SEL    0x0000003F
+#define GPIO_FUNC81_IN_SEL_M  ((GPIO_FUNC81_IN_SEL_V)<<(GPIO_FUNC81_IN_SEL_S))
+#define GPIO_FUNC81_IN_SEL_V  0x3F
+#define GPIO_FUNC81_IN_SEL_S  0
+
+#define GPIO_FUNC82_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x29C)
+/* GPIO_SIG82_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG82_IN_SEL    (BIT(7))
+#define GPIO_SIG82_IN_SEL_M  (BIT(7))
+#define GPIO_SIG82_IN_SEL_V  0x1
+#define GPIO_SIG82_IN_SEL_S  7
+/* GPIO_FUNC82_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC82_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC82_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC82_IN_INV_SEL_V  0x1
+#define GPIO_FUNC82_IN_INV_SEL_S  6
+/* GPIO_FUNC82_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC82_IN_SEL    0x0000003F
+#define GPIO_FUNC82_IN_SEL_M  ((GPIO_FUNC82_IN_SEL_V)<<(GPIO_FUNC82_IN_SEL_S))
+#define GPIO_FUNC82_IN_SEL_V  0x3F
+#define GPIO_FUNC82_IN_SEL_S  0
+
+#define GPIO_FUNC83_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2A0)
+/* GPIO_SIG83_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG83_IN_SEL    (BIT(7))
+#define GPIO_SIG83_IN_SEL_M  (BIT(7))
+#define GPIO_SIG83_IN_SEL_V  0x1
+#define GPIO_SIG83_IN_SEL_S  7
+/* GPIO_FUNC83_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC83_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC83_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC83_IN_INV_SEL_V  0x1
+#define GPIO_FUNC83_IN_INV_SEL_S  6
+/* GPIO_FUNC83_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC83_IN_SEL    0x0000003F
+#define GPIO_FUNC83_IN_SEL_M  ((GPIO_FUNC83_IN_SEL_V)<<(GPIO_FUNC83_IN_SEL_S))
+#define GPIO_FUNC83_IN_SEL_V  0x3F
+#define GPIO_FUNC83_IN_SEL_S  0
+
+#define GPIO_FUNC84_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2A4)
+/* GPIO_SIG84_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG84_IN_SEL    (BIT(7))
+#define GPIO_SIG84_IN_SEL_M  (BIT(7))
+#define GPIO_SIG84_IN_SEL_V  0x1
+#define GPIO_SIG84_IN_SEL_S  7
+/* GPIO_FUNC84_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC84_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC84_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC84_IN_INV_SEL_V  0x1
+#define GPIO_FUNC84_IN_INV_SEL_S  6
+/* GPIO_FUNC84_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC84_IN_SEL    0x0000003F
+#define GPIO_FUNC84_IN_SEL_M  ((GPIO_FUNC84_IN_SEL_V)<<(GPIO_FUNC84_IN_SEL_S))
+#define GPIO_FUNC84_IN_SEL_V  0x3F
+#define GPIO_FUNC84_IN_SEL_S  0
+
+#define GPIO_FUNC85_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2A8)
+/* GPIO_SIG85_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG85_IN_SEL    (BIT(7))
+#define GPIO_SIG85_IN_SEL_M  (BIT(7))
+#define GPIO_SIG85_IN_SEL_V  0x1
+#define GPIO_SIG85_IN_SEL_S  7
+/* GPIO_FUNC85_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC85_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC85_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC85_IN_INV_SEL_V  0x1
+#define GPIO_FUNC85_IN_INV_SEL_S  6
+/* GPIO_FUNC85_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC85_IN_SEL    0x0000003F
+#define GPIO_FUNC85_IN_SEL_M  ((GPIO_FUNC85_IN_SEL_V)<<(GPIO_FUNC85_IN_SEL_S))
+#define GPIO_FUNC85_IN_SEL_V  0x3F
+#define GPIO_FUNC85_IN_SEL_S  0
+
+#define GPIO_FUNC86_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2AC)
+/* GPIO_SIG86_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG86_IN_SEL    (BIT(7))
+#define GPIO_SIG86_IN_SEL_M  (BIT(7))
+#define GPIO_SIG86_IN_SEL_V  0x1
+#define GPIO_SIG86_IN_SEL_S  7
+/* GPIO_FUNC86_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC86_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC86_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC86_IN_INV_SEL_V  0x1
+#define GPIO_FUNC86_IN_INV_SEL_S  6
+/* GPIO_FUNC86_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC86_IN_SEL    0x0000003F
+#define GPIO_FUNC86_IN_SEL_M  ((GPIO_FUNC86_IN_SEL_V)<<(GPIO_FUNC86_IN_SEL_S))
+#define GPIO_FUNC86_IN_SEL_V  0x3F
+#define GPIO_FUNC86_IN_SEL_S  0
+
+#define GPIO_FUNC87_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2B0)
+/* GPIO_SIG87_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG87_IN_SEL    (BIT(7))
+#define GPIO_SIG87_IN_SEL_M  (BIT(7))
+#define GPIO_SIG87_IN_SEL_V  0x1
+#define GPIO_SIG87_IN_SEL_S  7
+/* GPIO_FUNC87_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC87_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC87_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC87_IN_INV_SEL_V  0x1
+#define GPIO_FUNC87_IN_INV_SEL_S  6
+/* GPIO_FUNC87_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC87_IN_SEL    0x0000003F
+#define GPIO_FUNC87_IN_SEL_M  ((GPIO_FUNC87_IN_SEL_V)<<(GPIO_FUNC87_IN_SEL_S))
+#define GPIO_FUNC87_IN_SEL_V  0x3F
+#define GPIO_FUNC87_IN_SEL_S  0
+
+#define GPIO_FUNC88_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2B4)
+/* GPIO_SIG88_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG88_IN_SEL    (BIT(7))
+#define GPIO_SIG88_IN_SEL_M  (BIT(7))
+#define GPIO_SIG88_IN_SEL_V  0x1
+#define GPIO_SIG88_IN_SEL_S  7
+/* GPIO_FUNC88_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC88_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC88_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC88_IN_INV_SEL_V  0x1
+#define GPIO_FUNC88_IN_INV_SEL_S  6
+/* GPIO_FUNC88_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC88_IN_SEL    0x0000003F
+#define GPIO_FUNC88_IN_SEL_M  ((GPIO_FUNC88_IN_SEL_V)<<(GPIO_FUNC88_IN_SEL_S))
+#define GPIO_FUNC88_IN_SEL_V  0x3F
+#define GPIO_FUNC88_IN_SEL_S  0
+
+#define GPIO_FUNC89_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2B8)
+/* GPIO_SIG89_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG89_IN_SEL    (BIT(7))
+#define GPIO_SIG89_IN_SEL_M  (BIT(7))
+#define GPIO_SIG89_IN_SEL_V  0x1
+#define GPIO_SIG89_IN_SEL_S  7
+/* GPIO_FUNC89_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC89_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC89_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC89_IN_INV_SEL_V  0x1
+#define GPIO_FUNC89_IN_INV_SEL_S  6
+/* GPIO_FUNC89_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC89_IN_SEL    0x0000003F
+#define GPIO_FUNC89_IN_SEL_M  ((GPIO_FUNC89_IN_SEL_V)<<(GPIO_FUNC89_IN_SEL_S))
+#define GPIO_FUNC89_IN_SEL_V  0x3F
+#define GPIO_FUNC89_IN_SEL_S  0
+
+#define GPIO_FUNC90_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2BC)
+/* GPIO_SIG90_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG90_IN_SEL    (BIT(7))
+#define GPIO_SIG90_IN_SEL_M  (BIT(7))
+#define GPIO_SIG90_IN_SEL_V  0x1
+#define GPIO_SIG90_IN_SEL_S  7
+/* GPIO_FUNC90_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC90_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC90_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC90_IN_INV_SEL_V  0x1
+#define GPIO_FUNC90_IN_INV_SEL_S  6
+/* GPIO_FUNC90_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC90_IN_SEL    0x0000003F
+#define GPIO_FUNC90_IN_SEL_M  ((GPIO_FUNC90_IN_SEL_V)<<(GPIO_FUNC90_IN_SEL_S))
+#define GPIO_FUNC90_IN_SEL_V  0x3F
+#define GPIO_FUNC90_IN_SEL_S  0
+
+#define GPIO_FUNC91_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2C0)
+/* GPIO_SIG91_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG91_IN_SEL    (BIT(7))
+#define GPIO_SIG91_IN_SEL_M  (BIT(7))
+#define GPIO_SIG91_IN_SEL_V  0x1
+#define GPIO_SIG91_IN_SEL_S  7
+/* GPIO_FUNC91_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC91_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC91_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC91_IN_INV_SEL_V  0x1
+#define GPIO_FUNC91_IN_INV_SEL_S  6
+/* GPIO_FUNC91_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC91_IN_SEL    0x0000003F
+#define GPIO_FUNC91_IN_SEL_M  ((GPIO_FUNC91_IN_SEL_V)<<(GPIO_FUNC91_IN_SEL_S))
+#define GPIO_FUNC91_IN_SEL_V  0x3F
+#define GPIO_FUNC91_IN_SEL_S  0
+
+#define GPIO_FUNC92_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2C4)
+/* GPIO_SIG92_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG92_IN_SEL    (BIT(7))
+#define GPIO_SIG92_IN_SEL_M  (BIT(7))
+#define GPIO_SIG92_IN_SEL_V  0x1
+#define GPIO_SIG92_IN_SEL_S  7
+/* GPIO_FUNC92_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC92_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC92_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC92_IN_INV_SEL_V  0x1
+#define GPIO_FUNC92_IN_INV_SEL_S  6
+/* GPIO_FUNC92_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC92_IN_SEL    0x0000003F
+#define GPIO_FUNC92_IN_SEL_M  ((GPIO_FUNC92_IN_SEL_V)<<(GPIO_FUNC92_IN_SEL_S))
+#define GPIO_FUNC92_IN_SEL_V  0x3F
+#define GPIO_FUNC92_IN_SEL_S  0
+
+#define GPIO_FUNC93_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2C8)
+/* GPIO_SIG93_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG93_IN_SEL    (BIT(7))
+#define GPIO_SIG93_IN_SEL_M  (BIT(7))
+#define GPIO_SIG93_IN_SEL_V  0x1
+#define GPIO_SIG93_IN_SEL_S  7
+/* GPIO_FUNC93_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC93_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC93_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC93_IN_INV_SEL_V  0x1
+#define GPIO_FUNC93_IN_INV_SEL_S  6
+/* GPIO_FUNC93_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC93_IN_SEL    0x0000003F
+#define GPIO_FUNC93_IN_SEL_M  ((GPIO_FUNC93_IN_SEL_V)<<(GPIO_FUNC93_IN_SEL_S))
+#define GPIO_FUNC93_IN_SEL_V  0x3F
+#define GPIO_FUNC93_IN_SEL_S  0
+
+#define GPIO_FUNC94_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2CC)
+/* GPIO_SIG94_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG94_IN_SEL    (BIT(7))
+#define GPIO_SIG94_IN_SEL_M  (BIT(7))
+#define GPIO_SIG94_IN_SEL_V  0x1
+#define GPIO_SIG94_IN_SEL_S  7
+/* GPIO_FUNC94_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC94_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC94_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC94_IN_INV_SEL_V  0x1
+#define GPIO_FUNC94_IN_INV_SEL_S  6
+/* GPIO_FUNC94_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC94_IN_SEL    0x0000003F
+#define GPIO_FUNC94_IN_SEL_M  ((GPIO_FUNC94_IN_SEL_V)<<(GPIO_FUNC94_IN_SEL_S))
+#define GPIO_FUNC94_IN_SEL_V  0x3F
+#define GPIO_FUNC94_IN_SEL_S  0
+
+#define GPIO_FUNC95_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2D0)
+/* GPIO_SIG95_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG95_IN_SEL    (BIT(7))
+#define GPIO_SIG95_IN_SEL_M  (BIT(7))
+#define GPIO_SIG95_IN_SEL_V  0x1
+#define GPIO_SIG95_IN_SEL_S  7
+/* GPIO_FUNC95_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC95_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC95_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC95_IN_INV_SEL_V  0x1
+#define GPIO_FUNC95_IN_INV_SEL_S  6
+/* GPIO_FUNC95_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC95_IN_SEL    0x0000003F
+#define GPIO_FUNC95_IN_SEL_M  ((GPIO_FUNC95_IN_SEL_V)<<(GPIO_FUNC95_IN_SEL_S))
+#define GPIO_FUNC95_IN_SEL_V  0x3F
+#define GPIO_FUNC95_IN_SEL_S  0
+
+#define GPIO_FUNC96_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2D4)
+/* GPIO_SIG96_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG96_IN_SEL    (BIT(7))
+#define GPIO_SIG96_IN_SEL_M  (BIT(7))
+#define GPIO_SIG96_IN_SEL_V  0x1
+#define GPIO_SIG96_IN_SEL_S  7
+/* GPIO_FUNC96_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC96_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC96_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC96_IN_INV_SEL_V  0x1
+#define GPIO_FUNC96_IN_INV_SEL_S  6
+/* GPIO_FUNC96_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC96_IN_SEL    0x0000003F
+#define GPIO_FUNC96_IN_SEL_M  ((GPIO_FUNC96_IN_SEL_V)<<(GPIO_FUNC96_IN_SEL_S))
+#define GPIO_FUNC96_IN_SEL_V  0x3F
+#define GPIO_FUNC96_IN_SEL_S  0
+
+#define GPIO_FUNC97_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2D8)
+/* GPIO_SIG97_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG97_IN_SEL    (BIT(7))
+#define GPIO_SIG97_IN_SEL_M  (BIT(7))
+#define GPIO_SIG97_IN_SEL_V  0x1
+#define GPIO_SIG97_IN_SEL_S  7
+/* GPIO_FUNC97_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC97_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC97_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC97_IN_INV_SEL_V  0x1
+#define GPIO_FUNC97_IN_INV_SEL_S  6
+/* GPIO_FUNC97_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC97_IN_SEL    0x0000003F
+#define GPIO_FUNC97_IN_SEL_M  ((GPIO_FUNC97_IN_SEL_V)<<(GPIO_FUNC97_IN_SEL_S))
+#define GPIO_FUNC97_IN_SEL_V  0x3F
+#define GPIO_FUNC97_IN_SEL_S  0
+
+#define GPIO_FUNC98_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2DC)
+/* GPIO_SIG98_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG98_IN_SEL    (BIT(7))
+#define GPIO_SIG98_IN_SEL_M  (BIT(7))
+#define GPIO_SIG98_IN_SEL_V  0x1
+#define GPIO_SIG98_IN_SEL_S  7
+/* GPIO_FUNC98_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC98_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC98_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC98_IN_INV_SEL_V  0x1
+#define GPIO_FUNC98_IN_INV_SEL_S  6
+/* GPIO_FUNC98_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC98_IN_SEL    0x0000003F
+#define GPIO_FUNC98_IN_SEL_M  ((GPIO_FUNC98_IN_SEL_V)<<(GPIO_FUNC98_IN_SEL_S))
+#define GPIO_FUNC98_IN_SEL_V  0x3F
+#define GPIO_FUNC98_IN_SEL_S  0
+
+#define GPIO_FUNC99_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2E0)
+/* GPIO_SIG99_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG99_IN_SEL    (BIT(7))
+#define GPIO_SIG99_IN_SEL_M  (BIT(7))
+#define GPIO_SIG99_IN_SEL_V  0x1
+#define GPIO_SIG99_IN_SEL_S  7
+/* GPIO_FUNC99_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC99_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC99_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC99_IN_INV_SEL_V  0x1
+#define GPIO_FUNC99_IN_INV_SEL_S  6
+/* GPIO_FUNC99_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC99_IN_SEL    0x0000003F
+#define GPIO_FUNC99_IN_SEL_M  ((GPIO_FUNC99_IN_SEL_V)<<(GPIO_FUNC99_IN_SEL_S))
+#define GPIO_FUNC99_IN_SEL_V  0x3F
+#define GPIO_FUNC99_IN_SEL_S  0
+
+#define GPIO_FUNC100_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2E4)
+/* GPIO_SIG100_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG100_IN_SEL    (BIT(7))
+#define GPIO_SIG100_IN_SEL_M  (BIT(7))
+#define GPIO_SIG100_IN_SEL_V  0x1
+#define GPIO_SIG100_IN_SEL_S  7
+/* GPIO_FUNC100_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC100_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC100_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC100_IN_INV_SEL_V  0x1
+#define GPIO_FUNC100_IN_INV_SEL_S  6
+/* GPIO_FUNC100_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC100_IN_SEL    0x0000003F
+#define GPIO_FUNC100_IN_SEL_M  ((GPIO_FUNC100_IN_SEL_V)<<(GPIO_FUNC100_IN_SEL_S))
+#define GPIO_FUNC100_IN_SEL_V  0x3F
+#define GPIO_FUNC100_IN_SEL_S  0
+
+#define GPIO_FUNC101_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2E8)
+/* GPIO_SIG101_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG101_IN_SEL    (BIT(7))
+#define GPIO_SIG101_IN_SEL_M  (BIT(7))
+#define GPIO_SIG101_IN_SEL_V  0x1
+#define GPIO_SIG101_IN_SEL_S  7
+/* GPIO_FUNC101_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC101_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC101_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC101_IN_INV_SEL_V  0x1
+#define GPIO_FUNC101_IN_INV_SEL_S  6
+/* GPIO_FUNC101_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC101_IN_SEL    0x0000003F
+#define GPIO_FUNC101_IN_SEL_M  ((GPIO_FUNC101_IN_SEL_V)<<(GPIO_FUNC101_IN_SEL_S))
+#define GPIO_FUNC101_IN_SEL_V  0x3F
+#define GPIO_FUNC101_IN_SEL_S  0
+
+#define GPIO_FUNC102_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2EC)
+/* GPIO_SIG102_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG102_IN_SEL    (BIT(7))
+#define GPIO_SIG102_IN_SEL_M  (BIT(7))
+#define GPIO_SIG102_IN_SEL_V  0x1
+#define GPIO_SIG102_IN_SEL_S  7
+/* GPIO_FUNC102_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC102_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC102_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC102_IN_INV_SEL_V  0x1
+#define GPIO_FUNC102_IN_INV_SEL_S  6
+/* GPIO_FUNC102_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC102_IN_SEL    0x0000003F
+#define GPIO_FUNC102_IN_SEL_M  ((GPIO_FUNC102_IN_SEL_V)<<(GPIO_FUNC102_IN_SEL_S))
+#define GPIO_FUNC102_IN_SEL_V  0x3F
+#define GPIO_FUNC102_IN_SEL_S  0
+
+#define GPIO_FUNC103_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2F0)
+/* GPIO_SIG103_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG103_IN_SEL    (BIT(7))
+#define GPIO_SIG103_IN_SEL_M  (BIT(7))
+#define GPIO_SIG103_IN_SEL_V  0x1
+#define GPIO_SIG103_IN_SEL_S  7
+/* GPIO_FUNC103_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC103_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC103_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC103_IN_INV_SEL_V  0x1
+#define GPIO_FUNC103_IN_INV_SEL_S  6
+/* GPIO_FUNC103_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC103_IN_SEL    0x0000003F
+#define GPIO_FUNC103_IN_SEL_M  ((GPIO_FUNC103_IN_SEL_V)<<(GPIO_FUNC103_IN_SEL_S))
+#define GPIO_FUNC103_IN_SEL_V  0x3F
+#define GPIO_FUNC103_IN_SEL_S  0
+
+#define GPIO_FUNC104_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2F4)
+/* GPIO_SIG104_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG104_IN_SEL    (BIT(7))
+#define GPIO_SIG104_IN_SEL_M  (BIT(7))
+#define GPIO_SIG104_IN_SEL_V  0x1
+#define GPIO_SIG104_IN_SEL_S  7
+/* GPIO_FUNC104_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC104_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC104_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC104_IN_INV_SEL_V  0x1
+#define GPIO_FUNC104_IN_INV_SEL_S  6
+/* GPIO_FUNC104_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC104_IN_SEL    0x0000003F
+#define GPIO_FUNC104_IN_SEL_M  ((GPIO_FUNC104_IN_SEL_V)<<(GPIO_FUNC104_IN_SEL_S))
+#define GPIO_FUNC104_IN_SEL_V  0x3F
+#define GPIO_FUNC104_IN_SEL_S  0
+
+#define GPIO_FUNC105_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2F8)
+/* GPIO_SIG105_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG105_IN_SEL    (BIT(7))
+#define GPIO_SIG105_IN_SEL_M  (BIT(7))
+#define GPIO_SIG105_IN_SEL_V  0x1
+#define GPIO_SIG105_IN_SEL_S  7
+/* GPIO_FUNC105_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC105_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC105_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC105_IN_INV_SEL_V  0x1
+#define GPIO_FUNC105_IN_INV_SEL_S  6
+/* GPIO_FUNC105_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC105_IN_SEL    0x0000003F
+#define GPIO_FUNC105_IN_SEL_M  ((GPIO_FUNC105_IN_SEL_V)<<(GPIO_FUNC105_IN_SEL_S))
+#define GPIO_FUNC105_IN_SEL_V  0x3F
+#define GPIO_FUNC105_IN_SEL_S  0
+
+#define GPIO_FUNC106_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x2FC)
+/* GPIO_SIG106_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG106_IN_SEL    (BIT(7))
+#define GPIO_SIG106_IN_SEL_M  (BIT(7))
+#define GPIO_SIG106_IN_SEL_V  0x1
+#define GPIO_SIG106_IN_SEL_S  7
+/* GPIO_FUNC106_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC106_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC106_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC106_IN_INV_SEL_V  0x1
+#define GPIO_FUNC106_IN_INV_SEL_S  6
+/* GPIO_FUNC106_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC106_IN_SEL    0x0000003F
+#define GPIO_FUNC106_IN_SEL_M  ((GPIO_FUNC106_IN_SEL_V)<<(GPIO_FUNC106_IN_SEL_S))
+#define GPIO_FUNC106_IN_SEL_V  0x3F
+#define GPIO_FUNC106_IN_SEL_S  0
+
+#define GPIO_FUNC107_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x300)
+/* GPIO_SIG107_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG107_IN_SEL    (BIT(7))
+#define GPIO_SIG107_IN_SEL_M  (BIT(7))
+#define GPIO_SIG107_IN_SEL_V  0x1
+#define GPIO_SIG107_IN_SEL_S  7
+/* GPIO_FUNC107_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC107_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC107_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC107_IN_INV_SEL_V  0x1
+#define GPIO_FUNC107_IN_INV_SEL_S  6
+/* GPIO_FUNC107_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC107_IN_SEL    0x0000003F
+#define GPIO_FUNC107_IN_SEL_M  ((GPIO_FUNC107_IN_SEL_V)<<(GPIO_FUNC107_IN_SEL_S))
+#define GPIO_FUNC107_IN_SEL_V  0x3F
+#define GPIO_FUNC107_IN_SEL_S  0
+
+#define GPIO_FUNC108_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x304)
+/* GPIO_SIG108_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG108_IN_SEL    (BIT(7))
+#define GPIO_SIG108_IN_SEL_M  (BIT(7))
+#define GPIO_SIG108_IN_SEL_V  0x1
+#define GPIO_SIG108_IN_SEL_S  7
+/* GPIO_FUNC108_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC108_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC108_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC108_IN_INV_SEL_V  0x1
+#define GPIO_FUNC108_IN_INV_SEL_S  6
+/* GPIO_FUNC108_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC108_IN_SEL    0x0000003F
+#define GPIO_FUNC108_IN_SEL_M  ((GPIO_FUNC108_IN_SEL_V)<<(GPIO_FUNC108_IN_SEL_S))
+#define GPIO_FUNC108_IN_SEL_V  0x3F
+#define GPIO_FUNC108_IN_SEL_S  0
+
+#define GPIO_FUNC109_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x308)
+/* GPIO_SIG109_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG109_IN_SEL    (BIT(7))
+#define GPIO_SIG109_IN_SEL_M  (BIT(7))
+#define GPIO_SIG109_IN_SEL_V  0x1
+#define GPIO_SIG109_IN_SEL_S  7
+/* GPIO_FUNC109_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC109_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC109_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC109_IN_INV_SEL_V  0x1
+#define GPIO_FUNC109_IN_INV_SEL_S  6
+/* GPIO_FUNC109_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC109_IN_SEL    0x0000003F
+#define GPIO_FUNC109_IN_SEL_M  ((GPIO_FUNC109_IN_SEL_V)<<(GPIO_FUNC109_IN_SEL_S))
+#define GPIO_FUNC109_IN_SEL_V  0x3F
+#define GPIO_FUNC109_IN_SEL_S  0
+
+#define GPIO_FUNC110_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x30C)
+/* GPIO_SIG110_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG110_IN_SEL    (BIT(7))
+#define GPIO_SIG110_IN_SEL_M  (BIT(7))
+#define GPIO_SIG110_IN_SEL_V  0x1
+#define GPIO_SIG110_IN_SEL_S  7
+/* GPIO_FUNC110_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC110_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC110_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC110_IN_INV_SEL_V  0x1
+#define GPIO_FUNC110_IN_INV_SEL_S  6
+/* GPIO_FUNC110_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC110_IN_SEL    0x0000003F
+#define GPIO_FUNC110_IN_SEL_M  ((GPIO_FUNC110_IN_SEL_V)<<(GPIO_FUNC110_IN_SEL_S))
+#define GPIO_FUNC110_IN_SEL_V  0x3F
+#define GPIO_FUNC110_IN_SEL_S  0
+
+#define GPIO_FUNC111_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x310)
+/* GPIO_SIG111_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG111_IN_SEL    (BIT(7))
+#define GPIO_SIG111_IN_SEL_M  (BIT(7))
+#define GPIO_SIG111_IN_SEL_V  0x1
+#define GPIO_SIG111_IN_SEL_S  7
+/* GPIO_FUNC111_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC111_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC111_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC111_IN_INV_SEL_V  0x1
+#define GPIO_FUNC111_IN_INV_SEL_S  6
+/* GPIO_FUNC111_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC111_IN_SEL    0x0000003F
+#define GPIO_FUNC111_IN_SEL_M  ((GPIO_FUNC111_IN_SEL_V)<<(GPIO_FUNC111_IN_SEL_S))
+#define GPIO_FUNC111_IN_SEL_V  0x3F
+#define GPIO_FUNC111_IN_SEL_S  0
+
+#define GPIO_FUNC112_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x314)
+/* GPIO_SIG112_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG112_IN_SEL    (BIT(7))
+#define GPIO_SIG112_IN_SEL_M  (BIT(7))
+#define GPIO_SIG112_IN_SEL_V  0x1
+#define GPIO_SIG112_IN_SEL_S  7
+/* GPIO_FUNC112_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC112_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC112_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC112_IN_INV_SEL_V  0x1
+#define GPIO_FUNC112_IN_INV_SEL_S  6
+/* GPIO_FUNC112_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC112_IN_SEL    0x0000003F
+#define GPIO_FUNC112_IN_SEL_M  ((GPIO_FUNC112_IN_SEL_V)<<(GPIO_FUNC112_IN_SEL_S))
+#define GPIO_FUNC112_IN_SEL_V  0x3F
+#define GPIO_FUNC112_IN_SEL_S  0
+
+#define GPIO_FUNC113_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x318)
+/* GPIO_SIG113_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG113_IN_SEL    (BIT(7))
+#define GPIO_SIG113_IN_SEL_M  (BIT(7))
+#define GPIO_SIG113_IN_SEL_V  0x1
+#define GPIO_SIG113_IN_SEL_S  7
+/* GPIO_FUNC113_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC113_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC113_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC113_IN_INV_SEL_V  0x1
+#define GPIO_FUNC113_IN_INV_SEL_S  6
+/* GPIO_FUNC113_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC113_IN_SEL    0x0000003F
+#define GPIO_FUNC113_IN_SEL_M  ((GPIO_FUNC113_IN_SEL_V)<<(GPIO_FUNC113_IN_SEL_S))
+#define GPIO_FUNC113_IN_SEL_V  0x3F
+#define GPIO_FUNC113_IN_SEL_S  0
+
+#define GPIO_FUNC114_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x31C)
+/* GPIO_SIG114_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG114_IN_SEL    (BIT(7))
+#define GPIO_SIG114_IN_SEL_M  (BIT(7))
+#define GPIO_SIG114_IN_SEL_V  0x1
+#define GPIO_SIG114_IN_SEL_S  7
+/* GPIO_FUNC114_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC114_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC114_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC114_IN_INV_SEL_V  0x1
+#define GPIO_FUNC114_IN_INV_SEL_S  6
+/* GPIO_FUNC114_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC114_IN_SEL    0x0000003F
+#define GPIO_FUNC114_IN_SEL_M  ((GPIO_FUNC114_IN_SEL_V)<<(GPIO_FUNC114_IN_SEL_S))
+#define GPIO_FUNC114_IN_SEL_V  0x3F
+#define GPIO_FUNC114_IN_SEL_S  0
+
+#define GPIO_FUNC115_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x320)
+/* GPIO_SIG115_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG115_IN_SEL    (BIT(7))
+#define GPIO_SIG115_IN_SEL_M  (BIT(7))
+#define GPIO_SIG115_IN_SEL_V  0x1
+#define GPIO_SIG115_IN_SEL_S  7
+/* GPIO_FUNC115_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC115_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC115_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC115_IN_INV_SEL_V  0x1
+#define GPIO_FUNC115_IN_INV_SEL_S  6
+/* GPIO_FUNC115_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC115_IN_SEL    0x0000003F
+#define GPIO_FUNC115_IN_SEL_M  ((GPIO_FUNC115_IN_SEL_V)<<(GPIO_FUNC115_IN_SEL_S))
+#define GPIO_FUNC115_IN_SEL_V  0x3F
+#define GPIO_FUNC115_IN_SEL_S  0
+
+#define GPIO_FUNC116_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x324)
+/* GPIO_SIG116_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG116_IN_SEL    (BIT(7))
+#define GPIO_SIG116_IN_SEL_M  (BIT(7))
+#define GPIO_SIG116_IN_SEL_V  0x1
+#define GPIO_SIG116_IN_SEL_S  7
+/* GPIO_FUNC116_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC116_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC116_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC116_IN_INV_SEL_V  0x1
+#define GPIO_FUNC116_IN_INV_SEL_S  6
+/* GPIO_FUNC116_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC116_IN_SEL    0x0000003F
+#define GPIO_FUNC116_IN_SEL_M  ((GPIO_FUNC116_IN_SEL_V)<<(GPIO_FUNC116_IN_SEL_S))
+#define GPIO_FUNC116_IN_SEL_V  0x3F
+#define GPIO_FUNC116_IN_SEL_S  0
+
+#define GPIO_FUNC117_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x328)
+/* GPIO_SIG117_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG117_IN_SEL    (BIT(7))
+#define GPIO_SIG117_IN_SEL_M  (BIT(7))
+#define GPIO_SIG117_IN_SEL_V  0x1
+#define GPIO_SIG117_IN_SEL_S  7
+/* GPIO_FUNC117_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC117_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC117_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC117_IN_INV_SEL_V  0x1
+#define GPIO_FUNC117_IN_INV_SEL_S  6
+/* GPIO_FUNC117_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC117_IN_SEL    0x0000003F
+#define GPIO_FUNC117_IN_SEL_M  ((GPIO_FUNC117_IN_SEL_V)<<(GPIO_FUNC117_IN_SEL_S))
+#define GPIO_FUNC117_IN_SEL_V  0x3F
+#define GPIO_FUNC117_IN_SEL_S  0
+
+#define GPIO_FUNC118_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x32C)
+/* GPIO_SIG118_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG118_IN_SEL    (BIT(7))
+#define GPIO_SIG118_IN_SEL_M  (BIT(7))
+#define GPIO_SIG118_IN_SEL_V  0x1
+#define GPIO_SIG118_IN_SEL_S  7
+/* GPIO_FUNC118_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC118_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC118_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC118_IN_INV_SEL_V  0x1
+#define GPIO_FUNC118_IN_INV_SEL_S  6
+/* GPIO_FUNC118_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC118_IN_SEL    0x0000003F
+#define GPIO_FUNC118_IN_SEL_M  ((GPIO_FUNC118_IN_SEL_V)<<(GPIO_FUNC118_IN_SEL_S))
+#define GPIO_FUNC118_IN_SEL_V  0x3F
+#define GPIO_FUNC118_IN_SEL_S  0
+
+#define GPIO_FUNC119_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x330)
+/* GPIO_SIG119_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG119_IN_SEL    (BIT(7))
+#define GPIO_SIG119_IN_SEL_M  (BIT(7))
+#define GPIO_SIG119_IN_SEL_V  0x1
+#define GPIO_SIG119_IN_SEL_S  7
+/* GPIO_FUNC119_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC119_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC119_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC119_IN_INV_SEL_V  0x1
+#define GPIO_FUNC119_IN_INV_SEL_S  6
+/* GPIO_FUNC119_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC119_IN_SEL    0x0000003F
+#define GPIO_FUNC119_IN_SEL_M  ((GPIO_FUNC119_IN_SEL_V)<<(GPIO_FUNC119_IN_SEL_S))
+#define GPIO_FUNC119_IN_SEL_V  0x3F
+#define GPIO_FUNC119_IN_SEL_S  0
+
+#define GPIO_FUNC120_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x334)
+/* GPIO_SIG120_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG120_IN_SEL    (BIT(7))
+#define GPIO_SIG120_IN_SEL_M  (BIT(7))
+#define GPIO_SIG120_IN_SEL_V  0x1
+#define GPIO_SIG120_IN_SEL_S  7
+/* GPIO_FUNC120_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC120_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC120_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC120_IN_INV_SEL_V  0x1
+#define GPIO_FUNC120_IN_INV_SEL_S  6
+/* GPIO_FUNC120_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC120_IN_SEL    0x0000003F
+#define GPIO_FUNC120_IN_SEL_M  ((GPIO_FUNC120_IN_SEL_V)<<(GPIO_FUNC120_IN_SEL_S))
+#define GPIO_FUNC120_IN_SEL_V  0x3F
+#define GPIO_FUNC120_IN_SEL_S  0
+
+#define GPIO_FUNC121_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x338)
+/* GPIO_SIG121_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG121_IN_SEL    (BIT(7))
+#define GPIO_SIG121_IN_SEL_M  (BIT(7))
+#define GPIO_SIG121_IN_SEL_V  0x1
+#define GPIO_SIG121_IN_SEL_S  7
+/* GPIO_FUNC121_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC121_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC121_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC121_IN_INV_SEL_V  0x1
+#define GPIO_FUNC121_IN_INV_SEL_S  6
+/* GPIO_FUNC121_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC121_IN_SEL    0x0000003F
+#define GPIO_FUNC121_IN_SEL_M  ((GPIO_FUNC121_IN_SEL_V)<<(GPIO_FUNC121_IN_SEL_S))
+#define GPIO_FUNC121_IN_SEL_V  0x3F
+#define GPIO_FUNC121_IN_SEL_S  0
+
+#define GPIO_FUNC122_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x33C)
+/* GPIO_SIG122_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG122_IN_SEL    (BIT(7))
+#define GPIO_SIG122_IN_SEL_M  (BIT(7))
+#define GPIO_SIG122_IN_SEL_V  0x1
+#define GPIO_SIG122_IN_SEL_S  7
+/* GPIO_FUNC122_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC122_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC122_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC122_IN_INV_SEL_V  0x1
+#define GPIO_FUNC122_IN_INV_SEL_S  6
+/* GPIO_FUNC122_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC122_IN_SEL    0x0000003F
+#define GPIO_FUNC122_IN_SEL_M  ((GPIO_FUNC122_IN_SEL_V)<<(GPIO_FUNC122_IN_SEL_S))
+#define GPIO_FUNC122_IN_SEL_V  0x3F
+#define GPIO_FUNC122_IN_SEL_S  0
+
+#define GPIO_FUNC123_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x340)
+/* GPIO_SIG123_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG123_IN_SEL    (BIT(7))
+#define GPIO_SIG123_IN_SEL_M  (BIT(7))
+#define GPIO_SIG123_IN_SEL_V  0x1
+#define GPIO_SIG123_IN_SEL_S  7
+/* GPIO_FUNC123_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC123_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC123_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC123_IN_INV_SEL_V  0x1
+#define GPIO_FUNC123_IN_INV_SEL_S  6
+/* GPIO_FUNC123_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC123_IN_SEL    0x0000003F
+#define GPIO_FUNC123_IN_SEL_M  ((GPIO_FUNC123_IN_SEL_V)<<(GPIO_FUNC123_IN_SEL_S))
+#define GPIO_FUNC123_IN_SEL_V  0x3F
+#define GPIO_FUNC123_IN_SEL_S  0
+
+#define GPIO_FUNC124_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x344)
+/* GPIO_SIG124_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG124_IN_SEL    (BIT(7))
+#define GPIO_SIG124_IN_SEL_M  (BIT(7))
+#define GPIO_SIG124_IN_SEL_V  0x1
+#define GPIO_SIG124_IN_SEL_S  7
+/* GPIO_FUNC124_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC124_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC124_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC124_IN_INV_SEL_V  0x1
+#define GPIO_FUNC124_IN_INV_SEL_S  6
+/* GPIO_FUNC124_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC124_IN_SEL    0x0000003F
+#define GPIO_FUNC124_IN_SEL_M  ((GPIO_FUNC124_IN_SEL_V)<<(GPIO_FUNC124_IN_SEL_S))
+#define GPIO_FUNC124_IN_SEL_V  0x3F
+#define GPIO_FUNC124_IN_SEL_S  0
+
+#define GPIO_FUNC125_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x348)
+/* GPIO_SIG125_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG125_IN_SEL    (BIT(7))
+#define GPIO_SIG125_IN_SEL_M  (BIT(7))
+#define GPIO_SIG125_IN_SEL_V  0x1
+#define GPIO_SIG125_IN_SEL_S  7
+/* GPIO_FUNC125_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC125_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC125_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC125_IN_INV_SEL_V  0x1
+#define GPIO_FUNC125_IN_INV_SEL_S  6
+/* GPIO_FUNC125_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC125_IN_SEL    0x0000003F
+#define GPIO_FUNC125_IN_SEL_M  ((GPIO_FUNC125_IN_SEL_V)<<(GPIO_FUNC125_IN_SEL_S))
+#define GPIO_FUNC125_IN_SEL_V  0x3F
+#define GPIO_FUNC125_IN_SEL_S  0
+
+#define GPIO_FUNC126_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x34C)
+/* GPIO_SIG126_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG126_IN_SEL    (BIT(7))
+#define GPIO_SIG126_IN_SEL_M  (BIT(7))
+#define GPIO_SIG126_IN_SEL_V  0x1
+#define GPIO_SIG126_IN_SEL_S  7
+/* GPIO_FUNC126_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC126_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC126_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC126_IN_INV_SEL_V  0x1
+#define GPIO_FUNC126_IN_INV_SEL_S  6
+/* GPIO_FUNC126_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC126_IN_SEL    0x0000003F
+#define GPIO_FUNC126_IN_SEL_M  ((GPIO_FUNC126_IN_SEL_V)<<(GPIO_FUNC126_IN_SEL_S))
+#define GPIO_FUNC126_IN_SEL_V  0x3F
+#define GPIO_FUNC126_IN_SEL_S  0
+
+#define GPIO_FUNC127_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x350)
+/* GPIO_SIG127_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG127_IN_SEL    (BIT(7))
+#define GPIO_SIG127_IN_SEL_M  (BIT(7))
+#define GPIO_SIG127_IN_SEL_V  0x1
+#define GPIO_SIG127_IN_SEL_S  7
+/* GPIO_FUNC127_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC127_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC127_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC127_IN_INV_SEL_V  0x1
+#define GPIO_FUNC127_IN_INV_SEL_S  6
+/* GPIO_FUNC127_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC127_IN_SEL    0x0000003F
+#define GPIO_FUNC127_IN_SEL_M  ((GPIO_FUNC127_IN_SEL_V)<<(GPIO_FUNC127_IN_SEL_S))
+#define GPIO_FUNC127_IN_SEL_V  0x3F
+#define GPIO_FUNC127_IN_SEL_S  0
+
+#define GPIO_FUNC128_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x354)
+/* GPIO_SIG128_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG128_IN_SEL    (BIT(7))
+#define GPIO_SIG128_IN_SEL_M  (BIT(7))
+#define GPIO_SIG128_IN_SEL_V  0x1
+#define GPIO_SIG128_IN_SEL_S  7
+/* GPIO_FUNC128_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC128_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC128_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC128_IN_INV_SEL_V  0x1
+#define GPIO_FUNC128_IN_INV_SEL_S  6
+/* GPIO_FUNC128_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC128_IN_SEL    0x0000003F
+#define GPIO_FUNC128_IN_SEL_M  ((GPIO_FUNC128_IN_SEL_V)<<(GPIO_FUNC128_IN_SEL_S))
+#define GPIO_FUNC128_IN_SEL_V  0x3F
+#define GPIO_FUNC128_IN_SEL_S  0
+
+#define GPIO_FUNC129_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x358)
+/* GPIO_SIG129_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG129_IN_SEL    (BIT(7))
+#define GPIO_SIG129_IN_SEL_M  (BIT(7))
+#define GPIO_SIG129_IN_SEL_V  0x1
+#define GPIO_SIG129_IN_SEL_S  7
+/* GPIO_FUNC129_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC129_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC129_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC129_IN_INV_SEL_V  0x1
+#define GPIO_FUNC129_IN_INV_SEL_S  6
+/* GPIO_FUNC129_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC129_IN_SEL    0x0000003F
+#define GPIO_FUNC129_IN_SEL_M  ((GPIO_FUNC129_IN_SEL_V)<<(GPIO_FUNC129_IN_SEL_S))
+#define GPIO_FUNC129_IN_SEL_V  0x3F
+#define GPIO_FUNC129_IN_SEL_S  0
+
+#define GPIO_FUNC130_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x35C)
+/* GPIO_SIG130_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG130_IN_SEL    (BIT(7))
+#define GPIO_SIG130_IN_SEL_M  (BIT(7))
+#define GPIO_SIG130_IN_SEL_V  0x1
+#define GPIO_SIG130_IN_SEL_S  7
+/* GPIO_FUNC130_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC130_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC130_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC130_IN_INV_SEL_V  0x1
+#define GPIO_FUNC130_IN_INV_SEL_S  6
+/* GPIO_FUNC130_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC130_IN_SEL    0x0000003F
+#define GPIO_FUNC130_IN_SEL_M  ((GPIO_FUNC130_IN_SEL_V)<<(GPIO_FUNC130_IN_SEL_S))
+#define GPIO_FUNC130_IN_SEL_V  0x3F
+#define GPIO_FUNC130_IN_SEL_S  0
+
+#define GPIO_FUNC131_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x360)
+/* GPIO_SIG131_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG131_IN_SEL    (BIT(7))
+#define GPIO_SIG131_IN_SEL_M  (BIT(7))
+#define GPIO_SIG131_IN_SEL_V  0x1
+#define GPIO_SIG131_IN_SEL_S  7
+/* GPIO_FUNC131_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC131_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC131_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC131_IN_INV_SEL_V  0x1
+#define GPIO_FUNC131_IN_INV_SEL_S  6
+/* GPIO_FUNC131_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC131_IN_SEL    0x0000003F
+#define GPIO_FUNC131_IN_SEL_M  ((GPIO_FUNC131_IN_SEL_V)<<(GPIO_FUNC131_IN_SEL_S))
+#define GPIO_FUNC131_IN_SEL_V  0x3F
+#define GPIO_FUNC131_IN_SEL_S  0
+
+#define GPIO_FUNC132_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x364)
+/* GPIO_SIG132_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG132_IN_SEL    (BIT(7))
+#define GPIO_SIG132_IN_SEL_M  (BIT(7))
+#define GPIO_SIG132_IN_SEL_V  0x1
+#define GPIO_SIG132_IN_SEL_S  7
+/* GPIO_FUNC132_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC132_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC132_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC132_IN_INV_SEL_V  0x1
+#define GPIO_FUNC132_IN_INV_SEL_S  6
+/* GPIO_FUNC132_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC132_IN_SEL    0x0000003F
+#define GPIO_FUNC132_IN_SEL_M  ((GPIO_FUNC132_IN_SEL_V)<<(GPIO_FUNC132_IN_SEL_S))
+#define GPIO_FUNC132_IN_SEL_V  0x3F
+#define GPIO_FUNC132_IN_SEL_S  0
+
+#define GPIO_FUNC133_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x368)
+/* GPIO_SIG133_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG133_IN_SEL    (BIT(7))
+#define GPIO_SIG133_IN_SEL_M  (BIT(7))
+#define GPIO_SIG133_IN_SEL_V  0x1
+#define GPIO_SIG133_IN_SEL_S  7
+/* GPIO_FUNC133_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC133_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC133_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC133_IN_INV_SEL_V  0x1
+#define GPIO_FUNC133_IN_INV_SEL_S  6
+/* GPIO_FUNC133_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC133_IN_SEL    0x0000003F
+#define GPIO_FUNC133_IN_SEL_M  ((GPIO_FUNC133_IN_SEL_V)<<(GPIO_FUNC133_IN_SEL_S))
+#define GPIO_FUNC133_IN_SEL_V  0x3F
+#define GPIO_FUNC133_IN_SEL_S  0
+
+#define GPIO_FUNC134_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x36C)
+/* GPIO_SIG134_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG134_IN_SEL    (BIT(7))
+#define GPIO_SIG134_IN_SEL_M  (BIT(7))
+#define GPIO_SIG134_IN_SEL_V  0x1
+#define GPIO_SIG134_IN_SEL_S  7
+/* GPIO_FUNC134_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC134_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC134_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC134_IN_INV_SEL_V  0x1
+#define GPIO_FUNC134_IN_INV_SEL_S  6
+/* GPIO_FUNC134_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC134_IN_SEL    0x0000003F
+#define GPIO_FUNC134_IN_SEL_M  ((GPIO_FUNC134_IN_SEL_V)<<(GPIO_FUNC134_IN_SEL_S))
+#define GPIO_FUNC134_IN_SEL_V  0x3F
+#define GPIO_FUNC134_IN_SEL_S  0
+
+#define GPIO_FUNC135_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x370)
+/* GPIO_SIG135_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG135_IN_SEL    (BIT(7))
+#define GPIO_SIG135_IN_SEL_M  (BIT(7))
+#define GPIO_SIG135_IN_SEL_V  0x1
+#define GPIO_SIG135_IN_SEL_S  7
+/* GPIO_FUNC135_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC135_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC135_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC135_IN_INV_SEL_V  0x1
+#define GPIO_FUNC135_IN_INV_SEL_S  6
+/* GPIO_FUNC135_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC135_IN_SEL    0x0000003F
+#define GPIO_FUNC135_IN_SEL_M  ((GPIO_FUNC135_IN_SEL_V)<<(GPIO_FUNC135_IN_SEL_S))
+#define GPIO_FUNC135_IN_SEL_V  0x3F
+#define GPIO_FUNC135_IN_SEL_S  0
+
+#define GPIO_FUNC136_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x374)
+/* GPIO_SIG136_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG136_IN_SEL    (BIT(7))
+#define GPIO_SIG136_IN_SEL_M  (BIT(7))
+#define GPIO_SIG136_IN_SEL_V  0x1
+#define GPIO_SIG136_IN_SEL_S  7
+/* GPIO_FUNC136_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC136_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC136_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC136_IN_INV_SEL_V  0x1
+#define GPIO_FUNC136_IN_INV_SEL_S  6
+/* GPIO_FUNC136_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC136_IN_SEL    0x0000003F
+#define GPIO_FUNC136_IN_SEL_M  ((GPIO_FUNC136_IN_SEL_V)<<(GPIO_FUNC136_IN_SEL_S))
+#define GPIO_FUNC136_IN_SEL_V  0x3F
+#define GPIO_FUNC136_IN_SEL_S  0
+
+#define GPIO_FUNC137_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x378)
+/* GPIO_SIG137_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG137_IN_SEL    (BIT(7))
+#define GPIO_SIG137_IN_SEL_M  (BIT(7))
+#define GPIO_SIG137_IN_SEL_V  0x1
+#define GPIO_SIG137_IN_SEL_S  7
+/* GPIO_FUNC137_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC137_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC137_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC137_IN_INV_SEL_V  0x1
+#define GPIO_FUNC137_IN_INV_SEL_S  6
+/* GPIO_FUNC137_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC137_IN_SEL    0x0000003F
+#define GPIO_FUNC137_IN_SEL_M  ((GPIO_FUNC137_IN_SEL_V)<<(GPIO_FUNC137_IN_SEL_S))
+#define GPIO_FUNC137_IN_SEL_V  0x3F
+#define GPIO_FUNC137_IN_SEL_S  0
+
+#define GPIO_FUNC138_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x37C)
+/* GPIO_SIG138_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG138_IN_SEL    (BIT(7))
+#define GPIO_SIG138_IN_SEL_M  (BIT(7))
+#define GPIO_SIG138_IN_SEL_V  0x1
+#define GPIO_SIG138_IN_SEL_S  7
+/* GPIO_FUNC138_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC138_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC138_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC138_IN_INV_SEL_V  0x1
+#define GPIO_FUNC138_IN_INV_SEL_S  6
+/* GPIO_FUNC138_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC138_IN_SEL    0x0000003F
+#define GPIO_FUNC138_IN_SEL_M  ((GPIO_FUNC138_IN_SEL_V)<<(GPIO_FUNC138_IN_SEL_S))
+#define GPIO_FUNC138_IN_SEL_V  0x3F
+#define GPIO_FUNC138_IN_SEL_S  0
+
+#define GPIO_FUNC139_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x380)
+/* GPIO_SIG139_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG139_IN_SEL    (BIT(7))
+#define GPIO_SIG139_IN_SEL_M  (BIT(7))
+#define GPIO_SIG139_IN_SEL_V  0x1
+#define GPIO_SIG139_IN_SEL_S  7
+/* GPIO_FUNC139_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC139_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC139_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC139_IN_INV_SEL_V  0x1
+#define GPIO_FUNC139_IN_INV_SEL_S  6
+/* GPIO_FUNC139_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC139_IN_SEL    0x0000003F
+#define GPIO_FUNC139_IN_SEL_M  ((GPIO_FUNC139_IN_SEL_V)<<(GPIO_FUNC139_IN_SEL_S))
+#define GPIO_FUNC139_IN_SEL_V  0x3F
+#define GPIO_FUNC139_IN_SEL_S  0
+
+#define GPIO_FUNC140_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x384)
+/* GPIO_SIG140_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG140_IN_SEL    (BIT(7))
+#define GPIO_SIG140_IN_SEL_M  (BIT(7))
+#define GPIO_SIG140_IN_SEL_V  0x1
+#define GPIO_SIG140_IN_SEL_S  7
+/* GPIO_FUNC140_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC140_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC140_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC140_IN_INV_SEL_V  0x1
+#define GPIO_FUNC140_IN_INV_SEL_S  6
+/* GPIO_FUNC140_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC140_IN_SEL    0x0000003F
+#define GPIO_FUNC140_IN_SEL_M  ((GPIO_FUNC140_IN_SEL_V)<<(GPIO_FUNC140_IN_SEL_S))
+#define GPIO_FUNC140_IN_SEL_V  0x3F
+#define GPIO_FUNC140_IN_SEL_S  0
+
+#define GPIO_FUNC141_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x388)
+/* GPIO_SIG141_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG141_IN_SEL    (BIT(7))
+#define GPIO_SIG141_IN_SEL_M  (BIT(7))
+#define GPIO_SIG141_IN_SEL_V  0x1
+#define GPIO_SIG141_IN_SEL_S  7
+/* GPIO_FUNC141_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC141_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC141_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC141_IN_INV_SEL_V  0x1
+#define GPIO_FUNC141_IN_INV_SEL_S  6
+/* GPIO_FUNC141_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC141_IN_SEL    0x0000003F
+#define GPIO_FUNC141_IN_SEL_M  ((GPIO_FUNC141_IN_SEL_V)<<(GPIO_FUNC141_IN_SEL_S))
+#define GPIO_FUNC141_IN_SEL_V  0x3F
+#define GPIO_FUNC141_IN_SEL_S  0
+
+#define GPIO_FUNC142_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x38C)
+/* GPIO_SIG142_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG142_IN_SEL    (BIT(7))
+#define GPIO_SIG142_IN_SEL_M  (BIT(7))
+#define GPIO_SIG142_IN_SEL_V  0x1
+#define GPIO_SIG142_IN_SEL_S  7
+/* GPIO_FUNC142_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC142_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC142_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC142_IN_INV_SEL_V  0x1
+#define GPIO_FUNC142_IN_INV_SEL_S  6
+/* GPIO_FUNC142_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC142_IN_SEL    0x0000003F
+#define GPIO_FUNC142_IN_SEL_M  ((GPIO_FUNC142_IN_SEL_V)<<(GPIO_FUNC142_IN_SEL_S))
+#define GPIO_FUNC142_IN_SEL_V  0x3F
+#define GPIO_FUNC142_IN_SEL_S  0
+
+#define GPIO_FUNC143_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x390)
+/* GPIO_SIG143_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG143_IN_SEL    (BIT(7))
+#define GPIO_SIG143_IN_SEL_M  (BIT(7))
+#define GPIO_SIG143_IN_SEL_V  0x1
+#define GPIO_SIG143_IN_SEL_S  7
+/* GPIO_FUNC143_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC143_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC143_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC143_IN_INV_SEL_V  0x1
+#define GPIO_FUNC143_IN_INV_SEL_S  6
+/* GPIO_FUNC143_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC143_IN_SEL    0x0000003F
+#define GPIO_FUNC143_IN_SEL_M  ((GPIO_FUNC143_IN_SEL_V)<<(GPIO_FUNC143_IN_SEL_S))
+#define GPIO_FUNC143_IN_SEL_V  0x3F
+#define GPIO_FUNC143_IN_SEL_S  0
+
+#define GPIO_FUNC144_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x394)
+/* GPIO_SIG144_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG144_IN_SEL    (BIT(7))
+#define GPIO_SIG144_IN_SEL_M  (BIT(7))
+#define GPIO_SIG144_IN_SEL_V  0x1
+#define GPIO_SIG144_IN_SEL_S  7
+/* GPIO_FUNC144_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC144_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC144_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC144_IN_INV_SEL_V  0x1
+#define GPIO_FUNC144_IN_INV_SEL_S  6
+/* GPIO_FUNC144_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC144_IN_SEL    0x0000003F
+#define GPIO_FUNC144_IN_SEL_M  ((GPIO_FUNC144_IN_SEL_V)<<(GPIO_FUNC144_IN_SEL_S))
+#define GPIO_FUNC144_IN_SEL_V  0x3F
+#define GPIO_FUNC144_IN_SEL_S  0
+
+#define GPIO_FUNC145_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x398)
+/* GPIO_SIG145_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG145_IN_SEL    (BIT(7))
+#define GPIO_SIG145_IN_SEL_M  (BIT(7))
+#define GPIO_SIG145_IN_SEL_V  0x1
+#define GPIO_SIG145_IN_SEL_S  7
+/* GPIO_FUNC145_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC145_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC145_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC145_IN_INV_SEL_V  0x1
+#define GPIO_FUNC145_IN_INV_SEL_S  6
+/* GPIO_FUNC145_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC145_IN_SEL    0x0000003F
+#define GPIO_FUNC145_IN_SEL_M  ((GPIO_FUNC145_IN_SEL_V)<<(GPIO_FUNC145_IN_SEL_S))
+#define GPIO_FUNC145_IN_SEL_V  0x3F
+#define GPIO_FUNC145_IN_SEL_S  0
+
+#define GPIO_FUNC146_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x39C)
+/* GPIO_SIG146_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG146_IN_SEL    (BIT(7))
+#define GPIO_SIG146_IN_SEL_M  (BIT(7))
+#define GPIO_SIG146_IN_SEL_V  0x1
+#define GPIO_SIG146_IN_SEL_S  7
+/* GPIO_FUNC146_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC146_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC146_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC146_IN_INV_SEL_V  0x1
+#define GPIO_FUNC146_IN_INV_SEL_S  6
+/* GPIO_FUNC146_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC146_IN_SEL    0x0000003F
+#define GPIO_FUNC146_IN_SEL_M  ((GPIO_FUNC146_IN_SEL_V)<<(GPIO_FUNC146_IN_SEL_S))
+#define GPIO_FUNC146_IN_SEL_V  0x3F
+#define GPIO_FUNC146_IN_SEL_S  0
+
+#define GPIO_FUNC147_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3A0)
+/* GPIO_SIG147_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG147_IN_SEL    (BIT(7))
+#define GPIO_SIG147_IN_SEL_M  (BIT(7))
+#define GPIO_SIG147_IN_SEL_V  0x1
+#define GPIO_SIG147_IN_SEL_S  7
+/* GPIO_FUNC147_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC147_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC147_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC147_IN_INV_SEL_V  0x1
+#define GPIO_FUNC147_IN_INV_SEL_S  6
+/* GPIO_FUNC147_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC147_IN_SEL    0x0000003F
+#define GPIO_FUNC147_IN_SEL_M  ((GPIO_FUNC147_IN_SEL_V)<<(GPIO_FUNC147_IN_SEL_S))
+#define GPIO_FUNC147_IN_SEL_V  0x3F
+#define GPIO_FUNC147_IN_SEL_S  0
+
+#define GPIO_FUNC148_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3A4)
+/* GPIO_SIG148_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG148_IN_SEL    (BIT(7))
+#define GPIO_SIG148_IN_SEL_M  (BIT(7))
+#define GPIO_SIG148_IN_SEL_V  0x1
+#define GPIO_SIG148_IN_SEL_S  7
+/* GPIO_FUNC148_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC148_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC148_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC148_IN_INV_SEL_V  0x1
+#define GPIO_FUNC148_IN_INV_SEL_S  6
+/* GPIO_FUNC148_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC148_IN_SEL    0x0000003F
+#define GPIO_FUNC148_IN_SEL_M  ((GPIO_FUNC148_IN_SEL_V)<<(GPIO_FUNC148_IN_SEL_S))
+#define GPIO_FUNC148_IN_SEL_V  0x3F
+#define GPIO_FUNC148_IN_SEL_S  0
+
+#define GPIO_FUNC149_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3A8)
+/* GPIO_SIG149_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG149_IN_SEL    (BIT(7))
+#define GPIO_SIG149_IN_SEL_M  (BIT(7))
+#define GPIO_SIG149_IN_SEL_V  0x1
+#define GPIO_SIG149_IN_SEL_S  7
+/* GPIO_FUNC149_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC149_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC149_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC149_IN_INV_SEL_V  0x1
+#define GPIO_FUNC149_IN_INV_SEL_S  6
+/* GPIO_FUNC149_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC149_IN_SEL    0x0000003F
+#define GPIO_FUNC149_IN_SEL_M  ((GPIO_FUNC149_IN_SEL_V)<<(GPIO_FUNC149_IN_SEL_S))
+#define GPIO_FUNC149_IN_SEL_V  0x3F
+#define GPIO_FUNC149_IN_SEL_S  0
+
+#define GPIO_FUNC150_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3AC)
+/* GPIO_SIG150_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG150_IN_SEL    (BIT(7))
+#define GPIO_SIG150_IN_SEL_M  (BIT(7))
+#define GPIO_SIG150_IN_SEL_V  0x1
+#define GPIO_SIG150_IN_SEL_S  7
+/* GPIO_FUNC150_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC150_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC150_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC150_IN_INV_SEL_V  0x1
+#define GPIO_FUNC150_IN_INV_SEL_S  6
+/* GPIO_FUNC150_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC150_IN_SEL    0x0000003F
+#define GPIO_FUNC150_IN_SEL_M  ((GPIO_FUNC150_IN_SEL_V)<<(GPIO_FUNC150_IN_SEL_S))
+#define GPIO_FUNC150_IN_SEL_V  0x3F
+#define GPIO_FUNC150_IN_SEL_S  0
+
+#define GPIO_FUNC151_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3B0)
+/* GPIO_SIG151_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG151_IN_SEL    (BIT(7))
+#define GPIO_SIG151_IN_SEL_M  (BIT(7))
+#define GPIO_SIG151_IN_SEL_V  0x1
+#define GPIO_SIG151_IN_SEL_S  7
+/* GPIO_FUNC151_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC151_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC151_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC151_IN_INV_SEL_V  0x1
+#define GPIO_FUNC151_IN_INV_SEL_S  6
+/* GPIO_FUNC151_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC151_IN_SEL    0x0000003F
+#define GPIO_FUNC151_IN_SEL_M  ((GPIO_FUNC151_IN_SEL_V)<<(GPIO_FUNC151_IN_SEL_S))
+#define GPIO_FUNC151_IN_SEL_V  0x3F
+#define GPIO_FUNC151_IN_SEL_S  0
+
+#define GPIO_FUNC152_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3B4)
+/* GPIO_SIG152_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG152_IN_SEL    (BIT(7))
+#define GPIO_SIG152_IN_SEL_M  (BIT(7))
+#define GPIO_SIG152_IN_SEL_V  0x1
+#define GPIO_SIG152_IN_SEL_S  7
+/* GPIO_FUNC152_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC152_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC152_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC152_IN_INV_SEL_V  0x1
+#define GPIO_FUNC152_IN_INV_SEL_S  6
+/* GPIO_FUNC152_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC152_IN_SEL    0x0000003F
+#define GPIO_FUNC152_IN_SEL_M  ((GPIO_FUNC152_IN_SEL_V)<<(GPIO_FUNC152_IN_SEL_S))
+#define GPIO_FUNC152_IN_SEL_V  0x3F
+#define GPIO_FUNC152_IN_SEL_S  0
+
+#define GPIO_FUNC153_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3B8)
+/* GPIO_SIG153_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG153_IN_SEL    (BIT(7))
+#define GPIO_SIG153_IN_SEL_M  (BIT(7))
+#define GPIO_SIG153_IN_SEL_V  0x1
+#define GPIO_SIG153_IN_SEL_S  7
+/* GPIO_FUNC153_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC153_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC153_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC153_IN_INV_SEL_V  0x1
+#define GPIO_FUNC153_IN_INV_SEL_S  6
+/* GPIO_FUNC153_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC153_IN_SEL    0x0000003F
+#define GPIO_FUNC153_IN_SEL_M  ((GPIO_FUNC153_IN_SEL_V)<<(GPIO_FUNC153_IN_SEL_S))
+#define GPIO_FUNC153_IN_SEL_V  0x3F
+#define GPIO_FUNC153_IN_SEL_S  0
+
+#define GPIO_FUNC154_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3BC)
+/* GPIO_SIG154_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG154_IN_SEL    (BIT(7))
+#define GPIO_SIG154_IN_SEL_M  (BIT(7))
+#define GPIO_SIG154_IN_SEL_V  0x1
+#define GPIO_SIG154_IN_SEL_S  7
+/* GPIO_FUNC154_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC154_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC154_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC154_IN_INV_SEL_V  0x1
+#define GPIO_FUNC154_IN_INV_SEL_S  6
+/* GPIO_FUNC154_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC154_IN_SEL    0x0000003F
+#define GPIO_FUNC154_IN_SEL_M  ((GPIO_FUNC154_IN_SEL_V)<<(GPIO_FUNC154_IN_SEL_S))
+#define GPIO_FUNC154_IN_SEL_V  0x3F
+#define GPIO_FUNC154_IN_SEL_S  0
+
+#define GPIO_FUNC155_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3C0)
+/* GPIO_SIG155_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG155_IN_SEL    (BIT(7))
+#define GPIO_SIG155_IN_SEL_M  (BIT(7))
+#define GPIO_SIG155_IN_SEL_V  0x1
+#define GPIO_SIG155_IN_SEL_S  7
+/* GPIO_FUNC155_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC155_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC155_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC155_IN_INV_SEL_V  0x1
+#define GPIO_FUNC155_IN_INV_SEL_S  6
+/* GPIO_FUNC155_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC155_IN_SEL    0x0000003F
+#define GPIO_FUNC155_IN_SEL_M  ((GPIO_FUNC155_IN_SEL_V)<<(GPIO_FUNC155_IN_SEL_S))
+#define GPIO_FUNC155_IN_SEL_V  0x3F
+#define GPIO_FUNC155_IN_SEL_S  0
+
+#define GPIO_FUNC156_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3C4)
+/* GPIO_SIG156_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG156_IN_SEL    (BIT(7))
+#define GPIO_SIG156_IN_SEL_M  (BIT(7))
+#define GPIO_SIG156_IN_SEL_V  0x1
+#define GPIO_SIG156_IN_SEL_S  7
+/* GPIO_FUNC156_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC156_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC156_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC156_IN_INV_SEL_V  0x1
+#define GPIO_FUNC156_IN_INV_SEL_S  6
+/* GPIO_FUNC156_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC156_IN_SEL    0x0000003F
+#define GPIO_FUNC156_IN_SEL_M  ((GPIO_FUNC156_IN_SEL_V)<<(GPIO_FUNC156_IN_SEL_S))
+#define GPIO_FUNC156_IN_SEL_V  0x3F
+#define GPIO_FUNC156_IN_SEL_S  0
+
+#define GPIO_FUNC157_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3C8)
+/* GPIO_SIG157_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG157_IN_SEL    (BIT(7))
+#define GPIO_SIG157_IN_SEL_M  (BIT(7))
+#define GPIO_SIG157_IN_SEL_V  0x1
+#define GPIO_SIG157_IN_SEL_S  7
+/* GPIO_FUNC157_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC157_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC157_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC157_IN_INV_SEL_V  0x1
+#define GPIO_FUNC157_IN_INV_SEL_S  6
+/* GPIO_FUNC157_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC157_IN_SEL    0x0000003F
+#define GPIO_FUNC157_IN_SEL_M  ((GPIO_FUNC157_IN_SEL_V)<<(GPIO_FUNC157_IN_SEL_S))
+#define GPIO_FUNC157_IN_SEL_V  0x3F
+#define GPIO_FUNC157_IN_SEL_S  0
+
+#define GPIO_FUNC158_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3CC)
+/* GPIO_SIG158_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG158_IN_SEL    (BIT(7))
+#define GPIO_SIG158_IN_SEL_M  (BIT(7))
+#define GPIO_SIG158_IN_SEL_V  0x1
+#define GPIO_SIG158_IN_SEL_S  7
+/* GPIO_FUNC158_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC158_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC158_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC158_IN_INV_SEL_V  0x1
+#define GPIO_FUNC158_IN_INV_SEL_S  6
+/* GPIO_FUNC158_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC158_IN_SEL    0x0000003F
+#define GPIO_FUNC158_IN_SEL_M  ((GPIO_FUNC158_IN_SEL_V)<<(GPIO_FUNC158_IN_SEL_S))
+#define GPIO_FUNC158_IN_SEL_V  0x3F
+#define GPIO_FUNC158_IN_SEL_S  0
+
+#define GPIO_FUNC159_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3D0)
+/* GPIO_SIG159_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG159_IN_SEL    (BIT(7))
+#define GPIO_SIG159_IN_SEL_M  (BIT(7))
+#define GPIO_SIG159_IN_SEL_V  0x1
+#define GPIO_SIG159_IN_SEL_S  7
+/* GPIO_FUNC159_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC159_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC159_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC159_IN_INV_SEL_V  0x1
+#define GPIO_FUNC159_IN_INV_SEL_S  6
+/* GPIO_FUNC159_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC159_IN_SEL    0x0000003F
+#define GPIO_FUNC159_IN_SEL_M  ((GPIO_FUNC159_IN_SEL_V)<<(GPIO_FUNC159_IN_SEL_S))
+#define GPIO_FUNC159_IN_SEL_V  0x3F
+#define GPIO_FUNC159_IN_SEL_S  0
+
+#define GPIO_FUNC160_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3D4)
+/* GPIO_SIG160_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG160_IN_SEL    (BIT(7))
+#define GPIO_SIG160_IN_SEL_M  (BIT(7))
+#define GPIO_SIG160_IN_SEL_V  0x1
+#define GPIO_SIG160_IN_SEL_S  7
+/* GPIO_FUNC160_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC160_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC160_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC160_IN_INV_SEL_V  0x1
+#define GPIO_FUNC160_IN_INV_SEL_S  6
+/* GPIO_FUNC160_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC160_IN_SEL    0x0000003F
+#define GPIO_FUNC160_IN_SEL_M  ((GPIO_FUNC160_IN_SEL_V)<<(GPIO_FUNC160_IN_SEL_S))
+#define GPIO_FUNC160_IN_SEL_V  0x3F
+#define GPIO_FUNC160_IN_SEL_S  0
+
+#define GPIO_FUNC161_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3D8)
+/* GPIO_SIG161_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG161_IN_SEL    (BIT(7))
+#define GPIO_SIG161_IN_SEL_M  (BIT(7))
+#define GPIO_SIG161_IN_SEL_V  0x1
+#define GPIO_SIG161_IN_SEL_S  7
+/* GPIO_FUNC161_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC161_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC161_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC161_IN_INV_SEL_V  0x1
+#define GPIO_FUNC161_IN_INV_SEL_S  6
+/* GPIO_FUNC161_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC161_IN_SEL    0x0000003F
+#define GPIO_FUNC161_IN_SEL_M  ((GPIO_FUNC161_IN_SEL_V)<<(GPIO_FUNC161_IN_SEL_S))
+#define GPIO_FUNC161_IN_SEL_V  0x3F
+#define GPIO_FUNC161_IN_SEL_S  0
+
+#define GPIO_FUNC162_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3DC)
+/* GPIO_SIG162_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG162_IN_SEL    (BIT(7))
+#define GPIO_SIG162_IN_SEL_M  (BIT(7))
+#define GPIO_SIG162_IN_SEL_V  0x1
+#define GPIO_SIG162_IN_SEL_S  7
+/* GPIO_FUNC162_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC162_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC162_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC162_IN_INV_SEL_V  0x1
+#define GPIO_FUNC162_IN_INV_SEL_S  6
+/* GPIO_FUNC162_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC162_IN_SEL    0x0000003F
+#define GPIO_FUNC162_IN_SEL_M  ((GPIO_FUNC162_IN_SEL_V)<<(GPIO_FUNC162_IN_SEL_S))
+#define GPIO_FUNC162_IN_SEL_V  0x3F
+#define GPIO_FUNC162_IN_SEL_S  0
+
+#define GPIO_FUNC163_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3E0)
+/* GPIO_SIG163_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG163_IN_SEL    (BIT(7))
+#define GPIO_SIG163_IN_SEL_M  (BIT(7))
+#define GPIO_SIG163_IN_SEL_V  0x1
+#define GPIO_SIG163_IN_SEL_S  7
+/* GPIO_FUNC163_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC163_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC163_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC163_IN_INV_SEL_V  0x1
+#define GPIO_FUNC163_IN_INV_SEL_S  6
+/* GPIO_FUNC163_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC163_IN_SEL    0x0000003F
+#define GPIO_FUNC163_IN_SEL_M  ((GPIO_FUNC163_IN_SEL_V)<<(GPIO_FUNC163_IN_SEL_S))
+#define GPIO_FUNC163_IN_SEL_V  0x3F
+#define GPIO_FUNC163_IN_SEL_S  0
+
+#define GPIO_FUNC164_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3E4)
+/* GPIO_SIG164_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG164_IN_SEL    (BIT(7))
+#define GPIO_SIG164_IN_SEL_M  (BIT(7))
+#define GPIO_SIG164_IN_SEL_V  0x1
+#define GPIO_SIG164_IN_SEL_S  7
+/* GPIO_FUNC164_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC164_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC164_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC164_IN_INV_SEL_V  0x1
+#define GPIO_FUNC164_IN_INV_SEL_S  6
+/* GPIO_FUNC164_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC164_IN_SEL    0x0000003F
+#define GPIO_FUNC164_IN_SEL_M  ((GPIO_FUNC164_IN_SEL_V)<<(GPIO_FUNC164_IN_SEL_S))
+#define GPIO_FUNC164_IN_SEL_V  0x3F
+#define GPIO_FUNC164_IN_SEL_S  0
+
+#define GPIO_FUNC165_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3E8)
+/* GPIO_SIG165_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG165_IN_SEL    (BIT(7))
+#define GPIO_SIG165_IN_SEL_M  (BIT(7))
+#define GPIO_SIG165_IN_SEL_V  0x1
+#define GPIO_SIG165_IN_SEL_S  7
+/* GPIO_FUNC165_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC165_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC165_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC165_IN_INV_SEL_V  0x1
+#define GPIO_FUNC165_IN_INV_SEL_S  6
+/* GPIO_FUNC165_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC165_IN_SEL    0x0000003F
+#define GPIO_FUNC165_IN_SEL_M  ((GPIO_FUNC165_IN_SEL_V)<<(GPIO_FUNC165_IN_SEL_S))
+#define GPIO_FUNC165_IN_SEL_V  0x3F
+#define GPIO_FUNC165_IN_SEL_S  0
+
+#define GPIO_FUNC166_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3EC)
+/* GPIO_SIG166_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG166_IN_SEL    (BIT(7))
+#define GPIO_SIG166_IN_SEL_M  (BIT(7))
+#define GPIO_SIG166_IN_SEL_V  0x1
+#define GPIO_SIG166_IN_SEL_S  7
+/* GPIO_FUNC166_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC166_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC166_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC166_IN_INV_SEL_V  0x1
+#define GPIO_FUNC166_IN_INV_SEL_S  6
+/* GPIO_FUNC166_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC166_IN_SEL    0x0000003F
+#define GPIO_FUNC166_IN_SEL_M  ((GPIO_FUNC166_IN_SEL_V)<<(GPIO_FUNC166_IN_SEL_S))
+#define GPIO_FUNC166_IN_SEL_V  0x3F
+#define GPIO_FUNC166_IN_SEL_S  0
+
+#define GPIO_FUNC167_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3F0)
+/* GPIO_SIG167_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG167_IN_SEL    (BIT(7))
+#define GPIO_SIG167_IN_SEL_M  (BIT(7))
+#define GPIO_SIG167_IN_SEL_V  0x1
+#define GPIO_SIG167_IN_SEL_S  7
+/* GPIO_FUNC167_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC167_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC167_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC167_IN_INV_SEL_V  0x1
+#define GPIO_FUNC167_IN_INV_SEL_S  6
+/* GPIO_FUNC167_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC167_IN_SEL    0x0000003F
+#define GPIO_FUNC167_IN_SEL_M  ((GPIO_FUNC167_IN_SEL_V)<<(GPIO_FUNC167_IN_SEL_S))
+#define GPIO_FUNC167_IN_SEL_V  0x3F
+#define GPIO_FUNC167_IN_SEL_S  0
+
+#define GPIO_FUNC168_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3F4)
+/* GPIO_SIG168_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG168_IN_SEL    (BIT(7))
+#define GPIO_SIG168_IN_SEL_M  (BIT(7))
+#define GPIO_SIG168_IN_SEL_V  0x1
+#define GPIO_SIG168_IN_SEL_S  7
+/* GPIO_FUNC168_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC168_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC168_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC168_IN_INV_SEL_V  0x1
+#define GPIO_FUNC168_IN_INV_SEL_S  6
+/* GPIO_FUNC168_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC168_IN_SEL    0x0000003F
+#define GPIO_FUNC168_IN_SEL_M  ((GPIO_FUNC168_IN_SEL_V)<<(GPIO_FUNC168_IN_SEL_S))
+#define GPIO_FUNC168_IN_SEL_V  0x3F
+#define GPIO_FUNC168_IN_SEL_S  0
+
+#define GPIO_FUNC169_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3F8)
+/* GPIO_SIG169_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG169_IN_SEL    (BIT(7))
+#define GPIO_SIG169_IN_SEL_M  (BIT(7))
+#define GPIO_SIG169_IN_SEL_V  0x1
+#define GPIO_SIG169_IN_SEL_S  7
+/* GPIO_FUNC169_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC169_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC169_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC169_IN_INV_SEL_V  0x1
+#define GPIO_FUNC169_IN_INV_SEL_S  6
+/* GPIO_FUNC169_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC169_IN_SEL    0x0000003F
+#define GPIO_FUNC169_IN_SEL_M  ((GPIO_FUNC169_IN_SEL_V)<<(GPIO_FUNC169_IN_SEL_S))
+#define GPIO_FUNC169_IN_SEL_V  0x3F
+#define GPIO_FUNC169_IN_SEL_S  0
+
+#define GPIO_FUNC170_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x3FC)
+/* GPIO_SIG170_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG170_IN_SEL    (BIT(7))
+#define GPIO_SIG170_IN_SEL_M  (BIT(7))
+#define GPIO_SIG170_IN_SEL_V  0x1
+#define GPIO_SIG170_IN_SEL_S  7
+/* GPIO_FUNC170_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC170_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC170_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC170_IN_INV_SEL_V  0x1
+#define GPIO_FUNC170_IN_INV_SEL_S  6
+/* GPIO_FUNC170_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC170_IN_SEL    0x0000003F
+#define GPIO_FUNC170_IN_SEL_M  ((GPIO_FUNC170_IN_SEL_V)<<(GPIO_FUNC170_IN_SEL_S))
+#define GPIO_FUNC170_IN_SEL_V  0x3F
+#define GPIO_FUNC170_IN_SEL_S  0
+
+#define GPIO_FUNC171_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x400)
+/* GPIO_SIG171_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG171_IN_SEL    (BIT(7))
+#define GPIO_SIG171_IN_SEL_M  (BIT(7))
+#define GPIO_SIG171_IN_SEL_V  0x1
+#define GPIO_SIG171_IN_SEL_S  7
+/* GPIO_FUNC171_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC171_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC171_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC171_IN_INV_SEL_V  0x1
+#define GPIO_FUNC171_IN_INV_SEL_S  6
+/* GPIO_FUNC171_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC171_IN_SEL    0x0000003F
+#define GPIO_FUNC171_IN_SEL_M  ((GPIO_FUNC171_IN_SEL_V)<<(GPIO_FUNC171_IN_SEL_S))
+#define GPIO_FUNC171_IN_SEL_V  0x3F
+#define GPIO_FUNC171_IN_SEL_S  0
+
+#define GPIO_FUNC172_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x404)
+/* GPIO_SIG172_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG172_IN_SEL    (BIT(7))
+#define GPIO_SIG172_IN_SEL_M  (BIT(7))
+#define GPIO_SIG172_IN_SEL_V  0x1
+#define GPIO_SIG172_IN_SEL_S  7
+/* GPIO_FUNC172_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC172_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC172_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC172_IN_INV_SEL_V  0x1
+#define GPIO_FUNC172_IN_INV_SEL_S  6
+/* GPIO_FUNC172_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC172_IN_SEL    0x0000003F
+#define GPIO_FUNC172_IN_SEL_M  ((GPIO_FUNC172_IN_SEL_V)<<(GPIO_FUNC172_IN_SEL_S))
+#define GPIO_FUNC172_IN_SEL_V  0x3F
+#define GPIO_FUNC172_IN_SEL_S  0
+
+#define GPIO_FUNC173_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x408)
+/* GPIO_SIG173_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG173_IN_SEL    (BIT(7))
+#define GPIO_SIG173_IN_SEL_M  (BIT(7))
+#define GPIO_SIG173_IN_SEL_V  0x1
+#define GPIO_SIG173_IN_SEL_S  7
+/* GPIO_FUNC173_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC173_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC173_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC173_IN_INV_SEL_V  0x1
+#define GPIO_FUNC173_IN_INV_SEL_S  6
+/* GPIO_FUNC173_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC173_IN_SEL    0x0000003F
+#define GPIO_FUNC173_IN_SEL_M  ((GPIO_FUNC173_IN_SEL_V)<<(GPIO_FUNC173_IN_SEL_S))
+#define GPIO_FUNC173_IN_SEL_V  0x3F
+#define GPIO_FUNC173_IN_SEL_S  0
+
+#define GPIO_FUNC174_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x40C)
+/* GPIO_SIG174_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG174_IN_SEL    (BIT(7))
+#define GPIO_SIG174_IN_SEL_M  (BIT(7))
+#define GPIO_SIG174_IN_SEL_V  0x1
+#define GPIO_SIG174_IN_SEL_S  7
+/* GPIO_FUNC174_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC174_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC174_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC174_IN_INV_SEL_V  0x1
+#define GPIO_FUNC174_IN_INV_SEL_S  6
+/* GPIO_FUNC174_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC174_IN_SEL    0x0000003F
+#define GPIO_FUNC174_IN_SEL_M  ((GPIO_FUNC174_IN_SEL_V)<<(GPIO_FUNC174_IN_SEL_S))
+#define GPIO_FUNC174_IN_SEL_V  0x3F
+#define GPIO_FUNC174_IN_SEL_S  0
+
+#define GPIO_FUNC175_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x410)
+/* GPIO_SIG175_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG175_IN_SEL    (BIT(7))
+#define GPIO_SIG175_IN_SEL_M  (BIT(7))
+#define GPIO_SIG175_IN_SEL_V  0x1
+#define GPIO_SIG175_IN_SEL_S  7
+/* GPIO_FUNC175_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC175_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC175_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC175_IN_INV_SEL_V  0x1
+#define GPIO_FUNC175_IN_INV_SEL_S  6
+/* GPIO_FUNC175_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC175_IN_SEL    0x0000003F
+#define GPIO_FUNC175_IN_SEL_M  ((GPIO_FUNC175_IN_SEL_V)<<(GPIO_FUNC175_IN_SEL_S))
+#define GPIO_FUNC175_IN_SEL_V  0x3F
+#define GPIO_FUNC175_IN_SEL_S  0
+
+#define GPIO_FUNC176_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x414)
+/* GPIO_SIG176_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG176_IN_SEL    (BIT(7))
+#define GPIO_SIG176_IN_SEL_M  (BIT(7))
+#define GPIO_SIG176_IN_SEL_V  0x1
+#define GPIO_SIG176_IN_SEL_S  7
+/* GPIO_FUNC176_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC176_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC176_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC176_IN_INV_SEL_V  0x1
+#define GPIO_FUNC176_IN_INV_SEL_S  6
+/* GPIO_FUNC176_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC176_IN_SEL    0x0000003F
+#define GPIO_FUNC176_IN_SEL_M  ((GPIO_FUNC176_IN_SEL_V)<<(GPIO_FUNC176_IN_SEL_S))
+#define GPIO_FUNC176_IN_SEL_V  0x3F
+#define GPIO_FUNC176_IN_SEL_S  0
+
+#define GPIO_FUNC177_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x418)
+/* GPIO_SIG177_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG177_IN_SEL    (BIT(7))
+#define GPIO_SIG177_IN_SEL_M  (BIT(7))
+#define GPIO_SIG177_IN_SEL_V  0x1
+#define GPIO_SIG177_IN_SEL_S  7
+/* GPIO_FUNC177_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC177_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC177_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC177_IN_INV_SEL_V  0x1
+#define GPIO_FUNC177_IN_INV_SEL_S  6
+/* GPIO_FUNC177_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC177_IN_SEL    0x0000003F
+#define GPIO_FUNC177_IN_SEL_M  ((GPIO_FUNC177_IN_SEL_V)<<(GPIO_FUNC177_IN_SEL_S))
+#define GPIO_FUNC177_IN_SEL_V  0x3F
+#define GPIO_FUNC177_IN_SEL_S  0
+
+#define GPIO_FUNC178_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x41C)
+/* GPIO_SIG178_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG178_IN_SEL    (BIT(7))
+#define GPIO_SIG178_IN_SEL_M  (BIT(7))
+#define GPIO_SIG178_IN_SEL_V  0x1
+#define GPIO_SIG178_IN_SEL_S  7
+/* GPIO_FUNC178_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC178_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC178_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC178_IN_INV_SEL_V  0x1
+#define GPIO_FUNC178_IN_INV_SEL_S  6
+/* GPIO_FUNC178_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC178_IN_SEL    0x0000003F
+#define GPIO_FUNC178_IN_SEL_M  ((GPIO_FUNC178_IN_SEL_V)<<(GPIO_FUNC178_IN_SEL_S))
+#define GPIO_FUNC178_IN_SEL_V  0x3F
+#define GPIO_FUNC178_IN_SEL_S  0
+
+#define GPIO_FUNC179_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x420)
+/* GPIO_SIG179_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG179_IN_SEL    (BIT(7))
+#define GPIO_SIG179_IN_SEL_M  (BIT(7))
+#define GPIO_SIG179_IN_SEL_V  0x1
+#define GPIO_SIG179_IN_SEL_S  7
+/* GPIO_FUNC179_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC179_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC179_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC179_IN_INV_SEL_V  0x1
+#define GPIO_FUNC179_IN_INV_SEL_S  6
+/* GPIO_FUNC179_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC179_IN_SEL    0x0000003F
+#define GPIO_FUNC179_IN_SEL_M  ((GPIO_FUNC179_IN_SEL_V)<<(GPIO_FUNC179_IN_SEL_S))
+#define GPIO_FUNC179_IN_SEL_V  0x3F
+#define GPIO_FUNC179_IN_SEL_S  0
+
+#define GPIO_FUNC180_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x424)
+/* GPIO_SIG180_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG180_IN_SEL    (BIT(7))
+#define GPIO_SIG180_IN_SEL_M  (BIT(7))
+#define GPIO_SIG180_IN_SEL_V  0x1
+#define GPIO_SIG180_IN_SEL_S  7
+/* GPIO_FUNC180_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC180_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC180_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC180_IN_INV_SEL_V  0x1
+#define GPIO_FUNC180_IN_INV_SEL_S  6
+/* GPIO_FUNC180_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC180_IN_SEL    0x0000003F
+#define GPIO_FUNC180_IN_SEL_M  ((GPIO_FUNC180_IN_SEL_V)<<(GPIO_FUNC180_IN_SEL_S))
+#define GPIO_FUNC180_IN_SEL_V  0x3F
+#define GPIO_FUNC180_IN_SEL_S  0
+
+#define GPIO_FUNC181_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x428)
+/* GPIO_SIG181_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG181_IN_SEL    (BIT(7))
+#define GPIO_SIG181_IN_SEL_M  (BIT(7))
+#define GPIO_SIG181_IN_SEL_V  0x1
+#define GPIO_SIG181_IN_SEL_S  7
+/* GPIO_FUNC181_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC181_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC181_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC181_IN_INV_SEL_V  0x1
+#define GPIO_FUNC181_IN_INV_SEL_S  6
+/* GPIO_FUNC181_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC181_IN_SEL    0x0000003F
+#define GPIO_FUNC181_IN_SEL_M  ((GPIO_FUNC181_IN_SEL_V)<<(GPIO_FUNC181_IN_SEL_S))
+#define GPIO_FUNC181_IN_SEL_V  0x3F
+#define GPIO_FUNC181_IN_SEL_S  0
+
+#define GPIO_FUNC182_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x42C)
+/* GPIO_SIG182_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG182_IN_SEL    (BIT(7))
+#define GPIO_SIG182_IN_SEL_M  (BIT(7))
+#define GPIO_SIG182_IN_SEL_V  0x1
+#define GPIO_SIG182_IN_SEL_S  7
+/* GPIO_FUNC182_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC182_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC182_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC182_IN_INV_SEL_V  0x1
+#define GPIO_FUNC182_IN_INV_SEL_S  6
+/* GPIO_FUNC182_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC182_IN_SEL    0x0000003F
+#define GPIO_FUNC182_IN_SEL_M  ((GPIO_FUNC182_IN_SEL_V)<<(GPIO_FUNC182_IN_SEL_S))
+#define GPIO_FUNC182_IN_SEL_V  0x3F
+#define GPIO_FUNC182_IN_SEL_S  0
+
+#define GPIO_FUNC183_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x430)
+/* GPIO_SIG183_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG183_IN_SEL    (BIT(7))
+#define GPIO_SIG183_IN_SEL_M  (BIT(7))
+#define GPIO_SIG183_IN_SEL_V  0x1
+#define GPIO_SIG183_IN_SEL_S  7
+/* GPIO_FUNC183_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC183_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC183_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC183_IN_INV_SEL_V  0x1
+#define GPIO_FUNC183_IN_INV_SEL_S  6
+/* GPIO_FUNC183_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC183_IN_SEL    0x0000003F
+#define GPIO_FUNC183_IN_SEL_M  ((GPIO_FUNC183_IN_SEL_V)<<(GPIO_FUNC183_IN_SEL_S))
+#define GPIO_FUNC183_IN_SEL_V  0x3F
+#define GPIO_FUNC183_IN_SEL_S  0
+
+#define GPIO_FUNC184_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x434)
+/* GPIO_SIG184_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG184_IN_SEL    (BIT(7))
+#define GPIO_SIG184_IN_SEL_M  (BIT(7))
+#define GPIO_SIG184_IN_SEL_V  0x1
+#define GPIO_SIG184_IN_SEL_S  7
+/* GPIO_FUNC184_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC184_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC184_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC184_IN_INV_SEL_V  0x1
+#define GPIO_FUNC184_IN_INV_SEL_S  6
+/* GPIO_FUNC184_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC184_IN_SEL    0x0000003F
+#define GPIO_FUNC184_IN_SEL_M  ((GPIO_FUNC184_IN_SEL_V)<<(GPIO_FUNC184_IN_SEL_S))
+#define GPIO_FUNC184_IN_SEL_V  0x3F
+#define GPIO_FUNC184_IN_SEL_S  0
+
+#define GPIO_FUNC185_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x438)
+/* GPIO_SIG185_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG185_IN_SEL    (BIT(7))
+#define GPIO_SIG185_IN_SEL_M  (BIT(7))
+#define GPIO_SIG185_IN_SEL_V  0x1
+#define GPIO_SIG185_IN_SEL_S  7
+/* GPIO_FUNC185_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC185_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC185_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC185_IN_INV_SEL_V  0x1
+#define GPIO_FUNC185_IN_INV_SEL_S  6
+/* GPIO_FUNC185_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC185_IN_SEL    0x0000003F
+#define GPIO_FUNC185_IN_SEL_M  ((GPIO_FUNC185_IN_SEL_V)<<(GPIO_FUNC185_IN_SEL_S))
+#define GPIO_FUNC185_IN_SEL_V  0x3F
+#define GPIO_FUNC185_IN_SEL_S  0
+
+#define GPIO_FUNC186_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x43C)
+/* GPIO_SIG186_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG186_IN_SEL    (BIT(7))
+#define GPIO_SIG186_IN_SEL_M  (BIT(7))
+#define GPIO_SIG186_IN_SEL_V  0x1
+#define GPIO_SIG186_IN_SEL_S  7
+/* GPIO_FUNC186_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC186_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC186_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC186_IN_INV_SEL_V  0x1
+#define GPIO_FUNC186_IN_INV_SEL_S  6
+/* GPIO_FUNC186_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC186_IN_SEL    0x0000003F
+#define GPIO_FUNC186_IN_SEL_M  ((GPIO_FUNC186_IN_SEL_V)<<(GPIO_FUNC186_IN_SEL_S))
+#define GPIO_FUNC186_IN_SEL_V  0x3F
+#define GPIO_FUNC186_IN_SEL_S  0
+
+#define GPIO_FUNC187_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x440)
+/* GPIO_SIG187_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG187_IN_SEL    (BIT(7))
+#define GPIO_SIG187_IN_SEL_M  (BIT(7))
+#define GPIO_SIG187_IN_SEL_V  0x1
+#define GPIO_SIG187_IN_SEL_S  7
+/* GPIO_FUNC187_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC187_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC187_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC187_IN_INV_SEL_V  0x1
+#define GPIO_FUNC187_IN_INV_SEL_S  6
+/* GPIO_FUNC187_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC187_IN_SEL    0x0000003F
+#define GPIO_FUNC187_IN_SEL_M  ((GPIO_FUNC187_IN_SEL_V)<<(GPIO_FUNC187_IN_SEL_S))
+#define GPIO_FUNC187_IN_SEL_V  0x3F
+#define GPIO_FUNC187_IN_SEL_S  0
+
+#define GPIO_FUNC188_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x444)
+/* GPIO_SIG188_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG188_IN_SEL    (BIT(7))
+#define GPIO_SIG188_IN_SEL_M  (BIT(7))
+#define GPIO_SIG188_IN_SEL_V  0x1
+#define GPIO_SIG188_IN_SEL_S  7
+/* GPIO_FUNC188_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC188_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC188_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC188_IN_INV_SEL_V  0x1
+#define GPIO_FUNC188_IN_INV_SEL_S  6
+/* GPIO_FUNC188_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC188_IN_SEL    0x0000003F
+#define GPIO_FUNC188_IN_SEL_M  ((GPIO_FUNC188_IN_SEL_V)<<(GPIO_FUNC188_IN_SEL_S))
+#define GPIO_FUNC188_IN_SEL_V  0x3F
+#define GPIO_FUNC188_IN_SEL_S  0
+
+#define GPIO_FUNC189_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x448)
+/* GPIO_SIG189_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG189_IN_SEL    (BIT(7))
+#define GPIO_SIG189_IN_SEL_M  (BIT(7))
+#define GPIO_SIG189_IN_SEL_V  0x1
+#define GPIO_SIG189_IN_SEL_S  7
+/* GPIO_FUNC189_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC189_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC189_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC189_IN_INV_SEL_V  0x1
+#define GPIO_FUNC189_IN_INV_SEL_S  6
+/* GPIO_FUNC189_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC189_IN_SEL    0x0000003F
+#define GPIO_FUNC189_IN_SEL_M  ((GPIO_FUNC189_IN_SEL_V)<<(GPIO_FUNC189_IN_SEL_S))
+#define GPIO_FUNC189_IN_SEL_V  0x3F
+#define GPIO_FUNC189_IN_SEL_S  0
+
+#define GPIO_FUNC190_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x44C)
+/* GPIO_SIG190_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG190_IN_SEL    (BIT(7))
+#define GPIO_SIG190_IN_SEL_M  (BIT(7))
+#define GPIO_SIG190_IN_SEL_V  0x1
+#define GPIO_SIG190_IN_SEL_S  7
+/* GPIO_FUNC190_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC190_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC190_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC190_IN_INV_SEL_V  0x1
+#define GPIO_FUNC190_IN_INV_SEL_S  6
+/* GPIO_FUNC190_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC190_IN_SEL    0x0000003F
+#define GPIO_FUNC190_IN_SEL_M  ((GPIO_FUNC190_IN_SEL_V)<<(GPIO_FUNC190_IN_SEL_S))
+#define GPIO_FUNC190_IN_SEL_V  0x3F
+#define GPIO_FUNC190_IN_SEL_S  0
+
+#define GPIO_FUNC191_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x450)
+/* GPIO_SIG191_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG191_IN_SEL    (BIT(7))
+#define GPIO_SIG191_IN_SEL_M  (BIT(7))
+#define GPIO_SIG191_IN_SEL_V  0x1
+#define GPIO_SIG191_IN_SEL_S  7
+/* GPIO_FUNC191_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC191_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC191_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC191_IN_INV_SEL_V  0x1
+#define GPIO_FUNC191_IN_INV_SEL_S  6
+/* GPIO_FUNC191_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC191_IN_SEL    0x0000003F
+#define GPIO_FUNC191_IN_SEL_M  ((GPIO_FUNC191_IN_SEL_V)<<(GPIO_FUNC191_IN_SEL_S))
+#define GPIO_FUNC191_IN_SEL_V  0x3F
+#define GPIO_FUNC191_IN_SEL_S  0
+
+#define GPIO_FUNC192_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x454)
+/* GPIO_SIG192_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG192_IN_SEL    (BIT(7))
+#define GPIO_SIG192_IN_SEL_M  (BIT(7))
+#define GPIO_SIG192_IN_SEL_V  0x1
+#define GPIO_SIG192_IN_SEL_S  7
+/* GPIO_FUNC192_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC192_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC192_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC192_IN_INV_SEL_V  0x1
+#define GPIO_FUNC192_IN_INV_SEL_S  6
+/* GPIO_FUNC192_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC192_IN_SEL    0x0000003F
+#define GPIO_FUNC192_IN_SEL_M  ((GPIO_FUNC192_IN_SEL_V)<<(GPIO_FUNC192_IN_SEL_S))
+#define GPIO_FUNC192_IN_SEL_V  0x3F
+#define GPIO_FUNC192_IN_SEL_S  0
+
+#define GPIO_FUNC193_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x458)
+/* GPIO_SIG193_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG193_IN_SEL    (BIT(7))
+#define GPIO_SIG193_IN_SEL_M  (BIT(7))
+#define GPIO_SIG193_IN_SEL_V  0x1
+#define GPIO_SIG193_IN_SEL_S  7
+/* GPIO_FUNC193_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC193_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC193_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC193_IN_INV_SEL_V  0x1
+#define GPIO_FUNC193_IN_INV_SEL_S  6
+/* GPIO_FUNC193_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC193_IN_SEL    0x0000003F
+#define GPIO_FUNC193_IN_SEL_M  ((GPIO_FUNC193_IN_SEL_V)<<(GPIO_FUNC193_IN_SEL_S))
+#define GPIO_FUNC193_IN_SEL_V  0x3F
+#define GPIO_FUNC193_IN_SEL_S  0
+
+#define GPIO_FUNC194_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x45C)
+/* GPIO_SIG194_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG194_IN_SEL    (BIT(7))
+#define GPIO_SIG194_IN_SEL_M  (BIT(7))
+#define GPIO_SIG194_IN_SEL_V  0x1
+#define GPIO_SIG194_IN_SEL_S  7
+/* GPIO_FUNC194_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC194_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC194_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC194_IN_INV_SEL_V  0x1
+#define GPIO_FUNC194_IN_INV_SEL_S  6
+/* GPIO_FUNC194_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC194_IN_SEL    0x0000003F
+#define GPIO_FUNC194_IN_SEL_M  ((GPIO_FUNC194_IN_SEL_V)<<(GPIO_FUNC194_IN_SEL_S))
+#define GPIO_FUNC194_IN_SEL_V  0x3F
+#define GPIO_FUNC194_IN_SEL_S  0
+
+#define GPIO_FUNC195_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x460)
+/* GPIO_SIG195_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG195_IN_SEL    (BIT(7))
+#define GPIO_SIG195_IN_SEL_M  (BIT(7))
+#define GPIO_SIG195_IN_SEL_V  0x1
+#define GPIO_SIG195_IN_SEL_S  7
+/* GPIO_FUNC195_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC195_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC195_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC195_IN_INV_SEL_V  0x1
+#define GPIO_FUNC195_IN_INV_SEL_S  6
+/* GPIO_FUNC195_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC195_IN_SEL    0x0000003F
+#define GPIO_FUNC195_IN_SEL_M  ((GPIO_FUNC195_IN_SEL_V)<<(GPIO_FUNC195_IN_SEL_S))
+#define GPIO_FUNC195_IN_SEL_V  0x3F
+#define GPIO_FUNC195_IN_SEL_S  0
+
+#define GPIO_FUNC196_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x464)
+/* GPIO_SIG196_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG196_IN_SEL    (BIT(7))
+#define GPIO_SIG196_IN_SEL_M  (BIT(7))
+#define GPIO_SIG196_IN_SEL_V  0x1
+#define GPIO_SIG196_IN_SEL_S  7
+/* GPIO_FUNC196_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC196_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC196_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC196_IN_INV_SEL_V  0x1
+#define GPIO_FUNC196_IN_INV_SEL_S  6
+/* GPIO_FUNC196_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC196_IN_SEL    0x0000003F
+#define GPIO_FUNC196_IN_SEL_M  ((GPIO_FUNC196_IN_SEL_V)<<(GPIO_FUNC196_IN_SEL_S))
+#define GPIO_FUNC196_IN_SEL_V  0x3F
+#define GPIO_FUNC196_IN_SEL_S  0
+
+#define GPIO_FUNC197_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x468)
+/* GPIO_SIG197_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG197_IN_SEL    (BIT(7))
+#define GPIO_SIG197_IN_SEL_M  (BIT(7))
+#define GPIO_SIG197_IN_SEL_V  0x1
+#define GPIO_SIG197_IN_SEL_S  7
+/* GPIO_FUNC197_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC197_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC197_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC197_IN_INV_SEL_V  0x1
+#define GPIO_FUNC197_IN_INV_SEL_S  6
+/* GPIO_FUNC197_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC197_IN_SEL    0x0000003F
+#define GPIO_FUNC197_IN_SEL_M  ((GPIO_FUNC197_IN_SEL_V)<<(GPIO_FUNC197_IN_SEL_S))
+#define GPIO_FUNC197_IN_SEL_V  0x3F
+#define GPIO_FUNC197_IN_SEL_S  0
+
+#define GPIO_FUNC198_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x46C)
+/* GPIO_SIG198_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG198_IN_SEL    (BIT(7))
+#define GPIO_SIG198_IN_SEL_M  (BIT(7))
+#define GPIO_SIG198_IN_SEL_V  0x1
+#define GPIO_SIG198_IN_SEL_S  7
+/* GPIO_FUNC198_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC198_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC198_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC198_IN_INV_SEL_V  0x1
+#define GPIO_FUNC198_IN_INV_SEL_S  6
+/* GPIO_FUNC198_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC198_IN_SEL    0x0000003F
+#define GPIO_FUNC198_IN_SEL_M  ((GPIO_FUNC198_IN_SEL_V)<<(GPIO_FUNC198_IN_SEL_S))
+#define GPIO_FUNC198_IN_SEL_V  0x3F
+#define GPIO_FUNC198_IN_SEL_S  0
+
+#define GPIO_FUNC199_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x470)
+/* GPIO_SIG199_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG199_IN_SEL    (BIT(7))
+#define GPIO_SIG199_IN_SEL_M  (BIT(7))
+#define GPIO_SIG199_IN_SEL_V  0x1
+#define GPIO_SIG199_IN_SEL_S  7
+/* GPIO_FUNC199_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC199_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC199_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC199_IN_INV_SEL_V  0x1
+#define GPIO_FUNC199_IN_INV_SEL_S  6
+/* GPIO_FUNC199_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC199_IN_SEL    0x0000003F
+#define GPIO_FUNC199_IN_SEL_M  ((GPIO_FUNC199_IN_SEL_V)<<(GPIO_FUNC199_IN_SEL_S))
+#define GPIO_FUNC199_IN_SEL_V  0x3F
+#define GPIO_FUNC199_IN_SEL_S  0
+
+#define GPIO_FUNC200_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x474)
+/* GPIO_SIG200_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG200_IN_SEL    (BIT(7))
+#define GPIO_SIG200_IN_SEL_M  (BIT(7))
+#define GPIO_SIG200_IN_SEL_V  0x1
+#define GPIO_SIG200_IN_SEL_S  7
+/* GPIO_FUNC200_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC200_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC200_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC200_IN_INV_SEL_V  0x1
+#define GPIO_FUNC200_IN_INV_SEL_S  6
+/* GPIO_FUNC200_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC200_IN_SEL    0x0000003F
+#define GPIO_FUNC200_IN_SEL_M  ((GPIO_FUNC200_IN_SEL_V)<<(GPIO_FUNC200_IN_SEL_S))
+#define GPIO_FUNC200_IN_SEL_V  0x3F
+#define GPIO_FUNC200_IN_SEL_S  0
+
+#define GPIO_FUNC201_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x478)
+/* GPIO_SIG201_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG201_IN_SEL    (BIT(7))
+#define GPIO_SIG201_IN_SEL_M  (BIT(7))
+#define GPIO_SIG201_IN_SEL_V  0x1
+#define GPIO_SIG201_IN_SEL_S  7
+/* GPIO_FUNC201_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC201_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC201_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC201_IN_INV_SEL_V  0x1
+#define GPIO_FUNC201_IN_INV_SEL_S  6
+/* GPIO_FUNC201_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC201_IN_SEL    0x0000003F
+#define GPIO_FUNC201_IN_SEL_M  ((GPIO_FUNC201_IN_SEL_V)<<(GPIO_FUNC201_IN_SEL_S))
+#define GPIO_FUNC201_IN_SEL_V  0x3F
+#define GPIO_FUNC201_IN_SEL_S  0
+
+#define GPIO_FUNC202_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x47C)
+/* GPIO_SIG202_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG202_IN_SEL    (BIT(7))
+#define GPIO_SIG202_IN_SEL_M  (BIT(7))
+#define GPIO_SIG202_IN_SEL_V  0x1
+#define GPIO_SIG202_IN_SEL_S  7
+/* GPIO_FUNC202_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC202_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC202_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC202_IN_INV_SEL_V  0x1
+#define GPIO_FUNC202_IN_INV_SEL_S  6
+/* GPIO_FUNC202_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC202_IN_SEL    0x0000003F
+#define GPIO_FUNC202_IN_SEL_M  ((GPIO_FUNC202_IN_SEL_V)<<(GPIO_FUNC202_IN_SEL_S))
+#define GPIO_FUNC202_IN_SEL_V  0x3F
+#define GPIO_FUNC202_IN_SEL_S  0
+
+#define GPIO_FUNC203_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x480)
+/* GPIO_SIG203_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG203_IN_SEL    (BIT(7))
+#define GPIO_SIG203_IN_SEL_M  (BIT(7))
+#define GPIO_SIG203_IN_SEL_V  0x1
+#define GPIO_SIG203_IN_SEL_S  7
+/* GPIO_FUNC203_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC203_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC203_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC203_IN_INV_SEL_V  0x1
+#define GPIO_FUNC203_IN_INV_SEL_S  6
+/* GPIO_FUNC203_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC203_IN_SEL    0x0000003F
+#define GPIO_FUNC203_IN_SEL_M  ((GPIO_FUNC203_IN_SEL_V)<<(GPIO_FUNC203_IN_SEL_S))
+#define GPIO_FUNC203_IN_SEL_V  0x3F
+#define GPIO_FUNC203_IN_SEL_S  0
+
+#define GPIO_FUNC204_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x484)
+/* GPIO_SIG204_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG204_IN_SEL    (BIT(7))
+#define GPIO_SIG204_IN_SEL_M  (BIT(7))
+#define GPIO_SIG204_IN_SEL_V  0x1
+#define GPIO_SIG204_IN_SEL_S  7
+/* GPIO_FUNC204_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC204_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC204_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC204_IN_INV_SEL_V  0x1
+#define GPIO_FUNC204_IN_INV_SEL_S  6
+/* GPIO_FUNC204_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC204_IN_SEL    0x0000003F
+#define GPIO_FUNC204_IN_SEL_M  ((GPIO_FUNC204_IN_SEL_V)<<(GPIO_FUNC204_IN_SEL_S))
+#define GPIO_FUNC204_IN_SEL_V  0x3F
+#define GPIO_FUNC204_IN_SEL_S  0
+
+#define GPIO_FUNC205_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x488)
+/* GPIO_SIG205_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG205_IN_SEL    (BIT(7))
+#define GPIO_SIG205_IN_SEL_M  (BIT(7))
+#define GPIO_SIG205_IN_SEL_V  0x1
+#define GPIO_SIG205_IN_SEL_S  7
+/* GPIO_FUNC205_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC205_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC205_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC205_IN_INV_SEL_V  0x1
+#define GPIO_FUNC205_IN_INV_SEL_S  6
+/* GPIO_FUNC205_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC205_IN_SEL    0x0000003F
+#define GPIO_FUNC205_IN_SEL_M  ((GPIO_FUNC205_IN_SEL_V)<<(GPIO_FUNC205_IN_SEL_S))
+#define GPIO_FUNC205_IN_SEL_V  0x3F
+#define GPIO_FUNC205_IN_SEL_S  0
+
+#define GPIO_FUNC206_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x48C)
+/* GPIO_SIG206_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG206_IN_SEL    (BIT(7))
+#define GPIO_SIG206_IN_SEL_M  (BIT(7))
+#define GPIO_SIG206_IN_SEL_V  0x1
+#define GPIO_SIG206_IN_SEL_S  7
+/* GPIO_FUNC206_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC206_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC206_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC206_IN_INV_SEL_V  0x1
+#define GPIO_FUNC206_IN_INV_SEL_S  6
+/* GPIO_FUNC206_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC206_IN_SEL    0x0000003F
+#define GPIO_FUNC206_IN_SEL_M  ((GPIO_FUNC206_IN_SEL_V)<<(GPIO_FUNC206_IN_SEL_S))
+#define GPIO_FUNC206_IN_SEL_V  0x3F
+#define GPIO_FUNC206_IN_SEL_S  0
+
+#define GPIO_FUNC207_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x490)
+/* GPIO_SIG207_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG207_IN_SEL    (BIT(7))
+#define GPIO_SIG207_IN_SEL_M  (BIT(7))
+#define GPIO_SIG207_IN_SEL_V  0x1
+#define GPIO_SIG207_IN_SEL_S  7
+/* GPIO_FUNC207_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC207_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC207_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC207_IN_INV_SEL_V  0x1
+#define GPIO_FUNC207_IN_INV_SEL_S  6
+/* GPIO_FUNC207_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC207_IN_SEL    0x0000003F
+#define GPIO_FUNC207_IN_SEL_M  ((GPIO_FUNC207_IN_SEL_V)<<(GPIO_FUNC207_IN_SEL_S))
+#define GPIO_FUNC207_IN_SEL_V  0x3F
+#define GPIO_FUNC207_IN_SEL_S  0
+
+#define GPIO_FUNC208_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x494)
+/* GPIO_SIG208_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG208_IN_SEL    (BIT(7))
+#define GPIO_SIG208_IN_SEL_M  (BIT(7))
+#define GPIO_SIG208_IN_SEL_V  0x1
+#define GPIO_SIG208_IN_SEL_S  7
+/* GPIO_FUNC208_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC208_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC208_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC208_IN_INV_SEL_V  0x1
+#define GPIO_FUNC208_IN_INV_SEL_S  6
+/* GPIO_FUNC208_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC208_IN_SEL    0x0000003F
+#define GPIO_FUNC208_IN_SEL_M  ((GPIO_FUNC208_IN_SEL_V)<<(GPIO_FUNC208_IN_SEL_S))
+#define GPIO_FUNC208_IN_SEL_V  0x3F
+#define GPIO_FUNC208_IN_SEL_S  0
+
+#define GPIO_FUNC209_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x498)
+/* GPIO_SIG209_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG209_IN_SEL    (BIT(7))
+#define GPIO_SIG209_IN_SEL_M  (BIT(7))
+#define GPIO_SIG209_IN_SEL_V  0x1
+#define GPIO_SIG209_IN_SEL_S  7
+/* GPIO_FUNC209_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC209_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC209_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC209_IN_INV_SEL_V  0x1
+#define GPIO_FUNC209_IN_INV_SEL_S  6
+/* GPIO_FUNC209_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC209_IN_SEL    0x0000003F
+#define GPIO_FUNC209_IN_SEL_M  ((GPIO_FUNC209_IN_SEL_V)<<(GPIO_FUNC209_IN_SEL_S))
+#define GPIO_FUNC209_IN_SEL_V  0x3F
+#define GPIO_FUNC209_IN_SEL_S  0
+
+#define GPIO_FUNC210_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x49C)
+/* GPIO_SIG210_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG210_IN_SEL    (BIT(7))
+#define GPIO_SIG210_IN_SEL_M  (BIT(7))
+#define GPIO_SIG210_IN_SEL_V  0x1
+#define GPIO_SIG210_IN_SEL_S  7
+/* GPIO_FUNC210_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC210_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC210_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC210_IN_INV_SEL_V  0x1
+#define GPIO_FUNC210_IN_INV_SEL_S  6
+/* GPIO_FUNC210_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC210_IN_SEL    0x0000003F
+#define GPIO_FUNC210_IN_SEL_M  ((GPIO_FUNC210_IN_SEL_V)<<(GPIO_FUNC210_IN_SEL_S))
+#define GPIO_FUNC210_IN_SEL_V  0x3F
+#define GPIO_FUNC210_IN_SEL_S  0
+
+#define GPIO_FUNC211_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4A0)
+/* GPIO_SIG211_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG211_IN_SEL    (BIT(7))
+#define GPIO_SIG211_IN_SEL_M  (BIT(7))
+#define GPIO_SIG211_IN_SEL_V  0x1
+#define GPIO_SIG211_IN_SEL_S  7
+/* GPIO_FUNC211_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC211_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC211_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC211_IN_INV_SEL_V  0x1
+#define GPIO_FUNC211_IN_INV_SEL_S  6
+/* GPIO_FUNC211_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC211_IN_SEL    0x0000003F
+#define GPIO_FUNC211_IN_SEL_M  ((GPIO_FUNC211_IN_SEL_V)<<(GPIO_FUNC211_IN_SEL_S))
+#define GPIO_FUNC211_IN_SEL_V  0x3F
+#define GPIO_FUNC211_IN_SEL_S  0
+
+#define GPIO_FUNC212_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4A4)
+/* GPIO_SIG212_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG212_IN_SEL    (BIT(7))
+#define GPIO_SIG212_IN_SEL_M  (BIT(7))
+#define GPIO_SIG212_IN_SEL_V  0x1
+#define GPIO_SIG212_IN_SEL_S  7
+/* GPIO_FUNC212_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC212_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC212_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC212_IN_INV_SEL_V  0x1
+#define GPIO_FUNC212_IN_INV_SEL_S  6
+/* GPIO_FUNC212_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC212_IN_SEL    0x0000003F
+#define GPIO_FUNC212_IN_SEL_M  ((GPIO_FUNC212_IN_SEL_V)<<(GPIO_FUNC212_IN_SEL_S))
+#define GPIO_FUNC212_IN_SEL_V  0x3F
+#define GPIO_FUNC212_IN_SEL_S  0
+
+#define GPIO_FUNC213_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4A8)
+/* GPIO_SIG213_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG213_IN_SEL    (BIT(7))
+#define GPIO_SIG213_IN_SEL_M  (BIT(7))
+#define GPIO_SIG213_IN_SEL_V  0x1
+#define GPIO_SIG213_IN_SEL_S  7
+/* GPIO_FUNC213_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC213_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC213_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC213_IN_INV_SEL_V  0x1
+#define GPIO_FUNC213_IN_INV_SEL_S  6
+/* GPIO_FUNC213_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC213_IN_SEL    0x0000003F
+#define GPIO_FUNC213_IN_SEL_M  ((GPIO_FUNC213_IN_SEL_V)<<(GPIO_FUNC213_IN_SEL_S))
+#define GPIO_FUNC213_IN_SEL_V  0x3F
+#define GPIO_FUNC213_IN_SEL_S  0
+
+#define GPIO_FUNC214_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4AC)
+/* GPIO_SIG214_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG214_IN_SEL    (BIT(7))
+#define GPIO_SIG214_IN_SEL_M  (BIT(7))
+#define GPIO_SIG214_IN_SEL_V  0x1
+#define GPIO_SIG214_IN_SEL_S  7
+/* GPIO_FUNC214_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC214_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC214_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC214_IN_INV_SEL_V  0x1
+#define GPIO_FUNC214_IN_INV_SEL_S  6
+/* GPIO_FUNC214_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC214_IN_SEL    0x0000003F
+#define GPIO_FUNC214_IN_SEL_M  ((GPIO_FUNC214_IN_SEL_V)<<(GPIO_FUNC214_IN_SEL_S))
+#define GPIO_FUNC214_IN_SEL_V  0x3F
+#define GPIO_FUNC214_IN_SEL_S  0
+
+#define GPIO_FUNC215_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4B0)
+/* GPIO_SIG215_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG215_IN_SEL    (BIT(7))
+#define GPIO_SIG215_IN_SEL_M  (BIT(7))
+#define GPIO_SIG215_IN_SEL_V  0x1
+#define GPIO_SIG215_IN_SEL_S  7
+/* GPIO_FUNC215_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC215_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC215_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC215_IN_INV_SEL_V  0x1
+#define GPIO_FUNC215_IN_INV_SEL_S  6
+/* GPIO_FUNC215_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC215_IN_SEL    0x0000003F
+#define GPIO_FUNC215_IN_SEL_M  ((GPIO_FUNC215_IN_SEL_V)<<(GPIO_FUNC215_IN_SEL_S))
+#define GPIO_FUNC215_IN_SEL_V  0x3F
+#define GPIO_FUNC215_IN_SEL_S  0
+
+#define GPIO_FUNC216_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4B4)
+/* GPIO_SIG216_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG216_IN_SEL    (BIT(7))
+#define GPIO_SIG216_IN_SEL_M  (BIT(7))
+#define GPIO_SIG216_IN_SEL_V  0x1
+#define GPIO_SIG216_IN_SEL_S  7
+/* GPIO_FUNC216_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC216_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC216_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC216_IN_INV_SEL_V  0x1
+#define GPIO_FUNC216_IN_INV_SEL_S  6
+/* GPIO_FUNC216_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC216_IN_SEL    0x0000003F
+#define GPIO_FUNC216_IN_SEL_M  ((GPIO_FUNC216_IN_SEL_V)<<(GPIO_FUNC216_IN_SEL_S))
+#define GPIO_FUNC216_IN_SEL_V  0x3F
+#define GPIO_FUNC216_IN_SEL_S  0
+
+#define GPIO_FUNC217_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4B8)
+/* GPIO_SIG217_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG217_IN_SEL    (BIT(7))
+#define GPIO_SIG217_IN_SEL_M  (BIT(7))
+#define GPIO_SIG217_IN_SEL_V  0x1
+#define GPIO_SIG217_IN_SEL_S  7
+/* GPIO_FUNC217_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC217_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC217_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC217_IN_INV_SEL_V  0x1
+#define GPIO_FUNC217_IN_INV_SEL_S  6
+/* GPIO_FUNC217_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC217_IN_SEL    0x0000003F
+#define GPIO_FUNC217_IN_SEL_M  ((GPIO_FUNC217_IN_SEL_V)<<(GPIO_FUNC217_IN_SEL_S))
+#define GPIO_FUNC217_IN_SEL_V  0x3F
+#define GPIO_FUNC217_IN_SEL_S  0
+
+#define GPIO_FUNC218_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4BC)
+/* GPIO_SIG218_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG218_IN_SEL    (BIT(7))
+#define GPIO_SIG218_IN_SEL_M  (BIT(7))
+#define GPIO_SIG218_IN_SEL_V  0x1
+#define GPIO_SIG218_IN_SEL_S  7
+/* GPIO_FUNC218_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC218_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC218_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC218_IN_INV_SEL_V  0x1
+#define GPIO_FUNC218_IN_INV_SEL_S  6
+/* GPIO_FUNC218_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC218_IN_SEL    0x0000003F
+#define GPIO_FUNC218_IN_SEL_M  ((GPIO_FUNC218_IN_SEL_V)<<(GPIO_FUNC218_IN_SEL_S))
+#define GPIO_FUNC218_IN_SEL_V  0x3F
+#define GPIO_FUNC218_IN_SEL_S  0
+
+#define GPIO_FUNC219_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4C0)
+/* GPIO_SIG219_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG219_IN_SEL    (BIT(7))
+#define GPIO_SIG219_IN_SEL_M  (BIT(7))
+#define GPIO_SIG219_IN_SEL_V  0x1
+#define GPIO_SIG219_IN_SEL_S  7
+/* GPIO_FUNC219_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC219_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC219_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC219_IN_INV_SEL_V  0x1
+#define GPIO_FUNC219_IN_INV_SEL_S  6
+/* GPIO_FUNC219_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC219_IN_SEL    0x0000003F
+#define GPIO_FUNC219_IN_SEL_M  ((GPIO_FUNC219_IN_SEL_V)<<(GPIO_FUNC219_IN_SEL_S))
+#define GPIO_FUNC219_IN_SEL_V  0x3F
+#define GPIO_FUNC219_IN_SEL_S  0
+
+#define GPIO_FUNC220_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4C4)
+/* GPIO_SIG220_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG220_IN_SEL    (BIT(7))
+#define GPIO_SIG220_IN_SEL_M  (BIT(7))
+#define GPIO_SIG220_IN_SEL_V  0x1
+#define GPIO_SIG220_IN_SEL_S  7
+/* GPIO_FUNC220_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC220_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC220_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC220_IN_INV_SEL_V  0x1
+#define GPIO_FUNC220_IN_INV_SEL_S  6
+/* GPIO_FUNC220_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC220_IN_SEL    0x0000003F
+#define GPIO_FUNC220_IN_SEL_M  ((GPIO_FUNC220_IN_SEL_V)<<(GPIO_FUNC220_IN_SEL_S))
+#define GPIO_FUNC220_IN_SEL_V  0x3F
+#define GPIO_FUNC220_IN_SEL_S  0
+
+#define GPIO_FUNC221_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4C8)
+/* GPIO_SIG221_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG221_IN_SEL    (BIT(7))
+#define GPIO_SIG221_IN_SEL_M  (BIT(7))
+#define GPIO_SIG221_IN_SEL_V  0x1
+#define GPIO_SIG221_IN_SEL_S  7
+/* GPIO_FUNC221_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC221_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC221_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC221_IN_INV_SEL_V  0x1
+#define GPIO_FUNC221_IN_INV_SEL_S  6
+/* GPIO_FUNC221_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC221_IN_SEL    0x0000003F
+#define GPIO_FUNC221_IN_SEL_M  ((GPIO_FUNC221_IN_SEL_V)<<(GPIO_FUNC221_IN_SEL_S))
+#define GPIO_FUNC221_IN_SEL_V  0x3F
+#define GPIO_FUNC221_IN_SEL_S  0
+
+#define GPIO_FUNC222_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4CC)
+/* GPIO_SIG222_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG222_IN_SEL    (BIT(7))
+#define GPIO_SIG222_IN_SEL_M  (BIT(7))
+#define GPIO_SIG222_IN_SEL_V  0x1
+#define GPIO_SIG222_IN_SEL_S  7
+/* GPIO_FUNC222_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC222_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC222_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC222_IN_INV_SEL_V  0x1
+#define GPIO_FUNC222_IN_INV_SEL_S  6
+/* GPIO_FUNC222_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC222_IN_SEL    0x0000003F
+#define GPIO_FUNC222_IN_SEL_M  ((GPIO_FUNC222_IN_SEL_V)<<(GPIO_FUNC222_IN_SEL_S))
+#define GPIO_FUNC222_IN_SEL_V  0x3F
+#define GPIO_FUNC222_IN_SEL_S  0
+
+#define GPIO_FUNC223_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4D0)
+/* GPIO_SIG223_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG223_IN_SEL    (BIT(7))
+#define GPIO_SIG223_IN_SEL_M  (BIT(7))
+#define GPIO_SIG223_IN_SEL_V  0x1
+#define GPIO_SIG223_IN_SEL_S  7
+/* GPIO_FUNC223_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC223_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC223_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC223_IN_INV_SEL_V  0x1
+#define GPIO_FUNC223_IN_INV_SEL_S  6
+/* GPIO_FUNC223_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC223_IN_SEL    0x0000003F
+#define GPIO_FUNC223_IN_SEL_M  ((GPIO_FUNC223_IN_SEL_V)<<(GPIO_FUNC223_IN_SEL_S))
+#define GPIO_FUNC223_IN_SEL_V  0x3F
+#define GPIO_FUNC223_IN_SEL_S  0
+
+#define GPIO_FUNC224_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4D4)
+/* GPIO_SIG224_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG224_IN_SEL    (BIT(7))
+#define GPIO_SIG224_IN_SEL_M  (BIT(7))
+#define GPIO_SIG224_IN_SEL_V  0x1
+#define GPIO_SIG224_IN_SEL_S  7
+/* GPIO_FUNC224_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC224_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC224_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC224_IN_INV_SEL_V  0x1
+#define GPIO_FUNC224_IN_INV_SEL_S  6
+/* GPIO_FUNC224_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC224_IN_SEL    0x0000003F
+#define GPIO_FUNC224_IN_SEL_M  ((GPIO_FUNC224_IN_SEL_V)<<(GPIO_FUNC224_IN_SEL_S))
+#define GPIO_FUNC224_IN_SEL_V  0x3F
+#define GPIO_FUNC224_IN_SEL_S  0
+
+#define GPIO_FUNC225_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4D8)
+/* GPIO_SIG225_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG225_IN_SEL    (BIT(7))
+#define GPIO_SIG225_IN_SEL_M  (BIT(7))
+#define GPIO_SIG225_IN_SEL_V  0x1
+#define GPIO_SIG225_IN_SEL_S  7
+/* GPIO_FUNC225_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC225_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC225_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC225_IN_INV_SEL_V  0x1
+#define GPIO_FUNC225_IN_INV_SEL_S  6
+/* GPIO_FUNC225_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC225_IN_SEL    0x0000003F
+#define GPIO_FUNC225_IN_SEL_M  ((GPIO_FUNC225_IN_SEL_V)<<(GPIO_FUNC225_IN_SEL_S))
+#define GPIO_FUNC225_IN_SEL_V  0x3F
+#define GPIO_FUNC225_IN_SEL_S  0
+
+#define GPIO_FUNC226_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4DC)
+/* GPIO_SIG226_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG226_IN_SEL    (BIT(7))
+#define GPIO_SIG226_IN_SEL_M  (BIT(7))
+#define GPIO_SIG226_IN_SEL_V  0x1
+#define GPIO_SIG226_IN_SEL_S  7
+/* GPIO_FUNC226_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC226_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC226_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC226_IN_INV_SEL_V  0x1
+#define GPIO_FUNC226_IN_INV_SEL_S  6
+/* GPIO_FUNC226_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC226_IN_SEL    0x0000003F
+#define GPIO_FUNC226_IN_SEL_M  ((GPIO_FUNC226_IN_SEL_V)<<(GPIO_FUNC226_IN_SEL_S))
+#define GPIO_FUNC226_IN_SEL_V  0x3F
+#define GPIO_FUNC226_IN_SEL_S  0
+
+#define GPIO_FUNC227_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4E0)
+/* GPIO_SIG227_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG227_IN_SEL    (BIT(7))
+#define GPIO_SIG227_IN_SEL_M  (BIT(7))
+#define GPIO_SIG227_IN_SEL_V  0x1
+#define GPIO_SIG227_IN_SEL_S  7
+/* GPIO_FUNC227_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC227_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC227_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC227_IN_INV_SEL_V  0x1
+#define GPIO_FUNC227_IN_INV_SEL_S  6
+/* GPIO_FUNC227_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC227_IN_SEL    0x0000003F
+#define GPIO_FUNC227_IN_SEL_M  ((GPIO_FUNC227_IN_SEL_V)<<(GPIO_FUNC227_IN_SEL_S))
+#define GPIO_FUNC227_IN_SEL_V  0x3F
+#define GPIO_FUNC227_IN_SEL_S  0
+
+#define GPIO_FUNC228_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4E4)
+/* GPIO_SIG228_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG228_IN_SEL    (BIT(7))
+#define GPIO_SIG228_IN_SEL_M  (BIT(7))
+#define GPIO_SIG228_IN_SEL_V  0x1
+#define GPIO_SIG228_IN_SEL_S  7
+/* GPIO_FUNC228_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC228_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC228_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC228_IN_INV_SEL_V  0x1
+#define GPIO_FUNC228_IN_INV_SEL_S  6
+/* GPIO_FUNC228_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC228_IN_SEL    0x0000003F
+#define GPIO_FUNC228_IN_SEL_M  ((GPIO_FUNC228_IN_SEL_V)<<(GPIO_FUNC228_IN_SEL_S))
+#define GPIO_FUNC228_IN_SEL_V  0x3F
+#define GPIO_FUNC228_IN_SEL_S  0
+
+#define GPIO_FUNC229_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4E8)
+/* GPIO_SIG229_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG229_IN_SEL    (BIT(7))
+#define GPIO_SIG229_IN_SEL_M  (BIT(7))
+#define GPIO_SIG229_IN_SEL_V  0x1
+#define GPIO_SIG229_IN_SEL_S  7
+/* GPIO_FUNC229_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC229_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC229_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC229_IN_INV_SEL_V  0x1
+#define GPIO_FUNC229_IN_INV_SEL_S  6
+/* GPIO_FUNC229_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC229_IN_SEL    0x0000003F
+#define GPIO_FUNC229_IN_SEL_M  ((GPIO_FUNC229_IN_SEL_V)<<(GPIO_FUNC229_IN_SEL_S))
+#define GPIO_FUNC229_IN_SEL_V  0x3F
+#define GPIO_FUNC229_IN_SEL_S  0
+
+#define GPIO_FUNC230_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4EC)
+/* GPIO_SIG230_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG230_IN_SEL    (BIT(7))
+#define GPIO_SIG230_IN_SEL_M  (BIT(7))
+#define GPIO_SIG230_IN_SEL_V  0x1
+#define GPIO_SIG230_IN_SEL_S  7
+/* GPIO_FUNC230_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC230_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC230_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC230_IN_INV_SEL_V  0x1
+#define GPIO_FUNC230_IN_INV_SEL_S  6
+/* GPIO_FUNC230_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC230_IN_SEL    0x0000003F
+#define GPIO_FUNC230_IN_SEL_M  ((GPIO_FUNC230_IN_SEL_V)<<(GPIO_FUNC230_IN_SEL_S))
+#define GPIO_FUNC230_IN_SEL_V  0x3F
+#define GPIO_FUNC230_IN_SEL_S  0
+
+#define GPIO_FUNC231_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4F0)
+/* GPIO_SIG231_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG231_IN_SEL    (BIT(7))
+#define GPIO_SIG231_IN_SEL_M  (BIT(7))
+#define GPIO_SIG231_IN_SEL_V  0x1
+#define GPIO_SIG231_IN_SEL_S  7
+/* GPIO_FUNC231_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC231_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC231_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC231_IN_INV_SEL_V  0x1
+#define GPIO_FUNC231_IN_INV_SEL_S  6
+/* GPIO_FUNC231_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC231_IN_SEL    0x0000003F
+#define GPIO_FUNC231_IN_SEL_M  ((GPIO_FUNC231_IN_SEL_V)<<(GPIO_FUNC231_IN_SEL_S))
+#define GPIO_FUNC231_IN_SEL_V  0x3F
+#define GPIO_FUNC231_IN_SEL_S  0
+
+#define GPIO_FUNC232_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4F4)
+/* GPIO_SIG232_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG232_IN_SEL    (BIT(7))
+#define GPIO_SIG232_IN_SEL_M  (BIT(7))
+#define GPIO_SIG232_IN_SEL_V  0x1
+#define GPIO_SIG232_IN_SEL_S  7
+/* GPIO_FUNC232_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC232_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC232_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC232_IN_INV_SEL_V  0x1
+#define GPIO_FUNC232_IN_INV_SEL_S  6
+/* GPIO_FUNC232_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC232_IN_SEL    0x0000003F
+#define GPIO_FUNC232_IN_SEL_M  ((GPIO_FUNC232_IN_SEL_V)<<(GPIO_FUNC232_IN_SEL_S))
+#define GPIO_FUNC232_IN_SEL_V  0x3F
+#define GPIO_FUNC232_IN_SEL_S  0
+
+#define GPIO_FUNC233_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4F8)
+/* GPIO_SIG233_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG233_IN_SEL    (BIT(7))
+#define GPIO_SIG233_IN_SEL_M  (BIT(7))
+#define GPIO_SIG233_IN_SEL_V  0x1
+#define GPIO_SIG233_IN_SEL_S  7
+/* GPIO_FUNC233_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC233_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC233_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC233_IN_INV_SEL_V  0x1
+#define GPIO_FUNC233_IN_INV_SEL_S  6
+/* GPIO_FUNC233_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC233_IN_SEL    0x0000003F
+#define GPIO_FUNC233_IN_SEL_M  ((GPIO_FUNC233_IN_SEL_V)<<(GPIO_FUNC233_IN_SEL_S))
+#define GPIO_FUNC233_IN_SEL_V  0x3F
+#define GPIO_FUNC233_IN_SEL_S  0
+
+#define GPIO_FUNC234_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x4FC)
+/* GPIO_SIG234_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG234_IN_SEL    (BIT(7))
+#define GPIO_SIG234_IN_SEL_M  (BIT(7))
+#define GPIO_SIG234_IN_SEL_V  0x1
+#define GPIO_SIG234_IN_SEL_S  7
+/* GPIO_FUNC234_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC234_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC234_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC234_IN_INV_SEL_V  0x1
+#define GPIO_FUNC234_IN_INV_SEL_S  6
+/* GPIO_FUNC234_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC234_IN_SEL    0x0000003F
+#define GPIO_FUNC234_IN_SEL_M  ((GPIO_FUNC234_IN_SEL_V)<<(GPIO_FUNC234_IN_SEL_S))
+#define GPIO_FUNC234_IN_SEL_V  0x3F
+#define GPIO_FUNC234_IN_SEL_S  0
+
+#define GPIO_FUNC235_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x500)
+/* GPIO_SIG235_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG235_IN_SEL    (BIT(7))
+#define GPIO_SIG235_IN_SEL_M  (BIT(7))
+#define GPIO_SIG235_IN_SEL_V  0x1
+#define GPIO_SIG235_IN_SEL_S  7
+/* GPIO_FUNC235_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC235_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC235_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC235_IN_INV_SEL_V  0x1
+#define GPIO_FUNC235_IN_INV_SEL_S  6
+/* GPIO_FUNC235_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC235_IN_SEL    0x0000003F
+#define GPIO_FUNC235_IN_SEL_M  ((GPIO_FUNC235_IN_SEL_V)<<(GPIO_FUNC235_IN_SEL_S))
+#define GPIO_FUNC235_IN_SEL_V  0x3F
+#define GPIO_FUNC235_IN_SEL_S  0
+
+#define GPIO_FUNC236_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x504)
+/* GPIO_SIG236_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG236_IN_SEL    (BIT(7))
+#define GPIO_SIG236_IN_SEL_M  (BIT(7))
+#define GPIO_SIG236_IN_SEL_V  0x1
+#define GPIO_SIG236_IN_SEL_S  7
+/* GPIO_FUNC236_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC236_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC236_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC236_IN_INV_SEL_V  0x1
+#define GPIO_FUNC236_IN_INV_SEL_S  6
+/* GPIO_FUNC236_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC236_IN_SEL    0x0000003F
+#define GPIO_FUNC236_IN_SEL_M  ((GPIO_FUNC236_IN_SEL_V)<<(GPIO_FUNC236_IN_SEL_S))
+#define GPIO_FUNC236_IN_SEL_V  0x3F
+#define GPIO_FUNC236_IN_SEL_S  0
+
+#define GPIO_FUNC237_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x508)
+/* GPIO_SIG237_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG237_IN_SEL    (BIT(7))
+#define GPIO_SIG237_IN_SEL_M  (BIT(7))
+#define GPIO_SIG237_IN_SEL_V  0x1
+#define GPIO_SIG237_IN_SEL_S  7
+/* GPIO_FUNC237_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC237_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC237_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC237_IN_INV_SEL_V  0x1
+#define GPIO_FUNC237_IN_INV_SEL_S  6
+/* GPIO_FUNC237_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC237_IN_SEL    0x0000003F
+#define GPIO_FUNC237_IN_SEL_M  ((GPIO_FUNC237_IN_SEL_V)<<(GPIO_FUNC237_IN_SEL_S))
+#define GPIO_FUNC237_IN_SEL_V  0x3F
+#define GPIO_FUNC237_IN_SEL_S  0
+
+#define GPIO_FUNC238_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x50C)
+/* GPIO_SIG238_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG238_IN_SEL    (BIT(7))
+#define GPIO_SIG238_IN_SEL_M  (BIT(7))
+#define GPIO_SIG238_IN_SEL_V  0x1
+#define GPIO_SIG238_IN_SEL_S  7
+/* GPIO_FUNC238_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC238_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC238_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC238_IN_INV_SEL_V  0x1
+#define GPIO_FUNC238_IN_INV_SEL_S  6
+/* GPIO_FUNC238_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC238_IN_SEL    0x0000003F
+#define GPIO_FUNC238_IN_SEL_M  ((GPIO_FUNC238_IN_SEL_V)<<(GPIO_FUNC238_IN_SEL_S))
+#define GPIO_FUNC238_IN_SEL_V  0x3F
+#define GPIO_FUNC238_IN_SEL_S  0
+
+#define GPIO_FUNC239_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x510)
+/* GPIO_SIG239_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG239_IN_SEL    (BIT(7))
+#define GPIO_SIG239_IN_SEL_M  (BIT(7))
+#define GPIO_SIG239_IN_SEL_V  0x1
+#define GPIO_SIG239_IN_SEL_S  7
+/* GPIO_FUNC239_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC239_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC239_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC239_IN_INV_SEL_V  0x1
+#define GPIO_FUNC239_IN_INV_SEL_S  6
+/* GPIO_FUNC239_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC239_IN_SEL    0x0000003F
+#define GPIO_FUNC239_IN_SEL_M  ((GPIO_FUNC239_IN_SEL_V)<<(GPIO_FUNC239_IN_SEL_S))
+#define GPIO_FUNC239_IN_SEL_V  0x3F
+#define GPIO_FUNC239_IN_SEL_S  0
+
+#define GPIO_FUNC240_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x514)
+/* GPIO_SIG240_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG240_IN_SEL    (BIT(7))
+#define GPIO_SIG240_IN_SEL_M  (BIT(7))
+#define GPIO_SIG240_IN_SEL_V  0x1
+#define GPIO_SIG240_IN_SEL_S  7
+/* GPIO_FUNC240_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC240_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC240_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC240_IN_INV_SEL_V  0x1
+#define GPIO_FUNC240_IN_INV_SEL_S  6
+/* GPIO_FUNC240_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC240_IN_SEL    0x0000003F
+#define GPIO_FUNC240_IN_SEL_M  ((GPIO_FUNC240_IN_SEL_V)<<(GPIO_FUNC240_IN_SEL_S))
+#define GPIO_FUNC240_IN_SEL_V  0x3F
+#define GPIO_FUNC240_IN_SEL_S  0
+
+#define GPIO_FUNC241_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x518)
+/* GPIO_SIG241_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG241_IN_SEL    (BIT(7))
+#define GPIO_SIG241_IN_SEL_M  (BIT(7))
+#define GPIO_SIG241_IN_SEL_V  0x1
+#define GPIO_SIG241_IN_SEL_S  7
+/* GPIO_FUNC241_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC241_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC241_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC241_IN_INV_SEL_V  0x1
+#define GPIO_FUNC241_IN_INV_SEL_S  6
+/* GPIO_FUNC241_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC241_IN_SEL    0x0000003F
+#define GPIO_FUNC241_IN_SEL_M  ((GPIO_FUNC241_IN_SEL_V)<<(GPIO_FUNC241_IN_SEL_S))
+#define GPIO_FUNC241_IN_SEL_V  0x3F
+#define GPIO_FUNC241_IN_SEL_S  0
+
+#define GPIO_FUNC242_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x51C)
+/* GPIO_SIG242_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG242_IN_SEL    (BIT(7))
+#define GPIO_SIG242_IN_SEL_M  (BIT(7))
+#define GPIO_SIG242_IN_SEL_V  0x1
+#define GPIO_SIG242_IN_SEL_S  7
+/* GPIO_FUNC242_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC242_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC242_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC242_IN_INV_SEL_V  0x1
+#define GPIO_FUNC242_IN_INV_SEL_S  6
+/* GPIO_FUNC242_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC242_IN_SEL    0x0000003F
+#define GPIO_FUNC242_IN_SEL_M  ((GPIO_FUNC242_IN_SEL_V)<<(GPIO_FUNC242_IN_SEL_S))
+#define GPIO_FUNC242_IN_SEL_V  0x3F
+#define GPIO_FUNC242_IN_SEL_S  0
+
+#define GPIO_FUNC243_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x520)
+/* GPIO_SIG243_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG243_IN_SEL    (BIT(7))
+#define GPIO_SIG243_IN_SEL_M  (BIT(7))
+#define GPIO_SIG243_IN_SEL_V  0x1
+#define GPIO_SIG243_IN_SEL_S  7
+/* GPIO_FUNC243_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC243_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC243_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC243_IN_INV_SEL_V  0x1
+#define GPIO_FUNC243_IN_INV_SEL_S  6
+/* GPIO_FUNC243_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC243_IN_SEL    0x0000003F
+#define GPIO_FUNC243_IN_SEL_M  ((GPIO_FUNC243_IN_SEL_V)<<(GPIO_FUNC243_IN_SEL_S))
+#define GPIO_FUNC243_IN_SEL_V  0x3F
+#define GPIO_FUNC243_IN_SEL_S  0
+
+#define GPIO_FUNC244_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x524)
+/* GPIO_SIG244_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG244_IN_SEL    (BIT(7))
+#define GPIO_SIG244_IN_SEL_M  (BIT(7))
+#define GPIO_SIG244_IN_SEL_V  0x1
+#define GPIO_SIG244_IN_SEL_S  7
+/* GPIO_FUNC244_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC244_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC244_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC244_IN_INV_SEL_V  0x1
+#define GPIO_FUNC244_IN_INV_SEL_S  6
+/* GPIO_FUNC244_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC244_IN_SEL    0x0000003F
+#define GPIO_FUNC244_IN_SEL_M  ((GPIO_FUNC244_IN_SEL_V)<<(GPIO_FUNC244_IN_SEL_S))
+#define GPIO_FUNC244_IN_SEL_V  0x3F
+#define GPIO_FUNC244_IN_SEL_S  0
+
+#define GPIO_FUNC245_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x528)
+/* GPIO_SIG245_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG245_IN_SEL    (BIT(7))
+#define GPIO_SIG245_IN_SEL_M  (BIT(7))
+#define GPIO_SIG245_IN_SEL_V  0x1
+#define GPIO_SIG245_IN_SEL_S  7
+/* GPIO_FUNC245_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC245_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC245_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC245_IN_INV_SEL_V  0x1
+#define GPIO_FUNC245_IN_INV_SEL_S  6
+/* GPIO_FUNC245_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC245_IN_SEL    0x0000003F
+#define GPIO_FUNC245_IN_SEL_M  ((GPIO_FUNC245_IN_SEL_V)<<(GPIO_FUNC245_IN_SEL_S))
+#define GPIO_FUNC245_IN_SEL_V  0x3F
+#define GPIO_FUNC245_IN_SEL_S  0
+
+#define GPIO_FUNC246_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x52C)
+/* GPIO_SIG246_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG246_IN_SEL    (BIT(7))
+#define GPIO_SIG246_IN_SEL_M  (BIT(7))
+#define GPIO_SIG246_IN_SEL_V  0x1
+#define GPIO_SIG246_IN_SEL_S  7
+/* GPIO_FUNC246_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC246_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC246_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC246_IN_INV_SEL_V  0x1
+#define GPIO_FUNC246_IN_INV_SEL_S  6
+/* GPIO_FUNC246_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC246_IN_SEL    0x0000003F
+#define GPIO_FUNC246_IN_SEL_M  ((GPIO_FUNC246_IN_SEL_V)<<(GPIO_FUNC246_IN_SEL_S))
+#define GPIO_FUNC246_IN_SEL_V  0x3F
+#define GPIO_FUNC246_IN_SEL_S  0
+
+#define GPIO_FUNC247_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x530)
+/* GPIO_SIG247_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG247_IN_SEL    (BIT(7))
+#define GPIO_SIG247_IN_SEL_M  (BIT(7))
+#define GPIO_SIG247_IN_SEL_V  0x1
+#define GPIO_SIG247_IN_SEL_S  7
+/* GPIO_FUNC247_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC247_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC247_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC247_IN_INV_SEL_V  0x1
+#define GPIO_FUNC247_IN_INV_SEL_S  6
+/* GPIO_FUNC247_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC247_IN_SEL    0x0000003F
+#define GPIO_FUNC247_IN_SEL_M  ((GPIO_FUNC247_IN_SEL_V)<<(GPIO_FUNC247_IN_SEL_S))
+#define GPIO_FUNC247_IN_SEL_V  0x3F
+#define GPIO_FUNC247_IN_SEL_S  0
+
+#define GPIO_FUNC248_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x534)
+/* GPIO_SIG248_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG248_IN_SEL    (BIT(7))
+#define GPIO_SIG248_IN_SEL_M  (BIT(7))
+#define GPIO_SIG248_IN_SEL_V  0x1
+#define GPIO_SIG248_IN_SEL_S  7
+/* GPIO_FUNC248_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC248_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC248_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC248_IN_INV_SEL_V  0x1
+#define GPIO_FUNC248_IN_INV_SEL_S  6
+/* GPIO_FUNC248_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC248_IN_SEL    0x0000003F
+#define GPIO_FUNC248_IN_SEL_M  ((GPIO_FUNC248_IN_SEL_V)<<(GPIO_FUNC248_IN_SEL_S))
+#define GPIO_FUNC248_IN_SEL_V  0x3F
+#define GPIO_FUNC248_IN_SEL_S  0
+
+#define GPIO_FUNC249_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x538)
+/* GPIO_SIG249_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG249_IN_SEL    (BIT(7))
+#define GPIO_SIG249_IN_SEL_M  (BIT(7))
+#define GPIO_SIG249_IN_SEL_V  0x1
+#define GPIO_SIG249_IN_SEL_S  7
+/* GPIO_FUNC249_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC249_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC249_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC249_IN_INV_SEL_V  0x1
+#define GPIO_FUNC249_IN_INV_SEL_S  6
+/* GPIO_FUNC249_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC249_IN_SEL    0x0000003F
+#define GPIO_FUNC249_IN_SEL_M  ((GPIO_FUNC249_IN_SEL_V)<<(GPIO_FUNC249_IN_SEL_S))
+#define GPIO_FUNC249_IN_SEL_V  0x3F
+#define GPIO_FUNC249_IN_SEL_S  0
+
+#define GPIO_FUNC250_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x53C)
+/* GPIO_SIG250_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG250_IN_SEL    (BIT(7))
+#define GPIO_SIG250_IN_SEL_M  (BIT(7))
+#define GPIO_SIG250_IN_SEL_V  0x1
+#define GPIO_SIG250_IN_SEL_S  7
+/* GPIO_FUNC250_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC250_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC250_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC250_IN_INV_SEL_V  0x1
+#define GPIO_FUNC250_IN_INV_SEL_S  6
+/* GPIO_FUNC250_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC250_IN_SEL    0x0000003F
+#define GPIO_FUNC250_IN_SEL_M  ((GPIO_FUNC250_IN_SEL_V)<<(GPIO_FUNC250_IN_SEL_S))
+#define GPIO_FUNC250_IN_SEL_V  0x3F
+#define GPIO_FUNC250_IN_SEL_S  0
+
+#define GPIO_FUNC251_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x540)
+/* GPIO_SIG251_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG251_IN_SEL    (BIT(7))
+#define GPIO_SIG251_IN_SEL_M  (BIT(7))
+#define GPIO_SIG251_IN_SEL_V  0x1
+#define GPIO_SIG251_IN_SEL_S  7
+/* GPIO_FUNC251_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC251_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC251_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC251_IN_INV_SEL_V  0x1
+#define GPIO_FUNC251_IN_INV_SEL_S  6
+/* GPIO_FUNC251_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC251_IN_SEL    0x0000003F
+#define GPIO_FUNC251_IN_SEL_M  ((GPIO_FUNC251_IN_SEL_V)<<(GPIO_FUNC251_IN_SEL_S))
+#define GPIO_FUNC251_IN_SEL_V  0x3F
+#define GPIO_FUNC251_IN_SEL_S  0
+
+#define GPIO_FUNC252_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x544)
+/* GPIO_SIG252_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG252_IN_SEL    (BIT(7))
+#define GPIO_SIG252_IN_SEL_M  (BIT(7))
+#define GPIO_SIG252_IN_SEL_V  0x1
+#define GPIO_SIG252_IN_SEL_S  7
+/* GPIO_FUNC252_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC252_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC252_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC252_IN_INV_SEL_V  0x1
+#define GPIO_FUNC252_IN_INV_SEL_S  6
+/* GPIO_FUNC252_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC252_IN_SEL    0x0000003F
+#define GPIO_FUNC252_IN_SEL_M  ((GPIO_FUNC252_IN_SEL_V)<<(GPIO_FUNC252_IN_SEL_S))
+#define GPIO_FUNC252_IN_SEL_V  0x3F
+#define GPIO_FUNC252_IN_SEL_S  0
+
+#define GPIO_FUNC253_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x548)
+/* GPIO_SIG253_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG253_IN_SEL    (BIT(7))
+#define GPIO_SIG253_IN_SEL_M  (BIT(7))
+#define GPIO_SIG253_IN_SEL_V  0x1
+#define GPIO_SIG253_IN_SEL_S  7
+/* GPIO_FUNC253_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC253_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC253_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC253_IN_INV_SEL_V  0x1
+#define GPIO_FUNC253_IN_INV_SEL_S  6
+/* GPIO_FUNC253_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC253_IN_SEL    0x0000003F
+#define GPIO_FUNC253_IN_SEL_M  ((GPIO_FUNC253_IN_SEL_V)<<(GPIO_FUNC253_IN_SEL_S))
+#define GPIO_FUNC253_IN_SEL_V  0x3F
+#define GPIO_FUNC253_IN_SEL_S  0
+
+#define GPIO_FUNC254_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x54C)
+/* GPIO_SIG254_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG254_IN_SEL    (BIT(7))
+#define GPIO_SIG254_IN_SEL_M  (BIT(7))
+#define GPIO_SIG254_IN_SEL_V  0x1
+#define GPIO_SIG254_IN_SEL_S  7
+/* GPIO_FUNC254_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC254_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC254_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC254_IN_INV_SEL_V  0x1
+#define GPIO_FUNC254_IN_INV_SEL_S  6
+/* GPIO_FUNC254_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC254_IN_SEL    0x0000003F
+#define GPIO_FUNC254_IN_SEL_M  ((GPIO_FUNC254_IN_SEL_V)<<(GPIO_FUNC254_IN_SEL_S))
+#define GPIO_FUNC254_IN_SEL_V  0x3F
+#define GPIO_FUNC254_IN_SEL_S  0
+
+#define GPIO_FUNC255_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x550)
+/* GPIO_SIG255_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SIG255_IN_SEL    (BIT(7))
+#define GPIO_SIG255_IN_SEL_M  (BIT(7))
+#define GPIO_SIG255_IN_SEL_V  0x1
+#define GPIO_SIG255_IN_SEL_S  7
+/* GPIO_FUNC255_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC255_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC255_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC255_IN_INV_SEL_V  0x1
+#define GPIO_FUNC255_IN_INV_SEL_S  6
+/* GPIO_FUNC255_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
+/*description: .*/
+#define GPIO_FUNC255_IN_SEL    0x0000003F
+#define GPIO_FUNC255_IN_SEL_M  ((GPIO_FUNC255_IN_SEL_V)<<(GPIO_FUNC255_IN_SEL_S))
+#define GPIO_FUNC255_IN_SEL_V  0x3F
+#define GPIO_FUNC255_IN_SEL_S  0
+
+#define GPIO_FUNC0_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x554)
+/* GPIO_FUNC0_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC0_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC0_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC0_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC0_OEN_INV_SEL_S  11
+/* GPIO_FUNC0_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC0_OEN_SEL    (BIT(10))
+#define GPIO_FUNC0_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC0_OEN_SEL_V  0x1
+#define GPIO_FUNC0_OEN_SEL_S  10
+/* GPIO_FUNC0_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC0_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC0_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC0_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC0_OUT_INV_SEL_S  9
+/* GPIO_FUNC0_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC0_OUT_SEL    0x000001FF
+#define GPIO_FUNC0_OUT_SEL_M  ((GPIO_FUNC0_OUT_SEL_V)<<(GPIO_FUNC0_OUT_SEL_S))
+#define GPIO_FUNC0_OUT_SEL_V  0x1FF
+#define GPIO_FUNC0_OUT_SEL_S  0
+
+#define GPIO_FUNC1_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x558)
+/* GPIO_FUNC1_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC1_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC1_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC1_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC1_OEN_INV_SEL_S  11
+/* GPIO_FUNC1_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC1_OEN_SEL    (BIT(10))
+#define GPIO_FUNC1_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC1_OEN_SEL_V  0x1
+#define GPIO_FUNC1_OEN_SEL_S  10
+/* GPIO_FUNC1_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC1_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC1_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC1_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC1_OUT_INV_SEL_S  9
+/* GPIO_FUNC1_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC1_OUT_SEL    0x000001FF
+#define GPIO_FUNC1_OUT_SEL_M  ((GPIO_FUNC1_OUT_SEL_V)<<(GPIO_FUNC1_OUT_SEL_S))
+#define GPIO_FUNC1_OUT_SEL_V  0x1FF
+#define GPIO_FUNC1_OUT_SEL_S  0
+
+#define GPIO_FUNC2_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x55C)
+/* GPIO_FUNC2_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC2_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC2_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC2_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC2_OEN_INV_SEL_S  11
+/* GPIO_FUNC2_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC2_OEN_SEL    (BIT(10))
+#define GPIO_FUNC2_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC2_OEN_SEL_V  0x1
+#define GPIO_FUNC2_OEN_SEL_S  10
+/* GPIO_FUNC2_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC2_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC2_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC2_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC2_OUT_INV_SEL_S  9
+/* GPIO_FUNC2_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC2_OUT_SEL    0x000001FF
+#define GPIO_FUNC2_OUT_SEL_M  ((GPIO_FUNC2_OUT_SEL_V)<<(GPIO_FUNC2_OUT_SEL_S))
+#define GPIO_FUNC2_OUT_SEL_V  0x1FF
+#define GPIO_FUNC2_OUT_SEL_S  0
+
+#define GPIO_FUNC3_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x560)
+/* GPIO_FUNC3_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC3_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC3_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC3_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC3_OEN_INV_SEL_S  11
+/* GPIO_FUNC3_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC3_OEN_SEL    (BIT(10))
+#define GPIO_FUNC3_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC3_OEN_SEL_V  0x1
+#define GPIO_FUNC3_OEN_SEL_S  10
+/* GPIO_FUNC3_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC3_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC3_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC3_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC3_OUT_INV_SEL_S  9
+/* GPIO_FUNC3_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC3_OUT_SEL    0x000001FF
+#define GPIO_FUNC3_OUT_SEL_M  ((GPIO_FUNC3_OUT_SEL_V)<<(GPIO_FUNC3_OUT_SEL_S))
+#define GPIO_FUNC3_OUT_SEL_V  0x1FF
+#define GPIO_FUNC3_OUT_SEL_S  0
+
+#define GPIO_FUNC4_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x564)
+/* GPIO_FUNC4_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC4_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC4_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC4_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC4_OEN_INV_SEL_S  11
+/* GPIO_FUNC4_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC4_OEN_SEL    (BIT(10))
+#define GPIO_FUNC4_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC4_OEN_SEL_V  0x1
+#define GPIO_FUNC4_OEN_SEL_S  10
+/* GPIO_FUNC4_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC4_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC4_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC4_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC4_OUT_INV_SEL_S  9
+/* GPIO_FUNC4_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC4_OUT_SEL    0x000001FF
+#define GPIO_FUNC4_OUT_SEL_M  ((GPIO_FUNC4_OUT_SEL_V)<<(GPIO_FUNC4_OUT_SEL_S))
+#define GPIO_FUNC4_OUT_SEL_V  0x1FF
+#define GPIO_FUNC4_OUT_SEL_S  0
+
+#define GPIO_FUNC5_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x568)
+/* GPIO_FUNC5_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC5_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC5_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC5_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC5_OEN_INV_SEL_S  11
+/* GPIO_FUNC5_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC5_OEN_SEL    (BIT(10))
+#define GPIO_FUNC5_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC5_OEN_SEL_V  0x1
+#define GPIO_FUNC5_OEN_SEL_S  10
+/* GPIO_FUNC5_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC5_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC5_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC5_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC5_OUT_INV_SEL_S  9
+/* GPIO_FUNC5_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC5_OUT_SEL    0x000001FF
+#define GPIO_FUNC5_OUT_SEL_M  ((GPIO_FUNC5_OUT_SEL_V)<<(GPIO_FUNC5_OUT_SEL_S))
+#define GPIO_FUNC5_OUT_SEL_V  0x1FF
+#define GPIO_FUNC5_OUT_SEL_S  0
+
+#define GPIO_FUNC6_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x56C)
+/* GPIO_FUNC6_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC6_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC6_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC6_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC6_OEN_INV_SEL_S  11
+/* GPIO_FUNC6_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC6_OEN_SEL    (BIT(10))
+#define GPIO_FUNC6_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC6_OEN_SEL_V  0x1
+#define GPIO_FUNC6_OEN_SEL_S  10
+/* GPIO_FUNC6_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC6_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC6_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC6_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC6_OUT_INV_SEL_S  9
+/* GPIO_FUNC6_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC6_OUT_SEL    0x000001FF
+#define GPIO_FUNC6_OUT_SEL_M  ((GPIO_FUNC6_OUT_SEL_V)<<(GPIO_FUNC6_OUT_SEL_S))
+#define GPIO_FUNC6_OUT_SEL_V  0x1FF
+#define GPIO_FUNC6_OUT_SEL_S  0
+
+#define GPIO_FUNC7_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x570)
+/* GPIO_FUNC7_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC7_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC7_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC7_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC7_OEN_INV_SEL_S  11
+/* GPIO_FUNC7_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC7_OEN_SEL    (BIT(10))
+#define GPIO_FUNC7_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC7_OEN_SEL_V  0x1
+#define GPIO_FUNC7_OEN_SEL_S  10
+/* GPIO_FUNC7_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC7_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC7_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC7_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC7_OUT_INV_SEL_S  9
+/* GPIO_FUNC7_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC7_OUT_SEL    0x000001FF
+#define GPIO_FUNC7_OUT_SEL_M  ((GPIO_FUNC7_OUT_SEL_V)<<(GPIO_FUNC7_OUT_SEL_S))
+#define GPIO_FUNC7_OUT_SEL_V  0x1FF
+#define GPIO_FUNC7_OUT_SEL_S  0
+
+#define GPIO_FUNC8_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x574)
+/* GPIO_FUNC8_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC8_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC8_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC8_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC8_OEN_INV_SEL_S  11
+/* GPIO_FUNC8_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC8_OEN_SEL    (BIT(10))
+#define GPIO_FUNC8_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC8_OEN_SEL_V  0x1
+#define GPIO_FUNC8_OEN_SEL_S  10
+/* GPIO_FUNC8_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC8_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC8_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC8_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC8_OUT_INV_SEL_S  9
+/* GPIO_FUNC8_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC8_OUT_SEL    0x000001FF
+#define GPIO_FUNC8_OUT_SEL_M  ((GPIO_FUNC8_OUT_SEL_V)<<(GPIO_FUNC8_OUT_SEL_S))
+#define GPIO_FUNC8_OUT_SEL_V  0x1FF
+#define GPIO_FUNC8_OUT_SEL_S  0
+
+#define GPIO_FUNC9_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x578)
+/* GPIO_FUNC9_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC9_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC9_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC9_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC9_OEN_INV_SEL_S  11
+/* GPIO_FUNC9_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC9_OEN_SEL    (BIT(10))
+#define GPIO_FUNC9_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC9_OEN_SEL_V  0x1
+#define GPIO_FUNC9_OEN_SEL_S  10
+/* GPIO_FUNC9_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC9_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC9_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC9_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC9_OUT_INV_SEL_S  9
+/* GPIO_FUNC9_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC9_OUT_SEL    0x000001FF
+#define GPIO_FUNC9_OUT_SEL_M  ((GPIO_FUNC9_OUT_SEL_V)<<(GPIO_FUNC9_OUT_SEL_S))
+#define GPIO_FUNC9_OUT_SEL_V  0x1FF
+#define GPIO_FUNC9_OUT_SEL_S  0
+
+#define GPIO_FUNC10_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x57C)
+/* GPIO_FUNC10_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC10_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC10_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC10_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC10_OEN_INV_SEL_S  11
+/* GPIO_FUNC10_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC10_OEN_SEL    (BIT(10))
+#define GPIO_FUNC10_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC10_OEN_SEL_V  0x1
+#define GPIO_FUNC10_OEN_SEL_S  10
+/* GPIO_FUNC10_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC10_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC10_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC10_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC10_OUT_INV_SEL_S  9
+/* GPIO_FUNC10_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC10_OUT_SEL    0x000001FF
+#define GPIO_FUNC10_OUT_SEL_M  ((GPIO_FUNC10_OUT_SEL_V)<<(GPIO_FUNC10_OUT_SEL_S))
+#define GPIO_FUNC10_OUT_SEL_V  0x1FF
+#define GPIO_FUNC10_OUT_SEL_S  0
+
+#define GPIO_FUNC11_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x580)
+/* GPIO_FUNC11_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC11_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC11_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC11_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC11_OEN_INV_SEL_S  11
+/* GPIO_FUNC11_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC11_OEN_SEL    (BIT(10))
+#define GPIO_FUNC11_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC11_OEN_SEL_V  0x1
+#define GPIO_FUNC11_OEN_SEL_S  10
+/* GPIO_FUNC11_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC11_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC11_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC11_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC11_OUT_INV_SEL_S  9
+/* GPIO_FUNC11_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC11_OUT_SEL    0x000001FF
+#define GPIO_FUNC11_OUT_SEL_M  ((GPIO_FUNC11_OUT_SEL_V)<<(GPIO_FUNC11_OUT_SEL_S))
+#define GPIO_FUNC11_OUT_SEL_V  0x1FF
+#define GPIO_FUNC11_OUT_SEL_S  0
+
+#define GPIO_FUNC12_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x584)
+/* GPIO_FUNC12_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC12_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC12_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC12_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC12_OEN_INV_SEL_S  11
+/* GPIO_FUNC12_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC12_OEN_SEL    (BIT(10))
+#define GPIO_FUNC12_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC12_OEN_SEL_V  0x1
+#define GPIO_FUNC12_OEN_SEL_S  10
+/* GPIO_FUNC12_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC12_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC12_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC12_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC12_OUT_INV_SEL_S  9
+/* GPIO_FUNC12_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC12_OUT_SEL    0x000001FF
+#define GPIO_FUNC12_OUT_SEL_M  ((GPIO_FUNC12_OUT_SEL_V)<<(GPIO_FUNC12_OUT_SEL_S))
+#define GPIO_FUNC12_OUT_SEL_V  0x1FF
+#define GPIO_FUNC12_OUT_SEL_S  0
+
+#define GPIO_FUNC13_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x588)
+/* GPIO_FUNC13_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC13_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC13_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC13_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC13_OEN_INV_SEL_S  11
+/* GPIO_FUNC13_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC13_OEN_SEL    (BIT(10))
+#define GPIO_FUNC13_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC13_OEN_SEL_V  0x1
+#define GPIO_FUNC13_OEN_SEL_S  10
+/* GPIO_FUNC13_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC13_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC13_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC13_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC13_OUT_INV_SEL_S  9
+/* GPIO_FUNC13_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC13_OUT_SEL    0x000001FF
+#define GPIO_FUNC13_OUT_SEL_M  ((GPIO_FUNC13_OUT_SEL_V)<<(GPIO_FUNC13_OUT_SEL_S))
+#define GPIO_FUNC13_OUT_SEL_V  0x1FF
+#define GPIO_FUNC13_OUT_SEL_S  0
+
+#define GPIO_FUNC14_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x58C)
+/* GPIO_FUNC14_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC14_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC14_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC14_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC14_OEN_INV_SEL_S  11
+/* GPIO_FUNC14_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC14_OEN_SEL    (BIT(10))
+#define GPIO_FUNC14_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC14_OEN_SEL_V  0x1
+#define GPIO_FUNC14_OEN_SEL_S  10
+/* GPIO_FUNC14_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC14_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC14_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC14_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC14_OUT_INV_SEL_S  9
+/* GPIO_FUNC14_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC14_OUT_SEL    0x000001FF
+#define GPIO_FUNC14_OUT_SEL_M  ((GPIO_FUNC14_OUT_SEL_V)<<(GPIO_FUNC14_OUT_SEL_S))
+#define GPIO_FUNC14_OUT_SEL_V  0x1FF
+#define GPIO_FUNC14_OUT_SEL_S  0
+
+#define GPIO_FUNC15_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x590)
+/* GPIO_FUNC15_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC15_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC15_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC15_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC15_OEN_INV_SEL_S  11
+/* GPIO_FUNC15_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC15_OEN_SEL    (BIT(10))
+#define GPIO_FUNC15_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC15_OEN_SEL_V  0x1
+#define GPIO_FUNC15_OEN_SEL_S  10
+/* GPIO_FUNC15_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC15_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC15_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC15_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC15_OUT_INV_SEL_S  9
+/* GPIO_FUNC15_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC15_OUT_SEL    0x000001FF
+#define GPIO_FUNC15_OUT_SEL_M  ((GPIO_FUNC15_OUT_SEL_V)<<(GPIO_FUNC15_OUT_SEL_S))
+#define GPIO_FUNC15_OUT_SEL_V  0x1FF
+#define GPIO_FUNC15_OUT_SEL_S  0
+
+#define GPIO_FUNC16_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x594)
+/* GPIO_FUNC16_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC16_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC16_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC16_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC16_OEN_INV_SEL_S  11
+/* GPIO_FUNC16_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC16_OEN_SEL    (BIT(10))
+#define GPIO_FUNC16_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC16_OEN_SEL_V  0x1
+#define GPIO_FUNC16_OEN_SEL_S  10
+/* GPIO_FUNC16_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC16_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC16_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC16_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC16_OUT_INV_SEL_S  9
+/* GPIO_FUNC16_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC16_OUT_SEL    0x000001FF
+#define GPIO_FUNC16_OUT_SEL_M  ((GPIO_FUNC16_OUT_SEL_V)<<(GPIO_FUNC16_OUT_SEL_S))
+#define GPIO_FUNC16_OUT_SEL_V  0x1FF
+#define GPIO_FUNC16_OUT_SEL_S  0
+
+#define GPIO_FUNC17_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x598)
+/* GPIO_FUNC17_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC17_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC17_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC17_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC17_OEN_INV_SEL_S  11
+/* GPIO_FUNC17_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC17_OEN_SEL    (BIT(10))
+#define GPIO_FUNC17_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC17_OEN_SEL_V  0x1
+#define GPIO_FUNC17_OEN_SEL_S  10
+/* GPIO_FUNC17_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC17_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC17_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC17_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC17_OUT_INV_SEL_S  9
+/* GPIO_FUNC17_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC17_OUT_SEL    0x000001FF
+#define GPIO_FUNC17_OUT_SEL_M  ((GPIO_FUNC17_OUT_SEL_V)<<(GPIO_FUNC17_OUT_SEL_S))
+#define GPIO_FUNC17_OUT_SEL_V  0x1FF
+#define GPIO_FUNC17_OUT_SEL_S  0
+
+#define GPIO_FUNC18_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x59C)
+/* GPIO_FUNC18_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC18_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC18_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC18_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC18_OEN_INV_SEL_S  11
+/* GPIO_FUNC18_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC18_OEN_SEL    (BIT(10))
+#define GPIO_FUNC18_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC18_OEN_SEL_V  0x1
+#define GPIO_FUNC18_OEN_SEL_S  10
+/* GPIO_FUNC18_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC18_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC18_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC18_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC18_OUT_INV_SEL_S  9
+/* GPIO_FUNC18_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC18_OUT_SEL    0x000001FF
+#define GPIO_FUNC18_OUT_SEL_M  ((GPIO_FUNC18_OUT_SEL_V)<<(GPIO_FUNC18_OUT_SEL_S))
+#define GPIO_FUNC18_OUT_SEL_V  0x1FF
+#define GPIO_FUNC18_OUT_SEL_S  0
+
+#define GPIO_FUNC19_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5A0)
+/* GPIO_FUNC19_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC19_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC19_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC19_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC19_OEN_INV_SEL_S  11
+/* GPIO_FUNC19_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC19_OEN_SEL    (BIT(10))
+#define GPIO_FUNC19_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC19_OEN_SEL_V  0x1
+#define GPIO_FUNC19_OEN_SEL_S  10
+/* GPIO_FUNC19_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC19_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC19_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC19_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC19_OUT_INV_SEL_S  9
+/* GPIO_FUNC19_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC19_OUT_SEL    0x000001FF
+#define GPIO_FUNC19_OUT_SEL_M  ((GPIO_FUNC19_OUT_SEL_V)<<(GPIO_FUNC19_OUT_SEL_S))
+#define GPIO_FUNC19_OUT_SEL_V  0x1FF
+#define GPIO_FUNC19_OUT_SEL_S  0
+
+#define GPIO_FUNC20_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5A4)
+/* GPIO_FUNC20_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC20_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC20_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC20_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC20_OEN_INV_SEL_S  11
+/* GPIO_FUNC20_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC20_OEN_SEL    (BIT(10))
+#define GPIO_FUNC20_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC20_OEN_SEL_V  0x1
+#define GPIO_FUNC20_OEN_SEL_S  10
+/* GPIO_FUNC20_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC20_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC20_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC20_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC20_OUT_INV_SEL_S  9
+/* GPIO_FUNC20_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC20_OUT_SEL    0x000001FF
+#define GPIO_FUNC20_OUT_SEL_M  ((GPIO_FUNC20_OUT_SEL_V)<<(GPIO_FUNC20_OUT_SEL_S))
+#define GPIO_FUNC20_OUT_SEL_V  0x1FF
+#define GPIO_FUNC20_OUT_SEL_S  0
+
+#define GPIO_FUNC21_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5A8)
+/* GPIO_FUNC21_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC21_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC21_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC21_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC21_OEN_INV_SEL_S  11
+/* GPIO_FUNC21_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC21_OEN_SEL    (BIT(10))
+#define GPIO_FUNC21_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC21_OEN_SEL_V  0x1
+#define GPIO_FUNC21_OEN_SEL_S  10
+/* GPIO_FUNC21_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC21_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC21_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC21_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC21_OUT_INV_SEL_S  9
+/* GPIO_FUNC21_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC21_OUT_SEL    0x000001FF
+#define GPIO_FUNC21_OUT_SEL_M  ((GPIO_FUNC21_OUT_SEL_V)<<(GPIO_FUNC21_OUT_SEL_S))
+#define GPIO_FUNC21_OUT_SEL_V  0x1FF
+#define GPIO_FUNC21_OUT_SEL_S  0
+
+#define GPIO_FUNC22_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5AC)
+/* GPIO_FUNC22_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC22_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC22_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC22_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC22_OEN_INV_SEL_S  11
+/* GPIO_FUNC22_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC22_OEN_SEL    (BIT(10))
+#define GPIO_FUNC22_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC22_OEN_SEL_V  0x1
+#define GPIO_FUNC22_OEN_SEL_S  10
+/* GPIO_FUNC22_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC22_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC22_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC22_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC22_OUT_INV_SEL_S  9
+/* GPIO_FUNC22_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC22_OUT_SEL    0x000001FF
+#define GPIO_FUNC22_OUT_SEL_M  ((GPIO_FUNC22_OUT_SEL_V)<<(GPIO_FUNC22_OUT_SEL_S))
+#define GPIO_FUNC22_OUT_SEL_V  0x1FF
+#define GPIO_FUNC22_OUT_SEL_S  0
+
+#define GPIO_FUNC23_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5B0)
+/* GPIO_FUNC23_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC23_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC23_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC23_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC23_OEN_INV_SEL_S  11
+/* GPIO_FUNC23_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC23_OEN_SEL    (BIT(10))
+#define GPIO_FUNC23_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC23_OEN_SEL_V  0x1
+#define GPIO_FUNC23_OEN_SEL_S  10
+/* GPIO_FUNC23_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC23_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC23_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC23_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC23_OUT_INV_SEL_S  9
+/* GPIO_FUNC23_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC23_OUT_SEL    0x000001FF
+#define GPIO_FUNC23_OUT_SEL_M  ((GPIO_FUNC23_OUT_SEL_V)<<(GPIO_FUNC23_OUT_SEL_S))
+#define GPIO_FUNC23_OUT_SEL_V  0x1FF
+#define GPIO_FUNC23_OUT_SEL_S  0
+
+#define GPIO_FUNC24_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5B4)
+/* GPIO_FUNC24_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC24_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC24_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC24_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC24_OEN_INV_SEL_S  11
+/* GPIO_FUNC24_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC24_OEN_SEL    (BIT(10))
+#define GPIO_FUNC24_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC24_OEN_SEL_V  0x1
+#define GPIO_FUNC24_OEN_SEL_S  10
+/* GPIO_FUNC24_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC24_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC24_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC24_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC24_OUT_INV_SEL_S  9
+/* GPIO_FUNC24_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC24_OUT_SEL    0x000001FF
+#define GPIO_FUNC24_OUT_SEL_M  ((GPIO_FUNC24_OUT_SEL_V)<<(GPIO_FUNC24_OUT_SEL_S))
+#define GPIO_FUNC24_OUT_SEL_V  0x1FF
+#define GPIO_FUNC24_OUT_SEL_S  0
+
+#define GPIO_FUNC25_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5B8)
+/* GPIO_FUNC25_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC25_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC25_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC25_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC25_OEN_INV_SEL_S  11
+/* GPIO_FUNC25_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC25_OEN_SEL    (BIT(10))
+#define GPIO_FUNC25_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC25_OEN_SEL_V  0x1
+#define GPIO_FUNC25_OEN_SEL_S  10
+/* GPIO_FUNC25_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC25_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC25_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC25_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC25_OUT_INV_SEL_S  9
+/* GPIO_FUNC25_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC25_OUT_SEL    0x000001FF
+#define GPIO_FUNC25_OUT_SEL_M  ((GPIO_FUNC25_OUT_SEL_V)<<(GPIO_FUNC25_OUT_SEL_S))
+#define GPIO_FUNC25_OUT_SEL_V  0x1FF
+#define GPIO_FUNC25_OUT_SEL_S  0
+
+#define GPIO_FUNC26_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5BC)
+/* GPIO_FUNC26_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC26_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC26_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC26_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC26_OEN_INV_SEL_S  11
+/* GPIO_FUNC26_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC26_OEN_SEL    (BIT(10))
+#define GPIO_FUNC26_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC26_OEN_SEL_V  0x1
+#define GPIO_FUNC26_OEN_SEL_S  10
+/* GPIO_FUNC26_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC26_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC26_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC26_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC26_OUT_INV_SEL_S  9
+/* GPIO_FUNC26_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC26_OUT_SEL    0x000001FF
+#define GPIO_FUNC26_OUT_SEL_M  ((GPIO_FUNC26_OUT_SEL_V)<<(GPIO_FUNC26_OUT_SEL_S))
+#define GPIO_FUNC26_OUT_SEL_V  0x1FF
+#define GPIO_FUNC26_OUT_SEL_S  0
+
+#define GPIO_FUNC27_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5C0)
+/* GPIO_FUNC27_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC27_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC27_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC27_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC27_OEN_INV_SEL_S  11
+/* GPIO_FUNC27_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC27_OEN_SEL    (BIT(10))
+#define GPIO_FUNC27_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC27_OEN_SEL_V  0x1
+#define GPIO_FUNC27_OEN_SEL_S  10
+/* GPIO_FUNC27_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC27_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC27_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC27_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC27_OUT_INV_SEL_S  9
+/* GPIO_FUNC27_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC27_OUT_SEL    0x000001FF
+#define GPIO_FUNC27_OUT_SEL_M  ((GPIO_FUNC27_OUT_SEL_V)<<(GPIO_FUNC27_OUT_SEL_S))
+#define GPIO_FUNC27_OUT_SEL_V  0x1FF
+#define GPIO_FUNC27_OUT_SEL_S  0
+
+#define GPIO_FUNC28_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5C4)
+/* GPIO_FUNC28_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC28_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC28_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC28_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC28_OEN_INV_SEL_S  11
+/* GPIO_FUNC28_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC28_OEN_SEL    (BIT(10))
+#define GPIO_FUNC28_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC28_OEN_SEL_V  0x1
+#define GPIO_FUNC28_OEN_SEL_S  10
+/* GPIO_FUNC28_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC28_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC28_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC28_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC28_OUT_INV_SEL_S  9
+/* GPIO_FUNC28_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC28_OUT_SEL    0x000001FF
+#define GPIO_FUNC28_OUT_SEL_M  ((GPIO_FUNC28_OUT_SEL_V)<<(GPIO_FUNC28_OUT_SEL_S))
+#define GPIO_FUNC28_OUT_SEL_V  0x1FF
+#define GPIO_FUNC28_OUT_SEL_S  0
+
+#define GPIO_FUNC29_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5C8)
+/* GPIO_FUNC29_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC29_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC29_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC29_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC29_OEN_INV_SEL_S  11
+/* GPIO_FUNC29_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC29_OEN_SEL    (BIT(10))
+#define GPIO_FUNC29_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC29_OEN_SEL_V  0x1
+#define GPIO_FUNC29_OEN_SEL_S  10
+/* GPIO_FUNC29_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC29_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC29_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC29_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC29_OUT_INV_SEL_S  9
+/* GPIO_FUNC29_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC29_OUT_SEL    0x000001FF
+#define GPIO_FUNC29_OUT_SEL_M  ((GPIO_FUNC29_OUT_SEL_V)<<(GPIO_FUNC29_OUT_SEL_S))
+#define GPIO_FUNC29_OUT_SEL_V  0x1FF
+#define GPIO_FUNC29_OUT_SEL_S  0
+
+#define GPIO_FUNC30_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5CC)
+/* GPIO_FUNC30_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC30_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC30_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC30_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC30_OEN_INV_SEL_S  11
+/* GPIO_FUNC30_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC30_OEN_SEL    (BIT(10))
+#define GPIO_FUNC30_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC30_OEN_SEL_V  0x1
+#define GPIO_FUNC30_OEN_SEL_S  10
+/* GPIO_FUNC30_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC30_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC30_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC30_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC30_OUT_INV_SEL_S  9
+/* GPIO_FUNC30_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC30_OUT_SEL    0x000001FF
+#define GPIO_FUNC30_OUT_SEL_M  ((GPIO_FUNC30_OUT_SEL_V)<<(GPIO_FUNC30_OUT_SEL_S))
+#define GPIO_FUNC30_OUT_SEL_V  0x1FF
+#define GPIO_FUNC30_OUT_SEL_S  0
+
+#define GPIO_FUNC31_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5D0)
+/* GPIO_FUNC31_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC31_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC31_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC31_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC31_OEN_INV_SEL_S  11
+/* GPIO_FUNC31_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC31_OEN_SEL    (BIT(10))
+#define GPIO_FUNC31_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC31_OEN_SEL_V  0x1
+#define GPIO_FUNC31_OEN_SEL_S  10
+/* GPIO_FUNC31_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC31_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC31_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC31_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC31_OUT_INV_SEL_S  9
+/* GPIO_FUNC31_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC31_OUT_SEL    0x000001FF
+#define GPIO_FUNC31_OUT_SEL_M  ((GPIO_FUNC31_OUT_SEL_V)<<(GPIO_FUNC31_OUT_SEL_S))
+#define GPIO_FUNC31_OUT_SEL_V  0x1FF
+#define GPIO_FUNC31_OUT_SEL_S  0
+
+#define GPIO_FUNC32_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5D4)
+/* GPIO_FUNC32_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC32_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC32_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC32_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC32_OEN_INV_SEL_S  11
+/* GPIO_FUNC32_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC32_OEN_SEL    (BIT(10))
+#define GPIO_FUNC32_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC32_OEN_SEL_V  0x1
+#define GPIO_FUNC32_OEN_SEL_S  10
+/* GPIO_FUNC32_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC32_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC32_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC32_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC32_OUT_INV_SEL_S  9
+/* GPIO_FUNC32_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC32_OUT_SEL    0x000001FF
+#define GPIO_FUNC32_OUT_SEL_M  ((GPIO_FUNC32_OUT_SEL_V)<<(GPIO_FUNC32_OUT_SEL_S))
+#define GPIO_FUNC32_OUT_SEL_V  0x1FF
+#define GPIO_FUNC32_OUT_SEL_S  0
+
+#define GPIO_FUNC33_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5D8)
+/* GPIO_FUNC33_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC33_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC33_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC33_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC33_OEN_INV_SEL_S  11
+/* GPIO_FUNC33_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC33_OEN_SEL    (BIT(10))
+#define GPIO_FUNC33_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC33_OEN_SEL_V  0x1
+#define GPIO_FUNC33_OEN_SEL_S  10
+/* GPIO_FUNC33_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC33_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC33_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC33_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC33_OUT_INV_SEL_S  9
+/* GPIO_FUNC33_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC33_OUT_SEL    0x000001FF
+#define GPIO_FUNC33_OUT_SEL_M  ((GPIO_FUNC33_OUT_SEL_V)<<(GPIO_FUNC33_OUT_SEL_S))
+#define GPIO_FUNC33_OUT_SEL_V  0x1FF
+#define GPIO_FUNC33_OUT_SEL_S  0
+
+#define GPIO_FUNC34_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5DC)
+/* GPIO_FUNC34_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC34_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC34_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC34_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC34_OEN_INV_SEL_S  11
+/* GPIO_FUNC34_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC34_OEN_SEL    (BIT(10))
+#define GPIO_FUNC34_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC34_OEN_SEL_V  0x1
+#define GPIO_FUNC34_OEN_SEL_S  10
+/* GPIO_FUNC34_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC34_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC34_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC34_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC34_OUT_INV_SEL_S  9
+/* GPIO_FUNC34_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC34_OUT_SEL    0x000001FF
+#define GPIO_FUNC34_OUT_SEL_M  ((GPIO_FUNC34_OUT_SEL_V)<<(GPIO_FUNC34_OUT_SEL_S))
+#define GPIO_FUNC34_OUT_SEL_V  0x1FF
+#define GPIO_FUNC34_OUT_SEL_S  0
+
+#define GPIO_FUNC35_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5E0)
+/* GPIO_FUNC35_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC35_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC35_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC35_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC35_OEN_INV_SEL_S  11
+/* GPIO_FUNC35_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC35_OEN_SEL    (BIT(10))
+#define GPIO_FUNC35_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC35_OEN_SEL_V  0x1
+#define GPIO_FUNC35_OEN_SEL_S  10
+/* GPIO_FUNC35_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC35_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC35_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC35_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC35_OUT_INV_SEL_S  9
+/* GPIO_FUNC35_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC35_OUT_SEL    0x000001FF
+#define GPIO_FUNC35_OUT_SEL_M  ((GPIO_FUNC35_OUT_SEL_V)<<(GPIO_FUNC35_OUT_SEL_S))
+#define GPIO_FUNC35_OUT_SEL_V  0x1FF
+#define GPIO_FUNC35_OUT_SEL_S  0
+
+#define GPIO_FUNC36_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5E4)
+/* GPIO_FUNC36_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC36_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC36_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC36_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC36_OEN_INV_SEL_S  11
+/* GPIO_FUNC36_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC36_OEN_SEL    (BIT(10))
+#define GPIO_FUNC36_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC36_OEN_SEL_V  0x1
+#define GPIO_FUNC36_OEN_SEL_S  10
+/* GPIO_FUNC36_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC36_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC36_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC36_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC36_OUT_INV_SEL_S  9
+/* GPIO_FUNC36_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC36_OUT_SEL    0x000001FF
+#define GPIO_FUNC36_OUT_SEL_M  ((GPIO_FUNC36_OUT_SEL_V)<<(GPIO_FUNC36_OUT_SEL_S))
+#define GPIO_FUNC36_OUT_SEL_V  0x1FF
+#define GPIO_FUNC36_OUT_SEL_S  0
+
+#define GPIO_FUNC37_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5E8)
+/* GPIO_FUNC37_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC37_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC37_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC37_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC37_OEN_INV_SEL_S  11
+/* GPIO_FUNC37_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC37_OEN_SEL    (BIT(10))
+#define GPIO_FUNC37_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC37_OEN_SEL_V  0x1
+#define GPIO_FUNC37_OEN_SEL_S  10
+/* GPIO_FUNC37_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC37_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC37_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC37_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC37_OUT_INV_SEL_S  9
+/* GPIO_FUNC37_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC37_OUT_SEL    0x000001FF
+#define GPIO_FUNC37_OUT_SEL_M  ((GPIO_FUNC37_OUT_SEL_V)<<(GPIO_FUNC37_OUT_SEL_S))
+#define GPIO_FUNC37_OUT_SEL_V  0x1FF
+#define GPIO_FUNC37_OUT_SEL_S  0
+
+#define GPIO_FUNC38_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5EC)
+/* GPIO_FUNC38_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC38_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC38_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC38_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC38_OEN_INV_SEL_S  11
+/* GPIO_FUNC38_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC38_OEN_SEL    (BIT(10))
+#define GPIO_FUNC38_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC38_OEN_SEL_V  0x1
+#define GPIO_FUNC38_OEN_SEL_S  10
+/* GPIO_FUNC38_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC38_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC38_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC38_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC38_OUT_INV_SEL_S  9
+/* GPIO_FUNC38_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC38_OUT_SEL    0x000001FF
+#define GPIO_FUNC38_OUT_SEL_M  ((GPIO_FUNC38_OUT_SEL_V)<<(GPIO_FUNC38_OUT_SEL_S))
+#define GPIO_FUNC38_OUT_SEL_V  0x1FF
+#define GPIO_FUNC38_OUT_SEL_S  0
+
+#define GPIO_FUNC39_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5F0)
+/* GPIO_FUNC39_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC39_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC39_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC39_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC39_OEN_INV_SEL_S  11
+/* GPIO_FUNC39_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC39_OEN_SEL    (BIT(10))
+#define GPIO_FUNC39_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC39_OEN_SEL_V  0x1
+#define GPIO_FUNC39_OEN_SEL_S  10
+/* GPIO_FUNC39_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC39_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC39_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC39_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC39_OUT_INV_SEL_S  9
+/* GPIO_FUNC39_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC39_OUT_SEL    0x000001FF
+#define GPIO_FUNC39_OUT_SEL_M  ((GPIO_FUNC39_OUT_SEL_V)<<(GPIO_FUNC39_OUT_SEL_S))
+#define GPIO_FUNC39_OUT_SEL_V  0x1FF
+#define GPIO_FUNC39_OUT_SEL_S  0
+
+#define GPIO_FUNC40_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5F4)
+/* GPIO_FUNC40_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC40_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC40_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC40_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC40_OEN_INV_SEL_S  11
+/* GPIO_FUNC40_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC40_OEN_SEL    (BIT(10))
+#define GPIO_FUNC40_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC40_OEN_SEL_V  0x1
+#define GPIO_FUNC40_OEN_SEL_S  10
+/* GPIO_FUNC40_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC40_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC40_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC40_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC40_OUT_INV_SEL_S  9
+/* GPIO_FUNC40_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC40_OUT_SEL    0x000001FF
+#define GPIO_FUNC40_OUT_SEL_M  ((GPIO_FUNC40_OUT_SEL_V)<<(GPIO_FUNC40_OUT_SEL_S))
+#define GPIO_FUNC40_OUT_SEL_V  0x1FF
+#define GPIO_FUNC40_OUT_SEL_S  0
+
+#define GPIO_FUNC41_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5F8)
+/* GPIO_FUNC41_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC41_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC41_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC41_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC41_OEN_INV_SEL_S  11
+/* GPIO_FUNC41_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC41_OEN_SEL    (BIT(10))
+#define GPIO_FUNC41_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC41_OEN_SEL_V  0x1
+#define GPIO_FUNC41_OEN_SEL_S  10
+/* GPIO_FUNC41_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC41_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC41_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC41_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC41_OUT_INV_SEL_S  9
+/* GPIO_FUNC41_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC41_OUT_SEL    0x000001FF
+#define GPIO_FUNC41_OUT_SEL_M  ((GPIO_FUNC41_OUT_SEL_V)<<(GPIO_FUNC41_OUT_SEL_S))
+#define GPIO_FUNC41_OUT_SEL_V  0x1FF
+#define GPIO_FUNC41_OUT_SEL_S  0
+
+#define GPIO_FUNC42_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x5FC)
+/* GPIO_FUNC42_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC42_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC42_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC42_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC42_OEN_INV_SEL_S  11
+/* GPIO_FUNC42_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC42_OEN_SEL    (BIT(10))
+#define GPIO_FUNC42_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC42_OEN_SEL_V  0x1
+#define GPIO_FUNC42_OEN_SEL_S  10
+/* GPIO_FUNC42_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC42_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC42_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC42_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC42_OUT_INV_SEL_S  9
+/* GPIO_FUNC42_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC42_OUT_SEL    0x000001FF
+#define GPIO_FUNC42_OUT_SEL_M  ((GPIO_FUNC42_OUT_SEL_V)<<(GPIO_FUNC42_OUT_SEL_S))
+#define GPIO_FUNC42_OUT_SEL_V  0x1FF
+#define GPIO_FUNC42_OUT_SEL_S  0
+
+#define GPIO_FUNC43_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x600)
+/* GPIO_FUNC43_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC43_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC43_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC43_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC43_OEN_INV_SEL_S  11
+/* GPIO_FUNC43_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC43_OEN_SEL    (BIT(10))
+#define GPIO_FUNC43_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC43_OEN_SEL_V  0x1
+#define GPIO_FUNC43_OEN_SEL_S  10
+/* GPIO_FUNC43_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC43_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC43_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC43_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC43_OUT_INV_SEL_S  9
+/* GPIO_FUNC43_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC43_OUT_SEL    0x000001FF
+#define GPIO_FUNC43_OUT_SEL_M  ((GPIO_FUNC43_OUT_SEL_V)<<(GPIO_FUNC43_OUT_SEL_S))
+#define GPIO_FUNC43_OUT_SEL_V  0x1FF
+#define GPIO_FUNC43_OUT_SEL_S  0
+
+#define GPIO_FUNC44_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x604)
+/* GPIO_FUNC44_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC44_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC44_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC44_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC44_OEN_INV_SEL_S  11
+/* GPIO_FUNC44_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC44_OEN_SEL    (BIT(10))
+#define GPIO_FUNC44_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC44_OEN_SEL_V  0x1
+#define GPIO_FUNC44_OEN_SEL_S  10
+/* GPIO_FUNC44_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC44_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC44_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC44_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC44_OUT_INV_SEL_S  9
+/* GPIO_FUNC44_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC44_OUT_SEL    0x000001FF
+#define GPIO_FUNC44_OUT_SEL_M  ((GPIO_FUNC44_OUT_SEL_V)<<(GPIO_FUNC44_OUT_SEL_S))
+#define GPIO_FUNC44_OUT_SEL_V  0x1FF
+#define GPIO_FUNC44_OUT_SEL_S  0
+
+#define GPIO_FUNC45_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x608)
+/* GPIO_FUNC45_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC45_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC45_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC45_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC45_OEN_INV_SEL_S  11
+/* GPIO_FUNC45_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC45_OEN_SEL    (BIT(10))
+#define GPIO_FUNC45_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC45_OEN_SEL_V  0x1
+#define GPIO_FUNC45_OEN_SEL_S  10
+/* GPIO_FUNC45_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC45_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC45_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC45_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC45_OUT_INV_SEL_S  9
+/* GPIO_FUNC45_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC45_OUT_SEL    0x000001FF
+#define GPIO_FUNC45_OUT_SEL_M  ((GPIO_FUNC45_OUT_SEL_V)<<(GPIO_FUNC45_OUT_SEL_S))
+#define GPIO_FUNC45_OUT_SEL_V  0x1FF
+#define GPIO_FUNC45_OUT_SEL_S  0
+
+#define GPIO_FUNC46_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x60C)
+/* GPIO_FUNC46_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC46_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC46_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC46_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC46_OEN_INV_SEL_S  11
+/* GPIO_FUNC46_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC46_OEN_SEL    (BIT(10))
+#define GPIO_FUNC46_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC46_OEN_SEL_V  0x1
+#define GPIO_FUNC46_OEN_SEL_S  10
+/* GPIO_FUNC46_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC46_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC46_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC46_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC46_OUT_INV_SEL_S  9
+/* GPIO_FUNC46_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC46_OUT_SEL    0x000001FF
+#define GPIO_FUNC46_OUT_SEL_M  ((GPIO_FUNC46_OUT_SEL_V)<<(GPIO_FUNC46_OUT_SEL_S))
+#define GPIO_FUNC46_OUT_SEL_V  0x1FF
+#define GPIO_FUNC46_OUT_SEL_S  0
+
+#define GPIO_FUNC47_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x610)
+/* GPIO_FUNC47_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC47_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC47_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC47_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC47_OEN_INV_SEL_S  11
+/* GPIO_FUNC47_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC47_OEN_SEL    (BIT(10))
+#define GPIO_FUNC47_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC47_OEN_SEL_V  0x1
+#define GPIO_FUNC47_OEN_SEL_S  10
+/* GPIO_FUNC47_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC47_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC47_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC47_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC47_OUT_INV_SEL_S  9
+/* GPIO_FUNC47_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC47_OUT_SEL    0x000001FF
+#define GPIO_FUNC47_OUT_SEL_M  ((GPIO_FUNC47_OUT_SEL_V)<<(GPIO_FUNC47_OUT_SEL_S))
+#define GPIO_FUNC47_OUT_SEL_V  0x1FF
+#define GPIO_FUNC47_OUT_SEL_S  0
+
+#define GPIO_FUNC48_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x614)
+/* GPIO_FUNC48_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC48_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC48_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC48_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC48_OEN_INV_SEL_S  11
+/* GPIO_FUNC48_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC48_OEN_SEL    (BIT(10))
+#define GPIO_FUNC48_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC48_OEN_SEL_V  0x1
+#define GPIO_FUNC48_OEN_SEL_S  10
+/* GPIO_FUNC48_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC48_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC48_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC48_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC48_OUT_INV_SEL_S  9
+/* GPIO_FUNC48_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC48_OUT_SEL    0x000001FF
+#define GPIO_FUNC48_OUT_SEL_M  ((GPIO_FUNC48_OUT_SEL_V)<<(GPIO_FUNC48_OUT_SEL_S))
+#define GPIO_FUNC48_OUT_SEL_V  0x1FF
+#define GPIO_FUNC48_OUT_SEL_S  0
+
+#define GPIO_FUNC49_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x618)
+/* GPIO_FUNC49_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC49_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC49_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC49_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC49_OEN_INV_SEL_S  11
+/* GPIO_FUNC49_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC49_OEN_SEL    (BIT(10))
+#define GPIO_FUNC49_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC49_OEN_SEL_V  0x1
+#define GPIO_FUNC49_OEN_SEL_S  10
+/* GPIO_FUNC49_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC49_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC49_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC49_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC49_OUT_INV_SEL_S  9
+/* GPIO_FUNC49_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC49_OUT_SEL    0x000001FF
+#define GPIO_FUNC49_OUT_SEL_M  ((GPIO_FUNC49_OUT_SEL_V)<<(GPIO_FUNC49_OUT_SEL_S))
+#define GPIO_FUNC49_OUT_SEL_V  0x1FF
+#define GPIO_FUNC49_OUT_SEL_S  0
+
+#define GPIO_FUNC50_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x61C)
+/* GPIO_FUNC50_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC50_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC50_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC50_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC50_OEN_INV_SEL_S  11
+/* GPIO_FUNC50_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC50_OEN_SEL    (BIT(10))
+#define GPIO_FUNC50_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC50_OEN_SEL_V  0x1
+#define GPIO_FUNC50_OEN_SEL_S  10
+/* GPIO_FUNC50_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC50_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC50_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC50_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC50_OUT_INV_SEL_S  9
+/* GPIO_FUNC50_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC50_OUT_SEL    0x000001FF
+#define GPIO_FUNC50_OUT_SEL_M  ((GPIO_FUNC50_OUT_SEL_V)<<(GPIO_FUNC50_OUT_SEL_S))
+#define GPIO_FUNC50_OUT_SEL_V  0x1FF
+#define GPIO_FUNC50_OUT_SEL_S  0
+
+#define GPIO_FUNC51_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x620)
+/* GPIO_FUNC51_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC51_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC51_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC51_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC51_OEN_INV_SEL_S  11
+/* GPIO_FUNC51_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC51_OEN_SEL    (BIT(10))
+#define GPIO_FUNC51_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC51_OEN_SEL_V  0x1
+#define GPIO_FUNC51_OEN_SEL_S  10
+/* GPIO_FUNC51_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC51_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC51_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC51_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC51_OUT_INV_SEL_S  9
+/* GPIO_FUNC51_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC51_OUT_SEL    0x000001FF
+#define GPIO_FUNC51_OUT_SEL_M  ((GPIO_FUNC51_OUT_SEL_V)<<(GPIO_FUNC51_OUT_SEL_S))
+#define GPIO_FUNC51_OUT_SEL_V  0x1FF
+#define GPIO_FUNC51_OUT_SEL_S  0
+
+#define GPIO_FUNC52_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x624)
+/* GPIO_FUNC52_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC52_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC52_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC52_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC52_OEN_INV_SEL_S  11
+/* GPIO_FUNC52_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC52_OEN_SEL    (BIT(10))
+#define GPIO_FUNC52_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC52_OEN_SEL_V  0x1
+#define GPIO_FUNC52_OEN_SEL_S  10
+/* GPIO_FUNC52_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC52_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC52_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC52_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC52_OUT_INV_SEL_S  9
+/* GPIO_FUNC52_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC52_OUT_SEL    0x000001FF
+#define GPIO_FUNC52_OUT_SEL_M  ((GPIO_FUNC52_OUT_SEL_V)<<(GPIO_FUNC52_OUT_SEL_S))
+#define GPIO_FUNC52_OUT_SEL_V  0x1FF
+#define GPIO_FUNC52_OUT_SEL_S  0
+
+#define GPIO_FUNC53_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x628)
+/* GPIO_FUNC53_OEN_INV_SEL : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC53_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC53_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC53_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC53_OEN_INV_SEL_S  11
+/* GPIO_FUNC53_OEN_SEL : R/W ;bitpos:[10] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC53_OEN_SEL    (BIT(10))
+#define GPIO_FUNC53_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC53_OEN_SEL_V  0x1
+#define GPIO_FUNC53_OEN_SEL_S  10
+/* GPIO_FUNC53_OUT_INV_SEL : R/W ;bitpos:[9] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_FUNC53_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC53_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC53_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC53_OUT_INV_SEL_S  9
+/* GPIO_FUNC53_OUT_SEL : R/W ;bitpos:[8:0] ;default: 9'h100 ; */
+/*description: .*/
+#define GPIO_FUNC53_OUT_SEL    0x000001FF
+#define GPIO_FUNC53_OUT_SEL_M  ((GPIO_FUNC53_OUT_SEL_V)<<(GPIO_FUNC53_OUT_SEL_S))
+#define GPIO_FUNC53_OUT_SEL_V  0x1FF
+#define GPIO_FUNC53_OUT_SEL_S  0
+
+#define GPIO_CLOCK_GATE_REG          (DR_REG_GPIO_BASE + 0x62C)
+/* GPIO_CLK_EN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define GPIO_CLK_EN    (BIT(0))
+#define GPIO_CLK_EN_M  (BIT(0))
+#define GPIO_CLK_EN_V  0x1
+#define GPIO_CLK_EN_S  0
+
+#define GPIO_DATE_REG          (DR_REG_GPIO_BASE + 0x6FC)
+/* GPIO_DATE : R/W ;bitpos:[27:0] ;default: 28'h1907040 ; */
+/*description: .*/
+#define GPIO_DATE    0x0FFFFFFF
+#define GPIO_DATE_M  ((GPIO_DATE_V)<<(GPIO_DATE_S))
+#define GPIO_DATE_V  0xFFFFFFF
+#define GPIO_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_GPIO_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_sd_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_sd_reg.h
new file mode 100644
index 00000000000..617f5fd2b4f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_sd_reg.h
@@ -0,0 +1,172 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_GPIO_SD_REG_H_
+#define _SOC_GPIO_SD_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define GPIO_SIGMADELTA0_REG          (DR_REG_GPIO_SD_BASE + 0x0)
+/* GPIO_SD0_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
+/*description: .*/
+#define GPIO_SD0_PRESCALE    0x000000FF
+#define GPIO_SD0_PRESCALE_M  ((GPIO_SD0_PRESCALE_V)<<(GPIO_SD0_PRESCALE_S))
+#define GPIO_SD0_PRESCALE_V  0xFF
+#define GPIO_SD0_PRESCALE_S  8
+/* GPIO_SD0_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define GPIO_SD0_IN    0x000000FF
+#define GPIO_SD0_IN_M  ((GPIO_SD0_IN_V)<<(GPIO_SD0_IN_S))
+#define GPIO_SD0_IN_V  0xFF
+#define GPIO_SD0_IN_S  0
+
+#define GPIO_SIGMADELTA1_REG          (DR_REG_GPIO_SD_BASE + 0x4)
+/* GPIO_SD1_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
+/*description: .*/
+#define GPIO_SD1_PRESCALE    0x000000FF
+#define GPIO_SD1_PRESCALE_M  ((GPIO_SD1_PRESCALE_V)<<(GPIO_SD1_PRESCALE_S))
+#define GPIO_SD1_PRESCALE_V  0xFF
+#define GPIO_SD1_PRESCALE_S  8
+/* GPIO_SD1_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define GPIO_SD1_IN    0x000000FF
+#define GPIO_SD1_IN_M  ((GPIO_SD1_IN_V)<<(GPIO_SD1_IN_S))
+#define GPIO_SD1_IN_V  0xFF
+#define GPIO_SD1_IN_S  0
+
+#define GPIO_SIGMADELTA2_REG          (DR_REG_GPIO_SD_BASE + 0x8)
+/* GPIO_SD2_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
+/*description: .*/
+#define GPIO_SD2_PRESCALE    0x000000FF
+#define GPIO_SD2_PRESCALE_M  ((GPIO_SD2_PRESCALE_V)<<(GPIO_SD2_PRESCALE_S))
+#define GPIO_SD2_PRESCALE_V  0xFF
+#define GPIO_SD2_PRESCALE_S  8
+/* GPIO_SD2_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define GPIO_SD2_IN    0x000000FF
+#define GPIO_SD2_IN_M  ((GPIO_SD2_IN_V)<<(GPIO_SD2_IN_S))
+#define GPIO_SD2_IN_V  0xFF
+#define GPIO_SD2_IN_S  0
+
+#define GPIO_SIGMADELTA3_REG          (DR_REG_GPIO_SD_BASE + 0xC)
+/* GPIO_SD3_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
+/*description: .*/
+#define GPIO_SD3_PRESCALE    0x000000FF
+#define GPIO_SD3_PRESCALE_M  ((GPIO_SD3_PRESCALE_V)<<(GPIO_SD3_PRESCALE_S))
+#define GPIO_SD3_PRESCALE_V  0xFF
+#define GPIO_SD3_PRESCALE_S  8
+/* GPIO_SD3_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define GPIO_SD3_IN    0x000000FF
+#define GPIO_SD3_IN_M  ((GPIO_SD3_IN_V)<<(GPIO_SD3_IN_S))
+#define GPIO_SD3_IN_V  0xFF
+#define GPIO_SD3_IN_S  0
+
+#define GPIO_SIGMADELTA4_REG          (DR_REG_GPIO_SD_BASE + 0x10)
+/* GPIO_SD4_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
+/*description: .*/
+#define GPIO_SD4_PRESCALE    0x000000FF
+#define GPIO_SD4_PRESCALE_M  ((GPIO_SD4_PRESCALE_V)<<(GPIO_SD4_PRESCALE_S))
+#define GPIO_SD4_PRESCALE_V  0xFF
+#define GPIO_SD4_PRESCALE_S  8
+/* GPIO_SD4_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define GPIO_SD4_IN    0x000000FF
+#define GPIO_SD4_IN_M  ((GPIO_SD4_IN_V)<<(GPIO_SD4_IN_S))
+#define GPIO_SD4_IN_V  0xFF
+#define GPIO_SD4_IN_S  0
+
+#define GPIO_SIGMADELTA5_REG          (DR_REG_GPIO_SD_BASE + 0x14)
+/* GPIO_SD5_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
+/*description: .*/
+#define GPIO_SD5_PRESCALE    0x000000FF
+#define GPIO_SD5_PRESCALE_M  ((GPIO_SD5_PRESCALE_V)<<(GPIO_SD5_PRESCALE_S))
+#define GPIO_SD5_PRESCALE_V  0xFF
+#define GPIO_SD5_PRESCALE_S  8
+/* GPIO_SD5_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define GPIO_SD5_IN    0x000000FF
+#define GPIO_SD5_IN_M  ((GPIO_SD5_IN_V)<<(GPIO_SD5_IN_S))
+#define GPIO_SD5_IN_V  0xFF
+#define GPIO_SD5_IN_S  0
+
+#define GPIO_SIGMADELTA6_REG          (DR_REG_GPIO_SD_BASE + 0x18)
+/* GPIO_SD6_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
+/*description: .*/
+#define GPIO_SD6_PRESCALE    0x000000FF
+#define GPIO_SD6_PRESCALE_M  ((GPIO_SD6_PRESCALE_V)<<(GPIO_SD6_PRESCALE_S))
+#define GPIO_SD6_PRESCALE_V  0xFF
+#define GPIO_SD6_PRESCALE_S  8
+/* GPIO_SD6_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define GPIO_SD6_IN    0x000000FF
+#define GPIO_SD6_IN_M  ((GPIO_SD6_IN_V)<<(GPIO_SD6_IN_S))
+#define GPIO_SD6_IN_V  0xFF
+#define GPIO_SD6_IN_S  0
+
+#define GPIO_SIGMADELTA7_REG          (DR_REG_GPIO_SD_BASE + 0x1C)
+/* GPIO_SD7_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
+/*description: .*/
+#define GPIO_SD7_PRESCALE    0x000000FF
+#define GPIO_SD7_PRESCALE_M  ((GPIO_SD7_PRESCALE_V)<<(GPIO_SD7_PRESCALE_S))
+#define GPIO_SD7_PRESCALE_V  0xFF
+#define GPIO_SD7_PRESCALE_S  8
+/* GPIO_SD7_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define GPIO_SD7_IN    0x000000FF
+#define GPIO_SD7_IN_M  ((GPIO_SD7_IN_V)<<(GPIO_SD7_IN_S))
+#define GPIO_SD7_IN_V  0xFF
+#define GPIO_SD7_IN_S  0
+
+#define GPIO_SIGMADELTA_CG_REG          (DR_REG_GPIO_SD_BASE + 0x20)
+/* GPIO_SD_CLK_EN : R/W ;bitpos:[31] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SD_CLK_EN    (BIT(31))
+#define GPIO_SD_CLK_EN_M  (BIT(31))
+#define GPIO_SD_CLK_EN_V  0x1
+#define GPIO_SD_CLK_EN_S  31
+
+#define GPIO_SIGMADELTA_MISC_REG          (DR_REG_GPIO_SD_BASE + 0x24)
+/* GPIO_SPI_SWAP : R/W ;bitpos:[31] ;default: 1'h0 ; */
+/*description: .*/
+#define GPIO_SPI_SWAP    (BIT(31))
+#define GPIO_SPI_SWAP_M  (BIT(31))
+#define GPIO_SPI_SWAP_V  0x1
+#define GPIO_SPI_SWAP_S  31
+/* GPIO_FUNCTION_CLK_EN : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: .*/
+#define GPIO_FUNCTION_CLK_EN    (BIT(30))
+#define GPIO_FUNCTION_CLK_EN_M  (BIT(30))
+#define GPIO_FUNCTION_CLK_EN_V  0x1
+#define GPIO_FUNCTION_CLK_EN_S  30
+
+#define GPIO_SIGMADELTA_VERSION_REG          (DR_REG_GPIO_SD_BASE + 0x28)
+/* GPIO_SD_DATE : R/W ;bitpos:[27:0] ;default: 28'h1802260 ; */
+/*description: .*/
+#define GPIO_SD_DATE    0x0FFFFFFF
+#define GPIO_SD_DATE_M  ((GPIO_SD_DATE_V)<<(GPIO_SD_DATE_S))
+#define GPIO_SD_DATE_V  0xFFFFFFF
+#define GPIO_SD_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_GPIO_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_sd_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_sd_struct.h
new file mode 100644
index 00000000000..7bb05aafb5f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_sd_struct.h
@@ -0,0 +1,62 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_GPIO_SD_STRUCT_H_
+#define _SOC_GPIO_SD_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct gpio_sd_dev_s {
+    union {
+        struct {
+            uint32_t duty                          :    8;
+            uint32_t prescale                      :    8;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } channel[8];
+    union {
+        struct {
+            uint32_t reserved0                     :    31;
+            uint32_t clk_en                        :    1;
+        };
+        uint32_t val;
+    } cg;
+    union {
+        struct {
+            uint32_t reserved0                     :    30;
+            uint32_t function_clk_en               :    1;
+            uint32_t spi_swap                      :    1;
+        };
+        uint32_t val;
+    } misc;
+    union {
+        struct {
+            uint32_t date                          :    28;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } version;
+} gpio_sd_dev_t;
+extern gpio_sd_dev_t SIGMADELTA;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_GPIO_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_sig_map.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_sig_map.h
new file mode 100644
index 00000000000..1d6506fd805
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_sig_map.h
@@ -0,0 +1,459 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_GPIO_SIG_MAP_H_
+#define _SOC_GPIO_SIG_MAP_H_
+
+#define SPIQ_IN_IDX                   0
+#define SPIQ_OUT_IDX                  0
+#define SPID_IN_IDX                   1
+#define SPID_OUT_IDX                  1
+#define SPIHD_IN_IDX                  2
+#define SPIHD_OUT_IDX                 2
+#define SPIWP_IN_IDX                  3
+#define SPIWP_OUT_IDX                 3
+#define SPICLK_OUT_IDX                4
+#define SPICS0_OUT_IDX                5
+#define SPICS1_OUT_IDX                6
+#define SPID4_IN_IDX                  7
+#define SPID4_OUT_IDX                 7
+#define SPID5_IN_IDX                  8
+#define SPID5_OUT_IDX                 8
+#define SPID6_IN_IDX                  9
+#define SPID6_OUT_IDX                 9
+#define SPID7_IN_IDX                  10
+#define SPID7_OUT_IDX                 10
+#define SPIDQS_IN_IDX                 11
+#define SPIDQS_OUT_IDX                11
+#define U0RXD_IN_IDX                  12
+#define U0TXD_OUT_IDX                 12
+#define U0CTS_IN_IDX                  13
+#define U0RTS_OUT_IDX                 13
+#define U0DSR_IN_IDX                  14
+#define U0DTR_OUT_IDX                 14
+#define U1RXD_IN_IDX                  15
+#define U1TXD_OUT_IDX                 15
+#define U1CTS_IN_IDX                  16
+#define U1RTS_OUT_IDX                 16
+#define U1DSR_IN_IDX                  17
+#define U1DTR_OUT_IDX                 17
+#define U2RXD_IN_IDX                  18
+#define U2TXD_OUT_IDX                 18
+#define U2CTS_IN_IDX                  19
+#define U2RTS_OUT_IDX                 19
+#define U2DSR_IN_IDX                  20
+#define U2DTR_OUT_IDX                 20
+#define I2S1_MCLK_IN_IDX              21
+#define I2S1_MCLK_OUT_IDX             21
+#define I2S0O_BCK_IN_IDX              22
+#define I2S0O_BCK_OUT_IDX             22
+#define I2S0_MCLK_IN_IDX              23
+#define I2S0_MCLK_OUT_IDX             23
+#define I2S0O_WS_IN_IDX               24
+#define I2S0O_WS_OUT_IDX              24
+#define I2S0I_SD_IN_IDX               25
+#define I2S0O_SD_OUT_IDX              25
+#define I2S0I_BCK_IN_IDX              26
+#define I2S0I_BCK_OUT_IDX             26
+#define I2S0I_WS_IN_IDX               27
+#define I2S0I_WS_OUT_IDX              27
+#define I2S1O_BCK_IN_IDX              28
+#define I2S1O_BCK_OUT_IDX             28
+#define I2S1O_WS_IN_IDX               29
+#define I2S1O_WS_OUT_IDX              29
+#define I2S1I_SD_IN_IDX               30
+#define I2S1O_SD_OUT_IDX              30
+#define I2S1I_BCK_IN_IDX              31
+#define I2S1I_BCK_OUT_IDX             31
+#define I2S1I_WS_IN_IDX               32
+#define I2S1I_WS_OUT_IDX              32
+#define PCNT_SIG_CH0_IN0_IDX          33
+#define GPIO_WLAN_PRIO_IDX            33
+#define PCNT_SIG_CH1_IN0_IDX          34
+#define GPIO_WLAN_ACTIVE_IDX          34
+#define PCNT_CTRL_CH0_IN0_IDX         35
+#define BB_DIAG0_IDX                  35
+#define PCNT_CTRL_CH1_IN0_IDX         36
+#define BB_DIAG1_IDX                  36
+#define PCNT_SIG_CH0_IN1_IDX          37
+#define BB_DIAG2_IDX                  37
+#define PCNT_SIG_CH1_IN1_IDX          38
+#define BB_DIAG3_IDX                  38
+#define PCNT_CTRL_CH0_IN1_IDX         39
+#define BB_DIAG4_IDX                  39
+#define PCNT_CTRL_CH1_IN1_IDX         40
+#define BB_DIAG5_IDX                  40
+#define PCNT_SIG_CH0_IN2_IDX          41
+#define BB_DIAG6_IDX                  41
+#define PCNT_SIG_CH1_IN2_IDX          42
+#define BB_DIAG7_IDX                  42
+#define PCNT_CTRL_CH0_IN2_IDX         43
+#define BB_DIAG8_IDX                  43
+#define PCNT_CTRL_CH1_IN2_IDX         44
+#define BB_DIAG9_IDX                  44
+#define PCNT_SIG_CH0_IN3_IDX          45
+#define BB_DIAG10_IDX                 45
+#define PCNT_SIG_CH1_IN3_IDX          46
+#define BB_DIAG11_IDX                 46
+#define PCNT_CTRL_CH0_IN3_IDX         47
+#define BB_DIAG12_IDX                 47
+#define PCNT_CTRL_CH1_IN3_IDX         48
+#define BB_DIAG13_IDX                 48
+#define GPIO_BT_ACTIVE_IDX            49
+#define BB_DIAG14_IDX                 49
+#define GPIO_BT_PRIORITY_IDX          50
+#define BB_DIAG15_IDX                 50
+#define I2S0I_SD1_IN_IDX              51
+#define BB_DIAG16_IDX                 51
+#define I2S0I_SD2_IN_IDX              52
+#define BB_DIAG17_IDX                 52
+#define I2S0I_SD3_IN_IDX              53
+#define BB_DIAG18_IDX                 53
+#define CORE1_GPIO_IN7_IDX            54
+#define CORE1_GPIO_OUT7_IDX           54
+#define USB_EXTPHY_VP_IDX             55
+#define USB_EXTPHY_OEN_IDX            55
+#define USB_EXTPHY_VM_IDX             56
+#define USB_EXTPHY_SPEED_IDX          56
+#define USB_EXTPHY_RCV_IDX            57
+#define USB_EXTPHY_VPO_IDX            57
+#define USB_OTG_IDDIG_IN_IDX          58
+#define USB_EXTPHY_VMO_IDX            58
+#define USB_OTG_AVALID_IN_IDX         59
+#define USB_EXTPHY_SUSPND_IDX         59
+#define USB_SRP_BVALID_IN_IDX         60
+#define USB_OTG_IDPULLUP_IDX          60
+#define USB_OTG_VBUSVALID_IN_IDX      61
+#define USB_OTG_DPPULLDOWN_IDX        61
+#define USB_SRP_SESSEND_IN_IDX        62
+#define USB_OTG_DMPULLDOWN_IDX        62
+#define USB_OTG_DRVVBUS_IDX           63
+#define USB_SRP_CHRGVBUS_IDX          64
+#define USB_SRP_DISCHRGVBUS_IDX       65
+#define SPI3_CLK_IN_IDX               66
+#define SPI3_CLK_OUT_IDX              66
+#define SPI3_Q_IN_IDX                 67
+#define SPI3_Q_OUT_IDX                67
+#define SPI3_D_IN_IDX                 68
+#define SPI3_D_OUT_IDX                68
+#define SPI3_HD_IN_IDX                69
+#define SPI3_HD_OUT_IDX               69
+#define SPI3_WP_IN_IDX                70
+#define SPI3_WP_OUT_IDX               70
+#define SPI3_CS0_IN_IDX               71
+#define SPI3_CS0_OUT_IDX              71
+#define SPI3_CS1_OUT_IDX              72
+#define EXT_ADC_START_IDX             73
+#define LEDC_LS_SIG_OUT0_IDX          73
+#define LEDC_LS_SIG_OUT1_IDX          74
+#define LEDC_LS_SIG_OUT2_IDX          75
+#define LEDC_LS_SIG_OUT3_IDX          76
+#define LEDC_LS_SIG_OUT4_IDX          77
+#define LEDC_LS_SIG_OUT5_IDX          78
+#define LEDC_LS_SIG_OUT6_IDX          79
+#define LEDC_LS_SIG_OUT7_IDX          80
+#define RMT_SIG_IN0_IDX               81
+#define RMT_SIG_OUT0_IDX              81
+#define RMT_SIG_IN1_IDX               82
+#define RMT_SIG_OUT1_IDX              82
+#define RMT_SIG_IN2_IDX               83
+#define RMT_SIG_OUT2_IDX              83
+#define RMT_SIG_IN3_IDX               84
+#define RMT_SIG_OUT3_IDX              84
+#define USB_JTAG_TCK_IDX              85
+#define USB_JTAG_TMS_IDX              86
+#define USB_JTAG_TDI_IDX              87
+#define USB_JTAG_TDO_IDX              88
+#define I2CEXT0_SCL_IN_IDX            89
+#define I2CEXT0_SCL_OUT_IDX           89
+#define I2CEXT0_SDA_IN_IDX            90
+#define I2CEXT0_SDA_OUT_IDX           90
+#define I2CEXT1_SCL_IN_IDX            91
+#define I2CEXT1_SCL_OUT_IDX           91
+#define I2CEXT1_SDA_IN_IDX            92
+#define I2CEXT1_SDA_OUT_IDX           92
+#define GPIO_SD0_OUT_IDX              93
+#define GPIO_SD1_OUT_IDX              94
+#define GPIO_SD2_OUT_IDX              95
+#define GPIO_SD3_OUT_IDX              96
+#define GPIO_SD4_OUT_IDX              97
+#define GPIO_SD5_OUT_IDX              98
+#define GPIO_SD6_OUT_IDX              99
+#define GPIO_SD7_OUT_IDX              100
+#define FSPICLK_IN_IDX                101
+#define FSPICLK_OUT_IDX               101
+#define FSPIQ_IN_IDX                  102
+#define FSPIQ_OUT_IDX                 102
+#define FSPID_IN_IDX                  103
+#define FSPID_OUT_IDX                 103
+#define FSPIHD_IN_IDX                 104
+#define FSPIHD_OUT_IDX                104
+#define FSPIWP_IN_IDX                 105
+#define FSPIWP_OUT_IDX                105
+#define FSPIIO4_IN_IDX                106
+#define FSPIIO4_OUT_IDX               106
+#define FSPIIO5_IN_IDX                107
+#define FSPIIO5_OUT_IDX               107
+#define FSPIIO6_IN_IDX                108
+#define FSPIIO6_OUT_IDX               108
+#define FSPIIO7_IN_IDX                109
+#define FSPIIO7_OUT_IDX               109
+#define FSPICS0_IN_IDX                110
+#define FSPICS0_OUT_IDX               110
+#define FSPICS1_OUT_IDX               111
+#define FSPICS2_OUT_IDX               112
+#define FSPICS3_OUT_IDX               113
+#define FSPICS4_OUT_IDX               114
+#define FSPICS5_OUT_IDX               115
+#define TWAI_RX_IDX                   116
+#define TWAI_TX_IDX                   116
+#define TWAI_BUS_OFF_ON_IDX           117
+#define TWAI_CLKOUT_IDX               118
+#define SUBSPICLK_OUT_IDX             119
+#define SUBSPIQ_IN_IDX                120
+#define SUBSPIQ_OUT_IDX               120
+#define SUBSPID_IN_IDX                121
+#define SUBSPID_OUT_IDX               121
+#define SUBSPIHD_IN_IDX               122
+#define SUBSPIHD_OUT_IDX              122
+#define SUBSPIWP_IN_IDX               123
+#define SUBSPIWP_OUT_IDX              123
+#define SUBSPICS0_OUT_IDX             124
+#define SUBSPICS1_OUT_IDX             125
+#define FSPIDQS_OUT_IDX               126
+#define SPI3_CS2_OUT_IDX              127
+#define I2S0O_SD1_OUT_IDX             128
+#define CORE1_GPIO_IN0_IDX            129
+#define CORE1_GPIO_OUT0_IDX           129
+#define CORE1_GPIO_IN1_IDX            130
+#define CORE1_GPIO_OUT1_IDX           130
+#define CORE1_GPIO_IN2_IDX            131
+#define CORE1_GPIO_OUT2_IDX           131
+#define LCD_CS_IDX                    132
+#define CAM_DATA_IN0_IDX              133
+#define LCD_DATA_OUT0_IDX             133
+#define CAM_DATA_IN1_IDX              134
+#define LCD_DATA_OUT1_IDX             134
+#define CAM_DATA_IN2_IDX              135
+#define LCD_DATA_OUT2_IDX             135
+#define CAM_DATA_IN3_IDX              136
+#define LCD_DATA_OUT3_IDX             136
+#define CAM_DATA_IN4_IDX              137
+#define LCD_DATA_OUT4_IDX             137
+#define CAM_DATA_IN5_IDX              138
+#define LCD_DATA_OUT5_IDX             138
+#define CAM_DATA_IN6_IDX              139
+#define LCD_DATA_OUT6_IDX             139
+#define CAM_DATA_IN7_IDX              140
+#define LCD_DATA_OUT7_IDX             140
+#define CAM_DATA_IN8_IDX              141
+#define LCD_DATA_OUT8_IDX             141
+#define CAM_DATA_IN9_IDX              142
+#define LCD_DATA_OUT9_IDX             142
+#define CAM_DATA_IN10_IDX             143
+#define LCD_DATA_OUT10_IDX            143
+#define CAM_DATA_IN11_IDX             144
+#define LCD_DATA_OUT11_IDX            144
+#define CAM_DATA_IN12_IDX             145
+#define LCD_DATA_OUT12_IDX            145
+#define CAM_DATA_IN13_IDX             146
+#define LCD_DATA_OUT13_IDX            146
+#define CAM_DATA_IN14_IDX             147
+#define LCD_DATA_OUT14_IDX            147
+#define CAM_DATA_IN15_IDX             148
+#define LCD_DATA_OUT15_IDX            148
+#define CAM_PCLK_IDX                  149
+#define CAM_CLK_IDX                   149
+#define CAM_H_ENABLE_IDX              150
+#define LCD_H_ENABLE_IDX              150
+#define CAM_H_SYNC_IDX                151
+#define LCD_H_SYNC_IDX                151
+#define CAM_V_SYNC_IDX                152
+#define LCD_V_SYNC_IDX                152
+#define LCD_DC_IDX                    153
+#define LCD_PCLK_IDX                  154
+#define SUBSPID4_IN_IDX               155
+#define SUBSPID4_OUT_IDX              155
+#define SUBSPID5_IN_IDX               156
+#define SUBSPID5_OUT_IDX              156
+#define SUBSPID6_IN_IDX               157
+#define SUBSPID6_OUT_IDX              157
+#define SUBSPID7_IN_IDX               158
+#define SUBSPID7_OUT_IDX              158
+#define SUBSPIDQS_IN_IDX              159
+#define SUBSPIDQS_OUT_IDX             159
+#define PWM0_SYNC0_IN_IDX             160
+#define PWM0_OUT0A_IDX                160
+#define PWM0_SYNC1_IN_IDX             161
+#define PWM0_OUT0B_IDX                161
+#define PWM0_SYNC2_IN_IDX             162
+#define PWM0_OUT1A_IDX                162
+#define PWM0_F0_IN_IDX                163
+#define PWM0_OUT1B_IDX                163
+#define PWM0_F1_IN_IDX                164
+#define PWM0_OUT2A_IDX                164
+#define PWM0_F2_IN_IDX                165
+#define PWM0_OUT2B_IDX                165
+#define PWM0_CAP0_IN_IDX              166
+#define PWM1_OUT0A_IDX                166
+#define PWM0_CAP1_IN_IDX              167
+#define PWM1_OUT0B_IDX                167
+#define PWM0_CAP2_IN_IDX              168
+#define PWM1_OUT1A_IDX                168
+#define PWM1_SYNC0_IN_IDX             169
+#define PWM1_OUT1B_IDX                169
+#define PWM1_SYNC1_IN_IDX             170
+#define PWM1_OUT2A_IDX                170
+#define PWM1_SYNC2_IN_IDX             171
+#define PWM1_OUT2B_IDX                171
+#define PWM1_F0_IN_IDX                172
+#define SDHOST_CCLK_OUT_1_IDX         172
+#define PWM1_F1_IN_IDX                173
+#define SDHOST_CCLK_OUT_2_IDX         173
+#define PWM1_F2_IN_IDX                174
+#define SDHOST_RST_N_1_IDX            174
+#define PWM1_CAP0_IN_IDX              175
+#define SDHOST_RST_N_2_IDX            175
+#define PWM1_CAP1_IN_IDX              176
+#define SDHOST_CCMD_OD_PULLUP_EN_N_IDX176
+#define PWM1_CAP2_IN_IDX              177
+#define SDIO_TOHOST_INT_OUT_IDX       177
+#define SDHOST_CCMD_IN_1_IDX          178
+#define SDHOST_CCMD_OUT_1_IDX         178
+#define SDHOST_CCMD_IN_2_IDX          179
+#define SDHOST_CCMD_OUT_2_IDX         179
+#define SDHOST_CDATA_IN_10_IDX        180
+#define SDHOST_CDATA_OUT_10_IDX       180
+#define SDHOST_CDATA_IN_11_IDX        181
+#define SDHOST_CDATA_OUT_11_IDX       181
+#define SDHOST_CDATA_IN_12_IDX        182
+#define SDHOST_CDATA_OUT_12_IDX       182
+#define SDHOST_CDATA_IN_13_IDX        183
+#define SDHOST_CDATA_OUT_13_IDX       183
+#define SDHOST_CDATA_IN_14_IDX        184
+#define SDHOST_CDATA_OUT_14_IDX       184
+#define SDHOST_CDATA_IN_15_IDX        185
+#define SDHOST_CDATA_OUT_15_IDX       185
+#define SDHOST_CDATA_IN_16_IDX        186
+#define SDHOST_CDATA_OUT_16_IDX       186
+#define SDHOST_CDATA_IN_17_IDX        187
+#define SDHOST_CDATA_OUT_17_IDX       187
+#define PCMFSYNC_IN_IDX               188
+#define BT_AUDIO0_IRQ_IDX             188
+#define PCMCLK_IN_IDX                 189
+#define BT_AUDIO1_IRQ_IDX             189
+#define PCMDIN_IDX                    190
+#define BT_AUDIO2_IRQ_IDX             190
+#define RW_WAKEUP_REQ_IDX             191
+#define BLE_AUDIO0_IRQ_IDX            191
+#define SDHOST_DATA_STROBE_1_IDX      192
+#define BLE_AUDIO1_IRQ_IDX            192
+#define SDHOST_DATA_STROBE_2_IDX      193
+#define BLE_AUDIO2_IRQ_IDX            193
+#define SDHOST_CARD_DETECT_N_1_IDX    194
+#define PCMFSYNC_OUT_IDX              194
+#define SDHOST_CARD_DETECT_N_2_IDX    195
+#define PCMCLK_OUT_IDX                195
+#define SDHOST_CARD_WRITE_PRT_1_IDX   196
+#define PCMDOUT_IDX                   196
+#define SDHOST_CARD_WRITE_PRT_2_IDX   197
+#define BLE_AUDIO_SYNC0_P_IDX         197
+#define SDHOST_CARD_INT_N_1_IDX       198
+#define BLE_AUDIO_SYNC1_P_IDX         198
+#define SDHOST_CARD_INT_N_2_IDX       199
+#define BLE_AUDIO_SYNC2_P_IDX         199
+#define ANT_SEL0_IDX                  200
+#define ANT_SEL1_IDX                  201
+#define ANT_SEL2_IDX                  202
+#define ANT_SEL3_IDX                  203
+#define ANT_SEL4_IDX                  204
+#define ANT_SEL5_IDX                  205
+#define ANT_SEL6_IDX                  206
+#define ANT_SEL7_IDX                  207
+#define SIG_IN_FUNC_208_IDX           208
+#define SIG_IN_FUNC208_IDX            208
+#define SIG_IN_FUNC_209_IDX           209
+#define SIG_IN_FUNC209_IDX            209
+#define SIG_IN_FUNC_210_IDX           210
+#define SIG_IN_FUNC210_IDX            210
+#define SIG_IN_FUNC_211_IDX           211
+#define SIG_IN_FUNC211_IDX            211
+#define SIG_IN_FUNC_212_IDX           212
+#define SIG_IN_FUNC212_IDX            212
+#define SDHOST_CDATA_IN_20_IDX        213
+#define SDHOST_CDATA_OUT_20_IDX       213
+#define SDHOST_CDATA_IN_21_IDX        214
+#define SDHOST_CDATA_OUT_21_IDX       214
+#define SDHOST_CDATA_IN_22_IDX        215
+#define SDHOST_CDATA_OUT_22_IDX       215
+#define SDHOST_CDATA_IN_23_IDX        216
+#define SDHOST_CDATA_OUT_23_IDX       216
+#define SDHOST_CDATA_IN_24_IDX        217
+#define SDHOST_CDATA_OUT_24_IDX       217
+#define SDHOST_CDATA_IN_25_IDX        218
+#define SDHOST_CDATA_OUT_25_IDX       218
+#define SDHOST_CDATA_IN_26_IDX        219
+#define SDHOST_CDATA_OUT_26_IDX       219
+#define SDHOST_CDATA_IN_27_IDX        220
+#define SDHOST_CDATA_OUT_27_IDX       220
+#define PRO_ALONEGPIO_IN0_IDX         221
+#define PRO_ALONEGPIO_OUT0_IDX        221
+#define PRO_ALONEGPIO_IN1_IDX         222
+#define PRO_ALONEGPIO_OUT1_IDX        222
+#define PRO_ALONEGPIO_IN2_IDX         223
+#define PRO_ALONEGPIO_OUT2_IDX        223
+#define PRO_ALONEGPIO_IN3_IDX         224
+#define PRO_ALONEGPIO_OUT3_IDX        224
+#define PRO_ALONEGPIO_IN4_IDX         225
+#define PRO_ALONEGPIO_OUT4_IDX        225
+#define PRO_ALONEGPIO_IN5_IDX         226
+#define PRO_ALONEGPIO_OUT5_IDX        226
+#define PRO_ALONEGPIO_IN6_IDX         227
+#define PRO_ALONEGPIO_OUT6_IDX        227
+#define PRO_ALONEGPIO_IN7_IDX         228
+#define PRO_ALONEGPIO_OUT7_IDX        228
+#define SYNCERR_IDX                   229
+#define SYNCFOUND_FLAG_IDX            230
+#define EVT_CNTL_IMMEDIATE_ABORT_IDX  231
+#define LINKLBL_IDX                   232
+#define DATA_EN_IDX                   233
+#define DATA_IDX                      234
+#define PKT_TX_ON_IDX                 235
+#define PKT_RX_ON_IDX                 236
+#define RW_TX_ON_IDX                  237
+#define RW_RX_ON_IDX                  238
+#define EVT_REQ_P_IDX                 239
+#define EVT_STOP_P_IDX                240
+#define BT_MODE_ON_IDX                241
+#define GPIO_LC_DIAG0_IDX             242
+#define GPIO_LC_DIAG1_IDX             243
+#define GPIO_LC_DIAG2_IDX             244
+#define CH_IDX_IDX                    245
+#define RX_WINDOW_IDX                 246
+#define UPDATE_RX_IDX                 247
+#define RX_STATUS_IDX                 248
+#define CLK_GPIO_IDX                  249
+#define NBT_BLE_IDX                   250
+#define USB_JTAG_TDO_BRIDGE_IDX       251
+#define USB_JTAG_TRST_IDX             251
+#define CORE1_GPIO_IN3_IDX            252
+#define CORE1_GPIO_OUT3_IDX           252
+#define CORE1_GPIO_IN4_IDX            253
+#define CORE1_GPIO_OUT4_IDX           253
+#define CORE1_GPIO_IN5_IDX            254
+#define CORE1_GPIO_OUT5_IDX           254
+#define CORE1_GPIO_IN6_IDX            255
+#define CORE1_GPIO_OUT6_IDX           255
+#define SIG_GPIO_OUT_IDX              256
+#define GPIO_MAP_DATE_IDX             0x1907040
+#endif  /* _SOC_GPIO_SIG_MAP_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_struct.h
new file mode 100644
index 00000000000..8aaebc31ba3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/gpio_struct.h
@@ -0,0 +1,250 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _SOC_GPIO_STRUCT_H_
+#define _SOC_GPIO_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct gpio_dev_s {
+    uint32_t bt_select;
+    uint32_t out;
+    uint32_t out_w1ts;
+    uint32_t out_w1tc;
+    union {
+        struct {
+            uint32_t data                          :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } out1;
+    union {
+        struct {
+            uint32_t data                          :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } out1_w1ts;
+    union {
+        struct {
+            uint32_t data                          :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } out1_w1tc;
+    union {
+        struct {
+            uint32_t sel                           :    8;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } sdio_select;
+    uint32_t enable;
+    uint32_t enable_w1ts;
+    uint32_t enable_w1tc;
+    union {
+        struct {
+            uint32_t data                          :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } enable1;
+    union {
+        struct {
+            uint32_t data                          :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } enable1_w1ts;
+    union {
+        struct {
+            uint32_t data                          :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } enable1_w1tc;
+    union {
+        struct {
+            uint32_t strapping                     :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } strap;
+    uint32_t in;
+    union {
+        struct {
+            uint32_t data                          :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } in1;
+    uint32_t status;
+    uint32_t status_w1ts;
+    uint32_t status_w1tc;
+    union {
+        struct {
+            uint32_t intr_st                       :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } status1;
+    union {
+        struct {
+            uint32_t intr_st                       :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } status1_w1ts;
+    union {
+        struct {
+            uint32_t intr_st                       :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } status1_w1tc;
+    uint32_t pcpu_int;                                            /*GPIO0~31 PRO & APP CPU interrupt status*/
+    uint32_t pcpu_nmi_int;                                        /*GPIO0~31 PRO & APP CPU non-maskable interrupt status*/
+    uint32_t cpusdio_int;
+    union {
+        struct {
+            uint32_t intr                          :    22;       /*GPIO32-48 PRO & APP CPU interrupt status*/
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } pcpu_int1;
+    union {
+        struct {
+            uint32_t intr                          :    22;       /*GPIO32-48 PRO & APP CPU non-maskable interrupt status*/
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } pcpu_nmi_int1;
+    union {
+        struct {
+            uint32_t intr                          :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } cpusdio_int1;
+    union {
+        struct {
+            uint32_t sync2_bypass                  :    2;
+            uint32_t pad_driver                    :    1;
+            uint32_t sync1_bypass                  :    2;
+            uint32_t reserved5                     :    2;
+            uint32_t int_type                      :    3;
+            uint32_t wakeup_enable                 :    1;
+            uint32_t config                        :    2;
+            uint32_t int_ena                       :    5;
+            uint32_t reserved18                    :    14;
+        };
+        uint32_t val;
+    } pin[54];
+    uint32_t status_next;
+    union {
+        struct {
+            uint32_t intr_st_next                  :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } status_next1;
+    union {
+        struct {
+            uint32_t func_sel                      :    6;
+            uint32_t sig_in_inv                    :    1;
+            uint32_t sig_in_sel                    :    1;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } func_in_sel_cfg[256];
+    union {
+        struct {
+            uint32_t func_sel                      :    9;
+            uint32_t inv_sel                       :    1;
+            uint32_t oen_sel                       :    1;
+            uint32_t oen_inv_sel                   :    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } func_out_sel_cfg[54];
+    union {
+        struct {
+            uint32_t clk_en                        :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } clock_gate;
+    uint32_t reserved_630;
+    uint32_t reserved_634;
+    uint32_t reserved_638;
+    uint32_t reserved_63c;
+    uint32_t reserved_640;
+    uint32_t reserved_644;
+    uint32_t reserved_648;
+    uint32_t reserved_64c;
+    uint32_t reserved_650;
+    uint32_t reserved_654;
+    uint32_t reserved_658;
+    uint32_t reserved_65c;
+    uint32_t reserved_660;
+    uint32_t reserved_664;
+    uint32_t reserved_668;
+    uint32_t reserved_66c;
+    uint32_t reserved_670;
+    uint32_t reserved_674;
+    uint32_t reserved_678;
+    uint32_t reserved_67c;
+    uint32_t reserved_680;
+    uint32_t reserved_684;
+    uint32_t reserved_688;
+    uint32_t reserved_68c;
+    uint32_t reserved_690;
+    uint32_t reserved_694;
+    uint32_t reserved_698;
+    uint32_t reserved_69c;
+    uint32_t reserved_6a0;
+    uint32_t reserved_6a4;
+    uint32_t reserved_6a8;
+    uint32_t reserved_6ac;
+    uint32_t reserved_6b0;
+    uint32_t reserved_6b4;
+    uint32_t reserved_6b8;
+    uint32_t reserved_6bc;
+    uint32_t reserved_6c0;
+    uint32_t reserved_6c4;
+    uint32_t reserved_6c8;
+    uint32_t reserved_6cc;
+    uint32_t reserved_6d0;
+    uint32_t reserved_6d4;
+    uint32_t reserved_6d8;
+    uint32_t reserved_6dc;
+    uint32_t reserved_6e0;
+    uint32_t reserved_6e4;
+    uint32_t reserved_6e8;
+    uint32_t reserved_6ec;
+    uint32_t reserved_6f0;
+    uint32_t reserved_6f4;
+    uint32_t reserved_6f8;
+    union {
+        struct {
+            uint32_t date                          :    28;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } date;
+} gpio_dev_t;
+extern gpio_dev_t GPIO;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_GPIO_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/hinf_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/hinf_reg.h
new file mode 100644
index 00000000000..212fe817ca2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/hinf_reg.h
@@ -0,0 +1,240 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "soc.h"
+
+#define HINF_CFG_DATA0_REG (DR_REG_HINF_BASE + 0x0)
+/* HINF_DEVICE_ID_FN1 : R/W ;bitpos:[31:16] ;default: 16'h2222 ; */
+/*description: */
+#define HINF_DEVICE_ID_FN1 0x0000FFFF
+#define HINF_DEVICE_ID_FN1_M ((HINF_DEVICE_ID_FN1_V) << (HINF_DEVICE_ID_FN1_S))
+#define HINF_DEVICE_ID_FN1_V 0xFFFF
+#define HINF_DEVICE_ID_FN1_S 16
+/* HINF_USER_ID_FN1 : R/W ;bitpos:[15:0] ;default: 16'h6666 ; */
+/*description: */
+#define HINF_USER_ID_FN1 0x0000FFFF
+#define HINF_USER_ID_FN1_M ((HINF_USER_ID_FN1_V) << (HINF_USER_ID_FN1_S))
+#define HINF_USER_ID_FN1_V 0xFFFF
+#define HINF_USER_ID_FN1_S 0
+
+#define HINF_CFG_DATA1_REG (DR_REG_HINF_BASE + 0x4)
+/* HINF_SDIO20_CONF1 : R/W ;bitpos:[31:29] ;default: 3'h0 ; */
+/*description: */
+#define HINF_SDIO20_CONF1 0x00000007
+#define HINF_SDIO20_CONF1_M ((HINF_SDIO20_CONF1_V) << (HINF_SDIO20_CONF1_S))
+#define HINF_SDIO20_CONF1_V 0x7
+#define HINF_SDIO20_CONF1_S 29
+/* HINF_FUNC2_EPS : RO ;bitpos:[28] ;default: 1'b0 ; */
+/*description: */
+#define HINF_FUNC2_EPS (BIT(28))
+#define HINF_FUNC2_EPS_M (BIT(28))
+#define HINF_FUNC2_EPS_V 0x1
+#define HINF_FUNC2_EPS_S 28
+/* HINF_SDIO_VER : R/W ;bitpos:[27:16] ;default: 12'h111 ; */
+/*description: */
+#define HINF_SDIO_VER 0x00000FFF
+#define HINF_SDIO_VER_M ((HINF_SDIO_VER_V) << (HINF_SDIO_VER_S))
+#define HINF_SDIO_VER_V 0xFFF
+#define HINF_SDIO_VER_S 16
+/* HINF_SDIO20_CONF0 : R/W ;bitpos:[15:12] ;default: 4'b0 ; */
+/*description: */
+#define HINF_SDIO20_CONF0 0x0000000F
+#define HINF_SDIO20_CONF0_M ((HINF_SDIO20_CONF0_V) << (HINF_SDIO20_CONF0_S))
+#define HINF_SDIO20_CONF0_V 0xF
+#define HINF_SDIO20_CONF0_S 12
+/* HINF_IOENABLE1 : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: */
+#define HINF_IOENABLE1 (BIT(11))
+#define HINF_IOENABLE1_M (BIT(11))
+#define HINF_IOENABLE1_V 0x1
+#define HINF_IOENABLE1_S 11
+/* HINF_EMP : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: */
+#define HINF_EMP (BIT(10))
+#define HINF_EMP_M (BIT(10))
+#define HINF_EMP_V 0x1
+#define HINF_EMP_S 10
+/* HINF_FUNC1_EPS : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: */
+#define HINF_FUNC1_EPS (BIT(9))
+#define HINF_FUNC1_EPS_M (BIT(9))
+#define HINF_FUNC1_EPS_V 0x1
+#define HINF_FUNC1_EPS_S 9
+/* HINF_CD_DISABLE : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: */
+#define HINF_CD_DISABLE (BIT(8))
+#define HINF_CD_DISABLE_M (BIT(8))
+#define HINF_CD_DISABLE_V 0x1
+#define HINF_CD_DISABLE_S 8
+/* HINF_IOENABLE2 : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: */
+#define HINF_IOENABLE2 (BIT(7))
+#define HINF_IOENABLE2_M (BIT(7))
+#define HINF_IOENABLE2_V 0x1
+#define HINF_IOENABLE2_S 7
+/* HINF_SDIO_INT_MASK : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: */
+#define HINF_SDIO_INT_MASK (BIT(6))
+#define HINF_SDIO_INT_MASK_M (BIT(6))
+#define HINF_SDIO_INT_MASK_V 0x1
+#define HINF_SDIO_INT_MASK_S 6
+/* HINF_SDIO_IOREADY2 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: */
+#define HINF_SDIO_IOREADY2 (BIT(5))
+#define HINF_SDIO_IOREADY2_M (BIT(5))
+#define HINF_SDIO_IOREADY2_V 0x1
+#define HINF_SDIO_IOREADY2_S 5
+/* HINF_SDIO_CD_ENABLE : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: */
+#define HINF_SDIO_CD_ENABLE (BIT(4))
+#define HINF_SDIO_CD_ENABLE_M (BIT(4))
+#define HINF_SDIO_CD_ENABLE_V 0x1
+#define HINF_SDIO_CD_ENABLE_S 4
+/* HINF_HIGHSPEED_MODE : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define HINF_HIGHSPEED_MODE (BIT(3))
+#define HINF_HIGHSPEED_MODE_M (BIT(3))
+#define HINF_HIGHSPEED_MODE_V 0x1
+#define HINF_HIGHSPEED_MODE_S 3
+/* HINF_HIGHSPEED_ENABLE : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define HINF_HIGHSPEED_ENABLE (BIT(2))
+#define HINF_HIGHSPEED_ENABLE_M (BIT(2))
+#define HINF_HIGHSPEED_ENABLE_V 0x1
+#define HINF_HIGHSPEED_ENABLE_S 2
+/* HINF_SDIO_IOREADY1 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: */
+#define HINF_SDIO_IOREADY1 (BIT(1))
+#define HINF_SDIO_IOREADY1_M (BIT(1))
+#define HINF_SDIO_IOREADY1_V 0x1
+#define HINF_SDIO_IOREADY1_S 1
+/* HINF_SDIO_ENABLE : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: */
+#define HINF_SDIO_ENABLE (BIT(0))
+#define HINF_SDIO_ENABLE_M (BIT(0))
+#define HINF_SDIO_ENABLE_V 0x1
+#define HINF_SDIO_ENABLE_S 0
+
+#define HINF_CFG_DATA7_REG (DR_REG_HINF_BASE + 0x1C)
+/* HINF_SDIO_IOREADY0 : R/W ;bitpos:[17] ;default: 1'b1 ; */
+/*description: */
+#define HINF_SDIO_IOREADY0 (BIT(17))
+#define HINF_SDIO_IOREADY0_M (BIT(17))
+#define HINF_SDIO_IOREADY0_V 0x1
+#define HINF_SDIO_IOREADY0_S 17
+/* HINF_SDIO_RST : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define HINF_SDIO_RST (BIT(16))
+#define HINF_SDIO_RST_M (BIT(16))
+#define HINF_SDIO_RST_V 0x1
+#define HINF_SDIO_RST_S 16
+/* HINF_CHIP_STATE : R/W ;bitpos:[15:8] ;default: 8'b0 ; */
+/*description: */
+#define HINF_CHIP_STATE 0x000000FF
+#define HINF_CHIP_STATE_M ((HINF_CHIP_STATE_V) << (HINF_CHIP_STATE_S))
+#define HINF_CHIP_STATE_V 0xFF
+#define HINF_CHIP_STATE_S 8
+/* HINF_PIN_STATE : R/W ;bitpos:[7:0] ;default: 8'b0 ; */
+/*description: */
+#define HINF_PIN_STATE 0x000000FF
+#define HINF_PIN_STATE_M ((HINF_PIN_STATE_V) << (HINF_PIN_STATE_S))
+#define HINF_PIN_STATE_V 0xFF
+#define HINF_PIN_STATE_S 0
+
+#define HINF_CIS_CONF0_REG (DR_REG_HINF_BASE + 0x20)
+/* HINF_CIS_CONF_W0 : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: */
+#define HINF_CIS_CONF_W0 0xFFFFFFFF
+#define HINF_CIS_CONF_W0_M ((HINF_CIS_CONF_W0_V) << (HINF_CIS_CONF_W0_S))
+#define HINF_CIS_CONF_W0_V 0xFFFFFFFF
+#define HINF_CIS_CONF_W0_S 0
+
+#define HINF_CIS_CONF1_REG (DR_REG_HINF_BASE + 0x24)
+/* HINF_CIS_CONF_W1 : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: */
+#define HINF_CIS_CONF_W1 0xFFFFFFFF
+#define HINF_CIS_CONF_W1_M ((HINF_CIS_CONF_W1_V) << (HINF_CIS_CONF_W1_S))
+#define HINF_CIS_CONF_W1_V 0xFFFFFFFF
+#define HINF_CIS_CONF_W1_S 0
+
+#define HINF_CIS_CONF2_REG (DR_REG_HINF_BASE + 0x28)
+/* HINF_CIS_CONF_W2 : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: */
+#define HINF_CIS_CONF_W2 0xFFFFFFFF
+#define HINF_CIS_CONF_W2_M ((HINF_CIS_CONF_W2_V) << (HINF_CIS_CONF_W2_S))
+#define HINF_CIS_CONF_W2_V 0xFFFFFFFF
+#define HINF_CIS_CONF_W2_S 0
+
+#define HINF_CIS_CONF3_REG (DR_REG_HINF_BASE + 0x2C)
+/* HINF_CIS_CONF_W3 : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: */
+#define HINF_CIS_CONF_W3 0xFFFFFFFF
+#define HINF_CIS_CONF_W3_M ((HINF_CIS_CONF_W3_V) << (HINF_CIS_CONF_W3_S))
+#define HINF_CIS_CONF_W3_V 0xFFFFFFFF
+#define HINF_CIS_CONF_W3_S 0
+
+#define HINF_CIS_CONF4_REG (DR_REG_HINF_BASE + 0x30)
+/* HINF_CIS_CONF_W4 : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: */
+#define HINF_CIS_CONF_W4 0xFFFFFFFF
+#define HINF_CIS_CONF_W4_M ((HINF_CIS_CONF_W4_V) << (HINF_CIS_CONF_W4_S))
+#define HINF_CIS_CONF_W4_V 0xFFFFFFFF
+#define HINF_CIS_CONF_W4_S 0
+
+#define HINF_CIS_CONF5_REG (DR_REG_HINF_BASE + 0x34)
+/* HINF_CIS_CONF_W5 : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: */
+#define HINF_CIS_CONF_W5 0xFFFFFFFF
+#define HINF_CIS_CONF_W5_M ((HINF_CIS_CONF_W5_V) << (HINF_CIS_CONF_W5_S))
+#define HINF_CIS_CONF_W5_V 0xFFFFFFFF
+#define HINF_CIS_CONF_W5_S 0
+
+#define HINF_CIS_CONF6_REG (DR_REG_HINF_BASE + 0x38)
+/* HINF_CIS_CONF_W6 : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: */
+#define HINF_CIS_CONF_W6 0xFFFFFFFF
+#define HINF_CIS_CONF_W6_M ((HINF_CIS_CONF_W6_V) << (HINF_CIS_CONF_W6_S))
+#define HINF_CIS_CONF_W6_V 0xFFFFFFFF
+#define HINF_CIS_CONF_W6_S 0
+
+#define HINF_CIS_CONF7_REG (DR_REG_HINF_BASE + 0x3C)
+/* HINF_CIS_CONF_W7 : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: */
+#define HINF_CIS_CONF_W7 0xFFFFFFFF
+#define HINF_CIS_CONF_W7_M ((HINF_CIS_CONF_W7_V) << (HINF_CIS_CONF_W7_S))
+#define HINF_CIS_CONF_W7_V 0xFFFFFFFF
+#define HINF_CIS_CONF_W7_S 0
+
+#define HINF_CFG_DATA16_REG (DR_REG_HINF_BASE + 0x40)
+/* HINF_DEVICE_ID_FN2 : R/W ;bitpos:[31:16] ;default: 16'h3333 ; */
+/*description: */
+#define HINF_DEVICE_ID_FN2 0x0000FFFF
+#define HINF_DEVICE_ID_FN2_M ((HINF_DEVICE_ID_FN2_V) << (HINF_DEVICE_ID_FN2_S))
+#define HINF_DEVICE_ID_FN2_V 0xFFFF
+#define HINF_DEVICE_ID_FN2_S 16
+/* HINF_USER_ID_FN2 : R/W ;bitpos:[15:0] ;default: 16'h6666 ; */
+/*description: */
+#define HINF_USER_ID_FN2 0x0000FFFF
+#define HINF_USER_ID_FN2_M ((HINF_USER_ID_FN2_V) << (HINF_USER_ID_FN2_S))
+#define HINF_USER_ID_FN2_V 0xFFFF
+#define HINF_USER_ID_FN2_S 0
+
+#define HINF_DATE_REG (DR_REG_HINF_BASE + 0xFC)
+/* HINF_SDIO_DATE : R/W ;bitpos:[31:0] ;default: 32'h15030200 ; */
+/*description: */
+#define HINF_SDIO_DATE 0xFFFFFFFF
+#define HINF_SDIO_DATE_M ((HINF_SDIO_DATE_V) << (HINF_SDIO_DATE_S))
+#define HINF_SDIO_DATE_V 0xFFFFFFFF
+#define HINF_SDIO_DATE_S 0
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/hinf_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/hinf_struct.h
new file mode 100644
index 00000000000..965f8bd43c1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/hinf_struct.h
@@ -0,0 +1,135 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+typedef volatile struct hinf_dev_s {
+    union {
+        struct {
+            uint32_t user_id_fn1:  16;
+            uint32_t device_id_fn1: 16;
+        };
+        uint32_t val;
+    } cfg_data0;
+    union {
+        struct {
+            uint32_t sdio_enable:      1;
+            uint32_t sdio_ioready1:    1;
+            uint32_t highspeed_enable: 1;
+            uint32_t highspeed_mode:   1;
+            uint32_t sdio_cd_enable:   1;
+            uint32_t sdio_ioready2:    1;
+            uint32_t sdio_int_mask:    1;
+            uint32_t ioenable2:        1;
+            uint32_t cd_disable:       1;
+            uint32_t func1_eps:        1;
+            uint32_t emp:              1;
+            uint32_t ioenable1:        1;
+            uint32_t sdio20_conf0:     4;
+            uint32_t sdio_ver:        12;
+            uint32_t func2_eps:        1;
+            uint32_t sdio20_conf1:     3;
+        };
+        uint32_t val;
+    } cfg_data1;
+    uint32_t reserved_8;
+    uint32_t reserved_c;
+    uint32_t reserved_10;
+    uint32_t reserved_14;
+    uint32_t reserved_18;
+    union {
+        struct {
+            uint32_t pin_state:     8;
+            uint32_t chip_state:    8;
+            uint32_t sdio_rst:      1;
+            uint32_t sdio_ioready0: 1;
+            uint32_t reserved18:   14;
+        };
+        uint32_t val;
+    } cfg_data7;
+    uint32_t cis_conf0;                     /**/
+    uint32_t cis_conf1;                     /**/
+    uint32_t cis_conf2;                     /**/
+    uint32_t cis_conf3;                     /**/
+    uint32_t cis_conf4;                     /**/
+    uint32_t cis_conf5;                     /**/
+    uint32_t cis_conf6;                     /**/
+    uint32_t cis_conf7;                     /**/
+    union {
+        struct {
+            uint32_t user_id_fn2:  16;
+            uint32_t device_id_fn2: 16;
+        };
+        uint32_t val;
+    } cfg_data16;
+    uint32_t reserved_44;
+    uint32_t reserved_48;
+    uint32_t reserved_4c;
+    uint32_t reserved_50;
+    uint32_t reserved_54;
+    uint32_t reserved_58;
+    uint32_t reserved_5c;
+    uint32_t reserved_60;
+    uint32_t reserved_64;
+    uint32_t reserved_68;
+    uint32_t reserved_6c;
+    uint32_t reserved_70;
+    uint32_t reserved_74;
+    uint32_t reserved_78;
+    uint32_t reserved_7c;
+    uint32_t reserved_80;
+    uint32_t reserved_84;
+    uint32_t reserved_88;
+    uint32_t reserved_8c;
+    uint32_t reserved_90;
+    uint32_t reserved_94;
+    uint32_t reserved_98;
+    uint32_t reserved_9c;
+    uint32_t reserved_a0;
+    uint32_t reserved_a4;
+    uint32_t reserved_a8;
+    uint32_t reserved_ac;
+    uint32_t reserved_b0;
+    uint32_t reserved_b4;
+    uint32_t reserved_b8;
+    uint32_t reserved_bc;
+    uint32_t reserved_c0;
+    uint32_t reserved_c4;
+    uint32_t reserved_c8;
+    uint32_t reserved_cc;
+    uint32_t reserved_d0;
+    uint32_t reserved_d4;
+    uint32_t reserved_d8;
+    uint32_t reserved_dc;
+    uint32_t reserved_e0;
+    uint32_t reserved_e4;
+    uint32_t reserved_e8;
+    uint32_t reserved_ec;
+    uint32_t reserved_f0;
+    uint32_t reserved_f4;
+    uint32_t reserved_f8;
+    uint32_t date;                          /**/
+} hinf_dev_t;
+
+extern hinf_dev_t HINF;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/host_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/host_reg.h
new file mode 100644
index 00000000000..afcd67d85f2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/host_reg.h
@@ -0,0 +1,1804 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_HOST_REG_H_
+#define _SOC_HOST_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define HOST_SLCHOST_FUNC2_2_REG          (DR_REG_SLCHOST_BASE + 0x20)
+/* HOST_SLC_FUNC1_MDSTAT : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define HOST_SLC_FUNC1_MDSTAT    (BIT(0))
+#define HOST_SLC_FUNC1_MDSTAT_M  (BIT(0))
+#define HOST_SLC_FUNC1_MDSTAT_V  0x1
+#define HOST_SLC_FUNC1_MDSTAT_S  0
+
+#define HOST_SLCHOST_GPIO_STATUS0_REG          (DR_REG_SLCHOST_BASE + 0x34)
+/* HOST_GPIO_SDIO_INT0 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define HOST_GPIO_SDIO_INT0    0xFFFFFFFF
+#define HOST_GPIO_SDIO_INT0_M  ((HOST_GPIO_SDIO_INT0_V)<<(HOST_GPIO_SDIO_INT0_S))
+#define HOST_GPIO_SDIO_INT0_V  0xFFFFFFFF
+#define HOST_GPIO_SDIO_INT0_S  0
+
+#define HOST_SLCHOST_GPIO_STATUS1_REG          (DR_REG_SLCHOST_BASE + 0x38)
+/* HOST_GPIO_SDIO_INT1 : RO ;bitpos:[21:0] ;default: 22'b0 ; */
+/*description: .*/
+#define HOST_GPIO_SDIO_INT1    0x003FFFFF
+#define HOST_GPIO_SDIO_INT1_M  ((HOST_GPIO_SDIO_INT1_V)<<(HOST_GPIO_SDIO_INT1_S))
+#define HOST_GPIO_SDIO_INT1_V  0x3FFFFF
+#define HOST_GPIO_SDIO_INT1_S  0
+
+#define HOST_SLCHOST_GPIO_IN0_REG          (DR_REG_SLCHOST_BASE + 0x3C)
+/* HOST_GPIO_SDIO_IN0 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define HOST_GPIO_SDIO_IN0    0xFFFFFFFF
+#define HOST_GPIO_SDIO_IN0_M  ((HOST_GPIO_SDIO_IN0_V)<<(HOST_GPIO_SDIO_IN0_S))
+#define HOST_GPIO_SDIO_IN0_V  0xFFFFFFFF
+#define HOST_GPIO_SDIO_IN0_S  0
+
+#define HOST_SLCHOST_GPIO_IN1_REG          (DR_REG_SLCHOST_BASE + 0x40)
+/* HOST_GPIO_SDIO_IN1 : RO ;bitpos:[21:0] ;default: 22'b0 ; */
+/*description: .*/
+#define HOST_GPIO_SDIO_IN1    0x003FFFFF
+#define HOST_GPIO_SDIO_IN1_M  ((HOST_GPIO_SDIO_IN1_V)<<(HOST_GPIO_SDIO_IN1_S))
+#define HOST_GPIO_SDIO_IN1_V  0x3FFFFF
+#define HOST_GPIO_SDIO_IN1_S  0
+
+#define HOST_SLC0HOST_TOKEN_RDATA_REG          (DR_REG_SLCHOST_BASE + 0x44)
+/* HOST_SLC0_RX_PF_EOF : RO ;bitpos:[31:28] ;default: 4'h0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_PF_EOF    0x0000000F
+#define HOST_SLC0_RX_PF_EOF_M  ((HOST_SLC0_RX_PF_EOF_V)<<(HOST_SLC0_RX_PF_EOF_S))
+#define HOST_SLC0_RX_PF_EOF_V  0xF
+#define HOST_SLC0_RX_PF_EOF_S  28
+/* HOST_HOSTSLC0_TOKEN1 : RO ;bitpos:[27:16] ;default: 12'h0 ; */
+/*description: .*/
+#define HOST_HOSTSLC0_TOKEN1    0x00000FFF
+#define HOST_HOSTSLC0_TOKEN1_M  ((HOST_HOSTSLC0_TOKEN1_V)<<(HOST_HOSTSLC0_TOKEN1_S))
+#define HOST_HOSTSLC0_TOKEN1_V  0xFFF
+#define HOST_HOSTSLC0_TOKEN1_S  16
+/* HOST_SLC0_RX_PF_VALID : RO ;bitpos:[12] ;default: 4'h0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_PF_VALID    (BIT(12))
+#define HOST_SLC0_RX_PF_VALID_M  (BIT(12))
+#define HOST_SLC0_RX_PF_VALID_V  0x1
+#define HOST_SLC0_RX_PF_VALID_S  12
+/* HOST_SLC0_TOKEN0 : RO ;bitpos:[11:0] ;default: 12'h0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN0    0x00000FFF
+#define HOST_SLC0_TOKEN0_M  ((HOST_SLC0_TOKEN0_V)<<(HOST_SLC0_TOKEN0_S))
+#define HOST_SLC0_TOKEN0_V  0xFFF
+#define HOST_SLC0_TOKEN0_S  0
+
+#define HOST_SLC0_HOST_PF_REG          (DR_REG_SLCHOST_BASE + 0x48)
+/* HOST_SLC0_PF_DATA : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define HOST_SLC0_PF_DATA    0xFFFFFFFF
+#define HOST_SLC0_PF_DATA_M  ((HOST_SLC0_PF_DATA_V)<<(HOST_SLC0_PF_DATA_S))
+#define HOST_SLC0_PF_DATA_V  0xFFFFFFFF
+#define HOST_SLC0_PF_DATA_S  0
+
+#define HOST_SLC0HOST_INT_RAW_REG          (DR_REG_SLCHOST_BASE + 0x50)
+/* HOST_GPIO_SDIO_INT_RAW : RO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_GPIO_SDIO_INT_RAW    (BIT(25))
+#define HOST_GPIO_SDIO_INT_RAW_M  (BIT(25))
+#define HOST_GPIO_SDIO_INT_RAW_V  0x1
+#define HOST_GPIO_SDIO_INT_RAW_S  25
+/* HOST_SLC0_HOST_RD_RETRY_INT_RAW : RO ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_HOST_RD_RETRY_INT_RAW    (BIT(24))
+#define HOST_SLC0_HOST_RD_RETRY_INT_RAW_M  (BIT(24))
+#define HOST_SLC0_HOST_RD_RETRY_INT_RAW_V  0x1
+#define HOST_SLC0_HOST_RD_RETRY_INT_RAW_S  24
+/* HOST_SLC0_RX_NEW_PACKET_INT_RAW : RO ;bitpos:[23] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_NEW_PACKET_INT_RAW    (BIT(23))
+#define HOST_SLC0_RX_NEW_PACKET_INT_RAW_M  (BIT(23))
+#define HOST_SLC0_RX_NEW_PACKET_INT_RAW_V  0x1
+#define HOST_SLC0_RX_NEW_PACKET_INT_RAW_S  23
+/* HOST_SLC0_EXT_BIT3_INT_RAW : RO ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT3_INT_RAW    (BIT(22))
+#define HOST_SLC0_EXT_BIT3_INT_RAW_M  (BIT(22))
+#define HOST_SLC0_EXT_BIT3_INT_RAW_V  0x1
+#define HOST_SLC0_EXT_BIT3_INT_RAW_S  22
+/* HOST_SLC0_EXT_BIT2_INT_RAW : RO ;bitpos:[21] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT2_INT_RAW    (BIT(21))
+#define HOST_SLC0_EXT_BIT2_INT_RAW_M  (BIT(21))
+#define HOST_SLC0_EXT_BIT2_INT_RAW_V  0x1
+#define HOST_SLC0_EXT_BIT2_INT_RAW_S  21
+/* HOST_SLC0_EXT_BIT1_INT_RAW : RO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT1_INT_RAW    (BIT(20))
+#define HOST_SLC0_EXT_BIT1_INT_RAW_M  (BIT(20))
+#define HOST_SLC0_EXT_BIT1_INT_RAW_V  0x1
+#define HOST_SLC0_EXT_BIT1_INT_RAW_S  20
+/* HOST_SLC0_EXT_BIT0_INT_RAW : RO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT0_INT_RAW    (BIT(19))
+#define HOST_SLC0_EXT_BIT0_INT_RAW_M  (BIT(19))
+#define HOST_SLC0_EXT_BIT0_INT_RAW_V  0x1
+#define HOST_SLC0_EXT_BIT0_INT_RAW_S  19
+/* HOST_SLC0_RX_PF_VALID_INT_RAW : RO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_PF_VALID_INT_RAW    (BIT(18))
+#define HOST_SLC0_RX_PF_VALID_INT_RAW_M  (BIT(18))
+#define HOST_SLC0_RX_PF_VALID_INT_RAW_V  0x1
+#define HOST_SLC0_RX_PF_VALID_INT_RAW_S  18
+/* HOST_SLC0_TX_OVF_INT_RAW : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TX_OVF_INT_RAW    (BIT(17))
+#define HOST_SLC0_TX_OVF_INT_RAW_M  (BIT(17))
+#define HOST_SLC0_TX_OVF_INT_RAW_V  0x1
+#define HOST_SLC0_TX_OVF_INT_RAW_S  17
+/* HOST_SLC0_RX_UDF_INT_RAW : RO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_UDF_INT_RAW    (BIT(16))
+#define HOST_SLC0_RX_UDF_INT_RAW_M  (BIT(16))
+#define HOST_SLC0_RX_UDF_INT_RAW_V  0x1
+#define HOST_SLC0_RX_UDF_INT_RAW_S  16
+/* HOST_SLC0HOST_TX_START_INT_RAW : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_TX_START_INT_RAW    (BIT(15))
+#define HOST_SLC0HOST_TX_START_INT_RAW_M  (BIT(15))
+#define HOST_SLC0HOST_TX_START_INT_RAW_V  0x1
+#define HOST_SLC0HOST_TX_START_INT_RAW_S  15
+/* HOST_SLC0HOST_RX_START_INT_RAW : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_START_INT_RAW    (BIT(14))
+#define HOST_SLC0HOST_RX_START_INT_RAW_M  (BIT(14))
+#define HOST_SLC0HOST_RX_START_INT_RAW_V  0x1
+#define HOST_SLC0HOST_RX_START_INT_RAW_S  14
+/* HOST_SLC0HOST_RX_EOF_INT_RAW : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_EOF_INT_RAW    (BIT(13))
+#define HOST_SLC0HOST_RX_EOF_INT_RAW_M  (BIT(13))
+#define HOST_SLC0HOST_RX_EOF_INT_RAW_V  0x1
+#define HOST_SLC0HOST_RX_EOF_INT_RAW_S  13
+/* HOST_SLC0HOST_RX_SOF_INT_RAW : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_SOF_INT_RAW    (BIT(12))
+#define HOST_SLC0HOST_RX_SOF_INT_RAW_M  (BIT(12))
+#define HOST_SLC0HOST_RX_SOF_INT_RAW_V  0x1
+#define HOST_SLC0HOST_RX_SOF_INT_RAW_S  12
+/* HOST_SLC0_TOKEN1_0TO1_INT_RAW : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN1_0TO1_INT_RAW    (BIT(11))
+#define HOST_SLC0_TOKEN1_0TO1_INT_RAW_M  (BIT(11))
+#define HOST_SLC0_TOKEN1_0TO1_INT_RAW_V  0x1
+#define HOST_SLC0_TOKEN1_0TO1_INT_RAW_S  11
+/* HOST_SLC0_TOKEN0_0TO1_INT_RAW : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN0_0TO1_INT_RAW    (BIT(10))
+#define HOST_SLC0_TOKEN0_0TO1_INT_RAW_M  (BIT(10))
+#define HOST_SLC0_TOKEN0_0TO1_INT_RAW_V  0x1
+#define HOST_SLC0_TOKEN0_0TO1_INT_RAW_S  10
+/* HOST_SLC0_TOKEN1_1TO0_INT_RAW : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN1_1TO0_INT_RAW    (BIT(9))
+#define HOST_SLC0_TOKEN1_1TO0_INT_RAW_M  (BIT(9))
+#define HOST_SLC0_TOKEN1_1TO0_INT_RAW_V  0x1
+#define HOST_SLC0_TOKEN1_1TO0_INT_RAW_S  9
+/* HOST_SLC0_TOKEN0_1TO0_INT_RAW : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN0_1TO0_INT_RAW    (BIT(8))
+#define HOST_SLC0_TOKEN0_1TO0_INT_RAW_M  (BIT(8))
+#define HOST_SLC0_TOKEN0_1TO0_INT_RAW_V  0x1
+#define HOST_SLC0_TOKEN0_1TO0_INT_RAW_S  8
+/* HOST_SLC0_TOHOST_BIT7_INT_RAW : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT7_INT_RAW    (BIT(7))
+#define HOST_SLC0_TOHOST_BIT7_INT_RAW_M  (BIT(7))
+#define HOST_SLC0_TOHOST_BIT7_INT_RAW_V  0x1
+#define HOST_SLC0_TOHOST_BIT7_INT_RAW_S  7
+/* HOST_SLC0_TOHOST_BIT6_INT_RAW : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT6_INT_RAW    (BIT(6))
+#define HOST_SLC0_TOHOST_BIT6_INT_RAW_M  (BIT(6))
+#define HOST_SLC0_TOHOST_BIT6_INT_RAW_V  0x1
+#define HOST_SLC0_TOHOST_BIT6_INT_RAW_S  6
+/* HOST_SLC0_TOHOST_BIT5_INT_RAW : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT5_INT_RAW    (BIT(5))
+#define HOST_SLC0_TOHOST_BIT5_INT_RAW_M  (BIT(5))
+#define HOST_SLC0_TOHOST_BIT5_INT_RAW_V  0x1
+#define HOST_SLC0_TOHOST_BIT5_INT_RAW_S  5
+/* HOST_SLC0_TOHOST_BIT4_INT_RAW : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT4_INT_RAW    (BIT(4))
+#define HOST_SLC0_TOHOST_BIT4_INT_RAW_M  (BIT(4))
+#define HOST_SLC0_TOHOST_BIT4_INT_RAW_V  0x1
+#define HOST_SLC0_TOHOST_BIT4_INT_RAW_S  4
+/* HOST_SLC0_TOHOST_BIT3_INT_RAW : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT3_INT_RAW    (BIT(3))
+#define HOST_SLC0_TOHOST_BIT3_INT_RAW_M  (BIT(3))
+#define HOST_SLC0_TOHOST_BIT3_INT_RAW_V  0x1
+#define HOST_SLC0_TOHOST_BIT3_INT_RAW_S  3
+/* HOST_SLC0_TOHOST_BIT2_INT_RAW : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT2_INT_RAW    (BIT(2))
+#define HOST_SLC0_TOHOST_BIT2_INT_RAW_M  (BIT(2))
+#define HOST_SLC0_TOHOST_BIT2_INT_RAW_V  0x1
+#define HOST_SLC0_TOHOST_BIT2_INT_RAW_S  2
+/* HOST_SLC0_TOHOST_BIT1_INT_RAW : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT1_INT_RAW    (BIT(1))
+#define HOST_SLC0_TOHOST_BIT1_INT_RAW_M  (BIT(1))
+#define HOST_SLC0_TOHOST_BIT1_INT_RAW_V  0x1
+#define HOST_SLC0_TOHOST_BIT1_INT_RAW_S  1
+/* HOST_SLC0_TOHOST_BIT0_INT_RAW : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT0_INT_RAW    (BIT(0))
+#define HOST_SLC0_TOHOST_BIT0_INT_RAW_M  (BIT(0))
+#define HOST_SLC0_TOHOST_BIT0_INT_RAW_V  0x1
+#define HOST_SLC0_TOHOST_BIT0_INT_RAW_S  0
+
+#define HOST_SLC0HOST_INT_ST_REG          (DR_REG_SLCHOST_BASE + 0x58)
+/* HOST_GPIO_SDIO_INT_ST : RO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_GPIO_SDIO_INT_ST    (BIT(25))
+#define HOST_GPIO_SDIO_INT_ST_M  (BIT(25))
+#define HOST_GPIO_SDIO_INT_ST_V  0x1
+#define HOST_GPIO_SDIO_INT_ST_S  25
+/* HOST_SLC0_HOST_RD_RETRY_INT_ST : RO ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_HOST_RD_RETRY_INT_ST    (BIT(24))
+#define HOST_SLC0_HOST_RD_RETRY_INT_ST_M  (BIT(24))
+#define HOST_SLC0_HOST_RD_RETRY_INT_ST_V  0x1
+#define HOST_SLC0_HOST_RD_RETRY_INT_ST_S  24
+/* HOST_SLC0_RX_NEW_PACKET_INT_ST : RO ;bitpos:[23] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_NEW_PACKET_INT_ST    (BIT(23))
+#define HOST_SLC0_RX_NEW_PACKET_INT_ST_M  (BIT(23))
+#define HOST_SLC0_RX_NEW_PACKET_INT_ST_V  0x1
+#define HOST_SLC0_RX_NEW_PACKET_INT_ST_S  23
+/* HOST_SLC0_EXT_BIT3_INT_ST : RO ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT3_INT_ST    (BIT(22))
+#define HOST_SLC0_EXT_BIT3_INT_ST_M  (BIT(22))
+#define HOST_SLC0_EXT_BIT3_INT_ST_V  0x1
+#define HOST_SLC0_EXT_BIT3_INT_ST_S  22
+/* HOST_SLC0_EXT_BIT2_INT_ST : RO ;bitpos:[21] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT2_INT_ST    (BIT(21))
+#define HOST_SLC0_EXT_BIT2_INT_ST_M  (BIT(21))
+#define HOST_SLC0_EXT_BIT2_INT_ST_V  0x1
+#define HOST_SLC0_EXT_BIT2_INT_ST_S  21
+/* HOST_SLC0_EXT_BIT1_INT_ST : RO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT1_INT_ST    (BIT(20))
+#define HOST_SLC0_EXT_BIT1_INT_ST_M  (BIT(20))
+#define HOST_SLC0_EXT_BIT1_INT_ST_V  0x1
+#define HOST_SLC0_EXT_BIT1_INT_ST_S  20
+/* HOST_SLC0_EXT_BIT0_INT_ST : RO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT0_INT_ST    (BIT(19))
+#define HOST_SLC0_EXT_BIT0_INT_ST_M  (BIT(19))
+#define HOST_SLC0_EXT_BIT0_INT_ST_V  0x1
+#define HOST_SLC0_EXT_BIT0_INT_ST_S  19
+/* HOST_SLC0_RX_PF_VALID_INT_ST : RO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_PF_VALID_INT_ST    (BIT(18))
+#define HOST_SLC0_RX_PF_VALID_INT_ST_M  (BIT(18))
+#define HOST_SLC0_RX_PF_VALID_INT_ST_V  0x1
+#define HOST_SLC0_RX_PF_VALID_INT_ST_S  18
+/* HOST_SLC0_TX_OVF_INT_ST : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TX_OVF_INT_ST    (BIT(17))
+#define HOST_SLC0_TX_OVF_INT_ST_M  (BIT(17))
+#define HOST_SLC0_TX_OVF_INT_ST_V  0x1
+#define HOST_SLC0_TX_OVF_INT_ST_S  17
+/* HOST_SLC0_RX_UDF_INT_ST : RO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_UDF_INT_ST    (BIT(16))
+#define HOST_SLC0_RX_UDF_INT_ST_M  (BIT(16))
+#define HOST_SLC0_RX_UDF_INT_ST_V  0x1
+#define HOST_SLC0_RX_UDF_INT_ST_S  16
+/* HOST_SLC0HOST_TX_START_INT_ST : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_TX_START_INT_ST    (BIT(15))
+#define HOST_SLC0HOST_TX_START_INT_ST_M  (BIT(15))
+#define HOST_SLC0HOST_TX_START_INT_ST_V  0x1
+#define HOST_SLC0HOST_TX_START_INT_ST_S  15
+/* HOST_SLC0HOST_RX_START_INT_ST : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_START_INT_ST    (BIT(14))
+#define HOST_SLC0HOST_RX_START_INT_ST_M  (BIT(14))
+#define HOST_SLC0HOST_RX_START_INT_ST_V  0x1
+#define HOST_SLC0HOST_RX_START_INT_ST_S  14
+/* HOST_SLC0HOST_RX_EOF_INT_ST : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_EOF_INT_ST    (BIT(13))
+#define HOST_SLC0HOST_RX_EOF_INT_ST_M  (BIT(13))
+#define HOST_SLC0HOST_RX_EOF_INT_ST_V  0x1
+#define HOST_SLC0HOST_RX_EOF_INT_ST_S  13
+/* HOST_SLC0HOST_RX_SOF_INT_ST : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_SOF_INT_ST    (BIT(12))
+#define HOST_SLC0HOST_RX_SOF_INT_ST_M  (BIT(12))
+#define HOST_SLC0HOST_RX_SOF_INT_ST_V  0x1
+#define HOST_SLC0HOST_RX_SOF_INT_ST_S  12
+/* HOST_SLC0_TOKEN1_0TO1_INT_ST : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN1_0TO1_INT_ST    (BIT(11))
+#define HOST_SLC0_TOKEN1_0TO1_INT_ST_M  (BIT(11))
+#define HOST_SLC0_TOKEN1_0TO1_INT_ST_V  0x1
+#define HOST_SLC0_TOKEN1_0TO1_INT_ST_S  11
+/* HOST_SLC0_TOKEN0_0TO1_INT_ST : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN0_0TO1_INT_ST    (BIT(10))
+#define HOST_SLC0_TOKEN0_0TO1_INT_ST_M  (BIT(10))
+#define HOST_SLC0_TOKEN0_0TO1_INT_ST_V  0x1
+#define HOST_SLC0_TOKEN0_0TO1_INT_ST_S  10
+/* HOST_SLC0_TOKEN1_1TO0_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN1_1TO0_INT_ST    (BIT(9))
+#define HOST_SLC0_TOKEN1_1TO0_INT_ST_M  (BIT(9))
+#define HOST_SLC0_TOKEN1_1TO0_INT_ST_V  0x1
+#define HOST_SLC0_TOKEN1_1TO0_INT_ST_S  9
+/* HOST_SLC0_TOKEN0_1TO0_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN0_1TO0_INT_ST    (BIT(8))
+#define HOST_SLC0_TOKEN0_1TO0_INT_ST_M  (BIT(8))
+#define HOST_SLC0_TOKEN0_1TO0_INT_ST_V  0x1
+#define HOST_SLC0_TOKEN0_1TO0_INT_ST_S  8
+/* HOST_SLC0_TOHOST_BIT7_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT7_INT_ST    (BIT(7))
+#define HOST_SLC0_TOHOST_BIT7_INT_ST_M  (BIT(7))
+#define HOST_SLC0_TOHOST_BIT7_INT_ST_V  0x1
+#define HOST_SLC0_TOHOST_BIT7_INT_ST_S  7
+/* HOST_SLC0_TOHOST_BIT6_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT6_INT_ST    (BIT(6))
+#define HOST_SLC0_TOHOST_BIT6_INT_ST_M  (BIT(6))
+#define HOST_SLC0_TOHOST_BIT6_INT_ST_V  0x1
+#define HOST_SLC0_TOHOST_BIT6_INT_ST_S  6
+/* HOST_SLC0_TOHOST_BIT5_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT5_INT_ST    (BIT(5))
+#define HOST_SLC0_TOHOST_BIT5_INT_ST_M  (BIT(5))
+#define HOST_SLC0_TOHOST_BIT5_INT_ST_V  0x1
+#define HOST_SLC0_TOHOST_BIT5_INT_ST_S  5
+/* HOST_SLC0_TOHOST_BIT4_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT4_INT_ST    (BIT(4))
+#define HOST_SLC0_TOHOST_BIT4_INT_ST_M  (BIT(4))
+#define HOST_SLC0_TOHOST_BIT4_INT_ST_V  0x1
+#define HOST_SLC0_TOHOST_BIT4_INT_ST_S  4
+/* HOST_SLC0_TOHOST_BIT3_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT3_INT_ST    (BIT(3))
+#define HOST_SLC0_TOHOST_BIT3_INT_ST_M  (BIT(3))
+#define HOST_SLC0_TOHOST_BIT3_INT_ST_V  0x1
+#define HOST_SLC0_TOHOST_BIT3_INT_ST_S  3
+/* HOST_SLC0_TOHOST_BIT2_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT2_INT_ST    (BIT(2))
+#define HOST_SLC0_TOHOST_BIT2_INT_ST_M  (BIT(2))
+#define HOST_SLC0_TOHOST_BIT2_INT_ST_V  0x1
+#define HOST_SLC0_TOHOST_BIT2_INT_ST_S  2
+/* HOST_SLC0_TOHOST_BIT1_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT1_INT_ST    (BIT(1))
+#define HOST_SLC0_TOHOST_BIT1_INT_ST_M  (BIT(1))
+#define HOST_SLC0_TOHOST_BIT1_INT_ST_V  0x1
+#define HOST_SLC0_TOHOST_BIT1_INT_ST_S  1
+/* HOST_SLC0_TOHOST_BIT0_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT0_INT_ST    (BIT(0))
+#define HOST_SLC0_TOHOST_BIT0_INT_ST_M  (BIT(0))
+#define HOST_SLC0_TOHOST_BIT0_INT_ST_V  0x1
+#define HOST_SLC0_TOHOST_BIT0_INT_ST_S  0
+
+#define HOST_SLCHOST_PKT_LEN_REG          (DR_REG_SLCHOST_BASE + 0x60)
+/* HOST_HOSTSLC0_LEN_CHECK : RO ;bitpos:[31:20] ;default: 10'h0 ; */
+/*description: .*/
+#define HOST_HOSTSLC0_LEN_CHECK    0x00000FFF
+#define HOST_HOSTSLC0_LEN_CHECK_M  ((HOST_HOSTSLC0_LEN_CHECK_V)<<(HOST_HOSTSLC0_LEN_CHECK_S))
+#define HOST_HOSTSLC0_LEN_CHECK_V  0xFFF
+#define HOST_HOSTSLC0_LEN_CHECK_S  20
+/* HOST_HOSTSLC0_LEN : RO ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: .*/
+#define HOST_HOSTSLC0_LEN    0x000FFFFF
+#define HOST_HOSTSLC0_LEN_M  ((HOST_HOSTSLC0_LEN_V)<<(HOST_HOSTSLC0_LEN_S))
+#define HOST_HOSTSLC0_LEN_V  0xFFFFF
+#define HOST_HOSTSLC0_LEN_S  0
+
+#define HOST_SLCHOST_STATE_W0_REG          (DR_REG_SLCHOST_BASE + 0x64)
+/* HOST_SLCHOST_STATE3 : RO ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_STATE3    0x000000FF
+#define HOST_SLCHOST_STATE3_M  ((HOST_SLCHOST_STATE3_V)<<(HOST_SLCHOST_STATE3_S))
+#define HOST_SLCHOST_STATE3_V  0xFF
+#define HOST_SLCHOST_STATE3_S  24
+/* HOST_SLCHOST_STATE2 : RO ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_STATE2    0x000000FF
+#define HOST_SLCHOST_STATE2_M  ((HOST_SLCHOST_STATE2_V)<<(HOST_SLCHOST_STATE2_S))
+#define HOST_SLCHOST_STATE2_V  0xFF
+#define HOST_SLCHOST_STATE2_S  16
+/* HOST_SLCHOST_STATE1 : RO ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_STATE1    0x000000FF
+#define HOST_SLCHOST_STATE1_M  ((HOST_SLCHOST_STATE1_V)<<(HOST_SLCHOST_STATE1_S))
+#define HOST_SLCHOST_STATE1_V  0xFF
+#define HOST_SLCHOST_STATE1_S  8
+/* HOST_SLCHOST_STATE0 : RO ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_STATE0    0x000000FF
+#define HOST_SLCHOST_STATE0_M  ((HOST_SLCHOST_STATE0_V)<<(HOST_SLCHOST_STATE0_S))
+#define HOST_SLCHOST_STATE0_V  0xFF
+#define HOST_SLCHOST_STATE0_S  0
+
+#define HOST_SLCHOST_STATE_W1_REG          (DR_REG_SLCHOST_BASE + 0x68)
+/* HOST_SLCHOST_STATE7 : RO ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_STATE7    0x000000FF
+#define HOST_SLCHOST_STATE7_M  ((HOST_SLCHOST_STATE7_V)<<(HOST_SLCHOST_STATE7_S))
+#define HOST_SLCHOST_STATE7_V  0xFF
+#define HOST_SLCHOST_STATE7_S  24
+/* HOST_SLCHOST_STATE6 : RO ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_STATE6    0x000000FF
+#define HOST_SLCHOST_STATE6_M  ((HOST_SLCHOST_STATE6_V)<<(HOST_SLCHOST_STATE6_S))
+#define HOST_SLCHOST_STATE6_V  0xFF
+#define HOST_SLCHOST_STATE6_S  16
+/* HOST_SLCHOST_STATE5 : RO ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_STATE5    0x000000FF
+#define HOST_SLCHOST_STATE5_M  ((HOST_SLCHOST_STATE5_V)<<(HOST_SLCHOST_STATE5_S))
+#define HOST_SLCHOST_STATE5_V  0xFF
+#define HOST_SLCHOST_STATE5_S  8
+/* HOST_SLCHOST_STATE4 : RO ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_STATE4    0x000000FF
+#define HOST_SLCHOST_STATE4_M  ((HOST_SLCHOST_STATE4_V)<<(HOST_SLCHOST_STATE4_S))
+#define HOST_SLCHOST_STATE4_V  0xFF
+#define HOST_SLCHOST_STATE4_S  0
+
+#define HOST_SLCHOST_CONF_W0_REG          (DR_REG_SLCHOST_BASE + 0x6C)
+/* HOST_SLCHOST_CONF3 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF3    0x000000FF
+#define HOST_SLCHOST_CONF3_M  ((HOST_SLCHOST_CONF3_V)<<(HOST_SLCHOST_CONF3_S))
+#define HOST_SLCHOST_CONF3_V  0xFF
+#define HOST_SLCHOST_CONF3_S  24
+/* HOST_SLCHOST_CONF2 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF2    0x000000FF
+#define HOST_SLCHOST_CONF2_M  ((HOST_SLCHOST_CONF2_V)<<(HOST_SLCHOST_CONF2_S))
+#define HOST_SLCHOST_CONF2_V  0xFF
+#define HOST_SLCHOST_CONF2_S  16
+/* HOST_SLCHOST_CONF1 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF1    0x000000FF
+#define HOST_SLCHOST_CONF1_M  ((HOST_SLCHOST_CONF1_V)<<(HOST_SLCHOST_CONF1_S))
+#define HOST_SLCHOST_CONF1_V  0xFF
+#define HOST_SLCHOST_CONF1_S  8
+/* HOST_SLCHOST_CONF0 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF0    0x000000FF
+#define HOST_SLCHOST_CONF0_M  ((HOST_SLCHOST_CONF0_V)<<(HOST_SLCHOST_CONF0_S))
+#define HOST_SLCHOST_CONF0_V  0xFF
+#define HOST_SLCHOST_CONF0_S  0
+
+#define HOST_SLCHOST_CONF_W1_REG          (DR_REG_SLCHOST_BASE + 0x70)
+/* HOST_SLCHOST_CONF7 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF7    0x000000FF
+#define HOST_SLCHOST_CONF7_M  ((HOST_SLCHOST_CONF7_V)<<(HOST_SLCHOST_CONF7_S))
+#define HOST_SLCHOST_CONF7_V  0xFF
+#define HOST_SLCHOST_CONF7_S  24
+/* HOST_SLCHOST_CONF6 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF6    0x000000FF
+#define HOST_SLCHOST_CONF6_M  ((HOST_SLCHOST_CONF6_V)<<(HOST_SLCHOST_CONF6_S))
+#define HOST_SLCHOST_CONF6_V  0xFF
+#define HOST_SLCHOST_CONF6_S  16
+/* HOST_SLCHOST_CONF5 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF5    0x000000FF
+#define HOST_SLCHOST_CONF5_M  ((HOST_SLCHOST_CONF5_V)<<(HOST_SLCHOST_CONF5_S))
+#define HOST_SLCHOST_CONF5_V  0xFF
+#define HOST_SLCHOST_CONF5_S  8
+/* HOST_SLCHOST_CONF4 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF4    0x000000FF
+#define HOST_SLCHOST_CONF4_M  ((HOST_SLCHOST_CONF4_V)<<(HOST_SLCHOST_CONF4_S))
+#define HOST_SLCHOST_CONF4_V  0xFF
+#define HOST_SLCHOST_CONF4_S  0
+
+#define HOST_SLCHOST_CONF_W2_REG          (DR_REG_SLCHOST_BASE + 0x74)
+/* HOST_SLCHOST_CONF11 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF11    0x000000FF
+#define HOST_SLCHOST_CONF11_M  ((HOST_SLCHOST_CONF11_V)<<(HOST_SLCHOST_CONF11_S))
+#define HOST_SLCHOST_CONF11_V  0xFF
+#define HOST_SLCHOST_CONF11_S  24
+/* HOST_SLCHOST_CONF10 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF10    0x000000FF
+#define HOST_SLCHOST_CONF10_M  ((HOST_SLCHOST_CONF10_V)<<(HOST_SLCHOST_CONF10_S))
+#define HOST_SLCHOST_CONF10_V  0xFF
+#define HOST_SLCHOST_CONF10_S  16
+/* HOST_SLCHOST_CONF9 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF9    0x000000FF
+#define HOST_SLCHOST_CONF9_M  ((HOST_SLCHOST_CONF9_V)<<(HOST_SLCHOST_CONF9_S))
+#define HOST_SLCHOST_CONF9_V  0xFF
+#define HOST_SLCHOST_CONF9_S  8
+/* HOST_SLCHOST_CONF8 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF8    0x000000FF
+#define HOST_SLCHOST_CONF8_M  ((HOST_SLCHOST_CONF8_V)<<(HOST_SLCHOST_CONF8_S))
+#define HOST_SLCHOST_CONF8_V  0xFF
+#define HOST_SLCHOST_CONF8_S  0
+
+#define HOST_SLCHOST_CONF_W3_REG          (DR_REG_SLCHOST_BASE + 0x78)
+/* HOST_SLCHOST_CONF15 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF15    0x000000FF
+#define HOST_SLCHOST_CONF15_M  ((HOST_SLCHOST_CONF15_V)<<(HOST_SLCHOST_CONF15_S))
+#define HOST_SLCHOST_CONF15_V  0xFF
+#define HOST_SLCHOST_CONF15_S  24
+/* HOST_SLCHOST_CONF14 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF14    0x000000FF
+#define HOST_SLCHOST_CONF14_M  ((HOST_SLCHOST_CONF14_V)<<(HOST_SLCHOST_CONF14_S))
+#define HOST_SLCHOST_CONF14_V  0xFF
+#define HOST_SLCHOST_CONF14_S  16
+/* HOST_SLCHOST_CONF13 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF13    0x000000FF
+#define HOST_SLCHOST_CONF13_M  ((HOST_SLCHOST_CONF13_V)<<(HOST_SLCHOST_CONF13_S))
+#define HOST_SLCHOST_CONF13_V  0xFF
+#define HOST_SLCHOST_CONF13_S  8
+/* HOST_SLCHOST_CONF12 : R/W ;bitpos:[7:0] ;default: 8'hc0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF12    0x000000FF
+#define HOST_SLCHOST_CONF12_M  ((HOST_SLCHOST_CONF12_V)<<(HOST_SLCHOST_CONF12_S))
+#define HOST_SLCHOST_CONF12_V  0xFF
+#define HOST_SLCHOST_CONF12_S  0
+
+#define HOST_SLCHOST_CONF_W4_REG          (DR_REG_SLCHOST_BASE + 0x7C)
+/* HOST_SLCHOST_CONF19 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: Interrupt to target CPU.*/
+#define HOST_SLCHOST_CONF19    0x000000FF
+#define HOST_SLCHOST_CONF19_M  ((HOST_SLCHOST_CONF19_V)<<(HOST_SLCHOST_CONF19_S))
+#define HOST_SLCHOST_CONF19_V  0xFF
+#define HOST_SLCHOST_CONF19_S  24
+/* HOST_SLCHOST_CONF18 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF18    0x000000FF
+#define HOST_SLCHOST_CONF18_M  ((HOST_SLCHOST_CONF18_V)<<(HOST_SLCHOST_CONF18_S))
+#define HOST_SLCHOST_CONF18_V  0xFF
+#define HOST_SLCHOST_CONF18_S  16
+/* HOST_SLCHOST_CONF17 : R/W ;bitpos:[15:8] ;default: 8'h1 ; */
+/*description: SLC timeout enable.*/
+#define HOST_SLCHOST_CONF17    0x000000FF
+#define HOST_SLCHOST_CONF17_M  ((HOST_SLCHOST_CONF17_V)<<(HOST_SLCHOST_CONF17_S))
+#define HOST_SLCHOST_CONF17_V  0xFF
+#define HOST_SLCHOST_CONF17_S  8
+/* HOST_SLCHOST_CONF16 : R/W ;bitpos:[7:0] ;default: 8'hff ; */
+/*description: SLC timeout value.*/
+#define HOST_SLCHOST_CONF16    0x000000FF
+#define HOST_SLCHOST_CONF16_M  ((HOST_SLCHOST_CONF16_V)<<(HOST_SLCHOST_CONF16_S))
+#define HOST_SLCHOST_CONF16_V  0xFF
+#define HOST_SLCHOST_CONF16_S  0
+
+#define HOST_SLCHOST_CONF_W5_REG          (DR_REG_SLCHOST_BASE + 0x80)
+/* HOST_SLCHOST_CONF23 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF23    0x000000FF
+#define HOST_SLCHOST_CONF23_M  ((HOST_SLCHOST_CONF23_V)<<(HOST_SLCHOST_CONF23_S))
+#define HOST_SLCHOST_CONF23_V  0xFF
+#define HOST_SLCHOST_CONF23_S  24
+/* HOST_SLCHOST_CONF22 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF22    0x000000FF
+#define HOST_SLCHOST_CONF22_M  ((HOST_SLCHOST_CONF22_V)<<(HOST_SLCHOST_CONF22_S))
+#define HOST_SLCHOST_CONF22_V  0xFF
+#define HOST_SLCHOST_CONF22_S  16
+/* HOST_SLCHOST_CONF21 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF21    0x000000FF
+#define HOST_SLCHOST_CONF21_M  ((HOST_SLCHOST_CONF21_V)<<(HOST_SLCHOST_CONF21_S))
+#define HOST_SLCHOST_CONF21_V  0xFF
+#define HOST_SLCHOST_CONF21_S  8
+/* HOST_SLCHOST_CONF20 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF20    0x000000FF
+#define HOST_SLCHOST_CONF20_M  ((HOST_SLCHOST_CONF20_V)<<(HOST_SLCHOST_CONF20_S))
+#define HOST_SLCHOST_CONF20_V  0xFF
+#define HOST_SLCHOST_CONF20_S  0
+
+#define HOST_SLCHOST_WIN_CMD_REG          (DR_REG_SLCHOST_BASE + 0x84)
+/* HOST_SLCHOST_WIN_CMD : R/W ;bitpos:[15:0] ;default: 16'b0 ; */
+/*description: .*/
+#define HOST_SLCHOST_WIN_CMD    0x0000FFFF
+#define HOST_SLCHOST_WIN_CMD_M  ((HOST_SLCHOST_WIN_CMD_V)<<(HOST_SLCHOST_WIN_CMD_S))
+#define HOST_SLCHOST_WIN_CMD_V  0xFFFF
+#define HOST_SLCHOST_WIN_CMD_S  0
+
+#define HOST_SLCHOST_CONF_W6_REG          (DR_REG_SLCHOST_BASE + 0x88)
+/* HOST_SLCHOST_CONF27 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF27    0x000000FF
+#define HOST_SLCHOST_CONF27_M  ((HOST_SLCHOST_CONF27_V)<<(HOST_SLCHOST_CONF27_S))
+#define HOST_SLCHOST_CONF27_V  0xFF
+#define HOST_SLCHOST_CONF27_S  24
+/* HOST_SLCHOST_CONF26 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF26    0x000000FF
+#define HOST_SLCHOST_CONF26_M  ((HOST_SLCHOST_CONF26_V)<<(HOST_SLCHOST_CONF26_S))
+#define HOST_SLCHOST_CONF26_V  0xFF
+#define HOST_SLCHOST_CONF26_S  16
+/* HOST_SLCHOST_CONF25 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF25    0x000000FF
+#define HOST_SLCHOST_CONF25_M  ((HOST_SLCHOST_CONF25_V)<<(HOST_SLCHOST_CONF25_S))
+#define HOST_SLCHOST_CONF25_V  0xFF
+#define HOST_SLCHOST_CONF25_S  8
+/* HOST_SLCHOST_CONF24 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF24    0x000000FF
+#define HOST_SLCHOST_CONF24_M  ((HOST_SLCHOST_CONF24_V)<<(HOST_SLCHOST_CONF24_S))
+#define HOST_SLCHOST_CONF24_V  0xFF
+#define HOST_SLCHOST_CONF24_S  0
+
+#define HOST_SLCHOST_CONF_W7_REG          (DR_REG_SLCHOST_BASE + 0x8C)
+/* HOST_SLCHOST_CONF31 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF31    0x000000FF
+#define HOST_SLCHOST_CONF31_M  ((HOST_SLCHOST_CONF31_V)<<(HOST_SLCHOST_CONF31_S))
+#define HOST_SLCHOST_CONF31_V  0xFF
+#define HOST_SLCHOST_CONF31_S  24
+/* HOST_SLCHOST_CONF30 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF30    0x000000FF
+#define HOST_SLCHOST_CONF30_M  ((HOST_SLCHOST_CONF30_V)<<(HOST_SLCHOST_CONF30_S))
+#define HOST_SLCHOST_CONF30_V  0xFF
+#define HOST_SLCHOST_CONF30_S  16
+/* HOST_SLCHOST_CONF29 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF29    0x000000FF
+#define HOST_SLCHOST_CONF29_M  ((HOST_SLCHOST_CONF29_V)<<(HOST_SLCHOST_CONF29_S))
+#define HOST_SLCHOST_CONF29_V  0xFF
+#define HOST_SLCHOST_CONF29_S  8
+/* HOST_SLCHOST_CONF28 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF28    0x000000FF
+#define HOST_SLCHOST_CONF28_M  ((HOST_SLCHOST_CONF28_V)<<(HOST_SLCHOST_CONF28_S))
+#define HOST_SLCHOST_CONF28_V  0xFF
+#define HOST_SLCHOST_CONF28_S  0
+
+#define HOST_SLCHOST_PKT_LEN0_REG          (DR_REG_SLCHOST_BASE + 0x90)
+/* HOST_HOSTSLC0_LEN0_CHECK : RO ;bitpos:[31:20] ;default: 12'h0 ; */
+/*description: .*/
+#define HOST_HOSTSLC0_LEN0_CHECK    0x00000FFF
+#define HOST_HOSTSLC0_LEN0_CHECK_M  ((HOST_HOSTSLC0_LEN0_CHECK_V)<<(HOST_HOSTSLC0_LEN0_CHECK_S))
+#define HOST_HOSTSLC0_LEN0_CHECK_V  0xFFF
+#define HOST_HOSTSLC0_LEN0_CHECK_S  20
+/* HOST_HOSTSLC0_LEN0 : RO ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: .*/
+#define HOST_HOSTSLC0_LEN0    0x000FFFFF
+#define HOST_HOSTSLC0_LEN0_M  ((HOST_HOSTSLC0_LEN0_V)<<(HOST_HOSTSLC0_LEN0_S))
+#define HOST_HOSTSLC0_LEN0_V  0xFFFFF
+#define HOST_HOSTSLC0_LEN0_S  0
+
+#define HOST_SLCHOST_PKT_LEN1_REG          (DR_REG_SLCHOST_BASE + 0x94)
+/* HOST_HOSTSLC0_LEN1_CHECK : RO ;bitpos:[31:20] ;default: 10'h0 ; */
+/*description: .*/
+#define HOST_HOSTSLC0_LEN1_CHECK    0x00000FFF
+#define HOST_HOSTSLC0_LEN1_CHECK_M  ((HOST_HOSTSLC0_LEN1_CHECK_V)<<(HOST_HOSTSLC0_LEN1_CHECK_S))
+#define HOST_HOSTSLC0_LEN1_CHECK_V  0xFFF
+#define HOST_HOSTSLC0_LEN1_CHECK_S  20
+/* HOST_HOSTSLC0_LEN1 : RO ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: .*/
+#define HOST_HOSTSLC0_LEN1    0x000FFFFF
+#define HOST_HOSTSLC0_LEN1_M  ((HOST_HOSTSLC0_LEN1_V)<<(HOST_HOSTSLC0_LEN1_S))
+#define HOST_HOSTSLC0_LEN1_V  0xFFFFF
+#define HOST_HOSTSLC0_LEN1_S  0
+
+#define HOST_SLCHOST_PKT_LEN2_REG          (DR_REG_SLCHOST_BASE + 0x98)
+/* HOST_HOSTSLC0_LEN2_CHECK : RO ;bitpos:[31:20] ;default: 10'h0 ; */
+/*description: .*/
+#define HOST_HOSTSLC0_LEN2_CHECK    0x00000FFF
+#define HOST_HOSTSLC0_LEN2_CHECK_M  ((HOST_HOSTSLC0_LEN2_CHECK_V)<<(HOST_HOSTSLC0_LEN2_CHECK_S))
+#define HOST_HOSTSLC0_LEN2_CHECK_V  0xFFF
+#define HOST_HOSTSLC0_LEN2_CHECK_S  20
+/* HOST_HOSTSLC0_LEN2 : RO ;bitpos:[19:0] ;default: 20'h0 ; */
+/*description: .*/
+#define HOST_HOSTSLC0_LEN2    0x000FFFFF
+#define HOST_HOSTSLC0_LEN2_M  ((HOST_HOSTSLC0_LEN2_V)<<(HOST_HOSTSLC0_LEN2_S))
+#define HOST_HOSTSLC0_LEN2_V  0xFFFFF
+#define HOST_HOSTSLC0_LEN2_S  0
+
+#define HOST_SLCHOST_CONF_W8_REG          (DR_REG_SLCHOST_BASE + 0x9C)
+/* HOST_SLCHOST_CONF35 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF35    0x000000FF
+#define HOST_SLCHOST_CONF35_M  ((HOST_SLCHOST_CONF35_V)<<(HOST_SLCHOST_CONF35_S))
+#define HOST_SLCHOST_CONF35_V  0xFF
+#define HOST_SLCHOST_CONF35_S  24
+/* HOST_SLCHOST_CONF34 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF34    0x000000FF
+#define HOST_SLCHOST_CONF34_M  ((HOST_SLCHOST_CONF34_V)<<(HOST_SLCHOST_CONF34_S))
+#define HOST_SLCHOST_CONF34_V  0xFF
+#define HOST_SLCHOST_CONF34_S  16
+/* HOST_SLCHOST_CONF33 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF33    0x000000FF
+#define HOST_SLCHOST_CONF33_M  ((HOST_SLCHOST_CONF33_V)<<(HOST_SLCHOST_CONF33_S))
+#define HOST_SLCHOST_CONF33_V  0xFF
+#define HOST_SLCHOST_CONF33_S  8
+/* HOST_SLCHOST_CONF32 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF32    0x000000FF
+#define HOST_SLCHOST_CONF32_M  ((HOST_SLCHOST_CONF32_V)<<(HOST_SLCHOST_CONF32_S))
+#define HOST_SLCHOST_CONF32_V  0xFF
+#define HOST_SLCHOST_CONF32_S  0
+
+#define HOST_SLCHOST_CONF_W9_REG          (DR_REG_SLCHOST_BASE + 0xA0)
+/* HOST_SLCHOST_CONF39 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF39    0x000000FF
+#define HOST_SLCHOST_CONF39_M  ((HOST_SLCHOST_CONF39_V)<<(HOST_SLCHOST_CONF39_S))
+#define HOST_SLCHOST_CONF39_V  0xFF
+#define HOST_SLCHOST_CONF39_S  24
+/* HOST_SLCHOST_CONF38 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF38    0x000000FF
+#define HOST_SLCHOST_CONF38_M  ((HOST_SLCHOST_CONF38_V)<<(HOST_SLCHOST_CONF38_S))
+#define HOST_SLCHOST_CONF38_V  0xFF
+#define HOST_SLCHOST_CONF38_S  16
+/* HOST_SLCHOST_CONF37 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF37    0x000000FF
+#define HOST_SLCHOST_CONF37_M  ((HOST_SLCHOST_CONF37_V)<<(HOST_SLCHOST_CONF37_S))
+#define HOST_SLCHOST_CONF37_V  0xFF
+#define HOST_SLCHOST_CONF37_S  8
+/* HOST_SLCHOST_CONF36 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF36    0x000000FF
+#define HOST_SLCHOST_CONF36_M  ((HOST_SLCHOST_CONF36_V)<<(HOST_SLCHOST_CONF36_S))
+#define HOST_SLCHOST_CONF36_V  0xFF
+#define HOST_SLCHOST_CONF36_S  0
+
+#define HOST_SLCHOST_CONF_W10_REG          (DR_REG_SLCHOST_BASE + 0xA4)
+/* HOST_SLCHOST_CONF43 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF43    0x000000FF
+#define HOST_SLCHOST_CONF43_M  ((HOST_SLCHOST_CONF43_V)<<(HOST_SLCHOST_CONF43_S))
+#define HOST_SLCHOST_CONF43_V  0xFF
+#define HOST_SLCHOST_CONF43_S  24
+/* HOST_SLCHOST_CONF42 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF42    0x000000FF
+#define HOST_SLCHOST_CONF42_M  ((HOST_SLCHOST_CONF42_V)<<(HOST_SLCHOST_CONF42_S))
+#define HOST_SLCHOST_CONF42_V  0xFF
+#define HOST_SLCHOST_CONF42_S  16
+/* HOST_SLCHOST_CONF41 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF41    0x000000FF
+#define HOST_SLCHOST_CONF41_M  ((HOST_SLCHOST_CONF41_V)<<(HOST_SLCHOST_CONF41_S))
+#define HOST_SLCHOST_CONF41_V  0xFF
+#define HOST_SLCHOST_CONF41_S  8
+/* HOST_SLCHOST_CONF40 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF40    0x000000FF
+#define HOST_SLCHOST_CONF40_M  ((HOST_SLCHOST_CONF40_V)<<(HOST_SLCHOST_CONF40_S))
+#define HOST_SLCHOST_CONF40_V  0xFF
+#define HOST_SLCHOST_CONF40_S  0
+
+#define HOST_SLCHOST_CONF_W11_REG          (DR_REG_SLCHOST_BASE + 0xA8)
+/* HOST_SLCHOST_CONF47 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF47    0x000000FF
+#define HOST_SLCHOST_CONF47_M  ((HOST_SLCHOST_CONF47_V)<<(HOST_SLCHOST_CONF47_S))
+#define HOST_SLCHOST_CONF47_V  0xFF
+#define HOST_SLCHOST_CONF47_S  24
+/* HOST_SLCHOST_CONF46 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF46    0x000000FF
+#define HOST_SLCHOST_CONF46_M  ((HOST_SLCHOST_CONF46_V)<<(HOST_SLCHOST_CONF46_S))
+#define HOST_SLCHOST_CONF46_V  0xFF
+#define HOST_SLCHOST_CONF46_S  16
+/* HOST_SLCHOST_CONF45 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF45    0x000000FF
+#define HOST_SLCHOST_CONF45_M  ((HOST_SLCHOST_CONF45_V)<<(HOST_SLCHOST_CONF45_S))
+#define HOST_SLCHOST_CONF45_V  0xFF
+#define HOST_SLCHOST_CONF45_S  8
+/* HOST_SLCHOST_CONF44 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF44    0x000000FF
+#define HOST_SLCHOST_CONF44_M  ((HOST_SLCHOST_CONF44_V)<<(HOST_SLCHOST_CONF44_S))
+#define HOST_SLCHOST_CONF44_V  0xFF
+#define HOST_SLCHOST_CONF44_S  0
+
+#define HOST_SLCHOST_CONF_W12_REG          (DR_REG_SLCHOST_BASE + 0xAC)
+/* HOST_SLCHOST_CONF51 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF51    0x000000FF
+#define HOST_SLCHOST_CONF51_M  ((HOST_SLCHOST_CONF51_V)<<(HOST_SLCHOST_CONF51_S))
+#define HOST_SLCHOST_CONF51_V  0xFF
+#define HOST_SLCHOST_CONF51_S  24
+/* HOST_SLCHOST_CONF50 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF50    0x000000FF
+#define HOST_SLCHOST_CONF50_M  ((HOST_SLCHOST_CONF50_V)<<(HOST_SLCHOST_CONF50_S))
+#define HOST_SLCHOST_CONF50_V  0xFF
+#define HOST_SLCHOST_CONF50_S  16
+/* HOST_SLCHOST_CONF49 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF49    0x000000FF
+#define HOST_SLCHOST_CONF49_M  ((HOST_SLCHOST_CONF49_V)<<(HOST_SLCHOST_CONF49_S))
+#define HOST_SLCHOST_CONF49_V  0xFF
+#define HOST_SLCHOST_CONF49_S  8
+/* HOST_SLCHOST_CONF48 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF48    0x000000FF
+#define HOST_SLCHOST_CONF48_M  ((HOST_SLCHOST_CONF48_V)<<(HOST_SLCHOST_CONF48_S))
+#define HOST_SLCHOST_CONF48_V  0xFF
+#define HOST_SLCHOST_CONF48_S  0
+
+#define HOST_SLCHOST_CONF_W13_REG          (DR_REG_SLCHOST_BASE + 0xB0)
+/* HOST_SLCHOST_CONF55 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF55    0x000000FF
+#define HOST_SLCHOST_CONF55_M  ((HOST_SLCHOST_CONF55_V)<<(HOST_SLCHOST_CONF55_S))
+#define HOST_SLCHOST_CONF55_V  0xFF
+#define HOST_SLCHOST_CONF55_S  24
+/* HOST_SLCHOST_CONF54 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF54    0x000000FF
+#define HOST_SLCHOST_CONF54_M  ((HOST_SLCHOST_CONF54_V)<<(HOST_SLCHOST_CONF54_S))
+#define HOST_SLCHOST_CONF54_V  0xFF
+#define HOST_SLCHOST_CONF54_S  16
+/* HOST_SLCHOST_CONF53 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF53    0x000000FF
+#define HOST_SLCHOST_CONF53_M  ((HOST_SLCHOST_CONF53_V)<<(HOST_SLCHOST_CONF53_S))
+#define HOST_SLCHOST_CONF53_V  0xFF
+#define HOST_SLCHOST_CONF53_S  8
+/* HOST_SLCHOST_CONF52 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF52    0x000000FF
+#define HOST_SLCHOST_CONF52_M  ((HOST_SLCHOST_CONF52_V)<<(HOST_SLCHOST_CONF52_S))
+#define HOST_SLCHOST_CONF52_V  0xFF
+#define HOST_SLCHOST_CONF52_S  0
+
+#define HOST_SLCHOST_CONF_W14_REG          (DR_REG_SLCHOST_BASE + 0xB4)
+/* HOST_SLCHOST_CONF59 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF59    0x000000FF
+#define HOST_SLCHOST_CONF59_M  ((HOST_SLCHOST_CONF59_V)<<(HOST_SLCHOST_CONF59_S))
+#define HOST_SLCHOST_CONF59_V  0xFF
+#define HOST_SLCHOST_CONF59_S  24
+/* HOST_SLCHOST_CONF58 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF58    0x000000FF
+#define HOST_SLCHOST_CONF58_M  ((HOST_SLCHOST_CONF58_V)<<(HOST_SLCHOST_CONF58_S))
+#define HOST_SLCHOST_CONF58_V  0xFF
+#define HOST_SLCHOST_CONF58_S  16
+/* HOST_SLCHOST_CONF57 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF57    0x000000FF
+#define HOST_SLCHOST_CONF57_M  ((HOST_SLCHOST_CONF57_V)<<(HOST_SLCHOST_CONF57_S))
+#define HOST_SLCHOST_CONF57_V  0xFF
+#define HOST_SLCHOST_CONF57_S  8
+/* HOST_SLCHOST_CONF56 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF56    0x000000FF
+#define HOST_SLCHOST_CONF56_M  ((HOST_SLCHOST_CONF56_V)<<(HOST_SLCHOST_CONF56_S))
+#define HOST_SLCHOST_CONF56_V  0xFF
+#define HOST_SLCHOST_CONF56_S  0
+
+#define HOST_SLCHOST_CONF_W15_REG          (DR_REG_SLCHOST_BASE + 0xB8)
+/* HOST_SLCHOST_CONF63 : R/W ;bitpos:[31:24] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF63    0x000000FF
+#define HOST_SLCHOST_CONF63_M  ((HOST_SLCHOST_CONF63_V)<<(HOST_SLCHOST_CONF63_S))
+#define HOST_SLCHOST_CONF63_V  0xFF
+#define HOST_SLCHOST_CONF63_S  24
+/* HOST_SLCHOST_CONF62 : R/W ;bitpos:[23:16] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF62    0x000000FF
+#define HOST_SLCHOST_CONF62_M  ((HOST_SLCHOST_CONF62_V)<<(HOST_SLCHOST_CONF62_S))
+#define HOST_SLCHOST_CONF62_V  0xFF
+#define HOST_SLCHOST_CONF62_S  16
+/* HOST_SLCHOST_CONF61 : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF61    0x000000FF
+#define HOST_SLCHOST_CONF61_M  ((HOST_SLCHOST_CONF61_V)<<(HOST_SLCHOST_CONF61_S))
+#define HOST_SLCHOST_CONF61_V  0xFF
+#define HOST_SLCHOST_CONF61_S  8
+/* HOST_SLCHOST_CONF60 : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CONF60    0x000000FF
+#define HOST_SLCHOST_CONF60_M  ((HOST_SLCHOST_CONF60_V)<<(HOST_SLCHOST_CONF60_S))
+#define HOST_SLCHOST_CONF60_V  0xFF
+#define HOST_SLCHOST_CONF60_S  0
+
+#define HOST_SLCHOST_CHECK_SUM0_REG          (DR_REG_SLCHOST_BASE + 0xBC)
+/* HOST_SLCHOST_CHECK_SUM0 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CHECK_SUM0    0xFFFFFFFF
+#define HOST_SLCHOST_CHECK_SUM0_M  ((HOST_SLCHOST_CHECK_SUM0_V)<<(HOST_SLCHOST_CHECK_SUM0_S))
+#define HOST_SLCHOST_CHECK_SUM0_V  0xFFFFFFFF
+#define HOST_SLCHOST_CHECK_SUM0_S  0
+
+#define HOST_SLCHOST_CHECK_SUM1_REG          (DR_REG_SLCHOST_BASE + 0xC0)
+/* HOST_SLCHOST_CHECK_SUM1 : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define HOST_SLCHOST_CHECK_SUM1    0xFFFFFFFF
+#define HOST_SLCHOST_CHECK_SUM1_M  ((HOST_SLCHOST_CHECK_SUM1_V)<<(HOST_SLCHOST_CHECK_SUM1_S))
+#define HOST_SLCHOST_CHECK_SUM1_V  0xFFFFFFFF
+#define HOST_SLCHOST_CHECK_SUM1_S  0
+
+#define HOST_SLC0HOST_TOKEN_WDATA_REG          (DR_REG_SLCHOST_BASE + 0xC8)
+/* HOST_SLC0HOST_TOKEN1_WD : R/W ;bitpos:[27:16] ;default: 12'h0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_TOKEN1_WD    0x00000FFF
+#define HOST_SLC0HOST_TOKEN1_WD_M  ((HOST_SLC0HOST_TOKEN1_WD_V)<<(HOST_SLC0HOST_TOKEN1_WD_S))
+#define HOST_SLC0HOST_TOKEN1_WD_V  0xFFF
+#define HOST_SLC0HOST_TOKEN1_WD_S  16
+/* HOST_SLC0HOST_TOKEN0_WD : R/W ;bitpos:[11:0] ;default: 12'h0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_TOKEN0_WD    0x00000FFF
+#define HOST_SLC0HOST_TOKEN0_WD_M  ((HOST_SLC0HOST_TOKEN0_WD_V)<<(HOST_SLC0HOST_TOKEN0_WD_S))
+#define HOST_SLC0HOST_TOKEN0_WD_V  0xFFF
+#define HOST_SLC0HOST_TOKEN0_WD_S  0
+
+#define HOST_SLCHOST_TOKEN_CON_REG          (DR_REG_SLCHOST_BASE + 0xD0)
+/* HOST_SLC0HOST_LEN_WR : WO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_LEN_WR    (BIT(8))
+#define HOST_SLC0HOST_LEN_WR_M  (BIT(8))
+#define HOST_SLC0HOST_LEN_WR_V  0x1
+#define HOST_SLC0HOST_LEN_WR_S  8
+/* HOST_SLC0HOST_TOKEN1_WR : WO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_TOKEN1_WR    (BIT(3))
+#define HOST_SLC0HOST_TOKEN1_WR_M  (BIT(3))
+#define HOST_SLC0HOST_TOKEN1_WR_V  0x1
+#define HOST_SLC0HOST_TOKEN1_WR_S  3
+/* HOST_SLC0HOST_TOKEN0_WR : WO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_TOKEN0_WR    (BIT(2))
+#define HOST_SLC0HOST_TOKEN0_WR_M  (BIT(2))
+#define HOST_SLC0HOST_TOKEN0_WR_V  0x1
+#define HOST_SLC0HOST_TOKEN0_WR_S  2
+/* HOST_SLC0HOST_TOKEN1_DEC : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_TOKEN1_DEC    (BIT(1))
+#define HOST_SLC0HOST_TOKEN1_DEC_M  (BIT(1))
+#define HOST_SLC0HOST_TOKEN1_DEC_V  0x1
+#define HOST_SLC0HOST_TOKEN1_DEC_S  1
+/* HOST_SLC0HOST_TOKEN0_DEC : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_TOKEN0_DEC    (BIT(0))
+#define HOST_SLC0HOST_TOKEN0_DEC_M  (BIT(0))
+#define HOST_SLC0HOST_TOKEN0_DEC_V  0x1
+#define HOST_SLC0HOST_TOKEN0_DEC_S  0
+
+#define HOST_SLC0HOST_INT_CLR_REG          (DR_REG_SLCHOST_BASE + 0xD4)
+/* HOST_GPIO_SDIO_INT_CLR : WO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_GPIO_SDIO_INT_CLR    (BIT(25))
+#define HOST_GPIO_SDIO_INT_CLR_M  (BIT(25))
+#define HOST_GPIO_SDIO_INT_CLR_V  0x1
+#define HOST_GPIO_SDIO_INT_CLR_S  25
+/* HOST_SLC0_HOST_RD_RETRY_INT_CLR : WO ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_HOST_RD_RETRY_INT_CLR    (BIT(24))
+#define HOST_SLC0_HOST_RD_RETRY_INT_CLR_M  (BIT(24))
+#define HOST_SLC0_HOST_RD_RETRY_INT_CLR_V  0x1
+#define HOST_SLC0_HOST_RD_RETRY_INT_CLR_S  24
+/* HOST_SLC0_RX_NEW_PACKET_INT_CLR : WO ;bitpos:[23] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_NEW_PACKET_INT_CLR    (BIT(23))
+#define HOST_SLC0_RX_NEW_PACKET_INT_CLR_M  (BIT(23))
+#define HOST_SLC0_RX_NEW_PACKET_INT_CLR_V  0x1
+#define HOST_SLC0_RX_NEW_PACKET_INT_CLR_S  23
+/* HOST_SLC0_EXT_BIT3_INT_CLR : WO ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT3_INT_CLR    (BIT(22))
+#define HOST_SLC0_EXT_BIT3_INT_CLR_M  (BIT(22))
+#define HOST_SLC0_EXT_BIT3_INT_CLR_V  0x1
+#define HOST_SLC0_EXT_BIT3_INT_CLR_S  22
+/* HOST_SLC0_EXT_BIT2_INT_CLR : WO ;bitpos:[21] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT2_INT_CLR    (BIT(21))
+#define HOST_SLC0_EXT_BIT2_INT_CLR_M  (BIT(21))
+#define HOST_SLC0_EXT_BIT2_INT_CLR_V  0x1
+#define HOST_SLC0_EXT_BIT2_INT_CLR_S  21
+/* HOST_SLC0_EXT_BIT1_INT_CLR : WO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT1_INT_CLR    (BIT(20))
+#define HOST_SLC0_EXT_BIT1_INT_CLR_M  (BIT(20))
+#define HOST_SLC0_EXT_BIT1_INT_CLR_V  0x1
+#define HOST_SLC0_EXT_BIT1_INT_CLR_S  20
+/* HOST_SLC0_EXT_BIT0_INT_CLR : WO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT0_INT_CLR    (BIT(19))
+#define HOST_SLC0_EXT_BIT0_INT_CLR_M  (BIT(19))
+#define HOST_SLC0_EXT_BIT0_INT_CLR_V  0x1
+#define HOST_SLC0_EXT_BIT0_INT_CLR_S  19
+/* HOST_SLC0_RX_PF_VALID_INT_CLR : WO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_PF_VALID_INT_CLR    (BIT(18))
+#define HOST_SLC0_RX_PF_VALID_INT_CLR_M  (BIT(18))
+#define HOST_SLC0_RX_PF_VALID_INT_CLR_V  0x1
+#define HOST_SLC0_RX_PF_VALID_INT_CLR_S  18
+/* HOST_SLC0_TX_OVF_INT_CLR : WO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TX_OVF_INT_CLR    (BIT(17))
+#define HOST_SLC0_TX_OVF_INT_CLR_M  (BIT(17))
+#define HOST_SLC0_TX_OVF_INT_CLR_V  0x1
+#define HOST_SLC0_TX_OVF_INT_CLR_S  17
+/* HOST_SLC0_RX_UDF_INT_CLR : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_UDF_INT_CLR    (BIT(16))
+#define HOST_SLC0_RX_UDF_INT_CLR_M  (BIT(16))
+#define HOST_SLC0_RX_UDF_INT_CLR_V  0x1
+#define HOST_SLC0_RX_UDF_INT_CLR_S  16
+/* HOST_SLC0HOST_TX_START_INT_CLR : WO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_TX_START_INT_CLR    (BIT(15))
+#define HOST_SLC0HOST_TX_START_INT_CLR_M  (BIT(15))
+#define HOST_SLC0HOST_TX_START_INT_CLR_V  0x1
+#define HOST_SLC0HOST_TX_START_INT_CLR_S  15
+/* HOST_SLC0HOST_RX_START_INT_CLR : WO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_START_INT_CLR    (BIT(14))
+#define HOST_SLC0HOST_RX_START_INT_CLR_M  (BIT(14))
+#define HOST_SLC0HOST_RX_START_INT_CLR_V  0x1
+#define HOST_SLC0HOST_RX_START_INT_CLR_S  14
+/* HOST_SLC0HOST_RX_EOF_INT_CLR : WO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_EOF_INT_CLR    (BIT(13))
+#define HOST_SLC0HOST_RX_EOF_INT_CLR_M  (BIT(13))
+#define HOST_SLC0HOST_RX_EOF_INT_CLR_V  0x1
+#define HOST_SLC0HOST_RX_EOF_INT_CLR_S  13
+/* HOST_SLC0HOST_RX_SOF_INT_CLR : WO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_SOF_INT_CLR    (BIT(12))
+#define HOST_SLC0HOST_RX_SOF_INT_CLR_M  (BIT(12))
+#define HOST_SLC0HOST_RX_SOF_INT_CLR_V  0x1
+#define HOST_SLC0HOST_RX_SOF_INT_CLR_S  12
+/* HOST_SLC0_TOKEN1_0TO1_INT_CLR : WO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN1_0TO1_INT_CLR    (BIT(11))
+#define HOST_SLC0_TOKEN1_0TO1_INT_CLR_M  (BIT(11))
+#define HOST_SLC0_TOKEN1_0TO1_INT_CLR_V  0x1
+#define HOST_SLC0_TOKEN1_0TO1_INT_CLR_S  11
+/* HOST_SLC0_TOKEN0_0TO1_INT_CLR : WO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN0_0TO1_INT_CLR    (BIT(10))
+#define HOST_SLC0_TOKEN0_0TO1_INT_CLR_M  (BIT(10))
+#define HOST_SLC0_TOKEN0_0TO1_INT_CLR_V  0x1
+#define HOST_SLC0_TOKEN0_0TO1_INT_CLR_S  10
+/* HOST_SLC0_TOKEN1_1TO0_INT_CLR : WO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN1_1TO0_INT_CLR    (BIT(9))
+#define HOST_SLC0_TOKEN1_1TO0_INT_CLR_M  (BIT(9))
+#define HOST_SLC0_TOKEN1_1TO0_INT_CLR_V  0x1
+#define HOST_SLC0_TOKEN1_1TO0_INT_CLR_S  9
+/* HOST_SLC0_TOKEN0_1TO0_INT_CLR : WO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN0_1TO0_INT_CLR    (BIT(8))
+#define HOST_SLC0_TOKEN0_1TO0_INT_CLR_M  (BIT(8))
+#define HOST_SLC0_TOKEN0_1TO0_INT_CLR_V  0x1
+#define HOST_SLC0_TOKEN0_1TO0_INT_CLR_S  8
+/* HOST_SLC0_TOHOST_BIT7_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT7_INT_CLR    (BIT(7))
+#define HOST_SLC0_TOHOST_BIT7_INT_CLR_M  (BIT(7))
+#define HOST_SLC0_TOHOST_BIT7_INT_CLR_V  0x1
+#define HOST_SLC0_TOHOST_BIT7_INT_CLR_S  7
+/* HOST_SLC0_TOHOST_BIT6_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT6_INT_CLR    (BIT(6))
+#define HOST_SLC0_TOHOST_BIT6_INT_CLR_M  (BIT(6))
+#define HOST_SLC0_TOHOST_BIT6_INT_CLR_V  0x1
+#define HOST_SLC0_TOHOST_BIT6_INT_CLR_S  6
+/* HOST_SLC0_TOHOST_BIT5_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT5_INT_CLR    (BIT(5))
+#define HOST_SLC0_TOHOST_BIT5_INT_CLR_M  (BIT(5))
+#define HOST_SLC0_TOHOST_BIT5_INT_CLR_V  0x1
+#define HOST_SLC0_TOHOST_BIT5_INT_CLR_S  5
+/* HOST_SLC0_TOHOST_BIT4_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT4_INT_CLR    (BIT(4))
+#define HOST_SLC0_TOHOST_BIT4_INT_CLR_M  (BIT(4))
+#define HOST_SLC0_TOHOST_BIT4_INT_CLR_V  0x1
+#define HOST_SLC0_TOHOST_BIT4_INT_CLR_S  4
+/* HOST_SLC0_TOHOST_BIT3_INT_CLR : WO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT3_INT_CLR    (BIT(3))
+#define HOST_SLC0_TOHOST_BIT3_INT_CLR_M  (BIT(3))
+#define HOST_SLC0_TOHOST_BIT3_INT_CLR_V  0x1
+#define HOST_SLC0_TOHOST_BIT3_INT_CLR_S  3
+/* HOST_SLC0_TOHOST_BIT2_INT_CLR : WO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT2_INT_CLR    (BIT(2))
+#define HOST_SLC0_TOHOST_BIT2_INT_CLR_M  (BIT(2))
+#define HOST_SLC0_TOHOST_BIT2_INT_CLR_V  0x1
+#define HOST_SLC0_TOHOST_BIT2_INT_CLR_S  2
+/* HOST_SLC0_TOHOST_BIT1_INT_CLR : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT1_INT_CLR    (BIT(1))
+#define HOST_SLC0_TOHOST_BIT1_INT_CLR_M  (BIT(1))
+#define HOST_SLC0_TOHOST_BIT1_INT_CLR_V  0x1
+#define HOST_SLC0_TOHOST_BIT1_INT_CLR_S  1
+/* HOST_SLC0_TOHOST_BIT0_INT_CLR : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT0_INT_CLR    (BIT(0))
+#define HOST_SLC0_TOHOST_BIT0_INT_CLR_M  (BIT(0))
+#define HOST_SLC0_TOHOST_BIT0_INT_CLR_V  0x1
+#define HOST_SLC0_TOHOST_BIT0_INT_CLR_S  0
+
+#define HOST_SLC0HOST_FUNC1_INT_ENA_REG          (DR_REG_SLCHOST_BASE + 0xDC)
+/* HOST_FN1_GPIO_SDIO_INT_ENA : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_GPIO_SDIO_INT_ENA    (BIT(25))
+#define HOST_FN1_GPIO_SDIO_INT_ENA_M  (BIT(25))
+#define HOST_FN1_GPIO_SDIO_INT_ENA_V  0x1
+#define HOST_FN1_GPIO_SDIO_INT_ENA_S  25
+/* HOST_FN1_SLC0_HOST_RD_RETRY_INT_ENA : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_HOST_RD_RETRY_INT_ENA    (BIT(24))
+#define HOST_FN1_SLC0_HOST_RD_RETRY_INT_ENA_M  (BIT(24))
+#define HOST_FN1_SLC0_HOST_RD_RETRY_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_HOST_RD_RETRY_INT_ENA_S  24
+/* HOST_FN1_SLC0_RX_NEW_PACKET_INT_ENA : R/W ;bitpos:[23] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_RX_NEW_PACKET_INT_ENA    (BIT(23))
+#define HOST_FN1_SLC0_RX_NEW_PACKET_INT_ENA_M  (BIT(23))
+#define HOST_FN1_SLC0_RX_NEW_PACKET_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_RX_NEW_PACKET_INT_ENA_S  23
+/* HOST_FN1_SLC0_EXT_BIT3_INT_ENA : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_EXT_BIT3_INT_ENA    (BIT(22))
+#define HOST_FN1_SLC0_EXT_BIT3_INT_ENA_M  (BIT(22))
+#define HOST_FN1_SLC0_EXT_BIT3_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_EXT_BIT3_INT_ENA_S  22
+/* HOST_FN1_SLC0_EXT_BIT2_INT_ENA : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_EXT_BIT2_INT_ENA    (BIT(21))
+#define HOST_FN1_SLC0_EXT_BIT2_INT_ENA_M  (BIT(21))
+#define HOST_FN1_SLC0_EXT_BIT2_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_EXT_BIT2_INT_ENA_S  21
+/* HOST_FN1_SLC0_EXT_BIT1_INT_ENA : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_EXT_BIT1_INT_ENA    (BIT(20))
+#define HOST_FN1_SLC0_EXT_BIT1_INT_ENA_M  (BIT(20))
+#define HOST_FN1_SLC0_EXT_BIT1_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_EXT_BIT1_INT_ENA_S  20
+/* HOST_FN1_SLC0_EXT_BIT0_INT_ENA : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_EXT_BIT0_INT_ENA    (BIT(19))
+#define HOST_FN1_SLC0_EXT_BIT0_INT_ENA_M  (BIT(19))
+#define HOST_FN1_SLC0_EXT_BIT0_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_EXT_BIT0_INT_ENA_S  19
+/* HOST_FN1_SLC0_RX_PF_VALID_INT_ENA : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_RX_PF_VALID_INT_ENA    (BIT(18))
+#define HOST_FN1_SLC0_RX_PF_VALID_INT_ENA_M  (BIT(18))
+#define HOST_FN1_SLC0_RX_PF_VALID_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_RX_PF_VALID_INT_ENA_S  18
+/* HOST_FN1_SLC0_TX_OVF_INT_ENA : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TX_OVF_INT_ENA    (BIT(17))
+#define HOST_FN1_SLC0_TX_OVF_INT_ENA_M  (BIT(17))
+#define HOST_FN1_SLC0_TX_OVF_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TX_OVF_INT_ENA_S  17
+/* HOST_FN1_SLC0_RX_UDF_INT_ENA : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_RX_UDF_INT_ENA    (BIT(16))
+#define HOST_FN1_SLC0_RX_UDF_INT_ENA_M  (BIT(16))
+#define HOST_FN1_SLC0_RX_UDF_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_RX_UDF_INT_ENA_S  16
+/* HOST_FN1_SLC0HOST_TX_START_INT_ENA : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0HOST_TX_START_INT_ENA    (BIT(15))
+#define HOST_FN1_SLC0HOST_TX_START_INT_ENA_M  (BIT(15))
+#define HOST_FN1_SLC0HOST_TX_START_INT_ENA_V  0x1
+#define HOST_FN1_SLC0HOST_TX_START_INT_ENA_S  15
+/* HOST_FN1_SLC0HOST_RX_START_INT_ENA : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0HOST_RX_START_INT_ENA    (BIT(14))
+#define HOST_FN1_SLC0HOST_RX_START_INT_ENA_M  (BIT(14))
+#define HOST_FN1_SLC0HOST_RX_START_INT_ENA_V  0x1
+#define HOST_FN1_SLC0HOST_RX_START_INT_ENA_S  14
+/* HOST_FN1_SLC0HOST_RX_EOF_INT_ENA : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0HOST_RX_EOF_INT_ENA    (BIT(13))
+#define HOST_FN1_SLC0HOST_RX_EOF_INT_ENA_M  (BIT(13))
+#define HOST_FN1_SLC0HOST_RX_EOF_INT_ENA_V  0x1
+#define HOST_FN1_SLC0HOST_RX_EOF_INT_ENA_S  13
+/* HOST_FN1_SLC0HOST_RX_SOF_INT_ENA : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0HOST_RX_SOF_INT_ENA    (BIT(12))
+#define HOST_FN1_SLC0HOST_RX_SOF_INT_ENA_M  (BIT(12))
+#define HOST_FN1_SLC0HOST_RX_SOF_INT_ENA_V  0x1
+#define HOST_FN1_SLC0HOST_RX_SOF_INT_ENA_S  12
+/* HOST_FN1_SLC0_TOKEN1_0TO1_INT_ENA : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOKEN1_0TO1_INT_ENA    (BIT(11))
+#define HOST_FN1_SLC0_TOKEN1_0TO1_INT_ENA_M  (BIT(11))
+#define HOST_FN1_SLC0_TOKEN1_0TO1_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOKEN1_0TO1_INT_ENA_S  11
+/* HOST_FN1_SLC0_TOKEN0_0TO1_INT_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOKEN0_0TO1_INT_ENA    (BIT(10))
+#define HOST_FN1_SLC0_TOKEN0_0TO1_INT_ENA_M  (BIT(10))
+#define HOST_FN1_SLC0_TOKEN0_0TO1_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOKEN0_0TO1_INT_ENA_S  10
+/* HOST_FN1_SLC0_TOKEN1_1TO0_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOKEN1_1TO0_INT_ENA    (BIT(9))
+#define HOST_FN1_SLC0_TOKEN1_1TO0_INT_ENA_M  (BIT(9))
+#define HOST_FN1_SLC0_TOKEN1_1TO0_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOKEN1_1TO0_INT_ENA_S  9
+/* HOST_FN1_SLC0_TOKEN0_1TO0_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOKEN0_1TO0_INT_ENA    (BIT(8))
+#define HOST_FN1_SLC0_TOKEN0_1TO0_INT_ENA_M  (BIT(8))
+#define HOST_FN1_SLC0_TOKEN0_1TO0_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOKEN0_1TO0_INT_ENA_S  8
+/* HOST_FN1_SLC0_TOHOST_BIT7_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOHOST_BIT7_INT_ENA    (BIT(7))
+#define HOST_FN1_SLC0_TOHOST_BIT7_INT_ENA_M  (BIT(7))
+#define HOST_FN1_SLC0_TOHOST_BIT7_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOHOST_BIT7_INT_ENA_S  7
+/* HOST_FN1_SLC0_TOHOST_BIT6_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOHOST_BIT6_INT_ENA    (BIT(6))
+#define HOST_FN1_SLC0_TOHOST_BIT6_INT_ENA_M  (BIT(6))
+#define HOST_FN1_SLC0_TOHOST_BIT6_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOHOST_BIT6_INT_ENA_S  6
+/* HOST_FN1_SLC0_TOHOST_BIT5_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOHOST_BIT5_INT_ENA    (BIT(5))
+#define HOST_FN1_SLC0_TOHOST_BIT5_INT_ENA_M  (BIT(5))
+#define HOST_FN1_SLC0_TOHOST_BIT5_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOHOST_BIT5_INT_ENA_S  5
+/* HOST_FN1_SLC0_TOHOST_BIT4_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOHOST_BIT4_INT_ENA    (BIT(4))
+#define HOST_FN1_SLC0_TOHOST_BIT4_INT_ENA_M  (BIT(4))
+#define HOST_FN1_SLC0_TOHOST_BIT4_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOHOST_BIT4_INT_ENA_S  4
+/* HOST_FN1_SLC0_TOHOST_BIT3_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOHOST_BIT3_INT_ENA    (BIT(3))
+#define HOST_FN1_SLC0_TOHOST_BIT3_INT_ENA_M  (BIT(3))
+#define HOST_FN1_SLC0_TOHOST_BIT3_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOHOST_BIT3_INT_ENA_S  3
+/* HOST_FN1_SLC0_TOHOST_BIT2_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOHOST_BIT2_INT_ENA    (BIT(2))
+#define HOST_FN1_SLC0_TOHOST_BIT2_INT_ENA_M  (BIT(2))
+#define HOST_FN1_SLC0_TOHOST_BIT2_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOHOST_BIT2_INT_ENA_S  2
+/* HOST_FN1_SLC0_TOHOST_BIT1_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOHOST_BIT1_INT_ENA    (BIT(1))
+#define HOST_FN1_SLC0_TOHOST_BIT1_INT_ENA_M  (BIT(1))
+#define HOST_FN1_SLC0_TOHOST_BIT1_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOHOST_BIT1_INT_ENA_S  1
+/* HOST_FN1_SLC0_TOHOST_BIT0_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_FN1_SLC0_TOHOST_BIT0_INT_ENA    (BIT(0))
+#define HOST_FN1_SLC0_TOHOST_BIT0_INT_ENA_M  (BIT(0))
+#define HOST_FN1_SLC0_TOHOST_BIT0_INT_ENA_V  0x1
+#define HOST_FN1_SLC0_TOHOST_BIT0_INT_ENA_S  0
+
+#define HOST_SLC0HOST_INT_ENA_REG          (DR_REG_SLCHOST_BASE + 0xEC)
+/* HOST_GPIO_SDIO_INT_ENA : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_GPIO_SDIO_INT_ENA    (BIT(25))
+#define HOST_GPIO_SDIO_INT_ENA_M  (BIT(25))
+#define HOST_GPIO_SDIO_INT_ENA_V  0x1
+#define HOST_GPIO_SDIO_INT_ENA_S  25
+/* HOST_SLC0_HOST_RD_RETRY_INT_ENA : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_HOST_RD_RETRY_INT_ENA    (BIT(24))
+#define HOST_SLC0_HOST_RD_RETRY_INT_ENA_M  (BIT(24))
+#define HOST_SLC0_HOST_RD_RETRY_INT_ENA_V  0x1
+#define HOST_SLC0_HOST_RD_RETRY_INT_ENA_S  24
+/* HOST_SLC0_RX_NEW_PACKET_INT_ENA : R/W ;bitpos:[23] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_NEW_PACKET_INT_ENA    (BIT(23))
+#define HOST_SLC0_RX_NEW_PACKET_INT_ENA_M  (BIT(23))
+#define HOST_SLC0_RX_NEW_PACKET_INT_ENA_V  0x1
+#define HOST_SLC0_RX_NEW_PACKET_INT_ENA_S  23
+/* HOST_SLC0_EXT_BIT3_INT_ENA : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT3_INT_ENA    (BIT(22))
+#define HOST_SLC0_EXT_BIT3_INT_ENA_M  (BIT(22))
+#define HOST_SLC0_EXT_BIT3_INT_ENA_V  0x1
+#define HOST_SLC0_EXT_BIT3_INT_ENA_S  22
+/* HOST_SLC0_EXT_BIT2_INT_ENA : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT2_INT_ENA    (BIT(21))
+#define HOST_SLC0_EXT_BIT2_INT_ENA_M  (BIT(21))
+#define HOST_SLC0_EXT_BIT2_INT_ENA_V  0x1
+#define HOST_SLC0_EXT_BIT2_INT_ENA_S  21
+/* HOST_SLC0_EXT_BIT1_INT_ENA : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT1_INT_ENA    (BIT(20))
+#define HOST_SLC0_EXT_BIT1_INT_ENA_M  (BIT(20))
+#define HOST_SLC0_EXT_BIT1_INT_ENA_V  0x1
+#define HOST_SLC0_EXT_BIT1_INT_ENA_S  20
+/* HOST_SLC0_EXT_BIT0_INT_ENA : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT0_INT_ENA    (BIT(19))
+#define HOST_SLC0_EXT_BIT0_INT_ENA_M  (BIT(19))
+#define HOST_SLC0_EXT_BIT0_INT_ENA_V  0x1
+#define HOST_SLC0_EXT_BIT0_INT_ENA_S  19
+/* HOST_SLC0_RX_PF_VALID_INT_ENA : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_PF_VALID_INT_ENA    (BIT(18))
+#define HOST_SLC0_RX_PF_VALID_INT_ENA_M  (BIT(18))
+#define HOST_SLC0_RX_PF_VALID_INT_ENA_V  0x1
+#define HOST_SLC0_RX_PF_VALID_INT_ENA_S  18
+/* HOST_SLC0_TX_OVF_INT_ENA : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TX_OVF_INT_ENA    (BIT(17))
+#define HOST_SLC0_TX_OVF_INT_ENA_M  (BIT(17))
+#define HOST_SLC0_TX_OVF_INT_ENA_V  0x1
+#define HOST_SLC0_TX_OVF_INT_ENA_S  17
+/* HOST_SLC0_RX_UDF_INT_ENA : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_UDF_INT_ENA    (BIT(16))
+#define HOST_SLC0_RX_UDF_INT_ENA_M  (BIT(16))
+#define HOST_SLC0_RX_UDF_INT_ENA_V  0x1
+#define HOST_SLC0_RX_UDF_INT_ENA_S  16
+/* HOST_SLC0HOST_TX_START_INT_ENA : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_TX_START_INT_ENA    (BIT(15))
+#define HOST_SLC0HOST_TX_START_INT_ENA_M  (BIT(15))
+#define HOST_SLC0HOST_TX_START_INT_ENA_V  0x1
+#define HOST_SLC0HOST_TX_START_INT_ENA_S  15
+/* HOST_SLC0HOST_RX_START_INT_ENA : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_START_INT_ENA    (BIT(14))
+#define HOST_SLC0HOST_RX_START_INT_ENA_M  (BIT(14))
+#define HOST_SLC0HOST_RX_START_INT_ENA_V  0x1
+#define HOST_SLC0HOST_RX_START_INT_ENA_S  14
+/* HOST_SLC0HOST_RX_EOF_INT_ENA : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_EOF_INT_ENA    (BIT(13))
+#define HOST_SLC0HOST_RX_EOF_INT_ENA_M  (BIT(13))
+#define HOST_SLC0HOST_RX_EOF_INT_ENA_V  0x1
+#define HOST_SLC0HOST_RX_EOF_INT_ENA_S  13
+/* HOST_SLC0HOST_RX_SOF_INT_ENA : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_SOF_INT_ENA    (BIT(12))
+#define HOST_SLC0HOST_RX_SOF_INT_ENA_M  (BIT(12))
+#define HOST_SLC0HOST_RX_SOF_INT_ENA_V  0x1
+#define HOST_SLC0HOST_RX_SOF_INT_ENA_S  12
+/* HOST_SLC0_TOKEN1_0TO1_INT_ENA : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN1_0TO1_INT_ENA    (BIT(11))
+#define HOST_SLC0_TOKEN1_0TO1_INT_ENA_M  (BIT(11))
+#define HOST_SLC0_TOKEN1_0TO1_INT_ENA_V  0x1
+#define HOST_SLC0_TOKEN1_0TO1_INT_ENA_S  11
+/* HOST_SLC0_TOKEN0_0TO1_INT_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN0_0TO1_INT_ENA    (BIT(10))
+#define HOST_SLC0_TOKEN0_0TO1_INT_ENA_M  (BIT(10))
+#define HOST_SLC0_TOKEN0_0TO1_INT_ENA_V  0x1
+#define HOST_SLC0_TOKEN0_0TO1_INT_ENA_S  10
+/* HOST_SLC0_TOKEN1_1TO0_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN1_1TO0_INT_ENA    (BIT(9))
+#define HOST_SLC0_TOKEN1_1TO0_INT_ENA_M  (BIT(9))
+#define HOST_SLC0_TOKEN1_1TO0_INT_ENA_V  0x1
+#define HOST_SLC0_TOKEN1_1TO0_INT_ENA_S  9
+/* HOST_SLC0_TOKEN0_1TO0_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN0_1TO0_INT_ENA    (BIT(8))
+#define HOST_SLC0_TOKEN0_1TO0_INT_ENA_M  (BIT(8))
+#define HOST_SLC0_TOKEN0_1TO0_INT_ENA_V  0x1
+#define HOST_SLC0_TOKEN0_1TO0_INT_ENA_S  8
+/* HOST_SLC0_TOHOST_BIT7_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT7_INT_ENA    (BIT(7))
+#define HOST_SLC0_TOHOST_BIT7_INT_ENA_M  (BIT(7))
+#define HOST_SLC0_TOHOST_BIT7_INT_ENA_V  0x1
+#define HOST_SLC0_TOHOST_BIT7_INT_ENA_S  7
+/* HOST_SLC0_TOHOST_BIT6_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT6_INT_ENA    (BIT(6))
+#define HOST_SLC0_TOHOST_BIT6_INT_ENA_M  (BIT(6))
+#define HOST_SLC0_TOHOST_BIT6_INT_ENA_V  0x1
+#define HOST_SLC0_TOHOST_BIT6_INT_ENA_S  6
+/* HOST_SLC0_TOHOST_BIT5_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT5_INT_ENA    (BIT(5))
+#define HOST_SLC0_TOHOST_BIT5_INT_ENA_M  (BIT(5))
+#define HOST_SLC0_TOHOST_BIT5_INT_ENA_V  0x1
+#define HOST_SLC0_TOHOST_BIT5_INT_ENA_S  5
+/* HOST_SLC0_TOHOST_BIT4_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT4_INT_ENA    (BIT(4))
+#define HOST_SLC0_TOHOST_BIT4_INT_ENA_M  (BIT(4))
+#define HOST_SLC0_TOHOST_BIT4_INT_ENA_V  0x1
+#define HOST_SLC0_TOHOST_BIT4_INT_ENA_S  4
+/* HOST_SLC0_TOHOST_BIT3_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT3_INT_ENA    (BIT(3))
+#define HOST_SLC0_TOHOST_BIT3_INT_ENA_M  (BIT(3))
+#define HOST_SLC0_TOHOST_BIT3_INT_ENA_V  0x1
+#define HOST_SLC0_TOHOST_BIT3_INT_ENA_S  3
+/* HOST_SLC0_TOHOST_BIT2_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT2_INT_ENA    (BIT(2))
+#define HOST_SLC0_TOHOST_BIT2_INT_ENA_M  (BIT(2))
+#define HOST_SLC0_TOHOST_BIT2_INT_ENA_V  0x1
+#define HOST_SLC0_TOHOST_BIT2_INT_ENA_S  2
+/* HOST_SLC0_TOHOST_BIT1_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT1_INT_ENA    (BIT(1))
+#define HOST_SLC0_TOHOST_BIT1_INT_ENA_M  (BIT(1))
+#define HOST_SLC0_TOHOST_BIT1_INT_ENA_V  0x1
+#define HOST_SLC0_TOHOST_BIT1_INT_ENA_S  1
+/* HOST_SLC0_TOHOST_BIT0_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT0_INT_ENA    (BIT(0))
+#define HOST_SLC0_TOHOST_BIT0_INT_ENA_M  (BIT(0))
+#define HOST_SLC0_TOHOST_BIT0_INT_ENA_V  0x1
+#define HOST_SLC0_TOHOST_BIT0_INT_ENA_S  0
+
+#define HOST_SLC0HOST_RX_INFOR_REG          (DR_REG_SLCHOST_BASE + 0xF4)
+/* HOST_SLC0HOST_RX_INFOR : R/W ;bitpos:[19:0] ;default: 20'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_INFOR    0x000FFFFF
+#define HOST_SLC0HOST_RX_INFOR_M  ((HOST_SLC0HOST_RX_INFOR_V)<<(HOST_SLC0HOST_RX_INFOR_S))
+#define HOST_SLC0HOST_RX_INFOR_V  0xFFFFF
+#define HOST_SLC0HOST_RX_INFOR_S  0
+
+#define HOST_SLC0HOST_LEN_WD_REG          (DR_REG_SLCHOST_BASE + 0xFC)
+/* HOST_SLC0HOST_LEN_WD : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_LEN_WD    0xFFFFFFFF
+#define HOST_SLC0HOST_LEN_WD_M  ((HOST_SLC0HOST_LEN_WD_V)<<(HOST_SLC0HOST_LEN_WD_S))
+#define HOST_SLC0HOST_LEN_WD_V  0xFFFFFFFF
+#define HOST_SLC0HOST_LEN_WD_S  0
+
+#define HOST_SLC_APBWIN_WDATA_REG          (DR_REG_SLCHOST_BASE + 0x100)
+/* HOST_SLC_APBWIN_WDATA : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define HOST_SLC_APBWIN_WDATA    0xFFFFFFFF
+#define HOST_SLC_APBWIN_WDATA_M  ((HOST_SLC_APBWIN_WDATA_V)<<(HOST_SLC_APBWIN_WDATA_S))
+#define HOST_SLC_APBWIN_WDATA_V  0xFFFFFFFF
+#define HOST_SLC_APBWIN_WDATA_S  0
+
+#define HOST_SLC_APBWIN_CONF_REG          (DR_REG_SLCHOST_BASE + 0x104)
+/* HOST_SLC_APBWIN_BUS : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC_APBWIN_BUS    (BIT(30))
+#define HOST_SLC_APBWIN_BUS_M  (BIT(30))
+#define HOST_SLC_APBWIN_BUS_V  0x1
+#define HOST_SLC_APBWIN_BUS_S  30
+/* HOST_SLC_APBWIN_START : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC_APBWIN_START    (BIT(29))
+#define HOST_SLC_APBWIN_START_M  (BIT(29))
+#define HOST_SLC_APBWIN_START_V  0x1
+#define HOST_SLC_APBWIN_START_S  29
+/* HOST_SLC_APBWIN_WR : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC_APBWIN_WR    (BIT(28))
+#define HOST_SLC_APBWIN_WR_M  (BIT(28))
+#define HOST_SLC_APBWIN_WR_V  0x1
+#define HOST_SLC_APBWIN_WR_S  28
+/* HOST_SLC_APBWIN_ADDR : R/W ;bitpos:[27:0] ;default: 28'b0 ; */
+/*description: .*/
+#define HOST_SLC_APBWIN_ADDR    0x0FFFFFFF
+#define HOST_SLC_APBWIN_ADDR_M  ((HOST_SLC_APBWIN_ADDR_V)<<(HOST_SLC_APBWIN_ADDR_S))
+#define HOST_SLC_APBWIN_ADDR_V  0xFFFFFFF
+#define HOST_SLC_APBWIN_ADDR_S  0
+
+#define HOST_SLC_APBWIN_RDATA_REG          (DR_REG_SLCHOST_BASE + 0x108)
+/* HOST_SLC_APBWIN_RDATA : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define HOST_SLC_APBWIN_RDATA    0xFFFFFFFF
+#define HOST_SLC_APBWIN_RDATA_M  ((HOST_SLC_APBWIN_RDATA_V)<<(HOST_SLC_APBWIN_RDATA_S))
+#define HOST_SLC_APBWIN_RDATA_V  0xFFFFFFFF
+#define HOST_SLC_APBWIN_RDATA_S  0
+
+#define HOST_SLCHOST_RDCLR0_REG          (DR_REG_SLCHOST_BASE + 0x10C)
+/* HOST_SLCHOST_SLC0_BIT6_CLRADDR : R/W ;bitpos:[17:9] ;default: 9'h1e0 ; */
+/*description: .*/
+#define HOST_SLCHOST_SLC0_BIT6_CLRADDR    0x000001FF
+#define HOST_SLCHOST_SLC0_BIT6_CLRADDR_M  ((HOST_SLCHOST_SLC0_BIT6_CLRADDR_V)<<(HOST_SLCHOST_SLC0_BIT6_CLRADDR_S))
+#define HOST_SLCHOST_SLC0_BIT6_CLRADDR_V  0x1FF
+#define HOST_SLCHOST_SLC0_BIT6_CLRADDR_S  9
+/* HOST_SLCHOST_SLC0_BIT7_CLRADDR : R/W ;bitpos:[8:0] ;default: 9'h44 ; */
+/*description: .*/
+#define HOST_SLCHOST_SLC0_BIT7_CLRADDR    0x000001FF
+#define HOST_SLCHOST_SLC0_BIT7_CLRADDR_M  ((HOST_SLCHOST_SLC0_BIT7_CLRADDR_V)<<(HOST_SLCHOST_SLC0_BIT7_CLRADDR_S))
+#define HOST_SLCHOST_SLC0_BIT7_CLRADDR_V  0x1FF
+#define HOST_SLCHOST_SLC0_BIT7_CLRADDR_S  0
+
+#define HOST_SLC0HOST_INT_ENA1_REG          (DR_REG_SLCHOST_BASE + 0x114)
+/* HOST_GPIO_SDIO_INT_ENA1 : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_GPIO_SDIO_INT_ENA1    (BIT(25))
+#define HOST_GPIO_SDIO_INT_ENA1_M  (BIT(25))
+#define HOST_GPIO_SDIO_INT_ENA1_V  0x1
+#define HOST_GPIO_SDIO_INT_ENA1_S  25
+/* HOST_SLC0_HOST_RD_RETRY_INT_ENA1 : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_HOST_RD_RETRY_INT_ENA1    (BIT(24))
+#define HOST_SLC0_HOST_RD_RETRY_INT_ENA1_M  (BIT(24))
+#define HOST_SLC0_HOST_RD_RETRY_INT_ENA1_V  0x1
+#define HOST_SLC0_HOST_RD_RETRY_INT_ENA1_S  24
+/* HOST_SLC0_RX_NEW_PACKET_INT_ENA1 : R/W ;bitpos:[23] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_NEW_PACKET_INT_ENA1    (BIT(23))
+#define HOST_SLC0_RX_NEW_PACKET_INT_ENA1_M  (BIT(23))
+#define HOST_SLC0_RX_NEW_PACKET_INT_ENA1_V  0x1
+#define HOST_SLC0_RX_NEW_PACKET_INT_ENA1_S  23
+/* HOST_SLC0_EXT_BIT3_INT_ENA1 : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT3_INT_ENA1    (BIT(22))
+#define HOST_SLC0_EXT_BIT3_INT_ENA1_M  (BIT(22))
+#define HOST_SLC0_EXT_BIT3_INT_ENA1_V  0x1
+#define HOST_SLC0_EXT_BIT3_INT_ENA1_S  22
+/* HOST_SLC0_EXT_BIT2_INT_ENA1 : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT2_INT_ENA1    (BIT(21))
+#define HOST_SLC0_EXT_BIT2_INT_ENA1_M  (BIT(21))
+#define HOST_SLC0_EXT_BIT2_INT_ENA1_V  0x1
+#define HOST_SLC0_EXT_BIT2_INT_ENA1_S  21
+/* HOST_SLC0_EXT_BIT1_INT_ENA1 : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT1_INT_ENA1    (BIT(20))
+#define HOST_SLC0_EXT_BIT1_INT_ENA1_M  (BIT(20))
+#define HOST_SLC0_EXT_BIT1_INT_ENA1_V  0x1
+#define HOST_SLC0_EXT_BIT1_INT_ENA1_S  20
+/* HOST_SLC0_EXT_BIT0_INT_ENA1 : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_EXT_BIT0_INT_ENA1    (BIT(19))
+#define HOST_SLC0_EXT_BIT0_INT_ENA1_M  (BIT(19))
+#define HOST_SLC0_EXT_BIT0_INT_ENA1_V  0x1
+#define HOST_SLC0_EXT_BIT0_INT_ENA1_S  19
+/* HOST_SLC0_RX_PF_VALID_INT_ENA1 : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_PF_VALID_INT_ENA1    (BIT(18))
+#define HOST_SLC0_RX_PF_VALID_INT_ENA1_M  (BIT(18))
+#define HOST_SLC0_RX_PF_VALID_INT_ENA1_V  0x1
+#define HOST_SLC0_RX_PF_VALID_INT_ENA1_S  18
+/* HOST_SLC0_TX_OVF_INT_ENA1 : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TX_OVF_INT_ENA1    (BIT(17))
+#define HOST_SLC0_TX_OVF_INT_ENA1_M  (BIT(17))
+#define HOST_SLC0_TX_OVF_INT_ENA1_V  0x1
+#define HOST_SLC0_TX_OVF_INT_ENA1_S  17
+/* HOST_SLC0_RX_UDF_INT_ENA1 : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_RX_UDF_INT_ENA1    (BIT(16))
+#define HOST_SLC0_RX_UDF_INT_ENA1_M  (BIT(16))
+#define HOST_SLC0_RX_UDF_INT_ENA1_V  0x1
+#define HOST_SLC0_RX_UDF_INT_ENA1_S  16
+/* HOST_SLC0HOST_TX_START_INT_ENA1 : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_TX_START_INT_ENA1    (BIT(15))
+#define HOST_SLC0HOST_TX_START_INT_ENA1_M  (BIT(15))
+#define HOST_SLC0HOST_TX_START_INT_ENA1_V  0x1
+#define HOST_SLC0HOST_TX_START_INT_ENA1_S  15
+/* HOST_SLC0HOST_RX_START_INT_ENA1 : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_START_INT_ENA1    (BIT(14))
+#define HOST_SLC0HOST_RX_START_INT_ENA1_M  (BIT(14))
+#define HOST_SLC0HOST_RX_START_INT_ENA1_V  0x1
+#define HOST_SLC0HOST_RX_START_INT_ENA1_S  14
+/* HOST_SLC0HOST_RX_EOF_INT_ENA1 : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_EOF_INT_ENA1    (BIT(13))
+#define HOST_SLC0HOST_RX_EOF_INT_ENA1_M  (BIT(13))
+#define HOST_SLC0HOST_RX_EOF_INT_ENA1_V  0x1
+#define HOST_SLC0HOST_RX_EOF_INT_ENA1_S  13
+/* HOST_SLC0HOST_RX_SOF_INT_ENA1 : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0HOST_RX_SOF_INT_ENA1    (BIT(12))
+#define HOST_SLC0HOST_RX_SOF_INT_ENA1_M  (BIT(12))
+#define HOST_SLC0HOST_RX_SOF_INT_ENA1_V  0x1
+#define HOST_SLC0HOST_RX_SOF_INT_ENA1_S  12
+/* HOST_SLC0_TOKEN1_0TO1_INT_ENA1 : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN1_0TO1_INT_ENA1    (BIT(11))
+#define HOST_SLC0_TOKEN1_0TO1_INT_ENA1_M  (BIT(11))
+#define HOST_SLC0_TOKEN1_0TO1_INT_ENA1_V  0x1
+#define HOST_SLC0_TOKEN1_0TO1_INT_ENA1_S  11
+/* HOST_SLC0_TOKEN0_0TO1_INT_ENA1 : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN0_0TO1_INT_ENA1    (BIT(10))
+#define HOST_SLC0_TOKEN0_0TO1_INT_ENA1_M  (BIT(10))
+#define HOST_SLC0_TOKEN0_0TO1_INT_ENA1_V  0x1
+#define HOST_SLC0_TOKEN0_0TO1_INT_ENA1_S  10
+/* HOST_SLC0_TOKEN1_1TO0_INT_ENA1 : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN1_1TO0_INT_ENA1    (BIT(9))
+#define HOST_SLC0_TOKEN1_1TO0_INT_ENA1_M  (BIT(9))
+#define HOST_SLC0_TOKEN1_1TO0_INT_ENA1_V  0x1
+#define HOST_SLC0_TOKEN1_1TO0_INT_ENA1_S  9
+/* HOST_SLC0_TOKEN0_1TO0_INT_ENA1 : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOKEN0_1TO0_INT_ENA1    (BIT(8))
+#define HOST_SLC0_TOKEN0_1TO0_INT_ENA1_M  (BIT(8))
+#define HOST_SLC0_TOKEN0_1TO0_INT_ENA1_V  0x1
+#define HOST_SLC0_TOKEN0_1TO0_INT_ENA1_S  8
+/* HOST_SLC0_TOHOST_BIT7_INT_ENA1 : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT7_INT_ENA1    (BIT(7))
+#define HOST_SLC0_TOHOST_BIT7_INT_ENA1_M  (BIT(7))
+#define HOST_SLC0_TOHOST_BIT7_INT_ENA1_V  0x1
+#define HOST_SLC0_TOHOST_BIT7_INT_ENA1_S  7
+/* HOST_SLC0_TOHOST_BIT6_INT_ENA1 : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT6_INT_ENA1    (BIT(6))
+#define HOST_SLC0_TOHOST_BIT6_INT_ENA1_M  (BIT(6))
+#define HOST_SLC0_TOHOST_BIT6_INT_ENA1_V  0x1
+#define HOST_SLC0_TOHOST_BIT6_INT_ENA1_S  6
+/* HOST_SLC0_TOHOST_BIT5_INT_ENA1 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT5_INT_ENA1    (BIT(5))
+#define HOST_SLC0_TOHOST_BIT5_INT_ENA1_M  (BIT(5))
+#define HOST_SLC0_TOHOST_BIT5_INT_ENA1_V  0x1
+#define HOST_SLC0_TOHOST_BIT5_INT_ENA1_S  5
+/* HOST_SLC0_TOHOST_BIT4_INT_ENA1 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT4_INT_ENA1    (BIT(4))
+#define HOST_SLC0_TOHOST_BIT4_INT_ENA1_M  (BIT(4))
+#define HOST_SLC0_TOHOST_BIT4_INT_ENA1_V  0x1
+#define HOST_SLC0_TOHOST_BIT4_INT_ENA1_S  4
+/* HOST_SLC0_TOHOST_BIT3_INT_ENA1 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT3_INT_ENA1    (BIT(3))
+#define HOST_SLC0_TOHOST_BIT3_INT_ENA1_M  (BIT(3))
+#define HOST_SLC0_TOHOST_BIT3_INT_ENA1_V  0x1
+#define HOST_SLC0_TOHOST_BIT3_INT_ENA1_S  3
+/* HOST_SLC0_TOHOST_BIT2_INT_ENA1 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT2_INT_ENA1    (BIT(2))
+#define HOST_SLC0_TOHOST_BIT2_INT_ENA1_M  (BIT(2))
+#define HOST_SLC0_TOHOST_BIT2_INT_ENA1_V  0x1
+#define HOST_SLC0_TOHOST_BIT2_INT_ENA1_S  2
+/* HOST_SLC0_TOHOST_BIT1_INT_ENA1 : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT1_INT_ENA1    (BIT(1))
+#define HOST_SLC0_TOHOST_BIT1_INT_ENA1_M  (BIT(1))
+#define HOST_SLC0_TOHOST_BIT1_INT_ENA1_V  0x1
+#define HOST_SLC0_TOHOST_BIT1_INT_ENA1_S  1
+/* HOST_SLC0_TOHOST_BIT0_INT_ENA1 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SLC0_TOHOST_BIT0_INT_ENA1    (BIT(0))
+#define HOST_SLC0_TOHOST_BIT0_INT_ENA1_M  (BIT(0))
+#define HOST_SLC0_TOHOST_BIT0_INT_ENA1_V  0x1
+#define HOST_SLC0_TOHOST_BIT0_INT_ENA1_S  0
+
+#define HOST_SLCHOSTDATE_REG          (DR_REG_SLCHOST_BASE + 0x178)
+/* HOST_SLCHOST_DATE : R/W ;bitpos:[31:0] ;default: 32'h18080700 ; */
+/*description: .*/
+#define HOST_SLCHOST_DATE    0xFFFFFFFF
+#define HOST_SLCHOST_DATE_M  ((HOST_SLCHOST_DATE_V)<<(HOST_SLCHOST_DATE_S))
+#define HOST_SLCHOST_DATE_V  0xFFFFFFFF
+#define HOST_SLCHOST_DATE_S  0
+
+#define HOST_SLCHOSTID_REG          (DR_REG_SLCHOST_BASE + 0x17C)
+/* HOST_SLCHOST_ID : R/W ;bitpos:[31:0] ;default: 32'h0600 ; */
+/*description: .*/
+#define HOST_SLCHOST_ID    0xFFFFFFFF
+#define HOST_SLCHOST_ID_M  ((HOST_SLCHOST_ID_V)<<(HOST_SLCHOST_ID_S))
+#define HOST_SLCHOST_ID_V  0xFFFFFFFF
+#define HOST_SLCHOST_ID_S  0
+
+#define HOST_SLCHOST_CONF_REG          (DR_REG_SLCHOST_BASE + 0x1F0)
+/* HOST_HSPEED_CON_EN : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_HSPEED_CON_EN    (BIT(27))
+#define HOST_HSPEED_CON_EN_M  (BIT(27))
+#define HOST_HSPEED_CON_EN_V  0x1
+#define HOST_HSPEED_CON_EN_S  27
+/* HOST_SDIO_PAD_PULLUP : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SDIO_PAD_PULLUP    (BIT(26))
+#define HOST_SDIO_PAD_PULLUP_M  (BIT(26))
+#define HOST_SDIO_PAD_PULLUP_V  0x1
+#define HOST_SDIO_PAD_PULLUP_S  26
+/* HOST_SDIO20_INT_DELAY : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define HOST_SDIO20_INT_DELAY    (BIT(25))
+#define HOST_SDIO20_INT_DELAY_M  (BIT(25))
+#define HOST_SDIO20_INT_DELAY_V  0x1
+#define HOST_SDIO20_INT_DELAY_S  25
+/* HOST_FRC_QUICK_IN : R/W ;bitpos:[24:20] ;default: 5'b0 ; */
+/*description: .*/
+#define HOST_FRC_QUICK_IN    0x0000001F
+#define HOST_FRC_QUICK_IN_M  ((HOST_FRC_QUICK_IN_V)<<(HOST_FRC_QUICK_IN_S))
+#define HOST_FRC_QUICK_IN_V  0x1F
+#define HOST_FRC_QUICK_IN_S  20
+/* HOST_FRC_POS_SAMP : R/W ;bitpos:[19:15] ;default: 5'b0 ; */
+/*description: .*/
+#define HOST_FRC_POS_SAMP    0x0000001F
+#define HOST_FRC_POS_SAMP_M  ((HOST_FRC_POS_SAMP_V)<<(HOST_FRC_POS_SAMP_S))
+#define HOST_FRC_POS_SAMP_V  0x1F
+#define HOST_FRC_POS_SAMP_S  15
+/* HOST_FRC_NEG_SAMP : R/W ;bitpos:[14:10] ;default: 5'b0 ; */
+/*description: .*/
+#define HOST_FRC_NEG_SAMP    0x0000001F
+#define HOST_FRC_NEG_SAMP_M  ((HOST_FRC_NEG_SAMP_V)<<(HOST_FRC_NEG_SAMP_S))
+#define HOST_FRC_NEG_SAMP_V  0x1F
+#define HOST_FRC_NEG_SAMP_S  10
+/* HOST_FRC_SDIO20 : R/W ;bitpos:[9:5] ;default: 5'b0 ; */
+/*description: .*/
+#define HOST_FRC_SDIO20    0x0000001F
+#define HOST_FRC_SDIO20_M  ((HOST_FRC_SDIO20_V)<<(HOST_FRC_SDIO20_S))
+#define HOST_FRC_SDIO20_V  0x1F
+#define HOST_FRC_SDIO20_S  5
+/* HOST_FRC_SDIO11 : R/W ;bitpos:[4:0] ;default: 5'b0 ; */
+/*description: .*/
+#define HOST_FRC_SDIO11    0x0000001F
+#define HOST_FRC_SDIO11_M  ((HOST_FRC_SDIO11_V)<<(HOST_FRC_SDIO11_S))
+#define HOST_FRC_SDIO11_V  0x1F
+#define HOST_FRC_SDIO11_S  0
+
+#define HOST_SLCHOST_INF_ST_REG          (DR_REG_SLCHOST_BASE + 0x1F4)
+/* HOST_SDIO_QUICK_IN : RO ;bitpos:[14:10] ;default: 5'b0 ; */
+/*description: .*/
+#define HOST_SDIO_QUICK_IN    0x0000001F
+#define HOST_SDIO_QUICK_IN_M  ((HOST_SDIO_QUICK_IN_V)<<(HOST_SDIO_QUICK_IN_S))
+#define HOST_SDIO_QUICK_IN_V  0x1F
+#define HOST_SDIO_QUICK_IN_S  10
+/* HOST_SDIO_NEG_SAMP : RO ;bitpos:[9:5] ;default: 5'b0 ; */
+/*description: .*/
+#define HOST_SDIO_NEG_SAMP    0x0000001F
+#define HOST_SDIO_NEG_SAMP_M  ((HOST_SDIO_NEG_SAMP_V)<<(HOST_SDIO_NEG_SAMP_S))
+#define HOST_SDIO_NEG_SAMP_V  0x1F
+#define HOST_SDIO_NEG_SAMP_S  5
+/* HOST_SDIO20_MODE : RO ;bitpos:[4:0] ;default: 5'b0 ; */
+/*description: .*/
+#define HOST_SDIO20_MODE    0x0000001F
+#define HOST_SDIO20_MODE_M  ((HOST_SDIO20_MODE_V)<<(HOST_SDIO20_MODE_S))
+#define HOST_SDIO20_MODE_V  0x1F
+#define HOST_SDIO20_MODE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_HOST_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/host_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/host_struct.h
new file mode 100644
index 00000000000..1a6b89e2817
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/host_struct.h
@@ -0,0 +1,607 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_HOST_STRUCT_H_
+#define _SOC_HOST_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct host_dev_s {
+    uint32_t reserved_0;
+    uint32_t reserved_4;
+    uint32_t reserved_8;
+    uint32_t reserved_c;
+    uint32_t reserved_10;
+    uint32_t reserved_14;
+    uint32_t reserved_18;
+    uint32_t reserved_1c;
+    union {
+        struct {
+            uint32_t func1_mdstat                  :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } func2_2;
+    uint32_t reserved_24;
+    uint32_t reserved_28;
+    uint32_t reserved_2c;
+    uint32_t reserved_30;
+    uint32_t gpio_status0;
+    union {
+        struct {
+            uint32_t sdio_int1                     :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } gpio_status1;
+    uint32_t gpio_in0;
+    union {
+        struct {
+            uint32_t sdio_in1                      :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } gpio_in1;
+    union {
+        struct {
+            uint32_t token0                        :    12;
+            uint32_t rx_pf_valid                   :    1;
+            uint32_t reserved13                    :    3;
+            uint32_t reg_token1                    :    12;
+            uint32_t rx_pf_eof                     :    4;
+        };
+        uint32_t val;
+    } slc0_token_rdata;
+    uint32_t slc0_pf;
+    uint32_t reserved_4c;
+    union {
+        struct {
+            uint32_t tohost_bit0                   :    1;
+            uint32_t tohost_bit1                   :    1;
+            uint32_t tohost_bit2                   :    1;
+            uint32_t tohost_bit3                   :    1;
+            uint32_t tohost_bit4                   :    1;
+            uint32_t tohost_bit5                   :    1;
+            uint32_t tohost_bit6                   :    1;
+            uint32_t tohost_bit7                   :    1;
+            uint32_t token0_1to0                   :    1;
+            uint32_t token1_1to0                   :    1;
+            uint32_t token0_0to1                   :    1;
+            uint32_t token1_0to1                   :    1;
+            uint32_t rx_sof                        :    1;
+            uint32_t rx_eof                        :    1;
+            uint32_t rx_start                      :    1;
+            uint32_t tx_start                      :    1;
+            uint32_t rx_udf                        :    1;
+            uint32_t tx_ovf                        :    1;
+            uint32_t rx_pf_valid                   :    1;
+            uint32_t ext_bit0                      :    1;
+            uint32_t ext_bit1                      :    1;
+            uint32_t ext_bit2                      :    1;
+            uint32_t ext_bit3                      :    1;
+            uint32_t rx_new_packet                 :    1;
+            uint32_t rd_retry                      :    1;
+            uint32_t gpio_sdio                     :    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } slc0_int_raw;
+    uint32_t reserved_54;
+    union {
+        struct {
+            uint32_t tohost_bit0                   :    1;
+            uint32_t tohost_bit1                   :    1;
+            uint32_t tohost_bit2                   :    1;
+            uint32_t tohost_bit3                   :    1;
+            uint32_t tohost_bit4                   :    1;
+            uint32_t tohost_bit5                   :    1;
+            uint32_t tohost_bit6                   :    1;
+            uint32_t tohost_bit7                   :    1;
+            uint32_t token0_1to0                   :    1;
+            uint32_t token1_1to0                   :    1;
+            uint32_t token0_0to1                   :    1;
+            uint32_t token1_0to1                   :    1;
+            uint32_t rx_sof                        :    1;
+            uint32_t rx_eof                        :    1;
+            uint32_t rx_start                      :    1;
+            uint32_t tx_start                      :    1;
+            uint32_t rx_udf                        :    1;
+            uint32_t tx_ovf                        :    1;
+            uint32_t rx_pf_valid                   :    1;
+            uint32_t ext_bit0                      :    1;
+            uint32_t ext_bit1                      :    1;
+            uint32_t ext_bit2                      :    1;
+            uint32_t ext_bit3                      :    1;
+            uint32_t rx_new_packet                 :    1;
+            uint32_t rd_retry                      :    1;
+            uint32_t gpio_sdio                     :    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } slc0_int_st;
+    uint32_t reserved_5c;
+    union {
+        struct {
+            uint32_t reg_slc0_len                  :    20;
+            uint32_t reg_slc0_len_check            :    12;
+        };
+        uint32_t val;
+    } pkt_len;
+    union {
+        struct {
+            uint32_t state0                        :    8;
+            uint32_t state1                        :    8;
+            uint32_t state2                        :    8;
+            uint32_t state3                        :    8;
+        };
+        uint32_t val;
+    } state_w0;
+    union {
+        struct {
+            uint32_t state4                        :    8;
+            uint32_t state5                        :    8;
+            uint32_t state6                        :    8;
+            uint32_t state7                        :    8;
+        };
+        uint32_t val;
+    } state_w1;
+    union {
+        struct {
+            uint32_t conf0                         :    8;
+            uint32_t conf1                         :    8;
+            uint32_t conf2                         :    8;
+            uint32_t conf3                         :    8;
+        };
+        uint32_t val;
+    } conf_w0;
+    union {
+        struct {
+            uint32_t conf4                         :    8;
+            uint32_t conf5                         :    8;
+            uint32_t conf6                         :    8;
+            uint32_t conf7                         :    8;
+        };
+        uint32_t val;
+    } conf_w1;
+    union {
+        struct {
+            uint32_t conf8                         :    8;
+            uint32_t conf9                         :    8;
+            uint32_t conf10                        :    8;
+            uint32_t conf11                        :    8;
+        };
+        uint32_t val;
+    } conf_w2;
+    union {
+        struct {
+            uint32_t conf12                        :    8;
+            uint32_t conf13                        :    8;
+            uint32_t conf14                        :    8;
+            uint32_t conf15                        :    8;
+        };
+        uint32_t val;
+    } conf_w3;
+    union {
+        struct {
+            uint32_t conf16                        :    8;  /*SLC timeout value*/
+            uint32_t conf17                        :    8;  /*SLC timeout enable*/
+            uint32_t conf18                        :    8;
+            uint32_t conf19                        :    8;  /*Interrupt to target CPU*/
+        };
+        uint32_t val;
+    } conf_w4;
+    union {
+        struct {
+            uint32_t conf20                        :    8;
+            uint32_t conf21                        :    8;
+            uint32_t conf22                        :    8;
+            uint32_t conf23                        :    8;
+        };
+        uint32_t val;
+    } conf_w5;
+    union {
+        struct {
+            uint32_t win_cmd                       :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } win_cmd;
+    union {
+        struct {
+            uint32_t conf24                        :    8;
+            uint32_t conf25                        :    8;
+            uint32_t conf26                        :    8;
+            uint32_t conf27                        :    8;
+        };
+        uint32_t val;
+    } conf_w6;
+    union {
+        struct {
+            uint32_t conf28                        :    8;
+            uint32_t conf29                        :    8;
+            uint32_t conf30                        :    8;
+            uint32_t conf31                        :    8;
+        };
+        uint32_t val;
+    } conf_w7;
+    union {
+        struct {
+            uint32_t reg_slc0_len0                 :    20;
+            uint32_t reg_slc0_len0_check           :    12;
+        };
+        uint32_t val;
+    } pkt_len0;
+    union {
+        struct {
+            uint32_t reg_slc0_len1                 :    20;
+            uint32_t reg_slc0_len1_check           :    12;
+        };
+        uint32_t val;
+    } pkt_len1;
+    union {
+        struct {
+            uint32_t reg_slc0_len2                 :    20;
+            uint32_t reg_slc0_len2_check           :    12;
+        };
+        uint32_t val;
+    } pkt_len2;
+    union {
+        struct {
+            uint32_t conf32                        :    8;
+            uint32_t conf33                        :    8;
+            uint32_t conf34                        :    8;
+            uint32_t conf35                        :    8;
+        };
+        uint32_t val;
+    } conf_w8;
+    union {
+        struct {
+            uint32_t conf36                        :    8;
+            uint32_t conf37                        :    8;
+            uint32_t conf38                        :    8;
+            uint32_t conf39                        :    8;
+        };
+        uint32_t val;
+    } conf_w9;
+    union {
+        struct {
+            uint32_t conf40                        :    8;
+            uint32_t conf41                        :    8;
+            uint32_t conf42                        :    8;
+            uint32_t conf43                        :    8;
+        };
+        uint32_t val;
+    } conf_w10;
+    union {
+        struct {
+            uint32_t conf44                        :    8;
+            uint32_t conf45                        :    8;
+            uint32_t conf46                        :    8;
+            uint32_t conf47                        :    8;
+        };
+        uint32_t val;
+    } conf_w11;
+    union {
+        struct {
+            uint32_t conf48                        :    8;
+            uint32_t conf49                        :    8;
+            uint32_t conf50                        :    8;
+            uint32_t conf51                        :    8;
+        };
+        uint32_t val;
+    } conf_w12;
+    union {
+        struct {
+            uint32_t conf52                        :    8;
+            uint32_t conf53                        :    8;
+            uint32_t conf54                        :    8;
+            uint32_t conf55                        :    8;
+        };
+        uint32_t val;
+    } conf_w13;
+    union {
+        struct {
+            uint32_t conf56                        :    8;
+            uint32_t conf57                        :    8;
+            uint32_t conf58                        :    8;
+            uint32_t conf59                        :    8;
+        };
+        uint32_t val;
+    } conf_w14;
+    union {
+        struct {
+            uint32_t conf60                        :    8;
+            uint32_t conf61                        :    8;
+            uint32_t conf62                        :    8;
+            uint32_t conf63                        :    8;
+        };
+        uint32_t val;
+    } conf_w15;
+    uint32_t check_sum0;
+    uint32_t check_sum1;
+    uint32_t reserved_c4;
+    union {
+        struct {
+            uint32_t token0_wd                     :    12;
+            uint32_t reserved12                    :    4;
+            uint32_t token1_wd                     :    12;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } slc0_token_wdata;
+    uint32_t reserved_cc;
+    union {
+        struct {
+            uint32_t slc0_token0_dec               :    1;
+            uint32_t slc0_token1_dec               :    1;
+            uint32_t slc0_token0_wr                :    1;
+            uint32_t slc0_token1_wr                :    1;
+            uint32_t reserved4                     :    4;
+            uint32_t slc0_len_wr                   :    1;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } token_con;
+    union {
+        struct {
+            uint32_t tohost_bit0                   :    1;
+            uint32_t tohost_bit1                   :    1;
+            uint32_t tohost_bit2                   :    1;
+            uint32_t tohost_bit3                   :    1;
+            uint32_t tohost_bit4                   :    1;
+            uint32_t tohost_bit5                   :    1;
+            uint32_t tohost_bit6                   :    1;
+            uint32_t tohost_bit7                   :    1;
+            uint32_t token0_1to0                   :    1;
+            uint32_t token1_1to0                   :    1;
+            uint32_t token0_0to1                   :    1;
+            uint32_t token1_0to1                   :    1;
+            uint32_t rx_sof                        :    1;
+            uint32_t rx_eof                        :    1;
+            uint32_t rx_start                      :    1;
+            uint32_t tx_start                      :    1;
+            uint32_t rx_udf                        :    1;
+            uint32_t tx_ovf                        :    1;
+            uint32_t rx_pf_valid                   :    1;
+            uint32_t ext_bit0                      :    1;
+            uint32_t ext_bit1                      :    1;
+            uint32_t ext_bit2                      :    1;
+            uint32_t ext_bit3                      :    1;
+            uint32_t rx_new_packet                 :    1;
+            uint32_t rd_retry                      :    1;
+            uint32_t gpio_sdio                     :    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } slc0_int_clr;
+    uint32_t reserved_d8;
+    union {
+        struct {
+            uint32_t tohost_bit0                   :    1;
+            uint32_t tohost_bit1                   :    1;
+            uint32_t tohost_bit2                   :    1;
+            uint32_t tohost_bit3                   :    1;
+            uint32_t tohost_bit4                   :    1;
+            uint32_t tohost_bit5                   :    1;
+            uint32_t tohost_bit6                   :    1;
+            uint32_t tohost_bit7                   :    1;
+            uint32_t token0_1to0                   :    1;
+            uint32_t token1_1to0                   :    1;
+            uint32_t token0_0to1                   :    1;
+            uint32_t token1_0to1                   :    1;
+            uint32_t rx_sof                        :    1;
+            uint32_t rx_eof                        :    1;
+            uint32_t rx_start                      :    1;
+            uint32_t tx_start                      :    1;
+            uint32_t rx_udf                        :    1;
+            uint32_t tx_ovf                        :    1;
+            uint32_t rx_pf_valid                   :    1;
+            uint32_t ext_bit0                      :    1;
+            uint32_t ext_bit1                      :    1;
+            uint32_t ext_bit2                      :    1;
+            uint32_t ext_bit3                      :    1;
+            uint32_t rx_new_packet                 :    1;
+            uint32_t rd_retry                      :    1;
+            uint32_t gpio_sdio                     :    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } slc0_func1_int_ena;
+    uint32_t reserved_e0;
+    uint32_t reserved_e4;
+    uint32_t reserved_e8;
+    union {
+        struct {
+            uint32_t tohost_bit0                   :    1;
+            uint32_t tohost_bit1                   :    1;
+            uint32_t tohost_bit2                   :    1;
+            uint32_t tohost_bit3                   :    1;
+            uint32_t tohost_bit4                   :    1;
+            uint32_t tohost_bit5                   :    1;
+            uint32_t tohost_bit6                   :    1;
+            uint32_t tohost_bit7                   :    1;
+            uint32_t token0_1to0                   :    1;
+            uint32_t token1_1to0                   :    1;
+            uint32_t token0_0to1                   :    1;
+            uint32_t token1_0to1                   :    1;
+            uint32_t rx_sof                        :    1;
+            uint32_t rx_eof                        :    1;
+            uint32_t rx_start                      :    1;
+            uint32_t tx_start                      :    1;
+            uint32_t rx_udf                        :    1;
+            uint32_t tx_ovf                        :    1;
+            uint32_t rx_pf_valid                   :    1;
+            uint32_t ext_bit0                      :    1;
+            uint32_t ext_bit1                      :    1;
+            uint32_t ext_bit2                      :    1;
+            uint32_t ext_bit3                      :    1;
+            uint32_t rx_new_packet                 :    1;
+            uint32_t rd_retry                      :    1;
+            uint32_t gpio_sdio                     :    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } slc0_int_ena;
+    uint32_t reserved_f0;
+    union {
+        struct {
+            uint32_t infor                         :    20;
+            uint32_t reserved20                    :    12;
+        };
+        uint32_t val;
+    } slc0_rx_infor;
+    uint32_t reserved_f8;
+    uint32_t slc0_len_wd;
+    uint32_t apbwin_wdata;
+    union {
+        struct {
+            uint32_t addr                          :    28;
+            uint32_t wr                            :    1;
+            uint32_t start                         :    1;
+            uint32_t bus                           :    1;
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } apbwin_conf;
+    uint32_t apbwin_rdata;
+    union {
+        struct {
+            uint32_t bit7_clraddr                  :    9;
+            uint32_t bit6_clraddr                  :    9;
+            uint32_t reserved18                    :    14;
+        };
+        uint32_t val;
+    } slc0_rdclr;
+    uint32_t reserved_110;
+    union {
+        struct {
+            uint32_t tohost_bit01                  :    1;
+            uint32_t tohost_bit11                  :    1;
+            uint32_t tohost_bit21                  :    1;
+            uint32_t tohost_bit31                  :    1;
+            uint32_t tohost_bit41                  :    1;
+            uint32_t tohost_bit51                  :    1;
+            uint32_t tohost_bit61                  :    1;
+            uint32_t tohost_bit71                  :    1;
+            uint32_t token0_1to01                  :    1;
+            uint32_t token1_1to01                  :    1;
+            uint32_t token0_0to11                  :    1;
+            uint32_t token1_0to11                  :    1;
+            uint32_t rx_sof1                       :    1;
+            uint32_t rx_eof1                       :    1;
+            uint32_t rx_start1                     :    1;
+            uint32_t tx_start1                     :    1;
+            uint32_t rx_udf1                       :    1;
+            uint32_t tx_ovf1                       :    1;
+            uint32_t rx_pf_valid1                  :    1;
+            uint32_t ext_bit01                     :    1;
+            uint32_t ext_bit11                     :    1;
+            uint32_t ext_bit21                     :    1;
+            uint32_t ext_bit31                     :    1;
+            uint32_t rx_new_packet1                :    1;
+            uint32_t rd_retry1                     :    1;
+            uint32_t gpio_sdio1                    :    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } slc0_int_ena1;
+    uint32_t reserved_118;
+    uint32_t reserved_11c;
+    uint32_t reserved_120;
+    uint32_t reserved_124;
+    uint32_t reserved_128;
+    uint32_t reserved_12c;
+    uint32_t reserved_130;
+    uint32_t reserved_134;
+    uint32_t reserved_138;
+    uint32_t reserved_13c;
+    uint32_t reserved_140;
+    uint32_t reserved_144;
+    uint32_t reserved_148;
+    uint32_t reserved_14c;
+    uint32_t reserved_150;
+    uint32_t reserved_154;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t date;
+    uint32_t id;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    union {
+        struct {
+            uint32_t frc_sdio11                    :    5;
+            uint32_t frc_sdio20                    :    5;
+            uint32_t frc_neg_samp                  :    5;
+            uint32_t frc_pos_samp                  :    5;
+            uint32_t frc_quick_in                  :    5;
+            uint32_t sdio20_int_delay              :    1;
+            uint32_t sdio_pad_pullup               :    1;
+            uint32_t hspeed_con_en                 :    1;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } conf;
+    union {
+        struct {
+            uint32_t sdio20_mode                   :    5;
+            uint32_t sdio_neg_samp                 :    5;
+            uint32_t sdio_quick_in                 :    5;
+            uint32_t reserved15                    :    17;
+        };
+        uint32_t val;
+    } inf_st;
+} host_dev_t;
+extern host_dev_t HOST;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_HOST_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/hwcrypto_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/hwcrypto_reg.h
new file mode 100644
index 00000000000..a4b93fb81b9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/hwcrypto_reg.h
@@ -0,0 +1,148 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "soc.h"
+
+/* registers for RSA acceleration via Multiple Precision Integer ops */
+#define RSA_MEM_M_BLOCK_BASE          ((DR_REG_RSA_BASE)+0x000)
+/* RB & Z use the same memory block, depending on phase of operation */
+#define RSA_MEM_RB_BLOCK_BASE         ((DR_REG_RSA_BASE)+0x200)
+#define RSA_MEM_Z_BLOCK_BASE          ((DR_REG_RSA_BASE)+0x200)
+#define RSA_MEM_Y_BLOCK_BASE          ((DR_REG_RSA_BASE)+0x400)
+#define RSA_MEM_X_BLOCK_BASE          ((DR_REG_RSA_BASE)+0x600)
+
+/* Configuration registers */
+#define RSA_M_DASH_REG                (DR_REG_RSA_BASE + 0x800)
+#define RSA_LENGTH_REG                (DR_REG_RSA_BASE + 0x804)
+#define RSA_CONSTANT_TIME_REG         (DR_REG_RSA_BASE + 0x820)
+#define RSA_SEARCH_OPEN_REG           (DR_REG_RSA_BASE + 0x824)
+#define RSA_SEARCH_POS_REG            (DR_REG_RSA_BASE + 0x828)
+
+/* Initialization registers */
+#define RSA_QUERY_CLEAN_REG           (DR_REG_RSA_BASE + 0x808)
+
+/* Calculation start registers */
+#define RSA_MODEXP_START_REG          (DR_REG_RSA_BASE + 0x80c)
+#define RSA_MOD_MULT_START_REG        (DR_REG_RSA_BASE + 0x810)
+#define RSA_MULT_START_REG            (DR_REG_RSA_BASE + 0x814)
+
+/* Interrupt registers */
+#define RSA_QUERY_INTERRUPT_REG       (DR_REG_RSA_BASE + 0x818)
+#define RSA_CLEAR_INTERRUPT_REG       (DR_REG_RSA_BASE + 0x81C)
+#define RSA_INTERRUPT_REG             (DR_REG_RSA_BASE + 0x82C)
+
+/* SHA acceleration registers */
+#define SHA_MODE_REG                  ((DR_REG_SHA_BASE) + 0x00)
+#define SHA_T_STRING_REG              ((DR_REG_SHA_BASE) + 0x04)
+#define SHA_T_LENGTH_REG              ((DR_REG_SHA_BASE) + 0x08)
+#define SHA_BLOCK_NUM_REG             ((DR_REG_SHA_BASE) + 0x0C)
+#define SHA_START_REG                 ((DR_REG_SHA_BASE) + 0x10)
+#define SHA_CONTINUE_REG              ((DR_REG_SHA_BASE) + 0x14)
+#define SHA_BUSY_REG                  ((DR_REG_SHA_BASE) + 0x18)
+#define SHA_DMA_START_REG             ((DR_REG_SHA_BASE) + 0x1C)
+#define SHA_DMA_CONTINUE_REG          ((DR_REG_SHA_BASE) + 0x20)
+#define SHA_CLEAR_IRQ_REG             ((DR_REG_SHA_BASE) + 0x24)
+#define SHA_INT_ENA_REG               ((DR_REG_SHA_BASE) + 0x28)
+
+#define SHA_H_BASE                    ((DR_REG_SHA_BASE) + 0x40)
+#define SHA_TEXT_BASE                 ((DR_REG_SHA_BASE) + 0x80)
+
+/* AES Block operation modes (used with DMA) */
+#define AES_BLOCK_MODE_ECB     0
+#define AES_BLOCK_MODE_CBC     1
+#define AES_BLOCK_MODE_OFB     2
+#define AES_BLOCK_MODE_CTR     3
+#define AES_BLOCK_MODE_CFB8    4
+#define AES_BLOCK_MODE_CFB128  5
+
+/* AES acceleration registers */
+#define AES_MODE_REG            ((DR_REG_AES_BASE) + 0x40)
+#define AES_ENDIAN_REG          ((DR_REG_AES_BASE) + 0x44)
+#define AES_TRIGGER_REG         ((DR_REG_AES_BASE) + 0x48)
+#define AES_STATE_REG           ((DR_REG_AES_BASE) + 0x4c)
+#define AES_DMA_ENABLE_REG      ((DR_REG_AES_BASE) + 0x90)
+#define AES_BLOCK_MODE_REG      ((DR_REG_AES_BASE) + 0x94)
+#define AES_BLOCK_NUM_REG       ((DR_REG_AES_BASE) + 0x98)
+#define AES_INC_SEL_REG         ((DR_REG_AES_BASE) + 0x9C)
+#define AES_CONTINUE_REG        ((DR_REG_AES_BASE) + 0xA8)
+#define AES_INT_CLR_REG         ((DR_REG_AES_BASE) + 0xAC)
+#define AES_INT_ENA_REG         ((DR_REG_AES_BASE) + 0xB0)
+#define AES_DATE_REG            ((DR_REG_AES_BASE) + 0xB4)
+#define AES_DMA_EXIT_REG        ((DR_REG_AES_BASE) + 0xB8)
+
+#define AES_DMA_ENABLE_REG      ((DR_REG_AES_BASE) + 0x90)
+#define AES_BLOCK_MODE_REG      ((DR_REG_AES_BASE) + 0x94)
+#define AES_BLOCK_NUM_REG       ((DR_REG_AES_BASE) + 0x98)
+#define AES_INC_SEL_REG         ((DR_REG_AES_BASE) + 0x9C)
+#define AES_AAD_BLOCK_NUM_REG   ((DR_REG_AES_BASE) + 0xA0)
+#define AES_BIT_VALID_NUM_REG   ((DR_REG_AES_BASE) + 0xA4)
+#define AES_CONTINUE_REG        ((DR_REG_AES_BASE) + 0xA8)
+
+#define AES_KEY_BASE            ((DR_REG_AES_BASE) + 0x00)
+#define AES_TEXT_IN_BASE        ((DR_REG_AES_BASE) + 0x20)
+#define AES_TEXT_OUT_BASE       ((DR_REG_AES_BASE) + 0x30)
+#define AES_IV_BASE             ((DR_REG_AES_BASE) + 0x50)
+
+
+/* HMAC Module */
+#define HMAC_SET_START_REG             ((DR_REG_HMAC_BASE) + 0x40)
+#define HMAC_SET_PARA_PURPOSE_REG      ((DR_REG_HMAC_BASE) + 0x44)
+#define HMAC_SET_PARA_KEY_REG          ((DR_REG_HMAC_BASE) + 0x48)
+#define HMAC_SET_PARA_FINISH_REG       ((DR_REG_HMAC_BASE) + 0x4c)
+#define HMAC_SET_MESSAGE_ONE_REG       ((DR_REG_HMAC_BASE) + 0x50)
+#define HMAC_SET_MESSAGE_ING_REG       ((DR_REG_HMAC_BASE) + 0x54)
+#define HMAC_SET_MESSAGE_END_REG       ((DR_REG_HMAC_BASE) + 0x58)
+#define HMAC_SET_RESULT_FINISH_REG     ((DR_REG_HMAC_BASE) + 0x5c)
+#define HMAC_SET_INVALIDATE_JTAG_REG   ((DR_REG_HMAC_BASE) + 0x60)
+#define HMAC_INVALIDATE_JTAG           BIT(0)
+#define HMAC_SET_INVALIDATE_DS_REG     ((DR_REG_HMAC_BASE) + 0x64)
+#define HMAC_QUERY_ERROR_REG           ((DR_REG_HMAC_BASE) + 0x68)
+#define HMAC_QUERY_BUSY_REG            ((DR_REG_HMAC_BASE) + 0x6c)
+
+#define HMAC_WDATA_BASE                ((DR_REG_HMAC_BASE) + 0x80)
+#define HMAC_RDATA_BASE                ((DR_REG_HMAC_BASE) + 0xC0)
+#define HMAC_SET_MESSAGE_PAD_REG       ((DR_REG_HMAC_BASE) + 0xF0)
+#define HMAC_ONE_BLOCK_REG             ((DR_REG_HMAC_BASE) + 0xF4)
+#define HMAC_SOFT_JTAG_CTRL_REG        ((DR_REG_HMAC_BASE) + 0xF8)
+#define HMAC_SOFT_JTAG_CTRL            BIT((0)
+#define HMAC_WR_JTAG_REG               ((DR_REG_HMAC_BASE) + 0xFC)
+
+/* AES-XTS registers */
+#define AES_XTS_PLAIN_BASE        ((DR_REG_EXT_MEM_ENC) + 0x00)
+#define AES_XTS_SIZE_REG          ((DR_REG_EXT_MEM_ENC) + 0x40)
+#define AES_XTS_DESTINATION_REG   ((DR_REG_EXT_MEM_ENC) + 0x44)
+#define AES_XTS_PHYSICAL_ADDR_REG ((DR_REG_EXT_MEM_ENC) + 0x48)
+
+#define AES_XTS_TRIGGER_REG       ((DR_REG_EXT_MEM_ENC) + 0x4C)
+#define AES_XTS_RELEASE_REG       ((DR_REG_EXT_MEM_ENC) + 0x50)
+#define AES_XTS_DESTROY_REG       ((DR_REG_EXT_MEM_ENC) + 0x54)
+#define AES_XTS_STATE_REG         ((DR_REG_EXT_MEM_ENC) + 0x58)
+#define AES_XTS_DATE_REG          ((DR_REG_EXT_MEM_ENC) + 0x5C)
+
+/* Digital Signature registers*/
+#define DS_C_BASE                 ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0x000 )
+#define DS_C_Y_BASE               ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0x000 )
+#define DS_C_M_BASE               ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0x200 )
+#define DS_C_RB_BASE              ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0x400 )
+#define DS_C_BOX_BASE             ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0x600 )
+#define DS_IV_BASE                ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0x630 )
+#define DS_X_BASE                 ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0x800 )
+#define DS_Z_BASE                 ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0xA00 )
+
+#define DS_SET_START_REG          ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0xE00)
+#define DS_SET_ME_REG             ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0xE04)
+#define DS_SET_FINISH_REG         ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0xE08)
+
+#define DS_QUERY_BUSY_REG         ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0xE0C)
+#define DS_QUERY_KEY_WRONG_REG    ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0xE10)
+#define DS_QUERY_CHECK_REG        ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0xE14)
+
+#define DS_QUERY_CHECK_INVALID_DIGEST  (1<<0)
+#define DS_QUERY_CHECK_INVALID_PADDING (1<<1)
+
+#define DS_DATE_REG               ((DR_REG_DIGITAL_SIGNATURE_BASE) + 0xE20)
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2c_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2c_caps.h
new file mode 100644
index 00000000000..71ef195bb02
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2c_caps.h
@@ -0,0 +1,36 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ESP32-S3 have 2 I2C.
+#define SOC_I2C_NUM            (2)
+
+#define SOC_I2C_FIFO_LEN       (32) /*!< I2C hardware FIFO depth */
+
+//ESP32-S3 support hardware FSM reset
+#define SOC_I2C_SUPPORT_HW_FSM_RST  (1)
+//ESP32-S3 support hardware clear bus
+#define SOC_I2C_SUPPORT_HW_CLR_BUS  (1)
+
+#define SOC_I2C_SUPPORT_XTAL       (1)
+#define SOC_I2C_SUPPORT_RTC        (1)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2c_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2c_reg.h
new file mode 100644
index 00000000000..5d19afa1c32
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2c_reg.h
@@ -0,0 +1,1431 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** I2C_SCL_LOW_PERIOD_REG register
+ *  Configures the low level width of the SCL
+ *  Clock
+ */
+#define I2C_SCL_LOW_PERIOD_REG (DR_REG_I2C_BASE + 0x0)
+/** I2C_SCL_LOW_PERIOD : R/W; bitpos: [8:0]; default: 0;
+ *  This register is used to configure for how long SCL remains low in master mode, in
+ *  I2C module clock cycles.
+ */
+#define I2C_SCL_LOW_PERIOD    0x000001FFU
+#define I2C_SCL_LOW_PERIOD_M  (I2C_SCL_LOW_PERIOD_V << I2C_SCL_LOW_PERIOD_S)
+#define I2C_SCL_LOW_PERIOD_V  0x000001FFU
+#define I2C_SCL_LOW_PERIOD_S  0
+
+/** I2C_CTR_REG register
+ *  Transmission setting
+ */
+#define I2C_CTR_REG (DR_REG_I2C_BASE + 0x4)
+/** I2C_SDA_FORCE_OUT : R/W; bitpos: [0]; default: 1;
+ *  0: direct output; 1: open drain output.
+ */
+#define I2C_SDA_FORCE_OUT    (BIT(0))
+#define I2C_SDA_FORCE_OUT_M  (I2C_SDA_FORCE_OUT_V << I2C_SDA_FORCE_OUT_S)
+#define I2C_SDA_FORCE_OUT_V  0x00000001U
+#define I2C_SDA_FORCE_OUT_S  0
+/** I2C_SCL_FORCE_OUT : R/W; bitpos: [1]; default: 1;
+ *  0: direct output; 1: open drain output.
+ */
+#define I2C_SCL_FORCE_OUT    (BIT(1))
+#define I2C_SCL_FORCE_OUT_M  (I2C_SCL_FORCE_OUT_V << I2C_SCL_FORCE_OUT_S)
+#define I2C_SCL_FORCE_OUT_V  0x00000001U
+#define I2C_SCL_FORCE_OUT_S  1
+/** I2C_SAMPLE_SCL_LEVEL : R/W; bitpos: [2]; default: 0;
+ *  This register is used to select the sample mode.
+ *  1: sample SDA data on the SCL low level.
+ *  0: sample SDA data on the SCL high level.
+ */
+#define I2C_SAMPLE_SCL_LEVEL    (BIT(2))
+#define I2C_SAMPLE_SCL_LEVEL_M  (I2C_SAMPLE_SCL_LEVEL_V << I2C_SAMPLE_SCL_LEVEL_S)
+#define I2C_SAMPLE_SCL_LEVEL_V  0x00000001U
+#define I2C_SAMPLE_SCL_LEVEL_S  2
+/** I2C_RX_FULL_ACK_LEVEL : R/W; bitpos: [3]; default: 1;
+ *  This register is used to configure the ACK value that need to sent by master when
+ *  the rx_fifo_cnt has reached the threshold.
+ */
+#define I2C_RX_FULL_ACK_LEVEL    (BIT(3))
+#define I2C_RX_FULL_ACK_LEVEL_M  (I2C_RX_FULL_ACK_LEVEL_V << I2C_RX_FULL_ACK_LEVEL_S)
+#define I2C_RX_FULL_ACK_LEVEL_V  0x00000001U
+#define I2C_RX_FULL_ACK_LEVEL_S  3
+/** I2C_MS_MODE : R/W; bitpos: [4]; default: 0;
+ *  Set this bit to configure the module as an I2C Master. Clear this bit to configure
+ *  the
+ *  module as an I2C Slave.
+ */
+#define I2C_MS_MODE    (BIT(4))
+#define I2C_MS_MODE_M  (I2C_MS_MODE_V << I2C_MS_MODE_S)
+#define I2C_MS_MODE_V  0x00000001U
+#define I2C_MS_MODE_S  4
+/** I2C_TRANS_START : WT; bitpos: [5]; default: 0;
+ *  Set this bit to start sending the data in txfifo.
+ */
+#define I2C_TRANS_START    (BIT(5))
+#define I2C_TRANS_START_M  (I2C_TRANS_START_V << I2C_TRANS_START_S)
+#define I2C_TRANS_START_V  0x00000001U
+#define I2C_TRANS_START_S  5
+/** I2C_TX_LSB_FIRST : R/W; bitpos: [6]; default: 0;
+ *  This bit is used to control the sending mode for data needing to be sent.
+ *  1: send data from the least significant bit;
+ *  0: send data from the most significant bit.
+ */
+#define I2C_TX_LSB_FIRST    (BIT(6))
+#define I2C_TX_LSB_FIRST_M  (I2C_TX_LSB_FIRST_V << I2C_TX_LSB_FIRST_S)
+#define I2C_TX_LSB_FIRST_V  0x00000001U
+#define I2C_TX_LSB_FIRST_S  6
+/** I2C_RX_LSB_FIRST : R/W; bitpos: [7]; default: 0;
+ *  This bit is used to control the storage mode for received data.
+ *  1: receive data from the least significant bit;
+ *  0: receive data from the most significant bit.
+ */
+#define I2C_RX_LSB_FIRST    (BIT(7))
+#define I2C_RX_LSB_FIRST_M  (I2C_RX_LSB_FIRST_V << I2C_RX_LSB_FIRST_S)
+#define I2C_RX_LSB_FIRST_V  0x00000001U
+#define I2C_RX_LSB_FIRST_S  7
+/** I2C_CLK_EN : R/W; bitpos: [8]; default: 0;
+ *  Reserved
+ */
+#define I2C_CLK_EN    (BIT(8))
+#define I2C_CLK_EN_M  (I2C_CLK_EN_V << I2C_CLK_EN_S)
+#define I2C_CLK_EN_V  0x00000001U
+#define I2C_CLK_EN_S  8
+/** I2C_ARBITRATION_EN : R/W; bitpos: [9]; default: 1;
+ *  This is the enable bit for arbitration_lost.
+ */
+#define I2C_ARBITRATION_EN    (BIT(9))
+#define I2C_ARBITRATION_EN_M  (I2C_ARBITRATION_EN_V << I2C_ARBITRATION_EN_S)
+#define I2C_ARBITRATION_EN_V  0x00000001U
+#define I2C_ARBITRATION_EN_S  9
+/** I2C_FSM_RST : WT; bitpos: [10]; default: 0;
+ *  This register is used to reset the scl FMS.
+ */
+#define I2C_FSM_RST    (BIT(10))
+#define I2C_FSM_RST_M  (I2C_FSM_RST_V << I2C_FSM_RST_S)
+#define I2C_FSM_RST_V  0x00000001U
+#define I2C_FSM_RST_S  10
+/** I2C_CONF_UPGATE : WT; bitpos: [11]; default: 0;
+ *  synchronization bit
+ */
+#define I2C_CONF_UPGATE    (BIT(11))
+#define I2C_CONF_UPGATE_M  (I2C_CONF_UPGATE_V << I2C_CONF_UPGATE_S)
+#define I2C_CONF_UPGATE_V  0x00000001U
+#define I2C_CONF_UPGATE_S  11
+/** I2C_SLV_TX_AUTO_START_EN : R/W; bitpos: [12]; default: 0;
+ *  This is the enable bit for slave to send data automatically
+ */
+#define I2C_SLV_TX_AUTO_START_EN    (BIT(12))
+#define I2C_SLV_TX_AUTO_START_EN_M  (I2C_SLV_TX_AUTO_START_EN_V << I2C_SLV_TX_AUTO_START_EN_S)
+#define I2C_SLV_TX_AUTO_START_EN_V  0x00000001U
+#define I2C_SLV_TX_AUTO_START_EN_S  12
+/** I2C_ADDR_10BIT_RW_CHECK_EN : R/W; bitpos: [13]; default: 0;
+ *  This is the enable bit to check if the r/w bit of 10bit addressing consists with
+ *  I2C protocol
+ */
+#define I2C_ADDR_10BIT_RW_CHECK_EN    (BIT(13))
+#define I2C_ADDR_10BIT_RW_CHECK_EN_M  (I2C_ADDR_10BIT_RW_CHECK_EN_V << I2C_ADDR_10BIT_RW_CHECK_EN_S)
+#define I2C_ADDR_10BIT_RW_CHECK_EN_V  0x00000001U
+#define I2C_ADDR_10BIT_RW_CHECK_EN_S  13
+/** I2C_ADDR_BROADCASTING_EN : R/W; bitpos: [14]; default: 0;
+ *  This is the enable bit to support the 7bit general call function.
+ */
+#define I2C_ADDR_BROADCASTING_EN    (BIT(14))
+#define I2C_ADDR_BROADCASTING_EN_M  (I2C_ADDR_BROADCASTING_EN_V << I2C_ADDR_BROADCASTING_EN_S)
+#define I2C_ADDR_BROADCASTING_EN_V  0x00000001U
+#define I2C_ADDR_BROADCASTING_EN_S  14
+
+/** I2C_SR_REG register
+ *  Describe I2C work status.
+ */
+#define I2C_SR_REG (DR_REG_I2C_BASE + 0x8)
+/** I2C_RESP_REC : RO; bitpos: [0]; default: 0;
+ *  The received ACK value in master mode or slave mode. 0: ACK, 1: NACK.
+ */
+#define I2C_RESP_REC    (BIT(0))
+#define I2C_RESP_REC_M  (I2C_RESP_REC_V << I2C_RESP_REC_S)
+#define I2C_RESP_REC_V  0x00000001U
+#define I2C_RESP_REC_S  0
+/** I2C_SLAVE_RW : RO; bitpos: [1]; default: 0;
+ *  When in slave mode, 1: master reads from slave; 0: master writes to slave.
+ */
+#define I2C_SLAVE_RW    (BIT(1))
+#define I2C_SLAVE_RW_M  (I2C_SLAVE_RW_V << I2C_SLAVE_RW_S)
+#define I2C_SLAVE_RW_V  0x00000001U
+#define I2C_SLAVE_RW_S  1
+/** I2C_ARB_LOST : RO; bitpos: [3]; default: 0;
+ *  When the I2C controller loses control of SCL line, this register changes to 1.
+ */
+#define I2C_ARB_LOST    (BIT(3))
+#define I2C_ARB_LOST_M  (I2C_ARB_LOST_V << I2C_ARB_LOST_S)
+#define I2C_ARB_LOST_V  0x00000001U
+#define I2C_ARB_LOST_S  3
+/** I2C_BUS_BUSY : RO; bitpos: [4]; default: 0;
+ *  1: the I2C bus is busy transferring data; 0: the I2C bus is in idle state.
+ */
+#define I2C_BUS_BUSY    (BIT(4))
+#define I2C_BUS_BUSY_M  (I2C_BUS_BUSY_V << I2C_BUS_BUSY_S)
+#define I2C_BUS_BUSY_V  0x00000001U
+#define I2C_BUS_BUSY_S  4
+/** I2C_SLAVE_ADDRESSED : RO; bitpos: [5]; default: 0;
+ *  When configured as an I2C Slave, and the address sent by the master is
+ *  equal to the address of the slave, then this bit will be of high level.
+ */
+#define I2C_SLAVE_ADDRESSED    (BIT(5))
+#define I2C_SLAVE_ADDRESSED_M  (I2C_SLAVE_ADDRESSED_V << I2C_SLAVE_ADDRESSED_S)
+#define I2C_SLAVE_ADDRESSED_V  0x00000001U
+#define I2C_SLAVE_ADDRESSED_S  5
+/** I2C_RXFIFO_CNT : RO; bitpos: [13:8]; default: 0;
+ *  This field represents the amount of data needed to be sent.
+ */
+#define I2C_RXFIFO_CNT    0x0000003FU
+#define I2C_RXFIFO_CNT_M  (I2C_RXFIFO_CNT_V << I2C_RXFIFO_CNT_S)
+#define I2C_RXFIFO_CNT_V  0x0000003FU
+#define I2C_RXFIFO_CNT_S  8
+/** I2C_STRETCH_CAUSE : RO; bitpos: [15:14]; default: 3;
+ *  The cause of stretching SCL low in slave mode. 0:  stretching SCL low at the
+ *  beginning of I2C read data state. 1: stretching SCL low when I2C Tx FIFO is empty
+ *  in slave mode. 2: stretching SCL low when I2C Rx FIFO is full in slave mode.
+ */
+#define I2C_STRETCH_CAUSE    0x00000003U
+#define I2C_STRETCH_CAUSE_M  (I2C_STRETCH_CAUSE_V << I2C_STRETCH_CAUSE_S)
+#define I2C_STRETCH_CAUSE_V  0x00000003U
+#define I2C_STRETCH_CAUSE_S  14
+/** I2C_TXFIFO_CNT : RO; bitpos: [23:18]; default: 0;
+ *  This field stores the amount of received data in RAM.
+ */
+#define I2C_TXFIFO_CNT    0x0000003FU
+#define I2C_TXFIFO_CNT_M  (I2C_TXFIFO_CNT_V << I2C_TXFIFO_CNT_S)
+#define I2C_TXFIFO_CNT_V  0x0000003FU
+#define I2C_TXFIFO_CNT_S  18
+/** I2C_SCL_MAIN_STATE_LAST : RO; bitpos: [26:24]; default: 0;
+ *  This field indicates the states of the I2C module state machine.
+ *  0: Idle; 1: Address shift; 2: ACK address; 3: Rx data; 4: Tx data; 5: Send ACK; 6:
+ *  Wait ACK
+ */
+#define I2C_SCL_MAIN_STATE_LAST    0x00000007U
+#define I2C_SCL_MAIN_STATE_LAST_M  (I2C_SCL_MAIN_STATE_LAST_V << I2C_SCL_MAIN_STATE_LAST_S)
+#define I2C_SCL_MAIN_STATE_LAST_V  0x00000007U
+#define I2C_SCL_MAIN_STATE_LAST_S  24
+/** I2C_SCL_STATE_LAST : RO; bitpos: [30:28]; default: 0;
+ *  This field indicates the states of the state machine used to produce SCL.
+ *  0: Idle; 1: Start; 2: Negative edge; 3: Low; 4: Positive edge; 5: High; 6: Stop
+ */
+#define I2C_SCL_STATE_LAST    0x00000007U
+#define I2C_SCL_STATE_LAST_M  (I2C_SCL_STATE_LAST_V << I2C_SCL_STATE_LAST_S)
+#define I2C_SCL_STATE_LAST_V  0x00000007U
+#define I2C_SCL_STATE_LAST_S  28
+
+/** I2C_TO_REG register
+ *  Setting time out control for receiving data.
+ */
+#define I2C_TO_REG (DR_REG_I2C_BASE + 0xc)
+/** I2C_TIME_OUT_VALUE : R/W; bitpos: [4:0]; default: 16;
+ *  This register is used to configure the timeout for receiving a data bit in APB
+ *  clock cycles.
+ */
+#define I2C_TIME_OUT_VALUE    0x0000001FU
+#define I2C_TIME_OUT_VALUE_M  (I2C_TIME_OUT_VALUE_V << I2C_TIME_OUT_VALUE_S)
+#define I2C_TIME_OUT_VALUE_V  0x0000001FU
+#define I2C_TIME_OUT_VALUE_S  0
+/** I2C_TIME_OUT_EN : R/W; bitpos: [5]; default: 0;
+ *  This is the enable bit for time out control.
+ */
+#define I2C_TIME_OUT_EN    (BIT(5))
+#define I2C_TIME_OUT_EN_M  (I2C_TIME_OUT_EN_V << I2C_TIME_OUT_EN_S)
+#define I2C_TIME_OUT_EN_V  0x00000001U
+#define I2C_TIME_OUT_EN_S  5
+
+/** I2C_SLAVE_ADDR_REG register
+ *  Local slave address setting
+ */
+#define I2C_SLAVE_ADDR_REG (DR_REG_I2C_BASE + 0x10)
+/** I2C_SLAVE_ADDR : R/W; bitpos: [14:0]; default: 0;
+ *  When configured as an I2C Slave, this field is used to configure the slave address.
+ */
+#define I2C_SLAVE_ADDR    0x00007FFFU
+#define I2C_SLAVE_ADDR_M  (I2C_SLAVE_ADDR_V << I2C_SLAVE_ADDR_S)
+#define I2C_SLAVE_ADDR_V  0x00007FFFU
+#define I2C_SLAVE_ADDR_S  0
+/** I2C_ADDR_10BIT_EN : R/W; bitpos: [31]; default: 0;
+ *  This field is used to enable the slave 10-bit addressing mode in master mode.
+ */
+#define I2C_ADDR_10BIT_EN    (BIT(31))
+#define I2C_ADDR_10BIT_EN_M  (I2C_ADDR_10BIT_EN_V << I2C_ADDR_10BIT_EN_S)
+#define I2C_ADDR_10BIT_EN_V  0x00000001U
+#define I2C_ADDR_10BIT_EN_S  31
+
+/** I2C_FIFO_ST_REG register
+ *  FIFO status register.
+ */
+#define I2C_FIFO_ST_REG (DR_REG_I2C_BASE + 0x14)
+/** I2C_RXFIFO_RADDR : RO; bitpos: [4:0]; default: 0;
+ *  This is the offset address of the APB reading from rxfifo
+ */
+#define I2C_RXFIFO_RADDR    0x0000001FU
+#define I2C_RXFIFO_RADDR_M  (I2C_RXFIFO_RADDR_V << I2C_RXFIFO_RADDR_S)
+#define I2C_RXFIFO_RADDR_V  0x0000001FU
+#define I2C_RXFIFO_RADDR_S  0
+/** I2C_RXFIFO_WADDR : RO; bitpos: [9:5]; default: 0;
+ *  This is the offset address of i2c module receiving data and writing to rxfifo.
+ */
+#define I2C_RXFIFO_WADDR    0x0000001FU
+#define I2C_RXFIFO_WADDR_M  (I2C_RXFIFO_WADDR_V << I2C_RXFIFO_WADDR_S)
+#define I2C_RXFIFO_WADDR_V  0x0000001FU
+#define I2C_RXFIFO_WADDR_S  5
+/** I2C_TXFIFO_RADDR : RO; bitpos: [14:10]; default: 0;
+ *  This is the offset address of i2c module reading from txfifo.
+ */
+#define I2C_TXFIFO_RADDR    0x0000001FU
+#define I2C_TXFIFO_RADDR_M  (I2C_TXFIFO_RADDR_V << I2C_TXFIFO_RADDR_S)
+#define I2C_TXFIFO_RADDR_V  0x0000001FU
+#define I2C_TXFIFO_RADDR_S  10
+/** I2C_TXFIFO_WADDR : RO; bitpos: [19:15]; default: 0;
+ *  This is the offset address of APB bus writing to txfifo.
+ */
+#define I2C_TXFIFO_WADDR    0x0000001FU
+#define I2C_TXFIFO_WADDR_M  (I2C_TXFIFO_WADDR_V << I2C_TXFIFO_WADDR_S)
+#define I2C_TXFIFO_WADDR_V  0x0000001FU
+#define I2C_TXFIFO_WADDR_S  15
+/** I2C_SLAVE_RW_POINT : RO; bitpos: [29:22]; default: 0;
+ *  The received data in I2C slave mode.
+ */
+#define I2C_SLAVE_RW_POINT    0x000000FFU
+#define I2C_SLAVE_RW_POINT_M  (I2C_SLAVE_RW_POINT_V << I2C_SLAVE_RW_POINT_S)
+#define I2C_SLAVE_RW_POINT_V  0x000000FFU
+#define I2C_SLAVE_RW_POINT_S  22
+
+/** I2C_FIFO_CONF_REG register
+ *  FIFO configuration register.
+ */
+#define I2C_FIFO_CONF_REG (DR_REG_I2C_BASE + 0x18)
+/** I2C_RXFIFO_WM_THRHD : R/W; bitpos: [4:0]; default: 11;
+ *  The water mark threshold of rx FIFO in nonfifo access mode. When
+ *  reg_reg_fifo_prt_en is 1 and rx FIFO counter is bigger than
+ *  reg_rxfifo_wm_thrhd[4:0], reg_rxfifo_wm_int_raw bit will be valid.
+ */
+#define I2C_RXFIFO_WM_THRHD    0x0000001FU
+#define I2C_RXFIFO_WM_THRHD_M  (I2C_RXFIFO_WM_THRHD_V << I2C_RXFIFO_WM_THRHD_S)
+#define I2C_RXFIFO_WM_THRHD_V  0x0000001FU
+#define I2C_RXFIFO_WM_THRHD_S  0
+/** I2C_TXFIFO_WM_THRHD : R/W; bitpos: [9:5]; default: 4;
+ *  The water mark threshold of tx FIFO in nonfifo access mode. When
+ *  reg_reg_fifo_prt_en is 1 and tx FIFO counter is smaller than
+ *  reg_txfifo_wm_thrhd[4:0], reg_txfifo_wm_int_raw bit will be valid.
+ */
+#define I2C_TXFIFO_WM_THRHD    0x0000001FU
+#define I2C_TXFIFO_WM_THRHD_M  (I2C_TXFIFO_WM_THRHD_V << I2C_TXFIFO_WM_THRHD_S)
+#define I2C_TXFIFO_WM_THRHD_V  0x0000001FU
+#define I2C_TXFIFO_WM_THRHD_S  5
+/** I2C_NONFIFO_EN : R/W; bitpos: [10]; default: 0;
+ *  Set this bit to enable APB nonfifo access.
+ */
+#define I2C_NONFIFO_EN    (BIT(10))
+#define I2C_NONFIFO_EN_M  (I2C_NONFIFO_EN_V << I2C_NONFIFO_EN_S)
+#define I2C_NONFIFO_EN_V  0x00000001U
+#define I2C_NONFIFO_EN_S  10
+/** I2C_FIFO_ADDR_CFG_EN : R/W; bitpos: [11]; default: 0;
+ *  When this bit is set to 1, the byte received after the I2C address byte represents
+ *  the offset address in the I2C Slave RAM.
+ */
+#define I2C_FIFO_ADDR_CFG_EN    (BIT(11))
+#define I2C_FIFO_ADDR_CFG_EN_M  (I2C_FIFO_ADDR_CFG_EN_V << I2C_FIFO_ADDR_CFG_EN_S)
+#define I2C_FIFO_ADDR_CFG_EN_V  0x00000001U
+#define I2C_FIFO_ADDR_CFG_EN_S  11
+/** I2C_RX_FIFO_RST : R/W; bitpos: [12]; default: 0;
+ *  Set this bit to reset rx-fifo.
+ */
+#define I2C_RX_FIFO_RST    (BIT(12))
+#define I2C_RX_FIFO_RST_M  (I2C_RX_FIFO_RST_V << I2C_RX_FIFO_RST_S)
+#define I2C_RX_FIFO_RST_V  0x00000001U
+#define I2C_RX_FIFO_RST_S  12
+/** I2C_TX_FIFO_RST : R/W; bitpos: [13]; default: 0;
+ *  Set this bit to reset tx-fifo.
+ */
+#define I2C_TX_FIFO_RST    (BIT(13))
+#define I2C_TX_FIFO_RST_M  (I2C_TX_FIFO_RST_V << I2C_TX_FIFO_RST_S)
+#define I2C_TX_FIFO_RST_V  0x00000001U
+#define I2C_TX_FIFO_RST_S  13
+/** I2C_FIFO_PRT_EN : R/W; bitpos: [14]; default: 1;
+ *  The control enable bit of FIFO pointer in non-fifo access mode. This bit controls
+ *  the valid bits and the interrupts of tx/rx_fifo overflow, underflow, full and empty.
+ */
+#define I2C_FIFO_PRT_EN    (BIT(14))
+#define I2C_FIFO_PRT_EN_M  (I2C_FIFO_PRT_EN_V << I2C_FIFO_PRT_EN_S)
+#define I2C_FIFO_PRT_EN_V  0x00000001U
+#define I2C_FIFO_PRT_EN_S  14
+
+/** I2C_DATA_REG register
+ *  Rx FIFO read data.
+ */
+#define I2C_DATA_REG (DR_REG_I2C_BASE + 0x1c)
+/** I2C_FIFO_RDATA : RO; bitpos: [7:0]; default: 0;
+ *  The value of rx FIFO read data.
+ */
+#define I2C_FIFO_RDATA    0x000000FFU
+#define I2C_FIFO_RDATA_M  (I2C_FIFO_RDATA_V << I2C_FIFO_RDATA_S)
+#define I2C_FIFO_RDATA_V  0x000000FFU
+#define I2C_FIFO_RDATA_S  0
+
+/** I2C_INT_RAW_REG register
+ *  Raw interrupt status
+ */
+#define I2C_INT_RAW_REG (DR_REG_I2C_BASE + 0x20)
+/** I2C_RXFIFO_WM_INT_RAW : R/SS/WTC; bitpos: [0]; default: 0;
+ *  The raw interrupt bit for I2C_RXFIFO_WM_INT interrupt.
+ */
+#define I2C_RXFIFO_WM_INT_RAW    (BIT(0))
+#define I2C_RXFIFO_WM_INT_RAW_M  (I2C_RXFIFO_WM_INT_RAW_V << I2C_RXFIFO_WM_INT_RAW_S)
+#define I2C_RXFIFO_WM_INT_RAW_V  0x00000001U
+#define I2C_RXFIFO_WM_INT_RAW_S  0
+/** I2C_TXFIFO_WM_INT_RAW : R/SS/WTC; bitpos: [1]; default: 1;
+ *  The raw interrupt bit for I2C_TXFIFO_WM_INT interrupt.
+ */
+#define I2C_TXFIFO_WM_INT_RAW    (BIT(1))
+#define I2C_TXFIFO_WM_INT_RAW_M  (I2C_TXFIFO_WM_INT_RAW_V << I2C_TXFIFO_WM_INT_RAW_S)
+#define I2C_TXFIFO_WM_INT_RAW_V  0x00000001U
+#define I2C_TXFIFO_WM_INT_RAW_S  1
+/** I2C_RXFIFO_OVF_INT_RAW : R/SS/WTC; bitpos: [2]; default: 0;
+ *  The raw interrupt bit for I2C_RXFIFO_OVF_INT interrupt.
+ */
+#define I2C_RXFIFO_OVF_INT_RAW    (BIT(2))
+#define I2C_RXFIFO_OVF_INT_RAW_M  (I2C_RXFIFO_OVF_INT_RAW_V << I2C_RXFIFO_OVF_INT_RAW_S)
+#define I2C_RXFIFO_OVF_INT_RAW_V  0x00000001U
+#define I2C_RXFIFO_OVF_INT_RAW_S  2
+/** I2C_END_DETECT_INT_RAW : R/SS/WTC; bitpos: [3]; default: 0;
+ *  The raw interrupt bit for the I2C_END_DETECT_INT interrupt.
+ */
+#define I2C_END_DETECT_INT_RAW    (BIT(3))
+#define I2C_END_DETECT_INT_RAW_M  (I2C_END_DETECT_INT_RAW_V << I2C_END_DETECT_INT_RAW_S)
+#define I2C_END_DETECT_INT_RAW_V  0x00000001U
+#define I2C_END_DETECT_INT_RAW_S  3
+/** I2C_BYTE_TRANS_DONE_INT_RAW : R/SS/WTC; bitpos: [4]; default: 0;
+ *  The raw interrupt bit for the I2C_END_DETECT_INT interrupt.
+ */
+#define I2C_BYTE_TRANS_DONE_INT_RAW    (BIT(4))
+#define I2C_BYTE_TRANS_DONE_INT_RAW_M  (I2C_BYTE_TRANS_DONE_INT_RAW_V << I2C_BYTE_TRANS_DONE_INT_RAW_S)
+#define I2C_BYTE_TRANS_DONE_INT_RAW_V  0x00000001U
+#define I2C_BYTE_TRANS_DONE_INT_RAW_S  4
+/** I2C_ARBITRATION_LOST_INT_RAW : R/SS/WTC; bitpos: [5]; default: 0;
+ *  The raw interrupt bit for the I2C_ARBITRATION_LOST_INT interrupt.
+ */
+#define I2C_ARBITRATION_LOST_INT_RAW    (BIT(5))
+#define I2C_ARBITRATION_LOST_INT_RAW_M  (I2C_ARBITRATION_LOST_INT_RAW_V << I2C_ARBITRATION_LOST_INT_RAW_S)
+#define I2C_ARBITRATION_LOST_INT_RAW_V  0x00000001U
+#define I2C_ARBITRATION_LOST_INT_RAW_S  5
+/** I2C_MST_TXFIFO_UDF_INT_RAW : R/SS/WTC; bitpos: [6]; default: 0;
+ *  The raw interrupt bit for I2C_TRANS_COMPLETE_INT interrupt.
+ */
+#define I2C_MST_TXFIFO_UDF_INT_RAW    (BIT(6))
+#define I2C_MST_TXFIFO_UDF_INT_RAW_M  (I2C_MST_TXFIFO_UDF_INT_RAW_V << I2C_MST_TXFIFO_UDF_INT_RAW_S)
+#define I2C_MST_TXFIFO_UDF_INT_RAW_V  0x00000001U
+#define I2C_MST_TXFIFO_UDF_INT_RAW_S  6
+/** I2C_TRANS_COMPLETE_INT_RAW : R/SS/WTC; bitpos: [7]; default: 0;
+ *  The raw interrupt bit for the I2C_TRANS_COMPLETE_INT interrupt.
+ */
+#define I2C_TRANS_COMPLETE_INT_RAW    (BIT(7))
+#define I2C_TRANS_COMPLETE_INT_RAW_M  (I2C_TRANS_COMPLETE_INT_RAW_V << I2C_TRANS_COMPLETE_INT_RAW_S)
+#define I2C_TRANS_COMPLETE_INT_RAW_V  0x00000001U
+#define I2C_TRANS_COMPLETE_INT_RAW_S  7
+/** I2C_TIME_OUT_INT_RAW : R/SS/WTC; bitpos: [8]; default: 0;
+ *  The raw interrupt bit for the I2C_TIME_OUT_INT interrupt.
+ */
+#define I2C_TIME_OUT_INT_RAW    (BIT(8))
+#define I2C_TIME_OUT_INT_RAW_M  (I2C_TIME_OUT_INT_RAW_V << I2C_TIME_OUT_INT_RAW_S)
+#define I2C_TIME_OUT_INT_RAW_V  0x00000001U
+#define I2C_TIME_OUT_INT_RAW_S  8
+/** I2C_TRANS_START_INT_RAW : R/SS/WTC; bitpos: [9]; default: 0;
+ *  The raw interrupt bit for the I2C_TRANS_START_INT interrupt.
+ */
+#define I2C_TRANS_START_INT_RAW    (BIT(9))
+#define I2C_TRANS_START_INT_RAW_M  (I2C_TRANS_START_INT_RAW_V << I2C_TRANS_START_INT_RAW_S)
+#define I2C_TRANS_START_INT_RAW_V  0x00000001U
+#define I2C_TRANS_START_INT_RAW_S  9
+/** I2C_NACK_INT_RAW : R/SS/WTC; bitpos: [10]; default: 0;
+ *  The raw interrupt bit for I2C_SLAVE_STRETCH_INT interrupt.
+ */
+#define I2C_NACK_INT_RAW    (BIT(10))
+#define I2C_NACK_INT_RAW_M  (I2C_NACK_INT_RAW_V << I2C_NACK_INT_RAW_S)
+#define I2C_NACK_INT_RAW_V  0x00000001U
+#define I2C_NACK_INT_RAW_S  10
+/** I2C_TXFIFO_OVF_INT_RAW : R/SS/WTC; bitpos: [11]; default: 0;
+ *  The raw interrupt bit for I2C_TXFIFO_OVF_INT interrupt.
+ */
+#define I2C_TXFIFO_OVF_INT_RAW    (BIT(11))
+#define I2C_TXFIFO_OVF_INT_RAW_M  (I2C_TXFIFO_OVF_INT_RAW_V << I2C_TXFIFO_OVF_INT_RAW_S)
+#define I2C_TXFIFO_OVF_INT_RAW_V  0x00000001U
+#define I2C_TXFIFO_OVF_INT_RAW_S  11
+/** I2C_RXFIFO_UDF_INT_RAW : R/SS/WTC; bitpos: [12]; default: 0;
+ *  The raw interrupt bit for I2C_RXFIFO_UDF_INT  interrupt.
+ */
+#define I2C_RXFIFO_UDF_INT_RAW    (BIT(12))
+#define I2C_RXFIFO_UDF_INT_RAW_M  (I2C_RXFIFO_UDF_INT_RAW_V << I2C_RXFIFO_UDF_INT_RAW_S)
+#define I2C_RXFIFO_UDF_INT_RAW_V  0x00000001U
+#define I2C_RXFIFO_UDF_INT_RAW_S  12
+/** I2C_SCL_ST_TO_INT_RAW : R/SS/WTC; bitpos: [13]; default: 0;
+ *  The raw interrupt bit for I2C_SCL_ST_TO_INT interrupt.
+ */
+#define I2C_SCL_ST_TO_INT_RAW    (BIT(13))
+#define I2C_SCL_ST_TO_INT_RAW_M  (I2C_SCL_ST_TO_INT_RAW_V << I2C_SCL_ST_TO_INT_RAW_S)
+#define I2C_SCL_ST_TO_INT_RAW_V  0x00000001U
+#define I2C_SCL_ST_TO_INT_RAW_S  13
+/** I2C_SCL_MAIN_ST_TO_INT_RAW : R/SS/WTC; bitpos: [14]; default: 0;
+ *  The raw interrupt bit for I2C_SCL_MAIN_ST_TO_INT interrupt.
+ */
+#define I2C_SCL_MAIN_ST_TO_INT_RAW    (BIT(14))
+#define I2C_SCL_MAIN_ST_TO_INT_RAW_M  (I2C_SCL_MAIN_ST_TO_INT_RAW_V << I2C_SCL_MAIN_ST_TO_INT_RAW_S)
+#define I2C_SCL_MAIN_ST_TO_INT_RAW_V  0x00000001U
+#define I2C_SCL_MAIN_ST_TO_INT_RAW_S  14
+/** I2C_DET_START_INT_RAW : R/SS/WTC; bitpos: [15]; default: 0;
+ *  The raw interrupt bit for I2C_DET_START_INT interrupt.
+ */
+#define I2C_DET_START_INT_RAW    (BIT(15))
+#define I2C_DET_START_INT_RAW_M  (I2C_DET_START_INT_RAW_V << I2C_DET_START_INT_RAW_S)
+#define I2C_DET_START_INT_RAW_V  0x00000001U
+#define I2C_DET_START_INT_RAW_S  15
+/** I2C_SLAVE_STRETCH_INT_RAW : R/SS/WTC; bitpos: [16]; default: 0;
+ *  The raw interrupt bit for I2C_SLAVE_STRETCH_INT interrupt.
+ */
+#define I2C_SLAVE_STRETCH_INT_RAW    (BIT(16))
+#define I2C_SLAVE_STRETCH_INT_RAW_M  (I2C_SLAVE_STRETCH_INT_RAW_V << I2C_SLAVE_STRETCH_INT_RAW_S)
+#define I2C_SLAVE_STRETCH_INT_RAW_V  0x00000001U
+#define I2C_SLAVE_STRETCH_INT_RAW_S  16
+/** I2C_GENERAL_CALL_INT_RAW : R/SS/WTC; bitpos: [17]; default: 0;
+ *  The raw interrupt bit for I2C_GENARAL_CALL_INT interrupt.
+ */
+#define I2C_GENERAL_CALL_INT_RAW    (BIT(17))
+#define I2C_GENERAL_CALL_INT_RAW_M  (I2C_GENERAL_CALL_INT_RAW_V << I2C_GENERAL_CALL_INT_RAW_S)
+#define I2C_GENERAL_CALL_INT_RAW_V  0x00000001U
+#define I2C_GENERAL_CALL_INT_RAW_S  17
+
+/** I2C_INT_CLR_REG register
+ *  Interrupt clear bits
+ */
+#define I2C_INT_CLR_REG (DR_REG_I2C_BASE + 0x24)
+/** I2C_RXFIFO_WM_INT_CLR : WT; bitpos: [0]; default: 0;
+ *  Set this bit to clear I2C_RXFIFO_WM_INT interrupt.
+ */
+#define I2C_RXFIFO_WM_INT_CLR    (BIT(0))
+#define I2C_RXFIFO_WM_INT_CLR_M  (I2C_RXFIFO_WM_INT_CLR_V << I2C_RXFIFO_WM_INT_CLR_S)
+#define I2C_RXFIFO_WM_INT_CLR_V  0x00000001U
+#define I2C_RXFIFO_WM_INT_CLR_S  0
+/** I2C_TXFIFO_WM_INT_CLR : WT; bitpos: [1]; default: 0;
+ *  Set this bit to clear I2C_TXFIFO_WM_INT interrupt.
+ */
+#define I2C_TXFIFO_WM_INT_CLR    (BIT(1))
+#define I2C_TXFIFO_WM_INT_CLR_M  (I2C_TXFIFO_WM_INT_CLR_V << I2C_TXFIFO_WM_INT_CLR_S)
+#define I2C_TXFIFO_WM_INT_CLR_V  0x00000001U
+#define I2C_TXFIFO_WM_INT_CLR_S  1
+/** I2C_RXFIFO_OVF_INT_CLR : WT; bitpos: [2]; default: 0;
+ *  Set this bit to clear I2C_RXFIFO_OVF_INT interrupt.
+ */
+#define I2C_RXFIFO_OVF_INT_CLR    (BIT(2))
+#define I2C_RXFIFO_OVF_INT_CLR_M  (I2C_RXFIFO_OVF_INT_CLR_V << I2C_RXFIFO_OVF_INT_CLR_S)
+#define I2C_RXFIFO_OVF_INT_CLR_V  0x00000001U
+#define I2C_RXFIFO_OVF_INT_CLR_S  2
+/** I2C_END_DETECT_INT_CLR : WT; bitpos: [3]; default: 0;
+ *  Set this bit to clear the I2C_END_DETECT_INT interrupt.
+ */
+#define I2C_END_DETECT_INT_CLR    (BIT(3))
+#define I2C_END_DETECT_INT_CLR_M  (I2C_END_DETECT_INT_CLR_V << I2C_END_DETECT_INT_CLR_S)
+#define I2C_END_DETECT_INT_CLR_V  0x00000001U
+#define I2C_END_DETECT_INT_CLR_S  3
+/** I2C_BYTE_TRANS_DONE_INT_CLR : WT; bitpos: [4]; default: 0;
+ *  Set this bit to clear the I2C_END_DETECT_INT interrupt.
+ */
+#define I2C_BYTE_TRANS_DONE_INT_CLR    (BIT(4))
+#define I2C_BYTE_TRANS_DONE_INT_CLR_M  (I2C_BYTE_TRANS_DONE_INT_CLR_V << I2C_BYTE_TRANS_DONE_INT_CLR_S)
+#define I2C_BYTE_TRANS_DONE_INT_CLR_V  0x00000001U
+#define I2C_BYTE_TRANS_DONE_INT_CLR_S  4
+/** I2C_ARBITRATION_LOST_INT_CLR : WT; bitpos: [5]; default: 0;
+ *  Set this bit to clear the I2C_ARBITRATION_LOST_INT interrupt.
+ */
+#define I2C_ARBITRATION_LOST_INT_CLR    (BIT(5))
+#define I2C_ARBITRATION_LOST_INT_CLR_M  (I2C_ARBITRATION_LOST_INT_CLR_V << I2C_ARBITRATION_LOST_INT_CLR_S)
+#define I2C_ARBITRATION_LOST_INT_CLR_V  0x00000001U
+#define I2C_ARBITRATION_LOST_INT_CLR_S  5
+/** I2C_MST_TXFIFO_UDF_INT_CLR : WT; bitpos: [6]; default: 0;
+ *  Set this bit to clear I2C_TRANS_COMPLETE_INT interrupt.
+ */
+#define I2C_MST_TXFIFO_UDF_INT_CLR    (BIT(6))
+#define I2C_MST_TXFIFO_UDF_INT_CLR_M  (I2C_MST_TXFIFO_UDF_INT_CLR_V << I2C_MST_TXFIFO_UDF_INT_CLR_S)
+#define I2C_MST_TXFIFO_UDF_INT_CLR_V  0x00000001U
+#define I2C_MST_TXFIFO_UDF_INT_CLR_S  6
+/** I2C_TRANS_COMPLETE_INT_CLR : WT; bitpos: [7]; default: 0;
+ *  Set this bit to clear the I2C_TRANS_COMPLETE_INT interrupt.
+ */
+#define I2C_TRANS_COMPLETE_INT_CLR    (BIT(7))
+#define I2C_TRANS_COMPLETE_INT_CLR_M  (I2C_TRANS_COMPLETE_INT_CLR_V << I2C_TRANS_COMPLETE_INT_CLR_S)
+#define I2C_TRANS_COMPLETE_INT_CLR_V  0x00000001U
+#define I2C_TRANS_COMPLETE_INT_CLR_S  7
+/** I2C_TIME_OUT_INT_CLR : WT; bitpos: [8]; default: 0;
+ *  Set this bit to clear the I2C_TIME_OUT_INT interrupt.
+ */
+#define I2C_TIME_OUT_INT_CLR    (BIT(8))
+#define I2C_TIME_OUT_INT_CLR_M  (I2C_TIME_OUT_INT_CLR_V << I2C_TIME_OUT_INT_CLR_S)
+#define I2C_TIME_OUT_INT_CLR_V  0x00000001U
+#define I2C_TIME_OUT_INT_CLR_S  8
+/** I2C_TRANS_START_INT_CLR : WT; bitpos: [9]; default: 0;
+ *  Set this bit to clear the I2C_TRANS_START_INT interrupt.
+ */
+#define I2C_TRANS_START_INT_CLR    (BIT(9))
+#define I2C_TRANS_START_INT_CLR_M  (I2C_TRANS_START_INT_CLR_V << I2C_TRANS_START_INT_CLR_S)
+#define I2C_TRANS_START_INT_CLR_V  0x00000001U
+#define I2C_TRANS_START_INT_CLR_S  9
+/** I2C_NACK_INT_CLR : WT; bitpos: [10]; default: 0;
+ *  Set this bit to clear I2C_SLAVE_STRETCH_INT interrupt.
+ */
+#define I2C_NACK_INT_CLR    (BIT(10))
+#define I2C_NACK_INT_CLR_M  (I2C_NACK_INT_CLR_V << I2C_NACK_INT_CLR_S)
+#define I2C_NACK_INT_CLR_V  0x00000001U
+#define I2C_NACK_INT_CLR_S  10
+/** I2C_TXFIFO_OVF_INT_CLR : WT; bitpos: [11]; default: 0;
+ *  Set this bit to clear I2C_TXFIFO_OVF_INT interrupt.
+ */
+#define I2C_TXFIFO_OVF_INT_CLR    (BIT(11))
+#define I2C_TXFIFO_OVF_INT_CLR_M  (I2C_TXFIFO_OVF_INT_CLR_V << I2C_TXFIFO_OVF_INT_CLR_S)
+#define I2C_TXFIFO_OVF_INT_CLR_V  0x00000001U
+#define I2C_TXFIFO_OVF_INT_CLR_S  11
+/** I2C_RXFIFO_UDF_INT_CLR : WT; bitpos: [12]; default: 0;
+ *  Set this bit to clear I2C_RXFIFO_UDF_INT  interrupt.
+ */
+#define I2C_RXFIFO_UDF_INT_CLR    (BIT(12))
+#define I2C_RXFIFO_UDF_INT_CLR_M  (I2C_RXFIFO_UDF_INT_CLR_V << I2C_RXFIFO_UDF_INT_CLR_S)
+#define I2C_RXFIFO_UDF_INT_CLR_V  0x00000001U
+#define I2C_RXFIFO_UDF_INT_CLR_S  12
+/** I2C_SCL_ST_TO_INT_CLR : WT; bitpos: [13]; default: 0;
+ *  Set this bit to clear I2C_SCL_ST_TO_INT interrupt.
+ */
+#define I2C_SCL_ST_TO_INT_CLR    (BIT(13))
+#define I2C_SCL_ST_TO_INT_CLR_M  (I2C_SCL_ST_TO_INT_CLR_V << I2C_SCL_ST_TO_INT_CLR_S)
+#define I2C_SCL_ST_TO_INT_CLR_V  0x00000001U
+#define I2C_SCL_ST_TO_INT_CLR_S  13
+/** I2C_SCL_MAIN_ST_TO_INT_CLR : WT; bitpos: [14]; default: 0;
+ *  Set this bit to clear I2C_SCL_MAIN_ST_TO_INT interrupt.
+ */
+#define I2C_SCL_MAIN_ST_TO_INT_CLR    (BIT(14))
+#define I2C_SCL_MAIN_ST_TO_INT_CLR_M  (I2C_SCL_MAIN_ST_TO_INT_CLR_V << I2C_SCL_MAIN_ST_TO_INT_CLR_S)
+#define I2C_SCL_MAIN_ST_TO_INT_CLR_V  0x00000001U
+#define I2C_SCL_MAIN_ST_TO_INT_CLR_S  14
+/** I2C_DET_START_INT_CLR : WT; bitpos: [15]; default: 0;
+ *  Set this bit to clear I2C_DET_START_INT interrupt.
+ */
+#define I2C_DET_START_INT_CLR    (BIT(15))
+#define I2C_DET_START_INT_CLR_M  (I2C_DET_START_INT_CLR_V << I2C_DET_START_INT_CLR_S)
+#define I2C_DET_START_INT_CLR_V  0x00000001U
+#define I2C_DET_START_INT_CLR_S  15
+/** I2C_SLAVE_STRETCH_INT_CLR : WT; bitpos: [16]; default: 0;
+ *  Set this bit to clear I2C_SLAVE_STRETCH_INT interrupt.
+ */
+#define I2C_SLAVE_STRETCH_INT_CLR    (BIT(16))
+#define I2C_SLAVE_STRETCH_INT_CLR_M  (I2C_SLAVE_STRETCH_INT_CLR_V << I2C_SLAVE_STRETCH_INT_CLR_S)
+#define I2C_SLAVE_STRETCH_INT_CLR_V  0x00000001U
+#define I2C_SLAVE_STRETCH_INT_CLR_S  16
+/** I2C_GENERAL_CALL_INT_CLR : WT; bitpos: [17]; default: 0;
+ *  Set this bit for I2C_GENARAL_CALL_INT interrupt.
+ */
+#define I2C_GENERAL_CALL_INT_CLR    (BIT(17))
+#define I2C_GENERAL_CALL_INT_CLR_M  (I2C_GENERAL_CALL_INT_CLR_V << I2C_GENERAL_CALL_INT_CLR_S)
+#define I2C_GENERAL_CALL_INT_CLR_V  0x00000001U
+#define I2C_GENERAL_CALL_INT_CLR_S  17
+
+/** I2C_INT_ENA_REG register
+ *  Interrupt enable bits
+ */
+#define I2C_INT_ENA_REG (DR_REG_I2C_BASE + 0x28)
+/** I2C_RXFIFO_WM_INT_ENA : R/W; bitpos: [0]; default: 0;
+ *  The interrupt enable bit for I2C_RXFIFO_WM_INT interrupt.
+ */
+#define I2C_RXFIFO_WM_INT_ENA    (BIT(0))
+#define I2C_RXFIFO_WM_INT_ENA_M  (I2C_RXFIFO_WM_INT_ENA_V << I2C_RXFIFO_WM_INT_ENA_S)
+#define I2C_RXFIFO_WM_INT_ENA_V  0x00000001U
+#define I2C_RXFIFO_WM_INT_ENA_S  0
+/** I2C_TXFIFO_WM_INT_ENA : R/W; bitpos: [1]; default: 0;
+ *  The interrupt enable bit for I2C_TXFIFO_WM_INT interrupt.
+ */
+#define I2C_TXFIFO_WM_INT_ENA    (BIT(1))
+#define I2C_TXFIFO_WM_INT_ENA_M  (I2C_TXFIFO_WM_INT_ENA_V << I2C_TXFIFO_WM_INT_ENA_S)
+#define I2C_TXFIFO_WM_INT_ENA_V  0x00000001U
+#define I2C_TXFIFO_WM_INT_ENA_S  1
+/** I2C_RXFIFO_OVF_INT_ENA : R/W; bitpos: [2]; default: 0;
+ *  The interrupt enable bit for I2C_RXFIFO_OVF_INT interrupt.
+ */
+#define I2C_RXFIFO_OVF_INT_ENA    (BIT(2))
+#define I2C_RXFIFO_OVF_INT_ENA_M  (I2C_RXFIFO_OVF_INT_ENA_V << I2C_RXFIFO_OVF_INT_ENA_S)
+#define I2C_RXFIFO_OVF_INT_ENA_V  0x00000001U
+#define I2C_RXFIFO_OVF_INT_ENA_S  2
+/** I2C_END_DETECT_INT_ENA : R/W; bitpos: [3]; default: 0;
+ *  The interrupt enable bit for the I2C_END_DETECT_INT interrupt.
+ */
+#define I2C_END_DETECT_INT_ENA    (BIT(3))
+#define I2C_END_DETECT_INT_ENA_M  (I2C_END_DETECT_INT_ENA_V << I2C_END_DETECT_INT_ENA_S)
+#define I2C_END_DETECT_INT_ENA_V  0x00000001U
+#define I2C_END_DETECT_INT_ENA_S  3
+/** I2C_BYTE_TRANS_DONE_INT_ENA : R/W; bitpos: [4]; default: 0;
+ *  The interrupt enable bit for the I2C_END_DETECT_INT interrupt.
+ */
+#define I2C_BYTE_TRANS_DONE_INT_ENA    (BIT(4))
+#define I2C_BYTE_TRANS_DONE_INT_ENA_M  (I2C_BYTE_TRANS_DONE_INT_ENA_V << I2C_BYTE_TRANS_DONE_INT_ENA_S)
+#define I2C_BYTE_TRANS_DONE_INT_ENA_V  0x00000001U
+#define I2C_BYTE_TRANS_DONE_INT_ENA_S  4
+/** I2C_ARBITRATION_LOST_INT_ENA : R/W; bitpos: [5]; default: 0;
+ *  The interrupt enable bit for the I2C_ARBITRATION_LOST_INT interrupt.
+ */
+#define I2C_ARBITRATION_LOST_INT_ENA    (BIT(5))
+#define I2C_ARBITRATION_LOST_INT_ENA_M  (I2C_ARBITRATION_LOST_INT_ENA_V << I2C_ARBITRATION_LOST_INT_ENA_S)
+#define I2C_ARBITRATION_LOST_INT_ENA_V  0x00000001U
+#define I2C_ARBITRATION_LOST_INT_ENA_S  5
+/** I2C_MST_TXFIFO_UDF_INT_ENA : R/W; bitpos: [6]; default: 0;
+ *  The interrupt enable bit for I2C_TRANS_COMPLETE_INT interrupt.
+ */
+#define I2C_MST_TXFIFO_UDF_INT_ENA    (BIT(6))
+#define I2C_MST_TXFIFO_UDF_INT_ENA_M  (I2C_MST_TXFIFO_UDF_INT_ENA_V << I2C_MST_TXFIFO_UDF_INT_ENA_S)
+#define I2C_MST_TXFIFO_UDF_INT_ENA_V  0x00000001U
+#define I2C_MST_TXFIFO_UDF_INT_ENA_S  6
+/** I2C_TRANS_COMPLETE_INT_ENA : R/W; bitpos: [7]; default: 0;
+ *  The interrupt enable bit for the I2C_TRANS_COMPLETE_INT interrupt.
+ */
+#define I2C_TRANS_COMPLETE_INT_ENA    (BIT(7))
+#define I2C_TRANS_COMPLETE_INT_ENA_M  (I2C_TRANS_COMPLETE_INT_ENA_V << I2C_TRANS_COMPLETE_INT_ENA_S)
+#define I2C_TRANS_COMPLETE_INT_ENA_V  0x00000001U
+#define I2C_TRANS_COMPLETE_INT_ENA_S  7
+/** I2C_TIME_OUT_INT_ENA : R/W; bitpos: [8]; default: 0;
+ *  The interrupt enable bit for the I2C_TIME_OUT_INT interrupt.
+ */
+#define I2C_TIME_OUT_INT_ENA    (BIT(8))
+#define I2C_TIME_OUT_INT_ENA_M  (I2C_TIME_OUT_INT_ENA_V << I2C_TIME_OUT_INT_ENA_S)
+#define I2C_TIME_OUT_INT_ENA_V  0x00000001U
+#define I2C_TIME_OUT_INT_ENA_S  8
+/** I2C_TRANS_START_INT_ENA : R/W; bitpos: [9]; default: 0;
+ *  The interrupt enable bit for the I2C_TRANS_START_INT interrupt.
+ */
+#define I2C_TRANS_START_INT_ENA    (BIT(9))
+#define I2C_TRANS_START_INT_ENA_M  (I2C_TRANS_START_INT_ENA_V << I2C_TRANS_START_INT_ENA_S)
+#define I2C_TRANS_START_INT_ENA_V  0x00000001U
+#define I2C_TRANS_START_INT_ENA_S  9
+/** I2C_NACK_INT_ENA : R/W; bitpos: [10]; default: 0;
+ *  The interrupt enable bit for I2C_SLAVE_STRETCH_INT interrupt.
+ */
+#define I2C_NACK_INT_ENA    (BIT(10))
+#define I2C_NACK_INT_ENA_M  (I2C_NACK_INT_ENA_V << I2C_NACK_INT_ENA_S)
+#define I2C_NACK_INT_ENA_V  0x00000001U
+#define I2C_NACK_INT_ENA_S  10
+/** I2C_TXFIFO_OVF_INT_ENA : R/W; bitpos: [11]; default: 0;
+ *  The interrupt enable bit for I2C_TXFIFO_OVF_INT interrupt.
+ */
+#define I2C_TXFIFO_OVF_INT_ENA    (BIT(11))
+#define I2C_TXFIFO_OVF_INT_ENA_M  (I2C_TXFIFO_OVF_INT_ENA_V << I2C_TXFIFO_OVF_INT_ENA_S)
+#define I2C_TXFIFO_OVF_INT_ENA_V  0x00000001U
+#define I2C_TXFIFO_OVF_INT_ENA_S  11
+/** I2C_RXFIFO_UDF_INT_ENA : R/W; bitpos: [12]; default: 0;
+ *  The interrupt enable bit for I2C_RXFIFO_UDF_INT  interrupt.
+ */
+#define I2C_RXFIFO_UDF_INT_ENA    (BIT(12))
+#define I2C_RXFIFO_UDF_INT_ENA_M  (I2C_RXFIFO_UDF_INT_ENA_V << I2C_RXFIFO_UDF_INT_ENA_S)
+#define I2C_RXFIFO_UDF_INT_ENA_V  0x00000001U
+#define I2C_RXFIFO_UDF_INT_ENA_S  12
+/** I2C_SCL_ST_TO_INT_ENA : R/W; bitpos: [13]; default: 0;
+ *  The interrupt enable bit for I2C_SCL_ST_TO_INT interrupt.
+ */
+#define I2C_SCL_ST_TO_INT_ENA    (BIT(13))
+#define I2C_SCL_ST_TO_INT_ENA_M  (I2C_SCL_ST_TO_INT_ENA_V << I2C_SCL_ST_TO_INT_ENA_S)
+#define I2C_SCL_ST_TO_INT_ENA_V  0x00000001U
+#define I2C_SCL_ST_TO_INT_ENA_S  13
+/** I2C_SCL_MAIN_ST_TO_INT_ENA : R/W; bitpos: [14]; default: 0;
+ *  The interrupt enable bit for I2C_SCL_MAIN_ST_TO_INT interrupt.
+ */
+#define I2C_SCL_MAIN_ST_TO_INT_ENA    (BIT(14))
+#define I2C_SCL_MAIN_ST_TO_INT_ENA_M  (I2C_SCL_MAIN_ST_TO_INT_ENA_V << I2C_SCL_MAIN_ST_TO_INT_ENA_S)
+#define I2C_SCL_MAIN_ST_TO_INT_ENA_V  0x00000001U
+#define I2C_SCL_MAIN_ST_TO_INT_ENA_S  14
+/** I2C_DET_START_INT_ENA : R/W; bitpos: [15]; default: 0;
+ *  The interrupt enable bit for I2C_DET_START_INT interrupt.
+ */
+#define I2C_DET_START_INT_ENA    (BIT(15))
+#define I2C_DET_START_INT_ENA_M  (I2C_DET_START_INT_ENA_V << I2C_DET_START_INT_ENA_S)
+#define I2C_DET_START_INT_ENA_V  0x00000001U
+#define I2C_DET_START_INT_ENA_S  15
+/** I2C_SLAVE_STRETCH_INT_ENA : R/W; bitpos: [16]; default: 0;
+ *  The interrupt enable bit for I2C_SLAVE_STRETCH_INT interrupt.
+ */
+#define I2C_SLAVE_STRETCH_INT_ENA    (BIT(16))
+#define I2C_SLAVE_STRETCH_INT_ENA_M  (I2C_SLAVE_STRETCH_INT_ENA_V << I2C_SLAVE_STRETCH_INT_ENA_S)
+#define I2C_SLAVE_STRETCH_INT_ENA_V  0x00000001U
+#define I2C_SLAVE_STRETCH_INT_ENA_S  16
+/** I2C_GENERAL_CALL_INT_ENA : R/W; bitpos: [17]; default: 0;
+ *  The interrupt enable bit for I2C_GENARAL_CALL_INT interrupt.
+ */
+#define I2C_GENERAL_CALL_INT_ENA    (BIT(17))
+#define I2C_GENERAL_CALL_INT_ENA_M  (I2C_GENERAL_CALL_INT_ENA_V << I2C_GENERAL_CALL_INT_ENA_S)
+#define I2C_GENERAL_CALL_INT_ENA_V  0x00000001U
+#define I2C_GENERAL_CALL_INT_ENA_S  17
+
+/** I2C_INT_STATUS_REG register
+ *  Status of captured I2C communication events
+ */
+#define I2C_INT_STATUS_REG (DR_REG_I2C_BASE + 0x2c)
+/** I2C_RXFIFO_WM_INT_ST : RO; bitpos: [0]; default: 0;
+ *  The masked interrupt status bit for I2C_RXFIFO_WM_INT interrupt.
+ */
+#define I2C_RXFIFO_WM_INT_ST    (BIT(0))
+#define I2C_RXFIFO_WM_INT_ST_M  (I2C_RXFIFO_WM_INT_ST_V << I2C_RXFIFO_WM_INT_ST_S)
+#define I2C_RXFIFO_WM_INT_ST_V  0x00000001U
+#define I2C_RXFIFO_WM_INT_ST_S  0
+/** I2C_TXFIFO_WM_INT_ST : RO; bitpos: [1]; default: 0;
+ *  The masked interrupt status bit for I2C_TXFIFO_WM_INT interrupt.
+ */
+#define I2C_TXFIFO_WM_INT_ST    (BIT(1))
+#define I2C_TXFIFO_WM_INT_ST_M  (I2C_TXFIFO_WM_INT_ST_V << I2C_TXFIFO_WM_INT_ST_S)
+#define I2C_TXFIFO_WM_INT_ST_V  0x00000001U
+#define I2C_TXFIFO_WM_INT_ST_S  1
+/** I2C_RXFIFO_OVF_INT_ST : RO; bitpos: [2]; default: 0;
+ *  The masked interrupt status bit for I2C_RXFIFO_OVF_INT interrupt.
+ */
+#define I2C_RXFIFO_OVF_INT_ST    (BIT(2))
+#define I2C_RXFIFO_OVF_INT_ST_M  (I2C_RXFIFO_OVF_INT_ST_V << I2C_RXFIFO_OVF_INT_ST_S)
+#define I2C_RXFIFO_OVF_INT_ST_V  0x00000001U
+#define I2C_RXFIFO_OVF_INT_ST_S  2
+/** I2C_END_DETECT_INT_ST : RO; bitpos: [3]; default: 0;
+ *  The masked interrupt status bit for the I2C_END_DETECT_INT interrupt.
+ */
+#define I2C_END_DETECT_INT_ST    (BIT(3))
+#define I2C_END_DETECT_INT_ST_M  (I2C_END_DETECT_INT_ST_V << I2C_END_DETECT_INT_ST_S)
+#define I2C_END_DETECT_INT_ST_V  0x00000001U
+#define I2C_END_DETECT_INT_ST_S  3
+/** I2C_BYTE_TRANS_DONE_INT_ST : RO; bitpos: [4]; default: 0;
+ *  The masked interrupt status bit for the I2C_END_DETECT_INT interrupt.
+ */
+#define I2C_BYTE_TRANS_DONE_INT_ST    (BIT(4))
+#define I2C_BYTE_TRANS_DONE_INT_ST_M  (I2C_BYTE_TRANS_DONE_INT_ST_V << I2C_BYTE_TRANS_DONE_INT_ST_S)
+#define I2C_BYTE_TRANS_DONE_INT_ST_V  0x00000001U
+#define I2C_BYTE_TRANS_DONE_INT_ST_S  4
+/** I2C_ARBITRATION_LOST_INT_ST : RO; bitpos: [5]; default: 0;
+ *  The masked interrupt status bit for the I2C_ARBITRATION_LOST_INT interrupt.
+ */
+#define I2C_ARBITRATION_LOST_INT_ST    (BIT(5))
+#define I2C_ARBITRATION_LOST_INT_ST_M  (I2C_ARBITRATION_LOST_INT_ST_V << I2C_ARBITRATION_LOST_INT_ST_S)
+#define I2C_ARBITRATION_LOST_INT_ST_V  0x00000001U
+#define I2C_ARBITRATION_LOST_INT_ST_S  5
+/** I2C_MST_TXFIFO_UDF_INT_ST : RO; bitpos: [6]; default: 0;
+ *  The masked interrupt status bit for I2C_TRANS_COMPLETE_INT interrupt.
+ */
+#define I2C_MST_TXFIFO_UDF_INT_ST    (BIT(6))
+#define I2C_MST_TXFIFO_UDF_INT_ST_M  (I2C_MST_TXFIFO_UDF_INT_ST_V << I2C_MST_TXFIFO_UDF_INT_ST_S)
+#define I2C_MST_TXFIFO_UDF_INT_ST_V  0x00000001U
+#define I2C_MST_TXFIFO_UDF_INT_ST_S  6
+/** I2C_TRANS_COMPLETE_INT_ST : RO; bitpos: [7]; default: 0;
+ *  The masked interrupt status bit for the I2C_TRANS_COMPLETE_INT interrupt.
+ */
+#define I2C_TRANS_COMPLETE_INT_ST    (BIT(7))
+#define I2C_TRANS_COMPLETE_INT_ST_M  (I2C_TRANS_COMPLETE_INT_ST_V << I2C_TRANS_COMPLETE_INT_ST_S)
+#define I2C_TRANS_COMPLETE_INT_ST_V  0x00000001U
+#define I2C_TRANS_COMPLETE_INT_ST_S  7
+/** I2C_TIME_OUT_INT_ST : RO; bitpos: [8]; default: 0;
+ *  The masked interrupt status bit for the I2C_TIME_OUT_INT interrupt.
+ */
+#define I2C_TIME_OUT_INT_ST    (BIT(8))
+#define I2C_TIME_OUT_INT_ST_M  (I2C_TIME_OUT_INT_ST_V << I2C_TIME_OUT_INT_ST_S)
+#define I2C_TIME_OUT_INT_ST_V  0x00000001U
+#define I2C_TIME_OUT_INT_ST_S  8
+/** I2C_TRANS_START_INT_ST : RO; bitpos: [9]; default: 0;
+ *  The masked interrupt status bit for the I2C_TRANS_START_INT interrupt.
+ */
+#define I2C_TRANS_START_INT_ST    (BIT(9))
+#define I2C_TRANS_START_INT_ST_M  (I2C_TRANS_START_INT_ST_V << I2C_TRANS_START_INT_ST_S)
+#define I2C_TRANS_START_INT_ST_V  0x00000001U
+#define I2C_TRANS_START_INT_ST_S  9
+/** I2C_NACK_INT_ST : RO; bitpos: [10]; default: 0;
+ *  The masked interrupt status bit for I2C_SLAVE_STRETCH_INT interrupt.
+ */
+#define I2C_NACK_INT_ST    (BIT(10))
+#define I2C_NACK_INT_ST_M  (I2C_NACK_INT_ST_V << I2C_NACK_INT_ST_S)
+#define I2C_NACK_INT_ST_V  0x00000001U
+#define I2C_NACK_INT_ST_S  10
+/** I2C_TXFIFO_OVF_INT_ST : RO; bitpos: [11]; default: 0;
+ *  The masked interrupt status bit for I2C_TXFIFO_OVF_INT interrupt.
+ */
+#define I2C_TXFIFO_OVF_INT_ST    (BIT(11))
+#define I2C_TXFIFO_OVF_INT_ST_M  (I2C_TXFIFO_OVF_INT_ST_V << I2C_TXFIFO_OVF_INT_ST_S)
+#define I2C_TXFIFO_OVF_INT_ST_V  0x00000001U
+#define I2C_TXFIFO_OVF_INT_ST_S  11
+/** I2C_RXFIFO_UDF_INT_ST : RO; bitpos: [12]; default: 0;
+ *  The masked interrupt status bit for I2C_RXFIFO_UDF_INT  interrupt.
+ */
+#define I2C_RXFIFO_UDF_INT_ST    (BIT(12))
+#define I2C_RXFIFO_UDF_INT_ST_M  (I2C_RXFIFO_UDF_INT_ST_V << I2C_RXFIFO_UDF_INT_ST_S)
+#define I2C_RXFIFO_UDF_INT_ST_V  0x00000001U
+#define I2C_RXFIFO_UDF_INT_ST_S  12
+/** I2C_SCL_ST_TO_INT_ST : RO; bitpos: [13]; default: 0;
+ *  The masked interrupt status bit for I2C_SCL_ST_TO_INT interrupt.
+ */
+#define I2C_SCL_ST_TO_INT_ST    (BIT(13))
+#define I2C_SCL_ST_TO_INT_ST_M  (I2C_SCL_ST_TO_INT_ST_V << I2C_SCL_ST_TO_INT_ST_S)
+#define I2C_SCL_ST_TO_INT_ST_V  0x00000001U
+#define I2C_SCL_ST_TO_INT_ST_S  13
+/** I2C_SCL_MAIN_ST_TO_INT_ST : RO; bitpos: [14]; default: 0;
+ *  The masked interrupt status bit for I2C_SCL_MAIN_ST_TO_INT interrupt.
+ */
+#define I2C_SCL_MAIN_ST_TO_INT_ST    (BIT(14))
+#define I2C_SCL_MAIN_ST_TO_INT_ST_M  (I2C_SCL_MAIN_ST_TO_INT_ST_V << I2C_SCL_MAIN_ST_TO_INT_ST_S)
+#define I2C_SCL_MAIN_ST_TO_INT_ST_V  0x00000001U
+#define I2C_SCL_MAIN_ST_TO_INT_ST_S  14
+/** I2C_DET_START_INT_ST : RO; bitpos: [15]; default: 0;
+ *  The masked interrupt status bit for I2C_DET_START_INT interrupt.
+ */
+#define I2C_DET_START_INT_ST    (BIT(15))
+#define I2C_DET_START_INT_ST_M  (I2C_DET_START_INT_ST_V << I2C_DET_START_INT_ST_S)
+#define I2C_DET_START_INT_ST_V  0x00000001U
+#define I2C_DET_START_INT_ST_S  15
+/** I2C_SLAVE_STRETCH_INT_ST : RO; bitpos: [16]; default: 0;
+ *  The masked interrupt status bit for I2C_SLAVE_STRETCH_INT interrupt.
+ */
+#define I2C_SLAVE_STRETCH_INT_ST    (BIT(16))
+#define I2C_SLAVE_STRETCH_INT_ST_M  (I2C_SLAVE_STRETCH_INT_ST_V << I2C_SLAVE_STRETCH_INT_ST_S)
+#define I2C_SLAVE_STRETCH_INT_ST_V  0x00000001U
+#define I2C_SLAVE_STRETCH_INT_ST_S  16
+/** I2C_GENERAL_CALL_INT_ST : RO; bitpos: [17]; default: 0;
+ *  The masked interrupt status bit for I2C_GENARAL_CALL_INT interrupt.
+ */
+#define I2C_GENERAL_CALL_INT_ST    (BIT(17))
+#define I2C_GENERAL_CALL_INT_ST_M  (I2C_GENERAL_CALL_INT_ST_V << I2C_GENERAL_CALL_INT_ST_S)
+#define I2C_GENERAL_CALL_INT_ST_V  0x00000001U
+#define I2C_GENERAL_CALL_INT_ST_S  17
+
+/** I2C_SDA_HOLD_REG register
+ *  Configures the hold time after a negative SCL edge.
+ */
+#define I2C_SDA_HOLD_REG (DR_REG_I2C_BASE + 0x30)
+/** I2C_SDA_HOLD_TIME : R/W; bitpos: [8:0]; default: 0;
+ *  This register is used to configure the time to hold the data after the negative
+ *  edge of SCL, in I2C module clock cycles.
+ */
+#define I2C_SDA_HOLD_TIME    0x000001FFU
+#define I2C_SDA_HOLD_TIME_M  (I2C_SDA_HOLD_TIME_V << I2C_SDA_HOLD_TIME_S)
+#define I2C_SDA_HOLD_TIME_V  0x000001FFU
+#define I2C_SDA_HOLD_TIME_S  0
+
+/** I2C_SDA_SAMPLE_REG register
+ *  Configures the sample time after a positive SCL edge.
+ */
+#define I2C_SDA_SAMPLE_REG (DR_REG_I2C_BASE + 0x34)
+/** I2C_SDA_SAMPLE_TIME : R/W; bitpos: [8:0]; default: 0;
+ *  This register is used to configure for how long SDA is sampled, in I2C module clock
+ *  cycles.
+ */
+#define I2C_SDA_SAMPLE_TIME    0x000001FFU
+#define I2C_SDA_SAMPLE_TIME_M  (I2C_SDA_SAMPLE_TIME_V << I2C_SDA_SAMPLE_TIME_S)
+#define I2C_SDA_SAMPLE_TIME_V  0x000001FFU
+#define I2C_SDA_SAMPLE_TIME_S  0
+
+/** I2C_SCL_HIGH_PERIOD_REG register
+ *  Configures the high level width of SCL
+ */
+#define I2C_SCL_HIGH_PERIOD_REG (DR_REG_I2C_BASE + 0x38)
+/** I2C_SCL_HIGH_PERIOD : R/W; bitpos: [8:0]; default: 0;
+ *  This register is used to configure for how long SCL remains high in master mode, in
+ *  I2C module clock cycles.
+ */
+#define I2C_SCL_HIGH_PERIOD    0x000001FFU
+#define I2C_SCL_HIGH_PERIOD_M  (I2C_SCL_HIGH_PERIOD_V << I2C_SCL_HIGH_PERIOD_S)
+#define I2C_SCL_HIGH_PERIOD_V  0x000001FFU
+#define I2C_SCL_HIGH_PERIOD_S  0
+/** I2C_SCL_WAIT_HIGH_PERIOD : R/W; bitpos: [15:9]; default: 0;
+ *  This register is used to configure for the SCL_FSM's waiting period for SCL high
+ *  level in master mode, in I2C module clock cycles.
+ */
+#define I2C_SCL_WAIT_HIGH_PERIOD    0x0000007FU
+#define I2C_SCL_WAIT_HIGH_PERIOD_M  (I2C_SCL_WAIT_HIGH_PERIOD_V << I2C_SCL_WAIT_HIGH_PERIOD_S)
+#define I2C_SCL_WAIT_HIGH_PERIOD_V  0x0000007FU
+#define I2C_SCL_WAIT_HIGH_PERIOD_S  9
+
+/** I2C_SCL_START_HOLD_REG register
+ *  Configures the delay between the SDA and SCL negative edge for a start condition
+ */
+#define I2C_SCL_START_HOLD_REG (DR_REG_I2C_BASE + 0x40)
+/** I2C_SCL_START_HOLD_TIME : R/W; bitpos: [8:0]; default: 8;
+ *  This register is used to configure the time between the negative edge
+ *  of SDA and the negative edge of SCL for a START condition, in I2C module clock
+ *  cycles.
+ */
+#define I2C_SCL_START_HOLD_TIME    0x000001FFU
+#define I2C_SCL_START_HOLD_TIME_M  (I2C_SCL_START_HOLD_TIME_V << I2C_SCL_START_HOLD_TIME_S)
+#define I2C_SCL_START_HOLD_TIME_V  0x000001FFU
+#define I2C_SCL_START_HOLD_TIME_S  0
+
+/** I2C_SCL_RSTART_SETUP_REG register
+ *  Configures the delay between the positive
+ *  edge of SCL and the negative edge of SDA
+ */
+#define I2C_SCL_RSTART_SETUP_REG (DR_REG_I2C_BASE + 0x44)
+/** I2C_SCL_RSTART_SETUP_TIME : R/W; bitpos: [8:0]; default: 8;
+ *  This register is used to configure the time between the positive
+ *  edge of SCL and the negative edge of SDA for a RESTART condition, in I2C module
+ *  clock cycles.
+ */
+#define I2C_SCL_RSTART_SETUP_TIME    0x000001FFU
+#define I2C_SCL_RSTART_SETUP_TIME_M  (I2C_SCL_RSTART_SETUP_TIME_V << I2C_SCL_RSTART_SETUP_TIME_S)
+#define I2C_SCL_RSTART_SETUP_TIME_V  0x000001FFU
+#define I2C_SCL_RSTART_SETUP_TIME_S  0
+
+/** I2C_SCL_STOP_HOLD_REG register
+ *  Configures the delay after the SCL clock
+ *  edge for a stop condition
+ */
+#define I2C_SCL_STOP_HOLD_REG (DR_REG_I2C_BASE + 0x48)
+/** I2C_SCL_STOP_HOLD_TIME : R/W; bitpos: [8:0]; default: 8;
+ *  This register is used to configure the delay after the STOP condition,
+ *  in I2C module clock cycles.
+ */
+#define I2C_SCL_STOP_HOLD_TIME    0x000001FFU
+#define I2C_SCL_STOP_HOLD_TIME_M  (I2C_SCL_STOP_HOLD_TIME_V << I2C_SCL_STOP_HOLD_TIME_S)
+#define I2C_SCL_STOP_HOLD_TIME_V  0x000001FFU
+#define I2C_SCL_STOP_HOLD_TIME_S  0
+
+/** I2C_SCL_STOP_SETUP_REG register
+ *  Configures the delay between the SDA and
+ *  SCL positive edge for a stop condition
+ */
+#define I2C_SCL_STOP_SETUP_REG (DR_REG_I2C_BASE + 0x4c)
+/** I2C_SCL_STOP_SETUP_TIME : R/W; bitpos: [8:0]; default: 8;
+ *  This register is used to configure the time between the positive edge
+ *  of SCL and the positive edge of SDA, in I2C module clock cycles.
+ */
+#define I2C_SCL_STOP_SETUP_TIME    0x000001FFU
+#define I2C_SCL_STOP_SETUP_TIME_M  (I2C_SCL_STOP_SETUP_TIME_V << I2C_SCL_STOP_SETUP_TIME_S)
+#define I2C_SCL_STOP_SETUP_TIME_V  0x000001FFU
+#define I2C_SCL_STOP_SETUP_TIME_S  0
+
+/** I2C_FILTER_CFG_REG register
+ *  SCL and SDA filter configuration register
+ */
+#define I2C_FILTER_CFG_REG (DR_REG_I2C_BASE + 0x50)
+/** I2C_SCL_FILTER_THRES : R/W; bitpos: [3:0]; default: 0;
+ *  When a pulse on the SCL input has smaller width than this register value
+ *  in I2C module clock cycles, the I2C controller will ignore that pulse.
+ */
+#define I2C_SCL_FILTER_THRES    0x0000000FU
+#define I2C_SCL_FILTER_THRES_M  (I2C_SCL_FILTER_THRES_V << I2C_SCL_FILTER_THRES_S)
+#define I2C_SCL_FILTER_THRES_V  0x0000000FU
+#define I2C_SCL_FILTER_THRES_S  0
+/** I2C_SDA_FILTER_THRES : R/W; bitpos: [7:4]; default: 0;
+ *  When a pulse on the SDA input has smaller width than this register value
+ *  in I2C module clock cycles, the I2C controller will ignore that pulse.
+ */
+#define I2C_SDA_FILTER_THRES    0x0000000FU
+#define I2C_SDA_FILTER_THRES_M  (I2C_SDA_FILTER_THRES_V << I2C_SDA_FILTER_THRES_S)
+#define I2C_SDA_FILTER_THRES_V  0x0000000FU
+#define I2C_SDA_FILTER_THRES_S  4
+/** I2C_SCL_FILTER_EN : R/W; bitpos: [8]; default: 1;
+ *  This is the filter enable bit for SCL.
+ */
+#define I2C_SCL_FILTER_EN    (BIT(8))
+#define I2C_SCL_FILTER_EN_M  (I2C_SCL_FILTER_EN_V << I2C_SCL_FILTER_EN_S)
+#define I2C_SCL_FILTER_EN_V  0x00000001U
+#define I2C_SCL_FILTER_EN_S  8
+/** I2C_SDA_FILTER_EN : R/W; bitpos: [9]; default: 1;
+ *  This is the filter enable bit for SDA.
+ */
+#define I2C_SDA_FILTER_EN    (BIT(9))
+#define I2C_SDA_FILTER_EN_M  (I2C_SDA_FILTER_EN_V << I2C_SDA_FILTER_EN_S)
+#define I2C_SDA_FILTER_EN_V  0x00000001U
+#define I2C_SDA_FILTER_EN_S  9
+
+/** I2C_CLK_CONF_REG register
+ *  I2C CLK configuration register
+ */
+#define I2C_CLK_CONF_REG (DR_REG_I2C_BASE + 0x54)
+/** I2C_SCLK_DIV_NUM : R/W; bitpos: [7:0]; default: 0;
+ *  the integral part of the fractional divisor for i2c module
+ */
+#define I2C_SCLK_DIV_NUM    0x000000FFU
+#define I2C_SCLK_DIV_NUM_M  (I2C_SCLK_DIV_NUM_V << I2C_SCLK_DIV_NUM_S)
+#define I2C_SCLK_DIV_NUM_V  0x000000FFU
+#define I2C_SCLK_DIV_NUM_S  0
+/** I2C_SCLK_DIV_A : R/W; bitpos: [13:8]; default: 0;
+ *  the numerator of the fractional part of the fractional divisor for i2c module
+ */
+#define I2C_SCLK_DIV_A    0x0000003FU
+#define I2C_SCLK_DIV_A_M  (I2C_SCLK_DIV_A_V << I2C_SCLK_DIV_A_S)
+#define I2C_SCLK_DIV_A_V  0x0000003FU
+#define I2C_SCLK_DIV_A_S  8
+/** I2C_SCLK_DIV_B : R/W; bitpos: [19:14]; default: 0;
+ *  the denominator of the fractional part of the fractional divisor for i2c module
+ */
+#define I2C_SCLK_DIV_B    0x0000003FU
+#define I2C_SCLK_DIV_B_M  (I2C_SCLK_DIV_B_V << I2C_SCLK_DIV_B_S)
+#define I2C_SCLK_DIV_B_V  0x0000003FU
+#define I2C_SCLK_DIV_B_S  14
+/** I2C_SCLK_SEL : R/W; bitpos: [20]; default: 0;
+ *  The clock selection for i2c module:0-XTAL;1-CLK_8MHz.
+ */
+#define I2C_SCLK_SEL    (BIT(20))
+#define I2C_SCLK_SEL_M  (I2C_SCLK_SEL_V << I2C_SCLK_SEL_S)
+#define I2C_SCLK_SEL_V  0x00000001U
+#define I2C_SCLK_SEL_S  20
+/** I2C_SCLK_ACTIVE : R/W; bitpos: [21]; default: 1;
+ *  The clock switch for i2c module
+ */
+#define I2C_SCLK_ACTIVE    (BIT(21))
+#define I2C_SCLK_ACTIVE_M  (I2C_SCLK_ACTIVE_V << I2C_SCLK_ACTIVE_S)
+#define I2C_SCLK_ACTIVE_V  0x00000001U
+#define I2C_SCLK_ACTIVE_S  21
+
+/** I2C_COMD0_REG register
+ *  I2C command register 0
+ */
+#define I2C_COMD0_REG (DR_REG_I2C_BASE + 0x58)
+/** I2C_COMMAND0 : R/W; bitpos: [13:0]; default: 0;
+ *  This is the content of command 0. It consists of three parts:
+ *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+ *  Byte_num represents the number of bytes that need to be sent or received.
+ *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+ *  structure for more
+ *  Information.
+ */
+#define I2C_COMMAND0    0x00003FFFU
+#define I2C_COMMAND0_M  (I2C_COMMAND0_V << I2C_COMMAND0_S)
+#define I2C_COMMAND0_V  0x00003FFFU
+#define I2C_COMMAND0_S  0
+/** I2C_COMMAND0_DONE : R/W/SS; bitpos: [31]; default: 0;
+ *  When command 0 is done in I2C Master mode, this bit changes to high
+ *  level.
+ */
+#define I2C_COMMAND0_DONE    (BIT(31))
+#define I2C_COMMAND0_DONE_M  (I2C_COMMAND0_DONE_V << I2C_COMMAND0_DONE_S)
+#define I2C_COMMAND0_DONE_V  0x00000001U
+#define I2C_COMMAND0_DONE_S  31
+
+/** I2C_COMD1_REG register
+ *  I2C command register 1
+ */
+#define I2C_COMD1_REG (DR_REG_I2C_BASE + 0x5c)
+/** I2C_COMMAND1 : R/W; bitpos: [13:0]; default: 0;
+ *  This is the content of command 1. It consists of three parts:
+ *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+ *  Byte_num represents the number of bytes that need to be sent or received.
+ *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+ *  structure for more
+ *  Information.
+ */
+#define I2C_COMMAND1    0x00003FFFU
+#define I2C_COMMAND1_M  (I2C_COMMAND1_V << I2C_COMMAND1_S)
+#define I2C_COMMAND1_V  0x00003FFFU
+#define I2C_COMMAND1_S  0
+/** I2C_COMMAND1_DONE : R/W/SS; bitpos: [31]; default: 0;
+ *  When command 1 is done in I2C Master mode, this bit changes to high
+ *  level.
+ */
+#define I2C_COMMAND1_DONE    (BIT(31))
+#define I2C_COMMAND1_DONE_M  (I2C_COMMAND1_DONE_V << I2C_COMMAND1_DONE_S)
+#define I2C_COMMAND1_DONE_V  0x00000001U
+#define I2C_COMMAND1_DONE_S  31
+
+/** I2C_COMD2_REG register
+ *  I2C command register 2
+ */
+#define I2C_COMD2_REG (DR_REG_I2C_BASE + 0x60)
+/** I2C_COMMAND2 : R/W; bitpos: [13:0]; default: 0;
+ *  This is the content of command 2. It consists of three parts:
+ *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+ *  Byte_num represents the number of bytes that need to be sent or received.
+ *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+ *  structure for more
+ *  Information.
+ */
+#define I2C_COMMAND2    0x00003FFFU
+#define I2C_COMMAND2_M  (I2C_COMMAND2_V << I2C_COMMAND2_S)
+#define I2C_COMMAND2_V  0x00003FFFU
+#define I2C_COMMAND2_S  0
+/** I2C_COMMAND2_DONE : R/W/SS; bitpos: [31]; default: 0;
+ *  When command 2 is done in I2C Master mode, this bit changes to high
+ *  Level.
+ */
+#define I2C_COMMAND2_DONE    (BIT(31))
+#define I2C_COMMAND2_DONE_M  (I2C_COMMAND2_DONE_V << I2C_COMMAND2_DONE_S)
+#define I2C_COMMAND2_DONE_V  0x00000001U
+#define I2C_COMMAND2_DONE_S  31
+
+/** I2C_COMD3_REG register
+ *  I2C command register 3
+ */
+#define I2C_COMD3_REG (DR_REG_I2C_BASE + 0x64)
+/** I2C_COMMAND3 : R/W; bitpos: [13:0]; default: 0;
+ *  This is the content of command 3. It consists of three parts:
+ *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+ *  Byte_num represents the number of bytes that need to be sent or received.
+ *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+ *  structure for more
+ *  Information.
+ */
+#define I2C_COMMAND3    0x00003FFFU
+#define I2C_COMMAND3_M  (I2C_COMMAND3_V << I2C_COMMAND3_S)
+#define I2C_COMMAND3_V  0x00003FFFU
+#define I2C_COMMAND3_S  0
+/** I2C_COMMAND3_DONE : R/W/SS; bitpos: [31]; default: 0;
+ *  When command 3 is done in I2C Master mode, this bit changes to high
+ *  level.
+ */
+#define I2C_COMMAND3_DONE    (BIT(31))
+#define I2C_COMMAND3_DONE_M  (I2C_COMMAND3_DONE_V << I2C_COMMAND3_DONE_S)
+#define I2C_COMMAND3_DONE_V  0x00000001U
+#define I2C_COMMAND3_DONE_S  31
+
+/** I2C_COMD4_REG register
+ *  I2C command register 4
+ */
+#define I2C_COMD4_REG (DR_REG_I2C_BASE + 0x68)
+/** I2C_COMMAND4 : R/W; bitpos: [13:0]; default: 0;
+ *  This is the content of command 4. It consists of three parts:
+ *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+ *  Byte_num represents the number of bytes that need to be sent or received.
+ *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+ *  structure for more
+ *  Information.
+ */
+#define I2C_COMMAND4    0x00003FFFU
+#define I2C_COMMAND4_M  (I2C_COMMAND4_V << I2C_COMMAND4_S)
+#define I2C_COMMAND4_V  0x00003FFFU
+#define I2C_COMMAND4_S  0
+/** I2C_COMMAND4_DONE : R/W/SS; bitpos: [31]; default: 0;
+ *  When command 4 is done in I2C Master mode, this bit changes to high
+ *  level.
+ */
+#define I2C_COMMAND4_DONE    (BIT(31))
+#define I2C_COMMAND4_DONE_M  (I2C_COMMAND4_DONE_V << I2C_COMMAND4_DONE_S)
+#define I2C_COMMAND4_DONE_V  0x00000001U
+#define I2C_COMMAND4_DONE_S  31
+
+/** I2C_COMD5_REG register
+ *  I2C command register 5
+ */
+#define I2C_COMD5_REG (DR_REG_I2C_BASE + 0x6c)
+/** I2C_COMMAND5 : R/W; bitpos: [13:0]; default: 0;
+ *  This is the content of command 5. It consists of three parts:
+ *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+ *  Byte_num represents the number of bytes that need to be sent or received.
+ *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+ *  structure for more
+ *  Information.
+ */
+#define I2C_COMMAND5    0x00003FFFU
+#define I2C_COMMAND5_M  (I2C_COMMAND5_V << I2C_COMMAND5_S)
+#define I2C_COMMAND5_V  0x00003FFFU
+#define I2C_COMMAND5_S  0
+/** I2C_COMMAND5_DONE : R/W/SS; bitpos: [31]; default: 0;
+ *  When command 5 is done in I2C Master mode, this bit changes to high level.
+ */
+#define I2C_COMMAND5_DONE    (BIT(31))
+#define I2C_COMMAND5_DONE_M  (I2C_COMMAND5_DONE_V << I2C_COMMAND5_DONE_S)
+#define I2C_COMMAND5_DONE_V  0x00000001U
+#define I2C_COMMAND5_DONE_S  31
+
+/** I2C_COMD6_REG register
+ *  I2C command register 6
+ */
+#define I2C_COMD6_REG (DR_REG_I2C_BASE + 0x70)
+/** I2C_COMMAND6 : R/W; bitpos: [13:0]; default: 0;
+ *  This is the content of command 6. It consists of three parts:
+ *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+ *  Byte_num represents the number of bytes that need to be sent or received.
+ *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+ *  structure for more
+ *  Information.
+ */
+#define I2C_COMMAND6    0x00003FFFU
+#define I2C_COMMAND6_M  (I2C_COMMAND6_V << I2C_COMMAND6_S)
+#define I2C_COMMAND6_V  0x00003FFFU
+#define I2C_COMMAND6_S  0
+/** I2C_COMMAND6_DONE : R/W/SS; bitpos: [31]; default: 0;
+ *  When command 6 is done in I2C Master mode, this bit changes to high level.
+ */
+#define I2C_COMMAND6_DONE    (BIT(31))
+#define I2C_COMMAND6_DONE_M  (I2C_COMMAND6_DONE_V << I2C_COMMAND6_DONE_S)
+#define I2C_COMMAND6_DONE_V  0x00000001U
+#define I2C_COMMAND6_DONE_S  31
+
+/** I2C_COMD7_REG register
+ *  I2C command register 7
+ */
+#define I2C_COMD7_REG (DR_REG_I2C_BASE + 0x74)
+/** I2C_COMMAND7 : R/W; bitpos: [13:0]; default: 0;
+ *  This is the content of command 7. It consists of three parts:
+ *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+ *  Byte_num represents the number of bytes that need to be sent or received.
+ *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+ *  structure for more
+ *  Information.
+ */
+#define I2C_COMMAND7    0x00003FFFU
+#define I2C_COMMAND7_M  (I2C_COMMAND7_V << I2C_COMMAND7_S)
+#define I2C_COMMAND7_V  0x00003FFFU
+#define I2C_COMMAND7_S  0
+/** I2C_COMMAND7_DONE : R/W/SS; bitpos: [31]; default: 0;
+ *  When command 7 is done in I2C Master mode, this bit changes to high level.
+ */
+#define I2C_COMMAND7_DONE    (BIT(31))
+#define I2C_COMMAND7_DONE_M  (I2C_COMMAND7_DONE_V << I2C_COMMAND7_DONE_S)
+#define I2C_COMMAND7_DONE_V  0x00000001U
+#define I2C_COMMAND7_DONE_S  31
+
+/** I2C_SCL_ST_TIME_OUT_REG register
+ *  SCL status time out register
+ */
+#define I2C_SCL_ST_TIME_OUT_REG (DR_REG_I2C_BASE + 0x78)
+/** I2C_SCL_ST_TO_I2C : R/W; bitpos: [4:0]; default: 16;
+ *  The threshold value of SCL_FSM state unchanged period. It should be o more than 23
+ */
+#define I2C_SCL_ST_TO_I2C    0x0000001FU
+#define I2C_SCL_ST_TO_I2C_M  (I2C_SCL_ST_TO_I2C_V << I2C_SCL_ST_TO_I2C_S)
+#define I2C_SCL_ST_TO_I2C_V  0x0000001FU
+#define I2C_SCL_ST_TO_I2C_S  0
+
+/** I2C_SCL_MAIN_ST_TIME_OUT_REG register
+ *  SCL main status time out register
+ */
+#define I2C_SCL_MAIN_ST_TIME_OUT_REG (DR_REG_I2C_BASE + 0x7c)
+/** I2C_SCL_MAIN_ST_TO_I2C : R/W; bitpos: [4:0]; default: 16;
+ *  The threshold value of SCL_MAIN_FSM state unchanged period.nIt should be o more
+ *  than 23
+ */
+#define I2C_SCL_MAIN_ST_TO_I2C    0x0000001FU
+#define I2C_SCL_MAIN_ST_TO_I2C_M  (I2C_SCL_MAIN_ST_TO_I2C_V << I2C_SCL_MAIN_ST_TO_I2C_S)
+#define I2C_SCL_MAIN_ST_TO_I2C_V  0x0000001FU
+#define I2C_SCL_MAIN_ST_TO_I2C_S  0
+
+/** I2C_SCL_SP_CONF_REG register
+ *  Power configuration register
+ */
+#define I2C_SCL_SP_CONF_REG (DR_REG_I2C_BASE + 0x80)
+/** I2C_SCL_RST_SLV_EN : R/W/SC; bitpos: [0]; default: 0;
+ *  When I2C master is IDLE, set this bit to send out SCL pulses. The number of pulses
+ *  equals to reg_scl_rst_slv_num[4:0].
+ */
+#define I2C_SCL_RST_SLV_EN    (BIT(0))
+#define I2C_SCL_RST_SLV_EN_M  (I2C_SCL_RST_SLV_EN_V << I2C_SCL_RST_SLV_EN_S)
+#define I2C_SCL_RST_SLV_EN_V  0x00000001U
+#define I2C_SCL_RST_SLV_EN_S  0
+/** I2C_SCL_RST_SLV_NUM : R/W; bitpos: [5:1]; default: 0;
+ *  Configure the pulses of SCL generated in I2C master mode. Valid when
+ *  reg_scl_rst_slv_en is 1.
+ */
+#define I2C_SCL_RST_SLV_NUM    0x0000001FU
+#define I2C_SCL_RST_SLV_NUM_M  (I2C_SCL_RST_SLV_NUM_V << I2C_SCL_RST_SLV_NUM_S)
+#define I2C_SCL_RST_SLV_NUM_V  0x0000001FU
+#define I2C_SCL_RST_SLV_NUM_S  1
+/** I2C_SCL_PD_EN : R/W; bitpos: [6]; default: 0;
+ *  The power down enable bit for the I2C output SCL line. 1: Power down. 0: Not power
+ *  down. Set reg_scl_force_out and reg_scl_pd_en to 1 to stretch SCL low.
+ */
+#define I2C_SCL_PD_EN    (BIT(6))
+#define I2C_SCL_PD_EN_M  (I2C_SCL_PD_EN_V << I2C_SCL_PD_EN_S)
+#define I2C_SCL_PD_EN_V  0x00000001U
+#define I2C_SCL_PD_EN_S  6
+/** I2C_SDA_PD_EN : R/W; bitpos: [7]; default: 0;
+ *  The power down enable bit for the I2C output SDA line. 1: Power down. 0: Not power
+ *  down. Set reg_sda_force_out and reg_sda_pd_en to 1 to stretch SDA low.
+ */
+#define I2C_SDA_PD_EN    (BIT(7))
+#define I2C_SDA_PD_EN_M  (I2C_SDA_PD_EN_V << I2C_SDA_PD_EN_S)
+#define I2C_SDA_PD_EN_V  0x00000001U
+#define I2C_SDA_PD_EN_S  7
+
+/** I2C_SCL_STRETCH_CONF_REG register
+ *  Set SCL stretch of I2C slave
+ */
+#define I2C_SCL_STRETCH_CONF_REG (DR_REG_I2C_BASE + 0x84)
+/** I2C_STRETCH_PROTECT_NUM : R/W; bitpos: [9:0]; default: 0;
+ *  Configure the period of I2C slave stretching SCL line.
+ */
+#define I2C_STRETCH_PROTECT_NUM    0x000003FFU
+#define I2C_STRETCH_PROTECT_NUM_M  (I2C_STRETCH_PROTECT_NUM_V << I2C_STRETCH_PROTECT_NUM_S)
+#define I2C_STRETCH_PROTECT_NUM_V  0x000003FFU
+#define I2C_STRETCH_PROTECT_NUM_S  0
+/** I2C_SLAVE_SCL_STRETCH_EN : R/W; bitpos: [10]; default: 0;
+ *  The enable bit for slave SCL stretch function. 1: Enable. 0: Disable. The SCL
+ *  output line will be stretched low when reg_slave_scl_stretch_en is 1 and stretch
+ *  event happens. The stretch cause can be seen in reg_stretch_cause.
+ */
+#define I2C_SLAVE_SCL_STRETCH_EN    (BIT(10))
+#define I2C_SLAVE_SCL_STRETCH_EN_M  (I2C_SLAVE_SCL_STRETCH_EN_V << I2C_SLAVE_SCL_STRETCH_EN_S)
+#define I2C_SLAVE_SCL_STRETCH_EN_V  0x00000001U
+#define I2C_SLAVE_SCL_STRETCH_EN_S  10
+/** I2C_SLAVE_SCL_STRETCH_CLR : WT; bitpos: [11]; default: 0;
+ *  Set this bit to clear the I2C slave SCL stretch function.
+ */
+#define I2C_SLAVE_SCL_STRETCH_CLR    (BIT(11))
+#define I2C_SLAVE_SCL_STRETCH_CLR_M  (I2C_SLAVE_SCL_STRETCH_CLR_V << I2C_SLAVE_SCL_STRETCH_CLR_S)
+#define I2C_SLAVE_SCL_STRETCH_CLR_V  0x00000001U
+#define I2C_SLAVE_SCL_STRETCH_CLR_S  11
+/** I2C_SLAVE_BYTE_ACK_CTL_EN : R/W; bitpos: [12]; default: 0;
+ *  The enable bit for slave to control ACK level function.
+ */
+#define I2C_SLAVE_BYTE_ACK_CTL_EN    (BIT(12))
+#define I2C_SLAVE_BYTE_ACK_CTL_EN_M  (I2C_SLAVE_BYTE_ACK_CTL_EN_V << I2C_SLAVE_BYTE_ACK_CTL_EN_S)
+#define I2C_SLAVE_BYTE_ACK_CTL_EN_V  0x00000001U
+#define I2C_SLAVE_BYTE_ACK_CTL_EN_S  12
+/** I2C_SLAVE_BYTE_ACK_LVL : R/W; bitpos: [13]; default: 0;
+ *  Set the ACK level when slave controlling ACK level function enables.
+ */
+#define I2C_SLAVE_BYTE_ACK_LVL    (BIT(13))
+#define I2C_SLAVE_BYTE_ACK_LVL_M  (I2C_SLAVE_BYTE_ACK_LVL_V << I2C_SLAVE_BYTE_ACK_LVL_S)
+#define I2C_SLAVE_BYTE_ACK_LVL_V  0x00000001U
+#define I2C_SLAVE_BYTE_ACK_LVL_S  13
+
+/** I2C_DATE_REG register
+ *  Version register
+ */
+#define I2C_DATE_REG (DR_REG_I2C_BASE + 0xf8)
+/** I2C_DATE : R/W; bitpos: [31:0]; default: 537330177;
+ *  This is the the version register.
+ */
+#define I2C_DATE    0xFFFFFFFFU
+#define I2C_DATE_M  (I2C_DATE_V << I2C_DATE_S)
+#define I2C_DATE_V  0xFFFFFFFFU
+#define I2C_DATE_S  0
+
+/** I2C_TXFIFO_START_ADDR_REG register
+ *  I2C TXFIFO base address register
+ */
+#define I2C_TXFIFO_START_ADDR_REG (DR_REG_I2C_BASE + 0x100)
+/** I2C_TXFIFO_START_ADDR : RO; bitpos: [31:0]; default: 0;
+ *  This is the I2C txfifo first address.
+ */
+#define I2C_TXFIFO_START_ADDR    0xFFFFFFFFU
+#define I2C_TXFIFO_START_ADDR_M  (I2C_TXFIFO_START_ADDR_V << I2C_TXFIFO_START_ADDR_S)
+#define I2C_TXFIFO_START_ADDR_V  0xFFFFFFFFU
+#define I2C_TXFIFO_START_ADDR_S  0
+
+/** I2C_RXFIFO_START_ADDR_REG register
+ *  I2C RXFIFO base address register
+ */
+#define I2C_RXFIFO_START_ADDR_REG (DR_REG_I2C_BASE + 0x180)
+/** I2C_RXFIFO_START_ADDR : RO; bitpos: [31:0]; default: 0;
+ *  This is the I2C rxfifo first address.
+ */
+#define I2C_RXFIFO_START_ADDR    0xFFFFFFFFU
+#define I2C_RXFIFO_START_ADDR_M  (I2C_RXFIFO_START_ADDR_V << I2C_RXFIFO_START_ADDR_S)
+#define I2C_RXFIFO_START_ADDR_V  0xFFFFFFFFU
+#define I2C_RXFIFO_START_ADDR_S  0
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2c_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2c_struct.h
new file mode 100644
index 00000000000..27f6ce9d2b9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2c_struct.h
@@ -0,0 +1,1190 @@
+/** Copyright 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Group: Timing registers */
+/** Type of scl_low_period register
+ *  Configures the low level width of the SCL
+ *  Clock
+ */
+typedef union {
+    struct {
+        /** scl_low_period : R/W; bitpos: [8:0]; default: 0;
+         *  This register is used to configure for how long SCL remains low in master mode, in
+         *  I2C module clock cycles.
+         */
+        uint32_t scl_low_period:9;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} i2c_scl_low_period_reg_t;
+
+/** Type of sda_hold register
+ *  Configures the hold time after a negative SCL edge.
+ */
+typedef union {
+    struct {
+        /** sda_hold_time : R/W; bitpos: [8:0]; default: 0;
+         *  This register is used to configure the time to hold the data after the negative
+         *  edge of SCL, in I2C module clock cycles.
+         */
+        uint32_t sda_hold_time:9;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} i2c_sda_hold_reg_t;
+
+/** Type of sda_sample register
+ *  Configures the sample time after a positive SCL edge.
+ */
+typedef union {
+    struct {
+        /** sda_sample_time : R/W; bitpos: [8:0]; default: 0;
+         *  This register is used to configure for how long SDA is sampled, in I2C module clock
+         *  cycles.
+         */
+        uint32_t sda_sample_time:9;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} i2c_sda_sample_reg_t;
+
+/** Type of scl_high_period register
+ *  Configures the high level width of SCL
+ */
+typedef union {
+    struct {
+        /** scl_high_period : R/W; bitpos: [8:0]; default: 0;
+         *  This register is used to configure for how long SCL remains high in master mode, in
+         *  I2C module clock cycles.
+         */
+        uint32_t scl_high_period:9;
+        /** scl_wait_high_period : R/W; bitpos: [15:9]; default: 0;
+         *  This register is used to configure for the SCL_FSM's waiting period for SCL high
+         *  level in master mode, in I2C module clock cycles.
+         */
+        uint32_t scl_wait_high_period:7;
+        uint32_t reserved_16:16;
+    };
+    uint32_t val;
+} i2c_scl_high_period_reg_t;
+
+/** Type of scl_start_hold register
+ *  Configures the delay between the SDA and SCL negative edge for a start condition
+ */
+typedef union {
+    struct {
+        /** scl_start_hold_time : R/W; bitpos: [8:0]; default: 8;
+         *  This register is used to configure the time between the negative edge
+         *  of SDA and the negative edge of SCL for a START condition, in I2C module clock
+         *  cycles.
+         */
+        uint32_t scl_start_hold_time:9;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} i2c_scl_start_hold_reg_t;
+
+/** Type of scl_rstart_setup register
+ *  Configures the delay between the positive
+ *  edge of SCL and the negative edge of SDA
+ */
+typedef union {
+    struct {
+        /** scl_rstart_setup_time : R/W; bitpos: [8:0]; default: 8;
+         *  This register is used to configure the time between the positive
+         *  edge of SCL and the negative edge of SDA for a RESTART condition, in I2C module
+         *  clock cycles.
+         */
+        uint32_t scl_rstart_setup_time:9;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} i2c_scl_rstart_setup_reg_t;
+
+/** Type of scl_stop_hold register
+ *  Configures the delay after the SCL clock
+ *  edge for a stop condition
+ */
+typedef union {
+    struct {
+        /** scl_stop_hold_time : R/W; bitpos: [8:0]; default: 8;
+         *  This register is used to configure the delay after the STOP condition,
+         *  in I2C module clock cycles.
+         */
+        uint32_t scl_stop_hold_time:9;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} i2c_scl_stop_hold_reg_t;
+
+/** Type of scl_stop_setup register
+ *  Configures the delay between the SDA and
+ *  SCL positive edge for a stop condition
+ */
+typedef union {
+    struct {
+        /** scl_stop_setup_time : R/W; bitpos: [8:0]; default: 8;
+         *  This register is used to configure the time between the positive edge
+         *  of SCL and the positive edge of SDA, in I2C module clock cycles.
+         */
+        uint32_t scl_stop_setup_time:9;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} i2c_scl_stop_setup_reg_t;
+
+/** Type of scl_st_time_out register
+ *  SCL status time out register
+ */
+typedef union {
+    struct {
+        /** scl_st_to_i2c : R/W; bitpos: [4:0]; default: 16;
+         *  The threshold value of SCL_FSM state unchanged period. It should be o more than 23
+         */
+        uint32_t scl_st_to_i2c:5;
+        uint32_t reserved_5:27;
+    };
+    uint32_t val;
+} i2c_scl_st_time_out_reg_t;
+
+/** Type of scl_main_st_time_out register
+ *  SCL main status time out register
+ */
+typedef union {
+    struct {
+        /** scl_main_st_to_i2c : R/W; bitpos: [4:0]; default: 16;
+         *  The threshold value of SCL_MAIN_FSM state unchanged period.nIt should be o more
+         *  than 23
+         */
+        uint32_t scl_main_st_to_i2c:5;
+        uint32_t reserved_5:27;
+    };
+    uint32_t val;
+} i2c_scl_main_st_time_out_reg_t;
+
+
+/** Group: Configuration registers */
+/** Type of ctr register
+ *  Transmission setting
+ */
+typedef union {
+    struct {
+        /** sda_force_out : R/W; bitpos: [0]; default: 1;
+         *  0: direct output; 1: open drain output.
+         */
+        uint32_t sda_force_out:1;
+        /** scl_force_out : R/W; bitpos: [1]; default: 1;
+         *  0: direct output; 1: open drain output.
+         */
+        uint32_t scl_force_out:1;
+        /** sample_scl_level : R/W; bitpos: [2]; default: 0;
+         *  This register is used to select the sample mode.
+         *  1: sample SDA data on the SCL low level.
+         *  0: sample SDA data on the SCL high level.
+         */
+        uint32_t sample_scl_level:1;
+        /** rx_full_ack_level : R/W; bitpos: [3]; default: 1;
+         *  This register is used to configure the ACK value that need to sent by master when
+         *  the rx_fifo_cnt has reached the threshold.
+         */
+        uint32_t rx_full_ack_level:1;
+        /** ms_mode : R/W; bitpos: [4]; default: 0;
+         *  Set this bit to configure the module as an I2C Master. Clear this bit to configure
+         *  the
+         *  module as an I2C Slave.
+         */
+        uint32_t ms_mode:1;
+        /** trans_start : WT; bitpos: [5]; default: 0;
+         *  Set this bit to start sending the data in txfifo.
+         */
+        uint32_t trans_start:1;
+        /** tx_lsb_first : R/W; bitpos: [6]; default: 0;
+         *  This bit is used to control the sending mode for data needing to be sent.
+         *  1: send data from the least significant bit;
+         *  0: send data from the most significant bit.
+         */
+        uint32_t tx_lsb_first:1;
+        /** rx_lsb_first : R/W; bitpos: [7]; default: 0;
+         *  This bit is used to control the storage mode for received data.
+         *  1: receive data from the least significant bit;
+         *  0: receive data from the most significant bit.
+         */
+        uint32_t rx_lsb_first:1;
+        /** clk_en : R/W; bitpos: [8]; default: 0;
+         *  Reserved
+         */
+        uint32_t clk_en:1;
+        /** arbitration_en : R/W; bitpos: [9]; default: 1;
+         *  This is the enable bit for arbitration_lost.
+         */
+        uint32_t arbitration_en:1;
+        /** fsm_rst : WT; bitpos: [10]; default: 0;
+         *  This register is used to reset the scl FMS.
+         */
+        uint32_t fsm_rst:1;
+        /** conf_upgate : WT; bitpos: [11]; default: 0;
+         *  synchronization bit
+         */
+        uint32_t conf_upgate:1;
+        /** slv_tx_auto_start_en : R/W; bitpos: [12]; default: 0;
+         *  This is the enable bit for slave to send data automatically
+         */
+        uint32_t slv_tx_auto_start_en:1;
+        /** addr_10bit_rw_check_en : R/W; bitpos: [13]; default: 0;
+         *  This is the enable bit to check if the r/w bit of 10bit addressing consists with
+         *  I2C protocol
+         */
+        uint32_t addr_10bit_rw_check_en:1;
+        /** addr_broadcasting_en : R/W; bitpos: [14]; default: 0;
+         *  This is the enable bit to support the 7bit general call function.
+         */
+        uint32_t addr_broadcasting_en:1;
+        uint32_t reserved_15:17;
+    };
+    uint32_t val;
+} i2c_ctr_reg_t;
+
+/** Type of to register
+ *  Setting time out control for receiving data.
+ */
+typedef union {
+    struct {
+        /** time_out_value : R/W; bitpos: [4:0]; default: 16;
+         *  This register is used to configure the timeout for receiving a data bit in APB
+         *  clock cycles.
+         */
+        uint32_t time_out_value:5;
+        /** time_out_en : R/W; bitpos: [5]; default: 0;
+         *  This is the enable bit for time out control.
+         */
+        uint32_t time_out_en:1;
+        uint32_t reserved_6:26;
+    };
+    uint32_t val;
+} i2c_to_reg_t;
+
+/** Type of slave_addr register
+ *  Local slave address setting
+ */
+typedef union {
+    struct {
+        /** slave_addr : R/W; bitpos: [14:0]; default: 0;
+         *  When configured as an I2C Slave, this field is used to configure the slave address.
+         */
+        uint32_t slave_addr:15;
+        uint32_t reserved_15:16;
+        /** addr_10bit_en : R/W; bitpos: [31]; default: 0;
+         *  This field is used to enable the slave 10-bit addressing mode in master mode.
+         */
+        uint32_t addr_10bit_en:1;
+    };
+    uint32_t val;
+} i2c_slave_addr_reg_t;
+
+/** Type of fifo_conf register
+ *  FIFO configuration register.
+ */
+typedef union {
+    struct {
+        /** rxfifo_wm_thrhd : R/W; bitpos: [4:0]; default: 11;
+         *  The water mark threshold of rx FIFO in nonfifo access mode. When
+         *  reg_reg_fifo_prt_en is 1 and rx FIFO counter is bigger than
+         *  reg_rxfifo_wm_thrhd[4:0], reg_rxfifo_wm_int_raw bit will be valid.
+         */
+        uint32_t rxfifo_wm_thrhd:5;
+        /** txfifo_wm_thrhd : R/W; bitpos: [9:5]; default: 4;
+         *  The water mark threshold of tx FIFO in nonfifo access mode. When
+         *  reg_reg_fifo_prt_en is 1 and tx FIFO counter is smaller than
+         *  reg_txfifo_wm_thrhd[4:0], reg_txfifo_wm_int_raw bit will be valid.
+         */
+        uint32_t txfifo_wm_thrhd:5;
+        /** nonfifo_en : R/W; bitpos: [10]; default: 0;
+         *  Set this bit to enable APB nonfifo access.
+         */
+        uint32_t nonfifo_en:1;
+        /** fifo_addr_cfg_en : R/W; bitpos: [11]; default: 0;
+         *  When this bit is set to 1, the byte received after the I2C address byte represents
+         *  the offset address in the I2C Slave RAM.
+         */
+        uint32_t fifo_addr_cfg_en:1;
+        /** rx_fifo_rst : R/W; bitpos: [12]; default: 0;
+         *  Set this bit to reset rx-fifo.
+         */
+        uint32_t rx_fifo_rst:1;
+        /** tx_fifo_rst : R/W; bitpos: [13]; default: 0;
+         *  Set this bit to reset tx-fifo.
+         */
+        uint32_t tx_fifo_rst:1;
+        /** fifo_prt_en : R/W; bitpos: [14]; default: 1;
+         *  The control enable bit of FIFO pointer in non-fifo access mode. This bit controls
+         *  the valid bits and the interrupts of tx/rx_fifo overflow, underflow, full and empty.
+         */
+        uint32_t fifo_prt_en:1;
+        uint32_t reserved_15:17;
+    };
+    uint32_t val;
+} i2c_fifo_conf_reg_t;
+
+/** Type of filter_cfg register
+ *  SCL and SDA filter configuration register
+ */
+typedef union {
+    struct {
+        /** scl_filter_thres : R/W; bitpos: [3:0]; default: 0;
+         *  When a pulse on the SCL input has smaller width than this register value
+         *  in I2C module clock cycles, the I2C controller will ignore that pulse.
+         */
+        uint32_t scl_filter_thres:4;
+        /** sda_filter_thres : R/W; bitpos: [7:4]; default: 0;
+         *  When a pulse on the SDA input has smaller width than this register value
+         *  in I2C module clock cycles, the I2C controller will ignore that pulse.
+         */
+        uint32_t sda_filter_thres:4;
+        /** scl_filter_en : R/W; bitpos: [8]; default: 1;
+         *  This is the filter enable bit for SCL.
+         */
+        uint32_t scl_filter_en:1;
+        /** sda_filter_en : R/W; bitpos: [9]; default: 1;
+         *  This is the filter enable bit for SDA.
+         */
+        uint32_t sda_filter_en:1;
+        uint32_t reserved_10:22;
+    };
+    uint32_t val;
+} i2c_filter_cfg_reg_t;
+
+/** Type of clk_conf register
+ *  I2C CLK configuration register
+ */
+typedef union {
+    struct {
+        /** sclk_div_num : R/W; bitpos: [7:0]; default: 0;
+         *  the integral part of the fractional divisor for i2c module
+         */
+        uint32_t sclk_div_num:8;
+        /** sclk_div_a : R/W; bitpos: [13:8]; default: 0;
+         *  the numerator of the fractional part of the fractional divisor for i2c module
+         */
+        uint32_t sclk_div_a:6;
+        /** sclk_div_b : R/W; bitpos: [19:14]; default: 0;
+         *  the denominator of the fractional part of the fractional divisor for i2c module
+         */
+        uint32_t sclk_div_b:6;
+        /** sclk_sel : R/W; bitpos: [20]; default: 0;
+         *  The clock selection for i2c module:0-XTAL;1-CLK_8MHz.
+         */
+        uint32_t sclk_sel:1;
+        /** sclk_active : R/W; bitpos: [21]; default: 1;
+         *  The clock switch for i2c module
+         */
+        uint32_t sclk_active:1;
+        uint32_t reserved_22:10;
+    };
+    uint32_t val;
+} i2c_clk_conf_reg_t;
+
+/** Type of scl_sp_conf register
+ *  Power configuration register
+ */
+typedef union {
+    struct {
+        /** scl_rst_slv_en : R/W/SC; bitpos: [0]; default: 0;
+         *  When I2C master is IDLE, set this bit to send out SCL pulses. The number of pulses
+         *  equals to reg_scl_rst_slv_num[4:0].
+         */
+        uint32_t scl_rst_slv_en:1;
+        /** scl_rst_slv_num : R/W; bitpos: [5:1]; default: 0;
+         *  Configure the pulses of SCL generated in I2C master mode. Valid when
+         *  reg_scl_rst_slv_en is 1.
+         */
+        uint32_t scl_rst_slv_num:5;
+        /** scl_pd_en : R/W; bitpos: [6]; default: 0;
+         *  The power down enable bit for the I2C output SCL line. 1: Power down. 0: Not power
+         *  down. Set reg_scl_force_out and reg_scl_pd_en to 1 to stretch SCL low.
+         */
+        uint32_t scl_pd_en:1;
+        /** sda_pd_en : R/W; bitpos: [7]; default: 0;
+         *  The power down enable bit for the I2C output SDA line. 1: Power down. 0: Not power
+         *  down. Set reg_sda_force_out and reg_sda_pd_en to 1 to stretch SDA low.
+         */
+        uint32_t sda_pd_en:1;
+        uint32_t reserved_8:24;
+    };
+    uint32_t val;
+} i2c_scl_sp_conf_reg_t;
+
+/** Type of scl_stretch_conf register
+ *  Set SCL stretch of I2C slave
+ */
+typedef union {
+    struct {
+        /** stretch_protect_num : R/W; bitpos: [9:0]; default: 0;
+         *  Configure the period of I2C slave stretching SCL line.
+         */
+        uint32_t stretch_protect_num:10;
+        /** slave_scl_stretch_en : R/W; bitpos: [10]; default: 0;
+         *  The enable bit for slave SCL stretch function. 1: Enable. 0: Disable. The SCL
+         *  output line will be stretched low when reg_slave_scl_stretch_en is 1 and stretch
+         *  event happens. The stretch cause can be seen in reg_stretch_cause.
+         */
+        uint32_t slave_scl_stretch_en:1;
+        /** slave_scl_stretch_clr : WT; bitpos: [11]; default: 0;
+         *  Set this bit to clear the I2C slave SCL stretch function.
+         */
+        uint32_t slave_scl_stretch_clr:1;
+        /** slave_byte_ack_ctl_en : R/W; bitpos: [12]; default: 0;
+         *  The enable bit for slave to control ACK level function.
+         */
+        uint32_t slave_byte_ack_ctl_en:1;
+        /** slave_byte_ack_lvl : R/W; bitpos: [13]; default: 0;
+         *  Set the ACK level when slave controlling ACK level function enables.
+         */
+        uint32_t slave_byte_ack_lvl:1;
+        uint32_t reserved_14:18;
+    };
+    uint32_t val;
+} i2c_scl_stretch_conf_reg_t;
+
+
+/** Group: Status registers */
+/** Type of sr register
+ *  Describe I2C work status.
+ */
+typedef union {
+    struct {
+        /** resp_rec : RO; bitpos: [0]; default: 0;
+         *  The received ACK value in master mode or slave mode. 0: ACK, 1: NACK.
+         */
+        uint32_t resp_rec:1;
+        /** slave_rw : RO; bitpos: [1]; default: 0;
+         *  When in slave mode, 1: master reads from slave; 0: master writes to slave.
+         */
+        uint32_t slave_rw:1;
+        uint32_t reserved_2:1;
+        /** arb_lost : RO; bitpos: [3]; default: 0;
+         *  When the I2C controller loses control of SCL line, this register changes to 1.
+         */
+        uint32_t arb_lost:1;
+        /** bus_busy : RO; bitpos: [4]; default: 0;
+         *  1: the I2C bus is busy transferring data; 0: the I2C bus is in idle state.
+         */
+        uint32_t bus_busy:1;
+        /** slave_addressed : RO; bitpos: [5]; default: 0;
+         *  When configured as an I2C Slave, and the address sent by the master is
+         *  equal to the address of the slave, then this bit will be of high level.
+         */
+        uint32_t slave_addressed:1;
+        uint32_t reserved_6:2;
+        /** rxfifo_cnt : RO; bitpos: [13:8]; default: 0;
+         *  This field represents the amount of data needed to be sent.
+         */
+        uint32_t rxfifo_cnt:6;
+        /** stretch_cause : RO; bitpos: [15:14]; default: 3;
+         *  The cause of stretching SCL low in slave mode. 0:  stretching SCL low at the
+         *  beginning of I2C read data state. 1: stretching SCL low when I2C Tx FIFO is empty
+         *  in slave mode. 2: stretching SCL low when I2C Rx FIFO is full in slave mode.
+         */
+        uint32_t stretch_cause:2;
+        uint32_t reserved_16:2;
+        /** txfifo_cnt : RO; bitpos: [23:18]; default: 0;
+         *  This field stores the amount of received data in RAM.
+         */
+        uint32_t txfifo_cnt:6;
+        /** scl_main_state_last : RO; bitpos: [26:24]; default: 0;
+         *  This field indicates the states of the I2C module state machine.
+         *  0: Idle; 1: Address shift; 2: ACK address; 3: Rx data; 4: Tx data; 5: Send ACK; 6:
+         *  Wait ACK
+         */
+        uint32_t scl_main_state_last:3;
+        uint32_t reserved_27:1;
+        /** scl_state_last : RO; bitpos: [30:28]; default: 0;
+         *  This field indicates the states of the state machine used to produce SCL.
+         *  0: Idle; 1: Start; 2: Negative edge; 3: Low; 4: Positive edge; 5: High; 6: Stop
+         */
+        uint32_t scl_state_last:3;
+        uint32_t reserved_31:1;
+    };
+    uint32_t val;
+} i2c_sr_reg_t;
+
+/** Type of fifo_st register
+ *  FIFO status register.
+ */
+typedef union {
+    struct {
+        /** rxfifo_raddr : RO; bitpos: [4:0]; default: 0;
+         *  This is the offset address of the APB reading from rxfifo
+         */
+        uint32_t rxfifo_raddr:5;
+        /** rxfifo_waddr : RO; bitpos: [9:5]; default: 0;
+         *  This is the offset address of i2c module receiving data and writing to rxfifo.
+         */
+        uint32_t rxfifo_waddr:5;
+        /** txfifo_raddr : RO; bitpos: [14:10]; default: 0;
+         *  This is the offset address of i2c module reading from txfifo.
+         */
+        uint32_t txfifo_raddr:5;
+        /** txfifo_waddr : RO; bitpos: [19:15]; default: 0;
+         *  This is the offset address of APB bus writing to txfifo.
+         */
+        uint32_t txfifo_waddr:5;
+        uint32_t reserved_20:2;
+        /** slave_rw_point : RO; bitpos: [29:22]; default: 0;
+         *  The received data in I2C slave mode.
+         */
+        uint32_t slave_rw_point:8;
+        uint32_t reserved_30:2;
+    };
+    uint32_t val;
+} i2c_fifo_st_reg_t;
+
+/** Type of data register
+ *  Rx FIFO read data.
+ */
+typedef union {
+    struct {
+        /** fifo_rdata : RO; bitpos: [7:0]; default: 0;
+         *  The value of rx FIFO read data.
+         */
+        uint32_t fifo_rdata:8;
+        uint32_t reserved_8:24;
+    };
+    uint32_t val;
+} i2c_data_reg_t;
+
+
+/** Group: Interrupt registers */
+/** Type of int_raw register
+ *  Raw interrupt status
+ */
+typedef union {
+    struct {
+        /** rxfifo_wm_int_raw : R/SS/WTC; bitpos: [0]; default: 0;
+         *  The raw interrupt bit for I2C_RXFIFO_WM_INT interrupt.
+         */
+        uint32_t rxfifo_wm_int_raw:1;
+        /** txfifo_wm_int_raw : R/SS/WTC; bitpos: [1]; default: 1;
+         *  The raw interrupt bit for I2C_TXFIFO_WM_INT interrupt.
+         */
+        uint32_t txfifo_wm_int_raw:1;
+        /** rxfifo_ovf_int_raw : R/SS/WTC; bitpos: [2]; default: 0;
+         *  The raw interrupt bit for I2C_RXFIFO_OVF_INT interrupt.
+         */
+        uint32_t rxfifo_ovf_int_raw:1;
+        /** end_detect_int_raw : R/SS/WTC; bitpos: [3]; default: 0;
+         *  The raw interrupt bit for the I2C_END_DETECT_INT interrupt.
+         */
+        uint32_t end_detect_int_raw:1;
+        /** byte_trans_done_int_raw : R/SS/WTC; bitpos: [4]; default: 0;
+         *  The raw interrupt bit for the I2C_END_DETECT_INT interrupt.
+         */
+        uint32_t byte_trans_done_int_raw:1;
+        /** arbitration_lost_int_raw : R/SS/WTC; bitpos: [5]; default: 0;
+         *  The raw interrupt bit for the I2C_ARBITRATION_LOST_INT interrupt.
+         */
+        uint32_t arbitration_lost_int_raw:1;
+        /** mst_txfifo_udf_int_raw : R/SS/WTC; bitpos: [6]; default: 0;
+         *  The raw interrupt bit for I2C_TRANS_COMPLETE_INT interrupt.
+         */
+        uint32_t mst_txfifo_udf_int_raw:1;
+        /** trans_complete_int_raw : R/SS/WTC; bitpos: [7]; default: 0;
+         *  The raw interrupt bit for the I2C_TRANS_COMPLETE_INT interrupt.
+         */
+        uint32_t trans_complete_int_raw:1;
+        /** time_out_int_raw : R/SS/WTC; bitpos: [8]; default: 0;
+         *  The raw interrupt bit for the I2C_TIME_OUT_INT interrupt.
+         */
+        uint32_t time_out_int_raw:1;
+        /** trans_start_int_raw : R/SS/WTC; bitpos: [9]; default: 0;
+         *  The raw interrupt bit for the I2C_TRANS_START_INT interrupt.
+         */
+        uint32_t trans_start_int_raw:1;
+        /** nack_int_raw : R/SS/WTC; bitpos: [10]; default: 0;
+         *  The raw interrupt bit for I2C_SLAVE_STRETCH_INT interrupt.
+         */
+        uint32_t nack_int_raw:1;
+        /** txfifo_ovf_int_raw : R/SS/WTC; bitpos: [11]; default: 0;
+         *  The raw interrupt bit for I2C_TXFIFO_OVF_INT interrupt.
+         */
+        uint32_t txfifo_ovf_int_raw:1;
+        /** rxfifo_udf_int_raw : R/SS/WTC; bitpos: [12]; default: 0;
+         *  The raw interrupt bit for I2C_RXFIFO_UDF_INT  interrupt.
+         */
+        uint32_t rxfifo_udf_int_raw:1;
+        /** scl_st_to_int_raw : R/SS/WTC; bitpos: [13]; default: 0;
+         *  The raw interrupt bit for I2C_SCL_ST_TO_INT interrupt.
+         */
+        uint32_t scl_st_to_int_raw:1;
+        /** scl_main_st_to_int_raw : R/SS/WTC; bitpos: [14]; default: 0;
+         *  The raw interrupt bit for I2C_SCL_MAIN_ST_TO_INT interrupt.
+         */
+        uint32_t scl_main_st_to_int_raw:1;
+        /** det_start_int_raw : R/SS/WTC; bitpos: [15]; default: 0;
+         *  The raw interrupt bit for I2C_DET_START_INT interrupt.
+         */
+        uint32_t det_start_int_raw:1;
+        /** slave_stretch_int_raw : R/SS/WTC; bitpos: [16]; default: 0;
+         *  The raw interrupt bit for I2C_SLAVE_STRETCH_INT interrupt.
+         */
+        uint32_t slave_stretch_int_raw:1;
+        /** general_call_int_raw : R/SS/WTC; bitpos: [17]; default: 0;
+         *  The raw interrupt bit for I2C_GENARAL_CALL_INT interrupt.
+         */
+        uint32_t general_call_int_raw:1;
+        uint32_t reserved_18:14;
+    };
+    uint32_t val;
+} i2c_int_raw_reg_t;
+
+/** Type of int_clr register
+ *  Interrupt clear bits
+ */
+typedef union {
+    struct {
+        /** rxfifo_wm_int_clr : WT; bitpos: [0]; default: 0;
+         *  Set this bit to clear I2C_RXFIFO_WM_INT interrupt.
+         */
+        uint32_t rxfifo_wm_int_clr:1;
+        /** txfifo_wm_int_clr : WT; bitpos: [1]; default: 0;
+         *  Set this bit to clear I2C_TXFIFO_WM_INT interrupt.
+         */
+        uint32_t txfifo_wm_int_clr:1;
+        /** rxfifo_ovf_int_clr : WT; bitpos: [2]; default: 0;
+         *  Set this bit to clear I2C_RXFIFO_OVF_INT interrupt.
+         */
+        uint32_t rxfifo_ovf_int_clr:1;
+        /** end_detect_int_clr : WT; bitpos: [3]; default: 0;
+         *  Set this bit to clear the I2C_END_DETECT_INT interrupt.
+         */
+        uint32_t end_detect_int_clr:1;
+        /** byte_trans_done_int_clr : WT; bitpos: [4]; default: 0;
+         *  Set this bit to clear the I2C_END_DETECT_INT interrupt.
+         */
+        uint32_t byte_trans_done_int_clr:1;
+        /** arbitration_lost_int_clr : WT; bitpos: [5]; default: 0;
+         *  Set this bit to clear the I2C_ARBITRATION_LOST_INT interrupt.
+         */
+        uint32_t arbitration_lost_int_clr:1;
+        /** mst_txfifo_udf_int_clr : WT; bitpos: [6]; default: 0;
+         *  Set this bit to clear I2C_TRANS_COMPLETE_INT interrupt.
+         */
+        uint32_t mst_txfifo_udf_int_clr:1;
+        /** trans_complete_int_clr : WT; bitpos: [7]; default: 0;
+         *  Set this bit to clear the I2C_TRANS_COMPLETE_INT interrupt.
+         */
+        uint32_t trans_complete_int_clr:1;
+        /** time_out_int_clr : WT; bitpos: [8]; default: 0;
+         *  Set this bit to clear the I2C_TIME_OUT_INT interrupt.
+         */
+        uint32_t time_out_int_clr:1;
+        /** trans_start_int_clr : WT; bitpos: [9]; default: 0;
+         *  Set this bit to clear the I2C_TRANS_START_INT interrupt.
+         */
+        uint32_t trans_start_int_clr:1;
+        /** nack_int_clr : WT; bitpos: [10]; default: 0;
+         *  Set this bit to clear I2C_SLAVE_STRETCH_INT interrupt.
+         */
+        uint32_t nack_int_clr:1;
+        /** txfifo_ovf_int_clr : WT; bitpos: [11]; default: 0;
+         *  Set this bit to clear I2C_TXFIFO_OVF_INT interrupt.
+         */
+        uint32_t txfifo_ovf_int_clr:1;
+        /** rxfifo_udf_int_clr : WT; bitpos: [12]; default: 0;
+         *  Set this bit to clear I2C_RXFIFO_UDF_INT  interrupt.
+         */
+        uint32_t rxfifo_udf_int_clr:1;
+        /** scl_st_to_int_clr : WT; bitpos: [13]; default: 0;
+         *  Set this bit to clear I2C_SCL_ST_TO_INT interrupt.
+         */
+        uint32_t scl_st_to_int_clr:1;
+        /** scl_main_st_to_int_clr : WT; bitpos: [14]; default: 0;
+         *  Set this bit to clear I2C_SCL_MAIN_ST_TO_INT interrupt.
+         */
+        uint32_t scl_main_st_to_int_clr:1;
+        /** det_start_int_clr : WT; bitpos: [15]; default: 0;
+         *  Set this bit to clear I2C_DET_START_INT interrupt.
+         */
+        uint32_t det_start_int_clr:1;
+        /** slave_stretch_int_clr : WT; bitpos: [16]; default: 0;
+         *  Set this bit to clear I2C_SLAVE_STRETCH_INT interrupt.
+         */
+        uint32_t slave_stretch_int_clr:1;
+        /** general_call_int_clr : WT; bitpos: [17]; default: 0;
+         *  Set this bit for I2C_GENARAL_CALL_INT interrupt.
+         */
+        uint32_t general_call_int_clr:1;
+        uint32_t reserved_18:14;
+    };
+    uint32_t val;
+} i2c_int_clr_reg_t;
+
+/** Type of int_ena register
+ *  Interrupt enable bits
+ */
+typedef union {
+    struct {
+        /** rxfifo_wm_int_ena : R/W; bitpos: [0]; default: 0;
+         *  The interrupt enable bit for I2C_RXFIFO_WM_INT interrupt.
+         */
+        uint32_t rxfifo_wm_int_ena:1;
+        /** txfifo_wm_int_ena : R/W; bitpos: [1]; default: 0;
+         *  The interrupt enable bit for I2C_TXFIFO_WM_INT interrupt.
+         */
+        uint32_t txfifo_wm_int_ena:1;
+        /** rxfifo_ovf_int_ena : R/W; bitpos: [2]; default: 0;
+         *  The interrupt enable bit for I2C_RXFIFO_OVF_INT interrupt.
+         */
+        uint32_t rxfifo_ovf_int_ena:1;
+        /** end_detect_int_ena : R/W; bitpos: [3]; default: 0;
+         *  The interrupt enable bit for the I2C_END_DETECT_INT interrupt.
+         */
+        uint32_t end_detect_int_ena:1;
+        /** byte_trans_done_int_ena : R/W; bitpos: [4]; default: 0;
+         *  The interrupt enable bit for the I2C_END_DETECT_INT interrupt.
+         */
+        uint32_t byte_trans_done_int_ena:1;
+        /** arbitration_lost_int_ena : R/W; bitpos: [5]; default: 0;
+         *  The interrupt enable bit for the I2C_ARBITRATION_LOST_INT interrupt.
+         */
+        uint32_t arbitration_lost_int_ena:1;
+        /** mst_txfifo_udf_int_ena : R/W; bitpos: [6]; default: 0;
+         *  The interrupt enable bit for I2C_TRANS_COMPLETE_INT interrupt.
+         */
+        uint32_t mst_txfifo_udf_int_ena:1;
+        /** trans_complete_int_ena : R/W; bitpos: [7]; default: 0;
+         *  The interrupt enable bit for the I2C_TRANS_COMPLETE_INT interrupt.
+         */
+        uint32_t trans_complete_int_ena:1;
+        /** time_out_int_ena : R/W; bitpos: [8]; default: 0;
+         *  The interrupt enable bit for the I2C_TIME_OUT_INT interrupt.
+         */
+        uint32_t time_out_int_ena:1;
+        /** trans_start_int_ena : R/W; bitpos: [9]; default: 0;
+         *  The interrupt enable bit for the I2C_TRANS_START_INT interrupt.
+         */
+        uint32_t trans_start_int_ena:1;
+        /** nack_int_ena : R/W; bitpos: [10]; default: 0;
+         *  The interrupt enable bit for I2C_SLAVE_STRETCH_INT interrupt.
+         */
+        uint32_t nack_int_ena:1;
+        /** txfifo_ovf_int_ena : R/W; bitpos: [11]; default: 0;
+         *  The interrupt enable bit for I2C_TXFIFO_OVF_INT interrupt.
+         */
+        uint32_t txfifo_ovf_int_ena:1;
+        /** rxfifo_udf_int_ena : R/W; bitpos: [12]; default: 0;
+         *  The interrupt enable bit for I2C_RXFIFO_UDF_INT  interrupt.
+         */
+        uint32_t rxfifo_udf_int_ena:1;
+        /** scl_st_to_int_ena : R/W; bitpos: [13]; default: 0;
+         *  The interrupt enable bit for I2C_SCL_ST_TO_INT interrupt.
+         */
+        uint32_t scl_st_to_int_ena:1;
+        /** scl_main_st_to_int_ena : R/W; bitpos: [14]; default: 0;
+         *  The interrupt enable bit for I2C_SCL_MAIN_ST_TO_INT interrupt.
+         */
+        uint32_t scl_main_st_to_int_ena:1;
+        /** det_start_int_ena : R/W; bitpos: [15]; default: 0;
+         *  The interrupt enable bit for I2C_DET_START_INT interrupt.
+         */
+        uint32_t det_start_int_ena:1;
+        /** slave_stretch_int_ena : R/W; bitpos: [16]; default: 0;
+         *  The interrupt enable bit for I2C_SLAVE_STRETCH_INT interrupt.
+         */
+        uint32_t slave_stretch_int_ena:1;
+        /** general_call_int_ena : R/W; bitpos: [17]; default: 0;
+         *  The interrupt enable bit for I2C_GENARAL_CALL_INT interrupt.
+         */
+        uint32_t general_call_int_ena:1;
+        uint32_t reserved_18:14;
+    };
+    uint32_t val;
+} i2c_int_ena_reg_t;
+
+/** Type of int_status register
+ *  Status of captured I2C communication events
+ */
+typedef union {
+    struct {
+        /** rxfifo_wm_int_st : RO; bitpos: [0]; default: 0;
+         *  The masked interrupt status bit for I2C_RXFIFO_WM_INT interrupt.
+         */
+        uint32_t rxfifo_wm_int_st:1;
+        /** txfifo_wm_int_st : RO; bitpos: [1]; default: 0;
+         *  The masked interrupt status bit for I2C_TXFIFO_WM_INT interrupt.
+         */
+        uint32_t txfifo_wm_int_st:1;
+        /** rxfifo_ovf_int_st : RO; bitpos: [2]; default: 0;
+         *  The masked interrupt status bit for I2C_RXFIFO_OVF_INT interrupt.
+         */
+        uint32_t rxfifo_ovf_int_st:1;
+        /** end_detect_int_st : RO; bitpos: [3]; default: 0;
+         *  The masked interrupt status bit for the I2C_END_DETECT_INT interrupt.
+         */
+        uint32_t end_detect_int_st:1;
+        /** byte_trans_done_int_st : RO; bitpos: [4]; default: 0;
+         *  The masked interrupt status bit for the I2C_END_DETECT_INT interrupt.
+         */
+        uint32_t byte_trans_done_int_st:1;
+        /** arbitration_lost_int_st : RO; bitpos: [5]; default: 0;
+         *  The masked interrupt status bit for the I2C_ARBITRATION_LOST_INT interrupt.
+         */
+        uint32_t arbitration_lost_int_st:1;
+        /** mst_txfifo_udf_int_st : RO; bitpos: [6]; default: 0;
+         *  The masked interrupt status bit for I2C_TRANS_COMPLETE_INT interrupt.
+         */
+        uint32_t mst_txfifo_udf_int_st:1;
+        /** trans_complete_int_st : RO; bitpos: [7]; default: 0;
+         *  The masked interrupt status bit for the I2C_TRANS_COMPLETE_INT interrupt.
+         */
+        uint32_t trans_complete_int_st:1;
+        /** time_out_int_st : RO; bitpos: [8]; default: 0;
+         *  The masked interrupt status bit for the I2C_TIME_OUT_INT interrupt.
+         */
+        uint32_t time_out_int_st:1;
+        /** trans_start_int_st : RO; bitpos: [9]; default: 0;
+         *  The masked interrupt status bit for the I2C_TRANS_START_INT interrupt.
+         */
+        uint32_t trans_start_int_st:1;
+        /** nack_int_st : RO; bitpos: [10]; default: 0;
+         *  The masked interrupt status bit for I2C_SLAVE_STRETCH_INT interrupt.
+         */
+        uint32_t nack_int_st:1;
+        /** txfifo_ovf_int_st : RO; bitpos: [11]; default: 0;
+         *  The masked interrupt status bit for I2C_TXFIFO_OVF_INT interrupt.
+         */
+        uint32_t txfifo_ovf_int_st:1;
+        /** rxfifo_udf_int_st : RO; bitpos: [12]; default: 0;
+         *  The masked interrupt status bit for I2C_RXFIFO_UDF_INT  interrupt.
+         */
+        uint32_t rxfifo_udf_int_st:1;
+        /** scl_st_to_int_st : RO; bitpos: [13]; default: 0;
+         *  The masked interrupt status bit for I2C_SCL_ST_TO_INT interrupt.
+         */
+        uint32_t scl_st_to_int_st:1;
+        /** scl_main_st_to_int_st : RO; bitpos: [14]; default: 0;
+         *  The masked interrupt status bit for I2C_SCL_MAIN_ST_TO_INT interrupt.
+         */
+        uint32_t scl_main_st_to_int_st:1;
+        /** det_start_int_st : RO; bitpos: [15]; default: 0;
+         *  The masked interrupt status bit for I2C_DET_START_INT interrupt.
+         */
+        uint32_t det_start_int_st:1;
+        /** slave_stretch_int_st : RO; bitpos: [16]; default: 0;
+         *  The masked interrupt status bit for I2C_SLAVE_STRETCH_INT interrupt.
+         */
+        uint32_t slave_stretch_int_st:1;
+        /** general_call_int_st : RO; bitpos: [17]; default: 0;
+         *  The masked interrupt status bit for I2C_GENARAL_CALL_INT interrupt.
+         */
+        uint32_t general_call_int_st:1;
+        uint32_t reserved_18:14;
+    };
+    uint32_t val;
+} i2c_int_status_reg_t;
+
+
+/** Group: Command registers */
+/** Type of comd0 register
+ *  I2C command register 0
+ */
+typedef union {
+    struct {
+        /** command0 : R/W; bitpos: [13:0]; default: 0;
+         *  This is the content of command 0. It consists of three parts:
+         *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+         *  Byte_num represents the number of bytes that need to be sent or received.
+         *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+         *  structure for more
+         *  Information.
+         */
+        uint32_t command0:14;
+        uint32_t reserved_14:17;
+        /** command0_done : R/W/SS; bitpos: [31]; default: 0;
+         *  When command 0 is done in I2C Master mode, this bit changes to high
+         *  level.
+         */
+        uint32_t command0_done:1;
+    };
+    uint32_t val;
+} i2c_comd0_reg_t;
+
+/** Type of comd1 register
+ *  I2C command register 1
+ */
+typedef union {
+    struct {
+        /** command1 : R/W; bitpos: [13:0]; default: 0;
+         *  This is the content of command 1. It consists of three parts:
+         *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+         *  Byte_num represents the number of bytes that need to be sent or received.
+         *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+         *  structure for more
+         *  Information.
+         */
+        uint32_t command1:14;
+        uint32_t reserved_14:17;
+        /** command1_done : R/W/SS; bitpos: [31]; default: 0;
+         *  When command 1 is done in I2C Master mode, this bit changes to high
+         *  level.
+         */
+        uint32_t command1_done:1;
+    };
+    uint32_t val;
+} i2c_comd1_reg_t;
+
+/** Type of comd2 register
+ *  I2C command register 2
+ */
+typedef union {
+    struct {
+        /** command2 : R/W; bitpos: [13:0]; default: 0;
+         *  This is the content of command 2. It consists of three parts:
+         *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+         *  Byte_num represents the number of bytes that need to be sent or received.
+         *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+         *  structure for more
+         *  Information.
+         */
+        uint32_t command2:14;
+        uint32_t reserved_14:17;
+        /** command2_done : R/W/SS; bitpos: [31]; default: 0;
+         *  When command 2 is done in I2C Master mode, this bit changes to high
+         *  Level.
+         */
+        uint32_t command2_done:1;
+    };
+    uint32_t val;
+} i2c_comd2_reg_t;
+
+/** Type of comd3 register
+ *  I2C command register 3
+ */
+typedef union {
+    struct {
+        /** command3 : R/W; bitpos: [13:0]; default: 0;
+         *  This is the content of command 3. It consists of three parts:
+         *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+         *  Byte_num represents the number of bytes that need to be sent or received.
+         *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+         *  structure for more
+         *  Information.
+         */
+        uint32_t command3:14;
+        uint32_t reserved_14:17;
+        /** command3_done : R/W/SS; bitpos: [31]; default: 0;
+         *  When command 3 is done in I2C Master mode, this bit changes to high
+         *  level.
+         */
+        uint32_t command3_done:1;
+    };
+    uint32_t val;
+} i2c_comd3_reg_t;
+
+/** Type of comd4 register
+ *  I2C command register 4
+ */
+typedef union {
+    struct {
+        /** command4 : R/W; bitpos: [13:0]; default: 0;
+         *  This is the content of command 4. It consists of three parts:
+         *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+         *  Byte_num represents the number of bytes that need to be sent or received.
+         *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+         *  structure for more
+         *  Information.
+         */
+        uint32_t command4:14;
+        uint32_t reserved_14:17;
+        /** command4_done : R/W/SS; bitpos: [31]; default: 0;
+         *  When command 4 is done in I2C Master mode, this bit changes to high
+         *  level.
+         */
+        uint32_t command4_done:1;
+    };
+    uint32_t val;
+} i2c_comd4_reg_t;
+
+/** Type of comd5 register
+ *  I2C command register 5
+ */
+typedef union {
+    struct {
+        /** command5 : R/W; bitpos: [13:0]; default: 0;
+         *  This is the content of command 5. It consists of three parts:
+         *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+         *  Byte_num represents the number of bytes that need to be sent or received.
+         *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+         *  structure for more
+         *  Information.
+         */
+        uint32_t command5:14;
+        uint32_t reserved_14:17;
+        /** command5_done : R/W/SS; bitpos: [31]; default: 0;
+         *  When command 5 is done in I2C Master mode, this bit changes to high level.
+         */
+        uint32_t command5_done:1;
+    };
+    uint32_t val;
+} i2c_comd5_reg_t;
+
+/** Type of comd6 register
+ *  I2C command register 6
+ */
+typedef union {
+    struct {
+        /** command6 : R/W; bitpos: [13:0]; default: 0;
+         *  This is the content of command 6. It consists of three parts:
+         *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+         *  Byte_num represents the number of bytes that need to be sent or received.
+         *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+         *  structure for more
+         *  Information.
+         */
+        uint32_t command6:14;
+        uint32_t reserved_14:17;
+        /** command6_done : R/W/SS; bitpos: [31]; default: 0;
+         *  When command 6 is done in I2C Master mode, this bit changes to high level.
+         */
+        uint32_t command6_done:1;
+    };
+    uint32_t val;
+} i2c_comd6_reg_t;
+
+/** Type of comd7 register
+ *  I2C command register 7
+ */
+typedef union {
+    struct {
+        /** command7 : R/W; bitpos: [13:0]; default: 0;
+         *  This is the content of command 7. It consists of three parts:
+         *  op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
+         *  Byte_num represents the number of bytes that need to be sent or received.
+         *  ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd
+         *  structure for more
+         *  Information.
+         */
+        uint32_t command7:14;
+        uint32_t reserved_14:17;
+        /** command7_done : R/W/SS; bitpos: [31]; default: 0;
+         *  When command 7 is done in I2C Master mode, this bit changes to high level.
+         */
+        uint32_t command7_done:1;
+    };
+    uint32_t val;
+} i2c_comd7_reg_t;
+
+
+/** Group: Version register */
+/** Type of date register
+ *  Version register
+ */
+typedef union {
+    struct {
+        /** date : R/W; bitpos: [31:0]; default: 537330177;
+         *  This is the the version register.
+         */
+        uint32_t date:32;
+    };
+    uint32_t val;
+} i2c_date_reg_t;
+
+
+/** Group: Address register */
+/** Type of txfifo_start_addr register
+ *  I2C TXFIFO base address register
+ */
+typedef union {
+    struct {
+        /** txfifo_start_addr : RO; bitpos: [31:0]; default: 0;
+         *  This is the I2C txfifo first address.
+         */
+        uint32_t txfifo_start_addr:32;
+    };
+    uint32_t val;
+} i2c_txfifo_start_addr_reg_t;
+
+/** Type of rxfifo_start_addr register
+ *  I2C RXFIFO base address register
+ */
+typedef union {
+    struct {
+        /** rxfifo_start_addr : RO; bitpos: [31:0]; default: 0;
+         *  This is the I2C rxfifo first address.
+         */
+        uint32_t rxfifo_start_addr:32;
+    };
+    uint32_t val;
+} i2c_rxfifo_start_addr_reg_t;
+
+
+typedef struct {
+    volatile i2c_scl_low_period_reg_t scl_low_period;
+    volatile i2c_ctr_reg_t ctr;
+    volatile i2c_sr_reg_t sr;
+    volatile i2c_to_reg_t to;
+    volatile i2c_slave_addr_reg_t slave_addr;
+    volatile i2c_fifo_st_reg_t fifo_st;
+    volatile i2c_fifo_conf_reg_t fifo_conf;
+    volatile i2c_data_reg_t data;
+    volatile i2c_int_raw_reg_t int_raw;
+    volatile i2c_int_clr_reg_t int_clr;
+    volatile i2c_int_ena_reg_t int_ena;
+    volatile i2c_int_status_reg_t int_status;
+    volatile i2c_sda_hold_reg_t sda_hold;
+    volatile i2c_sda_sample_reg_t sda_sample;
+    volatile i2c_scl_high_period_reg_t scl_high_period;
+    uint32_t reserved_03c;
+    volatile i2c_scl_start_hold_reg_t scl_start_hold;
+    volatile i2c_scl_rstart_setup_reg_t scl_rstart_setup;
+    volatile i2c_scl_stop_hold_reg_t scl_stop_hold;
+    volatile i2c_scl_stop_setup_reg_t scl_stop_setup;
+    volatile i2c_filter_cfg_reg_t filter_cfg;
+    volatile i2c_clk_conf_reg_t clk_conf;
+    volatile i2c_comd0_reg_t comd0;
+    volatile i2c_comd1_reg_t comd1;
+    volatile i2c_comd2_reg_t comd2;
+    volatile i2c_comd3_reg_t comd3;
+    volatile i2c_comd4_reg_t comd4;
+    volatile i2c_comd5_reg_t comd5;
+    volatile i2c_comd6_reg_t comd6;
+    volatile i2c_comd7_reg_t comd7;
+    volatile i2c_scl_st_time_out_reg_t scl_st_time_out;
+    volatile i2c_scl_main_st_time_out_reg_t scl_main_st_time_out;
+    volatile i2c_scl_sp_conf_reg_t scl_sp_conf;
+    volatile i2c_scl_stretch_conf_reg_t scl_stretch_conf;
+    uint32_t reserved_088[28];
+    volatile i2c_date_reg_t date;
+    uint32_t reserved_0fc;
+    volatile i2c_txfifo_start_addr_reg_t txfifo_start_addr;
+    uint32_t reserved_104[31];
+    volatile i2c_rxfifo_start_addr_reg_t rxfifo_start_addr;
+} i2c_dev_t;
+
+extern i2c_dev_t I2C0;
+extern i2c_dev_t I2C1;
+
+#ifndef __cplusplus
+_Static_assert(sizeof(i2c_dev_t) == 0x184, "Invalid size of i2c_dev_t structure");
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2s_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2s_reg.h
new file mode 100644
index 00000000000..18709d3674f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2s_reg.h
@@ -0,0 +1,1106 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_I2S_REG_H_
+#define _SOC_I2S_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define I2S_INT_RAW_REG(i)          (REG_I2S_BASE(i) + 0xC)
+/* I2S_TX_HUNG_INT_RAW : RO/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit  for the i2s_tx_hung_int interrupt.*/
+#define I2S_TX_HUNG_INT_RAW    (BIT(3))
+#define I2S_TX_HUNG_INT_RAW_M  (BIT(3))
+#define I2S_TX_HUNG_INT_RAW_V  0x1
+#define I2S_TX_HUNG_INT_RAW_S  3
+/* I2S_RX_HUNG_INT_RAW : RO/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit  for the i2s_rx_hung_int interrupt.*/
+#define I2S_RX_HUNG_INT_RAW    (BIT(2))
+#define I2S_RX_HUNG_INT_RAW_M  (BIT(2))
+#define I2S_RX_HUNG_INT_RAW_V  0x1
+#define I2S_RX_HUNG_INT_RAW_S  2
+/* I2S_TX_DONE_INT_RAW : RO/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit  for the i2s_tx_done_int interrupt.*/
+#define I2S_TX_DONE_INT_RAW    (BIT(1))
+#define I2S_TX_DONE_INT_RAW_M  (BIT(1))
+#define I2S_TX_DONE_INT_RAW_V  0x1
+#define I2S_TX_DONE_INT_RAW_S  1
+/* I2S_RX_DONE_INT_RAW : RO/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit  for the i2s_rx_done_int interrupt.*/
+#define I2S_RX_DONE_INT_RAW    (BIT(0))
+#define I2S_RX_DONE_INT_RAW_M  (BIT(0))
+#define I2S_RX_DONE_INT_RAW_V  0x1
+#define I2S_RX_DONE_INT_RAW_S  0
+
+#define I2S_INT_ST_REG(i)          (REG_I2S_BASE(i) + 0x10)
+/* I2S_TX_HUNG_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The masked interrupt status bit  for the i2s_tx_hung_int interrupt.*/
+#define I2S_TX_HUNG_INT_ST    (BIT(3))
+#define I2S_TX_HUNG_INT_ST_M  (BIT(3))
+#define I2S_TX_HUNG_INT_ST_V  0x1
+#define I2S_TX_HUNG_INT_ST_S  3
+/* I2S_RX_HUNG_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The masked interrupt status bit  for the i2s_rx_hung_int interrupt.*/
+#define I2S_RX_HUNG_INT_ST    (BIT(2))
+#define I2S_RX_HUNG_INT_ST_M  (BIT(2))
+#define I2S_RX_HUNG_INT_ST_V  0x1
+#define I2S_RX_HUNG_INT_ST_S  2
+/* I2S_TX_DONE_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The masked interrupt status bit  for the i2s_tx_done_int interrupt.*/
+#define I2S_TX_DONE_INT_ST    (BIT(1))
+#define I2S_TX_DONE_INT_ST_M  (BIT(1))
+#define I2S_TX_DONE_INT_ST_V  0x1
+#define I2S_TX_DONE_INT_ST_S  1
+/* I2S_RX_DONE_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The masked interrupt status bit  for the i2s_rx_done_int interrupt.*/
+#define I2S_RX_DONE_INT_ST    (BIT(0))
+#define I2S_RX_DONE_INT_ST_M  (BIT(0))
+#define I2S_RX_DONE_INT_ST_V  0x1
+#define I2S_RX_DONE_INT_ST_S  0
+
+#define I2S_INT_ENA_REG(i)          (REG_I2S_BASE(i) + 0x14)
+/* I2S_TX_HUNG_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit  for the i2s_tx_hung_int interrupt.*/
+#define I2S_TX_HUNG_INT_ENA    (BIT(3))
+#define I2S_TX_HUNG_INT_ENA_M  (BIT(3))
+#define I2S_TX_HUNG_INT_ENA_V  0x1
+#define I2S_TX_HUNG_INT_ENA_S  3
+/* I2S_RX_HUNG_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit  for the i2s_rx_hung_int interrupt.*/
+#define I2S_RX_HUNG_INT_ENA    (BIT(2))
+#define I2S_RX_HUNG_INT_ENA_M  (BIT(2))
+#define I2S_RX_HUNG_INT_ENA_V  0x1
+#define I2S_RX_HUNG_INT_ENA_S  2
+/* I2S_TX_DONE_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit  for the i2s_tx_done_int interrupt.*/
+#define I2S_TX_DONE_INT_ENA    (BIT(1))
+#define I2S_TX_DONE_INT_ENA_M  (BIT(1))
+#define I2S_TX_DONE_INT_ENA_V  0x1
+#define I2S_TX_DONE_INT_ENA_S  1
+/* I2S_RX_DONE_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit  for the i2s_rx_done_int interrupt.*/
+#define I2S_RX_DONE_INT_ENA    (BIT(0))
+#define I2S_RX_DONE_INT_ENA_M  (BIT(0))
+#define I2S_RX_DONE_INT_ENA_V  0x1
+#define I2S_RX_DONE_INT_ENA_S  0
+
+#define I2S_INT_CLR_REG(i)          (REG_I2S_BASE(i) + 0x18)
+/* I2S_TX_HUNG_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the i2s_tx_hung_int interrupt.*/
+#define I2S_TX_HUNG_INT_CLR    (BIT(3))
+#define I2S_TX_HUNG_INT_CLR_M  (BIT(3))
+#define I2S_TX_HUNG_INT_CLR_V  0x1
+#define I2S_TX_HUNG_INT_CLR_S  3
+/* I2S_RX_HUNG_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the i2s_rx_hung_int interrupt.*/
+#define I2S_RX_HUNG_INT_CLR    (BIT(2))
+#define I2S_RX_HUNG_INT_CLR_M  (BIT(2))
+#define I2S_RX_HUNG_INT_CLR_V  0x1
+#define I2S_RX_HUNG_INT_CLR_S  2
+/* I2S_TX_DONE_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the i2s_tx_done_int interrupt.*/
+#define I2S_TX_DONE_INT_CLR    (BIT(1))
+#define I2S_TX_DONE_INT_CLR_M  (BIT(1))
+#define I2S_TX_DONE_INT_CLR_V  0x1
+#define I2S_TX_DONE_INT_CLR_S  1
+/* I2S_RX_DONE_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the i2s_rx_done_int interrupt.*/
+#define I2S_RX_DONE_INT_CLR    (BIT(0))
+#define I2S_RX_DONE_INT_CLR_M  (BIT(0))
+#define I2S_RX_DONE_INT_CLR_V  0x1
+#define I2S_RX_DONE_INT_CLR_S  0
+
+#define I2S_RX_CONF_REG(i)          (REG_I2S_BASE(i) + 0x20)
+/* I2S_RX_PDM_SINC_DSR_16_EN : R/W ;bitpos:[22] ;default: 1'h0 ; */
+/*description: Configure the down sampling rate of PDM RX filter group1 module. 1: The  down sa
+mpling rate is 128. 0: down sampling rate is 64..*/
+#define I2S_RX_PDM_SINC_DSR_16_EN    (BIT(22))
+#define I2S_RX_PDM_SINC_DSR_16_EN_M  (BIT(22))
+#define I2S_RX_PDM_SINC_DSR_16_EN_V  0x1
+#define I2S_RX_PDM_SINC_DSR_16_EN_S  22
+/* I2S_RX_PDM2PCM_EN : R/W ;bitpos:[21] ;default: 1'h0 ; */
+/*description: 1: Enable PDM2PCM RX mode. 0: DIsable..*/
+#define I2S_RX_PDM2PCM_EN    (BIT(21))
+#define I2S_RX_PDM2PCM_EN_M  (BIT(21))
+#define I2S_RX_PDM2PCM_EN_V  0x1
+#define I2S_RX_PDM2PCM_EN_S  21
+/* I2S_RX_PDM_EN : R/W ;bitpos:[20] ;default: 1'h0 ; */
+/*description: 1: Enable I2S PDM Rx mode . 0: Disable..*/
+#define I2S_RX_PDM_EN    (BIT(20))
+#define I2S_RX_PDM_EN_M  (BIT(20))
+#define I2S_RX_PDM_EN_V  0x1
+#define I2S_RX_PDM_EN_S  20
+/* I2S_RX_TDM_EN : R/W ;bitpos:[19] ;default: 1'h0 ; */
+/*description: 1: Enable I2S TDM Rx mode . 0: Disable..*/
+#define I2S_RX_TDM_EN    (BIT(19))
+#define I2S_RX_TDM_EN_M  (BIT(19))
+#define I2S_RX_TDM_EN_V  0x1
+#define I2S_RX_TDM_EN_S  19
+/* I2S_RX_BIT_ORDER : R/W ;bitpos:[18] ;default: 1'h0 ; */
+/*description: I2S Rx bit endian. 1:small endian, the LSB is received first. 0:big endian, the
+MSB is received first..*/
+#define I2S_RX_BIT_ORDER    (BIT(18))
+#define I2S_RX_BIT_ORDER_M  (BIT(18))
+#define I2S_RX_BIT_ORDER_V  0x1
+#define I2S_RX_BIT_ORDER_S  18
+/* I2S_RX_WS_IDLE_POL : R/W ;bitpos:[17] ;default: 1'h0 ; */
+/*description: 0: WS should be 0 when receiving left channel data, and WS is 1in right channel.
+  1: WS should be 1 when receiving left channel data, and WS is 0in right channe
+l. .*/
+#define I2S_RX_WS_IDLE_POL    (BIT(17))
+#define I2S_RX_WS_IDLE_POL_M  (BIT(17))
+#define I2S_RX_WS_IDLE_POL_V  0x1
+#define I2S_RX_WS_IDLE_POL_S  17
+/* I2S_RX_24_FILL_EN : R/W ;bitpos:[16] ;default: 1'h0 ; */
+/*description: 1: store 24 channel bits to 32 bits. 0:store 24 channel bits to 24 bits..*/
+#define I2S_RX_24_FILL_EN    (BIT(16))
+#define I2S_RX_24_FILL_EN_M  (BIT(16))
+#define I2S_RX_24_FILL_EN_V  0x1
+#define I2S_RX_24_FILL_EN_S  16
+/* I2S_RX_LEFT_ALIGN : R/W ;bitpos:[15] ;default: 1'b1 ; */
+/*description: 1: I2S RX left alignment mode. 0: I2S RX right alignment mode..*/
+#define I2S_RX_LEFT_ALIGN    (BIT(15))
+#define I2S_RX_LEFT_ALIGN_M  (BIT(15))
+#define I2S_RX_LEFT_ALIGN_V  0x1
+#define I2S_RX_LEFT_ALIGN_S  15
+/* I2S_RX_STOP_MODE : R/W ;bitpos:[14:13] ;default: 2'd0 ; */
+/*description: 0  : I2S Rx only stop when reg_rx_start is cleared.   1: Stop when reg_rx_start
+is 0 or in_suc_eof is 1.   2:  Stop I2S RX when reg_rx_start is 0 or RX FIFO is
+full..*/
+#define I2S_RX_STOP_MODE    0x00000003
+#define I2S_RX_STOP_MODE_M  ((I2S_RX_STOP_MODE_V)<<(I2S_RX_STOP_MODE_S))
+#define I2S_RX_STOP_MODE_V  0x3
+#define I2S_RX_STOP_MODE_S  13
+/* I2S_RX_PCM_BYPASS : R/W ;bitpos:[12] ;default: 1'h1 ; */
+/*description: Set this bit to bypass Compress/Decompress module for received data..*/
+#define I2S_RX_PCM_BYPASS    (BIT(12))
+#define I2S_RX_PCM_BYPASS_M  (BIT(12))
+#define I2S_RX_PCM_BYPASS_V  0x1
+#define I2S_RX_PCM_BYPASS_S  12
+/* I2S_RX_PCM_CONF : R/W ;bitpos:[11:10] ;default: 2'h1 ; */
+/*description: I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (l
+toa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &.*/
+#define I2S_RX_PCM_CONF    0x00000003
+#define I2S_RX_PCM_CONF_M  ((I2S_RX_PCM_CONF_V)<<(I2S_RX_PCM_CONF_S))
+#define I2S_RX_PCM_CONF_V  0x3
+#define I2S_RX_PCM_CONF_S  10
+/* I2S_RX_MONO_FST_VLD : R/W ;bitpos:[9] ;default: 1'b1 ; */
+/*description: 1: The first channel data value is valid in I2S RX mono mode.   0: The second ch
+annel data value is valid in I2S RX mono mode..*/
+#define I2S_RX_MONO_FST_VLD    (BIT(9))
+#define I2S_RX_MONO_FST_VLD_M  (BIT(9))
+#define I2S_RX_MONO_FST_VLD_V  0x1
+#define I2S_RX_MONO_FST_VLD_S  9
+/* I2S_RX_UPDATE : R/W/SC ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set 1 to update I2S RX registers from APB clock domain to I2S RX clock domain. T
+his bit will be cleared by hardware after update register done..*/
+#define I2S_RX_UPDATE    (BIT(8))
+#define I2S_RX_UPDATE_M  (BIT(8))
+#define I2S_RX_UPDATE_V  0x1
+#define I2S_RX_UPDATE_S  8
+/* I2S_RX_BIG_ENDIAN : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: I2S Rx byte endian, 1: low addr value to high addr. 0: low addr with low addr va
+lue..*/
+#define I2S_RX_BIG_ENDIAN    (BIT(7))
+#define I2S_RX_BIG_ENDIAN_M  (BIT(7))
+#define I2S_RX_BIG_ENDIAN_V  0x1
+#define I2S_RX_BIG_ENDIAN_S  7
+/* I2S_RX_MONO : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to enable receiver  in mono mode.*/
+#define I2S_RX_MONO    (BIT(5))
+#define I2S_RX_MONO_M  (BIT(5))
+#define I2S_RX_MONO_V  0x1
+#define I2S_RX_MONO_S  5
+/* I2S_RX_SLAVE_MOD : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to enable slave receiver mode.*/
+#define I2S_RX_SLAVE_MOD    (BIT(3))
+#define I2S_RX_SLAVE_MOD_M  (BIT(3))
+#define I2S_RX_SLAVE_MOD_V  0x1
+#define I2S_RX_SLAVE_MOD_S  3
+/* I2S_RX_START : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to start receiving data.*/
+#define I2S_RX_START    (BIT(2))
+#define I2S_RX_START_M  (BIT(2))
+#define I2S_RX_START_V  0x1
+#define I2S_RX_START_S  2
+/* I2S_RX_FIFO_RESET : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to reset Rx AFIFO.*/
+#define I2S_RX_FIFO_RESET    (BIT(1))
+#define I2S_RX_FIFO_RESET_M  (BIT(1))
+#define I2S_RX_FIFO_RESET_V  0x1
+#define I2S_RX_FIFO_RESET_S  1
+/* I2S_RX_RESET : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to reset receiver.*/
+#define I2S_RX_RESET    (BIT(0))
+#define I2S_RX_RESET_M  (BIT(0))
+#define I2S_RX_RESET_V  0x1
+#define I2S_RX_RESET_S  0
+
+#define I2S_TX_CONF_REG(i)          (REG_I2S_BASE(i) + 0x24)
+/* I2S_SIG_LOOPBACK : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: Enable signal loop back mode with transmitter module and receiver module sharing
+ the same WS and BCK signals..*/
+#define I2S_SIG_LOOPBACK    (BIT(27))
+#define I2S_SIG_LOOPBACK_M  (BIT(27))
+#define I2S_SIG_LOOPBACK_V  0x1
+#define I2S_SIG_LOOPBACK_S  27
+/* I2S_TX_CHAN_MOD : R/W ;bitpos:[26:24] ;default: 3'b0 ; */
+/*description: I2S transmitter channel mode configuration bits..*/
+#define I2S_TX_CHAN_MOD    0x00000007
+#define I2S_TX_CHAN_MOD_M  ((I2S_TX_CHAN_MOD_V)<<(I2S_TX_CHAN_MOD_S))
+#define I2S_TX_CHAN_MOD_V  0x7
+#define I2S_TX_CHAN_MOD_S  24
+/* I2S_TX_PDM_EN : R/W ;bitpos:[20] ;default: 1'h0 ; */
+/*description: 1: Enable I2S PDM Tx mode . 0: Disable..*/
+#define I2S_TX_PDM_EN    (BIT(20))
+#define I2S_TX_PDM_EN_M  (BIT(20))
+#define I2S_TX_PDM_EN_V  0x1
+#define I2S_TX_PDM_EN_S  20
+/* I2S_TX_TDM_EN : R/W ;bitpos:[19] ;default: 1'h0 ; */
+/*description: 1: Enable I2S TDM Tx mode . 0: Disable..*/
+#define I2S_TX_TDM_EN    (BIT(19))
+#define I2S_TX_TDM_EN_M  (BIT(19))
+#define I2S_TX_TDM_EN_V  0x1
+#define I2S_TX_TDM_EN_S  19
+/* I2S_TX_BIT_ORDER : R/W ;bitpos:[18] ;default: 1'h0 ; */
+/*description: I2S Tx bit endian. 1:small endian, the LSB is sent first. 0:big endian, the MSB
+is sent first..*/
+#define I2S_TX_BIT_ORDER    (BIT(18))
+#define I2S_TX_BIT_ORDER_M  (BIT(18))
+#define I2S_TX_BIT_ORDER_V  0x1
+#define I2S_TX_BIT_ORDER_S  18
+/* I2S_TX_WS_IDLE_POL : R/W ;bitpos:[17] ;default: 1'h0 ; */
+/*description: 0: WS should be 0 when sending left channel data, and WS is 1in right channel.
+1: WS should be 1 when sending left channel data, and WS is 0in right channel. .*/
+#define I2S_TX_WS_IDLE_POL    (BIT(17))
+#define I2S_TX_WS_IDLE_POL_M  (BIT(17))
+#define I2S_TX_WS_IDLE_POL_V  0x1
+#define I2S_TX_WS_IDLE_POL_S  17
+/* I2S_TX_24_FILL_EN : R/W ;bitpos:[16] ;default: 1'h0 ; */
+/*description: 1: Sent 32 bits in 24 channel bits mode. 0: Sent 24 bits in 24 channel bits mode.*/
+#define I2S_TX_24_FILL_EN    (BIT(16))
+#define I2S_TX_24_FILL_EN_M  (BIT(16))
+#define I2S_TX_24_FILL_EN_V  0x1
+#define I2S_TX_24_FILL_EN_S  16
+/* I2S_TX_LEFT_ALIGN : R/W ;bitpos:[15] ;default: 1'h1 ; */
+/*description: 1: I2S TX left alignment mode. 0: I2S TX right alignment mode..*/
+#define I2S_TX_LEFT_ALIGN    (BIT(15))
+#define I2S_TX_LEFT_ALIGN_M  (BIT(15))
+#define I2S_TX_LEFT_ALIGN_V  0x1
+#define I2S_TX_LEFT_ALIGN_S  15
+/* I2S_TX_STOP_EN : R/W ;bitpos:[13] ;default: 1'h1 ; */
+/*description: Set this bit to stop disable output BCK signal and WS signal when tx FIFO is emt
+py.*/
+#define I2S_TX_STOP_EN    (BIT(13))
+#define I2S_TX_STOP_EN_M  (BIT(13))
+#define I2S_TX_STOP_EN_V  0x1
+#define I2S_TX_STOP_EN_S  13
+/* I2S_TX_PCM_BYPASS : R/W ;bitpos:[12] ;default: 1'h1 ; */
+/*description: Set this bit to bypass  Compress/Decompress module for transmitted data..*/
+#define I2S_TX_PCM_BYPASS    (BIT(12))
+#define I2S_TX_PCM_BYPASS_M  (BIT(12))
+#define I2S_TX_PCM_BYPASS_V  0x1
+#define I2S_TX_PCM_BYPASS_S  12
+/* I2S_TX_PCM_CONF : R/W ;bitpos:[11:10] ;default: 2'h0 ; */
+/*description: I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (l
+toa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &.*/
+#define I2S_TX_PCM_CONF    0x00000003
+#define I2S_TX_PCM_CONF_M  ((I2S_TX_PCM_CONF_V)<<(I2S_TX_PCM_CONF_S))
+#define I2S_TX_PCM_CONF_V  0x3
+#define I2S_TX_PCM_CONF_S  10
+/* I2S_TX_MONO_FST_VLD : R/W ;bitpos:[9] ;default: 1'b1 ; */
+/*description: 1: The first channel data value is valid in I2S TX mono mode.   0: The second ch
+annel data value is valid in I2S TX mono mode..*/
+#define I2S_TX_MONO_FST_VLD    (BIT(9))
+#define I2S_TX_MONO_FST_VLD_M  (BIT(9))
+#define I2S_TX_MONO_FST_VLD_V  0x1
+#define I2S_TX_MONO_FST_VLD_S  9
+/* I2S_TX_UPDATE : R/W/SC ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set 1 to update I2S TX registers from APB clock domain to I2S TX clock domain. T
+his bit will be cleared by hardware after update register done..*/
+#define I2S_TX_UPDATE    (BIT(8))
+#define I2S_TX_UPDATE_M  (BIT(8))
+#define I2S_TX_UPDATE_V  0x1
+#define I2S_TX_UPDATE_S  8
+/* I2S_TX_BIG_ENDIAN : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: I2S Tx byte endian, 1: low addr value to high addr.  0: low addr with low addr v
+alue..*/
+#define I2S_TX_BIG_ENDIAN    (BIT(7))
+#define I2S_TX_BIG_ENDIAN_M  (BIT(7))
+#define I2S_TX_BIG_ENDIAN_V  0x1
+#define I2S_TX_BIG_ENDIAN_S  7
+/* I2S_TX_CHAN_EQUAL : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: 1: The value of Left channel data is equal to the value of right channel data in
+ I2S TX mono mode or TDM channel select mode. 0: The invalid channel data is reg
+_i2s_single_data in I2S TX mono mode or TDM channel select mode..*/
+#define I2S_TX_CHAN_EQUAL    (BIT(6))
+#define I2S_TX_CHAN_EQUAL_M  (BIT(6))
+#define I2S_TX_CHAN_EQUAL_V  0x1
+#define I2S_TX_CHAN_EQUAL_S  6
+/* I2S_TX_MONO : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to enable transmitter in mono mode  .*/
+#define I2S_TX_MONO    (BIT(5))
+#define I2S_TX_MONO_M  (BIT(5))
+#define I2S_TX_MONO_V  0x1
+#define I2S_TX_MONO_S  5
+/* I2S_TX_SLAVE_MOD : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to enable slave transmitter mode  .*/
+#define I2S_TX_SLAVE_MOD    (BIT(3))
+#define I2S_TX_SLAVE_MOD_M  (BIT(3))
+#define I2S_TX_SLAVE_MOD_V  0x1
+#define I2S_TX_SLAVE_MOD_S  3
+/* I2S_TX_START : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to start transmitting data .*/
+#define I2S_TX_START    (BIT(2))
+#define I2S_TX_START_M  (BIT(2))
+#define I2S_TX_START_V  0x1
+#define I2S_TX_START_S  2
+/* I2S_TX_FIFO_RESET : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to reset Tx AFIFO.*/
+#define I2S_TX_FIFO_RESET    (BIT(1))
+#define I2S_TX_FIFO_RESET_M  (BIT(1))
+#define I2S_TX_FIFO_RESET_V  0x1
+#define I2S_TX_FIFO_RESET_S  1
+/* I2S_TX_RESET : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to reset transmitter.*/
+#define I2S_TX_RESET    (BIT(0))
+#define I2S_TX_RESET_M  (BIT(0))
+#define I2S_TX_RESET_V  0x1
+#define I2S_TX_RESET_S  0
+
+#define I2S_RX_CONF1_REG(i)          (REG_I2S_BASE(i) + 0x28)
+/* I2S_RX_MSB_SHIFT : R/W ;bitpos:[29] ;default: 1'b1 ; */
+/*description: Set this bit to enable receiver in Phillips standard mode.*/
+#define I2S_RX_MSB_SHIFT    (BIT(29))
+#define I2S_RX_MSB_SHIFT_M  (BIT(29))
+#define I2S_RX_MSB_SHIFT_V  0x1
+#define I2S_RX_MSB_SHIFT_S  29
+/* I2S_RX_TDM_CHAN_BITS : R/W ;bitpos:[28:24] ;default: 5'hf ; */
+/*description: The Rx bit number for each channel minus 1in TDM mode..*/
+#define I2S_RX_TDM_CHAN_BITS    0x0000001F
+#define I2S_RX_TDM_CHAN_BITS_M  ((I2S_RX_TDM_CHAN_BITS_V)<<(I2S_RX_TDM_CHAN_BITS_S))
+#define I2S_RX_TDM_CHAN_BITS_V  0x1F
+#define I2S_RX_TDM_CHAN_BITS_S  24
+/* I2S_RX_HALF_SAMPLE_BITS : R/W ;bitpos:[23:18] ;default: 6'hf ; */
+/*description: I2S Rx half sample bits -1..*/
+#define I2S_RX_HALF_SAMPLE_BITS    0x0000003F
+#define I2S_RX_HALF_SAMPLE_BITS_M  ((I2S_RX_HALF_SAMPLE_BITS_V)<<(I2S_RX_HALF_SAMPLE_BITS_S))
+#define I2S_RX_HALF_SAMPLE_BITS_V  0x3F
+#define I2S_RX_HALF_SAMPLE_BITS_S  18
+/* I2S_RX_BITS_MOD : R/W ;bitpos:[17:13] ;default: 5'hf ; */
+/*description: Set the bits to configure the valid data bit length of I2S receiver channel. 7:
+all the valid channel data is in 8-bit-mode. 15: all the valid channel data is i
+n 16-bit-mode. 23: all the valid channel data is in 24-bit-mode. 31:all the vali
+d channel data is in 32-bit-mode..*/
+#define I2S_RX_BITS_MOD    0x0000001F
+#define I2S_RX_BITS_MOD_M  ((I2S_RX_BITS_MOD_V)<<(I2S_RX_BITS_MOD_S))
+#define I2S_RX_BITS_MOD_V  0x1F
+#define I2S_RX_BITS_MOD_S  13
+/* I2S_RX_BCK_DIV_NUM : R/W ;bitpos:[12:7] ;default: 6'd6 ; */
+/*description: Bit clock configuration bits in receiver mode. .*/
+#define I2S_RX_BCK_DIV_NUM    0x0000003F
+#define I2S_RX_BCK_DIV_NUM_M  ((I2S_RX_BCK_DIV_NUM_V)<<(I2S_RX_BCK_DIV_NUM_S))
+#define I2S_RX_BCK_DIV_NUM_V  0x3F
+#define I2S_RX_BCK_DIV_NUM_S  7
+/* I2S_RX_TDM_WS_WIDTH : R/W ;bitpos:[6:0] ;default: 7'h0 ; */
+/*description:  The width of rx_ws_out in TDM mode is (I2S_RX_TDM_WS_WIDTH[6:0] +1) * T_bck.*/
+#define I2S_RX_TDM_WS_WIDTH    0x0000007F
+#define I2S_RX_TDM_WS_WIDTH_M  ((I2S_RX_TDM_WS_WIDTH_V)<<(I2S_RX_TDM_WS_WIDTH_S))
+#define I2S_RX_TDM_WS_WIDTH_V  0x7F
+#define I2S_RX_TDM_WS_WIDTH_S  0
+
+#define I2S_TX_CONF1_REG(i)          (REG_I2S_BASE(i) + 0x2C)
+/* I2S_TX_BCK_NO_DLY : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: 1: BCK is not delayed to generate pos/neg edge in master mode. 0: BCK is delayed
+ to generate pos/neg edge in master mode..*/
+#define I2S_TX_BCK_NO_DLY    (BIT(30))
+#define I2S_TX_BCK_NO_DLY_M  (BIT(30))
+#define I2S_TX_BCK_NO_DLY_V  0x1
+#define I2S_TX_BCK_NO_DLY_S  30
+/* I2S_TX_MSB_SHIFT : R/W ;bitpos:[29] ;default: 1'b1 ; */
+/*description: Set this bit to enable transmitter in Phillips standard mode.*/
+#define I2S_TX_MSB_SHIFT    (BIT(29))
+#define I2S_TX_MSB_SHIFT_M  (BIT(29))
+#define I2S_TX_MSB_SHIFT_V  0x1
+#define I2S_TX_MSB_SHIFT_S  29
+/* I2S_TX_TDM_CHAN_BITS : R/W ;bitpos:[28:24] ;default: 5'hf ; */
+/*description: The Tx bit number for each channel minus 1in TDM mode..*/
+#define I2S_TX_TDM_CHAN_BITS    0x0000001F
+#define I2S_TX_TDM_CHAN_BITS_M  ((I2S_TX_TDM_CHAN_BITS_V)<<(I2S_TX_TDM_CHAN_BITS_S))
+#define I2S_TX_TDM_CHAN_BITS_V  0x1F
+#define I2S_TX_TDM_CHAN_BITS_S  24
+/* I2S_TX_HALF_SAMPLE_BITS : R/W ;bitpos:[23:18] ;default: 6'hf ; */
+/*description:  I2S Tx half sample bits -1..*/
+#define I2S_TX_HALF_SAMPLE_BITS    0x0000003F
+#define I2S_TX_HALF_SAMPLE_BITS_M  ((I2S_TX_HALF_SAMPLE_BITS_V)<<(I2S_TX_HALF_SAMPLE_BITS_S))
+#define I2S_TX_HALF_SAMPLE_BITS_V  0x3F
+#define I2S_TX_HALF_SAMPLE_BITS_S  18
+/* I2S_TX_BITS_MOD : R/W ;bitpos:[17:13] ;default: 5'hf ; */
+/*description: Set the bits to configure the valid data bit length of I2S transmitter channel.
+7: all the valid channel data is in 8-bit-mode. 15: all the valid channel data i
+s in 16-bit-mode. 23: all the valid channel data is in 24-bit-mode. 31:all the v
+alid channel data is in 32-bit-mode..*/
+#define I2S_TX_BITS_MOD    0x0000001F
+#define I2S_TX_BITS_MOD_M  ((I2S_TX_BITS_MOD_V)<<(I2S_TX_BITS_MOD_S))
+#define I2S_TX_BITS_MOD_V  0x1F
+#define I2S_TX_BITS_MOD_S  13
+/* I2S_TX_BCK_DIV_NUM : R/W ;bitpos:[12:7] ;default: 6'd6 ; */
+/*description: Bit clock configuration bits in transmitter mode. .*/
+#define I2S_TX_BCK_DIV_NUM    0x0000003F
+#define I2S_TX_BCK_DIV_NUM_M  ((I2S_TX_BCK_DIV_NUM_V)<<(I2S_TX_BCK_DIV_NUM_S))
+#define I2S_TX_BCK_DIV_NUM_V  0x3F
+#define I2S_TX_BCK_DIV_NUM_S  7
+/* I2S_TX_TDM_WS_WIDTH : R/W ;bitpos:[6:0] ;default: 7'h0 ; */
+/*description:  The width of tx_ws_out in TDM mode is (I2S_TX_TDM_WS_WIDTH[6:0] +1) * T_bck.*/
+#define I2S_TX_TDM_WS_WIDTH    0x0000007F
+#define I2S_TX_TDM_WS_WIDTH_M  ((I2S_TX_TDM_WS_WIDTH_V)<<(I2S_TX_TDM_WS_WIDTH_S))
+#define I2S_TX_TDM_WS_WIDTH_V  0x7F
+#define I2S_TX_TDM_WS_WIDTH_S  0
+
+#define I2S_RX_CLKM_CONF_REG(i)          (REG_I2S_BASE(i) + 0x30)
+/* I2S_MCLK_SEL : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description:  0: UseI2S Tx module clock as I2S_MCLK_OUT.  1: UseI2S Rx module clock as I2S_MC
+LK_OUT. .*/
+#define I2S_MCLK_SEL    (BIT(29))
+#define I2S_MCLK_SEL_M  (BIT(29))
+#define I2S_MCLK_SEL_V  0x1
+#define I2S_MCLK_SEL_S  29
+/* I2S_RX_CLK_SEL : R/W ;bitpos:[28:27] ;default: 2'b0 ; */
+/*description: Select I2S Rx module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: I2S_MCLK_
+in..*/
+#define I2S_RX_CLK_SEL    0x00000003
+#define I2S_RX_CLK_SEL_M  ((I2S_RX_CLK_SEL_V)<<(I2S_RX_CLK_SEL_S))
+#define I2S_RX_CLK_SEL_V  0x3
+#define I2S_RX_CLK_SEL_S  27
+/* I2S_RX_CLK_ACTIVE : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: I2S Rx module clock enable signal..*/
+#define I2S_RX_CLK_ACTIVE    (BIT(26))
+#define I2S_RX_CLK_ACTIVE_M  (BIT(26))
+#define I2S_RX_CLK_ACTIVE_V  0x1
+#define I2S_RX_CLK_ACTIVE_S  26
+/* I2S_RX_CLKM_DIV_NUM : R/W ;bitpos:[7:0] ;default: 8'd2 ; */
+/*description: Integral I2S clock divider value.*/
+#define I2S_RX_CLKM_DIV_NUM    0x000000FF
+#define I2S_RX_CLKM_DIV_NUM_M  ((I2S_RX_CLKM_DIV_NUM_V)<<(I2S_RX_CLKM_DIV_NUM_S))
+#define I2S_RX_CLKM_DIV_NUM_V  0xFF
+#define I2S_RX_CLKM_DIV_NUM_S  0
+
+#define I2S_TX_CLKM_CONF_REG(i)          (REG_I2S_BASE(i) + 0x34)
+/* I2S_CLK_EN : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: Set this bit to enable clk gate.*/
+#define I2S_CLK_EN    (BIT(29))
+#define I2S_CLK_EN_M  (BIT(29))
+#define I2S_CLK_EN_V  0x1
+#define I2S_CLK_EN_S  29
+/* I2S_TX_CLK_SEL : R/W ;bitpos:[28:27] ;default: 2'b0 ; */
+/*description: Select I2S Tx module source clock. 0: XTAL clock. 1: APLL. 2: CLK160. 3: I2S_MCL
+K_in..*/
+#define I2S_TX_CLK_SEL    0x00000003
+#define I2S_TX_CLK_SEL_M  ((I2S_TX_CLK_SEL_V)<<(I2S_TX_CLK_SEL_S))
+#define I2S_TX_CLK_SEL_V  0x3
+#define I2S_TX_CLK_SEL_S  27
+/* I2S_TX_CLK_ACTIVE : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: I2S Tx module clock enable signal..*/
+#define I2S_TX_CLK_ACTIVE    (BIT(26))
+#define I2S_TX_CLK_ACTIVE_M  (BIT(26))
+#define I2S_TX_CLK_ACTIVE_V  0x1
+#define I2S_TX_CLK_ACTIVE_S  26
+/* I2S_TX_CLKM_DIV_NUM : R/W ;bitpos:[7:0] ;default: 8'd2 ; */
+/*description: Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will
+ be (a-b) * n-div and b * (n+1)-div.  So the average combination will be:  for b
+ <= a/2, z * [x * n-div + (n+1)-div] + y * n-div. For b > a/2, z * [n-div + x *
+(n+1)-div] + y * (n+1)-div. .*/
+#define I2S_TX_CLKM_DIV_NUM    0x000000FF
+#define I2S_TX_CLKM_DIV_NUM_M  ((I2S_TX_CLKM_DIV_NUM_V)<<(I2S_TX_CLKM_DIV_NUM_S))
+#define I2S_TX_CLKM_DIV_NUM_V  0xFF
+#define I2S_TX_CLKM_DIV_NUM_S  0
+
+#define I2S_RX_CLKM_DIV_CONF_REG(i)          (REG_I2S_BASE(i) + 0x38)
+/* I2S_RX_CLKM_DIV_YN1 : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of
+I2S_RX_CLKM_DIV_YN1 is 1. .*/
+#define I2S_RX_CLKM_DIV_YN1    (BIT(27))
+#define I2S_RX_CLKM_DIV_YN1_M  (BIT(27))
+#define I2S_RX_CLKM_DIV_YN1_V  0x1
+#define I2S_RX_CLKM_DIV_YN1_S  27
+/* I2S_RX_CLKM_DIV_X : R/W ;bitpos:[26:18] ;default: 9'h0 ; */
+/*description: For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the valu
+e of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1. .*/
+#define I2S_RX_CLKM_DIV_X    0x000001FF
+#define I2S_RX_CLKM_DIV_X_M  ((I2S_RX_CLKM_DIV_X_V)<<(I2S_RX_CLKM_DIV_X_S))
+#define I2S_RX_CLKM_DIV_X_V  0x1FF
+#define I2S_RX_CLKM_DIV_X_S  18
+/* I2S_RX_CLKM_DIV_Y : R/W ;bitpos:[17:9] ;default: 9'h1 ; */
+/*description: For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value o
+f I2S_RX_CLKM_DIV_Y is (a%(a-b)). .*/
+#define I2S_RX_CLKM_DIV_Y    0x000001FF
+#define I2S_RX_CLKM_DIV_Y_M  ((I2S_RX_CLKM_DIV_Y_V)<<(I2S_RX_CLKM_DIV_Y_S))
+#define I2S_RX_CLKM_DIV_Y_V  0x1FF
+#define I2S_RX_CLKM_DIV_Y_S  9
+/* I2S_RX_CLKM_DIV_Z : R/W ;bitpos:[8:0] ;default: 9'h0 ; */
+/*description: For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S
+_RX_CLKM_DIV_Z is (a-b). .*/
+#define I2S_RX_CLKM_DIV_Z    0x000001FF
+#define I2S_RX_CLKM_DIV_Z_M  ((I2S_RX_CLKM_DIV_Z_V)<<(I2S_RX_CLKM_DIV_Z_S))
+#define I2S_RX_CLKM_DIV_Z_V  0x1FF
+#define I2S_RX_CLKM_DIV_Z_S  0
+
+#define I2S_TX_CLKM_DIV_CONF_REG(i)          (REG_I2S_BASE(i) + 0x3C)
+/* I2S_TX_CLKM_DIV_YN1 : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of
+I2S_TX_CLKM_DIV_YN1 is 1. .*/
+#define I2S_TX_CLKM_DIV_YN1    (BIT(27))
+#define I2S_TX_CLKM_DIV_YN1_M  (BIT(27))
+#define I2S_TX_CLKM_DIV_YN1_V  0x1
+#define I2S_TX_CLKM_DIV_YN1_S  27
+/* I2S_TX_CLKM_DIV_X : R/W ;bitpos:[26:18] ;default: 9'h0 ; */
+/*description: For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the valu
+e of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1. .*/
+#define I2S_TX_CLKM_DIV_X    0x000001FF
+#define I2S_TX_CLKM_DIV_X_M  ((I2S_TX_CLKM_DIV_X_V)<<(I2S_TX_CLKM_DIV_X_S))
+#define I2S_TX_CLKM_DIV_X_V  0x1FF
+#define I2S_TX_CLKM_DIV_X_S  18
+/* I2S_TX_CLKM_DIV_Y : R/W ;bitpos:[17:9] ;default: 9'h1 ; */
+/*description: For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value o
+f I2S_TX_CLKM_DIV_Y is (a%(a-b)). .*/
+#define I2S_TX_CLKM_DIV_Y    0x000001FF
+#define I2S_TX_CLKM_DIV_Y_M  ((I2S_TX_CLKM_DIV_Y_V)<<(I2S_TX_CLKM_DIV_Y_S))
+#define I2S_TX_CLKM_DIV_Y_V  0x1FF
+#define I2S_TX_CLKM_DIV_Y_S  9
+/* I2S_TX_CLKM_DIV_Z : R/W ;bitpos:[8:0] ;default: 9'h0 ; */
+/*description: For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S
+_TX_CLKM_DIV_Z is (a-b). .*/
+#define I2S_TX_CLKM_DIV_Z    0x000001FF
+#define I2S_TX_CLKM_DIV_Z_M  ((I2S_TX_CLKM_DIV_Z_V)<<(I2S_TX_CLKM_DIV_Z_S))
+#define I2S_TX_CLKM_DIV_Z_V  0x1FF
+#define I2S_TX_CLKM_DIV_Z_S  0
+
+#define I2S_TX_PCM2PDM_CONF_REG(i)          (REG_I2S_BASE(i) + 0x40)
+/* I2S_PCM2PDM_CONV_EN : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: I2S TX PDM Converter enable.*/
+#define I2S_PCM2PDM_CONV_EN    (BIT(25))
+#define I2S_PCM2PDM_CONV_EN_M  (BIT(25))
+#define I2S_PCM2PDM_CONV_EN_V  0x1
+#define I2S_PCM2PDM_CONV_EN_S  25
+/* I2S_TX_PDM_DAC_MODE_EN : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: I2S TX PDM dac 2channel enable.*/
+#define I2S_TX_PDM_DAC_MODE_EN    (BIT(24))
+#define I2S_TX_PDM_DAC_MODE_EN_M  (BIT(24))
+#define I2S_TX_PDM_DAC_MODE_EN_V  0x1
+#define I2S_TX_PDM_DAC_MODE_EN_S  24
+/* I2S_TX_PDM_DAC_2OUT_EN : R/W ;bitpos:[23] ;default: 1'b0 ; */
+/*description: I2S TX PDM dac mode enable.*/
+#define I2S_TX_PDM_DAC_2OUT_EN    (BIT(23))
+#define I2S_TX_PDM_DAC_2OUT_EN_M  (BIT(23))
+#define I2S_TX_PDM_DAC_2OUT_EN_V  0x1
+#define I2S_TX_PDM_DAC_2OUT_EN_S  23
+/* I2S_TX_PDM_SIGMADELTA_DITHER : R/W ;bitpos:[22] ;default: 1'b1 ; */
+/*description: I2S TX PDM sigmadelta dither value.*/
+#define I2S_TX_PDM_SIGMADELTA_DITHER    (BIT(22))
+#define I2S_TX_PDM_SIGMADELTA_DITHER_M  (BIT(22))
+#define I2S_TX_PDM_SIGMADELTA_DITHER_V  0x1
+#define I2S_TX_PDM_SIGMADELTA_DITHER_S  22
+/* I2S_TX_PDM_SIGMADELTA_DITHER2 : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: I2S TX PDM sigmadelta dither2 value.*/
+#define I2S_TX_PDM_SIGMADELTA_DITHER2    (BIT(21))
+#define I2S_TX_PDM_SIGMADELTA_DITHER2_M  (BIT(21))
+#define I2S_TX_PDM_SIGMADELTA_DITHER2_V  0x1
+#define I2S_TX_PDM_SIGMADELTA_DITHER2_S  21
+/* I2S_TX_PDM_SIGMADELTA_IN_SHIFT : R/W ;bitpos:[20:19] ;default: 2'h1 ; */
+/*description: I2S TX PDM sigmadelta scale shift number: 0:/2 , 1:x1 , 2:x2 , 3: x4.*/
+#define I2S_TX_PDM_SIGMADELTA_IN_SHIFT    0x00000003
+#define I2S_TX_PDM_SIGMADELTA_IN_SHIFT_M  ((I2S_TX_PDM_SIGMADELTA_IN_SHIFT_V)<<(I2S_TX_PDM_SIGMADELTA_IN_SHIFT_S))
+#define I2S_TX_PDM_SIGMADELTA_IN_SHIFT_V  0x3
+#define I2S_TX_PDM_SIGMADELTA_IN_SHIFT_S  19
+/* I2S_TX_PDM_SINC_IN_SHIFT : R/W ;bitpos:[18:17] ;default: 2'h1 ; */
+/*description: I2S TX PDM sigmadelta scale shift number: 0:/2 , 1:x1 , 2:x2 , 3: x4.*/
+#define I2S_TX_PDM_SINC_IN_SHIFT    0x00000003
+#define I2S_TX_PDM_SINC_IN_SHIFT_M  ((I2S_TX_PDM_SINC_IN_SHIFT_V)<<(I2S_TX_PDM_SINC_IN_SHIFT_S))
+#define I2S_TX_PDM_SINC_IN_SHIFT_V  0x3
+#define I2S_TX_PDM_SINC_IN_SHIFT_S  17
+/* I2S_TX_PDM_LP_IN_SHIFT : R/W ;bitpos:[16:15] ;default: 2'h1 ; */
+/*description: I2S TX PDM sigmadelta scale shift number: 0:/2 , 1:x1 , 2:x2 , 3: x4.*/
+#define I2S_TX_PDM_LP_IN_SHIFT    0x00000003
+#define I2S_TX_PDM_LP_IN_SHIFT_M  ((I2S_TX_PDM_LP_IN_SHIFT_V)<<(I2S_TX_PDM_LP_IN_SHIFT_S))
+#define I2S_TX_PDM_LP_IN_SHIFT_V  0x3
+#define I2S_TX_PDM_LP_IN_SHIFT_S  15
+/* I2S_TX_PDM_HP_IN_SHIFT : R/W ;bitpos:[14:13] ;default: 2'h1 ; */
+/*description: I2S TX PDM sigmadelta scale shift number: 0:/2 , 1:x1 , 2:x2 , 3: x4.*/
+#define I2S_TX_PDM_HP_IN_SHIFT    0x00000003
+#define I2S_TX_PDM_HP_IN_SHIFT_M  ((I2S_TX_PDM_HP_IN_SHIFT_V)<<(I2S_TX_PDM_HP_IN_SHIFT_S))
+#define I2S_TX_PDM_HP_IN_SHIFT_V  0x3
+#define I2S_TX_PDM_HP_IN_SHIFT_S  13
+/* I2S_TX_PDM_PRESCALE : R/W ;bitpos:[12:5] ;default: 8'h0 ; */
+/*description: I2S TX PDM prescale for sigmadelta.*/
+#define I2S_TX_PDM_PRESCALE    0x000000FF
+#define I2S_TX_PDM_PRESCALE_M  ((I2S_TX_PDM_PRESCALE_V)<<(I2S_TX_PDM_PRESCALE_S))
+#define I2S_TX_PDM_PRESCALE_V  0xFF
+#define I2S_TX_PDM_PRESCALE_S  5
+/* I2S_TX_PDM_SINC_OSR2 : R/W ;bitpos:[4:1] ;default: 4'h2 ; */
+/*description: I2S TX PDM OSR2 value.*/
+#define I2S_TX_PDM_SINC_OSR2    0x0000000F
+#define I2S_TX_PDM_SINC_OSR2_M  ((I2S_TX_PDM_SINC_OSR2_V)<<(I2S_TX_PDM_SINC_OSR2_S))
+#define I2S_TX_PDM_SINC_OSR2_V  0xF
+#define I2S_TX_PDM_SINC_OSR2_S  1
+/* I2S_TX_PDM_HP_BYPASS : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: I2S TX PDM bypass hp filter or not. The option has been removed..*/
+#define I2S_TX_PDM_HP_BYPASS    (BIT(0))
+#define I2S_TX_PDM_HP_BYPASS_M  (BIT(0))
+#define I2S_TX_PDM_HP_BYPASS_V  0x1
+#define I2S_TX_PDM_HP_BYPASS_S  0
+
+#define I2S_TX_PCM2PDM_CONF1_REG(i)          (REG_I2S_BASE(i) + 0x44)
+/* I2S_TX_IIR_HP_MULT12_0 : R/W ;bitpos:[25:23] ;default: 3'd7 ; */
+/*description: The fourth parameter of PDM TX IIR_HP filter stage 1 is (504 + I2S_TX_IIR_HP_MUL
+T12_0[2:0]).*/
+#define I2S_TX_IIR_HP_MULT12_0    0x00000007
+#define I2S_TX_IIR_HP_MULT12_0_M  ((I2S_TX_IIR_HP_MULT12_0_V)<<(I2S_TX_IIR_HP_MULT12_0_S))
+#define I2S_TX_IIR_HP_MULT12_0_V  0x7
+#define I2S_TX_IIR_HP_MULT12_0_S  23
+/* I2S_TX_IIR_HP_MULT12_5 : R/W ;bitpos:[22:20] ;default: 3'd7 ; */
+/*description: The fourth parameter of PDM TX IIR_HP filter stage 2 is (504 + I2S_TX_IIR_HP_MUL
+T12_5[2:0]).*/
+#define I2S_TX_IIR_HP_MULT12_5    0x00000007
+#define I2S_TX_IIR_HP_MULT12_5_M  ((I2S_TX_IIR_HP_MULT12_5_V)<<(I2S_TX_IIR_HP_MULT12_5_S))
+#define I2S_TX_IIR_HP_MULT12_5_V  0x7
+#define I2S_TX_IIR_HP_MULT12_5_S  20
+/* I2S_TX_PDM_FS : R/W ;bitpos:[19:10] ;default: 10'd480 ; */
+/*description: I2S TX PDM Fs.*/
+#define I2S_TX_PDM_FS    0x000003FF
+#define I2S_TX_PDM_FS_M  ((I2S_TX_PDM_FS_V)<<(I2S_TX_PDM_FS_S))
+#define I2S_TX_PDM_FS_V  0x3FF
+#define I2S_TX_PDM_FS_S  10
+/* I2S_TX_PDM_FP : R/W ;bitpos:[9:0] ;default: 10'd960 ; */
+/*description: I2S TX PDM Fp.*/
+#define I2S_TX_PDM_FP    0x000003FF
+#define I2S_TX_PDM_FP_M  ((I2S_TX_PDM_FP_V)<<(I2S_TX_PDM_FP_S))
+#define I2S_TX_PDM_FP_V  0x3FF
+#define I2S_TX_PDM_FP_S  0
+
+#define I2S_RX_TDM_CTRL_REG(i)          (REG_I2S_BASE(i) + 0x50)
+/* I2S_RX_TDM_TOT_CHAN_NUM : R/W ;bitpos:[19:16] ;default: 4'h0 ; */
+/*description: The total channel number of I2S TX TDM mode..*/
+#define I2S_RX_TDM_TOT_CHAN_NUM    0x0000000F
+#define I2S_RX_TDM_TOT_CHAN_NUM_M  ((I2S_RX_TDM_TOT_CHAN_NUM_V)<<(I2S_RX_TDM_TOT_CHAN_NUM_S))
+#define I2S_RX_TDM_TOT_CHAN_NUM_V  0xF
+#define I2S_RX_TDM_TOT_CHAN_NUM_S  16
+/* I2S_RX_TDM_CHAN15_EN : R/W ;bitpos:[15] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input
+ 0 in this channel..*/
+#define I2S_RX_TDM_CHAN15_EN    (BIT(15))
+#define I2S_RX_TDM_CHAN15_EN_M  (BIT(15))
+#define I2S_RX_TDM_CHAN15_EN_V  0x1
+#define I2S_RX_TDM_CHAN15_EN_S  15
+/* I2S_RX_TDM_CHAN14_EN : R/W ;bitpos:[14] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input
+ 0 in this channel..*/
+#define I2S_RX_TDM_CHAN14_EN    (BIT(14))
+#define I2S_RX_TDM_CHAN14_EN_M  (BIT(14))
+#define I2S_RX_TDM_CHAN14_EN_V  0x1
+#define I2S_RX_TDM_CHAN14_EN_S  14
+/* I2S_RX_TDM_CHAN13_EN : R/W ;bitpos:[13] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input
+ 0 in this channel..*/
+#define I2S_RX_TDM_CHAN13_EN    (BIT(13))
+#define I2S_RX_TDM_CHAN13_EN_M  (BIT(13))
+#define I2S_RX_TDM_CHAN13_EN_V  0x1
+#define I2S_RX_TDM_CHAN13_EN_S  13
+/* I2S_RX_TDM_CHAN12_EN : R/W ;bitpos:[12] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input
+ 0 in this channel..*/
+#define I2S_RX_TDM_CHAN12_EN    (BIT(12))
+#define I2S_RX_TDM_CHAN12_EN_M  (BIT(12))
+#define I2S_RX_TDM_CHAN12_EN_V  0x1
+#define I2S_RX_TDM_CHAN12_EN_S  12
+/* I2S_RX_TDM_CHAN11_EN : R/W ;bitpos:[11] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input
+ 0 in this channel..*/
+#define I2S_RX_TDM_CHAN11_EN    (BIT(11))
+#define I2S_RX_TDM_CHAN11_EN_M  (BIT(11))
+#define I2S_RX_TDM_CHAN11_EN_V  0x1
+#define I2S_RX_TDM_CHAN11_EN_S  11
+/* I2S_RX_TDM_CHAN10_EN : R/W ;bitpos:[10] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input
+ 0 in this channel..*/
+#define I2S_RX_TDM_CHAN10_EN    (BIT(10))
+#define I2S_RX_TDM_CHAN10_EN_M  (BIT(10))
+#define I2S_RX_TDM_CHAN10_EN_V  0x1
+#define I2S_RX_TDM_CHAN10_EN_S  10
+/* I2S_RX_TDM_CHAN9_EN : R/W ;bitpos:[9] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input
+ 0 in this channel..*/
+#define I2S_RX_TDM_CHAN9_EN    (BIT(9))
+#define I2S_RX_TDM_CHAN9_EN_M  (BIT(9))
+#define I2S_RX_TDM_CHAN9_EN_V  0x1
+#define I2S_RX_TDM_CHAN9_EN_S  9
+/* I2S_RX_TDM_CHAN8_EN : R/W ;bitpos:[8] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input
+ 0 in this channel..*/
+#define I2S_RX_TDM_CHAN8_EN    (BIT(8))
+#define I2S_RX_TDM_CHAN8_EN_M  (BIT(8))
+#define I2S_RX_TDM_CHAN8_EN_V  0x1
+#define I2S_RX_TDM_CHAN8_EN_S  8
+/* I2S_RX_TDM_PDM_CHAN7_EN : R/W ;bitpos:[7] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, jus
+t input 0 in this channel..*/
+#define I2S_RX_TDM_PDM_CHAN7_EN    (BIT(7))
+#define I2S_RX_TDM_PDM_CHAN7_EN_M  (BIT(7))
+#define I2S_RX_TDM_PDM_CHAN7_EN_V  0x1
+#define I2S_RX_TDM_PDM_CHAN7_EN_S  7
+/* I2S_RX_TDM_PDM_CHAN6_EN : R/W ;bitpos:[6] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, jus
+t input 0 in this channel..*/
+#define I2S_RX_TDM_PDM_CHAN6_EN    (BIT(6))
+#define I2S_RX_TDM_PDM_CHAN6_EN_M  (BIT(6))
+#define I2S_RX_TDM_PDM_CHAN6_EN_V  0x1
+#define I2S_RX_TDM_PDM_CHAN6_EN_S  6
+/* I2S_RX_TDM_PDM_CHAN5_EN : R/W ;bitpos:[5] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, jus
+t input 0 in this channel..*/
+#define I2S_RX_TDM_PDM_CHAN5_EN    (BIT(5))
+#define I2S_RX_TDM_PDM_CHAN5_EN_M  (BIT(5))
+#define I2S_RX_TDM_PDM_CHAN5_EN_V  0x1
+#define I2S_RX_TDM_PDM_CHAN5_EN_S  5
+/* I2S_RX_TDM_PDM_CHAN4_EN : R/W ;bitpos:[4] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, jus
+t input 0 in this channel..*/
+#define I2S_RX_TDM_PDM_CHAN4_EN    (BIT(4))
+#define I2S_RX_TDM_PDM_CHAN4_EN_M  (BIT(4))
+#define I2S_RX_TDM_PDM_CHAN4_EN_V  0x1
+#define I2S_RX_TDM_PDM_CHAN4_EN_S  4
+/* I2S_RX_TDM_PDM_CHAN3_EN : R/W ;bitpos:[3] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, jus
+t input 0 in this channel..*/
+#define I2S_RX_TDM_PDM_CHAN3_EN    (BIT(3))
+#define I2S_RX_TDM_PDM_CHAN3_EN_M  (BIT(3))
+#define I2S_RX_TDM_PDM_CHAN3_EN_V  0x1
+#define I2S_RX_TDM_PDM_CHAN3_EN_S  3
+/* I2S_RX_TDM_PDM_CHAN2_EN : R/W ;bitpos:[2] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, jus
+t input 0 in this channel..*/
+#define I2S_RX_TDM_PDM_CHAN2_EN    (BIT(2))
+#define I2S_RX_TDM_PDM_CHAN2_EN_M  (BIT(2))
+#define I2S_RX_TDM_PDM_CHAN2_EN_V  0x1
+#define I2S_RX_TDM_PDM_CHAN2_EN_S  2
+/* I2S_RX_TDM_PDM_CHAN1_EN : R/W ;bitpos:[1] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, jus
+t input 0 in this channel..*/
+#define I2S_RX_TDM_PDM_CHAN1_EN    (BIT(1))
+#define I2S_RX_TDM_PDM_CHAN1_EN_M  (BIT(1))
+#define I2S_RX_TDM_PDM_CHAN1_EN_V  0x1
+#define I2S_RX_TDM_PDM_CHAN1_EN_S  1
+/* I2S_RX_TDM_PDM_CHAN0_EN : R/W ;bitpos:[0] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, jus
+t input 0 in this channel..*/
+#define I2S_RX_TDM_PDM_CHAN0_EN    (BIT(0))
+#define I2S_RX_TDM_PDM_CHAN0_EN_M  (BIT(0))
+#define I2S_RX_TDM_PDM_CHAN0_EN_V  0x1
+#define I2S_RX_TDM_PDM_CHAN0_EN_S  0
+
+#define I2S_TX_TDM_CTRL_REG(i)          (REG_I2S_BASE(i) + 0x54)
+/* I2S_TX_TDM_SKIP_MSK_EN : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: When DMA TX buffer stores the data of (REG_TX_TDM_TOT_CHAN_NUM + 1)  channels, a
+nd only the data of the enabled channels is sent, then this bit should be set. C
+lear it when all the data stored in DMA TX buffer is for enabled channels..*/
+#define I2S_TX_TDM_SKIP_MSK_EN    (BIT(20))
+#define I2S_TX_TDM_SKIP_MSK_EN_M  (BIT(20))
+#define I2S_TX_TDM_SKIP_MSK_EN_V  0x1
+#define I2S_TX_TDM_SKIP_MSK_EN_S  20
+/* I2S_TX_TDM_TOT_CHAN_NUM : R/W ;bitpos:[19:16] ;default: 4'h0 ; */
+/*description: The total channel number of I2S TX TDM mode..*/
+#define I2S_TX_TDM_TOT_CHAN_NUM    0x0000000F
+#define I2S_TX_TDM_TOT_CHAN_NUM_M  ((I2S_TX_TDM_TOT_CHAN_NUM_V)<<(I2S_TX_TDM_TOT_CHAN_NUM_S))
+#define I2S_TX_TDM_TOT_CHAN_NUM_V  0xF
+#define I2S_TX_TDM_TOT_CHAN_NUM_S  16
+/* I2S_TX_TDM_CHAN15_EN : R/W ;bitpos:[15] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN15_EN    (BIT(15))
+#define I2S_TX_TDM_CHAN15_EN_M  (BIT(15))
+#define I2S_TX_TDM_CHAN15_EN_V  0x1
+#define I2S_TX_TDM_CHAN15_EN_S  15
+/* I2S_TX_TDM_CHAN14_EN : R/W ;bitpos:[14] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN14_EN    (BIT(14))
+#define I2S_TX_TDM_CHAN14_EN_M  (BIT(14))
+#define I2S_TX_TDM_CHAN14_EN_V  0x1
+#define I2S_TX_TDM_CHAN14_EN_S  14
+/* I2S_TX_TDM_CHAN13_EN : R/W ;bitpos:[13] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN13_EN    (BIT(13))
+#define I2S_TX_TDM_CHAN13_EN_M  (BIT(13))
+#define I2S_TX_TDM_CHAN13_EN_V  0x1
+#define I2S_TX_TDM_CHAN13_EN_S  13
+/* I2S_TX_TDM_CHAN12_EN : R/W ;bitpos:[12] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN12_EN    (BIT(12))
+#define I2S_TX_TDM_CHAN12_EN_M  (BIT(12))
+#define I2S_TX_TDM_CHAN12_EN_V  0x1
+#define I2S_TX_TDM_CHAN12_EN_S  12
+/* I2S_TX_TDM_CHAN11_EN : R/W ;bitpos:[11] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN11_EN    (BIT(11))
+#define I2S_TX_TDM_CHAN11_EN_M  (BIT(11))
+#define I2S_TX_TDM_CHAN11_EN_V  0x1
+#define I2S_TX_TDM_CHAN11_EN_S  11
+/* I2S_TX_TDM_CHAN10_EN : R/W ;bitpos:[10] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN10_EN    (BIT(10))
+#define I2S_TX_TDM_CHAN10_EN_M  (BIT(10))
+#define I2S_TX_TDM_CHAN10_EN_V  0x1
+#define I2S_TX_TDM_CHAN10_EN_S  10
+/* I2S_TX_TDM_CHAN9_EN : R/W ;bitpos:[9] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN9_EN    (BIT(9))
+#define I2S_TX_TDM_CHAN9_EN_M  (BIT(9))
+#define I2S_TX_TDM_CHAN9_EN_V  0x1
+#define I2S_TX_TDM_CHAN9_EN_S  9
+/* I2S_TX_TDM_CHAN8_EN : R/W ;bitpos:[8] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN8_EN    (BIT(8))
+#define I2S_TX_TDM_CHAN8_EN_M  (BIT(8))
+#define I2S_TX_TDM_CHAN8_EN_V  0x1
+#define I2S_TX_TDM_CHAN8_EN_S  8
+/* I2S_TX_TDM_CHAN7_EN : R/W ;bitpos:[7] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN7_EN    (BIT(7))
+#define I2S_TX_TDM_CHAN7_EN_M  (BIT(7))
+#define I2S_TX_TDM_CHAN7_EN_V  0x1
+#define I2S_TX_TDM_CHAN7_EN_S  7
+/* I2S_TX_TDM_CHAN6_EN : R/W ;bitpos:[6] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN6_EN    (BIT(6))
+#define I2S_TX_TDM_CHAN6_EN_M  (BIT(6))
+#define I2S_TX_TDM_CHAN6_EN_V  0x1
+#define I2S_TX_TDM_CHAN6_EN_S  6
+/* I2S_TX_TDM_CHAN5_EN : R/W ;bitpos:[5] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN5_EN    (BIT(5))
+#define I2S_TX_TDM_CHAN5_EN_M  (BIT(5))
+#define I2S_TX_TDM_CHAN5_EN_V  0x1
+#define I2S_TX_TDM_CHAN5_EN_S  5
+/* I2S_TX_TDM_CHAN4_EN : R/W ;bitpos:[4] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN4_EN    (BIT(4))
+#define I2S_TX_TDM_CHAN4_EN_M  (BIT(4))
+#define I2S_TX_TDM_CHAN4_EN_V  0x1
+#define I2S_TX_TDM_CHAN4_EN_S  4
+/* I2S_TX_TDM_CHAN3_EN : R/W ;bitpos:[3] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN3_EN    (BIT(3))
+#define I2S_TX_TDM_CHAN3_EN_M  (BIT(3))
+#define I2S_TX_TDM_CHAN3_EN_V  0x1
+#define I2S_TX_TDM_CHAN3_EN_S  3
+/* I2S_TX_TDM_CHAN2_EN : R/W ;bitpos:[2] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN2_EN    (BIT(2))
+#define I2S_TX_TDM_CHAN2_EN_M  (BIT(2))
+#define I2S_TX_TDM_CHAN2_EN_V  0x1
+#define I2S_TX_TDM_CHAN2_EN_S  2
+/* I2S_TX_TDM_CHAN1_EN : R/W ;bitpos:[1] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN1_EN    (BIT(1))
+#define I2S_TX_TDM_CHAN1_EN_M  (BIT(1))
+#define I2S_TX_TDM_CHAN1_EN_V  0x1
+#define I2S_TX_TDM_CHAN1_EN_S  1
+/* I2S_TX_TDM_CHAN0_EN : R/W ;bitpos:[0] ;default: 1'h1 ; */
+/*description: 1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just outp
+ut 0 in this channel..*/
+#define I2S_TX_TDM_CHAN0_EN    (BIT(0))
+#define I2S_TX_TDM_CHAN0_EN_M  (BIT(0))
+#define I2S_TX_TDM_CHAN0_EN_V  0x1
+#define I2S_TX_TDM_CHAN0_EN_S  0
+
+#define I2S_RX_TIMING_REG(i)          (REG_I2S_BASE(i) + 0x58)
+/* I2S_RX_BCK_IN_DM : R/W ;bitpos:[29:28] ;default: 2'h0 ; */
+/*description: The delay mode of I2S Rx BCK input signal. 0: bypass. 1: delay by pos edge.  2:
+delay by neg edge. 3: not used..*/
+#define I2S_RX_BCK_IN_DM    0x00000003
+#define I2S_RX_BCK_IN_DM_M  ((I2S_RX_BCK_IN_DM_V)<<(I2S_RX_BCK_IN_DM_S))
+#define I2S_RX_BCK_IN_DM_V  0x3
+#define I2S_RX_BCK_IN_DM_S  28
+/* I2S_RX_WS_IN_DM : R/W ;bitpos:[25:24] ;default: 2'h0 ; */
+/*description: The delay mode of I2S Rx WS input signal. 0: bypass. 1: delay by pos edge.  2: d
+elay by neg edge. 3: not used..*/
+#define I2S_RX_WS_IN_DM    0x00000003
+#define I2S_RX_WS_IN_DM_M  ((I2S_RX_WS_IN_DM_V)<<(I2S_RX_WS_IN_DM_S))
+#define I2S_RX_WS_IN_DM_V  0x3
+#define I2S_RX_WS_IN_DM_S  24
+/* I2S_RX_BCK_OUT_DM : R/W ;bitpos:[21:20] ;default: 2'h0 ; */
+/*description: The delay mode of I2S Rx BCK output signal. 0: bypass. 1: delay by pos edge.  2:
+ delay by neg edge. 3: not used..*/
+#define I2S_RX_BCK_OUT_DM    0x00000003
+#define I2S_RX_BCK_OUT_DM_M  ((I2S_RX_BCK_OUT_DM_V)<<(I2S_RX_BCK_OUT_DM_S))
+#define I2S_RX_BCK_OUT_DM_V  0x3
+#define I2S_RX_BCK_OUT_DM_S  20
+/* I2S_RX_WS_OUT_DM : R/W ;bitpos:[17:16] ;default: 2'h0 ; */
+/*description: The delay mode of I2S Rx WS output signal. 0: bypass. 1: delay by pos edge.  2:
+delay by neg edge. 3: not used..*/
+#define I2S_RX_WS_OUT_DM    0x00000003
+#define I2S_RX_WS_OUT_DM_M  ((I2S_RX_WS_OUT_DM_V)<<(I2S_RX_WS_OUT_DM_S))
+#define I2S_RX_WS_OUT_DM_V  0x3
+#define I2S_RX_WS_OUT_DM_S  16
+/* I2S_RX_SD3_IN_DM : R/W ;bitpos:[13:12] ;default: 2'h0 ; */
+/*description: The delay mode of I2S Rx SD3 input signal. 0: bypass. 1: delay by pos edge.  2:
+delay by neg edge. 3: not used..*/
+#define I2S_RX_SD3_IN_DM    0x00000003
+#define I2S_RX_SD3_IN_DM_M  ((I2S_RX_SD3_IN_DM_V)<<(I2S_RX_SD3_IN_DM_S))
+#define I2S_RX_SD3_IN_DM_V  0x3
+#define I2S_RX_SD3_IN_DM_S  12
+/* I2S_RX_SD2_IN_DM : R/W ;bitpos:[9:8] ;default: 2'h0 ; */
+/*description: The delay mode of I2S Rx SD2 input signal. 0: bypass. 1: delay by pos edge.  2:
+delay by neg edge. 3: not used..*/
+#define I2S_RX_SD2_IN_DM    0x00000003
+#define I2S_RX_SD2_IN_DM_M  ((I2S_RX_SD2_IN_DM_V)<<(I2S_RX_SD2_IN_DM_S))
+#define I2S_RX_SD2_IN_DM_V  0x3
+#define I2S_RX_SD2_IN_DM_S  8
+/* I2S_RX_SD1_IN_DM : R/W ;bitpos:[5:4] ;default: 2'h0 ; */
+/*description: The delay mode of I2S Rx SD1 input signal. 0: bypass. 1: delay by pos edge.  2:
+delay by neg edge. 3: not used..*/
+#define I2S_RX_SD1_IN_DM    0x00000003
+#define I2S_RX_SD1_IN_DM_M  ((I2S_RX_SD1_IN_DM_V)<<(I2S_RX_SD1_IN_DM_S))
+#define I2S_RX_SD1_IN_DM_V  0x3
+#define I2S_RX_SD1_IN_DM_S  4
+/* I2S_RX_SD_IN_DM : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: The delay mode of I2S Rx SD input signal. 0: bypass. 1: delay by pos edge.  2: d
+elay by neg edge. 3: not used..*/
+#define I2S_RX_SD_IN_DM    0x00000003
+#define I2S_RX_SD_IN_DM_M  ((I2S_RX_SD_IN_DM_V)<<(I2S_RX_SD_IN_DM_S))
+#define I2S_RX_SD_IN_DM_V  0x3
+#define I2S_RX_SD_IN_DM_S  0
+
+#define I2S_TX_TIMING_REG(i)          (REG_I2S_BASE(i) + 0x5C)
+/* I2S_TX_BCK_IN_DM : R/W ;bitpos:[29:28] ;default: 2'h0 ; */
+/*description: The delay mode of I2S TX BCK input signal. 0: bypass. 1: delay by pos edge.  2:
+delay by neg edge. 3: not used..*/
+#define I2S_TX_BCK_IN_DM    0x00000003
+#define I2S_TX_BCK_IN_DM_M  ((I2S_TX_BCK_IN_DM_V)<<(I2S_TX_BCK_IN_DM_S))
+#define I2S_TX_BCK_IN_DM_V  0x3
+#define I2S_TX_BCK_IN_DM_S  28
+/* I2S_TX_WS_IN_DM : R/W ;bitpos:[25:24] ;default: 2'h0 ; */
+/*description: The delay mode of I2S TX WS input signal. 0: bypass. 1: delay by pos edge.  2: d
+elay by neg edge. 3: not used..*/
+#define I2S_TX_WS_IN_DM    0x00000003
+#define I2S_TX_WS_IN_DM_M  ((I2S_TX_WS_IN_DM_V)<<(I2S_TX_WS_IN_DM_S))
+#define I2S_TX_WS_IN_DM_V  0x3
+#define I2S_TX_WS_IN_DM_S  24
+/* I2S_TX_BCK_OUT_DM : R/W ;bitpos:[21:20] ;default: 2'h0 ; */
+/*description: The delay mode of I2S TX BCK output signal. 0: bypass. 1: delay by pos edge.  2:
+ delay by neg edge. 3: not used..*/
+#define I2S_TX_BCK_OUT_DM    0x00000003
+#define I2S_TX_BCK_OUT_DM_M  ((I2S_TX_BCK_OUT_DM_V)<<(I2S_TX_BCK_OUT_DM_S))
+#define I2S_TX_BCK_OUT_DM_V  0x3
+#define I2S_TX_BCK_OUT_DM_S  20
+/* I2S_TX_WS_OUT_DM : R/W ;bitpos:[17:16] ;default: 2'h0 ; */
+/*description: The delay mode of I2S TX WS output signal. 0: bypass. 1: delay by pos edge.  2:
+delay by neg edge. 3: not used..*/
+#define I2S_TX_WS_OUT_DM    0x00000003
+#define I2S_TX_WS_OUT_DM_M  ((I2S_TX_WS_OUT_DM_V)<<(I2S_TX_WS_OUT_DM_S))
+#define I2S_TX_WS_OUT_DM_V  0x3
+#define I2S_TX_WS_OUT_DM_S  16
+/* I2S_TX_SD1_OUT_DM : R/W ;bitpos:[5:4] ;default: 2'h0 ; */
+/*description: The delay mode of I2S TX SD1 output signal. 0: bypass. 1: delay by pos edge.  2:
+ delay by neg edge. 3: not used..*/
+#define I2S_TX_SD1_OUT_DM    0x00000003
+#define I2S_TX_SD1_OUT_DM_M  ((I2S_TX_SD1_OUT_DM_V)<<(I2S_TX_SD1_OUT_DM_S))
+#define I2S_TX_SD1_OUT_DM_V  0x3
+#define I2S_TX_SD1_OUT_DM_S  4
+/* I2S_TX_SD_OUT_DM : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: The delay mode of I2S TX SD output signal. 0: bypass. 1: delay by pos edge.  2:
+delay by neg edge. 3: not used..*/
+#define I2S_TX_SD_OUT_DM    0x00000003
+#define I2S_TX_SD_OUT_DM_M  ((I2S_TX_SD_OUT_DM_V)<<(I2S_TX_SD_OUT_DM_S))
+#define I2S_TX_SD_OUT_DM_V  0x3
+#define I2S_TX_SD_OUT_DM_S  0
+
+#define I2S_LC_HUNG_CONF_REG(i)          (REG_I2S_BASE(i) + 0x60)
+/* I2S_LC_FIFO_TIMEOUT_ENA : R/W ;bitpos:[11] ;default: 1'b1 ; */
+/*description: The enable bit for FIFO timeout.*/
+#define I2S_LC_FIFO_TIMEOUT_ENA    (BIT(11))
+#define I2S_LC_FIFO_TIMEOUT_ENA_M  (BIT(11))
+#define I2S_LC_FIFO_TIMEOUT_ENA_V  0x1
+#define I2S_LC_FIFO_TIMEOUT_ENA_S  11
+/* I2S_LC_FIFO_TIMEOUT_SHIFT : R/W ;bitpos:[10:8] ;default: 3'b0 ; */
+/*description: The bits are used to scale tick counter threshold. The tick counter is reset whe
+n counter value >= 88000/2^i2s_lc_fifo_timeout_shift.*/
+#define I2S_LC_FIFO_TIMEOUT_SHIFT    0x00000007
+#define I2S_LC_FIFO_TIMEOUT_SHIFT_M  ((I2S_LC_FIFO_TIMEOUT_SHIFT_V)<<(I2S_LC_FIFO_TIMEOUT_SHIFT_S))
+#define I2S_LC_FIFO_TIMEOUT_SHIFT_V  0x7
+#define I2S_LC_FIFO_TIMEOUT_SHIFT_S  8
+/* I2S_LC_FIFO_TIMEOUT : R/W ;bitpos:[7:0] ;default: 8'h10 ; */
+/*description: the i2s_tx_hung_int interrupt or the i2s_rx_hung_int interrupt will be triggered
+ when fifo hung counter is equal to this value  .*/
+#define I2S_LC_FIFO_TIMEOUT    0x000000FF
+#define I2S_LC_FIFO_TIMEOUT_M  ((I2S_LC_FIFO_TIMEOUT_V)<<(I2S_LC_FIFO_TIMEOUT_S))
+#define I2S_LC_FIFO_TIMEOUT_V  0xFF
+#define I2S_LC_FIFO_TIMEOUT_S  0
+
+#define I2S_RXEOF_NUM_REG(i)          (REG_I2S_BASE(i) + 0x64)
+/* I2S_RX_EOF_NUM : R/W ;bitpos:[11:0] ;default: 12'h40 ; */
+/*description: The receive data bit length is (I2S_RX_BITS_MOD[4:0] + 1) * (REG_RX_EOF_NUM[11:0
+] + 1) . It will trigger in_suc_eof interrupt in the configured DMA RX channel..*/
+#define I2S_RX_EOF_NUM    0x00000FFF
+#define I2S_RX_EOF_NUM_M  ((I2S_RX_EOF_NUM_V)<<(I2S_RX_EOF_NUM_S))
+#define I2S_RX_EOF_NUM_V  0xFFF
+#define I2S_RX_EOF_NUM_S  0
+
+#define I2S_CONF_SIGLE_DATA_REG(i)          (REG_I2S_BASE(i) + 0x68)
+/* I2S_SINGLE_DATA : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: The configured constant channel data to be sent out..*/
+#define I2S_SINGLE_DATA    0xFFFFFFFF
+#define I2S_SINGLE_DATA_M  ((I2S_SINGLE_DATA_V)<<(I2S_SINGLE_DATA_S))
+#define I2S_SINGLE_DATA_V  0xFFFFFFFF
+#define I2S_SINGLE_DATA_S  0
+
+#define I2S_STATE_REG(i)          (REG_I2S_BASE(i) + 0x6C)
+/* I2S_TX_IDLE : RO ;bitpos:[0] ;default: 1'b1 ; */
+/*description: 1: i2s_tx is idle state. 0: i2s_tx is working..*/
+#define I2S_TX_IDLE    (BIT(0))
+#define I2S_TX_IDLE_M  (BIT(0))
+#define I2S_TX_IDLE_V  0x1
+#define I2S_TX_IDLE_S  0
+
+#define I2S_DATE_REG(i)          (REG_I2S_BASE(i) + 0x80)
+/* I2S_DATE : R/W ;bitpos:[27:0] ;default: 28'h2009070 ; */
+/*description: I2S version control register.*/
+#define I2S_DATE    0x0FFFFFFF
+#define I2S_DATE_M  ((I2S_DATE_V)<<(I2S_DATE_S))
+#define I2S_DATE_V  0xFFFFFFF
+#define I2S_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_I2S_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2s_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2s_struct.h
new file mode 100644
index 00000000000..553580d32c6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/i2s_struct.h
@@ -0,0 +1,350 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_I2S_STRUCT_H_
+#define _SOC_I2S_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct i2s_dev_s {
+    uint32_t reserved_0;
+    uint32_t reserved_4;
+    uint32_t reserved_8;
+    union {
+        struct {
+            uint32_t rx_done                       :    1;  /*The raw interrupt status bit  for the i2s_rx_done_int interrupt*/
+            uint32_t tx_done                       :    1;  /*The raw interrupt status bit  for the i2s_tx_done_int interrupt*/
+            uint32_t rx_hung                       :    1;  /*The raw interrupt status bit  for the i2s_rx_hung_int interrupt*/
+            uint32_t tx_hung                       :    1;  /*The raw interrupt status bit  for the i2s_tx_hung_int interrupt*/
+            uint32_t reserved4                     :    28;  /*Reserve*/
+        };
+        uint32_t val;
+    } int_raw;
+    union {
+        struct {
+            uint32_t rx_done                       :    1;  /*The masked interrupt status bit  for the i2s_rx_done_int interrupt*/
+            uint32_t tx_done                       :    1;  /*The masked interrupt status bit  for the i2s_tx_done_int interrupt*/
+            uint32_t rx_hung                       :    1;  /*The masked interrupt status bit  for the i2s_rx_hung_int interrupt*/
+            uint32_t tx_hung                       :    1;  /*The masked interrupt status bit  for the i2s_tx_hung_int interrupt*/
+            uint32_t reserved4                     :    28;  /*Reserve*/
+        };
+        uint32_t val;
+    } int_st;
+    union {
+        struct {
+            uint32_t rx_done                       :    1;  /*The interrupt enable bit  for the i2s_rx_done_int interrupt*/
+            uint32_t tx_done                       :    1;  /*The interrupt enable bit  for the i2s_tx_done_int interrupt*/
+            uint32_t rx_hung                       :    1;  /*The interrupt enable bit  for the i2s_rx_hung_int interrupt*/
+            uint32_t tx_hung                       :    1;  /*The interrupt enable bit  for the i2s_tx_hung_int interrupt*/
+            uint32_t reserved4                     :    28;  /*Reserve*/
+        };
+        uint32_t val;
+    } int_ena;
+    union {
+        struct {
+            uint32_t rx_done                       :    1;  /*Set this bit to clear the i2s_rx_done_int interrupt*/
+            uint32_t tx_done                       :    1;  /*Set this bit to clear the i2s_tx_done_int interrupt*/
+            uint32_t rx_hung                       :    1;  /*Set this bit to clear the i2s_rx_hung_int interrupt*/
+            uint32_t tx_hung                       :    1;  /*Set this bit to clear the i2s_tx_hung_int interrupt*/
+            uint32_t reserved4                     :    28;  /*Reserve*/
+        };
+        uint32_t val;
+    } int_clr;
+    uint32_t reserved_1c;
+    union {
+        struct {
+            uint32_t rx_reset                      :    1;  /*Set this bit to reset receiver*/
+            uint32_t rx_fifo_reset                 :    1;  /*Set this bit to reset Rx AFIFO*/
+            uint32_t rx_start                      :    1;  /*Set this bit to start receiving data*/
+            uint32_t rx_slave_mod                  :    1;  /*Set this bit to enable slave receiver mode*/
+            uint32_t reserved4                     :    1;  /* Reserved*/
+            uint32_t rx_mono                       :    1;  /*Set this bit to enable receiver  in mono mode*/
+            uint32_t reserved6                     :    1;  /*Reserve*/
+            uint32_t rx_big_endian                 :    1;  /*I2S Rx byte endian, 1: low addr value to high addr. 0: low addr with low addr value.*/
+            uint32_t rx_update                     :    1;  /*Set 1 to update I2S RX registers from APB clock domain to I2S RX clock domain. This bit will be cleared by hardware after update register done.*/
+            uint32_t rx_mono_fst_vld               :    1;  /*1: The first channel data value is valid in I2S RX mono mode.   0: The second channel data value is valid in I2S RX mono mode.*/
+            uint32_t rx_pcm_conf                   :    2;  /*I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &*/
+            uint32_t rx_pcm_bypass                 :    1;  /*Set this bit to bypass Compress/Decompress module for received data.*/
+            uint32_t rx_stop_mode                  :    2;  /*0  : I2S Rx only stop when reg_rx_start is cleared.   1: Stop when reg_rx_start is 0 or in_suc_eof is 1.   2:  Stop I2S RX when reg_rx_start is 0 or RX FIFO is full.*/
+            uint32_t rx_left_align                 :    1;  /*1: I2S RX left alignment mode. 0: I2S RX right alignment mode.*/
+            uint32_t rx_24_fill_en                 :    1;  /*1: store 24 channel bits to 32 bits. 0:store 24 channel bits to 24 bits.*/
+            uint32_t rx_ws_idle_pol                :    1;  /*0: WS should be 0 when receiving left channel data, and WS is 1in right channel.  1: WS should be 1 when receiving left channel data, and WS is 0in right channel. */
+            uint32_t rx_bit_order                  :    1;  /*I2S Rx bit endian. 1:small endian, the LSB is received first. 0:big endian, the MSB is received first.*/
+            uint32_t rx_tdm_en                     :    1;  /*1: Enable I2S TDM Rx mode . 0: Disable.*/
+            uint32_t rx_pdm_en                     :    1;  /*1: Enable I2S PDM Rx mode . 0: Disable.*/
+            uint32_t rx_pdm2pcm_en                 :    1;  /*1: Enable PDM2PCM RX mode. 0: DIsable.*/
+            uint32_t rx_pdm_sinc_dsr_16_en         :    1;  /*Configure the down sampling rate of PDM RX filter group1 module. 1: The  down sampling rate is 128. 0: down sampling rate is 64.*/
+            uint32_t reserved23                    :    9;  /*Reserve*/
+        };
+        uint32_t val;
+    } rx_conf;
+    union {
+        struct {
+            uint32_t tx_reset                      :    1;  /*Set this bit to reset transmitter*/
+            uint32_t tx_fifo_reset                 :    1;  /*Set this bit to reset Tx AFIFO*/
+            uint32_t tx_start                      :    1;  /*Set this bit to start transmitting data */
+            uint32_t tx_slave_mod                  :    1;  /*Set this bit to enable slave transmitter mode  */
+            uint32_t reserved4                     :    1;  /* Reserved*/
+            uint32_t tx_mono                       :    1;  /*Set this bit to enable transmitter in mono mode  */
+            uint32_t tx_chan_equal                 :    1;  /*1: The value of Left channel data is equal to the value of right channel data in I2S TX mono mode or TDM channel select mode. 0: The invalid channel data is reg_i2s_single_data in I2S TX mono mode or TDM channel select mode.*/
+            uint32_t tx_big_endian                 :    1;  /*I2S Tx byte endian, 1: low addr value to high addr.  0: low addr with low addr value.*/
+            uint32_t tx_update                     :    1;  /*Set 1 to update I2S TX registers from APB clock domain to I2S TX clock domain. This bit will be cleared by hardware after update register done.*/
+            uint32_t tx_mono_fst_vld               :    1;  /*1: The first channel data value is valid in I2S TX mono mode.   0: The second channel data value is valid in I2S TX mono mode.*/
+            uint32_t tx_pcm_conf                   :    2;  /*I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &*/
+            uint32_t tx_pcm_bypass                 :    1;  /*Set this bit to bypass  Compress/Decompress module for transmitted data.*/
+            uint32_t tx_stop_en                    :    1;  /*Set this bit to stop disable output BCK signal and WS signal when tx FIFO is emtpy*/
+            uint32_t reserved14                    :    1;  /* Reserved*/
+            uint32_t tx_left_align                 :    1;  /*1: I2S TX left alignment mode. 0: I2S TX right alignment mode.*/
+            uint32_t tx_24_fill_en                 :    1;  /*1: Sent 32 bits in 24 channel bits mode. 0: Sent 24 bits in 24 channel bits mode*/
+            uint32_t tx_ws_idle_pol                :    1;  /*0: WS should be 0 when sending left channel data, and WS is 1in right channel.  1: WS should be 1 when sending left channel data, and WS is 0in right channel. */
+            uint32_t tx_bit_order                  :    1;  /*I2S Tx bit endian. 1:small endian, the LSB is sent first. 0:big endian, the MSB is sent first.*/
+            uint32_t tx_tdm_en                     :    1;  /*1: Enable I2S TDM Tx mode . 0: Disable.*/
+            uint32_t tx_pdm_en                     :    1;  /*1: Enable I2S PDM Tx mode . 0: Disable.*/
+            uint32_t reserved21                    :    3;  /*Reserved*/
+            uint32_t tx_chan_mod                   :    3;  /*I2S transmitter channel mode configuration bits.*/
+            uint32_t sig_loopback                  :    1;  /*Enable signal loop back mode with transmitter module and receiver module sharing the same WS and BCK signals.*/
+            uint32_t reserved28                    :    4;  /*Reserve*/
+        };
+        uint32_t val;
+    } tx_conf;
+    union {
+        struct {
+            uint32_t rx_tdm_ws_width               :    7;  /* The width of rx_ws_out in TDM mode is (I2S_RX_TDM_WS_WIDTH[6:0] +1) * T_bck*/
+            uint32_t rx_bck_div_num                :    6;  /*Bit clock configuration bits in receiver mode. */
+            uint32_t rx_bits_mod                   :    5;  /*Set the bits to configure the valid data bit length of I2S receiver channel. 7: all the valid channel data is in 8-bit-mode. 15: all the valid channel data is in 16-bit-mode. 23: all the valid channel data is in 24-bit-mode. 31:all the valid channel data is in 32-bit-mode.*/
+            uint32_t rx_half_sample_bits           :    6;  /*I2S Rx half sample bits -1.*/
+            uint32_t rx_tdm_chan_bits              :    5;  /*The Rx bit number for each channel minus 1in TDM mode.*/
+            uint32_t rx_msb_shift                  :    1;  /*Set this bit to enable receiver in Phillips standard mode*/
+            uint32_t reserved30                    :    2;  /* Reserved*/
+        };
+        uint32_t val;
+    } rx_conf1;
+    union {
+        struct {
+            uint32_t tx_tdm_ws_width               :    7;  /* The width of tx_ws_out in TDM mode is (I2S_TX_TDM_WS_WIDTH[6:0] +1) * T_bck*/
+            uint32_t tx_bck_div_num                :    6;  /*Bit clock configuration bits in transmitter mode. */
+            uint32_t tx_bits_mod                   :    5;  /*Set the bits to configure the valid data bit length of I2S transmitter channel. 7: all the valid channel data is in 8-bit-mode. 15: all the valid channel data is in 16-bit-mode. 23: all the valid channel data is in 24-bit-mode. 31:all the valid channel data is in 32-bit-mode.*/
+            uint32_t tx_half_sample_bits           :    6;  /* I2S Tx half sample bits -1.*/
+            uint32_t tx_tdm_chan_bits              :    5;  /*The Tx bit number for each channel minus 1in TDM mode.*/
+            uint32_t tx_msb_shift                  :    1;  /*Set this bit to enable transmitter in Phillips standard mode*/
+            uint32_t tx_bck_no_dly                 :    1;  /*1: BCK is not delayed to generate pos/neg edge in master mode. 0: BCK is delayed to generate pos/neg edge in master mode.*/
+            uint32_t reserved31                    :    1;  /* Reserved*/
+        };
+        uint32_t val;
+    } tx_conf1;
+    union {
+        struct {
+            uint32_t rx_clkm_div_num               :    8;  /*Integral I2S clock divider value*/
+            uint32_t reserved8                     :    18;  /* Reserved*/
+            uint32_t rx_clk_active                 :    1;  /*I2S Rx module clock enable signal.*/
+            uint32_t rx_clk_sel                    :    2;  /*Select I2S Rx module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: I2S_MCLK_in.*/
+            uint32_t mclk_sel                      :    1;  /* 0: UseI2S Tx module clock as I2S_MCLK_OUT.  1: UseI2S Rx module clock as I2S_MCLK_OUT. */
+            uint32_t reserved30                    :    2;  /* Reserved*/
+        };
+        uint32_t val;
+    } rx_clkm_conf;
+    union {
+        struct {
+            uint32_t tx_clkm_div_num               :    8;  /*Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div.  So the average combination will be:  for b <= a/2, z * [x * n-div + (n+1)-div] + y * n-div. For b > a/2, z * [n-div + x * (n+1)-div] + y * (n+1)-div. */
+            uint32_t reserved8                     :    18;  /* Reserved*/
+            uint32_t tx_clk_active                 :    1;  /*I2S Tx module clock enable signal.*/
+            uint32_t tx_clk_sel                    :    2;  /*Select I2S Tx module source clock. 0: XTAL clock. 1: APLL. 2: CLK160. 3: I2S_MCLK_in.*/
+            uint32_t clk_en                        :    1;  /*Set this bit to enable clk gate*/
+            uint32_t reserved30                    :    2;  /* Reserved*/
+        };
+        uint32_t val;
+    } tx_clkm_conf;
+    union {
+        struct {
+            uint32_t rx_clkm_div_z                 :    9;  /*For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b). */
+            uint32_t rx_clkm_div_y                 :    9;  /*For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b)). */
+            uint32_t rx_clkm_div_x                 :    9;  /*For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1. */
+            uint32_t rx_clkm_div_yn1               :    1;  /*For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1. */
+            uint32_t reserved28                    :    4;  /* Reserved*/
+        };
+        uint32_t val;
+    } rx_clkm_div_conf;
+    union {
+        struct {
+            uint32_t tx_clkm_div_z                 :    9;  /*For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b). */
+            uint32_t tx_clkm_div_y                 :    9;  /*For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b)). */
+            uint32_t tx_clkm_div_x                 :    9;  /*For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1. */
+            uint32_t tx_clkm_div_yn1               :    1;  /*For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1. */
+            uint32_t reserved28                    :    4;  /* Reserved*/
+        };
+        uint32_t val;
+    } tx_clkm_div_conf;
+    union {
+        struct {
+            uint32_t tx_hp_bypass                  :    1;  /*I2S TX PDM bypass hp filter or not. The option has been removed.*/
+            uint32_t tx_sinc_osr2                  :    4;  /*I2S TX PDM OSR2 value*/
+            uint32_t tx_prescale                   :    8;  /*I2S TX PDM prescale for sigmadelta*/
+            uint32_t tx_hp_in_shift                :    2;  /*I2S TX PDM sigmadelta scale shift number: 0:/2 , 1:x1 , 2:x2 , 3: x4*/
+            uint32_t tx_lp_in_shift                :    2;  /*I2S TX PDM sigmadelta scale shift number: 0:/2 , 1:x1 , 2:x2 , 3: x4*/
+            uint32_t tx_sinc_in_shift              :    2;  /*I2S TX PDM sigmadelta scale shift number: 0:/2 , 1:x1 , 2:x2 , 3: x4*/
+            uint32_t tx_sigmadelta_in_shift        :    2;  /*I2S TX PDM sigmadelta scale shift number: 0:/2 , 1:x1 , 2:x2 , 3: x4*/
+            uint32_t tx_sigmadelta_dither2         :    1;  /*I2S TX PDM sigmadelta dither2 value*/
+            uint32_t tx_sigmadelta_dither          :    1;  /*I2S TX PDM sigmadelta dither value*/
+            uint32_t tx_dac_2out_en                :    1;  /*I2S TX PDM dac mode enable*/
+            uint32_t tx_dac_mode_en                :    1;  /*I2S TX PDM dac 2channel enable*/
+            uint32_t pcm2pdm_conv_en               :    1;  /*I2S TX PDM Converter enable*/
+            uint32_t reserved26                    :    6;  /*Reserved*/
+        };
+        uint32_t val;
+    } tx_pcm2pdm_conf;
+    union {
+        struct {
+            uint32_t tx_pdm_fp                     :    10;  /*I2S TX PDM Fp*/
+            uint32_t tx_pdm_fs                     :    10;  /*I2S TX PDM Fs*/
+            uint32_t tx_iir_hp_mult12_5            :    3;  /*The fourth parameter of PDM TX IIR_HP filter stage 2 is (504 + I2S_TX_IIR_HP_MULT12_5[2:0])*/
+            uint32_t tx_iir_hp_mult12_0            :    3;  /*The fourth parameter of PDM TX IIR_HP filter stage 1 is (504 + I2S_TX_IIR_HP_MULT12_0[2:0])*/
+            uint32_t reserved26                    :    6;  /*Reserved*/
+        };
+        uint32_t val;
+    } tx_pcm2pdm_conf1;
+    uint32_t reserved_48;
+    uint32_t reserved_4c;
+    union {
+        struct {
+            uint32_t rx_tdm_chan0_en               :    1;  /*1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan1_en               :    1;  /*1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan2_en               :    1;  /*1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan3_en               :    1;  /*1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan4_en               :    1;  /*1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan5_en               :    1;  /*1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan6_en               :    1;  /*1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan7_en               :    1;  /*1: Enable the valid data input of I2S RX TDM or PDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan8_en               :    1;  /*1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan9_en               :    1;  /*1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan10_en              :    1;  /*1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan11_en              :    1;  /*1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan12_en              :    1;  /*1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan13_en              :    1;  /*1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan14_en              :    1;  /*1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_chan15_en              :    1;  /*1: Enable the valid data input of I2S RX TDM channel $n. 0:  Disable, just input 0 in this channel.*/
+            uint32_t rx_tdm_tot_chan_num           :    4;  /*The total channel number of I2S TX TDM mode.*/
+            uint32_t reserved20                    :    12;  /* Reserved*/
+        };
+        uint32_t val;
+    } rx_tdm_ctrl;
+    union {
+        struct {
+            uint32_t tx_tdm_chan0_en               :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan1_en               :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan2_en               :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan3_en               :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan4_en               :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan5_en               :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan6_en               :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan7_en               :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan8_en               :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan9_en               :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan10_en              :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan11_en              :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan12_en              :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan13_en              :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan14_en              :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_chan15_en              :    1;  /*1: Enable the valid data output of I2S TX TDM channel $n. 0:  Disable, just output 0 in this channel.*/
+            uint32_t tx_tdm_tot_chan_num           :    4;  /*The total channel number of I2S TX TDM mode.*/
+            uint32_t tx_tdm_skip_msk_en            :    1;  /*When DMA TX buffer stores the data of (REG_TX_TDM_TOT_CHAN_NUM + 1)  channels, and only the data of the enabled channels is sent, then this bit should be set. Clear it when all the data stored in DMA TX buffer is for enabled channels.*/
+            uint32_t reserved21                    :    11;  /* Reserved*/
+        };
+        uint32_t val;
+    } tx_tdm_ctrl;
+    union {
+        struct {
+            uint32_t rx_sd_in_dm                   :    2;  /*The delay mode of I2S Rx SD input signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved2                     :    2;
+            uint32_t rx_sd1_in_dm                  :    2;  /*The delay mode of I2S Rx SD1 input signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved6                     :    2;
+            uint32_t rx_sd2_in_dm                  :    2;  /*The delay mode of I2S Rx SD2 input signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved10                    :    2;
+            uint32_t rx_sd3_in_dm                  :    2;  /*The delay mode of I2S Rx SD3 input signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved14                    :    2;
+            uint32_t rx_ws_out_dm                  :    2;  /*The delay mode of I2S Rx WS output signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved18                    :    2;  /* Reserved*/
+            uint32_t rx_bck_out_dm                 :    2;  /*The delay mode of I2S Rx BCK output signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved22                    :    2;  /* Reserved*/
+            uint32_t rx_ws_in_dm                   :    2;  /*The delay mode of I2S Rx WS input signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved26                    :    2;  /* Reserved*/
+            uint32_t rx_bck_in_dm                  :    2;  /*The delay mode of I2S Rx BCK input signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved30                    :    2;  /* Reserved*/
+        };
+        uint32_t val;
+    } rx_timing;
+    union {
+        struct {
+            uint32_t tx_sd_out_dm                  :    2;  /*The delay mode of I2S TX SD output signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved2                     :    2;  /* Reserved*/
+            uint32_t tx_sd1_out_dm                 :    2;  /*The delay mode of I2S TX SD1 output signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved6                     :    10;  /* Reserved*/
+            uint32_t tx_ws_out_dm                  :    2;  /*The delay mode of I2S TX WS output signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved18                    :    2;  /* Reserved*/
+            uint32_t tx_bck_out_dm                 :    2;  /*The delay mode of I2S TX BCK output signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved22                    :    2;  /* Reserved*/
+            uint32_t tx_ws_in_dm                   :    2;  /*The delay mode of I2S TX WS input signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved26                    :    2;  /* Reserved*/
+            uint32_t tx_bck_in_dm                  :    2;  /*The delay mode of I2S TX BCK input signal. 0: bypass. 1: delay by pos edge.  2: delay by neg edge. 3: not used.*/
+            uint32_t reserved30                    :    2;  /* Reserved*/
+        };
+        uint32_t val;
+    } tx_timing;
+    union {
+        struct {
+            uint32_t fifo_timeout                  :    8;  /*the i2s_tx_hung_int interrupt or the i2s_rx_hung_int interrupt will be triggered when fifo hung counter is equal to this value  */
+            uint32_t fifo_timeout_shift            :    3;  /*The bits are used to scale tick counter threshold. The tick counter is reset when counter value >= 88000/2^i2s_lc_fifo_timeout_shift*/
+            uint32_t fifo_timeout_ena              :    1;  /*The enable bit for FIFO timeout*/
+            uint32_t reserved12                    :    20;  /* Reserved*/
+        };
+        uint32_t val;
+    } lc_hung_conf;
+    union {
+        struct {
+            uint32_t rx_eof_num                    :    12;  /*The receive data bit length is (I2S_RX_BITS_MOD[4:0] + 1) * (REG_RX_EOF_NUM[11:0] + 1) . It will trigger in_suc_eof interrupt in the configured DMA RX channel.*/
+            uint32_t reserved12                    :    20;  /* Reserved*/
+        };
+        uint32_t val;
+    } rx_eof_num;
+    uint32_t conf_single_data;                               /*the right channel or left channel put out constant value stored in this register according to tx_chan_mod and reg_tx_msb_right*/
+    union {
+        struct {
+            uint32_t tx_idle                       :    1;  /*1: i2s_tx is idle state. 0: i2s_tx is working.*/
+            uint32_t reserved1                     :    31;  /* Reserved*/
+        };
+        uint32_t val;
+    } state;
+    uint32_t reserved_70;
+    uint32_t reserved_74;
+    uint32_t reserved_78;
+    uint32_t reserved_7c;
+    union {
+        struct {
+            uint32_t date                          :    28;  /*I2S version control register*/
+            uint32_t reserved28                    :    4;  /* Reserved*/
+        };
+        uint32_t val;
+    } date;
+} i2s_dev_t;
+extern i2s_dev_t I2S0;
+extern i2s_dev_t I2S1;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_I2S_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core0_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core0_reg.h
new file mode 100644
index 00000000000..f686720be44
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core0_reg.h
@@ -0,0 +1,871 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_INTERRUPT_CORE0_REG_H_
+#define _SOC_INTERRUPT_CORE0_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define DR_REG_INTERRUPT_CORE0_BASE                 DR_REG_INTERRUPT_BASE
+
+#define INTERRUPT_CORE0_MAC_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x000)
+/* INTERRUPT_CORE0_MAC_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_MAC_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_MAC_INTR_MAP_M  ((INTERRUPT_CORE0_MAC_INTR_MAP_V)<<(INTERRUPT_CORE0_MAC_INTR_MAP_S))
+#define INTERRUPT_CORE0_MAC_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_MAC_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_MAC_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x004)
+/* INTERRUPT_CORE0_MAC_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_MAC_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE0_MAC_NMI_MAP_M  ((INTERRUPT_CORE0_MAC_NMI_MAP_V)<<(INTERRUPT_CORE0_MAC_NMI_MAP_S))
+#define INTERRUPT_CORE0_MAC_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE0_MAC_NMI_MAP_S  0
+
+#define INTERRUPT_CORE0_PWR_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x008)
+/* INTERRUPT_CORE0_PWR_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_PWR_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_PWR_INTR_MAP_M  ((INTERRUPT_CORE0_PWR_INTR_MAP_V)<<(INTERRUPT_CORE0_PWR_INTR_MAP_S))
+#define INTERRUPT_CORE0_PWR_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_PWR_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_BB_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x00C)
+/* INTERRUPT_CORE0_BB_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_BB_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_BB_INT_MAP_M  ((INTERRUPT_CORE0_BB_INT_MAP_V)<<(INTERRUPT_CORE0_BB_INT_MAP_S))
+#define INTERRUPT_CORE0_BB_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_BB_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_BT_MAC_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x010)
+/* INTERRUPT_CORE0_BT_MAC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_BT_MAC_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_BT_MAC_INT_MAP_M  ((INTERRUPT_CORE0_BT_MAC_INT_MAP_V)<<(INTERRUPT_CORE0_BT_MAC_INT_MAP_S))
+#define INTERRUPT_CORE0_BT_MAC_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_BT_MAC_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_BT_BB_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x014)
+/* INTERRUPT_CORE0_BT_BB_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_BT_BB_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_BT_BB_INT_MAP_M  ((INTERRUPT_CORE0_BT_BB_INT_MAP_V)<<(INTERRUPT_CORE0_BT_BB_INT_MAP_S))
+#define INTERRUPT_CORE0_BT_BB_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_BT_BB_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_BT_BB_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x018)
+/* INTERRUPT_CORE0_BT_BB_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_BT_BB_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE0_BT_BB_NMI_MAP_M  ((INTERRUPT_CORE0_BT_BB_NMI_MAP_V)<<(INTERRUPT_CORE0_BT_BB_NMI_MAP_S))
+#define INTERRUPT_CORE0_BT_BB_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE0_BT_BB_NMI_MAP_S  0
+
+#define INTERRUPT_CORE0_RWBT_IRQ_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x01C)
+/* INTERRUPT_CORE0_RWBT_IRQ_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_RWBT_IRQ_MAP  0x0000001F
+#define INTERRUPT_CORE0_RWBT_IRQ_MAP_M  ((INTERRUPT_CORE0_RWBT_IRQ_MAP_V)<<(INTERRUPT_CORE0_RWBT_IRQ_MAP_S))
+#define INTERRUPT_CORE0_RWBT_IRQ_MAP_V  0x1F
+#define INTERRUPT_CORE0_RWBT_IRQ_MAP_S  0
+
+#define INTERRUPT_CORE0_RWBLE_IRQ_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x020)
+/* INTERRUPT_CORE0_RWBLE_IRQ_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_RWBLE_IRQ_MAP  0x0000001F
+#define INTERRUPT_CORE0_RWBLE_IRQ_MAP_M  ((INTERRUPT_CORE0_RWBLE_IRQ_MAP_V)<<(INTERRUPT_CORE0_RWBLE_IRQ_MAP_S))
+#define INTERRUPT_CORE0_RWBLE_IRQ_MAP_V  0x1F
+#define INTERRUPT_CORE0_RWBLE_IRQ_MAP_S  0
+
+#define INTERRUPT_CORE0_RWBT_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x024)
+/* INTERRUPT_CORE0_RWBT_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_RWBT_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE0_RWBT_NMI_MAP_M  ((INTERRUPT_CORE0_RWBT_NMI_MAP_V)<<(INTERRUPT_CORE0_RWBT_NMI_MAP_S))
+#define INTERRUPT_CORE0_RWBT_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE0_RWBT_NMI_MAP_S  0
+
+#define INTERRUPT_CORE0_RWBLE_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x028)
+/* INTERRUPT_CORE0_RWBLE_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_RWBLE_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE0_RWBLE_NMI_MAP_M  ((INTERRUPT_CORE0_RWBLE_NMI_MAP_V)<<(INTERRUPT_CORE0_RWBLE_NMI_MAP_S))
+#define INTERRUPT_CORE0_RWBLE_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE0_RWBLE_NMI_MAP_S  0
+
+#define INTERRUPT_CORE0_I2C_MST_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x02C)
+/* INTERRUPT_CORE0_I2C_MST_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_I2C_MST_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_I2C_MST_INT_MAP_M  ((INTERRUPT_CORE0_I2C_MST_INT_MAP_V)<<(INTERRUPT_CORE0_I2C_MST_INT_MAP_S))
+#define INTERRUPT_CORE0_I2C_MST_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_I2C_MST_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_SLC0_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x030)
+/* INTERRUPT_CORE0_SLC0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SLC0_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_SLC0_INTR_MAP_M  ((INTERRUPT_CORE0_SLC0_INTR_MAP_V)<<(INTERRUPT_CORE0_SLC0_INTR_MAP_S))
+#define INTERRUPT_CORE0_SLC0_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_SLC0_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_SLC1_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x034)
+/* INTERRUPT_CORE0_SLC1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SLC1_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_SLC1_INTR_MAP_M  ((INTERRUPT_CORE0_SLC1_INTR_MAP_V)<<(INTERRUPT_CORE0_SLC1_INTR_MAP_S))
+#define INTERRUPT_CORE0_SLC1_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_SLC1_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_UHCI0_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x038)
+/* INTERRUPT_CORE0_UHCI0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_UHCI0_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_UHCI0_INTR_MAP_M  ((INTERRUPT_CORE0_UHCI0_INTR_MAP_V)<<(INTERRUPT_CORE0_UHCI0_INTR_MAP_S))
+#define INTERRUPT_CORE0_UHCI0_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_UHCI0_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_UHCI1_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x03C)
+/* INTERRUPT_CORE0_UHCI1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_UHCI1_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_UHCI1_INTR_MAP_M  ((INTERRUPT_CORE0_UHCI1_INTR_MAP_V)<<(INTERRUPT_CORE0_UHCI1_INTR_MAP_S))
+#define INTERRUPT_CORE0_UHCI1_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_UHCI1_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x040)
+/* INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_MAP  0x0000001F
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_MAP_M  ((INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_MAP_V)<<(INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_MAP_S))
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_MAP_V  0x1F
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_MAP_S  0
+
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x044)
+/* INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_NMI_MAP_M  ((INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_NMI_MAP_V)<<(INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_NMI_MAP_S))
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_PRO_NMI_MAP_S  0
+
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_APP_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x048)
+/* INTERRUPT_CORE0_GPIO_INTERRUPT_APP_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_APP_MAP  0x0000001F
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_APP_MAP_M  ((INTERRUPT_CORE0_GPIO_INTERRUPT_APP_MAP_V)<<(INTERRUPT_CORE0_GPIO_INTERRUPT_APP_MAP_S))
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_APP_MAP_V  0x1F
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_APP_MAP_S  0
+
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_APP_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x04C)
+/* INTERRUPT_CORE0_GPIO_INTERRUPT_APP_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_APP_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_APP_NMI_MAP_M  ((INTERRUPT_CORE0_GPIO_INTERRUPT_APP_NMI_MAP_V)<<(INTERRUPT_CORE0_GPIO_INTERRUPT_APP_NMI_MAP_S))
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_APP_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE0_GPIO_INTERRUPT_APP_NMI_MAP_S  0
+
+#define INTERRUPT_CORE0_SPI_INTR_1_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x050)
+/* INTERRUPT_CORE0_SPI_INTR_1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SPI_INTR_1_MAP  0x0000001F
+#define INTERRUPT_CORE0_SPI_INTR_1_MAP_M  ((INTERRUPT_CORE0_SPI_INTR_1_MAP_V)<<(INTERRUPT_CORE0_SPI_INTR_1_MAP_S))
+#define INTERRUPT_CORE0_SPI_INTR_1_MAP_V  0x1F
+#define INTERRUPT_CORE0_SPI_INTR_1_MAP_S  0
+
+#define INTERRUPT_CORE0_SPI_INTR_2_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x054)
+/* INTERRUPT_CORE0_SPI_INTR_2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SPI_INTR_2_MAP  0x0000001F
+#define INTERRUPT_CORE0_SPI_INTR_2_MAP_M  ((INTERRUPT_CORE0_SPI_INTR_2_MAP_V)<<(INTERRUPT_CORE0_SPI_INTR_2_MAP_S))
+#define INTERRUPT_CORE0_SPI_INTR_2_MAP_V  0x1F
+#define INTERRUPT_CORE0_SPI_INTR_2_MAP_S  0
+
+#define INTERRUPT_CORE0_SPI_INTR_3_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x058)
+/* INTERRUPT_CORE0_SPI_INTR_3_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SPI_INTR_3_MAP  0x0000001F
+#define INTERRUPT_CORE0_SPI_INTR_3_MAP_M  ((INTERRUPT_CORE0_SPI_INTR_3_MAP_V)<<(INTERRUPT_CORE0_SPI_INTR_3_MAP_S))
+#define INTERRUPT_CORE0_SPI_INTR_3_MAP_V  0x1F
+#define INTERRUPT_CORE0_SPI_INTR_3_MAP_S  0
+
+#define INTERRUPT_CORE0_SPI_INTR_4_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x05C)
+/* INTERRUPT_CORE0_SPI_INTR_4_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SPI_INTR_4_MAP  0x0000001F
+#define INTERRUPT_CORE0_SPI_INTR_4_MAP_M  ((INTERRUPT_CORE0_SPI_INTR_4_MAP_V)<<(INTERRUPT_CORE0_SPI_INTR_4_MAP_S))
+#define INTERRUPT_CORE0_SPI_INTR_4_MAP_V  0x1F
+#define INTERRUPT_CORE0_SPI_INTR_4_MAP_S  0
+
+#define INTERRUPT_CORE0_LCD_CAM_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x060)
+/* INTERRUPT_CORE0_LCD_CAM_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_LCD_CAM_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_LCD_CAM_INT_MAP_M  ((INTERRUPT_CORE0_LCD_CAM_INT_MAP_V)<<(INTERRUPT_CORE0_LCD_CAM_INT_MAP_S))
+#define INTERRUPT_CORE0_LCD_CAM_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_LCD_CAM_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_I2S0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x064)
+/* INTERRUPT_CORE0_I2S0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_I2S0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_I2S0_INT_MAP_M  ((INTERRUPT_CORE0_I2S0_INT_MAP_V)<<(INTERRUPT_CORE0_I2S0_INT_MAP_S))
+#define INTERRUPT_CORE0_I2S0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_I2S0_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_I2S1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x068)
+/* INTERRUPT_CORE0_I2S1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_I2S1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_I2S1_INT_MAP_M  ((INTERRUPT_CORE0_I2S1_INT_MAP_V)<<(INTERRUPT_CORE0_I2S1_INT_MAP_S))
+#define INTERRUPT_CORE0_I2S1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_I2S1_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_UART_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x06C)
+/* INTERRUPT_CORE0_UART_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_UART_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_UART_INTR_MAP_M  ((INTERRUPT_CORE0_UART_INTR_MAP_V)<<(INTERRUPT_CORE0_UART_INTR_MAP_S))
+#define INTERRUPT_CORE0_UART_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_UART_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_UART1_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x070)
+/* INTERRUPT_CORE0_UART1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_UART1_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_UART1_INTR_MAP_M  ((INTERRUPT_CORE0_UART1_INTR_MAP_V)<<(INTERRUPT_CORE0_UART1_INTR_MAP_S))
+#define INTERRUPT_CORE0_UART1_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_UART1_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_UART2_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x074)
+/* INTERRUPT_CORE0_UART2_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_UART2_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_UART2_INTR_MAP_M  ((INTERRUPT_CORE0_UART2_INTR_MAP_V)<<(INTERRUPT_CORE0_UART2_INTR_MAP_S))
+#define INTERRUPT_CORE0_UART2_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_UART2_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_SDIO_HOST_INTERRUPT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x078)
+/* INTERRUPT_CORE0_SDIO_HOST_INTERRUPT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SDIO_HOST_INTERRUPT_MAP  0x0000001F
+#define INTERRUPT_CORE0_SDIO_HOST_INTERRUPT_MAP_M  ((INTERRUPT_CORE0_SDIO_HOST_INTERRUPT_MAP_V)<<(INTERRUPT_CORE0_SDIO_HOST_INTERRUPT_MAP_S))
+#define INTERRUPT_CORE0_SDIO_HOST_INTERRUPT_MAP_V  0x1F
+#define INTERRUPT_CORE0_SDIO_HOST_INTERRUPT_MAP_S  0
+
+#define INTERRUPT_CORE0_PWM0_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x07C)
+/* INTERRUPT_CORE0_PWM0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_PWM0_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_PWM0_INTR_MAP_M  ((INTERRUPT_CORE0_PWM0_INTR_MAP_V)<<(INTERRUPT_CORE0_PWM0_INTR_MAP_S))
+#define INTERRUPT_CORE0_PWM0_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_PWM0_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_PWM1_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x080)
+/* INTERRUPT_CORE0_PWM1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_PWM1_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_PWM1_INTR_MAP_M  ((INTERRUPT_CORE0_PWM1_INTR_MAP_V)<<(INTERRUPT_CORE0_PWM1_INTR_MAP_S))
+#define INTERRUPT_CORE0_PWM1_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_PWM1_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_PWM2_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x084)
+/* INTERRUPT_CORE0_PWM2_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_PWM2_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_PWM2_INTR_MAP_M  ((INTERRUPT_CORE0_PWM2_INTR_MAP_V)<<(INTERRUPT_CORE0_PWM2_INTR_MAP_S))
+#define INTERRUPT_CORE0_PWM2_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_PWM2_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_PWM3_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x088)
+/* INTERRUPT_CORE0_PWM3_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_PWM3_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_PWM3_INTR_MAP_M  ((INTERRUPT_CORE0_PWM3_INTR_MAP_V)<<(INTERRUPT_CORE0_PWM3_INTR_MAP_S))
+#define INTERRUPT_CORE0_PWM3_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_PWM3_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_LEDC_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x08C)
+/* INTERRUPT_CORE0_LEDC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_LEDC_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_LEDC_INT_MAP_M  ((INTERRUPT_CORE0_LEDC_INT_MAP_V)<<(INTERRUPT_CORE0_LEDC_INT_MAP_S))
+#define INTERRUPT_CORE0_LEDC_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_LEDC_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_EFUSE_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x090)
+/* INTERRUPT_CORE0_EFUSE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_EFUSE_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_EFUSE_INT_MAP_M  ((INTERRUPT_CORE0_EFUSE_INT_MAP_V)<<(INTERRUPT_CORE0_EFUSE_INT_MAP_S))
+#define INTERRUPT_CORE0_EFUSE_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_EFUSE_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_CAN_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x094)
+/* INTERRUPT_CORE0_CAN_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CAN_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_CAN_INT_MAP_M  ((INTERRUPT_CORE0_CAN_INT_MAP_V)<<(INTERRUPT_CORE0_CAN_INT_MAP_S))
+#define INTERRUPT_CORE0_CAN_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_CAN_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_USB_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x098)
+/* INTERRUPT_CORE0_USB_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_USB_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_USB_INTR_MAP_M  ((INTERRUPT_CORE0_USB_INTR_MAP_V)<<(INTERRUPT_CORE0_USB_INTR_MAP_S))
+#define INTERRUPT_CORE0_USB_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_USB_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_RTC_CORE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x09C)
+/* INTERRUPT_CORE0_RTC_CORE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_RTC_CORE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_RTC_CORE_INTR_MAP_M  ((INTERRUPT_CORE0_RTC_CORE_INTR_MAP_V)<<(INTERRUPT_CORE0_RTC_CORE_INTR_MAP_S))
+#define INTERRUPT_CORE0_RTC_CORE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_RTC_CORE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_RMT_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0A0)
+/* INTERRUPT_CORE0_RMT_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_RMT_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_RMT_INTR_MAP_M  ((INTERRUPT_CORE0_RMT_INTR_MAP_V)<<(INTERRUPT_CORE0_RMT_INTR_MAP_S))
+#define INTERRUPT_CORE0_RMT_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_RMT_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_PCNT_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0A4)
+/* INTERRUPT_CORE0_PCNT_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_PCNT_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_PCNT_INTR_MAP_M  ((INTERRUPT_CORE0_PCNT_INTR_MAP_V)<<(INTERRUPT_CORE0_PCNT_INTR_MAP_S))
+#define INTERRUPT_CORE0_PCNT_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_PCNT_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_I2C_EXT0_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0A8)
+/* INTERRUPT_CORE0_I2C_EXT0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_I2C_EXT0_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_I2C_EXT0_INTR_MAP_M  ((INTERRUPT_CORE0_I2C_EXT0_INTR_MAP_V)<<(INTERRUPT_CORE0_I2C_EXT0_INTR_MAP_S))
+#define INTERRUPT_CORE0_I2C_EXT0_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_I2C_EXT0_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_I2C_EXT1_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0AC)
+/* INTERRUPT_CORE0_I2C_EXT1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_I2C_EXT1_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_I2C_EXT1_INTR_MAP_M  ((INTERRUPT_CORE0_I2C_EXT1_INTR_MAP_V)<<(INTERRUPT_CORE0_I2C_EXT1_INTR_MAP_S))
+#define INTERRUPT_CORE0_I2C_EXT1_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_I2C_EXT1_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_SPI2_DMA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0B0)
+/* INTERRUPT_CORE0_SPI2_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SPI2_DMA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_SPI2_DMA_INT_MAP_M  ((INTERRUPT_CORE0_SPI2_DMA_INT_MAP_V)<<(INTERRUPT_CORE0_SPI2_DMA_INT_MAP_S))
+#define INTERRUPT_CORE0_SPI2_DMA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_SPI2_DMA_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_SPI3_DMA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0B4)
+/* INTERRUPT_CORE0_SPI3_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SPI3_DMA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_SPI3_DMA_INT_MAP_M  ((INTERRUPT_CORE0_SPI3_DMA_INT_MAP_V)<<(INTERRUPT_CORE0_SPI3_DMA_INT_MAP_S))
+#define INTERRUPT_CORE0_SPI3_DMA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_SPI3_DMA_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_SPI4_DMA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0B8)
+/* INTERRUPT_CORE0_SPI4_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SPI4_DMA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_SPI4_DMA_INT_MAP_M  ((INTERRUPT_CORE0_SPI4_DMA_INT_MAP_V)<<(INTERRUPT_CORE0_SPI4_DMA_INT_MAP_S))
+#define INTERRUPT_CORE0_SPI4_DMA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_SPI4_DMA_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_WDG_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0BC)
+/* INTERRUPT_CORE0_WDG_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_WDG_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_WDG_INT_MAP_M  ((INTERRUPT_CORE0_WDG_INT_MAP_V)<<(INTERRUPT_CORE0_WDG_INT_MAP_S))
+#define INTERRUPT_CORE0_WDG_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_WDG_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_TIMER_INT1_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0C0)
+/* INTERRUPT_CORE0_TIMER_INT1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_TIMER_INT1_MAP  0x0000001F
+#define INTERRUPT_CORE0_TIMER_INT1_MAP_M  ((INTERRUPT_CORE0_TIMER_INT1_MAP_V)<<(INTERRUPT_CORE0_TIMER_INT1_MAP_S))
+#define INTERRUPT_CORE0_TIMER_INT1_MAP_V  0x1F
+#define INTERRUPT_CORE0_TIMER_INT1_MAP_S  0
+
+#define INTERRUPT_CORE0_TIMER_INT2_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0C4)
+/* INTERRUPT_CORE0_TIMER_INT2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_TIMER_INT2_MAP  0x0000001F
+#define INTERRUPT_CORE0_TIMER_INT2_MAP_M  ((INTERRUPT_CORE0_TIMER_INT2_MAP_V)<<(INTERRUPT_CORE0_TIMER_INT2_MAP_S))
+#define INTERRUPT_CORE0_TIMER_INT2_MAP_V  0x1F
+#define INTERRUPT_CORE0_TIMER_INT2_MAP_S  0
+
+#define INTERRUPT_CORE0_TG_T0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0C8)
+/* INTERRUPT_CORE0_TG_T0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_TG_T0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_TG_T0_INT_MAP_M  ((INTERRUPT_CORE0_TG_T0_INT_MAP_V)<<(INTERRUPT_CORE0_TG_T0_INT_MAP_S))
+#define INTERRUPT_CORE0_TG_T0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_TG_T0_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_TG_T1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0CC)
+/* INTERRUPT_CORE0_TG_T1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_TG_T1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_TG_T1_INT_MAP_M  ((INTERRUPT_CORE0_TG_T1_INT_MAP_V)<<(INTERRUPT_CORE0_TG_T1_INT_MAP_S))
+#define INTERRUPT_CORE0_TG_T1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_TG_T1_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_TG_WDT_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0D0)
+/* INTERRUPT_CORE0_TG_WDT_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_TG_WDT_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_TG_WDT_INT_MAP_M  ((INTERRUPT_CORE0_TG_WDT_INT_MAP_V)<<(INTERRUPT_CORE0_TG_WDT_INT_MAP_S))
+#define INTERRUPT_CORE0_TG_WDT_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_TG_WDT_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_TG1_T0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0D4)
+/* INTERRUPT_CORE0_TG1_T0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_TG1_T0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_TG1_T0_INT_MAP_M  ((INTERRUPT_CORE0_TG1_T0_INT_MAP_V)<<(INTERRUPT_CORE0_TG1_T0_INT_MAP_S))
+#define INTERRUPT_CORE0_TG1_T0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_TG1_T0_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_TG1_T1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0D8)
+/* INTERRUPT_CORE0_TG1_T1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_TG1_T1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_TG1_T1_INT_MAP_M  ((INTERRUPT_CORE0_TG1_T1_INT_MAP_V)<<(INTERRUPT_CORE0_TG1_T1_INT_MAP_S))
+#define INTERRUPT_CORE0_TG1_T1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_TG1_T1_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_TG1_WDT_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0DC)
+/* INTERRUPT_CORE0_TG1_WDT_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_TG1_WDT_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_TG1_WDT_INT_MAP_M  ((INTERRUPT_CORE0_TG1_WDT_INT_MAP_V)<<(INTERRUPT_CORE0_TG1_WDT_INT_MAP_S))
+#define INTERRUPT_CORE0_TG1_WDT_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_TG1_WDT_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_CACHE_IA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0E0)
+/* INTERRUPT_CORE0_CACHE_IA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CACHE_IA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_CACHE_IA_INT_MAP_M  ((INTERRUPT_CORE0_CACHE_IA_INT_MAP_V)<<(INTERRUPT_CORE0_CACHE_IA_INT_MAP_S))
+#define INTERRUPT_CORE0_CACHE_IA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_CACHE_IA_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_SYSTIMER_TARGET0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0E4)
+/* INTERRUPT_CORE0_SYSTIMER_TARGET0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SYSTIMER_TARGET0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_SYSTIMER_TARGET0_INT_MAP_M  ((INTERRUPT_CORE0_SYSTIMER_TARGET0_INT_MAP_V)<<(INTERRUPT_CORE0_SYSTIMER_TARGET0_INT_MAP_S))
+#define INTERRUPT_CORE0_SYSTIMER_TARGET0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_SYSTIMER_TARGET0_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_SYSTIMER_TARGET1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0E8)
+/* INTERRUPT_CORE0_SYSTIMER_TARGET1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SYSTIMER_TARGET1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_SYSTIMER_TARGET1_INT_MAP_M  ((INTERRUPT_CORE0_SYSTIMER_TARGET1_INT_MAP_V)<<(INTERRUPT_CORE0_SYSTIMER_TARGET1_INT_MAP_S))
+#define INTERRUPT_CORE0_SYSTIMER_TARGET1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_SYSTIMER_TARGET1_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_SYSTIMER_TARGET2_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0EC)
+/* INTERRUPT_CORE0_SYSTIMER_TARGET2_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SYSTIMER_TARGET2_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_SYSTIMER_TARGET2_INT_MAP_M  ((INTERRUPT_CORE0_SYSTIMER_TARGET2_INT_MAP_V)<<(INTERRUPT_CORE0_SYSTIMER_TARGET2_INT_MAP_S))
+#define INTERRUPT_CORE0_SYSTIMER_TARGET2_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_SYSTIMER_TARGET2_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_SPI_MEM_REJECT_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0F0)
+/* INTERRUPT_CORE0_SPI_MEM_REJECT_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SPI_MEM_REJECT_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_SPI_MEM_REJECT_INTR_MAP_M  ((INTERRUPT_CORE0_SPI_MEM_REJECT_INTR_MAP_V)<<(INTERRUPT_CORE0_SPI_MEM_REJECT_INTR_MAP_S))
+#define INTERRUPT_CORE0_SPI_MEM_REJECT_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_SPI_MEM_REJECT_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_DCACHE_PRELOAD_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0F4)
+/* INTERRUPT_CORE0_DCACHE_PRELOAD_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DCACHE_PRELOAD_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DCACHE_PRELOAD_INT_MAP_M  ((INTERRUPT_CORE0_DCACHE_PRELOAD_INT_MAP_V)<<(INTERRUPT_CORE0_DCACHE_PRELOAD_INT_MAP_S))
+#define INTERRUPT_CORE0_DCACHE_PRELOAD_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DCACHE_PRELOAD_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_ICACHE_PRELOAD_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0F8)
+/* INTERRUPT_CORE0_ICACHE_PRELOAD_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_ICACHE_PRELOAD_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_ICACHE_PRELOAD_INT_MAP_M  ((INTERRUPT_CORE0_ICACHE_PRELOAD_INT_MAP_V)<<(INTERRUPT_CORE0_ICACHE_PRELOAD_INT_MAP_S))
+#define INTERRUPT_CORE0_ICACHE_PRELOAD_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_ICACHE_PRELOAD_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DCACHE_SYNC_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x0FC)
+/* INTERRUPT_CORE0_DCACHE_SYNC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DCACHE_SYNC_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DCACHE_SYNC_INT_MAP_M  ((INTERRUPT_CORE0_DCACHE_SYNC_INT_MAP_V)<<(INTERRUPT_CORE0_DCACHE_SYNC_INT_MAP_S))
+#define INTERRUPT_CORE0_DCACHE_SYNC_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DCACHE_SYNC_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_ICACHE_SYNC_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x100)
+/* INTERRUPT_CORE0_ICACHE_SYNC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_ICACHE_SYNC_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_ICACHE_SYNC_INT_MAP_M  ((INTERRUPT_CORE0_ICACHE_SYNC_INT_MAP_V)<<(INTERRUPT_CORE0_ICACHE_SYNC_INT_MAP_S))
+#define INTERRUPT_CORE0_ICACHE_SYNC_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_ICACHE_SYNC_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_APB_ADC_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x104)
+/* INTERRUPT_CORE0_APB_ADC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_APB_ADC_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_APB_ADC_INT_MAP_M  ((INTERRUPT_CORE0_APB_ADC_INT_MAP_V)<<(INTERRUPT_CORE0_APB_ADC_INT_MAP_S))
+#define INTERRUPT_CORE0_APB_ADC_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_APB_ADC_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_IN_CH0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x108)
+/* INTERRUPT_CORE0_DMA_IN_CH0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_IN_CH0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_IN_CH0_INT_MAP_M  ((INTERRUPT_CORE0_DMA_IN_CH0_INT_MAP_V)<<(INTERRUPT_CORE0_DMA_IN_CH0_INT_MAP_S))
+#define INTERRUPT_CORE0_DMA_IN_CH0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_IN_CH0_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_IN_CH1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x10C)
+/* INTERRUPT_CORE0_DMA_IN_CH1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_IN_CH1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_IN_CH1_INT_MAP_M  ((INTERRUPT_CORE0_DMA_IN_CH1_INT_MAP_V)<<(INTERRUPT_CORE0_DMA_IN_CH1_INT_MAP_S))
+#define INTERRUPT_CORE0_DMA_IN_CH1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_IN_CH1_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_IN_CH2_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x110)
+/* INTERRUPT_CORE0_DMA_IN_CH2_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_IN_CH2_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_IN_CH2_INT_MAP_M  ((INTERRUPT_CORE0_DMA_IN_CH2_INT_MAP_V)<<(INTERRUPT_CORE0_DMA_IN_CH2_INT_MAP_S))
+#define INTERRUPT_CORE0_DMA_IN_CH2_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_IN_CH2_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_IN_CH3_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x114)
+/* INTERRUPT_CORE0_DMA_IN_CH3_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_IN_CH3_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_IN_CH3_INT_MAP_M  ((INTERRUPT_CORE0_DMA_IN_CH3_INT_MAP_V)<<(INTERRUPT_CORE0_DMA_IN_CH3_INT_MAP_S))
+#define INTERRUPT_CORE0_DMA_IN_CH3_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_IN_CH3_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_IN_CH4_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x118)
+/* INTERRUPT_CORE0_DMA_IN_CH4_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_IN_CH4_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_IN_CH4_INT_MAP_M  ((INTERRUPT_CORE0_DMA_IN_CH4_INT_MAP_V)<<(INTERRUPT_CORE0_DMA_IN_CH4_INT_MAP_S))
+#define INTERRUPT_CORE0_DMA_IN_CH4_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_IN_CH4_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_OUT_CH0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x11C)
+/* INTERRUPT_CORE0_DMA_OUT_CH0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_OUT_CH0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_OUT_CH0_INT_MAP_M  ((INTERRUPT_CORE0_DMA_OUT_CH0_INT_MAP_V)<<(INTERRUPT_CORE0_DMA_OUT_CH0_INT_MAP_S))
+#define INTERRUPT_CORE0_DMA_OUT_CH0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_OUT_CH0_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_OUT_CH1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x120)
+/* INTERRUPT_CORE0_DMA_OUT_CH1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_OUT_CH1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_OUT_CH1_INT_MAP_M  ((INTERRUPT_CORE0_DMA_OUT_CH1_INT_MAP_V)<<(INTERRUPT_CORE0_DMA_OUT_CH1_INT_MAP_S))
+#define INTERRUPT_CORE0_DMA_OUT_CH1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_OUT_CH1_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_OUT_CH2_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x124)
+/* INTERRUPT_CORE0_DMA_OUT_CH2_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_OUT_CH2_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_OUT_CH2_INT_MAP_M  ((INTERRUPT_CORE0_DMA_OUT_CH2_INT_MAP_V)<<(INTERRUPT_CORE0_DMA_OUT_CH2_INT_MAP_S))
+#define INTERRUPT_CORE0_DMA_OUT_CH2_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_OUT_CH2_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_OUT_CH3_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x128)
+/* INTERRUPT_CORE0_DMA_OUT_CH3_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_OUT_CH3_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_OUT_CH3_INT_MAP_M  ((INTERRUPT_CORE0_DMA_OUT_CH3_INT_MAP_V)<<(INTERRUPT_CORE0_DMA_OUT_CH3_INT_MAP_S))
+#define INTERRUPT_CORE0_DMA_OUT_CH3_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_OUT_CH3_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_OUT_CH4_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x12C)
+/* INTERRUPT_CORE0_DMA_OUT_CH4_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_OUT_CH4_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_OUT_CH4_INT_MAP_M  ((INTERRUPT_CORE0_DMA_OUT_CH4_INT_MAP_V)<<(INTERRUPT_CORE0_DMA_OUT_CH4_INT_MAP_S))
+#define INTERRUPT_CORE0_DMA_OUT_CH4_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_OUT_CH4_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_RSA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x130)
+/* INTERRUPT_CORE0_RSA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_RSA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_RSA_INT_MAP_M  ((INTERRUPT_CORE0_RSA_INT_MAP_V)<<(INTERRUPT_CORE0_RSA_INT_MAP_S))
+#define INTERRUPT_CORE0_RSA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_RSA_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_AES_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x134)
+/* INTERRUPT_CORE0_AES_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_AES_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_AES_INT_MAP_M  ((INTERRUPT_CORE0_AES_INT_MAP_V)<<(INTERRUPT_CORE0_AES_INT_MAP_S))
+#define INTERRUPT_CORE0_AES_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_AES_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_SHA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x138)
+/* INTERRUPT_CORE0_SHA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_SHA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_SHA_INT_MAP_M  ((INTERRUPT_CORE0_SHA_INT_MAP_V)<<(INTERRUPT_CORE0_SHA_INT_MAP_S))
+#define INTERRUPT_CORE0_SHA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_SHA_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_0_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x13C)
+/* INTERRUPT_CORE0_CPU_INTR_FROM_CPU_0_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_0_MAP  0x0000001F
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_0_MAP_M  ((INTERRUPT_CORE0_CPU_INTR_FROM_CPU_0_MAP_V)<<(INTERRUPT_CORE0_CPU_INTR_FROM_CPU_0_MAP_S))
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_0_MAP_V  0x1F
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_0_MAP_S  0
+
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_1_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x140)
+/* INTERRUPT_CORE0_CPU_INTR_FROM_CPU_1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_1_MAP  0x0000001F
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_1_MAP_M  ((INTERRUPT_CORE0_CPU_INTR_FROM_CPU_1_MAP_V)<<(INTERRUPT_CORE0_CPU_INTR_FROM_CPU_1_MAP_S))
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_1_MAP_V  0x1F
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_1_MAP_S  0
+
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_2_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x144)
+/* INTERRUPT_CORE0_CPU_INTR_FROM_CPU_2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_2_MAP  0x0000001F
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_2_MAP_M  ((INTERRUPT_CORE0_CPU_INTR_FROM_CPU_2_MAP_V)<<(INTERRUPT_CORE0_CPU_INTR_FROM_CPU_2_MAP_S))
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_2_MAP_V  0x1F
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_2_MAP_S  0
+
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_3_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x148)
+/* INTERRUPT_CORE0_CPU_INTR_FROM_CPU_3_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_3_MAP  0x0000001F
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_3_MAP_M  ((INTERRUPT_CORE0_CPU_INTR_FROM_CPU_3_MAP_V)<<(INTERRUPT_CORE0_CPU_INTR_FROM_CPU_3_MAP_S))
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_3_MAP_V  0x1F
+#define INTERRUPT_CORE0_CPU_INTR_FROM_CPU_3_MAP_S  0
+
+#define INTERRUPT_CORE0_ASSIST_DEBUG_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x14C)
+/* INTERRUPT_CORE0_ASSIST_DEBUG_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_ASSIST_DEBUG_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_ASSIST_DEBUG_INTR_MAP_M  ((INTERRUPT_CORE0_ASSIST_DEBUG_INTR_MAP_V)<<(INTERRUPT_CORE0_ASSIST_DEBUG_INTR_MAP_S))
+#define INTERRUPT_CORE0_ASSIST_DEBUG_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_ASSIST_DEBUG_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x150)
+/* INTERRUPT_CORE0_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE0_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE0_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE0_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x154)
+/* INTERRUPT_CORE0_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE0_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE0_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE0_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x158)
+/* INTERRUPT_CORE0_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE0_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE0_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE0_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x15C)
+/* INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x160)
+/* INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_M  ((INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_V)<<(INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_S))
+#define INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x164)
+/* INTERRUPT_CORE0_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE0_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE0_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE0_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x168)
+/* INTERRUPT_CORE0_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE0_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE0_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE0_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x16C)
+/* INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x170)
+/* INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_M  ((INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_V)<<(INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_S))
+#define INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_BACKUP_PMS_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x174)
+/* INTERRUPT_CORE0_BACKUP_PMS_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_BACKUP_PMS_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE0_BACKUP_PMS_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE0_BACKUP_PMS_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE0_BACKUP_PMS_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE0_BACKUP_PMS_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE0_BACKUP_PMS_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE0_CACHE_CORE0_ACS_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x178)
+/* INTERRUPT_CORE0_CACHE_CORE0_ACS_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CACHE_CORE0_ACS_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_CACHE_CORE0_ACS_INT_MAP_M  ((INTERRUPT_CORE0_CACHE_CORE0_ACS_INT_MAP_V)<<(INTERRUPT_CORE0_CACHE_CORE0_ACS_INT_MAP_S))
+#define INTERRUPT_CORE0_CACHE_CORE0_ACS_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_CACHE_CORE0_ACS_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_CACHE_CORE1_ACS_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x17C)
+/* INTERRUPT_CORE0_CACHE_CORE1_ACS_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_CACHE_CORE1_ACS_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_CACHE_CORE1_ACS_INT_MAP_M  ((INTERRUPT_CORE0_CACHE_CORE1_ACS_INT_MAP_V)<<(INTERRUPT_CORE0_CACHE_CORE1_ACS_INT_MAP_S))
+#define INTERRUPT_CORE0_CACHE_CORE1_ACS_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_CACHE_CORE1_ACS_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_USB_DEVICE_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x180)
+/* INTERRUPT_CORE0_USB_DEVICE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_USB_DEVICE_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_USB_DEVICE_INT_MAP_M  ((INTERRUPT_CORE0_USB_DEVICE_INT_MAP_V)<<(INTERRUPT_CORE0_USB_DEVICE_INT_MAP_S))
+#define INTERRUPT_CORE0_USB_DEVICE_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_USB_DEVICE_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_PERI_BACKUP_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x184)
+/* INTERRUPT_CORE0_PERI_BACKUP_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_PERI_BACKUP_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_PERI_BACKUP_INT_MAP_M  ((INTERRUPT_CORE0_PERI_BACKUP_INT_MAP_V)<<(INTERRUPT_CORE0_PERI_BACKUP_INT_MAP_S))
+#define INTERRUPT_CORE0_PERI_BACKUP_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_PERI_BACKUP_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_DMA_EXTMEM_REJECT_INT_MAP_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x188)
+/* INTERRUPT_CORE0_DMA_EXTMEM_REJECT_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE0_DMA_EXTMEM_REJECT_INT_MAP  0x0000001F
+#define INTERRUPT_CORE0_DMA_EXTMEM_REJECT_INT_MAP_M  ((INTERRUPT_CORE0_DMA_EXTMEM_REJECT_INT_MAP_V)<<(INTERRUPT_CORE0_DMA_EXTMEM_REJECT_INT_MAP_S))
+#define INTERRUPT_CORE0_DMA_EXTMEM_REJECT_INT_MAP_V  0x1F
+#define INTERRUPT_CORE0_DMA_EXTMEM_REJECT_INT_MAP_S  0
+
+#define INTERRUPT_CORE0_INTR_STATUS_0_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x18C)
+/* INTERRUPT_CORE0_INTR_STATUS_0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: */
+#define INTERRUPT_CORE0_INTR_STATUS_0  0xFFFFFFFF
+#define INTERRUPT_CORE0_INTR_STATUS_0_M  ((INTERRUPT_CORE0_INTR_STATUS_0_V)<<(INTERRUPT_CORE0_INTR_STATUS_0_S))
+#define INTERRUPT_CORE0_INTR_STATUS_0_V  0xFFFFFFFF
+#define INTERRUPT_CORE0_INTR_STATUS_0_S  0
+
+#define INTERRUPT_CORE0_INTR_STATUS_1_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x190)
+/* INTERRUPT_CORE0_INTR_STATUS_1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: */
+#define INTERRUPT_CORE0_INTR_STATUS_1  0xFFFFFFFF
+#define INTERRUPT_CORE0_INTR_STATUS_1_M  ((INTERRUPT_CORE0_INTR_STATUS_1_V)<<(INTERRUPT_CORE0_INTR_STATUS_1_S))
+#define INTERRUPT_CORE0_INTR_STATUS_1_V  0xFFFFFFFF
+#define INTERRUPT_CORE0_INTR_STATUS_1_S  0
+
+#define INTERRUPT_CORE0_INTR_STATUS_2_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x194)
+/* INTERRUPT_CORE0_INTR_STATUS_2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: */
+#define INTERRUPT_CORE0_INTR_STATUS_2  0xFFFFFFFF
+#define INTERRUPT_CORE0_INTR_STATUS_2_M  ((INTERRUPT_CORE0_INTR_STATUS_2_V)<<(INTERRUPT_CORE0_INTR_STATUS_2_S))
+#define INTERRUPT_CORE0_INTR_STATUS_2_V  0xFFFFFFFF
+#define INTERRUPT_CORE0_INTR_STATUS_2_S  0
+
+#define INTERRUPT_CORE0_INTR_STATUS_3_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x198)
+/* INTERRUPT_CORE0_INTR_STATUS_3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: */
+#define INTERRUPT_CORE0_INTR_STATUS_3  0xFFFFFFFF
+#define INTERRUPT_CORE0_INTR_STATUS_3_M  ((INTERRUPT_CORE0_INTR_STATUS_3_V)<<(INTERRUPT_CORE0_INTR_STATUS_3_S))
+#define INTERRUPT_CORE0_INTR_STATUS_3_V  0xFFFFFFFF
+#define INTERRUPT_CORE0_INTR_STATUS_3_S  0
+
+#define INTERRUPT_CORE0_CLOCK_GATE_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x19c)
+/* INTERRUPT_CORE0_CLK_EN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: */
+#define INTERRUPT_CORE0_CLK_EN  (BIT(0))
+#define INTERRUPT_CORE0_CLK_EN_M  (BIT(0))
+#define INTERRUPT_CORE0_CLK_EN_V  0x1
+#define INTERRUPT_CORE0_CLK_EN_S  0
+
+#define INTERRUPT_CORE0_INTERRUPT_DATE_REG          (DR_REG_INTERRUPT_CORE0_BASE + 0x7FC)
+/* INTERRUPT_CORE0_INTERRUPT_DATE : R/W ;bitpos:[27:0] ;default: 28'h2012300 ; */
+/*description: */
+#define INTERRUPT_CORE0_INTERRUPT_DATE  0x0FFFFFFF
+#define INTERRUPT_CORE0_INTERRUPT_DATE_M  ((INTERRUPT_CORE0_INTERRUPT_DATE_V)<<(INTERRUPT_CORE0_INTERRUPT_DATE_S))
+#define INTERRUPT_CORE0_INTERRUPT_DATE_V  0xFFFFFFF
+#define INTERRUPT_CORE0_INTERRUPT_DATE_S  0
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_INTERRUPT_CORE0_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core0_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core0_struct.h
new file mode 100644
index 00000000000..aa27462fb00
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core0_struct.h
@@ -0,0 +1,1146 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_INTERRUPT_CORE0_STRUCT_H_
+#define _SOC_INTERRUPT_CORE0_STRUCT_H_
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct interrupt_core0_dev_s {
+    union {
+        struct {
+            uint32_t core0_mac_intr_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core0_mac_intr_map;
+    union {
+        struct {
+            uint32_t core0_mac_nmi_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core0_mac_nmi_map;
+    union {
+        struct {
+            uint32_t core0_pwr_intr_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core0_pwr_intr_map;
+    union {
+        struct {
+            uint32_t core0_bb_int_map: 5;
+            uint32_t reserved5:       27;
+        };
+        uint32_t val;
+    } core0_bb_int_map;
+    union {
+        struct {
+            uint32_t core0_bt_mac_int_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_bt_mac_int_map;
+    union {
+        struct {
+            uint32_t core0_bt_bb_int_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_bt_bb_int_map;
+    union {
+        struct {
+            uint32_t core0_bt_bb_nmi_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_bt_bb_nmi_map;
+    union {
+        struct {
+            uint32_t core0_rwbt_irq_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core0_rwbt_irq_map;
+    union {
+        struct {
+            uint32_t core0_rwble_irq_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_rwble_irq_map;
+    union {
+        struct {
+            uint32_t core0_rwbt_nmi_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core0_rwbt_nmi_map;
+    union {
+        struct {
+            uint32_t core0_rwble_nmi_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_rwble_nmi_map;
+    union {
+        struct {
+            uint32_t core0_i2c_mst_int_map: 5;
+            uint32_t reserved5:            27;
+        };
+        uint32_t val;
+    } core0_i2c_mst_int_map;
+    union {
+        struct {
+            uint32_t core0_slc0_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_slc0_intr_map;
+    union {
+        struct {
+            uint32_t core0_slc1_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_slc1_intr_map;
+    union {
+        struct {
+            uint32_t core0_uhci0_intr_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_uhci0_intr_map;
+    union {
+        struct {
+            uint32_t core0_uhci1_intr_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_uhci1_intr_map;
+    union {
+        struct {
+            uint32_t core0_gpio_interrupt_pro_map: 5;
+            uint32_t reserved5:                   27;
+        };
+        uint32_t val;
+    } core0_gpio_interrupt_pro_map;
+    union {
+        struct {
+            uint32_t core0_gpio_interrupt_pro_nmi_map: 5;
+            uint32_t reserved5:                       27;
+        };
+        uint32_t val;
+    } core0_gpio_interrupt_pro_nmi_map;
+    union {
+        struct {
+            uint32_t core0_gpio_interrupt_app_map: 5;
+            uint32_t reserved5:                   27;
+        };
+        uint32_t val;
+    } core0_gpio_interrupt_app_map;
+    union {
+        struct {
+            uint32_t core0_gpio_interrupt_app_nmi_map: 5;
+            uint32_t reserved5:                       27;
+        };
+        uint32_t val;
+    } core0_gpio_interrupt_app_nmi_map;
+    union {
+        struct {
+            uint32_t core0_spi_intr_1_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_spi_intr_1_map;
+    union {
+        struct {
+            uint32_t core0_spi_intr_2_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_spi_intr_2_map;
+    union {
+        struct {
+            uint32_t core0_spi_intr_3_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_spi_intr_3_map;
+    union {
+        struct {
+            uint32_t core0_spi_intr_4_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_spi_intr_4_map;
+    union {
+        struct {
+            uint32_t core0_lcd_cam_int_map: 5;
+            uint32_t reserved5:            27;
+        };
+        uint32_t val;
+    } core0_lcd_cam_int_map;
+    union {
+        struct {
+            uint32_t core0_i2s0_int_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core0_i2s0_int_map;
+    union {
+        struct {
+            uint32_t core0_i2s1_int_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core0_i2s1_int_map;
+    union {
+        struct {
+            uint32_t core0_uart_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_uart_intr_map;
+    union {
+        struct {
+            uint32_t core0_uart1_intr_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_uart1_intr_map;
+    union {
+        struct {
+            uint32_t core0_uart2_intr_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_uart2_intr_map;
+    union {
+        struct {
+            uint32_t core0_sdio_host_interrupt_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core0_sdio_host_interrupt_map;
+    union {
+        struct {
+            uint32_t core0_pwm0_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_pwm0_intr_map;
+    union {
+        struct {
+            uint32_t core0_pwm1_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_pwm1_intr_map;
+    union {
+        struct {
+            uint32_t core0_pwm2_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_pwm2_intr_map;
+    union {
+        struct {
+            uint32_t core0_pwm3_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_pwm3_intr_map;
+    union {
+        struct {
+            uint32_t core0_ledc_int_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core0_ledc_int_map;
+    union {
+        struct {
+            uint32_t core0_efuse_int_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_efuse_int_map;
+    union {
+        struct {
+            uint32_t core0_can_int_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core0_can_int_map;
+    union {
+        struct {
+            uint32_t core0_usb_intr_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core0_usb_intr_map;
+    union {
+        struct {
+            uint32_t core0_rtc_core_intr_map: 5;
+            uint32_t reserved5:              27;
+        };
+        uint32_t val;
+    } core0_rtc_core_intr_map;
+    union {
+        struct {
+            uint32_t core0_rmt_intr_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core0_rmt_intr_map;
+    union {
+        struct {
+            uint32_t core0_pcnt_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_pcnt_intr_map;
+    union {
+        struct {
+            uint32_t core0_i2c_ext0_intr_map: 5;
+            uint32_t reserved5:              27;
+        };
+        uint32_t val;
+    } core0_i2c_ext0_intr_map;
+    union {
+        struct {
+            uint32_t core0_i2c_ext1_intr_map: 5;
+            uint32_t reserved5:              27;
+        };
+        uint32_t val;
+    } core0_i2c_ext1_intr_map;
+    union {
+        struct {
+            uint32_t core0_spi2_dma_int_map: 5;
+            uint32_t reserved5:             27;
+        };
+        uint32_t val;
+    } core0_spi2_dma_int_map;
+    union {
+        struct {
+            uint32_t core0_spi3_dma_int_map: 5;
+            uint32_t reserved5:             27;
+        };
+        uint32_t val;
+    } core0_spi3_dma_int_map;
+    union {
+        struct {
+            uint32_t core0_spi4_dma_int_map: 5;
+            uint32_t reserved5:             27;
+        };
+        uint32_t val;
+    } core0_spi4_dma_int_map;
+    union {
+        struct {
+            uint32_t core0_wdg_int_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core0_wdg_int_map;
+    union {
+        struct {
+            uint32_t core0_timer_int1_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_timer_int1_map;
+    union {
+        struct {
+            uint32_t core0_timer_int2_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_timer_int2_map;
+    union {
+        struct {
+            uint32_t core0_tg_t0_int_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_tg_t0_int_map;
+    union {
+        struct {
+            uint32_t core0_tg_t1_int_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core0_tg_t1_int_map;
+    union {
+        struct {
+            uint32_t core0_tg_wdt_int_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_tg_wdt_int_map;
+    union {
+        struct {
+            uint32_t core0_tg1_t0_int_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_tg1_t0_int_map;
+    union {
+        struct {
+            uint32_t core0_tg1_t1_int_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core0_tg1_t1_int_map;
+    union {
+        struct {
+            uint32_t core0_tg1_wdt_int_map: 5;
+            uint32_t reserved5:            27;
+        };
+        uint32_t val;
+    } core0_tg1_wdt_int_map;
+    union {
+        struct {
+            uint32_t core0_cache_ia_int_map: 5;
+            uint32_t reserved5:             27;
+        };
+        uint32_t val;
+    } core0_cache_ia_int_map;
+    union {
+        struct {
+            uint32_t core0_systimer_target0_int_map: 5;
+            uint32_t reserved5:                     27;
+        };
+        uint32_t val;
+    } core0_systimer_target0_int_map;
+    union {
+        struct {
+            uint32_t core0_systimer_target1_int_map: 5;
+            uint32_t reserved5:                     27;
+        };
+        uint32_t val;
+    } core0_systimer_target1_int_map;
+    union {
+        struct {
+            uint32_t core0_systimer_target2_int_map: 5;
+            uint32_t reserved5:                     27;
+        };
+        uint32_t val;
+    } core0_systimer_target2_int_map;
+    union {
+        struct {
+            uint32_t core0_spi_mem_reject_intr_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core0_spi_mem_reject_intr_map;
+    union {
+        struct {
+            uint32_t core0_dcache_preload_int_map: 5;
+            uint32_t reserved5:                   27;
+        };
+        uint32_t val;
+    } core0_dcache_preload_int_map;
+    union {
+        struct {
+            uint32_t core0_icache_preload_int_map: 5;
+            uint32_t reserved5:                   27;
+        };
+        uint32_t val;
+    } core0_icache_preload_int_map;
+    union {
+        struct {
+            uint32_t core0_dcache_sync_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core0_dcache_sync_int_map;
+    union {
+        struct {
+            uint32_t core0_icache_sync_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core0_icache_sync_int_map;
+    union {
+        struct {
+            uint32_t core0_apb_adc_int_map: 5;
+            uint32_t reserved5:            27;
+        };
+        uint32_t val;
+    } core0_apb_adc_int_map;
+    union {
+        struct {
+            uint32_t core0_dma_in_ch0_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core0_dma_in_ch0_int_map;
+    union {
+        struct {
+            uint32_t core0_dma_in_ch1_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core0_dma_in_ch1_int_map;
+    union {
+        struct {
+            uint32_t core0_dma_in_ch2_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core0_dma_in_ch2_int_map;
+    union {
+        struct {
+            uint32_t core0_dma_in_ch3_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core0_dma_in_ch3_int_map;
+    union {
+        struct {
+            uint32_t core0_dma_in_ch4_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core0_dma_in_ch4_int_map;
+    union {
+        struct {
+            uint32_t core0_dma_out_ch0_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core0_dma_out_ch0_int_map;
+    union {
+        struct {
+            uint32_t core0_dma_out_ch1_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core0_dma_out_ch1_int_map;
+    union {
+        struct {
+            uint32_t core0_dma_out_ch2_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core0_dma_out_ch2_int_map;
+    union {
+        struct {
+            uint32_t core0_dma_out_ch3_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core0_dma_out_ch3_int_map;
+    union {
+        struct {
+            uint32_t core0_dma_out_ch4_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core0_dma_out_ch4_int_map;
+    union {
+        struct {
+            uint32_t core0_rsa_int_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core0_rsa_int_map;
+    union {
+        struct {
+            uint32_t core0_aes_int_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core0_aes_int_map;
+    union {
+        struct {
+            uint32_t core0_sha_int_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core0_sha_int_map;
+    union {
+        struct {
+            uint32_t core0_cpu_intr_from_cpu_0_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core0_cpu_intr_from_cpu_0_map;
+    union {
+        struct {
+            uint32_t core0_cpu_intr_from_cpu_1_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core0_cpu_intr_from_cpu_1_map;
+    union {
+        struct {
+            uint32_t core0_cpu_intr_from_cpu_2_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core0_cpu_intr_from_cpu_2_map;
+    union {
+        struct {
+            uint32_t core0_cpu_intr_from_cpu_3_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core0_cpu_intr_from_cpu_3_map;
+    union {
+        struct {
+            uint32_t core0_assist_debug_intr_map: 5;
+            uint32_t reserved5:                  27;
+        };
+        uint32_t val;
+    } core0_assist_debug_intr_map;
+    union {
+        struct {
+            uint32_t core0_dma_apbperi_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                     27;
+        };
+        uint32_t val;
+    } core0_dma_apbperi_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core0_core_0_iram0_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                      27;
+        };
+        uint32_t val;
+    } core0_core_0_iram0_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core0_core_0_dram0_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                      27;
+        };
+        uint32_t val;
+    } core0_core_0_dram0_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core0_core_0_pif_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                    27;
+        };
+        uint32_t val;
+    } core0_core_0_pif_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core0_core_0_pif_pms_monitor_violate_size_intr_map: 5;
+            uint32_t reserved5:                                         27;
+        };
+        uint32_t val;
+    } core0_core_0_pif_pms_monitor_violate_size_intr_map;
+    union {
+        struct {
+            uint32_t core0_core_1_iram0_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                      27;
+        };
+        uint32_t val;
+    } core0_core_1_iram0_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core0_core_1_dram0_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                      27;
+        };
+        uint32_t val;
+    } core0_core_1_dram0_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core0_core_1_pif_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                    27;
+        };
+        uint32_t val;
+    } core0_core_1_pif_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core0_core_1_pif_pms_monitor_violate_size_intr_map: 5;
+            uint32_t reserved5:                                         27;
+        };
+        uint32_t val;
+    } core0_core_1_pif_pms_monitor_violate_size_intr_map;
+    union {
+        struct {
+            uint32_t core0_backup_pms_violate_intr_map: 5;
+            uint32_t reserved5:                        27;
+        };
+        uint32_t val;
+    } core0_backup_pms_violate_intr_map;
+    union {
+        struct {
+            uint32_t core0_cache_core0_acs_int_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core0_cache_core0_acs_int_map;
+    union {
+        struct {
+            uint32_t core0_cache_core1_acs_int_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core0_cache_core1_acs_int_map;
+    union {
+        struct {
+            uint32_t core0_usb_device_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core0_usb_device_int_map;
+    union {
+        struct {
+            uint32_t core0_peri_backup_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core0_peri_backup_int_map;
+    union {
+        struct {
+            uint32_t core0_dma_extmem_reject_int_map: 5;
+            uint32_t reserved5:                      27;
+        };
+        uint32_t val;
+    } core0_dma_extmem_reject_int_map;
+    uint32_t core0_intr_status_0;                                             /**/
+    uint32_t core0_intr_status_1;                                             /**/
+    uint32_t core0_intr_status_2;                                             /**/
+    uint32_t core0_intr_status_3;                                             /**/
+    union {
+        struct {
+            uint32_t core0_clk_en: 1;
+            uint32_t reserved1:   31;
+        };
+        uint32_t val;
+    } core0_clock_gate;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    uint32_t reserved_1fc;
+    uint32_t reserved_200;
+    uint32_t reserved_204;
+    uint32_t reserved_208;
+    uint32_t reserved_20c;
+    uint32_t reserved_210;
+    uint32_t reserved_214;
+    uint32_t reserved_218;
+    uint32_t reserved_21c;
+    uint32_t reserved_220;
+    uint32_t reserved_224;
+    uint32_t reserved_228;
+    uint32_t reserved_22c;
+    uint32_t reserved_230;
+    uint32_t reserved_234;
+    uint32_t reserved_238;
+    uint32_t reserved_23c;
+    uint32_t reserved_240;
+    uint32_t reserved_244;
+    uint32_t reserved_248;
+    uint32_t reserved_24c;
+    uint32_t reserved_250;
+    uint32_t reserved_254;
+    uint32_t reserved_258;
+    uint32_t reserved_25c;
+    uint32_t reserved_260;
+    uint32_t reserved_264;
+    uint32_t reserved_268;
+    uint32_t reserved_26c;
+    uint32_t reserved_270;
+    uint32_t reserved_274;
+    uint32_t reserved_278;
+    uint32_t reserved_27c;
+    uint32_t reserved_280;
+    uint32_t reserved_284;
+    uint32_t reserved_288;
+    uint32_t reserved_28c;
+    uint32_t reserved_290;
+    uint32_t reserved_294;
+    uint32_t reserved_298;
+    uint32_t reserved_29c;
+    uint32_t reserved_2a0;
+    uint32_t reserved_2a4;
+    uint32_t reserved_2a8;
+    uint32_t reserved_2ac;
+    uint32_t reserved_2b0;
+    uint32_t reserved_2b4;
+    uint32_t reserved_2b8;
+    uint32_t reserved_2bc;
+    uint32_t reserved_2c0;
+    uint32_t reserved_2c4;
+    uint32_t reserved_2c8;
+    uint32_t reserved_2cc;
+    uint32_t reserved_2d0;
+    uint32_t reserved_2d4;
+    uint32_t reserved_2d8;
+    uint32_t reserved_2dc;
+    uint32_t reserved_2e0;
+    uint32_t reserved_2e4;
+    uint32_t reserved_2e8;
+    uint32_t reserved_2ec;
+    uint32_t reserved_2f0;
+    uint32_t reserved_2f4;
+    uint32_t reserved_2f8;
+    uint32_t reserved_2fc;
+    uint32_t reserved_300;
+    uint32_t reserved_304;
+    uint32_t reserved_308;
+    uint32_t reserved_30c;
+    uint32_t reserved_310;
+    uint32_t reserved_314;
+    uint32_t reserved_318;
+    uint32_t reserved_31c;
+    uint32_t reserved_320;
+    uint32_t reserved_324;
+    uint32_t reserved_328;
+    uint32_t reserved_32c;
+    uint32_t reserved_330;
+    uint32_t reserved_334;
+    uint32_t reserved_338;
+    uint32_t reserved_33c;
+    uint32_t reserved_340;
+    uint32_t reserved_344;
+    uint32_t reserved_348;
+    uint32_t reserved_34c;
+    uint32_t reserved_350;
+    uint32_t reserved_354;
+    uint32_t reserved_358;
+    uint32_t reserved_35c;
+    uint32_t reserved_360;
+    uint32_t reserved_364;
+    uint32_t reserved_368;
+    uint32_t reserved_36c;
+    uint32_t reserved_370;
+    uint32_t reserved_374;
+    uint32_t reserved_378;
+    uint32_t reserved_37c;
+    uint32_t reserved_380;
+    uint32_t reserved_384;
+    uint32_t reserved_388;
+    uint32_t reserved_38c;
+    uint32_t reserved_390;
+    uint32_t reserved_394;
+    uint32_t reserved_398;
+    uint32_t reserved_39c;
+    uint32_t reserved_3a0;
+    uint32_t reserved_3a4;
+    uint32_t reserved_3a8;
+    uint32_t reserved_3ac;
+    uint32_t reserved_3b0;
+    uint32_t reserved_3b4;
+    uint32_t reserved_3b8;
+    uint32_t reserved_3bc;
+    uint32_t reserved_3c0;
+    uint32_t reserved_3c4;
+    uint32_t reserved_3c8;
+    uint32_t reserved_3cc;
+    uint32_t reserved_3d0;
+    uint32_t reserved_3d4;
+    uint32_t reserved_3d8;
+    uint32_t reserved_3dc;
+    uint32_t reserved_3e0;
+    uint32_t reserved_3e4;
+    uint32_t reserved_3e8;
+    uint32_t reserved_3ec;
+    uint32_t reserved_3f0;
+    uint32_t reserved_3f4;
+    uint32_t reserved_3f8;
+    uint32_t reserved_3fc;
+    uint32_t reserved_400;
+    uint32_t reserved_404;
+    uint32_t reserved_408;
+    uint32_t reserved_40c;
+    uint32_t reserved_410;
+    uint32_t reserved_414;
+    uint32_t reserved_418;
+    uint32_t reserved_41c;
+    uint32_t reserved_420;
+    uint32_t reserved_424;
+    uint32_t reserved_428;
+    uint32_t reserved_42c;
+    uint32_t reserved_430;
+    uint32_t reserved_434;
+    uint32_t reserved_438;
+    uint32_t reserved_43c;
+    uint32_t reserved_440;
+    uint32_t reserved_444;
+    uint32_t reserved_448;
+    uint32_t reserved_44c;
+    uint32_t reserved_450;
+    uint32_t reserved_454;
+    uint32_t reserved_458;
+    uint32_t reserved_45c;
+    uint32_t reserved_460;
+    uint32_t reserved_464;
+    uint32_t reserved_468;
+    uint32_t reserved_46c;
+    uint32_t reserved_470;
+    uint32_t reserved_474;
+    uint32_t reserved_478;
+    uint32_t reserved_47c;
+    uint32_t reserved_480;
+    uint32_t reserved_484;
+    uint32_t reserved_488;
+    uint32_t reserved_48c;
+    uint32_t reserved_490;
+    uint32_t reserved_494;
+    uint32_t reserved_498;
+    uint32_t reserved_49c;
+    uint32_t reserved_4a0;
+    uint32_t reserved_4a4;
+    uint32_t reserved_4a8;
+    uint32_t reserved_4ac;
+    uint32_t reserved_4b0;
+    uint32_t reserved_4b4;
+    uint32_t reserved_4b8;
+    uint32_t reserved_4bc;
+    uint32_t reserved_4c0;
+    uint32_t reserved_4c4;
+    uint32_t reserved_4c8;
+    uint32_t reserved_4cc;
+    uint32_t reserved_4d0;
+    uint32_t reserved_4d4;
+    uint32_t reserved_4d8;
+    uint32_t reserved_4dc;
+    uint32_t reserved_4e0;
+    uint32_t reserved_4e4;
+    uint32_t reserved_4e8;
+    uint32_t reserved_4ec;
+    uint32_t reserved_4f0;
+    uint32_t reserved_4f4;
+    uint32_t reserved_4f8;
+    uint32_t reserved_4fc;
+    uint32_t reserved_500;
+    uint32_t reserved_504;
+    uint32_t reserved_508;
+    uint32_t reserved_50c;
+    uint32_t reserved_510;
+    uint32_t reserved_514;
+    uint32_t reserved_518;
+    uint32_t reserved_51c;
+    uint32_t reserved_520;
+    uint32_t reserved_524;
+    uint32_t reserved_528;
+    uint32_t reserved_52c;
+    uint32_t reserved_530;
+    uint32_t reserved_534;
+    uint32_t reserved_538;
+    uint32_t reserved_53c;
+    uint32_t reserved_540;
+    uint32_t reserved_544;
+    uint32_t reserved_548;
+    uint32_t reserved_54c;
+    uint32_t reserved_550;
+    uint32_t reserved_554;
+    uint32_t reserved_558;
+    uint32_t reserved_55c;
+    uint32_t reserved_560;
+    uint32_t reserved_564;
+    uint32_t reserved_568;
+    uint32_t reserved_56c;
+    uint32_t reserved_570;
+    uint32_t reserved_574;
+    uint32_t reserved_578;
+    uint32_t reserved_57c;
+    uint32_t reserved_580;
+    uint32_t reserved_584;
+    uint32_t reserved_588;
+    uint32_t reserved_58c;
+    uint32_t reserved_590;
+    uint32_t reserved_594;
+    uint32_t reserved_598;
+    uint32_t reserved_59c;
+    uint32_t reserved_5a0;
+    uint32_t reserved_5a4;
+    uint32_t reserved_5a8;
+    uint32_t reserved_5ac;
+    uint32_t reserved_5b0;
+    uint32_t reserved_5b4;
+    uint32_t reserved_5b8;
+    uint32_t reserved_5bc;
+    uint32_t reserved_5c0;
+    uint32_t reserved_5c4;
+    uint32_t reserved_5c8;
+    uint32_t reserved_5cc;
+    uint32_t reserved_5d0;
+    uint32_t reserved_5d4;
+    uint32_t reserved_5d8;
+    uint32_t reserved_5dc;
+    uint32_t reserved_5e0;
+    uint32_t reserved_5e4;
+    uint32_t reserved_5e8;
+    uint32_t reserved_5ec;
+    uint32_t reserved_5f0;
+    uint32_t reserved_5f4;
+    uint32_t reserved_5f8;
+    uint32_t reserved_5fc;
+    uint32_t reserved_600;
+    uint32_t reserved_604;
+    uint32_t reserved_608;
+    uint32_t reserved_60c;
+    uint32_t reserved_610;
+    uint32_t reserved_614;
+    uint32_t reserved_618;
+    uint32_t reserved_61c;
+    uint32_t reserved_620;
+    uint32_t reserved_624;
+    uint32_t reserved_628;
+    uint32_t reserved_62c;
+    uint32_t reserved_630;
+    uint32_t reserved_634;
+    uint32_t reserved_638;
+    uint32_t reserved_63c;
+    uint32_t reserved_640;
+    uint32_t reserved_644;
+    uint32_t reserved_648;
+    uint32_t reserved_64c;
+    uint32_t reserved_650;
+    uint32_t reserved_654;
+    uint32_t reserved_658;
+    uint32_t reserved_65c;
+    uint32_t reserved_660;
+    uint32_t reserved_664;
+    uint32_t reserved_668;
+    uint32_t reserved_66c;
+    uint32_t reserved_670;
+    uint32_t reserved_674;
+    uint32_t reserved_678;
+    uint32_t reserved_67c;
+    uint32_t reserved_680;
+    uint32_t reserved_684;
+    uint32_t reserved_688;
+    uint32_t reserved_68c;
+    uint32_t reserved_690;
+    uint32_t reserved_694;
+    uint32_t reserved_698;
+    uint32_t reserved_69c;
+    uint32_t reserved_6a0;
+    uint32_t reserved_6a4;
+    uint32_t reserved_6a8;
+    uint32_t reserved_6ac;
+    uint32_t reserved_6b0;
+    uint32_t reserved_6b4;
+    uint32_t reserved_6b8;
+    uint32_t reserved_6bc;
+    uint32_t reserved_6c0;
+    uint32_t reserved_6c4;
+    uint32_t reserved_6c8;
+    uint32_t reserved_6cc;
+    uint32_t reserved_6d0;
+    uint32_t reserved_6d4;
+    uint32_t reserved_6d8;
+    uint32_t reserved_6dc;
+    uint32_t reserved_6e0;
+    uint32_t reserved_6e4;
+    uint32_t reserved_6e8;
+    uint32_t reserved_6ec;
+    uint32_t reserved_6f0;
+    uint32_t reserved_6f4;
+    uint32_t reserved_6f8;
+    uint32_t reserved_6fc;
+    uint32_t reserved_700;
+    uint32_t reserved_704;
+    uint32_t reserved_708;
+    uint32_t reserved_70c;
+    uint32_t reserved_710;
+    uint32_t reserved_714;
+    uint32_t reserved_718;
+    uint32_t reserved_71c;
+    uint32_t reserved_720;
+    uint32_t reserved_724;
+    uint32_t reserved_728;
+    uint32_t reserved_72c;
+    uint32_t reserved_730;
+    uint32_t reserved_734;
+    uint32_t reserved_738;
+    uint32_t reserved_73c;
+    uint32_t reserved_740;
+    uint32_t reserved_744;
+    uint32_t reserved_748;
+    uint32_t reserved_74c;
+    uint32_t reserved_750;
+    uint32_t reserved_754;
+    uint32_t reserved_758;
+    uint32_t reserved_75c;
+    uint32_t reserved_760;
+    uint32_t reserved_764;
+    uint32_t reserved_768;
+    uint32_t reserved_76c;
+    uint32_t reserved_770;
+    uint32_t reserved_774;
+    uint32_t reserved_778;
+    uint32_t reserved_77c;
+    uint32_t reserved_780;
+    uint32_t reserved_784;
+    uint32_t reserved_788;
+    uint32_t reserved_78c;
+    uint32_t reserved_790;
+    uint32_t reserved_794;
+    uint32_t reserved_798;
+    uint32_t reserved_79c;
+    uint32_t reserved_7a0;
+    uint32_t reserved_7a4;
+    uint32_t reserved_7a8;
+    uint32_t reserved_7ac;
+    uint32_t reserved_7b0;
+    uint32_t reserved_7b4;
+    uint32_t reserved_7b8;
+    uint32_t reserved_7bc;
+    uint32_t reserved_7c0;
+    uint32_t reserved_7c4;
+    uint32_t reserved_7c8;
+    uint32_t reserved_7cc;
+    uint32_t reserved_7d0;
+    uint32_t reserved_7d4;
+    uint32_t reserved_7d8;
+    uint32_t reserved_7dc;
+    uint32_t reserved_7e0;
+    uint32_t reserved_7e4;
+    uint32_t reserved_7e8;
+    uint32_t reserved_7ec;
+    uint32_t reserved_7f0;
+    uint32_t reserved_7f4;
+    uint32_t reserved_7f8;
+    union {
+        struct {
+            uint32_t core0_interrupt_date:28;
+            uint32_t reserved28:           4;
+        };
+        uint32_t val;
+    } core0_interrupt_date;
+} interrupt_core0_dev_t;
+extern interrupt_core0_dev_t INTERRUPT_CORE0;
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* _SOC_INTERRUPT_CORE0_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core1_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core1_reg.h
new file mode 100644
index 00000000000..82d77e2f0d1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core1_reg.h
@@ -0,0 +1,871 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_INTERRUPT_CORE1_REG_H_
+#define _SOC_INTERRUPT_CORE1_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define DR_REG_INTERRUPT_CORE1_BASE                 DR_REG_INTERRUPT_BASE
+
+#define INTERRUPT_CORE1_MAC_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x800)
+/* INTERRUPT_CORE1_MAC_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_MAC_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_MAC_INTR_MAP_M  ((INTERRUPT_CORE1_MAC_INTR_MAP_V)<<(INTERRUPT_CORE1_MAC_INTR_MAP_S))
+#define INTERRUPT_CORE1_MAC_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_MAC_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_MAC_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x804)
+/* INTERRUPT_CORE1_MAC_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_MAC_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE1_MAC_NMI_MAP_M  ((INTERRUPT_CORE1_MAC_NMI_MAP_V)<<(INTERRUPT_CORE1_MAC_NMI_MAP_S))
+#define INTERRUPT_CORE1_MAC_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE1_MAC_NMI_MAP_S  0
+
+#define INTERRUPT_CORE1_PWR_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x808)
+/* INTERRUPT_CORE1_PWR_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_PWR_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_PWR_INTR_MAP_M  ((INTERRUPT_CORE1_PWR_INTR_MAP_V)<<(INTERRUPT_CORE1_PWR_INTR_MAP_S))
+#define INTERRUPT_CORE1_PWR_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_PWR_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_BB_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x80C)
+/* INTERRUPT_CORE1_BB_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_BB_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_BB_INT_MAP_M  ((INTERRUPT_CORE1_BB_INT_MAP_V)<<(INTERRUPT_CORE1_BB_INT_MAP_S))
+#define INTERRUPT_CORE1_BB_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_BB_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_BT_MAC_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x810)
+/* INTERRUPT_CORE1_BT_MAC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_BT_MAC_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_BT_MAC_INT_MAP_M  ((INTERRUPT_CORE1_BT_MAC_INT_MAP_V)<<(INTERRUPT_CORE1_BT_MAC_INT_MAP_S))
+#define INTERRUPT_CORE1_BT_MAC_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_BT_MAC_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_BT_BB_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x814)
+/* INTERRUPT_CORE1_BT_BB_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_BT_BB_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_BT_BB_INT_MAP_M  ((INTERRUPT_CORE1_BT_BB_INT_MAP_V)<<(INTERRUPT_CORE1_BT_BB_INT_MAP_S))
+#define INTERRUPT_CORE1_BT_BB_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_BT_BB_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_BT_BB_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x818)
+/* INTERRUPT_CORE1_BT_BB_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_BT_BB_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE1_BT_BB_NMI_MAP_M  ((INTERRUPT_CORE1_BT_BB_NMI_MAP_V)<<(INTERRUPT_CORE1_BT_BB_NMI_MAP_S))
+#define INTERRUPT_CORE1_BT_BB_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE1_BT_BB_NMI_MAP_S  0
+
+#define INTERRUPT_CORE1_RWBT_IRQ_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x81C)
+/* INTERRUPT_CORE1_RWBT_IRQ_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_RWBT_IRQ_MAP  0x0000001F
+#define INTERRUPT_CORE1_RWBT_IRQ_MAP_M  ((INTERRUPT_CORE1_RWBT_IRQ_MAP_V)<<(INTERRUPT_CORE1_RWBT_IRQ_MAP_S))
+#define INTERRUPT_CORE1_RWBT_IRQ_MAP_V  0x1F
+#define INTERRUPT_CORE1_RWBT_IRQ_MAP_S  0
+
+#define INTERRUPT_CORE1_RWBLE_IRQ_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x820)
+/* INTERRUPT_CORE1_RWBLE_IRQ_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_RWBLE_IRQ_MAP  0x0000001F
+#define INTERRUPT_CORE1_RWBLE_IRQ_MAP_M  ((INTERRUPT_CORE1_RWBLE_IRQ_MAP_V)<<(INTERRUPT_CORE1_RWBLE_IRQ_MAP_S))
+#define INTERRUPT_CORE1_RWBLE_IRQ_MAP_V  0x1F
+#define INTERRUPT_CORE1_RWBLE_IRQ_MAP_S  0
+
+#define INTERRUPT_CORE1_RWBT_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x824)
+/* INTERRUPT_CORE1_RWBT_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_RWBT_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE1_RWBT_NMI_MAP_M  ((INTERRUPT_CORE1_RWBT_NMI_MAP_V)<<(INTERRUPT_CORE1_RWBT_NMI_MAP_S))
+#define INTERRUPT_CORE1_RWBT_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE1_RWBT_NMI_MAP_S  0
+
+#define INTERRUPT_CORE1_RWBLE_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x828)
+/* INTERRUPT_CORE1_RWBLE_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_RWBLE_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE1_RWBLE_NMI_MAP_M  ((INTERRUPT_CORE1_RWBLE_NMI_MAP_V)<<(INTERRUPT_CORE1_RWBLE_NMI_MAP_S))
+#define INTERRUPT_CORE1_RWBLE_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE1_RWBLE_NMI_MAP_S  0
+
+#define INTERRUPT_CORE1_I2C_MST_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x82C)
+/* INTERRUPT_CORE1_I2C_MST_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_I2C_MST_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_I2C_MST_INT_MAP_M  ((INTERRUPT_CORE1_I2C_MST_INT_MAP_V)<<(INTERRUPT_CORE1_I2C_MST_INT_MAP_S))
+#define INTERRUPT_CORE1_I2C_MST_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_I2C_MST_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_SLC0_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x830)
+/* INTERRUPT_CORE1_SLC0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SLC0_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_SLC0_INTR_MAP_M  ((INTERRUPT_CORE1_SLC0_INTR_MAP_V)<<(INTERRUPT_CORE1_SLC0_INTR_MAP_S))
+#define INTERRUPT_CORE1_SLC0_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_SLC0_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_SLC1_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x834)
+/* INTERRUPT_CORE1_SLC1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SLC1_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_SLC1_INTR_MAP_M  ((INTERRUPT_CORE1_SLC1_INTR_MAP_V)<<(INTERRUPT_CORE1_SLC1_INTR_MAP_S))
+#define INTERRUPT_CORE1_SLC1_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_SLC1_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_UHCI0_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x838)
+/* INTERRUPT_CORE1_UHCI0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_UHCI0_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_UHCI0_INTR_MAP_M  ((INTERRUPT_CORE1_UHCI0_INTR_MAP_V)<<(INTERRUPT_CORE1_UHCI0_INTR_MAP_S))
+#define INTERRUPT_CORE1_UHCI0_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_UHCI0_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_UHCI1_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x83C)
+/* INTERRUPT_CORE1_UHCI1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_UHCI1_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_UHCI1_INTR_MAP_M  ((INTERRUPT_CORE1_UHCI1_INTR_MAP_V)<<(INTERRUPT_CORE1_UHCI1_INTR_MAP_S))
+#define INTERRUPT_CORE1_UHCI1_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_UHCI1_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x840)
+/* INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_MAP  0x0000001F
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_MAP_M  ((INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_MAP_V)<<(INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_MAP_S))
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_MAP_V  0x1F
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_MAP_S  0
+
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x844)
+/* INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_NMI_MAP_M  ((INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_NMI_MAP_V)<<(INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_NMI_MAP_S))
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_PRO_NMI_MAP_S  0
+
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_APP_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x848)
+/* INTERRUPT_CORE1_GPIO_INTERRUPT_APP_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_APP_MAP  0x0000001F
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_APP_MAP_M  ((INTERRUPT_CORE1_GPIO_INTERRUPT_APP_MAP_V)<<(INTERRUPT_CORE1_GPIO_INTERRUPT_APP_MAP_S))
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_APP_MAP_V  0x1F
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_APP_MAP_S  0
+
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_APP_NMI_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x84C)
+/* INTERRUPT_CORE1_GPIO_INTERRUPT_APP_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_APP_NMI_MAP  0x0000001F
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_APP_NMI_MAP_M  ((INTERRUPT_CORE1_GPIO_INTERRUPT_APP_NMI_MAP_V)<<(INTERRUPT_CORE1_GPIO_INTERRUPT_APP_NMI_MAP_S))
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_APP_NMI_MAP_V  0x1F
+#define INTERRUPT_CORE1_GPIO_INTERRUPT_APP_NMI_MAP_S  0
+
+#define INTERRUPT_CORE1_SPI_INTR_1_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x850)
+/* INTERRUPT_CORE1_SPI_INTR_1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SPI_INTR_1_MAP  0x0000001F
+#define INTERRUPT_CORE1_SPI_INTR_1_MAP_M  ((INTERRUPT_CORE1_SPI_INTR_1_MAP_V)<<(INTERRUPT_CORE1_SPI_INTR_1_MAP_S))
+#define INTERRUPT_CORE1_SPI_INTR_1_MAP_V  0x1F
+#define INTERRUPT_CORE1_SPI_INTR_1_MAP_S  0
+
+#define INTERRUPT_CORE1_SPI_INTR_2_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x854)
+/* INTERRUPT_CORE1_SPI_INTR_2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SPI_INTR_2_MAP  0x0000001F
+#define INTERRUPT_CORE1_SPI_INTR_2_MAP_M  ((INTERRUPT_CORE1_SPI_INTR_2_MAP_V)<<(INTERRUPT_CORE1_SPI_INTR_2_MAP_S))
+#define INTERRUPT_CORE1_SPI_INTR_2_MAP_V  0x1F
+#define INTERRUPT_CORE1_SPI_INTR_2_MAP_S  0
+
+#define INTERRUPT_CORE1_SPI_INTR_3_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x858)
+/* INTERRUPT_CORE1_SPI_INTR_3_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SPI_INTR_3_MAP  0x0000001F
+#define INTERRUPT_CORE1_SPI_INTR_3_MAP_M  ((INTERRUPT_CORE1_SPI_INTR_3_MAP_V)<<(INTERRUPT_CORE1_SPI_INTR_3_MAP_S))
+#define INTERRUPT_CORE1_SPI_INTR_3_MAP_V  0x1F
+#define INTERRUPT_CORE1_SPI_INTR_3_MAP_S  0
+
+#define INTERRUPT_CORE1_SPI_INTR_4_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x85C)
+/* INTERRUPT_CORE1_SPI_INTR_4_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SPI_INTR_4_MAP  0x0000001F
+#define INTERRUPT_CORE1_SPI_INTR_4_MAP_M  ((INTERRUPT_CORE1_SPI_INTR_4_MAP_V)<<(INTERRUPT_CORE1_SPI_INTR_4_MAP_S))
+#define INTERRUPT_CORE1_SPI_INTR_4_MAP_V  0x1F
+#define INTERRUPT_CORE1_SPI_INTR_4_MAP_S  0
+
+#define INTERRUPT_CORE1_LCD_CAM_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x860)
+/* INTERRUPT_CORE1_LCD_CAM_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_LCD_CAM_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_LCD_CAM_INT_MAP_M  ((INTERRUPT_CORE1_LCD_CAM_INT_MAP_V)<<(INTERRUPT_CORE1_LCD_CAM_INT_MAP_S))
+#define INTERRUPT_CORE1_LCD_CAM_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_LCD_CAM_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_I2S0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x864)
+/* INTERRUPT_CORE1_I2S0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_I2S0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_I2S0_INT_MAP_M  ((INTERRUPT_CORE1_I2S0_INT_MAP_V)<<(INTERRUPT_CORE1_I2S0_INT_MAP_S))
+#define INTERRUPT_CORE1_I2S0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_I2S0_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_I2S1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x868)
+/* INTERRUPT_CORE1_I2S1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_I2S1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_I2S1_INT_MAP_M  ((INTERRUPT_CORE1_I2S1_INT_MAP_V)<<(INTERRUPT_CORE1_I2S1_INT_MAP_S))
+#define INTERRUPT_CORE1_I2S1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_I2S1_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_UART_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x86C)
+/* INTERRUPT_CORE1_UART_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_UART_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_UART_INTR_MAP_M  ((INTERRUPT_CORE1_UART_INTR_MAP_V)<<(INTERRUPT_CORE1_UART_INTR_MAP_S))
+#define INTERRUPT_CORE1_UART_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_UART_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_UART1_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x870)
+/* INTERRUPT_CORE1_UART1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_UART1_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_UART1_INTR_MAP_M  ((INTERRUPT_CORE1_UART1_INTR_MAP_V)<<(INTERRUPT_CORE1_UART1_INTR_MAP_S))
+#define INTERRUPT_CORE1_UART1_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_UART1_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_UART2_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x874)
+/* INTERRUPT_CORE1_UART2_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_UART2_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_UART2_INTR_MAP_M  ((INTERRUPT_CORE1_UART2_INTR_MAP_V)<<(INTERRUPT_CORE1_UART2_INTR_MAP_S))
+#define INTERRUPT_CORE1_UART2_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_UART2_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_SDIO_HOST_INTERRUPT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x878)
+/* INTERRUPT_CORE1_SDIO_HOST_INTERRUPT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SDIO_HOST_INTERRUPT_MAP  0x0000001F
+#define INTERRUPT_CORE1_SDIO_HOST_INTERRUPT_MAP_M  ((INTERRUPT_CORE1_SDIO_HOST_INTERRUPT_MAP_V)<<(INTERRUPT_CORE1_SDIO_HOST_INTERRUPT_MAP_S))
+#define INTERRUPT_CORE1_SDIO_HOST_INTERRUPT_MAP_V  0x1F
+#define INTERRUPT_CORE1_SDIO_HOST_INTERRUPT_MAP_S  0
+
+#define INTERRUPT_CORE1_PWM0_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x87C)
+/* INTERRUPT_CORE1_PWM0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_PWM0_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_PWM0_INTR_MAP_M  ((INTERRUPT_CORE1_PWM0_INTR_MAP_V)<<(INTERRUPT_CORE1_PWM0_INTR_MAP_S))
+#define INTERRUPT_CORE1_PWM0_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_PWM0_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_PWM1_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x880)
+/* INTERRUPT_CORE1_PWM1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_PWM1_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_PWM1_INTR_MAP_M  ((INTERRUPT_CORE1_PWM1_INTR_MAP_V)<<(INTERRUPT_CORE1_PWM1_INTR_MAP_S))
+#define INTERRUPT_CORE1_PWM1_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_PWM1_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_PWM2_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x884)
+/* INTERRUPT_CORE1_PWM2_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_PWM2_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_PWM2_INTR_MAP_M  ((INTERRUPT_CORE1_PWM2_INTR_MAP_V)<<(INTERRUPT_CORE1_PWM2_INTR_MAP_S))
+#define INTERRUPT_CORE1_PWM2_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_PWM2_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_PWM3_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x888)
+/* INTERRUPT_CORE1_PWM3_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_PWM3_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_PWM3_INTR_MAP_M  ((INTERRUPT_CORE1_PWM3_INTR_MAP_V)<<(INTERRUPT_CORE1_PWM3_INTR_MAP_S))
+#define INTERRUPT_CORE1_PWM3_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_PWM3_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_LEDC_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x88C)
+/* INTERRUPT_CORE1_LEDC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_LEDC_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_LEDC_INT_MAP_M  ((INTERRUPT_CORE1_LEDC_INT_MAP_V)<<(INTERRUPT_CORE1_LEDC_INT_MAP_S))
+#define INTERRUPT_CORE1_LEDC_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_LEDC_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_EFUSE_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x890)
+/* INTERRUPT_CORE1_EFUSE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_EFUSE_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_EFUSE_INT_MAP_M  ((INTERRUPT_CORE1_EFUSE_INT_MAP_V)<<(INTERRUPT_CORE1_EFUSE_INT_MAP_S))
+#define INTERRUPT_CORE1_EFUSE_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_EFUSE_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_CAN_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x894)
+/* INTERRUPT_CORE1_CAN_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CAN_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_CAN_INT_MAP_M  ((INTERRUPT_CORE1_CAN_INT_MAP_V)<<(INTERRUPT_CORE1_CAN_INT_MAP_S))
+#define INTERRUPT_CORE1_CAN_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_CAN_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_USB_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x898)
+/* INTERRUPT_CORE1_USB_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_USB_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_USB_INTR_MAP_M  ((INTERRUPT_CORE1_USB_INTR_MAP_V)<<(INTERRUPT_CORE1_USB_INTR_MAP_S))
+#define INTERRUPT_CORE1_USB_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_USB_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_RTC_CORE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x89C)
+/* INTERRUPT_CORE1_RTC_CORE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_RTC_CORE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_RTC_CORE_INTR_MAP_M  ((INTERRUPT_CORE1_RTC_CORE_INTR_MAP_V)<<(INTERRUPT_CORE1_RTC_CORE_INTR_MAP_S))
+#define INTERRUPT_CORE1_RTC_CORE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_RTC_CORE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_RMT_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8A0)
+/* INTERRUPT_CORE1_RMT_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_RMT_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_RMT_INTR_MAP_M  ((INTERRUPT_CORE1_RMT_INTR_MAP_V)<<(INTERRUPT_CORE1_RMT_INTR_MAP_S))
+#define INTERRUPT_CORE1_RMT_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_RMT_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_PCNT_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8A4)
+/* INTERRUPT_CORE1_PCNT_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_PCNT_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_PCNT_INTR_MAP_M  ((INTERRUPT_CORE1_PCNT_INTR_MAP_V)<<(INTERRUPT_CORE1_PCNT_INTR_MAP_S))
+#define INTERRUPT_CORE1_PCNT_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_PCNT_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_I2C_EXT0_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8A8)
+/* INTERRUPT_CORE1_I2C_EXT0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_I2C_EXT0_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_I2C_EXT0_INTR_MAP_M  ((INTERRUPT_CORE1_I2C_EXT0_INTR_MAP_V)<<(INTERRUPT_CORE1_I2C_EXT0_INTR_MAP_S))
+#define INTERRUPT_CORE1_I2C_EXT0_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_I2C_EXT0_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_I2C_EXT1_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8AC)
+/* INTERRUPT_CORE1_I2C_EXT1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_I2C_EXT1_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_I2C_EXT1_INTR_MAP_M  ((INTERRUPT_CORE1_I2C_EXT1_INTR_MAP_V)<<(INTERRUPT_CORE1_I2C_EXT1_INTR_MAP_S))
+#define INTERRUPT_CORE1_I2C_EXT1_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_I2C_EXT1_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_SPI2_DMA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8B0)
+/* INTERRUPT_CORE1_SPI2_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SPI2_DMA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_SPI2_DMA_INT_MAP_M  ((INTERRUPT_CORE1_SPI2_DMA_INT_MAP_V)<<(INTERRUPT_CORE1_SPI2_DMA_INT_MAP_S))
+#define INTERRUPT_CORE1_SPI2_DMA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_SPI2_DMA_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_SPI3_DMA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8B4)
+/* INTERRUPT_CORE1_SPI3_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SPI3_DMA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_SPI3_DMA_INT_MAP_M  ((INTERRUPT_CORE1_SPI3_DMA_INT_MAP_V)<<(INTERRUPT_CORE1_SPI3_DMA_INT_MAP_S))
+#define INTERRUPT_CORE1_SPI3_DMA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_SPI3_DMA_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_SPI4_DMA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8B8)
+/* INTERRUPT_CORE1_SPI4_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SPI4_DMA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_SPI4_DMA_INT_MAP_M  ((INTERRUPT_CORE1_SPI4_DMA_INT_MAP_V)<<(INTERRUPT_CORE1_SPI4_DMA_INT_MAP_S))
+#define INTERRUPT_CORE1_SPI4_DMA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_SPI4_DMA_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_WDG_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8BC)
+/* INTERRUPT_CORE1_WDG_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_WDG_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_WDG_INT_MAP_M  ((INTERRUPT_CORE1_WDG_INT_MAP_V)<<(INTERRUPT_CORE1_WDG_INT_MAP_S))
+#define INTERRUPT_CORE1_WDG_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_WDG_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_TIMER_INT1_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8C0)
+/* INTERRUPT_CORE1_TIMER_INT1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_TIMER_INT1_MAP  0x0000001F
+#define INTERRUPT_CORE1_TIMER_INT1_MAP_M  ((INTERRUPT_CORE1_TIMER_INT1_MAP_V)<<(INTERRUPT_CORE1_TIMER_INT1_MAP_S))
+#define INTERRUPT_CORE1_TIMER_INT1_MAP_V  0x1F
+#define INTERRUPT_CORE1_TIMER_INT1_MAP_S  0
+
+#define INTERRUPT_CORE1_TIMER_INT2_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8C4)
+/* INTERRUPT_CORE1_TIMER_INT2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_TIMER_INT2_MAP  0x0000001F
+#define INTERRUPT_CORE1_TIMER_INT2_MAP_M  ((INTERRUPT_CORE1_TIMER_INT2_MAP_V)<<(INTERRUPT_CORE1_TIMER_INT2_MAP_S))
+#define INTERRUPT_CORE1_TIMER_INT2_MAP_V  0x1F
+#define INTERRUPT_CORE1_TIMER_INT2_MAP_S  0
+
+#define INTERRUPT_CORE1_TG_T0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8C8)
+/* INTERRUPT_CORE1_TG_T0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_TG_T0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_TG_T0_INT_MAP_M  ((INTERRUPT_CORE1_TG_T0_INT_MAP_V)<<(INTERRUPT_CORE1_TG_T0_INT_MAP_S))
+#define INTERRUPT_CORE1_TG_T0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_TG_T0_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_TG_T1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8CC)
+/* INTERRUPT_CORE1_TG_T1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_TG_T1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_TG_T1_INT_MAP_M  ((INTERRUPT_CORE1_TG_T1_INT_MAP_V)<<(INTERRUPT_CORE1_TG_T1_INT_MAP_S))
+#define INTERRUPT_CORE1_TG_T1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_TG_T1_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_TG_WDT_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8D0)
+/* INTERRUPT_CORE1_TG_WDT_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_TG_WDT_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_TG_WDT_INT_MAP_M  ((INTERRUPT_CORE1_TG_WDT_INT_MAP_V)<<(INTERRUPT_CORE1_TG_WDT_INT_MAP_S))
+#define INTERRUPT_CORE1_TG_WDT_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_TG_WDT_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_TG1_T0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8D4)
+/* INTERRUPT_CORE1_TG1_T0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_TG1_T0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_TG1_T0_INT_MAP_M  ((INTERRUPT_CORE1_TG1_T0_INT_MAP_V)<<(INTERRUPT_CORE1_TG1_T0_INT_MAP_S))
+#define INTERRUPT_CORE1_TG1_T0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_TG1_T0_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_TG1_T1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8D8)
+/* INTERRUPT_CORE1_TG1_T1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_TG1_T1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_TG1_T1_INT_MAP_M  ((INTERRUPT_CORE1_TG1_T1_INT_MAP_V)<<(INTERRUPT_CORE1_TG1_T1_INT_MAP_S))
+#define INTERRUPT_CORE1_TG1_T1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_TG1_T1_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_TG1_WDT_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8DC)
+/* INTERRUPT_CORE1_TG1_WDT_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_TG1_WDT_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_TG1_WDT_INT_MAP_M  ((INTERRUPT_CORE1_TG1_WDT_INT_MAP_V)<<(INTERRUPT_CORE1_TG1_WDT_INT_MAP_S))
+#define INTERRUPT_CORE1_TG1_WDT_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_TG1_WDT_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_CACHE_IA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8E0)
+/* INTERRUPT_CORE1_CACHE_IA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CACHE_IA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_CACHE_IA_INT_MAP_M  ((INTERRUPT_CORE1_CACHE_IA_INT_MAP_V)<<(INTERRUPT_CORE1_CACHE_IA_INT_MAP_S))
+#define INTERRUPT_CORE1_CACHE_IA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_CACHE_IA_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_SYSTIMER_TARGET0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8E4)
+/* INTERRUPT_CORE1_SYSTIMER_TARGET0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SYSTIMER_TARGET0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_SYSTIMER_TARGET0_INT_MAP_M  ((INTERRUPT_CORE1_SYSTIMER_TARGET0_INT_MAP_V)<<(INTERRUPT_CORE1_SYSTIMER_TARGET0_INT_MAP_S))
+#define INTERRUPT_CORE1_SYSTIMER_TARGET0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_SYSTIMER_TARGET0_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_SYSTIMER_TARGET1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8E8)
+/* INTERRUPT_CORE1_SYSTIMER_TARGET1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SYSTIMER_TARGET1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_SYSTIMER_TARGET1_INT_MAP_M  ((INTERRUPT_CORE1_SYSTIMER_TARGET1_INT_MAP_V)<<(INTERRUPT_CORE1_SYSTIMER_TARGET1_INT_MAP_S))
+#define INTERRUPT_CORE1_SYSTIMER_TARGET1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_SYSTIMER_TARGET1_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_SYSTIMER_TARGET2_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8EC)
+/* INTERRUPT_CORE1_SYSTIMER_TARGET2_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SYSTIMER_TARGET2_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_SYSTIMER_TARGET2_INT_MAP_M  ((INTERRUPT_CORE1_SYSTIMER_TARGET2_INT_MAP_V)<<(INTERRUPT_CORE1_SYSTIMER_TARGET2_INT_MAP_S))
+#define INTERRUPT_CORE1_SYSTIMER_TARGET2_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_SYSTIMER_TARGET2_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_SPI_MEM_REJECT_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8F0)
+/* INTERRUPT_CORE1_SPI_MEM_REJECT_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SPI_MEM_REJECT_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_SPI_MEM_REJECT_INTR_MAP_M  ((INTERRUPT_CORE1_SPI_MEM_REJECT_INTR_MAP_V)<<(INTERRUPT_CORE1_SPI_MEM_REJECT_INTR_MAP_S))
+#define INTERRUPT_CORE1_SPI_MEM_REJECT_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_SPI_MEM_REJECT_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_DCACHE_PRELOAD_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8F4)
+/* INTERRUPT_CORE1_DCACHE_PRELOAD_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DCACHE_PRELOAD_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DCACHE_PRELOAD_INT_MAP_M  ((INTERRUPT_CORE1_DCACHE_PRELOAD_INT_MAP_V)<<(INTERRUPT_CORE1_DCACHE_PRELOAD_INT_MAP_S))
+#define INTERRUPT_CORE1_DCACHE_PRELOAD_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DCACHE_PRELOAD_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_ICACHE_PRELOAD_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8F8)
+/* INTERRUPT_CORE1_ICACHE_PRELOAD_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_ICACHE_PRELOAD_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_ICACHE_PRELOAD_INT_MAP_M  ((INTERRUPT_CORE1_ICACHE_PRELOAD_INT_MAP_V)<<(INTERRUPT_CORE1_ICACHE_PRELOAD_INT_MAP_S))
+#define INTERRUPT_CORE1_ICACHE_PRELOAD_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_ICACHE_PRELOAD_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DCACHE_SYNC_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x8FC)
+/* INTERRUPT_CORE1_DCACHE_SYNC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DCACHE_SYNC_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DCACHE_SYNC_INT_MAP_M  ((INTERRUPT_CORE1_DCACHE_SYNC_INT_MAP_V)<<(INTERRUPT_CORE1_DCACHE_SYNC_INT_MAP_S))
+#define INTERRUPT_CORE1_DCACHE_SYNC_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DCACHE_SYNC_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_ICACHE_SYNC_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x900)
+/* INTERRUPT_CORE1_ICACHE_SYNC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_ICACHE_SYNC_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_ICACHE_SYNC_INT_MAP_M  ((INTERRUPT_CORE1_ICACHE_SYNC_INT_MAP_V)<<(INTERRUPT_CORE1_ICACHE_SYNC_INT_MAP_S))
+#define INTERRUPT_CORE1_ICACHE_SYNC_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_ICACHE_SYNC_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_APB_ADC_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x904)
+/* INTERRUPT_CORE1_APB_ADC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_APB_ADC_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_APB_ADC_INT_MAP_M  ((INTERRUPT_CORE1_APB_ADC_INT_MAP_V)<<(INTERRUPT_CORE1_APB_ADC_INT_MAP_S))
+#define INTERRUPT_CORE1_APB_ADC_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_APB_ADC_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_IN_CH0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x908)
+/* INTERRUPT_CORE1_DMA_IN_CH0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_IN_CH0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_IN_CH0_INT_MAP_M  ((INTERRUPT_CORE1_DMA_IN_CH0_INT_MAP_V)<<(INTERRUPT_CORE1_DMA_IN_CH0_INT_MAP_S))
+#define INTERRUPT_CORE1_DMA_IN_CH0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_IN_CH0_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_IN_CH1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x90C)
+/* INTERRUPT_CORE1_DMA_IN_CH1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_IN_CH1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_IN_CH1_INT_MAP_M  ((INTERRUPT_CORE1_DMA_IN_CH1_INT_MAP_V)<<(INTERRUPT_CORE1_DMA_IN_CH1_INT_MAP_S))
+#define INTERRUPT_CORE1_DMA_IN_CH1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_IN_CH1_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_IN_CH2_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x910)
+/* INTERRUPT_CORE1_DMA_IN_CH2_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_IN_CH2_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_IN_CH2_INT_MAP_M  ((INTERRUPT_CORE1_DMA_IN_CH2_INT_MAP_V)<<(INTERRUPT_CORE1_DMA_IN_CH2_INT_MAP_S))
+#define INTERRUPT_CORE1_DMA_IN_CH2_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_IN_CH2_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_IN_CH3_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x914)
+/* INTERRUPT_CORE1_DMA_IN_CH3_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_IN_CH3_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_IN_CH3_INT_MAP_M  ((INTERRUPT_CORE1_DMA_IN_CH3_INT_MAP_V)<<(INTERRUPT_CORE1_DMA_IN_CH3_INT_MAP_S))
+#define INTERRUPT_CORE1_DMA_IN_CH3_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_IN_CH3_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_IN_CH4_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x918)
+/* INTERRUPT_CORE1_DMA_IN_CH4_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_IN_CH4_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_IN_CH4_INT_MAP_M  ((INTERRUPT_CORE1_DMA_IN_CH4_INT_MAP_V)<<(INTERRUPT_CORE1_DMA_IN_CH4_INT_MAP_S))
+#define INTERRUPT_CORE1_DMA_IN_CH4_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_IN_CH4_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_OUT_CH0_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x91C)
+/* INTERRUPT_CORE1_DMA_OUT_CH0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_OUT_CH0_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_OUT_CH0_INT_MAP_M  ((INTERRUPT_CORE1_DMA_OUT_CH0_INT_MAP_V)<<(INTERRUPT_CORE1_DMA_OUT_CH0_INT_MAP_S))
+#define INTERRUPT_CORE1_DMA_OUT_CH0_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_OUT_CH0_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_OUT_CH1_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x920)
+/* INTERRUPT_CORE1_DMA_OUT_CH1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_OUT_CH1_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_OUT_CH1_INT_MAP_M  ((INTERRUPT_CORE1_DMA_OUT_CH1_INT_MAP_V)<<(INTERRUPT_CORE1_DMA_OUT_CH1_INT_MAP_S))
+#define INTERRUPT_CORE1_DMA_OUT_CH1_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_OUT_CH1_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_OUT_CH2_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x924)
+/* INTERRUPT_CORE1_DMA_OUT_CH2_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_OUT_CH2_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_OUT_CH2_INT_MAP_M  ((INTERRUPT_CORE1_DMA_OUT_CH2_INT_MAP_V)<<(INTERRUPT_CORE1_DMA_OUT_CH2_INT_MAP_S))
+#define INTERRUPT_CORE1_DMA_OUT_CH2_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_OUT_CH2_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_OUT_CH3_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x928)
+/* INTERRUPT_CORE1_DMA_OUT_CH3_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_OUT_CH3_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_OUT_CH3_INT_MAP_M  ((INTERRUPT_CORE1_DMA_OUT_CH3_INT_MAP_V)<<(INTERRUPT_CORE1_DMA_OUT_CH3_INT_MAP_S))
+#define INTERRUPT_CORE1_DMA_OUT_CH3_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_OUT_CH3_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_OUT_CH4_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x92C)
+/* INTERRUPT_CORE1_DMA_OUT_CH4_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_OUT_CH4_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_OUT_CH4_INT_MAP_M  ((INTERRUPT_CORE1_DMA_OUT_CH4_INT_MAP_V)<<(INTERRUPT_CORE1_DMA_OUT_CH4_INT_MAP_S))
+#define INTERRUPT_CORE1_DMA_OUT_CH4_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_OUT_CH4_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_RSA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x930)
+/* INTERRUPT_CORE1_RSA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_RSA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_RSA_INT_MAP_M  ((INTERRUPT_CORE1_RSA_INT_MAP_V)<<(INTERRUPT_CORE1_RSA_INT_MAP_S))
+#define INTERRUPT_CORE1_RSA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_RSA_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_AES_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x934)
+/* INTERRUPT_CORE1_AES_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_AES_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_AES_INT_MAP_M  ((INTERRUPT_CORE1_AES_INT_MAP_V)<<(INTERRUPT_CORE1_AES_INT_MAP_S))
+#define INTERRUPT_CORE1_AES_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_AES_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_SHA_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x938)
+/* INTERRUPT_CORE1_SHA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_SHA_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_SHA_INT_MAP_M  ((INTERRUPT_CORE1_SHA_INT_MAP_V)<<(INTERRUPT_CORE1_SHA_INT_MAP_S))
+#define INTERRUPT_CORE1_SHA_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_SHA_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_0_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x93C)
+/* INTERRUPT_CORE1_CPU_INTR_FROM_CPU_0_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_0_MAP  0x0000001F
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_0_MAP_M  ((INTERRUPT_CORE1_CPU_INTR_FROM_CPU_0_MAP_V)<<(INTERRUPT_CORE1_CPU_INTR_FROM_CPU_0_MAP_S))
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_0_MAP_V  0x1F
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_0_MAP_S  0
+
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_1_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x940)
+/* INTERRUPT_CORE1_CPU_INTR_FROM_CPU_1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_1_MAP  0x0000001F
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_1_MAP_M  ((INTERRUPT_CORE1_CPU_INTR_FROM_CPU_1_MAP_V)<<(INTERRUPT_CORE1_CPU_INTR_FROM_CPU_1_MAP_S))
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_1_MAP_V  0x1F
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_1_MAP_S  0
+
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_2_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x944)
+/* INTERRUPT_CORE1_CPU_INTR_FROM_CPU_2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_2_MAP  0x0000001F
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_2_MAP_M  ((INTERRUPT_CORE1_CPU_INTR_FROM_CPU_2_MAP_V)<<(INTERRUPT_CORE1_CPU_INTR_FROM_CPU_2_MAP_S))
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_2_MAP_V  0x1F
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_2_MAP_S  0
+
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_3_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x948)
+/* INTERRUPT_CORE1_CPU_INTR_FROM_CPU_3_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_3_MAP  0x0000001F
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_3_MAP_M  ((INTERRUPT_CORE1_CPU_INTR_FROM_CPU_3_MAP_V)<<(INTERRUPT_CORE1_CPU_INTR_FROM_CPU_3_MAP_S))
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_3_MAP_V  0x1F
+#define INTERRUPT_CORE1_CPU_INTR_FROM_CPU_3_MAP_S  0
+
+#define INTERRUPT_CORE1_ASSIST_DEBUG_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x94C)
+/* INTERRUPT_CORE1_ASSIST_DEBUG_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_ASSIST_DEBUG_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_ASSIST_DEBUG_INTR_MAP_M  ((INTERRUPT_CORE1_ASSIST_DEBUG_INTR_MAP_V)<<(INTERRUPT_CORE1_ASSIST_DEBUG_INTR_MAP_S))
+#define INTERRUPT_CORE1_ASSIST_DEBUG_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_ASSIST_DEBUG_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x950)
+/* INTERRUPT_CORE1_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE1_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE1_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE1_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x954)
+/* INTERRUPT_CORE1_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE1_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE1_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE1_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x958)
+/* INTERRUPT_CORE1_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE1_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE1_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE1_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x95C)
+/* INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x960)
+/* INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_M  ((INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_V)<<(INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_S))
+#define INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x964)
+/* INTERRUPT_CORE1_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE1_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE1_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE1_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x968)
+/* INTERRUPT_CORE1_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE1_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE1_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE1_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x96C)
+/* INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x970)
+/* INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_M  ((INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_V)<<(INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_S))
+#define INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_BACKUP_PMS_VIOLATE_INTR_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x974)
+/* INTERRUPT_CORE1_BACKUP_PMS_VIOLATE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_BACKUP_PMS_VIOLATE_INTR_MAP  0x0000001F
+#define INTERRUPT_CORE1_BACKUP_PMS_VIOLATE_INTR_MAP_M  ((INTERRUPT_CORE1_BACKUP_PMS_VIOLATE_INTR_MAP_V)<<(INTERRUPT_CORE1_BACKUP_PMS_VIOLATE_INTR_MAP_S))
+#define INTERRUPT_CORE1_BACKUP_PMS_VIOLATE_INTR_MAP_V  0x1F
+#define INTERRUPT_CORE1_BACKUP_PMS_VIOLATE_INTR_MAP_S  0
+
+#define INTERRUPT_CORE1_CACHE_CORE0_ACS_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x978)
+/* INTERRUPT_CORE1_CACHE_CORE0_ACS_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CACHE_CORE0_ACS_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_CACHE_CORE0_ACS_INT_MAP_M  ((INTERRUPT_CORE1_CACHE_CORE0_ACS_INT_MAP_V)<<(INTERRUPT_CORE1_CACHE_CORE0_ACS_INT_MAP_S))
+#define INTERRUPT_CORE1_CACHE_CORE0_ACS_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_CACHE_CORE0_ACS_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_CACHE_CORE1_ACS_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x97C)
+/* INTERRUPT_CORE1_CACHE_CORE1_ACS_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_CACHE_CORE1_ACS_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_CACHE_CORE1_ACS_INT_MAP_M  ((INTERRUPT_CORE1_CACHE_CORE1_ACS_INT_MAP_V)<<(INTERRUPT_CORE1_CACHE_CORE1_ACS_INT_MAP_S))
+#define INTERRUPT_CORE1_CACHE_CORE1_ACS_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_CACHE_CORE1_ACS_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_USB_DEVICE_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x980)
+/* INTERRUPT_CORE1_USB_DEVICE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_USB_DEVICE_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_USB_DEVICE_INT_MAP_M  ((INTERRUPT_CORE1_USB_DEVICE_INT_MAP_V)<<(INTERRUPT_CORE1_USB_DEVICE_INT_MAP_S))
+#define INTERRUPT_CORE1_USB_DEVICE_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_USB_DEVICE_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_PERI_BACKUP_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x984)
+/* INTERRUPT_CORE1_PERI_BACKUP_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_PERI_BACKUP_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_PERI_BACKUP_INT_MAP_M  ((INTERRUPT_CORE1_PERI_BACKUP_INT_MAP_V)<<(INTERRUPT_CORE1_PERI_BACKUP_INT_MAP_S))
+#define INTERRUPT_CORE1_PERI_BACKUP_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_PERI_BACKUP_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_DMA_EXTMEM_REJECT_INT_MAP_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x988)
+/* INTERRUPT_CORE1_DMA_EXTMEM_REJECT_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/*description: */
+#define INTERRUPT_CORE1_DMA_EXTMEM_REJECT_INT_MAP  0x0000001F
+#define INTERRUPT_CORE1_DMA_EXTMEM_REJECT_INT_MAP_M  ((INTERRUPT_CORE1_DMA_EXTMEM_REJECT_INT_MAP_V)<<(INTERRUPT_CORE1_DMA_EXTMEM_REJECT_INT_MAP_S))
+#define INTERRUPT_CORE1_DMA_EXTMEM_REJECT_INT_MAP_V  0x1F
+#define INTERRUPT_CORE1_DMA_EXTMEM_REJECT_INT_MAP_S  0
+
+#define INTERRUPT_CORE1_INTR_STATUS_0_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x98C)
+/* INTERRUPT_CORE1_INTR_STATUS_0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: */
+#define INTERRUPT_CORE1_INTR_STATUS_0  0xFFFFFFFF
+#define INTERRUPT_CORE1_INTR_STATUS_0_M  ((INTERRUPT_CORE1_INTR_STATUS_0_V)<<(INTERRUPT_CORE1_INTR_STATUS_0_S))
+#define INTERRUPT_CORE1_INTR_STATUS_0_V  0xFFFFFFFF
+#define INTERRUPT_CORE1_INTR_STATUS_0_S  0
+
+#define INTERRUPT_CORE1_INTR_STATUS_1_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x990)
+/* INTERRUPT_CORE1_INTR_STATUS_1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: */
+#define INTERRUPT_CORE1_INTR_STATUS_1  0xFFFFFFFF
+#define INTERRUPT_CORE1_INTR_STATUS_1_M  ((INTERRUPT_CORE1_INTR_STATUS_1_V)<<(INTERRUPT_CORE1_INTR_STATUS_1_S))
+#define INTERRUPT_CORE1_INTR_STATUS_1_V  0xFFFFFFFF
+#define INTERRUPT_CORE1_INTR_STATUS_1_S  0
+
+#define INTERRUPT_CORE1_INTR_STATUS_2_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x994)
+/* INTERRUPT_CORE1_INTR_STATUS_2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: */
+#define INTERRUPT_CORE1_INTR_STATUS_2  0xFFFFFFFF
+#define INTERRUPT_CORE1_INTR_STATUS_2_M  ((INTERRUPT_CORE1_INTR_STATUS_2_V)<<(INTERRUPT_CORE1_INTR_STATUS_2_S))
+#define INTERRUPT_CORE1_INTR_STATUS_2_V  0xFFFFFFFF
+#define INTERRUPT_CORE1_INTR_STATUS_2_S  0
+
+#define INTERRUPT_CORE1_INTR_STATUS_3_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x998)
+/* INTERRUPT_CORE1_INTR_STATUS_3 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: */
+#define INTERRUPT_CORE1_INTR_STATUS_3  0xFFFFFFFF
+#define INTERRUPT_CORE1_INTR_STATUS_3_M  ((INTERRUPT_CORE1_INTR_STATUS_3_V)<<(INTERRUPT_CORE1_INTR_STATUS_3_S))
+#define INTERRUPT_CORE1_INTR_STATUS_3_V  0xFFFFFFFF
+#define INTERRUPT_CORE1_INTR_STATUS_3_S  0
+
+#define INTERRUPT_CORE1_CLOCK_GATE_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0x99c)
+/* INTERRUPT_CORE1_CLK_EN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: */
+#define INTERRUPT_CORE1_CLK_EN  (BIT(0))
+#define INTERRUPT_CORE1_CLK_EN_M  (BIT(0))
+#define INTERRUPT_CORE1_CLK_EN_V  0x1
+#define INTERRUPT_CORE1_CLK_EN_S  0
+
+#define INTERRUPT_CORE1_INTERRUPT_DATE_REG          (DR_REG_INTERRUPT_CORE1_BASE + 0xFFC)
+/* INTERRUPT_CORE1_INTERRUPT_DATE : R/W ;bitpos:[27:0] ;default: 28'h2012300 ; */
+/*description: */
+#define INTERRUPT_CORE1_INTERRUPT_DATE  0x0FFFFFFF
+#define INTERRUPT_CORE1_INTERRUPT_DATE_M  ((INTERRUPT_CORE1_INTERRUPT_DATE_V)<<(INTERRUPT_CORE1_INTERRUPT_DATE_S))
+#define INTERRUPT_CORE1_INTERRUPT_DATE_V  0xFFFFFFF
+#define INTERRUPT_CORE1_INTERRUPT_DATE_S  0
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_INTERRUPT_CORE1_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core1_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core1_struct.h
new file mode 100644
index 00000000000..d4dee29ae50
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_core1_struct.h
@@ -0,0 +1,1658 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_INTERRUPT_CORE1_STRUCT_H_
+#define _SOC_INTERRUPT_CORE1_STRUCT_H_
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct interrupt_core1_dev_s {
+    uint32_t reserved_0;
+    uint32_t reserved_4;
+    uint32_t reserved_8;
+    uint32_t reserved_c;
+    uint32_t reserved_10;
+    uint32_t reserved_14;
+    uint32_t reserved_18;
+    uint32_t reserved_1c;
+    uint32_t reserved_20;
+    uint32_t reserved_24;
+    uint32_t reserved_28;
+    uint32_t reserved_2c;
+    uint32_t reserved_30;
+    uint32_t reserved_34;
+    uint32_t reserved_38;
+    uint32_t reserved_3c;
+    uint32_t reserved_40;
+    uint32_t reserved_44;
+    uint32_t reserved_48;
+    uint32_t reserved_4c;
+    uint32_t reserved_50;
+    uint32_t reserved_54;
+    uint32_t reserved_58;
+    uint32_t reserved_5c;
+    uint32_t reserved_60;
+    uint32_t reserved_64;
+    uint32_t reserved_68;
+    uint32_t reserved_6c;
+    uint32_t reserved_70;
+    uint32_t reserved_74;
+    uint32_t reserved_78;
+    uint32_t reserved_7c;
+    uint32_t reserved_80;
+    uint32_t reserved_84;
+    uint32_t reserved_88;
+    uint32_t reserved_8c;
+    uint32_t reserved_90;
+    uint32_t reserved_94;
+    uint32_t reserved_98;
+    uint32_t reserved_9c;
+    uint32_t reserved_a0;
+    uint32_t reserved_a4;
+    uint32_t reserved_a8;
+    uint32_t reserved_ac;
+    uint32_t reserved_b0;
+    uint32_t reserved_b4;
+    uint32_t reserved_b8;
+    uint32_t reserved_bc;
+    uint32_t reserved_c0;
+    uint32_t reserved_c4;
+    uint32_t reserved_c8;
+    uint32_t reserved_cc;
+    uint32_t reserved_d0;
+    uint32_t reserved_d4;
+    uint32_t reserved_d8;
+    uint32_t reserved_dc;
+    uint32_t reserved_e0;
+    uint32_t reserved_e4;
+    uint32_t reserved_e8;
+    uint32_t reserved_ec;
+    uint32_t reserved_f0;
+    uint32_t reserved_f4;
+    uint32_t reserved_f8;
+    uint32_t reserved_fc;
+    uint32_t reserved_100;
+    uint32_t reserved_104;
+    uint32_t reserved_108;
+    uint32_t reserved_10c;
+    uint32_t reserved_110;
+    uint32_t reserved_114;
+    uint32_t reserved_118;
+    uint32_t reserved_11c;
+    uint32_t reserved_120;
+    uint32_t reserved_124;
+    uint32_t reserved_128;
+    uint32_t reserved_12c;
+    uint32_t reserved_130;
+    uint32_t reserved_134;
+    uint32_t reserved_138;
+    uint32_t reserved_13c;
+    uint32_t reserved_140;
+    uint32_t reserved_144;
+    uint32_t reserved_148;
+    uint32_t reserved_14c;
+    uint32_t reserved_150;
+    uint32_t reserved_154;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    uint32_t reserved_1fc;
+    uint32_t reserved_200;
+    uint32_t reserved_204;
+    uint32_t reserved_208;
+    uint32_t reserved_20c;
+    uint32_t reserved_210;
+    uint32_t reserved_214;
+    uint32_t reserved_218;
+    uint32_t reserved_21c;
+    uint32_t reserved_220;
+    uint32_t reserved_224;
+    uint32_t reserved_228;
+    uint32_t reserved_22c;
+    uint32_t reserved_230;
+    uint32_t reserved_234;
+    uint32_t reserved_238;
+    uint32_t reserved_23c;
+    uint32_t reserved_240;
+    uint32_t reserved_244;
+    uint32_t reserved_248;
+    uint32_t reserved_24c;
+    uint32_t reserved_250;
+    uint32_t reserved_254;
+    uint32_t reserved_258;
+    uint32_t reserved_25c;
+    uint32_t reserved_260;
+    uint32_t reserved_264;
+    uint32_t reserved_268;
+    uint32_t reserved_26c;
+    uint32_t reserved_270;
+    uint32_t reserved_274;
+    uint32_t reserved_278;
+    uint32_t reserved_27c;
+    uint32_t reserved_280;
+    uint32_t reserved_284;
+    uint32_t reserved_288;
+    uint32_t reserved_28c;
+    uint32_t reserved_290;
+    uint32_t reserved_294;
+    uint32_t reserved_298;
+    uint32_t reserved_29c;
+    uint32_t reserved_2a0;
+    uint32_t reserved_2a4;
+    uint32_t reserved_2a8;
+    uint32_t reserved_2ac;
+    uint32_t reserved_2b0;
+    uint32_t reserved_2b4;
+    uint32_t reserved_2b8;
+    uint32_t reserved_2bc;
+    uint32_t reserved_2c0;
+    uint32_t reserved_2c4;
+    uint32_t reserved_2c8;
+    uint32_t reserved_2cc;
+    uint32_t reserved_2d0;
+    uint32_t reserved_2d4;
+    uint32_t reserved_2d8;
+    uint32_t reserved_2dc;
+    uint32_t reserved_2e0;
+    uint32_t reserved_2e4;
+    uint32_t reserved_2e8;
+    uint32_t reserved_2ec;
+    uint32_t reserved_2f0;
+    uint32_t reserved_2f4;
+    uint32_t reserved_2f8;
+    uint32_t reserved_2fc;
+    uint32_t reserved_300;
+    uint32_t reserved_304;
+    uint32_t reserved_308;
+    uint32_t reserved_30c;
+    uint32_t reserved_310;
+    uint32_t reserved_314;
+    uint32_t reserved_318;
+    uint32_t reserved_31c;
+    uint32_t reserved_320;
+    uint32_t reserved_324;
+    uint32_t reserved_328;
+    uint32_t reserved_32c;
+    uint32_t reserved_330;
+    uint32_t reserved_334;
+    uint32_t reserved_338;
+    uint32_t reserved_33c;
+    uint32_t reserved_340;
+    uint32_t reserved_344;
+    uint32_t reserved_348;
+    uint32_t reserved_34c;
+    uint32_t reserved_350;
+    uint32_t reserved_354;
+    uint32_t reserved_358;
+    uint32_t reserved_35c;
+    uint32_t reserved_360;
+    uint32_t reserved_364;
+    uint32_t reserved_368;
+    uint32_t reserved_36c;
+    uint32_t reserved_370;
+    uint32_t reserved_374;
+    uint32_t reserved_378;
+    uint32_t reserved_37c;
+    uint32_t reserved_380;
+    uint32_t reserved_384;
+    uint32_t reserved_388;
+    uint32_t reserved_38c;
+    uint32_t reserved_390;
+    uint32_t reserved_394;
+    uint32_t reserved_398;
+    uint32_t reserved_39c;
+    uint32_t reserved_3a0;
+    uint32_t reserved_3a4;
+    uint32_t reserved_3a8;
+    uint32_t reserved_3ac;
+    uint32_t reserved_3b0;
+    uint32_t reserved_3b4;
+    uint32_t reserved_3b8;
+    uint32_t reserved_3bc;
+    uint32_t reserved_3c0;
+    uint32_t reserved_3c4;
+    uint32_t reserved_3c8;
+    uint32_t reserved_3cc;
+    uint32_t reserved_3d0;
+    uint32_t reserved_3d4;
+    uint32_t reserved_3d8;
+    uint32_t reserved_3dc;
+    uint32_t reserved_3e0;
+    uint32_t reserved_3e4;
+    uint32_t reserved_3e8;
+    uint32_t reserved_3ec;
+    uint32_t reserved_3f0;
+    uint32_t reserved_3f4;
+    uint32_t reserved_3f8;
+    uint32_t reserved_3fc;
+    uint32_t reserved_400;
+    uint32_t reserved_404;
+    uint32_t reserved_408;
+    uint32_t reserved_40c;
+    uint32_t reserved_410;
+    uint32_t reserved_414;
+    uint32_t reserved_418;
+    uint32_t reserved_41c;
+    uint32_t reserved_420;
+    uint32_t reserved_424;
+    uint32_t reserved_428;
+    uint32_t reserved_42c;
+    uint32_t reserved_430;
+    uint32_t reserved_434;
+    uint32_t reserved_438;
+    uint32_t reserved_43c;
+    uint32_t reserved_440;
+    uint32_t reserved_444;
+    uint32_t reserved_448;
+    uint32_t reserved_44c;
+    uint32_t reserved_450;
+    uint32_t reserved_454;
+    uint32_t reserved_458;
+    uint32_t reserved_45c;
+    uint32_t reserved_460;
+    uint32_t reserved_464;
+    uint32_t reserved_468;
+    uint32_t reserved_46c;
+    uint32_t reserved_470;
+    uint32_t reserved_474;
+    uint32_t reserved_478;
+    uint32_t reserved_47c;
+    uint32_t reserved_480;
+    uint32_t reserved_484;
+    uint32_t reserved_488;
+    uint32_t reserved_48c;
+    uint32_t reserved_490;
+    uint32_t reserved_494;
+    uint32_t reserved_498;
+    uint32_t reserved_49c;
+    uint32_t reserved_4a0;
+    uint32_t reserved_4a4;
+    uint32_t reserved_4a8;
+    uint32_t reserved_4ac;
+    uint32_t reserved_4b0;
+    uint32_t reserved_4b4;
+    uint32_t reserved_4b8;
+    uint32_t reserved_4bc;
+    uint32_t reserved_4c0;
+    uint32_t reserved_4c4;
+    uint32_t reserved_4c8;
+    uint32_t reserved_4cc;
+    uint32_t reserved_4d0;
+    uint32_t reserved_4d4;
+    uint32_t reserved_4d8;
+    uint32_t reserved_4dc;
+    uint32_t reserved_4e0;
+    uint32_t reserved_4e4;
+    uint32_t reserved_4e8;
+    uint32_t reserved_4ec;
+    uint32_t reserved_4f0;
+    uint32_t reserved_4f4;
+    uint32_t reserved_4f8;
+    uint32_t reserved_4fc;
+    uint32_t reserved_500;
+    uint32_t reserved_504;
+    uint32_t reserved_508;
+    uint32_t reserved_50c;
+    uint32_t reserved_510;
+    uint32_t reserved_514;
+    uint32_t reserved_518;
+    uint32_t reserved_51c;
+    uint32_t reserved_520;
+    uint32_t reserved_524;
+    uint32_t reserved_528;
+    uint32_t reserved_52c;
+    uint32_t reserved_530;
+    uint32_t reserved_534;
+    uint32_t reserved_538;
+    uint32_t reserved_53c;
+    uint32_t reserved_540;
+    uint32_t reserved_544;
+    uint32_t reserved_548;
+    uint32_t reserved_54c;
+    uint32_t reserved_550;
+    uint32_t reserved_554;
+    uint32_t reserved_558;
+    uint32_t reserved_55c;
+    uint32_t reserved_560;
+    uint32_t reserved_564;
+    uint32_t reserved_568;
+    uint32_t reserved_56c;
+    uint32_t reserved_570;
+    uint32_t reserved_574;
+    uint32_t reserved_578;
+    uint32_t reserved_57c;
+    uint32_t reserved_580;
+    uint32_t reserved_584;
+    uint32_t reserved_588;
+    uint32_t reserved_58c;
+    uint32_t reserved_590;
+    uint32_t reserved_594;
+    uint32_t reserved_598;
+    uint32_t reserved_59c;
+    uint32_t reserved_5a0;
+    uint32_t reserved_5a4;
+    uint32_t reserved_5a8;
+    uint32_t reserved_5ac;
+    uint32_t reserved_5b0;
+    uint32_t reserved_5b4;
+    uint32_t reserved_5b8;
+    uint32_t reserved_5bc;
+    uint32_t reserved_5c0;
+    uint32_t reserved_5c4;
+    uint32_t reserved_5c8;
+    uint32_t reserved_5cc;
+    uint32_t reserved_5d0;
+    uint32_t reserved_5d4;
+    uint32_t reserved_5d8;
+    uint32_t reserved_5dc;
+    uint32_t reserved_5e0;
+    uint32_t reserved_5e4;
+    uint32_t reserved_5e8;
+    uint32_t reserved_5ec;
+    uint32_t reserved_5f0;
+    uint32_t reserved_5f4;
+    uint32_t reserved_5f8;
+    uint32_t reserved_5fc;
+    uint32_t reserved_600;
+    uint32_t reserved_604;
+    uint32_t reserved_608;
+    uint32_t reserved_60c;
+    uint32_t reserved_610;
+    uint32_t reserved_614;
+    uint32_t reserved_618;
+    uint32_t reserved_61c;
+    uint32_t reserved_620;
+    uint32_t reserved_624;
+    uint32_t reserved_628;
+    uint32_t reserved_62c;
+    uint32_t reserved_630;
+    uint32_t reserved_634;
+    uint32_t reserved_638;
+    uint32_t reserved_63c;
+    uint32_t reserved_640;
+    uint32_t reserved_644;
+    uint32_t reserved_648;
+    uint32_t reserved_64c;
+    uint32_t reserved_650;
+    uint32_t reserved_654;
+    uint32_t reserved_658;
+    uint32_t reserved_65c;
+    uint32_t reserved_660;
+    uint32_t reserved_664;
+    uint32_t reserved_668;
+    uint32_t reserved_66c;
+    uint32_t reserved_670;
+    uint32_t reserved_674;
+    uint32_t reserved_678;
+    uint32_t reserved_67c;
+    uint32_t reserved_680;
+    uint32_t reserved_684;
+    uint32_t reserved_688;
+    uint32_t reserved_68c;
+    uint32_t reserved_690;
+    uint32_t reserved_694;
+    uint32_t reserved_698;
+    uint32_t reserved_69c;
+    uint32_t reserved_6a0;
+    uint32_t reserved_6a4;
+    uint32_t reserved_6a8;
+    uint32_t reserved_6ac;
+    uint32_t reserved_6b0;
+    uint32_t reserved_6b4;
+    uint32_t reserved_6b8;
+    uint32_t reserved_6bc;
+    uint32_t reserved_6c0;
+    uint32_t reserved_6c4;
+    uint32_t reserved_6c8;
+    uint32_t reserved_6cc;
+    uint32_t reserved_6d0;
+    uint32_t reserved_6d4;
+    uint32_t reserved_6d8;
+    uint32_t reserved_6dc;
+    uint32_t reserved_6e0;
+    uint32_t reserved_6e4;
+    uint32_t reserved_6e8;
+    uint32_t reserved_6ec;
+    uint32_t reserved_6f0;
+    uint32_t reserved_6f4;
+    uint32_t reserved_6f8;
+    uint32_t reserved_6fc;
+    uint32_t reserved_700;
+    uint32_t reserved_704;
+    uint32_t reserved_708;
+    uint32_t reserved_70c;
+    uint32_t reserved_710;
+    uint32_t reserved_714;
+    uint32_t reserved_718;
+    uint32_t reserved_71c;
+    uint32_t reserved_720;
+    uint32_t reserved_724;
+    uint32_t reserved_728;
+    uint32_t reserved_72c;
+    uint32_t reserved_730;
+    uint32_t reserved_734;
+    uint32_t reserved_738;
+    uint32_t reserved_73c;
+    uint32_t reserved_740;
+    uint32_t reserved_744;
+    uint32_t reserved_748;
+    uint32_t reserved_74c;
+    uint32_t reserved_750;
+    uint32_t reserved_754;
+    uint32_t reserved_758;
+    uint32_t reserved_75c;
+    uint32_t reserved_760;
+    uint32_t reserved_764;
+    uint32_t reserved_768;
+    uint32_t reserved_76c;
+    uint32_t reserved_770;
+    uint32_t reserved_774;
+    uint32_t reserved_778;
+    uint32_t reserved_77c;
+    uint32_t reserved_780;
+    uint32_t reserved_784;
+    uint32_t reserved_788;
+    uint32_t reserved_78c;
+    uint32_t reserved_790;
+    uint32_t reserved_794;
+    uint32_t reserved_798;
+    uint32_t reserved_79c;
+    uint32_t reserved_7a0;
+    uint32_t reserved_7a4;
+    uint32_t reserved_7a8;
+    uint32_t reserved_7ac;
+    uint32_t reserved_7b0;
+    uint32_t reserved_7b4;
+    uint32_t reserved_7b8;
+    uint32_t reserved_7bc;
+    uint32_t reserved_7c0;
+    uint32_t reserved_7c4;
+    uint32_t reserved_7c8;
+    uint32_t reserved_7cc;
+    uint32_t reserved_7d0;
+    uint32_t reserved_7d4;
+    uint32_t reserved_7d8;
+    uint32_t reserved_7dc;
+    uint32_t reserved_7e0;
+    uint32_t reserved_7e4;
+    uint32_t reserved_7e8;
+    uint32_t reserved_7ec;
+    uint32_t reserved_7f0;
+    uint32_t reserved_7f4;
+    uint32_t reserved_7f8;
+    uint32_t reserved_7fc;
+    union {
+        struct {
+            uint32_t core1_mac_intr_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core1_mac_intr_map;
+    union {
+        struct {
+            uint32_t core1_mac_nmi_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core1_mac_nmi_map;
+    union {
+        struct {
+            uint32_t core1_pwr_intr_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core1_pwr_intr_map;
+    union {
+        struct {
+            uint32_t core1_bb_int_map: 5;
+            uint32_t reserved5:       27;
+        };
+        uint32_t val;
+    } core1_bb_int_map;
+    union {
+        struct {
+            uint32_t core1_bt_mac_int_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_bt_mac_int_map;
+    union {
+        struct {
+            uint32_t core1_bt_bb_int_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_bt_bb_int_map;
+    union {
+        struct {
+            uint32_t core1_bt_bb_nmi_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_bt_bb_nmi_map;
+    union {
+        struct {
+            uint32_t core1_rwbt_irq_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core1_rwbt_irq_map;
+    union {
+        struct {
+            uint32_t core1_rwble_irq_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_rwble_irq_map;
+    union {
+        struct {
+            uint32_t core1_rwbt_nmi_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core1_rwbt_nmi_map;
+    union {
+        struct {
+            uint32_t core1_rwble_nmi_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_rwble_nmi_map;
+    union {
+        struct {
+            uint32_t core1_i2c_mst_int_map: 5;
+            uint32_t reserved5:            27;
+        };
+        uint32_t val;
+    } core1_i2c_mst_int_map;
+    union {
+        struct {
+            uint32_t core1_slc0_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_slc0_intr_map;
+    union {
+        struct {
+            uint32_t core1_slc1_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_slc1_intr_map;
+    union {
+        struct {
+            uint32_t core1_uhci0_intr_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_uhci0_intr_map;
+    union {
+        struct {
+            uint32_t core1_uhci1_intr_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_uhci1_intr_map;
+    union {
+        struct {
+            uint32_t core1_gpio_interrupt_pro_map: 5;
+            uint32_t reserved5:                   27;
+        };
+        uint32_t val;
+    } core1_gpio_interrupt_pro_map;
+    union {
+        struct {
+            uint32_t core1_gpio_interrupt_pro_nmi_map: 5;
+            uint32_t reserved5:                       27;
+        };
+        uint32_t val;
+    } core1_gpio_interrupt_pro_nmi_map;
+    union {
+        struct {
+            uint32_t core1_gpio_interrupt_app_map: 5;
+            uint32_t reserved5:                   27;
+        };
+        uint32_t val;
+    } core1_gpio_interrupt_app_map;
+    union {
+        struct {
+            uint32_t core1_gpio_interrupt_app_nmi_map: 5;
+            uint32_t reserved5:                       27;
+        };
+        uint32_t val;
+    } core1_gpio_interrupt_app_nmi_map;
+    union {
+        struct {
+            uint32_t core1_spi_intr_1_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_spi_intr_1_map;
+    union {
+        struct {
+            uint32_t core1_spi_intr_2_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_spi_intr_2_map;
+    union {
+        struct {
+            uint32_t core1_spi_intr_3_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_spi_intr_3_map;
+    union {
+        struct {
+            uint32_t core1_spi_intr_4_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_spi_intr_4_map;
+    union {
+        struct {
+            uint32_t core1_lcd_cam_int_map: 5;
+            uint32_t reserved5:            27;
+        };
+        uint32_t val;
+    } core1_lcd_cam_int_map;
+    union {
+        struct {
+            uint32_t core1_i2s0_int_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core1_i2s0_int_map;
+    union {
+        struct {
+            uint32_t core1_i2s1_int_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core1_i2s1_int_map;
+    union {
+        struct {
+            uint32_t core1_uart_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_uart_intr_map;
+    union {
+        struct {
+            uint32_t core1_uart1_intr_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_uart1_intr_map;
+    union {
+        struct {
+            uint32_t core1_uart2_intr_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_uart2_intr_map;
+    union {
+        struct {
+            uint32_t core1_sdio_host_interrupt_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core1_sdio_host_interrupt_map;
+    union {
+        struct {
+            uint32_t core1_pwm0_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_pwm0_intr_map;
+    union {
+        struct {
+            uint32_t core1_pwm1_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_pwm1_intr_map;
+    union {
+        struct {
+            uint32_t core1_pwm2_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_pwm2_intr_map;
+    union {
+        struct {
+            uint32_t core1_pwm3_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_pwm3_intr_map;
+    union {
+        struct {
+            uint32_t core1_ledc_int_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core1_ledc_int_map;
+    union {
+        struct {
+            uint32_t core1_efuse_int_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_efuse_int_map;
+    union {
+        struct {
+            uint32_t core1_can_int_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core1_can_int_map;
+    union {
+        struct {
+            uint32_t core1_usb_intr_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core1_usb_intr_map;
+    union {
+        struct {
+            uint32_t core1_rtc_core_intr_map: 5;
+            uint32_t reserved5:              27;
+        };
+        uint32_t val;
+    } core1_rtc_core_intr_map;
+    union {
+        struct {
+            uint32_t core1_rmt_intr_map: 5;
+            uint32_t reserved5:         27;
+        };
+        uint32_t val;
+    } core1_rmt_intr_map;
+    union {
+        struct {
+            uint32_t core1_pcnt_intr_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_pcnt_intr_map;
+    union {
+        struct {
+            uint32_t core1_i2c_ext0_intr_map: 5;
+            uint32_t reserved5:              27;
+        };
+        uint32_t val;
+    } core1_i2c_ext0_intr_map;
+    union {
+        struct {
+            uint32_t core1_i2c_ext1_intr_map: 5;
+            uint32_t reserved5:              27;
+        };
+        uint32_t val;
+    } core1_i2c_ext1_intr_map;
+    union {
+        struct {
+            uint32_t core1_spi2_dma_int_map: 5;
+            uint32_t reserved5:             27;
+        };
+        uint32_t val;
+    } core1_spi2_dma_int_map;
+    union {
+        struct {
+            uint32_t core1_spi3_dma_int_map: 5;
+            uint32_t reserved5:             27;
+        };
+        uint32_t val;
+    } core1_spi3_dma_int_map;
+    union {
+        struct {
+            uint32_t core1_spi4_dma_int_map: 5;
+            uint32_t reserved5:             27;
+        };
+        uint32_t val;
+    } core1_spi4_dma_int_map;
+    union {
+        struct {
+            uint32_t core1_wdg_int_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core1_wdg_int_map;
+    union {
+        struct {
+            uint32_t core1_timer_int1_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_timer_int1_map;
+    union {
+        struct {
+            uint32_t core1_timer_int2_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_timer_int2_map;
+    union {
+        struct {
+            uint32_t core1_tg_t0_int_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_tg_t0_int_map;
+    union {
+        struct {
+            uint32_t core1_tg_t1_int_map: 5;
+            uint32_t reserved5:          27;
+        };
+        uint32_t val;
+    } core1_tg_t1_int_map;
+    union {
+        struct {
+            uint32_t core1_tg_wdt_int_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_tg_wdt_int_map;
+    union {
+        struct {
+            uint32_t core1_tg1_t0_int_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_tg1_t0_int_map;
+    union {
+        struct {
+            uint32_t core1_tg1_t1_int_map: 5;
+            uint32_t reserved5:           27;
+        };
+        uint32_t val;
+    } core1_tg1_t1_int_map;
+    union {
+        struct {
+            uint32_t core1_tg1_wdt_int_map: 5;
+            uint32_t reserved5:            27;
+        };
+        uint32_t val;
+    } core1_tg1_wdt_int_map;
+    union {
+        struct {
+            uint32_t core1_cache_ia_int_map: 5;
+            uint32_t reserved5:             27;
+        };
+        uint32_t val;
+    } core1_cache_ia_int_map;
+    union {
+        struct {
+            uint32_t core1_systimer_target0_int_map: 5;
+            uint32_t reserved5:                     27;
+        };
+        uint32_t val;
+    } core1_systimer_target0_int_map;
+    union {
+        struct {
+            uint32_t core1_systimer_target1_int_map: 5;
+            uint32_t reserved5:                     27;
+        };
+        uint32_t val;
+    } core1_systimer_target1_int_map;
+    union {
+        struct {
+            uint32_t core1_systimer_target2_int_map: 5;
+            uint32_t reserved5:                     27;
+        };
+        uint32_t val;
+    } core1_systimer_target2_int_map;
+    union {
+        struct {
+            uint32_t core1_spi_mem_reject_intr_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core1_spi_mem_reject_intr_map;
+    union {
+        struct {
+            uint32_t core1_dcache_preload_int_map: 5;
+            uint32_t reserved5:                   27;
+        };
+        uint32_t val;
+    } core1_dcache_preload_int_map;
+    union {
+        struct {
+            uint32_t core1_icache_preload_int_map: 5;
+            uint32_t reserved5:                   27;
+        };
+        uint32_t val;
+    } core1_icache_preload_int_map;
+    union {
+        struct {
+            uint32_t core1_dcache_sync_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core1_dcache_sync_int_map;
+    union {
+        struct {
+            uint32_t core1_icache_sync_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core1_icache_sync_int_map;
+    union {
+        struct {
+            uint32_t core1_apb_adc_int_map: 5;
+            uint32_t reserved5:            27;
+        };
+        uint32_t val;
+    } core1_apb_adc_int_map;
+    union {
+        struct {
+            uint32_t core1_dma_in_ch0_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core1_dma_in_ch0_int_map;
+    union {
+        struct {
+            uint32_t core1_dma_in_ch1_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core1_dma_in_ch1_int_map;
+    union {
+        struct {
+            uint32_t core1_dma_in_ch2_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core1_dma_in_ch2_int_map;
+    union {
+        struct {
+            uint32_t core1_dma_in_ch3_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core1_dma_in_ch3_int_map;
+    union {
+        struct {
+            uint32_t core1_dma_in_ch4_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core1_dma_in_ch4_int_map;
+    union {
+        struct {
+            uint32_t core1_dma_out_ch0_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core1_dma_out_ch0_int_map;
+    union {
+        struct {
+            uint32_t core1_dma_out_ch1_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core1_dma_out_ch1_int_map;
+    union {
+        struct {
+            uint32_t core1_dma_out_ch2_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core1_dma_out_ch2_int_map;
+    union {
+        struct {
+            uint32_t core1_dma_out_ch3_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core1_dma_out_ch3_int_map;
+    union {
+        struct {
+            uint32_t core1_dma_out_ch4_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core1_dma_out_ch4_int_map;
+    union {
+        struct {
+            uint32_t core1_rsa_int_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core1_rsa_int_map;
+    union {
+        struct {
+            uint32_t core1_aes_int_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core1_aes_int_map;
+    union {
+        struct {
+            uint32_t core1_sha_int_map: 5;
+            uint32_t reserved5:        27;
+        };
+        uint32_t val;
+    } core1_sha_int_map;
+    union {
+        struct {
+            uint32_t core1_cpu_intr_from_cpu_0_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core1_cpu_intr_from_cpu_0_map;
+    union {
+        struct {
+            uint32_t core1_cpu_intr_from_cpu_1_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core1_cpu_intr_from_cpu_1_map;
+    union {
+        struct {
+            uint32_t core1_cpu_intr_from_cpu_2_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core1_cpu_intr_from_cpu_2_map;
+    union {
+        struct {
+            uint32_t core1_cpu_intr_from_cpu_3_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core1_cpu_intr_from_cpu_3_map;
+    union {
+        struct {
+            uint32_t core1_assist_debug_intr_map: 5;
+            uint32_t reserved5:                  27;
+        };
+        uint32_t val;
+    } core1_assist_debug_intr_map;
+    union {
+        struct {
+            uint32_t core1_dma_apbperi_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                     27;
+        };
+        uint32_t val;
+    } core1_dma_apbperi_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core1_core_0_iram0_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                      27;
+        };
+        uint32_t val;
+    } core1_core_0_iram0_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core1_core_0_dram0_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                      27;
+        };
+        uint32_t val;
+    } core1_core_0_dram0_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core1_core_0_pif_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                    27;
+        };
+        uint32_t val;
+    } core1_core_0_pif_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core1_core_0_pif_pms_monitor_violate_size_intr_map: 5;
+            uint32_t reserved5:                                         27;
+        };
+        uint32_t val;
+    } core1_core_0_pif_pms_monitor_violate_size_intr_map;
+    union {
+        struct {
+            uint32_t core1_core_1_iram0_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                      27;
+        };
+        uint32_t val;
+    } core1_core_1_iram0_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core1_core_1_dram0_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                      27;
+        };
+        uint32_t val;
+    } core1_core_1_dram0_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core1_core_1_pif_pms_monitor_violate_intr_map: 5;
+            uint32_t reserved5:                                    27;
+        };
+        uint32_t val;
+    } core1_core_1_pif_pms_monitor_violate_intr_map;
+    union {
+        struct {
+            uint32_t core1_core_1_pif_pms_monitor_violate_size_intr_map: 5;
+            uint32_t reserved5:                                         27;
+        };
+        uint32_t val;
+    } core1_core_1_pif_pms_monitor_violate_size_intr_map;
+    union {
+        struct {
+            uint32_t core1_backup_pms_violate_intr_map: 5;
+            uint32_t reserved5:                        27;
+        };
+        uint32_t val;
+    } core1_backup_pms_violate_intr_map;
+    union {
+        struct {
+            uint32_t core1_cache_core0_acs_int_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core1_cache_core0_acs_int_map;
+    union {
+        struct {
+            uint32_t core1_cache_core1_acs_int_map: 5;
+            uint32_t reserved5:                    27;
+        };
+        uint32_t val;
+    } core1_cache_core1_acs_int_map;
+    union {
+        struct {
+            uint32_t core1_usb_device_int_map: 5;
+            uint32_t reserved5:               27;
+        };
+        uint32_t val;
+    } core1_usb_device_int_map;
+    union {
+        struct {
+            uint32_t core1_peri_backup_int_map: 5;
+            uint32_t reserved5:                27;
+        };
+        uint32_t val;
+    } core1_peri_backup_int_map;
+    union {
+        struct {
+            uint32_t core1_dma_extmem_reject_int_map: 5;
+            uint32_t reserved5:                      27;
+        };
+        uint32_t val;
+    } core1_dma_extmem_reject_int_map;
+    uint32_t core1_intr_status_0;                                             /**/
+    uint32_t core1_intr_status_1;                                             /**/
+    uint32_t core1_intr_status_2;                                             /**/
+    uint32_t core1_intr_status_3;                                             /**/
+    union {
+        struct {
+            uint32_t core1_clk_en: 1;
+            uint32_t reserved1:   31;
+        };
+        uint32_t val;
+    } core1_clock_gate;
+    uint32_t reserved_9a0;
+    uint32_t reserved_9a4;
+    uint32_t reserved_9a8;
+    uint32_t reserved_9ac;
+    uint32_t reserved_9b0;
+    uint32_t reserved_9b4;
+    uint32_t reserved_9b8;
+    uint32_t reserved_9bc;
+    uint32_t reserved_9c0;
+    uint32_t reserved_9c4;
+    uint32_t reserved_9c8;
+    uint32_t reserved_9cc;
+    uint32_t reserved_9d0;
+    uint32_t reserved_9d4;
+    uint32_t reserved_9d8;
+    uint32_t reserved_9dc;
+    uint32_t reserved_9e0;
+    uint32_t reserved_9e4;
+    uint32_t reserved_9e8;
+    uint32_t reserved_9ec;
+    uint32_t reserved_9f0;
+    uint32_t reserved_9f4;
+    uint32_t reserved_9f8;
+    uint32_t reserved_9fc;
+    uint32_t reserved_a00;
+    uint32_t reserved_a04;
+    uint32_t reserved_a08;
+    uint32_t reserved_a0c;
+    uint32_t reserved_a10;
+    uint32_t reserved_a14;
+    uint32_t reserved_a18;
+    uint32_t reserved_a1c;
+    uint32_t reserved_a20;
+    uint32_t reserved_a24;
+    uint32_t reserved_a28;
+    uint32_t reserved_a2c;
+    uint32_t reserved_a30;
+    uint32_t reserved_a34;
+    uint32_t reserved_a38;
+    uint32_t reserved_a3c;
+    uint32_t reserved_a40;
+    uint32_t reserved_a44;
+    uint32_t reserved_a48;
+    uint32_t reserved_a4c;
+    uint32_t reserved_a50;
+    uint32_t reserved_a54;
+    uint32_t reserved_a58;
+    uint32_t reserved_a5c;
+    uint32_t reserved_a60;
+    uint32_t reserved_a64;
+    uint32_t reserved_a68;
+    uint32_t reserved_a6c;
+    uint32_t reserved_a70;
+    uint32_t reserved_a74;
+    uint32_t reserved_a78;
+    uint32_t reserved_a7c;
+    uint32_t reserved_a80;
+    uint32_t reserved_a84;
+    uint32_t reserved_a88;
+    uint32_t reserved_a8c;
+    uint32_t reserved_a90;
+    uint32_t reserved_a94;
+    uint32_t reserved_a98;
+    uint32_t reserved_a9c;
+    uint32_t reserved_aa0;
+    uint32_t reserved_aa4;
+    uint32_t reserved_aa8;
+    uint32_t reserved_aac;
+    uint32_t reserved_ab0;
+    uint32_t reserved_ab4;
+    uint32_t reserved_ab8;
+    uint32_t reserved_abc;
+    uint32_t reserved_ac0;
+    uint32_t reserved_ac4;
+    uint32_t reserved_ac8;
+    uint32_t reserved_acc;
+    uint32_t reserved_ad0;
+    uint32_t reserved_ad4;
+    uint32_t reserved_ad8;
+    uint32_t reserved_adc;
+    uint32_t reserved_ae0;
+    uint32_t reserved_ae4;
+    uint32_t reserved_ae8;
+    uint32_t reserved_aec;
+    uint32_t reserved_af0;
+    uint32_t reserved_af4;
+    uint32_t reserved_af8;
+    uint32_t reserved_afc;
+    uint32_t reserved_b00;
+    uint32_t reserved_b04;
+    uint32_t reserved_b08;
+    uint32_t reserved_b0c;
+    uint32_t reserved_b10;
+    uint32_t reserved_b14;
+    uint32_t reserved_b18;
+    uint32_t reserved_b1c;
+    uint32_t reserved_b20;
+    uint32_t reserved_b24;
+    uint32_t reserved_b28;
+    uint32_t reserved_b2c;
+    uint32_t reserved_b30;
+    uint32_t reserved_b34;
+    uint32_t reserved_b38;
+    uint32_t reserved_b3c;
+    uint32_t reserved_b40;
+    uint32_t reserved_b44;
+    uint32_t reserved_b48;
+    uint32_t reserved_b4c;
+    uint32_t reserved_b50;
+    uint32_t reserved_b54;
+    uint32_t reserved_b58;
+    uint32_t reserved_b5c;
+    uint32_t reserved_b60;
+    uint32_t reserved_b64;
+    uint32_t reserved_b68;
+    uint32_t reserved_b6c;
+    uint32_t reserved_b70;
+    uint32_t reserved_b74;
+    uint32_t reserved_b78;
+    uint32_t reserved_b7c;
+    uint32_t reserved_b80;
+    uint32_t reserved_b84;
+    uint32_t reserved_b88;
+    uint32_t reserved_b8c;
+    uint32_t reserved_b90;
+    uint32_t reserved_b94;
+    uint32_t reserved_b98;
+    uint32_t reserved_b9c;
+    uint32_t reserved_ba0;
+    uint32_t reserved_ba4;
+    uint32_t reserved_ba8;
+    uint32_t reserved_bac;
+    uint32_t reserved_bb0;
+    uint32_t reserved_bb4;
+    uint32_t reserved_bb8;
+    uint32_t reserved_bbc;
+    uint32_t reserved_bc0;
+    uint32_t reserved_bc4;
+    uint32_t reserved_bc8;
+    uint32_t reserved_bcc;
+    uint32_t reserved_bd0;
+    uint32_t reserved_bd4;
+    uint32_t reserved_bd8;
+    uint32_t reserved_bdc;
+    uint32_t reserved_be0;
+    uint32_t reserved_be4;
+    uint32_t reserved_be8;
+    uint32_t reserved_bec;
+    uint32_t reserved_bf0;
+    uint32_t reserved_bf4;
+    uint32_t reserved_bf8;
+    uint32_t reserved_bfc;
+    uint32_t reserved_c00;
+    uint32_t reserved_c04;
+    uint32_t reserved_c08;
+    uint32_t reserved_c0c;
+    uint32_t reserved_c10;
+    uint32_t reserved_c14;
+    uint32_t reserved_c18;
+    uint32_t reserved_c1c;
+    uint32_t reserved_c20;
+    uint32_t reserved_c24;
+    uint32_t reserved_c28;
+    uint32_t reserved_c2c;
+    uint32_t reserved_c30;
+    uint32_t reserved_c34;
+    uint32_t reserved_c38;
+    uint32_t reserved_c3c;
+    uint32_t reserved_c40;
+    uint32_t reserved_c44;
+    uint32_t reserved_c48;
+    uint32_t reserved_c4c;
+    uint32_t reserved_c50;
+    uint32_t reserved_c54;
+    uint32_t reserved_c58;
+    uint32_t reserved_c5c;
+    uint32_t reserved_c60;
+    uint32_t reserved_c64;
+    uint32_t reserved_c68;
+    uint32_t reserved_c6c;
+    uint32_t reserved_c70;
+    uint32_t reserved_c74;
+    uint32_t reserved_c78;
+    uint32_t reserved_c7c;
+    uint32_t reserved_c80;
+    uint32_t reserved_c84;
+    uint32_t reserved_c88;
+    uint32_t reserved_c8c;
+    uint32_t reserved_c90;
+    uint32_t reserved_c94;
+    uint32_t reserved_c98;
+    uint32_t reserved_c9c;
+    uint32_t reserved_ca0;
+    uint32_t reserved_ca4;
+    uint32_t reserved_ca8;
+    uint32_t reserved_cac;
+    uint32_t reserved_cb0;
+    uint32_t reserved_cb4;
+    uint32_t reserved_cb8;
+    uint32_t reserved_cbc;
+    uint32_t reserved_cc0;
+    uint32_t reserved_cc4;
+    uint32_t reserved_cc8;
+    uint32_t reserved_ccc;
+    uint32_t reserved_cd0;
+    uint32_t reserved_cd4;
+    uint32_t reserved_cd8;
+    uint32_t reserved_cdc;
+    uint32_t reserved_ce0;
+    uint32_t reserved_ce4;
+    uint32_t reserved_ce8;
+    uint32_t reserved_cec;
+    uint32_t reserved_cf0;
+    uint32_t reserved_cf4;
+    uint32_t reserved_cf8;
+    uint32_t reserved_cfc;
+    uint32_t reserved_d00;
+    uint32_t reserved_d04;
+    uint32_t reserved_d08;
+    uint32_t reserved_d0c;
+    uint32_t reserved_d10;
+    uint32_t reserved_d14;
+    uint32_t reserved_d18;
+    uint32_t reserved_d1c;
+    uint32_t reserved_d20;
+    uint32_t reserved_d24;
+    uint32_t reserved_d28;
+    uint32_t reserved_d2c;
+    uint32_t reserved_d30;
+    uint32_t reserved_d34;
+    uint32_t reserved_d38;
+    uint32_t reserved_d3c;
+    uint32_t reserved_d40;
+    uint32_t reserved_d44;
+    uint32_t reserved_d48;
+    uint32_t reserved_d4c;
+    uint32_t reserved_d50;
+    uint32_t reserved_d54;
+    uint32_t reserved_d58;
+    uint32_t reserved_d5c;
+    uint32_t reserved_d60;
+    uint32_t reserved_d64;
+    uint32_t reserved_d68;
+    uint32_t reserved_d6c;
+    uint32_t reserved_d70;
+    uint32_t reserved_d74;
+    uint32_t reserved_d78;
+    uint32_t reserved_d7c;
+    uint32_t reserved_d80;
+    uint32_t reserved_d84;
+    uint32_t reserved_d88;
+    uint32_t reserved_d8c;
+    uint32_t reserved_d90;
+    uint32_t reserved_d94;
+    uint32_t reserved_d98;
+    uint32_t reserved_d9c;
+    uint32_t reserved_da0;
+    uint32_t reserved_da4;
+    uint32_t reserved_da8;
+    uint32_t reserved_dac;
+    uint32_t reserved_db0;
+    uint32_t reserved_db4;
+    uint32_t reserved_db8;
+    uint32_t reserved_dbc;
+    uint32_t reserved_dc0;
+    uint32_t reserved_dc4;
+    uint32_t reserved_dc8;
+    uint32_t reserved_dcc;
+    uint32_t reserved_dd0;
+    uint32_t reserved_dd4;
+    uint32_t reserved_dd8;
+    uint32_t reserved_ddc;
+    uint32_t reserved_de0;
+    uint32_t reserved_de4;
+    uint32_t reserved_de8;
+    uint32_t reserved_dec;
+    uint32_t reserved_df0;
+    uint32_t reserved_df4;
+    uint32_t reserved_df8;
+    uint32_t reserved_dfc;
+    uint32_t reserved_e00;
+    uint32_t reserved_e04;
+    uint32_t reserved_e08;
+    uint32_t reserved_e0c;
+    uint32_t reserved_e10;
+    uint32_t reserved_e14;
+    uint32_t reserved_e18;
+    uint32_t reserved_e1c;
+    uint32_t reserved_e20;
+    uint32_t reserved_e24;
+    uint32_t reserved_e28;
+    uint32_t reserved_e2c;
+    uint32_t reserved_e30;
+    uint32_t reserved_e34;
+    uint32_t reserved_e38;
+    uint32_t reserved_e3c;
+    uint32_t reserved_e40;
+    uint32_t reserved_e44;
+    uint32_t reserved_e48;
+    uint32_t reserved_e4c;
+    uint32_t reserved_e50;
+    uint32_t reserved_e54;
+    uint32_t reserved_e58;
+    uint32_t reserved_e5c;
+    uint32_t reserved_e60;
+    uint32_t reserved_e64;
+    uint32_t reserved_e68;
+    uint32_t reserved_e6c;
+    uint32_t reserved_e70;
+    uint32_t reserved_e74;
+    uint32_t reserved_e78;
+    uint32_t reserved_e7c;
+    uint32_t reserved_e80;
+    uint32_t reserved_e84;
+    uint32_t reserved_e88;
+    uint32_t reserved_e8c;
+    uint32_t reserved_e90;
+    uint32_t reserved_e94;
+    uint32_t reserved_e98;
+    uint32_t reserved_e9c;
+    uint32_t reserved_ea0;
+    uint32_t reserved_ea4;
+    uint32_t reserved_ea8;
+    uint32_t reserved_eac;
+    uint32_t reserved_eb0;
+    uint32_t reserved_eb4;
+    uint32_t reserved_eb8;
+    uint32_t reserved_ebc;
+    uint32_t reserved_ec0;
+    uint32_t reserved_ec4;
+    uint32_t reserved_ec8;
+    uint32_t reserved_ecc;
+    uint32_t reserved_ed0;
+    uint32_t reserved_ed4;
+    uint32_t reserved_ed8;
+    uint32_t reserved_edc;
+    uint32_t reserved_ee0;
+    uint32_t reserved_ee4;
+    uint32_t reserved_ee8;
+    uint32_t reserved_eec;
+    uint32_t reserved_ef0;
+    uint32_t reserved_ef4;
+    uint32_t reserved_ef8;
+    uint32_t reserved_efc;
+    uint32_t reserved_f00;
+    uint32_t reserved_f04;
+    uint32_t reserved_f08;
+    uint32_t reserved_f0c;
+    uint32_t reserved_f10;
+    uint32_t reserved_f14;
+    uint32_t reserved_f18;
+    uint32_t reserved_f1c;
+    uint32_t reserved_f20;
+    uint32_t reserved_f24;
+    uint32_t reserved_f28;
+    uint32_t reserved_f2c;
+    uint32_t reserved_f30;
+    uint32_t reserved_f34;
+    uint32_t reserved_f38;
+    uint32_t reserved_f3c;
+    uint32_t reserved_f40;
+    uint32_t reserved_f44;
+    uint32_t reserved_f48;
+    uint32_t reserved_f4c;
+    uint32_t reserved_f50;
+    uint32_t reserved_f54;
+    uint32_t reserved_f58;
+    uint32_t reserved_f5c;
+    uint32_t reserved_f60;
+    uint32_t reserved_f64;
+    uint32_t reserved_f68;
+    uint32_t reserved_f6c;
+    uint32_t reserved_f70;
+    uint32_t reserved_f74;
+    uint32_t reserved_f78;
+    uint32_t reserved_f7c;
+    uint32_t reserved_f80;
+    uint32_t reserved_f84;
+    uint32_t reserved_f88;
+    uint32_t reserved_f8c;
+    uint32_t reserved_f90;
+    uint32_t reserved_f94;
+    uint32_t reserved_f98;
+    uint32_t reserved_f9c;
+    uint32_t reserved_fa0;
+    uint32_t reserved_fa4;
+    uint32_t reserved_fa8;
+    uint32_t reserved_fac;
+    uint32_t reserved_fb0;
+    uint32_t reserved_fb4;
+    uint32_t reserved_fb8;
+    uint32_t reserved_fbc;
+    uint32_t reserved_fc0;
+    uint32_t reserved_fc4;
+    uint32_t reserved_fc8;
+    uint32_t reserved_fcc;
+    uint32_t reserved_fd0;
+    uint32_t reserved_fd4;
+    uint32_t reserved_fd8;
+    uint32_t reserved_fdc;
+    uint32_t reserved_fe0;
+    uint32_t reserved_fe4;
+    uint32_t reserved_fe8;
+    uint32_t reserved_fec;
+    uint32_t reserved_ff0;
+    uint32_t reserved_ff4;
+    uint32_t reserved_ff8;
+    union {
+        struct {
+            uint32_t core1_interrupt_date:28;
+            uint32_t reserved28:           4;
+        };
+        uint32_t val;
+    } core1_interrupt_date;
+} interrupt_core1_dev_t;
+extern interrupt_core1_dev_t INTERRUPT_CORE1;
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* _SOC_INTERRUPT_CORE1_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_reg.h
new file mode 100644
index 00000000000..b5cdc9cbc5d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_reg.h
@@ -0,0 +1,31 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_INTERRUPT_REG_H_
+#define _SOC_INTERRUPT_REG_H_
+
+#include "interrupt_core0_reg.h"
+#include "interrupt_core1_reg.h"
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_INTERRUPT_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_struct.h
new file mode 100644
index 00000000000..03bf5df9536
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/interrupt_struct.h
@@ -0,0 +1,32 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_INTERRUPT_STRUCT_H_
+#define _SOC_INTERRUPT_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct interrupt_dev_s {
+} interrupt_dev_t;
+extern interrupt_dev_t INTERRUPT;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_INTERRUPT_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/io_mux_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/io_mux_reg.h
new file mode 100644
index 00000000000..4b9057400ca
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/io_mux_reg.h
@@ -0,0 +1,434 @@
+// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "soc.h"
+
+/* The following are the bit fields for PERIPHS_IO_MUX_x_U registers */
+/* Output enable in sleep mode */
+#define SLP_OE (BIT(0))
+#define SLP_OE_M (BIT(0))
+#define SLP_OE_V 1
+#define SLP_OE_S 0
+/* Pin used for wakeup from sleep */
+#define SLP_SEL (BIT(1))
+#define SLP_SEL_M (BIT(1))
+#define SLP_SEL_V 1
+#define SLP_SEL_S 1
+/* Pulldown enable in sleep mode */
+#define SLP_PD (BIT(2))
+#define SLP_PD_M (BIT(2))
+#define SLP_PD_V 1
+#define SLP_PD_S 2
+/* Pullup enable in sleep mode */
+#define SLP_PU (BIT(3))
+#define SLP_PU_M (BIT(3))
+#define SLP_PU_V 1
+#define SLP_PU_S 3
+/* Input enable in sleep mode */
+#define SLP_IE (BIT(4))
+#define SLP_IE_M (BIT(4))
+#define SLP_IE_V 1
+#define SLP_IE_S 4
+/* Drive strength in sleep mode */
+#define SLP_DRV 0x3
+#define SLP_DRV_M (SLP_DRV_V << SLP_DRV_S)
+#define SLP_DRV_V 0x3
+#define SLP_DRV_S 5
+/* Pulldown enable */
+#define FUN_PD (BIT(7))
+#define FUN_PD_M (BIT(7))
+#define FUN_PD_V 1
+#define FUN_PD_S 7
+/* Pullup enable */
+#define FUN_PU (BIT(8))
+#define FUN_PU_M (BIT(8))
+#define FUN_PU_V 1
+#define FUN_PU_S 8
+/* Input enable */
+#define FUN_IE (BIT(9))
+#define FUN_IE_M (FUN_IE_V << FUN_IE_S)
+#define FUN_IE_V 1
+#define FUN_IE_S 9
+/* Drive strength */
+#define FUN_DRV 0x3
+#define FUN_DRV_M (FUN_DRV_V << FUN_DRV_S)
+#define FUN_DRV_V 0x3
+#define FUN_DRV_S 10
+/* Function select (possible values are defined for each pin as FUNC_pinname_function below) */
+#define MCU_SEL 0x7
+#define MCU_SEL_M (MCU_SEL_V << MCU_SEL_S)
+#define MCU_SEL_V 0x7
+#define MCU_SEL_S 12
+
+#define PIN_SLP_INPUT_ENABLE(PIN_NAME)      SET_PERI_REG_MASK(PIN_NAME,SLP_IE)
+#define PIN_SLP_INPUT_DISABLE(PIN_NAME)     CLEAR_PERI_REG_MASK(PIN_NAME,SLP_IE)
+#define PIN_SLP_OUTPUT_ENABLE(PIN_NAME)     SET_PERI_REG_MASK(PIN_NAME,SLP_OE)
+#define PIN_SLP_OUTPUT_DISABLE(PIN_NAME)    CLEAR_PERI_REG_MASK(PIN_NAME,SLP_OE)
+#define PIN_SLP_PULLUP_ENABLE(PIN_NAME)     SET_PERI_REG_MASK(PIN_NAME,SLP_PU)
+#define PIN_SLP_PULLUP_DISABLE(PIN_NAME)    CLEAR_PERI_REG_MASK(PIN_NAME,SLP_PU)
+#define PIN_SLP_PULLDOWN_ENABLE(PIN_NAME)   SET_PERI_REG_MASK(PIN_NAME,SLP_PD)
+#define PIN_SLP_PULLDOWN_DISABLE(PIN_NAME)  CLEAR_PERI_REG_MASK(PIN_NAME,SLP_PD)
+#define PIN_SLP_SEL_ENABLE(PIN_NAME)        SET_PERI_REG_MASK(PIN_NAME,SLP_SEL)
+#define PIN_SLP_SEL_DISABLE(PIN_NAME)       CLEAR_PERI_REG_MASK(PIN_NAME,SLP_SEL)
+
+#define PIN_INPUT_ENABLE(PIN_NAME)               SET_PERI_REG_MASK(PIN_NAME,FUN_IE)
+#define PIN_INPUT_DISABLE(PIN_NAME)              CLEAR_PERI_REG_MASK(PIN_NAME,FUN_IE)
+#define PIN_SET_DRV(PIN_NAME, drv)            REG_SET_FIELD(PIN_NAME, FUN_DRV, (drv));
+#define PIN_PULLUP_DIS(PIN_NAME)                 REG_CLR_BIT(PIN_NAME, FUN_PU)
+#define PIN_PULLUP_EN(PIN_NAME)                  REG_SET_BIT(PIN_NAME, FUN_PU)
+#define PIN_PULLDWN_DIS(PIN_NAME)             REG_CLR_BIT(PIN_NAME, FUN_PD)
+#define PIN_PULLDWN_EN(PIN_NAME)              REG_SET_BIT(PIN_NAME, FUN_PD)
+#define PIN_FUNC_SELECT(PIN_NAME, FUNC)      REG_SET_FIELD(PIN_NAME, MCU_SEL, FUNC)
+
+#define IO_MUX_GPIO0_REG        PERIPHS_IO_MUX_GPIO0_U
+#define IO_MUX_GPIO1_REG        PERIPHS_IO_MUX_GPIO1_U
+#define IO_MUX_GPIO2_REG        PERIPHS_IO_MUX_GPIO2_U
+#define IO_MUX_GPIO3_REG        PERIPHS_IO_MUX_GPIO3_U
+#define IO_MUX_GPIO4_REG        PERIPHS_IO_MUX_GPIO4_U
+#define IO_MUX_GPIO5_REG        PERIPHS_IO_MUX_GPIO5_U
+#define IO_MUX_GPIO6_REG        PERIPHS_IO_MUX_GPIO6_U
+#define IO_MUX_GPIO7_REG        PERIPHS_IO_MUX_GPIO7_U
+#define IO_MUX_GPIO8_REG        PERIPHS_IO_MUX_GPIO8_U
+#define IO_MUX_GPIO9_REG        PERIPHS_IO_MUX_GPIO9_U
+#define IO_MUX_GPIO10_REG       PERIPHS_IO_MUX_GPIO10_U
+#define IO_MUX_GPIO11_REG       PERIPHS_IO_MUX_GPIO11_U
+#define IO_MUX_GPIO12_REG       PERIPHS_IO_MUX_GPIO12_U
+#define IO_MUX_GPIO13_REG       PERIPHS_IO_MUX_GPIO13_U
+#define IO_MUX_GPIO14_REG       PERIPHS_IO_MUX_GPIO14_U
+#define IO_MUX_GPIO15_REG       PERIPHS_IO_MUX_XTAL_32K_P_U
+#define IO_MUX_GPIO16_REG       PERIPHS_IO_MUX_XTAL_32K_N_U
+#define IO_MUX_GPIO17_REG       PERIPHS_IO_MUX_DAC_1_U
+#define IO_MUX_GPIO18_REG       PERIPHS_IO_MUX_DAC_2_U
+#define IO_MUX_GPIO19_REG       PERIPHS_IO_MUX_GPIO19_U
+#define IO_MUX_GPIO20_REG       PERIPHS_IO_MUX_GPIO20_U
+#define IO_MUX_GPIO21_REG       PERIPHS_IO_MUX_GPIO21_U
+#define IO_MUX_GPIO26_REG       PERIPHS_IO_MUX_SPICS1_U
+#define IO_MUX_GPIO27_REG       PERIPHS_IO_MUX_SPIHD_U
+#define IO_MUX_GPIO28_REG       PERIPHS_IO_MUX_SPIWP_U
+#define IO_MUX_GPIO29_REG       PERIPHS_IO_MUX_SPICS0_U
+#define IO_MUX_GPIO30_REG       PERIPHS_IO_MUX_SPICLK_U
+#define IO_MUX_GPIO31_REG       PERIPHS_IO_MUX_SPIQ_U
+#define IO_MUX_GPIO32_REG       PERIPHS_IO_MUX_SPID_U
+#define IO_MUX_GPIO33_REG       PERIPHS_IO_MUX_GPIO33_U
+#define IO_MUX_GPIO34_REG       PERIPHS_IO_MUX_GPIO34_U
+#define IO_MUX_GPIO35_REG       PERIPHS_IO_MUX_GPIO35_U
+#define IO_MUX_GPIO36_REG       PERIPHS_IO_MUX_GPIO36_U
+#define IO_MUX_GPIO37_REG       PERIPHS_IO_MUX_GPIO37_U
+#define IO_MUX_GPIO38_REG       PERIPHS_IO_MUX_GPIO38_U
+#define IO_MUX_GPIO39_REG       PERIPHS_IO_MUX_MTCK_U
+#define IO_MUX_GPIO40_REG       PERIPHS_IO_MUX_MTDO_U
+#define IO_MUX_GPIO41_REG       PERIPHS_IO_MUX_MTDI_U
+#define IO_MUX_GPIO42_REG       PERIPHS_IO_MUX_MTMS_U
+#define IO_MUX_GPIO43_REG       PERIPHS_IO_MUX_U0TXD_U
+#define IO_MUX_GPIO44_REG       PERIPHS_IO_MUX_U0RXD_U
+#define IO_MUX_GPIO45_REG       PERIPHS_IO_MUX_GPIO45_U
+#define IO_MUX_GPIO46_REG       PERIPHS_IO_MUX_GPIO46_U
+#define IO_MUX_GPIO47_REG       PERIPHS_IO_MUX_SPICLK_P_U
+#define IO_MUX_GPIO48_REG       PERIPHS_IO_MUX_SPICLK_N_U
+
+#define FUNC_GPIO_GPIO                              1
+#define PIN_FUNC_GPIO                               1
+
+#define GPIO_PAD_PULLDOWN(num) do{PIN_PULLDWN_DIS(IOMUX_REG_GPIO##num);PIN_PULLUP_EN(IOMUX_REG_GPIO##num);}while(0)
+#define GPIO_PAD_PULLUP(num) do{PIN_PULLUP_DIS(IOMUX_REG_GPIO##num);PIN_PULLDWN_EN(IOMUX_REG_GPIO##num);}while(0)
+#define GPIO_PAD_SET_DRV(num, drv) PIN_SET_DRV(IOMUX_REG_GPIO##num, drv)
+
+#define SPI_CS1_GPIO_NUM 26
+#define SPI_HD_GPIO_NUM  27
+#define SPI_WP_GPIO_NUM  28
+#define SPI_CS0_GPIO_NUM 29
+#define SPI_CLK_GPIO_NUM 30
+#define SPI_Q_GPIO_NUM   31
+#define SPI_D_GPIO_NUM   32
+#define SPI_D4_GPIO_NUM  33
+#define SPI_D5_GPIO_NUM  34
+#define SPI_D6_GPIO_NUM  35
+#define SPI_D7_GPIO_NUM  36
+#define SPI_DQS_GPIO_NUM 37
+#define SD_CLK_GPIO_NUM 12
+#define SD_CMD_GPIO_NUM 11
+#define SD_DATA0_GPIO_NUM 13
+#define SD_DATA1_GPIO_NUM 14
+#define SD_DATA2_GPIO_NUM 9
+#define SD_DATA3_GPIO_NUM 10
+
+#define MAX_RTC_GPIO_NUM 21
+#define MAX_PAD_GPIO_NUM 48
+#define MAX_GPIO_NUM    53
+
+#define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE
+#define PIN_CTRL                          (REG_IO_MUX_BASE +0x00)
+#define PAD_POWER_SEL                               BIT(15)
+#define PAD_POWER_SEL_V                             0x1
+#define PAD_POWER_SEL_M                             BIT(15)
+#define PAD_POWER_SEL_S                             15
+
+
+#define PAD_POWER_SWITCH_DELAY                      0x7
+#define PAD_POWER_SWITCH_DELAY_V                    0x7
+#define PAD_POWER_SWITCH_DELAY_M                    (PAD_POWER_SWITCH_DELAY_V << PAD_POWER_SWITCH_DELAY_S)
+#define PAD_POWER_SWITCH_DELAY_S                    12
+
+
+#define CLK_OUT3                                    0xf
+#define CLK_OUT3_V                                  CLK_OUT3
+#define CLK_OUT3_S                                  8
+#define CLK_OUT3_M                                  (CLK_OUT3_V << CLK_OUT3_S)
+#define CLK_OUT2                                    0xf
+#define CLK_OUT2_V                                  CLK_OUT2
+#define CLK_OUT2_S                                  4
+#define CLK_OUT2_M                                  (CLK_OUT2_V << CLK_OUT2_S)
+#define CLK_OUT1                                    0xf
+#define CLK_OUT1_V                                  CLK_OUT1
+#define CLK_OUT1_S                                  0
+#define CLK_OUT1_M                                  (CLK_OUT1_V << CLK_OUT1_S)
+
+#define PERIPHS_IO_MUX_GPIO0_U            (REG_IO_MUX_BASE +0x04)
+#define FUNC_GPIO0_GPIO0                            1
+#define FUNC_GPIO0_GPIO0_0                          0
+
+#define PERIPHS_IO_MUX_GPIO1_U            (REG_IO_MUX_BASE +0x08)
+#define FUNC_GPIO1_GPIO1                            1
+#define FUNC_GPIO1_GPIO1_0                          0
+
+#define PERIPHS_IO_MUX_GPIO2_U            (REG_IO_MUX_BASE +0x0c)
+#define FUNC_GPIO2_GPIO2                            1
+#define FUNC_GPIO2_GPIO2_0                          0
+
+#define PERIPHS_IO_MUX_GPIO3_U            (REG_IO_MUX_BASE +0x10)
+#define FUNC_GPIO3_GPIO3                            1
+#define FUNC_GPIO3_GPIO3_0                          0
+
+#define PERIPHS_IO_MUX_GPIO4_U            (REG_IO_MUX_BASE +0x14)
+#define FUNC_GPIO4_GPIO4                            1
+#define FUNC_GPIO4_GPIO4_0                          0
+
+#define PERIPHS_IO_MUX_GPIO5_U            (REG_IO_MUX_BASE +0x18)
+#define FUNC_GPIO5_GPIO5                            1
+#define FUNC_GPIO5_GPIO5_0                          0
+
+#define PERIPHS_IO_MUX_GPIO6_U            (REG_IO_MUX_BASE +0x1c)
+#define FUNC_GPIO6_GPIO6                            1
+#define FUNC_GPIO6_GPIO6_0                          0
+
+#define PERIPHS_IO_MUX_GPIO7_U            (REG_IO_MUX_BASE +0x20)
+#define FUNC_GPIO7_GPIO7                            1
+#define FUNC_GPIO7_GPIO7_0                          0
+
+#define PERIPHS_IO_MUX_GPIO8_U            (REG_IO_MUX_BASE +0x24)
+#define FUNC_GPIO8_SUBSPICS1                        3
+#define FUNC_GPIO8_GPIO8                            1
+#define FUNC_GPIO8_GPIO8_0                          0
+
+#define PERIPHS_IO_MUX_GPIO9_U            (REG_IO_MUX_BASE +0x28)
+#define FUNC_GPIO9_FSPIHD                           4
+#define FUNC_GPIO9_SUBSPIHD                         3
+#define FUNC_GPIO9_GPIO9                            1
+#define FUNC_GPIO9_GPIO9_0                          0
+
+#define PERIPHS_IO_MUX_GPIO10_U           (REG_IO_MUX_BASE +0x2c)
+#define FUNC_GPIO10_FSPICS0                         4
+#define FUNC_GPIO10_SUBSPICS0                       3
+#define FUNC_GPIO10_FSPIIO4                         2
+#define FUNC_GPIO10_GPIO10                          1
+#define FUNC_GPIO10_GPIO10_0                        0
+
+#define PERIPHS_IO_MUX_GPIO11_U           (REG_IO_MUX_BASE +0x30)
+#define FUNC_GPIO11_FSPID                           4
+#define FUNC_GPIO11_SUBSPID                         3
+#define FUNC_GPIO11_FSPIIO5                         2
+#define FUNC_GPIO11_GPIO11                          1
+#define FUNC_GPIO11_GPIO11_0                        0
+
+#define PERIPHS_IO_MUX_GPIO12_U           (REG_IO_MUX_BASE +0x34)
+#define FUNC_GPIO12_FSPICLK                         4
+#define FUNC_GPIO12_SUBSPICLK                       3
+#define FUNC_GPIO12_FSPIIO6                         2
+#define FUNC_GPIO12_GPIO12                          1
+#define FUNC_GPIO12_GPIO12_0                        0
+
+#define PERIPHS_IO_MUX_GPIO13_U           (REG_IO_MUX_BASE +0x38)
+#define FUNC_GPIO13_FSPIQ                           4
+#define FUNC_GPIO13_SUBSPIQ                         3
+#define FUNC_GPIO13_FSPIIO7                         2
+#define FUNC_GPIO13_GPIO13                          1
+#define FUNC_GPIO13_GPIO13_0                        0
+
+#define PERIPHS_IO_MUX_GPIO14_U           (REG_IO_MUX_BASE +0x3c)
+#define FUNC_GPIO14_FSPIWP                          4
+#define FUNC_GPIO14_SUBSPIWP                        3
+#define FUNC_GPIO14_FSPIDQS                         2
+#define FUNC_GPIO14_GPIO14                          1
+#define FUNC_GPIO14_GPIO14_0                        0
+
+#define PERIPHS_IO_MUX_XTAL_32K_P_U       (REG_IO_MUX_BASE +0x40)
+#define FUNC_XTAL_32K_P_U0RTS                       2
+#define FUNC_XTAL_32K_P_GPIO15                      1
+#define FUNC_XTAL_32K_P_GPIO15_0                    0
+
+#define PERIPHS_IO_MUX_XTAL_32K_N_U       (REG_IO_MUX_BASE +0x44)
+#define FUNC_XTAL_32K_N_U0CTS                       2
+#define FUNC_XTAL_32K_N_GPIO16                      1
+#define FUNC_XTAL_32K_N_GPIO16_0                    0
+
+#define PERIPHS_IO_MUX_DAC_1_U            (REG_IO_MUX_BASE +0x48)
+#define FUNC_DAC_1_U1TXD                            2
+#define FUNC_DAC_1_GPIO17                           1
+#define FUNC_DAC_1_GPIO17_0                         0
+
+#define PERIPHS_IO_MUX_DAC_2_U            (REG_IO_MUX_BASE +0x4c)
+#define FUNC_DAC_2_CLK_OUT3                         3
+#define FUNC_DAC_2_U1RXD                            2
+#define FUNC_DAC_2_GPIO18                           1
+#define FUNC_DAC_2_GPIO18_0                         0
+
+#define PERIPHS_IO_MUX_GPIO19_U           (REG_IO_MUX_BASE +0x50)
+#define FUNC_GPIO19_CLK_OUT2                        3
+#define FUNC_GPIO19_U1RTS                           2
+#define FUNC_GPIO19_GPIO19                          1
+#define FUNC_GPIO19_GPIO19_0                        0
+
+#define PERIPHS_IO_MUX_GPIO20_U           (REG_IO_MUX_BASE +0x54)
+#define FUNC_GPIO20_CLK_OUT1                        3
+#define FUNC_GPIO20_U1CTS                           2
+#define FUNC_GPIO20_GPIO20                          1
+#define FUNC_GPIO20_GPIO20_0                        0
+
+#define PERIPHS_IO_MUX_GPIO21_U           (REG_IO_MUX_BASE +0x58)
+#define FUNC_GPIO21_GPIO21                          1
+#define FUNC_GPIO21_GPIO21_0                        0
+
+#define PERIPHS_IO_MUX_SPICS1_U           (REG_IO_MUX_BASE +0x6c)
+#define FUNC_SPICS1_GPIO26                          1
+#define FUNC_SPICS1_SPICS1                          0
+
+#define PERIPHS_IO_MUX_SPIHD_U            (REG_IO_MUX_BASE +0x70)
+#define FUNC_SPIHD_GPIO27                           1
+#define FUNC_SPIHD_SPIHD                            0
+
+#define PERIPHS_IO_MUX_SPIWP_U            (REG_IO_MUX_BASE +0x74)
+#define FUNC_SPIWP_GPIO28                           1
+#define FUNC_SPIWP_SPIWP                            0
+
+#define PERIPHS_IO_MUX_SPICS0_U           (REG_IO_MUX_BASE +0x78)
+#define FUNC_SPICS0_GPIO29                          1
+#define FUNC_SPICS0_SPICS0                          0
+
+#define PERIPHS_IO_MUX_SPICLK_U           (REG_IO_MUX_BASE +0x7c)
+#define FUNC_SPICLK_GPIO30                          1
+#define FUNC_SPICLK_SPICLK                          0
+
+#define PERIPHS_IO_MUX_SPIQ_U             (REG_IO_MUX_BASE +0x80)
+#define FUNC_SPIQ_GPIO31                            1
+#define FUNC_SPIQ_SPIQ                              0
+
+#define PERIPHS_IO_MUX_SPID_U             (REG_IO_MUX_BASE +0x84)
+#define FUNC_SPID_GPIO32                            1
+#define FUNC_SPID_SPID                              0
+
+#define PERIPHS_IO_MUX_GPIO33_U           (REG_IO_MUX_BASE +0x88)
+#define FUNC_GPIO33_SPIIO4                          4
+#define FUNC_GPIO33_SUBSPIHD                        3
+#define FUNC_GPIO33_FSPIHD                          2
+#define FUNC_GPIO33_GPIO33                          1
+#define FUNC_GPIO33_GPIO33_0                        0
+
+#define PERIPHS_IO_MUX_GPIO34_U           (REG_IO_MUX_BASE +0x8c)
+#define FUNC_GPIO34_SPIIO5                          4
+#define FUNC_GPIO34_SUBSPICS0                       3
+#define FUNC_GPIO34_FSPICS0                         2
+#define FUNC_GPIO34_GPIO34                          1
+#define FUNC_GPIO34_GPIO34_0                        0
+
+#define PERIPHS_IO_MUX_GPIO35_U           (REG_IO_MUX_BASE +0x90)
+#define FUNC_GPIO35_SPIIO6                          4
+#define FUNC_GPIO35_SUBSPID                         3
+#define FUNC_GPIO35_FSPID                           2
+#define FUNC_GPIO35_GPIO35                          1
+#define FUNC_GPIO35_GPIO35_0                        0
+
+#define PERIPHS_IO_MUX_GPIO36_U           (REG_IO_MUX_BASE +0x94)
+#define FUNC_GPIO36_SPIIO7                          4
+#define FUNC_GPIO36_SUBSPICLK                       3
+#define FUNC_GPIO36_FSPICLK                         2
+#define FUNC_GPIO36_GPIO36                          1
+#define FUNC_GPIO36_GPIO36_0                        0
+
+#define PERIPHS_IO_MUX_GPIO37_U           (REG_IO_MUX_BASE +0x98)
+#define FUNC_GPIO37_SPIDQS                          4
+#define FUNC_GPIO37_SUBSPIQ                         3
+#define FUNC_GPIO37_FSPIQ                           2
+#define FUNC_GPIO37_GPIO37                          1
+#define FUNC_GPIO37_GPIO37_0                        0
+
+#define PERIPHS_IO_MUX_GPIO38_U           (REG_IO_MUX_BASE +0x9c)
+#define FUNC_GPIO38_SUBSPIWP                        3
+#define FUNC_GPIO38_FSPIWP                          2
+#define FUNC_GPIO38_GPIO38                          1
+#define FUNC_GPIO38_GPIO38_0                        0
+
+#define PERIPHS_IO_MUX_MTCK_U             (REG_IO_MUX_BASE +0xa0)
+#define FUNC_MTCK_SUBSPICS1                         3
+#define FUNC_MTCK_CLK_OUT3                          2
+#define FUNC_MTCK_GPIO39                            1
+#define FUNC_MTCK_MTCK                              0
+
+#define PERIPHS_IO_MUX_MTDO_U             (REG_IO_MUX_BASE +0xa4)
+#define FUNC_MTDO_CLK_OUT2                          2
+#define FUNC_MTDO_GPIO40                            1
+#define FUNC_MTDO_MTDO                              0
+
+#define PERIPHS_IO_MUX_MTDI_U             (REG_IO_MUX_BASE +0xa8)
+#define FUNC_MTDI_CLK_OUT1                          2
+#define FUNC_MTDI_GPIO41                            1
+#define FUNC_MTDI_MTDI                              0
+
+#define PERIPHS_IO_MUX_MTMS_U             (REG_IO_MUX_BASE +0xac)
+#define FUNC_MTMS_GPIO42                            1
+#define FUNC_MTMS_MTMS                              0
+
+#define PERIPHS_IO_MUX_U0TXD_U            (REG_IO_MUX_BASE +0xb0)
+#define FUNC_U0TXD_CLK_OUT1                         2
+#define FUNC_U0TXD_GPIO43                           1
+#define FUNC_U0TXD_U0TXD                            0
+
+#define PERIPHS_IO_MUX_U0RXD_U            (REG_IO_MUX_BASE +0xb4)
+#define FUNC_U0RXD_CLK_OUT2                         2
+#define FUNC_U0RXD_GPIO44                           1
+#define FUNC_U0RXD_U0RXD                            0
+
+#define PERIPHS_IO_MUX_GPIO45_U           (REG_IO_MUX_BASE +0xb8)
+#define FUNC_GPIO45_GPIO45                          1
+#define FUNC_GPIO45_GPIO45_0                        0
+
+#define PERIPHS_IO_MUX_GPIO46_U           (REG_IO_MUX_BASE +0xbc)
+#define FUNC_GPIO46_GPIO46                          1
+#define FUNC_GPIO46_GPIO46_0                        0
+
+#define PERIPHS_IO_MUX_SPICLK_P_U         (REG_IO_MUX_BASE +0xc0)
+#define FUNC_SPICLK_P_SUBSPICLK_DIFF                2
+#define FUNC_SPICLK_P_GPIO47                        1
+#define FUNC_SPICLK_P_SPICLK_DIFF                   0
+
+#define PERIPHS_IO_MUX_SPICLK_N_U         (REG_IO_MUX_BASE +0xc4)
+#define FUNC_SPICLK_N_SUBSPICLK_DIFF                2
+#define FUNC_SPICLK_N_GPIO48                        1
+#define FUNC_SPICLK_N_SPICLK_DIFF                   0
+
+
+#define IO_MUX_DATE_REG (REG_IO_MUX_BASE + 0xfc)
+#define IO_MUX_DATE 0xFFFFFFFF
+#define IO_MUX_DATE_S 0
+#define IO_MUX_DATE_VERSION 0x1907160
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/lcd_cam_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/lcd_cam_reg.h
new file mode 100644
index 00000000000..85c5cc01602
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/lcd_cam_reg.h
@@ -0,0 +1,1048 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** LCD_CAM_LCD_CLOCK_REG register
+ *  LCD clock register
+ */
+#define LCD_CAM_LCD_CLOCK_REG (DR_REG_LCD_CAM_BASE + 0x0)
+/** LCD_CAM_LCD_CLKCNT_N : R/W; bitpos: [5:0]; default: 3;
+ *  f_LCD_PCLK = f_LCD_CLK / (reg_clkcnt_N + 1) when reg_clk_equ_sysclk is 0.
+ */
+#define LCD_CAM_LCD_CLKCNT_N    0x0000003FU
+#define LCD_CAM_LCD_CLKCNT_N_M  (LCD_CAM_LCD_CLKCNT_N_V << LCD_CAM_LCD_CLKCNT_N_S)
+#define LCD_CAM_LCD_CLKCNT_N_V  0x0000003FU
+#define LCD_CAM_LCD_CLKCNT_N_S  0
+/** LCD_CAM_LCD_CLK_EQU_SYSCLK : R/W; bitpos: [6]; default: 1;
+ *  1: f_LCD_PCLK = f_LCD_CLK. 0: f_LCD_PCLK = f_LCD_CLK / (reg_clkcnt_N + 1).
+ */
+#define LCD_CAM_LCD_CLK_EQU_SYSCLK    (BIT(6))
+#define LCD_CAM_LCD_CLK_EQU_SYSCLK_M  (LCD_CAM_LCD_CLK_EQU_SYSCLK_V << LCD_CAM_LCD_CLK_EQU_SYSCLK_S)
+#define LCD_CAM_LCD_CLK_EQU_SYSCLK_V  0x00000001U
+#define LCD_CAM_LCD_CLK_EQU_SYSCLK_S  6
+/** LCD_CAM_LCD_CK_IDLE_EDGE : R/W; bitpos: [7]; default: 0;
+ *  1: LCD_PCLK line is high when idle     0: LCD_PCLK line is low when idle.
+ */
+#define LCD_CAM_LCD_CK_IDLE_EDGE    (BIT(7))
+#define LCD_CAM_LCD_CK_IDLE_EDGE_M  (LCD_CAM_LCD_CK_IDLE_EDGE_V << LCD_CAM_LCD_CK_IDLE_EDGE_S)
+#define LCD_CAM_LCD_CK_IDLE_EDGE_V  0x00000001U
+#define LCD_CAM_LCD_CK_IDLE_EDGE_S  7
+/** LCD_CAM_LCD_CK_OUT_EDGE : R/W; bitpos: [8]; default: 0;
+ *  1: LCD_PCLK high in first half clock cycle. 0: LCD_PCLK low in first half clock
+ *  cycle.
+ */
+#define LCD_CAM_LCD_CK_OUT_EDGE    (BIT(8))
+#define LCD_CAM_LCD_CK_OUT_EDGE_M  (LCD_CAM_LCD_CK_OUT_EDGE_V << LCD_CAM_LCD_CK_OUT_EDGE_S)
+#define LCD_CAM_LCD_CK_OUT_EDGE_V  0x00000001U
+#define LCD_CAM_LCD_CK_OUT_EDGE_S  8
+/** LCD_CAM_LCD_CLKM_DIV_NUM : R/W; bitpos: [16:9]; default: 4;
+ *  Integral LCD clock divider value
+ */
+#define LCD_CAM_LCD_CLKM_DIV_NUM    0x000000FFU
+#define LCD_CAM_LCD_CLKM_DIV_NUM_M  (LCD_CAM_LCD_CLKM_DIV_NUM_V << LCD_CAM_LCD_CLKM_DIV_NUM_S)
+#define LCD_CAM_LCD_CLKM_DIV_NUM_V  0x000000FFU
+#define LCD_CAM_LCD_CLKM_DIV_NUM_S  9
+/** LCD_CAM_LCD_CLKM_DIV_B : R/W; bitpos: [22:17]; default: 0;
+ *  Fractional clock divider numerator value
+ */
+#define LCD_CAM_LCD_CLKM_DIV_B    0x0000003FU
+#define LCD_CAM_LCD_CLKM_DIV_B_M  (LCD_CAM_LCD_CLKM_DIV_B_V << LCD_CAM_LCD_CLKM_DIV_B_S)
+#define LCD_CAM_LCD_CLKM_DIV_B_V  0x0000003FU
+#define LCD_CAM_LCD_CLKM_DIV_B_S  17
+/** LCD_CAM_LCD_CLKM_DIV_A : R/W; bitpos: [28:23]; default: 0;
+ *  Fractional clock divider denominator value
+ */
+#define LCD_CAM_LCD_CLKM_DIV_A    0x0000003FU
+#define LCD_CAM_LCD_CLKM_DIV_A_M  (LCD_CAM_LCD_CLKM_DIV_A_V << LCD_CAM_LCD_CLKM_DIV_A_S)
+#define LCD_CAM_LCD_CLKM_DIV_A_V  0x0000003FU
+#define LCD_CAM_LCD_CLKM_DIV_A_S  23
+/** LCD_CAM_LCD_CLK_SEL : R/W; bitpos: [30:29]; default: 0;
+ *  Select LCD module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: no clock.
+ */
+#define LCD_CAM_LCD_CLK_SEL    0x00000003U
+#define LCD_CAM_LCD_CLK_SEL_M  (LCD_CAM_LCD_CLK_SEL_V << LCD_CAM_LCD_CLK_SEL_S)
+#define LCD_CAM_LCD_CLK_SEL_V  0x00000003U
+#define LCD_CAM_LCD_CLK_SEL_S  29
+/** LCD_CAM_CLK_EN : R/W; bitpos: [31]; default: 0;
+ *  Set this bit to enable clk gate
+ */
+#define LCD_CAM_CLK_EN    (BIT(31))
+#define LCD_CAM_CLK_EN_M  (LCD_CAM_CLK_EN_V << LCD_CAM_CLK_EN_S)
+#define LCD_CAM_CLK_EN_V  0x00000001U
+#define LCD_CAM_CLK_EN_S  31
+
+/** LCD_CAM_CAM_CTRL_REG register
+ *  Camera configuration register
+ */
+#define LCD_CAM_CAM_CTRL_REG (DR_REG_LCD_CAM_BASE + 0x4)
+/** LCD_CAM_CAM_STOP_EN : R/W; bitpos: [0]; default: 0;
+ *  Camera stop enable signal, 1: camera stops when DMA Rx FIFO is full. 0: Not stop.
+ */
+#define LCD_CAM_CAM_STOP_EN    (BIT(0))
+#define LCD_CAM_CAM_STOP_EN_M  (LCD_CAM_CAM_STOP_EN_V << LCD_CAM_CAM_STOP_EN_S)
+#define LCD_CAM_CAM_STOP_EN_V  0x00000001U
+#define LCD_CAM_CAM_STOP_EN_S  0
+/** LCD_CAM_CAM_VSYNC_FILTER_THRES : R/W; bitpos: [3:1]; default: 0;
+ *  Filter threshold value for CAM_VSYNC signal.
+ */
+#define LCD_CAM_CAM_VSYNC_FILTER_THRES    0x00000007U
+#define LCD_CAM_CAM_VSYNC_FILTER_THRES_M  (LCD_CAM_CAM_VSYNC_FILTER_THRES_V << LCD_CAM_CAM_VSYNC_FILTER_THRES_S)
+#define LCD_CAM_CAM_VSYNC_FILTER_THRES_V  0x00000007U
+#define LCD_CAM_CAM_VSYNC_FILTER_THRES_S  1
+/** LCD_CAM_CAM_UPDATE_REG : R/W; bitpos: [4]; default: 0;
+ *  1: Update Camera registers, will be cleared by hardware. 0 : Not care.
+ */
+#define LCD_CAM_CAM_UPDATE_REG    (BIT(4))
+#define LCD_CAM_CAM_UPDATE_REG_M  (LCD_CAM_CAM_UPDATE_REG_V << LCD_CAM_CAM_UPDATE_REG_S)
+#define LCD_CAM_CAM_UPDATE_REG_V  0x00000001U
+#define LCD_CAM_CAM_UPDATE_REG_S  4
+/** LCD_CAM_CAM_BYTE_ORDER : R/W; bitpos: [5]; default: 0;
+ *  1: Change data bit order, change CAM_DATA_in[7:0] to CAM_DATA_in[0:7] in one byte
+ *  mode, and bits[15:0] to bits[0:15] in two byte mode.  0: Not change.
+ */
+#define LCD_CAM_CAM_BYTE_ORDER    (BIT(5))
+#define LCD_CAM_CAM_BYTE_ORDER_M  (LCD_CAM_CAM_BYTE_ORDER_V << LCD_CAM_CAM_BYTE_ORDER_S)
+#define LCD_CAM_CAM_BYTE_ORDER_V  0x00000001U
+#define LCD_CAM_CAM_BYTE_ORDER_S  5
+/** LCD_CAM_CAM_BIT_ORDER : R/W; bitpos: [6]; default: 0;
+ *  1: invert data byte order, only valid in 2 byte mode. 0: Not change.
+ */
+#define LCD_CAM_CAM_BIT_ORDER    (BIT(6))
+#define LCD_CAM_CAM_BIT_ORDER_M  (LCD_CAM_CAM_BIT_ORDER_V << LCD_CAM_CAM_BIT_ORDER_S)
+#define LCD_CAM_CAM_BIT_ORDER_V  0x00000001U
+#define LCD_CAM_CAM_BIT_ORDER_S  6
+/** LCD_CAM_CAM_LINE_INT_EN : R/W; bitpos: [7]; default: 0;
+ *  1: Enable to generate CAM_HS_INT. 0: Disable.
+ */
+#define LCD_CAM_CAM_LINE_INT_EN    (BIT(7))
+#define LCD_CAM_CAM_LINE_INT_EN_M  (LCD_CAM_CAM_LINE_INT_EN_V << LCD_CAM_CAM_LINE_INT_EN_S)
+#define LCD_CAM_CAM_LINE_INT_EN_V  0x00000001U
+#define LCD_CAM_CAM_LINE_INT_EN_S  7
+/** LCD_CAM_CAM_VS_EOF_EN : R/W; bitpos: [8]; default: 0;
+ *  1: CAM_VSYNC to generate in_suc_eof. 0: in_suc_eof is controlled by
+ *  reg_cam_rec_data_cyclelen.
+ */
+#define LCD_CAM_CAM_VS_EOF_EN    (BIT(8))
+#define LCD_CAM_CAM_VS_EOF_EN_M  (LCD_CAM_CAM_VS_EOF_EN_V << LCD_CAM_CAM_VS_EOF_EN_S)
+#define LCD_CAM_CAM_VS_EOF_EN_V  0x00000001U
+#define LCD_CAM_CAM_VS_EOF_EN_S  8
+/** LCD_CAM_CAM_CLKM_DIV_NUM : R/W; bitpos: [16:9]; default: 4;
+ *  Integral Camera clock divider value
+ */
+#define LCD_CAM_CAM_CLKM_DIV_NUM    0x000000FFU
+#define LCD_CAM_CAM_CLKM_DIV_NUM_M  (LCD_CAM_CAM_CLKM_DIV_NUM_V << LCD_CAM_CAM_CLKM_DIV_NUM_S)
+#define LCD_CAM_CAM_CLKM_DIV_NUM_V  0x000000FFU
+#define LCD_CAM_CAM_CLKM_DIV_NUM_S  9
+/** LCD_CAM_CAM_CLKM_DIV_B : R/W; bitpos: [22:17]; default: 0;
+ *  Fractional clock divider numerator value
+ */
+#define LCD_CAM_CAM_CLKM_DIV_B    0x0000003FU
+#define LCD_CAM_CAM_CLKM_DIV_B_M  (LCD_CAM_CAM_CLKM_DIV_B_V << LCD_CAM_CAM_CLKM_DIV_B_S)
+#define LCD_CAM_CAM_CLKM_DIV_B_V  0x0000003FU
+#define LCD_CAM_CAM_CLKM_DIV_B_S  17
+/** LCD_CAM_CAM_CLKM_DIV_A : R/W; bitpos: [28:23]; default: 0;
+ *  Fractional clock divider denominator value
+ */
+#define LCD_CAM_CAM_CLKM_DIV_A    0x0000003FU
+#define LCD_CAM_CAM_CLKM_DIV_A_M  (LCD_CAM_CAM_CLKM_DIV_A_V << LCD_CAM_CAM_CLKM_DIV_A_S)
+#define LCD_CAM_CAM_CLKM_DIV_A_V  0x0000003FU
+#define LCD_CAM_CAM_CLKM_DIV_A_S  23
+/** LCD_CAM_CAM_CLK_SEL : R/W; bitpos: [30:29]; default: 0;
+ *  Select Camera module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: no clock.
+ */
+#define LCD_CAM_CAM_CLK_SEL    0x00000003U
+#define LCD_CAM_CAM_CLK_SEL_M  (LCD_CAM_CAM_CLK_SEL_V << LCD_CAM_CAM_CLK_SEL_S)
+#define LCD_CAM_CAM_CLK_SEL_V  0x00000003U
+#define LCD_CAM_CAM_CLK_SEL_S  29
+
+/** LCD_CAM_CAM_CTRL1_REG register
+ *  Camera configuration register
+ */
+#define LCD_CAM_CAM_CTRL1_REG (DR_REG_LCD_CAM_BASE + 0x8)
+/** LCD_CAM_CAM_REC_DATA_BYTELEN : R/W; bitpos: [15:0]; default: 0;
+ *  Camera receive data byte length minus 1 to set DMA in_suc_eof_int.
+ */
+#define LCD_CAM_CAM_REC_DATA_BYTELEN    0x0000FFFFU
+#define LCD_CAM_CAM_REC_DATA_BYTELEN_M  (LCD_CAM_CAM_REC_DATA_BYTELEN_V << LCD_CAM_CAM_REC_DATA_BYTELEN_S)
+#define LCD_CAM_CAM_REC_DATA_BYTELEN_V  0x0000FFFFU
+#define LCD_CAM_CAM_REC_DATA_BYTELEN_S  0
+/** LCD_CAM_CAM_LINE_INT_NUM : R/W; bitpos: [21:16]; default: 0;
+ *  The line number minus 1 to generate cam_hs_int.
+ */
+#define LCD_CAM_CAM_LINE_INT_NUM    0x0000003FU
+#define LCD_CAM_CAM_LINE_INT_NUM_M  (LCD_CAM_CAM_LINE_INT_NUM_V << LCD_CAM_CAM_LINE_INT_NUM_S)
+#define LCD_CAM_CAM_LINE_INT_NUM_V  0x0000003FU
+#define LCD_CAM_CAM_LINE_INT_NUM_S  16
+/** LCD_CAM_CAM_CLK_INV : R/W; bitpos: [22]; default: 0;
+ *  1: Invert  the input signal CAM_PCLK. 0: Not invert.
+ */
+#define LCD_CAM_CAM_CLK_INV    (BIT(22))
+#define LCD_CAM_CAM_CLK_INV_M  (LCD_CAM_CAM_CLK_INV_V << LCD_CAM_CAM_CLK_INV_S)
+#define LCD_CAM_CAM_CLK_INV_V  0x00000001U
+#define LCD_CAM_CAM_CLK_INV_S  22
+/** LCD_CAM_CAM_VSYNC_FILTER_EN : R/W; bitpos: [23]; default: 0;
+ *  1: Enable CAM_VSYNC filter function. 0: bypass.
+ */
+#define LCD_CAM_CAM_VSYNC_FILTER_EN    (BIT(23))
+#define LCD_CAM_CAM_VSYNC_FILTER_EN_M  (LCD_CAM_CAM_VSYNC_FILTER_EN_V << LCD_CAM_CAM_VSYNC_FILTER_EN_S)
+#define LCD_CAM_CAM_VSYNC_FILTER_EN_V  0x00000001U
+#define LCD_CAM_CAM_VSYNC_FILTER_EN_S  23
+/** LCD_CAM_CAM_2BYTE_EN : R/W; bitpos: [24]; default: 0;
+ *  1: The bit number of input data is 9~16.  0: The bit number of input data is 0~8.
+ */
+#define LCD_CAM_CAM_2BYTE_EN    (BIT(24))
+#define LCD_CAM_CAM_2BYTE_EN_M  (LCD_CAM_CAM_2BYTE_EN_V << LCD_CAM_CAM_2BYTE_EN_S)
+#define LCD_CAM_CAM_2BYTE_EN_V  0x00000001U
+#define LCD_CAM_CAM_2BYTE_EN_S  24
+/** LCD_CAM_CAM_DE_INV : R/W; bitpos: [25]; default: 0;
+ *  CAM_DE invert enable signal, valid in high level.
+ */
+#define LCD_CAM_CAM_DE_INV    (BIT(25))
+#define LCD_CAM_CAM_DE_INV_M  (LCD_CAM_CAM_DE_INV_V << LCD_CAM_CAM_DE_INV_S)
+#define LCD_CAM_CAM_DE_INV_V  0x00000001U
+#define LCD_CAM_CAM_DE_INV_S  25
+/** LCD_CAM_CAM_HSYNC_INV : R/W; bitpos: [26]; default: 0;
+ *  CAM_HSYNC invert enable signal, valid in high level.
+ */
+#define LCD_CAM_CAM_HSYNC_INV    (BIT(26))
+#define LCD_CAM_CAM_HSYNC_INV_M  (LCD_CAM_CAM_HSYNC_INV_V << LCD_CAM_CAM_HSYNC_INV_S)
+#define LCD_CAM_CAM_HSYNC_INV_V  0x00000001U
+#define LCD_CAM_CAM_HSYNC_INV_S  26
+/** LCD_CAM_CAM_VSYNC_INV : R/W; bitpos: [27]; default: 0;
+ *  CAM_VSYNC invert enable signal, valid in high level.
+ */
+#define LCD_CAM_CAM_VSYNC_INV    (BIT(27))
+#define LCD_CAM_CAM_VSYNC_INV_M  (LCD_CAM_CAM_VSYNC_INV_V << LCD_CAM_CAM_VSYNC_INV_S)
+#define LCD_CAM_CAM_VSYNC_INV_V  0x00000001U
+#define LCD_CAM_CAM_VSYNC_INV_S  27
+/** LCD_CAM_CAM_VH_DE_MODE_EN : R/W; bitpos: [28]; default: 0;
+ *  1: Input control signals are CAM_DE CAM_HSYNC and CAM_VSYNC is 1. 0: Input control
+ *  signals are CAM_DE and CAM_VSYNC. CAM_HSYNC and CAM_DE are all 1 the the same time.
+ */
+#define LCD_CAM_CAM_VH_DE_MODE_EN    (BIT(28))
+#define LCD_CAM_CAM_VH_DE_MODE_EN_M  (LCD_CAM_CAM_VH_DE_MODE_EN_V << LCD_CAM_CAM_VH_DE_MODE_EN_S)
+#define LCD_CAM_CAM_VH_DE_MODE_EN_V  0x00000001U
+#define LCD_CAM_CAM_VH_DE_MODE_EN_S  28
+/** LCD_CAM_CAM_START : R/W; bitpos: [29]; default: 0;
+ *  Camera module start signal.
+ */
+#define LCD_CAM_CAM_START    (BIT(29))
+#define LCD_CAM_CAM_START_M  (LCD_CAM_CAM_START_V << LCD_CAM_CAM_START_S)
+#define LCD_CAM_CAM_START_V  0x00000001U
+#define LCD_CAM_CAM_START_S  29
+/** LCD_CAM_CAM_RESET : WO; bitpos: [30]; default: 0;
+ *  Camera module reset signal.
+ */
+#define LCD_CAM_CAM_RESET    (BIT(30))
+#define LCD_CAM_CAM_RESET_M  (LCD_CAM_CAM_RESET_V << LCD_CAM_CAM_RESET_S)
+#define LCD_CAM_CAM_RESET_V  0x00000001U
+#define LCD_CAM_CAM_RESET_S  30
+/** LCD_CAM_CAM_AFIFO_RESET : WO; bitpos: [31]; default: 0;
+ *  Camera AFIFO reset signal.
+ */
+#define LCD_CAM_CAM_AFIFO_RESET    (BIT(31))
+#define LCD_CAM_CAM_AFIFO_RESET_M  (LCD_CAM_CAM_AFIFO_RESET_V << LCD_CAM_CAM_AFIFO_RESET_S)
+#define LCD_CAM_CAM_AFIFO_RESET_V  0x00000001U
+#define LCD_CAM_CAM_AFIFO_RESET_S  31
+
+/** LCD_CAM_CAM_RGB_YUV_REG register
+ *  Camera configuration register
+ */
+#define LCD_CAM_CAM_RGB_YUV_REG (DR_REG_LCD_CAM_BASE + 0xc)
+/** LCD_CAM_CAM_CONV_8BITS_DATA_INV : R/W; bitpos: [21]; default: 0;
+ *  1:invert every two 8bits input data. 2. disabled.
+ */
+#define LCD_CAM_CAM_CONV_8BITS_DATA_INV    (BIT(21))
+#define LCD_CAM_CAM_CONV_8BITS_DATA_INV_M  (LCD_CAM_CAM_CONV_8BITS_DATA_INV_V << LCD_CAM_CAM_CONV_8BITS_DATA_INV_S)
+#define LCD_CAM_CAM_CONV_8BITS_DATA_INV_V  0x00000001U
+#define LCD_CAM_CAM_CONV_8BITS_DATA_INV_S  21
+/** LCD_CAM_CAM_CONV_YUV2YUV_MODE : R/W; bitpos: [23:22]; default: 3;
+ *  0: to yuv422. 1: to yuv420. 2: to yuv411. 3: disabled.  To enable yuv2yuv mode,
+ *  trans_mode must be set to 1.
+ */
+#define LCD_CAM_CAM_CONV_YUV2YUV_MODE    0x00000003U
+#define LCD_CAM_CAM_CONV_YUV2YUV_MODE_M  (LCD_CAM_CAM_CONV_YUV2YUV_MODE_V << LCD_CAM_CAM_CONV_YUV2YUV_MODE_S)
+#define LCD_CAM_CAM_CONV_YUV2YUV_MODE_V  0x00000003U
+#define LCD_CAM_CAM_CONV_YUV2YUV_MODE_S  22
+/** LCD_CAM_CAM_CONV_YUV_MODE : R/W; bitpos: [25:24]; default: 0;
+ *  0: yuv422. 1: yuv420. 2: yuv411. When in yuv2yuv mode, yuv_mode decides the yuv
+ *  mode of Data_in
+ */
+#define LCD_CAM_CAM_CONV_YUV_MODE    0x00000003U
+#define LCD_CAM_CAM_CONV_YUV_MODE_M  (LCD_CAM_CAM_CONV_YUV_MODE_V << LCD_CAM_CAM_CONV_YUV_MODE_S)
+#define LCD_CAM_CAM_CONV_YUV_MODE_V  0x00000003U
+#define LCD_CAM_CAM_CONV_YUV_MODE_S  24
+/** LCD_CAM_CAM_CONV_PROTOCOL_MODE : R/W; bitpos: [26]; default: 0;
+ *  0:BT601. 1:BT709.
+ */
+#define LCD_CAM_CAM_CONV_PROTOCOL_MODE    (BIT(26))
+#define LCD_CAM_CAM_CONV_PROTOCOL_MODE_M  (LCD_CAM_CAM_CONV_PROTOCOL_MODE_V << LCD_CAM_CAM_CONV_PROTOCOL_MODE_S)
+#define LCD_CAM_CAM_CONV_PROTOCOL_MODE_V  0x00000001U
+#define LCD_CAM_CAM_CONV_PROTOCOL_MODE_S  26
+/** LCD_CAM_CAM_CONV_DATA_OUT_MODE : R/W; bitpos: [27]; default: 0;
+ *  LIMIT or FULL mode of Data out. 0: limit. 1: full
+ */
+#define LCD_CAM_CAM_CONV_DATA_OUT_MODE    (BIT(27))
+#define LCD_CAM_CAM_CONV_DATA_OUT_MODE_M  (LCD_CAM_CAM_CONV_DATA_OUT_MODE_V << LCD_CAM_CAM_CONV_DATA_OUT_MODE_S)
+#define LCD_CAM_CAM_CONV_DATA_OUT_MODE_V  0x00000001U
+#define LCD_CAM_CAM_CONV_DATA_OUT_MODE_S  27
+/** LCD_CAM_CAM_CONV_DATA_IN_MODE : R/W; bitpos: [28]; default: 0;
+ *  LIMIT or FULL mode of Data in. 0: limit. 1: full
+ */
+#define LCD_CAM_CAM_CONV_DATA_IN_MODE    (BIT(28))
+#define LCD_CAM_CAM_CONV_DATA_IN_MODE_M  (LCD_CAM_CAM_CONV_DATA_IN_MODE_V << LCD_CAM_CAM_CONV_DATA_IN_MODE_S)
+#define LCD_CAM_CAM_CONV_DATA_IN_MODE_V  0x00000001U
+#define LCD_CAM_CAM_CONV_DATA_IN_MODE_S  28
+/** LCD_CAM_CAM_CONV_MODE_8BITS_ON : R/W; bitpos: [29]; default: 0;
+ *  0: 16bits mode. 1: 8bits mode.
+ */
+#define LCD_CAM_CAM_CONV_MODE_8BITS_ON    (BIT(29))
+#define LCD_CAM_CAM_CONV_MODE_8BITS_ON_M  (LCD_CAM_CAM_CONV_MODE_8BITS_ON_V << LCD_CAM_CAM_CONV_MODE_8BITS_ON_S)
+#define LCD_CAM_CAM_CONV_MODE_8BITS_ON_V  0x00000001U
+#define LCD_CAM_CAM_CONV_MODE_8BITS_ON_S  29
+/** LCD_CAM_CAM_CONV_TRANS_MODE : R/W; bitpos: [30]; default: 0;
+ *  0: YUV to RGB. 1: RGB to YUV.
+ */
+#define LCD_CAM_CAM_CONV_TRANS_MODE    (BIT(30))
+#define LCD_CAM_CAM_CONV_TRANS_MODE_M  (LCD_CAM_CAM_CONV_TRANS_MODE_V << LCD_CAM_CAM_CONV_TRANS_MODE_S)
+#define LCD_CAM_CAM_CONV_TRANS_MODE_V  0x00000001U
+#define LCD_CAM_CAM_CONV_TRANS_MODE_S  30
+/** LCD_CAM_CAM_CONV_BYPASS : R/W; bitpos: [31]; default: 0;
+ *  0: Bypass converter. 1: Enable converter.
+ */
+#define LCD_CAM_CAM_CONV_BYPASS    (BIT(31))
+#define LCD_CAM_CAM_CONV_BYPASS_M  (LCD_CAM_CAM_CONV_BYPASS_V << LCD_CAM_CAM_CONV_BYPASS_S)
+#define LCD_CAM_CAM_CONV_BYPASS_V  0x00000001U
+#define LCD_CAM_CAM_CONV_BYPASS_S  31
+
+/** LCD_CAM_LCD_RGB_YUV_REG register
+ *  LCD configuration register
+ */
+#define LCD_CAM_LCD_RGB_YUV_REG (DR_REG_LCD_CAM_BASE + 0x10)
+/** LCD_CAM_LCD_CONV_8BITS_DATA_INV : R/W; bitpos: [20]; default: 0;
+ *  1:invert every two 8bits input data. 2. disabled.
+ */
+#define LCD_CAM_LCD_CONV_8BITS_DATA_INV    (BIT(20))
+#define LCD_CAM_LCD_CONV_8BITS_DATA_INV_M  (LCD_CAM_LCD_CONV_8BITS_DATA_INV_V << LCD_CAM_LCD_CONV_8BITS_DATA_INV_S)
+#define LCD_CAM_LCD_CONV_8BITS_DATA_INV_V  0x00000001U
+#define LCD_CAM_LCD_CONV_8BITS_DATA_INV_S  20
+/** LCD_CAM_LCD_CONV_TXTORX : R/W; bitpos: [21]; default: 0;
+ *  0: txtorx mode off. 1: txtorx mode on.
+ */
+#define LCD_CAM_LCD_CONV_TXTORX    (BIT(21))
+#define LCD_CAM_LCD_CONV_TXTORX_M  (LCD_CAM_LCD_CONV_TXTORX_V << LCD_CAM_LCD_CONV_TXTORX_S)
+#define LCD_CAM_LCD_CONV_TXTORX_V  0x00000001U
+#define LCD_CAM_LCD_CONV_TXTORX_S  21
+/** LCD_CAM_LCD_CONV_YUV2YUV_MODE : R/W; bitpos: [23:22]; default: 3;
+ *  0: to yuv422. 1: to yuv420. 2: to yuv411. 3: disabled.  To enable yuv2yuv mode,
+ *  trans_mode must be set to 1.
+ */
+#define LCD_CAM_LCD_CONV_YUV2YUV_MODE    0x00000003U
+#define LCD_CAM_LCD_CONV_YUV2YUV_MODE_M  (LCD_CAM_LCD_CONV_YUV2YUV_MODE_V << LCD_CAM_LCD_CONV_YUV2YUV_MODE_S)
+#define LCD_CAM_LCD_CONV_YUV2YUV_MODE_V  0x00000003U
+#define LCD_CAM_LCD_CONV_YUV2YUV_MODE_S  22
+/** LCD_CAM_LCD_CONV_YUV_MODE : R/W; bitpos: [25:24]; default: 0;
+ *  0: yuv422. 1: yuv420. 2: yuv411. When in yuv2yuv mode, yuv_mode decides the yuv
+ *  mode of Data_in
+ */
+#define LCD_CAM_LCD_CONV_YUV_MODE    0x00000003U
+#define LCD_CAM_LCD_CONV_YUV_MODE_M  (LCD_CAM_LCD_CONV_YUV_MODE_V << LCD_CAM_LCD_CONV_YUV_MODE_S)
+#define LCD_CAM_LCD_CONV_YUV_MODE_V  0x00000003U
+#define LCD_CAM_LCD_CONV_YUV_MODE_S  24
+/** LCD_CAM_LCD_CONV_PROTOCOL_MODE : R/W; bitpos: [26]; default: 0;
+ *  0:BT601. 1:BT709.
+ */
+#define LCD_CAM_LCD_CONV_PROTOCOL_MODE    (BIT(26))
+#define LCD_CAM_LCD_CONV_PROTOCOL_MODE_M  (LCD_CAM_LCD_CONV_PROTOCOL_MODE_V << LCD_CAM_LCD_CONV_PROTOCOL_MODE_S)
+#define LCD_CAM_LCD_CONV_PROTOCOL_MODE_V  0x00000001U
+#define LCD_CAM_LCD_CONV_PROTOCOL_MODE_S  26
+/** LCD_CAM_LCD_CONV_DATA_OUT_MODE : R/W; bitpos: [27]; default: 0;
+ *  LIMIT or FULL mode of Data out. 0: limit. 1: full
+ */
+#define LCD_CAM_LCD_CONV_DATA_OUT_MODE    (BIT(27))
+#define LCD_CAM_LCD_CONV_DATA_OUT_MODE_M  (LCD_CAM_LCD_CONV_DATA_OUT_MODE_V << LCD_CAM_LCD_CONV_DATA_OUT_MODE_S)
+#define LCD_CAM_LCD_CONV_DATA_OUT_MODE_V  0x00000001U
+#define LCD_CAM_LCD_CONV_DATA_OUT_MODE_S  27
+/** LCD_CAM_LCD_CONV_DATA_IN_MODE : R/W; bitpos: [28]; default: 0;
+ *  LIMIT or FULL mode of Data in. 0: limit. 1: full
+ */
+#define LCD_CAM_LCD_CONV_DATA_IN_MODE    (BIT(28))
+#define LCD_CAM_LCD_CONV_DATA_IN_MODE_M  (LCD_CAM_LCD_CONV_DATA_IN_MODE_V << LCD_CAM_LCD_CONV_DATA_IN_MODE_S)
+#define LCD_CAM_LCD_CONV_DATA_IN_MODE_V  0x00000001U
+#define LCD_CAM_LCD_CONV_DATA_IN_MODE_S  28
+/** LCD_CAM_LCD_CONV_MODE_8BITS_ON : R/W; bitpos: [29]; default: 0;
+ *  0: 16bits mode. 1: 8bits mode.
+ */
+#define LCD_CAM_LCD_CONV_MODE_8BITS_ON    (BIT(29))
+#define LCD_CAM_LCD_CONV_MODE_8BITS_ON_M  (LCD_CAM_LCD_CONV_MODE_8BITS_ON_V << LCD_CAM_LCD_CONV_MODE_8BITS_ON_S)
+#define LCD_CAM_LCD_CONV_MODE_8BITS_ON_V  0x00000001U
+#define LCD_CAM_LCD_CONV_MODE_8BITS_ON_S  29
+/** LCD_CAM_LCD_CONV_TRANS_MODE : R/W; bitpos: [30]; default: 0;
+ *  0: YUV to RGB. 1: RGB to YUV.
+ */
+#define LCD_CAM_LCD_CONV_TRANS_MODE    (BIT(30))
+#define LCD_CAM_LCD_CONV_TRANS_MODE_M  (LCD_CAM_LCD_CONV_TRANS_MODE_V << LCD_CAM_LCD_CONV_TRANS_MODE_S)
+#define LCD_CAM_LCD_CONV_TRANS_MODE_V  0x00000001U
+#define LCD_CAM_LCD_CONV_TRANS_MODE_S  30
+/** LCD_CAM_LCD_CONV_BYPASS : R/W; bitpos: [31]; default: 0;
+ *  0: Bypass converter. 1: Enable converter.
+ */
+#define LCD_CAM_LCD_CONV_BYPASS    (BIT(31))
+#define LCD_CAM_LCD_CONV_BYPASS_M  (LCD_CAM_LCD_CONV_BYPASS_V << LCD_CAM_LCD_CONV_BYPASS_S)
+#define LCD_CAM_LCD_CONV_BYPASS_V  0x00000001U
+#define LCD_CAM_LCD_CONV_BYPASS_S  31
+
+/** LCD_CAM_LCD_USER_REG register
+ *  LCD configuration register
+ */
+#define LCD_CAM_LCD_USER_REG (DR_REG_LCD_CAM_BASE + 0x14)
+/** LCD_CAM_LCD_DOUT_CYCLELEN : R/W; bitpos: [12:0]; default: 1;
+ *  The output data cycles minus 1 of LCD module.
+ */
+#define LCD_CAM_LCD_DOUT_CYCLELEN    0x00001FFFU
+#define LCD_CAM_LCD_DOUT_CYCLELEN_M  (LCD_CAM_LCD_DOUT_CYCLELEN_V << LCD_CAM_LCD_DOUT_CYCLELEN_S)
+#define LCD_CAM_LCD_DOUT_CYCLELEN_V  0x00001FFFU
+#define LCD_CAM_LCD_DOUT_CYCLELEN_S  0
+/** LCD_CAM_LCD_ALWAYS_OUT_EN : R/W; bitpos: [13]; default: 0;
+ *  LCD always output when LCD is in LCD_DOUT state, unless reg_lcd_start is cleared or
+ *  reg_lcd_reset is set.
+ */
+#define LCD_CAM_LCD_ALWAYS_OUT_EN    (BIT(13))
+#define LCD_CAM_LCD_ALWAYS_OUT_EN_M  (LCD_CAM_LCD_ALWAYS_OUT_EN_V << LCD_CAM_LCD_ALWAYS_OUT_EN_S)
+#define LCD_CAM_LCD_ALWAYS_OUT_EN_V  0x00000001U
+#define LCD_CAM_LCD_ALWAYS_OUT_EN_S  13
+/** LCD_CAM_LCD_8BITS_ORDER : R/W; bitpos: [19]; default: 0;
+ *  1: invert every two data byte, valid in 1 byte mode. 0: Not change.
+ */
+#define LCD_CAM_LCD_8BITS_ORDER    (BIT(19))
+#define LCD_CAM_LCD_8BITS_ORDER_M  (LCD_CAM_LCD_8BITS_ORDER_V << LCD_CAM_LCD_8BITS_ORDER_S)
+#define LCD_CAM_LCD_8BITS_ORDER_V  0x00000001U
+#define LCD_CAM_LCD_8BITS_ORDER_S  19
+/** LCD_CAM_LCD_UPDATE_REG : R/W; bitpos: [20]; default: 0;
+ *  1: Update LCD registers, will be cleared by hardware. 0 : Not care.
+ */
+#define LCD_CAM_LCD_UPDATE_REG    (BIT(20))
+#define LCD_CAM_LCD_UPDATE_REG_M  (LCD_CAM_LCD_UPDATE_REG_V << LCD_CAM_LCD_UPDATE_REG_S)
+#define LCD_CAM_LCD_UPDATE_REG_V  0x00000001U
+#define LCD_CAM_LCD_UPDATE_REG_S  20
+/** LCD_CAM_LCD_BIT_ORDER : R/W; bitpos: [21]; default: 0;
+ *  1: Change data bit order, change LCD_DATA_out[7:0] to LCD_DATA_out[0:7] in one byte
+ *  mode, and bits[15:0] to bits[0:15] in two byte mode.  0: Not change.
+ */
+#define LCD_CAM_LCD_BIT_ORDER    (BIT(21))
+#define LCD_CAM_LCD_BIT_ORDER_M  (LCD_CAM_LCD_BIT_ORDER_V << LCD_CAM_LCD_BIT_ORDER_S)
+#define LCD_CAM_LCD_BIT_ORDER_V  0x00000001U
+#define LCD_CAM_LCD_BIT_ORDER_S  21
+/** LCD_CAM_LCD_BYTE_ORDER : R/W; bitpos: [22]; default: 0;
+ *  1: invert data byte order, only valid in 2 byte mode. 0: Not change.
+ */
+#define LCD_CAM_LCD_BYTE_ORDER    (BIT(22))
+#define LCD_CAM_LCD_BYTE_ORDER_M  (LCD_CAM_LCD_BYTE_ORDER_V << LCD_CAM_LCD_BYTE_ORDER_S)
+#define LCD_CAM_LCD_BYTE_ORDER_V  0x00000001U
+#define LCD_CAM_LCD_BYTE_ORDER_S  22
+/** LCD_CAM_LCD_2BYTE_EN : R/W; bitpos: [23]; default: 0;
+ *  1: The bit number of output LCD data is 9~16.  0: The bit number of output LCD data
+ *  is 0~8.
+ */
+#define LCD_CAM_LCD_2BYTE_EN    (BIT(23))
+#define LCD_CAM_LCD_2BYTE_EN_M  (LCD_CAM_LCD_2BYTE_EN_V << LCD_CAM_LCD_2BYTE_EN_S)
+#define LCD_CAM_LCD_2BYTE_EN_V  0x00000001U
+#define LCD_CAM_LCD_2BYTE_EN_S  23
+/** LCD_CAM_LCD_DOUT : R/W; bitpos: [24]; default: 0;
+ *  1: Be able to send data out in LCD sequence when LCD starts. 0: Disable.
+ */
+#define LCD_CAM_LCD_DOUT    (BIT(24))
+#define LCD_CAM_LCD_DOUT_M  (LCD_CAM_LCD_DOUT_V << LCD_CAM_LCD_DOUT_S)
+#define LCD_CAM_LCD_DOUT_V  0x00000001U
+#define LCD_CAM_LCD_DOUT_S  24
+/** LCD_CAM_LCD_DUMMY : R/W; bitpos: [25]; default: 0;
+ *  1: Enable DUMMY phase in LCD sequence when LCD starts. 0: Disable.
+ */
+#define LCD_CAM_LCD_DUMMY    (BIT(25))
+#define LCD_CAM_LCD_DUMMY_M  (LCD_CAM_LCD_DUMMY_V << LCD_CAM_LCD_DUMMY_S)
+#define LCD_CAM_LCD_DUMMY_V  0x00000001U
+#define LCD_CAM_LCD_DUMMY_S  25
+/** LCD_CAM_LCD_CMD : R/W; bitpos: [26]; default: 0;
+ *  1: Be able to send command in LCD sequence when LCD starts. 0: Disable.
+ */
+#define LCD_CAM_LCD_CMD    (BIT(26))
+#define LCD_CAM_LCD_CMD_M  (LCD_CAM_LCD_CMD_V << LCD_CAM_LCD_CMD_S)
+#define LCD_CAM_LCD_CMD_V  0x00000001U
+#define LCD_CAM_LCD_CMD_S  26
+/** LCD_CAM_LCD_START : R/W; bitpos: [27]; default: 0;
+ *  LCD start sending data enable signal, valid in high level.
+ */
+#define LCD_CAM_LCD_START    (BIT(27))
+#define LCD_CAM_LCD_START_M  (LCD_CAM_LCD_START_V << LCD_CAM_LCD_START_S)
+#define LCD_CAM_LCD_START_V  0x00000001U
+#define LCD_CAM_LCD_START_S  27
+/** LCD_CAM_LCD_RESET : WO; bitpos: [28]; default: 0;
+ *  The value of  command.
+ */
+#define LCD_CAM_LCD_RESET    (BIT(28))
+#define LCD_CAM_LCD_RESET_M  (LCD_CAM_LCD_RESET_V << LCD_CAM_LCD_RESET_S)
+#define LCD_CAM_LCD_RESET_V  0x00000001U
+#define LCD_CAM_LCD_RESET_S  28
+/** LCD_CAM_LCD_DUMMY_CYCLELEN : R/W; bitpos: [30:29]; default: 0;
+ *  The dummy cycle length minus 1.
+ */
+#define LCD_CAM_LCD_DUMMY_CYCLELEN    0x00000003U
+#define LCD_CAM_LCD_DUMMY_CYCLELEN_M  (LCD_CAM_LCD_DUMMY_CYCLELEN_V << LCD_CAM_LCD_DUMMY_CYCLELEN_S)
+#define LCD_CAM_LCD_DUMMY_CYCLELEN_V  0x00000003U
+#define LCD_CAM_LCD_DUMMY_CYCLELEN_S  29
+/** LCD_CAM_LCD_CMD_2_CYCLE_EN : R/W; bitpos: [31]; default: 0;
+ *  The cycle length of command phase.  1: 2 cycles. 0: 1 cycle.
+ */
+#define LCD_CAM_LCD_CMD_2_CYCLE_EN    (BIT(31))
+#define LCD_CAM_LCD_CMD_2_CYCLE_EN_M  (LCD_CAM_LCD_CMD_2_CYCLE_EN_V << LCD_CAM_LCD_CMD_2_CYCLE_EN_S)
+#define LCD_CAM_LCD_CMD_2_CYCLE_EN_V  0x00000001U
+#define LCD_CAM_LCD_CMD_2_CYCLE_EN_S  31
+
+/** LCD_CAM_LCD_MISC_REG register
+ *  LCD configuration register
+ */
+#define LCD_CAM_LCD_MISC_REG (DR_REG_LCD_CAM_BASE + 0x18)
+/** LCD_CAM_LCD_AFIFO_THRESHOLD_NUM : R/W; bitpos: [5:1]; default: 11;
+ *  The awfull threshold number of lcd_afifo.
+ */
+#define LCD_CAM_LCD_AFIFO_THRESHOLD_NUM    0x0000001FU
+#define LCD_CAM_LCD_AFIFO_THRESHOLD_NUM_M  (LCD_CAM_LCD_AFIFO_THRESHOLD_NUM_V << LCD_CAM_LCD_AFIFO_THRESHOLD_NUM_S)
+#define LCD_CAM_LCD_AFIFO_THRESHOLD_NUM_V  0x0000001FU
+#define LCD_CAM_LCD_AFIFO_THRESHOLD_NUM_S  1
+/** LCD_CAM_LCD_VFK_CYCLELEN : R/W; bitpos: [11:6]; default: 3;
+ *  The setup cycle length minus 1 in LCD non-RGB mode.
+ */
+#define LCD_CAM_LCD_VFK_CYCLELEN    0x0000003FU
+#define LCD_CAM_LCD_VFK_CYCLELEN_M  (LCD_CAM_LCD_VFK_CYCLELEN_V << LCD_CAM_LCD_VFK_CYCLELEN_S)
+#define LCD_CAM_LCD_VFK_CYCLELEN_V  0x0000003FU
+#define LCD_CAM_LCD_VFK_CYCLELEN_S  6
+/** LCD_CAM_LCD_VBK_CYCLELEN : R/W; bitpos: [24:12]; default: 0;
+ *  The vertical back blank region cycle length minus 1 in LCD RGB mode, or the hold
+ *  time cycle length in LCD non-RGB mode.
+ */
+#define LCD_CAM_LCD_VBK_CYCLELEN    0x00001FFFU
+#define LCD_CAM_LCD_VBK_CYCLELEN_M  (LCD_CAM_LCD_VBK_CYCLELEN_V << LCD_CAM_LCD_VBK_CYCLELEN_S)
+#define LCD_CAM_LCD_VBK_CYCLELEN_V  0x00001FFFU
+#define LCD_CAM_LCD_VBK_CYCLELEN_S  12
+/** LCD_CAM_LCD_NEXT_FRAME_EN : R/W; bitpos: [25]; default: 0;
+ *  1: Send the next frame data when the current frame is sent out. 0: LCD stops when
+ *  the current frame is sent out.
+ */
+#define LCD_CAM_LCD_NEXT_FRAME_EN    (BIT(25))
+#define LCD_CAM_LCD_NEXT_FRAME_EN_M  (LCD_CAM_LCD_NEXT_FRAME_EN_V << LCD_CAM_LCD_NEXT_FRAME_EN_S)
+#define LCD_CAM_LCD_NEXT_FRAME_EN_V  0x00000001U
+#define LCD_CAM_LCD_NEXT_FRAME_EN_S  25
+/** LCD_CAM_LCD_BK_EN : R/W; bitpos: [26]; default: 0;
+ *  1: Enable blank region when LCD sends data out. 0: No blank region.
+ */
+#define LCD_CAM_LCD_BK_EN    (BIT(26))
+#define LCD_CAM_LCD_BK_EN_M  (LCD_CAM_LCD_BK_EN_V << LCD_CAM_LCD_BK_EN_S)
+#define LCD_CAM_LCD_BK_EN_V  0x00000001U
+#define LCD_CAM_LCD_BK_EN_S  26
+/** LCD_CAM_LCD_AFIFO_RESET : WO; bitpos: [27]; default: 0;
+ *  LCD AFIFO reset signal.
+ */
+#define LCD_CAM_LCD_AFIFO_RESET    (BIT(27))
+#define LCD_CAM_LCD_AFIFO_RESET_M  (LCD_CAM_LCD_AFIFO_RESET_V << LCD_CAM_LCD_AFIFO_RESET_S)
+#define LCD_CAM_LCD_AFIFO_RESET_V  0x00000001U
+#define LCD_CAM_LCD_AFIFO_RESET_S  27
+/** LCD_CAM_LCD_CD_DATA_SET : R/W; bitpos: [28]; default: 0;
+ *  1: LCD_CD = !reg_cd_idle_edge when lcd_st[2:0] is in LCD_DOUT state.  0: LCD_CD =
+ *  reg_cd_idle_edge.
+ */
+#define LCD_CAM_LCD_CD_DATA_SET    (BIT(28))
+#define LCD_CAM_LCD_CD_DATA_SET_M  (LCD_CAM_LCD_CD_DATA_SET_V << LCD_CAM_LCD_CD_DATA_SET_S)
+#define LCD_CAM_LCD_CD_DATA_SET_V  0x00000001U
+#define LCD_CAM_LCD_CD_DATA_SET_S  28
+/** LCD_CAM_LCD_CD_DUMMY_SET : R/W; bitpos: [29]; default: 0;
+ *  1: LCD_CD = !reg_cd_idle_edge when lcd_st[2:0] is in LCD_DUMMY state.  0: LCD_CD =
+ *  reg_cd_idle_edge.
+ */
+#define LCD_CAM_LCD_CD_DUMMY_SET    (BIT(29))
+#define LCD_CAM_LCD_CD_DUMMY_SET_M  (LCD_CAM_LCD_CD_DUMMY_SET_V << LCD_CAM_LCD_CD_DUMMY_SET_S)
+#define LCD_CAM_LCD_CD_DUMMY_SET_V  0x00000001U
+#define LCD_CAM_LCD_CD_DUMMY_SET_S  29
+/** LCD_CAM_LCD_CD_CMD_SET : R/W; bitpos: [30]; default: 0;
+ *  1: LCD_CD = !reg_cd_idle_edge when lcd_st[2:0] is in LCD_CMD state.  0: LCD_CD =
+ *  reg_cd_idle_edge.
+ */
+#define LCD_CAM_LCD_CD_CMD_SET    (BIT(30))
+#define LCD_CAM_LCD_CD_CMD_SET_M  (LCD_CAM_LCD_CD_CMD_SET_V << LCD_CAM_LCD_CD_CMD_SET_S)
+#define LCD_CAM_LCD_CD_CMD_SET_V  0x00000001U
+#define LCD_CAM_LCD_CD_CMD_SET_S  30
+/** LCD_CAM_LCD_CD_IDLE_EDGE : R/W; bitpos: [31]; default: 0;
+ *  The default value of LCD_CD.
+ */
+#define LCD_CAM_LCD_CD_IDLE_EDGE    (BIT(31))
+#define LCD_CAM_LCD_CD_IDLE_EDGE_M  (LCD_CAM_LCD_CD_IDLE_EDGE_V << LCD_CAM_LCD_CD_IDLE_EDGE_S)
+#define LCD_CAM_LCD_CD_IDLE_EDGE_V  0x00000001U
+#define LCD_CAM_LCD_CD_IDLE_EDGE_S  31
+
+/** LCD_CAM_LCD_CTRL_REG register
+ *  LCD configuration register
+ */
+#define LCD_CAM_LCD_CTRL_REG (DR_REG_LCD_CAM_BASE + 0x1c)
+/** LCD_CAM_LCD_HB_FRONT : R/W; bitpos: [10:0]; default: 0;
+ *  It is the horizontal blank front porch of a frame.
+ */
+#define LCD_CAM_LCD_HB_FRONT    0x000007FFU
+#define LCD_CAM_LCD_HB_FRONT_M  (LCD_CAM_LCD_HB_FRONT_V << LCD_CAM_LCD_HB_FRONT_S)
+#define LCD_CAM_LCD_HB_FRONT_V  0x000007FFU
+#define LCD_CAM_LCD_HB_FRONT_S  0
+/** LCD_CAM_LCD_VA_HEIGHT : R/W; bitpos: [20:11]; default: 0;
+ *  It is the vertical active height of a frame.
+ */
+#define LCD_CAM_LCD_VA_HEIGHT    0x000003FFU
+#define LCD_CAM_LCD_VA_HEIGHT_M  (LCD_CAM_LCD_VA_HEIGHT_V << LCD_CAM_LCD_VA_HEIGHT_S)
+#define LCD_CAM_LCD_VA_HEIGHT_V  0x000003FFU
+#define LCD_CAM_LCD_VA_HEIGHT_S  11
+/** LCD_CAM_LCD_VT_HEIGHT : R/W; bitpos: [30:21]; default: 0;
+ *  It is the vertical total height of a frame.
+ */
+#define LCD_CAM_LCD_VT_HEIGHT    0x000003FFU
+#define LCD_CAM_LCD_VT_HEIGHT_M  (LCD_CAM_LCD_VT_HEIGHT_V << LCD_CAM_LCD_VT_HEIGHT_S)
+#define LCD_CAM_LCD_VT_HEIGHT_V  0x000003FFU
+#define LCD_CAM_LCD_VT_HEIGHT_S  21
+/** LCD_CAM_LCD_RGB_MODE_EN : R/W; bitpos: [31]; default: 0;
+ *  1: Enable reg mode input vsync, hsync, de. 0: Disable.
+ */
+#define LCD_CAM_LCD_RGB_MODE_EN    (BIT(31))
+#define LCD_CAM_LCD_RGB_MODE_EN_M  (LCD_CAM_LCD_RGB_MODE_EN_V << LCD_CAM_LCD_RGB_MODE_EN_S)
+#define LCD_CAM_LCD_RGB_MODE_EN_V  0x00000001U
+#define LCD_CAM_LCD_RGB_MODE_EN_S  31
+
+/** LCD_CAM_LCD_CTRL1_REG register
+ *  LCD configuration register
+ */
+#define LCD_CAM_LCD_CTRL1_REG (DR_REG_LCD_CAM_BASE + 0x20)
+/** LCD_CAM_LCD_VB_FRONT : R/W; bitpos: [7:0]; default: 0;
+ *  It is the vertical blank front porch of a frame.
+ */
+#define LCD_CAM_LCD_VB_FRONT    0x000000FFU
+#define LCD_CAM_LCD_VB_FRONT_M  (LCD_CAM_LCD_VB_FRONT_V << LCD_CAM_LCD_VB_FRONT_S)
+#define LCD_CAM_LCD_VB_FRONT_V  0x000000FFU
+#define LCD_CAM_LCD_VB_FRONT_S  0
+/** LCD_CAM_LCD_HA_WIDTH : R/W; bitpos: [19:8]; default: 0;
+ *  It is the horizontal active width of a frame.
+ */
+#define LCD_CAM_LCD_HA_WIDTH    0x00000FFFU
+#define LCD_CAM_LCD_HA_WIDTH_M  (LCD_CAM_LCD_HA_WIDTH_V << LCD_CAM_LCD_HA_WIDTH_S)
+#define LCD_CAM_LCD_HA_WIDTH_V  0x00000FFFU
+#define LCD_CAM_LCD_HA_WIDTH_S  8
+/** LCD_CAM_LCD_HT_WIDTH : R/W; bitpos: [31:20]; default: 0;
+ *  It is the horizontal total width of a frame.
+ */
+#define LCD_CAM_LCD_HT_WIDTH    0x00000FFFU
+#define LCD_CAM_LCD_HT_WIDTH_M  (LCD_CAM_LCD_HT_WIDTH_V << LCD_CAM_LCD_HT_WIDTH_S)
+#define LCD_CAM_LCD_HT_WIDTH_V  0x00000FFFU
+#define LCD_CAM_LCD_HT_WIDTH_S  20
+
+/** LCD_CAM_LCD_CTRL2_REG register
+ *  LCD configuration register
+ */
+#define LCD_CAM_LCD_CTRL2_REG (DR_REG_LCD_CAM_BASE + 0x24)
+/** LCD_CAM_LCD_VSYNC_WIDTH : R/W; bitpos: [6:0]; default: 1;
+ *  It is the position of LCD_VSYNC active pulse in a line.
+ */
+#define LCD_CAM_LCD_VSYNC_WIDTH    0x0000007FU
+#define LCD_CAM_LCD_VSYNC_WIDTH_M  (LCD_CAM_LCD_VSYNC_WIDTH_V << LCD_CAM_LCD_VSYNC_WIDTH_S)
+#define LCD_CAM_LCD_VSYNC_WIDTH_V  0x0000007FU
+#define LCD_CAM_LCD_VSYNC_WIDTH_S  0
+/** LCD_CAM_LCD_VSYNC_IDLE_POL : R/W; bitpos: [7]; default: 0;
+ *  It is the idle value of LCD_VSYNC.
+ */
+#define LCD_CAM_LCD_VSYNC_IDLE_POL    (BIT(7))
+#define LCD_CAM_LCD_VSYNC_IDLE_POL_M  (LCD_CAM_LCD_VSYNC_IDLE_POL_V << LCD_CAM_LCD_VSYNC_IDLE_POL_S)
+#define LCD_CAM_LCD_VSYNC_IDLE_POL_V  0x00000001U
+#define LCD_CAM_LCD_VSYNC_IDLE_POL_S  7
+/** LCD_CAM_LCD_DE_IDLE_POL : R/W; bitpos: [8]; default: 0;
+ *  It is the idle value of LCD_DE.
+ */
+#define LCD_CAM_LCD_DE_IDLE_POL    (BIT(8))
+#define LCD_CAM_LCD_DE_IDLE_POL_M  (LCD_CAM_LCD_DE_IDLE_POL_V << LCD_CAM_LCD_DE_IDLE_POL_S)
+#define LCD_CAM_LCD_DE_IDLE_POL_V  0x00000001U
+#define LCD_CAM_LCD_DE_IDLE_POL_S  8
+/** LCD_CAM_LCD_HS_BLANK_EN : R/W; bitpos: [9]; default: 0;
+ *  1: The pulse of LCD_HSYNC is out in vertical blanking lines RGB mode. 0: LCD_HSYNC
+ *  pulse is valid only in active region lines in RGB mode.
+ */
+#define LCD_CAM_LCD_HS_BLANK_EN    (BIT(9))
+#define LCD_CAM_LCD_HS_BLANK_EN_M  (LCD_CAM_LCD_HS_BLANK_EN_V << LCD_CAM_LCD_HS_BLANK_EN_S)
+#define LCD_CAM_LCD_HS_BLANK_EN_V  0x00000001U
+#define LCD_CAM_LCD_HS_BLANK_EN_S  9
+/** LCD_CAM_LCD_HSYNC_WIDTH : R/W; bitpos: [22:16]; default: 1;
+ *  It is the position of LCD_HSYNC active pulse in a line.
+ */
+#define LCD_CAM_LCD_HSYNC_WIDTH    0x0000007FU
+#define LCD_CAM_LCD_HSYNC_WIDTH_M  (LCD_CAM_LCD_HSYNC_WIDTH_V << LCD_CAM_LCD_HSYNC_WIDTH_S)
+#define LCD_CAM_LCD_HSYNC_WIDTH_V  0x0000007FU
+#define LCD_CAM_LCD_HSYNC_WIDTH_S  16
+/** LCD_CAM_LCD_HSYNC_IDLE_POL : R/W; bitpos: [23]; default: 0;
+ *  It is the idle value of LCD_HSYNC.
+ */
+#define LCD_CAM_LCD_HSYNC_IDLE_POL    (BIT(23))
+#define LCD_CAM_LCD_HSYNC_IDLE_POL_M  (LCD_CAM_LCD_HSYNC_IDLE_POL_V << LCD_CAM_LCD_HSYNC_IDLE_POL_S)
+#define LCD_CAM_LCD_HSYNC_IDLE_POL_V  0x00000001U
+#define LCD_CAM_LCD_HSYNC_IDLE_POL_S  23
+/** LCD_CAM_LCD_HSYNC_POSITION : R/W; bitpos: [31:24]; default: 0;
+ *  It is the position of LCD_HSYNC active pulse in a line.
+ */
+#define LCD_CAM_LCD_HSYNC_POSITION    0x000000FFU
+#define LCD_CAM_LCD_HSYNC_POSITION_M  (LCD_CAM_LCD_HSYNC_POSITION_V << LCD_CAM_LCD_HSYNC_POSITION_S)
+#define LCD_CAM_LCD_HSYNC_POSITION_V  0x000000FFU
+#define LCD_CAM_LCD_HSYNC_POSITION_S  24
+
+/** LCD_CAM_LCD_CMD_VAL_REG register
+ *  LCD configuration register
+ */
+#define LCD_CAM_LCD_CMD_VAL_REG (DR_REG_LCD_CAM_BASE + 0x28)
+/** LCD_CAM_LCD_CMD_VALUE : R/W; bitpos: [31:0]; default: 0;
+ *  The LCD write command value.
+ */
+#define LCD_CAM_LCD_CMD_VALUE    0xFFFFFFFFU
+#define LCD_CAM_LCD_CMD_VALUE_M  (LCD_CAM_LCD_CMD_VALUE_V << LCD_CAM_LCD_CMD_VALUE_S)
+#define LCD_CAM_LCD_CMD_VALUE_V  0xFFFFFFFFU
+#define LCD_CAM_LCD_CMD_VALUE_S  0
+
+/** LCD_CAM_LCD_DLY_MODE_REG register
+ *  LCD configuration register
+ */
+#define LCD_CAM_LCD_DLY_MODE_REG (DR_REG_LCD_CAM_BASE + 0x30)
+/** LCD_CAM_LCD_CD_MODE : R/W; bitpos: [1:0]; default: 0;
+ *  The output LCD_CD is delayed by module clock LCD_CLK. 0: output without delayed. 1:
+ *  delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
+ */
+#define LCD_CAM_LCD_CD_MODE    0x00000003U
+#define LCD_CAM_LCD_CD_MODE_M  (LCD_CAM_LCD_CD_MODE_V << LCD_CAM_LCD_CD_MODE_S)
+#define LCD_CAM_LCD_CD_MODE_V  0x00000003U
+#define LCD_CAM_LCD_CD_MODE_S  0
+/** LCD_CAM_LCD_DE_MODE : R/W; bitpos: [3:2]; default: 0;
+ *  The output LCD_DE is delayed by module clock LCD_CLK. 0: output without delayed. 1:
+ *  delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
+ */
+#define LCD_CAM_LCD_DE_MODE    0x00000003U
+#define LCD_CAM_LCD_DE_MODE_M  (LCD_CAM_LCD_DE_MODE_V << LCD_CAM_LCD_DE_MODE_S)
+#define LCD_CAM_LCD_DE_MODE_V  0x00000003U
+#define LCD_CAM_LCD_DE_MODE_S  2
+/** LCD_CAM_LCD_HSYNC_MODE : R/W; bitpos: [5:4]; default: 0;
+ *  The output LCD_HSYNC is delayed by module clock LCD_CLK. 0: output without delayed.
+ *  1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
+ */
+#define LCD_CAM_LCD_HSYNC_MODE    0x00000003U
+#define LCD_CAM_LCD_HSYNC_MODE_M  (LCD_CAM_LCD_HSYNC_MODE_V << LCD_CAM_LCD_HSYNC_MODE_S)
+#define LCD_CAM_LCD_HSYNC_MODE_V  0x00000003U
+#define LCD_CAM_LCD_HSYNC_MODE_S  4
+/** LCD_CAM_LCD_VSYNC_MODE : R/W; bitpos: [7:6]; default: 0;
+ *  The output LCD_VSYNC is delayed by module clock LCD_CLK. 0: output without delayed.
+ *  1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
+ */
+#define LCD_CAM_LCD_VSYNC_MODE    0x00000003U
+#define LCD_CAM_LCD_VSYNC_MODE_M  (LCD_CAM_LCD_VSYNC_MODE_V << LCD_CAM_LCD_VSYNC_MODE_S)
+#define LCD_CAM_LCD_VSYNC_MODE_V  0x00000003U
+#define LCD_CAM_LCD_VSYNC_MODE_S  6
+
+/** LCD_CAM_LCD_DATA_DOUT_MODE_REG register
+ *  LCD configuration register
+ */
+#define LCD_CAM_LCD_DATA_DOUT_MODE_REG (DR_REG_LCD_CAM_BASE + 0x38)
+/** LCD_CAM_DOUT0_MODE : R/W; bitpos: [1:0]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT0_MODE    0x00000003U
+#define LCD_CAM_DOUT0_MODE_M  (LCD_CAM_DOUT0_MODE_V << LCD_CAM_DOUT0_MODE_S)
+#define LCD_CAM_DOUT0_MODE_V  0x00000003U
+#define LCD_CAM_DOUT0_MODE_S  0
+/** LCD_CAM_DOUT1_MODE : R/W; bitpos: [3:2]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT1_MODE    0x00000003U
+#define LCD_CAM_DOUT1_MODE_M  (LCD_CAM_DOUT1_MODE_V << LCD_CAM_DOUT1_MODE_S)
+#define LCD_CAM_DOUT1_MODE_V  0x00000003U
+#define LCD_CAM_DOUT1_MODE_S  2
+/** LCD_CAM_DOUT2_MODE : R/W; bitpos: [5:4]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT2_MODE    0x00000003U
+#define LCD_CAM_DOUT2_MODE_M  (LCD_CAM_DOUT2_MODE_V << LCD_CAM_DOUT2_MODE_S)
+#define LCD_CAM_DOUT2_MODE_V  0x00000003U
+#define LCD_CAM_DOUT2_MODE_S  4
+/** LCD_CAM_DOUT3_MODE : R/W; bitpos: [7:6]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT3_MODE    0x00000003U
+#define LCD_CAM_DOUT3_MODE_M  (LCD_CAM_DOUT3_MODE_V << LCD_CAM_DOUT3_MODE_S)
+#define LCD_CAM_DOUT3_MODE_V  0x00000003U
+#define LCD_CAM_DOUT3_MODE_S  6
+/** LCD_CAM_DOUT4_MODE : R/W; bitpos: [9:8]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT4_MODE    0x00000003U
+#define LCD_CAM_DOUT4_MODE_M  (LCD_CAM_DOUT4_MODE_V << LCD_CAM_DOUT4_MODE_S)
+#define LCD_CAM_DOUT4_MODE_V  0x00000003U
+#define LCD_CAM_DOUT4_MODE_S  8
+/** LCD_CAM_DOUT5_MODE : R/W; bitpos: [11:10]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT5_MODE    0x00000003U
+#define LCD_CAM_DOUT5_MODE_M  (LCD_CAM_DOUT5_MODE_V << LCD_CAM_DOUT5_MODE_S)
+#define LCD_CAM_DOUT5_MODE_V  0x00000003U
+#define LCD_CAM_DOUT5_MODE_S  10
+/** LCD_CAM_DOUT6_MODE : R/W; bitpos: [13:12]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT6_MODE    0x00000003U
+#define LCD_CAM_DOUT6_MODE_M  (LCD_CAM_DOUT6_MODE_V << LCD_CAM_DOUT6_MODE_S)
+#define LCD_CAM_DOUT6_MODE_V  0x00000003U
+#define LCD_CAM_DOUT6_MODE_S  12
+/** LCD_CAM_DOUT7_MODE : R/W; bitpos: [15:14]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT7_MODE    0x00000003U
+#define LCD_CAM_DOUT7_MODE_M  (LCD_CAM_DOUT7_MODE_V << LCD_CAM_DOUT7_MODE_S)
+#define LCD_CAM_DOUT7_MODE_V  0x00000003U
+#define LCD_CAM_DOUT7_MODE_S  14
+/** LCD_CAM_DOUT8_MODE : R/W; bitpos: [17:16]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT8_MODE    0x00000003U
+#define LCD_CAM_DOUT8_MODE_M  (LCD_CAM_DOUT8_MODE_V << LCD_CAM_DOUT8_MODE_S)
+#define LCD_CAM_DOUT8_MODE_V  0x00000003U
+#define LCD_CAM_DOUT8_MODE_S  16
+/** LCD_CAM_DOUT9_MODE : R/W; bitpos: [19:18]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT9_MODE    0x00000003U
+#define LCD_CAM_DOUT9_MODE_M  (LCD_CAM_DOUT9_MODE_V << LCD_CAM_DOUT9_MODE_S)
+#define LCD_CAM_DOUT9_MODE_V  0x00000003U
+#define LCD_CAM_DOUT9_MODE_S  18
+/** LCD_CAM_DOUT10_MODE : R/W; bitpos: [21:20]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT10_MODE    0x00000003U
+#define LCD_CAM_DOUT10_MODE_M  (LCD_CAM_DOUT10_MODE_V << LCD_CAM_DOUT10_MODE_S)
+#define LCD_CAM_DOUT10_MODE_V  0x00000003U
+#define LCD_CAM_DOUT10_MODE_S  20
+/** LCD_CAM_DOUT11_MODE : R/W; bitpos: [23:22]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT11_MODE    0x00000003U
+#define LCD_CAM_DOUT11_MODE_M  (LCD_CAM_DOUT11_MODE_V << LCD_CAM_DOUT11_MODE_S)
+#define LCD_CAM_DOUT11_MODE_V  0x00000003U
+#define LCD_CAM_DOUT11_MODE_S  22
+/** LCD_CAM_DOUT12_MODE : R/W; bitpos: [25:24]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT12_MODE    0x00000003U
+#define LCD_CAM_DOUT12_MODE_M  (LCD_CAM_DOUT12_MODE_V << LCD_CAM_DOUT12_MODE_S)
+#define LCD_CAM_DOUT12_MODE_V  0x00000003U
+#define LCD_CAM_DOUT12_MODE_S  24
+/** LCD_CAM_DOUT13_MODE : R/W; bitpos: [27:26]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT13_MODE    0x00000003U
+#define LCD_CAM_DOUT13_MODE_M  (LCD_CAM_DOUT13_MODE_V << LCD_CAM_DOUT13_MODE_S)
+#define LCD_CAM_DOUT13_MODE_V  0x00000003U
+#define LCD_CAM_DOUT13_MODE_S  26
+/** LCD_CAM_DOUT14_MODE : R/W; bitpos: [29:28]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT14_MODE    0x00000003U
+#define LCD_CAM_DOUT14_MODE_M  (LCD_CAM_DOUT14_MODE_V << LCD_CAM_DOUT14_MODE_S)
+#define LCD_CAM_DOUT14_MODE_V  0x00000003U
+#define LCD_CAM_DOUT14_MODE_S  28
+/** LCD_CAM_DOUT15_MODE : R/W; bitpos: [31:30]; default: 0;
+ *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+ *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+ *  LCD_CLK.
+ */
+#define LCD_CAM_DOUT15_MODE    0x00000003U
+#define LCD_CAM_DOUT15_MODE_M  (LCD_CAM_DOUT15_MODE_V << LCD_CAM_DOUT15_MODE_S)
+#define LCD_CAM_DOUT15_MODE_V  0x00000003U
+#define LCD_CAM_DOUT15_MODE_S  30
+
+/** LCD_CAM_LC_DMA_INT_ENA_REG register
+ *  LCD_camera DMA inturrupt enable register
+ */
+#define LCD_CAM_LC_DMA_INT_ENA_REG (DR_REG_LCD_CAM_BASE + 0x64)
+/** LCD_CAM_LCD_VSYNC_INT_ENA : R/W; bitpos: [0]; default: 0;
+ *  The enable bit for LCD frame end interrupt.
+ */
+#define LCD_CAM_LCD_VSYNC_INT_ENA    (BIT(0))
+#define LCD_CAM_LCD_VSYNC_INT_ENA_M  (LCD_CAM_LCD_VSYNC_INT_ENA_V << LCD_CAM_LCD_VSYNC_INT_ENA_S)
+#define LCD_CAM_LCD_VSYNC_INT_ENA_V  0x00000001U
+#define LCD_CAM_LCD_VSYNC_INT_ENA_S  0
+/** LCD_CAM_LCD_TRANS_DONE_INT_ENA : R/W; bitpos: [1]; default: 0;
+ *  The enable bit for lcd transfer end interrupt.
+ */
+#define LCD_CAM_LCD_TRANS_DONE_INT_ENA    (BIT(1))
+#define LCD_CAM_LCD_TRANS_DONE_INT_ENA_M  (LCD_CAM_LCD_TRANS_DONE_INT_ENA_V << LCD_CAM_LCD_TRANS_DONE_INT_ENA_S)
+#define LCD_CAM_LCD_TRANS_DONE_INT_ENA_V  0x00000001U
+#define LCD_CAM_LCD_TRANS_DONE_INT_ENA_S  1
+/** LCD_CAM_CAM_VSYNC_INT_ENA : R/W; bitpos: [2]; default: 0;
+ *  The enable bit for Camera frame end interrupt.
+ */
+#define LCD_CAM_CAM_VSYNC_INT_ENA    (BIT(2))
+#define LCD_CAM_CAM_VSYNC_INT_ENA_M  (LCD_CAM_CAM_VSYNC_INT_ENA_V << LCD_CAM_CAM_VSYNC_INT_ENA_S)
+#define LCD_CAM_CAM_VSYNC_INT_ENA_V  0x00000001U
+#define LCD_CAM_CAM_VSYNC_INT_ENA_S  2
+/** LCD_CAM_CAM_HS_INT_ENA : R/W; bitpos: [3]; default: 0;
+ *  The enable bit for Camera line interrupt.
+ */
+#define LCD_CAM_CAM_HS_INT_ENA    (BIT(3))
+#define LCD_CAM_CAM_HS_INT_ENA_M  (LCD_CAM_CAM_HS_INT_ENA_V << LCD_CAM_CAM_HS_INT_ENA_S)
+#define LCD_CAM_CAM_HS_INT_ENA_V  0x00000001U
+#define LCD_CAM_CAM_HS_INT_ENA_S  3
+
+/** LCD_CAM_LC_DMA_INT_RAW_REG register
+ *  LCD_camera DMA raw inturrupt status register
+ */
+#define LCD_CAM_LC_DMA_INT_RAW_REG (DR_REG_LCD_CAM_BASE + 0x68)
+/** LCD_CAM_LCD_VSYNC_INT_RAW : RO; bitpos: [0]; default: 0;
+ *  The raw bit for LCD frame end interrupt.
+ */
+#define LCD_CAM_LCD_VSYNC_INT_RAW    (BIT(0))
+#define LCD_CAM_LCD_VSYNC_INT_RAW_M  (LCD_CAM_LCD_VSYNC_INT_RAW_V << LCD_CAM_LCD_VSYNC_INT_RAW_S)
+#define LCD_CAM_LCD_VSYNC_INT_RAW_V  0x00000001U
+#define LCD_CAM_LCD_VSYNC_INT_RAW_S  0
+/** LCD_CAM_LCD_TRANS_DONE_INT_RAW : RO; bitpos: [1]; default: 0;
+ *  The raw bit for lcd transfer end interrupt.
+ */
+#define LCD_CAM_LCD_TRANS_DONE_INT_RAW    (BIT(1))
+#define LCD_CAM_LCD_TRANS_DONE_INT_RAW_M  (LCD_CAM_LCD_TRANS_DONE_INT_RAW_V << LCD_CAM_LCD_TRANS_DONE_INT_RAW_S)
+#define LCD_CAM_LCD_TRANS_DONE_INT_RAW_V  0x00000001U
+#define LCD_CAM_LCD_TRANS_DONE_INT_RAW_S  1
+/** LCD_CAM_CAM_VSYNC_INT_RAW : RO; bitpos: [2]; default: 0;
+ *  The raw bit for Camera frame end interrupt.
+ */
+#define LCD_CAM_CAM_VSYNC_INT_RAW    (BIT(2))
+#define LCD_CAM_CAM_VSYNC_INT_RAW_M  (LCD_CAM_CAM_VSYNC_INT_RAW_V << LCD_CAM_CAM_VSYNC_INT_RAW_S)
+#define LCD_CAM_CAM_VSYNC_INT_RAW_V  0x00000001U
+#define LCD_CAM_CAM_VSYNC_INT_RAW_S  2
+/** LCD_CAM_CAM_HS_INT_RAW : RO; bitpos: [3]; default: 0;
+ *  The raw bit for Camera line interrupt.
+ */
+#define LCD_CAM_CAM_HS_INT_RAW    (BIT(3))
+#define LCD_CAM_CAM_HS_INT_RAW_M  (LCD_CAM_CAM_HS_INT_RAW_V << LCD_CAM_CAM_HS_INT_RAW_S)
+#define LCD_CAM_CAM_HS_INT_RAW_V  0x00000001U
+#define LCD_CAM_CAM_HS_INT_RAW_S  3
+
+/** LCD_CAM_LC_DMA_INT_ST_REG register
+ *  LCD_camera DMA masked inturrupt status register
+ */
+#define LCD_CAM_LC_DMA_INT_ST_REG (DR_REG_LCD_CAM_BASE + 0x6c)
+/** LCD_CAM_LCD_VSYNC_INT_ST : RO; bitpos: [0]; default: 0;
+ *  The status bit for LCD frame end interrupt.
+ */
+#define LCD_CAM_LCD_VSYNC_INT_ST    (BIT(0))
+#define LCD_CAM_LCD_VSYNC_INT_ST_M  (LCD_CAM_LCD_VSYNC_INT_ST_V << LCD_CAM_LCD_VSYNC_INT_ST_S)
+#define LCD_CAM_LCD_VSYNC_INT_ST_V  0x00000001U
+#define LCD_CAM_LCD_VSYNC_INT_ST_S  0
+/** LCD_CAM_LCD_TRANS_DONE_INT_ST : RO; bitpos: [1]; default: 0;
+ *  The status bit for lcd transfer end interrupt.
+ */
+#define LCD_CAM_LCD_TRANS_DONE_INT_ST    (BIT(1))
+#define LCD_CAM_LCD_TRANS_DONE_INT_ST_M  (LCD_CAM_LCD_TRANS_DONE_INT_ST_V << LCD_CAM_LCD_TRANS_DONE_INT_ST_S)
+#define LCD_CAM_LCD_TRANS_DONE_INT_ST_V  0x00000001U
+#define LCD_CAM_LCD_TRANS_DONE_INT_ST_S  1
+/** LCD_CAM_CAM_VSYNC_INT_ST : RO; bitpos: [2]; default: 0;
+ *  The status bit for Camera frame end interrupt.
+ */
+#define LCD_CAM_CAM_VSYNC_INT_ST    (BIT(2))
+#define LCD_CAM_CAM_VSYNC_INT_ST_M  (LCD_CAM_CAM_VSYNC_INT_ST_V << LCD_CAM_CAM_VSYNC_INT_ST_S)
+#define LCD_CAM_CAM_VSYNC_INT_ST_V  0x00000001U
+#define LCD_CAM_CAM_VSYNC_INT_ST_S  2
+/** LCD_CAM_CAM_HS_INT_ST : RO; bitpos: [3]; default: 0;
+ *  The status bit for Camera transfer end interrupt.
+ */
+#define LCD_CAM_CAM_HS_INT_ST    (BIT(3))
+#define LCD_CAM_CAM_HS_INT_ST_M  (LCD_CAM_CAM_HS_INT_ST_V << LCD_CAM_CAM_HS_INT_ST_S)
+#define LCD_CAM_CAM_HS_INT_ST_V  0x00000001U
+#define LCD_CAM_CAM_HS_INT_ST_S  3
+
+/** LCD_CAM_LC_DMA_INT_CLR_REG register
+ *  LCD_camera DMA inturrupt clear register
+ */
+#define LCD_CAM_LC_DMA_INT_CLR_REG (DR_REG_LCD_CAM_BASE + 0x70)
+/** LCD_CAM_LCD_VSYNC_INT_CLR : WO; bitpos: [0]; default: 0;
+ *  The clear bit for LCD frame end interrupt.
+ */
+#define LCD_CAM_LCD_VSYNC_INT_CLR    (BIT(0))
+#define LCD_CAM_LCD_VSYNC_INT_CLR_M  (LCD_CAM_LCD_VSYNC_INT_CLR_V << LCD_CAM_LCD_VSYNC_INT_CLR_S)
+#define LCD_CAM_LCD_VSYNC_INT_CLR_V  0x00000001U
+#define LCD_CAM_LCD_VSYNC_INT_CLR_S  0
+/** LCD_CAM_LCD_TRANS_DONE_INT_CLR : WO; bitpos: [1]; default: 0;
+ *  The clear bit for lcd transfer end interrupt.
+ */
+#define LCD_CAM_LCD_TRANS_DONE_INT_CLR    (BIT(1))
+#define LCD_CAM_LCD_TRANS_DONE_INT_CLR_M  (LCD_CAM_LCD_TRANS_DONE_INT_CLR_V << LCD_CAM_LCD_TRANS_DONE_INT_CLR_S)
+#define LCD_CAM_LCD_TRANS_DONE_INT_CLR_V  0x00000001U
+#define LCD_CAM_LCD_TRANS_DONE_INT_CLR_S  1
+/** LCD_CAM_CAM_VSYNC_INT_CLR : WO; bitpos: [2]; default: 0;
+ *  The clear bit for Camera frame end interrupt.
+ */
+#define LCD_CAM_CAM_VSYNC_INT_CLR    (BIT(2))
+#define LCD_CAM_CAM_VSYNC_INT_CLR_M  (LCD_CAM_CAM_VSYNC_INT_CLR_V << LCD_CAM_CAM_VSYNC_INT_CLR_S)
+#define LCD_CAM_CAM_VSYNC_INT_CLR_V  0x00000001U
+#define LCD_CAM_CAM_VSYNC_INT_CLR_S  2
+/** LCD_CAM_CAM_HS_INT_CLR : WO; bitpos: [3]; default: 0;
+ *  The clear bit for Camera line interrupt.
+ */
+#define LCD_CAM_CAM_HS_INT_CLR    (BIT(3))
+#define LCD_CAM_CAM_HS_INT_CLR_M  (LCD_CAM_CAM_HS_INT_CLR_V << LCD_CAM_CAM_HS_INT_CLR_S)
+#define LCD_CAM_CAM_HS_INT_CLR_V  0x00000001U
+#define LCD_CAM_CAM_HS_INT_CLR_S  3
+
+/** LCD_CAM_LC_REG_DATE_REG register
+ *  Version register
+ */
+#define LCD_CAM_LC_REG_DATE_REG (DR_REG_LCD_CAM_BASE + 0xfc)
+/** LCD_CAM_LC_DATE : R/W; bitpos: [27:0]; default: 33566752;
+ *  LCD_CAM version control register
+ */
+#define LCD_CAM_LC_DATE    0x0FFFFFFFU
+#define LCD_CAM_LC_DATE_M  (LCD_CAM_LC_DATE_V << LCD_CAM_LC_DATE_S)
+#define LCD_CAM_LC_DATE_V  0x0FFFFFFFU
+#define LCD_CAM_LC_DATE_S  0
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/lcd_cam_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/lcd_cam_struct.h
new file mode 100644
index 00000000000..7eeec503fcb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/lcd_cam_struct.h
@@ -0,0 +1,789 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Group: LCD Configuration Register */
+/** Type of lcd_clock register
+ *  LCD clock register
+ */
+typedef union {
+    struct {
+        /** lcd_clkcnt_n : R/W; bitpos: [5:0]; default: 3;
+         *  f_LCD_PCLK = f_LCD_CLK / (reg_clkcnt_N + 1) when reg_clk_equ_sysclk is 0.
+         */
+        uint32_t lcd_clkcnt_n: 6;
+        /** lcd_clk_equ_sysclk : R/W; bitpos: [6]; default: 1;
+         *  1: f_LCD_PCLK = f_LCD_CLK. 0: f_LCD_PCLK = f_LCD_CLK / (reg_clkcnt_N + 1).
+         */
+        uint32_t lcd_clk_equ_sysclk: 1;
+        /** lcd_ck_idle_edge : R/W; bitpos: [7]; default: 0;
+         *  1: LCD_PCLK line is high when idle     0: LCD_PCLK line is low when idle.
+         */
+        uint32_t lcd_ck_idle_edge: 1;
+        /** lcd_ck_out_edge : R/W; bitpos: [8]; default: 0;
+         *  1: LCD_PCLK high in first half clock cycle. 0: LCD_PCLK low in first half clock
+         *  cycle.
+         */
+        uint32_t lcd_ck_out_edge: 1;
+        /** lcd_clkm_div_num : R/W; bitpos: [16:9]; default: 4;
+         *  Integral LCD clock divider value
+         */
+        uint32_t lcd_clkm_div_num: 8;
+        /** lcd_clkm_div_b : R/W; bitpos: [22:17]; default: 0;
+         *  Fractional clock divider numerator value
+         */
+        uint32_t lcd_clkm_div_b: 6;
+        /** lcd_clkm_div_a : R/W; bitpos: [28:23]; default: 0;
+         *  Fractional clock divider denominator value
+         */
+        uint32_t lcd_clkm_div_a: 6;
+        /** lcd_clk_sel : R/W; bitpos: [30:29]; default: 0;
+         *  Select LCD module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: no clock.
+         */
+        uint32_t lcd_clk_sel: 2;
+        /** clk_en : R/W; bitpos: [31]; default: 0;
+         *  Set this bit to enable clk gate
+         */
+        uint32_t clk_en: 1;
+    };
+    uint32_t val;
+} lcd_cam_lcd_clock_reg_t;
+
+/** Type of lcd_rgb_yuv register
+ *  LCD configuration register
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0: 20;
+        /** lcd_conv_8bits_data_inv : R/W; bitpos: [20]; default: 0;
+         *  1:invert every two 8bits input data. 2. disabled.
+         */
+        uint32_t lcd_conv_8bits_data_inv: 1;
+        /** lcd_conv_txtorx : R/W; bitpos: [21]; default: 0;
+         *  0: txtorx mode off. 1: txtorx mode on.
+         */
+        uint32_t lcd_conv_txtorx: 1;
+        /** lcd_conv_yuv2yuv_mode : R/W; bitpos: [23:22]; default: 3;
+         *  0: to yuv422. 1: to yuv420. 2: to yuv411. 3: disabled.  To enable yuv2yuv mode,
+         *  trans_mode must be set to 1.
+         */
+        uint32_t lcd_conv_yuv2yuv_mode: 2;
+        /** lcd_conv_yuv_mode : R/W; bitpos: [25:24]; default: 0;
+         *  0: yuv422. 1: yuv420. 2: yuv411. When in yuv2yuv mode, yuv_mode decides the yuv
+         *  mode of Data_in
+         */
+        uint32_t lcd_conv_yuv_mode: 2;
+        /** lcd_conv_protocol_mode : R/W; bitpos: [26]; default: 0;
+         *  0:BT601. 1:BT709.
+         */
+        uint32_t lcd_conv_protocol_mode: 1;
+        /** lcd_conv_data_out_mode : R/W; bitpos: [27]; default: 0;
+         *  LIMIT or FULL mode of Data out. 0: limit. 1: full
+         */
+        uint32_t lcd_conv_data_out_mode: 1;
+        /** lcd_conv_data_in_mode : R/W; bitpos: [28]; default: 0;
+         *  LIMIT or FULL mode of Data in. 0: limit. 1: full
+         */
+        uint32_t lcd_conv_data_in_mode: 1;
+        /** lcd_conv_mode_8bits_on : R/W; bitpos: [29]; default: 0;
+         *  0: 16bits mode. 1: 8bits mode.
+         */
+        uint32_t lcd_conv_mode_8bits_on: 1;
+        /** lcd_conv_trans_mode : R/W; bitpos: [30]; default: 0;
+         *  0: YUV to RGB. 1: RGB to YUV.
+         */
+        uint32_t lcd_conv_trans_mode: 1;
+        /** lcd_conv_bypass : R/W; bitpos: [31]; default: 0;
+         *  0: Bypass converter. 1: Enable converter.
+         */
+        uint32_t lcd_conv_bypass: 1;
+    };
+    uint32_t val;
+} lcd_cam_lcd_rgb_yuv_reg_t;
+
+/** Type of lcd_user register
+ *  LCD configuration register
+ */
+typedef union {
+    struct {
+        /** lcd_dout_cyclelen : R/W; bitpos: [12:0]; default: 1;
+         *  The output data cycles minus 1 of LCD module.
+         */
+        uint32_t lcd_dout_cyclelen: 13;
+        /** lcd_always_out_en : R/W; bitpos: [13]; default: 0;
+         *  LCD always output when LCD is in LCD_DOUT state, unless reg_lcd_start is cleared or
+         *  reg_lcd_reset is set.
+         */
+        uint32_t lcd_always_out_en: 1;
+        uint32_t reserved_14: 5;
+        /** lcd_8bits_order : R/W; bitpos: [19]; default: 0;
+         *  1: invert every two data byte, valid in 1 byte mode. 0: Not change.
+         */
+        uint32_t lcd_8bits_order: 1;
+        /** lcd_update_reg : R/W; bitpos: [20]; default: 0;
+         *  1: Update LCD registers, will be cleared by hardware. 0 : Not care.
+         */
+        uint32_t lcd_update: 1;
+        /** lcd_bit_order : R/W; bitpos: [21]; default: 0;
+         *  1: Change data bit order, change LCD_DATA_out[7:0] to LCD_DATA_out[0:7] in one byte
+         *  mode, and bits[15:0] to bits[0:15] in two byte mode.  0: Not change.
+         */
+        uint32_t lcd_bit_order: 1;
+        /** lcd_byte_order : R/W; bitpos: [22]; default: 0;
+         *  1: invert data byte order, only valid in 2 byte mode. 0: Not change.
+         */
+        uint32_t lcd_byte_order: 1;
+        /** lcd_2byte_en : R/W; bitpos: [23]; default: 0;
+         *  1: The bit number of output LCD data is 9~16.  0: The bit number of output LCD data
+         *  is 0~8.
+         */
+        uint32_t lcd_2byte_en: 1;
+        /** lcd_dout : R/W; bitpos: [24]; default: 0;
+         *  1: Be able to send data out in LCD sequence when LCD starts. 0: Disable.
+         */
+        uint32_t lcd_dout: 1;
+        /** lcd_dummy : R/W; bitpos: [25]; default: 0;
+         *  1: Enable DUMMY phase in LCD sequence when LCD starts. 0: Disable.
+         */
+        uint32_t lcd_dummy: 1;
+        /** lcd_cmd : R/W; bitpos: [26]; default: 0;
+         *  1: Be able to send command in LCD sequence when LCD starts. 0: Disable.
+         */
+        uint32_t lcd_cmd: 1;
+        /** lcd_start : R/W; bitpos: [27]; default: 0;
+         *  LCD start sending data enable signal, valid in high level.
+         */
+        uint32_t lcd_start: 1;
+        /** lcd_reset : WO; bitpos: [28]; default: 0;
+         *  The value of  command.
+         */
+        uint32_t lcd_reset: 1;
+        /** lcd_dummy_cyclelen : R/W; bitpos: [30:29]; default: 0;
+         *  The dummy cycle length minus 1.
+         */
+        uint32_t lcd_dummy_cyclelen: 2;
+        /** lcd_cmd_2_cycle_en : R/W; bitpos: [31]; default: 0;
+         *  The cycle length of command phase.  1: 2 cycles. 0: 1 cycle.
+         */
+        uint32_t lcd_cmd_2_cycle_en: 1;
+    };
+    uint32_t val;
+} lcd_cam_lcd_user_reg_t;
+
+/** Type of lcd_misc register
+ *  LCD configuration register
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0: 1;
+        /** lcd_afifo_threshold_num : R/W; bitpos: [5:1]; default: 11;
+         *  The awfull threshold number of lcd_afifo.
+         */
+        uint32_t lcd_afifo_threshold_num: 5;
+        /** lcd_vfk_cyclelen : R/W; bitpos: [11:6]; default: 3;
+         *  The setup cycle length minus 1 in LCD non-RGB mode.
+         */
+        uint32_t lcd_vfk_cyclelen: 6;
+        /** lcd_vbk_cyclelen : R/W; bitpos: [24:12]; default: 0;
+         *  The vertical back blank region cycle length minus 1 in LCD RGB mode, or the hold
+         *  time cycle length in LCD non-RGB mode.
+         */
+        uint32_t lcd_vbk_cyclelen: 13;
+        /** lcd_next_frame_en : R/W; bitpos: [25]; default: 0;
+         *  1: Send the next frame data when the current frame is sent out. 0: LCD stops when
+         *  the current frame is sent out.
+         */
+        uint32_t lcd_next_frame_en: 1;
+        /** lcd_bk_en : R/W; bitpos: [26]; default: 0;
+         *  1: Enable blank region when LCD sends data out. 0: No blank region.
+         */
+        uint32_t lcd_bk_en: 1;
+        /** lcd_afifo_reset : WO; bitpos: [27]; default: 0;
+         *  LCD AFIFO reset signal.
+         */
+        uint32_t lcd_afifo_reset: 1;
+        /** lcd_cd_data_set : R/W; bitpos: [28]; default: 0;
+         *  1: LCD_CD = !reg_cd_idle_edge when lcd_st[2:0] is in LCD_DOUT state.  0: LCD_CD =
+         *  reg_cd_idle_edge.
+         */
+        uint32_t lcd_cd_data_set: 1;
+        /** lcd_cd_dummy_set : R/W; bitpos: [29]; default: 0;
+         *  1: LCD_CD = !reg_cd_idle_edge when lcd_st[2:0] is in LCD_DUMMY state.  0: LCD_CD =
+         *  reg_cd_idle_edge.
+         */
+        uint32_t lcd_cd_dummy_set: 1;
+        /** lcd_cd_cmd_set : R/W; bitpos: [30]; default: 0;
+         *  1: LCD_CD = !reg_cd_idle_edge when lcd_st[2:0] is in LCD_CMD state.  0: LCD_CD =
+         *  reg_cd_idle_edge.
+         */
+        uint32_t lcd_cd_cmd_set: 1;
+        /** lcd_cd_idle_edge : R/W; bitpos: [31]; default: 0;
+         *  The default value of LCD_CD.
+         */
+        uint32_t lcd_cd_idle_edge: 1;
+    };
+    uint32_t val;
+} lcd_cam_lcd_misc_reg_t;
+
+/** Type of lcd_ctrl register
+ *  LCD configuration register
+ */
+typedef union {
+    struct {
+        /** lcd_hb_front : R/W; bitpos: [10:0]; default: 0;
+         *  It is the horizontal blank front porch of a frame.
+         */
+        uint32_t lcd_hb_front: 11;
+        /** lcd_va_height : R/W; bitpos: [20:11]; default: 0;
+         *  It is the vertical active height of a frame.
+         */
+        uint32_t lcd_va_height: 10;
+        /** lcd_vt_height : R/W; bitpos: [30:21]; default: 0;
+         *  It is the vertical total height of a frame.
+         */
+        uint32_t lcd_vt_height: 10;
+        /** lcd_rgb_mode_en : R/W; bitpos: [31]; default: 0;
+         *  1: Enable reg mode input vsync, hsync, de. 0: Disable.
+         */
+        uint32_t lcd_rgb_mode_en: 1;
+    };
+    uint32_t val;
+} lcd_cam_lcd_ctrl_reg_t;
+
+/** Type of lcd_ctrl1 register
+ *  LCD configuration register
+ */
+typedef union {
+    struct {
+        /** lcd_vb_front : R/W; bitpos: [7:0]; default: 0;
+         *  It is the vertical blank front porch of a frame.
+         */
+        uint32_t lcd_vb_front: 8;
+        /** lcd_ha_width : R/W; bitpos: [19:8]; default: 0;
+         *  It is the horizontal active width of a frame.
+         */
+        uint32_t lcd_ha_width: 12;
+        /** lcd_ht_width : R/W; bitpos: [31:20]; default: 0;
+         *  It is the horizontal total width of a frame.
+         */
+        uint32_t lcd_ht_width: 12;
+    };
+    uint32_t val;
+} lcd_cam_lcd_ctrl1_reg_t;
+
+/** Type of lcd_ctrl2 register
+ *  LCD configuration register
+ */
+typedef union {
+    struct {
+        /** lcd_vsync_width : R/W; bitpos: [6:0]; default: 1;
+         *  It is the position of LCD_VSYNC active pulse in a line.
+         */
+        uint32_t lcd_vsync_width: 7;
+        /** lcd_vsync_idle_pol : R/W; bitpos: [7]; default: 0;
+         *  It is the idle value of LCD_VSYNC.
+         */
+        uint32_t lcd_vsync_idle_pol: 1;
+        /** lcd_de_idle_pol : R/W; bitpos: [8]; default: 0;
+         *  It is the idle value of LCD_DE.
+         */
+        uint32_t lcd_de_idle_pol: 1;
+        /** lcd_hs_blank_en : R/W; bitpos: [9]; default: 0;
+         *  1: The pulse of LCD_HSYNC is out in vertical blanking lines RGB mode. 0: LCD_HSYNC
+         *  pulse is valid only in active region lines in RGB mode.
+         */
+        uint32_t lcd_hs_blank_en: 1;
+        uint32_t reserved_10: 6;
+        /** lcd_hsync_width : R/W; bitpos: [22:16]; default: 1;
+         *  It is the position of LCD_HSYNC active pulse in a line.
+         */
+        uint32_t lcd_hsync_width: 7;
+        /** lcd_hsync_idle_pol : R/W; bitpos: [23]; default: 0;
+         *  It is the idle value of LCD_HSYNC.
+         */
+        uint32_t lcd_hsync_idle_pol: 1;
+        /** lcd_hsync_position : R/W; bitpos: [31:24]; default: 0;
+         *  It is the position of LCD_HSYNC active pulse in a line.
+         */
+        uint32_t lcd_hsync_position: 8;
+    };
+    uint32_t val;
+} lcd_cam_lcd_ctrl2_reg_t;
+
+/** Type of lcd_cmd_val register
+ *  LCD configuration register
+ */
+typedef union {
+    struct {
+        /** lcd_cmd_value : R/W; bitpos: [31:0]; default: 0;
+         *  The LCD write command value.
+         */
+        uint32_t lcd_cmd_value: 32;
+    };
+    uint32_t val;
+} lcd_cam_lcd_cmd_val_reg_t;
+
+/** Type of lcd_dly_mode register
+ *  LCD configuration register
+ */
+typedef union {
+    struct {
+        /** lcd_cd_mode : R/W; bitpos: [1:0]; default: 0;
+         *  The output LCD_CD is delayed by module clock LCD_CLK. 0: output without delayed. 1:
+         *  delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
+         */
+        uint32_t lcd_cd_mode: 2;
+        /** lcd_de_mode : R/W; bitpos: [3:2]; default: 0;
+         *  The output LCD_DE is delayed by module clock LCD_CLK. 0: output without delayed. 1:
+         *  delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
+         */
+        uint32_t lcd_de_mode: 2;
+        /** lcd_hsync_mode : R/W; bitpos: [5:4]; default: 0;
+         *  The output LCD_HSYNC is delayed by module clock LCD_CLK. 0: output without delayed.
+         *  1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
+         */
+        uint32_t lcd_hsync_mode: 2;
+        /** lcd_vsync_mode : R/W; bitpos: [7:6]; default: 0;
+         *  The output LCD_VSYNC is delayed by module clock LCD_CLK. 0: output without delayed.
+         *  1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
+         */
+        uint32_t lcd_vsync_mode: 2;
+        uint32_t reserved_8: 24;
+    };
+    uint32_t val;
+} lcd_cam_lcd_dly_mode_reg_t;
+
+/** Type of lcd_data_dout_mode register
+ *  LCD configuration register
+ */
+typedef union {
+    struct {
+        /** dout0_mode : R/W; bitpos: [1:0]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout0_mode: 2;
+        /** dout1_mode : R/W; bitpos: [3:2]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout1_mode: 2;
+        /** dout2_mode : R/W; bitpos: [5:4]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout2_mode: 2;
+        /** dout3_mode : R/W; bitpos: [7:6]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout3_mode: 2;
+        /** dout4_mode : R/W; bitpos: [9:8]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout4_mode: 2;
+        /** dout5_mode : R/W; bitpos: [11:10]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout5_mode: 2;
+        /** dout6_mode : R/W; bitpos: [13:12]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout6_mode: 2;
+        /** dout7_mode : R/W; bitpos: [15:14]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout7_mode: 2;
+        /** dout8_mode : R/W; bitpos: [17:16]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout8_mode: 2;
+        /** dout9_mode : R/W; bitpos: [19:18]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout9_mode: 2;
+        /** dout10_mode : R/W; bitpos: [21:20]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout10_mode: 2;
+        /** dout11_mode : R/W; bitpos: [23:22]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout11_mode: 2;
+        /** dout12_mode : R/W; bitpos: [25:24]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout12_mode: 2;
+        /** dout13_mode : R/W; bitpos: [27:26]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout13_mode: 2;
+        /** dout14_mode : R/W; bitpos: [29:28]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout14_mode: 2;
+        /** dout15_mode : R/W; bitpos: [31:30]; default: 0;
+         *  The output data bit $n is delayed by module clock LCD_CLK. 0: output without
+         *  delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of
+         *  LCD_CLK.
+         */
+        uint32_t dout15_mode: 2;
+    };
+    uint32_t val;
+} lcd_cam_lcd_data_dout_mode_reg_t;
+
+
+/** Group: Camera Configuration Register */
+/** Type of cam_ctrl register
+ *  Camera configuration register
+ */
+typedef union {
+    struct {
+        /** cam_stop_en : R/W; bitpos: [0]; default: 0;
+         *  Camera stop enable signal, 1: camera stops when DMA Rx FIFO is full. 0: Not stop.
+         */
+        uint32_t cam_stop_en: 1;
+        /** cam_vsync_filter_thres : R/W; bitpos: [3:1]; default: 0;
+         *  Filter threshold value for CAM_VSYNC signal.
+         */
+        uint32_t cam_vsync_filter_thres: 3;
+        /** cam_update_reg : R/W; bitpos: [4]; default: 0;
+         *  1: Update Camera registers, will be cleared by hardware. 0 : Not care.
+         */
+        uint32_t cam_update: 1;
+        /** cam_byte_order : R/W; bitpos: [5]; default: 0;
+         *  1: Change data bit order, change CAM_DATA_in[7:0] to CAM_DATA_in[0:7] in one byte
+         *  mode, and bits[15:0] to bits[0:15] in two byte mode.  0: Not change.
+         */
+        uint32_t cam_byte_order: 1;
+        /** cam_bit_order : R/W; bitpos: [6]; default: 0;
+         *  1: invert data byte order, only valid in 2 byte mode. 0: Not change.
+         */
+        uint32_t cam_bit_order: 1;
+        /** cam_line_int_en : R/W; bitpos: [7]; default: 0;
+         *  1: Enable to generate CAM_HS_INT. 0: Disable.
+         */
+        uint32_t cam_line_int_en: 1;
+        /** cam_vs_eof_en : R/W; bitpos: [8]; default: 0;
+         *  1: CAM_VSYNC to generate in_suc_eof. 0: in_suc_eof is controlled by
+         *  reg_cam_rec_data_cyclelen.
+         */
+        uint32_t cam_vs_eof_en: 1;
+        /** cam_clkm_div_num : R/W; bitpos: [16:9]; default: 4;
+         *  Integral Camera clock divider value
+         */
+        uint32_t cam_clkm_div_num: 8;
+        /** cam_clkm_div_b : R/W; bitpos: [22:17]; default: 0;
+         *  Fractional clock divider numerator value
+         */
+        uint32_t cam_clkm_div_b: 6;
+        /** cam_clkm_div_a : R/W; bitpos: [28:23]; default: 0;
+         *  Fractional clock divider denominator value
+         */
+        uint32_t cam_clkm_div_a: 6;
+        /** cam_clk_sel : R/W; bitpos: [30:29]; default: 0;
+         *  Select Camera module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: no clock.
+         */
+        uint32_t cam_clk_sel: 2;
+        uint32_t reserved_31: 1;
+    };
+    uint32_t val;
+} lcd_cam_cam_ctrl_reg_t;
+
+/** Type of cam_ctrl1 register
+ *  Camera configuration register
+ */
+typedef union {
+    struct {
+        /** cam_rec_data_bytelen : R/W; bitpos: [15:0]; default: 0;
+         *  Camera receive data byte length minus 1 to set DMA in_suc_eof_int.
+         */
+        uint32_t cam_rec_data_bytelen: 16;
+        /** cam_line_int_num : R/W; bitpos: [21:16]; default: 0;
+         *  The line number minus 1 to generate cam_hs_int.
+         */
+        uint32_t cam_line_int_num: 6;
+        /** cam_clk_inv : R/W; bitpos: [22]; default: 0;
+         *  1: Invert  the input signal CAM_PCLK. 0: Not invert.
+         */
+        uint32_t cam_clk_inv: 1;
+        /** cam_vsync_filter_en : R/W; bitpos: [23]; default: 0;
+         *  1: Enable CAM_VSYNC filter function. 0: bypass.
+         */
+        uint32_t cam_vsync_filter_en: 1;
+        /** cam_2byte_en : R/W; bitpos: [24]; default: 0;
+         *  1: The bit number of input data is 9~16.  0: The bit number of input data is 0~8.
+         */
+        uint32_t cam_2byte_en: 1;
+        /** cam_de_inv : R/W; bitpos: [25]; default: 0;
+         *  CAM_DE invert enable signal, valid in high level.
+         */
+        uint32_t cam_de_inv: 1;
+        /** cam_hsync_inv : R/W; bitpos: [26]; default: 0;
+         *  CAM_HSYNC invert enable signal, valid in high level.
+         */
+        uint32_t cam_hsync_inv: 1;
+        /** cam_vsync_inv : R/W; bitpos: [27]; default: 0;
+         *  CAM_VSYNC invert enable signal, valid in high level.
+         */
+        uint32_t cam_vsync_inv: 1;
+        /** cam_vh_de_mode_en : R/W; bitpos: [28]; default: 0;
+         *  1: Input control signals are CAM_DE CAM_HSYNC and CAM_VSYNC is 1. 0: Input control
+         *  signals are CAM_DE and CAM_VSYNC. CAM_HSYNC and CAM_DE are all 1 the the same time.
+         */
+        uint32_t cam_vh_de_mode_en: 1;
+        /** cam_start : R/W; bitpos: [29]; default: 0;
+         *  Camera module start signal.
+         */
+        uint32_t cam_start: 1;
+        /** cam_reset : WO; bitpos: [30]; default: 0;
+         *  Camera module reset signal.
+         */
+        uint32_t cam_reset: 1;
+        /** cam_afifo_reset : WO; bitpos: [31]; default: 0;
+         *  Camera AFIFO reset signal.
+         */
+        uint32_t cam_afifo_reset: 1;
+    };
+    uint32_t val;
+} lcd_cam_cam_ctrl1_reg_t;
+
+/** Type of cam_rgb_yuv register
+ *  Camera configuration register
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0: 21;
+        /** cam_conv_8bits_data_inv : R/W; bitpos: [21]; default: 0;
+         *  1:invert every two 8bits input data. 2. disabled.
+         */
+        uint32_t cam_conv_8bits_data_inv: 1;
+        /** cam_conv_yuv2yuv_mode : R/W; bitpos: [23:22]; default: 3;
+         *  0: to yuv422. 1: to yuv420. 2: to yuv411. 3: disabled.  To enable yuv2yuv mode,
+         *  trans_mode must be set to 1.
+         */
+        uint32_t cam_conv_yuv2yuv_mode: 2;
+        /** cam_conv_yuv_mode : R/W; bitpos: [25:24]; default: 0;
+         *  0: yuv422. 1: yuv420. 2: yuv411. When in yuv2yuv mode, yuv_mode decides the yuv
+         *  mode of Data_in
+         */
+        uint32_t cam_conv_yuv_mode: 2;
+        /** cam_conv_protocol_mode : R/W; bitpos: [26]; default: 0;
+         *  0:BT601. 1:BT709.
+         */
+        uint32_t cam_conv_protocol_mode: 1;
+        /** cam_conv_data_out_mode : R/W; bitpos: [27]; default: 0;
+         *  LIMIT or FULL mode of Data out. 0: limit. 1: full
+         */
+        uint32_t cam_conv_data_out_mode: 1;
+        /** cam_conv_data_in_mode : R/W; bitpos: [28]; default: 0;
+         *  LIMIT or FULL mode of Data in. 0: limit. 1: full
+         */
+        uint32_t cam_conv_data_in_mode: 1;
+        /** cam_conv_mode_8bits_on : R/W; bitpos: [29]; default: 0;
+         *  0: 16bits mode. 1: 8bits mode.
+         */
+        uint32_t cam_conv_mode_8bits_on: 1;
+        /** cam_conv_trans_mode : R/W; bitpos: [30]; default: 0;
+         *  0: YUV to RGB. 1: RGB to YUV.
+         */
+        uint32_t cam_conv_trans_mode: 1;
+        /** cam_conv_bypass : R/W; bitpos: [31]; default: 0;
+         *  0: Bypass converter. 1: Enable converter.
+         */
+        uint32_t cam_conv_bypass: 1;
+    };
+    uint32_t val;
+} lcd_cam_cam_rgb_yuv_reg_t;
+
+
+/** Group: Interrupt Register */
+/** Type of lc_dma_int_ena register
+ *  LCD_camera DMA inturrupt enable register
+ */
+typedef union {
+    struct {
+        /** lcd_vsync_int_ena : R/W; bitpos: [0]; default: 0;
+         *  The enable bit for LCD frame end interrupt.
+         */
+        uint32_t lcd_vsync_int_ena: 1;
+        /** lcd_trans_done_int_ena : R/W; bitpos: [1]; default: 0;
+         *  The enable bit for lcd transfer end interrupt.
+         */
+        uint32_t lcd_trans_done_int_ena: 1;
+        /** cam_vsync_int_ena : R/W; bitpos: [2]; default: 0;
+         *  The enable bit for Camera frame end interrupt.
+         */
+        uint32_t cam_vsync_int_ena: 1;
+        /** cam_hs_int_ena : R/W; bitpos: [3]; default: 0;
+         *  The enable bit for Camera line interrupt.
+         */
+        uint32_t cam_hs_int_ena: 1;
+        uint32_t reserved_4: 28;
+    };
+    uint32_t val;
+} lcd_cam_lc_dma_int_ena_reg_t;
+
+/** Type of lc_dma_int_raw register
+ *  LCD_camera DMA raw inturrupt status register
+ */
+typedef union {
+    struct {
+        /** lcd_vsync_int_raw : RO; bitpos: [0]; default: 0;
+         *  The raw bit for LCD frame end interrupt.
+         */
+        uint32_t lcd_vsync_int_raw: 1;
+        /** lcd_trans_done_int_raw : RO; bitpos: [1]; default: 0;
+         *  The raw bit for lcd transfer end interrupt.
+         */
+        uint32_t lcd_trans_done_int_raw: 1;
+        /** cam_vsync_int_raw : RO; bitpos: [2]; default: 0;
+         *  The raw bit for Camera frame end interrupt.
+         */
+        uint32_t cam_vsync_int_raw: 1;
+        /** cam_hs_int_raw : RO; bitpos: [3]; default: 0;
+         *  The raw bit for Camera line interrupt.
+         */
+        uint32_t cam_hs_int_raw: 1;
+        uint32_t reserved_4: 28;
+    };
+    uint32_t val;
+} lcd_cam_lc_dma_int_raw_reg_t;
+
+/** Type of lc_dma_int_st register
+ *  LCD_camera DMA masked inturrupt status register
+ */
+typedef union {
+    struct {
+        /** lcd_vsync_int_st : RO; bitpos: [0]; default: 0;
+         *  The status bit for LCD frame end interrupt.
+         */
+        uint32_t lcd_vsync_int_st: 1;
+        /** lcd_trans_done_int_st : RO; bitpos: [1]; default: 0;
+         *  The status bit for lcd transfer end interrupt.
+         */
+        uint32_t lcd_trans_done_int_st: 1;
+        /** cam_vsync_int_st : RO; bitpos: [2]; default: 0;
+         *  The status bit for Camera frame end interrupt.
+         */
+        uint32_t cam_vsync_int_st: 1;
+        /** cam_hs_int_st : RO; bitpos: [3]; default: 0;
+         *  The status bit for Camera transfer end interrupt.
+         */
+        uint32_t cam_hs_int_st: 1;
+        uint32_t reserved_4: 28;
+    };
+    uint32_t val;
+} lcd_cam_lc_dma_int_st_reg_t;
+
+/** Type of lc_dma_int_clr register
+ *  LCD_camera DMA inturrupt clear register
+ */
+typedef union {
+    struct {
+        /** lcd_vsync_int_clr : WO; bitpos: [0]; default: 0;
+         *  The clear bit for LCD frame end interrupt.
+         */
+        uint32_t lcd_vsync_int_clr: 1;
+        /** lcd_trans_done_int_clr : WO; bitpos: [1]; default: 0;
+         *  The clear bit for lcd transfer end interrupt.
+         */
+        uint32_t lcd_trans_done_int_clr: 1;
+        /** cam_vsync_int_clr : WO; bitpos: [2]; default: 0;
+         *  The clear bit for Camera frame end interrupt.
+         */
+        uint32_t cam_vsync_int_clr: 1;
+        /** cam_hs_int_clr : WO; bitpos: [3]; default: 0;
+         *  The clear bit for Camera line interrupt.
+         */
+        uint32_t cam_hs_int_clr: 1;
+        uint32_t reserved_4: 28;
+    };
+    uint32_t val;
+} lcd_cam_lc_dma_int_clr_reg_t;
+
+
+/** Group: Version Register */
+/** Type of lc_reg_date register
+ *  Version register
+ */
+typedef union {
+    struct {
+        /** lc_date : R/W; bitpos: [27:0]; default: 33566752;
+         *  LCD_CAM version control register
+         */
+        uint32_t lc_date: 28;
+        uint32_t reserved_28: 4;
+    };
+    uint32_t val;
+} lcd_cam_lc_reg_date_reg_t;
+
+
+typedef struct lcd_cam_dev_t {
+    volatile lcd_cam_lcd_clock_reg_t lcd_clock;
+    volatile lcd_cam_cam_ctrl_reg_t cam_ctrl;
+    volatile lcd_cam_cam_ctrl1_reg_t cam_ctrl1;
+    volatile lcd_cam_cam_rgb_yuv_reg_t cam_rgb_yuv;
+    volatile lcd_cam_lcd_rgb_yuv_reg_t lcd_rgb_yuv;
+    volatile lcd_cam_lcd_user_reg_t lcd_user;
+    volatile lcd_cam_lcd_misc_reg_t lcd_misc;
+    volatile lcd_cam_lcd_ctrl_reg_t lcd_ctrl;
+    volatile lcd_cam_lcd_ctrl1_reg_t lcd_ctrl1;
+    volatile lcd_cam_lcd_ctrl2_reg_t lcd_ctrl2;
+    volatile lcd_cam_lcd_cmd_val_reg_t lcd_cmd_val;
+    uint32_t reserved_02c;
+    volatile lcd_cam_lcd_dly_mode_reg_t lcd_dly_mode;
+    uint32_t reserved_034;
+    volatile lcd_cam_lcd_data_dout_mode_reg_t lcd_data_dout_mode;
+    uint32_t reserved_03c[10];
+    volatile lcd_cam_lc_dma_int_ena_reg_t lc_dma_int_ena;
+    volatile lcd_cam_lc_dma_int_raw_reg_t lc_dma_int_raw;
+    volatile lcd_cam_lc_dma_int_st_reg_t lc_dma_int_st;
+    volatile lcd_cam_lc_dma_int_clr_reg_t lc_dma_int_clr;
+    uint32_t reserved_074[34];
+    volatile lcd_cam_lc_reg_date_reg_t lc_reg_date;
+} lcd_cam_dev_t;
+
+#ifndef __cplusplus
+_Static_assert(sizeof(lcd_cam_dev_t) == 0x100, "Invalid size of lcd_cam_dev_t structure");
+#endif
+
+extern lcd_cam_dev_t LCD_CAM;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/ledc_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/ledc_caps.h
new file mode 100644
index 00000000000..5f7a49704cc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/ledc_caps.h
@@ -0,0 +1,26 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SOC_LEDC_SUPPORT_XTAL_CLOCK  (1)
+#define SOC_LEDC_CHANNEL_NUM 8
+#define SOC_LEDC_TIMER_BIT_WIDE_NUM  (14)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/ledc_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/ledc_reg.h
new file mode 100644
index 00000000000..23f5a5f8899
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/ledc_reg.h
@@ -0,0 +1,1567 @@
+// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "soc.h"
+
+#define LEDC_LSCH0_CONF0_REG (DR_REG_LEDC_BASE + 0x0000)
+/* LEDC_OVF_CNT_RESET_ST_LSCH0 : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_ST_LSCH0 (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH0_M (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH0_V 0x1
+#define LEDC_OVF_CNT_RESET_ST_LSCH0_S 17
+/* LEDC_OVF_CNT_RESET_LSCH0 : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_LSCH0 (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH0_M (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH0_V 0x1
+#define LEDC_OVF_CNT_RESET_LSCH0_S 16
+/* LEDC_OVF_CNT_EN_LSCH0 : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_EN_LSCH0 (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH0_M (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH0_V 0x1
+#define LEDC_OVF_CNT_EN_LSCH0_S 15
+/* LEDC_OVF_NUM_LSCH0 : R/W ;bitpos:[14:5] ;default: 10'b0 ; */
+/*description: */
+#define LEDC_OVF_NUM_LSCH0 0x000003FF
+#define LEDC_OVF_NUM_LSCH0_M ((LEDC_OVF_NUM_LSCH0_V) << (LEDC_OVF_NUM_LSCH0_S))
+#define LEDC_OVF_NUM_LSCH0_V 0x3FF
+#define LEDC_OVF_NUM_LSCH0_S 5
+/* LEDC_PARA_UP_LSCH0 : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_PARA_UP_LSCH0 (BIT(4))
+#define LEDC_PARA_UP_LSCH0_M (BIT(4))
+#define LEDC_PARA_UP_LSCH0_V 0x1
+#define LEDC_PARA_UP_LSCH0_S 4
+/* LEDC_IDLE_LV_LSCH0 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_IDLE_LV_LSCH0 (BIT(3))
+#define LEDC_IDLE_LV_LSCH0_M (BIT(3))
+#define LEDC_IDLE_LV_LSCH0_V 0x1
+#define LEDC_IDLE_LV_LSCH0_S 3
+/* LEDC_SIG_OUT_EN_LSCH0 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_SIG_OUT_EN_LSCH0 (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH0_M (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH0_V 0x1
+#define LEDC_SIG_OUT_EN_LSCH0_S 2
+/* LEDC_TIMER_SEL_LSCH0 : R/W ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: */
+#define LEDC_TIMER_SEL_LSCH0 0x00000003
+#define LEDC_TIMER_SEL_LSCH0_M ((LEDC_TIMER_SEL_LSCH0_V) << (LEDC_TIMER_SEL_LSCH0_S))
+#define LEDC_TIMER_SEL_LSCH0_V 0x3
+#define LEDC_TIMER_SEL_LSCH0_S 0
+
+#define LEDC_LSCH0_HPOINT_REG (DR_REG_LEDC_BASE + 0x0004)
+/* LEDC_HPOINT_LSCH0 : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/*description: */
+#define LEDC_HPOINT_LSCH0 0x00003FFF
+#define LEDC_HPOINT_LSCH0_M ((LEDC_HPOINT_LSCH0_V) << (LEDC_HPOINT_LSCH0_S))
+#define LEDC_HPOINT_LSCH0_V 0x3FFF
+#define LEDC_HPOINT_LSCH0_S 0
+
+#define LEDC_LSCH0_DUTY_REG (DR_REG_LEDC_BASE + 0x0008)
+/* LEDC_DUTY_LSCH0 : R/W ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH0 0x0007FFFF
+#define LEDC_DUTY_LSCH0_M ((LEDC_DUTY_LSCH0_V) << (LEDC_DUTY_LSCH0_S))
+#define LEDC_DUTY_LSCH0_V 0x7FFFF
+#define LEDC_DUTY_LSCH0_S 0
+
+#define LEDC_LSCH0_CONF1_REG (DR_REG_LEDC_BASE + 0x000C)
+/* LEDC_DUTY_START_LSCH0 : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_START_LSCH0 (BIT(31))
+#define LEDC_DUTY_START_LSCH0_M (BIT(31))
+#define LEDC_DUTY_START_LSCH0_V 0x1
+#define LEDC_DUTY_START_LSCH0_S 31
+/* LEDC_DUTY_INC_LSCH0 : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_DUTY_INC_LSCH0 (BIT(30))
+#define LEDC_DUTY_INC_LSCH0_M (BIT(30))
+#define LEDC_DUTY_INC_LSCH0_V 0x1
+#define LEDC_DUTY_INC_LSCH0_S 30
+/* LEDC_DUTY_NUM_LSCH0 : R/W ;bitpos:[29:20] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_NUM_LSCH0 0x000003FF
+#define LEDC_DUTY_NUM_LSCH0_M ((LEDC_DUTY_NUM_LSCH0_V) << (LEDC_DUTY_NUM_LSCH0_S))
+#define LEDC_DUTY_NUM_LSCH0_V 0x3FF
+#define LEDC_DUTY_NUM_LSCH0_S 20
+/* LEDC_DUTY_CYCLE_LSCH0 : R/W ;bitpos:[19:10] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_CYCLE_LSCH0 0x000003FF
+#define LEDC_DUTY_CYCLE_LSCH0_M ((LEDC_DUTY_CYCLE_LSCH0_V) << (LEDC_DUTY_CYCLE_LSCH0_S))
+#define LEDC_DUTY_CYCLE_LSCH0_V 0x3FF
+#define LEDC_DUTY_CYCLE_LSCH0_S 10
+/* LEDC_DUTY_SCALE_LSCH0 : R/W ;bitpos:[9:0] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_SCALE_LSCH0 0x000003FF
+#define LEDC_DUTY_SCALE_LSCH0_M ((LEDC_DUTY_SCALE_LSCH0_V) << (LEDC_DUTY_SCALE_LSCH0_S))
+#define LEDC_DUTY_SCALE_LSCH0_V 0x3FF
+#define LEDC_DUTY_SCALE_LSCH0_S 0
+
+#define LEDC_LSCH0_DUTY_R_REG (DR_REG_LEDC_BASE + 0x0010)
+/* LEDC_DUTY_LSCH0 : RO ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH0 0x0007FFFF
+#define LEDC_DUTY_LSCH0_M ((LEDC_DUTY_LSCH0_V) << (LEDC_DUTY_LSCH0_S))
+#define LEDC_DUTY_LSCH0_V 0x7FFFF
+#define LEDC_DUTY_LSCH0_S 0
+
+#define LEDC_LSCH1_CONF0_REG (DR_REG_LEDC_BASE + 0x0014)
+/* LEDC_OVF_CNT_RESET_ST_LSCH1 : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_ST_LSCH1 (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH1_M (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH1_V 0x1
+#define LEDC_OVF_CNT_RESET_ST_LSCH1_S 17
+/* LEDC_OVF_CNT_RESET_LSCH1 : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_LSCH1 (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH1_M (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH1_V 0x1
+#define LEDC_OVF_CNT_RESET_LSCH1_S 16
+/* LEDC_OVF_CNT_EN_LSCH1 : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_EN_LSCH1 (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH1_M (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH1_V 0x1
+#define LEDC_OVF_CNT_EN_LSCH1_S 15
+/* LEDC_OVF_NUM_LSCH1 : R/W ;bitpos:[14:5] ;default: 10'b0 ; */
+/*description: */
+#define LEDC_OVF_NUM_LSCH1 0x000003FF
+#define LEDC_OVF_NUM_LSCH1_M ((LEDC_OVF_NUM_LSCH1_V) << (LEDC_OVF_NUM_LSCH1_S))
+#define LEDC_OVF_NUM_LSCH1_V 0x3FF
+#define LEDC_OVF_NUM_LSCH1_S 5
+/* LEDC_PARA_UP_LSCH1 : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_PARA_UP_LSCH1 (BIT(4))
+#define LEDC_PARA_UP_LSCH1_M (BIT(4))
+#define LEDC_PARA_UP_LSCH1_V 0x1
+#define LEDC_PARA_UP_LSCH1_S 4
+/* LEDC_IDLE_LV_LSCH1 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_IDLE_LV_LSCH1 (BIT(3))
+#define LEDC_IDLE_LV_LSCH1_M (BIT(3))
+#define LEDC_IDLE_LV_LSCH1_V 0x1
+#define LEDC_IDLE_LV_LSCH1_S 3
+/* LEDC_SIG_OUT_EN_LSCH1 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_SIG_OUT_EN_LSCH1 (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH1_M (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH1_V 0x1
+#define LEDC_SIG_OUT_EN_LSCH1_S 2
+/* LEDC_TIMER_SEL_LSCH1 : R/W ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: */
+#define LEDC_TIMER_SEL_LSCH1 0x00000003
+#define LEDC_TIMER_SEL_LSCH1_M ((LEDC_TIMER_SEL_LSCH1_V) << (LEDC_TIMER_SEL_LSCH1_S))
+#define LEDC_TIMER_SEL_LSCH1_V 0x3
+#define LEDC_TIMER_SEL_LSCH1_S 0
+
+#define LEDC_LSCH1_HPOINT_REG (DR_REG_LEDC_BASE + 0x0018)
+/* LEDC_HPOINT_LSCH1 : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/*description: */
+#define LEDC_HPOINT_LSCH1 0x00003FFF
+#define LEDC_HPOINT_LSCH1_M ((LEDC_HPOINT_LSCH1_V) << (LEDC_HPOINT_LSCH1_S))
+#define LEDC_HPOINT_LSCH1_V 0x3FFF
+#define LEDC_HPOINT_LSCH1_S 0
+
+#define LEDC_LSCH1_DUTY_REG (DR_REG_LEDC_BASE + 0x001C)
+/* LEDC_DUTY_LSCH1 : R/W ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH1 0x0007FFFF
+#define LEDC_DUTY_LSCH1_M ((LEDC_DUTY_LSCH1_V) << (LEDC_DUTY_LSCH1_S))
+#define LEDC_DUTY_LSCH1_V 0x7FFFF
+#define LEDC_DUTY_LSCH1_S 0
+
+#define LEDC_LSCH1_CONF1_REG (DR_REG_LEDC_BASE + 0x0020)
+/* LEDC_DUTY_START_LSCH1 : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_START_LSCH1 (BIT(31))
+#define LEDC_DUTY_START_LSCH1_M (BIT(31))
+#define LEDC_DUTY_START_LSCH1_V 0x1
+#define LEDC_DUTY_START_LSCH1_S 31
+/* LEDC_DUTY_INC_LSCH1 : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_DUTY_INC_LSCH1 (BIT(30))
+#define LEDC_DUTY_INC_LSCH1_M (BIT(30))
+#define LEDC_DUTY_INC_LSCH1_V 0x1
+#define LEDC_DUTY_INC_LSCH1_S 30
+/* LEDC_DUTY_NUM_LSCH1 : R/W ;bitpos:[29:20] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_NUM_LSCH1 0x000003FF
+#define LEDC_DUTY_NUM_LSCH1_M ((LEDC_DUTY_NUM_LSCH1_V) << (LEDC_DUTY_NUM_LSCH1_S))
+#define LEDC_DUTY_NUM_LSCH1_V 0x3FF
+#define LEDC_DUTY_NUM_LSCH1_S 20
+/* LEDC_DUTY_CYCLE_LSCH1 : R/W ;bitpos:[19:10] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_CYCLE_LSCH1 0x000003FF
+#define LEDC_DUTY_CYCLE_LSCH1_M ((LEDC_DUTY_CYCLE_LSCH1_V) << (LEDC_DUTY_CYCLE_LSCH1_S))
+#define LEDC_DUTY_CYCLE_LSCH1_V 0x3FF
+#define LEDC_DUTY_CYCLE_LSCH1_S 10
+/* LEDC_DUTY_SCALE_LSCH1 : R/W ;bitpos:[9:0] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_SCALE_LSCH1 0x000003FF
+#define LEDC_DUTY_SCALE_LSCH1_M ((LEDC_DUTY_SCALE_LSCH1_V) << (LEDC_DUTY_SCALE_LSCH1_S))
+#define LEDC_DUTY_SCALE_LSCH1_V 0x3FF
+#define LEDC_DUTY_SCALE_LSCH1_S 0
+
+#define LEDC_LSCH1_DUTY_R_REG (DR_REG_LEDC_BASE + 0x0024)
+/* LEDC_DUTY_LSCH1 : RO ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH1 0x0007FFFF
+#define LEDC_DUTY_LSCH1_M ((LEDC_DUTY_LSCH1_V) << (LEDC_DUTY_LSCH1_S))
+#define LEDC_DUTY_LSCH1_V 0x7FFFF
+#define LEDC_DUTY_LSCH1_S 0
+
+#define LEDC_LSCH2_CONF0_REG (DR_REG_LEDC_BASE + 0x0028)
+/* LEDC_OVF_CNT_RESET_ST_LSCH2 : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_ST_LSCH2 (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH2_M (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH2_V 0x1
+#define LEDC_OVF_CNT_RESET_ST_LSCH2_S 17
+/* LEDC_OVF_CNT_RESET_LSCH2 : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_LSCH2 (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH2_M (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH2_V 0x1
+#define LEDC_OVF_CNT_RESET_LSCH2_S 16
+/* LEDC_OVF_CNT_EN_LSCH2 : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_EN_LSCH2 (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH2_M (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH2_V 0x1
+#define LEDC_OVF_CNT_EN_LSCH2_S 15
+/* LEDC_OVF_NUM_LSCH2 : R/W ;bitpos:[14:5] ;default: 10'b0 ; */
+/*description: */
+#define LEDC_OVF_NUM_LSCH2 0x000003FF
+#define LEDC_OVF_NUM_LSCH2_M ((LEDC_OVF_NUM_LSCH2_V) << (LEDC_OVF_NUM_LSCH2_S))
+#define LEDC_OVF_NUM_LSCH2_V 0x3FF
+#define LEDC_OVF_NUM_LSCH2_S 5
+/* LEDC_PARA_UP_LSCH2 : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_PARA_UP_LSCH2 (BIT(4))
+#define LEDC_PARA_UP_LSCH2_M (BIT(4))
+#define LEDC_PARA_UP_LSCH2_V 0x1
+#define LEDC_PARA_UP_LSCH2_S 4
+/* LEDC_IDLE_LV_LSCH2 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_IDLE_LV_LSCH2 (BIT(3))
+#define LEDC_IDLE_LV_LSCH2_M (BIT(3))
+#define LEDC_IDLE_LV_LSCH2_V 0x1
+#define LEDC_IDLE_LV_LSCH2_S 3
+/* LEDC_SIG_OUT_EN_LSCH2 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_SIG_OUT_EN_LSCH2 (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH2_M (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH2_V 0x1
+#define LEDC_SIG_OUT_EN_LSCH2_S 2
+/* LEDC_TIMER_SEL_LSCH2 : R/W ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: */
+#define LEDC_TIMER_SEL_LSCH2 0x00000003
+#define LEDC_TIMER_SEL_LSCH2_M ((LEDC_TIMER_SEL_LSCH2_V) << (LEDC_TIMER_SEL_LSCH2_S))
+#define LEDC_TIMER_SEL_LSCH2_V 0x3
+#define LEDC_TIMER_SEL_LSCH2_S 0
+
+#define LEDC_LSCH2_HPOINT_REG (DR_REG_LEDC_BASE + 0x002C)
+/* LEDC_HPOINT_LSCH2 : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/*description: */
+#define LEDC_HPOINT_LSCH2 0x00003FFF
+#define LEDC_HPOINT_LSCH2_M ((LEDC_HPOINT_LSCH2_V) << (LEDC_HPOINT_LSCH2_S))
+#define LEDC_HPOINT_LSCH2_V 0x3FFF
+#define LEDC_HPOINT_LSCH2_S 0
+
+#define LEDC_LSCH2_DUTY_REG (DR_REG_LEDC_BASE + 0x0030)
+/* LEDC_DUTY_LSCH2 : R/W ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH2 0x0007FFFF
+#define LEDC_DUTY_LSCH2_M ((LEDC_DUTY_LSCH2_V) << (LEDC_DUTY_LSCH2_S))
+#define LEDC_DUTY_LSCH2_V 0x7FFFF
+#define LEDC_DUTY_LSCH2_S 0
+
+#define LEDC_LSCH2_CONF1_REG (DR_REG_LEDC_BASE + 0x0034)
+/* LEDC_DUTY_START_LSCH2 : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_START_LSCH2 (BIT(31))
+#define LEDC_DUTY_START_LSCH2_M (BIT(31))
+#define LEDC_DUTY_START_LSCH2_V 0x1
+#define LEDC_DUTY_START_LSCH2_S 31
+/* LEDC_DUTY_INC_LSCH2 : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_DUTY_INC_LSCH2 (BIT(30))
+#define LEDC_DUTY_INC_LSCH2_M (BIT(30))
+#define LEDC_DUTY_INC_LSCH2_V 0x1
+#define LEDC_DUTY_INC_LSCH2_S 30
+/* LEDC_DUTY_NUM_LSCH2 : R/W ;bitpos:[29:20] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_NUM_LSCH2 0x000003FF
+#define LEDC_DUTY_NUM_LSCH2_M ((LEDC_DUTY_NUM_LSCH2_V) << (LEDC_DUTY_NUM_LSCH2_S))
+#define LEDC_DUTY_NUM_LSCH2_V 0x3FF
+#define LEDC_DUTY_NUM_LSCH2_S 20
+/* LEDC_DUTY_CYCLE_LSCH2 : R/W ;bitpos:[19:10] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_CYCLE_LSCH2 0x000003FF
+#define LEDC_DUTY_CYCLE_LSCH2_M ((LEDC_DUTY_CYCLE_LSCH2_V) << (LEDC_DUTY_CYCLE_LSCH2_S))
+#define LEDC_DUTY_CYCLE_LSCH2_V 0x3FF
+#define LEDC_DUTY_CYCLE_LSCH2_S 10
+/* LEDC_DUTY_SCALE_LSCH2 : R/W ;bitpos:[9:0] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_SCALE_LSCH2 0x000003FF
+#define LEDC_DUTY_SCALE_LSCH2_M ((LEDC_DUTY_SCALE_LSCH2_V) << (LEDC_DUTY_SCALE_LSCH2_S))
+#define LEDC_DUTY_SCALE_LSCH2_V 0x3FF
+#define LEDC_DUTY_SCALE_LSCH2_S 0
+
+#define LEDC_LSCH2_DUTY_R_REG (DR_REG_LEDC_BASE + 0x0038)
+/* LEDC_DUTY_LSCH2 : RO ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH2 0x0007FFFF
+#define LEDC_DUTY_LSCH2_M ((LEDC_DUTY_LSCH2_V) << (LEDC_DUTY_LSCH2_S))
+#define LEDC_DUTY_LSCH2_V 0x7FFFF
+#define LEDC_DUTY_LSCH2_S 0
+
+#define LEDC_LSCH3_CONF0_REG (DR_REG_LEDC_BASE + 0x003C)
+/* LEDC_OVF_CNT_RESET_ST_LSCH3 : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_ST_LSCH3 (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH3_M (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH3_V 0x1
+#define LEDC_OVF_CNT_RESET_ST_LSCH3_S 17
+/* LEDC_OVF_CNT_RESET_LSCH3 : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_LSCH3 (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH3_M (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH3_V 0x1
+#define LEDC_OVF_CNT_RESET_LSCH3_S 16
+/* LEDC_OVF_CNT_EN_LSCH3 : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_EN_LSCH3 (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH3_M (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH3_V 0x1
+#define LEDC_OVF_CNT_EN_LSCH3_S 15
+/* LEDC_OVF_NUM_LSCH3 : R/W ;bitpos:[14:5] ;default: 10'b0 ; */
+/*description: */
+#define LEDC_OVF_NUM_LSCH3 0x000003FF
+#define LEDC_OVF_NUM_LSCH3_M ((LEDC_OVF_NUM_LSCH3_V) << (LEDC_OVF_NUM_LSCH3_S))
+#define LEDC_OVF_NUM_LSCH3_V 0x3FF
+#define LEDC_OVF_NUM_LSCH3_S 5
+/* LEDC_PARA_UP_LSCH3 : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_PARA_UP_LSCH3 (BIT(4))
+#define LEDC_PARA_UP_LSCH3_M (BIT(4))
+#define LEDC_PARA_UP_LSCH3_V 0x1
+#define LEDC_PARA_UP_LSCH3_S 4
+/* LEDC_IDLE_LV_LSCH3 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_IDLE_LV_LSCH3 (BIT(3))
+#define LEDC_IDLE_LV_LSCH3_M (BIT(3))
+#define LEDC_IDLE_LV_LSCH3_V 0x1
+#define LEDC_IDLE_LV_LSCH3_S 3
+/* LEDC_SIG_OUT_EN_LSCH3 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_SIG_OUT_EN_LSCH3 (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH3_M (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH3_V 0x1
+#define LEDC_SIG_OUT_EN_LSCH3_S 2
+/* LEDC_TIMER_SEL_LSCH3 : R/W ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: */
+#define LEDC_TIMER_SEL_LSCH3 0x00000003
+#define LEDC_TIMER_SEL_LSCH3_M ((LEDC_TIMER_SEL_LSCH3_V) << (LEDC_TIMER_SEL_LSCH3_S))
+#define LEDC_TIMER_SEL_LSCH3_V 0x3
+#define LEDC_TIMER_SEL_LSCH3_S 0
+
+#define LEDC_LSCH3_HPOINT_REG (DR_REG_LEDC_BASE + 0x0040)
+/* LEDC_HPOINT_LSCH3 : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/*description: */
+#define LEDC_HPOINT_LSCH3 0x00003FFF
+#define LEDC_HPOINT_LSCH3_M ((LEDC_HPOINT_LSCH3_V) << (LEDC_HPOINT_LSCH3_S))
+#define LEDC_HPOINT_LSCH3_V 0x3FFF
+#define LEDC_HPOINT_LSCH3_S 0
+
+#define LEDC_LSCH3_DUTY_REG (DR_REG_LEDC_BASE + 0x0044)
+/* LEDC_DUTY_LSCH3 : R/W ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH3 0x0007FFFF
+#define LEDC_DUTY_LSCH3_M ((LEDC_DUTY_LSCH3_V) << (LEDC_DUTY_LSCH3_S))
+#define LEDC_DUTY_LSCH3_V 0x7FFFF
+#define LEDC_DUTY_LSCH3_S 0
+
+#define LEDC_LSCH3_CONF1_REG (DR_REG_LEDC_BASE + 0x0048)
+/* LEDC_DUTY_START_LSCH3 : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_START_LSCH3 (BIT(31))
+#define LEDC_DUTY_START_LSCH3_M (BIT(31))
+#define LEDC_DUTY_START_LSCH3_V 0x1
+#define LEDC_DUTY_START_LSCH3_S 31
+/* LEDC_DUTY_INC_LSCH3 : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_DUTY_INC_LSCH3 (BIT(30))
+#define LEDC_DUTY_INC_LSCH3_M (BIT(30))
+#define LEDC_DUTY_INC_LSCH3_V 0x1
+#define LEDC_DUTY_INC_LSCH3_S 30
+/* LEDC_DUTY_NUM_LSCH3 : R/W ;bitpos:[29:20] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_NUM_LSCH3 0x000003FF
+#define LEDC_DUTY_NUM_LSCH3_M ((LEDC_DUTY_NUM_LSCH3_V) << (LEDC_DUTY_NUM_LSCH3_S))
+#define LEDC_DUTY_NUM_LSCH3_V 0x3FF
+#define LEDC_DUTY_NUM_LSCH3_S 20
+/* LEDC_DUTY_CYCLE_LSCH3 : R/W ;bitpos:[19:10] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_CYCLE_LSCH3 0x000003FF
+#define LEDC_DUTY_CYCLE_LSCH3_M ((LEDC_DUTY_CYCLE_LSCH3_V) << (LEDC_DUTY_CYCLE_LSCH3_S))
+#define LEDC_DUTY_CYCLE_LSCH3_V 0x3FF
+#define LEDC_DUTY_CYCLE_LSCH3_S 10
+/* LEDC_DUTY_SCALE_LSCH3 : R/W ;bitpos:[9:0] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_SCALE_LSCH3 0x000003FF
+#define LEDC_DUTY_SCALE_LSCH3_M ((LEDC_DUTY_SCALE_LSCH3_V) << (LEDC_DUTY_SCALE_LSCH3_S))
+#define LEDC_DUTY_SCALE_LSCH3_V 0x3FF
+#define LEDC_DUTY_SCALE_LSCH3_S 0
+
+#define LEDC_LSCH3_DUTY_R_REG (DR_REG_LEDC_BASE + 0x004C)
+/* LEDC_DUTY_LSCH3 : RO ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH3 0x0007FFFF
+#define LEDC_DUTY_LSCH3_M ((LEDC_DUTY_LSCH3_V) << (LEDC_DUTY_LSCH3_S))
+#define LEDC_DUTY_LSCH3_V 0x7FFFF
+#define LEDC_DUTY_LSCH3_S 0
+
+#define LEDC_LSCH4_CONF0_REG (DR_REG_LEDC_BASE + 0x0050)
+/* LEDC_OVF_CNT_RESET_ST_LSCH4 : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_ST_LSCH4 (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH4_M (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH4_V 0x1
+#define LEDC_OVF_CNT_RESET_ST_LSCH4_S 17
+/* LEDC_OVF_CNT_RESET_LSCH4 : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_LSCH4 (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH4_M (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH4_V 0x1
+#define LEDC_OVF_CNT_RESET_LSCH4_S 16
+/* LEDC_OVF_CNT_EN_LSCH4 : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_EN_LSCH4 (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH4_M (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH4_V 0x1
+#define LEDC_OVF_CNT_EN_LSCH4_S 15
+/* LEDC_OVF_NUM_LSCH4 : R/W ;bitpos:[14:5] ;default: 10'b0 ; */
+/*description: */
+#define LEDC_OVF_NUM_LSCH4 0x000003FF
+#define LEDC_OVF_NUM_LSCH4_M ((LEDC_OVF_NUM_LSCH4_V) << (LEDC_OVF_NUM_LSCH4_S))
+#define LEDC_OVF_NUM_LSCH4_V 0x3FF
+#define LEDC_OVF_NUM_LSCH4_S 5
+/* LEDC_PARA_UP_LSCH4 : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_PARA_UP_LSCH4 (BIT(4))
+#define LEDC_PARA_UP_LSCH4_M (BIT(4))
+#define LEDC_PARA_UP_LSCH4_V 0x1
+#define LEDC_PARA_UP_LSCH4_S 4
+/* LEDC_IDLE_LV_LSCH4 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_IDLE_LV_LSCH4 (BIT(3))
+#define LEDC_IDLE_LV_LSCH4_M (BIT(3))
+#define LEDC_IDLE_LV_LSCH4_V 0x1
+#define LEDC_IDLE_LV_LSCH4_S 3
+/* LEDC_SIG_OUT_EN_LSCH4 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_SIG_OUT_EN_LSCH4 (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH4_M (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH4_V 0x1
+#define LEDC_SIG_OUT_EN_LSCH4_S 2
+/* LEDC_TIMER_SEL_LSCH4 : R/W ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: */
+#define LEDC_TIMER_SEL_LSCH4 0x00000003
+#define LEDC_TIMER_SEL_LSCH4_M ((LEDC_TIMER_SEL_LSCH4_V) << (LEDC_TIMER_SEL_LSCH4_S))
+#define LEDC_TIMER_SEL_LSCH4_V 0x3
+#define LEDC_TIMER_SEL_LSCH4_S 0
+
+#define LEDC_LSCH4_HPOINT_REG (DR_REG_LEDC_BASE + 0x0054)
+/* LEDC_HPOINT_LSCH4 : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/*description: */
+#define LEDC_HPOINT_LSCH4 0x00003FFF
+#define LEDC_HPOINT_LSCH4_M ((LEDC_HPOINT_LSCH4_V) << (LEDC_HPOINT_LSCH4_S))
+#define LEDC_HPOINT_LSCH4_V 0x3FFF
+#define LEDC_HPOINT_LSCH4_S 0
+
+#define LEDC_LSCH4_DUTY_REG (DR_REG_LEDC_BASE + 0x0058)
+/* LEDC_DUTY_LSCH4 : R/W ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH4 0x0007FFFF
+#define LEDC_DUTY_LSCH4_M ((LEDC_DUTY_LSCH4_V) << (LEDC_DUTY_LSCH4_S))
+#define LEDC_DUTY_LSCH4_V 0x7FFFF
+#define LEDC_DUTY_LSCH4_S 0
+
+#define LEDC_LSCH4_CONF1_REG (DR_REG_LEDC_BASE + 0x005C)
+/* LEDC_DUTY_START_LSCH4 : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_START_LSCH4 (BIT(31))
+#define LEDC_DUTY_START_LSCH4_M (BIT(31))
+#define LEDC_DUTY_START_LSCH4_V 0x1
+#define LEDC_DUTY_START_LSCH4_S 31
+/* LEDC_DUTY_INC_LSCH4 : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_DUTY_INC_LSCH4 (BIT(30))
+#define LEDC_DUTY_INC_LSCH4_M (BIT(30))
+#define LEDC_DUTY_INC_LSCH4_V 0x1
+#define LEDC_DUTY_INC_LSCH4_S 30
+/* LEDC_DUTY_NUM_LSCH4 : R/W ;bitpos:[29:20] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_NUM_LSCH4 0x000003FF
+#define LEDC_DUTY_NUM_LSCH4_M ((LEDC_DUTY_NUM_LSCH4_V) << (LEDC_DUTY_NUM_LSCH4_S))
+#define LEDC_DUTY_NUM_LSCH4_V 0x3FF
+#define LEDC_DUTY_NUM_LSCH4_S 20
+/* LEDC_DUTY_CYCLE_LSCH4 : R/W ;bitpos:[19:10] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_CYCLE_LSCH4 0x000003FF
+#define LEDC_DUTY_CYCLE_LSCH4_M ((LEDC_DUTY_CYCLE_LSCH4_V) << (LEDC_DUTY_CYCLE_LSCH4_S))
+#define LEDC_DUTY_CYCLE_LSCH4_V 0x3FF
+#define LEDC_DUTY_CYCLE_LSCH4_S 10
+/* LEDC_DUTY_SCALE_LSCH4 : R/W ;bitpos:[9:0] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_SCALE_LSCH4 0x000003FF
+#define LEDC_DUTY_SCALE_LSCH4_M ((LEDC_DUTY_SCALE_LSCH4_V) << (LEDC_DUTY_SCALE_LSCH4_S))
+#define LEDC_DUTY_SCALE_LSCH4_V 0x3FF
+#define LEDC_DUTY_SCALE_LSCH4_S 0
+
+#define LEDC_LSCH4_DUTY_R_REG (DR_REG_LEDC_BASE + 0x0060)
+/* LEDC_DUTY_LSCH4 : RO ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH4 0x0007FFFF
+#define LEDC_DUTY_LSCH4_M ((LEDC_DUTY_LSCH4_V) << (LEDC_DUTY_LSCH4_S))
+#define LEDC_DUTY_LSCH4_V 0x7FFFF
+#define LEDC_DUTY_LSCH4_S 0
+
+#define LEDC_LSCH5_CONF0_REG (DR_REG_LEDC_BASE + 0x0064)
+/* LEDC_OVF_CNT_RESET_ST_LSCH5 : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_ST_LSCH5 (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH5_M (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH5_V 0x1
+#define LEDC_OVF_CNT_RESET_ST_LSCH5_S 17
+/* LEDC_OVF_CNT_RESET_LSCH5 : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_LSCH5 (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH5_M (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH5_V 0x1
+#define LEDC_OVF_CNT_RESET_LSCH5_S 16
+/* LEDC_OVF_CNT_EN_LSCH5 : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_EN_LSCH5 (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH5_M (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH5_V 0x1
+#define LEDC_OVF_CNT_EN_LSCH5_S 15
+/* LEDC_OVF_NUM_LSCH5 : R/W ;bitpos:[14:5] ;default: 10'b0 ; */
+/*description: */
+#define LEDC_OVF_NUM_LSCH5 0x000003FF
+#define LEDC_OVF_NUM_LSCH5_M ((LEDC_OVF_NUM_LSCH5_V) << (LEDC_OVF_NUM_LSCH5_S))
+#define LEDC_OVF_NUM_LSCH5_V 0x3FF
+#define LEDC_OVF_NUM_LSCH5_S 5
+/* LEDC_PARA_UP_LSCH5 : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_PARA_UP_LSCH5 (BIT(4))
+#define LEDC_PARA_UP_LSCH5_M (BIT(4))
+#define LEDC_PARA_UP_LSCH5_V 0x1
+#define LEDC_PARA_UP_LSCH5_S 4
+/* LEDC_IDLE_LV_LSCH5 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_IDLE_LV_LSCH5 (BIT(3))
+#define LEDC_IDLE_LV_LSCH5_M (BIT(3))
+#define LEDC_IDLE_LV_LSCH5_V 0x1
+#define LEDC_IDLE_LV_LSCH5_S 3
+/* LEDC_SIG_OUT_EN_LSCH5 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_SIG_OUT_EN_LSCH5 (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH5_M (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH5_V 0x1
+#define LEDC_SIG_OUT_EN_LSCH5_S 2
+/* LEDC_TIMER_SEL_LSCH5 : R/W ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: */
+#define LEDC_TIMER_SEL_LSCH5 0x00000003
+#define LEDC_TIMER_SEL_LSCH5_M ((LEDC_TIMER_SEL_LSCH5_V) << (LEDC_TIMER_SEL_LSCH5_S))
+#define LEDC_TIMER_SEL_LSCH5_V 0x3
+#define LEDC_TIMER_SEL_LSCH5_S 0
+
+#define LEDC_LSCH5_HPOINT_REG (DR_REG_LEDC_BASE + 0x0068)
+/* LEDC_HPOINT_LSCH5 : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/*description: */
+#define LEDC_HPOINT_LSCH5 0x00003FFF
+#define LEDC_HPOINT_LSCH5_M ((LEDC_HPOINT_LSCH5_V) << (LEDC_HPOINT_LSCH5_S))
+#define LEDC_HPOINT_LSCH5_V 0x3FFF
+#define LEDC_HPOINT_LSCH5_S 0
+
+#define LEDC_LSCH5_DUTY_REG (DR_REG_LEDC_BASE + 0x006C)
+/* LEDC_DUTY_LSCH5 : R/W ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH5 0x0007FFFF
+#define LEDC_DUTY_LSCH5_M ((LEDC_DUTY_LSCH5_V) << (LEDC_DUTY_LSCH5_S))
+#define LEDC_DUTY_LSCH5_V 0x7FFFF
+#define LEDC_DUTY_LSCH5_S 0
+
+#define LEDC_LSCH5_CONF1_REG (DR_REG_LEDC_BASE + 0x0070)
+/* LEDC_DUTY_START_LSCH5 : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_START_LSCH5 (BIT(31))
+#define LEDC_DUTY_START_LSCH5_M (BIT(31))
+#define LEDC_DUTY_START_LSCH5_V 0x1
+#define LEDC_DUTY_START_LSCH5_S 31
+/* LEDC_DUTY_INC_LSCH5 : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_DUTY_INC_LSCH5 (BIT(30))
+#define LEDC_DUTY_INC_LSCH5_M (BIT(30))
+#define LEDC_DUTY_INC_LSCH5_V 0x1
+#define LEDC_DUTY_INC_LSCH5_S 30
+/* LEDC_DUTY_NUM_LSCH5 : R/W ;bitpos:[29:20] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_NUM_LSCH5 0x000003FF
+#define LEDC_DUTY_NUM_LSCH5_M ((LEDC_DUTY_NUM_LSCH5_V) << (LEDC_DUTY_NUM_LSCH5_S))
+#define LEDC_DUTY_NUM_LSCH5_V 0x3FF
+#define LEDC_DUTY_NUM_LSCH5_S 20
+/* LEDC_DUTY_CYCLE_LSCH5 : R/W ;bitpos:[19:10] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_CYCLE_LSCH5 0x000003FF
+#define LEDC_DUTY_CYCLE_LSCH5_M ((LEDC_DUTY_CYCLE_LSCH5_V) << (LEDC_DUTY_CYCLE_LSCH5_S))
+#define LEDC_DUTY_CYCLE_LSCH5_V 0x3FF
+#define LEDC_DUTY_CYCLE_LSCH5_S 10
+/* LEDC_DUTY_SCALE_LSCH5 : R/W ;bitpos:[9:0] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_SCALE_LSCH5 0x000003FF
+#define LEDC_DUTY_SCALE_LSCH5_M ((LEDC_DUTY_SCALE_LSCH5_V) << (LEDC_DUTY_SCALE_LSCH5_S))
+#define LEDC_DUTY_SCALE_LSCH5_V 0x3FF
+#define LEDC_DUTY_SCALE_LSCH5_S 0
+
+#define LEDC_LSCH5_DUTY_R_REG (DR_REG_LEDC_BASE + 0x0074)
+/* LEDC_DUTY_LSCH5 : RO ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH5 0x0007FFFF
+#define LEDC_DUTY_LSCH5_M ((LEDC_DUTY_LSCH5_V) << (LEDC_DUTY_LSCH5_S))
+#define LEDC_DUTY_LSCH5_V 0x7FFFF
+#define LEDC_DUTY_LSCH5_S 0
+
+#define LEDC_LSCH6_CONF0_REG (DR_REG_LEDC_BASE + 0x0078)
+/* LEDC_OVF_CNT_RESET_ST_LSCH6 : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_ST_LSCH6 (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH6_M (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH6_V 0x1
+#define LEDC_OVF_CNT_RESET_ST_LSCH6_S 17
+/* LEDC_OVF_CNT_RESET_LSCH6 : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_LSCH6 (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH6_M (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH6_V 0x1
+#define LEDC_OVF_CNT_RESET_LSCH6_S 16
+/* LEDC_OVF_CNT_EN_LSCH6 : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_EN_LSCH6 (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH6_M (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH6_V 0x1
+#define LEDC_OVF_CNT_EN_LSCH6_S 15
+/* LEDC_OVF_NUM_LSCH6 : R/W ;bitpos:[14:5] ;default: 10'b0 ; */
+/*description: */
+#define LEDC_OVF_NUM_LSCH6 0x000003FF
+#define LEDC_OVF_NUM_LSCH6_M ((LEDC_OVF_NUM_LSCH6_V) << (LEDC_OVF_NUM_LSCH6_S))
+#define LEDC_OVF_NUM_LSCH6_V 0x3FF
+#define LEDC_OVF_NUM_LSCH6_S 5
+/* LEDC_PARA_UP_LSCH6 : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_PARA_UP_LSCH6 (BIT(4))
+#define LEDC_PARA_UP_LSCH6_M (BIT(4))
+#define LEDC_PARA_UP_LSCH6_V 0x1
+#define LEDC_PARA_UP_LSCH6_S 4
+/* LEDC_IDLE_LV_LSCH6 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_IDLE_LV_LSCH6 (BIT(3))
+#define LEDC_IDLE_LV_LSCH6_M (BIT(3))
+#define LEDC_IDLE_LV_LSCH6_V 0x1
+#define LEDC_IDLE_LV_LSCH6_S 3
+/* LEDC_SIG_OUT_EN_LSCH6 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_SIG_OUT_EN_LSCH6 (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH6_M (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH6_V 0x1
+#define LEDC_SIG_OUT_EN_LSCH6_S 2
+/* LEDC_TIMER_SEL_LSCH6 : R/W ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: */
+#define LEDC_TIMER_SEL_LSCH6 0x00000003
+#define LEDC_TIMER_SEL_LSCH6_M ((LEDC_TIMER_SEL_LSCH6_V) << (LEDC_TIMER_SEL_LSCH6_S))
+#define LEDC_TIMER_SEL_LSCH6_V 0x3
+#define LEDC_TIMER_SEL_LSCH6_S 0
+
+#define LEDC_LSCH6_HPOINT_REG (DR_REG_LEDC_BASE + 0x007C)
+/* LEDC_HPOINT_LSCH6 : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/*description: */
+#define LEDC_HPOINT_LSCH6 0x00003FFF
+#define LEDC_HPOINT_LSCH6_M ((LEDC_HPOINT_LSCH6_V) << (LEDC_HPOINT_LSCH6_S))
+#define LEDC_HPOINT_LSCH6_V 0x3FFF
+#define LEDC_HPOINT_LSCH6_S 0
+
+#define LEDC_LSCH6_DUTY_REG (DR_REG_LEDC_BASE + 0x0080)
+/* LEDC_DUTY_LSCH6 : R/W ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH6 0x0007FFFF
+#define LEDC_DUTY_LSCH6_M ((LEDC_DUTY_LSCH6_V) << (LEDC_DUTY_LSCH6_S))
+#define LEDC_DUTY_LSCH6_V 0x7FFFF
+#define LEDC_DUTY_LSCH6_S 0
+
+#define LEDC_LSCH6_CONF1_REG (DR_REG_LEDC_BASE + 0x0084)
+/* LEDC_DUTY_START_LSCH6 : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_START_LSCH6 (BIT(31))
+#define LEDC_DUTY_START_LSCH6_M (BIT(31))
+#define LEDC_DUTY_START_LSCH6_V 0x1
+#define LEDC_DUTY_START_LSCH6_S 31
+/* LEDC_DUTY_INC_LSCH6 : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_DUTY_INC_LSCH6 (BIT(30))
+#define LEDC_DUTY_INC_LSCH6_M (BIT(30))
+#define LEDC_DUTY_INC_LSCH6_V 0x1
+#define LEDC_DUTY_INC_LSCH6_S 30
+/* LEDC_DUTY_NUM_LSCH6 : R/W ;bitpos:[29:20] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_NUM_LSCH6 0x000003FF
+#define LEDC_DUTY_NUM_LSCH6_M ((LEDC_DUTY_NUM_LSCH6_V) << (LEDC_DUTY_NUM_LSCH6_S))
+#define LEDC_DUTY_NUM_LSCH6_V 0x3FF
+#define LEDC_DUTY_NUM_LSCH6_S 20
+/* LEDC_DUTY_CYCLE_LSCH6 : R/W ;bitpos:[19:10] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_CYCLE_LSCH6 0x000003FF
+#define LEDC_DUTY_CYCLE_LSCH6_M ((LEDC_DUTY_CYCLE_LSCH6_V) << (LEDC_DUTY_CYCLE_LSCH6_S))
+#define LEDC_DUTY_CYCLE_LSCH6_V 0x3FF
+#define LEDC_DUTY_CYCLE_LSCH6_S 10
+/* LEDC_DUTY_SCALE_LSCH6 : R/W ;bitpos:[9:0] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_SCALE_LSCH6 0x000003FF
+#define LEDC_DUTY_SCALE_LSCH6_M ((LEDC_DUTY_SCALE_LSCH6_V) << (LEDC_DUTY_SCALE_LSCH6_S))
+#define LEDC_DUTY_SCALE_LSCH6_V 0x3FF
+#define LEDC_DUTY_SCALE_LSCH6_S 0
+
+#define LEDC_LSCH6_DUTY_R_REG (DR_REG_LEDC_BASE + 0x0088)
+/* LEDC_DUTY_LSCH6 : RO ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH6 0x0007FFFF
+#define LEDC_DUTY_LSCH6_M ((LEDC_DUTY_LSCH6_V) << (LEDC_DUTY_LSCH6_S))
+#define LEDC_DUTY_LSCH6_V 0x7FFFF
+#define LEDC_DUTY_LSCH6_S 0
+
+#define LEDC_LSCH7_CONF0_REG (DR_REG_LEDC_BASE + 0x008C)
+/* LEDC_OVF_CNT_RESET_ST_LSCH7 : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_ST_LSCH7 (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH7_M (BIT(17))
+#define LEDC_OVF_CNT_RESET_ST_LSCH7_V 0x1
+#define LEDC_OVF_CNT_RESET_ST_LSCH7_S 17
+/* LEDC_OVF_CNT_RESET_LSCH7 : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_RESET_LSCH7 (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH7_M (BIT(16))
+#define LEDC_OVF_CNT_RESET_LSCH7_V 0x1
+#define LEDC_OVF_CNT_RESET_LSCH7_S 16
+/* LEDC_OVF_CNT_EN_LSCH7 : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_EN_LSCH7 (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH7_M (BIT(15))
+#define LEDC_OVF_CNT_EN_LSCH7_V 0x1
+#define LEDC_OVF_CNT_EN_LSCH7_S 15
+/* LEDC_OVF_NUM_LSCH7 : R/W ;bitpos:[14:5] ;default: 10'b0 ; */
+/*description: */
+#define LEDC_OVF_NUM_LSCH7 0x000003FF
+#define LEDC_OVF_NUM_LSCH7_M ((LEDC_OVF_NUM_LSCH7_V) << (LEDC_OVF_NUM_LSCH7_S))
+#define LEDC_OVF_NUM_LSCH7_V 0x3FF
+#define LEDC_OVF_NUM_LSCH7_S 5
+/* LEDC_PARA_UP_LSCH7 : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_PARA_UP_LSCH7 (BIT(4))
+#define LEDC_PARA_UP_LSCH7_M (BIT(4))
+#define LEDC_PARA_UP_LSCH7_V 0x1
+#define LEDC_PARA_UP_LSCH7_S 4
+/* LEDC_IDLE_LV_LSCH7 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_IDLE_LV_LSCH7 (BIT(3))
+#define LEDC_IDLE_LV_LSCH7_M (BIT(3))
+#define LEDC_IDLE_LV_LSCH7_V 0x1
+#define LEDC_IDLE_LV_LSCH7_S 3
+/* LEDC_SIG_OUT_EN_LSCH7 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_SIG_OUT_EN_LSCH7 (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH7_M (BIT(2))
+#define LEDC_SIG_OUT_EN_LSCH7_V 0x1
+#define LEDC_SIG_OUT_EN_LSCH7_S 2
+/* LEDC_TIMER_SEL_LSCH7 : R/W ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: */
+#define LEDC_TIMER_SEL_LSCH7 0x00000003
+#define LEDC_TIMER_SEL_LSCH7_M ((LEDC_TIMER_SEL_LSCH7_V) << (LEDC_TIMER_SEL_LSCH7_S))
+#define LEDC_TIMER_SEL_LSCH7_V 0x3
+#define LEDC_TIMER_SEL_LSCH7_S 0
+
+#define LEDC_LSCH7_HPOINT_REG (DR_REG_LEDC_BASE + 0x0090)
+/* LEDC_HPOINT_LSCH7 : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/*description: */
+#define LEDC_HPOINT_LSCH7 0x00003FFF
+#define LEDC_HPOINT_LSCH7_M ((LEDC_HPOINT_LSCH7_V) << (LEDC_HPOINT_LSCH7_S))
+#define LEDC_HPOINT_LSCH7_V 0x3FFF
+#define LEDC_HPOINT_LSCH7_S 0
+
+#define LEDC_LSCH7_DUTY_REG (DR_REG_LEDC_BASE + 0x0094)
+/* LEDC_DUTY_LSCH7 : R/W ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH7 0x0007FFFF
+#define LEDC_DUTY_LSCH7_M ((LEDC_DUTY_LSCH7_V) << (LEDC_DUTY_LSCH7_S))
+#define LEDC_DUTY_LSCH7_V 0x7FFFF
+#define LEDC_DUTY_LSCH7_S 0
+
+#define LEDC_LSCH7_CONF1_REG (DR_REG_LEDC_BASE + 0x0098)
+/* LEDC_DUTY_START_LSCH7 : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_START_LSCH7 (BIT(31))
+#define LEDC_DUTY_START_LSCH7_M (BIT(31))
+#define LEDC_DUTY_START_LSCH7_V 0x1
+#define LEDC_DUTY_START_LSCH7_S 31
+/* LEDC_DUTY_INC_LSCH7 : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_DUTY_INC_LSCH7 (BIT(30))
+#define LEDC_DUTY_INC_LSCH7_M (BIT(30))
+#define LEDC_DUTY_INC_LSCH7_V 0x1
+#define LEDC_DUTY_INC_LSCH7_S 30
+/* LEDC_DUTY_NUM_LSCH7 : R/W ;bitpos:[29:20] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_NUM_LSCH7 0x000003FF
+#define LEDC_DUTY_NUM_LSCH7_M ((LEDC_DUTY_NUM_LSCH7_V) << (LEDC_DUTY_NUM_LSCH7_S))
+#define LEDC_DUTY_NUM_LSCH7_V 0x3FF
+#define LEDC_DUTY_NUM_LSCH7_S 20
+/* LEDC_DUTY_CYCLE_LSCH7 : R/W ;bitpos:[19:10] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_CYCLE_LSCH7 0x000003FF
+#define LEDC_DUTY_CYCLE_LSCH7_M ((LEDC_DUTY_CYCLE_LSCH7_V) << (LEDC_DUTY_CYCLE_LSCH7_S))
+#define LEDC_DUTY_CYCLE_LSCH7_V 0x3FF
+#define LEDC_DUTY_CYCLE_LSCH7_S 10
+/* LEDC_DUTY_SCALE_LSCH7 : R/W ;bitpos:[9:0] ;default: 10'h0 ; */
+/*description: */
+#define LEDC_DUTY_SCALE_LSCH7 0x000003FF
+#define LEDC_DUTY_SCALE_LSCH7_M ((LEDC_DUTY_SCALE_LSCH7_V) << (LEDC_DUTY_SCALE_LSCH7_S))
+#define LEDC_DUTY_SCALE_LSCH7_V 0x3FF
+#define LEDC_DUTY_SCALE_LSCH7_S 0
+
+#define LEDC_LSCH7_DUTY_R_REG (DR_REG_LEDC_BASE + 0x009C)
+/* LEDC_DUTY_LSCH7 : RO ;bitpos:[18:0] ;default: 19'h0 ; */
+/*description: */
+#define LEDC_DUTY_LSCH7 0x0007FFFF
+#define LEDC_DUTY_LSCH7_M ((LEDC_DUTY_LSCH7_V) << (LEDC_DUTY_LSCH7_S))
+#define LEDC_DUTY_LSCH7_V 0x7FFFF
+#define LEDC_DUTY_LSCH7_S 0
+
+#define LEDC_LSTIMER0_CONF_REG (DR_REG_LEDC_BASE + 0x00a0)
+/* LEDC_LSTIMER0_PARA_UP : WO ;bitpos:[25] ;default: 1'h0 ; */
+/*description: */
+#define LEDC_LSTIMER0_PARA_UP (BIT(25))
+#define LEDC_LSTIMER0_PARA_UP_M (BIT(25))
+#define LEDC_LSTIMER0_PARA_UP_V 0x1
+#define LEDC_LSTIMER0_PARA_UP_S 25
+/* LEDC_TICK_SEL_LSTIMER0 : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_TICK_SEL_LSTIMER0 (BIT(24))
+#define LEDC_TICK_SEL_LSTIMER0_M (BIT(24))
+#define LEDC_TICK_SEL_LSTIMER0_V 0x1
+#define LEDC_TICK_SEL_LSTIMER0_S 24
+/* LEDC_LSTIMER0_RST : R/W ;bitpos:[23] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_LSTIMER0_RST (BIT(23))
+#define LEDC_LSTIMER0_RST_M (BIT(23))
+#define LEDC_LSTIMER0_RST_V 0x1
+#define LEDC_LSTIMER0_RST_S 23
+/* LEDC_LSTIMER0_PAUSE : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER0_PAUSE (BIT(22))
+#define LEDC_LSTIMER0_PAUSE_M (BIT(22))
+#define LEDC_LSTIMER0_PAUSE_V 0x1
+#define LEDC_LSTIMER0_PAUSE_S 22
+/* LEDC_CLK_DIV_LSTIMER0 : R/W ;bitpos:[21:4] ;default: 18'h0 ; */
+/*description: */
+#define LEDC_CLK_DIV_LSTIMER0 0x0003FFFF
+#define LEDC_CLK_DIV_LSTIMER0_M ((LEDC_CLK_DIV_LSTIMER0_V) << (LEDC_CLK_DIV_LSTIMER0_S))
+#define LEDC_CLK_DIV_LSTIMER0_V 0x3FFFF
+#define LEDC_CLK_DIV_LSTIMER0_S 4
+/* LEDC_LSTIMER0_DUTY_RES : R/W ;bitpos:[3:0] ;default: 4'h0 ; */
+/*description: */
+#define LEDC_LSTIMER0_DUTY_RES 0x0000000F
+#define LEDC_LSTIMER0_DUTY_RES_M ((LEDC_LSTIMER0_DUTY_RES_V) << (LEDC_LSTIMER0_DUTY_RES_S))
+#define LEDC_LSTIMER0_DUTY_RES_V 0xF
+#define LEDC_LSTIMER0_DUTY_RES_S 0
+
+#define LEDC_LSTIMER0_VALUE_REG (DR_REG_LEDC_BASE + 0x00a4)
+/* LEDC_LSTIMER0_CNT : RO ;bitpos:[13:0] ;default: 14'b0 ; */
+/*description: */
+#define LEDC_LSTIMER0_CNT 0x00003FFF
+#define LEDC_LSTIMER0_CNT_M ((LEDC_LSTIMER0_CNT_V) << (LEDC_LSTIMER0_CNT_S))
+#define LEDC_LSTIMER0_CNT_V 0x3FFF
+#define LEDC_LSTIMER0_CNT_S 0
+
+#define LEDC_LSTIMER1_CONF_REG (DR_REG_LEDC_BASE + 0x00a8)
+/* LEDC_LSTIMER1_PARA_UP : WO ;bitpos:[25] ;default: 1'h0 ; */
+/*description: */
+#define LEDC_LSTIMER1_PARA_UP (BIT(25))
+#define LEDC_LSTIMER1_PARA_UP_M (BIT(25))
+#define LEDC_LSTIMER1_PARA_UP_V 0x1
+#define LEDC_LSTIMER1_PARA_UP_S 25
+/* LEDC_TICK_SEL_LSTIMER1 : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_TICK_SEL_LSTIMER1 (BIT(24))
+#define LEDC_TICK_SEL_LSTIMER1_M (BIT(24))
+#define LEDC_TICK_SEL_LSTIMER1_V 0x1
+#define LEDC_TICK_SEL_LSTIMER1_S 24
+/* LEDC_LSTIMER1_RST : R/W ;bitpos:[23] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_LSTIMER1_RST (BIT(23))
+#define LEDC_LSTIMER1_RST_M (BIT(23))
+#define LEDC_LSTIMER1_RST_V 0x1
+#define LEDC_LSTIMER1_RST_S 23
+/* LEDC_LSTIMER1_PAUSE : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER1_PAUSE (BIT(22))
+#define LEDC_LSTIMER1_PAUSE_M (BIT(22))
+#define LEDC_LSTIMER1_PAUSE_V 0x1
+#define LEDC_LSTIMER1_PAUSE_S 22
+/* LEDC_CLK_DIV_LSTIMER1 : R/W ;bitpos:[21:4] ;default: 18'h0 ; */
+/*description: */
+#define LEDC_CLK_DIV_LSTIMER1 0x0003FFFF
+#define LEDC_CLK_DIV_LSTIMER1_M ((LEDC_CLK_DIV_LSTIMER1_V) << (LEDC_CLK_DIV_LSTIMER1_S))
+#define LEDC_CLK_DIV_LSTIMER1_V 0x3FFFF
+#define LEDC_CLK_DIV_LSTIMER1_S 4
+/* LEDC_LSTIMER1_DUTY_RES : R/W ;bitpos:[3:0] ;default: 4'h0 ; */
+/*description: */
+#define LEDC_LSTIMER1_DUTY_RES 0x0000000F
+#define LEDC_LSTIMER1_DUTY_RES_M ((LEDC_LSTIMER1_DUTY_RES_V) << (LEDC_LSTIMER1_DUTY_RES_S))
+#define LEDC_LSTIMER1_DUTY_RES_V 0xF
+#define LEDC_LSTIMER1_DUTY_RES_S 0
+
+#define LEDC_LSTIMER1_VALUE_REG (DR_REG_LEDC_BASE + 0x00aC)
+/* LEDC_LSTIMER1_CNT : RO ;bitpos:[13:0] ;default: 14'b0 ; */
+/*description: */
+#define LEDC_LSTIMER1_CNT 0x00003FFF
+#define LEDC_LSTIMER1_CNT_M ((LEDC_LSTIMER1_CNT_V) << (LEDC_LSTIMER1_CNT_S))
+#define LEDC_LSTIMER1_CNT_V 0x3FFF
+#define LEDC_LSTIMER1_CNT_S 0
+
+#define LEDC_LSTIMER2_CONF_REG (DR_REG_LEDC_BASE + 0x00b0)
+/* LEDC_LSTIMER2_PARA_UP : WO ;bitpos:[25] ;default: 1'h0 ; */
+/*description: */
+#define LEDC_LSTIMER2_PARA_UP (BIT(25))
+#define LEDC_LSTIMER2_PARA_UP_M (BIT(25))
+#define LEDC_LSTIMER2_PARA_UP_V 0x1
+#define LEDC_LSTIMER2_PARA_UP_S 25
+/* LEDC_TICK_SEL_LSTIMER2 : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_TICK_SEL_LSTIMER2 (BIT(24))
+#define LEDC_TICK_SEL_LSTIMER2_M (BIT(24))
+#define LEDC_TICK_SEL_LSTIMER2_V 0x1
+#define LEDC_TICK_SEL_LSTIMER2_S 24
+/* LEDC_LSTIMER2_RST : R/W ;bitpos:[23] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_LSTIMER2_RST (BIT(23))
+#define LEDC_LSTIMER2_RST_M (BIT(23))
+#define LEDC_LSTIMER2_RST_V 0x1
+#define LEDC_LSTIMER2_RST_S 23
+/* LEDC_LSTIMER2_PAUSE : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER2_PAUSE (BIT(22))
+#define LEDC_LSTIMER2_PAUSE_M (BIT(22))
+#define LEDC_LSTIMER2_PAUSE_V 0x1
+#define LEDC_LSTIMER2_PAUSE_S 22
+/* LEDC_CLK_DIV_LSTIMER2 : R/W ;bitpos:[21:4] ;default: 18'h0 ; */
+/*description: */
+#define LEDC_CLK_DIV_LSTIMER2 0x0003FFFF
+#define LEDC_CLK_DIV_LSTIMER2_M ((LEDC_CLK_DIV_LSTIMER2_V) << (LEDC_CLK_DIV_LSTIMER2_S))
+#define LEDC_CLK_DIV_LSTIMER2_V 0x3FFFF
+#define LEDC_CLK_DIV_LSTIMER2_S 4
+/* LEDC_LSTIMER2_DUTY_RES : R/W ;bitpos:[3:0] ;default: 4'h0 ; */
+/*description: */
+#define LEDC_LSTIMER2_DUTY_RES 0x0000000F
+#define LEDC_LSTIMER2_DUTY_RES_M ((LEDC_LSTIMER2_DUTY_RES_V) << (LEDC_LSTIMER2_DUTY_RES_S))
+#define LEDC_LSTIMER2_DUTY_RES_V 0xF
+#define LEDC_LSTIMER2_DUTY_RES_S 0
+
+#define LEDC_LSTIMER2_VALUE_REG (DR_REG_LEDC_BASE + 0x00b4)
+/* LEDC_LSTIMER2_CNT : RO ;bitpos:[13:0] ;default: 14'b0 ; */
+/*description: */
+#define LEDC_LSTIMER2_CNT 0x00003FFF
+#define LEDC_LSTIMER2_CNT_M ((LEDC_LSTIMER2_CNT_V) << (LEDC_LSTIMER2_CNT_S))
+#define LEDC_LSTIMER2_CNT_V 0x3FFF
+#define LEDC_LSTIMER2_CNT_S 0
+
+#define LEDC_LSTIMER3_CONF_REG (DR_REG_LEDC_BASE + 0x00b8)
+/* LEDC_LSTIMER3_PARA_UP : WO ;bitpos:[25] ;default: 1'h0 ; */
+/*description: */
+#define LEDC_LSTIMER3_PARA_UP (BIT(25))
+#define LEDC_LSTIMER3_PARA_UP_M (BIT(25))
+#define LEDC_LSTIMER3_PARA_UP_V 0x1
+#define LEDC_LSTIMER3_PARA_UP_S 25
+/* LEDC_TICK_SEL_LSTIMER3 : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_TICK_SEL_LSTIMER3 (BIT(24))
+#define LEDC_TICK_SEL_LSTIMER3_M (BIT(24))
+#define LEDC_TICK_SEL_LSTIMER3_V 0x1
+#define LEDC_TICK_SEL_LSTIMER3_S 24
+/* LEDC_LSTIMER3_RST : R/W ;bitpos:[23] ;default: 1'b1 ; */
+/*description: */
+#define LEDC_LSTIMER3_RST (BIT(23))
+#define LEDC_LSTIMER3_RST_M (BIT(23))
+#define LEDC_LSTIMER3_RST_V 0x1
+#define LEDC_LSTIMER3_RST_S 23
+/* LEDC_LSTIMER3_PAUSE : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER3_PAUSE (BIT(22))
+#define LEDC_LSTIMER3_PAUSE_M (BIT(22))
+#define LEDC_LSTIMER3_PAUSE_V 0x1
+#define LEDC_LSTIMER3_PAUSE_S 22
+/* LEDC_CLK_DIV_LSTIMER3 : R/W ;bitpos:[21:4] ;default: 18'h0 ; */
+/*description: */
+#define LEDC_CLK_DIV_LSTIMER3 0x0003FFFF
+#define LEDC_CLK_DIV_LSTIMER3_M ((LEDC_CLK_DIV_LSTIMER3_V) << (LEDC_CLK_DIV_LSTIMER3_S))
+#define LEDC_CLK_DIV_LSTIMER3_V 0x3FFFF
+#define LEDC_CLK_DIV_LSTIMER3_S 4
+/* LEDC_LSTIMER3_DUTY_RES : R/W ;bitpos:[3:0] ;default: 4'h0 ; */
+/*description: */
+#define LEDC_LSTIMER3_DUTY_RES 0x0000000F
+#define LEDC_LSTIMER3_DUTY_RES_M ((LEDC_LSTIMER3_DUTY_RES_V) << (LEDC_LSTIMER3_DUTY_RES_S))
+#define LEDC_LSTIMER3_DUTY_RES_V 0xF
+#define LEDC_LSTIMER3_DUTY_RES_S 0
+
+#define LEDC_LSTIMER3_VALUE_REG (DR_REG_LEDC_BASE + 0x00bC)
+/* LEDC_LSTIMER3_CNT : RO ;bitpos:[13:0] ;default: 14'b0 ; */
+/*description: */
+#define LEDC_LSTIMER3_CNT 0x00003FFF
+#define LEDC_LSTIMER3_CNT_M ((LEDC_LSTIMER3_CNT_V) << (LEDC_LSTIMER3_CNT_S))
+#define LEDC_LSTIMER3_CNT_V 0x3FFF
+#define LEDC_LSTIMER3_CNT_S 0
+
+#define LEDC_INT_RAW_REG (DR_REG_LEDC_BASE + 0x00c0)
+/* LEDC_OVF_CNT_LSCH7_INT_RAW : RO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH7_INT_RAW (BIT(19))
+#define LEDC_OVF_CNT_LSCH7_INT_RAW_M (BIT(19))
+#define LEDC_OVF_CNT_LSCH7_INT_RAW_V 0x1
+#define LEDC_OVF_CNT_LSCH7_INT_RAW_S 19
+/* LEDC_OVF_CNT_LSCH6_INT_RAW : RO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH6_INT_RAW (BIT(18))
+#define LEDC_OVF_CNT_LSCH6_INT_RAW_M (BIT(18))
+#define LEDC_OVF_CNT_LSCH6_INT_RAW_V 0x1
+#define LEDC_OVF_CNT_LSCH6_INT_RAW_S 18
+/* LEDC_OVF_CNT_LSCH5_INT_RAW : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH5_INT_RAW (BIT(17))
+#define LEDC_OVF_CNT_LSCH5_INT_RAW_M (BIT(17))
+#define LEDC_OVF_CNT_LSCH5_INT_RAW_V 0x1
+#define LEDC_OVF_CNT_LSCH5_INT_RAW_S 17
+/* LEDC_OVF_CNT_LSCH4_INT_RAW : RO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH4_INT_RAW (BIT(16))
+#define LEDC_OVF_CNT_LSCH4_INT_RAW_M (BIT(16))
+#define LEDC_OVF_CNT_LSCH4_INT_RAW_V 0x1
+#define LEDC_OVF_CNT_LSCH4_INT_RAW_S 16
+/* LEDC_OVF_CNT_LSCH3_INT_RAW : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH3_INT_RAW (BIT(15))
+#define LEDC_OVF_CNT_LSCH3_INT_RAW_M (BIT(15))
+#define LEDC_OVF_CNT_LSCH3_INT_RAW_V 0x1
+#define LEDC_OVF_CNT_LSCH3_INT_RAW_S 15
+/* LEDC_OVF_CNT_LSCH2_INT_RAW : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH2_INT_RAW (BIT(14))
+#define LEDC_OVF_CNT_LSCH2_INT_RAW_M (BIT(14))
+#define LEDC_OVF_CNT_LSCH2_INT_RAW_V 0x1
+#define LEDC_OVF_CNT_LSCH2_INT_RAW_S 14
+/* LEDC_OVF_CNT_LSCH1_INT_RAW : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH1_INT_RAW (BIT(13))
+#define LEDC_OVF_CNT_LSCH1_INT_RAW_M (BIT(13))
+#define LEDC_OVF_CNT_LSCH1_INT_RAW_V 0x1
+#define LEDC_OVF_CNT_LSCH1_INT_RAW_S 13
+/* LEDC_OVF_CNT_LSCH0_INT_RAW : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH0_INT_RAW (BIT(12))
+#define LEDC_OVF_CNT_LSCH0_INT_RAW_M (BIT(12))
+#define LEDC_OVF_CNT_LSCH0_INT_RAW_V 0x1
+#define LEDC_OVF_CNT_LSCH0_INT_RAW_S 12
+/* LEDC_DUTY_CHNG_END_LSCH7_INT_RAW : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_RAW (BIT(11))
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_RAW_M (BIT(11))
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_RAW_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_RAW_S 11
+/* LEDC_DUTY_CHNG_END_LSCH6_INT_RAW : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_RAW (BIT(10))
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_RAW_M (BIT(10))
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_RAW_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_RAW_S 10
+/* LEDC_DUTY_CHNG_END_LSCH5_INT_RAW : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_RAW (BIT(9))
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_RAW_M (BIT(9))
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_RAW_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_RAW_S 9
+/* LEDC_DUTY_CHNG_END_LSCH4_INT_RAW : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_RAW (BIT(8))
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_RAW_M (BIT(8))
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_RAW_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_RAW_S 8
+/* LEDC_DUTY_CHNG_END_LSCH3_INT_RAW : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_RAW (BIT(7))
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_RAW_M (BIT(7))
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_RAW_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_RAW_S 7
+/* LEDC_DUTY_CHNG_END_LSCH2_INT_RAW : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_RAW (BIT(6))
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_RAW_M (BIT(6))
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_RAW_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_RAW_S 6
+/* LEDC_DUTY_CHNG_END_LSCH1_INT_RAW : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_RAW (BIT(5))
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_RAW_M (BIT(5))
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_RAW_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_RAW_S 5
+/* LEDC_DUTY_CHNG_END_LSCH0_INT_RAW : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_RAW (BIT(4))
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_RAW_M (BIT(4))
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_RAW_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_RAW_S 4
+/* LEDC_LSTIMER3_OVF_INT_RAW : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER3_OVF_INT_RAW (BIT(3))
+#define LEDC_LSTIMER3_OVF_INT_RAW_M (BIT(3))
+#define LEDC_LSTIMER3_OVF_INT_RAW_V 0x1
+#define LEDC_LSTIMER3_OVF_INT_RAW_S 3
+/* LEDC_LSTIMER2_OVF_INT_RAW : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER2_OVF_INT_RAW (BIT(2))
+#define LEDC_LSTIMER2_OVF_INT_RAW_M (BIT(2))
+#define LEDC_LSTIMER2_OVF_INT_RAW_V 0x1
+#define LEDC_LSTIMER2_OVF_INT_RAW_S 2
+/* LEDC_LSTIMER1_OVF_INT_RAW : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER1_OVF_INT_RAW (BIT(1))
+#define LEDC_LSTIMER1_OVF_INT_RAW_M (BIT(1))
+#define LEDC_LSTIMER1_OVF_INT_RAW_V 0x1
+#define LEDC_LSTIMER1_OVF_INT_RAW_S 1
+/* LEDC_LSTIMER0_OVF_INT_RAW : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER0_OVF_INT_RAW (BIT(0))
+#define LEDC_LSTIMER0_OVF_INT_RAW_M (BIT(0))
+#define LEDC_LSTIMER0_OVF_INT_RAW_V 0x1
+#define LEDC_LSTIMER0_OVF_INT_RAW_S 0
+
+#define LEDC_INT_ST_REG (DR_REG_LEDC_BASE + 0x00c4)
+/* LEDC_OVF_CNT_LSCH7_INT_ST : RO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH7_INT_ST (BIT(19))
+#define LEDC_OVF_CNT_LSCH7_INT_ST_M (BIT(19))
+#define LEDC_OVF_CNT_LSCH7_INT_ST_V 0x1
+#define LEDC_OVF_CNT_LSCH7_INT_ST_S 19
+/* LEDC_OVF_CNT_LSCH6_INT_ST : RO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH6_INT_ST (BIT(18))
+#define LEDC_OVF_CNT_LSCH6_INT_ST_M (BIT(18))
+#define LEDC_OVF_CNT_LSCH6_INT_ST_V 0x1
+#define LEDC_OVF_CNT_LSCH6_INT_ST_S 18
+/* LEDC_OVF_CNT_LSCH5_INT_ST : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH5_INT_ST (BIT(17))
+#define LEDC_OVF_CNT_LSCH5_INT_ST_M (BIT(17))
+#define LEDC_OVF_CNT_LSCH5_INT_ST_V 0x1
+#define LEDC_OVF_CNT_LSCH5_INT_ST_S 17
+/* LEDC_OVF_CNT_LSCH4_INT_ST : RO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH4_INT_ST (BIT(16))
+#define LEDC_OVF_CNT_LSCH4_INT_ST_M (BIT(16))
+#define LEDC_OVF_CNT_LSCH4_INT_ST_V 0x1
+#define LEDC_OVF_CNT_LSCH4_INT_ST_S 16
+/* LEDC_OVF_CNT_LSCH3_INT_ST : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH3_INT_ST (BIT(15))
+#define LEDC_OVF_CNT_LSCH3_INT_ST_M (BIT(15))
+#define LEDC_OVF_CNT_LSCH3_INT_ST_V 0x1
+#define LEDC_OVF_CNT_LSCH3_INT_ST_S 15
+/* LEDC_OVF_CNT_LSCH2_INT_ST : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH2_INT_ST (BIT(14))
+#define LEDC_OVF_CNT_LSCH2_INT_ST_M (BIT(14))
+#define LEDC_OVF_CNT_LSCH2_INT_ST_V 0x1
+#define LEDC_OVF_CNT_LSCH2_INT_ST_S 14
+/* LEDC_OVF_CNT_LSCH1_INT_ST : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH1_INT_ST (BIT(13))
+#define LEDC_OVF_CNT_LSCH1_INT_ST_M (BIT(13))
+#define LEDC_OVF_CNT_LSCH1_INT_ST_V 0x1
+#define LEDC_OVF_CNT_LSCH1_INT_ST_S 13
+/* LEDC_OVF_CNT_LSCH0_INT_ST : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH0_INT_ST (BIT(12))
+#define LEDC_OVF_CNT_LSCH0_INT_ST_M (BIT(12))
+#define LEDC_OVF_CNT_LSCH0_INT_ST_V 0x1
+#define LEDC_OVF_CNT_LSCH0_INT_ST_S 12
+/* LEDC_DUTY_CHNG_END_LSCH7_INT_ST : RO ;bitpos:[11] ;default: 1'h0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_ST (BIT(11))
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_ST_M (BIT(11))
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_ST_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_ST_S 11
+/* LEDC_DUTY_CHNG_END_LSCH6_INT_ST : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_ST (BIT(10))
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_ST_M (BIT(10))
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_ST_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_ST_S 10
+/* LEDC_DUTY_CHNG_END_LSCH5_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_ST (BIT(9))
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_ST_M (BIT(9))
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_ST_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_ST_S 9
+/* LEDC_DUTY_CHNG_END_LSCH4_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_ST (BIT(8))
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_ST_M (BIT(8))
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_ST_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_ST_S 8
+/* LEDC_DUTY_CHNG_END_LSCH3_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_ST (BIT(7))
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_ST_M (BIT(7))
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_ST_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_ST_S 7
+/* LEDC_DUTY_CHNG_END_LSCH2_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_ST (BIT(6))
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_ST_M (BIT(6))
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_ST_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_ST_S 6
+/* LEDC_DUTY_CHNG_END_LSCH1_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_ST (BIT(5))
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_ST_M (BIT(5))
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_ST_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_ST_S 5
+/* LEDC_DUTY_CHNG_END_LSCH0_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_ST (BIT(4))
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_ST_M (BIT(4))
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_ST_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_ST_S 4
+/* LEDC_LSTIMER3_OVF_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER3_OVF_INT_ST (BIT(3))
+#define LEDC_LSTIMER3_OVF_INT_ST_M (BIT(3))
+#define LEDC_LSTIMER3_OVF_INT_ST_V 0x1
+#define LEDC_LSTIMER3_OVF_INT_ST_S 3
+/* LEDC_LSTIMER2_OVF_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER2_OVF_INT_ST (BIT(2))
+#define LEDC_LSTIMER2_OVF_INT_ST_M (BIT(2))
+#define LEDC_LSTIMER2_OVF_INT_ST_V 0x1
+#define LEDC_LSTIMER2_OVF_INT_ST_S 2
+/* LEDC_LSTIMER1_OVF_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER1_OVF_INT_ST (BIT(1))
+#define LEDC_LSTIMER1_OVF_INT_ST_M (BIT(1))
+#define LEDC_LSTIMER1_OVF_INT_ST_V 0x1
+#define LEDC_LSTIMER1_OVF_INT_ST_S 1
+/* LEDC_LSTIMER0_OVF_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER0_OVF_INT_ST (BIT(0))
+#define LEDC_LSTIMER0_OVF_INT_ST_M (BIT(0))
+#define LEDC_LSTIMER0_OVF_INT_ST_V 0x1
+#define LEDC_LSTIMER0_OVF_INT_ST_S 0
+
+#define LEDC_INT_ENA_REG (DR_REG_LEDC_BASE + 0x00c8)
+/* LEDC_OVF_CNT_LSCH7_INT_ENA : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH7_INT_ENA (BIT(19))
+#define LEDC_OVF_CNT_LSCH7_INT_ENA_M (BIT(19))
+#define LEDC_OVF_CNT_LSCH7_INT_ENA_V 0x1
+#define LEDC_OVF_CNT_LSCH7_INT_ENA_S 19
+/* LEDC_OVF_CNT_LSCH6_INT_ENA : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH6_INT_ENA (BIT(18))
+#define LEDC_OVF_CNT_LSCH6_INT_ENA_M (BIT(18))
+#define LEDC_OVF_CNT_LSCH6_INT_ENA_V 0x1
+#define LEDC_OVF_CNT_LSCH6_INT_ENA_S 18
+/* LEDC_OVF_CNT_LSCH5_INT_ENA : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH5_INT_ENA (BIT(17))
+#define LEDC_OVF_CNT_LSCH5_INT_ENA_M (BIT(17))
+#define LEDC_OVF_CNT_LSCH5_INT_ENA_V 0x1
+#define LEDC_OVF_CNT_LSCH5_INT_ENA_S 17
+/* LEDC_OVF_CNT_LSCH4_INT_ENA : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH4_INT_ENA (BIT(16))
+#define LEDC_OVF_CNT_LSCH4_INT_ENA_M (BIT(16))
+#define LEDC_OVF_CNT_LSCH4_INT_ENA_V 0x1
+#define LEDC_OVF_CNT_LSCH4_INT_ENA_S 16
+/* LEDC_OVF_CNT_LSCH3_INT_ENA : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH3_INT_ENA (BIT(15))
+#define LEDC_OVF_CNT_LSCH3_INT_ENA_M (BIT(15))
+#define LEDC_OVF_CNT_LSCH3_INT_ENA_V 0x1
+#define LEDC_OVF_CNT_LSCH3_INT_ENA_S 15
+/* LEDC_OVF_CNT_LSCH2_INT_ENA : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH2_INT_ENA (BIT(14))
+#define LEDC_OVF_CNT_LSCH2_INT_ENA_M (BIT(14))
+#define LEDC_OVF_CNT_LSCH2_INT_ENA_V 0x1
+#define LEDC_OVF_CNT_LSCH2_INT_ENA_S 14
+/* LEDC_OVF_CNT_LSCH1_INT_ENA : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH1_INT_ENA (BIT(13))
+#define LEDC_OVF_CNT_LSCH1_INT_ENA_M (BIT(13))
+#define LEDC_OVF_CNT_LSCH1_INT_ENA_V 0x1
+#define LEDC_OVF_CNT_LSCH1_INT_ENA_S 13
+/* LEDC_OVF_CNT_LSCH0_INT_ENA : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH0_INT_ENA (BIT(12))
+#define LEDC_OVF_CNT_LSCH0_INT_ENA_M (BIT(12))
+#define LEDC_OVF_CNT_LSCH0_INT_ENA_V 0x1
+#define LEDC_OVF_CNT_LSCH0_INT_ENA_S 12
+/* LEDC_DUTY_CHNG_END_LSCH7_INT_ENA : R/W ;bitpos:[11] ;default: 1'h0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_ENA (BIT(11))
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_ENA_M (BIT(11))
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_ENA_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_ENA_S 11
+/* LEDC_DUTY_CHNG_END_LSCH6_INT_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_ENA (BIT(10))
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_ENA_M (BIT(10))
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_ENA_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_ENA_S 10
+/* LEDC_DUTY_CHNG_END_LSCH5_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_ENA (BIT(9))
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_ENA_M (BIT(9))
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_ENA_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_ENA_S 9
+/* LEDC_DUTY_CHNG_END_LSCH4_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_ENA (BIT(8))
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_ENA_M (BIT(8))
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_ENA_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_ENA_S 8
+/* LEDC_DUTY_CHNG_END_LSCH3_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_ENA (BIT(7))
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_ENA_M (BIT(7))
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_ENA_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_ENA_S 7
+/* LEDC_DUTY_CHNG_END_LSCH2_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_ENA (BIT(6))
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_ENA_M (BIT(6))
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_ENA_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_ENA_S 6
+/* LEDC_DUTY_CHNG_END_LSCH1_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_ENA (BIT(5))
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_ENA_M (BIT(5))
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_ENA_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_ENA_S 5
+/* LEDC_DUTY_CHNG_END_LSCH0_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_ENA (BIT(4))
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_M (BIT(4))
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S 4
+/* LEDC_LSTIMER3_OVF_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER3_OVF_INT_ENA (BIT(3))
+#define LEDC_LSTIMER3_OVF_INT_ENA_M (BIT(3))
+#define LEDC_LSTIMER3_OVF_INT_ENA_V 0x1
+#define LEDC_LSTIMER3_OVF_INT_ENA_S 3
+/* LEDC_LSTIMER2_OVF_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER2_OVF_INT_ENA (BIT(2))
+#define LEDC_LSTIMER2_OVF_INT_ENA_M (BIT(2))
+#define LEDC_LSTIMER2_OVF_INT_ENA_V 0x1
+#define LEDC_LSTIMER2_OVF_INT_ENA_S 2
+/* LEDC_LSTIMER1_OVF_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER1_OVF_INT_ENA (BIT(1))
+#define LEDC_LSTIMER1_OVF_INT_ENA_M (BIT(1))
+#define LEDC_LSTIMER1_OVF_INT_ENA_V 0x1
+#define LEDC_LSTIMER1_OVF_INT_ENA_S 1
+/* LEDC_LSTIMER0_OVF_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER0_OVF_INT_ENA (BIT(0))
+#define LEDC_LSTIMER0_OVF_INT_ENA_M (BIT(0))
+#define LEDC_LSTIMER0_OVF_INT_ENA_V 0x1
+#define LEDC_LSTIMER0_OVF_INT_ENA_S 0
+
+#define LEDC_INT_CLR_REG (DR_REG_LEDC_BASE + 0x00cC)
+/* LEDC_OVF_CNT_LSCH7_INT_CLR : WO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH7_INT_CLR (BIT(19))
+#define LEDC_OVF_CNT_LSCH7_INT_CLR_M (BIT(19))
+#define LEDC_OVF_CNT_LSCH7_INT_CLR_V 0x1
+#define LEDC_OVF_CNT_LSCH7_INT_CLR_S 19
+/* LEDC_OVF_CNT_LSCH6_INT_CLR : WO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH6_INT_CLR (BIT(18))
+#define LEDC_OVF_CNT_LSCH6_INT_CLR_M (BIT(18))
+#define LEDC_OVF_CNT_LSCH6_INT_CLR_V 0x1
+#define LEDC_OVF_CNT_LSCH6_INT_CLR_S 18
+/* LEDC_OVF_CNT_LSCH5_INT_CLR : WO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH5_INT_CLR (BIT(17))
+#define LEDC_OVF_CNT_LSCH5_INT_CLR_M (BIT(17))
+#define LEDC_OVF_CNT_LSCH5_INT_CLR_V 0x1
+#define LEDC_OVF_CNT_LSCH5_INT_CLR_S 17
+/* LEDC_OVF_CNT_LSCH4_INT_CLR : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH4_INT_CLR (BIT(16))
+#define LEDC_OVF_CNT_LSCH4_INT_CLR_M (BIT(16))
+#define LEDC_OVF_CNT_LSCH4_INT_CLR_V 0x1
+#define LEDC_OVF_CNT_LSCH4_INT_CLR_S 16
+/* LEDC_OVF_CNT_LSCH3_INT_CLR : WO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH3_INT_CLR (BIT(15))
+#define LEDC_OVF_CNT_LSCH3_INT_CLR_M (BIT(15))
+#define LEDC_OVF_CNT_LSCH3_INT_CLR_V 0x1
+#define LEDC_OVF_CNT_LSCH3_INT_CLR_S 15
+/* LEDC_OVF_CNT_LSCH2_INT_CLR : WO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH2_INT_CLR (BIT(14))
+#define LEDC_OVF_CNT_LSCH2_INT_CLR_M (BIT(14))
+#define LEDC_OVF_CNT_LSCH2_INT_CLR_V 0x1
+#define LEDC_OVF_CNT_LSCH2_INT_CLR_S 14
+/* LEDC_OVF_CNT_LSCH1_INT_CLR : WO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH1_INT_CLR (BIT(13))
+#define LEDC_OVF_CNT_LSCH1_INT_CLR_M (BIT(13))
+#define LEDC_OVF_CNT_LSCH1_INT_CLR_V 0x1
+#define LEDC_OVF_CNT_LSCH1_INT_CLR_S 13
+/* LEDC_OVF_CNT_LSCH0_INT_CLR : WO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_OVF_CNT_LSCH0_INT_CLR (BIT(12))
+#define LEDC_OVF_CNT_LSCH0_INT_CLR_M (BIT(12))
+#define LEDC_OVF_CNT_LSCH0_INT_CLR_V 0x1
+#define LEDC_OVF_CNT_LSCH0_INT_CLR_S 12
+/* LEDC_DUTY_CHNG_END_LSCH7_INT_CLR : WO ;bitpos:[11] ;default: 1'h0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_CLR (BIT(11))
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_CLR_M (BIT(11))
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_CLR_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH7_INT_CLR_S 11
+/* LEDC_DUTY_CHNG_END_LSCH6_INT_CLR : WO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_CLR (BIT(10))
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_CLR_M (BIT(10))
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_CLR_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH6_INT_CLR_S 10
+/* LEDC_DUTY_CHNG_END_LSCH5_INT_CLR : WO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_CLR (BIT(9))
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_CLR_M (BIT(9))
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_CLR_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH5_INT_CLR_S 9
+/* LEDC_DUTY_CHNG_END_LSCH4_INT_CLR : WO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_CLR (BIT(8))
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_CLR_M (BIT(8))
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_CLR_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH4_INT_CLR_S 8
+/* LEDC_DUTY_CHNG_END_LSCH3_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_CLR (BIT(7))
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_CLR_M (BIT(7))
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_CLR_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH3_INT_CLR_S 7
+/* LEDC_DUTY_CHNG_END_LSCH2_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_CLR (BIT(6))
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_CLR_M (BIT(6))
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_CLR_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH2_INT_CLR_S 6
+/* LEDC_DUTY_CHNG_END_LSCH1_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_CLR (BIT(5))
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_CLR_M (BIT(5))
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_CLR_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH1_INT_CLR_S 5
+/* LEDC_DUTY_CHNG_END_LSCH0_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_CLR (BIT(4))
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_CLR_M (BIT(4))
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_CLR_V 0x1
+#define LEDC_DUTY_CHNG_END_LSCH0_INT_CLR_S 4
+/* LEDC_LSTIMER3_OVF_INT_CLR : WO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER3_OVF_INT_CLR (BIT(3))
+#define LEDC_LSTIMER3_OVF_INT_CLR_M (BIT(3))
+#define LEDC_LSTIMER3_OVF_INT_CLR_V 0x1
+#define LEDC_LSTIMER3_OVF_INT_CLR_S 3
+/* LEDC_LSTIMER2_OVF_INT_CLR : WO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER2_OVF_INT_CLR (BIT(2))
+#define LEDC_LSTIMER2_OVF_INT_CLR_M (BIT(2))
+#define LEDC_LSTIMER2_OVF_INT_CLR_V 0x1
+#define LEDC_LSTIMER2_OVF_INT_CLR_S 2
+/* LEDC_LSTIMER1_OVF_INT_CLR : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER1_OVF_INT_CLR (BIT(1))
+#define LEDC_LSTIMER1_OVF_INT_CLR_M (BIT(1))
+#define LEDC_LSTIMER1_OVF_INT_CLR_V 0x1
+#define LEDC_LSTIMER1_OVF_INT_CLR_S 1
+/* LEDC_LSTIMER0_OVF_INT_CLR : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: */
+#define LEDC_LSTIMER0_OVF_INT_CLR (BIT(0))
+#define LEDC_LSTIMER0_OVF_INT_CLR_M (BIT(0))
+#define LEDC_LSTIMER0_OVF_INT_CLR_V 0x1
+#define LEDC_LSTIMER0_OVF_INT_CLR_S 0
+
+#define LEDC_CONF_REG (DR_REG_LEDC_BASE + 0x00d0)
+/* LEDC_CLK_EN : R/W ;bitpos:[31] ;default: 1'h0 ; */
+/*description: */
+#define LEDC_CLK_EN (BIT(31))
+#define LEDC_CLK_EN_M (BIT(31))
+#define LEDC_CLK_EN_V 0x1
+#define LEDC_CLK_EN_S 31
+/* LEDC_APB_CLK_SEL : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: */
+#define LEDC_APB_CLK_SEL 0x00000003
+#define LEDC_APB_CLK_SEL_M ((LEDC_APB_CLK_SEL_V) << (LEDC_APB_CLK_SEL_S))
+#define LEDC_APB_CLK_SEL_V 0x3
+#define LEDC_APB_CLK_SEL_S 0
+
+#define LEDC_DATE_REG (DR_REG_LEDC_BASE + 0x00FC)
+/* LEDC_DATE : R/W ;bitpos:[31:0] ;default: 32'h19040200 ; */
+/*description: */
+#define LEDC_DATE 0xFFFFFFFF
+#define LEDC_DATE_M ((LEDC_DATE_V) << (LEDC_DATE_S))
+#define LEDC_DATE_V 0xFFFFFFFF
+#define LEDC_DATE_S 0
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/ledc_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/ledc_struct.h
new file mode 100644
index 00000000000..85cea78e582
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/ledc_struct.h
@@ -0,0 +1,225 @@
+// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+typedef volatile struct ledc_dev_s {
+    struct {
+        struct {
+            union {
+                struct {
+                    uint32_t timer_sel:              2;
+                    uint32_t sig_out_en:             1;
+                    uint32_t idle_lv:                1;
+                    uint32_t low_speed_update:       1;
+                    uint32_t ovf_num:               10;
+                    uint32_t ovf_cnt_en:             1;
+                    uint32_t ovf_cnt_rst:            1;
+                    uint32_t ovf_cnt_rst_st:         1;
+                    uint32_t reserved18:            14;
+                };
+                uint32_t val;
+            } conf0;
+            union {
+                struct {
+                    uint32_t hpoint:      14;
+                    uint32_t reserved14:  18;
+                };
+                uint32_t val;
+            } hpoint;
+            union {
+                struct {
+                    uint32_t duty:      19;
+                    uint32_t reserved19: 13;
+                };
+                uint32_t val;
+            } duty;
+            union {
+                struct {
+                    uint32_t duty_scale:      10;
+                    uint32_t duty_cycle:      10;
+                    uint32_t duty_num:        10;
+                    uint32_t duty_inc:         1;
+                    uint32_t duty_start:       1;
+                };
+                uint32_t val;
+            } conf1;
+            union {
+                struct {
+                    uint32_t duty_read: 19;
+                    uint32_t reserved19: 13;
+                };
+                uint32_t val;
+            } duty_rd;
+        } channel[8];
+    } channel_group[1];
+    struct {
+        struct {
+            union {
+                struct {
+                    uint32_t duty_resolution:   4;
+                    uint32_t clock_divider:    18;
+                    uint32_t pause:             1;
+                    uint32_t rst:               1;
+                    uint32_t tick_sel:          1;
+                    uint32_t low_speed_update:  1;
+                    uint32_t reserved26:        6;
+                };
+                uint32_t val;
+            } conf;
+            union {
+                struct {
+                    uint32_t timer_cnt:   14;
+                    uint32_t reserved14:  18;
+                };
+                uint32_t val;
+            } value;
+        } timer[4];
+    } timer_group[1];
+    union {
+        struct {
+            uint32_t lstimer0_ovf:                1;
+            uint32_t lstimer1_ovf:                1;
+            uint32_t lstimer2_ovf:                1;
+            uint32_t lstimer3_ovf:                1;
+            uint32_t duty_chng_end_lsch0:         1;
+            uint32_t duty_chng_end_lsch1:         1;
+            uint32_t duty_chng_end_lsch2:         1;
+            uint32_t duty_chng_end_lsch3:         1;
+            uint32_t duty_chng_end_lsch4:         1;
+            uint32_t duty_chng_end_lsch5:         1;
+            uint32_t duty_chng_end_lsch6:         1;
+            uint32_t duty_chng_end_lsch7:         1;
+            uint32_t ovf_cnt_lsch0:               1;
+            uint32_t ovf_cnt_lsch1:               1;
+            uint32_t ovf_cnt_lsch2:               1;
+            uint32_t ovf_cnt_lsch3:               1;
+            uint32_t ovf_cnt_lsch4:               1;
+            uint32_t ovf_cnt_lsch5:               1;
+            uint32_t ovf_cnt_lsch6:               1;
+            uint32_t ovf_cnt_lsch7:               1;
+            uint32_t reserved20:                 12;
+        };
+        uint32_t val;
+    } int_raw;
+    union {
+        struct {
+            uint32_t lstimer0_ovf:               1;
+            uint32_t lstimer1_ovf:               1;
+            uint32_t lstimer2_ovf:               1;
+            uint32_t lstimer3_ovf:               1;
+            uint32_t duty_chng_end_lsch0:        1;
+            uint32_t duty_chng_end_lsch1:        1;
+            uint32_t duty_chng_end_lsch2:        1;
+            uint32_t duty_chng_end_lsch3:        1;
+            uint32_t duty_chng_end_lsch4:        1;
+            uint32_t duty_chng_end_lsch5:        1;
+            uint32_t duty_chng_end_lsch6:        1;
+            uint32_t duty_chng_end_lsch7:        1;
+            uint32_t ovf_cnt_lsch0:              1;
+            uint32_t ovf_cnt_lsch1:              1;
+            uint32_t ovf_cnt_lsch2:              1;
+            uint32_t ovf_cnt_lsch3:              1;
+            uint32_t ovf_cnt_lsch4:              1;
+            uint32_t ovf_cnt_lsch5:              1;
+            uint32_t ovf_cnt_lsch6:              1;
+            uint32_t ovf_cnt_lsch7:              1;
+            uint32_t reserved20:                12;
+        };
+        uint32_t val;
+    } int_st;
+    union {
+        struct {
+            uint32_t lstimer0_ovf:                1;
+            uint32_t lstimer1_ovf:                1;
+            uint32_t lstimer2_ovf:                1;
+            uint32_t lstimer3_ovf:                1;
+            uint32_t duty_chng_end_lsch0:         1;
+            uint32_t duty_chng_end_lsch1:         1;
+            uint32_t duty_chng_end_lsch2:         1;
+            uint32_t duty_chng_end_lsch3:         1;
+            uint32_t duty_chng_end_lsch4:         1;
+            uint32_t duty_chng_end_lsch5:         1;
+            uint32_t duty_chng_end_lsch6:         1;
+            uint32_t duty_chng_end_lsch7:         1;
+            uint32_t ovf_cnt_lsch0:               1;
+            uint32_t ovf_cnt_lsch1:               1;
+            uint32_t ovf_cnt_lsch2:               1;
+            uint32_t ovf_cnt_lsch3:               1;
+            uint32_t ovf_cnt_lsch4:               1;
+            uint32_t ovf_cnt_lsch5:               1;
+            uint32_t ovf_cnt_lsch6:               1;
+            uint32_t ovf_cnt_lsch7:               1;
+            uint32_t reserved20:                 12;
+        };
+        uint32_t val;
+    } int_ena;
+    union {
+        struct {
+            uint32_t lstimer0_ovf:                1;
+            uint32_t lstimer1_ovf:                1;
+            uint32_t lstimer2_ovf:                1;
+            uint32_t lstimer3_ovf:                1;
+            uint32_t duty_chng_end_lsch0:         1;
+            uint32_t duty_chng_end_lsch1:         1;
+            uint32_t duty_chng_end_lsch2:         1;
+            uint32_t duty_chng_end_lsch3:         1;
+            uint32_t duty_chng_end_lsch4:         1;
+            uint32_t duty_chng_end_lsch5:         1;
+            uint32_t duty_chng_end_lsch6:         1;
+            uint32_t duty_chng_end_lsch7:         1;
+            uint32_t ovf_cnt_lsch0:               1;
+            uint32_t ovf_cnt_lsch1:               1;
+            uint32_t ovf_cnt_lsch2:               1;
+            uint32_t ovf_cnt_lsch3:               1;
+            uint32_t ovf_cnt_lsch4:               1;
+            uint32_t ovf_cnt_lsch5:               1;
+            uint32_t ovf_cnt_lsch6:               1;
+            uint32_t ovf_cnt_lsch7:               1;
+            uint32_t reserved20:                 12;
+        };
+        uint32_t val;
+    } int_clr;
+    union {
+        struct {
+            uint32_t apb_clk_sel: 2;
+            uint32_t reserved2:  29;
+            uint32_t clk_en:      1;
+        };
+        uint32_t val;
+    } conf;
+    uint32_t reserved_d4;
+    uint32_t reserved_d8;
+    uint32_t reserved_dc;
+    uint32_t reserved_e0;
+    uint32_t reserved_e4;
+    uint32_t reserved_e8;
+    uint32_t reserved_ec;
+    uint32_t reserved_f0;
+    uint32_t reserved_f4;
+    uint32_t reserved_f8;
+    uint32_t date;                                     /**/
+} ledc_dev_t;
+
+extern ledc_dev_t LEDC;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mcpwm_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mcpwm_reg.h
new file mode 100644
index 00000000000..6a370aa6910
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mcpwm_reg.h
@@ -0,0 +1,3829 @@
+/**
+ *  SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ *  SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define DR_REG_MCPWM_BASE(i) (DR_REG_PWM0_BASE + i * (0xE000))
+
+/** MCPWM_CLK_CFG_REG register
+ *  PWM clock prescaler register.
+ */
+#define MCPWM_CLK_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x0)
+/** MCPWM_CLK_PRESCALE : R/W; bitpos: [7:0]; default: 0;
+ *  Period of PWM_clk = 6.25ns * (PWM_CLK_PRESCALE + 1)
+ */
+#define MCPWM_CLK_PRESCALE    0x000000FFU
+#define MCPWM_CLK_PRESCALE_M  (MCPWM_CLK_PRESCALE_V << MCPWM_CLK_PRESCALE_S)
+#define MCPWM_CLK_PRESCALE_V  0x000000FFU
+#define MCPWM_CLK_PRESCALE_S  0
+
+/** MCPWM_TIMER0_CFG0_REG register
+ *  PWM timer0 period and update method configuration register.
+ */
+#define MCPWM_TIMER0_CFG0_REG(i) (DR_REG_MCPWM_BASE(i) + 0x4)
+/** MCPWM_TIMER0_PRESCALE : R/W; bitpos: [7:0]; default: 0;
+ *  Configure the divisor of PT0_clk, takes effect when PWM timer0 stops and starts
+ *  agsin. period of PT0_clk = Period of PWM_clk * (PWM_TIMER0_PRESCALE + 1)
+ */
+#define MCPWM_TIMER0_PRESCALE    0x000000FFU
+#define MCPWM_TIMER0_PRESCALE_M  (MCPWM_TIMER0_PRESCALE_V << MCPWM_TIMER0_PRESCALE_S)
+#define MCPWM_TIMER0_PRESCALE_V  0x000000FFU
+#define MCPWM_TIMER0_PRESCALE_S  0
+/** MCPWM_TIMER0_PERIOD : R/W; bitpos: [23:8]; default: 255;
+ *  period shadow register of PWM timer0
+ */
+#define MCPWM_TIMER0_PERIOD    0x0000FFFFU
+#define MCPWM_TIMER0_PERIOD_M  (MCPWM_TIMER0_PERIOD_V << MCPWM_TIMER0_PERIOD_S)
+#define MCPWM_TIMER0_PERIOD_V  0x0000FFFFU
+#define MCPWM_TIMER0_PERIOD_S  8
+/** MCPWM_TIMER0_PERIOD_UPMETHOD : R/W; bitpos: [25:24]; default: 0;
+ *  Update method for active register of PWM timer0 period, 0: immediate, 1: TEZ, 2:
+ *  sync, 3: TEZ or sync. TEZ here and below means timer equal zero event
+ */
+#define MCPWM_TIMER0_PERIOD_UPMETHOD    0x00000003U
+#define MCPWM_TIMER0_PERIOD_UPMETHOD_M  (MCPWM_TIMER0_PERIOD_UPMETHOD_V << MCPWM_TIMER0_PERIOD_UPMETHOD_S)
+#define MCPWM_TIMER0_PERIOD_UPMETHOD_V  0x00000003U
+#define MCPWM_TIMER0_PERIOD_UPMETHOD_S  24
+
+/** MCPWM_TIMER0_CFG1_REG register
+ *  PWM timer0 working mode and start/stop control configuration register.
+ */
+#define MCPWM_TIMER0_CFG1_REG(i) (DR_REG_MCPWM_BASE(i) + 0x8)
+/** MCPWM_TIMER0_START : R/W/SC; bitpos: [2:0]; default: 0;
+ *  PWM timer0 start and stop control. 0: if PWM timer0 starts, then stops at TEZ, 1:
+ *  if timer0 starts, then stops at TEP, 2: PWM timer0 starts and runs on, 3: timer0
+ *  starts and stops at the next TEZ, 4: timer0 starts and stops at the next TEP. TEP
+ *  here and below means the event that happens when the timer equals to period
+ */
+#define MCPWM_TIMER0_START    0x00000007U
+#define MCPWM_TIMER0_START_M  (MCPWM_TIMER0_START_V << MCPWM_TIMER0_START_S)
+#define MCPWM_TIMER0_START_V  0x00000007U
+#define MCPWM_TIMER0_START_S  0
+/** MCPWM_TIMER0_MOD : R/W; bitpos: [4:3]; default: 0;
+ *  PWM timer0 working mode, 0: freeze, 1: increase mode, 2: decrease mode, 3: up-down
+ *  mode
+ */
+#define MCPWM_TIMER0_MOD    0x00000003U
+#define MCPWM_TIMER0_MOD_M  (MCPWM_TIMER0_MOD_V << MCPWM_TIMER0_MOD_S)
+#define MCPWM_TIMER0_MOD_V  0x00000003U
+#define MCPWM_TIMER0_MOD_S  3
+
+/** MCPWM_TIMER0_SYNC_REG register
+ *  PWM timer0 sync function configuration register.
+ */
+#define MCPWM_TIMER0_SYNC_REG(i) (DR_REG_MCPWM_BASE(i) + 0xc)
+/** MCPWM_TIMER0_SYNCI_EN : R/W; bitpos: [0]; default: 0;
+ *  When set, timer reloading with phase on sync input event is enabled.
+ */
+#define MCPWM_TIMER0_SYNCI_EN    (BIT(0))
+#define MCPWM_TIMER0_SYNCI_EN_M  (MCPWM_TIMER0_SYNCI_EN_V << MCPWM_TIMER0_SYNCI_EN_S)
+#define MCPWM_TIMER0_SYNCI_EN_V  0x00000001U
+#define MCPWM_TIMER0_SYNCI_EN_S  0
+/** MCPWM_TIMER0_SYNC_SW : R/W; bitpos: [1]; default: 0;
+ *  Toggling this bit will trigger a software sync.
+ */
+#define MCPWM_TIMER0_SYNC_SW    (BIT(1))
+#define MCPWM_TIMER0_SYNC_SW_M  (MCPWM_TIMER0_SYNC_SW_V << MCPWM_TIMER0_SYNC_SW_S)
+#define MCPWM_TIMER0_SYNC_SW_V  0x00000001U
+#define MCPWM_TIMER0_SYNC_SW_S  1
+/** MCPWM_TIMER0_SYNCO_SEL : R/W; bitpos: [3:2]; default: 0;
+ *  PWM timer0 sync_out selection, 0: sync_in, 1: TEZ, 2: TEP, and sync out will always
+ *  generate when toggling the reg_timer0_sync_sw bit
+ */
+#define MCPWM_TIMER0_SYNCO_SEL    0x00000003U
+#define MCPWM_TIMER0_SYNCO_SEL_M  (MCPWM_TIMER0_SYNCO_SEL_V << MCPWM_TIMER0_SYNCO_SEL_S)
+#define MCPWM_TIMER0_SYNCO_SEL_V  0x00000003U
+#define MCPWM_TIMER0_SYNCO_SEL_S  2
+/** MCPWM_TIMER0_PHASE : R/W; bitpos: [19:4]; default: 0;
+ *  phase for timer reload on sync event
+ */
+#define MCPWM_TIMER0_PHASE    0x0000FFFFU
+#define MCPWM_TIMER0_PHASE_M  (MCPWM_TIMER0_PHASE_V << MCPWM_TIMER0_PHASE_S)
+#define MCPWM_TIMER0_PHASE_V  0x0000FFFFU
+#define MCPWM_TIMER0_PHASE_S  4
+/** MCPWM_TIMER0_PHASE_DIRECTION : R/W; bitpos: [20]; default: 0;
+ *  Configure the PWM timer0's direction at the time sync event occurs when timer0 mode
+ *  is up-down mode: 0-increase,1-decrease
+ */
+#define MCPWM_TIMER0_PHASE_DIRECTION    (BIT(20))
+#define MCPWM_TIMER0_PHASE_DIRECTION_M  (MCPWM_TIMER0_PHASE_DIRECTION_V << MCPWM_TIMER0_PHASE_DIRECTION_S)
+#define MCPWM_TIMER0_PHASE_DIRECTION_V  0x00000001U
+#define MCPWM_TIMER0_PHASE_DIRECTION_S  20
+
+/** MCPWM_TIMER0_STATUS_REG register
+ *  PWM timer0 status register.
+ */
+#define MCPWM_TIMER0_STATUS_REG(i) (DR_REG_MCPWM_BASE(i) + 0x10)
+/** MCPWM_TIMER0_VALUE : RO; bitpos: [15:0]; default: 0;
+ *  current PWM timer0 counter value
+ */
+#define MCPWM_TIMER0_VALUE    0x0000FFFFU
+#define MCPWM_TIMER0_VALUE_M  (MCPWM_TIMER0_VALUE_V << MCPWM_TIMER0_VALUE_S)
+#define MCPWM_TIMER0_VALUE_V  0x0000FFFFU
+#define MCPWM_TIMER0_VALUE_S  0
+/** MCPWM_TIMER0_DIRECTION : RO; bitpos: [16]; default: 0;
+ *  current PWM timer0 counter direction, 0: increment 1: decrement
+ */
+#define MCPWM_TIMER0_DIRECTION    (BIT(16))
+#define MCPWM_TIMER0_DIRECTION_M  (MCPWM_TIMER0_DIRECTION_V << MCPWM_TIMER0_DIRECTION_S)
+#define MCPWM_TIMER0_DIRECTION_V  0x00000001U
+#define MCPWM_TIMER0_DIRECTION_S  16
+
+/** MCPWM_TIMER1_CFG0_REG register
+ *  PWM timer1 period and update method configuration register.
+ */
+#define MCPWM_TIMER1_CFG0_REG(i) (DR_REG_MCPWM_BASE(i) + 0x14)
+/** MCPWM_TIMER1_PRESCALE : R/W; bitpos: [7:0]; default: 0;
+ *  Configure the divisor of PT1_clk, takes effect when PWM timer1 stops and starts
+ *  agsin. period of PT1_clk = Period of PWM_clk * (PWM_TIMER1_PRESCALE + 1)
+ */
+#define MCPWM_TIMER1_PRESCALE    0x000000FFU
+#define MCPWM_TIMER1_PRESCALE_M  (MCPWM_TIMER1_PRESCALE_V << MCPWM_TIMER1_PRESCALE_S)
+#define MCPWM_TIMER1_PRESCALE_V  0x000000FFU
+#define MCPWM_TIMER1_PRESCALE_S  0
+/** MCPWM_TIMER1_PERIOD : R/W; bitpos: [23:8]; default: 255;
+ *  period shadow register of PWM timer1
+ */
+#define MCPWM_TIMER1_PERIOD    0x0000FFFFU
+#define MCPWM_TIMER1_PERIOD_M  (MCPWM_TIMER1_PERIOD_V << MCPWM_TIMER1_PERIOD_S)
+#define MCPWM_TIMER1_PERIOD_V  0x0000FFFFU
+#define MCPWM_TIMER1_PERIOD_S  8
+/** MCPWM_TIMER1_PERIOD_UPMETHOD : R/W; bitpos: [25:24]; default: 0;
+ *  Update method for active register of PWM timer1 period, 0: immediate, 1: TEZ, 2:
+ *  sync, 3: TEZ | sync. TEZ here and below means timer equal zero event
+ */
+#define MCPWM_TIMER1_PERIOD_UPMETHOD    0x00000003U
+#define MCPWM_TIMER1_PERIOD_UPMETHOD_M  (MCPWM_TIMER1_PERIOD_UPMETHOD_V << MCPWM_TIMER1_PERIOD_UPMETHOD_S)
+#define MCPWM_TIMER1_PERIOD_UPMETHOD_V  0x00000003U
+#define MCPWM_TIMER1_PERIOD_UPMETHOD_S  24
+
+/** MCPWM_TIMER1_CFG1_REG register
+ *  PWM timer1 working mode and start/stop control configuration register.
+ */
+#define MCPWM_TIMER1_CFG1_REG(i) (DR_REG_MCPWM_BASE(i) + 0x18)
+/** MCPWM_TIMER1_START : R/W/SC; bitpos: [2:0]; default: 0;
+ *  PWM timer1 start and stop control. 0: if PWM timer1 starts, then stops at TEZ, 1:
+ *  if timer1 starts, then stops at TEP, 2: PWM timer1 starts and runs on, 3: timer1
+ *  starts and stops at the next TEZ, 4: timer1 starts and stops at the next TEP. TEP
+ *  here and below means the event that happens when the timer equals to period
+ */
+#define MCPWM_TIMER1_START    0x00000007U
+#define MCPWM_TIMER1_START_M  (MCPWM_TIMER1_START_V << MCPWM_TIMER1_START_S)
+#define MCPWM_TIMER1_START_V  0x00000007U
+#define MCPWM_TIMER1_START_S  0
+/** MCPWM_TIMER1_MOD : R/W; bitpos: [4:3]; default: 0;
+ *  PWM timer1 working mode, 0: freeze, 1: increase mode, 2: decrease mode, 3: up-down
+ *  mode
+ */
+#define MCPWM_TIMER1_MOD    0x00000003U
+#define MCPWM_TIMER1_MOD_M  (MCPWM_TIMER1_MOD_V << MCPWM_TIMER1_MOD_S)
+#define MCPWM_TIMER1_MOD_V  0x00000003U
+#define MCPWM_TIMER1_MOD_S  3
+
+/** MCPWM_TIMER1_SYNC_REG register
+ *  PWM timer1 sync function configuration register.
+ */
+#define MCPWM_TIMER1_SYNC_REG(i) (DR_REG_MCPWM_BASE(i) + 0x1c)
+/** MCPWM_TIMER1_SYNCI_EN : R/W; bitpos: [0]; default: 0;
+ *  When set, timer reloading with phase on sync input event is enabled.
+ */
+#define MCPWM_TIMER1_SYNCI_EN    (BIT(0))
+#define MCPWM_TIMER1_SYNCI_EN_M  (MCPWM_TIMER1_SYNCI_EN_V << MCPWM_TIMER1_SYNCI_EN_S)
+#define MCPWM_TIMER1_SYNCI_EN_V  0x00000001U
+#define MCPWM_TIMER1_SYNCI_EN_S  0
+/** MCPWM_TIMER1_SYNC_SW : R/W; bitpos: [1]; default: 0;
+ *  Toggling this bit will trigger a software sync.
+ */
+#define MCPWM_TIMER1_SYNC_SW    (BIT(1))
+#define MCPWM_TIMER1_SYNC_SW_M  (MCPWM_TIMER1_SYNC_SW_V << MCPWM_TIMER1_SYNC_SW_S)
+#define MCPWM_TIMER1_SYNC_SW_V  0x00000001U
+#define MCPWM_TIMER1_SYNC_SW_S  1
+/** MCPWM_TIMER1_SYNCO_SEL : R/W; bitpos: [3:2]; default: 0;
+ *  PWM timer1 sync_out selection, 0: sync_in, 1: TEZ, 2: TEP, and sync out will always
+ *  generate when toggling the reg_timer1_sync_sw bit
+ */
+#define MCPWM_TIMER1_SYNCO_SEL    0x00000003U
+#define MCPWM_TIMER1_SYNCO_SEL_M  (MCPWM_TIMER1_SYNCO_SEL_V << MCPWM_TIMER1_SYNCO_SEL_S)
+#define MCPWM_TIMER1_SYNCO_SEL_V  0x00000003U
+#define MCPWM_TIMER1_SYNCO_SEL_S  2
+/** MCPWM_TIMER1_PHASE : R/W; bitpos: [19:4]; default: 0;
+ *  phase for timer reload on sync event
+ */
+#define MCPWM_TIMER1_PHASE    0x0000FFFFU
+#define MCPWM_TIMER1_PHASE_M  (MCPWM_TIMER1_PHASE_V << MCPWM_TIMER1_PHASE_S)
+#define MCPWM_TIMER1_PHASE_V  0x0000FFFFU
+#define MCPWM_TIMER1_PHASE_S  4
+/** MCPWM_TIMER1_PHASE_DIRECTION : R/W; bitpos: [20]; default: 0;
+ *  Configure the PWM timer1's direction at the time sync event occurs when timer1 mode
+ *  is up-down mode: 0-increase,1-decrease
+ */
+#define MCPWM_TIMER1_PHASE_DIRECTION    (BIT(20))
+#define MCPWM_TIMER1_PHASE_DIRECTION_M  (MCPWM_TIMER1_PHASE_DIRECTION_V << MCPWM_TIMER1_PHASE_DIRECTION_S)
+#define MCPWM_TIMER1_PHASE_DIRECTION_V  0x00000001U
+#define MCPWM_TIMER1_PHASE_DIRECTION_S  20
+
+/** MCPWM_TIMER1_STATUS_REG register
+ *  PWM timer1 status register.
+ */
+#define MCPWM_TIMER1_STATUS_REG(i) (DR_REG_MCPWM_BASE(i) + 0x20)
+/** MCPWM_TIMER1_VALUE : RO; bitpos: [15:0]; default: 0;
+ *  current PWM timer1 counter value
+ */
+#define MCPWM_TIMER1_VALUE    0x0000FFFFU
+#define MCPWM_TIMER1_VALUE_M  (MCPWM_TIMER1_VALUE_V << MCPWM_TIMER1_VALUE_S)
+#define MCPWM_TIMER1_VALUE_V  0x0000FFFFU
+#define MCPWM_TIMER1_VALUE_S  0
+/** MCPWM_TIMER1_DIRECTION : RO; bitpos: [16]; default: 0;
+ *  current PWM timer1 counter direction, 0: increment 1: decrement
+ */
+#define MCPWM_TIMER1_DIRECTION    (BIT(16))
+#define MCPWM_TIMER1_DIRECTION_M  (MCPWM_TIMER1_DIRECTION_V << MCPWM_TIMER1_DIRECTION_S)
+#define MCPWM_TIMER1_DIRECTION_V  0x00000001U
+#define MCPWM_TIMER1_DIRECTION_S  16
+
+/** MCPWM_TIMER2_CFG0_REG register
+ *  PWM timer2 period and update method configuration register.
+ */
+#define MCPWM_TIMER2_CFG0_REG(i) (DR_REG_MCPWM_BASE(i) + 0x24)
+/** MCPWM_TIMER2_PRESCALE : R/W; bitpos: [7:0]; default: 0;
+ *  Configure the divisor of PT2_clk, takes effect when PWM timer2 stops and starts
+ *  agsin. period of PT2_clk = Period of PWM_clk * (PWM_TIMER2_PRESCALE + 1)
+ */
+#define MCPWM_TIMER2_PRESCALE    0x000000FFU
+#define MCPWM_TIMER2_PRESCALE_M  (MCPWM_TIMER2_PRESCALE_V << MCPWM_TIMER2_PRESCALE_S)
+#define MCPWM_TIMER2_PRESCALE_V  0x000000FFU
+#define MCPWM_TIMER2_PRESCALE_S  0
+/** MCPWM_TIMER2_PERIOD : R/W; bitpos: [23:8]; default: 255;
+ *  period shadow register of PWM timer2
+ */
+#define MCPWM_TIMER2_PERIOD    0x0000FFFFU
+#define MCPWM_TIMER2_PERIOD_M  (MCPWM_TIMER2_PERIOD_V << MCPWM_TIMER2_PERIOD_S)
+#define MCPWM_TIMER2_PERIOD_V  0x0000FFFFU
+#define MCPWM_TIMER2_PERIOD_S  8
+/** MCPWM_TIMER2_PERIOD_UPMETHOD : R/W; bitpos: [25:24]; default: 0;
+ *  Update method for active register of PWM timer2 period, 0: immediate, 1: TEZ, 2:
+ *  sync, 3: TEZ | sync. TEZ here and below means timer equal zero event
+ */
+#define MCPWM_TIMER2_PERIOD_UPMETHOD    0x00000003U
+#define MCPWM_TIMER2_PERIOD_UPMETHOD_M  (MCPWM_TIMER2_PERIOD_UPMETHOD_V << MCPWM_TIMER2_PERIOD_UPMETHOD_S)
+#define MCPWM_TIMER2_PERIOD_UPMETHOD_V  0x00000003U
+#define MCPWM_TIMER2_PERIOD_UPMETHOD_S  24
+
+/** MCPWM_TIMER2_CFG1_REG register
+ *  PWM timer2 working mode and start/stop control configuration register.
+ */
+#define MCPWM_TIMER2_CFG1_REG(i) (DR_REG_MCPWM_BASE(i) + 0x28)
+/** MCPWM_TIMER2_START : R/W/SC; bitpos: [2:0]; default: 0;
+ *  PWM timer2 start and stop control. 0: if PWM timer2 starts, then stops at TEZ, 1:
+ *  if timer2 starts, then stops at TEP, 2: PWM timer2 starts and runs on, 3: timer2
+ *  starts and stops at the next TEZ, 4: timer2 starts and stops at the next TEP. TEP
+ *  here and below means the event that happens when the timer equals to period
+ */
+#define MCPWM_TIMER2_START    0x00000007U
+#define MCPWM_TIMER2_START_M  (MCPWM_TIMER2_START_V << MCPWM_TIMER2_START_S)
+#define MCPWM_TIMER2_START_V  0x00000007U
+#define MCPWM_TIMER2_START_S  0
+/** MCPWM_TIMER2_MOD : R/W; bitpos: [4:3]; default: 0;
+ *  PWM timer2 working mode, 0: freeze, 1: increase mode, 2: decrease mode, 3: up-down
+ *  mode
+ */
+#define MCPWM_TIMER2_MOD    0x00000003U
+#define MCPWM_TIMER2_MOD_M  (MCPWM_TIMER2_MOD_V << MCPWM_TIMER2_MOD_S)
+#define MCPWM_TIMER2_MOD_V  0x00000003U
+#define MCPWM_TIMER2_MOD_S  3
+
+/** MCPWM_TIMER2_SYNC_REG register
+ *  PWM timer2 sync function configuration register.
+ */
+#define MCPWM_TIMER2_SYNC_REG(i) (DR_REG_MCPWM_BASE(i) + 0x2c)
+/** MCPWM_TIMER2_SYNCI_EN : R/W; bitpos: [0]; default: 0;
+ *  When set, timer reloading with phase on sync input event is enabled.
+ */
+#define MCPWM_TIMER2_SYNCI_EN    (BIT(0))
+#define MCPWM_TIMER2_SYNCI_EN_M  (MCPWM_TIMER2_SYNCI_EN_V << MCPWM_TIMER2_SYNCI_EN_S)
+#define MCPWM_TIMER2_SYNCI_EN_V  0x00000001U
+#define MCPWM_TIMER2_SYNCI_EN_S  0
+/** MCPWM_TIMER2_SYNC_SW : R/W; bitpos: [1]; default: 0;
+ *  Toggling this bit will trigger a software sync.
+ */
+#define MCPWM_TIMER2_SYNC_SW    (BIT(1))
+#define MCPWM_TIMER2_SYNC_SW_M  (MCPWM_TIMER2_SYNC_SW_V << MCPWM_TIMER2_SYNC_SW_S)
+#define MCPWM_TIMER2_SYNC_SW_V  0x00000001U
+#define MCPWM_TIMER2_SYNC_SW_S  1
+/** MCPWM_TIMER2_SYNCO_SEL : R/W; bitpos: [3:2]; default: 0;
+ *  PWM timer2 sync_out selection, 0: sync_in, 1: TEZ, 2: TEP, and sync out will always
+ *  generate when toggling the reg_timer0_sync_sw bit
+ */
+#define MCPWM_TIMER2_SYNCO_SEL    0x00000003U
+#define MCPWM_TIMER2_SYNCO_SEL_M  (MCPWM_TIMER2_SYNCO_SEL_V << MCPWM_TIMER2_SYNCO_SEL_S)
+#define MCPWM_TIMER2_SYNCO_SEL_V  0x00000003U
+#define MCPWM_TIMER2_SYNCO_SEL_S  2
+/** MCPWM_TIMER2_PHASE : R/W; bitpos: [19:4]; default: 0;
+ *  phase for timer reload on sync event
+ */
+#define MCPWM_TIMER2_PHASE    0x0000FFFFU
+#define MCPWM_TIMER2_PHASE_M  (MCPWM_TIMER2_PHASE_V << MCPWM_TIMER2_PHASE_S)
+#define MCPWM_TIMER2_PHASE_V  0x0000FFFFU
+#define MCPWM_TIMER2_PHASE_S  4
+/** MCPWM_TIMER2_PHASE_DIRECTION : R/W; bitpos: [20]; default: 0;
+ *  Configure the PWM timer2's direction at the time sync event occurs when timer2 mode
+ *  is up-down mode: 0-increase,1-decrease
+ */
+#define MCPWM_TIMER2_PHASE_DIRECTION    (BIT(20))
+#define MCPWM_TIMER2_PHASE_DIRECTION_M  (MCPWM_TIMER2_PHASE_DIRECTION_V << MCPWM_TIMER2_PHASE_DIRECTION_S)
+#define MCPWM_TIMER2_PHASE_DIRECTION_V  0x00000001U
+#define MCPWM_TIMER2_PHASE_DIRECTION_S  20
+
+/** MCPWM_TIMER2_STATUS_REG register
+ *  PWM timer2 status register.
+ */
+#define MCPWM_TIMER2_STATUS_REG(i) (DR_REG_MCPWM_BASE(i) + 0x30)
+/** MCPWM_TIMER2_VALUE : RO; bitpos: [15:0]; default: 0;
+ *  current PWM timer2 counter value
+ */
+#define MCPWM_TIMER2_VALUE    0x0000FFFFU
+#define MCPWM_TIMER2_VALUE_M  (MCPWM_TIMER2_VALUE_V << MCPWM_TIMER2_VALUE_S)
+#define MCPWM_TIMER2_VALUE_V  0x0000FFFFU
+#define MCPWM_TIMER2_VALUE_S  0
+/** MCPWM_TIMER2_DIRECTION : RO; bitpos: [16]; default: 0;
+ *  current PWM timer2 counter direction, 0: increment 1: decrement
+ */
+#define MCPWM_TIMER2_DIRECTION    (BIT(16))
+#define MCPWM_TIMER2_DIRECTION_M  (MCPWM_TIMER2_DIRECTION_V << MCPWM_TIMER2_DIRECTION_S)
+#define MCPWM_TIMER2_DIRECTION_V  0x00000001U
+#define MCPWM_TIMER2_DIRECTION_S  16
+
+/** MCPWM_TIMER_SYNCI_CFG_REG register
+ *  Synchronization input selection for three PWM timers.
+ */
+#define MCPWM_TIMER_SYNCI_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x34)
+/** MCPWM_TIMER0_SYNCISEL : R/W; bitpos: [2:0]; default: 0;
+ *  select sync input for PWM timer0, 1: PWM timer0 sync_out, 2: PWM timer1 sync_out,
+ *  3: PWM timer2 sync_out, 4: SYNC0 from GPIO matrix, 5: SYNC1 from GPIO matrix, 6:
+ *  SYNC2 from GPIO matrix, other values: no sync input selected
+ */
+#define MCPWM_TIMER0_SYNCISEL    0x00000007U
+#define MCPWM_TIMER0_SYNCISEL_M  (MCPWM_TIMER0_SYNCISEL_V << MCPWM_TIMER0_SYNCISEL_S)
+#define MCPWM_TIMER0_SYNCISEL_V  0x00000007U
+#define MCPWM_TIMER0_SYNCISEL_S  0
+/** MCPWM_TIMER1_SYNCISEL : R/W; bitpos: [5:3]; default: 0;
+ *  select sync input for PWM timer1, 1: PWM timer0 sync_out, 2: PWM timer1 sync_out,
+ *  3: PWM timer2 sync_out, 4: SYNC0 from GPIO matrix, 5: SYNC1 from GPIO matrix, 6:
+ *  SYNC2 from GPIO matrix, other values: no sync input selected
+ */
+#define MCPWM_TIMER1_SYNCISEL    0x00000007U
+#define MCPWM_TIMER1_SYNCISEL_M  (MCPWM_TIMER1_SYNCISEL_V << MCPWM_TIMER1_SYNCISEL_S)
+#define MCPWM_TIMER1_SYNCISEL_V  0x00000007U
+#define MCPWM_TIMER1_SYNCISEL_S  3
+/** MCPWM_TIMER2_SYNCISEL : R/W; bitpos: [8:6]; default: 0;
+ *  select sync input for PWM timer2, 1: PWM timer0 sync_out, 2: PWM timer1 sync_out,
+ *  3: PWM timer2 sync_out, 4: SYNC0 from GPIO matrix, 5: SYNC1 from GPIO matrix, 6:
+ *  SYNC2 from GPIO matrix, other values: no sync input selected
+ */
+#define MCPWM_TIMER2_SYNCISEL    0x00000007U
+#define MCPWM_TIMER2_SYNCISEL_M  (MCPWM_TIMER2_SYNCISEL_V << MCPWM_TIMER2_SYNCISEL_S)
+#define MCPWM_TIMER2_SYNCISEL_V  0x00000007U
+#define MCPWM_TIMER2_SYNCISEL_S  6
+/** MCPWM_EXTERNAL_SYNCI0_INVERT : R/W; bitpos: [9]; default: 0;
+ *  invert SYNC0 from GPIO matrix
+ */
+#define MCPWM_EXTERNAL_SYNCI0_INVERT    (BIT(9))
+#define MCPWM_EXTERNAL_SYNCI0_INVERT_M  (MCPWM_EXTERNAL_SYNCI0_INVERT_V << MCPWM_EXTERNAL_SYNCI0_INVERT_S)
+#define MCPWM_EXTERNAL_SYNCI0_INVERT_V  0x00000001U
+#define MCPWM_EXTERNAL_SYNCI0_INVERT_S  9
+/** MCPWM_EXTERNAL_SYNCI1_INVERT : R/W; bitpos: [10]; default: 0;
+ *  invert SYNC1 from GPIO matrix
+ */
+#define MCPWM_EXTERNAL_SYNCI1_INVERT    (BIT(10))
+#define MCPWM_EXTERNAL_SYNCI1_INVERT_M  (MCPWM_EXTERNAL_SYNCI1_INVERT_V << MCPWM_EXTERNAL_SYNCI1_INVERT_S)
+#define MCPWM_EXTERNAL_SYNCI1_INVERT_V  0x00000001U
+#define MCPWM_EXTERNAL_SYNCI1_INVERT_S  10
+/** MCPWM_EXTERNAL_SYNCI2_INVERT : R/W; bitpos: [11]; default: 0;
+ *  invert SYNC2 from GPIO matrix
+ */
+#define MCPWM_EXTERNAL_SYNCI2_INVERT    (BIT(11))
+#define MCPWM_EXTERNAL_SYNCI2_INVERT_M  (MCPWM_EXTERNAL_SYNCI2_INVERT_V << MCPWM_EXTERNAL_SYNCI2_INVERT_S)
+#define MCPWM_EXTERNAL_SYNCI2_INVERT_V  0x00000001U
+#define MCPWM_EXTERNAL_SYNCI2_INVERT_S  11
+
+/** MCPWM_OPERATOR_TIMERSEL_REG register
+ *  Select specific timer for PWM operators.
+ */
+#define MCPWM_OPERATOR_TIMERSEL_REG(i) (DR_REG_MCPWM_BASE(i) + 0x38)
+/** MCPWM_OPERATOR0_TIMERSEL : R/W; bitpos: [1:0]; default: 0;
+ *  Select which PWM timer is the timing reference for PWM operator0, 0: timer0, 1:
+ *  timer1, 2: timer2
+ */
+#define MCPWM_OPERATOR0_TIMERSEL    0x00000003U
+#define MCPWM_OPERATOR0_TIMERSEL_M  (MCPWM_OPERATOR0_TIMERSEL_V << MCPWM_OPERATOR0_TIMERSEL_S)
+#define MCPWM_OPERATOR0_TIMERSEL_V  0x00000003U
+#define MCPWM_OPERATOR0_TIMERSEL_S  0
+/** MCPWM_OPERATOR1_TIMERSEL : R/W; bitpos: [3:2]; default: 0;
+ *  Select which PWM timer is the timing reference for PWM operator1, 0: timer0, 1:
+ *  timer1, 2: timer2
+ */
+#define MCPWM_OPERATOR1_TIMERSEL    0x00000003U
+#define MCPWM_OPERATOR1_TIMERSEL_M  (MCPWM_OPERATOR1_TIMERSEL_V << MCPWM_OPERATOR1_TIMERSEL_S)
+#define MCPWM_OPERATOR1_TIMERSEL_V  0x00000003U
+#define MCPWM_OPERATOR1_TIMERSEL_S  2
+/** MCPWM_OPERATOR2_TIMERSEL : R/W; bitpos: [5:4]; default: 0;
+ *  Select which PWM timer is the timing reference for PWM operator2, 0: timer0, 1:
+ *  timer1, 2: timer2
+ */
+#define MCPWM_OPERATOR2_TIMERSEL    0x00000003U
+#define MCPWM_OPERATOR2_TIMERSEL_M  (MCPWM_OPERATOR2_TIMERSEL_V << MCPWM_OPERATOR2_TIMERSEL_S)
+#define MCPWM_OPERATOR2_TIMERSEL_V  0x00000003U
+#define MCPWM_OPERATOR2_TIMERSEL_S  4
+
+/** MCPWM_GEN0_STMP_CFG_REG register
+ *  Transfer status and update method for time stamp registers A and B
+ */
+#define MCPWM_GEN0_STMP_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x3c)
+/** MCPWM_GEN0_A_UPMETHOD : R/W; bitpos: [3:0]; default: 0;
+ *  Update method for PWM generator 0 time stamp A's active register. When all bits are
+ *  set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when
+ *  bit2 is set to 1: sync, when bit3 is set to 1: disable the update.
+ */
+#define MCPWM_GEN0_A_UPMETHOD    0x0000000FU
+#define MCPWM_GEN0_A_UPMETHOD_M  (MCPWM_GEN0_A_UPMETHOD_V << MCPWM_GEN0_A_UPMETHOD_S)
+#define MCPWM_GEN0_A_UPMETHOD_V  0x0000000FU
+#define MCPWM_GEN0_A_UPMETHOD_S  0
+/** MCPWM_GEN0_B_UPMETHOD : R/W; bitpos: [7:4]; default: 0;
+ *  Update method for PWM generator 0 time stamp B's active register. When all bits are
+ *  set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when
+ *  bit2 is set to 1: sync, when bit3 is set to 1: disable the update.
+ */
+#define MCPWM_GEN0_B_UPMETHOD    0x0000000FU
+#define MCPWM_GEN0_B_UPMETHOD_M  (MCPWM_GEN0_B_UPMETHOD_V << MCPWM_GEN0_B_UPMETHOD_S)
+#define MCPWM_GEN0_B_UPMETHOD_V  0x0000000FU
+#define MCPWM_GEN0_B_UPMETHOD_S  4
+/** MCPWM_GEN0_A_SHDW_FULL : R/W/WTC/SC; bitpos: [8]; default: 0;
+ *  Set and reset by hardware. If set, PWM generator 0 time stamp A's shadow reg is
+ *  filled and waiting to be transferred to A's active reg. If cleared, A's active reg
+ *  has been updated with shadow register latest value
+ */
+#define MCPWM_GEN0_A_SHDW_FULL    (BIT(8))
+#define MCPWM_GEN0_A_SHDW_FULL_M  (MCPWM_GEN0_A_SHDW_FULL_V << MCPWM_GEN0_A_SHDW_FULL_S)
+#define MCPWM_GEN0_A_SHDW_FULL_V  0x00000001U
+#define MCPWM_GEN0_A_SHDW_FULL_S  8
+/** MCPWM_GEN0_B_SHDW_FULL : R/W/WTC/SC; bitpos: [9]; default: 0;
+ *  Set and reset by hardware. If set, PWM generator 0 time stamp B's shadow reg is
+ *  filled and waiting to be transferred to B's active reg. If cleared, B's active reg
+ *  has been updated with shadow register latest value
+ */
+#define MCPWM_GEN0_B_SHDW_FULL    (BIT(9))
+#define MCPWM_GEN0_B_SHDW_FULL_M  (MCPWM_GEN0_B_SHDW_FULL_V << MCPWM_GEN0_B_SHDW_FULL_S)
+#define MCPWM_GEN0_B_SHDW_FULL_V  0x00000001U
+#define MCPWM_GEN0_B_SHDW_FULL_S  9
+
+/** MCPWM_GEN0_TSTMP_A_REG register
+ *  PWM generator 0 shadow register for timer stamp A.
+ */
+#define MCPWM_GEN0_TSTMP_A_REG(i) (DR_REG_MCPWM_BASE(i) + 0x40)
+/** MCPWM_GEN0_A : R/W; bitpos: [15:0]; default: 0;
+ *  PWM generator 0 time stamp A's shadow register
+ */
+#define MCPWM_GEN0_A    0x0000FFFFU
+#define MCPWM_GEN0_A_M  (MCPWM_GEN0_A_V << MCPWM_GEN0_A_S)
+#define MCPWM_GEN0_A_V  0x0000FFFFU
+#define MCPWM_GEN0_A_S  0
+
+/** MCPWM_GEN0_TSTMP_B_REG register
+ *  PWM generator 0 shadow register for timer stamp B.
+ */
+#define MCPWM_GEN0_TSTMP_B_REG(i) (DR_REG_MCPWM_BASE(i) + 0x44)
+/** MCPWM_GEN0_B : R/W; bitpos: [15:0]; default: 0;
+ *  PWM generator 0 time stamp B's shadow register
+ */
+#define MCPWM_GEN0_B    0x0000FFFFU
+#define MCPWM_GEN0_B_M  (MCPWM_GEN0_B_V << MCPWM_GEN0_B_S)
+#define MCPWM_GEN0_B_V  0x0000FFFFU
+#define MCPWM_GEN0_B_S  0
+
+/** MCPWM_GEN0_CFG0_REG register
+ *  PWM generator 0  event T0 and T1 handling
+ */
+#define MCPWM_GEN0_CFG0_REG(i) (DR_REG_MCPWM_BASE(i) + 0x48)
+/** MCPWM_GEN0_CFG_UPMETHOD : R/W; bitpos: [3:0]; default: 0;
+ *  Update method for PWM generator 0's active register of configuration. When all bits
+ *  are set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to
+ *  1:TEP,when bit2 is set to 1:sync,when bit3 is set to 1:disable the update
+ */
+#define MCPWM_GEN0_CFG_UPMETHOD    0x0000000FU
+#define MCPWM_GEN0_CFG_UPMETHOD_M  (MCPWM_GEN0_CFG_UPMETHOD_V << MCPWM_GEN0_CFG_UPMETHOD_S)
+#define MCPWM_GEN0_CFG_UPMETHOD_V  0x0000000FU
+#define MCPWM_GEN0_CFG_UPMETHOD_S  0
+/** MCPWM_GEN0_T0_SEL : R/W; bitpos: [6:4]; default: 0;
+ *  Source selection for PWM generator 0 event_t0, take effect immediately, 0:
+ *  fault_event0, 1: fault_event1, 2: fault_event2, 3: sync_taken, 4: none
+ */
+#define MCPWM_GEN0_T0_SEL    0x00000007U
+#define MCPWM_GEN0_T0_SEL_M  (MCPWM_GEN0_T0_SEL_V << MCPWM_GEN0_T0_SEL_S)
+#define MCPWM_GEN0_T0_SEL_V  0x00000007U
+#define MCPWM_GEN0_T0_SEL_S  4
+/** MCPWM_GEN0_T1_SEL : R/W; bitpos: [9:7]; default: 0;
+ *  Source selection for PWM generator 0 event_t1, take effect immediately, 0:
+ *  fault_event0, 1: fault_event1, 2: fault_event2, 3: sync_taken, 4: none
+ */
+#define MCPWM_GEN0_T1_SEL    0x00000007U
+#define MCPWM_GEN0_T1_SEL_M  (MCPWM_GEN0_T1_SEL_V << MCPWM_GEN0_T1_SEL_S)
+#define MCPWM_GEN0_T1_SEL_V  0x00000007U
+#define MCPWM_GEN0_T1_SEL_S  7
+
+/** MCPWM_GEN0_FORCE_REG register
+ *  Permissives to force PWM0A and PWM0B outputs by software
+ */
+#define MCPWM_GEN0_FORCE_REG(i) (DR_REG_MCPWM_BASE(i) + 0x4c)
+/** MCPWM_GEN0_CNTUFORCE_UPMETHOD : R/W; bitpos: [5:0]; default: 32;
+ *  Updating method for continuous software force of PWM generator0. When all bits are
+ *  set to 0: immediately, when bit0 is set to 1: TEZ,,when bit1 is set to 1: TEP, when
+ *  bit2 is set to 1: TEA, when bit3 is set to 1: TEB, when bit4 is set to 1: sync,
+ *  when bit5 is set to 1: disable update. (TEA/B here and below means an event
+ *  generated when the timer's value equals to that of register A/B.)
+ */
+#define MCPWM_GEN0_CNTUFORCE_UPMETHOD    0x0000003FU
+#define MCPWM_GEN0_CNTUFORCE_UPMETHOD_M  (MCPWM_GEN0_CNTUFORCE_UPMETHOD_V << MCPWM_GEN0_CNTUFORCE_UPMETHOD_S)
+#define MCPWM_GEN0_CNTUFORCE_UPMETHOD_V  0x0000003FU
+#define MCPWM_GEN0_CNTUFORCE_UPMETHOD_S  0
+/** MCPWM_GEN0_A_CNTUFORCE_MODE : R/W; bitpos: [7:6]; default: 0;
+ *  Continuous software force mode for PWM0A. 0: disabled, 1: low, 2: high, 3: disabled
+ */
+#define MCPWM_GEN0_A_CNTUFORCE_MODE    0x00000003U
+#define MCPWM_GEN0_A_CNTUFORCE_MODE_M  (MCPWM_GEN0_A_CNTUFORCE_MODE_V << MCPWM_GEN0_A_CNTUFORCE_MODE_S)
+#define MCPWM_GEN0_A_CNTUFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN0_A_CNTUFORCE_MODE_S  6
+/** MCPWM_GEN0_B_CNTUFORCE_MODE : R/W; bitpos: [9:8]; default: 0;
+ *  Continuous software force mode for PWM0B. 0: disabled, 1: low, 2: high, 3: disabled
+ */
+#define MCPWM_GEN0_B_CNTUFORCE_MODE    0x00000003U
+#define MCPWM_GEN0_B_CNTUFORCE_MODE_M  (MCPWM_GEN0_B_CNTUFORCE_MODE_V << MCPWM_GEN0_B_CNTUFORCE_MODE_S)
+#define MCPWM_GEN0_B_CNTUFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN0_B_CNTUFORCE_MODE_S  8
+/** MCPWM_GEN0_A_NCIFORCE : R/W; bitpos: [10]; default: 0;
+ *  Trigger of non-continuous immediate software-force event for PWM0A, a toggle will
+ *  trigger a force event.
+ */
+#define MCPWM_GEN0_A_NCIFORCE    (BIT(10))
+#define MCPWM_GEN0_A_NCIFORCE_M  (MCPWM_GEN0_A_NCIFORCE_V << MCPWM_GEN0_A_NCIFORCE_S)
+#define MCPWM_GEN0_A_NCIFORCE_V  0x00000001U
+#define MCPWM_GEN0_A_NCIFORCE_S  10
+/** MCPWM_GEN0_A_NCIFORCE_MODE : R/W; bitpos: [12:11]; default: 0;
+ *  non-continuous immediate software force mode for PWM0A, 0: disabled, 1: low, 2:
+ *  high, 3: disabled
+ */
+#define MCPWM_GEN0_A_NCIFORCE_MODE    0x00000003U
+#define MCPWM_GEN0_A_NCIFORCE_MODE_M  (MCPWM_GEN0_A_NCIFORCE_MODE_V << MCPWM_GEN0_A_NCIFORCE_MODE_S)
+#define MCPWM_GEN0_A_NCIFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN0_A_NCIFORCE_MODE_S  11
+/** MCPWM_GEN0_B_NCIFORCE : R/W; bitpos: [13]; default: 0;
+ *  Trigger of non-continuous immediate software-force event for PWM0B, a toggle will
+ *  trigger a force event.
+ */
+#define MCPWM_GEN0_B_NCIFORCE    (BIT(13))
+#define MCPWM_GEN0_B_NCIFORCE_M  (MCPWM_GEN0_B_NCIFORCE_V << MCPWM_GEN0_B_NCIFORCE_S)
+#define MCPWM_GEN0_B_NCIFORCE_V  0x00000001U
+#define MCPWM_GEN0_B_NCIFORCE_S  13
+/** MCPWM_GEN0_B_NCIFORCE_MODE : R/W; bitpos: [15:14]; default: 0;
+ *  non-continuous immediate software force mode for PWM0B, 0: disabled, 1: low, 2:
+ *  high, 3: disabled
+ */
+#define MCPWM_GEN0_B_NCIFORCE_MODE    0x00000003U
+#define MCPWM_GEN0_B_NCIFORCE_MODE_M  (MCPWM_GEN0_B_NCIFORCE_MODE_V << MCPWM_GEN0_B_NCIFORCE_MODE_S)
+#define MCPWM_GEN0_B_NCIFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN0_B_NCIFORCE_MODE_S  14
+
+/** MCPWM_GEN0_A_REG register
+ *  Actions triggered by events on PWM0A
+ */
+#define MCPWM_GEN0_A_REG(i) (DR_REG_MCPWM_BASE(i) + 0x50)
+/** MCPWM_GEN0_A_UTEZ : R/W; bitpos: [1:0]; default: 0;
+ *  Action on PWM0A triggered by event TEZ when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_UTEZ    0x00000003U
+#define MCPWM_GEN0_A_UTEZ_M  (MCPWM_GEN0_A_UTEZ_V << MCPWM_GEN0_A_UTEZ_S)
+#define MCPWM_GEN0_A_UTEZ_V  0x00000003U
+#define MCPWM_GEN0_A_UTEZ_S  0
+/** MCPWM_GEN0_A_UTEP : R/W; bitpos: [3:2]; default: 0;
+ *  Action on PWM0A triggered by event TEP when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_UTEP    0x00000003U
+#define MCPWM_GEN0_A_UTEP_M  (MCPWM_GEN0_A_UTEP_V << MCPWM_GEN0_A_UTEP_S)
+#define MCPWM_GEN0_A_UTEP_V  0x00000003U
+#define MCPWM_GEN0_A_UTEP_S  2
+/** MCPWM_GEN0_A_UTEA : R/W; bitpos: [5:4]; default: 0;
+ *  Action on PWM0A triggered by event TEA when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_UTEA    0x00000003U
+#define MCPWM_GEN0_A_UTEA_M  (MCPWM_GEN0_A_UTEA_V << MCPWM_GEN0_A_UTEA_S)
+#define MCPWM_GEN0_A_UTEA_V  0x00000003U
+#define MCPWM_GEN0_A_UTEA_S  4
+/** MCPWM_GEN0_A_UTEB : R/W; bitpos: [7:6]; default: 0;
+ *  Action on PWM0A triggered by event TEB when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_UTEB    0x00000003U
+#define MCPWM_GEN0_A_UTEB_M  (MCPWM_GEN0_A_UTEB_V << MCPWM_GEN0_A_UTEB_S)
+#define MCPWM_GEN0_A_UTEB_V  0x00000003U
+#define MCPWM_GEN0_A_UTEB_S  6
+/** MCPWM_GEN0_A_UT0 : R/W; bitpos: [9:8]; default: 0;
+ *  Action on PWM0A triggered by event_t0 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_UT0    0x00000003U
+#define MCPWM_GEN0_A_UT0_M  (MCPWM_GEN0_A_UT0_V << MCPWM_GEN0_A_UT0_S)
+#define MCPWM_GEN0_A_UT0_V  0x00000003U
+#define MCPWM_GEN0_A_UT0_S  8
+/** MCPWM_GEN0_A_UT1 : R/W; bitpos: [11:10]; default: 0;
+ *  Action on PWM0A triggered by event_t1 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_UT1    0x00000003U
+#define MCPWM_GEN0_A_UT1_M  (MCPWM_GEN0_A_UT1_V << MCPWM_GEN0_A_UT1_S)
+#define MCPWM_GEN0_A_UT1_V  0x00000003U
+#define MCPWM_GEN0_A_UT1_S  10
+/** MCPWM_GEN0_A_DTEZ : R/W; bitpos: [13:12]; default: 0;
+ *  Action on PWM0A triggered by event TEZ when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_DTEZ    0x00000003U
+#define MCPWM_GEN0_A_DTEZ_M  (MCPWM_GEN0_A_DTEZ_V << MCPWM_GEN0_A_DTEZ_S)
+#define MCPWM_GEN0_A_DTEZ_V  0x00000003U
+#define MCPWM_GEN0_A_DTEZ_S  12
+/** MCPWM_GEN0_A_DTEP : R/W; bitpos: [15:14]; default: 0;
+ *  Action on PWM0A triggered by event TEP when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_DTEP    0x00000003U
+#define MCPWM_GEN0_A_DTEP_M  (MCPWM_GEN0_A_DTEP_V << MCPWM_GEN0_A_DTEP_S)
+#define MCPWM_GEN0_A_DTEP_V  0x00000003U
+#define MCPWM_GEN0_A_DTEP_S  14
+/** MCPWM_GEN0_A_DTEA : R/W; bitpos: [17:16]; default: 0;
+ *  Action on PWM0A triggered by event TEA when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_DTEA    0x00000003U
+#define MCPWM_GEN0_A_DTEA_M  (MCPWM_GEN0_A_DTEA_V << MCPWM_GEN0_A_DTEA_S)
+#define MCPWM_GEN0_A_DTEA_V  0x00000003U
+#define MCPWM_GEN0_A_DTEA_S  16
+/** MCPWM_GEN0_A_DTEB : R/W; bitpos: [19:18]; default: 0;
+ *  Action on PWM0A triggered by event TEB when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_DTEB    0x00000003U
+#define MCPWM_GEN0_A_DTEB_M  (MCPWM_GEN0_A_DTEB_V << MCPWM_GEN0_A_DTEB_S)
+#define MCPWM_GEN0_A_DTEB_V  0x00000003U
+#define MCPWM_GEN0_A_DTEB_S  18
+/** MCPWM_GEN0_A_DT0 : R/W; bitpos: [21:20]; default: 0;
+ *  Action on PWM0A triggered by event_t0 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_DT0    0x00000003U
+#define MCPWM_GEN0_A_DT0_M  (MCPWM_GEN0_A_DT0_V << MCPWM_GEN0_A_DT0_S)
+#define MCPWM_GEN0_A_DT0_V  0x00000003U
+#define MCPWM_GEN0_A_DT0_S  20
+/** MCPWM_GEN0_A_DT1 : R/W; bitpos: [23:22]; default: 0;
+ *  Action on PWM0A triggered by event_t1 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_A_DT1    0x00000003U
+#define MCPWM_GEN0_A_DT1_M  (MCPWM_GEN0_A_DT1_V << MCPWM_GEN0_A_DT1_S)
+#define MCPWM_GEN0_A_DT1_V  0x00000003U
+#define MCPWM_GEN0_A_DT1_S  22
+
+/** MCPWM_GEN0_B_REG register
+ *  Actions triggered by events on PWM0B
+ */
+#define MCPWM_GEN0_B_REG(i) (DR_REG_MCPWM_BASE(i) + 0x54)
+/** MCPWM_GEN0_B_UTEZ : R/W; bitpos: [1:0]; default: 0;
+ *  Action on PWM0B triggered by event TEZ when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_UTEZ    0x00000003U
+#define MCPWM_GEN0_B_UTEZ_M  (MCPWM_GEN0_B_UTEZ_V << MCPWM_GEN0_B_UTEZ_S)
+#define MCPWM_GEN0_B_UTEZ_V  0x00000003U
+#define MCPWM_GEN0_B_UTEZ_S  0
+/** MCPWM_GEN0_B_UTEP : R/W; bitpos: [3:2]; default: 0;
+ *  Action on PWM0B triggered by event TEP when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_UTEP    0x00000003U
+#define MCPWM_GEN0_B_UTEP_M  (MCPWM_GEN0_B_UTEP_V << MCPWM_GEN0_B_UTEP_S)
+#define MCPWM_GEN0_B_UTEP_V  0x00000003U
+#define MCPWM_GEN0_B_UTEP_S  2
+/** MCPWM_GEN0_B_UTEA : R/W; bitpos: [5:4]; default: 0;
+ *  Action on PWM0B triggered by event TEA when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_UTEA    0x00000003U
+#define MCPWM_GEN0_B_UTEA_M  (MCPWM_GEN0_B_UTEA_V << MCPWM_GEN0_B_UTEA_S)
+#define MCPWM_GEN0_B_UTEA_V  0x00000003U
+#define MCPWM_GEN0_B_UTEA_S  4
+/** MCPWM_GEN0_B_UTEB : R/W; bitpos: [7:6]; default: 0;
+ *  Action on PWM0B triggered by event TEB when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_UTEB    0x00000003U
+#define MCPWM_GEN0_B_UTEB_M  (MCPWM_GEN0_B_UTEB_V << MCPWM_GEN0_B_UTEB_S)
+#define MCPWM_GEN0_B_UTEB_V  0x00000003U
+#define MCPWM_GEN0_B_UTEB_S  6
+/** MCPWM_GEN0_B_UT0 : R/W; bitpos: [9:8]; default: 0;
+ *  Action on PWM0B triggered by event_t0 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_UT0    0x00000003U
+#define MCPWM_GEN0_B_UT0_M  (MCPWM_GEN0_B_UT0_V << MCPWM_GEN0_B_UT0_S)
+#define MCPWM_GEN0_B_UT0_V  0x00000003U
+#define MCPWM_GEN0_B_UT0_S  8
+/** MCPWM_GEN0_B_UT1 : R/W; bitpos: [11:10]; default: 0;
+ *  Action on PWM0B triggered by event_t1 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_UT1    0x00000003U
+#define MCPWM_GEN0_B_UT1_M  (MCPWM_GEN0_B_UT1_V << MCPWM_GEN0_B_UT1_S)
+#define MCPWM_GEN0_B_UT1_V  0x00000003U
+#define MCPWM_GEN0_B_UT1_S  10
+/** MCPWM_GEN0_B_DTEZ : R/W; bitpos: [13:12]; default: 0;
+ *  Action on PWM0B triggered by event TEZ when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_DTEZ    0x00000003U
+#define MCPWM_GEN0_B_DTEZ_M  (MCPWM_GEN0_B_DTEZ_V << MCPWM_GEN0_B_DTEZ_S)
+#define MCPWM_GEN0_B_DTEZ_V  0x00000003U
+#define MCPWM_GEN0_B_DTEZ_S  12
+/** MCPWM_GEN0_B_DTEP : R/W; bitpos: [15:14]; default: 0;
+ *  Action on PWM0B triggered by event TEP when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_DTEP    0x00000003U
+#define MCPWM_GEN0_B_DTEP_M  (MCPWM_GEN0_B_DTEP_V << MCPWM_GEN0_B_DTEP_S)
+#define MCPWM_GEN0_B_DTEP_V  0x00000003U
+#define MCPWM_GEN0_B_DTEP_S  14
+/** MCPWM_GEN0_B_DTEA : R/W; bitpos: [17:16]; default: 0;
+ *  Action on PWM0B triggered by event TEA when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_DTEA    0x00000003U
+#define MCPWM_GEN0_B_DTEA_M  (MCPWM_GEN0_B_DTEA_V << MCPWM_GEN0_B_DTEA_S)
+#define MCPWM_GEN0_B_DTEA_V  0x00000003U
+#define MCPWM_GEN0_B_DTEA_S  16
+/** MCPWM_GEN0_B_DTEB : R/W; bitpos: [19:18]; default: 0;
+ *  Action on PWM0B triggered by event TEB when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_DTEB    0x00000003U
+#define MCPWM_GEN0_B_DTEB_M  (MCPWM_GEN0_B_DTEB_V << MCPWM_GEN0_B_DTEB_S)
+#define MCPWM_GEN0_B_DTEB_V  0x00000003U
+#define MCPWM_GEN0_B_DTEB_S  18
+/** MCPWM_GEN0_B_DT0 : R/W; bitpos: [21:20]; default: 0;
+ *  Action on PWM0B triggered by event_t0 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_DT0    0x00000003U
+#define MCPWM_GEN0_B_DT0_M  (MCPWM_GEN0_B_DT0_V << MCPWM_GEN0_B_DT0_S)
+#define MCPWM_GEN0_B_DT0_V  0x00000003U
+#define MCPWM_GEN0_B_DT0_S  20
+/** MCPWM_GEN0_B_DT1 : R/W; bitpos: [23:22]; default: 0;
+ *  Action on PWM0B triggered by event_t1 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN0_B_DT1    0x00000003U
+#define MCPWM_GEN0_B_DT1_M  (MCPWM_GEN0_B_DT1_V << MCPWM_GEN0_B_DT1_S)
+#define MCPWM_GEN0_B_DT1_V  0x00000003U
+#define MCPWM_GEN0_B_DT1_S  22
+
+/** MCPWM_DT0_CFG_REG register
+ *  PWM generator 0 dead time type selection and configuration
+ */
+#define MCPWM_DT0_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x58)
+/** MCPWM_DT0_FED_UPMETHOD : R/W; bitpos: [3:0]; default: 0;
+ *  Update method for FED (rising edge delay) active register. 0: immediate, when bit0
+ *  is set to 1: tez, when bit1 is set to 1:tep,  when bit2 is set to 1: sync, when
+ *  bit3 is set to 1: disable the update
+ */
+#define MCPWM_DT0_FED_UPMETHOD    0x0000000FU
+#define MCPWM_DT0_FED_UPMETHOD_M  (MCPWM_DT0_FED_UPMETHOD_V << MCPWM_DT0_FED_UPMETHOD_S)
+#define MCPWM_DT0_FED_UPMETHOD_V  0x0000000FU
+#define MCPWM_DT0_FED_UPMETHOD_S  0
+/** MCPWM_DT0_RED_UPMETHOD : R/W; bitpos: [7:4]; default: 0;
+ *  Update method for RED (rising edge delay) active register. 0: immediate, when bit0
+ *  is set to 1: tez, when bit1 is set to 1:tep,  when bit2 is set to 1: sync, when
+ *  bit3 is set to 1: disable the update
+ */
+#define MCPWM_DT0_RED_UPMETHOD    0x0000000FU
+#define MCPWM_DT0_RED_UPMETHOD_M  (MCPWM_DT0_RED_UPMETHOD_V << MCPWM_DT0_RED_UPMETHOD_S)
+#define MCPWM_DT0_RED_UPMETHOD_V  0x0000000FU
+#define MCPWM_DT0_RED_UPMETHOD_S  4
+/** MCPWM_DT0_DEB_MODE : R/W; bitpos: [8]; default: 0;
+ *  S8 in table, dual-edge B mode, 0: fed/red take effect on different path separately,
+ *  1: fed/red take effect on B path, A out is in bypass or dulpB mode
+ */
+#define MCPWM_DT0_DEB_MODE    (BIT(8))
+#define MCPWM_DT0_DEB_MODE_M  (MCPWM_DT0_DEB_MODE_V << MCPWM_DT0_DEB_MODE_S)
+#define MCPWM_DT0_DEB_MODE_V  0x00000001U
+#define MCPWM_DT0_DEB_MODE_S  8
+/** MCPWM_DT0_A_OUTSWAP : R/W; bitpos: [9]; default: 0;
+ *  S6 in table
+ */
+#define MCPWM_DT0_A_OUTSWAP    (BIT(9))
+#define MCPWM_DT0_A_OUTSWAP_M  (MCPWM_DT0_A_OUTSWAP_V << MCPWM_DT0_A_OUTSWAP_S)
+#define MCPWM_DT0_A_OUTSWAP_V  0x00000001U
+#define MCPWM_DT0_A_OUTSWAP_S  9
+/** MCPWM_DT0_B_OUTSWAP : R/W; bitpos: [10]; default: 0;
+ *  S7 in table
+ */
+#define MCPWM_DT0_B_OUTSWAP    (BIT(10))
+#define MCPWM_DT0_B_OUTSWAP_M  (MCPWM_DT0_B_OUTSWAP_V << MCPWM_DT0_B_OUTSWAP_S)
+#define MCPWM_DT0_B_OUTSWAP_V  0x00000001U
+#define MCPWM_DT0_B_OUTSWAP_S  10
+/** MCPWM_DT0_RED_INSEL : R/W; bitpos: [11]; default: 0;
+ *  S4 in table
+ */
+#define MCPWM_DT0_RED_INSEL    (BIT(11))
+#define MCPWM_DT0_RED_INSEL_M  (MCPWM_DT0_RED_INSEL_V << MCPWM_DT0_RED_INSEL_S)
+#define MCPWM_DT0_RED_INSEL_V  0x00000001U
+#define MCPWM_DT0_RED_INSEL_S  11
+/** MCPWM_DT0_FED_INSEL : R/W; bitpos: [12]; default: 0;
+ *  S5 in table
+ */
+#define MCPWM_DT0_FED_INSEL    (BIT(12))
+#define MCPWM_DT0_FED_INSEL_M  (MCPWM_DT0_FED_INSEL_V << MCPWM_DT0_FED_INSEL_S)
+#define MCPWM_DT0_FED_INSEL_V  0x00000001U
+#define MCPWM_DT0_FED_INSEL_S  12
+/** MCPWM_DT0_RED_OUTINVERT : R/W; bitpos: [13]; default: 0;
+ *  S2 in table
+ */
+#define MCPWM_DT0_RED_OUTINVERT    (BIT(13))
+#define MCPWM_DT0_RED_OUTINVERT_M  (MCPWM_DT0_RED_OUTINVERT_V << MCPWM_DT0_RED_OUTINVERT_S)
+#define MCPWM_DT0_RED_OUTINVERT_V  0x00000001U
+#define MCPWM_DT0_RED_OUTINVERT_S  13
+/** MCPWM_DT0_FED_OUTINVERT : R/W; bitpos: [14]; default: 0;
+ *  S3 in table
+ */
+#define MCPWM_DT0_FED_OUTINVERT    (BIT(14))
+#define MCPWM_DT0_FED_OUTINVERT_M  (MCPWM_DT0_FED_OUTINVERT_V << MCPWM_DT0_FED_OUTINVERT_S)
+#define MCPWM_DT0_FED_OUTINVERT_V  0x00000001U
+#define MCPWM_DT0_FED_OUTINVERT_S  14
+/** MCPWM_DT0_A_OUTBYPASS : R/W; bitpos: [15]; default: 1;
+ *  S1 in table
+ */
+#define MCPWM_DT0_A_OUTBYPASS    (BIT(15))
+#define MCPWM_DT0_A_OUTBYPASS_M  (MCPWM_DT0_A_OUTBYPASS_V << MCPWM_DT0_A_OUTBYPASS_S)
+#define MCPWM_DT0_A_OUTBYPASS_V  0x00000001U
+#define MCPWM_DT0_A_OUTBYPASS_S  15
+/** MCPWM_DT0_B_OUTBYPASS : R/W; bitpos: [16]; default: 1;
+ *  S0 in table
+ */
+#define MCPWM_DT0_B_OUTBYPASS    (BIT(16))
+#define MCPWM_DT0_B_OUTBYPASS_M  (MCPWM_DT0_B_OUTBYPASS_V << MCPWM_DT0_B_OUTBYPASS_S)
+#define MCPWM_DT0_B_OUTBYPASS_V  0x00000001U
+#define MCPWM_DT0_B_OUTBYPASS_S  16
+/** MCPWM_DT0_CLK_SEL : R/W; bitpos: [17]; default: 0;
+ *  Dead time clock selection. 0: PWM_clk, 1: PT_clk
+ */
+#define MCPWM_DT0_CLK_SEL    (BIT(17))
+#define MCPWM_DT0_CLK_SEL_M  (MCPWM_DT0_CLK_SEL_V << MCPWM_DT0_CLK_SEL_S)
+#define MCPWM_DT0_CLK_SEL_V  0x00000001U
+#define MCPWM_DT0_CLK_SEL_S  17
+
+/** MCPWM_DT0_FED_CFG_REG register
+ *  PWM generator 0 shadow register for falling edge delay (FED).
+ */
+#define MCPWM_DT0_FED_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x5c)
+/** MCPWM_DT0_FED : R/W; bitpos: [15:0]; default: 0;
+ *  Shadow register for FED
+ */
+#define MCPWM_DT0_FED    0x0000FFFFU
+#define MCPWM_DT0_FED_M  (MCPWM_DT0_FED_V << MCPWM_DT0_FED_S)
+#define MCPWM_DT0_FED_V  0x0000FFFFU
+#define MCPWM_DT0_FED_S  0
+
+/** MCPWM_DT0_RED_CFG_REG register
+ *  PWM generator 0 shadow register for rising edge delay (RED).
+ */
+#define MCPWM_DT0_RED_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x60)
+/** MCPWM_DT0_RED : R/W; bitpos: [15:0]; default: 0;
+ *  Shadow register for RED
+ */
+#define MCPWM_DT0_RED    0x0000FFFFU
+#define MCPWM_DT0_RED_M  (MCPWM_DT0_RED_V << MCPWM_DT0_RED_S)
+#define MCPWM_DT0_RED_V  0x0000FFFFU
+#define MCPWM_DT0_RED_S  0
+
+/** MCPWM_CARRIER0_CFG_REG register
+ *  PWM generator 0 carrier enable and configuratoin
+ */
+#define MCPWM_CARRIER0_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x64)
+/** MCPWM_CARRIER0_EN : R/W; bitpos: [0]; default: 0;
+ *  When set, carrier0 function is enabled. When cleared, carrier0 is bypassed
+ */
+#define MCPWM_CARRIER0_EN    (BIT(0))
+#define MCPWM_CARRIER0_EN_M  (MCPWM_CARRIER0_EN_V << MCPWM_CARRIER0_EN_S)
+#define MCPWM_CARRIER0_EN_V  0x00000001U
+#define MCPWM_CARRIER0_EN_S  0
+/** MCPWM_CARRIER0_PRESCALE : R/W; bitpos: [4:1]; default: 0;
+ *  PWM carrier0 clock (PC_clk) prescale value. Period of PC_clk = period of PWM_clk *
+ *  (PWM_CARRIER0_PRESCALE + 1)
+ */
+#define MCPWM_CARRIER0_PRESCALE    0x0000000FU
+#define MCPWM_CARRIER0_PRESCALE_M  (MCPWM_CARRIER0_PRESCALE_V << MCPWM_CARRIER0_PRESCALE_S)
+#define MCPWM_CARRIER0_PRESCALE_V  0x0000000FU
+#define MCPWM_CARRIER0_PRESCALE_S  1
+/** MCPWM_CARRIER0_DUTY : R/W; bitpos: [7:5]; default: 0;
+ *  carrier duty selection. Duty = PWM_CARRIER0_DUTY / 8
+ */
+#define MCPWM_CARRIER0_DUTY    0x00000007U
+#define MCPWM_CARRIER0_DUTY_M  (MCPWM_CARRIER0_DUTY_V << MCPWM_CARRIER0_DUTY_S)
+#define MCPWM_CARRIER0_DUTY_V  0x00000007U
+#define MCPWM_CARRIER0_DUTY_S  5
+/** MCPWM_CARRIER0_OSHTWTH : R/W; bitpos: [11:8]; default: 0;
+ *  width of the first pulse in number of periods of the carrier
+ */
+#define MCPWM_CARRIER0_OSHTWTH    0x0000000FU
+#define MCPWM_CARRIER0_OSHTWTH_M  (MCPWM_CARRIER0_OSHTWTH_V << MCPWM_CARRIER0_OSHTWTH_S)
+#define MCPWM_CARRIER0_OSHTWTH_V  0x0000000FU
+#define MCPWM_CARRIER0_OSHTWTH_S  8
+/** MCPWM_CARRIER0_OUT_INVERT : R/W; bitpos: [12]; default: 0;
+ *  when set, invert the output of PWM0A and PWM0B for this submodule
+ */
+#define MCPWM_CARRIER0_OUT_INVERT    (BIT(12))
+#define MCPWM_CARRIER0_OUT_INVERT_M  (MCPWM_CARRIER0_OUT_INVERT_V << MCPWM_CARRIER0_OUT_INVERT_S)
+#define MCPWM_CARRIER0_OUT_INVERT_V  0x00000001U
+#define MCPWM_CARRIER0_OUT_INVERT_S  12
+/** MCPWM_CARRIER0_IN_INVERT : R/W; bitpos: [13]; default: 0;
+ *  when set, invert the input of PWM0A and PWM0B for this submodule
+ */
+#define MCPWM_CARRIER0_IN_INVERT    (BIT(13))
+#define MCPWM_CARRIER0_IN_INVERT_M  (MCPWM_CARRIER0_IN_INVERT_V << MCPWM_CARRIER0_IN_INVERT_S)
+#define MCPWM_CARRIER0_IN_INVERT_V  0x00000001U
+#define MCPWM_CARRIER0_IN_INVERT_S  13
+
+/** MCPWM_FH0_CFG0_REG register
+ *  Actions on PWM0A and PWM0B trip events
+ */
+#define MCPWM_FH0_CFG0_REG(i) (DR_REG_MCPWM_BASE(i) + 0x68)
+/** MCPWM_FH0_SW_CBC : R/W; bitpos: [0]; default: 0;
+ *  Enable register for software force cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH0_SW_CBC    (BIT(0))
+#define MCPWM_FH0_SW_CBC_M  (MCPWM_FH0_SW_CBC_V << MCPWM_FH0_SW_CBC_S)
+#define MCPWM_FH0_SW_CBC_V  0x00000001U
+#define MCPWM_FH0_SW_CBC_S  0
+/** MCPWM_FH0_F2_CBC : R/W; bitpos: [1]; default: 0;
+ *  fault_event2 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH0_F2_CBC    (BIT(1))
+#define MCPWM_FH0_F2_CBC_M  (MCPWM_FH0_F2_CBC_V << MCPWM_FH0_F2_CBC_S)
+#define MCPWM_FH0_F2_CBC_V  0x00000001U
+#define MCPWM_FH0_F2_CBC_S  1
+/** MCPWM_FH0_F1_CBC : R/W; bitpos: [2]; default: 0;
+ *  fault_event1 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH0_F1_CBC    (BIT(2))
+#define MCPWM_FH0_F1_CBC_M  (MCPWM_FH0_F1_CBC_V << MCPWM_FH0_F1_CBC_S)
+#define MCPWM_FH0_F1_CBC_V  0x00000001U
+#define MCPWM_FH0_F1_CBC_S  2
+/** MCPWM_FH0_F0_CBC : R/W; bitpos: [3]; default: 0;
+ *  fault_event0 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH0_F0_CBC    (BIT(3))
+#define MCPWM_FH0_F0_CBC_M  (MCPWM_FH0_F0_CBC_V << MCPWM_FH0_F0_CBC_S)
+#define MCPWM_FH0_F0_CBC_V  0x00000001U
+#define MCPWM_FH0_F0_CBC_S  3
+/** MCPWM_FH0_SW_OST : R/W; bitpos: [4]; default: 0;
+ *  Enable register for software force one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH0_SW_OST    (BIT(4))
+#define MCPWM_FH0_SW_OST_M  (MCPWM_FH0_SW_OST_V << MCPWM_FH0_SW_OST_S)
+#define MCPWM_FH0_SW_OST_V  0x00000001U
+#define MCPWM_FH0_SW_OST_S  4
+/** MCPWM_FH0_F2_OST : R/W; bitpos: [5]; default: 0;
+ *  fault_event2 will trigger one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH0_F2_OST    (BIT(5))
+#define MCPWM_FH0_F2_OST_M  (MCPWM_FH0_F2_OST_V << MCPWM_FH0_F2_OST_S)
+#define MCPWM_FH0_F2_OST_V  0x00000001U
+#define MCPWM_FH0_F2_OST_S  5
+/** MCPWM_FH0_F1_OST : R/W; bitpos: [6]; default: 0;
+ *  fault_event1 will trigger one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH0_F1_OST    (BIT(6))
+#define MCPWM_FH0_F1_OST_M  (MCPWM_FH0_F1_OST_V << MCPWM_FH0_F1_OST_S)
+#define MCPWM_FH0_F1_OST_V  0x00000001U
+#define MCPWM_FH0_F1_OST_S  6
+/** MCPWM_FH0_F0_OST : R/W; bitpos: [7]; default: 0;
+ *  fault_event0 will trigger one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH0_F0_OST    (BIT(7))
+#define MCPWM_FH0_F0_OST_M  (MCPWM_FH0_F0_OST_V << MCPWM_FH0_F0_OST_S)
+#define MCPWM_FH0_F0_OST_V  0x00000001U
+#define MCPWM_FH0_F0_OST_S  7
+/** MCPWM_FH0_A_CBC_D : R/W; bitpos: [9:8]; default: 0;
+ *  Cycle-by-cycle mode action on PWM0A when fault event occurs and timer is
+ *  decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH0_A_CBC_D    0x00000003U
+#define MCPWM_FH0_A_CBC_D_M  (MCPWM_FH0_A_CBC_D_V << MCPWM_FH0_A_CBC_D_S)
+#define MCPWM_FH0_A_CBC_D_V  0x00000003U
+#define MCPWM_FH0_A_CBC_D_S  8
+/** MCPWM_FH0_A_CBC_U : R/W; bitpos: [11:10]; default: 0;
+ *  Cycle-by-cycle mode action on PWM0A when fault event occurs and timer is
+ *  increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH0_A_CBC_U    0x00000003U
+#define MCPWM_FH0_A_CBC_U_M  (MCPWM_FH0_A_CBC_U_V << MCPWM_FH0_A_CBC_U_S)
+#define MCPWM_FH0_A_CBC_U_V  0x00000003U
+#define MCPWM_FH0_A_CBC_U_S  10
+/** MCPWM_FH0_A_OST_D : R/W; bitpos: [13:12]; default: 0;
+ *  One-shot mode action on PWM0A when fault event occurs and timer is decreasing. 0:
+ *  do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH0_A_OST_D    0x00000003U
+#define MCPWM_FH0_A_OST_D_M  (MCPWM_FH0_A_OST_D_V << MCPWM_FH0_A_OST_D_S)
+#define MCPWM_FH0_A_OST_D_V  0x00000003U
+#define MCPWM_FH0_A_OST_D_S  12
+/** MCPWM_FH0_A_OST_U : R/W; bitpos: [15:14]; default: 0;
+ *  One-shot mode action on PWM0A when fault event occurs and timer is increasing. 0:
+ *  do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH0_A_OST_U    0x00000003U
+#define MCPWM_FH0_A_OST_U_M  (MCPWM_FH0_A_OST_U_V << MCPWM_FH0_A_OST_U_S)
+#define MCPWM_FH0_A_OST_U_V  0x00000003U
+#define MCPWM_FH0_A_OST_U_S  14
+/** MCPWM_FH0_B_CBC_D : R/W; bitpos: [17:16]; default: 0;
+ *  Cycle-by-cycle mode action on PWM0B when fault event occurs and timer is
+ *  decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH0_B_CBC_D    0x00000003U
+#define MCPWM_FH0_B_CBC_D_M  (MCPWM_FH0_B_CBC_D_V << MCPWM_FH0_B_CBC_D_S)
+#define MCPWM_FH0_B_CBC_D_V  0x00000003U
+#define MCPWM_FH0_B_CBC_D_S  16
+/** MCPWM_FH0_B_CBC_U : R/W; bitpos: [19:18]; default: 0;
+ *  Cycle-by-cycle mode action on PWM0B when fault event occurs and timer is
+ *  increasing. 0: do nothing,1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH0_B_CBC_U    0x00000003U
+#define MCPWM_FH0_B_CBC_U_M  (MCPWM_FH0_B_CBC_U_V << MCPWM_FH0_B_CBC_U_S)
+#define MCPWM_FH0_B_CBC_U_V  0x00000003U
+#define MCPWM_FH0_B_CBC_U_S  18
+/** MCPWM_FH0_B_OST_D : R/W; bitpos: [21:20]; default: 0;
+ *  One-shot mode action on PWM0B when fault event occurs and timer is decreasing. 0:
+ *  do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH0_B_OST_D    0x00000003U
+#define MCPWM_FH0_B_OST_D_M  (MCPWM_FH0_B_OST_D_V << MCPWM_FH0_B_OST_D_S)
+#define MCPWM_FH0_B_OST_D_V  0x00000003U
+#define MCPWM_FH0_B_OST_D_S  20
+/** MCPWM_FH0_B_OST_U : R/W; bitpos: [23:22]; default: 0;
+ *  One-shot mode action on PWM0B when fault event occurs and timer is increasing. 0:
+ *  do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH0_B_OST_U    0x00000003U
+#define MCPWM_FH0_B_OST_U_M  (MCPWM_FH0_B_OST_U_V << MCPWM_FH0_B_OST_U_S)
+#define MCPWM_FH0_B_OST_U_V  0x00000003U
+#define MCPWM_FH0_B_OST_U_S  22
+
+/** MCPWM_FH0_CFG1_REG register
+ *  Software triggers for fault handler actions
+ */
+#define MCPWM_FH0_CFG1_REG(i) (DR_REG_MCPWM_BASE(i) + 0x6c)
+/** MCPWM_FH0_CLR_OST : R/W; bitpos: [0]; default: 0;
+ *  a rising edge will clear on going one-shot mode action
+ */
+#define MCPWM_FH0_CLR_OST    (BIT(0))
+#define MCPWM_FH0_CLR_OST_M  (MCPWM_FH0_CLR_OST_V << MCPWM_FH0_CLR_OST_S)
+#define MCPWM_FH0_CLR_OST_V  0x00000001U
+#define MCPWM_FH0_CLR_OST_S  0
+/** MCPWM_FH0_CBCPULSE : R/W; bitpos: [2:1]; default: 0;
+ *  cycle-by-cycle mode action refresh moment selection. When bit0 is set to 1: TEZ,
+ *  when bit1 is set to 1:TEP, when bit0 and bit1 both set to 0: stop refresh, when
+ *  bit0 and bit1 both set to 1: refresh at TEP/TEZ
+ */
+#define MCPWM_FH0_CBCPULSE    0x00000003U
+#define MCPWM_FH0_CBCPULSE_M  (MCPWM_FH0_CBCPULSE_V << MCPWM_FH0_CBCPULSE_S)
+#define MCPWM_FH0_CBCPULSE_V  0x00000003U
+#define MCPWM_FH0_CBCPULSE_S  1
+/** MCPWM_FH0_FORCE_CBC : R/W; bitpos: [3]; default: 0;
+ *  a toggle trigger a cycle-by-cycle mode action
+ */
+#define MCPWM_FH0_FORCE_CBC    (BIT(3))
+#define MCPWM_FH0_FORCE_CBC_M  (MCPWM_FH0_FORCE_CBC_V << MCPWM_FH0_FORCE_CBC_S)
+#define MCPWM_FH0_FORCE_CBC_V  0x00000001U
+#define MCPWM_FH0_FORCE_CBC_S  3
+/** MCPWM_FH0_FORCE_OST : R/W; bitpos: [4]; default: 0;
+ *  a toggle (software negate its value) triggers a one-shot mode action
+ */
+#define MCPWM_FH0_FORCE_OST    (BIT(4))
+#define MCPWM_FH0_FORCE_OST_M  (MCPWM_FH0_FORCE_OST_V << MCPWM_FH0_FORCE_OST_S)
+#define MCPWM_FH0_FORCE_OST_V  0x00000001U
+#define MCPWM_FH0_FORCE_OST_S  4
+
+/** MCPWM_FH0_STATUS_REG register
+ *  Status of fault events.
+ */
+#define MCPWM_FH0_STATUS_REG(i) (DR_REG_MCPWM_BASE(i) + 0x70)
+/** MCPWM_FH0_CBC_ON : RO; bitpos: [0]; default: 0;
+ *  Set and reset by hardware. If set, a cycle-by-cycle mode action is on going
+ */
+#define MCPWM_FH0_CBC_ON    (BIT(0))
+#define MCPWM_FH0_CBC_ON_M  (MCPWM_FH0_CBC_ON_V << MCPWM_FH0_CBC_ON_S)
+#define MCPWM_FH0_CBC_ON_V  0x00000001U
+#define MCPWM_FH0_CBC_ON_S  0
+/** MCPWM_FH0_OST_ON : RO; bitpos: [1]; default: 0;
+ *  Set and reset by hardware. If set, an one-shot mode action is on going
+ */
+#define MCPWM_FH0_OST_ON    (BIT(1))
+#define MCPWM_FH0_OST_ON_M  (MCPWM_FH0_OST_ON_V << MCPWM_FH0_OST_ON_S)
+#define MCPWM_FH0_OST_ON_V  0x00000001U
+#define MCPWM_FH0_OST_ON_S  1
+
+/** MCPWM_GEN1_STMP_CFG_REG register
+ *  Transfer status and update method for time stamp registers A and B
+ */
+#define MCPWM_GEN1_STMP_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x74)
+/** MCPWM_GEN1_A_UPMETHOD : R/W; bitpos: [3:0]; default: 0;
+ *  Update method for PWM generator 1 time stamp A's active register. When all bits are
+ *  set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when
+ *  bit2 is set to 1: sync, when bit3 is set to 1: disable the update.
+ */
+#define MCPWM_GEN1_A_UPMETHOD    0x0000000FU
+#define MCPWM_GEN1_A_UPMETHOD_M  (MCPWM_GEN1_A_UPMETHOD_V << MCPWM_GEN1_A_UPMETHOD_S)
+#define MCPWM_GEN1_A_UPMETHOD_V  0x0000000FU
+#define MCPWM_GEN1_A_UPMETHOD_S  0
+/** MCPWM_GEN1_B_UPMETHOD : R/W; bitpos: [7:4]; default: 0;
+ *  Update method for PWM generator 1 time stamp B's active register. When all bits are
+ *  set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when
+ *  bit2 is set to 1: sync, when bit3 is set to 1: disable the update.
+ */
+#define MCPWM_GEN1_B_UPMETHOD    0x0000000FU
+#define MCPWM_GEN1_B_UPMETHOD_M  (MCPWM_GEN1_B_UPMETHOD_V << MCPWM_GEN1_B_UPMETHOD_S)
+#define MCPWM_GEN1_B_UPMETHOD_V  0x0000000FU
+#define MCPWM_GEN1_B_UPMETHOD_S  4
+/** MCPWM_GEN1_A_SHDW_FULL : R/W/WTC/SC; bitpos: [8]; default: 0;
+ *  Set and reset by hardware. If set, PWM generator 1 time stamp A's shadow reg is
+ *  filled and waiting to be transferred to A's active reg. If cleared, A's active reg
+ *  has been updated with shadow register latest value
+ */
+#define MCPWM_GEN1_A_SHDW_FULL    (BIT(8))
+#define MCPWM_GEN1_A_SHDW_FULL_M  (MCPWM_GEN1_A_SHDW_FULL_V << MCPWM_GEN1_A_SHDW_FULL_S)
+#define MCPWM_GEN1_A_SHDW_FULL_V  0x00000001U
+#define MCPWM_GEN1_A_SHDW_FULL_S  8
+/** MCPWM_GEN1_B_SHDW_FULL : R/W/WTC/SC; bitpos: [9]; default: 0;
+ *  Set and reset by hardware. If set, PWM generator 1 time stamp B's shadow reg is
+ *  filled and waiting to be transferred to B's active reg. If cleared, B's active reg
+ *  has been updated with shadow register latest value
+ */
+#define MCPWM_GEN1_B_SHDW_FULL    (BIT(9))
+#define MCPWM_GEN1_B_SHDW_FULL_M  (MCPWM_GEN1_B_SHDW_FULL_V << MCPWM_GEN1_B_SHDW_FULL_S)
+#define MCPWM_GEN1_B_SHDW_FULL_V  0x00000001U
+#define MCPWM_GEN1_B_SHDW_FULL_S  9
+
+/** MCPWM_GEN1_TSTMP_A_REG register
+ *  PWM generator 1 shadow register for timer stamp A.
+ */
+#define MCPWM_GEN1_TSTMP_A_REG(i) (DR_REG_MCPWM_BASE(i) + 0x78)
+/** MCPWM_GEN1_A : R/W; bitpos: [15:0]; default: 0;
+ *  PWM generator 1 time stamp A's shadow register
+ */
+#define MCPWM_GEN1_A    0x0000FFFFU
+#define MCPWM_GEN1_A_M  (MCPWM_GEN1_A_V << MCPWM_GEN1_A_S)
+#define MCPWM_GEN1_A_V  0x0000FFFFU
+#define MCPWM_GEN1_A_S  0
+
+/** MCPWM_GEN1_TSTMP_B_REG register
+ *  PWM generator 1 shadow register for timer stamp B.
+ */
+#define MCPWM_GEN1_TSTMP_B_REG(i) (DR_REG_MCPWM_BASE(i) + 0x7c)
+/** MCPWM_GEN1_B : R/W; bitpos: [15:0]; default: 0;
+ *  PWM generator 1 time stamp B's shadow register
+ */
+#define MCPWM_GEN1_B    0x0000FFFFU
+#define MCPWM_GEN1_B_M  (MCPWM_GEN1_B_V << MCPWM_GEN1_B_S)
+#define MCPWM_GEN1_B_V  0x0000FFFFU
+#define MCPWM_GEN1_B_S  0
+
+/** MCPWM_GEN1_CFG0_REG register
+ *  PWM generator 1 event T0 and T1 handling
+ */
+#define MCPWM_GEN1_CFG0_REG(i) (DR_REG_MCPWM_BASE(i) + 0x80)
+/** MCPWM_GEN1_CFG_UPMETHOD : R/W; bitpos: [3:0]; default: 0;
+ *  Update method for PWM generator 1's active register of configuration. When all bits
+ *  are set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to
+ *  1:sync;when bit3 is set to 1:disable the update.
+ */
+#define MCPWM_GEN1_CFG_UPMETHOD    0x0000000FU
+#define MCPWM_GEN1_CFG_UPMETHOD_M  (MCPWM_GEN1_CFG_UPMETHOD_V << MCPWM_GEN1_CFG_UPMETHOD_S)
+#define MCPWM_GEN1_CFG_UPMETHOD_V  0x0000000FU
+#define MCPWM_GEN1_CFG_UPMETHOD_S  0
+/** MCPWM_GEN1_T0_SEL : R/W; bitpos: [6:4]; default: 0;
+ *  Source selection for PWM generator 1 event_t0, take effect immediately, 0:
+ *  fault_event0, 1: fault_event1, 2: fault_event2, 3: sync_taken, 4: none
+ */
+#define MCPWM_GEN1_T0_SEL    0x00000007U
+#define MCPWM_GEN1_T0_SEL_M  (MCPWM_GEN1_T0_SEL_V << MCPWM_GEN1_T0_SEL_S)
+#define MCPWM_GEN1_T0_SEL_V  0x00000007U
+#define MCPWM_GEN1_T0_SEL_S  4
+/** MCPWM_GEN1_T1_SEL : R/W; bitpos: [9:7]; default: 0;
+ *  Source selection for PWM generator 1 event_t1, take effect immediately, 0:
+ *  fault_event0, 1: fault_event1, 2: fault_event2, 3: sync_taken, 4: none
+ */
+#define MCPWM_GEN1_T1_SEL    0x00000007U
+#define MCPWM_GEN1_T1_SEL_M  (MCPWM_GEN1_T1_SEL_V << MCPWM_GEN1_T1_SEL_S)
+#define MCPWM_GEN1_T1_SEL_V  0x00000007U
+#define MCPWM_GEN1_T1_SEL_S  7
+
+/** MCPWM_GEN1_FORCE_REG register
+ *  Permissives to force PWM1A and PWM1B outputs by software
+ */
+#define MCPWM_GEN1_FORCE_REG(i) (DR_REG_MCPWM_BASE(i) + 0x84)
+/** MCPWM_GEN1_CNTUFORCE_UPMETHOD : R/W; bitpos: [5:0]; default: 32;
+ *  Updating method for continuous software force of PWM generator 1. When all bits are
+ *  set to 0: immediately, when bit0 is set to 1: TEZ,when bit1 is set to 1: TEP, when
+ *  bit2 is set to 1: TEA, when bit3 is set to 1: TEB, when bit4 is set to 1: sync,
+ *  when bit5 is set to 1: disable update. (TEA/B here and below means an event
+ *  generated when the timer's value equals to that of register A/B.)
+ */
+#define MCPWM_GEN1_CNTUFORCE_UPMETHOD    0x0000003FU
+#define MCPWM_GEN1_CNTUFORCE_UPMETHOD_M  (MCPWM_GEN1_CNTUFORCE_UPMETHOD_V << MCPWM_GEN1_CNTUFORCE_UPMETHOD_S)
+#define MCPWM_GEN1_CNTUFORCE_UPMETHOD_V  0x0000003FU
+#define MCPWM_GEN1_CNTUFORCE_UPMETHOD_S  0
+/** MCPWM_GEN1_A_CNTUFORCE_MODE : R/W; bitpos: [7:6]; default: 0;
+ *  Continuous software force mode for PWM1A. 0: disabled, 1: low, 2: high, 3: disabled
+ */
+#define MCPWM_GEN1_A_CNTUFORCE_MODE    0x00000003U
+#define MCPWM_GEN1_A_CNTUFORCE_MODE_M  (MCPWM_GEN1_A_CNTUFORCE_MODE_V << MCPWM_GEN1_A_CNTUFORCE_MODE_S)
+#define MCPWM_GEN1_A_CNTUFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN1_A_CNTUFORCE_MODE_S  6
+/** MCPWM_GEN1_B_CNTUFORCE_MODE : R/W; bitpos: [9:8]; default: 0;
+ *  Continuous software force mode for PWM1B. 0: disabled, 1: low, 2: high, 3: disabled
+ */
+#define MCPWM_GEN1_B_CNTUFORCE_MODE    0x00000003U
+#define MCPWM_GEN1_B_CNTUFORCE_MODE_M  (MCPWM_GEN1_B_CNTUFORCE_MODE_V << MCPWM_GEN1_B_CNTUFORCE_MODE_S)
+#define MCPWM_GEN1_B_CNTUFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN1_B_CNTUFORCE_MODE_S  8
+/** MCPWM_GEN1_A_NCIFORCE : R/W; bitpos: [10]; default: 0;
+ *  Trigger of non-continuous immediate software-force event for PWM1A, a toggle will
+ *  trigger a force event.
+ */
+#define MCPWM_GEN1_A_NCIFORCE    (BIT(10))
+#define MCPWM_GEN1_A_NCIFORCE_M  (MCPWM_GEN1_A_NCIFORCE_V << MCPWM_GEN1_A_NCIFORCE_S)
+#define MCPWM_GEN1_A_NCIFORCE_V  0x00000001U
+#define MCPWM_GEN1_A_NCIFORCE_S  10
+/** MCPWM_GEN1_A_NCIFORCE_MODE : R/W; bitpos: [12:11]; default: 0;
+ *  non-continuous immediate software force mode for PWM1A, 0: disabled, 1: low, 2:
+ *  high, 3: disabled
+ */
+#define MCPWM_GEN1_A_NCIFORCE_MODE    0x00000003U
+#define MCPWM_GEN1_A_NCIFORCE_MODE_M  (MCPWM_GEN1_A_NCIFORCE_MODE_V << MCPWM_GEN1_A_NCIFORCE_MODE_S)
+#define MCPWM_GEN1_A_NCIFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN1_A_NCIFORCE_MODE_S  11
+/** MCPWM_GEN1_B_NCIFORCE : R/W; bitpos: [13]; default: 0;
+ *  Trigger of non-continuous immediate software-force event for PWM1B, a toggle will
+ *  trigger a force event.
+ */
+#define MCPWM_GEN1_B_NCIFORCE    (BIT(13))
+#define MCPWM_GEN1_B_NCIFORCE_M  (MCPWM_GEN1_B_NCIFORCE_V << MCPWM_GEN1_B_NCIFORCE_S)
+#define MCPWM_GEN1_B_NCIFORCE_V  0x00000001U
+#define MCPWM_GEN1_B_NCIFORCE_S  13
+/** MCPWM_GEN1_B_NCIFORCE_MODE : R/W; bitpos: [15:14]; default: 0;
+ *  non-continuous immediate software force mode for PWM1B, 0: disabled, 1: low, 2:
+ *  high, 3: disabled
+ */
+#define MCPWM_GEN1_B_NCIFORCE_MODE    0x00000003U
+#define MCPWM_GEN1_B_NCIFORCE_MODE_M  (MCPWM_GEN1_B_NCIFORCE_MODE_V << MCPWM_GEN1_B_NCIFORCE_MODE_S)
+#define MCPWM_GEN1_B_NCIFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN1_B_NCIFORCE_MODE_S  14
+
+/** MCPWM_GEN1_A_REG register
+ *  Actions triggered by events on PWM1A
+ */
+#define MCPWM_GEN1_A_REG(i) (DR_REG_MCPWM_BASE(i) + 0x88)
+/** MCPWM_GEN1_A_UTEZ : R/W; bitpos: [1:0]; default: 0;
+ *  Action on PWM1A triggered by event TEZ when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_UTEZ    0x00000003U
+#define MCPWM_GEN1_A_UTEZ_M  (MCPWM_GEN1_A_UTEZ_V << MCPWM_GEN1_A_UTEZ_S)
+#define MCPWM_GEN1_A_UTEZ_V  0x00000003U
+#define MCPWM_GEN1_A_UTEZ_S  0
+/** MCPWM_GEN1_A_UTEP : R/W; bitpos: [3:2]; default: 0;
+ *  Action on PWM1A triggered by event TEP when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_UTEP    0x00000003U
+#define MCPWM_GEN1_A_UTEP_M  (MCPWM_GEN1_A_UTEP_V << MCPWM_GEN1_A_UTEP_S)
+#define MCPWM_GEN1_A_UTEP_V  0x00000003U
+#define MCPWM_GEN1_A_UTEP_S  2
+/** MCPWM_GEN1_A_UTEA : R/W; bitpos: [5:4]; default: 0;
+ *  Action on PWM1A triggered by event TEA when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_UTEA    0x00000003U
+#define MCPWM_GEN1_A_UTEA_M  (MCPWM_GEN1_A_UTEA_V << MCPWM_GEN1_A_UTEA_S)
+#define MCPWM_GEN1_A_UTEA_V  0x00000003U
+#define MCPWM_GEN1_A_UTEA_S  4
+/** MCPWM_GEN1_A_UTEB : R/W; bitpos: [7:6]; default: 0;
+ *  Action on PWM1A triggered by event TEB when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_UTEB    0x00000003U
+#define MCPWM_GEN1_A_UTEB_M  (MCPWM_GEN1_A_UTEB_V << MCPWM_GEN1_A_UTEB_S)
+#define MCPWM_GEN1_A_UTEB_V  0x00000003U
+#define MCPWM_GEN1_A_UTEB_S  6
+/** MCPWM_GEN1_A_UT0 : R/W; bitpos: [9:8]; default: 0;
+ *  Action on PWM1A triggered by event_t0 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_UT0    0x00000003U
+#define MCPWM_GEN1_A_UT0_M  (MCPWM_GEN1_A_UT0_V << MCPWM_GEN1_A_UT0_S)
+#define MCPWM_GEN1_A_UT0_V  0x00000003U
+#define MCPWM_GEN1_A_UT0_S  8
+/** MCPWM_GEN1_A_UT1 : R/W; bitpos: [11:10]; default: 0;
+ *  Action on PWM1A triggered by event_t1 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_UT1    0x00000003U
+#define MCPWM_GEN1_A_UT1_M  (MCPWM_GEN1_A_UT1_V << MCPWM_GEN1_A_UT1_S)
+#define MCPWM_GEN1_A_UT1_V  0x00000003U
+#define MCPWM_GEN1_A_UT1_S  10
+/** MCPWM_GEN1_A_DTEZ : R/W; bitpos: [13:12]; default: 0;
+ *  Action on PWM1A triggered by event TEZ when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_DTEZ    0x00000003U
+#define MCPWM_GEN1_A_DTEZ_M  (MCPWM_GEN1_A_DTEZ_V << MCPWM_GEN1_A_DTEZ_S)
+#define MCPWM_GEN1_A_DTEZ_V  0x00000003U
+#define MCPWM_GEN1_A_DTEZ_S  12
+/** MCPWM_GEN1_A_DTEP : R/W; bitpos: [15:14]; default: 0;
+ *  Action on PWM1A triggered by event TEP when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_DTEP    0x00000003U
+#define MCPWM_GEN1_A_DTEP_M  (MCPWM_GEN1_A_DTEP_V << MCPWM_GEN1_A_DTEP_S)
+#define MCPWM_GEN1_A_DTEP_V  0x00000003U
+#define MCPWM_GEN1_A_DTEP_S  14
+/** MCPWM_GEN1_A_DTEA : R/W; bitpos: [17:16]; default: 0;
+ *  Action on PWM1A triggered by event TEA when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_DTEA    0x00000003U
+#define MCPWM_GEN1_A_DTEA_M  (MCPWM_GEN1_A_DTEA_V << MCPWM_GEN1_A_DTEA_S)
+#define MCPWM_GEN1_A_DTEA_V  0x00000003U
+#define MCPWM_GEN1_A_DTEA_S  16
+/** MCPWM_GEN1_A_DTEB : R/W; bitpos: [19:18]; default: 0;
+ *  Action on PWM1A triggered by event TEB when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_DTEB    0x00000003U
+#define MCPWM_GEN1_A_DTEB_M  (MCPWM_GEN1_A_DTEB_V << MCPWM_GEN1_A_DTEB_S)
+#define MCPWM_GEN1_A_DTEB_V  0x00000003U
+#define MCPWM_GEN1_A_DTEB_S  18
+/** MCPWM_GEN1_A_DT0 : R/W; bitpos: [21:20]; default: 0;
+ *  Action on PWM1A triggered by event_t0 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_DT0    0x00000003U
+#define MCPWM_GEN1_A_DT0_M  (MCPWM_GEN1_A_DT0_V << MCPWM_GEN1_A_DT0_S)
+#define MCPWM_GEN1_A_DT0_V  0x00000003U
+#define MCPWM_GEN1_A_DT0_S  20
+/** MCPWM_GEN1_A_DT1 : R/W; bitpos: [23:22]; default: 0;
+ *  Action on PWM1A triggered by event_t1 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_A_DT1    0x00000003U
+#define MCPWM_GEN1_A_DT1_M  (MCPWM_GEN1_A_DT1_V << MCPWM_GEN1_A_DT1_S)
+#define MCPWM_GEN1_A_DT1_V  0x00000003U
+#define MCPWM_GEN1_A_DT1_S  22
+
+/** MCPWM_GEN1_B_REG register
+ *  Actions triggered by events on PWM1B
+ */
+#define MCPWM_GEN1_B_REG(i) (DR_REG_MCPWM_BASE(i) + 0x8c)
+/** MCPWM_GEN1_B_UTEZ : R/W; bitpos: [1:0]; default: 0;
+ *  Action on PWM1B triggered by event TEZ when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_UTEZ    0x00000003U
+#define MCPWM_GEN1_B_UTEZ_M  (MCPWM_GEN1_B_UTEZ_V << MCPWM_GEN1_B_UTEZ_S)
+#define MCPWM_GEN1_B_UTEZ_V  0x00000003U
+#define MCPWM_GEN1_B_UTEZ_S  0
+/** MCPWM_GEN1_B_UTEP : R/W; bitpos: [3:2]; default: 0;
+ *  Action on PWM1B triggered by event TEP when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_UTEP    0x00000003U
+#define MCPWM_GEN1_B_UTEP_M  (MCPWM_GEN1_B_UTEP_V << MCPWM_GEN1_B_UTEP_S)
+#define MCPWM_GEN1_B_UTEP_V  0x00000003U
+#define MCPWM_GEN1_B_UTEP_S  2
+/** MCPWM_GEN1_B_UTEA : R/W; bitpos: [5:4]; default: 0;
+ *  Action on PWM1B triggered by event TEA when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_UTEA    0x00000003U
+#define MCPWM_GEN1_B_UTEA_M  (MCPWM_GEN1_B_UTEA_V << MCPWM_GEN1_B_UTEA_S)
+#define MCPWM_GEN1_B_UTEA_V  0x00000003U
+#define MCPWM_GEN1_B_UTEA_S  4
+/** MCPWM_GEN1_B_UTEB : R/W; bitpos: [7:6]; default: 0;
+ *  Action on PWM1B triggered by event TEB when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_UTEB    0x00000003U
+#define MCPWM_GEN1_B_UTEB_M  (MCPWM_GEN1_B_UTEB_V << MCPWM_GEN1_B_UTEB_S)
+#define MCPWM_GEN1_B_UTEB_V  0x00000003U
+#define MCPWM_GEN1_B_UTEB_S  6
+/** MCPWM_GEN1_B_UT0 : R/W; bitpos: [9:8]; default: 0;
+ *  Action on PWM1B triggered by event_t0 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_UT0    0x00000003U
+#define MCPWM_GEN1_B_UT0_M  (MCPWM_GEN1_B_UT0_V << MCPWM_GEN1_B_UT0_S)
+#define MCPWM_GEN1_B_UT0_V  0x00000003U
+#define MCPWM_GEN1_B_UT0_S  8
+/** MCPWM_GEN1_B_UT1 : R/W; bitpos: [11:10]; default: 0;
+ *  Action on PWM1B triggered by event_t1 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_UT1    0x00000003U
+#define MCPWM_GEN1_B_UT1_M  (MCPWM_GEN1_B_UT1_V << MCPWM_GEN1_B_UT1_S)
+#define MCPWM_GEN1_B_UT1_V  0x00000003U
+#define MCPWM_GEN1_B_UT1_S  10
+/** MCPWM_GEN1_B_DTEZ : R/W; bitpos: [13:12]; default: 0;
+ *  Action on PWM1B triggered by event TEZ when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_DTEZ    0x00000003U
+#define MCPWM_GEN1_B_DTEZ_M  (MCPWM_GEN1_B_DTEZ_V << MCPWM_GEN1_B_DTEZ_S)
+#define MCPWM_GEN1_B_DTEZ_V  0x00000003U
+#define MCPWM_GEN1_B_DTEZ_S  12
+/** MCPWM_GEN1_B_DTEP : R/W; bitpos: [15:14]; default: 0;
+ *  Action on PWM1B triggered by event TEP when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_DTEP    0x00000003U
+#define MCPWM_GEN1_B_DTEP_M  (MCPWM_GEN1_B_DTEP_V << MCPWM_GEN1_B_DTEP_S)
+#define MCPWM_GEN1_B_DTEP_V  0x00000003U
+#define MCPWM_GEN1_B_DTEP_S  14
+/** MCPWM_GEN1_B_DTEA : R/W; bitpos: [17:16]; default: 0;
+ *  Action on PWM1B triggered by event TEA when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_DTEA    0x00000003U
+#define MCPWM_GEN1_B_DTEA_M  (MCPWM_GEN1_B_DTEA_V << MCPWM_GEN1_B_DTEA_S)
+#define MCPWM_GEN1_B_DTEA_V  0x00000003U
+#define MCPWM_GEN1_B_DTEA_S  16
+/** MCPWM_GEN1_B_DTEB : R/W; bitpos: [19:18]; default: 0;
+ *  Action on PWM1B triggered by event TEB when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_DTEB    0x00000003U
+#define MCPWM_GEN1_B_DTEB_M  (MCPWM_GEN1_B_DTEB_V << MCPWM_GEN1_B_DTEB_S)
+#define MCPWM_GEN1_B_DTEB_V  0x00000003U
+#define MCPWM_GEN1_B_DTEB_S  18
+/** MCPWM_GEN1_B_DT0 : R/W; bitpos: [21:20]; default: 0;
+ *  Action on PWM1B triggered by event_t0 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_DT0    0x00000003U
+#define MCPWM_GEN1_B_DT0_M  (MCPWM_GEN1_B_DT0_V << MCPWM_GEN1_B_DT0_S)
+#define MCPWM_GEN1_B_DT0_V  0x00000003U
+#define MCPWM_GEN1_B_DT0_S  20
+/** MCPWM_GEN1_B_DT1 : R/W; bitpos: [23:22]; default: 0;
+ *  Action on PWM1B triggered by event_t1 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN1_B_DT1    0x00000003U
+#define MCPWM_GEN1_B_DT1_M  (MCPWM_GEN1_B_DT1_V << MCPWM_GEN1_B_DT1_S)
+#define MCPWM_GEN1_B_DT1_V  0x00000003U
+#define MCPWM_GEN1_B_DT1_S  22
+
+/** MCPWM_DT1_CFG_REG register
+ *  PWM generator 1 dead time type selection and configuration
+ */
+#define MCPWM_DT1_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x90)
+/** MCPWM_DT1_FED_UPMETHOD : R/W; bitpos: [3:0]; default: 0;
+ *  Update method for FED (falling edge delay) active register. 0: immediate, when bit0
+ *  is set to 1: tez, when bit1 is set to 1:tep,  when bit2 is set to 1: sync, when
+ *  bit3 is set to 1: disable the update
+ */
+#define MCPWM_DT1_FED_UPMETHOD    0x0000000FU
+#define MCPWM_DT1_FED_UPMETHOD_M  (MCPWM_DT1_FED_UPMETHOD_V << MCPWM_DT1_FED_UPMETHOD_S)
+#define MCPWM_DT1_FED_UPMETHOD_V  0x0000000FU
+#define MCPWM_DT1_FED_UPMETHOD_S  0
+/** MCPWM_DT1_RED_UPMETHOD : R/W; bitpos: [7:4]; default: 0;
+ *  Update method for RED (rising edge delay) active register. 0: immediate,when bit0
+ *  is set to 1: tez, when bit1 is set to 1:tep,  when bit2 is set to 1: sync, when
+ *  bit3 is set to 1: disable the update
+ */
+#define MCPWM_DT1_RED_UPMETHOD    0x0000000FU
+#define MCPWM_DT1_RED_UPMETHOD_M  (MCPWM_DT1_RED_UPMETHOD_V << MCPWM_DT1_RED_UPMETHOD_S)
+#define MCPWM_DT1_RED_UPMETHOD_V  0x0000000FU
+#define MCPWM_DT1_RED_UPMETHOD_S  4
+/** MCPWM_DT1_DEB_MODE : R/W; bitpos: [8]; default: 0;
+ *  S8 in table, dual-edge B mode, 0: fed/red take effect on different path separately,
+ *  1: fed/red take effect on B path, A out is in bypass or dulpB mode
+ */
+#define MCPWM_DT1_DEB_MODE    (BIT(8))
+#define MCPWM_DT1_DEB_MODE_M  (MCPWM_DT1_DEB_MODE_V << MCPWM_DT1_DEB_MODE_S)
+#define MCPWM_DT1_DEB_MODE_V  0x00000001U
+#define MCPWM_DT1_DEB_MODE_S  8
+/** MCPWM_DT1_A_OUTSWAP : R/W; bitpos: [9]; default: 0;
+ *  S6 in table
+ */
+#define MCPWM_DT1_A_OUTSWAP    (BIT(9))
+#define MCPWM_DT1_A_OUTSWAP_M  (MCPWM_DT1_A_OUTSWAP_V << MCPWM_DT1_A_OUTSWAP_S)
+#define MCPWM_DT1_A_OUTSWAP_V  0x00000001U
+#define MCPWM_DT1_A_OUTSWAP_S  9
+/** MCPWM_DT1_B_OUTSWAP : R/W; bitpos: [10]; default: 0;
+ *  S7 in table
+ */
+#define MCPWM_DT1_B_OUTSWAP    (BIT(10))
+#define MCPWM_DT1_B_OUTSWAP_M  (MCPWM_DT1_B_OUTSWAP_V << MCPWM_DT1_B_OUTSWAP_S)
+#define MCPWM_DT1_B_OUTSWAP_V  0x00000001U
+#define MCPWM_DT1_B_OUTSWAP_S  10
+/** MCPWM_DT1_RED_INSEL : R/W; bitpos: [11]; default: 0;
+ *  S4 in table
+ */
+#define MCPWM_DT1_RED_INSEL    (BIT(11))
+#define MCPWM_DT1_RED_INSEL_M  (MCPWM_DT1_RED_INSEL_V << MCPWM_DT1_RED_INSEL_S)
+#define MCPWM_DT1_RED_INSEL_V  0x00000001U
+#define MCPWM_DT1_RED_INSEL_S  11
+/** MCPWM_DT1_FED_INSEL : R/W; bitpos: [12]; default: 0;
+ *  S5 in table
+ */
+#define MCPWM_DT1_FED_INSEL    (BIT(12))
+#define MCPWM_DT1_FED_INSEL_M  (MCPWM_DT1_FED_INSEL_V << MCPWM_DT1_FED_INSEL_S)
+#define MCPWM_DT1_FED_INSEL_V  0x00000001U
+#define MCPWM_DT1_FED_INSEL_S  12
+/** MCPWM_DT1_RED_OUTINVERT : R/W; bitpos: [13]; default: 0;
+ *  S2 in table
+ */
+#define MCPWM_DT1_RED_OUTINVERT    (BIT(13))
+#define MCPWM_DT1_RED_OUTINVERT_M  (MCPWM_DT1_RED_OUTINVERT_V << MCPWM_DT1_RED_OUTINVERT_S)
+#define MCPWM_DT1_RED_OUTINVERT_V  0x00000001U
+#define MCPWM_DT1_RED_OUTINVERT_S  13
+/** MCPWM_DT1_FED_OUTINVERT : R/W; bitpos: [14]; default: 0;
+ *  S3 in table
+ */
+#define MCPWM_DT1_FED_OUTINVERT    (BIT(14))
+#define MCPWM_DT1_FED_OUTINVERT_M  (MCPWM_DT1_FED_OUTINVERT_V << MCPWM_DT1_FED_OUTINVERT_S)
+#define MCPWM_DT1_FED_OUTINVERT_V  0x00000001U
+#define MCPWM_DT1_FED_OUTINVERT_S  14
+/** MCPWM_DT1_A_OUTBYPASS : R/W; bitpos: [15]; default: 1;
+ *  S1 in table
+ */
+#define MCPWM_DT1_A_OUTBYPASS    (BIT(15))
+#define MCPWM_DT1_A_OUTBYPASS_M  (MCPWM_DT1_A_OUTBYPASS_V << MCPWM_DT1_A_OUTBYPASS_S)
+#define MCPWM_DT1_A_OUTBYPASS_V  0x00000001U
+#define MCPWM_DT1_A_OUTBYPASS_S  15
+/** MCPWM_DT1_B_OUTBYPASS : R/W; bitpos: [16]; default: 1;
+ *  S0 in table
+ */
+#define MCPWM_DT1_B_OUTBYPASS    (BIT(16))
+#define MCPWM_DT1_B_OUTBYPASS_M  (MCPWM_DT1_B_OUTBYPASS_V << MCPWM_DT1_B_OUTBYPASS_S)
+#define MCPWM_DT1_B_OUTBYPASS_V  0x00000001U
+#define MCPWM_DT1_B_OUTBYPASS_S  16
+/** MCPWM_DT1_CLK_SEL : R/W; bitpos: [17]; default: 0;
+ *  Dead time clock selection. 0: PWM_clk, 1: PT_clk
+ */
+#define MCPWM_DT1_CLK_SEL    (BIT(17))
+#define MCPWM_DT1_CLK_SEL_M  (MCPWM_DT1_CLK_SEL_V << MCPWM_DT1_CLK_SEL_S)
+#define MCPWM_DT1_CLK_SEL_V  0x00000001U
+#define MCPWM_DT1_CLK_SEL_S  17
+
+/** MCPWM_DT1_FED_CFG_REG register
+ *  PWM generator 1 shadow register for falling edge delay (FED).
+ */
+#define MCPWM_DT1_FED_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x94)
+/** MCPWM_DT1_FED : R/W; bitpos: [15:0]; default: 0;
+ *  Shadow register for FED
+ */
+#define MCPWM_DT1_FED    0x0000FFFFU
+#define MCPWM_DT1_FED_M  (MCPWM_DT1_FED_V << MCPWM_DT1_FED_S)
+#define MCPWM_DT1_FED_V  0x0000FFFFU
+#define MCPWM_DT1_FED_S  0
+
+/** MCPWM_DT1_RED_CFG_REG register
+ *  PWM generator 1 shadow register for rising edge delay (RED).
+ */
+#define MCPWM_DT1_RED_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x98)
+/** MCPWM_DT1_RED : R/W; bitpos: [15:0]; default: 0;
+ *  Shadow register for RED
+ */
+#define MCPWM_DT1_RED    0x0000FFFFU
+#define MCPWM_DT1_RED_M  (MCPWM_DT1_RED_V << MCPWM_DT1_RED_S)
+#define MCPWM_DT1_RED_V  0x0000FFFFU
+#define MCPWM_DT1_RED_S  0
+
+/** MCPWM_CARRIER1_CFG_REG register
+ *  PWM generator 1 carrier enable and configuratoin
+ */
+#define MCPWM_CARRIER1_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x9c)
+/** MCPWM_CARRIER1_EN : R/W; bitpos: [0]; default: 0;
+ *  When set, carrier1 function is enabled. When cleared, carrier1 is bypassed
+ */
+#define MCPWM_CARRIER1_EN    (BIT(0))
+#define MCPWM_CARRIER1_EN_M  (MCPWM_CARRIER1_EN_V << MCPWM_CARRIER1_EN_S)
+#define MCPWM_CARRIER1_EN_V  0x00000001U
+#define MCPWM_CARRIER1_EN_S  0
+/** MCPWM_CARRIER1_PRESCALE : R/W; bitpos: [4:1]; default: 0;
+ *  PWM carrier1 clock (PC_clk) prescale value. Period of PC_clk = period of PWM_clk *
+ *  (PWM_CARRIER0_PRESCALE + 1)
+ */
+#define MCPWM_CARRIER1_PRESCALE    0x0000000FU
+#define MCPWM_CARRIER1_PRESCALE_M  (MCPWM_CARRIER1_PRESCALE_V << MCPWM_CARRIER1_PRESCALE_S)
+#define MCPWM_CARRIER1_PRESCALE_V  0x0000000FU
+#define MCPWM_CARRIER1_PRESCALE_S  1
+/** MCPWM_CARRIER1_DUTY : R/W; bitpos: [7:5]; default: 0;
+ *  carrier duty selection. Duty = PWM_CARRIER0_DUTY / 8
+ */
+#define MCPWM_CARRIER1_DUTY    0x00000007U
+#define MCPWM_CARRIER1_DUTY_M  (MCPWM_CARRIER1_DUTY_V << MCPWM_CARRIER1_DUTY_S)
+#define MCPWM_CARRIER1_DUTY_V  0x00000007U
+#define MCPWM_CARRIER1_DUTY_S  5
+/** MCPWM_CARRIER1_OSHTWTH : R/W; bitpos: [11:8]; default: 0;
+ *  width of the first pulse in number of periods of the carrier
+ */
+#define MCPWM_CARRIER1_OSHTWTH    0x0000000FU
+#define MCPWM_CARRIER1_OSHTWTH_M  (MCPWM_CARRIER1_OSHTWTH_V << MCPWM_CARRIER1_OSHTWTH_S)
+#define MCPWM_CARRIER1_OSHTWTH_V  0x0000000FU
+#define MCPWM_CARRIER1_OSHTWTH_S  8
+/** MCPWM_CARRIER1_OUT_INVERT : R/W; bitpos: [12]; default: 0;
+ *  when set, invert the output of PWM1A and PWM1B for this submodule
+ */
+#define MCPWM_CARRIER1_OUT_INVERT    (BIT(12))
+#define MCPWM_CARRIER1_OUT_INVERT_M  (MCPWM_CARRIER1_OUT_INVERT_V << MCPWM_CARRIER1_OUT_INVERT_S)
+#define MCPWM_CARRIER1_OUT_INVERT_V  0x00000001U
+#define MCPWM_CARRIER1_OUT_INVERT_S  12
+/** MCPWM_CARRIER1_IN_INVERT : R/W; bitpos: [13]; default: 0;
+ *  when set, invert the input of PWM1A and PWM1B for this submodule
+ */
+#define MCPWM_CARRIER1_IN_INVERT    (BIT(13))
+#define MCPWM_CARRIER1_IN_INVERT_M  (MCPWM_CARRIER1_IN_INVERT_V << MCPWM_CARRIER1_IN_INVERT_S)
+#define MCPWM_CARRIER1_IN_INVERT_V  0x00000001U
+#define MCPWM_CARRIER1_IN_INVERT_S  13
+
+/** MCPWM_FH1_CFG0_REG register
+ *  Actions on PWM1A and PWM1B trip events
+ */
+#define MCPWM_FH1_CFG0_REG(i) (DR_REG_MCPWM_BASE(i) + 0xa0)
+/** MCPWM_FH1_SW_CBC : R/W; bitpos: [0]; default: 0;
+ *  Enable register for software force cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH1_SW_CBC    (BIT(0))
+#define MCPWM_FH1_SW_CBC_M  (MCPWM_FH1_SW_CBC_V << MCPWM_FH1_SW_CBC_S)
+#define MCPWM_FH1_SW_CBC_V  0x00000001U
+#define MCPWM_FH1_SW_CBC_S  0
+/** MCPWM_FH1_F2_CBC : R/W; bitpos: [1]; default: 0;
+ *  fault_event2 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH1_F2_CBC    (BIT(1))
+#define MCPWM_FH1_F2_CBC_M  (MCPWM_FH1_F2_CBC_V << MCPWM_FH1_F2_CBC_S)
+#define MCPWM_FH1_F2_CBC_V  0x00000001U
+#define MCPWM_FH1_F2_CBC_S  1
+/** MCPWM_FH1_F1_CBC : R/W; bitpos: [2]; default: 0;
+ *  fault_event1 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH1_F1_CBC    (BIT(2))
+#define MCPWM_FH1_F1_CBC_M  (MCPWM_FH1_F1_CBC_V << MCPWM_FH1_F1_CBC_S)
+#define MCPWM_FH1_F1_CBC_V  0x00000001U
+#define MCPWM_FH1_F1_CBC_S  2
+/** MCPWM_FH1_F0_CBC : R/W; bitpos: [3]; default: 0;
+ *  fault_event0 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH1_F0_CBC    (BIT(3))
+#define MCPWM_FH1_F0_CBC_M  (MCPWM_FH1_F0_CBC_V << MCPWM_FH1_F0_CBC_S)
+#define MCPWM_FH1_F0_CBC_V  0x00000001U
+#define MCPWM_FH1_F0_CBC_S  3
+/** MCPWM_FH1_SW_OST : R/W; bitpos: [4]; default: 0;
+ *  Enable register for software force one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH1_SW_OST    (BIT(4))
+#define MCPWM_FH1_SW_OST_M  (MCPWM_FH1_SW_OST_V << MCPWM_FH1_SW_OST_S)
+#define MCPWM_FH1_SW_OST_V  0x00000001U
+#define MCPWM_FH1_SW_OST_S  4
+/** MCPWM_FH1_F2_OST : R/W; bitpos: [5]; default: 0;
+ *  fault_event2 will trigger one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH1_F2_OST    (BIT(5))
+#define MCPWM_FH1_F2_OST_M  (MCPWM_FH1_F2_OST_V << MCPWM_FH1_F2_OST_S)
+#define MCPWM_FH1_F2_OST_V  0x00000001U
+#define MCPWM_FH1_F2_OST_S  5
+/** MCPWM_FH1_F1_OST : R/W; bitpos: [6]; default: 0;
+ *  fault_event1 will trigger one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH1_F1_OST    (BIT(6))
+#define MCPWM_FH1_F1_OST_M  (MCPWM_FH1_F1_OST_V << MCPWM_FH1_F1_OST_S)
+#define MCPWM_FH1_F1_OST_V  0x00000001U
+#define MCPWM_FH1_F1_OST_S  6
+/** MCPWM_FH1_F0_OST : R/W; bitpos: [7]; default: 0;
+ *  fault_event0 will trigger one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH1_F0_OST    (BIT(7))
+#define MCPWM_FH1_F0_OST_M  (MCPWM_FH1_F0_OST_V << MCPWM_FH1_F0_OST_S)
+#define MCPWM_FH1_F0_OST_V  0x00000001U
+#define MCPWM_FH1_F0_OST_S  7
+/** MCPWM_FH1_A_CBC_D : R/W; bitpos: [9:8]; default: 0;
+ *  Cycle-by-cycle mode action on PWM1A when fault event occurs and timer is
+ *  decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH1_A_CBC_D    0x00000003U
+#define MCPWM_FH1_A_CBC_D_M  (MCPWM_FH1_A_CBC_D_V << MCPWM_FH1_A_CBC_D_S)
+#define MCPWM_FH1_A_CBC_D_V  0x00000003U
+#define MCPWM_FH1_A_CBC_D_S  8
+/** MCPWM_FH1_A_CBC_U : R/W; bitpos: [11:10]; default: 0;
+ *  Cycle-by-cycle mode action on PWM1A when fault event occurs and timer is
+ *  increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH1_A_CBC_U    0x00000003U
+#define MCPWM_FH1_A_CBC_U_M  (MCPWM_FH1_A_CBC_U_V << MCPWM_FH1_A_CBC_U_S)
+#define MCPWM_FH1_A_CBC_U_V  0x00000003U
+#define MCPWM_FH1_A_CBC_U_S  10
+/** MCPWM_FH1_A_OST_D : R/W; bitpos: [13:12]; default: 0;
+ *  One-shot mode action on PWM1A when fault event occurs and timer is decreasing. 0:
+ *  do nothing,1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH1_A_OST_D    0x00000003U
+#define MCPWM_FH1_A_OST_D_M  (MCPWM_FH1_A_OST_D_V << MCPWM_FH1_A_OST_D_S)
+#define MCPWM_FH1_A_OST_D_V  0x00000003U
+#define MCPWM_FH1_A_OST_D_S  12
+/** MCPWM_FH1_A_OST_U : R/W; bitpos: [15:14]; default: 0;
+ *  One-shot mode action on PWM1A when fault event occurs and timer is increasing. 0:
+ *  do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH1_A_OST_U    0x00000003U
+#define MCPWM_FH1_A_OST_U_M  (MCPWM_FH1_A_OST_U_V << MCPWM_FH1_A_OST_U_S)
+#define MCPWM_FH1_A_OST_U_V  0x00000003U
+#define MCPWM_FH1_A_OST_U_S  14
+/** MCPWM_FH1_B_CBC_D : R/W; bitpos: [17:16]; default: 0;
+ *  Cycle-by-cycle mode action on PWM1B when fault event occurs and timer is
+ *  decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH1_B_CBC_D    0x00000003U
+#define MCPWM_FH1_B_CBC_D_M  (MCPWM_FH1_B_CBC_D_V << MCPWM_FH1_B_CBC_D_S)
+#define MCPWM_FH1_B_CBC_D_V  0x00000003U
+#define MCPWM_FH1_B_CBC_D_S  16
+/** MCPWM_FH1_B_CBC_U : R/W; bitpos: [19:18]; default: 0;
+ *  Cycle-by-cycle mode action on PWM1B when fault event occurs and timer is
+ *  increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH1_B_CBC_U    0x00000003U
+#define MCPWM_FH1_B_CBC_U_M  (MCPWM_FH1_B_CBC_U_V << MCPWM_FH1_B_CBC_U_S)
+#define MCPWM_FH1_B_CBC_U_V  0x00000003U
+#define MCPWM_FH1_B_CBC_U_S  18
+/** MCPWM_FH1_B_OST_D : R/W; bitpos: [21:20]; default: 0;
+ *  One-shot mode action on PWM1B when fault event occurs and timer is decreasing. 0:
+ *  do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH1_B_OST_D    0x00000003U
+#define MCPWM_FH1_B_OST_D_M  (MCPWM_FH1_B_OST_D_V << MCPWM_FH1_B_OST_D_S)
+#define MCPWM_FH1_B_OST_D_V  0x00000003U
+#define MCPWM_FH1_B_OST_D_S  20
+/** MCPWM_FH1_B_OST_U : R/W; bitpos: [23:22]; default: 0;
+ *  One-shot mode action on PWM1B when fault event occurs and timer is increasing. 0:
+ *  do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH1_B_OST_U    0x00000003U
+#define MCPWM_FH1_B_OST_U_M  (MCPWM_FH1_B_OST_U_V << MCPWM_FH1_B_OST_U_S)
+#define MCPWM_FH1_B_OST_U_V  0x00000003U
+#define MCPWM_FH1_B_OST_U_S  22
+
+/** MCPWM_FH1_CFG1_REG register
+ *  Software triggers for fault handler actions
+ */
+#define MCPWM_FH1_CFG1_REG(i) (DR_REG_MCPWM_BASE(i) + 0xa4)
+/** MCPWM_FH1_CLR_OST : R/W; bitpos: [0]; default: 0;
+ *  a rising edge will clear on going one-shot mode action
+ */
+#define MCPWM_FH1_CLR_OST    (BIT(0))
+#define MCPWM_FH1_CLR_OST_M  (MCPWM_FH1_CLR_OST_V << MCPWM_FH1_CLR_OST_S)
+#define MCPWM_FH1_CLR_OST_V  0x00000001U
+#define MCPWM_FH1_CLR_OST_S  0
+/** MCPWM_FH1_CBCPULSE : R/W; bitpos: [2:1]; default: 0;
+ *  cycle-by-cycle mode action refresh moment selection. When bit0 is set to 1: TEZ,
+ *  when bit1 is set to 1:TEP
+ */
+#define MCPWM_FH1_CBCPULSE    0x00000003U
+#define MCPWM_FH1_CBCPULSE_M  (MCPWM_FH1_CBCPULSE_V << MCPWM_FH1_CBCPULSE_S)
+#define MCPWM_FH1_CBCPULSE_V  0x00000003U
+#define MCPWM_FH1_CBCPULSE_S  1
+/** MCPWM_FH1_FORCE_CBC : R/W; bitpos: [3]; default: 0;
+ *  a toggle trigger a cycle-by-cycle mode action
+ */
+#define MCPWM_FH1_FORCE_CBC    (BIT(3))
+#define MCPWM_FH1_FORCE_CBC_M  (MCPWM_FH1_FORCE_CBC_V << MCPWM_FH1_FORCE_CBC_S)
+#define MCPWM_FH1_FORCE_CBC_V  0x00000001U
+#define MCPWM_FH1_FORCE_CBC_S  3
+/** MCPWM_FH1_FORCE_OST : R/W; bitpos: [4]; default: 0;
+ *  a toggle (software negate its value) triggers a one-shot mode action
+ */
+#define MCPWM_FH1_FORCE_OST    (BIT(4))
+#define MCPWM_FH1_FORCE_OST_M  (MCPWM_FH1_FORCE_OST_V << MCPWM_FH1_FORCE_OST_S)
+#define MCPWM_FH1_FORCE_OST_V  0x00000001U
+#define MCPWM_FH1_FORCE_OST_S  4
+
+/** MCPWM_FH1_STATUS_REG register
+ *  Status of fault events.
+ */
+#define MCPWM_FH1_STATUS_REG(i) (DR_REG_MCPWM_BASE(i) + 0xa8)
+/** MCPWM_FH1_CBC_ON : RO; bitpos: [0]; default: 0;
+ *  Set and reset by hardware. If set, a cycle-by-cycle mode action is on going
+ */
+#define MCPWM_FH1_CBC_ON    (BIT(0))
+#define MCPWM_FH1_CBC_ON_M  (MCPWM_FH1_CBC_ON_V << MCPWM_FH1_CBC_ON_S)
+#define MCPWM_FH1_CBC_ON_V  0x00000001U
+#define MCPWM_FH1_CBC_ON_S  0
+/** MCPWM_FH1_OST_ON : RO; bitpos: [1]; default: 0;
+ *  Set and reset by hardware. If set, an one-shot mode action is on going
+ */
+#define MCPWM_FH1_OST_ON    (BIT(1))
+#define MCPWM_FH1_OST_ON_M  (MCPWM_FH1_OST_ON_V << MCPWM_FH1_OST_ON_S)
+#define MCPWM_FH1_OST_ON_V  0x00000001U
+#define MCPWM_FH1_OST_ON_S  1
+
+/** MCPWM_GEN2_STMP_CFG_REG register
+ *  Transfer status and update method for time stamp registers A and B
+ */
+#define MCPWM_GEN2_STMP_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0xac)
+/** MCPWM_GEN2_A_UPMETHOD : R/W; bitpos: [3:0]; default: 0;
+ *  Update method for PWM generator 2 time stamp A's active register. When all bits are
+ *  set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when
+ *  bit2 is set to 1: sync, when bit3 is set to 1: disable the update.
+ */
+#define MCPWM_GEN2_A_UPMETHOD    0x0000000FU
+#define MCPWM_GEN2_A_UPMETHOD_M  (MCPWM_GEN2_A_UPMETHOD_V << MCPWM_GEN2_A_UPMETHOD_S)
+#define MCPWM_GEN2_A_UPMETHOD_V  0x0000000FU
+#define MCPWM_GEN2_A_UPMETHOD_S  0
+/** MCPWM_GEN2_B_UPMETHOD : R/W; bitpos: [7:4]; default: 0;
+ *  Update method for PWM generator 2 time stamp B's active register. When all bits are
+ *  set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when
+ *  bit2 is set to 1: sync, when bit3 is set to 1: disable the update.
+ */
+#define MCPWM_GEN2_B_UPMETHOD    0x0000000FU
+#define MCPWM_GEN2_B_UPMETHOD_M  (MCPWM_GEN2_B_UPMETHOD_V << MCPWM_GEN2_B_UPMETHOD_S)
+#define MCPWM_GEN2_B_UPMETHOD_V  0x0000000FU
+#define MCPWM_GEN2_B_UPMETHOD_S  4
+/** MCPWM_GEN2_A_SHDW_FULL : R/W/WTC/SC; bitpos: [8]; default: 0;
+ *  Set and reset by hardware. If set, PWM generator 2 time stamp A's shadow reg is
+ *  filled and waiting to be transferred to A's active reg. If cleared, A's active reg
+ *  has been updated with shadow register latest value
+ */
+#define MCPWM_GEN2_A_SHDW_FULL    (BIT(8))
+#define MCPWM_GEN2_A_SHDW_FULL_M  (MCPWM_GEN2_A_SHDW_FULL_V << MCPWM_GEN2_A_SHDW_FULL_S)
+#define MCPWM_GEN2_A_SHDW_FULL_V  0x00000001U
+#define MCPWM_GEN2_A_SHDW_FULL_S  8
+/** MCPWM_GEN2_B_SHDW_FULL : R/W/WTC/SC; bitpos: [9]; default: 0;
+ *  Set and reset by hardware. If set, PWM generator 2 time stamp B's shadow reg is
+ *  filled and waiting to be transferred to B's active reg. If cleared, B's active reg
+ *  has been updated with shadow register latest value
+ */
+#define MCPWM_GEN2_B_SHDW_FULL    (BIT(9))
+#define MCPWM_GEN2_B_SHDW_FULL_M  (MCPWM_GEN2_B_SHDW_FULL_V << MCPWM_GEN2_B_SHDW_FULL_S)
+#define MCPWM_GEN2_B_SHDW_FULL_V  0x00000001U
+#define MCPWM_GEN2_B_SHDW_FULL_S  9
+
+/** MCPWM_GEN2_TSTMP_A_REG register
+ *  PWM generator 2 shadow register for timer stamp A.
+ */
+#define MCPWM_GEN2_TSTMP_A_REG(i) (DR_REG_MCPWM_BASE(i) + 0xb0)
+/** MCPWM_GEN2_A : R/W; bitpos: [15:0]; default: 0;
+ *  PWM generator 2 time stamp A's shadow register
+ */
+#define MCPWM_GEN2_A    0x0000FFFFU
+#define MCPWM_GEN2_A_M  (MCPWM_GEN2_A_V << MCPWM_GEN2_A_S)
+#define MCPWM_GEN2_A_V  0x0000FFFFU
+#define MCPWM_GEN2_A_S  0
+
+/** MCPWM_GEN2_TSTMP_B_REG register
+ *  PWM generator 2 shadow register for timer stamp A.
+ */
+#define MCPWM_GEN2_TSTMP_B_REG(i) (DR_REG_MCPWM_BASE(i) + 0xb4)
+/** MCPWM_GEN2_B : R/W; bitpos: [15:0]; default: 0;
+ *  PWM generator 2 time stamp B's shadow register
+ */
+#define MCPWM_GEN2_B    0x0000FFFFU
+#define MCPWM_GEN2_B_M  (MCPWM_GEN2_B_V << MCPWM_GEN2_B_S)
+#define MCPWM_GEN2_B_V  0x0000FFFFU
+#define MCPWM_GEN2_B_S  0
+
+/** MCPWM_GEN2_CFG0_REG register
+ *  PWM generator 2 event T0 and T1 handling
+ */
+#define MCPWM_GEN2_CFG0_REG(i) (DR_REG_MCPWM_BASE(i) + 0xb8)
+/** MCPWM_GEN2_CFG_UPMETHOD : R/W; bitpos: [3:0]; default: 0;
+ *  Update method for PWM generator 2's active register of configuration. 0:
+ *  immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1:sync;when bit3 is
+ *  set to 1:disable the update.
+ */
+#define MCPWM_GEN2_CFG_UPMETHOD    0x0000000FU
+#define MCPWM_GEN2_CFG_UPMETHOD_M  (MCPWM_GEN2_CFG_UPMETHOD_V << MCPWM_GEN2_CFG_UPMETHOD_S)
+#define MCPWM_GEN2_CFG_UPMETHOD_V  0x0000000FU
+#define MCPWM_GEN2_CFG_UPMETHOD_S  0
+/** MCPWM_GEN2_T0_SEL : R/W; bitpos: [6:4]; default: 0;
+ *  Source selection for PWM generator 2 event_t0, take effect immediately, 0:
+ *  fault_event0, 1: fault_event1, 2: fault_event2, 3: sync_taken, 4: none
+ */
+#define MCPWM_GEN2_T0_SEL    0x00000007U
+#define MCPWM_GEN2_T0_SEL_M  (MCPWM_GEN2_T0_SEL_V << MCPWM_GEN2_T0_SEL_S)
+#define MCPWM_GEN2_T0_SEL_V  0x00000007U
+#define MCPWM_GEN2_T0_SEL_S  4
+/** MCPWM_GEN2_T1_SEL : R/W; bitpos: [9:7]; default: 0;
+ *  Source selection for PWM generator 2 event_t1, take effect immediately, 0:
+ *  fault_event0, 1: fault_event1, 2: fault_event2, 3: sync_taken, 4: none
+ */
+#define MCPWM_GEN2_T1_SEL    0x00000007U
+#define MCPWM_GEN2_T1_SEL_M  (MCPWM_GEN2_T1_SEL_V << MCPWM_GEN2_T1_SEL_S)
+#define MCPWM_GEN2_T1_SEL_V  0x00000007U
+#define MCPWM_GEN2_T1_SEL_S  7
+
+/** MCPWM_GEN2_FORCE_REG register
+ *  Permissives to force PWM2A and PWM2B outputs by software
+ */
+#define MCPWM_GEN2_FORCE_REG(i) (DR_REG_MCPWM_BASE(i) + 0xbc)
+/** MCPWM_GEN2_CNTUFORCE_UPMETHOD : R/W; bitpos: [5:0]; default: 32;
+ *  Updating method for continuous software force of PWM generator 2. When all bits are
+ *  set to 0: immediately, when bit0 is set to 1: TEZ,when bit1 is set to 1: TEP, when
+ *  bit2 is set to 1: TEA, when bit3 is set to 1: TEB, when bit4 is set to 1: sync,
+ *  when bit5 is set to 1: disable update. (TEA/B here and below means an event
+ *  generated when the timer's value equals to that of register A/B.)
+ */
+#define MCPWM_GEN2_CNTUFORCE_UPMETHOD    0x0000003FU
+#define MCPWM_GEN2_CNTUFORCE_UPMETHOD_M  (MCPWM_GEN2_CNTUFORCE_UPMETHOD_V << MCPWM_GEN2_CNTUFORCE_UPMETHOD_S)
+#define MCPWM_GEN2_CNTUFORCE_UPMETHOD_V  0x0000003FU
+#define MCPWM_GEN2_CNTUFORCE_UPMETHOD_S  0
+/** MCPWM_GEN2_A_CNTUFORCE_MODE : R/W; bitpos: [7:6]; default: 0;
+ *  Continuous software force mode for PWM2A. 0: disabled, 1: low, 2: high, 3: disabled
+ */
+#define MCPWM_GEN2_A_CNTUFORCE_MODE    0x00000003U
+#define MCPWM_GEN2_A_CNTUFORCE_MODE_M  (MCPWM_GEN2_A_CNTUFORCE_MODE_V << MCPWM_GEN2_A_CNTUFORCE_MODE_S)
+#define MCPWM_GEN2_A_CNTUFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN2_A_CNTUFORCE_MODE_S  6
+/** MCPWM_GEN2_B_CNTUFORCE_MODE : R/W; bitpos: [9:8]; default: 0;
+ *  Continuous software force mode for PWM2B. 0: disabled, 1: low, 2: high, 3: disabled
+ */
+#define MCPWM_GEN2_B_CNTUFORCE_MODE    0x00000003U
+#define MCPWM_GEN2_B_CNTUFORCE_MODE_M  (MCPWM_GEN2_B_CNTUFORCE_MODE_V << MCPWM_GEN2_B_CNTUFORCE_MODE_S)
+#define MCPWM_GEN2_B_CNTUFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN2_B_CNTUFORCE_MODE_S  8
+/** MCPWM_GEN2_A_NCIFORCE : R/W; bitpos: [10]; default: 0;
+ *  Trigger of non-continuous immediate software-force event for PWM2A, a toggle will
+ *  trigger a force event.
+ */
+#define MCPWM_GEN2_A_NCIFORCE    (BIT(10))
+#define MCPWM_GEN2_A_NCIFORCE_M  (MCPWM_GEN2_A_NCIFORCE_V << MCPWM_GEN2_A_NCIFORCE_S)
+#define MCPWM_GEN2_A_NCIFORCE_V  0x00000001U
+#define MCPWM_GEN2_A_NCIFORCE_S  10
+/** MCPWM_GEN2_A_NCIFORCE_MODE : R/W; bitpos: [12:11]; default: 0;
+ *  non-continuous immediate software force mode for PWM2A, 0: disabled, 1: low, 2:
+ *  high, 3: disabled
+ */
+#define MCPWM_GEN2_A_NCIFORCE_MODE    0x00000003U
+#define MCPWM_GEN2_A_NCIFORCE_MODE_M  (MCPWM_GEN2_A_NCIFORCE_MODE_V << MCPWM_GEN2_A_NCIFORCE_MODE_S)
+#define MCPWM_GEN2_A_NCIFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN2_A_NCIFORCE_MODE_S  11
+/** MCPWM_GEN2_B_NCIFORCE : R/W; bitpos: [13]; default: 0;
+ *  Trigger of non-continuous immediate software-force event for PWM2B, a toggle will
+ *  trigger a force event.
+ */
+#define MCPWM_GEN2_B_NCIFORCE    (BIT(13))
+#define MCPWM_GEN2_B_NCIFORCE_M  (MCPWM_GEN2_B_NCIFORCE_V << MCPWM_GEN2_B_NCIFORCE_S)
+#define MCPWM_GEN2_B_NCIFORCE_V  0x00000001U
+#define MCPWM_GEN2_B_NCIFORCE_S  13
+/** MCPWM_GEN2_B_NCIFORCE_MODE : R/W; bitpos: [15:14]; default: 0;
+ *  non-continuous immediate software force mode for PWM2B, 0: disabled, 1: low, 2:
+ *  high, 3: disabled
+ */
+#define MCPWM_GEN2_B_NCIFORCE_MODE    0x00000003U
+#define MCPWM_GEN2_B_NCIFORCE_MODE_M  (MCPWM_GEN2_B_NCIFORCE_MODE_V << MCPWM_GEN2_B_NCIFORCE_MODE_S)
+#define MCPWM_GEN2_B_NCIFORCE_MODE_V  0x00000003U
+#define MCPWM_GEN2_B_NCIFORCE_MODE_S  14
+
+/** MCPWM_GEN2_A_REG register
+ *  Actions triggered by events on PWM2A
+ */
+#define MCPWM_GEN2_A_REG(i) (DR_REG_MCPWM_BASE(i) + 0xc0)
+/** MCPWM_GEN2_A_UTEZ : R/W; bitpos: [1:0]; default: 0;
+ *  Action on PWM2A triggered by event TEZ when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_UTEZ    0x00000003U
+#define MCPWM_GEN2_A_UTEZ_M  (MCPWM_GEN2_A_UTEZ_V << MCPWM_GEN2_A_UTEZ_S)
+#define MCPWM_GEN2_A_UTEZ_V  0x00000003U
+#define MCPWM_GEN2_A_UTEZ_S  0
+/** MCPWM_GEN2_A_UTEP : R/W; bitpos: [3:2]; default: 0;
+ *  Action on PWM2A triggered by event TEP when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_UTEP    0x00000003U
+#define MCPWM_GEN2_A_UTEP_M  (MCPWM_GEN2_A_UTEP_V << MCPWM_GEN2_A_UTEP_S)
+#define MCPWM_GEN2_A_UTEP_V  0x00000003U
+#define MCPWM_GEN2_A_UTEP_S  2
+/** MCPWM_GEN2_A_UTEA : R/W; bitpos: [5:4]; default: 0;
+ *  Action on PWM2A triggered by event TEA when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_UTEA    0x00000003U
+#define MCPWM_GEN2_A_UTEA_M  (MCPWM_GEN2_A_UTEA_V << MCPWM_GEN2_A_UTEA_S)
+#define MCPWM_GEN2_A_UTEA_V  0x00000003U
+#define MCPWM_GEN2_A_UTEA_S  4
+/** MCPWM_GEN2_A_UTEB : R/W; bitpos: [7:6]; default: 0;
+ *  Action on PWM2A triggered by event TEB when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_UTEB    0x00000003U
+#define MCPWM_GEN2_A_UTEB_M  (MCPWM_GEN2_A_UTEB_V << MCPWM_GEN2_A_UTEB_S)
+#define MCPWM_GEN2_A_UTEB_V  0x00000003U
+#define MCPWM_GEN2_A_UTEB_S  6
+/** MCPWM_GEN2_A_UT0 : R/W; bitpos: [9:8]; default: 0;
+ *  Action on PWM2A triggered by event_t0 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_UT0    0x00000003U
+#define MCPWM_GEN2_A_UT0_M  (MCPWM_GEN2_A_UT0_V << MCPWM_GEN2_A_UT0_S)
+#define MCPWM_GEN2_A_UT0_V  0x00000003U
+#define MCPWM_GEN2_A_UT0_S  8
+/** MCPWM_GEN2_A_UT1 : R/W; bitpos: [11:10]; default: 0;
+ *  Action on PWM2A triggered by event_t1 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_UT1    0x00000003U
+#define MCPWM_GEN2_A_UT1_M  (MCPWM_GEN2_A_UT1_V << MCPWM_GEN2_A_UT1_S)
+#define MCPWM_GEN2_A_UT1_V  0x00000003U
+#define MCPWM_GEN2_A_UT1_S  10
+/** MCPWM_GEN2_A_DTEZ : R/W; bitpos: [13:12]; default: 0;
+ *  Action on PWM2A triggered by event TEZ when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_DTEZ    0x00000003U
+#define MCPWM_GEN2_A_DTEZ_M  (MCPWM_GEN2_A_DTEZ_V << MCPWM_GEN2_A_DTEZ_S)
+#define MCPWM_GEN2_A_DTEZ_V  0x00000003U
+#define MCPWM_GEN2_A_DTEZ_S  12
+/** MCPWM_GEN2_A_DTEP : R/W; bitpos: [15:14]; default: 0;
+ *  Action on PWM2A triggered by event TEP when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_DTEP    0x00000003U
+#define MCPWM_GEN2_A_DTEP_M  (MCPWM_GEN2_A_DTEP_V << MCPWM_GEN2_A_DTEP_S)
+#define MCPWM_GEN2_A_DTEP_V  0x00000003U
+#define MCPWM_GEN2_A_DTEP_S  14
+/** MCPWM_GEN2_A_DTEA : R/W; bitpos: [17:16]; default: 0;
+ *  Action on PWM2A triggered by event TEA when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_DTEA    0x00000003U
+#define MCPWM_GEN2_A_DTEA_M  (MCPWM_GEN2_A_DTEA_V << MCPWM_GEN2_A_DTEA_S)
+#define MCPWM_GEN2_A_DTEA_V  0x00000003U
+#define MCPWM_GEN2_A_DTEA_S  16
+/** MCPWM_GEN2_A_DTEB : R/W; bitpos: [19:18]; default: 0;
+ *  Action on PWM2A triggered by event TEB when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_DTEB    0x00000003U
+#define MCPWM_GEN2_A_DTEB_M  (MCPWM_GEN2_A_DTEB_V << MCPWM_GEN2_A_DTEB_S)
+#define MCPWM_GEN2_A_DTEB_V  0x00000003U
+#define MCPWM_GEN2_A_DTEB_S  18
+/** MCPWM_GEN2_A_DT0 : R/W; bitpos: [21:20]; default: 0;
+ *  Action on PWM2A triggered by event_t0 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_DT0    0x00000003U
+#define MCPWM_GEN2_A_DT0_M  (MCPWM_GEN2_A_DT0_V << MCPWM_GEN2_A_DT0_S)
+#define MCPWM_GEN2_A_DT0_V  0x00000003U
+#define MCPWM_GEN2_A_DT0_S  20
+/** MCPWM_GEN2_A_DT1 : R/W; bitpos: [23:22]; default: 0;
+ *  Action on PWM2A triggered by event_t1 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_A_DT1    0x00000003U
+#define MCPWM_GEN2_A_DT1_M  (MCPWM_GEN2_A_DT1_V << MCPWM_GEN2_A_DT1_S)
+#define MCPWM_GEN2_A_DT1_V  0x00000003U
+#define MCPWM_GEN2_A_DT1_S  22
+
+/** MCPWM_GEN2_B_REG register
+ *  Actions triggered by events on PWM2B
+ */
+#define MCPWM_GEN2_B_REG(i) (DR_REG_MCPWM_BASE(i) + 0xc4)
+/** MCPWM_GEN2_B_UTEZ : R/W; bitpos: [1:0]; default: 0;
+ *  Action on PWM2B triggered by event TEZ when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_UTEZ    0x00000003U
+#define MCPWM_GEN2_B_UTEZ_M  (MCPWM_GEN2_B_UTEZ_V << MCPWM_GEN2_B_UTEZ_S)
+#define MCPWM_GEN2_B_UTEZ_V  0x00000003U
+#define MCPWM_GEN2_B_UTEZ_S  0
+/** MCPWM_GEN2_B_UTEP : R/W; bitpos: [3:2]; default: 0;
+ *  Action on PWM2B triggered by event TEP when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_UTEP    0x00000003U
+#define MCPWM_GEN2_B_UTEP_M  (MCPWM_GEN2_B_UTEP_V << MCPWM_GEN2_B_UTEP_S)
+#define MCPWM_GEN2_B_UTEP_V  0x00000003U
+#define MCPWM_GEN2_B_UTEP_S  2
+/** MCPWM_GEN2_B_UTEA : R/W; bitpos: [5:4]; default: 0;
+ *  Action on PWM2B triggered by event TEA when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_UTEA    0x00000003U
+#define MCPWM_GEN2_B_UTEA_M  (MCPWM_GEN2_B_UTEA_V << MCPWM_GEN2_B_UTEA_S)
+#define MCPWM_GEN2_B_UTEA_V  0x00000003U
+#define MCPWM_GEN2_B_UTEA_S  4
+/** MCPWM_GEN2_B_UTEB : R/W; bitpos: [7:6]; default: 0;
+ *  Action on PWM2B triggered by event TEB when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_UTEB    0x00000003U
+#define MCPWM_GEN2_B_UTEB_M  (MCPWM_GEN2_B_UTEB_V << MCPWM_GEN2_B_UTEB_S)
+#define MCPWM_GEN2_B_UTEB_V  0x00000003U
+#define MCPWM_GEN2_B_UTEB_S  6
+/** MCPWM_GEN2_B_UT0 : R/W; bitpos: [9:8]; default: 0;
+ *  Action on PWM2B triggered by event_t0 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_UT0    0x00000003U
+#define MCPWM_GEN2_B_UT0_M  (MCPWM_GEN2_B_UT0_V << MCPWM_GEN2_B_UT0_S)
+#define MCPWM_GEN2_B_UT0_V  0x00000003U
+#define MCPWM_GEN2_B_UT0_S  8
+/** MCPWM_GEN2_B_UT1 : R/W; bitpos: [11:10]; default: 0;
+ *  Action on PWM2B triggered by event_t1 when timer increasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_UT1    0x00000003U
+#define MCPWM_GEN2_B_UT1_M  (MCPWM_GEN2_B_UT1_V << MCPWM_GEN2_B_UT1_S)
+#define MCPWM_GEN2_B_UT1_V  0x00000003U
+#define MCPWM_GEN2_B_UT1_S  10
+/** MCPWM_GEN2_B_DTEZ : R/W; bitpos: [13:12]; default: 0;
+ *  Action on PWM2B triggered by event TEZ when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_DTEZ    0x00000003U
+#define MCPWM_GEN2_B_DTEZ_M  (MCPWM_GEN2_B_DTEZ_V << MCPWM_GEN2_B_DTEZ_S)
+#define MCPWM_GEN2_B_DTEZ_V  0x00000003U
+#define MCPWM_GEN2_B_DTEZ_S  12
+/** MCPWM_GEN2_B_DTEP : R/W; bitpos: [15:14]; default: 0;
+ *  Action on PWM2B triggered by event TEP when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_DTEP    0x00000003U
+#define MCPWM_GEN2_B_DTEP_M  (MCPWM_GEN2_B_DTEP_V << MCPWM_GEN2_B_DTEP_S)
+#define MCPWM_GEN2_B_DTEP_V  0x00000003U
+#define MCPWM_GEN2_B_DTEP_S  14
+/** MCPWM_GEN2_B_DTEA : R/W; bitpos: [17:16]; default: 0;
+ *  Action on PWM2B triggered by event TEA when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_DTEA    0x00000003U
+#define MCPWM_GEN2_B_DTEA_M  (MCPWM_GEN2_B_DTEA_V << MCPWM_GEN2_B_DTEA_S)
+#define MCPWM_GEN2_B_DTEA_V  0x00000003U
+#define MCPWM_GEN2_B_DTEA_S  16
+/** MCPWM_GEN2_B_DTEB : R/W; bitpos: [19:18]; default: 0;
+ *  Action on PWM2B triggered by event TEB when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_DTEB    0x00000003U
+#define MCPWM_GEN2_B_DTEB_M  (MCPWM_GEN2_B_DTEB_V << MCPWM_GEN2_B_DTEB_S)
+#define MCPWM_GEN2_B_DTEB_V  0x00000003U
+#define MCPWM_GEN2_B_DTEB_S  18
+/** MCPWM_GEN2_B_DT0 : R/W; bitpos: [21:20]; default: 0;
+ *  Action on PWM2B triggered by event_t0 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_DT0    0x00000003U
+#define MCPWM_GEN2_B_DT0_M  (MCPWM_GEN2_B_DT0_V << MCPWM_GEN2_B_DT0_S)
+#define MCPWM_GEN2_B_DT0_V  0x00000003U
+#define MCPWM_GEN2_B_DT0_S  20
+/** MCPWM_GEN2_B_DT1 : R/W; bitpos: [23:22]; default: 0;
+ *  Action on PWM2B triggered by event_t1 when timer decreasing. 0: no change, 1: low,
+ *  2: high, 3: toggle
+ */
+#define MCPWM_GEN2_B_DT1    0x00000003U
+#define MCPWM_GEN2_B_DT1_M  (MCPWM_GEN2_B_DT1_V << MCPWM_GEN2_B_DT1_S)
+#define MCPWM_GEN2_B_DT1_V  0x00000003U
+#define MCPWM_GEN2_B_DT1_S  22
+
+/** MCPWM_DT2_CFG_REG register
+ *  PWM generator 2 dead time type selection and configuration
+ */
+#define MCPWM_DT2_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0xc8)
+/** MCPWM_DT2_FED_UPMETHOD : R/W; bitpos: [3:0]; default: 0;
+ *  Update method for FED (falling edge delay) active register.  0: immediate,when bit0
+ *  is set to 1: tez, when bit1 is set to 1:tep,  when bit2 is set to 1: sync, when
+ *  bit3 is set to 1: disable the update
+ */
+#define MCPWM_DT2_FED_UPMETHOD    0x0000000FU
+#define MCPWM_DT2_FED_UPMETHOD_M  (MCPWM_DT2_FED_UPMETHOD_V << MCPWM_DT2_FED_UPMETHOD_S)
+#define MCPWM_DT2_FED_UPMETHOD_V  0x0000000FU
+#define MCPWM_DT2_FED_UPMETHOD_S  0
+/** MCPWM_DT2_RED_UPMETHOD : R/W; bitpos: [7:4]; default: 0;
+ *  Update method for RED (rising edge delay) active register.  0: immediate,when bit0
+ *  is set to 1: tez, when bit1 is set to 1:tep,  when bit2 is set to 1: sync, when
+ *  bit3 is set to 1: disable the update
+ */
+#define MCPWM_DT2_RED_UPMETHOD    0x0000000FU
+#define MCPWM_DT2_RED_UPMETHOD_M  (MCPWM_DT2_RED_UPMETHOD_V << MCPWM_DT2_RED_UPMETHOD_S)
+#define MCPWM_DT2_RED_UPMETHOD_V  0x0000000FU
+#define MCPWM_DT2_RED_UPMETHOD_S  4
+/** MCPWM_DT2_DEB_MODE : R/W; bitpos: [8]; default: 0;
+ *  S8 in table, dual-edge B mode, 0: fed/red take effect on different path separately,
+ *  1: fed/red take effect on B path, A out is in bypass or dulpB mode
+ */
+#define MCPWM_DT2_DEB_MODE    (BIT(8))
+#define MCPWM_DT2_DEB_MODE_M  (MCPWM_DT2_DEB_MODE_V << MCPWM_DT2_DEB_MODE_S)
+#define MCPWM_DT2_DEB_MODE_V  0x00000001U
+#define MCPWM_DT2_DEB_MODE_S  8
+/** MCPWM_DT2_A_OUTSWAP : R/W; bitpos: [9]; default: 0;
+ *  S6 in table
+ */
+#define MCPWM_DT2_A_OUTSWAP    (BIT(9))
+#define MCPWM_DT2_A_OUTSWAP_M  (MCPWM_DT2_A_OUTSWAP_V << MCPWM_DT2_A_OUTSWAP_S)
+#define MCPWM_DT2_A_OUTSWAP_V  0x00000001U
+#define MCPWM_DT2_A_OUTSWAP_S  9
+/** MCPWM_DT2_B_OUTSWAP : R/W; bitpos: [10]; default: 0;
+ *  S7 in table
+ */
+#define MCPWM_DT2_B_OUTSWAP    (BIT(10))
+#define MCPWM_DT2_B_OUTSWAP_M  (MCPWM_DT2_B_OUTSWAP_V << MCPWM_DT2_B_OUTSWAP_S)
+#define MCPWM_DT2_B_OUTSWAP_V  0x00000001U
+#define MCPWM_DT2_B_OUTSWAP_S  10
+/** MCPWM_DT2_RED_INSEL : R/W; bitpos: [11]; default: 0;
+ *  S4 in table
+ */
+#define MCPWM_DT2_RED_INSEL    (BIT(11))
+#define MCPWM_DT2_RED_INSEL_M  (MCPWM_DT2_RED_INSEL_V << MCPWM_DT2_RED_INSEL_S)
+#define MCPWM_DT2_RED_INSEL_V  0x00000001U
+#define MCPWM_DT2_RED_INSEL_S  11
+/** MCPWM_DT2_FED_INSEL : R/W; bitpos: [12]; default: 0;
+ *  S5 in table
+ */
+#define MCPWM_DT2_FED_INSEL    (BIT(12))
+#define MCPWM_DT2_FED_INSEL_M  (MCPWM_DT2_FED_INSEL_V << MCPWM_DT2_FED_INSEL_S)
+#define MCPWM_DT2_FED_INSEL_V  0x00000001U
+#define MCPWM_DT2_FED_INSEL_S  12
+/** MCPWM_DT2_RED_OUTINVERT : R/W; bitpos: [13]; default: 0;
+ *  S2 in table
+ */
+#define MCPWM_DT2_RED_OUTINVERT    (BIT(13))
+#define MCPWM_DT2_RED_OUTINVERT_M  (MCPWM_DT2_RED_OUTINVERT_V << MCPWM_DT2_RED_OUTINVERT_S)
+#define MCPWM_DT2_RED_OUTINVERT_V  0x00000001U
+#define MCPWM_DT2_RED_OUTINVERT_S  13
+/** MCPWM_DT2_FED_OUTINVERT : R/W; bitpos: [14]; default: 0;
+ *  S3 in table
+ */
+#define MCPWM_DT2_FED_OUTINVERT    (BIT(14))
+#define MCPWM_DT2_FED_OUTINVERT_M  (MCPWM_DT2_FED_OUTINVERT_V << MCPWM_DT2_FED_OUTINVERT_S)
+#define MCPWM_DT2_FED_OUTINVERT_V  0x00000001U
+#define MCPWM_DT2_FED_OUTINVERT_S  14
+/** MCPWM_DT2_A_OUTBYPASS : R/W; bitpos: [15]; default: 1;
+ *  S1 in table
+ */
+#define MCPWM_DT2_A_OUTBYPASS    (BIT(15))
+#define MCPWM_DT2_A_OUTBYPASS_M  (MCPWM_DT2_A_OUTBYPASS_V << MCPWM_DT2_A_OUTBYPASS_S)
+#define MCPWM_DT2_A_OUTBYPASS_V  0x00000001U
+#define MCPWM_DT2_A_OUTBYPASS_S  15
+/** MCPWM_DT2_B_OUTBYPASS : R/W; bitpos: [16]; default: 1;
+ *  S0 in table
+ */
+#define MCPWM_DT2_B_OUTBYPASS    (BIT(16))
+#define MCPWM_DT2_B_OUTBYPASS_M  (MCPWM_DT2_B_OUTBYPASS_V << MCPWM_DT2_B_OUTBYPASS_S)
+#define MCPWM_DT2_B_OUTBYPASS_V  0x00000001U
+#define MCPWM_DT2_B_OUTBYPASS_S  16
+/** MCPWM_DT2_CLK_SEL : R/W; bitpos: [17]; default: 0;
+ *  Dead time clock selection. 0: PWM_clk, 1: PT_clk
+ */
+#define MCPWM_DT2_CLK_SEL    (BIT(17))
+#define MCPWM_DT2_CLK_SEL_M  (MCPWM_DT2_CLK_SEL_V << MCPWM_DT2_CLK_SEL_S)
+#define MCPWM_DT2_CLK_SEL_V  0x00000001U
+#define MCPWM_DT2_CLK_SEL_S  17
+
+/** MCPWM_DT2_FED_CFG_REG register
+ *  PWM generator 2 shadow register for falling edge delay (FED).
+ */
+#define MCPWM_DT2_FED_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0xcc)
+/** MCPWM_DT2_FED : R/W; bitpos: [15:0]; default: 0;
+ *  Shadow register for FED
+ */
+#define MCPWM_DT2_FED    0x0000FFFFU
+#define MCPWM_DT2_FED_M  (MCPWM_DT2_FED_V << MCPWM_DT2_FED_S)
+#define MCPWM_DT2_FED_V  0x0000FFFFU
+#define MCPWM_DT2_FED_S  0
+
+/** MCPWM_DT2_RED_CFG_REG register
+ *  PWM generator 2 shadow register for rising edge delay (RED).
+ */
+#define MCPWM_DT2_RED_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0xd0)
+/** MCPWM_DT2_RED : R/W; bitpos: [15:0]; default: 0;
+ *  Shadow register for RED
+ */
+#define MCPWM_DT2_RED    0x0000FFFFU
+#define MCPWM_DT2_RED_M  (MCPWM_DT2_RED_V << MCPWM_DT2_RED_S)
+#define MCPWM_DT2_RED_V  0x0000FFFFU
+#define MCPWM_DT2_RED_S  0
+
+/** MCPWM_CARRIER2_CFG_REG register
+ *  PWM generator 2 carrier enable and configuratoin
+ */
+#define MCPWM_CARRIER2_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0xd4)
+/** MCPWM_CARRIER2_EN : R/W; bitpos: [0]; default: 0;
+ *  When set, carrier2 function is enabled. When cleared, carrier2 is bypassed
+ */
+#define MCPWM_CARRIER2_EN    (BIT(0))
+#define MCPWM_CARRIER2_EN_M  (MCPWM_CARRIER2_EN_V << MCPWM_CARRIER2_EN_S)
+#define MCPWM_CARRIER2_EN_V  0x00000001U
+#define MCPWM_CARRIER2_EN_S  0
+/** MCPWM_CARRIER2_PRESCALE : R/W; bitpos: [4:1]; default: 0;
+ *  PWM carrier2 clock (PC_clk) prescale value. Period of PC_clk = period of PWM_clk *
+ *  (PWM_CARRIER0_PRESCALE + 1)
+ */
+#define MCPWM_CARRIER2_PRESCALE    0x0000000FU
+#define MCPWM_CARRIER2_PRESCALE_M  (MCPWM_CARRIER2_PRESCALE_V << MCPWM_CARRIER2_PRESCALE_S)
+#define MCPWM_CARRIER2_PRESCALE_V  0x0000000FU
+#define MCPWM_CARRIER2_PRESCALE_S  1
+/** MCPWM_CARRIER2_DUTY : R/W; bitpos: [7:5]; default: 0;
+ *  carrier duty selection. Duty = PWM_CARRIER0_DUTY / 8
+ */
+#define MCPWM_CARRIER2_DUTY    0x00000007U
+#define MCPWM_CARRIER2_DUTY_M  (MCPWM_CARRIER2_DUTY_V << MCPWM_CARRIER2_DUTY_S)
+#define MCPWM_CARRIER2_DUTY_V  0x00000007U
+#define MCPWM_CARRIER2_DUTY_S  5
+/** MCPWM_CARRIER2_OSHTWTH : R/W; bitpos: [11:8]; default: 0;
+ *  width of the first pulse in number of periods of the carrier
+ */
+#define MCPWM_CARRIER2_OSHTWTH    0x0000000FU
+#define MCPWM_CARRIER2_OSHTWTH_M  (MCPWM_CARRIER2_OSHTWTH_V << MCPWM_CARRIER2_OSHTWTH_S)
+#define MCPWM_CARRIER2_OSHTWTH_V  0x0000000FU
+#define MCPWM_CARRIER2_OSHTWTH_S  8
+/** MCPWM_CARRIER2_OUT_INVERT : R/W; bitpos: [12]; default: 0;
+ *  when set, invert the output of PWM2A and PWM2B for this submodule
+ */
+#define MCPWM_CARRIER2_OUT_INVERT    (BIT(12))
+#define MCPWM_CARRIER2_OUT_INVERT_M  (MCPWM_CARRIER2_OUT_INVERT_V << MCPWM_CARRIER2_OUT_INVERT_S)
+#define MCPWM_CARRIER2_OUT_INVERT_V  0x00000001U
+#define MCPWM_CARRIER2_OUT_INVERT_S  12
+/** MCPWM_CARRIER2_IN_INVERT : R/W; bitpos: [13]; default: 0;
+ *  when set, invert the input of PWM2A and PWM2B for this submodule
+ */
+#define MCPWM_CARRIER2_IN_INVERT    (BIT(13))
+#define MCPWM_CARRIER2_IN_INVERT_M  (MCPWM_CARRIER2_IN_INVERT_V << MCPWM_CARRIER2_IN_INVERT_S)
+#define MCPWM_CARRIER2_IN_INVERT_V  0x00000001U
+#define MCPWM_CARRIER2_IN_INVERT_S  13
+
+/** MCPWM_FH2_CFG0_REG register
+ *  Actions on PWM2A and PWM2B trip events
+ */
+#define MCPWM_FH2_CFG0_REG(i) (DR_REG_MCPWM_BASE(i) + 0xd8)
+/** MCPWM_FH2_SW_CBC : R/W; bitpos: [0]; default: 0;
+ *  Enable register for software force cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH2_SW_CBC    (BIT(0))
+#define MCPWM_FH2_SW_CBC_M  (MCPWM_FH2_SW_CBC_V << MCPWM_FH2_SW_CBC_S)
+#define MCPWM_FH2_SW_CBC_V  0x00000001U
+#define MCPWM_FH2_SW_CBC_S  0
+/** MCPWM_FH2_F2_CBC : R/W; bitpos: [1]; default: 0;
+ *  fault_event2 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH2_F2_CBC    (BIT(1))
+#define MCPWM_FH2_F2_CBC_M  (MCPWM_FH2_F2_CBC_V << MCPWM_FH2_F2_CBC_S)
+#define MCPWM_FH2_F2_CBC_V  0x00000001U
+#define MCPWM_FH2_F2_CBC_S  1
+/** MCPWM_FH2_F1_CBC : R/W; bitpos: [2]; default: 0;
+ *  fault_event1 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH2_F1_CBC    (BIT(2))
+#define MCPWM_FH2_F1_CBC_M  (MCPWM_FH2_F1_CBC_V << MCPWM_FH2_F1_CBC_S)
+#define MCPWM_FH2_F1_CBC_V  0x00000001U
+#define MCPWM_FH2_F1_CBC_S  2
+/** MCPWM_FH2_F0_CBC : R/W; bitpos: [3]; default: 0;
+ *  fault_event0 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH2_F0_CBC    (BIT(3))
+#define MCPWM_FH2_F0_CBC_M  (MCPWM_FH2_F0_CBC_V << MCPWM_FH2_F0_CBC_S)
+#define MCPWM_FH2_F0_CBC_V  0x00000001U
+#define MCPWM_FH2_F0_CBC_S  3
+/** MCPWM_FH2_SW_OST : R/W; bitpos: [4]; default: 0;
+ *  Enable register for software force one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH2_SW_OST    (BIT(4))
+#define MCPWM_FH2_SW_OST_M  (MCPWM_FH2_SW_OST_V << MCPWM_FH2_SW_OST_S)
+#define MCPWM_FH2_SW_OST_V  0x00000001U
+#define MCPWM_FH2_SW_OST_S  4
+/** MCPWM_FH2_F2_OST : R/W; bitpos: [5]; default: 0;
+ *  fault_event2 will trigger one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH2_F2_OST    (BIT(5))
+#define MCPWM_FH2_F2_OST_M  (MCPWM_FH2_F2_OST_V << MCPWM_FH2_F2_OST_S)
+#define MCPWM_FH2_F2_OST_V  0x00000001U
+#define MCPWM_FH2_F2_OST_S  5
+/** MCPWM_FH2_F1_OST : R/W; bitpos: [6]; default: 0;
+ *  fault_event1 will trigger one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH2_F1_OST    (BIT(6))
+#define MCPWM_FH2_F1_OST_M  (MCPWM_FH2_F1_OST_V << MCPWM_FH2_F1_OST_S)
+#define MCPWM_FH2_F1_OST_V  0x00000001U
+#define MCPWM_FH2_F1_OST_S  6
+/** MCPWM_FH2_F0_OST : R/W; bitpos: [7]; default: 0;
+ *  fault_event0 will trigger one-shot mode action. 0: disable, 1: enable
+ */
+#define MCPWM_FH2_F0_OST    (BIT(7))
+#define MCPWM_FH2_F0_OST_M  (MCPWM_FH2_F0_OST_V << MCPWM_FH2_F0_OST_S)
+#define MCPWM_FH2_F0_OST_V  0x00000001U
+#define MCPWM_FH2_F0_OST_S  7
+/** MCPWM_FH2_A_CBC_D : R/W; bitpos: [9:8]; default: 0;
+ *  Cycle-by-cycle mode action on PWM2A when fault event occurs and timer is
+ *  decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH2_A_CBC_D    0x00000003U
+#define MCPWM_FH2_A_CBC_D_M  (MCPWM_FH2_A_CBC_D_V << MCPWM_FH2_A_CBC_D_S)
+#define MCPWM_FH2_A_CBC_D_V  0x00000003U
+#define MCPWM_FH2_A_CBC_D_S  8
+/** MCPWM_FH2_A_CBC_U : R/W; bitpos: [11:10]; default: 0;
+ *  Cycle-by-cycle mode action on PWM2A when fault event occurs and timer is
+ *  increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH2_A_CBC_U    0x00000003U
+#define MCPWM_FH2_A_CBC_U_M  (MCPWM_FH2_A_CBC_U_V << MCPWM_FH2_A_CBC_U_S)
+#define MCPWM_FH2_A_CBC_U_V  0x00000003U
+#define MCPWM_FH2_A_CBC_U_S  10
+/** MCPWM_FH2_A_OST_D : R/W; bitpos: [13:12]; default: 0;
+ *  One-shot mode action on PWM2A when fault event occurs and timer is decreasing. 0:
+ *  do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH2_A_OST_D    0x00000003U
+#define MCPWM_FH2_A_OST_D_M  (MCPWM_FH2_A_OST_D_V << MCPWM_FH2_A_OST_D_S)
+#define MCPWM_FH2_A_OST_D_V  0x00000003U
+#define MCPWM_FH2_A_OST_D_S  12
+/** MCPWM_FH2_A_OST_U : R/W; bitpos: [15:14]; default: 0;
+ *  One-shot mode action on PWM2A when fault event occurs and timer is increasing. 0:
+ *  do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH2_A_OST_U    0x00000003U
+#define MCPWM_FH2_A_OST_U_M  (MCPWM_FH2_A_OST_U_V << MCPWM_FH2_A_OST_U_S)
+#define MCPWM_FH2_A_OST_U_V  0x00000003U
+#define MCPWM_FH2_A_OST_U_S  14
+/** MCPWM_FH2_B_CBC_D : R/W; bitpos: [17:16]; default: 0;
+ *  Cycle-by-cycle mode action on PWM2B when fault event occurs and timer is
+ *  decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH2_B_CBC_D    0x00000003U
+#define MCPWM_FH2_B_CBC_D_M  (MCPWM_FH2_B_CBC_D_V << MCPWM_FH2_B_CBC_D_S)
+#define MCPWM_FH2_B_CBC_D_V  0x00000003U
+#define MCPWM_FH2_B_CBC_D_S  16
+/** MCPWM_FH2_B_CBC_U : R/W; bitpos: [19:18]; default: 0;
+ *  Cycle-by-cycle mode action on PWM2B when fault event occurs and timer is
+ *  increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH2_B_CBC_U    0x00000003U
+#define MCPWM_FH2_B_CBC_U_M  (MCPWM_FH2_B_CBC_U_V << MCPWM_FH2_B_CBC_U_S)
+#define MCPWM_FH2_B_CBC_U_V  0x00000003U
+#define MCPWM_FH2_B_CBC_U_S  18
+/** MCPWM_FH2_B_OST_D : R/W; bitpos: [21:20]; default: 0;
+ *  One-shot mode action on PWM2B when fault event occurs and timer is decreasing. 0:
+ *  do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH2_B_OST_D    0x00000003U
+#define MCPWM_FH2_B_OST_D_M  (MCPWM_FH2_B_OST_D_V << MCPWM_FH2_B_OST_D_S)
+#define MCPWM_FH2_B_OST_D_V  0x00000003U
+#define MCPWM_FH2_B_OST_D_S  20
+/** MCPWM_FH2_B_OST_U : R/W; bitpos: [23:22]; default: 0;
+ *  One-shot mode action on PWM2B when fault event occurs and timer is increasing. 0:
+ *  do nothing, 1: force low, 2: force high, 3: toggle
+ */
+#define MCPWM_FH2_B_OST_U    0x00000003U
+#define MCPWM_FH2_B_OST_U_M  (MCPWM_FH2_B_OST_U_V << MCPWM_FH2_B_OST_U_S)
+#define MCPWM_FH2_B_OST_U_V  0x00000003U
+#define MCPWM_FH2_B_OST_U_S  22
+
+/** MCPWM_FH2_CFG1_REG register
+ *  Software triggers for fault handler actions
+ */
+#define MCPWM_FH2_CFG1_REG(i) (DR_REG_MCPWM_BASE(i) + 0xdc)
+/** MCPWM_FH2_CLR_OST : R/W; bitpos: [0]; default: 0;
+ *  a rising edge will clear on going one-shot mode action
+ */
+#define MCPWM_FH2_CLR_OST    (BIT(0))
+#define MCPWM_FH2_CLR_OST_M  (MCPWM_FH2_CLR_OST_V << MCPWM_FH2_CLR_OST_S)
+#define MCPWM_FH2_CLR_OST_V  0x00000001U
+#define MCPWM_FH2_CLR_OST_S  0
+/** MCPWM_FH2_CBCPULSE : R/W; bitpos: [2:1]; default: 0;
+ *  cycle-by-cycle mode action refresh moment selection. When bit0 is set to 1: TEZ,
+ *  when bit1 is set to 1:TEP
+ */
+#define MCPWM_FH2_CBCPULSE    0x00000003U
+#define MCPWM_FH2_CBCPULSE_M  (MCPWM_FH2_CBCPULSE_V << MCPWM_FH2_CBCPULSE_S)
+#define MCPWM_FH2_CBCPULSE_V  0x00000003U
+#define MCPWM_FH2_CBCPULSE_S  1
+/** MCPWM_FH2_FORCE_CBC : R/W; bitpos: [3]; default: 0;
+ *  a toggle trigger a cycle-by-cycle mode action
+ */
+#define MCPWM_FH2_FORCE_CBC    (BIT(3))
+#define MCPWM_FH2_FORCE_CBC_M  (MCPWM_FH2_FORCE_CBC_V << MCPWM_FH2_FORCE_CBC_S)
+#define MCPWM_FH2_FORCE_CBC_V  0x00000001U
+#define MCPWM_FH2_FORCE_CBC_S  3
+/** MCPWM_FH2_FORCE_OST : R/W; bitpos: [4]; default: 0;
+ *  a toggle (software negate its value) triggers a one-shot mode action
+ */
+#define MCPWM_FH2_FORCE_OST    (BIT(4))
+#define MCPWM_FH2_FORCE_OST_M  (MCPWM_FH2_FORCE_OST_V << MCPWM_FH2_FORCE_OST_S)
+#define MCPWM_FH2_FORCE_OST_V  0x00000001U
+#define MCPWM_FH2_FORCE_OST_S  4
+
+/** MCPWM_FH2_STATUS_REG register
+ *  Status of fault events.
+ */
+#define MCPWM_FH2_STATUS_REG(i) (DR_REG_MCPWM_BASE(i) + 0xe0)
+/** MCPWM_FH2_CBC_ON : RO; bitpos: [0]; default: 0;
+ *  Set and reset by hardware. If set, a cycle-by-cycle mode action is on going
+ */
+#define MCPWM_FH2_CBC_ON    (BIT(0))
+#define MCPWM_FH2_CBC_ON_M  (MCPWM_FH2_CBC_ON_V << MCPWM_FH2_CBC_ON_S)
+#define MCPWM_FH2_CBC_ON_V  0x00000001U
+#define MCPWM_FH2_CBC_ON_S  0
+/** MCPWM_FH2_OST_ON : RO; bitpos: [1]; default: 0;
+ *  Set and reset by hardware. If set, an one-shot mode action is on going
+ */
+#define MCPWM_FH2_OST_ON    (BIT(1))
+#define MCPWM_FH2_OST_ON_M  (MCPWM_FH2_OST_ON_V << MCPWM_FH2_OST_ON_S)
+#define MCPWM_FH2_OST_ON_V  0x00000001U
+#define MCPWM_FH2_OST_ON_S  1
+
+/** MCPWM_FAULT_DETECT_REG register
+ *  Fault detection configuration and status
+ */
+#define MCPWM_FAULT_DETECT_REG(i) (DR_REG_MCPWM_BASE(i) + 0xe4)
+/** MCPWM_F0_EN : R/W; bitpos: [0]; default: 0;
+ *  When set, fault_event0 generation is enabled
+ */
+#define MCPWM_F0_EN    (BIT(0))
+#define MCPWM_F0_EN_M  (MCPWM_F0_EN_V << MCPWM_F0_EN_S)
+#define MCPWM_F0_EN_V  0x00000001U
+#define MCPWM_F0_EN_S  0
+/** MCPWM_F1_EN : R/W; bitpos: [1]; default: 0;
+ *  When set, fault_event1 generation is enabled
+ */
+#define MCPWM_F1_EN    (BIT(1))
+#define MCPWM_F1_EN_M  (MCPWM_F1_EN_V << MCPWM_F1_EN_S)
+#define MCPWM_F1_EN_V  0x00000001U
+#define MCPWM_F1_EN_S  1
+/** MCPWM_F2_EN : R/W; bitpos: [2]; default: 0;
+ *  When set, fault_event2 generation is enabled
+ */
+#define MCPWM_F2_EN    (BIT(2))
+#define MCPWM_F2_EN_M  (MCPWM_F2_EN_V << MCPWM_F2_EN_S)
+#define MCPWM_F2_EN_V  0x00000001U
+#define MCPWM_F2_EN_S  2
+/** MCPWM_F0_POLE : R/W; bitpos: [3]; default: 0;
+ *  Set fault_event0 trigger polarity on FAULT2 source from GPIO matrix. 0: level low,
+ *  1: level high
+ */
+#define MCPWM_F0_POLE    (BIT(3))
+#define MCPWM_F0_POLE_M  (MCPWM_F0_POLE_V << MCPWM_F0_POLE_S)
+#define MCPWM_F0_POLE_V  0x00000001U
+#define MCPWM_F0_POLE_S  3
+/** MCPWM_F1_POLE : R/W; bitpos: [4]; default: 0;
+ *  Set fault_event1 trigger polarity on FAULT2 source from GPIO matrix. 0: level low,
+ *  1: level high
+ */
+#define MCPWM_F1_POLE    (BIT(4))
+#define MCPWM_F1_POLE_M  (MCPWM_F1_POLE_V << MCPWM_F1_POLE_S)
+#define MCPWM_F1_POLE_V  0x00000001U
+#define MCPWM_F1_POLE_S  4
+/** MCPWM_F2_POLE : R/W; bitpos: [5]; default: 0;
+ *  Set fault_event2 trigger polarity on FAULT2 source from GPIO matrix. 0: level low,
+ *  1: level high
+ */
+#define MCPWM_F2_POLE    (BIT(5))
+#define MCPWM_F2_POLE_M  (MCPWM_F2_POLE_V << MCPWM_F2_POLE_S)
+#define MCPWM_F2_POLE_V  0x00000001U
+#define MCPWM_F2_POLE_S  5
+/** MCPWM_EVENT_F0 : RO; bitpos: [6]; default: 0;
+ *  Set and reset by hardware. If set, fault_event0 is on going
+ */
+#define MCPWM_EVENT_F0    (BIT(6))
+#define MCPWM_EVENT_F0_M  (MCPWM_EVENT_F0_V << MCPWM_EVENT_F0_S)
+#define MCPWM_EVENT_F0_V  0x00000001U
+#define MCPWM_EVENT_F0_S  6
+/** MCPWM_EVENT_F1 : RO; bitpos: [7]; default: 0;
+ *  Set and reset by hardware. If set, fault_event1 is on going
+ */
+#define MCPWM_EVENT_F1    (BIT(7))
+#define MCPWM_EVENT_F1_M  (MCPWM_EVENT_F1_V << MCPWM_EVENT_F1_S)
+#define MCPWM_EVENT_F1_V  0x00000001U
+#define MCPWM_EVENT_F1_S  7
+/** MCPWM_EVENT_F2 : RO; bitpos: [8]; default: 0;
+ *  Set and reset by hardware. If set, fault_event2 is on going
+ */
+#define MCPWM_EVENT_F2    (BIT(8))
+#define MCPWM_EVENT_F2_M  (MCPWM_EVENT_F2_V << MCPWM_EVENT_F2_S)
+#define MCPWM_EVENT_F2_V  0x00000001U
+#define MCPWM_EVENT_F2_S  8
+
+/** MCPWM_CAP_TIMER_CFG_REG register
+ *  Configure capture timer
+ */
+#define MCPWM_CAP_TIMER_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0xe8)
+/** MCPWM_CAP_TIMER_EN : R/W; bitpos: [0]; default: 0;
+ *  When set, capture timer incrementing under APB_clk is enabled.
+ */
+#define MCPWM_CAP_TIMER_EN    (BIT(0))
+#define MCPWM_CAP_TIMER_EN_M  (MCPWM_CAP_TIMER_EN_V << MCPWM_CAP_TIMER_EN_S)
+#define MCPWM_CAP_TIMER_EN_V  0x00000001U
+#define MCPWM_CAP_TIMER_EN_S  0
+/** MCPWM_CAP_SYNCI_EN : R/W; bitpos: [1]; default: 0;
+ *  When set, capture timer sync is enabled.
+ */
+#define MCPWM_CAP_SYNCI_EN    (BIT(1))
+#define MCPWM_CAP_SYNCI_EN_M  (MCPWM_CAP_SYNCI_EN_V << MCPWM_CAP_SYNCI_EN_S)
+#define MCPWM_CAP_SYNCI_EN_V  0x00000001U
+#define MCPWM_CAP_SYNCI_EN_S  1
+/** MCPWM_CAP_SYNCI_SEL : R/W; bitpos: [4:2]; default: 0;
+ *  capture module sync input selection. 0: none, 1: timer0 sync_out, 2: timer1
+ *  sync_out, 3: timer2 sync_out, 4: SYNC0 from GPIO matrix, 5: SYNC1 from GPIO matrix,
+ *  6: SYNC2 from GPIO matrix
+ */
+#define MCPWM_CAP_SYNCI_SEL    0x00000007U
+#define MCPWM_CAP_SYNCI_SEL_M  (MCPWM_CAP_SYNCI_SEL_V << MCPWM_CAP_SYNCI_SEL_S)
+#define MCPWM_CAP_SYNCI_SEL_V  0x00000007U
+#define MCPWM_CAP_SYNCI_SEL_S  2
+/** MCPWM_CAP_SYNC_SW : WT; bitpos: [5]; default: 0;
+ *  When reg_cap_synci_en is 1,  write 1 will trigger a capture timer sync, capture
+ *  timer is loaded with value in phase register.
+ */
+#define MCPWM_CAP_SYNC_SW    (BIT(5))
+#define MCPWM_CAP_SYNC_SW_M  (MCPWM_CAP_SYNC_SW_V << MCPWM_CAP_SYNC_SW_S)
+#define MCPWM_CAP_SYNC_SW_V  0x00000001U
+#define MCPWM_CAP_SYNC_SW_S  5
+
+/** MCPWM_CAP_TIMER_PHASE_REG register
+ *  Phase for capture timer sync
+ */
+#define MCPWM_CAP_TIMER_PHASE_REG(i) (DR_REG_MCPWM_BASE(i) + 0xec)
+/** MCPWM_CAP_TIMER_PHASE : R/W; bitpos: [31:0]; default: 0;
+ *  Phase value for capture timer sync operation.
+ */
+#define MCPWM_CAP_TIMER_PHASE    0xFFFFFFFFU
+#define MCPWM_CAP_TIMER_PHASE_M  (MCPWM_CAP_TIMER_PHASE_V << MCPWM_CAP_TIMER_PHASE_S)
+#define MCPWM_CAP_TIMER_PHASE_V  0xFFFFFFFFU
+#define MCPWM_CAP_TIMER_PHASE_S  0
+
+/** MCPWM_CAP_CH0_CFG_REG register
+ *  Capture channel 0 configuration and enable
+ */
+#define MCPWM_CAP_CH0_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0xf0)
+/** MCPWM_CAP0_EN : R/W; bitpos: [0]; default: 0;
+ *  When set, capture on channel 0 is enabled
+ */
+#define MCPWM_CAP0_EN    (BIT(0))
+#define MCPWM_CAP0_EN_M  (MCPWM_CAP0_EN_V << MCPWM_CAP0_EN_S)
+#define MCPWM_CAP0_EN_V  0x00000001U
+#define MCPWM_CAP0_EN_S  0
+/** MCPWM_CAP0_MODE : R/W; bitpos: [2:1]; default: 0;
+ *  Edge of capture on channel 0 after prescaling. When bit0 is set to 1: enable
+ *  capture on the negative edge, When bit1 is set to 1: enable capture on the positive
+ *  edge.
+ */
+#define MCPWM_CAP0_MODE    0x00000003U
+#define MCPWM_CAP0_MODE_M  (MCPWM_CAP0_MODE_V << MCPWM_CAP0_MODE_S)
+#define MCPWM_CAP0_MODE_V  0x00000003U
+#define MCPWM_CAP0_MODE_S  1
+/** MCPWM_CAP0_PRESCALE : R/W; bitpos: [10:3]; default: 0;
+ *  Value of prescaling on possitive edge of CAP0. Prescale value = PWM_CAP0_PRESCALE +
+ *  1
+ */
+#define MCPWM_CAP0_PRESCALE    0x000000FFU
+#define MCPWM_CAP0_PRESCALE_M  (MCPWM_CAP0_PRESCALE_V << MCPWM_CAP0_PRESCALE_S)
+#define MCPWM_CAP0_PRESCALE_V  0x000000FFU
+#define MCPWM_CAP0_PRESCALE_S  3
+/** MCPWM_CAP0_IN_INVERT : R/W; bitpos: [11]; default: 0;
+ *  when set, CAP0 form GPIO matrix is inverted before prescale
+ */
+#define MCPWM_CAP0_IN_INVERT    (BIT(11))
+#define MCPWM_CAP0_IN_INVERT_M  (MCPWM_CAP0_IN_INVERT_V << MCPWM_CAP0_IN_INVERT_S)
+#define MCPWM_CAP0_IN_INVERT_V  0x00000001U
+#define MCPWM_CAP0_IN_INVERT_S  11
+/** MCPWM_CAP0_SW : WT; bitpos: [12]; default: 0;
+ *  Write 1 will trigger a software forced capture on channel 0
+ */
+#define MCPWM_CAP0_SW    (BIT(12))
+#define MCPWM_CAP0_SW_M  (MCPWM_CAP0_SW_V << MCPWM_CAP0_SW_S)
+#define MCPWM_CAP0_SW_V  0x00000001U
+#define MCPWM_CAP0_SW_S  12
+
+/** MCPWM_CAP_CH1_CFG_REG register
+ *  Capture channel 1 configuration and enable
+ */
+#define MCPWM_CAP_CH1_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0xf4)
+/** MCPWM_CAP1_EN : R/W; bitpos: [0]; default: 0;
+ *  When set, capture on channel 2 is enabled
+ */
+#define MCPWM_CAP1_EN    (BIT(0))
+#define MCPWM_CAP1_EN_M  (MCPWM_CAP1_EN_V << MCPWM_CAP1_EN_S)
+#define MCPWM_CAP1_EN_V  0x00000001U
+#define MCPWM_CAP1_EN_S  0
+/** MCPWM_CAP1_MODE : R/W; bitpos: [2:1]; default: 0;
+ *  Edge of capture on channel 1 after prescaling. When bit0 is set to 1: enable
+ *  capture on the negative edge, When bit1 is set to 1: enable capture on the positive
+ *  edge.
+ */
+#define MCPWM_CAP1_MODE    0x00000003U
+#define MCPWM_CAP1_MODE_M  (MCPWM_CAP1_MODE_V << MCPWM_CAP1_MODE_S)
+#define MCPWM_CAP1_MODE_V  0x00000003U
+#define MCPWM_CAP1_MODE_S  1
+/** MCPWM_CAP1_PRESCALE : R/W; bitpos: [10:3]; default: 0;
+ *  Value of prescaling on possitive edge of CAP1. Prescale value = PWM_CAP1_PRESCALE +
+ *  1
+ */
+#define MCPWM_CAP1_PRESCALE    0x000000FFU
+#define MCPWM_CAP1_PRESCALE_M  (MCPWM_CAP1_PRESCALE_V << MCPWM_CAP1_PRESCALE_S)
+#define MCPWM_CAP1_PRESCALE_V  0x000000FFU
+#define MCPWM_CAP1_PRESCALE_S  3
+/** MCPWM_CAP1_IN_INVERT : R/W; bitpos: [11]; default: 0;
+ *  when set, CAP1 form GPIO matrix is inverted before prescale
+ */
+#define MCPWM_CAP1_IN_INVERT    (BIT(11))
+#define MCPWM_CAP1_IN_INVERT_M  (MCPWM_CAP1_IN_INVERT_V << MCPWM_CAP1_IN_INVERT_S)
+#define MCPWM_CAP1_IN_INVERT_V  0x00000001U
+#define MCPWM_CAP1_IN_INVERT_S  11
+/** MCPWM_CAP1_SW : WT; bitpos: [12]; default: 0;
+ *  Write 1 will trigger a software forced capture on channel 1
+ */
+#define MCPWM_CAP1_SW    (BIT(12))
+#define MCPWM_CAP1_SW_M  (MCPWM_CAP1_SW_V << MCPWM_CAP1_SW_S)
+#define MCPWM_CAP1_SW_V  0x00000001U
+#define MCPWM_CAP1_SW_S  12
+
+/** MCPWM_CAP_CH2_CFG_REG register
+ *  Capture channel 2 configuration and enable
+ */
+#define MCPWM_CAP_CH2_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0xf8)
+/** MCPWM_CAP2_EN : R/W; bitpos: [0]; default: 0;
+ *  When set, capture on channel 2 is enabled
+ */
+#define MCPWM_CAP2_EN    (BIT(0))
+#define MCPWM_CAP2_EN_M  (MCPWM_CAP2_EN_V << MCPWM_CAP2_EN_S)
+#define MCPWM_CAP2_EN_V  0x00000001U
+#define MCPWM_CAP2_EN_S  0
+/** MCPWM_CAP2_MODE : R/W; bitpos: [2:1]; default: 0;
+ *  Edge of capture on channel 2 after prescaling. When bit0 is set to 1: enable
+ *  capture on the negative edge, When bit1 is set to 1: enable capture on the positive
+ *  edge.
+ */
+#define MCPWM_CAP2_MODE    0x00000003U
+#define MCPWM_CAP2_MODE_M  (MCPWM_CAP2_MODE_V << MCPWM_CAP2_MODE_S)
+#define MCPWM_CAP2_MODE_V  0x00000003U
+#define MCPWM_CAP2_MODE_S  1
+/** MCPWM_CAP2_PRESCALE : R/W; bitpos: [10:3]; default: 0;
+ *  Value of prescaling on possitive edge of CAP2. Prescale value = PWM_CAP2_PRESCALE +
+ *  1
+ */
+#define MCPWM_CAP2_PRESCALE    0x000000FFU
+#define MCPWM_CAP2_PRESCALE_M  (MCPWM_CAP2_PRESCALE_V << MCPWM_CAP2_PRESCALE_S)
+#define MCPWM_CAP2_PRESCALE_V  0x000000FFU
+#define MCPWM_CAP2_PRESCALE_S  3
+/** MCPWM_CAP2_IN_INVERT : R/W; bitpos: [11]; default: 0;
+ *  when set, CAP2 form GPIO matrix is inverted before prescale
+ */
+#define MCPWM_CAP2_IN_INVERT    (BIT(11))
+#define MCPWM_CAP2_IN_INVERT_M  (MCPWM_CAP2_IN_INVERT_V << MCPWM_CAP2_IN_INVERT_S)
+#define MCPWM_CAP2_IN_INVERT_V  0x00000001U
+#define MCPWM_CAP2_IN_INVERT_S  11
+/** MCPWM_CAP2_SW : WT; bitpos: [12]; default: 0;
+ *  Write 1 will trigger a software forced capture on channel 2
+ */
+#define MCPWM_CAP2_SW    (BIT(12))
+#define MCPWM_CAP2_SW_M  (MCPWM_CAP2_SW_V << MCPWM_CAP2_SW_S)
+#define MCPWM_CAP2_SW_V  0x00000001U
+#define MCPWM_CAP2_SW_S  12
+
+/** MCPWM_CAP_CH0_REG register
+ *  ch0 capture value status register
+ */
+#define MCPWM_CAP_CH0_REG(i) (DR_REG_MCPWM_BASE(i) + 0xfc)
+/** MCPWM_CAP0_VALUE : RO; bitpos: [31:0]; default: 0;
+ *  Value of last capture on channel 0
+ */
+#define MCPWM_CAP0_VALUE    0xFFFFFFFFU
+#define MCPWM_CAP0_VALUE_M  (MCPWM_CAP0_VALUE_V << MCPWM_CAP0_VALUE_S)
+#define MCPWM_CAP0_VALUE_V  0xFFFFFFFFU
+#define MCPWM_CAP0_VALUE_S  0
+
+/** MCPWM_CAP_CH1_REG register
+ *  ch1 capture value status register
+ */
+#define MCPWM_CAP_CH1_REG(i) (DR_REG_MCPWM_BASE(i) + 0x100)
+/** MCPWM_CAP1_VALUE : RO; bitpos: [31:0]; default: 0;
+ *  Value of last capture on channel 1
+ */
+#define MCPWM_CAP1_VALUE    0xFFFFFFFFU
+#define MCPWM_CAP1_VALUE_M  (MCPWM_CAP1_VALUE_V << MCPWM_CAP1_VALUE_S)
+#define MCPWM_CAP1_VALUE_V  0xFFFFFFFFU
+#define MCPWM_CAP1_VALUE_S  0
+
+/** MCPWM_CAP_CH2_REG register
+ *  ch2 capture value status register
+ */
+#define MCPWM_CAP_CH2_REG(i) (DR_REG_MCPWM_BASE(i) + 0x104)
+/** MCPWM_CAP2_VALUE : RO; bitpos: [31:0]; default: 0;
+ *  Value of last capture on channel 2
+ */
+#define MCPWM_CAP2_VALUE    0xFFFFFFFFU
+#define MCPWM_CAP2_VALUE_M  (MCPWM_CAP2_VALUE_V << MCPWM_CAP2_VALUE_S)
+#define MCPWM_CAP2_VALUE_V  0xFFFFFFFFU
+#define MCPWM_CAP2_VALUE_S  0
+
+/** MCPWM_CAP_STATUS_REG register
+ *  Edge of last capture trigger
+ */
+#define MCPWM_CAP_STATUS_REG(i) (DR_REG_MCPWM_BASE(i) + 0x108)
+/** MCPWM_CAP0_EDGE : RO; bitpos: [0]; default: 0;
+ *  Edge of last capture trigger on channel 0, 0: posedge, 1: negedge
+ */
+#define MCPWM_CAP0_EDGE    (BIT(0))
+#define MCPWM_CAP0_EDGE_M  (MCPWM_CAP0_EDGE_V << MCPWM_CAP0_EDGE_S)
+#define MCPWM_CAP0_EDGE_V  0x00000001U
+#define MCPWM_CAP0_EDGE_S  0
+/** MCPWM_CAP1_EDGE : RO; bitpos: [1]; default: 0;
+ *  Edge of last capture trigger on channel 1, 0: posedge, 1: negedge
+ */
+#define MCPWM_CAP1_EDGE    (BIT(1))
+#define MCPWM_CAP1_EDGE_M  (MCPWM_CAP1_EDGE_V << MCPWM_CAP1_EDGE_S)
+#define MCPWM_CAP1_EDGE_V  0x00000001U
+#define MCPWM_CAP1_EDGE_S  1
+/** MCPWM_CAP2_EDGE : RO; bitpos: [2]; default: 0;
+ *  Edge of last capture trigger on channel 2, 0: posedge, 1: negedge
+ */
+#define MCPWM_CAP2_EDGE    (BIT(2))
+#define MCPWM_CAP2_EDGE_M  (MCPWM_CAP2_EDGE_V << MCPWM_CAP2_EDGE_S)
+#define MCPWM_CAP2_EDGE_V  0x00000001U
+#define MCPWM_CAP2_EDGE_S  2
+
+/** MCPWM_UPDATE_CFG_REG register
+ *  Enable update.
+ */
+#define MCPWM_UPDATE_CFG_REG(i) (DR_REG_MCPWM_BASE(i) + 0x10c)
+/** MCPWM_GLOBAL_UP_EN : R/W; bitpos: [0]; default: 1;
+ *  The global enable of update of all active registers in MCPWM module
+ */
+#define MCPWM_GLOBAL_UP_EN    (BIT(0))
+#define MCPWM_GLOBAL_UP_EN_M  (MCPWM_GLOBAL_UP_EN_V << MCPWM_GLOBAL_UP_EN_S)
+#define MCPWM_GLOBAL_UP_EN_V  0x00000001U
+#define MCPWM_GLOBAL_UP_EN_S  0
+/** MCPWM_GLOBAL_FORCE_UP : R/W; bitpos: [1]; default: 0;
+ *  a toggle (software invert its value) will trigger a forced update of all active
+ *  registers in MCPWM module
+ */
+#define MCPWM_GLOBAL_FORCE_UP    (BIT(1))
+#define MCPWM_GLOBAL_FORCE_UP_M  (MCPWM_GLOBAL_FORCE_UP_V << MCPWM_GLOBAL_FORCE_UP_S)
+#define MCPWM_GLOBAL_FORCE_UP_V  0x00000001U
+#define MCPWM_GLOBAL_FORCE_UP_S  1
+/** MCPWM_OP0_UP_EN : R/W; bitpos: [2]; default: 1;
+ *  When set and PWM_GLOBAL_UP_EN is set, update of active registers in PWM operator 0
+ *  are enabled
+ */
+#define MCPWM_OP0_UP_EN    (BIT(2))
+#define MCPWM_OP0_UP_EN_M  (MCPWM_OP0_UP_EN_V << MCPWM_OP0_UP_EN_S)
+#define MCPWM_OP0_UP_EN_V  0x00000001U
+#define MCPWM_OP0_UP_EN_S  2
+/** MCPWM_OP0_FORCE_UP : R/W; bitpos: [3]; default: 0;
+ *  a toggle (software invert its value) will trigger a forced update of active
+ *  registers in PWM operator 0
+ */
+#define MCPWM_OP0_FORCE_UP    (BIT(3))
+#define MCPWM_OP0_FORCE_UP_M  (MCPWM_OP0_FORCE_UP_V << MCPWM_OP0_FORCE_UP_S)
+#define MCPWM_OP0_FORCE_UP_V  0x00000001U
+#define MCPWM_OP0_FORCE_UP_S  3
+/** MCPWM_OP1_UP_EN : R/W; bitpos: [4]; default: 1;
+ *  When set and PWM_GLOBAL_UP_EN is set, update of active registers in PWM operator 1
+ *  are enabled
+ */
+#define MCPWM_OP1_UP_EN    (BIT(4))
+#define MCPWM_OP1_UP_EN_M  (MCPWM_OP1_UP_EN_V << MCPWM_OP1_UP_EN_S)
+#define MCPWM_OP1_UP_EN_V  0x00000001U
+#define MCPWM_OP1_UP_EN_S  4
+/** MCPWM_OP1_FORCE_UP : R/W; bitpos: [5]; default: 0;
+ *  a toggle (software invert its value) will trigger a forced update of active
+ *  registers in PWM operator 1
+ */
+#define MCPWM_OP1_FORCE_UP    (BIT(5))
+#define MCPWM_OP1_FORCE_UP_M  (MCPWM_OP1_FORCE_UP_V << MCPWM_OP1_FORCE_UP_S)
+#define MCPWM_OP1_FORCE_UP_V  0x00000001U
+#define MCPWM_OP1_FORCE_UP_S  5
+/** MCPWM_OP2_UP_EN : R/W; bitpos: [6]; default: 1;
+ *  When set and PWM_GLOBAL_UP_EN is set, update of active registers in PWM operator 2
+ *  are enabled
+ */
+#define MCPWM_OP2_UP_EN    (BIT(6))
+#define MCPWM_OP2_UP_EN_M  (MCPWM_OP2_UP_EN_V << MCPWM_OP2_UP_EN_S)
+#define MCPWM_OP2_UP_EN_V  0x00000001U
+#define MCPWM_OP2_UP_EN_S  6
+/** MCPWM_OP2_FORCE_UP : R/W; bitpos: [7]; default: 0;
+ *  a toggle (software invert its value) will trigger a forced update of active
+ *  registers in PWM operator 2
+ */
+#define MCPWM_OP2_FORCE_UP    (BIT(7))
+#define MCPWM_OP2_FORCE_UP_M  (MCPWM_OP2_FORCE_UP_V << MCPWM_OP2_FORCE_UP_S)
+#define MCPWM_OP2_FORCE_UP_V  0x00000001U
+#define MCPWM_OP2_FORCE_UP_S  7
+
+/** MCPWM_INT_ENA_REG register
+ *  Interrupt enable bits
+ */
+#define MCPWM_INT_ENA_REG(i) (DR_REG_MCPWM_BASE(i) + 0x110)
+/** MCPWM_TIMER0_STOP_INT_ENA : R/W; bitpos: [0]; default: 0;
+ *  The enable bit for the interrupt triggered when the timer 0 stops.
+ */
+#define MCPWM_TIMER0_STOP_INT_ENA    (BIT(0))
+#define MCPWM_TIMER0_STOP_INT_ENA_M  (MCPWM_TIMER0_STOP_INT_ENA_V << MCPWM_TIMER0_STOP_INT_ENA_S)
+#define MCPWM_TIMER0_STOP_INT_ENA_V  0x00000001U
+#define MCPWM_TIMER0_STOP_INT_ENA_S  0
+/** MCPWM_TIMER1_STOP_INT_ENA : R/W; bitpos: [1]; default: 0;
+ *  The enable bit for the interrupt triggered when the timer 1 stops.
+ */
+#define MCPWM_TIMER1_STOP_INT_ENA    (BIT(1))
+#define MCPWM_TIMER1_STOP_INT_ENA_M  (MCPWM_TIMER1_STOP_INT_ENA_V << MCPWM_TIMER1_STOP_INT_ENA_S)
+#define MCPWM_TIMER1_STOP_INT_ENA_V  0x00000001U
+#define MCPWM_TIMER1_STOP_INT_ENA_S  1
+/** MCPWM_TIMER2_STOP_INT_ENA : R/W; bitpos: [2]; default: 0;
+ *  The enable bit for the interrupt triggered when the timer 2 stops.
+ */
+#define MCPWM_TIMER2_STOP_INT_ENA    (BIT(2))
+#define MCPWM_TIMER2_STOP_INT_ENA_M  (MCPWM_TIMER2_STOP_INT_ENA_V << MCPWM_TIMER2_STOP_INT_ENA_S)
+#define MCPWM_TIMER2_STOP_INT_ENA_V  0x00000001U
+#define MCPWM_TIMER2_STOP_INT_ENA_S  2
+/** MCPWM_TIMER0_TEZ_INT_ENA : R/W; bitpos: [3]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM timer 0 TEZ event.
+ */
+#define MCPWM_TIMER0_TEZ_INT_ENA    (BIT(3))
+#define MCPWM_TIMER0_TEZ_INT_ENA_M  (MCPWM_TIMER0_TEZ_INT_ENA_V << MCPWM_TIMER0_TEZ_INT_ENA_S)
+#define MCPWM_TIMER0_TEZ_INT_ENA_V  0x00000001U
+#define MCPWM_TIMER0_TEZ_INT_ENA_S  3
+/** MCPWM_TIMER1_TEZ_INT_ENA : R/W; bitpos: [4]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM timer 1 TEZ event.
+ */
+#define MCPWM_TIMER1_TEZ_INT_ENA    (BIT(4))
+#define MCPWM_TIMER1_TEZ_INT_ENA_M  (MCPWM_TIMER1_TEZ_INT_ENA_V << MCPWM_TIMER1_TEZ_INT_ENA_S)
+#define MCPWM_TIMER1_TEZ_INT_ENA_V  0x00000001U
+#define MCPWM_TIMER1_TEZ_INT_ENA_S  4
+/** MCPWM_TIMER2_TEZ_INT_ENA : R/W; bitpos: [5]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM timer 2 TEZ event.
+ */
+#define MCPWM_TIMER2_TEZ_INT_ENA    (BIT(5))
+#define MCPWM_TIMER2_TEZ_INT_ENA_M  (MCPWM_TIMER2_TEZ_INT_ENA_V << MCPWM_TIMER2_TEZ_INT_ENA_S)
+#define MCPWM_TIMER2_TEZ_INT_ENA_V  0x00000001U
+#define MCPWM_TIMER2_TEZ_INT_ENA_S  5
+/** MCPWM_TIMER0_TEP_INT_ENA : R/W; bitpos: [6]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM timer 0 TEP event.
+ */
+#define MCPWM_TIMER0_TEP_INT_ENA    (BIT(6))
+#define MCPWM_TIMER0_TEP_INT_ENA_M  (MCPWM_TIMER0_TEP_INT_ENA_V << MCPWM_TIMER0_TEP_INT_ENA_S)
+#define MCPWM_TIMER0_TEP_INT_ENA_V  0x00000001U
+#define MCPWM_TIMER0_TEP_INT_ENA_S  6
+/** MCPWM_TIMER1_TEP_INT_ENA : R/W; bitpos: [7]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM timer 1 TEP event.
+ */
+#define MCPWM_TIMER1_TEP_INT_ENA    (BIT(7))
+#define MCPWM_TIMER1_TEP_INT_ENA_M  (MCPWM_TIMER1_TEP_INT_ENA_V << MCPWM_TIMER1_TEP_INT_ENA_S)
+#define MCPWM_TIMER1_TEP_INT_ENA_V  0x00000001U
+#define MCPWM_TIMER1_TEP_INT_ENA_S  7
+/** MCPWM_TIMER2_TEP_INT_ENA : R/W; bitpos: [8]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM timer 2 TEP event.
+ */
+#define MCPWM_TIMER2_TEP_INT_ENA    (BIT(8))
+#define MCPWM_TIMER2_TEP_INT_ENA_M  (MCPWM_TIMER2_TEP_INT_ENA_V << MCPWM_TIMER2_TEP_INT_ENA_S)
+#define MCPWM_TIMER2_TEP_INT_ENA_V  0x00000001U
+#define MCPWM_TIMER2_TEP_INT_ENA_S  8
+/** MCPWM_FAULT0_INT_ENA : R/W; bitpos: [9]; default: 0;
+ *  The enable bit for the interrupt triggered when fault_event0 starts.
+ */
+#define MCPWM_FAULT0_INT_ENA    (BIT(9))
+#define MCPWM_FAULT0_INT_ENA_M  (MCPWM_FAULT0_INT_ENA_V << MCPWM_FAULT0_INT_ENA_S)
+#define MCPWM_FAULT0_INT_ENA_V  0x00000001U
+#define MCPWM_FAULT0_INT_ENA_S  9
+/** MCPWM_FAULT1_INT_ENA : R/W; bitpos: [10]; default: 0;
+ *  The enable bit for the interrupt triggered when fault_event1 starts.
+ */
+#define MCPWM_FAULT1_INT_ENA    (BIT(10))
+#define MCPWM_FAULT1_INT_ENA_M  (MCPWM_FAULT1_INT_ENA_V << MCPWM_FAULT1_INT_ENA_S)
+#define MCPWM_FAULT1_INT_ENA_V  0x00000001U
+#define MCPWM_FAULT1_INT_ENA_S  10
+/** MCPWM_FAULT2_INT_ENA : R/W; bitpos: [11]; default: 0;
+ *  The enable bit for the interrupt triggered when fault_event2 starts.
+ */
+#define MCPWM_FAULT2_INT_ENA    (BIT(11))
+#define MCPWM_FAULT2_INT_ENA_M  (MCPWM_FAULT2_INT_ENA_V << MCPWM_FAULT2_INT_ENA_S)
+#define MCPWM_FAULT2_INT_ENA_V  0x00000001U
+#define MCPWM_FAULT2_INT_ENA_S  11
+/** MCPWM_FAULT0_CLR_INT_ENA : R/W; bitpos: [12]; default: 0;
+ *  The enable bit for the interrupt triggered when fault_event0 ends.
+ */
+#define MCPWM_FAULT0_CLR_INT_ENA    (BIT(12))
+#define MCPWM_FAULT0_CLR_INT_ENA_M  (MCPWM_FAULT0_CLR_INT_ENA_V << MCPWM_FAULT0_CLR_INT_ENA_S)
+#define MCPWM_FAULT0_CLR_INT_ENA_V  0x00000001U
+#define MCPWM_FAULT0_CLR_INT_ENA_S  12
+/** MCPWM_FAULT1_CLR_INT_ENA : R/W; bitpos: [13]; default: 0;
+ *  The enable bit for the interrupt triggered when fault_event1 ends.
+ */
+#define MCPWM_FAULT1_CLR_INT_ENA    (BIT(13))
+#define MCPWM_FAULT1_CLR_INT_ENA_M  (MCPWM_FAULT1_CLR_INT_ENA_V << MCPWM_FAULT1_CLR_INT_ENA_S)
+#define MCPWM_FAULT1_CLR_INT_ENA_V  0x00000001U
+#define MCPWM_FAULT1_CLR_INT_ENA_S  13
+/** MCPWM_FAULT2_CLR_INT_ENA : R/W; bitpos: [14]; default: 0;
+ *  The enable bit for the interrupt triggered when fault_event2 ends.
+ */
+#define MCPWM_FAULT2_CLR_INT_ENA    (BIT(14))
+#define MCPWM_FAULT2_CLR_INT_ENA_M  (MCPWM_FAULT2_CLR_INT_ENA_V << MCPWM_FAULT2_CLR_INT_ENA_S)
+#define MCPWM_FAULT2_CLR_INT_ENA_V  0x00000001U
+#define MCPWM_FAULT2_CLR_INT_ENA_S  14
+/** MCPWM_OP0_TEA_INT_ENA : R/W; bitpos: [15]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM operator 0 TEA event
+ */
+#define MCPWM_OP0_TEA_INT_ENA    (BIT(15))
+#define MCPWM_OP0_TEA_INT_ENA_M  (MCPWM_OP0_TEA_INT_ENA_V << MCPWM_OP0_TEA_INT_ENA_S)
+#define MCPWM_OP0_TEA_INT_ENA_V  0x00000001U
+#define MCPWM_OP0_TEA_INT_ENA_S  15
+/** MCPWM_OP1_TEA_INT_ENA : R/W; bitpos: [16]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM operator 1 TEA event
+ */
+#define MCPWM_OP1_TEA_INT_ENA    (BIT(16))
+#define MCPWM_OP1_TEA_INT_ENA_M  (MCPWM_OP1_TEA_INT_ENA_V << MCPWM_OP1_TEA_INT_ENA_S)
+#define MCPWM_OP1_TEA_INT_ENA_V  0x00000001U
+#define MCPWM_OP1_TEA_INT_ENA_S  16
+/** MCPWM_OP2_TEA_INT_ENA : R/W; bitpos: [17]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM operator 2 TEA event
+ */
+#define MCPWM_OP2_TEA_INT_ENA    (BIT(17))
+#define MCPWM_OP2_TEA_INT_ENA_M  (MCPWM_OP2_TEA_INT_ENA_V << MCPWM_OP2_TEA_INT_ENA_S)
+#define MCPWM_OP2_TEA_INT_ENA_V  0x00000001U
+#define MCPWM_OP2_TEA_INT_ENA_S  17
+/** MCPWM_OP0_TEB_INT_ENA : R/W; bitpos: [18]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM operator 0 TEB event
+ */
+#define MCPWM_OP0_TEB_INT_ENA    (BIT(18))
+#define MCPWM_OP0_TEB_INT_ENA_M  (MCPWM_OP0_TEB_INT_ENA_V << MCPWM_OP0_TEB_INT_ENA_S)
+#define MCPWM_OP0_TEB_INT_ENA_V  0x00000001U
+#define MCPWM_OP0_TEB_INT_ENA_S  18
+/** MCPWM_OP1_TEB_INT_ENA : R/W; bitpos: [19]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM operator 1 TEB event
+ */
+#define MCPWM_OP1_TEB_INT_ENA    (BIT(19))
+#define MCPWM_OP1_TEB_INT_ENA_M  (MCPWM_OP1_TEB_INT_ENA_V << MCPWM_OP1_TEB_INT_ENA_S)
+#define MCPWM_OP1_TEB_INT_ENA_V  0x00000001U
+#define MCPWM_OP1_TEB_INT_ENA_S  19
+/** MCPWM_OP2_TEB_INT_ENA : R/W; bitpos: [20]; default: 0;
+ *  The enable bit for the interrupt triggered by a PWM operator 2 TEB event
+ */
+#define MCPWM_OP2_TEB_INT_ENA    (BIT(20))
+#define MCPWM_OP2_TEB_INT_ENA_M  (MCPWM_OP2_TEB_INT_ENA_V << MCPWM_OP2_TEB_INT_ENA_S)
+#define MCPWM_OP2_TEB_INT_ENA_V  0x00000001U
+#define MCPWM_OP2_TEB_INT_ENA_S  20
+/** MCPWM_FH0_CBC_INT_ENA : R/W; bitpos: [21]; default: 0;
+ *  The enable bit for the interrupt triggered by a cycle-by-cycle mode action on PWM0.
+ */
+#define MCPWM_FH0_CBC_INT_ENA    (BIT(21))
+#define MCPWM_FH0_CBC_INT_ENA_M  (MCPWM_FH0_CBC_INT_ENA_V << MCPWM_FH0_CBC_INT_ENA_S)
+#define MCPWM_FH0_CBC_INT_ENA_V  0x00000001U
+#define MCPWM_FH0_CBC_INT_ENA_S  21
+/** MCPWM_FH1_CBC_INT_ENA : R/W; bitpos: [22]; default: 0;
+ *  The enable bit for the interrupt triggered by a cycle-by-cycle mode action on PWM1.
+ */
+#define MCPWM_FH1_CBC_INT_ENA    (BIT(22))
+#define MCPWM_FH1_CBC_INT_ENA_M  (MCPWM_FH1_CBC_INT_ENA_V << MCPWM_FH1_CBC_INT_ENA_S)
+#define MCPWM_FH1_CBC_INT_ENA_V  0x00000001U
+#define MCPWM_FH1_CBC_INT_ENA_S  22
+/** MCPWM_FH2_CBC_INT_ENA : R/W; bitpos: [23]; default: 0;
+ *  The enable bit for the interrupt triggered by a cycle-by-cycle mode action on PWM2.
+ */
+#define MCPWM_FH2_CBC_INT_ENA    (BIT(23))
+#define MCPWM_FH2_CBC_INT_ENA_M  (MCPWM_FH2_CBC_INT_ENA_V << MCPWM_FH2_CBC_INT_ENA_S)
+#define MCPWM_FH2_CBC_INT_ENA_V  0x00000001U
+#define MCPWM_FH2_CBC_INT_ENA_S  23
+/** MCPWM_FH0_OST_INT_ENA : R/W; bitpos: [24]; default: 0;
+ *  The enable bit for the interrupt triggered by a one-shot mode action on PWM0.
+ */
+#define MCPWM_FH0_OST_INT_ENA    (BIT(24))
+#define MCPWM_FH0_OST_INT_ENA_M  (MCPWM_FH0_OST_INT_ENA_V << MCPWM_FH0_OST_INT_ENA_S)
+#define MCPWM_FH0_OST_INT_ENA_V  0x00000001U
+#define MCPWM_FH0_OST_INT_ENA_S  24
+/** MCPWM_FH1_OST_INT_ENA : R/W; bitpos: [25]; default: 0;
+ *  The enable bit for the interrupt triggered by a one-shot mode action on PWM1.
+ */
+#define MCPWM_FH1_OST_INT_ENA    (BIT(25))
+#define MCPWM_FH1_OST_INT_ENA_M  (MCPWM_FH1_OST_INT_ENA_V << MCPWM_FH1_OST_INT_ENA_S)
+#define MCPWM_FH1_OST_INT_ENA_V  0x00000001U
+#define MCPWM_FH1_OST_INT_ENA_S  25
+/** MCPWM_FH2_OST_INT_ENA : R/W; bitpos: [26]; default: 0;
+ *  The enable bit for the interrupt triggered by a one-shot mode action on PWM2.
+ */
+#define MCPWM_FH2_OST_INT_ENA    (BIT(26))
+#define MCPWM_FH2_OST_INT_ENA_M  (MCPWM_FH2_OST_INT_ENA_V << MCPWM_FH2_OST_INT_ENA_S)
+#define MCPWM_FH2_OST_INT_ENA_V  0x00000001U
+#define MCPWM_FH2_OST_INT_ENA_S  26
+/** MCPWM_CAP0_INT_ENA : R/W; bitpos: [27]; default: 0;
+ *  The enable bit for the interrupt triggered by capture on channel 0.
+ */
+#define MCPWM_CAP0_INT_ENA    (BIT(27))
+#define MCPWM_CAP0_INT_ENA_M  (MCPWM_CAP0_INT_ENA_V << MCPWM_CAP0_INT_ENA_S)
+#define MCPWM_CAP0_INT_ENA_V  0x00000001U
+#define MCPWM_CAP0_INT_ENA_S  27
+/** MCPWM_CAP1_INT_ENA : R/W; bitpos: [28]; default: 0;
+ *  The enable bit for the interrupt triggered by capture on channel 1.
+ */
+#define MCPWM_CAP1_INT_ENA    (BIT(28))
+#define MCPWM_CAP1_INT_ENA_M  (MCPWM_CAP1_INT_ENA_V << MCPWM_CAP1_INT_ENA_S)
+#define MCPWM_CAP1_INT_ENA_V  0x00000001U
+#define MCPWM_CAP1_INT_ENA_S  28
+/** MCPWM_CAP2_INT_ENA : R/W; bitpos: [29]; default: 0;
+ *  The enable bit for the interrupt triggered by capture on channel 2.
+ */
+#define MCPWM_CAP2_INT_ENA    (BIT(29))
+#define MCPWM_CAP2_INT_ENA_M  (MCPWM_CAP2_INT_ENA_V << MCPWM_CAP2_INT_ENA_S)
+#define MCPWM_CAP2_INT_ENA_V  0x00000001U
+#define MCPWM_CAP2_INT_ENA_S  29
+
+/** MCPWM_INT_RAW_REG register
+ *  Raw interrupt status
+ */
+#define MCPWM_INT_RAW_REG(i) (DR_REG_MCPWM_BASE(i) + 0x114)
+/** MCPWM_TIMER0_STOP_INT_RAW : R/WTC/SS; bitpos: [0]; default: 0;
+ *  The raw status bit for the interrupt triggered when the timer 0 stops.
+ */
+#define MCPWM_TIMER0_STOP_INT_RAW    (BIT(0))
+#define MCPWM_TIMER0_STOP_INT_RAW_M  (MCPWM_TIMER0_STOP_INT_RAW_V << MCPWM_TIMER0_STOP_INT_RAW_S)
+#define MCPWM_TIMER0_STOP_INT_RAW_V  0x00000001U
+#define MCPWM_TIMER0_STOP_INT_RAW_S  0
+/** MCPWM_TIMER1_STOP_INT_RAW : R/WTC/SS; bitpos: [1]; default: 0;
+ *  The raw status bit for the interrupt triggered when the timer 1 stops.
+ */
+#define MCPWM_TIMER1_STOP_INT_RAW    (BIT(1))
+#define MCPWM_TIMER1_STOP_INT_RAW_M  (MCPWM_TIMER1_STOP_INT_RAW_V << MCPWM_TIMER1_STOP_INT_RAW_S)
+#define MCPWM_TIMER1_STOP_INT_RAW_V  0x00000001U
+#define MCPWM_TIMER1_STOP_INT_RAW_S  1
+/** MCPWM_TIMER2_STOP_INT_RAW : R/WTC/SS; bitpos: [2]; default: 0;
+ *  The raw status bit for the interrupt triggered when the timer 2 stops.
+ */
+#define MCPWM_TIMER2_STOP_INT_RAW    (BIT(2))
+#define MCPWM_TIMER2_STOP_INT_RAW_M  (MCPWM_TIMER2_STOP_INT_RAW_V << MCPWM_TIMER2_STOP_INT_RAW_S)
+#define MCPWM_TIMER2_STOP_INT_RAW_V  0x00000001U
+#define MCPWM_TIMER2_STOP_INT_RAW_S  2
+/** MCPWM_TIMER0_TEZ_INT_RAW : R/WTC/SS; bitpos: [3]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM timer 0 TEZ event.
+ */
+#define MCPWM_TIMER0_TEZ_INT_RAW    (BIT(3))
+#define MCPWM_TIMER0_TEZ_INT_RAW_M  (MCPWM_TIMER0_TEZ_INT_RAW_V << MCPWM_TIMER0_TEZ_INT_RAW_S)
+#define MCPWM_TIMER0_TEZ_INT_RAW_V  0x00000001U
+#define MCPWM_TIMER0_TEZ_INT_RAW_S  3
+/** MCPWM_TIMER1_TEZ_INT_RAW : R/WTC/SS; bitpos: [4]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM timer 1 TEZ event.
+ */
+#define MCPWM_TIMER1_TEZ_INT_RAW    (BIT(4))
+#define MCPWM_TIMER1_TEZ_INT_RAW_M  (MCPWM_TIMER1_TEZ_INT_RAW_V << MCPWM_TIMER1_TEZ_INT_RAW_S)
+#define MCPWM_TIMER1_TEZ_INT_RAW_V  0x00000001U
+#define MCPWM_TIMER1_TEZ_INT_RAW_S  4
+/** MCPWM_TIMER2_TEZ_INT_RAW : R/WTC/SS; bitpos: [5]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM timer 2 TEZ event.
+ */
+#define MCPWM_TIMER2_TEZ_INT_RAW    (BIT(5))
+#define MCPWM_TIMER2_TEZ_INT_RAW_M  (MCPWM_TIMER2_TEZ_INT_RAW_V << MCPWM_TIMER2_TEZ_INT_RAW_S)
+#define MCPWM_TIMER2_TEZ_INT_RAW_V  0x00000001U
+#define MCPWM_TIMER2_TEZ_INT_RAW_S  5
+/** MCPWM_TIMER0_TEP_INT_RAW : R/WTC/SS; bitpos: [6]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM timer 0 TEP event.
+ */
+#define MCPWM_TIMER0_TEP_INT_RAW    (BIT(6))
+#define MCPWM_TIMER0_TEP_INT_RAW_M  (MCPWM_TIMER0_TEP_INT_RAW_V << MCPWM_TIMER0_TEP_INT_RAW_S)
+#define MCPWM_TIMER0_TEP_INT_RAW_V  0x00000001U
+#define MCPWM_TIMER0_TEP_INT_RAW_S  6
+/** MCPWM_TIMER1_TEP_INT_RAW : R/WTC/SS; bitpos: [7]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM timer 1 TEP event.
+ */
+#define MCPWM_TIMER1_TEP_INT_RAW    (BIT(7))
+#define MCPWM_TIMER1_TEP_INT_RAW_M  (MCPWM_TIMER1_TEP_INT_RAW_V << MCPWM_TIMER1_TEP_INT_RAW_S)
+#define MCPWM_TIMER1_TEP_INT_RAW_V  0x00000001U
+#define MCPWM_TIMER1_TEP_INT_RAW_S  7
+/** MCPWM_TIMER2_TEP_INT_RAW : R/WTC/SS; bitpos: [8]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM timer 2 TEP event.
+ */
+#define MCPWM_TIMER2_TEP_INT_RAW    (BIT(8))
+#define MCPWM_TIMER2_TEP_INT_RAW_M  (MCPWM_TIMER2_TEP_INT_RAW_V << MCPWM_TIMER2_TEP_INT_RAW_S)
+#define MCPWM_TIMER2_TEP_INT_RAW_V  0x00000001U
+#define MCPWM_TIMER2_TEP_INT_RAW_S  8
+/** MCPWM_FAULT0_INT_RAW : R/WTC/SS; bitpos: [9]; default: 0;
+ *  The raw status bit for the interrupt triggered when fault_event0 starts.
+ */
+#define MCPWM_FAULT0_INT_RAW    (BIT(9))
+#define MCPWM_FAULT0_INT_RAW_M  (MCPWM_FAULT0_INT_RAW_V << MCPWM_FAULT0_INT_RAW_S)
+#define MCPWM_FAULT0_INT_RAW_V  0x00000001U
+#define MCPWM_FAULT0_INT_RAW_S  9
+/** MCPWM_FAULT1_INT_RAW : R/WTC/SS; bitpos: [10]; default: 0;
+ *  The raw status bit for the interrupt triggered when fault_event1 starts.
+ */
+#define MCPWM_FAULT1_INT_RAW    (BIT(10))
+#define MCPWM_FAULT1_INT_RAW_M  (MCPWM_FAULT1_INT_RAW_V << MCPWM_FAULT1_INT_RAW_S)
+#define MCPWM_FAULT1_INT_RAW_V  0x00000001U
+#define MCPWM_FAULT1_INT_RAW_S  10
+/** MCPWM_FAULT2_INT_RAW : R/WTC/SS; bitpos: [11]; default: 0;
+ *  The raw status bit for the interrupt triggered when fault_event2 starts.
+ */
+#define MCPWM_FAULT2_INT_RAW    (BIT(11))
+#define MCPWM_FAULT2_INT_RAW_M  (MCPWM_FAULT2_INT_RAW_V << MCPWM_FAULT2_INT_RAW_S)
+#define MCPWM_FAULT2_INT_RAW_V  0x00000001U
+#define MCPWM_FAULT2_INT_RAW_S  11
+/** MCPWM_FAULT0_CLR_INT_RAW : R/WTC/SS; bitpos: [12]; default: 0;
+ *  The raw status bit for the interrupt triggered when fault_event0 ends.
+ */
+#define MCPWM_FAULT0_CLR_INT_RAW    (BIT(12))
+#define MCPWM_FAULT0_CLR_INT_RAW_M  (MCPWM_FAULT0_CLR_INT_RAW_V << MCPWM_FAULT0_CLR_INT_RAW_S)
+#define MCPWM_FAULT0_CLR_INT_RAW_V  0x00000001U
+#define MCPWM_FAULT0_CLR_INT_RAW_S  12
+/** MCPWM_FAULT1_CLR_INT_RAW : R/WTC/SS; bitpos: [13]; default: 0;
+ *  The raw status bit for the interrupt triggered when fault_event1 ends.
+ */
+#define MCPWM_FAULT1_CLR_INT_RAW    (BIT(13))
+#define MCPWM_FAULT1_CLR_INT_RAW_M  (MCPWM_FAULT1_CLR_INT_RAW_V << MCPWM_FAULT1_CLR_INT_RAW_S)
+#define MCPWM_FAULT1_CLR_INT_RAW_V  0x00000001U
+#define MCPWM_FAULT1_CLR_INT_RAW_S  13
+/** MCPWM_FAULT2_CLR_INT_RAW : R/WTC/SS; bitpos: [14]; default: 0;
+ *  The raw status bit for the interrupt triggered when fault_event2 ends.
+ */
+#define MCPWM_FAULT2_CLR_INT_RAW    (BIT(14))
+#define MCPWM_FAULT2_CLR_INT_RAW_M  (MCPWM_FAULT2_CLR_INT_RAW_V << MCPWM_FAULT2_CLR_INT_RAW_S)
+#define MCPWM_FAULT2_CLR_INT_RAW_V  0x00000001U
+#define MCPWM_FAULT2_CLR_INT_RAW_S  14
+/** MCPWM_OP0_TEA_INT_RAW : R/WTC/SS; bitpos: [15]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM operator 0 TEA event
+ */
+#define MCPWM_OP0_TEA_INT_RAW    (BIT(15))
+#define MCPWM_OP0_TEA_INT_RAW_M  (MCPWM_OP0_TEA_INT_RAW_V << MCPWM_OP0_TEA_INT_RAW_S)
+#define MCPWM_OP0_TEA_INT_RAW_V  0x00000001U
+#define MCPWM_OP0_TEA_INT_RAW_S  15
+/** MCPWM_OP1_TEA_INT_RAW : R/WTC/SS; bitpos: [16]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM operator 1 TEA event
+ */
+#define MCPWM_OP1_TEA_INT_RAW    (BIT(16))
+#define MCPWM_OP1_TEA_INT_RAW_M  (MCPWM_OP1_TEA_INT_RAW_V << MCPWM_OP1_TEA_INT_RAW_S)
+#define MCPWM_OP1_TEA_INT_RAW_V  0x00000001U
+#define MCPWM_OP1_TEA_INT_RAW_S  16
+/** MCPWM_OP2_TEA_INT_RAW : R/WTC/SS; bitpos: [17]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM operator 2 TEA event
+ */
+#define MCPWM_OP2_TEA_INT_RAW    (BIT(17))
+#define MCPWM_OP2_TEA_INT_RAW_M  (MCPWM_OP2_TEA_INT_RAW_V << MCPWM_OP2_TEA_INT_RAW_S)
+#define MCPWM_OP2_TEA_INT_RAW_V  0x00000001U
+#define MCPWM_OP2_TEA_INT_RAW_S  17
+/** MCPWM_OP0_TEB_INT_RAW : R/WTC/SS; bitpos: [18]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM operator 0 TEB event
+ */
+#define MCPWM_OP0_TEB_INT_RAW    (BIT(18))
+#define MCPWM_OP0_TEB_INT_RAW_M  (MCPWM_OP0_TEB_INT_RAW_V << MCPWM_OP0_TEB_INT_RAW_S)
+#define MCPWM_OP0_TEB_INT_RAW_V  0x00000001U
+#define MCPWM_OP0_TEB_INT_RAW_S  18
+/** MCPWM_OP1_TEB_INT_RAW : R/WTC/SS; bitpos: [19]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM operator 1 TEB event
+ */
+#define MCPWM_OP1_TEB_INT_RAW    (BIT(19))
+#define MCPWM_OP1_TEB_INT_RAW_M  (MCPWM_OP1_TEB_INT_RAW_V << MCPWM_OP1_TEB_INT_RAW_S)
+#define MCPWM_OP1_TEB_INT_RAW_V  0x00000001U
+#define MCPWM_OP1_TEB_INT_RAW_S  19
+/** MCPWM_OP2_TEB_INT_RAW : R/WTC/SS; bitpos: [20]; default: 0;
+ *  The raw status bit for the interrupt triggered by a PWM operator 2 TEB event
+ */
+#define MCPWM_OP2_TEB_INT_RAW    (BIT(20))
+#define MCPWM_OP2_TEB_INT_RAW_M  (MCPWM_OP2_TEB_INT_RAW_V << MCPWM_OP2_TEB_INT_RAW_S)
+#define MCPWM_OP2_TEB_INT_RAW_V  0x00000001U
+#define MCPWM_OP2_TEB_INT_RAW_S  20
+/** MCPWM_FH0_CBC_INT_RAW : R/WTC/SS; bitpos: [21]; default: 0;
+ *  The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on
+ *  PWM0.
+ */
+#define MCPWM_FH0_CBC_INT_RAW    (BIT(21))
+#define MCPWM_FH0_CBC_INT_RAW_M  (MCPWM_FH0_CBC_INT_RAW_V << MCPWM_FH0_CBC_INT_RAW_S)
+#define MCPWM_FH0_CBC_INT_RAW_V  0x00000001U
+#define MCPWM_FH0_CBC_INT_RAW_S  21
+/** MCPWM_FH1_CBC_INT_RAW : R/WTC/SS; bitpos: [22]; default: 0;
+ *  The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on
+ *  PWM1.
+ */
+#define MCPWM_FH1_CBC_INT_RAW    (BIT(22))
+#define MCPWM_FH1_CBC_INT_RAW_M  (MCPWM_FH1_CBC_INT_RAW_V << MCPWM_FH1_CBC_INT_RAW_S)
+#define MCPWM_FH1_CBC_INT_RAW_V  0x00000001U
+#define MCPWM_FH1_CBC_INT_RAW_S  22
+/** MCPWM_FH2_CBC_INT_RAW : R/WTC/SS; bitpos: [23]; default: 0;
+ *  The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on
+ *  PWM2.
+ */
+#define MCPWM_FH2_CBC_INT_RAW    (BIT(23))
+#define MCPWM_FH2_CBC_INT_RAW_M  (MCPWM_FH2_CBC_INT_RAW_V << MCPWM_FH2_CBC_INT_RAW_S)
+#define MCPWM_FH2_CBC_INT_RAW_V  0x00000001U
+#define MCPWM_FH2_CBC_INT_RAW_S  23
+/** MCPWM_FH0_OST_INT_RAW : R/WTC/SS; bitpos: [24]; default: 0;
+ *  The raw status bit for the interrupt triggered by a one-shot mode action on PWM0.
+ */
+#define MCPWM_FH0_OST_INT_RAW    (BIT(24))
+#define MCPWM_FH0_OST_INT_RAW_M  (MCPWM_FH0_OST_INT_RAW_V << MCPWM_FH0_OST_INT_RAW_S)
+#define MCPWM_FH0_OST_INT_RAW_V  0x00000001U
+#define MCPWM_FH0_OST_INT_RAW_S  24
+/** MCPWM_FH1_OST_INT_RAW : R/WTC/SS; bitpos: [25]; default: 0;
+ *  The raw status bit for the interrupt triggered by a one-shot mode action on PWM1.
+ */
+#define MCPWM_FH1_OST_INT_RAW    (BIT(25))
+#define MCPWM_FH1_OST_INT_RAW_M  (MCPWM_FH1_OST_INT_RAW_V << MCPWM_FH1_OST_INT_RAW_S)
+#define MCPWM_FH1_OST_INT_RAW_V  0x00000001U
+#define MCPWM_FH1_OST_INT_RAW_S  25
+/** MCPWM_FH2_OST_INT_RAW : R/WTC/SS; bitpos: [26]; default: 0;
+ *  The raw status bit for the interrupt triggered by a one-shot mode action on PWM2.
+ */
+#define MCPWM_FH2_OST_INT_RAW    (BIT(26))
+#define MCPWM_FH2_OST_INT_RAW_M  (MCPWM_FH2_OST_INT_RAW_V << MCPWM_FH2_OST_INT_RAW_S)
+#define MCPWM_FH2_OST_INT_RAW_V  0x00000001U
+#define MCPWM_FH2_OST_INT_RAW_S  26
+/** MCPWM_CAP0_INT_RAW : R/WTC/SS; bitpos: [27]; default: 0;
+ *  The raw status bit for the interrupt triggered by capture on channel 0.
+ */
+#define MCPWM_CAP0_INT_RAW    (BIT(27))
+#define MCPWM_CAP0_INT_RAW_M  (MCPWM_CAP0_INT_RAW_V << MCPWM_CAP0_INT_RAW_S)
+#define MCPWM_CAP0_INT_RAW_V  0x00000001U
+#define MCPWM_CAP0_INT_RAW_S  27
+/** MCPWM_CAP1_INT_RAW : R/WTC/SS; bitpos: [28]; default: 0;
+ *  The raw status bit for the interrupt triggered by capture on channel 1.
+ */
+#define MCPWM_CAP1_INT_RAW    (BIT(28))
+#define MCPWM_CAP1_INT_RAW_M  (MCPWM_CAP1_INT_RAW_V << MCPWM_CAP1_INT_RAW_S)
+#define MCPWM_CAP1_INT_RAW_V  0x00000001U
+#define MCPWM_CAP1_INT_RAW_S  28
+/** MCPWM_CAP2_INT_RAW : R/WTC/SS; bitpos: [29]; default: 0;
+ *  The raw status bit for the interrupt triggered by capture on channel 2.
+ */
+#define MCPWM_CAP2_INT_RAW    (BIT(29))
+#define MCPWM_CAP2_INT_RAW_M  (MCPWM_CAP2_INT_RAW_V << MCPWM_CAP2_INT_RAW_S)
+#define MCPWM_CAP2_INT_RAW_V  0x00000001U
+#define MCPWM_CAP2_INT_RAW_S  29
+
+/** MCPWM_INT_ST_REG register
+ *  Masked interrupt status
+ */
+#define MCPWM_INT_ST_REG(i) (DR_REG_MCPWM_BASE(i) + 0x118)
+/** MCPWM_TIMER0_STOP_INT_ST : RO; bitpos: [0]; default: 0;
+ *  The masked status bit for the interrupt triggered when the timer 0 stops.
+ */
+#define MCPWM_TIMER0_STOP_INT_ST    (BIT(0))
+#define MCPWM_TIMER0_STOP_INT_ST_M  (MCPWM_TIMER0_STOP_INT_ST_V << MCPWM_TIMER0_STOP_INT_ST_S)
+#define MCPWM_TIMER0_STOP_INT_ST_V  0x00000001U
+#define MCPWM_TIMER0_STOP_INT_ST_S  0
+/** MCPWM_TIMER1_STOP_INT_ST : RO; bitpos: [1]; default: 0;
+ *  The masked status bit for the interrupt triggered when the timer 1 stops.
+ */
+#define MCPWM_TIMER1_STOP_INT_ST    (BIT(1))
+#define MCPWM_TIMER1_STOP_INT_ST_M  (MCPWM_TIMER1_STOP_INT_ST_V << MCPWM_TIMER1_STOP_INT_ST_S)
+#define MCPWM_TIMER1_STOP_INT_ST_V  0x00000001U
+#define MCPWM_TIMER1_STOP_INT_ST_S  1
+/** MCPWM_TIMER2_STOP_INT_ST : RO; bitpos: [2]; default: 0;
+ *  The masked status bit for the interrupt triggered when the timer 2 stops.
+ */
+#define MCPWM_TIMER2_STOP_INT_ST    (BIT(2))
+#define MCPWM_TIMER2_STOP_INT_ST_M  (MCPWM_TIMER2_STOP_INT_ST_V << MCPWM_TIMER2_STOP_INT_ST_S)
+#define MCPWM_TIMER2_STOP_INT_ST_V  0x00000001U
+#define MCPWM_TIMER2_STOP_INT_ST_S  2
+/** MCPWM_TIMER0_TEZ_INT_ST : RO; bitpos: [3]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM timer 0 TEZ event.
+ */
+#define MCPWM_TIMER0_TEZ_INT_ST    (BIT(3))
+#define MCPWM_TIMER0_TEZ_INT_ST_M  (MCPWM_TIMER0_TEZ_INT_ST_V << MCPWM_TIMER0_TEZ_INT_ST_S)
+#define MCPWM_TIMER0_TEZ_INT_ST_V  0x00000001U
+#define MCPWM_TIMER0_TEZ_INT_ST_S  3
+/** MCPWM_TIMER1_TEZ_INT_ST : RO; bitpos: [4]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM timer 1 TEZ event.
+ */
+#define MCPWM_TIMER1_TEZ_INT_ST    (BIT(4))
+#define MCPWM_TIMER1_TEZ_INT_ST_M  (MCPWM_TIMER1_TEZ_INT_ST_V << MCPWM_TIMER1_TEZ_INT_ST_S)
+#define MCPWM_TIMER1_TEZ_INT_ST_V  0x00000001U
+#define MCPWM_TIMER1_TEZ_INT_ST_S  4
+/** MCPWM_TIMER2_TEZ_INT_ST : RO; bitpos: [5]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM timer 2 TEZ event.
+ */
+#define MCPWM_TIMER2_TEZ_INT_ST    (BIT(5))
+#define MCPWM_TIMER2_TEZ_INT_ST_M  (MCPWM_TIMER2_TEZ_INT_ST_V << MCPWM_TIMER2_TEZ_INT_ST_S)
+#define MCPWM_TIMER2_TEZ_INT_ST_V  0x00000001U
+#define MCPWM_TIMER2_TEZ_INT_ST_S  5
+/** MCPWM_TIMER0_TEP_INT_ST : RO; bitpos: [6]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM timer 0 TEP event.
+ */
+#define MCPWM_TIMER0_TEP_INT_ST    (BIT(6))
+#define MCPWM_TIMER0_TEP_INT_ST_M  (MCPWM_TIMER0_TEP_INT_ST_V << MCPWM_TIMER0_TEP_INT_ST_S)
+#define MCPWM_TIMER0_TEP_INT_ST_V  0x00000001U
+#define MCPWM_TIMER0_TEP_INT_ST_S  6
+/** MCPWM_TIMER1_TEP_INT_ST : RO; bitpos: [7]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM timer 1 TEP event.
+ */
+#define MCPWM_TIMER1_TEP_INT_ST    (BIT(7))
+#define MCPWM_TIMER1_TEP_INT_ST_M  (MCPWM_TIMER1_TEP_INT_ST_V << MCPWM_TIMER1_TEP_INT_ST_S)
+#define MCPWM_TIMER1_TEP_INT_ST_V  0x00000001U
+#define MCPWM_TIMER1_TEP_INT_ST_S  7
+/** MCPWM_TIMER2_TEP_INT_ST : RO; bitpos: [8]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM timer 2 TEP event.
+ */
+#define MCPWM_TIMER2_TEP_INT_ST    (BIT(8))
+#define MCPWM_TIMER2_TEP_INT_ST_M  (MCPWM_TIMER2_TEP_INT_ST_V << MCPWM_TIMER2_TEP_INT_ST_S)
+#define MCPWM_TIMER2_TEP_INT_ST_V  0x00000001U
+#define MCPWM_TIMER2_TEP_INT_ST_S  8
+/** MCPWM_FAULT0_INT_ST : RO; bitpos: [9]; default: 0;
+ *  The masked status bit for the interrupt triggered when fault_event0 starts.
+ */
+#define MCPWM_FAULT0_INT_ST    (BIT(9))
+#define MCPWM_FAULT0_INT_ST_M  (MCPWM_FAULT0_INT_ST_V << MCPWM_FAULT0_INT_ST_S)
+#define MCPWM_FAULT0_INT_ST_V  0x00000001U
+#define MCPWM_FAULT0_INT_ST_S  9
+/** MCPWM_FAULT1_INT_ST : RO; bitpos: [10]; default: 0;
+ *  The masked status bit for the interrupt triggered when fault_event1 starts.
+ */
+#define MCPWM_FAULT1_INT_ST    (BIT(10))
+#define MCPWM_FAULT1_INT_ST_M  (MCPWM_FAULT1_INT_ST_V << MCPWM_FAULT1_INT_ST_S)
+#define MCPWM_FAULT1_INT_ST_V  0x00000001U
+#define MCPWM_FAULT1_INT_ST_S  10
+/** MCPWM_FAULT2_INT_ST : RO; bitpos: [11]; default: 0;
+ *  The masked status bit for the interrupt triggered when fault_event2 starts.
+ */
+#define MCPWM_FAULT2_INT_ST    (BIT(11))
+#define MCPWM_FAULT2_INT_ST_M  (MCPWM_FAULT2_INT_ST_V << MCPWM_FAULT2_INT_ST_S)
+#define MCPWM_FAULT2_INT_ST_V  0x00000001U
+#define MCPWM_FAULT2_INT_ST_S  11
+/** MCPWM_FAULT0_CLR_INT_ST : RO; bitpos: [12]; default: 0;
+ *  The masked status bit for the interrupt triggered when fault_event0 ends.
+ */
+#define MCPWM_FAULT0_CLR_INT_ST    (BIT(12))
+#define MCPWM_FAULT0_CLR_INT_ST_M  (MCPWM_FAULT0_CLR_INT_ST_V << MCPWM_FAULT0_CLR_INT_ST_S)
+#define MCPWM_FAULT0_CLR_INT_ST_V  0x00000001U
+#define MCPWM_FAULT0_CLR_INT_ST_S  12
+/** MCPWM_FAULT1_CLR_INT_ST : RO; bitpos: [13]; default: 0;
+ *  The masked status bit for the interrupt triggered when fault_event1 ends.
+ */
+#define MCPWM_FAULT1_CLR_INT_ST    (BIT(13))
+#define MCPWM_FAULT1_CLR_INT_ST_M  (MCPWM_FAULT1_CLR_INT_ST_V << MCPWM_FAULT1_CLR_INT_ST_S)
+#define MCPWM_FAULT1_CLR_INT_ST_V  0x00000001U
+#define MCPWM_FAULT1_CLR_INT_ST_S  13
+/** MCPWM_FAULT2_CLR_INT_ST : RO; bitpos: [14]; default: 0;
+ *  The masked status bit for the interrupt triggered when fault_event2 ends.
+ */
+#define MCPWM_FAULT2_CLR_INT_ST    (BIT(14))
+#define MCPWM_FAULT2_CLR_INT_ST_M  (MCPWM_FAULT2_CLR_INT_ST_V << MCPWM_FAULT2_CLR_INT_ST_S)
+#define MCPWM_FAULT2_CLR_INT_ST_V  0x00000001U
+#define MCPWM_FAULT2_CLR_INT_ST_S  14
+/** MCPWM_OP0_TEA_INT_ST : RO; bitpos: [15]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM operator 0 TEA event
+ */
+#define MCPWM_OP0_TEA_INT_ST    (BIT(15))
+#define MCPWM_OP0_TEA_INT_ST_M  (MCPWM_OP0_TEA_INT_ST_V << MCPWM_OP0_TEA_INT_ST_S)
+#define MCPWM_OP0_TEA_INT_ST_V  0x00000001U
+#define MCPWM_OP0_TEA_INT_ST_S  15
+/** MCPWM_OP1_TEA_INT_ST : RO; bitpos: [16]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM operator 1 TEA event
+ */
+#define MCPWM_OP1_TEA_INT_ST    (BIT(16))
+#define MCPWM_OP1_TEA_INT_ST_M  (MCPWM_OP1_TEA_INT_ST_V << MCPWM_OP1_TEA_INT_ST_S)
+#define MCPWM_OP1_TEA_INT_ST_V  0x00000001U
+#define MCPWM_OP1_TEA_INT_ST_S  16
+/** MCPWM_OP2_TEA_INT_ST : RO; bitpos: [17]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM operator 2 TEA event
+ */
+#define MCPWM_OP2_TEA_INT_ST    (BIT(17))
+#define MCPWM_OP2_TEA_INT_ST_M  (MCPWM_OP2_TEA_INT_ST_V << MCPWM_OP2_TEA_INT_ST_S)
+#define MCPWM_OP2_TEA_INT_ST_V  0x00000001U
+#define MCPWM_OP2_TEA_INT_ST_S  17
+/** MCPWM_OP0_TEB_INT_ST : RO; bitpos: [18]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM operator 0 TEB event
+ */
+#define MCPWM_OP0_TEB_INT_ST    (BIT(18))
+#define MCPWM_OP0_TEB_INT_ST_M  (MCPWM_OP0_TEB_INT_ST_V << MCPWM_OP0_TEB_INT_ST_S)
+#define MCPWM_OP0_TEB_INT_ST_V  0x00000001U
+#define MCPWM_OP0_TEB_INT_ST_S  18
+/** MCPWM_OP1_TEB_INT_ST : RO; bitpos: [19]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM operator 1 TEB event
+ */
+#define MCPWM_OP1_TEB_INT_ST    (BIT(19))
+#define MCPWM_OP1_TEB_INT_ST_M  (MCPWM_OP1_TEB_INT_ST_V << MCPWM_OP1_TEB_INT_ST_S)
+#define MCPWM_OP1_TEB_INT_ST_V  0x00000001U
+#define MCPWM_OP1_TEB_INT_ST_S  19
+/** MCPWM_OP2_TEB_INT_ST : RO; bitpos: [20]; default: 0;
+ *  The masked status bit for the interrupt triggered by a PWM operator 2 TEB event
+ */
+#define MCPWM_OP2_TEB_INT_ST    (BIT(20))
+#define MCPWM_OP2_TEB_INT_ST_M  (MCPWM_OP2_TEB_INT_ST_V << MCPWM_OP2_TEB_INT_ST_S)
+#define MCPWM_OP2_TEB_INT_ST_V  0x00000001U
+#define MCPWM_OP2_TEB_INT_ST_S  20
+/** MCPWM_FH0_CBC_INT_ST : RO; bitpos: [21]; default: 0;
+ *  The masked status bit for the interrupt triggered by a cycle-by-cycle mode action
+ *  on PWM0.
+ */
+#define MCPWM_FH0_CBC_INT_ST    (BIT(21))
+#define MCPWM_FH0_CBC_INT_ST_M  (MCPWM_FH0_CBC_INT_ST_V << MCPWM_FH0_CBC_INT_ST_S)
+#define MCPWM_FH0_CBC_INT_ST_V  0x00000001U
+#define MCPWM_FH0_CBC_INT_ST_S  21
+/** MCPWM_FH1_CBC_INT_ST : RO; bitpos: [22]; default: 0;
+ *  The masked status bit for the interrupt triggered by a cycle-by-cycle mode action
+ *  on PWM1.
+ */
+#define MCPWM_FH1_CBC_INT_ST    (BIT(22))
+#define MCPWM_FH1_CBC_INT_ST_M  (MCPWM_FH1_CBC_INT_ST_V << MCPWM_FH1_CBC_INT_ST_S)
+#define MCPWM_FH1_CBC_INT_ST_V  0x00000001U
+#define MCPWM_FH1_CBC_INT_ST_S  22
+/** MCPWM_FH2_CBC_INT_ST : RO; bitpos: [23]; default: 0;
+ *  The masked status bit for the interrupt triggered by a cycle-by-cycle mode action
+ *  on PWM2.
+ */
+#define MCPWM_FH2_CBC_INT_ST    (BIT(23))
+#define MCPWM_FH2_CBC_INT_ST_M  (MCPWM_FH2_CBC_INT_ST_V << MCPWM_FH2_CBC_INT_ST_S)
+#define MCPWM_FH2_CBC_INT_ST_V  0x00000001U
+#define MCPWM_FH2_CBC_INT_ST_S  23
+/** MCPWM_FH0_OST_INT_ST : RO; bitpos: [24]; default: 0;
+ *  The masked status bit for the interrupt triggered by a one-shot mode action on PWM0.
+ */
+#define MCPWM_FH0_OST_INT_ST    (BIT(24))
+#define MCPWM_FH0_OST_INT_ST_M  (MCPWM_FH0_OST_INT_ST_V << MCPWM_FH0_OST_INT_ST_S)
+#define MCPWM_FH0_OST_INT_ST_V  0x00000001U
+#define MCPWM_FH0_OST_INT_ST_S  24
+/** MCPWM_FH1_OST_INT_ST : RO; bitpos: [25]; default: 0;
+ *  The masked status bit for the interrupt triggered by a one-shot mode action on PWM1.
+ */
+#define MCPWM_FH1_OST_INT_ST    (BIT(25))
+#define MCPWM_FH1_OST_INT_ST_M  (MCPWM_FH1_OST_INT_ST_V << MCPWM_FH1_OST_INT_ST_S)
+#define MCPWM_FH1_OST_INT_ST_V  0x00000001U
+#define MCPWM_FH1_OST_INT_ST_S  25
+/** MCPWM_FH2_OST_INT_ST : RO; bitpos: [26]; default: 0;
+ *  The masked status bit for the interrupt triggered by a one-shot mode action on PWM2.
+ */
+#define MCPWM_FH2_OST_INT_ST    (BIT(26))
+#define MCPWM_FH2_OST_INT_ST_M  (MCPWM_FH2_OST_INT_ST_V << MCPWM_FH2_OST_INT_ST_S)
+#define MCPWM_FH2_OST_INT_ST_V  0x00000001U
+#define MCPWM_FH2_OST_INT_ST_S  26
+/** MCPWM_CAP0_INT_ST : RO; bitpos: [27]; default: 0;
+ *  The masked status bit for the interrupt triggered by capture on channel 0.
+ */
+#define MCPWM_CAP0_INT_ST    (BIT(27))
+#define MCPWM_CAP0_INT_ST_M  (MCPWM_CAP0_INT_ST_V << MCPWM_CAP0_INT_ST_S)
+#define MCPWM_CAP0_INT_ST_V  0x00000001U
+#define MCPWM_CAP0_INT_ST_S  27
+/** MCPWM_CAP1_INT_ST : RO; bitpos: [28]; default: 0;
+ *  The masked status bit for the interrupt triggered by capture on channel 1.
+ */
+#define MCPWM_CAP1_INT_ST    (BIT(28))
+#define MCPWM_CAP1_INT_ST_M  (MCPWM_CAP1_INT_ST_V << MCPWM_CAP1_INT_ST_S)
+#define MCPWM_CAP1_INT_ST_V  0x00000001U
+#define MCPWM_CAP1_INT_ST_S  28
+/** MCPWM_CAP2_INT_ST : RO; bitpos: [29]; default: 0;
+ *  The masked status bit for the interrupt triggered by capture on channel 2.
+ */
+#define MCPWM_CAP2_INT_ST    (BIT(29))
+#define MCPWM_CAP2_INT_ST_M  (MCPWM_CAP2_INT_ST_V << MCPWM_CAP2_INT_ST_S)
+#define MCPWM_CAP2_INT_ST_V  0x00000001U
+#define MCPWM_CAP2_INT_ST_S  29
+
+/** MCPWM_INT_CLR_REG register
+ *  Interrupt clear bits
+ */
+#define MCPWM_INT_CLR_REG(i) (DR_REG_MCPWM_BASE(i) + 0x11c)
+/** MCPWM_TIMER0_STOP_INT_CLR : WT; bitpos: [0]; default: 0;
+ *  Set this bit to clear the interrupt triggered when the timer 0 stops.
+ */
+#define MCPWM_TIMER0_STOP_INT_CLR    (BIT(0))
+#define MCPWM_TIMER0_STOP_INT_CLR_M  (MCPWM_TIMER0_STOP_INT_CLR_V << MCPWM_TIMER0_STOP_INT_CLR_S)
+#define MCPWM_TIMER0_STOP_INT_CLR_V  0x00000001U
+#define MCPWM_TIMER0_STOP_INT_CLR_S  0
+/** MCPWM_TIMER1_STOP_INT_CLR : WT; bitpos: [1]; default: 0;
+ *  Set this bit to clear the interrupt triggered when the timer 1 stops.
+ */
+#define MCPWM_TIMER1_STOP_INT_CLR    (BIT(1))
+#define MCPWM_TIMER1_STOP_INT_CLR_M  (MCPWM_TIMER1_STOP_INT_CLR_V << MCPWM_TIMER1_STOP_INT_CLR_S)
+#define MCPWM_TIMER1_STOP_INT_CLR_V  0x00000001U
+#define MCPWM_TIMER1_STOP_INT_CLR_S  1
+/** MCPWM_TIMER2_STOP_INT_CLR : WT; bitpos: [2]; default: 0;
+ *  Set this bit to clear the interrupt triggered when the timer 2 stops.
+ */
+#define MCPWM_TIMER2_STOP_INT_CLR    (BIT(2))
+#define MCPWM_TIMER2_STOP_INT_CLR_M  (MCPWM_TIMER2_STOP_INT_CLR_V << MCPWM_TIMER2_STOP_INT_CLR_S)
+#define MCPWM_TIMER2_STOP_INT_CLR_V  0x00000001U
+#define MCPWM_TIMER2_STOP_INT_CLR_S  2
+/** MCPWM_TIMER0_TEZ_INT_CLR : WT; bitpos: [3]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM timer 0 TEZ event.
+ */
+#define MCPWM_TIMER0_TEZ_INT_CLR    (BIT(3))
+#define MCPWM_TIMER0_TEZ_INT_CLR_M  (MCPWM_TIMER0_TEZ_INT_CLR_V << MCPWM_TIMER0_TEZ_INT_CLR_S)
+#define MCPWM_TIMER0_TEZ_INT_CLR_V  0x00000001U
+#define MCPWM_TIMER0_TEZ_INT_CLR_S  3
+/** MCPWM_TIMER1_TEZ_INT_CLR : WT; bitpos: [4]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM timer 1 TEZ event.
+ */
+#define MCPWM_TIMER1_TEZ_INT_CLR    (BIT(4))
+#define MCPWM_TIMER1_TEZ_INT_CLR_M  (MCPWM_TIMER1_TEZ_INT_CLR_V << MCPWM_TIMER1_TEZ_INT_CLR_S)
+#define MCPWM_TIMER1_TEZ_INT_CLR_V  0x00000001U
+#define MCPWM_TIMER1_TEZ_INT_CLR_S  4
+/** MCPWM_TIMER2_TEZ_INT_CLR : WT; bitpos: [5]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM timer 2 TEZ event.
+ */
+#define MCPWM_TIMER2_TEZ_INT_CLR    (BIT(5))
+#define MCPWM_TIMER2_TEZ_INT_CLR_M  (MCPWM_TIMER2_TEZ_INT_CLR_V << MCPWM_TIMER2_TEZ_INT_CLR_S)
+#define MCPWM_TIMER2_TEZ_INT_CLR_V  0x00000001U
+#define MCPWM_TIMER2_TEZ_INT_CLR_S  5
+/** MCPWM_TIMER0_TEP_INT_CLR : WT; bitpos: [6]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM timer 0 TEP event.
+ */
+#define MCPWM_TIMER0_TEP_INT_CLR    (BIT(6))
+#define MCPWM_TIMER0_TEP_INT_CLR_M  (MCPWM_TIMER0_TEP_INT_CLR_V << MCPWM_TIMER0_TEP_INT_CLR_S)
+#define MCPWM_TIMER0_TEP_INT_CLR_V  0x00000001U
+#define MCPWM_TIMER0_TEP_INT_CLR_S  6
+/** MCPWM_TIMER1_TEP_INT_CLR : WT; bitpos: [7]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM timer 1 TEP event.
+ */
+#define MCPWM_TIMER1_TEP_INT_CLR    (BIT(7))
+#define MCPWM_TIMER1_TEP_INT_CLR_M  (MCPWM_TIMER1_TEP_INT_CLR_V << MCPWM_TIMER1_TEP_INT_CLR_S)
+#define MCPWM_TIMER1_TEP_INT_CLR_V  0x00000001U
+#define MCPWM_TIMER1_TEP_INT_CLR_S  7
+/** MCPWM_TIMER2_TEP_INT_CLR : WT; bitpos: [8]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM timer 2 TEP event.
+ */
+#define MCPWM_TIMER2_TEP_INT_CLR    (BIT(8))
+#define MCPWM_TIMER2_TEP_INT_CLR_M  (MCPWM_TIMER2_TEP_INT_CLR_V << MCPWM_TIMER2_TEP_INT_CLR_S)
+#define MCPWM_TIMER2_TEP_INT_CLR_V  0x00000001U
+#define MCPWM_TIMER2_TEP_INT_CLR_S  8
+/** MCPWM_FAULT0_INT_CLR : WT; bitpos: [9]; default: 0;
+ *  Set this bit to clear the interrupt triggered when fault_event0 starts.
+ */
+#define MCPWM_FAULT0_INT_CLR    (BIT(9))
+#define MCPWM_FAULT0_INT_CLR_M  (MCPWM_FAULT0_INT_CLR_V << MCPWM_FAULT0_INT_CLR_S)
+#define MCPWM_FAULT0_INT_CLR_V  0x00000001U
+#define MCPWM_FAULT0_INT_CLR_S  9
+/** MCPWM_FAULT1_INT_CLR : WT; bitpos: [10]; default: 0;
+ *  Set this bit to clear the interrupt triggered when fault_event1 starts.
+ */
+#define MCPWM_FAULT1_INT_CLR    (BIT(10))
+#define MCPWM_FAULT1_INT_CLR_M  (MCPWM_FAULT1_INT_CLR_V << MCPWM_FAULT1_INT_CLR_S)
+#define MCPWM_FAULT1_INT_CLR_V  0x00000001U
+#define MCPWM_FAULT1_INT_CLR_S  10
+/** MCPWM_FAULT2_INT_CLR : WT; bitpos: [11]; default: 0;
+ *  Set this bit to clear the interrupt triggered when fault_event2 starts.
+ */
+#define MCPWM_FAULT2_INT_CLR    (BIT(11))
+#define MCPWM_FAULT2_INT_CLR_M  (MCPWM_FAULT2_INT_CLR_V << MCPWM_FAULT2_INT_CLR_S)
+#define MCPWM_FAULT2_INT_CLR_V  0x00000001U
+#define MCPWM_FAULT2_INT_CLR_S  11
+/** MCPWM_FAULT0_CLR_INT_CLR : WT; bitpos: [12]; default: 0;
+ *  Set this bit to clear the interrupt triggered when fault_event0 ends.
+ */
+#define MCPWM_FAULT0_CLR_INT_CLR    (BIT(12))
+#define MCPWM_FAULT0_CLR_INT_CLR_M  (MCPWM_FAULT0_CLR_INT_CLR_V << MCPWM_FAULT0_CLR_INT_CLR_S)
+#define MCPWM_FAULT0_CLR_INT_CLR_V  0x00000001U
+#define MCPWM_FAULT0_CLR_INT_CLR_S  12
+/** MCPWM_FAULT1_CLR_INT_CLR : WT; bitpos: [13]; default: 0;
+ *  Set this bit to clear the interrupt triggered when fault_event1 ends.
+ */
+#define MCPWM_FAULT1_CLR_INT_CLR    (BIT(13))
+#define MCPWM_FAULT1_CLR_INT_CLR_M  (MCPWM_FAULT1_CLR_INT_CLR_V << MCPWM_FAULT1_CLR_INT_CLR_S)
+#define MCPWM_FAULT1_CLR_INT_CLR_V  0x00000001U
+#define MCPWM_FAULT1_CLR_INT_CLR_S  13
+/** MCPWM_FAULT2_CLR_INT_CLR : WT; bitpos: [14]; default: 0;
+ *  Set this bit to clear the interrupt triggered when fault_event2 ends.
+ */
+#define MCPWM_FAULT2_CLR_INT_CLR    (BIT(14))
+#define MCPWM_FAULT2_CLR_INT_CLR_M  (MCPWM_FAULT2_CLR_INT_CLR_V << MCPWM_FAULT2_CLR_INT_CLR_S)
+#define MCPWM_FAULT2_CLR_INT_CLR_V  0x00000001U
+#define MCPWM_FAULT2_CLR_INT_CLR_S  14
+/** MCPWM_OP0_TEA_INT_CLR : WT; bitpos: [15]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM operator 0 TEA event
+ */
+#define MCPWM_OP0_TEA_INT_CLR    (BIT(15))
+#define MCPWM_OP0_TEA_INT_CLR_M  (MCPWM_OP0_TEA_INT_CLR_V << MCPWM_OP0_TEA_INT_CLR_S)
+#define MCPWM_OP0_TEA_INT_CLR_V  0x00000001U
+#define MCPWM_OP0_TEA_INT_CLR_S  15
+/** MCPWM_OP1_TEA_INT_CLR : WT; bitpos: [16]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM operator 1 TEA event
+ */
+#define MCPWM_OP1_TEA_INT_CLR    (BIT(16))
+#define MCPWM_OP1_TEA_INT_CLR_M  (MCPWM_OP1_TEA_INT_CLR_V << MCPWM_OP1_TEA_INT_CLR_S)
+#define MCPWM_OP1_TEA_INT_CLR_V  0x00000001U
+#define MCPWM_OP1_TEA_INT_CLR_S  16
+/** MCPWM_OP2_TEA_INT_CLR : WT; bitpos: [17]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM operator 2 TEA event
+ */
+#define MCPWM_OP2_TEA_INT_CLR    (BIT(17))
+#define MCPWM_OP2_TEA_INT_CLR_M  (MCPWM_OP2_TEA_INT_CLR_V << MCPWM_OP2_TEA_INT_CLR_S)
+#define MCPWM_OP2_TEA_INT_CLR_V  0x00000001U
+#define MCPWM_OP2_TEA_INT_CLR_S  17
+/** MCPWM_OP0_TEB_INT_CLR : WT; bitpos: [18]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM operator 0 TEB event
+ */
+#define MCPWM_OP0_TEB_INT_CLR    (BIT(18))
+#define MCPWM_OP0_TEB_INT_CLR_M  (MCPWM_OP0_TEB_INT_CLR_V << MCPWM_OP0_TEB_INT_CLR_S)
+#define MCPWM_OP0_TEB_INT_CLR_V  0x00000001U
+#define MCPWM_OP0_TEB_INT_CLR_S  18
+/** MCPWM_OP1_TEB_INT_CLR : WT; bitpos: [19]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM operator 1 TEB event
+ */
+#define MCPWM_OP1_TEB_INT_CLR    (BIT(19))
+#define MCPWM_OP1_TEB_INT_CLR_M  (MCPWM_OP1_TEB_INT_CLR_V << MCPWM_OP1_TEB_INT_CLR_S)
+#define MCPWM_OP1_TEB_INT_CLR_V  0x00000001U
+#define MCPWM_OP1_TEB_INT_CLR_S  19
+/** MCPWM_OP2_TEB_INT_CLR : WT; bitpos: [20]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a PWM operator 2 TEB event
+ */
+#define MCPWM_OP2_TEB_INT_CLR    (BIT(20))
+#define MCPWM_OP2_TEB_INT_CLR_M  (MCPWM_OP2_TEB_INT_CLR_V << MCPWM_OP2_TEB_INT_CLR_S)
+#define MCPWM_OP2_TEB_INT_CLR_V  0x00000001U
+#define MCPWM_OP2_TEB_INT_CLR_S  20
+/** MCPWM_FH0_CBC_INT_CLR : WT; bitpos: [21]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a cycle-by-cycle mode action on
+ *  PWM0.
+ */
+#define MCPWM_FH0_CBC_INT_CLR    (BIT(21))
+#define MCPWM_FH0_CBC_INT_CLR_M  (MCPWM_FH0_CBC_INT_CLR_V << MCPWM_FH0_CBC_INT_CLR_S)
+#define MCPWM_FH0_CBC_INT_CLR_V  0x00000001U
+#define MCPWM_FH0_CBC_INT_CLR_S  21
+/** MCPWM_FH1_CBC_INT_CLR : WT; bitpos: [22]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a cycle-by-cycle mode action on
+ *  PWM1.
+ */
+#define MCPWM_FH1_CBC_INT_CLR    (BIT(22))
+#define MCPWM_FH1_CBC_INT_CLR_M  (MCPWM_FH1_CBC_INT_CLR_V << MCPWM_FH1_CBC_INT_CLR_S)
+#define MCPWM_FH1_CBC_INT_CLR_V  0x00000001U
+#define MCPWM_FH1_CBC_INT_CLR_S  22
+/** MCPWM_FH2_CBC_INT_CLR : WT; bitpos: [23]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a cycle-by-cycle mode action on
+ *  PWM2.
+ */
+#define MCPWM_FH2_CBC_INT_CLR    (BIT(23))
+#define MCPWM_FH2_CBC_INT_CLR_M  (MCPWM_FH2_CBC_INT_CLR_V << MCPWM_FH2_CBC_INT_CLR_S)
+#define MCPWM_FH2_CBC_INT_CLR_V  0x00000001U
+#define MCPWM_FH2_CBC_INT_CLR_S  23
+/** MCPWM_FH0_OST_INT_CLR : WT; bitpos: [24]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a one-shot mode action on PWM0.
+ */
+#define MCPWM_FH0_OST_INT_CLR    (BIT(24))
+#define MCPWM_FH0_OST_INT_CLR_M  (MCPWM_FH0_OST_INT_CLR_V << MCPWM_FH0_OST_INT_CLR_S)
+#define MCPWM_FH0_OST_INT_CLR_V  0x00000001U
+#define MCPWM_FH0_OST_INT_CLR_S  24
+/** MCPWM_FH1_OST_INT_CLR : WT; bitpos: [25]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a one-shot mode action on PWM1.
+ */
+#define MCPWM_FH1_OST_INT_CLR    (BIT(25))
+#define MCPWM_FH1_OST_INT_CLR_M  (MCPWM_FH1_OST_INT_CLR_V << MCPWM_FH1_OST_INT_CLR_S)
+#define MCPWM_FH1_OST_INT_CLR_V  0x00000001U
+#define MCPWM_FH1_OST_INT_CLR_S  25
+/** MCPWM_FH2_OST_INT_CLR : WT; bitpos: [26]; default: 0;
+ *  Set this bit to clear the interrupt triggered by a one-shot mode action on PWM2.
+ */
+#define MCPWM_FH2_OST_INT_CLR    (BIT(26))
+#define MCPWM_FH2_OST_INT_CLR_M  (MCPWM_FH2_OST_INT_CLR_V << MCPWM_FH2_OST_INT_CLR_S)
+#define MCPWM_FH2_OST_INT_CLR_V  0x00000001U
+#define MCPWM_FH2_OST_INT_CLR_S  26
+/** MCPWM_CAP0_INT_CLR : WT; bitpos: [27]; default: 0;
+ *  Set this bit to clear the interrupt triggered by capture on channel 0.
+ */
+#define MCPWM_CAP0_INT_CLR    (BIT(27))
+#define MCPWM_CAP0_INT_CLR_M  (MCPWM_CAP0_INT_CLR_V << MCPWM_CAP0_INT_CLR_S)
+#define MCPWM_CAP0_INT_CLR_V  0x00000001U
+#define MCPWM_CAP0_INT_CLR_S  27
+/** MCPWM_CAP1_INT_CLR : WT; bitpos: [28]; default: 0;
+ *  Set this bit to clear the interrupt triggered by capture on channel 1.
+ */
+#define MCPWM_CAP1_INT_CLR    (BIT(28))
+#define MCPWM_CAP1_INT_CLR_M  (MCPWM_CAP1_INT_CLR_V << MCPWM_CAP1_INT_CLR_S)
+#define MCPWM_CAP1_INT_CLR_V  0x00000001U
+#define MCPWM_CAP1_INT_CLR_S  28
+/** MCPWM_CAP2_INT_CLR : WT; bitpos: [29]; default: 0;
+ *  Set this bit to clear the interrupt triggered by capture on channel 2.
+ */
+#define MCPWM_CAP2_INT_CLR    (BIT(29))
+#define MCPWM_CAP2_INT_CLR_M  (MCPWM_CAP2_INT_CLR_V << MCPWM_CAP2_INT_CLR_S)
+#define MCPWM_CAP2_INT_CLR_V  0x00000001U
+#define MCPWM_CAP2_INT_CLR_S  29
+
+/** MCPWM_CLK_REG register
+ *  MCPWM APB configuration register
+ */
+#define MCPWM_CLK_REG(i) (DR_REG_MCPWM_BASE(i) + 0x120)
+/** MCPWM_CLK_EN : R/W; bitpos: [0]; default: 0;
+ *  Force clock on for this register file
+ */
+#define MCPWM_CLK_EN    (BIT(0))
+#define MCPWM_CLK_EN_M  (MCPWM_CLK_EN_V << MCPWM_CLK_EN_S)
+#define MCPWM_CLK_EN_V  0x00000001U
+#define MCPWM_CLK_EN_S  0
+
+/** MCPWM_VERSION_REG register
+ *  Version register.
+ */
+#define MCPWM_VERSION_REG(i) (DR_REG_MCPWM_BASE(i) + 0x124)
+/** MCPWM_DATE : R/W; bitpos: [27:0]; default: 34632240;
+ *  Version of this register file
+ */
+#define MCPWM_DATE    0x0FFFFFFFU
+#define MCPWM_DATE_M  (MCPWM_DATE_V << MCPWM_DATE_S)
+#define MCPWM_DATE_V  0x0FFFFFFFU
+#define MCPWM_DATE_S  0
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mcpwm_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mcpwm_struct.h
new file mode 100644
index 00000000000..4e13290fe8f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mcpwm_struct.h
@@ -0,0 +1,1468 @@
+/**
+ *  SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ *  SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Group: Prescaler configuration */
+/** Type of clk_cfg register
+ *  PWM clock prescaler register.
+ */
+typedef union {
+    struct {
+        /** clk_prescale : R/W; bitpos: [7:0]; default: 0;
+         *  Period of PWM_clk = 6.25ns * (PWM_CLK_PRESCALE + 1)
+         */
+        uint32_t clk_prescale: 8;
+        uint32_t reserved_8: 24;
+    };
+    uint32_t val;
+} mcpwm_clk_cfg_reg_t;
+
+
+/** Group: MCPWM Timer Configuration and status */
+/** Type of timer_cfg0 register
+ *  PWM timer period and update method configuration register.
+ */
+typedef union {
+    struct {
+        /** timer_prescale : R/W; bitpos: [7:0]; default: 0;
+         *  Configure the divisor of PT0_clk, takes effect when PWM timer stops and starts
+         *  agsin. period of PT0_clk = Period of PWM_clk * (PWM_TIMER_PRESCALE + 1)
+         */
+        uint32_t timer_prescale: 8;
+        /** timer_period : R/W; bitpos: [23:8]; default: 255;
+         *  period shadow register of PWM timer
+         */
+        uint32_t timer_period: 16;
+        /** timer_period_upmethod : R/W; bitpos: [25:24]; default: 0;
+         *  Update method for active register of PWM timer period, 0: immediate, 1: TEZ, 2:
+         *  sync, 3: TEZ or sync. TEZ here and below means timer equal zero event
+         */
+        uint32_t timer_period_upmethod: 2;
+        uint32_t reserved_26: 6;
+    };
+    uint32_t val;
+} mcpwm_timer_cfg0_reg_t;
+
+/** Type of timer_cfg1 register
+ *  PWM timer working mode and start/stop control configuration register.
+ */
+typedef union {
+    struct {
+        /** timer_start : R/W/SC; bitpos: [2:0]; default: 0;
+         *  PWM timer start and stop control. 0: if PWM timer starts, then stops at TEZ, 1:
+         *  if timer starts, then stops at TEP, 2: PWM timer starts and runs on, 3: timer
+         *  starts and stops at the next TEZ, 4: timer starts and stops at the next TEP. TEP
+         *  here and below means the event that happens when the timer equals to period
+         */
+        uint32_t timer_start: 3;
+        /** timer_mod : R/W; bitpos: [4:3]; default: 0;
+         *  PWM timer working mode, 0: freeze, 1: increase mode, 2: decrease mode, 3: up-down
+         *  mode
+         */
+        uint32_t timer_mod: 2;
+        uint32_t reserved_5: 27;
+    };
+    uint32_t val;
+} mcpwm_timer_cfg1_reg_t;
+
+/** Type of timer_sync register
+ *  PWM timer sync function configuration register.
+ */
+typedef union {
+    struct {
+        /** timer_synci_en : R/W; bitpos: [0]; default: 0;
+         *  When set, timer reloading with phase on sync input event is enabled.
+         */
+        uint32_t timer_synci_en: 1;
+        /** timer_sync_sw : R/W; bitpos: [1]; default: 0;
+         *  Toggling this bit will trigger a software sync.
+         */
+        uint32_t timer_sync_sw: 1;
+        /** timer_synco_sel : R/W; bitpos: [3:2]; default: 0;
+         *  PWM timer sync_out selection, 0: sync_in, 1: TEZ, 2: TEP, and sync out will always
+         *  generate when toggling the reg_timer_sync_sw bit
+         */
+        uint32_t timer_synco_sel: 2;
+        /** timer_phase : R/W; bitpos: [19:4]; default: 0;
+         *  phase for timer reload on sync event
+         */
+        uint32_t timer_phase: 16;
+        /** timer_phase_direction : R/W; bitpos: [20]; default: 0;
+         *  Configure the PWM timer's direction at the time sync event occurs when timer mode
+         *  is up-down mode: 0-increase,1-decrease
+         */
+        uint32_t timer_phase_direction: 1;
+        uint32_t reserved_21: 11;
+    };
+    uint32_t val;
+} mcpwm_timer_sync_reg_t;
+
+/** Type of timer_status register
+ *  PWM timer status register.
+ */
+typedef union {
+    struct {
+        /** timer_value : RO; bitpos: [15:0]; default: 0;
+         *  current PWM timer counter value
+         */
+        uint32_t timer_value: 16;
+        /** timer_direction : RO; bitpos: [16]; default: 0;
+         *  current PWM timer counter direction, 0: increment 1: decrement
+         */
+        uint32_t timer_direction: 1;
+        uint32_t reserved_17: 15;
+    };
+    uint32_t val;
+} mcpwm_timer_status_reg_t;
+
+
+/** Group: Common configuration for MCPWM timers */
+/** Type of timer_synci_cfg register
+ *  Synchronization input selection for three PWM timers.
+ */
+typedef union {
+    struct {
+        /** timer0_syncisel : R/W; bitpos: [2:0]; default: 0;
+         *  select sync input for PWM timer0, 1: PWM timer0 sync_out, 2: PWM timer1 sync_out,
+         *  3: PWM timer2 sync_out, 4: SYNC0 from GPIO matrix, 5: SYNC1 from GPIO matrix, 6:
+         *  SYNC2 from GPIO matrix, other values: no sync input selected
+         */
+        uint32_t timer0_syncisel: 3;
+        /** timer1_syncisel : R/W; bitpos: [5:3]; default: 0;
+         *  select sync input for PWM timer1, 1: PWM timer0 sync_out, 2: PWM timer1 sync_out,
+         *  3: PWM timer2 sync_out, 4: SYNC0 from GPIO matrix, 5: SYNC1 from GPIO matrix, 6:
+         *  SYNC2 from GPIO matrix, other values: no sync input selected
+         */
+        uint32_t timer1_syncisel: 3;
+        /** timer2_syncisel : R/W; bitpos: [8:6]; default: 0;
+         *  select sync input for PWM timer2, 1: PWM timer0 sync_out, 2: PWM timer1 sync_out,
+         *  3: PWM timer2 sync_out, 4: SYNC0 from GPIO matrix, 5: SYNC1 from GPIO matrix, 6:
+         *  SYNC2 from GPIO matrix, other values: no sync input selected
+         */
+        uint32_t timer2_syncisel: 3;
+        /** external_synci0_invert : R/W; bitpos: [9]; default: 0;
+         *  invert SYNC0 from GPIO matrix
+         */
+        uint32_t external_synci0_invert: 1;
+        /** external_synci1_invert : R/W; bitpos: [10]; default: 0;
+         *  invert SYNC1 from GPIO matrix
+         */
+        uint32_t external_synci1_invert: 1;
+        /** external_synci2_invert : R/W; bitpos: [11]; default: 0;
+         *  invert SYNC2 from GPIO matrix
+         */
+        uint32_t external_synci2_invert: 1;
+        uint32_t reserved_12: 20;
+    };
+    uint32_t val;
+} mcpwm_timer_synci_cfg_reg_t;
+
+/** Type of operator_timersel register
+ *  Select specific timer for PWM operators.
+ */
+typedef union {
+    struct {
+        /** operator0_timersel : R/W; bitpos: [1:0]; default: 0;
+         *  Select which PWM timer is the timing reference for PWM operator0, 0: timer0, 1:
+         *  timer1, 2: timer2
+         */
+        uint32_t operator0_timersel: 2;
+        /** operator1_timersel : R/W; bitpos: [3:2]; default: 0;
+         *  Select which PWM timer is the timing reference for PWM operator1, 0: timer0, 1:
+         *  timer1, 2: timer2
+         */
+        uint32_t operator1_timersel: 2;
+        /** operator2_timersel : R/W; bitpos: [5:4]; default: 0;
+         *  Select which PWM timer is the timing reference for PWM operator2, 0: timer0, 1:
+         *  timer1, 2: timer2
+         */
+        uint32_t operator2_timersel: 2;
+        uint32_t reserved_6: 26;
+    };
+    uint32_t val;
+} mcpwm_operator_timersel_reg_t;
+
+
+/** Group: MCPWM Operator Configuration and Status */
+/** Type of gen_stmp_cfg register
+ *  Transfer status and update method for time stamp registers A and B
+ */
+typedef union {
+    struct {
+        /** gen_a_upmethod : R/W; bitpos: [3:0]; default: 0;
+         *  Update method for PWM generator time stamp A's active register. When all bits are
+         *  set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when
+         *  bit2 is set to 1: sync, when bit3 is set to 1: disable the update.
+         */
+        uint32_t gen_a_upmethod: 4;
+        /** gen_b_upmethod : R/W; bitpos: [7:4]; default: 0;
+         *  Update method for PWM generator time stamp B's active register. When all bits are
+         *  set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when
+         *  bit2 is set to 1: sync, when bit3 is set to 1: disable the update.
+         */
+        uint32_t gen_b_upmethod: 4;
+        /** gen_a_shdw_full : R/W/WTC/SC; bitpos: [8]; default: 0;
+         *  Set and reset by hardware. If set, PWM generator time stamp A's shadow reg is
+         *  filled and waiting to be transferred to A's active reg. If cleared, A's active reg
+         *  has been updated with shadow register latest value
+         */
+        uint32_t gen_a_shdw_full: 1;
+        /** gen_b_shdw_full : R/W/WTC/SC; bitpos: [9]; default: 0;
+         *  Set and reset by hardware. If set, PWM generator time stamp B's shadow reg is
+         *  filled and waiting to be transferred to B's active reg. If cleared, B's active reg
+         *  has been updated with shadow register latest value
+         */
+        uint32_t gen_b_shdw_full: 1;
+        uint32_t reserved_10: 22;
+    };
+    uint32_t val;
+} mcpwm_gen_stmp_cfg_reg_t;
+
+/** Type of gen_tstmp register
+ *  PWM generator shadow register for timer stamp
+ */
+typedef union {
+    struct {
+        /** gen : R/W; bitpos: [15:0]; default: 0;
+         *  PWM generator time stamp's shadow register
+         */
+        uint32_t gen: 16;
+        uint32_t reserved_16: 16;
+    };
+    uint32_t val;
+} mcpwm_gen_tstmp_reg_t;
+
+/** Type of gen_cfg0 register
+ *  PWM generator event T0 and T1 handling
+ */
+typedef union {
+    struct {
+        /** gen_cfg_upmethod : R/W; bitpos: [3:0]; default: 0;
+         *  Update method for PWM generator's active register of configuration. When all bits
+         *  are set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to
+         *  1:TEP,when bit2 is set to 1:sync,when bit3 is set to 1:disable the update
+         */
+        uint32_t gen_cfg_upmethod: 4;
+        /** gen_t0_sel : R/W; bitpos: [6:4]; default: 0;
+         *  Source selection for PWM generator event_t0, take effect immediately, 0:
+         *  fault_event0, 1: fault_event1, 2: fault_event2, 3: sync_taken, 4: none
+         */
+        uint32_t gen_t0_sel: 3;
+        /** gen_t1_sel : R/W; bitpos: [9:7]; default: 0;
+         *  Source selection for PWM generator event_t1, take effect immediately, 0:
+         *  fault_event0, 1: fault_event1, 2: fault_event2, 3: sync_taken, 4: none
+         */
+        uint32_t gen_t1_sel: 3;
+        uint32_t reserved_10: 22;
+    };
+    uint32_t val;
+} mcpwm_gen_cfg0_reg_t;
+
+/** Type of gen_force register
+ *  Permissives to force PWM0A and PWM0B outputs by software
+ */
+typedef union {
+    struct {
+        /** gen_cntuforce_upmethod : R/W; bitpos: [5:0]; default: 32;
+         *  Updating method for continuous software force of PWM generator0. When all bits are
+         *  set to 0: immediately, when bit0 is set to 1: TEZ,,when bit1 is set to 1: TEP, when
+         *  bit2 is set to 1: TEA, when bit3 is set to 1: TEB, when bit4 is set to 1: sync,
+         *  when bit5 is set to 1: disable update. (TEA/B here and below means an event
+         *  generated when the timer's value equals to that of register A/B.)
+         */
+        uint32_t gen_cntuforce_upmethod: 6;
+        /** gen_a_cntuforce_mode : R/W; bitpos: [7:6]; default: 0;
+         *  Continuous software force mode for PWM0A. 0: disabled, 1: low, 2: high, 3: disabled
+         */
+        uint32_t gen_a_cntuforce_mode: 2;
+        /** gen_b_cntuforce_mode : R/W; bitpos: [9:8]; default: 0;
+         *  Continuous software force mode for PWM0B. 0: disabled, 1: low, 2: high, 3: disabled
+         */
+        uint32_t gen_b_cntuforce_mode: 2;
+        /** gen_a_nciforce : R/W; bitpos: [10]; default: 0;
+         *  Trigger of non-continuous immediate software-force event for PWM0A, a toggle will
+         *  trigger a force event.
+         */
+        uint32_t gen_a_nciforce: 1;
+        /** gen_a_nciforce_mode : R/W; bitpos: [12:11]; default: 0;
+         *  non-continuous immediate software force mode for PWM0A, 0: disabled, 1: low, 2:
+         *  high, 3: disabled
+         */
+        uint32_t gen_a_nciforce_mode: 2;
+        /** gen_b_nciforce : R/W; bitpos: [13]; default: 0;
+         *  Trigger of non-continuous immediate software-force event for PWM0B, a toggle will
+         *  trigger a force event.
+         */
+        uint32_t gen_b_nciforce: 1;
+        /** gen_b_nciforce_mode : R/W; bitpos: [15:14]; default: 0;
+         *  non-continuous immediate software force mode for PWM0B, 0: disabled, 1: low, 2:
+         *  high, 3: disabled
+         */
+        uint32_t gen_b_nciforce_mode: 2;
+        uint32_t reserved_16: 16;
+    };
+    uint32_t val;
+} mcpwm_gen_force_reg_t;
+
+/** Type of generator register
+ *  Actions triggered by events on PWM0A
+ */
+typedef union {
+    struct {
+        /** gen_utez : R/W; bitpos: [1:0]; default: 0;
+         *  Action on PWM0A triggered by event TEZ when timer increasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_utez: 2;
+        /** gen_utep : R/W; bitpos: [3:2]; default: 0;
+         *  Action on PWM0A triggered by event TEP when timer increasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_utep: 2;
+        /** gen_utea : R/W; bitpos: [5:4]; default: 0;
+         *  Action on PWM0A triggered by event TEA when timer increasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_utea: 2;
+        /** gen_uteb : R/W; bitpos: [7:6]; default: 0;
+         *  Action on PWM0A triggered by event TEB when timer increasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_uteb: 2;
+        /** gen_ut0 : R/W; bitpos: [9:8]; default: 0;
+         *  Action on PWM0A triggered by event_t0 when timer increasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_ut0: 2;
+        /** gen_ut1 : R/W; bitpos: [11:10]; default: 0;
+         *  Action on PWM0A triggered by event_t1 when timer increasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_ut1: 2;
+        /** gen_dtez : R/W; bitpos: [13:12]; default: 0;
+         *  Action on PWM0A triggered by event TEZ when timer decreasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_dtez: 2;
+        /** gen_dtep : R/W; bitpos: [15:14]; default: 0;
+         *  Action on PWM0A triggered by event TEP when timer decreasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_dtep: 2;
+        /** gen_dtea : R/W; bitpos: [17:16]; default: 0;
+         *  Action on PWM0A triggered by event TEA when timer decreasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_dtea: 2;
+        /** gen_dteb : R/W; bitpos: [19:18]; default: 0;
+         *  Action on PWM0A triggered by event TEB when timer decreasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_dteb: 2;
+        /** gen_dt0 : R/W; bitpos: [21:20]; default: 0;
+         *  Action on PWM0A triggered by event_t0 when timer decreasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_dt0: 2;
+        /** gen_dt1 : R/W; bitpos: [23:22]; default: 0;
+         *  Action on PWM0A triggered by event_t1 when timer decreasing. 0: no change, 1: low,
+         *  2: high, 3: toggle
+         */
+        uint32_t gen_dt1: 2;
+        uint32_t reserved_24: 8;
+    };
+    uint32_t val;
+} mcpwm_gen_reg_t;
+
+/** Type of dt_cfg register
+ *  PWM generator dead time type selection and configuration
+ */
+typedef union {
+    struct {
+        /** dt_fed_upmethod : R/W; bitpos: [3:0]; default: 0;
+         *  Update method for FED (rising edge delay) active register. 0: immediate, when bit0
+         *  is set to 1: tez, when bit1 is set to 1:tep,  when bit2 is set to 1: sync, when
+         *  bit3 is set to 1: disable the update
+         */
+        uint32_t dt_fed_upmethod: 4;
+        /** dt_red_upmethod : R/W; bitpos: [7:4]; default: 0;
+         *  Update method for RED (rising edge delay) active register. 0: immediate, when bit0
+         *  is set to 1: tez, when bit1 is set to 1:tep,  when bit2 is set to 1: sync, when
+         *  bit3 is set to 1: disable the update
+         */
+        uint32_t dt_red_upmethod: 4;
+        /** dt_deb_mode : R/W; bitpos: [8]; default: 0;
+         *  S8 in table, dual-edge B mode, 0: fed/red take effect on different path separately,
+         *  1: fed/red take effect on B path, A out is in bypass or dulpB mode
+         */
+        uint32_t dt_deb_mode: 1;
+        /** dt_a_outswap : R/W; bitpos: [9]; default: 0;
+         *  S6 in table
+         */
+        uint32_t dt_a_outswap: 1;
+        /** dt_b_outswap : R/W; bitpos: [10]; default: 0;
+         *  S7 in table
+         */
+        uint32_t dt_b_outswap: 1;
+        /** dt_red_insel : R/W; bitpos: [11]; default: 0;
+         *  S4 in table
+         */
+        uint32_t dt_red_insel: 1;
+        /** dt_fed_insel : R/W; bitpos: [12]; default: 0;
+         *  S5 in table
+         */
+        uint32_t dt_fed_insel: 1;
+        /** dt_red_outinvert : R/W; bitpos: [13]; default: 0;
+         *  S2 in table
+         */
+        uint32_t dt_red_outinvert: 1;
+        /** dt_fed_outinvert : R/W; bitpos: [14]; default: 0;
+         *  S3 in table
+         */
+        uint32_t dt_fed_outinvert: 1;
+        /** dt_a_outbypass : R/W; bitpos: [15]; default: 1;
+         *  S1 in table
+         */
+        uint32_t dt_a_outbypass: 1;
+        /** dt_b_outbypass : R/W; bitpos: [16]; default: 1;
+         *  S0 in table
+         */
+        uint32_t dt_b_outbypass: 1;
+        /** dt_clk_sel : R/W; bitpos: [17]; default: 0;
+         *  Dead time clock selection. 0: PWM_clk, 1: PT_clk
+         */
+        uint32_t dt_clk_sel: 1;
+        uint32_t reserved_18: 14;
+    };
+    uint32_t val;
+} mcpwm_dt_cfg_reg_t;
+
+/** Type of dt_fed_cfg register
+ *  PWM generator shadow register for falling edge delay (FED).
+ */
+typedef union {
+    struct {
+        /** dt_fed : R/W; bitpos: [15:0]; default: 0;
+         *  Shadow register for FED
+         */
+        uint32_t dt_fed: 16;
+        uint32_t reserved_16: 16;
+    };
+    uint32_t val;
+} mcpwm_dt_fed_cfg_reg_t;
+
+/** Type of dt_red_cfg register
+ *  PWM generator shadow register for rising edge delay (RED).
+ */
+typedef union {
+    struct {
+        /** dt_red : R/W; bitpos: [15:0]; default: 0;
+         *  Shadow register for RED
+         */
+        uint32_t dt_red: 16;
+        uint32_t reserved_16: 16;
+    };
+    uint32_t val;
+} mcpwm_dt_red_cfg_reg_t;
+
+/** Type of carrier_cfg register
+ *  PWM generator carrier enable and configuratoin
+ */
+typedef union {
+    struct {
+        /** carrier_en : R/W; bitpos: [0]; default: 0;
+         *  When set, carrier function is enabled. When cleared, carrier is bypassed
+         */
+        uint32_t carrier_en: 1;
+        /** carrier_prescale : R/W; bitpos: [4:1]; default: 0;
+         *  PWM carrier clock (PC_clk) prescale value. Period of PC_clk = period of PWM_clk *
+         *  (PWM_CARRIER_PRESCALE + 1)
+         */
+        uint32_t carrier_prescale: 4;
+        /** carrier_duty : R/W; bitpos: [7:5]; default: 0;
+         *  carrier duty selection. Duty = PWM_CARRIER_DUTY / 8
+         */
+        uint32_t carrier_duty: 3;
+        /** carrier_oshtwth : R/W; bitpos: [11:8]; default: 0;
+         *  width of the first pulse in number of periods of the carrier
+         */
+        uint32_t carrier_oshtwth: 4;
+        /** carrier_out_invert : R/W; bitpos: [12]; default: 0;
+         *  when set, invert the output of PWM0A and PWM0B for this submodule
+         */
+        uint32_t carrier_out_invert: 1;
+        /** carrier_in_invert : R/W; bitpos: [13]; default: 0;
+         *  when set, invert the input of PWM0A and PWM0B for this submodule
+         */
+        uint32_t carrier_in_invert: 1;
+        uint32_t reserved_14: 18;
+    };
+    uint32_t val;
+} mcpwm_carrier_cfg_reg_t;
+
+/** Type of fh_cfg0 register
+ *  Actions on PWM0A and PWM0B trip events
+ */
+typedef union {
+    struct {
+        /** fh_sw_cbc : R/W; bitpos: [0]; default: 0;
+         *  Enable register for software force cycle-by-cycle mode action. 0: disable, 1: enable
+         */
+        uint32_t fh_sw_cbc: 1;
+        /** fh_f2_cbc : R/W; bitpos: [1]; default: 0;
+         *  fault_event2 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+         */
+        uint32_t fh_f2_cbc: 1;
+        /** fh_f1_cbc : R/W; bitpos: [2]; default: 0;
+         *  fault_event1 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+         */
+        uint32_t fh_f1_cbc: 1;
+        /** fh_f0_cbc : R/W; bitpos: [3]; default: 0;
+         *  fault_event0 will trigger cycle-by-cycle mode action. 0: disable, 1: enable
+         */
+        uint32_t fh_f0_cbc: 1;
+        /** fh_sw_ost : R/W; bitpos: [4]; default: 0;
+         *  Enable register for software force one-shot mode action. 0: disable, 1: enable
+         */
+        uint32_t fh_sw_ost: 1;
+        /** fh_f2_ost : R/W; bitpos: [5]; default: 0;
+         *  fault_event2 will trigger one-shot mode action. 0: disable, 1: enable
+         */
+        uint32_t fh_f2_ost: 1;
+        /** fh_f1_ost : R/W; bitpos: [6]; default: 0;
+         *  fault_event1 will trigger one-shot mode action. 0: disable, 1: enable
+         */
+        uint32_t fh_f1_ost: 1;
+        /** fh_f0_ost : R/W; bitpos: [7]; default: 0;
+         *  fault_event0 will trigger one-shot mode action. 0: disable, 1: enable
+         */
+        uint32_t fh_f0_ost: 1;
+        /** fh_a_cbc_d : R/W; bitpos: [9:8]; default: 0;
+         *  Cycle-by-cycle mode action on PWM0A when fault event occurs and timer is
+         *  decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+         */
+        uint32_t fh_a_cbc_d: 2;
+        /** fh_a_cbc_u : R/W; bitpos: [11:10]; default: 0;
+         *  Cycle-by-cycle mode action on PWM0A when fault event occurs and timer is
+         *  increasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+         */
+        uint32_t fh_a_cbc_u: 2;
+        /** fh_a_ost_d : R/W; bitpos: [13:12]; default: 0;
+         *  One-shot mode action on PWM0A when fault event occurs and timer is decreasing. 0:
+         *  do nothing, 1: force low, 2: force high, 3: toggle
+         */
+        uint32_t fh_a_ost_d: 2;
+        /** fh_a_ost_u : R/W; bitpos: [15:14]; default: 0;
+         *  One-shot mode action on PWM0A when fault event occurs and timer is increasing. 0:
+         *  do nothing, 1: force low, 2: force high, 3: toggle
+         */
+        uint32_t fh_a_ost_u: 2;
+        /** fh_b_cbc_d : R/W; bitpos: [17:16]; default: 0;
+         *  Cycle-by-cycle mode action on PWM0B when fault event occurs and timer is
+         *  decreasing. 0: do nothing, 1: force low, 2: force high, 3: toggle
+         */
+        uint32_t fh_b_cbc_d: 2;
+        /** fh_b_cbc_u : R/W; bitpos: [19:18]; default: 0;
+         *  Cycle-by-cycle mode action on PWM0B when fault event occurs and timer is
+         *  increasing. 0: do nothing,1: force low, 2: force high, 3: toggle
+         */
+        uint32_t fh_b_cbc_u: 2;
+        /** fh_b_ost_d : R/W; bitpos: [21:20]; default: 0;
+         *  One-shot mode action on PWM0B when fault event occurs and timer is decreasing. 0:
+         *  do nothing, 1: force low, 2: force high, 3: toggle
+         */
+        uint32_t fh_b_ost_d: 2;
+        /** fh_b_ost_u : R/W; bitpos: [23:22]; default: 0;
+         *  One-shot mode action on PWM0B when fault event occurs and timer is increasing. 0:
+         *  do nothing, 1: force low, 2: force high, 3: toggle
+         */
+        uint32_t fh_b_ost_u: 2;
+        uint32_t reserved_24: 8;
+    };
+    uint32_t val;
+} mcpwm_fh_cfg0_reg_t;
+
+/** Type of fh_cfg1 register
+ *  Software triggers for fault handler actions
+ */
+typedef union {
+    struct {
+        /** fh_clr_ost : R/W; bitpos: [0]; default: 0;
+         *  a rising edge will clear on going one-shot mode action
+         */
+        uint32_t fh_clr_ost: 1;
+        /** fh_cbcpulse : R/W; bitpos: [2:1]; default: 0;
+         *  cycle-by-cycle mode action refresh moment selection. When bit0 is set to 1: TEZ,
+         *  when bit1 is set to 1:TEP, when bit0 and bit1 both set to 0: stop refresh, when
+         *  bit0 and bit1 both set to 1: refresh at TEP/TEZ
+         */
+        uint32_t fh_cbcpulse: 2;
+        /** fh_force_cbc : R/W; bitpos: [3]; default: 0;
+         *  a toggle trigger a cycle-by-cycle mode action
+         */
+        uint32_t fh_force_cbc: 1;
+        /** fh_force_ost : R/W; bitpos: [4]; default: 0;
+         *  a toggle (software negate its value) triggers a one-shot mode action
+         */
+        uint32_t fh_force_ost: 1;
+        uint32_t reserved_5: 27;
+    };
+    uint32_t val;
+} mcpwm_fh_cfg1_reg_t;
+
+/** Type of fh_status register
+ *  Status of fault events.
+ */
+typedef union {
+    struct {
+        /** fh_cbc_on : RO; bitpos: [0]; default: 0;
+         *  Set and reset by hardware. If set, a cycle-by-cycle mode action is on going
+         */
+        uint32_t fh_cbc_on: 1;
+        /** fh_ost_on : RO; bitpos: [1]; default: 0;
+         *  Set and reset by hardware. If set, an one-shot mode action is on going
+         */
+        uint32_t fh_ost_on: 1;
+        uint32_t reserved_2: 30;
+    };
+    uint32_t val;
+} mcpwm_fh_status_reg_t;
+
+/** Group: Fault Detection Configuration and Status */
+/** Type of fault_detect register
+ *  Fault detection configuration and status
+ */
+typedef union {
+    struct {
+        /** f0_en : R/W; bitpos: [0]; default: 0;
+         *  When set, fault_event0 generation is enabled
+         */
+        uint32_t f0_en: 1;
+        /** f1_en : R/W; bitpos: [1]; default: 0;
+         *  When set, fault_event1 generation is enabled
+         */
+        uint32_t f1_en: 1;
+        /** f2_en : R/W; bitpos: [2]; default: 0;
+         *  When set, fault_event2 generation is enabled
+         */
+        uint32_t f2_en: 1;
+        /** f0_pole : R/W; bitpos: [3]; default: 0;
+         *  Set fault_event0 trigger polarity on FAULT2 source from GPIO matrix. 0: level low,
+         *  1: level high
+         */
+        uint32_t f0_pole: 1;
+        /** f1_pole : R/W; bitpos: [4]; default: 0;
+         *  Set fault_event1 trigger polarity on FAULT2 source from GPIO matrix. 0: level low,
+         *  1: level high
+         */
+        uint32_t f1_pole: 1;
+        /** f2_pole : R/W; bitpos: [5]; default: 0;
+         *  Set fault_event2 trigger polarity on FAULT2 source from GPIO matrix. 0: level low,
+         *  1: level high
+         */
+        uint32_t f2_pole: 1;
+        /** event_f0 : RO; bitpos: [6]; default: 0;
+         *  Set and reset by hardware. If set, fault_event0 is on going
+         */
+        uint32_t event_f0: 1;
+        /** event_f1 : RO; bitpos: [7]; default: 0;
+         *  Set and reset by hardware. If set, fault_event1 is on going
+         */
+        uint32_t event_f1: 1;
+        /** event_f2 : RO; bitpos: [8]; default: 0;
+         *  Set and reset by hardware. If set, fault_event2 is on going
+         */
+        uint32_t event_f2: 1;
+        uint32_t reserved_9: 23;
+    };
+    uint32_t val;
+} mcpwm_fault_detect_reg_t;
+
+
+/** Group: Capture Configuration and Status */
+/** Type of cap_timer_cfg register
+ *  Configure capture timer
+ */
+typedef union {
+    struct {
+        /** cap_timer_en : R/W; bitpos: [0]; default: 0;
+         *  When set, capture timer incrementing under APB_clk is enabled.
+         */
+        uint32_t cap_timer_en: 1;
+        /** cap_synci_en : R/W; bitpos: [1]; default: 0;
+         *  When set, capture timer sync is enabled.
+         */
+        uint32_t cap_synci_en: 1;
+        /** cap_synci_sel : R/W; bitpos: [4:2]; default: 0;
+         *  capture module sync input selection. 0: none, 1: timer0 sync_out, 2: timer1
+         *  sync_out, 3: timer2 sync_out, 4: SYNC0 from GPIO matrix, 5: SYNC1 from GPIO matrix,
+         *  6: SYNC2 from GPIO matrix
+         */
+        uint32_t cap_synci_sel: 3;
+        /** cap_sync_sw : WT; bitpos: [5]; default: 0;
+         *  When reg_cap_synci_en is 1,  write 1 will trigger a capture timer sync, capture
+         *  timer is loaded with value in phase register.
+         */
+        uint32_t cap_sync_sw: 1;
+        uint32_t reserved_6: 26;
+    };
+    uint32_t val;
+} mcpwm_cap_timer_cfg_reg_t;
+
+/** Type of cap_timer_phase register
+ *  Phase for capture timer sync
+ */
+typedef union {
+    struct {
+        /** cap_timer_phase : R/W; bitpos: [31:0]; default: 0;
+         *  Phase value for capture timer sync operation.
+         */
+        uint32_t cap_timer_phase: 32;
+    };
+    uint32_t val;
+} mcpwm_cap_timer_phase_reg_t;
+
+/** Type of cap_chn_cfg register
+ *  Capture channel 0 configuration and enable
+ */
+typedef union {
+    struct {
+        /** capn_en : R/W; bitpos: [0]; default: 0;
+         *  When set, capture on channel 0 is enabled
+         */
+        uint32_t capn_en: 1;
+        /** capn_mode : R/W; bitpos: [2:1]; default: 0;
+         *  Edge of capture on channel 0 after prescaling. When bit0 is set to 1: enable
+         *  capture on the negative edge, When bit1 is set to 1: enable capture on the positive
+         *  edge.
+         */
+        uint32_t capn_mode: 2;
+        /** capn_prescale : R/W; bitpos: [10:3]; default: 0;
+         *  Value of prescaling on possitive edge of CAPn. Prescale value = PWM_CAPn_PRESCALE +
+         *  1
+         */
+        uint32_t capn_prescale: 8;
+        /** capn_in_invert : R/W; bitpos: [11]; default: 0;
+         *  when set, CAPn form GPIO matrix is inverted before prescale
+         */
+        uint32_t capn_in_invert: 1;
+        /** capn_sw : WT; bitpos: [12]; default: 0;
+         *  Write 1 will trigger a software forced capture on channel 0
+         */
+        uint32_t capn_sw: 1;
+        uint32_t reserved_13: 19;
+    };
+    uint32_t val;
+} mcpwm_cap_chn_cfg_reg_t;
+
+/** Type of cap_chn register
+ *  chn capture value status register
+ */
+typedef union {
+    struct {
+        /** capn_value : RO; bitpos: [31:0]; default: 0;
+         *  Value of last capture on channel n
+         */
+        uint32_t capn_value: 32;
+    };
+    uint32_t val;
+} mcpwm_cap_chn_reg_t;
+
+/** Type of cap_status register
+ *  Edge of last capture trigger
+ */
+typedef union {
+    struct {
+        /** cap0_edge : RO; bitpos: [0]; default: 0;
+         *  Edge of last capture trigger on channel 0, 0: posedge, 1: negedge
+         */
+        uint32_t cap0_edge: 1;
+        /** cap1_edge : RO; bitpos: [1]; default: 0;
+         *  Edge of last capture trigger on channel 1, 0: posedge, 1: negedge
+         */
+        uint32_t cap1_edge: 1;
+        /** cap2_edge : RO; bitpos: [2]; default: 0;
+         *  Edge of last capture trigger on channel 2, 0: posedge, 1: negedge
+         */
+        uint32_t cap2_edge: 1;
+        uint32_t reserved_3: 29;
+    };
+    uint32_t val;
+} mcpwm_cap_status_reg_t;
+
+
+/** Group: Enable update of active registers */
+/** Type of update_cfg register
+ *  Enable update.
+ */
+typedef union {
+    struct {
+        /** global_up_en : R/W; bitpos: [0]; default: 1;
+         *  The global enable of update of all active registers in MCPWM module
+         */
+        uint32_t global_up_en: 1;
+        /** global_force_up : R/W; bitpos: [1]; default: 0;
+         *  a toggle (software invert its value) will trigger a forced update of all active
+         *  registers in MCPWM module
+         */
+        uint32_t global_force_up: 1;
+        /** op0_up_en : R/W; bitpos: [2]; default: 1;
+         *  When set and PWM_GLOBAL_UP_EN is set, update of active registers in PWM operator 0
+         *  are enabled
+         */
+        uint32_t op0_up_en: 1;
+        /** op0_force_up : R/W; bitpos: [3]; default: 0;
+         *  a toggle (software invert its value) will trigger a forced update of active
+         *  registers in PWM operator 0
+         */
+        uint32_t op0_force_up: 1;
+        /** op1_up_en : R/W; bitpos: [4]; default: 1;
+         *  When set and PWM_GLOBAL_UP_EN is set, update of active registers in PWM operator 1
+         *  are enabled
+         */
+        uint32_t op1_up_en: 1;
+        /** op1_force_up : R/W; bitpos: [5]; default: 0;
+         *  a toggle (software invert its value) will trigger a forced update of active
+         *  registers in PWM operator 1
+         */
+        uint32_t op1_force_up: 1;
+        /** op2_up_en : R/W; bitpos: [6]; default: 1;
+         *  When set and PWM_GLOBAL_UP_EN is set, update of active registers in PWM operator 2
+         *  are enabled
+         */
+        uint32_t op2_up_en: 1;
+        /** op2_force_up : R/W; bitpos: [7]; default: 0;
+         *  a toggle (software invert its value) will trigger a forced update of active
+         *  registers in PWM operator 2
+         */
+        uint32_t op2_force_up: 1;
+        uint32_t reserved_8: 24;
+    };
+    uint32_t val;
+} mcpwm_update_cfg_reg_t;
+
+
+/** Group: Manage Interrupts */
+/** Type of int_ena register
+ *  Interrupt enable bits
+ */
+typedef union {
+    struct {
+        /** timer0_stop_int_ena : R/W; bitpos: [0]; default: 0;
+         *  The enable bit for the interrupt triggered when the timer 0 stops.
+         */
+        uint32_t timer0_stop_int_ena: 1;
+        /** timer1_stop_int_ena : R/W; bitpos: [1]; default: 0;
+         *  The enable bit for the interrupt triggered when the timer 1 stops.
+         */
+        uint32_t timer1_stop_int_ena: 1;
+        /** timer2_stop_int_ena : R/W; bitpos: [2]; default: 0;
+         *  The enable bit for the interrupt triggered when the timer 2 stops.
+         */
+        uint32_t timer2_stop_int_ena: 1;
+        /** timer0_tez_int_ena : R/W; bitpos: [3]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM timer 0 TEZ event.
+         */
+        uint32_t timer0_tez_int_ena: 1;
+        /** timer1_tez_int_ena : R/W; bitpos: [4]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM timer 1 TEZ event.
+         */
+        uint32_t timer1_tez_int_ena: 1;
+        /** timer2_tez_int_ena : R/W; bitpos: [5]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM timer 2 TEZ event.
+         */
+        uint32_t timer2_tez_int_ena: 1;
+        /** timer0_tep_int_ena : R/W; bitpos: [6]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM timer 0 TEP event.
+         */
+        uint32_t timer0_tep_int_ena: 1;
+        /** timer1_tep_int_ena : R/W; bitpos: [7]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM timer 1 TEP event.
+         */
+        uint32_t timer1_tep_int_ena: 1;
+        /** timer2_tep_int_ena : R/W; bitpos: [8]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM timer 2 TEP event.
+         */
+        uint32_t timer2_tep_int_ena: 1;
+        /** fault0_int_ena : R/W; bitpos: [9]; default: 0;
+         *  The enable bit for the interrupt triggered when fault_event0 starts.
+         */
+        uint32_t fault0_int_ena: 1;
+        /** fault1_int_ena : R/W; bitpos: [10]; default: 0;
+         *  The enable bit for the interrupt triggered when fault_event1 starts.
+         */
+        uint32_t fault1_int_ena: 1;
+        /** fault2_int_ena : R/W; bitpos: [11]; default: 0;
+         *  The enable bit for the interrupt triggered when fault_event2 starts.
+         */
+        uint32_t fault2_int_ena: 1;
+        /** fault0_clr_int_ena : R/W; bitpos: [12]; default: 0;
+         *  The enable bit for the interrupt triggered when fault_event0 ends.
+         */
+        uint32_t fault0_clr_int_ena: 1;
+        /** fault1_clr_int_ena : R/W; bitpos: [13]; default: 0;
+         *  The enable bit for the interrupt triggered when fault_event1 ends.
+         */
+        uint32_t fault1_clr_int_ena: 1;
+        /** fault2_clr_int_ena : R/W; bitpos: [14]; default: 0;
+         *  The enable bit for the interrupt triggered when fault_event2 ends.
+         */
+        uint32_t fault2_clr_int_ena: 1;
+        /** op0_tea_int_ena : R/W; bitpos: [15]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM operator 0 TEA event
+         */
+        uint32_t op0_tea_int_ena: 1;
+        /** op1_tea_int_ena : R/W; bitpos: [16]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM operator 1 TEA event
+         */
+        uint32_t op1_tea_int_ena: 1;
+        /** op2_tea_int_ena : R/W; bitpos: [17]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM operator 2 TEA event
+         */
+        uint32_t op2_tea_int_ena: 1;
+        /** op0_teb_int_ena : R/W; bitpos: [18]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM operator 0 TEB event
+         */
+        uint32_t op0_teb_int_ena: 1;
+        /** op1_teb_int_ena : R/W; bitpos: [19]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM operator 1 TEB event
+         */
+        uint32_t op1_teb_int_ena: 1;
+        /** op2_teb_int_ena : R/W; bitpos: [20]; default: 0;
+         *  The enable bit for the interrupt triggered by a PWM operator 2 TEB event
+         */
+        uint32_t op2_teb_int_ena: 1;
+        /** fh0_cbc_int_ena : R/W; bitpos: [21]; default: 0;
+         *  The enable bit for the interrupt triggered by a cycle-by-cycle mode action on PWM0.
+         */
+        uint32_t fh0_cbc_int_ena: 1;
+        /** fh1_cbc_int_ena : R/W; bitpos: [22]; default: 0;
+         *  The enable bit for the interrupt triggered by a cycle-by-cycle mode action on PWM1.
+         */
+        uint32_t fh1_cbc_int_ena: 1;
+        /** fh2_cbc_int_ena : R/W; bitpos: [23]; default: 0;
+         *  The enable bit for the interrupt triggered by a cycle-by-cycle mode action on PWM2.
+         */
+        uint32_t fh2_cbc_int_ena: 1;
+        /** fh0_ost_int_ena : R/W; bitpos: [24]; default: 0;
+         *  The enable bit for the interrupt triggered by a one-shot mode action on PWM0.
+         */
+        uint32_t fh0_ost_int_ena: 1;
+        /** fh1_ost_int_ena : R/W; bitpos: [25]; default: 0;
+         *  The enable bit for the interrupt triggered by a one-shot mode action on PWM1.
+         */
+        uint32_t fh1_ost_int_ena: 1;
+        /** fh2_ost_int_ena : R/W; bitpos: [26]; default: 0;
+         *  The enable bit for the interrupt triggered by a one-shot mode action on PWM2.
+         */
+        uint32_t fh2_ost_int_ena: 1;
+        /** cap0_int_ena : R/W; bitpos: [27]; default: 0;
+         *  The enable bit for the interrupt triggered by capture on channel 0.
+         */
+        uint32_t cap0_int_ena: 1;
+        /** cap1_int_ena : R/W; bitpos: [28]; default: 0;
+         *  The enable bit for the interrupt triggered by capture on channel 1.
+         */
+        uint32_t cap1_int_ena: 1;
+        /** cap2_int_ena : R/W; bitpos: [29]; default: 0;
+         *  The enable bit for the interrupt triggered by capture on channel 2.
+         */
+        uint32_t cap2_int_ena: 1;
+        uint32_t reserved_30: 2;
+    };
+    uint32_t val;
+} mcpwm_int_ena_reg_t;
+
+/** Type of int_raw register
+ *  Raw interrupt status
+ */
+typedef union {
+    struct {
+        /** timer0_stop_int_raw : R/WTC/SS; bitpos: [0]; default: 0;
+         *  The raw status bit for the interrupt triggered when the timer 0 stops.
+         */
+        uint32_t timer0_stop_int_raw: 1;
+        /** timer1_stop_int_raw : R/WTC/SS; bitpos: [1]; default: 0;
+         *  The raw status bit for the interrupt triggered when the timer 1 stops.
+         */
+        uint32_t timer1_stop_int_raw: 1;
+        /** timer2_stop_int_raw : R/WTC/SS; bitpos: [2]; default: 0;
+         *  The raw status bit for the interrupt triggered when the timer 2 stops.
+         */
+        uint32_t timer2_stop_int_raw: 1;
+        /** timer0_tez_int_raw : R/WTC/SS; bitpos: [3]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM timer 0 TEZ event.
+         */
+        uint32_t timer0_tez_int_raw: 1;
+        /** timer1_tez_int_raw : R/WTC/SS; bitpos: [4]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM timer 1 TEZ event.
+         */
+        uint32_t timer1_tez_int_raw: 1;
+        /** timer2_tez_int_raw : R/WTC/SS; bitpos: [5]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM timer 2 TEZ event.
+         */
+        uint32_t timer2_tez_int_raw: 1;
+        /** timer0_tep_int_raw : R/WTC/SS; bitpos: [6]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM timer 0 TEP event.
+         */
+        uint32_t timer0_tep_int_raw: 1;
+        /** timer1_tep_int_raw : R/WTC/SS; bitpos: [7]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM timer 1 TEP event.
+         */
+        uint32_t timer1_tep_int_raw: 1;
+        /** timer2_tep_int_raw : R/WTC/SS; bitpos: [8]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM timer 2 TEP event.
+         */
+        uint32_t timer2_tep_int_raw: 1;
+        /** fault0_int_raw : R/WTC/SS; bitpos: [9]; default: 0;
+         *  The raw status bit for the interrupt triggered when fault_event0 starts.
+         */
+        uint32_t fault0_int_raw: 1;
+        /** fault1_int_raw : R/WTC/SS; bitpos: [10]; default: 0;
+         *  The raw status bit for the interrupt triggered when fault_event1 starts.
+         */
+        uint32_t fault1_int_raw: 1;
+        /** fault2_int_raw : R/WTC/SS; bitpos: [11]; default: 0;
+         *  The raw status bit for the interrupt triggered when fault_event2 starts.
+         */
+        uint32_t fault2_int_raw: 1;
+        /** fault0_clr_int_raw : R/WTC/SS; bitpos: [12]; default: 0;
+         *  The raw status bit for the interrupt triggered when fault_event0 ends.
+         */
+        uint32_t fault0_clr_int_raw: 1;
+        /** fault1_clr_int_raw : R/WTC/SS; bitpos: [13]; default: 0;
+         *  The raw status bit for the interrupt triggered when fault_event1 ends.
+         */
+        uint32_t fault1_clr_int_raw: 1;
+        /** fault2_clr_int_raw : R/WTC/SS; bitpos: [14]; default: 0;
+         *  The raw status bit for the interrupt triggered when fault_event2 ends.
+         */
+        uint32_t fault2_clr_int_raw: 1;
+        /** op0_tea_int_raw : R/WTC/SS; bitpos: [15]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM operator 0 TEA event
+         */
+        uint32_t op0_tea_int_raw: 1;
+        /** op1_tea_int_raw : R/WTC/SS; bitpos: [16]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM operator 1 TEA event
+         */
+        uint32_t op1_tea_int_raw: 1;
+        /** op2_tea_int_raw : R/WTC/SS; bitpos: [17]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM operator 2 TEA event
+         */
+        uint32_t op2_tea_int_raw: 1;
+        /** op0_teb_int_raw : R/WTC/SS; bitpos: [18]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM operator 0 TEB event
+         */
+        uint32_t op0_teb_int_raw: 1;
+        /** op1_teb_int_raw : R/WTC/SS; bitpos: [19]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM operator 1 TEB event
+         */
+        uint32_t op1_teb_int_raw: 1;
+        /** op2_teb_int_raw : R/WTC/SS; bitpos: [20]; default: 0;
+         *  The raw status bit for the interrupt triggered by a PWM operator 2 TEB event
+         */
+        uint32_t op2_teb_int_raw: 1;
+        /** fh0_cbc_int_raw : R/WTC/SS; bitpos: [21]; default: 0;
+         *  The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on
+         *  PWM0.
+         */
+        uint32_t fh0_cbc_int_raw: 1;
+        /** fh1_cbc_int_raw : R/WTC/SS; bitpos: [22]; default: 0;
+         *  The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on
+         *  PWM1.
+         */
+        uint32_t fh1_cbc_int_raw: 1;
+        /** fh2_cbc_int_raw : R/WTC/SS; bitpos: [23]; default: 0;
+         *  The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on
+         *  PWM2.
+         */
+        uint32_t fh2_cbc_int_raw: 1;
+        /** fh0_ost_int_raw : R/WTC/SS; bitpos: [24]; default: 0;
+         *  The raw status bit for the interrupt triggered by a one-shot mode action on PWM0.
+         */
+        uint32_t fh0_ost_int_raw: 1;
+        /** fh1_ost_int_raw : R/WTC/SS; bitpos: [25]; default: 0;
+         *  The raw status bit for the interrupt triggered by a one-shot mode action on PWM1.
+         */
+        uint32_t fh1_ost_int_raw: 1;
+        /** fh2_ost_int_raw : R/WTC/SS; bitpos: [26]; default: 0;
+         *  The raw status bit for the interrupt triggered by a one-shot mode action on PWM2.
+         */
+        uint32_t fh2_ost_int_raw: 1;
+        /** cap0_int_raw : R/WTC/SS; bitpos: [27]; default: 0;
+         *  The raw status bit for the interrupt triggered by capture on channel 0.
+         */
+        uint32_t cap0_int_raw: 1;
+        /** cap1_int_raw : R/WTC/SS; bitpos: [28]; default: 0;
+         *  The raw status bit for the interrupt triggered by capture on channel 1.
+         */
+        uint32_t cap1_int_raw: 1;
+        /** cap2_int_raw : R/WTC/SS; bitpos: [29]; default: 0;
+         *  The raw status bit for the interrupt triggered by capture on channel 2.
+         */
+        uint32_t cap2_int_raw: 1;
+        uint32_t reserved_30: 2;
+    };
+    uint32_t val;
+} mcpwm_int_raw_reg_t;
+
+/** Type of int_st register
+ *  Masked interrupt status
+ */
+typedef union {
+    struct {
+        /** timer0_stop_int_st : RO; bitpos: [0]; default: 0;
+         *  The masked status bit for the interrupt triggered when the timer 0 stops.
+         */
+        uint32_t timer0_stop_int_st: 1;
+        /** timer1_stop_int_st : RO; bitpos: [1]; default: 0;
+         *  The masked status bit for the interrupt triggered when the timer 1 stops.
+         */
+        uint32_t timer1_stop_int_st: 1;
+        /** timer2_stop_int_st : RO; bitpos: [2]; default: 0;
+         *  The masked status bit for the interrupt triggered when the timer 2 stops.
+         */
+        uint32_t timer2_stop_int_st: 1;
+        /** timer0_tez_int_st : RO; bitpos: [3]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM timer 0 TEZ event.
+         */
+        uint32_t timer0_tez_int_st: 1;
+        /** timer1_tez_int_st : RO; bitpos: [4]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM timer 1 TEZ event.
+         */
+        uint32_t timer1_tez_int_st: 1;
+        /** timer2_tez_int_st : RO; bitpos: [5]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM timer 2 TEZ event.
+         */
+        uint32_t timer2_tez_int_st: 1;
+        /** timer0_tep_int_st : RO; bitpos: [6]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM timer 0 TEP event.
+         */
+        uint32_t timer0_tep_int_st: 1;
+        /** timer1_tep_int_st : RO; bitpos: [7]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM timer 1 TEP event.
+         */
+        uint32_t timer1_tep_int_st: 1;
+        /** timer2_tep_int_st : RO; bitpos: [8]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM timer 2 TEP event.
+         */
+        uint32_t timer2_tep_int_st: 1;
+        /** fault0_int_st : RO; bitpos: [9]; default: 0;
+         *  The masked status bit for the interrupt triggered when fault_event0 starts.
+         */
+        uint32_t fault0_int_st: 1;
+        /** fault1_int_st : RO; bitpos: [10]; default: 0;
+         *  The masked status bit for the interrupt triggered when fault_event1 starts.
+         */
+        uint32_t fault1_int_st: 1;
+        /** fault2_int_st : RO; bitpos: [11]; default: 0;
+         *  The masked status bit for the interrupt triggered when fault_event2 starts.
+         */
+        uint32_t fault2_int_st: 1;
+        /** fault0_clr_int_st : RO; bitpos: [12]; default: 0;
+         *  The masked status bit for the interrupt triggered when fault_event0 ends.
+         */
+        uint32_t fault0_clr_int_st: 1;
+        /** fault1_clr_int_st : RO; bitpos: [13]; default: 0;
+         *  The masked status bit for the interrupt triggered when fault_event1 ends.
+         */
+        uint32_t fault1_clr_int_st: 1;
+        /** fault2_clr_int_st : RO; bitpos: [14]; default: 0;
+         *  The masked status bit for the interrupt triggered when fault_event2 ends.
+         */
+        uint32_t fault2_clr_int_st: 1;
+        /** op0_tea_int_st : RO; bitpos: [15]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM operator 0 TEA event
+         */
+        uint32_t op0_tea_int_st: 1;
+        /** op1_tea_int_st : RO; bitpos: [16]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM operator 1 TEA event
+         */
+        uint32_t op1_tea_int_st: 1;
+        /** op2_tea_int_st : RO; bitpos: [17]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM operator 2 TEA event
+         */
+        uint32_t op2_tea_int_st: 1;
+        /** op0_teb_int_st : RO; bitpos: [18]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM operator 0 TEB event
+         */
+        uint32_t op0_teb_int_st: 1;
+        /** op1_teb_int_st : RO; bitpos: [19]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM operator 1 TEB event
+         */
+        uint32_t op1_teb_int_st: 1;
+        /** op2_teb_int_st : RO; bitpos: [20]; default: 0;
+         *  The masked status bit for the interrupt triggered by a PWM operator 2 TEB event
+         */
+        uint32_t op2_teb_int_st: 1;
+        /** fh0_cbc_int_st : RO; bitpos: [21]; default: 0;
+         *  The masked status bit for the interrupt triggered by a cycle-by-cycle mode action
+         *  on PWM0.
+         */
+        uint32_t fh0_cbc_int_st: 1;
+        /** fh1_cbc_int_st : RO; bitpos: [22]; default: 0;
+         *  The masked status bit for the interrupt triggered by a cycle-by-cycle mode action
+         *  on PWM1.
+         */
+        uint32_t fh1_cbc_int_st: 1;
+        /** fh2_cbc_int_st : RO; bitpos: [23]; default: 0;
+         *  The masked status bit for the interrupt triggered by a cycle-by-cycle mode action
+         *  on PWM2.
+         */
+        uint32_t fh2_cbc_int_st: 1;
+        /** fh0_ost_int_st : RO; bitpos: [24]; default: 0;
+         *  The masked status bit for the interrupt triggered by a one-shot mode action on PWM0.
+         */
+        uint32_t fh0_ost_int_st: 1;
+        /** fh1_ost_int_st : RO; bitpos: [25]; default: 0;
+         *  The masked status bit for the interrupt triggered by a one-shot mode action on PWM1.
+         */
+        uint32_t fh1_ost_int_st: 1;
+        /** fh2_ost_int_st : RO; bitpos: [26]; default: 0;
+         *  The masked status bit for the interrupt triggered by a one-shot mode action on PWM2.
+         */
+        uint32_t fh2_ost_int_st: 1;
+        /** cap0_int_st : RO; bitpos: [27]; default: 0;
+         *  The masked status bit for the interrupt triggered by capture on channel 0.
+         */
+        uint32_t cap0_int_st: 1;
+        /** cap1_int_st : RO; bitpos: [28]; default: 0;
+         *  The masked status bit for the interrupt triggered by capture on channel 1.
+         */
+        uint32_t cap1_int_st: 1;
+        /** cap2_int_st : RO; bitpos: [29]; default: 0;
+         *  The masked status bit for the interrupt triggered by capture on channel 2.
+         */
+        uint32_t cap2_int_st: 1;
+        uint32_t reserved_30: 2;
+    };
+    uint32_t val;
+} mcpwm_int_st_reg_t;
+
+/** Type of int_clr register
+ *  Interrupt clear bits
+ */
+typedef union {
+    struct {
+        /** timer0_stop_int_clr : WT; bitpos: [0]; default: 0;
+         *  Set this bit to clear the interrupt triggered when the timer 0 stops.
+         */
+        uint32_t timer0_stop_int_clr: 1;
+        /** timer1_stop_int_clr : WT; bitpos: [1]; default: 0;
+         *  Set this bit to clear the interrupt triggered when the timer 1 stops.
+         */
+        uint32_t timer1_stop_int_clr: 1;
+        /** timer2_stop_int_clr : WT; bitpos: [2]; default: 0;
+         *  Set this bit to clear the interrupt triggered when the timer 2 stops.
+         */
+        uint32_t timer2_stop_int_clr: 1;
+        /** timer0_tez_int_clr : WT; bitpos: [3]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM timer 0 TEZ event.
+         */
+        uint32_t timer0_tez_int_clr: 1;
+        /** timer1_tez_int_clr : WT; bitpos: [4]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM timer 1 TEZ event.
+         */
+        uint32_t timer1_tez_int_clr: 1;
+        /** timer2_tez_int_clr : WT; bitpos: [5]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM timer 2 TEZ event.
+         */
+        uint32_t timer2_tez_int_clr: 1;
+        /** timer0_tep_int_clr : WT; bitpos: [6]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM timer 0 TEP event.
+         */
+        uint32_t timer0_tep_int_clr: 1;
+        /** timer1_tep_int_clr : WT; bitpos: [7]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM timer 1 TEP event.
+         */
+        uint32_t timer1_tep_int_clr: 1;
+        /** timer2_tep_int_clr : WT; bitpos: [8]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM timer 2 TEP event.
+         */
+        uint32_t timer2_tep_int_clr: 1;
+        /** fault0_int_clr : WT; bitpos: [9]; default: 0;
+         *  Set this bit to clear the interrupt triggered when fault_event0 starts.
+         */
+        uint32_t fault0_int_clr: 1;
+        /** fault1_int_clr : WT; bitpos: [10]; default: 0;
+         *  Set this bit to clear the interrupt triggered when fault_event1 starts.
+         */
+        uint32_t fault1_int_clr: 1;
+        /** fault2_int_clr : WT; bitpos: [11]; default: 0;
+         *  Set this bit to clear the interrupt triggered when fault_event2 starts.
+         */
+        uint32_t fault2_int_clr: 1;
+        /** fault0_clr_int_clr : WT; bitpos: [12]; default: 0;
+         *  Set this bit to clear the interrupt triggered when fault_event0 ends.
+         */
+        uint32_t fault0_clr_int_clr: 1;
+        /** fault1_clr_int_clr : WT; bitpos: [13]; default: 0;
+         *  Set this bit to clear the interrupt triggered when fault_event1 ends.
+         */
+        uint32_t fault1_clr_int_clr: 1;
+        /** fault2_clr_int_clr : WT; bitpos: [14]; default: 0;
+         *  Set this bit to clear the interrupt triggered when fault_event2 ends.
+         */
+        uint32_t fault2_clr_int_clr: 1;
+        /** op0_tea_int_clr : WT; bitpos: [15]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM operator 0 TEA event
+         */
+        uint32_t op0_tea_int_clr: 1;
+        /** op1_tea_int_clr : WT; bitpos: [16]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM operator 1 TEA event
+         */
+        uint32_t op1_tea_int_clr: 1;
+        /** op2_tea_int_clr : WT; bitpos: [17]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM operator 2 TEA event
+         */
+        uint32_t op2_tea_int_clr: 1;
+        /** op0_teb_int_clr : WT; bitpos: [18]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM operator 0 TEB event
+         */
+        uint32_t op0_teb_int_clr: 1;
+        /** op1_teb_int_clr : WT; bitpos: [19]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM operator 1 TEB event
+         */
+        uint32_t op1_teb_int_clr: 1;
+        /** op2_teb_int_clr : WT; bitpos: [20]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a PWM operator 2 TEB event
+         */
+        uint32_t op2_teb_int_clr: 1;
+        /** fh0_cbc_int_clr : WT; bitpos: [21]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a cycle-by-cycle mode action on
+         *  PWM0.
+         */
+        uint32_t fh0_cbc_int_clr: 1;
+        /** fh1_cbc_int_clr : WT; bitpos: [22]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a cycle-by-cycle mode action on
+         *  PWM1.
+         */
+        uint32_t fh1_cbc_int_clr: 1;
+        /** fh2_cbc_int_clr : WT; bitpos: [23]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a cycle-by-cycle mode action on
+         *  PWM2.
+         */
+        uint32_t fh2_cbc_int_clr: 1;
+        /** fh0_ost_int_clr : WT; bitpos: [24]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a one-shot mode action on PWM0.
+         */
+        uint32_t fh0_ost_int_clr: 1;
+        /** fh1_ost_int_clr : WT; bitpos: [25]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a one-shot mode action on PWM1.
+         */
+        uint32_t fh1_ost_int_clr: 1;
+        /** fh2_ost_int_clr : WT; bitpos: [26]; default: 0;
+         *  Set this bit to clear the interrupt triggered by a one-shot mode action on PWM2.
+         */
+        uint32_t fh2_ost_int_clr: 1;
+        /** cap0_int_clr : WT; bitpos: [27]; default: 0;
+         *  Set this bit to clear the interrupt triggered by capture on channel 0.
+         */
+        uint32_t cap0_int_clr: 1;
+        /** cap1_int_clr : WT; bitpos: [28]; default: 0;
+         *  Set this bit to clear the interrupt triggered by capture on channel 1.
+         */
+        uint32_t cap1_int_clr: 1;
+        /** cap2_int_clr : WT; bitpos: [29]; default: 0;
+         *  Set this bit to clear the interrupt triggered by capture on channel 2.
+         */
+        uint32_t cap2_int_clr: 1;
+        uint32_t reserved_30: 2;
+    };
+    uint32_t val;
+} mcpwm_int_clr_reg_t;
+
+
+/** Group: MCMCPWM APB configuration register */
+/** Type of clk register
+ *  MCPWM APB configuration register
+ */
+typedef union {
+    struct {
+        /** clk_en : R/W; bitpos: [0]; default: 0;
+         *  Force clock on for this register file
+         */
+        uint32_t clk_en: 1;
+        uint32_t reserved_1: 31;
+    };
+    uint32_t val;
+} mcpwm_clk_reg_t;
+
+
+/** Group: Version Register */
+/** Type of version register
+ *  Version register.
+ */
+typedef union {
+    struct {
+        /** date : R/W; bitpos: [27:0]; default: 34632240;
+         *  Version of this register file
+         */
+        uint32_t date: 28;
+        uint32_t reserved_28: 4;
+    };
+    uint32_t val;
+} mcpwm_version_reg_t;
+
+
+typedef struct {
+    mcpwm_timer_cfg0_reg_t timer_cfg0;
+    mcpwm_timer_cfg1_reg_t timer_cfg1;
+    mcpwm_timer_sync_reg_t timer_sync;
+    mcpwm_timer_status_reg_t timer_status;
+} mcpwm_timer_regs_t;
+
+typedef struct {
+    mcpwm_gen_stmp_cfg_reg_t gen_stmp_cfg;
+    mcpwm_gen_tstmp_reg_t timestamp[2];
+    mcpwm_gen_cfg0_reg_t gen_cfg0;
+    mcpwm_gen_force_reg_t gen_force;
+    mcpwm_gen_reg_t generator[2];
+    mcpwm_dt_cfg_reg_t dt_cfg;
+    mcpwm_dt_fed_cfg_reg_t dt_fed_cfg;
+    mcpwm_dt_red_cfg_reg_t dt_red_cfg;
+    mcpwm_carrier_cfg_reg_t carrier_cfg;
+    mcpwm_fh_cfg0_reg_t fh_cfg0;
+    mcpwm_fh_cfg1_reg_t fh_cfg1;
+    mcpwm_fh_status_reg_t fh_status;
+} mcpwm_operator_reg_t;
+
+typedef struct {
+    volatile mcpwm_clk_cfg_reg_t clk_cfg;
+    volatile mcpwm_timer_regs_t timer[3];
+    volatile mcpwm_timer_synci_cfg_reg_t timer_synci_cfg;
+    volatile mcpwm_operator_timersel_reg_t operator_timersel;
+    volatile mcpwm_operator_reg_t operators[3];
+    volatile mcpwm_fault_detect_reg_t fault_detect;
+    volatile mcpwm_cap_timer_cfg_reg_t cap_timer_cfg;
+    volatile mcpwm_cap_timer_phase_reg_t cap_timer_phase;
+    volatile mcpwm_cap_chn_cfg_reg_t cap_chn_cfg[3];
+    volatile mcpwm_cap_chn_reg_t cap_chn[3];
+    volatile mcpwm_cap_status_reg_t cap_status;
+    volatile mcpwm_update_cfg_reg_t update_cfg;
+    volatile mcpwm_int_ena_reg_t int_ena;
+    volatile mcpwm_int_raw_reg_t int_raw;
+    volatile mcpwm_int_st_reg_t int_st;
+    volatile mcpwm_int_clr_reg_t int_clr;
+    volatile mcpwm_clk_reg_t clk;
+    volatile mcpwm_version_reg_t version;
+} mcpwm_dev_t;
+
+extern mcpwm_dev_t MCPWM0;
+extern mcpwm_dev_t MCPWM1;
+
+#ifndef __cplusplus
+_Static_assert(sizeof(mcpwm_dev_t) == 0x128, "Invalid size of mcpwm_dev_t structure");
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mmu.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mmu.h
new file mode 100644
index 00000000000..a38cb9eb42a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mmu.h
@@ -0,0 +1,42 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdint.h>
+#include "soc/cache_memory.h"
+#include "soc/soc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Defined for flash mmap */
+#define SOC_MMU_REGIONS_COUNT                   2
+#define SOC_MMU_PAGES_PER_REGION                256
+#define SOC_MMU_IROM0_PAGES_START               (CACHE_IROM_MMU_START / sizeof(uint32_t))
+#define SOC_MMU_IROM0_PAGES_END                 (CACHE_IROM_MMU_END / sizeof(uint32_t))
+#define SOC_MMU_DROM0_PAGES_START               (CACHE_DROM_MMU_START / sizeof(uint32_t))
+#define SOC_MMU_DROM0_PAGES_END                 (CACHE_DROM_MMU_END / sizeof(uint32_t))
+#define SOC_MMU_INVALID_ENTRY_VAL               MMU_TABLE_INVALID_VAL
+#define SOC_MMU_ADDR_MASK                       MMU_ADDRESS_MASK
+#define SOC_MMU_PAGE_IN_FLASH(page)             ((page) | MMU_ACCESS_FLASH)
+#define SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE       FLASH_MMU_TABLE
+#define SOC_MMU_VADDR1_START_ADDR               IRAM0_CACHE_ADDRESS_LOW
+#define SOC_MMU_PRO_IRAM0_FIRST_USABLE_PAGE     SOC_MMU_IROM0_PAGES_START
+#define SOC_MMU_VADDR0_START_ADDR               (SOC_DROM_LOW + (SOC_MMU_DROM0_PAGES_START * SPI_FLASH_MMU_PAGE_SIZE))
+#define SOC_MMU_VADDR1_FIRST_USABLE_ADDR        SOC_IROM_LOW
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mpu_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mpu_caps.h
new file mode 100644
index 00000000000..1d23e375076
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/mpu_caps.h
@@ -0,0 +1,21 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED    0
+#define SOC_MPU_MIN_REGION_SIZE                   0x20000000U
+#define SOC_MPU_REGIONS_MAX_NUM                   8
+#define SOC_MPU_REGION_RO_SUPPORTED               0
+#define SOC_MPU_REGION_WO_SUPPORTED               0
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/nrx_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/nrx_reg.h
new file mode 100644
index 00000000000..d80cb2a1785
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/nrx_reg.h
@@ -0,0 +1,55 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc.h"
+
+/* Some of the WiFi RX control registers.
+ * PU/PD fields defined here are used in sleep related functions.
+ */
+
+#define NRXPD_CTRL (DR_REG_NRX_BASE + 0x00d4)
+#define NRX_CHAN_EST_FORCE_PU (BIT(7))
+#define NRX_CHAN_EST_FORCE_PU_M (BIT(7))
+#define NRX_CHAN_EST_FORCE_PU_V 1
+#define NRX_CHAN_EST_FORCE_PU_S 7
+#define NRX_CHAN_EST_FORCE_PD (BIT(6))
+#define NRX_CHAN_EST_FORCE_PD_M (BIT(6))
+#define NRX_CHAN_EST_FORCE_PD_V 1
+#define NRX_CHAN_EST_FORCE_PD_S 6
+#define NRX_RX_ROT_FORCE_PU (BIT(5))
+#define NRX_RX_ROT_FORCE_PU_M (BIT(5))
+#define NRX_RX_ROT_FORCE_PU_V 1
+#define NRX_RX_ROT_FORCE_PU_S 5
+#define NRX_RX_ROT_FORCE_PD (BIT(4))
+#define NRX_RX_ROT_FORCE_PD_M (BIT(4))
+#define NRX_RX_ROT_FORCE_PD_V 1
+#define NRX_RX_ROT_FORCE_PD_S 4
+#define NRX_VIT_FORCE_PU (BIT(3))
+#define NRX_VIT_FORCE_PU_M (BIT(3))
+#define NRX_VIT_FORCE_PU_V 1
+#define NRX_VIT_FORCE_PU_S 3
+#define NRX_VIT_FORCE_PD (BIT(2))
+#define NRX_VIT_FORCE_PD_M (BIT(2))
+#define NRX_VIT_FORCE_PD_V 1
+#define NRX_VIT_FORCE_PD_S 2
+#define NRX_DEMAP_FORCE_PU (BIT(1))
+#define NRX_DEMAP_FORCE_PU_M (BIT(1))
+#define NRX_DEMAP_FORCE_PU_V 1
+#define NRX_DEMAP_FORCE_PU_S 1
+#define NRX_DEMAP_FORCE_PD (BIT(0))
+#define NRX_DEMAP_FORCE_PD_M (BIT(0))
+#define NRX_DEMAP_FORCE_PD_V 1
+#define NRX_DEMAP_FORCE_PD_S 0
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/pcnt_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/pcnt_caps.h
new file mode 100644
index 00000000000..b72d302c2ef
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/pcnt_caps.h
@@ -0,0 +1,26 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SOC_PCNT_PORT_NUM      (1)
+#define SOC_PCNT_UNIT_NUM      (4)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/pcnt_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/pcnt_reg.h
new file mode 100644
index 00000000000..b6198c86fbd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/pcnt_reg.h
@@ -0,0 +1,1236 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** PCNT_U0_CONF0_REG register
+ *  Configuration register 0 for unit 0
+ */
+#define PCNT_U0_CONF0_REG (DR_REG_PCNT_BASE + 0x0)
+/** PCNT_FILTER_THRES_U0 : R/W; bitpos: [9:0]; default: 16;
+ *  This sets the maximum threshold, in APB_CLK cycles, for the filter.
+ *
+ *  Any pulses with width less than this will be ignored when the filter is enabled.
+ */
+#define PCNT_FILTER_THRES_U0    0x000003FFU
+#define PCNT_FILTER_THRES_U0_M  (PCNT_FILTER_THRES_U0_V << PCNT_FILTER_THRES_U0_S)
+#define PCNT_FILTER_THRES_U0_V  0x000003FFU
+#define PCNT_FILTER_THRES_U0_S  0
+/** PCNT_FILTER_EN_U0 : R/W; bitpos: [10]; default: 1;
+ *  This is the enable bit for unit 0's input filter.
+ */
+#define PCNT_FILTER_EN_U0    (BIT(10))
+#define PCNT_FILTER_EN_U0_M  (PCNT_FILTER_EN_U0_V << PCNT_FILTER_EN_U0_S)
+#define PCNT_FILTER_EN_U0_V  0x00000001U
+#define PCNT_FILTER_EN_U0_S  10
+/** PCNT_THR_ZERO_EN_U0 : R/W; bitpos: [11]; default: 1;
+ *  This is the enable bit for unit 0's zero comparator.
+ */
+#define PCNT_THR_ZERO_EN_U0    (BIT(11))
+#define PCNT_THR_ZERO_EN_U0_M  (PCNT_THR_ZERO_EN_U0_V << PCNT_THR_ZERO_EN_U0_S)
+#define PCNT_THR_ZERO_EN_U0_V  0x00000001U
+#define PCNT_THR_ZERO_EN_U0_S  11
+/** PCNT_THR_H_LIM_EN_U0 : R/W; bitpos: [12]; default: 1;
+ *  This is the enable bit for unit 0's thr_h_lim comparator.
+ */
+#define PCNT_THR_H_LIM_EN_U0    (BIT(12))
+#define PCNT_THR_H_LIM_EN_U0_M  (PCNT_THR_H_LIM_EN_U0_V << PCNT_THR_H_LIM_EN_U0_S)
+#define PCNT_THR_H_LIM_EN_U0_V  0x00000001U
+#define PCNT_THR_H_LIM_EN_U0_S  12
+/** PCNT_THR_L_LIM_EN_U0 : R/W; bitpos: [13]; default: 1;
+ *  This is the enable bit for unit 0's thr_l_lim comparator.
+ */
+#define PCNT_THR_L_LIM_EN_U0    (BIT(13))
+#define PCNT_THR_L_LIM_EN_U0_M  (PCNT_THR_L_LIM_EN_U0_V << PCNT_THR_L_LIM_EN_U0_S)
+#define PCNT_THR_L_LIM_EN_U0_V  0x00000001U
+#define PCNT_THR_L_LIM_EN_U0_S  13
+/** PCNT_THR_THRES0_EN_U0 : R/W; bitpos: [14]; default: 0;
+ *  This is the enable bit for unit 0's thres0 comparator.
+ */
+#define PCNT_THR_THRES0_EN_U0    (BIT(14))
+#define PCNT_THR_THRES0_EN_U0_M  (PCNT_THR_THRES0_EN_U0_V << PCNT_THR_THRES0_EN_U0_S)
+#define PCNT_THR_THRES0_EN_U0_V  0x00000001U
+#define PCNT_THR_THRES0_EN_U0_S  14
+/** PCNT_THR_THRES1_EN_U0 : R/W; bitpos: [15]; default: 0;
+ *  This is the enable bit for unit 0's thres1 comparator.
+ */
+#define PCNT_THR_THRES1_EN_U0    (BIT(15))
+#define PCNT_THR_THRES1_EN_U0_M  (PCNT_THR_THRES1_EN_U0_V << PCNT_THR_THRES1_EN_U0_S)
+#define PCNT_THR_THRES1_EN_U0_V  0x00000001U
+#define PCNT_THR_THRES1_EN_U0_S  15
+/** PCNT_CH0_NEG_MODE_U0 : R/W; bitpos: [17:16]; default: 0;
+ *  This register sets the behavior when the signal input of channel 0 detects a
+ *  negative edge.
+ *
+ *  1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH0_NEG_MODE_U0    0x00000003U
+#define PCNT_CH0_NEG_MODE_U0_M  (PCNT_CH0_NEG_MODE_U0_V << PCNT_CH0_NEG_MODE_U0_S)
+#define PCNT_CH0_NEG_MODE_U0_V  0x00000003U
+#define PCNT_CH0_NEG_MODE_U0_S  16
+/** PCNT_CH0_POS_MODE_U0 : R/W; bitpos: [19:18]; default: 0;
+ *  This register sets the behavior when the signal input of channel 0 detects a
+ *  positive edge.
+ *
+ *  1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH0_POS_MODE_U0    0x00000003U
+#define PCNT_CH0_POS_MODE_U0_M  (PCNT_CH0_POS_MODE_U0_V << PCNT_CH0_POS_MODE_U0_S)
+#define PCNT_CH0_POS_MODE_U0_V  0x00000003U
+#define PCNT_CH0_POS_MODE_U0_S  18
+/** PCNT_CH0_HCTRL_MODE_U0 : R/W; bitpos: [21:20]; default: 0;
+ *  This register configures how the CH0_POS_MODE/CH0_NEG_MODE settings will be
+ *  modified when the control signal is high.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH0_HCTRL_MODE_U0    0x00000003U
+#define PCNT_CH0_HCTRL_MODE_U0_M  (PCNT_CH0_HCTRL_MODE_U0_V << PCNT_CH0_HCTRL_MODE_U0_S)
+#define PCNT_CH0_HCTRL_MODE_U0_V  0x00000003U
+#define PCNT_CH0_HCTRL_MODE_U0_S  20
+/** PCNT_CH0_LCTRL_MODE_U0 : R/W; bitpos: [23:22]; default: 0;
+ *  This register configures how the CH0_POS_MODE/CH0_NEG_MODE settings will be
+ *  modified when the control signal is low.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH0_LCTRL_MODE_U0    0x00000003U
+#define PCNT_CH0_LCTRL_MODE_U0_M  (PCNT_CH0_LCTRL_MODE_U0_V << PCNT_CH0_LCTRL_MODE_U0_S)
+#define PCNT_CH0_LCTRL_MODE_U0_V  0x00000003U
+#define PCNT_CH0_LCTRL_MODE_U0_S  22
+/** PCNT_CH1_NEG_MODE_U0 : R/W; bitpos: [25:24]; default: 0;
+ *  This register sets the behavior when the signal input of channel 1 detects a
+ *  negative edge.
+ *
+ *  1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH1_NEG_MODE_U0    0x00000003U
+#define PCNT_CH1_NEG_MODE_U0_M  (PCNT_CH1_NEG_MODE_U0_V << PCNT_CH1_NEG_MODE_U0_S)
+#define PCNT_CH1_NEG_MODE_U0_V  0x00000003U
+#define PCNT_CH1_NEG_MODE_U0_S  24
+/** PCNT_CH1_POS_MODE_U0 : R/W; bitpos: [27:26]; default: 0;
+ *  This register sets the behavior when the signal input of channel 1 detects a
+ *  positive edge.
+ *
+ *  1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH1_POS_MODE_U0    0x00000003U
+#define PCNT_CH1_POS_MODE_U0_M  (PCNT_CH1_POS_MODE_U0_V << PCNT_CH1_POS_MODE_U0_S)
+#define PCNT_CH1_POS_MODE_U0_V  0x00000003U
+#define PCNT_CH1_POS_MODE_U0_S  26
+/** PCNT_CH1_HCTRL_MODE_U0 : R/W; bitpos: [29:28]; default: 0;
+ *  This register configures how the CH0_POS_MODE/CH0_NEG_MODE settings will be
+ *  modified when the control signal is high.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH1_HCTRL_MODE_U0    0x00000003U
+#define PCNT_CH1_HCTRL_MODE_U0_M  (PCNT_CH1_HCTRL_MODE_U0_V << PCNT_CH1_HCTRL_MODE_U0_S)
+#define PCNT_CH1_HCTRL_MODE_U0_V  0x00000003U
+#define PCNT_CH1_HCTRL_MODE_U0_S  28
+/** PCNT_CH1_LCTRL_MODE_U0 : R/W; bitpos: [31:30]; default: 0;
+ *  This register configures how the CH0_POS_MODE/CH0_NEG_MODE settings will be
+ *  modified when the control signal is low.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH1_LCTRL_MODE_U0    0x00000003U
+#define PCNT_CH1_LCTRL_MODE_U0_M  (PCNT_CH1_LCTRL_MODE_U0_V << PCNT_CH1_LCTRL_MODE_U0_S)
+#define PCNT_CH1_LCTRL_MODE_U0_V  0x00000003U
+#define PCNT_CH1_LCTRL_MODE_U0_S  30
+
+/** PCNT_U0_CONF1_REG register
+ *  Configuration register 1 for unit 0
+ */
+#define PCNT_U0_CONF1_REG (DR_REG_PCNT_BASE + 0x4)
+/** PCNT_CNT_THRES0_U0 : R/W; bitpos: [15:0]; default: 0;
+ *  This register is used to configure the thres0 value for unit 0.
+ */
+#define PCNT_CNT_THRES0_U0    0x0000FFFFU
+#define PCNT_CNT_THRES0_U0_M  (PCNT_CNT_THRES0_U0_V << PCNT_CNT_THRES0_U0_S)
+#define PCNT_CNT_THRES0_U0_V  0x0000FFFFU
+#define PCNT_CNT_THRES0_U0_S  0
+/** PCNT_CNT_THRES1_U0 : R/W; bitpos: [31:16]; default: 0;
+ *  This register is used to configure the thres1 value for unit 0.
+ */
+#define PCNT_CNT_THRES1_U0    0x0000FFFFU
+#define PCNT_CNT_THRES1_U0_M  (PCNT_CNT_THRES1_U0_V << PCNT_CNT_THRES1_U0_S)
+#define PCNT_CNT_THRES1_U0_V  0x0000FFFFU
+#define PCNT_CNT_THRES1_U0_S  16
+
+/** PCNT_U0_CONF2_REG register
+ *  Configuration register 2 for unit 0
+ */
+#define PCNT_U0_CONF2_REG (DR_REG_PCNT_BASE + 0x8)
+/** PCNT_CNT_H_LIM_U0 : R/W; bitpos: [15:0]; default: 0;
+ *  This register is used to configure the thr_h_lim value for unit 0.
+ */
+#define PCNT_CNT_H_LIM_U0    0x0000FFFFU
+#define PCNT_CNT_H_LIM_U0_M  (PCNT_CNT_H_LIM_U0_V << PCNT_CNT_H_LIM_U0_S)
+#define PCNT_CNT_H_LIM_U0_V  0x0000FFFFU
+#define PCNT_CNT_H_LIM_U0_S  0
+/** PCNT_CNT_L_LIM_U0 : R/W; bitpos: [31:16]; default: 0;
+ *  This register is used to configure the thr_l_lim value for unit 0.
+ */
+#define PCNT_CNT_L_LIM_U0    0x0000FFFFU
+#define PCNT_CNT_L_LIM_U0_M  (PCNT_CNT_L_LIM_U0_V << PCNT_CNT_L_LIM_U0_S)
+#define PCNT_CNT_L_LIM_U0_V  0x0000FFFFU
+#define PCNT_CNT_L_LIM_U0_S  16
+
+/** PCNT_U1_CONF0_REG register
+ *  Configuration register 0 for unit 1
+ */
+#define PCNT_U1_CONF0_REG (DR_REG_PCNT_BASE + 0xc)
+/** PCNT_FILTER_THRES_U1 : R/W; bitpos: [9:0]; default: 16;
+ *  This sets the maximum threshold, in APB_CLK cycles, for the filter.
+ *
+ *  Any pulses with width less than this will be ignored when the filter is enabled.
+ */
+#define PCNT_FILTER_THRES_U1    0x000003FFU
+#define PCNT_FILTER_THRES_U1_M  (PCNT_FILTER_THRES_U1_V << PCNT_FILTER_THRES_U1_S)
+#define PCNT_FILTER_THRES_U1_V  0x000003FFU
+#define PCNT_FILTER_THRES_U1_S  0
+/** PCNT_FILTER_EN_U1 : R/W; bitpos: [10]; default: 1;
+ *  This is the enable bit for unit 1's input filter.
+ */
+#define PCNT_FILTER_EN_U1    (BIT(10))
+#define PCNT_FILTER_EN_U1_M  (PCNT_FILTER_EN_U1_V << PCNT_FILTER_EN_U1_S)
+#define PCNT_FILTER_EN_U1_V  0x00000001U
+#define PCNT_FILTER_EN_U1_S  10
+/** PCNT_THR_ZERO_EN_U1 : R/W; bitpos: [11]; default: 1;
+ *  This is the enable bit for unit 1's zero comparator.
+ */
+#define PCNT_THR_ZERO_EN_U1    (BIT(11))
+#define PCNT_THR_ZERO_EN_U1_M  (PCNT_THR_ZERO_EN_U1_V << PCNT_THR_ZERO_EN_U1_S)
+#define PCNT_THR_ZERO_EN_U1_V  0x00000001U
+#define PCNT_THR_ZERO_EN_U1_S  11
+/** PCNT_THR_H_LIM_EN_U1 : R/W; bitpos: [12]; default: 1;
+ *  This is the enable bit for unit 1's thr_h_lim comparator.
+ */
+#define PCNT_THR_H_LIM_EN_U1    (BIT(12))
+#define PCNT_THR_H_LIM_EN_U1_M  (PCNT_THR_H_LIM_EN_U1_V << PCNT_THR_H_LIM_EN_U1_S)
+#define PCNT_THR_H_LIM_EN_U1_V  0x00000001U
+#define PCNT_THR_H_LIM_EN_U1_S  12
+/** PCNT_THR_L_LIM_EN_U1 : R/W; bitpos: [13]; default: 1;
+ *  This is the enable bit for unit 1's thr_l_lim comparator.
+ */
+#define PCNT_THR_L_LIM_EN_U1    (BIT(13))
+#define PCNT_THR_L_LIM_EN_U1_M  (PCNT_THR_L_LIM_EN_U1_V << PCNT_THR_L_LIM_EN_U1_S)
+#define PCNT_THR_L_LIM_EN_U1_V  0x00000001U
+#define PCNT_THR_L_LIM_EN_U1_S  13
+/** PCNT_THR_THRES0_EN_U1 : R/W; bitpos: [14]; default: 0;
+ *  This is the enable bit for unit 1's thres0 comparator.
+ */
+#define PCNT_THR_THRES0_EN_U1    (BIT(14))
+#define PCNT_THR_THRES0_EN_U1_M  (PCNT_THR_THRES0_EN_U1_V << PCNT_THR_THRES0_EN_U1_S)
+#define PCNT_THR_THRES0_EN_U1_V  0x00000001U
+#define PCNT_THR_THRES0_EN_U1_S  14
+/** PCNT_THR_THRES1_EN_U1 : R/W; bitpos: [15]; default: 0;
+ *  This is the enable bit for unit 1's thres1 comparator.
+ */
+#define PCNT_THR_THRES1_EN_U1    (BIT(15))
+#define PCNT_THR_THRES1_EN_U1_M  (PCNT_THR_THRES1_EN_U1_V << PCNT_THR_THRES1_EN_U1_S)
+#define PCNT_THR_THRES1_EN_U1_V  0x00000001U
+#define PCNT_THR_THRES1_EN_U1_S  15
+/** PCNT_CH0_NEG_MODE_U1 : R/W; bitpos: [17:16]; default: 0;
+ *  This register sets the behavior when the signal input of channel 0 detects a
+ *  negative edge.
+ *
+ *  1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH0_NEG_MODE_U1    0x00000003U
+#define PCNT_CH0_NEG_MODE_U1_M  (PCNT_CH0_NEG_MODE_U1_V << PCNT_CH0_NEG_MODE_U1_S)
+#define PCNT_CH0_NEG_MODE_U1_V  0x00000003U
+#define PCNT_CH0_NEG_MODE_U1_S  16
+/** PCNT_CH0_POS_MODE_U1 : R/W; bitpos: [19:18]; default: 0;
+ *  This register sets the behavior when the signal input of channel 0 detects a
+ *  positive edge.
+ *
+ *  1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH0_POS_MODE_U1    0x00000003U
+#define PCNT_CH0_POS_MODE_U1_M  (PCNT_CH0_POS_MODE_U1_V << PCNT_CH0_POS_MODE_U1_S)
+#define PCNT_CH0_POS_MODE_U1_V  0x00000003U
+#define PCNT_CH0_POS_MODE_U1_S  18
+/** PCNT_CH0_HCTRL_MODE_U1 : R/W; bitpos: [21:20]; default: 0;
+ *  This register configures how the CH1_POS_MODE/CH1_NEG_MODE settings will be
+ *  modified when the control signal is high.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH0_HCTRL_MODE_U1    0x00000003U
+#define PCNT_CH0_HCTRL_MODE_U1_M  (PCNT_CH0_HCTRL_MODE_U1_V << PCNT_CH0_HCTRL_MODE_U1_S)
+#define PCNT_CH0_HCTRL_MODE_U1_V  0x00000003U
+#define PCNT_CH0_HCTRL_MODE_U1_S  20
+/** PCNT_CH0_LCTRL_MODE_U1 : R/W; bitpos: [23:22]; default: 0;
+ *  This register configures how the CH1_POS_MODE/CH1_NEG_MODE settings will be
+ *  modified when the control signal is low.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH0_LCTRL_MODE_U1    0x00000003U
+#define PCNT_CH0_LCTRL_MODE_U1_M  (PCNT_CH0_LCTRL_MODE_U1_V << PCNT_CH0_LCTRL_MODE_U1_S)
+#define PCNT_CH0_LCTRL_MODE_U1_V  0x00000003U
+#define PCNT_CH0_LCTRL_MODE_U1_S  22
+/** PCNT_CH1_NEG_MODE_U1 : R/W; bitpos: [25:24]; default: 0;
+ *  This register sets the behavior when the signal input of channel 1 detects a
+ *  negative edge.
+ *
+ *  1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH1_NEG_MODE_U1    0x00000003U
+#define PCNT_CH1_NEG_MODE_U1_M  (PCNT_CH1_NEG_MODE_U1_V << PCNT_CH1_NEG_MODE_U1_S)
+#define PCNT_CH1_NEG_MODE_U1_V  0x00000003U
+#define PCNT_CH1_NEG_MODE_U1_S  24
+/** PCNT_CH1_POS_MODE_U1 : R/W; bitpos: [27:26]; default: 0;
+ *  This register sets the behavior when the signal input of channel 1 detects a
+ *  positive edge.
+ *
+ *  1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH1_POS_MODE_U1    0x00000003U
+#define PCNT_CH1_POS_MODE_U1_M  (PCNT_CH1_POS_MODE_U1_V << PCNT_CH1_POS_MODE_U1_S)
+#define PCNT_CH1_POS_MODE_U1_V  0x00000003U
+#define PCNT_CH1_POS_MODE_U1_S  26
+/** PCNT_CH1_HCTRL_MODE_U1 : R/W; bitpos: [29:28]; default: 0;
+ *  This register configures how the CH1_POS_MODE/CH1_NEG_MODE settings will be
+ *  modified when the control signal is high.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH1_HCTRL_MODE_U1    0x00000003U
+#define PCNT_CH1_HCTRL_MODE_U1_M  (PCNT_CH1_HCTRL_MODE_U1_V << PCNT_CH1_HCTRL_MODE_U1_S)
+#define PCNT_CH1_HCTRL_MODE_U1_V  0x00000003U
+#define PCNT_CH1_HCTRL_MODE_U1_S  28
+/** PCNT_CH1_LCTRL_MODE_U1 : R/W; bitpos: [31:30]; default: 0;
+ *  This register configures how the CH1_POS_MODE/CH1_NEG_MODE settings will be
+ *  modified when the control signal is low.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH1_LCTRL_MODE_U1    0x00000003U
+#define PCNT_CH1_LCTRL_MODE_U1_M  (PCNT_CH1_LCTRL_MODE_U1_V << PCNT_CH1_LCTRL_MODE_U1_S)
+#define PCNT_CH1_LCTRL_MODE_U1_V  0x00000003U
+#define PCNT_CH1_LCTRL_MODE_U1_S  30
+
+/** PCNT_U1_CONF1_REG register
+ *  Configuration register 1 for unit 1
+ */
+#define PCNT_U1_CONF1_REG (DR_REG_PCNT_BASE + 0x10)
+/** PCNT_CNT_THRES0_U1 : R/W; bitpos: [15:0]; default: 0;
+ *  This register is used to configure the thres0 value for unit 1.
+ */
+#define PCNT_CNT_THRES0_U1    0x0000FFFFU
+#define PCNT_CNT_THRES0_U1_M  (PCNT_CNT_THRES0_U1_V << PCNT_CNT_THRES0_U1_S)
+#define PCNT_CNT_THRES0_U1_V  0x0000FFFFU
+#define PCNT_CNT_THRES0_U1_S  0
+/** PCNT_CNT_THRES1_U1 : R/W; bitpos: [31:16]; default: 0;
+ *  This register is used to configure the thres1 value for unit 1.
+ */
+#define PCNT_CNT_THRES1_U1    0x0000FFFFU
+#define PCNT_CNT_THRES1_U1_M  (PCNT_CNT_THRES1_U1_V << PCNT_CNT_THRES1_U1_S)
+#define PCNT_CNT_THRES1_U1_V  0x0000FFFFU
+#define PCNT_CNT_THRES1_U1_S  16
+
+/** PCNT_U1_CONF2_REG register
+ *  Configuration register 2 for unit 1
+ */
+#define PCNT_U1_CONF2_REG (DR_REG_PCNT_BASE + 0x14)
+/** PCNT_CNT_H_LIM_U1 : R/W; bitpos: [15:0]; default: 0;
+ *  This register is used to configure the thr_h_lim value for unit 1.
+ */
+#define PCNT_CNT_H_LIM_U1    0x0000FFFFU
+#define PCNT_CNT_H_LIM_U1_M  (PCNT_CNT_H_LIM_U1_V << PCNT_CNT_H_LIM_U1_S)
+#define PCNT_CNT_H_LIM_U1_V  0x0000FFFFU
+#define PCNT_CNT_H_LIM_U1_S  0
+/** PCNT_CNT_L_LIM_U1 : R/W; bitpos: [31:16]; default: 0;
+ *  This register is used to configure the thr_l_lim value for unit 1.
+ */
+#define PCNT_CNT_L_LIM_U1    0x0000FFFFU
+#define PCNT_CNT_L_LIM_U1_M  (PCNT_CNT_L_LIM_U1_V << PCNT_CNT_L_LIM_U1_S)
+#define PCNT_CNT_L_LIM_U1_V  0x0000FFFFU
+#define PCNT_CNT_L_LIM_U1_S  16
+
+/** PCNT_U2_CONF0_REG register
+ *  Configuration register 0 for unit 2
+ */
+#define PCNT_U2_CONF0_REG (DR_REG_PCNT_BASE + 0x18)
+/** PCNT_FILTER_THRES_U2 : R/W; bitpos: [9:0]; default: 16;
+ *  This sets the maximum threshold, in APB_CLK cycles, for the filter.
+ *
+ *  Any pulses with width less than this will be ignored when the filter is enabled.
+ */
+#define PCNT_FILTER_THRES_U2    0x000003FFU
+#define PCNT_FILTER_THRES_U2_M  (PCNT_FILTER_THRES_U2_V << PCNT_FILTER_THRES_U2_S)
+#define PCNT_FILTER_THRES_U2_V  0x000003FFU
+#define PCNT_FILTER_THRES_U2_S  0
+/** PCNT_FILTER_EN_U2 : R/W; bitpos: [10]; default: 1;
+ *  This is the enable bit for unit 2's input filter.
+ */
+#define PCNT_FILTER_EN_U2    (BIT(10))
+#define PCNT_FILTER_EN_U2_M  (PCNT_FILTER_EN_U2_V << PCNT_FILTER_EN_U2_S)
+#define PCNT_FILTER_EN_U2_V  0x00000001U
+#define PCNT_FILTER_EN_U2_S  10
+/** PCNT_THR_ZERO_EN_U2 : R/W; bitpos: [11]; default: 1;
+ *  This is the enable bit for unit 2's zero comparator.
+ */
+#define PCNT_THR_ZERO_EN_U2    (BIT(11))
+#define PCNT_THR_ZERO_EN_U2_M  (PCNT_THR_ZERO_EN_U2_V << PCNT_THR_ZERO_EN_U2_S)
+#define PCNT_THR_ZERO_EN_U2_V  0x00000001U
+#define PCNT_THR_ZERO_EN_U2_S  11
+/** PCNT_THR_H_LIM_EN_U2 : R/W; bitpos: [12]; default: 1;
+ *  This is the enable bit for unit 2's thr_h_lim comparator.
+ */
+#define PCNT_THR_H_LIM_EN_U2    (BIT(12))
+#define PCNT_THR_H_LIM_EN_U2_M  (PCNT_THR_H_LIM_EN_U2_V << PCNT_THR_H_LIM_EN_U2_S)
+#define PCNT_THR_H_LIM_EN_U2_V  0x00000001U
+#define PCNT_THR_H_LIM_EN_U2_S  12
+/** PCNT_THR_L_LIM_EN_U2 : R/W; bitpos: [13]; default: 1;
+ *  This is the enable bit for unit 2's thr_l_lim comparator.
+ */
+#define PCNT_THR_L_LIM_EN_U2    (BIT(13))
+#define PCNT_THR_L_LIM_EN_U2_M  (PCNT_THR_L_LIM_EN_U2_V << PCNT_THR_L_LIM_EN_U2_S)
+#define PCNT_THR_L_LIM_EN_U2_V  0x00000001U
+#define PCNT_THR_L_LIM_EN_U2_S  13
+/** PCNT_THR_THRES0_EN_U2 : R/W; bitpos: [14]; default: 0;
+ *  This is the enable bit for unit 2's thres0 comparator.
+ */
+#define PCNT_THR_THRES0_EN_U2    (BIT(14))
+#define PCNT_THR_THRES0_EN_U2_M  (PCNT_THR_THRES0_EN_U2_V << PCNT_THR_THRES0_EN_U2_S)
+#define PCNT_THR_THRES0_EN_U2_V  0x00000001U
+#define PCNT_THR_THRES0_EN_U2_S  14
+/** PCNT_THR_THRES1_EN_U2 : R/W; bitpos: [15]; default: 0;
+ *  This is the enable bit for unit 2's thres1 comparator.
+ */
+#define PCNT_THR_THRES1_EN_U2    (BIT(15))
+#define PCNT_THR_THRES1_EN_U2_M  (PCNT_THR_THRES1_EN_U2_V << PCNT_THR_THRES1_EN_U2_S)
+#define PCNT_THR_THRES1_EN_U2_V  0x00000001U
+#define PCNT_THR_THRES1_EN_U2_S  15
+/** PCNT_CH0_NEG_MODE_U2 : R/W; bitpos: [17:16]; default: 0;
+ *  This register sets the behavior when the signal input of channel 0 detects a
+ *  negative edge.
+ *
+ *  1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH0_NEG_MODE_U2    0x00000003U
+#define PCNT_CH0_NEG_MODE_U2_M  (PCNT_CH0_NEG_MODE_U2_V << PCNT_CH0_NEG_MODE_U2_S)
+#define PCNT_CH0_NEG_MODE_U2_V  0x00000003U
+#define PCNT_CH0_NEG_MODE_U2_S  16
+/** PCNT_CH0_POS_MODE_U2 : R/W; bitpos: [19:18]; default: 0;
+ *  This register sets the behavior when the signal input of channel 0 detects a
+ *  positive edge.
+ *
+ *  1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH0_POS_MODE_U2    0x00000003U
+#define PCNT_CH0_POS_MODE_U2_M  (PCNT_CH0_POS_MODE_U2_V << PCNT_CH0_POS_MODE_U2_S)
+#define PCNT_CH0_POS_MODE_U2_V  0x00000003U
+#define PCNT_CH0_POS_MODE_U2_S  18
+/** PCNT_CH0_HCTRL_MODE_U2 : R/W; bitpos: [21:20]; default: 0;
+ *  This register configures how the CH2_POS_MODE/CH2_NEG_MODE settings will be
+ *  modified when the control signal is high.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH0_HCTRL_MODE_U2    0x00000003U
+#define PCNT_CH0_HCTRL_MODE_U2_M  (PCNT_CH0_HCTRL_MODE_U2_V << PCNT_CH0_HCTRL_MODE_U2_S)
+#define PCNT_CH0_HCTRL_MODE_U2_V  0x00000003U
+#define PCNT_CH0_HCTRL_MODE_U2_S  20
+/** PCNT_CH0_LCTRL_MODE_U2 : R/W; bitpos: [23:22]; default: 0;
+ *  This register configures how the CH2_POS_MODE/CH2_NEG_MODE settings will be
+ *  modified when the control signal is low.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH0_LCTRL_MODE_U2    0x00000003U
+#define PCNT_CH0_LCTRL_MODE_U2_M  (PCNT_CH0_LCTRL_MODE_U2_V << PCNT_CH0_LCTRL_MODE_U2_S)
+#define PCNT_CH0_LCTRL_MODE_U2_V  0x00000003U
+#define PCNT_CH0_LCTRL_MODE_U2_S  22
+/** PCNT_CH1_NEG_MODE_U2 : R/W; bitpos: [25:24]; default: 0;
+ *  This register sets the behavior when the signal input of channel 1 detects a
+ *  negative edge.
+ *
+ *  1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH1_NEG_MODE_U2    0x00000003U
+#define PCNT_CH1_NEG_MODE_U2_M  (PCNT_CH1_NEG_MODE_U2_V << PCNT_CH1_NEG_MODE_U2_S)
+#define PCNT_CH1_NEG_MODE_U2_V  0x00000003U
+#define PCNT_CH1_NEG_MODE_U2_S  24
+/** PCNT_CH1_POS_MODE_U2 : R/W; bitpos: [27:26]; default: 0;
+ *  This register sets the behavior when the signal input of channel 1 detects a
+ *  positive edge.
+ *
+ *  1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH1_POS_MODE_U2    0x00000003U
+#define PCNT_CH1_POS_MODE_U2_M  (PCNT_CH1_POS_MODE_U2_V << PCNT_CH1_POS_MODE_U2_S)
+#define PCNT_CH1_POS_MODE_U2_V  0x00000003U
+#define PCNT_CH1_POS_MODE_U2_S  26
+/** PCNT_CH1_HCTRL_MODE_U2 : R/W; bitpos: [29:28]; default: 0;
+ *  This register configures how the CH2_POS_MODE/CH2_NEG_MODE settings will be
+ *  modified when the control signal is high.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH1_HCTRL_MODE_U2    0x00000003U
+#define PCNT_CH1_HCTRL_MODE_U2_M  (PCNT_CH1_HCTRL_MODE_U2_V << PCNT_CH1_HCTRL_MODE_U2_S)
+#define PCNT_CH1_HCTRL_MODE_U2_V  0x00000003U
+#define PCNT_CH1_HCTRL_MODE_U2_S  28
+/** PCNT_CH1_LCTRL_MODE_U2 : R/W; bitpos: [31:30]; default: 0;
+ *  This register configures how the CH2_POS_MODE/CH2_NEG_MODE settings will be
+ *  modified when the control signal is low.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH1_LCTRL_MODE_U2    0x00000003U
+#define PCNT_CH1_LCTRL_MODE_U2_M  (PCNT_CH1_LCTRL_MODE_U2_V << PCNT_CH1_LCTRL_MODE_U2_S)
+#define PCNT_CH1_LCTRL_MODE_U2_V  0x00000003U
+#define PCNT_CH1_LCTRL_MODE_U2_S  30
+
+/** PCNT_U2_CONF1_REG register
+ *  Configuration register 1 for unit 2
+ */
+#define PCNT_U2_CONF1_REG (DR_REG_PCNT_BASE + 0x1c)
+/** PCNT_CNT_THRES0_U2 : R/W; bitpos: [15:0]; default: 0;
+ *  This register is used to configure the thres0 value for unit 2.
+ */
+#define PCNT_CNT_THRES0_U2    0x0000FFFFU
+#define PCNT_CNT_THRES0_U2_M  (PCNT_CNT_THRES0_U2_V << PCNT_CNT_THRES0_U2_S)
+#define PCNT_CNT_THRES0_U2_V  0x0000FFFFU
+#define PCNT_CNT_THRES0_U2_S  0
+/** PCNT_CNT_THRES1_U2 : R/W; bitpos: [31:16]; default: 0;
+ *  This register is used to configure the thres1 value for unit 2.
+ */
+#define PCNT_CNT_THRES1_U2    0x0000FFFFU
+#define PCNT_CNT_THRES1_U2_M  (PCNT_CNT_THRES1_U2_V << PCNT_CNT_THRES1_U2_S)
+#define PCNT_CNT_THRES1_U2_V  0x0000FFFFU
+#define PCNT_CNT_THRES1_U2_S  16
+
+/** PCNT_U2_CONF2_REG register
+ *  Configuration register 2 for unit 2
+ */
+#define PCNT_U2_CONF2_REG (DR_REG_PCNT_BASE + 0x20)
+/** PCNT_CNT_H_LIM_U2 : R/W; bitpos: [15:0]; default: 0;
+ *  This register is used to configure the thr_h_lim value for unit 2.
+ */
+#define PCNT_CNT_H_LIM_U2    0x0000FFFFU
+#define PCNT_CNT_H_LIM_U2_M  (PCNT_CNT_H_LIM_U2_V << PCNT_CNT_H_LIM_U2_S)
+#define PCNT_CNT_H_LIM_U2_V  0x0000FFFFU
+#define PCNT_CNT_H_LIM_U2_S  0
+/** PCNT_CNT_L_LIM_U2 : R/W; bitpos: [31:16]; default: 0;
+ *  This register is used to configure the thr_l_lim value for unit 2.
+ */
+#define PCNT_CNT_L_LIM_U2    0x0000FFFFU
+#define PCNT_CNT_L_LIM_U2_M  (PCNT_CNT_L_LIM_U2_V << PCNT_CNT_L_LIM_U2_S)
+#define PCNT_CNT_L_LIM_U2_V  0x0000FFFFU
+#define PCNT_CNT_L_LIM_U2_S  16
+
+/** PCNT_U3_CONF0_REG register
+ *  Configuration register 0 for unit 3
+ */
+#define PCNT_U3_CONF0_REG (DR_REG_PCNT_BASE + 0x24)
+/** PCNT_FILTER_THRES_U3 : R/W; bitpos: [9:0]; default: 16;
+ *  This sets the maximum threshold, in APB_CLK cycles, for the filter.
+ *
+ *  Any pulses with width less than this will be ignored when the filter is enabled.
+ */
+#define PCNT_FILTER_THRES_U3    0x000003FFU
+#define PCNT_FILTER_THRES_U3_M  (PCNT_FILTER_THRES_U3_V << PCNT_FILTER_THRES_U3_S)
+#define PCNT_FILTER_THRES_U3_V  0x000003FFU
+#define PCNT_FILTER_THRES_U3_S  0
+/** PCNT_FILTER_EN_U3 : R/W; bitpos: [10]; default: 1;
+ *  This is the enable bit for unit 3's input filter.
+ */
+#define PCNT_FILTER_EN_U3    (BIT(10))
+#define PCNT_FILTER_EN_U3_M  (PCNT_FILTER_EN_U3_V << PCNT_FILTER_EN_U3_S)
+#define PCNT_FILTER_EN_U3_V  0x00000001U
+#define PCNT_FILTER_EN_U3_S  10
+/** PCNT_THR_ZERO_EN_U3 : R/W; bitpos: [11]; default: 1;
+ *  This is the enable bit for unit 3's zero comparator.
+ */
+#define PCNT_THR_ZERO_EN_U3    (BIT(11))
+#define PCNT_THR_ZERO_EN_U3_M  (PCNT_THR_ZERO_EN_U3_V << PCNT_THR_ZERO_EN_U3_S)
+#define PCNT_THR_ZERO_EN_U3_V  0x00000001U
+#define PCNT_THR_ZERO_EN_U3_S  11
+/** PCNT_THR_H_LIM_EN_U3 : R/W; bitpos: [12]; default: 1;
+ *  This is the enable bit for unit 3's thr_h_lim comparator.
+ */
+#define PCNT_THR_H_LIM_EN_U3    (BIT(12))
+#define PCNT_THR_H_LIM_EN_U3_M  (PCNT_THR_H_LIM_EN_U3_V << PCNT_THR_H_LIM_EN_U3_S)
+#define PCNT_THR_H_LIM_EN_U3_V  0x00000001U
+#define PCNT_THR_H_LIM_EN_U3_S  12
+/** PCNT_THR_L_LIM_EN_U3 : R/W; bitpos: [13]; default: 1;
+ *  This is the enable bit for unit 3's thr_l_lim comparator.
+ */
+#define PCNT_THR_L_LIM_EN_U3    (BIT(13))
+#define PCNT_THR_L_LIM_EN_U3_M  (PCNT_THR_L_LIM_EN_U3_V << PCNT_THR_L_LIM_EN_U3_S)
+#define PCNT_THR_L_LIM_EN_U3_V  0x00000001U
+#define PCNT_THR_L_LIM_EN_U3_S  13
+/** PCNT_THR_THRES0_EN_U3 : R/W; bitpos: [14]; default: 0;
+ *  This is the enable bit for unit 3's thres0 comparator.
+ */
+#define PCNT_THR_THRES0_EN_U3    (BIT(14))
+#define PCNT_THR_THRES0_EN_U3_M  (PCNT_THR_THRES0_EN_U3_V << PCNT_THR_THRES0_EN_U3_S)
+#define PCNT_THR_THRES0_EN_U3_V  0x00000001U
+#define PCNT_THR_THRES0_EN_U3_S  14
+/** PCNT_THR_THRES1_EN_U3 : R/W; bitpos: [15]; default: 0;
+ *  This is the enable bit for unit 3's thres1 comparator.
+ */
+#define PCNT_THR_THRES1_EN_U3    (BIT(15))
+#define PCNT_THR_THRES1_EN_U3_M  (PCNT_THR_THRES1_EN_U3_V << PCNT_THR_THRES1_EN_U3_S)
+#define PCNT_THR_THRES1_EN_U3_V  0x00000001U
+#define PCNT_THR_THRES1_EN_U3_S  15
+/** PCNT_CH0_NEG_MODE_U3 : R/W; bitpos: [17:16]; default: 0;
+ *  This register sets the behavior when the signal input of channel 0 detects a
+ *  negative edge.
+ *
+ *  1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH0_NEG_MODE_U3    0x00000003U
+#define PCNT_CH0_NEG_MODE_U3_M  (PCNT_CH0_NEG_MODE_U3_V << PCNT_CH0_NEG_MODE_U3_S)
+#define PCNT_CH0_NEG_MODE_U3_V  0x00000003U
+#define PCNT_CH0_NEG_MODE_U3_S  16
+/** PCNT_CH0_POS_MODE_U3 : R/W; bitpos: [19:18]; default: 0;
+ *  This register sets the behavior when the signal input of channel 0 detects a
+ *  positive edge.
+ *
+ *  1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH0_POS_MODE_U3    0x00000003U
+#define PCNT_CH0_POS_MODE_U3_M  (PCNT_CH0_POS_MODE_U3_V << PCNT_CH0_POS_MODE_U3_S)
+#define PCNT_CH0_POS_MODE_U3_V  0x00000003U
+#define PCNT_CH0_POS_MODE_U3_S  18
+/** PCNT_CH0_HCTRL_MODE_U3 : R/W; bitpos: [21:20]; default: 0;
+ *  This register configures how the CH3_POS_MODE/CH3_NEG_MODE settings will be
+ *  modified when the control signal is high.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH0_HCTRL_MODE_U3    0x00000003U
+#define PCNT_CH0_HCTRL_MODE_U3_M  (PCNT_CH0_HCTRL_MODE_U3_V << PCNT_CH0_HCTRL_MODE_U3_S)
+#define PCNT_CH0_HCTRL_MODE_U3_V  0x00000003U
+#define PCNT_CH0_HCTRL_MODE_U3_S  20
+/** PCNT_CH0_LCTRL_MODE_U3 : R/W; bitpos: [23:22]; default: 0;
+ *  This register configures how the CH3_POS_MODE/CH3_NEG_MODE settings will be
+ *  modified when the control signal is low.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH0_LCTRL_MODE_U3    0x00000003U
+#define PCNT_CH0_LCTRL_MODE_U3_M  (PCNT_CH0_LCTRL_MODE_U3_V << PCNT_CH0_LCTRL_MODE_U3_S)
+#define PCNT_CH0_LCTRL_MODE_U3_V  0x00000003U
+#define PCNT_CH0_LCTRL_MODE_U3_S  22
+/** PCNT_CH1_NEG_MODE_U3 : R/W; bitpos: [25:24]; default: 0;
+ *  This register sets the behavior when the signal input of channel 1 detects a
+ *  negative edge.
+ *
+ *  1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH1_NEG_MODE_U3    0x00000003U
+#define PCNT_CH1_NEG_MODE_U3_M  (PCNT_CH1_NEG_MODE_U3_V << PCNT_CH1_NEG_MODE_U3_S)
+#define PCNT_CH1_NEG_MODE_U3_V  0x00000003U
+#define PCNT_CH1_NEG_MODE_U3_S  24
+/** PCNT_CH1_POS_MODE_U3 : R/W; bitpos: [27:26]; default: 0;
+ *  This register sets the behavior when the signal input of channel 1 detects a
+ *  positive edge.
+ *
+ *  1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter
+ */
+#define PCNT_CH1_POS_MODE_U3    0x00000003U
+#define PCNT_CH1_POS_MODE_U3_M  (PCNT_CH1_POS_MODE_U3_V << PCNT_CH1_POS_MODE_U3_S)
+#define PCNT_CH1_POS_MODE_U3_V  0x00000003U
+#define PCNT_CH1_POS_MODE_U3_S  26
+/** PCNT_CH1_HCTRL_MODE_U3 : R/W; bitpos: [29:28]; default: 0;
+ *  This register configures how the CH3_POS_MODE/CH3_NEG_MODE settings will be
+ *  modified when the control signal is high.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH1_HCTRL_MODE_U3    0x00000003U
+#define PCNT_CH1_HCTRL_MODE_U3_M  (PCNT_CH1_HCTRL_MODE_U3_V << PCNT_CH1_HCTRL_MODE_U3_S)
+#define PCNT_CH1_HCTRL_MODE_U3_V  0x00000003U
+#define PCNT_CH1_HCTRL_MODE_U3_S  28
+/** PCNT_CH1_LCTRL_MODE_U3 : R/W; bitpos: [31:30]; default: 0;
+ *  This register configures how the CH3_POS_MODE/CH3_NEG_MODE settings will be
+ *  modified when the control signal is low.
+ *
+ *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+ *  increase);2, 3: Inhibit counter modification
+ */
+#define PCNT_CH1_LCTRL_MODE_U3    0x00000003U
+#define PCNT_CH1_LCTRL_MODE_U3_M  (PCNT_CH1_LCTRL_MODE_U3_V << PCNT_CH1_LCTRL_MODE_U3_S)
+#define PCNT_CH1_LCTRL_MODE_U3_V  0x00000003U
+#define PCNT_CH1_LCTRL_MODE_U3_S  30
+
+/** PCNT_U3_CONF1_REG register
+ *  Configuration register 1 for unit 3
+ */
+#define PCNT_U3_CONF1_REG (DR_REG_PCNT_BASE + 0x28)
+/** PCNT_CNT_THRES0_U3 : R/W; bitpos: [15:0]; default: 0;
+ *  This register is used to configure the thres0 value for unit 3.
+ */
+#define PCNT_CNT_THRES0_U3    0x0000FFFFU
+#define PCNT_CNT_THRES0_U3_M  (PCNT_CNT_THRES0_U3_V << PCNT_CNT_THRES0_U3_S)
+#define PCNT_CNT_THRES0_U3_V  0x0000FFFFU
+#define PCNT_CNT_THRES0_U3_S  0
+/** PCNT_CNT_THRES1_U3 : R/W; bitpos: [31:16]; default: 0;
+ *  This register is used to configure the thres1 value for unit 3.
+ */
+#define PCNT_CNT_THRES1_U3    0x0000FFFFU
+#define PCNT_CNT_THRES1_U3_M  (PCNT_CNT_THRES1_U3_V << PCNT_CNT_THRES1_U3_S)
+#define PCNT_CNT_THRES1_U3_V  0x0000FFFFU
+#define PCNT_CNT_THRES1_U3_S  16
+
+/** PCNT_U3_CONF2_REG register
+ *  Configuration register 2 for unit 3
+ */
+#define PCNT_U3_CONF2_REG (DR_REG_PCNT_BASE + 0x2c)
+/** PCNT_CNT_H_LIM_U3 : R/W; bitpos: [15:0]; default: 0;
+ *  This register is used to configure the thr_h_lim value for unit 3.
+ */
+#define PCNT_CNT_H_LIM_U3    0x0000FFFFU
+#define PCNT_CNT_H_LIM_U3_M  (PCNT_CNT_H_LIM_U3_V << PCNT_CNT_H_LIM_U3_S)
+#define PCNT_CNT_H_LIM_U3_V  0x0000FFFFU
+#define PCNT_CNT_H_LIM_U3_S  0
+/** PCNT_CNT_L_LIM_U3 : R/W; bitpos: [31:16]; default: 0;
+ *  This register is used to configure the thr_l_lim value for unit 3.
+ */
+#define PCNT_CNT_L_LIM_U3    0x0000FFFFU
+#define PCNT_CNT_L_LIM_U3_M  (PCNT_CNT_L_LIM_U3_V << PCNT_CNT_L_LIM_U3_S)
+#define PCNT_CNT_L_LIM_U3_V  0x0000FFFFU
+#define PCNT_CNT_L_LIM_U3_S  16
+
+/** PCNT_U0_CNT_REG register
+ *  Counter value for unit 0
+ */
+#define PCNT_U0_CNT_REG (DR_REG_PCNT_BASE + 0x30)
+/** PCNT_PULSE_CNT_U0 : RO; bitpos: [15:0]; default: 0;
+ *  This register stores the current pulse count value for unit 0.
+ */
+#define PCNT_PULSE_CNT_U0    0x0000FFFFU
+#define PCNT_PULSE_CNT_U0_M  (PCNT_PULSE_CNT_U0_V << PCNT_PULSE_CNT_U0_S)
+#define PCNT_PULSE_CNT_U0_V  0x0000FFFFU
+#define PCNT_PULSE_CNT_U0_S  0
+
+/** PCNT_U1_CNT_REG register
+ *  Counter value for unit 1
+ */
+#define PCNT_U1_CNT_REG (DR_REG_PCNT_BASE + 0x34)
+/** PCNT_PULSE_CNT_U1 : RO; bitpos: [15:0]; default: 0;
+ *  This register stores the current pulse count value for unit 1.
+ */
+#define PCNT_PULSE_CNT_U1    0x0000FFFFU
+#define PCNT_PULSE_CNT_U1_M  (PCNT_PULSE_CNT_U1_V << PCNT_PULSE_CNT_U1_S)
+#define PCNT_PULSE_CNT_U1_V  0x0000FFFFU
+#define PCNT_PULSE_CNT_U1_S  0
+
+/** PCNT_U2_CNT_REG register
+ *  Counter value for unit 2
+ */
+#define PCNT_U2_CNT_REG (DR_REG_PCNT_BASE + 0x38)
+/** PCNT_PULSE_CNT_U2 : RO; bitpos: [15:0]; default: 0;
+ *  This register stores the current pulse count value for unit 2.
+ */
+#define PCNT_PULSE_CNT_U2    0x0000FFFFU
+#define PCNT_PULSE_CNT_U2_M  (PCNT_PULSE_CNT_U2_V << PCNT_PULSE_CNT_U2_S)
+#define PCNT_PULSE_CNT_U2_V  0x0000FFFFU
+#define PCNT_PULSE_CNT_U2_S  0
+
+/** PCNT_U3_CNT_REG register
+ *  Counter value for unit 3
+ */
+#define PCNT_U3_CNT_REG (DR_REG_PCNT_BASE + 0x3c)
+/** PCNT_PULSE_CNT_U3 : RO; bitpos: [15:0]; default: 0;
+ *  This register stores the current pulse count value for unit 3.
+ */
+#define PCNT_PULSE_CNT_U3    0x0000FFFFU
+#define PCNT_PULSE_CNT_U3_M  (PCNT_PULSE_CNT_U3_V << PCNT_PULSE_CNT_U3_S)
+#define PCNT_PULSE_CNT_U3_V  0x0000FFFFU
+#define PCNT_PULSE_CNT_U3_S  0
+
+/** PCNT_INT_RAW_REG register
+ *  Interrupt raw status register
+ */
+#define PCNT_INT_RAW_REG (DR_REG_PCNT_BASE + 0x40)
+/** PCNT_CNT_THR_EVENT_U0_INT_RAW : RO; bitpos: [0]; default: 0;
+ *  The raw interrupt status bit for the PCNT_CNT_THR_EVENT_U0_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U0_INT_RAW    (BIT(0))
+#define PCNT_CNT_THR_EVENT_U0_INT_RAW_M  (PCNT_CNT_THR_EVENT_U0_INT_RAW_V << PCNT_CNT_THR_EVENT_U0_INT_RAW_S)
+#define PCNT_CNT_THR_EVENT_U0_INT_RAW_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U0_INT_RAW_S  0
+/** PCNT_CNT_THR_EVENT_U1_INT_RAW : RO; bitpos: [1]; default: 0;
+ *  The raw interrupt status bit for the PCNT_CNT_THR_EVENT_U1_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U1_INT_RAW    (BIT(1))
+#define PCNT_CNT_THR_EVENT_U1_INT_RAW_M  (PCNT_CNT_THR_EVENT_U1_INT_RAW_V << PCNT_CNT_THR_EVENT_U1_INT_RAW_S)
+#define PCNT_CNT_THR_EVENT_U1_INT_RAW_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U1_INT_RAW_S  1
+/** PCNT_CNT_THR_EVENT_U2_INT_RAW : RO; bitpos: [2]; default: 0;
+ *  The raw interrupt status bit for the PCNT_CNT_THR_EVENT_U2_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U2_INT_RAW    (BIT(2))
+#define PCNT_CNT_THR_EVENT_U2_INT_RAW_M  (PCNT_CNT_THR_EVENT_U2_INT_RAW_V << PCNT_CNT_THR_EVENT_U2_INT_RAW_S)
+#define PCNT_CNT_THR_EVENT_U2_INT_RAW_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U2_INT_RAW_S  2
+/** PCNT_CNT_THR_EVENT_U3_INT_RAW : RO; bitpos: [3]; default: 0;
+ *  The raw interrupt status bit for the PCNT_CNT_THR_EVENT_U3_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U3_INT_RAW    (BIT(3))
+#define PCNT_CNT_THR_EVENT_U3_INT_RAW_M  (PCNT_CNT_THR_EVENT_U3_INT_RAW_V << PCNT_CNT_THR_EVENT_U3_INT_RAW_S)
+#define PCNT_CNT_THR_EVENT_U3_INT_RAW_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U3_INT_RAW_S  3
+
+/** PCNT_INT_ST_REG register
+ *  Interrupt status register
+ */
+#define PCNT_INT_ST_REG (DR_REG_PCNT_BASE + 0x44)
+/** PCNT_CNT_THR_EVENT_U0_INT_ST : RO; bitpos: [0]; default: 0;
+ *  The masked interrupt status bit for the PCNT_CNT_THR_EVENT_U0_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U0_INT_ST    (BIT(0))
+#define PCNT_CNT_THR_EVENT_U0_INT_ST_M  (PCNT_CNT_THR_EVENT_U0_INT_ST_V << PCNT_CNT_THR_EVENT_U0_INT_ST_S)
+#define PCNT_CNT_THR_EVENT_U0_INT_ST_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U0_INT_ST_S  0
+/** PCNT_CNT_THR_EVENT_U1_INT_ST : RO; bitpos: [1]; default: 0;
+ *  The masked interrupt status bit for the PCNT_CNT_THR_EVENT_U1_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U1_INT_ST    (BIT(1))
+#define PCNT_CNT_THR_EVENT_U1_INT_ST_M  (PCNT_CNT_THR_EVENT_U1_INT_ST_V << PCNT_CNT_THR_EVENT_U1_INT_ST_S)
+#define PCNT_CNT_THR_EVENT_U1_INT_ST_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U1_INT_ST_S  1
+/** PCNT_CNT_THR_EVENT_U2_INT_ST : RO; bitpos: [2]; default: 0;
+ *  The masked interrupt status bit for the PCNT_CNT_THR_EVENT_U2_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U2_INT_ST    (BIT(2))
+#define PCNT_CNT_THR_EVENT_U2_INT_ST_M  (PCNT_CNT_THR_EVENT_U2_INT_ST_V << PCNT_CNT_THR_EVENT_U2_INT_ST_S)
+#define PCNT_CNT_THR_EVENT_U2_INT_ST_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U2_INT_ST_S  2
+/** PCNT_CNT_THR_EVENT_U3_INT_ST : RO; bitpos: [3]; default: 0;
+ *  The masked interrupt status bit for the PCNT_CNT_THR_EVENT_U3_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U3_INT_ST    (BIT(3))
+#define PCNT_CNT_THR_EVENT_U3_INT_ST_M  (PCNT_CNT_THR_EVENT_U3_INT_ST_V << PCNT_CNT_THR_EVENT_U3_INT_ST_S)
+#define PCNT_CNT_THR_EVENT_U3_INT_ST_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U3_INT_ST_S  3
+
+/** PCNT_INT_ENA_REG register
+ *  Interrupt enable register
+ */
+#define PCNT_INT_ENA_REG (DR_REG_PCNT_BASE + 0x48)
+/** PCNT_CNT_THR_EVENT_U0_INT_ENA : R/W; bitpos: [0]; default: 0;
+ *  The interrupt enable bit for the PCNT_CNT_THR_EVENT_U0_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U0_INT_ENA    (BIT(0))
+#define PCNT_CNT_THR_EVENT_U0_INT_ENA_M  (PCNT_CNT_THR_EVENT_U0_INT_ENA_V << PCNT_CNT_THR_EVENT_U0_INT_ENA_S)
+#define PCNT_CNT_THR_EVENT_U0_INT_ENA_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U0_INT_ENA_S  0
+/** PCNT_CNT_THR_EVENT_U1_INT_ENA : R/W; bitpos: [1]; default: 0;
+ *  The interrupt enable bit for the PCNT_CNT_THR_EVENT_U1_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U1_INT_ENA    (BIT(1))
+#define PCNT_CNT_THR_EVENT_U1_INT_ENA_M  (PCNT_CNT_THR_EVENT_U1_INT_ENA_V << PCNT_CNT_THR_EVENT_U1_INT_ENA_S)
+#define PCNT_CNT_THR_EVENT_U1_INT_ENA_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U1_INT_ENA_S  1
+/** PCNT_CNT_THR_EVENT_U2_INT_ENA : R/W; bitpos: [2]; default: 0;
+ *  The interrupt enable bit for the PCNT_CNT_THR_EVENT_U2_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U2_INT_ENA    (BIT(2))
+#define PCNT_CNT_THR_EVENT_U2_INT_ENA_M  (PCNT_CNT_THR_EVENT_U2_INT_ENA_V << PCNT_CNT_THR_EVENT_U2_INT_ENA_S)
+#define PCNT_CNT_THR_EVENT_U2_INT_ENA_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U2_INT_ENA_S  2
+/** PCNT_CNT_THR_EVENT_U3_INT_ENA : R/W; bitpos: [3]; default: 0;
+ *  The interrupt enable bit for the PCNT_CNT_THR_EVENT_U3_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U3_INT_ENA    (BIT(3))
+#define PCNT_CNT_THR_EVENT_U3_INT_ENA_M  (PCNT_CNT_THR_EVENT_U3_INT_ENA_V << PCNT_CNT_THR_EVENT_U3_INT_ENA_S)
+#define PCNT_CNT_THR_EVENT_U3_INT_ENA_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U3_INT_ENA_S  3
+
+/** PCNT_INT_CLR_REG register
+ *  Interrupt clear register
+ */
+#define PCNT_INT_CLR_REG (DR_REG_PCNT_BASE + 0x4c)
+/** PCNT_CNT_THR_EVENT_U0_INT_CLR : WO; bitpos: [0]; default: 0;
+ *  Set this bit to clear the PCNT_CNT_THR_EVENT_U0_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U0_INT_CLR    (BIT(0))
+#define PCNT_CNT_THR_EVENT_U0_INT_CLR_M  (PCNT_CNT_THR_EVENT_U0_INT_CLR_V << PCNT_CNT_THR_EVENT_U0_INT_CLR_S)
+#define PCNT_CNT_THR_EVENT_U0_INT_CLR_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U0_INT_CLR_S  0
+/** PCNT_CNT_THR_EVENT_U1_INT_CLR : WO; bitpos: [1]; default: 0;
+ *  Set this bit to clear the PCNT_CNT_THR_EVENT_U1_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U1_INT_CLR    (BIT(1))
+#define PCNT_CNT_THR_EVENT_U1_INT_CLR_M  (PCNT_CNT_THR_EVENT_U1_INT_CLR_V << PCNT_CNT_THR_EVENT_U1_INT_CLR_S)
+#define PCNT_CNT_THR_EVENT_U1_INT_CLR_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U1_INT_CLR_S  1
+/** PCNT_CNT_THR_EVENT_U2_INT_CLR : WO; bitpos: [2]; default: 0;
+ *  Set this bit to clear the PCNT_CNT_THR_EVENT_U2_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U2_INT_CLR    (BIT(2))
+#define PCNT_CNT_THR_EVENT_U2_INT_CLR_M  (PCNT_CNT_THR_EVENT_U2_INT_CLR_V << PCNT_CNT_THR_EVENT_U2_INT_CLR_S)
+#define PCNT_CNT_THR_EVENT_U2_INT_CLR_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U2_INT_CLR_S  2
+/** PCNT_CNT_THR_EVENT_U3_INT_CLR : WO; bitpos: [3]; default: 0;
+ *  Set this bit to clear the PCNT_CNT_THR_EVENT_U3_INT interrupt.
+ */
+#define PCNT_CNT_THR_EVENT_U3_INT_CLR    (BIT(3))
+#define PCNT_CNT_THR_EVENT_U3_INT_CLR_M  (PCNT_CNT_THR_EVENT_U3_INT_CLR_V << PCNT_CNT_THR_EVENT_U3_INT_CLR_S)
+#define PCNT_CNT_THR_EVENT_U3_INT_CLR_V  0x00000001U
+#define PCNT_CNT_THR_EVENT_U3_INT_CLR_S  3
+
+/** PCNT_U0_STATUS_REG register
+ *  PNCT UNIT0 status register
+ */
+#define PCNT_U0_STATUS_REG (DR_REG_PCNT_BASE + 0x50)
+/** PCNT_CNT_THR_ZERO_MODE_U0 : RO; bitpos: [1:0]; default: 0;
+ *  The pulse counter status of PCNT_U0 corresponding to 0. 0: pulse counter decreases
+ *  from positive to 0. 1: pulse counter increases from negative to 0. 2: pulse counter
+ *  is negative. 3: pulse counter is positive.
+ */
+#define PCNT_CNT_THR_ZERO_MODE_U0    0x00000003U
+#define PCNT_CNT_THR_ZERO_MODE_U0_M  (PCNT_CNT_THR_ZERO_MODE_U0_V << PCNT_CNT_THR_ZERO_MODE_U0_S)
+#define PCNT_CNT_THR_ZERO_MODE_U0_V  0x00000003U
+#define PCNT_CNT_THR_ZERO_MODE_U0_S  0
+/** PCNT_CNT_THR_THRES1_LAT_U0 : RO; bitpos: [2]; default: 0;
+ *  The latched value of thres1 event of PCNT_U0 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thres1 and thres1 event is valid. 0:
+ *  others
+ */
+#define PCNT_CNT_THR_THRES1_LAT_U0    (BIT(2))
+#define PCNT_CNT_THR_THRES1_LAT_U0_M  (PCNT_CNT_THR_THRES1_LAT_U0_V << PCNT_CNT_THR_THRES1_LAT_U0_S)
+#define PCNT_CNT_THR_THRES1_LAT_U0_V  0x00000001U
+#define PCNT_CNT_THR_THRES1_LAT_U0_S  2
+/** PCNT_CNT_THR_THRES0_LAT_U0 : RO; bitpos: [3]; default: 0;
+ *  The latched value of thres0 event of PCNT_U0 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thres0 and thres0 event is valid. 0:
+ *  others
+ */
+#define PCNT_CNT_THR_THRES0_LAT_U0    (BIT(3))
+#define PCNT_CNT_THR_THRES0_LAT_U0_M  (PCNT_CNT_THR_THRES0_LAT_U0_V << PCNT_CNT_THR_THRES0_LAT_U0_S)
+#define PCNT_CNT_THR_THRES0_LAT_U0_V  0x00000001U
+#define PCNT_CNT_THR_THRES0_LAT_U0_S  3
+/** PCNT_CNT_THR_L_LIM_LAT_U0 : RO; bitpos: [4]; default: 0;
+ *  The latched value of low limit event of PCNT_U0 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thr_l_lim and low limit event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_L_LIM_LAT_U0    (BIT(4))
+#define PCNT_CNT_THR_L_LIM_LAT_U0_M  (PCNT_CNT_THR_L_LIM_LAT_U0_V << PCNT_CNT_THR_L_LIM_LAT_U0_S)
+#define PCNT_CNT_THR_L_LIM_LAT_U0_V  0x00000001U
+#define PCNT_CNT_THR_L_LIM_LAT_U0_S  4
+/** PCNT_CNT_THR_H_LIM_LAT_U0 : RO; bitpos: [5]; default: 0;
+ *  The latched value of high limit event of PCNT_U0 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thr_h_lim and high limit event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_H_LIM_LAT_U0    (BIT(5))
+#define PCNT_CNT_THR_H_LIM_LAT_U0_M  (PCNT_CNT_THR_H_LIM_LAT_U0_V << PCNT_CNT_THR_H_LIM_LAT_U0_S)
+#define PCNT_CNT_THR_H_LIM_LAT_U0_V  0x00000001U
+#define PCNT_CNT_THR_H_LIM_LAT_U0_S  5
+/** PCNT_CNT_THR_ZERO_LAT_U0 : RO; bitpos: [6]; default: 0;
+ *  The latched value of zero threshold event of PCNT_U0 when threshold event interrupt
+ *  is valid. 1: the current pulse counter equals to 0 and zero threshold event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_ZERO_LAT_U0    (BIT(6))
+#define PCNT_CNT_THR_ZERO_LAT_U0_M  (PCNT_CNT_THR_ZERO_LAT_U0_V << PCNT_CNT_THR_ZERO_LAT_U0_S)
+#define PCNT_CNT_THR_ZERO_LAT_U0_V  0x00000001U
+#define PCNT_CNT_THR_ZERO_LAT_U0_S  6
+
+/** PCNT_U1_STATUS_REG register
+ *  PNCT UNIT1 status register
+ */
+#define PCNT_U1_STATUS_REG (DR_REG_PCNT_BASE + 0x54)
+/** PCNT_CNT_THR_ZERO_MODE_U1 : RO; bitpos: [1:0]; default: 0;
+ *  The pulse counter status of PCNT_U1 corresponding to 0. 0: pulse counter decreases
+ *  from positive to 0. 1: pulse counter increases from negative to 0. 2: pulse counter
+ *  is negative. 3: pulse counter is positive.
+ */
+#define PCNT_CNT_THR_ZERO_MODE_U1    0x00000003U
+#define PCNT_CNT_THR_ZERO_MODE_U1_M  (PCNT_CNT_THR_ZERO_MODE_U1_V << PCNT_CNT_THR_ZERO_MODE_U1_S)
+#define PCNT_CNT_THR_ZERO_MODE_U1_V  0x00000003U
+#define PCNT_CNT_THR_ZERO_MODE_U1_S  0
+/** PCNT_CNT_THR_THRES1_LAT_U1 : RO; bitpos: [2]; default: 0;
+ *  The latched value of thres1 event of PCNT_U1 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thres1 and thres1 event is valid. 0:
+ *  others
+ */
+#define PCNT_CNT_THR_THRES1_LAT_U1    (BIT(2))
+#define PCNT_CNT_THR_THRES1_LAT_U1_M  (PCNT_CNT_THR_THRES1_LAT_U1_V << PCNT_CNT_THR_THRES1_LAT_U1_S)
+#define PCNT_CNT_THR_THRES1_LAT_U1_V  0x00000001U
+#define PCNT_CNT_THR_THRES1_LAT_U1_S  2
+/** PCNT_CNT_THR_THRES0_LAT_U1 : RO; bitpos: [3]; default: 0;
+ *  The latched value of thres0 event of PCNT_U1 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thres0 and thres0 event is valid. 0:
+ *  others
+ */
+#define PCNT_CNT_THR_THRES0_LAT_U1    (BIT(3))
+#define PCNT_CNT_THR_THRES0_LAT_U1_M  (PCNT_CNT_THR_THRES0_LAT_U1_V << PCNT_CNT_THR_THRES0_LAT_U1_S)
+#define PCNT_CNT_THR_THRES0_LAT_U1_V  0x00000001U
+#define PCNT_CNT_THR_THRES0_LAT_U1_S  3
+/** PCNT_CNT_THR_L_LIM_LAT_U1 : RO; bitpos: [4]; default: 0;
+ *  The latched value of low limit event of PCNT_U1 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thr_l_lim and low limit event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_L_LIM_LAT_U1    (BIT(4))
+#define PCNT_CNT_THR_L_LIM_LAT_U1_M  (PCNT_CNT_THR_L_LIM_LAT_U1_V << PCNT_CNT_THR_L_LIM_LAT_U1_S)
+#define PCNT_CNT_THR_L_LIM_LAT_U1_V  0x00000001U
+#define PCNT_CNT_THR_L_LIM_LAT_U1_S  4
+/** PCNT_CNT_THR_H_LIM_LAT_U1 : RO; bitpos: [5]; default: 0;
+ *  The latched value of high limit event of PCNT_U1 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thr_h_lim and high limit event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_H_LIM_LAT_U1    (BIT(5))
+#define PCNT_CNT_THR_H_LIM_LAT_U1_M  (PCNT_CNT_THR_H_LIM_LAT_U1_V << PCNT_CNT_THR_H_LIM_LAT_U1_S)
+#define PCNT_CNT_THR_H_LIM_LAT_U1_V  0x00000001U
+#define PCNT_CNT_THR_H_LIM_LAT_U1_S  5
+/** PCNT_CNT_THR_ZERO_LAT_U1 : RO; bitpos: [6]; default: 0;
+ *  The latched value of zero threshold event of PCNT_U1 when threshold event interrupt
+ *  is valid. 1: the current pulse counter equals to 0 and zero threshold event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_ZERO_LAT_U1    (BIT(6))
+#define PCNT_CNT_THR_ZERO_LAT_U1_M  (PCNT_CNT_THR_ZERO_LAT_U1_V << PCNT_CNT_THR_ZERO_LAT_U1_S)
+#define PCNT_CNT_THR_ZERO_LAT_U1_V  0x00000001U
+#define PCNT_CNT_THR_ZERO_LAT_U1_S  6
+
+/** PCNT_U2_STATUS_REG register
+ *  PNCT UNIT2 status register
+ */
+#define PCNT_U2_STATUS_REG (DR_REG_PCNT_BASE + 0x58)
+/** PCNT_CNT_THR_ZERO_MODE_U2 : RO; bitpos: [1:0]; default: 0;
+ *  The pulse counter status of PCNT_U2 corresponding to 0. 0: pulse counter decreases
+ *  from positive to 0. 1: pulse counter increases from negative to 0. 2: pulse counter
+ *  is negative. 3: pulse counter is positive.
+ */
+#define PCNT_CNT_THR_ZERO_MODE_U2    0x00000003U
+#define PCNT_CNT_THR_ZERO_MODE_U2_M  (PCNT_CNT_THR_ZERO_MODE_U2_V << PCNT_CNT_THR_ZERO_MODE_U2_S)
+#define PCNT_CNT_THR_ZERO_MODE_U2_V  0x00000003U
+#define PCNT_CNT_THR_ZERO_MODE_U2_S  0
+/** PCNT_CNT_THR_THRES1_LAT_U2 : RO; bitpos: [2]; default: 0;
+ *  The latched value of thres1 event of PCNT_U2 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thres1 and thres1 event is valid. 0:
+ *  others
+ */
+#define PCNT_CNT_THR_THRES1_LAT_U2    (BIT(2))
+#define PCNT_CNT_THR_THRES1_LAT_U2_M  (PCNT_CNT_THR_THRES1_LAT_U2_V << PCNT_CNT_THR_THRES1_LAT_U2_S)
+#define PCNT_CNT_THR_THRES1_LAT_U2_V  0x00000001U
+#define PCNT_CNT_THR_THRES1_LAT_U2_S  2
+/** PCNT_CNT_THR_THRES0_LAT_U2 : RO; bitpos: [3]; default: 0;
+ *  The latched value of thres0 event of PCNT_U2 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thres0 and thres0 event is valid. 0:
+ *  others
+ */
+#define PCNT_CNT_THR_THRES0_LAT_U2    (BIT(3))
+#define PCNT_CNT_THR_THRES0_LAT_U2_M  (PCNT_CNT_THR_THRES0_LAT_U2_V << PCNT_CNT_THR_THRES0_LAT_U2_S)
+#define PCNT_CNT_THR_THRES0_LAT_U2_V  0x00000001U
+#define PCNT_CNT_THR_THRES0_LAT_U2_S  3
+/** PCNT_CNT_THR_L_LIM_LAT_U2 : RO; bitpos: [4]; default: 0;
+ *  The latched value of low limit event of PCNT_U2 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thr_l_lim and low limit event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_L_LIM_LAT_U2    (BIT(4))
+#define PCNT_CNT_THR_L_LIM_LAT_U2_M  (PCNT_CNT_THR_L_LIM_LAT_U2_V << PCNT_CNT_THR_L_LIM_LAT_U2_S)
+#define PCNT_CNT_THR_L_LIM_LAT_U2_V  0x00000001U
+#define PCNT_CNT_THR_L_LIM_LAT_U2_S  4
+/** PCNT_CNT_THR_H_LIM_LAT_U2 : RO; bitpos: [5]; default: 0;
+ *  The latched value of high limit event of PCNT_U2 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thr_h_lim and high limit event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_H_LIM_LAT_U2    (BIT(5))
+#define PCNT_CNT_THR_H_LIM_LAT_U2_M  (PCNT_CNT_THR_H_LIM_LAT_U2_V << PCNT_CNT_THR_H_LIM_LAT_U2_S)
+#define PCNT_CNT_THR_H_LIM_LAT_U2_V  0x00000001U
+#define PCNT_CNT_THR_H_LIM_LAT_U2_S  5
+/** PCNT_CNT_THR_ZERO_LAT_U2 : RO; bitpos: [6]; default: 0;
+ *  The latched value of zero threshold event of PCNT_U2 when threshold event interrupt
+ *  is valid. 1: the current pulse counter equals to 0 and zero threshold event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_ZERO_LAT_U2    (BIT(6))
+#define PCNT_CNT_THR_ZERO_LAT_U2_M  (PCNT_CNT_THR_ZERO_LAT_U2_V << PCNT_CNT_THR_ZERO_LAT_U2_S)
+#define PCNT_CNT_THR_ZERO_LAT_U2_V  0x00000001U
+#define PCNT_CNT_THR_ZERO_LAT_U2_S  6
+
+/** PCNT_U3_STATUS_REG register
+ *  PNCT UNIT3 status register
+ */
+#define PCNT_U3_STATUS_REG (DR_REG_PCNT_BASE + 0x5c)
+/** PCNT_CNT_THR_ZERO_MODE_U3 : RO; bitpos: [1:0]; default: 0;
+ *  The pulse counter status of PCNT_U3 corresponding to 0. 0: pulse counter decreases
+ *  from positive to 0. 1: pulse counter increases from negative to 0. 2: pulse counter
+ *  is negative. 3: pulse counter is positive.
+ */
+#define PCNT_CNT_THR_ZERO_MODE_U3    0x00000003U
+#define PCNT_CNT_THR_ZERO_MODE_U3_M  (PCNT_CNT_THR_ZERO_MODE_U3_V << PCNT_CNT_THR_ZERO_MODE_U3_S)
+#define PCNT_CNT_THR_ZERO_MODE_U3_V  0x00000003U
+#define PCNT_CNT_THR_ZERO_MODE_U3_S  0
+/** PCNT_CNT_THR_THRES1_LAT_U3 : RO; bitpos: [2]; default: 0;
+ *  The latched value of thres1 event of PCNT_U3 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thres1 and thres1 event is valid. 0:
+ *  others
+ */
+#define PCNT_CNT_THR_THRES1_LAT_U3    (BIT(2))
+#define PCNT_CNT_THR_THRES1_LAT_U3_M  (PCNT_CNT_THR_THRES1_LAT_U3_V << PCNT_CNT_THR_THRES1_LAT_U3_S)
+#define PCNT_CNT_THR_THRES1_LAT_U3_V  0x00000001U
+#define PCNT_CNT_THR_THRES1_LAT_U3_S  2
+/** PCNT_CNT_THR_THRES0_LAT_U3 : RO; bitpos: [3]; default: 0;
+ *  The latched value of thres0 event of PCNT_U3 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thres0 and thres0 event is valid. 0:
+ *  others
+ */
+#define PCNT_CNT_THR_THRES0_LAT_U3    (BIT(3))
+#define PCNT_CNT_THR_THRES0_LAT_U3_M  (PCNT_CNT_THR_THRES0_LAT_U3_V << PCNT_CNT_THR_THRES0_LAT_U3_S)
+#define PCNT_CNT_THR_THRES0_LAT_U3_V  0x00000001U
+#define PCNT_CNT_THR_THRES0_LAT_U3_S  3
+/** PCNT_CNT_THR_L_LIM_LAT_U3 : RO; bitpos: [4]; default: 0;
+ *  The latched value of low limit event of PCNT_U3 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thr_l_lim and low limit event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_L_LIM_LAT_U3    (BIT(4))
+#define PCNT_CNT_THR_L_LIM_LAT_U3_M  (PCNT_CNT_THR_L_LIM_LAT_U3_V << PCNT_CNT_THR_L_LIM_LAT_U3_S)
+#define PCNT_CNT_THR_L_LIM_LAT_U3_V  0x00000001U
+#define PCNT_CNT_THR_L_LIM_LAT_U3_S  4
+/** PCNT_CNT_THR_H_LIM_LAT_U3 : RO; bitpos: [5]; default: 0;
+ *  The latched value of high limit event of PCNT_U3 when threshold event interrupt is
+ *  valid. 1: the current pulse counter equals to thr_h_lim and high limit event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_H_LIM_LAT_U3    (BIT(5))
+#define PCNT_CNT_THR_H_LIM_LAT_U3_M  (PCNT_CNT_THR_H_LIM_LAT_U3_V << PCNT_CNT_THR_H_LIM_LAT_U3_S)
+#define PCNT_CNT_THR_H_LIM_LAT_U3_V  0x00000001U
+#define PCNT_CNT_THR_H_LIM_LAT_U3_S  5
+/** PCNT_CNT_THR_ZERO_LAT_U3 : RO; bitpos: [6]; default: 0;
+ *  The latched value of zero threshold event of PCNT_U3 when threshold event interrupt
+ *  is valid. 1: the current pulse counter equals to 0 and zero threshold event is
+ *  valid. 0: others
+ */
+#define PCNT_CNT_THR_ZERO_LAT_U3    (BIT(6))
+#define PCNT_CNT_THR_ZERO_LAT_U3_M  (PCNT_CNT_THR_ZERO_LAT_U3_V << PCNT_CNT_THR_ZERO_LAT_U3_S)
+#define PCNT_CNT_THR_ZERO_LAT_U3_V  0x00000001U
+#define PCNT_CNT_THR_ZERO_LAT_U3_S  6
+
+/** PCNT_CTRL_REG register
+ *  Control register for all counters
+ */
+#define PCNT_CTRL_REG (DR_REG_PCNT_BASE + 0x60)
+/** PCNT_PULSE_CNT_RST_U0 : R/W; bitpos: [0]; default: 1;
+ *  Set this bit to clear unit 0's counter.
+ */
+#define PCNT_PULSE_CNT_RST_U0    (BIT(0))
+#define PCNT_PULSE_CNT_RST_U0_M  (PCNT_PULSE_CNT_RST_U0_V << PCNT_PULSE_CNT_RST_U0_S)
+#define PCNT_PULSE_CNT_RST_U0_V  0x00000001U
+#define PCNT_PULSE_CNT_RST_U0_S  0
+/** PCNT_CNT_PAUSE_U0 : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to freeze unit 0's counter.
+ */
+#define PCNT_CNT_PAUSE_U0    (BIT(1))
+#define PCNT_CNT_PAUSE_U0_M  (PCNT_CNT_PAUSE_U0_V << PCNT_CNT_PAUSE_U0_S)
+#define PCNT_CNT_PAUSE_U0_V  0x00000001U
+#define PCNT_CNT_PAUSE_U0_S  1
+/** PCNT_PULSE_CNT_RST_U1 : R/W; bitpos: [2]; default: 1;
+ *  Set this bit to clear unit 1's counter.
+ */
+#define PCNT_PULSE_CNT_RST_U1    (BIT(2))
+#define PCNT_PULSE_CNT_RST_U1_M  (PCNT_PULSE_CNT_RST_U1_V << PCNT_PULSE_CNT_RST_U1_S)
+#define PCNT_PULSE_CNT_RST_U1_V  0x00000001U
+#define PCNT_PULSE_CNT_RST_U1_S  2
+/** PCNT_CNT_PAUSE_U1 : R/W; bitpos: [3]; default: 0;
+ *  Set this bit to freeze unit 1's counter.
+ */
+#define PCNT_CNT_PAUSE_U1    (BIT(3))
+#define PCNT_CNT_PAUSE_U1_M  (PCNT_CNT_PAUSE_U1_V << PCNT_CNT_PAUSE_U1_S)
+#define PCNT_CNT_PAUSE_U1_V  0x00000001U
+#define PCNT_CNT_PAUSE_U1_S  3
+/** PCNT_PULSE_CNT_RST_U2 : R/W; bitpos: [4]; default: 1;
+ *  Set this bit to clear unit 2's counter.
+ */
+#define PCNT_PULSE_CNT_RST_U2    (BIT(4))
+#define PCNT_PULSE_CNT_RST_U2_M  (PCNT_PULSE_CNT_RST_U2_V << PCNT_PULSE_CNT_RST_U2_S)
+#define PCNT_PULSE_CNT_RST_U2_V  0x00000001U
+#define PCNT_PULSE_CNT_RST_U2_S  4
+/** PCNT_CNT_PAUSE_U2 : R/W; bitpos: [5]; default: 0;
+ *  Set this bit to freeze unit 2's counter.
+ */
+#define PCNT_CNT_PAUSE_U2    (BIT(5))
+#define PCNT_CNT_PAUSE_U2_M  (PCNT_CNT_PAUSE_U2_V << PCNT_CNT_PAUSE_U2_S)
+#define PCNT_CNT_PAUSE_U2_V  0x00000001U
+#define PCNT_CNT_PAUSE_U2_S  5
+/** PCNT_PULSE_CNT_RST_U3 : R/W; bitpos: [6]; default: 1;
+ *  Set this bit to clear unit 3's counter.
+ */
+#define PCNT_PULSE_CNT_RST_U3    (BIT(6))
+#define PCNT_PULSE_CNT_RST_U3_M  (PCNT_PULSE_CNT_RST_U3_V << PCNT_PULSE_CNT_RST_U3_S)
+#define PCNT_PULSE_CNT_RST_U3_V  0x00000001U
+#define PCNT_PULSE_CNT_RST_U3_S  6
+/** PCNT_CNT_PAUSE_U3 : R/W; bitpos: [7]; default: 0;
+ *  Set this bit to freeze unit 3's counter.
+ */
+#define PCNT_CNT_PAUSE_U3    (BIT(7))
+#define PCNT_CNT_PAUSE_U3_M  (PCNT_CNT_PAUSE_U3_V << PCNT_CNT_PAUSE_U3_S)
+#define PCNT_CNT_PAUSE_U3_V  0x00000001U
+#define PCNT_CNT_PAUSE_U3_S  7
+/** PCNT_CLK_EN : R/W; bitpos: [16]; default: 0;
+ *  The registers clock gate enable signal of PCNT module. 1: the registers can be read
+ *  and written by application. 0: the registers can not be read or written by
+ *  application
+ */
+#define PCNT_CLK_EN    (BIT(16))
+#define PCNT_CLK_EN_M  (PCNT_CLK_EN_V << PCNT_CLK_EN_S)
+#define PCNT_CLK_EN_V  0x00000001U
+#define PCNT_CLK_EN_S  16
+
+/** PCNT_DATE_REG register
+ *  PCNT version control register
+ */
+#define PCNT_DATE_REG (DR_REG_PCNT_BASE + 0xfc)
+/** PCNT_DATE : R/W; bitpos: [31:0]; default: 419898881;
+ *  This is the PCNT version control register.
+ */
+#define PCNT_DATE    0xFFFFFFFFU
+#define PCNT_DATE_M  (PCNT_DATE_V << PCNT_DATE_S)
+#define PCNT_DATE_V  0xFFFFFFFFU
+#define PCNT_DATE_S  0
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/pcnt_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/pcnt_struct.h
new file mode 100644
index 00000000000..1d65a7309bf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/pcnt_struct.h
@@ -0,0 +1,416 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Group: Configuration Register */
+/** Type of un_conf0 register
+ *  Configuration register 0 for unit n
+ */
+typedef union {
+    struct {
+        /** filter_thres_un : R/W; bitpos: [9:0]; default: 16;
+         *  This sets the maximum threshold, in APB_CLK cycles, for the filter.
+         *
+         *  Any pulses with width less than this will be ignored when the filter is enabled.
+         */
+        uint32_t filter_thres_un: 10;
+        /** filter_en_un : R/W; bitpos: [10]; default: 1;
+         *  This is the enable bit for unit n's input filter.
+         */
+        uint32_t filter_en_un: 1;
+        /** thr_zero_en_un : R/W; bitpos: [11]; default: 1;
+         *  This is the enable bit for unit n's zero comparator.
+         */
+        uint32_t thr_zero_en_un: 1;
+        /** thr_h_lim_en_un : R/W; bitpos: [12]; default: 1;
+         *  This is the enable bit for unit n's thr_h_lim comparator.
+         */
+        uint32_t thr_h_lim_en_un: 1;
+        /** thr_l_lim_en_un : R/W; bitpos: [13]; default: 1;
+         *  This is the enable bit for unit n's thr_l_lim comparator.
+         */
+        uint32_t thr_l_lim_en_un: 1;
+        /** thr_thres0_en_un : R/W; bitpos: [14]; default: 0;
+         *  This is the enable bit for unit n's thres0 comparator.
+         */
+        uint32_t thr_thres0_en_un: 1;
+        /** thr_thres1_en_un : R/W; bitpos: [15]; default: 0;
+         *  This is the enable bit for unit n's thres1 comparator.
+         */
+        uint32_t thr_thres1_en_un: 1;
+        /** ch0_neg_mode_un : R/W; bitpos: [17:16]; default: 0;
+         *  This register sets the behavior when the signal input of channel 0 detects a
+         *  negative edge.
+         *
+         *  1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter
+         */
+        uint32_t ch0_neg_mode_un: 2;
+        /** ch0_pos_mode_un : R/W; bitpos: [19:18]; default: 0;
+         *  This register sets the behavior when the signal input of channel 0 detects a
+         *  positive edge.
+         *
+         *  1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter
+         */
+        uint32_t ch0_pos_mode_un: 2;
+        /** ch0_hctrl_mode_un : R/W; bitpos: [21:20]; default: 0;
+         *  This register configures how the CHn_POS_MODE/CHn_NEG_MODE settings will be
+         *  modified when the control signal is high.
+         *
+         *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+         *  increase);2, 3: Inhibit counter modification
+         */
+        uint32_t ch0_hctrl_mode_un: 2;
+        /** ch0_lctrl_mode_un : R/W; bitpos: [23:22]; default: 0;
+         *  This register configures how the CHn_POS_MODE/CHn_NEG_MODE settings will be
+         *  modified when the control signal is low.
+         *
+         *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+         *  increase);2, 3: Inhibit counter modification
+         */
+        uint32_t ch0_lctrl_mode_un: 2;
+        /** ch1_neg_mode_un : R/W; bitpos: [25:24]; default: 0;
+         *  This register sets the behavior when the signal input of channel 1 detects a
+         *  negative edge.
+         *
+         *  1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter
+         */
+        uint32_t ch1_neg_mode_un: 2;
+        /** ch1_pos_mode_un : R/W; bitpos: [27:26]; default: 0;
+         *  This register sets the behavior when the signal input of channel 1 detects a
+         *  positive edge.
+         *
+         *  1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter
+         */
+        uint32_t ch1_pos_mode_un: 2;
+        /** ch1_hctrl_mode_un : R/W; bitpos: [29:28]; default: 0;
+         *  This register configures how the CHn_POS_MODE/CHn_NEG_MODE settings will be
+         *  modified when the control signal is high.
+         *
+         *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+         *  increase);2, 3: Inhibit counter modification
+         */
+        uint32_t ch1_hctrl_mode_un: 2;
+        /** ch1_lctrl_mode_un : R/W; bitpos: [31:30]; default: 0;
+         *  This register configures how the CHn_POS_MODE/CHn_NEG_MODE settings will be
+         *  modified when the control signal is low.
+         *
+         *  0: No modification;1: Invert behavior (increase -> decrease, decrease ->
+         *  increase);2, 3: Inhibit counter modification
+         */
+        uint32_t ch1_lctrl_mode_un: 2;
+    };
+    uint32_t val;
+} pcnt_un_conf0_reg_t;
+
+/** Type of un_conf1 register
+ *  Configuration register 1 for unit n
+ */
+typedef union {
+    struct {
+        /** cnt_thres0_un : R/W; bitpos: [15:0]; default: 0;
+         *  This register is used to configure the thres0 value for unit n.
+         */
+        uint32_t cnt_thres0_un: 16;
+        /** cnt_thres1_un : R/W; bitpos: [31:16]; default: 0;
+         *  This register is used to configure the thres1 value for unit n.
+         */
+        uint32_t cnt_thres1_un: 16;
+    };
+    uint32_t val;
+} pcnt_un_conf1_reg_t;
+
+/** Type of un_conf2 register
+ *  Configuration register 2 for unit n
+ */
+typedef union {
+    struct {
+        /** cnt_h_lim_un : R/W; bitpos: [15:0]; default: 0;
+         *  This register is used to configure the thr_h_lim value for unit n.
+         */
+        uint32_t cnt_h_lim_un: 16;
+        /** cnt_l_lim_un : R/W; bitpos: [31:16]; default: 0;
+         *  This register is used to configure the thr_l_lim value for unit n.
+         */
+        uint32_t cnt_l_lim_un: 16;
+    };
+    uint32_t val;
+} pcnt_un_conf2_reg_t;
+
+
+/** Type of ctrl register
+ *  Control register for all counters
+ */
+typedef union {
+    struct {
+        /** pulse_cnt_rst_u0 : R/W; bitpos: [0]; default: 1;
+         *  Set this bit to clear unit 0's counter.
+         */
+        uint32_t pulse_cnt_rst_u0: 1;
+        /** cnt_pause_u0 : R/W; bitpos: [1]; default: 0;
+         *  Set this bit to freeze unit 0's counter.
+         */
+        uint32_t cnt_pause_u0: 1;
+        /** pulse_cnt_rst_u1 : R/W; bitpos: [2]; default: 1;
+         *  Set this bit to clear unit 1's counter.
+         */
+        uint32_t pulse_cnt_rst_u1: 1;
+        /** cnt_pause_u1 : R/W; bitpos: [3]; default: 0;
+         *  Set this bit to freeze unit 1's counter.
+         */
+        uint32_t cnt_pause_u1: 1;
+        /** pulse_cnt_rst_u2 : R/W; bitpos: [4]; default: 1;
+         *  Set this bit to clear unit 2's counter.
+         */
+        uint32_t pulse_cnt_rst_u2: 1;
+        /** cnt_pause_u2 : R/W; bitpos: [5]; default: 0;
+         *  Set this bit to freeze unit 2's counter.
+         */
+        uint32_t cnt_pause_u2: 1;
+        /** pulse_cnt_rst_u3 : R/W; bitpos: [6]; default: 1;
+         *  Set this bit to clear unit 3's counter.
+         */
+        uint32_t pulse_cnt_rst_u3: 1;
+        /** cnt_pause_u3 : R/W; bitpos: [7]; default: 0;
+         *  Set this bit to freeze unit 3's counter.
+         */
+        uint32_t cnt_pause_u3: 1;
+        uint32_t reserved_8: 8;
+        /** clk_en : R/W; bitpos: [16]; default: 0;
+         *  The registers clock gate enable signal of PCNT module. 1: the registers can be read
+         *  and written by application. 0: the registers can not be read or written by
+         *  application
+         */
+        uint32_t clk_en: 1;
+        uint32_t reserved_17: 15;
+    };
+    uint32_t val;
+} pcnt_ctrl_reg_t;
+
+
+/** Group: Status Register */
+/** Type of un_cnt register
+ *  Counter value for unit n
+ */
+typedef union {
+    struct {
+        /** pulse_cnt_un : RO; bitpos: [15:0]; default: 0;
+         *  This register stores the current pulse count value for unit n.
+         */
+        uint32_t pulse_cnt_un: 16;
+        uint32_t reserved_16: 16;
+    };
+    uint32_t val;
+} pcnt_un_cnt_reg_t;
+
+/** Type of un_status register
+ *  PNCT UNITn status register
+ */
+typedef union {
+    struct {
+        /** cnt_thr_zero_mode_un : RO; bitpos: [1:0]; default: 0;
+         *  The pulse counter status of PCNT_Un corresponding to 0. 0: pulse counter decreases
+         *  from positive to 0. 1: pulse counter increases from negative to 0. 2: pulse counter
+         *  is negative. 3: pulse counter is positive.
+         */
+        uint32_t cnt_thr_zero_mode_un: 2;
+        /** cnt_thr_thres1_lat_un : RO; bitpos: [2]; default: 0;
+         *  The latched value of thres1 event of PCNT_Un when threshold event interrupt is
+         *  valid. 1: the current pulse counter equals to thres1 and thres1 event is valid. 0:
+         *  others
+         */
+        uint32_t cnt_thr_thres1_lat_un: 1;
+        /** cnt_thr_thres0_lat_un : RO; bitpos: [3]; default: 0;
+         *  The latched value of thres0 event of PCNT_Un when threshold event interrupt is
+         *  valid. 1: the current pulse counter equals to thres0 and thres0 event is valid. 0:
+         *  others
+         */
+        uint32_t cnt_thr_thres0_lat_un: 1;
+        /** cnt_thr_l_lim_lat_un : RO; bitpos: [4]; default: 0;
+         *  The latched value of low limit event of PCNT_Un when threshold event interrupt is
+         *  valid. 1: the current pulse counter equals to thr_l_lim and low limit event is
+         *  valid. 0: others
+         */
+        uint32_t cnt_thr_l_lim_lat_un: 1;
+        /** cnt_thr_h_lim_lat_un : RO; bitpos: [5]; default: 0;
+         *  The latched value of high limit event of PCNT_Un when threshold event interrupt is
+         *  valid. 1: the current pulse counter equals to thr_h_lim and high limit event is
+         *  valid. 0: others
+         */
+        uint32_t cnt_thr_h_lim_lat_un: 1;
+        /** cnt_thr_zero_lat_un : RO; bitpos: [6]; default: 0;
+         *  The latched value of zero threshold event of PCNT_Un when threshold event interrupt
+         *  is valid. 1: the current pulse counter equals to 0 and zero threshold event is
+         *  valid. 0: others
+         */
+        uint32_t cnt_thr_zero_lat_un: 1;
+        uint32_t reserved_7: 25;
+    };
+    uint32_t val;
+} pcnt_un_status_reg_t;
+
+
+/** Group: Interrupt Register */
+/** Type of int_raw register
+ *  Interrupt raw status register
+ */
+typedef union {
+    struct {
+        /** cnt_thr_event_u0_int_raw : RO; bitpos: [0]; default: 0;
+         *  The raw interrupt status bit for the PCNT_CNT_THR_EVENT_U0_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u0_int_raw: 1;
+        /** cnt_thr_event_u1_int_raw : RO; bitpos: [1]; default: 0;
+         *  The raw interrupt status bit for the PCNT_CNT_THR_EVENT_U1_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u1_int_raw: 1;
+        /** cnt_thr_event_u2_int_raw : RO; bitpos: [2]; default: 0;
+         *  The raw interrupt status bit for the PCNT_CNT_THR_EVENT_U2_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u2_int_raw: 1;
+        /** cnt_thr_event_u3_int_raw : RO; bitpos: [3]; default: 0;
+         *  The raw interrupt status bit for the PCNT_CNT_THR_EVENT_U3_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u3_int_raw: 1;
+        uint32_t reserved_4: 28;
+    };
+    uint32_t val;
+} pcnt_int_raw_reg_t;
+
+/** Type of int_st register
+ *  Interrupt status register
+ */
+typedef union {
+    struct {
+        /** cnt_thr_event_u0_int_st : RO; bitpos: [0]; default: 0;
+         *  The masked interrupt status bit for the PCNT_CNT_THR_EVENT_U0_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u0_int_st: 1;
+        /** cnt_thr_event_u1_int_st : RO; bitpos: [1]; default: 0;
+         *  The masked interrupt status bit for the PCNT_CNT_THR_EVENT_U1_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u1_int_st: 1;
+        /** cnt_thr_event_u2_int_st : RO; bitpos: [2]; default: 0;
+         *  The masked interrupt status bit for the PCNT_CNT_THR_EVENT_U2_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u2_int_st: 1;
+        /** cnt_thr_event_u3_int_st : RO; bitpos: [3]; default: 0;
+         *  The masked interrupt status bit for the PCNT_CNT_THR_EVENT_U3_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u3_int_st: 1;
+        uint32_t reserved_4: 28;
+    };
+    uint32_t val;
+} pcnt_int_st_reg_t;
+
+/** Type of int_ena register
+ *  Interrupt enable register
+ */
+typedef union {
+    struct {
+        /** cnt_thr_event_u0_int_ena : R/W; bitpos: [0]; default: 0;
+         *  The interrupt enable bit for the PCNT_CNT_THR_EVENT_U0_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u0_int_ena: 1;
+        /** cnt_thr_event_u1_int_ena : R/W; bitpos: [1]; default: 0;
+         *  The interrupt enable bit for the PCNT_CNT_THR_EVENT_U1_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u1_int_ena: 1;
+        /** cnt_thr_event_u2_int_ena : R/W; bitpos: [2]; default: 0;
+         *  The interrupt enable bit for the PCNT_CNT_THR_EVENT_U2_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u2_int_ena: 1;
+        /** cnt_thr_event_u3_int_ena : R/W; bitpos: [3]; default: 0;
+         *  The interrupt enable bit for the PCNT_CNT_THR_EVENT_U3_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u3_int_ena: 1;
+        uint32_t reserved_4: 28;
+    };
+    uint32_t val;
+} pcnt_int_ena_reg_t;
+
+/** Type of int_clr register
+ *  Interrupt clear register
+ */
+typedef union {
+    struct {
+        /** cnt_thr_event_u0_int_clr : WO; bitpos: [0]; default: 0;
+         *  Set this bit to clear the PCNT_CNT_THR_EVENT_U0_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u0_int_clr: 1;
+        /** cnt_thr_event_u1_int_clr : WO; bitpos: [1]; default: 0;
+         *  Set this bit to clear the PCNT_CNT_THR_EVENT_U1_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u1_int_clr: 1;
+        /** cnt_thr_event_u2_int_clr : WO; bitpos: [2]; default: 0;
+         *  Set this bit to clear the PCNT_CNT_THR_EVENT_U2_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u2_int_clr: 1;
+        /** cnt_thr_event_u3_int_clr : WO; bitpos: [3]; default: 0;
+         *  Set this bit to clear the PCNT_CNT_THR_EVENT_U3_INT interrupt.
+         */
+        uint32_t cnt_thr_event_u3_int_clr: 1;
+        uint32_t reserved_4: 28;
+    };
+    uint32_t val;
+} pcnt_int_clr_reg_t;
+
+
+/** Group: Version Register */
+/** Type of date register
+ *  PCNT version control register
+ */
+typedef union {
+    struct {
+        /** date : R/W; bitpos: [31:0]; default: 419898881;
+         *  This is the PCNT version control register.
+         */
+        uint32_t date: 32;
+    };
+    uint32_t val;
+} pcnt_date_reg_t;
+
+
+typedef struct {
+    volatile struct {
+        pcnt_un_conf0_reg_t conf0;
+        pcnt_un_conf1_reg_t conf1;
+        pcnt_un_conf2_reg_t conf2;
+    } conf_unit[4];
+    volatile pcnt_un_cnt_reg_t cnt_unit[4];
+    volatile pcnt_int_raw_reg_t int_raw;
+    volatile pcnt_int_st_reg_t int_st;
+    volatile pcnt_int_ena_reg_t int_ena;
+    volatile pcnt_int_clr_reg_t int_clr;
+    volatile pcnt_un_status_reg_t status_unit[4];
+    volatile pcnt_ctrl_reg_t ctrl;
+    uint32_t reserved_064[38];
+    volatile pcnt_date_reg_t date;
+} pcnt_dev_t;
+
+#ifndef __cplusplus
+_Static_assert(sizeof(pcnt_dev_t) == 0x100, "Invalid size of pcnt_dev_t structure");
+#endif
+
+extern pcnt_dev_t PCNT;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/peri_backup_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/peri_backup_reg.h
new file mode 100644
index 00000000000..71907355b0c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/peri_backup_reg.h
@@ -0,0 +1,198 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_PERI_BACKUP_REG_H_
+#define _SOC_PERI_BACKUP_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define PERI_BACKUP_CONFIG_REG          (DR_REG_PERI_BACKUP_BASE + 0x0)
+/* PERI_BACKUP_ENA : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define PERI_BACKUP_ENA    (BIT(31))
+#define PERI_BACKUP_ENA_M  (BIT(31))
+#define PERI_BACKUP_ENA_V  0x1
+#define PERI_BACKUP_ENA_S  31
+/* PERI_BACKUP_TO_MEM : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: .*/
+#define PERI_BACKUP_TO_MEM    (BIT(30))
+#define PERI_BACKUP_TO_MEM_M  (BIT(30))
+#define PERI_BACKUP_TO_MEM_V  0x1
+#define PERI_BACKUP_TO_MEM_S  30
+/* PERI_BACKUP_START : WT ;bitpos:[29] ;default: 1'b0 ; */
+/*description: .*/
+#define PERI_BACKUP_START    (BIT(29))
+#define PERI_BACKUP_START_M  (BIT(29))
+#define PERI_BACKUP_START_V  0x1
+#define PERI_BACKUP_START_S  29
+/* PERI_BACKUP_SIZE : R/W ;bitpos:[28:19] ;default: 10'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_SIZE    0x000003FF
+#define PERI_BACKUP_SIZE_M  ((PERI_BACKUP_SIZE_V)<<(PERI_BACKUP_SIZE_S))
+#define PERI_BACKUP_SIZE_V  0x3FF
+#define PERI_BACKUP_SIZE_S  19
+/* PERI_BACKUP_TOUT_THRES : R/W ;bitpos:[18:9] ;default: 10'd50 ; */
+/*description: .*/
+#define PERI_BACKUP_TOUT_THRES    0x000003FF
+#define PERI_BACKUP_TOUT_THRES_M  ((PERI_BACKUP_TOUT_THRES_V)<<(PERI_BACKUP_TOUT_THRES_S))
+#define PERI_BACKUP_TOUT_THRES_V  0x3FF
+#define PERI_BACKUP_TOUT_THRES_S  9
+/* PERI_BACKUP_BURST_LIMIT : R/W ;bitpos:[8:4] ;default: 5'd8 ; */
+/*description: .*/
+#define PERI_BACKUP_BURST_LIMIT    0x0000001F
+#define PERI_BACKUP_BURST_LIMIT_M  ((PERI_BACKUP_BURST_LIMIT_V)<<(PERI_BACKUP_BURST_LIMIT_S))
+#define PERI_BACKUP_BURST_LIMIT_V  0x1F
+#define PERI_BACKUP_BURST_LIMIT_S  4
+/* PERI_BACKUP_ADDR_MAP_MODE : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define PERI_BACKUP_ADDR_MAP_MODE    (BIT(3))
+#define PERI_BACKUP_ADDR_MAP_MODE_M  (BIT(3))
+#define PERI_BACKUP_ADDR_MAP_MODE_V  0x1
+#define PERI_BACKUP_ADDR_MAP_MODE_S  3
+/* PERI_BACKUP_FLOW_ERR : RO ;bitpos:[2:0] ;default: 3'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_FLOW_ERR    0x00000007
+#define PERI_BACKUP_FLOW_ERR_M  ((PERI_BACKUP_FLOW_ERR_V)<<(PERI_BACKUP_FLOW_ERR_S))
+#define PERI_BACKUP_FLOW_ERR_V  0x7
+#define PERI_BACKUP_FLOW_ERR_S  0
+
+#define PERI_BACKUP_APB_ADDR_REG          (DR_REG_PERI_BACKUP_BASE + 0x4)
+/* PERI_BACKUP_APB_START_ADDR : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_APB_START_ADDR    0xFFFFFFFF
+#define PERI_BACKUP_APB_START_ADDR_M  ((PERI_BACKUP_APB_START_ADDR_V)<<(PERI_BACKUP_APB_START_ADDR_S))
+#define PERI_BACKUP_APB_START_ADDR_V  0xFFFFFFFF
+#define PERI_BACKUP_APB_START_ADDR_S  0
+
+#define PERI_BACKUP_MEM_ADDR_REG          (DR_REG_PERI_BACKUP_BASE + 0x8)
+/* PERI_BACKUP_MEM_START_ADDR : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_MEM_START_ADDR    0xFFFFFFFF
+#define PERI_BACKUP_MEM_START_ADDR_M  ((PERI_BACKUP_MEM_START_ADDR_V)<<(PERI_BACKUP_MEM_START_ADDR_S))
+#define PERI_BACKUP_MEM_START_ADDR_V  0xFFFFFFFF
+#define PERI_BACKUP_MEM_START_ADDR_S  0
+
+#define PERI_BACKUP_REG_MAP0_REG          (DR_REG_PERI_BACKUP_BASE + 0xC)
+/* PERI_BACKUP_MAP0 : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_MAP0    0xFFFFFFFF
+#define PERI_BACKUP_MAP0_M  ((PERI_BACKUP_MAP0_V)<<(PERI_BACKUP_MAP0_S))
+#define PERI_BACKUP_MAP0_V  0xFFFFFFFF
+#define PERI_BACKUP_MAP0_S  0
+
+#define PERI_BACKUP_REG_MAP1_REG          (DR_REG_PERI_BACKUP_BASE + 0x10)
+/* PERI_BACKUP_MAP1 : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_MAP1    0xFFFFFFFF
+#define PERI_BACKUP_MAP1_M  ((PERI_BACKUP_MAP1_V)<<(PERI_BACKUP_MAP1_S))
+#define PERI_BACKUP_MAP1_V  0xFFFFFFFF
+#define PERI_BACKUP_MAP1_S  0
+
+#define PERI_BACKUP_REG_MAP2_REG          (DR_REG_PERI_BACKUP_BASE + 0x14)
+/* PERI_BACKUP_MAP2 : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_MAP2    0xFFFFFFFF
+#define PERI_BACKUP_MAP2_M  ((PERI_BACKUP_MAP2_V)<<(PERI_BACKUP_MAP2_S))
+#define PERI_BACKUP_MAP2_V  0xFFFFFFFF
+#define PERI_BACKUP_MAP2_S  0
+
+#define PERI_BACKUP_REG_MAP3_REG          (DR_REG_PERI_BACKUP_BASE + 0x18)
+/* PERI_BACKUP_MAP3 : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_MAP3    0xFFFFFFFF
+#define PERI_BACKUP_MAP3_M  ((PERI_BACKUP_MAP3_V)<<(PERI_BACKUP_MAP3_S))
+#define PERI_BACKUP_MAP3_V  0xFFFFFFFF
+#define PERI_BACKUP_MAP3_S  0
+
+#define PERI_BACKUP_INT_RAW_REG          (DR_REG_PERI_BACKUP_BASE + 0x1C)
+/* PERI_BACKUP_ERR_INT_RAW : R/SS/WTC ;bitpos:[1] ;default: 1'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_ERR_INT_RAW    (BIT(1))
+#define PERI_BACKUP_ERR_INT_RAW_M  (BIT(1))
+#define PERI_BACKUP_ERR_INT_RAW_V  0x1
+#define PERI_BACKUP_ERR_INT_RAW_S  1
+/* PERI_BACKUP_DONE_INT_RAW : R/SS/WTC ;bitpos:[0] ;default: 1'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_DONE_INT_RAW    (BIT(0))
+#define PERI_BACKUP_DONE_INT_RAW_M  (BIT(0))
+#define PERI_BACKUP_DONE_INT_RAW_V  0x1
+#define PERI_BACKUP_DONE_INT_RAW_S  0
+
+#define PERI_BACKUP_INT_ST_REG          (DR_REG_PERI_BACKUP_BASE + 0x20)
+/* PERI_BACKUP_ERR_INT_ST : RO ;bitpos:[1] ;default: 1'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_ERR_INT_ST    (BIT(1))
+#define PERI_BACKUP_ERR_INT_ST_M  (BIT(1))
+#define PERI_BACKUP_ERR_INT_ST_V  0x1
+#define PERI_BACKUP_ERR_INT_ST_S  1
+/* PERI_BACKUP_DONE_INT_ST : RO ;bitpos:[0] ;default: 1'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_DONE_INT_ST    (BIT(0))
+#define PERI_BACKUP_DONE_INT_ST_M  (BIT(0))
+#define PERI_BACKUP_DONE_INT_ST_V  0x1
+#define PERI_BACKUP_DONE_INT_ST_S  0
+
+#define PERI_BACKUP_INT_ENA_REG          (DR_REG_PERI_BACKUP_BASE + 0x24)
+/* PERI_BACKUP_ERR_INT_ENA : R/W ;bitpos:[1] ;default: 1'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_ERR_INT_ENA    (BIT(1))
+#define PERI_BACKUP_ERR_INT_ENA_M  (BIT(1))
+#define PERI_BACKUP_ERR_INT_ENA_V  0x1
+#define PERI_BACKUP_ERR_INT_ENA_S  1
+/* PERI_BACKUP_DONE_INT_ENA : R/W ;bitpos:[0] ;default: 1'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_DONE_INT_ENA    (BIT(0))
+#define PERI_BACKUP_DONE_INT_ENA_M  (BIT(0))
+#define PERI_BACKUP_DONE_INT_ENA_V  0x1
+#define PERI_BACKUP_DONE_INT_ENA_S  0
+
+#define PERI_BACKUP_INT_CLR_REG          (DR_REG_PERI_BACKUP_BASE + 0x28)
+/* PERI_BACKUP_ERR_INT_CLR : WT ;bitpos:[1] ;default: 1'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_ERR_INT_CLR    (BIT(1))
+#define PERI_BACKUP_ERR_INT_CLR_M  (BIT(1))
+#define PERI_BACKUP_ERR_INT_CLR_V  0x1
+#define PERI_BACKUP_ERR_INT_CLR_S  1
+/* PERI_BACKUP_DONE_INT_CLR : WT ;bitpos:[0] ;default: 1'd0 ; */
+/*description: .*/
+#define PERI_BACKUP_DONE_INT_CLR    (BIT(0))
+#define PERI_BACKUP_DONE_INT_CLR_M  (BIT(0))
+#define PERI_BACKUP_DONE_INT_CLR_V  0x1
+#define PERI_BACKUP_DONE_INT_CLR_S  0
+
+#define PERI_BACKUP_DATE_REG          (DR_REG_PERI_BACKUP_BASE + 0xFC)
+/* PERI_BACKUP_CLK_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: register file clk gating.*/
+#define PERI_BACKUP_CLK_EN    (BIT(31))
+#define PERI_BACKUP_CLK_EN_M  (BIT(31))
+#define PERI_BACKUP_CLK_EN_V  0x1
+#define PERI_BACKUP_CLK_EN_S  31
+/* PERI_BACKUP_DATE : R/W ;bitpos:[27:0] ;default: 28'h2012300 ; */
+/*description: .*/
+#define PERI_BACKUP_DATE    0x0FFFFFFF
+#define PERI_BACKUP_DATE_M  ((PERI_BACKUP_DATE_V)<<(PERI_BACKUP_DATE_S))
+#define PERI_BACKUP_DATE_V  0xFFFFFFF
+#define PERI_BACKUP_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_PERI_BACKUP_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/peri_backup_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/peri_backup_struct.h
new file mode 100644
index 00000000000..20d6673f2ec
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/peri_backup_struct.h
@@ -0,0 +1,143 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_PERI_BACKUP_STRUCT_H_
+#define _SOC_PERI_BACKUP_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct peri_backup_dev_s {
+    union {
+        struct {
+            uint32_t reg_peri_backup_flow_err      :    3;
+            uint32_t reg_peri_backup_addr_map_mode :    1;
+            uint32_t reg_peri_backup_burst_limit   :    5;
+            uint32_t reg_peri_backup_tout_thres    :    10;
+            uint32_t reg_peri_backup_size          :    10;
+            uint32_t reg_peri_backup_start         :    1;
+            uint32_t reg_peri_backup_to_mem        :    1;
+            uint32_t reg_peri_backup_ena           :    1;
+        };
+        uint32_t val;
+    } config;
+    uint32_t apb_addr;
+    uint32_t mem_addr;
+    uint32_t reg_map0;
+    uint32_t reg_map1;
+    uint32_t reg_map2;
+    uint32_t reg_map3;
+    union {
+        struct {
+            uint32_t reg_peri_backup_done_int_raw  :    1;
+            uint32_t reg_peri_backup_err_int_raw   :    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } int_raw;
+    union {
+        struct {
+            uint32_t reg_peri_backup_done_int_st   :    1;
+            uint32_t reg_peri_backup_err_int_st    :    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } int_st;
+    union {
+        struct {
+            uint32_t reg_peri_backup_done_int_ena  :    1;
+            uint32_t reg_peri_backup_err_int_ena   :    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } int_ena;
+    union {
+        struct {
+            uint32_t reg_peri_backup_done_int_clr  :    1;
+            uint32_t reg_peri_backup_err_int_clr   :    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } int_clr;
+    uint32_t reserved_2c;
+    uint32_t reserved_30;
+    uint32_t reserved_34;
+    uint32_t reserved_38;
+    uint32_t reserved_3c;
+    uint32_t reserved_40;
+    uint32_t reserved_44;
+    uint32_t reserved_48;
+    uint32_t reserved_4c;
+    uint32_t reserved_50;
+    uint32_t reserved_54;
+    uint32_t reserved_58;
+    uint32_t reserved_5c;
+    uint32_t reserved_60;
+    uint32_t reserved_64;
+    uint32_t reserved_68;
+    uint32_t reserved_6c;
+    uint32_t reserved_70;
+    uint32_t reserved_74;
+    uint32_t reserved_78;
+    uint32_t reserved_7c;
+    uint32_t reserved_80;
+    uint32_t reserved_84;
+    uint32_t reserved_88;
+    uint32_t reserved_8c;
+    uint32_t reserved_90;
+    uint32_t reserved_94;
+    uint32_t reserved_98;
+    uint32_t reserved_9c;
+    uint32_t reserved_a0;
+    uint32_t reserved_a4;
+    uint32_t reserved_a8;
+    uint32_t reserved_ac;
+    uint32_t reserved_b0;
+    uint32_t reserved_b4;
+    uint32_t reserved_b8;
+    uint32_t reserved_bc;
+    uint32_t reserved_c0;
+    uint32_t reserved_c4;
+    uint32_t reserved_c8;
+    uint32_t reserved_cc;
+    uint32_t reserved_d0;
+    uint32_t reserved_d4;
+    uint32_t reserved_d8;
+    uint32_t reserved_dc;
+    uint32_t reserved_e0;
+    uint32_t reserved_e4;
+    uint32_t reserved_e8;
+    uint32_t reserved_ec;
+    uint32_t reserved_f0;
+    uint32_t reserved_f4;
+    uint32_t reserved_f8;
+    union {
+        struct {
+            uint32_t reg_date                      :    28;
+            uint32_t reserved28                    :    3;
+            uint32_t reg_clk_en                    :    1;  /*register file clk gating*/
+        };
+        uint32_t val;
+    } date;
+} peri_backup_dev_t;
+extern peri_backup_dev_t PERI_BACKUP;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_PERI_BACKUP_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/periph_defs.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/periph_defs.h
new file mode 100644
index 00000000000..c2bb13a80ce
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/periph_defs.h
@@ -0,0 +1,160 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    PERIPH_LEDC_MODULE = 0,
+    PERIPH_UART0_MODULE,
+    PERIPH_UART1_MODULE,
+    PERIPH_UART2_MODULE,
+    PERIPH_USB_MODULE,
+    PERIPH_I2C0_MODULE,
+    PERIPH_I2C1_MODULE,
+    PERIPH_I2S0_MODULE,
+    PERIPH_I2S1_MODULE,
+    PERIPH_LCD_CAM_MODULE,
+    PERIPH_TIMG0_MODULE,
+    PERIPH_TIMG1_MODULE,
+    PERIPH_PWM0_MODULE,
+    PERIPH_PWM1_MODULE,
+    PERIPH_PWM2_MODULE,
+    PERIPH_PWM3_MODULE,
+    PERIPH_UHCI0_MODULE,
+    PERIPH_UHCI1_MODULE,
+    PERIPH_RMT_MODULE,
+    PERIPH_PCNT_MODULE,
+    PERIPH_SPI_MODULE,
+    PERIPH_SPI2_MODULE,
+    PERIPH_SPI3_MODULE,
+    PERIPH_SDMMC_MODULE,
+    PERIPH_TWAI_MODULE,
+    PERIPH_RNG_MODULE,
+    PERIPH_WIFI_MODULE,
+    PERIPH_BT_MODULE,
+    PERIPH_WIFI_BT_COMMON_MODULE,
+    PERIPH_BT_BASEBAND_MODULE,
+    PERIPH_BT_LC_MODULE,
+    PERIPH_AES_MODULE,
+    PERIPH_SHA_MODULE,
+    PERIPH_HMAC_MODULE,
+    PERIPH_DS_MODULE,
+    PERIPH_RSA_MODULE,
+    PERIPH_SYSTIMER_MODULE,
+    PERIPH_GDMA_MODULE,
+    PERIPH_DEDIC_GPIO_MODULE,
+    PERIPH_SARADC_MODULE,
+    PERIPH_MODULE_MAX
+} periph_module_t;
+
+typedef enum {
+    ETS_WIFI_MAC_INTR_SOURCE = 0,               /**< interrupt of WiFi MAC, level*/
+    ETS_WIFI_MAC_NMI_SOURCE,                    /**< interrupt of WiFi MAC, NMI, use if MAC have bug to fix in NMI*/
+    ETS_WIFI_PWR_INTR_SOURCE,                   /**< */
+    ETS_WIFI_BB_INTR_SOURCE,                    /**< interrupt of WiFi BB, level, we can do some calibartion*/
+    ETS_BT_MAC_INTR_SOURCE,                     /**< will be cancelled*/
+    ETS_BT_BB_INTR_SOURCE,                      /**< interrupt of BT BB, level*/
+    ETS_BT_BB_NMI_SOURCE,                       /**< interrupt of BT BB, NMI, use if BB have bug to fix in NMI*/
+    ETS_RWBT_INTR_SOURCE,                       /**< interrupt of RWBT, level*/
+    ETS_RWBLE_INTR_SOURCE,                      /**< interrupt of RWBLE, level*/
+    ETS_RWBT_NMI_SOURCE,                        /**< interrupt of RWBT, NMI, use if RWBT have bug to fix in NMI*/
+    ETS_RWBLE_NMI_SOURCE,                       /**< interrupt of RWBLE, NMI, use if RWBT have bug to fix in NMI*/
+    ETS_I2C_MASTER_SOURCE,                      /**< interrupt of I2C Master, level*/
+    ETS_SLC0_INTR_SOURCE,                       /**< interrupt of SLC0, level*/
+    ETS_SLC1_INTR_SOURCE,                       /**< interrupt of SLC1, level*/
+    ETS_UHCI0_INTR_SOURCE,                      /**< interrupt of UHCI0, level*/
+    ETS_UHCI1_INTR_SOURCE,                      /**< interrupt of UHCI1, level*/
+
+    ETS_GPIO_INTR_SOURCE = 16,                  /**< interrupt of GPIO, level*/
+    ETS_GPIO_NMI_SOURCE,                        /**< interrupt of GPIO, NMI*/
+    ETS_GPIO_INTR_SOURCE2,                      /**< interrupt of GPIO, level*/
+    ETS_GPIO_NMI_SOURCE2,                       /**< interrupt of GPIO, NMI*/
+    ETS_SPI1_INTR_SOURCE,                       /**< interrupt of SPI1, level, SPI1 is for flash read/write, do not use this*/
+    ETS_SPI2_INTR_SOURCE,                       /**< interrupt of SPI2, level*/
+    ETS_SPI3_INTR_SOURCE,                       /**< interrupt of SPI3, level*/
+    ETS_LCD_CAM_INTR_SOURCE = 24,               /**< interrupt of LCD camera, level*/
+    ETS_I2S0_INTR_SOURCE,                       /**< interrupt of I2S0, level*/
+    ETS_I2S1_INTR_SOURCE,                       /**< interrupt of I2S1, level*/
+    ETS_UART0_INTR_SOURCE,                      /**< interrupt of UART0, level*/
+    ETS_UART1_INTR_SOURCE,                      /**< interrupt of UART1, level*/
+    ETS_UART2_INTR_SOURCE,                      /**< interrupt of UART2, level*/
+    ETS_SDIO_HOST_INTR_SOURCE,                  /**< interrupt of SD/SDIO/MMC HOST, level*/
+    ETS_PWM0_INTR_SOURCE,                       /**< interrupt of PWM0, level, Reserved*/
+    ETS_PWM1_INTR_SOURCE,                       /**< interrupt of PWM1, level, Reserved*/
+    ETS_LEDC_INTR_SOURCE = 35,                  /**< interrupt of LED PWM, level*/
+    ETS_EFUSE_INTR_SOURCE,                      /**< interrupt of efuse, level, not likely to use*/
+    ETS_TWAI_INTR_SOURCE,                       /**< interrupt of can, level*/
+    ETS_USB_INTR_SOURCE,                        /**< interrupt of USB, level*/
+    ETS_RTC_CORE_INTR_SOURCE,                   /**< interrupt of rtc core, level, include rtc watchdog*/
+    ETS_RMT_INTR_SOURCE,                        /**< interrupt of remote controller, level*/
+    ETS_PCNT_INTR_SOURCE,                       /**< interrupt of pluse count, level*/
+    ETS_I2C_EXT0_INTR_SOURCE,                   /**< interrupt of I2C controller1, level*/
+    ETS_I2C_EXT1_INTR_SOURCE,                   /**< interrupt of I2C controller0, level*/
+    ETS_SPI2_DMA_INTR_SOURCE,                   /**< interrupt of SPI2 DMA, level*/
+    ETS_SPI3_DMA_INTR_SOURCE,                   /**< interrupt of SPI3 DMA, level*/
+    ETS_WDT_INTR_SOURCE = 47,                   /**< will be cancelled*/
+
+    ETS_TIMER1_INTR_SOURCE = 48,
+    ETS_TIMER2_INTR_SOURCE,
+    ETS_TG0_T0_LEVEL_INTR_SOURCE,               /**< interrupt of TIMER_GROUP0, TIMER0, EDGE*/
+    ETS_TG0_T1_LEVEL_INTR_SOURCE,               /**< interrupt of TIMER_GROUP0, TIMER1, EDGE*/
+    ETS_TG0_WDT_LEVEL_INTR_SOURCE,              /**< interrupt of TIMER_GROUP0, WATCH DOG, EDGE*/
+    ETS_TG1_T0_LEVEL_INTR_SOURCE,               /**< interrupt of TIMER_GROUP1, TIMER0, EDGE*/
+    ETS_TG1_T1_LEVEL_INTR_SOURCE,               /**< interrupt of TIMER_GROUP1, TIMER1, EDGE*/
+    ETS_TG1_WDT_LEVEL_INTR_SOURCE,              /**< interrupt of TIMER_GROUP1, WATCHDOG, EDGE*/
+    ETS_CACHE_IA_INTR_SOURCE,                   /**< interrupt of Cache Invalied Access, LEVEL*/
+    ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE,      /**< interrupt of system timer 0, EDGE*/
+    ETS_SYSTIMER_TARGET1_EDGE_INTR_SOURCE,      /**< interrupt of system timer 1, EDGE*/
+    ETS_SYSTIMER_TARGET2_EDGE_INTR_SOURCE,      /**< interrupt of system timer 2, EDGE*/
+    ETS_SPI_MEM_REJECT_CACHE_INTR_SOURCE,       /**< interrupt of SPI0 Cache access and SPI1 access rejected, LEVEL*/
+    ETS_DCACHE_PRELOAD0_INTR_SOURCE,            /**< interrupt of DCache preload operation, LEVEL*/
+    ETS_ICACHE_PRELOAD0_INTR_SOURCE,            /**< interrupt of ICache perload operation, LEVEL*/
+    ETS_DCACHE_SYNC0_INTR_SOURCE,               /**< interrupt of data cache sync done, LEVEL*/
+    ETS_ICACHE_SYNC0_INTR_SOURCE,               /**< interrupt of instruction cache sync done, LEVEL*/
+    ETS_APB_ADC_INTR_SOURCE,                    /**< interrupt of APB ADC, LEVEL*/
+    ETS_DMA_IN_CH0_INTR_SOURCE,                 /**< interrupt of general DMA RX channel 0, LEVEL*/
+    ETS_DMA_IN_CH1_INTR_SOURCE,                 /**< interrupt of general DMA RX channel 1, LEVEL*/
+    ETS_DMA_IN_CH2_INTR_SOURCE,                 /**< interrupt of general DMA RX channel 2, LEVEL*/
+    ETS_DMA_IN_CH3_INTR_SOURCE,                 /**< interrupt of general DMA RX channel 3, LEVEL*/
+    ETS_DMA_IN_CH4_INTR_SOURCE,                 /**< interrupt of general DMA RX channel 4, LEVEL*/
+    ETS_DMA_OUT_CH0_INTR_SOURCE,                /**< interrupt of general DMA TX channel 0, LEVEL*/
+    ETS_DMA_OUT_CH1_INTR_SOURCE,                /**< interrupt of general DMA TX channel 1, LEVEL*/
+    ETS_DMA_OUT_CH2_INTR_SOURCE,                /**< interrupt of general DMA TX channel 2, LEVEL*/
+    ETS_DMA_OUT_CH3_INTR_SOURCE,                /**< interrupt of general DMA TX channel 3, LEVEL*/
+    ETS_DMA_OUT_CH4_INTR_SOURCE,                /**< interrupt of general DMA TX channel 4, LEVEL*/
+    ETS_RSA_INTR_SOURCE,                        /**< interrupt of RSA accelerator, level*/
+    ETS_AES_INTR_SOURCE,                        /**< interrupt of AES accelerator, level*/
+    ETS_SHA_INTR_SOURCE,                        /**< interrupt of SHA accelerator, level*/
+    ETS_FROM_CPU_INTR0_SOURCE,                  /**< interrupt0 generated from a CPU, level*/ /* Used for FreeRTOS */
+    ETS_FROM_CPU_INTR1_SOURCE,                  /**< interrupt1 generated from a CPU, level*/ /* Used for FreeRTOS */
+    ETS_FROM_CPU_INTR2_SOURCE,                  /**< interrupt2 generated from a CPU, level*/ /* Used for IPC_ISR */
+    ETS_FROM_CPU_INTR3_SOURCE,                  /**< interrupt3 generated from a CPU, level*/ /* Used for IPC_ISR */
+    ETS_ASSIST_DEBUG_INTR_SOURCE,               /**< interrupt of Assist debug module, LEVEL*/
+    ETS_DMA_APBPERI_PMS_INTR_SOURCE,
+    ETS_CORE0_IRAM0_PMS_INTR_SOURCE,
+    ETS_CORE0_DRAM0_PMS_INTR_SOURCE,
+    ETS_CORE0_PIF_PMS_INTR_SOURCE,
+    ETS_CORE0_PIF_PMS_SIZE_INTR_SOURCE,
+    ETS_CORE1_IRAM0_PMS_INTR_SOURCE,
+    ETS_CORE1_DRAM0_PMS_INTR_SOURCE,
+    ETS_CORE1_PIF_PMS_INTR_SOURCE,
+    ETS_CORE1_PIF_PMS_SIZE_INTR_SOURCE,
+    ETS_BACKUP_PMS_VIOLATE_INTR_SOURCE,
+    ETS_CACHE_CORE0_ACS_INTR_SOURCE,
+    ETS_CACHE_CORE1_ACS_INTR_SOURCE,
+    ETS_USB_SERIAL_JTAG_INTR_SOURCE,
+    ETS_PREI_BACKUP_INTR_SOURCE,
+    ETS_DMA_EXTMEM_REJECT_SOURCE,
+    ETS_MAX_INTR_SOURCE,                        /**< number of interrupt sources */
+} periph_interrput_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/reset_reasons.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/reset_reasons.h
new file mode 100644
index 00000000000..2c1c34e9fe2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/reset_reasons.h
@@ -0,0 +1,66 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+//+-----------------------------------------------Terminology---------------------------------------------+
+//|                                                                                                       |
+//| CPU Reset:    Reset CPU core only, once reset done, CPU will execute from reset vector                |
+//|                                                                                                       |
+//| Core Reset:   Reset the whole digital system except RTC sub-system                                    |
+//|                                                                                                       |
+//| System Reset: Reset the whole digital system, including RTC sub-system                                |
+//|                                                                                                       |
+//| Chip Reset:   Reset the whole chip, including the analog part                                         |
+//|                                                                                                       |
+//+-------------------------------------------------------------------------------------------------------+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Naming conventions: RESET_REASON_{reset level}_{reset reason}
+ * @note refer to TRM: <Reset and Clock> chapter
+ */
+typedef enum {
+    RESET_REASON_CHIP_POWER_ON   = 0x01, // Power on reset
+    RESET_REASON_CHIP_BROWN_OUT  = 0x01, // VDD voltage is not stable and resets the chip
+    RESET_REASON_CHIP_SUPER_WDT  = 0x01, // Super watch dog resets the chip
+    RESET_REASON_CORE_SW         = 0x03, // Software resets the digital core by RTC_CNTL_SW_SYS_RST
+    RESET_REASON_CORE_DEEP_SLEEP = 0x05, // Deep sleep reset the digital core
+    RESET_REASON_CORE_MWDT0      = 0x07, // Main watch dog 0 resets digital core
+    RESET_REASON_CORE_MWDT1      = 0x08, // Main watch dog 1 resets digital core
+    RESET_REASON_CORE_RTC_WDT    = 0x09, // RTC watch dog resets digital core
+    RESET_REASON_CPU0_MWDT0      = 0x0B, // Main watch dog 0 resets CPU 0
+    RESET_REASON_CPU1_MWDT0      = 0x0B, // Main watch dog 0 resets CPU 1
+    RESET_REASON_CPU0_SW         = 0x0C, // Software resets CPU 0 by RTC_CNTL_SW_PROCPU_RST
+    RESET_REASON_CPU1_SW         = 0x0C, // Software resets CPU 1 by RTC_CNTL_SW_APPCPU_RST
+    RESET_REASON_CPU0_RTC_WDT    = 0x0D, // RTC watch dog resets CPU 0
+    RESET_REASON_CPU1_RTC_WDT    = 0x0D, // RTC watch dog resets CPU 1
+    RESET_REASON_SYS_BROWN_OUT   = 0x0F, // VDD voltage is not stable and resets the digital core
+    RESET_REASON_SYS_RTC_WDT     = 0x10, // RTC watch dog resets digital core and rtc module
+    RESET_REASON_CPU0_MWDT1      = 0x11, // Main watch dog 1 resets CPU 0
+    RESET_REASON_CPU1_MWDT1      = 0x11, // Main watch dog 1 resets CPU 1
+    RESET_REASON_SYS_SUPER_WDT   = 0x12, // Super watch dog resets the digital core and rtc module
+    RESET_REASON_SYS_CLK_GLITCH  = 0x13, // Glitch on clock resets the digital core and rtc module
+    RESET_REASON_CORE_EFUSE_CRC  = 0x14, // eFuse CRC error resets the digital core
+    RESET_REASON_CORE_USB_UART   = 0x15, // USB UART resets the digital core
+    RESET_REASON_CORE_USB_JTAG   = 0x16, // USB JTAG resets the digital core
+    RESET_REASON_CORE_PWR_GLITCH = 0x17, // Glitch on power resets the digital core
+} soc_reset_reason_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rmt_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rmt_reg.h
new file mode 100644
index 00000000000..55513e5e975
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rmt_reg.h
@@ -0,0 +1,2900 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** RMT_CH0DATA_REG register
+ *  The read and write  data register for CHANNEL0 by apb fifo access.
+ */
+#define RMT_CH0DATA_REG (DR_REG_RMT_BASE + 0x0)
+/** RMT_CH0DATA : RO; bitpos: [31:0]; default: 0;
+ *  Read and write data for channel 0 via APB FIFO.
+ */
+#define RMT_CH0DATA    0xFFFFFFFFU
+#define RMT_CH0DATA_M  (RMT_CH0DATA_V << RMT_CH0DATA_S)
+#define RMT_CH0DATA_V  0xFFFFFFFFU
+#define RMT_CH0DATA_S  0
+
+/** RMT_CH1DATA_REG register
+ *  The read and write  data register for CHANNEL1 by apb fifo access.
+ */
+#define RMT_CH1DATA_REG (DR_REG_RMT_BASE + 0x4)
+/** RMT_CH1DATA : RO; bitpos: [31:0]; default: 0;
+ *  Read and write data for channel 1 via APB FIFO.
+ */
+#define RMT_CH1DATA    0xFFFFFFFFU
+#define RMT_CH1DATA_M  (RMT_CH1DATA_V << RMT_CH1DATA_S)
+#define RMT_CH1DATA_V  0xFFFFFFFFU
+#define RMT_CH1DATA_S  0
+
+/** RMT_CH2DATA_REG register
+ *  The read and write  data register for CHANNEL2 by apb fifo access.
+ */
+#define RMT_CH2DATA_REG (DR_REG_RMT_BASE + 0x8)
+/** RMT_CH2DATA : RO; bitpos: [31:0]; default: 0;
+ *  Read and write data for channel 2 via APB FIFO.
+ */
+#define RMT_CH2DATA    0xFFFFFFFFU
+#define RMT_CH2DATA_M  (RMT_CH2DATA_V << RMT_CH2DATA_S)
+#define RMT_CH2DATA_V  0xFFFFFFFFU
+#define RMT_CH2DATA_S  0
+
+/** RMT_CH3DATA_REG register
+ *  The read and write  data register for CHANNEL3 by apb fifo access.
+ */
+#define RMT_CH3DATA_REG (DR_REG_RMT_BASE + 0xc)
+/** RMT_CH3DATA : RO; bitpos: [31:0]; default: 0;
+ *  Read and write data for channel 3 via APB FIFO.
+ */
+#define RMT_CH3DATA    0xFFFFFFFFU
+#define RMT_CH3DATA_M  (RMT_CH3DATA_V << RMT_CH3DATA_S)
+#define RMT_CH3DATA_V  0xFFFFFFFFU
+#define RMT_CH3DATA_S  0
+
+/** RMT_CH4DATA_REG register
+ *  The read and write  data register for CHANNEL$n by apb fifo access.
+ */
+#define RMT_CH4DATA_REG (DR_REG_RMT_BASE + 0x10)
+/** RMT_CH4DATA : RO; bitpos: [31:0]; default: 0;
+ *  Read and write data for channel $n via APB FIFO.
+ */
+#define RMT_CH4DATA    0xFFFFFFFFU
+#define RMT_CH4DATA_M  (RMT_CH4DATA_V << RMT_CH4DATA_S)
+#define RMT_CH4DATA_V  0xFFFFFFFFU
+#define RMT_CH4DATA_S  0
+
+/** RMT_CH5DATA_REG register
+ *  The read and write  data register for CHANNEL$n by apb fifo access.
+ */
+#define RMT_CH5DATA_REG (DR_REG_RMT_BASE + 0x14)
+/** RMT_CH5DATA : RO; bitpos: [31:0]; default: 0;
+ *  Read and write data for channel $n via APB FIFO.
+ */
+#define RMT_CH5DATA    0xFFFFFFFFU
+#define RMT_CH5DATA_M  (RMT_CH5DATA_V << RMT_CH5DATA_S)
+#define RMT_CH5DATA_V  0xFFFFFFFFU
+#define RMT_CH5DATA_S  0
+
+/** RMT_CH6DATA_REG register
+ *  The read and write  data register for CHANNEL$n by apb fifo access.
+ */
+#define RMT_CH6DATA_REG (DR_REG_RMT_BASE + 0x18)
+/** RMT_CH6DATA : RO; bitpos: [31:0]; default: 0;
+ *  Read and write data for channel $n via APB FIFO.
+ */
+#define RMT_CH6DATA    0xFFFFFFFFU
+#define RMT_CH6DATA_M  (RMT_CH6DATA_V << RMT_CH6DATA_S)
+#define RMT_CH6DATA_V  0xFFFFFFFFU
+#define RMT_CH6DATA_S  0
+
+/** RMT_CH7DATA_REG register
+ *  The read and write  data register for CHANNEL$n by apb fifo access.
+ */
+#define RMT_CH7DATA_REG (DR_REG_RMT_BASE + 0x1c)
+/** RMT_CH7DATA : RO; bitpos: [31:0]; default: 0;
+ *  Read and write data for channel $n via APB FIFO.
+ */
+#define RMT_CH7DATA    0xFFFFFFFFU
+#define RMT_CH7DATA_M  (RMT_CH7DATA_V << RMT_CH7DATA_S)
+#define RMT_CH7DATA_V  0xFFFFFFFFU
+#define RMT_CH7DATA_S  0
+
+/** RMT_CH0CONF0_REG register
+ *  Channel 0 configure register 0
+ */
+#define RMT_CH0CONF0_REG (DR_REG_RMT_BASE + 0x20)
+/** RMT_TX_START_0 : WT; bitpos: [0]; default: 0;
+ *  Set this bit to start sending data on CHANNEL0.
+ */
+#define RMT_TX_START_0    (BIT(0))
+#define RMT_TX_START_0_M  (RMT_TX_START_0_V << RMT_TX_START_0_S)
+#define RMT_TX_START_0_V  0x00000001U
+#define RMT_TX_START_0_S  0
+/** RMT_MEM_RD_RST_0 : WT; bitpos: [1]; default: 0;
+ *  Set this bit to reset read ram address for CHANNEL0 by accessing transmitter.
+ */
+#define RMT_MEM_RD_RST_0    (BIT(1))
+#define RMT_MEM_RD_RST_0_M  (RMT_MEM_RD_RST_0_V << RMT_MEM_RD_RST_0_S)
+#define RMT_MEM_RD_RST_0_V  0x00000001U
+#define RMT_MEM_RD_RST_0_S  1
+/** RMT_APB_MEM_RST_0 : WT; bitpos: [2]; default: 0;
+ *  Set this bit to reset W/R ram address for CHANNEL0 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_0    (BIT(2))
+#define RMT_APB_MEM_RST_0_M  (RMT_APB_MEM_RST_0_V << RMT_APB_MEM_RST_0_S)
+#define RMT_APB_MEM_RST_0_V  0x00000001U
+#define RMT_APB_MEM_RST_0_S  2
+/** RMT_TX_CONTI_MODE_0 : R/W; bitpos: [3]; default: 0;
+ *  Set this bit to restart transmission  from the first data to the last data in
+ *  CHANNEL0.
+ */
+#define RMT_TX_CONTI_MODE_0    (BIT(3))
+#define RMT_TX_CONTI_MODE_0_M  (RMT_TX_CONTI_MODE_0_V << RMT_TX_CONTI_MODE_0_S)
+#define RMT_TX_CONTI_MODE_0_V  0x00000001U
+#define RMT_TX_CONTI_MODE_0_S  3
+/** RMT_MEM_TX_WRAP_EN_0 : R/W; bitpos: [4]; default: 0;
+ *  This is the channel 0 enable bit for wraparound mode: it will resume sending at the
+ *  start when the data to be sent is more than its memory size.
+ */
+#define RMT_MEM_TX_WRAP_EN_0    (BIT(4))
+#define RMT_MEM_TX_WRAP_EN_0_M  (RMT_MEM_TX_WRAP_EN_0_V << RMT_MEM_TX_WRAP_EN_0_S)
+#define RMT_MEM_TX_WRAP_EN_0_V  0x00000001U
+#define RMT_MEM_TX_WRAP_EN_0_S  4
+/** RMT_IDLE_OUT_LV_0 : R/W; bitpos: [5]; default: 0;
+ *  This bit configures the level of output signal in CHANNEL0 when the latter is in
+ *  IDLE state.
+ */
+#define RMT_IDLE_OUT_LV_0    (BIT(5))
+#define RMT_IDLE_OUT_LV_0_M  (RMT_IDLE_OUT_LV_0_V << RMT_IDLE_OUT_LV_0_S)
+#define RMT_IDLE_OUT_LV_0_V  0x00000001U
+#define RMT_IDLE_OUT_LV_0_S  5
+/** RMT_IDLE_OUT_EN_0 : R/W; bitpos: [6]; default: 0;
+ *  This is the output enable-control bit for CHANNEL0 in IDLE state.
+ */
+#define RMT_IDLE_OUT_EN_0    (BIT(6))
+#define RMT_IDLE_OUT_EN_0_M  (RMT_IDLE_OUT_EN_0_V << RMT_IDLE_OUT_EN_0_S)
+#define RMT_IDLE_OUT_EN_0_V  0x00000001U
+#define RMT_IDLE_OUT_EN_0_S  6
+/** RMT_TX_STOP_0 : R/W/SC; bitpos: [7]; default: 0;
+ *  Set this bit to stop the transmitter of CHANNEL0 sending data out.
+ */
+#define RMT_TX_STOP_0    (BIT(7))
+#define RMT_TX_STOP_0_M  (RMT_TX_STOP_0_V << RMT_TX_STOP_0_S)
+#define RMT_TX_STOP_0_V  0x00000001U
+#define RMT_TX_STOP_0_S  7
+/** RMT_DIV_CNT_0 : R/W; bitpos: [15:8]; default: 2;
+ *  This register is used to configure the divider for clock of CHANNEL0.
+ */
+#define RMT_DIV_CNT_0    0x000000FFU
+#define RMT_DIV_CNT_0_M  (RMT_DIV_CNT_0_V << RMT_DIV_CNT_0_S)
+#define RMT_DIV_CNT_0_V  0x000000FFU
+#define RMT_DIV_CNT_0_S  8
+/** RMT_MEM_SIZE_0 : R/W; bitpos: [19:16]; default: 1;
+ *  This register is used to configure the maximum size of memory allocated to CHANNEL0.
+ */
+#define RMT_MEM_SIZE_0    0x0000000FU
+#define RMT_MEM_SIZE_0_M  (RMT_MEM_SIZE_0_V << RMT_MEM_SIZE_0_S)
+#define RMT_MEM_SIZE_0_V  0x0000000FU
+#define RMT_MEM_SIZE_0_S  16
+/** RMT_CARRIER_EFF_EN_0 : R/W; bitpos: [20]; default: 1;
+ *  1: Add carrier modulation on the output signal only at the send data state for
+ *  CHANNEL0. 0: Add carrier modulation on the output signal at all state for CHANNEL0.
+ *  Only valid when RMT_CARRIER_EN_CH0 is 1.
+ */
+#define RMT_CARRIER_EFF_EN_0    (BIT(20))
+#define RMT_CARRIER_EFF_EN_0_M  (RMT_CARRIER_EFF_EN_0_V << RMT_CARRIER_EFF_EN_0_S)
+#define RMT_CARRIER_EFF_EN_0_V  0x00000001U
+#define RMT_CARRIER_EFF_EN_0_S  20
+/** RMT_CARRIER_EN_0 : R/W; bitpos: [21]; default: 1;
+ *  This is the carrier modulation enable-control bit for CHANNEL0. 1: Add carrier
+ *  modulation in the output signal. 0: No carrier modulation in sig_out.
+ */
+#define RMT_CARRIER_EN_0    (BIT(21))
+#define RMT_CARRIER_EN_0_M  (RMT_CARRIER_EN_0_V << RMT_CARRIER_EN_0_S)
+#define RMT_CARRIER_EN_0_V  0x00000001U
+#define RMT_CARRIER_EN_0_S  21
+/** RMT_CARRIER_OUT_LV_0 : R/W; bitpos: [22]; default: 1;
+ *  This bit is used to configure the position of carrier wave for CHANNEL0.
+ *
+ *  1'h0: add carrier wave on low level.
+ *
+ *  1'h1: add carrier wave on high level.
+ */
+#define RMT_CARRIER_OUT_LV_0    (BIT(22))
+#define RMT_CARRIER_OUT_LV_0_M  (RMT_CARRIER_OUT_LV_0_V << RMT_CARRIER_OUT_LV_0_S)
+#define RMT_CARRIER_OUT_LV_0_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_0_S  22
+/** RMT_AFIFO_RST_0 : WT; bitpos: [23]; default: 0;
+ *  Reserved
+ */
+#define RMT_AFIFO_RST_0    (BIT(23))
+#define RMT_AFIFO_RST_0_M  (RMT_AFIFO_RST_0_V << RMT_AFIFO_RST_0_S)
+#define RMT_AFIFO_RST_0_V  0x00000001U
+#define RMT_AFIFO_RST_0_S  23
+/** RMT_CONF_UPDATE_0 : WT; bitpos: [24]; default: 0;
+ *  synchronization bit for CHANNEL0
+ */
+#define RMT_CONF_UPDATE_0    (BIT(24))
+#define RMT_CONF_UPDATE_0_M  (RMT_CONF_UPDATE_0_V << RMT_CONF_UPDATE_0_S)
+#define RMT_CONF_UPDATE_0_V  0x00000001U
+#define RMT_CONF_UPDATE_0_S  24
+
+/** RMT_CH1CONF0_REG register
+ *  Channel 1 configure register 0
+ */
+#define RMT_CH1CONF0_REG (DR_REG_RMT_BASE + 0x24)
+/** RMT_TX_START_1 : WT; bitpos: [0]; default: 0;
+ *  Set this bit to start sending data on CHANNEL1.
+ */
+#define RMT_TX_START_1    (BIT(0))
+#define RMT_TX_START_1_M  (RMT_TX_START_1_V << RMT_TX_START_1_S)
+#define RMT_TX_START_1_V  0x00000001U
+#define RMT_TX_START_1_S  0
+/** RMT_MEM_RD_RST_1 : WT; bitpos: [1]; default: 0;
+ *  Set this bit to reset read ram address for CHANNEL1 by accessing transmitter.
+ */
+#define RMT_MEM_RD_RST_1    (BIT(1))
+#define RMT_MEM_RD_RST_1_M  (RMT_MEM_RD_RST_1_V << RMT_MEM_RD_RST_1_S)
+#define RMT_MEM_RD_RST_1_V  0x00000001U
+#define RMT_MEM_RD_RST_1_S  1
+/** RMT_APB_MEM_RST_1 : WT; bitpos: [2]; default: 0;
+ *  Set this bit to reset W/R ram address for CHANNEL1 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_1    (BIT(2))
+#define RMT_APB_MEM_RST_1_M  (RMT_APB_MEM_RST_1_V << RMT_APB_MEM_RST_1_S)
+#define RMT_APB_MEM_RST_1_V  0x00000001U
+#define RMT_APB_MEM_RST_1_S  2
+/** RMT_TX_CONTI_MODE_1 : R/W; bitpos: [3]; default: 0;
+ *  Set this bit to restart transmission  from the first data to the last data in
+ *  CHANNEL1.
+ */
+#define RMT_TX_CONTI_MODE_1    (BIT(3))
+#define RMT_TX_CONTI_MODE_1_M  (RMT_TX_CONTI_MODE_1_V << RMT_TX_CONTI_MODE_1_S)
+#define RMT_TX_CONTI_MODE_1_V  0x00000001U
+#define RMT_TX_CONTI_MODE_1_S  3
+/** RMT_MEM_TX_WRAP_EN_1 : R/W; bitpos: [4]; default: 0;
+ *  This is the channel 1 enable bit for wraparound mode: it will resume sending at the
+ *  start when the data to be sent is more than its memory size.
+ */
+#define RMT_MEM_TX_WRAP_EN_1    (BIT(4))
+#define RMT_MEM_TX_WRAP_EN_1_M  (RMT_MEM_TX_WRAP_EN_1_V << RMT_MEM_TX_WRAP_EN_1_S)
+#define RMT_MEM_TX_WRAP_EN_1_V  0x00000001U
+#define RMT_MEM_TX_WRAP_EN_1_S  4
+/** RMT_IDLE_OUT_LV_1 : R/W; bitpos: [5]; default: 0;
+ *  This bit configures the level of output signal in CHANNEL1 when the latter is in
+ *  IDLE state.
+ */
+#define RMT_IDLE_OUT_LV_1    (BIT(5))
+#define RMT_IDLE_OUT_LV_1_M  (RMT_IDLE_OUT_LV_1_V << RMT_IDLE_OUT_LV_1_S)
+#define RMT_IDLE_OUT_LV_1_V  0x00000001U
+#define RMT_IDLE_OUT_LV_1_S  5
+/** RMT_IDLE_OUT_EN_1 : R/W; bitpos: [6]; default: 0;
+ *  This is the output enable-control bit for CHANNEL1 in IDLE state.
+ */
+#define RMT_IDLE_OUT_EN_1    (BIT(6))
+#define RMT_IDLE_OUT_EN_1_M  (RMT_IDLE_OUT_EN_1_V << RMT_IDLE_OUT_EN_1_S)
+#define RMT_IDLE_OUT_EN_1_V  0x00000001U
+#define RMT_IDLE_OUT_EN_1_S  6
+/** RMT_TX_STOP_1 : R/W/SC; bitpos: [7]; default: 0;
+ *  Set this bit to stop the transmitter of CHANNEL1 sending data out.
+ */
+#define RMT_TX_STOP_1    (BIT(7))
+#define RMT_TX_STOP_1_M  (RMT_TX_STOP_1_V << RMT_TX_STOP_1_S)
+#define RMT_TX_STOP_1_V  0x00000001U
+#define RMT_TX_STOP_1_S  7
+/** RMT_DIV_CNT_1 : R/W; bitpos: [15:8]; default: 2;
+ *  This register is used to configure the divider for clock of CHANNEL1.
+ */
+#define RMT_DIV_CNT_1    0x000000FFU
+#define RMT_DIV_CNT_1_M  (RMT_DIV_CNT_1_V << RMT_DIV_CNT_1_S)
+#define RMT_DIV_CNT_1_V  0x000000FFU
+#define RMT_DIV_CNT_1_S  8
+/** RMT_MEM_SIZE_1 : R/W; bitpos: [19:16]; default: 1;
+ *  This register is used to configure the maximum size of memory allocated to CHANNEL1.
+ */
+#define RMT_MEM_SIZE_1    0x0000000FU
+#define RMT_MEM_SIZE_1_M  (RMT_MEM_SIZE_1_V << RMT_MEM_SIZE_1_S)
+#define RMT_MEM_SIZE_1_V  0x0000000FU
+#define RMT_MEM_SIZE_1_S  16
+/** RMT_CARRIER_EFF_EN_1 : R/W; bitpos: [20]; default: 1;
+ *  1: Add carrier modulation on the output signal only at the send data state for
+ *  CHANNEL1. 0: Add carrier modulation on the output signal at all state for CHANNEL1.
+ *  Only valid when RMT_CARRIER_EN_CH1 is 1.
+ */
+#define RMT_CARRIER_EFF_EN_1    (BIT(20))
+#define RMT_CARRIER_EFF_EN_1_M  (RMT_CARRIER_EFF_EN_1_V << RMT_CARRIER_EFF_EN_1_S)
+#define RMT_CARRIER_EFF_EN_1_V  0x00000001U
+#define RMT_CARRIER_EFF_EN_1_S  20
+/** RMT_CARRIER_EN_1 : R/W; bitpos: [21]; default: 1;
+ *  This is the carrier modulation enable-control bit for CHANNEL1. 1: Add carrier
+ *  modulation in the output signal. 0: No carrier modulation in sig_out.
+ */
+#define RMT_CARRIER_EN_1    (BIT(21))
+#define RMT_CARRIER_EN_1_M  (RMT_CARRIER_EN_1_V << RMT_CARRIER_EN_1_S)
+#define RMT_CARRIER_EN_1_V  0x00000001U
+#define RMT_CARRIER_EN_1_S  21
+/** RMT_CARRIER_OUT_LV_1 : R/W; bitpos: [22]; default: 1;
+ *  This bit is used to configure the position of carrier wave for CHANNEL1.
+ *
+ *  1'h0: add carrier wave on low level.
+ *
+ *  1'h1: add carrier wave on high level.
+ */
+#define RMT_CARRIER_OUT_LV_1    (BIT(22))
+#define RMT_CARRIER_OUT_LV_1_M  (RMT_CARRIER_OUT_LV_1_V << RMT_CARRIER_OUT_LV_1_S)
+#define RMT_CARRIER_OUT_LV_1_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_1_S  22
+/** RMT_AFIFO_RST_1 : WT; bitpos: [23]; default: 0;
+ *  Reserved
+ */
+#define RMT_AFIFO_RST_1    (BIT(23))
+#define RMT_AFIFO_RST_1_M  (RMT_AFIFO_RST_1_V << RMT_AFIFO_RST_1_S)
+#define RMT_AFIFO_RST_1_V  0x00000001U
+#define RMT_AFIFO_RST_1_S  23
+/** RMT_CONF_UPDATE_1 : WT; bitpos: [24]; default: 0;
+ *  synchronization bit for CHANNEL1
+ */
+#define RMT_CONF_UPDATE_1    (BIT(24))
+#define RMT_CONF_UPDATE_1_M  (RMT_CONF_UPDATE_1_V << RMT_CONF_UPDATE_1_S)
+#define RMT_CONF_UPDATE_1_V  0x00000001U
+#define RMT_CONF_UPDATE_1_S  24
+
+/** RMT_CH2CONF0_REG register
+ *  Channel 2 configure register 0
+ */
+#define RMT_CH2CONF0_REG (DR_REG_RMT_BASE + 0x28)
+/** RMT_TX_START_2 : WT; bitpos: [0]; default: 0;
+ *  Set this bit to start sending data on CHANNEL2.
+ */
+#define RMT_TX_START_2    (BIT(0))
+#define RMT_TX_START_2_M  (RMT_TX_START_2_V << RMT_TX_START_2_S)
+#define RMT_TX_START_2_V  0x00000001U
+#define RMT_TX_START_2_S  0
+/** RMT_MEM_RD_RST_2 : WT; bitpos: [1]; default: 0;
+ *  Set this bit to reset read ram address for CHANNEL2 by accessing transmitter.
+ */
+#define RMT_MEM_RD_RST_2    (BIT(1))
+#define RMT_MEM_RD_RST_2_M  (RMT_MEM_RD_RST_2_V << RMT_MEM_RD_RST_2_S)
+#define RMT_MEM_RD_RST_2_V  0x00000001U
+#define RMT_MEM_RD_RST_2_S  1
+/** RMT_APB_MEM_RST_2 : WT; bitpos: [2]; default: 0;
+ *  Set this bit to reset W/R ram address for CHANNEL2 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_2    (BIT(2))
+#define RMT_APB_MEM_RST_2_M  (RMT_APB_MEM_RST_2_V << RMT_APB_MEM_RST_2_S)
+#define RMT_APB_MEM_RST_2_V  0x00000001U
+#define RMT_APB_MEM_RST_2_S  2
+/** RMT_TX_CONTI_MODE_2 : R/W; bitpos: [3]; default: 0;
+ *  Set this bit to restart transmission  from the first data to the last data in
+ *  CHANNEL2.
+ */
+#define RMT_TX_CONTI_MODE_2    (BIT(3))
+#define RMT_TX_CONTI_MODE_2_M  (RMT_TX_CONTI_MODE_2_V << RMT_TX_CONTI_MODE_2_S)
+#define RMT_TX_CONTI_MODE_2_V  0x00000001U
+#define RMT_TX_CONTI_MODE_2_S  3
+/** RMT_MEM_TX_WRAP_EN_2 : R/W; bitpos: [4]; default: 0;
+ *  This is the channel 2 enable bit for wraparound mode: it will resume sending at the
+ *  start when the data to be sent is more than its memory size.
+ */
+#define RMT_MEM_TX_WRAP_EN_2    (BIT(4))
+#define RMT_MEM_TX_WRAP_EN_2_M  (RMT_MEM_TX_WRAP_EN_2_V << RMT_MEM_TX_WRAP_EN_2_S)
+#define RMT_MEM_TX_WRAP_EN_2_V  0x00000001U
+#define RMT_MEM_TX_WRAP_EN_2_S  4
+/** RMT_IDLE_OUT_LV_2 : R/W; bitpos: [5]; default: 0;
+ *  This bit configures the level of output signal in CHANNEL2 when the latter is in
+ *  IDLE state.
+ */
+#define RMT_IDLE_OUT_LV_2    (BIT(5))
+#define RMT_IDLE_OUT_LV_2_M  (RMT_IDLE_OUT_LV_2_V << RMT_IDLE_OUT_LV_2_S)
+#define RMT_IDLE_OUT_LV_2_V  0x00000001U
+#define RMT_IDLE_OUT_LV_2_S  5
+/** RMT_IDLE_OUT_EN_2 : R/W; bitpos: [6]; default: 0;
+ *  This is the output enable-control bit for CHANNEL2 in IDLE state.
+ */
+#define RMT_IDLE_OUT_EN_2    (BIT(6))
+#define RMT_IDLE_OUT_EN_2_M  (RMT_IDLE_OUT_EN_2_V << RMT_IDLE_OUT_EN_2_S)
+#define RMT_IDLE_OUT_EN_2_V  0x00000001U
+#define RMT_IDLE_OUT_EN_2_S  6
+/** RMT_TX_STOP_2 : R/W/SC; bitpos: [7]; default: 0;
+ *  Set this bit to stop the transmitter of CHANNEL2 sending data out.
+ */
+#define RMT_TX_STOP_2    (BIT(7))
+#define RMT_TX_STOP_2_M  (RMT_TX_STOP_2_V << RMT_TX_STOP_2_S)
+#define RMT_TX_STOP_2_V  0x00000001U
+#define RMT_TX_STOP_2_S  7
+/** RMT_DIV_CNT_2 : R/W; bitpos: [15:8]; default: 2;
+ *  This register is used to configure the divider for clock of CHANNEL2.
+ */
+#define RMT_DIV_CNT_2    0x000000FFU
+#define RMT_DIV_CNT_2_M  (RMT_DIV_CNT_2_V << RMT_DIV_CNT_2_S)
+#define RMT_DIV_CNT_2_V  0x000000FFU
+#define RMT_DIV_CNT_2_S  8
+/** RMT_MEM_SIZE_2 : R/W; bitpos: [19:16]; default: 1;
+ *  This register is used to configure the maximum size of memory allocated to CHANNEL2.
+ */
+#define RMT_MEM_SIZE_2    0x0000000FU
+#define RMT_MEM_SIZE_2_M  (RMT_MEM_SIZE_2_V << RMT_MEM_SIZE_2_S)
+#define RMT_MEM_SIZE_2_V  0x0000000FU
+#define RMT_MEM_SIZE_2_S  16
+/** RMT_CARRIER_EFF_EN_2 : R/W; bitpos: [20]; default: 1;
+ *  1: Add carrier modulation on the output signal only at the send data state for
+ *  CHANNEL2. 0: Add carrier modulation on the output signal at all state for CHANNEL2.
+ *  Only valid when RMT_CARRIER_EN_CH2 is 1.
+ */
+#define RMT_CARRIER_EFF_EN_2    (BIT(20))
+#define RMT_CARRIER_EFF_EN_2_M  (RMT_CARRIER_EFF_EN_2_V << RMT_CARRIER_EFF_EN_2_S)
+#define RMT_CARRIER_EFF_EN_2_V  0x00000001U
+#define RMT_CARRIER_EFF_EN_2_S  20
+/** RMT_CARRIER_EN_2 : R/W; bitpos: [21]; default: 1;
+ *  This is the carrier modulation enable-control bit for CHANNEL2. 1: Add carrier
+ *  modulation in the output signal. 0: No carrier modulation in sig_out.
+ */
+#define RMT_CARRIER_EN_2    (BIT(21))
+#define RMT_CARRIER_EN_2_M  (RMT_CARRIER_EN_2_V << RMT_CARRIER_EN_2_S)
+#define RMT_CARRIER_EN_2_V  0x00000001U
+#define RMT_CARRIER_EN_2_S  21
+/** RMT_CARRIER_OUT_LV_2 : R/W; bitpos: [22]; default: 1;
+ *  This bit is used to configure the position of carrier wave for CHANNEL2.
+ *
+ *  1'h0: add carrier wave on low level.
+ *
+ *  1'h1: add carrier wave on high level.
+ */
+#define RMT_CARRIER_OUT_LV_2    (BIT(22))
+#define RMT_CARRIER_OUT_LV_2_M  (RMT_CARRIER_OUT_LV_2_V << RMT_CARRIER_OUT_LV_2_S)
+#define RMT_CARRIER_OUT_LV_2_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_2_S  22
+/** RMT_AFIFO_RST_2 : WT; bitpos: [23]; default: 0;
+ *  Reserved
+ */
+#define RMT_AFIFO_RST_2    (BIT(23))
+#define RMT_AFIFO_RST_2_M  (RMT_AFIFO_RST_2_V << RMT_AFIFO_RST_2_S)
+#define RMT_AFIFO_RST_2_V  0x00000001U
+#define RMT_AFIFO_RST_2_S  23
+/** RMT_CONF_UPDATE_2 : WT; bitpos: [24]; default: 0;
+ *  synchronization bit for CHANNEL2
+ */
+#define RMT_CONF_UPDATE_2    (BIT(24))
+#define RMT_CONF_UPDATE_2_M  (RMT_CONF_UPDATE_2_V << RMT_CONF_UPDATE_2_S)
+#define RMT_CONF_UPDATE_2_V  0x00000001U
+#define RMT_CONF_UPDATE_2_S  24
+
+/** RMT_CH3CONF0_REG register
+ *  Channel 3 configure register 0
+ */
+#define RMT_CH3CONF0_REG (DR_REG_RMT_BASE + 0x2c)
+/** RMT_TX_START_3 : WT; bitpos: [0]; default: 0;
+ *  Set this bit to start sending data on CHANNEL3.
+ */
+#define RMT_TX_START_3    (BIT(0))
+#define RMT_TX_START_3_M  (RMT_TX_START_3_V << RMT_TX_START_3_S)
+#define RMT_TX_START_3_V  0x00000001U
+#define RMT_TX_START_3_S  0
+/** RMT_MEM_RD_RST_3 : WT; bitpos: [1]; default: 0;
+ *  Set this bit to reset read ram address for CHANNEL3 by accessing transmitter.
+ */
+#define RMT_MEM_RD_RST_3    (BIT(1))
+#define RMT_MEM_RD_RST_3_M  (RMT_MEM_RD_RST_3_V << RMT_MEM_RD_RST_3_S)
+#define RMT_MEM_RD_RST_3_V  0x00000001U
+#define RMT_MEM_RD_RST_3_S  1
+/** RMT_APB_MEM_RST_3 : WT; bitpos: [2]; default: 0;
+ *  Set this bit to reset W/R ram address for CHANNEL3 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_3    (BIT(2))
+#define RMT_APB_MEM_RST_3_M  (RMT_APB_MEM_RST_3_V << RMT_APB_MEM_RST_3_S)
+#define RMT_APB_MEM_RST_3_V  0x00000001U
+#define RMT_APB_MEM_RST_3_S  2
+/** RMT_TX_CONTI_MODE_3 : R/W; bitpos: [3]; default: 0;
+ *  Set this bit to restart transmission  from the first data to the last data in
+ *  CHANNEL3.
+ */
+#define RMT_TX_CONTI_MODE_3    (BIT(3))
+#define RMT_TX_CONTI_MODE_3_M  (RMT_TX_CONTI_MODE_3_V << RMT_TX_CONTI_MODE_3_S)
+#define RMT_TX_CONTI_MODE_3_V  0x00000001U
+#define RMT_TX_CONTI_MODE_3_S  3
+/** RMT_MEM_TX_WRAP_EN_3 : R/W; bitpos: [4]; default: 0;
+ *  This is the channel 3 enable bit for wraparound mode: it will resume sending at the
+ *  start when the data to be sent is more than its memory size.
+ */
+#define RMT_MEM_TX_WRAP_EN_3    (BIT(4))
+#define RMT_MEM_TX_WRAP_EN_3_M  (RMT_MEM_TX_WRAP_EN_3_V << RMT_MEM_TX_WRAP_EN_3_S)
+#define RMT_MEM_TX_WRAP_EN_3_V  0x00000001U
+#define RMT_MEM_TX_WRAP_EN_3_S  4
+/** RMT_IDLE_OUT_LV_3 : R/W; bitpos: [5]; default: 0;
+ *  This bit configures the level of output signal in CHANNEL3 when the latter is in
+ *  IDLE state.
+ */
+#define RMT_IDLE_OUT_LV_3    (BIT(5))
+#define RMT_IDLE_OUT_LV_3_M  (RMT_IDLE_OUT_LV_3_V << RMT_IDLE_OUT_LV_3_S)
+#define RMT_IDLE_OUT_LV_3_V  0x00000001U
+#define RMT_IDLE_OUT_LV_3_S  5
+/** RMT_IDLE_OUT_EN_3 : R/W; bitpos: [6]; default: 0;
+ *  This is the output enable-control bit for CHANNEL3 in IDLE state.
+ */
+#define RMT_IDLE_OUT_EN_3    (BIT(6))
+#define RMT_IDLE_OUT_EN_3_M  (RMT_IDLE_OUT_EN_3_V << RMT_IDLE_OUT_EN_3_S)
+#define RMT_IDLE_OUT_EN_3_V  0x00000001U
+#define RMT_IDLE_OUT_EN_3_S  6
+/** RMT_TX_STOP_3 : R/W/SC; bitpos: [7]; default: 0;
+ *  Set this bit to stop the transmitter of CHANNEL3 sending data out.
+ */
+#define RMT_TX_STOP_3    (BIT(7))
+#define RMT_TX_STOP_3_M  (RMT_TX_STOP_3_V << RMT_TX_STOP_3_S)
+#define RMT_TX_STOP_3_V  0x00000001U
+#define RMT_TX_STOP_3_S  7
+/** RMT_DIV_CNT_3 : R/W; bitpos: [15:8]; default: 2;
+ *  This register is used to configure the divider for clock of CHANNEL3.
+ */
+#define RMT_DIV_CNT_3    0x000000FFU
+#define RMT_DIV_CNT_3_M  (RMT_DIV_CNT_3_V << RMT_DIV_CNT_3_S)
+#define RMT_DIV_CNT_3_V  0x000000FFU
+#define RMT_DIV_CNT_3_S  8
+/** RMT_MEM_SIZE_3 : R/W; bitpos: [19:16]; default: 1;
+ *  This register is used to configure the maximum size of memory allocated to CHANNEL3.
+ */
+#define RMT_MEM_SIZE_3    0x0000000FU
+#define RMT_MEM_SIZE_3_M  (RMT_MEM_SIZE_3_V << RMT_MEM_SIZE_3_S)
+#define RMT_MEM_SIZE_3_V  0x0000000FU
+#define RMT_MEM_SIZE_3_S  16
+/** RMT_CARRIER_EFF_EN_3 : R/W; bitpos: [20]; default: 1;
+ *  1: Add carrier modulation on the output signal only at the send data state for
+ *  CHANNEL3. 0: Add carrier modulation on the output signal at all state for CHANNEL3.
+ *  Only valid when RMT_CARRIER_EN_CH3 is 1.
+ */
+#define RMT_CARRIER_EFF_EN_3    (BIT(20))
+#define RMT_CARRIER_EFF_EN_3_M  (RMT_CARRIER_EFF_EN_3_V << RMT_CARRIER_EFF_EN_3_S)
+#define RMT_CARRIER_EFF_EN_3_V  0x00000001U
+#define RMT_CARRIER_EFF_EN_3_S  20
+/** RMT_CARRIER_EN_3 : R/W; bitpos: [21]; default: 1;
+ *  This is the carrier modulation enable-control bit for CHANNEL3. 1: Add carrier
+ *  modulation in the output signal. 0: No carrier modulation in sig_out.
+ */
+#define RMT_CARRIER_EN_3    (BIT(21))
+#define RMT_CARRIER_EN_3_M  (RMT_CARRIER_EN_3_V << RMT_CARRIER_EN_3_S)
+#define RMT_CARRIER_EN_3_V  0x00000001U
+#define RMT_CARRIER_EN_3_S  21
+/** RMT_CARRIER_OUT_LV_3 : R/W; bitpos: [22]; default: 1;
+ *  This bit is used to configure the position of carrier wave for CHANNEL3.
+ *
+ *  1'h0: add carrier wave on low level.
+ *
+ *  1'h1: add carrier wave on high level.
+ */
+#define RMT_CARRIER_OUT_LV_3    (BIT(22))
+#define RMT_CARRIER_OUT_LV_3_M  (RMT_CARRIER_OUT_LV_3_V << RMT_CARRIER_OUT_LV_3_S)
+#define RMT_CARRIER_OUT_LV_3_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_3_S  22
+/** RMT_AFIFO_RST_3 : WT; bitpos: [23]; default: 0;
+ *  Reserved
+ */
+#define RMT_AFIFO_RST_3    (BIT(23))
+#define RMT_AFIFO_RST_3_M  (RMT_AFIFO_RST_3_V << RMT_AFIFO_RST_3_S)
+#define RMT_AFIFO_RST_3_V  0x00000001U
+#define RMT_AFIFO_RST_3_S  23
+/** RMT_CONF_UPDATE_3 : WT; bitpos: [24]; default: 0;
+ *  synchronization bit for CHANNEL3
+ */
+#define RMT_CONF_UPDATE_3    (BIT(24))
+#define RMT_CONF_UPDATE_3_M  (RMT_CONF_UPDATE_3_V << RMT_CONF_UPDATE_3_S)
+#define RMT_CONF_UPDATE_3_V  0x00000001U
+#define RMT_CONF_UPDATE_3_S  24
+
+/** RMT_CH4CONF0_REG register
+ *  Channel 4 configure register 0
+ */
+#define RMT_CH4CONF0_REG (DR_REG_RMT_BASE + 0x30)
+/** RMT_DIV_CNT_4 : R/W; bitpos: [7:0]; default: 2;
+ *  This register is used to configure the divider for clock of CHANNEL4.
+ */
+#define RMT_DIV_CNT_4    0x000000FFU
+#define RMT_DIV_CNT_4_M  (RMT_DIV_CNT_4_V << RMT_DIV_CNT_4_S)
+#define RMT_DIV_CNT_4_V  0x000000FFU
+#define RMT_DIV_CNT_4_S  0
+/** RMT_IDLE_THRES_4 : R/W; bitpos: [22:8]; default: 32767;
+ *  When no edge is detected on the input signal and continuous clock cycles is longer
+ *  than this register value, received process is finished.
+ */
+#define RMT_IDLE_THRES_4    0x00007FFFU
+#define RMT_IDLE_THRES_4_M  (RMT_IDLE_THRES_4_V << RMT_IDLE_THRES_4_S)
+#define RMT_IDLE_THRES_4_V  0x00007FFFU
+#define RMT_IDLE_THRES_4_S  8
+/** RMT_MEM_SIZE_4 : R/W; bitpos: [27:24]; default: 1;
+ *  This register is used to configure the maximum size of memory allocated to CHANNEL4.
+ */
+#define RMT_MEM_SIZE_4    0x0000000FU
+#define RMT_MEM_SIZE_4_M  (RMT_MEM_SIZE_4_V << RMT_MEM_SIZE_4_S)
+#define RMT_MEM_SIZE_4_V  0x0000000FU
+#define RMT_MEM_SIZE_4_S  24
+/** RMT_CARRIER_EN_4 : R/W; bitpos: [28]; default: 1;
+ *  This is the carrier modulation enable-control bit for CHANNEL4. 1: Add carrier
+ *  modulation in the output signal. 0: No carrier modulation in sig_out.
+ */
+#define RMT_CARRIER_EN_4    (BIT(28))
+#define RMT_CARRIER_EN_4_M  (RMT_CARRIER_EN_4_V << RMT_CARRIER_EN_4_S)
+#define RMT_CARRIER_EN_4_V  0x00000001U
+#define RMT_CARRIER_EN_4_S  28
+/** RMT_CARRIER_OUT_LV_4 : R/W; bitpos: [29]; default: 1;
+ *  This bit is used to configure the position of carrier wave for CHANNEL4.
+ *
+ *  1'h0: add carrier wave on low level.
+ *
+ *  1'h1: add carrier wave on high level.
+ */
+#define RMT_CARRIER_OUT_LV_4    (BIT(29))
+#define RMT_CARRIER_OUT_LV_4_M  (RMT_CARRIER_OUT_LV_4_V << RMT_CARRIER_OUT_LV_4_S)
+#define RMT_CARRIER_OUT_LV_4_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_4_S  29
+
+/** RMT_CH4CONF1_REG register
+ *  Channel 4 configure register 1
+ */
+#define RMT_CH4CONF1_REG (DR_REG_RMT_BASE + 0x34)
+/** RMT_RX_EN_4 : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to enable receiver to receive data on CHANNEL4.
+ */
+#define RMT_RX_EN_4    (BIT(0))
+#define RMT_RX_EN_4_M  (RMT_RX_EN_4_V << RMT_RX_EN_4_S)
+#define RMT_RX_EN_4_V  0x00000001U
+#define RMT_RX_EN_4_S  0
+/** RMT_MEM_WR_RST_4 : WT; bitpos: [1]; default: 0;
+ *  Set this bit to reset write ram address for CHANNEL4 by accessing receiver.
+ */
+#define RMT_MEM_WR_RST_4    (BIT(1))
+#define RMT_MEM_WR_RST_4_M  (RMT_MEM_WR_RST_4_V << RMT_MEM_WR_RST_4_S)
+#define RMT_MEM_WR_RST_4_V  0x00000001U
+#define RMT_MEM_WR_RST_4_S  1
+/** RMT_APB_MEM_RST_4 : WT; bitpos: [2]; default: 0;
+ *  Set this bit to reset W/R ram address for CHANNEL4 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_4    (BIT(2))
+#define RMT_APB_MEM_RST_4_M  (RMT_APB_MEM_RST_4_V << RMT_APB_MEM_RST_4_S)
+#define RMT_APB_MEM_RST_4_V  0x00000001U
+#define RMT_APB_MEM_RST_4_S  2
+/** RMT_MEM_OWNER_4 : R/W/SC; bitpos: [3]; default: 1;
+ *  This register marks the ownership of CHANNEL4's ram block.
+ *
+ *  1'h1: Receiver is using the ram.
+ *
+ *  1'h0: APB bus is using the ram.
+ */
+#define RMT_MEM_OWNER_4    (BIT(3))
+#define RMT_MEM_OWNER_4_M  (RMT_MEM_OWNER_4_V << RMT_MEM_OWNER_4_S)
+#define RMT_MEM_OWNER_4_V  0x00000001U
+#define RMT_MEM_OWNER_4_S  3
+/** RMT_RX_FILTER_EN_4 : R/W; bitpos: [4]; default: 0;
+ *  This is the receive filter's enable bit for CHANNEL4.
+ */
+#define RMT_RX_FILTER_EN_4    (BIT(4))
+#define RMT_RX_FILTER_EN_4_M  (RMT_RX_FILTER_EN_4_V << RMT_RX_FILTER_EN_4_S)
+#define RMT_RX_FILTER_EN_4_V  0x00000001U
+#define RMT_RX_FILTER_EN_4_S  4
+/** RMT_RX_FILTER_THRES_4 : R/W; bitpos: [12:5]; default: 15;
+ *  Ignores the input pulse when its width is smaller than this register value in APB
+ *  clock periods (in receive mode).
+ */
+#define RMT_RX_FILTER_THRES_4    0x000000FFU
+#define RMT_RX_FILTER_THRES_4_M  (RMT_RX_FILTER_THRES_4_V << RMT_RX_FILTER_THRES_4_S)
+#define RMT_RX_FILTER_THRES_4_V  0x000000FFU
+#define RMT_RX_FILTER_THRES_4_S  5
+/** RMT_MEM_RX_WRAP_EN_4 : R/W; bitpos: [13]; default: 0;
+ *  This is the channel 4 enable bit for wraparound mode: it will resume receiving at
+ *  the start when the data to be received is more than its memory size.
+ */
+#define RMT_MEM_RX_WRAP_EN_4    (BIT(13))
+#define RMT_MEM_RX_WRAP_EN_4_M  (RMT_MEM_RX_WRAP_EN_4_V << RMT_MEM_RX_WRAP_EN_4_S)
+#define RMT_MEM_RX_WRAP_EN_4_V  0x00000001U
+#define RMT_MEM_RX_WRAP_EN_4_S  13
+/** RMT_AFIFO_RST_4 : WT; bitpos: [14]; default: 0;
+ *  Reserved
+ */
+#define RMT_AFIFO_RST_4    (BIT(14))
+#define RMT_AFIFO_RST_4_M  (RMT_AFIFO_RST_4_V << RMT_AFIFO_RST_4_S)
+#define RMT_AFIFO_RST_4_V  0x00000001U
+#define RMT_AFIFO_RST_4_S  14
+/** RMT_CONF_UPDATE_4 : WT; bitpos: [15]; default: 0;
+ *  synchronization bit for CHANNEL4
+ */
+#define RMT_CONF_UPDATE_4    (BIT(15))
+#define RMT_CONF_UPDATE_4_M  (RMT_CONF_UPDATE_4_V << RMT_CONF_UPDATE_4_S)
+#define RMT_CONF_UPDATE_4_V  0x00000001U
+#define RMT_CONF_UPDATE_4_S  15
+
+/** RMT_CH5CONF0_REG register
+ *  Channel 5 configure register 0
+ */
+#define RMT_CH5CONF0_REG (DR_REG_RMT_BASE + 0x38)
+/** RMT_DIV_CNT_5 : R/W; bitpos: [7:0]; default: 2;
+ *  This register is used to configure the divider for clock of CHANNEL5.
+ */
+#define RMT_DIV_CNT_5    0x000000FFU
+#define RMT_DIV_CNT_5_M  (RMT_DIV_CNT_5_V << RMT_DIV_CNT_5_S)
+#define RMT_DIV_CNT_5_V  0x000000FFU
+#define RMT_DIV_CNT_5_S  0
+/** RMT_IDLE_THRES_5 : R/W; bitpos: [22:8]; default: 32767;
+ *  When no edge is detected on the input signal and continuous clock cycles is longer
+ *  than this register value, received process is finished.
+ */
+#define RMT_IDLE_THRES_5    0x00007FFFU
+#define RMT_IDLE_THRES_5_M  (RMT_IDLE_THRES_5_V << RMT_IDLE_THRES_5_S)
+#define RMT_IDLE_THRES_5_V  0x00007FFFU
+#define RMT_IDLE_THRES_5_S  8
+/** RMT_MEM_SIZE_5 : R/W; bitpos: [27:24]; default: 1;
+ *  This register is used to configure the maximum size of memory allocated to CHANNEL5.
+ */
+#define RMT_MEM_SIZE_5    0x0000000FU
+#define RMT_MEM_SIZE_5_M  (RMT_MEM_SIZE_5_V << RMT_MEM_SIZE_5_S)
+#define RMT_MEM_SIZE_5_V  0x0000000FU
+#define RMT_MEM_SIZE_5_S  24
+/** RMT_CARRIER_EN_5 : R/W; bitpos: [28]; default: 1;
+ *  This is the carrier modulation enable-control bit for CHANNEL5. 1: Add carrier
+ *  modulation in the output signal. 0: No carrier modulation in sig_out.
+ */
+#define RMT_CARRIER_EN_5    (BIT(28))
+#define RMT_CARRIER_EN_5_M  (RMT_CARRIER_EN_5_V << RMT_CARRIER_EN_5_S)
+#define RMT_CARRIER_EN_5_V  0x00000001U
+#define RMT_CARRIER_EN_5_S  28
+/** RMT_CARRIER_OUT_LV_5 : R/W; bitpos: [29]; default: 1;
+ *  This bit is used to configure the position of carrier wave for CHANNEL5.
+ *
+ *  1'h0: add carrier wave on low level.
+ *
+ *  1'h1: add carrier wave on high level.
+ */
+#define RMT_CARRIER_OUT_LV_5    (BIT(29))
+#define RMT_CARRIER_OUT_LV_5_M  (RMT_CARRIER_OUT_LV_5_V << RMT_CARRIER_OUT_LV_5_S)
+#define RMT_CARRIER_OUT_LV_5_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_5_S  29
+
+/** RMT_CH5CONF1_REG register
+ *  Channel 5 configure register 1
+ */
+#define RMT_CH5CONF1_REG (DR_REG_RMT_BASE + 0x3c)
+/** RMT_RX_EN_5 : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to enable receiver to receive data on CHANNEL5.
+ */
+#define RMT_RX_EN_5    (BIT(0))
+#define RMT_RX_EN_5_M  (RMT_RX_EN_5_V << RMT_RX_EN_5_S)
+#define RMT_RX_EN_5_V  0x00000001U
+#define RMT_RX_EN_5_S  0
+/** RMT_MEM_WR_RST_5 : WT; bitpos: [1]; default: 0;
+ *  Set this bit to reset write ram address for CHANNEL5 by accessing receiver.
+ */
+#define RMT_MEM_WR_RST_5    (BIT(1))
+#define RMT_MEM_WR_RST_5_M  (RMT_MEM_WR_RST_5_V << RMT_MEM_WR_RST_5_S)
+#define RMT_MEM_WR_RST_5_V  0x00000001U
+#define RMT_MEM_WR_RST_5_S  1
+/** RMT_APB_MEM_RST_5 : WT; bitpos: [2]; default: 0;
+ *  Set this bit to reset W/R ram address for CHANNEL5 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_5    (BIT(2))
+#define RMT_APB_MEM_RST_5_M  (RMT_APB_MEM_RST_5_V << RMT_APB_MEM_RST_5_S)
+#define RMT_APB_MEM_RST_5_V  0x00000001U
+#define RMT_APB_MEM_RST_5_S  2
+/** RMT_MEM_OWNER_5 : R/W/SC; bitpos: [3]; default: 1;
+ *  This register marks the ownership of CHANNEL5's ram block.
+ *
+ *  1'h1: Receiver is using the ram.
+ *
+ *  1'h0: APB bus is using the ram.
+ */
+#define RMT_MEM_OWNER_5    (BIT(3))
+#define RMT_MEM_OWNER_5_M  (RMT_MEM_OWNER_5_V << RMT_MEM_OWNER_5_S)
+#define RMT_MEM_OWNER_5_V  0x00000001U
+#define RMT_MEM_OWNER_5_S  3
+/** RMT_RX_FILTER_EN_5 : R/W; bitpos: [4]; default: 0;
+ *  This is the receive filter's enable bit for CHANNEL5.
+ */
+#define RMT_RX_FILTER_EN_5    (BIT(4))
+#define RMT_RX_FILTER_EN_5_M  (RMT_RX_FILTER_EN_5_V << RMT_RX_FILTER_EN_5_S)
+#define RMT_RX_FILTER_EN_5_V  0x00000001U
+#define RMT_RX_FILTER_EN_5_S  4
+/** RMT_RX_FILTER_THRES_5 : R/W; bitpos: [12:5]; default: 15;
+ *  Ignores the input pulse when its width is smaller than this register value in APB
+ *  clock periods (in receive mode).
+ */
+#define RMT_RX_FILTER_THRES_5    0x000000FFU
+#define RMT_RX_FILTER_THRES_5_M  (RMT_RX_FILTER_THRES_5_V << RMT_RX_FILTER_THRES_5_S)
+#define RMT_RX_FILTER_THRES_5_V  0x000000FFU
+#define RMT_RX_FILTER_THRES_5_S  5
+/** RMT_MEM_RX_WRAP_EN_5 : R/W; bitpos: [13]; default: 0;
+ *  This is the channel 5 enable bit for wraparound mode: it will resume receiving at
+ *  the start when the data to be received is more than its memory size.
+ */
+#define RMT_MEM_RX_WRAP_EN_5    (BIT(13))
+#define RMT_MEM_RX_WRAP_EN_5_M  (RMT_MEM_RX_WRAP_EN_5_V << RMT_MEM_RX_WRAP_EN_5_S)
+#define RMT_MEM_RX_WRAP_EN_5_V  0x00000001U
+#define RMT_MEM_RX_WRAP_EN_5_S  13
+/** RMT_AFIFO_RST_5 : WT; bitpos: [14]; default: 0;
+ *  Reserved
+ */
+#define RMT_AFIFO_RST_5    (BIT(14))
+#define RMT_AFIFO_RST_5_M  (RMT_AFIFO_RST_5_V << RMT_AFIFO_RST_5_S)
+#define RMT_AFIFO_RST_5_V  0x00000001U
+#define RMT_AFIFO_RST_5_S  14
+/** RMT_CONF_UPDATE_5 : WT; bitpos: [15]; default: 0;
+ *  synchronization bit for CHANNEL5
+ */
+#define RMT_CONF_UPDATE_5    (BIT(15))
+#define RMT_CONF_UPDATE_5_M  (RMT_CONF_UPDATE_5_V << RMT_CONF_UPDATE_5_S)
+#define RMT_CONF_UPDATE_5_V  0x00000001U
+#define RMT_CONF_UPDATE_5_S  15
+
+/** RMT_CH6CONF0_REG register
+ *  Channel 6 configure register 0
+ */
+#define RMT_CH6CONF0_REG (DR_REG_RMT_BASE + 0x40)
+/** RMT_DIV_CNT_6 : R/W; bitpos: [7:0]; default: 2;
+ *  This register is used to configure the divider for clock of CHANNEL6.
+ */
+#define RMT_DIV_CNT_6    0x000000FFU
+#define RMT_DIV_CNT_6_M  (RMT_DIV_CNT_6_V << RMT_DIV_CNT_6_S)
+#define RMT_DIV_CNT_6_V  0x000000FFU
+#define RMT_DIV_CNT_6_S  0
+/** RMT_IDLE_THRES_6 : R/W; bitpos: [22:8]; default: 32767;
+ *  When no edge is detected on the input signal and continuous clock cycles is longer
+ *  than this register value, received process is finished.
+ */
+#define RMT_IDLE_THRES_6    0x00007FFFU
+#define RMT_IDLE_THRES_6_M  (RMT_IDLE_THRES_6_V << RMT_IDLE_THRES_6_S)
+#define RMT_IDLE_THRES_6_V  0x00007FFFU
+#define RMT_IDLE_THRES_6_S  8
+/** RMT_MEM_SIZE_6 : R/W; bitpos: [27:24]; default: 1;
+ *  This register is used to configure the maximum size of memory allocated to CHANNEL6.
+ */
+#define RMT_MEM_SIZE_6    0x0000000FU
+#define RMT_MEM_SIZE_6_M  (RMT_MEM_SIZE_6_V << RMT_MEM_SIZE_6_S)
+#define RMT_MEM_SIZE_6_V  0x0000000FU
+#define RMT_MEM_SIZE_6_S  24
+/** RMT_CARRIER_EN_6 : R/W; bitpos: [28]; default: 1;
+ *  This is the carrier modulation enable-control bit for CHANNEL6. 1: Add carrier
+ *  modulation in the output signal. 0: No carrier modulation in sig_out.
+ */
+#define RMT_CARRIER_EN_6    (BIT(28))
+#define RMT_CARRIER_EN_6_M  (RMT_CARRIER_EN_6_V << RMT_CARRIER_EN_6_S)
+#define RMT_CARRIER_EN_6_V  0x00000001U
+#define RMT_CARRIER_EN_6_S  28
+/** RMT_CARRIER_OUT_LV_6 : R/W; bitpos: [29]; default: 1;
+ *  This bit is used to configure the position of carrier wave for CHANNEL6.
+ *
+ *  1'h0: add carrier wave on low level.
+ *
+ *  1'h1: add carrier wave on high level.
+ */
+#define RMT_CARRIER_OUT_LV_6    (BIT(29))
+#define RMT_CARRIER_OUT_LV_6_M  (RMT_CARRIER_OUT_LV_6_V << RMT_CARRIER_OUT_LV_6_S)
+#define RMT_CARRIER_OUT_LV_6_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_6_S  29
+
+/** RMT_CH6CONF1_REG register
+ *  Channel 6 configure register 1
+ */
+#define RMT_CH6CONF1_REG (DR_REG_RMT_BASE + 0x44)
+/** RMT_RX_EN_6 : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to enable receiver to receive data on CHANNEL6.
+ */
+#define RMT_RX_EN_6    (BIT(0))
+#define RMT_RX_EN_6_M  (RMT_RX_EN_6_V << RMT_RX_EN_6_S)
+#define RMT_RX_EN_6_V  0x00000001U
+#define RMT_RX_EN_6_S  0
+/** RMT_MEM_WR_RST_6 : WT; bitpos: [1]; default: 0;
+ *  Set this bit to reset write ram address for CHANNEL6 by accessing receiver.
+ */
+#define RMT_MEM_WR_RST_6    (BIT(1))
+#define RMT_MEM_WR_RST_6_M  (RMT_MEM_WR_RST_6_V << RMT_MEM_WR_RST_6_S)
+#define RMT_MEM_WR_RST_6_V  0x00000001U
+#define RMT_MEM_WR_RST_6_S  1
+/** RMT_APB_MEM_RST_6 : WT; bitpos: [2]; default: 0;
+ *  Set this bit to reset W/R ram address for CHANNEL6 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_6    (BIT(2))
+#define RMT_APB_MEM_RST_6_M  (RMT_APB_MEM_RST_6_V << RMT_APB_MEM_RST_6_S)
+#define RMT_APB_MEM_RST_6_V  0x00000001U
+#define RMT_APB_MEM_RST_6_S  2
+/** RMT_MEM_OWNER_6 : R/W/SC; bitpos: [3]; default: 1;
+ *  This register marks the ownership of CHANNEL6's ram block.
+ *
+ *  1'h1: Receiver is using the ram.
+ *
+ *  1'h0: APB bus is using the ram.
+ */
+#define RMT_MEM_OWNER_6    (BIT(3))
+#define RMT_MEM_OWNER_6_M  (RMT_MEM_OWNER_6_V << RMT_MEM_OWNER_6_S)
+#define RMT_MEM_OWNER_6_V  0x00000001U
+#define RMT_MEM_OWNER_6_S  3
+/** RMT_RX_FILTER_EN_6 : R/W; bitpos: [4]; default: 0;
+ *  This is the receive filter's enable bit for CHANNEL6.
+ */
+#define RMT_RX_FILTER_EN_6    (BIT(4))
+#define RMT_RX_FILTER_EN_6_M  (RMT_RX_FILTER_EN_6_V << RMT_RX_FILTER_EN_6_S)
+#define RMT_RX_FILTER_EN_6_V  0x00000001U
+#define RMT_RX_FILTER_EN_6_S  4
+/** RMT_RX_FILTER_THRES_6 : R/W; bitpos: [12:5]; default: 15;
+ *  Ignores the input pulse when its width is smaller than this register value in APB
+ *  clock periods (in receive mode).
+ */
+#define RMT_RX_FILTER_THRES_6    0x000000FFU
+#define RMT_RX_FILTER_THRES_6_M  (RMT_RX_FILTER_THRES_6_V << RMT_RX_FILTER_THRES_6_S)
+#define RMT_RX_FILTER_THRES_6_V  0x000000FFU
+#define RMT_RX_FILTER_THRES_6_S  5
+/** RMT_MEM_RX_WRAP_EN_6 : R/W; bitpos: [13]; default: 0;
+ *  This is the channel 6 enable bit for wraparound mode: it will resume receiving at
+ *  the start when the data to be received is more than its memory size.
+ */
+#define RMT_MEM_RX_WRAP_EN_6    (BIT(13))
+#define RMT_MEM_RX_WRAP_EN_6_M  (RMT_MEM_RX_WRAP_EN_6_V << RMT_MEM_RX_WRAP_EN_6_S)
+#define RMT_MEM_RX_WRAP_EN_6_V  0x00000001U
+#define RMT_MEM_RX_WRAP_EN_6_S  13
+/** RMT_AFIFO_RST_6 : WT; bitpos: [14]; default: 0;
+ *  Reserved
+ */
+#define RMT_AFIFO_RST_6    (BIT(14))
+#define RMT_AFIFO_RST_6_M  (RMT_AFIFO_RST_6_V << RMT_AFIFO_RST_6_S)
+#define RMT_AFIFO_RST_6_V  0x00000001U
+#define RMT_AFIFO_RST_6_S  14
+/** RMT_CONF_UPDATE_6 : WT; bitpos: [15]; default: 0;
+ *  synchronization bit for CHANNEL6
+ */
+#define RMT_CONF_UPDATE_6    (BIT(15))
+#define RMT_CONF_UPDATE_6_M  (RMT_CONF_UPDATE_6_V << RMT_CONF_UPDATE_6_S)
+#define RMT_CONF_UPDATE_6_V  0x00000001U
+#define RMT_CONF_UPDATE_6_S  15
+
+/** RMT_CH7CONF0_REG register
+ *  Channel 7 configure register 0
+ */
+#define RMT_CH7CONF0_REG (DR_REG_RMT_BASE + 0x48)
+/** RMT_DIV_CNT_7 : R/W; bitpos: [7:0]; default: 2;
+ *  This register is used to configure the divider for clock of CHANNEL7.
+ */
+#define RMT_DIV_CNT_7    0x000000FFU
+#define RMT_DIV_CNT_7_M  (RMT_DIV_CNT_7_V << RMT_DIV_CNT_7_S)
+#define RMT_DIV_CNT_7_V  0x000000FFU
+#define RMT_DIV_CNT_7_S  0
+/** RMT_IDLE_THRES_7 : R/W; bitpos: [22:8]; default: 32767;
+ *  When no edge is detected on the input signal and continuous clock cycles is longer
+ *  than this register value, received process is finished.
+ */
+#define RMT_IDLE_THRES_7    0x00007FFFU
+#define RMT_IDLE_THRES_7_M  (RMT_IDLE_THRES_7_V << RMT_IDLE_THRES_7_S)
+#define RMT_IDLE_THRES_7_V  0x00007FFFU
+#define RMT_IDLE_THRES_7_S  8
+/** RMT_MEM_SIZE_7 : R/W; bitpos: [27:24]; default: 1;
+ *  This register is used to configure the maximum size of memory allocated to CHANNEL7.
+ */
+#define RMT_MEM_SIZE_7    0x0000000FU
+#define RMT_MEM_SIZE_7_M  (RMT_MEM_SIZE_7_V << RMT_MEM_SIZE_7_S)
+#define RMT_MEM_SIZE_7_V  0x0000000FU
+#define RMT_MEM_SIZE_7_S  24
+/** RMT_CARRIER_EN_7 : R/W; bitpos: [28]; default: 1;
+ *  This is the carrier modulation enable-control bit for CHANNEL7. 1: Add carrier
+ *  modulation in the output signal. 0: No carrier modulation in sig_out.
+ */
+#define RMT_CARRIER_EN_7    (BIT(28))
+#define RMT_CARRIER_EN_7_M  (RMT_CARRIER_EN_7_V << RMT_CARRIER_EN_7_S)
+#define RMT_CARRIER_EN_7_V  0x00000001U
+#define RMT_CARRIER_EN_7_S  28
+/** RMT_CARRIER_OUT_LV_7 : R/W; bitpos: [29]; default: 1;
+ *  This bit is used to configure the position of carrier wave for CHANNEL7.
+ *
+ *  1'h0: add carrier wave on low level.
+ *
+ *  1'h1: add carrier wave on high level.
+ */
+#define RMT_CARRIER_OUT_LV_7    (BIT(29))
+#define RMT_CARRIER_OUT_LV_7_M  (RMT_CARRIER_OUT_LV_7_V << RMT_CARRIER_OUT_LV_7_S)
+#define RMT_CARRIER_OUT_LV_7_V  0x00000001U
+#define RMT_CARRIER_OUT_LV_7_S  29
+
+/** RMT_CH7CONF1_REG register
+ *  Channel 7 configure register 1
+ */
+#define RMT_CH7CONF1_REG (DR_REG_RMT_BASE + 0x4c)
+/** RMT_RX_EN_7 : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to enable receiver to receive data on CHANNEL7.
+ */
+#define RMT_RX_EN_7    (BIT(0))
+#define RMT_RX_EN_7_M  (RMT_RX_EN_7_V << RMT_RX_EN_7_S)
+#define RMT_RX_EN_7_V  0x00000001U
+#define RMT_RX_EN_7_S  0
+/** RMT_MEM_WR_RST_7 : WT; bitpos: [1]; default: 0;
+ *  Set this bit to reset write ram address for CHANNEL7 by accessing receiver.
+ */
+#define RMT_MEM_WR_RST_7    (BIT(1))
+#define RMT_MEM_WR_RST_7_M  (RMT_MEM_WR_RST_7_V << RMT_MEM_WR_RST_7_S)
+#define RMT_MEM_WR_RST_7_V  0x00000001U
+#define RMT_MEM_WR_RST_7_S  1
+/** RMT_APB_MEM_RST_7 : WT; bitpos: [2]; default: 0;
+ *  Set this bit to reset W/R ram address for CHANNEL7 by accessing apb fifo.
+ */
+#define RMT_APB_MEM_RST_7    (BIT(2))
+#define RMT_APB_MEM_RST_7_M  (RMT_APB_MEM_RST_7_V << RMT_APB_MEM_RST_7_S)
+#define RMT_APB_MEM_RST_7_V  0x00000001U
+#define RMT_APB_MEM_RST_7_S  2
+/** RMT_MEM_OWNER_7 : R/W/SC; bitpos: [3]; default: 1;
+ *  This register marks the ownership of CHANNEL7's ram block.
+ *
+ *  1'h1: Receiver is using the ram.
+ *
+ *  1'h0: APB bus is using the ram.
+ */
+#define RMT_MEM_OWNER_7    (BIT(3))
+#define RMT_MEM_OWNER_7_M  (RMT_MEM_OWNER_7_V << RMT_MEM_OWNER_7_S)
+#define RMT_MEM_OWNER_7_V  0x00000001U
+#define RMT_MEM_OWNER_7_S  3
+/** RMT_RX_FILTER_EN_7 : R/W; bitpos: [4]; default: 0;
+ *  This is the receive filter's enable bit for CHANNEL7.
+ */
+#define RMT_RX_FILTER_EN_7    (BIT(4))
+#define RMT_RX_FILTER_EN_7_M  (RMT_RX_FILTER_EN_7_V << RMT_RX_FILTER_EN_7_S)
+#define RMT_RX_FILTER_EN_7_V  0x00000001U
+#define RMT_RX_FILTER_EN_7_S  4
+/** RMT_RX_FILTER_THRES_7 : R/W; bitpos: [12:5]; default: 15;
+ *  Ignores the input pulse when its width is smaller than this register value in APB
+ *  clock periods (in receive mode).
+ */
+#define RMT_RX_FILTER_THRES_7    0x000000FFU
+#define RMT_RX_FILTER_THRES_7_M  (RMT_RX_FILTER_THRES_7_V << RMT_RX_FILTER_THRES_7_S)
+#define RMT_RX_FILTER_THRES_7_V  0x000000FFU
+#define RMT_RX_FILTER_THRES_7_S  5
+/** RMT_MEM_RX_WRAP_EN_7 : R/W; bitpos: [13]; default: 0;
+ *  This is the channel 7 enable bit for wraparound mode: it will resume receiving at
+ *  the start when the data to be received is more than its memory size.
+ */
+#define RMT_MEM_RX_WRAP_EN_7    (BIT(13))
+#define RMT_MEM_RX_WRAP_EN_7_M  (RMT_MEM_RX_WRAP_EN_7_V << RMT_MEM_RX_WRAP_EN_7_S)
+#define RMT_MEM_RX_WRAP_EN_7_V  0x00000001U
+#define RMT_MEM_RX_WRAP_EN_7_S  13
+/** RMT_AFIFO_RST_7 : WT; bitpos: [14]; default: 0;
+ *  Reserved
+ */
+#define RMT_AFIFO_RST_7    (BIT(14))
+#define RMT_AFIFO_RST_7_M  (RMT_AFIFO_RST_7_V << RMT_AFIFO_RST_7_S)
+#define RMT_AFIFO_RST_7_V  0x00000001U
+#define RMT_AFIFO_RST_7_S  14
+/** RMT_CONF_UPDATE_7 : WT; bitpos: [15]; default: 0;
+ *  synchronization bit for CHANNEL7
+ */
+#define RMT_CONF_UPDATE_7    (BIT(15))
+#define RMT_CONF_UPDATE_7_M  (RMT_CONF_UPDATE_7_V << RMT_CONF_UPDATE_7_S)
+#define RMT_CONF_UPDATE_7_V  0x00000001U
+#define RMT_CONF_UPDATE_7_S  15
+
+/** RMT_CH0STATUS_REG register
+ *  Channel 0 status register
+ */
+#define RMT_CH0STATUS_REG (DR_REG_RMT_BASE + 0x50)
+/** RMT_MEM_RADDR_EX_0 : RO; bitpos: [9:0]; default: 0;
+ *  This register records the memory address offset when transmitter of CHANNEL0 is
+ *  using the RAM.
+ */
+#define RMT_MEM_RADDR_EX_0    0x000003FFU
+#define RMT_MEM_RADDR_EX_0_M  (RMT_MEM_RADDR_EX_0_V << RMT_MEM_RADDR_EX_0_S)
+#define RMT_MEM_RADDR_EX_0_V  0x000003FFU
+#define RMT_MEM_RADDR_EX_0_S  0
+/** RMT_APB_MEM_WADDR_0 : RO; bitpos: [20:11]; default: 0;
+ *  This register records the memory address offset when writes RAM over APB bus.
+ */
+#define RMT_APB_MEM_WADDR_0    0x000003FFU
+#define RMT_APB_MEM_WADDR_0_M  (RMT_APB_MEM_WADDR_0_V << RMT_APB_MEM_WADDR_0_S)
+#define RMT_APB_MEM_WADDR_0_V  0x000003FFU
+#define RMT_APB_MEM_WADDR_0_S  11
+/** RMT_STATE_0 : RO; bitpos: [24:22]; default: 0;
+ *  This register records the FSM status of CHANNEL0.
+ */
+#define RMT_STATE_0    0x00000007U
+#define RMT_STATE_0_M  (RMT_STATE_0_V << RMT_STATE_0_S)
+#define RMT_STATE_0_V  0x00000007U
+#define RMT_STATE_0_S  22
+/** RMT_MEM_EMPTY_0 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the data to be set is more than memory size and
+ *  the wraparound mode is disabled.
+ */
+#define RMT_MEM_EMPTY_0    (BIT(25))
+#define RMT_MEM_EMPTY_0_M  (RMT_MEM_EMPTY_0_V << RMT_MEM_EMPTY_0_S)
+#define RMT_MEM_EMPTY_0_V  0x00000001U
+#define RMT_MEM_EMPTY_0_S  25
+/** RMT_APB_MEM_WR_ERR_0 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when writes
+ *  via APB bus.
+ */
+#define RMT_APB_MEM_WR_ERR_0    (BIT(26))
+#define RMT_APB_MEM_WR_ERR_0_M  (RMT_APB_MEM_WR_ERR_0_V << RMT_APB_MEM_WR_ERR_0_S)
+#define RMT_APB_MEM_WR_ERR_0_V  0x00000001U
+#define RMT_APB_MEM_WR_ERR_0_S  26
+
+/** RMT_CH1STATUS_REG register
+ *  Channel 1 status register
+ */
+#define RMT_CH1STATUS_REG (DR_REG_RMT_BASE + 0x54)
+/** RMT_MEM_RADDR_EX_1 : RO; bitpos: [9:0]; default: 0;
+ *  This register records the memory address offset when transmitter of CHANNEL1 is
+ *  using the RAM.
+ */
+#define RMT_MEM_RADDR_EX_1    0x000003FFU
+#define RMT_MEM_RADDR_EX_1_M  (RMT_MEM_RADDR_EX_1_V << RMT_MEM_RADDR_EX_1_S)
+#define RMT_MEM_RADDR_EX_1_V  0x000003FFU
+#define RMT_MEM_RADDR_EX_1_S  0
+/** RMT_APB_MEM_WADDR_1 : RO; bitpos: [20:11]; default: 0;
+ *  This register records the memory address offset when writes RAM over APB bus.
+ */
+#define RMT_APB_MEM_WADDR_1    0x000003FFU
+#define RMT_APB_MEM_WADDR_1_M  (RMT_APB_MEM_WADDR_1_V << RMT_APB_MEM_WADDR_1_S)
+#define RMT_APB_MEM_WADDR_1_V  0x000003FFU
+#define RMT_APB_MEM_WADDR_1_S  11
+/** RMT_STATE_1 : RO; bitpos: [24:22]; default: 0;
+ *  This register records the FSM status of CHANNEL1.
+ */
+#define RMT_STATE_1    0x00000007U
+#define RMT_STATE_1_M  (RMT_STATE_1_V << RMT_STATE_1_S)
+#define RMT_STATE_1_V  0x00000007U
+#define RMT_STATE_1_S  22
+/** RMT_MEM_EMPTY_1 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the data to be set is more than memory size and
+ *  the wraparound mode is disabled.
+ */
+#define RMT_MEM_EMPTY_1    (BIT(25))
+#define RMT_MEM_EMPTY_1_M  (RMT_MEM_EMPTY_1_V << RMT_MEM_EMPTY_1_S)
+#define RMT_MEM_EMPTY_1_V  0x00000001U
+#define RMT_MEM_EMPTY_1_S  25
+/** RMT_APB_MEM_WR_ERR_1 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when writes
+ *  via APB bus.
+ */
+#define RMT_APB_MEM_WR_ERR_1    (BIT(26))
+#define RMT_APB_MEM_WR_ERR_1_M  (RMT_APB_MEM_WR_ERR_1_V << RMT_APB_MEM_WR_ERR_1_S)
+#define RMT_APB_MEM_WR_ERR_1_V  0x00000001U
+#define RMT_APB_MEM_WR_ERR_1_S  26
+
+/** RMT_CH2STATUS_REG register
+ *  Channel 2 status register
+ */
+#define RMT_CH2STATUS_REG (DR_REG_RMT_BASE + 0x58)
+/** RMT_MEM_RADDR_EX_2 : RO; bitpos: [9:0]; default: 0;
+ *  This register records the memory address offset when transmitter of CHANNEL2 is
+ *  using the RAM.
+ */
+#define RMT_MEM_RADDR_EX_2    0x000003FFU
+#define RMT_MEM_RADDR_EX_2_M  (RMT_MEM_RADDR_EX_2_V << RMT_MEM_RADDR_EX_2_S)
+#define RMT_MEM_RADDR_EX_2_V  0x000003FFU
+#define RMT_MEM_RADDR_EX_2_S  0
+/** RMT_APB_MEM_WADDR_2 : RO; bitpos: [20:11]; default: 0;
+ *  This register records the memory address offset when writes RAM over APB bus.
+ */
+#define RMT_APB_MEM_WADDR_2    0x000003FFU
+#define RMT_APB_MEM_WADDR_2_M  (RMT_APB_MEM_WADDR_2_V << RMT_APB_MEM_WADDR_2_S)
+#define RMT_APB_MEM_WADDR_2_V  0x000003FFU
+#define RMT_APB_MEM_WADDR_2_S  11
+/** RMT_STATE_2 : RO; bitpos: [24:22]; default: 0;
+ *  This register records the FSM status of CHANNEL2.
+ */
+#define RMT_STATE_2    0x00000007U
+#define RMT_STATE_2_M  (RMT_STATE_2_V << RMT_STATE_2_S)
+#define RMT_STATE_2_V  0x00000007U
+#define RMT_STATE_2_S  22
+/** RMT_MEM_EMPTY_2 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the data to be set is more than memory size and
+ *  the wraparound mode is disabled.
+ */
+#define RMT_MEM_EMPTY_2    (BIT(25))
+#define RMT_MEM_EMPTY_2_M  (RMT_MEM_EMPTY_2_V << RMT_MEM_EMPTY_2_S)
+#define RMT_MEM_EMPTY_2_V  0x00000001U
+#define RMT_MEM_EMPTY_2_S  25
+/** RMT_APB_MEM_WR_ERR_2 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when writes
+ *  via APB bus.
+ */
+#define RMT_APB_MEM_WR_ERR_2    (BIT(26))
+#define RMT_APB_MEM_WR_ERR_2_M  (RMT_APB_MEM_WR_ERR_2_V << RMT_APB_MEM_WR_ERR_2_S)
+#define RMT_APB_MEM_WR_ERR_2_V  0x00000001U
+#define RMT_APB_MEM_WR_ERR_2_S  26
+
+/** RMT_CH3STATUS_REG register
+ *  Channel 3 status register
+ */
+#define RMT_CH3STATUS_REG (DR_REG_RMT_BASE + 0x5c)
+/** RMT_MEM_RADDR_EX_3 : RO; bitpos: [9:0]; default: 0;
+ *  This register records the memory address offset when transmitter of CHANNEL3 is
+ *  using the RAM.
+ */
+#define RMT_MEM_RADDR_EX_3    0x000003FFU
+#define RMT_MEM_RADDR_EX_3_M  (RMT_MEM_RADDR_EX_3_V << RMT_MEM_RADDR_EX_3_S)
+#define RMT_MEM_RADDR_EX_3_V  0x000003FFU
+#define RMT_MEM_RADDR_EX_3_S  0
+/** RMT_APB_MEM_WADDR_3 : RO; bitpos: [20:11]; default: 0;
+ *  This register records the memory address offset when writes RAM over APB bus.
+ */
+#define RMT_APB_MEM_WADDR_3    0x000003FFU
+#define RMT_APB_MEM_WADDR_3_M  (RMT_APB_MEM_WADDR_3_V << RMT_APB_MEM_WADDR_3_S)
+#define RMT_APB_MEM_WADDR_3_V  0x000003FFU
+#define RMT_APB_MEM_WADDR_3_S  11
+/** RMT_STATE_3 : RO; bitpos: [24:22]; default: 0;
+ *  This register records the FSM status of CHANNEL3.
+ */
+#define RMT_STATE_3    0x00000007U
+#define RMT_STATE_3_M  (RMT_STATE_3_V << RMT_STATE_3_S)
+#define RMT_STATE_3_V  0x00000007U
+#define RMT_STATE_3_S  22
+/** RMT_MEM_EMPTY_3 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the data to be set is more than memory size and
+ *  the wraparound mode is disabled.
+ */
+#define RMT_MEM_EMPTY_3    (BIT(25))
+#define RMT_MEM_EMPTY_3_M  (RMT_MEM_EMPTY_3_V << RMT_MEM_EMPTY_3_S)
+#define RMT_MEM_EMPTY_3_V  0x00000001U
+#define RMT_MEM_EMPTY_3_S  25
+/** RMT_APB_MEM_WR_ERR_3 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when writes
+ *  via APB bus.
+ */
+#define RMT_APB_MEM_WR_ERR_3    (BIT(26))
+#define RMT_APB_MEM_WR_ERR_3_M  (RMT_APB_MEM_WR_ERR_3_V << RMT_APB_MEM_WR_ERR_3_S)
+#define RMT_APB_MEM_WR_ERR_3_V  0x00000001U
+#define RMT_APB_MEM_WR_ERR_3_S  26
+
+/** RMT_CH4STATUS_REG register
+ *  Channel 4 status register
+ */
+#define RMT_CH4STATUS_REG (DR_REG_RMT_BASE + 0x60)
+/** RMT_MEM_WADDR_EX_4 : RO; bitpos: [9:0]; default: 192;
+ *  This register records the memory address offset when receiver of CHANNEL4 is using
+ *  the RAM.
+ */
+#define RMT_MEM_WADDR_EX_4    0x000003FFU
+#define RMT_MEM_WADDR_EX_4_M  (RMT_MEM_WADDR_EX_4_V << RMT_MEM_WADDR_EX_4_S)
+#define RMT_MEM_WADDR_EX_4_V  0x000003FFU
+#define RMT_MEM_WADDR_EX_4_S  0
+/** RMT_APB_MEM_RADDR_4 : RO; bitpos: [20:11]; default: 192;
+ *  This register records the memory address offset when reads RAM over APB bus.
+ */
+#define RMT_APB_MEM_RADDR_4    0x000003FFU
+#define RMT_APB_MEM_RADDR_4_M  (RMT_APB_MEM_RADDR_4_V << RMT_APB_MEM_RADDR_4_S)
+#define RMT_APB_MEM_RADDR_4_V  0x000003FFU
+#define RMT_APB_MEM_RADDR_4_S  11
+/** RMT_STATE_4 : RO; bitpos: [24:22]; default: 0;
+ *  This register records the FSM status of CHANNEL4.
+ */
+#define RMT_STATE_4    0x00000007U
+#define RMT_STATE_4_M  (RMT_STATE_4_V << RMT_STATE_4_S)
+#define RMT_STATE_4_V  0x00000007U
+#define RMT_STATE_4_S  22
+/** RMT_MEM_OWNER_ERR_4 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the ownership of memory block is wrong.
+ */
+#define RMT_MEM_OWNER_ERR_4    (BIT(25))
+#define RMT_MEM_OWNER_ERR_4_M  (RMT_MEM_OWNER_ERR_4_V << RMT_MEM_OWNER_ERR_4_S)
+#define RMT_MEM_OWNER_ERR_4_V  0x00000001U
+#define RMT_MEM_OWNER_ERR_4_S  25
+/** RMT_MEM_FULL_4 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the receiver receives more data than the memory size.
+ */
+#define RMT_MEM_FULL_4    (BIT(26))
+#define RMT_MEM_FULL_4_M  (RMT_MEM_FULL_4_V << RMT_MEM_FULL_4_S)
+#define RMT_MEM_FULL_4_V  0x00000001U
+#define RMT_MEM_FULL_4_S  26
+/** RMT_APB_MEM_RD_ERR_4 : RO; bitpos: [27]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when reads via
+ *  APB bus.
+ */
+#define RMT_APB_MEM_RD_ERR_4    (BIT(27))
+#define RMT_APB_MEM_RD_ERR_4_M  (RMT_APB_MEM_RD_ERR_4_V << RMT_APB_MEM_RD_ERR_4_S)
+#define RMT_APB_MEM_RD_ERR_4_V  0x00000001U
+#define RMT_APB_MEM_RD_ERR_4_S  27
+
+/** RMT_CH5STATUS_REG register
+ *  Channel 5 status register
+ */
+#define RMT_CH5STATUS_REG (DR_REG_RMT_BASE + 0x64)
+/** RMT_MEM_WADDR_EX_5 : RO; bitpos: [9:0]; default: 192;
+ *  This register records the memory address offset when receiver of CHANNEL5 is using
+ *  the RAM.
+ */
+#define RMT_MEM_WADDR_EX_5    0x000003FFU
+#define RMT_MEM_WADDR_EX_5_M  (RMT_MEM_WADDR_EX_5_V << RMT_MEM_WADDR_EX_5_S)
+#define RMT_MEM_WADDR_EX_5_V  0x000003FFU
+#define RMT_MEM_WADDR_EX_5_S  0
+/** RMT_APB_MEM_RADDR_5 : RO; bitpos: [20:11]; default: 192;
+ *  This register records the memory address offset when reads RAM over APB bus.
+ */
+#define RMT_APB_MEM_RADDR_5    0x000003FFU
+#define RMT_APB_MEM_RADDR_5_M  (RMT_APB_MEM_RADDR_5_V << RMT_APB_MEM_RADDR_5_S)
+#define RMT_APB_MEM_RADDR_5_V  0x000003FFU
+#define RMT_APB_MEM_RADDR_5_S  11
+/** RMT_STATE_5 : RO; bitpos: [24:22]; default: 0;
+ *  This register records the FSM status of CHANNEL5.
+ */
+#define RMT_STATE_5    0x00000007U
+#define RMT_STATE_5_M  (RMT_STATE_5_V << RMT_STATE_5_S)
+#define RMT_STATE_5_V  0x00000007U
+#define RMT_STATE_5_S  22
+/** RMT_MEM_OWNER_ERR_5 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the ownership of memory block is wrong.
+ */
+#define RMT_MEM_OWNER_ERR_5    (BIT(25))
+#define RMT_MEM_OWNER_ERR_5_M  (RMT_MEM_OWNER_ERR_5_V << RMT_MEM_OWNER_ERR_5_S)
+#define RMT_MEM_OWNER_ERR_5_V  0x00000001U
+#define RMT_MEM_OWNER_ERR_5_S  25
+/** RMT_MEM_FULL_5 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the receiver receives more data than the memory size.
+ */
+#define RMT_MEM_FULL_5    (BIT(26))
+#define RMT_MEM_FULL_5_M  (RMT_MEM_FULL_5_V << RMT_MEM_FULL_5_S)
+#define RMT_MEM_FULL_5_V  0x00000001U
+#define RMT_MEM_FULL_5_S  26
+/** RMT_APB_MEM_RD_ERR_5 : RO; bitpos: [27]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when reads via
+ *  APB bus.
+ */
+#define RMT_APB_MEM_RD_ERR_5    (BIT(27))
+#define RMT_APB_MEM_RD_ERR_5_M  (RMT_APB_MEM_RD_ERR_5_V << RMT_APB_MEM_RD_ERR_5_S)
+#define RMT_APB_MEM_RD_ERR_5_V  0x00000001U
+#define RMT_APB_MEM_RD_ERR_5_S  27
+
+/** RMT_CH6STATUS_REG register
+ *  Channel 6 status register
+ */
+#define RMT_CH6STATUS_REG (DR_REG_RMT_BASE + 0x68)
+/** RMT_MEM_WADDR_EX_6 : RO; bitpos: [9:0]; default: 192;
+ *  This register records the memory address offset when receiver of CHANNEL6 is using
+ *  the RAM.
+ */
+#define RMT_MEM_WADDR_EX_6    0x000003FFU
+#define RMT_MEM_WADDR_EX_6_M  (RMT_MEM_WADDR_EX_6_V << RMT_MEM_WADDR_EX_6_S)
+#define RMT_MEM_WADDR_EX_6_V  0x000003FFU
+#define RMT_MEM_WADDR_EX_6_S  0
+/** RMT_APB_MEM_RADDR_6 : RO; bitpos: [20:11]; default: 192;
+ *  This register records the memory address offset when reads RAM over APB bus.
+ */
+#define RMT_APB_MEM_RADDR_6    0x000003FFU
+#define RMT_APB_MEM_RADDR_6_M  (RMT_APB_MEM_RADDR_6_V << RMT_APB_MEM_RADDR_6_S)
+#define RMT_APB_MEM_RADDR_6_V  0x000003FFU
+#define RMT_APB_MEM_RADDR_6_S  11
+/** RMT_STATE_6 : RO; bitpos: [24:22]; default: 0;
+ *  This register records the FSM status of CHANNEL6.
+ */
+#define RMT_STATE_6    0x00000007U
+#define RMT_STATE_6_M  (RMT_STATE_6_V << RMT_STATE_6_S)
+#define RMT_STATE_6_V  0x00000007U
+#define RMT_STATE_6_S  22
+/** RMT_MEM_OWNER_ERR_6 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the ownership of memory block is wrong.
+ */
+#define RMT_MEM_OWNER_ERR_6    (BIT(25))
+#define RMT_MEM_OWNER_ERR_6_M  (RMT_MEM_OWNER_ERR_6_V << RMT_MEM_OWNER_ERR_6_S)
+#define RMT_MEM_OWNER_ERR_6_V  0x00000001U
+#define RMT_MEM_OWNER_ERR_6_S  25
+/** RMT_MEM_FULL_6 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the receiver receives more data than the memory size.
+ */
+#define RMT_MEM_FULL_6    (BIT(26))
+#define RMT_MEM_FULL_6_M  (RMT_MEM_FULL_6_V << RMT_MEM_FULL_6_S)
+#define RMT_MEM_FULL_6_V  0x00000001U
+#define RMT_MEM_FULL_6_S  26
+/** RMT_APB_MEM_RD_ERR_6 : RO; bitpos: [27]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when reads via
+ *  APB bus.
+ */
+#define RMT_APB_MEM_RD_ERR_6    (BIT(27))
+#define RMT_APB_MEM_RD_ERR_6_M  (RMT_APB_MEM_RD_ERR_6_V << RMT_APB_MEM_RD_ERR_6_S)
+#define RMT_APB_MEM_RD_ERR_6_V  0x00000001U
+#define RMT_APB_MEM_RD_ERR_6_S  27
+
+/** RMT_CH7STATUS_REG register
+ *  Channel 7 status register
+ */
+#define RMT_CH7STATUS_REG (DR_REG_RMT_BASE + 0x6c)
+/** RMT_MEM_WADDR_EX_7 : RO; bitpos: [9:0]; default: 192;
+ *  This register records the memory address offset when receiver of CHANNEL7 is using
+ *  the RAM.
+ */
+#define RMT_MEM_WADDR_EX_7    0x000003FFU
+#define RMT_MEM_WADDR_EX_7_M  (RMT_MEM_WADDR_EX_7_V << RMT_MEM_WADDR_EX_7_S)
+#define RMT_MEM_WADDR_EX_7_V  0x000003FFU
+#define RMT_MEM_WADDR_EX_7_S  0
+/** RMT_APB_MEM_RADDR_7 : RO; bitpos: [20:11]; default: 192;
+ *  This register records the memory address offset when reads RAM over APB bus.
+ */
+#define RMT_APB_MEM_RADDR_7    0x000003FFU
+#define RMT_APB_MEM_RADDR_7_M  (RMT_APB_MEM_RADDR_7_V << RMT_APB_MEM_RADDR_7_S)
+#define RMT_APB_MEM_RADDR_7_V  0x000003FFU
+#define RMT_APB_MEM_RADDR_7_S  11
+/** RMT_STATE_7 : RO; bitpos: [24:22]; default: 0;
+ *  This register records the FSM status of CHANNEL7.
+ */
+#define RMT_STATE_7    0x00000007U
+#define RMT_STATE_7_M  (RMT_STATE_7_V << RMT_STATE_7_S)
+#define RMT_STATE_7_V  0x00000007U
+#define RMT_STATE_7_S  22
+/** RMT_MEM_OWNER_ERR_7 : RO; bitpos: [25]; default: 0;
+ *  This status bit will be set when the ownership of memory block is wrong.
+ */
+#define RMT_MEM_OWNER_ERR_7    (BIT(25))
+#define RMT_MEM_OWNER_ERR_7_M  (RMT_MEM_OWNER_ERR_7_V << RMT_MEM_OWNER_ERR_7_S)
+#define RMT_MEM_OWNER_ERR_7_V  0x00000001U
+#define RMT_MEM_OWNER_ERR_7_S  25
+/** RMT_MEM_FULL_7 : RO; bitpos: [26]; default: 0;
+ *  This status bit will be set if the receiver receives more data than the memory size.
+ */
+#define RMT_MEM_FULL_7    (BIT(26))
+#define RMT_MEM_FULL_7_M  (RMT_MEM_FULL_7_V << RMT_MEM_FULL_7_S)
+#define RMT_MEM_FULL_7_V  0x00000001U
+#define RMT_MEM_FULL_7_S  26
+/** RMT_APB_MEM_RD_ERR_7 : RO; bitpos: [27]; default: 0;
+ *  This status bit will be set if the offset address out of memory size when reads via
+ *  APB bus.
+ */
+#define RMT_APB_MEM_RD_ERR_7    (BIT(27))
+#define RMT_APB_MEM_RD_ERR_7_M  (RMT_APB_MEM_RD_ERR_7_V << RMT_APB_MEM_RD_ERR_7_S)
+#define RMT_APB_MEM_RD_ERR_7_V  0x00000001U
+#define RMT_APB_MEM_RD_ERR_7_S  27
+
+/** RMT_INT_RAW_REG register
+ *  Raw interrupt status
+ */
+#define RMT_INT_RAW_REG (DR_REG_RMT_BASE + 0x70)
+/** RMT_CH0_TX_END_INT_RAW : R/WTC/SS; bitpos: [0]; default: 0;
+ *  The interrupt raw bit for CHANNEL0. Triggered when transmission done.
+ */
+#define RMT_CH0_TX_END_INT_RAW    (BIT(0))
+#define RMT_CH0_TX_END_INT_RAW_M  (RMT_CH0_TX_END_INT_RAW_V << RMT_CH0_TX_END_INT_RAW_S)
+#define RMT_CH0_TX_END_INT_RAW_V  0x00000001U
+#define RMT_CH0_TX_END_INT_RAW_S  0
+/** RMT_CH1_TX_END_INT_RAW : R/WTC/SS; bitpos: [1]; default: 0;
+ *  The interrupt raw bit for CHANNEL1. Triggered when transmission done.
+ */
+#define RMT_CH1_TX_END_INT_RAW    (BIT(1))
+#define RMT_CH1_TX_END_INT_RAW_M  (RMT_CH1_TX_END_INT_RAW_V << RMT_CH1_TX_END_INT_RAW_S)
+#define RMT_CH1_TX_END_INT_RAW_V  0x00000001U
+#define RMT_CH1_TX_END_INT_RAW_S  1
+/** RMT_CH2_TX_END_INT_RAW : R/WTC/SS; bitpos: [2]; default: 0;
+ *  The interrupt raw bit for CHANNEL2. Triggered when transmission done.
+ */
+#define RMT_CH2_TX_END_INT_RAW    (BIT(2))
+#define RMT_CH2_TX_END_INT_RAW_M  (RMT_CH2_TX_END_INT_RAW_V << RMT_CH2_TX_END_INT_RAW_S)
+#define RMT_CH2_TX_END_INT_RAW_V  0x00000001U
+#define RMT_CH2_TX_END_INT_RAW_S  2
+/** RMT_CH3_TX_END_INT_RAW : R/WTC/SS; bitpos: [3]; default: 0;
+ *  The interrupt raw bit for CHANNEL3. Triggered when transmission done.
+ */
+#define RMT_CH3_TX_END_INT_RAW    (BIT(3))
+#define RMT_CH3_TX_END_INT_RAW_M  (RMT_CH3_TX_END_INT_RAW_V << RMT_CH3_TX_END_INT_RAW_S)
+#define RMT_CH3_TX_END_INT_RAW_V  0x00000001U
+#define RMT_CH3_TX_END_INT_RAW_S  3
+/** RMT_CH0_ERR_INT_RAW : R/WTC/SS; bitpos: [4]; default: 0;
+ *  The interrupt raw bit for CHANNEL0. Triggered when error occurs.
+ */
+#define RMT_CH0_ERR_INT_RAW    (BIT(4))
+#define RMT_CH0_ERR_INT_RAW_M  (RMT_CH0_ERR_INT_RAW_V << RMT_CH0_ERR_INT_RAW_S)
+#define RMT_CH0_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH0_ERR_INT_RAW_S  4
+/** RMT_CH1_ERR_INT_RAW : R/WTC/SS; bitpos: [5]; default: 0;
+ *  The interrupt raw bit for CHANNEL1. Triggered when error occurs.
+ */
+#define RMT_CH1_ERR_INT_RAW    (BIT(5))
+#define RMT_CH1_ERR_INT_RAW_M  (RMT_CH1_ERR_INT_RAW_V << RMT_CH1_ERR_INT_RAW_S)
+#define RMT_CH1_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH1_ERR_INT_RAW_S  5
+/** RMT_CH2_ERR_INT_RAW : R/WTC/SS; bitpos: [6]; default: 0;
+ *  The interrupt raw bit for CHANNEL2. Triggered when error occurs.
+ */
+#define RMT_CH2_ERR_INT_RAW    (BIT(6))
+#define RMT_CH2_ERR_INT_RAW_M  (RMT_CH2_ERR_INT_RAW_V << RMT_CH2_ERR_INT_RAW_S)
+#define RMT_CH2_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH2_ERR_INT_RAW_S  6
+/** RMT_CH3_ERR_INT_RAW : R/WTC/SS; bitpos: [7]; default: 0;
+ *  The interrupt raw bit for CHANNEL3. Triggered when error occurs.
+ */
+#define RMT_CH3_ERR_INT_RAW    (BIT(7))
+#define RMT_CH3_ERR_INT_RAW_M  (RMT_CH3_ERR_INT_RAW_V << RMT_CH3_ERR_INT_RAW_S)
+#define RMT_CH3_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH3_ERR_INT_RAW_S  7
+/** RMT_CH0_TX_THR_EVENT_INT_RAW : R/WTC/SS; bitpos: [8]; default: 0;
+ *  The interrupt raw bit for CHANNEL0. Triggered when transmitter sent more data than
+ *  configured value.
+ */
+#define RMT_CH0_TX_THR_EVENT_INT_RAW    (BIT(8))
+#define RMT_CH0_TX_THR_EVENT_INT_RAW_M  (RMT_CH0_TX_THR_EVENT_INT_RAW_V << RMT_CH0_TX_THR_EVENT_INT_RAW_S)
+#define RMT_CH0_TX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH0_TX_THR_EVENT_INT_RAW_S  8
+/** RMT_CH1_TX_THR_EVENT_INT_RAW : R/WTC/SS; bitpos: [9]; default: 0;
+ *  The interrupt raw bit for CHANNEL1. Triggered when transmitter sent more data than
+ *  configured value.
+ */
+#define RMT_CH1_TX_THR_EVENT_INT_RAW    (BIT(9))
+#define RMT_CH1_TX_THR_EVENT_INT_RAW_M  (RMT_CH1_TX_THR_EVENT_INT_RAW_V << RMT_CH1_TX_THR_EVENT_INT_RAW_S)
+#define RMT_CH1_TX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH1_TX_THR_EVENT_INT_RAW_S  9
+/** RMT_CH2_TX_THR_EVENT_INT_RAW : R/WTC/SS; bitpos: [10]; default: 0;
+ *  The interrupt raw bit for CHANNEL2. Triggered when transmitter sent more data than
+ *  configured value.
+ */
+#define RMT_CH2_TX_THR_EVENT_INT_RAW    (BIT(10))
+#define RMT_CH2_TX_THR_EVENT_INT_RAW_M  (RMT_CH2_TX_THR_EVENT_INT_RAW_V << RMT_CH2_TX_THR_EVENT_INT_RAW_S)
+#define RMT_CH2_TX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH2_TX_THR_EVENT_INT_RAW_S  10
+/** RMT_CH3_TX_THR_EVENT_INT_RAW : R/WTC/SS; bitpos: [11]; default: 0;
+ *  The interrupt raw bit for CHANNEL3. Triggered when transmitter sent more data than
+ *  configured value.
+ */
+#define RMT_CH3_TX_THR_EVENT_INT_RAW    (BIT(11))
+#define RMT_CH3_TX_THR_EVENT_INT_RAW_M  (RMT_CH3_TX_THR_EVENT_INT_RAW_V << RMT_CH3_TX_THR_EVENT_INT_RAW_S)
+#define RMT_CH3_TX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH3_TX_THR_EVENT_INT_RAW_S  11
+/** RMT_CH0_TX_LOOP_INT_RAW : R/WTC/SS; bitpos: [12]; default: 0;
+ *  The interrupt raw bit for CHANNEL0. Triggered when the loop count reaches the
+ *  configured threshold value.
+ */
+#define RMT_CH0_TX_LOOP_INT_RAW    (BIT(12))
+#define RMT_CH0_TX_LOOP_INT_RAW_M  (RMT_CH0_TX_LOOP_INT_RAW_V << RMT_CH0_TX_LOOP_INT_RAW_S)
+#define RMT_CH0_TX_LOOP_INT_RAW_V  0x00000001U
+#define RMT_CH0_TX_LOOP_INT_RAW_S  12
+/** RMT_CH1_TX_LOOP_INT_RAW : R/WTC/SS; bitpos: [13]; default: 0;
+ *  The interrupt raw bit for CHANNEL1. Triggered when the loop count reaches the
+ *  configured threshold value.
+ */
+#define RMT_CH1_TX_LOOP_INT_RAW    (BIT(13))
+#define RMT_CH1_TX_LOOP_INT_RAW_M  (RMT_CH1_TX_LOOP_INT_RAW_V << RMT_CH1_TX_LOOP_INT_RAW_S)
+#define RMT_CH1_TX_LOOP_INT_RAW_V  0x00000001U
+#define RMT_CH1_TX_LOOP_INT_RAW_S  13
+/** RMT_CH2_TX_LOOP_INT_RAW : R/WTC/SS; bitpos: [14]; default: 0;
+ *  The interrupt raw bit for CHANNEL2. Triggered when the loop count reaches the
+ *  configured threshold value.
+ */
+#define RMT_CH2_TX_LOOP_INT_RAW    (BIT(14))
+#define RMT_CH2_TX_LOOP_INT_RAW_M  (RMT_CH2_TX_LOOP_INT_RAW_V << RMT_CH2_TX_LOOP_INT_RAW_S)
+#define RMT_CH2_TX_LOOP_INT_RAW_V  0x00000001U
+#define RMT_CH2_TX_LOOP_INT_RAW_S  14
+/** RMT_CH3_TX_LOOP_INT_RAW : R/WTC/SS; bitpos: [15]; default: 0;
+ *  The interrupt raw bit for CHANNEL3. Triggered when the loop count reaches the
+ *  configured threshold value.
+ */
+#define RMT_CH3_TX_LOOP_INT_RAW    (BIT(15))
+#define RMT_CH3_TX_LOOP_INT_RAW_M  (RMT_CH3_TX_LOOP_INT_RAW_V << RMT_CH3_TX_LOOP_INT_RAW_S)
+#define RMT_CH3_TX_LOOP_INT_RAW_V  0x00000001U
+#define RMT_CH3_TX_LOOP_INT_RAW_S  15
+/** RMT_CH4_RX_END_INT_RAW : R/WTC/SS; bitpos: [16]; default: 0;
+ *  The interrupt raw bit for CHANNEL4. Triggered when reception done.
+ */
+#define RMT_CH4_RX_END_INT_RAW    (BIT(16))
+#define RMT_CH4_RX_END_INT_RAW_M  (RMT_CH4_RX_END_INT_RAW_V << RMT_CH4_RX_END_INT_RAW_S)
+#define RMT_CH4_RX_END_INT_RAW_V  0x00000001U
+#define RMT_CH4_RX_END_INT_RAW_S  16
+/** RMT_CH5_RX_END_INT_RAW : R/WTC/SS; bitpos: [17]; default: 0;
+ *  The interrupt raw bit for CHANNEL5. Triggered when reception done.
+ */
+#define RMT_CH5_RX_END_INT_RAW    (BIT(17))
+#define RMT_CH5_RX_END_INT_RAW_M  (RMT_CH5_RX_END_INT_RAW_V << RMT_CH5_RX_END_INT_RAW_S)
+#define RMT_CH5_RX_END_INT_RAW_V  0x00000001U
+#define RMT_CH5_RX_END_INT_RAW_S  17
+/** RMT_CH6_RX_END_INT_RAW : R/WTC/SS; bitpos: [18]; default: 0;
+ *  The interrupt raw bit for CHANNEL6. Triggered when reception done.
+ */
+#define RMT_CH6_RX_END_INT_RAW    (BIT(18))
+#define RMT_CH6_RX_END_INT_RAW_M  (RMT_CH6_RX_END_INT_RAW_V << RMT_CH6_RX_END_INT_RAW_S)
+#define RMT_CH6_RX_END_INT_RAW_V  0x00000001U
+#define RMT_CH6_RX_END_INT_RAW_S  18
+/** RMT_CH7_RX_END_INT_RAW : R/WTC/SS; bitpos: [19]; default: 0;
+ *  The interrupt raw bit for CHANNEL7. Triggered when reception done.
+ */
+#define RMT_CH7_RX_END_INT_RAW    (BIT(19))
+#define RMT_CH7_RX_END_INT_RAW_M  (RMT_CH7_RX_END_INT_RAW_V << RMT_CH7_RX_END_INT_RAW_S)
+#define RMT_CH7_RX_END_INT_RAW_V  0x00000001U
+#define RMT_CH7_RX_END_INT_RAW_S  19
+/** RMT_CH4_ERR_INT_RAW : R/WTC/SS; bitpos: [20]; default: 0;
+ *  The interrupt raw bit for CHANNEL4. Triggered when error occurs.
+ */
+#define RMT_CH4_ERR_INT_RAW    (BIT(20))
+#define RMT_CH4_ERR_INT_RAW_M  (RMT_CH4_ERR_INT_RAW_V << RMT_CH4_ERR_INT_RAW_S)
+#define RMT_CH4_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH4_ERR_INT_RAW_S  20
+/** RMT_CH5_ERR_INT_RAW : R/WTC/SS; bitpos: [21]; default: 0;
+ *  The interrupt raw bit for CHANNEL5. Triggered when error occurs.
+ */
+#define RMT_CH5_ERR_INT_RAW    (BIT(21))
+#define RMT_CH5_ERR_INT_RAW_M  (RMT_CH5_ERR_INT_RAW_V << RMT_CH5_ERR_INT_RAW_S)
+#define RMT_CH5_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH5_ERR_INT_RAW_S  21
+/** RMT_CH6_ERR_INT_RAW : R/WTC/SS; bitpos: [22]; default: 0;
+ *  The interrupt raw bit for CHANNEL6. Triggered when error occurs.
+ */
+#define RMT_CH6_ERR_INT_RAW    (BIT(22))
+#define RMT_CH6_ERR_INT_RAW_M  (RMT_CH6_ERR_INT_RAW_V << RMT_CH6_ERR_INT_RAW_S)
+#define RMT_CH6_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH6_ERR_INT_RAW_S  22
+/** RMT_CH7_ERR_INT_RAW : R/WTC/SS; bitpos: [23]; default: 0;
+ *  The interrupt raw bit for CHANNEL7. Triggered when error occurs.
+ */
+#define RMT_CH7_ERR_INT_RAW    (BIT(23))
+#define RMT_CH7_ERR_INT_RAW_M  (RMT_CH7_ERR_INT_RAW_V << RMT_CH7_ERR_INT_RAW_S)
+#define RMT_CH7_ERR_INT_RAW_V  0x00000001U
+#define RMT_CH7_ERR_INT_RAW_S  23
+/** RMT_CH4_RX_THR_EVENT_INT_RAW : R/WTC/SS; bitpos: [24]; default: 0;
+ *  The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than
+ *  configured value.
+ */
+#define RMT_CH4_RX_THR_EVENT_INT_RAW    (BIT(24))
+#define RMT_CH4_RX_THR_EVENT_INT_RAW_M  (RMT_CH4_RX_THR_EVENT_INT_RAW_V << RMT_CH4_RX_THR_EVENT_INT_RAW_S)
+#define RMT_CH4_RX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH4_RX_THR_EVENT_INT_RAW_S  24
+/** RMT_CH5_RX_THR_EVENT_INT_RAW : R/WTC/SS; bitpos: [25]; default: 0;
+ *  The interrupt raw bit for CHANNEL5. Triggered when receiver receive more data than
+ *  configured value.
+ */
+#define RMT_CH5_RX_THR_EVENT_INT_RAW    (BIT(25))
+#define RMT_CH5_RX_THR_EVENT_INT_RAW_M  (RMT_CH5_RX_THR_EVENT_INT_RAW_V << RMT_CH5_RX_THR_EVENT_INT_RAW_S)
+#define RMT_CH5_RX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH5_RX_THR_EVENT_INT_RAW_S  25
+/** RMT_CH6_RX_THR_EVENT_INT_RAW : R/WTC/SS; bitpos: [26]; default: 0;
+ *  The interrupt raw bit for CHANNEL6. Triggered when receiver receive more data than
+ *  configured value.
+ */
+#define RMT_CH6_RX_THR_EVENT_INT_RAW    (BIT(26))
+#define RMT_CH6_RX_THR_EVENT_INT_RAW_M  (RMT_CH6_RX_THR_EVENT_INT_RAW_V << RMT_CH6_RX_THR_EVENT_INT_RAW_S)
+#define RMT_CH6_RX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH6_RX_THR_EVENT_INT_RAW_S  26
+/** RMT_CH7_RX_THR_EVENT_INT_RAW : R/WTC/SS; bitpos: [27]; default: 0;
+ *  The interrupt raw bit for CHANNEL7. Triggered when receiver receive more data than
+ *  configured value.
+ */
+#define RMT_CH7_RX_THR_EVENT_INT_RAW    (BIT(27))
+#define RMT_CH7_RX_THR_EVENT_INT_RAW_M  (RMT_CH7_RX_THR_EVENT_INT_RAW_V << RMT_CH7_RX_THR_EVENT_INT_RAW_S)
+#define RMT_CH7_RX_THR_EVENT_INT_RAW_V  0x00000001U
+#define RMT_CH7_RX_THR_EVENT_INT_RAW_S  27
+/** RMT_CH3_DMA_ACCESS_FAIL_INT_RAW : R/WTC/SS; bitpos: [28]; default: 0;
+ *  The interrupt raw bit for CHANNEL3. Triggered when dma accessing CHANNEL3 fails.
+ */
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_RAW    (BIT(28))
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_RAW_M  (RMT_CH3_DMA_ACCESS_FAIL_INT_RAW_V << RMT_CH3_DMA_ACCESS_FAIL_INT_RAW_S)
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_RAW_V  0x00000001U
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_RAW_S  28
+/** RMT_CH7_DMA_ACCESS_FAIL_INT_RAW : R/WTC/SS; bitpos: [29]; default: 0;
+ *  The interrupt raw bit for CHANNEL7. Triggered when dma accessing CHANNEL7 fails.
+ */
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_RAW    (BIT(29))
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_RAW_M  (RMT_CH7_DMA_ACCESS_FAIL_INT_RAW_V << RMT_CH7_DMA_ACCESS_FAIL_INT_RAW_S)
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_RAW_V  0x00000001U
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_RAW_S  29
+
+/** RMT_INT_ST_REG register
+ *  Masked interrupt status
+ */
+#define RMT_INT_ST_REG (DR_REG_RMT_BASE + 0x74)
+/** RMT_CH0_TX_END_INT_ST : RO; bitpos: [0]; default: 0;
+ *  The masked interrupt status bit for CH0_TX_END_INT.
+ */
+#define RMT_CH0_TX_END_INT_ST    (BIT(0))
+#define RMT_CH0_TX_END_INT_ST_M  (RMT_CH0_TX_END_INT_ST_V << RMT_CH0_TX_END_INT_ST_S)
+#define RMT_CH0_TX_END_INT_ST_V  0x00000001U
+#define RMT_CH0_TX_END_INT_ST_S  0
+/** RMT_CH1_TX_END_INT_ST : RO; bitpos: [1]; default: 0;
+ *  The masked interrupt status bit for CH1_TX_END_INT.
+ */
+#define RMT_CH1_TX_END_INT_ST    (BIT(1))
+#define RMT_CH1_TX_END_INT_ST_M  (RMT_CH1_TX_END_INT_ST_V << RMT_CH1_TX_END_INT_ST_S)
+#define RMT_CH1_TX_END_INT_ST_V  0x00000001U
+#define RMT_CH1_TX_END_INT_ST_S  1
+/** RMT_CH2_TX_END_INT_ST : RO; bitpos: [2]; default: 0;
+ *  The masked interrupt status bit for CH2_TX_END_INT.
+ */
+#define RMT_CH2_TX_END_INT_ST    (BIT(2))
+#define RMT_CH2_TX_END_INT_ST_M  (RMT_CH2_TX_END_INT_ST_V << RMT_CH2_TX_END_INT_ST_S)
+#define RMT_CH2_TX_END_INT_ST_V  0x00000001U
+#define RMT_CH2_TX_END_INT_ST_S  2
+/** RMT_CH3_TX_END_INT_ST : RO; bitpos: [3]; default: 0;
+ *  The masked interrupt status bit for CH3_TX_END_INT.
+ */
+#define RMT_CH3_TX_END_INT_ST    (BIT(3))
+#define RMT_CH3_TX_END_INT_ST_M  (RMT_CH3_TX_END_INT_ST_V << RMT_CH3_TX_END_INT_ST_S)
+#define RMT_CH3_TX_END_INT_ST_V  0x00000001U
+#define RMT_CH3_TX_END_INT_ST_S  3
+/** RMT_CH0_ERR_INT_ST : RO; bitpos: [4]; default: 0;
+ *  The masked interrupt status bit for CH0_ERR_INT.
+ */
+#define RMT_CH0_ERR_INT_ST    (BIT(4))
+#define RMT_CH0_ERR_INT_ST_M  (RMT_CH0_ERR_INT_ST_V << RMT_CH0_ERR_INT_ST_S)
+#define RMT_CH0_ERR_INT_ST_V  0x00000001U
+#define RMT_CH0_ERR_INT_ST_S  4
+/** RMT_CH1_ERR_INT_ST : RO; bitpos: [5]; default: 0;
+ *  The masked interrupt status bit for CH1_ERR_INT.
+ */
+#define RMT_CH1_ERR_INT_ST    (BIT(5))
+#define RMT_CH1_ERR_INT_ST_M  (RMT_CH1_ERR_INT_ST_V << RMT_CH1_ERR_INT_ST_S)
+#define RMT_CH1_ERR_INT_ST_V  0x00000001U
+#define RMT_CH1_ERR_INT_ST_S  5
+/** RMT_CH2_ERR_INT_ST : RO; bitpos: [6]; default: 0;
+ *  The masked interrupt status bit for CH2_ERR_INT.
+ */
+#define RMT_CH2_ERR_INT_ST    (BIT(6))
+#define RMT_CH2_ERR_INT_ST_M  (RMT_CH2_ERR_INT_ST_V << RMT_CH2_ERR_INT_ST_S)
+#define RMT_CH2_ERR_INT_ST_V  0x00000001U
+#define RMT_CH2_ERR_INT_ST_S  6
+/** RMT_CH3_ERR_INT_ST : RO; bitpos: [7]; default: 0;
+ *  The masked interrupt status bit for CH3_ERR_INT.
+ */
+#define RMT_CH3_ERR_INT_ST    (BIT(7))
+#define RMT_CH3_ERR_INT_ST_M  (RMT_CH3_ERR_INT_ST_V << RMT_CH3_ERR_INT_ST_S)
+#define RMT_CH3_ERR_INT_ST_V  0x00000001U
+#define RMT_CH3_ERR_INT_ST_S  7
+/** RMT_CH0_TX_THR_EVENT_INT_ST : RO; bitpos: [8]; default: 0;
+ *  The masked interrupt status bit for CH0_TX_THR_EVENT_INT.
+ */
+#define RMT_CH0_TX_THR_EVENT_INT_ST    (BIT(8))
+#define RMT_CH0_TX_THR_EVENT_INT_ST_M  (RMT_CH0_TX_THR_EVENT_INT_ST_V << RMT_CH0_TX_THR_EVENT_INT_ST_S)
+#define RMT_CH0_TX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH0_TX_THR_EVENT_INT_ST_S  8
+/** RMT_CH1_TX_THR_EVENT_INT_ST : RO; bitpos: [9]; default: 0;
+ *  The masked interrupt status bit for CH1_TX_THR_EVENT_INT.
+ */
+#define RMT_CH1_TX_THR_EVENT_INT_ST    (BIT(9))
+#define RMT_CH1_TX_THR_EVENT_INT_ST_M  (RMT_CH1_TX_THR_EVENT_INT_ST_V << RMT_CH1_TX_THR_EVENT_INT_ST_S)
+#define RMT_CH1_TX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH1_TX_THR_EVENT_INT_ST_S  9
+/** RMT_CH2_TX_THR_EVENT_INT_ST : RO; bitpos: [10]; default: 0;
+ *  The masked interrupt status bit for CH2_TX_THR_EVENT_INT.
+ */
+#define RMT_CH2_TX_THR_EVENT_INT_ST    (BIT(10))
+#define RMT_CH2_TX_THR_EVENT_INT_ST_M  (RMT_CH2_TX_THR_EVENT_INT_ST_V << RMT_CH2_TX_THR_EVENT_INT_ST_S)
+#define RMT_CH2_TX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH2_TX_THR_EVENT_INT_ST_S  10
+/** RMT_CH3_TX_THR_EVENT_INT_ST : RO; bitpos: [11]; default: 0;
+ *  The masked interrupt status bit for CH3_TX_THR_EVENT_INT.
+ */
+#define RMT_CH3_TX_THR_EVENT_INT_ST    (BIT(11))
+#define RMT_CH3_TX_THR_EVENT_INT_ST_M  (RMT_CH3_TX_THR_EVENT_INT_ST_V << RMT_CH3_TX_THR_EVENT_INT_ST_S)
+#define RMT_CH3_TX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH3_TX_THR_EVENT_INT_ST_S  11
+/** RMT_CH0_TX_LOOP_INT_ST : RO; bitpos: [12]; default: 0;
+ *  The masked interrupt status bit for CH0_TX_LOOP_INT.
+ */
+#define RMT_CH0_TX_LOOP_INT_ST    (BIT(12))
+#define RMT_CH0_TX_LOOP_INT_ST_M  (RMT_CH0_TX_LOOP_INT_ST_V << RMT_CH0_TX_LOOP_INT_ST_S)
+#define RMT_CH0_TX_LOOP_INT_ST_V  0x00000001U
+#define RMT_CH0_TX_LOOP_INT_ST_S  12
+/** RMT_CH1_TX_LOOP_INT_ST : RO; bitpos: [13]; default: 0;
+ *  The masked interrupt status bit for CH1_TX_LOOP_INT.
+ */
+#define RMT_CH1_TX_LOOP_INT_ST    (BIT(13))
+#define RMT_CH1_TX_LOOP_INT_ST_M  (RMT_CH1_TX_LOOP_INT_ST_V << RMT_CH1_TX_LOOP_INT_ST_S)
+#define RMT_CH1_TX_LOOP_INT_ST_V  0x00000001U
+#define RMT_CH1_TX_LOOP_INT_ST_S  13
+/** RMT_CH2_TX_LOOP_INT_ST : RO; bitpos: [14]; default: 0;
+ *  The masked interrupt status bit for CH2_TX_LOOP_INT.
+ */
+#define RMT_CH2_TX_LOOP_INT_ST    (BIT(14))
+#define RMT_CH2_TX_LOOP_INT_ST_M  (RMT_CH2_TX_LOOP_INT_ST_V << RMT_CH2_TX_LOOP_INT_ST_S)
+#define RMT_CH2_TX_LOOP_INT_ST_V  0x00000001U
+#define RMT_CH2_TX_LOOP_INT_ST_S  14
+/** RMT_CH3_TX_LOOP_INT_ST : RO; bitpos: [15]; default: 0;
+ *  The masked interrupt status bit for CH3_TX_LOOP_INT.
+ */
+#define RMT_CH3_TX_LOOP_INT_ST    (BIT(15))
+#define RMT_CH3_TX_LOOP_INT_ST_M  (RMT_CH3_TX_LOOP_INT_ST_V << RMT_CH3_TX_LOOP_INT_ST_S)
+#define RMT_CH3_TX_LOOP_INT_ST_V  0x00000001U
+#define RMT_CH3_TX_LOOP_INT_ST_S  15
+/** RMT_CH4_RX_END_INT_ST : RO; bitpos: [16]; default: 0;
+ *  The masked interrupt status bit for CH4_RX_END_INT.
+ */
+#define RMT_CH4_RX_END_INT_ST    (BIT(16))
+#define RMT_CH4_RX_END_INT_ST_M  (RMT_CH4_RX_END_INT_ST_V << RMT_CH4_RX_END_INT_ST_S)
+#define RMT_CH4_RX_END_INT_ST_V  0x00000001U
+#define RMT_CH4_RX_END_INT_ST_S  16
+/** RMT_CH5_RX_END_INT_ST : RO; bitpos: [17]; default: 0;
+ *  The masked interrupt status bit for CH5_RX_END_INT.
+ */
+#define RMT_CH5_RX_END_INT_ST    (BIT(17))
+#define RMT_CH5_RX_END_INT_ST_M  (RMT_CH5_RX_END_INT_ST_V << RMT_CH5_RX_END_INT_ST_S)
+#define RMT_CH5_RX_END_INT_ST_V  0x00000001U
+#define RMT_CH5_RX_END_INT_ST_S  17
+/** RMT_CH6_RX_END_INT_ST : RO; bitpos: [18]; default: 0;
+ *  The masked interrupt status bit for CH6_RX_END_INT.
+ */
+#define RMT_CH6_RX_END_INT_ST    (BIT(18))
+#define RMT_CH6_RX_END_INT_ST_M  (RMT_CH6_RX_END_INT_ST_V << RMT_CH6_RX_END_INT_ST_S)
+#define RMT_CH6_RX_END_INT_ST_V  0x00000001U
+#define RMT_CH6_RX_END_INT_ST_S  18
+/** RMT_CH7_RX_END_INT_ST : RO; bitpos: [19]; default: 0;
+ *  The masked interrupt status bit for CH7_RX_END_INT.
+ */
+#define RMT_CH7_RX_END_INT_ST    (BIT(19))
+#define RMT_CH7_RX_END_INT_ST_M  (RMT_CH7_RX_END_INT_ST_V << RMT_CH7_RX_END_INT_ST_S)
+#define RMT_CH7_RX_END_INT_ST_V  0x00000001U
+#define RMT_CH7_RX_END_INT_ST_S  19
+/** RMT_CH4_ERR_INT_ST : RO; bitpos: [20]; default: 0;
+ *  The masked interrupt status bit for CH4_ERR_INT.
+ */
+#define RMT_CH4_ERR_INT_ST    (BIT(20))
+#define RMT_CH4_ERR_INT_ST_M  (RMT_CH4_ERR_INT_ST_V << RMT_CH4_ERR_INT_ST_S)
+#define RMT_CH4_ERR_INT_ST_V  0x00000001U
+#define RMT_CH4_ERR_INT_ST_S  20
+/** RMT_CH5_ERR_INT_ST : RO; bitpos: [21]; default: 0;
+ *  The masked interrupt status bit for CH5_ERR_INT.
+ */
+#define RMT_CH5_ERR_INT_ST    (BIT(21))
+#define RMT_CH5_ERR_INT_ST_M  (RMT_CH5_ERR_INT_ST_V << RMT_CH5_ERR_INT_ST_S)
+#define RMT_CH5_ERR_INT_ST_V  0x00000001U
+#define RMT_CH5_ERR_INT_ST_S  21
+/** RMT_CH6_ERR_INT_ST : RO; bitpos: [22]; default: 0;
+ *  The masked interrupt status bit for CH6_ERR_INT.
+ */
+#define RMT_CH6_ERR_INT_ST    (BIT(22))
+#define RMT_CH6_ERR_INT_ST_M  (RMT_CH6_ERR_INT_ST_V << RMT_CH6_ERR_INT_ST_S)
+#define RMT_CH6_ERR_INT_ST_V  0x00000001U
+#define RMT_CH6_ERR_INT_ST_S  22
+/** RMT_CH7_ERR_INT_ST : RO; bitpos: [23]; default: 0;
+ *  The masked interrupt status bit for CH7_ERR_INT.
+ */
+#define RMT_CH7_ERR_INT_ST    (BIT(23))
+#define RMT_CH7_ERR_INT_ST_M  (RMT_CH7_ERR_INT_ST_V << RMT_CH7_ERR_INT_ST_S)
+#define RMT_CH7_ERR_INT_ST_V  0x00000001U
+#define RMT_CH7_ERR_INT_ST_S  23
+/** RMT_CH4_RX_THR_EVENT_INT_ST : RO; bitpos: [24]; default: 0;
+ *  The masked interrupt status bit for CH4_RX_THR_EVENT_INT.
+ */
+#define RMT_CH4_RX_THR_EVENT_INT_ST    (BIT(24))
+#define RMT_CH4_RX_THR_EVENT_INT_ST_M  (RMT_CH4_RX_THR_EVENT_INT_ST_V << RMT_CH4_RX_THR_EVENT_INT_ST_S)
+#define RMT_CH4_RX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH4_RX_THR_EVENT_INT_ST_S  24
+/** RMT_CH5_RX_THR_EVENT_INT_ST : RO; bitpos: [25]; default: 0;
+ *  The masked interrupt status bit for CH5_RX_THR_EVENT_INT.
+ */
+#define RMT_CH5_RX_THR_EVENT_INT_ST    (BIT(25))
+#define RMT_CH5_RX_THR_EVENT_INT_ST_M  (RMT_CH5_RX_THR_EVENT_INT_ST_V << RMT_CH5_RX_THR_EVENT_INT_ST_S)
+#define RMT_CH5_RX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH5_RX_THR_EVENT_INT_ST_S  25
+/** RMT_CH6_RX_THR_EVENT_INT_ST : RO; bitpos: [26]; default: 0;
+ *  The masked interrupt status bit for CH6_RX_THR_EVENT_INT.
+ */
+#define RMT_CH6_RX_THR_EVENT_INT_ST    (BIT(26))
+#define RMT_CH6_RX_THR_EVENT_INT_ST_M  (RMT_CH6_RX_THR_EVENT_INT_ST_V << RMT_CH6_RX_THR_EVENT_INT_ST_S)
+#define RMT_CH6_RX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH6_RX_THR_EVENT_INT_ST_S  26
+/** RMT_CH7_RX_THR_EVENT_INT_ST : RO; bitpos: [27]; default: 0;
+ *  The masked interrupt status bit for CH7_RX_THR_EVENT_INT.
+ */
+#define RMT_CH7_RX_THR_EVENT_INT_ST    (BIT(27))
+#define RMT_CH7_RX_THR_EVENT_INT_ST_M  (RMT_CH7_RX_THR_EVENT_INT_ST_V << RMT_CH7_RX_THR_EVENT_INT_ST_S)
+#define RMT_CH7_RX_THR_EVENT_INT_ST_V  0x00000001U
+#define RMT_CH7_RX_THR_EVENT_INT_ST_S  27
+/** RMT_CH3_DMA_ACCESS_FAIL_INT_ST : RO; bitpos: [28]; default: 0;
+ *  The masked interrupt status bit for  CH3_DMA_ACCESS_FAIL_INT.
+ */
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_ST    (BIT(28))
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_ST_M  (RMT_CH3_DMA_ACCESS_FAIL_INT_ST_V << RMT_CH3_DMA_ACCESS_FAIL_INT_ST_S)
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_ST_V  0x00000001U
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_ST_S  28
+/** RMT_CH7_DMA_ACCESS_FAIL_INT_ST : RO; bitpos: [29]; default: 0;
+ *  The masked interrupt status bit for  CH7_DMA_ACCESS_FAIL_INT.
+ */
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_ST    (BIT(29))
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_ST_M  (RMT_CH7_DMA_ACCESS_FAIL_INT_ST_V << RMT_CH7_DMA_ACCESS_FAIL_INT_ST_S)
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_ST_V  0x00000001U
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_ST_S  29
+
+/** RMT_INT_ENA_REG register
+ *  Interrupt enable bits
+ */
+#define RMT_INT_ENA_REG (DR_REG_RMT_BASE + 0x78)
+/** RMT_CH0_TX_END_INT_ENA : R/W; bitpos: [0]; default: 0;
+ *  The interrupt enable bit for CH0_TX_END_INT.
+ */
+#define RMT_CH0_TX_END_INT_ENA    (BIT(0))
+#define RMT_CH0_TX_END_INT_ENA_M  (RMT_CH0_TX_END_INT_ENA_V << RMT_CH0_TX_END_INT_ENA_S)
+#define RMT_CH0_TX_END_INT_ENA_V  0x00000001U
+#define RMT_CH0_TX_END_INT_ENA_S  0
+/** RMT_CH1_TX_END_INT_ENA : R/W; bitpos: [1]; default: 0;
+ *  The interrupt enable bit for CH1_TX_END_INT.
+ */
+#define RMT_CH1_TX_END_INT_ENA    (BIT(1))
+#define RMT_CH1_TX_END_INT_ENA_M  (RMT_CH1_TX_END_INT_ENA_V << RMT_CH1_TX_END_INT_ENA_S)
+#define RMT_CH1_TX_END_INT_ENA_V  0x00000001U
+#define RMT_CH1_TX_END_INT_ENA_S  1
+/** RMT_CH2_TX_END_INT_ENA : R/W; bitpos: [2]; default: 0;
+ *  The interrupt enable bit for CH2_TX_END_INT.
+ */
+#define RMT_CH2_TX_END_INT_ENA    (BIT(2))
+#define RMT_CH2_TX_END_INT_ENA_M  (RMT_CH2_TX_END_INT_ENA_V << RMT_CH2_TX_END_INT_ENA_S)
+#define RMT_CH2_TX_END_INT_ENA_V  0x00000001U
+#define RMT_CH2_TX_END_INT_ENA_S  2
+/** RMT_CH3_TX_END_INT_ENA : R/W; bitpos: [3]; default: 0;
+ *  The interrupt enable bit for CH3_TX_END_INT.
+ */
+#define RMT_CH3_TX_END_INT_ENA    (BIT(3))
+#define RMT_CH3_TX_END_INT_ENA_M  (RMT_CH3_TX_END_INT_ENA_V << RMT_CH3_TX_END_INT_ENA_S)
+#define RMT_CH3_TX_END_INT_ENA_V  0x00000001U
+#define RMT_CH3_TX_END_INT_ENA_S  3
+/** RMT_CH0_ERR_INT_ENA : R/W; bitpos: [4]; default: 0;
+ *  The interrupt enable bit for CH0_ERR_INT.
+ */
+#define RMT_CH0_ERR_INT_ENA    (BIT(4))
+#define RMT_CH0_ERR_INT_ENA_M  (RMT_CH0_ERR_INT_ENA_V << RMT_CH0_ERR_INT_ENA_S)
+#define RMT_CH0_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH0_ERR_INT_ENA_S  4
+/** RMT_CH1_ERR_INT_ENA : R/W; bitpos: [5]; default: 0;
+ *  The interrupt enable bit for CH1_ERR_INT.
+ */
+#define RMT_CH1_ERR_INT_ENA    (BIT(5))
+#define RMT_CH1_ERR_INT_ENA_M  (RMT_CH1_ERR_INT_ENA_V << RMT_CH1_ERR_INT_ENA_S)
+#define RMT_CH1_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH1_ERR_INT_ENA_S  5
+/** RMT_CH2_ERR_INT_ENA : R/W; bitpos: [6]; default: 0;
+ *  The interrupt enable bit for CH2_ERR_INT.
+ */
+#define RMT_CH2_ERR_INT_ENA    (BIT(6))
+#define RMT_CH2_ERR_INT_ENA_M  (RMT_CH2_ERR_INT_ENA_V << RMT_CH2_ERR_INT_ENA_S)
+#define RMT_CH2_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH2_ERR_INT_ENA_S  6
+/** RMT_CH3_ERR_INT_ENA : R/W; bitpos: [7]; default: 0;
+ *  The interrupt enable bit for CH3_ERR_INT.
+ */
+#define RMT_CH3_ERR_INT_ENA    (BIT(7))
+#define RMT_CH3_ERR_INT_ENA_M  (RMT_CH3_ERR_INT_ENA_V << RMT_CH3_ERR_INT_ENA_S)
+#define RMT_CH3_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH3_ERR_INT_ENA_S  7
+/** RMT_CH0_TX_THR_EVENT_INT_ENA : R/W; bitpos: [8]; default: 0;
+ *  The interrupt enable bit for CH0_TX_THR_EVENT_INT.
+ */
+#define RMT_CH0_TX_THR_EVENT_INT_ENA    (BIT(8))
+#define RMT_CH0_TX_THR_EVENT_INT_ENA_M  (RMT_CH0_TX_THR_EVENT_INT_ENA_V << RMT_CH0_TX_THR_EVENT_INT_ENA_S)
+#define RMT_CH0_TX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH0_TX_THR_EVENT_INT_ENA_S  8
+/** RMT_CH1_TX_THR_EVENT_INT_ENA : R/W; bitpos: [9]; default: 0;
+ *  The interrupt enable bit for CH1_TX_THR_EVENT_INT.
+ */
+#define RMT_CH1_TX_THR_EVENT_INT_ENA    (BIT(9))
+#define RMT_CH1_TX_THR_EVENT_INT_ENA_M  (RMT_CH1_TX_THR_EVENT_INT_ENA_V << RMT_CH1_TX_THR_EVENT_INT_ENA_S)
+#define RMT_CH1_TX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH1_TX_THR_EVENT_INT_ENA_S  9
+/** RMT_CH2_TX_THR_EVENT_INT_ENA : R/W; bitpos: [10]; default: 0;
+ *  The interrupt enable bit for CH2_TX_THR_EVENT_INT.
+ */
+#define RMT_CH2_TX_THR_EVENT_INT_ENA    (BIT(10))
+#define RMT_CH2_TX_THR_EVENT_INT_ENA_M  (RMT_CH2_TX_THR_EVENT_INT_ENA_V << RMT_CH2_TX_THR_EVENT_INT_ENA_S)
+#define RMT_CH2_TX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH2_TX_THR_EVENT_INT_ENA_S  10
+/** RMT_CH3_TX_THR_EVENT_INT_ENA : R/W; bitpos: [11]; default: 0;
+ *  The interrupt enable bit for CH3_TX_THR_EVENT_INT.
+ */
+#define RMT_CH3_TX_THR_EVENT_INT_ENA    (BIT(11))
+#define RMT_CH3_TX_THR_EVENT_INT_ENA_M  (RMT_CH3_TX_THR_EVENT_INT_ENA_V << RMT_CH3_TX_THR_EVENT_INT_ENA_S)
+#define RMT_CH3_TX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH3_TX_THR_EVENT_INT_ENA_S  11
+/** RMT_CH0_TX_LOOP_INT_ENA : R/W; bitpos: [12]; default: 0;
+ *  The interrupt enable bit for CH0_TX_LOOP_INT.
+ */
+#define RMT_CH0_TX_LOOP_INT_ENA    (BIT(12))
+#define RMT_CH0_TX_LOOP_INT_ENA_M  (RMT_CH0_TX_LOOP_INT_ENA_V << RMT_CH0_TX_LOOP_INT_ENA_S)
+#define RMT_CH0_TX_LOOP_INT_ENA_V  0x00000001U
+#define RMT_CH0_TX_LOOP_INT_ENA_S  12
+/** RMT_CH1_TX_LOOP_INT_ENA : R/W; bitpos: [13]; default: 0;
+ *  The interrupt enable bit for CH1_TX_LOOP_INT.
+ */
+#define RMT_CH1_TX_LOOP_INT_ENA    (BIT(13))
+#define RMT_CH1_TX_LOOP_INT_ENA_M  (RMT_CH1_TX_LOOP_INT_ENA_V << RMT_CH1_TX_LOOP_INT_ENA_S)
+#define RMT_CH1_TX_LOOP_INT_ENA_V  0x00000001U
+#define RMT_CH1_TX_LOOP_INT_ENA_S  13
+/** RMT_CH2_TX_LOOP_INT_ENA : R/W; bitpos: [14]; default: 0;
+ *  The interrupt enable bit for CH2_TX_LOOP_INT.
+ */
+#define RMT_CH2_TX_LOOP_INT_ENA    (BIT(14))
+#define RMT_CH2_TX_LOOP_INT_ENA_M  (RMT_CH2_TX_LOOP_INT_ENA_V << RMT_CH2_TX_LOOP_INT_ENA_S)
+#define RMT_CH2_TX_LOOP_INT_ENA_V  0x00000001U
+#define RMT_CH2_TX_LOOP_INT_ENA_S  14
+/** RMT_CH3_TX_LOOP_INT_ENA : R/W; bitpos: [15]; default: 0;
+ *  The interrupt enable bit for CH3_TX_LOOP_INT.
+ */
+#define RMT_CH3_TX_LOOP_INT_ENA    (BIT(15))
+#define RMT_CH3_TX_LOOP_INT_ENA_M  (RMT_CH3_TX_LOOP_INT_ENA_V << RMT_CH3_TX_LOOP_INT_ENA_S)
+#define RMT_CH3_TX_LOOP_INT_ENA_V  0x00000001U
+#define RMT_CH3_TX_LOOP_INT_ENA_S  15
+/** RMT_CH4_RX_END_INT_ENA : R/W; bitpos: [16]; default: 0;
+ *  The interrupt enable bit for CH4_RX_END_INT.
+ */
+#define RMT_CH4_RX_END_INT_ENA    (BIT(16))
+#define RMT_CH4_RX_END_INT_ENA_M  (RMT_CH4_RX_END_INT_ENA_V << RMT_CH4_RX_END_INT_ENA_S)
+#define RMT_CH4_RX_END_INT_ENA_V  0x00000001U
+#define RMT_CH4_RX_END_INT_ENA_S  16
+/** RMT_CH5_RX_END_INT_ENA : R/W; bitpos: [17]; default: 0;
+ *  The interrupt enable bit for CH5_RX_END_INT.
+ */
+#define RMT_CH5_RX_END_INT_ENA    (BIT(17))
+#define RMT_CH5_RX_END_INT_ENA_M  (RMT_CH5_RX_END_INT_ENA_V << RMT_CH5_RX_END_INT_ENA_S)
+#define RMT_CH5_RX_END_INT_ENA_V  0x00000001U
+#define RMT_CH5_RX_END_INT_ENA_S  17
+/** RMT_CH6_RX_END_INT_ENA : R/W; bitpos: [18]; default: 0;
+ *  The interrupt enable bit for CH6_RX_END_INT.
+ */
+#define RMT_CH6_RX_END_INT_ENA    (BIT(18))
+#define RMT_CH6_RX_END_INT_ENA_M  (RMT_CH6_RX_END_INT_ENA_V << RMT_CH6_RX_END_INT_ENA_S)
+#define RMT_CH6_RX_END_INT_ENA_V  0x00000001U
+#define RMT_CH6_RX_END_INT_ENA_S  18
+/** RMT_CH7_RX_END_INT_ENA : R/W; bitpos: [19]; default: 0;
+ *  The interrupt enable bit for CH7_RX_END_INT.
+ */
+#define RMT_CH7_RX_END_INT_ENA    (BIT(19))
+#define RMT_CH7_RX_END_INT_ENA_M  (RMT_CH7_RX_END_INT_ENA_V << RMT_CH7_RX_END_INT_ENA_S)
+#define RMT_CH7_RX_END_INT_ENA_V  0x00000001U
+#define RMT_CH7_RX_END_INT_ENA_S  19
+/** RMT_CH4_ERR_INT_ENA : R/W; bitpos: [20]; default: 0;
+ *  The interrupt enable bit for CH4_ERR_INT.
+ */
+#define RMT_CH4_ERR_INT_ENA    (BIT(20))
+#define RMT_CH4_ERR_INT_ENA_M  (RMT_CH4_ERR_INT_ENA_V << RMT_CH4_ERR_INT_ENA_S)
+#define RMT_CH4_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH4_ERR_INT_ENA_S  20
+/** RMT_CH5_ERR_INT_ENA : R/W; bitpos: [21]; default: 0;
+ *  The interrupt enable bit for CH5_ERR_INT.
+ */
+#define RMT_CH5_ERR_INT_ENA    (BIT(21))
+#define RMT_CH5_ERR_INT_ENA_M  (RMT_CH5_ERR_INT_ENA_V << RMT_CH5_ERR_INT_ENA_S)
+#define RMT_CH5_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH5_ERR_INT_ENA_S  21
+/** RMT_CH6_ERR_INT_ENA : R/W; bitpos: [22]; default: 0;
+ *  The interrupt enable bit for CH6_ERR_INT.
+ */
+#define RMT_CH6_ERR_INT_ENA    (BIT(22))
+#define RMT_CH6_ERR_INT_ENA_M  (RMT_CH6_ERR_INT_ENA_V << RMT_CH6_ERR_INT_ENA_S)
+#define RMT_CH6_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH6_ERR_INT_ENA_S  22
+/** RMT_CH7_ERR_INT_ENA : R/W; bitpos: [23]; default: 0;
+ *  The interrupt enable bit for CH7_ERR_INT.
+ */
+#define RMT_CH7_ERR_INT_ENA    (BIT(23))
+#define RMT_CH7_ERR_INT_ENA_M  (RMT_CH7_ERR_INT_ENA_V << RMT_CH7_ERR_INT_ENA_S)
+#define RMT_CH7_ERR_INT_ENA_V  0x00000001U
+#define RMT_CH7_ERR_INT_ENA_S  23
+/** RMT_CH4_RX_THR_EVENT_INT_ENA : R/W; bitpos: [24]; default: 0;
+ *  The interrupt enable bit for CH4_RX_THR_EVENT_INT.
+ */
+#define RMT_CH4_RX_THR_EVENT_INT_ENA    (BIT(24))
+#define RMT_CH4_RX_THR_EVENT_INT_ENA_M  (RMT_CH4_RX_THR_EVENT_INT_ENA_V << RMT_CH4_RX_THR_EVENT_INT_ENA_S)
+#define RMT_CH4_RX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH4_RX_THR_EVENT_INT_ENA_S  24
+/** RMT_CH5_RX_THR_EVENT_INT_ENA : R/W; bitpos: [25]; default: 0;
+ *  The interrupt enable bit for CH5_RX_THR_EVENT_INT.
+ */
+#define RMT_CH5_RX_THR_EVENT_INT_ENA    (BIT(25))
+#define RMT_CH5_RX_THR_EVENT_INT_ENA_M  (RMT_CH5_RX_THR_EVENT_INT_ENA_V << RMT_CH5_RX_THR_EVENT_INT_ENA_S)
+#define RMT_CH5_RX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH5_RX_THR_EVENT_INT_ENA_S  25
+/** RMT_CH6_RX_THR_EVENT_INT_ENA : R/W; bitpos: [26]; default: 0;
+ *  The interrupt enable bit for CH6_RX_THR_EVENT_INT.
+ */
+#define RMT_CH6_RX_THR_EVENT_INT_ENA    (BIT(26))
+#define RMT_CH6_RX_THR_EVENT_INT_ENA_M  (RMT_CH6_RX_THR_EVENT_INT_ENA_V << RMT_CH6_RX_THR_EVENT_INT_ENA_S)
+#define RMT_CH6_RX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH6_RX_THR_EVENT_INT_ENA_S  26
+/** RMT_CH7_RX_THR_EVENT_INT_ENA : R/W; bitpos: [27]; default: 0;
+ *  The interrupt enable bit for CH7_RX_THR_EVENT_INT.
+ */
+#define RMT_CH7_RX_THR_EVENT_INT_ENA    (BIT(27))
+#define RMT_CH7_RX_THR_EVENT_INT_ENA_M  (RMT_CH7_RX_THR_EVENT_INT_ENA_V << RMT_CH7_RX_THR_EVENT_INT_ENA_S)
+#define RMT_CH7_RX_THR_EVENT_INT_ENA_V  0x00000001U
+#define RMT_CH7_RX_THR_EVENT_INT_ENA_S  27
+/** RMT_CH3_DMA_ACCESS_FAIL_INT_ENA : R/W; bitpos: [28]; default: 0;
+ *  The interrupt enable bit for CH3_DMA_ACCESS_FAIL_INT.
+ */
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_ENA    (BIT(28))
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_ENA_M  (RMT_CH3_DMA_ACCESS_FAIL_INT_ENA_V << RMT_CH3_DMA_ACCESS_FAIL_INT_ENA_S)
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_ENA_V  0x00000001U
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_ENA_S  28
+/** RMT_CH7_DMA_ACCESS_FAIL_INT_ENA : R/W; bitpos: [29]; default: 0;
+ *  The interrupt enable bit for CH7_DMA_ACCESS_FAIL_INT.
+ */
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_ENA    (BIT(29))
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_ENA_M  (RMT_CH7_DMA_ACCESS_FAIL_INT_ENA_V << RMT_CH7_DMA_ACCESS_FAIL_INT_ENA_S)
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_ENA_V  0x00000001U
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_ENA_S  29
+
+/** RMT_INT_CLR_REG register
+ *  Interrupt clear bits
+ */
+#define RMT_INT_CLR_REG (DR_REG_RMT_BASE + 0x7c)
+/** RMT_CH0_TX_END_INT_CLR : WT; bitpos: [0]; default: 0;
+ *  Set this bit to clear theCH0_TX_END_INT interrupt.
+ */
+#define RMT_CH0_TX_END_INT_CLR    (BIT(0))
+#define RMT_CH0_TX_END_INT_CLR_M  (RMT_CH0_TX_END_INT_CLR_V << RMT_CH0_TX_END_INT_CLR_S)
+#define RMT_CH0_TX_END_INT_CLR_V  0x00000001U
+#define RMT_CH0_TX_END_INT_CLR_S  0
+/** RMT_CH1_TX_END_INT_CLR : WT; bitpos: [1]; default: 0;
+ *  Set this bit to clear theCH1_TX_END_INT interrupt.
+ */
+#define RMT_CH1_TX_END_INT_CLR    (BIT(1))
+#define RMT_CH1_TX_END_INT_CLR_M  (RMT_CH1_TX_END_INT_CLR_V << RMT_CH1_TX_END_INT_CLR_S)
+#define RMT_CH1_TX_END_INT_CLR_V  0x00000001U
+#define RMT_CH1_TX_END_INT_CLR_S  1
+/** RMT_CH2_TX_END_INT_CLR : WT; bitpos: [2]; default: 0;
+ *  Set this bit to clear theCH2_TX_END_INT interrupt.
+ */
+#define RMT_CH2_TX_END_INT_CLR    (BIT(2))
+#define RMT_CH2_TX_END_INT_CLR_M  (RMT_CH2_TX_END_INT_CLR_V << RMT_CH2_TX_END_INT_CLR_S)
+#define RMT_CH2_TX_END_INT_CLR_V  0x00000001U
+#define RMT_CH2_TX_END_INT_CLR_S  2
+/** RMT_CH3_TX_END_INT_CLR : WT; bitpos: [3]; default: 0;
+ *  Set this bit to clear theCH3_TX_END_INT interrupt.
+ */
+#define RMT_CH3_TX_END_INT_CLR    (BIT(3))
+#define RMT_CH3_TX_END_INT_CLR_M  (RMT_CH3_TX_END_INT_CLR_V << RMT_CH3_TX_END_INT_CLR_S)
+#define RMT_CH3_TX_END_INT_CLR_V  0x00000001U
+#define RMT_CH3_TX_END_INT_CLR_S  3
+/** RMT_CH0_ERR_INT_CLR : WT; bitpos: [4]; default: 0;
+ *  Set this bit to clear theCH0_ERR_INT interrupt.
+ */
+#define RMT_CH0_ERR_INT_CLR    (BIT(4))
+#define RMT_CH0_ERR_INT_CLR_M  (RMT_CH0_ERR_INT_CLR_V << RMT_CH0_ERR_INT_CLR_S)
+#define RMT_CH0_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH0_ERR_INT_CLR_S  4
+/** RMT_CH1_ERR_INT_CLR : WT; bitpos: [5]; default: 0;
+ *  Set this bit to clear theCH1_ERR_INT interrupt.
+ */
+#define RMT_CH1_ERR_INT_CLR    (BIT(5))
+#define RMT_CH1_ERR_INT_CLR_M  (RMT_CH1_ERR_INT_CLR_V << RMT_CH1_ERR_INT_CLR_S)
+#define RMT_CH1_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH1_ERR_INT_CLR_S  5
+/** RMT_CH2_ERR_INT_CLR : WT; bitpos: [6]; default: 0;
+ *  Set this bit to clear theCH2_ERR_INT interrupt.
+ */
+#define RMT_CH2_ERR_INT_CLR    (BIT(6))
+#define RMT_CH2_ERR_INT_CLR_M  (RMT_CH2_ERR_INT_CLR_V << RMT_CH2_ERR_INT_CLR_S)
+#define RMT_CH2_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH2_ERR_INT_CLR_S  6
+/** RMT_CH3_ERR_INT_CLR : WT; bitpos: [7]; default: 0;
+ *  Set this bit to clear theCH3_ERR_INT interrupt.
+ */
+#define RMT_CH3_ERR_INT_CLR    (BIT(7))
+#define RMT_CH3_ERR_INT_CLR_M  (RMT_CH3_ERR_INT_CLR_V << RMT_CH3_ERR_INT_CLR_S)
+#define RMT_CH3_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH3_ERR_INT_CLR_S  7
+/** RMT_CH0_TX_THR_EVENT_INT_CLR : WT; bitpos: [8]; default: 0;
+ *  Set this bit to clear theCH0_TX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH0_TX_THR_EVENT_INT_CLR    (BIT(8))
+#define RMT_CH0_TX_THR_EVENT_INT_CLR_M  (RMT_CH0_TX_THR_EVENT_INT_CLR_V << RMT_CH0_TX_THR_EVENT_INT_CLR_S)
+#define RMT_CH0_TX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH0_TX_THR_EVENT_INT_CLR_S  8
+/** RMT_CH1_TX_THR_EVENT_INT_CLR : WT; bitpos: [9]; default: 0;
+ *  Set this bit to clear theCH1_TX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH1_TX_THR_EVENT_INT_CLR    (BIT(9))
+#define RMT_CH1_TX_THR_EVENT_INT_CLR_M  (RMT_CH1_TX_THR_EVENT_INT_CLR_V << RMT_CH1_TX_THR_EVENT_INT_CLR_S)
+#define RMT_CH1_TX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH1_TX_THR_EVENT_INT_CLR_S  9
+/** RMT_CH2_TX_THR_EVENT_INT_CLR : WT; bitpos: [10]; default: 0;
+ *  Set this bit to clear theCH2_TX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH2_TX_THR_EVENT_INT_CLR    (BIT(10))
+#define RMT_CH2_TX_THR_EVENT_INT_CLR_M  (RMT_CH2_TX_THR_EVENT_INT_CLR_V << RMT_CH2_TX_THR_EVENT_INT_CLR_S)
+#define RMT_CH2_TX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH2_TX_THR_EVENT_INT_CLR_S  10
+/** RMT_CH3_TX_THR_EVENT_INT_CLR : WT; bitpos: [11]; default: 0;
+ *  Set this bit to clear theCH3_TX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH3_TX_THR_EVENT_INT_CLR    (BIT(11))
+#define RMT_CH3_TX_THR_EVENT_INT_CLR_M  (RMT_CH3_TX_THR_EVENT_INT_CLR_V << RMT_CH3_TX_THR_EVENT_INT_CLR_S)
+#define RMT_CH3_TX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH3_TX_THR_EVENT_INT_CLR_S  11
+/** RMT_CH0_TX_LOOP_INT_CLR : WT; bitpos: [12]; default: 0;
+ *  Set this bit to clear theCH0_TX_LOOP_INT interrupt.
+ */
+#define RMT_CH0_TX_LOOP_INT_CLR    (BIT(12))
+#define RMT_CH0_TX_LOOP_INT_CLR_M  (RMT_CH0_TX_LOOP_INT_CLR_V << RMT_CH0_TX_LOOP_INT_CLR_S)
+#define RMT_CH0_TX_LOOP_INT_CLR_V  0x00000001U
+#define RMT_CH0_TX_LOOP_INT_CLR_S  12
+/** RMT_CH1_TX_LOOP_INT_CLR : WT; bitpos: [13]; default: 0;
+ *  Set this bit to clear theCH1_TX_LOOP_INT interrupt.
+ */
+#define RMT_CH1_TX_LOOP_INT_CLR    (BIT(13))
+#define RMT_CH1_TX_LOOP_INT_CLR_M  (RMT_CH1_TX_LOOP_INT_CLR_V << RMT_CH1_TX_LOOP_INT_CLR_S)
+#define RMT_CH1_TX_LOOP_INT_CLR_V  0x00000001U
+#define RMT_CH1_TX_LOOP_INT_CLR_S  13
+/** RMT_CH2_TX_LOOP_INT_CLR : WT; bitpos: [14]; default: 0;
+ *  Set this bit to clear theCH2_TX_LOOP_INT interrupt.
+ */
+#define RMT_CH2_TX_LOOP_INT_CLR    (BIT(14))
+#define RMT_CH2_TX_LOOP_INT_CLR_M  (RMT_CH2_TX_LOOP_INT_CLR_V << RMT_CH2_TX_LOOP_INT_CLR_S)
+#define RMT_CH2_TX_LOOP_INT_CLR_V  0x00000001U
+#define RMT_CH2_TX_LOOP_INT_CLR_S  14
+/** RMT_CH3_TX_LOOP_INT_CLR : WT; bitpos: [15]; default: 0;
+ *  Set this bit to clear theCH3_TX_LOOP_INT interrupt.
+ */
+#define RMT_CH3_TX_LOOP_INT_CLR    (BIT(15))
+#define RMT_CH3_TX_LOOP_INT_CLR_M  (RMT_CH3_TX_LOOP_INT_CLR_V << RMT_CH3_TX_LOOP_INT_CLR_S)
+#define RMT_CH3_TX_LOOP_INT_CLR_V  0x00000001U
+#define RMT_CH3_TX_LOOP_INT_CLR_S  15
+/** RMT_CH4_RX_END_INT_CLR : WT; bitpos: [16]; default: 0;
+ *  Set this bit to clear theCH4_RX_END_INT interrupt.
+ */
+#define RMT_CH4_RX_END_INT_CLR    (BIT(16))
+#define RMT_CH4_RX_END_INT_CLR_M  (RMT_CH4_RX_END_INT_CLR_V << RMT_CH4_RX_END_INT_CLR_S)
+#define RMT_CH4_RX_END_INT_CLR_V  0x00000001U
+#define RMT_CH4_RX_END_INT_CLR_S  16
+/** RMT_CH5_RX_END_INT_CLR : WT; bitpos: [17]; default: 0;
+ *  Set this bit to clear theCH5_RX_END_INT interrupt.
+ */
+#define RMT_CH5_RX_END_INT_CLR    (BIT(17))
+#define RMT_CH5_RX_END_INT_CLR_M  (RMT_CH5_RX_END_INT_CLR_V << RMT_CH5_RX_END_INT_CLR_S)
+#define RMT_CH5_RX_END_INT_CLR_V  0x00000001U
+#define RMT_CH5_RX_END_INT_CLR_S  17
+/** RMT_CH6_RX_END_INT_CLR : WT; bitpos: [18]; default: 0;
+ *  Set this bit to clear theCH6_RX_END_INT interrupt.
+ */
+#define RMT_CH6_RX_END_INT_CLR    (BIT(18))
+#define RMT_CH6_RX_END_INT_CLR_M  (RMT_CH6_RX_END_INT_CLR_V << RMT_CH6_RX_END_INT_CLR_S)
+#define RMT_CH6_RX_END_INT_CLR_V  0x00000001U
+#define RMT_CH6_RX_END_INT_CLR_S  18
+/** RMT_CH7_RX_END_INT_CLR : WT; bitpos: [19]; default: 0;
+ *  Set this bit to clear theCH7_RX_END_INT interrupt.
+ */
+#define RMT_CH7_RX_END_INT_CLR    (BIT(19))
+#define RMT_CH7_RX_END_INT_CLR_M  (RMT_CH7_RX_END_INT_CLR_V << RMT_CH7_RX_END_INT_CLR_S)
+#define RMT_CH7_RX_END_INT_CLR_V  0x00000001U
+#define RMT_CH7_RX_END_INT_CLR_S  19
+/** RMT_CH4_ERR_INT_CLR : WT; bitpos: [20]; default: 0;
+ *  Set this bit to clear theCH4_ERR_INT interrupt.
+ */
+#define RMT_CH4_ERR_INT_CLR    (BIT(20))
+#define RMT_CH4_ERR_INT_CLR_M  (RMT_CH4_ERR_INT_CLR_V << RMT_CH4_ERR_INT_CLR_S)
+#define RMT_CH4_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH4_ERR_INT_CLR_S  20
+/** RMT_CH5_ERR_INT_CLR : WT; bitpos: [21]; default: 0;
+ *  Set this bit to clear theCH5_ERR_INT interrupt.
+ */
+#define RMT_CH5_ERR_INT_CLR    (BIT(21))
+#define RMT_CH5_ERR_INT_CLR_M  (RMT_CH5_ERR_INT_CLR_V << RMT_CH5_ERR_INT_CLR_S)
+#define RMT_CH5_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH5_ERR_INT_CLR_S  21
+/** RMT_CH6_ERR_INT_CLR : WT; bitpos: [22]; default: 0;
+ *  Set this bit to clear theCH6_ERR_INT interrupt.
+ */
+#define RMT_CH6_ERR_INT_CLR    (BIT(22))
+#define RMT_CH6_ERR_INT_CLR_M  (RMT_CH6_ERR_INT_CLR_V << RMT_CH6_ERR_INT_CLR_S)
+#define RMT_CH6_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH6_ERR_INT_CLR_S  22
+/** RMT_CH7_ERR_INT_CLR : WT; bitpos: [23]; default: 0;
+ *  Set this bit to clear theCH7_ERR_INT interrupt.
+ */
+#define RMT_CH7_ERR_INT_CLR    (BIT(23))
+#define RMT_CH7_ERR_INT_CLR_M  (RMT_CH7_ERR_INT_CLR_V << RMT_CH7_ERR_INT_CLR_S)
+#define RMT_CH7_ERR_INT_CLR_V  0x00000001U
+#define RMT_CH7_ERR_INT_CLR_S  23
+/** RMT_CH4_RX_THR_EVENT_INT_CLR : WT; bitpos: [24]; default: 0;
+ *  Set this bit to clear theCH4_RX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH4_RX_THR_EVENT_INT_CLR    (BIT(24))
+#define RMT_CH4_RX_THR_EVENT_INT_CLR_M  (RMT_CH4_RX_THR_EVENT_INT_CLR_V << RMT_CH4_RX_THR_EVENT_INT_CLR_S)
+#define RMT_CH4_RX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH4_RX_THR_EVENT_INT_CLR_S  24
+/** RMT_CH5_RX_THR_EVENT_INT_CLR : WT; bitpos: [25]; default: 0;
+ *  Set this bit to clear theCH5_RX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH5_RX_THR_EVENT_INT_CLR    (BIT(25))
+#define RMT_CH5_RX_THR_EVENT_INT_CLR_M  (RMT_CH5_RX_THR_EVENT_INT_CLR_V << RMT_CH5_RX_THR_EVENT_INT_CLR_S)
+#define RMT_CH5_RX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH5_RX_THR_EVENT_INT_CLR_S  25
+/** RMT_CH6_RX_THR_EVENT_INT_CLR : WT; bitpos: [26]; default: 0;
+ *  Set this bit to clear theCH6_RX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH6_RX_THR_EVENT_INT_CLR    (BIT(26))
+#define RMT_CH6_RX_THR_EVENT_INT_CLR_M  (RMT_CH6_RX_THR_EVENT_INT_CLR_V << RMT_CH6_RX_THR_EVENT_INT_CLR_S)
+#define RMT_CH6_RX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH6_RX_THR_EVENT_INT_CLR_S  26
+/** RMT_CH7_RX_THR_EVENT_INT_CLR : WT; bitpos: [27]; default: 0;
+ *  Set this bit to clear theCH7_RX_THR_EVENT_INT interrupt.
+ */
+#define RMT_CH7_RX_THR_EVENT_INT_CLR    (BIT(27))
+#define RMT_CH7_RX_THR_EVENT_INT_CLR_M  (RMT_CH7_RX_THR_EVENT_INT_CLR_V << RMT_CH7_RX_THR_EVENT_INT_CLR_S)
+#define RMT_CH7_RX_THR_EVENT_INT_CLR_V  0x00000001U
+#define RMT_CH7_RX_THR_EVENT_INT_CLR_S  27
+/** RMT_CH3_DMA_ACCESS_FAIL_INT_CLR : WT; bitpos: [28]; default: 0;
+ *  Set this bit to clear the CH3_DMA_ACCESS_FAIL_INT interrupt.
+ */
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_CLR    (BIT(28))
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_CLR_M  (RMT_CH3_DMA_ACCESS_FAIL_INT_CLR_V << RMT_CH3_DMA_ACCESS_FAIL_INT_CLR_S)
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_CLR_V  0x00000001U
+#define RMT_CH3_DMA_ACCESS_FAIL_INT_CLR_S  28
+/** RMT_CH7_DMA_ACCESS_FAIL_INT_CLR : WT; bitpos: [29]; default: 0;
+ *  Set this bit to clear the CH7_DMA_ACCESS_FAIL_INT interrupt.
+ */
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_CLR    (BIT(29))
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_CLR_M  (RMT_CH7_DMA_ACCESS_FAIL_INT_CLR_V << RMT_CH7_DMA_ACCESS_FAIL_INT_CLR_S)
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_CLR_V  0x00000001U
+#define RMT_CH7_DMA_ACCESS_FAIL_INT_CLR_S  29
+
+/** RMT_CH0CARRIER_DUTY_REG register
+ *  Channel 0 duty cycle configuration register
+ */
+#define RMT_CH0CARRIER_DUTY_REG (DR_REG_RMT_BASE + 0x80)
+/** RMT_CARRIER_LOW_CH0 : R/W; bitpos: [15:0]; default: 64;
+ *  This register is used to configure carrier wave 's low level clock period for
+ *  CHANNEL0.
+ */
+#define RMT_CARRIER_LOW_CH0    0x0000FFFFU
+#define RMT_CARRIER_LOW_CH0_M  (RMT_CARRIER_LOW_CH0_V << RMT_CARRIER_LOW_CH0_S)
+#define RMT_CARRIER_LOW_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_CH0_S  0
+/** RMT_CARRIER_HIGH_CH0 : R/W; bitpos: [31:16]; default: 64;
+ *  This register is used to configure carrier wave 's high level clock period for
+ *  CHANNEL0.
+ */
+#define RMT_CARRIER_HIGH_CH0    0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH0_M  (RMT_CARRIER_HIGH_CH0_V << RMT_CARRIER_HIGH_CH0_S)
+#define RMT_CARRIER_HIGH_CH0_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH0_S  16
+
+/** RMT_CH1CARRIER_DUTY_REG register
+ *  Channel 1 duty cycle configuration register
+ */
+#define RMT_CH1CARRIER_DUTY_REG (DR_REG_RMT_BASE + 0x84)
+/** RMT_CARRIER_LOW_CH1 : R/W; bitpos: [15:0]; default: 64;
+ *  This register is used to configure carrier wave 's low level clock period for
+ *  CHANNEL1.
+ */
+#define RMT_CARRIER_LOW_CH1    0x0000FFFFU
+#define RMT_CARRIER_LOW_CH1_M  (RMT_CARRIER_LOW_CH1_V << RMT_CARRIER_LOW_CH1_S)
+#define RMT_CARRIER_LOW_CH1_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_CH1_S  0
+/** RMT_CARRIER_HIGH_CH1 : R/W; bitpos: [31:16]; default: 64;
+ *  This register is used to configure carrier wave 's high level clock period for
+ *  CHANNEL1.
+ */
+#define RMT_CARRIER_HIGH_CH1    0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH1_M  (RMT_CARRIER_HIGH_CH1_V << RMT_CARRIER_HIGH_CH1_S)
+#define RMT_CARRIER_HIGH_CH1_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH1_S  16
+
+/** RMT_CH2CARRIER_DUTY_REG register
+ *  Channel 2 duty cycle configuration register
+ */
+#define RMT_CH2CARRIER_DUTY_REG (DR_REG_RMT_BASE + 0x88)
+/** RMT_CARRIER_LOW_CH2 : R/W; bitpos: [15:0]; default: 64;
+ *  This register is used to configure carrier wave 's low level clock period for
+ *  CHANNEL2.
+ */
+#define RMT_CARRIER_LOW_CH2    0x0000FFFFU
+#define RMT_CARRIER_LOW_CH2_M  (RMT_CARRIER_LOW_CH2_V << RMT_CARRIER_LOW_CH2_S)
+#define RMT_CARRIER_LOW_CH2_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_CH2_S  0
+/** RMT_CARRIER_HIGH_CH2 : R/W; bitpos: [31:16]; default: 64;
+ *  This register is used to configure carrier wave 's high level clock period for
+ *  CHANNEL2.
+ */
+#define RMT_CARRIER_HIGH_CH2    0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH2_M  (RMT_CARRIER_HIGH_CH2_V << RMT_CARRIER_HIGH_CH2_S)
+#define RMT_CARRIER_HIGH_CH2_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH2_S  16
+
+/** RMT_CH3CARRIER_DUTY_REG register
+ *  Channel 3 duty cycle configuration register
+ */
+#define RMT_CH3CARRIER_DUTY_REG (DR_REG_RMT_BASE + 0x8c)
+/** RMT_CARRIER_LOW_CH3 : R/W; bitpos: [15:0]; default: 64;
+ *  This register is used to configure carrier wave 's low level clock period for
+ *  CHANNEL3.
+ */
+#define RMT_CARRIER_LOW_CH3    0x0000FFFFU
+#define RMT_CARRIER_LOW_CH3_M  (RMT_CARRIER_LOW_CH3_V << RMT_CARRIER_LOW_CH3_S)
+#define RMT_CARRIER_LOW_CH3_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_CH3_S  0
+/** RMT_CARRIER_HIGH_CH3 : R/W; bitpos: [31:16]; default: 64;
+ *  This register is used to configure carrier wave 's high level clock period for
+ *  CHANNEL3.
+ */
+#define RMT_CARRIER_HIGH_CH3    0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH3_M  (RMT_CARRIER_HIGH_CH3_V << RMT_CARRIER_HIGH_CH3_S)
+#define RMT_CARRIER_HIGH_CH3_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_CH3_S  16
+
+/** RMT_CH4_RX_CARRIER_RM_REG register
+ *  Channel 4 carrier remove register
+ */
+#define RMT_CH4_RX_CARRIER_RM_REG (DR_REG_RMT_BASE + 0x90)
+/** RMT_CARRIER_LOW_THRES_CH4 : R/W; bitpos: [15:0]; default: 0;
+ *  The low level period in a carrier modulation mode is
+ *  (REG_RMT_REG_CARRIER_LOW_THRES_CH4 + 1) for channel 4.
+ */
+#define RMT_CARRIER_LOW_THRES_CH4    0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH4_M  (RMT_CARRIER_LOW_THRES_CH4_V << RMT_CARRIER_LOW_THRES_CH4_S)
+#define RMT_CARRIER_LOW_THRES_CH4_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH4_S  0
+/** RMT_CARRIER_HIGH_THRES_CH4 : R/W; bitpos: [31:16]; default: 0;
+ *  The high level period in a carrier modulation mode is
+ *  (REG_RMT_REG_CARRIER_HIGH_THRES_CH4 + 1) for channel 4.
+ */
+#define RMT_CARRIER_HIGH_THRES_CH4    0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH4_M  (RMT_CARRIER_HIGH_THRES_CH4_V << RMT_CARRIER_HIGH_THRES_CH4_S)
+#define RMT_CARRIER_HIGH_THRES_CH4_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH4_S  16
+
+/** RMT_CH5_RX_CARRIER_RM_REG register
+ *  Channel 5 carrier remove register
+ */
+#define RMT_CH5_RX_CARRIER_RM_REG (DR_REG_RMT_BASE + 0x94)
+/** RMT_CARRIER_LOW_THRES_CH5 : R/W; bitpos: [15:0]; default: 0;
+ *  The low level period in a carrier modulation mode is
+ *  (REG_RMT_REG_CARRIER_LOW_THRES_CH5 + 1) for channel 5.
+ */
+#define RMT_CARRIER_LOW_THRES_CH5    0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH5_M  (RMT_CARRIER_LOW_THRES_CH5_V << RMT_CARRIER_LOW_THRES_CH5_S)
+#define RMT_CARRIER_LOW_THRES_CH5_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH5_S  0
+/** RMT_CARRIER_HIGH_THRES_CH5 : R/W; bitpos: [31:16]; default: 0;
+ *  The high level period in a carrier modulation mode is
+ *  (REG_RMT_REG_CARRIER_HIGH_THRES_CH5 + 1) for channel 5.
+ */
+#define RMT_CARRIER_HIGH_THRES_CH5    0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH5_M  (RMT_CARRIER_HIGH_THRES_CH5_V << RMT_CARRIER_HIGH_THRES_CH5_S)
+#define RMT_CARRIER_HIGH_THRES_CH5_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH5_S  16
+
+/** RMT_CH6_RX_CARRIER_RM_REG register
+ *  Channel 6 carrier remove register
+ */
+#define RMT_CH6_RX_CARRIER_RM_REG (DR_REG_RMT_BASE + 0x98)
+/** RMT_CARRIER_LOW_THRES_CH6 : R/W; bitpos: [15:0]; default: 0;
+ *  The low level period in a carrier modulation mode is
+ *  (REG_RMT_REG_CARRIER_LOW_THRES_CH6 + 1) for channel 6.
+ */
+#define RMT_CARRIER_LOW_THRES_CH6    0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH6_M  (RMT_CARRIER_LOW_THRES_CH6_V << RMT_CARRIER_LOW_THRES_CH6_S)
+#define RMT_CARRIER_LOW_THRES_CH6_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH6_S  0
+/** RMT_CARRIER_HIGH_THRES_CH6 : R/W; bitpos: [31:16]; default: 0;
+ *  The high level period in a carrier modulation mode is
+ *  (REG_RMT_REG_CARRIER_HIGH_THRES_CH6 + 1) for channel 6.
+ */
+#define RMT_CARRIER_HIGH_THRES_CH6    0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH6_M  (RMT_CARRIER_HIGH_THRES_CH6_V << RMT_CARRIER_HIGH_THRES_CH6_S)
+#define RMT_CARRIER_HIGH_THRES_CH6_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH6_S  16
+
+/** RMT_CH7_RX_CARRIER_RM_REG register
+ *  Channel 7 carrier remove register
+ */
+#define RMT_CH7_RX_CARRIER_RM_REG (DR_REG_RMT_BASE + 0x9c)
+/** RMT_CARRIER_LOW_THRES_CH7 : R/W; bitpos: [15:0]; default: 0;
+ *  The low level period in a carrier modulation mode is
+ *  (REG_RMT_REG_CARRIER_LOW_THRES_CH7 + 1) for channel 7.
+ */
+#define RMT_CARRIER_LOW_THRES_CH7    0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH7_M  (RMT_CARRIER_LOW_THRES_CH7_V << RMT_CARRIER_LOW_THRES_CH7_S)
+#define RMT_CARRIER_LOW_THRES_CH7_V  0x0000FFFFU
+#define RMT_CARRIER_LOW_THRES_CH7_S  0
+/** RMT_CARRIER_HIGH_THRES_CH7 : R/W; bitpos: [31:16]; default: 0;
+ *  The high level period in a carrier modulation mode is
+ *  (REG_RMT_REG_CARRIER_HIGH_THRES_CH7 + 1) for channel 7.
+ */
+#define RMT_CARRIER_HIGH_THRES_CH7    0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH7_M  (RMT_CARRIER_HIGH_THRES_CH7_V << RMT_CARRIER_HIGH_THRES_CH7_S)
+#define RMT_CARRIER_HIGH_THRES_CH7_V  0x0000FFFFU
+#define RMT_CARRIER_HIGH_THRES_CH7_S  16
+
+/** RMT_CH0_TX_LIM_REG register
+ *  Channel 0 Tx event configuration register
+ */
+#define RMT_CH0_TX_LIM_REG (DR_REG_RMT_BASE + 0xa0)
+/** RMT_TX_LIM_CH0 : R/W; bitpos: [8:0]; default: 128;
+ *  This register is used to configure the maximum entries that CHANNEL0 can send out.
+ */
+#define RMT_TX_LIM_CH0    0x000001FFU
+#define RMT_TX_LIM_CH0_M  (RMT_TX_LIM_CH0_V << RMT_TX_LIM_CH0_S)
+#define RMT_TX_LIM_CH0_V  0x000001FFU
+#define RMT_TX_LIM_CH0_S  0
+/** RMT_TX_LOOP_NUM_CH0 : R/W; bitpos: [18:9]; default: 0;
+ *  This register is used to configure the maximum loop count when tx_conti_mode is
+ *  valid.
+ */
+#define RMT_TX_LOOP_NUM_CH0    0x000003FFU
+#define RMT_TX_LOOP_NUM_CH0_M  (RMT_TX_LOOP_NUM_CH0_V << RMT_TX_LOOP_NUM_CH0_S)
+#define RMT_TX_LOOP_NUM_CH0_V  0x000003FFU
+#define RMT_TX_LOOP_NUM_CH0_S  9
+/** RMT_TX_LOOP_CNT_EN_CH0 : R/W; bitpos: [19]; default: 0;
+ *  This register is the enabled bit for loop count.
+ */
+#define RMT_TX_LOOP_CNT_EN_CH0    (BIT(19))
+#define RMT_TX_LOOP_CNT_EN_CH0_M  (RMT_TX_LOOP_CNT_EN_CH0_V << RMT_TX_LOOP_CNT_EN_CH0_S)
+#define RMT_TX_LOOP_CNT_EN_CH0_V  0x00000001U
+#define RMT_TX_LOOP_CNT_EN_CH0_S  19
+/** RMT_LOOP_COUNT_RESET_CH0 : WT; bitpos: [20]; default: 0;
+ *  This register is used to reset the loop count when tx_conti_mode is valid.
+ */
+#define RMT_LOOP_COUNT_RESET_CH0    (BIT(20))
+#define RMT_LOOP_COUNT_RESET_CH0_M  (RMT_LOOP_COUNT_RESET_CH0_V << RMT_LOOP_COUNT_RESET_CH0_S)
+#define RMT_LOOP_COUNT_RESET_CH0_V  0x00000001U
+#define RMT_LOOP_COUNT_RESET_CH0_S  20
+/** RMT_LOOP_STOP_EN_CH0 : R/W; bitpos: [21]; default: 0;
+ *  This bit is used to enable the loop send stop function after the loop counter
+ *  counts to  loop number for CHANNEL0.
+ */
+#define RMT_LOOP_STOP_EN_CH0    (BIT(21))
+#define RMT_LOOP_STOP_EN_CH0_M  (RMT_LOOP_STOP_EN_CH0_V << RMT_LOOP_STOP_EN_CH0_S)
+#define RMT_LOOP_STOP_EN_CH0_V  0x00000001U
+#define RMT_LOOP_STOP_EN_CH0_S  21
+
+/** RMT_CH1_TX_LIM_REG register
+ *  Channel 1 Tx event configuration register
+ */
+#define RMT_CH1_TX_LIM_REG (DR_REG_RMT_BASE + 0xa4)
+/** RMT_TX_LIM_CH1 : R/W; bitpos: [8:0]; default: 128;
+ *  This register is used to configure the maximum entries that CHANNEL1 can send out.
+ */
+#define RMT_TX_LIM_CH1    0x000001FFU
+#define RMT_TX_LIM_CH1_M  (RMT_TX_LIM_CH1_V << RMT_TX_LIM_CH1_S)
+#define RMT_TX_LIM_CH1_V  0x000001FFU
+#define RMT_TX_LIM_CH1_S  0
+/** RMT_TX_LOOP_NUM_CH1 : R/W; bitpos: [18:9]; default: 0;
+ *  This register is used to configure the maximum loop count when tx_conti_mode is
+ *  valid.
+ */
+#define RMT_TX_LOOP_NUM_CH1    0x000003FFU
+#define RMT_TX_LOOP_NUM_CH1_M  (RMT_TX_LOOP_NUM_CH1_V << RMT_TX_LOOP_NUM_CH1_S)
+#define RMT_TX_LOOP_NUM_CH1_V  0x000003FFU
+#define RMT_TX_LOOP_NUM_CH1_S  9
+/** RMT_TX_LOOP_CNT_EN_CH1 : R/W; bitpos: [19]; default: 0;
+ *  This register is the enabled bit for loop count.
+ */
+#define RMT_TX_LOOP_CNT_EN_CH1    (BIT(19))
+#define RMT_TX_LOOP_CNT_EN_CH1_M  (RMT_TX_LOOP_CNT_EN_CH1_V << RMT_TX_LOOP_CNT_EN_CH1_S)
+#define RMT_TX_LOOP_CNT_EN_CH1_V  0x00000001U
+#define RMT_TX_LOOP_CNT_EN_CH1_S  19
+/** RMT_LOOP_COUNT_RESET_CH1 : WT; bitpos: [20]; default: 0;
+ *  This register is used to reset the loop count when tx_conti_mode is valid.
+ */
+#define RMT_LOOP_COUNT_RESET_CH1    (BIT(20))
+#define RMT_LOOP_COUNT_RESET_CH1_M  (RMT_LOOP_COUNT_RESET_CH1_V << RMT_LOOP_COUNT_RESET_CH1_S)
+#define RMT_LOOP_COUNT_RESET_CH1_V  0x00000001U
+#define RMT_LOOP_COUNT_RESET_CH1_S  20
+/** RMT_LOOP_STOP_EN_CH1 : R/W; bitpos: [21]; default: 0;
+ *  This bit is used to enable the loop send stop function after the loop counter
+ *  counts to  loop number for CHANNEL1.
+ */
+#define RMT_LOOP_STOP_EN_CH1    (BIT(21))
+#define RMT_LOOP_STOP_EN_CH1_M  (RMT_LOOP_STOP_EN_CH1_V << RMT_LOOP_STOP_EN_CH1_S)
+#define RMT_LOOP_STOP_EN_CH1_V  0x00000001U
+#define RMT_LOOP_STOP_EN_CH1_S  21
+
+/** RMT_CH2_TX_LIM_REG register
+ *  Channel 2 Tx event configuration register
+ */
+#define RMT_CH2_TX_LIM_REG (DR_REG_RMT_BASE + 0xa8)
+/** RMT_TX_LIM_CH2 : R/W; bitpos: [8:0]; default: 128;
+ *  This register is used to configure the maximum entries that CHANNEL2 can send out.
+ */
+#define RMT_TX_LIM_CH2    0x000001FFU
+#define RMT_TX_LIM_CH2_M  (RMT_TX_LIM_CH2_V << RMT_TX_LIM_CH2_S)
+#define RMT_TX_LIM_CH2_V  0x000001FFU
+#define RMT_TX_LIM_CH2_S  0
+/** RMT_TX_LOOP_NUM_CH2 : R/W; bitpos: [18:9]; default: 0;
+ *  This register is used to configure the maximum loop count when tx_conti_mode is
+ *  valid.
+ */
+#define RMT_TX_LOOP_NUM_CH2    0x000003FFU
+#define RMT_TX_LOOP_NUM_CH2_M  (RMT_TX_LOOP_NUM_CH2_V << RMT_TX_LOOP_NUM_CH2_S)
+#define RMT_TX_LOOP_NUM_CH2_V  0x000003FFU
+#define RMT_TX_LOOP_NUM_CH2_S  9
+/** RMT_TX_LOOP_CNT_EN_CH2 : R/W; bitpos: [19]; default: 0;
+ *  This register is the enabled bit for loop count.
+ */
+#define RMT_TX_LOOP_CNT_EN_CH2    (BIT(19))
+#define RMT_TX_LOOP_CNT_EN_CH2_M  (RMT_TX_LOOP_CNT_EN_CH2_V << RMT_TX_LOOP_CNT_EN_CH2_S)
+#define RMT_TX_LOOP_CNT_EN_CH2_V  0x00000001U
+#define RMT_TX_LOOP_CNT_EN_CH2_S  19
+/** RMT_LOOP_COUNT_RESET_CH2 : WT; bitpos: [20]; default: 0;
+ *  This register is used to reset the loop count when tx_conti_mode is valid.
+ */
+#define RMT_LOOP_COUNT_RESET_CH2    (BIT(20))
+#define RMT_LOOP_COUNT_RESET_CH2_M  (RMT_LOOP_COUNT_RESET_CH2_V << RMT_LOOP_COUNT_RESET_CH2_S)
+#define RMT_LOOP_COUNT_RESET_CH2_V  0x00000001U
+#define RMT_LOOP_COUNT_RESET_CH2_S  20
+/** RMT_LOOP_STOP_EN_CH2 : R/W; bitpos: [21]; default: 0;
+ *  This bit is used to enable the loop send stop function after the loop counter
+ *  counts to  loop number for CHANNEL2.
+ */
+#define RMT_LOOP_STOP_EN_CH2    (BIT(21))
+#define RMT_LOOP_STOP_EN_CH2_M  (RMT_LOOP_STOP_EN_CH2_V << RMT_LOOP_STOP_EN_CH2_S)
+#define RMT_LOOP_STOP_EN_CH2_V  0x00000001U
+#define RMT_LOOP_STOP_EN_CH2_S  21
+
+/** RMT_CH3_TX_LIM_REG register
+ *  Channel 3 Tx event configuration register
+ */
+#define RMT_CH3_TX_LIM_REG (DR_REG_RMT_BASE + 0xac)
+/** RMT_TX_LIM_CH3 : R/W; bitpos: [8:0]; default: 128;
+ *  This register is used to configure the maximum entries that CHANNEL3 can send out.
+ */
+#define RMT_TX_LIM_CH3    0x000001FFU
+#define RMT_TX_LIM_CH3_M  (RMT_TX_LIM_CH3_V << RMT_TX_LIM_CH3_S)
+#define RMT_TX_LIM_CH3_V  0x000001FFU
+#define RMT_TX_LIM_CH3_S  0
+/** RMT_TX_LOOP_NUM_CH3 : R/W; bitpos: [18:9]; default: 0;
+ *  This register is used to configure the maximum loop count when tx_conti_mode is
+ *  valid.
+ */
+#define RMT_TX_LOOP_NUM_CH3    0x000003FFU
+#define RMT_TX_LOOP_NUM_CH3_M  (RMT_TX_LOOP_NUM_CH3_V << RMT_TX_LOOP_NUM_CH3_S)
+#define RMT_TX_LOOP_NUM_CH3_V  0x000003FFU
+#define RMT_TX_LOOP_NUM_CH3_S  9
+/** RMT_TX_LOOP_CNT_EN_CH3 : R/W; bitpos: [19]; default: 0;
+ *  This register is the enabled bit for loop count.
+ */
+#define RMT_TX_LOOP_CNT_EN_CH3    (BIT(19))
+#define RMT_TX_LOOP_CNT_EN_CH3_M  (RMT_TX_LOOP_CNT_EN_CH3_V << RMT_TX_LOOP_CNT_EN_CH3_S)
+#define RMT_TX_LOOP_CNT_EN_CH3_V  0x00000001U
+#define RMT_TX_LOOP_CNT_EN_CH3_S  19
+/** RMT_LOOP_COUNT_RESET_CH3 : WT; bitpos: [20]; default: 0;
+ *  This register is used to reset the loop count when tx_conti_mode is valid.
+ */
+#define RMT_LOOP_COUNT_RESET_CH3    (BIT(20))
+#define RMT_LOOP_COUNT_RESET_CH3_M  (RMT_LOOP_COUNT_RESET_CH3_V << RMT_LOOP_COUNT_RESET_CH3_S)
+#define RMT_LOOP_COUNT_RESET_CH3_V  0x00000001U
+#define RMT_LOOP_COUNT_RESET_CH3_S  20
+/** RMT_LOOP_STOP_EN_CH3 : R/W; bitpos: [21]; default: 0;
+ *  This bit is used to enable the loop send stop function after the loop counter
+ *  counts to  loop number for CHANNEL3.
+ */
+#define RMT_LOOP_STOP_EN_CH3    (BIT(21))
+#define RMT_LOOP_STOP_EN_CH3_M  (RMT_LOOP_STOP_EN_CH3_V << RMT_LOOP_STOP_EN_CH3_S)
+#define RMT_LOOP_STOP_EN_CH3_V  0x00000001U
+#define RMT_LOOP_STOP_EN_CH3_S  21
+
+/** RMT_CH4_RX_LIM_REG register
+ *  Channel 4 Rx event configuration register
+ */
+#define RMT_CH4_RX_LIM_REG (DR_REG_RMT_BASE + 0xb0)
+/** RMT_CH4_RX_LIM_REG : R/W; bitpos: [8:0]; default: 128;
+ *  This register is used to configure the maximum entries that CHANNEL4 can receive.
+ */
+#define RMT_CH4_RX_LIM_REG    0x000001FFU
+#define RMT_CH4_RX_LIM_REG_M  (RMT_CH4_RX_LIM_REG_V << RMT_CH4_RX_LIM_REG_S)
+#define RMT_CH4_RX_LIM_REG_V  0x000001FFU
+#define RMT_CH4_RX_LIM_REG_S  0
+
+/** RMT_CH5_RX_LIM_REG register
+ *  Channel 5 Rx event configuration register
+ */
+#define RMT_CH5_RX_LIM_REG (DR_REG_RMT_BASE + 0xb4)
+/** RMT_CH5_RX_LIM_REG : R/W; bitpos: [8:0]; default: 128;
+ *  This register is used to configure the maximum entries that CHANNEL5 can receive.
+ */
+#define RMT_CH5_RX_LIM_REG    0x000001FFU
+#define RMT_CH5_RX_LIM_REG_M  (RMT_CH5_RX_LIM_REG_V << RMT_CH5_RX_LIM_REG_S)
+#define RMT_CH5_RX_LIM_REG_V  0x000001FFU
+#define RMT_CH5_RX_LIM_REG_S  0
+
+/** RMT_CH6_RX_LIM_REG register
+ *  Channel 6 Rx event configuration register
+ */
+#define RMT_CH6_RX_LIM_REG (DR_REG_RMT_BASE + 0xb8)
+/** RMT_CH6_RX_LIM_REG : R/W; bitpos: [8:0]; default: 128;
+ *  This register is used to configure the maximum entries that CHANNEL6 can receive.
+ */
+#define RMT_CH6_RX_LIM_REG    0x000001FFU
+#define RMT_CH6_RX_LIM_REG_M  (RMT_CH6_RX_LIM_REG_V << RMT_CH6_RX_LIM_REG_S)
+#define RMT_CH6_RX_LIM_REG_V  0x000001FFU
+#define RMT_CH6_RX_LIM_REG_S  0
+
+/** RMT_CH7_RX_LIM_REG register
+ *  Channel 7 Rx event configuration register
+ */
+#define RMT_CH7_RX_LIM_REG (DR_REG_RMT_BASE + 0xbc)
+/** RMT_CH7_RX_LIM_REG : R/W; bitpos: [8:0]; default: 128;
+ *  This register is used to configure the maximum entries that CHANNEL7 can receive.
+ */
+#define RMT_CH7_RX_LIM_REG    0x000001FFU
+#define RMT_CH7_RX_LIM_REG_M  (RMT_CH7_RX_LIM_REG_V << RMT_CH7_RX_LIM_REG_S)
+#define RMT_CH7_RX_LIM_REG_V  0x000001FFU
+#define RMT_CH7_RX_LIM_REG_S  0
+
+/** RMT_SYS_CONF_REG register
+ *  RMT apb configuration register
+ */
+#define RMT_SYS_CONF_REG (DR_REG_RMT_BASE + 0xc0)
+/** RMT_APB_FIFO_MASK : R/W; bitpos: [0]; default: 0;
+ *  1'h1: access memory directly.   1'h0: access memory by FIFO.
+ */
+#define RMT_APB_FIFO_MASK    (BIT(0))
+#define RMT_APB_FIFO_MASK_M  (RMT_APB_FIFO_MASK_V << RMT_APB_FIFO_MASK_S)
+#define RMT_APB_FIFO_MASK_V  0x00000001U
+#define RMT_APB_FIFO_MASK_S  0
+/** RMT_MEM_CLK_FORCE_ON : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to enable the clock for RMT memory.
+ */
+#define RMT_MEM_CLK_FORCE_ON    (BIT(1))
+#define RMT_MEM_CLK_FORCE_ON_M  (RMT_MEM_CLK_FORCE_ON_V << RMT_MEM_CLK_FORCE_ON_S)
+#define RMT_MEM_CLK_FORCE_ON_V  0x00000001U
+#define RMT_MEM_CLK_FORCE_ON_S  1
+/** RMT_MEM_FORCE_PD : R/W; bitpos: [2]; default: 0;
+ *  Set this bit to power down RMT memory.
+ */
+#define RMT_MEM_FORCE_PD    (BIT(2))
+#define RMT_MEM_FORCE_PD_M  (RMT_MEM_FORCE_PD_V << RMT_MEM_FORCE_PD_S)
+#define RMT_MEM_FORCE_PD_V  0x00000001U
+#define RMT_MEM_FORCE_PD_S  2
+/** RMT_MEM_FORCE_PU : R/W; bitpos: [3]; default: 0;
+ *  1: Disable RMT memory light sleep power down function. 0: Power down RMT memory
+ *  when RMT is in light sleep mode.
+ */
+#define RMT_MEM_FORCE_PU    (BIT(3))
+#define RMT_MEM_FORCE_PU_M  (RMT_MEM_FORCE_PU_V << RMT_MEM_FORCE_PU_S)
+#define RMT_MEM_FORCE_PU_V  0x00000001U
+#define RMT_MEM_FORCE_PU_S  3
+/** RMT_SCLK_DIV_NUM : R/W; bitpos: [11:4]; default: 1;
+ *  the integral part of the fractional divisor
+ */
+#define RMT_SCLK_DIV_NUM    0x000000FFU
+#define RMT_SCLK_DIV_NUM_M  (RMT_SCLK_DIV_NUM_V << RMT_SCLK_DIV_NUM_S)
+#define RMT_SCLK_DIV_NUM_V  0x000000FFU
+#define RMT_SCLK_DIV_NUM_S  4
+/** RMT_SCLK_DIV_A : R/W; bitpos: [17:12]; default: 0;
+ *  the numerator of the fractional part of the fractional divisor
+ */
+#define RMT_SCLK_DIV_A    0x0000003FU
+#define RMT_SCLK_DIV_A_M  (RMT_SCLK_DIV_A_V << RMT_SCLK_DIV_A_S)
+#define RMT_SCLK_DIV_A_V  0x0000003FU
+#define RMT_SCLK_DIV_A_S  12
+/** RMT_SCLK_DIV_B : R/W; bitpos: [23:18]; default: 0;
+ *  the denominator of the fractional part of the fractional divisor
+ */
+#define RMT_SCLK_DIV_B    0x0000003FU
+#define RMT_SCLK_DIV_B_M  (RMT_SCLK_DIV_B_V << RMT_SCLK_DIV_B_S)
+#define RMT_SCLK_DIV_B_V  0x0000003FU
+#define RMT_SCLK_DIV_B_S  18
+/** RMT_SCLK_SEL : R/W; bitpos: [25:24]; default: 1;
+ *  choose the clock source of rmt_sclk. 1:CLK_80Mhz;2:CLK_8MHz; 2:XTAL
+ */
+#define RMT_SCLK_SEL    0x00000003U
+#define RMT_SCLK_SEL_M  (RMT_SCLK_SEL_V << RMT_SCLK_SEL_S)
+#define RMT_SCLK_SEL_V  0x00000003U
+#define RMT_SCLK_SEL_S  24
+/** RMT_SCLK_ACTIVE : R/W; bitpos: [26]; default: 1;
+ *  rmt_sclk switch
+ */
+#define RMT_SCLK_ACTIVE    (BIT(26))
+#define RMT_SCLK_ACTIVE_M  (RMT_SCLK_ACTIVE_V << RMT_SCLK_ACTIVE_S)
+#define RMT_SCLK_ACTIVE_V  0x00000001U
+#define RMT_SCLK_ACTIVE_S  26
+/** RMT_CLK_EN : R/W; bitpos: [31]; default: 0;
+ *  RMT register clock gate enable signal. 1: Power up the drive clock of registers. 0:
+ *  Power down the drive clock of registers
+ */
+#define RMT_CLK_EN    (BIT(31))
+#define RMT_CLK_EN_M  (RMT_CLK_EN_V << RMT_CLK_EN_S)
+#define RMT_CLK_EN_V  0x00000001U
+#define RMT_CLK_EN_S  31
+
+/** RMT_TX_SIM_REG register
+ *  RMT TX synchronous register
+ */
+#define RMT_TX_SIM_REG (DR_REG_RMT_BASE + 0xc4)
+/** RMT_TX_SIM_CH0 : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to enable CHANNEL0 to start sending data synchronously with other
+ *  enabled channels.
+ */
+#define RMT_TX_SIM_CH0    (BIT(0))
+#define RMT_TX_SIM_CH0_M  (RMT_TX_SIM_CH0_V << RMT_TX_SIM_CH0_S)
+#define RMT_TX_SIM_CH0_V  0x00000001U
+#define RMT_TX_SIM_CH0_S  0
+/** RMT_TX_SIM_CH1 : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to enable CHANNEL1 to start sending data synchronously with other
+ *  enabled channels.
+ */
+#define RMT_TX_SIM_CH1    (BIT(1))
+#define RMT_TX_SIM_CH1_M  (RMT_TX_SIM_CH1_V << RMT_TX_SIM_CH1_S)
+#define RMT_TX_SIM_CH1_V  0x00000001U
+#define RMT_TX_SIM_CH1_S  1
+/** RMT_TX_SIM_CH2 : R/W; bitpos: [2]; default: 0;
+ *  Set this bit to enable CHANNEL2 to start sending data synchronously with other
+ *  enabled channels.
+ */
+#define RMT_TX_SIM_CH2    (BIT(2))
+#define RMT_TX_SIM_CH2_M  (RMT_TX_SIM_CH2_V << RMT_TX_SIM_CH2_S)
+#define RMT_TX_SIM_CH2_V  0x00000001U
+#define RMT_TX_SIM_CH2_S  2
+/** RMT_TX_SIM_CH3 : R/W; bitpos: [3]; default: 0;
+ *  Set this bit to enable CHANNEL3 to start sending data synchronously with other
+ *  enabled channels.
+ */
+#define RMT_TX_SIM_CH3    (BIT(3))
+#define RMT_TX_SIM_CH3_M  (RMT_TX_SIM_CH3_V << RMT_TX_SIM_CH3_S)
+#define RMT_TX_SIM_CH3_V  0x00000001U
+#define RMT_TX_SIM_CH3_S  3
+/** RMT_TX_SIM_EN : R/W; bitpos: [4]; default: 0;
+ *  This register is used to enable multiple of channels to start sending data
+ *  synchronously.
+ */
+#define RMT_TX_SIM_EN    (BIT(4))
+#define RMT_TX_SIM_EN_M  (RMT_TX_SIM_EN_V << RMT_TX_SIM_EN_S)
+#define RMT_TX_SIM_EN_V  0x00000001U
+#define RMT_TX_SIM_EN_S  4
+
+/** RMT_REF_CNT_RST_REG register
+ *  RMT clock divider reset register
+ */
+#define RMT_REF_CNT_RST_REG (DR_REG_RMT_BASE + 0xc8)
+/** RMT_REF_CNT_RST_CH0 : WT; bitpos: [0]; default: 0;
+ *  This register is used to reset the clock divider of CHANNEL0.
+ */
+#define RMT_REF_CNT_RST_CH0    (BIT(0))
+#define RMT_REF_CNT_RST_CH0_M  (RMT_REF_CNT_RST_CH0_V << RMT_REF_CNT_RST_CH0_S)
+#define RMT_REF_CNT_RST_CH0_V  0x00000001U
+#define RMT_REF_CNT_RST_CH0_S  0
+/** RMT_REF_CNT_RST_CH1 : WT; bitpos: [1]; default: 0;
+ *  This register is used to reset the clock divider of CHANNEL1.
+ */
+#define RMT_REF_CNT_RST_CH1    (BIT(1))
+#define RMT_REF_CNT_RST_CH1_M  (RMT_REF_CNT_RST_CH1_V << RMT_REF_CNT_RST_CH1_S)
+#define RMT_REF_CNT_RST_CH1_V  0x00000001U
+#define RMT_REF_CNT_RST_CH1_S  1
+/** RMT_REF_CNT_RST_CH2 : WT; bitpos: [2]; default: 0;
+ *  This register is used to reset the clock divider of CHANNEL2.
+ */
+#define RMT_REF_CNT_RST_CH2    (BIT(2))
+#define RMT_REF_CNT_RST_CH2_M  (RMT_REF_CNT_RST_CH2_V << RMT_REF_CNT_RST_CH2_S)
+#define RMT_REF_CNT_RST_CH2_V  0x00000001U
+#define RMT_REF_CNT_RST_CH2_S  2
+/** RMT_REF_CNT_RST_CH3 : WT; bitpos: [3]; default: 0;
+ *  This register is used to reset the clock divider of CHANNEL3.
+ */
+#define RMT_REF_CNT_RST_CH3    (BIT(3))
+#define RMT_REF_CNT_RST_CH3_M  (RMT_REF_CNT_RST_CH3_V << RMT_REF_CNT_RST_CH3_S)
+#define RMT_REF_CNT_RST_CH3_V  0x00000001U
+#define RMT_REF_CNT_RST_CH3_S  3
+/** RMT_REF_CNT_RST_CH4 : WT; bitpos: [4]; default: 0;
+ *  This register is used to reset the clock divider of CHANNEL4.
+ */
+#define RMT_REF_CNT_RST_CH4    (BIT(4))
+#define RMT_REF_CNT_RST_CH4_M  (RMT_REF_CNT_RST_CH4_V << RMT_REF_CNT_RST_CH4_S)
+#define RMT_REF_CNT_RST_CH4_V  0x00000001U
+#define RMT_REF_CNT_RST_CH4_S  4
+/** RMT_REF_CNT_RST_CH5 : WT; bitpos: [5]; default: 0;
+ *  This register is used to reset the clock divider of CHANNEL5.
+ */
+#define RMT_REF_CNT_RST_CH5    (BIT(5))
+#define RMT_REF_CNT_RST_CH5_M  (RMT_REF_CNT_RST_CH5_V << RMT_REF_CNT_RST_CH5_S)
+#define RMT_REF_CNT_RST_CH5_V  0x00000001U
+#define RMT_REF_CNT_RST_CH5_S  5
+/** RMT_REF_CNT_RST_CH6 : WT; bitpos: [6]; default: 0;
+ *  This register is used to reset the clock divider of CHANNEL6.
+ */
+#define RMT_REF_CNT_RST_CH6    (BIT(6))
+#define RMT_REF_CNT_RST_CH6_M  (RMT_REF_CNT_RST_CH6_V << RMT_REF_CNT_RST_CH6_S)
+#define RMT_REF_CNT_RST_CH6_V  0x00000001U
+#define RMT_REF_CNT_RST_CH6_S  6
+/** RMT_REF_CNT_RST_CH7 : WT; bitpos: [7]; default: 0;
+ *  This register is used to reset the clock divider of CHANNEL7.
+ */
+#define RMT_REF_CNT_RST_CH7    (BIT(7))
+#define RMT_REF_CNT_RST_CH7_M  (RMT_REF_CNT_RST_CH7_V << RMT_REF_CNT_RST_CH7_S)
+#define RMT_REF_CNT_RST_CH7_V  0x00000001U
+#define RMT_REF_CNT_RST_CH7_S  7
+
+/** RMT_DATE_REG register
+ *  RMT version register
+ */
+#define RMT_DATE_REG (DR_REG_RMT_BASE + 0xcc)
+/** RMT_DATE : R/W; bitpos: [27:0]; default: 34607489;
+ *  This is the version register.
+ */
+#define RMT_DATE    0x0FFFFFFFU
+#define RMT_DATE_M  (RMT_DATE_V << RMT_DATE_S)
+#define RMT_DATE_V  0x0FFFFFFFU
+#define RMT_DATE_S  0
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rmt_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rmt_struct.h
new file mode 100644
index 00000000000..275bfebce64
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rmt_struct.h
@@ -0,0 +1,1120 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Group: FIFO R/W registers */
+/** Type of chndata register
+ *  The read and write  data register for CHANNELn by apb fifo access.
+ */
+typedef union {
+    struct {
+        /** chndata : RO; bitpos: [31:0]; default: 0;
+         *  Read and write data for channel n via APB FIFO.
+         */
+        uint32_t chndata: 32;
+    };
+    uint32_t val;
+} rmt_chndata_reg_t;
+
+/** Type of chmdata register
+ *  The read and write  data register for CHANNEL$n by apb fifo access.
+ */
+typedef union {
+    struct {
+        /** chmdata : RO; bitpos: [31:0]; default: 0;
+         *  Read and write data for channel $n via APB FIFO.
+         */
+        uint32_t chmdata: 32;
+    };
+    uint32_t val;
+} rmt_chmdata_reg_t;
+
+
+/** Group: Configuration registers */
+/** Type of chnconf0 register
+ *  Channel n configure register 0
+ */
+typedef union {
+    struct {
+        /** tx_start_n : WT; bitpos: [0]; default: 0;
+         *  Set this bit to start sending data on CHANNELn.
+         */
+        uint32_t tx_start_n: 1;
+        /** mem_rd_rst_n : WT; bitpos: [1]; default: 0;
+         *  Set this bit to reset read ram address for CHANNELn by accessing transmitter.
+         */
+        uint32_t mem_rd_rst_n: 1;
+        /** apb_mem_rst_n : WT; bitpos: [2]; default: 0;
+         *  Set this bit to reset W/R ram address for CHANNELn by accessing apb fifo.
+         */
+        uint32_t apb_mem_rst_n: 1;
+        /** tx_conti_mode_n : R/W; bitpos: [3]; default: 0;
+         *  Set this bit to restart transmission  from the first data to the last data in
+         *  CHANNELn.
+         */
+        uint32_t tx_conti_mode_n: 1;
+        /** mem_tx_wrap_en_n : R/W; bitpos: [4]; default: 0;
+         *  This is the channel n enable bit for wraparound mode: it will resume sending at the
+         *  start when the data to be sent is more than its memory size.
+         */
+        uint32_t mem_tx_wrap_en_n: 1;
+        /** idle_out_lv_n : R/W; bitpos: [5]; default: 0;
+         *  This bit configures the level of output signal in CHANNELn when the latter is in
+         *  IDLE state.
+         */
+        uint32_t idle_out_lv_n: 1;
+        /** idle_out_en_n : R/W; bitpos: [6]; default: 0;
+         *  This is the output enable-control bit for CHANNELn in IDLE state.
+         */
+        uint32_t idle_out_en_n: 1;
+        /** tx_stop_n : R/W/SC; bitpos: [7]; default: 0;
+         *  Set this bit to stop the transmitter of CHANNELn sending data out.
+         */
+        uint32_t tx_stop_n: 1;
+        /** div_cnt_n : R/W; bitpos: [15:8]; default: 2;
+         *  This register is used to configure the divider for clock of CHANNELn.
+         */
+        uint32_t div_cnt_n: 8;
+        /** mem_size_n : R/W; bitpos: [19:16]; default: 1;
+         *  This register is used to configure the maximum size of memory allocated to CHANNELn.
+         */
+        uint32_t mem_size_n: 4;
+        /** carrier_eff_en_n : R/W; bitpos: [20]; default: 1;
+         *  1: Add carrier modulation on the output signal only at the send data state for
+         *  CHANNELn. 0: Add carrier modulation on the output signal at all state for CHANNELn.
+         *  Only valid when RMT_CARRIER_EN_CHn is 1.
+         */
+        uint32_t carrier_eff_en_n: 1;
+        /** carrier_en_n : R/W; bitpos: [21]; default: 1;
+         *  This is the carrier modulation enable-control bit for CHANNELn. 1: Add carrier
+         *  modulation in the output signal. 0: No carrier modulation in sig_out.
+         */
+        uint32_t carrier_en_n: 1;
+        /** carrier_out_lv_n : R/W; bitpos: [22]; default: 1;
+         *  This bit is used to configure the position of carrier wave for CHANNELn.
+         *
+         *  1'h0: add carrier wave on low level.
+         *
+         *  1'h1: add carrier wave on high level.
+         */
+        uint32_t carrier_out_lv_n: 1;
+        /** afifo_rst_n : WT; bitpos: [23]; default: 0;
+         *  Reserved
+         */
+        uint32_t afifo_rst_n: 1;
+        /** conf_update_n : WT; bitpos: [24]; default: 0;
+         *  synchronization bit for CHANNELn
+         */
+        uint32_t conf_update_n: 1;
+        uint32_t reserved_25: 7;
+    };
+    uint32_t val;
+} rmt_chnconf0_reg_t;
+
+typedef struct {
+    /** Type of chmconf0 register
+    *  Channel m configure register 0
+    */
+    union {
+        struct {
+            /** div_cnt_m : R/W; bitpos: [7:0]; default: 2;
+             *  This register is used to configure the divider for clock of CHANNELm.
+             */
+            uint32_t div_cnt_m: 8;
+            /** idle_thres_m : R/W; bitpos: [22:8]; default: 32767;
+             *  When no edge is detected on the input signal and continuous clock cycles is longer
+             *  than this register value, received process is finished.
+             */
+            uint32_t idle_thres_m: 15;
+            uint32_t reserved_23: 1;
+            /** mem_size_m : R/W; bitpos: [27:24]; default: 1;
+             *  This register is used to configure the maximum size of memory allocated to CHANNELm.
+             */
+            uint32_t mem_size_m: 4;
+            /** carrier_en_m : R/W; bitpos: [28]; default: 1;
+             *  This is the carrier modulation enable-control bit for CHANNELm. 1: Add carrier
+             *  modulation in the output signal. 0: No carrier modulation in sig_out.
+             */
+            uint32_t carrier_en_m: 1;
+            /** carrier_out_lv_m : R/W; bitpos: [29]; default: 1;
+             *  This bit is used to configure the position of carrier wave for CHANNELm.
+             *
+             *  1'h0: add carrier wave on low level.
+             *
+             *  1'h1: add carrier wave on high level.
+             */
+            uint32_t carrier_out_lv_m: 1;
+            uint32_t reserved_30: 2;
+        };
+        uint32_t val;
+    } conf0;
+
+    /** Type of chmconf1 register
+     *  Channel m configure register 1
+     */
+    union {
+        struct {
+            /** rx_en_m : R/W; bitpos: [0]; default: 0;
+             *  Set this bit to enable receiver to receive data on CHANNELm.
+             */
+            uint32_t rx_en_m: 1;
+            /** mem_wr_rst_m : WT; bitpos: [1]; default: 0;
+             *  Set this bit to reset write ram address for CHANNELm by accessing receiver.
+             */
+            uint32_t mem_wr_rst_m: 1;
+            /** apb_mem_rst_m : WT; bitpos: [2]; default: 0;
+             *  Set this bit to reset W/R ram address for CHANNELm by accessing apb fifo.
+             */
+            uint32_t apb_mem_rst_m: 1;
+            /** mem_owner_m : R/W/SC; bitpos: [3]; default: 1;
+             *  This register marks the ownership of CHANNELm's ram block.
+             *
+             *  1'h1: Receiver is using the ram.
+             *
+             *  1'h0: APB bus is using the ram.
+             */
+            uint32_t mem_owner_m: 1;
+            /** rx_filter_en_m : R/W; bitpos: [4]; default: 0;
+             *  This is the receive filter's enable bit for CHANNELm.
+             */
+            uint32_t rx_filter_en_m: 1;
+            /** rx_filter_thres_m : R/W; bitpos: [12:5]; default: 15;
+             *  Ignores the input pulse when its width is smaller than this register value in APB
+             *  clock periods (in receive mode).
+             */
+            uint32_t rx_filter_thres_m: 8;
+            /** mem_rx_wrap_en_m : R/W; bitpos: [13]; default: 0;
+             *  This is the channel m enable bit for wraparound mode: it will resume receiving at
+             *  the start when the data to be received is more than its memory size.
+             */
+            uint32_t mem_rx_wrap_en_m: 1;
+            /** afifo_rst_m : WT; bitpos: [14]; default: 0;
+             *  Reserved
+             */
+            uint32_t afifo_rst_m: 1;
+            /** conf_update_m : WT; bitpos: [15]; default: 0;
+             *  synchronization bit for CHANNELm
+             */
+            uint32_t conf_update_m: 1;
+            uint32_t reserved_16: 16;
+        };
+        uint32_t val;
+    } conf1;
+} rmt_chmconf_reg_t;
+
+/** Type of chm_rx_carrier_rm register
+ *  Channel m carrier remove register
+ */
+typedef union {
+    struct {
+        /** carrier_low_thres_chm : R/W; bitpos: [15:0]; default: 0;
+         *  The low level period in a carrier modulation mode is
+         *  (REG_RMT_REG_CARRIER_LOW_THRES_CHm + 1) for channel m.
+         */
+        uint32_t carrier_low_thres_chm: 16;
+        /** carrier_high_thres_chm : R/W; bitpos: [31:16]; default: 0;
+         *  The high level period in a carrier modulation mode is
+         *  (REG_RMT_REG_CARRIER_HIGH_THRES_CHm + 1) for channel m.
+         */
+        uint32_t carrier_high_thres_chm: 16;
+    };
+    uint32_t val;
+} rmt_chm_rx_carrier_rm_reg_t;
+
+/** Type of sys_conf register
+ *  RMT apb configuration register
+ */
+typedef union {
+    struct {
+        /** apb_fifo_mask : R/W; bitpos: [0]; default: 0;
+         *  1'h1: access memory directly.   1'h0: access memory by FIFO.
+         */
+        uint32_t apb_fifo_mask: 1;
+        /** mem_clk_force_on : R/W; bitpos: [1]; default: 0;
+         *  Set this bit to enable the clock for RMT memory.
+         */
+        uint32_t mem_clk_force_on: 1;
+        /** mem_force_pd : R/W; bitpos: [2]; default: 0;
+         *  Set this bit to power down RMT memory.
+         */
+        uint32_t mem_force_pd: 1;
+        /** mem_force_pu : R/W; bitpos: [3]; default: 0;
+         *  1: Disable RMT memory light sleep power down function. 0: Power down RMT memory
+         *  when RMT is in light sleep mode.
+         */
+        uint32_t mem_force_pu: 1;
+        /** sclk_div_num : R/W; bitpos: [11:4]; default: 1;
+         *  the integral part of the fractional divisor
+         */
+        uint32_t sclk_div_num: 8;
+        /** sclk_div_a : R/W; bitpos: [17:12]; default: 0;
+         *  the numerator of the fractional part of the fractional divisor
+         */
+        uint32_t sclk_div_a: 6;
+        /** sclk_div_b : R/W; bitpos: [23:18]; default: 0;
+         *  the denominator of the fractional part of the fractional divisor
+         */
+        uint32_t sclk_div_b: 6;
+        /** sclk_sel : R/W; bitpos: [25:24]; default: 1;
+         *  choose the clock source of rmt_sclk. 1:CLK_80Mhz;2:CLK_8MHz; 2:XTAL
+         */
+        uint32_t sclk_sel: 2;
+        /** sclk_active : R/W; bitpos: [26]; default: 1;
+         *  rmt_sclk switch
+         */
+        uint32_t sclk_active: 1;
+        uint32_t reserved_27: 4;
+        /** clk_en : R/W; bitpos: [31]; default: 0;
+         *  RMT register clock gate enable signal. 1: Power up the drive clock of registers. 0:
+         *  Power down the drive clock of registers
+         */
+        uint32_t clk_en: 1;
+    };
+    uint32_t val;
+} rmt_sys_conf_reg_t;
+
+/** Type of ref_cnt_rst register
+ *  RMT clock divider reset register
+ */
+typedef union {
+    struct {
+        /** ref_cnt_rst_ch0 : WT; bitpos: [0]; default: 0;
+         *  This register is used to reset the clock divider of CHANNEL0.
+         */
+        uint32_t ref_cnt_rst_ch0: 1;
+        /** ref_cnt_rst_ch1 : WT; bitpos: [1]; default: 0;
+         *  This register is used to reset the clock divider of CHANNEL1.
+         */
+        uint32_t ref_cnt_rst_ch1: 1;
+        /** ref_cnt_rst_ch2 : WT; bitpos: [2]; default: 0;
+         *  This register is used to reset the clock divider of CHANNEL2.
+         */
+        uint32_t ref_cnt_rst_ch2: 1;
+        /** ref_cnt_rst_ch3 : WT; bitpos: [3]; default: 0;
+         *  This register is used to reset the clock divider of CHANNEL3.
+         */
+        uint32_t ref_cnt_rst_ch3: 1;
+        /** ref_cnt_rst_ch4 : WT; bitpos: [4]; default: 0;
+         *  This register is used to reset the clock divider of CHANNEL4.
+         */
+        uint32_t ref_cnt_rst_ch4: 1;
+        /** ref_cnt_rst_ch5 : WT; bitpos: [5]; default: 0;
+         *  This register is used to reset the clock divider of CHANNEL5.
+         */
+        uint32_t ref_cnt_rst_ch5: 1;
+        /** ref_cnt_rst_ch6 : WT; bitpos: [6]; default: 0;
+         *  This register is used to reset the clock divider of CHANNEL6.
+         */
+        uint32_t ref_cnt_rst_ch6: 1;
+        /** ref_cnt_rst_ch7 : WT; bitpos: [7]; default: 0;
+         *  This register is used to reset the clock divider of CHANNEL7.
+         */
+        uint32_t ref_cnt_rst_ch7: 1;
+        uint32_t reserved_8: 24;
+    };
+    uint32_t val;
+} rmt_ref_cnt_rst_reg_t;
+
+
+/** Group: Status registers */
+/** Type of chnstatus register
+ *  Channel n status register
+ */
+typedef union {
+    struct {
+        /** mem_raddr_ex_n : RO; bitpos: [9:0]; default: 0;
+         *  This register records the memory address offset when transmitter of CHANNELn is
+         *  using the RAM.
+         */
+        uint32_t mem_raddr_ex_n: 10;
+        uint32_t reserved_10: 1;
+        /** apb_mem_waddr_n : RO; bitpos: [20:11]; default: 0;
+         *  This register records the memory address offset when writes RAM over APB bus.
+         */
+        uint32_t apb_mem_waddr_n: 10;
+        uint32_t reserved_21: 1;
+        /** state_n : RO; bitpos: [24:22]; default: 0;
+         *  This register records the FSM status of CHANNELn.
+         */
+        uint32_t state_n: 3;
+        /** mem_empty_n : RO; bitpos: [25]; default: 0;
+         *  This status bit will be set when the data to be set is more than memory size and
+         *  the wraparound mode is disabled.
+         */
+        uint32_t mem_empty_n: 1;
+        /** apb_mem_wr_err_n : RO; bitpos: [26]; default: 0;
+         *  This status bit will be set if the offset address out of memory size when writes
+         *  via APB bus.
+         */
+        uint32_t apb_mem_wr_err_n: 1;
+        uint32_t reserved_27: 5;
+    };
+    uint32_t val;
+} rmt_chnstatus_reg_t;
+
+/** Type of chmstatus register
+ *  Channel m status register
+ */
+typedef union {
+    struct {
+        /** mem_waddr_ex_m : RO; bitpos: [9:0]; default: 192;
+         *  This register records the memory address offset when receiver of CHANNELm is using
+         *  the RAM.
+         */
+        uint32_t mem_waddr_ex_m: 10;
+        uint32_t reserved_10: 1;
+        /** apb_mem_raddr_m : RO; bitpos: [20:11]; default: 192;
+         *  This register records the memory address offset when reads RAM over APB bus.
+         */
+        uint32_t apb_mem_raddr_m: 10;
+        uint32_t reserved_21: 1;
+        /** state_m : RO; bitpos: [24:22]; default: 0;
+         *  This register records the FSM status of CHANNELm.
+         */
+        uint32_t state_m: 3;
+        /** mem_owner_err_m : RO; bitpos: [25]; default: 0;
+         *  This status bit will be set when the ownership of memory block is wrong.
+         */
+        uint32_t mem_owner_err_m: 1;
+        /** mem_full_m : RO; bitpos: [26]; default: 0;
+         *  This status bit will be set if the receiver receives more data than the memory size.
+         */
+        uint32_t mem_full_m: 1;
+        /** apb_mem_rd_err_m : RO; bitpos: [27]; default: 0;
+         *  This status bit will be set if the offset address out of memory size when reads via
+         *  APB bus.
+         */
+        uint32_t apb_mem_rd_err_m: 1;
+        uint32_t reserved_28: 4;
+    };
+    uint32_t val;
+} rmt_chmstatus_reg_t;
+
+
+/** Group: Interrupt registers */
+/** Type of int_raw register
+ *  Raw interrupt status
+ */
+typedef union {
+    struct {
+        /** ch0_tx_end_int_raw : R/WTC/SS; bitpos: [0]; default: 0;
+         *  The interrupt raw bit for CHANNEL0. Triggered when transmission done.
+         */
+        uint32_t ch0_tx_end_int_raw: 1;
+        /** ch1_tx_end_int_raw : R/WTC/SS; bitpos: [1]; default: 0;
+         *  The interrupt raw bit for CHANNEL1. Triggered when transmission done.
+         */
+        uint32_t ch1_tx_end_int_raw: 1;
+        /** ch2_tx_end_int_raw : R/WTC/SS; bitpos: [2]; default: 0;
+         *  The interrupt raw bit for CHANNEL2. Triggered when transmission done.
+         */
+        uint32_t ch2_tx_end_int_raw: 1;
+        /** ch3_tx_end_int_raw : R/WTC/SS; bitpos: [3]; default: 0;
+         *  The interrupt raw bit for CHANNEL3. Triggered when transmission done.
+         */
+        uint32_t ch3_tx_end_int_raw: 1;
+        /** ch0_err_int_raw : R/WTC/SS; bitpos: [4]; default: 0;
+         *  The interrupt raw bit for CHANNEL0. Triggered when error occurs.
+         */
+        uint32_t ch0_err_int_raw: 1;
+        /** ch1_err_int_raw : R/WTC/SS; bitpos: [5]; default: 0;
+         *  The interrupt raw bit for CHANNEL1. Triggered when error occurs.
+         */
+        uint32_t ch1_err_int_raw: 1;
+        /** ch2_err_int_raw : R/WTC/SS; bitpos: [6]; default: 0;
+         *  The interrupt raw bit for CHANNEL2. Triggered when error occurs.
+         */
+        uint32_t ch2_err_int_raw: 1;
+        /** ch3_err_int_raw : R/WTC/SS; bitpos: [7]; default: 0;
+         *  The interrupt raw bit for CHANNEL3. Triggered when error occurs.
+         */
+        uint32_t ch3_err_int_raw: 1;
+        /** ch0_tx_thr_event_int_raw : R/WTC/SS; bitpos: [8]; default: 0;
+         *  The interrupt raw bit for CHANNEL0. Triggered when transmitter sent more data than
+         *  configured value.
+         */
+        uint32_t ch0_tx_thr_event_int_raw: 1;
+        /** ch1_tx_thr_event_int_raw : R/WTC/SS; bitpos: [9]; default: 0;
+         *  The interrupt raw bit for CHANNEL1. Triggered when transmitter sent more data than
+         *  configured value.
+         */
+        uint32_t ch1_tx_thr_event_int_raw: 1;
+        /** ch2_tx_thr_event_int_raw : R/WTC/SS; bitpos: [10]; default: 0;
+         *  The interrupt raw bit for CHANNEL2. Triggered when transmitter sent more data than
+         *  configured value.
+         */
+        uint32_t ch2_tx_thr_event_int_raw: 1;
+        /** ch3_tx_thr_event_int_raw : R/WTC/SS; bitpos: [11]; default: 0;
+         *  The interrupt raw bit for CHANNEL3. Triggered when transmitter sent more data than
+         *  configured value.
+         */
+        uint32_t ch3_tx_thr_event_int_raw: 1;
+        /** ch0_tx_loop_int_raw : R/WTC/SS; bitpos: [12]; default: 0;
+         *  The interrupt raw bit for CHANNEL0. Triggered when the loop count reaches the
+         *  configured threshold value.
+         */
+        uint32_t ch0_tx_loop_int_raw: 1;
+        /** ch1_tx_loop_int_raw : R/WTC/SS; bitpos: [13]; default: 0;
+         *  The interrupt raw bit for CHANNEL1. Triggered when the loop count reaches the
+         *  configured threshold value.
+         */
+        uint32_t ch1_tx_loop_int_raw: 1;
+        /** ch2_tx_loop_int_raw : R/WTC/SS; bitpos: [14]; default: 0;
+         *  The interrupt raw bit for CHANNEL2. Triggered when the loop count reaches the
+         *  configured threshold value.
+         */
+        uint32_t ch2_tx_loop_int_raw: 1;
+        /** ch3_tx_loop_int_raw : R/WTC/SS; bitpos: [15]; default: 0;
+         *  The interrupt raw bit for CHANNEL3. Triggered when the loop count reaches the
+         *  configured threshold value.
+         */
+        uint32_t ch3_tx_loop_int_raw: 1;
+        /** ch4_rx_end_int_raw : R/WTC/SS; bitpos: [16]; default: 0;
+         *  The interrupt raw bit for CHANNEL4. Triggered when reception done.
+         */
+        uint32_t ch4_rx_end_int_raw: 1;
+        /** ch5_rx_end_int_raw : R/WTC/SS; bitpos: [17]; default: 0;
+         *  The interrupt raw bit for CHANNEL5. Triggered when reception done.
+         */
+        uint32_t ch5_rx_end_int_raw: 1;
+        /** ch6_rx_end_int_raw : R/WTC/SS; bitpos: [18]; default: 0;
+         *  The interrupt raw bit for CHANNEL6. Triggered when reception done.
+         */
+        uint32_t ch6_rx_end_int_raw: 1;
+        /** ch7_rx_end_int_raw : R/WTC/SS; bitpos: [19]; default: 0;
+         *  The interrupt raw bit for CHANNEL7. Triggered when reception done.
+         */
+        uint32_t ch7_rx_end_int_raw: 1;
+        /** ch4_err_int_raw : R/WTC/SS; bitpos: [20]; default: 0;
+         *  The interrupt raw bit for CHANNEL4. Triggered when error occurs.
+         */
+        uint32_t ch4_err_int_raw: 1;
+        /** ch5_err_int_raw : R/WTC/SS; bitpos: [21]; default: 0;
+         *  The interrupt raw bit for CHANNEL5. Triggered when error occurs.
+         */
+        uint32_t ch5_err_int_raw: 1;
+        /** ch6_err_int_raw : R/WTC/SS; bitpos: [22]; default: 0;
+         *  The interrupt raw bit for CHANNEL6. Triggered when error occurs.
+         */
+        uint32_t ch6_err_int_raw: 1;
+        /** ch7_err_int_raw : R/WTC/SS; bitpos: [23]; default: 0;
+         *  The interrupt raw bit for CHANNEL7. Triggered when error occurs.
+         */
+        uint32_t ch7_err_int_raw: 1;
+        /** ch4_rx_thr_event_int_raw : R/WTC/SS; bitpos: [24]; default: 0;
+         *  The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than
+         *  configured value.
+         */
+        uint32_t ch4_rx_thr_event_int_raw: 1;
+        /** ch5_rx_thr_event_int_raw : R/WTC/SS; bitpos: [25]; default: 0;
+         *  The interrupt raw bit for CHANNEL5. Triggered when receiver receive more data than
+         *  configured value.
+         */
+        uint32_t ch5_rx_thr_event_int_raw: 1;
+        /** ch6_rx_thr_event_int_raw : R/WTC/SS; bitpos: [26]; default: 0;
+         *  The interrupt raw bit for CHANNEL6. Triggered when receiver receive more data than
+         *  configured value.
+         */
+        uint32_t ch6_rx_thr_event_int_raw: 1;
+        /** ch7_rx_thr_event_int_raw : R/WTC/SS; bitpos: [27]; default: 0;
+         *  The interrupt raw bit for CHANNEL7. Triggered when receiver receive more data than
+         *  configured value.
+         */
+        uint32_t ch7_rx_thr_event_int_raw: 1;
+        /** ch3_dma_access_fail_int_raw : R/WTC/SS; bitpos: [28]; default: 0;
+         *  The interrupt raw bit for CHANNEL3. Triggered when dma accessing CHANNEL3 fails.
+         */
+        uint32_t ch3_dma_access_fail_int_raw: 1;
+        /** ch7_dma_access_fail_int_raw : R/WTC/SS; bitpos: [29]; default: 0;
+         *  The interrupt raw bit for CHANNEL7. Triggered when dma accessing CHANNEL7 fails.
+         */
+        uint32_t ch7_dma_access_fail_int_raw: 1;
+        uint32_t reserved_30: 2;
+    };
+    uint32_t val;
+} rmt_int_raw_reg_t;
+
+/** Type of int_st register
+ *  Masked interrupt status
+ */
+typedef union {
+    struct {
+        /** ch0_tx_end_int_st : RO; bitpos: [0]; default: 0;
+         *  The masked interrupt status bit for CH0_TX_END_INT.
+         */
+        uint32_t ch0_tx_end_int_st: 1;
+        /** ch1_tx_end_int_st : RO; bitpos: [1]; default: 0;
+         *  The masked interrupt status bit for CH1_TX_END_INT.
+         */
+        uint32_t ch1_tx_end_int_st: 1;
+        /** ch2_tx_end_int_st : RO; bitpos: [2]; default: 0;
+         *  The masked interrupt status bit for CH2_TX_END_INT.
+         */
+        uint32_t ch2_tx_end_int_st: 1;
+        /** ch3_tx_end_int_st : RO; bitpos: [3]; default: 0;
+         *  The masked interrupt status bit for CH3_TX_END_INT.
+         */
+        uint32_t ch3_tx_end_int_st: 1;
+        /** ch0_err_int_st : RO; bitpos: [4]; default: 0;
+         *  The masked interrupt status bit for CH0_ERR_INT.
+         */
+        uint32_t ch0_err_int_st: 1;
+        /** ch1_err_int_st : RO; bitpos: [5]; default: 0;
+         *  The masked interrupt status bit for CH1_ERR_INT.
+         */
+        uint32_t ch1_err_int_st: 1;
+        /** ch2_err_int_st : RO; bitpos: [6]; default: 0;
+         *  The masked interrupt status bit for CH2_ERR_INT.
+         */
+        uint32_t ch2_err_int_st: 1;
+        /** ch3_err_int_st : RO; bitpos: [7]; default: 0;
+         *  The masked interrupt status bit for CH3_ERR_INT.
+         */
+        uint32_t ch3_err_int_st: 1;
+        /** ch0_tx_thr_event_int_st : RO; bitpos: [8]; default: 0;
+         *  The masked interrupt status bit for CH0_TX_THR_EVENT_INT.
+         */
+        uint32_t ch0_tx_thr_event_int_st: 1;
+        /** ch1_tx_thr_event_int_st : RO; bitpos: [9]; default: 0;
+         *  The masked interrupt status bit for CH1_TX_THR_EVENT_INT.
+         */
+        uint32_t ch1_tx_thr_event_int_st: 1;
+        /** ch2_tx_thr_event_int_st : RO; bitpos: [10]; default: 0;
+         *  The masked interrupt status bit for CH2_TX_THR_EVENT_INT.
+         */
+        uint32_t ch2_tx_thr_event_int_st: 1;
+        /** ch3_tx_thr_event_int_st : RO; bitpos: [11]; default: 0;
+         *  The masked interrupt status bit for CH3_TX_THR_EVENT_INT.
+         */
+        uint32_t ch3_tx_thr_event_int_st: 1;
+        /** ch0_tx_loop_int_st : RO; bitpos: [12]; default: 0;
+         *  The masked interrupt status bit for CH0_TX_LOOP_INT.
+         */
+        uint32_t ch0_tx_loop_int_st: 1;
+        /** ch1_tx_loop_int_st : RO; bitpos: [13]; default: 0;
+         *  The masked interrupt status bit for CH1_TX_LOOP_INT.
+         */
+        uint32_t ch1_tx_loop_int_st: 1;
+        /** ch2_tx_loop_int_st : RO; bitpos: [14]; default: 0;
+         *  The masked interrupt status bit for CH2_TX_LOOP_INT.
+         */
+        uint32_t ch2_tx_loop_int_st: 1;
+        /** ch3_tx_loop_int_st : RO; bitpos: [15]; default: 0;
+         *  The masked interrupt status bit for CH3_TX_LOOP_INT.
+         */
+        uint32_t ch3_tx_loop_int_st: 1;
+        /** ch4_rx_end_int_st : RO; bitpos: [16]; default: 0;
+         *  The masked interrupt status bit for CH4_RX_END_INT.
+         */
+        uint32_t ch4_rx_end_int_st: 1;
+        /** ch5_rx_end_int_st : RO; bitpos: [17]; default: 0;
+         *  The masked interrupt status bit for CH5_RX_END_INT.
+         */
+        uint32_t ch5_rx_end_int_st: 1;
+        /** ch6_rx_end_int_st : RO; bitpos: [18]; default: 0;
+         *  The masked interrupt status bit for CH6_RX_END_INT.
+         */
+        uint32_t ch6_rx_end_int_st: 1;
+        /** ch7_rx_end_int_st : RO; bitpos: [19]; default: 0;
+         *  The masked interrupt status bit for CH7_RX_END_INT.
+         */
+        uint32_t ch7_rx_end_int_st: 1;
+        /** ch4_err_int_st : RO; bitpos: [20]; default: 0;
+         *  The masked interrupt status bit for CH4_ERR_INT.
+         */
+        uint32_t ch4_err_int_st: 1;
+        /** ch5_err_int_st : RO; bitpos: [21]; default: 0;
+         *  The masked interrupt status bit for CH5_ERR_INT.
+         */
+        uint32_t ch5_err_int_st: 1;
+        /** ch6_err_int_st : RO; bitpos: [22]; default: 0;
+         *  The masked interrupt status bit for CH6_ERR_INT.
+         */
+        uint32_t ch6_err_int_st: 1;
+        /** ch7_err_int_st : RO; bitpos: [23]; default: 0;
+         *  The masked interrupt status bit for CH7_ERR_INT.
+         */
+        uint32_t ch7_err_int_st: 1;
+        /** ch4_rx_thr_event_int_st : RO; bitpos: [24]; default: 0;
+         *  The masked interrupt status bit for CH4_RX_THR_EVENT_INT.
+         */
+        uint32_t ch4_rx_thr_event_int_st: 1;
+        /** ch5_rx_thr_event_int_st : RO; bitpos: [25]; default: 0;
+         *  The masked interrupt status bit for CH5_RX_THR_EVENT_INT.
+         */
+        uint32_t ch5_rx_thr_event_int_st: 1;
+        /** ch6_rx_thr_event_int_st : RO; bitpos: [26]; default: 0;
+         *  The masked interrupt status bit for CH6_RX_THR_EVENT_INT.
+         */
+        uint32_t ch6_rx_thr_event_int_st: 1;
+        /** ch7_rx_thr_event_int_st : RO; bitpos: [27]; default: 0;
+         *  The masked interrupt status bit for CH7_RX_THR_EVENT_INT.
+         */
+        uint32_t ch7_rx_thr_event_int_st: 1;
+        /** ch3_dma_access_fail_int_st : RO; bitpos: [28]; default: 0;
+         *  The masked interrupt status bit for  CH3_DMA_ACCESS_FAIL_INT.
+         */
+        uint32_t ch3_dma_access_fail_int_st: 1;
+        /** ch7_dma_access_fail_int_st : RO; bitpos: [29]; default: 0;
+         *  The masked interrupt status bit for  CH7_DMA_ACCESS_FAIL_INT.
+         */
+        uint32_t ch7_dma_access_fail_int_st: 1;
+        uint32_t reserved_30: 2;
+    };
+    uint32_t val;
+} rmt_int_st_reg_t;
+
+/** Type of int_ena register
+ *  Interrupt enable bits
+ */
+typedef union {
+    struct {
+        /** ch0_tx_end_int_ena : R/W; bitpos: [0]; default: 0;
+         *  The interrupt enable bit for CH0_TX_END_INT.
+         */
+        uint32_t ch0_tx_end_int_ena: 1;
+        /** ch1_tx_end_int_ena : R/W; bitpos: [1]; default: 0;
+         *  The interrupt enable bit for CH1_TX_END_INT.
+         */
+        uint32_t ch1_tx_end_int_ena: 1;
+        /** ch2_tx_end_int_ena : R/W; bitpos: [2]; default: 0;
+         *  The interrupt enable bit for CH2_TX_END_INT.
+         */
+        uint32_t ch2_tx_end_int_ena: 1;
+        /** ch3_tx_end_int_ena : R/W; bitpos: [3]; default: 0;
+         *  The interrupt enable bit for CH3_TX_END_INT.
+         */
+        uint32_t ch3_tx_end_int_ena: 1;
+        /** ch0_err_int_ena : R/W; bitpos: [4]; default: 0;
+         *  The interrupt enable bit for CH0_ERR_INT.
+         */
+        uint32_t ch0_err_int_ena: 1;
+        /** ch1_err_int_ena : R/W; bitpos: [5]; default: 0;
+         *  The interrupt enable bit for CH1_ERR_INT.
+         */
+        uint32_t ch1_err_int_ena: 1;
+        /** ch2_err_int_ena : R/W; bitpos: [6]; default: 0;
+         *  The interrupt enable bit for CH2_ERR_INT.
+         */
+        uint32_t ch2_err_int_ena: 1;
+        /** ch3_err_int_ena : R/W; bitpos: [7]; default: 0;
+         *  The interrupt enable bit for CH3_ERR_INT.
+         */
+        uint32_t ch3_err_int_ena: 1;
+        /** ch0_tx_thr_event_int_ena : R/W; bitpos: [8]; default: 0;
+         *  The interrupt enable bit for CH0_TX_THR_EVENT_INT.
+         */
+        uint32_t ch0_tx_thr_event_int_ena: 1;
+        /** ch1_tx_thr_event_int_ena : R/W; bitpos: [9]; default: 0;
+         *  The interrupt enable bit for CH1_TX_THR_EVENT_INT.
+         */
+        uint32_t ch1_tx_thr_event_int_ena: 1;
+        /** ch2_tx_thr_event_int_ena : R/W; bitpos: [10]; default: 0;
+         *  The interrupt enable bit for CH2_TX_THR_EVENT_INT.
+         */
+        uint32_t ch2_tx_thr_event_int_ena: 1;
+        /** ch3_tx_thr_event_int_ena : R/W; bitpos: [11]; default: 0;
+         *  The interrupt enable bit for CH3_TX_THR_EVENT_INT.
+         */
+        uint32_t ch3_tx_thr_event_int_ena: 1;
+        /** ch0_tx_loop_int_ena : R/W; bitpos: [12]; default: 0;
+         *  The interrupt enable bit for CH0_TX_LOOP_INT.
+         */
+        uint32_t ch0_tx_loop_int_ena: 1;
+        /** ch1_tx_loop_int_ena : R/W; bitpos: [13]; default: 0;
+         *  The interrupt enable bit for CH1_TX_LOOP_INT.
+         */
+        uint32_t ch1_tx_loop_int_ena: 1;
+        /** ch2_tx_loop_int_ena : R/W; bitpos: [14]; default: 0;
+         *  The interrupt enable bit for CH2_TX_LOOP_INT.
+         */
+        uint32_t ch2_tx_loop_int_ena: 1;
+        /** ch3_tx_loop_int_ena : R/W; bitpos: [15]; default: 0;
+         *  The interrupt enable bit for CH3_TX_LOOP_INT.
+         */
+        uint32_t ch3_tx_loop_int_ena: 1;
+        /** ch4_rx_end_int_ena : R/W; bitpos: [16]; default: 0;
+         *  The interrupt enable bit for CH4_RX_END_INT.
+         */
+        uint32_t ch4_rx_end_int_ena: 1;
+        /** ch5_rx_end_int_ena : R/W; bitpos: [17]; default: 0;
+         *  The interrupt enable bit for CH5_RX_END_INT.
+         */
+        uint32_t ch5_rx_end_int_ena: 1;
+        /** ch6_rx_end_int_ena : R/W; bitpos: [18]; default: 0;
+         *  The interrupt enable bit for CH6_RX_END_INT.
+         */
+        uint32_t ch6_rx_end_int_ena: 1;
+        /** ch7_rx_end_int_ena : R/W; bitpos: [19]; default: 0;
+         *  The interrupt enable bit for CH7_RX_END_INT.
+         */
+        uint32_t ch7_rx_end_int_ena: 1;
+        /** ch4_err_int_ena : R/W; bitpos: [20]; default: 0;
+         *  The interrupt enable bit for CH4_ERR_INT.
+         */
+        uint32_t ch4_err_int_ena: 1;
+        /** ch5_err_int_ena : R/W; bitpos: [21]; default: 0;
+         *  The interrupt enable bit for CH5_ERR_INT.
+         */
+        uint32_t ch5_err_int_ena: 1;
+        /** ch6_err_int_ena : R/W; bitpos: [22]; default: 0;
+         *  The interrupt enable bit for CH6_ERR_INT.
+         */
+        uint32_t ch6_err_int_ena: 1;
+        /** ch7_err_int_ena : R/W; bitpos: [23]; default: 0;
+         *  The interrupt enable bit for CH7_ERR_INT.
+         */
+        uint32_t ch7_err_int_ena: 1;
+        /** ch4_rx_thr_event_int_ena : R/W; bitpos: [24]; default: 0;
+         *  The interrupt enable bit for CH4_RX_THR_EVENT_INT.
+         */
+        uint32_t ch4_rx_thr_event_int_ena: 1;
+        /** ch5_rx_thr_event_int_ena : R/W; bitpos: [25]; default: 0;
+         *  The interrupt enable bit for CH5_RX_THR_EVENT_INT.
+         */
+        uint32_t ch5_rx_thr_event_int_ena: 1;
+        /** ch6_rx_thr_event_int_ena : R/W; bitpos: [26]; default: 0;
+         *  The interrupt enable bit for CH6_RX_THR_EVENT_INT.
+         */
+        uint32_t ch6_rx_thr_event_int_ena: 1;
+        /** ch7_rx_thr_event_int_ena : R/W; bitpos: [27]; default: 0;
+         *  The interrupt enable bit for CH7_RX_THR_EVENT_INT.
+         */
+        uint32_t ch7_rx_thr_event_int_ena: 1;
+        /** ch3_dma_access_fail_int_ena : R/W; bitpos: [28]; default: 0;
+         *  The interrupt enable bit for CH3_DMA_ACCESS_FAIL_INT.
+         */
+        uint32_t ch3_dma_access_fail_int_ena: 1;
+        /** ch7_dma_access_fail_int_ena : R/W; bitpos: [29]; default: 0;
+         *  The interrupt enable bit for CH7_DMA_ACCESS_FAIL_INT.
+         */
+        uint32_t ch7_dma_access_fail_int_ena: 1;
+        uint32_t reserved_30: 2;
+    };
+    uint32_t val;
+} rmt_int_ena_reg_t;
+
+/** Type of int_clr register
+ *  Interrupt clear bits
+ */
+typedef union {
+    struct {
+        /** ch0_tx_end_int_clr : WT; bitpos: [0]; default: 0;
+         *  Set this bit to clear theCH0_TX_END_INT interrupt.
+         */
+        uint32_t ch0_tx_end_int_clr: 1;
+        /** ch1_tx_end_int_clr : WT; bitpos: [1]; default: 0;
+         *  Set this bit to clear theCH1_TX_END_INT interrupt.
+         */
+        uint32_t ch1_tx_end_int_clr: 1;
+        /** ch2_tx_end_int_clr : WT; bitpos: [2]; default: 0;
+         *  Set this bit to clear theCH2_TX_END_INT interrupt.
+         */
+        uint32_t ch2_tx_end_int_clr: 1;
+        /** ch3_tx_end_int_clr : WT; bitpos: [3]; default: 0;
+         *  Set this bit to clear theCH3_TX_END_INT interrupt.
+         */
+        uint32_t ch3_tx_end_int_clr: 1;
+        /** ch0_err_int_clr : WT; bitpos: [4]; default: 0;
+         *  Set this bit to clear theCH0_ERR_INT interrupt.
+         */
+        uint32_t ch0_err_int_clr: 1;
+        /** ch1_err_int_clr : WT; bitpos: [5]; default: 0;
+         *  Set this bit to clear theCH1_ERR_INT interrupt.
+         */
+        uint32_t ch1_err_int_clr: 1;
+        /** ch2_err_int_clr : WT; bitpos: [6]; default: 0;
+         *  Set this bit to clear theCH2_ERR_INT interrupt.
+         */
+        uint32_t ch2_err_int_clr: 1;
+        /** ch3_err_int_clr : WT; bitpos: [7]; default: 0;
+         *  Set this bit to clear theCH3_ERR_INT interrupt.
+         */
+        uint32_t ch3_err_int_clr: 1;
+        /** ch0_tx_thr_event_int_clr : WT; bitpos: [8]; default: 0;
+         *  Set this bit to clear theCH0_TX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch0_tx_thr_event_int_clr: 1;
+        /** ch1_tx_thr_event_int_clr : WT; bitpos: [9]; default: 0;
+         *  Set this bit to clear theCH1_TX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch1_tx_thr_event_int_clr: 1;
+        /** ch2_tx_thr_event_int_clr : WT; bitpos: [10]; default: 0;
+         *  Set this bit to clear theCH2_TX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch2_tx_thr_event_int_clr: 1;
+        /** ch3_tx_thr_event_int_clr : WT; bitpos: [11]; default: 0;
+         *  Set this bit to clear theCH3_TX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch3_tx_thr_event_int_clr: 1;
+        /** ch0_tx_loop_int_clr : WT; bitpos: [12]; default: 0;
+         *  Set this bit to clear theCH0_TX_LOOP_INT interrupt.
+         */
+        uint32_t ch0_tx_loop_int_clr: 1;
+        /** ch1_tx_loop_int_clr : WT; bitpos: [13]; default: 0;
+         *  Set this bit to clear theCH1_TX_LOOP_INT interrupt.
+         */
+        uint32_t ch1_tx_loop_int_clr: 1;
+        /** ch2_tx_loop_int_clr : WT; bitpos: [14]; default: 0;
+         *  Set this bit to clear theCH2_TX_LOOP_INT interrupt.
+         */
+        uint32_t ch2_tx_loop_int_clr: 1;
+        /** ch3_tx_loop_int_clr : WT; bitpos: [15]; default: 0;
+         *  Set this bit to clear theCH3_TX_LOOP_INT interrupt.
+         */
+        uint32_t ch3_tx_loop_int_clr: 1;
+        /** ch4_rx_end_int_clr : WT; bitpos: [16]; default: 0;
+         *  Set this bit to clear theCH4_RX_END_INT interrupt.
+         */
+        uint32_t ch4_rx_end_int_clr: 1;
+        /** ch5_rx_end_int_clr : WT; bitpos: [17]; default: 0;
+         *  Set this bit to clear theCH5_RX_END_INT interrupt.
+         */
+        uint32_t ch5_rx_end_int_clr: 1;
+        /** ch6_rx_end_int_clr : WT; bitpos: [18]; default: 0;
+         *  Set this bit to clear theCH6_RX_END_INT interrupt.
+         */
+        uint32_t ch6_rx_end_int_clr: 1;
+        /** ch7_rx_end_int_clr : WT; bitpos: [19]; default: 0;
+         *  Set this bit to clear theCH7_RX_END_INT interrupt.
+         */
+        uint32_t ch7_rx_end_int_clr: 1;
+        /** ch4_err_int_clr : WT; bitpos: [20]; default: 0;
+         *  Set this bit to clear theCH4_ERR_INT interrupt.
+         */
+        uint32_t ch4_err_int_clr: 1;
+        /** ch5_err_int_clr : WT; bitpos: [21]; default: 0;
+         *  Set this bit to clear theCH5_ERR_INT interrupt.
+         */
+        uint32_t ch5_err_int_clr: 1;
+        /** ch6_err_int_clr : WT; bitpos: [22]; default: 0;
+         *  Set this bit to clear theCH6_ERR_INT interrupt.
+         */
+        uint32_t ch6_err_int_clr: 1;
+        /** ch7_err_int_clr : WT; bitpos: [23]; default: 0;
+         *  Set this bit to clear theCH7_ERR_INT interrupt.
+         */
+        uint32_t ch7_err_int_clr: 1;
+        /** ch4_rx_thr_event_int_clr : WT; bitpos: [24]; default: 0;
+         *  Set this bit to clear theCH4_RX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch4_rx_thr_event_int_clr: 1;
+        /** ch5_rx_thr_event_int_clr : WT; bitpos: [25]; default: 0;
+         *  Set this bit to clear theCH5_RX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch5_rx_thr_event_int_clr: 1;
+        /** ch6_rx_thr_event_int_clr : WT; bitpos: [26]; default: 0;
+         *  Set this bit to clear theCH6_RX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch6_rx_thr_event_int_clr: 1;
+        /** ch7_rx_thr_event_int_clr : WT; bitpos: [27]; default: 0;
+         *  Set this bit to clear theCH7_RX_THR_EVENT_INT interrupt.
+         */
+        uint32_t ch7_rx_thr_event_int_clr: 1;
+        /** ch3_dma_access_fail_int_clr : WT; bitpos: [28]; default: 0;
+         *  Set this bit to clear the CH3_DMA_ACCESS_FAIL_INT interrupt.
+         */
+        uint32_t ch3_dma_access_fail_int_clr: 1;
+        /** ch7_dma_access_fail_int_clr : WT; bitpos: [29]; default: 0;
+         *  Set this bit to clear the CH7_DMA_ACCESS_FAIL_INT interrupt.
+         */
+        uint32_t ch7_dma_access_fail_int_clr: 1;
+        uint32_t reserved_30: 2;
+    };
+    uint32_t val;
+} rmt_int_clr_reg_t;
+
+
+/** Group: Carrier wave duty cycle registers */
+/** Type of chncarrier_duty register
+ *  Channel n duty cycle configuration register
+ */
+typedef union {
+    struct {
+        /** carrier_low_chn : R/W; bitpos: [15:0]; default: 64;
+         *  This register is used to configure carrier wave 's low level clock period for
+         *  CHANNELn.
+         */
+        uint32_t carrier_low_chn: 16;
+        /** carrier_high_chn : R/W; bitpos: [31:16]; default: 64;
+         *  This register is used to configure carrier wave 's high level clock period for
+         *  CHANNELn.
+         */
+        uint32_t carrier_high_chn: 16;
+    };
+    uint32_t val;
+} rmt_chncarrier_duty_reg_t;
+
+
+/** Group: Tx event configuration registers */
+/** Type of chn_tx_lim register
+ *  Channel n Tx event configuration register
+ */
+typedef union {
+    struct {
+        /** tx_lim_chn : R/W; bitpos: [8:0]; default: 128;
+         *  This register is used to configure the maximum entries that CHANNELn can send out.
+         */
+        uint32_t tx_lim_chn: 9;
+        /** tx_loop_num_chn : R/W; bitpos: [18:9]; default: 0;
+         *  This register is used to configure the maximum loop count when tx_conti_mode is
+         *  valid.
+         */
+        uint32_t tx_loop_num_chn: 10;
+        /** tx_loop_cnt_en_chn : R/W; bitpos: [19]; default: 0;
+         *  This register is the enabled bit for loop count.
+         */
+        uint32_t tx_loop_cnt_en_chn: 1;
+        /** loop_count_reset_chn : WT; bitpos: [20]; default: 0;
+         *  This register is used to reset the loop count when tx_conti_mode is valid.
+         */
+        uint32_t loop_count_reset_chn: 1;
+        /** loop_stop_en_chn : R/W; bitpos: [21]; default: 0;
+         *  This bit is used to enable the loop send stop function after the loop counter
+         *  counts to  loop number for CHANNELn.
+         */
+        uint32_t loop_stop_en_chn: 1;
+        uint32_t reserved_22: 10;
+    };
+    uint32_t val;
+} rmt_chn_tx_lim_reg_t;
+
+/** Type of tx_sim register
+ *  RMT TX synchronous register
+ */
+typedef union {
+    struct {
+        /** tx_sim_ch0 : R/W; bitpos: [0]; default: 0;
+         *  Set this bit to enable CHANNEL0 to start sending data synchronously with other
+         *  enabled channels.
+         */
+        uint32_t tx_sim_ch0: 1;
+        /** tx_sim_ch1 : R/W; bitpos: [1]; default: 0;
+         *  Set this bit to enable CHANNEL1 to start sending data synchronously with other
+         *  enabled channels.
+         */
+        uint32_t tx_sim_ch1: 1;
+        /** tx_sim_ch2 : R/W; bitpos: [2]; default: 0;
+         *  Set this bit to enable CHANNEL2 to start sending data synchronously with other
+         *  enabled channels.
+         */
+        uint32_t tx_sim_ch2: 1;
+        /** tx_sim_ch3 : R/W; bitpos: [3]; default: 0;
+         *  Set this bit to enable CHANNEL3 to start sending data synchronously with other
+         *  enabled channels.
+         */
+        uint32_t tx_sim_ch3: 1;
+        /** tx_sim_en : R/W; bitpos: [4]; default: 0;
+         *  This register is used to enable multiple of channels to start sending data
+         *  synchronously.
+         */
+        uint32_t tx_sim_en: 1;
+        uint32_t reserved_5: 27;
+    };
+    uint32_t val;
+} rmt_tx_sim_reg_t;
+
+
+/** Group: Rx event configuration registers */
+/** Type of chm_rx_lim register
+ *  Channel m Rx event configuration register
+ */
+typedef union {
+    struct {
+        /** chm_rx_lim_reg : R/W; bitpos: [8:0]; default: 128;
+         *  This register is used to configure the maximum entries that CHANNELm can receive.
+         */
+        uint32_t chm_rx_lim_reg: 9;
+        uint32_t reserved_9: 23;
+    };
+    uint32_t val;
+} rmt_chm_rx_lim_reg_t;
+
+
+/** Group: Version register */
+/** Type of date register
+ *  RMT version register
+ */
+typedef union {
+    struct {
+        /** date : R/W; bitpos: [27:0]; default: 34607489;
+         *  This is the version register.
+         */
+        uint32_t date: 28;
+        uint32_t reserved_28: 4;
+    };
+    uint32_t val;
+} rmt_date_reg_t;
+
+
+typedef struct {
+    volatile rmt_chndata_reg_t chndata[4];
+    volatile rmt_chmdata_reg_t chmdata[4];
+    volatile rmt_chnconf0_reg_t chnconf0[4];
+    volatile rmt_chmconf_reg_t chmconf[4];
+    volatile rmt_chnstatus_reg_t chnstatus[4];
+    volatile rmt_chmstatus_reg_t chmstatus[4];
+    volatile rmt_int_raw_reg_t int_raw;
+    volatile rmt_int_st_reg_t int_st;
+    volatile rmt_int_ena_reg_t int_ena;
+    volatile rmt_int_clr_reg_t int_clr;
+    volatile rmt_chncarrier_duty_reg_t chncarrier_duty[4];
+    volatile rmt_chm_rx_carrier_rm_reg_t chm_rx_carrier_rm[4];
+    volatile rmt_chn_tx_lim_reg_t chn_tx_lim[4];
+    volatile rmt_chm_rx_lim_reg_t chm_rx_lim[4];
+    volatile rmt_sys_conf_reg_t sys_conf;
+    volatile rmt_tx_sim_reg_t tx_sim;
+    volatile rmt_ref_cnt_rst_reg_t ref_cnt_rst;
+    volatile rmt_date_reg_t date;
+} rmt_dev_t;
+
+#ifndef __cplusplus
+_Static_assert(sizeof(rmt_dev_t) == 0xd0, "Invalid size of rmt_dev_t structure");
+#endif
+
+typedef struct {
+    union {
+        struct {
+            uint32_t duration0 : 15;
+            uint32_t level0 : 1;
+            uint32_t duration1 : 15;
+            uint32_t level1 : 1;
+        };
+        uint32_t val;
+    };
+} rmt_item32_t;
+
+typedef struct {
+    struct {
+        volatile rmt_item32_t data32[48];
+    } chan[8];
+} rmt_mem_t;
+
+#ifndef __cplusplus
+_Static_assert(sizeof(rmt_item32_t) == 0x04, "Invalid size of rmt_item32_t structure");
+_Static_assert(sizeof(rmt_mem_t) == 0x04 * 8 * 48, "Invalid size of rmt_mem_t structure");
+#endif
+
+extern rmt_dev_t RMT;
+extern rmt_mem_t RMTMEM;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc.h
new file mode 100644
index 00000000000..aa09874f2c7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc.h
@@ -0,0 +1,886 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+#include "soc/soc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file rtc.h
+ * @brief Low-level RTC power, clock, and sleep functions.
+ *
+ * Functions in this file facilitate configuration of ESP32's RTC_CNTL peripheral.
+ * RTC_CNTL peripheral handles many functions:
+ * - enables/disables clocks and power to various parts of the chip; this is
+ *   done using direct register access (forcing power up or power down) or by
+ *   allowing state machines to control power and clocks automatically
+ * - handles sleep and wakeup functions
+ * - maintains a 48-bit counter which can be used for timekeeping
+ *
+ * These functions are not thread safe, and should not be viewed as high level
+ * APIs. For example, while this file provides a function which can switch
+ * CPU frequency, this function is on its own is not sufficient to implement
+ * frequency switching in ESP-IDF context: some coordination with RTOS,
+ * peripheral drivers, and WiFi/BT stacks is also required.
+ *
+ * These functions will normally not be used in applications directly.
+ * ESP-IDF provides, or will provide, drivers and other facilities to use
+ * RTC subsystem functionality.
+ *
+ * The functions are loosely split into the following groups:
+ * - rtc_clk: clock switching, calibration
+ * - rtc_time: reading RTC counter, conversion between counter values and time
+ * - rtc_sleep: entry into sleep modes
+ * - rtc_init: initialization
+ */
+
+#define MHZ (1000000)
+
+#define RTC_SLOW_CLK_X32K_CAL_TIMEOUT_THRES(cycles)  (cycles << 12)
+#define RTC_SLOW_CLK_8MD256_CAL_TIMEOUT_THRES(cycles)  (cycles << 12)
+#define RTC_SLOW_CLK_150K_CAL_TIMEOUT_THRES(cycles)  (cycles << 10)
+
+#define RTC_SLOW_CLK_FREQ_150K      150000
+#define RTC_SLOW_CLK_FREQ_8MD256    (RTC_FAST_CLK_FREQ_APPROX / 256)
+#define RTC_SLOW_CLK_FREQ_32K       32768
+
+#define OTHER_BLOCKS_POWERUP        1
+#define OTHER_BLOCKS_WAIT           1
+
+/* Approximate mapping of voltages to RTC_CNTL_DBIAS_WAK, RTC_CNTL_DBIAS_SLP,
+ * RTC_CNTL_DIG_DBIAS_WAK, RTC_CNTL_DIG_DBIAS_SLP values.
+ * Valid if RTC_CNTL_DBG_ATTEN is 0.
+ */
+#define RTC_CNTL_DBIAS_SLP  0   ///< sleep dig_dbias & rtc_dbias
+#define RTC_CNTL_DBIAS_0V90 13  ///< digital voltage
+#define RTC_CNTL_DBIAS_0V95 16
+#define RTC_CNTL_DBIAS_1V00 18
+#define RTC_CNTL_DBIAS_1V05 20
+#define RTC_CNTL_DBIAS_1V10 23
+#define RTC_CNTL_DBIAS_1V15 25
+#define RTC_CNTL_DBIAS_1V20 28
+#define RTC_CNTL_DBIAS_1V25 30
+#define RTC_CNTL_DBIAS_1V30 31 ///< voltage is about 1.34v in fact
+
+#define DELAY_FAST_CLK_SWITCH           3
+#define DELAY_SLOW_CLK_SWITCH           300
+#define DELAY_8M_ENABLE                 50
+
+/* Number of 8M/256 clock cycles to use for XTAL frequency estimation.
+ * 10 cycles will take approximately 300 microseconds.
+ */
+#define XTAL_FREQ_EST_CYCLES            10
+
+/* Core voltage needs to be increased in two cases:
+ * 1. running at 240 MHz
+ * 2. running with 80MHz Flash frequency
+ */
+#if CONFIG_ESPTOOLPY_FLASHFREQ_80M || CONFIG_ESPTOOLPY_FLASHFREQ_120M
+#define DIG_DBIAS_80M_160M  RTC_CNTL_DBIAS_1V25
+#else
+#define DIG_DBIAS_80M_160M  RTC_CNTL_DBIAS_1V10
+#endif
+#define DIG_DBIAS_240M      RTC_CNTL_DBIAS_1V25
+#define DIG_DBIAS_XTAL      RTC_CNTL_DBIAS_1V10
+#define DIG_DBIAS_2M        RTC_CNTL_DBIAS_1V00
+
+#define RTC_CNTL_PLL_BUF_WAIT_DEFAULT  20
+#define RTC_CNTL_XTL_BUF_WAIT_DEFAULT  100
+#define RTC_CNTL_CK8M_WAIT_DEFAULT  20
+#define RTC_CK8M_ENABLE_WAIT_DEFAULT 5
+
+/* Various delays to be programmed into power control state machines */
+#define RTC_CNTL_XTL_BUF_WAIT_SLP_US        (250)
+#define RTC_CNTL_PLL_BUF_WAIT_SLP_CYCLES    (1)
+#define RTC_CNTL_CK8M_WAIT_SLP_CYCLES       (4)
+#define RTC_CNTL_WAKEUP_DELAY_CYCLES        (4)
+
+#define RTC_CNTL_CK8M_DFREQ_DEFAULT 100
+#define RTC_CNTL_SCK_DCAP_DEFAULT   255
+
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_IN_SLEEP    (0xFF)
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT     (0x10)
+
+/*
+set sleep_init default param
+*/
+#define RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_DEFAULT  5
+#define RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_NODROP  0
+#define RTC_CNTL_DBG_ATTEN_DEEPSLEEP_DEFAULT  15
+#define RTC_CNTL_DBG_ATTEN_MONITOR_DEFAULT  0
+#define RTC_CNTL_BIASSLP_MONITOR_DEFAULT  0
+#define RTC_CNTL_BIASSLP_SLEEP_ON  0
+#define RTC_CNTL_BIASSLP_SLEEP_DEFAULT  1
+#define RTC_CNTL_PD_CUR_MONITOR_DEFAULT  1
+#define RTC_CNTL_PD_CUR_SLEEP_ON  0
+#define RTC_CNTL_PD_CUR_SLEEP_DEFAULT  1
+#define RTC_CNTL_DG_VDD_DRV_B_SLP_DEFAULT 0xf
+
+/**
+ * @brief Possible main XTAL frequency values.
+ *
+ * Enum values should be equal to frequency in MHz.
+ */
+typedef enum {
+    RTC_XTAL_FREQ_32M = 32,
+    RTC_XTAL_FREQ_40M = 40,     //!< 40 MHz XTAL
+} rtc_xtal_freq_t;
+
+/**
+ * @brief CPU frequency values
+ */
+typedef enum {
+    RTC_CPU_FREQ_XTAL = 0,      //!< Main XTAL frequency
+    RTC_CPU_FREQ_80M = 1,       //!< 80 MHz
+    RTC_CPU_FREQ_160M = 2,      //!< 160 MHz
+    RTC_CPU_FREQ_240M = 3,      //!< 240 MHz
+    RTC_CPU_FREQ_2M = 4,        //!< 2 MHz
+    RTC_CPU_320M_80M = 5,       //!< for test
+    RTC_CPU_320M_160M = 6,      //!< for test
+    RTC_CPU_FREQ_XTAL_DIV2 = 7, //!< XTAL/2 after reset
+} rtc_cpu_freq_t;
+
+/**
+ * @brief CPU clock source
+ */
+typedef enum {
+    RTC_CPU_FREQ_SRC_XTAL,  //!< XTAL
+    RTC_CPU_FREQ_SRC_PLL,   //!< PLL (480M or 320M)
+    RTC_CPU_FREQ_SRC_8M,    //!< Internal 8M RTC oscillator
+    RTC_CPU_FREQ_SRC_APLL   //!< APLL
+} rtc_cpu_freq_src_t;
+
+/**
+ * @brief CPU clock configuration structure
+ */
+typedef struct rtc_cpu_freq_config_s {
+    rtc_cpu_freq_src_t source;      //!< The clock from which CPU clock is derived
+    uint32_t source_freq_mhz;       //!< Source clock frequency
+    uint32_t div;                   //!< Divider, freq_mhz = source_freq_mhz / div
+    uint32_t freq_mhz;              //!< CPU clock frequency
+} rtc_cpu_freq_config_t;
+
+/**
+ * @brief RTC SLOW_CLK frequency values
+ */
+typedef enum {
+    RTC_SLOW_FREQ_RTC = 0,      //!< Internal 150 kHz RC oscillator
+    RTC_SLOW_FREQ_32K_XTAL = 1, //!< External 32 kHz XTAL
+    RTC_SLOW_FREQ_8MD256 = 2,   //!< Internal 8 MHz RC oscillator, divided by 256
+} rtc_slow_freq_t;
+
+/**
+ * @brief RTC FAST_CLK frequency values
+ */
+typedef enum {
+    RTC_FAST_FREQ_XTALD4 = 0,   //!< Main XTAL, divided by 4
+    RTC_FAST_FREQ_8M = 1,       //!< Internal 8 MHz RC oscillator
+} rtc_fast_freq_t;
+
+/* With the default value of CK8M_DFREQ, 8M clock frequency is 8.5 MHz +/- 7% */
+#define RTC_FAST_CLK_FREQ_APPROX 8500000
+
+#define RTC_CLK_CAL_FRACT  19  //!< Number of fractional bits in values returned by rtc_clk_cal
+
+#define RTC_VDDSDIO_TIEH_1_8V 0 //!< TIEH field value for 1.8V VDDSDIO
+#define RTC_VDDSDIO_TIEH_3_3V 1 //!< TIEH field value for 3.3V VDDSDIO
+
+/**
+ * @brief Clock source to be calibrated using rtc_clk_cal function
+ */
+typedef enum {
+    RTC_CAL_RTC_MUX = 0,       //!< Currently selected RTC SLOW_CLK
+    RTC_CAL_8MD256 = 1,        //!< Internal 8 MHz RC oscillator, divided by 256
+    RTC_CAL_32K_XTAL = 2,      //!< External 32 kHz XTAL
+    RTC_CAL_INTERNAL_OSC = 3   //!< Internal 150 kHz oscillator
+} rtc_cal_sel_t;
+
+/**
+ * Initialization parameters for rtc_clk_init
+ */
+typedef struct {
+    rtc_xtal_freq_t xtal_freq : 8;  //!< Main XTAL frequency
+    uint32_t cpu_freq_mhz : 10;    //!< CPU frequency to set, in MHz
+    rtc_fast_freq_t fast_freq : 1;  //!< RTC_FAST_CLK frequency to set
+    rtc_slow_freq_t slow_freq : 2;  //!< RTC_SLOW_CLK frequency to set
+    uint32_t clk_rtc_clk_div : 8;
+    uint32_t clk_8m_clk_div : 3;        //!< RTC 8M clock divider (division is by clk_8m_div+1, i.e. 0 means 8MHz frequency)
+    uint32_t slow_clk_dcap : 8;     //!< RTC 150k clock adjustment parameter (higher value leads to lower frequency)
+    uint32_t clk_8m_dfreq : 8;      //!< RTC 8m clock adjustment parameter (higher value leads to higher frequency)
+} rtc_clk_config_t;
+
+/**
+ * Default initializer for rtc_clk_config_t
+ */
+#define RTC_CLK_CONFIG_DEFAULT() { \
+    .xtal_freq = RTC_XTAL_FREQ_40M, \
+    .cpu_freq_mhz = 80, \
+    .fast_freq = RTC_FAST_FREQ_8M, \
+    .slow_freq = RTC_SLOW_FREQ_RTC, \
+    .clk_rtc_clk_div = 0, \
+    .clk_8m_clk_div = 0, \
+    .slow_clk_dcap = RTC_CNTL_SCK_DCAP_DEFAULT, \
+    .clk_8m_dfreq = RTC_CNTL_CK8M_DFREQ_DEFAULT, \
+}
+
+typedef struct {
+    uint32_t dac : 6;
+    uint32_t dres : 3;
+    uint32_t dgm : 3;
+    uint32_t dbuf: 1;
+} x32k_config_t;
+
+#define X32K_CONFIG_DEFAULT() { \
+    .dac = 3, \
+    .dres = 3, \
+    .dgm = 3, \
+    .dbuf = 1, \
+}
+
+typedef struct {
+    uint16_t wifi_powerup_cycles : 7;
+    uint16_t wifi_wait_cycles : 9;
+    uint16_t bt_powerup_cycles : 7;
+    uint16_t bt_wait_cycles : 9;
+    uint16_t rtc_powerup_cycles : 7;
+    uint16_t rtc_wait_cycles : 9;
+    uint16_t cpu_top_powerup_cycles : 7;
+    uint16_t cpu_top_wait_cycles : 9;
+    uint16_t dg_wrap_powerup_cycles : 7;
+    uint16_t dg_wrap_wait_cycles : 9;
+    uint16_t dg_peri_powerup_cycles : 7;
+    uint16_t dg_peri_wait_cycles : 9;
+    uint16_t rtc_mem_powerup_cycles : 7;
+    uint16_t rtc_mem_wait_cycles : 9;
+} rtc_init_config_t;
+
+#define RTC_INIT_CONFIG_DEFAULT() { \
+    .wifi_powerup_cycles = OTHER_BLOCKS_POWERUP, \
+    .wifi_wait_cycles = OTHER_BLOCKS_WAIT, \
+    .bt_powerup_cycles = OTHER_BLOCKS_POWERUP, \
+    .bt_wait_cycles = OTHER_BLOCKS_WAIT, \
+    .rtc_powerup_cycles = OTHER_BLOCKS_POWERUP, \
+    .rtc_wait_cycles = OTHER_BLOCKS_WAIT, \
+    .cpu_top_powerup_cycles = OTHER_BLOCKS_POWERUP, \
+    .cpu_top_wait_cycles = OTHER_BLOCKS_WAIT, \
+    .dg_wrap_powerup_cycles = OTHER_BLOCKS_POWERUP, \
+    .dg_wrap_wait_cycles = OTHER_BLOCKS_WAIT, \
+    .dg_peri_powerup_cycles = OTHER_BLOCKS_POWERUP, \
+    .dg_peri_wait_cycles = OTHER_BLOCKS_WAIT, \
+    .rtc_mem_powerup_cycles = OTHER_BLOCKS_POWERUP, \
+    .rtc_mem_wait_cycles = OTHER_BLOCKS_WAIT, \
+}
+
+void rtc_clk_divider_set(uint32_t div);
+
+void rtc_clk_8m_divider_set(uint32_t div);
+
+/**
+ * Initialize clocks and set CPU frequency
+ *
+ * @param cfg clock configuration as rtc_clk_config_t
+ */
+void rtc_clk_init(rtc_clk_config_t cfg);
+
+/**
+ * @brief Get main XTAL frequency
+ *
+ * This is the value stored in RTC register RTC_XTAL_FREQ_REG by the bootloader. As passed to
+ * rtc_clk_init function
+ *
+ * @return XTAL frequency, one of rtc_xtal_freq_t
+ */
+rtc_xtal_freq_t rtc_clk_xtal_freq_get(void);
+
+/**
+ * @brief Update XTAL frequency
+ *
+ * Updates the XTAL value stored in RTC_XTAL_FREQ_REG. Usually this value is ignored
+ * after startup.
+ *
+ * @param xtal_freq New frequency value
+ */
+void rtc_clk_xtal_freq_update(rtc_xtal_freq_t xtal_freq);
+
+/**
+ * @brief Enable or disable 32 kHz XTAL oscillator
+ * @param en  true to enable, false to disable
+ */
+void rtc_clk_32k_enable(bool en);
+
+/**
+ * @brief Configure 32 kHz XTAL oscillator to accept external clock signal
+ */
+void rtc_clk_32k_enable_external(void);
+
+/**
+ * @brief Get the state of 32k XTAL oscillator
+ * @return true if 32k XTAL oscillator has been enabled
+ */
+bool rtc_clk_32k_enabled(void);
+
+/**
+ * @brief Enable 32k oscillator, configuring it for fast startup time.
+ * Note: to achieve higher frequency stability, rtc_clk_32k_enable function
+ * must be called one the 32k XTAL oscillator has started up. This function
+ * will initially disable the 32k XTAL oscillator, so it should not be called
+ * when the system is using 32k XTAL as RTC_SLOW_CLK.
+ *
+ * @param cycle Number of 32kHz cycles to bootstrap external crystal.
+ *              If 0, no square wave will be used to bootstrap crystal oscillation.
+ */
+void rtc_clk_32k_bootstrap(uint32_t cycle);
+
+/**
+ * @brief Enable or disable 8 MHz internal oscillator
+ *
+ * Output from 8 MHz internal oscillator is passed into a configurable
+ * divider, which by default divides the input clock frequency by 256.
+ * Output of the divider may be used as RTC_SLOW_CLK source.
+ * Output of the divider is referred to in register descriptions and code as
+ * 8md256 or simply d256. Divider values other than 256 may be configured, but
+ * this facility is not currently needed, so is not exposed in the code.
+ *
+ * When 8MHz/256 divided output is not needed, the divider should be disabled
+ * to reduce power consumption.
+ *
+ * @param clk_8m_en true to enable 8MHz generator
+ * @param d256_en true to enable /256 divider
+ */
+void rtc_clk_8m_enable(bool clk_8m_en, bool d256_en);
+
+/**
+ * @brief Get the state of 8 MHz internal oscillator
+ * @return true if the oscillator is enabled
+ */
+bool rtc_clk_8m_enabled(void);
+
+/**
+ * @brief Get the state of /256 divider which is applied to 8MHz clock
+ * @return true if the divided output is enabled
+ */
+bool rtc_clk_8md256_enabled(void);
+
+/**
+ * @brief Enable or disable APLL
+ *
+ * Output frequency is given by the formula:
+ * apll_freq = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536)/((o_div + 2) * 2)
+ *
+ * The dividend in this expression should be in the range of 240 - 600 MHz.
+ *
+ * In rev. 0 of ESP32, sdm0 and sdm1 are unused and always set to 0.
+ *
+ * @param enable  true to enable, false to disable
+ * @param sdm0  frequency adjustment parameter, 0..255
+ * @param sdm1  frequency adjustment parameter, 0..255
+ * @param sdm2  frequency adjustment parameter, 0..63
+ * @param o_div  frequency divider, 0..31
+ */
+void rtc_clk_apll_enable(bool enable, uint32_t sdm0, uint32_t sdm1, uint32_t sdm2, uint32_t o_div);
+
+/**
+ * @brief Select source for RTC_SLOW_CLK
+ * @param slow_freq clock source (one of rtc_slow_freq_t values)
+ */
+void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq);
+
+/**
+ * @brief Get the RTC_SLOW_CLK source
+ * @return currently selected clock source (one of rtc_slow_freq_t values)
+ */
+rtc_slow_freq_t rtc_clk_slow_freq_get(void);
+
+/**
+ * @brief Get the approximate frequency of RTC_SLOW_CLK, in Hz
+ *
+ * - if RTC_SLOW_FREQ_RTC is selected, returns ~150000
+ * - if RTC_SLOW_FREQ_32K_XTAL is selected, returns 32768
+ * - if RTC_SLOW_FREQ_8MD256 is selected, returns ~33000
+ *
+ * rtc_clk_cal function can be used to get more precise value by comparing
+ * RTC_SLOW_CLK frequency to the frequency of main XTAL.
+ *
+ * @return RTC_SLOW_CLK frequency, in Hz
+ */
+uint32_t rtc_clk_slow_freq_get_hz(void);
+
+/**
+ * @brief Select source for RTC_FAST_CLK
+ * @param fast_freq clock source (one of rtc_fast_freq_t values)
+ */
+void rtc_clk_fast_freq_set(rtc_fast_freq_t fast_freq);
+
+/**
+ * @brief Get the RTC_FAST_CLK source
+ * @return currently selected clock source (one of rtc_fast_freq_t values)
+ */
+rtc_fast_freq_t rtc_clk_fast_freq_get(void);
+
+/**
+ * @brief Get CPU frequency config for a given frequency
+ * @param freq_mhz  Frequency in MHz
+ * @param[out] out_config Output, CPU frequency configuration structure
+ * @return true if frequency can be obtained, false otherwise
+ */
+bool rtc_clk_cpu_freq_mhz_to_config(uint32_t freq_mhz, rtc_cpu_freq_config_t *out_config);
+
+/**
+ * @brief Switch CPU frequency
+ *
+ * This function sets CPU frequency according to the given configuration
+ * structure. It enables PLLs, if necessary.
+ *
+ * @note This function in not intended to be called by applications in FreeRTOS
+ * environment. This is because it does not adjust various timers based on the
+ * new CPU frequency.
+ *
+ * @param config  CPU frequency configuration structure
+ */
+void rtc_clk_cpu_freq_set_config(const rtc_cpu_freq_config_t *config);
+
+/**
+ * @brief Switch CPU frequency (optimized for speed)
+ *
+ * This function is a faster equivalent of rtc_clk_cpu_freq_set_config.
+ * It works faster because it does not disable PLLs when switching from PLL to
+ * XTAL and does not enabled them when switching back. If PLL is not already
+ * enabled when this function is called to switch from XTAL to PLL frequency,
+ * or the PLL which is enabled is the wrong one, this function will fall back
+ * to calling rtc_clk_cpu_freq_set_config.
+ *
+ * Unlike rtc_clk_cpu_freq_set_config, this function relies on static data,
+ * so it is less safe to use it e.g. from a panic handler (when memory might
+ * be corrupted).
+ *
+ * @note This function in not intended to be called by applications in FreeRTOS
+ * environment. This is because it does not adjust various timers based on the
+ * new CPU frequency.
+ *
+ * @param config  CPU frequency configuration structure
+ */
+void rtc_clk_cpu_freq_set_config_fast(const rtc_cpu_freq_config_t *config);
+
+/**
+ * @brief Get the currently used CPU frequency configuration
+ * @param[out] out_config  Output, CPU frequency configuration structure
+ */
+void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t *out_config);
+
+/**
+ * @brief Switch CPU clock source to XTAL
+ *
+ * Short form for filling in rtc_cpu_freq_config_t structure and calling
+ * rtc_clk_cpu_freq_set_config when a switch to XTAL is needed.
+ * Assumes that XTAL frequency has been determined — don't call in startup code.
+ */
+void rtc_clk_cpu_freq_set_xtal(void);
+
+/**
+ * @brief Store new APB frequency value in RAM
+ *
+ * This function doesn't change any hardware clocks.
+ *
+ * Functions which perform frequency switching and change APB frequency call
+ * this function to update the value of APB frequency stored in RAM.
+ * (This should not normally be called from application code.)
+ *
+ * @param apb_freq  new APB frequency, in Hz
+ */
+void rtc_clk_apb_freq_update(uint32_t apb_freq);
+
+/**
+ * @brief Get the current stored APB frequency.
+ * @return The APB frequency value as last set via rtc_clk_apb_freq_update(), in Hz.
+ */
+uint32_t rtc_clk_apb_freq_get(void);
+
+uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles);
+
+/**
+ * @brief Measure RTC slow clock's period, based on main XTAL frequency
+ *
+ * This function will time out and return 0 if the time for the given number
+ * of cycles to be counted exceeds the expected time twice. This may happen if
+ * 32k XTAL is being calibrated, but the oscillator has not started up (due to
+ * incorrect loading capacitance, board design issue, or lack of 32 XTAL on board).
+ *
+ * @param cal_clk  clock to be measured
+ * @param slow_clk_cycles  number of slow clock cycles to average
+ * @return average slow clock period in microseconds, Q13.19 fixed point format,
+ *         or 0 if calibration has timed out
+ */
+uint32_t rtc_clk_cal(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles);
+
+/**
+ * @brief Measure ratio between XTAL frequency and RTC slow clock frequency
+ * @param cal_clk slow clock to be measured
+ * @param slow_clk_cycles number of slow clock cycles to average
+ * @return average ratio between XTAL frequency and slow clock frequency,
+ *         Q13.19 fixed point format, or 0 if calibration has timed out.
+ */
+uint32_t rtc_clk_cal_ratio(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles);
+
+/**
+ * @brief Convert time interval from microseconds to RTC_SLOW_CLK cycles
+ * @param time_in_us Time interval in microseconds
+ * @param slow_clk_period  Period of slow clock in microseconds, Q13.19
+ *                         fixed point format (as returned by rtc_slowck_cali).
+ * @return number of slow clock cycles
+ */
+uint64_t rtc_time_us_to_slowclk(uint64_t time_in_us, uint32_t period);
+
+/**
+ * @brief Convert time interval from RTC_SLOW_CLK to microseconds
+ * @param time_in_us Time interval in RTC_SLOW_CLK cycles
+ * @param slow_clk_period  Period of slow clock in microseconds, Q13.19
+ *                         fixed point format (as returned by rtc_slowck_cali).
+ * @return time interval in microseconds
+ */
+uint64_t rtc_time_slowclk_to_us(uint64_t rtc_cycles, uint32_t period);
+
+/**
+ * @brief Get current value of RTC counter
+ *
+ * RTC has a 48-bit counter which is incremented by 2 every 2 RTC_SLOW_CLK
+ * cycles. Counter value is not writable by software. The value is not adjusted
+ * when switching to a different RTC_SLOW_CLK source.
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter
+ */
+uint64_t rtc_time_get(void);
+
+uint64_t rtc_light_slp_time_get(void);
+
+uint64_t rtc_deep_slp_time_get(void);
+
+/**
+ * @brief Busy loop until next RTC_SLOW_CLK cycle
+ *
+ * This function returns not earlier than the next RTC_SLOW_CLK clock cycle.
+ * In some cases (e.g. when RTC_SLOW_CLK cycle is very close), it may return
+ * one RTC_SLOW_CLK cycle later.
+ */
+void rtc_clk_wait_for_slow_cycle(void);
+
+/**
+ * @brief Enable the rtc digital 8M clock
+ *
+ * This function is used to enable the digital rtc 8M clock to support peripherals.
+ * For enabling the analog 8M clock, using `rtc_clk_8M_enable` function above.
+ */
+void rtc_dig_clk8m_enable(void);
+
+/**
+ * @brief Disable the rtc digital 8M clock
+ *
+ * This function is used to disable the digital rtc 8M clock, which is only used to support peripherals.
+ */
+void rtc_dig_clk8m_disable(void);
+
+/**
+ * @brief Calculate the real clock value after the clock calibration
+ *
+ * @param cal_val Average slow clock period in microseconds, fixed point value as returned from `rtc_clk_cal`
+ * @return Frequency of the clock in Hz
+ */
+uint32_t rtc_clk_freq_cal(uint32_t cal_val);
+
+/**
+ * @brief Power up flags for rtc_sleep_pd function
+ */
+typedef struct {
+    uint32_t dig_fpu : 1;    //!< Set to 1 to power UP digital part in sleep
+    uint32_t rtc_fpu : 1;    //!< Set to 1 to power UP RTC memories in sleep
+    uint32_t cpu_fpu : 1;    //!< Set to 1 to power UP digital memories and CPU in sleep
+    uint32_t i2s_fpu : 1;    //!< Set to 1 to power UP I2S in sleep
+    uint32_t bb_fpu : 1;     //!< Set to 1 to power UP WiFi in sleep
+    uint32_t nrx_fpu : 1;    //!< Set to 1 to power UP WiFi in sleep
+    uint32_t fe_fpu : 1;     //!< Set to 1 to power UP WiFi in sleep
+    uint32_t sram_fpu : 1;    //!< Set to 1 to power UP SRAM in sleep
+    uint32_t rom_ram_fpu : 1; //!< Set to 1 to power UP ROM/IRAM0_DRAM0 in sleep
+} rtc_sleep_pu_config_t;
+
+/**
+ * Initializer for rtc_sleep_pu_config_t which sets all flags to the same value
+ */
+#define RTC_SLEEP_PU_CONFIG_ALL(val) {\
+    .dig_fpu = (val), \
+    .rtc_fpu = (val), \
+    .cpu_fpu = (val), \
+    .i2s_fpu = (val), \
+    .bb_fpu = (val), \
+    .nrx_fpu = (val), \
+    .fe_fpu = (val), \
+    .sram_fpu = (val), \
+    .rom_ram_fpu = (val), \
+}
+
+void rtc_sleep_pu(rtc_sleep_pu_config_t cfg);
+
+/**
+ * @brief sleep configuration for rtc_sleep_init function
+ */
+typedef struct {
+    uint32_t lslp_mem_inf_fpu : 1;      //!< force normal voltage in sleep mode (digital domain memory)
+    uint32_t rtc_mem_inf_follow_cpu : 1;//!< keep low voltage in sleep mode (even if ULP/touch is used)
+    uint32_t rtc_fastmem_pd_en : 1;     //!< power down RTC fast memory
+    uint32_t rtc_slowmem_pd_en : 1;     //!< power down RTC slow memory
+    uint32_t rtc_peri_pd_en : 1;        //!< power down RTC peripherals
+    uint32_t wifi_pd_en : 1;            //!< power down WiFi
+    uint32_t bt_pd_en : 1;              //!< power down BT
+    uint32_t cpu_pd_en : 1;             //!< power down CPU, but not restart when lightsleep.
+    uint32_t int_8m_pd_en : 1;          //!< Power down Internal 8M oscillator
+    uint32_t dig_peri_pd_en : 1;        //!< power down digital peripherals
+    uint32_t deep_slp : 1;              //!< power down digital domain
+    uint32_t wdt_flashboot_mod_en : 1;  //!< enable WDT flashboot mode
+    uint32_t dig_dbias_wak : 5;         //!< set bias for digital domain, in active mode
+    uint32_t dig_dbias_slp : 5;         //!< set bias for digital domain, in sleep mode
+    uint32_t rtc_dbias_wak : 5;         //!< set bias for RTC domain, in active mode
+    uint32_t rtc_dbias_slp : 5;         //!< set bias for RTC domain, in sleep mode
+    uint32_t vddsdio_pd_en : 1;         //!< power down VDDSDIO regulator
+    uint32_t xtal_fpu : 1;              //!< keep main XTAL powered up in sleep
+    uint32_t deep_slp_reject : 1;
+    uint32_t light_slp_reject : 1;
+} rtc_sleep_config_t;
+
+/**
+ * Default initializer for rtc_sleep_config_t
+ *
+ * This initializer sets all fields to "reasonable" values (e.g. suggested for
+ * production use) based on a combination of RTC_SLEEP_PD_x flags.
+ *
+ * @param RTC_SLEEP_PD_x flags combined using bitwise OR
+ */
+#define is_dslp(pd_flags)   ((pd_flags) & RTC_SLEEP_PD_DIG)
+#define RTC_SLEEP_CONFIG_DEFAULT(sleep_flags) { \
+    .lslp_mem_inf_fpu = 0, \
+    .rtc_mem_inf_follow_cpu = ((sleep_flags) & RTC_SLEEP_PD_RTC_MEM_FOLLOW_CPU) ? 1 : 0, \
+    .rtc_fastmem_pd_en = ((sleep_flags) & RTC_SLEEP_PD_RTC_FAST_MEM) ? 1 : 0, \
+    .rtc_slowmem_pd_en = ((sleep_flags) & RTC_SLEEP_PD_RTC_SLOW_MEM) ? 1 : 0, \
+    .rtc_peri_pd_en = ((sleep_flags) & RTC_SLEEP_PD_RTC_PERIPH) ? 1 : 0, \
+    .wifi_pd_en = ((sleep_flags) & RTC_SLEEP_PD_WIFI) ? 1 : 0, \
+    .bt_pd_en = ((sleep_flags) & RTC_SLEEP_PD_BT) ? 1 : 0, \
+    .cpu_pd_en = ((sleep_flags) & RTC_SLEEP_PD_CPU) ? 1 : 0, \
+    .int_8m_pd_en = is_dslp(sleep_flags) ? 1 : ((sleep_flags) & RTC_SLEEP_PD_INT_8M) ? 1 : 0, \
+    .dig_peri_pd_en = ((sleep_flags) & RTC_SLEEP_PD_DIG_PERIPH) ? 1 : 0, \
+    .deep_slp = ((sleep_flags) & RTC_SLEEP_PD_DIG) ? 1 : 0, \
+    .wdt_flashboot_mod_en = 0, \
+    .dig_dbias_wak = RTC_CNTL_DBIAS_1V10, \
+    .dig_dbias_slp = is_dslp(sleep_flags)                   ? RTC_CNTL_DBIAS_SLP  \
+                   : !((sleep_flags) & RTC_SLEEP_PD_INT_8M) ? RTC_CNTL_DBIAS_1V10 \
+                   : RTC_CNTL_DBIAS_SLP, \
+    .rtc_dbias_wak = RTC_CNTL_DBIAS_1V10, \
+    .rtc_dbias_slp = is_dslp(sleep_flags)                   ? RTC_CNTL_DBIAS_SLP  \
+                   : !((sleep_flags) & RTC_SLEEP_PD_INT_8M) ? RTC_CNTL_DBIAS_1V10 \
+                   : RTC_CNTL_DBIAS_SLP, \
+    .vddsdio_pd_en = ((sleep_flags) & RTC_SLEEP_PD_VDDSDIO) ? 1 : 0, \
+    .xtal_fpu = is_dslp(sleep_flags) ? 0 : ((sleep_flags) & RTC_SLEEP_PD_XTAL) ? 0 : 1, \
+    .deep_slp_reject = 1, \
+    .light_slp_reject = 1 \
+};
+
+#define RTC_SLEEP_PD_DIG                BIT(0)  //!< Deep sleep (power down digital domain)
+#define RTC_SLEEP_PD_RTC_PERIPH         BIT(1)  //!< Power down RTC peripherals
+#define RTC_SLEEP_PD_RTC_SLOW_MEM       BIT(2)  //!< Power down RTC SLOW memory
+#define RTC_SLEEP_PD_RTC_FAST_MEM       BIT(3)  //!< Power down RTC FAST memory
+#define RTC_SLEEP_PD_RTC_MEM_FOLLOW_CPU BIT(4)  //!< RTC FAST and SLOW memories are automatically powered up and down along with the CPU
+#define RTC_SLEEP_PD_VDDSDIO            BIT(5)  //!< Power down VDDSDIO regulator
+#define RTC_SLEEP_PD_WIFI               BIT(6)  //!< Power down WIFI
+#define RTC_SLEEP_PD_BT                 BIT(7)  //!< Power down BT
+#define RTC_SLEEP_PD_CPU                BIT(8)  //!< Power down CPU when in lightsleep, but not restart
+#define RTC_SLEEP_PD_DIG_PERIPH         BIT(9)  //!< Power down DIG peripherals
+#define RTC_SLEEP_PD_INT_8M             BIT(10) //!< Power down Internal 8M oscillator
+#define RTC_SLEEP_PD_XTAL               BIT(11) //!< Power down main XTAL
+
+/**
+ * @brief Prepare the chip to enter sleep mode
+ *
+ * This function configures various power control state machines to handle
+ * entry into light sleep or deep sleep mode, switches APB and CPU clock source
+ * (usually to XTAL), and sets bias voltages for digital and RTC power domains.
+ *
+ * This function does not actually enter sleep mode; this is done using
+ * rtc_sleep_start function. Software may do some other actions between
+ * rtc_sleep_init and rtc_sleep_start, such as set wakeup timer and configure
+ * wakeup sources.
+ * @param cfg sleep mode configuration
+ */
+void rtc_sleep_init(rtc_sleep_config_t cfg);
+
+/**
+ * @brief Low level initialize for rtc state machine waiting cycles after waking up
+ *
+ * This function configures the cycles chip need to wait for internal 8MHz
+ * oscillator and external 40MHz crystal. As we configure fixed time for waiting
+ * crystal, we need to pass period to calculate cycles. Now this function only
+ * used in lightsleep mode.
+ *
+ * @param slowclk_period re-calibrated slow clock period
+ */
+void rtc_sleep_low_init(uint32_t slowclk_period);
+
+/**
+ * @brief Set target value of RTC counter for RTC_TIMER_TRIG_EN wakeup source
+ * @param t value of RTC counter at which wakeup from sleep will happen;
+ *          only the lower 48 bits are used
+ */
+void rtc_sleep_set_wakeup_time(uint64_t t);
+
+
+#define RTC_EXT0_TRIG_EN    BIT(0)  //!< EXT0 GPIO wakeup
+#define RTC_EXT1_TRIG_EN    BIT(1)  //!< EXT1 GPIO wakeup
+#define RTC_GPIO_TRIG_EN    BIT(2)  //!< GPIO wakeup (light sleep only)
+#define RTC_TIMER_TRIG_EN   BIT(3)  //!< Timer wakeup
+#define RTC_SDIO_TRIG_EN    BIT(4)  //!< SDIO wakeup (light sleep only)
+#define RTC_WIFI_TRIG_EN    BIT(5)  //!< WIFI wakeup (light sleep only)
+#define RTC_UART0_TRIG_EN   BIT(6)  //!< UART0 wakeup (light sleep only)
+#define RTC_UART1_TRIG_EN   BIT(7)  //!< UART1 wakeup (light sleep only)
+#define RTC_TOUCH_TRIG_EN   BIT(8)  //!< Touch wakeup
+#define RTC_ULP_TRIG_EN     BIT(9)  //!< ULP wakeup
+#define RTC_BT_TRIG_EN      BIT(10) //!< BT wakeup (light sleep only)
+#define RTC_COCPU_TRIG_EN   BIT(11)
+#define RTC_XTAL32K_DEAD_TRIG_EN    BIT(12)
+#define RTC_COCPU_TRAP_TRIG_EN      BIT(13)
+#define RTC_USB_TRIG_EN             BIT(14)
+
+/**
+ * @brief Enter deep or light sleep mode
+ *
+ * This function enters the sleep mode previously configured using rtc_sleep_init
+ * function. Before entering sleep, software should configure wake up sources
+ * appropriately (set up GPIO wakeup registers, timer wakeup registers,
+ * and so on).
+ *
+ * If deep sleep mode was configured using rtc_sleep_init, and sleep is not
+ * rejected by hardware (based on reject_opt flags), this function never returns.
+ * When the chip wakes up from deep sleep, CPU is reset and execution starts
+ * from ROM bootloader.
+ *
+ * If light sleep mode was configured using rtc_sleep_init, this function
+ * returns on wakeup, or if sleep is rejected by hardware.
+ *
+ * @param wakeup_opt  bit mask wake up reasons to enable (RTC_xxx_TRIG_EN flags
+ *                    combined with OR)
+ * @param reject_opt  bit mask of sleep reject reasons:
+ *                      - RTC_CNTL_GPIO_REJECT_EN
+ *                      - RTC_CNTL_SDIO_REJECT_EN
+ *                    These flags are used to prevent entering sleep when e.g.
+ *                    an external host is communicating via SDIO slave
+ * @param lslp_mem_inf_fpu If non-zero then the low power config is restored
+ *                         immediately on wake. Recommended for light sleep,
+ *                         has no effect if the system goes into deep sleep.
+ *
+ * @return non-zero if sleep was rejected by hardware
+ */
+uint32_t rtc_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu);
+
+/**
+ * @brief Enter deep sleep mode
+ *
+ * Similar to rtc_sleep_start(), but additionally uses hardware to calculate the CRC value
+ * of RTC FAST memory. On wake, this CRC is used to determine if a deep sleep wake
+ * stub is valid to execute (if a wake address is set).
+ *
+ * No RAM is accessed while calculating the CRC and going into deep sleep, which makes
+ * this function safe to use even if the caller's stack is in RTC FAST memory.
+ *
+ * @note If no deep sleep wake stub address is set then calling rtc_sleep_start() will
+ * have the same effect and takes less time as CRC calculation is skipped.
+ *
+ * @note This function should only be called after rtc_sleep_init() has been called to
+ * configure the system for deep sleep.
+ *
+ * @param wakeup_opt - same as for rtc_sleep_start
+ * @param reject_opt - same as for rtc_sleep_start
+ *
+ * @return non-zero if sleep was rejected by hardware
+ */
+uint32_t rtc_deep_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt);
+
+/**
+ * RTC power and clock control initialization settings
+ */
+typedef struct {
+    uint32_t ck8m_wait : 8;         //!< Number of rtc_fast_clk cycles to wait for 8M clock to be ready
+    uint32_t xtal_wait : 8;         //!< Number of rtc_fast_clk cycles to wait for XTAL clock to be ready
+    uint32_t pll_wait : 8;          //!< Number of rtc_fast_clk cycles to wait for PLL to be ready
+    uint32_t clkctl_init : 1;       //!< Perform clock control related initialization
+    uint32_t pwrctl_init : 1;       //!< Perform power control related initialization
+    uint32_t rtc_dboost_fpd : 1;    //!< Force power down RTC_DBOOST
+    uint32_t xtal_fpu : 1;
+    uint32_t bbpll_fpu : 1;
+    uint32_t cpu_waiti_clk_gate : 1;
+    uint32_t cali_ocode : 1;        //!< Calibrate Ocode to make bangap voltage more precise.
+} rtc_config_t;
+
+/**
+ * Default initializer of rtc_config_t.
+ *
+ * This initializer sets all fields to "reasonable" values (e.g. suggested for
+ * production use).
+ */
+#define RTC_CONFIG_DEFAULT() {\
+    .ck8m_wait = RTC_CNTL_CK8M_WAIT_DEFAULT, \
+    .xtal_wait = RTC_CNTL_XTL_BUF_WAIT_DEFAULT, \
+    .pll_wait  = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \
+    .clkctl_init = 1, \
+    .pwrctl_init = 1, \
+    .rtc_dboost_fpd = 1, \
+    .xtal_fpu = 0, \
+    .bbpll_fpu = 0, \
+    .cpu_waiti_clk_gate = 1, \
+    .cali_ocode = 0 \
+}
+
+/**
+ * Initialize RTC clock and power control related functions
+ * @param cfg configuration options as rtc_config_t
+ */
+void rtc_init(rtc_config_t cfg);
+
+/**
+ * Structure describing vddsdio configuration
+ */
+typedef struct {
+    uint32_t force : 1;     //!< If 1, use configuration from RTC registers; if 0, use EFUSE/bootstrapping pins.
+    uint32_t enable : 1;    //!< Enable VDDSDIO regulator
+    uint32_t tieh  : 1;     //!< Select VDDSDIO voltage. One of RTC_VDDSDIO_TIEH_1_8V, RTC_VDDSDIO_TIEH_3_3V
+    uint32_t drefh : 2;     //!< Tuning parameter for VDDSDIO regulator
+    uint32_t drefm : 2;     //!< Tuning parameter for VDDSDIO regulator
+    uint32_t drefl : 2;     //!< Tuning parameter for VDDSDIO regulator
+} rtc_vddsdio_config_t;
+
+/**
+ * Get current VDDSDIO configuration
+ * If VDDSDIO configuration is overridden by RTC, get values from RTC
+ * Otherwise, if VDDSDIO is configured by EFUSE, get values from EFUSE
+ * Otherwise, use default values and the level of MTDI bootstrapping pin.
+ * @return currently used VDDSDIO configuration
+ */
+rtc_vddsdio_config_t rtc_vddsdio_get_config(void);
+
+/**
+ * Set new VDDSDIO configuration using RTC registers.
+ * If config.force == 1, this overrides configuration done using bootstrapping
+ * pins and EFUSE.
+ *
+ * @param config new VDDSDIO configuration
+ */
+void rtc_vddsdio_set_config(rtc_vddsdio_config_t config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_cntl_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_cntl_reg.h
new file mode 100644
index 00000000000..f2a859aed47
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_cntl_reg.h
@@ -0,0 +1,3701 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _SOC_RTC_CNTL_REG_H_
+#define _SOC_RTC_CNTL_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* The value that needs to be written to RTC_CNTL_SWD_WPROTECT_REG to write-enable the wdt registers */
+#define RTC_CNTL_SWD_WKEY_VALUE 0x8F1D312A
+
+#define RTC_CNTL_TIME0_REG		RTC_CNTL_TIME_LOW0_REG
+#define RTC_CNTL_TIME1_REG		RTC_CNTL_TIME_HIGH0_REG
+
+#define RTC_CNTL_OPTIONS0_REG          (DR_REG_RTCCNTL_BASE + 0x0)
+/* RTC_CNTL_SW_SYS_RST : WO ;bitpos:[31] ;default: 1'd0 ; */
+/*description: SW system reset.*/
+#define RTC_CNTL_SW_SYS_RST    (BIT(31))
+#define RTC_CNTL_SW_SYS_RST_M  (BIT(31))
+#define RTC_CNTL_SW_SYS_RST_V  0x1
+#define RTC_CNTL_SW_SYS_RST_S  31
+/* RTC_CNTL_DG_WRAP_FORCE_NORST : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: digital core force no reset in deep sleep.*/
+#define RTC_CNTL_DG_WRAP_FORCE_NORST    (BIT(30))
+#define RTC_CNTL_DG_WRAP_FORCE_NORST_M  (BIT(30))
+#define RTC_CNTL_DG_WRAP_FORCE_NORST_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_NORST_S  30
+/* RTC_CNTL_DG_WRAP_FORCE_RST : R/W ;bitpos:[29] ;default: 1'd0 ; */
+/*description: digital wrap force reset in deep sleep.*/
+#define RTC_CNTL_DG_WRAP_FORCE_RST    (BIT(29))
+#define RTC_CNTL_DG_WRAP_FORCE_RST_M  (BIT(29))
+#define RTC_CNTL_DG_WRAP_FORCE_RST_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_RST_S  29
+/* RTC_CNTL_ANALOG_FORCE_NOISO : R/W ;bitpos:[28] ;default: 1'd1 ; */
+/*description: .*/
+#define RTC_CNTL_ANALOG_FORCE_NOISO    (BIT(28))
+#define RTC_CNTL_ANALOG_FORCE_NOISO_M  (BIT(28))
+#define RTC_CNTL_ANALOG_FORCE_NOISO_V  0x1
+#define RTC_CNTL_ANALOG_FORCE_NOISO_S  28
+/* RTC_CNTL_PLL_FORCE_NOISO : R/W ;bitpos:[27] ;default: 1'd1 ; */
+/*description: .*/
+#define RTC_CNTL_PLL_FORCE_NOISO    (BIT(27))
+#define RTC_CNTL_PLL_FORCE_NOISO_M  (BIT(27))
+#define RTC_CNTL_PLL_FORCE_NOISO_V  0x1
+#define RTC_CNTL_PLL_FORCE_NOISO_S  27
+/* RTC_CNTL_XTL_FORCE_NOISO : R/W ;bitpos:[26] ;default: 1'd1 ; */
+/*description: .*/
+#define RTC_CNTL_XTL_FORCE_NOISO    (BIT(26))
+#define RTC_CNTL_XTL_FORCE_NOISO_M  (BIT(26))
+#define RTC_CNTL_XTL_FORCE_NOISO_V  0x1
+#define RTC_CNTL_XTL_FORCE_NOISO_S  26
+/* RTC_CNTL_ANALOG_FORCE_ISO : R/W ;bitpos:[25] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_ANALOG_FORCE_ISO    (BIT(25))
+#define RTC_CNTL_ANALOG_FORCE_ISO_M  (BIT(25))
+#define RTC_CNTL_ANALOG_FORCE_ISO_V  0x1
+#define RTC_CNTL_ANALOG_FORCE_ISO_S  25
+/* RTC_CNTL_PLL_FORCE_ISO : R/W ;bitpos:[24] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_PLL_FORCE_ISO    (BIT(24))
+#define RTC_CNTL_PLL_FORCE_ISO_M  (BIT(24))
+#define RTC_CNTL_PLL_FORCE_ISO_V  0x1
+#define RTC_CNTL_PLL_FORCE_ISO_S  24
+/* RTC_CNTL_XTL_FORCE_ISO : R/W ;bitpos:[23] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_XTL_FORCE_ISO    (BIT(23))
+#define RTC_CNTL_XTL_FORCE_ISO_M  (BIT(23))
+#define RTC_CNTL_XTL_FORCE_ISO_V  0x1
+#define RTC_CNTL_XTL_FORCE_ISO_S  23
+/* RTC_CNTL_XTL_EN_WAIT : R/W ;bitpos:[17:14] ;default: 4'd2 ; */
+/*description: wait bias_sleep and current source wakeup.*/
+#define RTC_CNTL_XTL_EN_WAIT    0x0000000F
+#define RTC_CNTL_XTL_EN_WAIT_M  ((RTC_CNTL_XTL_EN_WAIT_V)<<(RTC_CNTL_XTL_EN_WAIT_S))
+#define RTC_CNTL_XTL_EN_WAIT_V  0xF
+#define RTC_CNTL_XTL_EN_WAIT_S  14
+/* RTC_CNTL_XTL_FORCE_PU : R/W ;bitpos:[13] ;default: 1'd1 ; */
+/*description: crystall force power up.*/
+#define RTC_CNTL_XTL_FORCE_PU    (BIT(13))
+#define RTC_CNTL_XTL_FORCE_PU_M  (BIT(13))
+#define RTC_CNTL_XTL_FORCE_PU_V  0x1
+#define RTC_CNTL_XTL_FORCE_PU_S  13
+/* RTC_CNTL_XTL_FORCE_PD : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: crystall force power down.*/
+#define RTC_CNTL_XTL_FORCE_PD    (BIT(12))
+#define RTC_CNTL_XTL_FORCE_PD_M  (BIT(12))
+#define RTC_CNTL_XTL_FORCE_PD_V  0x1
+#define RTC_CNTL_XTL_FORCE_PD_S  12
+/* RTC_CNTL_BBPLL_FORCE_PU : R/W ;bitpos:[11] ;default: 1'd0 ; */
+/*description: BB_PLL force power up.*/
+#define RTC_CNTL_BBPLL_FORCE_PU    (BIT(11))
+#define RTC_CNTL_BBPLL_FORCE_PU_M  (BIT(11))
+#define RTC_CNTL_BBPLL_FORCE_PU_V  0x1
+#define RTC_CNTL_BBPLL_FORCE_PU_S  11
+/* RTC_CNTL_BBPLL_FORCE_PD : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: BB_PLL force power down.*/
+#define RTC_CNTL_BBPLL_FORCE_PD    (BIT(10))
+#define RTC_CNTL_BBPLL_FORCE_PD_M  (BIT(10))
+#define RTC_CNTL_BBPLL_FORCE_PD_V  0x1
+#define RTC_CNTL_BBPLL_FORCE_PD_S  10
+/* RTC_CNTL_BBPLL_I2C_FORCE_PU : R/W ;bitpos:[9] ;default: 1'd0 ; */
+/*description: BB_PLL_I2C force power up.*/
+#define RTC_CNTL_BBPLL_I2C_FORCE_PU    (BIT(9))
+#define RTC_CNTL_BBPLL_I2C_FORCE_PU_M  (BIT(9))
+#define RTC_CNTL_BBPLL_I2C_FORCE_PU_V  0x1
+#define RTC_CNTL_BBPLL_I2C_FORCE_PU_S  9
+/* RTC_CNTL_BBPLL_I2C_FORCE_PD : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: BB_PLL _I2C force power down.*/
+#define RTC_CNTL_BBPLL_I2C_FORCE_PD    (BIT(8))
+#define RTC_CNTL_BBPLL_I2C_FORCE_PD_M  (BIT(8))
+#define RTC_CNTL_BBPLL_I2C_FORCE_PD_V  0x1
+#define RTC_CNTL_BBPLL_I2C_FORCE_PD_S  8
+/* RTC_CNTL_BB_I2C_FORCE_PU : R/W ;bitpos:[7] ;default: 1'd0 ; */
+/*description: BB_I2C force power up.*/
+#define RTC_CNTL_BB_I2C_FORCE_PU    (BIT(7))
+#define RTC_CNTL_BB_I2C_FORCE_PU_M  (BIT(7))
+#define RTC_CNTL_BB_I2C_FORCE_PU_V  0x1
+#define RTC_CNTL_BB_I2C_FORCE_PU_S  7
+/* RTC_CNTL_BB_I2C_FORCE_PD : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: BB_I2C force power down.*/
+#define RTC_CNTL_BB_I2C_FORCE_PD    (BIT(6))
+#define RTC_CNTL_BB_I2C_FORCE_PD_M  (BIT(6))
+#define RTC_CNTL_BB_I2C_FORCE_PD_V  0x1
+#define RTC_CNTL_BB_I2C_FORCE_PD_S  6
+/* RTC_CNTL_SW_PROCPU_RST : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: PRO CPU SW reset.*/
+#define RTC_CNTL_SW_PROCPU_RST    (BIT(5))
+#define RTC_CNTL_SW_PROCPU_RST_M  (BIT(5))
+#define RTC_CNTL_SW_PROCPU_RST_V  0x1
+#define RTC_CNTL_SW_PROCPU_RST_S  5
+/* RTC_CNTL_SW_APPCPU_RST : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: APP CPU SW reset.*/
+#define RTC_CNTL_SW_APPCPU_RST    (BIT(4))
+#define RTC_CNTL_SW_APPCPU_RST_M  (BIT(4))
+#define RTC_CNTL_SW_APPCPU_RST_V  0x1
+#define RTC_CNTL_SW_APPCPU_RST_S  4
+/* RTC_CNTL_SW_STALL_PROCPU_C0 : R/W ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: {reg_sw_stall_procpu_c1[5:0],  reg_sw_stall_procpu_c0[1:0]} == 0x86 will stall P
+RO CPU.*/
+#define RTC_CNTL_SW_STALL_PROCPU_C0    0x00000003
+#define RTC_CNTL_SW_STALL_PROCPU_C0_M  ((RTC_CNTL_SW_STALL_PROCPU_C0_V)<<(RTC_CNTL_SW_STALL_PROCPU_C0_S))
+#define RTC_CNTL_SW_STALL_PROCPU_C0_V  0x3
+#define RTC_CNTL_SW_STALL_PROCPU_C0_S  2
+/* RTC_CNTL_SW_STALL_APPCPU_C0 : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: {reg_sw_stall_appcpu_c1[5:0],  reg_sw_stall_appcpu_c0[1:0]} == 0x86 will stall A
+PP CPU.*/
+#define RTC_CNTL_SW_STALL_APPCPU_C0    0x00000003
+#define RTC_CNTL_SW_STALL_APPCPU_C0_M  ((RTC_CNTL_SW_STALL_APPCPU_C0_V)<<(RTC_CNTL_SW_STALL_APPCPU_C0_S))
+#define RTC_CNTL_SW_STALL_APPCPU_C0_V  0x3
+#define RTC_CNTL_SW_STALL_APPCPU_C0_S  0
+
+#define RTC_CNTL_SLP_TIMER0_REG          (DR_REG_RTCCNTL_BASE + 0x4)
+/* RTC_CNTL_SLP_VAL_LO : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define RTC_CNTL_SLP_VAL_LO    0xFFFFFFFF
+#define RTC_CNTL_SLP_VAL_LO_M  ((RTC_CNTL_SLP_VAL_LO_V)<<(RTC_CNTL_SLP_VAL_LO_S))
+#define RTC_CNTL_SLP_VAL_LO_V  0xFFFFFFFF
+#define RTC_CNTL_SLP_VAL_LO_S  0
+
+#define RTC_CNTL_SLP_TIMER1_REG          (DR_REG_RTCCNTL_BASE + 0x8)
+/* RTC_CNTL_MAIN_TIMER_ALARM_EN : WO ;bitpos:[16] ;default: 1'h0 ; */
+/*description: timer alarm enable bit.*/
+#define RTC_CNTL_MAIN_TIMER_ALARM_EN    (BIT(16))
+#define RTC_CNTL_MAIN_TIMER_ALARM_EN_M  (BIT(16))
+#define RTC_CNTL_MAIN_TIMER_ALARM_EN_V  0x1
+#define RTC_CNTL_MAIN_TIMER_ALARM_EN_S  16
+/* RTC_CNTL_SLP_VAL_HI : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: RTC sleep timer high 16 bits.*/
+#define RTC_CNTL_SLP_VAL_HI    0x0000FFFF
+#define RTC_CNTL_SLP_VAL_HI_M  ((RTC_CNTL_SLP_VAL_HI_V)<<(RTC_CNTL_SLP_VAL_HI_S))
+#define RTC_CNTL_SLP_VAL_HI_V  0xFFFF
+#define RTC_CNTL_SLP_VAL_HI_S  0
+
+#define RTC_CNTL_TIME_UPDATE_REG          (DR_REG_RTCCNTL_BASE + 0xC)
+/* RTC_CNTL_TIME_UPDATE : WO ;bitpos:[31] ;default: 1'h0 ; */
+/*description: Set 1: to update register with RTC timer.*/
+#define RTC_CNTL_TIME_UPDATE    (BIT(31))
+#define RTC_CNTL_TIME_UPDATE_M  (BIT(31))
+#define RTC_CNTL_TIME_UPDATE_V  0x1
+#define RTC_CNTL_TIME_UPDATE_S  31
+/* RTC_CNTL_TIMER_SYS_RST : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: enable to record system reset time.*/
+#define RTC_CNTL_TIMER_SYS_RST    (BIT(29))
+#define RTC_CNTL_TIMER_SYS_RST_M  (BIT(29))
+#define RTC_CNTL_TIMER_SYS_RST_V  0x1
+#define RTC_CNTL_TIMER_SYS_RST_S  29
+/* RTC_CNTL_TIMER_XTL_OFF : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: Enable to record 40M XTAL OFF time.*/
+#define RTC_CNTL_TIMER_XTL_OFF    (BIT(28))
+#define RTC_CNTL_TIMER_XTL_OFF_M  (BIT(28))
+#define RTC_CNTL_TIMER_XTL_OFF_V  0x1
+#define RTC_CNTL_TIMER_XTL_OFF_S  28
+/* RTC_CNTL_TIMER_SYS_STALL : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: Enable to record system stall time.*/
+#define RTC_CNTL_TIMER_SYS_STALL    (BIT(27))
+#define RTC_CNTL_TIMER_SYS_STALL_M  (BIT(27))
+#define RTC_CNTL_TIMER_SYS_STALL_V  0x1
+#define RTC_CNTL_TIMER_SYS_STALL_S  27
+
+#define RTC_CNTL_TIME_LOW0_REG          (DR_REG_RTCCNTL_BASE + 0x10)
+/* RTC_CNTL_TIMER_VALUE0_LOW : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: RTC timer low 32 bits.*/
+#define RTC_CNTL_TIMER_VALUE0_LOW    0xFFFFFFFF
+#define RTC_CNTL_TIMER_VALUE0_LOW_M  ((RTC_CNTL_TIMER_VALUE0_LOW_V)<<(RTC_CNTL_TIMER_VALUE0_LOW_S))
+#define RTC_CNTL_TIMER_VALUE0_LOW_V  0xFFFFFFFF
+#define RTC_CNTL_TIMER_VALUE0_LOW_S  0
+
+#define RTC_CNTL_TIME_HIGH0_REG          (DR_REG_RTCCNTL_BASE + 0x14)
+/* RTC_CNTL_TIMER_VALUE0_HIGH : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: RTC timer high 16 bits.*/
+#define RTC_CNTL_TIMER_VALUE0_HIGH    0x0000FFFF
+#define RTC_CNTL_TIMER_VALUE0_HIGH_M  ((RTC_CNTL_TIMER_VALUE0_HIGH_V)<<(RTC_CNTL_TIMER_VALUE0_HIGH_S))
+#define RTC_CNTL_TIMER_VALUE0_HIGH_V  0xFFFF
+#define RTC_CNTL_TIMER_VALUE0_HIGH_S  0
+
+#define RTC_CNTL_STATE0_REG          (DR_REG_RTCCNTL_BASE + 0x18)
+/* RTC_CNTL_SLEEP_EN : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: sleep enable bit.*/
+#define RTC_CNTL_SLEEP_EN    (BIT(31))
+#define RTC_CNTL_SLEEP_EN_M  (BIT(31))
+#define RTC_CNTL_SLEEP_EN_V  0x1
+#define RTC_CNTL_SLEEP_EN_S  31
+/* RTC_CNTL_SLP_REJECT : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: leep reject bit.*/
+#define RTC_CNTL_SLP_REJECT    (BIT(30))
+#define RTC_CNTL_SLP_REJECT_M  (BIT(30))
+#define RTC_CNTL_SLP_REJECT_V  0x1
+#define RTC_CNTL_SLP_REJECT_S  30
+/* RTC_CNTL_SLP_WAKEUP : R/W ;bitpos:[29] ;default: 1'd0 ; */
+/*description: leep wakeup bit.*/
+#define RTC_CNTL_SLP_WAKEUP    (BIT(29))
+#define RTC_CNTL_SLP_WAKEUP_M  (BIT(29))
+#define RTC_CNTL_SLP_WAKEUP_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_S  29
+/* RTC_CNTL_SDIO_ACTIVE_IND : RO ;bitpos:[28] ;default: 1'd0 ; */
+/*description: SDIO active indication.*/
+#define RTC_CNTL_SDIO_ACTIVE_IND    (BIT(28))
+#define RTC_CNTL_SDIO_ACTIVE_IND_M  (BIT(28))
+#define RTC_CNTL_SDIO_ACTIVE_IND_V  0x1
+#define RTC_CNTL_SDIO_ACTIVE_IND_S  28
+/* RTC_CNTL_APB2RTC_BRIDGE_SEL : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: 1: APB to RTC using bridge.*/
+#define RTC_CNTL_APB2RTC_BRIDGE_SEL    (BIT(22))
+#define RTC_CNTL_APB2RTC_BRIDGE_SEL_M  (BIT(22))
+#define RTC_CNTL_APB2RTC_BRIDGE_SEL_V  0x1
+#define RTC_CNTL_APB2RTC_BRIDGE_SEL_S  22
+/* RTC_CNTL_SLP_REJECT_CAUSE_CLR : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: clear rtc sleep reject cause.*/
+#define RTC_CNTL_SLP_REJECT_CAUSE_CLR    (BIT(1))
+#define RTC_CNTL_SLP_REJECT_CAUSE_CLR_M  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_CAUSE_CLR_V  0x1
+#define RTC_CNTL_SLP_REJECT_CAUSE_CLR_S  1
+/* RTC_CNTL_SW_CPU_INT : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: rtc software interrupt to main cpu.*/
+#define RTC_CNTL_SW_CPU_INT    (BIT(0))
+#define RTC_CNTL_SW_CPU_INT_M  (BIT(0))
+#define RTC_CNTL_SW_CPU_INT_V  0x1
+#define RTC_CNTL_SW_CPU_INT_S  0
+
+#define RTC_CNTL_TIMER1_REG          (DR_REG_RTCCNTL_BASE + 0x1C)
+/* RTC_CNTL_PLL_BUF_WAIT : R/W ;bitpos:[31:24] ;default: 8'd40 ; */
+/*description: PLL wait cycles in slow_clk_rtc.*/
+#define RTC_CNTL_PLL_BUF_WAIT    0x000000FF
+#define RTC_CNTL_PLL_BUF_WAIT_M  ((RTC_CNTL_PLL_BUF_WAIT_V)<<(RTC_CNTL_PLL_BUF_WAIT_S))
+#define RTC_CNTL_PLL_BUF_WAIT_V  0xFF
+#define RTC_CNTL_PLL_BUF_WAIT_S  24
+/* RTC_CNTL_XTL_BUF_WAIT : R/W ;bitpos:[23:14] ;default: 10'd80 ; */
+/*description: XTAL wait cycles in slow_clk_rtc.*/
+#define RTC_CNTL_XTL_BUF_WAIT    0x000003FF
+#define RTC_CNTL_XTL_BUF_WAIT_M  ((RTC_CNTL_XTL_BUF_WAIT_V)<<(RTC_CNTL_XTL_BUF_WAIT_S))
+#define RTC_CNTL_XTL_BUF_WAIT_V  0x3FF
+#define RTC_CNTL_XTL_BUF_WAIT_S  14
+/* RTC_CNTL_CK8M_WAIT : R/W ;bitpos:[13:6] ;default: 8'h10 ; */
+/*description: CK8M wait cycles in slow_clk_rtc.*/
+#define RTC_CNTL_CK8M_WAIT    0x000000FF
+#define RTC_CNTL_CK8M_WAIT_M  ((RTC_CNTL_CK8M_WAIT_V)<<(RTC_CNTL_CK8M_WAIT_S))
+#define RTC_CNTL_CK8M_WAIT_V  0xFF
+#define RTC_CNTL_CK8M_WAIT_S  6
+/* RTC_CNTL_CPU_STALL_WAIT : R/W ;bitpos:[5:1] ;default: 5'd1 ; */
+/*description: CPU stall wait cycles in fast_clk_rtc.*/
+#define RTC_CNTL_CPU_STALL_WAIT    0x0000001F
+#define RTC_CNTL_CPU_STALL_WAIT_M  ((RTC_CNTL_CPU_STALL_WAIT_V)<<(RTC_CNTL_CPU_STALL_WAIT_S))
+#define RTC_CNTL_CPU_STALL_WAIT_V  0x1F
+#define RTC_CNTL_CPU_STALL_WAIT_S  1
+/* RTC_CNTL_CPU_STALL_EN : R/W ;bitpos:[0] ;default: 1'd1 ; */
+/*description: CPU stall enable bit.*/
+#define RTC_CNTL_CPU_STALL_EN    (BIT(0))
+#define RTC_CNTL_CPU_STALL_EN_M  (BIT(0))
+#define RTC_CNTL_CPU_STALL_EN_V  0x1
+#define RTC_CNTL_CPU_STALL_EN_S  0
+
+#define RTC_CNTL_TIMER2_REG          (DR_REG_RTCCNTL_BASE + 0x20)
+/* RTC_CNTL_MIN_TIME_CK8M_OFF : R/W ;bitpos:[31:24] ;default: 8'h1 ; */
+/*description: minimal cycles in slow_clk_rtc for CK8M in power down state.*/
+#define RTC_CNTL_MIN_TIME_CK8M_OFF    0x000000FF
+#define RTC_CNTL_MIN_TIME_CK8M_OFF_M  ((RTC_CNTL_MIN_TIME_CK8M_OFF_V)<<(RTC_CNTL_MIN_TIME_CK8M_OFF_S))
+#define RTC_CNTL_MIN_TIME_CK8M_OFF_V  0xFF
+#define RTC_CNTL_MIN_TIME_CK8M_OFF_S  24
+/* RTC_CNTL_ULPCP_TOUCH_START_WAIT : R/W ;bitpos:[23:15] ;default: 9'h10 ; */
+/*description: wait cycles in slow_clk_rtc before ULP-coprocessor / touch controller start to w
+ork.*/
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT    0x000001FF
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_M  ((RTC_CNTL_ULPCP_TOUCH_START_WAIT_V)<<(RTC_CNTL_ULPCP_TOUCH_START_WAIT_S))
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_V  0x1FF
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_S  15
+
+#define RTC_CNTL_TIMER3_REG          (DR_REG_RTCCNTL_BASE + 0x24)
+/* RTC_CNTL_BT_POWERUP_TIMER : R/W ;bitpos:[31:25] ;default: 7'd10 ; */
+/*description: .*/
+#define RTC_CNTL_BT_POWERUP_TIMER    0x0000007F
+#define RTC_CNTL_BT_POWERUP_TIMER_M  ((RTC_CNTL_BT_POWERUP_TIMER_V)<<(RTC_CNTL_BT_POWERUP_TIMER_S))
+#define RTC_CNTL_BT_POWERUP_TIMER_V  0x7F
+#define RTC_CNTL_BT_POWERUP_TIMER_S  25
+/* RTC_CNTL_BT_WAIT_TIMER : R/W ;bitpos:[24:16] ;default: 9'h16 ; */
+/*description: .*/
+#define RTC_CNTL_BT_WAIT_TIMER    0x000001FF
+#define RTC_CNTL_BT_WAIT_TIMER_M  ((RTC_CNTL_BT_WAIT_TIMER_V)<<(RTC_CNTL_BT_WAIT_TIMER_S))
+#define RTC_CNTL_BT_WAIT_TIMER_V  0x1FF
+#define RTC_CNTL_BT_WAIT_TIMER_S  16
+/* RTC_CNTL_WIFI_POWERUP_TIMER : R/W ;bitpos:[15:9] ;default: 7'h5 ; */
+/*description: .*/
+#define RTC_CNTL_WIFI_POWERUP_TIMER    0x0000007F
+#define RTC_CNTL_WIFI_POWERUP_TIMER_M  ((RTC_CNTL_WIFI_POWERUP_TIMER_V)<<(RTC_CNTL_WIFI_POWERUP_TIMER_S))
+#define RTC_CNTL_WIFI_POWERUP_TIMER_V  0x7F
+#define RTC_CNTL_WIFI_POWERUP_TIMER_S  9
+/* RTC_CNTL_WIFI_WAIT_TIMER : R/W ;bitpos:[8:0] ;default: 9'h8 ; */
+/*description: .*/
+#define RTC_CNTL_WIFI_WAIT_TIMER    0x000001FF
+#define RTC_CNTL_WIFI_WAIT_TIMER_M  ((RTC_CNTL_WIFI_WAIT_TIMER_V)<<(RTC_CNTL_WIFI_WAIT_TIMER_S))
+#define RTC_CNTL_WIFI_WAIT_TIMER_V  0x1FF
+#define RTC_CNTL_WIFI_WAIT_TIMER_S  0
+
+#define RTC_CNTL_TIMER4_REG          (DR_REG_RTCCNTL_BASE + 0x28)
+/* RTC_CNTL_DG_WRAP_POWERUP_TIMER : R/W ;bitpos:[31:25] ;default: 7'h8 ; */
+/*description: .*/
+#define RTC_CNTL_DG_WRAP_POWERUP_TIMER    0x0000007F
+#define RTC_CNTL_DG_WRAP_POWERUP_TIMER_M  ((RTC_CNTL_DG_WRAP_POWERUP_TIMER_V)<<(RTC_CNTL_DG_WRAP_POWERUP_TIMER_S))
+#define RTC_CNTL_DG_WRAP_POWERUP_TIMER_V  0x7F
+#define RTC_CNTL_DG_WRAP_POWERUP_TIMER_S  25
+/* RTC_CNTL_DG_WRAP_WAIT_TIMER : R/W ;bitpos:[24:16] ;default: 9'h20 ; */
+/*description: .*/
+#define RTC_CNTL_DG_WRAP_WAIT_TIMER    0x000001FF
+#define RTC_CNTL_DG_WRAP_WAIT_TIMER_M  ((RTC_CNTL_DG_WRAP_WAIT_TIMER_V)<<(RTC_CNTL_DG_WRAP_WAIT_TIMER_S))
+#define RTC_CNTL_DG_WRAP_WAIT_TIMER_V  0x1FF
+#define RTC_CNTL_DG_WRAP_WAIT_TIMER_S  16
+/* RTC_CNTL_POWERUP_TIMER : R/W ;bitpos:[15:9] ;default: 7'h5 ; */
+/*description: .*/
+#define RTC_CNTL_POWERUP_TIMER    0x0000007F
+#define RTC_CNTL_POWERUP_TIMER_M  ((RTC_CNTL_POWERUP_TIMER_V)<<(RTC_CNTL_POWERUP_TIMER_S))
+#define RTC_CNTL_POWERUP_TIMER_V  0x7F
+#define RTC_CNTL_POWERUP_TIMER_S  9
+/* RTC_CNTL_WAIT_TIMER : R/W ;bitpos:[8:0] ;default: 9'h8 ; */
+/*description: .*/
+#define RTC_CNTL_WAIT_TIMER    0x000001FF
+#define RTC_CNTL_WAIT_TIMER_M  ((RTC_CNTL_WAIT_TIMER_V)<<(RTC_CNTL_WAIT_TIMER_S))
+#define RTC_CNTL_WAIT_TIMER_V  0x1FF
+#define RTC_CNTL_WAIT_TIMER_S  0
+
+#define RTC_CNTL_TIMER5_REG          (DR_REG_RTCCNTL_BASE + 0x2C)
+/* RTC_CNTL_MIN_SLP_VAL : R/W ;bitpos:[15:8] ;default: 8'h80 ; */
+/*description: minimal sleep cycles in slow_clk_rtc.*/
+#define RTC_CNTL_MIN_SLP_VAL    0x000000FF
+#define RTC_CNTL_MIN_SLP_VAL_M  ((RTC_CNTL_MIN_SLP_VAL_V)<<(RTC_CNTL_MIN_SLP_VAL_S))
+#define RTC_CNTL_MIN_SLP_VAL_V  0xFF
+#define RTC_CNTL_MIN_SLP_VAL_S  8
+#define RTC_CNTL_MIN_SLP_VAL_MIN 2
+
+#define RTC_CNTL_TIMER6_REG          (DR_REG_RTCCNTL_BASE + 0x30)
+/* RTC_CNTL_DG_PERI_POWERUP_TIMER : R/W ;bitpos:[31:25] ;default: 7'h8 ; */
+/*description: .*/
+#define RTC_CNTL_DG_PERI_POWERUP_TIMER    0x0000007F
+#define RTC_CNTL_DG_PERI_POWERUP_TIMER_M  ((RTC_CNTL_DG_PERI_POWERUP_TIMER_V)<<(RTC_CNTL_DG_PERI_POWERUP_TIMER_S))
+#define RTC_CNTL_DG_PERI_POWERUP_TIMER_V  0x7F
+#define RTC_CNTL_DG_PERI_POWERUP_TIMER_S  25
+/* RTC_CNTL_DG_PERI_WAIT_TIMER : R/W ;bitpos:[24:16] ;default: 9'h20 ; */
+/*description: .*/
+#define RTC_CNTL_DG_PERI_WAIT_TIMER    0x000001FF
+#define RTC_CNTL_DG_PERI_WAIT_TIMER_M  ((RTC_CNTL_DG_PERI_WAIT_TIMER_V)<<(RTC_CNTL_DG_PERI_WAIT_TIMER_S))
+#define RTC_CNTL_DG_PERI_WAIT_TIMER_V  0x1FF
+#define RTC_CNTL_DG_PERI_WAIT_TIMER_S  16
+/* RTC_CNTL_CPU_TOP_POWERUP_TIMER : R/W ;bitpos:[15:9] ;default: 7'h5 ; */
+/*description: .*/
+#define RTC_CNTL_CPU_TOP_POWERUP_TIMER    0x0000007F
+#define RTC_CNTL_CPU_TOP_POWERUP_TIMER_M  ((RTC_CNTL_CPU_TOP_POWERUP_TIMER_V)<<(RTC_CNTL_CPU_TOP_POWERUP_TIMER_S))
+#define RTC_CNTL_CPU_TOP_POWERUP_TIMER_V  0x7F
+#define RTC_CNTL_CPU_TOP_POWERUP_TIMER_S  9
+/* RTC_CNTL_CPU_TOP_WAIT_TIMER : R/W ;bitpos:[8:0] ;default: 9'h8 ; */
+/*description: .*/
+#define RTC_CNTL_CPU_TOP_WAIT_TIMER    0x000001FF
+#define RTC_CNTL_CPU_TOP_WAIT_TIMER_M  ((RTC_CNTL_CPU_TOP_WAIT_TIMER_V)<<(RTC_CNTL_CPU_TOP_WAIT_TIMER_S))
+#define RTC_CNTL_CPU_TOP_WAIT_TIMER_V  0x1FF
+#define RTC_CNTL_CPU_TOP_WAIT_TIMER_S  0
+
+#define RTC_CNTL_ANA_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x34)
+/* RTC_CNTL_PLL_I2C_PU : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_PLL_I2C_PU    (BIT(31))
+#define RTC_CNTL_PLL_I2C_PU_M  (BIT(31))
+#define RTC_CNTL_PLL_I2C_PU_V  0x1
+#define RTC_CNTL_PLL_I2C_PU_S  31
+/* RTC_CNTL_CKGEN_I2C_PU : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: 1: CKGEN_I2C power up.*/
+#define RTC_CNTL_CKGEN_I2C_PU    (BIT(30))
+#define RTC_CNTL_CKGEN_I2C_PU_M  (BIT(30))
+#define RTC_CNTL_CKGEN_I2C_PU_V  0x1
+#define RTC_CNTL_CKGEN_I2C_PU_S  30
+/* RTC_CNTL_RFRX_PBUS_PU : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: 1: RFRX_PBUS power up.*/
+#define RTC_CNTL_RFRX_PBUS_PU    (BIT(28))
+#define RTC_CNTL_RFRX_PBUS_PU_M  (BIT(28))
+#define RTC_CNTL_RFRX_PBUS_PU_V  0x1
+#define RTC_CNTL_RFRX_PBUS_PU_S  28
+/* RTC_CNTL_TXRF_I2C_PU : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: 1: TXRF_I2C power up.*/
+#define RTC_CNTL_TXRF_I2C_PU    (BIT(27))
+#define RTC_CNTL_TXRF_I2C_PU_M  (BIT(27))
+#define RTC_CNTL_TXRF_I2C_PU_V  0x1
+#define RTC_CNTL_TXRF_I2C_PU_S  27
+/* RTC_CNTL_PVTMON_PU : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: 1: PVTMON power up.*/
+#define RTC_CNTL_PVTMON_PU    (BIT(26))
+#define RTC_CNTL_PVTMON_PU_M  (BIT(26))
+#define RTC_CNTL_PVTMON_PU_V  0x1
+#define RTC_CNTL_PVTMON_PU_S  26
+/* RTC_CNTL_BBPLL_CAL_SLP_START : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: start BBPLL calibration during sleep.*/
+#define RTC_CNTL_BBPLL_CAL_SLP_START    (BIT(25))
+#define RTC_CNTL_BBPLL_CAL_SLP_START_M  (BIT(25))
+#define RTC_CNTL_BBPLL_CAL_SLP_START_V  0x1
+#define RTC_CNTL_BBPLL_CAL_SLP_START_S  25
+/* RTC_CNTL_ANALOG_TOP_ISO_MONITOR : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: PLLA force power up.*/
+#define RTC_CNTL_ANALOG_TOP_ISO_MONITOR    (BIT(24))
+#define RTC_CNTL_ANALOG_TOP_ISO_MONITOR_M  (BIT(24))
+#define RTC_CNTL_ANALOG_TOP_ISO_MONITOR_V  0x1
+#define RTC_CNTL_ANALOG_TOP_ISO_MONITOR_S  24
+/* RTC_CNTL_ANALOG_TOP_ISO_SLEEP : R/W ;bitpos:[23] ;default: 1'b0 ; */
+/*description: PLLA force power down.*/
+#define RTC_CNTL_ANALOG_TOP_ISO_SLEEP    (BIT(23))
+#define RTC_CNTL_ANALOG_TOP_ISO_SLEEP_M  (BIT(23))
+#define RTC_CNTL_ANALOG_TOP_ISO_SLEEP_V  0x1
+#define RTC_CNTL_ANALOG_TOP_ISO_SLEEP_S  23
+/* RTC_CNTL_SAR_I2C_PU : R/W ;bitpos:[22] ;default: 1'b1 ; */
+/*description: PLLA force power up.*/
+#define RTC_CNTL_SAR_I2C_PU    (BIT(22))
+#define RTC_CNTL_SAR_I2C_PU_M  (BIT(22))
+#define RTC_CNTL_SAR_I2C_PU_V  0x1
+#define RTC_CNTL_SAR_I2C_PU_S  22
+/* RTC_CNTL_GLITCH_RST_EN : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_GLITCH_RST_EN    (BIT(20))
+#define RTC_CNTL_GLITCH_RST_EN_M  (BIT(20))
+#define RTC_CNTL_GLITCH_RST_EN_V  0x1
+#define RTC_CNTL_GLITCH_RST_EN_S  20
+/* RTC_CNTL_I2C_RESET_POR_FORCE_PU : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_I2C_RESET_POR_FORCE_PU    (BIT(19))
+#define RTC_CNTL_I2C_RESET_POR_FORCE_PU_M  (BIT(19))
+#define RTC_CNTL_I2C_RESET_POR_FORCE_PU_V  0x1
+#define RTC_CNTL_I2C_RESET_POR_FORCE_PU_S  19
+/* RTC_CNTL_I2C_RESET_POR_FORCE_PD : R/W ;bitpos:[18] ;default: 1'b1 ; */
+/*description: .*/
+#define RTC_CNTL_I2C_RESET_POR_FORCE_PD    (BIT(18))
+#define RTC_CNTL_I2C_RESET_POR_FORCE_PD_M  (BIT(18))
+#define RTC_CNTL_I2C_RESET_POR_FORCE_PD_V  0x1
+#define RTC_CNTL_I2C_RESET_POR_FORCE_PD_S  18
+
+#define RTC_CNTL_RESET_STATE_REG          (DR_REG_RTCCNTL_BASE + 0x38)
+/* RTC_CNTL_PRO_DRESET_MASK : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_PRO_DRESET_MASK    (BIT(25))
+#define RTC_CNTL_PRO_DRESET_MASK_M  (BIT(25))
+#define RTC_CNTL_PRO_DRESET_MASK_V  0x1
+#define RTC_CNTL_PRO_DRESET_MASK_S  25
+/* RTC_CNTL_APP_DRESET_MASK : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_APP_DRESET_MASK    (BIT(24))
+#define RTC_CNTL_APP_DRESET_MASK_M  (BIT(24))
+#define RTC_CNTL_APP_DRESET_MASK_V  0x1
+#define RTC_CNTL_APP_DRESET_MASK_S  24
+/* RTC_CNTL_RESET_FLAG_JTAG_APPCPU_CLR : WO ;bitpos:[23] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_RESET_FLAG_JTAG_APPCPU_CLR    (BIT(23))
+#define RTC_CNTL_RESET_FLAG_JTAG_APPCPU_CLR_M  (BIT(23))
+#define RTC_CNTL_RESET_FLAG_JTAG_APPCPU_CLR_V  0x1
+#define RTC_CNTL_RESET_FLAG_JTAG_APPCPU_CLR_S  23
+/* RTC_CNTL_RESET_FLAG_JTAG_PROCPU_CLR : WO ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_RESET_FLAG_JTAG_PROCPU_CLR    (BIT(22))
+#define RTC_CNTL_RESET_FLAG_JTAG_PROCPU_CLR_M  (BIT(22))
+#define RTC_CNTL_RESET_FLAG_JTAG_PROCPU_CLR_V  0x1
+#define RTC_CNTL_RESET_FLAG_JTAG_PROCPU_CLR_S  22
+/* RTC_CNTL_RESET_FLAG_JTAG_APPCPU : RO ;bitpos:[21] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_RESET_FLAG_JTAG_APPCPU    (BIT(21))
+#define RTC_CNTL_RESET_FLAG_JTAG_APPCPU_M  (BIT(21))
+#define RTC_CNTL_RESET_FLAG_JTAG_APPCPU_V  0x1
+#define RTC_CNTL_RESET_FLAG_JTAG_APPCPU_S  21
+/* RTC_CNTL_RESET_FLAG_JTAG_PROCPU : RO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_RESET_FLAG_JTAG_PROCPU    (BIT(20))
+#define RTC_CNTL_RESET_FLAG_JTAG_PROCPU_M  (BIT(20))
+#define RTC_CNTL_RESET_FLAG_JTAG_PROCPU_V  0x1
+#define RTC_CNTL_RESET_FLAG_JTAG_PROCPU_S  20
+/* RTC_CNTL_PROCPU_OCD_HALT_ON_RESET : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: PROCPU OcdHaltOnReset.*/
+#define RTC_CNTL_PROCPU_OCD_HALT_ON_RESET    (BIT(19))
+#define RTC_CNTL_PROCPU_OCD_HALT_ON_RESET_M  (BIT(19))
+#define RTC_CNTL_PROCPU_OCD_HALT_ON_RESET_V  0x1
+#define RTC_CNTL_PROCPU_OCD_HALT_ON_RESET_S  19
+/* RTC_CNTL_APPCPU_OCD_HALT_ON_RESET : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: APPCPU OcdHaltOnReset.*/
+#define RTC_CNTL_APPCPU_OCD_HALT_ON_RESET    (BIT(18))
+#define RTC_CNTL_APPCPU_OCD_HALT_ON_RESET_M  (BIT(18))
+#define RTC_CNTL_APPCPU_OCD_HALT_ON_RESET_V  0x1
+#define RTC_CNTL_APPCPU_OCD_HALT_ON_RESET_S  18
+/* RTC_CNTL_RESET_FLAG_APPCPU_CLR : WO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: clear APP CPU reset flag.*/
+#define RTC_CNTL_RESET_FLAG_APPCPU_CLR    (BIT(17))
+#define RTC_CNTL_RESET_FLAG_APPCPU_CLR_M  (BIT(17))
+#define RTC_CNTL_RESET_FLAG_APPCPU_CLR_V  0x1
+#define RTC_CNTL_RESET_FLAG_APPCPU_CLR_S  17
+/* RTC_CNTL_RESET_FLAG_PROCPU_CLR : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: clear PRO CPU reset_flag.*/
+#define RTC_CNTL_RESET_FLAG_PROCPU_CLR    (BIT(16))
+#define RTC_CNTL_RESET_FLAG_PROCPU_CLR_M  (BIT(16))
+#define RTC_CNTL_RESET_FLAG_PROCPU_CLR_V  0x1
+#define RTC_CNTL_RESET_FLAG_PROCPU_CLR_S  16
+/* RTC_CNTL_RESET_FLAG_APPCPU : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: APP CPU reset flag.*/
+#define RTC_CNTL_RESET_FLAG_APPCPU    (BIT(15))
+#define RTC_CNTL_RESET_FLAG_APPCPU_M  (BIT(15))
+#define RTC_CNTL_RESET_FLAG_APPCPU_V  0x1
+#define RTC_CNTL_RESET_FLAG_APPCPU_S  15
+/* RTC_CNTL_RESET_FLAG_PROCPU : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: PRO CPU reset_flag.*/
+#define RTC_CNTL_RESET_FLAG_PROCPU    (BIT(14))
+#define RTC_CNTL_RESET_FLAG_PROCPU_M  (BIT(14))
+#define RTC_CNTL_RESET_FLAG_PROCPU_V  0x1
+#define RTC_CNTL_RESET_FLAG_PROCPU_S  14
+/* RTC_CNTL_PROCPU_STAT_VECTOR_SEL : R/W ;bitpos:[13] ;default: 1'b1 ; */
+/*description: PRO CPU state vector sel.*/
+#define RTC_CNTL_PROCPU_STAT_VECTOR_SEL    (BIT(13))
+#define RTC_CNTL_PROCPU_STAT_VECTOR_SEL_M  (BIT(13))
+#define RTC_CNTL_PROCPU_STAT_VECTOR_SEL_V  0x1
+#define RTC_CNTL_PROCPU_STAT_VECTOR_SEL_S  13
+/* RTC_CNTL_APPCPU_STAT_VECTOR_SEL : R/W ;bitpos:[12] ;default: 1'b1 ; */
+/*description: APP CPU state vector sel.*/
+#define RTC_CNTL_APPCPU_STAT_VECTOR_SEL    (BIT(12))
+#define RTC_CNTL_APPCPU_STAT_VECTOR_SEL_M  (BIT(12))
+#define RTC_CNTL_APPCPU_STAT_VECTOR_SEL_V  0x1
+#define RTC_CNTL_APPCPU_STAT_VECTOR_SEL_S  12
+/* RTC_CNTL_RESET_CAUSE_APPCPU : RO ;bitpos:[11:6] ;default: 0 ; */
+/*description: reset cause of APP CPU.*/
+#define RTC_CNTL_RESET_CAUSE_APPCPU    0x0000003F
+#define RTC_CNTL_RESET_CAUSE_APPCPU_M  ((RTC_CNTL_RESET_CAUSE_APPCPU_V)<<(RTC_CNTL_RESET_CAUSE_APPCPU_S))
+#define RTC_CNTL_RESET_CAUSE_APPCPU_V  0x3F
+#define RTC_CNTL_RESET_CAUSE_APPCPU_S  6
+/* RTC_CNTL_RESET_CAUSE_PROCPU : RO ;bitpos:[5:0] ;default: 0 ; */
+/*description: reset cause of PRO CPU.*/
+#define RTC_CNTL_RESET_CAUSE_PROCPU    0x0000003F
+#define RTC_CNTL_RESET_CAUSE_PROCPU_M  ((RTC_CNTL_RESET_CAUSE_PROCPU_V)<<(RTC_CNTL_RESET_CAUSE_PROCPU_S))
+#define RTC_CNTL_RESET_CAUSE_PROCPU_V  0x3F
+#define RTC_CNTL_RESET_CAUSE_PROCPU_S  0
+
+#define RTC_CNTL_WAKEUP_STATE_REG          (DR_REG_RTCCNTL_BASE + 0x3C)
+/* RTC_CNTL_WAKEUP_ENA : R/W ;bitpos:[31:15] ;default: 17'b1100 ; */
+/*description: wakeup enable bitmap.*/
+#define RTC_CNTL_WAKEUP_ENA    0x0001FFFF
+#define RTC_CNTL_WAKEUP_ENA_M  ((RTC_CNTL_WAKEUP_ENA_V)<<(RTC_CNTL_WAKEUP_ENA_S))
+#define RTC_CNTL_WAKEUP_ENA_V  0x1FFFF
+#define RTC_CNTL_WAKEUP_ENA_S  15
+
+#define RTC_CNTL_INT_ENA_REG          (DR_REG_RTCCNTL_BASE + 0x40)
+/* RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA    (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_M  (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_V  0x1
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_S  20
+/* RTC_CNTL_GLITCH_DET_INT_ENA : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: enbale gitch det interrupt.*/
+#define RTC_CNTL_GLITCH_DET_INT_ENA    (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_ENA_M  (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_ENA_V  0x1
+#define RTC_CNTL_GLITCH_DET_INT_ENA_S  19
+/* RTC_CNTL_TOUCH_TIMEOUT_INT_ENA : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: enable touch timeout interrupt.*/
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA    (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_M  (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_V  0x1
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_S  18
+/* RTC_CNTL_COCPU_TRAP_INT_ENA : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: enable cocpu trap interrupt.*/
+#define RTC_CNTL_COCPU_TRAP_INT_ENA    (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_ENA_M  (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_ENA_V  0x1
+#define RTC_CNTL_COCPU_TRAP_INT_ENA_S  17
+/* RTC_CNTL_XTAL32K_DEAD_INT_ENA : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: enable xtal32k_dead  interrupt.*/
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA    (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA_M  (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA_V  0x1
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA_S  16
+/* RTC_CNTL_SWD_INT_ENA : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: enable super watch dog interrupt.*/
+#define RTC_CNTL_SWD_INT_ENA    (BIT(15))
+#define RTC_CNTL_SWD_INT_ENA_M  (BIT(15))
+#define RTC_CNTL_SWD_INT_ENA_V  0x1
+#define RTC_CNTL_SWD_INT_ENA_S  15
+/* RTC_CNTL_SARADC2_INT_ENA : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: enable saradc2 interrupt.*/
+#define RTC_CNTL_SARADC2_INT_ENA    (BIT(14))
+#define RTC_CNTL_SARADC2_INT_ENA_M  (BIT(14))
+#define RTC_CNTL_SARADC2_INT_ENA_V  0x1
+#define RTC_CNTL_SARADC2_INT_ENA_S  14
+/* RTC_CNTL_COCPU_INT_ENA : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: enable riscV cocpu interrupt.*/
+#define RTC_CNTL_COCPU_INT_ENA    (BIT(13))
+#define RTC_CNTL_COCPU_INT_ENA_M  (BIT(13))
+#define RTC_CNTL_COCPU_INT_ENA_V  0x1
+#define RTC_CNTL_COCPU_INT_ENA_S  13
+/* RTC_CNTL_TSENS_INT_ENA : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: enable tsens interrupt.*/
+#define RTC_CNTL_TSENS_INT_ENA    (BIT(12))
+#define RTC_CNTL_TSENS_INT_ENA_M  (BIT(12))
+#define RTC_CNTL_TSENS_INT_ENA_V  0x1
+#define RTC_CNTL_TSENS_INT_ENA_S  12
+/* RTC_CNTL_SARADC1_INT_ENA : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: enable saradc1 interrupt.*/
+#define RTC_CNTL_SARADC1_INT_ENA    (BIT(11))
+#define RTC_CNTL_SARADC1_INT_ENA_M  (BIT(11))
+#define RTC_CNTL_SARADC1_INT_ENA_V  0x1
+#define RTC_CNTL_SARADC1_INT_ENA_S  11
+/* RTC_CNTL_MAIN_TIMER_INT_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: enable RTC main timer interrupt.*/
+#define RTC_CNTL_MAIN_TIMER_INT_ENA    (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_M  (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_V  0x1
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_S  10
+/* RTC_CNTL_BROWN_OUT_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: enable brown out interrupt.*/
+#define RTC_CNTL_BROWN_OUT_INT_ENA    (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_ENA_M  (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_ENA_V  0x1
+#define RTC_CNTL_BROWN_OUT_INT_ENA_S  9
+/* RTC_CNTL_TOUCH_INACTIVE_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: enable touch inactive interrupt.*/
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA    (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA_M  (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA_V  0x1
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA_S  8
+/* RTC_CNTL_TOUCH_ACTIVE_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: enable touch active interrupt.*/
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA    (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA_M  (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA_V  0x1
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA_S  7
+/* RTC_CNTL_TOUCH_DONE_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: enable touch done interrupt.*/
+#define RTC_CNTL_TOUCH_DONE_INT_ENA    (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_ENA_M  (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_ENA_V  0x1
+#define RTC_CNTL_TOUCH_DONE_INT_ENA_S  6
+/* RTC_CNTL_ULP_CP_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: enable ULP-coprocessor interrupt.*/
+#define RTC_CNTL_ULP_CP_INT_ENA    (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_ENA_M  (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_ENA_V  0x1
+#define RTC_CNTL_ULP_CP_INT_ENA_S  5
+/* RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: enable touch scan done interrupt.*/
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA    (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_M  (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_V  0x1
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_S  4
+/* RTC_CNTL_WDT_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: enable RTC WDT interrupt.*/
+#define RTC_CNTL_WDT_INT_ENA    (BIT(3))
+#define RTC_CNTL_WDT_INT_ENA_M  (BIT(3))
+#define RTC_CNTL_WDT_INT_ENA_V  0x1
+#define RTC_CNTL_WDT_INT_ENA_S  3
+/* RTC_CNTL_SDIO_IDLE_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: enable SDIO idle interrupt.*/
+#define RTC_CNTL_SDIO_IDLE_INT_ENA    (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_M  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_V  0x1
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_S  2
+/* RTC_CNTL_SLP_REJECT_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: enable sleep reject interrupt.*/
+#define RTC_CNTL_SLP_REJECT_INT_ENA    (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ENA_M  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ENA_V  0x1
+#define RTC_CNTL_SLP_REJECT_INT_ENA_S  1
+/* RTC_CNTL_SLP_WAKEUP_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: enable sleep wakeup interrupt.*/
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA    (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_M  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_S  0
+
+#define RTC_CNTL_INT_RAW_REG          (DR_REG_RTCCNTL_BASE + 0x44)
+/* RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_RAW : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_RAW    (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_RAW_M  (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_RAW_V  0x1
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_RAW_S  20
+/* RTC_CNTL_GLITCH_DET_INT_RAW : RO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: glitch_det_interrupt_raw.*/
+#define RTC_CNTL_GLITCH_DET_INT_RAW    (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_RAW_M  (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_RAW_V  0x1
+#define RTC_CNTL_GLITCH_DET_INT_RAW_S  19
+/* RTC_CNTL_TOUCH_TIMEOUT_INT_RAW : RO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: touch timeout interrupt raw.*/
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_RAW    (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_RAW_M  (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_RAW_V  0x1
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_RAW_S  18
+/* RTC_CNTL_COCPU_TRAP_INT_RAW : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: cocpu trap interrupt raw.*/
+#define RTC_CNTL_COCPU_TRAP_INT_RAW    (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_RAW_M  (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_RAW_V  0x1
+#define RTC_CNTL_COCPU_TRAP_INT_RAW_S  17
+/* RTC_CNTL_XTAL32K_DEAD_INT_RAW : RO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: xtal32k dead detection interrupt raw.*/
+#define RTC_CNTL_XTAL32K_DEAD_INT_RAW    (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_RAW_M  (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_RAW_V  0x1
+#define RTC_CNTL_XTAL32K_DEAD_INT_RAW_S  16
+/* RTC_CNTL_SWD_INT_RAW : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: super watch dog interrupt raw.*/
+#define RTC_CNTL_SWD_INT_RAW    (BIT(15))
+#define RTC_CNTL_SWD_INT_RAW_M  (BIT(15))
+#define RTC_CNTL_SWD_INT_RAW_V  0x1
+#define RTC_CNTL_SWD_INT_RAW_S  15
+/* RTC_CNTL_SARADC2_INT_RAW : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: saradc2 interrupt raw.*/
+#define RTC_CNTL_SARADC2_INT_RAW    (BIT(14))
+#define RTC_CNTL_SARADC2_INT_RAW_M  (BIT(14))
+#define RTC_CNTL_SARADC2_INT_RAW_V  0x1
+#define RTC_CNTL_SARADC2_INT_RAW_S  14
+/* RTC_CNTL_COCPU_INT_RAW : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: riscV cocpu interrupt raw.*/
+#define RTC_CNTL_COCPU_INT_RAW    (BIT(13))
+#define RTC_CNTL_COCPU_INT_RAW_M  (BIT(13))
+#define RTC_CNTL_COCPU_INT_RAW_V  0x1
+#define RTC_CNTL_COCPU_INT_RAW_S  13
+/* RTC_CNTL_TSENS_INT_RAW : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: tsens interrupt raw.*/
+#define RTC_CNTL_TSENS_INT_RAW    (BIT(12))
+#define RTC_CNTL_TSENS_INT_RAW_M  (BIT(12))
+#define RTC_CNTL_TSENS_INT_RAW_V  0x1
+#define RTC_CNTL_TSENS_INT_RAW_S  12
+/* RTC_CNTL_SARADC1_INT_RAW : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: saradc1 interrupt raw.*/
+#define RTC_CNTL_SARADC1_INT_RAW    (BIT(11))
+#define RTC_CNTL_SARADC1_INT_RAW_M  (BIT(11))
+#define RTC_CNTL_SARADC1_INT_RAW_V  0x1
+#define RTC_CNTL_SARADC1_INT_RAW_S  11
+/* RTC_CNTL_MAIN_TIMER_INT_RAW : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: RTC main timer interrupt raw.*/
+#define RTC_CNTL_MAIN_TIMER_INT_RAW    (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_RAW_M  (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_RAW_V  0x1
+#define RTC_CNTL_MAIN_TIMER_INT_RAW_S  10
+/* RTC_CNTL_BROWN_OUT_INT_RAW : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: brown out interrupt raw.*/
+#define RTC_CNTL_BROWN_OUT_INT_RAW    (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_RAW_M  (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_RAW_V  0x1
+#define RTC_CNTL_BROWN_OUT_INT_RAW_S  9
+/* RTC_CNTL_TOUCH_INACTIVE_INT_RAW : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: touch inactive interrupt raw.*/
+#define RTC_CNTL_TOUCH_INACTIVE_INT_RAW    (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_RAW_M  (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_RAW_V  0x1
+#define RTC_CNTL_TOUCH_INACTIVE_INT_RAW_S  8
+/* RTC_CNTL_TOUCH_ACTIVE_INT_RAW : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: touch active interrupt raw.*/
+#define RTC_CNTL_TOUCH_ACTIVE_INT_RAW    (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_RAW_M  (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_RAW_V  0x1
+#define RTC_CNTL_TOUCH_ACTIVE_INT_RAW_S  7
+/* RTC_CNTL_TOUCH_DONE_INT_RAW : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: touch interrupt raw.*/
+#define RTC_CNTL_TOUCH_DONE_INT_RAW    (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_RAW_M  (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_RAW_V  0x1
+#define RTC_CNTL_TOUCH_DONE_INT_RAW_S  6
+/* RTC_CNTL_ULP_CP_INT_RAW : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: ULP-coprocessor interrupt raw.*/
+#define RTC_CNTL_ULP_CP_INT_RAW    (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_RAW_M  (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_RAW_V  0x1
+#define RTC_CNTL_ULP_CP_INT_RAW_S  5
+/* RTC_CNTL_TOUCH_SCAN_DONE_INT_RAW : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_RAW    (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_RAW_M  (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_RAW_V  0x1
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_RAW_S  4
+/* RTC_CNTL_WDT_INT_RAW : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: RTC WDT interrupt raw.*/
+#define RTC_CNTL_WDT_INT_RAW    (BIT(3))
+#define RTC_CNTL_WDT_INT_RAW_M  (BIT(3))
+#define RTC_CNTL_WDT_INT_RAW_V  0x1
+#define RTC_CNTL_WDT_INT_RAW_S  3
+/* RTC_CNTL_SDIO_IDLE_INT_RAW : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: SDIO idle interrupt raw.*/
+#define RTC_CNTL_SDIO_IDLE_INT_RAW    (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_RAW_M  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_RAW_V  0x1
+#define RTC_CNTL_SDIO_IDLE_INT_RAW_S  2
+/* RTC_CNTL_SLP_REJECT_INT_RAW : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: sleep reject interrupt raw.*/
+#define RTC_CNTL_SLP_REJECT_INT_RAW    (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_RAW_M  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_RAW_V  0x1
+#define RTC_CNTL_SLP_REJECT_INT_RAW_S  1
+/* RTC_CNTL_SLP_WAKEUP_INT_RAW : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: sleep wakeup interrupt raw.*/
+#define RTC_CNTL_SLP_WAKEUP_INT_RAW    (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_RAW_M  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_RAW_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_INT_RAW_S  0
+
+#define RTC_CNTL_INT_ST_REG          (DR_REG_RTCCNTL_BASE + 0x48)
+/* RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ST : RO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ST    (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ST_M  (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ST_V  0x1
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ST_S  20
+/* RTC_CNTL_GLITCH_DET_INT_ST : RO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: glitch_det_interrupt state.*/
+#define RTC_CNTL_GLITCH_DET_INT_ST    (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_ST_M  (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_ST_V  0x1
+#define RTC_CNTL_GLITCH_DET_INT_ST_S  19
+/* RTC_CNTL_TOUCH_TIMEOUT_INT_ST : RO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: Touch timeout interrupt state.*/
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ST    (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ST_M  (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ST_V  0x1
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ST_S  18
+/* RTC_CNTL_COCPU_TRAP_INT_ST : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: cocpu trap interrupt state.*/
+#define RTC_CNTL_COCPU_TRAP_INT_ST    (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_ST_M  (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_ST_V  0x1
+#define RTC_CNTL_COCPU_TRAP_INT_ST_S  17
+/* RTC_CNTL_XTAL32K_DEAD_INT_ST : RO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: xtal32k dead detection interrupt state.*/
+#define RTC_CNTL_XTAL32K_DEAD_INT_ST    (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_ST_M  (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_ST_V  0x1
+#define RTC_CNTL_XTAL32K_DEAD_INT_ST_S  16
+/* RTC_CNTL_SWD_INT_ST : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: super watch dog interrupt state.*/
+#define RTC_CNTL_SWD_INT_ST    (BIT(15))
+#define RTC_CNTL_SWD_INT_ST_M  (BIT(15))
+#define RTC_CNTL_SWD_INT_ST_V  0x1
+#define RTC_CNTL_SWD_INT_ST_S  15
+/* RTC_CNTL_SARADC2_INT_ST : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: saradc2 interrupt state.*/
+#define RTC_CNTL_SARADC2_INT_ST    (BIT(14))
+#define RTC_CNTL_SARADC2_INT_ST_M  (BIT(14))
+#define RTC_CNTL_SARADC2_INT_ST_V  0x1
+#define RTC_CNTL_SARADC2_INT_ST_S  14
+/* RTC_CNTL_COCPU_INT_ST : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: riscV cocpu interrupt state.*/
+#define RTC_CNTL_COCPU_INT_ST    (BIT(13))
+#define RTC_CNTL_COCPU_INT_ST_M  (BIT(13))
+#define RTC_CNTL_COCPU_INT_ST_V  0x1
+#define RTC_CNTL_COCPU_INT_ST_S  13
+/* RTC_CNTL_TSENS_INT_ST : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: tsens interrupt state.*/
+#define RTC_CNTL_TSENS_INT_ST    (BIT(12))
+#define RTC_CNTL_TSENS_INT_ST_M  (BIT(12))
+#define RTC_CNTL_TSENS_INT_ST_V  0x1
+#define RTC_CNTL_TSENS_INT_ST_S  12
+/* RTC_CNTL_SARADC1_INT_ST : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: saradc1 interrupt state.*/
+#define RTC_CNTL_SARADC1_INT_ST    (BIT(11))
+#define RTC_CNTL_SARADC1_INT_ST_M  (BIT(11))
+#define RTC_CNTL_SARADC1_INT_ST_V  0x1
+#define RTC_CNTL_SARADC1_INT_ST_S  11
+/* RTC_CNTL_MAIN_TIMER_INT_ST : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: RTC main timer interrupt state.*/
+#define RTC_CNTL_MAIN_TIMER_INT_ST    (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_ST_M  (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_ST_V  0x1
+#define RTC_CNTL_MAIN_TIMER_INT_ST_S  10
+/* RTC_CNTL_BROWN_OUT_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: brown out interrupt state.*/
+#define RTC_CNTL_BROWN_OUT_INT_ST    (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_ST_M  (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_ST_V  0x1
+#define RTC_CNTL_BROWN_OUT_INT_ST_S  9
+/* RTC_CNTL_TOUCH_INACTIVE_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: touch inactive interrupt state.*/
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ST    (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ST_M  (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ST_V  0x1
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ST_S  8
+/* RTC_CNTL_TOUCH_ACTIVE_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: touch active interrupt state.*/
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ST    (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ST_M  (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ST_V  0x1
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ST_S  7
+/* RTC_CNTL_TOUCH_DONE_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: touch done interrupt state.*/
+#define RTC_CNTL_TOUCH_DONE_INT_ST    (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_ST_M  (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_ST_V  0x1
+#define RTC_CNTL_TOUCH_DONE_INT_ST_S  6
+/* RTC_CNTL_ULP_CP_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: ULP-coprocessor interrupt state.*/
+#define RTC_CNTL_ULP_CP_INT_ST    (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_ST_M  (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_ST_V  0x1
+#define RTC_CNTL_ULP_CP_INT_ST_S  5
+/* RTC_CNTL_TOUCH_SCAN_DONE_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ST    (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ST_M  (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ST_V  0x1
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ST_S  4
+/* RTC_CNTL_WDT_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: RTC WDT interrupt state.*/
+#define RTC_CNTL_WDT_INT_ST    (BIT(3))
+#define RTC_CNTL_WDT_INT_ST_M  (BIT(3))
+#define RTC_CNTL_WDT_INT_ST_V  0x1
+#define RTC_CNTL_WDT_INT_ST_S  3
+/* RTC_CNTL_SDIO_IDLE_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: SDIO idle interrupt state.*/
+#define RTC_CNTL_SDIO_IDLE_INT_ST    (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ST_M  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ST_V  0x1
+#define RTC_CNTL_SDIO_IDLE_INT_ST_S  2
+/* RTC_CNTL_SLP_REJECT_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: sleep reject interrupt state.*/
+#define RTC_CNTL_SLP_REJECT_INT_ST    (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ST_M  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ST_V  0x1
+#define RTC_CNTL_SLP_REJECT_INT_ST_S  1
+/* RTC_CNTL_SLP_WAKEUP_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: sleep wakeup interrupt state.*/
+#define RTC_CNTL_SLP_WAKEUP_INT_ST    (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ST_M  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ST_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_INT_ST_S  0
+
+#define RTC_CNTL_INT_CLR_REG          (DR_REG_RTCCNTL_BASE + 0x4C)
+/* RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_CLR : WO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_CLR    (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_CLR_M  (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_CLR_V  0x1
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_CLR_S  20
+/* RTC_CNTL_GLITCH_DET_INT_CLR : WO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: Clear glitch det interrupt state.*/
+#define RTC_CNTL_GLITCH_DET_INT_CLR    (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_CLR_M  (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_CLR_V  0x1
+#define RTC_CNTL_GLITCH_DET_INT_CLR_S  19
+/* RTC_CNTL_TOUCH_TIMEOUT_INT_CLR : WO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: Clear touch timeout interrupt state.*/
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_CLR    (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_CLR_M  (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_CLR_V  0x1
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_CLR_S  18
+/* RTC_CNTL_COCPU_TRAP_INT_CLR : WO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: Clear cocpu trap interrupt state.*/
+#define RTC_CNTL_COCPU_TRAP_INT_CLR    (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_CLR_M  (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_CLR_V  0x1
+#define RTC_CNTL_COCPU_TRAP_INT_CLR_S  17
+/* RTC_CNTL_XTAL32K_DEAD_INT_CLR : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: Clear RTC WDT interrupt state.*/
+#define RTC_CNTL_XTAL32K_DEAD_INT_CLR    (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_CLR_M  (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_CLR_V  0x1
+#define RTC_CNTL_XTAL32K_DEAD_INT_CLR_S  16
+/* RTC_CNTL_SWD_INT_CLR : WO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: Clear super watch dog interrupt state.*/
+#define RTC_CNTL_SWD_INT_CLR    (BIT(15))
+#define RTC_CNTL_SWD_INT_CLR_M  (BIT(15))
+#define RTC_CNTL_SWD_INT_CLR_V  0x1
+#define RTC_CNTL_SWD_INT_CLR_S  15
+/* RTC_CNTL_SARADC2_INT_CLR : WO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: Clear saradc2 interrupt state.*/
+#define RTC_CNTL_SARADC2_INT_CLR    (BIT(14))
+#define RTC_CNTL_SARADC2_INT_CLR_M  (BIT(14))
+#define RTC_CNTL_SARADC2_INT_CLR_V  0x1
+#define RTC_CNTL_SARADC2_INT_CLR_S  14
+/* RTC_CNTL_COCPU_INT_CLR : WO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: Clear riscV cocpu interrupt state.*/
+#define RTC_CNTL_COCPU_INT_CLR    (BIT(13))
+#define RTC_CNTL_COCPU_INT_CLR_M  (BIT(13))
+#define RTC_CNTL_COCPU_INT_CLR_V  0x1
+#define RTC_CNTL_COCPU_INT_CLR_S  13
+/* RTC_CNTL_TSENS_INT_CLR : WO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Clear tsens interrupt state.*/
+#define RTC_CNTL_TSENS_INT_CLR    (BIT(12))
+#define RTC_CNTL_TSENS_INT_CLR_M  (BIT(12))
+#define RTC_CNTL_TSENS_INT_CLR_V  0x1
+#define RTC_CNTL_TSENS_INT_CLR_S  12
+/* RTC_CNTL_SARADC1_INT_CLR : WO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: Clear saradc1 interrupt state.*/
+#define RTC_CNTL_SARADC1_INT_CLR    (BIT(11))
+#define RTC_CNTL_SARADC1_INT_CLR_M  (BIT(11))
+#define RTC_CNTL_SARADC1_INT_CLR_V  0x1
+#define RTC_CNTL_SARADC1_INT_CLR_S  11
+/* RTC_CNTL_MAIN_TIMER_INT_CLR : WO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: Clear RTC main timer interrupt state.*/
+#define RTC_CNTL_MAIN_TIMER_INT_CLR    (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_CLR_M  (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_CLR_V  0x1
+#define RTC_CNTL_MAIN_TIMER_INT_CLR_S  10
+/* RTC_CNTL_BROWN_OUT_INT_CLR : WO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Clear brown out interrupt state.*/
+#define RTC_CNTL_BROWN_OUT_INT_CLR    (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_CLR_M  (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_CLR_V  0x1
+#define RTC_CNTL_BROWN_OUT_INT_CLR_S  9
+/* RTC_CNTL_TOUCH_INACTIVE_INT_CLR : WO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Clear touch inactive interrupt state.*/
+#define RTC_CNTL_TOUCH_INACTIVE_INT_CLR    (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_CLR_M  (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_CLR_V  0x1
+#define RTC_CNTL_TOUCH_INACTIVE_INT_CLR_S  8
+/* RTC_CNTL_TOUCH_ACTIVE_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Clear touch active interrupt state.*/
+#define RTC_CNTL_TOUCH_ACTIVE_INT_CLR    (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_CLR_M  (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_CLR_V  0x1
+#define RTC_CNTL_TOUCH_ACTIVE_INT_CLR_S  7
+/* RTC_CNTL_TOUCH_DONE_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Clear touch done interrupt state.*/
+#define RTC_CNTL_TOUCH_DONE_INT_CLR    (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_CLR_M  (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_CLR_V  0x1
+#define RTC_CNTL_TOUCH_DONE_INT_CLR_S  6
+/* RTC_CNTL_ULP_CP_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Clear ULP-coprocessor interrupt state.*/
+#define RTC_CNTL_ULP_CP_INT_CLR    (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_CLR_M  (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_CLR_V  0x1
+#define RTC_CNTL_ULP_CP_INT_CLR_S  5
+/* RTC_CNTL_TOUCH_SCAN_DONE_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_CLR    (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_CLR_M  (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_CLR_V  0x1
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_CLR_S  4
+/* RTC_CNTL_WDT_INT_CLR : WO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Clear RTC WDT interrupt state.*/
+#define RTC_CNTL_WDT_INT_CLR    (BIT(3))
+#define RTC_CNTL_WDT_INT_CLR_M  (BIT(3))
+#define RTC_CNTL_WDT_INT_CLR_V  0x1
+#define RTC_CNTL_WDT_INT_CLR_S  3
+/* RTC_CNTL_SDIO_IDLE_INT_CLR : WO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Clear SDIO idle interrupt state.*/
+#define RTC_CNTL_SDIO_IDLE_INT_CLR    (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_CLR_M  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_CLR_V  0x1
+#define RTC_CNTL_SDIO_IDLE_INT_CLR_S  2
+/* RTC_CNTL_SLP_REJECT_INT_CLR : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Clear sleep reject interrupt state.*/
+#define RTC_CNTL_SLP_REJECT_INT_CLR    (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_CLR_M  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_CLR_V  0x1
+#define RTC_CNTL_SLP_REJECT_INT_CLR_S  1
+/* RTC_CNTL_SLP_WAKEUP_INT_CLR : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Clear sleep wakeup interrupt state.*/
+#define RTC_CNTL_SLP_WAKEUP_INT_CLR    (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_CLR_M  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_CLR_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_INT_CLR_S  0
+
+#define RTC_CNTL_STORE0_REG          (DR_REG_RTCCNTL_BASE + 0x50)
+/* RTC_CNTL_SCRATCH0 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: .*/
+#define RTC_CNTL_SCRATCH0    0xFFFFFFFF
+#define RTC_CNTL_SCRATCH0_M  ((RTC_CNTL_SCRATCH0_V)<<(RTC_CNTL_SCRATCH0_S))
+#define RTC_CNTL_SCRATCH0_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH0_S  0
+
+#define RTC_CNTL_STORE1_REG          (DR_REG_RTCCNTL_BASE + 0x54)
+/* RTC_CNTL_SCRATCH1 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: .*/
+#define RTC_CNTL_SCRATCH1    0xFFFFFFFF
+#define RTC_CNTL_SCRATCH1_M  ((RTC_CNTL_SCRATCH1_V)<<(RTC_CNTL_SCRATCH1_S))
+#define RTC_CNTL_SCRATCH1_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH1_S  0
+
+#define RTC_CNTL_STORE2_REG          (DR_REG_RTCCNTL_BASE + 0x58)
+/* RTC_CNTL_SCRATCH2 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: .*/
+#define RTC_CNTL_SCRATCH2    0xFFFFFFFF
+#define RTC_CNTL_SCRATCH2_M  ((RTC_CNTL_SCRATCH2_V)<<(RTC_CNTL_SCRATCH2_S))
+#define RTC_CNTL_SCRATCH2_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH2_S  0
+
+#define RTC_CNTL_STORE3_REG          (DR_REG_RTCCNTL_BASE + 0x5C)
+/* RTC_CNTL_SCRATCH3 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: .*/
+#define RTC_CNTL_SCRATCH3    0xFFFFFFFF
+#define RTC_CNTL_SCRATCH3_M  ((RTC_CNTL_SCRATCH3_V)<<(RTC_CNTL_SCRATCH3_S))
+#define RTC_CNTL_SCRATCH3_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH3_S  0
+
+#define RTC_CNTL_EXT_XTL_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x60)
+/* RTC_CNTL_XTL_EXT_CTR_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_XTL_EXT_CTR_EN    (BIT(31))
+#define RTC_CNTL_XTL_EXT_CTR_EN_M  (BIT(31))
+#define RTC_CNTL_XTL_EXT_CTR_EN_V  0x1
+#define RTC_CNTL_XTL_EXT_CTR_EN_S  31
+/* RTC_CNTL_XTL_EXT_CTR_LV : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: 0: power down XTAL at high level.*/
+#define RTC_CNTL_XTL_EXT_CTR_LV    (BIT(30))
+#define RTC_CNTL_XTL_EXT_CTR_LV_M  (BIT(30))
+#define RTC_CNTL_XTL_EXT_CTR_LV_V  0x1
+#define RTC_CNTL_XTL_EXT_CTR_LV_S  30
+/* RTC_CNTL_XTAL32K_GPIO_SEL : R/W ;bitpos:[23] ;default: 1'b0 ; */
+/*description: XTAL_32K sel. 0: external XTAL_32K.*/
+#define RTC_CNTL_XTAL32K_GPIO_SEL    (BIT(23))
+#define RTC_CNTL_XTAL32K_GPIO_SEL_M  (BIT(23))
+#define RTC_CNTL_XTAL32K_GPIO_SEL_V  0x1
+#define RTC_CNTL_XTAL32K_GPIO_SEL_S  23
+/* RTC_CNTL_WDT_STATE : RO ;bitpos:[22:20] ;default: 3'h0 ; */
+/*description: state of 32k_wdt.*/
+#define RTC_CNTL_WDT_STATE    0x00000007
+#define RTC_CNTL_WDT_STATE_M  ((RTC_CNTL_WDT_STATE_V)<<(RTC_CNTL_WDT_STATE_S))
+#define RTC_CNTL_WDT_STATE_V  0x7
+#define RTC_CNTL_WDT_STATE_S  20
+/* RTC_CNTL_DAC_XTAL_32K : R/W ;bitpos:[19:17] ;default: 3'd3 ; */
+/*description: DAC_XTAL_32K.*/
+#define RTC_CNTL_DAC_XTAL_32K    0x00000007
+#define RTC_CNTL_DAC_XTAL_32K_M  ((RTC_CNTL_DAC_XTAL_32K_V)<<(RTC_CNTL_DAC_XTAL_32K_S))
+#define RTC_CNTL_DAC_XTAL_32K_V  0x7
+#define RTC_CNTL_DAC_XTAL_32K_S  17
+/* RTC_CNTL_XPD_XTAL_32K : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: XPD_XTAL_32K.*/
+#define RTC_CNTL_XPD_XTAL_32K    (BIT(16))
+#define RTC_CNTL_XPD_XTAL_32K_M  (BIT(16))
+#define RTC_CNTL_XPD_XTAL_32K_V  0x1
+#define RTC_CNTL_XPD_XTAL_32K_S  16
+/* RTC_CNTL_DRES_XTAL_32K : R/W ;bitpos:[15:13] ;default: 3'd3 ; */
+/*description: DRES_XTAL_32K.*/
+#define RTC_CNTL_DRES_XTAL_32K    0x00000007
+#define RTC_CNTL_DRES_XTAL_32K_M  ((RTC_CNTL_DRES_XTAL_32K_V)<<(RTC_CNTL_DRES_XTAL_32K_S))
+#define RTC_CNTL_DRES_XTAL_32K_V  0x7
+#define RTC_CNTL_DRES_XTAL_32K_S  13
+/* RTC_CNTL_DGM_XTAL_32K : R/W ;bitpos:[12:10] ;default: 3'd3 ; */
+/*description: xtal_32k gm control.*/
+#define RTC_CNTL_DGM_XTAL_32K    0x00000007
+#define RTC_CNTL_DGM_XTAL_32K_M  ((RTC_CNTL_DGM_XTAL_32K_V)<<(RTC_CNTL_DGM_XTAL_32K_S))
+#define RTC_CNTL_DGM_XTAL_32K_V  0x7
+#define RTC_CNTL_DGM_XTAL_32K_S  10
+/* RTC_CNTL_DBUF_XTAL_32K : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: 0: single-end buffer 1: differential buffer.*/
+#define RTC_CNTL_DBUF_XTAL_32K    (BIT(9))
+#define RTC_CNTL_DBUF_XTAL_32K_M  (BIT(9))
+#define RTC_CNTL_DBUF_XTAL_32K_V  0x1
+#define RTC_CNTL_DBUF_XTAL_32K_S  9
+/* RTC_CNTL_ENCKINIT_XTAL_32K : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: apply an internal clock to help xtal 32k to start.*/
+#define RTC_CNTL_ENCKINIT_XTAL_32K    (BIT(8))
+#define RTC_CNTL_ENCKINIT_XTAL_32K_M  (BIT(8))
+#define RTC_CNTL_ENCKINIT_XTAL_32K_V  0x1
+#define RTC_CNTL_ENCKINIT_XTAL_32K_S  8
+/* RTC_CNTL_XTAL32K_XPD_FORCE : R/W ;bitpos:[7] ;default: 1'b1 ; */
+/*description: Xtal 32k xpd control by sw or fsm.*/
+#define RTC_CNTL_XTAL32K_XPD_FORCE    (BIT(7))
+#define RTC_CNTL_XTAL32K_XPD_FORCE_M  (BIT(7))
+#define RTC_CNTL_XTAL32K_XPD_FORCE_V  0x1
+#define RTC_CNTL_XTAL32K_XPD_FORCE_S  7
+/* RTC_CNTL_XTAL32K_AUTO_RETURN : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: xtal 32k switch back xtal when xtal is restarted.*/
+#define RTC_CNTL_XTAL32K_AUTO_RETURN    (BIT(6))
+#define RTC_CNTL_XTAL32K_AUTO_RETURN_M  (BIT(6))
+#define RTC_CNTL_XTAL32K_AUTO_RETURN_V  0x1
+#define RTC_CNTL_XTAL32K_AUTO_RETURN_S  6
+/* RTC_CNTL_XTAL32K_AUTO_RESTART : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: xtal 32k restart xtal when xtal is dead.*/
+#define RTC_CNTL_XTAL32K_AUTO_RESTART    (BIT(5))
+#define RTC_CNTL_XTAL32K_AUTO_RESTART_M  (BIT(5))
+#define RTC_CNTL_XTAL32K_AUTO_RESTART_V  0x1
+#define RTC_CNTL_XTAL32K_AUTO_RESTART_S  5
+/* RTC_CNTL_XTAL32K_AUTO_BACKUP : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: xtal 32k switch to back up clock when xtal is dead.*/
+#define RTC_CNTL_XTAL32K_AUTO_BACKUP    (BIT(4))
+#define RTC_CNTL_XTAL32K_AUTO_BACKUP_M  (BIT(4))
+#define RTC_CNTL_XTAL32K_AUTO_BACKUP_V  0x1
+#define RTC_CNTL_XTAL32K_AUTO_BACKUP_S  4
+/* RTC_CNTL_XTAL32K_EXT_CLK_FO : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: xtal 32k external xtal clock force on.*/
+#define RTC_CNTL_XTAL32K_EXT_CLK_FO    (BIT(3))
+#define RTC_CNTL_XTAL32K_EXT_CLK_FO_M  (BIT(3))
+#define RTC_CNTL_XTAL32K_EXT_CLK_FO_V  0x1
+#define RTC_CNTL_XTAL32K_EXT_CLK_FO_S  3
+/* RTC_CNTL_XTAL32K_WDT_RESET : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: xtal 32k watch dog sw reset.*/
+#define RTC_CNTL_XTAL32K_WDT_RESET    (BIT(2))
+#define RTC_CNTL_XTAL32K_WDT_RESET_M  (BIT(2))
+#define RTC_CNTL_XTAL32K_WDT_RESET_V  0x1
+#define RTC_CNTL_XTAL32K_WDT_RESET_S  2
+/* RTC_CNTL_XTAL32K_WDT_CLK_FO : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: xtal 32k watch dog clock force on.*/
+#define RTC_CNTL_XTAL32K_WDT_CLK_FO    (BIT(1))
+#define RTC_CNTL_XTAL32K_WDT_CLK_FO_M  (BIT(1))
+#define RTC_CNTL_XTAL32K_WDT_CLK_FO_V  0x1
+#define RTC_CNTL_XTAL32K_WDT_CLK_FO_S  1
+/* RTC_CNTL_XTAL32K_WDT_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: xtal 32k watch dog enable.*/
+#define RTC_CNTL_XTAL32K_WDT_EN    (BIT(0))
+#define RTC_CNTL_XTAL32K_WDT_EN_M  (BIT(0))
+#define RTC_CNTL_XTAL32K_WDT_EN_V  0x1
+#define RTC_CNTL_XTAL32K_WDT_EN_S  0
+
+#define RTC_CNTL_EXT_WAKEUP_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x64)
+/* RTC_CNTL_EXT_WAKEUP1_LV : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_EXT_WAKEUP1_LV    (BIT(31))
+#define RTC_CNTL_EXT_WAKEUP1_LV_M  (BIT(31))
+#define RTC_CNTL_EXT_WAKEUP1_LV_V  0x1
+#define RTC_CNTL_EXT_WAKEUP1_LV_S  31
+/* RTC_CNTL_EXT_WAKEUP0_LV : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: 0: external wakeup at low level.*/
+#define RTC_CNTL_EXT_WAKEUP0_LV    (BIT(30))
+#define RTC_CNTL_EXT_WAKEUP0_LV_M  (BIT(30))
+#define RTC_CNTL_EXT_WAKEUP0_LV_V  0x1
+#define RTC_CNTL_EXT_WAKEUP0_LV_S  30
+/* RTC_CNTL_GPIO_WAKEUP_FILTER : R/W ;bitpos:[29] ;default: 1'd0 ; */
+/*description: enable filter for gpio wakeup event.*/
+#define RTC_CNTL_GPIO_WAKEUP_FILTER    (BIT(29))
+#define RTC_CNTL_GPIO_WAKEUP_FILTER_M  (BIT(29))
+#define RTC_CNTL_GPIO_WAKEUP_FILTER_V  0x1
+#define RTC_CNTL_GPIO_WAKEUP_FILTER_S  29
+
+#define RTC_CNTL_SLP_REJECT_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x68)
+/* RTC_CNTL_DEEP_SLP_REJECT_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: enable reject for deep sleep.*/
+#define RTC_CNTL_DEEP_SLP_REJECT_EN    (BIT(31))
+#define RTC_CNTL_DEEP_SLP_REJECT_EN_M  (BIT(31))
+#define RTC_CNTL_DEEP_SLP_REJECT_EN_V  0x1
+#define RTC_CNTL_DEEP_SLP_REJECT_EN_S  31
+/* RTC_CNTL_LIGHT_SLP_REJECT_EN : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: enable reject for light sleep.*/
+#define RTC_CNTL_LIGHT_SLP_REJECT_EN    (BIT(30))
+#define RTC_CNTL_LIGHT_SLP_REJECT_EN_M  (BIT(30))
+#define RTC_CNTL_LIGHT_SLP_REJECT_EN_V  0x1
+#define RTC_CNTL_LIGHT_SLP_REJECT_EN_S  30
+/* RTC_CNTL_SLEEP_REJECT_ENA : R/W ;bitpos:[29:12] ;default: 17'd0 ; */
+/*description: sleep reject enable.*/
+#define RTC_CNTL_SLEEP_REJECT_ENA    0x0003FFFF
+#define RTC_CNTL_SLEEP_REJECT_ENA_M  ((RTC_CNTL_SLEEP_REJECT_ENA_V)<<(RTC_CNTL_SLEEP_REJECT_ENA_S))
+#define RTC_CNTL_SLEEP_REJECT_ENA_V  0x3FFFF
+#define RTC_CNTL_SLEEP_REJECT_ENA_S  12
+
+#define RTC_CNTL_CPU_PERIOD_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x6C)
+/* RTC_CNTL_CPUPERIOD_SEL : R/W ;bitpos:[31:30] ;default: 2'b00 ; */
+/*description: .*/
+#define RTC_CNTL_CPUPERIOD_SEL    0x00000003
+#define RTC_CNTL_CPUPERIOD_SEL_M  ((RTC_CNTL_CPUPERIOD_SEL_V)<<(RTC_CNTL_CPUPERIOD_SEL_S))
+#define RTC_CNTL_CPUPERIOD_SEL_V  0x3
+#define RTC_CNTL_CPUPERIOD_SEL_S  30
+/* RTC_CNTL_CPUSEL_CONF : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: CPU sel option.*/
+#define RTC_CNTL_CPUSEL_CONF    (BIT(29))
+#define RTC_CNTL_CPUSEL_CONF_M  (BIT(29))
+#define RTC_CNTL_CPUSEL_CONF_V  0x1
+#define RTC_CNTL_CPUSEL_CONF_S  29
+
+#define RTC_CNTL_SDIO_ACT_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x70)
+/* RTC_CNTL_SDIO_ACT_DNUM : R/W ;bitpos:[31:22] ;default: 10'b0 ; */
+/*description: .*/
+#define RTC_CNTL_SDIO_ACT_DNUM    0x000003FF
+#define RTC_CNTL_SDIO_ACT_DNUM_M  ((RTC_CNTL_SDIO_ACT_DNUM_V)<<(RTC_CNTL_SDIO_ACT_DNUM_S))
+#define RTC_CNTL_SDIO_ACT_DNUM_V  0x3FF
+#define RTC_CNTL_SDIO_ACT_DNUM_S  22
+
+#define RTC_CNTL_CLK_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x74)
+/* RTC_CNTL_ANA_CLK_RTC_SEL : R/W ;bitpos:[31:30] ;default: 2'd0 ; */
+/*description: .*/
+#define RTC_CNTL_ANA_CLK_RTC_SEL    0x00000003
+#define RTC_CNTL_ANA_CLK_RTC_SEL_M  ((RTC_CNTL_ANA_CLK_RTC_SEL_V)<<(RTC_CNTL_ANA_CLK_RTC_SEL_S))
+#define RTC_CNTL_ANA_CLK_RTC_SEL_V  0x3
+#define RTC_CNTL_ANA_CLK_RTC_SEL_S  30
+/* RTC_CNTL_FAST_CLK_RTC_SEL : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: fast_clk_rtc sel. 0: XTAL div 4.*/
+#define RTC_CNTL_FAST_CLK_RTC_SEL    (BIT(29))
+#define RTC_CNTL_FAST_CLK_RTC_SEL_M  (BIT(29))
+#define RTC_CNTL_FAST_CLK_RTC_SEL_V  0x1
+#define RTC_CNTL_FAST_CLK_RTC_SEL_S  29
+/* RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING : R/W ;bitpos:[28] ;default: 1'b1 ; */
+/*description: .*/
+#define RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING    (BIT(28))
+#define RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING_M  (BIT(28))
+#define RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING_V  0x1
+#define RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING_S  28
+/* RTC_CNTL_XTAL_GLOBAL_FORCE_GATING : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_XTAL_GLOBAL_FORCE_GATING    (BIT(27))
+#define RTC_CNTL_XTAL_GLOBAL_FORCE_GATING_M  (BIT(27))
+#define RTC_CNTL_XTAL_GLOBAL_FORCE_GATING_V  0x1
+#define RTC_CNTL_XTAL_GLOBAL_FORCE_GATING_S  27
+/* RTC_CNTL_CK8M_FORCE_PU : R/W ;bitpos:[26] ;default: 1'd0 ; */
+/*description: CK8M force power up.*/
+#define RTC_CNTL_CK8M_FORCE_PU    (BIT(26))
+#define RTC_CNTL_CK8M_FORCE_PU_M  (BIT(26))
+#define RTC_CNTL_CK8M_FORCE_PU_V  0x1
+#define RTC_CNTL_CK8M_FORCE_PU_S  26
+/* RTC_CNTL_CK8M_FORCE_PD : R/W ;bitpos:[25] ;default: 1'd0 ; */
+/*description: CK8M force power down.*/
+#define RTC_CNTL_CK8M_FORCE_PD    (BIT(25))
+#define RTC_CNTL_CK8M_FORCE_PD_M  (BIT(25))
+#define RTC_CNTL_CK8M_FORCE_PD_V  0x1
+#define RTC_CNTL_CK8M_FORCE_PD_S  25
+/* RTC_CNTL_CK8M_DFREQ : R/W ;bitpos:[24:17] ;default: 8'd172 ; */
+/*description: CK8M_DFREQ.*/
+#define RTC_CNTL_CK8M_DFREQ    0x000000FF
+#define RTC_CNTL_CK8M_DFREQ_M  ((RTC_CNTL_CK8M_DFREQ_V)<<(RTC_CNTL_CK8M_DFREQ_S))
+#define RTC_CNTL_CK8M_DFREQ_V  0xFF
+#define RTC_CNTL_CK8M_DFREQ_S  17
+/* RTC_CNTL_CK8M_FORCE_NOGATING : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: CK8M force no gating during sleep.*/
+#define RTC_CNTL_CK8M_FORCE_NOGATING    (BIT(16))
+#define RTC_CNTL_CK8M_FORCE_NOGATING_M  (BIT(16))
+#define RTC_CNTL_CK8M_FORCE_NOGATING_V  0x1
+#define RTC_CNTL_CK8M_FORCE_NOGATING_S  16
+/* RTC_CNTL_XTAL_FORCE_NOGATING : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: XTAL force no gating during sleep.*/
+#define RTC_CNTL_XTAL_FORCE_NOGATING    (BIT(15))
+#define RTC_CNTL_XTAL_FORCE_NOGATING_M  (BIT(15))
+#define RTC_CNTL_XTAL_FORCE_NOGATING_V  0x1
+#define RTC_CNTL_XTAL_FORCE_NOGATING_S  15
+/* RTC_CNTL_CK8M_DIV_SEL : R/W ;bitpos:[14:12] ;default: 3'd3 ; */
+/*description: divider = reg_ck8m_div_sel + 1.*/
+#define RTC_CNTL_CK8M_DIV_SEL    0x00000007
+#define RTC_CNTL_CK8M_DIV_SEL_M  ((RTC_CNTL_CK8M_DIV_SEL_V)<<(RTC_CNTL_CK8M_DIV_SEL_S))
+#define RTC_CNTL_CK8M_DIV_SEL_V  0x7
+#define RTC_CNTL_CK8M_DIV_SEL_S  12
+/* RTC_CNTL_DIG_CLK8M_EN : R/W ;bitpos:[10] ;default: 1'd0 ; */
+/*description: enable CK8M for digital core (no relationship with RTC core).*/
+#define RTC_CNTL_DIG_CLK8M_EN    (BIT(10))
+#define RTC_CNTL_DIG_CLK8M_EN_M  (BIT(10))
+#define RTC_CNTL_DIG_CLK8M_EN_V  0x1
+#define RTC_CNTL_DIG_CLK8M_EN_S  10
+/* RTC_CNTL_DIG_CLK8M_D256_EN : R/W ;bitpos:[9] ;default: 1'd1 ; */
+/*description: enable CK8M_D256_OUT for digital core (no relationship with RTC core).*/
+#define RTC_CNTL_DIG_CLK8M_D256_EN    (BIT(9))
+#define RTC_CNTL_DIG_CLK8M_D256_EN_M  (BIT(9))
+#define RTC_CNTL_DIG_CLK8M_D256_EN_V  0x1
+#define RTC_CNTL_DIG_CLK8M_D256_EN_S  9
+/* RTC_CNTL_DIG_XTAL32K_EN : R/W ;bitpos:[8] ;default: 1'd0 ; */
+/*description: enable CK_XTAL_32K for digital core (no relationship with RTC core).*/
+#define RTC_CNTL_DIG_XTAL32K_EN    (BIT(8))
+#define RTC_CNTL_DIG_XTAL32K_EN_M  (BIT(8))
+#define RTC_CNTL_DIG_XTAL32K_EN_V  0x1
+#define RTC_CNTL_DIG_XTAL32K_EN_S  8
+/* RTC_CNTL_ENB_CK8M_DIV : R/W ;bitpos:[7] ;default: 1'd0 ; */
+/*description: 1: CK8M_D256_OUT is actually CK8M.*/
+#define RTC_CNTL_ENB_CK8M_DIV    (BIT(7))
+#define RTC_CNTL_ENB_CK8M_DIV_M  (BIT(7))
+#define RTC_CNTL_ENB_CK8M_DIV_V  0x1
+#define RTC_CNTL_ENB_CK8M_DIV_S  7
+/* RTC_CNTL_ENB_CK8M : R/W ;bitpos:[6] ;default: 1'd0 ; */
+/*description: disable CK8M and CK8M_D256_OUT.*/
+#define RTC_CNTL_ENB_CK8M    (BIT(6))
+#define RTC_CNTL_ENB_CK8M_M  (BIT(6))
+#define RTC_CNTL_ENB_CK8M_V  0x1
+#define RTC_CNTL_ENB_CK8M_S  6
+/* RTC_CNTL_CK8M_DIV : R/W ;bitpos:[5:4] ;default: 2'b01 ; */
+/*description: CK8M_D256_OUT divider. 00: div128.*/
+#define RTC_CNTL_CK8M_DIV    0x00000003
+#define RTC_CNTL_CK8M_DIV_M  ((RTC_CNTL_CK8M_DIV_V)<<(RTC_CNTL_CK8M_DIV_S))
+#define RTC_CNTL_CK8M_DIV_V  0x3
+#define RTC_CNTL_CK8M_DIV_S  4
+/* RTC_CNTL_CK8M_DIV_SEL_VLD : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: used to sync reg_ck8m_div_sel bus. Clear vld before set reg_ck8m_div_sel.*/
+#define RTC_CNTL_CK8M_DIV_SEL_VLD    (BIT(3))
+#define RTC_CNTL_CK8M_DIV_SEL_VLD_M  (BIT(3))
+#define RTC_CNTL_CK8M_DIV_SEL_VLD_V  0x1
+#define RTC_CNTL_CK8M_DIV_SEL_VLD_S  3
+/* RTC_CNTL_EFUSE_CLK_FORCE_NOGATING : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: .*/
+#define RTC_CNTL_EFUSE_CLK_FORCE_NOGATING    (BIT(2))
+#define RTC_CNTL_EFUSE_CLK_FORCE_NOGATING_M  (BIT(2))
+#define RTC_CNTL_EFUSE_CLK_FORCE_NOGATING_V  0x1
+#define RTC_CNTL_EFUSE_CLK_FORCE_NOGATING_S  2
+/* RTC_CNTL_EFUSE_CLK_FORCE_GATING : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_EFUSE_CLK_FORCE_GATING    (BIT(1))
+#define RTC_CNTL_EFUSE_CLK_FORCE_GATING_M  (BIT(1))
+#define RTC_CNTL_EFUSE_CLK_FORCE_GATING_V  0x1
+#define RTC_CNTL_EFUSE_CLK_FORCE_GATING_S  1
+
+#define RTC_CNTL_SLOW_CLK_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x78)
+/* RTC_CNTL_SLOW_CLK_NEXT_EDGE : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_SLOW_CLK_NEXT_EDGE    (BIT(31))
+#define RTC_CNTL_SLOW_CLK_NEXT_EDGE_M  (BIT(31))
+#define RTC_CNTL_SLOW_CLK_NEXT_EDGE_V  0x1
+#define RTC_CNTL_SLOW_CLK_NEXT_EDGE_S  31
+/* RTC_CNTL_ANA_CLK_DIV : R/W ;bitpos:[30:23] ;default: 8'd0 ; */
+/*description: .*/
+#define RTC_CNTL_ANA_CLK_DIV    0x000000FF
+#define RTC_CNTL_ANA_CLK_DIV_M  ((RTC_CNTL_ANA_CLK_DIV_V)<<(RTC_CNTL_ANA_CLK_DIV_S))
+#define RTC_CNTL_ANA_CLK_DIV_V  0xFF
+#define RTC_CNTL_ANA_CLK_DIV_S  23
+/* RTC_CNTL_ANA_CLK_DIV_VLD : R/W ;bitpos:[22] ;default: 1'b1 ; */
+/*description: used to sync div bus. clear vld before set reg_rtc_ana_clk_div.*/
+#define RTC_CNTL_ANA_CLK_DIV_VLD    (BIT(22))
+#define RTC_CNTL_ANA_CLK_DIV_VLD_M  (BIT(22))
+#define RTC_CNTL_ANA_CLK_DIV_VLD_V  0x1
+#define RTC_CNTL_ANA_CLK_DIV_VLD_S  22
+
+#define RTC_CNTL_SDIO_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x7C)
+/* RTC_CNTL_XPD_SDIO_REG : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_XPD_SDIO_REG    (BIT(31))
+#define RTC_CNTL_XPD_SDIO_REG_M  (BIT(31))
+#define RTC_CNTL_XPD_SDIO_REG_V  0x1
+#define RTC_CNTL_XPD_SDIO_REG_S  31
+/* RTC_CNTL_DREFH_SDIO : R/W ;bitpos:[30:29] ;default: 2'b00 ; */
+/*description: SW option for DREFH_SDIO. Only active when reg_sdio_force = 1.*/
+#define RTC_CNTL_DREFH_SDIO    0x00000003
+#define RTC_CNTL_DREFH_SDIO_M  ((RTC_CNTL_DREFH_SDIO_V)<<(RTC_CNTL_DREFH_SDIO_S))
+#define RTC_CNTL_DREFH_SDIO_V  0x3
+#define RTC_CNTL_DREFH_SDIO_S  29
+/* RTC_CNTL_DREFM_SDIO : R/W ;bitpos:[28:27] ;default: 2'b01 ; */
+/*description: SW option for DREFM_SDIO. Only active when reg_sdio_force = 1.*/
+#define RTC_CNTL_DREFM_SDIO    0x00000003
+#define RTC_CNTL_DREFM_SDIO_M  ((RTC_CNTL_DREFM_SDIO_V)<<(RTC_CNTL_DREFM_SDIO_S))
+#define RTC_CNTL_DREFM_SDIO_V  0x3
+#define RTC_CNTL_DREFM_SDIO_S  27
+/* RTC_CNTL_DREFL_SDIO : R/W ;bitpos:[26:25] ;default: 2'b01 ; */
+/*description: SW option for DREFL_SDIO. Only active when reg_sdio_force = 1.*/
+#define RTC_CNTL_DREFL_SDIO    0x00000003
+#define RTC_CNTL_DREFL_SDIO_M  ((RTC_CNTL_DREFL_SDIO_V)<<(RTC_CNTL_DREFL_SDIO_S))
+#define RTC_CNTL_DREFL_SDIO_V  0x3
+#define RTC_CNTL_DREFL_SDIO_S  25
+/* RTC_CNTL_REG1P8_READY : RO ;bitpos:[24] ;default: 1'd0 ; */
+/*description: read only register for REG1P8_READY.*/
+#define RTC_CNTL_REG1P8_READY    (BIT(24))
+#define RTC_CNTL_REG1P8_READY_M  (BIT(24))
+#define RTC_CNTL_REG1P8_READY_V  0x1
+#define RTC_CNTL_REG1P8_READY_S  24
+/* RTC_CNTL_SDIO_TIEH : R/W ;bitpos:[23] ;default: 1'd1 ; */
+/*description: SW option for SDIO_TIEH. Only active when reg_sdio_force = 1.*/
+#define RTC_CNTL_SDIO_TIEH    (BIT(23))
+#define RTC_CNTL_SDIO_TIEH_M  (BIT(23))
+#define RTC_CNTL_SDIO_TIEH_V  0x1
+#define RTC_CNTL_SDIO_TIEH_S  23
+/* RTC_CNTL_SDIO_FORCE : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: 1: use SW option to control SDIO_REG.*/
+#define RTC_CNTL_SDIO_FORCE    (BIT(22))
+#define RTC_CNTL_SDIO_FORCE_M  (BIT(22))
+#define RTC_CNTL_SDIO_FORCE_V  0x1
+#define RTC_CNTL_SDIO_FORCE_S  22
+/* RTC_CNTL_SDIO_PD_EN : R/W ;bitpos:[21] ;default: 1'd1 ; */
+/*description: power down SDIO_REG in sleep. Only active when reg_sdio_force = 0.*/
+#define RTC_CNTL_SDIO_PD_EN    (BIT(21))
+#define RTC_CNTL_SDIO_PD_EN_M  (BIT(21))
+#define RTC_CNTL_SDIO_PD_EN_V  0x1
+#define RTC_CNTL_SDIO_PD_EN_S  21
+/* RTC_CNTL_SDIO_ENCURLIM : R/W ;bitpos:[20] ;default: 1'd1 ; */
+/*description: enable current limit.*/
+#define RTC_CNTL_SDIO_ENCURLIM    (BIT(20))
+#define RTC_CNTL_SDIO_ENCURLIM_M  (BIT(20))
+#define RTC_CNTL_SDIO_ENCURLIM_V  0x1
+#define RTC_CNTL_SDIO_ENCURLIM_S  20
+/* RTC_CNTL_SDIO_MODECURLIM : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: select current limit mode.*/
+#define RTC_CNTL_SDIO_MODECURLIM    (BIT(19))
+#define RTC_CNTL_SDIO_MODECURLIM_M  (BIT(19))
+#define RTC_CNTL_SDIO_MODECURLIM_V  0x1
+#define RTC_CNTL_SDIO_MODECURLIM_S  19
+/* RTC_CNTL_SDIO_DCURLIM : R/W ;bitpos:[18:16] ;default: 3'd0 ; */
+/*description: tune current limit threshold when tieh = 0. About 800mA/(8+d).*/
+#define RTC_CNTL_SDIO_DCURLIM    0x00000007
+#define RTC_CNTL_SDIO_DCURLIM_M  ((RTC_CNTL_SDIO_DCURLIM_V)<<(RTC_CNTL_SDIO_DCURLIM_S))
+#define RTC_CNTL_SDIO_DCURLIM_V  0x7
+#define RTC_CNTL_SDIO_DCURLIM_S  16
+/* RTC_CNTL_SDIO_EN_INITI : R/W ;bitpos:[15] ;default: 1'd1 ; */
+/*description: 0 to set init[1:0]=0.*/
+#define RTC_CNTL_SDIO_EN_INITI    (BIT(15))
+#define RTC_CNTL_SDIO_EN_INITI_M  (BIT(15))
+#define RTC_CNTL_SDIO_EN_INITI_V  0x1
+#define RTC_CNTL_SDIO_EN_INITI_S  15
+/* RTC_CNTL_SDIO_INITI : R/W ;bitpos:[14:13] ;default: 2'd1 ; */
+/*description: add resistor from ldo output to ground. 0: no res.*/
+#define RTC_CNTL_SDIO_INITI    0x00000003
+#define RTC_CNTL_SDIO_INITI_M  ((RTC_CNTL_SDIO_INITI_V)<<(RTC_CNTL_SDIO_INITI_S))
+#define RTC_CNTL_SDIO_INITI_V  0x3
+#define RTC_CNTL_SDIO_INITI_S  13
+/* RTC_CNTL_SDIO_DCAP : R/W ;bitpos:[12:11] ;default: 2'b11 ; */
+/*description: ability to prevent LDO from overshoot.*/
+#define RTC_CNTL_SDIO_DCAP    0x00000003
+#define RTC_CNTL_SDIO_DCAP_M  ((RTC_CNTL_SDIO_DCAP_V)<<(RTC_CNTL_SDIO_DCAP_S))
+#define RTC_CNTL_SDIO_DCAP_V  0x3
+#define RTC_CNTL_SDIO_DCAP_S  11
+/* RTC_CNTL_SDIO_DTHDRV : R/W ;bitpos:[10:9] ;default: 2'b11 ; */
+/*description: Tieh = 1 mode drive ability. Initially set to 0 to limit charge current.*/
+#define RTC_CNTL_SDIO_DTHDRV    0x00000003
+#define RTC_CNTL_SDIO_DTHDRV_M  ((RTC_CNTL_SDIO_DTHDRV_V)<<(RTC_CNTL_SDIO_DTHDRV_S))
+#define RTC_CNTL_SDIO_DTHDRV_V  0x3
+#define RTC_CNTL_SDIO_DTHDRV_S  9
+/* RTC_CNTL_SDIO_TIMER_TARGET : R/W ;bitpos:[7:0] ;default: 8'd10 ; */
+/*description: timer count to apply reg_sdio_dcap after sdio power on.*/
+#define RTC_CNTL_SDIO_TIMER_TARGET    0x000000FF
+#define RTC_CNTL_SDIO_TIMER_TARGET_M  ((RTC_CNTL_SDIO_TIMER_TARGET_V)<<(RTC_CNTL_SDIO_TIMER_TARGET_S))
+#define RTC_CNTL_SDIO_TIMER_TARGET_V  0xFF
+#define RTC_CNTL_SDIO_TIMER_TARGET_S  0
+
+#define RTC_CNTL_BIAS_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x80)
+/* RTC_CNTL_DBG_ATTEN_WAKEUP : R/W ;bitpos:[29:26] ;default: 4'd0 ; */
+/*description: .*/
+#define RTC_CNTL_DBG_ATTEN_WAKEUP    0x0000000F
+#define RTC_CNTL_DBG_ATTEN_WAKEUP_M  ((RTC_CNTL_DBG_ATTEN_WAKEUP_V)<<(RTC_CNTL_DBG_ATTEN_WAKEUP_S))
+#define RTC_CNTL_DBG_ATTEN_WAKEUP_V  0xF
+#define RTC_CNTL_DBG_ATTEN_WAKEUP_S  26
+/* RTC_CNTL_DBG_ATTEN_MONITOR : R/W ;bitpos:[25:22] ;default: 4'd0 ; */
+/*description: DBG_ATTEN when rtc in monitor state.*/
+#define RTC_CNTL_DBG_ATTEN_MONITOR    0x0000000F
+#define RTC_CNTL_DBG_ATTEN_MONITOR_M  ((RTC_CNTL_DBG_ATTEN_MONITOR_V)<<(RTC_CNTL_DBG_ATTEN_MONITOR_S))
+#define RTC_CNTL_DBG_ATTEN_MONITOR_V  0xF
+#define RTC_CNTL_DBG_ATTEN_MONITOR_S  22
+/* RTC_CNTL_DBG_ATTEN_DEEP_SLP : R/W ;bitpos:[21:18] ;default: 4'd0 ; */
+/*description: DBG_ATTEN when rtc in sleep state.*/
+#define RTC_CNTL_DBG_ATTEN_DEEP_SLP    0x0000000F
+#define RTC_CNTL_DBG_ATTEN_DEEP_SLP_M  ((RTC_CNTL_DBG_ATTEN_DEEP_SLP_V)<<(RTC_CNTL_DBG_ATTEN_DEEP_SLP_S))
+#define RTC_CNTL_DBG_ATTEN_DEEP_SLP_V  0xF
+#define RTC_CNTL_DBG_ATTEN_DEEP_SLP_S  18
+/* RTC_CNTL_BIAS_SLEEP_MONITOR : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: bias_sleep when rtc in monitor state.*/
+#define RTC_CNTL_BIAS_SLEEP_MONITOR    (BIT(17))
+#define RTC_CNTL_BIAS_SLEEP_MONITOR_M  (BIT(17))
+#define RTC_CNTL_BIAS_SLEEP_MONITOR_V  0x1
+#define RTC_CNTL_BIAS_SLEEP_MONITOR_S  17
+/* RTC_CNTL_BIAS_SLEEP_DEEP_SLP : R/W ;bitpos:[16] ;default: 1'b1 ; */
+/*description: bias_sleep when rtc in sleep_state.*/
+#define RTC_CNTL_BIAS_SLEEP_DEEP_SLP    (BIT(16))
+#define RTC_CNTL_BIAS_SLEEP_DEEP_SLP_M  (BIT(16))
+#define RTC_CNTL_BIAS_SLEEP_DEEP_SLP_V  0x1
+#define RTC_CNTL_BIAS_SLEEP_DEEP_SLP_S  16
+/* RTC_CNTL_PD_CUR_MONITOR : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: xpd cur when rtc in monitor state.*/
+#define RTC_CNTL_PD_CUR_MONITOR    (BIT(15))
+#define RTC_CNTL_PD_CUR_MONITOR_M  (BIT(15))
+#define RTC_CNTL_PD_CUR_MONITOR_V  0x1
+#define RTC_CNTL_PD_CUR_MONITOR_S  15
+/* RTC_CNTL_PD_CUR_DEEP_SLP : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: xpd cur when rtc in sleep_state.*/
+#define RTC_CNTL_PD_CUR_DEEP_SLP    (BIT(14))
+#define RTC_CNTL_PD_CUR_DEEP_SLP_M  (BIT(14))
+#define RTC_CNTL_PD_CUR_DEEP_SLP_V  0x1
+#define RTC_CNTL_PD_CUR_DEEP_SLP_S  14
+/* RTC_CNTL_BIAS_BUF_MONITOR : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_BIAS_BUF_MONITOR    (BIT(13))
+#define RTC_CNTL_BIAS_BUF_MONITOR_M  (BIT(13))
+#define RTC_CNTL_BIAS_BUF_MONITOR_V  0x1
+#define RTC_CNTL_BIAS_BUF_MONITOR_S  13
+/* RTC_CNTL_BIAS_BUF_DEEP_SLP : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_BIAS_BUF_DEEP_SLP    (BIT(12))
+#define RTC_CNTL_BIAS_BUF_DEEP_SLP_M  (BIT(12))
+#define RTC_CNTL_BIAS_BUF_DEEP_SLP_V  0x1
+#define RTC_CNTL_BIAS_BUF_DEEP_SLP_S  12
+/* RTC_CNTL_BIAS_BUF_WAKE : R/W ;bitpos:[11] ;default: 1'b1 ; */
+/*description: .*/
+#define RTC_CNTL_BIAS_BUF_WAKE    (BIT(11))
+#define RTC_CNTL_BIAS_BUF_WAKE_M  (BIT(11))
+#define RTC_CNTL_BIAS_BUF_WAKE_V  0x1
+#define RTC_CNTL_BIAS_BUF_WAKE_S  11
+/* RTC_CNTL_BIAS_BUF_IDLE : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_BIAS_BUF_IDLE    (BIT(10))
+#define RTC_CNTL_BIAS_BUF_IDLE_M  (BIT(10))
+#define RTC_CNTL_BIAS_BUF_IDLE_V  0x1
+#define RTC_CNTL_BIAS_BUF_IDLE_S  10
+
+#define RTC_CNTL_REG          (DR_REG_RTCCNTL_BASE + 0x84)
+/* RTC_CNTL_REGULATOR_FORCE_PU : R/W ;bitpos:[31] ;default: 1'd1 ; */
+/*description: .*/
+#define RTC_CNTL_REGULATOR_FORCE_PU    (BIT(31))
+#define RTC_CNTL_REGULATOR_FORCE_PU_M  (BIT(31))
+#define RTC_CNTL_REGULATOR_FORCE_PU_V  0x1
+#define RTC_CNTL_REGULATOR_FORCE_PU_S  31
+/* RTC_CNTL_REGULATOR_FORCE_PD : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: RTC_REG force power down (for RTC_REG power down means decrease the voltage to 0
+.8v or lower ).*/
+#define RTC_CNTL_REGULATOR_FORCE_PD    (BIT(30))
+#define RTC_CNTL_REGULATOR_FORCE_PD_M  (BIT(30))
+#define RTC_CNTL_REGULATOR_FORCE_PD_V  0x1
+#define RTC_CNTL_REGULATOR_FORCE_PD_S  30
+/* RTC_CNTL_DBOOST_FORCE_PU : R/W ;bitpos:[29] ;default: 1'd1 ; */
+/*description: RTC_DBOOST force power up.*/
+#define RTC_CNTL_DBOOST_FORCE_PU    (BIT(29))
+#define RTC_CNTL_DBOOST_FORCE_PU_M  (BIT(29))
+#define RTC_CNTL_DBOOST_FORCE_PU_V  0x1
+#define RTC_CNTL_DBOOST_FORCE_PU_S  29
+/* RTC_CNTL_DBOOST_FORCE_PD : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RTC_DBOOST force power down.*/
+#define RTC_CNTL_DBOOST_FORCE_PD    (BIT(28))
+#define RTC_CNTL_DBOOST_FORCE_PD_M  (BIT(28))
+#define RTC_CNTL_DBOOST_FORCE_PD_V  0x1
+#define RTC_CNTL_DBOOST_FORCE_PD_S  28
+/* Approximate mapping of voltages to RTC_CNTL_DBIAS_WAK, RTC_CNTL_DBIAS_SLP,
+ * RTC_CNTL_DIG_DBIAS_WAK, RTC_CNTL_DIG_DBIAS_SLP values.
+ * Valid if RTC_CNTL_DBG_ATTEN is 0.
+ */
+#define RTC_CNTL_DIG_DBIAS_0V85  0
+#define RTC_CNTL_DIG_DBIAS_0V90  1
+#define RTC_CNTL_DIG_DBIAS_0V95  2
+#define RTC_CNTL_DIG_DBIAS_1V00  3
+#define RTC_CNTL_DIG_DBIAS_1V05  4
+#define RTC_CNTL_DIG_DBIAS_1V10  5
+#define RTC_CNTL_DIG_DBIAS_1V15  6
+#define RTC_CNTL_DIG_DBIAS_1V20  7
+
+
+/* RTC_CNTL_SCK_DCAP : R/W ;bitpos:[21:14] ;default: 8'd0 ; */
+/*description: SCK_DCAP.*/
+#define RTC_CNTL_SCK_DCAP    0x000000FF
+#define RTC_CNTL_SCK_DCAP_M  ((RTC_CNTL_SCK_DCAP_V)<<(RTC_CNTL_SCK_DCAP_S))
+#define RTC_CNTL_SCK_DCAP_V  0xFF
+#define RTC_CNTL_SCK_DCAP_S  14
+/* RTC_CNTL_DIG_CAL_EN : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_DIG_CAL_EN    (BIT(7))
+#define RTC_CNTL_DIG_CAL_EN_M  (BIT(7))
+#define RTC_CNTL_DIG_CAL_EN_V  0x1
+#define RTC_CNTL_DIG_CAL_EN_S  7
+
+#define RTC_CNTL_PWC_REG          (DR_REG_RTCCNTL_BASE + 0x88)
+/* RTC_CNTL_PAD_FORCE_HOLD : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: rtc pad force hold.*/
+#define RTC_CNTL_PAD_FORCE_HOLD    (BIT(21))
+#define RTC_CNTL_PAD_FORCE_HOLD_M  (BIT(21))
+#define RTC_CNTL_PAD_FORCE_HOLD_V  0x1
+#define RTC_CNTL_PAD_FORCE_HOLD_S  21
+/* RTC_CNTL_PD_EN : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: enable power down rtc_peri in sleep .*/
+#define RTC_CNTL_PD_EN    (BIT(20))
+#define RTC_CNTL_PD_EN_M  (BIT(20))
+#define RTC_CNTL_PD_EN_V  0x1
+#define RTC_CNTL_PD_EN_S  20
+/* RTC_CNTL_FORCE_PU : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: rtc_peri force power up.*/
+#define RTC_CNTL_FORCE_PU    (BIT(19))
+#define RTC_CNTL_FORCE_PU_M  (BIT(19))
+#define RTC_CNTL_FORCE_PU_V  0x1
+#define RTC_CNTL_FORCE_PU_S  19
+/* RTC_CNTL_FORCE_PD : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: rtc_peri force power down.*/
+#define RTC_CNTL_FORCE_PD    (BIT(18))
+#define RTC_CNTL_FORCE_PD_M  (BIT(18))
+#define RTC_CNTL_FORCE_PD_V  0x1
+#define RTC_CNTL_FORCE_PD_S  18
+/* RTC_CNTL_SLOWMEM_FORCE_LPU : R/W ;bitpos:[11] ;default: 1'b1 ; */
+/*description: RTC memory force no PD.*/
+#define RTC_CNTL_SLOWMEM_FORCE_LPU    (BIT(11))
+#define RTC_CNTL_SLOWMEM_FORCE_LPU_M  (BIT(11))
+#define RTC_CNTL_SLOWMEM_FORCE_LPU_V  0x1
+#define RTC_CNTL_SLOWMEM_FORCE_LPU_S  11
+/* RTC_CNTL_SLOWMEM_FORCE_LPD : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: RTC memory force PD.*/
+#define RTC_CNTL_SLOWMEM_FORCE_LPD    (BIT(10))
+#define RTC_CNTL_SLOWMEM_FORCE_LPD_M  (BIT(10))
+#define RTC_CNTL_SLOWMEM_FORCE_LPD_V  0x1
+#define RTC_CNTL_SLOWMEM_FORCE_LPD_S  10
+/* RTC_CNTL_SLOWMEM_FOLW_CPU : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: 1: RTC memory  PD following CPU.*/
+#define RTC_CNTL_SLOWMEM_FOLW_CPU    (BIT(9))
+#define RTC_CNTL_SLOWMEM_FOLW_CPU_M  (BIT(9))
+#define RTC_CNTL_SLOWMEM_FOLW_CPU_V  0x1
+#define RTC_CNTL_SLOWMEM_FOLW_CPU_S  9
+/* RTC_CNTL_FASTMEM_FORCE_LPU : R/W ;bitpos:[8] ;default: 1'b1 ; */
+/*description: Fast RTC memory force no PD.*/
+#define RTC_CNTL_FASTMEM_FORCE_LPU    (BIT(8))
+#define RTC_CNTL_FASTMEM_FORCE_LPU_M  (BIT(8))
+#define RTC_CNTL_FASTMEM_FORCE_LPU_V  0x1
+#define RTC_CNTL_FASTMEM_FORCE_LPU_S  8
+/* RTC_CNTL_FASTMEM_FORCE_LPD : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Fast RTC memory force PD.*/
+#define RTC_CNTL_FASTMEM_FORCE_LPD    (BIT(7))
+#define RTC_CNTL_FASTMEM_FORCE_LPD_M  (BIT(7))
+#define RTC_CNTL_FASTMEM_FORCE_LPD_V  0x1
+#define RTC_CNTL_FASTMEM_FORCE_LPD_S  7
+/* RTC_CNTL_FASTMEM_FOLW_CPU : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: 1: Fast RTC memory PD following CPU.*/
+#define RTC_CNTL_FASTMEM_FOLW_CPU    (BIT(6))
+#define RTC_CNTL_FASTMEM_FOLW_CPU_M  (BIT(6))
+#define RTC_CNTL_FASTMEM_FOLW_CPU_V  0x1
+#define RTC_CNTL_FASTMEM_FOLW_CPU_S  6
+/* RTC_CNTL_FORCE_NOISO : R/W ;bitpos:[5] ;default: 1'd1 ; */
+/*description: rtc_peri force no ISO.*/
+#define RTC_CNTL_FORCE_NOISO    (BIT(5))
+#define RTC_CNTL_FORCE_NOISO_M  (BIT(5))
+#define RTC_CNTL_FORCE_NOISO_V  0x1
+#define RTC_CNTL_FORCE_NOISO_S  5
+/* RTC_CNTL_FORCE_ISO : R/W ;bitpos:[4] ;default: 1'd0 ; */
+/*description: rtc_peri force ISO.*/
+#define RTC_CNTL_FORCE_ISO    (BIT(4))
+#define RTC_CNTL_FORCE_ISO_M  (BIT(4))
+#define RTC_CNTL_FORCE_ISO_V  0x1
+#define RTC_CNTL_FORCE_ISO_S  4
+/* RTC_CNTL_SLOWMEM_FORCE_ISO : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: RTC memory force ISO.*/
+#define RTC_CNTL_SLOWMEM_FORCE_ISO    (BIT(3))
+#define RTC_CNTL_SLOWMEM_FORCE_ISO_M  (BIT(3))
+#define RTC_CNTL_SLOWMEM_FORCE_ISO_V  0x1
+#define RTC_CNTL_SLOWMEM_FORCE_ISO_S  3
+/* RTC_CNTL_SLOWMEM_FORCE_NOISO : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: RTC memory force no ISO.*/
+#define RTC_CNTL_SLOWMEM_FORCE_NOISO    (BIT(2))
+#define RTC_CNTL_SLOWMEM_FORCE_NOISO_M  (BIT(2))
+#define RTC_CNTL_SLOWMEM_FORCE_NOISO_V  0x1
+#define RTC_CNTL_SLOWMEM_FORCE_NOISO_S  2
+/* RTC_CNTL_FASTMEM_FORCE_ISO : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Fast RTC memory force ISO.*/
+#define RTC_CNTL_FASTMEM_FORCE_ISO    (BIT(1))
+#define RTC_CNTL_FASTMEM_FORCE_ISO_M  (BIT(1))
+#define RTC_CNTL_FASTMEM_FORCE_ISO_V  0x1
+#define RTC_CNTL_FASTMEM_FORCE_ISO_S  1
+/* RTC_CNTL_FASTMEM_FORCE_NOISO : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: Fast RTC memory force no ISO.*/
+#define RTC_CNTL_FASTMEM_FORCE_NOISO    (BIT(0))
+#define RTC_CNTL_FASTMEM_FORCE_NOISO_M  (BIT(0))
+#define RTC_CNTL_FASTMEM_FORCE_NOISO_V  0x1
+#define RTC_CNTL_FASTMEM_FORCE_NOISO_S  0
+
+#define RTC_CNTL_REGULATOR_DRV_CTRL_REG          (DR_REG_RTCCNTL_BASE + 0x8C)
+/* RTC_CNTL_DG_VDD_DRV_B_MONITOR : R/W ;bitpos:[27:20] ;default: 8'h0 ; */
+/*description: .*/
+#define RTC_CNTL_DG_VDD_DRV_B_MONITOR    0x000000FF
+#define RTC_CNTL_DG_VDD_DRV_B_MONITOR_M  ((RTC_CNTL_DG_VDD_DRV_B_MONITOR_V)<<(RTC_CNTL_DG_VDD_DRV_B_MONITOR_S))
+#define RTC_CNTL_DG_VDD_DRV_B_MONITOR_V  0xFF
+#define RTC_CNTL_DG_VDD_DRV_B_MONITOR_S  20
+/* RTC_CNTL_DG_VDD_DRV_B_SLP : R/W ;bitpos:[19:12] ;default: 8'h0 ; */
+/*description: .*/
+#define RTC_CNTL_DG_VDD_DRV_B_SLP    0x000000FF
+#define RTC_CNTL_DG_VDD_DRV_B_SLP_M  ((RTC_CNTL_DG_VDD_DRV_B_SLP_V)<<(RTC_CNTL_DG_VDD_DRV_B_SLP_S))
+#define RTC_CNTL_DG_VDD_DRV_B_SLP_V  0xFF
+#define RTC_CNTL_DG_VDD_DRV_B_SLP_S  12
+/* RTC_CNTL_REGULATOR_DRV_B_SLP : R/W ;bitpos:[11:6] ;default: 6'b0 ; */
+/*description: .*/
+#define RTC_CNTL_REGULATOR_DRV_B_SLP    0x0000003F
+#define RTC_CNTL_REGULATOR_DRV_B_SLP_M  ((RTC_CNTL_REGULATOR_DRV_B_SLP_V)<<(RTC_CNTL_REGULATOR_DRV_B_SLP_S))
+#define RTC_CNTL_REGULATOR_DRV_B_SLP_V  0x3F
+#define RTC_CNTL_REGULATOR_DRV_B_SLP_S  6
+/* RTC_CNTL_REGULATOR_DRV_B_MONITOR : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/*description: .*/
+#define RTC_CNTL_REGULATOR_DRV_B_MONITOR    0x0000003F
+#define RTC_CNTL_REGULATOR_DRV_B_MONITOR_M  ((RTC_CNTL_REGULATOR_DRV_B_MONITOR_V)<<(RTC_CNTL_REGULATOR_DRV_B_MONITOR_S))
+#define RTC_CNTL_REGULATOR_DRV_B_MONITOR_V  0x3F
+#define RTC_CNTL_REGULATOR_DRV_B_MONITOR_S  0
+
+#define RTC_CNTL_DIG_PWC_REG          (DR_REG_RTCCNTL_BASE + 0x90)
+/* RTC_CNTL_DG_WRAP_PD_EN : R/W ;bitpos:[31] ;default: 0 ; */
+/*description: .*/
+#define RTC_CNTL_DG_WRAP_PD_EN    (BIT(31))
+#define RTC_CNTL_DG_WRAP_PD_EN_M  (BIT(31))
+#define RTC_CNTL_DG_WRAP_PD_EN_V  0x1
+#define RTC_CNTL_DG_WRAP_PD_EN_S  31
+/* RTC_CNTL_WIFI_PD_EN : R/W ;bitpos:[30] ;default: 0 ; */
+/*description: enable power down wifi in sleep.*/
+#define RTC_CNTL_WIFI_PD_EN    (BIT(30))
+#define RTC_CNTL_WIFI_PD_EN_M  (BIT(30))
+#define RTC_CNTL_WIFI_PD_EN_V  0x1
+#define RTC_CNTL_WIFI_PD_EN_S  30
+/* RTC_CNTL_CPU_TOP_PD_EN : R/W ;bitpos:[29] ;default: 0 ; */
+/*description: enable power down internal SRAM 4 in sleep.*/
+#define RTC_CNTL_CPU_TOP_PD_EN    (BIT(29))
+#define RTC_CNTL_CPU_TOP_PD_EN_M  (BIT(29))
+#define RTC_CNTL_CPU_TOP_PD_EN_V  0x1
+#define RTC_CNTL_CPU_TOP_PD_EN_S  29
+/* RTC_CNTL_DG_PERI_PD_EN : R/W ;bitpos:[28] ;default: 0 ; */
+/*description: enable power down internal SRAM 3 in sleep.*/
+#define RTC_CNTL_DG_PERI_PD_EN    (BIT(28))
+#define RTC_CNTL_DG_PERI_PD_EN_M  (BIT(28))
+#define RTC_CNTL_DG_PERI_PD_EN_V  0x1
+#define RTC_CNTL_DG_PERI_PD_EN_S  28
+/* RTC_CNTL_BT_PD_EN : R/W ;bitpos:[27] ;default: 0 ; */
+/*description: enable power down internal SRAM 2 in sleep.*/
+#define RTC_CNTL_BT_PD_EN    (BIT(27))
+#define RTC_CNTL_BT_PD_EN_M  (BIT(27))
+#define RTC_CNTL_BT_PD_EN_V  0x1
+#define RTC_CNTL_BT_PD_EN_S  27
+/* RTC_CNTL_CPU_TOP_FORCE_PU : R/W ;bitpos:[22] ;default: 1'd1 ; */
+/*description: digital dcdc force power up.*/
+#define RTC_CNTL_CPU_TOP_FORCE_PU    (BIT(22))
+#define RTC_CNTL_CPU_TOP_FORCE_PU_M  (BIT(22))
+#define RTC_CNTL_CPU_TOP_FORCE_PU_V  0x1
+#define RTC_CNTL_CPU_TOP_FORCE_PU_S  22
+/* RTC_CNTL_CPU_TOP_FORCE_PD : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: digital dcdc force power down.*/
+#define RTC_CNTL_CPU_TOP_FORCE_PD    (BIT(21))
+#define RTC_CNTL_CPU_TOP_FORCE_PD_M  (BIT(21))
+#define RTC_CNTL_CPU_TOP_FORCE_PD_V  0x1
+#define RTC_CNTL_CPU_TOP_FORCE_PD_S  21
+/* RTC_CNTL_DG_WRAP_FORCE_PU : R/W ;bitpos:[20] ;default: 1'd1 ; */
+/*description: digital core force power up.*/
+#define RTC_CNTL_DG_WRAP_FORCE_PU    (BIT(20))
+#define RTC_CNTL_DG_WRAP_FORCE_PU_M  (BIT(20))
+#define RTC_CNTL_DG_WRAP_FORCE_PU_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_PU_S  20
+/* RTC_CNTL_DG_WRAP_FORCE_PD : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: digital core force power down.*/
+#define RTC_CNTL_DG_WRAP_FORCE_PD    (BIT(19))
+#define RTC_CNTL_DG_WRAP_FORCE_PD_M  (BIT(19))
+#define RTC_CNTL_DG_WRAP_FORCE_PD_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_PD_S  19
+/* RTC_CNTL_WIFI_FORCE_PU : R/W ;bitpos:[18] ;default: 1'd1 ; */
+/*description: wifi force power up.*/
+#define RTC_CNTL_WIFI_FORCE_PU    (BIT(18))
+#define RTC_CNTL_WIFI_FORCE_PU_M  (BIT(18))
+#define RTC_CNTL_WIFI_FORCE_PU_V  0x1
+#define RTC_CNTL_WIFI_FORCE_PU_S  18
+/* RTC_CNTL_WIFI_FORCE_PD : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: wifi force power down.*/
+#define RTC_CNTL_WIFI_FORCE_PD    (BIT(17))
+#define RTC_CNTL_WIFI_FORCE_PD_M  (BIT(17))
+#define RTC_CNTL_WIFI_FORCE_PD_V  0x1
+#define RTC_CNTL_WIFI_FORCE_PD_S  17
+/* RTC_CNTL_DG_PERI_FORCE_PU : R/W ;bitpos:[14] ;default: 1'd1 ; */
+/*description: internal SRAM 3 force power up.*/
+#define RTC_CNTL_DG_PERI_FORCE_PU    (BIT(14))
+#define RTC_CNTL_DG_PERI_FORCE_PU_M  (BIT(14))
+#define RTC_CNTL_DG_PERI_FORCE_PU_V  0x1
+#define RTC_CNTL_DG_PERI_FORCE_PU_S  14
+/* RTC_CNTL_DG_PERI_FORCE_PD : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: internal SRAM 3 force power down.*/
+#define RTC_CNTL_DG_PERI_FORCE_PD    (BIT(13))
+#define RTC_CNTL_DG_PERI_FORCE_PD_M  (BIT(13))
+#define RTC_CNTL_DG_PERI_FORCE_PD_V  0x1
+#define RTC_CNTL_DG_PERI_FORCE_PD_S  13
+/* RTC_CNTL_BT_FORCE_PU : R/W ;bitpos:[12] ;default: 1'd1 ; */
+/*description: internal SRAM 2 force power up.*/
+#define RTC_CNTL_BT_FORCE_PU    (BIT(12))
+#define RTC_CNTL_BT_FORCE_PU_M  (BIT(12))
+#define RTC_CNTL_BT_FORCE_PU_V  0x1
+#define RTC_CNTL_BT_FORCE_PU_S  12
+/* RTC_CNTL_BT_FORCE_PD : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: internal SRAM 2 force power down.*/
+#define RTC_CNTL_BT_FORCE_PD    (BIT(11))
+#define RTC_CNTL_BT_FORCE_PD_M  (BIT(11))
+#define RTC_CNTL_BT_FORCE_PD_V  0x1
+#define RTC_CNTL_BT_FORCE_PD_S  11
+/* RTC_CNTL_LSLP_MEM_FORCE_PU : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: memories in digital core force no PD in sleep.*/
+#define RTC_CNTL_LSLP_MEM_FORCE_PU    (BIT(4))
+#define RTC_CNTL_LSLP_MEM_FORCE_PU_M  (BIT(4))
+#define RTC_CNTL_LSLP_MEM_FORCE_PU_V  0x1
+#define RTC_CNTL_LSLP_MEM_FORCE_PU_S  4
+/* RTC_CNTL_LSLP_MEM_FORCE_PD : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: memories in digital core force PD in sleep.*/
+#define RTC_CNTL_LSLP_MEM_FORCE_PD    (BIT(3))
+#define RTC_CNTL_LSLP_MEM_FORCE_PD_M  (BIT(3))
+#define RTC_CNTL_LSLP_MEM_FORCE_PD_V  0x1
+#define RTC_CNTL_LSLP_MEM_FORCE_PD_S  3
+
+#define RTC_CNTL_DIG_ISO_REG          (DR_REG_RTCCNTL_BASE + 0x94)
+/* RTC_CNTL_DG_WRAP_FORCE_NOISO : R/W ;bitpos:[31] ;default: 1'd1 ; */
+/*description: .*/
+#define RTC_CNTL_DG_WRAP_FORCE_NOISO    (BIT(31))
+#define RTC_CNTL_DG_WRAP_FORCE_NOISO_M  (BIT(31))
+#define RTC_CNTL_DG_WRAP_FORCE_NOISO_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_NOISO_S  31
+/* RTC_CNTL_DG_WRAP_FORCE_ISO : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: digital core force ISO.*/
+#define RTC_CNTL_DG_WRAP_FORCE_ISO    (BIT(30))
+#define RTC_CNTL_DG_WRAP_FORCE_ISO_M  (BIT(30))
+#define RTC_CNTL_DG_WRAP_FORCE_ISO_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_ISO_S  30
+/* RTC_CNTL_WIFI_FORCE_NOISO : R/W ;bitpos:[29] ;default: 1'd1 ; */
+/*description: wifi force no ISO.*/
+#define RTC_CNTL_WIFI_FORCE_NOISO    (BIT(29))
+#define RTC_CNTL_WIFI_FORCE_NOISO_M  (BIT(29))
+#define RTC_CNTL_WIFI_FORCE_NOISO_V  0x1
+#define RTC_CNTL_WIFI_FORCE_NOISO_S  29
+/* RTC_CNTL_WIFI_FORCE_ISO : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: wifi force ISO.*/
+#define RTC_CNTL_WIFI_FORCE_ISO    (BIT(28))
+#define RTC_CNTL_WIFI_FORCE_ISO_M  (BIT(28))
+#define RTC_CNTL_WIFI_FORCE_ISO_V  0x1
+#define RTC_CNTL_WIFI_FORCE_ISO_S  28
+/* RTC_CNTL_CPU_TOP_FORCE_NOISO : R/W ;bitpos:[27] ;default: 1'd1 ; */
+/*description: internal SRAM 4 force no ISO.*/
+#define RTC_CNTL_CPU_TOP_FORCE_NOISO    (BIT(27))
+#define RTC_CNTL_CPU_TOP_FORCE_NOISO_M  (BIT(27))
+#define RTC_CNTL_CPU_TOP_FORCE_NOISO_V  0x1
+#define RTC_CNTL_CPU_TOP_FORCE_NOISO_S  27
+/* RTC_CNTL_CPU_TOP_FORCE_ISO : R/W ;bitpos:[26] ;default: 1'd0 ; */
+/*description: internal SRAM 4 force ISO.*/
+#define RTC_CNTL_CPU_TOP_FORCE_ISO    (BIT(26))
+#define RTC_CNTL_CPU_TOP_FORCE_ISO_M  (BIT(26))
+#define RTC_CNTL_CPU_TOP_FORCE_ISO_V  0x1
+#define RTC_CNTL_CPU_TOP_FORCE_ISO_S  26
+/* RTC_CNTL_DG_PERI_FORCE_NOISO : R/W ;bitpos:[25] ;default: 1'd1 ; */
+/*description: internal SRAM 3 force no ISO.*/
+#define RTC_CNTL_DG_PERI_FORCE_NOISO    (BIT(25))
+#define RTC_CNTL_DG_PERI_FORCE_NOISO_M  (BIT(25))
+#define RTC_CNTL_DG_PERI_FORCE_NOISO_V  0x1
+#define RTC_CNTL_DG_PERI_FORCE_NOISO_S  25
+/* RTC_CNTL_DG_PERI_FORCE_ISO : R/W ;bitpos:[24] ;default: 1'd0 ; */
+/*description: internal SRAM 3 force ISO.*/
+#define RTC_CNTL_DG_PERI_FORCE_ISO    (BIT(24))
+#define RTC_CNTL_DG_PERI_FORCE_ISO_M  (BIT(24))
+#define RTC_CNTL_DG_PERI_FORCE_ISO_V  0x1
+#define RTC_CNTL_DG_PERI_FORCE_ISO_S  24
+/* RTC_CNTL_BT_FORCE_NOISO : R/W ;bitpos:[23] ;default: 1'd1 ; */
+/*description: internal SRAM 2 force no ISO.*/
+#define RTC_CNTL_BT_FORCE_NOISO    (BIT(23))
+#define RTC_CNTL_BT_FORCE_NOISO_M  (BIT(23))
+#define RTC_CNTL_BT_FORCE_NOISO_V  0x1
+#define RTC_CNTL_BT_FORCE_NOISO_S  23
+/* RTC_CNTL_BT_FORCE_ISO : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: internal SRAM 2 force ISO.*/
+#define RTC_CNTL_BT_FORCE_ISO    (BIT(22))
+#define RTC_CNTL_BT_FORCE_ISO_M  (BIT(22))
+#define RTC_CNTL_BT_FORCE_ISO_V  0x1
+#define RTC_CNTL_BT_FORCE_ISO_S  22
+/* RTC_CNTL_DG_PAD_FORCE_HOLD : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: digital pad force hold.*/
+#define RTC_CNTL_DG_PAD_FORCE_HOLD    (BIT(15))
+#define RTC_CNTL_DG_PAD_FORCE_HOLD_M  (BIT(15))
+#define RTC_CNTL_DG_PAD_FORCE_HOLD_V  0x1
+#define RTC_CNTL_DG_PAD_FORCE_HOLD_S  15
+/* RTC_CNTL_DG_PAD_FORCE_UNHOLD : R/W ;bitpos:[14] ;default: 1'd1 ; */
+/*description: digital pad force un-hold.*/
+#define RTC_CNTL_DG_PAD_FORCE_UNHOLD    (BIT(14))
+#define RTC_CNTL_DG_PAD_FORCE_UNHOLD_M  (BIT(14))
+#define RTC_CNTL_DG_PAD_FORCE_UNHOLD_V  0x1
+#define RTC_CNTL_DG_PAD_FORCE_UNHOLD_S  14
+/* RTC_CNTL_DG_PAD_FORCE_ISO : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: digital pad force ISO.*/
+#define RTC_CNTL_DG_PAD_FORCE_ISO    (BIT(13))
+#define RTC_CNTL_DG_PAD_FORCE_ISO_M  (BIT(13))
+#define RTC_CNTL_DG_PAD_FORCE_ISO_V  0x1
+#define RTC_CNTL_DG_PAD_FORCE_ISO_S  13
+/* RTC_CNTL_DG_PAD_FORCE_NOISO : R/W ;bitpos:[12] ;default: 1'd1 ; */
+/*description: digital pad force no ISO.*/
+#define RTC_CNTL_DG_PAD_FORCE_NOISO    (BIT(12))
+#define RTC_CNTL_DG_PAD_FORCE_NOISO_M  (BIT(12))
+#define RTC_CNTL_DG_PAD_FORCE_NOISO_V  0x1
+#define RTC_CNTL_DG_PAD_FORCE_NOISO_S  12
+/* RTC_CNTL_DG_PAD_AUTOHOLD_EN : R/W ;bitpos:[11] ;default: 1'd0 ; */
+/*description: digital pad enable auto-hold.*/
+#define RTC_CNTL_DG_PAD_AUTOHOLD_EN    (BIT(11))
+#define RTC_CNTL_DG_PAD_AUTOHOLD_EN_M  (BIT(11))
+#define RTC_CNTL_DG_PAD_AUTOHOLD_EN_V  0x1
+#define RTC_CNTL_DG_PAD_AUTOHOLD_EN_S  11
+/* RTC_CNTL_CLR_DG_PAD_AUTOHOLD : WO ;bitpos:[10] ;default: 1'd0 ; */
+/*description: wtite only register to clear digital pad auto-hold.*/
+#define RTC_CNTL_CLR_DG_PAD_AUTOHOLD    (BIT(10))
+#define RTC_CNTL_CLR_DG_PAD_AUTOHOLD_M  (BIT(10))
+#define RTC_CNTL_CLR_DG_PAD_AUTOHOLD_V  0x1
+#define RTC_CNTL_CLR_DG_PAD_AUTOHOLD_S  10
+/* RTC_CNTL_DG_PAD_AUTOHOLD : RO ;bitpos:[9] ;default: 1'd0 ; */
+/*description: read only register to indicate digital pad auto-hold status.*/
+#define RTC_CNTL_DG_PAD_AUTOHOLD    (BIT(9))
+#define RTC_CNTL_DG_PAD_AUTOHOLD_M  (BIT(9))
+#define RTC_CNTL_DG_PAD_AUTOHOLD_V  0x1
+#define RTC_CNTL_DG_PAD_AUTOHOLD_S  9
+/* RTC_CNTL_DIG_ISO_FORCE_ON : R/W ;bitpos:[8] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_DIG_ISO_FORCE_ON    (BIT(8))
+#define RTC_CNTL_DIG_ISO_FORCE_ON_M  (BIT(8))
+#define RTC_CNTL_DIG_ISO_FORCE_ON_V  0x1
+#define RTC_CNTL_DIG_ISO_FORCE_ON_S  8
+/* RTC_CNTL_DIG_ISO_FORCE_OFF : R/W ;bitpos:[7] ;default: 1'd1 ; */
+/*description: .*/
+#define RTC_CNTL_DIG_ISO_FORCE_OFF    (BIT(7))
+#define RTC_CNTL_DIG_ISO_FORCE_OFF_M  (BIT(7))
+#define RTC_CNTL_DIG_ISO_FORCE_OFF_V  0x1
+#define RTC_CNTL_DIG_ISO_FORCE_OFF_S  7
+
+#define RTC_CNTL_WDTCONFIG0_REG          (DR_REG_RTCCNTL_BASE + 0x98)
+/* RTC_CNTL_WDT_EN : R/W ;bitpos:[31] ;default: 1'h0 ; */
+/*description: .*/
+#define RTC_CNTL_WDT_EN    (BIT(31))
+#define RTC_CNTL_WDT_EN_M  (BIT(31))
+#define RTC_CNTL_WDT_EN_V  0x1
+#define RTC_CNTL_WDT_EN_S  31
+/* RTC_CNTL_WDT_STG0 : R/W ;bitpos:[30:28] ;default: 3'h0 ; */
+/*description: 1: interrupt stage en.*/
+#define RTC_CNTL_WDT_STG0    0x00000007
+#define RTC_CNTL_WDT_STG0_M  ((RTC_CNTL_WDT_STG0_V)<<(RTC_CNTL_WDT_STG0_S))
+#define RTC_CNTL_WDT_STG0_V  0x7
+#define RTC_CNTL_WDT_STG0_S  28
+/* RTC_CNTL_WDT_STG1 : R/W ;bitpos:[27:25] ;default: 3'h0 ; */
+/*description: 1: interrupt stage en.*/
+#define RTC_CNTL_WDT_STG1    0x00000007
+#define RTC_CNTL_WDT_STG1_M  ((RTC_CNTL_WDT_STG1_V)<<(RTC_CNTL_WDT_STG1_S))
+#define RTC_CNTL_WDT_STG1_V  0x7
+#define RTC_CNTL_WDT_STG1_S  25
+/* RTC_CNTL_WDT_STG2 : R/W ;bitpos:[24:22] ;default: 3'h0 ; */
+/*description: 1: interrupt stage en.*/
+#define RTC_CNTL_WDT_STG2    0x00000007
+#define RTC_CNTL_WDT_STG2_M  ((RTC_CNTL_WDT_STG2_V)<<(RTC_CNTL_WDT_STG2_S))
+#define RTC_CNTL_WDT_STG2_V  0x7
+#define RTC_CNTL_WDT_STG2_S  22
+/* RTC_CNTL_WDT_STG3 : R/W ;bitpos:[21:19] ;default: 3'h0 ; */
+/*description: 1: interrupt stage en.*/
+#define RTC_CNTL_WDT_STG3    0x00000007
+#define RTC_CNTL_WDT_STG3_M  ((RTC_CNTL_WDT_STG3_V)<<(RTC_CNTL_WDT_STG3_S))
+#define RTC_CNTL_WDT_STG3_V  0x7
+#define RTC_CNTL_WDT_STG3_S  19
+
+/* RTC_CNTL_WDT_CPU_RESET_LENGTH : R/W ;bitpos:[18:16] ;default: 3'h1 ; */
+/*description: CPU reset counter length.*/
+#define RTC_CNTL_WDT_CPU_RESET_LENGTH    0x00000007
+#define RTC_CNTL_WDT_CPU_RESET_LENGTH_M  ((RTC_CNTL_WDT_CPU_RESET_LENGTH_V)<<(RTC_CNTL_WDT_CPU_RESET_LENGTH_S))
+#define RTC_CNTL_WDT_CPU_RESET_LENGTH_V  0x7
+#define RTC_CNTL_WDT_CPU_RESET_LENGTH_S  16
+/* RTC_CNTL_WDT_SYS_RESET_LENGTH : R/W ;bitpos:[15:13] ;default: 3'h1 ; */
+/*description: system reset counter length.*/
+#define RTC_CNTL_WDT_SYS_RESET_LENGTH    0x00000007
+#define RTC_CNTL_WDT_SYS_RESET_LENGTH_M  ((RTC_CNTL_WDT_SYS_RESET_LENGTH_V)<<(RTC_CNTL_WDT_SYS_RESET_LENGTH_S))
+#define RTC_CNTL_WDT_SYS_RESET_LENGTH_V  0x7
+#define RTC_CNTL_WDT_SYS_RESET_LENGTH_S  13
+/* RTC_CNTL_WDT_FLASHBOOT_MOD_EN : R/W ;bitpos:[12] ;default: 1'h1 ; */
+/*description: enable WDT in flash boot.*/
+#define RTC_CNTL_WDT_FLASHBOOT_MOD_EN    (BIT(12))
+#define RTC_CNTL_WDT_FLASHBOOT_MOD_EN_M  (BIT(12))
+#define RTC_CNTL_WDT_FLASHBOOT_MOD_EN_V  0x1
+#define RTC_CNTL_WDT_FLASHBOOT_MOD_EN_S  12
+/* RTC_CNTL_WDT_PROCPU_RESET_EN : R/W ;bitpos:[11] ;default: 1'd0 ; */
+/*description: enable WDT reset PRO CPU.*/
+#define RTC_CNTL_WDT_PROCPU_RESET_EN    (BIT(11))
+#define RTC_CNTL_WDT_PROCPU_RESET_EN_M  (BIT(11))
+#define RTC_CNTL_WDT_PROCPU_RESET_EN_V  0x1
+#define RTC_CNTL_WDT_PROCPU_RESET_EN_S  11
+/* RTC_CNTL_WDT_APPCPU_RESET_EN : R/W ;bitpos:[10] ;default: 1'd0 ; */
+/*description: enable WDT reset APP CPU.*/
+#define RTC_CNTL_WDT_APPCPU_RESET_EN    (BIT(10))
+#define RTC_CNTL_WDT_APPCPU_RESET_EN_M  (BIT(10))
+#define RTC_CNTL_WDT_APPCPU_RESET_EN_V  0x1
+#define RTC_CNTL_WDT_APPCPU_RESET_EN_S  10
+/* RTC_CNTL_WDT_PAUSE_IN_SLP : R/W ;bitpos:[9] ;default: 1'd1 ; */
+/*description: pause WDT in sleep.*/
+#define RTC_CNTL_WDT_PAUSE_IN_SLP    (BIT(9))
+#define RTC_CNTL_WDT_PAUSE_IN_SLP_M  (BIT(9))
+#define RTC_CNTL_WDT_PAUSE_IN_SLP_V  0x1
+#define RTC_CNTL_WDT_PAUSE_IN_SLP_S  9
+/* RTC_CNTL_WDT_CHIP_RESET_EN : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: wdt reset whole chip enable.*/
+#define RTC_CNTL_WDT_CHIP_RESET_EN    (BIT(8))
+#define RTC_CNTL_WDT_CHIP_RESET_EN_M  (BIT(8))
+#define RTC_CNTL_WDT_CHIP_RESET_EN_V  0x1
+#define RTC_CNTL_WDT_CHIP_RESET_EN_S  8
+/* RTC_CNTL_WDT_CHIP_RESET_WIDTH : R/W ;bitpos:[7:0] ;default: 8'd20 ; */
+/*description: chip reset siginal pulse width.*/
+#define RTC_CNTL_WDT_CHIP_RESET_WIDTH    0x000000FF
+#define RTC_CNTL_WDT_CHIP_RESET_WIDTH_M  ((RTC_CNTL_WDT_CHIP_RESET_WIDTH_V)<<(RTC_CNTL_WDT_CHIP_RESET_WIDTH_S))
+#define RTC_CNTL_WDT_CHIP_RESET_WIDTH_V  0xFF
+#define RTC_CNTL_WDT_CHIP_RESET_WIDTH_S  0
+
+#define RTC_CNTL_WDTCONFIG1_REG          (DR_REG_RTCCNTL_BASE + 0x9C)
+/* RTC_CNTL_WDT_STG0_HOLD : R/W ;bitpos:[31:0] ;default: 32'd200000 ; */
+/*description: .*/
+#define RTC_CNTL_WDT_STG0_HOLD    0xFFFFFFFF
+#define RTC_CNTL_WDT_STG0_HOLD_M  ((RTC_CNTL_WDT_STG0_HOLD_V)<<(RTC_CNTL_WDT_STG0_HOLD_S))
+#define RTC_CNTL_WDT_STG0_HOLD_V  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG0_HOLD_S  0
+
+#define RTC_CNTL_WDTCONFIG2_REG          (DR_REG_RTCCNTL_BASE + 0xA0)
+/* RTC_CNTL_WDT_STG1_HOLD : R/W ;bitpos:[31:0] ;default: 32'd80000 ; */
+/*description: .*/
+#define RTC_CNTL_WDT_STG1_HOLD    0xFFFFFFFF
+#define RTC_CNTL_WDT_STG1_HOLD_M  ((RTC_CNTL_WDT_STG1_HOLD_V)<<(RTC_CNTL_WDT_STG1_HOLD_S))
+#define RTC_CNTL_WDT_STG1_HOLD_V  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG1_HOLD_S  0
+
+#define RTC_CNTL_WDTCONFIG3_REG          (DR_REG_RTCCNTL_BASE + 0xA4)
+/* RTC_CNTL_WDT_STG2_HOLD : R/W ;bitpos:[31:0] ;default: 32'hfff ; */
+/*description: .*/
+#define RTC_CNTL_WDT_STG2_HOLD    0xFFFFFFFF
+#define RTC_CNTL_WDT_STG2_HOLD_M  ((RTC_CNTL_WDT_STG2_HOLD_V)<<(RTC_CNTL_WDT_STG2_HOLD_S))
+#define RTC_CNTL_WDT_STG2_HOLD_V  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG2_HOLD_S  0
+
+#define RTC_CNTL_WDTCONFIG4_REG          (DR_REG_RTCCNTL_BASE + 0xA8)
+/* RTC_CNTL_WDT_STG3_HOLD : R/W ;bitpos:[31:0] ;default: 32'hfff ; */
+/*description: .*/
+#define RTC_CNTL_WDT_STG3_HOLD    0xFFFFFFFF
+#define RTC_CNTL_WDT_STG3_HOLD_M  ((RTC_CNTL_WDT_STG3_HOLD_V)<<(RTC_CNTL_WDT_STG3_HOLD_S))
+#define RTC_CNTL_WDT_STG3_HOLD_V  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG3_HOLD_S  0
+
+#define RTC_CNTL_WDTFEED_REG          (DR_REG_RTCCNTL_BASE + 0xAC)
+/* RTC_CNTL_WDT_FEED : WO ;bitpos:[31] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_WDT_FEED    (BIT(31))
+#define RTC_CNTL_WDT_FEED_M  (BIT(31))
+#define RTC_CNTL_WDT_FEED_V  0x1
+#define RTC_CNTL_WDT_FEED_S  31
+
+#define RTC_CNTL_WDTWPROTECT_REG          (DR_REG_RTCCNTL_BASE + 0xB0)
+/* RTC_CNTL_WDT_WKEY : R/W ;bitpos:[31:0] ;default: 32'h50d83aa1 ; */
+/*description: .*/
+#define RTC_CNTL_WDT_WKEY    0xFFFFFFFF
+#define RTC_CNTL_WDT_WKEY_M  ((RTC_CNTL_WDT_WKEY_V)<<(RTC_CNTL_WDT_WKEY_S))
+#define RTC_CNTL_WDT_WKEY_V  0xFFFFFFFF
+#define RTC_CNTL_WDT_WKEY_S  0
+
+#define RTC_CNTL_SWD_CONF_REG          (DR_REG_RTCCNTL_BASE + 0xB4)
+/* RTC_CNTL_SWD_AUTO_FEED_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: automatically feed swd when int comes.*/
+#define RTC_CNTL_SWD_AUTO_FEED_EN    (BIT(31))
+#define RTC_CNTL_SWD_AUTO_FEED_EN_M  (BIT(31))
+#define RTC_CNTL_SWD_AUTO_FEED_EN_V  0x1
+#define RTC_CNTL_SWD_AUTO_FEED_EN_S  31
+/* RTC_CNTL_SWD_DISABLE : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: disabel SWD.*/
+#define RTC_CNTL_SWD_DISABLE    (BIT(30))
+#define RTC_CNTL_SWD_DISABLE_M  (BIT(30))
+#define RTC_CNTL_SWD_DISABLE_V  0x1
+#define RTC_CNTL_SWD_DISABLE_S  30
+/* RTC_CNTL_SWD_FEED : WO ;bitpos:[29] ;default: 1'b0 ; */
+/*description: Sw feed swd.*/
+#define RTC_CNTL_SWD_FEED    (BIT(29))
+#define RTC_CNTL_SWD_FEED_M  (BIT(29))
+#define RTC_CNTL_SWD_FEED_V  0x1
+#define RTC_CNTL_SWD_FEED_S  29
+/* RTC_CNTL_SWD_RST_FLAG_CLR : WO ;bitpos:[28] ;default: 1'b0 ; */
+/*description: reset swd reset flag.*/
+#define RTC_CNTL_SWD_RST_FLAG_CLR    (BIT(28))
+#define RTC_CNTL_SWD_RST_FLAG_CLR_M  (BIT(28))
+#define RTC_CNTL_SWD_RST_FLAG_CLR_V  0x1
+#define RTC_CNTL_SWD_RST_FLAG_CLR_S  28
+/* RTC_CNTL_SWD_SIGNAL_WIDTH : R/W ;bitpos:[27:18] ;default: 10'd300 ; */
+/*description: adjust signal width send to swd.*/
+#define RTC_CNTL_SWD_SIGNAL_WIDTH    0x000003FF
+#define RTC_CNTL_SWD_SIGNAL_WIDTH_M  ((RTC_CNTL_SWD_SIGNAL_WIDTH_V)<<(RTC_CNTL_SWD_SIGNAL_WIDTH_S))
+#define RTC_CNTL_SWD_SIGNAL_WIDTH_V  0x3FF
+#define RTC_CNTL_SWD_SIGNAL_WIDTH_S  18
+/* RTC_CNTL_SWD_BYPASS_RST : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_SWD_BYPASS_RST    (BIT(17))
+#define RTC_CNTL_SWD_BYPASS_RST_M  (BIT(17))
+#define RTC_CNTL_SWD_BYPASS_RST_V  0x1
+#define RTC_CNTL_SWD_BYPASS_RST_S  17
+/* RTC_CNTL_SWD_FEED_INT : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: swd interrupt for feeding.*/
+#define RTC_CNTL_SWD_FEED_INT    (BIT(1))
+#define RTC_CNTL_SWD_FEED_INT_M  (BIT(1))
+#define RTC_CNTL_SWD_FEED_INT_V  0x1
+#define RTC_CNTL_SWD_FEED_INT_S  1
+/* RTC_CNTL_SWD_RESET_FLAG : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: swd reset flag.*/
+#define RTC_CNTL_SWD_RESET_FLAG    (BIT(0))
+#define RTC_CNTL_SWD_RESET_FLAG_M  (BIT(0))
+#define RTC_CNTL_SWD_RESET_FLAG_V  0x1
+#define RTC_CNTL_SWD_RESET_FLAG_S  0
+
+#define RTC_CNTL_SWD_WPROTECT_REG          (DR_REG_RTCCNTL_BASE + 0xB8)
+/* RTC_CNTL_SWD_WKEY : R/W ;bitpos:[31:0] ;default: 32'h8f1d312a ; */
+/*description: .*/
+#define RTC_CNTL_SWD_WKEY    0xFFFFFFFF
+#define RTC_CNTL_SWD_WKEY_M  ((RTC_CNTL_SWD_WKEY_V)<<(RTC_CNTL_SWD_WKEY_S))
+#define RTC_CNTL_SWD_WKEY_V  0xFFFFFFFF
+#define RTC_CNTL_SWD_WKEY_S  0
+
+#define RTC_CNTL_SW_CPU_STALL_REG          (DR_REG_RTCCNTL_BASE + 0xBC)
+/* RTC_CNTL_SW_STALL_PROCPU_C1 : R/W ;bitpos:[31:26] ;default: 6'b0 ; */
+/*description: .*/
+#define RTC_CNTL_SW_STALL_PROCPU_C1    0x0000003F
+#define RTC_CNTL_SW_STALL_PROCPU_C1_M  ((RTC_CNTL_SW_STALL_PROCPU_C1_V)<<(RTC_CNTL_SW_STALL_PROCPU_C1_S))
+#define RTC_CNTL_SW_STALL_PROCPU_C1_V  0x3F
+#define RTC_CNTL_SW_STALL_PROCPU_C1_S  26
+/* RTC_CNTL_SW_STALL_APPCPU_C1 : R/W ;bitpos:[25:20] ;default: 6'b0 ; */
+/*description: {reg_sw_stall_appcpu_c1[5:0].*/
+#define RTC_CNTL_SW_STALL_APPCPU_C1    0x0000003F
+#define RTC_CNTL_SW_STALL_APPCPU_C1_M  ((RTC_CNTL_SW_STALL_APPCPU_C1_V)<<(RTC_CNTL_SW_STALL_APPCPU_C1_S))
+#define RTC_CNTL_SW_STALL_APPCPU_C1_V  0x3F
+#define RTC_CNTL_SW_STALL_APPCPU_C1_S  20
+
+#define RTC_CNTL_STORE4_REG          (DR_REG_RTCCNTL_BASE + 0xC0)
+/* RTC_CNTL_SCRATCH4 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: .*/
+#define RTC_CNTL_SCRATCH4    0xFFFFFFFF
+#define RTC_CNTL_SCRATCH4_M  ((RTC_CNTL_SCRATCH4_V)<<(RTC_CNTL_SCRATCH4_S))
+#define RTC_CNTL_SCRATCH4_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH4_S  0
+
+#define RTC_CNTL_STORE5_REG          (DR_REG_RTCCNTL_BASE + 0xC4)
+/* RTC_CNTL_SCRATCH5 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: .*/
+#define RTC_CNTL_SCRATCH5    0xFFFFFFFF
+#define RTC_CNTL_SCRATCH5_M  ((RTC_CNTL_SCRATCH5_V)<<(RTC_CNTL_SCRATCH5_S))
+#define RTC_CNTL_SCRATCH5_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH5_S  0
+
+#define RTC_CNTL_STORE6_REG          (DR_REG_RTCCNTL_BASE + 0xC8)
+/* RTC_CNTL_SCRATCH6 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: .*/
+#define RTC_CNTL_SCRATCH6    0xFFFFFFFF
+#define RTC_CNTL_SCRATCH6_M  ((RTC_CNTL_SCRATCH6_V)<<(RTC_CNTL_SCRATCH6_S))
+#define RTC_CNTL_SCRATCH6_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH6_S  0
+
+#define RTC_CNTL_STORE7_REG          (DR_REG_RTCCNTL_BASE + 0xCC)
+/* RTC_CNTL_SCRATCH7 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: .*/
+#define RTC_CNTL_SCRATCH7    0xFFFFFFFF
+#define RTC_CNTL_SCRATCH7_M  ((RTC_CNTL_SCRATCH7_V)<<(RTC_CNTL_SCRATCH7_S))
+#define RTC_CNTL_SCRATCH7_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH7_S  0
+
+#define RTC_CNTL_LOW_POWER_ST_REG          (DR_REG_RTCCNTL_BASE + 0xD0)
+/* RTC_CNTL_MAIN_STATE : RO ;bitpos:[31:28] ;default: 4'd0 ; */
+/*description: rtc main state machine status.*/
+#define RTC_CNTL_MAIN_STATE    0x0000000F
+#define RTC_CNTL_MAIN_STATE_M  ((RTC_CNTL_MAIN_STATE_V)<<(RTC_CNTL_MAIN_STATE_S))
+#define RTC_CNTL_MAIN_STATE_V  0xF
+#define RTC_CNTL_MAIN_STATE_S  28
+/* RTC_CNTL_MAIN_STATE_IN_IDLE : RO ;bitpos:[27] ;default: 1'b0 ; */
+/*description: rtc main state machine is in idle state.*/
+#define RTC_CNTL_MAIN_STATE_IN_IDLE    (BIT(27))
+#define RTC_CNTL_MAIN_STATE_IN_IDLE_M  (BIT(27))
+#define RTC_CNTL_MAIN_STATE_IN_IDLE_V  0x1
+#define RTC_CNTL_MAIN_STATE_IN_IDLE_S  27
+/* RTC_CNTL_MAIN_STATE_IN_SLP : RO ;bitpos:[26] ;default: 1'b0 ; */
+/*description: rtc main state machine is in sleep state.*/
+#define RTC_CNTL_MAIN_STATE_IN_SLP    (BIT(26))
+#define RTC_CNTL_MAIN_STATE_IN_SLP_M  (BIT(26))
+#define RTC_CNTL_MAIN_STATE_IN_SLP_V  0x1
+#define RTC_CNTL_MAIN_STATE_IN_SLP_S  26
+/* RTC_CNTL_MAIN_STATE_IN_WAIT_XTL : RO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: rtc main state machine is in wait xtal state.*/
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_XTL    (BIT(25))
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_XTL_M  (BIT(25))
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_XTL_V  0x1
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_XTL_S  25
+/* RTC_CNTL_MAIN_STATE_IN_WAIT_PLL : RO ;bitpos:[24] ;default: 1'b0 ; */
+/*description: rtc main state machine is in wait pll state.*/
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_PLL    (BIT(24))
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_PLL_M  (BIT(24))
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_PLL_V  0x1
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_PLL_S  24
+/* RTC_CNTL_MAIN_STATE_IN_WAIT_8M : RO ;bitpos:[23] ;default: 1'b0 ; */
+/*description: rtc main state machine is in wait 8m state.*/
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_8M    (BIT(23))
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_8M_M  (BIT(23))
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_8M_V  0x1
+#define RTC_CNTL_MAIN_STATE_IN_WAIT_8M_S  23
+/* RTC_CNTL_IN_LOW_POWER_STATE : RO ;bitpos:[22] ;default: 1'b0 ; */
+/*description: rtc main state machine is in the states of low power.*/
+#define RTC_CNTL_IN_LOW_POWER_STATE    (BIT(22))
+#define RTC_CNTL_IN_LOW_POWER_STATE_M  (BIT(22))
+#define RTC_CNTL_IN_LOW_POWER_STATE_V  0x1
+#define RTC_CNTL_IN_LOW_POWER_STATE_S  22
+/* RTC_CNTL_IN_WAKEUP_STATE : RO ;bitpos:[21] ;default: 1'b0 ; */
+/*description: rtc main state machine is in the states of wakeup process.*/
+#define RTC_CNTL_IN_WAKEUP_STATE    (BIT(21))
+#define RTC_CNTL_IN_WAKEUP_STATE_M  (BIT(21))
+#define RTC_CNTL_IN_WAKEUP_STATE_V  0x1
+#define RTC_CNTL_IN_WAKEUP_STATE_S  21
+/* RTC_CNTL_MAIN_STATE_WAIT_END : RO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: rtc main state machine has been waited for some cycles.*/
+#define RTC_CNTL_MAIN_STATE_WAIT_END    (BIT(20))
+#define RTC_CNTL_MAIN_STATE_WAIT_END_M  (BIT(20))
+#define RTC_CNTL_MAIN_STATE_WAIT_END_V  0x1
+#define RTC_CNTL_MAIN_STATE_WAIT_END_S  20
+/* RTC_CNTL_RDY_FOR_WAKEUP : RO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: rtc is ready to receive wake up trigger from wake up source.*/
+#define RTC_CNTL_RDY_FOR_WAKEUP    (BIT(19))
+#define RTC_CNTL_RDY_FOR_WAKEUP_M  (BIT(19))
+#define RTC_CNTL_RDY_FOR_WAKEUP_V  0x1
+#define RTC_CNTL_RDY_FOR_WAKEUP_S  19
+/* RTC_CNTL_MAIN_STATE_PLL_ON : RO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: rtc main state machine is in states that pll should be running.*/
+#define RTC_CNTL_MAIN_STATE_PLL_ON    (BIT(18))
+#define RTC_CNTL_MAIN_STATE_PLL_ON_M  (BIT(18))
+#define RTC_CNTL_MAIN_STATE_PLL_ON_V  0x1
+#define RTC_CNTL_MAIN_STATE_PLL_ON_S  18
+/* RTC_CNTL_MAIN_STATE_XTAL_ISO : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: no use any more.*/
+#define RTC_CNTL_MAIN_STATE_XTAL_ISO    (BIT(17))
+#define RTC_CNTL_MAIN_STATE_XTAL_ISO_M  (BIT(17))
+#define RTC_CNTL_MAIN_STATE_XTAL_ISO_V  0x1
+#define RTC_CNTL_MAIN_STATE_XTAL_ISO_S  17
+/* RTC_CNTL_COCPU_STATE_DONE : RO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: ulp/cocpu is done.*/
+#define RTC_CNTL_COCPU_STATE_DONE    (BIT(16))
+#define RTC_CNTL_COCPU_STATE_DONE_M  (BIT(16))
+#define RTC_CNTL_COCPU_STATE_DONE_V  0x1
+#define RTC_CNTL_COCPU_STATE_DONE_S  16
+/* RTC_CNTL_COCPU_STATE_SLP : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: ulp/cocpu is in sleep state.*/
+#define RTC_CNTL_COCPU_STATE_SLP    (BIT(15))
+#define RTC_CNTL_COCPU_STATE_SLP_M  (BIT(15))
+#define RTC_CNTL_COCPU_STATE_SLP_V  0x1
+#define RTC_CNTL_COCPU_STATE_SLP_S  15
+/* RTC_CNTL_COCPU_STATE_SWITCH : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: ulp/cocpu is about to working. Switch rtc main state.*/
+#define RTC_CNTL_COCPU_STATE_SWITCH    (BIT(14))
+#define RTC_CNTL_COCPU_STATE_SWITCH_M  (BIT(14))
+#define RTC_CNTL_COCPU_STATE_SWITCH_V  0x1
+#define RTC_CNTL_COCPU_STATE_SWITCH_S  14
+/* RTC_CNTL_COCPU_STATE_START : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: ulp/cocpu should start to work.*/
+#define RTC_CNTL_COCPU_STATE_START    (BIT(13))
+#define RTC_CNTL_COCPU_STATE_START_M  (BIT(13))
+#define RTC_CNTL_COCPU_STATE_START_V  0x1
+#define RTC_CNTL_COCPU_STATE_START_S  13
+/* RTC_CNTL_TOUCH_STATE_DONE : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: touch is done.*/
+#define RTC_CNTL_TOUCH_STATE_DONE    (BIT(12))
+#define RTC_CNTL_TOUCH_STATE_DONE_M  (BIT(12))
+#define RTC_CNTL_TOUCH_STATE_DONE_V  0x1
+#define RTC_CNTL_TOUCH_STATE_DONE_S  12
+/* RTC_CNTL_TOUCH_STATE_SLP : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: touch is in sleep state.*/
+#define RTC_CNTL_TOUCH_STATE_SLP    (BIT(11))
+#define RTC_CNTL_TOUCH_STATE_SLP_M  (BIT(11))
+#define RTC_CNTL_TOUCH_STATE_SLP_V  0x1
+#define RTC_CNTL_TOUCH_STATE_SLP_S  11
+/* RTC_CNTL_TOUCH_STATE_SWITCH : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: touch is about to working. Switch rtc main state.*/
+#define RTC_CNTL_TOUCH_STATE_SWITCH    (BIT(10))
+#define RTC_CNTL_TOUCH_STATE_SWITCH_M  (BIT(10))
+#define RTC_CNTL_TOUCH_STATE_SWITCH_V  0x1
+#define RTC_CNTL_TOUCH_STATE_SWITCH_S  10
+/* RTC_CNTL_TOUCH_STATE_START : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: touch should start to work.*/
+#define RTC_CNTL_TOUCH_STATE_START    (BIT(9))
+#define RTC_CNTL_TOUCH_STATE_START_M  (BIT(9))
+#define RTC_CNTL_TOUCH_STATE_START_V  0x1
+#define RTC_CNTL_TOUCH_STATE_START_S  9
+/* RTC_CNTL_XPD_DIG : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: digital wrap power down.*/
+#define RTC_CNTL_XPD_DIG    (BIT(8))
+#define RTC_CNTL_XPD_DIG_M  (BIT(8))
+#define RTC_CNTL_XPD_DIG_V  0x1
+#define RTC_CNTL_XPD_DIG_S  8
+/* RTC_CNTL_DIG_ISO : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: digital wrap iso.*/
+#define RTC_CNTL_DIG_ISO    (BIT(7))
+#define RTC_CNTL_DIG_ISO_M  (BIT(7))
+#define RTC_CNTL_DIG_ISO_V  0x1
+#define RTC_CNTL_DIG_ISO_S  7
+/* RTC_CNTL_XPD_WIFI : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: wifi wrap power down.*/
+#define RTC_CNTL_XPD_WIFI    (BIT(6))
+#define RTC_CNTL_XPD_WIFI_M  (BIT(6))
+#define RTC_CNTL_XPD_WIFI_V  0x1
+#define RTC_CNTL_XPD_WIFI_S  6
+/* RTC_CNTL_WIFI_ISO : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: wifi iso.*/
+#define RTC_CNTL_WIFI_ISO    (BIT(5))
+#define RTC_CNTL_WIFI_ISO_M  (BIT(5))
+#define RTC_CNTL_WIFI_ISO_V  0x1
+#define RTC_CNTL_WIFI_ISO_S  5
+/* RTC_CNTL_XPD_RTC_PERI : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: rtc peripheral power down .*/
+#define RTC_CNTL_XPD_RTC_PERI    (BIT(4))
+#define RTC_CNTL_XPD_RTC_PERI_M  (BIT(4))
+#define RTC_CNTL_XPD_RTC_PERI_V  0x1
+#define RTC_CNTL_XPD_RTC_PERI_S  4
+/* RTC_CNTL_PERI_ISO : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: rtc peripheral iso.*/
+#define RTC_CNTL_PERI_ISO    (BIT(3))
+#define RTC_CNTL_PERI_ISO_M  (BIT(3))
+#define RTC_CNTL_PERI_ISO_V  0x1
+#define RTC_CNTL_PERI_ISO_S  3
+/* RTC_CNTL_XPD_DIG_DCDC : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: External DCDC power down.*/
+#define RTC_CNTL_XPD_DIG_DCDC    (BIT(2))
+#define RTC_CNTL_XPD_DIG_DCDC_M  (BIT(2))
+#define RTC_CNTL_XPD_DIG_DCDC_V  0x1
+#define RTC_CNTL_XPD_DIG_DCDC_S  2
+/* RTC_CNTL_XPD_ROM0 : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: rom0 power down.*/
+#define RTC_CNTL_XPD_ROM0    (BIT(0))
+#define RTC_CNTL_XPD_ROM0_M  (BIT(0))
+#define RTC_CNTL_XPD_ROM0_V  0x1
+#define RTC_CNTL_XPD_ROM0_S  0
+
+#define RTC_CNTL_DIAG0_REG          (DR_REG_RTCCNTL_BASE + 0xD4)
+/* RTC_CNTL_LOW_POWER_DIAG1 : RO ;bitpos:[31:0] ;default: 0 ; */
+/*description: .*/
+#define RTC_CNTL_LOW_POWER_DIAG1    0xFFFFFFFF
+#define RTC_CNTL_LOW_POWER_DIAG1_M  ((RTC_CNTL_LOW_POWER_DIAG1_V)<<(RTC_CNTL_LOW_POWER_DIAG1_S))
+#define RTC_CNTL_LOW_POWER_DIAG1_V  0xFFFFFFFF
+#define RTC_CNTL_LOW_POWER_DIAG1_S  0
+
+#define RTC_CNTL_PAD_HOLD_REG          (DR_REG_RTCCNTL_BASE + 0xD8)
+/* RTC_CNTL_PAD21_HOLD : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_PAD21_HOLD    (BIT(21))
+#define RTC_CNTL_PAD21_HOLD_M  (BIT(21))
+#define RTC_CNTL_PAD21_HOLD_V  0x1
+#define RTC_CNTL_PAD21_HOLD_S  21
+/* RTC_CNTL_PAD20_HOLD : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_PAD20_HOLD    (BIT(20))
+#define RTC_CNTL_PAD20_HOLD_M  (BIT(20))
+#define RTC_CNTL_PAD20_HOLD_V  0x1
+#define RTC_CNTL_PAD20_HOLD_S  20
+/* RTC_CNTL_PAD19_HOLD : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_PAD19_HOLD    (BIT(19))
+#define RTC_CNTL_PAD19_HOLD_M  (BIT(19))
+#define RTC_CNTL_PAD19_HOLD_V  0x1
+#define RTC_CNTL_PAD19_HOLD_S  19
+/* RTC_CNTL_PDAC2_HOLD : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_PDAC2_HOLD    (BIT(18))
+#define RTC_CNTL_PDAC2_HOLD_M  (BIT(18))
+#define RTC_CNTL_PDAC2_HOLD_V  0x1
+#define RTC_CNTL_PDAC2_HOLD_S  18
+/* RTC_CNTL_PDAC1_HOLD : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_PDAC1_HOLD    (BIT(17))
+#define RTC_CNTL_PDAC1_HOLD_M  (BIT(17))
+#define RTC_CNTL_PDAC1_HOLD_V  0x1
+#define RTC_CNTL_PDAC1_HOLD_S  17
+/* RTC_CNTL_X32N_HOLD : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_X32N_HOLD    (BIT(16))
+#define RTC_CNTL_X32N_HOLD_M  (BIT(16))
+#define RTC_CNTL_X32N_HOLD_V  0x1
+#define RTC_CNTL_X32N_HOLD_S  16
+/* RTC_CNTL_X32P_HOLD : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_X32P_HOLD    (BIT(15))
+#define RTC_CNTL_X32P_HOLD_M  (BIT(15))
+#define RTC_CNTL_X32P_HOLD_V  0x1
+#define RTC_CNTL_X32P_HOLD_S  15
+/* RTC_CNTL_TOUCH_PAD14_HOLD : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD14_HOLD    (BIT(14))
+#define RTC_CNTL_TOUCH_PAD14_HOLD_M  (BIT(14))
+#define RTC_CNTL_TOUCH_PAD14_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD14_HOLD_S  14
+/* RTC_CNTL_TOUCH_PAD13_HOLD : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD13_HOLD    (BIT(13))
+#define RTC_CNTL_TOUCH_PAD13_HOLD_M  (BIT(13))
+#define RTC_CNTL_TOUCH_PAD13_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD13_HOLD_S  13
+/* RTC_CNTL_TOUCH_PAD12_HOLD : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD12_HOLD    (BIT(12))
+#define RTC_CNTL_TOUCH_PAD12_HOLD_M  (BIT(12))
+#define RTC_CNTL_TOUCH_PAD12_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD12_HOLD_S  12
+/* RTC_CNTL_TOUCH_PAD11_HOLD : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD11_HOLD    (BIT(11))
+#define RTC_CNTL_TOUCH_PAD11_HOLD_M  (BIT(11))
+#define RTC_CNTL_TOUCH_PAD11_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD11_HOLD_S  11
+/* RTC_CNTL_TOUCH_PAD10_HOLD : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD10_HOLD    (BIT(10))
+#define RTC_CNTL_TOUCH_PAD10_HOLD_M  (BIT(10))
+#define RTC_CNTL_TOUCH_PAD10_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD10_HOLD_S  10
+/* RTC_CNTL_TOUCH_PAD9_HOLD : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD9_HOLD    (BIT(9))
+#define RTC_CNTL_TOUCH_PAD9_HOLD_M  (BIT(9))
+#define RTC_CNTL_TOUCH_PAD9_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD9_HOLD_S  9
+/* RTC_CNTL_TOUCH_PAD8_HOLD : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD8_HOLD    (BIT(8))
+#define RTC_CNTL_TOUCH_PAD8_HOLD_M  (BIT(8))
+#define RTC_CNTL_TOUCH_PAD8_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD8_HOLD_S  8
+/* RTC_CNTL_TOUCH_PAD7_HOLD : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD7_HOLD    (BIT(7))
+#define RTC_CNTL_TOUCH_PAD7_HOLD_M  (BIT(7))
+#define RTC_CNTL_TOUCH_PAD7_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD7_HOLD_S  7
+/* RTC_CNTL_TOUCH_PAD6_HOLD : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD6_HOLD    (BIT(6))
+#define RTC_CNTL_TOUCH_PAD6_HOLD_M  (BIT(6))
+#define RTC_CNTL_TOUCH_PAD6_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD6_HOLD_S  6
+/* RTC_CNTL_TOUCH_PAD5_HOLD : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD5_HOLD    (BIT(5))
+#define RTC_CNTL_TOUCH_PAD5_HOLD_M  (BIT(5))
+#define RTC_CNTL_TOUCH_PAD5_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD5_HOLD_S  5
+/* RTC_CNTL_TOUCH_PAD4_HOLD : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD4_HOLD    (BIT(4))
+#define RTC_CNTL_TOUCH_PAD4_HOLD_M  (BIT(4))
+#define RTC_CNTL_TOUCH_PAD4_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD4_HOLD_S  4
+/* RTC_CNTL_TOUCH_PAD3_HOLD : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD3_HOLD    (BIT(3))
+#define RTC_CNTL_TOUCH_PAD3_HOLD_M  (BIT(3))
+#define RTC_CNTL_TOUCH_PAD3_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD3_HOLD_S  3
+/* RTC_CNTL_TOUCH_PAD2_HOLD : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD2_HOLD    (BIT(2))
+#define RTC_CNTL_TOUCH_PAD2_HOLD_M  (BIT(2))
+#define RTC_CNTL_TOUCH_PAD2_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD2_HOLD_S  2
+/* RTC_CNTL_TOUCH_PAD1_HOLD : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD1_HOLD    (BIT(1))
+#define RTC_CNTL_TOUCH_PAD1_HOLD_M  (BIT(1))
+#define RTC_CNTL_TOUCH_PAD1_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD1_HOLD_S  1
+/* RTC_CNTL_TOUCH_PAD0_HOLD : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD0_HOLD    (BIT(0))
+#define RTC_CNTL_TOUCH_PAD0_HOLD_M  (BIT(0))
+#define RTC_CNTL_TOUCH_PAD0_HOLD_V  0x1
+#define RTC_CNTL_TOUCH_PAD0_HOLD_S  0
+
+#define RTC_CNTL_DIG_PAD_HOLD_REG          (DR_REG_RTCCNTL_BASE + 0xDC)
+/* RTC_CNTL_DIG_PAD_HOLD : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define RTC_CNTL_DIG_PAD_HOLD    0xFFFFFFFF
+#define RTC_CNTL_DIG_PAD_HOLD_M  ((RTC_CNTL_DIG_PAD_HOLD_V)<<(RTC_CNTL_DIG_PAD_HOLD_S))
+#define RTC_CNTL_DIG_PAD_HOLD_V  0xFFFFFFFF
+#define RTC_CNTL_DIG_PAD_HOLD_S  0
+
+#define RTC_CNTL_EXT_WAKEUP1_REG          (DR_REG_RTCCNTL_BASE + 0xE0)
+/* RTC_CNTL_EXT_WAKEUP1_STATUS_CLR : WO ;bitpos:[22] ;default: 1'd0 ; */
+/*description: clear ext wakeup1 status.*/
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_CLR    (BIT(22))
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_CLR_M  (BIT(22))
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_CLR_V  0x1
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_CLR_S  22
+/* RTC_CNTL_EXT_WAKEUP1_SEL : R/W ;bitpos:[21:0] ;default: 22'd0 ; */
+/*description: Bitmap to select RTC pads for ext wakeup1.*/
+#define RTC_CNTL_EXT_WAKEUP1_SEL    0x003FFFFF
+#define RTC_CNTL_EXT_WAKEUP1_SEL_M  ((RTC_CNTL_EXT_WAKEUP1_SEL_V)<<(RTC_CNTL_EXT_WAKEUP1_SEL_S))
+#define RTC_CNTL_EXT_WAKEUP1_SEL_V  0x3FFFFF
+#define RTC_CNTL_EXT_WAKEUP1_SEL_S  0
+
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_REG          (DR_REG_RTCCNTL_BASE + 0xE4)
+/* RTC_CNTL_EXT_WAKEUP1_STATUS : RO ;bitpos:[21:0] ;default: 22'd0 ; */
+/*description: ext wakeup1 status.*/
+#define RTC_CNTL_EXT_WAKEUP1_STATUS    0x003FFFFF
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_M  ((RTC_CNTL_EXT_WAKEUP1_STATUS_V)<<(RTC_CNTL_EXT_WAKEUP1_STATUS_S))
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_V  0x3FFFFF
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_S  0
+
+#define RTC_CNTL_BROWN_OUT_REG          (DR_REG_RTCCNTL_BASE + 0xE8)
+/* RTC_CNTL_BROWN_OUT_DET : RO ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_BROWN_OUT_DET    (BIT(31))
+#define RTC_CNTL_BROWN_OUT_DET_M  (BIT(31))
+#define RTC_CNTL_BROWN_OUT_DET_V  0x1
+#define RTC_CNTL_BROWN_OUT_DET_S  31
+/* RTC_CNTL_BROWN_OUT_ENA : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: enable brown out.*/
+#define RTC_CNTL_BROWN_OUT_ENA    (BIT(30))
+#define RTC_CNTL_BROWN_OUT_ENA_M  (BIT(30))
+#define RTC_CNTL_BROWN_OUT_ENA_V  0x1
+#define RTC_CNTL_BROWN_OUT_ENA_S  30
+/* RTC_CNTL_BROWN_OUT_CNT_CLR : WO ;bitpos:[29] ;default: 1'b0 ; */
+/*description: clear brown out counter.*/
+#define RTC_CNTL_BROWN_OUT_CNT_CLR    (BIT(29))
+#define RTC_CNTL_BROWN_OUT_CNT_CLR_M  (BIT(29))
+#define RTC_CNTL_BROWN_OUT_CNT_CLR_V  0x1
+#define RTC_CNTL_BROWN_OUT_CNT_CLR_S  29
+/* RTC_CNTL_BROWN_OUT_ANA_RST_EN : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_BROWN_OUT_ANA_RST_EN    (BIT(28))
+#define RTC_CNTL_BROWN_OUT_ANA_RST_EN_M  (BIT(28))
+#define RTC_CNTL_BROWN_OUT_ANA_RST_EN_V  0x1
+#define RTC_CNTL_BROWN_OUT_ANA_RST_EN_S  28
+/* RTC_CNTL_BROWN_OUT_RST_SEL : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: 1:  4-pos reset.*/
+#define RTC_CNTL_BROWN_OUT_RST_SEL    (BIT(27))
+#define RTC_CNTL_BROWN_OUT_RST_SEL_M  (BIT(27))
+#define RTC_CNTL_BROWN_OUT_RST_SEL_V  0x1
+#define RTC_CNTL_BROWN_OUT_RST_SEL_S  27
+/* RTC_CNTL_BROWN_OUT_RST_ENA : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: enable brown out reset.*/
+#define RTC_CNTL_BROWN_OUT_RST_ENA    (BIT(26))
+#define RTC_CNTL_BROWN_OUT_RST_ENA_M  (BIT(26))
+#define RTC_CNTL_BROWN_OUT_RST_ENA_V  0x1
+#define RTC_CNTL_BROWN_OUT_RST_ENA_S  26
+/* RTC_CNTL_BROWN_OUT_RST_WAIT : R/W ;bitpos:[25:16] ;default: 10'h3ff ; */
+/*description: brown out reset wait cycles.*/
+#define RTC_CNTL_BROWN_OUT_RST_WAIT    0x000003FF
+#define RTC_CNTL_BROWN_OUT_RST_WAIT_M  ((RTC_CNTL_BROWN_OUT_RST_WAIT_V)<<(RTC_CNTL_BROWN_OUT_RST_WAIT_S))
+#define RTC_CNTL_BROWN_OUT_RST_WAIT_V  0x3FF
+#define RTC_CNTL_BROWN_OUT_RST_WAIT_S  16
+/* RTC_CNTL_BROWN_OUT_PD_RF_ENA : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: enable power down RF when brown out happens.*/
+#define RTC_CNTL_BROWN_OUT_PD_RF_ENA    (BIT(15))
+#define RTC_CNTL_BROWN_OUT_PD_RF_ENA_M  (BIT(15))
+#define RTC_CNTL_BROWN_OUT_PD_RF_ENA_V  0x1
+#define RTC_CNTL_BROWN_OUT_PD_RF_ENA_S  15
+/* RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: enable close flash when brown out happens.*/
+#define RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA    (BIT(14))
+#define RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA_M  (BIT(14))
+#define RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA_V  0x1
+#define RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA_S  14
+/* RTC_CNTL_BROWN_OUT_INT_WAIT : R/W ;bitpos:[13:4] ;default: 10'h1 ; */
+/*description: brown out interrupt wait cycles.*/
+#define RTC_CNTL_BROWN_OUT_INT_WAIT    0x000003FF
+#define RTC_CNTL_BROWN_OUT_INT_WAIT_M  ((RTC_CNTL_BROWN_OUT_INT_WAIT_V)<<(RTC_CNTL_BROWN_OUT_INT_WAIT_S))
+#define RTC_CNTL_BROWN_OUT_INT_WAIT_V  0x3FF
+#define RTC_CNTL_BROWN_OUT_INT_WAIT_S  4
+
+#define RTC_CNTL_TIME_LOW1_REG          (DR_REG_RTCCNTL_BASE + 0xEC)
+/* RTC_CNTL_TIMER_VALUE1_LOW : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: RTC timer low 32 bits.*/
+#define RTC_CNTL_TIMER_VALUE1_LOW    0xFFFFFFFF
+#define RTC_CNTL_TIMER_VALUE1_LOW_M  ((RTC_CNTL_TIMER_VALUE1_LOW_V)<<(RTC_CNTL_TIMER_VALUE1_LOW_S))
+#define RTC_CNTL_TIMER_VALUE1_LOW_V  0xFFFFFFFF
+#define RTC_CNTL_TIMER_VALUE1_LOW_S  0
+
+#define RTC_CNTL_TIME_HIGH1_REG          (DR_REG_RTCCNTL_BASE + 0xF0)
+/* RTC_CNTL_TIMER_VALUE1_HIGH : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: RTC timer high 16 bits.*/
+#define RTC_CNTL_TIMER_VALUE1_HIGH    0x0000FFFF
+#define RTC_CNTL_TIMER_VALUE1_HIGH_M  ((RTC_CNTL_TIMER_VALUE1_HIGH_V)<<(RTC_CNTL_TIMER_VALUE1_HIGH_S))
+#define RTC_CNTL_TIMER_VALUE1_HIGH_V  0xFFFF
+#define RTC_CNTL_TIMER_VALUE1_HIGH_S  0
+
+#define RTC_CNTL_XTAL32K_CLK_FACTOR_REG          (DR_REG_RTCCNTL_BASE + 0xF4)
+/* RTC_CNTL_XTAL32K_CLK_FACTOR : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: xtal 32k watch dog backup clock factor.*/
+#define RTC_CNTL_XTAL32K_CLK_FACTOR    0xFFFFFFFF
+#define RTC_CNTL_XTAL32K_CLK_FACTOR_M  ((RTC_CNTL_XTAL32K_CLK_FACTOR_V)<<(RTC_CNTL_XTAL32K_CLK_FACTOR_S))
+#define RTC_CNTL_XTAL32K_CLK_FACTOR_V  0xFFFFFFFF
+#define RTC_CNTL_XTAL32K_CLK_FACTOR_S  0
+
+#define RTC_CNTL_XTAL32K_CONF_REG          (DR_REG_RTCCNTL_BASE + 0xF8)
+/* RTC_CNTL_XTAL32K_STABLE_THRES : R/W ;bitpos:[31:28] ;default: 4'h0 ; */
+/*description: if restarted xtal32k period is smaller than this.*/
+#define RTC_CNTL_XTAL32K_STABLE_THRES    0x0000000F
+#define RTC_CNTL_XTAL32K_STABLE_THRES_M  ((RTC_CNTL_XTAL32K_STABLE_THRES_V)<<(RTC_CNTL_XTAL32K_STABLE_THRES_S))
+#define RTC_CNTL_XTAL32K_STABLE_THRES_V  0xF
+#define RTC_CNTL_XTAL32K_STABLE_THRES_S  28
+/* RTC_CNTL_XTAL32K_WDT_TIMEOUT : R/W ;bitpos:[27:20] ;default: 8'hff ; */
+/*description: If no clock detected for this amount of time.*/
+#define RTC_CNTL_XTAL32K_WDT_TIMEOUT    0x000000FF
+#define RTC_CNTL_XTAL32K_WDT_TIMEOUT_M  ((RTC_CNTL_XTAL32K_WDT_TIMEOUT_V)<<(RTC_CNTL_XTAL32K_WDT_TIMEOUT_S))
+#define RTC_CNTL_XTAL32K_WDT_TIMEOUT_V  0xFF
+#define RTC_CNTL_XTAL32K_WDT_TIMEOUT_S  20
+/* RTC_CNTL_XTAL32K_RESTART_WAIT : R/W ;bitpos:[19:4] ;default: 16'h0 ; */
+/*description: cycles to wait to repower on xtal 32k.*/
+#define RTC_CNTL_XTAL32K_RESTART_WAIT    0x0000FFFF
+#define RTC_CNTL_XTAL32K_RESTART_WAIT_M  ((RTC_CNTL_XTAL32K_RESTART_WAIT_V)<<(RTC_CNTL_XTAL32K_RESTART_WAIT_S))
+#define RTC_CNTL_XTAL32K_RESTART_WAIT_V  0xFFFF
+#define RTC_CNTL_XTAL32K_RESTART_WAIT_S  4
+/* RTC_CNTL_XTAL32K_RETURN_WAIT : R/W ;bitpos:[3:0] ;default: 4'h0 ; */
+/*description: cycles to wait to return noral xtal 32k.*/
+#define RTC_CNTL_XTAL32K_RETURN_WAIT    0x0000000F
+#define RTC_CNTL_XTAL32K_RETURN_WAIT_M  ((RTC_CNTL_XTAL32K_RETURN_WAIT_V)<<(RTC_CNTL_XTAL32K_RETURN_WAIT_S))
+#define RTC_CNTL_XTAL32K_RETURN_WAIT_V  0xF
+#define RTC_CNTL_XTAL32K_RETURN_WAIT_S  0
+
+#define RTC_CNTL_ULP_CP_TIMER_REG          (DR_REG_RTCCNTL_BASE + 0xFC)
+/* RTC_CNTL_ULP_CP_SLP_TIMER_EN : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: ULP-coprocessor timer enable bit.*/
+#define RTC_CNTL_ULP_CP_SLP_TIMER_EN    (BIT(31))
+#define RTC_CNTL_ULP_CP_SLP_TIMER_EN_M  (BIT(31))
+#define RTC_CNTL_ULP_CP_SLP_TIMER_EN_V  0x1
+#define RTC_CNTL_ULP_CP_SLP_TIMER_EN_S  31
+/* RTC_CNTL_ULP_CP_GPIO_WAKEUP_CLR : WO ;bitpos:[30] ;default: 1'd0 ; */
+/*description: ULP-coprocessor wakeup by GPIO state clear.*/
+#define RTC_CNTL_ULP_CP_GPIO_WAKEUP_CLR    (BIT(30))
+#define RTC_CNTL_ULP_CP_GPIO_WAKEUP_CLR_M  (BIT(30))
+#define RTC_CNTL_ULP_CP_GPIO_WAKEUP_CLR_V  0x1
+#define RTC_CNTL_ULP_CP_GPIO_WAKEUP_CLR_S  30
+/* RTC_CNTL_ULP_CP_GPIO_WAKEUP_ENA : R/W ;bitpos:[29] ;default: 1'd0 ; */
+/*description: ULP-coprocessor wakeup by GPIO enable.*/
+#define RTC_CNTL_ULP_CP_GPIO_WAKEUP_ENA    (BIT(29))
+#define RTC_CNTL_ULP_CP_GPIO_WAKEUP_ENA_M  (BIT(29))
+#define RTC_CNTL_ULP_CP_GPIO_WAKEUP_ENA_V  0x1
+#define RTC_CNTL_ULP_CP_GPIO_WAKEUP_ENA_S  29
+/* RTC_CNTL_ULP_CP_PC_INIT : R/W ;bitpos:[10:0] ;default: 11'b0 ; */
+/*description: ULP-coprocessor PC initial address.*/
+#define RTC_CNTL_ULP_CP_PC_INIT    0x000007FF
+#define RTC_CNTL_ULP_CP_PC_INIT_M  ((RTC_CNTL_ULP_CP_PC_INIT_V)<<(RTC_CNTL_ULP_CP_PC_INIT_S))
+#define RTC_CNTL_ULP_CP_PC_INIT_V  0x7FF
+#define RTC_CNTL_ULP_CP_PC_INIT_S  0
+
+#define RTC_CNTL_ULP_CP_CTRL_REG          (DR_REG_RTCCNTL_BASE + 0x100)
+/* RTC_CNTL_ULP_CP_START_TOP : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: Write 1 to start ULP-coprocessor.*/
+#define RTC_CNTL_ULP_CP_START_TOP    (BIT(31))
+#define RTC_CNTL_ULP_CP_START_TOP_M  (BIT(31))
+#define RTC_CNTL_ULP_CP_START_TOP_V  0x1
+#define RTC_CNTL_ULP_CP_START_TOP_S  31
+/* RTC_CNTL_ULP_CP_FORCE_START_TOP : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: 1: ULP-coprocessor is started by SW.*/
+#define RTC_CNTL_ULP_CP_FORCE_START_TOP    (BIT(30))
+#define RTC_CNTL_ULP_CP_FORCE_START_TOP_M  (BIT(30))
+#define RTC_CNTL_ULP_CP_FORCE_START_TOP_V  0x1
+#define RTC_CNTL_ULP_CP_FORCE_START_TOP_S  30
+/* RTC_CNTL_ULP_CP_RESET : R/W ;bitpos:[29] ;default: 1'd0 ; */
+/*description: ulp coprocessor clk software reset.*/
+#define RTC_CNTL_ULP_CP_RESET    (BIT(29))
+#define RTC_CNTL_ULP_CP_RESET_M  (BIT(29))
+#define RTC_CNTL_ULP_CP_RESET_V  0x1
+#define RTC_CNTL_ULP_CP_RESET_S  29
+/* RTC_CNTL_ULP_CP_CLK_FO : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: ulp coprocessor clk force on.*/
+#define RTC_CNTL_ULP_CP_CLK_FO    (BIT(28))
+#define RTC_CNTL_ULP_CP_CLK_FO_M  (BIT(28))
+#define RTC_CNTL_ULP_CP_CLK_FO_V  0x1
+#define RTC_CNTL_ULP_CP_CLK_FO_S  28
+/* RTC_CNTL_ULP_CP_MEM_OFFST_CLR : WO ;bitpos:[22] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_ULP_CP_MEM_OFFST_CLR    (BIT(22))
+#define RTC_CNTL_ULP_CP_MEM_OFFST_CLR_M  (BIT(22))
+#define RTC_CNTL_ULP_CP_MEM_OFFST_CLR_V  0x1
+#define RTC_CNTL_ULP_CP_MEM_OFFST_CLR_S  22
+/* RTC_CNTL_ULP_CP_MEM_ADDR_SIZE : R/W ;bitpos:[21:11] ;default: 11'd512 ; */
+/*description: .*/
+#define RTC_CNTL_ULP_CP_MEM_ADDR_SIZE    0x000007FF
+#define RTC_CNTL_ULP_CP_MEM_ADDR_SIZE_M  ((RTC_CNTL_ULP_CP_MEM_ADDR_SIZE_V)<<(RTC_CNTL_ULP_CP_MEM_ADDR_SIZE_S))
+#define RTC_CNTL_ULP_CP_MEM_ADDR_SIZE_V  0x7FF
+#define RTC_CNTL_ULP_CP_MEM_ADDR_SIZE_S  11
+/* RTC_CNTL_ULP_CP_MEM_ADDR_INIT : R/W ;bitpos:[10:0] ;default: 11'd512 ; */
+/*description: .*/
+#define RTC_CNTL_ULP_CP_MEM_ADDR_INIT    0x000007FF
+#define RTC_CNTL_ULP_CP_MEM_ADDR_INIT_M  ((RTC_CNTL_ULP_CP_MEM_ADDR_INIT_V)<<(RTC_CNTL_ULP_CP_MEM_ADDR_INIT_S))
+#define RTC_CNTL_ULP_CP_MEM_ADDR_INIT_V  0x7FF
+#define RTC_CNTL_ULP_CP_MEM_ADDR_INIT_S  0
+
+#define RTC_CNTL_COCPU_CTRL_REG          (DR_REG_RTCCNTL_BASE + 0x104)
+/* RTC_CNTL_COCPU_CLKGATE_EN : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_COCPU_CLKGATE_EN    (BIT(27))
+#define RTC_CNTL_COCPU_CLKGATE_EN_M  (BIT(27))
+#define RTC_CNTL_COCPU_CLKGATE_EN_V  0x1
+#define RTC_CNTL_COCPU_CLKGATE_EN_S  27
+/* RTC_CNTL_COCPU_SW_INT_TRIGGER : WO ;bitpos:[26] ;default: 1'b0 ; */
+/*description: trigger cocpu register interrupt.*/
+#define RTC_CNTL_COCPU_SW_INT_TRIGGER    (BIT(26))
+#define RTC_CNTL_COCPU_SW_INT_TRIGGER_M  (BIT(26))
+#define RTC_CNTL_COCPU_SW_INT_TRIGGER_V  0x1
+#define RTC_CNTL_COCPU_SW_INT_TRIGGER_S  26
+/* RTC_CNTL_COCPU_DONE : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: done signal used by riscv to control timer. .*/
+#define RTC_CNTL_COCPU_DONE    (BIT(25))
+#define RTC_CNTL_COCPU_DONE_M  (BIT(25))
+#define RTC_CNTL_COCPU_DONE_V  0x1
+#define RTC_CNTL_COCPU_DONE_S  25
+/* RTC_CNTL_COCPU_DONE_FORCE : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: 1: select riscv done 0: select ulp done.*/
+#define RTC_CNTL_COCPU_DONE_FORCE    (BIT(24))
+#define RTC_CNTL_COCPU_DONE_FORCE_M  (BIT(24))
+#define RTC_CNTL_COCPU_DONE_FORCE_V  0x1
+#define RTC_CNTL_COCPU_DONE_FORCE_S  24
+/* RTC_CNTL_COCPU_SEL : R/W ;bitpos:[23] ;default: 1'b1 ; */
+/*description: 1: old ULP 0: new riscV.*/
+#define RTC_CNTL_COCPU_SEL    (BIT(23))
+#define RTC_CNTL_COCPU_SEL_M  (BIT(23))
+#define RTC_CNTL_COCPU_SEL_V  0x1
+#define RTC_CNTL_COCPU_SEL_S  23
+/* RTC_CNTL_COCPU_SHUT_RESET_EN : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: to reset cocpu.*/
+#define RTC_CNTL_COCPU_SHUT_RESET_EN    (BIT(22))
+#define RTC_CNTL_COCPU_SHUT_RESET_EN_M  (BIT(22))
+#define RTC_CNTL_COCPU_SHUT_RESET_EN_V  0x1
+#define RTC_CNTL_COCPU_SHUT_RESET_EN_S  22
+/* RTC_CNTL_COCPU_SHUT_2_CLK_DIS : R/W ;bitpos:[21:14] ;default: 8'd40 ; */
+/*description: time from shut cocpu to disable clk.*/
+#define RTC_CNTL_COCPU_SHUT_2_CLK_DIS    0x000000FF
+#define RTC_CNTL_COCPU_SHUT_2_CLK_DIS_M  ((RTC_CNTL_COCPU_SHUT_2_CLK_DIS_V)<<(RTC_CNTL_COCPU_SHUT_2_CLK_DIS_S))
+#define RTC_CNTL_COCPU_SHUT_2_CLK_DIS_V  0xFF
+#define RTC_CNTL_COCPU_SHUT_2_CLK_DIS_S  14
+/* RTC_CNTL_COCPU_SHUT : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: to shut cocpu.*/
+#define RTC_CNTL_COCPU_SHUT    (BIT(13))
+#define RTC_CNTL_COCPU_SHUT_M  (BIT(13))
+#define RTC_CNTL_COCPU_SHUT_V  0x1
+#define RTC_CNTL_COCPU_SHUT_S  13
+/* RTC_CNTL_COCPU_START_2_INTR_EN : R/W ;bitpos:[12:7] ;default: 6'd16 ; */
+/*description: time from start cocpu to give start interrupt.*/
+#define RTC_CNTL_COCPU_START_2_INTR_EN    0x0000003F
+#define RTC_CNTL_COCPU_START_2_INTR_EN_M  ((RTC_CNTL_COCPU_START_2_INTR_EN_V)<<(RTC_CNTL_COCPU_START_2_INTR_EN_S))
+#define RTC_CNTL_COCPU_START_2_INTR_EN_V  0x3F
+#define RTC_CNTL_COCPU_START_2_INTR_EN_S  7
+/* RTC_CNTL_COCPU_START_2_RESET_DIS : R/W ;bitpos:[6:1] ;default: 6'd8 ; */
+/*description: time from start cocpu to pull down reset.*/
+#define RTC_CNTL_COCPU_START_2_RESET_DIS    0x0000003F
+#define RTC_CNTL_COCPU_START_2_RESET_DIS_M  ((RTC_CNTL_COCPU_START_2_RESET_DIS_V)<<(RTC_CNTL_COCPU_START_2_RESET_DIS_S))
+#define RTC_CNTL_COCPU_START_2_RESET_DIS_V  0x3F
+#define RTC_CNTL_COCPU_START_2_RESET_DIS_S  1
+/* RTC_CNTL_COCPU_CLK_FO : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: cocpu clk force on.*/
+#define RTC_CNTL_COCPU_CLK_FO    (BIT(0))
+#define RTC_CNTL_COCPU_CLK_FO_M  (BIT(0))
+#define RTC_CNTL_COCPU_CLK_FO_V  0x1
+#define RTC_CNTL_COCPU_CLK_FO_S  0
+
+#define RTC_CNTL_TOUCH_CTRL1_REG          (DR_REG_RTCCNTL_BASE + 0x108)
+/* RTC_CNTL_TOUCH_MEAS_NUM : R/W ;bitpos:[31:16] ;default: 16'h1000 ; */
+/*description: the meas length (in 8MHz).*/
+#define RTC_CNTL_TOUCH_MEAS_NUM    0x0000FFFF
+#define RTC_CNTL_TOUCH_MEAS_NUM_M  ((RTC_CNTL_TOUCH_MEAS_NUM_V)<<(RTC_CNTL_TOUCH_MEAS_NUM_S))
+#define RTC_CNTL_TOUCH_MEAS_NUM_V  0xFFFF
+#define RTC_CNTL_TOUCH_MEAS_NUM_S  16
+/* RTC_CNTL_TOUCH_SLEEP_CYCLES : R/W ;bitpos:[15:0] ;default: 16'h100 ; */
+/*description: sleep cycles for timer.*/
+#define RTC_CNTL_TOUCH_SLEEP_CYCLES    0x0000FFFF
+#define RTC_CNTL_TOUCH_SLEEP_CYCLES_M  ((RTC_CNTL_TOUCH_SLEEP_CYCLES_V)<<(RTC_CNTL_TOUCH_SLEEP_CYCLES_S))
+#define RTC_CNTL_TOUCH_SLEEP_CYCLES_V  0xFFFF
+#define RTC_CNTL_TOUCH_SLEEP_CYCLES_S  0
+
+#define RTC_CNTL_TOUCH_CTRL2_REG          (DR_REG_RTCCNTL_BASE + 0x10C)
+/* RTC_CNTL_TOUCH_CLKGATE_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: touch clock enable.*/
+#define RTC_CNTL_TOUCH_CLKGATE_EN    (BIT(31))
+#define RTC_CNTL_TOUCH_CLKGATE_EN_M  (BIT(31))
+#define RTC_CNTL_TOUCH_CLKGATE_EN_V  0x1
+#define RTC_CNTL_TOUCH_CLKGATE_EN_S  31
+/* RTC_CNTL_TOUCH_CLK_FO : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: touch clock force on.*/
+#define RTC_CNTL_TOUCH_CLK_FO    (BIT(30))
+#define RTC_CNTL_TOUCH_CLK_FO_M  (BIT(30))
+#define RTC_CNTL_TOUCH_CLK_FO_V  0x1
+#define RTC_CNTL_TOUCH_CLK_FO_S  30
+/* RTC_CNTL_TOUCH_RESET : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: reset upgrade touch.*/
+#define RTC_CNTL_TOUCH_RESET    (BIT(29))
+#define RTC_CNTL_TOUCH_RESET_M  (BIT(29))
+#define RTC_CNTL_TOUCH_RESET_V  0x1
+#define RTC_CNTL_TOUCH_RESET_S  29
+/* RTC_CNTL_TOUCH_TIMER_FORCE_DONE : R/W ;bitpos:[28:27] ;default: 2'b0 ; */
+/*description: force touch timer done.*/
+#define RTC_CNTL_TOUCH_TIMER_FORCE_DONE    0x00000003
+#define RTC_CNTL_TOUCH_TIMER_FORCE_DONE_M  ((RTC_CNTL_TOUCH_TIMER_FORCE_DONE_V)<<(RTC_CNTL_TOUCH_TIMER_FORCE_DONE_S))
+#define RTC_CNTL_TOUCH_TIMER_FORCE_DONE_V  0x3
+#define RTC_CNTL_TOUCH_TIMER_FORCE_DONE_S  27
+/* RTC_CNTL_TOUCH_SLP_CYC_DIV : R/W ;bitpos:[26:25] ;default: 2'd0 ; */
+/*description: when a touch pad is active.*/
+#define RTC_CNTL_TOUCH_SLP_CYC_DIV    0x00000003
+#define RTC_CNTL_TOUCH_SLP_CYC_DIV_M  ((RTC_CNTL_TOUCH_SLP_CYC_DIV_V)<<(RTC_CNTL_TOUCH_SLP_CYC_DIV_S))
+#define RTC_CNTL_TOUCH_SLP_CYC_DIV_V  0x3
+#define RTC_CNTL_TOUCH_SLP_CYC_DIV_S  25
+/* RTC_CNTL_TOUCH_XPD_WAIT : R/W ;bitpos:[24:17] ;default: 8'h4 ; */
+/*description: the waiting cycles (in 8MHz) between TOUCH_START and TOUCH_XPD.*/
+#define RTC_CNTL_TOUCH_XPD_WAIT    0x000000FF
+#define RTC_CNTL_TOUCH_XPD_WAIT_M  ((RTC_CNTL_TOUCH_XPD_WAIT_V)<<(RTC_CNTL_TOUCH_XPD_WAIT_S))
+#define RTC_CNTL_TOUCH_XPD_WAIT_V  0xFF
+#define RTC_CNTL_TOUCH_XPD_WAIT_S  17
+/* RTC_CNTL_TOUCH_START_FORCE : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: 1: to start touch fsm by SW.*/
+#define RTC_CNTL_TOUCH_START_FORCE    (BIT(16))
+#define RTC_CNTL_TOUCH_START_FORCE_M  (BIT(16))
+#define RTC_CNTL_TOUCH_START_FORCE_V  0x1
+#define RTC_CNTL_TOUCH_START_FORCE_S  16
+/* RTC_CNTL_TOUCH_START_EN : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: 1: start touch fsm.*/
+#define RTC_CNTL_TOUCH_START_EN    (BIT(15))
+#define RTC_CNTL_TOUCH_START_EN_M  (BIT(15))
+#define RTC_CNTL_TOUCH_START_EN_V  0x1
+#define RTC_CNTL_TOUCH_START_EN_S  15
+/* RTC_CNTL_TOUCH_START_FSM_EN : R/W ;bitpos:[14] ;default: 1'b1 ; */
+/*description: 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm.*/
+#define RTC_CNTL_TOUCH_START_FSM_EN    (BIT(14))
+#define RTC_CNTL_TOUCH_START_FSM_EN_M  (BIT(14))
+#define RTC_CNTL_TOUCH_START_FSM_EN_V  0x1
+#define RTC_CNTL_TOUCH_START_FSM_EN_S  14
+/* RTC_CNTL_TOUCH_SLP_TIMER_EN : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: touch timer enable bit.*/
+#define RTC_CNTL_TOUCH_SLP_TIMER_EN    (BIT(13))
+#define RTC_CNTL_TOUCH_SLP_TIMER_EN_M  (BIT(13))
+#define RTC_CNTL_TOUCH_SLP_TIMER_EN_V  0x1
+#define RTC_CNTL_TOUCH_SLP_TIMER_EN_S  13
+/* RTC_CNTL_TOUCH_DBIAS : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: 1:use self bias 0:use bandgap bias.*/
+#define RTC_CNTL_TOUCH_DBIAS    (BIT(12))
+#define RTC_CNTL_TOUCH_DBIAS_M  (BIT(12))
+#define RTC_CNTL_TOUCH_DBIAS_V  0x1
+#define RTC_CNTL_TOUCH_DBIAS_S  12
+/* RTC_CNTL_TOUCH_REFC : R/W ;bitpos:[11:9] ;default: 3'h0 ; */
+/*description: TOUCH pad0 reference cap.*/
+#define RTC_CNTL_TOUCH_REFC    0x00000007
+#define RTC_CNTL_TOUCH_REFC_M  ((RTC_CNTL_TOUCH_REFC_V)<<(RTC_CNTL_TOUCH_REFC_S))
+#define RTC_CNTL_TOUCH_REFC_V  0x7
+#define RTC_CNTL_TOUCH_REFC_S  9
+/* RTC_CNTL_TOUCH_XPD_BIAS : R/W ;bitpos:[8] ;default: 1'd0 ; */
+/*description: TOUCH_XPD_BIAS.*/
+#define RTC_CNTL_TOUCH_XPD_BIAS    (BIT(8))
+#define RTC_CNTL_TOUCH_XPD_BIAS_M  (BIT(8))
+#define RTC_CNTL_TOUCH_XPD_BIAS_V  0x1
+#define RTC_CNTL_TOUCH_XPD_BIAS_S  8
+/* RTC_CNTL_TOUCH_DREFH : R/W ;bitpos:[7:6] ;default: 2'b11 ; */
+/*description: TOUCH_DREFH.*/
+#define RTC_CNTL_TOUCH_DREFH    0x00000003
+#define RTC_CNTL_TOUCH_DREFH_M  ((RTC_CNTL_TOUCH_DREFH_V)<<(RTC_CNTL_TOUCH_DREFH_S))
+#define RTC_CNTL_TOUCH_DREFH_V  0x3
+#define RTC_CNTL_TOUCH_DREFH_S  6
+/* RTC_CNTL_TOUCH_DREFL : R/W ;bitpos:[5:4] ;default: 2'b00 ; */
+/*description: TOUCH_DREFL.*/
+#define RTC_CNTL_TOUCH_DREFL    0x00000003
+#define RTC_CNTL_TOUCH_DREFL_M  ((RTC_CNTL_TOUCH_DREFL_V)<<(RTC_CNTL_TOUCH_DREFL_S))
+#define RTC_CNTL_TOUCH_DREFL_V  0x3
+#define RTC_CNTL_TOUCH_DREFL_S  4
+/* RTC_CNTL_TOUCH_DRANGE : R/W ;bitpos:[3:2] ;default: 2'b11 ; */
+/*description: TOUCH_DRANGE.*/
+#define RTC_CNTL_TOUCH_DRANGE    0x00000003
+#define RTC_CNTL_TOUCH_DRANGE_M  ((RTC_CNTL_TOUCH_DRANGE_V)<<(RTC_CNTL_TOUCH_DRANGE_S))
+#define RTC_CNTL_TOUCH_DRANGE_V  0x3
+#define RTC_CNTL_TOUCH_DRANGE_S  2
+
+#define RTC_CNTL_TOUCH_SCAN_CTRL_REG          (DR_REG_RTCCNTL_BASE + 0x110)
+/* RTC_CNTL_TOUCH_OUT_RING : R/W ;bitpos:[31:28] ;default: 4'hf ; */
+/*description: select out ring pad.*/
+#define RTC_CNTL_TOUCH_OUT_RING    0x0000000F
+#define RTC_CNTL_TOUCH_OUT_RING_M  ((RTC_CNTL_TOUCH_OUT_RING_V)<<(RTC_CNTL_TOUCH_OUT_RING_S))
+#define RTC_CNTL_TOUCH_OUT_RING_V  0xF
+#define RTC_CNTL_TOUCH_OUT_RING_S  28
+/* RTC_CNTL_TOUCH_BUFDRV : R/W ;bitpos:[27:25] ;default: 3'h0 ; */
+/*description: touch7 buffer driver strength.*/
+#define RTC_CNTL_TOUCH_BUFDRV    0x00000007
+#define RTC_CNTL_TOUCH_BUFDRV_M  ((RTC_CNTL_TOUCH_BUFDRV_V)<<(RTC_CNTL_TOUCH_BUFDRV_S))
+#define RTC_CNTL_TOUCH_BUFDRV_V  0x7
+#define RTC_CNTL_TOUCH_BUFDRV_S  25
+/* RTC_CNTL_TOUCH_SCAN_PAD_MAP : R/W ;bitpos:[24:10] ;default: 15'h0 ; */
+/*description: touch scan mode pad enable map.*/
+#define RTC_CNTL_TOUCH_SCAN_PAD_MAP    0x00007FFF
+#define RTC_CNTL_TOUCH_SCAN_PAD_MAP_M  ((RTC_CNTL_TOUCH_SCAN_PAD_MAP_V)<<(RTC_CNTL_TOUCH_SCAN_PAD_MAP_S))
+#define RTC_CNTL_TOUCH_SCAN_PAD_MAP_V  0x7FFF
+#define RTC_CNTL_TOUCH_SCAN_PAD_MAP_S  10
+/* RTC_CNTL_TOUCH_SHIELD_PAD_EN : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: touch pad14 will be used as shield.*/
+#define RTC_CNTL_TOUCH_SHIELD_PAD_EN    (BIT(9))
+#define RTC_CNTL_TOUCH_SHIELD_PAD_EN_M  (BIT(9))
+#define RTC_CNTL_TOUCH_SHIELD_PAD_EN_V  0x1
+#define RTC_CNTL_TOUCH_SHIELD_PAD_EN_S  9
+/* RTC_CNTL_TOUCH_INACTIVE_CONNECTION : R/W ;bitpos:[8] ;default: 1'b1 ; */
+/*description: inactive touch pads connect to 1: gnd 0: HighZ.*/
+#define RTC_CNTL_TOUCH_INACTIVE_CONNECTION    (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_CONNECTION_M  (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_CONNECTION_V  0x1
+#define RTC_CNTL_TOUCH_INACTIVE_CONNECTION_S  8
+/* RTC_CNTL_TOUCH_DENOISE_EN : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: touch pad0 will be used to de-noise.*/
+#define RTC_CNTL_TOUCH_DENOISE_EN    (BIT(2))
+#define RTC_CNTL_TOUCH_DENOISE_EN_M  (BIT(2))
+#define RTC_CNTL_TOUCH_DENOISE_EN_V  0x1
+#define RTC_CNTL_TOUCH_DENOISE_EN_S  2
+/* RTC_CNTL_TOUCH_DENOISE_RES : R/W ;bitpos:[1:0] ;default: 2'd2 ; */
+/*description: De-noise resolution: 12/10/8/4 bit.*/
+#define RTC_CNTL_TOUCH_DENOISE_RES    0x00000003
+#define RTC_CNTL_TOUCH_DENOISE_RES_M  ((RTC_CNTL_TOUCH_DENOISE_RES_V)<<(RTC_CNTL_TOUCH_DENOISE_RES_S))
+#define RTC_CNTL_TOUCH_DENOISE_RES_V  0x3
+#define RTC_CNTL_TOUCH_DENOISE_RES_S  0
+
+#define RTC_CNTL_TOUCH_SLP_THRES_REG          (DR_REG_RTCCNTL_BASE + 0x114)
+/* RTC_CNTL_TOUCH_SLP_PAD : R/W ;bitpos:[31:27] ;default: 4'hf ; */
+/*description:  .*/
+#define RTC_CNTL_TOUCH_SLP_PAD    0x0000001F
+#define RTC_CNTL_TOUCH_SLP_PAD_M  ((RTC_CNTL_TOUCH_SLP_PAD_V)<<(RTC_CNTL_TOUCH_SLP_PAD_S))
+#define RTC_CNTL_TOUCH_SLP_PAD_V  0x1F
+#define RTC_CNTL_TOUCH_SLP_PAD_S  27
+/* RTC_CNTL_TOUCH_SLP_APPROACH_EN : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: sleep pad approach function enable.*/
+#define RTC_CNTL_TOUCH_SLP_APPROACH_EN    (BIT(26))
+#define RTC_CNTL_TOUCH_SLP_APPROACH_EN_M  (BIT(26))
+#define RTC_CNTL_TOUCH_SLP_APPROACH_EN_V  0x1
+#define RTC_CNTL_TOUCH_SLP_APPROACH_EN_S  26
+/* RTC_CNTL_TOUCH_SLP_TH : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: the threshold for sleep touch pad.*/
+#define RTC_CNTL_TOUCH_SLP_TH    0x003FFFFF
+#define RTC_CNTL_TOUCH_SLP_TH_M  ((RTC_CNTL_TOUCH_SLP_TH_V)<<(RTC_CNTL_TOUCH_SLP_TH_S))
+#define RTC_CNTL_TOUCH_SLP_TH_V  0x3FFFFF
+#define RTC_CNTL_TOUCH_SLP_TH_S  0
+
+#define RTC_CNTL_TOUCH_APPROACH_REG          (DR_REG_RTCCNTL_BASE + 0x118)
+/* RTC_CNTL_TOUCH_APPROACH_MEAS_TIME : R/W ;bitpos:[31:24] ;default: 8'd80 ; */
+/*description: approach pads total meas times.*/
+#define RTC_CNTL_TOUCH_APPROACH_MEAS_TIME    0x000000FF
+#define RTC_CNTL_TOUCH_APPROACH_MEAS_TIME_M  ((RTC_CNTL_TOUCH_APPROACH_MEAS_TIME_V)<<(RTC_CNTL_TOUCH_APPROACH_MEAS_TIME_S))
+#define RTC_CNTL_TOUCH_APPROACH_MEAS_TIME_V  0xFF
+#define RTC_CNTL_TOUCH_APPROACH_MEAS_TIME_S  24
+/* RTC_CNTL_TOUCH_SLP_CHANNEL_CLR : WO ;bitpos:[23] ;default: 1'd0 ; */
+/*description: clear touch slp channel.*/
+#define RTC_CNTL_TOUCH_SLP_CHANNEL_CLR    (BIT(23))
+#define RTC_CNTL_TOUCH_SLP_CHANNEL_CLR_M  (BIT(23))
+#define RTC_CNTL_TOUCH_SLP_CHANNEL_CLR_V  0x1
+#define RTC_CNTL_TOUCH_SLP_CHANNEL_CLR_S  23
+
+#define RTC_CNTL_TOUCH_FILTER_CTRL_REG          (DR_REG_RTCCNTL_BASE + 0x11C)
+/* RTC_CNTL_TOUCH_FILTER_EN : R/W ;bitpos:[31] ;default: 1'b1 ; */
+/*description: touch filter enable.*/
+#define RTC_CNTL_TOUCH_FILTER_EN    (BIT(31))
+#define RTC_CNTL_TOUCH_FILTER_EN_M  (BIT(31))
+#define RTC_CNTL_TOUCH_FILTER_EN_V  0x1
+#define RTC_CNTL_TOUCH_FILTER_EN_S  31
+/* RTC_CNTL_TOUCH_FILTER_MODE : R/W ;bitpos:[30:28] ;default: 3'd1 ; */
+/*description: 0: IIR ? 1: IIR ? 2: IIR 1/8 3: Jitter.*/
+#define RTC_CNTL_TOUCH_FILTER_MODE    0x00000007
+#define RTC_CNTL_TOUCH_FILTER_MODE_M  ((RTC_CNTL_TOUCH_FILTER_MODE_V)<<(RTC_CNTL_TOUCH_FILTER_MODE_S))
+#define RTC_CNTL_TOUCH_FILTER_MODE_V  0x7
+#define RTC_CNTL_TOUCH_FILTER_MODE_S  28
+/* RTC_CNTL_TOUCH_DEBOUNCE : R/W ;bitpos:[27:25] ;default: 3'd3 ; */
+/*description: debounce counter.*/
+#define RTC_CNTL_TOUCH_DEBOUNCE    0x00000007
+#define RTC_CNTL_TOUCH_DEBOUNCE_M  ((RTC_CNTL_TOUCH_DEBOUNCE_V)<<(RTC_CNTL_TOUCH_DEBOUNCE_S))
+#define RTC_CNTL_TOUCH_DEBOUNCE_V  0x7
+#define RTC_CNTL_TOUCH_DEBOUNCE_S  25
+/* RTC_CNTL_TOUCH_CONFIG3 : R/W ;bitpos:[24:23] ;default: 2'd1 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_CONFIG3 0x00000003
+#define RTC_CNTL_TOUCH_CONFIG3_M ((RTC_CNTL_TOUCH_CONFIG3_V) << (RTC_CNTL_TOUCH_CONFIG3_S))
+#define RTC_CNTL_TOUCH_CONFIG3_V 0x3
+#define RTC_CNTL_TOUCH_CONFIG3_S 23
+/* RTC_CNTL_TOUCH_NOISE_THRES : R/W ;bitpos:[22:21] ;default: 2'd1 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_NOISE_THRES    0x00000003
+#define RTC_CNTL_TOUCH_NOISE_THRES_M  ((RTC_CNTL_TOUCH_NOISE_THRES_V)<<(RTC_CNTL_TOUCH_NOISE_THRES_S))
+#define RTC_CNTL_TOUCH_NOISE_THRES_V  0x3
+#define RTC_CNTL_TOUCH_NOISE_THRES_S  21
+/* RTC_CNTL_TOUCH_CONFIG2 : R/W ;bitpos:[20:19] ;default: 2'd1 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_CONFIG2 0x00000003
+#define RTC_CNTL_TOUCH_CONFIG2_M ((RTC_CNTL_TOUCH_CONFIG2_V) << (RTC_CNTL_TOUCH_CONFIG2_S))
+#define RTC_CNTL_TOUCH_CONFIG2_V 0x3
+#define RTC_CNTL_TOUCH_CONFIG2_S 19
+/* RTC_CNTL_TOUCH_CONFIG1 : R/W ;bitpos:[18:15] ;default: 4'd5 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_CONFIG1 0x0000000F
+#define RTC_CNTL_TOUCH_CONFIG1_M ((RTC_CNTL_TOUCH_CONFIG1_V) << (RTC_CNTL_TOUCH_CONFIG1_S))
+#define RTC_CNTL_TOUCH_CONFIG1_V 0xF
+#define RTC_CNTL_TOUCH_CONFIG1_S 15
+/* RTC_CNTL_TOUCH_JITTER_STEP : R/W ;bitpos:[14:11] ;default: 4'd1 ; */
+/*description: touch jitter step.*/
+#define RTC_CNTL_TOUCH_JITTER_STEP    0x0000000F
+#define RTC_CNTL_TOUCH_JITTER_STEP_M  ((RTC_CNTL_TOUCH_JITTER_STEP_V)<<(RTC_CNTL_TOUCH_JITTER_STEP_S))
+#define RTC_CNTL_TOUCH_JITTER_STEP_V  0xF
+#define RTC_CNTL_TOUCH_JITTER_STEP_S  11
+/* RTC_CNTL_TOUCH_SMOOTH_LVL : R/W ;bitpos:[10:9] ;default: 2'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_SMOOTH_LVL    0x00000003
+#define RTC_CNTL_TOUCH_SMOOTH_LVL_M  ((RTC_CNTL_TOUCH_SMOOTH_LVL_V)<<(RTC_CNTL_TOUCH_SMOOTH_LVL_S))
+#define RTC_CNTL_TOUCH_SMOOTH_LVL_V  0x3
+#define RTC_CNTL_TOUCH_SMOOTH_LVL_S  9
+/* RTC_CNTL_TOUCH_BYPASS_NOISE_THRES : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_BYPASS_NOISE_THRES    (BIT(8))
+#define RTC_CNTL_TOUCH_BYPASS_NOISE_THRES_M  (BIT(8))
+#define RTC_CNTL_TOUCH_BYPASS_NOISE_THRES_V  0x1
+#define RTC_CNTL_TOUCH_BYPASS_NOISE_THRES_S  8
+/* RTC_CNTL_TOUCH_BYPASS_NEG_THRES : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_BYPASS_NEG_THRES (BIT(7))
+#define RTC_CNTL_TOUCH_BYPASS_NEG_THRES_M (BIT(7))
+#define RTC_CNTL_TOUCH_BYPASS_NEG_THRES_V 0x1
+#define RTC_CNTL_TOUCH_BYPASS_NEG_THRES_S 7
+
+#define RTC_CNTL_USB_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x120)
+/* RTC_CNTL_SW_HW_USB_PHY_SEL : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_SW_HW_USB_PHY_SEL    (BIT(20))
+#define RTC_CNTL_SW_HW_USB_PHY_SEL_M  (BIT(20))
+#define RTC_CNTL_SW_HW_USB_PHY_SEL_V  0x1
+#define RTC_CNTL_SW_HW_USB_PHY_SEL_S  20
+/* RTC_CNTL_SW_USB_PHY_SEL : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_SW_USB_PHY_SEL    (BIT(19))
+#define RTC_CNTL_SW_USB_PHY_SEL_M  (BIT(19))
+#define RTC_CNTL_SW_USB_PHY_SEL_V  0x1
+#define RTC_CNTL_SW_USB_PHY_SEL_S  19
+/* RTC_CNTL_IO_MUX_RESET_DISABLE : R/W ;bitpos:[18] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_IO_MUX_RESET_DISABLE    (BIT(18))
+#define RTC_CNTL_IO_MUX_RESET_DISABLE_M  (BIT(18))
+#define RTC_CNTL_IO_MUX_RESET_DISABLE_V  0x1
+#define RTC_CNTL_IO_MUX_RESET_DISABLE_S  18
+/* RTC_CNTL_USB_RESET_DISABLE : R/W ;bitpos:[17] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_RESET_DISABLE    (BIT(17))
+#define RTC_CNTL_USB_RESET_DISABLE_M  (BIT(17))
+#define RTC_CNTL_USB_RESET_DISABLE_V  0x1
+#define RTC_CNTL_USB_RESET_DISABLE_S  17
+/* RTC_CNTL_USB_TX_EN_OVERRIDE : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_TX_EN_OVERRIDE    (BIT(16))
+#define RTC_CNTL_USB_TX_EN_OVERRIDE_M  (BIT(16))
+#define RTC_CNTL_USB_TX_EN_OVERRIDE_V  0x1
+#define RTC_CNTL_USB_TX_EN_OVERRIDE_S  16
+/* RTC_CNTL_USB_TX_EN : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_TX_EN    (BIT(15))
+#define RTC_CNTL_USB_TX_EN_M  (BIT(15))
+#define RTC_CNTL_USB_TX_EN_V  0x1
+#define RTC_CNTL_USB_TX_EN_S  15
+/* RTC_CNTL_USB_TXP : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_TXP    (BIT(14))
+#define RTC_CNTL_USB_TXP_M  (BIT(14))
+#define RTC_CNTL_USB_TXP_V  0x1
+#define RTC_CNTL_USB_TXP_S  14
+/* RTC_CNTL_USB_TXM : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_TXM    (BIT(13))
+#define RTC_CNTL_USB_TXM_M  (BIT(13))
+#define RTC_CNTL_USB_TXM_V  0x1
+#define RTC_CNTL_USB_TXM_S  13
+/* RTC_CNTL_USB_PAD_ENABLE : R/W ;bitpos:[12] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_PAD_ENABLE    (BIT(12))
+#define RTC_CNTL_USB_PAD_ENABLE_M  (BIT(12))
+#define RTC_CNTL_USB_PAD_ENABLE_V  0x1
+#define RTC_CNTL_USB_PAD_ENABLE_S  12
+/* RTC_CNTL_USB_PAD_ENABLE_OVERRIDE : R/W ;bitpos:[11] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_PAD_ENABLE_OVERRIDE    (BIT(11))
+#define RTC_CNTL_USB_PAD_ENABLE_OVERRIDE_M  (BIT(11))
+#define RTC_CNTL_USB_PAD_ENABLE_OVERRIDE_V  0x1
+#define RTC_CNTL_USB_PAD_ENABLE_OVERRIDE_S  11
+/* RTC_CNTL_USB_PULLUP_VALUE : R/W ;bitpos:[10] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_PULLUP_VALUE    (BIT(10))
+#define RTC_CNTL_USB_PULLUP_VALUE_M  (BIT(10))
+#define RTC_CNTL_USB_PULLUP_VALUE_V  0x1
+#define RTC_CNTL_USB_PULLUP_VALUE_S  10
+/* RTC_CNTL_USB_DM_PULLDOWN : R/W ;bitpos:[9] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_DM_PULLDOWN    (BIT(9))
+#define RTC_CNTL_USB_DM_PULLDOWN_M  (BIT(9))
+#define RTC_CNTL_USB_DM_PULLDOWN_V  0x1
+#define RTC_CNTL_USB_DM_PULLDOWN_S  9
+/* RTC_CNTL_USB_DM_PULLUP : R/W ;bitpos:[8] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_DM_PULLUP    (BIT(8))
+#define RTC_CNTL_USB_DM_PULLUP_M  (BIT(8))
+#define RTC_CNTL_USB_DM_PULLUP_V  0x1
+#define RTC_CNTL_USB_DM_PULLUP_S  8
+/* RTC_CNTL_USB_DP_PULLDOWN : R/W ;bitpos:[7] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_DP_PULLDOWN    (BIT(7))
+#define RTC_CNTL_USB_DP_PULLDOWN_M  (BIT(7))
+#define RTC_CNTL_USB_DP_PULLDOWN_V  0x1
+#define RTC_CNTL_USB_DP_PULLDOWN_S  7
+/* RTC_CNTL_USB_DP_PULLUP : R/W ;bitpos:[6] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_DP_PULLUP    (BIT(6))
+#define RTC_CNTL_USB_DP_PULLUP_M  (BIT(6))
+#define RTC_CNTL_USB_DP_PULLUP_V  0x1
+#define RTC_CNTL_USB_DP_PULLUP_S  6
+/* RTC_CNTL_USB_PAD_PULL_OVERRIDE : R/W ;bitpos:[5] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_PAD_PULL_OVERRIDE    (BIT(5))
+#define RTC_CNTL_USB_PAD_PULL_OVERRIDE_M  (BIT(5))
+#define RTC_CNTL_USB_PAD_PULL_OVERRIDE_V  0x1
+#define RTC_CNTL_USB_PAD_PULL_OVERRIDE_S  5
+/* RTC_CNTL_USB_VREF_OVERRIDE : R/W ;bitpos:[4] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_VREF_OVERRIDE    (BIT(4))
+#define RTC_CNTL_USB_VREF_OVERRIDE_M  (BIT(4))
+#define RTC_CNTL_USB_VREF_OVERRIDE_V  0x1
+#define RTC_CNTL_USB_VREF_OVERRIDE_S  4
+/* RTC_CNTL_USB_VREFL : R/W ;bitpos:[3:2] ;default: 2'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_VREFL    0x00000003
+#define RTC_CNTL_USB_VREFL_M  ((RTC_CNTL_USB_VREFL_V)<<(RTC_CNTL_USB_VREFL_S))
+#define RTC_CNTL_USB_VREFL_V  0x3
+#define RTC_CNTL_USB_VREFL_S  2
+/* RTC_CNTL_USB_VREFH : R/W ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: .*/
+#define RTC_CNTL_USB_VREFH    0x00000003
+#define RTC_CNTL_USB_VREFH_M  ((RTC_CNTL_USB_VREFH_V)<<(RTC_CNTL_USB_VREFH_S))
+#define RTC_CNTL_USB_VREFH_V  0x3
+#define RTC_CNTL_USB_VREFH_S  0
+
+#define RTC_CNTL_TOUCH_TIMEOUT_CTRL_REG          (DR_REG_RTCCNTL_BASE + 0x124)
+/* RTC_CNTL_TOUCH_TIMEOUT_EN : R/W ;bitpos:[22] ;default: 1'b1 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_TIMEOUT_EN    (BIT(22))
+#define RTC_CNTL_TOUCH_TIMEOUT_EN_M  (BIT(22))
+#define RTC_CNTL_TOUCH_TIMEOUT_EN_V  0x1
+#define RTC_CNTL_TOUCH_TIMEOUT_EN_S  22
+/* RTC_CNTL_TOUCH_TIMEOUT_NUM : R/W ;bitpos:[21:0] ;default: 22'h3fffff ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_TIMEOUT_NUM    0x003FFFFF
+#define RTC_CNTL_TOUCH_TIMEOUT_NUM_M  ((RTC_CNTL_TOUCH_TIMEOUT_NUM_V)<<(RTC_CNTL_TOUCH_TIMEOUT_NUM_S))
+#define RTC_CNTL_TOUCH_TIMEOUT_NUM_V  0x3FFFFF
+#define RTC_CNTL_TOUCH_TIMEOUT_NUM_S  0
+
+#define RTC_CNTL_SLP_REJECT_CAUSE_REG          (DR_REG_RTCCNTL_BASE + 0x128)
+/* RTC_CNTL_REJECT_CAUSE : RO ;bitpos:[17:0] ;default: 18'd0 ; */
+/*description: sleep reject cause.*/
+#define RTC_CNTL_REJECT_CAUSE    0x0003FFFF
+#define RTC_CNTL_REJECT_CAUSE_M  ((RTC_CNTL_REJECT_CAUSE_V)<<(RTC_CNTL_REJECT_CAUSE_S))
+#define RTC_CNTL_REJECT_CAUSE_V  0x3FFFF
+#define RTC_CNTL_REJECT_CAUSE_S  0
+
+#define RTC_CNTL_OPTION1_REG          (DR_REG_RTCCNTL_BASE + 0x12C)
+/* RTC_CNTL_FORCE_DOWNLOAD_BOOT : R/W ;bitpos:[0] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_FORCE_DOWNLOAD_BOOT    (BIT(0))
+#define RTC_CNTL_FORCE_DOWNLOAD_BOOT_M  (BIT(0))
+#define RTC_CNTL_FORCE_DOWNLOAD_BOOT_V  0x1
+#define RTC_CNTL_FORCE_DOWNLOAD_BOOT_S  0
+
+#define RTC_CNTL_SLP_WAKEUP_CAUSE_REG          (DR_REG_RTCCNTL_BASE + 0x130)
+/* RTC_CNTL_WAKEUP_CAUSE : RO ;bitpos:[16:0] ;default: 17'd0 ; */
+/*description: sleep wakeup cause.*/
+#define RTC_CNTL_WAKEUP_CAUSE    0x0001FFFF
+#define RTC_CNTL_WAKEUP_CAUSE_M  ((RTC_CNTL_WAKEUP_CAUSE_V)<<(RTC_CNTL_WAKEUP_CAUSE_S))
+#define RTC_CNTL_WAKEUP_CAUSE_V  0x1FFFF
+#define RTC_CNTL_WAKEUP_CAUSE_S  0
+
+#define RTC_CNTL_ULP_CP_TIMER_1_REG          (DR_REG_RTCCNTL_BASE + 0x134)
+/* RTC_CNTL_ULP_CP_TIMER_SLP_CYCLE : R/W ;bitpos:[31:8] ;default: 24'd200 ; */
+/*description: sleep cycles for ULP-coprocessor timer.*/
+#define RTC_CNTL_ULP_CP_TIMER_SLP_CYCLE    0x00FFFFFF
+#define RTC_CNTL_ULP_CP_TIMER_SLP_CYCLE_M  ((RTC_CNTL_ULP_CP_TIMER_SLP_CYCLE_V)<<(RTC_CNTL_ULP_CP_TIMER_SLP_CYCLE_S))
+#define RTC_CNTL_ULP_CP_TIMER_SLP_CYCLE_V  0xFFFFFF
+#define RTC_CNTL_ULP_CP_TIMER_SLP_CYCLE_S  8
+
+#define RTC_CNTL_INT_ENA_W1TS_REG          (DR_REG_RTCCNTL_BASE + 0x138)
+/* RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TS : WO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TS    (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TS_M  (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TS_S  20
+/* RTC_CNTL_GLITCH_DET_INT_ENA_W1TS : WO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: enbale gitch det interrupt.*/
+#define RTC_CNTL_GLITCH_DET_INT_ENA_W1TS    (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_ENA_W1TS_M  (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_GLITCH_DET_INT_ENA_W1TS_S  19
+/* RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_W1TS : WO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: enable touch timeout interrupt.*/
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_W1TS    (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_W1TS_M  (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_W1TS_S  18
+/* RTC_CNTL_COCPU_TRAP_INT_ENA_W1TS : WO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: enable cocpu trap interrupt.*/
+#define RTC_CNTL_COCPU_TRAP_INT_ENA_W1TS    (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_ENA_W1TS_M  (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_COCPU_TRAP_INT_ENA_W1TS_S  17
+/* RTC_CNTL_XTAL32K_DEAD_INT_ENA_W1TS : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: enable xtal32k_dead  interrupt.*/
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA_W1TS    (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA_W1TS_M  (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA_W1TS_S  16
+/* RTC_CNTL_SWD_INT_ENA_W1TS : WO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: enable super watch dog interrupt.*/
+#define RTC_CNTL_SWD_INT_ENA_W1TS    (BIT(15))
+#define RTC_CNTL_SWD_INT_ENA_W1TS_M  (BIT(15))
+#define RTC_CNTL_SWD_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_SWD_INT_ENA_W1TS_S  15
+/* RTC_CNTL_SARADC2_INT_ENA_W1TS : WO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: enable saradc2 interrupt.*/
+#define RTC_CNTL_SARADC2_INT_ENA_W1TS    (BIT(14))
+#define RTC_CNTL_SARADC2_INT_ENA_W1TS_M  (BIT(14))
+#define RTC_CNTL_SARADC2_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_SARADC2_INT_ENA_W1TS_S  14
+/* RTC_CNTL_COCPU_INT_ENA_W1TS : WO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: enable riscV cocpu interrupt.*/
+#define RTC_CNTL_COCPU_INT_ENA_W1TS    (BIT(13))
+#define RTC_CNTL_COCPU_INT_ENA_W1TS_M  (BIT(13))
+#define RTC_CNTL_COCPU_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_COCPU_INT_ENA_W1TS_S  13
+/* RTC_CNTL_TSENS_INT_ENA_W1TS : WO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: enable tsens interrupt.*/
+#define RTC_CNTL_TSENS_INT_ENA_W1TS    (BIT(12))
+#define RTC_CNTL_TSENS_INT_ENA_W1TS_M  (BIT(12))
+#define RTC_CNTL_TSENS_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_TSENS_INT_ENA_W1TS_S  12
+/* RTC_CNTL_SARADC1_INT_ENA_W1TS : WO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: enable saradc1 interrupt.*/
+#define RTC_CNTL_SARADC1_INT_ENA_W1TS    (BIT(11))
+#define RTC_CNTL_SARADC1_INT_ENA_W1TS_M  (BIT(11))
+#define RTC_CNTL_SARADC1_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_SARADC1_INT_ENA_W1TS_S  11
+/* RTC_CNTL_MAIN_TIMER_INT_ENA_W1TS : WO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: enable RTC main timer interrupt.*/
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_W1TS    (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_W1TS_M  (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_W1TS_S  10
+/* RTC_CNTL_BROWN_OUT_INT_ENA_W1TS : WO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: enable brown out interrupt.*/
+#define RTC_CNTL_BROWN_OUT_INT_ENA_W1TS    (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_ENA_W1TS_M  (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_BROWN_OUT_INT_ENA_W1TS_S  9
+/* RTC_CNTL_TOUCH_INACTIVE_INT_ENA_W1TS : WO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: enable touch inactive interrupt.*/
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA_W1TS    (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA_W1TS_M  (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA_W1TS_S  8
+/* RTC_CNTL_TOUCH_ACTIVE_INT_ENA_W1TS : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: enable touch active interrupt.*/
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA_W1TS    (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA_W1TS_M  (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA_W1TS_S  7
+/* RTC_CNTL_TOUCH_DONE_INT_ENA_W1TS : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: enable touch done interrupt.*/
+#define RTC_CNTL_TOUCH_DONE_INT_ENA_W1TS    (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_ENA_W1TS_M  (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_TOUCH_DONE_INT_ENA_W1TS_S  6
+/* RTC_CNTL_ULP_CP_INT_ENA_W1TS : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: enable ULP-coprocessor interrupt.*/
+#define RTC_CNTL_ULP_CP_INT_ENA_W1TS    (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_ENA_W1TS_M  (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_ULP_CP_INT_ENA_W1TS_S  5
+/* RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_W1TS : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: enable touch scan done interrupt.*/
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_W1TS    (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_W1TS_M  (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_W1TS_S  4
+/* RTC_CNTL_WDT_INT_ENA_W1TS : WO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: enable RTC WDT interrupt.*/
+#define RTC_CNTL_WDT_INT_ENA_W1TS    (BIT(3))
+#define RTC_CNTL_WDT_INT_ENA_W1TS_M  (BIT(3))
+#define RTC_CNTL_WDT_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_WDT_INT_ENA_W1TS_S  3
+/* RTC_CNTL_SDIO_IDLE_INT_ENA_W1TS : WO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: enable SDIO idle interrupt.*/
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_W1TS    (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_W1TS_M  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_W1TS_S  2
+/* RTC_CNTL_SLP_REJECT_INT_ENA_W1TS : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: enable sleep reject interrupt.*/
+#define RTC_CNTL_SLP_REJECT_INT_ENA_W1TS    (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ENA_W1TS_M  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_SLP_REJECT_INT_ENA_W1TS_S  1
+/* RTC_CNTL_SLP_WAKEUP_INT_ENA_W1TS : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: enable sleep wakeup interrupt.*/
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_W1TS    (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_W1TS_M  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_W1TS_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_W1TS_S  0
+
+#define RTC_CNTL_INT_ENA_W1TC_REG          (DR_REG_RTCCNTL_BASE + 0x13C)
+/* RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TC : WO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TC    (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TC_M  (BIT(20))
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TC_S  20
+/* RTC_CNTL_GLITCH_DET_INT_ENA_W1TC : WO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: enbale gitch det interrupt.*/
+#define RTC_CNTL_GLITCH_DET_INT_ENA_W1TC    (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_ENA_W1TC_M  (BIT(19))
+#define RTC_CNTL_GLITCH_DET_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_GLITCH_DET_INT_ENA_W1TC_S  19
+/* RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_W1TC : WO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: enable touch timeout interrupt.*/
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_W1TC    (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_W1TC_M  (BIT(18))
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_TOUCH_TIMEOUT_INT_ENA_W1TC_S  18
+/* RTC_CNTL_COCPU_TRAP_INT_ENA_W1TC : WO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: enable cocpu trap interrupt.*/
+#define RTC_CNTL_COCPU_TRAP_INT_ENA_W1TC    (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_ENA_W1TC_M  (BIT(17))
+#define RTC_CNTL_COCPU_TRAP_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_COCPU_TRAP_INT_ENA_W1TC_S  17
+/* RTC_CNTL_XTAL32K_DEAD_INT_ENA_W1TC : WO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: enable xtal32k_dead  interrupt.*/
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA_W1TC    (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA_W1TC_M  (BIT(16))
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_XTAL32K_DEAD_INT_ENA_W1TC_S  16
+/* RTC_CNTL_SWD_INT_ENA_W1TC : WO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: enable super watch dog interrupt.*/
+#define RTC_CNTL_SWD_INT_ENA_W1TC    (BIT(15))
+#define RTC_CNTL_SWD_INT_ENA_W1TC_M  (BIT(15))
+#define RTC_CNTL_SWD_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_SWD_INT_ENA_W1TC_S  15
+/* RTC_CNTL_SARADC2_INT_ENA_W1TC : WO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: enable saradc2 interrupt.*/
+#define RTC_CNTL_SARADC2_INT_ENA_W1TC    (BIT(14))
+#define RTC_CNTL_SARADC2_INT_ENA_W1TC_M  (BIT(14))
+#define RTC_CNTL_SARADC2_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_SARADC2_INT_ENA_W1TC_S  14
+/* RTC_CNTL_COCPU_INT_ENA_W1TC : WO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: enable riscV cocpu interrupt.*/
+#define RTC_CNTL_COCPU_INT_ENA_W1TC    (BIT(13))
+#define RTC_CNTL_COCPU_INT_ENA_W1TC_M  (BIT(13))
+#define RTC_CNTL_COCPU_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_COCPU_INT_ENA_W1TC_S  13
+/* RTC_CNTL_TSENS_INT_ENA_W1TC : WO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: enable tsens interrupt.*/
+#define RTC_CNTL_TSENS_INT_ENA_W1TC    (BIT(12))
+#define RTC_CNTL_TSENS_INT_ENA_W1TC_M  (BIT(12))
+#define RTC_CNTL_TSENS_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_TSENS_INT_ENA_W1TC_S  12
+/* RTC_CNTL_SARADC1_INT_ENA_W1TC : WO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: enable saradc1 interrupt.*/
+#define RTC_CNTL_SARADC1_INT_ENA_W1TC    (BIT(11))
+#define RTC_CNTL_SARADC1_INT_ENA_W1TC_M  (BIT(11))
+#define RTC_CNTL_SARADC1_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_SARADC1_INT_ENA_W1TC_S  11
+/* RTC_CNTL_MAIN_TIMER_INT_ENA_W1TC : WO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: enable RTC main timer interrupt.*/
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_W1TC    (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_W1TC_M  (BIT(10))
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_W1TC_S  10
+/* RTC_CNTL_BROWN_OUT_INT_ENA_W1TC : WO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: enable brown out interrupt.*/
+#define RTC_CNTL_BROWN_OUT_INT_ENA_W1TC    (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_ENA_W1TC_M  (BIT(9))
+#define RTC_CNTL_BROWN_OUT_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_BROWN_OUT_INT_ENA_W1TC_S  9
+/* RTC_CNTL_TOUCH_INACTIVE_INT_ENA_W1TC : WO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: enable touch inactive interrupt.*/
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA_W1TC    (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA_W1TC_M  (BIT(8))
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_TOUCH_INACTIVE_INT_ENA_W1TC_S  8
+/* RTC_CNTL_TOUCH_ACTIVE_INT_ENA_W1TC : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: enable touch active interrupt.*/
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA_W1TC    (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA_W1TC_M  (BIT(7))
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_TOUCH_ACTIVE_INT_ENA_W1TC_S  7
+/* RTC_CNTL_TOUCH_DONE_INT_ENA_W1TC : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: enable touch done interrupt.*/
+#define RTC_CNTL_TOUCH_DONE_INT_ENA_W1TC    (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_ENA_W1TC_M  (BIT(6))
+#define RTC_CNTL_TOUCH_DONE_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_TOUCH_DONE_INT_ENA_W1TC_S  6
+/* RTC_CNTL_ULP_CP_INT_ENA_W1TC : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: enable ULP-coprocessor interrupt.*/
+#define RTC_CNTL_ULP_CP_INT_ENA_W1TC    (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_ENA_W1TC_M  (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_ULP_CP_INT_ENA_W1TC_S  5
+/* RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_W1TC : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: enable touch scan done interrupt.*/
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_W1TC    (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_W1TC_M  (BIT(4))
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_TOUCH_SCAN_DONE_INT_ENA_W1TC_S  4
+/* RTC_CNTL_WDT_INT_ENA_W1TC : WO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: enable RTC WDT interrupt.*/
+#define RTC_CNTL_WDT_INT_ENA_W1TC    (BIT(3))
+#define RTC_CNTL_WDT_INT_ENA_W1TC_M  (BIT(3))
+#define RTC_CNTL_WDT_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_WDT_INT_ENA_W1TC_S  3
+/* RTC_CNTL_SDIO_IDLE_INT_ENA_W1TC : WO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: enable SDIO idle interrupt.*/
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_W1TC    (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_W1TC_M  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_W1TC_S  2
+/* RTC_CNTL_SLP_REJECT_INT_ENA_W1TC : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: enable sleep reject interrupt.*/
+#define RTC_CNTL_SLP_REJECT_INT_ENA_W1TC    (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ENA_W1TC_M  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_SLP_REJECT_INT_ENA_W1TC_S  1
+/* RTC_CNTL_SLP_WAKEUP_INT_ENA_W1TC : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: enable sleep wakeup interrupt.*/
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_W1TC    (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_W1TC_M  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_W1TC_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_W1TC_S  0
+
+#define RTC_CNTL_RETENTION_CTRL_REG          (DR_REG_RTCCNTL_BASE + 0x140)
+/* RTC_CNTL_RETENTION_WAIT : R/W ;bitpos:[31:25] ;default: 7'd20 ; */
+/*description: wait cycles for rention operation.*/
+#define RTC_CNTL_RETENTION_WAIT    0x0000007F
+#define RTC_CNTL_RETENTION_WAIT_M  ((RTC_CNTL_RETENTION_WAIT_V)<<(RTC_CNTL_RETENTION_WAIT_S))
+#define RTC_CNTL_RETENTION_WAIT_V  0x7F
+#define RTC_CNTL_RETENTION_WAIT_S  25
+/* RTC_CNTL_RETENTION_EN : R/W ;bitpos:[24] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_CNTL_RETENTION_EN    (BIT(24))
+#define RTC_CNTL_RETENTION_EN_M  (BIT(24))
+#define RTC_CNTL_RETENTION_EN_V  0x1
+#define RTC_CNTL_RETENTION_EN_S  24
+/* RTC_CNTL_RETENTION_CLKOFF_WAIT : R/W ;bitpos:[23:20] ;default: 4'd3 ; */
+/*description: .*/
+#define RTC_CNTL_RETENTION_CLKOFF_WAIT    0x0000000F
+#define RTC_CNTL_RETENTION_CLKOFF_WAIT_M  ((RTC_CNTL_RETENTION_CLKOFF_WAIT_V)<<(RTC_CNTL_RETENTION_CLKOFF_WAIT_S))
+#define RTC_CNTL_RETENTION_CLKOFF_WAIT_V  0xF
+#define RTC_CNTL_RETENTION_CLKOFF_WAIT_S  20
+/* RTC_CNTL_RETENTION_DONE_WAIT : R/W ;bitpos:[19:17] ;default: 3'd2 ; */
+/*description: .*/
+#define RTC_CNTL_RETENTION_DONE_WAIT    0x00000007
+#define RTC_CNTL_RETENTION_DONE_WAIT_M  ((RTC_CNTL_RETENTION_DONE_WAIT_V)<<(RTC_CNTL_RETENTION_DONE_WAIT_S))
+#define RTC_CNTL_RETENTION_DONE_WAIT_V  0x7
+#define RTC_CNTL_RETENTION_DONE_WAIT_S  17
+/* RTC_CNTL_RETENTION_CLK_SEL : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_RETENTION_CLK_SEL    (BIT(16))
+#define RTC_CNTL_RETENTION_CLK_SEL_M  (BIT(16))
+#define RTC_CNTL_RETENTION_CLK_SEL_V  0x1
+#define RTC_CNTL_RETENTION_CLK_SEL_S  16
+/* RTC_CNTL_RETENTION_TARGET : R/W ;bitpos:[15:14] ;default: 2'b0 ; */
+/*description: .*/
+#define RTC_CNTL_RETENTION_TARGET    0x00000003
+#define RTC_CNTL_RETENTION_TARGET_M  ((RTC_CNTL_RETENTION_TARGET_V)<<(RTC_CNTL_RETENTION_TARGET_S))
+#define RTC_CNTL_RETENTION_TARGET_V  0x3
+#define RTC_CNTL_RETENTION_TARGET_S  14
+/* RTC_CNTL_RETENTION_TAG_MODE : R/W ;bitpos:[13:10] ;default: 4'd0 ; */
+/*description: .*/
+#define RTC_CNTL_RETENTION_TAG_MODE    0x0000000F
+#define RTC_CNTL_RETENTION_TAG_MODE_M  ((RTC_CNTL_RETENTION_TAG_MODE_V)<<(RTC_CNTL_RETENTION_TAG_MODE_S))
+#define RTC_CNTL_RETENTION_TAG_MODE_V  0xF
+#define RTC_CNTL_RETENTION_TAG_MODE_S  10
+
+#define RTC_CNTL_PG_CTRL_REG          (DR_REG_RTCCNTL_BASE + 0x144)
+/* RTC_CNTL_POWER_GLITCH_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_POWER_GLITCH_EN    (BIT(31))
+#define RTC_CNTL_POWER_GLITCH_EN_M  (BIT(31))
+#define RTC_CNTL_POWER_GLITCH_EN_V  0x1
+#define RTC_CNTL_POWER_GLITCH_EN_S  31
+/* RTC_CNTL_POWER_GLITCH_EFUSE_SEL : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: select use analog fib signal.*/
+#define RTC_CNTL_POWER_GLITCH_EFUSE_SEL    (BIT(30))
+#define RTC_CNTL_POWER_GLITCH_EFUSE_SEL_M  (BIT(30))
+#define RTC_CNTL_POWER_GLITCH_EFUSE_SEL_V  0x1
+#define RTC_CNTL_POWER_GLITCH_EFUSE_SEL_S  30
+/* RTC_CNTL_POWER_GLITCH_FORCE_PU : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_POWER_GLITCH_FORCE_PU    (BIT(29))
+#define RTC_CNTL_POWER_GLITCH_FORCE_PU_M  (BIT(29))
+#define RTC_CNTL_POWER_GLITCH_FORCE_PU_V  0x1
+#define RTC_CNTL_POWER_GLITCH_FORCE_PU_S  29
+/* RTC_CNTL_POWER_GLITCH_FORCE_PD : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_POWER_GLITCH_FORCE_PD    (BIT(28))
+#define RTC_CNTL_POWER_GLITCH_FORCE_PD_M  (BIT(28))
+#define RTC_CNTL_POWER_GLITCH_FORCE_PD_V  0x1
+#define RTC_CNTL_POWER_GLITCH_FORCE_PD_S  28
+/* RTC_CNTL_POWER_GLITCH_DSENSE : R/W ;bitpos:[27:26] ;default: 2'b0 ; */
+/*description: .*/
+#define RTC_CNTL_POWER_GLITCH_DSENSE    0x00000003
+#define RTC_CNTL_POWER_GLITCH_DSENSE_M  ((RTC_CNTL_POWER_GLITCH_DSENSE_V)<<(RTC_CNTL_POWER_GLITCH_DSENSE_S))
+#define RTC_CNTL_POWER_GLITCH_DSENSE_V  0x3
+#define RTC_CNTL_POWER_GLITCH_DSENSE_S  26
+
+#define RTC_CNTL_FIB_SEL_REG          (DR_REG_RTCCNTL_BASE + 0x148)
+/* RTC_CNTL_FIB_SEL : R/W ;bitpos:[2:0] ;default: 3'd7 ; */
+/*description: .*/
+#define RTC_CNTL_FIB_SEL    0x00000007
+#define RTC_CNTL_FIB_SEL_M  ((RTC_CNTL_FIB_SEL_V)<<(RTC_CNTL_FIB_SEL_S))
+#define RTC_CNTL_FIB_SEL_V  0x7
+#define RTC_CNTL_FIB_SEL_S  0
+
+#define RTC_CNTL_FIB_GLITCH_RST BIT(0)
+#define RTC_CNTL_FIB_BOR_RST BIT(1)
+#define RTC_CNTL_FIB_SUPER_WDT_RST BIT(2)
+
+#define RTC_CNTL_TOUCH_DAC_REG          (DR_REG_RTCCNTL_BASE + 0x14C)
+/* RTC_CNTL_TOUCH_PAD0_DAC : R/W ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD0_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD0_DAC_M  ((RTC_CNTL_TOUCH_PAD0_DAC_V)<<(RTC_CNTL_TOUCH_PAD0_DAC_S))
+#define RTC_CNTL_TOUCH_PAD0_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD0_DAC_S  29
+/* RTC_CNTL_TOUCH_PAD1_DAC : R/W ;bitpos:[28:26] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD1_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD1_DAC_M  ((RTC_CNTL_TOUCH_PAD1_DAC_V)<<(RTC_CNTL_TOUCH_PAD1_DAC_S))
+#define RTC_CNTL_TOUCH_PAD1_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD1_DAC_S  26
+/* RTC_CNTL_TOUCH_PAD2_DAC : R/W ;bitpos:[25:23] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD2_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD2_DAC_M  ((RTC_CNTL_TOUCH_PAD2_DAC_V)<<(RTC_CNTL_TOUCH_PAD2_DAC_S))
+#define RTC_CNTL_TOUCH_PAD2_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD2_DAC_S  23
+/* RTC_CNTL_TOUCH_PAD3_DAC : R/W ;bitpos:[22:20] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD3_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD3_DAC_M  ((RTC_CNTL_TOUCH_PAD3_DAC_V)<<(RTC_CNTL_TOUCH_PAD3_DAC_S))
+#define RTC_CNTL_TOUCH_PAD3_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD3_DAC_S  20
+/* RTC_CNTL_TOUCH_PAD4_DAC : R/W ;bitpos:[19:17] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD4_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD4_DAC_M  ((RTC_CNTL_TOUCH_PAD4_DAC_V)<<(RTC_CNTL_TOUCH_PAD4_DAC_S))
+#define RTC_CNTL_TOUCH_PAD4_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD4_DAC_S  17
+/* RTC_CNTL_TOUCH_PAD5_DAC : R/W ;bitpos:[16:14] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD5_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD5_DAC_M  ((RTC_CNTL_TOUCH_PAD5_DAC_V)<<(RTC_CNTL_TOUCH_PAD5_DAC_S))
+#define RTC_CNTL_TOUCH_PAD5_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD5_DAC_S  14
+/* RTC_CNTL_TOUCH_PAD6_DAC : R/W ;bitpos:[13:11] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD6_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD6_DAC_M  ((RTC_CNTL_TOUCH_PAD6_DAC_V)<<(RTC_CNTL_TOUCH_PAD6_DAC_S))
+#define RTC_CNTL_TOUCH_PAD6_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD6_DAC_S  11
+/* RTC_CNTL_TOUCH_PAD7_DAC : R/W ;bitpos:[10:8] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD7_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD7_DAC_M  ((RTC_CNTL_TOUCH_PAD7_DAC_V)<<(RTC_CNTL_TOUCH_PAD7_DAC_S))
+#define RTC_CNTL_TOUCH_PAD7_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD7_DAC_S  8
+/* RTC_CNTL_TOUCH_PAD8_DAC : R/W ;bitpos:[7:5] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD8_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD8_DAC_M  ((RTC_CNTL_TOUCH_PAD8_DAC_V)<<(RTC_CNTL_TOUCH_PAD8_DAC_S))
+#define RTC_CNTL_TOUCH_PAD8_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD8_DAC_S  5
+/* RTC_CNTL_TOUCH_PAD9_DAC : R/W ;bitpos:[4:2] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD9_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD9_DAC_M  ((RTC_CNTL_TOUCH_PAD9_DAC_V)<<(RTC_CNTL_TOUCH_PAD9_DAC_S))
+#define RTC_CNTL_TOUCH_PAD9_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD9_DAC_S  2
+
+#define RTC_CNTL_TOUCH_DAC1_REG          (DR_REG_RTCCNTL_BASE + 0x150)
+/* RTC_CNTL_TOUCH_PAD10_DAC : R/W ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD10_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD10_DAC_M  ((RTC_CNTL_TOUCH_PAD10_DAC_V)<<(RTC_CNTL_TOUCH_PAD10_DAC_S))
+#define RTC_CNTL_TOUCH_PAD10_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD10_DAC_S  29
+/* RTC_CNTL_TOUCH_PAD11_DAC : R/W ;bitpos:[28:26] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD11_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD11_DAC_M  ((RTC_CNTL_TOUCH_PAD11_DAC_V)<<(RTC_CNTL_TOUCH_PAD11_DAC_S))
+#define RTC_CNTL_TOUCH_PAD11_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD11_DAC_S  26
+/* RTC_CNTL_TOUCH_PAD12_DAC : R/W ;bitpos:[25:23] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD12_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD12_DAC_M  ((RTC_CNTL_TOUCH_PAD12_DAC_V)<<(RTC_CNTL_TOUCH_PAD12_DAC_S))
+#define RTC_CNTL_TOUCH_PAD12_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD12_DAC_S  23
+/* RTC_CNTL_TOUCH_PAD13_DAC : R/W ;bitpos:[22:20] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD13_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD13_DAC_M  ((RTC_CNTL_TOUCH_PAD13_DAC_V)<<(RTC_CNTL_TOUCH_PAD13_DAC_S))
+#define RTC_CNTL_TOUCH_PAD13_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD13_DAC_S  20
+/* RTC_CNTL_TOUCH_PAD14_DAC : R/W ;bitpos:[19:17] ;default: 3'd0 ; */
+/*description: .*/
+#define RTC_CNTL_TOUCH_PAD14_DAC    0x00000007
+#define RTC_CNTL_TOUCH_PAD14_DAC_M  ((RTC_CNTL_TOUCH_PAD14_DAC_V)<<(RTC_CNTL_TOUCH_PAD14_DAC_S))
+#define RTC_CNTL_TOUCH_PAD14_DAC_V  0x7
+#define RTC_CNTL_TOUCH_PAD14_DAC_S  17
+
+#define RTC_CNTL_COCPU_DISABLE_REG          (DR_REG_RTCCNTL_BASE + 0x154)
+/* RTC_CNTL_DISABLE_RTC_CPU : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define RTC_CNTL_DISABLE_RTC_CPU    (BIT(31))
+#define RTC_CNTL_DISABLE_RTC_CPU_M  (BIT(31))
+#define RTC_CNTL_DISABLE_RTC_CPU_V  0x1
+#define RTC_CNTL_DISABLE_RTC_CPU_S  31
+
+#define RTC_CNTL_DATE_REG          (DR_REG_RTCCNTL_BASE + 0x1FC)
+/* RTC_CNTL_DATE : R/W ;bitpos:[27:0] ;default: 28'h2101271 ; */
+/*description: .*/
+#define RTC_CNTL_DATE    0x0FFFFFFF
+#define RTC_CNTL_DATE_M  ((RTC_CNTL_DATE_V)<<(RTC_CNTL_DATE_S))
+#define RTC_CNTL_DATE_V  0xFFFFFFF
+#define RTC_CNTL_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_RTC_CNTL_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_cntl_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_cntl_struct.h
new file mode 100644
index 00000000000..70b4b511fd2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_cntl_struct.h
@@ -0,0 +1,1051 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _SOC_RTC_CNTL_STRUCT_H_
+#define _SOC_RTC_CNTL_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct rtc_cntl_dev_s {
+    union {
+        struct {
+            uint32_t sw_stall_appcpu_c0            :    2;  /*{reg_sw_stall_appcpu_c1[5:0],  reg_sw_stall_appcpu_c0[1:0]} == 0x86 will stall APP CPU*/
+            uint32_t sw_stall_procpu_c0            :    2;  /*{reg_sw_stall_procpu_c1[5:0],  reg_sw_stall_procpu_c0[1:0]} == 0x86 will stall PRO CPU*/
+            uint32_t sw_appcpu_rst                 :    1;  /*APP CPU SW reset*/
+            uint32_t sw_procpu_rst                 :    1;  /*PRO CPU SW reset*/
+            uint32_t bb_i2c_force_pd               :    1;  /*BB_I2C force power down*/
+            uint32_t bb_i2c_force_pu               :    1;  /*BB_I2C force power up*/
+            uint32_t bbpll_i2c_force_pd            :    1;  /*BB_PLL _I2C force power down*/
+            uint32_t bbpll_i2c_force_pu            :    1;  /*BB_PLL_I2C force power up*/
+            uint32_t bbpll_force_pd                :    1;  /*BB_PLL force power down*/
+            uint32_t bbpll_force_pu                :    1;  /*BB_PLL force power up*/
+            uint32_t xtl_force_pd                  :    1;  /*crystall force power down*/
+            uint32_t xtl_force_pu                  :    1;  /*crystall force power up*/
+            uint32_t xtl_en_wait                   :    4;  /*wait bias_sleep and current source wakeup*/
+            uint32_t reserved18                    :    5;
+            uint32_t xtl_force_iso                 :    1;
+            uint32_t pll_force_iso                 :    1;
+            uint32_t analog_force_iso              :    1;
+            uint32_t xtl_force_noiso               :    1;
+            uint32_t pll_force_noiso               :    1;
+            uint32_t analog_force_noiso            :    1;
+            uint32_t dg_wrap_force_rst             :    1;  /*digital wrap force reset in deep sleep*/
+            uint32_t dg_wrap_force_norst           :    1;  /*digital core force no reset in deep sleep*/
+            uint32_t sw_sys_rst                    :    1;  /*SW system reset*/
+        };
+        uint32_t val;
+    } options0;
+    uint32_t slp_timer0;
+    union {
+        struct {
+            uint32_t slp_val_hi                    :    16;  /*RTC sleep timer high 16 bits*/
+            uint32_t main_timer_alarm_en           :    1;  /*timer alarm enable bit*/
+            uint32_t reserved17                    :    15;
+        };
+        uint32_t val;
+    } slp_timer1;
+    union {
+        struct {
+            uint32_t reserved0                     :    27;
+            uint32_t timer_sys_stall               :    1;  /*Enable to record system stall time*/
+            uint32_t timer_xtl_off                 :    1;  /*Enable to record 40M XTAL OFF time*/
+            uint32_t timer_sys_rst                 :    1;  /*enable to record system reset time*/
+            uint32_t reserved30                    :    1;
+            uint32_t update                        :    1;  /*Set 1: to update register with RTC timer*/
+        };
+        uint32_t val;
+    } time_update;
+    uint32_t time_low0;
+    union {
+        struct {
+            uint32_t rtc_timer_value0_high         :    16;  /*RTC timer high 16 bits*/
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } time_high0;
+    union {
+        struct {
+            uint32_t rtc_sw_cpu_int                :    1;  /*rtc software interrupt to main cpu*/
+            uint32_t rtc_slp_reject_cause_clr      :    1;  /*clear rtc sleep reject cause*/
+            uint32_t reserved2                     :    20;
+            uint32_t apb2rtc_bridge_sel            :    1;  /*1: APB to RTC using bridge*/
+            uint32_t reserved23                    :    5;
+            uint32_t sdio_active_ind               :    1;  /*SDIO active indication*/
+            uint32_t slp_wakeup                    :    1;  /*leep wakeup bit*/
+            uint32_t slp_reject                    :    1;  /*leep reject bit*/
+            uint32_t sleep_en                      :    1;  /*sleep enable bit*/
+        };
+        uint32_t val;
+    } state0;
+    union {
+        struct {
+            uint32_t cpu_stall_en                  :    1;  /*CPU stall enable bit*/
+            uint32_t cpu_stall_wait                :    5;  /*CPU stall wait cycles in fast_clk_rtc*/
+            uint32_t ck8m_wait                     :    8;  /*CK8M wait cycles in slow_clk_rtc*/
+            uint32_t xtl_buf_wait                  :    10;  /*XTAL wait cycles in slow_clk_rtc*/
+            uint32_t pll_buf_wait                  :    8;  /*PLL wait cycles in slow_clk_rtc*/
+        };
+        uint32_t val;
+    } timer1;
+    union {
+        struct {
+            uint32_t reserved0                     :    15;
+            uint32_t ulpcp_touch_start_wait        :    9;  /*wait cycles in slow_clk_rtc before ULP-coprocessor / touch controller start to work*/
+            uint32_t min_time_ck8m_off             :    8;  /*minimal cycles in slow_clk_rtc for CK8M in power down state*/
+        };
+        uint32_t val;
+    } timer2;
+    union {
+        struct {
+            uint32_t wifi_wait_timer               :    9;
+            uint32_t wifi_powerup_timer            :    7;
+            uint32_t bt_wait_timer                 :    9;
+            uint32_t bt_powerup_timer              :    7;
+        };
+        uint32_t val;
+    } timer3;
+    union {
+        struct {
+            uint32_t rtc_wait_timer                :    9;
+            uint32_t rtc_powerup_timer             :    7;
+            uint32_t dg_wrap_wait_timer            :    9;
+            uint32_t dg_wrap_powerup_timer         :    7;
+        };
+        uint32_t val;
+    } timer4;
+    union {
+        struct {
+            uint32_t reserved0                     :    8;
+            uint32_t min_slp_val                   :    8;  /*minimal sleep cycles in slow_clk_rtc*/
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } timer5;
+    union {
+        struct {
+            uint32_t cpu_top_wait_timer            :    9;
+            uint32_t cpu_top_powerup_timer         :    7;
+            uint32_t dg_peri_wait_timer            :    9;
+            uint32_t dg_peri_powerup_timer         :    7;
+        };
+        uint32_t val;
+    } timer6;
+    union {
+        struct {
+            uint32_t reserved0                     :    18;
+            uint32_t i2c_reset_por_force_pd        :    1;
+            uint32_t i2c_reset_por_force_pu        :    1;
+            uint32_t glitch_rst_en                 :    1;
+            uint32_t reserved21                    :    1;  /*PLLA force power down*/
+            uint32_t sar_i2c_pu                    :    1;  /*PLLA force power up*/
+            uint32_t analog_top_iso_sleep          :    1;  /*PLLA force power down*/
+            uint32_t analog_top_iso_monitor        :    1;  /*PLLA force power up*/
+            uint32_t bbpll_cal_slp_start           :    1;  /*start BBPLL calibration during sleep*/
+            uint32_t pvtmon_pu                     :    1;  /*1: PVTMON power up*/
+            uint32_t txrf_i2c_pu                   :    1;  /*1: TXRF_I2C power up*/
+            uint32_t rfrx_pbus_pu                  :    1;  /*1: RFRX_PBUS power up*/
+            uint32_t reserved29                    :    1;
+            uint32_t ckgen_i2c_pu                  :    1;  /*1: CKGEN_I2C power up*/
+            uint32_t pll_i2c_pu                    :    1;
+        };
+        uint32_t val;
+    } ana_conf;
+    union {
+        struct {
+            uint32_t reset_cause_procpu            :    6;  /*reset cause of PRO CPU*/
+            uint32_t reset_cause_appcpu            :    6;  /*reset cause of APP CPU*/
+            uint32_t appcpu_stat_vector_sel        :    1;  /*APP CPU state vector sel*/
+            uint32_t procpu_stat_vector_sel        :    1;  /*PRO CPU state vector sel*/
+            uint32_t reset_flag_procpu             :    1;  /*PRO CPU reset_flag*/
+            uint32_t reset_flag_appcpu             :    1;  /*APP CPU reset flag*/
+            uint32_t reset_flag_procpu_clr         :    1;  /*clear PRO CPU reset_flag*/
+            uint32_t reset_flag_appcpu_clr         :    1;  /*clear APP CPU reset flag*/
+            uint32_t appcpu_ocd_halt_on_reset      :    1;  /*APPCPU OcdHaltOnReset*/
+            uint32_t procpu_ocd_halt_on_reset      :    1;  /*PROCPU OcdHaltOnReset*/
+            uint32_t reset_flag_jtag_procpu        :    1;
+            uint32_t reset_flag_jtag_appcpu        :    1;
+            uint32_t reset_flag_jtag_procpu_clr    :    1;
+            uint32_t reset_flag_jtag_appcpu_clr    :    1;
+            uint32_t rtc_app_dreset_mask           :    1;
+            uint32_t rtc_pro_dreset_mask           :    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } reset_state;
+    union {
+        struct {
+            uint32_t reserved0                     :    15;
+            uint32_t rtc_wakeup_ena                :    17;  /*wakeup enable bitmap*/
+        };
+        uint32_t val;
+    } wakeup_state;
+    union {
+        struct {
+            uint32_t slp_wakeup                    :    1;  /*enable sleep wakeup interrupt*/
+            uint32_t slp_reject                    :    1;  /*enable sleep reject interrupt*/
+            uint32_t sdio_idle                     :    1;  /*enable SDIO idle interrupt*/
+            uint32_t rtc_wdt                       :    1;  /*enable RTC WDT interrupt*/
+            uint32_t rtc_touch_scan_done           :    1;  /*enable touch scan done interrupt*/
+            uint32_t rtc_ulp_cp                    :    1;  /*enable ULP-coprocessor interrupt*/
+            uint32_t rtc_touch_done                :    1;  /*enable touch done interrupt*/
+            uint32_t rtc_touch_active              :    1;  /*enable touch active interrupt*/
+            uint32_t rtc_touch_inactive            :    1;  /*enable touch inactive interrupt*/
+            uint32_t rtc_brown_out                 :    1;  /*enable brown out interrupt*/
+            uint32_t rtc_main_timer                :    1;  /*enable RTC main timer interrupt*/
+            uint32_t rtc_saradc1                   :    1;  /*enable saradc1 interrupt*/
+            uint32_t rtc_tsens                     :    1;  /*enable tsens interrupt*/
+            uint32_t rtc_cocpu                     :    1;  /*enable riscV cocpu interrupt*/
+            uint32_t rtc_saradc2                   :    1;  /*enable saradc2 interrupt*/
+            uint32_t rtc_swd                       :    1;  /*enable super watch dog interrupt*/
+            uint32_t rtc_xtal32k_dead              :    1;  /*enable xtal32k_dead  interrupt*/
+            uint32_t rtc_cocpu_trap                :    1;  /*enable cocpu trap interrupt*/
+            uint32_t rtc_touch_timeout             :    1;  /*enable touch timeout interrupt*/
+            uint32_t rtc_glitch_det                :    1;  /*enbale gitch det interrupt*/
+            uint32_t rtc_touch_approach_loop_done  :    1;
+            uint32_t reserved21                    :    11;
+        };
+        uint32_t val;
+    } int_ena;
+    union {
+        struct {
+            uint32_t slp_wakeup                    :    1;  /*sleep wakeup interrupt raw*/
+            uint32_t slp_reject                    :    1;  /*sleep reject interrupt raw*/
+            uint32_t sdio_idle                     :    1;  /*SDIO idle interrupt raw*/
+            uint32_t rtc_wdt                       :    1;  /*RTC WDT interrupt raw*/
+            uint32_t rtc_touch_scan_done           :    1;
+            uint32_t rtc_ulp_cp                    :    1;  /*ULP-coprocessor interrupt raw*/
+            uint32_t rtc_touch_done                :    1;  /*touch interrupt raw*/
+            uint32_t rtc_touch_active              :    1;  /*touch active interrupt raw*/
+            uint32_t rtc_touch_inactive            :    1;  /*touch inactive interrupt raw*/
+            uint32_t rtc_brown_out                 :    1;  /*brown out interrupt raw*/
+            uint32_t rtc_main_timer                :    1;  /*RTC main timer interrupt raw*/
+            uint32_t rtc_saradc1                   :    1;  /*saradc1 interrupt raw*/
+            uint32_t rtc_tsens                     :    1;  /*tsens interrupt raw*/
+            uint32_t rtc_cocpu                     :    1;  /*riscV cocpu interrupt raw*/
+            uint32_t rtc_saradc2                   :    1;  /*saradc2 interrupt raw*/
+            uint32_t rtc_swd                       :    1;  /*super watch dog interrupt raw*/
+            uint32_t rtc_xtal32k_dead              :    1;  /*xtal32k dead detection interrupt raw*/
+            uint32_t rtc_cocpu_trap                :    1;  /*cocpu trap interrupt raw*/
+            uint32_t rtc_touch_timeout             :    1;  /*touch timeout interrupt raw*/
+            uint32_t rtc_glitch_det                :    1;  /*glitch_det_interrupt_raw*/
+            uint32_t rtc_touch_approach_loop_done  :    1;
+            uint32_t reserved21                    :    11;
+        };
+        uint32_t val;
+    } int_raw;
+    union {
+        struct {
+            uint32_t slp_wakeup                    :    1;  /*sleep wakeup interrupt state*/
+            uint32_t slp_reject                    :    1;  /*sleep reject interrupt state*/
+            uint32_t sdio_idle                     :    1;  /*SDIO idle interrupt state*/
+            uint32_t rtc_wdt                       :    1;  /*RTC WDT interrupt state*/
+            uint32_t rtc_touch_scan_done           :    1;
+            uint32_t rtc_ulp_cp                    :    1;  /*ULP-coprocessor interrupt state*/
+            uint32_t rtc_touch_done                :    1;  /*touch done interrupt state*/
+            uint32_t rtc_touch_active              :    1;  /*touch active interrupt state*/
+            uint32_t rtc_touch_inactive            :    1;  /*touch inactive interrupt state*/
+            uint32_t rtc_brown_out                 :    1;  /*brown out interrupt state*/
+            uint32_t rtc_main_timer                :    1;  /*RTC main timer interrupt state*/
+            uint32_t rtc_saradc1                   :    1;  /*saradc1 interrupt state*/
+            uint32_t rtc_tsens                     :    1;  /*tsens interrupt state*/
+            uint32_t rtc_cocpu                     :    1;  /*riscV cocpu interrupt state*/
+            uint32_t rtc_saradc2                   :    1;  /*saradc2 interrupt state*/
+            uint32_t rtc_swd                       :    1;  /*super watch dog interrupt state*/
+            uint32_t rtc_xtal32k_dead              :    1;  /*xtal32k dead detection interrupt state*/
+            uint32_t rtc_cocpu_trap                :    1;  /*cocpu trap interrupt state*/
+            uint32_t rtc_touch_timeout             :    1;  /*Touch timeout interrupt state*/
+            uint32_t rtc_glitch_det                :    1;  /*glitch_det_interrupt state*/
+            uint32_t rtc_touch_approach_loop_done  :    1;
+            uint32_t reserved21                    :    11;
+        };
+        uint32_t val;
+    } int_st;
+    union {
+        struct {
+            uint32_t slp_wakeup                    :    1;  /*Clear sleep wakeup interrupt state*/
+            uint32_t slp_reject                    :    1;  /*Clear sleep reject interrupt state*/
+            uint32_t sdio_idle                     :    1;  /*Clear SDIO idle interrupt state*/
+            uint32_t rtc_wdt                       :    1;  /*Clear RTC WDT interrupt state*/
+            uint32_t rtc_touch_scan_done           :    1;
+            uint32_t rtc_ulp_cp                    :    1;  /*Clear ULP-coprocessor interrupt state*/
+            uint32_t rtc_touch_done                :    1;  /*Clear touch done interrupt state*/
+            uint32_t rtc_touch_active              :    1;  /*Clear touch active interrupt state*/
+            uint32_t rtc_touch_inactive            :    1;  /*Clear touch inactive interrupt state*/
+            uint32_t rtc_brown_out                 :    1;  /*Clear brown out interrupt state*/
+            uint32_t rtc_main_timer                :    1;  /*Clear RTC main timer interrupt state*/
+            uint32_t rtc_saradc1                   :    1;  /*Clear saradc1 interrupt state*/
+            uint32_t rtc_tsens                     :    1;  /*Clear tsens interrupt state*/
+            uint32_t rtc_cocpu                     :    1;  /*Clear riscV cocpu interrupt state*/
+            uint32_t rtc_saradc2                   :    1;  /*Clear saradc2 interrupt state*/
+            uint32_t rtc_swd                       :    1;  /*Clear super watch dog interrupt state*/
+            uint32_t rtc_xtal32k_dead              :    1;  /*Clear RTC WDT interrupt state*/
+            uint32_t rtc_cocpu_trap                :    1;  /*Clear cocpu trap interrupt state*/
+            uint32_t rtc_touch_timeout             :    1;  /*Clear touch timeout interrupt state*/
+            uint32_t rtc_glitch_det                :    1;  /*Clear glitch det interrupt state*/
+            uint32_t rtc_touch_approach_loop_done  :    1;
+            uint32_t reserved21                    :    11;
+        };
+        uint32_t val;
+    } int_clr;
+    uint32_t store[4];
+    union {
+        struct {
+            uint32_t xtal32k_wdt_en                :    1;  /*xtal 32k watch dog enable*/
+            uint32_t xtal32k_wdt_clk_fo            :    1;  /*xtal 32k watch dog clock force on*/
+            uint32_t xtal32k_wdt_reset             :    1;  /*xtal 32k watch dog sw reset*/
+            uint32_t xtal32k_ext_clk_fo            :    1;  /*xtal 32k external xtal clock force on*/
+            uint32_t xtal32k_auto_backup           :    1;  /*xtal 32k switch to back up clock when xtal is dead*/
+            uint32_t xtal32k_auto_restart          :    1;  /*xtal 32k restart xtal when xtal is dead*/
+            uint32_t xtal32k_auto_return           :    1;  /*xtal 32k switch back xtal when xtal is restarted*/
+            uint32_t xtal32k_xpd_force             :    1;  /*Xtal 32k xpd control by sw or fsm*/
+            uint32_t enckinit_xtal_32k             :    1;  /*apply an internal clock to help xtal 32k to start*/
+            uint32_t dbuf_xtal_32k                 :    1;  /*0: single-end buffer 1: differential buffer*/
+            uint32_t dgm_xtal_32k                  :    3;  /*xtal_32k gm control*/
+            uint32_t dres_xtal_32k                 :    3;  /*DRES_XTAL_32K*/
+            uint32_t xpd_xtal_32k                  :    1;  /*XPD_XTAL_32K*/
+            uint32_t dac_xtal_32k                  :    3;  /*DAC_XTAL_32K*/
+            uint32_t rtc_wdt_state                 :    3;  /*state of 32k_wdt*/
+            uint32_t rtc_xtal32k_gpio_sel          :    1;  /*XTAL_32K sel. 0: external XTAL_32K*/
+            uint32_t reserved24                    :    6;
+            uint32_t ctr_lv                        :    1;  /*0: power down XTAL at high level*/
+            uint32_t ctr_en                        :    1;
+        };
+        uint32_t val;
+    } ext_xtl_conf;
+    union {
+        struct {
+            uint32_t reserved0                     :    29;
+            uint32_t gpio_wakeup_filter            :    1;  /*enable filter for gpio wakeup event*/
+            uint32_t ext_wakeup0_lv                :    1;  /*0: external wakeup at low level*/
+            uint32_t ext_wakeup1_lv                :    1;
+        };
+        uint32_t val;
+    } ext_wakeup_conf;
+    union {
+        struct {
+            uint32_t reserved0                     :    12;
+            uint32_t rtc_sleep_reject_ena          :    18;  /*sleep reject enable*/
+            uint32_t light_slp_reject_en           :    1;  /*enable reject for light sleep*/
+            uint32_t deep_slp_reject_en            :    1;  /*enable reject for deep sleep*/
+        };
+        uint32_t val;
+    } slp_reject_conf;
+    union {
+        struct {
+            uint32_t reserved0                     :    29;
+            uint32_t cpusel_conf                   :    1;  /*CPU sel option*/
+            uint32_t cpuperiod_sel                 :    2;
+        };
+        uint32_t val;
+    } cpu_period_conf;
+    union {
+        struct {
+            uint32_t reserved0                     :    22;
+            uint32_t sdio_act_dnum                 :    10;
+        };
+        uint32_t val;
+    } sdio_act_conf;
+    union {
+        struct {
+            uint32_t reserved0                     :    1;
+            uint32_t efuse_clk_force_gating        :    1;
+            uint32_t efuse_clk_force_nogating      :    1;
+            uint32_t ck8m_div_sel_vld              :    1;  /*used to sync reg_ck8m_div_sel bus. Clear vld before set reg_ck8m_div_sel*/
+            uint32_t ck8m_div                      :    2;  /*CK8M_D256_OUT divider. 00: div128*/
+            uint32_t enb_ck8m                      :    1;  /*disable CK8M and CK8M_D256_OUT*/
+            uint32_t enb_ck8m_div                  :    1;  /*1: CK8M_D256_OUT is actually CK8M*/
+            uint32_t dig_xtal32k_en                :    1;  /*enable CK_XTAL_32K for digital core (no relationship with RTC core)*/
+            uint32_t dig_clk8m_d256_en             :    1;  /*enable CK8M_D256_OUT for digital core (no relationship with RTC core)*/
+            uint32_t dig_clk8m_en                  :    1;  /*enable CK8M for digital core (no relationship with RTC core)*/
+            uint32_t reserved11                    :    1;
+            uint32_t ck8m_div_sel                  :    3;  /*divider = reg_ck8m_div_sel + 1*/
+            uint32_t xtal_force_nogating           :    1;  /*XTAL force no gating during sleep*/
+            uint32_t ck8m_force_nogating           :    1;  /*CK8M force no gating during sleep*/
+            uint32_t ck8m_dfreq                    :    8;  /*CK8M_DFREQ*/
+            uint32_t ck8m_force_pd                 :    1;  /*CK8M force power down*/
+            uint32_t ck8m_force_pu                 :    1;  /*CK8M force power up*/
+            uint32_t xtal_global_force_gating      :    1;
+            uint32_t xtal_global_force_nogating    :    1;
+            uint32_t fast_clk_rtc_sel              :    1;  /*fast_clk_rtc sel. 0: XTAL div 4*/
+            uint32_t ana_clk_rtc_sel               :    2;
+        };
+        uint32_t val;
+    } clk_conf;
+    union {
+        struct {
+            uint32_t reserved0                     :    22;
+            uint32_t rtc_ana_clk_div_vld           :    1;  /*used to sync div bus. clear vld before set reg_rtc_ana_clk_div*/
+            uint32_t rtc_ana_clk_div               :    8;
+            uint32_t slow_clk_next_edge            :    1;
+        };
+        uint32_t val;
+    } slow_clk_conf;
+    union {
+        struct {
+            uint32_t sdio_timer_target             :    8;  /*timer count to apply reg_sdio_dcap after sdio power on*/
+            uint32_t reserved8                     :    1;
+            uint32_t sdio_dthdrv                   :    2;  /*Tieh = 1 mode drive ability. Initially set to 0 to limit charge current*/
+            uint32_t sdio_dcap                     :    2;  /*ability to prevent LDO from overshoot*/
+            uint32_t sdio_initi                    :    2;  /*add resistor from ldo output to ground. 0: no res*/
+            uint32_t sdio_en_initi                 :    1;  /*0 to set init[1:0]=0*/
+            uint32_t sdio_dcurlim                  :    3;  /*tune current limit threshold when tieh = 0. About 800mA/(8+d)*/
+            uint32_t sdio_modecurlim               :    1;  /*select current limit mode*/
+            uint32_t sdio_encurlim                 :    1;  /*enable current limit*/
+            uint32_t sdio_pd_en                    :    1;  /*power down SDIO_REG in sleep. Only active when reg_sdio_force = 0*/
+            uint32_t sdio_force                    :    1;  /*1: use SW option to control SDIO_REG*/
+            uint32_t sdio_tieh                     :    1;  /*SW option for SDIO_TIEH. Only active when reg_sdio_force = 1*/
+            uint32_t reg1p8_ready                  :    1;  /*read only register for REG1P8_READY*/
+            uint32_t drefl_sdio                    :    2;  /*SW option for DREFL_SDIO. Only active when reg_sdio_force = 1*/
+            uint32_t drefm_sdio                    :    2;  /*SW option for DREFM_SDIO. Only active when reg_sdio_force = 1*/
+            uint32_t drefh_sdio                    :    2;  /*SW option for DREFH_SDIO. Only active when reg_sdio_force = 1*/
+            uint32_t xpd_sdio                      :    1;
+        };
+        uint32_t val;
+    } sdio_conf;
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t bias_buf_idle                 :    1;
+            uint32_t bias_buf_wake                 :    1;
+            uint32_t bias_buf_deep_slp             :    1;
+            uint32_t bias_buf_monitor              :    1;
+            uint32_t pd_cur_deep_slp               :    1;  /*xpd cur when rtc in sleep_state*/
+            uint32_t pd_cur_monitor                :    1;  /*xpd cur when rtc in monitor state*/
+            uint32_t bias_sleep_deep_slp           :    1;  /*bias_sleep when rtc in sleep_state*/
+            uint32_t bias_sleep_monitor            :    1;  /*bias_sleep when rtc in monitor state*/
+            uint32_t dbg_atten_deep_slp            :    4;  /*DBG_ATTEN when rtc in sleep state*/
+            uint32_t dbg_atten_monitor             :    4;  /*DBG_ATTEN when rtc in monitor state*/
+            uint32_t dbg_atten_wakeup              :    4;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } bias_conf;
+    union {
+        struct {
+            uint32_t reserved0                     :    7;
+            uint32_t dig_cal_en                    :    1;
+            uint32_t reserved8                     :    6;
+            uint32_t sck_dcap                      :    8;  /*SCK_DCAP*/
+            uint32_t reserved22                    :    6;
+            uint32_t rtc_dboost_force_pd           :    1;  /*RTC_DBOOST force power down*/
+            uint32_t rtc_dboost_force_pu           :    1;  /*RTC_DBOOST force power up*/
+            uint32_t rtculator_force_pd            :    1;  /*RTC_REG force power down (for RTC_REG power down means decrease the voltage to 0.8v or lower )*/
+            uint32_t rtculator_force_pu            :    1;
+        };
+        uint32_t val;
+    } rtc;
+    union {
+        struct {
+            uint32_t rtc_fastmem_force_noiso       :    1;  /*Fast RTC memory force no ISO*/
+            uint32_t rtc_fastmem_force_iso         :    1;  /*Fast RTC memory force ISO*/
+            uint32_t rtc_slowmem_force_noiso       :    1;  /*RTC memory force no ISO*/
+            uint32_t rtc_slowmem_force_iso         :    1;  /*RTC memory force ISO*/
+            uint32_t rtc_force_iso                 :    1;  /*rtc_peri force ISO*/
+            uint32_t rtc_force_noiso               :    1;  /*rtc_peri force no ISO*/
+            uint32_t rtc_fastmem_folw_cpu          :    1;  /*1: Fast RTC memory PD following CPU*/
+            uint32_t fastmem_force_lpd             :    1;  /*Fast RTC memory force PD*/
+            uint32_t fastmem_force_lpu             :    1;  /*Fast RTC memory force no PD*/
+            uint32_t rtc_slowmem_folw_cpu          :    1;  /*1: RTC memory  PD following CPU*/
+            uint32_t rtc_slowmem_force_lpd         :    1;  /*RTC memory force PD*/
+            uint32_t rtc_slowmem_force_lpu         :    1;  /*RTC memory force no PD*/
+            uint32_t reserved12                    :    6;  /*enable power down RTC memory in sleep*/
+            uint32_t rtc_force_pd                  :    1;  /*rtc_peri force power down*/
+            uint32_t rtc_force_pu                  :    1;  /*rtc_peri force power up*/
+            uint32_t rtc_pd_en                     :    1;  /*enable power down rtc_peri in sleep */
+            uint32_t rtc_pad_force_hold            :    1;  /*rtc pad force hold*/
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } pwc;
+    union {
+        struct {
+            uint32_t rtculator_drv_b_monitor       :    6;
+            uint32_t rtculator_drv_b_slp           :    6;
+            uint32_t dg_vdd_drv_b_slp              :    8;
+            uint32_t dg_vdd_drv_b_monitor          :    8;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } regulator_drv_ctrl;
+    union {
+        struct {
+            uint32_t reserved0                     :    3;
+            uint32_t lslp_mem_force_pd             :    1;  /*memories in digital core force PD in sleep*/
+            uint32_t lslp_mem_force_pu             :    1;  /*memories in digital core force no PD in sleep*/
+            uint32_t reserved5                     :    6;  /*internal SRAM 1 force power up*/
+            uint32_t bt_force_pd                   :    1;  /*internal SRAM 2 force power down*/
+            uint32_t bt_force_pu                   :    1;  /*internal SRAM 2 force power up*/
+            uint32_t dg_peri_force_pd              :    1;  /*internal SRAM 3 force power down*/
+            uint32_t dg_peri_force_pu              :    1;  /*internal SRAM 3 force power up*/
+            uint32_t reserved15                    :    2;  /*internal SRAM 4 force power up*/
+            uint32_t wifi_force_pd                 :    1;  /*wifi force power down*/
+            uint32_t wifi_force_pu                 :    1;  /*wifi force power up*/
+            uint32_t dg_wrap_force_pd              :    1;  /*digital core force power down*/
+            uint32_t dg_wrap_force_pu              :    1;  /*digital core force power up*/
+            uint32_t cpu_top_force_pd              :    1;  /*digital dcdc force power down*/
+            uint32_t cpu_top_force_pu              :    1;  /*digital dcdc force power up*/
+            uint32_t reserved23                    :    4;  /*enable power down internal SRAM 1 in sleep*/
+            uint32_t bt_pd_en                      :    1;  /*enable power down internal SRAM 2 in sleep*/
+            uint32_t dg_peri_pd_en                 :    1;  /*enable power down internal SRAM 3 in sleep*/
+            uint32_t cpu_top_pd_en                 :    1;  /*enable power down internal SRAM 4 in sleep*/
+            uint32_t wifi_pd_en                    :    1;  /*enable power down wifi in sleep*/
+            uint32_t dg_wrap_pd_en                 :    1;
+        };
+        uint32_t val;
+    } dig_pwc;
+    union {
+        struct {
+            uint32_t reserved0                     :    7;
+            uint32_t dig_iso_force_off             :    1;
+            uint32_t dig_iso_force_on              :    1;
+            uint32_t dg_pad_autohold               :    1;  /*read only register to indicate digital pad auto-hold status*/
+            uint32_t clr_dg_pad_autohold           :    1;  /*wtite only register to clear digital pad auto-hold*/
+            uint32_t dg_pad_autohold_en            :    1;  /*digital pad enable auto-hold*/
+            uint32_t dg_pad_force_noiso            :    1;  /*digital pad force no ISO*/
+            uint32_t dg_pad_force_iso              :    1;  /*digital pad force ISO*/
+            uint32_t dg_pad_force_unhold           :    1;  /*digital pad force un-hold*/
+            uint32_t dg_pad_force_hold             :    1;  /*digital pad force hold*/
+            uint32_t reserved16                    :    6;  /*internal SRAM 1 force no ISO*/
+            uint32_t bt_force_iso                  :    1;  /*internal SRAM 2 force ISO*/
+            uint32_t bt_force_noiso                :    1;  /*internal SRAM 2 force no ISO*/
+            uint32_t dg_peri_force_iso             :    1;  /*internal SRAM 3 force ISO*/
+            uint32_t dg_peri_force_noiso           :    1;  /*internal SRAM 3 force no ISO*/
+            uint32_t cpu_top_force_iso             :    1;  /*internal SRAM 4 force ISO*/
+            uint32_t cpu_top_force_noiso           :    1;  /*internal SRAM 4 force no ISO*/
+            uint32_t wifi_force_iso                :    1;  /*wifi force ISO*/
+            uint32_t wifi_force_noiso              :    1;  /*wifi force no ISO*/
+            uint32_t dg_wrap_force_iso             :    1;  /*digital core force ISO*/
+            uint32_t dg_wrap_force_noiso           :    1;
+        };
+        uint32_t val;
+    } dig_iso;
+    union {
+        struct {
+            uint32_t chip_reset_width              :    8;  /*chip reset siginal pulse width*/
+            uint32_t chip_reset_en                 :    1;  /*wdt reset whole chip enable*/
+            uint32_t pause_in_slp                  :    1;  /*pause WDT in sleep*/
+            uint32_t appcpu_reset_en               :    1;  /*enable WDT reset APP CPU*/
+            uint32_t procpu_reset_en               :    1;  /*enable WDT reset PRO CPU*/
+            uint32_t flashboot_mod_en              :    1;  /*enable WDT in flash boot*/
+            uint32_t sys_reset_length              :    3;  /*system reset counter length*/
+            uint32_t cpu_reset_length              :    3;  /*CPU reset counter length*/
+            uint32_t stg3                          :    3;  /*1: interrupt stage en*/
+            uint32_t stg2                          :    3;  /*1: interrupt stage en*/
+            uint32_t stg1                          :    3;  /*1: interrupt stage en*/
+            uint32_t stg0                          :    3;  /*1: interrupt stage en*/
+            uint32_t en                            :    1;
+        };
+        uint32_t val;
+    } wdt_config0;
+    uint32_t wdt_config1;
+    uint32_t wdt_config2;
+    uint32_t wdt_config3;
+    uint32_t wdt_config4;
+    union {
+        struct {
+            uint32_t reserved0                     :    31;
+            uint32_t feed                          :    1;
+        };
+        uint32_t val;
+    } wdt_feed;
+    uint32_t wdt_wprotect;
+    union {
+        struct {
+            uint32_t swd_reset_flag                :    1;  /*swd reset flag*/
+            uint32_t swd_feed_int                  :    1;  /*swd interrupt for feeding*/
+            uint32_t reserved2                     :    15;
+            uint32_t swd_bypass_rst                :    1;
+            uint32_t swd_signal_width              :    10;  /*adjust signal width send to swd*/
+            uint32_t swd_rst_flag_clr              :    1;  /*reset swd reset flag*/
+            uint32_t swd_feed                      :    1;  /*Sw feed swd*/
+            uint32_t swd_disable                   :    1;  /*disabel SWD*/
+            uint32_t swd_auto_feed_en              :    1;  /*automatically feed swd when int comes*/
+        };
+        uint32_t val;
+    } swd_conf;
+    uint32_t swd_wprotect;
+    union {
+        struct {
+            uint32_t reserved0                     :    20;
+            uint32_t appcpu_c1                     :    6;  /*{reg_sw_stall_appcpu_c1[5:0]*/
+            uint32_t procpu_c1                     :    6;
+        };
+        uint32_t val;
+    } sw_cpu_stall;
+    uint32_t store4;
+    uint32_t store5;
+    uint32_t store6;
+    uint32_t store7;
+    union {
+        struct {
+            uint32_t xpd_rom0                      :    1;  /*rom0 power down*/
+            uint32_t reserved1                     :    1;
+            uint32_t xpd_dig_dcdc                  :    1;  /*External DCDC power down*/
+            uint32_t rtc_peri_iso                  :    1;  /*rtc peripheral iso*/
+            uint32_t xpd_rtc_peri                  :    1;  /*rtc peripheral power down */
+            uint32_t wifi_iso                      :    1;  /*wifi iso*/
+            uint32_t xpd_wifi                      :    1;  /*wifi wrap power down*/
+            uint32_t dig_iso                       :    1;  /*digital wrap iso*/
+            uint32_t xpd_dig                       :    1;  /*digital wrap power down*/
+            uint32_t rtc_touch_state_start         :    1;  /*touch should start to work*/
+            uint32_t rtc_touch_state_switch        :    1;  /*touch is about to working. Switch rtc main state*/
+            uint32_t rtc_touch_state_slp           :    1;  /*touch is in sleep state*/
+            uint32_t rtc_touch_state_done          :    1;  /*touch is done*/
+            uint32_t rtc_cocpu_state_start         :    1;  /*ulp/cocpu should start to work*/
+            uint32_t rtc_cocpu_state_switch        :    1;  /*ulp/cocpu is about to working. Switch rtc main state*/
+            uint32_t rtc_cocpu_state_slp           :    1;  /*ulp/cocpu is in sleep state*/
+            uint32_t rtc_cocpu_state_done          :    1;  /*ulp/cocpu is done*/
+            uint32_t rtc_main_state_xtal_iso       :    1;  /*no use any more*/
+            uint32_t rtc_main_state_pll_on         :    1;  /*rtc main state machine is in states that pll should be running*/
+            uint32_t rtc_rdy_for_wakeup            :    1;  /*rtc is ready to receive wake up trigger from wake up source*/
+            uint32_t rtc_main_state_wait_end       :    1;  /*rtc main state machine has been waited for some cycles*/
+            uint32_t rtc_in_wakeup_state           :    1;  /*rtc main state machine is in the states of wakeup process*/
+            uint32_t rtc_in_low_power_state        :    1;  /*rtc main state machine is in the states of low power*/
+            uint32_t rtc_main_state_in_wait_8m     :    1;  /*rtc main state machine is in wait 8m state*/
+            uint32_t rtc_main_state_in_wait_pll    :    1;  /*rtc main state machine is in wait pll state*/
+            uint32_t rtc_main_state_in_wait_xtl    :    1;  /*rtc main state machine is in wait xtal state*/
+            uint32_t rtc_main_state_in_slp         :    1;  /*rtc main state machine is in sleep state*/
+            uint32_t rtc_main_state_in_idle        :    1;  /*rtc main state machine is in idle state*/
+            uint32_t rtc_main_state                :    4;  /*rtc main state machine status*/
+        };
+        uint32_t val;
+    } low_power_st;
+    uint32_t diag0;
+    union {
+        struct {
+            uint32_t touch_pad0_hold               :    1;
+            uint32_t touch_pad1_hold               :    1;
+            uint32_t touch_pad2_hold               :    1;
+            uint32_t touch_pad3_hold               :    1;
+            uint32_t touch_pad4_hold               :    1;
+            uint32_t touch_pad5_hold               :    1;
+            uint32_t touch_pad6_hold               :    1;
+            uint32_t touch_pad7_hold               :    1;
+            uint32_t touch_pad8_hold               :    1;
+            uint32_t touch_pad9_hold               :    1;
+            uint32_t touch_pad10_hold              :    1;
+            uint32_t touch_pad11_hold              :    1;
+            uint32_t touch_pad12_hold              :    1;
+            uint32_t touch_pad13_hold              :    1;
+            uint32_t touch_pad14_hold              :    1;
+            uint32_t x32p_hold                     :    1;
+            uint32_t x32n_hold                     :    1;
+            uint32_t pdac1_hold                    :    1;
+            uint32_t pdac2_hold                    :    1;
+            uint32_t rtc_pad19_hold                :    1;
+            uint32_t rtc_pad20_hold                :    1;
+            uint32_t rtc_pad21_hold                :    1;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } pad_hold;
+    uint32_t dig_pad_hold;
+    union {
+        struct {
+            uint32_t ext_wakeup1_sel               :    22;  /*Bitmap to select RTC pads for ext wakeup1*/
+            uint32_t ext_wakeup1_status_clr        :    1;  /*clear ext wakeup1 status*/
+            uint32_t reserved23                    :    9;
+        };
+        uint32_t val;
+    } ext_wakeup1;
+    union {
+        struct {
+            uint32_t ext_wakeup1_status            :    22;  /*ext wakeup1 status*/
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } ext_wakeup1_status;
+    union {
+        struct {
+            uint32_t reserved0                     :    4;
+            uint32_t int_wait                      :    10;  /*brown out interrupt wait cycles*/
+            uint32_t close_flash_ena               :    1;  /*enable close flash when brown out happens*/
+            uint32_t pd_rf_ena                     :    1;  /*enable power down RF when brown out happens*/
+            uint32_t rst_wait                      :    10;  /*brown out reset wait cycles*/
+            uint32_t rst_ena                       :    1;  /*enable brown out reset*/
+            uint32_t rst_sel                       :    1;  /*1:  4-pos reset*/
+            uint32_t ana_rst_en                    :    1;
+            uint32_t cnt_clr                       :    1;  /*clear brown out counter*/
+            uint32_t ena                           :    1;  /*enable brown out*/
+            uint32_t det                           :    1;
+        };
+        uint32_t val;
+    } brown_out;
+    uint32_t time_low1;
+    union {
+        struct {
+            uint32_t rtc_timer_value1_high         :    16;  /*RTC timer high 16 bits*/
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } time_high1;
+    uint32_t xtal32k_clk_factor;
+    union {
+        struct {
+            uint32_t xtal32k_return_wait           :    4;  /*cycles to wait to return noral xtal 32k*/
+            uint32_t xtal32k_restart_wait          :    16;  /*cycles to wait to repower on xtal 32k*/
+            uint32_t xtal32k_wdt_timeout           :    8;  /*If no clock detected for this amount of time*/
+            uint32_t xtal32k_stable_thres          :    4;  /*if restarted xtal32k period is smaller than this*/
+        };
+        uint32_t val;
+    } xtal32k_conf;
+    union {
+        struct {
+            uint32_t ulp_cp_pc_init                :    11;  /*ULP-coprocessor PC initial address*/
+            uint32_t reserved11                    :    18;
+            uint32_t ulp_cp_gpio_wakeup_ena        :    1;  /*ULP-coprocessor wakeup by GPIO enable*/
+            uint32_t ulp_cp_gpio_wakeup_clr        :    1;  /*ULP-coprocessor wakeup by GPIO state clear*/
+            uint32_t ulp_cp_slp_timer_en           :    1;  /*ULP-coprocessor timer enable bit*/
+        };
+        uint32_t val;
+    } ulp_cp_timer;
+    union {
+        struct {
+            uint32_t ulp_cp_mem_addr_init          :    11;
+            uint32_t ulp_cp_mem_addr_size          :    11;
+            uint32_t ulp_cp_mem_offst_clr          :    1;
+            uint32_t reserved23                    :    5;
+            uint32_t ulp_cp_clk_fo                 :    1;  /*ulp coprocessor clk force on*/
+            uint32_t ulp_cp_reset                  :    1;  /*ulp coprocessor clk software reset*/
+            uint32_t ulp_cp_force_start_top        :    1;  /*1: ULP-coprocessor is started by SW*/
+            uint32_t ulp_cp_start_top              :    1;  /*Write 1 to start ULP-coprocessor*/
+        };
+        uint32_t val;
+    } ulp_cp_ctrl;
+    union {
+        struct {
+            uint32_t cocpu_clk_fo                  :    1;  /*cocpu clk force on*/
+            uint32_t cocpu_start_2_reset_dis       :    6;  /*time from start cocpu to pull down reset*/
+            uint32_t cocpu_start_2_intr_en         :    6;  /*time from start cocpu to give start interrupt*/
+            uint32_t cocpu_shut                    :    1;  /*to shut cocpu*/
+            uint32_t cocpu_shut_2_clk_dis          :    8;  /*time from shut cocpu to disable clk*/
+            uint32_t cocpu_shut_reset_en           :    1;  /*to reset cocpu*/
+            uint32_t cocpu_sel                     :    1;  /*1: old ULP 0: new riscV*/
+            uint32_t cocpu_done_force              :    1;  /*1: select riscv done 0: select ulp done*/
+            uint32_t cocpu_done                    :    1;  /*done signal used by riscv to control timer. */
+            uint32_t cocpu_sw_int_trigger          :    1;  /*trigger cocpu register interrupt*/
+            uint32_t cocpu_clkgate_en              :    1;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } cocpu_ctrl;
+    union {
+        struct {
+            uint32_t touch_sleep_cycles            :    16;  /*sleep cycles for timer*/
+            uint32_t touch_meas_num                :    16;  /*the meas length (in 8MHz)*/
+        };
+        uint32_t val;
+    } touch_ctrl1;
+    union {
+        struct {
+            uint32_t reserved0                     :    2;
+            uint32_t touch_drange                  :    2;  /*TOUCH_DRANGE*/
+            uint32_t touch_drefl                   :    2;  /*TOUCH_DREFL*/
+            uint32_t touch_drefh                   :    2;  /*TOUCH_DREFH*/
+            uint32_t touch_xpd_bias                :    1;  /*TOUCH_XPD_BIAS*/
+            uint32_t touch_refc                    :    3;  /*TOUCH pad0 reference cap*/
+            uint32_t touch_dbias                   :    1;  /*1:use self bias 0:use bandgap bias*/
+            uint32_t touch_slp_timer_en            :    1;  /*touch timer enable bit*/
+            uint32_t touch_start_fsm_en            :    1;  /*1: TOUCH_START & TOUCH_XPD is controlled by touch fsm*/
+            uint32_t touch_start_en                :    1;  /*1: start touch fsm*/
+            uint32_t touch_start_force             :    1;  /*1: to start touch fsm by SW*/
+            uint32_t touch_xpd_wait                :    8;  /*the waiting cycles (in 8MHz) between TOUCH_START and TOUCH_XPD*/
+            uint32_t touch_slp_cyc_div             :    2;  /*when a touch pad is active*/
+            uint32_t touch_timer_force_done        :    2;  /*force touch timer done*/
+            uint32_t touch_reset                   :    1;  /*reset upgrade touch*/
+            uint32_t touch_clk_fo                  :    1;  /*touch clock force on*/
+            uint32_t touch_clkgate_en              :    1;  /*touch clock enable*/
+        };
+        uint32_t val;
+    } touch_ctrl2;
+    union {
+        struct {
+            uint32_t touch_denoise_res             :    2;  /*De-noise resolution: 12/10/8/4 bit*/
+            uint32_t touch_denoise_en              :    1;  /*touch pad0 will be used to de-noise*/
+            uint32_t reserved3                     :    5;
+            uint32_t touch_inactive_connection     :    1;  /*inactive touch pads connect to 1: gnd 0: HighZ*/
+            uint32_t touch_shield_pad_en           :    1;  /*touch pad14 will be used as shield*/
+            uint32_t touch_scan_pad_map            :    15;  /*touch scan mode pad enable map*/
+            uint32_t touch_bufdrv                  :    3;  /*touch7 buffer driver strength*/
+            uint32_t touch_out_ring                :    4;  /*select out ring pad*/
+        };
+        uint32_t val;
+    } touch_scan_ctrl;
+    union {
+        struct {
+            uint32_t touch_slp_th                  :    22;  /*the threshold for sleep touch pad*/
+            uint32_t reserved22                    :    4;
+            uint32_t touch_slp_approach_en         :    1;  /*sleep pad approach function enable*/
+            uint32_t touch_slp_pad                 :    5;  /* */
+        };
+        uint32_t val;
+    } touch_slp_thres;
+    union {
+        struct {
+            uint32_t reserved0                     :    23;
+            uint32_t touch_slp_channel_clr         :    1;  /*clear touch slp channel*/
+            uint32_t touch_approach_meas_time      :    8;  /*approach pads total meas times*/
+        };
+        uint32_t val;
+    } touch_approach;
+    union {
+        struct {
+            uint32_t reserved0                     :    7;
+            uint32_t touch_bypass_neg_noise_thres  :    1;
+            uint32_t touch_bypass_noise_thres      :    1;
+            uint32_t touch_smooth_lvl              :    2;
+            uint32_t touch_jitter_step             :    4;  /*touch jitter step*/
+            uint32_t config1:               4;
+            uint32_t config2:               2;
+            uint32_t touch_noise_thres             :    2;
+            uint32_t config3:               2;
+            uint32_t touch_debounce                :    3;  /*debounce counter*/
+            uint32_t touch_filter_mode             :    3;  /*0: IIR ? 1: IIR ? 2: IIR 1/8 3: Jitter*/
+            uint32_t touch_filter_en               :    1;  /*touch filter enable*/
+        };
+        uint32_t val;
+    } touch_filter_ctrl;
+    union {
+        struct {
+            uint32_t usb_vrefh                     :    2;
+            uint32_t usb_vrefl                     :    2;
+            uint32_t usb_vref_override             :    1;
+            uint32_t usb_pad_pull_override         :    1;
+            uint32_t usb_dp_pullup                 :    1;
+            uint32_t usb_dp_pulldown               :    1;
+            uint32_t usb_dm_pullup                 :    1;
+            uint32_t usb_dm_pulldown               :    1;
+            uint32_t usb_pullup_value              :    1;
+            uint32_t usb_pad_enable_override       :    1;
+            uint32_t usb_pad_enable                :    1;
+            uint32_t usb_txm                       :    1;
+            uint32_t usb_txp                       :    1;
+            uint32_t usb_tx_en                     :    1;
+            uint32_t usb_tx_en_override            :    1;
+            uint32_t usb_reset_disable             :    1;
+            uint32_t io_mux_reset_disable          :    1;
+            uint32_t sw_usb_phy_sel                :    1;
+            uint32_t sw_hw_usb_phy_sel             :    1;
+            uint32_t reserved21                    :    11;
+        };
+        uint32_t val;
+    } usb_conf;
+    union {
+        struct {
+            uint32_t touch_timeout_num             :    22;
+            uint32_t touch_timeout_en              :    1;
+            uint32_t reserved23                    :    9;
+        };
+        uint32_t val;
+    } touch_timeout_ctrl;
+    union {
+        struct {
+            uint32_t reject_cause                  :    18;  /*sleep reject cause*/
+            uint32_t reserved18                    :    14;
+        };
+        uint32_t val;
+    } slp_reject_cause;
+    union {
+        struct {
+            uint32_t force_download_boot           :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } option1;
+    union {
+        struct {
+            uint32_t wakeup_cause                  :    17;  /*sleep wakeup cause*/
+            uint32_t reserved17                    :    15;
+        };
+        uint32_t val;
+    } slp_wakeup_cause;
+    union {
+        struct {
+            uint32_t reserved0                     :    8;
+            uint32_t ulp_cp_timer_slp_cycle        :    24;  /*sleep cycles for ULP-coprocessor timer*/
+        };
+        uint32_t val;
+    } ulp_cp_timer_1;
+    union {
+        struct {
+            uint32_t slp_wakeup_w1ts               :    1;  /*enable sleep wakeup interrupt*/
+            uint32_t slp_reject_w1ts               :    1;  /*enable sleep reject interrupt*/
+            uint32_t sdio_idle_w1ts                :    1;  /*enable SDIO idle interrupt*/
+            uint32_t rtc_wdt_w1ts                  :    1;  /*enable RTC WDT interrupt*/
+            uint32_t rtc_touch_scan_done_w1ts      :    1;  /*enable touch scan done interrupt*/
+            uint32_t rtc_ulp_cp_w1ts               :    1;  /*enable ULP-coprocessor interrupt*/
+            uint32_t rtc_touch_done_w1ts           :    1;  /*enable touch done interrupt*/
+            uint32_t rtc_touch_active_w1ts         :    1;  /*enable touch active interrupt*/
+            uint32_t rtc_touch_inactive_w1ts       :    1;  /*enable touch inactive interrupt*/
+            uint32_t w1ts                          :    1;  /*enable brown out interrupt*/
+            uint32_t rtc_main_timer_w1ts           :    1;  /*enable RTC main timer interrupt*/
+            uint32_t rtc_saradc1_w1ts              :    1;  /*enable saradc1 interrupt*/
+            uint32_t rtc_tsens_w1ts                :    1;  /*enable tsens interrupt*/
+            uint32_t rtc_cocpu_w1ts                :    1;  /*enable riscV cocpu interrupt*/
+            uint32_t rtc_saradc2_w1ts              :    1;  /*enable saradc2 interrupt*/
+            uint32_t rtc_swd_w1ts                  :    1;  /*enable super watch dog interrupt*/
+            uint32_t rtc_xtal32k_dead_w1ts         :    1;  /*enable xtal32k_dead  interrupt*/
+            uint32_t rtc_cocpu_trap_w1ts           :    1;  /*enable cocpu trap interrupt*/
+            uint32_t rtc_touch_timeout_w1ts        :    1;  /*enable touch timeout interrupt*/
+            uint32_t rtc_glitch_det_w1ts           :    1;  /*enbale gitch det interrupt*/
+            uint32_t rtc_touch_approach_loop_done_w1ts:    1;
+            uint32_t reserved21                    :    11;
+        };
+        uint32_t val;
+    } int_ena_w1ts;
+    union {
+        struct {
+            uint32_t slp_wakeup_w1tc               :    1;  /*enable sleep wakeup interrupt*/
+            uint32_t slp_reject_w1tc               :    1;  /*enable sleep reject interrupt*/
+            uint32_t sdio_idle_w1tc                :    1;  /*enable SDIO idle interrupt*/
+            uint32_t rtc_wdt_w1tc                  :    1;  /*enable RTC WDT interrupt*/
+            uint32_t rtc_touch_scan_done_w1tc      :    1;  /*enable touch scan done interrupt*/
+            uint32_t rtc_ulp_cp_w1tc               :    1;  /*enable ULP-coprocessor interrupt*/
+            uint32_t rtc_touch_done_w1tc           :    1;  /*enable touch done interrupt*/
+            uint32_t rtc_touch_active_w1tc         :    1;  /*enable touch active interrupt*/
+            uint32_t rtc_touch_inactive_w1tc       :    1;  /*enable touch inactive interrupt*/
+            uint32_t w1tc                          :    1;  /*enable brown out interrupt*/
+            uint32_t rtc_main_timer_w1tc           :    1;  /*enable RTC main timer interrupt*/
+            uint32_t rtc_saradc1_w1tc              :    1;  /*enable saradc1 interrupt*/
+            uint32_t rtc_tsens_w1tc                :    1;  /*enable tsens interrupt*/
+            uint32_t rtc_cocpu_w1tc                :    1;  /*enable riscV cocpu interrupt*/
+            uint32_t rtc_saradc2_w1tc              :    1;  /*enable saradc2 interrupt*/
+            uint32_t rtc_swd_w1tc                  :    1;  /*enable super watch dog interrupt*/
+            uint32_t rtc_xtal32k_dead_w1tc         :    1;  /*enable xtal32k_dead  interrupt*/
+            uint32_t rtc_cocpu_trap_w1tc           :    1;  /*enable cocpu trap interrupt*/
+            uint32_t rtc_touch_timeout_w1tc        :    1;  /*enable touch timeout interrupt*/
+            uint32_t rtc_glitch_det_w1tc           :    1;  /*enbale gitch det interrupt*/
+            uint32_t rtc_touch_approach_loop_done_w1tc:    1;
+            uint32_t reserved21                    :    11;
+        };
+        uint32_t val;
+    } int_ena_w1tc;
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t retention_tag_mode            :    4;
+            uint32_t retention_target              :    2;
+            uint32_t retention_clk_sel             :    1;
+            uint32_t retention_done_wait           :    3;
+            uint32_t retention_clkoff_wait         :    4;
+            uint32_t retention_en                  :    1;
+            uint32_t retention_wait                :    7;  /*wait cycles for rention operation*/
+        };
+        uint32_t val;
+    } retention_ctrl;
+    union {
+        struct {
+            uint32_t reserved0                     :    26;
+            uint32_t power_glitch_dsense           :    2;
+            uint32_t power_glitch_force_pd         :    1;
+            uint32_t power_glitch_force_pu         :    1;
+            uint32_t power_glitch_efuse_sel        :    1;  /*select use analog fib signal*/
+            uint32_t power_glitch_en               :    1;
+        };
+        uint32_t val;
+    } pg_ctrl;
+    union {
+        struct {
+            uint32_t rtc_fib_sel                   :    3;
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } fib_sel;
+    union {
+        struct {
+            uint32_t reserved0                     :    2;
+            uint32_t touch_pad9_dac                :    3;
+            uint32_t touch_pad8_dac                :    3;
+            uint32_t touch_pad7_dac                :    3;
+            uint32_t touch_pad6_dac                :    3;
+            uint32_t touch_pad5_dac                :    3;
+            uint32_t touch_pad4_dac                :    3;
+            uint32_t touch_pad3_dac                :    3;
+            uint32_t touch_pad2_dac                :    3;
+            uint32_t touch_pad1_dac                :    3;
+            uint32_t touch_pad0_dac                :    3;
+        };
+        uint32_t val;
+    } touch_dac;
+    union {
+        struct {
+            uint32_t reserved0                     :    17;
+            uint32_t touch_pad14_dac               :    3;
+            uint32_t touch_pad13_dac               :    3;
+            uint32_t touch_pad12_dac               :    3;
+            uint32_t touch_pad11_dac               :    3;
+            uint32_t touch_pad10_dac               :    3;
+        };
+        uint32_t val;
+    } touch_dac1;
+    union {
+        struct {
+            uint32_t reserved0                     :    31;
+            uint32_t disable_rtc_cpu               :    1;
+        };
+        uint32_t val;
+    } cocpu_disable;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    union {
+        struct {
+            uint32_t date                          :    28;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } date;
+} rtc_cntl_dev_t;
+extern rtc_cntl_dev_t RTCCNTL;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_RTC_CNTL_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_gpio_channel.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_gpio_channel.h
new file mode 100644
index 00000000000..4d35b11235e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_gpio_channel.h
@@ -0,0 +1,70 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+//RTC GPIO channels
+#define RTCIO_GPIO36_CHANNEL        0   //RTCIO_CHANNEL_0
+#define RTCIO_CHANNEL_0_GPIO_NUM    36
+
+#define RTCIO_GPIO37_CHANNEL        1   //RTCIO_CHANNEL_1
+#define RTCIO_CHANNEL_1_GPIO_NUM    37
+
+#define RTCIO_GPIO38_CHANNEL        2   //RTCIO_CHANNEL_2
+#define RTCIO_CHANNEL_2_GPIO_NUM    38
+
+#define RTCIO_GPIO39_CHANNEL        3   //RTCIO_CHANNEL_3
+#define RTCIO_CHANNEL_3_GPIO_NUM    39
+
+#define RTCIO_GPIO34_CHANNEL        4   //RTCIO_CHANNEL_4
+#define RTCIO_CHANNEL_4_GPIO_NUM    34
+
+#define RTCIO_GPIO35_CHANNEL        5   //RTCIO_CHANNEL_5
+#define RTCIO_CHANNEL_5_GPIO_NUM    35
+
+#define RTCIO_GPIO25_CHANNEL        6   //RTCIO_CHANNEL_6
+#define RTCIO_CHANNEL_6_GPIO_NUM    25
+
+#define RTCIO_GPIO26_CHANNEL        7   //RTCIO_CHANNEL_7
+#define RTCIO_CHANNEL_7_GPIO_NUM    26
+
+#define RTCIO_GPIO33_CHANNEL        8   //RTCIO_CHANNEL_8
+#define RTCIO_CHANNEL_8_GPIO_NUM    33
+
+#define RTCIO_GPIO32_CHANNEL        9   //RTCIO_CHANNEL_9
+#define RTCIO_CHANNEL_9_GPIO_NUM    32
+
+#define RTCIO_GPIO4_CHANNEL         10   //RTCIO_CHANNEL_10
+#define RTCIO_CHANNEL_10_GPIO_NUM   4
+
+#define RTCIO_GPIO0_CHANNEL         11   //RTCIO_CHANNEL_11
+#define RTCIO_CHANNEL_11_GPIO_NUM   0
+
+#define RTCIO_GPIO2_CHANNEL         12   //RTCIO_CHANNEL_12
+#define RTCIO_CHANNEL_12_GPIO_NUM   2
+
+#define RTCIO_GPIO15_CHANNEL        13   //RTCIO_CHANNEL_13
+#define RTCIO_CHANNEL_13_GPIO_NUM   15
+
+#define RTCIO_GPIO13_CHANNEL        14   //RTCIO_CHANNEL_14
+#define RTCIO_CHANNEL_14_GPIO_NUM   13
+
+#define RTCIO_GPIO12_CHANNEL        15   //RTCIO_CHANNEL_15
+#define RTCIO_CHANNEL_15_GPIO_NUM   12
+
+#define RTCIO_GPIO14_CHANNEL        16   //RTCIO_CHANNEL_16
+#define RTCIO_CHANNEL_16_GPIO_NUM   14
+
+#define RTCIO_GPIO27_CHANNEL        17   //RTCIO_CHANNEL_17
+#define RTCIO_CHANNEL_17_GPIO_NUM   27
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_i2c_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_i2c_reg.h
new file mode 100644
index 00000000000..3c065af2591
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_i2c_reg.h
@@ -0,0 +1,873 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** RTC_I2C_SCL_LOW_REG register
+ *  configure low scl period
+ */
+#define RTC_I2C_SCL_LOW_REG (DR_REG_RTC_BASE + 0x0)
+/** RTC_I2C_SCL_LOW_PERIOD_REG : R/W; bitpos: [19:0]; default: 256;
+ *  time period that scl =0
+ */
+#define RTC_I2C_SCL_LOW_PERIOD_REG    0x000FFFFFU
+#define RTC_I2C_SCL_LOW_PERIOD_REG_M  (RTC_I2C_SCL_LOW_PERIOD_REG_V << RTC_I2C_SCL_LOW_PERIOD_REG_S)
+#define RTC_I2C_SCL_LOW_PERIOD_REG_V  0x000FFFFFU
+#define RTC_I2C_SCL_LOW_PERIOD_REG_S  0
+
+/** RTC_I2C_CTRL_REG register
+ *  configure i2c ctrl
+ */
+#define RTC_I2C_CTRL_REG (DR_REG_RTC_BASE + 0x4)
+/** RTC_I2C_SDA_FORCE_OUT : R/W; bitpos: [0]; default: 0;
+ *  1=push pull,0=open drain
+ */
+#define RTC_I2C_SDA_FORCE_OUT    (BIT(0))
+#define RTC_I2C_SDA_FORCE_OUT_M  (RTC_I2C_SDA_FORCE_OUT_V << RTC_I2C_SDA_FORCE_OUT_S)
+#define RTC_I2C_SDA_FORCE_OUT_V  0x00000001U
+#define RTC_I2C_SDA_FORCE_OUT_S  0
+/** RTC_I2C_SCL_FORCE_OUT : R/W; bitpos: [1]; default: 0;
+ *  1=push pull,0=open drain
+ */
+#define RTC_I2C_SCL_FORCE_OUT    (BIT(1))
+#define RTC_I2C_SCL_FORCE_OUT_M  (RTC_I2C_SCL_FORCE_OUT_V << RTC_I2C_SCL_FORCE_OUT_S)
+#define RTC_I2C_SCL_FORCE_OUT_V  0x00000001U
+#define RTC_I2C_SCL_FORCE_OUT_S  1
+/** RTC_I2C_MS_MODE : R/W; bitpos: [2]; default: 0;
+ *  1=master,0=slave
+ */
+#define RTC_I2C_MS_MODE    (BIT(2))
+#define RTC_I2C_MS_MODE_M  (RTC_I2C_MS_MODE_V << RTC_I2C_MS_MODE_S)
+#define RTC_I2C_MS_MODE_V  0x00000001U
+#define RTC_I2C_MS_MODE_S  2
+/** RTC_I2C_TRANS_START : R/W; bitpos: [3]; default: 0;
+ *  force start
+ */
+#define RTC_I2C_TRANS_START    (BIT(3))
+#define RTC_I2C_TRANS_START_M  (RTC_I2C_TRANS_START_V << RTC_I2C_TRANS_START_S)
+#define RTC_I2C_TRANS_START_V  0x00000001U
+#define RTC_I2C_TRANS_START_S  3
+/** RTC_I2C_TX_LSB_FIRST : R/W; bitpos: [4]; default: 0;
+ *  transit lsb first
+ */
+#define RTC_I2C_TX_LSB_FIRST    (BIT(4))
+#define RTC_I2C_TX_LSB_FIRST_M  (RTC_I2C_TX_LSB_FIRST_V << RTC_I2C_TX_LSB_FIRST_S)
+#define RTC_I2C_TX_LSB_FIRST_V  0x00000001U
+#define RTC_I2C_TX_LSB_FIRST_S  4
+/** RTC_I2C_RX_LSB_FIRST : R/W; bitpos: [5]; default: 0;
+ *  receive lsb first
+ */
+#define RTC_I2C_RX_LSB_FIRST    (BIT(5))
+#define RTC_I2C_RX_LSB_FIRST_M  (RTC_I2C_RX_LSB_FIRST_V << RTC_I2C_RX_LSB_FIRST_S)
+#define RTC_I2C_RX_LSB_FIRST_V  0x00000001U
+#define RTC_I2C_RX_LSB_FIRST_S  5
+/** RTC_I2C_I2C_CTRL_CLK_GATE_EN : R/W; bitpos: [29]; default: 0;
+ *  configure i2c ctrl clk enable
+ */
+#define RTC_I2C_I2C_CTRL_CLK_GATE_EN    (BIT(29))
+#define RTC_I2C_I2C_CTRL_CLK_GATE_EN_M  (RTC_I2C_I2C_CTRL_CLK_GATE_EN_V << RTC_I2C_I2C_CTRL_CLK_GATE_EN_S)
+#define RTC_I2C_I2C_CTRL_CLK_GATE_EN_V  0x00000001U
+#define RTC_I2C_I2C_CTRL_CLK_GATE_EN_S  29
+/** RTC_I2C_I2C_RESET : R/W; bitpos: [30]; default: 0;
+ *  rtc i2c sw reset
+ */
+#define RTC_I2C_I2C_RESET    (BIT(30))
+#define RTC_I2C_I2C_RESET_M  (RTC_I2C_I2C_RESET_V << RTC_I2C_I2C_RESET_S)
+#define RTC_I2C_I2C_RESET_V  0x00000001U
+#define RTC_I2C_I2C_RESET_S  30
+/** RTC_I2C_I2CCLK_EN : R/W; bitpos: [31]; default: 0;
+ *  rtc i2c reg clk gating
+ */
+#define RTC_I2C_I2CCLK_EN    (BIT(31))
+#define RTC_I2C_I2CCLK_EN_M  (RTC_I2C_I2CCLK_EN_V << RTC_I2C_I2CCLK_EN_S)
+#define RTC_I2C_I2CCLK_EN_V  0x00000001U
+#define RTC_I2C_I2CCLK_EN_S  31
+
+/** RTC_I2C_STATUS_REG register
+ *  get i2c status
+ */
+#define RTC_I2C_STATUS_REG (DR_REG_RTC_BASE + 0x8)
+/** RTC_I2C_ACK_REC : RO; bitpos: [0]; default: 0;
+ *  ack response
+ */
+#define RTC_I2C_ACK_REC    (BIT(0))
+#define RTC_I2C_ACK_REC_M  (RTC_I2C_ACK_REC_V << RTC_I2C_ACK_REC_S)
+#define RTC_I2C_ACK_REC_V  0x00000001U
+#define RTC_I2C_ACK_REC_S  0
+/** RTC_I2C_SLAVE_RW : RO; bitpos: [1]; default: 0;
+ *  slave read or write
+ */
+#define RTC_I2C_SLAVE_RW    (BIT(1))
+#define RTC_I2C_SLAVE_RW_M  (RTC_I2C_SLAVE_RW_V << RTC_I2C_SLAVE_RW_S)
+#define RTC_I2C_SLAVE_RW_V  0x00000001U
+#define RTC_I2C_SLAVE_RW_S  1
+/** RTC_I2C_ARB_LOST : RO; bitpos: [2]; default: 0;
+ *  arbitration is lost
+ */
+#define RTC_I2C_ARB_LOST    (BIT(2))
+#define RTC_I2C_ARB_LOST_M  (RTC_I2C_ARB_LOST_V << RTC_I2C_ARB_LOST_S)
+#define RTC_I2C_ARB_LOST_V  0x00000001U
+#define RTC_I2C_ARB_LOST_S  2
+/** RTC_I2C_BUS_BUSY : RO; bitpos: [3]; default: 0;
+ *  bus is busy
+ */
+#define RTC_I2C_BUS_BUSY    (BIT(3))
+#define RTC_I2C_BUS_BUSY_M  (RTC_I2C_BUS_BUSY_V << RTC_I2C_BUS_BUSY_S)
+#define RTC_I2C_BUS_BUSY_V  0x00000001U
+#define RTC_I2C_BUS_BUSY_S  3
+/** RTC_I2C_SLAVE_ADDRESSED : RO; bitpos: [4]; default: 0;
+ *  slave reg sub address
+ */
+#define RTC_I2C_SLAVE_ADDRESSED    (BIT(4))
+#define RTC_I2C_SLAVE_ADDRESSED_M  (RTC_I2C_SLAVE_ADDRESSED_V << RTC_I2C_SLAVE_ADDRESSED_S)
+#define RTC_I2C_SLAVE_ADDRESSED_V  0x00000001U
+#define RTC_I2C_SLAVE_ADDRESSED_S  4
+/** RTC_I2C_BYTE_TRANS : RO; bitpos: [5]; default: 0;
+ *  One byte transit done
+ */
+#define RTC_I2C_BYTE_TRANS    (BIT(5))
+#define RTC_I2C_BYTE_TRANS_M  (RTC_I2C_BYTE_TRANS_V << RTC_I2C_BYTE_TRANS_S)
+#define RTC_I2C_BYTE_TRANS_V  0x00000001U
+#define RTC_I2C_BYTE_TRANS_S  5
+/** RTC_I2C_OP_CNT : RO; bitpos: [7:6]; default: 0;
+ *  which operation is working
+ */
+#define RTC_I2C_OP_CNT    0x00000003U
+#define RTC_I2C_OP_CNT_M  (RTC_I2C_OP_CNT_V << RTC_I2C_OP_CNT_S)
+#define RTC_I2C_OP_CNT_V  0x00000003U
+#define RTC_I2C_OP_CNT_S  6
+/** RTC_I2C_SHIFT_REG : RO; bitpos: [23:16]; default: 0;
+ *  shifter content
+ */
+#define RTC_I2C_SHIFT_REG    0x000000FFU
+#define RTC_I2C_SHIFT_REG_M  (RTC_I2C_SHIFT_REG_V << RTC_I2C_SHIFT_REG_S)
+#define RTC_I2C_SHIFT_REG_V  0x000000FFU
+#define RTC_I2C_SHIFT_REG_S  16
+/** RTC_I2C_SCL_MAIN_STATE_LAST : RO; bitpos: [26:24]; default: 0;
+ *  i2c last main status
+ */
+#define RTC_I2C_SCL_MAIN_STATE_LAST    0x00000007U
+#define RTC_I2C_SCL_MAIN_STATE_LAST_M  (RTC_I2C_SCL_MAIN_STATE_LAST_V << RTC_I2C_SCL_MAIN_STATE_LAST_S)
+#define RTC_I2C_SCL_MAIN_STATE_LAST_V  0x00000007U
+#define RTC_I2C_SCL_MAIN_STATE_LAST_S  24
+/** RTC_I2C_SCL_STATE_LAST : RO; bitpos: [30:28]; default: 0;
+ *  scl last status
+ */
+#define RTC_I2C_SCL_STATE_LAST    0x00000007U
+#define RTC_I2C_SCL_STATE_LAST_M  (RTC_I2C_SCL_STATE_LAST_V << RTC_I2C_SCL_STATE_LAST_S)
+#define RTC_I2C_SCL_STATE_LAST_V  0x00000007U
+#define RTC_I2C_SCL_STATE_LAST_S  28
+
+/** RTC_I2C_TO_REG register
+ *  configure time out
+ */
+#define RTC_I2C_TO_REG (DR_REG_RTC_BASE + 0xc)
+/** RTC_I2C_TIME_OUT_REG : R/W; bitpos: [19:0]; default: 65536;
+ *  time out threshold
+ */
+#define RTC_I2C_TIME_OUT_REG    0x000FFFFFU
+#define RTC_I2C_TIME_OUT_REG_M  (RTC_I2C_TIME_OUT_REG_V << RTC_I2C_TIME_OUT_REG_S)
+#define RTC_I2C_TIME_OUT_REG_V  0x000FFFFFU
+#define RTC_I2C_TIME_OUT_REG_S  0
+
+/** RTC_I2C_SLAVE_ADDR_REG register
+ *  configure slave id
+ */
+#define RTC_I2C_SLAVE_ADDR_REG (DR_REG_RTC_BASE + 0x10)
+/** RTC_I2C_SLAVE_ADDR : R/W; bitpos: [14:0]; default: 0;
+ *  slave address
+ */
+#define RTC_I2C_SLAVE_ADDR    0x00007FFFU
+#define RTC_I2C_SLAVE_ADDR_M  (RTC_I2C_SLAVE_ADDR_V << RTC_I2C_SLAVE_ADDR_S)
+#define RTC_I2C_SLAVE_ADDR_V  0x00007FFFU
+#define RTC_I2C_SLAVE_ADDR_S  0
+/** RTC_I2C_ADDR_10BIT_EN : R/W; bitpos: [31]; default: 0;
+ *  i2c 10bit mode enable
+ */
+#define RTC_I2C_ADDR_10BIT_EN    (BIT(31))
+#define RTC_I2C_ADDR_10BIT_EN_M  (RTC_I2C_ADDR_10BIT_EN_V << RTC_I2C_ADDR_10BIT_EN_S)
+#define RTC_I2C_ADDR_10BIT_EN_V  0x00000001U
+#define RTC_I2C_ADDR_10BIT_EN_S  31
+
+/** RTC_I2C_SCL_HIGH_REG register
+ *  configure high scl period
+ */
+#define RTC_I2C_SCL_HIGH_REG (DR_REG_RTC_BASE + 0x14)
+/** RTC_I2C_SCL_HIGH_PERIOD_REG : R/W; bitpos: [19:0]; default: 256;
+ *  time period that scl = 1
+ */
+#define RTC_I2C_SCL_HIGH_PERIOD_REG    0x000FFFFFU
+#define RTC_I2C_SCL_HIGH_PERIOD_REG_M  (RTC_I2C_SCL_HIGH_PERIOD_REG_V << RTC_I2C_SCL_HIGH_PERIOD_REG_S)
+#define RTC_I2C_SCL_HIGH_PERIOD_REG_V  0x000FFFFFU
+#define RTC_I2C_SCL_HIGH_PERIOD_REG_S  0
+
+/** RTC_I2C_SDA_DUTY_REG register
+ *  configure sda duty
+ */
+#define RTC_I2C_SDA_DUTY_REG (DR_REG_RTC_BASE + 0x18)
+/** RTC_I2C_SDA_DUTY_NUM : R/W; bitpos: [19:0]; default: 16;
+ *  time period for SDA to toggle after SCL goes low
+ */
+#define RTC_I2C_SDA_DUTY_NUM    0x000FFFFFU
+#define RTC_I2C_SDA_DUTY_NUM_M  (RTC_I2C_SDA_DUTY_NUM_V << RTC_I2C_SDA_DUTY_NUM_S)
+#define RTC_I2C_SDA_DUTY_NUM_V  0x000FFFFFU
+#define RTC_I2C_SDA_DUTY_NUM_S  0
+
+/** RTC_I2C_SCL_START_PERIOD_REG register
+ *  configure scl start period
+ */
+#define RTC_I2C_SCL_START_PERIOD_REG (DR_REG_RTC_BASE + 0x1c)
+/** RTC_I2C_SCL_START_PERIOD : R/W; bitpos: [19:0]; default: 8;
+ *  time period for SCL to toggle after I2C start is triggered
+ */
+#define RTC_I2C_SCL_START_PERIOD    0x000FFFFFU
+#define RTC_I2C_SCL_START_PERIOD_M  (RTC_I2C_SCL_START_PERIOD_V << RTC_I2C_SCL_START_PERIOD_S)
+#define RTC_I2C_SCL_START_PERIOD_V  0x000FFFFFU
+#define RTC_I2C_SCL_START_PERIOD_S  0
+
+/** RTC_I2C_SCL_STOP_PERIOD_REG register
+ *  configure scl stop period
+ */
+#define RTC_I2C_SCL_STOP_PERIOD_REG (DR_REG_RTC_BASE + 0x20)
+/** RTC_I2C_SCL_STOP_PERIOD : R/W; bitpos: [19:0]; default: 8;
+ *  time period for SCL to stop after I2C end is triggered
+ */
+#define RTC_I2C_SCL_STOP_PERIOD    0x000FFFFFU
+#define RTC_I2C_SCL_STOP_PERIOD_M  (RTC_I2C_SCL_STOP_PERIOD_V << RTC_I2C_SCL_STOP_PERIOD_S)
+#define RTC_I2C_SCL_STOP_PERIOD_V  0x000FFFFFU
+#define RTC_I2C_SCL_STOP_PERIOD_S  0
+
+/** RTC_I2C_INT_CLR_REG register
+ *  interrupt clear register
+ */
+#define RTC_I2C_INT_CLR_REG (DR_REG_RTC_BASE + 0x24)
+/** RTC_I2C_SLAVE_TRAN_COMP_INT_CLR : WO; bitpos: [0]; default: 0;
+ *  clear slave transit complete interrupt
+ */
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_CLR    (BIT(0))
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_CLR_M  (RTC_I2C_SLAVE_TRAN_COMP_INT_CLR_V << RTC_I2C_SLAVE_TRAN_COMP_INT_CLR_S)
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_CLR_V  0x00000001U
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_CLR_S  0
+/** RTC_I2C_ARBITRATION_LOST_INT_CLR : WO; bitpos: [1]; default: 0;
+ *  clear arbitration lost interrupt
+ */
+#define RTC_I2C_ARBITRATION_LOST_INT_CLR    (BIT(1))
+#define RTC_I2C_ARBITRATION_LOST_INT_CLR_M  (RTC_I2C_ARBITRATION_LOST_INT_CLR_V << RTC_I2C_ARBITRATION_LOST_INT_CLR_S)
+#define RTC_I2C_ARBITRATION_LOST_INT_CLR_V  0x00000001U
+#define RTC_I2C_ARBITRATION_LOST_INT_CLR_S  1
+/** RTC_I2C_MASTER_TRAN_COMP_INT_CLR : WO; bitpos: [2]; default: 0;
+ *  clear master transit complete interrupt
+ */
+#define RTC_I2C_MASTER_TRAN_COMP_INT_CLR    (BIT(2))
+#define RTC_I2C_MASTER_TRAN_COMP_INT_CLR_M  (RTC_I2C_MASTER_TRAN_COMP_INT_CLR_V << RTC_I2C_MASTER_TRAN_COMP_INT_CLR_S)
+#define RTC_I2C_MASTER_TRAN_COMP_INT_CLR_V  0x00000001U
+#define RTC_I2C_MASTER_TRAN_COMP_INT_CLR_S  2
+/** RTC_I2C_TRANS_COMPLETE_INT_CLR : WO; bitpos: [3]; default: 0;
+ *  clear transit complete interrupt
+ */
+#define RTC_I2C_TRANS_COMPLETE_INT_CLR    (BIT(3))
+#define RTC_I2C_TRANS_COMPLETE_INT_CLR_M  (RTC_I2C_TRANS_COMPLETE_INT_CLR_V << RTC_I2C_TRANS_COMPLETE_INT_CLR_S)
+#define RTC_I2C_TRANS_COMPLETE_INT_CLR_V  0x00000001U
+#define RTC_I2C_TRANS_COMPLETE_INT_CLR_S  3
+/** RTC_I2C_TIME_OUT_INT_CLR : WO; bitpos: [4]; default: 0;
+ *  clear time out interrupt
+ */
+#define RTC_I2C_TIME_OUT_INT_CLR    (BIT(4))
+#define RTC_I2C_TIME_OUT_INT_CLR_M  (RTC_I2C_TIME_OUT_INT_CLR_V << RTC_I2C_TIME_OUT_INT_CLR_S)
+#define RTC_I2C_TIME_OUT_INT_CLR_V  0x00000001U
+#define RTC_I2C_TIME_OUT_INT_CLR_S  4
+/** RTC_I2C_ACK_ERR_INT_CLR : WO; bitpos: [5]; default: 0;
+ *  clear ack error interrupt
+ */
+#define RTC_I2C_ACK_ERR_INT_CLR    (BIT(5))
+#define RTC_I2C_ACK_ERR_INT_CLR_M  (RTC_I2C_ACK_ERR_INT_CLR_V << RTC_I2C_ACK_ERR_INT_CLR_S)
+#define RTC_I2C_ACK_ERR_INT_CLR_V  0x00000001U
+#define RTC_I2C_ACK_ERR_INT_CLR_S  5
+/** RTC_I2C_RX_DATA_INT_CLR : WO; bitpos: [6]; default: 0;
+ *  clear receive data interrupt
+ */
+#define RTC_I2C_RX_DATA_INT_CLR    (BIT(6))
+#define RTC_I2C_RX_DATA_INT_CLR_M  (RTC_I2C_RX_DATA_INT_CLR_V << RTC_I2C_RX_DATA_INT_CLR_S)
+#define RTC_I2C_RX_DATA_INT_CLR_V  0x00000001U
+#define RTC_I2C_RX_DATA_INT_CLR_S  6
+/** RTC_I2C_TX_DATA_INT_CLR : WO; bitpos: [7]; default: 0;
+ *  clear transit load data complete interrupt
+ */
+#define RTC_I2C_TX_DATA_INT_CLR    (BIT(7))
+#define RTC_I2C_TX_DATA_INT_CLR_M  (RTC_I2C_TX_DATA_INT_CLR_V << RTC_I2C_TX_DATA_INT_CLR_S)
+#define RTC_I2C_TX_DATA_INT_CLR_V  0x00000001U
+#define RTC_I2C_TX_DATA_INT_CLR_S  7
+/** RTC_I2C_DETECT_START_INT_CLR : WO; bitpos: [8]; default: 0;
+ *  clear detect start interrupt
+ */
+#define RTC_I2C_DETECT_START_INT_CLR    (BIT(8))
+#define RTC_I2C_DETECT_START_INT_CLR_M  (RTC_I2C_DETECT_START_INT_CLR_V << RTC_I2C_DETECT_START_INT_CLR_S)
+#define RTC_I2C_DETECT_START_INT_CLR_V  0x00000001U
+#define RTC_I2C_DETECT_START_INT_CLR_S  8
+
+/** RTC_I2C_INT_RAW_REG register
+ *  interrupt raw register
+ */
+#define RTC_I2C_INT_RAW_REG (DR_REG_RTC_BASE + 0x28)
+/** RTC_I2C_SLAVE_TRAN_COMP_INT_RAW : RO; bitpos: [0]; default: 0;
+ *  slave transit complete interrupt raw
+ */
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_RAW    (BIT(0))
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_RAW_M  (RTC_I2C_SLAVE_TRAN_COMP_INT_RAW_V << RTC_I2C_SLAVE_TRAN_COMP_INT_RAW_S)
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_RAW_V  0x00000001U
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_RAW_S  0
+/** RTC_I2C_ARBITRATION_LOST_INT_RAW : RO; bitpos: [1]; default: 0;
+ *  arbitration lost interrupt raw
+ */
+#define RTC_I2C_ARBITRATION_LOST_INT_RAW    (BIT(1))
+#define RTC_I2C_ARBITRATION_LOST_INT_RAW_M  (RTC_I2C_ARBITRATION_LOST_INT_RAW_V << RTC_I2C_ARBITRATION_LOST_INT_RAW_S)
+#define RTC_I2C_ARBITRATION_LOST_INT_RAW_V  0x00000001U
+#define RTC_I2C_ARBITRATION_LOST_INT_RAW_S  1
+/** RTC_I2C_MASTER_TRAN_COMP_INT_RAW : RO; bitpos: [2]; default: 0;
+ *  master transit complete interrupt raw
+ */
+#define RTC_I2C_MASTER_TRAN_COMP_INT_RAW    (BIT(2))
+#define RTC_I2C_MASTER_TRAN_COMP_INT_RAW_M  (RTC_I2C_MASTER_TRAN_COMP_INT_RAW_V << RTC_I2C_MASTER_TRAN_COMP_INT_RAW_S)
+#define RTC_I2C_MASTER_TRAN_COMP_INT_RAW_V  0x00000001U
+#define RTC_I2C_MASTER_TRAN_COMP_INT_RAW_S  2
+/** RTC_I2C_TRANS_COMPLETE_INT_RAW : RO; bitpos: [3]; default: 0;
+ *  transit complete interrupt raw
+ */
+#define RTC_I2C_TRANS_COMPLETE_INT_RAW    (BIT(3))
+#define RTC_I2C_TRANS_COMPLETE_INT_RAW_M  (RTC_I2C_TRANS_COMPLETE_INT_RAW_V << RTC_I2C_TRANS_COMPLETE_INT_RAW_S)
+#define RTC_I2C_TRANS_COMPLETE_INT_RAW_V  0x00000001U
+#define RTC_I2C_TRANS_COMPLETE_INT_RAW_S  3
+/** RTC_I2C_TIME_OUT_INT_RAW : RO; bitpos: [4]; default: 0;
+ *  time out interrupt raw
+ */
+#define RTC_I2C_TIME_OUT_INT_RAW    (BIT(4))
+#define RTC_I2C_TIME_OUT_INT_RAW_M  (RTC_I2C_TIME_OUT_INT_RAW_V << RTC_I2C_TIME_OUT_INT_RAW_S)
+#define RTC_I2C_TIME_OUT_INT_RAW_V  0x00000001U
+#define RTC_I2C_TIME_OUT_INT_RAW_S  4
+/** RTC_I2C_ACK_ERR_INT_RAW : RO; bitpos: [5]; default: 0;
+ *  ack error interrupt raw
+ */
+#define RTC_I2C_ACK_ERR_INT_RAW    (BIT(5))
+#define RTC_I2C_ACK_ERR_INT_RAW_M  (RTC_I2C_ACK_ERR_INT_RAW_V << RTC_I2C_ACK_ERR_INT_RAW_S)
+#define RTC_I2C_ACK_ERR_INT_RAW_V  0x00000001U
+#define RTC_I2C_ACK_ERR_INT_RAW_S  5
+/** RTC_I2C_RX_DATA_INT_RAW : RO; bitpos: [6]; default: 0;
+ *  receive data interrupt raw
+ */
+#define RTC_I2C_RX_DATA_INT_RAW    (BIT(6))
+#define RTC_I2C_RX_DATA_INT_RAW_M  (RTC_I2C_RX_DATA_INT_RAW_V << RTC_I2C_RX_DATA_INT_RAW_S)
+#define RTC_I2C_RX_DATA_INT_RAW_V  0x00000001U
+#define RTC_I2C_RX_DATA_INT_RAW_S  6
+/** RTC_I2C_TX_DATA_INT_RAW : RO; bitpos: [7]; default: 0;
+ *  transit data interrupt raw
+ */
+#define RTC_I2C_TX_DATA_INT_RAW    (BIT(7))
+#define RTC_I2C_TX_DATA_INT_RAW_M  (RTC_I2C_TX_DATA_INT_RAW_V << RTC_I2C_TX_DATA_INT_RAW_S)
+#define RTC_I2C_TX_DATA_INT_RAW_V  0x00000001U
+#define RTC_I2C_TX_DATA_INT_RAW_S  7
+/** RTC_I2C_DETECT_START_INT_RAW : RO; bitpos: [8]; default: 0;
+ *  detect start interrupt raw
+ */
+#define RTC_I2C_DETECT_START_INT_RAW    (BIT(8))
+#define RTC_I2C_DETECT_START_INT_RAW_M  (RTC_I2C_DETECT_START_INT_RAW_V << RTC_I2C_DETECT_START_INT_RAW_S)
+#define RTC_I2C_DETECT_START_INT_RAW_V  0x00000001U
+#define RTC_I2C_DETECT_START_INT_RAW_S  8
+
+/** RTC_I2C_INT_ST_REG register
+ *  interrupt state register
+ */
+#define RTC_I2C_INT_ST_REG (DR_REG_RTC_BASE + 0x2c)
+/** RTC_I2C_SLAVE_TRAN_COMP_INT_ST : RO; bitpos: [0]; default: 0;
+ *  slave transit complete interrupt state
+ */
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_ST    (BIT(0))
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_ST_M  (RTC_I2C_SLAVE_TRAN_COMP_INT_ST_V << RTC_I2C_SLAVE_TRAN_COMP_INT_ST_S)
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_ST_V  0x00000001U
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_ST_S  0
+/** RTC_I2C_ARBITRATION_LOST_INT_ST : RO; bitpos: [1]; default: 0;
+ *  arbitration lost interrupt state
+ */
+#define RTC_I2C_ARBITRATION_LOST_INT_ST    (BIT(1))
+#define RTC_I2C_ARBITRATION_LOST_INT_ST_M  (RTC_I2C_ARBITRATION_LOST_INT_ST_V << RTC_I2C_ARBITRATION_LOST_INT_ST_S)
+#define RTC_I2C_ARBITRATION_LOST_INT_ST_V  0x00000001U
+#define RTC_I2C_ARBITRATION_LOST_INT_ST_S  1
+/** RTC_I2C_MASTER_TRAN_COMP_INT_ST : RO; bitpos: [2]; default: 0;
+ *  master transit complete interrupt state
+ */
+#define RTC_I2C_MASTER_TRAN_COMP_INT_ST    (BIT(2))
+#define RTC_I2C_MASTER_TRAN_COMP_INT_ST_M  (RTC_I2C_MASTER_TRAN_COMP_INT_ST_V << RTC_I2C_MASTER_TRAN_COMP_INT_ST_S)
+#define RTC_I2C_MASTER_TRAN_COMP_INT_ST_V  0x00000001U
+#define RTC_I2C_MASTER_TRAN_COMP_INT_ST_S  2
+/** RTC_I2C_TRANS_COMPLETE_INT_ST : RO; bitpos: [3]; default: 0;
+ *  transit complete interrupt state
+ */
+#define RTC_I2C_TRANS_COMPLETE_INT_ST    (BIT(3))
+#define RTC_I2C_TRANS_COMPLETE_INT_ST_M  (RTC_I2C_TRANS_COMPLETE_INT_ST_V << RTC_I2C_TRANS_COMPLETE_INT_ST_S)
+#define RTC_I2C_TRANS_COMPLETE_INT_ST_V  0x00000001U
+#define RTC_I2C_TRANS_COMPLETE_INT_ST_S  3
+/** RTC_I2C_TIME_OUT_INT_ST : RO; bitpos: [4]; default: 0;
+ *  time out interrupt state
+ */
+#define RTC_I2C_TIME_OUT_INT_ST    (BIT(4))
+#define RTC_I2C_TIME_OUT_INT_ST_M  (RTC_I2C_TIME_OUT_INT_ST_V << RTC_I2C_TIME_OUT_INT_ST_S)
+#define RTC_I2C_TIME_OUT_INT_ST_V  0x00000001U
+#define RTC_I2C_TIME_OUT_INT_ST_S  4
+/** RTC_I2C_ACK_ERR_INT_ST : RO; bitpos: [5]; default: 0;
+ *  ack error interrupt state
+ */
+#define RTC_I2C_ACK_ERR_INT_ST    (BIT(5))
+#define RTC_I2C_ACK_ERR_INT_ST_M  (RTC_I2C_ACK_ERR_INT_ST_V << RTC_I2C_ACK_ERR_INT_ST_S)
+#define RTC_I2C_ACK_ERR_INT_ST_V  0x00000001U
+#define RTC_I2C_ACK_ERR_INT_ST_S  5
+/** RTC_I2C_RX_DATA_INT_ST : RO; bitpos: [6]; default: 0;
+ *  receive data interrupt state
+ */
+#define RTC_I2C_RX_DATA_INT_ST    (BIT(6))
+#define RTC_I2C_RX_DATA_INT_ST_M  (RTC_I2C_RX_DATA_INT_ST_V << RTC_I2C_RX_DATA_INT_ST_S)
+#define RTC_I2C_RX_DATA_INT_ST_V  0x00000001U
+#define RTC_I2C_RX_DATA_INT_ST_S  6
+/** RTC_I2C_TX_DATA_INT_ST : RO; bitpos: [7]; default: 0;
+ *  transit data interrupt state
+ */
+#define RTC_I2C_TX_DATA_INT_ST    (BIT(7))
+#define RTC_I2C_TX_DATA_INT_ST_M  (RTC_I2C_TX_DATA_INT_ST_V << RTC_I2C_TX_DATA_INT_ST_S)
+#define RTC_I2C_TX_DATA_INT_ST_V  0x00000001U
+#define RTC_I2C_TX_DATA_INT_ST_S  7
+/** RTC_I2C_DETECT_START_INT_ST : RO; bitpos: [8]; default: 0;
+ *  detect start interrupt state
+ */
+#define RTC_I2C_DETECT_START_INT_ST    (BIT(8))
+#define RTC_I2C_DETECT_START_INT_ST_M  (RTC_I2C_DETECT_START_INT_ST_V << RTC_I2C_DETECT_START_INT_ST_S)
+#define RTC_I2C_DETECT_START_INT_ST_V  0x00000001U
+#define RTC_I2C_DETECT_START_INT_ST_S  8
+
+/** RTC_I2C_INT_ENA_REG register
+ *  interrupt enable register
+ */
+#define RTC_I2C_INT_ENA_REG (DR_REG_RTC_BASE + 0x30)
+/** RTC_I2C_SLAVE_TRAN_COMP_INT_ENA : R/W; bitpos: [0]; default: 0;
+ *  enable slave transit complete interrupt
+ */
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_ENA    (BIT(0))
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_ENA_M  (RTC_I2C_SLAVE_TRAN_COMP_INT_ENA_V << RTC_I2C_SLAVE_TRAN_COMP_INT_ENA_S)
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_ENA_V  0x00000001U
+#define RTC_I2C_SLAVE_TRAN_COMP_INT_ENA_S  0
+/** RTC_I2C_ARBITRATION_LOST_INT_ENA : R/W; bitpos: [1]; default: 0;
+ *  enable arbitration lost interrupt
+ */
+#define RTC_I2C_ARBITRATION_LOST_INT_ENA    (BIT(1))
+#define RTC_I2C_ARBITRATION_LOST_INT_ENA_M  (RTC_I2C_ARBITRATION_LOST_INT_ENA_V << RTC_I2C_ARBITRATION_LOST_INT_ENA_S)
+#define RTC_I2C_ARBITRATION_LOST_INT_ENA_V  0x00000001U
+#define RTC_I2C_ARBITRATION_LOST_INT_ENA_S  1
+/** RTC_I2C_MASTER_TRAN_COMP_INT_ENA : R/W; bitpos: [2]; default: 0;
+ *  enable master transit complete interrupt
+ */
+#define RTC_I2C_MASTER_TRAN_COMP_INT_ENA    (BIT(2))
+#define RTC_I2C_MASTER_TRAN_COMP_INT_ENA_M  (RTC_I2C_MASTER_TRAN_COMP_INT_ENA_V << RTC_I2C_MASTER_TRAN_COMP_INT_ENA_S)
+#define RTC_I2C_MASTER_TRAN_COMP_INT_ENA_V  0x00000001U
+#define RTC_I2C_MASTER_TRAN_COMP_INT_ENA_S  2
+/** RTC_I2C_TRANS_COMPLETE_INT_ENA : R/W; bitpos: [3]; default: 0;
+ *  enable transit complete interrupt
+ */
+#define RTC_I2C_TRANS_COMPLETE_INT_ENA    (BIT(3))
+#define RTC_I2C_TRANS_COMPLETE_INT_ENA_M  (RTC_I2C_TRANS_COMPLETE_INT_ENA_V << RTC_I2C_TRANS_COMPLETE_INT_ENA_S)
+#define RTC_I2C_TRANS_COMPLETE_INT_ENA_V  0x00000001U
+#define RTC_I2C_TRANS_COMPLETE_INT_ENA_S  3
+/** RTC_I2C_TIME_OUT_INT_ENA : R/W; bitpos: [4]; default: 0;
+ *  enable time out interrupt
+ */
+#define RTC_I2C_TIME_OUT_INT_ENA    (BIT(4))
+#define RTC_I2C_TIME_OUT_INT_ENA_M  (RTC_I2C_TIME_OUT_INT_ENA_V << RTC_I2C_TIME_OUT_INT_ENA_S)
+#define RTC_I2C_TIME_OUT_INT_ENA_V  0x00000001U
+#define RTC_I2C_TIME_OUT_INT_ENA_S  4
+/** RTC_I2C_ACK_ERR_INT_ENA : R/W; bitpos: [5]; default: 0;
+ *  enable eack error interrupt
+ */
+#define RTC_I2C_ACK_ERR_INT_ENA    (BIT(5))
+#define RTC_I2C_ACK_ERR_INT_ENA_M  (RTC_I2C_ACK_ERR_INT_ENA_V << RTC_I2C_ACK_ERR_INT_ENA_S)
+#define RTC_I2C_ACK_ERR_INT_ENA_V  0x00000001U
+#define RTC_I2C_ACK_ERR_INT_ENA_S  5
+/** RTC_I2C_RX_DATA_INT_ENA : R/W; bitpos: [6]; default: 0;
+ *  enable receive data interrupt
+ */
+#define RTC_I2C_RX_DATA_INT_ENA    (BIT(6))
+#define RTC_I2C_RX_DATA_INT_ENA_M  (RTC_I2C_RX_DATA_INT_ENA_V << RTC_I2C_RX_DATA_INT_ENA_S)
+#define RTC_I2C_RX_DATA_INT_ENA_V  0x00000001U
+#define RTC_I2C_RX_DATA_INT_ENA_S  6
+/** RTC_I2C_TX_DATA_INT_ENA : R/W; bitpos: [7]; default: 0;
+ *  enable transit data interrupt
+ */
+#define RTC_I2C_TX_DATA_INT_ENA    (BIT(7))
+#define RTC_I2C_TX_DATA_INT_ENA_M  (RTC_I2C_TX_DATA_INT_ENA_V << RTC_I2C_TX_DATA_INT_ENA_S)
+#define RTC_I2C_TX_DATA_INT_ENA_V  0x00000001U
+#define RTC_I2C_TX_DATA_INT_ENA_S  7
+/** RTC_I2C_DETECT_START_INT_ENA : R/W; bitpos: [8]; default: 0;
+ *  enable detect start interrupt
+ */
+#define RTC_I2C_DETECT_START_INT_ENA    (BIT(8))
+#define RTC_I2C_DETECT_START_INT_ENA_M  (RTC_I2C_DETECT_START_INT_ENA_V << RTC_I2C_DETECT_START_INT_ENA_S)
+#define RTC_I2C_DETECT_START_INT_ENA_V  0x00000001U
+#define RTC_I2C_DETECT_START_INT_ENA_S  8
+
+/** RTC_I2C_DATA_REG register
+ *  get i2c data status
+ */
+#define RTC_I2C_DATA_REG (DR_REG_RTC_BASE + 0x34)
+/** RTC_I2C_I2C_RDATA : RO; bitpos: [7:0]; default: 0;
+ *  data received
+ */
+#define RTC_I2C_I2C_RDATA    0x000000FFU
+#define RTC_I2C_I2C_RDATA_M  (RTC_I2C_I2C_RDATA_V << RTC_I2C_I2C_RDATA_S)
+#define RTC_I2C_I2C_RDATA_V  0x000000FFU
+#define RTC_I2C_I2C_RDATA_S  0
+/** RTC_I2C_SLAVE_TX_DATA : R/W; bitpos: [15:8]; default: 0;
+ *  data sent by slave
+ */
+#define RTC_I2C_SLAVE_TX_DATA    0x000000FFU
+#define RTC_I2C_SLAVE_TX_DATA_M  (RTC_I2C_SLAVE_TX_DATA_V << RTC_I2C_SLAVE_TX_DATA_S)
+#define RTC_I2C_SLAVE_TX_DATA_V  0x000000FFU
+#define RTC_I2C_SLAVE_TX_DATA_S  8
+/** RTC_I2C_I2C_DONE : RO; bitpos: [31]; default: 0;
+ *  i2c done
+ */
+#define RTC_I2C_I2C_DONE    (BIT(31))
+#define RTC_I2C_I2C_DONE_M  (RTC_I2C_I2C_DONE_V << RTC_I2C_I2C_DONE_S)
+#define RTC_I2C_I2C_DONE_V  0x00000001U
+#define RTC_I2C_I2C_DONE_S  31
+
+/** RTC_I2C_CMD0_REG register
+ *  i2c commond0 register
+ */
+#define RTC_I2C_CMD0_REG (DR_REG_RTC_BASE + 0x38)
+/** RTC_I2C_COMMAND0 : R/W; bitpos: [13:0]; default: 2307;
+ *  command0
+ */
+#define RTC_I2C_COMMAND0    0x00003FFFU
+#define RTC_I2C_COMMAND0_M  (RTC_I2C_COMMAND0_V << RTC_I2C_COMMAND0_S)
+#define RTC_I2C_COMMAND0_V  0x00003FFFU
+#define RTC_I2C_COMMAND0_S  0
+/** RTC_I2C_COMMAND0_DONE : RO; bitpos: [31]; default: 0;
+ *  command0_done
+ */
+#define RTC_I2C_COMMAND0_DONE    (BIT(31))
+#define RTC_I2C_COMMAND0_DONE_M  (RTC_I2C_COMMAND0_DONE_V << RTC_I2C_COMMAND0_DONE_S)
+#define RTC_I2C_COMMAND0_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND0_DONE_S  31
+
+/** RTC_I2C_CMD1_REG register
+ *  i2c commond1 register
+ */
+#define RTC_I2C_CMD1_REG (DR_REG_RTC_BASE + 0x3c)
+/** RTC_I2C_COMMAND1 : R/W; bitpos: [13:0]; default: 6401;
+ *  command1
+ */
+#define RTC_I2C_COMMAND1    0x00003FFFU
+#define RTC_I2C_COMMAND1_M  (RTC_I2C_COMMAND1_V << RTC_I2C_COMMAND1_S)
+#define RTC_I2C_COMMAND1_V  0x00003FFFU
+#define RTC_I2C_COMMAND1_S  0
+/** RTC_I2C_COMMAND1_DONE : RO; bitpos: [31]; default: 0;
+ *  command1_done
+ */
+#define RTC_I2C_COMMAND1_DONE    (BIT(31))
+#define RTC_I2C_COMMAND1_DONE_M  (RTC_I2C_COMMAND1_DONE_V << RTC_I2C_COMMAND1_DONE_S)
+#define RTC_I2C_COMMAND1_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND1_DONE_S  31
+
+/** RTC_I2C_CMD2_REG register
+ *  i2c commond2 register
+ */
+#define RTC_I2C_CMD2_REG (DR_REG_RTC_BASE + 0x40)
+/** RTC_I2C_COMMAND2 : R/W; bitpos: [13:0]; default: 2306;
+ *  command2
+ */
+#define RTC_I2C_COMMAND2    0x00003FFFU
+#define RTC_I2C_COMMAND2_M  (RTC_I2C_COMMAND2_V << RTC_I2C_COMMAND2_S)
+#define RTC_I2C_COMMAND2_V  0x00003FFFU
+#define RTC_I2C_COMMAND2_S  0
+/** RTC_I2C_COMMAND2_DONE : RO; bitpos: [31]; default: 0;
+ *  command2_done
+ */
+#define RTC_I2C_COMMAND2_DONE    (BIT(31))
+#define RTC_I2C_COMMAND2_DONE_M  (RTC_I2C_COMMAND2_DONE_V << RTC_I2C_COMMAND2_DONE_S)
+#define RTC_I2C_COMMAND2_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND2_DONE_S  31
+
+/** RTC_I2C_CMD3_REG register
+ *  i2c commond3 register
+ */
+#define RTC_I2C_CMD3_REG (DR_REG_RTC_BASE + 0x44)
+/** RTC_I2C_COMMAND3 : R/W; bitpos: [13:0]; default: 257;
+ *  command3
+ */
+#define RTC_I2C_COMMAND3    0x00003FFFU
+#define RTC_I2C_COMMAND3_M  (RTC_I2C_COMMAND3_V << RTC_I2C_COMMAND3_S)
+#define RTC_I2C_COMMAND3_V  0x00003FFFU
+#define RTC_I2C_COMMAND3_S  0
+/** RTC_I2C_COMMAND3_DONE : RO; bitpos: [31]; default: 0;
+ *  command3_done
+ */
+#define RTC_I2C_COMMAND3_DONE    (BIT(31))
+#define RTC_I2C_COMMAND3_DONE_M  (RTC_I2C_COMMAND3_DONE_V << RTC_I2C_COMMAND3_DONE_S)
+#define RTC_I2C_COMMAND3_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND3_DONE_S  31
+
+/** RTC_I2C_CMD4_REG register
+ *  i2c commond4 register
+ */
+#define RTC_I2C_CMD4_REG (DR_REG_RTC_BASE + 0x48)
+/** RTC_I2C_COMMAND4 : R/W; bitpos: [13:0]; default: 2305;
+ *  command4
+ */
+#define RTC_I2C_COMMAND4    0x00003FFFU
+#define RTC_I2C_COMMAND4_M  (RTC_I2C_COMMAND4_V << RTC_I2C_COMMAND4_S)
+#define RTC_I2C_COMMAND4_V  0x00003FFFU
+#define RTC_I2C_COMMAND4_S  0
+/** RTC_I2C_COMMAND4_DONE : RO; bitpos: [31]; default: 0;
+ *  command4_done
+ */
+#define RTC_I2C_COMMAND4_DONE    (BIT(31))
+#define RTC_I2C_COMMAND4_DONE_M  (RTC_I2C_COMMAND4_DONE_V << RTC_I2C_COMMAND4_DONE_S)
+#define RTC_I2C_COMMAND4_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND4_DONE_S  31
+
+/** RTC_I2C_CMD5_REG register
+ *  i2c commond5_register
+ */
+#define RTC_I2C_CMD5_REG (DR_REG_RTC_BASE + 0x4c)
+/** RTC_I2C_COMMAND5 : R/W; bitpos: [13:0]; default: 5889;
+ *  command5
+ */
+#define RTC_I2C_COMMAND5    0x00003FFFU
+#define RTC_I2C_COMMAND5_M  (RTC_I2C_COMMAND5_V << RTC_I2C_COMMAND5_S)
+#define RTC_I2C_COMMAND5_V  0x00003FFFU
+#define RTC_I2C_COMMAND5_S  0
+/** RTC_I2C_COMMAND5_DONE : RO; bitpos: [31]; default: 0;
+ *  command5_done
+ */
+#define RTC_I2C_COMMAND5_DONE    (BIT(31))
+#define RTC_I2C_COMMAND5_DONE_M  (RTC_I2C_COMMAND5_DONE_V << RTC_I2C_COMMAND5_DONE_S)
+#define RTC_I2C_COMMAND5_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND5_DONE_S  31
+
+/** RTC_I2C_CMD6_REG register
+ *  i2c commond6 register
+ */
+#define RTC_I2C_CMD6_REG (DR_REG_RTC_BASE + 0x50)
+/** RTC_I2C_COMMAND6 : R/W; bitpos: [13:0]; default: 6401;
+ *  command6
+ */
+#define RTC_I2C_COMMAND6    0x00003FFFU
+#define RTC_I2C_COMMAND6_M  (RTC_I2C_COMMAND6_V << RTC_I2C_COMMAND6_S)
+#define RTC_I2C_COMMAND6_V  0x00003FFFU
+#define RTC_I2C_COMMAND6_S  0
+/** RTC_I2C_COMMAND6_DONE : RO; bitpos: [31]; default: 0;
+ *  command6_done
+ */
+#define RTC_I2C_COMMAND6_DONE    (BIT(31))
+#define RTC_I2C_COMMAND6_DONE_M  (RTC_I2C_COMMAND6_DONE_V << RTC_I2C_COMMAND6_DONE_S)
+#define RTC_I2C_COMMAND6_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND6_DONE_S  31
+
+/** RTC_I2C_CMD7_REG register
+ *  i2c commond7 register
+ */
+#define RTC_I2C_CMD7_REG (DR_REG_RTC_BASE + 0x54)
+/** RTC_I2C_COMMAND7 : R/W; bitpos: [13:0]; default: 2308;
+ *  command7
+ */
+#define RTC_I2C_COMMAND7    0x00003FFFU
+#define RTC_I2C_COMMAND7_M  (RTC_I2C_COMMAND7_V << RTC_I2C_COMMAND7_S)
+#define RTC_I2C_COMMAND7_V  0x00003FFFU
+#define RTC_I2C_COMMAND7_S  0
+/** RTC_I2C_COMMAND7_DONE : RO; bitpos: [31]; default: 0;
+ *  command7_done
+ */
+#define RTC_I2C_COMMAND7_DONE    (BIT(31))
+#define RTC_I2C_COMMAND7_DONE_M  (RTC_I2C_COMMAND7_DONE_V << RTC_I2C_COMMAND7_DONE_S)
+#define RTC_I2C_COMMAND7_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND7_DONE_S  31
+
+/** RTC_I2C_CMD8_REG register
+ *  i2c commond8 register
+ */
+#define RTC_I2C_CMD8_REG (DR_REG_RTC_BASE + 0x58)
+/** RTC_I2C_COMMAND8 : R/W; bitpos: [13:0]; default: 6401;
+ *  command8
+ */
+#define RTC_I2C_COMMAND8    0x00003FFFU
+#define RTC_I2C_COMMAND8_M  (RTC_I2C_COMMAND8_V << RTC_I2C_COMMAND8_S)
+#define RTC_I2C_COMMAND8_V  0x00003FFFU
+#define RTC_I2C_COMMAND8_S  0
+/** RTC_I2C_COMMAND8_DONE : RO; bitpos: [31]; default: 0;
+ *  command8_done
+ */
+#define RTC_I2C_COMMAND8_DONE    (BIT(31))
+#define RTC_I2C_COMMAND8_DONE_M  (RTC_I2C_COMMAND8_DONE_V << RTC_I2C_COMMAND8_DONE_S)
+#define RTC_I2C_COMMAND8_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND8_DONE_S  31
+
+/** RTC_I2C_CMD9_REG register
+ *  i2c commond9 register
+ */
+#define RTC_I2C_CMD9_REG (DR_REG_RTC_BASE + 0x5c)
+/** RTC_I2C_COMMAND9 : R/W; bitpos: [13:0]; default: 2307;
+ *  command9
+ */
+#define RTC_I2C_COMMAND9    0x00003FFFU
+#define RTC_I2C_COMMAND9_M  (RTC_I2C_COMMAND9_V << RTC_I2C_COMMAND9_S)
+#define RTC_I2C_COMMAND9_V  0x00003FFFU
+#define RTC_I2C_COMMAND9_S  0
+/** RTC_I2C_COMMAND9_DONE : RO; bitpos: [31]; default: 0;
+ *  command9_done
+ */
+#define RTC_I2C_COMMAND9_DONE    (BIT(31))
+#define RTC_I2C_COMMAND9_DONE_M  (RTC_I2C_COMMAND9_DONE_V << RTC_I2C_COMMAND9_DONE_S)
+#define RTC_I2C_COMMAND9_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND9_DONE_S  31
+
+/** RTC_I2C_CMD10_REG register
+ *  i2c commond10 register
+ */
+#define RTC_I2C_CMD10_REG (DR_REG_RTC_BASE + 0x60)
+/** RTC_I2C_COMMAND10 : R/W; bitpos: [13:0]; default: 257;
+ *  command10
+ */
+#define RTC_I2C_COMMAND10    0x00003FFFU
+#define RTC_I2C_COMMAND10_M  (RTC_I2C_COMMAND10_V << RTC_I2C_COMMAND10_S)
+#define RTC_I2C_COMMAND10_V  0x00003FFFU
+#define RTC_I2C_COMMAND10_S  0
+/** RTC_I2C_COMMAND10_DONE : RO; bitpos: [31]; default: 0;
+ *  command10_done
+ */
+#define RTC_I2C_COMMAND10_DONE    (BIT(31))
+#define RTC_I2C_COMMAND10_DONE_M  (RTC_I2C_COMMAND10_DONE_V << RTC_I2C_COMMAND10_DONE_S)
+#define RTC_I2C_COMMAND10_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND10_DONE_S  31
+
+/** RTC_I2C_CMD11_REG register
+ *  i2c commond11 register
+ */
+#define RTC_I2C_CMD11_REG (DR_REG_RTC_BASE + 0x64)
+/** RTC_I2C_COMMAND11 : R/W; bitpos: [13:0]; default: 2305;
+ *  command11
+ */
+#define RTC_I2C_COMMAND11    0x00003FFFU
+#define RTC_I2C_COMMAND11_M  (RTC_I2C_COMMAND11_V << RTC_I2C_COMMAND11_S)
+#define RTC_I2C_COMMAND11_V  0x00003FFFU
+#define RTC_I2C_COMMAND11_S  0
+/** RTC_I2C_COMMAND11_DONE : RO; bitpos: [31]; default: 0;
+ *  command11_done
+ */
+#define RTC_I2C_COMMAND11_DONE    (BIT(31))
+#define RTC_I2C_COMMAND11_DONE_M  (RTC_I2C_COMMAND11_DONE_V << RTC_I2C_COMMAND11_DONE_S)
+#define RTC_I2C_COMMAND11_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND11_DONE_S  31
+
+/** RTC_I2C_CMD12_REG register
+ *  i2c commond12 register
+ */
+#define RTC_I2C_CMD12_REG (DR_REG_RTC_BASE + 0x68)
+/** RTC_I2C_COMMAND12 : R/W; bitpos: [13:0]; default: 5889;
+ *  command12
+ */
+#define RTC_I2C_COMMAND12    0x00003FFFU
+#define RTC_I2C_COMMAND12_M  (RTC_I2C_COMMAND12_V << RTC_I2C_COMMAND12_S)
+#define RTC_I2C_COMMAND12_V  0x00003FFFU
+#define RTC_I2C_COMMAND12_S  0
+/** RTC_I2C_COMMAND12_DONE : RO; bitpos: [31]; default: 0;
+ *  command12_done
+ */
+#define RTC_I2C_COMMAND12_DONE    (BIT(31))
+#define RTC_I2C_COMMAND12_DONE_M  (RTC_I2C_COMMAND12_DONE_V << RTC_I2C_COMMAND12_DONE_S)
+#define RTC_I2C_COMMAND12_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND12_DONE_S  31
+
+/** RTC_I2C_CMD13_REG register
+ *  i2c commond13 register
+ */
+#define RTC_I2C_CMD13_REG (DR_REG_RTC_BASE + 0x6c)
+/** RTC_I2C_COMMAND13 : R/W; bitpos: [13:0]; default: 6401;
+ *  command13
+ */
+#define RTC_I2C_COMMAND13    0x00003FFFU
+#define RTC_I2C_COMMAND13_M  (RTC_I2C_COMMAND13_V << RTC_I2C_COMMAND13_S)
+#define RTC_I2C_COMMAND13_V  0x00003FFFU
+#define RTC_I2C_COMMAND13_S  0
+/** RTC_I2C_COMMAND13_DONE : RO; bitpos: [31]; default: 0;
+ *  command13_done
+ */
+#define RTC_I2C_COMMAND13_DONE    (BIT(31))
+#define RTC_I2C_COMMAND13_DONE_M  (RTC_I2C_COMMAND13_DONE_V << RTC_I2C_COMMAND13_DONE_S)
+#define RTC_I2C_COMMAND13_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND13_DONE_S  31
+
+/** RTC_I2C_CMD14_REG register
+ *  i2c commond14 register
+ */
+#define RTC_I2C_CMD14_REG (DR_REG_RTC_BASE + 0x70)
+/** RTC_I2C_COMMAND14 : R/W; bitpos: [13:0]; default: 0;
+ *  command14
+ */
+#define RTC_I2C_COMMAND14    0x00003FFFU
+#define RTC_I2C_COMMAND14_M  (RTC_I2C_COMMAND14_V << RTC_I2C_COMMAND14_S)
+#define RTC_I2C_COMMAND14_V  0x00003FFFU
+#define RTC_I2C_COMMAND14_S  0
+/** RTC_I2C_COMMAND14_DONE : RO; bitpos: [31]; default: 0;
+ *  command14_done
+ */
+#define RTC_I2C_COMMAND14_DONE    (BIT(31))
+#define RTC_I2C_COMMAND14_DONE_M  (RTC_I2C_COMMAND14_DONE_V << RTC_I2C_COMMAND14_DONE_S)
+#define RTC_I2C_COMMAND14_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND14_DONE_S  31
+
+/** RTC_I2C_CMD15_REG register
+ *  i2c commond15 register
+ */
+#define RTC_I2C_CMD15_REG (DR_REG_RTC_BASE + 0x74)
+/** RTC_I2C_COMMAND15 : R/W; bitpos: [13:0]; default: 0;
+ *  command15
+ */
+#define RTC_I2C_COMMAND15    0x00003FFFU
+#define RTC_I2C_COMMAND15_M  (RTC_I2C_COMMAND15_V << RTC_I2C_COMMAND15_S)
+#define RTC_I2C_COMMAND15_V  0x00003FFFU
+#define RTC_I2C_COMMAND15_S  0
+/** RTC_I2C_COMMAND15_DONE : RO; bitpos: [31]; default: 0;
+ *  command15_done
+ */
+#define RTC_I2C_COMMAND15_DONE    (BIT(31))
+#define RTC_I2C_COMMAND15_DONE_M  (RTC_I2C_COMMAND15_DONE_V << RTC_I2C_COMMAND15_DONE_S)
+#define RTC_I2C_COMMAND15_DONE_V  0x00000001U
+#define RTC_I2C_COMMAND15_DONE_S  31
+
+/** RTC_I2C_DATE_REG register
+ *  version register
+ */
+#define RTC_I2C_DATE_REG (DR_REG_RTC_BASE + 0xfc)
+/** RTC_I2C_I2C_DATE : R/W; bitpos: [27:0]; default: 26235664;
+ *  version
+ */
+#define RTC_I2C_I2C_DATE    0x0FFFFFFFU
+#define RTC_I2C_I2C_DATE_M  (RTC_I2C_I2C_DATE_V << RTC_I2C_I2C_DATE_S)
+#define RTC_I2C_I2C_DATE_V  0x0FFFFFFFU
+#define RTC_I2C_I2C_DATE_S  0
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_i2c_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_i2c_struct.h
new file mode 100644
index 00000000000..8641683f165
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_i2c_struct.h
@@ -0,0 +1,780 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Group: Configure Registers */
+/** Type of i2c_scl_low register
+ *  configure low scl period
+ */
+typedef union {
+    struct {
+        /** i2c_scl_low_period_reg : R/W; bitpos: [19:0]; default: 256;
+         *  time period that scl =0
+         */
+        uint32_t i2c_scl_low_period_reg:20;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} rtc_i2c_scl_low_reg_t;
+
+/** Type of i2c_ctrl register
+ *  configure i2c ctrl
+ */
+typedef union {
+    struct {
+        /** i2c_sda_force_out : R/W; bitpos: [0]; default: 0;
+         *  1=push pull,0=open drain
+         */
+        uint32_t i2c_sda_force_out:1;
+        /** i2c_scl_force_out : R/W; bitpos: [1]; default: 0;
+         *  1=push pull,0=open drain
+         */
+        uint32_t i2c_scl_force_out:1;
+        /** i2c_ms_mode : R/W; bitpos: [2]; default: 0;
+         *  1=master,0=slave
+         */
+        uint32_t i2c_ms_mode:1;
+        /** i2c_trans_start : R/W; bitpos: [3]; default: 0;
+         *  force start
+         */
+        uint32_t i2c_trans_start:1;
+        /** i2c_tx_lsb_first : R/W; bitpos: [4]; default: 0;
+         *  transit lsb first
+         */
+        uint32_t i2c_tx_lsb_first:1;
+        /** i2c_rx_lsb_first : R/W; bitpos: [5]; default: 0;
+         *  receive lsb first
+         */
+        uint32_t i2c_rx_lsb_first:1;
+        uint32_t reserved_6:23;
+        /** i2c_i2c_ctrl_clk_gate_en : R/W; bitpos: [29]; default: 0;
+         *  configure i2c ctrl clk enable
+         */
+        uint32_t i2c_i2c_ctrl_clk_gate_en:1;
+        /** i2c_i2c_reset : R/W; bitpos: [30]; default: 0;
+         *  rtc i2c sw reset
+         */
+        uint32_t i2c_i2c_reset:1;
+        /** i2c_i2cclk_en : R/W; bitpos: [31]; default: 0;
+         *  rtc i2c reg clk gating
+         */
+        uint32_t i2c_i2cclk_en:1;
+    };
+    uint32_t val;
+} rtc_i2c_ctrl_reg_t;
+
+/** Type of i2c_to register
+ *  configure time out
+ */
+typedef union {
+    struct {
+        /** i2c_time_out_reg : R/W; bitpos: [19:0]; default: 65536;
+         *  time out threshold
+         */
+        uint32_t i2c_time_out_reg:20;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} rtc_i2c_to_reg_t;
+
+/** Type of i2c_slave_addr register
+ *  configure slave id
+ */
+typedef union {
+    struct {
+        /** i2c_slave_addr : R/W; bitpos: [14:0]; default: 0;
+         *  slave address
+         */
+        uint32_t i2c_slave_addr:15;
+        uint32_t reserved_15:16;
+        /** i2c_addr_10bit_en : R/W; bitpos: [31]; default: 0;
+         *  i2c 10bit mode enable
+         */
+        uint32_t i2c_addr_10bit_en:1;
+    };
+    uint32_t val;
+} rtc_i2c_slave_addr_reg_t;
+
+/** Type of i2c_scl_high register
+ *  configure high scl period
+ */
+typedef union {
+    struct {
+        /** i2c_scl_high_period_reg : R/W; bitpos: [19:0]; default: 256;
+         *  time period that scl = 1
+         */
+        uint32_t i2c_scl_high_period_reg:20;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} rtc_i2c_scl_high_reg_t;
+
+/** Type of i2c_sda_duty register
+ *  configure sda duty
+ */
+typedef union {
+    struct {
+        /** i2c_sda_duty_num : R/W; bitpos: [19:0]; default: 16;
+         *  time period for SDA to toggle after SCL goes low
+         */
+        uint32_t i2c_sda_duty_num:20;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} rtc_i2c_sda_duty_reg_t;
+
+/** Type of i2c_scl_start_period register
+ *  configure scl start period
+ */
+typedef union {
+    struct {
+        /** i2c_scl_start_period : R/W; bitpos: [19:0]; default: 8;
+         *  time period for SCL to toggle after I2C start is triggered
+         */
+        uint32_t i2c_scl_start_period:20;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} rtc_i2c_scl_start_period_reg_t;
+
+/** Type of i2c_scl_stop_period register
+ *  configure scl stop period
+ */
+typedef union {
+    struct {
+        /** i2c_scl_stop_period : R/W; bitpos: [19:0]; default: 8;
+         *  time period for SCL to stop after I2C end is triggered
+         */
+        uint32_t i2c_scl_stop_period:20;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} rtc_i2c_scl_stop_period_reg_t;
+
+/** Type of i2c_data register
+ *  get i2c data status
+ */
+typedef union {
+    struct {
+        /** i2c_i2c_rdata : RO; bitpos: [7:0]; default: 0;
+         *  data received
+         */
+        uint32_t i2c_i2c_rdata:8;
+        /** i2c_slave_tx_data : R/W; bitpos: [15:8]; default: 0;
+         *  data sent by slave
+         */
+        uint32_t i2c_slave_tx_data:8;
+        uint32_t reserved_16:15;
+        /** i2c_i2c_done : RO; bitpos: [31]; default: 0;
+         *  i2c done
+         */
+        uint32_t i2c_i2c_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_data_reg_t;
+
+/** Type of i2c_cmd0 register
+ *  i2c commond0 register
+ */
+typedef union {
+    struct {
+        /** i2c_command0 : R/W; bitpos: [13:0]; default: 2307;
+         *  command0
+         */
+        uint32_t i2c_command0:14;
+        uint32_t reserved_14:17;
+        /** i2c_command0_done : RO; bitpos: [31]; default: 0;
+         *  command0_done
+         */
+        uint32_t i2c_command0_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd0_reg_t;
+
+/** Type of i2c_cmd1 register
+ *  i2c commond1 register
+ */
+typedef union {
+    struct {
+        /** i2c_command1 : R/W; bitpos: [13:0]; default: 6401;
+         *  command1
+         */
+        uint32_t i2c_command1:14;
+        uint32_t reserved_14:17;
+        /** i2c_command1_done : RO; bitpos: [31]; default: 0;
+         *  command1_done
+         */
+        uint32_t i2c_command1_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd1_reg_t;
+
+/** Type of i2c_cmd2 register
+ *  i2c commond2 register
+ */
+typedef union {
+    struct {
+        /** i2c_command2 : R/W; bitpos: [13:0]; default: 2306;
+         *  command2
+         */
+        uint32_t i2c_command2:14;
+        uint32_t reserved_14:17;
+        /** i2c_command2_done : RO; bitpos: [31]; default: 0;
+         *  command2_done
+         */
+        uint32_t i2c_command2_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd2_reg_t;
+
+/** Type of i2c_cmd3 register
+ *  i2c commond3 register
+ */
+typedef union {
+    struct {
+        /** i2c_command3 : R/W; bitpos: [13:0]; default: 257;
+         *  command3
+         */
+        uint32_t i2c_command3:14;
+        uint32_t reserved_14:17;
+        /** i2c_command3_done : RO; bitpos: [31]; default: 0;
+         *  command3_done
+         */
+        uint32_t i2c_command3_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd3_reg_t;
+
+/** Type of i2c_cmd4 register
+ *  i2c commond4 register
+ */
+typedef union {
+    struct {
+        /** i2c_command4 : R/W; bitpos: [13:0]; default: 2305;
+         *  command4
+         */
+        uint32_t i2c_command4:14;
+        uint32_t reserved_14:17;
+        /** i2c_command4_done : RO; bitpos: [31]; default: 0;
+         *  command4_done
+         */
+        uint32_t i2c_command4_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd4_reg_t;
+
+/** Type of i2c_cmd5 register
+ *  i2c commond5_register
+ */
+typedef union {
+    struct {
+        /** i2c_command5 : R/W; bitpos: [13:0]; default: 5889;
+         *  command5
+         */
+        uint32_t i2c_command5:14;
+        uint32_t reserved_14:17;
+        /** i2c_command5_done : RO; bitpos: [31]; default: 0;
+         *  command5_done
+         */
+        uint32_t i2c_command5_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd5_reg_t;
+
+/** Type of i2c_cmd6 register
+ *  i2c commond6 register
+ */
+typedef union {
+    struct {
+        /** i2c_command6 : R/W; bitpos: [13:0]; default: 6401;
+         *  command6
+         */
+        uint32_t i2c_command6:14;
+        uint32_t reserved_14:17;
+        /** i2c_command6_done : RO; bitpos: [31]; default: 0;
+         *  command6_done
+         */
+        uint32_t i2c_command6_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd6_reg_t;
+
+/** Type of i2c_cmd7 register
+ *  i2c commond7 register
+ */
+typedef union {
+    struct {
+        /** i2c_command7 : R/W; bitpos: [13:0]; default: 2308;
+         *  command7
+         */
+        uint32_t i2c_command7:14;
+        uint32_t reserved_14:17;
+        /** i2c_command7_done : RO; bitpos: [31]; default: 0;
+         *  command7_done
+         */
+        uint32_t i2c_command7_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd7_reg_t;
+
+/** Type of i2c_cmd8 register
+ *  i2c commond8 register
+ */
+typedef union {
+    struct {
+        /** i2c_command8 : R/W; bitpos: [13:0]; default: 6401;
+         *  command8
+         */
+        uint32_t i2c_command8:14;
+        uint32_t reserved_14:17;
+        /** i2c_command8_done : RO; bitpos: [31]; default: 0;
+         *  command8_done
+         */
+        uint32_t i2c_command8_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd8_reg_t;
+
+/** Type of i2c_cmd9 register
+ *  i2c commond9 register
+ */
+typedef union {
+    struct {
+        /** i2c_command9 : R/W; bitpos: [13:0]; default: 2307;
+         *  command9
+         */
+        uint32_t i2c_command9:14;
+        uint32_t reserved_14:17;
+        /** i2c_command9_done : RO; bitpos: [31]; default: 0;
+         *  command9_done
+         */
+        uint32_t i2c_command9_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd9_reg_t;
+
+/** Type of i2c_cmd10 register
+ *  i2c commond10 register
+ */
+typedef union {
+    struct {
+        /** i2c_command10 : R/W; bitpos: [13:0]; default: 257;
+         *  command10
+         */
+        uint32_t i2c_command10:14;
+        uint32_t reserved_14:17;
+        /** i2c_command10_done : RO; bitpos: [31]; default: 0;
+         *  command10_done
+         */
+        uint32_t i2c_command10_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd10_reg_t;
+
+/** Type of i2c_cmd11 register
+ *  i2c commond11 register
+ */
+typedef union {
+    struct {
+        /** i2c_command11 : R/W; bitpos: [13:0]; default: 2305;
+         *  command11
+         */
+        uint32_t i2c_command11:14;
+        uint32_t reserved_14:17;
+        /** i2c_command11_done : RO; bitpos: [31]; default: 0;
+         *  command11_done
+         */
+        uint32_t i2c_command11_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd11_reg_t;
+
+/** Type of i2c_cmd12 register
+ *  i2c commond12 register
+ */
+typedef union {
+    struct {
+        /** i2c_command12 : R/W; bitpos: [13:0]; default: 5889;
+         *  command12
+         */
+        uint32_t i2c_command12:14;
+        uint32_t reserved_14:17;
+        /** i2c_command12_done : RO; bitpos: [31]; default: 0;
+         *  command12_done
+         */
+        uint32_t i2c_command12_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd12_reg_t;
+
+/** Type of i2c_cmd13 register
+ *  i2c commond13 register
+ */
+typedef union {
+    struct {
+        /** i2c_command13 : R/W; bitpos: [13:0]; default: 6401;
+         *  command13
+         */
+        uint32_t i2c_command13:14;
+        uint32_t reserved_14:17;
+        /** i2c_command13_done : RO; bitpos: [31]; default: 0;
+         *  command13_done
+         */
+        uint32_t i2c_command13_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd13_reg_t;
+
+/** Type of i2c_cmd14 register
+ *  i2c commond14 register
+ */
+typedef union {
+    struct {
+        /** i2c_command14 : R/W; bitpos: [13:0]; default: 0;
+         *  command14
+         */
+        uint32_t i2c_command14:14;
+        uint32_t reserved_14:17;
+        /** i2c_command14_done : RO; bitpos: [31]; default: 0;
+         *  command14_done
+         */
+        uint32_t i2c_command14_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd14_reg_t;
+
+/** Type of i2c_cmd15 register
+ *  i2c commond15 register
+ */
+typedef union {
+    struct {
+        /** i2c_command15 : R/W; bitpos: [13:0]; default: 0;
+         *  command15
+         */
+        uint32_t i2c_command15:14;
+        uint32_t reserved_14:17;
+        /** i2c_command15_done : RO; bitpos: [31]; default: 0;
+         *  command15_done
+         */
+        uint32_t i2c_command15_done:1;
+    };
+    uint32_t val;
+} rtc_i2c_cmd15_reg_t;
+
+
+/** Group: status register */
+/** Type of i2c_status register
+ *  get i2c status
+ */
+typedef union {
+    struct {
+        /** i2c_ack_rec : RO; bitpos: [0]; default: 0;
+         *  ack response
+         */
+        uint32_t i2c_ack_rec:1;
+        /** i2c_slave_rw : RO; bitpos: [1]; default: 0;
+         *  slave read or write
+         */
+        uint32_t i2c_slave_rw:1;
+        /** i2c_arb_lost : RO; bitpos: [2]; default: 0;
+         *  arbitration is lost
+         */
+        uint32_t i2c_arb_lost:1;
+        /** i2c_bus_busy : RO; bitpos: [3]; default: 0;
+         *  bus is busy
+         */
+        uint32_t i2c_bus_busy:1;
+        /** i2c_slave_addressed : RO; bitpos: [4]; default: 0;
+         *  slave reg sub address
+         */
+        uint32_t i2c_slave_addressed:1;
+        /** i2c_byte_trans : RO; bitpos: [5]; default: 0;
+         *  One byte transit done
+         */
+        uint32_t i2c_byte_trans:1;
+        /** i2c_op_cnt : RO; bitpos: [7:6]; default: 0;
+         *  which operation is working
+         */
+        uint32_t i2c_op_cnt:2;
+        uint32_t reserved_8:8;
+        /** i2c_shift_reg : RO; bitpos: [23:16]; default: 0;
+         *  shifter content
+         */
+        uint32_t i2c_shift_reg:8;
+        /** i2c_scl_main_state_last : RO; bitpos: [26:24]; default: 0;
+         *  i2c last main status
+         */
+        uint32_t i2c_scl_main_state_last:3;
+        uint32_t reserved_27:1;
+        /** i2c_scl_state_last : RO; bitpos: [30:28]; default: 0;
+         *  scl last status
+         */
+        uint32_t i2c_scl_state_last:3;
+        uint32_t reserved_31:1;
+    };
+    uint32_t val;
+} rtc_i2c_status_reg_t;
+
+
+/** Group: interrupt Register */
+/** Type of i2c_int_clr register
+ *  interrupt clear register
+ */
+typedef union {
+    struct {
+        /** i2c_slave_tran_comp_int_clr : WO; bitpos: [0]; default: 0;
+         *  clear slave transit complete interrupt
+         */
+        uint32_t i2c_slave_tran_comp_int_clr:1;
+        /** i2c_arbitration_lost_int_clr : WO; bitpos: [1]; default: 0;
+         *  clear arbitration lost interrupt
+         */
+        uint32_t i2c_arbitration_lost_int_clr:1;
+        /** i2c_master_tran_comp_int_clr : WO; bitpos: [2]; default: 0;
+         *  clear master transit complete interrupt
+         */
+        uint32_t i2c_master_tran_comp_int_clr:1;
+        /** i2c_trans_complete_int_clr : WO; bitpos: [3]; default: 0;
+         *  clear transit complete interrupt
+         */
+        uint32_t i2c_trans_complete_int_clr:1;
+        /** i2c_time_out_int_clr : WO; bitpos: [4]; default: 0;
+         *  clear time out interrupt
+         */
+        uint32_t i2c_time_out_int_clr:1;
+        /** i2c_ack_err_int_clr : WO; bitpos: [5]; default: 0;
+         *  clear ack error interrupt
+         */
+        uint32_t i2c_ack_err_int_clr:1;
+        /** i2c_rx_data_int_clr : WO; bitpos: [6]; default: 0;
+         *  clear receive data interrupt
+         */
+        uint32_t i2c_rx_data_int_clr:1;
+        /** i2c_tx_data_int_clr : WO; bitpos: [7]; default: 0;
+         *  clear transit load data complete interrupt
+         */
+        uint32_t i2c_tx_data_int_clr:1;
+        /** i2c_detect_start_int_clr : WO; bitpos: [8]; default: 0;
+         *  clear detect start interrupt
+         */
+        uint32_t i2c_detect_start_int_clr:1;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} rtc_i2c_int_clr_reg_t;
+
+/** Type of i2c_int_raw register
+ *  interrupt raw register
+ */
+typedef union {
+    struct {
+        /** i2c_slave_tran_comp_int_raw : RO; bitpos: [0]; default: 0;
+         *  slave transit complete interrupt raw
+         */
+        uint32_t i2c_slave_tran_comp_int_raw:1;
+        /** i2c_arbitration_lost_int_raw : RO; bitpos: [1]; default: 0;
+         *  arbitration lost interrupt raw
+         */
+        uint32_t i2c_arbitration_lost_int_raw:1;
+        /** i2c_master_tran_comp_int_raw : RO; bitpos: [2]; default: 0;
+         *  master transit complete interrupt raw
+         */
+        uint32_t i2c_master_tran_comp_int_raw:1;
+        /** i2c_trans_complete_int_raw : RO; bitpos: [3]; default: 0;
+         *  transit complete interrupt raw
+         */
+        uint32_t i2c_trans_complete_int_raw:1;
+        /** i2c_time_out_int_raw : RO; bitpos: [4]; default: 0;
+         *  time out interrupt raw
+         */
+        uint32_t i2c_time_out_int_raw:1;
+        /** i2c_ack_err_int_raw : RO; bitpos: [5]; default: 0;
+         *  ack error interrupt raw
+         */
+        uint32_t i2c_ack_err_int_raw:1;
+        /** i2c_rx_data_int_raw : RO; bitpos: [6]; default: 0;
+         *  receive data interrupt raw
+         */
+        uint32_t i2c_rx_data_int_raw:1;
+        /** i2c_tx_data_int_raw : RO; bitpos: [7]; default: 0;
+         *  transit data interrupt raw
+         */
+        uint32_t i2c_tx_data_int_raw:1;
+        /** i2c_detect_start_int_raw : RO; bitpos: [8]; default: 0;
+         *  detect start interrupt raw
+         */
+        uint32_t i2c_detect_start_int_raw:1;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} rtc_i2c_int_raw_reg_t;
+
+/** Type of i2c_int_st register
+ *  interrupt state register
+ */
+typedef union {
+    struct {
+        /** i2c_slave_tran_comp_int_st : RO; bitpos: [0]; default: 0;
+         *  slave transit complete interrupt state
+         */
+        uint32_t i2c_slave_tran_comp_int_st:1;
+        /** i2c_arbitration_lost_int_st : RO; bitpos: [1]; default: 0;
+         *  arbitration lost interrupt state
+         */
+        uint32_t i2c_arbitration_lost_int_st:1;
+        /** i2c_master_tran_comp_int_st : RO; bitpos: [2]; default: 0;
+         *  master transit complete interrupt state
+         */
+        uint32_t i2c_master_tran_comp_int_st:1;
+        /** i2c_trans_complete_int_st : RO; bitpos: [3]; default: 0;
+         *  transit complete interrupt state
+         */
+        uint32_t i2c_trans_complete_int_st:1;
+        /** i2c_time_out_int_st : RO; bitpos: [4]; default: 0;
+         *  time out interrupt state
+         */
+        uint32_t i2c_time_out_int_st:1;
+        /** i2c_ack_err_int_st : RO; bitpos: [5]; default: 0;
+         *  ack error interrupt state
+         */
+        uint32_t i2c_ack_err_int_st:1;
+        /** i2c_rx_data_int_st : RO; bitpos: [6]; default: 0;
+         *  receive data interrupt state
+         */
+        uint32_t i2c_rx_data_int_st:1;
+        /** i2c_tx_data_int_st : RO; bitpos: [7]; default: 0;
+         *  transit data interrupt state
+         */
+        uint32_t i2c_tx_data_int_st:1;
+        /** i2c_detect_start_int_st : RO; bitpos: [8]; default: 0;
+         *  detect start interrupt state
+         */
+        uint32_t i2c_detect_start_int_st:1;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} rtc_i2c_int_st_reg_t;
+
+/** Type of i2c_int_ena register
+ *  interrupt enable register
+ */
+typedef union {
+    struct {
+        /** i2c_slave_tran_comp_int_ena : R/W; bitpos: [0]; default: 0;
+         *  enable slave transit complete interrupt
+         */
+        uint32_t i2c_slave_tran_comp_int_ena:1;
+        /** i2c_arbitration_lost_int_ena : R/W; bitpos: [1]; default: 0;
+         *  enable arbitration lost interrupt
+         */
+        uint32_t i2c_arbitration_lost_int_ena:1;
+        /** i2c_master_tran_comp_int_ena : R/W; bitpos: [2]; default: 0;
+         *  enable master transit complete interrupt
+         */
+        uint32_t i2c_master_tran_comp_int_ena:1;
+        /** i2c_trans_complete_int_ena : R/W; bitpos: [3]; default: 0;
+         *  enable transit complete interrupt
+         */
+        uint32_t i2c_trans_complete_int_ena:1;
+        /** i2c_time_out_int_ena : R/W; bitpos: [4]; default: 0;
+         *  enable time out interrupt
+         */
+        uint32_t i2c_time_out_int_ena:1;
+        /** i2c_ack_err_int_ena : R/W; bitpos: [5]; default: 0;
+         *  enable eack error interrupt
+         */
+        uint32_t i2c_ack_err_int_ena:1;
+        /** i2c_rx_data_int_ena : R/W; bitpos: [6]; default: 0;
+         *  enable receive data interrupt
+         */
+        uint32_t i2c_rx_data_int_ena:1;
+        /** i2c_tx_data_int_ena : R/W; bitpos: [7]; default: 0;
+         *  enable transit data interrupt
+         */
+        uint32_t i2c_tx_data_int_ena:1;
+        /** i2c_detect_start_int_ena : R/W; bitpos: [8]; default: 0;
+         *  enable detect start interrupt
+         */
+        uint32_t i2c_detect_start_int_ena:1;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} rtc_i2c_int_ena_reg_t;
+
+
+/** Group: version Registers */
+/** Type of i2c_date register
+ *  version register
+ */
+typedef union {
+    struct {
+        /** i2c_i2c_date : R/W; bitpos: [27:0]; default: 26235664;
+         *  version
+         */
+        uint32_t i2c_i2c_date:28;
+        uint32_t reserved_28:4;
+    };
+    uint32_t val;
+} rtc_i2c_date_reg_t;
+
+
+typedef struct {
+    volatile rtc_i2c_scl_low_reg_t i2c_scl_low;
+    volatile rtc_i2c_ctrl_reg_t i2c_ctrl;
+    volatile rtc_i2c_status_reg_t i2c_status;
+    volatile rtc_i2c_to_reg_t i2c_to;
+    volatile rtc_i2c_slave_addr_reg_t i2c_slave_addr;
+    volatile rtc_i2c_scl_high_reg_t i2c_scl_high;
+    volatile rtc_i2c_sda_duty_reg_t i2c_sda_duty;
+    volatile rtc_i2c_scl_start_period_reg_t i2c_scl_start_period;
+    volatile rtc_i2c_scl_stop_period_reg_t i2c_scl_stop_period;
+    volatile rtc_i2c_int_clr_reg_t i2c_int_clr;
+    volatile rtc_i2c_int_raw_reg_t i2c_int_raw;
+    volatile rtc_i2c_int_st_reg_t i2c_int_st;
+    volatile rtc_i2c_int_ena_reg_t i2c_int_ena;
+    volatile rtc_i2c_data_reg_t i2c_data;
+    volatile rtc_i2c_cmd0_reg_t i2c_cmd0;
+    volatile rtc_i2c_cmd1_reg_t i2c_cmd1;
+    volatile rtc_i2c_cmd2_reg_t i2c_cmd2;
+    volatile rtc_i2c_cmd3_reg_t i2c_cmd3;
+    volatile rtc_i2c_cmd4_reg_t i2c_cmd4;
+    volatile rtc_i2c_cmd5_reg_t i2c_cmd5;
+    volatile rtc_i2c_cmd6_reg_t i2c_cmd6;
+    volatile rtc_i2c_cmd7_reg_t i2c_cmd7;
+    volatile rtc_i2c_cmd8_reg_t i2c_cmd8;
+    volatile rtc_i2c_cmd9_reg_t i2c_cmd9;
+    volatile rtc_i2c_cmd10_reg_t i2c_cmd10;
+    volatile rtc_i2c_cmd11_reg_t i2c_cmd11;
+    volatile rtc_i2c_cmd12_reg_t i2c_cmd12;
+    volatile rtc_i2c_cmd13_reg_t i2c_cmd13;
+    volatile rtc_i2c_cmd14_reg_t i2c_cmd14;
+    volatile rtc_i2c_cmd15_reg_t i2c_cmd15;
+    uint32_t reserved_078[33];
+    volatile rtc_i2c_date_reg_t i2c_date;
+} rtc_dev_t;
+
+
+#ifndef __cplusplus
+_Static_assert(sizeof(rtc_dev_t) == 0x100, "Invalid size of rtc_dev_t structure");
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_caps.h
new file mode 100644
index 00000000000..2127adac62a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_caps.h
@@ -0,0 +1,21 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define SOC_RTCIO_PIN_COUNT   22
+#define RTCIO_LL_PIN_FUNC     0
+#define SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 1
+#define SOC_RTCIO_HOLD_SUPPORTED 1
+#define SOC_RTCIO_WAKE_SUPPORTED 1
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_channel.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_channel.h
new file mode 100644
index 00000000000..3190348feda
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_channel.h
@@ -0,0 +1,84 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define RTC_GPIO_NUMBER             22
+
+//RTC GPIO channels
+#define RTCIO_GPIO0_CHANNEL         0   //RTCIO_CHANNEL_0
+#define RTCIO_CHANNEL_0_GPIO_NUM    0
+
+#define RTCIO_GPIO1_CHANNEL         1   //RTCIO_CHANNEL_1
+#define RTCIO_CHANNEL_1_GPIO_NUM    1
+
+#define RTCIO_GPIO2_CHANNEL         2   //RTCIO_CHANNEL_2
+#define RTCIO_CHANNEL_2_GPIO_NUM    2
+
+#define RTCIO_GPIO3_CHANNEL         3   //RTCIO_CHANNEL_3
+#define RTCIO_CHANNEL_3_GPIO_NUM    3
+
+#define RTCIO_GPIO4_CHANNEL         4   //RTCIO_CHANNEL_4
+#define RTCIO_CHANNEL_4_GPIO_NUM    4
+
+#define RTCIO_GPIO5_CHANNEL         5   //RTCIO_CHANNEL_5
+#define RTCIO_CHANNEL_5_GPIO_NUM    5
+
+#define RTCIO_GPIO6_CHANNEL         6   //RTCIO_CHANNEL_6
+#define RTCIO_CHANNEL_6_GPIO_NUM    6
+
+#define RTCIO_GPIO7_CHANNEL         7   //RTCIO_CHANNEL_7
+#define RTCIO_CHANNEL_7_GPIO_NUM    7
+
+#define RTCIO_GPIO8_CHANNEL         8   //RTCIO_CHANNEL_8
+#define RTCIO_CHANNEL_8_GPIO_NUM    8
+
+#define RTCIO_GPIO9_CHANNEL         9   //RTCIO_CHANNEL_9
+#define RTCIO_CHANNEL_9_GPIO_NUM    9
+
+#define RTCIO_GPIO10_CHANNEL        10   //RTCIO_CHANNEL_10
+#define RTCIO_CHANNEL_10_GPIO_NUM   10
+
+#define RTCIO_GPIO11_CHANNEL        11   //RTCIO_CHANNEL_11
+#define RTCIO_CHANNEL_11_GPIO_NUM   11
+
+#define RTCIO_GPIO12_CHANNEL        12   //RTCIO_CHANNEL_12
+#define RTCIO_CHANNEL_12_GPIO_NUM   12
+
+#define RTCIO_GPIO13_CHANNEL        13   //RTCIO_CHANNEL_13
+#define RTCIO_CHANNEL_13_GPIO_NUM   13
+
+#define RTCIO_GPIO14_CHANNEL        14   //RTCIO_CHANNEL_14
+#define RTCIO_CHANNEL_14_GPIO_NUM   14
+
+#define RTCIO_GPIO15_CHANNEL        15   //RTCIO_CHANNEL_15
+#define RTCIO_CHANNEL_15_GPIO_NUM   15
+
+#define RTCIO_GPIO16_CHANNEL        16   //RTCIO_CHANNEL_16
+#define RTCIO_CHANNEL_16_GPIO_NUM   16
+
+#define RTCIO_GPIO17_CHANNEL        17   //RTCIO_CHANNEL_17
+#define RTCIO_CHANNEL_17_GPIO_NUM   17
+
+#define RTCIO_GPIO18_CHANNEL        18   //RTCIO_CHANNEL_18
+#define RTCIO_CHANNEL_18_GPIO_NUM   18
+
+#define RTCIO_GPIO19_CHANNEL        19   //RTCIO_CHANNEL_19
+#define RTCIO_CHANNEL_19_GPIO_NUM   19
+
+#define RTCIO_GPIO20_CHANNEL        20   //RTCIO_CHANNEL_20
+#define RTCIO_CHANNEL_20_GPIO_NUM   20
+
+#define RTCIO_GPIO21_CHANNEL        21   //RTCIO_CHANNEL_21
+#define RTCIO_CHANNEL_21_GPIO_NUM   21
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_reg.h
new file mode 100644
index 00000000000..a324329117a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_reg.h
@@ -0,0 +1,2230 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_RTC_IO_REG_H_
+#define _SOC_RTC_IO_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RTC_GPIO_OUT_REG          (DR_REG_RTCIO_BASE + 0x0)
+/* RTC_GPIO_OUT_DATA : R/W ;bitpos:[31:10] ;default: 0 ; */
+/*description: RTC GPIO 0 ~ 21 output data.*/
+#define RTC_GPIO_OUT_DATA    0x003FFFFF
+#define RTC_GPIO_OUT_DATA_M  ((RTC_GPIO_OUT_DATA_V)<<(RTC_GPIO_OUT_DATA_S))
+#define RTC_GPIO_OUT_DATA_V  0x3FFFFF
+#define RTC_GPIO_OUT_DATA_S  10
+
+#define RTC_GPIO_OUT_W1TS_REG          (DR_REG_RTCIO_BASE + 0x4)
+/* RTC_GPIO_OUT_DATA_W1TS : WO ;bitpos:[31:10] ;default: 0 ; */
+/*description: RTC GPIO 0 ~ 21 output data write 1 to set.*/
+#define RTC_GPIO_OUT_DATA_W1TS    0x003FFFFF
+#define RTC_GPIO_OUT_DATA_W1TS_M  ((RTC_GPIO_OUT_DATA_W1TS_V)<<(RTC_GPIO_OUT_DATA_W1TS_S))
+#define RTC_GPIO_OUT_DATA_W1TS_V  0x3FFFFF
+#define RTC_GPIO_OUT_DATA_W1TS_S  10
+
+#define RTC_GPIO_OUT_W1TC_REG          (DR_REG_RTCIO_BASE + 0x8)
+/* RTC_GPIO_OUT_DATA_W1TC : WO ;bitpos:[31:10] ;default: 0 ; */
+/*description: RTC GPIO 0 ~ 21 output data write 1 to clear.*/
+#define RTC_GPIO_OUT_DATA_W1TC    0x003FFFFF
+#define RTC_GPIO_OUT_DATA_W1TC_M  ((RTC_GPIO_OUT_DATA_W1TC_V)<<(RTC_GPIO_OUT_DATA_W1TC_S))
+#define RTC_GPIO_OUT_DATA_W1TC_V  0x3FFFFF
+#define RTC_GPIO_OUT_DATA_W1TC_S  10
+
+#define RTC_GPIO_ENABLE_REG          (DR_REG_RTCIO_BASE + 0xC)
+/* RTC_GPIO_ENABLE : R/W ;bitpos:[31:10] ;default: 0 ; */
+/*description: RTC GPIO 0 ~ 21 enable.*/
+#define RTC_GPIO_ENABLE    0x003FFFFF
+#define RTC_GPIO_ENABLE_M  ((RTC_GPIO_ENABLE_V)<<(RTC_GPIO_ENABLE_S))
+#define RTC_GPIO_ENABLE_V  0x3FFFFF
+#define RTC_GPIO_ENABLE_S  10
+
+#define RTC_GPIO_ENABLE_W1TS_REG          (DR_REG_RTCIO_BASE + 0x10)
+/* RTC_GPIO_ENABLE_W1TS : WO ;bitpos:[31:10] ;default: 0 ; */
+/*description: RTC GPIO 0 ~ 21 enable write 1 to set.*/
+#define RTC_GPIO_ENABLE_W1TS    0x003FFFFF
+#define RTC_GPIO_ENABLE_W1TS_M  ((RTC_GPIO_ENABLE_W1TS_V)<<(RTC_GPIO_ENABLE_W1TS_S))
+#define RTC_GPIO_ENABLE_W1TS_V  0x3FFFFF
+#define RTC_GPIO_ENABLE_W1TS_S  10
+
+#define RTC_GPIO_ENABLE_W1TC_REG          (DR_REG_RTCIO_BASE + 0x14)
+/* RTC_GPIO_ENABLE_W1TC : WO ;bitpos:[31:10] ;default: 0 ; */
+/*description: RTC GPIO 0 ~ 21 enable write 1 to clear.*/
+#define RTC_GPIO_ENABLE_W1TC    0x003FFFFF
+#define RTC_GPIO_ENABLE_W1TC_M  ((RTC_GPIO_ENABLE_W1TC_V)<<(RTC_GPIO_ENABLE_W1TC_S))
+#define RTC_GPIO_ENABLE_W1TC_V  0x3FFFFF
+#define RTC_GPIO_ENABLE_W1TC_S  10
+
+#define RTC_GPIO_STATUS_REG          (DR_REG_RTCIO_BASE + 0x18)
+/* RTC_GPIO_STATUS_INT : R/W ;bitpos:[31:10] ;default: 0 ; */
+/*description: RTC GPIO 0 ~ 21 interrupt status.*/
+#define RTC_GPIO_STATUS_INT    0x003FFFFF
+#define RTC_GPIO_STATUS_INT_M  ((RTC_GPIO_STATUS_INT_V)<<(RTC_GPIO_STATUS_INT_S))
+#define RTC_GPIO_STATUS_INT_V  0x3FFFFF
+#define RTC_GPIO_STATUS_INT_S  10
+
+#define RTC_GPIO_STATUS_W1TS_REG          (DR_REG_RTCIO_BASE + 0x1C)
+/* RTC_GPIO_STATUS_INT_W1TS : WO ;bitpos:[31:10] ;default: 0 ; */
+/*description: RTC GPIO 0 ~ 21 interrupt status write 1 to set.*/
+#define RTC_GPIO_STATUS_INT_W1TS    0x003FFFFF
+#define RTC_GPIO_STATUS_INT_W1TS_M  ((RTC_GPIO_STATUS_INT_W1TS_V)<<(RTC_GPIO_STATUS_INT_W1TS_S))
+#define RTC_GPIO_STATUS_INT_W1TS_V  0x3FFFFF
+#define RTC_GPIO_STATUS_INT_W1TS_S  10
+
+#define RTC_GPIO_STATUS_W1TC_REG          (DR_REG_RTCIO_BASE + 0x20)
+/* RTC_GPIO_STATUS_INT_W1TC : WO ;bitpos:[31:10] ;default: 0 ; */
+/*description: RTC GPIO 0 ~ 21 interrupt status write 1 to clear.*/
+#define RTC_GPIO_STATUS_INT_W1TC    0x003FFFFF
+#define RTC_GPIO_STATUS_INT_W1TC_M  ((RTC_GPIO_STATUS_INT_W1TC_V)<<(RTC_GPIO_STATUS_INT_W1TC_S))
+#define RTC_GPIO_STATUS_INT_W1TC_V  0x3FFFFF
+#define RTC_GPIO_STATUS_INT_W1TC_S  10
+
+#define RTC_GPIO_IN_REG          (DR_REG_RTCIO_BASE + 0x24)
+/* RTC_GPIO_IN_NEXT : RO ;bitpos:[31:10] ;default:  ; */
+/*description: RTC GPIO input data.*/
+#define RTC_GPIO_IN_NEXT    0x003FFFFF
+#define RTC_GPIO_IN_NEXT_M  ((RTC_GPIO_IN_NEXT_V)<<(RTC_GPIO_IN_NEXT_S))
+#define RTC_GPIO_IN_NEXT_V  0x3FFFFF
+#define RTC_GPIO_IN_NEXT_S  10
+
+#define RTC_GPIO_PIN0_REG          (DR_REG_RTCIO_BASE + 0x28)
+/* RTC_GPIO_PIN0_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN0_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN0_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN0_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN0_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN0_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN0_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN0_INT_TYPE_M  ((RTC_GPIO_PIN0_INT_TYPE_V)<<(RTC_GPIO_PIN0_INT_TYPE_S))
+#define RTC_GPIO_PIN0_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN0_INT_TYPE_S  7
+/* RTC_GPIO_PIN0_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN0_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN0_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN0_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN0_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN1_REG          (DR_REG_RTCIO_BASE + 0x2C)
+/* RTC_GPIO_PIN1_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN1_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN1_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN1_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN1_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN1_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN1_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN1_INT_TYPE_M  ((RTC_GPIO_PIN1_INT_TYPE_V)<<(RTC_GPIO_PIN1_INT_TYPE_S))
+#define RTC_GPIO_PIN1_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN1_INT_TYPE_S  7
+/* RTC_GPIO_PIN1_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN1_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN1_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN1_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN1_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN2_REG          (DR_REG_RTCIO_BASE + 0x30)
+/* RTC_GPIO_PIN2_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN2_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN2_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN2_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN2_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN2_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN2_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN2_INT_TYPE_M  ((RTC_GPIO_PIN2_INT_TYPE_V)<<(RTC_GPIO_PIN2_INT_TYPE_S))
+#define RTC_GPIO_PIN2_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN2_INT_TYPE_S  7
+/* RTC_GPIO_PIN2_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN2_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN2_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN2_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN2_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN3_REG          (DR_REG_RTCIO_BASE + 0x34)
+/* RTC_GPIO_PIN3_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN3_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN3_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN3_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN3_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN3_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN3_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN3_INT_TYPE_M  ((RTC_GPIO_PIN3_INT_TYPE_V)<<(RTC_GPIO_PIN3_INT_TYPE_S))
+#define RTC_GPIO_PIN3_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN3_INT_TYPE_S  7
+/* RTC_GPIO_PIN3_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN3_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN3_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN3_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN3_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN4_REG          (DR_REG_RTCIO_BASE + 0x38)
+/* RTC_GPIO_PIN4_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN4_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN4_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN4_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN4_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN4_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN4_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN4_INT_TYPE_M  ((RTC_GPIO_PIN4_INT_TYPE_V)<<(RTC_GPIO_PIN4_INT_TYPE_S))
+#define RTC_GPIO_PIN4_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN4_INT_TYPE_S  7
+/* RTC_GPIO_PIN4_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN4_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN4_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN4_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN4_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN5_REG          (DR_REG_RTCIO_BASE + 0x3C)
+/* RTC_GPIO_PIN5_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN5_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN5_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN5_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN5_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN5_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN5_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN5_INT_TYPE_M  ((RTC_GPIO_PIN5_INT_TYPE_V)<<(RTC_GPIO_PIN5_INT_TYPE_S))
+#define RTC_GPIO_PIN5_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN5_INT_TYPE_S  7
+/* RTC_GPIO_PIN5_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN5_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN5_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN5_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN5_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN6_REG          (DR_REG_RTCIO_BASE + 0x40)
+/* RTC_GPIO_PIN6_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN6_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN6_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN6_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN6_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN6_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN6_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN6_INT_TYPE_M  ((RTC_GPIO_PIN6_INT_TYPE_V)<<(RTC_GPIO_PIN6_INT_TYPE_S))
+#define RTC_GPIO_PIN6_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN6_INT_TYPE_S  7
+/* RTC_GPIO_PIN6_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN6_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN6_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN6_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN6_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN7_REG          (DR_REG_RTCIO_BASE + 0x44)
+/* RTC_GPIO_PIN7_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN7_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN7_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN7_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN7_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN7_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN7_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN7_INT_TYPE_M  ((RTC_GPIO_PIN7_INT_TYPE_V)<<(RTC_GPIO_PIN7_INT_TYPE_S))
+#define RTC_GPIO_PIN7_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN7_INT_TYPE_S  7
+/* RTC_GPIO_PIN7_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN7_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN7_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN7_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN7_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN8_REG          (DR_REG_RTCIO_BASE + 0x48)
+/* RTC_GPIO_PIN8_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN8_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN8_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN8_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN8_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN8_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN8_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN8_INT_TYPE_M  ((RTC_GPIO_PIN8_INT_TYPE_V)<<(RTC_GPIO_PIN8_INT_TYPE_S))
+#define RTC_GPIO_PIN8_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN8_INT_TYPE_S  7
+/* RTC_GPIO_PIN8_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN8_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN8_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN8_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN8_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN9_REG          (DR_REG_RTCIO_BASE + 0x4C)
+/* RTC_GPIO_PIN9_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN9_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN9_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN9_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN9_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN9_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN9_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN9_INT_TYPE_M  ((RTC_GPIO_PIN9_INT_TYPE_V)<<(RTC_GPIO_PIN9_INT_TYPE_S))
+#define RTC_GPIO_PIN9_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN9_INT_TYPE_S  7
+/* RTC_GPIO_PIN9_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN9_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN9_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN9_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN9_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN10_REG          (DR_REG_RTCIO_BASE + 0x50)
+/* RTC_GPIO_PIN10_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN10_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN10_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN10_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN10_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN10_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN10_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN10_INT_TYPE_M  ((RTC_GPIO_PIN10_INT_TYPE_V)<<(RTC_GPIO_PIN10_INT_TYPE_S))
+#define RTC_GPIO_PIN10_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN10_INT_TYPE_S  7
+/* RTC_GPIO_PIN10_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN10_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN10_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN10_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN10_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN11_REG          (DR_REG_RTCIO_BASE + 0x54)
+/* RTC_GPIO_PIN11_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN11_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN11_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN11_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN11_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN11_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN11_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN11_INT_TYPE_M  ((RTC_GPIO_PIN11_INT_TYPE_V)<<(RTC_GPIO_PIN11_INT_TYPE_S))
+#define RTC_GPIO_PIN11_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN11_INT_TYPE_S  7
+/* RTC_GPIO_PIN11_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN11_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN11_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN11_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN11_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN12_REG          (DR_REG_RTCIO_BASE + 0x58)
+/* RTC_GPIO_PIN12_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN12_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN12_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN12_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN12_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN12_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN12_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN12_INT_TYPE_M  ((RTC_GPIO_PIN12_INT_TYPE_V)<<(RTC_GPIO_PIN12_INT_TYPE_S))
+#define RTC_GPIO_PIN12_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN12_INT_TYPE_S  7
+/* RTC_GPIO_PIN12_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN12_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN12_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN12_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN12_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN13_REG          (DR_REG_RTCIO_BASE + 0x5C)
+/* RTC_GPIO_PIN13_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN13_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN13_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN13_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN13_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN13_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN13_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN13_INT_TYPE_M  ((RTC_GPIO_PIN13_INT_TYPE_V)<<(RTC_GPIO_PIN13_INT_TYPE_S))
+#define RTC_GPIO_PIN13_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN13_INT_TYPE_S  7
+/* RTC_GPIO_PIN13_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN13_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN13_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN13_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN13_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN14_REG          (DR_REG_RTCIO_BASE + 0x60)
+/* RTC_GPIO_PIN14_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN14_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN14_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN14_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN14_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN14_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN14_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN14_INT_TYPE_M  ((RTC_GPIO_PIN14_INT_TYPE_V)<<(RTC_GPIO_PIN14_INT_TYPE_S))
+#define RTC_GPIO_PIN14_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN14_INT_TYPE_S  7
+/* RTC_GPIO_PIN14_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN14_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN14_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN14_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN14_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN15_REG          (DR_REG_RTCIO_BASE + 0x64)
+/* RTC_GPIO_PIN15_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN15_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN15_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN15_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN15_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN15_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN15_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN15_INT_TYPE_M  ((RTC_GPIO_PIN15_INT_TYPE_V)<<(RTC_GPIO_PIN15_INT_TYPE_S))
+#define RTC_GPIO_PIN15_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN15_INT_TYPE_S  7
+/* RTC_GPIO_PIN15_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN15_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN15_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN15_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN15_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN16_REG          (DR_REG_RTCIO_BASE + 0x68)
+/* RTC_GPIO_PIN16_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN16_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN16_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN16_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN16_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN16_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN16_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN16_INT_TYPE_M  ((RTC_GPIO_PIN16_INT_TYPE_V)<<(RTC_GPIO_PIN16_INT_TYPE_S))
+#define RTC_GPIO_PIN16_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN16_INT_TYPE_S  7
+/* RTC_GPIO_PIN16_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN16_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN16_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN16_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN16_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN17_REG          (DR_REG_RTCIO_BASE + 0x6C)
+/* RTC_GPIO_PIN17_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN17_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN17_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN17_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN17_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN17_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN17_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN17_INT_TYPE_M  ((RTC_GPIO_PIN17_INT_TYPE_V)<<(RTC_GPIO_PIN17_INT_TYPE_S))
+#define RTC_GPIO_PIN17_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN17_INT_TYPE_S  7
+/* RTC_GPIO_PIN17_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN17_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN17_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN17_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN17_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN18_REG          (DR_REG_RTCIO_BASE + 0x70)
+/* RTC_GPIO_PIN18_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN18_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN18_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN18_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN18_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN18_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN18_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN18_INT_TYPE_M  ((RTC_GPIO_PIN18_INT_TYPE_V)<<(RTC_GPIO_PIN18_INT_TYPE_S))
+#define RTC_GPIO_PIN18_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN18_INT_TYPE_S  7
+/* RTC_GPIO_PIN18_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN18_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN18_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN18_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN18_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN19_REG          (DR_REG_RTCIO_BASE + 0x74)
+/* RTC_GPIO_PIN19_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN19_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN19_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN19_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN19_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN19_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN19_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN19_INT_TYPE_M  ((RTC_GPIO_PIN19_INT_TYPE_V)<<(RTC_GPIO_PIN19_INT_TYPE_S))
+#define RTC_GPIO_PIN19_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN19_INT_TYPE_S  7
+/* RTC_GPIO_PIN19_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN19_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN19_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN19_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN19_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN20_REG          (DR_REG_RTCIO_BASE + 0x78)
+/* RTC_GPIO_PIN20_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN20_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN20_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN20_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN20_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN20_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN20_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN20_INT_TYPE_M  ((RTC_GPIO_PIN20_INT_TYPE_V)<<(RTC_GPIO_PIN20_INT_TYPE_S))
+#define RTC_GPIO_PIN20_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN20_INT_TYPE_S  7
+/* RTC_GPIO_PIN20_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN20_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN20_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN20_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN20_PAD_DRIVER_S  2
+
+#define RTC_GPIO_PIN21_REG          (DR_REG_RTCIO_BASE + 0x7C)
+/* RTC_GPIO_PIN21_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 0 ; */
+/*description: RTC GPIO wakeup enable bit.*/
+#define RTC_GPIO_PIN21_WAKEUP_ENABLE    (BIT(10))
+#define RTC_GPIO_PIN21_WAKEUP_ENABLE_M  (BIT(10))
+#define RTC_GPIO_PIN21_WAKEUP_ENABLE_V  0x1
+#define RTC_GPIO_PIN21_WAKEUP_ENABLE_S  10
+/* RTC_GPIO_PIN21_INT_TYPE : R/W ;bitpos:[9:7] ;default: 0 ; */
+/*description: if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set
+to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low leve
+l trigger,  if set to 5: high level trigger.*/
+#define RTC_GPIO_PIN21_INT_TYPE    0x00000007
+#define RTC_GPIO_PIN21_INT_TYPE_M  ((RTC_GPIO_PIN21_INT_TYPE_V)<<(RTC_GPIO_PIN21_INT_TYPE_S))
+#define RTC_GPIO_PIN21_INT_TYPE_V  0x7
+#define RTC_GPIO_PIN21_INT_TYPE_S  7
+/* RTC_GPIO_PIN21_PAD_DRIVER : R/W ;bitpos:[2] ;default: 0 ; */
+/*description: if set to 0: normal output, if set to 1: open drain.*/
+#define RTC_GPIO_PIN21_PAD_DRIVER    (BIT(2))
+#define RTC_GPIO_PIN21_PAD_DRIVER_M  (BIT(2))
+#define RTC_GPIO_PIN21_PAD_DRIVER_V  0x1
+#define RTC_GPIO_PIN21_PAD_DRIVER_S  2
+
+#define RTC_IO_RTC_DEBUG_SEL_REG          (DR_REG_RTCIO_BASE + 0x80)
+/* RTC_IO_DEBUG_12M_NO_GATING : R/W ;bitpos:[25] ;default: 1'd0 ; */
+/*description: .*/
+#define RTC_IO_DEBUG_12M_NO_GATING    (BIT(25))
+#define RTC_IO_DEBUG_12M_NO_GATING_M  (BIT(25))
+#define RTC_IO_DEBUG_12M_NO_GATING_V  0x1
+#define RTC_IO_DEBUG_12M_NO_GATING_S  25
+/* RTC_IO_DEBUG_SEL4 : R/W ;bitpos:[24:20] ;default: 5'd0 ; */
+/*description: .*/
+#define RTC_IO_DEBUG_SEL4    0x0000001F
+#define RTC_IO_DEBUG_SEL4_M  ((RTC_IO_DEBUG_SEL4_V)<<(RTC_IO_DEBUG_SEL4_S))
+#define RTC_IO_DEBUG_SEL4_V  0x1F
+#define RTC_IO_DEBUG_SEL4_S  20
+/* RTC_IO_DEBUG_SEL3 : R/W ;bitpos:[19:15] ;default: 5'd0 ; */
+/*description: .*/
+#define RTC_IO_DEBUG_SEL3    0x0000001F
+#define RTC_IO_DEBUG_SEL3_M  ((RTC_IO_DEBUG_SEL3_V)<<(RTC_IO_DEBUG_SEL3_S))
+#define RTC_IO_DEBUG_SEL3_V  0x1F
+#define RTC_IO_DEBUG_SEL3_S  15
+/* RTC_IO_DEBUG_SEL2 : R/W ;bitpos:[14:10] ;default: 5'd0 ; */
+/*description: .*/
+#define RTC_IO_DEBUG_SEL2    0x0000001F
+#define RTC_IO_DEBUG_SEL2_M  ((RTC_IO_DEBUG_SEL2_V)<<(RTC_IO_DEBUG_SEL2_S))
+#define RTC_IO_DEBUG_SEL2_V  0x1F
+#define RTC_IO_DEBUG_SEL2_S  10
+/* RTC_IO_DEBUG_SEL1 : R/W ;bitpos:[9:5] ;default: 5'd0 ; */
+/*description: .*/
+#define RTC_IO_DEBUG_SEL1    0x0000001F
+#define RTC_IO_DEBUG_SEL1_M  ((RTC_IO_DEBUG_SEL1_V)<<(RTC_IO_DEBUG_SEL1_S))
+#define RTC_IO_DEBUG_SEL1_V  0x1F
+#define RTC_IO_DEBUG_SEL1_S  5
+/* RTC_IO_DEBUG_SEL0 : R/W ;bitpos:[4:0] ;default: 5'd0 ; */
+/*description: .*/
+#define RTC_IO_DEBUG_SEL0    0x0000001F
+#define RTC_IO_DEBUG_SEL0_M  ((RTC_IO_DEBUG_SEL0_V)<<(RTC_IO_DEBUG_SEL0_S))
+#define RTC_IO_DEBUG_SEL0_V  0x1F
+#define RTC_IO_DEBUG_SEL0_S  0
+
+#define RTC_IO_TOUCH_PAD0_REG          (DR_REG_RTCIO_BASE + 0x84)
+/* RTC_IO_TOUCH_PAD0_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD0_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD0_DRV_M  ((RTC_IO_TOUCH_PAD0_DRV_V)<<(RTC_IO_TOUCH_PAD0_DRV_S))
+#define RTC_IO_TOUCH_PAD0_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD0_DRV_S  29
+/* RTC_IO_TOUCH_PAD0_RDE : R/W ;bitpos:[28] ;default: 1'd1 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD0_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD0_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD0_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD0_RDE_S  28
+/* RTC_IO_TOUCH_PAD0_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD0_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD0_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD0_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD0_RUE_S  27
+/* RTC_IO_TOUCH_PAD0_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD0_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD0_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD0_START_V  0x1
+#define RTC_IO_TOUCH_PAD0_START_S  22
+/* RTC_IO_TOUCH_PAD0_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD0_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD0_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD0_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD0_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD0_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD0_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD0_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD0_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD0_XPD_S  20
+/* RTC_IO_TOUCH_PAD0_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD0_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD0_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD0_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD0_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD0_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD0_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD0_FUN_SEL_M  ((RTC_IO_TOUCH_PAD0_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD0_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD0_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD0_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD0_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD0_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD0_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD0_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD0_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD0_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD0_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD0_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD0_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD0_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD0_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD0_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD0_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD0_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD0_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD0_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD0_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD0_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD0_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD0_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD1_REG          (DR_REG_RTCIO_BASE + 0x88)
+/* RTC_IO_TOUCH_PAD1_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD1_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD1_DRV_M  ((RTC_IO_TOUCH_PAD1_DRV_V)<<(RTC_IO_TOUCH_PAD1_DRV_S))
+#define RTC_IO_TOUCH_PAD1_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD1_DRV_S  29
+/* RTC_IO_TOUCH_PAD1_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD1_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD1_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD1_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD1_RDE_S  28
+/* RTC_IO_TOUCH_PAD1_RUE : R/W ;bitpos:[27] ;default: 1'd1 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD1_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD1_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD1_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD1_RUE_S  27
+/* RTC_IO_TOUCH_PAD1_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD1_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD1_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD1_START_V  0x1
+#define RTC_IO_TOUCH_PAD1_START_S  22
+/* RTC_IO_TOUCH_PAD1_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD1_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD1_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD1_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD1_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD1_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD1_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD1_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD1_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD1_XPD_S  20
+/* RTC_IO_TOUCH_PAD1_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD1_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD1_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD1_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD1_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD1_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD1_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD1_FUN_SEL_M  ((RTC_IO_TOUCH_PAD1_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD1_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD1_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD1_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD1_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD1_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD1_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD1_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD1_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD1_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD1_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD1_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD1_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD1_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD1_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD1_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD1_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD1_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD1_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD1_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD1_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD1_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD1_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD1_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD2_REG          (DR_REG_RTCIO_BASE + 0x8C)
+/* RTC_IO_TOUCH_PAD2_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD2_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD2_DRV_M  ((RTC_IO_TOUCH_PAD2_DRV_V)<<(RTC_IO_TOUCH_PAD2_DRV_S))
+#define RTC_IO_TOUCH_PAD2_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD2_DRV_S  29
+/* RTC_IO_TOUCH_PAD2_RDE : R/W ;bitpos:[28] ;default: 1'd1 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD2_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD2_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD2_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD2_RDE_S  28
+/* RTC_IO_TOUCH_PAD2_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD2_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD2_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD2_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD2_RUE_S  27
+/* RTC_IO_TOUCH_PAD2_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD2_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD2_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD2_START_V  0x1
+#define RTC_IO_TOUCH_PAD2_START_S  22
+/* RTC_IO_TOUCH_PAD2_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD2_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD2_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD2_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD2_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD2_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD2_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD2_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD2_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD2_XPD_S  20
+/* RTC_IO_TOUCH_PAD2_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD2_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD2_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD2_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD2_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD2_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD2_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD2_FUN_SEL_M  ((RTC_IO_TOUCH_PAD2_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD2_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD2_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD2_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD2_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD2_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD2_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD2_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD2_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD2_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD2_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD2_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD2_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD2_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD2_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD2_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD2_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD2_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD2_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD2_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD2_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD2_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD2_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD2_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD3_REG          (DR_REG_RTCIO_BASE + 0x90)
+/* RTC_IO_TOUCH_PAD3_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD3_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD3_DRV_M  ((RTC_IO_TOUCH_PAD3_DRV_V)<<(RTC_IO_TOUCH_PAD3_DRV_S))
+#define RTC_IO_TOUCH_PAD3_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD3_DRV_S  29
+/* RTC_IO_TOUCH_PAD3_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD3_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD3_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD3_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD3_RDE_S  28
+/* RTC_IO_TOUCH_PAD3_RUE : R/W ;bitpos:[27] ;default: 1'd1 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD3_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD3_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD3_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD3_RUE_S  27
+/* RTC_IO_TOUCH_PAD3_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD3_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD3_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD3_START_V  0x1
+#define RTC_IO_TOUCH_PAD3_START_S  22
+/* RTC_IO_TOUCH_PAD3_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD3_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD3_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD3_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD3_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD3_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD3_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD3_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD3_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD3_XPD_S  20
+/* RTC_IO_TOUCH_PAD3_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD3_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD3_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD3_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD3_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD3_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD3_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD3_FUN_SEL_M  ((RTC_IO_TOUCH_PAD3_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD3_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD3_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD3_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD3_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD3_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD3_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD3_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD3_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD3_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD3_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD3_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD3_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD3_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD3_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD3_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD3_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD3_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD3_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD3_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD3_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD3_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD3_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD3_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD4_REG          (DR_REG_RTCIO_BASE + 0x94)
+/* RTC_IO_TOUCH_PAD4_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD4_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD4_DRV_M  ((RTC_IO_TOUCH_PAD4_DRV_V)<<(RTC_IO_TOUCH_PAD4_DRV_S))
+#define RTC_IO_TOUCH_PAD4_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD4_DRV_S  29
+/* RTC_IO_TOUCH_PAD4_RDE : R/W ;bitpos:[28] ;default: 1'd1 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD4_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD4_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD4_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD4_RDE_S  28
+/* RTC_IO_TOUCH_PAD4_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD4_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD4_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD4_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD4_RUE_S  27
+/* RTC_IO_TOUCH_PAD4_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD4_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD4_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD4_START_V  0x1
+#define RTC_IO_TOUCH_PAD4_START_S  22
+/* RTC_IO_TOUCH_PAD4_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD4_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD4_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD4_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD4_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD4_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD4_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD4_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD4_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD4_XPD_S  20
+/* RTC_IO_TOUCH_PAD4_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD4_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD4_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD4_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD4_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD4_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD4_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD4_FUN_SEL_M  ((RTC_IO_TOUCH_PAD4_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD4_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD4_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD4_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD4_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD4_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD4_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD4_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD4_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD4_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD4_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD4_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD4_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD4_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD4_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD4_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD4_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD4_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD4_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD4_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD4_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD4_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD4_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD4_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD5_REG          (DR_REG_RTCIO_BASE + 0x98)
+/* RTC_IO_TOUCH_PAD5_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD5_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD5_DRV_M  ((RTC_IO_TOUCH_PAD5_DRV_V)<<(RTC_IO_TOUCH_PAD5_DRV_S))
+#define RTC_IO_TOUCH_PAD5_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD5_DRV_S  29
+/* RTC_IO_TOUCH_PAD5_RDE : R/W ;bitpos:[28] ;default: 1'd1 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD5_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD5_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD5_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD5_RDE_S  28
+/* RTC_IO_TOUCH_PAD5_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD5_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD5_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD5_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD5_RUE_S  27
+/* RTC_IO_TOUCH_PAD5_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD5_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD5_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD5_START_V  0x1
+#define RTC_IO_TOUCH_PAD5_START_S  22
+/* RTC_IO_TOUCH_PAD5_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD5_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD5_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD5_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD5_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD5_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD5_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD5_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD5_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD5_XPD_S  20
+/* RTC_IO_TOUCH_PAD5_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD5_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD5_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD5_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD5_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD5_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD5_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD5_FUN_SEL_M  ((RTC_IO_TOUCH_PAD5_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD5_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD5_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD5_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD5_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD5_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD5_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD5_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD5_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD5_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD5_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD5_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD5_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD5_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD5_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD5_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD5_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD5_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD5_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD5_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD5_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD5_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD5_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD5_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD6_REG          (DR_REG_RTCIO_BASE + 0x9C)
+/* RTC_IO_TOUCH_PAD6_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD6_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD6_DRV_M  ((RTC_IO_TOUCH_PAD6_DRV_V)<<(RTC_IO_TOUCH_PAD6_DRV_S))
+#define RTC_IO_TOUCH_PAD6_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD6_DRV_S  29
+/* RTC_IO_TOUCH_PAD6_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD6_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD6_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD6_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD6_RDE_S  28
+/* RTC_IO_TOUCH_PAD6_RUE : R/W ;bitpos:[27] ;default: 1'd1 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD6_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD6_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD6_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD6_RUE_S  27
+/* RTC_IO_TOUCH_PAD6_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD6_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD6_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD6_START_V  0x1
+#define RTC_IO_TOUCH_PAD6_START_S  22
+/* RTC_IO_TOUCH_PAD6_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD6_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD6_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD6_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD6_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD6_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD6_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD6_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD6_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD6_XPD_S  20
+/* RTC_IO_TOUCH_PAD6_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD6_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD6_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD6_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD6_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD6_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD6_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD6_FUN_SEL_M  ((RTC_IO_TOUCH_PAD6_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD6_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD6_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD6_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD6_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD6_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD6_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD6_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD6_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD6_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD6_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD6_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD6_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD6_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD6_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD6_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD6_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD6_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD6_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD6_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD6_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD6_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD6_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD6_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD7_REG          (DR_REG_RTCIO_BASE + 0xA0)
+/* RTC_IO_TOUCH_PAD7_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD7_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD7_DRV_M  ((RTC_IO_TOUCH_PAD7_DRV_V)<<(RTC_IO_TOUCH_PAD7_DRV_S))
+#define RTC_IO_TOUCH_PAD7_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD7_DRV_S  29
+/* RTC_IO_TOUCH_PAD7_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD7_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD7_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD7_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD7_RDE_S  28
+/* RTC_IO_TOUCH_PAD7_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD7_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD7_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD7_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD7_RUE_S  27
+/* RTC_IO_TOUCH_PAD7_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD7_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD7_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD7_START_V  0x1
+#define RTC_IO_TOUCH_PAD7_START_S  22
+/* RTC_IO_TOUCH_PAD7_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD7_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD7_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD7_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD7_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD7_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD7_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD7_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD7_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD7_XPD_S  20
+/* RTC_IO_TOUCH_PAD7_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD7_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD7_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD7_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD7_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD7_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD7_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD7_FUN_SEL_M  ((RTC_IO_TOUCH_PAD7_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD7_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD7_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD7_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD7_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD7_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD7_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD7_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD7_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD7_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD7_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD7_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD7_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD7_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD7_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD7_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD7_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD7_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD7_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD7_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD7_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD7_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD7_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD7_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD8_REG          (DR_REG_RTCIO_BASE + 0xA4)
+/* RTC_IO_TOUCH_PAD8_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD8_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD8_DRV_M  ((RTC_IO_TOUCH_PAD8_DRV_V)<<(RTC_IO_TOUCH_PAD8_DRV_S))
+#define RTC_IO_TOUCH_PAD8_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD8_DRV_S  29
+/* RTC_IO_TOUCH_PAD8_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD8_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD8_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD8_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD8_RDE_S  28
+/* RTC_IO_TOUCH_PAD8_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD8_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD8_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD8_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD8_RUE_S  27
+/* RTC_IO_TOUCH_PAD8_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD8_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD8_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD8_START_V  0x1
+#define RTC_IO_TOUCH_PAD8_START_S  22
+/* RTC_IO_TOUCH_PAD8_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD8_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD8_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD8_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD8_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD8_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD8_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD8_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD8_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD8_XPD_S  20
+/* RTC_IO_TOUCH_PAD8_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD8_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD8_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD8_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD8_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD8_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD8_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD8_FUN_SEL_M  ((RTC_IO_TOUCH_PAD8_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD8_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD8_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD8_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD8_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD8_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD8_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD8_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD8_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD8_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD8_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD8_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD8_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD8_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD8_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD8_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD8_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD8_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD8_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD8_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD8_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD8_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD8_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD8_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD9_REG          (DR_REG_RTCIO_BASE + 0xA8)
+/* RTC_IO_TOUCH_PAD9_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD9_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD9_DRV_M  ((RTC_IO_TOUCH_PAD9_DRV_V)<<(RTC_IO_TOUCH_PAD9_DRV_S))
+#define RTC_IO_TOUCH_PAD9_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD9_DRV_S  29
+/* RTC_IO_TOUCH_PAD9_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD9_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD9_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD9_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD9_RDE_S  28
+/* RTC_IO_TOUCH_PAD9_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD9_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD9_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD9_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD9_RUE_S  27
+/* RTC_IO_TOUCH_PAD9_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD9_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD9_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD9_START_V  0x1
+#define RTC_IO_TOUCH_PAD9_START_S  22
+/* RTC_IO_TOUCH_PAD9_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD9_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD9_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD9_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD9_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD9_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD9_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD9_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD9_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD9_XPD_S  20
+/* RTC_IO_TOUCH_PAD9_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD9_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD9_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD9_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD9_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD9_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD9_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD9_FUN_SEL_M  ((RTC_IO_TOUCH_PAD9_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD9_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD9_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD9_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD9_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD9_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD9_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD9_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD9_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD9_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD9_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD9_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD9_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD9_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD9_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD9_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD9_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD9_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD9_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD9_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD9_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD9_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD9_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD9_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD10_REG          (DR_REG_RTCIO_BASE + 0xAC)
+/* RTC_IO_TOUCH_PAD10_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD10_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD10_DRV_M  ((RTC_IO_TOUCH_PAD10_DRV_V)<<(RTC_IO_TOUCH_PAD10_DRV_S))
+#define RTC_IO_TOUCH_PAD10_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD10_DRV_S  29
+/* RTC_IO_TOUCH_PAD10_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD10_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD10_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD10_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD10_RDE_S  28
+/* RTC_IO_TOUCH_PAD10_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD10_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD10_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD10_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD10_RUE_S  27
+/* RTC_IO_TOUCH_PAD10_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD10_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD10_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD10_START_V  0x1
+#define RTC_IO_TOUCH_PAD10_START_S  22
+/* RTC_IO_TOUCH_PAD10_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD10_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD10_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD10_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD10_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD10_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD10_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD10_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD10_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD10_XPD_S  20
+/* RTC_IO_TOUCH_PAD10_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD10_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD10_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD10_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD10_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD10_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD10_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD10_FUN_SEL_M  ((RTC_IO_TOUCH_PAD10_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD10_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD10_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD10_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD10_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD10_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD10_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD10_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD10_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD10_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD10_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD10_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD10_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD10_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD10_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD10_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD10_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD10_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD10_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD10_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD10_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD10_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD10_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD10_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD11_REG          (DR_REG_RTCIO_BASE + 0xB0)
+/* RTC_IO_TOUCH_PAD11_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD11_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD11_DRV_M  ((RTC_IO_TOUCH_PAD11_DRV_V)<<(RTC_IO_TOUCH_PAD11_DRV_S))
+#define RTC_IO_TOUCH_PAD11_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD11_DRV_S  29
+/* RTC_IO_TOUCH_PAD11_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD11_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD11_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD11_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD11_RDE_S  28
+/* RTC_IO_TOUCH_PAD11_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD11_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD11_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD11_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD11_RUE_S  27
+/* RTC_IO_TOUCH_PAD11_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD11_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD11_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD11_START_V  0x1
+#define RTC_IO_TOUCH_PAD11_START_S  22
+/* RTC_IO_TOUCH_PAD11_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD11_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD11_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD11_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD11_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD11_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD11_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD11_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD11_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD11_XPD_S  20
+/* RTC_IO_TOUCH_PAD11_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD11_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD11_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD11_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD11_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD11_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD11_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD11_FUN_SEL_M  ((RTC_IO_TOUCH_PAD11_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD11_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD11_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD11_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD11_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD11_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD11_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD11_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD11_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD11_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD11_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD11_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD11_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD11_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD11_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD11_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD11_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD11_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD11_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD11_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD11_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD11_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD11_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD11_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD12_REG          (DR_REG_RTCIO_BASE + 0xB4)
+/* RTC_IO_TOUCH_PAD12_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD12_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD12_DRV_M  ((RTC_IO_TOUCH_PAD12_DRV_V)<<(RTC_IO_TOUCH_PAD12_DRV_S))
+#define RTC_IO_TOUCH_PAD12_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD12_DRV_S  29
+/* RTC_IO_TOUCH_PAD12_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD12_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD12_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD12_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD12_RDE_S  28
+/* RTC_IO_TOUCH_PAD12_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD12_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD12_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD12_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD12_RUE_S  27
+/* RTC_IO_TOUCH_PAD12_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD12_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD12_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD12_START_V  0x1
+#define RTC_IO_TOUCH_PAD12_START_S  22
+/* RTC_IO_TOUCH_PAD12_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD12_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD12_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD12_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD12_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD12_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD12_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD12_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD12_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD12_XPD_S  20
+/* RTC_IO_TOUCH_PAD12_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD12_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD12_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD12_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD12_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD12_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD12_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD12_FUN_SEL_M  ((RTC_IO_TOUCH_PAD12_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD12_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD12_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD12_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD12_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD12_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD12_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD12_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD12_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD12_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD12_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD12_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD12_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD12_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD12_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD12_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD12_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD12_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD12_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD12_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD12_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD12_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD12_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD12_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD13_REG          (DR_REG_RTCIO_BASE + 0xB8)
+/* RTC_IO_TOUCH_PAD13_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD13_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD13_DRV_M  ((RTC_IO_TOUCH_PAD13_DRV_V)<<(RTC_IO_TOUCH_PAD13_DRV_S))
+#define RTC_IO_TOUCH_PAD13_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD13_DRV_S  29
+/* RTC_IO_TOUCH_PAD13_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD13_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD13_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD13_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD13_RDE_S  28
+/* RTC_IO_TOUCH_PAD13_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD13_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD13_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD13_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD13_RUE_S  27
+/* RTC_IO_TOUCH_PAD13_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD13_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD13_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD13_START_V  0x1
+#define RTC_IO_TOUCH_PAD13_START_S  22
+/* RTC_IO_TOUCH_PAD13_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD13_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD13_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD13_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD13_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD13_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD13_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD13_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD13_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD13_XPD_S  20
+/* RTC_IO_TOUCH_PAD13_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD13_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD13_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD13_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD13_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD13_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD13_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD13_FUN_SEL_M  ((RTC_IO_TOUCH_PAD13_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD13_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD13_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD13_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD13_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD13_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD13_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD13_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD13_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD13_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD13_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD13_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD13_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD13_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD13_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD13_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD13_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD13_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD13_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD13_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD13_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD13_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD13_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD13_FUN_IE_S  13
+
+#define RTC_IO_TOUCH_PAD14_REG          (DR_REG_RTCIO_BASE + 0xBC)
+/* RTC_IO_TOUCH_PAD14_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_TOUCH_PAD14_DRV    0x00000003
+#define RTC_IO_TOUCH_PAD14_DRV_M  ((RTC_IO_TOUCH_PAD14_DRV_V)<<(RTC_IO_TOUCH_PAD14_DRV_S))
+#define RTC_IO_TOUCH_PAD14_DRV_V  0x3
+#define RTC_IO_TOUCH_PAD14_DRV_S  29
+/* RTC_IO_TOUCH_PAD14_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_TOUCH_PAD14_RDE    (BIT(28))
+#define RTC_IO_TOUCH_PAD14_RDE_M  (BIT(28))
+#define RTC_IO_TOUCH_PAD14_RDE_V  0x1
+#define RTC_IO_TOUCH_PAD14_RDE_S  28
+/* RTC_IO_TOUCH_PAD14_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_TOUCH_PAD14_RUE    (BIT(27))
+#define RTC_IO_TOUCH_PAD14_RUE_M  (BIT(27))
+#define RTC_IO_TOUCH_PAD14_RUE_V  0x1
+#define RTC_IO_TOUCH_PAD14_RUE_S  27
+/* RTC_IO_TOUCH_PAD14_START : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: TOUCH_START.*/
+#define RTC_IO_TOUCH_PAD14_START    (BIT(22))
+#define RTC_IO_TOUCH_PAD14_START_M  (BIT(22))
+#define RTC_IO_TOUCH_PAD14_START_V  0x1
+#define RTC_IO_TOUCH_PAD14_START_S  22
+/* RTC_IO_TOUCH_PAD14_TIE_OPT : R/W ;bitpos:[21] ;default: 1'd0 ; */
+/*description: TOUCH_TIE_OPT.*/
+#define RTC_IO_TOUCH_PAD14_TIE_OPT    (BIT(21))
+#define RTC_IO_TOUCH_PAD14_TIE_OPT_M  (BIT(21))
+#define RTC_IO_TOUCH_PAD14_TIE_OPT_V  0x1
+#define RTC_IO_TOUCH_PAD14_TIE_OPT_S  21
+/* RTC_IO_TOUCH_PAD14_XPD : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: TOUCH_XPD.*/
+#define RTC_IO_TOUCH_PAD14_XPD    (BIT(20))
+#define RTC_IO_TOUCH_PAD14_XPD_M  (BIT(20))
+#define RTC_IO_TOUCH_PAD14_XPD_V  0x1
+#define RTC_IO_TOUCH_PAD14_XPD_S  20
+/* RTC_IO_TOUCH_PAD14_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_TOUCH_PAD14_MUX_SEL    (BIT(19))
+#define RTC_IO_TOUCH_PAD14_MUX_SEL_M  (BIT(19))
+#define RTC_IO_TOUCH_PAD14_MUX_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD14_MUX_SEL_S  19
+/* RTC_IO_TOUCH_PAD14_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_TOUCH_PAD14_FUN_SEL    0x00000003
+#define RTC_IO_TOUCH_PAD14_FUN_SEL_M  ((RTC_IO_TOUCH_PAD14_FUN_SEL_V)<<(RTC_IO_TOUCH_PAD14_FUN_SEL_S))
+#define RTC_IO_TOUCH_PAD14_FUN_SEL_V  0x3
+#define RTC_IO_TOUCH_PAD14_FUN_SEL_S  17
+/* RTC_IO_TOUCH_PAD14_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_TOUCH_PAD14_SLP_SEL    (BIT(16))
+#define RTC_IO_TOUCH_PAD14_SLP_SEL_M  (BIT(16))
+#define RTC_IO_TOUCH_PAD14_SLP_SEL_V  0x1
+#define RTC_IO_TOUCH_PAD14_SLP_SEL_S  16
+/* RTC_IO_TOUCH_PAD14_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD14_SLP_IE    (BIT(15))
+#define RTC_IO_TOUCH_PAD14_SLP_IE_M  (BIT(15))
+#define RTC_IO_TOUCH_PAD14_SLP_IE_V  0x1
+#define RTC_IO_TOUCH_PAD14_SLP_IE_S  15
+/* RTC_IO_TOUCH_PAD14_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_TOUCH_PAD14_SLP_OE    (BIT(14))
+#define RTC_IO_TOUCH_PAD14_SLP_OE_M  (BIT(14))
+#define RTC_IO_TOUCH_PAD14_SLP_OE_V  0x1
+#define RTC_IO_TOUCH_PAD14_SLP_OE_S  14
+/* RTC_IO_TOUCH_PAD14_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_TOUCH_PAD14_FUN_IE    (BIT(13))
+#define RTC_IO_TOUCH_PAD14_FUN_IE_M  (BIT(13))
+#define RTC_IO_TOUCH_PAD14_FUN_IE_V  0x1
+#define RTC_IO_TOUCH_PAD14_FUN_IE_S  13
+
+#define RTC_IO_XTAL_32P_PAD_REG          (DR_REG_RTCIO_BASE + 0xC0)
+/* RTC_IO_X32P_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_X32P_DRV    0x00000003
+#define RTC_IO_X32P_DRV_M  ((RTC_IO_X32P_DRV_V)<<(RTC_IO_X32P_DRV_S))
+#define RTC_IO_X32P_DRV_V  0x3
+#define RTC_IO_X32P_DRV_S  29
+/* RTC_IO_X32P_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_X32P_RDE    (BIT(28))
+#define RTC_IO_X32P_RDE_M  (BIT(28))
+#define RTC_IO_X32P_RDE_V  0x1
+#define RTC_IO_X32P_RDE_S  28
+/* RTC_IO_X32P_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_X32P_RUE    (BIT(27))
+#define RTC_IO_X32P_RUE_M  (BIT(27))
+#define RTC_IO_X32P_RUE_V  0x1
+#define RTC_IO_X32P_RUE_S  27
+/* RTC_IO_X32P_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_X32P_MUX_SEL    (BIT(19))
+#define RTC_IO_X32P_MUX_SEL_M  (BIT(19))
+#define RTC_IO_X32P_MUX_SEL_V  0x1
+#define RTC_IO_X32P_MUX_SEL_S  19
+/* RTC_IO_X32P_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_X32P_FUN_SEL    0x00000003
+#define RTC_IO_X32P_FUN_SEL_M  ((RTC_IO_X32P_FUN_SEL_V)<<(RTC_IO_X32P_FUN_SEL_S))
+#define RTC_IO_X32P_FUN_SEL_V  0x3
+#define RTC_IO_X32P_FUN_SEL_S  17
+/* RTC_IO_X32P_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_X32P_SLP_SEL    (BIT(16))
+#define RTC_IO_X32P_SLP_SEL_M  (BIT(16))
+#define RTC_IO_X32P_SLP_SEL_V  0x1
+#define RTC_IO_X32P_SLP_SEL_S  16
+/* RTC_IO_X32P_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_X32P_SLP_IE    (BIT(15))
+#define RTC_IO_X32P_SLP_IE_M  (BIT(15))
+#define RTC_IO_X32P_SLP_IE_V  0x1
+#define RTC_IO_X32P_SLP_IE_S  15
+/* RTC_IO_X32P_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_X32P_SLP_OE    (BIT(14))
+#define RTC_IO_X32P_SLP_OE_M  (BIT(14))
+#define RTC_IO_X32P_SLP_OE_V  0x1
+#define RTC_IO_X32P_SLP_OE_S  14
+/* RTC_IO_X32P_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_X32P_FUN_IE    (BIT(13))
+#define RTC_IO_X32P_FUN_IE_M  (BIT(13))
+#define RTC_IO_X32P_FUN_IE_V  0x1
+#define RTC_IO_X32P_FUN_IE_S  13
+
+#define RTC_IO_XTAL_32N_PAD_REG          (DR_REG_RTCIO_BASE + 0xC4)
+/* RTC_IO_X32N_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_X32N_DRV    0x00000003
+#define RTC_IO_X32N_DRV_M  ((RTC_IO_X32N_DRV_V)<<(RTC_IO_X32N_DRV_S))
+#define RTC_IO_X32N_DRV_V  0x3
+#define RTC_IO_X32N_DRV_S  29
+/* RTC_IO_X32N_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RDE.*/
+#define RTC_IO_X32N_RDE    (BIT(28))
+#define RTC_IO_X32N_RDE_M  (BIT(28))
+#define RTC_IO_X32N_RDE_V  0x1
+#define RTC_IO_X32N_RDE_S  28
+/* RTC_IO_X32N_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_X32N_RUE    (BIT(27))
+#define RTC_IO_X32N_RUE_M  (BIT(27))
+#define RTC_IO_X32N_RUE_V  0x1
+#define RTC_IO_X32N_RUE_S  27
+/* RTC_IO_X32N_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_X32N_MUX_SEL    (BIT(19))
+#define RTC_IO_X32N_MUX_SEL_M  (BIT(19))
+#define RTC_IO_X32N_MUX_SEL_V  0x1
+#define RTC_IO_X32N_MUX_SEL_S  19
+/* RTC_IO_X32N_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_X32N_FUN_SEL    0x00000003
+#define RTC_IO_X32N_FUN_SEL_M  ((RTC_IO_X32N_FUN_SEL_V)<<(RTC_IO_X32N_FUN_SEL_S))
+#define RTC_IO_X32N_FUN_SEL_V  0x3
+#define RTC_IO_X32N_FUN_SEL_S  17
+/* RTC_IO_X32N_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_X32N_SLP_SEL    (BIT(16))
+#define RTC_IO_X32N_SLP_SEL_M  (BIT(16))
+#define RTC_IO_X32N_SLP_SEL_V  0x1
+#define RTC_IO_X32N_SLP_SEL_S  16
+/* RTC_IO_X32N_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_X32N_SLP_IE    (BIT(15))
+#define RTC_IO_X32N_SLP_IE_M  (BIT(15))
+#define RTC_IO_X32N_SLP_IE_V  0x1
+#define RTC_IO_X32N_SLP_IE_S  15
+/* RTC_IO_X32N_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_X32N_SLP_OE    (BIT(14))
+#define RTC_IO_X32N_SLP_OE_M  (BIT(14))
+#define RTC_IO_X32N_SLP_OE_V  0x1
+#define RTC_IO_X32N_SLP_OE_S  14
+/* RTC_IO_X32N_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_X32N_FUN_IE    (BIT(13))
+#define RTC_IO_X32N_FUN_IE_M  (BIT(13))
+#define RTC_IO_X32N_FUN_IE_V  0x1
+#define RTC_IO_X32N_FUN_IE_S  13
+
+#define RTC_IO_PAD_DAC1_REG          (DR_REG_RTCIO_BASE + 0xC8)
+/* RTC_IO_PDAC1_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: PDAC1_DRV.*/
+#define RTC_IO_PDAC1_DRV    0x00000003
+#define RTC_IO_PDAC1_DRV_M  ((RTC_IO_PDAC1_DRV_V)<<(RTC_IO_PDAC1_DRV_S))
+#define RTC_IO_PDAC1_DRV_V  0x3
+#define RTC_IO_PDAC1_DRV_S  29
+/* RTC_IO_PDAC1_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: PDAC1_RDE.*/
+#define RTC_IO_PDAC1_RDE    (BIT(28))
+#define RTC_IO_PDAC1_RDE_M  (BIT(28))
+#define RTC_IO_PDAC1_RDE_V  0x1
+#define RTC_IO_PDAC1_RDE_S  28
+/* RTC_IO_PDAC1_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: PDAC1_RUE.*/
+#define RTC_IO_PDAC1_RUE    (BIT(27))
+#define RTC_IO_PDAC1_RUE_M  (BIT(27))
+#define RTC_IO_PDAC1_RUE_V  0x1
+#define RTC_IO_PDAC1_RUE_S  27
+/* RTC_IO_PDAC1_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_PDAC1_MUX_SEL    (BIT(19))
+#define RTC_IO_PDAC1_MUX_SEL_M  (BIT(19))
+#define RTC_IO_PDAC1_MUX_SEL_V  0x1
+#define RTC_IO_PDAC1_MUX_SEL_S  19
+/* RTC_IO_PDAC1_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: PDAC1 function sel.*/
+#define RTC_IO_PDAC1_FUN_SEL    0x00000003
+#define RTC_IO_PDAC1_FUN_SEL_M  ((RTC_IO_PDAC1_FUN_SEL_V)<<(RTC_IO_PDAC1_FUN_SEL_S))
+#define RTC_IO_PDAC1_FUN_SEL_V  0x3
+#define RTC_IO_PDAC1_FUN_SEL_S  17
+/* RTC_IO_PDAC1_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_PDAC1_SLP_SEL    (BIT(16))
+#define RTC_IO_PDAC1_SLP_SEL_M  (BIT(16))
+#define RTC_IO_PDAC1_SLP_SEL_V  0x1
+#define RTC_IO_PDAC1_SLP_SEL_S  16
+/* RTC_IO_PDAC1_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_PDAC1_SLP_IE    (BIT(15))
+#define RTC_IO_PDAC1_SLP_IE_M  (BIT(15))
+#define RTC_IO_PDAC1_SLP_IE_V  0x1
+#define RTC_IO_PDAC1_SLP_IE_S  15
+/* RTC_IO_PDAC1_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_PDAC1_SLP_OE    (BIT(14))
+#define RTC_IO_PDAC1_SLP_OE_M  (BIT(14))
+#define RTC_IO_PDAC1_SLP_OE_V  0x1
+#define RTC_IO_PDAC1_SLP_OE_S  14
+/* RTC_IO_PDAC1_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_PDAC1_FUN_IE    (BIT(13))
+#define RTC_IO_PDAC1_FUN_IE_M  (BIT(13))
+#define RTC_IO_PDAC1_FUN_IE_V  0x1
+#define RTC_IO_PDAC1_FUN_IE_S  13
+/* RTC_IO_PDAC1_DAC_XPD_FORCE : R/W ;bitpos:[12] ;default: 1'd0 ; */
+/*description: 1: use reg_pdac1_xpd_dac to control PDAC1_XPD_DAC,0: use SAR ADC FSM to control
+PDAC1_XPD_DAC.*/
+#define RTC_IO_PDAC1_DAC_XPD_FORCE    (BIT(12))
+#define RTC_IO_PDAC1_DAC_XPD_FORCE_M  (BIT(12))
+#define RTC_IO_PDAC1_DAC_XPD_FORCE_V  0x1
+#define RTC_IO_PDAC1_DAC_XPD_FORCE_S  12
+/* RTC_IO_PDAC1_XPD_DAC : R/W ;bitpos:[11] ;default: 1'd0 ; */
+/*description: PDAC1_XPD_DAC.*/
+#define RTC_IO_PDAC1_XPD_DAC    (BIT(11))
+#define RTC_IO_PDAC1_XPD_DAC_M  (BIT(11))
+#define RTC_IO_PDAC1_XPD_DAC_V  0x1
+#define RTC_IO_PDAC1_XPD_DAC_S  11
+/* RTC_IO_PDAC1_DAC : R/W ;bitpos:[10:3] ;default: 8'd0 ; */
+/*description: PDAC1_DAC.*/
+#define RTC_IO_PDAC1_DAC    0x000000FF
+#define RTC_IO_PDAC1_DAC_M  ((RTC_IO_PDAC1_DAC_V)<<(RTC_IO_PDAC1_DAC_S))
+#define RTC_IO_PDAC1_DAC_V  0xFF
+#define RTC_IO_PDAC1_DAC_S  3
+
+#define RTC_IO_PAD_DAC2_REG          (DR_REG_RTCIO_BASE + 0xCC)
+/* RTC_IO_PDAC2_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: PDAC2_DRV.*/
+#define RTC_IO_PDAC2_DRV    0x00000003
+#define RTC_IO_PDAC2_DRV_M  ((RTC_IO_PDAC2_DRV_V)<<(RTC_IO_PDAC2_DRV_S))
+#define RTC_IO_PDAC2_DRV_V  0x3
+#define RTC_IO_PDAC2_DRV_S  29
+/* RTC_IO_PDAC2_RDE : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: PDAC2_RDE.*/
+#define RTC_IO_PDAC2_RDE    (BIT(28))
+#define RTC_IO_PDAC2_RDE_M  (BIT(28))
+#define RTC_IO_PDAC2_RDE_V  0x1
+#define RTC_IO_PDAC2_RDE_S  28
+/* RTC_IO_PDAC2_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: PDAC2_RUE.*/
+#define RTC_IO_PDAC2_RUE    (BIT(27))
+#define RTC_IO_PDAC2_RUE_M  (BIT(27))
+#define RTC_IO_PDAC2_RUE_V  0x1
+#define RTC_IO_PDAC2_RUE_S  27
+/* RTC_IO_PDAC2_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_PDAC2_MUX_SEL    (BIT(19))
+#define RTC_IO_PDAC2_MUX_SEL_M  (BIT(19))
+#define RTC_IO_PDAC2_MUX_SEL_V  0x1
+#define RTC_IO_PDAC2_MUX_SEL_S  19
+/* RTC_IO_PDAC2_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: PDAC1 function sel.*/
+#define RTC_IO_PDAC2_FUN_SEL    0x00000003
+#define RTC_IO_PDAC2_FUN_SEL_M  ((RTC_IO_PDAC2_FUN_SEL_V)<<(RTC_IO_PDAC2_FUN_SEL_S))
+#define RTC_IO_PDAC2_FUN_SEL_V  0x3
+#define RTC_IO_PDAC2_FUN_SEL_S  17
+/* RTC_IO_PDAC2_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_PDAC2_SLP_SEL    (BIT(16))
+#define RTC_IO_PDAC2_SLP_SEL_M  (BIT(16))
+#define RTC_IO_PDAC2_SLP_SEL_V  0x1
+#define RTC_IO_PDAC2_SLP_SEL_S  16
+/* RTC_IO_PDAC2_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_PDAC2_SLP_IE    (BIT(15))
+#define RTC_IO_PDAC2_SLP_IE_M  (BIT(15))
+#define RTC_IO_PDAC2_SLP_IE_V  0x1
+#define RTC_IO_PDAC2_SLP_IE_S  15
+/* RTC_IO_PDAC2_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_PDAC2_SLP_OE    (BIT(14))
+#define RTC_IO_PDAC2_SLP_OE_M  (BIT(14))
+#define RTC_IO_PDAC2_SLP_OE_V  0x1
+#define RTC_IO_PDAC2_SLP_OE_S  14
+/* RTC_IO_PDAC2_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_PDAC2_FUN_IE    (BIT(13))
+#define RTC_IO_PDAC2_FUN_IE_M  (BIT(13))
+#define RTC_IO_PDAC2_FUN_IE_V  0x1
+#define RTC_IO_PDAC2_FUN_IE_S  13
+/* RTC_IO_PDAC2_DAC_XPD_FORCE : R/W ;bitpos:[12] ;default: 1'd0 ; */
+/*description: 1: use reg_pdac2_xpd_dac to control PDAC2_XPD_DAC,0: use SAR ADC FSM to control
+PDAC2_XPD_DAC.*/
+#define RTC_IO_PDAC2_DAC_XPD_FORCE    (BIT(12))
+#define RTC_IO_PDAC2_DAC_XPD_FORCE_M  (BIT(12))
+#define RTC_IO_PDAC2_DAC_XPD_FORCE_V  0x1
+#define RTC_IO_PDAC2_DAC_XPD_FORCE_S  12
+/* RTC_IO_PDAC2_XPD_DAC : R/W ;bitpos:[11] ;default: 1'd0 ; */
+/*description: PDAC2_XPD_DAC.*/
+#define RTC_IO_PDAC2_XPD_DAC    (BIT(11))
+#define RTC_IO_PDAC2_XPD_DAC_M  (BIT(11))
+#define RTC_IO_PDAC2_XPD_DAC_V  0x1
+#define RTC_IO_PDAC2_XPD_DAC_S  11
+/* RTC_IO_PDAC2_DAC : R/W ;bitpos:[10:3] ;default: 8'd0 ; */
+/*description: PDAC2_DAC.*/
+#define RTC_IO_PDAC2_DAC    0x000000FF
+#define RTC_IO_PDAC2_DAC_M  ((RTC_IO_PDAC2_DAC_V)<<(RTC_IO_PDAC2_DAC_S))
+#define RTC_IO_PDAC2_DAC_V  0xFF
+#define RTC_IO_PDAC2_DAC_S  3
+
+#define RTC_IO_RTC_PAD19_REG          (DR_REG_RTCIO_BASE + 0xD0)
+/* RTC_IO_PAD19_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_PAD19_DRV    0x00000003
+#define RTC_IO_PAD19_DRV_M  ((RTC_IO_PAD19_DRV_V)<<(RTC_IO_PAD19_DRV_S))
+#define RTC_IO_PAD19_DRV_V  0x3
+#define RTC_IO_PAD19_DRV_S  29
+/* RTC_IO_PAD19_RDE : R/W ;bitpos:[28] ;default: 1'd1 ; */
+/*description: RDE.*/
+#define RTC_IO_PAD19_RDE    (BIT(28))
+#define RTC_IO_PAD19_RDE_M  (BIT(28))
+#define RTC_IO_PAD19_RDE_V  0x1
+#define RTC_IO_PAD19_RDE_S  28
+/* RTC_IO_PAD19_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_PAD19_RUE    (BIT(27))
+#define RTC_IO_PAD19_RUE_M  (BIT(27))
+#define RTC_IO_PAD19_RUE_V  0x1
+#define RTC_IO_PAD19_RUE_S  27
+/* RTC_IO_PAD19_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_PAD19_MUX_SEL    (BIT(19))
+#define RTC_IO_PAD19_MUX_SEL_M  (BIT(19))
+#define RTC_IO_PAD19_MUX_SEL_V  0x1
+#define RTC_IO_PAD19_MUX_SEL_S  19
+/* RTC_IO_PAD19_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_PAD19_FUN_SEL    0x00000003
+#define RTC_IO_PAD19_FUN_SEL_M  ((RTC_IO_PAD19_FUN_SEL_V)<<(RTC_IO_PAD19_FUN_SEL_S))
+#define RTC_IO_PAD19_FUN_SEL_V  0x3
+#define RTC_IO_PAD19_FUN_SEL_S  17
+/* RTC_IO_PAD19_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_PAD19_SLP_SEL    (BIT(16))
+#define RTC_IO_PAD19_SLP_SEL_M  (BIT(16))
+#define RTC_IO_PAD19_SLP_SEL_V  0x1
+#define RTC_IO_PAD19_SLP_SEL_S  16
+/* RTC_IO_PAD19_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_PAD19_SLP_IE    (BIT(15))
+#define RTC_IO_PAD19_SLP_IE_M  (BIT(15))
+#define RTC_IO_PAD19_SLP_IE_V  0x1
+#define RTC_IO_PAD19_SLP_IE_S  15
+/* RTC_IO_PAD19_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_PAD19_SLP_OE    (BIT(14))
+#define RTC_IO_PAD19_SLP_OE_M  (BIT(14))
+#define RTC_IO_PAD19_SLP_OE_V  0x1
+#define RTC_IO_PAD19_SLP_OE_S  14
+/* RTC_IO_PAD19_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_PAD19_FUN_IE    (BIT(13))
+#define RTC_IO_PAD19_FUN_IE_M  (BIT(13))
+#define RTC_IO_PAD19_FUN_IE_V  0x1
+#define RTC_IO_PAD19_FUN_IE_S  13
+
+#define RTC_IO_RTC_PAD20_REG          (DR_REG_RTCIO_BASE + 0xD4)
+/* RTC_IO_PAD20_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_PAD20_DRV    0x00000003
+#define RTC_IO_PAD20_DRV_M  ((RTC_IO_PAD20_DRV_V)<<(RTC_IO_PAD20_DRV_S))
+#define RTC_IO_PAD20_DRV_V  0x3
+#define RTC_IO_PAD20_DRV_S  29
+/* RTC_IO_PAD20_RDE : R/W ;bitpos:[28] ;default: 1'd1 ; */
+/*description: RDE.*/
+#define RTC_IO_PAD20_RDE    (BIT(28))
+#define RTC_IO_PAD20_RDE_M  (BIT(28))
+#define RTC_IO_PAD20_RDE_V  0x1
+#define RTC_IO_PAD20_RDE_S  28
+/* RTC_IO_PAD20_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_PAD20_RUE    (BIT(27))
+#define RTC_IO_PAD20_RUE_M  (BIT(27))
+#define RTC_IO_PAD20_RUE_V  0x1
+#define RTC_IO_PAD20_RUE_S  27
+/* RTC_IO_PAD20_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_PAD20_MUX_SEL    (BIT(19))
+#define RTC_IO_PAD20_MUX_SEL_M  (BIT(19))
+#define RTC_IO_PAD20_MUX_SEL_V  0x1
+#define RTC_IO_PAD20_MUX_SEL_S  19
+/* RTC_IO_PAD20_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_PAD20_FUN_SEL    0x00000003
+#define RTC_IO_PAD20_FUN_SEL_M  ((RTC_IO_PAD20_FUN_SEL_V)<<(RTC_IO_PAD20_FUN_SEL_S))
+#define RTC_IO_PAD20_FUN_SEL_V  0x3
+#define RTC_IO_PAD20_FUN_SEL_S  17
+/* RTC_IO_PAD20_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_PAD20_SLP_SEL    (BIT(16))
+#define RTC_IO_PAD20_SLP_SEL_M  (BIT(16))
+#define RTC_IO_PAD20_SLP_SEL_V  0x1
+#define RTC_IO_PAD20_SLP_SEL_S  16
+/* RTC_IO_PAD20_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_PAD20_SLP_IE    (BIT(15))
+#define RTC_IO_PAD20_SLP_IE_M  (BIT(15))
+#define RTC_IO_PAD20_SLP_IE_V  0x1
+#define RTC_IO_PAD20_SLP_IE_S  15
+/* RTC_IO_PAD20_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_PAD20_SLP_OE    (BIT(14))
+#define RTC_IO_PAD20_SLP_OE_M  (BIT(14))
+#define RTC_IO_PAD20_SLP_OE_V  0x1
+#define RTC_IO_PAD20_SLP_OE_S  14
+/* RTC_IO_PAD20_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_PAD20_FUN_IE    (BIT(13))
+#define RTC_IO_PAD20_FUN_IE_M  (BIT(13))
+#define RTC_IO_PAD20_FUN_IE_V  0x1
+#define RTC_IO_PAD20_FUN_IE_S  13
+
+#define RTC_IO_RTC_PAD21_REG          (DR_REG_RTCIO_BASE + 0xD8)
+/* RTC_IO_PAD21_DRV : R/W ;bitpos:[30:29] ;default: 2'd2 ; */
+/*description: DRV.*/
+#define RTC_IO_PAD21_DRV    0x00000003
+#define RTC_IO_PAD21_DRV_M  ((RTC_IO_PAD21_DRV_V)<<(RTC_IO_PAD21_DRV_S))
+#define RTC_IO_PAD21_DRV_V  0x3
+#define RTC_IO_PAD21_DRV_S  29
+/* RTC_IO_PAD21_RDE : R/W ;bitpos:[28] ;default: 1'd1 ; */
+/*description: RDE.*/
+#define RTC_IO_PAD21_RDE    (BIT(28))
+#define RTC_IO_PAD21_RDE_M  (BIT(28))
+#define RTC_IO_PAD21_RDE_V  0x1
+#define RTC_IO_PAD21_RDE_S  28
+/* RTC_IO_PAD21_RUE : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: RUE.*/
+#define RTC_IO_PAD21_RUE    (BIT(27))
+#define RTC_IO_PAD21_RUE_M  (BIT(27))
+#define RTC_IO_PAD21_RUE_V  0x1
+#define RTC_IO_PAD21_RUE_S  27
+/* RTC_IO_PAD21_MUX_SEL : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: 1: use RTC GPIO,0: use digital GPIO.*/
+#define RTC_IO_PAD21_MUX_SEL    (BIT(19))
+#define RTC_IO_PAD21_MUX_SEL_M  (BIT(19))
+#define RTC_IO_PAD21_MUX_SEL_V  0x1
+#define RTC_IO_PAD21_MUX_SEL_S  19
+/* RTC_IO_PAD21_FUN_SEL : R/W ;bitpos:[18:17] ;default: 2'd0 ; */
+/*description: function sel.*/
+#define RTC_IO_PAD21_FUN_SEL    0x00000003
+#define RTC_IO_PAD21_FUN_SEL_M  ((RTC_IO_PAD21_FUN_SEL_V)<<(RTC_IO_PAD21_FUN_SEL_S))
+#define RTC_IO_PAD21_FUN_SEL_V  0x3
+#define RTC_IO_PAD21_FUN_SEL_S  17
+/* RTC_IO_PAD21_SLP_SEL : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: 1: enable sleep mode during sleep,0: no sleep mode.*/
+#define RTC_IO_PAD21_SLP_SEL    (BIT(16))
+#define RTC_IO_PAD21_SLP_SEL_M  (BIT(16))
+#define RTC_IO_PAD21_SLP_SEL_V  0x1
+#define RTC_IO_PAD21_SLP_SEL_S  16
+/* RTC_IO_PAD21_SLP_IE : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: input enable in sleep mode.*/
+#define RTC_IO_PAD21_SLP_IE    (BIT(15))
+#define RTC_IO_PAD21_SLP_IE_M  (BIT(15))
+#define RTC_IO_PAD21_SLP_IE_V  0x1
+#define RTC_IO_PAD21_SLP_IE_S  15
+/* RTC_IO_PAD21_SLP_OE : R/W ;bitpos:[14] ;default: 1'd0 ; */
+/*description: output enable in sleep mode.*/
+#define RTC_IO_PAD21_SLP_OE    (BIT(14))
+#define RTC_IO_PAD21_SLP_OE_M  (BIT(14))
+#define RTC_IO_PAD21_SLP_OE_V  0x1
+#define RTC_IO_PAD21_SLP_OE_S  14
+/* RTC_IO_PAD21_FUN_IE : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: input enable in work mode.*/
+#define RTC_IO_PAD21_FUN_IE    (BIT(13))
+#define RTC_IO_PAD21_FUN_IE_M  (BIT(13))
+#define RTC_IO_PAD21_FUN_IE_V  0x1
+#define RTC_IO_PAD21_FUN_IE_S  13
+
+#define RTC_IO_EXT_WAKEUP0_REG          (DR_REG_RTCIO_BASE + 0xDC)
+/* RTC_IO_EXT_WAKEUP0_SEL : R/W ;bitpos:[31:27] ;default: 5'd0 ; */
+/*description: .*/
+#define RTC_IO_EXT_WAKEUP0_SEL    0x0000001F
+#define RTC_IO_EXT_WAKEUP0_SEL_M  ((RTC_IO_EXT_WAKEUP0_SEL_V)<<(RTC_IO_EXT_WAKEUP0_SEL_S))
+#define RTC_IO_EXT_WAKEUP0_SEL_V  0x1F
+#define RTC_IO_EXT_WAKEUP0_SEL_S  27
+
+#define RTC_IO_XTL_EXT_CTR_REG          (DR_REG_RTCIO_BASE + 0xE0)
+/* RTC_IO_XTL_EXT_CTR_SEL : R/W ;bitpos:[31:27] ;default: 5'd0 ; */
+/*description: select RTC GPIO 0 ~ 17 to control XTAL.*/
+#define RTC_IO_XTL_EXT_CTR_SEL    0x0000001F
+#define RTC_IO_XTL_EXT_CTR_SEL_M  ((RTC_IO_XTL_EXT_CTR_SEL_V)<<(RTC_IO_XTL_EXT_CTR_SEL_S))
+#define RTC_IO_XTL_EXT_CTR_SEL_V  0x1F
+#define RTC_IO_XTL_EXT_CTR_SEL_S  27
+
+#define RTC_IO_SAR_I2C_IO_REG          (DR_REG_RTCIO_BASE + 0xE4)
+/* RTC_IO_SAR_I2C_SDA_SEL : R/W ;bitpos:[31:30] ;default: 2'd0 ; */
+/*description: .*/
+#define RTC_IO_SAR_I2C_SDA_SEL    0x00000003
+#define RTC_IO_SAR_I2C_SDA_SEL_M  ((RTC_IO_SAR_I2C_SDA_SEL_V)<<(RTC_IO_SAR_I2C_SDA_SEL_S))
+#define RTC_IO_SAR_I2C_SDA_SEL_V  0x3
+#define RTC_IO_SAR_I2C_SDA_SEL_S  30
+/* RTC_IO_SAR_I2C_SCL_SEL : R/W ;bitpos:[29:28] ;default: 2'd0 ; */
+/*description: .*/
+#define RTC_IO_SAR_I2C_SCL_SEL    0x00000003
+#define RTC_IO_SAR_I2C_SCL_SEL_M  ((RTC_IO_SAR_I2C_SCL_SEL_V)<<(RTC_IO_SAR_I2C_SCL_SEL_S))
+#define RTC_IO_SAR_I2C_SCL_SEL_V  0x3
+#define RTC_IO_SAR_I2C_SCL_SEL_S  28
+/* RTC_IO_SAR_DEBUG_BIT_SEL : R/W ;bitpos:[27:23] ;default: 5'h0 ; */
+/*description: .*/
+#define RTC_IO_SAR_DEBUG_BIT_SEL    0x0000001F
+#define RTC_IO_SAR_DEBUG_BIT_SEL_M  ((RTC_IO_SAR_DEBUG_BIT_SEL_V)<<(RTC_IO_SAR_DEBUG_BIT_SEL_S))
+#define RTC_IO_SAR_DEBUG_BIT_SEL_V  0x1F
+#define RTC_IO_SAR_DEBUG_BIT_SEL_S  23
+
+#define RTC_IO_TOUCH_CTRL_REG          (DR_REG_RTCIO_BASE + 0xE8)
+/* RTC_IO_IO_TOUCH_BUFMODE : R/W ;bitpos:[4] ;default: 1'd0 ; */
+/*description: BUF_MODE when touch work without fsm.*/
+#define RTC_IO_IO_TOUCH_BUFMODE    (BIT(4))
+#define RTC_IO_IO_TOUCH_BUFMODE_M  (BIT(4))
+#define RTC_IO_IO_TOUCH_BUFMODE_V  0x1
+#define RTC_IO_IO_TOUCH_BUFMODE_S  4
+/* RTC_IO_IO_TOUCH_BUFSEL : R/W ;bitpos:[3:0] ;default: 4'd0 ; */
+/*description: BUF_SEL when touch work without fsm.*/
+#define RTC_IO_IO_TOUCH_BUFSEL    0x0000000F
+#define RTC_IO_IO_TOUCH_BUFSEL_M  ((RTC_IO_IO_TOUCH_BUFSEL_V)<<(RTC_IO_IO_TOUCH_BUFSEL_S))
+#define RTC_IO_IO_TOUCH_BUFSEL_V  0xF
+#define RTC_IO_IO_TOUCH_BUFSEL_S  0
+
+#define RTC_IO_DATE_REG          (DR_REG_RTCIO_BASE + 0x1FC)
+/* RTC_IO_DATE : R/W ;bitpos:[27:0] ;default: 28'h2101180 ; */
+/*description: .*/
+#define RTC_IO_DATE    0x0FFFFFFF
+#define RTC_IO_DATE_M  ((RTC_IO_DATE_V)<<(RTC_IO_DATE_S))
+#define RTC_IO_DATE_V  0xFFFFFFF
+#define RTC_IO_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_RTC_IO_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_struct.h
new file mode 100644
index 00000000000..1154be038b3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/rtc_io_struct.h
@@ -0,0 +1,356 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_RTC_IO_STRUCT_H_
+#define _SOC_RTC_IO_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct rtc_io_dev_s {
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t data                          :    22;  /*RTC GPIO 0 ~ 21 output data*/
+        };
+        uint32_t val;
+    } out;
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t w1ts                          :    22;  /*RTC GPIO 0 ~ 21 output data write 1 to set*/
+        };
+        uint32_t val;
+    } out_w1ts;
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t w1tc                          :    22;  /*RTC GPIO 0 ~ 21 output data write 1 to clear*/
+        };
+        uint32_t val;
+    } out_w1tc;
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t enable                        :    22;  /*RTC GPIO 0 ~ 21 enable*/
+        };
+        uint32_t val;
+    } enable;
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t w1ts                          :    22;  /*RTC GPIO 0 ~ 21 enable write 1 to set*/
+        };
+        uint32_t val;
+    } enable_w1ts;
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t w1tc                          :    22;  /*RTC GPIO 0 ~ 21 enable write 1 to clear*/
+        };
+        uint32_t val;
+    } enable_w1tc;
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t status                        :    22;  /*RTC GPIO 0 ~ 21 interrupt status*/
+        };
+        uint32_t val;
+    } status;
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t w1ts                          :    22;  /*RTC GPIO 0 ~ 21 interrupt status write 1 to set*/
+        };
+        uint32_t val;
+    } status_w1ts;
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t w1tc                          :    22;  /*RTC GPIO 0 ~ 21 interrupt status write 1 to clear*/
+        };
+        uint32_t val;
+    } status_w1tc;
+    union {
+        struct {
+            uint32_t reserved0                     :    10;
+            uint32_t in                            :    22;  /*RTC GPIO input data*/
+        };
+        uint32_t val;
+    } in_val;
+    union {
+        struct {
+            uint32_t reserved0                     :    2;
+            uint32_t pad_driver                    :    1;  /*if set to 0: normal output, if set to 1: open drain*/
+            uint32_t reserved3                     :    4;
+            uint32_t int_type                      :    3;  /*if set to 0: GPIO interrupt disable,  if set to 1: rising edge trigger,  if set to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low level trigger,  if set to 5: high level trigger*/
+            uint32_t wakeup_enable                 :    1;  /*RTC GPIO wakeup enable bit*/
+            uint32_t reserved11                    :    21;
+        };
+        uint32_t val;
+    } pin[22];
+    union {
+        struct {
+            uint32_t sel0                          :    5;
+            uint32_t sel1                          :    5;
+            uint32_t sel2                          :    5;
+            uint32_t sel3                          :    5;
+            uint32_t sel4                          :    5;
+            uint32_t no_gating_12m                 :    1;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } debug_sel;
+    union {
+        struct {
+            uint32_t reserved0                     :    13;
+            uint32_t fun_ie                        :    1;  /*input enable in work mode*/
+            uint32_t slp_oe                        :    1;  /*output enable in sleep mode*/
+            uint32_t slp_ie                        :    1;  /*input enable in sleep mode*/
+            uint32_t slp_sel                       :    1;  /*1: enable sleep mode during sleep,0: no sleep mode*/
+            uint32_t fun_sel                       :    2;  /*function sel*/
+            uint32_t mux_sel                       :    1;  /*1: use RTC GPIO,0: use digital GPIO*/
+            uint32_t xpd                           :    1;  /*TOUCH_XPD*/
+            uint32_t tie_opt                       :    1;  /*TOUCH_TIE_OPT*/
+            uint32_t start                         :    1;  /*TOUCH_START*/
+            uint32_t reserved23                    :    4;
+            uint32_t rue                           :    1;  /*RUE*/
+            uint32_t rde                           :    1;  /*RDE*/
+            uint32_t drv                           :    2;  /*DRV*/
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } touch_pad[15];
+    union {
+        struct {
+            uint32_t reserved0                     :    13;
+            uint32_t x32p_fun_ie                   :    1;  /*input enable in work mode*/
+            uint32_t x32p_slp_oe                   :    1;  /*output enable in sleep mode*/
+            uint32_t x32p_slp_ie                   :    1;  /*input enable in sleep mode*/
+            uint32_t x32p_slp_sel                  :    1;  /*1: enable sleep mode during sleep,0: no sleep mode*/
+            uint32_t x32p_fun_sel                  :    2;  /*function sel*/
+            uint32_t x32p_mux_sel                  :    1;  /*1: use RTC GPIO,0: use digital GPIO*/
+            uint32_t reserved20                    :    7;
+            uint32_t x32p_rue                      :    1;  /*RUE*/
+            uint32_t x32p_rde                      :    1;  /*RDE*/
+            uint32_t x32p_drv                      :    2;  /*DRV*/
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } xtal_32p_pad;
+    union {
+        struct {
+            uint32_t reserved0                     :    13;
+            uint32_t x32n_fun_ie                   :    1;  /*input enable in work mode*/
+            uint32_t x32n_slp_oe                   :    1;  /*output enable in sleep mode*/
+            uint32_t x32n_slp_ie                   :    1;  /*input enable in sleep mode*/
+            uint32_t x32n_slp_sel                  :    1;  /*1: enable sleep mode during sleep,0: no sleep mode*/
+            uint32_t x32n_fun_sel                  :    2;  /*function sel*/
+            uint32_t x32n_mux_sel                  :    1;  /*1: use RTC GPIO,0: use digital GPIO*/
+            uint32_t reserved20                    :    7;
+            uint32_t x32n_rue                      :    1;  /*RUE*/
+            uint32_t x32n_rde                      :    1;  /*RDE*/
+            uint32_t x32n_drv                      :    2;  /*DRV*/
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } xtal_32n_pad;
+    union {
+        struct {
+            uint32_t reserved0                     :    3;
+            uint32_t dac                           :    8;  /*PDAC1_DAC*/
+            uint32_t xpd_dac                       :    1;  /*PDAC1_XPD_DAC*/
+            uint32_t dac_xpd_force                 :    1;  /*1: use reg_pdac1_xpd_dac to control PDAC1_XPD_DAC,0: use SAR ADC FSM to control PDAC1_XPD_DAC*/
+            uint32_t fun_ie                        :    1;  /*input enable in work mode*/
+            uint32_t slp_oe                        :    1;  /*output enable in sleep mode*/
+            uint32_t slp_ie                        :    1;  /*input enable in sleep mode*/
+            uint32_t slp_sel                       :    1;  /*1: enable sleep mode during sleep,0: no sleep mode*/
+            uint32_t fun_sel                       :    2;  /*PDAC1 function sel*/
+            uint32_t mux_sel                       :    1;  /*1: use RTC GPIO,0: use digital GPIO*/
+            uint32_t reserved20                    :    7;
+            uint32_t rue                           :    1;  /*PDAC1_RUE*/
+            uint32_t rde                           :    1;  /*PDAC1_RDE*/
+            uint32_t drv                           :    2;  /*PDAC1_DRV*/
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } pad_dac[2];
+    union {
+        struct {
+            uint32_t reserved0                     :    13;
+            uint32_t rtc_pad19_fun_ie              :    1;  /*input enable in work mode*/
+            uint32_t rtc_pad19_slp_oe              :    1;  /*output enable in sleep mode*/
+            uint32_t rtc_pad19_slp_ie              :    1;  /*input enable in sleep mode*/
+            uint32_t rtc_pad19_slp_sel             :    1;  /*1: enable sleep mode during sleep,0: no sleep mode*/
+            uint32_t rtc_pad19_fun_sel             :    2;  /*function sel*/
+            uint32_t rtc_pad19_mux_sel             :    1;  /*1: use RTC GPIO,0: use digital GPIO*/
+            uint32_t reserved20                    :    7;
+            uint32_t rtc_pad19_rue                 :    1;  /*RUE*/
+            uint32_t rtc_pad19_rde                 :    1;  /*RDE*/
+            uint32_t rtc_pad19_drv                 :    2;  /*DRV*/
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } rtc_pad19;
+    union {
+        struct {
+            uint32_t reserved0                     :    13;
+            uint32_t rtc_pad20_fun_ie              :    1;  /*input enable in work mode*/
+            uint32_t rtc_pad20_slp_oe              :    1;  /*output enable in sleep mode*/
+            uint32_t rtc_pad20_slp_ie              :    1;  /*input enable in sleep mode*/
+            uint32_t rtc_pad20_slp_sel             :    1;  /*1: enable sleep mode during sleep,0: no sleep mode*/
+            uint32_t rtc_pad20_fun_sel             :    2;  /*function sel*/
+            uint32_t rtc_pad20_mux_sel             :    1;  /*1: use RTC GPIO,0: use digital GPIO*/
+            uint32_t reserved20                    :    7;
+            uint32_t rtc_pad20_rue                 :    1;  /*RUE*/
+            uint32_t rtc_pad20_rde                 :    1;  /*RDE*/
+            uint32_t rtc_pad20_drv                 :    2;  /*DRV*/
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } rtc_pad20;
+    union {
+        struct {
+            uint32_t reserved0                     :    13;
+            uint32_t rtc_pad21_fun_ie              :    1;  /*input enable in work mode*/
+            uint32_t rtc_pad21_slp_oe              :    1;  /*output enable in sleep mode*/
+            uint32_t rtc_pad21_slp_ie              :    1;  /*input enable in sleep mode*/
+            uint32_t rtc_pad21_slp_sel             :    1;  /*1: enable sleep mode during sleep,0: no sleep mode*/
+            uint32_t rtc_pad21_fun_sel             :    2;  /*function sel*/
+            uint32_t rtc_pad21_mux_sel             :    1;  /*1: use RTC GPIO,0: use digital GPIO*/
+            uint32_t reserved20                    :    7;
+            uint32_t rtc_pad21_rue                 :    1;  /*RUE*/
+            uint32_t rtc_pad21_rde                 :    1;  /*RDE*/
+            uint32_t rtc_pad21_drv                 :    2;  /*DRV*/
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } rtc_pad21;
+    union {
+        struct {
+            uint32_t reserved0                     :    27;
+            uint32_t sel                           :    5;
+        };
+        uint32_t val;
+    } ext_wakeup0;
+    union {
+        struct {
+            uint32_t reserved0                     :    27;
+            uint32_t sel                           :    5;  /*select RTC GPIO 0 ~ 17 to control XTAL*/
+        };
+        uint32_t val;
+    } xtl_ext_ctr;
+    union {
+        struct {
+            uint32_t reserved0                     :    23;
+            uint32_t debug_bit_sel                 :    5;
+            uint32_t scl_sel                       :    2;
+            uint32_t sda_sel                       :    2;
+        };
+        uint32_t val;
+    } sar_i2c_io;
+    union {
+        struct {
+            uint32_t io_touch_bufsel               :    4;  /*BUF_SEL when touch work without fsm*/
+            uint32_t io_touch_bufmode              :    1;  /*BUF_MODE when touch work without fsm*/
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } touch_ctrl;
+    uint32_t reserved_ec;
+    uint32_t reserved_f0;
+    uint32_t reserved_f4;
+    uint32_t reserved_f8;
+    uint32_t reserved_fc;
+    uint32_t reserved_100;
+    uint32_t reserved_104;
+    uint32_t reserved_108;
+    uint32_t reserved_10c;
+    uint32_t reserved_110;
+    uint32_t reserved_114;
+    uint32_t reserved_118;
+    uint32_t reserved_11c;
+    uint32_t reserved_120;
+    uint32_t reserved_124;
+    uint32_t reserved_128;
+    uint32_t reserved_12c;
+    uint32_t reserved_130;
+    uint32_t reserved_134;
+    uint32_t reserved_138;
+    uint32_t reserved_13c;
+    uint32_t reserved_140;
+    uint32_t reserved_144;
+    uint32_t reserved_148;
+    uint32_t reserved_14c;
+    uint32_t reserved_150;
+    uint32_t reserved_154;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    union {
+        struct {
+            uint32_t date                          :    28;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } date;
+} rtc_io_dev_t;
+extern rtc_io_dev_t RTCIO;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_RTC_IO_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdio_slave_pins.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdio_slave_pins.h
new file mode 100644
index 00000000000..b30b65adf86
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdio_slave_pins.h
@@ -0,0 +1,31 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CLK  6
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CMD  11
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D0   7
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D1   8
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D2   9
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D3   10
+#define SDIO_SLAVE_SLOT0_FUNC               0
+
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CLK  14
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CMD  15
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D0   2
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D1   4
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2   12
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D3   13
+#define SDIO_SLAVE_SLOT1_FUNC               4
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdmmc_pins.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdmmc_pins.h
new file mode 100644
index 00000000000..107bbf94ad3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdmmc_pins.h
@@ -0,0 +1,19 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/* SDMMC pins on ESP32-S3 are configurable through GPIO matrix.
+ * This file is kept for compatibility only.
+ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdmmc_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdmmc_reg.h
new file mode 100644
index 00000000000..41c191eb68f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdmmc_reg.h
@@ -0,0 +1,94 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "soc.h"
+
+#define SDMMC_CTRL_REG          (DR_REG_SDMMC_BASE + 0x00)
+#define SDMMC_PWREN_REG         (DR_REG_SDMMC_BASE + 0x04)
+#define SDMMC_CLKDIV_REG        (DR_REG_SDMMC_BASE + 0x08)
+#define SDMMC_CLKSRC_REG        (DR_REG_SDMMC_BASE + 0x0c)
+#define SDMMC_CLKENA_REG        (DR_REG_SDMMC_BASE + 0x10)
+#define SDMMC_TMOUT_REG         (DR_REG_SDMMC_BASE + 0x14)
+#define SDMMC_CTYPE_REG         (DR_REG_SDMMC_BASE + 0x18)
+#define SDMMC_BLKSIZ_REG        (DR_REG_SDMMC_BASE + 0x1c)
+#define SDMMC_BYTCNT_REG        (DR_REG_SDMMC_BASE + 0x20)
+#define SDMMC_INTMASK_REG       (DR_REG_SDMMC_BASE + 0x24)
+#define SDMMC_CMDARG_REG        (DR_REG_SDMMC_BASE + 0x28)
+#define SDMMC_CMD_REG           (DR_REG_SDMMC_BASE + 0x2c)
+#define SDMMC_RESP0_REG         (DR_REG_SDMMC_BASE + 0x30)
+#define SDMMC_RESP1_REG         (DR_REG_SDMMC_BASE + 0x34)
+#define SDMMC_RESP2_REG         (DR_REG_SDMMC_BASE + 0x38)
+#define SDMMC_RESP3_REG         (DR_REG_SDMMC_BASE + 0x3c)
+
+#define SDMMC_MINTSTS_REG       (DR_REG_SDMMC_BASE + 0x40)
+#define SDMMC_RINTSTS_REG       (DR_REG_SDMMC_BASE + 0x44)
+#define SDMMC_STATUS_REG        (DR_REG_SDMMC_BASE + 0x48)
+#define SDMMC_FIFOTH_REG        (DR_REG_SDMMC_BASE + 0x4c)
+#define SDMMC_CDETECT_REG       (DR_REG_SDMMC_BASE + 0x50)
+#define SDMMC_WRTPRT_REG        (DR_REG_SDMMC_BASE + 0x54)
+#define SDMMC_GPIO_REG          (DR_REG_SDMMC_BASE + 0x58)
+#define SDMMC_TCBCNT_REG        (DR_REG_SDMMC_BASE + 0x5c)
+#define SDMMC_TBBCNT_REG        (DR_REG_SDMMC_BASE + 0x60)
+#define SDMMC_DEBNCE_REG        (DR_REG_SDMMC_BASE + 0x64)
+#define SDMMC_USRID_REG         (DR_REG_SDMMC_BASE + 0x68)
+#define SDMMC_VERID_REG         (DR_REG_SDMMC_BASE + 0x6c)
+#define SDMMC_HCON_REG          (DR_REG_SDMMC_BASE + 0x70)
+#define SDMMC_UHS_REG_REG       (DR_REG_SDMMC_BASE + 0x74)
+#define SDMMC_RST_N_REG         (DR_REG_SDMMC_BASE + 0x78)
+#define SDMMC_BMOD_REG          (DR_REG_SDMMC_BASE + 0x80)
+#define SDMMC_PLDMND_REG        (DR_REG_SDMMC_BASE + 0x84)
+#define SDMMC_DBADDR_REG        (DR_REG_SDMMC_BASE + 0x88)
+#define SDMMC_DBADDRU_REG       (DR_REG_SDMMC_BASE + 0x8c)
+#define SDMMC_IDSTS_REG         (DR_REG_SDMMC_BASE + 0x8c)
+#define SDMMC_IDINTEN_REG       (DR_REG_SDMMC_BASE + 0x90)
+#define SDMMC_DSCADDR_REG       (DR_REG_SDMMC_BASE + 0x94)
+#define SDMMC_DSCADDRL_REG      (DR_REG_SDMMC_BASE + 0x98)
+#define SDMMC_DSCADDRU_REG      (DR_REG_SDMMC_BASE + 0x9c)
+#define SDMMC_BUFADDRL_REG      (DR_REG_SDMMC_BASE + 0xa0)
+#define SDMMC_BUFADDRU_REG      (DR_REG_SDMMC_BASE + 0xa4)
+#define SDMMC_CARDTHRCTL_REG    (DR_REG_SDMMC_BASE + 0x100)
+#define SDMMC_BACK_END_POWER_REG    (DR_REG_SDMMC_BASE + 0x104)
+#define SDMMC_UHS_REG_EXT_REG   (DR_REG_SDMMC_BASE + 0x108)
+#define SDMMC_EMMC_DDR_REG_REG  (DR_REG_SDMMC_BASE + 0x10c)
+#define SDMMC_ENABLE_SHIFT_REG  (DR_REG_SDMMC_BASE + 0x110)
+
+#define SDMMC_CLOCK_REG         (DR_REG_SDMMC_BASE + 0x800)
+
+#define SDMMC_INTMASK_IO_SLOT1  BIT(17)
+#define SDMMC_INTMASK_IO_SLOT0  BIT(16)
+#define SDMMC_INTMASK_EBE       BIT(15)
+#define SDMMC_INTMASK_ACD       BIT(14)
+#define SDMMC_INTMASK_SBE       BIT(13)
+#define SDMMC_INTMASK_HLE       BIT(12)
+#define SDMMC_INTMASK_FRUN      BIT(11)
+#define SDMMC_INTMASK_HTO       BIT(10)
+#define SDMMC_INTMASK_DTO       BIT(9)
+#define SDMMC_INTMASK_RTO       BIT(8)
+#define SDMMC_INTMASK_DCRC      BIT(7)
+#define SDMMC_INTMASK_RCRC      BIT(6)
+#define SDMMC_INTMASK_RXDR      BIT(5)
+#define SDMMC_INTMASK_TXDR      BIT(4)
+#define SDMMC_INTMASK_DATA_OVER BIT(3)
+#define SDMMC_INTMASK_CMD_DONE  BIT(2)
+#define SDMMC_INTMASK_RESP_ERR  BIT(1)
+#define SDMMC_INTMASK_CD        BIT(0)
+
+#define SDMMC_IDMAC_INTMASK_AI  BIT(9)
+#define SDMMC_IDMAC_INTMASK_NI  BIT(8)
+#define SDMMC_IDMAC_INTMASK_CES BIT(5)
+#define SDMMC_IDMAC_INTMASK_DU  BIT(4)
+#define SDMMC_IDMAC_INTMASK_FBE BIT(2)
+#define SDMMC_IDMAC_INTMASK_RI  BIT(1)
+#define SDMMC_IDMAC_INTMASK_TI  BIT(0)
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdmmc_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdmmc_struct.h
new file mode 100644
index 00000000000..599528a34a2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sdmmc_struct.h
@@ -0,0 +1,399 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdint.h>
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct sdmmc_desc_s {
+    struct {
+        uint32_t reserved1: 1;
+        uint32_t disable_int_on_completion: 1;
+        uint32_t last_descriptor: 1;
+        uint32_t first_descriptor: 1;
+        uint32_t second_address_chained: 1;
+        uint32_t end_of_ring: 1;
+        uint32_t reserved2: 24;
+        uint32_t card_error_summary: 1;
+        uint32_t owned_by_idmac: 1;
+    };
+    struct {
+        uint32_t buffer1_size: 13;
+        uint32_t buffer2_size: 13;
+        uint32_t reserved3: 6;
+    };
+    void* buffer1_ptr;
+    union {
+        void* buffer2_ptr;
+        void* next_desc_ptr;
+    };
+} sdmmc_desc_t;
+
+#define SDMMC_DMA_MAX_BUF_LEN 4096
+
+_Static_assert(sizeof(sdmmc_desc_t) == 16, "invalid size of sdmmc_desc_t structure");
+
+
+typedef struct sdmmc_hw_cmd_s {
+    uint32_t cmd_index: 6;          ///< Command index
+    uint32_t response_expect: 1;    ///< set if response is expected
+    uint32_t response_long: 1;      ///< 0: short response expected, 1: long response expected
+    uint32_t check_response_crc: 1; ///< set if controller should check response CRC
+    uint32_t data_expected: 1;      ///< 0: no data expected, 1: data expected
+    uint32_t rw: 1;                 ///< 0: read from card, 1: write to card (don't care if no data expected)
+    uint32_t stream_mode: 1;        ///< 0: block transfer, 1: stream transfer (don't care if no data expected)
+    uint32_t send_auto_stop: 1;     ///< set to send stop at the end of the transfer
+    uint32_t wait_complete: 1;      ///< 0: send command at once, 1: wait for previous command to complete
+    uint32_t stop_abort_cmd: 1;     ///< set if this is a stop or abort command intended to stop current transfer
+    uint32_t send_init: 1;          ///< set to send init sequence (80 clocks of 1)
+    uint32_t card_num: 5;           ///< card number
+    uint32_t update_clk_reg: 1;     ///< 0: normal command, 1: don't send command, just update clock registers
+    uint32_t read_ceata: 1;         ///< set if performing read from CE-ATA device
+    uint32_t ccs_expected: 1;       ///< set if CCS is expected from CE-ATA device
+    uint32_t enable_boot: 1;        ///< set for mandatory boot mode
+    uint32_t expect_boot_ack: 1;    ///< when set along with enable_boot, controller expects boot ack pattern
+    uint32_t disable_boot: 1;       ///< set to terminate boot operation (don't set along with enable_boot)
+    uint32_t boot_mode: 1;          ///< 0: mandatory boot operation, 1: alternate boot operation
+    uint32_t volt_switch: 1;        ///< set to enable voltage switching (for CMD11 only)
+    uint32_t use_hold_reg: 1;       ///< clear to bypass HOLD register
+    uint32_t reserved: 1;
+    uint32_t start_command: 1;      ///< Start command; once command is sent to the card, bit is cleared.
+} sdmmc_hw_cmd_t;  ///< command format used in cmd register; this structure is defined to make it easier to build command values
+
+_Static_assert(sizeof(sdmmc_hw_cmd_t) == 4, "invalid size of sdmmc_cmd_t structure");
+
+
+typedef volatile struct sdmmc_dev_s {
+    union {
+        struct {
+            uint32_t controller_reset: 1;
+            uint32_t fifo_reset: 1;
+            uint32_t dma_reset: 1;
+            uint32_t reserved1: 1;
+            uint32_t int_enable: 1;
+            uint32_t dma_enable: 1;
+            uint32_t read_wait: 1;
+            uint32_t send_irq_response: 1;
+            uint32_t abort_read_data: 1;
+            uint32_t send_ccsd: 1;
+            uint32_t send_auto_stop_ccsd: 1;
+            uint32_t ceata_device_interrupt_status: 1;
+            uint32_t reserved2: 4;
+            uint32_t card_voltage_a: 4;
+            uint32_t card_voltage_b: 4;
+            uint32_t enable_od_pullup: 1;
+            uint32_t use_internal_dma: 1;
+            uint32_t reserved3: 6;
+        };
+        uint32_t val;
+    } ctrl;
+
+    uint32_t pwren;             ///< 1: enable power to card, 0: disable power to card
+
+    union {
+        struct {
+            uint32_t div0: 8;   ///< 0: bypass, 1-255: divide clock by (2*div0).
+            uint32_t div1: 8;   ///< 0: bypass, 1-255: divide clock by (2*div0).
+            uint32_t div2: 8;   ///< 0: bypass, 1-255: divide clock by (2*div0).
+            uint32_t div3: 8;   ///< 0: bypass, 1-255: divide clock by (2*div0).
+        };
+        uint32_t val;
+    } clkdiv;
+
+    union {
+        struct {
+            uint32_t card0: 2;            ///< 0-3: select clock divider for card 0 among div0-div3
+            uint32_t card1: 2;            ///< 0-3: select clock divider for card 1 among div0-div3
+            uint32_t reserved: 28;
+        };
+        uint32_t val;
+    } clksrc;
+
+    union {
+        struct {
+            uint32_t cclk_enable: 16;       ///< 1: enable clock to card, 0: disable clock
+            uint32_t cclk_low_power: 16;    ///< 1: enable clock gating when card is idle, 0: disable clock gating
+        };
+        uint32_t val;
+    } clkena;
+
+    union {
+        struct {
+            uint32_t response: 8;       ///< response timeout, in card output clock cycles
+            uint32_t data: 24;          ///< data read timeout, in card output clock cycles
+        };
+        uint32_t val;
+    } tmout;
+
+    union {
+        struct {
+            uint32_t card_width: 16;    ///< one bit for each card: 0: 1-bit mode, 1: 4-bit mode
+            uint32_t card_width_8: 16;  ///< one bit for each card: 0: not 8-bit mode (corresponding card_width bit is used), 1: 8-bit mode (card_width bit is ignored)
+        };
+        uint32_t val;
+    } ctype;
+
+    struct {
+        uint32_t blksiz: 16;        ///< block size, default 0x200
+        uint32_t reserved: 16;
+    };
+
+    uint32_t bytcnt;            ///< number of bytes to be transferred
+
+    union {
+        struct {
+            uint32_t cd: 1;             ///< Card detect interrupt enable
+            uint32_t re: 1;             ///< Response error interrupt enable
+            uint32_t cmd_done: 1;       ///< Command done interrupt enable
+            uint32_t dto: 1;            ///< Data transfer over interrupt enable
+            uint32_t txdr: 1;           ///< Transmit FIFO data request interrupt enable
+            uint32_t rxdr: 1;           ///< Receive FIFO data request interrupt enable
+            uint32_t rcrc: 1;           ///< Response CRC error interrupt enable
+            uint32_t dcrc: 1;           ///< Data CRC error interrupt enable
+            uint32_t rto: 1;            ///< Response timeout interrupt enable
+            uint32_t drto: 1;           ///< Data read timeout interrupt enable
+            uint32_t hto: 1;            ///< Data starvation-by-host timeout interrupt enable
+            uint32_t frun: 1;           ///< FIFO underrun/overrun error interrupt enable
+            uint32_t hle: 1;            ///< Hardware locked write error interrupt enable
+            uint32_t sbi_bci: 1;        ///< Start bit error / busy clear interrupt enable
+            uint32_t acd: 1;            ///< Auto command done interrupt enable
+            uint32_t ebe: 1;            ///< End bit error / write no CRC interrupt enable
+            uint32_t sdio: 16;          ///< SDIO interrupt enable
+        };
+        uint32_t val;
+    } intmask;
+
+    uint32_t cmdarg;        ///< Command argument to be passed to card
+
+    sdmmc_hw_cmd_t cmd;
+
+    uint32_t resp[4];           ///< Response from card
+
+    union {
+        struct {
+            uint32_t cd: 1;             ///< Card detect interrupt masked status
+            uint32_t re: 1;             ///< Response error interrupt masked status
+            uint32_t cmd_done: 1;       ///< Command done interrupt masked status
+            uint32_t dto: 1;            ///< Data transfer over interrupt masked status
+            uint32_t txdr: 1;           ///< Transmit FIFO data request interrupt masked status
+            uint32_t rxdr: 1;           ///< Receive FIFO data request interrupt masked status
+            uint32_t rcrc: 1;           ///< Response CRC error interrupt masked status
+            uint32_t dcrc: 1;           ///< Data CRC error interrupt masked status
+            uint32_t rto: 1;            ///< Response timeout interrupt masked status
+            uint32_t drto: 1;           ///< Data read timeout interrupt masked status
+            uint32_t hto: 1;            ///< Data starvation-by-host timeout interrupt masked status
+            uint32_t frun: 1;           ///< FIFO underrun/overrun error interrupt masked status
+            uint32_t hle: 1;            ///< Hardware locked write error interrupt masked status
+            uint32_t sbi_bci: 1;        ///< Start bit error / busy clear interrupt masked status
+            uint32_t acd: 1;            ///< Auto command done interrupt masked status
+            uint32_t ebe: 1;            ///< End bit error / write no CRC interrupt masked status
+            uint32_t sdio: 16;          ///< SDIO interrupt masked status
+        };
+        uint32_t val;
+    } mintsts;
+
+    union {
+        struct {
+            uint32_t cd: 1;             ///< Card detect raw interrupt status
+            uint32_t re: 1;             ///< Response error raw interrupt status
+            uint32_t cmd_done: 1;       ///< Command done raw interrupt status
+            uint32_t dto: 1;            ///< Data transfer over raw interrupt status
+            uint32_t txdr: 1;           ///< Transmit FIFO data request raw interrupt status
+            uint32_t rxdr: 1;           ///< Receive FIFO data request raw interrupt status
+            uint32_t rcrc: 1;           ///< Response CRC error raw interrupt status
+            uint32_t dcrc: 1;           ///< Data CRC error raw interrupt status
+            uint32_t rto: 1;            ///< Response timeout raw interrupt status
+            uint32_t drto: 1;           ///< Data read timeout raw interrupt status
+            uint32_t hto: 1;            ///< Data starvation-by-host timeout raw interrupt status
+            uint32_t frun: 1;           ///< FIFO underrun/overrun error raw interrupt status
+            uint32_t hle: 1;            ///< Hardware locked write error raw interrupt status
+            uint32_t sbi_bci: 1;        ///< Start bit error / busy clear raw interrupt status
+            uint32_t acd: 1;            ///< Auto command done raw interrupt status
+            uint32_t ebe: 1;            ///< End bit error / write no CRC raw interrupt status
+            uint32_t sdio: 16;          ///< SDIO raw interrupt status
+        };
+        uint32_t val;
+    } rintsts;                          ///< interrupts can be cleared by writing this register
+
+    union {
+        struct {
+            uint32_t fifo_rx_watermark: 1;  ///< FIFO reached receive watermark level
+            uint32_t fifo_tx_watermark: 1;  ///< FIFO reached transmit watermark level
+            uint32_t fifo_empty: 1;         ///< FIFO is empty
+            uint32_t fifo_full: 1;          ///< FIFO is full
+            uint32_t cmd_fsm_state: 4;      ///< command FSM state
+            uint32_t data3_status: 1;       ///< this bit reads 1 if card is present
+            uint32_t data_busy: 1;          ///< this bit reads 1 if card is busy
+            uint32_t data_fsm_busy: 1;      ///< this bit reads 1 if transmit/receive FSM is busy
+            uint32_t response_index: 6;     ///< index of the previous response
+            uint32_t fifo_count: 13;        ///< number of filled locations in the FIFO
+            uint32_t dma_ack: 1;            ///< DMA acknowledge signal
+            uint32_t dma_req: 1;            ///< DMA request signal
+        };
+        uint32_t val;
+    } status;
+
+    union {
+        struct {
+            uint32_t tx_watermark: 12;      ///< FIFO TX watermark level
+            uint32_t reserved1: 4;
+            uint32_t rx_watermark: 12;      ///< FIFO RX watermark level
+            uint32_t dw_dma_mts: 3;
+            uint32_t reserved2: 1;
+        };
+        uint32_t val;
+    } fifoth;
+
+    union {
+        struct {
+            uint32_t cards: 2;              ///< bit N reads 0 if card N is present
+            uint32_t reserved: 30;
+        };
+        uint32_t val;
+    } cdetect;
+
+    union {
+        struct {
+            uint32_t cards: 2;              ///< bit N reads 1 if card N is write protected
+            uint32_t reserved: 30;
+        };
+        uint32_t val;
+    } wrtprt;
+
+    uint32_t gpio;      ///< unused
+    uint32_t tcbcnt;    ///< transferred (to card) byte count
+    uint32_t tbbcnt;    ///< transferred from host to FIFO byte count
+
+    union {
+        struct {
+            uint32_t debounce_count: 24;    ///< number of host cycles used by debounce filter, typical time should be 5-25ms
+            uint32_t reserved: 8;
+        };
+    } debnce;
+
+    uint32_t usrid;     ///< user ID
+    uint32_t verid;     ///< IP block version
+    uint32_t hcon;      ///< compile-time IP configuration
+    union {
+        struct {
+            uint32_t voltage: 16;           ///< voltage control for slots; no-op on ESP32.
+            uint32_t ddr: 16;                ///< bit N enables DDR mode for card N
+        };
+    } uhs;              ///< UHS related settings
+
+    union {
+        struct {
+            uint32_t cards: 2;          ///< bit N resets card N, active low
+            uint32_t reserved: 30;
+        };
+    } rst_n;
+
+    uint32_t reserved_7c;
+
+    union {
+        struct {
+            uint32_t sw_reset: 1;       ///< set to reset DMA controller
+            uint32_t fb: 1;             ///< set if AHB master performs fixed burst transfers
+            uint32_t dsl: 5;            ///< descriptor skip length: number of words to skip between two unchained descriptors
+            uint32_t enable: 1;         ///< set to enable IDMAC
+            uint32_t pbl: 3;            ///< programmable burst length
+            uint32_t reserved: 21;
+        };
+        uint32_t val;
+    } bmod;
+
+    uint32_t pldmnd;                    ///< set any bit to resume IDMAC FSM from suspended state
+    sdmmc_desc_t* dbaddr;        ///< descriptor list base
+
+    union {
+        struct {
+            uint32_t ti: 1;         ///< transmit interrupt status
+            uint32_t ri: 1;         ///< receive interrupt status
+            uint32_t fbe: 1;        ///< fatal bus error
+            uint32_t reserved1: 1;
+            uint32_t du: 1;         ///< descriptor unavailable
+            uint32_t ces: 1;        ///< card error summary
+            uint32_t reserved2: 2;
+            uint32_t nis: 1;        ///< normal interrupt summary
+            uint32_t ais: 1;        ///< abnormal interrupt summary
+            uint32_t fbe_code: 3;   ///< code of fatal bus error
+            uint32_t fsm: 4;        ///< DMAC FSM state
+            uint32_t reserved3: 15;
+        };
+        uint32_t val;
+    } idsts;
+
+    union {
+        struct {
+            uint32_t ti: 1;         ///< transmit interrupt enable
+            uint32_t ri: 1;         ///< receive interrupt enable
+            uint32_t fbe: 1;        ///< fatal bus error interrupt enable
+            uint32_t reserved1: 1;
+            uint32_t du: 1;         ///< descriptor unavailable interrupt enable
+            uint32_t ces: 1;        ///< card error interrupt enable
+            uint32_t reserved2: 2;
+            uint32_t ni: 1;         ///< normal interrupt interrupt enable
+            uint32_t ai: 1;         ///< abnormal interrupt enable
+            uint32_t reserved3: 22;
+        };
+        uint32_t val;
+    } idinten;
+
+    uint32_t dscaddr;       ///< current host descriptor address
+    uint32_t dscaddrl;      ///< unused
+    uint32_t dscaddru;      ///< unused
+    uint32_t bufaddrl;      ///< unused
+    uint32_t bufaddru;      ///< unused
+    uint32_t reserved_a8[22];
+    union {
+        struct {
+            uint32_t read_thr_en : 1;       ///< initiate transfer only if FIFO has more space than the read threshold
+            uint32_t busy_clr_int_en : 1;   ///< enable generation of busy clear interrupts
+            uint32_t write_thr_en : 1;      ///< equivalent of read_thr_en for writes
+            uint32_t reserved1 : 13;
+            uint32_t card_threshold : 16;   ///< threshold value for reads/writes, in bytes
+        };
+        uint32_t val;
+    } cardthrctl;
+    uint32_t back_end_power;
+    uint32_t uhs_reg_ext;
+    uint32_t emmc_ddr_reg;
+    uint32_t enable_shift;
+    uint32_t reserved_114[443];
+    union {
+        struct {
+            uint32_t phase_dout: 3;         ///< phase of data output clock (0x0: 0, 0x1: 90, 0x4: 180, 0x6: 270)
+            uint32_t phase_din: 3;          ///< phase of data input clock
+            uint32_t phase_core: 3;         ///< phase of the clock to SDMMC peripheral
+            uint32_t div_factor_p: 4;       ///< controls clock period; it will be (div_factor_p + 1) / 160MHz
+            uint32_t div_factor_h: 4;       ///< controls length of high pulse; it will be (div_factor_h + 1) / 160MHz
+            uint32_t div_factor_m: 4;       ///< should be equal to div_factor_p
+            uint32_t reserved1 : 2;
+            uint32_t clk_sel : 1;           ///< clock source select (0: XTAL, 1: 160 MHz from PLL)
+            uint32_t reserved24: 8;
+        };
+        uint32_t val;
+    } clock;
+} sdmmc_dev_t;
+extern sdmmc_dev_t SDMMC;
+
+_Static_assert(sizeof(sdmmc_dev_t) == 0x804, "invalid size of sdmmc_dev_t structure");
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sens_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sens_reg.h
new file mode 100644
index 00000000000..666f3a9c128
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sens_reg.h
@@ -0,0 +1,1638 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_SENS_REG_H_
+#define _SOC_SENS_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SENS_SAR_READER1_CTRL_REG          (DR_REG_SENS_BASE + 0x0)
+/* SENS_SAR1_INT_EN : R/W ;bitpos:[29] ;default: 1'b1 ; */
+/*description: enable saradc1 to send out interrupt.*/
+#define SENS_SAR1_INT_EN    (BIT(29))
+#define SENS_SAR1_INT_EN_M  (BIT(29))
+#define SENS_SAR1_INT_EN_V  0x1
+#define SENS_SAR1_INT_EN_S  29
+/* SENS_SAR1_DATA_INV : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: Invert SAR ADC1 data.*/
+#define SENS_SAR1_DATA_INV    (BIT(28))
+#define SENS_SAR1_DATA_INV_M  (BIT(28))
+#define SENS_SAR1_DATA_INV_V  0x1
+#define SENS_SAR1_DATA_INV_S  28
+/* SENS_SAR1_SAMPLE_NUM : R/W ;bitpos:[26:19] ;default: 8'd0 ; */
+/*description: .*/
+#define SENS_SAR1_SAMPLE_NUM    0x000000FF
+#define SENS_SAR1_SAMPLE_NUM_M  ((SENS_SAR1_SAMPLE_NUM_V)<<(SENS_SAR1_SAMPLE_NUM_S))
+#define SENS_SAR1_SAMPLE_NUM_V  0xFF
+#define SENS_SAR1_SAMPLE_NUM_S  19
+/* SENS_SAR1_CLK_GATED : R/W ;bitpos:[18] ;default: 1'b1 ; */
+/*description: .*/
+#define SENS_SAR1_CLK_GATED    (BIT(18))
+#define SENS_SAR1_CLK_GATED_M  (BIT(18))
+#define SENS_SAR1_CLK_GATED_V  0x1
+#define SENS_SAR1_CLK_GATED_S  18
+/* SENS_SAR1_CLK_DIV : R/W ;bitpos:[7:0] ;default: 8'd2 ; */
+/*description: clock divider.*/
+#define SENS_SAR1_CLK_DIV    0x000000FF
+#define SENS_SAR1_CLK_DIV_M  ((SENS_SAR1_CLK_DIV_V)<<(SENS_SAR1_CLK_DIV_S))
+#define SENS_SAR1_CLK_DIV_V  0xFF
+#define SENS_SAR1_CLK_DIV_S  0
+
+#define SENS_SAR_READER1_STATUS_REG          (DR_REG_SENS_BASE + 0x4)
+/* SENS_SAR1_READER_STATUS : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define SENS_SAR1_READER_STATUS    0xFFFFFFFF
+#define SENS_SAR1_READER_STATUS_M  ((SENS_SAR1_READER_STATUS_V)<<(SENS_SAR1_READER_STATUS_S))
+#define SENS_SAR1_READER_STATUS_V  0xFFFFFFFF
+#define SENS_SAR1_READER_STATUS_S  0
+
+#define SENS_SAR_MEAS1_CTRL1_REG          (DR_REG_SENS_BASE + 0x8)
+/* SENS_AMP_SHORT_REF_GND_FORCE : R/W ;bitpos:[31:30] ;default: 2'b0 ; */
+/*description: .*/
+#define SENS_AMP_SHORT_REF_GND_FORCE    0x00000003
+#define SENS_AMP_SHORT_REF_GND_FORCE_M  ((SENS_AMP_SHORT_REF_GND_FORCE_V)<<(SENS_AMP_SHORT_REF_GND_FORCE_S))
+#define SENS_AMP_SHORT_REF_GND_FORCE_V  0x3
+#define SENS_AMP_SHORT_REF_GND_FORCE_S  30
+/* SENS_AMP_SHORT_REF_FORCE : R/W ;bitpos:[29:28] ;default: 2'b0 ; */
+/*description: .*/
+#define SENS_AMP_SHORT_REF_FORCE    0x00000003
+#define SENS_AMP_SHORT_REF_FORCE_M  ((SENS_AMP_SHORT_REF_FORCE_V)<<(SENS_AMP_SHORT_REF_FORCE_S))
+#define SENS_AMP_SHORT_REF_FORCE_V  0x3
+#define SENS_AMP_SHORT_REF_FORCE_S  28
+/* SENS_AMP_RST_FB_FORCE : R/W ;bitpos:[27:26] ;default: 2'b0 ; */
+/*description: .*/
+#define SENS_AMP_RST_FB_FORCE    0x00000003
+#define SENS_AMP_RST_FB_FORCE_M  ((SENS_AMP_RST_FB_FORCE_V)<<(SENS_AMP_RST_FB_FORCE_S))
+#define SENS_AMP_RST_FB_FORCE_V  0x3
+#define SENS_AMP_RST_FB_FORCE_S  26
+/* SENS_FORCE_XPD_AMP : R/W ;bitpos:[25:24] ;default: 2'd0 ; */
+/*description: .*/
+#define SENS_FORCE_XPD_AMP    0x00000003
+#define SENS_FORCE_XPD_AMP_M  ((SENS_FORCE_XPD_AMP_V)<<(SENS_FORCE_XPD_AMP_S))
+#define SENS_FORCE_XPD_AMP_V  0x3
+#define SENS_FORCE_XPD_AMP_S  24
+
+#define SENS_SAR_MEAS1_CTRL2_REG          (DR_REG_SENS_BASE + 0xC)
+/* SENS_SAR1_EN_PAD_FORCE : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: 1: SAR ADC1 pad enable bitmap is controlled by SW.*/
+#define SENS_SAR1_EN_PAD_FORCE    (BIT(31))
+#define SENS_SAR1_EN_PAD_FORCE_M  (BIT(31))
+#define SENS_SAR1_EN_PAD_FORCE_V  0x1
+#define SENS_SAR1_EN_PAD_FORCE_S  31
+/* SENS_SAR1_EN_PAD : R/W ;bitpos:[30:19] ;default: 12'b0 ; */
+/*description: SAR ADC1 pad enable bitmap.*/
+#define SENS_SAR1_EN_PAD    0x00000FFF
+#define SENS_SAR1_EN_PAD_M  ((SENS_SAR1_EN_PAD_V)<<(SENS_SAR1_EN_PAD_S))
+#define SENS_SAR1_EN_PAD_V  0xFFF
+#define SENS_SAR1_EN_PAD_S  19
+/* SENS_MEAS1_START_FORCE : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: 1: SAR ADC1 controller (in RTC) is started by SW.*/
+#define SENS_MEAS1_START_FORCE    (BIT(18))
+#define SENS_MEAS1_START_FORCE_M  (BIT(18))
+#define SENS_MEAS1_START_FORCE_V  0x1
+#define SENS_MEAS1_START_FORCE_S  18
+/* SENS_MEAS1_START_SAR : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: SAR ADC1 controller (in RTC) starts conversion.*/
+#define SENS_MEAS1_START_SAR    (BIT(17))
+#define SENS_MEAS1_START_SAR_M  (BIT(17))
+#define SENS_MEAS1_START_SAR_V  0x1
+#define SENS_MEAS1_START_SAR_S  17
+/* SENS_MEAS1_DONE_SAR : RO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: SAR ADC1 conversion done indication.*/
+#define SENS_MEAS1_DONE_SAR    (BIT(16))
+#define SENS_MEAS1_DONE_SAR_M  (BIT(16))
+#define SENS_MEAS1_DONE_SAR_V  0x1
+#define SENS_MEAS1_DONE_SAR_S  16
+/* SENS_MEAS1_DATA_SAR : RO ;bitpos:[15:0] ;default: 16'b0 ; */
+/*description: SAR ADC1 data.*/
+#define SENS_MEAS1_DATA_SAR    0x0000FFFF
+#define SENS_MEAS1_DATA_SAR_M  ((SENS_MEAS1_DATA_SAR_V)<<(SENS_MEAS1_DATA_SAR_S))
+#define SENS_MEAS1_DATA_SAR_V  0xFFFF
+#define SENS_MEAS1_DATA_SAR_S  0
+
+#define SENS_SAR_MEAS1_MUX_REG          (DR_REG_SENS_BASE + 0x10)
+/* SENS_SAR1_DIG_FORCE : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: 1: SAR ADC1 controlled by DIG ADC1 CTRL.*/
+#define SENS_SAR1_DIG_FORCE    (BIT(31))
+#define SENS_SAR1_DIG_FORCE_M  (BIT(31))
+#define SENS_SAR1_DIG_FORCE_V  0x1
+#define SENS_SAR1_DIG_FORCE_S  31
+
+#define SENS_SAR_ATTEN1_REG          (DR_REG_SENS_BASE + 0x14)
+/* SENS_SAR1_ATTEN : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: 2-bit attenuation for each pad.*/
+#define SENS_SAR1_ATTEN    0xFFFFFFFF
+#define SENS_SAR1_ATTEN_M  ((SENS_SAR1_ATTEN_V)<<(SENS_SAR1_ATTEN_S))
+#define SENS_SAR1_ATTEN_V  0xFFFFFFFF
+#define SENS_SAR1_ATTEN_S  0
+
+#define SENS_SAR_AMP_CTRL1_REG          (DR_REG_SENS_BASE + 0x18)
+/* SENS_SAR_AMP_WAIT2 : R/W ;bitpos:[31:16] ;default: 16'd10 ; */
+/*description: .*/
+#define SENS_SAR_AMP_WAIT2    0x0000FFFF
+#define SENS_SAR_AMP_WAIT2_M  ((SENS_SAR_AMP_WAIT2_V)<<(SENS_SAR_AMP_WAIT2_S))
+#define SENS_SAR_AMP_WAIT2_V  0xFFFF
+#define SENS_SAR_AMP_WAIT2_S  16
+/* SENS_SAR_AMP_WAIT1 : R/W ;bitpos:[15:0] ;default: 16'd10 ; */
+/*description: .*/
+#define SENS_SAR_AMP_WAIT1    0x0000FFFF
+#define SENS_SAR_AMP_WAIT1_M  ((SENS_SAR_AMP_WAIT1_V)<<(SENS_SAR_AMP_WAIT1_S))
+#define SENS_SAR_AMP_WAIT1_V  0xFFFF
+#define SENS_SAR_AMP_WAIT1_S  0
+
+#define SENS_SAR_AMP_CTRL2_REG          (DR_REG_SENS_BASE + 0x1C)
+/* SENS_SAR_AMP_WAIT3 : R/W ;bitpos:[31:16] ;default: 16'd10 ; */
+/*description: .*/
+#define SENS_SAR_AMP_WAIT3    0x0000FFFF
+#define SENS_SAR_AMP_WAIT3_M  ((SENS_SAR_AMP_WAIT3_V)<<(SENS_SAR_AMP_WAIT3_S))
+#define SENS_SAR_AMP_WAIT3_V  0xFFFF
+#define SENS_SAR_AMP_WAIT3_S  16
+/* SENS_SAR_RSTB_FSM_IDLE : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_SAR_RSTB_FSM_IDLE    (BIT(6))
+#define SENS_SAR_RSTB_FSM_IDLE_M  (BIT(6))
+#define SENS_SAR_RSTB_FSM_IDLE_V  0x1
+#define SENS_SAR_RSTB_FSM_IDLE_S  6
+/* SENS_XPD_SAR_FSM_IDLE : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_XPD_SAR_FSM_IDLE    (BIT(5))
+#define SENS_XPD_SAR_FSM_IDLE_M  (BIT(5))
+#define SENS_XPD_SAR_FSM_IDLE_V  0x1
+#define SENS_XPD_SAR_FSM_IDLE_S  5
+/* SENS_AMP_SHORT_REF_GND_FSM_IDLE : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_AMP_SHORT_REF_GND_FSM_IDLE    (BIT(4))
+#define SENS_AMP_SHORT_REF_GND_FSM_IDLE_M  (BIT(4))
+#define SENS_AMP_SHORT_REF_GND_FSM_IDLE_V  0x1
+#define SENS_AMP_SHORT_REF_GND_FSM_IDLE_S  4
+/* SENS_AMP_SHORT_REF_FSM_IDLE : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_AMP_SHORT_REF_FSM_IDLE    (BIT(3))
+#define SENS_AMP_SHORT_REF_FSM_IDLE_M  (BIT(3))
+#define SENS_AMP_SHORT_REF_FSM_IDLE_V  0x1
+#define SENS_AMP_SHORT_REF_FSM_IDLE_S  3
+/* SENS_AMP_RST_FB_FSM_IDLE : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_AMP_RST_FB_FSM_IDLE    (BIT(2))
+#define SENS_AMP_RST_FB_FSM_IDLE_M  (BIT(2))
+#define SENS_AMP_RST_FB_FSM_IDLE_V  0x1
+#define SENS_AMP_RST_FB_FSM_IDLE_S  2
+/* SENS_XPD_SAR_AMP_FSM_IDLE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_XPD_SAR_AMP_FSM_IDLE    (BIT(1))
+#define SENS_XPD_SAR_AMP_FSM_IDLE_M  (BIT(1))
+#define SENS_XPD_SAR_AMP_FSM_IDLE_V  0x1
+#define SENS_XPD_SAR_AMP_FSM_IDLE_S  1
+/* SENS_SAR1_DAC_XPD_FSM_IDLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_SAR1_DAC_XPD_FSM_IDLE    (BIT(0))
+#define SENS_SAR1_DAC_XPD_FSM_IDLE_M  (BIT(0))
+#define SENS_SAR1_DAC_XPD_FSM_IDLE_V  0x1
+#define SENS_SAR1_DAC_XPD_FSM_IDLE_S  0
+
+#define SENS_SAR_AMP_CTRL3_REG          (DR_REG_SENS_BASE + 0x20)
+/* SENS_SAR_RSTB_FSM : R/W ;bitpos:[27:24] ;default: 4'b0000 ; */
+/*description: .*/
+#define SENS_SAR_RSTB_FSM    0x0000000F
+#define SENS_SAR_RSTB_FSM_M  ((SENS_SAR_RSTB_FSM_V)<<(SENS_SAR_RSTB_FSM_S))
+#define SENS_SAR_RSTB_FSM_V  0xF
+#define SENS_SAR_RSTB_FSM_S  24
+/* SENS_XPD_SAR_FSM : R/W ;bitpos:[23:20] ;default: 4'b0111 ; */
+/*description: .*/
+#define SENS_XPD_SAR_FSM    0x0000000F
+#define SENS_XPD_SAR_FSM_M  ((SENS_XPD_SAR_FSM_V)<<(SENS_XPD_SAR_FSM_S))
+#define SENS_XPD_SAR_FSM_V  0xF
+#define SENS_XPD_SAR_FSM_S  20
+/* SENS_AMP_SHORT_REF_GND_FSM : R/W ;bitpos:[19:16] ;default: 4'b0011 ; */
+/*description: .*/
+#define SENS_AMP_SHORT_REF_GND_FSM    0x0000000F
+#define SENS_AMP_SHORT_REF_GND_FSM_M  ((SENS_AMP_SHORT_REF_GND_FSM_V)<<(SENS_AMP_SHORT_REF_GND_FSM_S))
+#define SENS_AMP_SHORT_REF_GND_FSM_V  0xF
+#define SENS_AMP_SHORT_REF_GND_FSM_S  16
+/* SENS_AMP_SHORT_REF_FSM : R/W ;bitpos:[15:12] ;default: 4'b0011 ; */
+/*description: .*/
+#define SENS_AMP_SHORT_REF_FSM    0x0000000F
+#define SENS_AMP_SHORT_REF_FSM_M  ((SENS_AMP_SHORT_REF_FSM_V)<<(SENS_AMP_SHORT_REF_FSM_S))
+#define SENS_AMP_SHORT_REF_FSM_V  0xF
+#define SENS_AMP_SHORT_REF_FSM_S  12
+/* SENS_AMP_RST_FB_FSM : R/W ;bitpos:[11:8] ;default: 4'b1000 ; */
+/*description: .*/
+#define SENS_AMP_RST_FB_FSM    0x0000000F
+#define SENS_AMP_RST_FB_FSM_M  ((SENS_AMP_RST_FB_FSM_V)<<(SENS_AMP_RST_FB_FSM_S))
+#define SENS_AMP_RST_FB_FSM_V  0xF
+#define SENS_AMP_RST_FB_FSM_S  8
+/* SENS_XPD_SAR_AMP_FSM : R/W ;bitpos:[7:4] ;default: 4'b1111 ; */
+/*description: .*/
+#define SENS_XPD_SAR_AMP_FSM    0x0000000F
+#define SENS_XPD_SAR_AMP_FSM_M  ((SENS_XPD_SAR_AMP_FSM_V)<<(SENS_XPD_SAR_AMP_FSM_S))
+#define SENS_XPD_SAR_AMP_FSM_V  0xF
+#define SENS_XPD_SAR_AMP_FSM_S  4
+/* SENS_SAR1_DAC_XPD_FSM : R/W ;bitpos:[3:0] ;default: 4'b0011 ; */
+/*description: .*/
+#define SENS_SAR1_DAC_XPD_FSM    0x0000000F
+#define SENS_SAR1_DAC_XPD_FSM_M  ((SENS_SAR1_DAC_XPD_FSM_V)<<(SENS_SAR1_DAC_XPD_FSM_S))
+#define SENS_SAR1_DAC_XPD_FSM_V  0xF
+#define SENS_SAR1_DAC_XPD_FSM_S  0
+
+#define SENS_SAR_READER2_CTRL_REG          (DR_REG_SENS_BASE + 0x24)
+/* SENS_SAR2_INT_EN : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: enable saradc2 to send out interrupt.*/
+#define SENS_SAR2_INT_EN    (BIT(30))
+#define SENS_SAR2_INT_EN_M  (BIT(30))
+#define SENS_SAR2_INT_EN_V  0x1
+#define SENS_SAR2_INT_EN_S  30
+/* SENS_SAR2_DATA_INV : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: Invert SAR ADC2 data.*/
+#define SENS_SAR2_DATA_INV    (BIT(29))
+#define SENS_SAR2_DATA_INV_M  (BIT(29))
+#define SENS_SAR2_DATA_INV_V  0x1
+#define SENS_SAR2_DATA_INV_S  29
+/* SENS_SAR2_SAMPLE_NUM : R/W ;bitpos:[26:19] ;default: 8'd0 ; */
+/*description: .*/
+#define SENS_SAR2_SAMPLE_NUM    0x000000FF
+#define SENS_SAR2_SAMPLE_NUM_M  ((SENS_SAR2_SAMPLE_NUM_V)<<(SENS_SAR2_SAMPLE_NUM_S))
+#define SENS_SAR2_SAMPLE_NUM_V  0xFF
+#define SENS_SAR2_SAMPLE_NUM_S  19
+/* SENS_SAR2_CLK_GATED : R/W ;bitpos:[18] ;default: 1'b1 ; */
+/*description: .*/
+#define SENS_SAR2_CLK_GATED    (BIT(18))
+#define SENS_SAR2_CLK_GATED_M  (BIT(18))
+#define SENS_SAR2_CLK_GATED_V  0x1
+#define SENS_SAR2_CLK_GATED_S  18
+/* SENS_SAR2_WAIT_ARB_CYCLE : R/W ;bitpos:[17:16] ;default: 2'b1 ; */
+/*description: wait arbit stable after sar_done.*/
+#define SENS_SAR2_WAIT_ARB_CYCLE    0x00000003
+#define SENS_SAR2_WAIT_ARB_CYCLE_M  ((SENS_SAR2_WAIT_ARB_CYCLE_V)<<(SENS_SAR2_WAIT_ARB_CYCLE_S))
+#define SENS_SAR2_WAIT_ARB_CYCLE_V  0x3
+#define SENS_SAR2_WAIT_ARB_CYCLE_S  16
+/* SENS_SAR2_CLK_DIV : R/W ;bitpos:[7:0] ;default: 8'd2 ; */
+/*description: clock divider.*/
+#define SENS_SAR2_CLK_DIV    0x000000FF
+#define SENS_SAR2_CLK_DIV_M  ((SENS_SAR2_CLK_DIV_V)<<(SENS_SAR2_CLK_DIV_S))
+#define SENS_SAR2_CLK_DIV_V  0xFF
+#define SENS_SAR2_CLK_DIV_S  0
+
+#define SENS_SAR_READER2_STATUS_REG          (DR_REG_SENS_BASE + 0x28)
+/* SENS_SAR2_READER_STATUS : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define SENS_SAR2_READER_STATUS    0xFFFFFFFF
+#define SENS_SAR2_READER_STATUS_M  ((SENS_SAR2_READER_STATUS_V)<<(SENS_SAR2_READER_STATUS_S))
+#define SENS_SAR2_READER_STATUS_V  0xFFFFFFFF
+#define SENS_SAR2_READER_STATUS_S  0
+
+#define SENS_SAR_MEAS2_CTRL1_REG          (DR_REG_SENS_BASE + 0x2C)
+/* SENS_SAR2_XPD_WAIT : R/W ;bitpos:[31:24] ;default: 8'h7 ; */
+/*description: .*/
+#define SENS_SAR2_XPD_WAIT    0x000000FF
+#define SENS_SAR2_XPD_WAIT_M  ((SENS_SAR2_XPD_WAIT_V)<<(SENS_SAR2_XPD_WAIT_S))
+#define SENS_SAR2_XPD_WAIT_V  0xFF
+#define SENS_SAR2_XPD_WAIT_S  24
+/* SENS_SAR2_RSTB_WAIT : R/W ;bitpos:[23:16] ;default: 8'd2 ; */
+/*description: .*/
+#define SENS_SAR2_RSTB_WAIT    0x000000FF
+#define SENS_SAR2_RSTB_WAIT_M  ((SENS_SAR2_RSTB_WAIT_V)<<(SENS_SAR2_RSTB_WAIT_S))
+#define SENS_SAR2_RSTB_WAIT_V  0xFF
+#define SENS_SAR2_RSTB_WAIT_S  16
+/* SENS_SAR2_STANDBY_WAIT : R/W ;bitpos:[15:8] ;default: 8'd2 ; */
+/*description: .*/
+#define SENS_SAR2_STANDBY_WAIT    0x000000FF
+#define SENS_SAR2_STANDBY_WAIT_M  ((SENS_SAR2_STANDBY_WAIT_V)<<(SENS_SAR2_STANDBY_WAIT_S))
+#define SENS_SAR2_STANDBY_WAIT_V  0xFF
+#define SENS_SAR2_STANDBY_WAIT_S  8
+/* SENS_SAR2_RSTB_FORCE : R/W ;bitpos:[7:6] ;default: 2'b0 ; */
+/*description: .*/
+#define SENS_SAR2_RSTB_FORCE    0x00000003
+#define SENS_SAR2_RSTB_FORCE_M  ((SENS_SAR2_RSTB_FORCE_V)<<(SENS_SAR2_RSTB_FORCE_S))
+#define SENS_SAR2_RSTB_FORCE_V  0x3
+#define SENS_SAR2_RSTB_FORCE_S  6
+/* SENS_SAR2_EN_TEST : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: SAR2_EN_TEST.*/
+#define SENS_SAR2_EN_TEST    (BIT(5))
+#define SENS_SAR2_EN_TEST_M  (BIT(5))
+#define SENS_SAR2_EN_TEST_V  0x1
+#define SENS_SAR2_EN_TEST_S  5
+/* SENS_SAR2_PKDET_CAL_EN : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: rtc control pkdet enable.*/
+#define SENS_SAR2_PKDET_CAL_EN    (BIT(4))
+#define SENS_SAR2_PKDET_CAL_EN_M  (BIT(4))
+#define SENS_SAR2_PKDET_CAL_EN_V  0x1
+#define SENS_SAR2_PKDET_CAL_EN_S  4
+/* SENS_SAR2_PWDET_CAL_EN : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: rtc control pwdet enable.*/
+#define SENS_SAR2_PWDET_CAL_EN    (BIT(3))
+#define SENS_SAR2_PWDET_CAL_EN_M  (BIT(3))
+#define SENS_SAR2_PWDET_CAL_EN_V  0x1
+#define SENS_SAR2_PWDET_CAL_EN_S  3
+/* SENS_SAR2_CNTL_STATE : RO ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: saradc2_cntl_fsm.*/
+#define SENS_SAR2_CNTL_STATE    0x00000007
+#define SENS_SAR2_CNTL_STATE_M  ((SENS_SAR2_CNTL_STATE_V)<<(SENS_SAR2_CNTL_STATE_S))
+#define SENS_SAR2_CNTL_STATE_V  0x7
+#define SENS_SAR2_CNTL_STATE_S  0
+
+#define SENS_SAR_MEAS2_CTRL2_REG          (DR_REG_SENS_BASE + 0x30)
+/* SENS_SAR2_EN_PAD_FORCE : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: 1: SAR ADC2 pad enable bitmap is controlled by SW.*/
+#define SENS_SAR2_EN_PAD_FORCE    (BIT(31))
+#define SENS_SAR2_EN_PAD_FORCE_M  (BIT(31))
+#define SENS_SAR2_EN_PAD_FORCE_V  0x1
+#define SENS_SAR2_EN_PAD_FORCE_S  31
+/* SENS_SAR2_EN_PAD : R/W ;bitpos:[30:19] ;default: 12'b0 ; */
+/*description: SAR ADC2 pad enable bitmap.*/
+#define SENS_SAR2_EN_PAD    0x00000FFF
+#define SENS_SAR2_EN_PAD_M  ((SENS_SAR2_EN_PAD_V)<<(SENS_SAR2_EN_PAD_S))
+#define SENS_SAR2_EN_PAD_V  0xFFF
+#define SENS_SAR2_EN_PAD_S  19
+/* SENS_MEAS2_START_FORCE : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: 1: SAR ADC2 controller (in RTC) is started by SW.*/
+#define SENS_MEAS2_START_FORCE    (BIT(18))
+#define SENS_MEAS2_START_FORCE_M  (BIT(18))
+#define SENS_MEAS2_START_FORCE_V  0x1
+#define SENS_MEAS2_START_FORCE_S  18
+/* SENS_MEAS2_START_SAR : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: SAR ADC2 controller (in RTC) starts conversion.*/
+#define SENS_MEAS2_START_SAR    (BIT(17))
+#define SENS_MEAS2_START_SAR_M  (BIT(17))
+#define SENS_MEAS2_START_SAR_V  0x1
+#define SENS_MEAS2_START_SAR_S  17
+/* SENS_MEAS2_DONE_SAR : RO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: SAR ADC2 conversion done indication.*/
+#define SENS_MEAS2_DONE_SAR    (BIT(16))
+#define SENS_MEAS2_DONE_SAR_M  (BIT(16))
+#define SENS_MEAS2_DONE_SAR_V  0x1
+#define SENS_MEAS2_DONE_SAR_S  16
+/* SENS_MEAS2_DATA_SAR : RO ;bitpos:[15:0] ;default: 16'b0 ; */
+/*description: SAR ADC2 data.*/
+#define SENS_MEAS2_DATA_SAR    0x0000FFFF
+#define SENS_MEAS2_DATA_SAR_M  ((SENS_MEAS2_DATA_SAR_V)<<(SENS_MEAS2_DATA_SAR_S))
+#define SENS_MEAS2_DATA_SAR_V  0xFFFF
+#define SENS_MEAS2_DATA_SAR_S  0
+
+#define SENS_SAR_MEAS2_MUX_REG          (DR_REG_SENS_BASE + 0x34)
+/* SENS_SAR2_RTC_FORCE : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: in sleep, force to use rtc to control ADC.*/
+#define SENS_SAR2_RTC_FORCE    (BIT(31))
+#define SENS_SAR2_RTC_FORCE_M  (BIT(31))
+#define SENS_SAR2_RTC_FORCE_V  0x1
+#define SENS_SAR2_RTC_FORCE_S  31
+/* SENS_SAR2_PWDET_CCT : R/W ;bitpos:[30:28] ;default: 3'b0 ; */
+/*description: SAR2_PWDET_CCT.*/
+#define SENS_SAR2_PWDET_CCT    0x00000007
+#define SENS_SAR2_PWDET_CCT_M  ((SENS_SAR2_PWDET_CCT_V)<<(SENS_SAR2_PWDET_CCT_S))
+#define SENS_SAR2_PWDET_CCT_V  0x7
+#define SENS_SAR2_PWDET_CCT_S  28
+
+#define SENS_SAR_ATTEN2_REG          (DR_REG_SENS_BASE + 0x38)
+/* SENS_SAR2_ATTEN : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: 2-bit attenuation for each pad.*/
+#define SENS_SAR2_ATTEN    0xFFFFFFFF
+#define SENS_SAR2_ATTEN_M  ((SENS_SAR2_ATTEN_V)<<(SENS_SAR2_ATTEN_S))
+#define SENS_SAR2_ATTEN_V  0xFFFFFFFF
+#define SENS_SAR2_ATTEN_S  0
+
+#define SENS_SAR_POWER_XPD_SAR_REG          (DR_REG_SENS_BASE + 0x3C)
+/* SENS_SARCLK_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_SARCLK_EN    (BIT(31))
+#define SENS_SARCLK_EN_M  (BIT(31))
+#define SENS_SARCLK_EN_V  0x1
+#define SENS_SARCLK_EN_S  31
+/* SENS_FORCE_XPD_SAR : R/W ;bitpos:[30:29] ;default: 2'd0 ; */
+/*description: .*/
+#define SENS_FORCE_XPD_SAR    0x00000003
+#define SENS_FORCE_XPD_SAR_M  ((SENS_FORCE_XPD_SAR_V)<<(SENS_FORCE_XPD_SAR_S))
+#define SENS_FORCE_XPD_SAR_V  0x3
+#define SENS_FORCE_XPD_SAR_S  29
+
+#define SENS_SAR_SLAVE_ADDR1_REG          (DR_REG_SENS_BASE + 0x40)
+/* SENS_SARADC_MEAS_STATUS : RO ;bitpos:[29:22] ;default: 8'h0 ; */
+/*description: .*/
+#define SENS_SARADC_MEAS_STATUS    0x000000FF
+#define SENS_SARADC_MEAS_STATUS_M  ((SENS_SARADC_MEAS_STATUS_V)<<(SENS_SARADC_MEAS_STATUS_S))
+#define SENS_SARADC_MEAS_STATUS_V  0xFF
+#define SENS_SARADC_MEAS_STATUS_S  22
+/* SENS_I2C_SLAVE_ADDR0 : R/W ;bitpos:[21:11] ;default: 11'h0 ; */
+/*description: .*/
+#define SENS_I2C_SLAVE_ADDR0    0x000007FF
+#define SENS_I2C_SLAVE_ADDR0_M  ((SENS_I2C_SLAVE_ADDR0_V)<<(SENS_I2C_SLAVE_ADDR0_S))
+#define SENS_I2C_SLAVE_ADDR0_V  0x7FF
+#define SENS_I2C_SLAVE_ADDR0_S  11
+/* SENS_I2C_SLAVE_ADDR1 : R/W ;bitpos:[10:0] ;default: 11'h0 ; */
+/*description: .*/
+#define SENS_I2C_SLAVE_ADDR1    0x000007FF
+#define SENS_I2C_SLAVE_ADDR1_M  ((SENS_I2C_SLAVE_ADDR1_V)<<(SENS_I2C_SLAVE_ADDR1_S))
+#define SENS_I2C_SLAVE_ADDR1_V  0x7FF
+#define SENS_I2C_SLAVE_ADDR1_S  0
+
+#define SENS_SAR_SLAVE_ADDR2_REG          (DR_REG_SENS_BASE + 0x44)
+/* SENS_I2C_SLAVE_ADDR2 : R/W ;bitpos:[21:11] ;default: 11'h0 ; */
+/*description: .*/
+#define SENS_I2C_SLAVE_ADDR2    0x000007FF
+#define SENS_I2C_SLAVE_ADDR2_M  ((SENS_I2C_SLAVE_ADDR2_V)<<(SENS_I2C_SLAVE_ADDR2_S))
+#define SENS_I2C_SLAVE_ADDR2_V  0x7FF
+#define SENS_I2C_SLAVE_ADDR2_S  11
+/* SENS_I2C_SLAVE_ADDR3 : R/W ;bitpos:[10:0] ;default: 11'h0 ; */
+/*description: .*/
+#define SENS_I2C_SLAVE_ADDR3    0x000007FF
+#define SENS_I2C_SLAVE_ADDR3_M  ((SENS_I2C_SLAVE_ADDR3_V)<<(SENS_I2C_SLAVE_ADDR3_S))
+#define SENS_I2C_SLAVE_ADDR3_V  0x7FF
+#define SENS_I2C_SLAVE_ADDR3_S  0
+
+#define SENS_SAR_SLAVE_ADDR3_REG          (DR_REG_SENS_BASE + 0x48)
+/* SENS_I2C_SLAVE_ADDR4 : R/W ;bitpos:[21:11] ;default: 11'h0 ; */
+/*description: .*/
+#define SENS_I2C_SLAVE_ADDR4    0x000007FF
+#define SENS_I2C_SLAVE_ADDR4_M  ((SENS_I2C_SLAVE_ADDR4_V)<<(SENS_I2C_SLAVE_ADDR4_S))
+#define SENS_I2C_SLAVE_ADDR4_V  0x7FF
+#define SENS_I2C_SLAVE_ADDR4_S  11
+/* SENS_I2C_SLAVE_ADDR5 : R/W ;bitpos:[10:0] ;default: 11'h0 ; */
+/*description: .*/
+#define SENS_I2C_SLAVE_ADDR5    0x000007FF
+#define SENS_I2C_SLAVE_ADDR5_M  ((SENS_I2C_SLAVE_ADDR5_V)<<(SENS_I2C_SLAVE_ADDR5_S))
+#define SENS_I2C_SLAVE_ADDR5_V  0x7FF
+#define SENS_I2C_SLAVE_ADDR5_S  0
+
+#define SENS_SAR_SLAVE_ADDR4_REG          (DR_REG_SENS_BASE + 0x4C)
+/* SENS_I2C_SLAVE_ADDR6 : R/W ;bitpos:[21:11] ;default: 11'h0 ; */
+/*description: .*/
+#define SENS_I2C_SLAVE_ADDR6    0x000007FF
+#define SENS_I2C_SLAVE_ADDR6_M  ((SENS_I2C_SLAVE_ADDR6_V)<<(SENS_I2C_SLAVE_ADDR6_S))
+#define SENS_I2C_SLAVE_ADDR6_V  0x7FF
+#define SENS_I2C_SLAVE_ADDR6_S  11
+/* SENS_I2C_SLAVE_ADDR7 : R/W ;bitpos:[10:0] ;default: 11'h0 ; */
+/*description: .*/
+#define SENS_I2C_SLAVE_ADDR7    0x000007FF
+#define SENS_I2C_SLAVE_ADDR7_M  ((SENS_I2C_SLAVE_ADDR7_V)<<(SENS_I2C_SLAVE_ADDR7_S))
+#define SENS_I2C_SLAVE_ADDR7_V  0x7FF
+#define SENS_I2C_SLAVE_ADDR7_S  0
+
+#define SENS_SAR_TSENS_CTRL_REG          (DR_REG_SENS_BASE + 0x50)
+/* SENS_TSENS_DUMP_OUT : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: temperature sensor dump out.*/
+#define SENS_TSENS_DUMP_OUT    (BIT(24))
+#define SENS_TSENS_DUMP_OUT_M  (BIT(24))
+#define SENS_TSENS_DUMP_OUT_V  0x1
+#define SENS_TSENS_DUMP_OUT_S  24
+/* SENS_TSENS_POWER_UP_FORCE : R/W ;bitpos:[23] ;default: 1'b0 ; */
+/*description: 1: dump out & power up controlled by SW.*/
+#define SENS_TSENS_POWER_UP_FORCE    (BIT(23))
+#define SENS_TSENS_POWER_UP_FORCE_M  (BIT(23))
+#define SENS_TSENS_POWER_UP_FORCE_V  0x1
+#define SENS_TSENS_POWER_UP_FORCE_S  23
+/* SENS_TSENS_POWER_UP : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: temperature sensor power up.*/
+#define SENS_TSENS_POWER_UP    (BIT(22))
+#define SENS_TSENS_POWER_UP_M  (BIT(22))
+#define SENS_TSENS_POWER_UP_V  0x1
+#define SENS_TSENS_POWER_UP_S  22
+/* SENS_TSENS_CLK_DIV : R/W ;bitpos:[21:14] ;default: 8'd6 ; */
+/*description: temperature sensor clock divider.*/
+#define SENS_TSENS_CLK_DIV    0x000000FF
+#define SENS_TSENS_CLK_DIV_M  ((SENS_TSENS_CLK_DIV_V)<<(SENS_TSENS_CLK_DIV_S))
+#define SENS_TSENS_CLK_DIV_V  0xFF
+#define SENS_TSENS_CLK_DIV_S  14
+/* SENS_TSENS_IN_INV : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: invert temperature sensor data.*/
+#define SENS_TSENS_IN_INV    (BIT(13))
+#define SENS_TSENS_IN_INV_M  (BIT(13))
+#define SENS_TSENS_IN_INV_V  0x1
+#define SENS_TSENS_IN_INV_S  13
+/* SENS_TSENS_INT_EN : R/W ;bitpos:[12] ;default: 1'b1 ; */
+/*description: enable temperature sensor to send out interrupt.*/
+#define SENS_TSENS_INT_EN    (BIT(12))
+#define SENS_TSENS_INT_EN_M  (BIT(12))
+#define SENS_TSENS_INT_EN_V  0x1
+#define SENS_TSENS_INT_EN_S  12
+/* SENS_TSENS_READY : RO ;bitpos:[8] ;default: 1'h0 ; */
+/*description: indicate temperature sensor out ready.*/
+#define SENS_TSENS_READY    (BIT(8))
+#define SENS_TSENS_READY_M  (BIT(8))
+#define SENS_TSENS_READY_V  0x1
+#define SENS_TSENS_READY_S  8
+/* SENS_TSENS_OUT : RO ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: temperature sensor data out.*/
+#define SENS_TSENS_OUT    0x000000FF
+#define SENS_TSENS_OUT_M  ((SENS_TSENS_OUT_V)<<(SENS_TSENS_OUT_S))
+#define SENS_TSENS_OUT_V  0xFF
+#define SENS_TSENS_OUT_S  0
+
+#define SENS_SAR_TSENS_CTRL2_REG          (DR_REG_SENS_BASE + 0x54)
+/* SENS_TSENS_CLK_INV : R/W ;bitpos:[14] ;default: 1'b1 ; */
+/*description: .*/
+#define SENS_TSENS_CLK_INV    (BIT(14))
+#define SENS_TSENS_CLK_INV_M  (BIT(14))
+#define SENS_TSENS_CLK_INV_V  0x1
+#define SENS_TSENS_CLK_INV_S  14
+/* SENS_TSENS_XPD_FORCE : R/W ;bitpos:[13:12] ;default: 2'b0 ; */
+/*description: .*/
+#define SENS_TSENS_XPD_FORCE    0x00000003
+#define SENS_TSENS_XPD_FORCE_M  ((SENS_TSENS_XPD_FORCE_V)<<(SENS_TSENS_XPD_FORCE_S))
+#define SENS_TSENS_XPD_FORCE_V  0x3
+#define SENS_TSENS_XPD_FORCE_S  12
+/* SENS_TSENS_XPD_WAIT : R/W ;bitpos:[11:0] ;default: 12'h2 ; */
+/*description: .*/
+#define SENS_TSENS_XPD_WAIT    0x00000FFF
+#define SENS_TSENS_XPD_WAIT_M  ((SENS_TSENS_XPD_WAIT_V)<<(SENS_TSENS_XPD_WAIT_S))
+#define SENS_TSENS_XPD_WAIT_V  0xFFF
+#define SENS_TSENS_XPD_WAIT_S  0
+
+#define SENS_SAR_I2C_CTRL_REG          (DR_REG_SENS_BASE + 0x58)
+/* SENS_SAR_I2C_START_FORCE : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: 1: I2C started by SW.*/
+#define SENS_SAR_I2C_START_FORCE    (BIT(29))
+#define SENS_SAR_I2C_START_FORCE_M  (BIT(29))
+#define SENS_SAR_I2C_START_FORCE_V  0x1
+#define SENS_SAR_I2C_START_FORCE_S  29
+/* SENS_SAR_I2C_START : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: start I2C.*/
+#define SENS_SAR_I2C_START    (BIT(28))
+#define SENS_SAR_I2C_START_M  (BIT(28))
+#define SENS_SAR_I2C_START_V  0x1
+#define SENS_SAR_I2C_START_S  28
+/* SENS_SAR_I2C_CTRL : R/W ;bitpos:[27:0] ;default: 28'b0 ; */
+/*description: I2C control data.*/
+#define SENS_SAR_I2C_CTRL    0x0FFFFFFF
+#define SENS_SAR_I2C_CTRL_M  ((SENS_SAR_I2C_CTRL_V)<<(SENS_SAR_I2C_CTRL_S))
+#define SENS_SAR_I2C_CTRL_V  0xFFFFFFF
+#define SENS_SAR_I2C_CTRL_S  0
+
+#define SENS_SAR_TOUCH_CONF_REG          (DR_REG_SENS_BASE + 0x5C)
+/* SENS_TOUCH_APPROACH_PAD0 : R/W ;bitpos:[31:28] ;default: 4'hf ; */
+/*description: indicate which pad is approach pad0.*/
+#define SENS_TOUCH_APPROACH_PAD0    0x0000000F
+#define SENS_TOUCH_APPROACH_PAD0_M  ((SENS_TOUCH_APPROACH_PAD0_V)<<(SENS_TOUCH_APPROACH_PAD0_S))
+#define SENS_TOUCH_APPROACH_PAD0_V  0xF
+#define SENS_TOUCH_APPROACH_PAD0_S  28
+/* SENS_TOUCH_APPROACH_PAD1 : R/W ;bitpos:[27:24] ;default: 4'hf ; */
+/*description: indicate which pad is approach pad1.*/
+#define SENS_TOUCH_APPROACH_PAD1    0x0000000F
+#define SENS_TOUCH_APPROACH_PAD1_M  ((SENS_TOUCH_APPROACH_PAD1_V)<<(SENS_TOUCH_APPROACH_PAD1_S))
+#define SENS_TOUCH_APPROACH_PAD1_V  0xF
+#define SENS_TOUCH_APPROACH_PAD1_S  24
+/* SENS_TOUCH_APPROACH_PAD2 : R/W ;bitpos:[23:20] ;default: 4'hf ; */
+/*description: indicate which pad is approach pad2.*/
+#define SENS_TOUCH_APPROACH_PAD2    0x0000000F
+#define SENS_TOUCH_APPROACH_PAD2_M  ((SENS_TOUCH_APPROACH_PAD2_V)<<(SENS_TOUCH_APPROACH_PAD2_S))
+#define SENS_TOUCH_APPROACH_PAD2_V  0xF
+#define SENS_TOUCH_APPROACH_PAD2_S  20
+/* SENS_TOUCH_UNIT_END : RO ;bitpos:[19] ;default: 1'd0 ; */
+/*description: touch_unit_done.*/
+#define SENS_TOUCH_UNIT_END    (BIT(19))
+#define SENS_TOUCH_UNIT_END_M  (BIT(19))
+#define SENS_TOUCH_UNIT_END_V  0x1
+#define SENS_TOUCH_UNIT_END_S  19
+/* SENS_TOUCH_DENOISE_END : RO ;bitpos:[18] ;default: 1'd0 ; */
+/*description: touch_denoise_done.*/
+#define SENS_TOUCH_DENOISE_END    (BIT(18))
+#define SENS_TOUCH_DENOISE_END_M  (BIT(18))
+#define SENS_TOUCH_DENOISE_END_V  0x1
+#define SENS_TOUCH_DENOISE_END_S  18
+/* SENS_TOUCH_DATA_SEL : R/W ;bitpos:[17:16] ;default: 2'd0 ; */
+/*description: 3: smooth data 2: baseline 1,0: raw_data.*/
+#define SENS_TOUCH_DATA_SEL    0x00000003
+#define SENS_TOUCH_DATA_SEL_M  ((SENS_TOUCH_DATA_SEL_V)<<(SENS_TOUCH_DATA_SEL_S))
+#define SENS_TOUCH_DATA_SEL_V  0x3
+#define SENS_TOUCH_DATA_SEL_S  16
+/* SENS_TOUCH_STATUS_CLR : WO ;bitpos:[15] ;default: 1'd0 ; */
+/*description: clear all touch active status.*/
+#define SENS_TOUCH_STATUS_CLR    (BIT(15))
+#define SENS_TOUCH_STATUS_CLR_M  (BIT(15))
+#define SENS_TOUCH_STATUS_CLR_V  0x1
+#define SENS_TOUCH_STATUS_CLR_S  15
+/* SENS_TOUCH_OUTEN : R/W ;bitpos:[14:0] ;default: 15'h7fff ; */
+/*description: touch controller output enable.*/
+#define SENS_TOUCH_OUTEN    0x00007FFF
+#define SENS_TOUCH_OUTEN_M  ((SENS_TOUCH_OUTEN_V)<<(SENS_TOUCH_OUTEN_S))
+#define SENS_TOUCH_OUTEN_V  0x7FFF
+#define SENS_TOUCH_OUTEN_S  0
+
+#define SENS_SAR_TOUCH_DENOISE_REG          (DR_REG_SENS_BASE + 0x60)
+/* SENS_TOUCH_DENOISE_DATA : RO ;bitpos:[21:0] ;default: 22'b0 ; */
+/*description: .*/
+#define SENS_TOUCH_DENOISE_DATA    0x003FFFFF
+#define SENS_TOUCH_DENOISE_DATA_M  ((SENS_TOUCH_DENOISE_DATA_V)<<(SENS_TOUCH_DENOISE_DATA_S))
+#define SENS_TOUCH_DENOISE_DATA_V  0x3FFFFF
+#define SENS_TOUCH_DENOISE_DATA_S  0
+
+#define SENS_SAR_TOUCH_THRES1_REG          (DR_REG_SENS_BASE + 0x64)
+/* SENS_TOUCH_OUT_TH1 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 1.*/
+#define SENS_TOUCH_OUT_TH1    0x003FFFFF
+#define SENS_TOUCH_OUT_TH1_M  ((SENS_TOUCH_OUT_TH1_V)<<(SENS_TOUCH_OUT_TH1_S))
+#define SENS_TOUCH_OUT_TH1_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH1_S  0
+
+#define SENS_SAR_TOUCH_THRES2_REG          (DR_REG_SENS_BASE + 0x68)
+/* SENS_TOUCH_OUT_TH2 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 2.*/
+#define SENS_TOUCH_OUT_TH2    0x003FFFFF
+#define SENS_TOUCH_OUT_TH2_M  ((SENS_TOUCH_OUT_TH2_V)<<(SENS_TOUCH_OUT_TH2_S))
+#define SENS_TOUCH_OUT_TH2_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH2_S  0
+
+#define SENS_SAR_TOUCH_THRES3_REG          (DR_REG_SENS_BASE + 0x6C)
+/* SENS_TOUCH_OUT_TH3 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 3.*/
+#define SENS_TOUCH_OUT_TH3    0x003FFFFF
+#define SENS_TOUCH_OUT_TH3_M  ((SENS_TOUCH_OUT_TH3_V)<<(SENS_TOUCH_OUT_TH3_S))
+#define SENS_TOUCH_OUT_TH3_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH3_S  0
+
+#define SENS_SAR_TOUCH_THRES4_REG          (DR_REG_SENS_BASE + 0x70)
+/* SENS_TOUCH_OUT_TH4 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 4.*/
+#define SENS_TOUCH_OUT_TH4    0x003FFFFF
+#define SENS_TOUCH_OUT_TH4_M  ((SENS_TOUCH_OUT_TH4_V)<<(SENS_TOUCH_OUT_TH4_S))
+#define SENS_TOUCH_OUT_TH4_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH4_S  0
+
+#define SENS_SAR_TOUCH_THRES5_REG          (DR_REG_SENS_BASE + 0x74)
+/* SENS_TOUCH_OUT_TH5 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 5.*/
+#define SENS_TOUCH_OUT_TH5    0x003FFFFF
+#define SENS_TOUCH_OUT_TH5_M  ((SENS_TOUCH_OUT_TH5_V)<<(SENS_TOUCH_OUT_TH5_S))
+#define SENS_TOUCH_OUT_TH5_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH5_S  0
+
+#define SENS_SAR_TOUCH_THRES6_REG          (DR_REG_SENS_BASE + 0x78)
+/* SENS_TOUCH_OUT_TH6 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 6.*/
+#define SENS_TOUCH_OUT_TH6    0x003FFFFF
+#define SENS_TOUCH_OUT_TH6_M  ((SENS_TOUCH_OUT_TH6_V)<<(SENS_TOUCH_OUT_TH6_S))
+#define SENS_TOUCH_OUT_TH6_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH6_S  0
+
+#define SENS_SAR_TOUCH_THRES7_REG          (DR_REG_SENS_BASE + 0x7C)
+/* SENS_TOUCH_OUT_TH7 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 7.*/
+#define SENS_TOUCH_OUT_TH7    0x003FFFFF
+#define SENS_TOUCH_OUT_TH7_M  ((SENS_TOUCH_OUT_TH7_V)<<(SENS_TOUCH_OUT_TH7_S))
+#define SENS_TOUCH_OUT_TH7_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH7_S  0
+
+#define SENS_SAR_TOUCH_THRES8_REG          (DR_REG_SENS_BASE + 0x80)
+/* SENS_TOUCH_OUT_TH8 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 8.*/
+#define SENS_TOUCH_OUT_TH8    0x003FFFFF
+#define SENS_TOUCH_OUT_TH8_M  ((SENS_TOUCH_OUT_TH8_V)<<(SENS_TOUCH_OUT_TH8_S))
+#define SENS_TOUCH_OUT_TH8_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH8_S  0
+
+#define SENS_SAR_TOUCH_THRES9_REG          (DR_REG_SENS_BASE + 0x84)
+/* SENS_TOUCH_OUT_TH9 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 9.*/
+#define SENS_TOUCH_OUT_TH9    0x003FFFFF
+#define SENS_TOUCH_OUT_TH9_M  ((SENS_TOUCH_OUT_TH9_V)<<(SENS_TOUCH_OUT_TH9_S))
+#define SENS_TOUCH_OUT_TH9_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH9_S  0
+
+#define SENS_SAR_TOUCH_THRES10_REG          (DR_REG_SENS_BASE + 0x88)
+/* SENS_TOUCH_OUT_TH10 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 10.*/
+#define SENS_TOUCH_OUT_TH10    0x003FFFFF
+#define SENS_TOUCH_OUT_TH10_M  ((SENS_TOUCH_OUT_TH10_V)<<(SENS_TOUCH_OUT_TH10_S))
+#define SENS_TOUCH_OUT_TH10_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH10_S  0
+
+#define SENS_SAR_TOUCH_THRES11_REG          (DR_REG_SENS_BASE + 0x8C)
+/* SENS_TOUCH_OUT_TH11 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 11.*/
+#define SENS_TOUCH_OUT_TH11    0x003FFFFF
+#define SENS_TOUCH_OUT_TH11_M  ((SENS_TOUCH_OUT_TH11_V)<<(SENS_TOUCH_OUT_TH11_S))
+#define SENS_TOUCH_OUT_TH11_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH11_S  0
+
+#define SENS_SAR_TOUCH_THRES12_REG          (DR_REG_SENS_BASE + 0x90)
+/* SENS_TOUCH_OUT_TH12 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 12.*/
+#define SENS_TOUCH_OUT_TH12    0x003FFFFF
+#define SENS_TOUCH_OUT_TH12_M  ((SENS_TOUCH_OUT_TH12_V)<<(SENS_TOUCH_OUT_TH12_S))
+#define SENS_TOUCH_OUT_TH12_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH12_S  0
+
+#define SENS_SAR_TOUCH_THRES13_REG          (DR_REG_SENS_BASE + 0x94)
+/* SENS_TOUCH_OUT_TH13 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 13.*/
+#define SENS_TOUCH_OUT_TH13    0x003FFFFF
+#define SENS_TOUCH_OUT_TH13_M  ((SENS_TOUCH_OUT_TH13_V)<<(SENS_TOUCH_OUT_TH13_S))
+#define SENS_TOUCH_OUT_TH13_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH13_S  0
+
+#define SENS_SAR_TOUCH_THRES14_REG          (DR_REG_SENS_BASE + 0x98)
+/* SENS_TOUCH_OUT_TH14 : R/W ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: Finger threshold for touch pad 14.*/
+#define SENS_TOUCH_OUT_TH14    0x003FFFFF
+#define SENS_TOUCH_OUT_TH14_M  ((SENS_TOUCH_OUT_TH14_V)<<(SENS_TOUCH_OUT_TH14_S))
+#define SENS_TOUCH_OUT_TH14_V  0x3FFFFF
+#define SENS_TOUCH_OUT_TH14_S  0
+
+#define SENS_SAR_TOUCH_CHN_ST_REG          (DR_REG_SENS_BASE + 0x9C)
+/* SENS_TOUCH_MEAS_DONE : RO ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_TOUCH_MEAS_DONE    (BIT(31))
+#define SENS_TOUCH_MEAS_DONE_M  (BIT(31))
+#define SENS_TOUCH_MEAS_DONE_V  0x1
+#define SENS_TOUCH_MEAS_DONE_S  31
+/* SENS_TOUCH_CHANNEL_CLR : WO ;bitpos:[29:15] ;default: 15'd0 ; */
+/*description: Clear touch channel.*/
+#define SENS_TOUCH_CHANNEL_CLR    0x00007FFF
+#define SENS_TOUCH_CHANNEL_CLR_M  ((SENS_TOUCH_CHANNEL_CLR_V)<<(SENS_TOUCH_CHANNEL_CLR_S))
+#define SENS_TOUCH_CHANNEL_CLR_V  0x7FFF
+#define SENS_TOUCH_CHANNEL_CLR_S  15
+/* SENS_TOUCH_PAD_ACTIVE : RO ;bitpos:[14:0] ;default: 15'd0 ; */
+/*description: touch active status.*/
+#define SENS_TOUCH_PAD_ACTIVE    0x00007FFF
+#define SENS_TOUCH_PAD_ACTIVE_M  ((SENS_TOUCH_PAD_ACTIVE_V)<<(SENS_TOUCH_PAD_ACTIVE_S))
+#define SENS_TOUCH_PAD_ACTIVE_V  0x7FFF
+#define SENS_TOUCH_PAD_ACTIVE_S  0
+
+#define SENS_SAR_TOUCH_STATUS0_REG          (DR_REG_SENS_BASE + 0xA0)
+/* SENS_TOUCH_SCAN_CURR : RO ;bitpos:[25:22] ;default: 4'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_SCAN_CURR    0x0000000F
+#define SENS_TOUCH_SCAN_CURR_M  ((SENS_TOUCH_SCAN_CURR_V)<<(SENS_TOUCH_SCAN_CURR_S))
+#define SENS_TOUCH_SCAN_CURR_V  0xF
+#define SENS_TOUCH_SCAN_CURR_S  22
+/* SENS_TOUCH_DENOISE_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: the counter for touch pad 0.*/
+#define SENS_TOUCH_DENOISE_DATA    0x003FFFFF
+#define SENS_TOUCH_DENOISE_DATA_M  ((SENS_TOUCH_DENOISE_DATA_V)<<(SENS_TOUCH_DENOISE_DATA_S))
+#define SENS_TOUCH_DENOISE_DATA_V  0x3FFFFF
+#define SENS_TOUCH_DENOISE_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS1_REG          (DR_REG_SENS_BASE + 0xA4)
+/* SENS_TOUCH_PAD1_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD1_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD1_DEBOUNCE_M  ((SENS_TOUCH_PAD1_DEBOUNCE_V)<<(SENS_TOUCH_PAD1_DEBOUNCE_S))
+#define SENS_TOUCH_PAD1_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD1_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD1_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD1_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD1_DATA_M  ((SENS_TOUCH_PAD1_DATA_V)<<(SENS_TOUCH_PAD1_DATA_S))
+#define SENS_TOUCH_PAD1_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD1_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS2_REG          (DR_REG_SENS_BASE + 0xA8)
+/* SENS_TOUCH_PAD2_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD2_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD2_DEBOUNCE_M  ((SENS_TOUCH_PAD2_DEBOUNCE_V)<<(SENS_TOUCH_PAD2_DEBOUNCE_S))
+#define SENS_TOUCH_PAD2_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD2_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD2_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD2_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD2_DATA_M  ((SENS_TOUCH_PAD2_DATA_V)<<(SENS_TOUCH_PAD2_DATA_S))
+#define SENS_TOUCH_PAD2_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD2_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS3_REG          (DR_REG_SENS_BASE + 0xAC)
+/* SENS_TOUCH_PAD3_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD3_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD3_DEBOUNCE_M  ((SENS_TOUCH_PAD3_DEBOUNCE_V)<<(SENS_TOUCH_PAD3_DEBOUNCE_S))
+#define SENS_TOUCH_PAD3_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD3_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD3_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD3_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD3_DATA_M  ((SENS_TOUCH_PAD3_DATA_V)<<(SENS_TOUCH_PAD3_DATA_S))
+#define SENS_TOUCH_PAD3_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD3_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS4_REG          (DR_REG_SENS_BASE + 0xB0)
+/* SENS_TOUCH_PAD4_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD4_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD4_DEBOUNCE_M  ((SENS_TOUCH_PAD4_DEBOUNCE_V)<<(SENS_TOUCH_PAD4_DEBOUNCE_S))
+#define SENS_TOUCH_PAD4_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD4_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD4_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD4_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD4_DATA_M  ((SENS_TOUCH_PAD4_DATA_V)<<(SENS_TOUCH_PAD4_DATA_S))
+#define SENS_TOUCH_PAD4_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD4_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS5_REG          (DR_REG_SENS_BASE + 0xB4)
+/* SENS_TOUCH_PAD5_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD5_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD5_DEBOUNCE_M  ((SENS_TOUCH_PAD5_DEBOUNCE_V)<<(SENS_TOUCH_PAD5_DEBOUNCE_S))
+#define SENS_TOUCH_PAD5_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD5_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD5_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD5_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD5_DATA_M  ((SENS_TOUCH_PAD5_DATA_V)<<(SENS_TOUCH_PAD5_DATA_S))
+#define SENS_TOUCH_PAD5_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD5_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS6_REG          (DR_REG_SENS_BASE + 0xB8)
+/* SENS_TOUCH_PAD6_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD6_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD6_DEBOUNCE_M  ((SENS_TOUCH_PAD6_DEBOUNCE_V)<<(SENS_TOUCH_PAD6_DEBOUNCE_S))
+#define SENS_TOUCH_PAD6_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD6_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD6_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD6_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD6_DATA_M  ((SENS_TOUCH_PAD6_DATA_V)<<(SENS_TOUCH_PAD6_DATA_S))
+#define SENS_TOUCH_PAD6_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD6_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS7_REG          (DR_REG_SENS_BASE + 0xBC)
+/* SENS_TOUCH_PAD7_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD7_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD7_DEBOUNCE_M  ((SENS_TOUCH_PAD7_DEBOUNCE_V)<<(SENS_TOUCH_PAD7_DEBOUNCE_S))
+#define SENS_TOUCH_PAD7_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD7_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD7_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD7_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD7_DATA_M  ((SENS_TOUCH_PAD7_DATA_V)<<(SENS_TOUCH_PAD7_DATA_S))
+#define SENS_TOUCH_PAD7_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD7_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS8_REG          (DR_REG_SENS_BASE + 0xC0)
+/* SENS_TOUCH_PAD8_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD8_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD8_DEBOUNCE_M  ((SENS_TOUCH_PAD8_DEBOUNCE_V)<<(SENS_TOUCH_PAD8_DEBOUNCE_S))
+#define SENS_TOUCH_PAD8_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD8_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD8_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD8_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD8_DATA_M  ((SENS_TOUCH_PAD8_DATA_V)<<(SENS_TOUCH_PAD8_DATA_S))
+#define SENS_TOUCH_PAD8_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD8_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS9_REG          (DR_REG_SENS_BASE + 0xC4)
+/* SENS_TOUCH_PAD9_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD9_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD9_DEBOUNCE_M  ((SENS_TOUCH_PAD9_DEBOUNCE_V)<<(SENS_TOUCH_PAD9_DEBOUNCE_S))
+#define SENS_TOUCH_PAD9_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD9_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD9_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD9_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD9_DATA_M  ((SENS_TOUCH_PAD9_DATA_V)<<(SENS_TOUCH_PAD9_DATA_S))
+#define SENS_TOUCH_PAD9_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD9_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS10_REG          (DR_REG_SENS_BASE + 0xC8)
+/* SENS_TOUCH_PAD10_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD10_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD10_DEBOUNCE_M  ((SENS_TOUCH_PAD10_DEBOUNCE_V)<<(SENS_TOUCH_PAD10_DEBOUNCE_S))
+#define SENS_TOUCH_PAD10_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD10_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD10_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD10_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD10_DATA_M  ((SENS_TOUCH_PAD10_DATA_V)<<(SENS_TOUCH_PAD10_DATA_S))
+#define SENS_TOUCH_PAD10_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD10_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS11_REG          (DR_REG_SENS_BASE + 0xCC)
+/* SENS_TOUCH_PAD11_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD11_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD11_DEBOUNCE_M  ((SENS_TOUCH_PAD11_DEBOUNCE_V)<<(SENS_TOUCH_PAD11_DEBOUNCE_S))
+#define SENS_TOUCH_PAD11_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD11_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD11_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD11_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD11_DATA_M  ((SENS_TOUCH_PAD11_DATA_V)<<(SENS_TOUCH_PAD11_DATA_S))
+#define SENS_TOUCH_PAD11_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD11_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS12_REG          (DR_REG_SENS_BASE + 0xD0)
+/* SENS_TOUCH_PAD12_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD12_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD12_DEBOUNCE_M  ((SENS_TOUCH_PAD12_DEBOUNCE_V)<<(SENS_TOUCH_PAD12_DEBOUNCE_S))
+#define SENS_TOUCH_PAD12_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD12_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD12_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD12_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD12_DATA_M  ((SENS_TOUCH_PAD12_DATA_V)<<(SENS_TOUCH_PAD12_DATA_S))
+#define SENS_TOUCH_PAD12_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD12_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS13_REG          (DR_REG_SENS_BASE + 0xD4)
+/* SENS_TOUCH_PAD13_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD13_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD13_DEBOUNCE_M  ((SENS_TOUCH_PAD13_DEBOUNCE_V)<<(SENS_TOUCH_PAD13_DEBOUNCE_S))
+#define SENS_TOUCH_PAD13_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD13_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD13_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD13_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD13_DATA_M  ((SENS_TOUCH_PAD13_DATA_V)<<(SENS_TOUCH_PAD13_DATA_S))
+#define SENS_TOUCH_PAD13_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD13_DATA_S  0
+
+#define SENS_SAR_TOUCH_STATUS14_REG          (DR_REG_SENS_BASE + 0xD8)
+/* SENS_TOUCH_PAD14_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD14_DEBOUNCE    0x00000007
+#define SENS_TOUCH_PAD14_DEBOUNCE_M  ((SENS_TOUCH_PAD14_DEBOUNCE_V)<<(SENS_TOUCH_PAD14_DEBOUNCE_S))
+#define SENS_TOUCH_PAD14_DEBOUNCE_V  0x7
+#define SENS_TOUCH_PAD14_DEBOUNCE_S  29
+/* SENS_TOUCH_PAD14_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_PAD14_DATA    0x003FFFFF
+#define SENS_TOUCH_PAD14_DATA_M  ((SENS_TOUCH_PAD14_DATA_V)<<(SENS_TOUCH_PAD14_DATA_S))
+#define SENS_TOUCH_PAD14_DATA_V  0x3FFFFF
+#define SENS_TOUCH_PAD14_DATA_S  0
+
+#define SENS_SAR_TOUCH_SLP_STATUS_REG          (DR_REG_SENS_BASE + 0xDC)
+/* SENS_TOUCH_SLP_DEBOUNCE : RO ;bitpos:[31:29] ;default: 3'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_SLP_DEBOUNCE    0x00000007
+#define SENS_TOUCH_SLP_DEBOUNCE_M  ((SENS_TOUCH_SLP_DEBOUNCE_V)<<(SENS_TOUCH_SLP_DEBOUNCE_S))
+#define SENS_TOUCH_SLP_DEBOUNCE_V  0x7
+#define SENS_TOUCH_SLP_DEBOUNCE_S  29
+/* SENS_TOUCH_SLP_DATA : RO ;bitpos:[21:0] ;default: 22'h0 ; */
+/*description: .*/
+#define SENS_TOUCH_SLP_DATA    0x003FFFFF
+#define SENS_TOUCH_SLP_DATA_M  ((SENS_TOUCH_SLP_DATA_V)<<(SENS_TOUCH_SLP_DATA_S))
+#define SENS_TOUCH_SLP_DATA_V  0x3FFFFF
+#define SENS_TOUCH_SLP_DATA_S  0
+
+#define SENS_SAR_TOUCH_APPR_STATUS_REG          (DR_REG_SENS_BASE + 0xE0)
+/* SENS_TOUCH_SLP_APPROACH_CNT : RO ;bitpos:[31:24] ;default: 8'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_SLP_APPROACH_CNT    0x000000FF
+#define SENS_TOUCH_SLP_APPROACH_CNT_M  ((SENS_TOUCH_SLP_APPROACH_CNT_V)<<(SENS_TOUCH_SLP_APPROACH_CNT_S))
+#define SENS_TOUCH_SLP_APPROACH_CNT_V  0xFF
+#define SENS_TOUCH_SLP_APPROACH_CNT_S  24
+/* SENS_TOUCH_APPROACH_PAD0_CNT : RO ;bitpos:[23:16] ;default: 8'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_APPROACH_PAD0_CNT    0x000000FF
+#define SENS_TOUCH_APPROACH_PAD0_CNT_M  ((SENS_TOUCH_APPROACH_PAD0_CNT_V)<<(SENS_TOUCH_APPROACH_PAD0_CNT_S))
+#define SENS_TOUCH_APPROACH_PAD0_CNT_V  0xFF
+#define SENS_TOUCH_APPROACH_PAD0_CNT_S  16
+/* SENS_TOUCH_APPROACH_PAD1_CNT : RO ;bitpos:[15:8] ;default: 8'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_APPROACH_PAD1_CNT    0x000000FF
+#define SENS_TOUCH_APPROACH_PAD1_CNT_M  ((SENS_TOUCH_APPROACH_PAD1_CNT_V)<<(SENS_TOUCH_APPROACH_PAD1_CNT_S))
+#define SENS_TOUCH_APPROACH_PAD1_CNT_V  0xFF
+#define SENS_TOUCH_APPROACH_PAD1_CNT_S  8
+/* SENS_TOUCH_APPROACH_PAD2_CNT : RO ;bitpos:[7:0] ;default: 8'd0 ; */
+/*description: .*/
+#define SENS_TOUCH_APPROACH_PAD2_CNT    0x000000FF
+#define SENS_TOUCH_APPROACH_PAD2_CNT_M  ((SENS_TOUCH_APPROACH_PAD2_CNT_V)<<(SENS_TOUCH_APPROACH_PAD2_CNT_S))
+#define SENS_TOUCH_APPROACH_PAD2_CNT_V  0xFF
+#define SENS_TOUCH_APPROACH_PAD2_CNT_S  0
+
+#define SENS_SAR_COCPU_STATE_REG          (DR_REG_SENS_BASE + 0xE4)
+/* SENS_COCPU_EBREAK : RO ;bitpos:[30] ;default: 1'b0 ; */
+/*description: check cocpu whether in ebreak.*/
+#define SENS_COCPU_EBREAK    (BIT(30))
+#define SENS_COCPU_EBREAK_M  (BIT(30))
+#define SENS_COCPU_EBREAK_V  0x1
+#define SENS_COCPU_EBREAK_S  30
+/* SENS_COCPU_TRAP : RO ;bitpos:[29] ;default: 1'b0 ; */
+/*description: check cocpu whether in trap state.*/
+#define SENS_COCPU_TRAP    (BIT(29))
+#define SENS_COCPU_TRAP_M  (BIT(29))
+#define SENS_COCPU_TRAP_V  0x1
+#define SENS_COCPU_TRAP_S  29
+/* SENS_COCPU_EOI : RO ;bitpos:[28] ;default: 1'b0 ; */
+/*description: check cocpu whether in interrupt state.*/
+#define SENS_COCPU_EOI    (BIT(28))
+#define SENS_COCPU_EOI_M  (BIT(28))
+#define SENS_COCPU_EOI_V  0x1
+#define SENS_COCPU_EOI_S  28
+/* SENS_COCPU_RESET_N : RO ;bitpos:[27] ;default: 1'b0 ; */
+/*description: check cocpu whether in reset state.*/
+#define SENS_COCPU_RESET_N    (BIT(27))
+#define SENS_COCPU_RESET_N_M  (BIT(27))
+#define SENS_COCPU_RESET_N_V  0x1
+#define SENS_COCPU_RESET_N_S  27
+/* SENS_COCPU_CLK_EN_ST : RO ;bitpos:[26] ;default: 1'b0 ; */
+/*description: check cocpu whether clk on.*/
+#define SENS_COCPU_CLK_EN_ST    (BIT(26))
+#define SENS_COCPU_CLK_EN_ST_M  (BIT(26))
+#define SENS_COCPU_CLK_EN_ST_V  0x1
+#define SENS_COCPU_CLK_EN_ST_S  26
+/* SENS_COCPU_DBG_TRIGGER : WO ;bitpos:[25] ;default: 1'b0 ; */
+/*description: trigger cocpu debug registers.*/
+#define SENS_COCPU_DBG_TRIGGER    (BIT(25))
+#define SENS_COCPU_DBG_TRIGGER_M  (BIT(25))
+#define SENS_COCPU_DBG_TRIGGER_V  0x1
+#define SENS_COCPU_DBG_TRIGGER_S  25
+
+#define SENS_SAR_COCPU_INT_RAW_REG          (DR_REG_SENS_BASE + 0xE8)
+/* SENS_COCPU_TOUCH_SCAN_DONE_INT_RAW : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_RAW    (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_RAW_M  (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_RAW_V  0x1
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_RAW_S  11
+/* SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_RAW : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_RAW    (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_RAW_M  (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_RAW_V  0x1
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_RAW_S  10
+/* SENS_COCPU_TOUCH_TIMEOUT_INT_RAW : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_RAW    (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_RAW_M  (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_RAW_V  0x1
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_RAW_S  9
+/* SENS_COCPU_SWD_INT_RAW : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: int from super watch dog.*/
+#define SENS_COCPU_SWD_INT_RAW    (BIT(8))
+#define SENS_COCPU_SWD_INT_RAW_M  (BIT(8))
+#define SENS_COCPU_SWD_INT_RAW_V  0x1
+#define SENS_COCPU_SWD_INT_RAW_S  8
+/* SENS_COCPU_SW_INT_RAW : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: int from software.*/
+#define SENS_COCPU_SW_INT_RAW    (BIT(7))
+#define SENS_COCPU_SW_INT_RAW_M  (BIT(7))
+#define SENS_COCPU_SW_INT_RAW_V  0x1
+#define SENS_COCPU_SW_INT_RAW_S  7
+/* SENS_COCPU_START_INT_RAW : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: int from start.*/
+#define SENS_COCPU_START_INT_RAW    (BIT(6))
+#define SENS_COCPU_START_INT_RAW_M  (BIT(6))
+#define SENS_COCPU_START_INT_RAW_V  0x1
+#define SENS_COCPU_START_INT_RAW_S  6
+/* SENS_COCPU_TSENS_INT_RAW : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: int from tsens.*/
+#define SENS_COCPU_TSENS_INT_RAW    (BIT(5))
+#define SENS_COCPU_TSENS_INT_RAW_M  (BIT(5))
+#define SENS_COCPU_TSENS_INT_RAW_V  0x1
+#define SENS_COCPU_TSENS_INT_RAW_S  5
+/* SENS_COCPU_SARADC2_INT_RAW : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: int from saradc2.*/
+#define SENS_COCPU_SARADC2_INT_RAW    (BIT(4))
+#define SENS_COCPU_SARADC2_INT_RAW_M  (BIT(4))
+#define SENS_COCPU_SARADC2_INT_RAW_V  0x1
+#define SENS_COCPU_SARADC2_INT_RAW_S  4
+/* SENS_COCPU_SARADC1_INT_RAW : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: int from saradc1.*/
+#define SENS_COCPU_SARADC1_INT_RAW    (BIT(3))
+#define SENS_COCPU_SARADC1_INT_RAW_M  (BIT(3))
+#define SENS_COCPU_SARADC1_INT_RAW_V  0x1
+#define SENS_COCPU_SARADC1_INT_RAW_S  3
+/* SENS_COCPU_TOUCH_ACTIVE_INT_RAW : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: int from touch active.*/
+#define SENS_COCPU_TOUCH_ACTIVE_INT_RAW    (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_RAW_M  (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_RAW_V  0x1
+#define SENS_COCPU_TOUCH_ACTIVE_INT_RAW_S  2
+/* SENS_COCPU_TOUCH_INACTIVE_INT_RAW : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: int from touch inactive.*/
+#define SENS_COCPU_TOUCH_INACTIVE_INT_RAW    (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_RAW_M  (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_RAW_V  0x1
+#define SENS_COCPU_TOUCH_INACTIVE_INT_RAW_S  1
+/* SENS_COCPU_TOUCH_DONE_INT_RAW : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: int from touch done.*/
+#define SENS_COCPU_TOUCH_DONE_INT_RAW    (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_RAW_M  (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_RAW_V  0x1
+#define SENS_COCPU_TOUCH_DONE_INT_RAW_S  0
+
+#define SENS_SAR_COCPU_INT_ENA_REG          (DR_REG_SENS_BASE + 0xEC)
+/* SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA    (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_M  (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_V  0x1
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_S  11
+/* SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA    (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_M  (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_V  0x1
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_S  10
+/* SENS_COCPU_TOUCH_TIMEOUT_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA    (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_M  (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_V  0x1
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_S  9
+/* SENS_COCPU_SWD_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SWD_INT_ENA    (BIT(8))
+#define SENS_COCPU_SWD_INT_ENA_M  (BIT(8))
+#define SENS_COCPU_SWD_INT_ENA_V  0x1
+#define SENS_COCPU_SWD_INT_ENA_S  8
+/* SENS_COCPU_SW_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: cocpu int enable.*/
+#define SENS_COCPU_SW_INT_ENA    (BIT(7))
+#define SENS_COCPU_SW_INT_ENA_M  (BIT(7))
+#define SENS_COCPU_SW_INT_ENA_V  0x1
+#define SENS_COCPU_SW_INT_ENA_S  7
+/* SENS_COCPU_START_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_START_INT_ENA    (BIT(6))
+#define SENS_COCPU_START_INT_ENA_M  (BIT(6))
+#define SENS_COCPU_START_INT_ENA_V  0x1
+#define SENS_COCPU_START_INT_ENA_S  6
+/* SENS_COCPU_TSENS_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TSENS_INT_ENA    (BIT(5))
+#define SENS_COCPU_TSENS_INT_ENA_M  (BIT(5))
+#define SENS_COCPU_TSENS_INT_ENA_V  0x1
+#define SENS_COCPU_TSENS_INT_ENA_S  5
+/* SENS_COCPU_SARADC2_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SARADC2_INT_ENA    (BIT(4))
+#define SENS_COCPU_SARADC2_INT_ENA_M  (BIT(4))
+#define SENS_COCPU_SARADC2_INT_ENA_V  0x1
+#define SENS_COCPU_SARADC2_INT_ENA_S  4
+/* SENS_COCPU_SARADC1_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SARADC1_INT_ENA    (BIT(3))
+#define SENS_COCPU_SARADC1_INT_ENA_M  (BIT(3))
+#define SENS_COCPU_SARADC1_INT_ENA_V  0x1
+#define SENS_COCPU_SARADC1_INT_ENA_S  3
+/* SENS_COCPU_TOUCH_ACTIVE_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA    (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA_M  (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA_V  0x1
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA_S  2
+/* SENS_COCPU_TOUCH_INACTIVE_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA    (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA_M  (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA_V  0x1
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA_S  1
+/* SENS_COCPU_TOUCH_DONE_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_DONE_INT_ENA    (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_ENA_M  (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_ENA_V  0x1
+#define SENS_COCPU_TOUCH_DONE_INT_ENA_S  0
+
+#define SENS_SAR_COCPU_INT_ST_REG          (DR_REG_SENS_BASE + 0xF0)
+/* SENS_COCPU_TOUCH_SCAN_DONE_INT_ST : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ST    (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ST_M  (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ST_V  0x1
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ST_S  11
+/* SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ST : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ST    (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ST_M  (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ST_V  0x1
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ST_S  10
+/* SENS_COCPU_TOUCH_TIMEOUT_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ST    (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ST_M  (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ST_V  0x1
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ST_S  9
+/* SENS_COCPU_SWD_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SWD_INT_ST    (BIT(8))
+#define SENS_COCPU_SWD_INT_ST_M  (BIT(8))
+#define SENS_COCPU_SWD_INT_ST_V  0x1
+#define SENS_COCPU_SWD_INT_ST_S  8
+/* SENS_COCPU_SW_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: cocpu int status.*/
+#define SENS_COCPU_SW_INT_ST    (BIT(7))
+#define SENS_COCPU_SW_INT_ST_M  (BIT(7))
+#define SENS_COCPU_SW_INT_ST_V  0x1
+#define SENS_COCPU_SW_INT_ST_S  7
+/* SENS_COCPU_START_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_START_INT_ST    (BIT(6))
+#define SENS_COCPU_START_INT_ST_M  (BIT(6))
+#define SENS_COCPU_START_INT_ST_V  0x1
+#define SENS_COCPU_START_INT_ST_S  6
+/* SENS_COCPU_TSENS_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TSENS_INT_ST    (BIT(5))
+#define SENS_COCPU_TSENS_INT_ST_M  (BIT(5))
+#define SENS_COCPU_TSENS_INT_ST_V  0x1
+#define SENS_COCPU_TSENS_INT_ST_S  5
+/* SENS_COCPU_SARADC2_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SARADC2_INT_ST    (BIT(4))
+#define SENS_COCPU_SARADC2_INT_ST_M  (BIT(4))
+#define SENS_COCPU_SARADC2_INT_ST_V  0x1
+#define SENS_COCPU_SARADC2_INT_ST_S  4
+/* SENS_COCPU_SARADC1_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SARADC1_INT_ST    (BIT(3))
+#define SENS_COCPU_SARADC1_INT_ST_M  (BIT(3))
+#define SENS_COCPU_SARADC1_INT_ST_V  0x1
+#define SENS_COCPU_SARADC1_INT_ST_S  3
+/* SENS_COCPU_TOUCH_ACTIVE_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ST    (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ST_M  (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ST_V  0x1
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ST_S  2
+/* SENS_COCPU_TOUCH_INACTIVE_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ST    (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ST_M  (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ST_V  0x1
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ST_S  1
+/* SENS_COCPU_TOUCH_DONE_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_DONE_INT_ST    (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_ST_M  (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_ST_V  0x1
+#define SENS_COCPU_TOUCH_DONE_INT_ST_S  0
+
+#define SENS_SAR_COCPU_INT_CLR_REG          (DR_REG_SENS_BASE + 0xF4)
+/* SENS_COCPU_TOUCH_SCAN_DONE_INT_CLR : WO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_CLR    (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_CLR_M  (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_CLR_V  0x1
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_CLR_S  11
+/* SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_CLR : WO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_CLR    (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_CLR_M  (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_CLR_V  0x1
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_CLR_S  10
+/* SENS_COCPU_TOUCH_TIMEOUT_INT_CLR : WO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_CLR    (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_CLR_M  (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_CLR_V  0x1
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_CLR_S  9
+/* SENS_COCPU_SWD_INT_CLR : WO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SWD_INT_CLR    (BIT(8))
+#define SENS_COCPU_SWD_INT_CLR_M  (BIT(8))
+#define SENS_COCPU_SWD_INT_CLR_V  0x1
+#define SENS_COCPU_SWD_INT_CLR_S  8
+/* SENS_COCPU_SW_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: cocpu int clear.*/
+#define SENS_COCPU_SW_INT_CLR    (BIT(7))
+#define SENS_COCPU_SW_INT_CLR_M  (BIT(7))
+#define SENS_COCPU_SW_INT_CLR_V  0x1
+#define SENS_COCPU_SW_INT_CLR_S  7
+/* SENS_COCPU_START_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_START_INT_CLR    (BIT(6))
+#define SENS_COCPU_START_INT_CLR_M  (BIT(6))
+#define SENS_COCPU_START_INT_CLR_V  0x1
+#define SENS_COCPU_START_INT_CLR_S  6
+/* SENS_COCPU_TSENS_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TSENS_INT_CLR    (BIT(5))
+#define SENS_COCPU_TSENS_INT_CLR_M  (BIT(5))
+#define SENS_COCPU_TSENS_INT_CLR_V  0x1
+#define SENS_COCPU_TSENS_INT_CLR_S  5
+/* SENS_COCPU_SARADC2_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SARADC2_INT_CLR    (BIT(4))
+#define SENS_COCPU_SARADC2_INT_CLR_M  (BIT(4))
+#define SENS_COCPU_SARADC2_INT_CLR_V  0x1
+#define SENS_COCPU_SARADC2_INT_CLR_S  4
+/* SENS_COCPU_SARADC1_INT_CLR : WO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SARADC1_INT_CLR    (BIT(3))
+#define SENS_COCPU_SARADC1_INT_CLR_M  (BIT(3))
+#define SENS_COCPU_SARADC1_INT_CLR_V  0x1
+#define SENS_COCPU_SARADC1_INT_CLR_S  3
+/* SENS_COCPU_TOUCH_ACTIVE_INT_CLR : WO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_ACTIVE_INT_CLR    (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_CLR_M  (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_CLR_V  0x1
+#define SENS_COCPU_TOUCH_ACTIVE_INT_CLR_S  2
+/* SENS_COCPU_TOUCH_INACTIVE_INT_CLR : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_INACTIVE_INT_CLR    (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_CLR_M  (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_CLR_V  0x1
+#define SENS_COCPU_TOUCH_INACTIVE_INT_CLR_S  1
+/* SENS_COCPU_TOUCH_DONE_INT_CLR : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_DONE_INT_CLR    (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_CLR_M  (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_CLR_V  0x1
+#define SENS_COCPU_TOUCH_DONE_INT_CLR_S  0
+
+#define SENS_SAR_COCPU_DEBUG_REG          (DR_REG_SENS_BASE + 0xF8)
+/* SENS_COCPU_MEM_ADDR : RO ;bitpos:[31:19] ;default: 13'd0 ; */
+/*description: cocpu mem address output.*/
+#define SENS_COCPU_MEM_ADDR    0x00001FFF
+#define SENS_COCPU_MEM_ADDR_M  ((SENS_COCPU_MEM_ADDR_V)<<(SENS_COCPU_MEM_ADDR_S))
+#define SENS_COCPU_MEM_ADDR_V  0x1FFF
+#define SENS_COCPU_MEM_ADDR_S  19
+/* SENS_COCPU_MEM_WEN : RO ;bitpos:[18:15] ;default: 4'd0 ; */
+/*description: cocpu mem write enable output.*/
+#define SENS_COCPU_MEM_WEN    0x0000000F
+#define SENS_COCPU_MEM_WEN_M  ((SENS_COCPU_MEM_WEN_V)<<(SENS_COCPU_MEM_WEN_S))
+#define SENS_COCPU_MEM_WEN_V  0xF
+#define SENS_COCPU_MEM_WEN_S  15
+/* SENS_COCPU_MEM_RDY : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: cocpu mem ready input.*/
+#define SENS_COCPU_MEM_RDY    (BIT(14))
+#define SENS_COCPU_MEM_RDY_M  (BIT(14))
+#define SENS_COCPU_MEM_RDY_V  0x1
+#define SENS_COCPU_MEM_RDY_S  14
+/* SENS_COCPU_MEM_VLD : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: cocpu mem valid output.*/
+#define SENS_COCPU_MEM_VLD    (BIT(13))
+#define SENS_COCPU_MEM_VLD_M  (BIT(13))
+#define SENS_COCPU_MEM_VLD_V  0x1
+#define SENS_COCPU_MEM_VLD_S  13
+/* SENS_COCPU_PC : RO ;bitpos:[12:0] ;default: 13'd0 ; */
+/*description: cocpu Program counter.*/
+#define SENS_COCPU_PC    0x00001FFF
+#define SENS_COCPU_PC_M  ((SENS_COCPU_PC_V)<<(SENS_COCPU_PC_S))
+#define SENS_COCPU_PC_V  0x1FFF
+#define SENS_COCPU_PC_S  0
+
+#define SENS_SAR_HALL_CTRL_REG          (DR_REG_SENS_BASE + 0xFC)
+/* SENS_HALL_PHASE_FORCE : R/W ;bitpos:[31] ;default: 1'b1 ; */
+/*description: 1: HALL PHASE is controlled by SW  0: HALL PHASE is controlled by FSM in ULP-cop
+rocessor.*/
+#define SENS_HALL_PHASE_FORCE    (BIT(31))
+#define SENS_HALL_PHASE_FORCE_M  (BIT(31))
+#define SENS_HALL_PHASE_FORCE_V  0x1
+#define SENS_HALL_PHASE_FORCE_S  31
+/* SENS_HALL_PHASE : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: Reverse phase of hall sensor.*/
+#define SENS_HALL_PHASE    (BIT(30))
+#define SENS_HALL_PHASE_M  (BIT(30))
+#define SENS_HALL_PHASE_V  0x1
+#define SENS_HALL_PHASE_S  30
+/* SENS_XPD_HALL_FORCE : R/W ;bitpos:[29] ;default: 1'b1 ; */
+/*description: 1: XPD HALL is controlled by SW. 0: XPD HALL is controlled by FSM in ULP-coproce
+ssor.*/
+#define SENS_XPD_HALL_FORCE    (BIT(29))
+#define SENS_XPD_HALL_FORCE_M  (BIT(29))
+#define SENS_XPD_HALL_FORCE_V  0x1
+#define SENS_XPD_HALL_FORCE_S  29
+/* SENS_XPD_HALL : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: Power on hall sensor and connect to VP and VN.*/
+#define SENS_XPD_HALL    (BIT(28))
+#define SENS_XPD_HALL_M  (BIT(28))
+#define SENS_XPD_HALL_V  0x1
+#define SENS_XPD_HALL_S  28
+
+#define SENS_SAR_NOUSE_REG          (DR_REG_SENS_BASE + 0x100)
+/* SENS_SAR_NOUSE : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define SENS_SAR_NOUSE    0xFFFFFFFF
+#define SENS_SAR_NOUSE_M  ((SENS_SAR_NOUSE_V)<<(SENS_SAR_NOUSE_S))
+#define SENS_SAR_NOUSE_V  0xFFFFFFFF
+#define SENS_SAR_NOUSE_S  0
+
+#define SENS_SAR_PERI_CLK_GATE_CONF_REG          (DR_REG_SENS_BASE + 0x104)
+/* SENS_IOMUX_CLK_EN : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: .*/
+#define SENS_IOMUX_CLK_EN    (BIT(31))
+#define SENS_IOMUX_CLK_EN_M  (BIT(31))
+#define SENS_IOMUX_CLK_EN_V  0x1
+#define SENS_IOMUX_CLK_EN_S  31
+/* SENS_SARADC_CLK_EN : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_SARADC_CLK_EN    (BIT(30))
+#define SENS_SARADC_CLK_EN_M  (BIT(30))
+#define SENS_SARADC_CLK_EN_V  0x1
+#define SENS_SARADC_CLK_EN_S  30
+/* SENS_TSENS_CLK_EN : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_TSENS_CLK_EN    (BIT(29))
+#define SENS_TSENS_CLK_EN_M  (BIT(29))
+#define SENS_TSENS_CLK_EN_V  0x1
+#define SENS_TSENS_CLK_EN_S  29
+/* SENS_RTC_I2C_CLK_EN : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_RTC_I2C_CLK_EN    (BIT(27))
+#define SENS_RTC_I2C_CLK_EN_M  (BIT(27))
+#define SENS_RTC_I2C_CLK_EN_V  0x1
+#define SENS_RTC_I2C_CLK_EN_S  27
+
+#define SENS_SAR_PERI_RESET_CONF_REG          (DR_REG_SENS_BASE + 0x108)
+/* SENS_SARADC_RESET : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_SARADC_RESET    (BIT(30))
+#define SENS_SARADC_RESET_M  (BIT(30))
+#define SENS_SARADC_RESET_V  0x1
+#define SENS_SARADC_RESET_S  30
+/* SENS_TSENS_RESET : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_TSENS_RESET    (BIT(29))
+#define SENS_TSENS_RESET_M  (BIT(29))
+#define SENS_TSENS_RESET_V  0x1
+#define SENS_TSENS_RESET_S  29
+/* SENS_RTC_I2C_RESET : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_RTC_I2C_RESET    (BIT(27))
+#define SENS_RTC_I2C_RESET_M  (BIT(27))
+#define SENS_RTC_I2C_RESET_V  0x1
+#define SENS_RTC_I2C_RESET_S  27
+/* SENS_COCPU_RESET : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_RESET    (BIT(25))
+#define SENS_COCPU_RESET_M  (BIT(25))
+#define SENS_COCPU_RESET_V  0x1
+#define SENS_COCPU_RESET_S  25
+
+#define SENS_SAR_COCPU_INT_ENA_W1TS_REG          (DR_REG_SENS_BASE + 0x10C)
+/* SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_W1TS : WO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_W1TS    (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_W1TS_M  (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_W1TS_S  11
+/* SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TS : WO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TS    (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TS_M  (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TS_S  10
+/* SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_W1TS : WO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_W1TS    (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_W1TS_M  (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_W1TS_S  9
+/* SENS_COCPU_SWD_INT_ENA_W1TS : WO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SWD_INT_ENA_W1TS    (BIT(8))
+#define SENS_COCPU_SWD_INT_ENA_W1TS_M  (BIT(8))
+#define SENS_COCPU_SWD_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_SWD_INT_ENA_W1TS_S  8
+/* SENS_COCPU_SW_INT_ENA_W1TS : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SW_INT_ENA_W1TS    (BIT(7))
+#define SENS_COCPU_SW_INT_ENA_W1TS_M  (BIT(7))
+#define SENS_COCPU_SW_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_SW_INT_ENA_W1TS_S  7
+/* SENS_COCPU_START_INT_ENA_W1TS : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_START_INT_ENA_W1TS    (BIT(6))
+#define SENS_COCPU_START_INT_ENA_W1TS_M  (BIT(6))
+#define SENS_COCPU_START_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_START_INT_ENA_W1TS_S  6
+/* SENS_COCPU_TSENS_INT_ENA_W1TS : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TSENS_INT_ENA_W1TS    (BIT(5))
+#define SENS_COCPU_TSENS_INT_ENA_W1TS_M  (BIT(5))
+#define SENS_COCPU_TSENS_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_TSENS_INT_ENA_W1TS_S  5
+/* SENS_COCPU_SARADC2_INT_ENA_W1TS : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SARADC2_INT_ENA_W1TS    (BIT(4))
+#define SENS_COCPU_SARADC2_INT_ENA_W1TS_M  (BIT(4))
+#define SENS_COCPU_SARADC2_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_SARADC2_INT_ENA_W1TS_S  4
+/* SENS_COCPU_SARADC1_INT_ENA_W1TS : WO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SARADC1_INT_ENA_W1TS    (BIT(3))
+#define SENS_COCPU_SARADC1_INT_ENA_W1TS_M  (BIT(3))
+#define SENS_COCPU_SARADC1_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_SARADC1_INT_ENA_W1TS_S  3
+/* SENS_COCPU_TOUCH_ACTIVE_INT_ENA_W1TS : WO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA_W1TS    (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA_W1TS_M  (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA_W1TS_S  2
+/* SENS_COCPU_TOUCH_INACTIVE_INT_ENA_W1TS : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA_W1TS    (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA_W1TS_M  (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA_W1TS_S  1
+/* SENS_COCPU_TOUCH_DONE_INT_ENA_W1TS : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_DONE_INT_ENA_W1TS    (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_ENA_W1TS_M  (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_ENA_W1TS_V  0x1
+#define SENS_COCPU_TOUCH_DONE_INT_ENA_W1TS_S  0
+
+#define SENS_SAR_COCPU_INT_ENA_W1TC_REG          (DR_REG_SENS_BASE + 0x110)
+/* SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_W1TC : WO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_W1TC    (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_W1TC_M  (BIT(11))
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_TOUCH_SCAN_DONE_INT_ENA_W1TC_S  11
+/* SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TC : WO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TC    (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TC_M  (BIT(10))
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ENA_W1TC_S  10
+/* SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_W1TC : WO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_W1TC    (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_W1TC_M  (BIT(9))
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_TOUCH_TIMEOUT_INT_ENA_W1TC_S  9
+/* SENS_COCPU_SWD_INT_ENA_W1TC : WO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SWD_INT_ENA_W1TC    (BIT(8))
+#define SENS_COCPU_SWD_INT_ENA_W1TC_M  (BIT(8))
+#define SENS_COCPU_SWD_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_SWD_INT_ENA_W1TC_S  8
+/* SENS_COCPU_SW_INT_ENA_W1TC : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SW_INT_ENA_W1TC    (BIT(7))
+#define SENS_COCPU_SW_INT_ENA_W1TC_M  (BIT(7))
+#define SENS_COCPU_SW_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_SW_INT_ENA_W1TC_S  7
+/* SENS_COCPU_START_INT_ENA_W1TC : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_START_INT_ENA_W1TC    (BIT(6))
+#define SENS_COCPU_START_INT_ENA_W1TC_M  (BIT(6))
+#define SENS_COCPU_START_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_START_INT_ENA_W1TC_S  6
+/* SENS_COCPU_TSENS_INT_ENA_W1TC : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TSENS_INT_ENA_W1TC    (BIT(5))
+#define SENS_COCPU_TSENS_INT_ENA_W1TC_M  (BIT(5))
+#define SENS_COCPU_TSENS_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_TSENS_INT_ENA_W1TC_S  5
+/* SENS_COCPU_SARADC2_INT_ENA_W1TC : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SARADC2_INT_ENA_W1TC    (BIT(4))
+#define SENS_COCPU_SARADC2_INT_ENA_W1TC_M  (BIT(4))
+#define SENS_COCPU_SARADC2_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_SARADC2_INT_ENA_W1TC_S  4
+/* SENS_COCPU_SARADC1_INT_ENA_W1TC : WO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_SARADC1_INT_ENA_W1TC    (BIT(3))
+#define SENS_COCPU_SARADC1_INT_ENA_W1TC_M  (BIT(3))
+#define SENS_COCPU_SARADC1_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_SARADC1_INT_ENA_W1TC_S  3
+/* SENS_COCPU_TOUCH_ACTIVE_INT_ENA_W1TC : WO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA_W1TC    (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA_W1TC_M  (BIT(2))
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_TOUCH_ACTIVE_INT_ENA_W1TC_S  2
+/* SENS_COCPU_TOUCH_INACTIVE_INT_ENA_W1TC : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA_W1TC    (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA_W1TC_M  (BIT(1))
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_TOUCH_INACTIVE_INT_ENA_W1TC_S  1
+/* SENS_COCPU_TOUCH_DONE_INT_ENA_W1TC : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENS_COCPU_TOUCH_DONE_INT_ENA_W1TC    (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_ENA_W1TC_M  (BIT(0))
+#define SENS_COCPU_TOUCH_DONE_INT_ENA_W1TC_V  0x1
+#define SENS_COCPU_TOUCH_DONE_INT_ENA_W1TC_S  0
+
+#define SENS_SAR_DEBUG_CONF_REG          (DR_REG_SENS_BASE + 0x114)
+/* SENS_DEBUG_BIT_SEL : R/W ;bitpos:[4:0] ;default: 5'b0 ; */
+/*description: .*/
+#define SENS_DEBUG_BIT_SEL    0x0000001F
+#define SENS_DEBUG_BIT_SEL_M  ((SENS_DEBUG_BIT_SEL_V)<<(SENS_DEBUG_BIT_SEL_S))
+#define SENS_DEBUG_BIT_SEL_V  0x1F
+#define SENS_DEBUG_BIT_SEL_S  0
+
+#define SENS_SARDATE_REG          (DR_REG_SENS_BASE + 0x1FC)
+/* SENS_SAR_DATE : R/W ;bitpos:[27:0] ;default: 28'h2101180 ; */
+/*description: .*/
+#define SENS_SAR_DATE    0x0FFFFFFF
+#define SENS_SAR_DATE_M  ((SENS_SAR_DATE_V)<<(SENS_SAR_DATE_S))
+#define SENS_SAR_DATE_V  0xFFFFFFF
+#define SENS_SAR_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SENS_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sens_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sens_struct.h
new file mode 100644
index 00000000000..c2a104d4ccf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sens_struct.h
@@ -0,0 +1,530 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _SOC_SENS_STRUCT_H_
+#define _SOC_SENS_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct sens_dev_s {
+    union {
+        struct {
+            uint32_t sar1_clk_div                  :    8;  /*clock divider*/
+            uint32_t reserved8                     :    10;
+            uint32_t sar1_clk_gated                :    1;
+            uint32_t sar1_sample_num               :    8;
+            uint32_t reserved27                    :    1;
+            uint32_t sar1_data_inv                 :    1;  /*Invert SAR ADC1 data*/
+            uint32_t sar1_int_en                   :    1;  /*enable saradc1 to send out interrupt*/
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } sar_reader1_ctrl;
+    uint32_t sar_reader1_status;
+    union {
+        struct {
+            uint32_t reserved0                     :    24;
+            uint32_t force_xpd_amp                 :    2;
+            uint32_t amp_rst_fb_force              :    2;
+            uint32_t amp_short_ref_force           :    2;
+            uint32_t amp_short_ref_gnd_force       :    2;
+        };
+        uint32_t val;
+    } sar_meas1_ctrl1;
+    union {
+        struct {
+            uint32_t meas1_data_sar                :    16;  /*SAR ADC1 data*/
+            uint32_t meas1_done_sar                :    1;  /*SAR ADC1 conversion done indication*/
+            uint32_t meas1_start_sar               :    1;  /*SAR ADC1 controller (in RTC) starts conversion*/
+            uint32_t meas1_start_force             :    1;  /*1: SAR ADC1 controller (in RTC) is started by SW*/
+            uint32_t sar1_en_pad                   :    12;  /*SAR ADC1 pad enable bitmap*/
+            uint32_t sar1_en_pad_force             :    1;  /*1: SAR ADC1 pad enable bitmap is controlled by SW*/
+        };
+        uint32_t val;
+    } sar_meas1_ctrl2;
+    union {
+        struct {
+            uint32_t reserved0                     :    31;
+            uint32_t sar1_dig_force                :    1;  /*1: SAR ADC1 controlled by DIG ADC1 CTRL*/
+        };
+        uint32_t val;
+    } sar_meas1_mux;
+    uint32_t sar_atten1;
+    union {
+        struct {
+            uint32_t sar_amp_wait1                 :    16;
+            uint32_t sar_amp_wait2                 :    16;
+        };
+        uint32_t val;
+    } sar_amp_ctrl1;
+    union {
+        struct {
+            uint32_t sar1_dac_xpd_fsm_idle         :    1;
+            uint32_t xpd_sar_amp_fsm_idle          :    1;
+            uint32_t amp_rst_fb_fsm_idle           :    1;
+            uint32_t amp_short_ref_fsm_idle        :    1;
+            uint32_t amp_short_ref_gnd_fsm_idle    :    1;
+            uint32_t xpd_sar_fsm_idle              :    1;
+            uint32_t sar_rstb_fsm_idle             :    1;
+            uint32_t reserved7                     :    9;
+            uint32_t sar_amp_wait3                 :    16;
+        };
+        uint32_t val;
+    } sar_amp_ctrl2;
+    union {
+        struct {
+            uint32_t sar1_dac_xpd_fsm              :    4;
+            uint32_t xpd_sar_amp_fsm               :    4;
+            uint32_t amp_rst_fb_fsm                :    4;
+            uint32_t amp_short_ref_fsm             :    4;
+            uint32_t amp_short_ref_gnd_fsm         :    4;
+            uint32_t xpd_sar_fsm                   :    4;
+            uint32_t sar_rstb_fsm                  :    4;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } sar_amp_ctrl3;
+    union {
+        struct {
+            uint32_t sar2_clk_div                  :    8;  /*clock divider*/
+            uint32_t reserved8                     :    8;
+            uint32_t sar2_wait_arb_cycle           :    2;  /*wait arbit stable after sar_done*/
+            uint32_t sar2_clk_gated                :    1;
+            uint32_t sar2_sample_num               :    8;
+            uint32_t reserved27                    :    2;
+            uint32_t sar2_data_inv                 :    1;  /*Invert SAR ADC2 data*/
+            uint32_t sar2_int_en                   :    1;  /*enable saradc2 to send out interrupt*/
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } sar_reader2_ctrl;
+    uint32_t sar_reader2_status;
+    union {
+        struct {
+            uint32_t sar2_cntl_state               :    3;  /*saradc2_cntl_fsm*/
+            uint32_t sar2_pwdet_cal_en             :    1;  /*rtc control pwdet enable*/
+            uint32_t sar2_pkdet_cal_en             :    1;  /*rtc control pkdet enable*/
+            uint32_t sar2_en_test                  :    1;  /*SAR2_EN_TEST*/
+            uint32_t sar2_rstb_force               :    2;
+            uint32_t sar2_standby_wait             :    8;
+            uint32_t sar2_rstb_wait                :    8;
+            uint32_t sar2_xpd_wait                 :    8;
+        };
+        uint32_t val;
+    } sar_meas2_ctrl1;
+    union {
+        struct {
+            uint32_t meas2_data_sar                :    16;  /*SAR ADC2 data*/
+            uint32_t meas2_done_sar                :    1;  /*SAR ADC2 conversion done indication*/
+            uint32_t meas2_start_sar               :    1;  /*SAR ADC2 controller (in RTC) starts conversion*/
+            uint32_t meas2_start_force             :    1;  /*1: SAR ADC2 controller (in RTC) is started by SW*/
+            uint32_t sar2_en_pad                   :    12;  /*SAR ADC2 pad enable bitmap*/
+            uint32_t sar2_en_pad_force             :    1;  /*1: SAR ADC2 pad enable bitmap is controlled by SW*/
+        };
+        uint32_t val;
+    } sar_meas2_ctrl2;
+    union {
+        struct {
+            uint32_t reserved0                     :    28;
+            uint32_t sar2_pwdet_cct                :    3;  /*SAR2_PWDET_CCT*/
+            uint32_t sar2_rtc_force                :    1;  /*in sleep, force to use rtc to control ADC*/
+        };
+        uint32_t val;
+    } sar_meas2_mux;
+    uint32_t sar_atten2;
+    union {
+        struct {
+            uint32_t reserved0                     :    29;
+            uint32_t force_xpd_sar                 :    2;
+            uint32_t sarclk_en                     :    1;
+        };
+        uint32_t val;
+    } sar_power_xpd_sar;
+    union {
+        struct {
+            uint32_t i2c_slave_addr1               :    11;
+            uint32_t i2c_slave_addr0               :    11;
+            uint32_t meas_status                   :    8;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } sar_slave_addr1;
+    union {
+        struct {
+            uint32_t i2c_slave_addr3               :    11;
+            uint32_t i2c_slave_addr2               :    11;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } sar_slave_addr2;
+    union {
+        struct {
+            uint32_t i2c_slave_addr5               :    11;
+            uint32_t i2c_slave_addr4               :    11;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } sar_slave_addr3;
+    union {
+        struct {
+            uint32_t i2c_slave_addr7               :    11;
+            uint32_t i2c_slave_addr6               :    11;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } sar_slave_addr4;
+    union {
+        struct {
+            uint32_t tsens_out                     :    8;  /*temperature sensor data out*/
+            uint32_t tsens_ready                   :    1;  /*indicate temperature sensor out ready*/
+            uint32_t reserved9                     :    3;
+            uint32_t tsens_int_en                  :    1;  /*enable temperature sensor to send out interrupt*/
+            uint32_t tsens_in_inv                  :    1;  /*invert temperature sensor data*/
+            uint32_t tsens_clk_div                 :    8;  /*temperature sensor clock divider*/
+            uint32_t tsens_power_up                :    1;  /*temperature sensor power up*/
+            uint32_t tsens_power_up_force          :    1;  /*1: dump out & power up controlled by SW*/
+            uint32_t tsens_dump_out                :    1;  /*temperature sensor dump out*/
+            uint32_t reserved25                    :    7;
+        };
+        uint32_t val;
+    } sar_tctrl;
+    union {
+        struct {
+            uint32_t tsens_xpd_wait                :    12;
+            uint32_t tsens_xpd_force               :    2;
+            uint32_t tsens_clk_inv                 :    1;
+            uint32_t reserved15                    :    17;
+        };
+        uint32_t val;
+    } sar_tctrl2;
+    union {
+        struct {
+            uint32_t sar_i2c_ctrl                  :    28;  /*I2C control data*/
+            uint32_t sar_i2c_start                 :    1;  /*start I2C*/
+            uint32_t sar_i2c_start_force           :    1;  /*1: I2C started by SW*/
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } sar_i2c_ctrl;
+    union {
+        struct {
+            uint32_t touch_outen                   :    15;  /*touch controller output enable*/
+            uint32_t touch_status_clr              :    1;  /*clear all touch active status*/
+            uint32_t touch_data_sel                :    2;  /*3: smooth data 2: baseline 1,0: raw_data*/
+            uint32_t touch_denoise_end             :    1;  /*touch_denoise_done*/
+            uint32_t touch_unit_end                :    1;  /*touch_unit_done*/
+            uint32_t touch_approach_pad2           :    4;  /*indicate which pad is approach pad2*/
+            uint32_t touch_approach_pad1           :    4;  /*indicate which pad is approach pad1*/
+            uint32_t touch_approach_pad0           :    4;  /*indicate which pad is approach pad0*/
+        };
+        uint32_t val;
+    } sar_touch_conf;
+    union {
+        struct {
+            uint32_t touch_denoise_data            :    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } sar_touch_denoise;
+    union {
+        struct {
+            uint32_t thresh                        :    22;  /*Finger threshold for touch pad 1*/
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } touch_thresh[14];
+    union {
+        struct {
+            uint32_t touch_pad_active              :    15;  /*touch active status*/
+            uint32_t touch_channel_clr             :    15;  /*Clear touch channel*/
+            uint32_t reserved30                    :    1;
+            uint32_t touch_meas_done               :    1;
+        };
+        uint32_t val;
+    } sar_touch_chn_st;
+    union {
+        struct {
+            uint32_t touch_denoise_data            :    22;  /*the counter for touch pad 0*/
+            uint32_t touch_scan_curr               :    4;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } sar_touch_status0;
+    union {
+        struct {
+            uint32_t touch_pad_data               :    22;
+            uint32_t reserved22                    :    7;
+            uint32_t touch_pad_debounce            :    3;
+        };
+        uint32_t val;
+    } sar_touch_status[14];
+    union {
+        struct {
+            uint32_t touch_slp_data                :    22;
+            uint32_t reserved22                    :    7;
+            uint32_t touch_slp_debounce            :    3;
+        };
+        uint32_t val;
+    } sar_touch_slp_status;
+    union {
+        struct {
+            uint32_t touch_approach_pad2_cnt       :    8;
+            uint32_t touch_approach_pad1_cnt       :    8;
+            uint32_t touch_approach_pad0_cnt       :    8;
+            uint32_t touch_slp_approach_cnt        :    8;
+        };
+        uint32_t val;
+    } sar_touch_appr_status;
+    union {
+        struct {
+            uint32_t reserved0                     :    25;
+            uint32_t dbg_trigger                   :    1;  /*trigger cocpu debug registers*/
+            uint32_t clk_en_st                     :    1;  /*check cocpu whether clk on*/
+            uint32_t reset_n                       :    1;  /*check cocpu whether in reset state*/
+            uint32_t eoi                           :    1;  /*check cocpu whether in interrupt state*/
+            uint32_t trap                          :    1;  /*check cocpu whether in trap state*/
+            uint32_t ebreak                        :    1;  /*check cocpu whether in ebreak*/
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } sar_cocpu_state;
+    union {
+        struct {
+            uint32_t touch_done                    :    1;  /*int from touch done*/
+            uint32_t touch_inactive                :    1;  /*int from touch inactive*/
+            uint32_t touch_active                  :    1;  /*int from touch active*/
+            uint32_t saradc1                       :    1;  /*int from saradc1*/
+            uint32_t saradc2                       :    1;  /*int from saradc2*/
+            uint32_t tsens                         :    1;  /*int from tsens*/
+            uint32_t start                         :    1;  /*int from start*/
+            uint32_t sw                            :    1;  /*int from software*/
+            uint32_t swd                           :    1;  /*int from super watch dog*/
+            uint32_t touch_timeout                 :    1;
+            uint32_t touch_approach_loop_done      :    1;
+            uint32_t touch_scan_done               :    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } sar_cocpu_int_raw;
+    union {
+        struct {
+            uint32_t touch_done                    :    1;
+            uint32_t touch_inactive                :    1;
+            uint32_t touch_active                  :    1;
+            uint32_t saradc1                       :    1;
+            uint32_t saradc2                       :    1;
+            uint32_t tsens                         :    1;
+            uint32_t start                         :    1;
+            uint32_t sw                            :    1;  /*cocpu int enable*/
+            uint32_t swd                           :    1;
+            uint32_t touch_timeout                 :    1;
+            uint32_t touch_approach_loop_done      :    1;
+            uint32_t touch_scan_done               :    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } sar_cocpu_int_ena;
+    union {
+        struct {
+            uint32_t touch_done                    :    1;
+            uint32_t touch_inactive                :    1;
+            uint32_t touch_active                  :    1;
+            uint32_t saradc1                       :    1;
+            uint32_t saradc2                       :    1;
+            uint32_t tsens                         :    1;
+            uint32_t start                         :    1;
+            uint32_t sw                            :    1;  /*cocpu int status*/
+            uint32_t swd                           :    1;
+            uint32_t touch_timeout                 :    1;
+            uint32_t touch_approach_loop_done      :    1;
+            uint32_t touch_scan_done               :    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } sar_cocpu_int_st;
+    union {
+        struct {
+            uint32_t touch_done                    :    1;
+            uint32_t touch_inactive                :    1;
+            uint32_t touch_active                  :    1;
+            uint32_t saradc1                       :    1;
+            uint32_t saradc2                       :    1;
+            uint32_t tsens                         :    1;
+            uint32_t start                         :    1;
+            uint32_t sw                            :    1;  /*cocpu int clear*/
+            uint32_t swd                           :    1;
+            uint32_t touch_timeout                 :    1;
+            uint32_t touch_approach_loop_done      :    1;
+            uint32_t touch_scan_done               :    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } sar_cocpu_int_clr;
+    union {
+        struct {
+            uint32_t pc                            :    13;  /*cocpu Program counter*/
+            uint32_t mem_vld                       :    1;  /*cocpu mem valid output*/
+            uint32_t mem_rdy                       :    1;  /*cocpu mem ready input*/
+            uint32_t mem_wen                       :    4;  /*cocpu mem write enable output*/
+            uint32_t mem_addr                      :    13;  /*cocpu mem address output*/
+        };
+        uint32_t val;
+    } sar_cocpu_debug;
+    union {
+        struct {
+            uint32_t reserved0                     :    28;
+            uint32_t xpd_hall                      :    1;  /*Power on hall sensor and connect to VP and VN*/
+            uint32_t xpd_hall_force                :    1;  /*1: XPD HALL is controlled by SW. 0: XPD HALL is controlled by FSM in ULP-coprocessor*/
+            uint32_t hall_phase                    :    1;  /*Reverse phase of hall sensor*/
+            uint32_t hall_phase_force              :    1;  /*1: HALL PHASE is controlled by SW  0: HALL PHASE is controlled by FSM in ULP-coprocessor*/
+        };
+        uint32_t val;
+    } sar_hall_ctrl;
+    uint32_t sar_nouse;
+    union {
+        struct {
+            uint32_t reserved0                     :    27;
+            uint32_t rtc_i2c_clk_en                :    1;
+            uint32_t reserved28                    :    1;
+            uint32_t tsens_clk_en                  :    1;
+            uint32_t saradc_clk_en                 :    1;
+            uint32_t iomux_clk_en                  :    1;
+        };
+        uint32_t val;
+    } sar_peri_clk_gate_conf;
+    union {
+        struct {
+            uint32_t reserved0                     :    25;
+            uint32_t reset                         :    1;
+            uint32_t reserved26                    :    1;
+            uint32_t rtc_i2c_reset                 :    1;
+            uint32_t reserved28                    :    1;
+            uint32_t tsens_reset                   :    1;
+            uint32_t saradc_reset                  :    1;
+            uint32_t reserved31                    :    1;
+        };
+        uint32_t val;
+    } sar_peri_reset_conf;
+    union {
+        struct {
+            uint32_t touch_done_w1ts               :    1;
+            uint32_t touch_inactive_w1ts           :    1;
+            uint32_t touch_active_w1ts             :    1;
+            uint32_t saradc1_w1ts                  :    1;
+            uint32_t saradc2_w1ts                  :    1;
+            uint32_t tsens_w1ts                    :    1;
+            uint32_t start_w1ts                    :    1;
+            uint32_t sw_w1ts                       :    1;
+            uint32_t swd_w1ts                      :    1;
+            uint32_t touch_timeout_w1ts            :    1;
+            uint32_t touch_approach_loop_done_w1ts :    1;
+            uint32_t touch_scan_done_w1ts          :    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } sar_cocpu_int_ena_w1ts;
+    union {
+        struct {
+            uint32_t touch_done_w1tc               :    1;
+            uint32_t touch_inactive_w1tc           :    1;
+            uint32_t touch_active_w1tc             :    1;
+            uint32_t saradc1_w1tc                  :    1;
+            uint32_t saradc2_w1tc                  :    1;
+            uint32_t tsens_w1tc                    :    1;
+            uint32_t start_w1tc                    :    1;
+            uint32_t sw_w1tc                       :    1;
+            uint32_t swd_w1tc                      :    1;
+            uint32_t touch_timeout_w1tc            :    1;
+            uint32_t touch_approach_loop_done_w1tc :    1;
+            uint32_t touch_scan_done_w1tc          :    1;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } sar_cocpu_int_ena_w1tc;
+    union {
+        struct {
+            uint32_t debug_bit_sel                 :    5;
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } sar_debug_conf;
+    uint32_t reserved_118;
+    uint32_t reserved_11c;
+    uint32_t reserved_120;
+    uint32_t reserved_124;
+    uint32_t reserved_128;
+    uint32_t reserved_12c;
+    uint32_t reserved_130;
+    uint32_t reserved_134;
+    uint32_t reserved_138;
+    uint32_t reserved_13c;
+    uint32_t reserved_140;
+    uint32_t reserved_144;
+    uint32_t reserved_148;
+    uint32_t reserved_14c;
+    uint32_t reserved_150;
+    uint32_t reserved_154;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    union {
+        struct {
+            uint32_t sar_date                      :    28;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } sardate;
+} sens_dev_t;
+extern sens_dev_t SENS;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SENS_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sensitive_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sensitive_reg.h
new file mode 100644
index 00000000000..a3393c5c056
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sensitive_reg.h
@@ -0,0 +1,4726 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_SENSITIVE_REG_H_
+#define _SOC_SENSITIVE_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SENSITIVE_CACHE_DATAARRAY_CONNECT_0_REG          (DR_REG_SENSITIVE_BASE + 0x0)
+/* SENSITIVE_CACHE_DATAARRAY_CONNECT_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CACHE_DATAARRAY_CONNECT_LOCK    (BIT(0))
+#define SENSITIVE_CACHE_DATAARRAY_CONNECT_LOCK_M  (BIT(0))
+#define SENSITIVE_CACHE_DATAARRAY_CONNECT_LOCK_V  0x1
+#define SENSITIVE_CACHE_DATAARRAY_CONNECT_LOCK_S  0
+
+#define SENSITIVE_CACHE_DATAARRAY_CONNECT_1_REG          (DR_REG_SENSITIVE_BASE + 0x4)
+/* SENSITIVE_CACHE_DATAARRAY_CONNECT_FLATTEN : R/W ;bitpos:[7:0] ;default: ~8'b0 ; */
+/*description: .*/
+#define SENSITIVE_CACHE_DATAARRAY_CONNECT_FLATTEN    0x000000FF
+#define SENSITIVE_CACHE_DATAARRAY_CONNECT_FLATTEN_M  ((SENSITIVE_CACHE_DATAARRAY_CONNECT_FLATTEN_V)<<(SENSITIVE_CACHE_DATAARRAY_CONNECT_FLATTEN_S))
+#define SENSITIVE_CACHE_DATAARRAY_CONNECT_FLATTEN_V  0xFF
+#define SENSITIVE_CACHE_DATAARRAY_CONNECT_FLATTEN_S  0
+
+#define SENSITIVE_APB_PERIPHERAL_ACCESS_0_REG          (DR_REG_SENSITIVE_BASE + 0x8)
+/* SENSITIVE_APB_PERIPHERAL_ACCESS_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_APB_PERIPHERAL_ACCESS_LOCK    (BIT(0))
+#define SENSITIVE_APB_PERIPHERAL_ACCESS_LOCK_M  (BIT(0))
+#define SENSITIVE_APB_PERIPHERAL_ACCESS_LOCK_V  0x1
+#define SENSITIVE_APB_PERIPHERAL_ACCESS_LOCK_S  0
+
+#define SENSITIVE_APB_PERIPHERAL_ACCESS_1_REG          (DR_REG_SENSITIVE_BASE + 0xC)
+/* SENSITIVE_APB_PERIPHERAL_ACCESS_SPLIT_BURST : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SENSITIVE_APB_PERIPHERAL_ACCESS_SPLIT_BURST    (BIT(0))
+#define SENSITIVE_APB_PERIPHERAL_ACCESS_SPLIT_BURST_M  (BIT(0))
+#define SENSITIVE_APB_PERIPHERAL_ACCESS_SPLIT_BURST_V  0x1
+#define SENSITIVE_APB_PERIPHERAL_ACCESS_SPLIT_BURST_S  0
+
+#define SENSITIVE_INTERNAL_SRAM_USAGE_0_REG          (DR_REG_SENSITIVE_BASE + 0x10)
+/* SENSITIVE_INTERNAL_SRAM_USAGE_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_INTERNAL_SRAM_USAGE_LOCK    (BIT(0))
+#define SENSITIVE_INTERNAL_SRAM_USAGE_LOCK_M  (BIT(0))
+#define SENSITIVE_INTERNAL_SRAM_USAGE_LOCK_V  0x1
+#define SENSITIVE_INTERNAL_SRAM_USAGE_LOCK_S  0
+
+#define SENSITIVE_INTERNAL_SRAM_USAGE_1_REG          (DR_REG_SENSITIVE_BASE + 0x14)
+/* SENSITIVE_INTERNAL_SRAM_CPU_USAGE : R/W ;bitpos:[10:4] ;default: ~7'h0 ; */
+/*description: .*/
+#define SENSITIVE_INTERNAL_SRAM_CPU_USAGE    0x0000007F
+#define SENSITIVE_INTERNAL_SRAM_CPU_USAGE_M  ((SENSITIVE_INTERNAL_SRAM_CPU_USAGE_V)<<(SENSITIVE_INTERNAL_SRAM_CPU_USAGE_S))
+#define SENSITIVE_INTERNAL_SRAM_CPU_USAGE_V  0x7F
+#define SENSITIVE_INTERNAL_SRAM_CPU_USAGE_S  4
+/* SENSITIVE_INTERNAL_SRAM_DCACHE_USAGE : R/W ;bitpos:[3:2] ;default: ~2'h0 ; */
+/*description: .*/
+#define SENSITIVE_INTERNAL_SRAM_DCACHE_USAGE    0x00000003
+#define SENSITIVE_INTERNAL_SRAM_DCACHE_USAGE_M  ((SENSITIVE_INTERNAL_SRAM_DCACHE_USAGE_V)<<(SENSITIVE_INTERNAL_SRAM_DCACHE_USAGE_S))
+#define SENSITIVE_INTERNAL_SRAM_DCACHE_USAGE_V  0x3
+#define SENSITIVE_INTERNAL_SRAM_DCACHE_USAGE_S  2
+/* SENSITIVE_INTERNAL_SRAM_ICACHE_USAGE : R/W ;bitpos:[1:0] ;default: ~2'h0 ; */
+/*description: .*/
+#define SENSITIVE_INTERNAL_SRAM_ICACHE_USAGE    0x00000003
+#define SENSITIVE_INTERNAL_SRAM_ICACHE_USAGE_M  ((SENSITIVE_INTERNAL_SRAM_ICACHE_USAGE_V)<<(SENSITIVE_INTERNAL_SRAM_ICACHE_USAGE_S))
+#define SENSITIVE_INTERNAL_SRAM_ICACHE_USAGE_V  0x3
+#define SENSITIVE_INTERNAL_SRAM_ICACHE_USAGE_S  0
+
+#define SENSITIVE_INTERNAL_SRAM_USAGE_2_REG          (DR_REG_SENSITIVE_BASE + 0x18)
+/* SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_ALLOC : R/W ;bitpos:[17:16] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_ALLOC    0x00000003
+#define SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_ALLOC_M  ((SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_ALLOC_V)<<(SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_ALLOC_S))
+#define SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_ALLOC_V  0x3
+#define SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_ALLOC_S  16
+/* SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_ALLOC : R/W ;bitpos:[15:14] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_ALLOC    0x00000003
+#define SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_ALLOC_M  ((SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_ALLOC_V)<<(SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_ALLOC_S))
+#define SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_ALLOC_V  0x3
+#define SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_ALLOC_S  14
+/* SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_USAGE : R/W ;bitpos:[13:7] ;default: 7'b0 ; */
+/*description: .*/
+#define SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_USAGE    0x0000007F
+#define SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_USAGE_M  ((SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_USAGE_V)<<(SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_USAGE_S))
+#define SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_USAGE_V  0x7F
+#define SENSITIVE_INTERNAL_SRAM_CORE1_TRACE_USAGE_S  7
+/* SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_USAGE : R/W ;bitpos:[6:0] ;default: 7'b0 ; */
+/*description: .*/
+#define SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_USAGE    0x0000007F
+#define SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_USAGE_M  ((SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_USAGE_V)<<(SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_USAGE_S))
+#define SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_USAGE_V  0x7F
+#define SENSITIVE_INTERNAL_SRAM_CORE0_TRACE_USAGE_S  0
+
+#define SENSITIVE_INTERNAL_SRAM_USAGE_3_REG          (DR_REG_SENSITIVE_BASE + 0x1C)
+/* SENSITIVE_INTERNAL_SRAM_MAC_DUMP_USAGE : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: .*/
+#define SENSITIVE_INTERNAL_SRAM_MAC_DUMP_USAGE    0x0000000F
+#define SENSITIVE_INTERNAL_SRAM_MAC_DUMP_USAGE_M  ((SENSITIVE_INTERNAL_SRAM_MAC_DUMP_USAGE_V)<<(SENSITIVE_INTERNAL_SRAM_MAC_DUMP_USAGE_S))
+#define SENSITIVE_INTERNAL_SRAM_MAC_DUMP_USAGE_V  0xF
+#define SENSITIVE_INTERNAL_SRAM_MAC_DUMP_USAGE_S  0
+
+#define SENSITIVE_INTERNAL_SRAM_USAGE_4_REG          (DR_REG_SENSITIVE_BASE + 0x20)
+/* SENSITIVE_INTERNAL_SRAM_LOG_USAGE : R/W ;bitpos:[6:0] ;default: 7'b0 ; */
+/*description: .*/
+#define SENSITIVE_INTERNAL_SRAM_LOG_USAGE    0x0000007F
+#define SENSITIVE_INTERNAL_SRAM_LOG_USAGE_M  ((SENSITIVE_INTERNAL_SRAM_LOG_USAGE_V)<<(SENSITIVE_INTERNAL_SRAM_LOG_USAGE_S))
+#define SENSITIVE_INTERNAL_SRAM_LOG_USAGE_V  0x7F
+#define SENSITIVE_INTERNAL_SRAM_LOG_USAGE_S  0
+
+#define SENSITIVE_RETENTION_DISABLE_REG          (DR_REG_SENSITIVE_BASE + 0x24)
+/* SENSITIVE_RETENTION_DISABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_RETENTION_DISABLE    (BIT(0))
+#define SENSITIVE_RETENTION_DISABLE_M  (BIT(0))
+#define SENSITIVE_RETENTION_DISABLE_V  0x1
+#define SENSITIVE_RETENTION_DISABLE_S  0
+
+#define SENSITIVE_CACHE_TAG_ACCESS_0_REG          (DR_REG_SENSITIVE_BASE + 0x28)
+/* SENSITIVE_CACHE_TAG_ACCESS_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CACHE_TAG_ACCESS_LOCK    (BIT(0))
+#define SENSITIVE_CACHE_TAG_ACCESS_LOCK_M  (BIT(0))
+#define SENSITIVE_CACHE_TAG_ACCESS_LOCK_V  0x1
+#define SENSITIVE_CACHE_TAG_ACCESS_LOCK_S  0
+
+#define SENSITIVE_CACHE_TAG_ACCESS_1_REG          (DR_REG_SENSITIVE_BASE + 0x2C)
+/* SENSITIVE_PRO_D_TAG_WR_ACS : R/W ;bitpos:[3] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_PRO_D_TAG_WR_ACS    (BIT(3))
+#define SENSITIVE_PRO_D_TAG_WR_ACS_M  (BIT(3))
+#define SENSITIVE_PRO_D_TAG_WR_ACS_V  0x1
+#define SENSITIVE_PRO_D_TAG_WR_ACS_S  3
+/* SENSITIVE_PRO_D_TAG_RD_ACS : R/W ;bitpos:[2] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_PRO_D_TAG_RD_ACS    (BIT(2))
+#define SENSITIVE_PRO_D_TAG_RD_ACS_M  (BIT(2))
+#define SENSITIVE_PRO_D_TAG_RD_ACS_V  0x1
+#define SENSITIVE_PRO_D_TAG_RD_ACS_S  2
+/* SENSITIVE_PRO_I_TAG_WR_ACS : R/W ;bitpos:[1] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_PRO_I_TAG_WR_ACS    (BIT(1))
+#define SENSITIVE_PRO_I_TAG_WR_ACS_M  (BIT(1))
+#define SENSITIVE_PRO_I_TAG_WR_ACS_V  0x1
+#define SENSITIVE_PRO_I_TAG_WR_ACS_S  1
+/* SENSITIVE_PRO_I_TAG_RD_ACS : R/W ;bitpos:[0] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_PRO_I_TAG_RD_ACS    (BIT(0))
+#define SENSITIVE_PRO_I_TAG_RD_ACS_M  (BIT(0))
+#define SENSITIVE_PRO_I_TAG_RD_ACS_V  0x1
+#define SENSITIVE_PRO_I_TAG_RD_ACS_S  0
+
+#define SENSITIVE_CACHE_MMU_ACCESS_0_REG          (DR_REG_SENSITIVE_BASE + 0x30)
+/* SENSITIVE_CACHE_MMU_ACCESS_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CACHE_MMU_ACCESS_LOCK    (BIT(0))
+#define SENSITIVE_CACHE_MMU_ACCESS_LOCK_M  (BIT(0))
+#define SENSITIVE_CACHE_MMU_ACCESS_LOCK_V  0x1
+#define SENSITIVE_CACHE_MMU_ACCESS_LOCK_S  0
+
+#define SENSITIVE_CACHE_MMU_ACCESS_1_REG          (DR_REG_SENSITIVE_BASE + 0x34)
+/* SENSITIVE_PRO_MMU_WR_ACS : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: .*/
+#define SENSITIVE_PRO_MMU_WR_ACS    (BIT(1))
+#define SENSITIVE_PRO_MMU_WR_ACS_M  (BIT(1))
+#define SENSITIVE_PRO_MMU_WR_ACS_V  0x1
+#define SENSITIVE_PRO_MMU_WR_ACS_S  1
+/* SENSITIVE_PRO_MMU_RD_ACS : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SENSITIVE_PRO_MMU_RD_ACS    (BIT(0))
+#define SENSITIVE_PRO_MMU_RD_ACS_M  (BIT(0))
+#define SENSITIVE_PRO_MMU_RD_ACS_V  0x1
+#define SENSITIVE_PRO_MMU_RD_ACS_S  0
+
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x38)
+/* SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x3C)
+/* SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI2_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x40)
+/* SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x44)
+/* SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_SPI3_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x48)
+/* SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x4C)
+/* SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_UHCI0_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x50)
+/* SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x54)
+/* SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S0_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x58)
+/* SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x5C)
+/* SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_I2S1_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x60)
+/* SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x64)
+/* SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_MAC_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x68)
+/* SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x6C)
+/* SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x70)
+/* SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x74)
+/* SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_AES_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x78)
+/* SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x7C)
+/* SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_SHA_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x80)
+/* SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x84)
+/* SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x88)
+/* SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x8C)
+/* SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_RMT_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x90)
+/* SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x94)
+/* SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x98)
+/* SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x9C)
+/* SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_USB_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0xA0)
+/* SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0xA4)
+/* SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_LC_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0xA8)
+/* SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0xAC)
+/* SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_3    0x00000003
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_3_M  ((SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_3_V)<<(SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_3_S))
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_3_V  0x3
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_3_S  6
+/* SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_2    0x00000003
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_2_M  ((SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_2_V)<<(SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_2_S))
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_2_V  0x3
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_2_S  4
+/* SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_1    0x00000003
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_1_M  ((SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_1_V)<<(SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_1_S))
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_1_V  0x3
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_1_S  2
+/* SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_0    0x00000003
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_0_M  ((SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_0_V)<<(SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_0_S))
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_0_V  0x3
+#define SENSITIVE_DMA_APBPERI_SDIO_PMS_CONSTRAIN_SRAM_PMS_0_S  0
+
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_0_REG          (DR_REG_SENSITIVE_BASE + 0xB0)
+/* SENSITIVE_DMA_APBPERI_PMS_MONITOR_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_LOCK    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_LOCK_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_LOCK_V  0x1
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_LOCK_S  0
+
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_1_REG          (DR_REG_SENSITIVE_BASE + 0xB4)
+/* SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_EN : R/W ;bitpos:[1] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_EN    (BIT(1))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_EN_M  (BIT(1))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_EN_V  0x1
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_EN_S  1
+/* SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_CLR : R/W ;bitpos:[0] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_CLR    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_CLR_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_CLR_V  0x1
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_CLR_S  0
+
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_2_REG          (DR_REG_SENSITIVE_BASE + 0xB8)
+/* SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_ADDR : RO ;bitpos:[24:3] ;default: 22'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_ADDR    0x003FFFFF
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_ADDR_M  ((SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_ADDR_V)<<(SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_ADDR_S))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_ADDR_V  0x3FFFFF
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_ADDR_S  3
+/* SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WORLD : RO ;bitpos:[2:1] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WORLD    0x00000003
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WORLD_M  ((SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WORLD_V)<<(SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WORLD_S))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WORLD_V  0x3
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WORLD_S  1
+/* SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_V  0x1
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_S  0
+
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_3_REG          (DR_REG_SENSITIVE_BASE + 0xBC)
+/* SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_BYTEEN : RO ;bitpos:[16:1] ;default: 16'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_BYTEEN    0x0000FFFF
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_M  ((SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_V)<<(SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_S))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_V  0xFFFF
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_S  1
+/* SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WR    (BIT(0))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WR_M  (BIT(0))
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WR_V  0x1
+#define SENSITIVE_DMA_APBPERI_PMS_MONITOR_VIOLATE_STATUS_WR_S  0
+
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0xC0)
+/* SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0xC4)
+/* SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR : R/W ;bitpos:[21:14] ;default: 8'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR    0x000000FF
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR_M  ((SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR_V)<<(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR_S))
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR_V  0xFF
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR_S  14
+/* SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_6 : R/W ;bitpos:[13:12] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_6    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_6_M  ((SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_6_V)<<(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_6_S))
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_6_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_6_S  12
+/* SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_5 : R/W ;bitpos:[11:10] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_5    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_5_M  ((SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_5_V)<<(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_5_S))
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_5_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_5_S  10
+/* SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_4 : R/W ;bitpos:[9:8] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_4    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_4_M  ((SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_4_V)<<(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_4_S))
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_4_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_4_S  8
+/* SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_3 : R/W ;bitpos:[7:6] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_3    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_3_M  ((SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_3_V)<<(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_3_S))
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_3_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_3_S  6
+/* SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_2 : R/W ;bitpos:[5:4] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_2    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_2_M  ((SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_2_V)<<(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_2_S))
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_2_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_2_S  4
+/* SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_1 : R/W ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_1    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_1_M  ((SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_1_V)<<(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_1_S))
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_1_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_1_S  2
+/* SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_0 : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_0    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_0_M  ((SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_0_V)<<(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_0_S))
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_0_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_CATEGORY_0_S  0
+
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_2_REG          (DR_REG_SENSITIVE_BASE + 0xC8)
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_SPLITADDR : R/W ;bitpos:[21:14] ;default: 8'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_SPLITADDR    0x000000FF
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_SPLITADDR_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_SPLITADDR_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_SPLITADDR_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_SPLITADDR_V  0xFF
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_SPLITADDR_S  14
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_6 : R/W ;bitpos:[13:12] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_6    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_6_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_6_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_6_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_6_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_6_S  12
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_5 : R/W ;bitpos:[11:10] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_5    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_5_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_5_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_5_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_5_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_5_S  10
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_4 : R/W ;bitpos:[9:8] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_4    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_4_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_4_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_4_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_4_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_4_S  8
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_3 : R/W ;bitpos:[7:6] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_3    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_3_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_3_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_3_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_3_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_3_S  6
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_2 : R/W ;bitpos:[5:4] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_2    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_2_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_2_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_2_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_2_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_2_S  4
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_1 : R/W ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_1    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_1_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_1_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_1_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_1_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_1_S  2
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_0 : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_0    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_0_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_0_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_0_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_0_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_0_CATEGORY_0_S  0
+
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_3_REG          (DR_REG_SENSITIVE_BASE + 0xCC)
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_SPLITADDR : R/W ;bitpos:[21:14] ;default: 8'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_SPLITADDR    0x000000FF
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_SPLITADDR_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_SPLITADDR_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_SPLITADDR_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_SPLITADDR_V  0xFF
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_SPLITADDR_S  14
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_6 : R/W ;bitpos:[13:12] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_6    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_6_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_6_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_6_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_6_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_6_S  12
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_5 : R/W ;bitpos:[11:10] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_5    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_5_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_5_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_5_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_5_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_5_S  10
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_4 : R/W ;bitpos:[9:8] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_4    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_4_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_4_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_4_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_4_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_4_S  8
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_3 : R/W ;bitpos:[7:6] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_3    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_3_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_3_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_3_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_3_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_3_S  6
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_2 : R/W ;bitpos:[5:4] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_2    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_2_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_2_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_2_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_2_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_2_S  4
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_1 : R/W ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_1    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_1_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_1_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_1_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_1_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_1_S  2
+/* SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_0 : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_0    0x00000003
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_0_M  ((SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_0_V)<<(SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_0_S))
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_0_V  0x3
+#define SENSITIVE_CORE_X_IRAM0_SRAM_LINE_1_CATEGORY_0_S  0
+
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_4_REG          (DR_REG_SENSITIVE_BASE + 0xD0)
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_SPLITADDR : R/W ;bitpos:[21:14] ;default: 8'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_SPLITADDR    0x000000FF
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_SPLITADDR_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_SPLITADDR_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_SPLITADDR_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_SPLITADDR_V  0xFF
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_SPLITADDR_S  14
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_6 : R/W ;bitpos:[13:12] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_6    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_6_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_6_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_6_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_6_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_6_S  12
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_5 : R/W ;bitpos:[11:10] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_5    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_5_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_5_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_5_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_5_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_5_S  10
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_4 : R/W ;bitpos:[9:8] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_4    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_4_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_4_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_4_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_4_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_4_S  8
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_3 : R/W ;bitpos:[7:6] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_3    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_3_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_3_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_3_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_3_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_3_S  6
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_2 : R/W ;bitpos:[5:4] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_2    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_2_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_2_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_2_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_2_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_2_S  4
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_1 : R/W ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_1    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_1_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_1_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_1_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_1_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_1_S  2
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_0 : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_0    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_0_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_0_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_0_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_0_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_0_CATEGORY_0_S  0
+
+#define SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_5_REG          (DR_REG_SENSITIVE_BASE + 0xD4)
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_SPLITADDR : R/W ;bitpos:[21:14] ;default: 8'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_SPLITADDR    0x000000FF
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_SPLITADDR_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_SPLITADDR_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_SPLITADDR_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_SPLITADDR_V  0xFF
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_SPLITADDR_S  14
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_6 : R/W ;bitpos:[13:12] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_6    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_6_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_6_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_6_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_6_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_6_S  12
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_5 : R/W ;bitpos:[11:10] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_5    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_5_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_5_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_5_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_5_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_5_S  10
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_4 : R/W ;bitpos:[9:8] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_4    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_4_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_4_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_4_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_4_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_4_S  8
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_3 : R/W ;bitpos:[7:6] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_3    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_3_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_3_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_3_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_3_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_3_S  6
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_2 : R/W ;bitpos:[5:4] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_2    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_2_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_2_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_2_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_2_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_2_S  4
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_1 : R/W ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_1    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_1_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_1_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_1_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_1_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_1_S  2
+/* SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_0 : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_0    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_0_M  ((SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_0_V)<<(SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_0_S))
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_0_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_DMA_SRAM_LINE_1_CATEGORY_0_S  0
+
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0xD8)
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0xDC)
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS : R/W ;bitpos:[20:18] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_S  18
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[17:15] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1_S  15
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[14:12] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0_S  12
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3 : R/W ;bitpos:[11:9] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_S  9
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2 : R/W ;bitpos:[8:6] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_S  6
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1 : R/W ;bitpos:[5:3] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_S  3
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0 : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_S  0
+
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_2_REG          (DR_REG_SENSITIVE_BASE + 0xE0)
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS : R/W ;bitpos:[20:18] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_S  18
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[17:15] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1_S  15
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[14:12] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_S  12
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3 : R/W ;bitpos:[11:9] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_S  9
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2 : R/W ;bitpos:[8:6] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_S  6
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1 : R/W ;bitpos:[5:3] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_S  3
+/* SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0 : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0    0x00000007
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_M  ((SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_V)<<(SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_S))
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_V  0x7
+#define SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_S  0
+
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_0_REG          (DR_REG_SENSITIVE_BASE + 0xE4)
+/* SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_LOCK    (BIT(0))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_LOCK_V  0x1
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_LOCK_S  0
+
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_1_REG          (DR_REG_SENSITIVE_BASE + 0xE8)
+/* SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_EN : R/W ;bitpos:[1] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_EN    (BIT(1))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_EN_M  (BIT(1))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_EN_V  0x1
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_EN_S  1
+/* SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_CLR : R/W ;bitpos:[0] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_CLR    (BIT(0))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_CLR_M  (BIT(0))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_CLR_V  0x1
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_CLR_S  0
+
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_2_REG          (DR_REG_SENSITIVE_BASE + 0xEC)
+/* SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR : RO ;bitpos:[28:5] ;default: 24'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR    0x00FFFFFF
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_M  ((SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_V)<<(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_S))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_V  0xFFFFFF
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_S  5
+/* SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD : RO ;bitpos:[4:3] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD    0x00000003
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_M  ((SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_V)<<(SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_S))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_V  0x3
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_S  3
+/* SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE    (BIT(2))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE_M  (BIT(2))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE_V  0x1
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE_S  2
+/* SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR    (BIT(1))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_M  (BIT(1))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_V  0x1
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_S  1
+/* SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR    (BIT(0))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_M  (BIT(0))
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_V  0x1
+#define SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_S  0
+
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_0_REG          (DR_REG_SENSITIVE_BASE + 0xF0)
+/* SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_LOCK    (BIT(0))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_LOCK_V  0x1
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_LOCK_S  0
+
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_1_REG          (DR_REG_SENSITIVE_BASE + 0xF4)
+/* SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_EN : R/W ;bitpos:[1] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_EN    (BIT(1))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_EN_M  (BIT(1))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_EN_V  0x1
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_EN_S  1
+/* SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_CLR : R/W ;bitpos:[0] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_CLR    (BIT(0))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_CLR_M  (BIT(0))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_CLR_V  0x1
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_CLR_S  0
+
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_2_REG          (DR_REG_SENSITIVE_BASE + 0xF8)
+/* SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR : RO ;bitpos:[28:5] ;default: 24'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR    0x00FFFFFF
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_M  ((SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_V)<<(SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_S))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_V  0xFFFFFF
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_S  5
+/* SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD : RO ;bitpos:[4:3] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD    0x00000003
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_M  ((SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_V)<<(SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_S))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_V  0x3
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_S  3
+/* SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE    (BIT(2))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE_M  (BIT(2))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE_V  0x1
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_LOADSTORE_S  2
+/* SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR    (BIT(1))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_M  (BIT(1))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_V  0x1
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_S  1
+/* SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR    (BIT(0))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_M  (BIT(0))
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_V  0x1
+#define SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_S  0
+
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0xFC)
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x100)
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_S  26
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_S  24
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_1_S  22
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_CACHEDATAARRAY_PMS_0_S  20
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3 : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_S  18
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2 : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_S  16
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1 : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_S  14
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0 : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_S  12
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_1_S  10
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_CACHEDATAARRAY_PMS_0_S  8
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_S  6
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_S  4
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_S  2
+/* SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0    0x00000003
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_M  ((SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_V)<<(SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_S))
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_V  0x3
+#define SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_S  0
+
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_0_REG          (DR_REG_SENSITIVE_BASE + 0x104)
+/* SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_LOCK    (BIT(0))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_LOCK_V  0x1
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_LOCK_S  0
+
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_1_REG          (DR_REG_SENSITIVE_BASE + 0x108)
+/* SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_EN : R/W ;bitpos:[1] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_EN    (BIT(1))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_EN_M  (BIT(1))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_EN_V  0x1
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_EN_S  1
+/* SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_CLR : R/W ;bitpos:[0] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_CLR    (BIT(0))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_CLR_M  (BIT(0))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_CLR_V  0x1
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_CLR_S  0
+
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_2_REG          (DR_REG_SENSITIVE_BASE + 0x10C)
+/* SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR : RO ;bitpos:[25:4] ;default: 22'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR    0x003FFFFF
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_M  ((SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_V)<<(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_S))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_V  0x3FFFFF
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_S  4
+/* SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD : RO ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD    0x00000003
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_M  ((SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_V)<<(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_S))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_V  0x3
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_S  2
+/* SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK    (BIT(1))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK_M  (BIT(1))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK_V  0x1
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK_S  1
+/* SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR    (BIT(0))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_M  (BIT(0))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_V  0x1
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_S  0
+
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_3_REG          (DR_REG_SENSITIVE_BASE + 0x110)
+/* SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN : RO ;bitpos:[16:1] ;default: 16'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN    0x0000FFFF
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_M  ((SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_V)<<(SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_S))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_V  0xFFFF
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_S  1
+/* SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR    (BIT(0))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_M  (BIT(0))
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_V  0x1
+#define SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_S  0
+
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_0_REG          (DR_REG_SENSITIVE_BASE + 0x114)
+/* SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_LOCK    (BIT(0))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_LOCK_V  0x1
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_LOCK_S  0
+
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_1_REG          (DR_REG_SENSITIVE_BASE + 0x118)
+/* SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_EN : R/W ;bitpos:[1] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_EN    (BIT(1))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_EN_M  (BIT(1))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_EN_V  0x1
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_EN_S  1
+/* SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_CLR : R/W ;bitpos:[0] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_CLR    (BIT(0))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_CLR_M  (BIT(0))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_CLR_V  0x1
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_CLR_S  0
+
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_2_REG          (DR_REG_SENSITIVE_BASE + 0x11C)
+/* SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR : RO ;bitpos:[25:4] ;default: 22'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR    0x003FFFFF
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_M  ((SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_V)<<(SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_S))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_V  0x3FFFFF
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_ADDR_S  4
+/* SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD : RO ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD    0x00000003
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_M  ((SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_V)<<(SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_S))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_V  0x3
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WORLD_S  2
+/* SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK    (BIT(1))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK_M  (BIT(1))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK_V  0x1
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_LOCK_S  1
+/* SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR    (BIT(0))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_M  (BIT(0))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_V  0x1
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_S  0
+
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_3_REG          (DR_REG_SENSITIVE_BASE + 0x120)
+/* SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN : RO ;bitpos:[16:1] ;default: 16'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN    0x0000FFFF
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_M  ((SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_V)<<(SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_S))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_V  0xFFFF
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_BYTEEN_S  1
+/* SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR    (BIT(0))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_M  (BIT(0))
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_V  0x1
+#define SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_VIOLATE_STATUS_WR_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x124)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x128)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART1 : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART1_S  30
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S0 : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S0    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S0_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S0_S  28
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_S  26
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_MISC : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_MISC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_MISC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_MISC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_MISC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_MISC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_MISC_S  24
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_HINF : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_HINF    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_HINF_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_HINF_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_HINF_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_HINF_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_HINF_S  20
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX_S  16
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RTC : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RTC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RTC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RTC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RTC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RTC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RTC_S  14
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE_S  10
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE2 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE2    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE2_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE2_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE2_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE2_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_FE2_S  8
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_GPIO : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_GPIO    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_GPIO_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_GPIO_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_GPIO_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_GPIO_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_GPIO_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0_S  4
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1_S  2
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_2_REG          (DR_REG_SENSITIVE_BASE + 0x12C)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER_S  30
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1 : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1_S  28
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP_S  26
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM0 : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM0    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM0_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM0_S  24
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BB : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BB    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BB_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BB_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BB_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BB_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BB_S  22
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP_S  18
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LEDC : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LEDC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LEDC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LEDC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LEDC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LEDC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LEDC_S  16
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLC : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLC_S  14
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PCNT : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PCNT    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PCNT_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PCNT_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PCNT_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PCNT_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PCNT_S  12
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RMT : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RMT    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RMT_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RMT_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RMT_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RMT_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RMT_S  10
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST_S  8
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0_S  4
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_3_REG          (DR_REG_SENSITIVE_BASE + 0x130)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWR : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWR    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWR_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWR_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWR_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWR_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWR_S  28
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC_S  26
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RWBT : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RWBT    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RWBT_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RWBT_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RWBT_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RWBT_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_RWBT_S  22
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART2 : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART2    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART2_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART2_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART2_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART2_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_UART2_S  16
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S1 : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2S1_S  14
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM1 : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_PWM1_S  12
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CAN : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CAN    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CAN_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CAN_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CAN_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CAN_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CAN_S  10
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST_S  8
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL_S  4
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3_S  2
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_4_REG          (DR_REG_SENSITIVE_BASE + 0x134)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER_S  30
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DIO : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DIO    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DIO_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DIO_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DIO_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DIO_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DIO_S  28
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_AD : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_AD    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_AD_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_AD_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_AD_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_AD_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_AD_S  26
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG_S  24
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY_S  22
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT_S  20
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE_S  18
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM_S  16
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_S  14
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR_S  12
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM_S  10
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC_S  8
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI_S  4
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP_S  2
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_5_REG          (DR_REG_SENSITIVE_BASE + 0x138)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1 : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART1_S  30
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S0 : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S0    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S0_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S0_S  28
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_S  26
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_MISC_S  24
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_HINF : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_HINF    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_HINF_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_HINF_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_HINF_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_HINF_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_HINF_S  20
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_S  16
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RTC_S  14
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE_S  10
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_FE2_S  8
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_S  4
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_S  2
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_6_REG          (DR_REG_SENSITIVE_BASE + 0x13C)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER_S  30
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1 : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1_S  28
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP_S  26
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM0 : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM0    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM0_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM0_S  24
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BB : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BB    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BB_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BB_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BB_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BB_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BB_S  22
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP_S  18
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LEDC : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LEDC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LEDC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LEDC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LEDC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LEDC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LEDC_S  16
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLC : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLC_S  14
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PCNT : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PCNT    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PCNT_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PCNT_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PCNT_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PCNT_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PCNT_S  12
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RMT : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RMT    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RMT_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RMT_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RMT_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RMT_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RMT_S  10
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST_S  8
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0_S  4
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_7_REG          (DR_REG_SENSITIVE_BASE + 0x140)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWR : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWR    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWR_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWR_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWR_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWR_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWR_S  28
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC_S  26
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RWBT : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RWBT    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RWBT_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RWBT_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RWBT_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RWBT_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_RWBT_S  22
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART2 : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART2    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART2_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART2_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART2_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART2_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_UART2_S  16
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S1 : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2S1_S  14
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM1 : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_PWM1_S  12
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CAN : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CAN    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CAN_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CAN_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CAN_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CAN_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CAN_S  10
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST_S  8
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL_S  4
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3_S  2
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_8_REG          (DR_REG_SENSITIVE_BASE + 0x144)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_S  30
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DIO : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DIO    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DIO_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DIO_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DIO_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DIO_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DIO_S  28
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_AD : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_AD    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_AD_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_AD_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_AD_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_AD_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_AD_S  26
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_S  24
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_S  22
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_S  20
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_S  18
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_S  16
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_S  14
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_S  12
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_S  10
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_S  8
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_S  4
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_S  2
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_9_REG          (DR_REG_SENSITIVE_BASE + 0x148)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1 : R/W ;bitpos:[21:11] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1    0x000007FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_V  0x7FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_S  11
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0 : R/W ;bitpos:[10:0] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0    0x000007FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_V  0x7FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_10_REG          (DR_REG_SENSITIVE_BASE + 0x14C)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H : R/W ;bitpos:[11:9] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_S  9
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L : R/W ;bitpos:[8:6] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H : R/W ;bitpos:[5:3] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_S  3
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_11_REG          (DR_REG_SENSITIVE_BASE + 0x150)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1 : R/W ;bitpos:[21:11] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1    0x000007FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1_V  0x7FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1_S  11
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0 : R/W ;bitpos:[10:0] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0    0x000007FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0_V  0x7FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_12_REG          (DR_REG_SENSITIVE_BASE + 0x154)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H : R/W ;bitpos:[11:9] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H_S  9
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L : R/W ;bitpos:[8:6] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H : R/W ;bitpos:[5:3] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H_S  3
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_13_REG          (DR_REG_SENSITIVE_BASE + 0x158)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1 : R/W ;bitpos:[21:11] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1    0x000007FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_V  0x7FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_S  11
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0 : R/W ;bitpos:[10:0] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0    0x000007FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_V  0x7FF
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_14_REG          (DR_REG_SENSITIVE_BASE + 0x15C)
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H : R/W ;bitpos:[11:9] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_S  9
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L : R/W ;bitpos:[8:6] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H : R/W ;bitpos:[5:3] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_S  3
+/* SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_M  ((SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_V)<<(SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_S))
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x160)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x164)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10 : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10_S  20
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9 : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9_S  18
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8 : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8_S  16
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7 : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7_S  14
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6 : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6_S  12
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5_S  10
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4_S  8
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3_S  6
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2_S  4
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1_S  2
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_2_REG          (DR_REG_SENSITIVE_BASE + 0x168)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10 : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10_S  20
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9 : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9_S  18
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8 : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8_S  16
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7 : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7_S  14
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6 : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6_S  12
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5_S  10
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4_S  8
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3_S  6
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2_S  4
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1_S  2
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0    0x00000003
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0_V  0x3
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_3_REG          (DR_REG_SENSITIVE_BASE + 0x16C)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_0 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_0    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_0_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_0_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_0_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_0_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_0_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_4_REG          (DR_REG_SENSITIVE_BASE + 0x170)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_1 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_1    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_1_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_1_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_1_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_1_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_1_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_5_REG          (DR_REG_SENSITIVE_BASE + 0x174)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_2 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_2    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_2_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_2_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_2_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_2_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_2_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_6_REG          (DR_REG_SENSITIVE_BASE + 0x178)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_3 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_3    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_3_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_3_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_3_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_3_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_3_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_7_REG          (DR_REG_SENSITIVE_BASE + 0x17C)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_4 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_4    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_4_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_4_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_4_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_4_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_4_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_8_REG          (DR_REG_SENSITIVE_BASE + 0x180)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_5 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_5    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_5_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_5_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_5_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_5_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_5_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_9_REG          (DR_REG_SENSITIVE_BASE + 0x184)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_6 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_6    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_6_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_6_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_6_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_6_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_6_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_10_REG          (DR_REG_SENSITIVE_BASE + 0x188)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_7 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_7    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_7_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_7_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_7_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_7_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_7_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_11_REG          (DR_REG_SENSITIVE_BASE + 0x18C)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_8 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_8    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_8_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_8_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_8_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_8_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_8_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_12_REG          (DR_REG_SENSITIVE_BASE + 0x190)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_9 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_9    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_9_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_9_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_9_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_9_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_9_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_13_REG          (DR_REG_SENSITIVE_BASE + 0x194)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_10 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_10    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_10_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_10_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_10_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_10_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_10_S  0
+
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_14_REG          (DR_REG_SENSITIVE_BASE + 0x198)
+/* SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_11 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_11    0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_11_M  ((SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_11_V)<<(SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_11_S))
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_11_V  0x3FFFFFFF
+#define SENSITIVE_CORE_0_REGION_PMS_CONSTRAIN_ADDR_11_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_0_REG          (DR_REG_SENSITIVE_BASE + 0x19C)
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_LOCK    (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_LOCK_V  0x1
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_LOCK_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_1_REG          (DR_REG_SENSITIVE_BASE + 0x1A0)
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_EN : R/W ;bitpos:[1] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_EN    (BIT(1))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_EN_M  (BIT(1))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_EN_V  0x1
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_EN_S  1
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_CLR : R/W ;bitpos:[0] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_CLR    (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_CLR_M  (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_CLR_V  0x1
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_CLR_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_2_REG          (DR_REG_SENSITIVE_BASE + 0x1A4)
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD : RO ;bitpos:[7:6] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_M  ((SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_V)<<(SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_S))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_S  6
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE    (BIT(5))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE_M  (BIT(5))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE_V  0x1
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE_S  5
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE : RO ;bitpos:[4:2] ;default: 3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE    0x00000007
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_M  ((SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_V)<<(SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_S))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_V  0x7
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_S  2
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0 : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0    (BIT(1))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0_M  (BIT(1))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0_V  0x1
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0_S  1
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR    (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_M  (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_V  0x1
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_3_REG          (DR_REG_SENSITIVE_BASE + 0x1A8)
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR    0xFFFFFFFF
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR_M  ((SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR_V)<<(SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR_S))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR_V  0xFFFFFFFF
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_4_REG          (DR_REG_SENSITIVE_BASE + 0x1AC)
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_EN : R/W ;bitpos:[1] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_EN    (BIT(1))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_EN_M  (BIT(1))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_EN_V  0x1
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_EN_S  1
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_CLR : R/W ;bitpos:[0] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_CLR    (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_CLR_M  (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_CLR_V  0x1
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_CLR_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_5_REG          (DR_REG_SENSITIVE_BASE + 0x1B0)
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD : RO ;bitpos:[4:3] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD_M  ((SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD_V)<<(SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD_S))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD_S  3
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE : RO ;bitpos:[2:1] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE    0x00000003
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE_M  ((SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE_V)<<(SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE_S))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE_V  0x3
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE_S  1
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_INTR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_INTR    (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_INTR_M  (BIT(0))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_INTR_V  0x1
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_INTR_S  0
+
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_6_REG          (DR_REG_SENSITIVE_BASE + 0x1B4)
+/* SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR    0xFFFFFFFF
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR_M  ((SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR_V)<<(SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR_S))
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR_V  0xFFFFFFFF
+#define SENSITIVE_CORE_0_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR_S  0
+
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x1B8)
+/* SENSITIVE_CORE_0_VECBASE_OVERRIDE_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_LOCK    (BIT(0))
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_LOCK_V  0x1
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_LOCK_S  0
+
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_0_REG          (DR_REG_SENSITIVE_BASE + 0x1BC)
+/* SENSITIVE_CORE_0_VECBASE_WORLD_MASK : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_VECBASE_WORLD_MASK    (BIT(0))
+#define SENSITIVE_CORE_0_VECBASE_WORLD_MASK_M  (BIT(0))
+#define SENSITIVE_CORE_0_VECBASE_WORLD_MASK_V  0x1
+#define SENSITIVE_CORE_0_VECBASE_WORLD_MASK_S  0
+
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_1_REG          (DR_REG_SENSITIVE_BASE + 0x1C0)
+/* SENSITIVE_CORE_0_VECBASE_OVERRIDE_SEL : R/W ;bitpos:[23:22] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_SEL    0x00000003
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_SEL_M  ((SENSITIVE_CORE_0_VECBASE_OVERRIDE_SEL_V)<<(SENSITIVE_CORE_0_VECBASE_OVERRIDE_SEL_S))
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_SEL_V  0x3
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_SEL_S  22
+/* SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD0_VALUE : R/W ;bitpos:[21:0] ;default: 22'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD0_VALUE    0x003FFFFF
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD0_VALUE_M  ((SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD0_VALUE_V)<<(SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD0_VALUE_S))
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD0_VALUE_V  0x3FFFFF
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD0_VALUE_S  0
+
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_2_REG          (DR_REG_SENSITIVE_BASE + 0x1C4)
+/* SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD1_VALUE : R/W ;bitpos:[21:0] ;default: 22'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD1_VALUE    0x003FFFFF
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD1_VALUE_M  ((SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD1_VALUE_V)<<(SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD1_VALUE_S))
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD1_VALUE_V  0x3FFFFF
+#define SENSITIVE_CORE_0_VECBASE_OVERRIDE_WORLD1_VALUE_S  0
+
+#define SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_0_REG          (DR_REG_SENSITIVE_BASE + 0x1C8)
+/* SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_LOCK    (BIT(0))
+#define SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_LOCK_V  0x1
+#define SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_LOCK_S  0
+
+#define SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_1_REG          (DR_REG_SENSITIVE_BASE + 0x1CC)
+/* SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE    (BIT(0))
+#define SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_M  (BIT(0))
+#define SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_V  0x1
+#define SENSITIVE_CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x1D0)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x1D4)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART1 : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART1_S  30
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S0 : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S0    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S0_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S0_S  28
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_S  26
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_MISC : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_MISC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_MISC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_MISC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_MISC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_MISC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_MISC_S  24
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_HINF : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_HINF    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_HINF_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_HINF_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_HINF_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_HINF_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_HINF_S  20
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_IO_MUX_S  16
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RTC : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RTC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RTC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RTC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RTC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RTC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RTC_S  14
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE_S  10
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE2 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE2    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE2_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE2_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE2_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE2_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_FE2_S  8
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_GPIO : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_GPIO    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_GPIO_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_GPIO_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_GPIO_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_GPIO_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_GPIO_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_0_S  4
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_G0SPI_1_S  2
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_2_REG          (DR_REG_SENSITIVE_BASE + 0x1D8)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTIMER_S  30
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1 : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP1_S  28
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_TIMERGROUP_S  26
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM0 : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM0    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM0_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM0_S  24
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BB : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BB    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BB_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BB_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BB_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BB_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BB_S  22
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BACKUP_S  18
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LEDC : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LEDC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LEDC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LEDC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LEDC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LEDC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LEDC_S  16
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLC : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLC_S  14
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PCNT : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PCNT    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PCNT_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PCNT_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PCNT_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PCNT_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PCNT_S  12
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RMT : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RMT    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RMT_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RMT_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RMT_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RMT_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RMT_S  10
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SLCHOST_S  8
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UHCI0_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT0_S  4
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_3_REG          (DR_REG_SENSITIVE_BASE + 0x1DC)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWR : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWR    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWR_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWR_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWR_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWR_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWR_S  28
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WIFIMAC_S  26
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RWBT : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RWBT    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RWBT_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RWBT_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RWBT_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RWBT_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_RWBT_S  22
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART2 : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART2    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART2_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART2_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART2_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART2_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_UART2_S  16
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S1 : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2S1_S  14
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM1 : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_PWM1_S  12
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CAN : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CAN    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CAN_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CAN_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CAN_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CAN_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CAN_S  10
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SDIO_HOST_S  8
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_I2C_EXT1_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_CTRL_S  4
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_3_S  2
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SPI_2_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_4_REG          (DR_REG_SENSITIVE_BASE + 0x1E0)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER_S  30
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DIO : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DIO    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DIO_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DIO_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DIO_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DIO_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DIO_S  28
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_AD : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_AD    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_AD_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_AD_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_AD_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_AD_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_AD_S  26
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG_S  24
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY_S  22
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT_S  20
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE_S  18
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM_S  16
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_S  14
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR_S  12
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM_S  10
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC_S  8
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI_S  4
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP_S  2
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_5_REG          (DR_REG_SENSITIVE_BASE + 0x1E4)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART1 : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART1_S  30
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S0 : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S0    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S0_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S0_S  28
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_S  26
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_MISC : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_MISC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_MISC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_MISC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_MISC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_MISC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_MISC_S  24
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_HINF : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_HINF    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_HINF_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_HINF_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_HINF_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_HINF_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_HINF_S  20
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_IO_MUX_S  16
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RTC : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RTC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RTC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RTC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RTC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RTC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RTC_S  14
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE_S  10
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE2 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE2    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE2_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE2_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE2_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE2_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_FE2_S  8
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_GPIO : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_GPIO    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_GPIO_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_0_S  4
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_G0SPI_1_S  2
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_6_REG          (DR_REG_SENSITIVE_BASE + 0x1E8)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER_S  30
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1 : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1_S  28
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP_S  26
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM0 : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM0    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM0_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM0_S  24
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BB : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BB    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BB_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BB_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BB_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BB_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BB_S  22
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP_S  18
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LEDC : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LEDC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LEDC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LEDC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LEDC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LEDC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LEDC_S  16
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLC : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLC_S  14
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PCNT : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PCNT    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PCNT_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PCNT_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PCNT_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PCNT_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PCNT_S  12
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RMT : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RMT    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RMT_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RMT_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RMT_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RMT_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RMT_S  10
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST_S  8
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0_S  4
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_7_REG          (DR_REG_SENSITIVE_BASE + 0x1EC)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWR : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWR    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWR_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWR_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWR_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWR_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWR_S  28
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WIFIMAC_S  26
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RWBT : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RWBT    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RWBT_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RWBT_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RWBT_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RWBT_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RWBT_S  22
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART2 : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART2    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART2_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART2_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART2_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART2_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UART2_S  16
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S1 : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2S1_S  14
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM1 : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM1_S  12
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CAN : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CAN    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CAN_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CAN_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CAN_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CAN_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CAN_S  10
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SDIO_HOST_S  8
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT1_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_CTRL_S  4
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_3_S  2
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SPI_2_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_8_REG          (DR_REG_SENSITIVE_BASE + 0x1F0)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_S  30
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO_S  28
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD_S  26
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_S  24
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_S  22
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_S  20
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_S  18
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_S  16
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_S  14
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_S  12
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_S  10
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_S  8
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_S  4
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_S  2
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_9_REG          (DR_REG_SENSITIVE_BASE + 0x1F4)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1 : R/W ;bitpos:[21:11] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1    0x000007FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_V  0x7FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_1_S  11
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0 : R/W ;bitpos:[10:0] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0    0x000007FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_V  0x7FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_SPLTADDR_WORLD_0_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_10_REG          (DR_REG_SENSITIVE_BASE + 0x1F8)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H : R/W ;bitpos:[11:9] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_H_S  9
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L : R/W ;bitpos:[8:6] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_1_L_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H : R/W ;bitpos:[5:3] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_H_S  3
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCFAST_WORLD_0_L_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_11_REG          (DR_REG_SENSITIVE_BASE + 0x1FC)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1 : R/W ;bitpos:[21:11] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1    0x000007FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1_V  0x7FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_1_S  11
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0 : R/W ;bitpos:[10:0] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0    0x000007FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0_V  0x7FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_SPLTADDR_WORLD_0_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_12_REG          (DR_REG_SENSITIVE_BASE + 0x200)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H : R/W ;bitpos:[11:9] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_H_S  9
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L : R/W ;bitpos:[8:6] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_1_L_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H : R/W ;bitpos:[5:3] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_H_S  3
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_0_WORLD_0_L_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_13_REG          (DR_REG_SENSITIVE_BASE + 0x204)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1 : R/W ;bitpos:[21:11] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1    0x000007FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_V  0x7FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_S  11
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0 : R/W ;bitpos:[10:0] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0    0x000007FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_V  0x7FF
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_14_REG          (DR_REG_SENSITIVE_BASE + 0x208)
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H : R/W ;bitpos:[11:9] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_S  9
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L : R/W ;bitpos:[8:6] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H : R/W ;bitpos:[5:3] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_S  3
+/* SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_M  ((SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_V)<<(SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_S))
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x20C)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x210)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10 : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_10_S  20
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9 : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_9_S  18
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8 : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_8_S  16
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7 : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_7_S  14
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6 : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_6_S  12
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_5_S  10
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_4_S  8
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_3_S  6
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_2_S  4
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_1_S  2
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_0_AREA_0_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_2_REG          (DR_REG_SENSITIVE_BASE + 0x214)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10 : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_10_S  20
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9 : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_9_S  18
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8 : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_8_S  16
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7 : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_7_S  14
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6 : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_6_S  12
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5 : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_5_S  10
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_4_S  8
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_3_S  6
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_2_S  4
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_1_S  2
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0    0x00000003
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0_V  0x3
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_WORLD_1_AREA_0_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_3_REG          (DR_REG_SENSITIVE_BASE + 0x218)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_0 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_0    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_0_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_0_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_0_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_0_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_0_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_4_REG          (DR_REG_SENSITIVE_BASE + 0x21C)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_1 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_1    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_1_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_1_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_1_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_1_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_1_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_5_REG          (DR_REG_SENSITIVE_BASE + 0x220)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_2 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_2    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_2_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_2_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_2_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_2_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_2_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_6_REG          (DR_REG_SENSITIVE_BASE + 0x224)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_3 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_3    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_3_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_3_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_3_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_3_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_3_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_7_REG          (DR_REG_SENSITIVE_BASE + 0x228)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_4 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_4    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_4_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_4_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_4_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_4_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_4_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_8_REG          (DR_REG_SENSITIVE_BASE + 0x22C)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_5 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_5    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_5_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_5_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_5_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_5_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_5_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_9_REG          (DR_REG_SENSITIVE_BASE + 0x230)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_6 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_6    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_6_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_6_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_6_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_6_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_6_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_10_REG          (DR_REG_SENSITIVE_BASE + 0x234)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_7 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_7    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_7_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_7_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_7_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_7_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_7_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_11_REG          (DR_REG_SENSITIVE_BASE + 0x238)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_8 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_8    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_8_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_8_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_8_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_8_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_8_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_12_REG          (DR_REG_SENSITIVE_BASE + 0x23C)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_9 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_9    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_9_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_9_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_9_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_9_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_9_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_13_REG          (DR_REG_SENSITIVE_BASE + 0x240)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_10 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_10    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_10_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_10_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_10_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_10_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_10_S  0
+
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_14_REG          (DR_REG_SENSITIVE_BASE + 0x244)
+/* SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_11 : R/W ;bitpos:[29:0] ;default: 30'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_11    0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_11_M  ((SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_11_V)<<(SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_11_S))
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_11_V  0x3FFFFFFF
+#define SENSITIVE_CORE_1_REGION_PMS_CONSTRAIN_ADDR_11_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_0_REG          (DR_REG_SENSITIVE_BASE + 0x248)
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_LOCK    (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_LOCK_V  0x1
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_LOCK_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_1_REG          (DR_REG_SENSITIVE_BASE + 0x24C)
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_EN : R/W ;bitpos:[1] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_EN    (BIT(1))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_EN_M  (BIT(1))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_EN_V  0x1
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_EN_S  1
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_CLR : R/W ;bitpos:[0] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_CLR    (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_CLR_M  (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_CLR_V  0x1
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_CLR_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_2_REG          (DR_REG_SENSITIVE_BASE + 0x250)
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD : RO ;bitpos:[7:6] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_M  ((SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_V)<<(SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_S))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_S  6
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE    (BIT(5))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE_M  (BIT(5))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE_V  0x1
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE_S  5
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE : RO ;bitpos:[4:2] ;default: 3'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE    0x00000007
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_M  ((SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_V)<<(SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_S))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_V  0x7
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_S  2
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0 : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0    (BIT(1))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0_M  (BIT(1))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0_V  0x1
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0_S  1
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR    (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_M  (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_V  0x1
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_3_REG          (DR_REG_SENSITIVE_BASE + 0x254)
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR    0xFFFFFFFF
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR_M  ((SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR_V)<<(SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR_S))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR_V  0xFFFFFFFF
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HADDR_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_4_REG          (DR_REG_SENSITIVE_BASE + 0x258)
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_EN : R/W ;bitpos:[1] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_EN    (BIT(1))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_EN_M  (BIT(1))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_EN_V  0x1
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_EN_S  1
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_CLR : R/W ;bitpos:[0] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_CLR    (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_CLR_M  (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_CLR_V  0x1
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_CLR_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_5_REG          (DR_REG_SENSITIVE_BASE + 0x25C)
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD : RO ;bitpos:[4:3] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD_M  ((SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD_V)<<(SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD_S))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HWORLD_S  3
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE : RO ;bitpos:[2:1] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE    0x00000003
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE_M  ((SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE_V)<<(SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE_S))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE_V  0x3
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HSIZE_S  1
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_INTR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_INTR    (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_INTR_M  (BIT(0))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_INTR_V  0x1
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_INTR_S  0
+
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_6_REG          (DR_REG_SENSITIVE_BASE + 0x260)
+/* SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR    0xFFFFFFFF
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR_M  ((SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR_V)<<(SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR_S))
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR_V  0xFFFFFFFF
+#define SENSITIVE_CORE_1_PIF_PMS_MONITOR_NONWORD_VIOLATE_STATUS_HADDR_S  0
+
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x264)
+/* SENSITIVE_CORE_1_VECBASE_OVERRIDE_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_LOCK    (BIT(0))
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_LOCK_V  0x1
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_LOCK_S  0
+
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_0_REG          (DR_REG_SENSITIVE_BASE + 0x268)
+/* SENSITIVE_CORE_1_VECBASE_WORLD_MASK : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_VECBASE_WORLD_MASK    (BIT(0))
+#define SENSITIVE_CORE_1_VECBASE_WORLD_MASK_M  (BIT(0))
+#define SENSITIVE_CORE_1_VECBASE_WORLD_MASK_V  0x1
+#define SENSITIVE_CORE_1_VECBASE_WORLD_MASK_S  0
+
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_1_REG          (DR_REG_SENSITIVE_BASE + 0x26C)
+/* SENSITIVE_CORE_1_VECBASE_OVERRIDE_SEL : R/W ;bitpos:[23:22] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_SEL    0x00000003
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_SEL_M  ((SENSITIVE_CORE_1_VECBASE_OVERRIDE_SEL_V)<<(SENSITIVE_CORE_1_VECBASE_OVERRIDE_SEL_S))
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_SEL_V  0x3
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_SEL_S  22
+/* SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD0_VALUE : R/W ;bitpos:[21:0] ;default: 22'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD0_VALUE    0x003FFFFF
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD0_VALUE_M  ((SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD0_VALUE_V)<<(SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD0_VALUE_S))
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD0_VALUE_V  0x3FFFFF
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD0_VALUE_S  0
+
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_2_REG          (DR_REG_SENSITIVE_BASE + 0x270)
+/* SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD1_VALUE : R/W ;bitpos:[21:0] ;default: 22'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD1_VALUE    0x003FFFFF
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD1_VALUE_M  ((SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD1_VALUE_V)<<(SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD1_VALUE_S))
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD1_VALUE_V  0x3FFFFF
+#define SENSITIVE_CORE_1_VECBASE_OVERRIDE_WORLD1_VALUE_S  0
+
+#define SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_0_REG          (DR_REG_SENSITIVE_BASE + 0x274)
+/* SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_LOCK    (BIT(0))
+#define SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_LOCK_M  (BIT(0))
+#define SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_LOCK_V  0x1
+#define SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_LOCK_S  0
+
+#define SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_1_REG          (DR_REG_SENSITIVE_BASE + 0x278)
+/* SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE    (BIT(0))
+#define SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_M  (BIT(0))
+#define SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_V  0x1
+#define SENSITIVE_CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_S  0
+
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_0_REG          (DR_REG_SENSITIVE_BASE + 0x27C)
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LOCK    (BIT(0))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LOCK_M  (BIT(0))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LOCK_V  0x1
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LOCK_S  0
+
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_1_REG          (DR_REG_SENSITIVE_BASE + 0x280)
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART1 : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART1    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART1_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART1_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART1_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART1_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART1_S  30
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S0 : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S0    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S0_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S0_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S0_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S0_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S0_S  28
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_S  26
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_MISC : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_MISC    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_MISC_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_MISC_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_MISC_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_MISC_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_MISC_S  24
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_HINF : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_HINF    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_HINF_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_HINF_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_HINF_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_HINF_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_HINF_S  20
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_IO_MUX : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_IO_MUX    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_IO_MUX_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_IO_MUX_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_IO_MUX_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_IO_MUX_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_IO_MUX_S  16
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTC : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTC    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTC_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTC_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTC_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTC_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTC_S  14
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE_S  10
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE2 : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE2    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE2_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE2_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE2_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE2_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_FE2_S  8
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_GPIO : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_GPIO    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_GPIO_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_GPIO_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_GPIO_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_GPIO_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_GPIO_S  6
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_0 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_0    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_0_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_0_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_0_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_0_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_0_S  4
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_1 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_1    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_1_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_1_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_1_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_1_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_G0SPI_1_S  2
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART_S  0
+
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_2_REG          (DR_REG_SENSITIVE_BASE + 0x284)
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTIMER : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTIMER    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTIMER_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTIMER_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTIMER_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTIMER_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTIMER_S  30
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP1 : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP1    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP1_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP1_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP1_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP1_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP1_S  28
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_TIMERGROUP_S  26
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM0 : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM0    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM0_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM0_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM0_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM0_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM0_S  24
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BB : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BB    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BB_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BB_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BB_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BB_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BB_S  22
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BACKUP : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BACKUP    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BACKUP_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BACKUP_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BACKUP_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BACKUP_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BACKUP_S  18
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LEDC : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LEDC    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LEDC_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LEDC_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LEDC_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LEDC_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LEDC_S  16
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLC : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLC    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLC_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLC_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLC_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLC_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLC_S  14
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PCNT : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PCNT    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PCNT_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PCNT_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PCNT_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PCNT_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PCNT_S  12
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RMT : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RMT    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RMT_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RMT_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RMT_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RMT_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RMT_S  10
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLCHOST : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLCHOST    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLCHOST_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLCHOST_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLCHOST_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLCHOST_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SLCHOST_S  8
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UHCI0 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UHCI0    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UHCI0_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UHCI0_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UHCI0_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UHCI0_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UHCI0_S  6
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT0 : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT0    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT0_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT0_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT0_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT0_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT0_S  4
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_S  0
+
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_3_REG          (DR_REG_SENSITIVE_BASE + 0x288)
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWR : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWR    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWR_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWR_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWR_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWR_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWR_S  28
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WIFIMAC : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WIFIMAC    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WIFIMAC_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WIFIMAC_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WIFIMAC_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WIFIMAC_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WIFIMAC_S  26
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RWBT : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RWBT    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RWBT_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RWBT_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RWBT_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RWBT_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RWBT_S  22
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART2 : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART2    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART2_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART2_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART2_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART2_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_UART2_S  16
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S1 : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S1    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S1_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S1_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S1_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S1_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2S1_S  14
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM1 : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM1    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM1_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM1_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM1_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM1_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_PWM1_S  12
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CAN : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CAN    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CAN_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CAN_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CAN_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CAN_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CAN_S  10
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SDIO_HOST : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SDIO_HOST    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SDIO_HOST_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SDIO_HOST_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SDIO_HOST_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SDIO_HOST_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SDIO_HOST_S  8
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT1 : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT1    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT1_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT1_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT1_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT1_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_I2C_EXT1_S  6
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_CTRL : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_CTRL    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_CTRL_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_CTRL_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_CTRL_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_CTRL_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_CTRL_S  4
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_3 : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_3    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_3_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_3_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_3_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_3_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_3_S  2
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_2 : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_2    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_2_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_2_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_2_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_2_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SPI_2_S  0
+
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_4_REG          (DR_REG_SENSITIVE_BASE + 0x28C)
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WORLD_CONTROLLER : R/W ;bitpos:[31:30] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WORLD_CONTROLLER    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WORLD_CONTROLLER_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WORLD_CONTROLLER_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WORLD_CONTROLLER_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WORLD_CONTROLLER_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_WORLD_CONTROLLER_S  30
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DIO : R/W ;bitpos:[29:28] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DIO    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DIO_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DIO_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DIO_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DIO_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DIO_S  28
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_AD : R/W ;bitpos:[27:26] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_AD    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_AD_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_AD_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_AD_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_AD_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_AD_S  26
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CACHE_CONFIG : R/W ;bitpos:[25:24] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CACHE_CONFIG    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CACHE_CONFIG_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CACHE_CONFIG_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CACHE_CONFIG_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CACHE_CONFIG_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CACHE_CONFIG_S  24
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DMA_COPY : R/W ;bitpos:[23:22] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DMA_COPY    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DMA_COPY_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DMA_COPY_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DMA_COPY_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DMA_COPY_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_DMA_COPY_S  22
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_INTERRUPT : R/W ;bitpos:[21:20] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_INTERRUPT    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_INTERRUPT_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_INTERRUPT_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_INTERRUPT_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_INTERRUPT_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_INTERRUPT_S  20
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SENSITIVE : R/W ;bitpos:[19:18] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SENSITIVE    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SENSITIVE_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SENSITIVE_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SENSITIVE_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SENSITIVE_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SENSITIVE_S  18
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTEM : R/W ;bitpos:[17:16] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTEM    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTEM_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTEM_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTEM_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTEM_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_SYSTEM_S  16
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB : R/W ;bitpos:[15:14] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_S  14
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_PWR : R/W ;bitpos:[13:12] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_PWR    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_PWR_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_PWR_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_PWR_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_PWR_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_BT_PWR_S  12
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LCD_CAM : R/W ;bitpos:[11:10] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LCD_CAM    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LCD_CAM_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LCD_CAM_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LCD_CAM_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LCD_CAM_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_LCD_CAM_S  10
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_ADC : R/W ;bitpos:[9:8] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_ADC    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_ADC_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_ADC_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_ADC_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_ADC_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_APB_ADC_S  8
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_DMA : R/W ;bitpos:[7:6] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_DMA    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_DMA_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_DMA_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_DMA_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_DMA_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_DMA_S  6
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_PERI : R/W ;bitpos:[5:4] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_PERI    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_PERI_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_PERI_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_PERI_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_PERI_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_CRYPTO_PERI_S  4
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_WRAP : R/W ;bitpos:[3:2] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_WRAP    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_WRAP_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_WRAP_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_WRAP_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_WRAP_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_WRAP_S  2
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_DEVICE : R/W ;bitpos:[1:0] ;default: ~2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_DEVICE    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_DEVICE_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_DEVICE_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_DEVICE_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_DEVICE_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_USB_DEVICE_S  0
+
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_5_REG          (DR_REG_SENSITIVE_BASE + 0x290)
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR : R/W ;bitpos:[10:0] ;default: ~11'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR    0x000007FF
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR_V  0x7FF
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR_S  0
+
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_6_REG          (DR_REG_SENSITIVE_BASE + 0x294)
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_H : R/W ;bitpos:[5:3] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_H    0x00000007
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_H_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_H_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_H_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_H_V  0x7
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_H_S  3
+/* SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_L : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_L    0x00000007
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_L_M  ((SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_L_V)<<(SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_L_S))
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_L_V  0x7
+#define SENSITIVE_BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_L_S  0
+
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_0_REG          (DR_REG_SENSITIVE_BASE + 0x298)
+/* SENSITIVE_BACKUP_BUS_PMS_MONITOR_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_LOCK    (BIT(0))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_LOCK_M  (BIT(0))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_LOCK_V  0x1
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_LOCK_S  0
+
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_1_REG          (DR_REG_SENSITIVE_BASE + 0x29C)
+/* SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_EN : R/W ;bitpos:[1] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_EN    (BIT(1))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_EN_M  (BIT(1))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_EN_V  0x1
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_EN_S  1
+/* SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR : R/W ;bitpos:[0] ;default: ~1'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR    (BIT(0))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR_M  (BIT(0))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR_V  0x1
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR_S  0
+
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_2_REG          (DR_REG_SENSITIVE_BASE + 0x2A0)
+/* SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HWRITE : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HWRITE    (BIT(6))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HWRITE_M  (BIT(6))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HWRITE_V  0x1
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HWRITE_S  6
+/* SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HSIZE : RO ;bitpos:[5:3] ;default: 3'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HSIZE    0x00000007
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HSIZE_M  ((SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HSIZE_V)<<(SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HSIZE_S))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HSIZE_V  0x7
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HSIZE_S  3
+/* SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HTRANS : RO ;bitpos:[2:1] ;default: 2'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HTRANS    0x00000003
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HTRANS_M  ((SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HTRANS_V)<<(SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HTRANS_S))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HTRANS_V  0x3
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_STATUS_HTRANS_S  1
+/* SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_INTR : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_INTR    (BIT(0))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_INTR_M  (BIT(0))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_INTR_V  0x1
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_INTR_S  0
+
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_3_REG          (DR_REG_SENSITIVE_BASE + 0x2A4)
+/* SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_HADDR : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_HADDR    0xFFFFFFFF
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_HADDR_M  ((SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_HADDR_V)<<(SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_HADDR_S))
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_HADDR_V  0xFFFFFFFF
+#define SENSITIVE_BACKUP_BUS_PMS_MONITOR_VIOLATE_HADDR_S  0
+
+#define SENSITIVE_EDMA_BOUNDARY_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x2A8)
+/* SENSITIVE_EDMA_BOUNDARY_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_BOUNDARY_LOCK    (BIT(0))
+#define SENSITIVE_EDMA_BOUNDARY_LOCK_M  (BIT(0))
+#define SENSITIVE_EDMA_BOUNDARY_LOCK_V  0x1
+#define SENSITIVE_EDMA_BOUNDARY_LOCK_S  0
+
+#define SENSITIVE_EDMA_BOUNDARY_0_REG          (DR_REG_SENSITIVE_BASE + 0x2AC)
+/* SENSITIVE_EDMA_BOUNDARY_0 : R/W ;bitpos:[13:0] ;default: 14'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_BOUNDARY_0    0x00003FFF
+#define SENSITIVE_EDMA_BOUNDARY_0_M  ((SENSITIVE_EDMA_BOUNDARY_0_V)<<(SENSITIVE_EDMA_BOUNDARY_0_S))
+#define SENSITIVE_EDMA_BOUNDARY_0_V  0x3FFF
+#define SENSITIVE_EDMA_BOUNDARY_0_S  0
+
+#define SENSITIVE_EDMA_BOUNDARY_1_REG          (DR_REG_SENSITIVE_BASE + 0x2B0)
+/* SENSITIVE_EDMA_BOUNDARY_1 : R/W ;bitpos:[13:0] ;default: 14'h2000 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_BOUNDARY_1    0x00003FFF
+#define SENSITIVE_EDMA_BOUNDARY_1_M  ((SENSITIVE_EDMA_BOUNDARY_1_V)<<(SENSITIVE_EDMA_BOUNDARY_1_S))
+#define SENSITIVE_EDMA_BOUNDARY_1_V  0x3FFF
+#define SENSITIVE_EDMA_BOUNDARY_1_S  0
+
+#define SENSITIVE_EDMA_BOUNDARY_2_REG          (DR_REG_SENSITIVE_BASE + 0x2B4)
+/* SENSITIVE_EDMA_BOUNDARY_2 : R/W ;bitpos:[13:0] ;default: 14'h2000 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_BOUNDARY_2    0x00003FFF
+#define SENSITIVE_EDMA_BOUNDARY_2_M  ((SENSITIVE_EDMA_BOUNDARY_2_V)<<(SENSITIVE_EDMA_BOUNDARY_2_S))
+#define SENSITIVE_EDMA_BOUNDARY_2_V  0x3FFF
+#define SENSITIVE_EDMA_BOUNDARY_2_S  0
+
+#define SENSITIVE_EDMA_PMS_SPI2_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x2B8)
+/* SENSITIVE_EDMA_PMS_SPI2_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_SPI2_LOCK    (BIT(0))
+#define SENSITIVE_EDMA_PMS_SPI2_LOCK_M  (BIT(0))
+#define SENSITIVE_EDMA_PMS_SPI2_LOCK_V  0x1
+#define SENSITIVE_EDMA_PMS_SPI2_LOCK_S  0
+
+#define SENSITIVE_EDMA_PMS_SPI2_REG          (DR_REG_SENSITIVE_BASE + 0x2BC)
+/* SENSITIVE_EDMA_PMS_SPI2_ATTR2 : R/W ;bitpos:[3:2] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_SPI2_ATTR2    0x00000003
+#define SENSITIVE_EDMA_PMS_SPI2_ATTR2_M  ((SENSITIVE_EDMA_PMS_SPI2_ATTR2_V)<<(SENSITIVE_EDMA_PMS_SPI2_ATTR2_S))
+#define SENSITIVE_EDMA_PMS_SPI2_ATTR2_V  0x3
+#define SENSITIVE_EDMA_PMS_SPI2_ATTR2_S  2
+/* SENSITIVE_EDMA_PMS_SPI2_ATTR1 : R/W ;bitpos:[1:0] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_SPI2_ATTR1    0x00000003
+#define SENSITIVE_EDMA_PMS_SPI2_ATTR1_M  ((SENSITIVE_EDMA_PMS_SPI2_ATTR1_V)<<(SENSITIVE_EDMA_PMS_SPI2_ATTR1_S))
+#define SENSITIVE_EDMA_PMS_SPI2_ATTR1_V  0x3
+#define SENSITIVE_EDMA_PMS_SPI2_ATTR1_S  0
+
+#define SENSITIVE_EDMA_PMS_SPI3_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x2C0)
+/* SENSITIVE_EDMA_PMS_SPI3_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_SPI3_LOCK    (BIT(0))
+#define SENSITIVE_EDMA_PMS_SPI3_LOCK_M  (BIT(0))
+#define SENSITIVE_EDMA_PMS_SPI3_LOCK_V  0x1
+#define SENSITIVE_EDMA_PMS_SPI3_LOCK_S  0
+
+#define SENSITIVE_EDMA_PMS_SPI3_REG          (DR_REG_SENSITIVE_BASE + 0x2C4)
+/* SENSITIVE_EDMA_PMS_SPI3_ATTR2 : R/W ;bitpos:[3:2] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_SPI3_ATTR2    0x00000003
+#define SENSITIVE_EDMA_PMS_SPI3_ATTR2_M  ((SENSITIVE_EDMA_PMS_SPI3_ATTR2_V)<<(SENSITIVE_EDMA_PMS_SPI3_ATTR2_S))
+#define SENSITIVE_EDMA_PMS_SPI3_ATTR2_V  0x3
+#define SENSITIVE_EDMA_PMS_SPI3_ATTR2_S  2
+/* SENSITIVE_EDMA_PMS_SPI3_ATTR1 : R/W ;bitpos:[1:0] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_SPI3_ATTR1    0x00000003
+#define SENSITIVE_EDMA_PMS_SPI3_ATTR1_M  ((SENSITIVE_EDMA_PMS_SPI3_ATTR1_V)<<(SENSITIVE_EDMA_PMS_SPI3_ATTR1_S))
+#define SENSITIVE_EDMA_PMS_SPI3_ATTR1_V  0x3
+#define SENSITIVE_EDMA_PMS_SPI3_ATTR1_S  0
+
+#define SENSITIVE_EDMA_PMS_UHCI0_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x2C8)
+/* SENSITIVE_EDMA_PMS_UHCI0_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_UHCI0_LOCK    (BIT(0))
+#define SENSITIVE_EDMA_PMS_UHCI0_LOCK_M  (BIT(0))
+#define SENSITIVE_EDMA_PMS_UHCI0_LOCK_V  0x1
+#define SENSITIVE_EDMA_PMS_UHCI0_LOCK_S  0
+
+#define SENSITIVE_EDMA_PMS_UHCI0_REG          (DR_REG_SENSITIVE_BASE + 0x2CC)
+/* SENSITIVE_EDMA_PMS_UHCI0_ATTR2 : R/W ;bitpos:[3:2] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_UHCI0_ATTR2    0x00000003
+#define SENSITIVE_EDMA_PMS_UHCI0_ATTR2_M  ((SENSITIVE_EDMA_PMS_UHCI0_ATTR2_V)<<(SENSITIVE_EDMA_PMS_UHCI0_ATTR2_S))
+#define SENSITIVE_EDMA_PMS_UHCI0_ATTR2_V  0x3
+#define SENSITIVE_EDMA_PMS_UHCI0_ATTR2_S  2
+/* SENSITIVE_EDMA_PMS_UHCI0_ATTR1 : R/W ;bitpos:[1:0] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_UHCI0_ATTR1    0x00000003
+#define SENSITIVE_EDMA_PMS_UHCI0_ATTR1_M  ((SENSITIVE_EDMA_PMS_UHCI0_ATTR1_V)<<(SENSITIVE_EDMA_PMS_UHCI0_ATTR1_S))
+#define SENSITIVE_EDMA_PMS_UHCI0_ATTR1_V  0x3
+#define SENSITIVE_EDMA_PMS_UHCI0_ATTR1_S  0
+
+#define SENSITIVE_EDMA_PMS_I2S0_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x2D0)
+/* SENSITIVE_EDMA_PMS_I2S0_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_I2S0_LOCK    (BIT(0))
+#define SENSITIVE_EDMA_PMS_I2S0_LOCK_M  (BIT(0))
+#define SENSITIVE_EDMA_PMS_I2S0_LOCK_V  0x1
+#define SENSITIVE_EDMA_PMS_I2S0_LOCK_S  0
+
+#define SENSITIVE_EDMA_PMS_I2S0_REG          (DR_REG_SENSITIVE_BASE + 0x2D4)
+/* SENSITIVE_EDMA_PMS_I2S0_ATTR2 : R/W ;bitpos:[3:2] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_I2S0_ATTR2    0x00000003
+#define SENSITIVE_EDMA_PMS_I2S0_ATTR2_M  ((SENSITIVE_EDMA_PMS_I2S0_ATTR2_V)<<(SENSITIVE_EDMA_PMS_I2S0_ATTR2_S))
+#define SENSITIVE_EDMA_PMS_I2S0_ATTR2_V  0x3
+#define SENSITIVE_EDMA_PMS_I2S0_ATTR2_S  2
+/* SENSITIVE_EDMA_PMS_I2S0_ATTR1 : R/W ;bitpos:[1:0] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_I2S0_ATTR1    0x00000003
+#define SENSITIVE_EDMA_PMS_I2S0_ATTR1_M  ((SENSITIVE_EDMA_PMS_I2S0_ATTR1_V)<<(SENSITIVE_EDMA_PMS_I2S0_ATTR1_S))
+#define SENSITIVE_EDMA_PMS_I2S0_ATTR1_V  0x3
+#define SENSITIVE_EDMA_PMS_I2S0_ATTR1_S  0
+
+#define SENSITIVE_EDMA_PMS_I2S1_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x2D8)
+/* SENSITIVE_EDMA_PMS_I2S1_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_I2S1_LOCK    (BIT(0))
+#define SENSITIVE_EDMA_PMS_I2S1_LOCK_M  (BIT(0))
+#define SENSITIVE_EDMA_PMS_I2S1_LOCK_V  0x1
+#define SENSITIVE_EDMA_PMS_I2S1_LOCK_S  0
+
+#define SENSITIVE_EDMA_PMS_I2S1_REG          (DR_REG_SENSITIVE_BASE + 0x2DC)
+/* SENSITIVE_EDMA_PMS_I2S1_ATTR2 : R/W ;bitpos:[3:2] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_I2S1_ATTR2    0x00000003
+#define SENSITIVE_EDMA_PMS_I2S1_ATTR2_M  ((SENSITIVE_EDMA_PMS_I2S1_ATTR2_V)<<(SENSITIVE_EDMA_PMS_I2S1_ATTR2_S))
+#define SENSITIVE_EDMA_PMS_I2S1_ATTR2_V  0x3
+#define SENSITIVE_EDMA_PMS_I2S1_ATTR2_S  2
+/* SENSITIVE_EDMA_PMS_I2S1_ATTR1 : R/W ;bitpos:[1:0] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_I2S1_ATTR1    0x00000003
+#define SENSITIVE_EDMA_PMS_I2S1_ATTR1_M  ((SENSITIVE_EDMA_PMS_I2S1_ATTR1_V)<<(SENSITIVE_EDMA_PMS_I2S1_ATTR1_S))
+#define SENSITIVE_EDMA_PMS_I2S1_ATTR1_V  0x3
+#define SENSITIVE_EDMA_PMS_I2S1_ATTR1_S  0
+
+#define SENSITIVE_EDMA_PMS_LCD_CAM_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x2E0)
+/* SENSITIVE_EDMA_PMS_LCD_CAM_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_LCD_CAM_LOCK    (BIT(0))
+#define SENSITIVE_EDMA_PMS_LCD_CAM_LOCK_M  (BIT(0))
+#define SENSITIVE_EDMA_PMS_LCD_CAM_LOCK_V  0x1
+#define SENSITIVE_EDMA_PMS_LCD_CAM_LOCK_S  0
+
+#define SENSITIVE_EDMA_PMS_LCD_CAM_REG          (DR_REG_SENSITIVE_BASE + 0x2E4)
+/* SENSITIVE_EDMA_PMS_LCD_CAM_ATTR2 : R/W ;bitpos:[3:2] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_LCD_CAM_ATTR2    0x00000003
+#define SENSITIVE_EDMA_PMS_LCD_CAM_ATTR2_M  ((SENSITIVE_EDMA_PMS_LCD_CAM_ATTR2_V)<<(SENSITIVE_EDMA_PMS_LCD_CAM_ATTR2_S))
+#define SENSITIVE_EDMA_PMS_LCD_CAM_ATTR2_V  0x3
+#define SENSITIVE_EDMA_PMS_LCD_CAM_ATTR2_S  2
+/* SENSITIVE_EDMA_PMS_LCD_CAM_ATTR1 : R/W ;bitpos:[1:0] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_LCD_CAM_ATTR1    0x00000003
+#define SENSITIVE_EDMA_PMS_LCD_CAM_ATTR1_M  ((SENSITIVE_EDMA_PMS_LCD_CAM_ATTR1_V)<<(SENSITIVE_EDMA_PMS_LCD_CAM_ATTR1_S))
+#define SENSITIVE_EDMA_PMS_LCD_CAM_ATTR1_V  0x3
+#define SENSITIVE_EDMA_PMS_LCD_CAM_ATTR1_S  0
+
+#define SENSITIVE_EDMA_PMS_AES_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x2E8)
+/* SENSITIVE_EDMA_PMS_AES_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_AES_LOCK    (BIT(0))
+#define SENSITIVE_EDMA_PMS_AES_LOCK_M  (BIT(0))
+#define SENSITIVE_EDMA_PMS_AES_LOCK_V  0x1
+#define SENSITIVE_EDMA_PMS_AES_LOCK_S  0
+
+#define SENSITIVE_EDMA_PMS_AES_REG          (DR_REG_SENSITIVE_BASE + 0x2EC)
+/* SENSITIVE_EDMA_PMS_AES_ATTR2 : R/W ;bitpos:[3:2] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_AES_ATTR2    0x00000003
+#define SENSITIVE_EDMA_PMS_AES_ATTR2_M  ((SENSITIVE_EDMA_PMS_AES_ATTR2_V)<<(SENSITIVE_EDMA_PMS_AES_ATTR2_S))
+#define SENSITIVE_EDMA_PMS_AES_ATTR2_V  0x3
+#define SENSITIVE_EDMA_PMS_AES_ATTR2_S  2
+/* SENSITIVE_EDMA_PMS_AES_ATTR1 : R/W ;bitpos:[1:0] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_AES_ATTR1    0x00000003
+#define SENSITIVE_EDMA_PMS_AES_ATTR1_M  ((SENSITIVE_EDMA_PMS_AES_ATTR1_V)<<(SENSITIVE_EDMA_PMS_AES_ATTR1_S))
+#define SENSITIVE_EDMA_PMS_AES_ATTR1_V  0x3
+#define SENSITIVE_EDMA_PMS_AES_ATTR1_S  0
+
+#define SENSITIVE_EDMA_PMS_SHA_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x2F0)
+/* SENSITIVE_EDMA_PMS_SHA_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_SHA_LOCK    (BIT(0))
+#define SENSITIVE_EDMA_PMS_SHA_LOCK_M  (BIT(0))
+#define SENSITIVE_EDMA_PMS_SHA_LOCK_V  0x1
+#define SENSITIVE_EDMA_PMS_SHA_LOCK_S  0
+
+#define SENSITIVE_EDMA_PMS_SHA_REG          (DR_REG_SENSITIVE_BASE + 0x2F4)
+/* SENSITIVE_EDMA_PMS_SHA_ATTR2 : R/W ;bitpos:[3:2] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_SHA_ATTR2    0x00000003
+#define SENSITIVE_EDMA_PMS_SHA_ATTR2_M  ((SENSITIVE_EDMA_PMS_SHA_ATTR2_V)<<(SENSITIVE_EDMA_PMS_SHA_ATTR2_S))
+#define SENSITIVE_EDMA_PMS_SHA_ATTR2_V  0x3
+#define SENSITIVE_EDMA_PMS_SHA_ATTR2_S  2
+/* SENSITIVE_EDMA_PMS_SHA_ATTR1 : R/W ;bitpos:[1:0] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_SHA_ATTR1    0x00000003
+#define SENSITIVE_EDMA_PMS_SHA_ATTR1_M  ((SENSITIVE_EDMA_PMS_SHA_ATTR1_V)<<(SENSITIVE_EDMA_PMS_SHA_ATTR1_S))
+#define SENSITIVE_EDMA_PMS_SHA_ATTR1_V  0x3
+#define SENSITIVE_EDMA_PMS_SHA_ATTR1_S  0
+
+#define SENSITIVE_EDMA_PMS_ADC_DAC_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x2F8)
+/* SENSITIVE_EDMA_PMS_ADC_DAC_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_ADC_DAC_LOCK    (BIT(0))
+#define SENSITIVE_EDMA_PMS_ADC_DAC_LOCK_M  (BIT(0))
+#define SENSITIVE_EDMA_PMS_ADC_DAC_LOCK_V  0x1
+#define SENSITIVE_EDMA_PMS_ADC_DAC_LOCK_S  0
+
+#define SENSITIVE_EDMA_PMS_ADC_DAC_REG          (DR_REG_SENSITIVE_BASE + 0x2FC)
+/* SENSITIVE_EDMA_PMS_ADC_DAC_ATTR2 : R/W ;bitpos:[3:2] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_ADC_DAC_ATTR2    0x00000003
+#define SENSITIVE_EDMA_PMS_ADC_DAC_ATTR2_M  ((SENSITIVE_EDMA_PMS_ADC_DAC_ATTR2_V)<<(SENSITIVE_EDMA_PMS_ADC_DAC_ATTR2_S))
+#define SENSITIVE_EDMA_PMS_ADC_DAC_ATTR2_V  0x3
+#define SENSITIVE_EDMA_PMS_ADC_DAC_ATTR2_S  2
+/* SENSITIVE_EDMA_PMS_ADC_DAC_ATTR1 : R/W ;bitpos:[1:0] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_ADC_DAC_ATTR1    0x00000003
+#define SENSITIVE_EDMA_PMS_ADC_DAC_ATTR1_M  ((SENSITIVE_EDMA_PMS_ADC_DAC_ATTR1_V)<<(SENSITIVE_EDMA_PMS_ADC_DAC_ATTR1_S))
+#define SENSITIVE_EDMA_PMS_ADC_DAC_ATTR1_V  0x3
+#define SENSITIVE_EDMA_PMS_ADC_DAC_ATTR1_S  0
+
+#define SENSITIVE_EDMA_PMS_RMT_LOCK_REG          (DR_REG_SENSITIVE_BASE + 0x300)
+/* SENSITIVE_EDMA_PMS_RMT_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_RMT_LOCK    (BIT(0))
+#define SENSITIVE_EDMA_PMS_RMT_LOCK_M  (BIT(0))
+#define SENSITIVE_EDMA_PMS_RMT_LOCK_V  0x1
+#define SENSITIVE_EDMA_PMS_RMT_LOCK_S  0
+
+#define SENSITIVE_EDMA_PMS_RMT_REG          (DR_REG_SENSITIVE_BASE + 0x304)
+/* SENSITIVE_EDMA_PMS_RMT_ATTR2 : R/W ;bitpos:[3:2] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_RMT_ATTR2    0x00000003
+#define SENSITIVE_EDMA_PMS_RMT_ATTR2_M  ((SENSITIVE_EDMA_PMS_RMT_ATTR2_V)<<(SENSITIVE_EDMA_PMS_RMT_ATTR2_S))
+#define SENSITIVE_EDMA_PMS_RMT_ATTR2_V  0x3
+#define SENSITIVE_EDMA_PMS_RMT_ATTR2_S  2
+/* SENSITIVE_EDMA_PMS_RMT_ATTR1 : R/W ;bitpos:[1:0] ;default: 2'b11 ; */
+/*description: .*/
+#define SENSITIVE_EDMA_PMS_RMT_ATTR1    0x00000003
+#define SENSITIVE_EDMA_PMS_RMT_ATTR1_M  ((SENSITIVE_EDMA_PMS_RMT_ATTR1_V)<<(SENSITIVE_EDMA_PMS_RMT_ATTR1_S))
+#define SENSITIVE_EDMA_PMS_RMT_ATTR1_V  0x3
+#define SENSITIVE_EDMA_PMS_RMT_ATTR1_S  0
+
+#define SENSITIVE_CLOCK_GATE_REG          (DR_REG_SENSITIVE_BASE + 0x308)
+/* SENSITIVE_CLK_EN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SENSITIVE_CLK_EN    (BIT(0))
+#define SENSITIVE_CLK_EN_M  (BIT(0))
+#define SENSITIVE_CLK_EN_V  0x1
+#define SENSITIVE_CLK_EN_S  0
+
+#define SENSITIVE_RTC_PMS_REG          (DR_REG_SENSITIVE_BASE + 0x30C)
+/* SENSITIVE_DIS_RTC_CPU : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SENSITIVE_DIS_RTC_CPU    (BIT(0))
+#define SENSITIVE_DIS_RTC_CPU_M  (BIT(0))
+#define SENSITIVE_DIS_RTC_CPU_V  0x1
+#define SENSITIVE_DIS_RTC_CPU_S  0
+
+#define SENSITIVE_DATE_REG          (DR_REG_SENSITIVE_BASE + 0xFFC)
+/* SENSITIVE_DATE : R/W ;bitpos:[27:0] ;default: 28'h2101280 ; */
+/*description: .*/
+#define SENSITIVE_DATE    0x0FFFFFFF
+#define SENSITIVE_DATE_M  ((SENSITIVE_DATE_V)<<(SENSITIVE_DATE_S))
+#define SENSITIVE_DATE_V  0xFFFFFFF
+#define SENSITIVE_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SENSITIVE_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sensitive_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sensitive_struct.h
new file mode 100644
index 00000000000..e9919cb0a69
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sensitive_struct.h
@@ -0,0 +1,2753 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_SENSITIVE_STRUCT_H_
+#define _SOC_SENSITIVE_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct sensitive_dev_s {
+    union {
+        struct {
+            uint32_t cache_dataarray_connect_lock  :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } cache_dataarray_connect_0;
+    union {
+        struct {
+            uint32_t cache_dataarray_connect_flatten:    8;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } cache_dataarray_connect_1;
+    union {
+        struct {
+            uint32_t apb_peripheral_access_lock    :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } apb_peripheral_access_0;
+    union {
+        struct {
+            uint32_t apb_peripheral_access_split_burst:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } apb_peripheral_access_1;
+    union {
+        struct {
+            uint32_t internal_sram_usage_lock      :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } internal_sram_usage_0;
+    union {
+        struct {
+            uint32_t internal_sram_icache_usage    :    2;
+            uint32_t internal_sram_dcache_usage    :    2;
+            uint32_t internal_sram_cpu_usage       :    7;
+            uint32_t reserved11                    :    21;
+        };
+        uint32_t val;
+    } internal_sram_usage_1;
+    union {
+        struct {
+            uint32_t internal_sram_core0_trace_usage:    7;
+            uint32_t internal_sram_core1_trace_usage:    7;
+            uint32_t internal_sram_core0_trace_alloc:    2;
+            uint32_t internal_sram_core1_trace_alloc:    2;
+            uint32_t reserved18                    :    14;
+        };
+        uint32_t val;
+    } internal_sram_usage_2;
+    union {
+        struct {
+            uint32_t internal_sram_mac_dump_usage  :    4;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } internal_sram_usage_3;
+    union {
+        struct {
+            uint32_t internal_sram_log_usage       :    7;
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } internal_sram_usage_4;
+    union {
+        struct {
+            uint32_t retention_disable             :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } retention_disable;
+    union {
+        struct {
+            uint32_t cache_tag_access_lock         :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } cache_tag_access_0;
+    union {
+        struct {
+            uint32_t pro_i_tag_rd_acs              :    1;
+            uint32_t pro_i_tag_wr_acs              :    1;
+            uint32_t pro_d_tag_rd_acs              :    1;
+            uint32_t pro_d_tag_wr_acs              :    1;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } cache_tag_access_1;
+    union {
+        struct {
+            uint32_t cache_mmu_access_lock         :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } cache_mmu_access_0;
+    union {
+        struct {
+            uint32_t pro_mmu_rd_acs                :    1;
+            uint32_t pro_mmu_wr_acs                :    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } cache_mmu_access_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_spi2_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_spi2_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_spi2_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_spi2_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_spi2_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_spi2_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_spi2_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_spi2_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_spi2_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_spi3_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_spi3_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_spi3_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_spi3_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_spi3_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_spi3_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_spi3_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_spi3_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_spi3_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_uhci0_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_uhci0_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_uhci0_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_uhci0_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_uhci0_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_uhci0_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_uhci0_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_uhci0_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_uhci0_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_i2s0_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_i2s0_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_i2s0_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_i2s0_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_i2s0_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_i2s0_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_i2s0_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_i2s0_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_i2s0_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_i2s1_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_i2s1_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_i2s1_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_i2s1_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_i2s1_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_i2s1_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_i2s1_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_i2s1_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_i2s1_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_mac_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_mac_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_mac_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_mac_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_mac_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_mac_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_mac_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_mac_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_mac_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_backup_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_backup_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_backup_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_backup_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_backup_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_backup_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_backup_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_backup_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_backup_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_aes_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_aes_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_aes_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_aes_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_aes_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_aes_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_aes_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_aes_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_aes_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_sha_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_sha_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_sha_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_sha_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_sha_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_sha_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_sha_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_sha_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_sha_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_adc_dac_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_adc_dac_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_adc_dac_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_adc_dac_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_adc_dac_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_adc_dac_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_adc_dac_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_adc_dac_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_adc_dac_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_rmt_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_rmt_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_rmt_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_rmt_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_rmt_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_rmt_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_rmt_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_rmt_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_rmt_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_lcd_cam_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_lcd_cam_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_lcd_cam_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_lcd_cam_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_lcd_cam_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_lcd_cam_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_lcd_cam_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_lcd_cam_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_lcd_cam_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_usb_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_usb_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_usb_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_usb_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_usb_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_usb_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_usb_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_usb_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_usb_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_lc_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_lc_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_lc_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_lc_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_lc_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_lc_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_lc_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_lc_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_lc_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_sdio_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_sdio_pms_constrain_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_sdio_pms_constrain_sram_pms_0:    2;
+            uint32_t dma_apbperi_sdio_pms_constrain_sram_pms_1:    2;
+            uint32_t dma_apbperi_sdio_pms_constrain_sram_pms_2:    2;
+            uint32_t dma_apbperi_sdio_pms_constrain_sram_pms_3:    2;
+            uint32_t dma_apbperi_sdio_pms_constrain_sram_cachedataarray_pms_0:    2;
+            uint32_t dma_apbperi_sdio_pms_constrain_sram_cachedataarray_pms_1:    2;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } dma_apbperi_sdio_pms_constrain_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_pms_monitor_lock  :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } dma_apbperi_pms_monitor_0;
+    union {
+        struct {
+            uint32_t dma_apbperi_pms_monitor_violate_clr:    1;
+            uint32_t dma_apbperi_pms_monitor_violate_en:    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } dma_apbperi_pms_monitor_1;
+    union {
+        struct {
+            uint32_t dma_apbperi_pms_monitor_violate_intr:    1;
+            uint32_t dma_apbperi_pms_monitor_violate_status_world:    2;
+            uint32_t dma_apbperi_pms_monitor_violate_status_addr:    22;
+            uint32_t reserved25                    :    7;
+        };
+        uint32_t val;
+    } dma_apbperi_pms_monitor_2;
+    union {
+        struct {
+            uint32_t dma_apbperi_pms_monitor_violate_status_wr:    1;
+            uint32_t dma_apbperi_pms_monitor_violate_status_byteen:    16;
+            uint32_t reserved17                    :    15;
+        };
+        uint32_t val;
+    } dma_apbperi_pms_monitor_3;
+    union {
+        struct {
+            uint32_t core_x_iram0_dram0_dma_split_line_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_x_iram0_dram0_dma_split_line_constrain_0;
+    union {
+        struct {
+            uint32_t core_x_iram0_dram0_dma_sram_category_0:    2;
+            uint32_t core_x_iram0_dram0_dma_sram_category_1:    2;
+            uint32_t core_x_iram0_dram0_dma_sram_category_2:    2;
+            uint32_t core_x_iram0_dram0_dma_sram_category_3:    2;
+            uint32_t core_x_iram0_dram0_dma_sram_category_4:    2;
+            uint32_t core_x_iram0_dram0_dma_sram_category_5:    2;
+            uint32_t core_x_iram0_dram0_dma_sram_category_6:    2;
+            uint32_t core_x_iram0_dram0_dma_sram_splitaddr:    8;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_x_iram0_dram0_dma_split_line_constrain_1;
+    union {
+        struct {
+            uint32_t core_x_iram0_sram_line_0_category_0:    2;
+            uint32_t core_x_iram0_sram_line_0_category_1:    2;
+            uint32_t core_x_iram0_sram_line_0_category_2:    2;
+            uint32_t core_x_iram0_sram_line_0_category_3:    2;
+            uint32_t core_x_iram0_sram_line_0_category_4:    2;
+            uint32_t core_x_iram0_sram_line_0_category_5:    2;
+            uint32_t core_x_iram0_sram_line_0_category_6:    2;
+            uint32_t core_x_iram0_sram_line_0_splitaddr:    8;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_x_iram0_dram0_dma_split_line_constrain_2;
+    union {
+        struct {
+            uint32_t core_x_iram0_sram_line_1_category_0:    2;
+            uint32_t core_x_iram0_sram_line_1_category_1:    2;
+            uint32_t core_x_iram0_sram_line_1_category_2:    2;
+            uint32_t core_x_iram0_sram_line_1_category_3:    2;
+            uint32_t core_x_iram0_sram_line_1_category_4:    2;
+            uint32_t core_x_iram0_sram_line_1_category_5:    2;
+            uint32_t core_x_iram0_sram_line_1_category_6:    2;
+            uint32_t core_x_iram0_sram_line_1_splitaddr:    8;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_x_iram0_dram0_dma_split_line_constrain_3;
+    union {
+        struct {
+            uint32_t core_x_dram0_dma_sram_line_0_category_0:    2;
+            uint32_t core_x_dram0_dma_sram_line_0_category_1:    2;
+            uint32_t core_x_dram0_dma_sram_line_0_category_2:    2;
+            uint32_t core_x_dram0_dma_sram_line_0_category_3:    2;
+            uint32_t core_x_dram0_dma_sram_line_0_category_4:    2;
+            uint32_t core_x_dram0_dma_sram_line_0_category_5:    2;
+            uint32_t core_x_dram0_dma_sram_line_0_category_6:    2;
+            uint32_t core_x_dram0_dma_sram_line_0_splitaddr:    8;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_x_iram0_dram0_dma_split_line_constrain_4;
+    union {
+        struct {
+            uint32_t core_x_dram0_dma_sram_line_1_category_0:    2;
+            uint32_t core_x_dram0_dma_sram_line_1_category_1:    2;
+            uint32_t core_x_dram0_dma_sram_line_1_category_2:    2;
+            uint32_t core_x_dram0_dma_sram_line_1_category_3:    2;
+            uint32_t core_x_dram0_dma_sram_line_1_category_4:    2;
+            uint32_t core_x_dram0_dma_sram_line_1_category_5:    2;
+            uint32_t core_x_dram0_dma_sram_line_1_category_6:    2;
+            uint32_t core_x_dram0_dma_sram_line_1_splitaddr:    8;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_x_iram0_dram0_dma_split_line_constrain_5;
+    union {
+        struct {
+            uint32_t core_x_iram0_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_x_iram0_pms_constrain_0;
+    union {
+        struct {
+            uint32_t core_x_iram0_pms_constrain_sram_world_1_pms_0:    3;
+            uint32_t core_x_iram0_pms_constrain_sram_world_1_pms_1:    3;
+            uint32_t core_x_iram0_pms_constrain_sram_world_1_pms_2:    3;
+            uint32_t core_x_iram0_pms_constrain_sram_world_1_pms_3:    3;
+            uint32_t core_x_iram0_pms_constrain_sram_world_1_cachedataarray_pms_0:    3;
+            uint32_t core_x_iram0_pms_constrain_sram_world_1_cachedataarray_pms_1:    3;
+            uint32_t core_x_iram0_pms_constrain_rom_world_1_pms:    3;
+            uint32_t reserved21                    :    11;
+        };
+        uint32_t val;
+    } core_x_iram0_pms_constrain_1;
+    union {
+        struct {
+            uint32_t core_x_iram0_pms_constrain_sram_world_0_pms_0:    3;
+            uint32_t core_x_iram0_pms_constrain_sram_world_0_pms_1:    3;
+            uint32_t core_x_iram0_pms_constrain_sram_world_0_pms_2:    3;
+            uint32_t core_x_iram0_pms_constrain_sram_world_0_pms_3:    3;
+            uint32_t core_x_iram0_pms_constrain_sram_world_0_cachedataarray_pms_0:    3;
+            uint32_t core_x_iram0_pms_constrain_sram_world_0_cachedataarray_pms_1:    3;
+            uint32_t core_x_iram0_pms_constrain_rom_world_0_pms:    3;
+            uint32_t reserved21                    :    11;
+        };
+        uint32_t val;
+    } core_x_iram0_pms_constrain_2;
+    union {
+        struct {
+            uint32_t core_0_iram0_pms_monitor_lock :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_0_iram0_pms_monitor_0;
+    union {
+        struct {
+            uint32_t core_0_iram0_pms_monitor_violate_clr:    1;
+            uint32_t core_0_iram0_pms_monitor_violate_en:    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } core_0_iram0_pms_monitor_1;
+    union {
+        struct {
+            uint32_t core_0_iram0_pms_monitor_violate_intr:    1;
+            uint32_t core_0_iram0_pms_monitor_violate_status_wr:    1;
+            uint32_t core_0_iram0_pms_monitor_violate_status_loadstore:    1;
+            uint32_t core_0_iram0_pms_monitor_violate_status_world:    2;
+            uint32_t core_0_iram0_pms_monitor_violate_status_addr:    24;
+            uint32_t reserved29                    :    3;
+        };
+        uint32_t val;
+    } core_0_iram0_pms_monitor_2;
+    union {
+        struct {
+            uint32_t core_1_iram0_pms_monitor_lock :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_1_iram0_pms_monitor_0;
+    union {
+        struct {
+            uint32_t core_1_iram0_pms_monitor_violate_clr:    1;
+            uint32_t core_1_iram0_pms_monitor_violate_en:    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } core_1_iram0_pms_monitor_1;
+    union {
+        struct {
+            uint32_t core_1_iram0_pms_monitor_violate_intr:    1;
+            uint32_t core_1_iram0_pms_monitor_violate_status_wr:    1;
+            uint32_t core_1_iram0_pms_monitor_violate_status_loadstore:    1;
+            uint32_t core_1_iram0_pms_monitor_violate_status_world:    2;
+            uint32_t core_1_iram0_pms_monitor_violate_status_addr:    24;
+            uint32_t reserved29                    :    3;
+        };
+        uint32_t val;
+    } core_1_iram0_pms_monitor_2;
+    union {
+        struct {
+            uint32_t core_x_dram0_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_x_dram0_pms_constrain_0;
+    union {
+        struct {
+            uint32_t core_x_dram0_pms_constrain_sram_world_0_pms_0:    2;
+            uint32_t core_x_dram0_pms_constrain_sram_world_0_pms_1:    2;
+            uint32_t core_x_dram0_pms_constrain_sram_world_0_pms_2:    2;
+            uint32_t core_x_dram0_pms_constrain_sram_world_0_pms_3:    2;
+            uint32_t core_x_dram0_pms_constrain_sram_world_0_cachedataarray_pms_0:    2;
+            uint32_t core_x_dram0_pms_constrain_sram_world_0_cachedataarray_pms_1:    2;
+            uint32_t core_x_dram0_pms_constrain_sram_world_1_pms_0:    2;
+            uint32_t core_x_dram0_pms_constrain_sram_world_1_pms_1:    2;
+            uint32_t core_x_dram0_pms_constrain_sram_world_1_pms_2:    2;
+            uint32_t core_x_dram0_pms_constrain_sram_world_1_pms_3:    2;
+            uint32_t core_x_dram0_pms_constrain_sram_world_1_cachedataarray_pms_0:    2;
+            uint32_t core_x_dram0_pms_constrain_sram_world_1_cachedataarray_pms_1:    2;
+            uint32_t core_x_dram0_pms_constrain_rom_world_0_pms:    2;
+            uint32_t core_x_dram0_pms_constrain_rom_world_1_pms:    2;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } core_x_dram0_pms_constrain_1;
+    union {
+        struct {
+            uint32_t core_0_dram0_pms_monitor_lock :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_0_dram0_pms_monitor_0;
+    union {
+        struct {
+            uint32_t core_0_dram0_pms_monitor_violate_clr:    1;
+            uint32_t core_0_dram0_pms_monitor_violate_en:    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } core_0_dram0_pms_monitor_1;
+    union {
+        struct {
+            uint32_t core_0_dram0_pms_monitor_violate_intr:    1;
+            uint32_t core_0_dram0_pms_monitor_violate_status_lock:    1;
+            uint32_t core_0_dram0_pms_monitor_violate_status_world:    2;
+            uint32_t core_0_dram0_pms_monitor_violate_status_addr:    22;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } core_0_dram0_pms_monitor_2;
+    union {
+        struct {
+            uint32_t core_0_dram0_pms_monitor_violate_status_wr:    1;
+            uint32_t core_0_dram0_pms_monitor_violate_status_byteen:    16;
+            uint32_t reserved17                    :    15;
+        };
+        uint32_t val;
+    } core_0_dram0_pms_monitor_3;
+    union {
+        struct {
+            uint32_t core_1_dram0_pms_monitor_lock :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_1_dram0_pms_monitor_0;
+    union {
+        struct {
+            uint32_t core_1_dram0_pms_monitor_violate_clr:    1;
+            uint32_t core_1_dram0_pms_monitor_violate_en:    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } core_1_dram0_pms_monitor_1;
+    union {
+        struct {
+            uint32_t core_1_dram0_pms_monitor_violate_intr:    1;
+            uint32_t core_1_dram0_pms_monitor_violate_status_lock:    1;
+            uint32_t core_1_dram0_pms_monitor_violate_status_world:    2;
+            uint32_t core_1_dram0_pms_monitor_violate_status_addr:    22;
+            uint32_t reserved26                    :    6;
+        };
+        uint32_t val;
+    } core_1_dram0_pms_monitor_2;
+    union {
+        struct {
+            uint32_t core_1_dram0_pms_monitor_violate_status_wr:    1;
+            uint32_t core_1_dram0_pms_monitor_violate_status_byteen:    16;
+            uint32_t reserved17                    :    15;
+        };
+        uint32_t val;
+    } core_1_dram0_pms_monitor_3;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_lock :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_0;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_world_0_uart:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_g0spi_1:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_g0spi_0:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_gpio:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_fe2:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_fe:    2;
+            uint32_t reserved12                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_0_rtc:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_io_mux:    2;
+            uint32_t reserved18                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_0_hinf:    2;
+            uint32_t reserved22                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_0_misc:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_i2c:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_i2s0:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_uart1:    2;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_1;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_world_0_bt:    2;
+            uint32_t reserved2                     :    2;
+            uint32_t core_0_pif_pms_constrain_world_0_i2c_ext0:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_uhci0:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_slchost:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_rmt:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_pcnt:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_slc:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_ledc:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_backup:    2;
+            uint32_t reserved20                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_0_bb:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_pwm0:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_timergroup:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_timergroup1:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_systimer:    2;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_2;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_world_0_spi_2:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_spi_3:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_apb_ctrl:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_i2c_ext1:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_sdio_host:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_can:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_pwm1:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_i2s1:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_uart2:    2;
+            uint32_t reserved18                    :    2;
+            uint32_t reserved20                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_0_rwbt:    2;
+            uint32_t reserved24                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_0_wifimac:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_pwr:    2;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_3;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_world_0_usb_device:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_usb_wrap:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_crypto_peri:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_crypto_dma:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_apb_adc:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_lcd_cam:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_bt_pwr:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_usb:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_system:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_sensitive:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_interrupt:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_dma_copy:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_cache_config:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_ad:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_dio:    2;
+            uint32_t core_0_pif_pms_constrain_world_0_world_controller:    2;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_4;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_world_1_uart:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_g0spi_1:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_g0spi_0:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_gpio:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_fe2:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_fe:    2;
+            uint32_t reserved12                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_1_rtc:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_io_mux:    2;
+            uint32_t reserved18                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_1_hinf:    2;
+            uint32_t reserved22                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_1_misc:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_i2c:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_i2s0:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_uart1:    2;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_5;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_world_1_bt:    2;
+            uint32_t reserved2                     :    2;
+            uint32_t core_0_pif_pms_constrain_world_1_i2c_ext0:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_uhci0:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_slchost:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_rmt:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_pcnt:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_slc:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_ledc:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_backup:    2;
+            uint32_t reserved20                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_1_bb:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_pwm0:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_timergroup:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_timergroup1:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_systimer:    2;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_6;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_world_1_spi_2:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_spi_3:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_apb_ctrl:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_i2c_ext1:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_sdio_host:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_can:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_pwm1:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_i2s1:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_uart2:    2;
+            uint32_t reserved18                    :    2;
+            uint32_t reserved20                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_1_rwbt:    2;
+            uint32_t reserved24                    :    2;
+            uint32_t core_0_pif_pms_constrain_world_1_wifimac:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_pwr:    2;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_7;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_world_1_usb_device:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_usb_wrap:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_crypto_peri:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_crypto_dma:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_apb_adc:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_lcd_cam:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_bt_pwr:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_usb:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_system:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_sensitive:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_interrupt:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_dma_copy:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_cache_config:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_ad:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_dio:    2;
+            uint32_t core_0_pif_pms_constrain_world_1_world_controller:    2;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_8;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_rtcfast_spltaddr_world_0:    11;
+            uint32_t core_0_pif_pms_constrain_rtcfast_spltaddr_world_1:    11;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_9;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_rtcfast_world_0_l:    3;
+            uint32_t core_0_pif_pms_constrain_rtcfast_world_0_h:    3;
+            uint32_t core_0_pif_pms_constrain_rtcfast_world_1_l:    3;
+            uint32_t core_0_pif_pms_constrain_rtcfast_world_1_h:    3;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_10;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_rtcslow_0_spltaddr_world_0:    11;
+            uint32_t core_0_pif_pms_constrain_rtcslow_0_spltaddr_world_1:    11;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_11;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_rtcslow_0_world_0_l:    3;
+            uint32_t core_0_pif_pms_constrain_rtcslow_0_world_0_h:    3;
+            uint32_t core_0_pif_pms_constrain_rtcslow_0_world_1_l:    3;
+            uint32_t core_0_pif_pms_constrain_rtcslow_0_world_1_h:    3;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_12;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_rtcslow_1_spltaddr_world_0:    11;
+            uint32_t core_0_pif_pms_constrain_rtcslow_1_spltaddr_world_1:    11;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_13;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_constrain_rtcslow_1_world_0_l:    3;
+            uint32_t core_0_pif_pms_constrain_rtcslow_1_world_0_h:    3;
+            uint32_t core_0_pif_pms_constrain_rtcslow_1_world_1_l:    3;
+            uint32_t core_0_pif_pms_constrain_rtcslow_1_world_1_h:    3;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_0_pif_pms_constrain_14;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_0;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_world_0_area_0:    2;
+            uint32_t core_0_region_pms_constrain_world_0_area_1:    2;
+            uint32_t core_0_region_pms_constrain_world_0_area_2:    2;
+            uint32_t core_0_region_pms_constrain_world_0_area_3:    2;
+            uint32_t core_0_region_pms_constrain_world_0_area_4:    2;
+            uint32_t core_0_region_pms_constrain_world_0_area_5:    2;
+            uint32_t core_0_region_pms_constrain_world_0_area_6:    2;
+            uint32_t core_0_region_pms_constrain_world_0_area_7:    2;
+            uint32_t core_0_region_pms_constrain_world_0_area_8:    2;
+            uint32_t core_0_region_pms_constrain_world_0_area_9:    2;
+            uint32_t core_0_region_pms_constrain_world_0_area_10:    2;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_1;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_world_1_area_0:    2;
+            uint32_t core_0_region_pms_constrain_world_1_area_1:    2;
+            uint32_t core_0_region_pms_constrain_world_1_area_2:    2;
+            uint32_t core_0_region_pms_constrain_world_1_area_3:    2;
+            uint32_t core_0_region_pms_constrain_world_1_area_4:    2;
+            uint32_t core_0_region_pms_constrain_world_1_area_5:    2;
+            uint32_t core_0_region_pms_constrain_world_1_area_6:    2;
+            uint32_t core_0_region_pms_constrain_world_1_area_7:    2;
+            uint32_t core_0_region_pms_constrain_world_1_area_8:    2;
+            uint32_t core_0_region_pms_constrain_world_1_area_9:    2;
+            uint32_t core_0_region_pms_constrain_world_1_area_10:    2;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_2;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_0:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_3;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_1:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_4;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_2:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_5;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_3:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_6;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_4:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_7;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_5:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_8;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_6:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_9;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_7:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_10;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_8:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_11;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_9:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_12;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_10:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_13;
+    union {
+        struct {
+            uint32_t core_0_region_pms_constrain_addr_11:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_0_region_pms_constrain_14;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_monitor_lock   :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_0_pif_pms_monitor_0;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_monitor_violate_clr:    1;
+            uint32_t core_0_pif_pms_monitor_violate_en:    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } core_0_pif_pms_monitor_1;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_monitor_violate_intr:    1;
+            uint32_t core_0_pif_pms_monitor_violate_status_hport_0:    1;
+            uint32_t core_0_pif_pms_monitor_violate_status_hsize:    3;
+            uint32_t core_0_pif_pms_monitor_violate_status_hwrite:    1;
+            uint32_t core_0_pif_pms_monitor_violate_status_hworld:    2;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } core_0_pif_pms_monitor_2;
+    uint32_t core_0_pif_pms_monitor_3;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_monitor_nonword_violate_clr:    1;
+            uint32_t core_0_pif_pms_monitor_nonword_violate_en:    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } core_0_pif_pms_monitor_4;
+    union {
+        struct {
+            uint32_t core_0_pif_pms_monitor_nonword_violate_intr:    1;
+            uint32_t core_0_pif_pms_monitor_nonword_violate_status_hsize:    2;
+            uint32_t core_0_pif_pms_monitor_nonword_violate_status_hworld:    2;
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } core_0_pif_pms_monitor_5;
+    uint32_t core_0_pif_pms_monitor_6;
+    union {
+        struct {
+            uint32_t core_0_vecbase_override_lock  :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_0_vecbase_override_lock;
+    union {
+        struct {
+            uint32_t core_0_vecbase_world_mask     :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_0_vecbase_override_0;
+    union {
+        struct {
+            uint32_t core_0_vecbase_override_world0_value:    22;
+            uint32_t core_0_vecbase_override_sel   :    2;
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } core_0_vecbase_override_1;
+    union {
+        struct {
+            uint32_t core_0_vecbase_override_world1_value:    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_0_vecbase_override_2;
+    union {
+        struct {
+            uint32_t core_0_toomanyexceptions_m_override_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_0_toomanyexceptions_m_override_0;
+    union {
+        struct {
+            uint32_t core_0_toomanyexceptions_m_override:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_0_toomanyexceptions_m_override_1;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_lock :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_0;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_world_0_uart:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_g0spi_1:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_g0spi_0:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_gpio:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_fe2:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_fe:    2;
+            uint32_t reserved12                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_0_rtc:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_io_mux:    2;
+            uint32_t reserved18                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_0_hinf:    2;
+            uint32_t reserved22                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_0_misc:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_i2c:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_i2s0:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_uart1:    2;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_1;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_world_0_bt:    2;
+            uint32_t reserved2                     :    2;
+            uint32_t core_1_pif_pms_constrain_world_0_i2c_ext0:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_uhci0:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_slchost:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_rmt:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_pcnt:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_slc:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_ledc:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_backup:    2;
+            uint32_t reserved20                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_0_bb:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_pwm0:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_timergroup:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_timergroup1:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_systimer:    2;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_2;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_world_0_spi_2:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_spi_3:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_apb_ctrl:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_i2c_ext1:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_sdio_host:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_can:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_pwm1:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_i2s1:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_uart2:    2;
+            uint32_t reserved18                    :    2;
+            uint32_t reserved20                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_0_rwbt:    2;
+            uint32_t reserved24                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_0_wifimac:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_pwr:    2;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_3;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_world_0_usb_device:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_usb_wrap:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_crypto_peri:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_crypto_dma:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_apb_adc:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_lcd_cam:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_bt_pwr:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_usb:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_system:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_sensitive:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_interrupt:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_dma_copy:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_cache_config:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_ad:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_dio:    2;
+            uint32_t core_1_pif_pms_constrain_world_0_world_controller:    2;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_4;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_world_1_uart:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_g0spi_1:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_g0spi_0:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_gpio:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_fe2:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_fe:    2;
+            uint32_t reserved12                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_1_rtc:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_io_mux:    2;
+            uint32_t reserved18                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_1_hinf:    2;
+            uint32_t reserved22                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_1_misc:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_i2c:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_i2s0:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_uart1:    2;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_5;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_world_1_bt:    2;
+            uint32_t reserved2                     :    2;
+            uint32_t core_1_pif_pms_constrain_world_1_i2c_ext0:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_uhci0:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_slchost:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_rmt:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_pcnt:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_slc:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_ledc:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_backup:    2;
+            uint32_t reserved20                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_1_bb:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_pwm0:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_timergroup:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_timergroup1:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_systimer:    2;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_6;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_world_1_spi_2:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_spi_3:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_apb_ctrl:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_i2c_ext1:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_sdio_host:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_can:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_pwm1:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_i2s1:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_uart2:    2;
+            uint32_t reserved18                    :    2;
+            uint32_t reserved20                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_1_rwbt:    2;
+            uint32_t reserved24                    :    2;
+            uint32_t core_1_pif_pms_constrain_world_1_wifimac:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_pwr:    2;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_7;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_world_1_usb_device:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_usb_wrap:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_crypto_peri:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_crypto_dma:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_apb_adc:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_lcd_cam:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_bt_pwr:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_usb:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_system:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_sensitive:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_interrupt:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_dma_copy:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_cache_config:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_ad:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_dio:    2;
+            uint32_t core_1_pif_pms_constrain_world_1_world_controller:    2;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_8;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_rtcfast_spltaddr_world_0:    11;
+            uint32_t core_1_pif_pms_constrain_rtcfast_spltaddr_world_1:    11;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_9;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_rtcfast_world_0_l:    3;
+            uint32_t core_1_pif_pms_constrain_rtcfast_world_0_h:    3;
+            uint32_t core_1_pif_pms_constrain_rtcfast_world_1_l:    3;
+            uint32_t core_1_pif_pms_constrain_rtcfast_world_1_h:    3;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_10;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_rtcslow_0_spltaddr_world_0:    11;
+            uint32_t core_1_pif_pms_constrain_rtcslow_0_spltaddr_world_1:    11;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_11;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_rtcslow_0_world_0_l:    3;
+            uint32_t core_1_pif_pms_constrain_rtcslow_0_world_0_h:    3;
+            uint32_t core_1_pif_pms_constrain_rtcslow_0_world_1_l:    3;
+            uint32_t core_1_pif_pms_constrain_rtcslow_0_world_1_h:    3;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_12;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_rtcslow_1_spltaddr_world_0:    11;
+            uint32_t core_1_pif_pms_constrain_rtcslow_1_spltaddr_world_1:    11;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_13;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_constrain_rtcslow_1_world_0_l:    3;
+            uint32_t core_1_pif_pms_constrain_rtcslow_1_world_0_h:    3;
+            uint32_t core_1_pif_pms_constrain_rtcslow_1_world_1_l:    3;
+            uint32_t core_1_pif_pms_constrain_rtcslow_1_world_1_h:    3;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } core_1_pif_pms_constrain_14;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_0;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_world_0_area_0:    2;
+            uint32_t core_1_region_pms_constrain_world_0_area_1:    2;
+            uint32_t core_1_region_pms_constrain_world_0_area_2:    2;
+            uint32_t core_1_region_pms_constrain_world_0_area_3:    2;
+            uint32_t core_1_region_pms_constrain_world_0_area_4:    2;
+            uint32_t core_1_region_pms_constrain_world_0_area_5:    2;
+            uint32_t core_1_region_pms_constrain_world_0_area_6:    2;
+            uint32_t core_1_region_pms_constrain_world_0_area_7:    2;
+            uint32_t core_1_region_pms_constrain_world_0_area_8:    2;
+            uint32_t core_1_region_pms_constrain_world_0_area_9:    2;
+            uint32_t core_1_region_pms_constrain_world_0_area_10:    2;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_1;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_world_1_area_0:    2;
+            uint32_t core_1_region_pms_constrain_world_1_area_1:    2;
+            uint32_t core_1_region_pms_constrain_world_1_area_2:    2;
+            uint32_t core_1_region_pms_constrain_world_1_area_3:    2;
+            uint32_t core_1_region_pms_constrain_world_1_area_4:    2;
+            uint32_t core_1_region_pms_constrain_world_1_area_5:    2;
+            uint32_t core_1_region_pms_constrain_world_1_area_6:    2;
+            uint32_t core_1_region_pms_constrain_world_1_area_7:    2;
+            uint32_t core_1_region_pms_constrain_world_1_area_8:    2;
+            uint32_t core_1_region_pms_constrain_world_1_area_9:    2;
+            uint32_t core_1_region_pms_constrain_world_1_area_10:    2;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_2;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_0:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_3;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_1:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_4;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_2:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_5;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_3:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_6;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_4:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_7;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_5:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_8;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_6:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_9;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_7:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_10;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_8:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_11;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_9:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_12;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_10:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_13;
+    union {
+        struct {
+            uint32_t core_1_region_pms_constrain_addr_11:    30;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } core_1_region_pms_constrain_14;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_monitor_lock   :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_1_pif_pms_monitor_0;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_monitor_violate_clr:    1;
+            uint32_t core_1_pif_pms_monitor_violate_en:    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } core_1_pif_pms_monitor_1;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_monitor_violate_intr:    1;
+            uint32_t core_1_pif_pms_monitor_violate_status_hport_0:    1;
+            uint32_t core_1_pif_pms_monitor_violate_status_hsize:    3;
+            uint32_t core_1_pif_pms_monitor_violate_status_hwrite:    1;
+            uint32_t core_1_pif_pms_monitor_violate_status_hworld:    2;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } core_1_pif_pms_monitor_2;
+    uint32_t core_1_pif_pms_monitor_3;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_monitor_nonword_violate_clr:    1;
+            uint32_t core_1_pif_pms_monitor_nonword_violate_en:    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } core_1_pif_pms_monitor_4;
+    union {
+        struct {
+            uint32_t core_1_pif_pms_monitor_nonword_violate_intr:    1;
+            uint32_t core_1_pif_pms_monitor_nonword_violate_status_hsize:    2;
+            uint32_t core_1_pif_pms_monitor_nonword_violate_status_hworld:    2;
+            uint32_t reserved5                     :    27;
+        };
+        uint32_t val;
+    } core_1_pif_pms_monitor_5;
+    uint32_t core_1_pif_pms_monitor_6;
+    union {
+        struct {
+            uint32_t core_1_vecbase_override_lock  :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_1_vecbase_override_lock;
+    union {
+        struct {
+            uint32_t core_1_vecbase_world_mask     :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_1_vecbase_override_0;
+    union {
+        struct {
+            uint32_t core_1_vecbase_override_world0_value:    22;
+            uint32_t core_1_vecbase_override_sel   :    2;
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } core_1_vecbase_override_1;
+    union {
+        struct {
+            uint32_t core_1_vecbase_override_world1_value:    22;
+            uint32_t reserved22                    :    10;
+        };
+        uint32_t val;
+    } core_1_vecbase_override_2;
+    union {
+        struct {
+            uint32_t core_1_toomanyexceptions_m_override_lock:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_1_toomanyexceptions_m_override_0;
+    union {
+        struct {
+            uint32_t core_1_toomanyexceptions_m_override:    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } core_1_toomanyexceptions_m_override_1;
+    union {
+        struct {
+            uint32_t backup_bus_pms_constrain_lock :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } backup_bus_pms_constrain_0;
+    union {
+        struct {
+            uint32_t backup_bus_pms_constrain_uart :    2;
+            uint32_t backup_bus_pms_constrain_g0spi_1:    2;
+            uint32_t backup_bus_pms_constrain_g0spi_0:    2;
+            uint32_t backup_bus_pms_constrain_gpio :    2;
+            uint32_t backup_bus_pms_constrain_fe2  :    2;
+            uint32_t backup_bus_pms_constrain_fe   :    2;
+            uint32_t reserved12                    :    2;
+            uint32_t backup_bus_pms_constrain_rtc  :    2;
+            uint32_t backup_bus_pms_constrain_io_mux:    2;
+            uint32_t reserved18                    :    2;
+            uint32_t backup_bus_pms_constrain_hinf :    2;
+            uint32_t reserved22                    :    2;
+            uint32_t backup_bus_pms_constrain_misc :    2;
+            uint32_t backup_bus_pms_constrain_i2c  :    2;
+            uint32_t backup_bus_pms_constrain_i2s0 :    2;
+            uint32_t backup_bus_pms_constrain_uart1:    2;
+        };
+        uint32_t val;
+    } backup_bus_pms_constrain_1;
+    union {
+        struct {
+            uint32_t backup_bus_pms_constrain_bt   :    2;
+            uint32_t reserved2                     :    2;
+            uint32_t backup_bus_pms_constrain_i2c_ext0:    2;
+            uint32_t backup_bus_pms_constrain_uhci0:    2;
+            uint32_t backup_bus_pms_constrain_slchost:    2;
+            uint32_t backup_bus_pms_constrain_rmt  :    2;
+            uint32_t backup_bus_pms_constrain_pcnt :    2;
+            uint32_t backup_bus_pms_constrain_slc  :    2;
+            uint32_t backup_bus_pms_constrain_ledc :    2;
+            uint32_t backup_bus_pms_constrain_backup:    2;
+            uint32_t reserved20                    :    2;
+            uint32_t backup_bus_pms_constrain_bb   :    2;
+            uint32_t backup_bus_pms_constrain_pwm0 :    2;
+            uint32_t backup_bus_pms_constrain_timergroup:    2;
+            uint32_t backup_bus_pms_constrain_timergroup1:    2;
+            uint32_t backup_bus_pms_constrain_systimer:    2;
+        };
+        uint32_t val;
+    } backup_bus_pms_constrain_2;
+    union {
+        struct {
+            uint32_t backup_bus_pms_constrain_spi_2:    2;
+            uint32_t backup_bus_pms_constrain_spi_3:    2;
+            uint32_t backup_bus_pms_constrain_apb_ctrl:    2;
+            uint32_t backup_bus_pms_constrain_i2c_ext1:    2;
+            uint32_t backup_bus_pms_constrain_sdio_host:    2;
+            uint32_t backup_bus_pms_constrain_can  :    2;
+            uint32_t backup_bus_pms_constrain_pwm1 :    2;
+            uint32_t backup_bus_pms_constrain_i2s1 :    2;
+            uint32_t backup_bus_pms_constrain_uart2:    2;
+            uint32_t reserved18                    :    2;
+            uint32_t reserved20                    :    2;
+            uint32_t backup_bus_pms_constrain_rwbt :    2;
+            uint32_t reserved24                    :    2;
+            uint32_t backup_bus_pms_constrain_wifimac:    2;
+            uint32_t backup_bus_pms_constrain_pwr  :    2;
+            uint32_t reserved30                    :    2;
+        };
+        uint32_t val;
+    } backup_bus_pms_constrain_3;
+    union {
+        struct {
+            uint32_t backup_bus_pms_constrain_usb_device:    2;
+            uint32_t backup_bus_pms_constrain_usb_wrap:    2;
+            uint32_t backup_bus_pms_constrain_crypto_peri:    2;
+            uint32_t backup_bus_pms_constrain_crypto_dma:    2;
+            uint32_t backup_bus_pms_constrain_apb_adc:    2;
+            uint32_t backup_bus_pms_constrain_lcd_cam:    2;
+            uint32_t backup_bus_pms_constrain_bt_pwr:    2;
+            uint32_t backup_bus_pms_constrain_usb  :    2;
+            uint32_t backup_bus_pms_constrain_system:    2;
+            uint32_t backup_bus_pms_constrain_sensitive:    2;
+            uint32_t backup_bus_pms_constrain_interrupt:    2;
+            uint32_t backup_bus_pms_constrain_dma_copy:    2;
+            uint32_t backup_bus_pms_constrain_cache_config:    2;
+            uint32_t backup_bus_pms_constrain_ad   :    2;
+            uint32_t backup_bus_pms_constrain_dio  :    2;
+            uint32_t backup_bus_pms_constrain_world_controller:    2;
+        };
+        uint32_t val;
+    } backup_bus_pms_constrain_4;
+    union {
+        struct {
+            uint32_t backup_bus_pms_constrain_rtcfast_spltaddr:    11;
+            uint32_t reserved11                    :    21;
+        };
+        uint32_t val;
+    } backup_bus_pms_constrain_5;
+    union {
+        struct {
+            uint32_t backup_bus_pms_constrain_rtcfast_l:    3;
+            uint32_t backup_bus_pms_constrain_rtcfast_h:    3;
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } backup_bus_pms_constrain_6;
+    union {
+        struct {
+            uint32_t backup_bus_pms_monitor_lock   :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } backup_bus_pms_monitor_0;
+    union {
+        struct {
+            uint32_t backup_bus_pms_monitor_violate_clr:    1;
+            uint32_t backup_bus_pms_monitor_violate_en:    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } backup_bus_pms_monitor_1;
+    union {
+        struct {
+            uint32_t backup_bus_pms_monitor_violate_intr:    1;
+            uint32_t backup_bus_pms_monitor_violate_status_htrans:    2;
+            uint32_t backup_bus_pms_monitor_violate_status_hsize:    3;
+            uint32_t backup_bus_pms_monitor_violate_status_hwrite:    1;
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } backup_bus_pms_monitor_2;
+    uint32_t backup_bus_pms_monitor_3;
+    union {
+        struct {
+            uint32_t edma_boundary_lock            :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } edma_boundary_lock;
+    union {
+        struct {
+            uint32_t edma_boundary_0               :    14;
+            uint32_t reserved14                    :    18;
+        };
+        uint32_t val;
+    } edma_boundary_0;
+    union {
+        struct {
+            uint32_t edma_boundary_1               :    14;
+            uint32_t reserved14                    :    18;
+        };
+        uint32_t val;
+    } edma_boundary_1;
+    union {
+        struct {
+            uint32_t edma_boundary_2               :    14;
+            uint32_t reserved14                    :    18;
+        };
+        uint32_t val;
+    } edma_boundary_2;
+    union {
+        struct {
+            uint32_t edma_pms_spi2_lock            :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } edma_pms_spi2_lock;
+    union {
+        struct {
+            uint32_t edma_pms_spi2_attr1           :    2;
+            uint32_t edma_pms_spi2_attr2           :    2;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } edma_pms_spi2;
+    union {
+        struct {
+            uint32_t edma_pms_spi3_lock            :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } edma_pms_spi3_lock;
+    union {
+        struct {
+            uint32_t edma_pms_spi3_attr1           :    2;
+            uint32_t edma_pms_spi3_attr2           :    2;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } edma_pms_spi3;
+    union {
+        struct {
+            uint32_t edma_pms_uhci0_lock           :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } edma_pms_uhci0_lock;
+    union {
+        struct {
+            uint32_t edma_pms_uhci0_attr1          :    2;
+            uint32_t edma_pms_uhci0_attr2          :    2;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } edma_pms_uhci0;
+    union {
+        struct {
+            uint32_t edma_pms_i2s0_lock            :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } edma_pms_i2s0_lock;
+    union {
+        struct {
+            uint32_t edma_pms_i2s0_attr1           :    2;
+            uint32_t edma_pms_i2s0_attr2           :    2;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } edma_pms_i2s0;
+    union {
+        struct {
+            uint32_t edma_pms_i2s1_lock            :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } edma_pms_i2s1_lock;
+    union {
+        struct {
+            uint32_t edma_pms_i2s1_attr1           :    2;
+            uint32_t edma_pms_i2s1_attr2           :    2;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } edma_pms_i2s1;
+    union {
+        struct {
+            uint32_t edma_pms_lcd_cam_lock         :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } edma_pms_lcd_cam_lock;
+    union {
+        struct {
+            uint32_t edma_pms_lcd_cam_attr1        :    2;
+            uint32_t edma_pms_lcd_cam_attr2        :    2;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } edma_pms_lcd_cam;
+    union {
+        struct {
+            uint32_t edma_pms_aes_lock             :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } edma_pms_aes_lock;
+    union {
+        struct {
+            uint32_t edma_pms_aes_attr1            :    2;
+            uint32_t edma_pms_aes_attr2            :    2;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } edma_pms_aes;
+    union {
+        struct {
+            uint32_t edma_pms_sha_lock             :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } edma_pms_sha_lock;
+    union {
+        struct {
+            uint32_t edma_pms_sha_attr1            :    2;
+            uint32_t edma_pms_sha_attr2            :    2;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } edma_pms_sha;
+    union {
+        struct {
+            uint32_t edma_pms_adc_dac_lock         :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } edma_pms_adc_dac_lock;
+    union {
+        struct {
+            uint32_t edma_pms_adc_dac_attr1        :    2;
+            uint32_t edma_pms_adc_dac_attr2        :    2;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } edma_pms_adc_dac;
+    union {
+        struct {
+            uint32_t edma_pms_rmt_lock             :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } edma_pms_rmt_lock;
+    union {
+        struct {
+            uint32_t edma_pms_rmt_attr1            :    2;
+            uint32_t edma_pms_rmt_attr2            :    2;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } edma_pms_rmt;
+    union {
+        struct {
+            uint32_t reg_clk_en                    :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } clock_gate;
+    union {
+        struct {
+            uint32_t dis_rtc_cpu                   :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } rtc_pms;
+    uint32_t reserved_310;
+    uint32_t reserved_314;
+    uint32_t reserved_318;
+    uint32_t reserved_31c;
+    uint32_t reserved_320;
+    uint32_t reserved_324;
+    uint32_t reserved_328;
+    uint32_t reserved_32c;
+    uint32_t reserved_330;
+    uint32_t reserved_334;
+    uint32_t reserved_338;
+    uint32_t reserved_33c;
+    uint32_t reserved_340;
+    uint32_t reserved_344;
+    uint32_t reserved_348;
+    uint32_t reserved_34c;
+    uint32_t reserved_350;
+    uint32_t reserved_354;
+    uint32_t reserved_358;
+    uint32_t reserved_35c;
+    uint32_t reserved_360;
+    uint32_t reserved_364;
+    uint32_t reserved_368;
+    uint32_t reserved_36c;
+    uint32_t reserved_370;
+    uint32_t reserved_374;
+    uint32_t reserved_378;
+    uint32_t reserved_37c;
+    uint32_t reserved_380;
+    uint32_t reserved_384;
+    uint32_t reserved_388;
+    uint32_t reserved_38c;
+    uint32_t reserved_390;
+    uint32_t reserved_394;
+    uint32_t reserved_398;
+    uint32_t reserved_39c;
+    uint32_t reserved_3a0;
+    uint32_t reserved_3a4;
+    uint32_t reserved_3a8;
+    uint32_t reserved_3ac;
+    uint32_t reserved_3b0;
+    uint32_t reserved_3b4;
+    uint32_t reserved_3b8;
+    uint32_t reserved_3bc;
+    uint32_t reserved_3c0;
+    uint32_t reserved_3c4;
+    uint32_t reserved_3c8;
+    uint32_t reserved_3cc;
+    uint32_t reserved_3d0;
+    uint32_t reserved_3d4;
+    uint32_t reserved_3d8;
+    uint32_t reserved_3dc;
+    uint32_t reserved_3e0;
+    uint32_t reserved_3e4;
+    uint32_t reserved_3e8;
+    uint32_t reserved_3ec;
+    uint32_t reserved_3f0;
+    uint32_t reserved_3f4;
+    uint32_t reserved_3f8;
+    uint32_t reserved_3fc;
+    uint32_t reserved_400;
+    uint32_t reserved_404;
+    uint32_t reserved_408;
+    uint32_t reserved_40c;
+    uint32_t reserved_410;
+    uint32_t reserved_414;
+    uint32_t reserved_418;
+    uint32_t reserved_41c;
+    uint32_t reserved_420;
+    uint32_t reserved_424;
+    uint32_t reserved_428;
+    uint32_t reserved_42c;
+    uint32_t reserved_430;
+    uint32_t reserved_434;
+    uint32_t reserved_438;
+    uint32_t reserved_43c;
+    uint32_t reserved_440;
+    uint32_t reserved_444;
+    uint32_t reserved_448;
+    uint32_t reserved_44c;
+    uint32_t reserved_450;
+    uint32_t reserved_454;
+    uint32_t reserved_458;
+    uint32_t reserved_45c;
+    uint32_t reserved_460;
+    uint32_t reserved_464;
+    uint32_t reserved_468;
+    uint32_t reserved_46c;
+    uint32_t reserved_470;
+    uint32_t reserved_474;
+    uint32_t reserved_478;
+    uint32_t reserved_47c;
+    uint32_t reserved_480;
+    uint32_t reserved_484;
+    uint32_t reserved_488;
+    uint32_t reserved_48c;
+    uint32_t reserved_490;
+    uint32_t reserved_494;
+    uint32_t reserved_498;
+    uint32_t reserved_49c;
+    uint32_t reserved_4a0;
+    uint32_t reserved_4a4;
+    uint32_t reserved_4a8;
+    uint32_t reserved_4ac;
+    uint32_t reserved_4b0;
+    uint32_t reserved_4b4;
+    uint32_t reserved_4b8;
+    uint32_t reserved_4bc;
+    uint32_t reserved_4c0;
+    uint32_t reserved_4c4;
+    uint32_t reserved_4c8;
+    uint32_t reserved_4cc;
+    uint32_t reserved_4d0;
+    uint32_t reserved_4d4;
+    uint32_t reserved_4d8;
+    uint32_t reserved_4dc;
+    uint32_t reserved_4e0;
+    uint32_t reserved_4e4;
+    uint32_t reserved_4e8;
+    uint32_t reserved_4ec;
+    uint32_t reserved_4f0;
+    uint32_t reserved_4f4;
+    uint32_t reserved_4f8;
+    uint32_t reserved_4fc;
+    uint32_t reserved_500;
+    uint32_t reserved_504;
+    uint32_t reserved_508;
+    uint32_t reserved_50c;
+    uint32_t reserved_510;
+    uint32_t reserved_514;
+    uint32_t reserved_518;
+    uint32_t reserved_51c;
+    uint32_t reserved_520;
+    uint32_t reserved_524;
+    uint32_t reserved_528;
+    uint32_t reserved_52c;
+    uint32_t reserved_530;
+    uint32_t reserved_534;
+    uint32_t reserved_538;
+    uint32_t reserved_53c;
+    uint32_t reserved_540;
+    uint32_t reserved_544;
+    uint32_t reserved_548;
+    uint32_t reserved_54c;
+    uint32_t reserved_550;
+    uint32_t reserved_554;
+    uint32_t reserved_558;
+    uint32_t reserved_55c;
+    uint32_t reserved_560;
+    uint32_t reserved_564;
+    uint32_t reserved_568;
+    uint32_t reserved_56c;
+    uint32_t reserved_570;
+    uint32_t reserved_574;
+    uint32_t reserved_578;
+    uint32_t reserved_57c;
+    uint32_t reserved_580;
+    uint32_t reserved_584;
+    uint32_t reserved_588;
+    uint32_t reserved_58c;
+    uint32_t reserved_590;
+    uint32_t reserved_594;
+    uint32_t reserved_598;
+    uint32_t reserved_59c;
+    uint32_t reserved_5a0;
+    uint32_t reserved_5a4;
+    uint32_t reserved_5a8;
+    uint32_t reserved_5ac;
+    uint32_t reserved_5b0;
+    uint32_t reserved_5b4;
+    uint32_t reserved_5b8;
+    uint32_t reserved_5bc;
+    uint32_t reserved_5c0;
+    uint32_t reserved_5c4;
+    uint32_t reserved_5c8;
+    uint32_t reserved_5cc;
+    uint32_t reserved_5d0;
+    uint32_t reserved_5d4;
+    uint32_t reserved_5d8;
+    uint32_t reserved_5dc;
+    uint32_t reserved_5e0;
+    uint32_t reserved_5e4;
+    uint32_t reserved_5e8;
+    uint32_t reserved_5ec;
+    uint32_t reserved_5f0;
+    uint32_t reserved_5f4;
+    uint32_t reserved_5f8;
+    uint32_t reserved_5fc;
+    uint32_t reserved_600;
+    uint32_t reserved_604;
+    uint32_t reserved_608;
+    uint32_t reserved_60c;
+    uint32_t reserved_610;
+    uint32_t reserved_614;
+    uint32_t reserved_618;
+    uint32_t reserved_61c;
+    uint32_t reserved_620;
+    uint32_t reserved_624;
+    uint32_t reserved_628;
+    uint32_t reserved_62c;
+    uint32_t reserved_630;
+    uint32_t reserved_634;
+    uint32_t reserved_638;
+    uint32_t reserved_63c;
+    uint32_t reserved_640;
+    uint32_t reserved_644;
+    uint32_t reserved_648;
+    uint32_t reserved_64c;
+    uint32_t reserved_650;
+    uint32_t reserved_654;
+    uint32_t reserved_658;
+    uint32_t reserved_65c;
+    uint32_t reserved_660;
+    uint32_t reserved_664;
+    uint32_t reserved_668;
+    uint32_t reserved_66c;
+    uint32_t reserved_670;
+    uint32_t reserved_674;
+    uint32_t reserved_678;
+    uint32_t reserved_67c;
+    uint32_t reserved_680;
+    uint32_t reserved_684;
+    uint32_t reserved_688;
+    uint32_t reserved_68c;
+    uint32_t reserved_690;
+    uint32_t reserved_694;
+    uint32_t reserved_698;
+    uint32_t reserved_69c;
+    uint32_t reserved_6a0;
+    uint32_t reserved_6a4;
+    uint32_t reserved_6a8;
+    uint32_t reserved_6ac;
+    uint32_t reserved_6b0;
+    uint32_t reserved_6b4;
+    uint32_t reserved_6b8;
+    uint32_t reserved_6bc;
+    uint32_t reserved_6c0;
+    uint32_t reserved_6c4;
+    uint32_t reserved_6c8;
+    uint32_t reserved_6cc;
+    uint32_t reserved_6d0;
+    uint32_t reserved_6d4;
+    uint32_t reserved_6d8;
+    uint32_t reserved_6dc;
+    uint32_t reserved_6e0;
+    uint32_t reserved_6e4;
+    uint32_t reserved_6e8;
+    uint32_t reserved_6ec;
+    uint32_t reserved_6f0;
+    uint32_t reserved_6f4;
+    uint32_t reserved_6f8;
+    uint32_t reserved_6fc;
+    uint32_t reserved_700;
+    uint32_t reserved_704;
+    uint32_t reserved_708;
+    uint32_t reserved_70c;
+    uint32_t reserved_710;
+    uint32_t reserved_714;
+    uint32_t reserved_718;
+    uint32_t reserved_71c;
+    uint32_t reserved_720;
+    uint32_t reserved_724;
+    uint32_t reserved_728;
+    uint32_t reserved_72c;
+    uint32_t reserved_730;
+    uint32_t reserved_734;
+    uint32_t reserved_738;
+    uint32_t reserved_73c;
+    uint32_t reserved_740;
+    uint32_t reserved_744;
+    uint32_t reserved_748;
+    uint32_t reserved_74c;
+    uint32_t reserved_750;
+    uint32_t reserved_754;
+    uint32_t reserved_758;
+    uint32_t reserved_75c;
+    uint32_t reserved_760;
+    uint32_t reserved_764;
+    uint32_t reserved_768;
+    uint32_t reserved_76c;
+    uint32_t reserved_770;
+    uint32_t reserved_774;
+    uint32_t reserved_778;
+    uint32_t reserved_77c;
+    uint32_t reserved_780;
+    uint32_t reserved_784;
+    uint32_t reserved_788;
+    uint32_t reserved_78c;
+    uint32_t reserved_790;
+    uint32_t reserved_794;
+    uint32_t reserved_798;
+    uint32_t reserved_79c;
+    uint32_t reserved_7a0;
+    uint32_t reserved_7a4;
+    uint32_t reserved_7a8;
+    uint32_t reserved_7ac;
+    uint32_t reserved_7b0;
+    uint32_t reserved_7b4;
+    uint32_t reserved_7b8;
+    uint32_t reserved_7bc;
+    uint32_t reserved_7c0;
+    uint32_t reserved_7c4;
+    uint32_t reserved_7c8;
+    uint32_t reserved_7cc;
+    uint32_t reserved_7d0;
+    uint32_t reserved_7d4;
+    uint32_t reserved_7d8;
+    uint32_t reserved_7dc;
+    uint32_t reserved_7e0;
+    uint32_t reserved_7e4;
+    uint32_t reserved_7e8;
+    uint32_t reserved_7ec;
+    uint32_t reserved_7f0;
+    uint32_t reserved_7f4;
+    uint32_t reserved_7f8;
+    uint32_t reserved_7fc;
+    uint32_t reserved_800;
+    uint32_t reserved_804;
+    uint32_t reserved_808;
+    uint32_t reserved_80c;
+    uint32_t reserved_810;
+    uint32_t reserved_814;
+    uint32_t reserved_818;
+    uint32_t reserved_81c;
+    uint32_t reserved_820;
+    uint32_t reserved_824;
+    uint32_t reserved_828;
+    uint32_t reserved_82c;
+    uint32_t reserved_830;
+    uint32_t reserved_834;
+    uint32_t reserved_838;
+    uint32_t reserved_83c;
+    uint32_t reserved_840;
+    uint32_t reserved_844;
+    uint32_t reserved_848;
+    uint32_t reserved_84c;
+    uint32_t reserved_850;
+    uint32_t reserved_854;
+    uint32_t reserved_858;
+    uint32_t reserved_85c;
+    uint32_t reserved_860;
+    uint32_t reserved_864;
+    uint32_t reserved_868;
+    uint32_t reserved_86c;
+    uint32_t reserved_870;
+    uint32_t reserved_874;
+    uint32_t reserved_878;
+    uint32_t reserved_87c;
+    uint32_t reserved_880;
+    uint32_t reserved_884;
+    uint32_t reserved_888;
+    uint32_t reserved_88c;
+    uint32_t reserved_890;
+    uint32_t reserved_894;
+    uint32_t reserved_898;
+    uint32_t reserved_89c;
+    uint32_t reserved_8a0;
+    uint32_t reserved_8a4;
+    uint32_t reserved_8a8;
+    uint32_t reserved_8ac;
+    uint32_t reserved_8b0;
+    uint32_t reserved_8b4;
+    uint32_t reserved_8b8;
+    uint32_t reserved_8bc;
+    uint32_t reserved_8c0;
+    uint32_t reserved_8c4;
+    uint32_t reserved_8c8;
+    uint32_t reserved_8cc;
+    uint32_t reserved_8d0;
+    uint32_t reserved_8d4;
+    uint32_t reserved_8d8;
+    uint32_t reserved_8dc;
+    uint32_t reserved_8e0;
+    uint32_t reserved_8e4;
+    uint32_t reserved_8e8;
+    uint32_t reserved_8ec;
+    uint32_t reserved_8f0;
+    uint32_t reserved_8f4;
+    uint32_t reserved_8f8;
+    uint32_t reserved_8fc;
+    uint32_t reserved_900;
+    uint32_t reserved_904;
+    uint32_t reserved_908;
+    uint32_t reserved_90c;
+    uint32_t reserved_910;
+    uint32_t reserved_914;
+    uint32_t reserved_918;
+    uint32_t reserved_91c;
+    uint32_t reserved_920;
+    uint32_t reserved_924;
+    uint32_t reserved_928;
+    uint32_t reserved_92c;
+    uint32_t reserved_930;
+    uint32_t reserved_934;
+    uint32_t reserved_938;
+    uint32_t reserved_93c;
+    uint32_t reserved_940;
+    uint32_t reserved_944;
+    uint32_t reserved_948;
+    uint32_t reserved_94c;
+    uint32_t reserved_950;
+    uint32_t reserved_954;
+    uint32_t reserved_958;
+    uint32_t reserved_95c;
+    uint32_t reserved_960;
+    uint32_t reserved_964;
+    uint32_t reserved_968;
+    uint32_t reserved_96c;
+    uint32_t reserved_970;
+    uint32_t reserved_974;
+    uint32_t reserved_978;
+    uint32_t reserved_97c;
+    uint32_t reserved_980;
+    uint32_t reserved_984;
+    uint32_t reserved_988;
+    uint32_t reserved_98c;
+    uint32_t reserved_990;
+    uint32_t reserved_994;
+    uint32_t reserved_998;
+    uint32_t reserved_99c;
+    uint32_t reserved_9a0;
+    uint32_t reserved_9a4;
+    uint32_t reserved_9a8;
+    uint32_t reserved_9ac;
+    uint32_t reserved_9b0;
+    uint32_t reserved_9b4;
+    uint32_t reserved_9b8;
+    uint32_t reserved_9bc;
+    uint32_t reserved_9c0;
+    uint32_t reserved_9c4;
+    uint32_t reserved_9c8;
+    uint32_t reserved_9cc;
+    uint32_t reserved_9d0;
+    uint32_t reserved_9d4;
+    uint32_t reserved_9d8;
+    uint32_t reserved_9dc;
+    uint32_t reserved_9e0;
+    uint32_t reserved_9e4;
+    uint32_t reserved_9e8;
+    uint32_t reserved_9ec;
+    uint32_t reserved_9f0;
+    uint32_t reserved_9f4;
+    uint32_t reserved_9f8;
+    uint32_t reserved_9fc;
+    uint32_t reserved_a00;
+    uint32_t reserved_a04;
+    uint32_t reserved_a08;
+    uint32_t reserved_a0c;
+    uint32_t reserved_a10;
+    uint32_t reserved_a14;
+    uint32_t reserved_a18;
+    uint32_t reserved_a1c;
+    uint32_t reserved_a20;
+    uint32_t reserved_a24;
+    uint32_t reserved_a28;
+    uint32_t reserved_a2c;
+    uint32_t reserved_a30;
+    uint32_t reserved_a34;
+    uint32_t reserved_a38;
+    uint32_t reserved_a3c;
+    uint32_t reserved_a40;
+    uint32_t reserved_a44;
+    uint32_t reserved_a48;
+    uint32_t reserved_a4c;
+    uint32_t reserved_a50;
+    uint32_t reserved_a54;
+    uint32_t reserved_a58;
+    uint32_t reserved_a5c;
+    uint32_t reserved_a60;
+    uint32_t reserved_a64;
+    uint32_t reserved_a68;
+    uint32_t reserved_a6c;
+    uint32_t reserved_a70;
+    uint32_t reserved_a74;
+    uint32_t reserved_a78;
+    uint32_t reserved_a7c;
+    uint32_t reserved_a80;
+    uint32_t reserved_a84;
+    uint32_t reserved_a88;
+    uint32_t reserved_a8c;
+    uint32_t reserved_a90;
+    uint32_t reserved_a94;
+    uint32_t reserved_a98;
+    uint32_t reserved_a9c;
+    uint32_t reserved_aa0;
+    uint32_t reserved_aa4;
+    uint32_t reserved_aa8;
+    uint32_t reserved_aac;
+    uint32_t reserved_ab0;
+    uint32_t reserved_ab4;
+    uint32_t reserved_ab8;
+    uint32_t reserved_abc;
+    uint32_t reserved_ac0;
+    uint32_t reserved_ac4;
+    uint32_t reserved_ac8;
+    uint32_t reserved_acc;
+    uint32_t reserved_ad0;
+    uint32_t reserved_ad4;
+    uint32_t reserved_ad8;
+    uint32_t reserved_adc;
+    uint32_t reserved_ae0;
+    uint32_t reserved_ae4;
+    uint32_t reserved_ae8;
+    uint32_t reserved_aec;
+    uint32_t reserved_af0;
+    uint32_t reserved_af4;
+    uint32_t reserved_af8;
+    uint32_t reserved_afc;
+    uint32_t reserved_b00;
+    uint32_t reserved_b04;
+    uint32_t reserved_b08;
+    uint32_t reserved_b0c;
+    uint32_t reserved_b10;
+    uint32_t reserved_b14;
+    uint32_t reserved_b18;
+    uint32_t reserved_b1c;
+    uint32_t reserved_b20;
+    uint32_t reserved_b24;
+    uint32_t reserved_b28;
+    uint32_t reserved_b2c;
+    uint32_t reserved_b30;
+    uint32_t reserved_b34;
+    uint32_t reserved_b38;
+    uint32_t reserved_b3c;
+    uint32_t reserved_b40;
+    uint32_t reserved_b44;
+    uint32_t reserved_b48;
+    uint32_t reserved_b4c;
+    uint32_t reserved_b50;
+    uint32_t reserved_b54;
+    uint32_t reserved_b58;
+    uint32_t reserved_b5c;
+    uint32_t reserved_b60;
+    uint32_t reserved_b64;
+    uint32_t reserved_b68;
+    uint32_t reserved_b6c;
+    uint32_t reserved_b70;
+    uint32_t reserved_b74;
+    uint32_t reserved_b78;
+    uint32_t reserved_b7c;
+    uint32_t reserved_b80;
+    uint32_t reserved_b84;
+    uint32_t reserved_b88;
+    uint32_t reserved_b8c;
+    uint32_t reserved_b90;
+    uint32_t reserved_b94;
+    uint32_t reserved_b98;
+    uint32_t reserved_b9c;
+    uint32_t reserved_ba0;
+    uint32_t reserved_ba4;
+    uint32_t reserved_ba8;
+    uint32_t reserved_bac;
+    uint32_t reserved_bb0;
+    uint32_t reserved_bb4;
+    uint32_t reserved_bb8;
+    uint32_t reserved_bbc;
+    uint32_t reserved_bc0;
+    uint32_t reserved_bc4;
+    uint32_t reserved_bc8;
+    uint32_t reserved_bcc;
+    uint32_t reserved_bd0;
+    uint32_t reserved_bd4;
+    uint32_t reserved_bd8;
+    uint32_t reserved_bdc;
+    uint32_t reserved_be0;
+    uint32_t reserved_be4;
+    uint32_t reserved_be8;
+    uint32_t reserved_bec;
+    uint32_t reserved_bf0;
+    uint32_t reserved_bf4;
+    uint32_t reserved_bf8;
+    uint32_t reserved_bfc;
+    uint32_t reserved_c00;
+    uint32_t reserved_c04;
+    uint32_t reserved_c08;
+    uint32_t reserved_c0c;
+    uint32_t reserved_c10;
+    uint32_t reserved_c14;
+    uint32_t reserved_c18;
+    uint32_t reserved_c1c;
+    uint32_t reserved_c20;
+    uint32_t reserved_c24;
+    uint32_t reserved_c28;
+    uint32_t reserved_c2c;
+    uint32_t reserved_c30;
+    uint32_t reserved_c34;
+    uint32_t reserved_c38;
+    uint32_t reserved_c3c;
+    uint32_t reserved_c40;
+    uint32_t reserved_c44;
+    uint32_t reserved_c48;
+    uint32_t reserved_c4c;
+    uint32_t reserved_c50;
+    uint32_t reserved_c54;
+    uint32_t reserved_c58;
+    uint32_t reserved_c5c;
+    uint32_t reserved_c60;
+    uint32_t reserved_c64;
+    uint32_t reserved_c68;
+    uint32_t reserved_c6c;
+    uint32_t reserved_c70;
+    uint32_t reserved_c74;
+    uint32_t reserved_c78;
+    uint32_t reserved_c7c;
+    uint32_t reserved_c80;
+    uint32_t reserved_c84;
+    uint32_t reserved_c88;
+    uint32_t reserved_c8c;
+    uint32_t reserved_c90;
+    uint32_t reserved_c94;
+    uint32_t reserved_c98;
+    uint32_t reserved_c9c;
+    uint32_t reserved_ca0;
+    uint32_t reserved_ca4;
+    uint32_t reserved_ca8;
+    uint32_t reserved_cac;
+    uint32_t reserved_cb0;
+    uint32_t reserved_cb4;
+    uint32_t reserved_cb8;
+    uint32_t reserved_cbc;
+    uint32_t reserved_cc0;
+    uint32_t reserved_cc4;
+    uint32_t reserved_cc8;
+    uint32_t reserved_ccc;
+    uint32_t reserved_cd0;
+    uint32_t reserved_cd4;
+    uint32_t reserved_cd8;
+    uint32_t reserved_cdc;
+    uint32_t reserved_ce0;
+    uint32_t reserved_ce4;
+    uint32_t reserved_ce8;
+    uint32_t reserved_cec;
+    uint32_t reserved_cf0;
+    uint32_t reserved_cf4;
+    uint32_t reserved_cf8;
+    uint32_t reserved_cfc;
+    uint32_t reserved_d00;
+    uint32_t reserved_d04;
+    uint32_t reserved_d08;
+    uint32_t reserved_d0c;
+    uint32_t reserved_d10;
+    uint32_t reserved_d14;
+    uint32_t reserved_d18;
+    uint32_t reserved_d1c;
+    uint32_t reserved_d20;
+    uint32_t reserved_d24;
+    uint32_t reserved_d28;
+    uint32_t reserved_d2c;
+    uint32_t reserved_d30;
+    uint32_t reserved_d34;
+    uint32_t reserved_d38;
+    uint32_t reserved_d3c;
+    uint32_t reserved_d40;
+    uint32_t reserved_d44;
+    uint32_t reserved_d48;
+    uint32_t reserved_d4c;
+    uint32_t reserved_d50;
+    uint32_t reserved_d54;
+    uint32_t reserved_d58;
+    uint32_t reserved_d5c;
+    uint32_t reserved_d60;
+    uint32_t reserved_d64;
+    uint32_t reserved_d68;
+    uint32_t reserved_d6c;
+    uint32_t reserved_d70;
+    uint32_t reserved_d74;
+    uint32_t reserved_d78;
+    uint32_t reserved_d7c;
+    uint32_t reserved_d80;
+    uint32_t reserved_d84;
+    uint32_t reserved_d88;
+    uint32_t reserved_d8c;
+    uint32_t reserved_d90;
+    uint32_t reserved_d94;
+    uint32_t reserved_d98;
+    uint32_t reserved_d9c;
+    uint32_t reserved_da0;
+    uint32_t reserved_da4;
+    uint32_t reserved_da8;
+    uint32_t reserved_dac;
+    uint32_t reserved_db0;
+    uint32_t reserved_db4;
+    uint32_t reserved_db8;
+    uint32_t reserved_dbc;
+    uint32_t reserved_dc0;
+    uint32_t reserved_dc4;
+    uint32_t reserved_dc8;
+    uint32_t reserved_dcc;
+    uint32_t reserved_dd0;
+    uint32_t reserved_dd4;
+    uint32_t reserved_dd8;
+    uint32_t reserved_ddc;
+    uint32_t reserved_de0;
+    uint32_t reserved_de4;
+    uint32_t reserved_de8;
+    uint32_t reserved_dec;
+    uint32_t reserved_df0;
+    uint32_t reserved_df4;
+    uint32_t reserved_df8;
+    uint32_t reserved_dfc;
+    uint32_t reserved_e00;
+    uint32_t reserved_e04;
+    uint32_t reserved_e08;
+    uint32_t reserved_e0c;
+    uint32_t reserved_e10;
+    uint32_t reserved_e14;
+    uint32_t reserved_e18;
+    uint32_t reserved_e1c;
+    uint32_t reserved_e20;
+    uint32_t reserved_e24;
+    uint32_t reserved_e28;
+    uint32_t reserved_e2c;
+    uint32_t reserved_e30;
+    uint32_t reserved_e34;
+    uint32_t reserved_e38;
+    uint32_t reserved_e3c;
+    uint32_t reserved_e40;
+    uint32_t reserved_e44;
+    uint32_t reserved_e48;
+    uint32_t reserved_e4c;
+    uint32_t reserved_e50;
+    uint32_t reserved_e54;
+    uint32_t reserved_e58;
+    uint32_t reserved_e5c;
+    uint32_t reserved_e60;
+    uint32_t reserved_e64;
+    uint32_t reserved_e68;
+    uint32_t reserved_e6c;
+    uint32_t reserved_e70;
+    uint32_t reserved_e74;
+    uint32_t reserved_e78;
+    uint32_t reserved_e7c;
+    uint32_t reserved_e80;
+    uint32_t reserved_e84;
+    uint32_t reserved_e88;
+    uint32_t reserved_e8c;
+    uint32_t reserved_e90;
+    uint32_t reserved_e94;
+    uint32_t reserved_e98;
+    uint32_t reserved_e9c;
+    uint32_t reserved_ea0;
+    uint32_t reserved_ea4;
+    uint32_t reserved_ea8;
+    uint32_t reserved_eac;
+    uint32_t reserved_eb0;
+    uint32_t reserved_eb4;
+    uint32_t reserved_eb8;
+    uint32_t reserved_ebc;
+    uint32_t reserved_ec0;
+    uint32_t reserved_ec4;
+    uint32_t reserved_ec8;
+    uint32_t reserved_ecc;
+    uint32_t reserved_ed0;
+    uint32_t reserved_ed4;
+    uint32_t reserved_ed8;
+    uint32_t reserved_edc;
+    uint32_t reserved_ee0;
+    uint32_t reserved_ee4;
+    uint32_t reserved_ee8;
+    uint32_t reserved_eec;
+    uint32_t reserved_ef0;
+    uint32_t reserved_ef4;
+    uint32_t reserved_ef8;
+    uint32_t reserved_efc;
+    uint32_t reserved_f00;
+    uint32_t reserved_f04;
+    uint32_t reserved_f08;
+    uint32_t reserved_f0c;
+    uint32_t reserved_f10;
+    uint32_t reserved_f14;
+    uint32_t reserved_f18;
+    uint32_t reserved_f1c;
+    uint32_t reserved_f20;
+    uint32_t reserved_f24;
+    uint32_t reserved_f28;
+    uint32_t reserved_f2c;
+    uint32_t reserved_f30;
+    uint32_t reserved_f34;
+    uint32_t reserved_f38;
+    uint32_t reserved_f3c;
+    uint32_t reserved_f40;
+    uint32_t reserved_f44;
+    uint32_t reserved_f48;
+    uint32_t reserved_f4c;
+    uint32_t reserved_f50;
+    uint32_t reserved_f54;
+    uint32_t reserved_f58;
+    uint32_t reserved_f5c;
+    uint32_t reserved_f60;
+    uint32_t reserved_f64;
+    uint32_t reserved_f68;
+    uint32_t reserved_f6c;
+    uint32_t reserved_f70;
+    uint32_t reserved_f74;
+    uint32_t reserved_f78;
+    uint32_t reserved_f7c;
+    uint32_t reserved_f80;
+    uint32_t reserved_f84;
+    uint32_t reserved_f88;
+    uint32_t reserved_f8c;
+    uint32_t reserved_f90;
+    uint32_t reserved_f94;
+    uint32_t reserved_f98;
+    uint32_t reserved_f9c;
+    uint32_t reserved_fa0;
+    uint32_t reserved_fa4;
+    uint32_t reserved_fa8;
+    uint32_t reserved_fac;
+    uint32_t reserved_fb0;
+    uint32_t reserved_fb4;
+    uint32_t reserved_fb8;
+    uint32_t reserved_fbc;
+    uint32_t reserved_fc0;
+    uint32_t reserved_fc4;
+    uint32_t reserved_fc8;
+    uint32_t reserved_fcc;
+    uint32_t reserved_fd0;
+    uint32_t reserved_fd4;
+    uint32_t reserved_fd8;
+    uint32_t reserved_fdc;
+    uint32_t reserved_fe0;
+    uint32_t reserved_fe4;
+    uint32_t reserved_fe8;
+    uint32_t reserved_fec;
+    uint32_t reserved_ff0;
+    uint32_t reserved_ff4;
+    uint32_t reserved_ff8;
+    union {
+        struct {
+            uint32_t sensitive_reg_date            :    28;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } reg_date;
+} sensitive_dev_t;
+extern sensitive_dev_t SENSITIVE;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SENSITIVE_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sigmadelta_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sigmadelta_caps.h
new file mode 100644
index 00000000000..0a3d99c2b13
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/sigmadelta_caps.h
@@ -0,0 +1,37 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ESP32-S3 have 1 SIGMADELTA peripheral.
+#define SIGMADELTA_PORT_0             (0) /*!< SIGMADELTA port 0 */
+#define SIGMADELTA_PORT_MAX           (1) /*!< SIGMADELTA port max */
+#define SOC_SIGMADELTA_NUM            (SIGMADELTA_PORT_MAX)
+
+#define SIGMADELTA_CHANNEL_0   (0)    /*!< Sigma-delta channel 0 */
+#define SIGMADELTA_CHANNEL_1   (1)    /*!< Sigma-delta channel 1 */
+#define SIGMADELTA_CHANNEL_2   (2)    /*!< Sigma-delta channel 2 */
+#define SIGMADELTA_CHANNEL_3   (3)    /*!< Sigma-delta channel 3 */
+#define SIGMADELTA_CHANNEL_4   (4)    /*!< Sigma-delta channel 4 */
+#define SIGMADELTA_CHANNEL_5   (5)    /*!< Sigma-delta channel 5 */
+#define SIGMADELTA_CHANNEL_6   (6)    /*!< Sigma-delta channel 6 */
+#define SIGMADELTA_CHANNEL_7   (7)    /*!< Sigma-delta channel 7 */
+#define SIGMADELTA_CHANNEL_MAX (8)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc.h
new file mode 100644
index 00000000000..001f5fe853b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc.h
@@ -0,0 +1,363 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifndef __ASSEMBLER__
+#include <stdint.h>
+#include "esp_assert.h"
+#include "esp_bit_defs.h"
+#endif
+
+#define PRO_CPU_NUM (0)
+#define APP_CPU_NUM (1)
+
+#define PRO_CPUID   (0xcdcd)
+#define APP_CPUID   (0xabab)
+
+#define DR_REG_UART_BASE                        0x60000000
+#define DR_REG_SPI1_BASE                        0x60002000
+#define DR_REG_SPI0_BASE                        0x60003000
+#define DR_REG_GPIO_BASE                        0x60004000
+#define DR_REG_GPIO_SD_BASE                     0x60004f00
+
+#define DR_REG_FE2_BASE                         0x60005000
+#define DR_REG_FE_BASE                          0x60006000
+
+#define DR_REG_EFUSE_BASE                       0x60007000
+#define DR_REG_RTCCNTL_BASE                     0x60008000
+#define DR_REG_RTCIO_BASE                       0x60008400
+#define DR_REG_SENS_BASE                        0x60008800
+#define DR_REG_RTC_I2C_BASE                     0x60008C00
+#define DR_REG_IO_MUX_BASE                      0x60009000
+
+#define DR_REG_HINF_BASE                        0x6000B000
+#define DR_REG_UHCI1_BASE                       0x6000C000
+
+#define DR_REG_I2S_BASE                         0x6000F000
+#define DR_REG_UART1_BASE                       0x60010000
+
+#define DR_REG_BT_BASE                          0x60011000
+
+#define DR_REG_I2C_EXT_BASE                     0x60013000
+#define DR_REG_UHCI0_BASE                       0x60014000
+
+#define DR_REG_SLCHOST_BASE                     0x60015000
+
+#define DR_REG_RMT_BASE                         0x60016000
+#define DR_REG_PCNT_BASE                        0x60017000
+
+#define DR_REG_SLC_BASE                         0x60018000
+
+#define DR_REG_LEDC_BASE                        0x60019000
+
+#define DR_REG_NRX_BASE                         0x6001CC00
+#define DR_REG_BB_BASE                          0x6001D000
+
+#define DR_REG_PWM0_BASE                        0x6001E000
+#define DR_REG_TIMERGROUP0_BASE                 0x6001F000
+#define DR_REG_TIMERGROUP1_BASE                 0x60020000
+#define DR_REG_RTC_SLOWMEM_BASE                 0x60021000
+#define DR_REG_SYSTIMER_BASE                    0x60023000
+#define DR_REG_SPI2_BASE                        0x60024000
+#define DR_REG_SPI3_BASE                        0x60025000
+#define DR_REG_SYSCON_BASE                      0x60026000
+#define DR_REG_APB_CTRL_BASE                    0x60026000 /* Old name for SYSCON, to be removed */
+#define DR_REG_I2C1_EXT_BASE                    0x60027000
+#define DR_REG_SDMMC_BASE                       0x60028000
+
+#define DR_REG_PERI_BACKUP_BASE                 0x6002A000
+
+#define DR_REG_TWAI_BASE                        0x6002B000
+#define DR_REG_PWM1_BASE                        0x6002C000
+#define DR_REG_I2S1_BASE                        0x6002D000
+#define DR_REG_UART2_BASE                       0x6002E000
+
+#define DR_REG_USB_DEVICE_BASE                  0x60038000
+#define DR_REG_USB_WRAP_BASE                    0x60039000
+#define DR_REG_AES_BASE                         0x6003A000
+#define DR_REG_SHA_BASE                         0x6003B000
+#define DR_REG_RSA_BASE                         0x6003C000
+#define DR_REG_HMAC_BASE                        0x6003E000
+#define DR_REG_DIGITAL_SIGNATURE_BASE           0x6003D000
+#define DR_REG_GDMA_BASE                        0x6003F000
+#define DR_REG_APB_SARADC_BASE                  0x60040000
+#define DR_REG_LCD_CAM_BASE                     0x60041000
+
+#define DR_REG_SYSTEM_BASE                      0x600C0000
+#define DR_REG_SENSITIVE_BASE                   0x600C1000
+#define DR_REG_INTERRUPT_BASE                   0x600C2000
+
+/* Cache configuration */
+#define DR_REG_EXTMEM_BASE                      0x600C4000
+#define DR_REG_MMU_TABLE                        0x600C5000
+#define DR_REG_ITAG_TABLE                       0x600C6000
+#define DR_REG_DTAG_TABLE                       0x600C8000
+
+#define DR_REG_EXT_MEM_ENC                      0x600CC000
+
+#define DR_REG_ASSIST_DEBUG_BASE                0x600CE000
+#define DR_REG_WORLD_CNTL_BASE                  0x600D0000
+#define DR_REG_DPORT_END                        0x600D3FFC
+
+
+#define REG_UHCI_BASE(i)         (DR_REG_UHCI0_BASE - (i) * 0x8000)
+#define REG_UART_BASE( i )  (DR_REG_UART_BASE + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
+#define REG_UART_AHB_BASE(i)  (0x60000000 + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
+#define UART_FIFO_AHB_REG(i)  (REG_UART_AHB_BASE(i) + 0x0)
+#define REG_I2S_BASE( i ) (DR_REG_I2S_BASE + (i) * 0x1E000)
+#define REG_TIMG_BASE(i)              (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
+#define REG_SPI_MEM_BASE(i)     (DR_REG_SPI0_BASE - (i) * 0x1000)
+#define REG_I2C_BASE(i)    (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
+
+//Registers Operation {{
+#define ETS_UNCACHED_ADDR(addr) (addr)
+#define ETS_CACHED_ADDR(addr) (addr)
+
+#ifndef __ASSEMBLER__
+
+//write value to register
+#define REG_WRITE(_r, _v) ({                                                                                           \
+            (*(volatile uint32_t *)(_r)) = (_v);                                                                       \
+        })
+
+//read value from register
+#define REG_READ(_r) ({                                                                                                \
+            (*(volatile uint32_t *)(_r));                                                                              \
+        })
+
+//get bit or get bits from register
+#define REG_GET_BIT(_r, _b)  ({                                                                                        \
+            (*(volatile uint32_t*)(_r) & (_b));                                                                        \
+        })
+
+//set bit or set bits to register
+#define REG_SET_BIT(_r, _b)  ({                                                                                        \
+            (*(volatile uint32_t*)(_r) |= (_b));                                                                       \
+        })
+
+//clear bit or clear bits of register
+#define REG_CLR_BIT(_r, _b)  ({                                                                                        \
+            (*(volatile uint32_t*)(_r) &= ~(_b));                                                                      \
+        })
+
+//set bits of register controlled by mask
+#define REG_SET_BITS(_r, _b, _m) ({                                                                                    \
+            (*(volatile uint32_t*)(_r) = (*(volatile uint32_t*)(_r) & ~(_m)) | ((_b) & (_m)));                         \
+        })
+
+//get field from register, uses field _S & _V to determine mask
+#define REG_GET_FIELD(_r, _f) ({                                                                                       \
+            ((REG_READ(_r) >> (_f##_S)) & (_f##_V));                                                                   \
+        })
+
+//set field of a register from variable, uses field _S & _V to determine mask
+#define REG_SET_FIELD(_r, _f, _v) ({                                                                                   \
+            (REG_WRITE((_r),((REG_READ(_r) & ~((_f##_V) << (_f##_S)))|(((_v) & (_f##_V))<<(_f##_S)))));                \
+        })
+
+//get field value from a variable, used when _f is not left shifted by _f##_S
+#define VALUE_GET_FIELD(_r, _f) (((_r) >> (_f##_S)) & (_f))
+
+//get field value from a variable, used when _f is left shifted by _f##_S
+#define VALUE_GET_FIELD2(_r, _f) (((_r) & (_f))>> (_f##_S))
+
+//set field value to a variable, used when _f is not left shifted by _f##_S
+#define VALUE_SET_FIELD(_r, _f, _v) ((_r)=(((_r) & ~((_f) << (_f##_S)))|((_v)<<(_f##_S))))
+
+//set field value to a variable, used when _f is left shifted by _f##_S
+#define VALUE_SET_FIELD2(_r, _f, _v) ((_r)=(((_r) & ~(_f))|((_v)<<(_f##_S))))
+
+//generate a value from a field value, used when _f is not left shifted by _f##_S
+#define FIELD_TO_VALUE(_f, _v) (((_v)&(_f))<<_f##_S)
+
+//generate a value from a field value, used when _f is left shifted by _f##_S
+#define FIELD_TO_VALUE2(_f, _v) (((_v)<<_f##_S) & (_f))
+
+//read value from register
+#define READ_PERI_REG(addr) ({                                                                                         \
+            (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr)));                                                         \
+        })
+
+//write value to register
+#define WRITE_PERI_REG(addr, val) ({                                                                                   \
+            (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val);                                       \
+        })
+
+//clear bits of register controlled by mask
+#define CLEAR_PERI_REG_MASK(reg, mask) ({                                                                              \
+            WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask))));                                                     \
+        })
+
+//set bits of register controlled by mask
+#define SET_PERI_REG_MASK(reg, mask) ({                                                                                \
+            WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask)));                                                        \
+        })
+
+//get bits of register controlled by mask
+#define GET_PERI_REG_MASK(reg, mask) ({                                                                                \
+            (READ_PERI_REG(reg) & (mask));                                                                             \
+        })
+
+//get bits of register controlled by highest bit and lowest bit
+#define GET_PERI_REG_BITS(reg, hipos,lowpos) ({                                                                        \
+            ((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1));                                            \
+        })
+
+//set bits of register controlled by mask and shift
+#define SET_PERI_REG_BITS(reg,bit_map,value,shift) ({                                                                  \
+            (WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & bit_map)<<(shift)) ));      \
+        })
+
+//get field of register
+#define GET_PERI_REG_BITS2(reg, mask,shift) ({                                                                         \
+            ((READ_PERI_REG(reg)>>(shift))&(mask));                                                                    \
+        })
+
+#endif /* !__ASSEMBLER__ */
+//}}
+
+//Periheral Clock {{
+#define  APB_CLK_FREQ_ROM                            (40*1000000)
+#define  CPU_CLK_FREQ_ROM                            APB_CLK_FREQ_ROM
+#define  UART_CLK_FREQ_ROM                           (40*1000000)
+#define  EFUSE_CLK_FREQ_ROM                          (20*1000000)
+#define  CPU_CLK_FREQ                                APB_CLK_FREQ
+#define  APB_CLK_FREQ                                (80*1000000)
+#define  REF_CLK_FREQ                                (1000000)
+#define  RTC_CLK_FREQ                                (20*1000000)
+#define  XTAL_CLK_FREQ                               (40*1000000)
+#define  UART_CLK_FREQ                               APB_CLK_FREQ
+#define  WDT_CLK_FREQ                                APB_CLK_FREQ
+#define  TIMER_CLK_FREQ                              (80000000>>4) //80MHz divided by 16
+#define  SPI_CLK_DIV                                 4
+#define  TICKS_PER_US_ROM                            40              // CPU is 80MHz
+#define  GPIO_MATRIX_DELAY_NS                        0
+//}}
+
+/* Overall memory map */
+#define SOC_DROM_LOW    0x3C000000
+#define SOC_DROM_HIGH   0x3D000000
+#define SOC_IROM_LOW    0x42000000
+#define SOC_IROM_HIGH   0x44000000
+#define SOC_IRAM_LOW    0x40370000
+#define SOC_IRAM_HIGH   0x403E0000
+#define SOC_DRAM_LOW    0x3FC88000
+#define SOC_DRAM_HIGH   0x3FD00000
+
+#define SOC_RTC_IRAM_LOW  0x600FE000
+#define SOC_RTC_IRAM_HIGH 0x60100000
+#define SOC_RTC_DRAM_LOW  0x600FE000
+#define SOC_RTC_DRAM_HIGH 0x60100000
+
+#define SOC_RTC_DATA_LOW  0x50000000
+#define SOC_RTC_DATA_HIGH 0x50002000
+
+#define SOC_EXTRAM_DATA_LOW 0x3D000000
+#define SOC_EXTRAM_DATA_HIGH 0x3E000000
+#define SOC_IROM_MASK_LOW  0x40000000
+#define SOC_IROM_MASK_HIGH 0x4001A100
+
+#define SOC_EXTRAM_DATA_SIZE (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW)
+#define SOC_MAX_CONTIGUOUS_RAM_SIZE (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) ///< Largest span of contiguous memory (DRAM or IRAM) in the address space
+
+
+//First and last words of the D/IRAM region, for both the DRAM address as well as the IRAM alias.
+#define SOC_DIRAM_IRAM_LOW    0x40378000
+#define SOC_DIRAM_IRAM_HIGH   0x403E0000
+#define SOC_DIRAM_DRAM_LOW    0x3FC88000
+#define SOC_DIRAM_DRAM_HIGH   0x3FCF0000
+
+// Region of memory accessible via DMA in internal memory. See esp_ptr_dma_capable().
+#define SOC_DMA_LOW  0x3FC88000
+#define SOC_DMA_HIGH 0x3FD00000
+
+// Region of memory accessible via DMA in external memory. See esp_ptr_dma_ext_capable().
+#define SOC_DMA_EXT_LOW     SOC_EXTRAM_DATA_LOW
+#define SOC_DMA_EXT_HIGH    SOC_EXTRAM_DATA_HIGH
+
+
+// Region of memory that is byte-accessible. See esp_ptr_byte_accessible().
+#define SOC_BYTE_ACCESSIBLE_LOW     0x3FC88000
+#define SOC_BYTE_ACCESSIBLE_HIGH    0x3FD00000
+
+//Region of memory that is internal, as in on the same silicon die as the ESP32 CPUs
+//(excluding RTC data region, that's checked separately.) See esp_ptr_internal().
+#define SOC_MEM_INTERNAL_LOW        0x3FC88000
+#define SOC_MEM_INTERNAL_HIGH       0x403E2000
+
+// Start (highest address) of ROM boot stack, only relevant during early boot
+#define SOC_ROM_STACK_START         0x3fcebf10
+
+//interrupt cpu using table, Please see the core-isa.h
+/*************************************************************************************************************
+ *      Intr num                Level           Type                    PRO CPU usage           APP CPU uasge
+ *      0                       1               extern level            WMAC                    Reserved
+ *      1                       1               extern level            BT/BLE Host HCI DMA     BT/BLE Host HCI DMA
+ *      2                       1               extern level
+ *      3                       1               extern level
+ *      4                       1               extern level            WBB
+ *      5                       1               extern level            BT/BLE Controller       BT/BLE Controller
+ *      6                       1               timer                   FreeRTOS Tick(L1)       FreeRTOS Tick(L1)
+ *      7                       1               software                BT/BLE VHCI             BT/BLE VHCI
+ *      8                       1               extern level            BT/BLE BB(RX/TX)        BT/BLE BB(RX/TX)
+ *      9                       1               extern level
+ *      10                      1               extern edge
+ *      11                      3               profiling
+ *      12                      1               extern level
+ *      13                      1               extern level
+ *      14                      7               nmi                     Reserved                Reserved
+ *      15                      3               timer                   FreeRTOS Tick(L3)       FreeRTOS Tick(L3)
+ *      16                      5               timer
+ *      17                      1               extern level
+ *      18                      1               extern level
+ *      19                      2               extern level
+ *      20                      2               extern level
+ *      21                      2               extern level
+ *      22                      3               extern edge
+ *      23                      3               extern level
+ *      24                      4               extern level            TG1_WDT
+ *      25                      4               extern level            CACHEERR
+ *      26                      5               extern level
+ *      27                      3               extern level            Reserved                Reserved
+ *      28                      4               extern edge             IPC_ISR                 IPC_ISR
+ *      29                      3               software                Reserved                Reserved
+ *      30                      4               extern edge             Reserved                Reserved
+ *      31                      5               extern level
+ *************************************************************************************************************
+ */
+
+//CPU0 Interrupt number reserved, not touch this.
+#define ETS_WMAC_INUM                           0
+#define ETS_BT_HOST_INUM                        1
+#define ETS_WBB_INUM                            4
+#define ETS_TG0_T1_INUM                         10 /**< use edge interrupt*/
+#define ETS_FRC1_INUM                           22
+#define ETS_T1_WDT_INUM                         24
+#define ETS_CACHEERR_INUM                       25
+#define ETS_IPC_ISR_INUM                        28
+
+//CPU0 Interrupt number used in ROM, should be cancelled in SDK
+#define ETS_SLC_INUM                            1
+#define ETS_UART0_INUM                          5
+#define ETS_UART1_INUM                          5
+#define ETS_SPI2_INUM                           1
+//CPU0 Interrupt number used in ROM code only when module init function called, should pay attention here.
+#define ETS_FRC_TIMER2_INUM 10 /* use edge*/
+#define ETS_GPIO_INUM       4
+
+//Other interrupt number should be managed by the user
+
+//Invalid interrupt for number interrupt matrix
+#define ETS_INVALID_INUM                        6
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc_caps.h
new file mode 100644
index 00000000000..b93413c502d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc_caps.h
@@ -0,0 +1,335 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// The long term plan is to have a single soc_caps.h for all peripherals.
+// During the refactoring and multichip support development process, we
+// separate these information into periph_caps.h for each peripheral and
+// include them here to avoid developing conflicts.
+
+#pragma once
+
+/*-------------------------- COMMON CAPS ---------------------------------------*/
+#define SOC_ADC_SUPPORTED               1
+#define SOC_PCNT_SUPPORTED              1
+#define SOC_TWAI_SUPPORTED              1
+#define SOC_GDMA_SUPPORTED              1
+#define SOC_LCDCAM_SUPPORTED            1
+#define SOC_MCPWM_SUPPORTED             1
+#define SOC_DEDICATED_GPIO_SUPPORTED    1
+#define SOC_CPU_CORES_NUM               2
+#define SOC_CACHE_SUPPORT_WRAP          1
+#define SOC_ULP_SUPPORTED               1
+#define SOC_BT_SUPPORTED                1
+#define SOC_USB_OTG_SUPPORTED           1
+#define SOC_USB_SERIAL_JTAG_SUPPORTED   1
+#define SOC_RTC_SLOW_MEM_SUPPORTED      1
+#define SOC_CCOMP_TIMER_SUPPORTED       1
+#define SOC_DIG_SIGN_SUPPORTED          1
+#define SOC_HMAC_SUPPORTED              1
+#define SOC_ASYNC_MEMCPY_SUPPORTED      1
+#define SOC_SUPPORTS_SECURE_DL_MODE     1
+#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
+#define SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS 1
+#define SOC_SDMMC_HOST_SUPPORTED        1
+#define SOC_FLASH_ENCRYPTION_XTS_AES      1
+#define SOC_FLASH_ENCRYPTION_XTS_AES_256 1
+#define SOC_PSRAM_DMA_CAPABLE           1
+#define SOC_XT_WDT_SUPPORTED            1
+
+/*-------------------------- SOC CAPS ----------------------------------------*/
+#define SOC_APPCPU_HAS_CLOCK_GATING_BUG (1)
+
+/*-------------------------- ADC CAPS ----------------------------------------*/
+/*!< SAR ADC Module*/
+#define SOC_ADC_RTC_CTRL_SUPPORTED              1
+#define SOC_ADC_DIG_CTRL_SUPPORTED              1
+#define SOC_ADC_ARBITER_SUPPORTED               1
+#define SOC_ADC_FILTER_SUPPORTED                1
+#define SOC_ADC_MONITOR_SUPPORTED               1
+#define SOC_ADC_PERIPH_NUM                      (2)
+#define SOC_ADC_CHANNEL_NUM(PERIPH_NUM)         (10)
+#define SOC_ADC_MAX_CHANNEL_NUM                 (10)
+
+/*!< Digital */
+#define SOC_ADC_DIGI_CONTROLLER_NUM             (2)
+#define SOC_ADC_PATT_LEN_MAX                    (24)    //Two pattern table, each contains 12 items. Each item takes 1 byte
+#define SOC_ADC_DIGI_MAX_BITWIDTH               (13)
+/*!< F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interva <= 4095 */
+#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH          83333
+#define SOC_ADC_SAMPLE_FREQ_THRES_LOW           611
+
+/*!< RTC */
+#define SOC_ADC_MAX_BITWIDTH                    (12)
+
+/*!< Calibration */
+#define SOC_ADC_CALIBRATION_V1_SUPPORTED        (1) /*!< support HW offset calibration version 1*/
+
+
+/*-------------------------- APB BACKUP DMA CAPS -------------------------------*/
+#define SOC_APB_BACKUP_DMA              (1)
+
+/*-------------------------- BROWNOUT CAPS -----------------------------------*/
+#include "brownout_caps.h"
+
+/*-------------------------- CPU CAPS ----------------------------------------*/
+#include "cpu_caps.h"
+
+/*-------------------------- DIGITAL SIGNATURE CAPS ----------------------------------------*/
+/** The maximum length of a Digital Signature in bits. */
+#define SOC_DS_SIGNATURE_MAX_BIT_LEN (4096)
+
+/** Initialization vector (IV) length for the RSA key parameter message digest (MD) in bytes. */
+#define SOC_DS_KEY_PARAM_MD_IV_LENGTH (16)
+
+/** Maximum wait time for DS parameter decryption key. If overdue, then key error.
+    See TRM DS chapter for more details */
+#define SOC_DS_KEY_CHECK_MAX_WAIT_US (1100)
+
+/*-------------------------- GDMA CAPS ---------------------------------------*/
+#define SOC_GDMA_GROUPS            (1)  // Number of GDMA groups
+#define SOC_GDMA_PAIRS_PER_GROUP   (5)  // Number of GDMA pairs in each group
+#define SOC_GDMA_SUPPORT_PSRAM     (1)  // GDMA can access external PSRAM
+#define SOC_GDMA_PSRAM_MIN_ALIGN   (16) // Minimal alignment for PSRAM transaction
+
+/*-------------------------- GPIO CAPS ---------------------------------------*/
+#include "gpio_caps.h"
+
+/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
+#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
+#define SOC_DEDIC_GPIO_IN_CHANNELS_NUM  (8) /*!< 8 inward channels on each CPU core */
+#define SOC_DEDIC_GPIO_OUT_AUTO_ENABLE  (1) /*!< Dedicated GPIO output attribution is enabled automatically */
+
+/*-------------------------- I2C CAPS ----------------------------------------*/
+#include "i2c_caps.h"
+
+/*-------------------------- I2S CAPS ----------------------------------------*/
+#define SOC_I2S_NUM                 (2)
+#define SOC_I2S_SUPPORTS_PCM        (1)
+#define SOC_I2S_SUPPORTS_PDM_TX     (1)
+#define SOC_I2S_SUPPORTS_PDM_RX     (1)
+#define SOC_I2S_SUPPORTS_PDM_CODEC  (1)
+#define SOC_I2S_SUPPORTS_TDM        (1)
+
+/*-------------------------- LEDC CAPS ---------------------------------------*/
+#include "ledc_caps.h"
+
+/*-------------------------- MCPWM CAPS --------------------------------------*/
+#define SOC_MCPWM_GROUPS                     (2)    ///< 2 MCPWM groups on the chip (i.e., the number of independent MCPWM peripherals)
+#define SOC_MCPWM_TIMERS_PER_GROUP           (3)    ///< The number of timers that each group has
+#define SOC_MCPWM_OPERATORS_PER_GROUP        (3)    ///< The number of operators that each group has
+#define SOC_MCPWM_COMPARATORS_PER_OPERATOR   (2)    ///< The number of comparators that each operator has
+#define SOC_MCPWM_GENERATORS_PER_OPERATOR    (2)    ///< The number of generators that each operator has
+#define SOC_MCPWM_TRIGGERS_PER_OPERATOR      (2)    ///< The number of triggers that each operator has
+#define SOC_MCPWM_GPIO_FAULTS_PER_GROUP      (3)    ///< The number of fault signal detectors that each group has
+#define SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP   (1)    ///< The number of capture timers that each group has
+#define SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER (3)    ///< The number of capture channels that each capture timer has
+#define SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP    (3)    ///< The number of GPIO synchros that each group has
+#define SOC_MCPWM_SWSYNC_CAN_PROPAGATE       (1)    ///< Software sync event can be routed to its output
+#define SOC_MCPWM_BASE_CLK_HZ       (160000000ULL)  ///< Base Clock frequency of 160MHz
+
+/*-------------------------- MPU CAPS ----------------------------------------*/
+#include "mpu_caps.h"
+
+/*-------------------------- PCNT CAPS ---------------------------------------*/
+#define SOC_PCNT_GROUPS               (1)
+#define SOC_PCNT_UNITS_PER_GROUP      (4)
+#define SOC_PCNT_CHANNELS_PER_UNIT    (2)
+#define SOC_PCNT_THRES_POINT_PER_UNIT (2)
+
+/*-------------------------- RMT CAPS ----------------------------------------*/
+#define SOC_RMT_GROUPS                    (1)  /*!< One RMT group */
+#define SOC_RMT_TX_CANDIDATES_PER_GROUP   (4)  /*!< Number of channels that capable of Transmit in each group */
+#define SOC_RMT_RX_CANDIDATES_PER_GROUP   (4)  /*!< Number of channels that capable of Receive in each group */
+#define SOC_RMT_CHANNELS_PER_GROUP        (8)  /*!< Total 8 channels */
+#define SOC_RMT_MEM_WORDS_PER_CHANNEL     (48) /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
+#define SOC_RMT_SUPPORT_RX_PINGPONG       (1)  /*!< Support Ping-Pong mode on RX path */
+#define SOC_RMT_SUPPORT_RX_DEMODULATION   (1)  /*!< Support signal demodulation on RX path (i.e. remove carrier) */
+#define SOC_RMT_SUPPORT_TX_LOOP_COUNT     (1)  /*!< Support transmit specified number of cycles in loop mode */
+#define SOC_RMT_SUPPORT_TX_LOOP_AUTOSTOP  (1)  /*!< Hardware support of auto-stop in loop mode */
+#define SOC_RMT_SUPPORT_TX_SYNCHRO        (1)  /*!< Support coordinate a group of TX channels to start simultaneously */
+#define SOC_RMT_SUPPORT_XTAL              (1)  /*!< Support set XTAL clock as the RMT clock source */
+
+
+/*-------------------------- LCD CAPS ----------------------------------------*/
+/* Notes: On esp32-s3, I80 bus and RGB timing generator can't work at the same time */
+#define SOC_LCD_I80_SUPPORTED           (1)  /*!< Intel 8080 LCD is supported */
+#define SOC_LCD_RGB_SUPPORTED           (1)  /*!< RGB LCD is supported */
+#define SOC_LCD_I80_BUSES               (1)  /*!< Has one LCD Intel 8080 bus */
+#define SOC_LCD_RGB_PANELS              (1)  /*!< Support one RGB LCD panel */
+#define SOC_LCD_I80_BUS_WIDTH           (16) /*!< Intel 8080 bus width */
+#define SOC_LCD_RGB_DATA_WIDTH          (16) /*!< Number of LCD data lines */
+
+/*-------------------------- RTC CAPS --------------------------------------*/
+#define SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH       (128)
+#define SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM        (549)
+#define SOC_RTC_CNTL_CPU_PD_DMA_ADDR_ALIGN      (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3)
+#define SOC_RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE      (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3)
+
+#define SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE  (SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM * (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3))
+
+/* I/D Cache tag memory retention hardware parameters */
+#define SOC_RTC_CNTL_TAGMEM_PD_DMA_BUS_WIDTH    (128)
+#define SOC_RTC_CNTL_TAGMEM_PD_DMA_ADDR_ALIGN   (SOC_RTC_CNTL_TAGMEM_PD_DMA_BUS_WIDTH >> 3)
+
+/*-------------------------- RTCIO CAPS --------------------------------------*/
+#include "rtc_io_caps.h"
+
+/*-------------------------- SIGMA DELTA CAPS --------------------------------*/
+#define SOC_SIGMADELTA_NUM         (1) // 1 sigma-delta peripheral
+#define SOC_SIGMADELTA_CHANNEL_NUM (8) // 8 channels
+
+/*-------------------------- SPI CAPS ----------------------------------------*/
+#define SOC_SPI_PERIPH_NUM                  3
+#define SOC_SPI_DMA_CHAN_NUM                3
+#define SOC_SPI_PERIPH_CS_NUM(i)            3
+#define SOC_SPI_MAXIMUM_BUFFER_SIZE         64
+#define SOC_SPI_SUPPORT_DDRCLK              1
+#define SOC_SPI_SLAVE_SUPPORT_SEG_TRANS     1
+#define SOC_SPI_SUPPORT_CD_SIG              1
+#define SOC_SPI_SUPPORT_CONTINUOUS_TRANS    1
+#define SOC_SPI_SUPPORT_SLAVE_HD_VER2       1
+
+// Peripheral supports DIO, DOUT, QIO, or QOUT
+#define SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(host_id)  ({(void)host_id; 1;})
+
+// Peripheral supports output given level during its "dummy phase"
+#define SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUTPUT 1
+#define SOC_MEMSPI_IS_INDEPENDENT                   1
+#define SOC_SPI_MAX_PRE_DIVIDER                     16
+#define SOC_SPI_SUPPORT_OCT                         1
+
+/*-------------------------- SPIRAM CAPS ----------------------------------------*/
+#define SOC_SPIRAM_SUPPORTED            1
+
+/*-------------------------- SYS TIMER CAPS ----------------------------------*/
+#define SOC_TOUCH_VERSION_2                (1)  // Hardware version of touch sensor
+#define SOC_SYSTIMER_COUNTER_NUM           (2)  // Number of counter units
+#define SOC_SYSTIMER_ALARM_NUM             (3)  // Number of alarm units
+#define SOC_SYSTIMER_BIT_WIDTH_LO          (32) // Bit width of systimer low part
+#define SOC_SYSTIMER_BIT_WIDTH_HI          (20) // Bit width of systimer high part
+#define SOC_SYSTIMER_FIXED_TICKS_US        (16) // Number of ticks per microsecond is fixed
+#define SOC_SYSTIMER_INT_LEVEL             (1)  // Systimer peripheral uses level
+#define SOC_SYSTIMER_ALARM_MISS_COMPENSATE (1)  // Systimer peripheral can generate interrupt immediately if t(target) > t(current)
+
+/*-------------------------- TIMER GROUP CAPS --------------------------------*/
+#define SOC_TIMER_GROUPS                  (2)
+#define SOC_TIMER_GROUP_TIMERS_PER_GROUP  (2)
+#define SOC_TIMER_GROUP_COUNTER_BIT_WIDTH (54)
+#define SOC_TIMER_GROUP_SUPPORT_XTAL      (1)
+#define SOC_TIMER_GROUP_TOTAL_TIMERS (SOC_TIMER_GROUPS * SOC_TIMER_GROUP_TIMERS_PER_GROUP)
+
+/*-------------------------- TOUCH SENSOR CAPS -------------------------------*/
+#define SOC_TOUCH_SENSOR_NUM                (15) /*! 15 Touch channels */
+#define SOC_TOUCH_PROXIMITY_CHANNEL_NUM     (3)  /* Sopport touch proximity channel number. */
+#define SOC_TOUCH_PROXIMITY_MEAS_DONE_SUPPORTED (1) /*Sopport touch proximity channel measure done interrupt type. */
+
+#define SOC_TOUCH_PAD_THRESHOLD_MAX         (0x1FFFFF)  /*!<If set touch threshold max value, The touch sensor can't be in touched status */
+#define SOC_TOUCH_PAD_MEASURE_WAIT_MAX      (0xFF)  /*!<The timer frequency is 8Mhz, the max value is 0xff */
+
+/*-------------------------- TWAI CAPS ---------------------------------------*/
+#include "twai_caps.h"
+
+/*-------------------------- UART CAPS ---------------------------------------*/
+#include "uart_caps.h"
+
+#define SOC_UART_SUPPORT_RTC_CLK    (1)     /*!< Support RTC clock as the clock source */
+#define SOC_UART_SUPPORT_XTAL_CLK   (1)     /*!< Support XTAL clock as the clock source */
+#define SOC_UART_REQUIRE_CORE_RESET (1)
+
+/*-------------------------- USB CAPS ----------------------------------------*/
+#define SOC_USB_PERIPH_NUM 1
+
+
+/*--------------------------- SHA CAPS ---------------------------------------*/
+/* Max amount of bytes in a single DMA operation is 4095,
+   for SHA this means that the biggest safe amount of bytes is
+   31 blocks of 128 bytes = 3968
+*/
+#define SOC_SHA_DMA_MAX_BUFFER_SIZE     (3968)
+#define SOC_SHA_SUPPORT_DMA             (1)
+
+/* The SHA engine is able to resume hashing from a user supplied context */
+#define SOC_SHA_SUPPORT_RESUME          (1)
+
+/* Has a centralized DMA, which is shared with all peripherals */
+#define SOC_SHA_GDMA             (1)
+
+/* Supported HW algorithms */
+#define SOC_SHA_SUPPORT_SHA1            (1)
+#define SOC_SHA_SUPPORT_SHA224          (1)
+#define SOC_SHA_SUPPORT_SHA256          (1)
+#define SOC_SHA_SUPPORT_SHA384          (1)
+#define SOC_SHA_SUPPORT_SHA256          (1)
+#define SOC_SHA_SUPPORT_SHA512          (1)
+#define SOC_SHA_SUPPORT_SHA512_224      (1)
+#define SOC_SHA_SUPPORT_SHA512_256      (1)
+#define SOC_SHA_SUPPORT_SHA512_T        (1)
+
+
+/*--------------------------- RSA CAPS ---------------------------------------*/
+#define SOC_RSA_MAX_BIT_LEN    (4096)
+
+
+/*-------------------------- AES CAPS -----------------------------------------*/
+#define SOC_AES_SUPPORT_DMA     (1)
+
+/* Has a centralized DMA, which is shared with all peripherals */
+#define SOC_AES_GDMA            (1)
+
+#define SOC_AES_SUPPORT_AES_128 (1)
+#define SOC_AES_SUPPORT_AES_256 (1)
+
+
+/*-------------------------- Power Management CAPS ---------------------------*/
+#define SOC_PM_SUPPORT_EXT_WAKEUP       (1)
+
+#define SOC_PM_SUPPORT_WIFI_WAKEUP      (1)
+
+#define SOC_PM_SUPPORT_BT_WAKEUP        (1)
+
+#define SOC_PM_SUPPORT_CPU_PD           (1)
+
+#define SOC_PM_SUPPORT_TAGMEM_PD        (1)
+
+#define SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP    (1)     /*!<Supports waking up from touch pad trigger */
+
+#define SOC_PM_SUPPORT_DEEPSLEEP_VERIFY_STUB_ONLY   (1)
+
+
+/*-------------------------- Flash Encryption CAPS----------------------------*/
+#define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX   (64)
+
+
+/*-------------------------- WI-FI HARDWARE TSF CAPS -------------------------------*/
+#define SOC_WIFI_HW_TSF                 (1)
+
+/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
+#define SOC_PHY_DIG_REGS_MEM_SIZE       (21*4)
+#define SOC_MAC_BB_PD_MEM_SIZE          (192*4)
+
+/*--------------- WIFI LIGHT SLEEP CLOCK WIDTH CAPS --------------------------*/
+#define SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH  (12)
+
+/*-------------------------- SPI MEM CAPS ---------------------------------------*/
+#define SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE                (1)
+#define SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND                  (1)
+#define SOC_SPI_MEM_SUPPORT_AUTO_RESUME                   (1)
+#define SOC_SPI_MEM_SUPPORT_SW_SUSPEND                    (1)
+#define SOC_SPI_MEM_SUPPORT_OPI_MODE                      (1)
+#define SOC_SPI_MEM_SUPPORT_TIME_TUNING                   (1)
+
+/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
+#define SOC_COEX_HW_PTI                 (1)
+
+/*-------------------------- SDMMC CAPS -----------------------------------------*/
+
+/* Card detect, write protect, interrupt use GPIO Matrix on all chips.
+ * On ESP32-S3, clock/cmd/data pins use GPIO Matrix as well.
+ */
+#define SOC_SDMMC_USE_GPIO_MATRIX  1
+#define SOC_SDMMC_NUM_SLOTS        2
+/* Indicates that there is an option to use XTAL clock instead of PLL for SDMMC */
+#define SOC_SDMMC_SUPPORT_XTAL_CLOCK    1
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc_pins.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc_pins.h
new file mode 100644
index 00000000000..dfb6b00637f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc_pins.h
@@ -0,0 +1,20 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * Pin definition header file. The long term plan is to have a single soc_pins.h for all
+ * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
+ * peripheral and include them here to avoid developing conflicts in those header files.
+ */
+
+#pragma once
+
+#include "soc/usb_pins.h"
+#include "soc/gpio_pins.h"
+#include "soc/spi_pins.h"
+#include "soc/sdio_slave_pins.h"
+#include "soc/sdmmc_pins.h"
+#include "soc/touch_sensor_pins.h"
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc_ulp.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc_ulp.h
new file mode 100644
index 00000000000..b9359c94a42
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/soc_ulp.h
@@ -0,0 +1,45 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+// This file contains various convenience macros to be used in ULP programs.
+
+// Helper macros to calculate bit field width from mask, using the preprocessor.
+// Used later in READ_RTC_FIELD and WRITE_RTC_FIELD.
+#define IS_BIT_SET(m, i) (((m) >> (i)) & 1)
+#define MASK_TO_WIDTH_HELPER1(m, i)  IS_BIT_SET(m, i)
+#define MASK_TO_WIDTH_HELPER2(m, i)  (MASK_TO_WIDTH_HELPER1(m, i)  + MASK_TO_WIDTH_HELPER1(m, i + 1))
+#define MASK_TO_WIDTH_HELPER4(m, i)  (MASK_TO_WIDTH_HELPER2(m, i)  + MASK_TO_WIDTH_HELPER2(m, i + 2))
+#define MASK_TO_WIDTH_HELPER8(m, i)  (MASK_TO_WIDTH_HELPER4(m, i)  + MASK_TO_WIDTH_HELPER4(m, i + 4))
+#define MASK_TO_WIDTH_HELPER16(m, i) (MASK_TO_WIDTH_HELPER8(m, i)  + MASK_TO_WIDTH_HELPER8(m, i + 8))
+#define MASK_TO_WIDTH_HELPER32(m, i) (MASK_TO_WIDTH_HELPER16(m, i) + MASK_TO_WIDTH_HELPER16(m, i + 16))
+
+// Peripheral register access macros, build around REG_RD and REG_WR instructions.
+// Registers defined in rtc_cntl_reg.h, rtc_io_reg.h, sens_reg.h, and rtc_i2c_reg.h are usable with these macros.
+
+// Read from rtc_reg[low_bit + bit_width - 1 : low_bit] into R0, bit_width <= 16
+#define READ_RTC_REG(rtc_reg, low_bit, bit_width) \
+    REG_RD (((rtc_reg) - DR_REG_RTCCNTL_BASE) / 4), ((low_bit) + (bit_width) - 1), (low_bit)
+
+// Write immediate value into rtc_reg[low_bit + bit_width - 1 : low_bit], bit_width <= 8
+#define WRITE_RTC_REG(rtc_reg, low_bit, bit_width, value) \
+    REG_WR (((rtc_reg) - DR_REG_RTCCNTL_BASE) / 4), ((low_bit) + (bit_width) - 1), (low_bit), ((value) & 0xff)
+
+// Read from a field in rtc_reg into R0, up to 16 bits
+#define READ_RTC_FIELD(rtc_reg, field) \
+    READ_RTC_REG(rtc_reg, field ## _S, MASK_TO_WIDTH_HELPER16(field ## _V, 0))
+
+// Write immediate value into a field in rtc_reg, up to 8 bits
+#define WRITE_RTC_FIELD(rtc_reg, field, value) \
+    WRITE_RTC_REG(rtc_reg, field ## _S, MASK_TO_WIDTH_HELPER8(field ## _V, 0), ((value) & field ## _V))
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_mem_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_mem_reg.h
new file mode 100644
index 00000000000..aa4639ed8d8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_mem_reg.h
@@ -0,0 +1,2241 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_SPI_MEM_REG_H_
+#define _SOC_SPI_MEM_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SPI_MEM_CMD_REG(i)          (REG_SPI_MEM_BASE(i) + 0x0)
+/* SPI_MEM_FLASH_READ : R/W/SC ;bitpos:[31] ;default: 1'b0 ; */
+/*description: Read flash enable. Read flash operation will be triggered when the bit is set. T
+he bit will be cleared once the operation done. 1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_READ    (BIT(31))
+#define SPI_MEM_FLASH_READ_M  (BIT(31))
+#define SPI_MEM_FLASH_READ_V  0x1
+#define SPI_MEM_FLASH_READ_S  31
+/* SPI_MEM_FLASH_WREN : R/W/SC ;bitpos:[30] ;default: 1'b0 ; */
+/*description: Write flash enable.  Write enable command will be sent when the bit is set. The
+bit will be cleared once the operation done. 1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_WREN    (BIT(30))
+#define SPI_MEM_FLASH_WREN_M  (BIT(30))
+#define SPI_MEM_FLASH_WREN_V  0x1
+#define SPI_MEM_FLASH_WREN_S  30
+/* SPI_MEM_FLASH_WRDI : R/W/SC ;bitpos:[29] ;default: 1'b0 ; */
+/*description: Write flash disable. Write disable command will be sent when the bit is set. The
+ bit will be cleared once the operation done. 1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_WRDI    (BIT(29))
+#define SPI_MEM_FLASH_WRDI_M  (BIT(29))
+#define SPI_MEM_FLASH_WRDI_V  0x1
+#define SPI_MEM_FLASH_WRDI_S  29
+/* SPI_MEM_FLASH_RDID : R/W/SC ;bitpos:[28] ;default: 1'b0 ; */
+/*description: Read JEDEC ID . Read ID command will be sent when the bit is set. The bit will b
+e cleared once the operation done. 1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_RDID    (BIT(28))
+#define SPI_MEM_FLASH_RDID_M  (BIT(28))
+#define SPI_MEM_FLASH_RDID_V  0x1
+#define SPI_MEM_FLASH_RDID_S  28
+/* SPI_MEM_FLASH_RDSR : R/W/SC ;bitpos:[27] ;default: 1'b0 ; */
+/*description: Read status register-1.  Read status operation will be triggered when the bit is
+ set. The bit will be cleared once the operation done.1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_RDSR    (BIT(27))
+#define SPI_MEM_FLASH_RDSR_M  (BIT(27))
+#define SPI_MEM_FLASH_RDSR_V  0x1
+#define SPI_MEM_FLASH_RDSR_S  27
+/* SPI_MEM_FLASH_WRSR : R/W/SC ;bitpos:[26] ;default: 1'b0 ; */
+/*description: Write status register enable.   Write status operation  will be triggered when t
+he bit is set. The bit will be cleared once the operation done.1: enable 0: disa
+ble. .*/
+#define SPI_MEM_FLASH_WRSR    (BIT(26))
+#define SPI_MEM_FLASH_WRSR_M  (BIT(26))
+#define SPI_MEM_FLASH_WRSR_V  0x1
+#define SPI_MEM_FLASH_WRSR_S  26
+/* SPI_MEM_FLASH_PP : R/W/SC ;bitpos:[25] ;default: 1'b0 ; */
+/*description: Page program enable(1 byte ~64 bytes data to be programmed). Page program operat
+ion  will be triggered when the bit is set. The bit will be cleared once the ope
+ration done .1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_PP    (BIT(25))
+#define SPI_MEM_FLASH_PP_M  (BIT(25))
+#define SPI_MEM_FLASH_PP_V  0x1
+#define SPI_MEM_FLASH_PP_S  25
+/* SPI_MEM_FLASH_SE : R/W/SC ;bitpos:[24] ;default: 1'b0 ; */
+/*description: Sector erase enable(4KB). Sector erase operation will be triggered when the bit
+is set. The bit will be cleared once the operation done.1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_SE    (BIT(24))
+#define SPI_MEM_FLASH_SE_M  (BIT(24))
+#define SPI_MEM_FLASH_SE_V  0x1
+#define SPI_MEM_FLASH_SE_S  24
+/* SPI_MEM_FLASH_BE : R/W/SC ;bitpos:[23] ;default: 1'b0 ; */
+/*description: Block erase enable(32KB) .  Block erase operation will be triggered when the bit
+ is set. The bit will be cleared once the operation done.1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_BE    (BIT(23))
+#define SPI_MEM_FLASH_BE_M  (BIT(23))
+#define SPI_MEM_FLASH_BE_V  0x1
+#define SPI_MEM_FLASH_BE_S  23
+/* SPI_MEM_FLASH_CE : R/W/SC ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Chip erase enable. Chip erase operation will be triggered when the bit is set. T
+he bit will be cleared once the operation done.1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_CE    (BIT(22))
+#define SPI_MEM_FLASH_CE_M  (BIT(22))
+#define SPI_MEM_FLASH_CE_V  0x1
+#define SPI_MEM_FLASH_CE_S  22
+/* SPI_MEM_FLASH_DP : R/W/SC ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Drive Flash into power down.  An operation will be triggered when the bit is set
+. The bit will be cleared once the operation done.1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_DP    (BIT(21))
+#define SPI_MEM_FLASH_DP_M  (BIT(21))
+#define SPI_MEM_FLASH_DP_V  0x1
+#define SPI_MEM_FLASH_DP_S  21
+/* SPI_MEM_FLASH_RES : R/W/SC ;bitpos:[20] ;default: 1'b0 ; */
+/*description: This bit combined with SPI_MEM_RESANDRES bit releases Flash from the power-down
+state or high performance mode and obtains the devices ID. The bit will be clear
+ed once the operation done.1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_RES    (BIT(20))
+#define SPI_MEM_FLASH_RES_M  (BIT(20))
+#define SPI_MEM_FLASH_RES_V  0x1
+#define SPI_MEM_FLASH_RES_S  20
+/* SPI_MEM_FLASH_HPM : R/W/SC ;bitpos:[19] ;default: 1'b0 ; */
+/*description: Drive Flash into high performance mode.  The bit will be cleared once the operat
+ion done.1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_HPM    (BIT(19))
+#define SPI_MEM_FLASH_HPM_M  (BIT(19))
+#define SPI_MEM_FLASH_HPM_V  0x1
+#define SPI_MEM_FLASH_HPM_S  19
+/* SPI_MEM_USR : R/W/SC ;bitpos:[18] ;default: 1'b0 ; */
+/*description: User define command enable.  An operation will be triggered when the bit is set.
+ The bit will be cleared once the operation done.1: enable 0: disable. .*/
+#define SPI_MEM_USR    (BIT(18))
+#define SPI_MEM_USR_M  (BIT(18))
+#define SPI_MEM_USR_V  0x1
+#define SPI_MEM_USR_S  18
+/* SPI_MEM_FLASH_PE : R/W/SC ;bitpos:[17] ;default: 1'b0 ; */
+/*description: In user mode, it is set to indicate that program/erase operation will be trigger
+ed. The bit is combined with SPI_MEM_USR bit. The bit will be cleared once the o
+peration done.1: enable 0: disable. .*/
+#define SPI_MEM_FLASH_PE    (BIT(17))
+#define SPI_MEM_FLASH_PE_M  (BIT(17))
+#define SPI_MEM_FLASH_PE_V  0x1
+#define SPI_MEM_FLASH_PE_S  17
+
+#define SPI_MEM_ADDR_REG(i)          (REG_SPI_MEM_BASE(i) + 0x4)
+/* SPI_MEM_USR_ADDR_VALUE : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: In user mode, it is the memory address. other then the bit0-bit23 is the memory
+address, the bit24-bit31 are the byte length of a transfer..*/
+#define SPI_MEM_USR_ADDR_VALUE    0xFFFFFFFF
+#define SPI_MEM_USR_ADDR_VALUE_M  ((SPI_MEM_USR_ADDR_VALUE_V)<<(SPI_MEM_USR_ADDR_VALUE_S))
+#define SPI_MEM_USR_ADDR_VALUE_V  0xFFFFFFFF
+#define SPI_MEM_USR_ADDR_VALUE_S  0
+
+#define SPI_MEM_CTRL_REG(i)          (REG_SPI_MEM_BASE(i) + 0x8)
+/* SPI_MEM_FREAD_QIO : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: In hardware 0xEB read operation, ADDR phase and DIN phase apply 4 signals(4-bit-
+mode). 1: enable 0: disable. .*/
+#define SPI_MEM_FREAD_QIO    (BIT(24))
+#define SPI_MEM_FREAD_QIO_M  (BIT(24))
+#define SPI_MEM_FREAD_QIO_V  0x1
+#define SPI_MEM_FREAD_QIO_S  24
+/* SPI_MEM_FREAD_DIO : R/W ;bitpos:[23] ;default: 1'b0 ; */
+/*description: In hardware 0xBB read operation, ADDR phase and DIN phase apply 2 signals(2-bit-
+mode). 1: enable 0: disable. .*/
+#define SPI_MEM_FREAD_DIO    (BIT(23))
+#define SPI_MEM_FREAD_DIO_M  (BIT(23))
+#define SPI_MEM_FREAD_DIO_V  0x1
+#define SPI_MEM_FREAD_DIO_S  23
+/* SPI_MEM_WRSR_2B : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Two bytes data will be written to status register when it is set. 1: enable 0: d
+isable. .*/
+#define SPI_MEM_WRSR_2B    (BIT(22))
+#define SPI_MEM_WRSR_2B_M  (BIT(22))
+#define SPI_MEM_WRSR_2B_V  0x1
+#define SPI_MEM_WRSR_2B_S  22
+/* SPI_MEM_WP_REG : R/W ;bitpos:[21] ;default: 1'b1 ; */
+/*description: Write protect signal output when SPI is idle.  1: output high, 0: output low. .*/
+#define SPI_MEM_WP_REG    (BIT(21))
+#define SPI_MEM_WP_REG_M  (BIT(21))
+#define SPI_MEM_WP_REG_V  0x1
+#define SPI_MEM_WP_REG_S  21
+/* SPI_MEM_FREAD_QUAD : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: In hardware 0x6B read operation, DIN phase apply 4 signals(4-bit-mode). 1: enabl
+e 0: disable. .*/
+#define SPI_MEM_FREAD_QUAD    (BIT(20))
+#define SPI_MEM_FREAD_QUAD_M  (BIT(20))
+#define SPI_MEM_FREAD_QUAD_V  0x1
+#define SPI_MEM_FREAD_QUAD_S  20
+/* SPI_MEM_D_POL : R/W ;bitpos:[19] ;default: 1'b1 ; */
+/*description: The bit is used to set MOSI line polarity, 1: high 0, low.*/
+#define SPI_MEM_D_POL    (BIT(19))
+#define SPI_MEM_D_POL_M  (BIT(19))
+#define SPI_MEM_D_POL_V  0x1
+#define SPI_MEM_D_POL_S  19
+/* SPI_MEM_Q_POL : R/W ;bitpos:[18] ;default: 1'b1 ; */
+/*description: The bit is used to set MISO line polarity, 1: high 0, low.*/
+#define SPI_MEM_Q_POL    (BIT(18))
+#define SPI_MEM_Q_POL_M  (BIT(18))
+#define SPI_MEM_Q_POL_V  0x1
+#define SPI_MEM_Q_POL_S  18
+/* SPI_MEM_RESANDRES : R/W ;bitpos:[15] ;default: 1'b1 ; */
+/*description: The Device ID is read out to SPI_MEM_RD_STATUS register,  this bit combine with
+spi_mem_flash_res bit. 1: enable 0: disable. .*/
+#define SPI_MEM_RESANDRES    (BIT(15))
+#define SPI_MEM_RESANDRES_M  (BIT(15))
+#define SPI_MEM_RESANDRES_V  0x1
+#define SPI_MEM_RESANDRES_S  15
+/* SPI_MEM_FREAD_DUAL : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: In hardware 0x3B read operation, DIN phase apply 2 signals. 1: enable 0: disable
+. .*/
+#define SPI_MEM_FREAD_DUAL    (BIT(14))
+#define SPI_MEM_FREAD_DUAL_M  (BIT(14))
+#define SPI_MEM_FREAD_DUAL_V  0x1
+#define SPI_MEM_FREAD_DUAL_S  14
+/* SPI_MEM_FASTRD_MODE : R/W ;bitpos:[13] ;default: 1'b1 ; */
+/*description: This bit should be set when SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_MEM_FREAD_
+QUAD or SPI_MEM_FREAD_DUAL is set..*/
+#define SPI_MEM_FASTRD_MODE    (BIT(13))
+#define SPI_MEM_FASTRD_MODE_M  (BIT(13))
+#define SPI_MEM_FASTRD_MODE_V  0x1
+#define SPI_MEM_FASTRD_MODE_S  13
+/* SPI_MEM_TX_CRC_EN : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: For SPI1,  enable crc32 when writing encrypted data to flash. 1: enable 0:disabl
+e.*/
+#define SPI_MEM_TX_CRC_EN    (BIT(11))
+#define SPI_MEM_TX_CRC_EN_M  (BIT(11))
+#define SPI_MEM_TX_CRC_EN_V  0x1
+#define SPI_MEM_TX_CRC_EN_S  11
+/* SPI_MEM_FCS_CRC_EN : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: For SPI1,  initialize crc32 module before writing encrypted data to flash. Activ
+e low..*/
+#define SPI_MEM_FCS_CRC_EN    (BIT(10))
+#define SPI_MEM_FCS_CRC_EN_M  (BIT(10))
+#define SPI_MEM_FCS_CRC_EN_V  0x1
+#define SPI_MEM_FCS_CRC_EN_S  10
+/* SPI_MEM_FCMD_OCT : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Set this bit to enable 8-bit-mode(8-bm) in CMD phase..*/
+#define SPI_MEM_FCMD_OCT    (BIT(9))
+#define SPI_MEM_FCMD_OCT_M  (BIT(9))
+#define SPI_MEM_FCMD_OCT_V  0x1
+#define SPI_MEM_FCMD_OCT_S  9
+/* SPI_MEM_FCMD_QUAD : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set this bit to enable 4-bit-mode(4-bm) in CMD phase..*/
+#define SPI_MEM_FCMD_QUAD    (BIT(8))
+#define SPI_MEM_FCMD_QUAD_M  (BIT(8))
+#define SPI_MEM_FCMD_QUAD_V  0x1
+#define SPI_MEM_FCMD_QUAD_S  8
+/* SPI_MEM_FCMD_DUAL : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to enable 2-bit-mode(2-bm) in CMD phase..*/
+#define SPI_MEM_FCMD_DUAL    (BIT(7))
+#define SPI_MEM_FCMD_DUAL_M  (BIT(7))
+#define SPI_MEM_FCMD_DUAL_V  0x1
+#define SPI_MEM_FCMD_DUAL_S  7
+/* SPI_MEM_FADDR_OCT : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to enable 8-bit-mode(8-bm) in ADDR phase..*/
+#define SPI_MEM_FADDR_OCT    (BIT(6))
+#define SPI_MEM_FADDR_OCT_M  (BIT(6))
+#define SPI_MEM_FADDR_OCT_V  0x1
+#define SPI_MEM_FADDR_OCT_S  6
+/* SPI_MEM_FDIN_OCT : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to enable 8-bit-mode(8-bm) in DIN phase..*/
+#define SPI_MEM_FDIN_OCT    (BIT(5))
+#define SPI_MEM_FDIN_OCT_M  (BIT(5))
+#define SPI_MEM_FDIN_OCT_V  0x1
+#define SPI_MEM_FDIN_OCT_S  5
+/* SPI_MEM_FDOUT_OCT : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to enable 8-bit-mode(8-bm) in DOUT phase..*/
+#define SPI_MEM_FDOUT_OCT    (BIT(4))
+#define SPI_MEM_FDOUT_OCT_M  (BIT(4))
+#define SPI_MEM_FDOUT_OCT_V  0x1
+#define SPI_MEM_FDOUT_OCT_S  4
+/* SPI_MEM_FDUMMY_OUT : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: In the DUMMY phase the signal level of SPI bus is output by the SPI0 controller..*/
+#define SPI_MEM_FDUMMY_OUT    (BIT(3))
+#define SPI_MEM_FDUMMY_OUT_M  (BIT(3))
+#define SPI_MEM_FDUMMY_OUT_V  0x1
+#define SPI_MEM_FDUMMY_OUT_S  3
+
+#define SPI_MEM_CTRL1_REG(i)          (REG_SPI_MEM_BASE(i) + 0xC)
+/* SPI_MEM_RXFIFO_RST : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: SPI0 RX FIFO reset signal. Set this bit and clear it before SPI0 transfer starts
+..*/
+#define SPI_MEM_RXFIFO_RST    (BIT(30))
+#define SPI_MEM_RXFIFO_RST_M  (BIT(30))
+#define SPI_MEM_RXFIFO_RST_V  0x1
+#define SPI_MEM_RXFIFO_RST_S  30
+/* SPI_MEM_CS_HOLD_DLY_RES : R/W ;bitpos:[11:2] ;default: 10'h3ff ; */
+/*description: After RES/DP/HPM/PES/PER command is sent, SPI1 may waits (SPI_MEM_CS_HOLD_DELAY_
+RES[9:0] * 4 or * 256) SPI_CLK cycles..*/
+#define SPI_MEM_CS_HOLD_DLY_RES    0x000003FF
+#define SPI_MEM_CS_HOLD_DLY_RES_M  ((SPI_MEM_CS_HOLD_DLY_RES_V)<<(SPI_MEM_CS_HOLD_DLY_RES_S))
+#define SPI_MEM_CS_HOLD_DLY_RES_V  0x3FF
+#define SPI_MEM_CS_HOLD_DLY_RES_S  2
+/* SPI_MEM_CLK_MODE : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: SPI Bus clock (SPI_CLK) mode bits. 0: SPI Bus clock (SPI_CLK) is off when CS ina
+ctive 1: SPI_CLK is delayed one cycle after SPI_CS inactive 2: SPI_CLK is delaye
+d two cycles after SPI_CS inactive 3: SPI_CLK is always on..*/
+#define SPI_MEM_CLK_MODE    0x00000003
+#define SPI_MEM_CLK_MODE_M  ((SPI_MEM_CLK_MODE_V)<<(SPI_MEM_CLK_MODE_S))
+#define SPI_MEM_CLK_MODE_V  0x3
+#define SPI_MEM_CLK_MODE_S  0
+
+#define SPI_MEM_CTRL2_REG(i)          (REG_SPI_MEM_BASE(i) + 0x10)
+/* SPI_MEM_SYNC_RESET : R/W/SC ;bitpos:[31] ;default: 1'b0 ; */
+/*description: The FSM will be reset..*/
+#define SPI_MEM_SYNC_RESET    (BIT(31))
+#define SPI_MEM_SYNC_RESET_M  (BIT(31))
+#define SPI_MEM_SYNC_RESET_V  0x1
+#define SPI_MEM_SYNC_RESET_S  31
+/* SPI_MEM_CS_HOLD_DELAY : R/W ;bitpos:[30:25] ;default: 6'd0 ; */
+/*description: These bits are used to set the minimum CS high time tSHSL between SPI burst tran
+sfer when accesses to flash. tSHSL is (SPI_MEM_CS_HOLD_DELAY[5:0] + 1) MSPI core
+ clock cycles..*/
+#define SPI_MEM_CS_HOLD_DELAY    0x0000003F
+#define SPI_MEM_CS_HOLD_DELAY_M  ((SPI_MEM_CS_HOLD_DELAY_V)<<(SPI_MEM_CS_HOLD_DELAY_S))
+#define SPI_MEM_CS_HOLD_DELAY_V  0x3F
+#define SPI_MEM_CS_HOLD_DELAY_S  25
+/* SPI_MEM_ECC_16TO18_BYTE_EN : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: Set this bit to enable MSPI ECC 16 bytes data with 2 ECC bytes mode when accesse
+s flash..*/
+#define SPI_MEM_ECC_16TO18_BYTE_EN    (BIT(14))
+#define SPI_MEM_ECC_16TO18_BYTE_EN_M  (BIT(14))
+#define SPI_MEM_ECC_16TO18_BYTE_EN_V  0x1
+#define SPI_MEM_ECC_16TO18_BYTE_EN_S  14
+/* SPI_MEM_ECC_SKIP_PAGE_CORNER : R/W ;bitpos:[13] ;default: 1'b1 ; */
+/*description: 1: MSPI skips page corner when accesses flash. 0: Not skip page corner when acce
+sses flash..*/
+#define SPI_MEM_ECC_SKIP_PAGE_CORNER    (BIT(13))
+#define SPI_MEM_ECC_SKIP_PAGE_CORNER_M  (BIT(13))
+#define SPI_MEM_ECC_SKIP_PAGE_CORNER_V  0x1
+#define SPI_MEM_ECC_SKIP_PAGE_CORNER_S  13
+/* SPI_MEM_ECC_CS_HOLD_TIME : R/W ;bitpos:[12:10] ;default: 3'd3 ; */
+/*description: SPI_MEM_CS_HOLD_TIME + SPI_MEM_ECC_CS_HOLD_TIME is the SPI_CS hold cycle in ECC
+mode when accessed flash..*/
+#define SPI_MEM_ECC_CS_HOLD_TIME    0x00000007
+#define SPI_MEM_ECC_CS_HOLD_TIME_M  ((SPI_MEM_ECC_CS_HOLD_TIME_V)<<(SPI_MEM_ECC_CS_HOLD_TIME_S))
+#define SPI_MEM_ECC_CS_HOLD_TIME_V  0x7
+#define SPI_MEM_ECC_CS_HOLD_TIME_S  10
+/* SPI_MEM_CS_HOLD_TIME : R/W ;bitpos:[9:5] ;default: 5'h1 ; */
+/*description: SPI Bus CS (SPI_CS) signal is delayed to inactive by SPI Bus clock (SPI_CLK), wh
+ich is the SPI_CS hold time in non-ECC mode. These bits are combined with SPI_ME
+M_CS_HOLD bit..*/
+#define SPI_MEM_CS_HOLD_TIME    0x0000001F
+#define SPI_MEM_CS_HOLD_TIME_M  ((SPI_MEM_CS_HOLD_TIME_V)<<(SPI_MEM_CS_HOLD_TIME_S))
+#define SPI_MEM_CS_HOLD_TIME_V  0x1F
+#define SPI_MEM_CS_HOLD_TIME_S  5
+/* SPI_MEM_CS_SETUP_TIME : R/W ;bitpos:[4:0] ;default: 5'h1 ; */
+/*description: (cycles-1) of PREP phase by SPI_CLK, which is the SPI_CS setup time. These bits
+are combined with SPI_MEM_CS_SETUP bit..*/
+#define SPI_MEM_CS_SETUP_TIME    0x0000001F
+#define SPI_MEM_CS_SETUP_TIME_M  ((SPI_MEM_CS_SETUP_TIME_V)<<(SPI_MEM_CS_SETUP_TIME_S))
+#define SPI_MEM_CS_SETUP_TIME_V  0x1F
+#define SPI_MEM_CS_SETUP_TIME_S  0
+
+#define SPI_MEM_CLOCK_REG(i)          (REG_SPI_MEM_BASE(i) + 0x14)
+/* SPI_MEM_CLK_EQU_SYSCLK : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: When SPI1 access to flash or Ext_RAM, set this bit in 1-division mode, f_SPI_CLK
+ = f_MSPI_CORE_CLK..*/
+#define SPI_MEM_CLK_EQU_SYSCLK    (BIT(31))
+#define SPI_MEM_CLK_EQU_SYSCLK_M  (BIT(31))
+#define SPI_MEM_CLK_EQU_SYSCLK_V  0x1
+#define SPI_MEM_CLK_EQU_SYSCLK_S  31
+/* SPI_MEM_CLKCNT_N : R/W ;bitpos:[23:16] ;default: 8'h3 ; */
+/*description: When SPI1 accesses to flash or Ext_RAM, f_SPI_CLK = f_MSPI_CORE_CLK/(SPI_MEM_CLK
+CNT_N+1).*/
+#define SPI_MEM_CLKCNT_N    0x000000FF
+#define SPI_MEM_CLKCNT_N_M  ((SPI_MEM_CLKCNT_N_V)<<(SPI_MEM_CLKCNT_N_S))
+#define SPI_MEM_CLKCNT_N_V  0xFF
+#define SPI_MEM_CLKCNT_N_S  16
+/* SPI_MEM_CLKCNT_H : R/W ;bitpos:[15:8] ;default: 8'h1 ; */
+/*description: It must be a floor value of ((SPI_MEM_CLKCNT_N+1)/2-1)..*/
+#define SPI_MEM_CLKCNT_H    0x000000FF
+#define SPI_MEM_CLKCNT_H_M  ((SPI_MEM_CLKCNT_H_V)<<(SPI_MEM_CLKCNT_H_S))
+#define SPI_MEM_CLKCNT_H_V  0xFF
+#define SPI_MEM_CLKCNT_H_S  8
+/* SPI_MEM_CLKCNT_L : R/W ;bitpos:[7:0] ;default: 8'h3 ; */
+/*description: It must equal to the value of SPI_MEM_CLKCNT_N. .*/
+#define SPI_MEM_CLKCNT_L    0x000000FF
+#define SPI_MEM_CLKCNT_L_M  ((SPI_MEM_CLKCNT_L_V)<<(SPI_MEM_CLKCNT_L_S))
+#define SPI_MEM_CLKCNT_L_V  0xFF
+#define SPI_MEM_CLKCNT_L_S  0
+
+#define SPI_MEM_USER_REG(i)          (REG_SPI_MEM_BASE(i) + 0x18)
+/* SPI_MEM_USR_COMMAND : R/W ;bitpos:[31] ;default: 1'b1 ; */
+/*description: Set this bit to enable enable the CMD phase of an operation..*/
+#define SPI_MEM_USR_COMMAND    (BIT(31))
+#define SPI_MEM_USR_COMMAND_M  (BIT(31))
+#define SPI_MEM_USR_COMMAND_V  0x1
+#define SPI_MEM_USR_COMMAND_S  31
+/* SPI_MEM_USR_ADDR : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: Set this bit to enable enable the ADDR phase of an operation..*/
+#define SPI_MEM_USR_ADDR    (BIT(30))
+#define SPI_MEM_USR_ADDR_M  (BIT(30))
+#define SPI_MEM_USR_ADDR_V  0x1
+#define SPI_MEM_USR_ADDR_S  30
+/* SPI_MEM_USR_DUMMY : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: Set this bit to enable enable the DUMMY phase of an operation..*/
+#define SPI_MEM_USR_DUMMY    (BIT(29))
+#define SPI_MEM_USR_DUMMY_M  (BIT(29))
+#define SPI_MEM_USR_DUMMY_V  0x1
+#define SPI_MEM_USR_DUMMY_S  29
+/* SPI_MEM_USR_MISO : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: Set this bit to enable enable the DIN phase of a read-data operation..*/
+#define SPI_MEM_USR_MISO    (BIT(28))
+#define SPI_MEM_USR_MISO_M  (BIT(28))
+#define SPI_MEM_USR_MISO_V  0x1
+#define SPI_MEM_USR_MISO_S  28
+/* SPI_MEM_USR_MOSI : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: Set this bit to enable the DOUT phase of an write-data operation..*/
+#define SPI_MEM_USR_MOSI    (BIT(27))
+#define SPI_MEM_USR_MOSI_M  (BIT(27))
+#define SPI_MEM_USR_MOSI_V  0x1
+#define SPI_MEM_USR_MOSI_S  27
+/* SPI_MEM_USR_DUMMY_IDLE : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: SPI_CLK is disabled(No clock edges) in DUMMY phase when the bit is enable..*/
+#define SPI_MEM_USR_DUMMY_IDLE    (BIT(26))
+#define SPI_MEM_USR_DUMMY_IDLE_M  (BIT(26))
+#define SPI_MEM_USR_DUMMY_IDLE_V  0x1
+#define SPI_MEM_USR_DUMMY_IDLE_S  26
+/* SPI_MEM_USR_MOSI_HIGHPART : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: DOUT phase only access to high-part of the buffer SPI_MEM_W8_REG~SPI_MEM_W15_REG
+. 1: enable 0: disable. .*/
+#define SPI_MEM_USR_MOSI_HIGHPART    (BIT(25))
+#define SPI_MEM_USR_MOSI_HIGHPART_M  (BIT(25))
+#define SPI_MEM_USR_MOSI_HIGHPART_V  0x1
+#define SPI_MEM_USR_MOSI_HIGHPART_S  25
+/* SPI_MEM_USR_MISO_HIGHPART : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: DIN phase only access to high-part of the buffer SPI_MEM_W8_REG~SPI_MEM_W15_REG.
+ 1: enable 0: disable. .*/
+#define SPI_MEM_USR_MISO_HIGHPART    (BIT(24))
+#define SPI_MEM_USR_MISO_HIGHPART_M  (BIT(24))
+#define SPI_MEM_USR_MISO_HIGHPART_V  0x1
+#define SPI_MEM_USR_MISO_HIGHPART_S  24
+/* SPI_MEM_FWRITE_QIO : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: Set this bit to enable 4-bit-mode(4-bm) in ADDR and DOUT phase in SPI1 write ope
+ration..*/
+#define SPI_MEM_FWRITE_QIO    (BIT(15))
+#define SPI_MEM_FWRITE_QIO_M  (BIT(15))
+#define SPI_MEM_FWRITE_QIO_V  0x1
+#define SPI_MEM_FWRITE_QIO_S  15
+/* SPI_MEM_FWRITE_DIO : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: Set this bit to enable 2-bm in ADDR and DOUT phase in SPI1 write operation..*/
+#define SPI_MEM_FWRITE_DIO    (BIT(14))
+#define SPI_MEM_FWRITE_DIO_M  (BIT(14))
+#define SPI_MEM_FWRITE_DIO_V  0x1
+#define SPI_MEM_FWRITE_DIO_S  14
+/* SPI_MEM_FWRITE_QUAD : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: Set this bit to enable 4-bm in DOUT phase in SPI1 write operation..*/
+#define SPI_MEM_FWRITE_QUAD    (BIT(13))
+#define SPI_MEM_FWRITE_QUAD_M  (BIT(13))
+#define SPI_MEM_FWRITE_QUAD_V  0x1
+#define SPI_MEM_FWRITE_QUAD_S  13
+/* SPI_MEM_FWRITE_DUAL : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Set this bit to enable 2-bm in DOUT phase in SPI1 write operation..*/
+#define SPI_MEM_FWRITE_DUAL    (BIT(12))
+#define SPI_MEM_FWRITE_DUAL_M  (BIT(12))
+#define SPI_MEM_FWRITE_DUAL_V  0x1
+#define SPI_MEM_FWRITE_DUAL_S  12
+/* SPI_MEM_CK_OUT_EDGE : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: This bit, combined with SPI_MEM_CK_IDLE_EDGE bit, is used to change the clock mo
+de 0~3 of SPI_CLK. .*/
+#define SPI_MEM_CK_OUT_EDGE    (BIT(9))
+#define SPI_MEM_CK_OUT_EDGE_M  (BIT(9))
+#define SPI_MEM_CK_OUT_EDGE_V  0x1
+#define SPI_MEM_CK_OUT_EDGE_S  9
+/* SPI_MEM_CS_SETUP : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to keep SPI_CS low when MSPI is in PREP state..*/
+#define SPI_MEM_CS_SETUP    (BIT(7))
+#define SPI_MEM_CS_SETUP_M  (BIT(7))
+#define SPI_MEM_CS_SETUP_V  0x1
+#define SPI_MEM_CS_SETUP_S  7
+/* SPI_MEM_CS_HOLD : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to keep SPI_CS low when MSPI is in DONE state..*/
+#define SPI_MEM_CS_HOLD    (BIT(6))
+#define SPI_MEM_CS_HOLD_M  (BIT(6))
+#define SPI_MEM_CS_HOLD_V  0x1
+#define SPI_MEM_CS_HOLD_S  6
+
+#define SPI_MEM_USER1_REG(i)          (REG_SPI_MEM_BASE(i) + 0x1C)
+/* SPI_MEM_USR_ADDR_BITLEN : R/W ;bitpos:[31:26] ;default: 6'd23 ; */
+/*description: The length in bits of ADDR phase. The register value shall be (bit_num-1)..*/
+#define SPI_MEM_USR_ADDR_BITLEN    0x0000003F
+#define SPI_MEM_USR_ADDR_BITLEN_M  ((SPI_MEM_USR_ADDR_BITLEN_V)<<(SPI_MEM_USR_ADDR_BITLEN_S))
+#define SPI_MEM_USR_ADDR_BITLEN_V  0x3F
+#define SPI_MEM_USR_ADDR_BITLEN_S  26
+/* SPI_MEM_USR_DUMMY_CYCLELEN : R/W ;bitpos:[5:0] ;default: 6'd7 ; */
+/*description: The SPI_CLK cycle length minus 1 of DUMMY phase..*/
+#define SPI_MEM_USR_DUMMY_CYCLELEN    0x0000003F
+#define SPI_MEM_USR_DUMMY_CYCLELEN_M  ((SPI_MEM_USR_DUMMY_CYCLELEN_V)<<(SPI_MEM_USR_DUMMY_CYCLELEN_S))
+#define SPI_MEM_USR_DUMMY_CYCLELEN_V  0x3F
+#define SPI_MEM_USR_DUMMY_CYCLELEN_S  0
+
+#define SPI_MEM_USER2_REG(i)          (REG_SPI_MEM_BASE(i) + 0x20)
+/* SPI_MEM_USR_COMMAND_BITLEN : R/W ;bitpos:[31:28] ;default: 4'd7 ; */
+/*description: The length in bits of CMD phase. The register value shall be (bit_num-1).*/
+#define SPI_MEM_USR_COMMAND_BITLEN    0x0000000F
+#define SPI_MEM_USR_COMMAND_BITLEN_M  ((SPI_MEM_USR_COMMAND_BITLEN_V)<<(SPI_MEM_USR_COMMAND_BITLEN_S))
+#define SPI_MEM_USR_COMMAND_BITLEN_V  0xF
+#define SPI_MEM_USR_COMMAND_BITLEN_S  28
+/* SPI_MEM_USR_COMMAND_VALUE : R/W ;bitpos:[15:0] ;default: 16'b0 ; */
+/*description: The value of user defined(USR) command..*/
+#define SPI_MEM_USR_COMMAND_VALUE    0x0000FFFF
+#define SPI_MEM_USR_COMMAND_VALUE_M  ((SPI_MEM_USR_COMMAND_VALUE_V)<<(SPI_MEM_USR_COMMAND_VALUE_S))
+#define SPI_MEM_USR_COMMAND_VALUE_V  0xFFFF
+#define SPI_MEM_USR_COMMAND_VALUE_S  0
+
+#define SPI_MEM_MOSI_DLEN_REG(i)          (REG_SPI_MEM_BASE(i) + 0x24)
+/* SPI_MEM_USR_MOSI_DBITLEN : R/W ;bitpos:[9:0] ;default: 10'h0 ; */
+/*description: The length in bits of DOUT phase. The register value shall be (bit_num-1)..*/
+#define SPI_MEM_USR_MOSI_DBITLEN    0x000003FF
+#define SPI_MEM_USR_MOSI_DBITLEN_M  ((SPI_MEM_USR_MOSI_DBITLEN_V)<<(SPI_MEM_USR_MOSI_DBITLEN_S))
+#define SPI_MEM_USR_MOSI_DBITLEN_V  0x3FF
+#define SPI_MEM_USR_MOSI_DBITLEN_S  0
+
+#define SPI_MEM_MISO_DLEN_REG(i)          (REG_SPI_MEM_BASE(i) + 0x28)
+/* SPI_MEM_USR_MISO_DBITLEN : R/W ;bitpos:[9:0] ;default: 10'h0 ; */
+/*description: The length in bits of DIN phase. The register value shall be (bit_num-1)..*/
+#define SPI_MEM_USR_MISO_DBITLEN    0x000003FF
+#define SPI_MEM_USR_MISO_DBITLEN_M  ((SPI_MEM_USR_MISO_DBITLEN_V)<<(SPI_MEM_USR_MISO_DBITLEN_S))
+#define SPI_MEM_USR_MISO_DBITLEN_V  0x3FF
+#define SPI_MEM_USR_MISO_DBITLEN_S  0
+
+#define SPI_MEM_RD_STATUS_REG(i)          (REG_SPI_MEM_BASE(i) + 0x2C)
+/* SPI_MEM_WB_MODE : R/W ;bitpos:[23:16] ;default: 8'h00 ; */
+/*description: Mode bits in the flash fast read mode  it is combined with SPI_MEM_FASTRD_MODE b
+it..*/
+#define SPI_MEM_WB_MODE    0x000000FF
+#define SPI_MEM_WB_MODE_M  ((SPI_MEM_WB_MODE_V)<<(SPI_MEM_WB_MODE_S))
+#define SPI_MEM_WB_MODE_V  0xFF
+#define SPI_MEM_WB_MODE_S  16
+/* SPI_MEM_STATUS : R/W/SS ;bitpos:[15:0] ;default: 16'b0 ; */
+/*description: The value is stored when set SPI_MEM_FLASH_RDSR bit and SPI_MEM_FLASH_RES bit..*/
+#define SPI_MEM_STATUS    0x0000FFFF
+#define SPI_MEM_STATUS_M  ((SPI_MEM_STATUS_V)<<(SPI_MEM_STATUS_S))
+#define SPI_MEM_STATUS_V  0xFFFF
+#define SPI_MEM_STATUS_S  0
+
+#define SPI_MEM_EXT_ADDR_REG(i)          (REG_SPI_MEM_BASE(i) + 0x30)
+/* SPI_MEM_EXT_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: The register are the higher 32bits in the 64 bits address mode..*/
+#define SPI_MEM_EXT_ADDR    0xFFFFFFFF
+#define SPI_MEM_EXT_ADDR_M  ((SPI_MEM_EXT_ADDR_V)<<(SPI_MEM_EXT_ADDR_S))
+#define SPI_MEM_EXT_ADDR_V  0xFFFFFFFF
+#define SPI_MEM_EXT_ADDR_S  0
+
+#define SPI_MEM_MISC_REG(i)          (REG_SPI_MEM_BASE(i) + 0x34)
+/* SPI_MEM_AUTO_PER : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: Set this bit to enable auto PER function. Hardware will sent out PER command if
+PES command is sent..*/
+#define SPI_MEM_AUTO_PER    (BIT(11))
+#define SPI_MEM_AUTO_PER_M  (BIT(11))
+#define SPI_MEM_AUTO_PER_V  0x1
+#define SPI_MEM_AUTO_PER_S  11
+/* SPI_MEM_CS_KEEP_ACTIVE : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: SPI_CS line keep low when the bit is set..*/
+#define SPI_MEM_CS_KEEP_ACTIVE    (BIT(10))
+#define SPI_MEM_CS_KEEP_ACTIVE_M  (BIT(10))
+#define SPI_MEM_CS_KEEP_ACTIVE_V  0x1
+#define SPI_MEM_CS_KEEP_ACTIVE_S  10
+/* SPI_MEM_CK_IDLE_EDGE : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: 1: SPI_CLK line is high when MSPI is idle. 0: SPI_CLK line is low when MSPI is i
+dle..*/
+#define SPI_MEM_CK_IDLE_EDGE    (BIT(9))
+#define SPI_MEM_CK_IDLE_EDGE_M  (BIT(9))
+#define SPI_MEM_CK_IDLE_EDGE_V  0x1
+#define SPI_MEM_CK_IDLE_EDGE_S  9
+/* SPI_MEM_SSUB_PIN : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Ext_RAM is connected to SPI SUBPIN bus..*/
+#define SPI_MEM_SSUB_PIN    (BIT(8))
+#define SPI_MEM_SSUB_PIN_M  (BIT(8))
+#define SPI_MEM_SSUB_PIN_V  0x1
+#define SPI_MEM_SSUB_PIN_S  8
+/* SPI_MEM_FSUB_PIN : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Flash is connected to SPI SUBPIN bus..*/
+#define SPI_MEM_FSUB_PIN    (BIT(7))
+#define SPI_MEM_FSUB_PIN_M  (BIT(7))
+#define SPI_MEM_FSUB_PIN_V  0x1
+#define SPI_MEM_FSUB_PIN_S  7
+/* SPI_MEM_CS1_DIS : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: Set this bit to raise high SPI_CS1 pin, which means that the SPI device(Ext_RAM)
+ connected to SPI_CS1 is in low level when SPI1 transfer starts..*/
+#define SPI_MEM_CS1_DIS    (BIT(1))
+#define SPI_MEM_CS1_DIS_M  (BIT(1))
+#define SPI_MEM_CS1_DIS_V  0x1
+#define SPI_MEM_CS1_DIS_S  1
+/* SPI_MEM_CS0_DIS : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to raise high SPI_CS pin, which means that the SPI device(flash) co
+nnected to SPI_CS is in low level when SPI1 transfer starts..*/
+#define SPI_MEM_CS0_DIS    (BIT(0))
+#define SPI_MEM_CS0_DIS_M  (BIT(0))
+#define SPI_MEM_CS0_DIS_V  0x1
+#define SPI_MEM_CS0_DIS_S  0
+
+#define SPI_MEM_TX_CRC_REG(i)          (REG_SPI_MEM_BASE(i) + 0x38)
+/* SPI_MEM_TX_CRC_DATA : RO ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/*description: For SPI1, the value of crc32..*/
+#define SPI_MEM_TX_CRC_DATA    0xFFFFFFFF
+#define SPI_MEM_TX_CRC_DATA_M  ((SPI_MEM_TX_CRC_DATA_V)<<(SPI_MEM_TX_CRC_DATA_S))
+#define SPI_MEM_TX_CRC_DATA_V  0xFFFFFFFF
+#define SPI_MEM_TX_CRC_DATA_S  0
+
+#define SPI_MEM_CACHE_FCTRL_REG(i)          (REG_SPI_MEM_BASE(i) + 0x3C)
+/* SPI_MEM_FADDR_QUAD : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: When SPI1 accesses to flash or Ext_RAM, set this bit to enable 4-bm in ADDR phas
+e..*/
+#define SPI_MEM_FADDR_QUAD    (BIT(8))
+#define SPI_MEM_FADDR_QUAD_M  (BIT(8))
+#define SPI_MEM_FADDR_QUAD_V  0x1
+#define SPI_MEM_FADDR_QUAD_S  8
+/* SPI_MEM_FDOUT_QUAD : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: When SPI1 accesses to flash or Ext_RAM, set this bit to enable 4-bm in DOUT phas
+e..*/
+#define SPI_MEM_FDOUT_QUAD    (BIT(7))
+#define SPI_MEM_FDOUT_QUAD_M  (BIT(7))
+#define SPI_MEM_FDOUT_QUAD_V  0x1
+#define SPI_MEM_FDOUT_QUAD_S  7
+/* SPI_MEM_FDIN_QUAD : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: When SPI1 accesses to flash or Ext_RAM, set this bit to enable 4-bm in DIN phase
+..*/
+#define SPI_MEM_FDIN_QUAD    (BIT(6))
+#define SPI_MEM_FDIN_QUAD_M  (BIT(6))
+#define SPI_MEM_FDIN_QUAD_V  0x1
+#define SPI_MEM_FDIN_QUAD_S  6
+/* SPI_MEM_FADDR_DUAL : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: When SPI1 accesses to flash or Ext_RAM, set this bit to enable 2-bm in ADDR phas
+e..*/
+#define SPI_MEM_FADDR_DUAL    (BIT(5))
+#define SPI_MEM_FADDR_DUAL_M  (BIT(5))
+#define SPI_MEM_FADDR_DUAL_V  0x1
+#define SPI_MEM_FADDR_DUAL_S  5
+/* SPI_MEM_FDOUT_DUAL : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: When SPI1 accesses to flash or Ext_RAM, set this bit to enable 2-bm in DOUT phas
+e..*/
+#define SPI_MEM_FDOUT_DUAL    (BIT(4))
+#define SPI_MEM_FDOUT_DUAL_M  (BIT(4))
+#define SPI_MEM_FDOUT_DUAL_V  0x1
+#define SPI_MEM_FDOUT_DUAL_S  4
+/* SPI_MEM_FDIN_DUAL : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: When SPI1 accesses to flash or Ext_RAM, set this bit to enable 2-bm in DIN phase
+..*/
+#define SPI_MEM_FDIN_DUAL    (BIT(3))
+#define SPI_MEM_FDIN_DUAL_M  (BIT(3))
+#define SPI_MEM_FDIN_DUAL_V  0x1
+#define SPI_MEM_FDIN_DUAL_S  3
+/* SPI_MEM_CACHE_FLASH_USR_CMD : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: 1: The command value of SPI0 reads flash is SPI_MEM_USR_COMMAND_VALUE. 0: Hardwa
+re read command value, controlled by SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_M
+EM_FREAD_QUAD, SPI_MEM_FREAD_DUAL and SPI_MEM_FASTRD_MODE bits..*/
+#define SPI_MEM_CACHE_FLASH_USR_CMD    (BIT(2))
+#define SPI_MEM_CACHE_FLASH_USR_CMD_M  (BIT(2))
+#define SPI_MEM_CACHE_FLASH_USR_CMD_V  0x1
+#define SPI_MEM_CACHE_FLASH_USR_CMD_S  2
+/* SPI_MEM_CACHE_USR_CMD_4BYTE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to enable SPI1 transfer with 32 bits address. The value of SPI_MEM_
+USR_ADDR_BITLEN should be 31..*/
+#define SPI_MEM_CACHE_USR_CMD_4BYTE    (BIT(1))
+#define SPI_MEM_CACHE_USR_CMD_4BYTE_M  (BIT(1))
+#define SPI_MEM_CACHE_USR_CMD_4BYTE_V  0x1
+#define SPI_MEM_CACHE_USR_CMD_4BYTE_S  1
+/* SPI_MEM_CACHE_REQ_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to enable Cache's access and SPI0's transfer..*/
+#define SPI_MEM_CACHE_REQ_EN    (BIT(0))
+#define SPI_MEM_CACHE_REQ_EN_M  (BIT(0))
+#define SPI_MEM_CACHE_REQ_EN_V  0x1
+#define SPI_MEM_CACHE_REQ_EN_S  0
+
+#define SPI_MEM_CACHE_SCTRL_REG(i)          (REG_SPI_MEM_BASE(i) + 0x40)
+/* SPI_MEM_SRAM_WDUMMY_CYCLELEN : R/W ;bitpos:[27:22] ;default: 6'b1 ; */
+/*description: When SPI0 accesses to Ext_RAM, it is the SPI_CLK cycles minus 1 of DUMMY phase i
+n write data transfer..*/
+#define SPI_MEM_SRAM_WDUMMY_CYCLELEN    0x0000003F
+#define SPI_MEM_SRAM_WDUMMY_CYCLELEN_M  ((SPI_MEM_SRAM_WDUMMY_CYCLELEN_V)<<(SPI_MEM_SRAM_WDUMMY_CYCLELEN_S))
+#define SPI_MEM_SRAM_WDUMMY_CYCLELEN_V  0x3F
+#define SPI_MEM_SRAM_WDUMMY_CYCLELEN_S  22
+/* SPI_MEM_SRAM_OCT : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Set the bit to enable OPI mode in all SPI0 Ext_RAM transfer..*/
+#define SPI_MEM_SRAM_OCT    (BIT(21))
+#define SPI_MEM_SRAM_OCT_M  (BIT(21))
+#define SPI_MEM_SRAM_OCT_V  0x1
+#define SPI_MEM_SRAM_OCT_S  21
+/* SPI_MEM_CACHE_SRAM_USR_WCMD : R/W ;bitpos:[20] ;default: 1'b1 ; */
+/*description: 1: The command value of SPI0 write Ext_RAM is SPI_MEM_CACHE_SRAM_USR_RD_CMD_VALU
+E. 0: The value is 0x3..*/
+#define SPI_MEM_CACHE_SRAM_USR_WCMD    (BIT(20))
+#define SPI_MEM_CACHE_SRAM_USR_WCMD_M  (BIT(20))
+#define SPI_MEM_CACHE_SRAM_USR_WCMD_V  0x1
+#define SPI_MEM_CACHE_SRAM_USR_WCMD_S  20
+/* SPI_MEM_SRAM_ADDR_BITLEN : R/W ;bitpos:[19:14] ;default: 6'd23 ; */
+/*description: When SPI0 accesses to Ext_RAM, it is the length in bits of ADDR phase. The regis
+ter value shall be (bit_num-1)..*/
+#define SPI_MEM_SRAM_ADDR_BITLEN    0x0000003F
+#define SPI_MEM_SRAM_ADDR_BITLEN_M  ((SPI_MEM_SRAM_ADDR_BITLEN_V)<<(SPI_MEM_SRAM_ADDR_BITLEN_S))
+#define SPI_MEM_SRAM_ADDR_BITLEN_V  0x3F
+#define SPI_MEM_SRAM_ADDR_BITLEN_S  14
+/* SPI_MEM_SRAM_RDUMMY_CYCLELEN : R/W ;bitpos:[11:6] ;default: 6'b1 ; */
+/*description: When SPI0 accesses to Ext_RAM, it is the SPI_CLK cycles minus 1 of DUMMY phase i
+n read data transfer..*/
+#define SPI_MEM_SRAM_RDUMMY_CYCLELEN    0x0000003F
+#define SPI_MEM_SRAM_RDUMMY_CYCLELEN_M  ((SPI_MEM_SRAM_RDUMMY_CYCLELEN_V)<<(SPI_MEM_SRAM_RDUMMY_CYCLELEN_S))
+#define SPI_MEM_SRAM_RDUMMY_CYCLELEN_V  0x3F
+#define SPI_MEM_SRAM_RDUMMY_CYCLELEN_S  6
+/* SPI_MEM_CACHE_SRAM_USR_RCMD : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/*description: 1: The command value of SPI0 read Ext_RAM is SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE
+. 0: The value is 0x2..*/
+#define SPI_MEM_CACHE_SRAM_USR_RCMD    (BIT(5))
+#define SPI_MEM_CACHE_SRAM_USR_RCMD_M  (BIT(5))
+#define SPI_MEM_CACHE_SRAM_USR_RCMD_V  0x1
+#define SPI_MEM_CACHE_SRAM_USR_RCMD_S  5
+/* SPI_MEM_USR_RD_SRAM_DUMMY : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable DUMMY phase in read operat
+ions..*/
+#define SPI_MEM_USR_RD_SRAM_DUMMY    (BIT(4))
+#define SPI_MEM_USR_RD_SRAM_DUMMY_M  (BIT(4))
+#define SPI_MEM_USR_RD_SRAM_DUMMY_V  0x1
+#define SPI_MEM_USR_RD_SRAM_DUMMY_S  4
+/* SPI_MEM_USR_WR_SRAM_DUMMY : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable DUMMY phase in write opera
+tions..*/
+#define SPI_MEM_USR_WR_SRAM_DUMMY    (BIT(3))
+#define SPI_MEM_USR_WR_SRAM_DUMMY_M  (BIT(3))
+#define SPI_MEM_USR_WR_SRAM_DUMMY_V  0x1
+#define SPI_MEM_USR_WR_SRAM_DUMMY_S  3
+/* SPI_MEM_USR_SRAM_QIO : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set the bit to enable QPI mode in all SPI0 Ext_RAM transfer..*/
+#define SPI_MEM_USR_SRAM_QIO    (BIT(2))
+#define SPI_MEM_USR_SRAM_QIO_M  (BIT(2))
+#define SPI_MEM_USR_SRAM_QIO_V  0x1
+#define SPI_MEM_USR_SRAM_QIO_S  2
+/* SPI_MEM_USR_SRAM_DIO : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set the bit to enable 2-bm in all the phases of SPI0 Ext_RAM transfer..*/
+#define SPI_MEM_USR_SRAM_DIO    (BIT(1))
+#define SPI_MEM_USR_SRAM_DIO_M  (BIT(1))
+#define SPI_MEM_USR_SRAM_DIO_V  0x1
+#define SPI_MEM_USR_SRAM_DIO_S  1
+/* SPI_MEM_CACHE_USR_SCMD_4BYTE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to enable SPI0 read Ext_RAM with 32 bits address. The value of SPI_
+MEM_SRAM_ADDR_BITLEN should be 31..*/
+#define SPI_MEM_CACHE_USR_SCMD_4BYTE    (BIT(0))
+#define SPI_MEM_CACHE_USR_SCMD_4BYTE_M  (BIT(0))
+#define SPI_MEM_CACHE_USR_SCMD_4BYTE_V  0x1
+#define SPI_MEM_CACHE_USR_SCMD_4BYTE_S  0
+
+#define SPI_MEM_SRAM_CMD_REG(i)          (REG_SPI_MEM_BASE(i) + 0x44)
+/* SPI_MEM_SDUMMY_OUT : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, in the DUMMY phase the signal level of SPI bus is
+ output by the SPI0 controller..*/
+#define SPI_MEM_SDUMMY_OUT    (BIT(22))
+#define SPI_MEM_SDUMMY_OUT_M  (BIT(22))
+#define SPI_MEM_SDUMMY_OUT_V  0x1
+#define SPI_MEM_SDUMMY_OUT_S  22
+/* SPI_MEM_SCMD_OCT : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in CMD phase..*/
+#define SPI_MEM_SCMD_OCT    (BIT(21))
+#define SPI_MEM_SCMD_OCT_M  (BIT(21))
+#define SPI_MEM_SCMD_OCT_V  0x1
+#define SPI_MEM_SCMD_OCT_S  21
+/* SPI_MEM_SADDR_OCT : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in ADDR phase..*/
+#define SPI_MEM_SADDR_OCT    (BIT(20))
+#define SPI_MEM_SADDR_OCT_M  (BIT(20))
+#define SPI_MEM_SADDR_OCT_V  0x1
+#define SPI_MEM_SADDR_OCT_S  20
+/* SPI_MEM_SDOUT_OCT : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DOUT phase..*/
+#define SPI_MEM_SDOUT_OCT    (BIT(19))
+#define SPI_MEM_SDOUT_OCT_M  (BIT(19))
+#define SPI_MEM_SDOUT_OCT_V  0x1
+#define SPI_MEM_SDOUT_OCT_S  19
+/* SPI_MEM_SDIN_OCT : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DIN phase..*/
+#define SPI_MEM_SDIN_OCT    (BIT(18))
+#define SPI_MEM_SDIN_OCT_M  (BIT(18))
+#define SPI_MEM_SDIN_OCT_V  0x1
+#define SPI_MEM_SDIN_OCT_S  18
+/* SPI_MEM_SCMD_QUAD : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in CMD phase..*/
+#define SPI_MEM_SCMD_QUAD    (BIT(17))
+#define SPI_MEM_SCMD_QUAD_M  (BIT(17))
+#define SPI_MEM_SCMD_QUAD_V  0x1
+#define SPI_MEM_SCMD_QUAD_S  17
+/* SPI_MEM_SADDR_QUAD : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in ADDR phase..*/
+#define SPI_MEM_SADDR_QUAD    (BIT(16))
+#define SPI_MEM_SADDR_QUAD_M  (BIT(16))
+#define SPI_MEM_SADDR_QUAD_V  0x1
+#define SPI_MEM_SADDR_QUAD_S  16
+/* SPI_MEM_SDOUT_QUAD : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DOUT phase..*/
+#define SPI_MEM_SDOUT_QUAD    (BIT(15))
+#define SPI_MEM_SDOUT_QUAD_M  (BIT(15))
+#define SPI_MEM_SDOUT_QUAD_V  0x1
+#define SPI_MEM_SDOUT_QUAD_S  15
+/* SPI_MEM_SDIN_QUAD : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DIN phase..*/
+#define SPI_MEM_SDIN_QUAD    (BIT(14))
+#define SPI_MEM_SDIN_QUAD_M  (BIT(14))
+#define SPI_MEM_SDIN_QUAD_V  0x1
+#define SPI_MEM_SDIN_QUAD_S  14
+/* SPI_MEM_SCMD_DUAL : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in CMD phase..*/
+#define SPI_MEM_SCMD_DUAL    (BIT(13))
+#define SPI_MEM_SCMD_DUAL_M  (BIT(13))
+#define SPI_MEM_SCMD_DUAL_V  0x1
+#define SPI_MEM_SCMD_DUAL_S  13
+/* SPI_MEM_SADDR_DUAL : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in ADDR phase..*/
+#define SPI_MEM_SADDR_DUAL    (BIT(12))
+#define SPI_MEM_SADDR_DUAL_M  (BIT(12))
+#define SPI_MEM_SADDR_DUAL_V  0x1
+#define SPI_MEM_SADDR_DUAL_S  12
+/* SPI_MEM_SDOUT_DUAL : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DOUT phase..*/
+#define SPI_MEM_SDOUT_DUAL    (BIT(11))
+#define SPI_MEM_SDOUT_DUAL_M  (BIT(11))
+#define SPI_MEM_SDOUT_DUAL_V  0x1
+#define SPI_MEM_SDOUT_DUAL_S  11
+/* SPI_MEM_SDIN_DUAL : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DIN phase..*/
+#define SPI_MEM_SDIN_DUAL    (BIT(10))
+#define SPI_MEM_SDIN_DUAL_M  (BIT(10))
+#define SPI_MEM_SDIN_DUAL_V  0x1
+#define SPI_MEM_SDIN_DUAL_S  10
+/* SPI_MEM_SWB_MODE : R/W ;bitpos:[9:2] ;default: 8'b0 ; */
+/*description: Mode bits when SPI0 accesses to Ext_RAM..*/
+#define SPI_MEM_SWB_MODE    0x000000FF
+#define SPI_MEM_SWB_MODE_M  ((SPI_MEM_SWB_MODE_V)<<(SPI_MEM_SWB_MODE_S))
+#define SPI_MEM_SWB_MODE_V  0xFF
+#define SPI_MEM_SWB_MODE_S  2
+/* SPI_MEM_SCLK_MODE : R/W ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: SPI_CLK mode bits  when SPI0 accesses to Ext_RAM. 0: SPI_CLK is off when CS inac
+tive 1: SPI_CLK is delayed one cycle after CS inactive 2: SPI_CLK is delayed two
+ cycles after CS inactive 3: SPI_CLK is always on..*/
+#define SPI_MEM_SCLK_MODE    0x00000003
+#define SPI_MEM_SCLK_MODE_M  ((SPI_MEM_SCLK_MODE_V)<<(SPI_MEM_SCLK_MODE_S))
+#define SPI_MEM_SCLK_MODE_V  0x3
+#define SPI_MEM_SCLK_MODE_S  0
+
+#define SPI_MEM_SRAM_DRD_CMD_REG(i)          (REG_SPI_MEM_BASE(i) + 0x48)
+/* SPI_MEM_CACHE_SRAM_USR_RD_CMD_BITLEN : R/W ;bitpos:[31:28] ;default: 4'h0 ; */
+/*description: When SPI0 reads Ext_RAM, it is the length in bits of CMD phase. The register val
+ue shall be (bit_num-1)..*/
+#define SPI_MEM_CACHE_SRAM_USR_RD_CMD_BITLEN    0x0000000F
+#define SPI_MEM_CACHE_SRAM_USR_RD_CMD_BITLEN_M  ((SPI_MEM_CACHE_SRAM_USR_RD_CMD_BITLEN_V)<<(SPI_MEM_CACHE_SRAM_USR_RD_CMD_BITLEN_S))
+#define SPI_MEM_CACHE_SRAM_USR_RD_CMD_BITLEN_V  0xF
+#define SPI_MEM_CACHE_SRAM_USR_RD_CMD_BITLEN_S  28
+/* SPI_MEM_CACHE_SRAM_USR_RD_CMD_VALUE : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: When SPI0 reads Ext_RAM, it is the command value of CMD phase..*/
+#define SPI_MEM_CACHE_SRAM_USR_RD_CMD_VALUE    0x0000FFFF
+#define SPI_MEM_CACHE_SRAM_USR_RD_CMD_VALUE_M  ((SPI_MEM_CACHE_SRAM_USR_RD_CMD_VALUE_V)<<(SPI_MEM_CACHE_SRAM_USR_RD_CMD_VALUE_S))
+#define SPI_MEM_CACHE_SRAM_USR_RD_CMD_VALUE_V  0xFFFF
+#define SPI_MEM_CACHE_SRAM_USR_RD_CMD_VALUE_S  0
+
+#define SPI_MEM_SRAM_DWR_CMD_REG(i)          (REG_SPI_MEM_BASE(i) + 0x4C)
+/* SPI_MEM_CACHE_SRAM_USR_WR_CMD_BITLEN : R/W ;bitpos:[31:28] ;default: 4'h0 ; */
+/*description: When SPI0 writes Ext_RAM, it is the length in bits of CMD phase. The register va
+lue shall be (bit_num-1)..*/
+#define SPI_MEM_CACHE_SRAM_USR_WR_CMD_BITLEN    0x0000000F
+#define SPI_MEM_CACHE_SRAM_USR_WR_CMD_BITLEN_M  ((SPI_MEM_CACHE_SRAM_USR_WR_CMD_BITLEN_V)<<(SPI_MEM_CACHE_SRAM_USR_WR_CMD_BITLEN_S))
+#define SPI_MEM_CACHE_SRAM_USR_WR_CMD_BITLEN_V  0xF
+#define SPI_MEM_CACHE_SRAM_USR_WR_CMD_BITLEN_S  28
+/* SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: When SPI0 writes Ext_RAM, it is the command value of CMD phase..*/
+#define SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE    0x0000FFFF
+#define SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE_M  ((SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE_V)<<(SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE_S))
+#define SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE_V  0xFFFF
+#define SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE_S  0
+
+#define SPI_MEM_SRAM_CLK_REG(i)          (REG_SPI_MEM_BASE(i) + 0x50)
+/* SPI_MEM_SCLK_EQU_SYSCLK : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: When SPI0 accesses to Ext_RAM, set this bit in 1-division mode, f_SPI_CLK = f_MS
+PI_CORE_CLK..*/
+#define SPI_MEM_SCLK_EQU_SYSCLK    (BIT(31))
+#define SPI_MEM_SCLK_EQU_SYSCLK_M  (BIT(31))
+#define SPI_MEM_SCLK_EQU_SYSCLK_V  0x1
+#define SPI_MEM_SCLK_EQU_SYSCLK_S  31
+/* SPI_MEM_SCLKCNT_N : R/W ;bitpos:[23:16] ;default: 8'h3 ; */
+/*description: When SPI0 accesses to Ext_RAM, f_SPI_CLK = f_MSPI_CORE_CLK/(SPI_MEM_SCLKCNT_N+1).*/
+#define SPI_MEM_SCLKCNT_N    0x000000FF
+#define SPI_MEM_SCLKCNT_N_M  ((SPI_MEM_SCLKCNT_N_V)<<(SPI_MEM_SCLKCNT_N_S))
+#define SPI_MEM_SCLKCNT_N_V  0xFF
+#define SPI_MEM_SCLKCNT_N_S  16
+/* SPI_MEM_SCLKCNT_H : R/W ;bitpos:[15:8] ;default: 8'h1 ; */
+/*description: It must be a floor value of ((SPI_MEM_SCLKCNT_N+1)/2-1)..*/
+#define SPI_MEM_SCLKCNT_H    0x000000FF
+#define SPI_MEM_SCLKCNT_H_M  ((SPI_MEM_SCLKCNT_H_V)<<(SPI_MEM_SCLKCNT_H_S))
+#define SPI_MEM_SCLKCNT_H_V  0xFF
+#define SPI_MEM_SCLKCNT_H_S  8
+/* SPI_MEM_SCLKCNT_L : R/W ;bitpos:[7:0] ;default: 8'h3 ; */
+/*description: It must equal to the value of SPI_MEM_SCLKCNT_N. .*/
+#define SPI_MEM_SCLKCNT_L    0x000000FF
+#define SPI_MEM_SCLKCNT_L_M  ((SPI_MEM_SCLKCNT_L_V)<<(SPI_MEM_SCLKCNT_L_S))
+#define SPI_MEM_SCLKCNT_L_V  0xFF
+#define SPI_MEM_SCLKCNT_L_S  0
+
+#define SPI_MEM_FSM_REG(i)          (REG_SPI_MEM_BASE(i) + 0x54)
+/* SPI_MEM_ST : RO ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: The status of SPI1 state machine. 0: idle state(IDLE), 1: preparation state(PREP
+), 2: send command state(CMD), 3: send address state(ADDR), 4: red data state(DI
+N), 5:write data state(DOUT), 6: wait state(DUMMY), 7: done state(DONE)..*/
+#define SPI_MEM_ST    0x00000007
+#define SPI_MEM_ST_M  ((SPI_MEM_ST_V)<<(SPI_MEM_ST_S))
+#define SPI_MEM_ST_V  0x7
+#define SPI_MEM_ST_S  0
+
+#define SPI_MEM_W0_REG(i)          (REG_SPI_MEM_BASE(i) + 0x58)
+/* SPI_MEM_BUF0 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF0    0xFFFFFFFF
+#define SPI_MEM_BUF0_M  ((SPI_MEM_BUF0_V)<<(SPI_MEM_BUF0_S))
+#define SPI_MEM_BUF0_V  0xFFFFFFFF
+#define SPI_MEM_BUF0_S  0
+
+#define SPI_MEM_W1_REG(i)          (REG_SPI_MEM_BASE(i) + 0x5C)
+/* SPI_MEM_BUF1 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF1    0xFFFFFFFF
+#define SPI_MEM_BUF1_M  ((SPI_MEM_BUF1_V)<<(SPI_MEM_BUF1_S))
+#define SPI_MEM_BUF1_V  0xFFFFFFFF
+#define SPI_MEM_BUF1_S  0
+
+#define SPI_MEM_W2_REG(i)          (REG_SPI_MEM_BASE(i) + 0x60)
+/* SPI_MEM_BUF2 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF2    0xFFFFFFFF
+#define SPI_MEM_BUF2_M  ((SPI_MEM_BUF2_V)<<(SPI_MEM_BUF2_S))
+#define SPI_MEM_BUF2_V  0xFFFFFFFF
+#define SPI_MEM_BUF2_S  0
+
+#define SPI_MEM_W3_REG(i)          (REG_SPI_MEM_BASE(i) + 0x64)
+/* SPI_MEM_BUF3 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF3    0xFFFFFFFF
+#define SPI_MEM_BUF3_M  ((SPI_MEM_BUF3_V)<<(SPI_MEM_BUF3_S))
+#define SPI_MEM_BUF3_V  0xFFFFFFFF
+#define SPI_MEM_BUF3_S  0
+
+#define SPI_MEM_W4_REG(i)          (REG_SPI_MEM_BASE(i) + 0x68)
+/* SPI_MEM_BUF4 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF4    0xFFFFFFFF
+#define SPI_MEM_BUF4_M  ((SPI_MEM_BUF4_V)<<(SPI_MEM_BUF4_S))
+#define SPI_MEM_BUF4_V  0xFFFFFFFF
+#define SPI_MEM_BUF4_S  0
+
+#define SPI_MEM_W5_REG(i)          (REG_SPI_MEM_BASE(i) + 0x6C)
+/* SPI_MEM_BUF5 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF5    0xFFFFFFFF
+#define SPI_MEM_BUF5_M  ((SPI_MEM_BUF5_V)<<(SPI_MEM_BUF5_S))
+#define SPI_MEM_BUF5_V  0xFFFFFFFF
+#define SPI_MEM_BUF5_S  0
+
+#define SPI_MEM_W6_REG(i)          (REG_SPI_MEM_BASE(i) + 0x70)
+/* SPI_MEM_BUF6 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF6    0xFFFFFFFF
+#define SPI_MEM_BUF6_M  ((SPI_MEM_BUF6_V)<<(SPI_MEM_BUF6_S))
+#define SPI_MEM_BUF6_V  0xFFFFFFFF
+#define SPI_MEM_BUF6_S  0
+
+#define SPI_MEM_W7_REG(i)          (REG_SPI_MEM_BASE(i) + 0x74)
+/* SPI_MEM_BUF7 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF7    0xFFFFFFFF
+#define SPI_MEM_BUF7_M  ((SPI_MEM_BUF7_V)<<(SPI_MEM_BUF7_S))
+#define SPI_MEM_BUF7_V  0xFFFFFFFF
+#define SPI_MEM_BUF7_S  0
+
+#define SPI_MEM_W8_REG(i)          (REG_SPI_MEM_BASE(i) + 0x78)
+/* SPI_MEM_BUF8 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF8    0xFFFFFFFF
+#define SPI_MEM_BUF8_M  ((SPI_MEM_BUF8_V)<<(SPI_MEM_BUF8_S))
+#define SPI_MEM_BUF8_V  0xFFFFFFFF
+#define SPI_MEM_BUF8_S  0
+
+#define SPI_MEM_W9_REG(i)          (REG_SPI_MEM_BASE(i) + 0x7C)
+/* SPI_MEM_BUF9 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF9    0xFFFFFFFF
+#define SPI_MEM_BUF9_M  ((SPI_MEM_BUF9_V)<<(SPI_MEM_BUF9_S))
+#define SPI_MEM_BUF9_V  0xFFFFFFFF
+#define SPI_MEM_BUF9_S  0
+
+#define SPI_MEM_W10_REG(i)          (REG_SPI_MEM_BASE(i) + 0x80)
+/* SPI_MEM_BUF10 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF10    0xFFFFFFFF
+#define SPI_MEM_BUF10_M  ((SPI_MEM_BUF10_V)<<(SPI_MEM_BUF10_S))
+#define SPI_MEM_BUF10_V  0xFFFFFFFF
+#define SPI_MEM_BUF10_S  0
+
+#define SPI_MEM_W11_REG(i)          (REG_SPI_MEM_BASE(i) + 0x84)
+/* SPI_MEM_BUF11 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF11    0xFFFFFFFF
+#define SPI_MEM_BUF11_M  ((SPI_MEM_BUF11_V)<<(SPI_MEM_BUF11_S))
+#define SPI_MEM_BUF11_V  0xFFFFFFFF
+#define SPI_MEM_BUF11_S  0
+
+#define SPI_MEM_W12_REG(i)          (REG_SPI_MEM_BASE(i) + 0x88)
+/* SPI_MEM_BUF12 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF12    0xFFFFFFFF
+#define SPI_MEM_BUF12_M  ((SPI_MEM_BUF12_V)<<(SPI_MEM_BUF12_S))
+#define SPI_MEM_BUF12_V  0xFFFFFFFF
+#define SPI_MEM_BUF12_S  0
+
+#define SPI_MEM_W13_REG(i)          (REG_SPI_MEM_BASE(i) + 0x8C)
+/* SPI_MEM_BUF13 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF13    0xFFFFFFFF
+#define SPI_MEM_BUF13_M  ((SPI_MEM_BUF13_V)<<(SPI_MEM_BUF13_S))
+#define SPI_MEM_BUF13_V  0xFFFFFFFF
+#define SPI_MEM_BUF13_S  0
+
+#define SPI_MEM_W14_REG(i)          (REG_SPI_MEM_BASE(i) + 0x90)
+/* SPI_MEM_BUF14 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF14    0xFFFFFFFF
+#define SPI_MEM_BUF14_M  ((SPI_MEM_BUF14_V)<<(SPI_MEM_BUF14_S))
+#define SPI_MEM_BUF14_V  0xFFFFFFFF
+#define SPI_MEM_BUF14_S  0
+
+#define SPI_MEM_W15_REG(i)          (REG_SPI_MEM_BASE(i) + 0x94)
+/* SPI_MEM_BUF15 : R/W/SS ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: data buffer.*/
+#define SPI_MEM_BUF15    0xFFFFFFFF
+#define SPI_MEM_BUF15_M  ((SPI_MEM_BUF15_V)<<(SPI_MEM_BUF15_S))
+#define SPI_MEM_BUF15_V  0xFFFFFFFF
+#define SPI_MEM_BUF15_S  0
+
+#define SPI_MEM_FLASH_WAITI_CTRL_REG(i)          (REG_SPI_MEM_BASE(i) + 0x98)
+/* SPI_MEM_WAITI_DUMMY_CYCLELEN : R/W ;bitpos:[15:10] ;default: 6'h0 ; */
+/*description: The dummy cycle length when wait flash idle(RDSR)..*/
+#define SPI_MEM_WAITI_DUMMY_CYCLELEN    0x0000003F
+#define SPI_MEM_WAITI_DUMMY_CYCLELEN_M  ((SPI_MEM_WAITI_DUMMY_CYCLELEN_V)<<(SPI_MEM_WAITI_DUMMY_CYCLELEN_S))
+#define SPI_MEM_WAITI_DUMMY_CYCLELEN_V  0x3F
+#define SPI_MEM_WAITI_DUMMY_CYCLELEN_S  10
+/* SPI_MEM_WAITI_CMD : R/W ;bitpos:[9:2] ;default: 8'h05 ; */
+/*description: The command value of auto wait flash idle transfer(RDSR)..*/
+#define SPI_MEM_WAITI_CMD    0x000000FF
+#define SPI_MEM_WAITI_CMD_M  ((SPI_MEM_WAITI_CMD_V)<<(SPI_MEM_WAITI_CMD_S))
+#define SPI_MEM_WAITI_CMD_V  0xFF
+#define SPI_MEM_WAITI_CMD_S  2
+/* SPI_MEM_WAITI_DUMMY : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to enable DUMMY phase in auto wait flash idle transfer(RDSR)..*/
+#define SPI_MEM_WAITI_DUMMY    (BIT(1))
+#define SPI_MEM_WAITI_DUMMY_M  (BIT(1))
+#define SPI_MEM_WAITI_DUMMY_V  0x1
+#define SPI_MEM_WAITI_DUMMY_S  1
+/* SPI_MEM_WAITI_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to enable auto-waiting flash idle operation when PP/SE/BE/CE/WRSR/P
+ES command is sent..*/
+#define SPI_MEM_WAITI_EN    (BIT(0))
+#define SPI_MEM_WAITI_EN_M  (BIT(0))
+#define SPI_MEM_WAITI_EN_V  0x1
+#define SPI_MEM_WAITI_EN_S  0
+
+#define SPI_MEM_FLASH_SUS_CMD_REG(i)          (REG_SPI_MEM_BASE(i) + 0x9C)
+/* SPI_MEM_PESR_IDLE_EN : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: 1: Separate PER flash wait idle and PES flash wait idle. 0: Not separate..*/
+#define SPI_MEM_PESR_IDLE_EN    (BIT(5))
+#define SPI_MEM_PESR_IDLE_EN_M  (BIT(5))
+#define SPI_MEM_PESR_IDLE_EN_V  0x1
+#define SPI_MEM_PESR_IDLE_EN_S  5
+/* SPI_MEM_PES_PER_EN : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to enable PES transfer trigger PES transfer option..*/
+#define SPI_MEM_PES_PER_EN    (BIT(4))
+#define SPI_MEM_PES_PER_EN_M  (BIT(4))
+#define SPI_MEM_PES_PER_EN_V  0x1
+#define SPI_MEM_PES_PER_EN_S  4
+/* SPI_MEM_FLASH_PES_WAIT_EN : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to add delay time after program erase suspend(PES) command is sent..*/
+#define SPI_MEM_FLASH_PES_WAIT_EN    (BIT(3))
+#define SPI_MEM_FLASH_PES_WAIT_EN_M  (BIT(3))
+#define SPI_MEM_FLASH_PES_WAIT_EN_V  0x1
+#define SPI_MEM_FLASH_PES_WAIT_EN_S  3
+/* SPI_MEM_FLASH_PER_WAIT_EN : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to add delay time after program erase resume(PER) is sent..*/
+#define SPI_MEM_FLASH_PER_WAIT_EN    (BIT(2))
+#define SPI_MEM_FLASH_PER_WAIT_EN_M  (BIT(2))
+#define SPI_MEM_FLASH_PER_WAIT_EN_V  0x1
+#define SPI_MEM_FLASH_PER_WAIT_EN_S  2
+/* SPI_MEM_FLASH_PES : R/W/SS/SC ;bitpos:[1] ;default: 1'b0 ; */
+/*description: program erase suspend bit, program erase suspend operation will be triggered whe
+n the bit is set. The bit will be cleared once the operation done.1: enable 0: d
+isable. .*/
+#define SPI_MEM_FLASH_PES    (BIT(1))
+#define SPI_MEM_FLASH_PES_M  (BIT(1))
+#define SPI_MEM_FLASH_PES_V  0x1
+#define SPI_MEM_FLASH_PES_S  1
+/* SPI_MEM_FLASH_PER : R/W/SS/SC ;bitpos:[0] ;default: 1'b0 ; */
+/*description: program erase resume bit, program erase suspend operation will be triggered when
+ the bit is set. The bit will be cleared once the operation done.1: enable 0: di
+sable. .*/
+#define SPI_MEM_FLASH_PER    (BIT(0))
+#define SPI_MEM_FLASH_PER_M  (BIT(0))
+#define SPI_MEM_FLASH_PER_V  0x1
+#define SPI_MEM_FLASH_PER_S  0
+
+#define SPI_MEM_FLASH_SUS_CTRL_REG(i)          (REG_SPI_MEM_BASE(i) + 0xA0)
+/* SPI_MEM_FLASH_PES_COMMAND : R/W ;bitpos:[16:9] ;default: 8'h75 ; */
+/*description: Program/Erase suspend command value..*/
+#define SPI_MEM_FLASH_PES_COMMAND    0x000000FF
+#define SPI_MEM_FLASH_PES_COMMAND_M  ((SPI_MEM_FLASH_PES_COMMAND_V)<<(SPI_MEM_FLASH_PES_COMMAND_S))
+#define SPI_MEM_FLASH_PES_COMMAND_V  0xFF
+#define SPI_MEM_FLASH_PES_COMMAND_S  9
+/* SPI_MEM_FLASH_PER_COMMAND : R/W ;bitpos:[8:1] ;default: 8'h7a ; */
+/*description: Program/Erase resume command value..*/
+#define SPI_MEM_FLASH_PER_COMMAND    0x000000FF
+#define SPI_MEM_FLASH_PER_COMMAND_M  ((SPI_MEM_FLASH_PER_COMMAND_V)<<(SPI_MEM_FLASH_PER_COMMAND_S))
+#define SPI_MEM_FLASH_PER_COMMAND_V  0xFF
+#define SPI_MEM_FLASH_PER_COMMAND_S  1
+/* SPI_MEM_FLASH_PES_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to enable auto-suspend function..*/
+#define SPI_MEM_FLASH_PES_EN    (BIT(0))
+#define SPI_MEM_FLASH_PES_EN_M  (BIT(0))
+#define SPI_MEM_FLASH_PES_EN_V  0x1
+#define SPI_MEM_FLASH_PES_EN_S  0
+
+#define SPI_MEM_SUS_STATUS_REG(i)          (REG_SPI_MEM_BASE(i) + 0xA4)
+/* SPI_MEM_FLASH_PES_DLY_256 : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Valid when SPI_MEM_FLASH_PES_WAIT_EN is 1. 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_
+RES[9:0] * 256) SPI_CLK cycles after PES command is sent. 0: SPI1 waits (SPI_MEM
+_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after PES command is sent..*/
+#define SPI_MEM_FLASH_PES_DLY_256    (BIT(6))
+#define SPI_MEM_FLASH_PES_DLY_256_M  (BIT(6))
+#define SPI_MEM_FLASH_PES_DLY_256_V  0x1
+#define SPI_MEM_FLASH_PES_DLY_256_S  6
+/* SPI_MEM_FLASH_PER_DLY_256 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Valid when SPI_MEM_FLASH_PER_WAIT_EN is 1. 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_
+RES[9:0] * 256) SPI_CLK cycles after PER command is sent. 0: SPI1 waits (SPI_MEM
+_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after PER command is sent..*/
+#define SPI_MEM_FLASH_PER_DLY_256    (BIT(5))
+#define SPI_MEM_FLASH_PER_DLY_256_M  (BIT(5))
+#define SPI_MEM_FLASH_PER_DLY_256_V  0x1
+#define SPI_MEM_FLASH_PER_DLY_256_S  5
+/* SPI_MEM_FLASH_DP_DLY_256 : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 256) SPI_CLK cycles after DP com
+mand is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles
+after DP command is sent..*/
+#define SPI_MEM_FLASH_DP_DLY_256    (BIT(4))
+#define SPI_MEM_FLASH_DP_DLY_256_M  (BIT(4))
+#define SPI_MEM_FLASH_DP_DLY_256_V  0x1
+#define SPI_MEM_FLASH_DP_DLY_256_S  4
+/* SPI_MEM_FLASH_RES_DLY_256 : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 256) SPI_CLK cycles after RES co
+mmand is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles
+ after RES command is sent..*/
+#define SPI_MEM_FLASH_RES_DLY_256    (BIT(3))
+#define SPI_MEM_FLASH_RES_DLY_256_M  (BIT(3))
+#define SPI_MEM_FLASH_RES_DLY_256_V  0x1
+#define SPI_MEM_FLASH_RES_DLY_256_S  3
+/* SPI_MEM_FLASH_HPM_DLY_256 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 256) SPI_CLK cycles after HPM co
+mmand is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles
+ after HPM command is sent..*/
+#define SPI_MEM_FLASH_HPM_DLY_256    (BIT(2))
+#define SPI_MEM_FLASH_HPM_DLY_256_M  (BIT(2))
+#define SPI_MEM_FLASH_HPM_DLY_256_V  0x1
+#define SPI_MEM_FLASH_HPM_DLY_256_S  2
+/* SPI_MEM_FLASH_SUS : R/W/SS/SC ;bitpos:[0] ;default: 1'h0 ; */
+/*description: The status of flash suspend. This bit is set when PES command is sent, and clear
+ed when PER is sent. Only used in SPI1..*/
+#define SPI_MEM_FLASH_SUS    (BIT(0))
+#define SPI_MEM_FLASH_SUS_M  (BIT(0))
+#define SPI_MEM_FLASH_SUS_V  0x1
+#define SPI_MEM_FLASH_SUS_S  0
+
+#define SPI_MEM_TIMING_CALI_REG(i)          (REG_SPI_MEM_BASE(i) + 0xA8)
+/* SPI_MEM_EXTRA_DUMMY_CYCLELEN : R/W ;bitpos:[4:2] ;default: 3'd0 ; */
+/*description: Extra SPI_CLK cycles added in DUMMY phase for timing compensation. Active when S
+PI_MEM_TIMING_CALI bit is set..*/
+#define SPI_MEM_EXTRA_DUMMY_CYCLELEN    0x00000007
+#define SPI_MEM_EXTRA_DUMMY_CYCLELEN_M  ((SPI_MEM_EXTRA_DUMMY_CYCLELEN_V)<<(SPI_MEM_EXTRA_DUMMY_CYCLELEN_S))
+#define SPI_MEM_EXTRA_DUMMY_CYCLELEN_V  0x7
+#define SPI_MEM_EXTRA_DUMMY_CYCLELEN_S  2
+/* SPI_MEM_TIMING_CALI : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to add extra SPI_CLK cycles in DUMMY phase for all reading operatio
+ns..*/
+#define SPI_MEM_TIMING_CALI    (BIT(1))
+#define SPI_MEM_TIMING_CALI_M  (BIT(1))
+#define SPI_MEM_TIMING_CALI_V  0x1
+#define SPI_MEM_TIMING_CALI_S  1
+/* SPI_MEM_TIMING_CLK_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to power on HCLK. When PLL is powered on, the frequency of HCLK equ
+als to that of PLL. Otherwise, the frequency equals to that of XTAL..*/
+#define SPI_MEM_TIMING_CLK_ENA    (BIT(0))
+#define SPI_MEM_TIMING_CLK_ENA_M  (BIT(0))
+#define SPI_MEM_TIMING_CLK_ENA_V  0x1
+#define SPI_MEM_TIMING_CLK_ENA_S  0
+
+#define SPI_MEM_DIN_MODE_REG(i)          (REG_SPI_MEM_BASE(i) + 0xAC)
+/* SPI_MEM_DINS_MODE : R/W ;bitpos:[26:24] ;default: 3'h0 ; */
+/*description: SPI_DQS input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DINS_NUM+1) cycles
+at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DINS_NUM+1) cycles at HCLK
+ positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_M
+EM_DINS_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negat
+ive edge. 4: Delay for (SPI_MEM_DINS_NUM+1) cycles at HCLK negative edge and one
+ cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DINS_NUM+1) cycles
+at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_DINS_MODE    0x00000007
+#define SPI_MEM_DINS_MODE_M  ((SPI_MEM_DINS_MODE_V)<<(SPI_MEM_DINS_MODE_S))
+#define SPI_MEM_DINS_MODE_V  0x7
+#define SPI_MEM_DINS_MODE_S  24
+/* SPI_MEM_DIN7_MODE : R/W ;bitpos:[23:21] ;default: 3'h0 ; */
+/*description: SPI_IO7 input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles
+ at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HC
+LK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI
+_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK ne
+gative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and
+ one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cy
+cles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_DIN7_MODE    0x00000007
+#define SPI_MEM_DIN7_MODE_M  ((SPI_MEM_DIN7_MODE_V)<<(SPI_MEM_DIN7_MODE_S))
+#define SPI_MEM_DIN7_MODE_V  0x7
+#define SPI_MEM_DIN7_MODE_S  21
+/* SPI_MEM_DIN6_MODE : R/W ;bitpos:[20:18] ;default: 3'h0 ; */
+/*description: SPI_IO6 input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles
+ at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HC
+LK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI
+_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK ne
+gative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and
+ one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cy
+cles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_DIN6_MODE    0x00000007
+#define SPI_MEM_DIN6_MODE_M  ((SPI_MEM_DIN6_MODE_V)<<(SPI_MEM_DIN6_MODE_S))
+#define SPI_MEM_DIN6_MODE_V  0x7
+#define SPI_MEM_DIN6_MODE_S  18
+/* SPI_MEM_DIN5_MODE : R/W ;bitpos:[17:15] ;default: 3'h0 ; */
+/*description: SPI_IO5 input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles
+ at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HC
+LK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI
+_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK ne
+gative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and
+ one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cy
+cles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_DIN5_MODE    0x00000007
+#define SPI_MEM_DIN5_MODE_M  ((SPI_MEM_DIN5_MODE_V)<<(SPI_MEM_DIN5_MODE_S))
+#define SPI_MEM_DIN5_MODE_V  0x7
+#define SPI_MEM_DIN5_MODE_S  15
+/* SPI_MEM_DIN4_MODE : R/W ;bitpos:[14:12] ;default: 3'h0 ; */
+/*description: SPI_IO4 input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles
+ at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HC
+LK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI
+_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK ne
+gative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and
+ one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cy
+cles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_DIN4_MODE    0x00000007
+#define SPI_MEM_DIN4_MODE_M  ((SPI_MEM_DIN4_MODE_V)<<(SPI_MEM_DIN4_MODE_S))
+#define SPI_MEM_DIN4_MODE_V  0x7
+#define SPI_MEM_DIN4_MODE_S  12
+/* SPI_MEM_DIN3_MODE : R/W ;bitpos:[11:9] ;default: 3'h0 ; */
+/*description: SPI_HD input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles
+at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCL
+K positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_
+MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK neg
+ative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and
+one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cyc
+les at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_DIN3_MODE    0x00000007
+#define SPI_MEM_DIN3_MODE_M  ((SPI_MEM_DIN3_MODE_V)<<(SPI_MEM_DIN3_MODE_S))
+#define SPI_MEM_DIN3_MODE_V  0x7
+#define SPI_MEM_DIN3_MODE_S  9
+/* SPI_MEM_DIN2_MODE : R/W ;bitpos:[8:6] ;default: 3'h0 ; */
+/*description: SPI_WP input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles
+at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCL
+K positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_
+MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK neg
+ative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and
+one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cyc
+les at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_DIN2_MODE    0x00000007
+#define SPI_MEM_DIN2_MODE_M  ((SPI_MEM_DIN2_MODE_V)<<(SPI_MEM_DIN2_MODE_S))
+#define SPI_MEM_DIN2_MODE_V  0x7
+#define SPI_MEM_DIN2_MODE_S  6
+/* SPI_MEM_DIN1_MODE : R/W ;bitpos:[5:3] ;default: 3'h0 ; */
+/*description: SPI_Q input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles a
+t MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK
+ positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_M
+EM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK nega
+tive edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and o
+ne cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cycl
+es at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_DIN1_MODE    0x00000007
+#define SPI_MEM_DIN1_MODE_M  ((SPI_MEM_DIN1_MODE_V)<<(SPI_MEM_DIN1_MODE_S))
+#define SPI_MEM_DIN1_MODE_V  0x7
+#define SPI_MEM_DIN1_MODE_S  3
+/* SPI_MEM_DIN0_MODE : R/W ;bitpos:[2:0] ;default: 3'h0 ; */
+/*description: SPI_D input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles a
+t MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK
+ positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_M
+EM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK nega
+tive edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and o
+ne cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cycl
+es at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_DIN0_MODE    0x00000007
+#define SPI_MEM_DIN0_MODE_M  ((SPI_MEM_DIN0_MODE_V)<<(SPI_MEM_DIN0_MODE_S))
+#define SPI_MEM_DIN0_MODE_V  0x7
+#define SPI_MEM_DIN0_MODE_S  0
+
+#define SPI_MEM_DIN_NUM_REG(i)          (REG_SPI_MEM_BASE(i) + 0xB0)
+/* SPI_MEM_DINS_NUM : R/W ;bitpos:[17:16] ;default: 2'h0 ; */
+/*description: SPI_DQS input delay number..*/
+#define SPI_MEM_DINS_NUM    0x00000003
+#define SPI_MEM_DINS_NUM_M  ((SPI_MEM_DINS_NUM_V)<<(SPI_MEM_DINS_NUM_S))
+#define SPI_MEM_DINS_NUM_V  0x3
+#define SPI_MEM_DINS_NUM_S  16
+/* SPI_MEM_DIN7_NUM : R/W ;bitpos:[15:14] ;default: 2'h0 ; */
+/*description: SPI_IO7 input delay number..*/
+#define SPI_MEM_DIN7_NUM    0x00000003
+#define SPI_MEM_DIN7_NUM_M  ((SPI_MEM_DIN7_NUM_V)<<(SPI_MEM_DIN7_NUM_S))
+#define SPI_MEM_DIN7_NUM_V  0x3
+#define SPI_MEM_DIN7_NUM_S  14
+/* SPI_MEM_DIN6_NUM : R/W ;bitpos:[13:12] ;default: 2'h0 ; */
+/*description: SPI_IO6 input delay number..*/
+#define SPI_MEM_DIN6_NUM    0x00000003
+#define SPI_MEM_DIN6_NUM_M  ((SPI_MEM_DIN6_NUM_V)<<(SPI_MEM_DIN6_NUM_S))
+#define SPI_MEM_DIN6_NUM_V  0x3
+#define SPI_MEM_DIN6_NUM_S  12
+/* SPI_MEM_DIN5_NUM : R/W ;bitpos:[11:10] ;default: 2'h0 ; */
+/*description: SPI_IO5 input delay number..*/
+#define SPI_MEM_DIN5_NUM    0x00000003
+#define SPI_MEM_DIN5_NUM_M  ((SPI_MEM_DIN5_NUM_V)<<(SPI_MEM_DIN5_NUM_S))
+#define SPI_MEM_DIN5_NUM_V  0x3
+#define SPI_MEM_DIN5_NUM_S  10
+/* SPI_MEM_DIN4_NUM : R/W ;bitpos:[9:8] ;default: 2'h0 ; */
+/*description: SPI_IO4 input delay number..*/
+#define SPI_MEM_DIN4_NUM    0x00000003
+#define SPI_MEM_DIN4_NUM_M  ((SPI_MEM_DIN4_NUM_V)<<(SPI_MEM_DIN4_NUM_S))
+#define SPI_MEM_DIN4_NUM_V  0x3
+#define SPI_MEM_DIN4_NUM_S  8
+/* SPI_MEM_DIN3_NUM : R/W ;bitpos:[7:6] ;default: 2'h0 ; */
+/*description: SPI_HD input delay number..*/
+#define SPI_MEM_DIN3_NUM    0x00000003
+#define SPI_MEM_DIN3_NUM_M  ((SPI_MEM_DIN3_NUM_V)<<(SPI_MEM_DIN3_NUM_S))
+#define SPI_MEM_DIN3_NUM_V  0x3
+#define SPI_MEM_DIN3_NUM_S  6
+/* SPI_MEM_DIN2_NUM : R/W ;bitpos:[5:4] ;default: 2'h0 ; */
+/*description: SPI_WP input delay number..*/
+#define SPI_MEM_DIN2_NUM    0x00000003
+#define SPI_MEM_DIN2_NUM_M  ((SPI_MEM_DIN2_NUM_V)<<(SPI_MEM_DIN2_NUM_S))
+#define SPI_MEM_DIN2_NUM_V  0x3
+#define SPI_MEM_DIN2_NUM_S  4
+/* SPI_MEM_DIN1_NUM : R/W ;bitpos:[3:2] ;default: 2'h0 ; */
+/*description: SPI_Q input delay number..*/
+#define SPI_MEM_DIN1_NUM    0x00000003
+#define SPI_MEM_DIN1_NUM_M  ((SPI_MEM_DIN1_NUM_V)<<(SPI_MEM_DIN1_NUM_S))
+#define SPI_MEM_DIN1_NUM_V  0x3
+#define SPI_MEM_DIN1_NUM_S  2
+/* SPI_MEM_DIN0_NUM : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: SPI_D input delay number..*/
+#define SPI_MEM_DIN0_NUM    0x00000003
+#define SPI_MEM_DIN0_NUM_M  ((SPI_MEM_DIN0_NUM_V)<<(SPI_MEM_DIN0_NUM_S))
+#define SPI_MEM_DIN0_NUM_V  0x3
+#define SPI_MEM_DIN0_NUM_S  0
+
+#define SPI_MEM_DOUT_MODE_REG(i)          (REG_SPI_MEM_BASE(i) + 0xB4)
+/* SPI_MEM_DOUTS_MODE : R/W ;bitpos:[8] ;default: 1'h0 ; */
+/*description: SPI_DQS output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK nega
+tive edge..*/
+#define SPI_MEM_DOUTS_MODE    (BIT(8))
+#define SPI_MEM_DOUTS_MODE_M  (BIT(8))
+#define SPI_MEM_DOUTS_MODE_V  0x1
+#define SPI_MEM_DOUTS_MODE_S  8
+/* SPI_MEM_DOUT7_MODE : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: SPI_IO7 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK nega
+tive edge..*/
+#define SPI_MEM_DOUT7_MODE    (BIT(7))
+#define SPI_MEM_DOUT7_MODE_M  (BIT(7))
+#define SPI_MEM_DOUT7_MODE_V  0x1
+#define SPI_MEM_DOUT7_MODE_S  7
+/* SPI_MEM_DOUT6_MODE : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: SPI_IO6 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK nega
+tive edge..*/
+#define SPI_MEM_DOUT6_MODE    (BIT(6))
+#define SPI_MEM_DOUT6_MODE_M  (BIT(6))
+#define SPI_MEM_DOUT6_MODE_V  0x1
+#define SPI_MEM_DOUT6_MODE_S  6
+/* SPI_MEM_DOUT5_MODE : R/W ;bitpos:[5] ;default: 1'h0 ; */
+/*description: SPI_IO5 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK nega
+tive edge..*/
+#define SPI_MEM_DOUT5_MODE    (BIT(5))
+#define SPI_MEM_DOUT5_MODE_M  (BIT(5))
+#define SPI_MEM_DOUT5_MODE_V  0x1
+#define SPI_MEM_DOUT5_MODE_S  5
+/* SPI_MEM_DOUT4_MODE : R/W ;bitpos:[4] ;default: 1'h0 ; */
+/*description: SPI_IO4 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK nega
+tive edge..*/
+#define SPI_MEM_DOUT4_MODE    (BIT(4))
+#define SPI_MEM_DOUT4_MODE_M  (BIT(4))
+#define SPI_MEM_DOUT4_MODE_V  0x1
+#define SPI_MEM_DOUT4_MODE_S  4
+/* SPI_MEM_DOUT3_MODE : R/W ;bitpos:[3] ;default: 1'h0 ; */
+/*description: SPI_HD output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negat
+ive edge..*/
+#define SPI_MEM_DOUT3_MODE    (BIT(3))
+#define SPI_MEM_DOUT3_MODE_M  (BIT(3))
+#define SPI_MEM_DOUT3_MODE_V  0x1
+#define SPI_MEM_DOUT3_MODE_S  3
+/* SPI_MEM_DOUT2_MODE : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: SPI_WP output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negat
+ive edge..*/
+#define SPI_MEM_DOUT2_MODE    (BIT(2))
+#define SPI_MEM_DOUT2_MODE_M  (BIT(2))
+#define SPI_MEM_DOUT2_MODE_V  0x1
+#define SPI_MEM_DOUT2_MODE_S  2
+/* SPI_MEM_DOUT1_MODE : R/W ;bitpos:[1] ;default: 1'h0 ; */
+/*description: SPI_Q output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negati
+ve edge..*/
+#define SPI_MEM_DOUT1_MODE    (BIT(1))
+#define SPI_MEM_DOUT1_MODE_M  (BIT(1))
+#define SPI_MEM_DOUT1_MODE_V  0x1
+#define SPI_MEM_DOUT1_MODE_S  1
+/* SPI_MEM_DOUT0_MODE : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: SPI_D output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negati
+ve edge..*/
+#define SPI_MEM_DOUT0_MODE    (BIT(0))
+#define SPI_MEM_DOUT0_MODE_M  (BIT(0))
+#define SPI_MEM_DOUT0_MODE_V  0x1
+#define SPI_MEM_DOUT0_MODE_S  0
+
+#define SPI_MEM_SPI_SMEM_TIMING_CALI_REG(i)          (REG_SPI_MEM_BASE(i) + 0xBC)
+/* SPI_MEM_SPI_SMEM_EXTRA_DUMMY_CYCLELEN : R/W ;bitpos:[4:2] ;default: 3'd0 ; */
+/*description: Extra SPI_CLK cycles added in DUMMY phase for timing compensation, when SPI0 acc
+esses to Ext_RAM. Active when SPI_SMEM_TIMING_CALI bit is set..*/
+#define SPI_MEM_SPI_SMEM_EXTRA_DUMMY_CYCLELEN    0x00000007
+#define SPI_MEM_SPI_SMEM_EXTRA_DUMMY_CYCLELEN_M  ((SPI_MEM_SPI_SMEM_EXTRA_DUMMY_CYCLELEN_V)<<(SPI_MEM_SPI_SMEM_EXTRA_DUMMY_CYCLELEN_S))
+#define SPI_MEM_SPI_SMEM_EXTRA_DUMMY_CYCLELEN_V  0x7
+#define SPI_MEM_SPI_SMEM_EXTRA_DUMMY_CYCLELEN_S  2
+/* SPI_MEM_SPI_SMEM_TIMING_CALI : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to add extra SPI_CLK cycles in DUMMY phase for all reading operatio
+ns..*/
+#define SPI_MEM_SPI_SMEM_TIMING_CALI    (BIT(1))
+#define SPI_MEM_SPI_SMEM_TIMING_CALI_M  (BIT(1))
+#define SPI_MEM_SPI_SMEM_TIMING_CALI_V  0x1
+#define SPI_MEM_SPI_SMEM_TIMING_CALI_S  1
+/* SPI_MEM_SPI_SMEM_TIMING_CLK_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to power on HCLK. When PLL is powered on, the frequency of HCLK equ
+als to that of PLL. Otherwise, the frequency equals to that of XTAL..*/
+#define SPI_MEM_SPI_SMEM_TIMING_CLK_ENA    (BIT(0))
+#define SPI_MEM_SPI_SMEM_TIMING_CLK_ENA_M  (BIT(0))
+#define SPI_MEM_SPI_SMEM_TIMING_CLK_ENA_V  0x1
+#define SPI_MEM_SPI_SMEM_TIMING_CLK_ENA_S  0
+
+#define SPI_MEM_SPI_SMEM_DIN_MODE_REG(i)          (REG_SPI_MEM_BASE(i) + 0xC0)
+/* SPI_MEM_SPI_SMEM_DINS_MODE : R/W ;bitpos:[26:24] ;default: 3'h0 ; */
+/*description: SPI_DQS input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DINS_NUM+1) cycles
+ at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DINS_NUM+1) cycles at HC
+LK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI
+_SMEM_DINS_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK ne
+gative edge. 4: Delay for (SPI_SMEM_DINS_NUM+1) cycles at HCLK negative edge and
+ one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DINS_NUM+1) cy
+cles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_SPI_SMEM_DINS_MODE    0x00000007
+#define SPI_MEM_SPI_SMEM_DINS_MODE_M  ((SPI_MEM_SPI_SMEM_DINS_MODE_V)<<(SPI_MEM_SPI_SMEM_DINS_MODE_S))
+#define SPI_MEM_SPI_SMEM_DINS_MODE_V  0x7
+#define SPI_MEM_SPI_SMEM_DINS_MODE_S  24
+/* SPI_MEM_SPI_SMEM_DIN7_MODE : R/W ;bitpos:[23:21] ;default: 3'h0 ; */
+/*description: SPI_IO7 input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycle
+s at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at
+HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (S
+PI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK
+ negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge
+ and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+
+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_SPI_SMEM_DIN7_MODE    0x00000007
+#define SPI_MEM_SPI_SMEM_DIN7_MODE_M  ((SPI_MEM_SPI_SMEM_DIN7_MODE_V)<<(SPI_MEM_SPI_SMEM_DIN7_MODE_S))
+#define SPI_MEM_SPI_SMEM_DIN7_MODE_V  0x7
+#define SPI_MEM_SPI_SMEM_DIN7_MODE_S  21
+/* SPI_MEM_SPI_SMEM_DIN6_MODE : R/W ;bitpos:[20:18] ;default: 3'h0 ; */
+/*description: SPI_IO6 input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycle
+s at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at
+HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (S
+PI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK
+ negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge
+ and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+
+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_SPI_SMEM_DIN6_MODE    0x00000007
+#define SPI_MEM_SPI_SMEM_DIN6_MODE_M  ((SPI_MEM_SPI_SMEM_DIN6_MODE_V)<<(SPI_MEM_SPI_SMEM_DIN6_MODE_S))
+#define SPI_MEM_SPI_SMEM_DIN6_MODE_V  0x7
+#define SPI_MEM_SPI_SMEM_DIN6_MODE_S  18
+/* SPI_MEM_SPI_SMEM_DIN5_MODE : R/W ;bitpos:[17:15] ;default: 3'h0 ; */
+/*description: SPI_IO5 input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycle
+s at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at
+HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (S
+PI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK
+ negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge
+ and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+
+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_SPI_SMEM_DIN5_MODE    0x00000007
+#define SPI_MEM_SPI_SMEM_DIN5_MODE_M  ((SPI_MEM_SPI_SMEM_DIN5_MODE_V)<<(SPI_MEM_SPI_SMEM_DIN5_MODE_S))
+#define SPI_MEM_SPI_SMEM_DIN5_MODE_V  0x7
+#define SPI_MEM_SPI_SMEM_DIN5_MODE_S  15
+/* SPI_MEM_SPI_SMEM_DIN4_MODE : R/W ;bitpos:[14:12] ;default: 3'h0 ; */
+/*description: SPI_IO4 input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycle
+s at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at
+HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (S
+PI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK
+ negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge
+ and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+
+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_SPI_SMEM_DIN4_MODE    0x00000007
+#define SPI_MEM_SPI_SMEM_DIN4_MODE_M  ((SPI_MEM_SPI_SMEM_DIN4_MODE_V)<<(SPI_MEM_SPI_SMEM_DIN4_MODE_S))
+#define SPI_MEM_SPI_SMEM_DIN4_MODE_V  0x7
+#define SPI_MEM_SPI_SMEM_DIN4_MODE_S  12
+/* SPI_MEM_SPI_SMEM_DIN3_MODE : R/W ;bitpos:[11:9] ;default: 3'h0 ; */
+/*description: SPI_HD input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles
+ at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at H
+CLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SP
+I_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK
+negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge
+and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1
+) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_SPI_SMEM_DIN3_MODE    0x00000007
+#define SPI_MEM_SPI_SMEM_DIN3_MODE_M  ((SPI_MEM_SPI_SMEM_DIN3_MODE_V)<<(SPI_MEM_SPI_SMEM_DIN3_MODE_S))
+#define SPI_MEM_SPI_SMEM_DIN3_MODE_V  0x7
+#define SPI_MEM_SPI_SMEM_DIN3_MODE_S  9
+/* SPI_MEM_SPI_SMEM_DIN2_MODE : R/W ;bitpos:[8:6] ;default: 3'h0 ; */
+/*description: SPI_WP input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles
+ at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at H
+CLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SP
+I_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK
+negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge
+and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1
+) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_SPI_SMEM_DIN2_MODE    0x00000007
+#define SPI_MEM_SPI_SMEM_DIN2_MODE_M  ((SPI_MEM_SPI_SMEM_DIN2_MODE_V)<<(SPI_MEM_SPI_SMEM_DIN2_MODE_S))
+#define SPI_MEM_SPI_SMEM_DIN2_MODE_V  0x7
+#define SPI_MEM_SPI_SMEM_DIN2_MODE_S  6
+/* SPI_MEM_SPI_SMEM_DIN1_MODE : R/W ;bitpos:[5:3] ;default: 3'h0 ; */
+/*description: SPI_Q input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles
+at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HC
+LK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI
+_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK n
+egative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge a
+nd one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1)
+ cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_SPI_SMEM_DIN1_MODE    0x00000007
+#define SPI_MEM_SPI_SMEM_DIN1_MODE_M  ((SPI_MEM_SPI_SMEM_DIN1_MODE_V)<<(SPI_MEM_SPI_SMEM_DIN1_MODE_S))
+#define SPI_MEM_SPI_SMEM_DIN1_MODE_V  0x7
+#define SPI_MEM_SPI_SMEM_DIN1_MODE_S  3
+/* SPI_MEM_SPI_SMEM_DIN0_MODE : R/W ;bitpos:[2:0] ;default: 3'h0 ; */
+/*description: SPI_D input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles
+at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HC
+LK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI
+_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK n
+egative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge a
+nd one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1)
+ cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge..*/
+#define SPI_MEM_SPI_SMEM_DIN0_MODE    0x00000007
+#define SPI_MEM_SPI_SMEM_DIN0_MODE_M  ((SPI_MEM_SPI_SMEM_DIN0_MODE_V)<<(SPI_MEM_SPI_SMEM_DIN0_MODE_S))
+#define SPI_MEM_SPI_SMEM_DIN0_MODE_V  0x7
+#define SPI_MEM_SPI_SMEM_DIN0_MODE_S  0
+
+#define SPI_MEM_SPI_SMEM_DIN_NUM_REG(i)          (REG_SPI_MEM_BASE(i) + 0xC4)
+/* SPI_MEM_SPI_SMEM_DINS_NUM : R/W ;bitpos:[17:16] ;default: 2'h0 ; */
+/*description: SPI_DQS input delay number..*/
+#define SPI_MEM_SPI_SMEM_DINS_NUM    0x00000003
+#define SPI_MEM_SPI_SMEM_DINS_NUM_M  ((SPI_MEM_SPI_SMEM_DINS_NUM_V)<<(SPI_MEM_SPI_SMEM_DINS_NUM_S))
+#define SPI_MEM_SPI_SMEM_DINS_NUM_V  0x3
+#define SPI_MEM_SPI_SMEM_DINS_NUM_S  16
+/* SPI_MEM_SPI_SMEM_DIN7_NUM : R/W ;bitpos:[15:14] ;default: 2'h0 ; */
+/*description: SPI_IO7 input delay number..*/
+#define SPI_MEM_SPI_SMEM_DIN7_NUM    0x00000003
+#define SPI_MEM_SPI_SMEM_DIN7_NUM_M  ((SPI_MEM_SPI_SMEM_DIN7_NUM_V)<<(SPI_MEM_SPI_SMEM_DIN7_NUM_S))
+#define SPI_MEM_SPI_SMEM_DIN7_NUM_V  0x3
+#define SPI_MEM_SPI_SMEM_DIN7_NUM_S  14
+/* SPI_MEM_SPI_SMEM_DIN6_NUM : R/W ;bitpos:[13:12] ;default: 2'h0 ; */
+/*description: SPI_IO6 input delay number..*/
+#define SPI_MEM_SPI_SMEM_DIN6_NUM    0x00000003
+#define SPI_MEM_SPI_SMEM_DIN6_NUM_M  ((SPI_MEM_SPI_SMEM_DIN6_NUM_V)<<(SPI_MEM_SPI_SMEM_DIN6_NUM_S))
+#define SPI_MEM_SPI_SMEM_DIN6_NUM_V  0x3
+#define SPI_MEM_SPI_SMEM_DIN6_NUM_S  12
+/* SPI_MEM_SPI_SMEM_DIN5_NUM : R/W ;bitpos:[11:10] ;default: 2'h0 ; */
+/*description: SPI_IO5 input delay number..*/
+#define SPI_MEM_SPI_SMEM_DIN5_NUM    0x00000003
+#define SPI_MEM_SPI_SMEM_DIN5_NUM_M  ((SPI_MEM_SPI_SMEM_DIN5_NUM_V)<<(SPI_MEM_SPI_SMEM_DIN5_NUM_S))
+#define SPI_MEM_SPI_SMEM_DIN5_NUM_V  0x3
+#define SPI_MEM_SPI_SMEM_DIN5_NUM_S  10
+/* SPI_MEM_SPI_SMEM_DIN4_NUM : R/W ;bitpos:[9:8] ;default: 2'h0 ; */
+/*description: SPI_IO4 input delay number..*/
+#define SPI_MEM_SPI_SMEM_DIN4_NUM    0x00000003
+#define SPI_MEM_SPI_SMEM_DIN4_NUM_M  ((SPI_MEM_SPI_SMEM_DIN4_NUM_V)<<(SPI_MEM_SPI_SMEM_DIN4_NUM_S))
+#define SPI_MEM_SPI_SMEM_DIN4_NUM_V  0x3
+#define SPI_MEM_SPI_SMEM_DIN4_NUM_S  8
+/* SPI_MEM_SPI_SMEM_DIN3_NUM : R/W ;bitpos:[7:6] ;default: 2'h0 ; */
+/*description: SPI_HD input delay number..*/
+#define SPI_MEM_SPI_SMEM_DIN3_NUM    0x00000003
+#define SPI_MEM_SPI_SMEM_DIN3_NUM_M  ((SPI_MEM_SPI_SMEM_DIN3_NUM_V)<<(SPI_MEM_SPI_SMEM_DIN3_NUM_S))
+#define SPI_MEM_SPI_SMEM_DIN3_NUM_V  0x3
+#define SPI_MEM_SPI_SMEM_DIN3_NUM_S  6
+/* SPI_MEM_SPI_SMEM_DIN2_NUM : R/W ;bitpos:[5:4] ;default: 2'h0 ; */
+/*description: SPI_WP input delay number..*/
+#define SPI_MEM_SPI_SMEM_DIN2_NUM    0x00000003
+#define SPI_MEM_SPI_SMEM_DIN2_NUM_M  ((SPI_MEM_SPI_SMEM_DIN2_NUM_V)<<(SPI_MEM_SPI_SMEM_DIN2_NUM_S))
+#define SPI_MEM_SPI_SMEM_DIN2_NUM_V  0x3
+#define SPI_MEM_SPI_SMEM_DIN2_NUM_S  4
+/* SPI_MEM_SPI_SMEM_DIN1_NUM : R/W ;bitpos:[3:2] ;default: 2'h0 ; */
+/*description: SPI_Q input delay number..*/
+#define SPI_MEM_SPI_SMEM_DIN1_NUM    0x00000003
+#define SPI_MEM_SPI_SMEM_DIN1_NUM_M  ((SPI_MEM_SPI_SMEM_DIN1_NUM_V)<<(SPI_MEM_SPI_SMEM_DIN1_NUM_S))
+#define SPI_MEM_SPI_SMEM_DIN1_NUM_V  0x3
+#define SPI_MEM_SPI_SMEM_DIN1_NUM_S  2
+/* SPI_MEM_SPI_SMEM_DIN0_NUM : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: SPI_D input delay number..*/
+#define SPI_MEM_SPI_SMEM_DIN0_NUM    0x00000003
+#define SPI_MEM_SPI_SMEM_DIN0_NUM_M  ((SPI_MEM_SPI_SMEM_DIN0_NUM_V)<<(SPI_MEM_SPI_SMEM_DIN0_NUM_S))
+#define SPI_MEM_SPI_SMEM_DIN0_NUM_V  0x3
+#define SPI_MEM_SPI_SMEM_DIN0_NUM_S  0
+
+#define SPI_MEM_SPI_SMEM_DOUT_MODE_REG(i)          (REG_SPI_MEM_BASE(i) + 0xC8)
+/* SPI_MEM_SPI_SMEM_DOUTS_MODE : R/W ;bitpos:[8] ;default: 1'h0 ; */
+/*description: SPI_DQS output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK nega
+tive edge..*/
+#define SPI_MEM_SPI_SMEM_DOUTS_MODE    (BIT(8))
+#define SPI_MEM_SPI_SMEM_DOUTS_MODE_M  (BIT(8))
+#define SPI_MEM_SPI_SMEM_DOUTS_MODE_V  0x1
+#define SPI_MEM_SPI_SMEM_DOUTS_MODE_S  8
+/* SPI_MEM_SPI_SMEM_DOUT7_MODE : R/W ;bitpos:[7] ;default: 1'h0 ; */
+/*description: SPI_IO7 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK nega
+tive edge..*/
+#define SPI_MEM_SPI_SMEM_DOUT7_MODE    (BIT(7))
+#define SPI_MEM_SPI_SMEM_DOUT7_MODE_M  (BIT(7))
+#define SPI_MEM_SPI_SMEM_DOUT7_MODE_V  0x1
+#define SPI_MEM_SPI_SMEM_DOUT7_MODE_S  7
+/* SPI_MEM_SPI_SMEM_DOUT6_MODE : R/W ;bitpos:[6] ;default: 1'h0 ; */
+/*description: SPI_IO6 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK nega
+tive edge..*/
+#define SPI_MEM_SPI_SMEM_DOUT6_MODE    (BIT(6))
+#define SPI_MEM_SPI_SMEM_DOUT6_MODE_M  (BIT(6))
+#define SPI_MEM_SPI_SMEM_DOUT6_MODE_V  0x1
+#define SPI_MEM_SPI_SMEM_DOUT6_MODE_S  6
+/* SPI_MEM_SPI_SMEM_DOUT5_MODE : R/W ;bitpos:[5] ;default: 1'h0 ; */
+/*description: SPI_IO5 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK nega
+tive edge..*/
+#define SPI_MEM_SPI_SMEM_DOUT5_MODE    (BIT(5))
+#define SPI_MEM_SPI_SMEM_DOUT5_MODE_M  (BIT(5))
+#define SPI_MEM_SPI_SMEM_DOUT5_MODE_V  0x1
+#define SPI_MEM_SPI_SMEM_DOUT5_MODE_S  5
+/* SPI_MEM_SPI_SMEM_DOUT4_MODE : R/W ;bitpos:[4] ;default: 1'h0 ; */
+/*description: SPI_IO4 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK nega
+tive edge..*/
+#define SPI_MEM_SPI_SMEM_DOUT4_MODE    (BIT(4))
+#define SPI_MEM_SPI_SMEM_DOUT4_MODE_M  (BIT(4))
+#define SPI_MEM_SPI_SMEM_DOUT4_MODE_V  0x1
+#define SPI_MEM_SPI_SMEM_DOUT4_MODE_S  4
+/* SPI_MEM_SPI_SMEM_DOUT3_MODE : R/W ;bitpos:[3] ;default: 1'h0 ; */
+/*description: SPI_HD output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negat
+ive edge..*/
+#define SPI_MEM_SPI_SMEM_DOUT3_MODE    (BIT(3))
+#define SPI_MEM_SPI_SMEM_DOUT3_MODE_M  (BIT(3))
+#define SPI_MEM_SPI_SMEM_DOUT3_MODE_V  0x1
+#define SPI_MEM_SPI_SMEM_DOUT3_MODE_S  3
+/* SPI_MEM_SPI_SMEM_DOUT2_MODE : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: SPI_WP output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negat
+ive edge..*/
+#define SPI_MEM_SPI_SMEM_DOUT2_MODE    (BIT(2))
+#define SPI_MEM_SPI_SMEM_DOUT2_MODE_M  (BIT(2))
+#define SPI_MEM_SPI_SMEM_DOUT2_MODE_V  0x1
+#define SPI_MEM_SPI_SMEM_DOUT2_MODE_S  2
+/* SPI_MEM_SPI_SMEM_DOUT1_MODE : R/W ;bitpos:[1] ;default: 1'h0 ; */
+/*description: SPI_Q output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negati
+ve edge..*/
+#define SPI_MEM_SPI_SMEM_DOUT1_MODE    (BIT(1))
+#define SPI_MEM_SPI_SMEM_DOUT1_MODE_M  (BIT(1))
+#define SPI_MEM_SPI_SMEM_DOUT1_MODE_V  0x1
+#define SPI_MEM_SPI_SMEM_DOUT1_MODE_S  1
+/* SPI_MEM_SPI_SMEM_DOUT0_MODE : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: SPI_D output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negati
+ve edge..*/
+#define SPI_MEM_SPI_SMEM_DOUT0_MODE    (BIT(0))
+#define SPI_MEM_SPI_SMEM_DOUT0_MODE_M  (BIT(0))
+#define SPI_MEM_SPI_SMEM_DOUT0_MODE_V  0x1
+#define SPI_MEM_SPI_SMEM_DOUT0_MODE_S  0
+
+#define SPI_MEM_ECC_CTRL_REG(i)          (REG_SPI_MEM_BASE(i) + 0xCC)
+/* SPI_MEM_SPI_FMEM_ECC_ERR_INT_EN : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set this bit to calculate the error times of MSPI ECC read when accesses to flas
+h..*/
+#define SPI_MEM_SPI_FMEM_ECC_ERR_INT_EN    (BIT(8))
+#define SPI_MEM_SPI_FMEM_ECC_ERR_INT_EN_M  (BIT(8))
+#define SPI_MEM_SPI_FMEM_ECC_ERR_INT_EN_V  0x1
+#define SPI_MEM_SPI_FMEM_ECC_ERR_INT_EN_S  8
+/* SPI_MEM_ECC_ERR_INT_NUM : R/W ;bitpos:[7:0] ;default: 8'd10 ; */
+/*description: Set the error times of MSPI ECC read to generate MSPI SPI_MEM_ECC_ERR_INT interr
+upt..*/
+#define SPI_MEM_ECC_ERR_INT_NUM    0x000000FF
+#define SPI_MEM_ECC_ERR_INT_NUM_M  ((SPI_MEM_ECC_ERR_INT_NUM_V)<<(SPI_MEM_ECC_ERR_INT_NUM_S))
+#define SPI_MEM_ECC_ERR_INT_NUM_V  0xFF
+#define SPI_MEM_ECC_ERR_INT_NUM_S  0
+
+#define SPI_MEM_ECC_ERR_ADDR_REG(i)          (REG_SPI_MEM_BASE(i) + 0xD0)
+/* SPI_MEM_ECC_ERR_ADDR : R/SS/WTC ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: These bits show the first MSPI ECC error address when SPI_FMEM_ECC_ERR_INT_EN/SP
+I_SMEM_ECC_ERR_INT_EN is set and accessed to flash/Ext_RAM, including ECC byte e
+rror and data error. It is cleared by when  SPI_MEM_ECC_ERR_INT_CLR bit is set. .*/
+#define SPI_MEM_ECC_ERR_ADDR    0xFFFFFFFF
+#define SPI_MEM_ECC_ERR_ADDR_M  ((SPI_MEM_ECC_ERR_ADDR_V)<<(SPI_MEM_ECC_ERR_ADDR_S))
+#define SPI_MEM_ECC_ERR_ADDR_V  0xFFFFFFFF
+#define SPI_MEM_ECC_ERR_ADDR_S  0
+
+#define SPI_MEM_ECC_ERR_BIT_REG(i)          (REG_SPI_MEM_BASE(i) + 0xD4)
+/* SPI_MEM_ECC_ERR_CNT : RO ;bitpos:[24:17] ;default: 8'd0 ; */
+/*description: This bits show the error times of MSPI ECC read, including ECC byte error and da
+ta byte error. It is cleared by when  SPI_MEM_ECC_ERR_INT_CLR bit is set. .*/
+#define SPI_MEM_ECC_ERR_CNT    0x000000FF
+#define SPI_MEM_ECC_ERR_CNT_M  ((SPI_MEM_ECC_ERR_CNT_V)<<(SPI_MEM_ECC_ERR_CNT_S))
+#define SPI_MEM_ECC_ERR_CNT_V  0xFF
+#define SPI_MEM_ECC_ERR_CNT_S  17
+/* SPI_MEM_ECC_BYTE_ERR : R/SS/WTC ;bitpos:[16] ;default: 1'd0 ; */
+/*description: It records the first ECC byte error when SPI_FMEM_ECC_ERR_INT_EN/SPI_SMEM_ECC_ER
+R_INT_EN is set and accessed to flash/Ext_RAM. It is cleared by SPI_MEM_ECC_ERR_
+INT_CLR bit..*/
+#define SPI_MEM_ECC_BYTE_ERR    (BIT(16))
+#define SPI_MEM_ECC_BYTE_ERR_M  (BIT(16))
+#define SPI_MEM_ECC_BYTE_ERR_V  0x1
+#define SPI_MEM_ECC_BYTE_ERR_S  16
+/* SPI_MEM_ECC_CHK_ERR_BIT : R/SS/WTC ;bitpos:[15:13] ;default: 3'd0 ; */
+/*description: When SPI_MEM_ECC_BYTE_ERR is set, these bits show the error bit number of ECC by
+te..*/
+#define SPI_MEM_ECC_CHK_ERR_BIT    0x00000007
+#define SPI_MEM_ECC_CHK_ERR_BIT_M  ((SPI_MEM_ECC_CHK_ERR_BIT_V)<<(SPI_MEM_ECC_CHK_ERR_BIT_S))
+#define SPI_MEM_ECC_CHK_ERR_BIT_V  0x7
+#define SPI_MEM_ECC_CHK_ERR_BIT_S  13
+/* SPI_MEM_ECC_DATA_ERR_BIT : R/SS/WTC ;bitpos:[12:6] ;default: 7'd0 ; */
+/*description: It records the first ECC data error bit number when SPI_FMEM_ECC_ERR_INT_EN/SPI_
+SMEM_ECC_ERR_INT_EN is set and accessed to flash/Ext_RAM. The value ranges from
+0~127, corresponding to the bit number in 16 data bytes. It is cleared by SPI_ME
+M_ECC_ERR_INT_CLR bit..*/
+#define SPI_MEM_ECC_DATA_ERR_BIT    0x0000007F
+#define SPI_MEM_ECC_DATA_ERR_BIT_M  ((SPI_MEM_ECC_DATA_ERR_BIT_V)<<(SPI_MEM_ECC_DATA_ERR_BIT_S))
+#define SPI_MEM_ECC_DATA_ERR_BIT_V  0x7F
+#define SPI_MEM_ECC_DATA_ERR_BIT_S  6
+
+#define SPI_MEM_SPI_SMEM_AC_REG(i)          (REG_SPI_MEM_BASE(i) + 0xDC)
+/* SPI_MEM_SPI_SMEM_CS_HOLD_DELAY : R/W ;bitpos:[30:25] ;default: 6'd0 ; */
+/*description: These bits are used to set the minimum CS high time tSHSL between SPI burst tran
+sfer when accesses to external RAM. tSHSL is (SPI_SMEM_CS_HOLD_DELAY[5:0] + 1) M
+SPI core clock cycles..*/
+#define SPI_MEM_SPI_SMEM_CS_HOLD_DELAY    0x0000003F
+#define SPI_MEM_SPI_SMEM_CS_HOLD_DELAY_M  ((SPI_MEM_SPI_SMEM_CS_HOLD_DELAY_V)<<(SPI_MEM_SPI_SMEM_CS_HOLD_DELAY_S))
+#define SPI_MEM_SPI_SMEM_CS_HOLD_DELAY_V  0x3F
+#define SPI_MEM_SPI_SMEM_CS_HOLD_DELAY_S  25
+/* SPI_MEM_SPI_SMEM_ECC_ERR_INT_EN : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: Set this bit to calculate the error times of MSPI ECC read when accesses to exte
+rnal RAM..*/
+#define SPI_MEM_SPI_SMEM_ECC_ERR_INT_EN    (BIT(24))
+#define SPI_MEM_SPI_SMEM_ECC_ERR_INT_EN_M  (BIT(24))
+#define SPI_MEM_SPI_SMEM_ECC_ERR_INT_EN_V  0x1
+#define SPI_MEM_SPI_SMEM_ECC_ERR_INT_EN_S  24
+/* SPI_MEM_SPI_SMEM_ECC_16TO18_BYTE_EN : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: Set this bit to enable MSPI ECC 16 bytes data with 2 ECC bytes mode when accesse
+s to external RAM..*/
+#define SPI_MEM_SPI_SMEM_ECC_16TO18_BYTE_EN    (BIT(16))
+#define SPI_MEM_SPI_SMEM_ECC_16TO18_BYTE_EN_M  (BIT(16))
+#define SPI_MEM_SPI_SMEM_ECC_16TO18_BYTE_EN_V  0x1
+#define SPI_MEM_SPI_SMEM_ECC_16TO18_BYTE_EN_S  16
+/* SPI_MEM_SPI_SMEM_ECC_SKIP_PAGE_CORNER : R/W ;bitpos:[15] ;default: 1'b1 ; */
+/*description: 1: MSPI skips page corner when accesses to external RAM. 0: Not skip page corner
+ when accesses to external RAM..*/
+#define SPI_MEM_SPI_SMEM_ECC_SKIP_PAGE_CORNER    (BIT(15))
+#define SPI_MEM_SPI_SMEM_ECC_SKIP_PAGE_CORNER_M  (BIT(15))
+#define SPI_MEM_SPI_SMEM_ECC_SKIP_PAGE_CORNER_V  0x1
+#define SPI_MEM_SPI_SMEM_ECC_SKIP_PAGE_CORNER_S  15
+/* SPI_MEM_SPI_SMEM_ECC_CS_HOLD_TIME : R/W ;bitpos:[14:12] ;default: 3'd3 ; */
+/*description: SPI_SMEM_CS_HOLD_TIME + SPI_SMEM_ECC_CS_HOLD_TIME is the MSPI CS hold cycles in
+ECC mode when accesses to external RAM..*/
+#define SPI_MEM_SPI_SMEM_ECC_CS_HOLD_TIME    0x00000007
+#define SPI_MEM_SPI_SMEM_ECC_CS_HOLD_TIME_M  ((SPI_MEM_SPI_SMEM_ECC_CS_HOLD_TIME_V)<<(SPI_MEM_SPI_SMEM_ECC_CS_HOLD_TIME_S))
+#define SPI_MEM_SPI_SMEM_ECC_CS_HOLD_TIME_V  0x7
+#define SPI_MEM_SPI_SMEM_ECC_CS_HOLD_TIME_S  12
+/* SPI_MEM_SPI_SMEM_CS_HOLD_TIME : R/W ;bitpos:[11:7] ;default: 5'h1 ; */
+/*description: SPI Bus CS (SPI_CS) signal is delayed to inactive by SPI Bus clock (SPI_CLK), wh
+ich is the SPI_CS hold time in non-ECC mode. These bits are combined with SPI_ME
+M_CS_HOLD bit..*/
+#define SPI_MEM_SPI_SMEM_CS_HOLD_TIME    0x0000001F
+#define SPI_MEM_SPI_SMEM_CS_HOLD_TIME_M  ((SPI_MEM_SPI_SMEM_CS_HOLD_TIME_V)<<(SPI_MEM_SPI_SMEM_CS_HOLD_TIME_S))
+#define SPI_MEM_SPI_SMEM_CS_HOLD_TIME_V  0x1F
+#define SPI_MEM_SPI_SMEM_CS_HOLD_TIME_S  7
+/* SPI_MEM_SPI_SMEM_CS_SETUP_TIME : R/W ;bitpos:[6:2] ;default: 5'h1 ; */
+/*description: (cycles-1) of PREP phase by SPI_CLK, which is the SPI_CS setup time. These bits
+are combined with SPI_MEM_CS_SETUP bit..*/
+#define SPI_MEM_SPI_SMEM_CS_SETUP_TIME    0x0000001F
+#define SPI_MEM_SPI_SMEM_CS_SETUP_TIME_M  ((SPI_MEM_SPI_SMEM_CS_SETUP_TIME_V)<<(SPI_MEM_SPI_SMEM_CS_SETUP_TIME_S))
+#define SPI_MEM_SPI_SMEM_CS_SETUP_TIME_V  0x1F
+#define SPI_MEM_SPI_SMEM_CS_SETUP_TIME_S  2
+/* SPI_MEM_SPI_SMEM_CS_HOLD : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to keep SPI_CS low when MSPI is in DONE state..*/
+#define SPI_MEM_SPI_SMEM_CS_HOLD    (BIT(1))
+#define SPI_MEM_SPI_SMEM_CS_HOLD_M  (BIT(1))
+#define SPI_MEM_SPI_SMEM_CS_HOLD_V  0x1
+#define SPI_MEM_SPI_SMEM_CS_HOLD_S  1
+/* SPI_MEM_SPI_SMEM_CS_SETUP : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to keep SPI_CS low when MSPI is in PREP state..*/
+#define SPI_MEM_SPI_SMEM_CS_SETUP    (BIT(0))
+#define SPI_MEM_SPI_SMEM_CS_SETUP_M  (BIT(0))
+#define SPI_MEM_SPI_SMEM_CS_SETUP_V  0x1
+#define SPI_MEM_SPI_SMEM_CS_SETUP_S  0
+
+#define SPI_MEM_DDR_REG(i)          (REG_SPI_MEM_BASE(i) + 0xE0)
+/* SPI_MEM_SPI_FMEM_HYPERBUS_CA : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: Set this bit to enable HyperRAM address out when accesses to flash, which means
+ADDR_OUT[31:0] = {spi_usr_addr_value[19:4], 13'd0, spi_usr_addr_value[3:1]}..*/
+#define SPI_MEM_SPI_FMEM_HYPERBUS_CA    (BIT(30))
+#define SPI_MEM_SPI_FMEM_HYPERBUS_CA_M  (BIT(30))
+#define SPI_MEM_SPI_FMEM_HYPERBUS_CA_V  0x1
+#define SPI_MEM_SPI_FMEM_HYPERBUS_CA_S  30
+/* SPI_MEM_SPI_FMEM_OCTA_RAM_ADDR : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: Set this bit to enable octa_ram address out when accesses to flash, which means
+ADDR_OUT[31:0] = {spi_usr_addr_value[25:4], 6'd0, spi_usr_addr_value[3:1], 1'b0}
+..*/
+#define SPI_MEM_SPI_FMEM_OCTA_RAM_ADDR    (BIT(29))
+#define SPI_MEM_SPI_FMEM_OCTA_RAM_ADDR_M  (BIT(29))
+#define SPI_MEM_SPI_FMEM_OCTA_RAM_ADDR_V  0x1
+#define SPI_MEM_SPI_FMEM_OCTA_RAM_ADDR_S  29
+/* SPI_MEM_SPI_FMEM_CLK_DIFF_INV : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: Set this bit to invert SPI_DIFF when accesses to flash. ..*/
+#define SPI_MEM_SPI_FMEM_CLK_DIFF_INV    (BIT(28))
+#define SPI_MEM_SPI_FMEM_CLK_DIFF_INV_M  (BIT(28))
+#define SPI_MEM_SPI_FMEM_CLK_DIFF_INV_V  0x1
+#define SPI_MEM_SPI_FMEM_CLK_DIFF_INV_S  28
+/* SPI_MEM_SPI_FMEM_HYPERBUS_DUMMY_2X : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: Set this bit to enable the vary dummy function in SPI HyperBus mode, when SPI0 a
+ccesses flash or SPI1 accesses flash or sram..*/
+#define SPI_MEM_SPI_FMEM_HYPERBUS_DUMMY_2X    (BIT(27))
+#define SPI_MEM_SPI_FMEM_HYPERBUS_DUMMY_2X_M  (BIT(27))
+#define SPI_MEM_SPI_FMEM_HYPERBUS_DUMMY_2X_V  0x1
+#define SPI_MEM_SPI_FMEM_HYPERBUS_DUMMY_2X_S  27
+/* SPI_MEM_SPI_FMEM_DQS_CA_IN : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: Set this bit to enable the input of SPI_DQS signal in SPI phases of CMD and ADDR
+..*/
+#define SPI_MEM_SPI_FMEM_DQS_CA_IN    (BIT(26))
+#define SPI_MEM_SPI_FMEM_DQS_CA_IN_M  (BIT(26))
+#define SPI_MEM_SPI_FMEM_DQS_CA_IN_V  0x1
+#define SPI_MEM_SPI_FMEM_DQS_CA_IN_S  26
+/* SPI_MEM_SPI_FMEM_HYPERBUS_MODE : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: Set this bit to enable the SPI HyperBus mode..*/
+#define SPI_MEM_SPI_FMEM_HYPERBUS_MODE    (BIT(25))
+#define SPI_MEM_SPI_FMEM_HYPERBUS_MODE_M  (BIT(25))
+#define SPI_MEM_SPI_FMEM_HYPERBUS_MODE_V  0x1
+#define SPI_MEM_SPI_FMEM_HYPERBUS_MODE_S  25
+/* SPI_MEM_SPI_FMEM_CLK_DIFF_EN : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: Set this bit to enable the differential SPI_CLK#..*/
+#define SPI_MEM_SPI_FMEM_CLK_DIFF_EN    (BIT(24))
+#define SPI_MEM_SPI_FMEM_CLK_DIFF_EN_M  (BIT(24))
+#define SPI_MEM_SPI_FMEM_CLK_DIFF_EN_V  0x1
+#define SPI_MEM_SPI_FMEM_CLK_DIFF_EN_S  24
+/* SPI_MEM_SPI_FMEM_DDR_DQS_LOOP_MODE : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: When SPI_FMEM_DDR_DQS_LOOP and SPI_FMEM_DDR_EN are set, 1: Use internal SPI_CLK
+ as data strobe. 0: Use internal ~SPI_CLK  as data strobe. Otherwise this bit is
+ not active..*/
+#define SPI_MEM_SPI_FMEM_DDR_DQS_LOOP_MODE    (BIT(22))
+#define SPI_MEM_SPI_FMEM_DDR_DQS_LOOP_MODE_M  (BIT(22))
+#define SPI_MEM_SPI_FMEM_DDR_DQS_LOOP_MODE_V  0x1
+#define SPI_MEM_SPI_FMEM_DDR_DQS_LOOP_MODE_S  22
+/* SPI_MEM_SPI_FMEM_DDR_DQS_LOOP : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: 1: Use internal signal  as data strobe, the strobe can not be delayed by input t
+iming module. 0: Use input SPI_DQS signal from PAD as data strobe, the strobe ca
+n be delayed by input timing module.*/
+#define SPI_MEM_SPI_FMEM_DDR_DQS_LOOP    (BIT(21))
+#define SPI_MEM_SPI_FMEM_DDR_DQS_LOOP_M  (BIT(21))
+#define SPI_MEM_SPI_FMEM_DDR_DQS_LOOP_V  0x1
+#define SPI_MEM_SPI_FMEM_DDR_DQS_LOOP_S  21
+/* SPI_MEM_SPI_FMEM_USR_DDR_DQS_THD : R/W ;bitpos:[20:14] ;default: 7'b0 ; */
+/*description: The delay number of data strobe which from memory based on SPI_CLK..*/
+#define SPI_MEM_SPI_FMEM_USR_DDR_DQS_THD    0x0000007F
+#define SPI_MEM_SPI_FMEM_USR_DDR_DQS_THD_M  ((SPI_MEM_SPI_FMEM_USR_DDR_DQS_THD_V)<<(SPI_MEM_SPI_FMEM_USR_DDR_DQS_THD_S))
+#define SPI_MEM_SPI_FMEM_USR_DDR_DQS_THD_V  0x7F
+#define SPI_MEM_SPI_FMEM_USR_DDR_DQS_THD_S  14
+/* SPI_MEM_SPI_FMEM_RX_DDR_MSK_EN : R/W ;bitpos:[13] ;default: 1'h1 ; */
+/*description: Set this bit to mask the first or the last byte in MSPI ECC DDR read mode, when
+accesses to flash..*/
+#define SPI_MEM_SPI_FMEM_RX_DDR_MSK_EN    (BIT(13))
+#define SPI_MEM_SPI_FMEM_RX_DDR_MSK_EN_M  (BIT(13))
+#define SPI_MEM_SPI_FMEM_RX_DDR_MSK_EN_V  0x1
+#define SPI_MEM_SPI_FMEM_RX_DDR_MSK_EN_S  13
+/* SPI_MEM_SPI_FMEM_TX_DDR_MSK_EN : R/W ;bitpos:[12] ;default: 1'h1 ; */
+/*description: Set this bit to mask the first or the last byte in MSPI ECC DDR write mode, when
+ accesses to flash..*/
+#define SPI_MEM_SPI_FMEM_TX_DDR_MSK_EN    (BIT(12))
+#define SPI_MEM_SPI_FMEM_TX_DDR_MSK_EN_M  (BIT(12))
+#define SPI_MEM_SPI_FMEM_TX_DDR_MSK_EN_V  0x1
+#define SPI_MEM_SPI_FMEM_TX_DDR_MSK_EN_S  12
+/* SPI_MEM_SPI_FMEM_OUTMINBYTELEN : R/W ;bitpos:[11:5] ;default: 7'b1 ; */
+/*description: It is the minimum output data length in the panda device..*/
+#define SPI_MEM_SPI_FMEM_OUTMINBYTELEN    0x0000007F
+#define SPI_MEM_SPI_FMEM_OUTMINBYTELEN_M  ((SPI_MEM_SPI_FMEM_OUTMINBYTELEN_V)<<(SPI_MEM_SPI_FMEM_OUTMINBYTELEN_S))
+#define SPI_MEM_SPI_FMEM_OUTMINBYTELEN_V  0x7F
+#define SPI_MEM_SPI_FMEM_OUTMINBYTELEN_S  5
+/* SPI_MEM_SPI_FMEM_DDR_CMD_DIS : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: the bit is used to disable dual edge in command phase when DDR mode..*/
+#define SPI_MEM_SPI_FMEM_DDR_CMD_DIS    (BIT(4))
+#define SPI_MEM_SPI_FMEM_DDR_CMD_DIS_M  (BIT(4))
+#define SPI_MEM_SPI_FMEM_DDR_CMD_DIS_V  0x1
+#define SPI_MEM_SPI_FMEM_DDR_CMD_DIS_S  4
+/* SPI_MEM_SPI_FMEM_DDR_WDAT_SWP : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set the bit to reorder TX data of the word in DDR mode..*/
+#define SPI_MEM_SPI_FMEM_DDR_WDAT_SWP    (BIT(3))
+#define SPI_MEM_SPI_FMEM_DDR_WDAT_SWP_M  (BIT(3))
+#define SPI_MEM_SPI_FMEM_DDR_WDAT_SWP_V  0x1
+#define SPI_MEM_SPI_FMEM_DDR_WDAT_SWP_S  3
+/* SPI_MEM_SPI_FMEM_DDR_RDAT_SWP : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set the bit to reorder RX data of the word in DDR mode..*/
+#define SPI_MEM_SPI_FMEM_DDR_RDAT_SWP    (BIT(2))
+#define SPI_MEM_SPI_FMEM_DDR_RDAT_SWP_M  (BIT(2))
+#define SPI_MEM_SPI_FMEM_DDR_RDAT_SWP_V  0x1
+#define SPI_MEM_SPI_FMEM_DDR_RDAT_SWP_S  2
+/* SPI_MEM_SPI_FMEM_VAR_DUMMY : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set the bit to enable variable dummy cycle in DDRmode..*/
+#define SPI_MEM_SPI_FMEM_VAR_DUMMY    (BIT(1))
+#define SPI_MEM_SPI_FMEM_VAR_DUMMY_M  (BIT(1))
+#define SPI_MEM_SPI_FMEM_VAR_DUMMY_V  0x1
+#define SPI_MEM_SPI_FMEM_VAR_DUMMY_S  1
+/* SPI_MEM_SPI_FMEM_DDR_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: 1: in DDR mode,  0: in SDR mode..*/
+#define SPI_MEM_SPI_FMEM_DDR_EN    (BIT(0))
+#define SPI_MEM_SPI_FMEM_DDR_EN_M  (BIT(0))
+#define SPI_MEM_SPI_FMEM_DDR_EN_V  0x1
+#define SPI_MEM_SPI_FMEM_DDR_EN_S  0
+
+#define SPI_MEM_SPI_SMEM_DDR_REG(i)          (REG_SPI_MEM_BASE(i) + 0xE4)
+/* SPI_MEM_SPI_SMEM_HYPERBUS_CA : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: Set this bit to enable HyperRAM address out when accesses to external RAM, which
+ means ADDR_OUT[31:0] = {spi_usr_addr_value[19:4], 13'd0, spi_usr_addr_value[3:1
+]}..*/
+#define SPI_MEM_SPI_SMEM_HYPERBUS_CA    (BIT(30))
+#define SPI_MEM_SPI_SMEM_HYPERBUS_CA_M  (BIT(30))
+#define SPI_MEM_SPI_SMEM_HYPERBUS_CA_V  0x1
+#define SPI_MEM_SPI_SMEM_HYPERBUS_CA_S  30
+/* SPI_MEM_SPI_SMEM_OCTA_RAM_ADDR : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: Set this bit to enable octa_ram address out when accesses to external RAM, which
+ means ADDR_OUT[31:0] = {spi_usr_addr_value[25:4], 6'd0, spi_usr_addr_value[3:1]
+, 1'b0}..*/
+#define SPI_MEM_SPI_SMEM_OCTA_RAM_ADDR    (BIT(29))
+#define SPI_MEM_SPI_SMEM_OCTA_RAM_ADDR_M  (BIT(29))
+#define SPI_MEM_SPI_SMEM_OCTA_RAM_ADDR_V  0x1
+#define SPI_MEM_SPI_SMEM_OCTA_RAM_ADDR_S  29
+/* SPI_MEM_SPI_SMEM_CLK_DIFF_INV : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: Set this bit to invert SPI_DIFF when accesses to external RAM. ..*/
+#define SPI_MEM_SPI_SMEM_CLK_DIFF_INV    (BIT(28))
+#define SPI_MEM_SPI_SMEM_CLK_DIFF_INV_M  (BIT(28))
+#define SPI_MEM_SPI_SMEM_CLK_DIFF_INV_V  0x1
+#define SPI_MEM_SPI_SMEM_CLK_DIFF_INV_S  28
+/* SPI_MEM_SPI_SMEM_HYPERBUS_DUMMY_2X : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: Set this bit to enable the vary dummy function in SPI HyperBus mode, when SPI0 a
+ccesses to flash or SPI1 accesses flash or sram..*/
+#define SPI_MEM_SPI_SMEM_HYPERBUS_DUMMY_2X    (BIT(27))
+#define SPI_MEM_SPI_SMEM_HYPERBUS_DUMMY_2X_M  (BIT(27))
+#define SPI_MEM_SPI_SMEM_HYPERBUS_DUMMY_2X_V  0x1
+#define SPI_MEM_SPI_SMEM_HYPERBUS_DUMMY_2X_S  27
+/* SPI_MEM_SPI_SMEM_DQS_CA_IN : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: Set this bit to enable the input of SPI_DQS signal in SPI phases of CMD and ADDR
+..*/
+#define SPI_MEM_SPI_SMEM_DQS_CA_IN    (BIT(26))
+#define SPI_MEM_SPI_SMEM_DQS_CA_IN_M  (BIT(26))
+#define SPI_MEM_SPI_SMEM_DQS_CA_IN_V  0x1
+#define SPI_MEM_SPI_SMEM_DQS_CA_IN_S  26
+/* SPI_MEM_SPI_SMEM_HYPERBUS_MODE : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: Set this bit to enable the SPI HyperBus mode..*/
+#define SPI_MEM_SPI_SMEM_HYPERBUS_MODE    (BIT(25))
+#define SPI_MEM_SPI_SMEM_HYPERBUS_MODE_M  (BIT(25))
+#define SPI_MEM_SPI_SMEM_HYPERBUS_MODE_V  0x1
+#define SPI_MEM_SPI_SMEM_HYPERBUS_MODE_S  25
+/* SPI_MEM_SPI_SMEM_CLK_DIFF_EN : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: Set this bit to enable the differential SPI_CLK#..*/
+#define SPI_MEM_SPI_SMEM_CLK_DIFF_EN    (BIT(24))
+#define SPI_MEM_SPI_SMEM_CLK_DIFF_EN_M  (BIT(24))
+#define SPI_MEM_SPI_SMEM_CLK_DIFF_EN_V  0x1
+#define SPI_MEM_SPI_SMEM_CLK_DIFF_EN_S  24
+/* SPI_MEM_SPI_SMEM_DDR_DQS_LOOP_MODE : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: When SPI_SMEM_DDR_DQS_LOOP and SPI_SMEM_DDR_EN are set, 1: Use internal SPI_CLK
+ as data strobe. 0: Use internal ~SPI_CLK  as data strobe. Otherwise this bit is
+ not active..*/
+#define SPI_MEM_SPI_SMEM_DDR_DQS_LOOP_MODE    (BIT(22))
+#define SPI_MEM_SPI_SMEM_DDR_DQS_LOOP_MODE_M  (BIT(22))
+#define SPI_MEM_SPI_SMEM_DDR_DQS_LOOP_MODE_V  0x1
+#define SPI_MEM_SPI_SMEM_DDR_DQS_LOOP_MODE_S  22
+/* SPI_MEM_SPI_SMEM_DDR_DQS_LOOP : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: 1: Use internal signal  as data strobe, the strobe can not be delayed by input t
+iming module. 0: Use input SPI_DQS signal from PAD as data strobe, the strobe ca
+n be delayed by input timing module.*/
+#define SPI_MEM_SPI_SMEM_DDR_DQS_LOOP    (BIT(21))
+#define SPI_MEM_SPI_SMEM_DDR_DQS_LOOP_M  (BIT(21))
+#define SPI_MEM_SPI_SMEM_DDR_DQS_LOOP_V  0x1
+#define SPI_MEM_SPI_SMEM_DDR_DQS_LOOP_S  21
+/* SPI_MEM_SPI_SMEM_USR_DDR_DQS_THD : R/W ;bitpos:[20:14] ;default: 7'b0 ; */
+/*description: The delay number of data strobe which from memory based on SPI_CLK..*/
+#define SPI_MEM_SPI_SMEM_USR_DDR_DQS_THD    0x0000007F
+#define SPI_MEM_SPI_SMEM_USR_DDR_DQS_THD_M  ((SPI_MEM_SPI_SMEM_USR_DDR_DQS_THD_V)<<(SPI_MEM_SPI_SMEM_USR_DDR_DQS_THD_S))
+#define SPI_MEM_SPI_SMEM_USR_DDR_DQS_THD_V  0x7F
+#define SPI_MEM_SPI_SMEM_USR_DDR_DQS_THD_S  14
+/* SPI_MEM_SPI_SMEM_RX_DDR_MSK_EN : R/W ;bitpos:[13] ;default: 1'h1 ; */
+/*description: Set this bit to mask the first or the last byte in MSPI ECC DDR read mode, when
+accesses to external RAM..*/
+#define SPI_MEM_SPI_SMEM_RX_DDR_MSK_EN    (BIT(13))
+#define SPI_MEM_SPI_SMEM_RX_DDR_MSK_EN_M  (BIT(13))
+#define SPI_MEM_SPI_SMEM_RX_DDR_MSK_EN_V  0x1
+#define SPI_MEM_SPI_SMEM_RX_DDR_MSK_EN_S  13
+/* SPI_MEM_SPI_SMEM_TX_DDR_MSK_EN : R/W ;bitpos:[12] ;default: 1'h1 ; */
+/*description: Set this bit to mask the first or the last byte in MSPI ECC DDR write mode, when
+ accesses to external RAM..*/
+#define SPI_MEM_SPI_SMEM_TX_DDR_MSK_EN    (BIT(12))
+#define SPI_MEM_SPI_SMEM_TX_DDR_MSK_EN_M  (BIT(12))
+#define SPI_MEM_SPI_SMEM_TX_DDR_MSK_EN_V  0x1
+#define SPI_MEM_SPI_SMEM_TX_DDR_MSK_EN_S  12
+/* SPI_MEM_SPI_SMEM_OUTMINBYTELEN : R/W ;bitpos:[11:5] ;default: 7'b1 ; */
+/*description: It is the minimum output data length in the ddr psram..*/
+#define SPI_MEM_SPI_SMEM_OUTMINBYTELEN    0x0000007F
+#define SPI_MEM_SPI_SMEM_OUTMINBYTELEN_M  ((SPI_MEM_SPI_SMEM_OUTMINBYTELEN_V)<<(SPI_MEM_SPI_SMEM_OUTMINBYTELEN_S))
+#define SPI_MEM_SPI_SMEM_OUTMINBYTELEN_V  0x7F
+#define SPI_MEM_SPI_SMEM_OUTMINBYTELEN_S  5
+/* SPI_MEM_SPI_SMEM_DDR_CMD_DIS : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: the bit is used to disable dual edge in CMD phase when ddr mode..*/
+#define SPI_MEM_SPI_SMEM_DDR_CMD_DIS    (BIT(4))
+#define SPI_MEM_SPI_SMEM_DDR_CMD_DIS_M  (BIT(4))
+#define SPI_MEM_SPI_SMEM_DDR_CMD_DIS_V  0x1
+#define SPI_MEM_SPI_SMEM_DDR_CMD_DIS_S  4
+/* SPI_MEM_SPI_SMEM_DDR_WDAT_SWP : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set the bit to reorder tx data of the word in spi ddr mode..*/
+#define SPI_MEM_SPI_SMEM_DDR_WDAT_SWP    (BIT(3))
+#define SPI_MEM_SPI_SMEM_DDR_WDAT_SWP_M  (BIT(3))
+#define SPI_MEM_SPI_SMEM_DDR_WDAT_SWP_V  0x1
+#define SPI_MEM_SPI_SMEM_DDR_WDAT_SWP_S  3
+/* SPI_MEM_SPI_SMEM_DDR_RDAT_SWP : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set the bit to reorder rx data of the word in spi ddr mode..*/
+#define SPI_MEM_SPI_SMEM_DDR_RDAT_SWP    (BIT(2))
+#define SPI_MEM_SPI_SMEM_DDR_RDAT_SWP_M  (BIT(2))
+#define SPI_MEM_SPI_SMEM_DDR_RDAT_SWP_V  0x1
+#define SPI_MEM_SPI_SMEM_DDR_RDAT_SWP_S  2
+/* SPI_MEM_SPI_SMEM_VAR_DUMMY : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set the bit to enable variable dummy cycle in spi ddr mode..*/
+#define SPI_MEM_SPI_SMEM_VAR_DUMMY    (BIT(1))
+#define SPI_MEM_SPI_SMEM_VAR_DUMMY_M  (BIT(1))
+#define SPI_MEM_SPI_SMEM_VAR_DUMMY_V  0x1
+#define SPI_MEM_SPI_SMEM_VAR_DUMMY_S  1
+/* SPI_MEM_SPI_SMEM_DDR_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: 1: in ddr mode,  0 in sdr mode.*/
+#define SPI_MEM_SPI_SMEM_DDR_EN    (BIT(0))
+#define SPI_MEM_SPI_SMEM_DDR_EN_M  (BIT(0))
+#define SPI_MEM_SPI_SMEM_DDR_EN_V  0x1
+#define SPI_MEM_SPI_SMEM_DDR_EN_S  0
+
+#define SPI_MEM_CLOCK_GATE_REG(i)          (REG_SPI_MEM_BASE(i) + 0xE8)
+/* SPI_MEM_CLK_EN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: Register clock gate enable signal. 1: Enable. 0: Disable..*/
+#define SPI_MEM_CLK_EN    (BIT(0))
+#define SPI_MEM_CLK_EN_M  (BIT(0))
+#define SPI_MEM_CLK_EN_V  0x1
+#define SPI_MEM_CLK_EN_S  0
+
+#define SPI_MEM_CORE_CLK_SEL_REG(i)          (REG_SPI_MEM_BASE(i) + 0xEC)
+/* SPI_MEM_CORE_CLK_SEL : R/W ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: When the digital system clock selects PLL clock and the frequency of PLL clock i
+s 480MHz, the value of SPI_MEM_CORE_CLK_SEL:  0: SPI0/1 module clock (MSPI_CORE_
+CLK) is 80MHz. 1: MSPI_CORE_CLK is 120MHz.  2: MSPI_CORE_CLK is 160MHz. 3: MSPI_
+CORE_CLK is 240MHz. When the digital system clock selects PLL clock and the freq
+uency of PLL clock is 320MHz, the value of SPI_MEM_CORE_CLK_SEL:  0: MSPI_CORE_C
+LK is 80MHz. 1: MSPI_CORE_CLK is 80MHz.  2: MSPI_CORE_CLK 160MHz. 3: Not used. .*/
+#define SPI_MEM_CORE_CLK_SEL    0x00000003
+#define SPI_MEM_CORE_CLK_SEL_M  ((SPI_MEM_CORE_CLK_SEL_V)<<(SPI_MEM_CORE_CLK_SEL_S))
+#define SPI_MEM_CORE_CLK_SEL_V  0x3
+#define SPI_MEM_CORE_CLK_SEL_S  0
+
+#define SPI_MEM_INT_ENA_REG(i)          (REG_SPI_MEM_BASE(i) + 0xF0)
+/* SPI_MEM_ECC_ERR_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_MEM_ECC_ERR_INT interrupt..*/
+#define SPI_MEM_ECC_ERR_INT_ENA    (BIT(4))
+#define SPI_MEM_ECC_ERR_INT_ENA_M  (BIT(4))
+#define SPI_MEM_ECC_ERR_INT_ENA_V  0x1
+#define SPI_MEM_ECC_ERR_INT_ENA_S  4
+/* SPI_MEM_BROWN_OUT_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_MEM_BROWN_OUT_INT interrupt..*/
+#define SPI_MEM_BROWN_OUT_INT_ENA    (BIT(3))
+#define SPI_MEM_BROWN_OUT_INT_ENA_M  (BIT(3))
+#define SPI_MEM_BROWN_OUT_INT_ENA_V  0x1
+#define SPI_MEM_BROWN_OUT_INT_ENA_S  3
+/* SPI_MEM_TOTAL_TRANS_END_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_MEM_TOTAL_TRANS_END_INT interrupt..*/
+#define SPI_MEM_TOTAL_TRANS_END_INT_ENA    (BIT(2))
+#define SPI_MEM_TOTAL_TRANS_END_INT_ENA_M  (BIT(2))
+#define SPI_MEM_TOTAL_TRANS_END_INT_ENA_V  0x1
+#define SPI_MEM_TOTAL_TRANS_END_INT_ENA_S  2
+/* SPI_MEM_PES_END_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_MEM_PES_END_INT interrupt..*/
+#define SPI_MEM_PES_END_INT_ENA    (BIT(1))
+#define SPI_MEM_PES_END_INT_ENA_M  (BIT(1))
+#define SPI_MEM_PES_END_INT_ENA_V  0x1
+#define SPI_MEM_PES_END_INT_ENA_S  1
+/* SPI_MEM_PER_END_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_MEM_PER_END_INT interrupt..*/
+#define SPI_MEM_PER_END_INT_ENA    (BIT(0))
+#define SPI_MEM_PER_END_INT_ENA_M  (BIT(0))
+#define SPI_MEM_PER_END_INT_ENA_V  0x1
+#define SPI_MEM_PER_END_INT_ENA_S  0
+
+#define SPI_MEM_INT_CLR_REG(i)          (REG_SPI_MEM_BASE(i) + 0xF4)
+/* SPI_MEM_ECC_ERR_INT_CLR : WT ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_MEM_ECC_ERR_INT interrupt. SPI_MEM_ECC_ERR_ADDR and SPI_ME
+M_ECC_ERR_CNT will be cleared by the pulse of this bit..*/
+#define SPI_MEM_ECC_ERR_INT_CLR    (BIT(4))
+#define SPI_MEM_ECC_ERR_INT_CLR_M  (BIT(4))
+#define SPI_MEM_ECC_ERR_INT_CLR_V  0x1
+#define SPI_MEM_ECC_ERR_INT_CLR_S  4
+/* SPI_MEM_BROWN_OUT_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The status bit for SPI_MEM_BROWN_OUT_INT interrupt..*/
+#define SPI_MEM_BROWN_OUT_INT_CLR    (BIT(3))
+#define SPI_MEM_BROWN_OUT_INT_CLR_M  (BIT(3))
+#define SPI_MEM_BROWN_OUT_INT_CLR_V  0x1
+#define SPI_MEM_BROWN_OUT_INT_CLR_S  3
+/* SPI_MEM_TOTAL_TRANS_END_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_MEM_TOTAL_TRANS_END_INT interrupt..*/
+#define SPI_MEM_TOTAL_TRANS_END_INT_CLR    (BIT(2))
+#define SPI_MEM_TOTAL_TRANS_END_INT_CLR_M  (BIT(2))
+#define SPI_MEM_TOTAL_TRANS_END_INT_CLR_V  0x1
+#define SPI_MEM_TOTAL_TRANS_END_INT_CLR_S  2
+/* SPI_MEM_PES_END_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_MEM_PES_END_INT interrupt..*/
+#define SPI_MEM_PES_END_INT_CLR    (BIT(1))
+#define SPI_MEM_PES_END_INT_CLR_M  (BIT(1))
+#define SPI_MEM_PES_END_INT_CLR_V  0x1
+#define SPI_MEM_PES_END_INT_CLR_S  1
+/* SPI_MEM_PER_END_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_MEM_PER_END_INT interrupt..*/
+#define SPI_MEM_PER_END_INT_CLR    (BIT(0))
+#define SPI_MEM_PER_END_INT_CLR_M  (BIT(0))
+#define SPI_MEM_PER_END_INT_CLR_V  0x1
+#define SPI_MEM_PER_END_INT_CLR_S  0
+
+#define SPI_MEM_INT_RAW_REG(i)          (REG_SPI_MEM_BASE(i) + 0xF8)
+/* SPI_MEM_ECC_ERR_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_MEM_ECC_ERR_INT interrupt. When APB_CTRL_FECC_ERR_INT_EN is
+set and  APB_CTRL_SECC_ERR_INT_EN is cleared, this bit is triggered when the err
+or times of SPI0/1 ECC read flash are equal or bigger than APB_CTRL_ECC_ERR_INT_
+NUM. When APB_CTRL_FECC_ERR_INT_EN is cleared and  APB_CTRL_SECC_ERR_INT_EN is s
+et, this bit is triggered when the error times of SPI0/1 ECC read external RAM a
+re equal or bigger than APB_CTRL_ECC_ERR_INT_NUM. When APB_CTRL_FECC_ERR_INT_EN
+and  APB_CTRL_SECC_ERR_INT_EN are set, this bit is triggered when the total erro
+r times of SPI0/1 ECC read external RAM and flash are equal or bigger than APB_C
+TRL_ECC_ERR_INT_NUM. When APB_CTRL_FECC_ERR_INT_EN and  APB_CTRL_SECC_ERR_INT_EN
+ are cleared, this bit will not be triggered..*/
+#define SPI_MEM_ECC_ERR_INT_RAW    (BIT(4))
+#define SPI_MEM_ECC_ERR_INT_RAW_M  (BIT(4))
+#define SPI_MEM_ECC_ERR_INT_RAW_V  0x1
+#define SPI_MEM_ECC_ERR_INT_RAW_S  4
+/* SPI_MEM_BROWN_OUT_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_MEM_BROWN_OUT_INT interrupt. 1: Triggered condition is that
+chip is loosing power and RTC module sends out brown out close flash request to
+SPI1. After SPI1 sends out suspend command to flash, this interrupt is triggered
+ and MSPI returns to idle state. 0: Others..*/
+#define SPI_MEM_BROWN_OUT_INT_RAW    (BIT(3))
+#define SPI_MEM_BROWN_OUT_INT_RAW_M  (BIT(3))
+#define SPI_MEM_BROWN_OUT_INT_RAW_V  0x1
+#define SPI_MEM_BROWN_OUT_INT_RAW_S  3
+/* SPI_MEM_TOTAL_TRANS_END_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_MEM_TOTAL_TRANS_END_INT interrupt. 1: Triggered when SPI1 tr
+ansfer is done and flash is already idle. When WRSR/PP/SE/BE/CE is sent and PES/
+PER command is sent, this bit is set when WRSR/PP/SE/BE/CE is success.  0: Other
+s..*/
+#define SPI_MEM_TOTAL_TRANS_END_INT_RAW    (BIT(2))
+#define SPI_MEM_TOTAL_TRANS_END_INT_RAW_M  (BIT(2))
+#define SPI_MEM_TOTAL_TRANS_END_INT_RAW_V  0x1
+#define SPI_MEM_TOTAL_TRANS_END_INT_RAW_S  2
+/* SPI_MEM_PES_END_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_MEM_PES_END_INT interrupt.1: Triggered when Auto Suspend com
+mand (0x75) is sent and flash is suspended successfully. 0: Others..*/
+#define SPI_MEM_PES_END_INT_RAW    (BIT(1))
+#define SPI_MEM_PES_END_INT_RAW_M  (BIT(1))
+#define SPI_MEM_PES_END_INT_RAW_V  0x1
+#define SPI_MEM_PES_END_INT_RAW_S  1
+/* SPI_MEM_PER_END_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_MEM_PER_END_INT interrupt. 1: Triggered when Auto Resume com
+mand (0x7A) is sent and flash is resumed successfully. 0: Others..*/
+#define SPI_MEM_PER_END_INT_RAW    (BIT(0))
+#define SPI_MEM_PER_END_INT_RAW_M  (BIT(0))
+#define SPI_MEM_PER_END_INT_RAW_V  0x1
+#define SPI_MEM_PER_END_INT_RAW_S  0
+
+#define SPI_MEM_INT_ST_REG(i)          (REG_SPI_MEM_BASE(i) + 0xFC)
+/* SPI_MEM_ECC_ERR_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The status bit for SPI_MEM_ECC_ERR_INT interrupt..*/
+#define SPI_MEM_ECC_ERR_INT_ST    (BIT(4))
+#define SPI_MEM_ECC_ERR_INT_ST_M  (BIT(4))
+#define SPI_MEM_ECC_ERR_INT_ST_V  0x1
+#define SPI_MEM_ECC_ERR_INT_ST_S  4
+/* SPI_MEM_BROWN_OUT_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The status bit for SPI_MEM_BROWN_OUT_INT interrupt..*/
+#define SPI_MEM_BROWN_OUT_INT_ST    (BIT(3))
+#define SPI_MEM_BROWN_OUT_INT_ST_M  (BIT(3))
+#define SPI_MEM_BROWN_OUT_INT_ST_V  0x1
+#define SPI_MEM_BROWN_OUT_INT_ST_S  3
+/* SPI_MEM_TOTAL_TRANS_END_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The status bit for SPI_MEM_TOTAL_TRANS_END_INT interrupt..*/
+#define SPI_MEM_TOTAL_TRANS_END_INT_ST    (BIT(2))
+#define SPI_MEM_TOTAL_TRANS_END_INT_ST_M  (BIT(2))
+#define SPI_MEM_TOTAL_TRANS_END_INT_ST_V  0x1
+#define SPI_MEM_TOTAL_TRANS_END_INT_ST_S  2
+/* SPI_MEM_PES_END_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The status bit for SPI_MEM_PES_END_INT interrupt..*/
+#define SPI_MEM_PES_END_INT_ST    (BIT(1))
+#define SPI_MEM_PES_END_INT_ST_M  (BIT(1))
+#define SPI_MEM_PES_END_INT_ST_V  0x1
+#define SPI_MEM_PES_END_INT_ST_S  1
+/* SPI_MEM_PER_END_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The status bit for SPI_MEM_PER_END_INT interrupt..*/
+#define SPI_MEM_PER_END_INT_ST    (BIT(0))
+#define SPI_MEM_PER_END_INT_ST_M  (BIT(0))
+#define SPI_MEM_PER_END_INT_ST_V  0x1
+#define SPI_MEM_PER_END_INT_ST_S  0
+
+#define SPI_MEM_DATE_REG(i)          (REG_SPI_MEM_BASE(i) + 0x3FC)
+/* SPI_MEM_DATE : R/W ;bitpos:[27:5] ;default: 23'h108082 ; */
+/*description: SPI register version..*/
+#define SPI_MEM_DATE    0x007FFFFF
+#define SPI_MEM_DATE_M  ((SPI_MEM_DATE_V)<<(SPI_MEM_DATE_S))
+#define SPI_MEM_DATE_V  0x7FFFFF
+#define SPI_MEM_DATE_S  5
+/* SPI_MEM_SPICLK_PAD_DRV_CTL_EN : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: SPI_CLK PAD driver control signal. 1: The driver of SPI_CLK PAD  is controlled b
+y the bits SPI_FMEM_SPICLK_FUN_DRV[1:0] and SPI_SMEM_SPICLK_FUN_DRV[1:0]. 0: The
+ driver of SPI_CLK PAD  is controlled by the bits IO_MUX_FUNC_DRV[1:0] of SPICLK
+ PAD..*/
+#define SPI_MEM_SPICLK_PAD_DRV_CTL_EN    (BIT(4))
+#define SPI_MEM_SPICLK_PAD_DRV_CTL_EN_M  (BIT(4))
+#define SPI_MEM_SPICLK_PAD_DRV_CTL_EN_V  0x1
+#define SPI_MEM_SPICLK_PAD_DRV_CTL_EN_S  4
+/* SPI_MEM_SPI_FMEM_SPICLK_FUN_DRV : R/W ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: The driver of SPI_CLK PAD  is controlled by the bits SPI_FMEM_SPICLK_FUN_DRV[1:0
+] when the bit SPI_SPICLK_PAD_DRV_CTL_EN is set and MSPI accesses to flash..*/
+#define SPI_MEM_SPI_FMEM_SPICLK_FUN_DRV    0x00000003
+#define SPI_MEM_SPI_FMEM_SPICLK_FUN_DRV_M  ((SPI_MEM_SPI_FMEM_SPICLK_FUN_DRV_V)<<(SPI_MEM_SPI_FMEM_SPICLK_FUN_DRV_S))
+#define SPI_MEM_SPI_FMEM_SPICLK_FUN_DRV_V  0x3
+#define SPI_MEM_SPI_FMEM_SPICLK_FUN_DRV_S  2
+/* SPI_MEM_SPI_SMEM_SPICLK_FUN_DRV : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: The driver of SPI_CLK PAD  is controlled by the bits SPI_SMEM_SPICLK_FUN_DRV[1:0
+] when the bit SPI_SPICLK_PAD_DRV_CTL_EN is set and MSPI accesses to external RA
+M..*/
+#define SPI_MEM_SPI_SMEM_SPICLK_FUN_DRV    0x00000003
+#define SPI_MEM_SPI_SMEM_SPICLK_FUN_DRV_M  ((SPI_MEM_SPI_SMEM_SPICLK_FUN_DRV_V)<<(SPI_MEM_SPI_SMEM_SPICLK_FUN_DRV_S))
+#define SPI_MEM_SPI_SMEM_SPICLK_FUN_DRV_V  0x3
+#define SPI_MEM_SPI_SMEM_SPICLK_FUN_DRV_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SPI_MEM_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_mem_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_mem_struct.h
new file mode 100644
index 00000000000..aa6f388653c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_mem_struct.h
@@ -0,0 +1,781 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_SPI_MEM_STRUCT_H_
+#define _SOC_SPI_MEM_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct spi_mem_dev_s {
+    union {
+        struct {
+            uint32_t reserved0                     :    17;  /*reserved*/
+            uint32_t flash_pe                      :    1;  /*In user mode, it is set to indicate that program/erase operation will be triggered. The bit is combined with SPI_MEM_USR bit. The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t usr                           :    1;  /*User define command enable.  An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t flash_hpm                     :    1;  /*Drive Flash into high performance mode.  The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t flash_res                     :    1;  /*This bit combined with SPI_MEM_RESANDRES bit releases Flash from the power-down state or high performance mode and obtains the devices ID. The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t flash_dp                      :    1;  /*Drive Flash into power down.  An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t flash_ce                      :    1;  /*Chip erase enable. Chip erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t flash_be                      :    1;  /*Block erase enable(32KB) .  Block erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t flash_se                      :    1;  /*Sector erase enable(4KB). Sector erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t flash_pp                      :    1;  /*Page program enable(1 byte ~64 bytes data to be programmed). Page program operation  will be triggered when the bit is set. The bit will be cleared once the operation done .1: enable 0: disable. */
+            uint32_t flash_wrsr                    :    1;  /*Write status register enable.   Write status operation  will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t flash_rdsr                    :    1;  /*Read status register-1.  Read status operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t flash_rdid                    :    1;  /*Read JEDEC ID . Read ID command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable. */
+            uint32_t flash_wrdi                    :    1;  /*Write flash disable. Write disable command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable. */
+            uint32_t flash_wren                    :    1;  /*Write flash enable.  Write enable command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable. */
+            uint32_t flash_read                    :    1;  /*Read flash enable. Read flash operation will be triggered when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable. */
+        };
+        uint32_t val;
+    } cmd;
+    uint32_t addr;
+    union {
+        struct {
+            uint32_t reserved0                     :    3;  /*reserved*/
+            uint32_t fdummy_out                    :    1;  /*In the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.*/
+            uint32_t fdout_oct                     :    1;  /*Set this bit to enable 8-bit-mode(8-bm) in DOUT phase.*/
+            uint32_t fdin_oct                      :    1;  /*Set this bit to enable 8-bit-mode(8-bm) in DIN phase.*/
+            uint32_t faddr_oct                     :    1;  /*Set this bit to enable 8-bit-mode(8-bm) in ADDR phase.*/
+            uint32_t fcmd_dual                     :    1;  /*Set this bit to enable 2-bit-mode(2-bm) in CMD phase.*/
+            uint32_t fcmd_quad                     :    1;  /*Set this bit to enable 4-bit-mode(4-bm) in CMD phase.*/
+            uint32_t fcmd_oct                      :    1;  /*Set this bit to enable 8-bit-mode(8-bm) in CMD phase.*/
+            uint32_t fcs_crc_en                    :    1;  /*For SPI1,  initialize crc32 module before writing encrypted data to flash. Active low.*/
+            uint32_t tx_crc_en                     :    1;  /*For SPI1,  enable crc32 when writing encrypted data to flash. 1: enable 0:disable*/
+            uint32_t reserved12                    :    1;  /*reserved*/
+            uint32_t fastrd_mode                   :    1;  /*This bit should be set when SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_MEM_FREAD_QUAD or SPI_MEM_FREAD_DUAL is set.*/
+            uint32_t fread_dual                    :    1;  /*In hardware 0x3B read operation, DIN phase apply 2 signals. 1: enable 0: disable. */
+            uint32_t resandres                     :    1;  /*The Device ID is read out to SPI_MEM_RD_STATUS register,  this bit combine with spi_mem_flash_res bit. 1: enable 0: disable. */
+            uint32_t reserved16                    :    2;  /*reserved*/
+            uint32_t q_pol                         :    1;  /*The bit is used to set MISO line polarity, 1: high 0, low*/
+            uint32_t d_pol                         :    1;  /*The bit is used to set MOSI line polarity, 1: high 0, low*/
+            uint32_t fread_quad                    :    1;  /*In hardware 0x6B read operation, DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable. */
+            uint32_t wp                            :    1;  /*Write protect signal output when SPI is idle.  1: output high, 0: output low. */
+            uint32_t wrsr_2b                       :    1;  /*Two bytes data will be written to status register when it is set. 1: enable 0: disable. */
+            uint32_t fread_dio                     :    1;  /*In hardware 0xBB read operation, ADDR phase and DIN phase apply 2 signals(2-bit-mode). 1: enable 0: disable. */
+            uint32_t fread_qio                     :    1;  /*In hardware 0xEB read operation, ADDR phase and DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable. */
+            uint32_t reserved25                    :    7;  /*reserved*/
+        };
+        uint32_t val;
+    } ctrl;
+    union {
+        struct {
+            uint32_t clk_mode                      :    2;  /*SPI Bus clock (SPI_CLK) mode bits. 0: SPI Bus clock (SPI_CLK) is off when CS inactive 1: SPI_CLK is delayed one cycle after SPI_CS inactive 2: SPI_CLK is delayed two cycles after SPI_CS inactive 3: SPI_CLK is always on.*/
+            uint32_t cs_hold_dly_res               :    10;  /*After RES/DP/HPM/PES/PER command is sent, SPI1 may waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4 or * 256) SPI_CLK cycles.*/
+            uint32_t reserved2                     :    18;  /*reserved*/
+            uint32_t rxfifo_rst                    :    1;  /*SPI0 RX FIFO reset signal. Set this bit and clear it before SPI0 transfer starts.*/
+            uint32_t reserved31                    :    1;  /*reserved*/
+        };
+        uint32_t val;
+    } ctrl1;
+    union {
+        struct {
+            uint32_t cs_setup_time                 :    5;  /*(cycles-1) of PREP phase by SPI_CLK, which is the SPI_CS setup time. These bits are combined with SPI_MEM_CS_SETUP bit.*/
+            uint32_t cs_hold_time                  :    5;  /*SPI Bus CS (SPI_CS) signal is delayed to inactive by SPI Bus clock (SPI_CLK), which is the SPI_CS hold time in non-ECC mode. These bits are combined with SPI_MEM_CS_HOLD bit.*/
+            uint32_t ecc_cs_hold_time              :    3;  /*SPI_MEM_CS_HOLD_TIME + SPI_MEM_ECC_CS_HOLD_TIME is the SPI_CS hold cycle in ECC mode when accessed flash.*/
+            uint32_t ecc_skip_page_corner          :    1;  /*1: MSPI skips page corner when accesses flash. 0: Not skip page corner when accesses flash.*/
+            uint32_t ecc_16to18_byte_en            :    1;  /*Set this bit to enable MSPI ECC 16 bytes data with 2 ECC bytes mode when accesses flash.*/
+            uint32_t reserved15                    :    10;  /*reserved*/
+            uint32_t cs_hold_delay                 :    6;  /*These bits are used to set the minimum CS high time tSHSL between SPI burst transfer when accesses to flash. tSHSL is (SPI_MEM_CS_HOLD_DELAY[5:0] + 1) MSPI core clock cycles.*/
+            uint32_t sync_reset                    :    1;  /*The FSM will be reset.*/
+        };
+        uint32_t val;
+    } ctrl2;
+    union {
+        struct {
+            uint32_t clkcnt_l                      :    8;  /*It must equal to the value of SPI_MEM_CLKCNT_N. */
+            uint32_t clkcnt_h                      :    8;  /*It must be a floor value of ((SPI_MEM_CLKCNT_N+1)/2-1).*/
+            uint32_t clkcnt_n                      :    8;  /*When SPI0 accesses flash, f_SPI_CLK = f_MSPI_CORE_CLK/(SPI_MEM_CLKCNT_N+1)*/
+            uint32_t reserved24                    :    7;  /*reserved*/
+            uint32_t clk_equ_sysclk                :    1;  /*When SPI0 accesses flash, set this bit in 1-division mode, f_SPI_CLK = f_MSPI_CORE_CLK.*/
+        };
+        uint32_t val;
+    } clock;
+    union {
+        struct {
+            uint32_t reserved0                     :    6;  /*reserved*/
+            uint32_t cs_hold                       :    1;  /*Set this bit to keep SPI_CS low when MSPI is in DONE state.*/
+            uint32_t cs_setup                      :    1;  /*Set this bit to keep SPI_CS low when MSPI is in PREP state.*/
+            uint32_t reserved8                     :    1;  /*reserved*/
+            uint32_t ck_out_edge                   :    1;  /*This bit, combined with SPI_MEM_CK_IDLE_EDGE bit, is used to change the clock mode 0~3 of SPI_CLK. */
+            uint32_t reserved10                    :    2;  /*reserved*/
+            uint32_t fwrite_dual                   :    1;  /*Set this bit to enable 2-bm in DOUT phase in SPI1 write operation.*/
+            uint32_t fwrite_quad                   :    1;  /*Set this bit to enable 4-bm in DOUT phase in SPI1 write operation.*/
+            uint32_t fwrite_dio                    :    1;  /*Set this bit to enable 2-bm in ADDR and DOUT phase in SPI1 write operation.*/
+            uint32_t fwrite_qio                    :    1;  /*Set this bit to enable 4-bit-mode(4-bm) in ADDR and DOUT phase in SPI1 write operation.*/
+            uint32_t reserved16                    :    8;  /*reserved*/
+            uint32_t usr_miso_highpart             :    1;  /*DIN phase only access to high-part of the buffer SPI_MEM_W8_REG~SPI_MEM_W15_REG. 1: enable 0: disable. */
+            uint32_t usr_mosi_highpart             :    1;  /*DOUT phase only access to high-part of the buffer SPI_MEM_W8_REG~SPI_MEM_W15_REG. 1: enable 0: disable. */
+            uint32_t usr_dummy_idle                :    1;  /*SPI_CLK is disabled(No clock edges) in DUMMY phase when the bit is enable.*/
+            uint32_t usr_mosi                      :    1;  /*Set this bit to enable the DOUT phase of an write-data operation.*/
+            uint32_t usr_miso                      :    1;  /*Set this bit to enable enable the DIN phase of a read-data operation.*/
+            uint32_t usr_dummy                     :    1;  /*Set this bit to enable enable the DUMMY phase of an operation.*/
+            uint32_t usr_addr                      :    1;  /*Set this bit to enable enable the ADDR phase of an operation.*/
+            uint32_t usr_command                   :    1;  /*Set this bit to enable enable the CMD phase of an operation.*/
+        };
+        uint32_t val;
+    } user;
+    union {
+        struct {
+            uint32_t usr_dummy_cyclelen            :    6;  /*The SPI_CLK cycle length minus 1 of DUMMY phase.*/
+            uint32_t reserved6                     :    20;  /*reserved*/
+            uint32_t usr_addr_bitlen               :    6;  /*The length in bits of ADDR phase. The register value shall be (bit_num-1).*/
+        };
+        uint32_t val;
+    } user1;
+    union {
+        struct {
+            uint32_t usr_command_value             :    16;  /*The value of user defined(USR) command.*/
+            uint32_t reserved16                    :    12;  /*reserved*/
+            uint32_t usr_command_bitlen            :    4;  /*The length in bits of CMD phase. The register value shall be (bit_num-1)*/
+        };
+        uint32_t val;
+    } user2;
+    union {
+        struct {
+            uint32_t usr_mosi_bit_len              :    10;  /*The length in bits of DOUT phase. The register value shall be (bit_num-1).*/
+            uint32_t reserved10                    :    22;  /*reserved*/
+        };
+        uint32_t val;
+    } mosi_dlen;
+    union {
+        struct {
+            uint32_t usr_miso_bit_len              :    10;  /*The length in bits of DIN phase. The register value shall be (bit_num-1).*/
+            uint32_t reserved10                    :    22;  /*reserved*/
+        };
+        uint32_t val;
+    } miso_dlen;
+    union {
+        struct {
+            uint32_t status                        :    16;  /*The value is stored when set SPI_MEM_FLASH_RDSR bit and SPI_MEM_FLASH_RES bit.*/
+            uint32_t wb_mode                       :    8;  /*Mode bits in the flash fast read mode  it is combined with SPI_MEM_FASTRD_MODE bit.*/
+            uint32_t reserved24                    :    8;  /*reserved*/
+        };
+        uint32_t val;
+    } rd_status;
+    uint32_t ext_addr;
+    union {
+        struct {
+            uint32_t cs0_dis                       :    1;  /*Set this bit to raise high SPI_CS pin, which means that the SPI device(flash) connected to SPI_CS is in low level when SPI1 transfer starts.*/
+            uint32_t cs1_dis                       :    1;  /*Set this bit to raise high SPI_CS1 pin, which means that the SPI device(Ext_RAM) connected to SPI_CS1 is in low level when SPI1 transfer starts.*/
+            uint32_t reserved0                     :    5;  /*reserved*/
+            uint32_t fsub_pin                      :    1;  /*Flash is connected to SPI SUBPIN bus.*/
+            uint32_t ssub_pin                      :    1;  /*Ext_RAM is connected to SPI SUBPIN bus.*/
+            uint32_t ck_idle_edge                  :    1;  /*1: SPI_CLK line is high when idle. 0: SPI_CLK line is low when idle */
+            uint32_t cs_keep_active                :    1;  /*SPI_CS line keep low when the bit is set.*/
+            uint32_t auto_per                      :    1;  /*Set this bit to enable auto PER function. Hardware will sent out PER command if PES command is sent.*/
+            uint32_t reserved12                    :    20;  /*reserved*/
+        };
+        uint32_t val;
+    } misc;
+    uint32_t tx_crc;
+    union {
+        struct {
+            uint32_t req_en                        :    1;  /*Set this bit to enable Cache's access and SPI0's transfer.*/
+            uint32_t usr_cmd_4byte                 :    1;  /*Set this bit to enable SPI0 read flash with 32 bits address. The value of SPI_MEM_USR_ADDR_BITLEN should be 31.*/
+            uint32_t flash_usr_cmd                 :    1;  /*1: The command value of SPI0 reads flash is SPI_MEM_USR_COMMAND_VALUE. 0: Hardware read command value, controlled by SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_MEM_FREAD_QUAD, SPI_MEM_FREAD_DUAL and SPI_MEM_FASTRD_MODE bits.*/
+            uint32_t fdin_dual                     :    1;  /*When SPI0 accesses to flash, set this bit to enable 2-bm in DIN phase.*/
+            uint32_t fdout_dual                    :    1;  /*When SPI0 accesses to flash, set this bit to enable 2-bm in DOUT phase.*/
+            uint32_t faddr_dual                    :    1;  /*When SPI0 accesses to flash, set this bit to enable 2-bm in ADDR phase.*/
+            uint32_t fdin_quad                     :    1;  /*When SPI0 accesses to flash, set this bit to enable 4-bm in DIN phase.*/
+            uint32_t fdout_quad                    :    1;  /*When SPI0 accesses to flash, set this bit to enable 4-bm in DOUT phase.*/
+            uint32_t faddr_quad                    :    1;  /*When SPI0 accesses to flash, set this bit to enable 4-bm in ADDR phase.*/
+            uint32_t reserved9                     :    23;  /*reserved*/
+        };
+        uint32_t val;
+    } cache_fctrl;
+    union {
+        struct {
+            uint32_t usr_scmd_4byte                :    1;  /*Set this bit to enable SPI0 read Ext_RAM with 32 bits address. The value of SPI_MEM_SRAM_ADDR_BITLEN should be 31.*/
+            uint32_t usr_sram_dio                  :    1;  /*Set the bit to enable 2-bm in all the phases of SPI0 Ext_RAM transfer.*/
+            uint32_t usr_sram_qio                  :    1;  /*Set the bit to enable QPI mode in all SPI0 Ext_RAM transfer.*/
+            uint32_t usr_wr_sram_dummy             :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable DUMMY phase in write operations.*/
+            uint32_t usr_rd_sram_dummy             :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable DUMMY phase in read operations.*/
+            uint32_t usr_rcmd                      :    1;  /*1: The command value of SPI0 read Ext_RAM is SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE. 0: The value is 0x2.*/
+            uint32_t sram_rdummy_cyclelen          :    6;  /*When SPI0 accesses to Ext_RAM, it is the SPI_CLK cycles minus 1 of DUMMY phase in read data transfer.*/
+            uint32_t reserved12                    :    2;  /*reserved*/
+            uint32_t sram_addr_bitlen              :    6;  /*When SPI0 accesses to Ext_RAM, it is the length in bits of ADDR phase. The register value shall be (bit_num-1).*/
+            uint32_t usr_wcmd                      :    1;  /*1: The command value of SPI0 write Ext_RAM is SPI_MEM_CACHE_SRAM_USR_RD_CMD_VALUE. 0: The value is 0x3.*/
+            uint32_t sram_oct                      :    1;  /*Set the bit to enable OPI mode in all SPI0 Ext_RAM transfer.*/
+            uint32_t sram_wdummy_cyclelen          :    6;  /*When SPI0 accesses to Ext_RAM, it is the SPI_CLK cycles minus 1 of DUMMY phase in write data transfer.*/
+            uint32_t reserved28                    :    4;  /*reserved*/
+        };
+        uint32_t val;
+    } cache_sctrl;
+    union {
+        struct {
+            uint32_t sclk_mode                     :    2;  /*SPI_CLK mode bits  when SPI0 accesses to Ext_RAM. 0: SPI_CLK is off when CS inactive 1: SPI_CLK is delayed one cycle after CS inactive 2: SPI_CLK is delayed two cycles after CS inactive 3: SPI_CLK is always on.*/
+            uint32_t swb_mode                      :    8;  /*Mode bits when SPI0 accesses to Ext_RAM.*/
+            uint32_t sdin_dual                     :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DIN phase.*/
+            uint32_t sdout_dual                    :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DOUT phase.*/
+            uint32_t saddr_dual                    :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in ADDR phase.*/
+            uint32_t scmd_dual                     :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in CMD phase.*/
+            uint32_t sdin_quad                     :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DIN phase.*/
+            uint32_t sdout_quad                    :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DOUT phase.*/
+            uint32_t saddr_quad                    :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in ADDR phase.*/
+            uint32_t scmd_quad                     :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in CMD phase.*/
+            uint32_t sdin_oct                      :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DIN phase.*/
+            uint32_t sdout_oct                     :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DOUT phase.*/
+            uint32_t saddr_oct                     :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in ADDR phase.*/
+            uint32_t scmd_oct                      :    1;  /*When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in CMD phase.*/
+            uint32_t sdummy_out                    :    1;  /*When SPI0 accesses to Ext_RAM, in the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.*/
+            uint32_t reserved23                    :    9;  /*reserved*/
+        };
+        uint32_t val;
+    } sram_cmd;
+    union {
+        struct {
+            uint32_t usr_rd_cmd_value              :    16;  /*When SPI0 reads Ext_RAM, it is the command value of CMD phase.*/
+            uint32_t reserved16                    :    12;  /*reserved*/
+            uint32_t usr_rd_cmd_bitlen             :    4;  /*When SPI0 reads Ext_RAM, it is the length in bits of CMD phase. The register value shall be (bit_num-1).*/
+        };
+        uint32_t val;
+    } sram_drd_cmd;
+    union {
+        struct {
+            uint32_t usr_wr_cmd_value              :    16;  /*When SPI0 writes Ext_RAM, it is the command value of CMD phase.*/
+            uint32_t reserved16                    :    12;  /*reserved*/
+            uint32_t usr_wr_cmd_bitlen             :    4;  /*When SPI0 writes Ext_RAM, it is the length in bits of CMD phase. The register value shall be (bit_num-1).*/
+        };
+        uint32_t val;
+    } sram_dwr_cmd;
+    union {
+        struct {
+            uint32_t cnt_l                         :    8;  /*It must equal to the value of SPI_MEM_SCLKCNT_N. */
+            uint32_t cnt_h                         :    8;  /*It must be a floor value of ((SPI_MEM_SCLKCNT_N+1)/2-1).*/
+            uint32_t cnt_n                         :    8;  /*When SPI0 accesses to Ext_RAM, f_SPI_CLK = f_MSPI_CORE_CLK/(SPI_MEM_SCLKCNT_N+1)*/
+            uint32_t reserved24                    :    7;  /*reserved*/
+            uint32_t equ_sysclk                    :    1;  /*When SPI0 accesses to Ext_RAM, set this bit in 1-division mode, f_SPI_CLK = f_MSPI_CORE_CLK.*/
+        };
+        uint32_t val;
+    } sram_clk;
+    union {
+        struct {
+            uint32_t st                            :    3;  /*The status of SPI0 state machine. 0: idle state(IDLE), 1: preparation state(PREP), 2: send command state(CMD), 3: send address state(ADDR), 4: red data state(DIN), 5:write data state(DOUT), 6: wait state(DUMMY), 7: done state(DONE).*/
+            uint32_t reserved3                     :    29;  /*reserved*/
+        };
+        uint32_t val;
+    } fsm;
+    uint32_t data_buf[16];                                                /*data buffer*/
+    union {
+        struct {
+            uint32_t waiti_en                      :    1;  /*Set this bit to enable auto-waiting flash idle operation when PP/SE/BE/CE/WRSR/PES command is sent.*/
+            uint32_t waiti_dummy                   :    1;  /*Set this bit to enable DUMMY phase in auto wait flash idle transfer(RDSR).*/
+            uint32_t waiti_cmd                     :    8;  /*The command value of auto wait flash idle transfer(RDSR).*/
+            uint32_t waiti_dummy_cyclelen          :    6;  /*The dummy cycle length when wait flash idle(RDSR).*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } flash_waiti_ctrl;
+    union {
+        struct {
+            uint32_t flash_per                     :    1;  /*program erase resume bit, program erase suspend operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t flash_pes                     :    1;  /*program erase suspend bit, program erase suspend operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. */
+            uint32_t flash_per_wait_en             :    1;  /*Set this bit to add delay time after program erase resume(PER) is sent.*/
+            uint32_t flash_pes_wait_en             :    1;  /*Set this bit to add delay time after program erase suspend(PES) command is sent.*/
+            uint32_t pes_per_en                    :    1;  /*Set this bit to enable PES transfer trigger PES transfer option.*/
+            uint32_t pesr_idle_en                  :    1;  /*1: Separate PER flash wait idle and PES flash wait idle. 0: Not separate.*/
+            uint32_t reserved6                     :    26;  /*reserved*/
+        };
+        uint32_t val;
+    } flash_sus_cmd;
+    union {
+        struct {
+            uint32_t flash_pes_en                  :    1;  /*Set this bit to enable auto-suspend function.*/
+            uint32_t flash_per_command             :    8;  /*Program/Erase resume command value.*/
+            uint32_t flash_pes_command             :    8;  /*Program/Erase suspend command value.*/
+            uint32_t reserved17                    :    15;  /*reserved*/
+        };
+        uint32_t val;
+    } flash_sus_ctrl;
+    union {
+        struct {
+            uint32_t flash_sus                     :    1;  /*The status of flash suspend. This bit is set when PES command is sent, and cleared when PER is sent. Only used in SPI1.*/
+            uint32_t reserved1                     :    1;  /*reserved*/
+            uint32_t flash_hpm_dly_256             :    1;  /*1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 256) SPI_CLK cycles after HPM command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after HPM command is sent.*/
+            uint32_t flash_res_dly_256             :    1;  /*1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 256) SPI_CLK cycles after RES command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after RES command is sent.*/
+            uint32_t flash_dp_dly_256              :    1;  /*1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 256) SPI_CLK cycles after DP command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after DP command is sent.*/
+            uint32_t flash_per_dly_256             :    1;  /*Valid when SPI_MEM_FLASH_PER_WAIT_EN is 1. 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 256) SPI_CLK cycles after PER command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after PER command is sent.*/
+            uint32_t flash_pes_dly_256             :    1;  /*Valid when SPI_MEM_FLASH_PES_WAIT_EN is 1. 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 256) SPI_CLK cycles after PES command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after PES command is sent.*/
+            uint32_t reserved7                     :    25;  /*reserved*/
+        };
+        uint32_t val;
+    } sus_status;
+    union {
+        struct {
+            uint32_t timing_clk_ena                :    1;  /*Set this bit to power on HCLK. When PLL is powered on, the frequency of HCLK equals to that of PLL. Otherwise, the frequency equals to that of XTAL.*/
+            uint32_t timing_cali                   :    1;  /*Set this bit to add extra SPI_CLK cycles in DUMMY phase for all reading operations.*/
+            uint32_t extra_dummy_cyclelen          :    3;  /*Extra SPI_CLK cycles added in DUMMY phase for timing compensation, when SPI0 accesses to flash. Active when SPI_MEM_TIMING_CALI bit is set.*/
+            uint32_t reserved5                     :    27;  /*reserved*/
+        };
+        uint32_t val;
+    } timing_cali;
+    union {
+        struct {
+            uint32_t din0_mode                     :    3;  /*SPI_D input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t din1_mode                     :    3;  /*SPI_Q input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t din2_mode                     :    3;  /*SPI_WP input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t din3_mode                     :    3;  /*SPI_HD input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t din4_mode                     :    3;  /*SPI_IO4 input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t din5_mode                     :    3;  /*SPI_IO5 input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t din6_mode                     :    3;  /*SPI_IO6 input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t din7_mode                     :    3;  /*SPI_IO7 input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t dins_mode                     :    3;  /*SPI_DQS input delay mode. 0: No delay. 1: Delay for (SPI_MEM_DINS_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_MEM_DINS_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_MEM_DINS_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_MEM_DINS_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_MEM_DINS_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t reserved27                    :    5;  /*reserved*/
+        };
+        uint32_t val;
+    } din_mode;
+    union {
+        struct {
+            uint32_t din0_num                      :    2;  /*SPI_D input delay number.*/
+            uint32_t din1_num                      :    2;  /*SPI_Q input delay number.*/
+            uint32_t din2_num                      :    2;  /*SPI_WP input delay number.*/
+            uint32_t din3_num                      :    2;  /*SPI_HD input delay number.*/
+            uint32_t din4_num                      :    2;  /*SPI_IO4 input delay number.*/
+            uint32_t din5_num                      :    2;  /*SPI_IO5 input delay number.*/
+            uint32_t din6_num                      :    2;  /*SPI_IO6 input delay number.*/
+            uint32_t din7_num                      :    2;  /*SPI_IO7 input delay number.*/
+            uint32_t dins_num                      :    2;  /*SPI_DQS input delay number.*/
+            uint32_t reserved18                    :    14;  /*reserved*/
+        };
+        uint32_t val;
+    } din_num;
+    union {
+        struct {
+            uint32_t dout0_mode                    :    1;  /*SPI_D output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t dout1_mode                    :    1;  /*SPI_Q output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t dout2_mode                    :    1;  /*SPI_WP output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t dout3_mode                    :    1;  /*SPI_HD output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t dout4_mode                    :    1;  /*SPI_IO4 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t dout5_mode                    :    1;  /*SPI_IO5 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t dout6_mode                    :    1;  /*SPI_IO6 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t dout7_mode                    :    1;  /*SPI_IO7 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t douts_mode                    :    1;  /*SPI_DQS output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t reserved9                     :    23;  /*reserved*/
+        };
+        uint32_t val;
+    } dout_mode;
+    uint32_t reserved_b8;
+    union {
+        struct {
+            uint32_t smem_timing_clk_ena           :    1;  /*Set this bit to power on HCLK. When PLL is powered on, the frequency of HCLK equals to that of PLL. Otherwise, the frequency equals to that of XTAL.*/
+            uint32_t smem_timing_cali              :    1;  /*Set this bit to add extra SPI_CLK cycles in DUMMY phase for all reading operations.*/
+            uint32_t smem_extra_dummy_cyclelen     :    3;  /*Extra SPI_CLK cycles added in DUMMY phase for timing compensation, when SPI0 accesses to Ext_RAM. Active when SPI_SMEM_TIMING_CALI bit is set.*/
+            uint32_t reserved5                     :    27;  /*reserved*/
+        };
+        uint32_t val;
+    } spi_smem_timing_cali;
+    union {
+        struct {
+            uint32_t smem_din0_mode                :    3;  /*SPI_D input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_din1_mode                :    3;  /*SPI_Q input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_din2_mode                :    3;  /*SPI_WP input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_din3_mode                :    3;  /*SPI_HD input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_din4_mode                :    3;  /*SPI_IO4 input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_din5_mode                :    3;  /*SPI_IO5 input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_din6_mode                :    3;  /*SPI_IO6 input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_din7_mode                :    3;  /*SPI_IO7 input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DIN$n_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_dins_mode                :    3;  /*SPI_DQS input delay mode. 0: No delay. 1: Delay for (SPI_SMEM_DINS_NUM+1) cycles at MSPI_CORE_CLK negative edge. 2: Delay for (SPI_SMEM_DINS_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK positive edge. 3: Delay for (SPI_SMEM_DINS_NUM+1) cycles at HCLK positive edge and one cycle at MSPI_CORE_CLK negative edge. 4: Delay for (SPI_SMEM_DINS_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK positive edge. 5: Delay for (SPI_SMEM_DINS_NUM+1) cycles at HCLK negative edge and one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t reserved27                    :    5;  /*reserved*/
+        };
+        uint32_t val;
+    } spi_smem_din_mode;
+    union {
+        struct {
+            uint32_t smem_din0_num                 :    2;  /*SPI_D input delay number.*/
+            uint32_t smem_din1_num                 :    2;  /*SPI_Q input delay number.*/
+            uint32_t smem_din2_num                 :    2;  /*SPI_WP input delay number.*/
+            uint32_t smem_din3_num                 :    2;  /*SPI_HD input delay number.*/
+            uint32_t smem_din4_num                 :    2;  /*SPI_IO4 input delay number.*/
+            uint32_t smem_din5_num                 :    2;  /*SPI_IO5 input delay number.*/
+            uint32_t smem_din6_num                 :    2;  /*SPI_IO6 input delay number.*/
+            uint32_t smem_din7_num                 :    2;  /*SPI_IO7 input delay number.*/
+            uint32_t smem_dins_num                 :    2;  /*SPI_DQS input delay number.*/
+            uint32_t reserved18                    :    14;  /*reserved*/
+        };
+        uint32_t val;
+    } spi_smem_din_num;
+    union {
+        struct {
+            uint32_t smem_dout0_mode               :    1;  /*SPI_D output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_dout1_mode               :    1;  /*SPI_Q output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_dout2_mode               :    1;  /*SPI_WP output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_dout3_mode               :    1;  /*SPI_HD output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_dout4_mode               :    1;  /*SPI_IO4 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_dout5_mode               :    1;  /*SPI_IO5 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_dout6_mode               :    1;  /*SPI_IO6 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_dout7_mode               :    1;  /*SPI_IO7 output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t smem_douts_mode               :    1;  /*SPI_DQS output delay mode. 0: No delay. 1: Delay one cycle at MSPI_CORE_CLK negative edge.*/
+            uint32_t reserved9                     :    23;  /*reserved*/
+        };
+        uint32_t val;
+    } spi_smem_dout_mode;
+    union {
+        struct {
+            uint32_t ecc_err_int_num               :    8;  /*Set the error times of MSPI ECC read to generate MSPI SPI_MEM_ECC_ERR_INT interrupt.*/
+            uint32_t fmem_ecc_err_int_en           :    1;  /*Set this bit to calculate the error times of MSPI ECC read when accesses to flash.*/
+            uint32_t reserved9                     :    23;  /*reserved*/
+        };
+        uint32_t val;
+    } ecc_ctrl;
+    uint32_t ecc_err_addr;
+    union {
+        struct {
+            uint32_t reserved0                     :    6;  /*reserved*/
+            uint32_t ecc_data_err_bit              :    7;  /*It records the first ECC data error bit number when SPI_FMEM_ECC_ERR_INT_EN/SPI_SMEM_ECC_ERR_INT_EN is set and accessed to flash/Ext_RAM. The value ranges from 0~127, corresponding to the bit number in 16 data bytes. It is cleared by SPI_MEM_ECC_ERR_INT_CLR bit.*/
+            uint32_t ecc_chk_err_bit               :    3;  /*When SPI_MEM_ECC_BYTE_ERR is set, these bits show the error bit number of ECC byte.*/
+            uint32_t ecc_byte_err                  :    1;  /*It records the first ECC byte error when SPI_FMEM_ECC_ERR_INT_EN/SPI_SMEM_ECC_ERR_INT_EN is set and accessed to flash/Ext_RAM. It is cleared by SPI_MEM_ECC_ERR_INT_CLR bit.*/
+            uint32_t ecc_err_cnt                   :    8;  /*This bits show the error times of MSPI ECC read, including ECC byte error and data byte error. It is cleared by when  SPI_MEM_ECC_ERR_INT_CLR bit is set. */
+            uint32_t reserved25                    :    7;  /*reserved*/
+        };
+        uint32_t val;
+    } ecc_err_bit;
+    uint32_t reserved_d8;
+    union {
+        struct {
+            uint32_t smem_cs_setup                 :    1;  /*Set this bit to keep SPI_CS low when MSPI is in PREP state.*/
+            uint32_t smem_cs_hold                  :    1;  /*Set this bit to keep SPI_CS low when MSPI is in DONE state.*/
+            uint32_t smem_cs_setup_time            :    5;  /*(cycles-1) of PREP phase by SPI_CLK, which is the SPI_CS setup time. These bits are combined with SPI_MEM_CS_SETUP bit.*/
+            uint32_t smem_cs_hold_time             :    5;  /*SPI Bus CS (SPI_CS) signal is delayed to inactive by SPI Bus clock (SPI_CLK), which is the SPI_CS hold time in non-ECC mode. These bits are combined with SPI_MEM_CS_HOLD bit.*/
+            uint32_t smem_ecc_cs_hold_time         :    3;  /*SPI_SMEM_CS_HOLD_TIME + SPI_SMEM_ECC_CS_HOLD_TIME is the MSPI CS hold cycles in ECC mode when accesses to external RAM.*/
+            uint32_t smem_ecc_skip_page_corner     :    1;  /*1: MSPI skips page corner when accesses to external RAM. 0: Not skip page corner when accesses to external RAM.*/
+            uint32_t smem_ecc_16to18_byte_en       :    1;  /*Set this bit to enable MSPI ECC 16 bytes data with 2 ECC bytes mode when accesses to external RAM.*/
+            uint32_t reserved17                    :    7;  /*reserved*/
+            uint32_t smem_ecc_err_int_en           :    1;  /*Set this bit to calculate the error times of MSPI ECC read when accesses to external RAM.*/
+            uint32_t smem_cs_hold_delay            :    6;  /*These bits are used to set the minimum CS high time tSHSL between SPI burst transfer when accesses to external RAM. tSHSL is (SPI_SMEM_CS_HOLD_DELAY[5:0] + 1) MSPI core clock cycles.*/
+            uint32_t reserved31                    :    1;  /*reserved*/
+        };
+        uint32_t val;
+    } spi_smem_ac;
+    union {
+        struct {
+            uint32_t fmem_ddr_en                   :    1;  /*1: in ddr mode,  0 in sdr mode*/
+            uint32_t fmem_var_dummy                :    1;  /*Set the bit to enable variable dummy cycle in DDR mode.*/
+            uint32_t fmem_ddr_rdat_swp             :    1;  /*Set the bit to reorder RX data of the word in DDR mode.*/
+            uint32_t fmem_ddr_wdat_swp             :    1;  /*Set the bit to swap TX data of a word in DDR mode.*/
+            uint32_t fmem_ddr_cmd_dis              :    1;  /*the bit is used to disable dual edge in CMD phase when ddr mode.*/
+            uint32_t fmem_outminbytelen            :    7;  /*It is the minimum output data length in the panda device.*/
+            uint32_t fmem_tx_ddr_msk_en            :    1;  /*Set this bit to mask the first or the last byte in MSPI ECC DDR write mode, when accesses to flash.*/
+            uint32_t fmem_rx_ddr_msk_en            :    1;  /*Set this bit to mask the first or the last byte in MSPI ECC DDR read mode, when accesses to flash.*/
+            uint32_t fmem_usr_ddr_dqs_thd          :    7;  /*The delay number of data strobe which from memory based on SPI_CLK.*/
+            uint32_t fmem_ddr_dqs_loop             :    1;  /*1: Use internal signal  as data strobe, the strobe can not be delayed by input timing module. 0: Use input SPI_DQS signal from PAD as data strobe, the strobe can be delayed by input timing module*/
+            uint32_t fmem_ddr_dqs_loop_mode        :    1;  /*When SPI_FMEM_DDR_DQS_LOOP and SPI_FMEM_DDR_EN are set, 1: Use internal SPI_CLK  as data strobe. 0: Use internal ~SPI_CLK  as data strobe. Otherwise this bit is not active.*/
+            uint32_t reserved23                    :    1;  /*reserved*/
+            uint32_t fmem_clk_diff_en              :    1;  /*Set this bit to enable the differential SPI_CLK#.*/
+            uint32_t fmem_hyperbus_mode            :    1;  /*Set this bit to enable the SPI HyperBus mode.*/
+            uint32_t fmem_dqs_ca_in                :    1;  /*Set this bit to enable the input of SPI_DQS signal in SPI phases of CMD and ADDR.*/
+            uint32_t fmem_hyperbus_dummy_2x        :    1;  /*Set this bit to enable the vary dummy function in SPI HyperBus mode, when SPI0 accesses to flash or SPI1 accesses flash or sram.*/
+            uint32_t fmem_clk_diff_inv             :    1;  /*Set this bit to invert SPI_DIFF when accesses to flash. .*/
+            uint32_t fmem_octa_ram_addr            :    1;  /*Set this bit to enable octa_ram address out when accesses to flash, which means ADDR_OUT[31:0] = {spi_usr_addr_value[25:4], 6'd0, spi_usr_addr_value[3:1], 1'b0}.*/
+            uint32_t fmem_hyperbus_ca              :    1;  /*Set this bit to enable HyperRAM address out when accesses to flash, which means ADDR_OUT[31:0] = {spi_usr_addr_value[19:4], 13'd0, spi_usr_addr_value[3:1]}.*/
+            uint32_t reserved31                    :    1;  /*reserved*/
+        };
+        uint32_t val;
+    } ddr;
+    union {
+        struct {
+            uint32_t smem_ddr_en                   :    1;  /*1: in ddr mode,  0 in sdr mode*/
+            uint32_t smem_var_dummy                :    1;  /*Set the bit to enable variable dummy cycle in spi ddr mode.*/
+            uint32_t smem_ddr_rdat_swp             :    1;  /*Set the bit to reorder rx data of the word in spi ddr mode.*/
+            uint32_t smem_ddr_wdat_swp             :    1;  /*Set the bit to reorder tx data of the word in spi ddr mode.*/
+            uint32_t smem_ddr_cmd_dis              :    1;  /*the bit is used to disable dual edge in CMD phase when ddr mode.*/
+            uint32_t smem_outminbytelen            :    7;  /*It is the minimum output data length in the ddr psram.*/
+            uint32_t smem_tx_ddr_msk_en            :    1;  /*Set this bit to mask the first or the last byte in MSPI ECC DDR write mode, when accesses to external RAM.*/
+            uint32_t smem_rx_ddr_msk_en            :    1;  /*Set this bit to mask the first or the last byte in MSPI ECC DDR read mode, when accesses to external RAM.*/
+            uint32_t smem_usr_ddr_dqs_thd          :    7;  /*The delay number of data strobe which from memory based on SPI_CLK.*/
+            uint32_t smem_ddr_dqs_loop             :    1;  /*1: Use internal signal  as data strobe, the strobe can not be delayed by input timing module. 0: Use input SPI_DQS signal from PAD as data strobe, the strobe can be delayed by input timing module*/
+            uint32_t smem_ddr_dqs_loop_mode        :    1;  /*When SPI_SMEM_DDR_DQS_LOOP and SPI_SMEM_DDR_EN are set, 1: Use internal SPI_CLK  as data strobe. 0: Use internal ~SPI_CLK  as data strobe. Otherwise this bit is not active.*/
+            uint32_t reserved23                    :    1;  /*reserved*/
+            uint32_t smem_clk_diff_en              :    1;  /*Set this bit to enable the differential SPI_CLK#.*/
+            uint32_t smem_hyperbus_mode            :    1;  /*Set this bit to enable the SPI HyperBus mode.*/
+            uint32_t smem_dqs_ca_in                :    1;  /*Set this bit to enable the input of SPI_DQS signal in SPI phases of CMD and ADDR.*/
+            uint32_t smem_hyperbus_dummy_2x        :    1;  /*Set this bit to enable the vary dummy function in SPI HyperBus mode, when SPI0 accesses to flash or SPI1 accesses flash or sram.*/
+            uint32_t smem_clk_diff_inv             :    1;  /*Set this bit to invert SPI_DIFF when accesses to external RAM. .*/
+            uint32_t smem_octa_ram_addr            :    1;  /*Set this bit to enable octa_ram address out when accesses to external RAM, which means ADDR_OUT[31:0] = {spi_usr_addr_value[25:4], 6'd0, spi_usr_addr_value[3:1], 1'b0}.*/
+            uint32_t smem_hyperbus_ca              :    1;  /*Set this bit to enable HyperRAM address out when accesses to external RAM, which means ADDR_OUT[31:0] = {spi_usr_addr_value[19:4], 13'd0, spi_usr_addr_value[3:1]}.*/
+            uint32_t reserved31                    :    1;  /*reserved*/
+        };
+        uint32_t val;
+    } spi_smem_ddr;
+    union {
+        struct {
+            uint32_t clk_en                        :    1;  /*Register clock gate enable signal. 1: Enable. 0: Disable.*/
+            uint32_t reserved1                     :    31;  /*reserved*/
+        };
+        uint32_t val;
+    } clock_gate;
+    union {
+        struct {
+            uint32_t core_clk_sel                  :    2;  /*When the digital system clock selects PLL clock and the frequency of PLL clock is 480MHz, the value of SPI_MEM_CORE_CLK_SEL:  0: SPI0/1 module clock (MSPI_CORE_CLK) is 80MHz. 1: MSPI_CORE_CLK is 120MHz.  2: MSPI_CORE_CLK is 160MHz. 3: MSPI_CORE_CLK is 240MHz. When the digital system clock selects PLL clock and the frequency of PLL clock is 320MHz, the value of SPI_MEM_CORE_CLK_SEL:  0: MSPI_CORE_CLK is 80MHz. 1: MSPI_CORE_CLK is 80MHz.  2: MSPI_CORE_CLK 160MHz. 3: Not used. */
+            uint32_t reserved2                     :    30;  /*reserved*/
+        };
+        uint32_t val;
+    } core_clk_sel;
+    union {
+        struct {
+            uint32_t per_end_en                    :    1;  /*The enable bit for SPI_MEM_PER_END_INT interrupt.*/
+            uint32_t pes_end_en                    :    1;  /*The enable bit for SPI_MEM_PES_END_INT interrupt.*/
+            uint32_t total_trans_end_en            :    1;  /*The enable bit for SPI_MEM_TOTAL_TRANS_END_INT interrupt.*/
+            uint32_t brown_out_en                  :    1;  /*The enable bit for SPI_MEM_BROWN_OUT_INT interrupt.*/
+            uint32_t ecc_err_en                    :    1;  /*The enable bit for SPI_MEM_ECC_ERR_INT interrupt.*/
+            uint32_t reserved5                     :    27;  /*reserved*/
+        };
+        uint32_t val;
+    } int_ena;
+    union {
+        struct {
+            uint32_t per_end_int_clr               :    1;  /*The clear bit for SPI_MEM_PER_END_INT interrupt.*/
+            uint32_t pes_end_int_clr               :    1;  /*The clear bit for SPI_MEM_PES_END_INT interrupt.*/
+            uint32_t total_trans_end_int_clr       :    1;  /*The clear bit for SPI_MEM_TOTAL_TRANS_END_INT interrupt.*/
+            uint32_t brown_out_int_clr             :    1;  /*The status bit for SPI_MEM_BROWN_OUT_INT interrupt.*/
+            uint32_t ecc_err_int_clr               :    1;  /*The clear bit for SPI_MEM_ECC_ERR_INT interrupt. SPI_MEM_ECC_ERR_ADDR and SPI_MEM_ECC_ERR_CNT will be cleared by the pulse of this bit.*/
+            uint32_t reserved5                     :    27;  /*reserved*/
+        };
+        uint32_t val;
+    } int_clr;
+    union {
+        struct {
+            uint32_t per_end_int_raw               :    1;  /*The raw bit for SPI_MEM_PER_END_INT interrupt. 1: Triggered when Auto Resume command (0x7A) is sent and flash is resumed successfully. 0: Others.*/
+            uint32_t pes_end_int_raw               :    1;  /*The raw bit for SPI_MEM_PES_END_INT interrupt.1: Triggered when Auto Suspend command (0x75) is sent and flash is suspended successfully. 0: Others.*/
+            uint32_t total_trans_end_int_raw       :    1;  /*The raw bit for SPI_MEM_TOTAL_TRANS_END_INT interrupt. 1: Triggered when SPI1 transfer is done and flash is already idle. When WRSR/PP/SE/BE/CE is sent and PES/PER command is sent, this bit is set when WRSR/PP/SE/BE/CE is success.  0: Others.*/
+            uint32_t brown_out_int_raw             :    1;  /*The raw bit for SPI_MEM_BROWN_OUT_INT interrupt. 1: Triggered condition is that chip is loosing power and RTC module sends out brown out close flash request to SPI1. After SPI1 sends out suspend command to flash, this interrupt is triggered and MSPI returns to idle state. 0: Others.*/
+            uint32_t ecc_err_int_raw               :    1;  /*The raw bit for SPI_MEM_ECC_ERR_INT interrupt. When APB_CTRL_FECC_ERR_INT_EN is set and  APB_CTRL_SECC_ERR_INT_EN is cleared, this bit is triggered when the error times of SPI0/1 ECC read flash are equal or bigger than APB_CTRL_ECC_ERR_INT_NUM. When APB_CTRL_FECC_ERR_INT_EN is cleared and  APB_CTRL_SECC_ERR_INT_EN is set, this bit is triggered when the error times of SPI0/1 ECC read external RAM are equal or bigger than APB_CTRL_ECC_ERR_INT_NUM. When APB_CTRL_FECC_ERR_INT_EN and  APB_CTRL_SECC_ERR_INT_EN are set, this bit is triggered when the total error times of SPI0/1 ECC read external RAM and flash are equal or bigger than APB_CTRL_ECC_ERR_INT_NUM. When APB_CTRL_FECC_ERR_INT_EN and  APB_CTRL_SECC_ERR_INT_EN are cleared, this bit will not be triggered.*/
+            uint32_t reserved5                     :    27;  /*reserved*/
+        };
+        uint32_t val;
+    } int_raw;
+    union {
+        struct {
+            uint32_t per_end_int_st                :    1;  /*The status bit for SPI_MEM_PER_END_INT interrupt.*/
+            uint32_t pes_end_int_st                :    1;  /*The status bit for SPI_MEM_PES_END_INT interrupt.*/
+            uint32_t total_trans_end_int_st        :    1;  /*The status bit for SPI_MEM_TOTAL_TRANS_END_INT interrupt.*/
+            uint32_t brown_out_int_st              :    1;  /*The status bit for SPI_MEM_BROWN_OUT_INT interrupt.*/
+            uint32_t ecc_err_int_st                :    1;  /*The status bit for SPI_MEM_ECC_ERR_INT interrupt.*/
+            uint32_t reserved5                     :    27;  /*reserved*/
+        };
+        uint32_t val;
+    } int_st;
+    uint32_t reserved_100;
+    uint32_t reserved_104;
+    uint32_t reserved_108;
+    uint32_t reserved_10c;
+    uint32_t reserved_110;
+    uint32_t reserved_114;
+    uint32_t reserved_118;
+    uint32_t reserved_11c;
+    uint32_t reserved_120;
+    uint32_t reserved_124;
+    uint32_t reserved_128;
+    uint32_t reserved_12c;
+    uint32_t reserved_130;
+    uint32_t reserved_134;
+    uint32_t reserved_138;
+    uint32_t reserved_13c;
+    uint32_t reserved_140;
+    uint32_t reserved_144;
+    uint32_t reserved_148;
+    uint32_t reserved_14c;
+    uint32_t reserved_150;
+    uint32_t reserved_154;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    uint32_t reserved_1fc;
+    uint32_t reserved_200;
+    uint32_t reserved_204;
+    uint32_t reserved_208;
+    uint32_t reserved_20c;
+    uint32_t reserved_210;
+    uint32_t reserved_214;
+    uint32_t reserved_218;
+    uint32_t reserved_21c;
+    uint32_t reserved_220;
+    uint32_t reserved_224;
+    uint32_t reserved_228;
+    uint32_t reserved_22c;
+    uint32_t reserved_230;
+    uint32_t reserved_234;
+    uint32_t reserved_238;
+    uint32_t reserved_23c;
+    uint32_t reserved_240;
+    uint32_t reserved_244;
+    uint32_t reserved_248;
+    uint32_t reserved_24c;
+    uint32_t reserved_250;
+    uint32_t reserved_254;
+    uint32_t reserved_258;
+    uint32_t reserved_25c;
+    uint32_t reserved_260;
+    uint32_t reserved_264;
+    uint32_t reserved_268;
+    uint32_t reserved_26c;
+    uint32_t reserved_270;
+    uint32_t reserved_274;
+    uint32_t reserved_278;
+    uint32_t reserved_27c;
+    uint32_t reserved_280;
+    uint32_t reserved_284;
+    uint32_t reserved_288;
+    uint32_t reserved_28c;
+    uint32_t reserved_290;
+    uint32_t reserved_294;
+    uint32_t reserved_298;
+    uint32_t reserved_29c;
+    uint32_t reserved_2a0;
+    uint32_t reserved_2a4;
+    uint32_t reserved_2a8;
+    uint32_t reserved_2ac;
+    uint32_t reserved_2b0;
+    uint32_t reserved_2b4;
+    uint32_t reserved_2b8;
+    uint32_t reserved_2bc;
+    uint32_t reserved_2c0;
+    uint32_t reserved_2c4;
+    uint32_t reserved_2c8;
+    uint32_t reserved_2cc;
+    uint32_t reserved_2d0;
+    uint32_t reserved_2d4;
+    uint32_t reserved_2d8;
+    uint32_t reserved_2dc;
+    uint32_t reserved_2e0;
+    uint32_t reserved_2e4;
+    uint32_t reserved_2e8;
+    uint32_t reserved_2ec;
+    uint32_t reserved_2f0;
+    uint32_t reserved_2f4;
+    uint32_t reserved_2f8;
+    uint32_t reserved_2fc;
+    uint32_t reserved_300;
+    uint32_t reserved_304;
+    uint32_t reserved_308;
+    uint32_t reserved_30c;
+    uint32_t reserved_310;
+    uint32_t reserved_314;
+    uint32_t reserved_318;
+    uint32_t reserved_31c;
+    uint32_t reserved_320;
+    uint32_t reserved_324;
+    uint32_t reserved_328;
+    uint32_t reserved_32c;
+    uint32_t reserved_330;
+    uint32_t reserved_334;
+    uint32_t reserved_338;
+    uint32_t reserved_33c;
+    uint32_t reserved_340;
+    uint32_t reserved_344;
+    uint32_t reserved_348;
+    uint32_t reserved_34c;
+    uint32_t reserved_350;
+    uint32_t reserved_354;
+    uint32_t reserved_358;
+    uint32_t reserved_35c;
+    uint32_t reserved_360;
+    uint32_t reserved_364;
+    uint32_t reserved_368;
+    uint32_t reserved_36c;
+    uint32_t reserved_370;
+    uint32_t reserved_374;
+    uint32_t reserved_378;
+    uint32_t reserved_37c;
+    uint32_t reserved_380;
+    uint32_t reserved_384;
+    uint32_t reserved_388;
+    uint32_t reserved_38c;
+    uint32_t reserved_390;
+    uint32_t reserved_394;
+    uint32_t reserved_398;
+    uint32_t reserved_39c;
+    uint32_t reserved_3a0;
+    uint32_t reserved_3a4;
+    uint32_t reserved_3a8;
+    uint32_t reserved_3ac;
+    uint32_t reserved_3b0;
+    uint32_t reserved_3b4;
+    uint32_t reserved_3b8;
+    uint32_t reserved_3bc;
+    uint32_t reserved_3c0;
+    uint32_t reserved_3c4;
+    uint32_t reserved_3c8;
+    uint32_t reserved_3cc;
+    uint32_t reserved_3d0;
+    uint32_t reserved_3d4;
+    uint32_t reserved_3d8;
+    uint32_t reserved_3dc;
+    uint32_t reserved_3e0;
+    uint32_t reserved_3e4;
+    uint32_t reserved_3e8;
+    uint32_t reserved_3ec;
+    uint32_t reserved_3f0;
+    uint32_t reserved_3f4;
+    uint32_t reserved_3f8;
+    union {
+        struct {
+            uint32_t reg_smem_spiclk_fun_drv       :    2;  /*The driver of SPI_CLK PAD  is controlled by the bits SPI_SMEM_SPICLK_FUN_DRV[1:0] when the bit SPI_SPICLK_PAD_DRV_CTL_EN is set and MSPI accesses to external RAM.*/
+            uint32_t fmem_spiclk_fun_drv           :    2;  /*The driver of SPI_CLK PAD  is controlled by the bits SPI_FMEM_SPICLK_FUN_DRV[1:0] when the bit SPI_SPICLK_PAD_DRV_CTL_EN is set and MSPI accesses to flash.*/
+            uint32_t reg_spiclk_pad_drv_ctl_en     :    1;  /*SPI_CLK PAD driver control signal. 1: The driver of SPI_CLK PAD  is controlled by the bits SPI_FMEM_SPICLK_FUN_DRV[1:0] and SPI_SMEM_SPICLK_FUN_DRV[1:0]. 0: The driver of SPI_CLK PAD  is controlled by the bits IO_MUX_FUNC_DRV[1:0] of SPICLK PAD.*/
+            uint32_t date                          :    23;  /*SPI register version.*/
+            uint32_t reserved28                    :    4;  /*reserved*/
+        };
+        uint32_t val;
+    } date;
+} spi_mem_dev_t;
+extern spi_mem_dev_t SPIMEM0;
+extern spi_mem_dev_t SPIMEM1;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SPI_MEM_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_pins.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_pins.h
new file mode 100644
index 00000000000..05d338085cf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_pins.h
@@ -0,0 +1,49 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define SPI_FUNC_NUM            0
+#define SPI_IOMUX_PIN_NUM_HD    27
+#define SPI_IOMUX_PIN_NUM_CS    29
+#define SPI_IOMUX_PIN_NUM_MOSI  32
+#define SPI_IOMUX_PIN_NUM_CLK   30
+#define SPI_IOMUX_PIN_NUM_MISO  31
+#define SPI_IOMUX_PIN_NUM_WP    28
+
+// There are 2 sets of GPIO pins which could be routed to FSPICS0, FSPICLK, FSPID, FSPIQ, FSPIHD, FSPIWP.
+// However, there is only one set of GPIO pins which could be routed to FSPIIO4, FSPIIO5, FSPIIO6, FSPIIO7.
+// As default (when we are not going to use Octal SPI), we make use of SPI2_FUNC_NUM to route one of the 2 sets of GPIO pins to FSPICS0 ~ FSPIWP as follows.
+#define SPI2_FUNC_NUM           4
+#define SPI2_IOMUX_PIN_NUM_HD   9
+#define SPI2_IOMUX_PIN_NUM_CS   10
+#define SPI2_IOMUX_PIN_NUM_MOSI 11
+#define SPI2_IOMUX_PIN_NUM_CLK  12
+#define SPI2_IOMUX_PIN_NUM_MISO 13
+#define SPI2_IOMUX_PIN_NUM_WP   14
+
+// When using Octal SPI, we make use of SPI2_FUNC_NUM_OCT to route them as follows.
+#define SPI2_FUNC_NUM_OCT           2
+#define SPI2_IOMUX_PIN_NUM_HD_OCT   33
+#define SPI2_IOMUX_PIN_NUM_CS_OCT   34
+#define SPI2_IOMUX_PIN_NUM_MOSI_OCT 35
+#define SPI2_IOMUX_PIN_NUM_CLK_OCT  36
+#define SPI2_IOMUX_PIN_NUM_MISO_OCT 37
+#define SPI2_IOMUX_PIN_NUM_WP_OCT   38
+#define SPI2_IOMUX_PIN_NUM_IO4_OCT  10
+#define SPI2_IOMUX_PIN_NUM_IO5_OCT  11
+#define SPI2_IOMUX_PIN_NUM_IO6_OCT  12
+#define SPI2_IOMUX_PIN_NUM_IO7_OCT  13
+
+//SPI3 have no iomux pins
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_reg.h
new file mode 100644
index 00000000000..533158870ae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_reg.h
@@ -0,0 +1,1757 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_SPI_REG_H_
+#define _SOC_SPI_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SPI_CMD_REG(i)          (REG_SPI_BASE(i) + 0x0)
+/* SPI_USR : R/W/SC ;bitpos:[24] ;default: 1'b0 ; */
+/*description: User define command enable.  An operation will be triggered when the bit is set.
+ The bit will be cleared once the operation done.1: enable 0: disable. Can not b
+e changed by CONF_buf..*/
+#define SPI_USR    (BIT(24))
+#define SPI_USR_M  (BIT(24))
+#define SPI_USR_V  0x1
+#define SPI_USR_S  24
+/* SPI_UPDATE : WT ;bitpos:[23] ;default: 1'b0 ; */
+/*description: Set this bit to synchronize SPI registers from APB clock domain into SPI module
+clock domain, which is only used in SPI master mode..*/
+#define SPI_UPDATE    (BIT(23))
+#define SPI_UPDATE_M  (BIT(23))
+#define SPI_UPDATE_V  0x1
+#define SPI_UPDATE_S  23
+/* SPI_CONF_BITLEN : R/W ;bitpos:[17:0] ;default: 18'd0 ; */
+/*description: Define the APB cycles of  SPI_CONF state. Can be configured in CONF state..*/
+#define SPI_CONF_BITLEN    0x0003FFFF
+#define SPI_CONF_BITLEN_M  ((SPI_CONF_BITLEN_V)<<(SPI_CONF_BITLEN_S))
+#define SPI_CONF_BITLEN_V  0x3FFFF
+#define SPI_CONF_BITLEN_S  0
+
+#define SPI_ADDR_REG(i)          (REG_SPI_BASE(i) + 0x4)
+/* SPI_USR_ADDR_VALUE : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: Address to slave. Can be configured in CONF state..*/
+#define SPI_USR_ADDR_VALUE    0xFFFFFFFF
+#define SPI_USR_ADDR_VALUE_M  ((SPI_USR_ADDR_VALUE_V)<<(SPI_USR_ADDR_VALUE_S))
+#define SPI_USR_ADDR_VALUE_V  0xFFFFFFFF
+#define SPI_USR_ADDR_VALUE_S  0
+
+#define SPI_CTRL_REG(i)          (REG_SPI_BASE(i) + 0x8)
+/* SPI_WR_BIT_ORDER : R/W ;bitpos:[26:25] ;default: 2'b0 ; */
+/*description: In command address write-data (MOSI) phases 1: LSB firs 0: MSB first. Can be con
+figured in CONF state..*/
+#define SPI_WR_BIT_ORDER    0x00000003
+#define SPI_WR_BIT_ORDER_M  ((SPI_WR_BIT_ORDER_V)<<(SPI_WR_BIT_ORDER_S))
+#define SPI_WR_BIT_ORDER_V  0x3
+#define SPI_WR_BIT_ORDER_S  25
+/* SPI_RD_BIT_ORDER : R/W ;bitpos:[24:23] ;default: 2'b0 ; */
+/*description: In read-data (MISO) phase 1: LSB first 0: MSB first. Can be configured in CONF s
+tate..*/
+#define SPI_RD_BIT_ORDER    0x00000003
+#define SPI_RD_BIT_ORDER_M  ((SPI_RD_BIT_ORDER_V)<<(SPI_RD_BIT_ORDER_S))
+#define SPI_RD_BIT_ORDER_V  0x3
+#define SPI_RD_BIT_ORDER_S  23
+/* SPI_WP_POL : R/W ;bitpos:[21] ;default: 1'b1 ; */
+/*description: Write protect signal output when SPI is idle.  1: output high, 0: output low.  C
+an be configured in CONF state..*/
+#define SPI_WP_POL    (BIT(21))
+#define SPI_WP_POL_M  (BIT(21))
+#define SPI_WP_POL_V  0x1
+#define SPI_WP_POL_S  21
+/* SPI_HOLD_POL : R/W ;bitpos:[20] ;default: 1'b1 ; */
+/*description: SPI_HOLD output value when SPI is idle. 1: output high, 0: output low. Can be co
+nfigured in CONF state..*/
+#define SPI_HOLD_POL    (BIT(20))
+#define SPI_HOLD_POL_M  (BIT(20))
+#define SPI_HOLD_POL_V  0x1
+#define SPI_HOLD_POL_S  20
+/* SPI_D_POL : R/W ;bitpos:[19] ;default: 1'b1 ; */
+/*description: The bit is used to set MOSI line polarity, 1: high 0, low. Can be configured in
+CONF state..*/
+#define SPI_D_POL    (BIT(19))
+#define SPI_D_POL_M  (BIT(19))
+#define SPI_D_POL_V  0x1
+#define SPI_D_POL_S  19
+/* SPI_Q_POL : R/W ;bitpos:[18] ;default: 1'b1 ; */
+/*description: The bit is used to set MISO line polarity, 1: high 0, low. Can be configured in
+CONF state..*/
+#define SPI_Q_POL    (BIT(18))
+#define SPI_Q_POL_M  (BIT(18))
+#define SPI_Q_POL_V  0x1
+#define SPI_Q_POL_S  18
+/* SPI_FREAD_OCT : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: In the read operations read-data phase apply 8 signals. 1: enable 0: disable.  C
+an be configured in CONF state..*/
+#define SPI_FREAD_OCT    (BIT(16))
+#define SPI_FREAD_OCT_M  (BIT(16))
+#define SPI_FREAD_OCT_V  0x1
+#define SPI_FREAD_OCT_S  16
+/* SPI_FREAD_QUAD : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: In the read operations read-data phase apply 4 signals. 1: enable 0: disable.  C
+an be configured in CONF state..*/
+#define SPI_FREAD_QUAD    (BIT(15))
+#define SPI_FREAD_QUAD_M  (BIT(15))
+#define SPI_FREAD_QUAD_V  0x1
+#define SPI_FREAD_QUAD_S  15
+/* SPI_FREAD_DUAL : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: In the read operations, read-data phase apply 2 signals. 1: enable 0: disable. C
+an be configured in CONF state..*/
+#define SPI_FREAD_DUAL    (BIT(14))
+#define SPI_FREAD_DUAL_M  (BIT(14))
+#define SPI_FREAD_DUAL_V  0x1
+#define SPI_FREAD_DUAL_S  14
+/* SPI_FCMD_OCT : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: Apply 8 signals during command phase 1:enable 0: disable. Can be configured in C
+ONF state..*/
+#define SPI_FCMD_OCT    (BIT(10))
+#define SPI_FCMD_OCT_M  (BIT(10))
+#define SPI_FCMD_OCT_V  0x1
+#define SPI_FCMD_OCT_S  10
+/* SPI_FCMD_QUAD : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Apply 4 signals during command phase 1:enable 0: disable. Can be configured in C
+ONF state..*/
+#define SPI_FCMD_QUAD    (BIT(9))
+#define SPI_FCMD_QUAD_M  (BIT(9))
+#define SPI_FCMD_QUAD_V  0x1
+#define SPI_FCMD_QUAD_S  9
+/* SPI_FCMD_DUAL : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Apply 2 signals during command phase 1:enable 0: disable. Can be configured in C
+ONF state..*/
+#define SPI_FCMD_DUAL    (BIT(8))
+#define SPI_FCMD_DUAL_M  (BIT(8))
+#define SPI_FCMD_DUAL_V  0x1
+#define SPI_FCMD_DUAL_S  8
+/* SPI_FADDR_OCT : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Apply 8 signals during addr phase 1:enable 0: disable. Can be configured in CONF
+ state..*/
+#define SPI_FADDR_OCT    (BIT(7))
+#define SPI_FADDR_OCT_M  (BIT(7))
+#define SPI_FADDR_OCT_V  0x1
+#define SPI_FADDR_OCT_S  7
+/* SPI_FADDR_QUAD : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Apply 4 signals during addr phase 1:enable 0: disable. Can be configured in CONF
+ state..*/
+#define SPI_FADDR_QUAD    (BIT(6))
+#define SPI_FADDR_QUAD_M  (BIT(6))
+#define SPI_FADDR_QUAD_V  0x1
+#define SPI_FADDR_QUAD_S  6
+/* SPI_FADDR_DUAL : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Apply 2 signals during addr phase 1:enable 0: disable. Can be configured in CONF
+ state..*/
+#define SPI_FADDR_DUAL    (BIT(5))
+#define SPI_FADDR_DUAL_M  (BIT(5))
+#define SPI_FADDR_DUAL_V  0x1
+#define SPI_FADDR_DUAL_S  5
+/* SPI_DUMMY_OUT : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: 0: In the dummy phase, the FSPI bus signals are not output. 1: In the dummy phas
+e, the FSPI bus signals are output. Can be configured in CONF state..*/
+#define SPI_DUMMY_OUT    (BIT(3))
+#define SPI_DUMMY_OUT_M  (BIT(3))
+#define SPI_DUMMY_OUT_V  0x1
+#define SPI_DUMMY_OUT_S  3
+
+#define SPI_CLOCK_REG(i)          (REG_SPI_BASE(i) + 0xC)
+/* SPI_CLK_EQU_SYSCLK : R/W ;bitpos:[31] ;default: 1'b1 ; */
+/*description: In the master mode 1: spi_clk is eqaul to system 0: spi_clk is divided from syst
+em clock. Can be configured in CONF state..*/
+#define SPI_CLK_EQU_SYSCLK    (BIT(31))
+#define SPI_CLK_EQU_SYSCLK_M  (BIT(31))
+#define SPI_CLK_EQU_SYSCLK_V  0x1
+#define SPI_CLK_EQU_SYSCLK_S  31
+/* SPI_CLKDIV_PRE : R/W ;bitpos:[21:18] ;default: 4'b0 ; */
+/*description: In the master mode it is pre-divider of spi_clk.  Can be configured in CONF stat
+e..*/
+#define SPI_CLKDIV_PRE    0x0000000F
+#define SPI_CLKDIV_PRE_M  ((SPI_CLKDIV_PRE_V)<<(SPI_CLKDIV_PRE_S))
+#define SPI_CLKDIV_PRE_V  0xF
+#define SPI_CLKDIV_PRE_S  18
+/* SPI_CLKCNT_N : R/W ;bitpos:[17:12] ;default: 6'h3 ; */
+/*description: In the master mode it is the divider of spi_clk. So spi_clk frequency is system/
+(spi_clkdiv_pre+1)/(spi_clkcnt_N+1). Can be configured in CONF state..*/
+#define SPI_CLKCNT_N    0x0000003F
+#define SPI_CLKCNT_N_M  ((SPI_CLKCNT_N_V)<<(SPI_CLKCNT_N_S))
+#define SPI_CLKCNT_N_V  0x3F
+#define SPI_CLKCNT_N_S  12
+/* SPI_CLKCNT_H : R/W ;bitpos:[11:6] ;default: 6'h1 ; */
+/*description: In the master mode it must be floor((spi_clkcnt_N+1)/2-1). In the slave mode it
+must be 0. Can be configured in CONF state..*/
+#define SPI_CLKCNT_H    0x0000003F
+#define SPI_CLKCNT_H_M  ((SPI_CLKCNT_H_V)<<(SPI_CLKCNT_H_S))
+#define SPI_CLKCNT_H_V  0x3F
+#define SPI_CLKCNT_H_S  6
+/* SPI_CLKCNT_L : R/W ;bitpos:[5:0] ;default: 6'h3 ; */
+/*description: In the master mode it must be equal to spi_clkcnt_N. In the slave mode it must b
+e 0. Can be configured in CONF state..*/
+#define SPI_CLKCNT_L    0x0000003F
+#define SPI_CLKCNT_L_M  ((SPI_CLKCNT_L_V)<<(SPI_CLKCNT_L_S))
+#define SPI_CLKCNT_L_V  0x3F
+#define SPI_CLKCNT_L_S  0
+
+#define SPI_USER_REG(i)          (REG_SPI_BASE(i) + 0x10)
+/* SPI_USR_COMMAND : R/W ;bitpos:[31] ;default: 1'b1 ; */
+/*description: This bit enable the command phase of an operation. Can be configured in CONF sta
+te..*/
+#define SPI_USR_COMMAND    (BIT(31))
+#define SPI_USR_COMMAND_M  (BIT(31))
+#define SPI_USR_COMMAND_V  0x1
+#define SPI_USR_COMMAND_S  31
+/* SPI_USR_ADDR : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: This bit enable the address phase of an operation. Can be configured in CONF sta
+te..*/
+#define SPI_USR_ADDR    (BIT(30))
+#define SPI_USR_ADDR_M  (BIT(30))
+#define SPI_USR_ADDR_V  0x1
+#define SPI_USR_ADDR_S  30
+/* SPI_USR_DUMMY : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: This bit enable the dummy phase of an operation. Can be configured in CONF state
+..*/
+#define SPI_USR_DUMMY    (BIT(29))
+#define SPI_USR_DUMMY_M  (BIT(29))
+#define SPI_USR_DUMMY_V  0x1
+#define SPI_USR_DUMMY_S  29
+/* SPI_USR_MISO : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: This bit enable the read-data phase of an operation. Can be configured in CONF s
+tate..*/
+#define SPI_USR_MISO    (BIT(28))
+#define SPI_USR_MISO_M  (BIT(28))
+#define SPI_USR_MISO_V  0x1
+#define SPI_USR_MISO_S  28
+/* SPI_USR_MOSI : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: This bit enable the write-data phase of an operation. Can be configured in CONF
+state..*/
+#define SPI_USR_MOSI    (BIT(27))
+#define SPI_USR_MOSI_M  (BIT(27))
+#define SPI_USR_MOSI_V  0x1
+#define SPI_USR_MOSI_S  27
+/* SPI_USR_DUMMY_IDLE : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: spi clock is disable in dummy phase when the bit is enable. Can be configured in
+ CONF state..*/
+#define SPI_USR_DUMMY_IDLE    (BIT(26))
+#define SPI_USR_DUMMY_IDLE_M  (BIT(26))
+#define SPI_USR_DUMMY_IDLE_V  0x1
+#define SPI_USR_DUMMY_IDLE_S  26
+/* SPI_USR_MOSI_HIGHPART : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: write-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enabl
+e 0: disable.  Can be configured in CONF state..*/
+#define SPI_USR_MOSI_HIGHPART    (BIT(25))
+#define SPI_USR_MOSI_HIGHPART_M  (BIT(25))
+#define SPI_USR_MOSI_HIGHPART_V  0x1
+#define SPI_USR_MOSI_HIGHPART_S  25
+/* SPI_USR_MISO_HIGHPART : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: read-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable
+ 0: disable. Can be configured in CONF state..*/
+#define SPI_USR_MISO_HIGHPART    (BIT(24))
+#define SPI_USR_MISO_HIGHPART_M  (BIT(24))
+#define SPI_USR_MISO_HIGHPART_V  0x1
+#define SPI_USR_MISO_HIGHPART_S  24
+/* SPI_SIO : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: Set the bit to enable 3-line half duplex communication mosi and miso signals sha
+re the same pin. 1: enable 0: disable. Can be configured in CONF state..*/
+#define SPI_SIO    (BIT(17))
+#define SPI_SIO_M  (BIT(17))
+#define SPI_SIO_V  0x1
+#define SPI_SIO_S  17
+/* SPI_USR_CONF_NXT : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: 1: Enable the DMA CONF phase of next seg-trans operation, which means seg-trans
+will continue. 0: The seg-trans will end after the current SPI seg-trans or this
+ is not seg-trans mode. Can be configured in CONF state..*/
+#define SPI_USR_CONF_NXT    (BIT(15))
+#define SPI_USR_CONF_NXT_M  (BIT(15))
+#define SPI_USR_CONF_NXT_V  0x1
+#define SPI_USR_CONF_NXT_S  15
+/* SPI_FWRITE_OCT : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: In the write operations read-data phase apply 8 signals. Can be configured in CO
+NF state..*/
+#define SPI_FWRITE_OCT    (BIT(14))
+#define SPI_FWRITE_OCT_M  (BIT(14))
+#define SPI_FWRITE_OCT_V  0x1
+#define SPI_FWRITE_OCT_S  14
+/* SPI_FWRITE_QUAD : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: In the write operations read-data phase apply 4 signals. Can be configured in CO
+NF state..*/
+#define SPI_FWRITE_QUAD    (BIT(13))
+#define SPI_FWRITE_QUAD_M  (BIT(13))
+#define SPI_FWRITE_QUAD_V  0x1
+#define SPI_FWRITE_QUAD_S  13
+/* SPI_FWRITE_DUAL : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: In the write operations read-data phase apply 2 signals. Can be configured in CO
+NF state..*/
+#define SPI_FWRITE_DUAL    (BIT(12))
+#define SPI_FWRITE_DUAL_M  (BIT(12))
+#define SPI_FWRITE_DUAL_V  0x1
+#define SPI_FWRITE_DUAL_S  12
+/* SPI_CK_OUT_EDGE : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: the bit combined with spi_mosi_delay_mode bits to set mosi signal delay mode. Ca
+n be configured in CONF state..*/
+#define SPI_CK_OUT_EDGE    (BIT(9))
+#define SPI_CK_OUT_EDGE_M  (BIT(9))
+#define SPI_CK_OUT_EDGE_V  0x1
+#define SPI_CK_OUT_EDGE_S  9
+/* SPI_RSCK_I_EDGE : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: In the slave mode, this bit can be used to change the polarity of rsck. 0: rsck
+= !spi_ck_i. 1:rsck = spi_ck_i..*/
+#define SPI_RSCK_I_EDGE    (BIT(8))
+#define SPI_RSCK_I_EDGE_M  (BIT(8))
+#define SPI_RSCK_I_EDGE_V  0x1
+#define SPI_RSCK_I_EDGE_S  8
+/* SPI_CS_SETUP : R/W ;bitpos:[7] ;default: 1'b1 ; */
+/*description: spi cs is enable when spi is in  prepare  phase. 1: enable 0: disable. Can be co
+nfigured in CONF state..*/
+#define SPI_CS_SETUP    (BIT(7))
+#define SPI_CS_SETUP_M  (BIT(7))
+#define SPI_CS_SETUP_V  0x1
+#define SPI_CS_SETUP_S  7
+/* SPI_CS_HOLD : R/W ;bitpos:[6] ;default: 1'b1 ; */
+/*description: spi cs keep low when spi is in  done  phase. 1: enable 0: disable. Can be config
+ured in CONF state..*/
+#define SPI_CS_HOLD    (BIT(6))
+#define SPI_CS_HOLD_M  (BIT(6))
+#define SPI_CS_HOLD_V  0x1
+#define SPI_CS_HOLD_S  6
+/* SPI_TSCK_I_EDGE : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: In the slave mode, this bit can be used to change the polarity of tsck. 0: tsck
+= spi_ck_i. 1:tsck = !spi_ck_i..*/
+#define SPI_TSCK_I_EDGE    (BIT(5))
+#define SPI_TSCK_I_EDGE_M  (BIT(5))
+#define SPI_TSCK_I_EDGE_V  0x1
+#define SPI_TSCK_I_EDGE_S  5
+/* SPI_OPI_MODE : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Just for master mode. 1: spi controller is in OPI mode (all in 8-b-m). 0: others
+. Can be configured in CONF state..*/
+#define SPI_OPI_MODE    (BIT(4))
+#define SPI_OPI_MODE_M  (BIT(4))
+#define SPI_OPI_MODE_V  0x1
+#define SPI_OPI_MODE_S  4
+/* SPI_QPI_MODE : R/W/SS/SC ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Both for master mode and slave mode. 1: spi controller is in QPI mode. 0: others
+. Can be configured in CONF state..*/
+#define SPI_QPI_MODE    (BIT(3))
+#define SPI_QPI_MODE_M  (BIT(3))
+#define SPI_QPI_MODE_V  0x1
+#define SPI_QPI_MODE_S  3
+/* SPI_DOUTDIN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set the bit to enable full duplex communication. 1: enable 0: disable. Can be co
+nfigured in CONF state..*/
+#define SPI_DOUTDIN    (BIT(0))
+#define SPI_DOUTDIN_M  (BIT(0))
+#define SPI_DOUTDIN_V  0x1
+#define SPI_DOUTDIN_S  0
+
+#define SPI_USER1_REG(i)          (REG_SPI_BASE(i) + 0x14)
+/* SPI_USR_ADDR_BITLEN : R/W ;bitpos:[31:27] ;default: 5'd23 ; */
+/*description: The length in bits of address phase. The register value shall be (bit_num-1). Ca
+n be configured in CONF state..*/
+#define SPI_USR_ADDR_BITLEN    0x0000001F
+#define SPI_USR_ADDR_BITLEN_M  ((SPI_USR_ADDR_BITLEN_V)<<(SPI_USR_ADDR_BITLEN_S))
+#define SPI_USR_ADDR_BITLEN_V  0x1F
+#define SPI_USR_ADDR_BITLEN_S  27
+/* SPI_CS_HOLD_TIME : R/W ;bitpos:[26:22] ;default: 5'h1 ; */
+/*description: delay cycles of cs pin by spi clock this bits are combined with spi_cs_hold bit.
+ Can be configured in CONF state..*/
+#define SPI_CS_HOLD_TIME    0x0000001F
+#define SPI_CS_HOLD_TIME_M  ((SPI_CS_HOLD_TIME_V)<<(SPI_CS_HOLD_TIME_S))
+#define SPI_CS_HOLD_TIME_V  0x1F
+#define SPI_CS_HOLD_TIME_S  22
+/* SPI_CS_SETUP_TIME : R/W ;bitpos:[21:17] ;default: 5'b0 ; */
+/*description: (cycles+1) of prepare phase by spi clock this bits are combined with spi_cs_setu
+p bit. Can be configured in CONF state..*/
+#define SPI_CS_SETUP_TIME    0x0000001F
+#define SPI_CS_SETUP_TIME_M  ((SPI_CS_SETUP_TIME_V)<<(SPI_CS_SETUP_TIME_S))
+#define SPI_CS_SETUP_TIME_V  0x1F
+#define SPI_CS_SETUP_TIME_S  17
+/* SPI_MST_WFULL_ERR_END_EN : R/W ;bitpos:[16] ;default: 1'b1 ; */
+/*description: 1: SPI transfer is ended when SPI RX AFIFO wfull error is valid in GP-SPI master
+ FD/HD-mode. 0: SPI transfer is not ended when SPI RX AFIFO wfull error is valid
+ in GP-SPI master FD/HD-mode..*/
+#define SPI_MST_WFULL_ERR_END_EN    (BIT(16))
+#define SPI_MST_WFULL_ERR_END_EN_M  (BIT(16))
+#define SPI_MST_WFULL_ERR_END_EN_V  0x1
+#define SPI_MST_WFULL_ERR_END_EN_S  16
+/* SPI_USR_DUMMY_CYCLELEN : R/W ;bitpos:[7:0] ;default: 8'd7 ; */
+/*description: The length in spi_clk cycles of dummy phase. The register value shall be (cycle_
+num-1). Can be configured in CONF state..*/
+#define SPI_USR_DUMMY_CYCLELEN    0x000000FF
+#define SPI_USR_DUMMY_CYCLELEN_M  ((SPI_USR_DUMMY_CYCLELEN_V)<<(SPI_USR_DUMMY_CYCLELEN_S))
+#define SPI_USR_DUMMY_CYCLELEN_V  0xFF
+#define SPI_USR_DUMMY_CYCLELEN_S  0
+
+#define SPI_USER2_REG(i)          (REG_SPI_BASE(i) + 0x18)
+/* SPI_USR_COMMAND_BITLEN : R/W ;bitpos:[31:28] ;default: 4'd7 ; */
+/*description: The length in bits of command phase. The register value shall be (bit_num-1). Ca
+n be configured in CONF state..*/
+#define SPI_USR_COMMAND_BITLEN    0x0000000F
+#define SPI_USR_COMMAND_BITLEN_M  ((SPI_USR_COMMAND_BITLEN_V)<<(SPI_USR_COMMAND_BITLEN_S))
+#define SPI_USR_COMMAND_BITLEN_V  0xF
+#define SPI_USR_COMMAND_BITLEN_S  28
+/* SPI_MST_REMPTY_ERR_END_EN : R/W ;bitpos:[27] ;default: 1'b1 ; */
+/*description: 1: SPI transfer is ended when SPI TX AFIFO read empty error is valid in GP-SPI m
+aster FD/HD-mode. 0: SPI transfer is not ended when SPI TX AFIFO read empty erro
+r is valid in GP-SPI master FD/HD-mode..*/
+#define SPI_MST_REMPTY_ERR_END_EN    (BIT(27))
+#define SPI_MST_REMPTY_ERR_END_EN_M  (BIT(27))
+#define SPI_MST_REMPTY_ERR_END_EN_V  0x1
+#define SPI_MST_REMPTY_ERR_END_EN_S  27
+/* SPI_USR_COMMAND_VALUE : R/W ;bitpos:[15:0] ;default: 16'b0 ; */
+/*description: The value of  command. Can be configured in CONF state..*/
+#define SPI_USR_COMMAND_VALUE    0x0000FFFF
+#define SPI_USR_COMMAND_VALUE_M  ((SPI_USR_COMMAND_VALUE_V)<<(SPI_USR_COMMAND_VALUE_S))
+#define SPI_USR_COMMAND_VALUE_V  0xFFFF
+#define SPI_USR_COMMAND_VALUE_S  0
+
+#define SPI_MS_DLEN_REG(i)          (REG_SPI_BASE(i) + 0x1C)
+/* SPI_MS_DATA_BITLEN : R/W ;bitpos:[17:0] ;default: 18'b0 ; */
+/*description: The value of these bits is the configured SPI transmission data bit length in ma
+ster mode DMA controlled transfer or CPU controlled transfer. The value is also
+the configured bit length in slave mode DMA RX controlled transfer. The register
+ value shall be (bit_num-1). Can be configured in CONF state..*/
+#define SPI_MS_DATA_BITLEN    0x0003FFFF
+#define SPI_MS_DATA_BITLEN_M  ((SPI_MS_DATA_BITLEN_V)<<(SPI_MS_DATA_BITLEN_S))
+#define SPI_MS_DATA_BITLEN_V  0x3FFFF
+#define SPI_MS_DATA_BITLEN_S  0
+
+#define SPI_MISC_REG(i)          (REG_SPI_BASE(i) + 0x20)
+/* SPI_QUAD_DIN_PIN_SWAP : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: 1: SPI quad input swap enable, swap FSPID with FSPIQ, swap FSPIWP with FSPIHD. 0
+:  spi quad input swap disable. Can be configured in CONF state..*/
+#define SPI_QUAD_DIN_PIN_SWAP    (BIT(31))
+#define SPI_QUAD_DIN_PIN_SWAP_M  (BIT(31))
+#define SPI_QUAD_DIN_PIN_SWAP_V  0x1
+#define SPI_QUAD_DIN_PIN_SWAP_S  31
+/* SPI_CS_KEEP_ACTIVE : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: spi cs line keep low when the bit is set. Can be configured in CONF state..*/
+#define SPI_CS_KEEP_ACTIVE    (BIT(30))
+#define SPI_CS_KEEP_ACTIVE_M  (BIT(30))
+#define SPI_CS_KEEP_ACTIVE_V  0x1
+#define SPI_CS_KEEP_ACTIVE_S  30
+/* SPI_CK_IDLE_EDGE : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: 1: spi clk line is high when idle     0: spi clk line is low when idle. Can be c
+onfigured in CONF state..*/
+#define SPI_CK_IDLE_EDGE    (BIT(29))
+#define SPI_CK_IDLE_EDGE_M  (BIT(29))
+#define SPI_CK_IDLE_EDGE_V  0x1
+#define SPI_CK_IDLE_EDGE_S  29
+/* SPI_DQS_IDLE_EDGE : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: The default value of spi_dqs. Can be configured in CONF state..*/
+#define SPI_DQS_IDLE_EDGE    (BIT(24))
+#define SPI_DQS_IDLE_EDGE_M  (BIT(24))
+#define SPI_DQS_IDLE_EDGE_V  0x1
+#define SPI_DQS_IDLE_EDGE_S  24
+/* SPI_SLAVE_CS_POL : R/W ;bitpos:[23] ;default: 1'b0 ; */
+/*description: spi slave input cs polarity select. 1: inv  0: not change. Can be configured in
+CONF state..*/
+#define SPI_SLAVE_CS_POL    (BIT(23))
+#define SPI_SLAVE_CS_POL_M  (BIT(23))
+#define SPI_SLAVE_CS_POL_V  0x1
+#define SPI_SLAVE_CS_POL_S  23
+/* SPI_CMD_DTR_EN : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: 1: SPI clk and data of SPI_SEND_CMD state are in DTR mode, including master 1/2/
+4/8-bm. 0:  SPI clk and data of SPI_SEND_CMD state are in STR mode. Can be confi
+gured in CONF state..*/
+#define SPI_CMD_DTR_EN    (BIT(19))
+#define SPI_CMD_DTR_EN_M  (BIT(19))
+#define SPI_CMD_DTR_EN_V  0x1
+#define SPI_CMD_DTR_EN_S  19
+/* SPI_ADDR_DTR_EN : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: 1: SPI clk and data of SPI_SEND_ADDR state are in DTR mode, including master 1/2
+/4/8-bm.  0:  SPI clk and data of SPI_SEND_ADDR state are in STR mode. Can be co
+nfigured in CONF state..*/
+#define SPI_ADDR_DTR_EN    (BIT(18))
+#define SPI_ADDR_DTR_EN_M  (BIT(18))
+#define SPI_ADDR_DTR_EN_V  0x1
+#define SPI_ADDR_DTR_EN_S  18
+/* SPI_DATA_DTR_EN : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: 1: SPI clk and data of SPI_DOUT and SPI_DIN state are in DTR mode, including mas
+ter 1/2/4/8-bm.  0:  SPI clk and data of SPI_DOUT and SPI_DIN state are in STR m
+ode. Can be configured in CONF state..*/
+#define SPI_DATA_DTR_EN    (BIT(17))
+#define SPI_DATA_DTR_EN_M  (BIT(17))
+#define SPI_DATA_DTR_EN_V  0x1
+#define SPI_DATA_DTR_EN_S  17
+/* SPI_CLK_DATA_DTR_EN : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: 1: SPI master DTR mode is applied to SPI clk, data and spi_dqs.  0: SPI master D
+TR mode is  only applied to spi_dqs. This bit should be used with bit 17/18/19. .*/
+#define SPI_CLK_DATA_DTR_EN    (BIT(16))
+#define SPI_CLK_DATA_DTR_EN_M  (BIT(16))
+#define SPI_CLK_DATA_DTR_EN_V  0x1
+#define SPI_CLK_DATA_DTR_EN_S  16
+/* SPI_MASTER_CS_POL : R/W ;bitpos:[12:7] ;default: 6'b0 ; */
+/*description: In the master mode the bits are the polarity of spi cs line, the value is equiva
+lent to spi_cs ^ spi_master_cs_pol. Can be configured in CONF state..*/
+#define SPI_MASTER_CS_POL    0x0000003F
+#define SPI_MASTER_CS_POL_M  ((SPI_MASTER_CS_POL_V)<<(SPI_MASTER_CS_POL_S))
+#define SPI_MASTER_CS_POL_V  0x3F
+#define SPI_MASTER_CS_POL_S  7
+/* SPI_CK_DIS : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: 1: spi clk out disable,  0: spi clk out enable. Can be configured in CONF state..*/
+#define SPI_CK_DIS    (BIT(6))
+#define SPI_CK_DIS_M  (BIT(6))
+#define SPI_CK_DIS_V  0x1
+#define SPI_CK_DIS_S  6
+/* SPI_CS5_DIS : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/*description: SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Ca
+n be configured in CONF state..*/
+#define SPI_CS5_DIS    (BIT(5))
+#define SPI_CS5_DIS_M  (BIT(5))
+#define SPI_CS5_DIS_V  0x1
+#define SPI_CS5_DIS_S  5
+/* SPI_CS4_DIS : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Ca
+n be configured in CONF state..*/
+#define SPI_CS4_DIS    (BIT(4))
+#define SPI_CS4_DIS_M  (BIT(4))
+#define SPI_CS4_DIS_V  0x1
+#define SPI_CS4_DIS_S  4
+/* SPI_CS3_DIS : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Ca
+n be configured in CONF state..*/
+#define SPI_CS3_DIS    (BIT(3))
+#define SPI_CS3_DIS_M  (BIT(3))
+#define SPI_CS3_DIS_V  0x1
+#define SPI_CS3_DIS_S  3
+/* SPI_CS2_DIS : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Ca
+n be configured in CONF state..*/
+#define SPI_CS2_DIS    (BIT(2))
+#define SPI_CS2_DIS_M  (BIT(2))
+#define SPI_CS2_DIS_V  0x1
+#define SPI_CS2_DIS_S  2
+/* SPI_CS1_DIS : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Ca
+n be configured in CONF state..*/
+#define SPI_CS1_DIS    (BIT(1))
+#define SPI_CS1_DIS_M  (BIT(1))
+#define SPI_CS1_DIS_V  0x1
+#define SPI_CS1_DIS_S  1
+/* SPI_CS0_DIS : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Ca
+n be configured in CONF state..*/
+#define SPI_CS0_DIS    (BIT(0))
+#define SPI_CS0_DIS_M  (BIT(0))
+#define SPI_CS0_DIS_V  0x1
+#define SPI_CS0_DIS_S  0
+
+#define SPI_DIN_MODE_REG(i)          (REG_SPI_BASE(i) + 0x24)
+/* SPI_TIMING_HCLK_ACTIVE : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: 1:enable hclk in SPI input timing module.  0: disable it. Can be configured in C
+ONF state..*/
+#define SPI_TIMING_HCLK_ACTIVE    (BIT(16))
+#define SPI_TIMING_HCLK_ACTIVE_M  (BIT(16))
+#define SPI_TIMING_HCLK_ACTIVE_V  0x1
+#define SPI_TIMING_HCLK_ACTIVE_S  16
+/* SPI_DIN7_MODE : R/W ;bitpos:[15:14] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: input without delay
+ed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3:
+ input with the spi_clk. Can be configured in CONF state..*/
+#define SPI_DIN7_MODE    0x00000003
+#define SPI_DIN7_MODE_M  ((SPI_DIN7_MODE_V)<<(SPI_DIN7_MODE_S))
+#define SPI_DIN7_MODE_V  0x3
+#define SPI_DIN7_MODE_S  14
+/* SPI_DIN6_MODE : R/W ;bitpos:[13:12] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: input without delay
+ed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3:
+ input with the spi_clk. Can be configured in CONF state..*/
+#define SPI_DIN6_MODE    0x00000003
+#define SPI_DIN6_MODE_M  ((SPI_DIN6_MODE_V)<<(SPI_DIN6_MODE_S))
+#define SPI_DIN6_MODE_V  0x3
+#define SPI_DIN6_MODE_S  12
+/* SPI_DIN5_MODE : R/W ;bitpos:[11:10] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: input without delay
+ed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3:
+ input with the spi_clk. Can be configured in CONF state..*/
+#define SPI_DIN5_MODE    0x00000003
+#define SPI_DIN5_MODE_M  ((SPI_DIN5_MODE_V)<<(SPI_DIN5_MODE_S))
+#define SPI_DIN5_MODE_V  0x3
+#define SPI_DIN5_MODE_S  10
+/* SPI_DIN4_MODE : R/W ;bitpos:[9:8] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: input without delay
+ed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3:
+ input with the spi_clk. Can be configured in CONF state..*/
+#define SPI_DIN4_MODE    0x00000003
+#define SPI_DIN4_MODE_M  ((SPI_DIN4_MODE_V)<<(SPI_DIN4_MODE_S))
+#define SPI_DIN4_MODE_V  0x3
+#define SPI_DIN4_MODE_S  8
+/* SPI_DIN3_MODE : R/W ;bitpos:[7:6] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: input without delay
+ed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3:
+ input with the spi_clk. Can be configured in CONF state..*/
+#define SPI_DIN3_MODE    0x00000003
+#define SPI_DIN3_MODE_M  ((SPI_DIN3_MODE_V)<<(SPI_DIN3_MODE_S))
+#define SPI_DIN3_MODE_V  0x3
+#define SPI_DIN3_MODE_S  6
+/* SPI_DIN2_MODE : R/W ;bitpos:[5:4] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: input without delay
+ed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3:
+ input with the spi_clk. Can be configured in CONF state..*/
+#define SPI_DIN2_MODE    0x00000003
+#define SPI_DIN2_MODE_M  ((SPI_DIN2_MODE_V)<<(SPI_DIN2_MODE_S))
+#define SPI_DIN2_MODE_V  0x3
+#define SPI_DIN2_MODE_S  4
+/* SPI_DIN1_MODE : R/W ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: input without delay
+ed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3:
+ input with the spi_clk. Can be configured in CONF state..*/
+#define SPI_DIN1_MODE    0x00000003
+#define SPI_DIN1_MODE_M  ((SPI_DIN1_MODE_V)<<(SPI_DIN1_MODE_S))
+#define SPI_DIN1_MODE_V  0x3
+#define SPI_DIN1_MODE_S  2
+/* SPI_DIN0_MODE : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: input without delay
+ed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3:
+ input with the spi_clk. Can be configured in CONF state..*/
+#define SPI_DIN0_MODE    0x00000003
+#define SPI_DIN0_MODE_M  ((SPI_DIN0_MODE_V)<<(SPI_DIN0_MODE_S))
+#define SPI_DIN0_MODE_V  0x3
+#define SPI_DIN0_MODE_S  0
+
+#define SPI_DIN_NUM_REG(i)          (REG_SPI_BASE(i) + 0x28)
+/* SPI_DIN7_NUM : R/W ;bitpos:[15:14] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle,
+ 1: delayed by 2 cycles,...  Can be configured in CONF state..*/
+#define SPI_DIN7_NUM    0x00000003
+#define SPI_DIN7_NUM_M  ((SPI_DIN7_NUM_V)<<(SPI_DIN7_NUM_S))
+#define SPI_DIN7_NUM_V  0x3
+#define SPI_DIN7_NUM_S  14
+/* SPI_DIN6_NUM : R/W ;bitpos:[13:12] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle,
+ 1: delayed by 2 cycles,...  Can be configured in CONF state..*/
+#define SPI_DIN6_NUM    0x00000003
+#define SPI_DIN6_NUM_M  ((SPI_DIN6_NUM_V)<<(SPI_DIN6_NUM_S))
+#define SPI_DIN6_NUM_V  0x3
+#define SPI_DIN6_NUM_S  12
+/* SPI_DIN5_NUM : R/W ;bitpos:[11:10] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle,
+ 1: delayed by 2 cycles,...  Can be configured in CONF state..*/
+#define SPI_DIN5_NUM    0x00000003
+#define SPI_DIN5_NUM_M  ((SPI_DIN5_NUM_V)<<(SPI_DIN5_NUM_S))
+#define SPI_DIN5_NUM_V  0x3
+#define SPI_DIN5_NUM_S  10
+/* SPI_DIN4_NUM : R/W ;bitpos:[9:8] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle,
+ 1: delayed by 2 cycles,...  Can be configured in CONF state..*/
+#define SPI_DIN4_NUM    0x00000003
+#define SPI_DIN4_NUM_M  ((SPI_DIN4_NUM_V)<<(SPI_DIN4_NUM_S))
+#define SPI_DIN4_NUM_V  0x3
+#define SPI_DIN4_NUM_S  8
+/* SPI_DIN3_NUM : R/W ;bitpos:[7:6] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle,
+ 1: delayed by 2 cycles,...  Can be configured in CONF state..*/
+#define SPI_DIN3_NUM    0x00000003
+#define SPI_DIN3_NUM_M  ((SPI_DIN3_NUM_V)<<(SPI_DIN3_NUM_S))
+#define SPI_DIN3_NUM_V  0x3
+#define SPI_DIN3_NUM_S  6
+/* SPI_DIN2_NUM : R/W ;bitpos:[5:4] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle,
+ 1: delayed by 2 cycles,...  Can be configured in CONF state..*/
+#define SPI_DIN2_NUM    0x00000003
+#define SPI_DIN2_NUM_M  ((SPI_DIN2_NUM_V)<<(SPI_DIN2_NUM_S))
+#define SPI_DIN2_NUM_V  0x3
+#define SPI_DIN2_NUM_S  4
+/* SPI_DIN1_NUM : R/W ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle,
+ 1: delayed by 2 cycles,...  Can be configured in CONF state..*/
+#define SPI_DIN1_NUM    0x00000003
+#define SPI_DIN1_NUM_M  ((SPI_DIN1_NUM_V)<<(SPI_DIN1_NUM_S))
+#define SPI_DIN1_NUM_V  0x3
+#define SPI_DIN1_NUM_S  2
+/* SPI_DIN0_NUM : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle,
+ 1: delayed by 2 cycles,...  Can be configured in CONF state..*/
+#define SPI_DIN0_NUM    0x00000003
+#define SPI_DIN0_NUM_M  ((SPI_DIN0_NUM_V)<<(SPI_DIN0_NUM_S))
+#define SPI_DIN0_NUM_V  0x3
+#define SPI_DIN0_NUM_S  0
+
+#define SPI_DOUT_MODE_REG(i)          (REG_SPI_BASE(i) + 0x2C)
+/* SPI_D_DQS_MODE : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The output signal SPI_DQS is delayed by the SPI module clock, 0: output without
+delayed, 1: output delay for a SPI module clock cycle at its negative edge. Can
+be configured in CONF state..*/
+#define SPI_D_DQS_MODE    (BIT(8))
+#define SPI_D_DQS_MODE_M  (BIT(8))
+#define SPI_D_DQS_MODE_V  0x1
+#define SPI_D_DQS_MODE_S  8
+/* SPI_DOUT7_MODE : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The output signal $n is delayed by the SPI module clock, 0: output without delay
+ed, 1: output delay for a SPI module clock cycle at its negative edge. Can be co
+nfigured in CONF state..*/
+#define SPI_DOUT7_MODE    (BIT(7))
+#define SPI_DOUT7_MODE_M  (BIT(7))
+#define SPI_DOUT7_MODE_V  0x1
+#define SPI_DOUT7_MODE_S  7
+/* SPI_DOUT6_MODE : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The output signal $n is delayed by the SPI module clock, 0: output without delay
+ed, 1: output delay for a SPI module clock cycle at its negative edge. Can be co
+nfigured in CONF state..*/
+#define SPI_DOUT6_MODE    (BIT(6))
+#define SPI_DOUT6_MODE_M  (BIT(6))
+#define SPI_DOUT6_MODE_V  0x1
+#define SPI_DOUT6_MODE_S  6
+/* SPI_DOUT5_MODE : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The output signal $n is delayed by the SPI module clock, 0: output without delay
+ed, 1: output delay for a SPI module clock cycle at its negative edge. Can be co
+nfigured in CONF state..*/
+#define SPI_DOUT5_MODE    (BIT(5))
+#define SPI_DOUT5_MODE_M  (BIT(5))
+#define SPI_DOUT5_MODE_V  0x1
+#define SPI_DOUT5_MODE_S  5
+/* SPI_DOUT4_MODE : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The output signal $n is delayed by the SPI module clock, 0: output without delay
+ed, 1: output delay for a SPI module clock cycle at its negative edge. Can be co
+nfigured in CONF state..*/
+#define SPI_DOUT4_MODE    (BIT(4))
+#define SPI_DOUT4_MODE_M  (BIT(4))
+#define SPI_DOUT4_MODE_V  0x1
+#define SPI_DOUT4_MODE_S  4
+/* SPI_DOUT3_MODE : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The output signal $n is delayed by the SPI module clock, 0: output without delay
+ed, 1: output delay for a SPI module clock cycle at its negative edge. Can be co
+nfigured in CONF state..*/
+#define SPI_DOUT3_MODE    (BIT(3))
+#define SPI_DOUT3_MODE_M  (BIT(3))
+#define SPI_DOUT3_MODE_V  0x1
+#define SPI_DOUT3_MODE_S  3
+/* SPI_DOUT2_MODE : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The output signal $n is delayed by the SPI module clock, 0: output without delay
+ed, 1: output delay for a SPI module clock cycle at its negative edge. Can be co
+nfigured in CONF state..*/
+#define SPI_DOUT2_MODE    (BIT(2))
+#define SPI_DOUT2_MODE_M  (BIT(2))
+#define SPI_DOUT2_MODE_V  0x1
+#define SPI_DOUT2_MODE_S  2
+/* SPI_DOUT1_MODE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The output signal $n is delayed by the SPI module clock, 0: output without delay
+ed, 1: output delay for a SPI module clock cycle at its negative edge. Can be co
+nfigured in CONF state..*/
+#define SPI_DOUT1_MODE    (BIT(1))
+#define SPI_DOUT1_MODE_M  (BIT(1))
+#define SPI_DOUT1_MODE_V  0x1
+#define SPI_DOUT1_MODE_S  1
+/* SPI_DOUT0_MODE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The output signal $n is delayed by the SPI module clock, 0: output without delay
+ed, 1: output delay for a SPI module clock cycle at its negative edge. Can be co
+nfigured in CONF state..*/
+#define SPI_DOUT0_MODE    (BIT(0))
+#define SPI_DOUT0_MODE_M  (BIT(0))
+#define SPI_DOUT0_MODE_V  0x1
+#define SPI_DOUT0_MODE_S  0
+
+#define SPI_DMA_CONF_REG(i)          (REG_SPI_BASE(i) + 0x30)
+/* SPI_DMA_AFIFO_RST : WT ;bitpos:[31] ;default: 1'b0 ; */
+/*description: Set this bit to reset DMA TX AFIFO, which is used to send data out in SPI slave
+DMA controlled mode transfer..*/
+#define SPI_DMA_AFIFO_RST    (BIT(31))
+#define SPI_DMA_AFIFO_RST_M  (BIT(31))
+#define SPI_DMA_AFIFO_RST_V  0x1
+#define SPI_DMA_AFIFO_RST_S  31
+/* SPI_BUF_AFIFO_RST : WT ;bitpos:[30] ;default: 1'b0 ; */
+/*description: Set this bit to reset BUF TX AFIFO, which is used send data out in SPI slave CPU
+ controlled mode transfer and master mode transfer..*/
+#define SPI_BUF_AFIFO_RST    (BIT(30))
+#define SPI_BUF_AFIFO_RST_M  (BIT(30))
+#define SPI_BUF_AFIFO_RST_V  0x1
+#define SPI_BUF_AFIFO_RST_S  30
+/* SPI_RX_AFIFO_RST : WT ;bitpos:[29] ;default: 1'b0 ; */
+/*description: Set this bit to reset RX AFIFO, which is used to receive data in SPI master and
+slave mode transfer..*/
+#define SPI_RX_AFIFO_RST    (BIT(29))
+#define SPI_RX_AFIFO_RST_M  (BIT(29))
+#define SPI_RX_AFIFO_RST_V  0x1
+#define SPI_RX_AFIFO_RST_S  29
+/* SPI_DMA_TX_ENA : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: Set this bit to enable SPI DMA controlled send data mode..*/
+#define SPI_DMA_TX_ENA    (BIT(28))
+#define SPI_DMA_TX_ENA_M  (BIT(28))
+#define SPI_DMA_TX_ENA_V  0x1
+#define SPI_DMA_TX_ENA_S  28
+/* SPI_DMA_RX_ENA : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: Set this bit to enable SPI DMA controlled receive data mode..*/
+#define SPI_DMA_RX_ENA    (BIT(27))
+#define SPI_DMA_RX_ENA_M  (BIT(27))
+#define SPI_DMA_RX_ENA_V  0x1
+#define SPI_DMA_RX_ENA_S  27
+/* SPI_RX_EOF_EN : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: 1: spi_dma_inlink_eof is set when the number of dma pushed data bytes is equal t
+o the value of spi_slv/mst_dma_rd_bytelen[19:0] in spi dma transition.  0: spi_d
+ma_inlink_eof is set by spi_trans_done in non-seg-trans or spi_dma_seg_trans_don
+e in seg-trans..*/
+#define SPI_RX_EOF_EN    (BIT(21))
+#define SPI_RX_EOF_EN_M  (BIT(21))
+#define SPI_RX_EOF_EN_V  0x1
+#define SPI_RX_EOF_EN_S  21
+/* SPI_SLV_TX_SEG_TRANS_CLR_EN : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: 1: spi_dma_outfifo_empty_vld is cleared by spi slave cmd 6. 0: spi_dma_outfifo_e
+mpty_vld is cleared by spi_trans_done..*/
+#define SPI_SLV_TX_SEG_TRANS_CLR_EN    (BIT(20))
+#define SPI_SLV_TX_SEG_TRANS_CLR_EN_M  (BIT(20))
+#define SPI_SLV_TX_SEG_TRANS_CLR_EN_V  0x1
+#define SPI_SLV_TX_SEG_TRANS_CLR_EN_S  20
+/* SPI_SLV_RX_SEG_TRANS_CLR_EN : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: 1: spi_dma_infifo_full_vld is cleared by spi slave cmd 5. 0: spi_dma_infifo_full
+_vld is cleared by spi_trans_done..*/
+#define SPI_SLV_RX_SEG_TRANS_CLR_EN    (BIT(19))
+#define SPI_SLV_RX_SEG_TRANS_CLR_EN_M  (BIT(19))
+#define SPI_SLV_RX_SEG_TRANS_CLR_EN_V  0x1
+#define SPI_SLV_RX_SEG_TRANS_CLR_EN_S  19
+/* SPI_DMA_SLV_SEG_TRANS_EN : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: Enable dma segment transfer in spi dma half slave mode. 1: enable. 0: disable..*/
+#define SPI_DMA_SLV_SEG_TRANS_EN    (BIT(18))
+#define SPI_DMA_SLV_SEG_TRANS_EN_M  (BIT(18))
+#define SPI_DMA_SLV_SEG_TRANS_EN_V  0x1
+#define SPI_DMA_SLV_SEG_TRANS_EN_S  18
+/* SPI_DMA_INFIFO_FULL : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: Records the status of DMA RX FIFO. 1: DMA RX FIFO is not ready for receiving dat
+a. 0: DMA RX FIFO is ready for receiving data..*/
+#define SPI_DMA_INFIFO_FULL    (BIT(1))
+#define SPI_DMA_INFIFO_FULL_M  (BIT(1))
+#define SPI_DMA_INFIFO_FULL_V  0x1
+#define SPI_DMA_INFIFO_FULL_S  1
+/* SPI_DMA_OUTFIFO_EMPTY : RO ;bitpos:[0] ;default: 1'b1 ; */
+/*description: Records the status of DMA TX FIFO. 1: DMA TX FIFO is not ready for sending data.
+ 0: DMA TX FIFO is ready for sending data..*/
+#define SPI_DMA_OUTFIFO_EMPTY    (BIT(0))
+#define SPI_DMA_OUTFIFO_EMPTY_M  (BIT(0))
+#define SPI_DMA_OUTFIFO_EMPTY_V  0x1
+#define SPI_DMA_OUTFIFO_EMPTY_S  0
+
+#define SPI_DMA_INT_ENA_REG(i)          (REG_SPI_BASE(i) + 0x34)
+/* SPI_APP1_INT_ENA : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_APP1_INT interrupt..*/
+#define SPI_APP1_INT_ENA    (BIT(20))
+#define SPI_APP1_INT_ENA_M  (BIT(20))
+#define SPI_APP1_INT_ENA_V  0x1
+#define SPI_APP1_INT_ENA_S  20
+/* SPI_APP2_INT_ENA : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_APP2_INT interrupt..*/
+#define SPI_APP2_INT_ENA    (BIT(19))
+#define SPI_APP2_INT_ENA_M  (BIT(19))
+#define SPI_APP2_INT_ENA_V  0x1
+#define SPI_APP2_INT_ENA_S  19
+/* SPI_MST_TX_AFIFO_REMPTY_ERR_INT_ENA : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt..*/
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_ENA    (BIT(18))
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_ENA_M  (BIT(18))
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_ENA_V  0x1
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_ENA_S  18
+/* SPI_MST_RX_AFIFO_WFULL_ERR_INT_ENA : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt..*/
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_ENA    (BIT(17))
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_ENA_M  (BIT(17))
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_ENA_V  0x1
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_ENA_S  17
+/* SPI_SLV_CMD_ERR_INT_ENA : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_SLV_CMD_ERR_INT interrupt..*/
+#define SPI_SLV_CMD_ERR_INT_ENA    (BIT(16))
+#define SPI_SLV_CMD_ERR_INT_ENA_M  (BIT(16))
+#define SPI_SLV_CMD_ERR_INT_ENA_V  0x1
+#define SPI_SLV_CMD_ERR_INT_ENA_S  16
+/* SPI_SLV_BUF_ADDR_ERR_INT_ENA : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt..*/
+#define SPI_SLV_BUF_ADDR_ERR_INT_ENA    (BIT(15))
+#define SPI_SLV_BUF_ADDR_ERR_INT_ENA_M  (BIT(15))
+#define SPI_SLV_BUF_ADDR_ERR_INT_ENA_V  0x1
+#define SPI_SLV_BUF_ADDR_ERR_INT_ENA_S  15
+/* SPI_SEG_MAGIC_ERR_INT_ENA : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_SEG_MAGIC_ERR_INT interrupt..*/
+#define SPI_SEG_MAGIC_ERR_INT_ENA    (BIT(14))
+#define SPI_SEG_MAGIC_ERR_INT_ENA_M  (BIT(14))
+#define SPI_SEG_MAGIC_ERR_INT_ENA_V  0x1
+#define SPI_SEG_MAGIC_ERR_INT_ENA_S  14
+/* SPI_DMA_SEG_TRANS_DONE_INT_ENA : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt..*/
+#define SPI_DMA_SEG_TRANS_DONE_INT_ENA    (BIT(13))
+#define SPI_DMA_SEG_TRANS_DONE_INT_ENA_M  (BIT(13))
+#define SPI_DMA_SEG_TRANS_DONE_INT_ENA_V  0x1
+#define SPI_DMA_SEG_TRANS_DONE_INT_ENA_S  13
+/* SPI_TRANS_DONE_INT_ENA : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_TRANS_DONE_INT interrupt..*/
+#define SPI_TRANS_DONE_INT_ENA    (BIT(12))
+#define SPI_TRANS_DONE_INT_ENA_M  (BIT(12))
+#define SPI_TRANS_DONE_INT_ENA_V  0x1
+#define SPI_TRANS_DONE_INT_ENA_S  12
+/* SPI_SLV_WR_BUF_DONE_INT_ENA : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_SLV_WR_BUF_DONE_INT interrupt..*/
+#define SPI_SLV_WR_BUF_DONE_INT_ENA    (BIT(11))
+#define SPI_SLV_WR_BUF_DONE_INT_ENA_M  (BIT(11))
+#define SPI_SLV_WR_BUF_DONE_INT_ENA_V  0x1
+#define SPI_SLV_WR_BUF_DONE_INT_ENA_S  11
+/* SPI_SLV_RD_BUF_DONE_INT_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_SLV_RD_BUF_DONE_INT interrupt..*/
+#define SPI_SLV_RD_BUF_DONE_INT_ENA    (BIT(10))
+#define SPI_SLV_RD_BUF_DONE_INT_ENA_M  (BIT(10))
+#define SPI_SLV_RD_BUF_DONE_INT_ENA_V  0x1
+#define SPI_SLV_RD_BUF_DONE_INT_ENA_S  10
+/* SPI_SLV_WR_DMA_DONE_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_SLV_WR_DMA_DONE_INT interrupt..*/
+#define SPI_SLV_WR_DMA_DONE_INT_ENA    (BIT(9))
+#define SPI_SLV_WR_DMA_DONE_INT_ENA_M  (BIT(9))
+#define SPI_SLV_WR_DMA_DONE_INT_ENA_V  0x1
+#define SPI_SLV_WR_DMA_DONE_INT_ENA_S  9
+/* SPI_SLV_RD_DMA_DONE_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_SLV_RD_DMA_DONE_INT interrupt..*/
+#define SPI_SLV_RD_DMA_DONE_INT_ENA    (BIT(8))
+#define SPI_SLV_RD_DMA_DONE_INT_ENA_M  (BIT(8))
+#define SPI_SLV_RD_DMA_DONE_INT_ENA_V  0x1
+#define SPI_SLV_RD_DMA_DONE_INT_ENA_S  8
+/* SPI_SLV_CMDA_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The enable bit for SPI slave CMDA interrupt..*/
+#define SPI_SLV_CMDA_INT_ENA    (BIT(7))
+#define SPI_SLV_CMDA_INT_ENA_M  (BIT(7))
+#define SPI_SLV_CMDA_INT_ENA_V  0x1
+#define SPI_SLV_CMDA_INT_ENA_S  7
+/* SPI_SLV_CMD9_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The enable bit for SPI slave CMD9 interrupt..*/
+#define SPI_SLV_CMD9_INT_ENA    (BIT(6))
+#define SPI_SLV_CMD9_INT_ENA_M  (BIT(6))
+#define SPI_SLV_CMD9_INT_ENA_V  0x1
+#define SPI_SLV_CMD9_INT_ENA_S  6
+/* SPI_SLV_CMD8_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The enable bit for SPI slave CMD8 interrupt..*/
+#define SPI_SLV_CMD8_INT_ENA    (BIT(5))
+#define SPI_SLV_CMD8_INT_ENA_M  (BIT(5))
+#define SPI_SLV_CMD8_INT_ENA_V  0x1
+#define SPI_SLV_CMD8_INT_ENA_S  5
+/* SPI_SLV_CMD7_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The enable bit for SPI slave CMD7 interrupt..*/
+#define SPI_SLV_CMD7_INT_ENA    (BIT(4))
+#define SPI_SLV_CMD7_INT_ENA_M  (BIT(4))
+#define SPI_SLV_CMD7_INT_ENA_V  0x1
+#define SPI_SLV_CMD7_INT_ENA_S  4
+/* SPI_SLV_EN_QPI_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The enable bit for SPI slave En_QPI interrupt..*/
+#define SPI_SLV_EN_QPI_INT_ENA    (BIT(3))
+#define SPI_SLV_EN_QPI_INT_ENA_M  (BIT(3))
+#define SPI_SLV_EN_QPI_INT_ENA_V  0x1
+#define SPI_SLV_EN_QPI_INT_ENA_S  3
+/* SPI_SLV_EX_QPI_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The enable bit for SPI slave Ex_QPI interrupt..*/
+#define SPI_SLV_EX_QPI_INT_ENA    (BIT(2))
+#define SPI_SLV_EX_QPI_INT_ENA_M  (BIT(2))
+#define SPI_SLV_EX_QPI_INT_ENA_V  0x1
+#define SPI_SLV_EX_QPI_INT_ENA_S  2
+/* SPI_DMA_OUTFIFO_EMPTY_ERR_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt..*/
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_ENA    (BIT(1))
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_ENA_M  (BIT(1))
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_ENA_V  0x1
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_ENA_S  1
+/* SPI_DMA_INFIFO_FULL_ERR_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The enable bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt..*/
+#define SPI_DMA_INFIFO_FULL_ERR_INT_ENA    (BIT(0))
+#define SPI_DMA_INFIFO_FULL_ERR_INT_ENA_M  (BIT(0))
+#define SPI_DMA_INFIFO_FULL_ERR_INT_ENA_V  0x1
+#define SPI_DMA_INFIFO_FULL_ERR_INT_ENA_S  0
+
+#define SPI_DMA_INT_CLR_REG(i)          (REG_SPI_BASE(i) + 0x38)
+/* SPI_APP1_INT_CLR : WT ;bitpos:[20] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_APP1_INT interrupt..*/
+#define SPI_APP1_INT_CLR    (BIT(20))
+#define SPI_APP1_INT_CLR_M  (BIT(20))
+#define SPI_APP1_INT_CLR_V  0x1
+#define SPI_APP1_INT_CLR_S  20
+/* SPI_APP2_INT_CLR : WT ;bitpos:[19] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_APP2_INT interrupt..*/
+#define SPI_APP2_INT_CLR    (BIT(19))
+#define SPI_APP2_INT_CLR_M  (BIT(19))
+#define SPI_APP2_INT_CLR_V  0x1
+#define SPI_APP2_INT_CLR_S  19
+/* SPI_MST_TX_AFIFO_REMPTY_ERR_INT_CLR : WT ;bitpos:[18] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt..*/
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_CLR    (BIT(18))
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_CLR_M  (BIT(18))
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_CLR_V  0x1
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_CLR_S  18
+/* SPI_MST_RX_AFIFO_WFULL_ERR_INT_CLR : WT ;bitpos:[17] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt..*/
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_CLR    (BIT(17))
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_CLR_M  (BIT(17))
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_CLR_V  0x1
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_CLR_S  17
+/* SPI_SLV_CMD_ERR_INT_CLR : WT ;bitpos:[16] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_SLV_CMD_ERR_INT interrupt..*/
+#define SPI_SLV_CMD_ERR_INT_CLR    (BIT(16))
+#define SPI_SLV_CMD_ERR_INT_CLR_M  (BIT(16))
+#define SPI_SLV_CMD_ERR_INT_CLR_V  0x1
+#define SPI_SLV_CMD_ERR_INT_CLR_S  16
+/* SPI_SLV_BUF_ADDR_ERR_INT_CLR : WT ;bitpos:[15] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt..*/
+#define SPI_SLV_BUF_ADDR_ERR_INT_CLR    (BIT(15))
+#define SPI_SLV_BUF_ADDR_ERR_INT_CLR_M  (BIT(15))
+#define SPI_SLV_BUF_ADDR_ERR_INT_CLR_V  0x1
+#define SPI_SLV_BUF_ADDR_ERR_INT_CLR_S  15
+/* SPI_SEG_MAGIC_ERR_INT_CLR : WT ;bitpos:[14] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_SEG_MAGIC_ERR_INT interrupt..*/
+#define SPI_SEG_MAGIC_ERR_INT_CLR    (BIT(14))
+#define SPI_SEG_MAGIC_ERR_INT_CLR_M  (BIT(14))
+#define SPI_SEG_MAGIC_ERR_INT_CLR_V  0x1
+#define SPI_SEG_MAGIC_ERR_INT_CLR_S  14
+/* SPI_DMA_SEG_TRANS_DONE_INT_CLR : WT ;bitpos:[13] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt..*/
+#define SPI_DMA_SEG_TRANS_DONE_INT_CLR    (BIT(13))
+#define SPI_DMA_SEG_TRANS_DONE_INT_CLR_M  (BIT(13))
+#define SPI_DMA_SEG_TRANS_DONE_INT_CLR_V  0x1
+#define SPI_DMA_SEG_TRANS_DONE_INT_CLR_S  13
+/* SPI_TRANS_DONE_INT_CLR : WT ;bitpos:[12] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_TRANS_DONE_INT interrupt..*/
+#define SPI_TRANS_DONE_INT_CLR    (BIT(12))
+#define SPI_TRANS_DONE_INT_CLR_M  (BIT(12))
+#define SPI_TRANS_DONE_INT_CLR_V  0x1
+#define SPI_TRANS_DONE_INT_CLR_S  12
+/* SPI_SLV_WR_BUF_DONE_INT_CLR : WT ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_SLV_WR_BUF_DONE_INT interrupt..*/
+#define SPI_SLV_WR_BUF_DONE_INT_CLR    (BIT(11))
+#define SPI_SLV_WR_BUF_DONE_INT_CLR_M  (BIT(11))
+#define SPI_SLV_WR_BUF_DONE_INT_CLR_V  0x1
+#define SPI_SLV_WR_BUF_DONE_INT_CLR_S  11
+/* SPI_SLV_RD_BUF_DONE_INT_CLR : WT ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_SLV_RD_BUF_DONE_INT interrupt..*/
+#define SPI_SLV_RD_BUF_DONE_INT_CLR    (BIT(10))
+#define SPI_SLV_RD_BUF_DONE_INT_CLR_M  (BIT(10))
+#define SPI_SLV_RD_BUF_DONE_INT_CLR_V  0x1
+#define SPI_SLV_RD_BUF_DONE_INT_CLR_S  10
+/* SPI_SLV_WR_DMA_DONE_INT_CLR : WT ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_SLV_WR_DMA_DONE_INT interrupt..*/
+#define SPI_SLV_WR_DMA_DONE_INT_CLR    (BIT(9))
+#define SPI_SLV_WR_DMA_DONE_INT_CLR_M  (BIT(9))
+#define SPI_SLV_WR_DMA_DONE_INT_CLR_V  0x1
+#define SPI_SLV_WR_DMA_DONE_INT_CLR_S  9
+/* SPI_SLV_RD_DMA_DONE_INT_CLR : WT ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_SLV_RD_DMA_DONE_INT interrupt..*/
+#define SPI_SLV_RD_DMA_DONE_INT_CLR    (BIT(8))
+#define SPI_SLV_RD_DMA_DONE_INT_CLR_M  (BIT(8))
+#define SPI_SLV_RD_DMA_DONE_INT_CLR_V  0x1
+#define SPI_SLV_RD_DMA_DONE_INT_CLR_S  8
+/* SPI_SLV_CMDA_INT_CLR : WT ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The clear bit for SPI slave CMDA interrupt..*/
+#define SPI_SLV_CMDA_INT_CLR    (BIT(7))
+#define SPI_SLV_CMDA_INT_CLR_M  (BIT(7))
+#define SPI_SLV_CMDA_INT_CLR_V  0x1
+#define SPI_SLV_CMDA_INT_CLR_S  7
+/* SPI_SLV_CMD9_INT_CLR : WT ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The clear bit for SPI slave CMD9 interrupt..*/
+#define SPI_SLV_CMD9_INT_CLR    (BIT(6))
+#define SPI_SLV_CMD9_INT_CLR_M  (BIT(6))
+#define SPI_SLV_CMD9_INT_CLR_V  0x1
+#define SPI_SLV_CMD9_INT_CLR_S  6
+/* SPI_SLV_CMD8_INT_CLR : WT ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The clear bit for SPI slave CMD8 interrupt..*/
+#define SPI_SLV_CMD8_INT_CLR    (BIT(5))
+#define SPI_SLV_CMD8_INT_CLR_M  (BIT(5))
+#define SPI_SLV_CMD8_INT_CLR_V  0x1
+#define SPI_SLV_CMD8_INT_CLR_S  5
+/* SPI_SLV_CMD7_INT_CLR : WT ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The clear bit for SPI slave CMD7 interrupt..*/
+#define SPI_SLV_CMD7_INT_CLR    (BIT(4))
+#define SPI_SLV_CMD7_INT_CLR_M  (BIT(4))
+#define SPI_SLV_CMD7_INT_CLR_V  0x1
+#define SPI_SLV_CMD7_INT_CLR_S  4
+/* SPI_SLV_EN_QPI_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The clear bit for SPI slave En_QPI interrupt..*/
+#define SPI_SLV_EN_QPI_INT_CLR    (BIT(3))
+#define SPI_SLV_EN_QPI_INT_CLR_M  (BIT(3))
+#define SPI_SLV_EN_QPI_INT_CLR_V  0x1
+#define SPI_SLV_EN_QPI_INT_CLR_S  3
+/* SPI_SLV_EX_QPI_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The clear bit for SPI slave Ex_QPI interrupt..*/
+#define SPI_SLV_EX_QPI_INT_CLR    (BIT(2))
+#define SPI_SLV_EX_QPI_INT_CLR_M  (BIT(2))
+#define SPI_SLV_EX_QPI_INT_CLR_V  0x1
+#define SPI_SLV_EX_QPI_INT_CLR_S  2
+/* SPI_DMA_OUTFIFO_EMPTY_ERR_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt..*/
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_CLR    (BIT(1))
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_CLR_M  (BIT(1))
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_CLR_V  0x1
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_CLR_S  1
+/* SPI_DMA_INFIFO_FULL_ERR_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The clear bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt..*/
+#define SPI_DMA_INFIFO_FULL_ERR_INT_CLR    (BIT(0))
+#define SPI_DMA_INFIFO_FULL_ERR_INT_CLR_M  (BIT(0))
+#define SPI_DMA_INFIFO_FULL_ERR_INT_CLR_V  0x1
+#define SPI_DMA_INFIFO_FULL_ERR_INT_CLR_S  0
+
+#define SPI_DMA_INT_RAW_REG(i)          (REG_SPI_BASE(i) + 0x3C)
+/* SPI_APP1_INT_RAW : R/WTC/SS ;bitpos:[20] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_APP1_INT interrupt. The value is only controlled by software
+..*/
+#define SPI_APP1_INT_RAW    (BIT(20))
+#define SPI_APP1_INT_RAW_M  (BIT(20))
+#define SPI_APP1_INT_RAW_V  0x1
+#define SPI_APP1_INT_RAW_S  20
+/* SPI_APP2_INT_RAW : R/WTC/SS ;bitpos:[19] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_APP2_INT interrupt. The value is only controlled by software
+..*/
+#define SPI_APP2_INT_RAW    (BIT(19))
+#define SPI_APP2_INT_RAW_M  (BIT(19))
+#define SPI_APP2_INT_RAW_V  0x1
+#define SPI_APP2_INT_RAW_S  19
+/* SPI_MST_TX_AFIFO_REMPTY_ERR_INT_RAW : R/WTC/SS ;bitpos:[18] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt. 1: There is a TX BUF
+AFIFO read-empty error when SPI outputs data in master mode. 0: Others..*/
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_RAW    (BIT(18))
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_RAW_M  (BIT(18))
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_RAW_V  0x1
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_RAW_S  18
+/* SPI_MST_RX_AFIFO_WFULL_ERR_INT_RAW : R/WTC/SS ;bitpos:[17] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt. 1: There is a RX AFIFO
+ write-full error when SPI inputs data in master mode. 0: Others..*/
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_RAW    (BIT(17))
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_RAW_M  (BIT(17))
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_RAW_V  0x1
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_RAW_S  17
+/* SPI_SLV_CMD_ERR_INT_RAW : R/WTC/SS ;bitpos:[16] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_SLV_CMD_ERR_INT interrupt. 1: The slave command value in the
+ current SPI slave HD mode transmission is not supported. 0: Others..*/
+#define SPI_SLV_CMD_ERR_INT_RAW    (BIT(16))
+#define SPI_SLV_CMD_ERR_INT_RAW_M  (BIT(16))
+#define SPI_SLV_CMD_ERR_INT_RAW_V  0x1
+#define SPI_SLV_CMD_ERR_INT_RAW_S  16
+/* SPI_SLV_BUF_ADDR_ERR_INT_RAW : R/WTC/SS ;bitpos:[15] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt. 1: The accessing data addres
+s of the current SPI slave mode CPU controlled FD, Wr_BUF or Rd_BUF transmission
+ is bigger than 63. 0: Others..*/
+#define SPI_SLV_BUF_ADDR_ERR_INT_RAW    (BIT(15))
+#define SPI_SLV_BUF_ADDR_ERR_INT_RAW_M  (BIT(15))
+#define SPI_SLV_BUF_ADDR_ERR_INT_RAW_V  0x1
+#define SPI_SLV_BUF_ADDR_ERR_INT_RAW_S  15
+/* SPI_SEG_MAGIC_ERR_INT_RAW : R/WTC/SS ;bitpos:[14] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_SEG_MAGIC_ERR_INT interrupt. 1: The magic value in CONF buff
+er is error in the DMA seg-conf-trans. 0: others..*/
+#define SPI_SEG_MAGIC_ERR_INT_RAW    (BIT(14))
+#define SPI_SEG_MAGIC_ERR_INT_RAW_M  (BIT(14))
+#define SPI_SEG_MAGIC_ERR_INT_RAW_V  0x1
+#define SPI_SEG_MAGIC_ERR_INT_RAW_S  14
+/* SPI_DMA_SEG_TRANS_DONE_INT_RAW : R/WTC/SS ;bitpos:[13] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt. 1:  spi master DMA full-du
+plex/half-duplex seg-conf-trans ends or slave half-duplex seg-trans ends. And da
+ta has been pushed to corresponding memory.  0:  seg-conf-trans or seg-trans is
+not ended or not occurred. .*/
+#define SPI_DMA_SEG_TRANS_DONE_INT_RAW    (BIT(13))
+#define SPI_DMA_SEG_TRANS_DONE_INT_RAW_M  (BIT(13))
+#define SPI_DMA_SEG_TRANS_DONE_INT_RAW_V  0x1
+#define SPI_DMA_SEG_TRANS_DONE_INT_RAW_S  13
+/* SPI_TRANS_DONE_INT_RAW : R/WTC/SS ;bitpos:[12] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_TRANS_DONE_INT interrupt. 1: SPI master mode transmission is
+ ended. 0: others..*/
+#define SPI_TRANS_DONE_INT_RAW    (BIT(12))
+#define SPI_TRANS_DONE_INT_RAW_M  (BIT(12))
+#define SPI_TRANS_DONE_INT_RAW_V  0x1
+#define SPI_TRANS_DONE_INT_RAW_S  12
+/* SPI_SLV_WR_BUF_DONE_INT_RAW : R/WTC/SS ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_SLV_WR_BUF_DONE_INT interrupt. 1: SPI slave mode Wr_BUF tran
+smission is ended. 0: Others..*/
+#define SPI_SLV_WR_BUF_DONE_INT_RAW    (BIT(11))
+#define SPI_SLV_WR_BUF_DONE_INT_RAW_M  (BIT(11))
+#define SPI_SLV_WR_BUF_DONE_INT_RAW_V  0x1
+#define SPI_SLV_WR_BUF_DONE_INT_RAW_S  11
+/* SPI_SLV_RD_BUF_DONE_INT_RAW : R/WTC/SS ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_SLV_RD_BUF_DONE_INT interrupt. 1: SPI slave mode Rd_BUF tran
+smission is ended. 0: Others..*/
+#define SPI_SLV_RD_BUF_DONE_INT_RAW    (BIT(10))
+#define SPI_SLV_RD_BUF_DONE_INT_RAW_M  (BIT(10))
+#define SPI_SLV_RD_BUF_DONE_INT_RAW_V  0x1
+#define SPI_SLV_RD_BUF_DONE_INT_RAW_S  10
+/* SPI_SLV_WR_DMA_DONE_INT_RAW : R/WTC/SS ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_SLV_WR_DMA_DONE_INT interrupt. 1: SPI slave mode Wr_DMA tran
+smission is ended. 0: Others..*/
+#define SPI_SLV_WR_DMA_DONE_INT_RAW    (BIT(9))
+#define SPI_SLV_WR_DMA_DONE_INT_RAW_M  (BIT(9))
+#define SPI_SLV_WR_DMA_DONE_INT_RAW_V  0x1
+#define SPI_SLV_WR_DMA_DONE_INT_RAW_S  9
+/* SPI_SLV_RD_DMA_DONE_INT_RAW : R/WTC/SS ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The raw bit for SPI_SLV_RD_DMA_DONE_INT interrupt. 1: SPI slave mode Rd_DMA tran
+smission is ended. 0: Others..*/
+#define SPI_SLV_RD_DMA_DONE_INT_RAW    (BIT(8))
+#define SPI_SLV_RD_DMA_DONE_INT_RAW_M  (BIT(8))
+#define SPI_SLV_RD_DMA_DONE_INT_RAW_V  0x1
+#define SPI_SLV_RD_DMA_DONE_INT_RAW_S  8
+/* SPI_SLV_CMDA_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw bit for SPI slave CMDA interrupt. 1: SPI slave mode CMDA transmission is
+ ended. 0: Others..*/
+#define SPI_SLV_CMDA_INT_RAW    (BIT(7))
+#define SPI_SLV_CMDA_INT_RAW_M  (BIT(7))
+#define SPI_SLV_CMDA_INT_RAW_V  0x1
+#define SPI_SLV_CMDA_INT_RAW_S  7
+/* SPI_SLV_CMD9_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw bit for SPI slave CMD9 interrupt. 1: SPI slave mode CMD9 transmission is
+ ended. 0: Others..*/
+#define SPI_SLV_CMD9_INT_RAW    (BIT(6))
+#define SPI_SLV_CMD9_INT_RAW_M  (BIT(6))
+#define SPI_SLV_CMD9_INT_RAW_V  0x1
+#define SPI_SLV_CMD9_INT_RAW_S  6
+/* SPI_SLV_CMD8_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw bit for SPI slave CMD8 interrupt. 1: SPI slave mode CMD8 transmission is
+ ended. 0: Others..*/
+#define SPI_SLV_CMD8_INT_RAW    (BIT(5))
+#define SPI_SLV_CMD8_INT_RAW_M  (BIT(5))
+#define SPI_SLV_CMD8_INT_RAW_V  0x1
+#define SPI_SLV_CMD8_INT_RAW_S  5
+/* SPI_SLV_CMD7_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw bit for SPI slave CMD7 interrupt. 1: SPI slave mode CMD7 transmission is
+ ended. 0: Others..*/
+#define SPI_SLV_CMD7_INT_RAW    (BIT(4))
+#define SPI_SLV_CMD7_INT_RAW_M  (BIT(4))
+#define SPI_SLV_CMD7_INT_RAW_V  0x1
+#define SPI_SLV_CMD7_INT_RAW_S  4
+/* SPI_SLV_EN_QPI_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw bit for SPI slave En_QPI interrupt. 1: SPI slave mode En_QPI transmissio
+n is ended. 0: Others..*/
+#define SPI_SLV_EN_QPI_INT_RAW    (BIT(3))
+#define SPI_SLV_EN_QPI_INT_RAW_M  (BIT(3))
+#define SPI_SLV_EN_QPI_INT_RAW_V  0x1
+#define SPI_SLV_EN_QPI_INT_RAW_S  3
+/* SPI_SLV_EX_QPI_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw bit for SPI slave Ex_QPI interrupt. 1: SPI slave mode Ex_QPI transmissio
+n is ended. 0: Others..*/
+#define SPI_SLV_EX_QPI_INT_RAW    (BIT(2))
+#define SPI_SLV_EX_QPI_INT_RAW_M  (BIT(2))
+#define SPI_SLV_EX_QPI_INT_RAW_V  0x1
+#define SPI_SLV_EX_QPI_INT_RAW_S  2
+/* SPI_DMA_OUTFIFO_EMPTY_ERR_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: 1: The current data rate of DMA TX is smaller than that of SPI. SPI will stop in
+ master mode and send out all 0 in slave mode.  0: Others.  .*/
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_RAW    (BIT(1))
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_RAW_M  (BIT(1))
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_RAW_V  0x1
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_RAW_S  1
+/* SPI_DMA_INFIFO_FULL_ERR_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: 1: The current data rate of DMA Rx is smaller than that of SPI, which will lose
+the receive data.  0: Others.  .*/
+#define SPI_DMA_INFIFO_FULL_ERR_INT_RAW    (BIT(0))
+#define SPI_DMA_INFIFO_FULL_ERR_INT_RAW_M  (BIT(0))
+#define SPI_DMA_INFIFO_FULL_ERR_INT_RAW_V  0x1
+#define SPI_DMA_INFIFO_FULL_ERR_INT_RAW_S  0
+
+#define SPI_DMA_INT_ST_REG(i)          (REG_SPI_BASE(i) + 0x40)
+/* SPI_APP1_INT_ST : RO ;bitpos:[20] ;default: 1'b0 ; */
+/*description: The status bit for SPI_APP1_INT interrupt..*/
+#define SPI_APP1_INT_ST    (BIT(20))
+#define SPI_APP1_INT_ST_M  (BIT(20))
+#define SPI_APP1_INT_ST_V  0x1
+#define SPI_APP1_INT_ST_S  20
+/* SPI_APP2_INT_ST : RO ;bitpos:[19] ;default: 1'b0 ; */
+/*description: The status bit for SPI_APP2_INT interrupt..*/
+#define SPI_APP2_INT_ST    (BIT(19))
+#define SPI_APP2_INT_ST_M  (BIT(19))
+#define SPI_APP2_INT_ST_V  0x1
+#define SPI_APP2_INT_ST_S  19
+/* SPI_MST_TX_AFIFO_REMPTY_ERR_INT_ST : RO ;bitpos:[18] ;default: 1'b0 ; */
+/*description: The status bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt..*/
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_ST    (BIT(18))
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_ST_M  (BIT(18))
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_ST_V  0x1
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_ST_S  18
+/* SPI_MST_RX_AFIFO_WFULL_ERR_INT_ST : RO ;bitpos:[17] ;default: 1'b0 ; */
+/*description: The status bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt..*/
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_ST    (BIT(17))
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_ST_M  (BIT(17))
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_ST_V  0x1
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_ST_S  17
+/* SPI_SLV_CMD_ERR_INT_ST : RO ;bitpos:[16] ;default: 1'b0 ; */
+/*description: The status bit for SPI_SLV_CMD_ERR_INT interrupt..*/
+#define SPI_SLV_CMD_ERR_INT_ST    (BIT(16))
+#define SPI_SLV_CMD_ERR_INT_ST_M  (BIT(16))
+#define SPI_SLV_CMD_ERR_INT_ST_V  0x1
+#define SPI_SLV_CMD_ERR_INT_ST_S  16
+/* SPI_SLV_BUF_ADDR_ERR_INT_ST : RO ;bitpos:[15] ;default: 1'b0 ; */
+/*description: The status bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt..*/
+#define SPI_SLV_BUF_ADDR_ERR_INT_ST    (BIT(15))
+#define SPI_SLV_BUF_ADDR_ERR_INT_ST_M  (BIT(15))
+#define SPI_SLV_BUF_ADDR_ERR_INT_ST_V  0x1
+#define SPI_SLV_BUF_ADDR_ERR_INT_ST_S  15
+/* SPI_SEG_MAGIC_ERR_INT_ST : RO ;bitpos:[14] ;default: 1'b0 ; */
+/*description: The status bit for SPI_SEG_MAGIC_ERR_INT interrupt..*/
+#define SPI_SEG_MAGIC_ERR_INT_ST    (BIT(14))
+#define SPI_SEG_MAGIC_ERR_INT_ST_M  (BIT(14))
+#define SPI_SEG_MAGIC_ERR_INT_ST_V  0x1
+#define SPI_SEG_MAGIC_ERR_INT_ST_S  14
+/* SPI_DMA_SEG_TRANS_DONE_INT_ST : RO ;bitpos:[13] ;default: 1'b0 ; */
+/*description: The status bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt..*/
+#define SPI_DMA_SEG_TRANS_DONE_INT_ST    (BIT(13))
+#define SPI_DMA_SEG_TRANS_DONE_INT_ST_M  (BIT(13))
+#define SPI_DMA_SEG_TRANS_DONE_INT_ST_V  0x1
+#define SPI_DMA_SEG_TRANS_DONE_INT_ST_S  13
+/* SPI_TRANS_DONE_INT_ST : RO ;bitpos:[12] ;default: 1'b0 ; */
+/*description: The status bit for SPI_TRANS_DONE_INT interrupt..*/
+#define SPI_TRANS_DONE_INT_ST    (BIT(12))
+#define SPI_TRANS_DONE_INT_ST_M  (BIT(12))
+#define SPI_TRANS_DONE_INT_ST_V  0x1
+#define SPI_TRANS_DONE_INT_ST_S  12
+/* SPI_SLV_WR_BUF_DONE_INT_ST : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The status bit for SPI_SLV_WR_BUF_DONE_INT interrupt..*/
+#define SPI_SLV_WR_BUF_DONE_INT_ST    (BIT(11))
+#define SPI_SLV_WR_BUF_DONE_INT_ST_M  (BIT(11))
+#define SPI_SLV_WR_BUF_DONE_INT_ST_V  0x1
+#define SPI_SLV_WR_BUF_DONE_INT_ST_S  11
+/* SPI_SLV_RD_BUF_DONE_INT_ST : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The status bit for SPI_SLV_RD_BUF_DONE_INT interrupt..*/
+#define SPI_SLV_RD_BUF_DONE_INT_ST    (BIT(10))
+#define SPI_SLV_RD_BUF_DONE_INT_ST_M  (BIT(10))
+#define SPI_SLV_RD_BUF_DONE_INT_ST_V  0x1
+#define SPI_SLV_RD_BUF_DONE_INT_ST_S  10
+/* SPI_SLV_WR_DMA_DONE_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The status bit for SPI_SLV_WR_DMA_DONE_INT interrupt..*/
+#define SPI_SLV_WR_DMA_DONE_INT_ST    (BIT(9))
+#define SPI_SLV_WR_DMA_DONE_INT_ST_M  (BIT(9))
+#define SPI_SLV_WR_DMA_DONE_INT_ST_V  0x1
+#define SPI_SLV_WR_DMA_DONE_INT_ST_S  9
+/* SPI_SLV_RD_DMA_DONE_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The status bit for SPI_SLV_RD_DMA_DONE_INT interrupt..*/
+#define SPI_SLV_RD_DMA_DONE_INT_ST    (BIT(8))
+#define SPI_SLV_RD_DMA_DONE_INT_ST_M  (BIT(8))
+#define SPI_SLV_RD_DMA_DONE_INT_ST_V  0x1
+#define SPI_SLV_RD_DMA_DONE_INT_ST_S  8
+/* SPI_SLV_CMDA_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The status bit for SPI slave CMDA interrupt..*/
+#define SPI_SLV_CMDA_INT_ST    (BIT(7))
+#define SPI_SLV_CMDA_INT_ST_M  (BIT(7))
+#define SPI_SLV_CMDA_INT_ST_V  0x1
+#define SPI_SLV_CMDA_INT_ST_S  7
+/* SPI_SLV_CMD9_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The status bit for SPI slave CMD9 interrupt..*/
+#define SPI_SLV_CMD9_INT_ST    (BIT(6))
+#define SPI_SLV_CMD9_INT_ST_M  (BIT(6))
+#define SPI_SLV_CMD9_INT_ST_V  0x1
+#define SPI_SLV_CMD9_INT_ST_S  6
+/* SPI_SLV_CMD8_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The status bit for SPI slave CMD8 interrupt..*/
+#define SPI_SLV_CMD8_INT_ST    (BIT(5))
+#define SPI_SLV_CMD8_INT_ST_M  (BIT(5))
+#define SPI_SLV_CMD8_INT_ST_V  0x1
+#define SPI_SLV_CMD8_INT_ST_S  5
+/* SPI_SLV_CMD7_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The status bit for SPI slave CMD7 interrupt..*/
+#define SPI_SLV_CMD7_INT_ST    (BIT(4))
+#define SPI_SLV_CMD7_INT_ST_M  (BIT(4))
+#define SPI_SLV_CMD7_INT_ST_V  0x1
+#define SPI_SLV_CMD7_INT_ST_S  4
+/* SPI_SLV_EN_QPI_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The status bit for SPI slave En_QPI interrupt..*/
+#define SPI_SLV_EN_QPI_INT_ST    (BIT(3))
+#define SPI_SLV_EN_QPI_INT_ST_M  (BIT(3))
+#define SPI_SLV_EN_QPI_INT_ST_V  0x1
+#define SPI_SLV_EN_QPI_INT_ST_S  3
+/* SPI_SLV_EX_QPI_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The status bit for SPI slave Ex_QPI interrupt..*/
+#define SPI_SLV_EX_QPI_INT_ST    (BIT(2))
+#define SPI_SLV_EX_QPI_INT_ST_M  (BIT(2))
+#define SPI_SLV_EX_QPI_INT_ST_V  0x1
+#define SPI_SLV_EX_QPI_INT_ST_S  2
+/* SPI_DMA_OUTFIFO_EMPTY_ERR_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The status bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt..*/
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_ST    (BIT(1))
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_ST_M  (BIT(1))
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_ST_V  0x1
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_ST_S  1
+/* SPI_DMA_INFIFO_FULL_ERR_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The status bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt..*/
+#define SPI_DMA_INFIFO_FULL_ERR_INT_ST    (BIT(0))
+#define SPI_DMA_INFIFO_FULL_ERR_INT_ST_M  (BIT(0))
+#define SPI_DMA_INFIFO_FULL_ERR_INT_ST_V  0x1
+#define SPI_DMA_INFIFO_FULL_ERR_INT_ST_S  0
+
+#define SPI_DMA_INT_SET_REG(i)          (REG_SPI_BASE(i) + 0x44)
+/* SPI_APP1_INT_SET : WT ;bitpos:[20] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_APP1_INT interrupt..*/
+#define SPI_APP1_INT_SET    (BIT(20))
+#define SPI_APP1_INT_SET_M  (BIT(20))
+#define SPI_APP1_INT_SET_V  0x1
+#define SPI_APP1_INT_SET_S  20
+/* SPI_APP2_INT_SET : WT ;bitpos:[19] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_APP2_INT interrupt..*/
+#define SPI_APP2_INT_SET    (BIT(19))
+#define SPI_APP2_INT_SET_M  (BIT(19))
+#define SPI_APP2_INT_SET_V  0x1
+#define SPI_APP2_INT_SET_S  19
+/* SPI_MST_TX_AFIFO_REMPTY_ERR_INT_SET : WT ;bitpos:[18] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt..*/
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_SET    (BIT(18))
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_SET_M  (BIT(18))
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_SET_V  0x1
+#define SPI_MST_TX_AFIFO_REMPTY_ERR_INT_SET_S  18
+/* SPI_MST_RX_AFIFO_WFULL_ERR_INT_SET : WT ;bitpos:[17] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt..*/
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_SET    (BIT(17))
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_SET_M  (BIT(17))
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_SET_V  0x1
+#define SPI_MST_RX_AFIFO_WFULL_ERR_INT_SET_S  17
+/* SPI_SLV_CMD_ERR_INT_SET : WT ;bitpos:[16] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_SLV_CMD_ERR_INT interrupt..*/
+#define SPI_SLV_CMD_ERR_INT_SET    (BIT(16))
+#define SPI_SLV_CMD_ERR_INT_SET_M  (BIT(16))
+#define SPI_SLV_CMD_ERR_INT_SET_V  0x1
+#define SPI_SLV_CMD_ERR_INT_SET_S  16
+/* SPI_SLV_BUF_ADDR_ERR_INT_SET : WT ;bitpos:[15] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt..*/
+#define SPI_SLV_BUF_ADDR_ERR_INT_SET    (BIT(15))
+#define SPI_SLV_BUF_ADDR_ERR_INT_SET_M  (BIT(15))
+#define SPI_SLV_BUF_ADDR_ERR_INT_SET_V  0x1
+#define SPI_SLV_BUF_ADDR_ERR_INT_SET_S  15
+/* SPI_SEG_MAGIC_ERR_INT_SET : WT ;bitpos:[14] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_SEG_MAGIC_ERR_INT interrupt..*/
+#define SPI_SEG_MAGIC_ERR_INT_SET    (BIT(14))
+#define SPI_SEG_MAGIC_ERR_INT_SET_M  (BIT(14))
+#define SPI_SEG_MAGIC_ERR_INT_SET_V  0x1
+#define SPI_SEG_MAGIC_ERR_INT_SET_S  14
+/* SPI_DMA_SEG_TRANS_DONE_INT_SET : WT ;bitpos:[13] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt..*/
+#define SPI_DMA_SEG_TRANS_DONE_INT_SET    (BIT(13))
+#define SPI_DMA_SEG_TRANS_DONE_INT_SET_M  (BIT(13))
+#define SPI_DMA_SEG_TRANS_DONE_INT_SET_V  0x1
+#define SPI_DMA_SEG_TRANS_DONE_INT_SET_S  13
+/* SPI_TRANS_DONE_INT_SET : WT ;bitpos:[12] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_TRANS_DONE_INT interrupt..*/
+#define SPI_TRANS_DONE_INT_SET    (BIT(12))
+#define SPI_TRANS_DONE_INT_SET_M  (BIT(12))
+#define SPI_TRANS_DONE_INT_SET_V  0x1
+#define SPI_TRANS_DONE_INT_SET_S  12
+/* SPI_SLV_WR_BUF_DONE_INT_SET : WT ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_SLV_WR_BUF_DONE_INT interrupt..*/
+#define SPI_SLV_WR_BUF_DONE_INT_SET    (BIT(11))
+#define SPI_SLV_WR_BUF_DONE_INT_SET_M  (BIT(11))
+#define SPI_SLV_WR_BUF_DONE_INT_SET_V  0x1
+#define SPI_SLV_WR_BUF_DONE_INT_SET_S  11
+/* SPI_SLV_RD_BUF_DONE_INT_SET : WT ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_SLV_RD_BUF_DONE_INT interrupt..*/
+#define SPI_SLV_RD_BUF_DONE_INT_SET    (BIT(10))
+#define SPI_SLV_RD_BUF_DONE_INT_SET_M  (BIT(10))
+#define SPI_SLV_RD_BUF_DONE_INT_SET_V  0x1
+#define SPI_SLV_RD_BUF_DONE_INT_SET_S  10
+/* SPI_SLV_WR_DMA_DONE_INT_SET : WT ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_SLV_WR_DMA_DONE_INT interrupt..*/
+#define SPI_SLV_WR_DMA_DONE_INT_SET    (BIT(9))
+#define SPI_SLV_WR_DMA_DONE_INT_SET_M  (BIT(9))
+#define SPI_SLV_WR_DMA_DONE_INT_SET_V  0x1
+#define SPI_SLV_WR_DMA_DONE_INT_SET_S  9
+/* SPI_SLV_RD_DMA_DONE_INT_SET : WT ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_SLV_RD_DMA_DONE_INT interrupt..*/
+#define SPI_SLV_RD_DMA_DONE_INT_SET    (BIT(8))
+#define SPI_SLV_RD_DMA_DONE_INT_SET_M  (BIT(8))
+#define SPI_SLV_RD_DMA_DONE_INT_SET_V  0x1
+#define SPI_SLV_RD_DMA_DONE_INT_SET_S  8
+/* SPI_SLV_CMDA_INT_SET : WT ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The software set bit for SPI slave CMDA interrupt..*/
+#define SPI_SLV_CMDA_INT_SET    (BIT(7))
+#define SPI_SLV_CMDA_INT_SET_M  (BIT(7))
+#define SPI_SLV_CMDA_INT_SET_V  0x1
+#define SPI_SLV_CMDA_INT_SET_S  7
+/* SPI_SLV_CMD9_INT_SET : WT ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The software set bit for SPI slave CMD9 interrupt..*/
+#define SPI_SLV_CMD9_INT_SET    (BIT(6))
+#define SPI_SLV_CMD9_INT_SET_M  (BIT(6))
+#define SPI_SLV_CMD9_INT_SET_V  0x1
+#define SPI_SLV_CMD9_INT_SET_S  6
+/* SPI_SLV_CMD8_INT_SET : WT ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The software set bit for SPI slave CMD8 interrupt..*/
+#define SPI_SLV_CMD8_INT_SET    (BIT(5))
+#define SPI_SLV_CMD8_INT_SET_M  (BIT(5))
+#define SPI_SLV_CMD8_INT_SET_V  0x1
+#define SPI_SLV_CMD8_INT_SET_S  5
+/* SPI_SLV_CMD7_INT_SET : WT ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The software set bit for SPI slave CMD7 interrupt..*/
+#define SPI_SLV_CMD7_INT_SET    (BIT(4))
+#define SPI_SLV_CMD7_INT_SET_M  (BIT(4))
+#define SPI_SLV_CMD7_INT_SET_V  0x1
+#define SPI_SLV_CMD7_INT_SET_S  4
+/* SPI_SLV_EN_QPI_INT_SET : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The software set bit for SPI slave En_QPI interrupt..*/
+#define SPI_SLV_EN_QPI_INT_SET    (BIT(3))
+#define SPI_SLV_EN_QPI_INT_SET_M  (BIT(3))
+#define SPI_SLV_EN_QPI_INT_SET_V  0x1
+#define SPI_SLV_EN_QPI_INT_SET_S  3
+/* SPI_SLV_EX_QPI_INT_SET : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The software set bit for SPI slave Ex_QPI interrupt..*/
+#define SPI_SLV_EX_QPI_INT_SET    (BIT(2))
+#define SPI_SLV_EX_QPI_INT_SET_M  (BIT(2))
+#define SPI_SLV_EX_QPI_INT_SET_V  0x1
+#define SPI_SLV_EX_QPI_INT_SET_S  2
+/* SPI_DMA_OUTFIFO_EMPTY_ERR_INT_SET : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt..*/
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_SET    (BIT(1))
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_SET_M  (BIT(1))
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_SET_V  0x1
+#define SPI_DMA_OUTFIFO_EMPTY_ERR_INT_SET_S  1
+/* SPI_DMA_INFIFO_FULL_ERR_INT_SET : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The software set bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt..*/
+#define SPI_DMA_INFIFO_FULL_ERR_INT_SET    (BIT(0))
+#define SPI_DMA_INFIFO_FULL_ERR_INT_SET_M  (BIT(0))
+#define SPI_DMA_INFIFO_FULL_ERR_INT_SET_V  0x1
+#define SPI_DMA_INFIFO_FULL_ERR_INT_SET_S  0
+
+#define SPI_W0_REG(i)          (REG_SPI_BASE(i) + 0x98)
+/* SPI_BUF0 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF0    0xFFFFFFFF
+#define SPI_BUF0_M  ((SPI_BUF0_V)<<(SPI_BUF0_S))
+#define SPI_BUF0_V  0xFFFFFFFF
+#define SPI_BUF0_S  0
+
+#define SPI_W1_REG(i)          (REG_SPI_BASE(i) + 0x9C)
+/* SPI_BUF1 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF1    0xFFFFFFFF
+#define SPI_BUF1_M  ((SPI_BUF1_V)<<(SPI_BUF1_S))
+#define SPI_BUF1_V  0xFFFFFFFF
+#define SPI_BUF1_S  0
+
+#define SPI_W2_REG(i)          (REG_SPI_BASE(i) + 0xA0)
+/* SPI_BUF2 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF2    0xFFFFFFFF
+#define SPI_BUF2_M  ((SPI_BUF2_V)<<(SPI_BUF2_S))
+#define SPI_BUF2_V  0xFFFFFFFF
+#define SPI_BUF2_S  0
+
+#define SPI_W3_REG(i)          (REG_SPI_BASE(i) + 0xA4)
+/* SPI_BUF3 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF3    0xFFFFFFFF
+#define SPI_BUF3_M  ((SPI_BUF3_V)<<(SPI_BUF3_S))
+#define SPI_BUF3_V  0xFFFFFFFF
+#define SPI_BUF3_S  0
+
+#define SPI_W4_REG(i)          (REG_SPI_BASE(i) + 0xA8)
+/* SPI_BUF4 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF4    0xFFFFFFFF
+#define SPI_BUF4_M  ((SPI_BUF4_V)<<(SPI_BUF4_S))
+#define SPI_BUF4_V  0xFFFFFFFF
+#define SPI_BUF4_S  0
+
+#define SPI_W5_REG(i)          (REG_SPI_BASE(i) + 0xAC)
+/* SPI_BUF5 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF5    0xFFFFFFFF
+#define SPI_BUF5_M  ((SPI_BUF5_V)<<(SPI_BUF5_S))
+#define SPI_BUF5_V  0xFFFFFFFF
+#define SPI_BUF5_S  0
+
+#define SPI_W6_REG(i)          (REG_SPI_BASE(i) + 0xB0)
+/* SPI_BUF6 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF6    0xFFFFFFFF
+#define SPI_BUF6_M  ((SPI_BUF6_V)<<(SPI_BUF6_S))
+#define SPI_BUF6_V  0xFFFFFFFF
+#define SPI_BUF6_S  0
+
+#define SPI_W7_REG(i)          (REG_SPI_BASE(i) + 0xB4)
+/* SPI_BUF7 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF7    0xFFFFFFFF
+#define SPI_BUF7_M  ((SPI_BUF7_V)<<(SPI_BUF7_S))
+#define SPI_BUF7_V  0xFFFFFFFF
+#define SPI_BUF7_S  0
+
+#define SPI_W8_REG(i)          (REG_SPI_BASE(i) + 0xB8)
+/* SPI_BUF8 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF8    0xFFFFFFFF
+#define SPI_BUF8_M  ((SPI_BUF8_V)<<(SPI_BUF8_S))
+#define SPI_BUF8_V  0xFFFFFFFF
+#define SPI_BUF8_S  0
+
+#define SPI_W9_REG(i)          (REG_SPI_BASE(i) + 0xBC)
+/* SPI_BUF9 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF9    0xFFFFFFFF
+#define SPI_BUF9_M  ((SPI_BUF9_V)<<(SPI_BUF9_S))
+#define SPI_BUF9_V  0xFFFFFFFF
+#define SPI_BUF9_S  0
+
+#define SPI_W10_REG(i)          (REG_SPI_BASE(i) + 0xC0)
+/* SPI_BUF10 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF10    0xFFFFFFFF
+#define SPI_BUF10_M  ((SPI_BUF10_V)<<(SPI_BUF10_S))
+#define SPI_BUF10_V  0xFFFFFFFF
+#define SPI_BUF10_S  0
+
+#define SPI_W11_REG(i)          (REG_SPI_BASE(i) + 0xC4)
+/* SPI_BUF11 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF11    0xFFFFFFFF
+#define SPI_BUF11_M  ((SPI_BUF11_V)<<(SPI_BUF11_S))
+#define SPI_BUF11_V  0xFFFFFFFF
+#define SPI_BUF11_S  0
+
+#define SPI_W12_REG(i)          (REG_SPI_BASE(i) + 0xC8)
+/* SPI_BUF12 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF12    0xFFFFFFFF
+#define SPI_BUF12_M  ((SPI_BUF12_V)<<(SPI_BUF12_S))
+#define SPI_BUF12_V  0xFFFFFFFF
+#define SPI_BUF12_S  0
+
+#define SPI_W13_REG(i)          (REG_SPI_BASE(i) + 0xCC)
+/* SPI_BUF13 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF13    0xFFFFFFFF
+#define SPI_BUF13_M  ((SPI_BUF13_V)<<(SPI_BUF13_S))
+#define SPI_BUF13_V  0xFFFFFFFF
+#define SPI_BUF13_S  0
+
+#define SPI_W14_REG(i)          (REG_SPI_BASE(i) + 0xD0)
+/* SPI_BUF14 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF14    0xFFFFFFFF
+#define SPI_BUF14_M  ((SPI_BUF14_V)<<(SPI_BUF14_S))
+#define SPI_BUF14_V  0xFFFFFFFF
+#define SPI_BUF14_S  0
+
+#define SPI_W15_REG(i)          (REG_SPI_BASE(i) + 0xD4)
+/* SPI_BUF15 : R/W/SS ;bitpos:[31:0] ;default: 32'd0 ; */
+/*description: data buffer.*/
+#define SPI_BUF15    0xFFFFFFFF
+#define SPI_BUF15_M  ((SPI_BUF15_V)<<(SPI_BUF15_S))
+#define SPI_BUF15_V  0xFFFFFFFF
+#define SPI_BUF15_S  0
+
+#define SPI_SLAVE_REG(i)          (REG_SPI_BASE(i) + 0xE0)
+/* SPI_USR_CONF : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: 1: Enable the DMA CONF phase of current seg-trans operation, which means seg-tra
+ns will start. 0: This is not seg-trans mode..*/
+#define SPI_USR_CONF    (BIT(28))
+#define SPI_USR_CONF_M  (BIT(28))
+#define SPI_USR_CONF_V  0x1
+#define SPI_USR_CONF_S  28
+/* SPI_SOFT_RESET : WT ;bitpos:[27] ;default: 1'b0 ; */
+/*description: Software reset enable, reset the spi clock line cs line and data lines. Can be c
+onfigured in CONF state..*/
+#define SPI_SOFT_RESET    (BIT(27))
+#define SPI_SOFT_RESET_M  (BIT(27))
+#define SPI_SOFT_RESET_V  0x1
+#define SPI_SOFT_RESET_S  27
+/* SPI_SLAVE_MODE : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: Set SPI work mode. 1: slave mode 0: master mode..*/
+#define SPI_SLAVE_MODE    (BIT(26))
+#define SPI_SLAVE_MODE_M  (BIT(26))
+#define SPI_SLAVE_MODE_V  0x1
+#define SPI_SLAVE_MODE_S  26
+/* SPI_DMA_SEG_MAGIC_VALUE : R/W ;bitpos:[25:22] ;default: 4'd10 ; */
+/*description: The magic value of BM table in master DMA seg-trans..*/
+#define SPI_DMA_SEG_MAGIC_VALUE    0x0000000F
+#define SPI_DMA_SEG_MAGIC_VALUE_M  ((SPI_DMA_SEG_MAGIC_VALUE_V)<<(SPI_DMA_SEG_MAGIC_VALUE_S))
+#define SPI_DMA_SEG_MAGIC_VALUE_V  0xF
+#define SPI_DMA_SEG_MAGIC_VALUE_S  22
+/* SPI_SLV_WRBUF_BITLEN_EN : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: 1: SPI_SLV_DATA_BITLEN stores data bit length of master-write-to-slave data leng
+th in CPU controlled mode(Wr_BUF). 0: others.*/
+#define SPI_SLV_WRBUF_BITLEN_EN    (BIT(11))
+#define SPI_SLV_WRBUF_BITLEN_EN_M  (BIT(11))
+#define SPI_SLV_WRBUF_BITLEN_EN_V  0x1
+#define SPI_SLV_WRBUF_BITLEN_EN_S  11
+/* SPI_SLV_RDBUF_BITLEN_EN : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: 1: SPI_SLV_DATA_BITLEN stores data bit length of master-read-slave data length i
+n CPU controlled mode(Rd_BUF). 0: others.*/
+#define SPI_SLV_RDBUF_BITLEN_EN    (BIT(10))
+#define SPI_SLV_RDBUF_BITLEN_EN_M  (BIT(10))
+#define SPI_SLV_RDBUF_BITLEN_EN_V  0x1
+#define SPI_SLV_RDBUF_BITLEN_EN_S  10
+/* SPI_SLV_WRDMA_BITLEN_EN : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: 1: SPI_SLV_DATA_BITLEN stores data bit length of master-write-to-slave data leng
+th in DMA controlled mode(Wr_DMA). 0: others.*/
+#define SPI_SLV_WRDMA_BITLEN_EN    (BIT(9))
+#define SPI_SLV_WRDMA_BITLEN_EN_M  (BIT(9))
+#define SPI_SLV_WRDMA_BITLEN_EN_V  0x1
+#define SPI_SLV_WRDMA_BITLEN_EN_S  9
+/* SPI_SLV_RDDMA_BITLEN_EN : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: 1: SPI_SLV_DATA_BITLEN stores data bit length of master-read-slave data length i
+n DMA controlled mode(Rd_DMA). 0: others.*/
+#define SPI_SLV_RDDMA_BITLEN_EN    (BIT(8))
+#define SPI_SLV_RDDMA_BITLEN_EN_M  (BIT(8))
+#define SPI_SLV_RDDMA_BITLEN_EN_V  0x1
+#define SPI_SLV_RDDMA_BITLEN_EN_S  8
+/* SPI_RSCK_DATA_OUT : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: It saves half a cycle when tsck is the same as rsck. 1: output data at rsck pose
+dge   0: output data at tsck posedge .*/
+#define SPI_RSCK_DATA_OUT    (BIT(3))
+#define SPI_RSCK_DATA_OUT_M  (BIT(3))
+#define SPI_RSCK_DATA_OUT_V  0x1
+#define SPI_RSCK_DATA_OUT_S  3
+/* SPI_CLK_MODE_13 : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: {CPOL, CPHA},1: support spi clk mode 1 and 3, first edge output data B[0]/B[7].
+ 0: support spi clk mode 0 and 2, first edge output data B[1]/B[6]..*/
+#define SPI_CLK_MODE_13    (BIT(2))
+#define SPI_CLK_MODE_13_M  (BIT(2))
+#define SPI_CLK_MODE_13_V  0x1
+#define SPI_CLK_MODE_13_S  2
+/* SPI_CLK_MODE : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delaye
+d one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inacti
+ve 3: SPI clock is alwasy on. Can be configured in CONF state..*/
+#define SPI_CLK_MODE    0x00000003
+#define SPI_CLK_MODE_M  ((SPI_CLK_MODE_V)<<(SPI_CLK_MODE_S))
+#define SPI_CLK_MODE_V  0x3
+#define SPI_CLK_MODE_S  0
+
+#define SPI_SLAVE1_REG(i)          (REG_SPI_BASE(i) + 0xE4)
+/* SPI_SLV_LAST_ADDR : R/W/SS ;bitpos:[31:26] ;default: 6'd0 ; */
+/*description: In the slave mode it is the value of address..*/
+#define SPI_SLV_LAST_ADDR    0x0000003F
+#define SPI_SLV_LAST_ADDR_M  ((SPI_SLV_LAST_ADDR_V)<<(SPI_SLV_LAST_ADDR_S))
+#define SPI_SLV_LAST_ADDR_V  0x3F
+#define SPI_SLV_LAST_ADDR_S  26
+/* SPI_SLV_LAST_COMMAND : R/W/SS ;bitpos:[25:18] ;default: 8'b0 ; */
+/*description: In the slave mode it is the value of command..*/
+#define SPI_SLV_LAST_COMMAND    0x000000FF
+#define SPI_SLV_LAST_COMMAND_M  ((SPI_SLV_LAST_COMMAND_V)<<(SPI_SLV_LAST_COMMAND_S))
+#define SPI_SLV_LAST_COMMAND_V  0xFF
+#define SPI_SLV_LAST_COMMAND_S  18
+/* SPI_SLV_DATA_BITLEN : R/W/SS ;bitpos:[17:0] ;default: 18'd0 ; */
+/*description: The transferred data bit length in SPI slave FD and HD mode. .*/
+#define SPI_SLV_DATA_BITLEN    0x0003FFFF
+#define SPI_SLV_DATA_BITLEN_M  ((SPI_SLV_DATA_BITLEN_V)<<(SPI_SLV_DATA_BITLEN_S))
+#define SPI_SLV_DATA_BITLEN_V  0x3FFFF
+#define SPI_SLV_DATA_BITLEN_S  0
+
+#define SPI_CLK_GATE_REG(i)          (REG_SPI_BASE(i) + 0xE8)
+/* SPI_MST_CLK_SEL : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: This bit is used to select SPI module clock source in master mode. 1: PLL_CLK_80
+M. 0: XTAL CLK..*/
+#define SPI_MST_CLK_SEL    (BIT(2))
+#define SPI_MST_CLK_SEL_M  (BIT(2))
+#define SPI_MST_CLK_SEL_V  0x1
+#define SPI_MST_CLK_SEL_S  2
+/* SPI_MST_CLK_ACTIVE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to power on the SPI module clock..*/
+#define SPI_MST_CLK_ACTIVE    (BIT(1))
+#define SPI_MST_CLK_ACTIVE_M  (BIT(1))
+#define SPI_MST_CLK_ACTIVE_V  0x1
+#define SPI_MST_CLK_ACTIVE_S  1
+/* SPI_CLK_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to enable clk gate.*/
+#define SPI_CLK_EN    (BIT(0))
+#define SPI_CLK_EN_M  (BIT(0))
+#define SPI_CLK_EN_V  0x1
+#define SPI_CLK_EN_S  0
+
+#define SPI_DATE_REG(i)          (REG_SPI_BASE(i) + 0xF0)
+/* SPI_DATE : R/W ;bitpos:[27:0] ;default: 28'h2101190 ; */
+/*description: SPI register version..*/
+#define SPI_DATE    0x0FFFFFFF
+#define SPI_DATE_M  ((SPI_DATE_V)<<(SPI_DATE_S))
+#define SPI_DATE_V  0xFFFFFFF
+#define SPI_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SPI_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_struct.h
new file mode 100644
index 00000000000..2a3abd257c1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/spi_struct.h
@@ -0,0 +1,428 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_SPI_STRUCT_H_
+#define _SOC_SPI_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct spi_dev_s {
+    union {
+        struct {
+            uint32_t conf_bitlen                   :    18;  /*Define the APB cycles of  SPI_CONF state. Can be configured in CONF state.*/
+            uint32_t reserved18                    :    5;  /*reserved*/
+            uint32_t update                        :    1;  /*Set this bit to synchronize SPI registers from APB clock domain into SPI module clock domain, which is only used in SPI master mode.*/
+            uint32_t usr                           :    1;  /*User define command enable.  An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable. Can not be changed by CONF_buf.*/
+            uint32_t reserved25                    :    7;  /*reserved*/
+        };
+        uint32_t val;
+    } cmd;
+    uint32_t addr;
+    union {
+        struct {
+            uint32_t reserved0                     :    3;  /*reserved*/
+            uint32_t dummy_out                     :    1;  /*0: In the dummy phase, the FSPI bus signals are not output. 1: In the dummy phase, the FSPI bus signals are output. Can be configured in CONF state.*/
+            uint32_t reserved4                     :    1;  /*reserved*/
+            uint32_t faddr_dual                    :    1;  /*Apply 2 signals during addr phase 1:enable 0: disable. Can be configured in CONF state.*/
+            uint32_t faddr_quad                    :    1;  /*Apply 4 signals during addr phase 1:enable 0: disable. Can be configured in CONF state.*/
+            uint32_t faddr_oct                     :    1;  /*Apply 8 signals during addr phase 1:enable 0: disable. Can be configured in CONF state.*/
+            uint32_t fcmd_dual                     :    1;  /*Apply 2 signals during command phase 1:enable 0: disable. Can be configured in CONF state.*/
+            uint32_t fcmd_quad                     :    1;  /*Apply 4 signals during command phase 1:enable 0: disable. Can be configured in CONF state.*/
+            uint32_t fcmd_oct                      :    1;  /*Apply 8 signals during command phase 1:enable 0: disable. Can be configured in CONF state.*/
+            uint32_t reserved11                    :    3;  /*reserved*/
+            uint32_t fread_dual                    :    1;  /*In the read operations, read-data phase apply 2 signals. 1: enable 0: disable. Can be configured in CONF state.*/
+            uint32_t fread_quad                    :    1;  /*In the read operations read-data phase apply 4 signals. 1: enable 0: disable.  Can be configured in CONF state.*/
+            uint32_t fread_oct                     :    1;  /*In the read operations read-data phase apply 8 signals. 1: enable 0: disable.  Can be configured in CONF state.*/
+            uint32_t reserved17                    :    1;  /*reserved*/
+            uint32_t q_pol                         :    1;  /*The bit is used to set MISO line polarity, 1: high 0, low. Can be configured in CONF state.*/
+            uint32_t d_pol                         :    1;  /*The bit is used to set MOSI line polarity, 1: high 0, low. Can be configured in CONF state.*/
+            uint32_t hold_pol                      :    1;  /*SPI_HOLD output value when SPI is idle. 1: output high, 0: output low. Can be configured in CONF state.*/
+            uint32_t wp_pol                        :    1;  /*Write protect signal output when SPI is idle.  1: output high, 0: output low.  Can be configured in CONF state.*/
+            uint32_t reserved22                    :    1;  /*reserved*/
+            uint32_t rd_bit_order                  :    2;  /*In read-data (MISO) phase 1: LSB first 0: MSB first. Can be configured in CONF state.*/
+            uint32_t wr_bit_order                  :    2;  /*In command address write-data (MOSI) phases 1: LSB firs 0: MSB first. Can be configured in CONF state.*/
+            uint32_t reserved27                    :    5;  /*reserved*/
+        };
+        uint32_t val;
+    } ctrl;
+    union {
+        struct {
+            uint32_t clkcnt_l                      :    6;  /*In the master mode it must be equal to spi_clkcnt_N. In the slave mode it must be 0. Can be configured in CONF state.*/
+            uint32_t clkcnt_h                      :    6;  /*In the master mode it must be floor((spi_clkcnt_N+1)/2-1). In the slave mode it must be 0. Can be configured in CONF state.*/
+            uint32_t clkcnt_n                      :    6;  /*In the master mode it is the divider of spi_clk. So spi_clk frequency is system/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1). Can be configured in CONF state.*/
+            uint32_t clkdiv_pre                    :    4;  /*In the master mode it is pre-divider of spi_clk.  Can be configured in CONF state.*/
+            uint32_t reserved22                    :    9;  /*reserved*/
+            uint32_t clk_equ_sysclk                :    1;  /*In the master mode 1: spi_clk is eqaul to system 0: spi_clk is divided from system clock. Can be configured in CONF state.*/
+        };
+        uint32_t val;
+    } clock;
+    union {
+        struct {
+            uint32_t doutdin                       :    1;  /*Set the bit to enable full duplex communication. 1: enable 0: disable. Can be configured in CONF state.*/
+            uint32_t reserved1                     :    2;  /*reserved*/
+            uint32_t qpi_mode                      :    1;  /*Both for master mode and slave mode. 1: spi controller is in QPI mode. 0: others. Can be configured in CONF state.*/
+            uint32_t opi_mode                      :    1;  /*Just for master mode. 1: spi controller is in OPI mode (all in 8-b-m). 0: others. Can be configured in CONF state.*/
+            uint32_t tsck_i_edge                   :    1;  /*In the slave mode, this bit can be used to change the polarity of tsck. 0: tsck = spi_ck_i. 1:tsck = !spi_ck_i.*/
+            uint32_t cs_hold                       :    1;  /*spi cs keep low when spi is in  done  phase. 1: enable 0: disable. Can be configured in CONF state.*/
+            uint32_t cs_setup                      :    1;  /*spi cs is enable when spi is in  prepare  phase. 1: enable 0: disable. Can be configured in CONF state.*/
+            uint32_t rsck_i_edge                   :    1;  /*In the slave mode, this bit can be used to change the polarity of rsck. 0: rsck = !spi_ck_i. 1:rsck = spi_ck_i.*/
+            uint32_t ck_out_edge                   :    1;  /*the bit combined with spi_mosi_delay_mode bits to set mosi signal delay mode. Can be configured in CONF state.*/
+            uint32_t reserved10                    :    2;  /*reserved*/
+            uint32_t fwrite_dual                   :    1;  /*In the write operations read-data phase apply 2 signals. Can be configured in CONF state.*/
+            uint32_t fwrite_quad                   :    1;  /*In the write operations read-data phase apply 4 signals. Can be configured in CONF state.*/
+            uint32_t fwrite_oct                    :    1;  /*In the write operations read-data phase apply 8 signals. Can be configured in CONF state.*/
+            uint32_t usr_conf_nxt                  :    1;  /*1: Enable the DMA CONF phase of next seg-trans operation, which means seg-trans will continue. 0: The seg-trans will end after the current SPI seg-trans or this is not seg-trans mode. Can be configured in CONF state.*/
+            uint32_t reserved16                    :    1;  /*reserved*/
+            uint32_t sio                           :    1;  /*Set the bit to enable 3-line half duplex communication mosi and miso signals share the same pin. 1: enable 0: disable. Can be configured in CONF state.*/
+            uint32_t reserved18                    :    6;  /*reserved*/
+            uint32_t usr_miso_highpart             :    1;  /*read-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable. Can be configured in CONF state.*/
+            uint32_t usr_mosi_highpart             :    1;  /*write-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable.  Can be configured in CONF state.*/
+            uint32_t usr_dummy_idle                :    1;  /*spi clock is disable in dummy phase when the bit is enable. Can be configured in CONF state.*/
+            uint32_t usr_mosi                      :    1;  /*This bit enable the write-data phase of an operation. Can be configured in CONF state.*/
+            uint32_t usr_miso                      :    1;  /*This bit enable the read-data phase of an operation. Can be configured in CONF state.*/
+            uint32_t usr_dummy                     :    1;  /*This bit enable the dummy phase of an operation. Can be configured in CONF state.*/
+            uint32_t usr_addr                      :    1;  /*This bit enable the address phase of an operation. Can be configured in CONF state.*/
+            uint32_t usr_command                   :    1;  /*This bit enable the command phase of an operation. Can be configured in CONF state.*/
+        };
+        uint32_t val;
+    } user;
+    union {
+        struct {
+            uint32_t usr_dummy_cyclelen            :    8;  /*The length in spi_clk cycles of dummy phase. The register value shall be (cycle_num-1). Can be configured in CONF state.*/
+            uint32_t reserved8                     :    8;  /*reserved*/
+            uint32_t mst_wfull_err_end_en          :    1;  /*1: SPI transfer is ended when SPI RX AFIFO wfull error is valid in GP-SPI master FD/HD-mode. 0: SPI transfer is not ended when SPI RX AFIFO wfull error is valid in GP-SPI master FD/HD-mode.*/
+            uint32_t cs_setup_time                 :    5;  /*(cycles+1) of prepare phase by spi clock this bits are combined with spi_cs_setup bit. Can be configured in CONF state.*/
+            uint32_t cs_hold_time                  :    5;  /*delay cycles of cs pin by spi clock this bits are combined with spi_cs_hold bit. Can be configured in CONF state.*/
+            uint32_t usr_addr_bitlen               :    5;  /*The length in bits of address phase. The register value shall be (bit_num-1). Can be configured in CONF state.*/
+        };
+        uint32_t val;
+    } user1;
+    union {
+        struct {
+            uint32_t usr_command_value             :    16;  /*The value of  command. Can be configured in CONF state.*/
+            uint32_t reserved16                    :    11;  /*reserved*/
+            uint32_t mst_rempty_err_end_en         :    1;  /*1: SPI transfer is ended when SPI TX AFIFO read empty error is valid in GP-SPI master FD/HD-mode. 0: SPI transfer is not ended when SPI TX AFIFO read empty error is valid in GP-SPI master FD/HD-mode.*/
+            uint32_t usr_command_bitlen            :    4;  /*The length in bits of command phase. The register value shall be (bit_num-1). Can be configured in CONF state.*/
+        };
+        uint32_t val;
+    } user2;
+    union {
+        struct {
+            uint32_t ms_data_bitlen                :    18;  /*The value of these bits is the configured SPI transmission data bit length in master mode DMA controlled transfer or CPU controlled transfer. The value is also the configured bit length in slave mode DMA RX controlled transfer. The register value shall be (bit_num-1). Can be configured in CONF state.*/
+            uint32_t reserved18                    :    14;  /*reserved*/
+        };
+        uint32_t val;
+    } ms_dlen;
+    union {
+        struct {
+            uint32_t cs0_dis                       :    1;  /*SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Can be configured in CONF state.*/
+            uint32_t cs1_dis                       :    1;  /*SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Can be configured in CONF state.*/
+            uint32_t cs2_dis                       :    1;  /*SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Can be configured in CONF state.*/
+            uint32_t cs3_dis                       :    1;  /*SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Can be configured in CONF state.*/
+            uint32_t cs4_dis                       :    1;  /*SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Can be configured in CONF state.*/
+            uint32_t cs5_dis                       :    1;  /*SPI CS$n pin enable, 1: disable CS$n, 0: spi_cs$n signal is from/to CS$n pin. Can be configured in CONF state.*/
+            uint32_t ck_dis                        :    1;  /*1: spi clk out disable,  0: spi clk out enable. Can be configured in CONF state.*/
+            uint32_t master_cs_pol                 :    6;  /*In the master mode the bits are the polarity of spi cs line, the value is equivalent to spi_cs ^ spi_master_cs_pol. Can be configured in CONF state.*/
+            uint32_t reserved13                    :    3;  /*reserved*/
+            uint32_t clk_data_dtr_en               :    1;  /*1: SPI master DTR mode is applied to SPI clk, data and spi_dqs.  0: SPI master DTR mode is  only applied to spi_dqs. This bit should be used with bit 17/18/19. */
+            uint32_t data_dtr_en                   :    1;  /*1: SPI clk and data of SPI_DOUT and SPI_DIN state are in DTR mode, including master 1/2/4/8-bm.  0:  SPI clk and data of SPI_DOUT and SPI_DIN state are in STR mode. Can be configured in CONF state.*/
+            uint32_t addr_dtr_en                   :    1;  /*1: SPI clk and data of SPI_SEND_ADDR state are in DTR mode, including master 1/2/4/8-bm.  0:  SPI clk and data of SPI_SEND_ADDR state are in STR mode. Can be configured in CONF state.*/
+            uint32_t cmd_dtr_en                    :    1;  /*1: SPI clk and data of SPI_SEND_CMD state are in DTR mode, including master 1/2/4/8-bm. 0:  SPI clk and data of SPI_SEND_CMD state are in STR mode. Can be configured in CONF state.*/
+            uint32_t reserved20                    :    3;  /*reserved*/
+            uint32_t slave_cs_pol                  :    1;  /*spi slave input cs polarity select. 1: inv  0: not change. Can be configured in CONF state.*/
+            uint32_t dqs_idle_edge                 :    1;  /*The default value of spi_dqs. Can be configured in CONF state.*/
+            uint32_t reserved25                    :    4;  /*reserved*/
+            uint32_t ck_idle_edge                  :    1;  /*1: spi clk line is high when idle     0: spi clk line is low when idle. Can be configured in CONF state.*/
+            uint32_t cs_keep_active                :    1;  /*spi cs line keep low when the bit is set. Can be configured in CONF state.*/
+            uint32_t quad_din_pin_swap             :    1;  /*1: SPI quad input swap enable, swap FSPID with FSPIQ, swap FSPIWP with FSPIHD. 0:  spi quad input swap disable. Can be configured in CONF state.*/
+        };
+        uint32_t val;
+    } misc;
+    union {
+        struct {
+            uint32_t din0_mode                     :    2;  /*the input signals are delayed by SPI module clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the spi_clk. Can be configured in CONF state.*/
+            uint32_t din1_mode                     :    2;  /*the input signals are delayed by SPI module clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the spi_clk. Can be configured in CONF state.*/
+            uint32_t din2_mode                     :    2;  /*the input signals are delayed by SPI module clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the spi_clk. Can be configured in CONF state.*/
+            uint32_t din3_mode                     :    2;  /*the input signals are delayed by SPI module clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the spi_clk. Can be configured in CONF state.*/
+            uint32_t din4_mode                     :    2;  /*the input signals are delayed by SPI module clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the spi_clk. Can be configured in CONF state.*/
+            uint32_t din5_mode                     :    2;  /*the input signals are delayed by SPI module clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the spi_clk. Can be configured in CONF state.*/
+            uint32_t din6_mode                     :    2;  /*the input signals are delayed by SPI module clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the spi_clk. Can be configured in CONF state.*/
+            uint32_t din7_mode                     :    2;  /*the input signals are delayed by SPI module clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the spi_clk. Can be configured in CONF state.*/
+            uint32_t timing_hclk_active            :    1;  /*1:enable hclk in SPI input timing module.  0: disable it. Can be configured in CONF state.*/
+            uint32_t reserved17                    :    15;  /*reserved*/
+        };
+        uint32_t val;
+    } din_mode;
+    union {
+        struct {
+            uint32_t din0_num                      :    2;  /*the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,...  Can be configured in CONF state.*/
+            uint32_t din1_num                      :    2;  /*the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,...  Can be configured in CONF state.*/
+            uint32_t din2_num                      :    2;  /*the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,...  Can be configured in CONF state.*/
+            uint32_t din3_num                      :    2;  /*the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,...  Can be configured in CONF state.*/
+            uint32_t din4_num                      :    2;  /*the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,...  Can be configured in CONF state.*/
+            uint32_t din5_num                      :    2;  /*the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,...  Can be configured in CONF state.*/
+            uint32_t din6_num                      :    2;  /*the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,...  Can be configured in CONF state.*/
+            uint32_t din7_num                      :    2;  /*the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,...  Can be configured in CONF state.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } din_num;
+    union {
+        struct {
+            uint32_t dout0_mode                    :    1;  /*The output signal $n is delayed by the SPI module clock, 0: output without delayed, 1: output delay for a SPI module clock cycle at its negative edge. Can be configured in CONF state.*/
+            uint32_t dout1_mode                    :    1;  /*The output signal $n is delayed by the SPI module clock, 0: output without delayed, 1: output delay for a SPI module clock cycle at its negative edge. Can be configured in CONF state.*/
+            uint32_t dout2_mode                    :    1;  /*The output signal $n is delayed by the SPI module clock, 0: output without delayed, 1: output delay for a SPI module clock cycle at its negative edge. Can be configured in CONF state.*/
+            uint32_t dout3_mode                    :    1;  /*The output signal $n is delayed by the SPI module clock, 0: output without delayed, 1: output delay for a SPI module clock cycle at its negative edge. Can be configured in CONF state.*/
+            uint32_t dout4_mode                    :    1;  /*The output signal $n is delayed by the SPI module clock, 0: output without delayed, 1: output delay for a SPI module clock cycle at its negative edge. Can be configured in CONF state.*/
+            uint32_t dout5_mode                    :    1;  /*The output signal $n is delayed by the SPI module clock, 0: output without delayed, 1: output delay for a SPI module clock cycle at its negative edge. Can be configured in CONF state.*/
+            uint32_t dout6_mode                    :    1;  /*The output signal $n is delayed by the SPI module clock, 0: output without delayed, 1: output delay for a SPI module clock cycle at its negative edge. Can be configured in CONF state.*/
+            uint32_t dout7_mode                    :    1;  /*The output signal $n is delayed by the SPI module clock, 0: output without delayed, 1: output delay for a SPI module clock cycle at its negative edge. Can be configured in CONF state.*/
+            uint32_t d_dqs_mode                    :    1;  /*The output signal SPI_DQS is delayed by the SPI module clock, 0: output without delayed, 1: output delay for a SPI module clock cycle at its negative edge. Can be configured in CONF state.*/
+            uint32_t reserved9                     :    23;  /*reserved*/
+        };
+        uint32_t val;
+    } dout_mode;
+    union {
+        struct {
+            uint32_t outfifo_empty                 :    1;  /*Records the status of DMA TX FIFO. 1: DMA TX FIFO is not ready for sending data. 0: DMA TX FIFO is ready for sending data.*/
+            uint32_t infifo_full                   :    1;  /*Records the status of DMA RX FIFO. 1: DMA RX FIFO is not ready for receiving data. 0: DMA RX FIFO is ready for receiving data.*/
+            uint32_t reserved2                     :    16;  /*reserved*/
+            uint32_t dma_seg_trans_en              :    1;  /*Enable dma segment transfer in spi dma half slave mode. 1: enable. 0: disable.*/
+            uint32_t rx_seg_trans_clr_en           :    1;  /*1: spi_dma_infifo_full_vld is cleared by spi slave cmd 5. 0: spi_dma_infifo_full_vld is cleared by spi_trans_done.*/
+            uint32_t tx_seg_trans_clr_en           :    1;  /*1: spi_dma_outfifo_empty_vld is cleared by spi slave cmd 6. 0: spi_dma_outfifo_empty_vld is cleared by spi_trans_done.*/
+            uint32_t rx_eof_en                     :    1;  /*1: spi_dma_inlink_eof is set when the number of dma pushed data bytes is equal to the value of spi_slv/mst_dma_rd_bytelen[19:0] in spi dma transition.  0: spi_dma_inlink_eof is set by spi_trans_done in non-seg-trans or spi_dma_seg_trans_done in seg-trans.*/
+            uint32_t reserved22                    :    5;  /*reserved*/
+            uint32_t dma_rx_ena                    :    1;  /*Set this bit to enable SPI DMA controlled receive data mode.*/
+            uint32_t dma_tx_ena                    :    1;  /*Set this bit to enable SPI DMA controlled send data mode.*/
+            uint32_t rx_afifo_rst                  :    1;  /*Set this bit to reset RX AFIFO, which is used to receive data in SPI master and slave mode transfer.*/
+            uint32_t buf_afifo_rst                 :    1;  /*Set this bit to reset BUF TX AFIFO, which is used send data out in SPI slave CPU controlled mode transfer and master mode transfer.*/
+            uint32_t dma_afifo_rst                 :    1;  /*Set this bit to reset DMA TX AFIFO, which is used to send data out in SPI slave DMA controlled mode transfer.*/
+        };
+        uint32_t val;
+    } dma_conf;
+    union {
+        struct {
+            uint32_t infifo_full_err               :    1;  /*The enable bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt.*/
+            uint32_t outfifo_empty_err             :    1;  /*The enable bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt.*/
+            uint32_t ex_qpi                        :    1;  /*The enable bit for SPI slave Ex_QPI interrupt.*/
+            uint32_t en_qpi                        :    1;  /*The enable bit for SPI slave En_QPI interrupt.*/
+            uint32_t cmd7                          :    1;  /*The enable bit for SPI slave CMD7 interrupt.*/
+            uint32_t cmd8                          :    1;  /*The enable bit for SPI slave CMD8 interrupt.*/
+            uint32_t cmd9                          :    1;  /*The enable bit for SPI slave CMD9 interrupt.*/
+            uint32_t cmda                          :    1;  /*The enable bit for SPI slave CMDA interrupt.*/
+            uint32_t rd_dma_done                   :    1;  /*The enable bit for SPI_SLV_RD_DMA_DONE_INT interrupt.*/
+            uint32_t wr_dma_done                   :    1;  /*The enable bit for SPI_SLV_WR_DMA_DONE_INT interrupt.*/
+            uint32_t rd_buf_done                   :    1;  /*The enable bit for SPI_SLV_RD_BUF_DONE_INT interrupt.*/
+            uint32_t wr_buf_done                   :    1;  /*The enable bit for SPI_SLV_WR_BUF_DONE_INT interrupt.*/
+            uint32_t trans_done                    :    1;  /*The enable bit for SPI_TRANS_DONE_INT interrupt.*/
+            uint32_t dma_seg_trans_done            :    1;  /*The enable bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt.*/
+            uint32_t seg_magic_err                 :    1;  /*The enable bit for SPI_SEG_MAGIC_ERR_INT interrupt.*/
+            uint32_t buf_addr_err                  :    1;  /*The enable bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt.*/
+            uint32_t cmd_err                       :    1;  /*The enable bit for SPI_SLV_CMD_ERR_INT interrupt.*/
+            uint32_t mst_rx_afifo_wfull_err        :    1;  /*The enable bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt.*/
+            uint32_t mst_tx_afifo_rempty_err       :    1;  /*The enable bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt.*/
+            uint32_t app2                          :    1;  /*The enable bit for SPI_APP2_INT interrupt.*/
+            uint32_t app1                          :    1;  /*The enable bit for SPI_APP1_INT interrupt.*/
+            uint32_t reserved21                    :    11;  /*reserved*/
+        };
+        uint32_t val;
+    } dma_int_ena;
+    union {
+        struct {
+            uint32_t infifo_full_err               :    1;  /*The clear bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt.*/
+            uint32_t outfifo_empty_err             :    1;  /*The clear bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt.*/
+            uint32_t ex_qpi                        :    1;  /*The clear bit for SPI slave Ex_QPI interrupt.*/
+            uint32_t en_qpi                        :    1;  /*The clear bit for SPI slave En_QPI interrupt.*/
+            uint32_t cmd7                          :    1;  /*The clear bit for SPI slave CMD7 interrupt.*/
+            uint32_t cmd8                          :    1;  /*The clear bit for SPI slave CMD8 interrupt.*/
+            uint32_t cmd9                          :    1;  /*The clear bit for SPI slave CMD9 interrupt.*/
+            uint32_t cmda                          :    1;  /*The clear bit for SPI slave CMDA interrupt.*/
+            uint32_t rd_dma_done                   :    1;  /*The clear bit for SPI_SLV_RD_DMA_DONE_INT interrupt.*/
+            uint32_t wr_dma_done                   :    1;  /*The clear bit for SPI_SLV_WR_DMA_DONE_INT interrupt.*/
+            uint32_t rd_buf_done                   :    1;  /*The clear bit for SPI_SLV_RD_BUF_DONE_INT interrupt.*/
+            uint32_t wr_buf_done                   :    1;  /*The clear bit for SPI_SLV_WR_BUF_DONE_INT interrupt.*/
+            uint32_t trans_done                    :    1;  /*The clear bit for SPI_TRANS_DONE_INT interrupt.*/
+            uint32_t dma_seg_trans_done            :    1;  /*The clear bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt.*/
+            uint32_t seg_magic_err                 :    1;  /*The clear bit for SPI_SEG_MAGIC_ERR_INT interrupt.*/
+            uint32_t buf_addr_err                  :    1;  /*The clear bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt.*/
+            uint32_t cmd_err                       :    1;  /*The clear bit for SPI_SLV_CMD_ERR_INT interrupt.*/
+            uint32_t mst_rx_afifo_wfull_err        :    1;  /*The clear bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt.*/
+            uint32_t mst_tx_afifo_rempty_err       :    1;  /*The clear bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt.*/
+            uint32_t app2                          :    1;  /*The clear bit for SPI_APP2_INT interrupt.*/
+            uint32_t app1                          :    1;  /*The clear bit for SPI_APP1_INT interrupt.*/
+            uint32_t reserved21                    :    11;  /*reserved*/
+        };
+        uint32_t val;
+    } dma_int_clr;
+    union {
+        struct {
+            uint32_t infifo_full_err               :    1;  /*1: The current data rate of DMA Rx is smaller than that of SPI, which will lose the receive data.  0: Others.  */
+            uint32_t outfifo_empty_err             :    1;  /*1: The current data rate of DMA TX is smaller than that of SPI. SPI will stop in master mode and send out all 0 in slave mode.  0: Others.  */
+            uint32_t ex_qpi                        :    1;  /*The raw bit for SPI slave Ex_QPI interrupt. 1: SPI slave mode Ex_QPI transmission is ended. 0: Others.*/
+            uint32_t en_qpi                        :    1;  /*The raw bit for SPI slave En_QPI interrupt. 1: SPI slave mode En_QPI transmission is ended. 0: Others.*/
+            uint32_t cmd7                          :    1;  /*The raw bit for SPI slave CMD7 interrupt. 1: SPI slave mode CMD7 transmission is ended. 0: Others.*/
+            uint32_t cmd8                          :    1;  /*The raw bit for SPI slave CMD8 interrupt. 1: SPI slave mode CMD8 transmission is ended. 0: Others.*/
+            uint32_t cmd9                          :    1;  /*The raw bit for SPI slave CMD9 interrupt. 1: SPI slave mode CMD9 transmission is ended. 0: Others.*/
+            uint32_t cmda                          :    1;  /*The raw bit for SPI slave CMDA interrupt. 1: SPI slave mode CMDA transmission is ended. 0: Others.*/
+            uint32_t rd_dma_done                   :    1;  /*The raw bit for SPI_SLV_RD_DMA_DONE_INT interrupt. 1: SPI slave mode Rd_DMA transmission is ended. 0: Others.*/
+            uint32_t wr_dma_done                   :    1;  /*The raw bit for SPI_SLV_WR_DMA_DONE_INT interrupt. 1: SPI slave mode Wr_DMA transmission is ended. 0: Others.*/
+            uint32_t rd_buf_done                   :    1;  /*The raw bit for SPI_SLV_RD_BUF_DONE_INT interrupt. 1: SPI slave mode Rd_BUF transmission is ended. 0: Others.*/
+            uint32_t wr_buf_done                   :    1;  /*The raw bit for SPI_SLV_WR_BUF_DONE_INT interrupt. 1: SPI slave mode Wr_BUF transmission is ended. 0: Others.*/
+            uint32_t trans_done                    :    1;  /*The raw bit for SPI_TRANS_DONE_INT interrupt. 1: SPI master mode transmission is ended. 0: others.*/
+            uint32_t dma_seg_trans_done            :    1;  /*The raw bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt. 1:  spi master DMA full-duplex/half-duplex seg-conf-trans ends or slave half-duplex seg-trans ends. And data has been pushed to corresponding memory.  0:  seg-conf-trans or seg-trans is not ended or not occurred. */
+            uint32_t seg_magic_err                 :    1;  /*The raw bit for SPI_SEG_MAGIC_ERR_INT interrupt. 1: The magic value in CONF buffer is error in the DMA seg-conf-trans. 0: others.*/
+            uint32_t buf_addr_err                  :    1;  /*The raw bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt. 1: The accessing data address of the current SPI slave mode CPU controlled FD, Wr_BUF or Rd_BUF transmission is bigger than 63. 0: Others.*/
+            uint32_t cmd_err                       :    1;  /*The raw bit for SPI_SLV_CMD_ERR_INT interrupt. 1: The slave command value in the current SPI slave HD mode transmission is not supported. 0: Others.*/
+            uint32_t mst_rx_afifo_wfull_err        :    1;  /*The raw bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt. 1: There is a RX AFIFO write-full error when SPI inputs data in master mode. 0: Others.*/
+            uint32_t mst_tx_afifo_rempty_err       :    1;  /*The raw bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt. 1: There is a TX BUF AFIFO read-empty error when SPI outputs data in master mode. 0: Others.*/
+            uint32_t app2                          :    1;  /*The raw bit for SPI_APP2_INT interrupt. The value is only controlled by software.*/
+            uint32_t app1                          :    1;  /*The raw bit for SPI_APP1_INT interrupt. The value is only controlled by software.*/
+            uint32_t reserved21                    :    11;  /*reserved*/
+        };
+        uint32_t val;
+    } dma_int_raw;
+    union {
+        struct {
+            uint32_t infifo_full_err               :    1;  /*The status bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt.*/
+            uint32_t outfifo_empty_err             :    1;  /*The status bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt.*/
+            uint32_t ex_qpi                        :    1;  /*The status bit for SPI slave Ex_QPI interrupt.*/
+            uint32_t en_qpi                        :    1;  /*The status bit for SPI slave En_QPI interrupt.*/
+            uint32_t cmd7                          :    1;  /*The status bit for SPI slave CMD7 interrupt.*/
+            uint32_t cmd8                          :    1;  /*The status bit for SPI slave CMD8 interrupt.*/
+            uint32_t cmd9                          :    1;  /*The status bit for SPI slave CMD9 interrupt.*/
+            uint32_t cmda                          :    1;  /*The status bit for SPI slave CMDA interrupt.*/
+            uint32_t rd_dma_done                   :    1;  /*The status bit for SPI_SLV_RD_DMA_DONE_INT interrupt.*/
+            uint32_t wr_dma_done                   :    1;  /*The status bit for SPI_SLV_WR_DMA_DONE_INT interrupt.*/
+            uint32_t rd_buf_done                   :    1;  /*The status bit for SPI_SLV_RD_BUF_DONE_INT interrupt.*/
+            uint32_t wr_buf_done                   :    1;  /*The status bit for SPI_SLV_WR_BUF_DONE_INT interrupt.*/
+            uint32_t trans_done                    :    1;  /*The status bit for SPI_TRANS_DONE_INT interrupt.*/
+            uint32_t dma_seg_trans_done            :    1;  /*The status bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt.*/
+            uint32_t seg_magic_err                 :    1;  /*The status bit for SPI_SEG_MAGIC_ERR_INT interrupt.*/
+            uint32_t buf_addr_err                  :    1;  /*The status bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt.*/
+            uint32_t cmd_err                       :    1;  /*The status bit for SPI_SLV_CMD_ERR_INT interrupt.*/
+            uint32_t mst_rx_afifo_wfull_err        :    1;  /*The status bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt.*/
+            uint32_t mst_tx_afifo_rempty_err       :    1;  /*The status bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt.*/
+            uint32_t app2                          :    1;  /*The status bit for SPI_APP2_INT interrupt.*/
+            uint32_t app1                          :    1;  /*The status bit for SPI_APP1_INT interrupt.*/
+            uint32_t reserved21                    :    11;  /*reserved*/
+        };
+        uint32_t val;
+    } dma_int_st;
+    union {
+        struct {
+            uint32_t infifo_full_err_int_set       :    1;  /*The software set bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt.*/
+            uint32_t outfifo_empty_err_int_set     :    1;  /*The software set bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt.*/
+            uint32_t ex_qpi_int_set                :    1;  /*The software set bit for SPI slave Ex_QPI interrupt.*/
+            uint32_t en_qpi_int_set                :    1;  /*The software set bit for SPI slave En_QPI interrupt.*/
+            uint32_t cmd7_int_set                  :    1;  /*The software set bit for SPI slave CMD7 interrupt.*/
+            uint32_t cmd8_int_set                  :    1;  /*The software set bit for SPI slave CMD8 interrupt.*/
+            uint32_t cmd9_int_set                  :    1;  /*The software set bit for SPI slave CMD9 interrupt.*/
+            uint32_t cmda_int_set                  :    1;  /*The software set bit for SPI slave CMDA interrupt.*/
+            uint32_t rd_dma_done_int_set           :    1;  /*The software set bit for SPI_SLV_RD_DMA_DONE_INT interrupt.*/
+            uint32_t wr_dma_done_int_set           :    1;  /*The software set bit for SPI_SLV_WR_DMA_DONE_INT interrupt.*/
+            uint32_t rd_buf_done_int_set           :    1;  /*The software set bit for SPI_SLV_RD_BUF_DONE_INT interrupt.*/
+            uint32_t wr_buf_done_int_set           :    1;  /*The software set bit for SPI_SLV_WR_BUF_DONE_INT interrupt.*/
+            uint32_t trans_done_int_set            :    1;  /*The software set bit for SPI_TRANS_DONE_INT interrupt.*/
+            uint32_t dma_seg_trans_done_int_set    :    1;  /*The software set bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt.*/
+            uint32_t seg_magic_err_int_set         :    1;  /*The software set bit for SPI_SEG_MAGIC_ERR_INT interrupt.*/
+            uint32_t buf_addr_err_int_set          :    1;  /*The software set bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt.*/
+            uint32_t cmd_err_int_set               :    1;  /*The software set bit for SPI_SLV_CMD_ERR_INT interrupt.*/
+            uint32_t mst_rx_afifo_wfull_err_int_set:    1;  /*The software set bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt.*/
+            uint32_t mst_tx_afifo_rempty_err_int_set:    1;  /*The software set bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt.*/
+            uint32_t app2_int_set                  :    1;  /*The software set bit for SPI_APP2_INT interrupt.*/
+            uint32_t app1_int_set                  :    1;  /*The software set bit for SPI_APP1_INT interrupt.*/
+            uint32_t reserved21                    :    11;  /*reserved*/
+        };
+        uint32_t val;
+    } dma_int_set;
+    uint32_t reserved_48;
+    uint32_t reserved_4c;
+    uint32_t reserved_50;
+    uint32_t reserved_54;
+    uint32_t reserved_58;
+    uint32_t reserved_5c;
+    uint32_t reserved_60;
+    uint32_t reserved_64;
+    uint32_t reserved_68;
+    uint32_t reserved_6c;
+    uint32_t reserved_70;
+    uint32_t reserved_74;
+    uint32_t reserved_78;
+    uint32_t reserved_7c;
+    uint32_t reserved_80;
+    uint32_t reserved_84;
+    uint32_t reserved_88;
+    uint32_t reserved_8c;
+    uint32_t reserved_90;
+    uint32_t reserved_94;
+    uint32_t data_buf[16];                                               /*SPI CPU-controlled buffer0*/
+    uint32_t reserved_d8;
+    uint32_t reserved_dc;
+    union {
+        struct {
+            uint32_t clk_mode                      :    2;  /*SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on. Can be configured in CONF state.*/
+            uint32_t clk_mode_13                   :    1;  /*{CPOL, CPHA},1: support spi clk mode 1 and 3, first edge output data B[0]/B[7].  0: support spi clk mode 0 and 2, first edge output data B[1]/B[6].*/
+            uint32_t rsck_data_out                 :    1;  /*It saves half a cycle when tsck is the same as rsck. 1: output data at rsck posedge   0: output data at tsck posedge */
+            uint32_t reserved4                     :    4;  /*reserved*/
+            uint32_t rddma_bitlen_en               :    1;  /*1: SPI_SLV_DATA_BITLEN stores data bit length of master-read-slave data length in DMA controlled mode(Rd_DMA). 0: others*/
+            uint32_t wrdma_bitlen_en               :    1;  /*1: SPI_SLV_DATA_BITLEN stores data bit length of master-write-to-slave data length in DMA controlled mode(Wr_DMA). 0: others*/
+            uint32_t rdbuf_bitlen_en               :    1;  /*1: SPI_SLV_DATA_BITLEN stores data bit length of master-read-slave data length in CPU controlled mode(Rd_BUF). 0: others*/
+            uint32_t wrbuf_bitlen_en               :    1;  /*1: SPI_SLV_DATA_BITLEN stores data bit length of master-write-to-slave data length in CPU controlled mode(Wr_BUF). 0: others*/
+            uint32_t reserved12                    :    10;  /*reserved*/
+            uint32_t dma_seg_magic_value           :    4;  /*The magic value of BM table in master DMA seg-trans.*/
+            uint32_t slave_mode                    :    1;  /*Set SPI work mode. 1: slave mode 0: master mode.*/
+            uint32_t soft_reset                    :    1;  /*Software reset enable, reset the spi clock line cs line and data lines. Can be configured in CONF state.*/
+            uint32_t usr_conf                      :    1;  /*1: Enable the DMA CONF phase of current seg-trans operation, which means seg-trans will start. 0: This is not seg-trans mode.*/
+            uint32_t reserved29                    :    3;  /*reserved*/
+        };
+        uint32_t val;
+    } slave;
+    union {
+        struct {
+            uint32_t data_bitlen                   :    18;  /*The transferred data bit length in SPI slave FD and HD mode. */
+            uint32_t last_command                  :    8;  /*In the slave mode it is the value of command.*/
+            uint32_t last_addr                     :    6;  /*In the slave mode it is the value of address.*/
+        };
+        uint32_t val;
+    } slave1;
+    union {
+        struct {
+            uint32_t clk_en                        :    1;  /*Set this bit to enable clk gate*/
+            uint32_t mst_clk_active                :    1;  /*Set this bit to power on the SPI module clock.*/
+            uint32_t mst_clk_sel                   :    1;  /*This bit is used to select SPI module clock source in master mode. 1: PLL_CLK_80M. 0: XTAL CLK.*/
+            uint32_t reserved3                     :    29;  /*reserved*/
+        };
+        uint32_t val;
+    } clk_gate;
+    uint32_t reserved_ec;
+    union {
+        struct {
+            uint32_t date                          :    28;  /*SPI register version.*/
+            uint32_t reserved28                    :    4;  /*reserved*/
+        };
+        uint32_t val;
+    } date;
+} spi_dev_t;
+extern spi_dev_t GPSPI2;
+extern spi_dev_t GPSPI3;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SPI_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/syscon_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/syscon_reg.h
new file mode 100644
index 00000000000..d5dae5f1b36
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/syscon_reg.h
@@ -0,0 +1,719 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_SYSCON_REG_H_
+#define _SOC_SYSCON_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SYSCON_SYSCLK_CONF_REG          (DR_REG_SYSCON_BASE + 0x0)
+/* SYSCON_RST_TICK_CNT : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_RST_TICK_CNT    (BIT(12))
+#define SYSCON_RST_TICK_CNT_M  (BIT(12))
+#define SYSCON_RST_TICK_CNT_V  0x1
+#define SYSCON_RST_TICK_CNT_S  12
+/* SYSCON_CLK_EN : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_CLK_EN    (BIT(11))
+#define SYSCON_CLK_EN_M  (BIT(11))
+#define SYSCON_CLK_EN_V  0x1
+#define SYSCON_CLK_EN_S  11
+/* SYSCON_CLK_320M_EN : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_CLK_320M_EN    (BIT(10))
+#define SYSCON_CLK_320M_EN_M  (BIT(10))
+#define SYSCON_CLK_320M_EN_V  0x1
+#define SYSCON_CLK_320M_EN_S  10
+/* SYSCON_PRE_DIV_CNT : R/W ;bitpos:[9:0] ;default: 10'h1 ; */
+/*description: .*/
+#define SYSCON_PRE_DIV_CNT    0x000003FF
+#define SYSCON_PRE_DIV_CNT_M  ((SYSCON_PRE_DIV_CNT_V)<<(SYSCON_PRE_DIV_CNT_S))
+#define SYSCON_PRE_DIV_CNT_V  0x3FF
+#define SYSCON_PRE_DIV_CNT_S  0
+
+#define SYSCON_TICK_CONF_REG          (DR_REG_SYSCON_BASE + 0x4)
+/* SYSCON_TICK_ENABLE : R/W ;bitpos:[16] ;default: 1'd1 ; */
+/*description: .*/
+#define SYSCON_TICK_ENABLE    (BIT(16))
+#define SYSCON_TICK_ENABLE_M  (BIT(16))
+#define SYSCON_TICK_ENABLE_V  0x1
+#define SYSCON_TICK_ENABLE_S  16
+/* SYSCON_CK8M_TICK_NUM : R/W ;bitpos:[15:8] ;default: 8'd7 ; */
+/*description: .*/
+#define SYSCON_CK8M_TICK_NUM    0x000000FF
+#define SYSCON_CK8M_TICK_NUM_M  ((SYSCON_CK8M_TICK_NUM_V)<<(SYSCON_CK8M_TICK_NUM_S))
+#define SYSCON_CK8M_TICK_NUM_V  0xFF
+#define SYSCON_CK8M_TICK_NUM_S  8
+/* SYSCON_XTAL_TICK_NUM : R/W ;bitpos:[7:0] ;default: 8'd39 ; */
+/*description: .*/
+#define SYSCON_XTAL_TICK_NUM    0x000000FF
+#define SYSCON_XTAL_TICK_NUM_M  ((SYSCON_XTAL_TICK_NUM_V)<<(SYSCON_XTAL_TICK_NUM_S))
+#define SYSCON_XTAL_TICK_NUM_V  0xFF
+#define SYSCON_XTAL_TICK_NUM_S  0
+
+#define SYSCON_CLK_OUT_EN_REG          (DR_REG_SYSCON_BASE + 0x8)
+/* SYSCON_CLK_XTAL_OEN : R/W ;bitpos:[10] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_CLK_XTAL_OEN    (BIT(10))
+#define SYSCON_CLK_XTAL_OEN_M  (BIT(10))
+#define SYSCON_CLK_XTAL_OEN_V  0x1
+#define SYSCON_CLK_XTAL_OEN_S  10
+/* SYSCON_CLK40X_BB_OEN : R/W ;bitpos:[9] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_CLK40X_BB_OEN    (BIT(9))
+#define SYSCON_CLK40X_BB_OEN_M  (BIT(9))
+#define SYSCON_CLK40X_BB_OEN_V  0x1
+#define SYSCON_CLK40X_BB_OEN_S  9
+/* SYSCON_CLK_DAC_CPU_OEN : R/W ;bitpos:[8] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_CLK_DAC_CPU_OEN    (BIT(8))
+#define SYSCON_CLK_DAC_CPU_OEN_M  (BIT(8))
+#define SYSCON_CLK_DAC_CPU_OEN_V  0x1
+#define SYSCON_CLK_DAC_CPU_OEN_S  8
+/* SYSCON_CLK_ADC_INF_OEN : R/W ;bitpos:[7] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_CLK_ADC_INF_OEN    (BIT(7))
+#define SYSCON_CLK_ADC_INF_OEN_M  (BIT(7))
+#define SYSCON_CLK_ADC_INF_OEN_V  0x1
+#define SYSCON_CLK_ADC_INF_OEN_S  7
+/* SYSCON_CLK_320M_OEN : R/W ;bitpos:[6] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_CLK_320M_OEN    (BIT(6))
+#define SYSCON_CLK_320M_OEN_M  (BIT(6))
+#define SYSCON_CLK_320M_OEN_V  0x1
+#define SYSCON_CLK_320M_OEN_S  6
+/* SYSCON_CLK160_OEN : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_CLK160_OEN    (BIT(5))
+#define SYSCON_CLK160_OEN_M  (BIT(5))
+#define SYSCON_CLK160_OEN_V  0x1
+#define SYSCON_CLK160_OEN_S  5
+/* SYSCON_CLK80_OEN : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_CLK80_OEN    (BIT(4))
+#define SYSCON_CLK80_OEN_M  (BIT(4))
+#define SYSCON_CLK80_OEN_V  0x1
+#define SYSCON_CLK80_OEN_S  4
+/* SYSCON_CLK_BB_OEN : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_CLK_BB_OEN    (BIT(3))
+#define SYSCON_CLK_BB_OEN_M  (BIT(3))
+#define SYSCON_CLK_BB_OEN_V  0x1
+#define SYSCON_CLK_BB_OEN_S  3
+/* SYSCON_CLK44_OEN : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_CLK44_OEN    (BIT(2))
+#define SYSCON_CLK44_OEN_M  (BIT(2))
+#define SYSCON_CLK44_OEN_V  0x1
+#define SYSCON_CLK44_OEN_S  2
+/* SYSCON_CLK22_OEN : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_CLK22_OEN    (BIT(1))
+#define SYSCON_CLK22_OEN_M  (BIT(1))
+#define SYSCON_CLK22_OEN_V  0x1
+#define SYSCON_CLK22_OEN_S  1
+/* SYSCON_CLK20_OEN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_CLK20_OEN    (BIT(0))
+#define SYSCON_CLK20_OEN_M  (BIT(0))
+#define SYSCON_CLK20_OEN_V  0x1
+#define SYSCON_CLK20_OEN_S  0
+
+#define SYSCON_WIFI_BB_CFG_REG          (DR_REG_SYSCON_BASE + 0xC)
+/* SYSCON_WIFI_BB_CFG : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define SYSCON_WIFI_BB_CFG    0xFFFFFFFF
+#define SYSCON_WIFI_BB_CFG_M  ((SYSCON_WIFI_BB_CFG_V)<<(SYSCON_WIFI_BB_CFG_S))
+#define SYSCON_WIFI_BB_CFG_V  0xFFFFFFFF
+#define SYSCON_WIFI_BB_CFG_S  0
+
+#define SYSCON_WIFI_BB_CFG_2_REG          (DR_REG_SYSCON_BASE + 0x10)
+/* SYSCON_WIFI_BB_CFG_2 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define SYSCON_WIFI_BB_CFG_2    0xFFFFFFFF
+#define SYSCON_WIFI_BB_CFG_2_M  ((SYSCON_WIFI_BB_CFG_2_V)<<(SYSCON_WIFI_BB_CFG_2_S))
+#define SYSCON_WIFI_BB_CFG_2_V  0xFFFFFFFF
+#define SYSCON_WIFI_BB_CFG_2_S  0
+
+#define SYSCON_WIFI_CLK_EN_REG          (DR_REG_SYSCON_BASE + 0x14)
+/* SYSCON_WIFI_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'hfffce030 ; */
+/*description: .*/
+#define SYSCON_WIFI_CLK_EN    0xFFFFFFFF
+#define SYSCON_WIFI_CLK_EN_M  ((SYSCON_WIFI_CLK_EN_V)<<(SYSCON_WIFI_CLK_EN_S))
+#define SYSCON_WIFI_CLK_EN_V  0xFFFFFFFF
+#define SYSCON_WIFI_CLK_EN_S  0
+
+#define SYSCON_WIFI_RST_EN_REG          (DR_REG_SYSCON_BASE + 0x18)
+/* SYSCON_WIFI_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define SYSCON_WIFI_RST    0xFFFFFFFF
+#define SYSCON_WIFI_RST_M  ((SYSCON_WIFI_RST_V)<<(SYSCON_WIFI_RST_S))
+#define SYSCON_WIFI_RST_V  0xFFFFFFFF
+#define SYSCON_WIFI_RST_S  0
+
+#define SYSTEM_WIFI_CLK_EN_REG SYSCON_WIFI_CLK_EN_REG
+/* SYSTEM_WIFI_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'hfffce030 ; */
+/*description: */
+#define SYSTEM_WIFI_CLK_EN 0x00FB9FCF
+#define SYSTEM_WIFI_CLK_EN_M ((SYSTEM_WIFI_CLK_EN_V) << (SYSTEM_WIFI_CLK_EN_S))
+#define SYSTEM_WIFI_CLK_EN_V 0x00FB9FCF
+#define SYSTEM_WIFI_CLK_EN_S 0
+
+/* Mask for all Wifi clock bits, 6 */
+#define SYSTEM_WIFI_CLK_WIFI_EN  0x0
+#define SYSTEM_WIFI_CLK_WIFI_EN_M  ((SYSTEM_WIFI_CLK_WIFI_EN_V)<<(SYSTEM_WIFI_CLK_WIFI_EN_S))
+#define SYSTEM_WIFI_CLK_WIFI_EN_V  0x0
+#define SYSTEM_WIFI_CLK_WIFI_EN_S  0
+/* Mask for all Bluetooth clock bits, 11, 12, 16, 17 */
+#define SYSTEM_WIFI_CLK_BT_EN  0x0
+#define SYSTEM_WIFI_CLK_BT_EN_M  ((SYSTEM_WIFI_CLK_BT_EN_V)<<(SYSTEM_WIFI_CLK_BT_EN_S))
+#define SYSTEM_WIFI_CLK_BT_EN_V  0x0
+#define SYSTEM_WIFI_CLK_BT_EN_S  0
+/* Mask for clock bits used by both WIFI and Bluetooth, 0, 1, 2, 3, 7, 8, 9, 10, 19, 20, 21, 22, 23 */
+#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x78078F
+
+/* Digital team to check */
+//bluetooth baseband bit11
+#define SYSTEM_BT_BASEBAND_EN BIT(11)
+//bluetooth LC bit16 and bit17
+#define SYSTEM_BT_LC_EN (BIT(16) | BIT(17))
+
+/* Remaining single bit clock masks */
+#define SYSTEM_WIFI_CLK_UNUSED_BIT5 BIT(5)
+#define SYSTEM_WIFI_CLK_UNUSED_BIT12 BIT(12)
+#define SYSTEM_WIFI_CLK_SDIO_HOST_EN BIT(13)
+#define SYSTEM_WIFI_CLK_EMAC_EN BIT(14)
+#define SYSTEM_WIFI_CLK_RNG_EN BIT(15)
+
+#define SYSTEM_CORE_RST_EN_REG SYSTEM_WIFI_RST_EN_REG
+#define SYSTEM_WIFI_RST_EN_REG SYSCON_WIFI_RST_EN_REG
+/* SYSTEM_WIFI_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: */
+#define SYSTEM_WIFI_RST 0xFFFFFFFF
+#define SYSTEM_WIFI_RST_M ((SYSTEM_WIFI_RST_V) << (SYSTEM_WIFI_RST_S))
+#define SYSTEM_WIFI_RST_V 0xFFFFFFFF
+#define SYSTEM_WIFI_RST_S 0
+#define SYSTEM_BB_REG_RST (BIT(13))
+#define SYSTEM_PWR_REG_RST (BIT(12))
+#define SYSTEM_BLE_REG_RST (BIT(11))
+#define SYSTEM_RW_BTLP_RST (BIT(10))
+#define SYSTEM_RW_BTMAC_RST (BIT(9))
+#define SYSTEM_MACPWR_RST (BIT(8))
+#define SYSTEM_EMAC_RST (BIT(7))
+#define SYSTEM_SDIO_RST (BIT(5))
+#define SYSTEM_BTMAC_RST (BIT(4))
+#define SYSTEM_BT_RST (BIT(3))
+#define SYSTEM_MAC_RST (BIT(2))
+#define SYSTEM_FE_RST (BIT(1))
+#define SYSTEM_BB_RST (BIT(0))
+
+#define SYSCON_HOST_INF_SEL_REG          (DR_REG_SYSCON_BASE + 0x1C)
+/* SYSCON_PERI_IO_SWAP : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: .*/
+#define SYSCON_PERI_IO_SWAP    0x000000FF
+#define SYSCON_PERI_IO_SWAP_M  ((SYSCON_PERI_IO_SWAP_V)<<(SYSCON_PERI_IO_SWAP_S))
+#define SYSCON_PERI_IO_SWAP_V  0xFF
+#define SYSCON_PERI_IO_SWAP_S  0
+
+#define SYSCON_EXT_MEM_PMS_LOCK_REG          (DR_REG_SYSCON_BASE + 0x20)
+/* SYSCON_EXT_MEM_PMS_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_EXT_MEM_PMS_LOCK    (BIT(0))
+#define SYSCON_EXT_MEM_PMS_LOCK_M  (BIT(0))
+#define SYSCON_EXT_MEM_PMS_LOCK_V  0x1
+#define SYSCON_EXT_MEM_PMS_LOCK_S  0
+
+#define SYSCON_EXT_MEM_WRITEBACK_BYPASS_REG          (DR_REG_SYSCON_BASE + 0x24)
+/* SYSCON_WRITEBACK_BYPASS : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set 1 to bypass cache writeback request to external memory so that spi will not
+check its attribute..*/
+#define SYSCON_WRITEBACK_BYPASS    (BIT(0))
+#define SYSCON_WRITEBACK_BYPASS_M  (BIT(0))
+#define SYSCON_WRITEBACK_BYPASS_V  0x1
+#define SYSCON_WRITEBACK_BYPASS_S  0
+
+#define SYSCON_FLASH_ACE0_ATTR_REG          (DR_REG_SYSCON_BASE + 0x28)
+/* SYSCON_FLASH_ACE0_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE0_ATTR    0x000001FF
+#define SYSCON_FLASH_ACE0_ATTR_M  ((SYSCON_FLASH_ACE0_ATTR_V)<<(SYSCON_FLASH_ACE0_ATTR_S))
+#define SYSCON_FLASH_ACE0_ATTR_V  0x1FF
+#define SYSCON_FLASH_ACE0_ATTR_S  0
+
+#define SYSCON_FLASH_ACE1_ATTR_REG          (DR_REG_SYSCON_BASE + 0x2C)
+/* SYSCON_FLASH_ACE1_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE1_ATTR    0x000001FF
+#define SYSCON_FLASH_ACE1_ATTR_M  ((SYSCON_FLASH_ACE1_ATTR_V)<<(SYSCON_FLASH_ACE1_ATTR_S))
+#define SYSCON_FLASH_ACE1_ATTR_V  0x1FF
+#define SYSCON_FLASH_ACE1_ATTR_S  0
+
+#define SYSCON_FLASH_ACE2_ATTR_REG          (DR_REG_SYSCON_BASE + 0x30)
+/* SYSCON_FLASH_ACE2_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE2_ATTR    0x000001FF
+#define SYSCON_FLASH_ACE2_ATTR_M  ((SYSCON_FLASH_ACE2_ATTR_V)<<(SYSCON_FLASH_ACE2_ATTR_S))
+#define SYSCON_FLASH_ACE2_ATTR_V  0x1FF
+#define SYSCON_FLASH_ACE2_ATTR_S  0
+
+#define SYSCON_FLASH_ACE3_ATTR_REG          (DR_REG_SYSCON_BASE + 0x34)
+/* SYSCON_FLASH_ACE3_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE3_ATTR    0x000001FF
+#define SYSCON_FLASH_ACE3_ATTR_M  ((SYSCON_FLASH_ACE3_ATTR_V)<<(SYSCON_FLASH_ACE3_ATTR_S))
+#define SYSCON_FLASH_ACE3_ATTR_V  0x1FF
+#define SYSCON_FLASH_ACE3_ATTR_S  0
+
+#define SYSCON_FLASH_ACE0_ADDR_REG          (DR_REG_SYSCON_BASE + 0x38)
+/* SYSCON_FLASH_ACE0_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE0_ADDR_S    0xFFFFFFFF
+#define SYSCON_FLASH_ACE0_ADDR_S_M  ((SYSCON_FLASH_ACE0_ADDR_S_V)<<(SYSCON_FLASH_ACE0_ADDR_S_S))
+#define SYSCON_FLASH_ACE0_ADDR_S_V  0xFFFFFFFF
+#define SYSCON_FLASH_ACE0_ADDR_S_S  0
+
+#define SYSCON_FLASH_ACE1_ADDR_REG          (DR_REG_SYSCON_BASE + 0x3C)
+/* SYSCON_FLASH_ACE1_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h10000000 ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE1_ADDR_S    0xFFFFFFFF
+#define SYSCON_FLASH_ACE1_ADDR_S_M  ((SYSCON_FLASH_ACE1_ADDR_S_V)<<(SYSCON_FLASH_ACE1_ADDR_S_S))
+#define SYSCON_FLASH_ACE1_ADDR_S_V  0xFFFFFFFF
+#define SYSCON_FLASH_ACE1_ADDR_S_S  0
+
+#define SYSCON_FLASH_ACE2_ADDR_REG          (DR_REG_SYSCON_BASE + 0x40)
+/* SYSCON_FLASH_ACE2_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h20000000 ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE2_ADDR_S    0xFFFFFFFF
+#define SYSCON_FLASH_ACE2_ADDR_S_M  ((SYSCON_FLASH_ACE2_ADDR_S_V)<<(SYSCON_FLASH_ACE2_ADDR_S_S))
+#define SYSCON_FLASH_ACE2_ADDR_S_V  0xFFFFFFFF
+#define SYSCON_FLASH_ACE2_ADDR_S_S  0
+
+#define SYSCON_FLASH_ACE3_ADDR_REG          (DR_REG_SYSCON_BASE + 0x44)
+/* SYSCON_FLASH_ACE3_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h30000000 ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE3_ADDR_S    0xFFFFFFFF
+#define SYSCON_FLASH_ACE3_ADDR_S_M  ((SYSCON_FLASH_ACE3_ADDR_S_V)<<(SYSCON_FLASH_ACE3_ADDR_S_S))
+#define SYSCON_FLASH_ACE3_ADDR_S_V  0xFFFFFFFF
+#define SYSCON_FLASH_ACE3_ADDR_S_S  0
+
+#define SYSCON_FLASH_ACE0_SIZE_REG          (DR_REG_SYSCON_BASE + 0x48)
+/* SYSCON_FLASH_ACE0_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE0_SIZE    0x0000FFFF
+#define SYSCON_FLASH_ACE0_SIZE_M  ((SYSCON_FLASH_ACE0_SIZE_V)<<(SYSCON_FLASH_ACE0_SIZE_S))
+#define SYSCON_FLASH_ACE0_SIZE_V  0xFFFF
+#define SYSCON_FLASH_ACE0_SIZE_S  0
+
+#define SYSCON_FLASH_ACE1_SIZE_REG          (DR_REG_SYSCON_BASE + 0x4C)
+/* SYSCON_FLASH_ACE1_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE1_SIZE    0x0000FFFF
+#define SYSCON_FLASH_ACE1_SIZE_M  ((SYSCON_FLASH_ACE1_SIZE_V)<<(SYSCON_FLASH_ACE1_SIZE_S))
+#define SYSCON_FLASH_ACE1_SIZE_V  0xFFFF
+#define SYSCON_FLASH_ACE1_SIZE_S  0
+
+#define SYSCON_FLASH_ACE2_SIZE_REG          (DR_REG_SYSCON_BASE + 0x50)
+/* SYSCON_FLASH_ACE2_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE2_SIZE    0x0000FFFF
+#define SYSCON_FLASH_ACE2_SIZE_M  ((SYSCON_FLASH_ACE2_SIZE_V)<<(SYSCON_FLASH_ACE2_SIZE_S))
+#define SYSCON_FLASH_ACE2_SIZE_V  0xFFFF
+#define SYSCON_FLASH_ACE2_SIZE_S  0
+
+#define SYSCON_FLASH_ACE3_SIZE_REG          (DR_REG_SYSCON_BASE + 0x54)
+/* SYSCON_FLASH_ACE3_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define SYSCON_FLASH_ACE3_SIZE    0x0000FFFF
+#define SYSCON_FLASH_ACE3_SIZE_M  ((SYSCON_FLASH_ACE3_SIZE_V)<<(SYSCON_FLASH_ACE3_SIZE_S))
+#define SYSCON_FLASH_ACE3_SIZE_V  0xFFFF
+#define SYSCON_FLASH_ACE3_SIZE_S  0
+
+#define SYSCON_SRAM_ACE0_ATTR_REG          (DR_REG_SYSCON_BASE + 0x58)
+/* SYSCON_SRAM_ACE0_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE0_ATTR    0x000001FF
+#define SYSCON_SRAM_ACE0_ATTR_M  ((SYSCON_SRAM_ACE0_ATTR_V)<<(SYSCON_SRAM_ACE0_ATTR_S))
+#define SYSCON_SRAM_ACE0_ATTR_V  0x1FF
+#define SYSCON_SRAM_ACE0_ATTR_S  0
+
+#define SYSCON_SRAM_ACE1_ATTR_REG          (DR_REG_SYSCON_BASE + 0x5C)
+/* SYSCON_SRAM_ACE1_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE1_ATTR    0x000001FF
+#define SYSCON_SRAM_ACE1_ATTR_M  ((SYSCON_SRAM_ACE1_ATTR_V)<<(SYSCON_SRAM_ACE1_ATTR_S))
+#define SYSCON_SRAM_ACE1_ATTR_V  0x1FF
+#define SYSCON_SRAM_ACE1_ATTR_S  0
+
+#define SYSCON_SRAM_ACE2_ATTR_REG          (DR_REG_SYSCON_BASE + 0x60)
+/* SYSCON_SRAM_ACE2_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE2_ATTR    0x000001FF
+#define SYSCON_SRAM_ACE2_ATTR_M  ((SYSCON_SRAM_ACE2_ATTR_V)<<(SYSCON_SRAM_ACE2_ATTR_S))
+#define SYSCON_SRAM_ACE2_ATTR_V  0x1FF
+#define SYSCON_SRAM_ACE2_ATTR_S  0
+
+#define SYSCON_SRAM_ACE3_ATTR_REG          (DR_REG_SYSCON_BASE + 0x64)
+/* SYSCON_SRAM_ACE3_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE3_ATTR    0x000001FF
+#define SYSCON_SRAM_ACE3_ATTR_M  ((SYSCON_SRAM_ACE3_ATTR_V)<<(SYSCON_SRAM_ACE3_ATTR_S))
+#define SYSCON_SRAM_ACE3_ATTR_V  0x1FF
+#define SYSCON_SRAM_ACE3_ATTR_S  0
+
+#define SYSCON_SRAM_ACE0_ADDR_REG          (DR_REG_SYSCON_BASE + 0x68)
+/* SYSCON_SRAM_ACE0_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE0_ADDR_S    0xFFFFFFFF
+#define SYSCON_SRAM_ACE0_ADDR_S_M  ((SYSCON_SRAM_ACE0_ADDR_S_V)<<(SYSCON_SRAM_ACE0_ADDR_S_S))
+#define SYSCON_SRAM_ACE0_ADDR_S_V  0xFFFFFFFF
+#define SYSCON_SRAM_ACE0_ADDR_S_S  0
+
+#define SYSCON_SRAM_ACE1_ADDR_REG          (DR_REG_SYSCON_BASE + 0x6C)
+/* SYSCON_SRAM_ACE1_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h10000000 ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE1_ADDR_S    0xFFFFFFFF
+#define SYSCON_SRAM_ACE1_ADDR_S_M  ((SYSCON_SRAM_ACE1_ADDR_S_V)<<(SYSCON_SRAM_ACE1_ADDR_S_S))
+#define SYSCON_SRAM_ACE1_ADDR_S_V  0xFFFFFFFF
+#define SYSCON_SRAM_ACE1_ADDR_S_S  0
+
+#define SYSCON_SRAM_ACE2_ADDR_REG          (DR_REG_SYSCON_BASE + 0x70)
+/* SYSCON_SRAM_ACE2_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h20000000 ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE2_ADDR_S    0xFFFFFFFF
+#define SYSCON_SRAM_ACE2_ADDR_S_M  ((SYSCON_SRAM_ACE2_ADDR_S_V)<<(SYSCON_SRAM_ACE2_ADDR_S_S))
+#define SYSCON_SRAM_ACE2_ADDR_S_V  0xFFFFFFFF
+#define SYSCON_SRAM_ACE2_ADDR_S_S  0
+
+#define SYSCON_SRAM_ACE3_ADDR_REG          (DR_REG_SYSCON_BASE + 0x74)
+/* SYSCON_SRAM_ACE3_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h30000000 ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE3_ADDR_S    0xFFFFFFFF
+#define SYSCON_SRAM_ACE3_ADDR_S_M  ((SYSCON_SRAM_ACE3_ADDR_S_V)<<(SYSCON_SRAM_ACE3_ADDR_S_S))
+#define SYSCON_SRAM_ACE3_ADDR_S_V  0xFFFFFFFF
+#define SYSCON_SRAM_ACE3_ADDR_S_S  0
+
+#define SYSCON_SRAM_ACE0_SIZE_REG          (DR_REG_SYSCON_BASE + 0x78)
+/* SYSCON_SRAM_ACE0_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE0_SIZE    0x0000FFFF
+#define SYSCON_SRAM_ACE0_SIZE_M  ((SYSCON_SRAM_ACE0_SIZE_V)<<(SYSCON_SRAM_ACE0_SIZE_S))
+#define SYSCON_SRAM_ACE0_SIZE_V  0xFFFF
+#define SYSCON_SRAM_ACE0_SIZE_S  0
+
+#define SYSCON_SRAM_ACE1_SIZE_REG          (DR_REG_SYSCON_BASE + 0x7C)
+/* SYSCON_SRAM_ACE1_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE1_SIZE    0x0000FFFF
+#define SYSCON_SRAM_ACE1_SIZE_M  ((SYSCON_SRAM_ACE1_SIZE_V)<<(SYSCON_SRAM_ACE1_SIZE_S))
+#define SYSCON_SRAM_ACE1_SIZE_V  0xFFFF
+#define SYSCON_SRAM_ACE1_SIZE_S  0
+
+#define SYSCON_SRAM_ACE2_SIZE_REG          (DR_REG_SYSCON_BASE + 0x80)
+/* SYSCON_SRAM_ACE2_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE2_SIZE    0x0000FFFF
+#define SYSCON_SRAM_ACE2_SIZE_M  ((SYSCON_SRAM_ACE2_SIZE_V)<<(SYSCON_SRAM_ACE2_SIZE_S))
+#define SYSCON_SRAM_ACE2_SIZE_V  0xFFFF
+#define SYSCON_SRAM_ACE2_SIZE_S  0
+
+#define SYSCON_SRAM_ACE3_SIZE_REG          (DR_REG_SYSCON_BASE + 0x84)
+/* SYSCON_SRAM_ACE3_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
+/*description: .*/
+#define SYSCON_SRAM_ACE3_SIZE    0x0000FFFF
+#define SYSCON_SRAM_ACE3_SIZE_M  ((SYSCON_SRAM_ACE3_SIZE_V)<<(SYSCON_SRAM_ACE3_SIZE_S))
+#define SYSCON_SRAM_ACE3_SIZE_V  0xFFFF
+#define SYSCON_SRAM_ACE3_SIZE_S  0
+
+#define SYSCON_SPI_MEM_PMS_CTRL_REG          (DR_REG_SYSCON_BASE + 0x88)
+/* SYSCON_SPI_MEM_REJECT_CDE : RO ;bitpos:[6:2] ;default: 5'h0 ; */
+/*description: .*/
+#define SYSCON_SPI_MEM_REJECT_CDE    0x0000001F
+#define SYSCON_SPI_MEM_REJECT_CDE_M  ((SYSCON_SPI_MEM_REJECT_CDE_V)<<(SYSCON_SPI_MEM_REJECT_CDE_S))
+#define SYSCON_SPI_MEM_REJECT_CDE_V  0x1F
+#define SYSCON_SPI_MEM_REJECT_CDE_S  2
+/* SYSCON_SPI_MEM_REJECT_CLR : WOD ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_SPI_MEM_REJECT_CLR    (BIT(1))
+#define SYSCON_SPI_MEM_REJECT_CLR_M  (BIT(1))
+#define SYSCON_SPI_MEM_REJECT_CLR_V  0x1
+#define SYSCON_SPI_MEM_REJECT_CLR_S  1
+/* SYSCON_SPI_MEM_REJECT_INT : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_SPI_MEM_REJECT_INT    (BIT(0))
+#define SYSCON_SPI_MEM_REJECT_INT_M  (BIT(0))
+#define SYSCON_SPI_MEM_REJECT_INT_V  0x1
+#define SYSCON_SPI_MEM_REJECT_INT_S  0
+
+#define SYSCON_SPI_MEM_REJECT_ADDR_REG          (DR_REG_SYSCON_BASE + 0x8C)
+/* SYSCON_SPI_MEM_REJECT_ADDR : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define SYSCON_SPI_MEM_REJECT_ADDR    0xFFFFFFFF
+#define SYSCON_SPI_MEM_REJECT_ADDR_M  ((SYSCON_SPI_MEM_REJECT_ADDR_V)<<(SYSCON_SPI_MEM_REJECT_ADDR_S))
+#define SYSCON_SPI_MEM_REJECT_ADDR_V  0xFFFFFFFF
+#define SYSCON_SPI_MEM_REJECT_ADDR_S  0
+
+#define SYSCON_SDIO_CTRL_REG          (DR_REG_SYSCON_BASE + 0x90)
+/* SYSCON_SDIO_WIN_ACCESS_EN : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: .*/
+#define SYSCON_SDIO_WIN_ACCESS_EN    (BIT(0))
+#define SYSCON_SDIO_WIN_ACCESS_EN_M  (BIT(0))
+#define SYSCON_SDIO_WIN_ACCESS_EN_V  0x1
+#define SYSCON_SDIO_WIN_ACCESS_EN_S  0
+
+#define SYSCON_REDCY_SIG0_REG          (DR_REG_SYSCON_BASE + 0x94)
+/* SYSCON_REDCY_ANDOR : RO ;bitpos:[31] ;default: 1'h0 ; */
+/*description: .*/
+#define SYSCON_REDCY_ANDOR    (BIT(31))
+#define SYSCON_REDCY_ANDOR_M  (BIT(31))
+#define SYSCON_REDCY_ANDOR_V  0x1
+#define SYSCON_REDCY_ANDOR_S  31
+/* SYSCON_REDCY_SIG0 : R/W ;bitpos:[30:0] ;default: 31'h0 ; */
+/*description: .*/
+#define SYSCON_REDCY_SIG0    0x7FFFFFFF
+#define SYSCON_REDCY_SIG0_M  ((SYSCON_REDCY_SIG0_V)<<(SYSCON_REDCY_SIG0_S))
+#define SYSCON_REDCY_SIG0_V  0x7FFFFFFF
+#define SYSCON_REDCY_SIG0_S  0
+
+#define SYSCON_REDCY_SIG1_REG          (DR_REG_SYSCON_BASE + 0x98)
+/* SYSCON_REDCY_NANDOR : RO ;bitpos:[31] ;default: 1'h0 ; */
+/*description: .*/
+#define SYSCON_REDCY_NANDOR    (BIT(31))
+#define SYSCON_REDCY_NANDOR_M  (BIT(31))
+#define SYSCON_REDCY_NANDOR_V  0x1
+#define SYSCON_REDCY_NANDOR_S  31
+/* SYSCON_REDCY_SIG1 : R/W ;bitpos:[30:0] ;default: 31'h0 ; */
+/*description: .*/
+#define SYSCON_REDCY_SIG1    0x7FFFFFFF
+#define SYSCON_REDCY_SIG1_M  ((SYSCON_REDCY_SIG1_V)<<(SYSCON_REDCY_SIG1_S))
+#define SYSCON_REDCY_SIG1_V  0x7FFFFFFF
+#define SYSCON_REDCY_SIG1_S  0
+
+#define SYSCON_FRONT_END_MEM_PD_REG          (DR_REG_SYSCON_BASE + 0x9C)
+/* SYSCON_FREQ_MEM_FORCE_PD : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_FREQ_MEM_FORCE_PD    (BIT(7))
+#define SYSCON_FREQ_MEM_FORCE_PD_M  (BIT(7))
+#define SYSCON_FREQ_MEM_FORCE_PD_V  0x1
+#define SYSCON_FREQ_MEM_FORCE_PD_S  7
+/* SYSCON_FREQ_MEM_FORCE_PU : R/W ;bitpos:[6] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_FREQ_MEM_FORCE_PU    (BIT(6))
+#define SYSCON_FREQ_MEM_FORCE_PU_M  (BIT(6))
+#define SYSCON_FREQ_MEM_FORCE_PU_V  0x1
+#define SYSCON_FREQ_MEM_FORCE_PU_S  6
+/* SYSCON_DC_MEM_FORCE_PD : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_DC_MEM_FORCE_PD    (BIT(5))
+#define SYSCON_DC_MEM_FORCE_PD_M  (BIT(5))
+#define SYSCON_DC_MEM_FORCE_PD_V  0x1
+#define SYSCON_DC_MEM_FORCE_PD_S  5
+/* SYSCON_DC_MEM_FORCE_PU : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_DC_MEM_FORCE_PU    (BIT(4))
+#define SYSCON_DC_MEM_FORCE_PU_M  (BIT(4))
+#define SYSCON_DC_MEM_FORCE_PU_V  0x1
+#define SYSCON_DC_MEM_FORCE_PU_S  4
+/* SYSCON_PBUS_MEM_FORCE_PD : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_PBUS_MEM_FORCE_PD    (BIT(3))
+#define SYSCON_PBUS_MEM_FORCE_PD_M  (BIT(3))
+#define SYSCON_PBUS_MEM_FORCE_PD_V  0x1
+#define SYSCON_PBUS_MEM_FORCE_PD_S  3
+/* SYSCON_PBUS_MEM_FORCE_PU : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_PBUS_MEM_FORCE_PU    (BIT(2))
+#define SYSCON_PBUS_MEM_FORCE_PU_M  (BIT(2))
+#define SYSCON_PBUS_MEM_FORCE_PU_V  0x1
+#define SYSCON_PBUS_MEM_FORCE_PU_S  2
+/* SYSCON_AGC_MEM_FORCE_PD : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_AGC_MEM_FORCE_PD    (BIT(1))
+#define SYSCON_AGC_MEM_FORCE_PD_M  (BIT(1))
+#define SYSCON_AGC_MEM_FORCE_PD_V  0x1
+#define SYSCON_AGC_MEM_FORCE_PD_S  1
+/* SYSCON_AGC_MEM_FORCE_PU : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSCON_AGC_MEM_FORCE_PU    (BIT(0))
+#define SYSCON_AGC_MEM_FORCE_PU_M  (BIT(0))
+#define SYSCON_AGC_MEM_FORCE_PU_V  0x1
+#define SYSCON_AGC_MEM_FORCE_PU_S  0
+
+#define SYSCON_SPI_MEM_ECC_CTRL_REG          (DR_REG_SYSCON_BASE + 0xA0)
+/* SYSCON_SRAM_PAGE_SIZE : R/W ;bitpos:[21:20] ;default: 2'd2 ; */
+/*description: Set the page size of the used MSPI external RAM. 0: 256 bytes. 1: 512 bytes. 2:
+1024 bytes. 3: 2048 bytes..*/
+#define SYSCON_SRAM_PAGE_SIZE    0x00000003
+#define SYSCON_SRAM_PAGE_SIZE_M  ((SYSCON_SRAM_PAGE_SIZE_V)<<(SYSCON_SRAM_PAGE_SIZE_S))
+#define SYSCON_SRAM_PAGE_SIZE_V  0x3
+#define SYSCON_SRAM_PAGE_SIZE_S  20
+/* SYSCON_FLASH_PAGE_SIZE : R/W ;bitpos:[19:18] ;default: 2'd0 ; */
+/*description: Set the page size of the used MSPI flash. 0: 256 bytes. 1: 512 bytes. 2: 1024 by
+tes. 3: 2048 bytes..*/
+#define SYSCON_FLASH_PAGE_SIZE    0x00000003
+#define SYSCON_FLASH_PAGE_SIZE_M  ((SYSCON_FLASH_PAGE_SIZE_V)<<(SYSCON_FLASH_PAGE_SIZE_S))
+#define SYSCON_FLASH_PAGE_SIZE_V  0x3
+#define SYSCON_FLASH_PAGE_SIZE_S  18
+
+#define SYSCON_CLKGATE_FORCE_ON_REG          (DR_REG_SYSCON_BASE + 0xA8)
+/* SYSCON_SRAM_CLKGATE_FORCE_ON : R/W ;bitpos:[13:3] ;default: ~11'b0 ; */
+/*description: .*/
+#define SYSCON_SRAM_CLKGATE_FORCE_ON    0x000007FF
+#define SYSCON_SRAM_CLKGATE_FORCE_ON_M  ((SYSCON_SRAM_CLKGATE_FORCE_ON_V)<<(SYSCON_SRAM_CLKGATE_FORCE_ON_S))
+#define SYSCON_SRAM_CLKGATE_FORCE_ON_V  0x7FF
+#define SYSCON_SRAM_CLKGATE_FORCE_ON_S  3
+/* SYSCON_ROM_CLKGATE_FORCE_ON : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define SYSCON_ROM_CLKGATE_FORCE_ON    0x00000007
+#define SYSCON_ROM_CLKGATE_FORCE_ON_M  ((SYSCON_ROM_CLKGATE_FORCE_ON_V)<<(SYSCON_ROM_CLKGATE_FORCE_ON_S))
+#define SYSCON_ROM_CLKGATE_FORCE_ON_V  0x7
+#define SYSCON_ROM_CLKGATE_FORCE_ON_S  0
+
+#define SYSCON_MEM_POWER_DOWN_REG          (DR_REG_SYSCON_BASE + 0xAC)
+/* SYSCON_SRAM_POWER_DOWN : R/W ;bitpos:[13:3] ;default: 11'b0 ; */
+/*description: .*/
+#define SYSCON_SRAM_POWER_DOWN    0x000007FF
+#define SYSCON_SRAM_POWER_DOWN_M  ((SYSCON_SRAM_POWER_DOWN_V)<<(SYSCON_SRAM_POWER_DOWN_S))
+#define SYSCON_SRAM_POWER_DOWN_V  0x7FF
+#define SYSCON_SRAM_POWER_DOWN_S  3
+/* SYSCON_ROM_POWER_DOWN : R/W ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: .*/
+#define SYSCON_ROM_POWER_DOWN    0x00000007
+#define SYSCON_ROM_POWER_DOWN_M  ((SYSCON_ROM_POWER_DOWN_V)<<(SYSCON_ROM_POWER_DOWN_S))
+#define SYSCON_ROM_POWER_DOWN_V  0x7
+#define SYSCON_ROM_POWER_DOWN_S  0
+
+#define SYSCON_MEM_POWER_UP_REG          (DR_REG_SYSCON_BASE + 0xB0)
+/* SYSCON_SRAM_POWER_UP : R/W ;bitpos:[13:3] ;default: ~11'b0 ; */
+/*description: .*/
+#define SYSCON_SRAM_POWER_UP    0x000007FF
+#define SYSCON_SRAM_POWER_UP_M  ((SYSCON_SRAM_POWER_UP_V)<<(SYSCON_SRAM_POWER_UP_S))
+#define SYSCON_SRAM_POWER_UP_V  0x7FF
+#define SYSCON_SRAM_POWER_UP_S  3
+/* SYSCON_ROM_POWER_UP : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
+/*description: .*/
+#define SYSCON_ROM_POWER_UP    0x00000007
+#define SYSCON_ROM_POWER_UP_M  ((SYSCON_ROM_POWER_UP_V)<<(SYSCON_ROM_POWER_UP_S))
+#define SYSCON_ROM_POWER_UP_V  0x7
+#define SYSCON_ROM_POWER_UP_S  0
+
+#define SYSCON_RETENTION_CTRL_REG          (DR_REG_SYSCON_BASE + 0xB4)
+/* SYSCON_NOBYPASS_CPU_ISO_RST : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_NOBYPASS_CPU_ISO_RST    (BIT(27))
+#define SYSCON_NOBYPASS_CPU_ISO_RST_M  (BIT(27))
+#define SYSCON_NOBYPASS_CPU_ISO_RST_V  0x1
+#define SYSCON_NOBYPASS_CPU_ISO_RST_S  27
+/* SYSCON_RETENTION_CPU_LINK_ADDR : R/W ;bitpos:[26:0] ;default: 27'd0 ; */
+/*description: .*/
+#define SYSCON_RETENTION_CPU_LINK_ADDR    0x07FFFFFF
+#define SYSCON_RETENTION_CPU_LINK_ADDR_M  ((SYSCON_RETENTION_CPU_LINK_ADDR_V)<<(SYSCON_RETENTION_CPU_LINK_ADDR_S))
+#define SYSCON_RETENTION_CPU_LINK_ADDR_V  0x7FFFFFF
+#define SYSCON_RETENTION_CPU_LINK_ADDR_S  0
+
+#define SYSCON_RETENTION_CTRL1_REG          (DR_REG_SYSCON_BASE + 0xB8)
+/* SYSCON_RETENTION_TAG_LINK_ADDR : R/W ;bitpos:[26:0] ;default: 27'd0 ; */
+/*description: .*/
+#define SYSCON_RETENTION_TAG_LINK_ADDR    0x07FFFFFF
+#define SYSCON_RETENTION_TAG_LINK_ADDR_M  ((SYSCON_RETENTION_TAG_LINK_ADDR_V)<<(SYSCON_RETENTION_TAG_LINK_ADDR_S))
+#define SYSCON_RETENTION_TAG_LINK_ADDR_V  0x7FFFFFF
+#define SYSCON_RETENTION_TAG_LINK_ADDR_S  0
+
+#define SYSCON_RETENTION_CTRL2_REG          (DR_REG_SYSCON_BASE + 0xBC)
+/* SYSCON_RET_ICACHE_ENABLE : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_RET_ICACHE_ENABLE    (BIT(31))
+#define SYSCON_RET_ICACHE_ENABLE_M  (BIT(31))
+#define SYSCON_RET_ICACHE_ENABLE_V  0x1
+#define SYSCON_RET_ICACHE_ENABLE_S  31
+/* SYSCON_RET_ICACHE_START_POINT : R/W ;bitpos:[29:22] ;default: 8'd0 ; */
+/*description: .*/
+#define SYSCON_RET_ICACHE_START_POINT    0x000000FF
+#define SYSCON_RET_ICACHE_START_POINT_M  ((SYSCON_RET_ICACHE_START_POINT_V)<<(SYSCON_RET_ICACHE_START_POINT_S))
+#define SYSCON_RET_ICACHE_START_POINT_V  0xFF
+#define SYSCON_RET_ICACHE_START_POINT_S  22
+/* SYSCON_RET_ICACHE_VLD_SIZE : R/W ;bitpos:[20:13] ;default: 8'hff ; */
+/*description: .*/
+#define SYSCON_RET_ICACHE_VLD_SIZE    0x000000FF
+#define SYSCON_RET_ICACHE_VLD_SIZE_M  ((SYSCON_RET_ICACHE_VLD_SIZE_V)<<(SYSCON_RET_ICACHE_VLD_SIZE_S))
+#define SYSCON_RET_ICACHE_VLD_SIZE_V  0xFF
+#define SYSCON_RET_ICACHE_VLD_SIZE_S  13
+/* SYSCON_RET_ICACHE_SIZE : R/W ;bitpos:[11:4] ;default: 8'hff ; */
+/*description: .*/
+#define SYSCON_RET_ICACHE_SIZE    0x000000FF
+#define SYSCON_RET_ICACHE_SIZE_M  ((SYSCON_RET_ICACHE_SIZE_V)<<(SYSCON_RET_ICACHE_SIZE_S))
+#define SYSCON_RET_ICACHE_SIZE_V  0xFF
+#define SYSCON_RET_ICACHE_SIZE_S  4
+
+#define SYSCON_RETENTION_CTRL3_REG          (DR_REG_SYSCON_BASE + 0xC0)
+/* SYSCON_RET_DCACHE_ENABLE : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_RET_DCACHE_ENABLE    (BIT(31))
+#define SYSCON_RET_DCACHE_ENABLE_M  (BIT(31))
+#define SYSCON_RET_DCACHE_ENABLE_V  0x1
+#define SYSCON_RET_DCACHE_ENABLE_S  31
+/* SYSCON_RET_DCACHE_START_POINT : R/W ;bitpos:[30:22] ;default: 9'd0 ; */
+/*description: .*/
+#define SYSCON_RET_DCACHE_START_POINT    0x000001FF
+#define SYSCON_RET_DCACHE_START_POINT_M  ((SYSCON_RET_DCACHE_START_POINT_V)<<(SYSCON_RET_DCACHE_START_POINT_S))
+#define SYSCON_RET_DCACHE_START_POINT_V  0x1FF
+#define SYSCON_RET_DCACHE_START_POINT_S  22
+/* SYSCON_RET_DCACHE_VLD_SIZE : R/W ;bitpos:[21:13] ;default: 9'h1ff ; */
+/*description: .*/
+#define SYSCON_RET_DCACHE_VLD_SIZE    0x000001FF
+#define SYSCON_RET_DCACHE_VLD_SIZE_M  ((SYSCON_RET_DCACHE_VLD_SIZE_V)<<(SYSCON_RET_DCACHE_VLD_SIZE_S))
+#define SYSCON_RET_DCACHE_VLD_SIZE_V  0x1FF
+#define SYSCON_RET_DCACHE_VLD_SIZE_S  13
+/* SYSCON_RET_DCACHE_SIZE : R/W ;bitpos:[12:4] ;default: 9'h1ff ; */
+/*description: .*/
+#define SYSCON_RET_DCACHE_SIZE    0x000001FF
+#define SYSCON_RET_DCACHE_SIZE_M  ((SYSCON_RET_DCACHE_SIZE_V)<<(SYSCON_RET_DCACHE_SIZE_S))
+#define SYSCON_RET_DCACHE_SIZE_V  0x1FF
+#define SYSCON_RET_DCACHE_SIZE_S  4
+
+#define SYSCON_RETENTION_CTRL4_REG          (DR_REG_SYSCON_BASE + 0xC4)
+/* SYSCON_RETENTION_INV_CFG : R/W ;bitpos:[31:0] ;default: ~32'h0 ; */
+/*description: .*/
+#define SYSCON_RETENTION_INV_CFG    0xFFFFFFFF
+#define SYSCON_RETENTION_INV_CFG_M  ((SYSCON_RETENTION_INV_CFG_V)<<(SYSCON_RETENTION_INV_CFG_S))
+#define SYSCON_RETENTION_INV_CFG_V  0xFFFFFFFF
+#define SYSCON_RETENTION_INV_CFG_S  0
+
+#define SYSCON_RETENTION_CTRL5_REG          (DR_REG_SYSCON_BASE + 0xC8)
+/* SYSCON_RETENTION_DISABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSCON_RETENTION_DISABLE    (BIT(0))
+#define SYSCON_RETENTION_DISABLE_M  (BIT(0))
+#define SYSCON_RETENTION_DISABLE_V  0x1
+#define SYSCON_RETENTION_DISABLE_S  0
+
+#define SYSCON_DATE_REG          (DR_REG_SYSCON_BASE + 0x3FC)
+/* SYSCON_DATE : R/W ;bitpos:[31:0] ;default: 32'h2101150 ; */
+/*description: Version control.*/
+#define SYSCON_DATE    0xFFFFFFFF
+#define SYSCON_DATE_M  ((SYSCON_DATE_V)<<(SYSCON_DATE_S))
+#define SYSCON_DATE_V  0xFFFFFFFF
+#define SYSCON_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SYSCON_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/syscon_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/syscon_struct.h
new file mode 100644
index 00000000000..a392939e422
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/syscon_struct.h
@@ -0,0 +1,543 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_SYSCON_STRUCT_H_
+#define _SOC_SYSCON_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct syscon_dev_s {
+    union {
+        struct {
+            uint32_t pre_div                       :    10;
+            uint32_t clk_320m_en                   :    1;
+            uint32_t clk_en                        :    1;
+            uint32_t rst_tick                      :    1;
+            uint32_t reserved13                    :    19;
+        };
+        uint32_t val;
+    } clk_conf;
+    union {
+        struct {
+            uint32_t xtal_tick                     :    8;
+            uint32_t ck8m_tick                     :    8;
+            uint32_t tick_enable                   :    1;
+            uint32_t reserved17                    :    15;
+        };
+        uint32_t val;
+    } tick_conf;
+    union {
+        struct {
+            uint32_t clk20_oen                     :    1;
+            uint32_t clk22_oen                     :    1;
+            uint32_t clk44_oen                     :    1;
+            uint32_t clk_bb_oen                    :    1;
+            uint32_t clk80_oen                     :    1;
+            uint32_t clk160_oen                    :    1;
+            uint32_t clk_320m_oen                  :    1;
+            uint32_t clk_adc_inf_oen               :    1;
+            uint32_t clk_dac_cpu_oen               :    1;
+            uint32_t clk40x_bb_oen                 :    1;
+            uint32_t clk_xtal_oen                  :    1;
+            uint32_t reserved11                    :    21;
+        };
+        uint32_t val;
+    } clk_out_en;
+    uint32_t wifi_bb_cfg;
+    uint32_t wifi_bb_cfg_2;
+    uint32_t wifi_clk_en;
+    uint32_t wifi_rst_en;
+    union {
+        struct {
+            uint32_t peri_io_swap                  :    8;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } host_inf_sel;
+    union {
+        struct {
+            uint32_t ext_mem_pms_lock              :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } ext_mem_pms_lock;
+    union {
+        struct {
+            uint32_t writeback_bypass              :    1;  /*Set 1 to bypass cache writeback request to external memory so that spi will not check its attribute.*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } ext_mem_writeback_bypass;
+    union {
+        struct {
+            uint32_t flash_ace0_attr               :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } flash_ace0_attr;
+    union {
+        struct {
+            uint32_t flash_ace1_attr               :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } flash_ace1_attr;
+    union {
+        struct {
+            uint32_t flash_ace2_attr               :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } flash_ace2_attr;
+    union {
+        struct {
+            uint32_t flash_ace3_attr               :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } flash_ace3_attr;
+    uint32_t flash_ace0_addr;
+    uint32_t flash_ace1_addr;
+    uint32_t flash_ace2_addr;
+    uint32_t flash_ace3_addr;
+    union {
+        struct {
+            uint32_t flash_ace0_size               :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } flash_ace0_size;
+    union {
+        struct {
+            uint32_t flash_ace1_size               :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } flash_ace1_size;
+    union {
+        struct {
+            uint32_t flash_ace2_size               :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } flash_ace2_size;
+    union {
+        struct {
+            uint32_t flash_ace3_size               :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } flash_ace3_size;
+    union {
+        struct {
+            uint32_t sram_ace0_attr                :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } sram_ace0_attr;
+    union {
+        struct {
+            uint32_t sram_ace1_attr                :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } sram_ace1_attr;
+    union {
+        struct {
+            uint32_t sram_ace2_attr                :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } sram_ace2_attr;
+    union {
+        struct {
+            uint32_t sram_ace3_attr                :    9;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } sram_ace3_attr;
+    uint32_t sram_ace0_addr;
+    uint32_t sram_ace1_addr;
+    uint32_t sram_ace2_addr;
+    uint32_t sram_ace3_addr;
+    union {
+        struct {
+            uint32_t sram_ace0_size                :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } sram_ace0_size;
+    union {
+        struct {
+            uint32_t sram_ace1_size                :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } sram_ace1_size;
+    union {
+        struct {
+            uint32_t sram_ace2_size                :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } sram_ace2_size;
+    union {
+        struct {
+            uint32_t sram_ace3_size                :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } sram_ace3_size;
+    union {
+        struct {
+            uint32_t spi_mem_reject_int            :    1;
+            uint32_t spi_mem_reject_clr            :    1;
+            uint32_t spi_mem_reject_cde            :    5;
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } spi_mem_pms_ctrl;
+    uint32_t spi_mem_reject_addr;
+    union {
+        struct {
+            uint32_t sdio_win_access_en            :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } sdio_ctrl;
+    union {
+        struct {
+            uint32_t redcy_sig0                    :    31;
+            uint32_t redcy_andor                   :    1;
+        };
+        uint32_t val;
+    } redcy_sig0;
+    union {
+        struct {
+            uint32_t redcy_sig1                    :    31;
+            uint32_t redcy_nandor                  :    1;
+        };
+        uint32_t val;
+    } redcy_sig1;
+    union {
+        struct {
+            uint32_t agc_mem_force_pu              :    1;
+            uint32_t agc_mem_force_pd              :    1;
+            uint32_t pbus_mem_force_pu             :    1;
+            uint32_t pbus_mem_force_pd             :    1;
+            uint32_t dc_mem_force_pu               :    1;
+            uint32_t dc_mem_force_pd               :    1;
+            uint32_t freq_mem_force_pu             :    1;
+            uint32_t freq_mem_force_pd             :    1;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } front_end_mem_pd;
+    union {
+        struct {
+            uint32_t reserved0                     :    18;  /*reserved*/
+            uint32_t flash_page_size               :    2;  /*Set the page size of the used MSPI flash. 0: 256 bytes. 1: 512 bytes. 2: 1024 bytes. 3: 2048 bytes.*/
+            uint32_t sram_page_size                :    2;  /*Set the page size of the used MSPI external RAM. 0: 256 bytes. 1: 512 bytes. 2: 1024 bytes. 3: 2048 bytes.*/
+            uint32_t reserved22                    :    10;  /*reserved*/
+        };
+        uint32_t val;
+    } spi_mem_ecc_ctrl;
+    uint32_t reserved_a4;
+    union {
+        struct {
+            uint32_t rom_clkgate_force_on          :    3;
+            uint32_t sram_clkgate_force_on         :    11;
+            uint32_t reserved14                    :    18;
+        };
+        uint32_t val;
+    } clkgate_force_on;
+    union {
+        struct {
+            uint32_t rom_power_down                :    3;
+            uint32_t sram_power_down               :    11;
+            uint32_t reserved14                    :    18;
+        };
+        uint32_t val;
+    } mem_power_down;
+    union {
+        struct {
+            uint32_t rom_power_up                  :    3;
+            uint32_t sram_power_up                 :    11;
+            uint32_t reserved14                    :    18;
+        };
+        uint32_t val;
+    } mem_power_up;
+    union {
+        struct {
+            uint32_t retention_cpu_link_addr       :    27;
+            uint32_t nobypass_cpu_iso_rst          :    1;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } retention_ctrl;
+    union {
+        struct {
+            uint32_t retention_tag_link_addr       :    27;
+            uint32_t reserved27                    :    5;
+        };
+        uint32_t val;
+    } retention_ctrl1;
+    union {
+        struct {
+            uint32_t reserved0                     :    4;
+            uint32_t ret_icache_size               :    8;
+            uint32_t reserved12                    :    1;
+            uint32_t ret_icache_vld_size           :    8;
+            uint32_t reserved21                    :    1;
+            uint32_t ret_icache_start_point        :    8;
+            uint32_t reserved30                    :    1;
+            uint32_t ret_icache_enable             :    1;
+        };
+        uint32_t val;
+    } retention_ctrl2;
+    union {
+        struct {
+            uint32_t reserved0                     :    4;
+            uint32_t ret_dcache_size               :    9;
+            uint32_t ret_dcache_vld_size           :    9;
+            uint32_t ret_dcache_start_point        :    9;
+            uint32_t ret_dcache_enable             :    1;
+        };
+        uint32_t val;
+    } retention_ctrl3;
+    uint32_t retention_ctrl4;
+    union {
+        struct {
+            uint32_t retention_disable             :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } retention_ctrl5;
+    uint32_t reserved_cc;
+    uint32_t reserved_d0;
+    uint32_t reserved_d4;
+    uint32_t reserved_d8;
+    uint32_t reserved_dc;
+    uint32_t reserved_e0;
+    uint32_t reserved_e4;
+    uint32_t reserved_e8;
+    uint32_t reserved_ec;
+    uint32_t reserved_f0;
+    uint32_t reserved_f4;
+    uint32_t reserved_f8;
+    uint32_t reserved_fc;
+    uint32_t reserved_100;
+    uint32_t reserved_104;
+    uint32_t reserved_108;
+    uint32_t reserved_10c;
+    uint32_t reserved_110;
+    uint32_t reserved_114;
+    uint32_t reserved_118;
+    uint32_t reserved_11c;
+    uint32_t reserved_120;
+    uint32_t reserved_124;
+    uint32_t reserved_128;
+    uint32_t reserved_12c;
+    uint32_t reserved_130;
+    uint32_t reserved_134;
+    uint32_t reserved_138;
+    uint32_t reserved_13c;
+    uint32_t reserved_140;
+    uint32_t reserved_144;
+    uint32_t reserved_148;
+    uint32_t reserved_14c;
+    uint32_t reserved_150;
+    uint32_t reserved_154;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    uint32_t reserved_1fc;
+    uint32_t reserved_200;
+    uint32_t reserved_204;
+    uint32_t reserved_208;
+    uint32_t reserved_20c;
+    uint32_t reserved_210;
+    uint32_t reserved_214;
+    uint32_t reserved_218;
+    uint32_t reserved_21c;
+    uint32_t reserved_220;
+    uint32_t reserved_224;
+    uint32_t reserved_228;
+    uint32_t reserved_22c;
+    uint32_t reserved_230;
+    uint32_t reserved_234;
+    uint32_t reserved_238;
+    uint32_t reserved_23c;
+    uint32_t reserved_240;
+    uint32_t reserved_244;
+    uint32_t reserved_248;
+    uint32_t reserved_24c;
+    uint32_t reserved_250;
+    uint32_t reserved_254;
+    uint32_t reserved_258;
+    uint32_t reserved_25c;
+    uint32_t reserved_260;
+    uint32_t reserved_264;
+    uint32_t reserved_268;
+    uint32_t reserved_26c;
+    uint32_t reserved_270;
+    uint32_t reserved_274;
+    uint32_t reserved_278;
+    uint32_t reserved_27c;
+    uint32_t reserved_280;
+    uint32_t reserved_284;
+    uint32_t reserved_288;
+    uint32_t reserved_28c;
+    uint32_t reserved_290;
+    uint32_t reserved_294;
+    uint32_t reserved_298;
+    uint32_t reserved_29c;
+    uint32_t reserved_2a0;
+    uint32_t reserved_2a4;
+    uint32_t reserved_2a8;
+    uint32_t reserved_2ac;
+    uint32_t reserved_2b0;
+    uint32_t reserved_2b4;
+    uint32_t reserved_2b8;
+    uint32_t reserved_2bc;
+    uint32_t reserved_2c0;
+    uint32_t reserved_2c4;
+    uint32_t reserved_2c8;
+    uint32_t reserved_2cc;
+    uint32_t reserved_2d0;
+    uint32_t reserved_2d4;
+    uint32_t reserved_2d8;
+    uint32_t reserved_2dc;
+    uint32_t reserved_2e0;
+    uint32_t reserved_2e4;
+    uint32_t reserved_2e8;
+    uint32_t reserved_2ec;
+    uint32_t reserved_2f0;
+    uint32_t reserved_2f4;
+    uint32_t reserved_2f8;
+    uint32_t reserved_2fc;
+    uint32_t reserved_300;
+    uint32_t reserved_304;
+    uint32_t reserved_308;
+    uint32_t reserved_30c;
+    uint32_t reserved_310;
+    uint32_t reserved_314;
+    uint32_t reserved_318;
+    uint32_t reserved_31c;
+    uint32_t reserved_320;
+    uint32_t reserved_324;
+    uint32_t reserved_328;
+    uint32_t reserved_32c;
+    uint32_t reserved_330;
+    uint32_t reserved_334;
+    uint32_t reserved_338;
+    uint32_t reserved_33c;
+    uint32_t reserved_340;
+    uint32_t reserved_344;
+    uint32_t reserved_348;
+    uint32_t reserved_34c;
+    uint32_t reserved_350;
+    uint32_t reserved_354;
+    uint32_t reserved_358;
+    uint32_t reserved_35c;
+    uint32_t reserved_360;
+    uint32_t reserved_364;
+    uint32_t reserved_368;
+    uint32_t reserved_36c;
+    uint32_t reserved_370;
+    uint32_t reserved_374;
+    uint32_t reserved_378;
+    uint32_t reserved_37c;
+    uint32_t reserved_380;
+    uint32_t reserved_384;
+    uint32_t reserved_388;
+    uint32_t reserved_38c;
+    uint32_t reserved_390;
+    uint32_t reserved_394;
+    uint32_t reserved_398;
+    uint32_t reserved_39c;
+    uint32_t reserved_3a0;
+    uint32_t reserved_3a4;
+    uint32_t reserved_3a8;
+    uint32_t reserved_3ac;
+    uint32_t reserved_3b0;
+    uint32_t reserved_3b4;
+    uint32_t reserved_3b8;
+    uint32_t reserved_3bc;
+    uint32_t reserved_3c0;
+    uint32_t reserved_3c4;
+    uint32_t reserved_3c8;
+    uint32_t reserved_3cc;
+    uint32_t reserved_3d0;
+    uint32_t reserved_3d4;
+    uint32_t reserved_3d8;
+    uint32_t reserved_3dc;
+    uint32_t reserved_3e0;
+    uint32_t reserved_3e4;
+    uint32_t reserved_3e8;
+    uint32_t reserved_3ec;
+    uint32_t reserved_3f0;
+    uint32_t reserved_3f4;
+    uint32_t reserved_3f8;
+    uint32_t date;
+} syscon_dev_t;
+extern syscon_dev_t SYSCON;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SYSCON_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/system_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/system_reg.h
new file mode 100644
index 00000000000..49a02b007eb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/system_reg.h
@@ -0,0 +1,1092 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_SYSTEM_REG_H_
+#define _SOC_SYSTEM_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SYSTEM_CORE_1_CONTROL_0_REG          (DR_REG_SYSTEM_BASE + 0x0)
+/* SYSTEM_CONTROL_CORE_1_RESETING : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_CONTROL_CORE_1_RESETING    (BIT(2))
+#define SYSTEM_CONTROL_CORE_1_RESETING_M  (BIT(2))
+#define SYSTEM_CONTROL_CORE_1_RESETING_V  0x1
+#define SYSTEM_CONTROL_CORE_1_RESETING_S  2
+/* SYSTEM_CONTROL_CORE_1_CLKGATE_EN : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CONTROL_CORE_1_CLKGATE_EN    (BIT(1))
+#define SYSTEM_CONTROL_CORE_1_CLKGATE_EN_M  (BIT(1))
+#define SYSTEM_CONTROL_CORE_1_CLKGATE_EN_V  0x1
+#define SYSTEM_CONTROL_CORE_1_CLKGATE_EN_S  1
+/* SYSTEM_CONTROL_CORE_1_RUNSTALL : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CONTROL_CORE_1_RUNSTALL    (BIT(0))
+#define SYSTEM_CONTROL_CORE_1_RUNSTALL_M  (BIT(0))
+#define SYSTEM_CONTROL_CORE_1_RUNSTALL_V  0x1
+#define SYSTEM_CONTROL_CORE_1_RUNSTALL_S  0
+
+#define SYSTEM_CORE_1_CONTROL_1_REG          (DR_REG_SYSTEM_BASE + 0x4)
+/* SYSTEM_CONTROL_CORE_1_MESSAGE : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define SYSTEM_CONTROL_CORE_1_MESSAGE    0xFFFFFFFF
+#define SYSTEM_CONTROL_CORE_1_MESSAGE_M  ((SYSTEM_CONTROL_CORE_1_MESSAGE_V)<<(SYSTEM_CONTROL_CORE_1_MESSAGE_S))
+#define SYSTEM_CONTROL_CORE_1_MESSAGE_V  0xFFFFFFFF
+#define SYSTEM_CONTROL_CORE_1_MESSAGE_S  0
+
+#define SYSTEM_CPU_PERI_CLK_EN_REG          (DR_REG_SYSTEM_BASE + 0x8)
+/* SYSTEM_CLK_EN_DEDICATED_GPIO : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CLK_EN_DEDICATED_GPIO    (BIT(7))
+#define SYSTEM_CLK_EN_DEDICATED_GPIO_M  (BIT(7))
+#define SYSTEM_CLK_EN_DEDICATED_GPIO_V  0x1
+#define SYSTEM_CLK_EN_DEDICATED_GPIO_S  7
+/* SYSTEM_CLK_EN_ASSIST_DEBUG : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CLK_EN_ASSIST_DEBUG    (BIT(6))
+#define SYSTEM_CLK_EN_ASSIST_DEBUG_M  (BIT(6))
+#define SYSTEM_CLK_EN_ASSIST_DEBUG_V  0x1
+#define SYSTEM_CLK_EN_ASSIST_DEBUG_S  6
+
+#define SYSTEM_CPU_PERI_RST_EN_REG          (DR_REG_SYSTEM_BASE + 0xC)
+/* SYSTEM_RST_EN_DEDICATED_GPIO : R/W ;bitpos:[7] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_RST_EN_DEDICATED_GPIO    (BIT(7))
+#define SYSTEM_RST_EN_DEDICATED_GPIO_M  (BIT(7))
+#define SYSTEM_RST_EN_DEDICATED_GPIO_V  0x1
+#define SYSTEM_RST_EN_DEDICATED_GPIO_S  7
+/* SYSTEM_RST_EN_ASSIST_DEBUG : R/W ;bitpos:[6] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_RST_EN_ASSIST_DEBUG    (BIT(6))
+#define SYSTEM_RST_EN_ASSIST_DEBUG_M  (BIT(6))
+#define SYSTEM_RST_EN_ASSIST_DEBUG_V  0x1
+#define SYSTEM_RST_EN_ASSIST_DEBUG_S  6
+
+#define SYSTEM_CPU_PER_CONF_REG          (DR_REG_SYSTEM_BASE + 0x10)
+/* SYSTEM_CPU_WAITI_DELAY_NUM : R/W ;bitpos:[7:4] ;default: 4'h0 ; */
+/*description: .*/
+#define SYSTEM_CPU_WAITI_DELAY_NUM    0x0000000F
+#define SYSTEM_CPU_WAITI_DELAY_NUM_M  ((SYSTEM_CPU_WAITI_DELAY_NUM_V)<<(SYSTEM_CPU_WAITI_DELAY_NUM_S))
+#define SYSTEM_CPU_WAITI_DELAY_NUM_V  0xF
+#define SYSTEM_CPU_WAITI_DELAY_NUM_S  4
+/* SYSTEM_CPU_WAIT_MODE_FORCE_ON : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_CPU_WAIT_MODE_FORCE_ON    (BIT(3))
+#define SYSTEM_CPU_WAIT_MODE_FORCE_ON_M  (BIT(3))
+#define SYSTEM_CPU_WAIT_MODE_FORCE_ON_V  0x1
+#define SYSTEM_CPU_WAIT_MODE_FORCE_ON_S  3
+/* SYSTEM_PLL_FREQ_SEL : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_PLL_FREQ_SEL    (BIT(2))
+#define SYSTEM_PLL_FREQ_SEL_M  (BIT(2))
+#define SYSTEM_PLL_FREQ_SEL_V  0x1
+#define SYSTEM_PLL_FREQ_SEL_S  2
+/* SYSTEM_CPUPERIOD_SEL : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: .*/
+#define SYSTEM_CPUPERIOD_SEL    0x00000003
+#define SYSTEM_CPUPERIOD_SEL_M  ((SYSTEM_CPUPERIOD_SEL_V)<<(SYSTEM_CPUPERIOD_SEL_S))
+#define SYSTEM_CPUPERIOD_SEL_V  0x3
+#define SYSTEM_CPUPERIOD_SEL_S  0
+
+#define SYSTEM_MEM_PD_MASK_REG          (DR_REG_SYSTEM_BASE + 0x14)
+/* SYSTEM_LSLP_MEM_PD_MASK : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_LSLP_MEM_PD_MASK    (BIT(0))
+#define SYSTEM_LSLP_MEM_PD_MASK_M  (BIT(0))
+#define SYSTEM_LSLP_MEM_PD_MASK_V  0x1
+#define SYSTEM_LSLP_MEM_PD_MASK_S  0
+
+#define SYSTEM_PERIP_CLK_EN0_REG          (DR_REG_SYSTEM_BASE + 0x18)
+/* SYSTEM_SPI4_CLK_EN : R/W ;bitpos:[31] ;default: 1'h1 ; */
+/*description: .*/
+#define SYSTEM_SPI4_CLK_EN    (BIT(31))
+#define SYSTEM_SPI4_CLK_EN_M  (BIT(31))
+#define SYSTEM_SPI4_CLK_EN_V  0x1
+#define SYSTEM_SPI4_CLK_EN_S  31
+/* SYSTEM_ADC2_ARB_CLK_EN : R/W ;bitpos:[30] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_ADC2_ARB_CLK_EN    (BIT(30))
+#define SYSTEM_ADC2_ARB_CLK_EN_M  (BIT(30))
+#define SYSTEM_ADC2_ARB_CLK_EN_V  0x1
+#define SYSTEM_ADC2_ARB_CLK_EN_S  30
+/* SYSTEM_SYSTIMER_CLK_EN : R/W ;bitpos:[29] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_SYSTIMER_CLK_EN    (BIT(29))
+#define SYSTEM_SYSTIMER_CLK_EN_M  (BIT(29))
+#define SYSTEM_SYSTIMER_CLK_EN_V  0x1
+#define SYSTEM_SYSTIMER_CLK_EN_S  29
+/* SYSTEM_APB_SARADC_CLK_EN : R/W ;bitpos:[28] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_APB_SARADC_CLK_EN    (BIT(28))
+#define SYSTEM_APB_SARADC_CLK_EN_M  (BIT(28))
+#define SYSTEM_APB_SARADC_CLK_EN_V  0x1
+#define SYSTEM_APB_SARADC_CLK_EN_S  28
+/* SYSTEM_SPI3_DMA_CLK_EN : R/W ;bitpos:[27] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_SPI3_DMA_CLK_EN    (BIT(27))
+#define SYSTEM_SPI3_DMA_CLK_EN_M  (BIT(27))
+#define SYSTEM_SPI3_DMA_CLK_EN_V  0x1
+#define SYSTEM_SPI3_DMA_CLK_EN_S  27
+/* SYSTEM_PWM3_CLK_EN : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PWM3_CLK_EN    (BIT(26))
+#define SYSTEM_PWM3_CLK_EN_M  (BIT(26))
+#define SYSTEM_PWM3_CLK_EN_V  0x1
+#define SYSTEM_PWM3_CLK_EN_S  26
+/* SYSTEM_PWM2_CLK_EN : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PWM2_CLK_EN    (BIT(25))
+#define SYSTEM_PWM2_CLK_EN_M  (BIT(25))
+#define SYSTEM_PWM2_CLK_EN_V  0x1
+#define SYSTEM_PWM2_CLK_EN_S  25
+/* SYSTEM_UART_MEM_CLK_EN : R/W ;bitpos:[24] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_UART_MEM_CLK_EN    (BIT(24))
+#define SYSTEM_UART_MEM_CLK_EN_M  (BIT(24))
+#define SYSTEM_UART_MEM_CLK_EN_V  0x1
+#define SYSTEM_UART_MEM_CLK_EN_S  24
+/* SYSTEM_USB_CLK_EN : R/W ;bitpos:[23] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_USB_CLK_EN    (BIT(23))
+#define SYSTEM_USB_CLK_EN_M  (BIT(23))
+#define SYSTEM_USB_CLK_EN_V  0x1
+#define SYSTEM_USB_CLK_EN_S  23
+/* SYSTEM_SPI2_DMA_CLK_EN : R/W ;bitpos:[22] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_SPI2_DMA_CLK_EN    (BIT(22))
+#define SYSTEM_SPI2_DMA_CLK_EN_M  (BIT(22))
+#define SYSTEM_SPI2_DMA_CLK_EN_V  0x1
+#define SYSTEM_SPI2_DMA_CLK_EN_S  22
+/* SYSTEM_I2S1_CLK_EN : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_I2S1_CLK_EN    (BIT(21))
+#define SYSTEM_I2S1_CLK_EN_M  (BIT(21))
+#define SYSTEM_I2S1_CLK_EN_V  0x1
+#define SYSTEM_I2S1_CLK_EN_S  21
+/* SYSTEM_PWM1_CLK_EN : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PWM1_CLK_EN    (BIT(20))
+#define SYSTEM_PWM1_CLK_EN_M  (BIT(20))
+#define SYSTEM_PWM1_CLK_EN_V  0x1
+#define SYSTEM_PWM1_CLK_EN_S  20
+/* SYSTEM_TWAI_CLK_EN : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_TWAI_CLK_EN    (BIT(19))
+#define SYSTEM_TWAI_CLK_EN_M  (BIT(19))
+#define SYSTEM_TWAI_CLK_EN_V  0x1
+#define SYSTEM_TWAI_CLK_EN_S  19
+/* SYSTEM_I2C_EXT1_CLK_EN : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_I2C_EXT1_CLK_EN    (BIT(18))
+#define SYSTEM_I2C_EXT1_CLK_EN_M  (BIT(18))
+#define SYSTEM_I2C_EXT1_CLK_EN_V  0x1
+#define SYSTEM_I2C_EXT1_CLK_EN_S  18
+/* SYSTEM_PWM0_CLK_EN : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PWM0_CLK_EN    (BIT(17))
+#define SYSTEM_PWM0_CLK_EN_M  (BIT(17))
+#define SYSTEM_PWM0_CLK_EN_V  0x1
+#define SYSTEM_PWM0_CLK_EN_S  17
+/* SYSTEM_SPI3_CLK_EN : R/W ;bitpos:[16] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_SPI3_CLK_EN    (BIT(16))
+#define SYSTEM_SPI3_CLK_EN_M  (BIT(16))
+#define SYSTEM_SPI3_CLK_EN_V  0x1
+#define SYSTEM_SPI3_CLK_EN_S  16
+/* SYSTEM_TIMERGROUP1_CLK_EN : R/W ;bitpos:[15] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_TIMERGROUP1_CLK_EN    (BIT(15))
+#define SYSTEM_TIMERGROUP1_CLK_EN_M  (BIT(15))
+#define SYSTEM_TIMERGROUP1_CLK_EN_V  0x1
+#define SYSTEM_TIMERGROUP1_CLK_EN_S  15
+/* SYSTEM_EFUSE_CLK_EN : R/W ;bitpos:[14] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_EFUSE_CLK_EN    (BIT(14))
+#define SYSTEM_EFUSE_CLK_EN_M  (BIT(14))
+#define SYSTEM_EFUSE_CLK_EN_V  0x1
+#define SYSTEM_EFUSE_CLK_EN_S  14
+/* SYSTEM_TIMERGROUP_CLK_EN : R/W ;bitpos:[13] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_TIMERGROUP_CLK_EN    (BIT(13))
+#define SYSTEM_TIMERGROUP_CLK_EN_M  (BIT(13))
+#define SYSTEM_TIMERGROUP_CLK_EN_V  0x1
+#define SYSTEM_TIMERGROUP_CLK_EN_S  13
+/* SYSTEM_UHCI1_CLK_EN : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_UHCI1_CLK_EN    (BIT(12))
+#define SYSTEM_UHCI1_CLK_EN_M  (BIT(12))
+#define SYSTEM_UHCI1_CLK_EN_V  0x1
+#define SYSTEM_UHCI1_CLK_EN_S  12
+/* SYSTEM_LEDC_CLK_EN : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_LEDC_CLK_EN    (BIT(11))
+#define SYSTEM_LEDC_CLK_EN_M  (BIT(11))
+#define SYSTEM_LEDC_CLK_EN_V  0x1
+#define SYSTEM_LEDC_CLK_EN_S  11
+/* SYSTEM_PCNT_CLK_EN : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PCNT_CLK_EN    (BIT(10))
+#define SYSTEM_PCNT_CLK_EN_M  (BIT(10))
+#define SYSTEM_PCNT_CLK_EN_V  0x1
+#define SYSTEM_PCNT_CLK_EN_S  10
+/* SYSTEM_RMT_CLK_EN : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_RMT_CLK_EN    (BIT(9))
+#define SYSTEM_RMT_CLK_EN_M  (BIT(9))
+#define SYSTEM_RMT_CLK_EN_V  0x1
+#define SYSTEM_RMT_CLK_EN_S  9
+/* SYSTEM_UHCI0_CLK_EN : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_UHCI0_CLK_EN    (BIT(8))
+#define SYSTEM_UHCI0_CLK_EN_M  (BIT(8))
+#define SYSTEM_UHCI0_CLK_EN_V  0x1
+#define SYSTEM_UHCI0_CLK_EN_S  8
+/* SYSTEM_I2C_EXT0_CLK_EN : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_I2C_EXT0_CLK_EN    (BIT(7))
+#define SYSTEM_I2C_EXT0_CLK_EN_M  (BIT(7))
+#define SYSTEM_I2C_EXT0_CLK_EN_V  0x1
+#define SYSTEM_I2C_EXT0_CLK_EN_S  7
+/* SYSTEM_SPI2_CLK_EN : R/W ;bitpos:[6] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_SPI2_CLK_EN    (BIT(6))
+#define SYSTEM_SPI2_CLK_EN_M  (BIT(6))
+#define SYSTEM_SPI2_CLK_EN_V  0x1
+#define SYSTEM_SPI2_CLK_EN_S  6
+/* SYSTEM_UART1_CLK_EN : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_UART1_CLK_EN    (BIT(5))
+#define SYSTEM_UART1_CLK_EN_M  (BIT(5))
+#define SYSTEM_UART1_CLK_EN_V  0x1
+#define SYSTEM_UART1_CLK_EN_S  5
+/* SYSTEM_I2S0_CLK_EN : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_I2S0_CLK_EN    (BIT(4))
+#define SYSTEM_I2S0_CLK_EN_M  (BIT(4))
+#define SYSTEM_I2S0_CLK_EN_V  0x1
+#define SYSTEM_I2S0_CLK_EN_S  4
+/* SYSTEM_WDG_CLK_EN : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_WDG_CLK_EN    (BIT(3))
+#define SYSTEM_WDG_CLK_EN_M  (BIT(3))
+#define SYSTEM_WDG_CLK_EN_V  0x1
+#define SYSTEM_WDG_CLK_EN_S  3
+/* SYSTEM_UART_CLK_EN : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_UART_CLK_EN    (BIT(2))
+#define SYSTEM_UART_CLK_EN_M  (BIT(2))
+#define SYSTEM_UART_CLK_EN_V  0x1
+#define SYSTEM_UART_CLK_EN_S  2
+/* SYSTEM_SPI01_CLK_EN : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_SPI01_CLK_EN    (BIT(1))
+#define SYSTEM_SPI01_CLK_EN_M  (BIT(1))
+#define SYSTEM_SPI01_CLK_EN_V  0x1
+#define SYSTEM_SPI01_CLK_EN_S  1
+/* SYSTEM_TIMERS_CLK_EN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_TIMERS_CLK_EN    (BIT(0))
+#define SYSTEM_TIMERS_CLK_EN_M  (BIT(0))
+#define SYSTEM_TIMERS_CLK_EN_V  0x1
+#define SYSTEM_TIMERS_CLK_EN_S  0
+
+#define SYSTEM_PERIP_CLK_EN1_REG          (DR_REG_SYSTEM_BASE + 0x1C)
+/* SYSTEM_USB_DEVICE_CLK_EN : R/W ;bitpos:[10] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_USB_DEVICE_CLK_EN    (BIT(10))
+#define SYSTEM_USB_DEVICE_CLK_EN_M  (BIT(10))
+#define SYSTEM_USB_DEVICE_CLK_EN_V  0x1
+#define SYSTEM_USB_DEVICE_CLK_EN_S  10
+/* SYSTEM_UART2_CLK_EN : R/W ;bitpos:[9] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_UART2_CLK_EN    (BIT(9))
+#define SYSTEM_UART2_CLK_EN_M  (BIT(9))
+#define SYSTEM_UART2_CLK_EN_V  0x1
+#define SYSTEM_UART2_CLK_EN_S  9
+/* SYSTEM_LCD_CAM_CLK_EN : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_LCD_CAM_CLK_EN    (BIT(8))
+#define SYSTEM_LCD_CAM_CLK_EN_M  (BIT(8))
+#define SYSTEM_LCD_CAM_CLK_EN_V  0x1
+#define SYSTEM_LCD_CAM_CLK_EN_S  8
+/* SYSTEM_SDIO_HOST_CLK_EN : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_SDIO_HOST_CLK_EN    (BIT(7))
+#define SYSTEM_SDIO_HOST_CLK_EN_M  (BIT(7))
+#define SYSTEM_SDIO_HOST_CLK_EN_V  0x1
+#define SYSTEM_SDIO_HOST_CLK_EN_S  7
+/* SYSTEM_DMA_CLK_EN : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_DMA_CLK_EN    (BIT(6))
+#define SYSTEM_DMA_CLK_EN_M  (BIT(6))
+#define SYSTEM_DMA_CLK_EN_V  0x1
+#define SYSTEM_DMA_CLK_EN_S  6
+/* SYSTEM_CRYPTO_HMAC_CLK_EN : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CRYPTO_HMAC_CLK_EN    (BIT(5))
+#define SYSTEM_CRYPTO_HMAC_CLK_EN_M  (BIT(5))
+#define SYSTEM_CRYPTO_HMAC_CLK_EN_V  0x1
+#define SYSTEM_CRYPTO_HMAC_CLK_EN_S  5
+/* SYSTEM_CRYPTO_DS_CLK_EN : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CRYPTO_DS_CLK_EN    (BIT(4))
+#define SYSTEM_CRYPTO_DS_CLK_EN_M  (BIT(4))
+#define SYSTEM_CRYPTO_DS_CLK_EN_V  0x1
+#define SYSTEM_CRYPTO_DS_CLK_EN_S  4
+/* SYSTEM_CRYPTO_RSA_CLK_EN : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CRYPTO_RSA_CLK_EN    (BIT(3))
+#define SYSTEM_CRYPTO_RSA_CLK_EN_M  (BIT(3))
+#define SYSTEM_CRYPTO_RSA_CLK_EN_V  0x1
+#define SYSTEM_CRYPTO_RSA_CLK_EN_S  3
+/* SYSTEM_CRYPTO_SHA_CLK_EN : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CRYPTO_SHA_CLK_EN    (BIT(2))
+#define SYSTEM_CRYPTO_SHA_CLK_EN_M  (BIT(2))
+#define SYSTEM_CRYPTO_SHA_CLK_EN_V  0x1
+#define SYSTEM_CRYPTO_SHA_CLK_EN_S  2
+/* SYSTEM_CRYPTO_AES_CLK_EN : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CRYPTO_AES_CLK_EN    (BIT(1))
+#define SYSTEM_CRYPTO_AES_CLK_EN_M  (BIT(1))
+#define SYSTEM_CRYPTO_AES_CLK_EN_V  0x1
+#define SYSTEM_CRYPTO_AES_CLK_EN_S  1
+/* SYSTEM_PERI_BACKUP_CLK_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PERI_BACKUP_CLK_EN    (BIT(0))
+#define SYSTEM_PERI_BACKUP_CLK_EN_M  (BIT(0))
+#define SYSTEM_PERI_BACKUP_CLK_EN_V  0x1
+#define SYSTEM_PERI_BACKUP_CLK_EN_S  0
+
+#define SYSTEM_PERIP_RST_EN0_REG          (DR_REG_SYSTEM_BASE + 0x20)
+/* SYSTEM_SPI4_RST : R/W ;bitpos:[31] ;default: 1'h0 ; */
+/*description: .*/
+#define SYSTEM_SPI4_RST    (BIT(31))
+#define SYSTEM_SPI4_RST_M  (BIT(31))
+#define SYSTEM_SPI4_RST_V  0x1
+#define SYSTEM_SPI4_RST_S  31
+/* SYSTEM_ADC2_ARB_RST : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_ADC2_ARB_RST    (BIT(30))
+#define SYSTEM_ADC2_ARB_RST_M  (BIT(30))
+#define SYSTEM_ADC2_ARB_RST_V  0x1
+#define SYSTEM_ADC2_ARB_RST_S  30
+/* SYSTEM_SYSTIMER_RST : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_SYSTIMER_RST    (BIT(29))
+#define SYSTEM_SYSTIMER_RST_M  (BIT(29))
+#define SYSTEM_SYSTIMER_RST_V  0x1
+#define SYSTEM_SYSTIMER_RST_S  29
+/* SYSTEM_APB_SARADC_RST : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_APB_SARADC_RST    (BIT(28))
+#define SYSTEM_APB_SARADC_RST_M  (BIT(28))
+#define SYSTEM_APB_SARADC_RST_V  0x1
+#define SYSTEM_APB_SARADC_RST_S  28
+/* SYSTEM_SPI3_DMA_RST : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_SPI3_DMA_RST    (BIT(27))
+#define SYSTEM_SPI3_DMA_RST_M  (BIT(27))
+#define SYSTEM_SPI3_DMA_RST_V  0x1
+#define SYSTEM_SPI3_DMA_RST_S  27
+/* SYSTEM_PWM3_RST : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PWM3_RST    (BIT(26))
+#define SYSTEM_PWM3_RST_M  (BIT(26))
+#define SYSTEM_PWM3_RST_V  0x1
+#define SYSTEM_PWM3_RST_S  26
+/* SYSTEM_PWM2_RST : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PWM2_RST    (BIT(25))
+#define SYSTEM_PWM2_RST_M  (BIT(25))
+#define SYSTEM_PWM2_RST_V  0x1
+#define SYSTEM_PWM2_RST_S  25
+/* SYSTEM_UART_MEM_RST : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_UART_MEM_RST    (BIT(24))
+#define SYSTEM_UART_MEM_RST_M  (BIT(24))
+#define SYSTEM_UART_MEM_RST_V  0x1
+#define SYSTEM_UART_MEM_RST_S  24
+/* SYSTEM_USB_RST : R/W ;bitpos:[23] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_USB_RST    (BIT(23))
+#define SYSTEM_USB_RST_M  (BIT(23))
+#define SYSTEM_USB_RST_V  0x1
+#define SYSTEM_USB_RST_S  23
+/* SYSTEM_SPI2_DMA_RST : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_SPI2_DMA_RST    (BIT(22))
+#define SYSTEM_SPI2_DMA_RST_M  (BIT(22))
+#define SYSTEM_SPI2_DMA_RST_V  0x1
+#define SYSTEM_SPI2_DMA_RST_S  22
+/* SYSTEM_I2S1_RST : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_I2S1_RST    (BIT(21))
+#define SYSTEM_I2S1_RST_M  (BIT(21))
+#define SYSTEM_I2S1_RST_V  0x1
+#define SYSTEM_I2S1_RST_S  21
+/* SYSTEM_PWM1_RST : R/W ;bitpos:[20] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PWM1_RST    (BIT(20))
+#define SYSTEM_PWM1_RST_M  (BIT(20))
+#define SYSTEM_PWM1_RST_V  0x1
+#define SYSTEM_PWM1_RST_S  20
+/* SYSTEM_TWAI_RST : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_TWAI_RST    (BIT(19))
+#define SYSTEM_TWAI_RST_M  (BIT(19))
+#define SYSTEM_TWAI_RST_V  0x1
+#define SYSTEM_TWAI_RST_S  19
+/* SYSTEM_I2C_EXT1_RST : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_I2C_EXT1_RST    (BIT(18))
+#define SYSTEM_I2C_EXT1_RST_M  (BIT(18))
+#define SYSTEM_I2C_EXT1_RST_V  0x1
+#define SYSTEM_I2C_EXT1_RST_S  18
+/* SYSTEM_PWM0_RST : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PWM0_RST    (BIT(17))
+#define SYSTEM_PWM0_RST_M  (BIT(17))
+#define SYSTEM_PWM0_RST_V  0x1
+#define SYSTEM_PWM0_RST_S  17
+/* SYSTEM_SPI3_RST : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_SPI3_RST    (BIT(16))
+#define SYSTEM_SPI3_RST_M  (BIT(16))
+#define SYSTEM_SPI3_RST_V  0x1
+#define SYSTEM_SPI3_RST_S  16
+/* SYSTEM_TIMERGROUP1_RST : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_TIMERGROUP1_RST    (BIT(15))
+#define SYSTEM_TIMERGROUP1_RST_M  (BIT(15))
+#define SYSTEM_TIMERGROUP1_RST_V  0x1
+#define SYSTEM_TIMERGROUP1_RST_S  15
+/* SYSTEM_EFUSE_RST : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_EFUSE_RST    (BIT(14))
+#define SYSTEM_EFUSE_RST_M  (BIT(14))
+#define SYSTEM_EFUSE_RST_V  0x1
+#define SYSTEM_EFUSE_RST_S  14
+/* SYSTEM_TIMERGROUP_RST : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_TIMERGROUP_RST    (BIT(13))
+#define SYSTEM_TIMERGROUP_RST_M  (BIT(13))
+#define SYSTEM_TIMERGROUP_RST_V  0x1
+#define SYSTEM_TIMERGROUP_RST_S  13
+/* SYSTEM_UHCI1_RST : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_UHCI1_RST    (BIT(12))
+#define SYSTEM_UHCI1_RST_M  (BIT(12))
+#define SYSTEM_UHCI1_RST_V  0x1
+#define SYSTEM_UHCI1_RST_S  12
+/* SYSTEM_LEDC_RST : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_LEDC_RST    (BIT(11))
+#define SYSTEM_LEDC_RST_M  (BIT(11))
+#define SYSTEM_LEDC_RST_V  0x1
+#define SYSTEM_LEDC_RST_S  11
+/* SYSTEM_PCNT_RST : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PCNT_RST    (BIT(10))
+#define SYSTEM_PCNT_RST_M  (BIT(10))
+#define SYSTEM_PCNT_RST_V  0x1
+#define SYSTEM_PCNT_RST_S  10
+/* SYSTEM_RMT_RST : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_RMT_RST    (BIT(9))
+#define SYSTEM_RMT_RST_M  (BIT(9))
+#define SYSTEM_RMT_RST_V  0x1
+#define SYSTEM_RMT_RST_S  9
+/* SYSTEM_UHCI0_RST : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_UHCI0_RST    (BIT(8))
+#define SYSTEM_UHCI0_RST_M  (BIT(8))
+#define SYSTEM_UHCI0_RST_V  0x1
+#define SYSTEM_UHCI0_RST_S  8
+/* SYSTEM_I2C_EXT0_RST : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_I2C_EXT0_RST    (BIT(7))
+#define SYSTEM_I2C_EXT0_RST_M  (BIT(7))
+#define SYSTEM_I2C_EXT0_RST_V  0x1
+#define SYSTEM_I2C_EXT0_RST_S  7
+/* SYSTEM_SPI2_RST : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_SPI2_RST    (BIT(6))
+#define SYSTEM_SPI2_RST_M  (BIT(6))
+#define SYSTEM_SPI2_RST_V  0x1
+#define SYSTEM_SPI2_RST_S  6
+/* SYSTEM_UART1_RST : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_UART1_RST    (BIT(5))
+#define SYSTEM_UART1_RST_M  (BIT(5))
+#define SYSTEM_UART1_RST_V  0x1
+#define SYSTEM_UART1_RST_S  5
+/* SYSTEM_I2S0_RST : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_I2S0_RST    (BIT(4))
+#define SYSTEM_I2S0_RST_M  (BIT(4))
+#define SYSTEM_I2S0_RST_V  0x1
+#define SYSTEM_I2S0_RST_S  4
+/* SYSTEM_WDG_RST : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_WDG_RST    (BIT(3))
+#define SYSTEM_WDG_RST_M  (BIT(3))
+#define SYSTEM_WDG_RST_V  0x1
+#define SYSTEM_WDG_RST_S  3
+/* SYSTEM_UART_RST : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_UART_RST    (BIT(2))
+#define SYSTEM_UART_RST_M  (BIT(2))
+#define SYSTEM_UART_RST_V  0x1
+#define SYSTEM_UART_RST_S  2
+/* SYSTEM_SPI01_RST : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_SPI01_RST    (BIT(1))
+#define SYSTEM_SPI01_RST_M  (BIT(1))
+#define SYSTEM_SPI01_RST_V  0x1
+#define SYSTEM_SPI01_RST_S  1
+/* SYSTEM_TIMERS_RST : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_TIMERS_RST    (BIT(0))
+#define SYSTEM_TIMERS_RST_M  (BIT(0))
+#define SYSTEM_TIMERS_RST_V  0x1
+#define SYSTEM_TIMERS_RST_S  0
+
+#define SYSTEM_PERIP_RST_EN1_REG          (DR_REG_SYSTEM_BASE + 0x24)
+/* SYSTEM_USB_DEVICE_RST : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_USB_DEVICE_RST    (BIT(10))
+#define SYSTEM_USB_DEVICE_RST_M  (BIT(10))
+#define SYSTEM_USB_DEVICE_RST_V  0x1
+#define SYSTEM_USB_DEVICE_RST_S  10
+/* SYSTEM_UART2_RST : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_UART2_RST    (BIT(9))
+#define SYSTEM_UART2_RST_M  (BIT(9))
+#define SYSTEM_UART2_RST_V  0x1
+#define SYSTEM_UART2_RST_S  9
+/* SYSTEM_LCD_CAM_RST : R/W ;bitpos:[8] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_LCD_CAM_RST    (BIT(8))
+#define SYSTEM_LCD_CAM_RST_M  (BIT(8))
+#define SYSTEM_LCD_CAM_RST_V  0x1
+#define SYSTEM_LCD_CAM_RST_S  8
+/* SYSTEM_SDIO_HOST_RST : R/W ;bitpos:[7] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_SDIO_HOST_RST    (BIT(7))
+#define SYSTEM_SDIO_HOST_RST_M  (BIT(7))
+#define SYSTEM_SDIO_HOST_RST_V  0x1
+#define SYSTEM_SDIO_HOST_RST_S  7
+/* SYSTEM_DMA_RST : R/W ;bitpos:[6] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_DMA_RST    (BIT(6))
+#define SYSTEM_DMA_RST_M  (BIT(6))
+#define SYSTEM_DMA_RST_V  0x1
+#define SYSTEM_DMA_RST_S  6
+/* SYSTEM_CRYPTO_HMAC_RST : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_CRYPTO_HMAC_RST    (BIT(5))
+#define SYSTEM_CRYPTO_HMAC_RST_M  (BIT(5))
+#define SYSTEM_CRYPTO_HMAC_RST_V  0x1
+#define SYSTEM_CRYPTO_HMAC_RST_S  5
+/* SYSTEM_CRYPTO_DS_RST : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_CRYPTO_DS_RST    (BIT(4))
+#define SYSTEM_CRYPTO_DS_RST_M  (BIT(4))
+#define SYSTEM_CRYPTO_DS_RST_V  0x1
+#define SYSTEM_CRYPTO_DS_RST_S  4
+/* SYSTEM_CRYPTO_RSA_RST : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_CRYPTO_RSA_RST    (BIT(3))
+#define SYSTEM_CRYPTO_RSA_RST_M  (BIT(3))
+#define SYSTEM_CRYPTO_RSA_RST_V  0x1
+#define SYSTEM_CRYPTO_RSA_RST_S  3
+/* SYSTEM_CRYPTO_SHA_RST : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_CRYPTO_SHA_RST    (BIT(2))
+#define SYSTEM_CRYPTO_SHA_RST_M  (BIT(2))
+#define SYSTEM_CRYPTO_SHA_RST_V  0x1
+#define SYSTEM_CRYPTO_SHA_RST_S  2
+/* SYSTEM_CRYPTO_AES_RST : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_CRYPTO_AES_RST    (BIT(1))
+#define SYSTEM_CRYPTO_AES_RST_M  (BIT(1))
+#define SYSTEM_CRYPTO_AES_RST_V  0x1
+#define SYSTEM_CRYPTO_AES_RST_S  1
+/* SYSTEM_PERI_BACKUP_RST : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_PERI_BACKUP_RST    (BIT(0))
+#define SYSTEM_PERI_BACKUP_RST_M  (BIT(0))
+#define SYSTEM_PERI_BACKUP_RST_V  0x1
+#define SYSTEM_PERI_BACKUP_RST_S  0
+
+#define SYSTEM_BT_LPCK_DIV_INT_REG          (DR_REG_SYSTEM_BASE + 0x28)
+/* SYSTEM_BT_LPCK_DIV_NUM : R/W ;bitpos:[11:0] ;default: 12'd255 ; */
+/*description: .*/
+#define SYSTEM_BT_LPCK_DIV_NUM    0x00000FFF
+#define SYSTEM_BT_LPCK_DIV_NUM_M  ((SYSTEM_BT_LPCK_DIV_NUM_V)<<(SYSTEM_BT_LPCK_DIV_NUM_S))
+#define SYSTEM_BT_LPCK_DIV_NUM_V  0xFFF
+#define SYSTEM_BT_LPCK_DIV_NUM_S  0
+
+#define SYSTEM_BT_LPCK_DIV_FRAC_REG          (DR_REG_SYSTEM_BASE + 0x2C)
+/* SYSTEM_LPCLK_RTC_EN : R/W ;bitpos:[28] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_LPCLK_RTC_EN    (BIT(28))
+#define SYSTEM_LPCLK_RTC_EN_M  (BIT(28))
+#define SYSTEM_LPCLK_RTC_EN_V  0x1
+#define SYSTEM_LPCLK_RTC_EN_S  28
+/* SYSTEM_LPCLK_SEL_XTAL32K : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_LPCLK_SEL_XTAL32K    (BIT(27))
+#define SYSTEM_LPCLK_SEL_XTAL32K_M  (BIT(27))
+#define SYSTEM_LPCLK_SEL_XTAL32K_V  0x1
+#define SYSTEM_LPCLK_SEL_XTAL32K_S  27
+/* SYSTEM_LPCLK_SEL_XTAL : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_LPCLK_SEL_XTAL    (BIT(26))
+#define SYSTEM_LPCLK_SEL_XTAL_M  (BIT(26))
+#define SYSTEM_LPCLK_SEL_XTAL_V  0x1
+#define SYSTEM_LPCLK_SEL_XTAL_S  26
+/* SYSTEM_LPCLK_SEL_8M : R/W ;bitpos:[25] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_LPCLK_SEL_8M    (BIT(25))
+#define SYSTEM_LPCLK_SEL_8M_M  (BIT(25))
+#define SYSTEM_LPCLK_SEL_8M_V  0x1
+#define SYSTEM_LPCLK_SEL_8M_S  25
+/* SYSTEM_LPCLK_SEL_RTC_SLOW : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_LPCLK_SEL_RTC_SLOW    (BIT(24))
+#define SYSTEM_LPCLK_SEL_RTC_SLOW_M  (BIT(24))
+#define SYSTEM_LPCLK_SEL_RTC_SLOW_V  0x1
+#define SYSTEM_LPCLK_SEL_RTC_SLOW_S  24
+/* SYSTEM_BT_LPCK_DIV_A : R/W ;bitpos:[23:12] ;default: 12'd1 ; */
+/*description: .*/
+#define SYSTEM_BT_LPCK_DIV_A    0x00000FFF
+#define SYSTEM_BT_LPCK_DIV_A_M  ((SYSTEM_BT_LPCK_DIV_A_V)<<(SYSTEM_BT_LPCK_DIV_A_S))
+#define SYSTEM_BT_LPCK_DIV_A_V  0xFFF
+#define SYSTEM_BT_LPCK_DIV_A_S  12
+/* SYSTEM_BT_LPCK_DIV_B : R/W ;bitpos:[11:0] ;default: 12'd1 ; */
+/*description: .*/
+#define SYSTEM_BT_LPCK_DIV_B    0x00000FFF
+#define SYSTEM_BT_LPCK_DIV_B_M  ((SYSTEM_BT_LPCK_DIV_B_V)<<(SYSTEM_BT_LPCK_DIV_B_S))
+#define SYSTEM_BT_LPCK_DIV_B_V  0xFFF
+#define SYSTEM_BT_LPCK_DIV_B_S  0
+
+#define SYSTEM_CPU_INTR_FROM_CPU_0_REG          (DR_REG_SYSTEM_BASE + 0x30)
+/* SYSTEM_CPU_INTR_FROM_CPU_0 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CPU_INTR_FROM_CPU_0    (BIT(0))
+#define SYSTEM_CPU_INTR_FROM_CPU_0_M  (BIT(0))
+#define SYSTEM_CPU_INTR_FROM_CPU_0_V  0x1
+#define SYSTEM_CPU_INTR_FROM_CPU_0_S  0
+
+#define SYSTEM_CPU_INTR_FROM_CPU_1_REG          (DR_REG_SYSTEM_BASE + 0x34)
+/* SYSTEM_CPU_INTR_FROM_CPU_1 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CPU_INTR_FROM_CPU_1    (BIT(0))
+#define SYSTEM_CPU_INTR_FROM_CPU_1_M  (BIT(0))
+#define SYSTEM_CPU_INTR_FROM_CPU_1_V  0x1
+#define SYSTEM_CPU_INTR_FROM_CPU_1_S  0
+
+#define SYSTEM_CPU_INTR_FROM_CPU_2_REG          (DR_REG_SYSTEM_BASE + 0x38)
+/* SYSTEM_CPU_INTR_FROM_CPU_2 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CPU_INTR_FROM_CPU_2    (BIT(0))
+#define SYSTEM_CPU_INTR_FROM_CPU_2_M  (BIT(0))
+#define SYSTEM_CPU_INTR_FROM_CPU_2_V  0x1
+#define SYSTEM_CPU_INTR_FROM_CPU_2_S  0
+
+#define SYSTEM_CPU_INTR_FROM_CPU_3_REG          (DR_REG_SYSTEM_BASE + 0x3C)
+/* SYSTEM_CPU_INTR_FROM_CPU_3 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_CPU_INTR_FROM_CPU_3    (BIT(0))
+#define SYSTEM_CPU_INTR_FROM_CPU_3_M  (BIT(0))
+#define SYSTEM_CPU_INTR_FROM_CPU_3_V  0x1
+#define SYSTEM_CPU_INTR_FROM_CPU_3_S  0
+
+#define SYSTEM_RSA_PD_CTRL_REG          (DR_REG_SYSTEM_BASE + 0x40)
+/* SYSTEM_RSA_MEM_FORCE_PD : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_RSA_MEM_FORCE_PD    (BIT(2))
+#define SYSTEM_RSA_MEM_FORCE_PD_M  (BIT(2))
+#define SYSTEM_RSA_MEM_FORCE_PD_V  0x1
+#define SYSTEM_RSA_MEM_FORCE_PD_S  2
+/* SYSTEM_RSA_MEM_FORCE_PU : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_RSA_MEM_FORCE_PU    (BIT(1))
+#define SYSTEM_RSA_MEM_FORCE_PU_M  (BIT(1))
+#define SYSTEM_RSA_MEM_FORCE_PU_V  0x1
+#define SYSTEM_RSA_MEM_FORCE_PU_S  1
+/* SYSTEM_RSA_MEM_PD : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_RSA_MEM_PD    (BIT(0))
+#define SYSTEM_RSA_MEM_PD_M  (BIT(0))
+#define SYSTEM_RSA_MEM_PD_V  0x1
+#define SYSTEM_RSA_MEM_PD_S  0
+
+#define SYSTEM_EDMA_CTRL_REG          (DR_REG_SYSTEM_BASE + 0x44)
+/* SYSTEM_EDMA_RESET : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_EDMA_RESET    (BIT(1))
+#define SYSTEM_EDMA_RESET_M  (BIT(1))
+#define SYSTEM_EDMA_RESET_V  0x1
+#define SYSTEM_EDMA_RESET_S  1
+/* SYSTEM_EDMA_CLK_ON : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_EDMA_CLK_ON    (BIT(0))
+#define SYSTEM_EDMA_CLK_ON_M  (BIT(0))
+#define SYSTEM_EDMA_CLK_ON_V  0x1
+#define SYSTEM_EDMA_CLK_ON_S  0
+
+#define SYSTEM_CACHE_CONTROL_REG          (DR_REG_SYSTEM_BASE + 0x48)
+/* SYSTEM_DCACHE_RESET : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_DCACHE_RESET    (BIT(3))
+#define SYSTEM_DCACHE_RESET_M  (BIT(3))
+#define SYSTEM_DCACHE_RESET_V  0x1
+#define SYSTEM_DCACHE_RESET_S  3
+/* SYSTEM_DCACHE_CLK_ON : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_DCACHE_CLK_ON    (BIT(2))
+#define SYSTEM_DCACHE_CLK_ON_M  (BIT(2))
+#define SYSTEM_DCACHE_CLK_ON_V  0x1
+#define SYSTEM_DCACHE_CLK_ON_S  2
+/* SYSTEM_ICACHE_RESET : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_ICACHE_RESET    (BIT(1))
+#define SYSTEM_ICACHE_RESET_M  (BIT(1))
+#define SYSTEM_ICACHE_RESET_V  0x1
+#define SYSTEM_ICACHE_RESET_S  1
+/* SYSTEM_ICACHE_CLK_ON : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_ICACHE_CLK_ON    (BIT(0))
+#define SYSTEM_ICACHE_CLK_ON_M  (BIT(0))
+#define SYSTEM_ICACHE_CLK_ON_V  0x1
+#define SYSTEM_ICACHE_CLK_ON_S  0
+
+#define SYSTEM_EXTERNAL_DEVICE_ENCRYPT_DECRYPT_CONTROL_REG          (DR_REG_SYSTEM_BASE + 0x4C)
+/* SYSTEM_ENABLE_DOWNLOAD_MANUAL_ENCRYPT : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_ENABLE_DOWNLOAD_MANUAL_ENCRYPT    (BIT(3))
+#define SYSTEM_ENABLE_DOWNLOAD_MANUAL_ENCRYPT_M  (BIT(3))
+#define SYSTEM_ENABLE_DOWNLOAD_MANUAL_ENCRYPT_V  0x1
+#define SYSTEM_ENABLE_DOWNLOAD_MANUAL_ENCRYPT_S  3
+/* SYSTEM_ENABLE_DOWNLOAD_G0CB_DECRYPT : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_ENABLE_DOWNLOAD_G0CB_DECRYPT    (BIT(2))
+#define SYSTEM_ENABLE_DOWNLOAD_G0CB_DECRYPT_M  (BIT(2))
+#define SYSTEM_ENABLE_DOWNLOAD_G0CB_DECRYPT_V  0x1
+#define SYSTEM_ENABLE_DOWNLOAD_G0CB_DECRYPT_S  2
+/* SYSTEM_ENABLE_DOWNLOAD_DB_ENCRYPT : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_ENABLE_DOWNLOAD_DB_ENCRYPT    (BIT(1))
+#define SYSTEM_ENABLE_DOWNLOAD_DB_ENCRYPT_M  (BIT(1))
+#define SYSTEM_ENABLE_DOWNLOAD_DB_ENCRYPT_V  0x1
+#define SYSTEM_ENABLE_DOWNLOAD_DB_ENCRYPT_S  1
+/* SYSTEM_ENABLE_SPI_MANUAL_ENCRYPT : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_ENABLE_SPI_MANUAL_ENCRYPT    (BIT(0))
+#define SYSTEM_ENABLE_SPI_MANUAL_ENCRYPT_M  (BIT(0))
+#define SYSTEM_ENABLE_SPI_MANUAL_ENCRYPT_V  0x1
+#define SYSTEM_ENABLE_SPI_MANUAL_ENCRYPT_S  0
+
+#define SYSTEM_RTC_FASTMEM_CONFIG_REG          (DR_REG_SYSTEM_BASE + 0x50)
+/* SYSTEM_RTC_MEM_CRC_FINISH : RO ;bitpos:[31] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_RTC_MEM_CRC_FINISH    (BIT(31))
+#define SYSTEM_RTC_MEM_CRC_FINISH_M  (BIT(31))
+#define SYSTEM_RTC_MEM_CRC_FINISH_V  0x1
+#define SYSTEM_RTC_MEM_CRC_FINISH_S  31
+/* SYSTEM_RTC_MEM_CRC_LEN : R/W ;bitpos:[30:20] ;default: 11'h7ff ; */
+/*description: .*/
+#define SYSTEM_RTC_MEM_CRC_LEN    0x000007FF
+#define SYSTEM_RTC_MEM_CRC_LEN_M  ((SYSTEM_RTC_MEM_CRC_LEN_V)<<(SYSTEM_RTC_MEM_CRC_LEN_S))
+#define SYSTEM_RTC_MEM_CRC_LEN_V  0x7FF
+#define SYSTEM_RTC_MEM_CRC_LEN_S  20
+/* SYSTEM_RTC_MEM_CRC_ADDR : R/W ;bitpos:[19:9] ;default: 11'h0 ; */
+/*description: .*/
+#define SYSTEM_RTC_MEM_CRC_ADDR    0x000007FF
+#define SYSTEM_RTC_MEM_CRC_ADDR_M  ((SYSTEM_RTC_MEM_CRC_ADDR_V)<<(SYSTEM_RTC_MEM_CRC_ADDR_S))
+#define SYSTEM_RTC_MEM_CRC_ADDR_V  0x7FF
+#define SYSTEM_RTC_MEM_CRC_ADDR_S  9
+/* SYSTEM_RTC_MEM_CRC_START : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_RTC_MEM_CRC_START    (BIT(8))
+#define SYSTEM_RTC_MEM_CRC_START_M  (BIT(8))
+#define SYSTEM_RTC_MEM_CRC_START_V  0x1
+#define SYSTEM_RTC_MEM_CRC_START_S  8
+
+#define SYSTEM_RTC_FASTMEM_CRC_REG          (DR_REG_SYSTEM_BASE + 0x54)
+/* SYSTEM_RTC_MEM_CRC_RES : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: .*/
+#define SYSTEM_RTC_MEM_CRC_RES    0xFFFFFFFF
+#define SYSTEM_RTC_MEM_CRC_RES_M  ((SYSTEM_RTC_MEM_CRC_RES_V)<<(SYSTEM_RTC_MEM_CRC_RES_S))
+#define SYSTEM_RTC_MEM_CRC_RES_V  0xFFFFFFFF
+#define SYSTEM_RTC_MEM_CRC_RES_S  0
+
+#define SYSTEM_REDUNDANT_ECO_CTRL_REG          (DR_REG_SYSTEM_BASE + 0x58)
+/* SYSTEM_REDUNDANT_ECO_RESULT : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_REDUNDANT_ECO_RESULT    (BIT(1))
+#define SYSTEM_REDUNDANT_ECO_RESULT_M  (BIT(1))
+#define SYSTEM_REDUNDANT_ECO_RESULT_V  0x1
+#define SYSTEM_REDUNDANT_ECO_RESULT_S  1
+/* SYSTEM_REDUNDANT_ECO_DRIVE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_REDUNDANT_ECO_DRIVE    (BIT(0))
+#define SYSTEM_REDUNDANT_ECO_DRIVE_M  (BIT(0))
+#define SYSTEM_REDUNDANT_ECO_DRIVE_V  0x1
+#define SYSTEM_REDUNDANT_ECO_DRIVE_S  0
+
+#define SYSTEM_CLOCK_GATE_REG          (DR_REG_SYSTEM_BASE + 0x5C)
+/* SYSTEM_CLK_EN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define SYSTEM_CLK_EN    (BIT(0))
+#define SYSTEM_CLK_EN_M  (BIT(0))
+#define SYSTEM_CLK_EN_V  0x1
+#define SYSTEM_CLK_EN_S  0
+
+#define SYSTEM_SYSCLK_CONF_REG          (DR_REG_SYSTEM_BASE + 0x60)
+/* SYSTEM_CLK_DIV_EN : RO ;bitpos:[19] ;default: 1'd0 ; */
+/*description: .*/
+#define SYSTEM_CLK_DIV_EN    (BIT(19))
+#define SYSTEM_CLK_DIV_EN_M  (BIT(19))
+#define SYSTEM_CLK_DIV_EN_V  0x1
+#define SYSTEM_CLK_DIV_EN_S  19
+/* SYSTEM_CLK_XTAL_FREQ : RO ;bitpos:[18:12] ;default: 7'd0 ; */
+/*description: .*/
+#define SYSTEM_CLK_XTAL_FREQ    0x0000007F
+#define SYSTEM_CLK_XTAL_FREQ_M  ((SYSTEM_CLK_XTAL_FREQ_V)<<(SYSTEM_CLK_XTAL_FREQ_S))
+#define SYSTEM_CLK_XTAL_FREQ_V  0x7F
+#define SYSTEM_CLK_XTAL_FREQ_S  12
+/* SYSTEM_SOC_CLK_SEL : R/W ;bitpos:[11:10] ;default: 2'd0 ; */
+/*description: .*/
+#define SYSTEM_SOC_CLK_SEL    0x00000003
+#define SYSTEM_SOC_CLK_SEL_M  ((SYSTEM_SOC_CLK_SEL_V)<<(SYSTEM_SOC_CLK_SEL_S))
+#define SYSTEM_SOC_CLK_SEL_V  0x3
+#define SYSTEM_SOC_CLK_SEL_S  10
+/* SYSTEM_PRE_DIV_CNT : R/W ;bitpos:[9:0] ;default: 10'h1 ; */
+/*description: .*/
+#define SYSTEM_PRE_DIV_CNT    0x000003FF
+#define SYSTEM_PRE_DIV_CNT_M  ((SYSTEM_PRE_DIV_CNT_V)<<(SYSTEM_PRE_DIV_CNT_S))
+#define SYSTEM_PRE_DIV_CNT_V  0x3FF
+#define SYSTEM_PRE_DIV_CNT_S  0
+
+#define SYSTEM_MEM_PVT_REG          (DR_REG_SYSTEM_BASE + 0x64)
+/* SYSTEM_MEM_VT_SEL : R/W ;bitpos:[23:22] ;default: 2'd0 ; */
+/*description: .*/
+#define SYSTEM_MEM_VT_SEL    0x00000003
+#define SYSTEM_MEM_VT_SEL_M  ((SYSTEM_MEM_VT_SEL_V)<<(SYSTEM_MEM_VT_SEL_S))
+#define SYSTEM_MEM_VT_SEL_V  0x3
+#define SYSTEM_MEM_VT_SEL_S  22
+/* SYSTEM_MEM_TIMING_ERR_CNT : RO ;bitpos:[21:6] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_MEM_TIMING_ERR_CNT    0x0000FFFF
+#define SYSTEM_MEM_TIMING_ERR_CNT_M  ((SYSTEM_MEM_TIMING_ERR_CNT_V)<<(SYSTEM_MEM_TIMING_ERR_CNT_S))
+#define SYSTEM_MEM_TIMING_ERR_CNT_V  0xFFFF
+#define SYSTEM_MEM_TIMING_ERR_CNT_S  6
+/* SYSTEM_MEM_PVT_MONITOR_EN : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_MEM_PVT_MONITOR_EN    (BIT(5))
+#define SYSTEM_MEM_PVT_MONITOR_EN_M  (BIT(5))
+#define SYSTEM_MEM_PVT_MONITOR_EN_V  0x1
+#define SYSTEM_MEM_PVT_MONITOR_EN_S  5
+/* SYSTEM_MEM_ERR_CNT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_MEM_ERR_CNT_CLR    (BIT(4))
+#define SYSTEM_MEM_ERR_CNT_CLR_M  (BIT(4))
+#define SYSTEM_MEM_ERR_CNT_CLR_V  0x1
+#define SYSTEM_MEM_ERR_CNT_CLR_S  4
+/* SYSTEM_MEM_PATH_LEN : R/W ;bitpos:[3:0] ;default: 4'h3 ; */
+/*description: .*/
+#define SYSTEM_MEM_PATH_LEN    0x0000000F
+#define SYSTEM_MEM_PATH_LEN_M  ((SYSTEM_MEM_PATH_LEN_V)<<(SYSTEM_MEM_PATH_LEN_S))
+#define SYSTEM_MEM_PATH_LEN_V  0xF
+#define SYSTEM_MEM_PATH_LEN_S  0
+
+#define SYSTEM_COMB_PVT_LVT_CONF_REG          (DR_REG_SYSTEM_BASE + 0x68)
+/* SYSTEM_COMB_PVT_MONITOR_EN_LVT : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_COMB_PVT_MONITOR_EN_LVT    (BIT(6))
+#define SYSTEM_COMB_PVT_MONITOR_EN_LVT_M  (BIT(6))
+#define SYSTEM_COMB_PVT_MONITOR_EN_LVT_V  0x1
+#define SYSTEM_COMB_PVT_MONITOR_EN_LVT_S  6
+/* SYSTEM_COMB_ERR_CNT_CLR_LVT : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_COMB_ERR_CNT_CLR_LVT    (BIT(5))
+#define SYSTEM_COMB_ERR_CNT_CLR_LVT_M  (BIT(5))
+#define SYSTEM_COMB_ERR_CNT_CLR_LVT_V  0x1
+#define SYSTEM_COMB_ERR_CNT_CLR_LVT_S  5
+/* SYSTEM_COMB_PATH_LEN_LVT : R/W ;bitpos:[4:0] ;default: 5'h3 ; */
+/*description: .*/
+#define SYSTEM_COMB_PATH_LEN_LVT    0x0000001F
+#define SYSTEM_COMB_PATH_LEN_LVT_M  ((SYSTEM_COMB_PATH_LEN_LVT_V)<<(SYSTEM_COMB_PATH_LEN_LVT_S))
+#define SYSTEM_COMB_PATH_LEN_LVT_V  0x1F
+#define SYSTEM_COMB_PATH_LEN_LVT_S  0
+
+#define SYSTEM_COMB_PVT_NVT_CONF_REG          (DR_REG_SYSTEM_BASE + 0x6C)
+/* SYSTEM_COMB_PVT_MONITOR_EN_NVT : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_COMB_PVT_MONITOR_EN_NVT    (BIT(6))
+#define SYSTEM_COMB_PVT_MONITOR_EN_NVT_M  (BIT(6))
+#define SYSTEM_COMB_PVT_MONITOR_EN_NVT_V  0x1
+#define SYSTEM_COMB_PVT_MONITOR_EN_NVT_S  6
+/* SYSTEM_COMB_ERR_CNT_CLR_NVT : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_COMB_ERR_CNT_CLR_NVT    (BIT(5))
+#define SYSTEM_COMB_ERR_CNT_CLR_NVT_M  (BIT(5))
+#define SYSTEM_COMB_ERR_CNT_CLR_NVT_V  0x1
+#define SYSTEM_COMB_ERR_CNT_CLR_NVT_S  5
+/* SYSTEM_COMB_PATH_LEN_NVT : R/W ;bitpos:[4:0] ;default: 5'h3 ; */
+/*description: .*/
+#define SYSTEM_COMB_PATH_LEN_NVT    0x0000001F
+#define SYSTEM_COMB_PATH_LEN_NVT_M  ((SYSTEM_COMB_PATH_LEN_NVT_V)<<(SYSTEM_COMB_PATH_LEN_NVT_S))
+#define SYSTEM_COMB_PATH_LEN_NVT_V  0x1F
+#define SYSTEM_COMB_PATH_LEN_NVT_S  0
+
+#define SYSTEM_COMB_PVT_HVT_CONF_REG          (DR_REG_SYSTEM_BASE + 0x70)
+/* SYSTEM_COMB_PVT_MONITOR_EN_HVT : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_COMB_PVT_MONITOR_EN_HVT    (BIT(6))
+#define SYSTEM_COMB_PVT_MONITOR_EN_HVT_M  (BIT(6))
+#define SYSTEM_COMB_PVT_MONITOR_EN_HVT_V  0x1
+#define SYSTEM_COMB_PVT_MONITOR_EN_HVT_S  6
+/* SYSTEM_COMB_ERR_CNT_CLR_HVT : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define SYSTEM_COMB_ERR_CNT_CLR_HVT    (BIT(5))
+#define SYSTEM_COMB_ERR_CNT_CLR_HVT_M  (BIT(5))
+#define SYSTEM_COMB_ERR_CNT_CLR_HVT_V  0x1
+#define SYSTEM_COMB_ERR_CNT_CLR_HVT_S  5
+/* SYSTEM_COMB_PATH_LEN_HVT : R/W ;bitpos:[4:0] ;default: 5'h3 ; */
+/*description: .*/
+#define SYSTEM_COMB_PATH_LEN_HVT    0x0000001F
+#define SYSTEM_COMB_PATH_LEN_HVT_M  ((SYSTEM_COMB_PATH_LEN_HVT_V)<<(SYSTEM_COMB_PATH_LEN_HVT_S))
+#define SYSTEM_COMB_PATH_LEN_HVT_V  0x1F
+#define SYSTEM_COMB_PATH_LEN_HVT_S  0
+
+#define SYSTEM_COMB_PVT_ERR_LVT_SITE0_REG          (DR_REG_SYSTEM_BASE + 0x74)
+/* SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE0 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE0    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE0_M  ((SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE0_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE0_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE0_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE0_S  0
+
+#define SYSTEM_COMB_PVT_ERR_NVT_SITE0_REG          (DR_REG_SYSTEM_BASE + 0x78)
+/* SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE0 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE0    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE0_M  ((SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE0_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE0_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE0_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE0_S  0
+
+#define SYSTEM_COMB_PVT_ERR_HVT_SITE0_REG          (DR_REG_SYSTEM_BASE + 0x7C)
+/* SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE0 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE0    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE0_M  ((SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE0_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE0_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE0_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE0_S  0
+
+#define SYSTEM_COMB_PVT_ERR_LVT_SITE1_REG          (DR_REG_SYSTEM_BASE + 0x80)
+/* SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE1 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE1    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE1_M  ((SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE1_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE1_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE1_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE1_S  0
+
+#define SYSTEM_COMB_PVT_ERR_NVT_SITE1_REG          (DR_REG_SYSTEM_BASE + 0x84)
+/* SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE1 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE1    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE1_M  ((SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE1_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE1_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE1_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE1_S  0
+
+#define SYSTEM_COMB_PVT_ERR_HVT_SITE1_REG          (DR_REG_SYSTEM_BASE + 0x88)
+/* SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE1 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE1    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE1_M  ((SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE1_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE1_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE1_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE1_S  0
+
+#define SYSTEM_COMB_PVT_ERR_LVT_SITE2_REG          (DR_REG_SYSTEM_BASE + 0x8C)
+/* SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE2 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE2    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE2_M  ((SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE2_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE2_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE2_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE2_S  0
+
+#define SYSTEM_COMB_PVT_ERR_NVT_SITE2_REG          (DR_REG_SYSTEM_BASE + 0x90)
+/* SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE2 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE2    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE2_M  ((SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE2_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE2_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE2_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE2_S  0
+
+#define SYSTEM_COMB_PVT_ERR_HVT_SITE2_REG          (DR_REG_SYSTEM_BASE + 0x94)
+/* SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE2 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE2    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE2_M  ((SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE2_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE2_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE2_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE2_S  0
+
+#define SYSTEM_COMB_PVT_ERR_LVT_SITE3_REG          (DR_REG_SYSTEM_BASE + 0x98)
+/* SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE3 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE3    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE3_M  ((SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE3_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE3_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE3_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_LVT_SITE3_S  0
+
+#define SYSTEM_COMB_PVT_ERR_NVT_SITE3_REG          (DR_REG_SYSTEM_BASE + 0x9C)
+/* SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE3 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE3    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE3_M  ((SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE3_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE3_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE3_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_NVT_SITE3_S  0
+
+#define SYSTEM_COMB_PVT_ERR_HVT_SITE3_REG          (DR_REG_SYSTEM_BASE + 0xA0)
+/* SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE3 : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: .*/
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE3    0x0000FFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE3_M  ((SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE3_V)<<(SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE3_S))
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE3_V  0xFFFF
+#define SYSTEM_COMB_TIMING_ERR_CNT_HVT_SITE3_S  0
+
+#define SYSTEM_DATE_REG          (DR_REG_SYSTEM_BASE + 0xFFC)
+/* SYSTEM_DATE : R/W ;bitpos:[27:0] ;default: 28'h2101220 ; */
+/*description: .*/
+#define SYSTEM_DATE    0x0FFFFFFF
+#define SYSTEM_DATE_M  ((SYSTEM_DATE_V)<<(SYSTEM_DATE_S))
+#define SYSTEM_DATE_V  0xFFFFFFF
+#define SYSTEM_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SYSTEM_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/system_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/system_struct.h
new file mode 100644
index 00000000000..6c4ce1f1182
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/system_struct.h
@@ -0,0 +1,1420 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_SYSTEM_STRUCT_H_
+#define _SOC_SYSTEM_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct system_dev_s {
+    union {
+        struct {
+            uint32_t control_core_1_runstall       :    1;
+            uint32_t control_core_1_clkgate_en     :    1;
+            uint32_t control_core_1_reseting       :    1;
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } core_1_control_0;
+    uint32_t core_1_control_1;
+    union {
+        struct {
+            uint32_t reserved0                     :    6;
+            uint32_t clk_en_assist_debug           :    1;
+            uint32_t clk_en_dedicated_gpio         :    1;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } cpu_peri_clk_en;
+    union {
+        struct {
+            uint32_t reserved0                     :    6;
+            uint32_t rst_en_assist_debug           :    1;
+            uint32_t rst_en_dedicated_gpio         :    1;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } cpu_peri_rst_en;
+    union {
+        struct {
+            uint32_t cpuperiod_sel                 :    2;
+            uint32_t pll_freq_sel                  :    1;
+            uint32_t cpu_wait_mode_force_on        :    1;
+            uint32_t cpu_waiti_delay_num           :    4;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } cpu_per_conf;
+    union {
+        struct {
+            uint32_t lslp_mem_pd_mask              :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } mem_pd_mask;
+    union {
+        struct {
+            uint32_t timers_clk_en                 :    1;
+            uint32_t spi01_clk_en                  :    1;
+            uint32_t uart_clk_en                   :    1;
+            uint32_t wdg_clk_en                    :    1;
+            uint32_t i2s0_clk_en                   :    1;
+            uint32_t uart1_clk_en                  :    1;
+            uint32_t spi2_clk_en                   :    1;
+            uint32_t i2c_ext0_clk_en               :    1;
+            uint32_t uhci0_clk_en                  :    1;
+            uint32_t rmt_clk_en                    :    1;
+            uint32_t pcnt_clk_en                   :    1;
+            uint32_t ledc_clk_en                   :    1;
+            uint32_t uhci1_clk_en                  :    1;
+            uint32_t timergroup_clk_en             :    1;
+            uint32_t efuse_clk_en                  :    1;
+            uint32_t timergroup1_clk_en            :    1;
+            uint32_t spi3_clk_en                   :    1;
+            uint32_t pwm0_clk_en                   :    1;
+            uint32_t i2c_ext1_clk_en               :    1;
+            uint32_t can_clk_en                    :    1;
+            uint32_t pwm1_clk_en                   :    1;
+            uint32_t i2s1_clk_en                   :    1;
+            uint32_t spi2_dma_clk_en               :    1;
+            uint32_t usb_clk_en                    :    1;
+            uint32_t uart_mem_clk_en               :    1;
+            uint32_t pwm2_clk_en                   :    1;
+            uint32_t pwm3_clk_en                   :    1;
+            uint32_t spi3_dma_clk_en               :    1;
+            uint32_t apb_saradc_clk_en             :    1;
+            uint32_t systimer_clk_en               :    1;
+            uint32_t adc2_arb_clk_en               :    1;
+            uint32_t spi4_clk_en                   :    1;
+        };
+        uint32_t val;
+    } perip_clk_en0;
+    union {
+        struct {
+            uint32_t peri_backup_clk_en            :    1;
+            uint32_t crypto_aes_clk_en             :    1;
+            uint32_t crypto_sha_clk_en             :    1;
+            uint32_t crypto_rsa_clk_en             :    1;
+            uint32_t crypto_ds_clk_en              :    1;
+            uint32_t crypto_hmac_clk_en            :    1;
+            uint32_t dma_clk_en                    :    1;
+            uint32_t sdio_host_clk_en              :    1;
+            uint32_t lcd_cam_clk_en                :    1;
+            uint32_t uart2_clk_en                  :    1;
+            uint32_t usb_device_clk_en             :    1;
+            uint32_t reserved11                    :    21;
+        };
+        uint32_t val;
+    } perip_clk_en1;
+    union {
+        struct {
+            uint32_t timers_rst                    :    1;
+            uint32_t spi01_rst                     :    1;
+            uint32_t uart_rst                      :    1;
+            uint32_t wdg_rst                       :    1;
+            uint32_t i2s0_rst                      :    1;
+            uint32_t uart1_rst                     :    1;
+            uint32_t spi2_rst                      :    1;
+            uint32_t i2c_ext0_rst                  :    1;
+            uint32_t uhci0_rst                     :    1;
+            uint32_t rmt_rst                       :    1;
+            uint32_t pcnt_rst                      :    1;
+            uint32_t ledc_rst                      :    1;
+            uint32_t uhci1_rst                     :    1;
+            uint32_t timergroup_rst                :    1;
+            uint32_t efuse_rst                     :    1;
+            uint32_t timergroup1_rst               :    1;
+            uint32_t spi3_rst                      :    1;
+            uint32_t pwm0_rst                      :    1;
+            uint32_t i2c_ext1_rst                  :    1;
+            uint32_t can_rst                       :    1;
+            uint32_t pwm1_rst                      :    1;
+            uint32_t i2s1_rst                      :    1;
+            uint32_t spi2_dma_rst                  :    1;
+            uint32_t usb_rst                       :    1;
+            uint32_t uart_mem_rst                  :    1;
+            uint32_t pwm2_rst                      :    1;
+            uint32_t pwm3_rst                      :    1;
+            uint32_t spi3_dma_rst                  :    1;
+            uint32_t apb_saradc_rst                :    1;
+            uint32_t systimer_rst                  :    1;
+            uint32_t adc2_arb_rst                  :    1;
+            uint32_t spi4_rst                      :    1;
+        };
+        uint32_t val;
+    } perip_rst_en0;
+    union {
+        struct {
+            uint32_t peri_backup_rst               :    1;
+            uint32_t crypto_aes_rst                :    1;
+            uint32_t crypto_sha_rst                :    1;
+            uint32_t crypto_rsa_rst                :    1;
+            uint32_t crypto_ds_rst                 :    1;
+            uint32_t crypto_hmac_rst               :    1;
+            uint32_t dma_rst                       :    1;
+            uint32_t sdio_host_rst                 :    1;
+            uint32_t lcd_cam_rst                   :    1;
+            uint32_t uart2_rst                     :    1;
+            uint32_t usb_device_rst                :    1;
+            uint32_t reserved11                    :    21;
+        };
+        uint32_t val;
+    } perip_rst_en1;
+    union {
+        struct {
+            uint32_t bt_lpck_div_num               :    12;
+            uint32_t reserved12                    :    20;
+        };
+        uint32_t val;
+    } bt_lpck_div_int;
+    union {
+        struct {
+            uint32_t bt_lpck_div_b                 :    12;
+            uint32_t bt_lpck_div_a                 :    12;
+            uint32_t lpclk_sel_rtc_slow            :    1;
+            uint32_t lpclk_sel_8m                  :    1;
+            uint32_t lpclk_sel_xtal                :    1;
+            uint32_t lpclk_sel_xtal32k             :    1;
+            uint32_t lpclk_rtc_en                  :    1;
+            uint32_t reserved29                    :    3;
+        };
+        uint32_t val;
+    } bt_lpck_div_frac;
+    union {
+        struct {
+            uint32_t cpu_intr_from_cpu_0           :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } cpu_intr_from_cpu_0;
+    union {
+        struct {
+            uint32_t cpu_intr_from_cpu_1           :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } cpu_intr_from_cpu_1;
+    union {
+        struct {
+            uint32_t cpu_intr_from_cpu_2           :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } cpu_intr_from_cpu_2;
+    union {
+        struct {
+            uint32_t cpu_intr_from_cpu_3           :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } cpu_intr_from_cpu_3;
+    union {
+        struct {
+            uint32_t rsa_mem_pd                    :    1;
+            uint32_t rsa_mem_force_pu              :    1;
+            uint32_t rsa_mem_force_pd              :    1;
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } rsa_pd_ctrl;
+    union {
+        struct {
+            uint32_t edma_clk_on                   :    1;
+            uint32_t edma_reset                    :    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } edma_ctrl;
+    union {
+        struct {
+            uint32_t icache_clk_on                 :    1;
+            uint32_t icache_reset                  :    1;
+            uint32_t dcache_clk_on                 :    1;
+            uint32_t dcache_reset                  :    1;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } cache_control;
+    union {
+        struct {
+            uint32_t enable_spi_manual_encrypt     :    1;
+            uint32_t enable_download_db_encrypt    :    1;
+            uint32_t enable_download_g0cb_decrypt  :    1;
+            uint32_t enable_download_manual_encrypt:    1;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } external_device_encrypt_decrypt_control;
+    union {
+        struct {
+            uint32_t reserved0                     :    8;
+            uint32_t rtc_mem_crc_start             :    1;
+            uint32_t rtc_mem_crc_addr              :    11;
+            uint32_t rtc_mem_crc_len               :    11;
+            uint32_t rtc_mem_crc_finish            :    1;
+        };
+        uint32_t val;
+    } rtc_fastmem_config;
+    uint32_t rtc_fastmem_crc;
+    union {
+        struct {
+            uint32_t redundant_eco_drive           :    1;
+            uint32_t redundant_eco_result          :    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } redundant_eco_ctrl;
+    union {
+        struct {
+            uint32_t clk_en                        :    1;
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } clock_gate;
+    union {
+        struct {
+            uint32_t pre_div_cnt                   :    10;
+            uint32_t soc_clk_sel                   :    2;
+            uint32_t clk_xtal_freq                 :    7;
+            uint32_t clk_div_en                    :    1;
+            uint32_t reserved20                    :    12;
+        };
+        uint32_t val;
+    } sysclk_conf;
+    union {
+        struct {
+            uint32_t mem_path_len                  :    4;
+            uint32_t mem_err_cnt_clr               :    1;
+            uint32_t mem_pvt_monitor_en            :    1;
+            uint32_t mem_timing_err_cnt            :    16;
+            uint32_t mem_vt_sel                    :    2;
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } mem_pvt;
+    union {
+        struct {
+            uint32_t comb_path_len_lvt             :    5;
+            uint32_t comb_err_cnt_clr_lvt          :    1;
+            uint32_t comb_pvt_monitor_en_lvt       :    1;
+            uint32_t reserved7                     :    18;
+            uint32_t reserved25                    :    7;
+        };
+        uint32_t val;
+    } comb_pvt_lvt_conf;
+    union {
+        struct {
+            uint32_t comb_path_len_nvt             :    5;
+            uint32_t comb_err_cnt_clr_nvt          :    1;
+            uint32_t comb_pvt_monitor_en_nvt       :    1;
+            uint32_t reserved7                     :    18;
+            uint32_t reserved25                    :    7;
+        };
+        uint32_t val;
+    } comb_pvt_nvt_conf;
+    union {
+        struct {
+            uint32_t comb_path_len_hvt             :    5;
+            uint32_t comb_err_cnt_clr_hvt          :    1;
+            uint32_t comb_pvt_monitor_en_hvt       :    1;
+            uint32_t reserved7                     :    18;
+            uint32_t reserved25                    :    7;
+        };
+        uint32_t val;
+    } comb_pvt_hvt_conf;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_lvt_site0 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_lvt_site0;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_nvt_site0 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_nvt_site0;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_hvt_site0 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_hvt_site0;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_lvt_site1 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_lvt_site1;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_nvt_site1 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_nvt_site1;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_hvt_site1 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_hvt_site1;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_lvt_site2 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_lvt_site2;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_nvt_site2 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_nvt_site2;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_hvt_site2 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_hvt_site2;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_lvt_site3 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_lvt_site3;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_nvt_site3 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_nvt_site3;
+    union {
+        struct {
+            uint32_t comb_timing_err_cnt_hvt_site3 :    16;
+            uint32_t reserved16                    :    16;
+        };
+        uint32_t val;
+    } comb_pvt_err_hvt_site3;
+    uint32_t reserved_a4;
+    uint32_t reserved_a8;
+    uint32_t reserved_ac;
+    uint32_t reserved_b0;
+    uint32_t reserved_b4;
+    uint32_t reserved_b8;
+    uint32_t reserved_bc;
+    uint32_t reserved_c0;
+    uint32_t reserved_c4;
+    uint32_t reserved_c8;
+    uint32_t reserved_cc;
+    uint32_t reserved_d0;
+    uint32_t reserved_d4;
+    uint32_t reserved_d8;
+    uint32_t reserved_dc;
+    uint32_t reserved_e0;
+    uint32_t reserved_e4;
+    uint32_t reserved_e8;
+    uint32_t reserved_ec;
+    uint32_t reserved_f0;
+    uint32_t reserved_f4;
+    uint32_t reserved_f8;
+    uint32_t reserved_fc;
+    uint32_t reserved_100;
+    uint32_t reserved_104;
+    uint32_t reserved_108;
+    uint32_t reserved_10c;
+    uint32_t reserved_110;
+    uint32_t reserved_114;
+    uint32_t reserved_118;
+    uint32_t reserved_11c;
+    uint32_t reserved_120;
+    uint32_t reserved_124;
+    uint32_t reserved_128;
+    uint32_t reserved_12c;
+    uint32_t reserved_130;
+    uint32_t reserved_134;
+    uint32_t reserved_138;
+    uint32_t reserved_13c;
+    uint32_t reserved_140;
+    uint32_t reserved_144;
+    uint32_t reserved_148;
+    uint32_t reserved_14c;
+    uint32_t reserved_150;
+    uint32_t reserved_154;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    uint32_t reserved_1fc;
+    uint32_t reserved_200;
+    uint32_t reserved_204;
+    uint32_t reserved_208;
+    uint32_t reserved_20c;
+    uint32_t reserved_210;
+    uint32_t reserved_214;
+    uint32_t reserved_218;
+    uint32_t reserved_21c;
+    uint32_t reserved_220;
+    uint32_t reserved_224;
+    uint32_t reserved_228;
+    uint32_t reserved_22c;
+    uint32_t reserved_230;
+    uint32_t reserved_234;
+    uint32_t reserved_238;
+    uint32_t reserved_23c;
+    uint32_t reserved_240;
+    uint32_t reserved_244;
+    uint32_t reserved_248;
+    uint32_t reserved_24c;
+    uint32_t reserved_250;
+    uint32_t reserved_254;
+    uint32_t reserved_258;
+    uint32_t reserved_25c;
+    uint32_t reserved_260;
+    uint32_t reserved_264;
+    uint32_t reserved_268;
+    uint32_t reserved_26c;
+    uint32_t reserved_270;
+    uint32_t reserved_274;
+    uint32_t reserved_278;
+    uint32_t reserved_27c;
+    uint32_t reserved_280;
+    uint32_t reserved_284;
+    uint32_t reserved_288;
+    uint32_t reserved_28c;
+    uint32_t reserved_290;
+    uint32_t reserved_294;
+    uint32_t reserved_298;
+    uint32_t reserved_29c;
+    uint32_t reserved_2a0;
+    uint32_t reserved_2a4;
+    uint32_t reserved_2a8;
+    uint32_t reserved_2ac;
+    uint32_t reserved_2b0;
+    uint32_t reserved_2b4;
+    uint32_t reserved_2b8;
+    uint32_t reserved_2bc;
+    uint32_t reserved_2c0;
+    uint32_t reserved_2c4;
+    uint32_t reserved_2c8;
+    uint32_t reserved_2cc;
+    uint32_t reserved_2d0;
+    uint32_t reserved_2d4;
+    uint32_t reserved_2d8;
+    uint32_t reserved_2dc;
+    uint32_t reserved_2e0;
+    uint32_t reserved_2e4;
+    uint32_t reserved_2e8;
+    uint32_t reserved_2ec;
+    uint32_t reserved_2f0;
+    uint32_t reserved_2f4;
+    uint32_t reserved_2f8;
+    uint32_t reserved_2fc;
+    uint32_t reserved_300;
+    uint32_t reserved_304;
+    uint32_t reserved_308;
+    uint32_t reserved_30c;
+    uint32_t reserved_310;
+    uint32_t reserved_314;
+    uint32_t reserved_318;
+    uint32_t reserved_31c;
+    uint32_t reserved_320;
+    uint32_t reserved_324;
+    uint32_t reserved_328;
+    uint32_t reserved_32c;
+    uint32_t reserved_330;
+    uint32_t reserved_334;
+    uint32_t reserved_338;
+    uint32_t reserved_33c;
+    uint32_t reserved_340;
+    uint32_t reserved_344;
+    uint32_t reserved_348;
+    uint32_t reserved_34c;
+    uint32_t reserved_350;
+    uint32_t reserved_354;
+    uint32_t reserved_358;
+    uint32_t reserved_35c;
+    uint32_t reserved_360;
+    uint32_t reserved_364;
+    uint32_t reserved_368;
+    uint32_t reserved_36c;
+    uint32_t reserved_370;
+    uint32_t reserved_374;
+    uint32_t reserved_378;
+    uint32_t reserved_37c;
+    uint32_t reserved_380;
+    uint32_t reserved_384;
+    uint32_t reserved_388;
+    uint32_t reserved_38c;
+    uint32_t reserved_390;
+    uint32_t reserved_394;
+    uint32_t reserved_398;
+    uint32_t reserved_39c;
+    uint32_t reserved_3a0;
+    uint32_t reserved_3a4;
+    uint32_t reserved_3a8;
+    uint32_t reserved_3ac;
+    uint32_t reserved_3b0;
+    uint32_t reserved_3b4;
+    uint32_t reserved_3b8;
+    uint32_t reserved_3bc;
+    uint32_t reserved_3c0;
+    uint32_t reserved_3c4;
+    uint32_t reserved_3c8;
+    uint32_t reserved_3cc;
+    uint32_t reserved_3d0;
+    uint32_t reserved_3d4;
+    uint32_t reserved_3d8;
+    uint32_t reserved_3dc;
+    uint32_t reserved_3e0;
+    uint32_t reserved_3e4;
+    uint32_t reserved_3e8;
+    uint32_t reserved_3ec;
+    uint32_t reserved_3f0;
+    uint32_t reserved_3f4;
+    uint32_t reserved_3f8;
+    uint32_t reserved_3fc;
+    uint32_t reserved_400;
+    uint32_t reserved_404;
+    uint32_t reserved_408;
+    uint32_t reserved_40c;
+    uint32_t reserved_410;
+    uint32_t reserved_414;
+    uint32_t reserved_418;
+    uint32_t reserved_41c;
+    uint32_t reserved_420;
+    uint32_t reserved_424;
+    uint32_t reserved_428;
+    uint32_t reserved_42c;
+    uint32_t reserved_430;
+    uint32_t reserved_434;
+    uint32_t reserved_438;
+    uint32_t reserved_43c;
+    uint32_t reserved_440;
+    uint32_t reserved_444;
+    uint32_t reserved_448;
+    uint32_t reserved_44c;
+    uint32_t reserved_450;
+    uint32_t reserved_454;
+    uint32_t reserved_458;
+    uint32_t reserved_45c;
+    uint32_t reserved_460;
+    uint32_t reserved_464;
+    uint32_t reserved_468;
+    uint32_t reserved_46c;
+    uint32_t reserved_470;
+    uint32_t reserved_474;
+    uint32_t reserved_478;
+    uint32_t reserved_47c;
+    uint32_t reserved_480;
+    uint32_t reserved_484;
+    uint32_t reserved_488;
+    uint32_t reserved_48c;
+    uint32_t reserved_490;
+    uint32_t reserved_494;
+    uint32_t reserved_498;
+    uint32_t reserved_49c;
+    uint32_t reserved_4a0;
+    uint32_t reserved_4a4;
+    uint32_t reserved_4a8;
+    uint32_t reserved_4ac;
+    uint32_t reserved_4b0;
+    uint32_t reserved_4b4;
+    uint32_t reserved_4b8;
+    uint32_t reserved_4bc;
+    uint32_t reserved_4c0;
+    uint32_t reserved_4c4;
+    uint32_t reserved_4c8;
+    uint32_t reserved_4cc;
+    uint32_t reserved_4d0;
+    uint32_t reserved_4d4;
+    uint32_t reserved_4d8;
+    uint32_t reserved_4dc;
+    uint32_t reserved_4e0;
+    uint32_t reserved_4e4;
+    uint32_t reserved_4e8;
+    uint32_t reserved_4ec;
+    uint32_t reserved_4f0;
+    uint32_t reserved_4f4;
+    uint32_t reserved_4f8;
+    uint32_t reserved_4fc;
+    uint32_t reserved_500;
+    uint32_t reserved_504;
+    uint32_t reserved_508;
+    uint32_t reserved_50c;
+    uint32_t reserved_510;
+    uint32_t reserved_514;
+    uint32_t reserved_518;
+    uint32_t reserved_51c;
+    uint32_t reserved_520;
+    uint32_t reserved_524;
+    uint32_t reserved_528;
+    uint32_t reserved_52c;
+    uint32_t reserved_530;
+    uint32_t reserved_534;
+    uint32_t reserved_538;
+    uint32_t reserved_53c;
+    uint32_t reserved_540;
+    uint32_t reserved_544;
+    uint32_t reserved_548;
+    uint32_t reserved_54c;
+    uint32_t reserved_550;
+    uint32_t reserved_554;
+    uint32_t reserved_558;
+    uint32_t reserved_55c;
+    uint32_t reserved_560;
+    uint32_t reserved_564;
+    uint32_t reserved_568;
+    uint32_t reserved_56c;
+    uint32_t reserved_570;
+    uint32_t reserved_574;
+    uint32_t reserved_578;
+    uint32_t reserved_57c;
+    uint32_t reserved_580;
+    uint32_t reserved_584;
+    uint32_t reserved_588;
+    uint32_t reserved_58c;
+    uint32_t reserved_590;
+    uint32_t reserved_594;
+    uint32_t reserved_598;
+    uint32_t reserved_59c;
+    uint32_t reserved_5a0;
+    uint32_t reserved_5a4;
+    uint32_t reserved_5a8;
+    uint32_t reserved_5ac;
+    uint32_t reserved_5b0;
+    uint32_t reserved_5b4;
+    uint32_t reserved_5b8;
+    uint32_t reserved_5bc;
+    uint32_t reserved_5c0;
+    uint32_t reserved_5c4;
+    uint32_t reserved_5c8;
+    uint32_t reserved_5cc;
+    uint32_t reserved_5d0;
+    uint32_t reserved_5d4;
+    uint32_t reserved_5d8;
+    uint32_t reserved_5dc;
+    uint32_t reserved_5e0;
+    uint32_t reserved_5e4;
+    uint32_t reserved_5e8;
+    uint32_t reserved_5ec;
+    uint32_t reserved_5f0;
+    uint32_t reserved_5f4;
+    uint32_t reserved_5f8;
+    uint32_t reserved_5fc;
+    uint32_t reserved_600;
+    uint32_t reserved_604;
+    uint32_t reserved_608;
+    uint32_t reserved_60c;
+    uint32_t reserved_610;
+    uint32_t reserved_614;
+    uint32_t reserved_618;
+    uint32_t reserved_61c;
+    uint32_t reserved_620;
+    uint32_t reserved_624;
+    uint32_t reserved_628;
+    uint32_t reserved_62c;
+    uint32_t reserved_630;
+    uint32_t reserved_634;
+    uint32_t reserved_638;
+    uint32_t reserved_63c;
+    uint32_t reserved_640;
+    uint32_t reserved_644;
+    uint32_t reserved_648;
+    uint32_t reserved_64c;
+    uint32_t reserved_650;
+    uint32_t reserved_654;
+    uint32_t reserved_658;
+    uint32_t reserved_65c;
+    uint32_t reserved_660;
+    uint32_t reserved_664;
+    uint32_t reserved_668;
+    uint32_t reserved_66c;
+    uint32_t reserved_670;
+    uint32_t reserved_674;
+    uint32_t reserved_678;
+    uint32_t reserved_67c;
+    uint32_t reserved_680;
+    uint32_t reserved_684;
+    uint32_t reserved_688;
+    uint32_t reserved_68c;
+    uint32_t reserved_690;
+    uint32_t reserved_694;
+    uint32_t reserved_698;
+    uint32_t reserved_69c;
+    uint32_t reserved_6a0;
+    uint32_t reserved_6a4;
+    uint32_t reserved_6a8;
+    uint32_t reserved_6ac;
+    uint32_t reserved_6b0;
+    uint32_t reserved_6b4;
+    uint32_t reserved_6b8;
+    uint32_t reserved_6bc;
+    uint32_t reserved_6c0;
+    uint32_t reserved_6c4;
+    uint32_t reserved_6c8;
+    uint32_t reserved_6cc;
+    uint32_t reserved_6d0;
+    uint32_t reserved_6d4;
+    uint32_t reserved_6d8;
+    uint32_t reserved_6dc;
+    uint32_t reserved_6e0;
+    uint32_t reserved_6e4;
+    uint32_t reserved_6e8;
+    uint32_t reserved_6ec;
+    uint32_t reserved_6f0;
+    uint32_t reserved_6f4;
+    uint32_t reserved_6f8;
+    uint32_t reserved_6fc;
+    uint32_t reserved_700;
+    uint32_t reserved_704;
+    uint32_t reserved_708;
+    uint32_t reserved_70c;
+    uint32_t reserved_710;
+    uint32_t reserved_714;
+    uint32_t reserved_718;
+    uint32_t reserved_71c;
+    uint32_t reserved_720;
+    uint32_t reserved_724;
+    uint32_t reserved_728;
+    uint32_t reserved_72c;
+    uint32_t reserved_730;
+    uint32_t reserved_734;
+    uint32_t reserved_738;
+    uint32_t reserved_73c;
+    uint32_t reserved_740;
+    uint32_t reserved_744;
+    uint32_t reserved_748;
+    uint32_t reserved_74c;
+    uint32_t reserved_750;
+    uint32_t reserved_754;
+    uint32_t reserved_758;
+    uint32_t reserved_75c;
+    uint32_t reserved_760;
+    uint32_t reserved_764;
+    uint32_t reserved_768;
+    uint32_t reserved_76c;
+    uint32_t reserved_770;
+    uint32_t reserved_774;
+    uint32_t reserved_778;
+    uint32_t reserved_77c;
+    uint32_t reserved_780;
+    uint32_t reserved_784;
+    uint32_t reserved_788;
+    uint32_t reserved_78c;
+    uint32_t reserved_790;
+    uint32_t reserved_794;
+    uint32_t reserved_798;
+    uint32_t reserved_79c;
+    uint32_t reserved_7a0;
+    uint32_t reserved_7a4;
+    uint32_t reserved_7a8;
+    uint32_t reserved_7ac;
+    uint32_t reserved_7b0;
+    uint32_t reserved_7b4;
+    uint32_t reserved_7b8;
+    uint32_t reserved_7bc;
+    uint32_t reserved_7c0;
+    uint32_t reserved_7c4;
+    uint32_t reserved_7c8;
+    uint32_t reserved_7cc;
+    uint32_t reserved_7d0;
+    uint32_t reserved_7d4;
+    uint32_t reserved_7d8;
+    uint32_t reserved_7dc;
+    uint32_t reserved_7e0;
+    uint32_t reserved_7e4;
+    uint32_t reserved_7e8;
+    uint32_t reserved_7ec;
+    uint32_t reserved_7f0;
+    uint32_t reserved_7f4;
+    uint32_t reserved_7f8;
+    uint32_t reserved_7fc;
+    uint32_t reserved_800;
+    uint32_t reserved_804;
+    uint32_t reserved_808;
+    uint32_t reserved_80c;
+    uint32_t reserved_810;
+    uint32_t reserved_814;
+    uint32_t reserved_818;
+    uint32_t reserved_81c;
+    uint32_t reserved_820;
+    uint32_t reserved_824;
+    uint32_t reserved_828;
+    uint32_t reserved_82c;
+    uint32_t reserved_830;
+    uint32_t reserved_834;
+    uint32_t reserved_838;
+    uint32_t reserved_83c;
+    uint32_t reserved_840;
+    uint32_t reserved_844;
+    uint32_t reserved_848;
+    uint32_t reserved_84c;
+    uint32_t reserved_850;
+    uint32_t reserved_854;
+    uint32_t reserved_858;
+    uint32_t reserved_85c;
+    uint32_t reserved_860;
+    uint32_t reserved_864;
+    uint32_t reserved_868;
+    uint32_t reserved_86c;
+    uint32_t reserved_870;
+    uint32_t reserved_874;
+    uint32_t reserved_878;
+    uint32_t reserved_87c;
+    uint32_t reserved_880;
+    uint32_t reserved_884;
+    uint32_t reserved_888;
+    uint32_t reserved_88c;
+    uint32_t reserved_890;
+    uint32_t reserved_894;
+    uint32_t reserved_898;
+    uint32_t reserved_89c;
+    uint32_t reserved_8a0;
+    uint32_t reserved_8a4;
+    uint32_t reserved_8a8;
+    uint32_t reserved_8ac;
+    uint32_t reserved_8b0;
+    uint32_t reserved_8b4;
+    uint32_t reserved_8b8;
+    uint32_t reserved_8bc;
+    uint32_t reserved_8c0;
+    uint32_t reserved_8c4;
+    uint32_t reserved_8c8;
+    uint32_t reserved_8cc;
+    uint32_t reserved_8d0;
+    uint32_t reserved_8d4;
+    uint32_t reserved_8d8;
+    uint32_t reserved_8dc;
+    uint32_t reserved_8e0;
+    uint32_t reserved_8e4;
+    uint32_t reserved_8e8;
+    uint32_t reserved_8ec;
+    uint32_t reserved_8f0;
+    uint32_t reserved_8f4;
+    uint32_t reserved_8f8;
+    uint32_t reserved_8fc;
+    uint32_t reserved_900;
+    uint32_t reserved_904;
+    uint32_t reserved_908;
+    uint32_t reserved_90c;
+    uint32_t reserved_910;
+    uint32_t reserved_914;
+    uint32_t reserved_918;
+    uint32_t reserved_91c;
+    uint32_t reserved_920;
+    uint32_t reserved_924;
+    uint32_t reserved_928;
+    uint32_t reserved_92c;
+    uint32_t reserved_930;
+    uint32_t reserved_934;
+    uint32_t reserved_938;
+    uint32_t reserved_93c;
+    uint32_t reserved_940;
+    uint32_t reserved_944;
+    uint32_t reserved_948;
+    uint32_t reserved_94c;
+    uint32_t reserved_950;
+    uint32_t reserved_954;
+    uint32_t reserved_958;
+    uint32_t reserved_95c;
+    uint32_t reserved_960;
+    uint32_t reserved_964;
+    uint32_t reserved_968;
+    uint32_t reserved_96c;
+    uint32_t reserved_970;
+    uint32_t reserved_974;
+    uint32_t reserved_978;
+    uint32_t reserved_97c;
+    uint32_t reserved_980;
+    uint32_t reserved_984;
+    uint32_t reserved_988;
+    uint32_t reserved_98c;
+    uint32_t reserved_990;
+    uint32_t reserved_994;
+    uint32_t reserved_998;
+    uint32_t reserved_99c;
+    uint32_t reserved_9a0;
+    uint32_t reserved_9a4;
+    uint32_t reserved_9a8;
+    uint32_t reserved_9ac;
+    uint32_t reserved_9b0;
+    uint32_t reserved_9b4;
+    uint32_t reserved_9b8;
+    uint32_t reserved_9bc;
+    uint32_t reserved_9c0;
+    uint32_t reserved_9c4;
+    uint32_t reserved_9c8;
+    uint32_t reserved_9cc;
+    uint32_t reserved_9d0;
+    uint32_t reserved_9d4;
+    uint32_t reserved_9d8;
+    uint32_t reserved_9dc;
+    uint32_t reserved_9e0;
+    uint32_t reserved_9e4;
+    uint32_t reserved_9e8;
+    uint32_t reserved_9ec;
+    uint32_t reserved_9f0;
+    uint32_t reserved_9f4;
+    uint32_t reserved_9f8;
+    uint32_t reserved_9fc;
+    uint32_t reserved_a00;
+    uint32_t reserved_a04;
+    uint32_t reserved_a08;
+    uint32_t reserved_a0c;
+    uint32_t reserved_a10;
+    uint32_t reserved_a14;
+    uint32_t reserved_a18;
+    uint32_t reserved_a1c;
+    uint32_t reserved_a20;
+    uint32_t reserved_a24;
+    uint32_t reserved_a28;
+    uint32_t reserved_a2c;
+    uint32_t reserved_a30;
+    uint32_t reserved_a34;
+    uint32_t reserved_a38;
+    uint32_t reserved_a3c;
+    uint32_t reserved_a40;
+    uint32_t reserved_a44;
+    uint32_t reserved_a48;
+    uint32_t reserved_a4c;
+    uint32_t reserved_a50;
+    uint32_t reserved_a54;
+    uint32_t reserved_a58;
+    uint32_t reserved_a5c;
+    uint32_t reserved_a60;
+    uint32_t reserved_a64;
+    uint32_t reserved_a68;
+    uint32_t reserved_a6c;
+    uint32_t reserved_a70;
+    uint32_t reserved_a74;
+    uint32_t reserved_a78;
+    uint32_t reserved_a7c;
+    uint32_t reserved_a80;
+    uint32_t reserved_a84;
+    uint32_t reserved_a88;
+    uint32_t reserved_a8c;
+    uint32_t reserved_a90;
+    uint32_t reserved_a94;
+    uint32_t reserved_a98;
+    uint32_t reserved_a9c;
+    uint32_t reserved_aa0;
+    uint32_t reserved_aa4;
+    uint32_t reserved_aa8;
+    uint32_t reserved_aac;
+    uint32_t reserved_ab0;
+    uint32_t reserved_ab4;
+    uint32_t reserved_ab8;
+    uint32_t reserved_abc;
+    uint32_t reserved_ac0;
+    uint32_t reserved_ac4;
+    uint32_t reserved_ac8;
+    uint32_t reserved_acc;
+    uint32_t reserved_ad0;
+    uint32_t reserved_ad4;
+    uint32_t reserved_ad8;
+    uint32_t reserved_adc;
+    uint32_t reserved_ae0;
+    uint32_t reserved_ae4;
+    uint32_t reserved_ae8;
+    uint32_t reserved_aec;
+    uint32_t reserved_af0;
+    uint32_t reserved_af4;
+    uint32_t reserved_af8;
+    uint32_t reserved_afc;
+    uint32_t reserved_b00;
+    uint32_t reserved_b04;
+    uint32_t reserved_b08;
+    uint32_t reserved_b0c;
+    uint32_t reserved_b10;
+    uint32_t reserved_b14;
+    uint32_t reserved_b18;
+    uint32_t reserved_b1c;
+    uint32_t reserved_b20;
+    uint32_t reserved_b24;
+    uint32_t reserved_b28;
+    uint32_t reserved_b2c;
+    uint32_t reserved_b30;
+    uint32_t reserved_b34;
+    uint32_t reserved_b38;
+    uint32_t reserved_b3c;
+    uint32_t reserved_b40;
+    uint32_t reserved_b44;
+    uint32_t reserved_b48;
+    uint32_t reserved_b4c;
+    uint32_t reserved_b50;
+    uint32_t reserved_b54;
+    uint32_t reserved_b58;
+    uint32_t reserved_b5c;
+    uint32_t reserved_b60;
+    uint32_t reserved_b64;
+    uint32_t reserved_b68;
+    uint32_t reserved_b6c;
+    uint32_t reserved_b70;
+    uint32_t reserved_b74;
+    uint32_t reserved_b78;
+    uint32_t reserved_b7c;
+    uint32_t reserved_b80;
+    uint32_t reserved_b84;
+    uint32_t reserved_b88;
+    uint32_t reserved_b8c;
+    uint32_t reserved_b90;
+    uint32_t reserved_b94;
+    uint32_t reserved_b98;
+    uint32_t reserved_b9c;
+    uint32_t reserved_ba0;
+    uint32_t reserved_ba4;
+    uint32_t reserved_ba8;
+    uint32_t reserved_bac;
+    uint32_t reserved_bb0;
+    uint32_t reserved_bb4;
+    uint32_t reserved_bb8;
+    uint32_t reserved_bbc;
+    uint32_t reserved_bc0;
+    uint32_t reserved_bc4;
+    uint32_t reserved_bc8;
+    uint32_t reserved_bcc;
+    uint32_t reserved_bd0;
+    uint32_t reserved_bd4;
+    uint32_t reserved_bd8;
+    uint32_t reserved_bdc;
+    uint32_t reserved_be0;
+    uint32_t reserved_be4;
+    uint32_t reserved_be8;
+    uint32_t reserved_bec;
+    uint32_t reserved_bf0;
+    uint32_t reserved_bf4;
+    uint32_t reserved_bf8;
+    uint32_t reserved_bfc;
+    uint32_t reserved_c00;
+    uint32_t reserved_c04;
+    uint32_t reserved_c08;
+    uint32_t reserved_c0c;
+    uint32_t reserved_c10;
+    uint32_t reserved_c14;
+    uint32_t reserved_c18;
+    uint32_t reserved_c1c;
+    uint32_t reserved_c20;
+    uint32_t reserved_c24;
+    uint32_t reserved_c28;
+    uint32_t reserved_c2c;
+    uint32_t reserved_c30;
+    uint32_t reserved_c34;
+    uint32_t reserved_c38;
+    uint32_t reserved_c3c;
+    uint32_t reserved_c40;
+    uint32_t reserved_c44;
+    uint32_t reserved_c48;
+    uint32_t reserved_c4c;
+    uint32_t reserved_c50;
+    uint32_t reserved_c54;
+    uint32_t reserved_c58;
+    uint32_t reserved_c5c;
+    uint32_t reserved_c60;
+    uint32_t reserved_c64;
+    uint32_t reserved_c68;
+    uint32_t reserved_c6c;
+    uint32_t reserved_c70;
+    uint32_t reserved_c74;
+    uint32_t reserved_c78;
+    uint32_t reserved_c7c;
+    uint32_t reserved_c80;
+    uint32_t reserved_c84;
+    uint32_t reserved_c88;
+    uint32_t reserved_c8c;
+    uint32_t reserved_c90;
+    uint32_t reserved_c94;
+    uint32_t reserved_c98;
+    uint32_t reserved_c9c;
+    uint32_t reserved_ca0;
+    uint32_t reserved_ca4;
+    uint32_t reserved_ca8;
+    uint32_t reserved_cac;
+    uint32_t reserved_cb0;
+    uint32_t reserved_cb4;
+    uint32_t reserved_cb8;
+    uint32_t reserved_cbc;
+    uint32_t reserved_cc0;
+    uint32_t reserved_cc4;
+    uint32_t reserved_cc8;
+    uint32_t reserved_ccc;
+    uint32_t reserved_cd0;
+    uint32_t reserved_cd4;
+    uint32_t reserved_cd8;
+    uint32_t reserved_cdc;
+    uint32_t reserved_ce0;
+    uint32_t reserved_ce4;
+    uint32_t reserved_ce8;
+    uint32_t reserved_cec;
+    uint32_t reserved_cf0;
+    uint32_t reserved_cf4;
+    uint32_t reserved_cf8;
+    uint32_t reserved_cfc;
+    uint32_t reserved_d00;
+    uint32_t reserved_d04;
+    uint32_t reserved_d08;
+    uint32_t reserved_d0c;
+    uint32_t reserved_d10;
+    uint32_t reserved_d14;
+    uint32_t reserved_d18;
+    uint32_t reserved_d1c;
+    uint32_t reserved_d20;
+    uint32_t reserved_d24;
+    uint32_t reserved_d28;
+    uint32_t reserved_d2c;
+    uint32_t reserved_d30;
+    uint32_t reserved_d34;
+    uint32_t reserved_d38;
+    uint32_t reserved_d3c;
+    uint32_t reserved_d40;
+    uint32_t reserved_d44;
+    uint32_t reserved_d48;
+    uint32_t reserved_d4c;
+    uint32_t reserved_d50;
+    uint32_t reserved_d54;
+    uint32_t reserved_d58;
+    uint32_t reserved_d5c;
+    uint32_t reserved_d60;
+    uint32_t reserved_d64;
+    uint32_t reserved_d68;
+    uint32_t reserved_d6c;
+    uint32_t reserved_d70;
+    uint32_t reserved_d74;
+    uint32_t reserved_d78;
+    uint32_t reserved_d7c;
+    uint32_t reserved_d80;
+    uint32_t reserved_d84;
+    uint32_t reserved_d88;
+    uint32_t reserved_d8c;
+    uint32_t reserved_d90;
+    uint32_t reserved_d94;
+    uint32_t reserved_d98;
+    uint32_t reserved_d9c;
+    uint32_t reserved_da0;
+    uint32_t reserved_da4;
+    uint32_t reserved_da8;
+    uint32_t reserved_dac;
+    uint32_t reserved_db0;
+    uint32_t reserved_db4;
+    uint32_t reserved_db8;
+    uint32_t reserved_dbc;
+    uint32_t reserved_dc0;
+    uint32_t reserved_dc4;
+    uint32_t reserved_dc8;
+    uint32_t reserved_dcc;
+    uint32_t reserved_dd0;
+    uint32_t reserved_dd4;
+    uint32_t reserved_dd8;
+    uint32_t reserved_ddc;
+    uint32_t reserved_de0;
+    uint32_t reserved_de4;
+    uint32_t reserved_de8;
+    uint32_t reserved_dec;
+    uint32_t reserved_df0;
+    uint32_t reserved_df4;
+    uint32_t reserved_df8;
+    uint32_t reserved_dfc;
+    uint32_t reserved_e00;
+    uint32_t reserved_e04;
+    uint32_t reserved_e08;
+    uint32_t reserved_e0c;
+    uint32_t reserved_e10;
+    uint32_t reserved_e14;
+    uint32_t reserved_e18;
+    uint32_t reserved_e1c;
+    uint32_t reserved_e20;
+    uint32_t reserved_e24;
+    uint32_t reserved_e28;
+    uint32_t reserved_e2c;
+    uint32_t reserved_e30;
+    uint32_t reserved_e34;
+    uint32_t reserved_e38;
+    uint32_t reserved_e3c;
+    uint32_t reserved_e40;
+    uint32_t reserved_e44;
+    uint32_t reserved_e48;
+    uint32_t reserved_e4c;
+    uint32_t reserved_e50;
+    uint32_t reserved_e54;
+    uint32_t reserved_e58;
+    uint32_t reserved_e5c;
+    uint32_t reserved_e60;
+    uint32_t reserved_e64;
+    uint32_t reserved_e68;
+    uint32_t reserved_e6c;
+    uint32_t reserved_e70;
+    uint32_t reserved_e74;
+    uint32_t reserved_e78;
+    uint32_t reserved_e7c;
+    uint32_t reserved_e80;
+    uint32_t reserved_e84;
+    uint32_t reserved_e88;
+    uint32_t reserved_e8c;
+    uint32_t reserved_e90;
+    uint32_t reserved_e94;
+    uint32_t reserved_e98;
+    uint32_t reserved_e9c;
+    uint32_t reserved_ea0;
+    uint32_t reserved_ea4;
+    uint32_t reserved_ea8;
+    uint32_t reserved_eac;
+    uint32_t reserved_eb0;
+    uint32_t reserved_eb4;
+    uint32_t reserved_eb8;
+    uint32_t reserved_ebc;
+    uint32_t reserved_ec0;
+    uint32_t reserved_ec4;
+    uint32_t reserved_ec8;
+    uint32_t reserved_ecc;
+    uint32_t reserved_ed0;
+    uint32_t reserved_ed4;
+    uint32_t reserved_ed8;
+    uint32_t reserved_edc;
+    uint32_t reserved_ee0;
+    uint32_t reserved_ee4;
+    uint32_t reserved_ee8;
+    uint32_t reserved_eec;
+    uint32_t reserved_ef0;
+    uint32_t reserved_ef4;
+    uint32_t reserved_ef8;
+    uint32_t reserved_efc;
+    uint32_t reserved_f00;
+    uint32_t reserved_f04;
+    uint32_t reserved_f08;
+    uint32_t reserved_f0c;
+    uint32_t reserved_f10;
+    uint32_t reserved_f14;
+    uint32_t reserved_f18;
+    uint32_t reserved_f1c;
+    uint32_t reserved_f20;
+    uint32_t reserved_f24;
+    uint32_t reserved_f28;
+    uint32_t reserved_f2c;
+    uint32_t reserved_f30;
+    uint32_t reserved_f34;
+    uint32_t reserved_f38;
+    uint32_t reserved_f3c;
+    uint32_t reserved_f40;
+    uint32_t reserved_f44;
+    uint32_t reserved_f48;
+    uint32_t reserved_f4c;
+    uint32_t reserved_f50;
+    uint32_t reserved_f54;
+    uint32_t reserved_f58;
+    uint32_t reserved_f5c;
+    uint32_t reserved_f60;
+    uint32_t reserved_f64;
+    uint32_t reserved_f68;
+    uint32_t reserved_f6c;
+    uint32_t reserved_f70;
+    uint32_t reserved_f74;
+    uint32_t reserved_f78;
+    uint32_t reserved_f7c;
+    uint32_t reserved_f80;
+    uint32_t reserved_f84;
+    uint32_t reserved_f88;
+    uint32_t reserved_f8c;
+    uint32_t reserved_f90;
+    uint32_t reserved_f94;
+    uint32_t reserved_f98;
+    uint32_t reserved_f9c;
+    uint32_t reserved_fa0;
+    uint32_t reserved_fa4;
+    uint32_t reserved_fa8;
+    uint32_t reserved_fac;
+    uint32_t reserved_fb0;
+    uint32_t reserved_fb4;
+    uint32_t reserved_fb8;
+    uint32_t reserved_fbc;
+    uint32_t reserved_fc0;
+    uint32_t reserved_fc4;
+    uint32_t reserved_fc8;
+    uint32_t reserved_fcc;
+    uint32_t reserved_fd0;
+    uint32_t reserved_fd4;
+    uint32_t reserved_fd8;
+    uint32_t reserved_fdc;
+    uint32_t reserved_fe0;
+    uint32_t reserved_fe4;
+    uint32_t reserved_fe8;
+    uint32_t reserved_fec;
+    uint32_t reserved_ff0;
+    uint32_t reserved_ff4;
+    uint32_t reserved_ff8;
+    union {
+        struct {
+            uint32_t date                          :    28;
+            uint32_t reserved28                    :    4;
+        };
+        uint32_t val;
+    } date;
+} system_dev_t;
+extern system_dev_t SYSTEM;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_SYSTEM_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/systimer_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/systimer_reg.h
new file mode 100644
index 00000000000..869012065b0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/systimer_reg.h
@@ -0,0 +1,639 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** SYSTIMER_CONF_REG register
+ *  Configure system timer clock
+ */
+#define SYSTIMER_CONF_REG (DR_REG_SYSTIMER_BASE + 0x0)
+/** SYSTIMER_SYSTIMER_CLK_FO : R/W; bitpos: [0]; default: 0;
+ *  systimer clock force on
+ */
+#define SYSTIMER_SYSTIMER_CLK_FO    (BIT(0))
+#define SYSTIMER_SYSTIMER_CLK_FO_M  (SYSTIMER_SYSTIMER_CLK_FO_V << SYSTIMER_SYSTIMER_CLK_FO_S)
+#define SYSTIMER_SYSTIMER_CLK_FO_V  0x00000001
+#define SYSTIMER_SYSTIMER_CLK_FO_S  0
+/** SYSTIMER_TARGET2_WORK_EN : R/W; bitpos: [22]; default: 0;
+ *  target2 work enable
+ */
+#define SYSTIMER_TARGET2_WORK_EN    (BIT(22))
+#define SYSTIMER_TARGET2_WORK_EN_M  (SYSTIMER_TARGET2_WORK_EN_V << SYSTIMER_TARGET2_WORK_EN_S)
+#define SYSTIMER_TARGET2_WORK_EN_V  0x00000001
+#define SYSTIMER_TARGET2_WORK_EN_S  22
+/** SYSTIMER_TARGET1_WORK_EN : R/W; bitpos: [23]; default: 0;
+ *  target1 work enable
+ */
+#define SYSTIMER_TARGET1_WORK_EN    (BIT(23))
+#define SYSTIMER_TARGET1_WORK_EN_M  (SYSTIMER_TARGET1_WORK_EN_V << SYSTIMER_TARGET1_WORK_EN_S)
+#define SYSTIMER_TARGET1_WORK_EN_V  0x00000001
+#define SYSTIMER_TARGET1_WORK_EN_S  23
+/** SYSTIMER_TARGET0_WORK_EN : R/W; bitpos: [24]; default: 0;
+ *  target0 work enable
+ */
+#define SYSTIMER_TARGET0_WORK_EN    (BIT(24))
+#define SYSTIMER_TARGET0_WORK_EN_M  (SYSTIMER_TARGET0_WORK_EN_V << SYSTIMER_TARGET0_WORK_EN_S)
+#define SYSTIMER_TARGET0_WORK_EN_V  0x00000001
+#define SYSTIMER_TARGET0_WORK_EN_S  24
+/** SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN : R/W; bitpos: [25]; default: 1;
+ *  If timer unit1 is stalled when core1 stalled
+ */
+#define SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN    (BIT(25))
+#define SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN_M  (SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN_V << SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN_S)
+#define SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN_S  25
+/** SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN : R/W; bitpos: [26]; default: 1;
+ *  If timer unit1 is stalled when core0 stalled
+ */
+#define SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN    (BIT(26))
+#define SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN_M  (SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN_V << SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN_S)
+#define SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN_S  26
+/** SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN : R/W; bitpos: [27]; default: 0;
+ *  If timer unit0 is stalled when core1 stalled
+ */
+#define SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN    (BIT(27))
+#define SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN_M  (SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN_V << SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN_S)
+#define SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN_S  27
+/** SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN : R/W; bitpos: [28]; default: 0;
+ *  If timer unit0 is stalled when core0 stalled
+ */
+#define SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN    (BIT(28))
+#define SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN_M  (SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN_V << SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN_S)
+#define SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN_S  28
+/** SYSTIMER_TIMER_UNIT1_WORK_EN : R/W; bitpos: [29]; default: 0;
+ *  timer unit1 work enable
+ */
+#define SYSTIMER_TIMER_UNIT1_WORK_EN    (BIT(29))
+#define SYSTIMER_TIMER_UNIT1_WORK_EN_M  (SYSTIMER_TIMER_UNIT1_WORK_EN_V << SYSTIMER_TIMER_UNIT1_WORK_EN_S)
+#define SYSTIMER_TIMER_UNIT1_WORK_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_WORK_EN_S  29
+/** SYSTIMER_TIMER_UNIT0_WORK_EN : R/W; bitpos: [30]; default: 1;
+ *  timer unit0 work enable
+ */
+#define SYSTIMER_TIMER_UNIT0_WORK_EN    (BIT(30))
+#define SYSTIMER_TIMER_UNIT0_WORK_EN_M  (SYSTIMER_TIMER_UNIT0_WORK_EN_V << SYSTIMER_TIMER_UNIT0_WORK_EN_S)
+#define SYSTIMER_TIMER_UNIT0_WORK_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_WORK_EN_S  30
+/** SYSTIMER_CLK_EN : R/W; bitpos: [31]; default: 0;
+ *  register file clk gating
+ */
+#define SYSTIMER_CLK_EN    (BIT(31))
+#define SYSTIMER_CLK_EN_M  (SYSTIMER_CLK_EN_V << SYSTIMER_CLK_EN_S)
+#define SYSTIMER_CLK_EN_V  0x00000001
+#define SYSTIMER_CLK_EN_S  31
+
+/** SYSTIMER_UNIT0_OP_REG register
+ *  system timer unit0 value update register
+ */
+#define SYSTIMER_UNIT0_OP_REG (DR_REG_SYSTIMER_BASE + 0x4)
+/** SYSTIMER_TIMER_UNIT0_VALUE_VALID : R/SS/WTC; bitpos: [29]; default: 0;
+ *  timer value is sync and valid
+ */
+#define SYSTIMER_TIMER_UNIT0_VALUE_VALID    (BIT(29))
+#define SYSTIMER_TIMER_UNIT0_VALUE_VALID_M  (SYSTIMER_TIMER_UNIT0_VALUE_VALID_V << SYSTIMER_TIMER_UNIT0_VALUE_VALID_S)
+#define SYSTIMER_TIMER_UNIT0_VALUE_VALID_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_VALUE_VALID_S  29
+/** SYSTIMER_TIMER_UNIT0_UPDATE : WT; bitpos: [30]; default: 0;
+ *  update timer_unit0
+ */
+#define SYSTIMER_TIMER_UNIT0_UPDATE    (BIT(30))
+#define SYSTIMER_TIMER_UNIT0_UPDATE_M  (SYSTIMER_TIMER_UNIT0_UPDATE_V << SYSTIMER_TIMER_UNIT0_UPDATE_S)
+#define SYSTIMER_TIMER_UNIT0_UPDATE_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_UPDATE_S  30
+
+/** SYSTIMER_UNIT1_OP_REG register
+ *  system timer unit1 value update register
+ */
+#define SYSTIMER_UNIT1_OP_REG (DR_REG_SYSTIMER_BASE + 0x8)
+/** SYSTIMER_TIMER_UNIT1_VALUE_VALID : R/SS/WTC; bitpos: [29]; default: 0;
+ *  timer value is sync and valid
+ */
+#define SYSTIMER_TIMER_UNIT1_VALUE_VALID    (BIT(29))
+#define SYSTIMER_TIMER_UNIT1_VALUE_VALID_M  (SYSTIMER_TIMER_UNIT1_VALUE_VALID_V << SYSTIMER_TIMER_UNIT1_VALUE_VALID_S)
+#define SYSTIMER_TIMER_UNIT1_VALUE_VALID_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_VALUE_VALID_S  29
+/** SYSTIMER_TIMER_UNIT1_UPDATE : WT; bitpos: [30]; default: 0;
+ *  update timer unit1
+ */
+#define SYSTIMER_TIMER_UNIT1_UPDATE    (BIT(30))
+#define SYSTIMER_TIMER_UNIT1_UPDATE_M  (SYSTIMER_TIMER_UNIT1_UPDATE_V << SYSTIMER_TIMER_UNIT1_UPDATE_S)
+#define SYSTIMER_TIMER_UNIT1_UPDATE_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_UPDATE_S  30
+
+/** SYSTIMER_UNIT0_LOAD_HI_REG register
+ *  system timer unit0 value high load register
+ */
+#define SYSTIMER_UNIT0_LOAD_HI_REG (DR_REG_SYSTIMER_BASE + 0xc)
+/** SYSTIMER_TIMER_UNIT0_LOAD_HI : R/W; bitpos: [19:0]; default: 0;
+ *  timer unit0 load high 20 bits
+ */
+#define SYSTIMER_TIMER_UNIT0_LOAD_HI    0x000FFFFF
+#define SYSTIMER_TIMER_UNIT0_LOAD_HI_M  (SYSTIMER_TIMER_UNIT0_LOAD_HI_V << SYSTIMER_TIMER_UNIT0_LOAD_HI_S)
+#define SYSTIMER_TIMER_UNIT0_LOAD_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_UNIT0_LOAD_HI_S  0
+
+/** SYSTIMER_UNIT0_LOAD_LO_REG register
+ *  system timer unit0 value low load register
+ */
+#define SYSTIMER_UNIT0_LOAD_LO_REG (DR_REG_SYSTIMER_BASE + 0x10)
+/** SYSTIMER_TIMER_UNIT0_LOAD_LO : R/W; bitpos: [31:0]; default: 0;
+ *  timer unit0 load low 32 bits
+ */
+#define SYSTIMER_TIMER_UNIT0_LOAD_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT0_LOAD_LO_M  (SYSTIMER_TIMER_UNIT0_LOAD_LO_V << SYSTIMER_TIMER_UNIT0_LOAD_LO_S)
+#define SYSTIMER_TIMER_UNIT0_LOAD_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT0_LOAD_LO_S  0
+
+/** SYSTIMER_UNIT1_LOAD_HI_REG register
+ *  system timer unit1 value high load register
+ */
+#define SYSTIMER_UNIT1_LOAD_HI_REG (DR_REG_SYSTIMER_BASE + 0x14)
+/** SYSTIMER_TIMER_UNIT1_LOAD_HI : R/W; bitpos: [19:0]; default: 0;
+ *  timer unit1 load high 20 bits
+ */
+#define SYSTIMER_TIMER_UNIT1_LOAD_HI    0x000FFFFF
+#define SYSTIMER_TIMER_UNIT1_LOAD_HI_M  (SYSTIMER_TIMER_UNIT1_LOAD_HI_V << SYSTIMER_TIMER_UNIT1_LOAD_HI_S)
+#define SYSTIMER_TIMER_UNIT1_LOAD_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_UNIT1_LOAD_HI_S  0
+
+/** SYSTIMER_UNIT1_LOAD_LO_REG register
+ *  system timer unit1 value low load register
+ */
+#define SYSTIMER_UNIT1_LOAD_LO_REG (DR_REG_SYSTIMER_BASE + 0x18)
+/** SYSTIMER_TIMER_UNIT1_LOAD_LO : R/W; bitpos: [31:0]; default: 0;
+ *  timer unit1 load low 32 bits
+ */
+#define SYSTIMER_TIMER_UNIT1_LOAD_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT1_LOAD_LO_M  (SYSTIMER_TIMER_UNIT1_LOAD_LO_V << SYSTIMER_TIMER_UNIT1_LOAD_LO_S)
+#define SYSTIMER_TIMER_UNIT1_LOAD_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT1_LOAD_LO_S  0
+
+/** SYSTIMER_TARGET0_HI_REG register
+ *  system timer comp0 value high register
+ */
+#define SYSTIMER_TARGET0_HI_REG (DR_REG_SYSTIMER_BASE + 0x1c)
+/** SYSTIMER_TIMER_TARGET0_HI : R/W; bitpos: [19:0]; default: 0;
+ *  timer taget0 high 20 bits
+ */
+#define SYSTIMER_TIMER_TARGET0_HI    0x000FFFFF
+#define SYSTIMER_TIMER_TARGET0_HI_M  (SYSTIMER_TIMER_TARGET0_HI_V << SYSTIMER_TIMER_TARGET0_HI_S)
+#define SYSTIMER_TIMER_TARGET0_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_TARGET0_HI_S  0
+
+/** SYSTIMER_TARGET0_LO_REG register
+ *  system timer comp0 value low register
+ */
+#define SYSTIMER_TARGET0_LO_REG (DR_REG_SYSTIMER_BASE + 0x20)
+/** SYSTIMER_TIMER_TARGET0_LO : R/W; bitpos: [31:0]; default: 0;
+ *  timer taget0 low 32 bits
+ */
+#define SYSTIMER_TIMER_TARGET0_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET0_LO_M  (SYSTIMER_TIMER_TARGET0_LO_V << SYSTIMER_TIMER_TARGET0_LO_S)
+#define SYSTIMER_TIMER_TARGET0_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET0_LO_S  0
+
+/** SYSTIMER_TARGET1_HI_REG register
+ *  system timer comp1 value high register
+ */
+#define SYSTIMER_TARGET1_HI_REG (DR_REG_SYSTIMER_BASE + 0x24)
+/** SYSTIMER_TIMER_TARGET1_HI : R/W; bitpos: [19:0]; default: 0;
+ *  timer taget1 high 20 bits
+ */
+#define SYSTIMER_TIMER_TARGET1_HI    0x000FFFFF
+#define SYSTIMER_TIMER_TARGET1_HI_M  (SYSTIMER_TIMER_TARGET1_HI_V << SYSTIMER_TIMER_TARGET1_HI_S)
+#define SYSTIMER_TIMER_TARGET1_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_TARGET1_HI_S  0
+
+/** SYSTIMER_TARGET1_LO_REG register
+ *  system timer comp1 value low register
+ */
+#define SYSTIMER_TARGET1_LO_REG (DR_REG_SYSTIMER_BASE + 0x28)
+/** SYSTIMER_TIMER_TARGET1_LO : R/W; bitpos: [31:0]; default: 0;
+ *  timer taget1 low 32 bits
+ */
+#define SYSTIMER_TIMER_TARGET1_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET1_LO_M  (SYSTIMER_TIMER_TARGET1_LO_V << SYSTIMER_TIMER_TARGET1_LO_S)
+#define SYSTIMER_TIMER_TARGET1_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET1_LO_S  0
+
+/** SYSTIMER_TARGET2_HI_REG register
+ *  system timer comp2 value high register
+ */
+#define SYSTIMER_TARGET2_HI_REG (DR_REG_SYSTIMER_BASE + 0x2c)
+/** SYSTIMER_TIMER_TARGET2_HI : R/W; bitpos: [19:0]; default: 0;
+ *  timer taget2 high 20 bits
+ */
+#define SYSTIMER_TIMER_TARGET2_HI    0x000FFFFF
+#define SYSTIMER_TIMER_TARGET2_HI_M  (SYSTIMER_TIMER_TARGET2_HI_V << SYSTIMER_TIMER_TARGET2_HI_S)
+#define SYSTIMER_TIMER_TARGET2_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_TARGET2_HI_S  0
+
+/** SYSTIMER_TARGET2_LO_REG register
+ *  system timer comp2 value low register
+ */
+#define SYSTIMER_TARGET2_LO_REG (DR_REG_SYSTIMER_BASE + 0x30)
+/** SYSTIMER_TIMER_TARGET2_LO : R/W; bitpos: [31:0]; default: 0;
+ *  timer taget2 low 32 bits
+ */
+#define SYSTIMER_TIMER_TARGET2_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET2_LO_M  (SYSTIMER_TIMER_TARGET2_LO_V << SYSTIMER_TIMER_TARGET2_LO_S)
+#define SYSTIMER_TIMER_TARGET2_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET2_LO_S  0
+
+/** SYSTIMER_TARGET0_CONF_REG register
+ *  system timer comp0 target mode register
+ */
+#define SYSTIMER_TARGET0_CONF_REG (DR_REG_SYSTIMER_BASE + 0x34)
+/** SYSTIMER_TARGET0_PERIOD : R/W; bitpos: [25:0]; default: 0;
+ *  target0 period
+ */
+#define SYSTIMER_TARGET0_PERIOD    0x03FFFFFF
+#define SYSTIMER_TARGET0_PERIOD_M  (SYSTIMER_TARGET0_PERIOD_V << SYSTIMER_TARGET0_PERIOD_S)
+#define SYSTIMER_TARGET0_PERIOD_V  0x03FFFFFF
+#define SYSTIMER_TARGET0_PERIOD_S  0
+/** SYSTIMER_TARGET0_PERIOD_MODE : R/W; bitpos: [30]; default: 0;
+ *  Set target0 to period mode
+ */
+#define SYSTIMER_TARGET0_PERIOD_MODE    (BIT(30))
+#define SYSTIMER_TARGET0_PERIOD_MODE_M  (SYSTIMER_TARGET0_PERIOD_MODE_V << SYSTIMER_TARGET0_PERIOD_MODE_S)
+#define SYSTIMER_TARGET0_PERIOD_MODE_V  0x00000001
+#define SYSTIMER_TARGET0_PERIOD_MODE_S  30
+/** SYSTIMER_TARGET0_TIMER_UNIT_SEL : R/W; bitpos: [31]; default: 0;
+ *  select which unit to compare
+ */
+#define SYSTIMER_TARGET0_TIMER_UNIT_SEL    (BIT(31))
+#define SYSTIMER_TARGET0_TIMER_UNIT_SEL_M  (SYSTIMER_TARGET0_TIMER_UNIT_SEL_V << SYSTIMER_TARGET0_TIMER_UNIT_SEL_S)
+#define SYSTIMER_TARGET0_TIMER_UNIT_SEL_V  0x00000001
+#define SYSTIMER_TARGET0_TIMER_UNIT_SEL_S  31
+
+/** SYSTIMER_TARGET1_CONF_REG register
+ *  system timer comp1 target mode register
+ */
+#define SYSTIMER_TARGET1_CONF_REG (DR_REG_SYSTIMER_BASE + 0x38)
+/** SYSTIMER_TARGET1_PERIOD : R/W; bitpos: [25:0]; default: 0;
+ *  target1 period
+ */
+#define SYSTIMER_TARGET1_PERIOD    0x03FFFFFF
+#define SYSTIMER_TARGET1_PERIOD_M  (SYSTIMER_TARGET1_PERIOD_V << SYSTIMER_TARGET1_PERIOD_S)
+#define SYSTIMER_TARGET1_PERIOD_V  0x03FFFFFF
+#define SYSTIMER_TARGET1_PERIOD_S  0
+/** SYSTIMER_TARGET1_PERIOD_MODE : R/W; bitpos: [30]; default: 0;
+ *  Set target1 to period mode
+ */
+#define SYSTIMER_TARGET1_PERIOD_MODE    (BIT(30))
+#define SYSTIMER_TARGET1_PERIOD_MODE_M  (SYSTIMER_TARGET1_PERIOD_MODE_V << SYSTIMER_TARGET1_PERIOD_MODE_S)
+#define SYSTIMER_TARGET1_PERIOD_MODE_V  0x00000001
+#define SYSTIMER_TARGET1_PERIOD_MODE_S  30
+/** SYSTIMER_TARGET1_TIMER_UNIT_SEL : R/W; bitpos: [31]; default: 0;
+ *  select which unit to compare
+ */
+#define SYSTIMER_TARGET1_TIMER_UNIT_SEL    (BIT(31))
+#define SYSTIMER_TARGET1_TIMER_UNIT_SEL_M  (SYSTIMER_TARGET1_TIMER_UNIT_SEL_V << SYSTIMER_TARGET1_TIMER_UNIT_SEL_S)
+#define SYSTIMER_TARGET1_TIMER_UNIT_SEL_V  0x00000001
+#define SYSTIMER_TARGET1_TIMER_UNIT_SEL_S  31
+
+/** SYSTIMER_TARGET2_CONF_REG register
+ *  system timer comp2 target mode register
+ */
+#define SYSTIMER_TARGET2_CONF_REG (DR_REG_SYSTIMER_BASE + 0x3c)
+/** SYSTIMER_TARGET2_PERIOD : R/W; bitpos: [25:0]; default: 0;
+ *  target2 period
+ */
+#define SYSTIMER_TARGET2_PERIOD    0x03FFFFFF
+#define SYSTIMER_TARGET2_PERIOD_M  (SYSTIMER_TARGET2_PERIOD_V << SYSTIMER_TARGET2_PERIOD_S)
+#define SYSTIMER_TARGET2_PERIOD_V  0x03FFFFFF
+#define SYSTIMER_TARGET2_PERIOD_S  0
+/** SYSTIMER_TARGET2_PERIOD_MODE : R/W; bitpos: [30]; default: 0;
+ *  Set target2 to period mode
+ */
+#define SYSTIMER_TARGET2_PERIOD_MODE    (BIT(30))
+#define SYSTIMER_TARGET2_PERIOD_MODE_M  (SYSTIMER_TARGET2_PERIOD_MODE_V << SYSTIMER_TARGET2_PERIOD_MODE_S)
+#define SYSTIMER_TARGET2_PERIOD_MODE_V  0x00000001
+#define SYSTIMER_TARGET2_PERIOD_MODE_S  30
+/** SYSTIMER_TARGET2_TIMER_UNIT_SEL : R/W; bitpos: [31]; default: 0;
+ *  select which unit to compare
+ */
+#define SYSTIMER_TARGET2_TIMER_UNIT_SEL    (BIT(31))
+#define SYSTIMER_TARGET2_TIMER_UNIT_SEL_M  (SYSTIMER_TARGET2_TIMER_UNIT_SEL_V << SYSTIMER_TARGET2_TIMER_UNIT_SEL_S)
+#define SYSTIMER_TARGET2_TIMER_UNIT_SEL_V  0x00000001
+#define SYSTIMER_TARGET2_TIMER_UNIT_SEL_S  31
+
+/** SYSTIMER_UNIT0_VALUE_HI_REG register
+ *  system timer unit0 value high register
+ */
+#define SYSTIMER_UNIT0_VALUE_HI_REG (DR_REG_SYSTIMER_BASE + 0x40)
+/** SYSTIMER_TIMER_UNIT0_VALUE_HI : RO; bitpos: [19:0]; default: 0;
+ *  timer read value high 20bits
+ */
+#define SYSTIMER_TIMER_UNIT0_VALUE_HI    0x000FFFFF
+#define SYSTIMER_TIMER_UNIT0_VALUE_HI_M  (SYSTIMER_TIMER_UNIT0_VALUE_HI_V << SYSTIMER_TIMER_UNIT0_VALUE_HI_S)
+#define SYSTIMER_TIMER_UNIT0_VALUE_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_UNIT0_VALUE_HI_S  0
+
+/** SYSTIMER_UNIT0_VALUE_LO_REG register
+ *  system timer unit0 value low register
+ */
+#define SYSTIMER_UNIT0_VALUE_LO_REG (DR_REG_SYSTIMER_BASE + 0x44)
+/** SYSTIMER_TIMER_UNIT0_VALUE_LO : RO; bitpos: [31:0]; default: 0;
+ *  timer read value low 32bits
+ */
+#define SYSTIMER_TIMER_UNIT0_VALUE_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT0_VALUE_LO_M  (SYSTIMER_TIMER_UNIT0_VALUE_LO_V << SYSTIMER_TIMER_UNIT0_VALUE_LO_S)
+#define SYSTIMER_TIMER_UNIT0_VALUE_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT0_VALUE_LO_S  0
+
+/** SYSTIMER_UNIT1_VALUE_HI_REG register
+ *  system timer unit1 value high register
+ */
+#define SYSTIMER_UNIT1_VALUE_HI_REG (DR_REG_SYSTIMER_BASE + 0x48)
+/** SYSTIMER_TIMER_UNIT1_VALUE_HI : RO; bitpos: [19:0]; default: 0;
+ *  timer read value high 20bits
+ */
+#define SYSTIMER_TIMER_UNIT1_VALUE_HI    0x000FFFFF
+#define SYSTIMER_TIMER_UNIT1_VALUE_HI_M  (SYSTIMER_TIMER_UNIT1_VALUE_HI_V << SYSTIMER_TIMER_UNIT1_VALUE_HI_S)
+#define SYSTIMER_TIMER_UNIT1_VALUE_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_UNIT1_VALUE_HI_S  0
+
+/** SYSTIMER_UNIT1_VALUE_LO_REG register
+ *  system timer unit1 value low register
+ */
+#define SYSTIMER_UNIT1_VALUE_LO_REG (DR_REG_SYSTIMER_BASE + 0x4c)
+/** SYSTIMER_TIMER_UNIT1_VALUE_LO : RO; bitpos: [31:0]; default: 0;
+ *  timer read value low 32bits
+ */
+#define SYSTIMER_TIMER_UNIT1_VALUE_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT1_VALUE_LO_M  (SYSTIMER_TIMER_UNIT1_VALUE_LO_V << SYSTIMER_TIMER_UNIT1_VALUE_LO_S)
+#define SYSTIMER_TIMER_UNIT1_VALUE_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT1_VALUE_LO_S  0
+
+/** SYSTIMER_COMP0_LOAD_REG register
+ *  system timer comp0 conf sync register
+ */
+#define SYSTIMER_COMP0_LOAD_REG (DR_REG_SYSTIMER_BASE + 0x50)
+/** SYSTIMER_TIMER_COMP0_LOAD : WT; bitpos: [0]; default: 0;
+ *  timer comp0 sync enable signal
+ */
+#define SYSTIMER_TIMER_COMP0_LOAD    (BIT(0))
+#define SYSTIMER_TIMER_COMP0_LOAD_M  (SYSTIMER_TIMER_COMP0_LOAD_V << SYSTIMER_TIMER_COMP0_LOAD_S)
+#define SYSTIMER_TIMER_COMP0_LOAD_V  0x00000001
+#define SYSTIMER_TIMER_COMP0_LOAD_S  0
+
+/** SYSTIMER_COMP1_LOAD_REG register
+ *  system timer comp1 conf sync register
+ */
+#define SYSTIMER_COMP1_LOAD_REG (DR_REG_SYSTIMER_BASE + 0x54)
+/** SYSTIMER_TIMER_COMP1_LOAD : WT; bitpos: [0]; default: 0;
+ *  timer comp1 sync enable signal
+ */
+#define SYSTIMER_TIMER_COMP1_LOAD    (BIT(0))
+#define SYSTIMER_TIMER_COMP1_LOAD_M  (SYSTIMER_TIMER_COMP1_LOAD_V << SYSTIMER_TIMER_COMP1_LOAD_S)
+#define SYSTIMER_TIMER_COMP1_LOAD_V  0x00000001
+#define SYSTIMER_TIMER_COMP1_LOAD_S  0
+
+/** SYSTIMER_COMP2_LOAD_REG register
+ *  system timer comp2 conf sync register
+ */
+#define SYSTIMER_COMP2_LOAD_REG (DR_REG_SYSTIMER_BASE + 0x58)
+/** SYSTIMER_TIMER_COMP2_LOAD : WT; bitpos: [0]; default: 0;
+ *  timer comp2 sync enable signal
+ */
+#define SYSTIMER_TIMER_COMP2_LOAD    (BIT(0))
+#define SYSTIMER_TIMER_COMP2_LOAD_M  (SYSTIMER_TIMER_COMP2_LOAD_V << SYSTIMER_TIMER_COMP2_LOAD_S)
+#define SYSTIMER_TIMER_COMP2_LOAD_V  0x00000001
+#define SYSTIMER_TIMER_COMP2_LOAD_S  0
+
+/** SYSTIMER_UNIT0_LOAD_REG register
+ *  system timer unit0 conf sync register
+ */
+#define SYSTIMER_UNIT0_LOAD_REG (DR_REG_SYSTIMER_BASE + 0x5c)
+/** SYSTIMER_TIMER_UNIT0_LOAD : WT; bitpos: [0]; default: 0;
+ *  timer unit0 sync enable signal
+ */
+#define SYSTIMER_TIMER_UNIT0_LOAD    (BIT(0))
+#define SYSTIMER_TIMER_UNIT0_LOAD_M  (SYSTIMER_TIMER_UNIT0_LOAD_V << SYSTIMER_TIMER_UNIT0_LOAD_S)
+#define SYSTIMER_TIMER_UNIT0_LOAD_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_LOAD_S  0
+
+/** SYSTIMER_UNIT1_LOAD_REG register
+ *  system timer unit1 conf sync register
+ */
+#define SYSTIMER_UNIT1_LOAD_REG (DR_REG_SYSTIMER_BASE + 0x60)
+/** SYSTIMER_TIMER_UNIT1_LOAD : WT; bitpos: [0]; default: 0;
+ *  timer unit1 sync enable signal
+ */
+#define SYSTIMER_TIMER_UNIT1_LOAD    (BIT(0))
+#define SYSTIMER_TIMER_UNIT1_LOAD_M  (SYSTIMER_TIMER_UNIT1_LOAD_V << SYSTIMER_TIMER_UNIT1_LOAD_S)
+#define SYSTIMER_TIMER_UNIT1_LOAD_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_LOAD_S  0
+
+/** SYSTIMER_INT_ENA_REG register
+ *  systimer interrupt enable register
+ */
+#define SYSTIMER_INT_ENA_REG (DR_REG_SYSTIMER_BASE + 0x64)
+/** SYSTIMER_TARGET0_INT_ENA : R/W; bitpos: [0]; default: 0;
+ *  interupt0 enable
+ */
+#define SYSTIMER_TARGET0_INT_ENA    (BIT(0))
+#define SYSTIMER_TARGET0_INT_ENA_M  (SYSTIMER_TARGET0_INT_ENA_V << SYSTIMER_TARGET0_INT_ENA_S)
+#define SYSTIMER_TARGET0_INT_ENA_V  0x00000001
+#define SYSTIMER_TARGET0_INT_ENA_S  0
+/** SYSTIMER_TARGET1_INT_ENA : R/W; bitpos: [1]; default: 0;
+ *  interupt1 enable
+ */
+#define SYSTIMER_TARGET1_INT_ENA    (BIT(1))
+#define SYSTIMER_TARGET1_INT_ENA_M  (SYSTIMER_TARGET1_INT_ENA_V << SYSTIMER_TARGET1_INT_ENA_S)
+#define SYSTIMER_TARGET1_INT_ENA_V  0x00000001
+#define SYSTIMER_TARGET1_INT_ENA_S  1
+/** SYSTIMER_TARGET2_INT_ENA : R/W; bitpos: [2]; default: 0;
+ *  interupt2 enable
+ */
+#define SYSTIMER_TARGET2_INT_ENA    (BIT(2))
+#define SYSTIMER_TARGET2_INT_ENA_M  (SYSTIMER_TARGET2_INT_ENA_V << SYSTIMER_TARGET2_INT_ENA_S)
+#define SYSTIMER_TARGET2_INT_ENA_V  0x00000001
+#define SYSTIMER_TARGET2_INT_ENA_S  2
+
+/** SYSTIMER_INT_RAW_REG register
+ *  systimer interrupt raw register
+ */
+#define SYSTIMER_INT_RAW_REG (DR_REG_SYSTIMER_BASE + 0x68)
+/** SYSTIMER_TARGET0_INT_RAW : R/WTC/SS; bitpos: [0]; default: 0;
+ *  interupt0 raw
+ */
+#define SYSTIMER_TARGET0_INT_RAW    (BIT(0))
+#define SYSTIMER_TARGET0_INT_RAW_M  (SYSTIMER_TARGET0_INT_RAW_V << SYSTIMER_TARGET0_INT_RAW_S)
+#define SYSTIMER_TARGET0_INT_RAW_V  0x00000001
+#define SYSTIMER_TARGET0_INT_RAW_S  0
+/** SYSTIMER_TARGET1_INT_RAW : R/WTC/SS; bitpos: [1]; default: 0;
+ *  interupt1 raw
+ */
+#define SYSTIMER_TARGET1_INT_RAW    (BIT(1))
+#define SYSTIMER_TARGET1_INT_RAW_M  (SYSTIMER_TARGET1_INT_RAW_V << SYSTIMER_TARGET1_INT_RAW_S)
+#define SYSTIMER_TARGET1_INT_RAW_V  0x00000001
+#define SYSTIMER_TARGET1_INT_RAW_S  1
+/** SYSTIMER_TARGET2_INT_RAW : R/WTC/SS; bitpos: [2]; default: 0;
+ *  interupt2 raw
+ */
+#define SYSTIMER_TARGET2_INT_RAW    (BIT(2))
+#define SYSTIMER_TARGET2_INT_RAW_M  (SYSTIMER_TARGET2_INT_RAW_V << SYSTIMER_TARGET2_INT_RAW_S)
+#define SYSTIMER_TARGET2_INT_RAW_V  0x00000001
+#define SYSTIMER_TARGET2_INT_RAW_S  2
+
+/** SYSTIMER_INT_CLR_REG register
+ *  systimer interrupt clear register
+ */
+#define SYSTIMER_INT_CLR_REG (DR_REG_SYSTIMER_BASE + 0x6c)
+/** SYSTIMER_TARGET0_INT_CLR : WT; bitpos: [0]; default: 0;
+ *  interupt0 clear
+ */
+#define SYSTIMER_TARGET0_INT_CLR    (BIT(0))
+#define SYSTIMER_TARGET0_INT_CLR_M  (SYSTIMER_TARGET0_INT_CLR_V << SYSTIMER_TARGET0_INT_CLR_S)
+#define SYSTIMER_TARGET0_INT_CLR_V  0x00000001
+#define SYSTIMER_TARGET0_INT_CLR_S  0
+/** SYSTIMER_TARGET1_INT_CLR : WT; bitpos: [1]; default: 0;
+ *  interupt1 clear
+ */
+#define SYSTIMER_TARGET1_INT_CLR    (BIT(1))
+#define SYSTIMER_TARGET1_INT_CLR_M  (SYSTIMER_TARGET1_INT_CLR_V << SYSTIMER_TARGET1_INT_CLR_S)
+#define SYSTIMER_TARGET1_INT_CLR_V  0x00000001
+#define SYSTIMER_TARGET1_INT_CLR_S  1
+/** SYSTIMER_TARGET2_INT_CLR : WT; bitpos: [2]; default: 0;
+ *  interupt2 clear
+ */
+#define SYSTIMER_TARGET2_INT_CLR    (BIT(2))
+#define SYSTIMER_TARGET2_INT_CLR_M  (SYSTIMER_TARGET2_INT_CLR_V << SYSTIMER_TARGET2_INT_CLR_S)
+#define SYSTIMER_TARGET2_INT_CLR_V  0x00000001
+#define SYSTIMER_TARGET2_INT_CLR_S  2
+
+/** SYSTIMER_INT_ST_REG register
+ *  systimer interrupt status register
+ */
+#define SYSTIMER_INT_ST_REG (DR_REG_SYSTIMER_BASE + 0x70)
+/** SYSTIMER_TARGET0_INT_ST : RO; bitpos: [0]; default: 0;
+ *  interupt0 status
+ */
+#define SYSTIMER_TARGET0_INT_ST    (BIT(0))
+#define SYSTIMER_TARGET0_INT_ST_M  (SYSTIMER_TARGET0_INT_ST_V << SYSTIMER_TARGET0_INT_ST_S)
+#define SYSTIMER_TARGET0_INT_ST_V  0x00000001
+#define SYSTIMER_TARGET0_INT_ST_S  0
+/** SYSTIMER_TARGET1_INT_ST : RO; bitpos: [1]; default: 0;
+ *  interupt1 status
+ */
+#define SYSTIMER_TARGET1_INT_ST    (BIT(1))
+#define SYSTIMER_TARGET1_INT_ST_M  (SYSTIMER_TARGET1_INT_ST_V << SYSTIMER_TARGET1_INT_ST_S)
+#define SYSTIMER_TARGET1_INT_ST_V  0x00000001
+#define SYSTIMER_TARGET1_INT_ST_S  1
+/** SYSTIMER_TARGET2_INT_ST : RO; bitpos: [2]; default: 0;
+ *  interupt2 status
+ */
+#define SYSTIMER_TARGET2_INT_ST    (BIT(2))
+#define SYSTIMER_TARGET2_INT_ST_M  (SYSTIMER_TARGET2_INT_ST_V << SYSTIMER_TARGET2_INT_ST_S)
+#define SYSTIMER_TARGET2_INT_ST_V  0x00000001
+#define SYSTIMER_TARGET2_INT_ST_S  2
+
+/** SYSTIMER_REAL_TARGET0_LO_REG register
+ *  system timer comp0 actual target value low register
+ */
+#define SYSTIMER_REAL_TARGET0_LO_REG (DR_REG_SYSTIMER_BASE + 0x74)
+/** SYSTIMER_TARGET0_LO_RO : RO; bitpos: [31:0]; default: 0;
+ *  actual target value value low 32bits
+ */
+#define SYSTIMER_TARGET0_LO_RO    0xFFFFFFFF
+#define SYSTIMER_TARGET0_LO_RO_M  (SYSTIMER_TARGET0_LO_RO_V << SYSTIMER_TARGET0_LO_RO_S)
+#define SYSTIMER_TARGET0_LO_RO_V  0xFFFFFFFF
+#define SYSTIMER_TARGET0_LO_RO_S  0
+
+/** SYSTIMER_REAL_TARGET0_HI_REG register
+ *  system timer comp0 actual target value high register
+ */
+#define SYSTIMER_REAL_TARGET0_HI_REG (DR_REG_SYSTIMER_BASE + 0x78)
+/** SYSTIMER_TARGET0_HI_RO : RO; bitpos: [19:0]; default: 0;
+ *  actual target value value high 20bits
+ */
+#define SYSTIMER_TARGET0_HI_RO    0x000FFFFF
+#define SYSTIMER_TARGET0_HI_RO_M  (SYSTIMER_TARGET0_HI_RO_V << SYSTIMER_TARGET0_HI_RO_S)
+#define SYSTIMER_TARGET0_HI_RO_V  0x000FFFFF
+#define SYSTIMER_TARGET0_HI_RO_S  0
+
+/** SYSTIMER_REAL_TARGET1_LO_REG register
+ *  system timer comp1 actual target value low register
+ */
+#define SYSTIMER_REAL_TARGET1_LO_REG (DR_REG_SYSTIMER_BASE + 0x7c)
+/** SYSTIMER_TARGET1_LO_RO : RO; bitpos: [31:0]; default: 0;
+ *  actual target value value low 32bits
+ */
+#define SYSTIMER_TARGET1_LO_RO    0xFFFFFFFF
+#define SYSTIMER_TARGET1_LO_RO_M  (SYSTIMER_TARGET1_LO_RO_V << SYSTIMER_TARGET1_LO_RO_S)
+#define SYSTIMER_TARGET1_LO_RO_V  0xFFFFFFFF
+#define SYSTIMER_TARGET1_LO_RO_S  0
+
+/** SYSTIMER_REAL_TARGET1_HI_REG register
+ *  system timer comp1 actual target value high register
+ */
+#define SYSTIMER_REAL_TARGET1_HI_REG (DR_REG_SYSTIMER_BASE + 0x80)
+/** SYSTIMER_TARGET1_HI_RO : RO; bitpos: [19:0]; default: 0;
+ *  actual target value value high 20bits
+ */
+#define SYSTIMER_TARGET1_HI_RO    0x000FFFFF
+#define SYSTIMER_TARGET1_HI_RO_M  (SYSTIMER_TARGET1_HI_RO_V << SYSTIMER_TARGET1_HI_RO_S)
+#define SYSTIMER_TARGET1_HI_RO_V  0x000FFFFF
+#define SYSTIMER_TARGET1_HI_RO_S  0
+
+/** SYSTIMER_REAL_TARGET2_LO_REG register
+ *  system timer comp2 actual target value low register
+ */
+#define SYSTIMER_REAL_TARGET2_LO_REG (DR_REG_SYSTIMER_BASE + 0x84)
+/** SYSTIMER_TARGET2_LO_RO : RO; bitpos: [31:0]; default: 0;
+ *  actual target value value low 32bits
+ */
+#define SYSTIMER_TARGET2_LO_RO    0xFFFFFFFF
+#define SYSTIMER_TARGET2_LO_RO_M  (SYSTIMER_TARGET2_LO_RO_V << SYSTIMER_TARGET2_LO_RO_S)
+#define SYSTIMER_TARGET2_LO_RO_V  0xFFFFFFFF
+#define SYSTIMER_TARGET2_LO_RO_S  0
+
+/** SYSTIMER_REAL_TARGET2_HI_REG register
+ *  system timer comp2 actual target value high register
+ */
+#define SYSTIMER_REAL_TARGET2_HI_REG (DR_REG_SYSTIMER_BASE + 0x88)
+/** SYSTIMER_TARGET2_HI_RO : RO; bitpos: [19:0]; default: 0;
+ *  actual target value value high 20bits
+ */
+#define SYSTIMER_TARGET2_HI_RO    0x000FFFFF
+#define SYSTIMER_TARGET2_HI_RO_M  (SYSTIMER_TARGET2_HI_RO_V << SYSTIMER_TARGET2_HI_RO_S)
+#define SYSTIMER_TARGET2_HI_RO_V  0x000FFFFF
+#define SYSTIMER_TARGET2_HI_RO_S  0
+
+/** SYSTIMER_DATE_REG register
+ *  system timer version control register
+ */
+#define SYSTIMER_DATE_REG (DR_REG_SYSTIMER_BASE + 0xfc)
+/** SYSTIMER_DATE : R/W; bitpos: [31:0]; default: 33628753;
+ *  systimer register version
+ */
+#define SYSTIMER_DATE    0xFFFFFFFF
+#define SYSTIMER_DATE_M  (SYSTIMER_DATE_V << SYSTIMER_DATE_S)
+#define SYSTIMER_DATE_V  0xFFFFFFFF
+#define SYSTIMER_DATE_S  0
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/systimer_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/systimer_struct.h
new file mode 100644
index 00000000000..115058c5222
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/systimer_struct.h
@@ -0,0 +1,409 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** SYSTEM TIMER CLK CONTROL REGISTER */
+/** Type of conf register
+ *  Configure system timer clock
+ */
+typedef union {
+    struct {
+        /** systimer_clk_fo : R/W; bitpos: [0]; default: 0;
+         *  systimer clock force on
+         */
+        uint32_t systimer_clk_fo: 1;
+        uint32_t reserved_1: 21;
+        /** target2_work_en : R/W; bitpos: [22]; default: 0;
+         *  target2 work enable
+         */
+        uint32_t target2_work_en: 1;
+        /** target1_work_en : R/W; bitpos: [23]; default: 0;
+         *  target1 work enable
+         */
+        uint32_t target1_work_en: 1;
+        /** target0_work_en : R/W; bitpos: [24]; default: 0;
+         *  target0 work enable
+         */
+        uint32_t target0_work_en: 1;
+        /** timer_unit1_core1_stall_en : R/W; bitpos: [25]; default: 1;
+         *  If timer unit1 is stalled when core1 stalled
+         */
+        uint32_t timer_unit1_core1_stall_en: 1;
+        /** timer_unit1_core0_stall_en : R/W; bitpos: [26]; default: 1;
+         *  If timer unit1 is stalled when core0 stalled
+         */
+        uint32_t timer_unit1_core0_stall_en: 1;
+        /** timer_unit0_core1_stall_en : R/W; bitpos: [27]; default: 0;
+         *  If timer unit0 is stalled when core1 stalled
+         */
+        uint32_t timer_unit0_core1_stall_en: 1;
+        /** timer_unit0_core0_stall_en : R/W; bitpos: [28]; default: 0;
+         *  If timer unit0 is stalled when core0 stalled
+         */
+        uint32_t timer_unit0_core0_stall_en: 1;
+        /** timer_unit1_work_en : R/W; bitpos: [29]; default: 0;
+         *  timer unit1 work enable
+         */
+        uint32_t timer_unit1_work_en: 1;
+        /** timer_unit0_work_en : R/W; bitpos: [30]; default: 1;
+         *  timer unit0 work enable
+         */
+        uint32_t timer_unit0_work_en: 1;
+        /** clk_en : R/W; bitpos: [31]; default: 0;
+         *  register file clk gating
+         */
+        uint32_t clk_en: 1;
+    };
+    uint32_t val;
+} systimer_conf_reg_t;
+
+
+/** Type of unit_op register
+ *  SYSTIMER_UNIT_OP.
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0: 29;
+        /** timer_unit_value_valid : R/SS/WTC; bitpos: [29]; default: 0;
+         *  reg_timer_unit0_value_valid
+         */
+        uint32_t timer_unit_value_valid: 1;
+        /** timer_unit_update : WT; bitpos: [30]; default: 0;
+         *  update timer_unit0
+         */
+        uint32_t timer_unit_update: 1;
+        uint32_t reserved_32: 1;
+    };
+    uint32_t val;
+} systimer_unit_op_reg_t;
+
+/** Type of unit_load register
+ *  SYSTIMER_UNIT_LOAD
+ */
+typedef struct {
+    union {
+        struct {
+            /** timer_unit_load_hi : R/W; bitpos: [19:0]; default: 0;
+             *  timer unit load high 32 bit
+             */
+            uint32_t timer_unit_load_hi: 20;
+            uint32_t reserved_20: 12;
+        };
+        uint32_t val;
+    } hi;
+    union {
+        struct {
+            /** timer_unit_load_lo : R/W; bitpos: [31:0]; default: 0;
+             *  timer unit load low 32 bit
+             */
+            uint32_t timer_unit_load_lo: 32;
+        };
+        uint32_t val;
+    } lo;
+} systimer_unit_load_val_reg_t;
+
+
+/** Type of target register
+ *  SYSTIMER_TARGET.
+ */
+typedef struct {
+    union {
+        struct {
+            /** timer_target_hi : R/W; bitpos: [19:0]; default: 0;
+             *  timer target high 32 bit
+             */
+            uint32_t timer_target_hi: 20;
+            uint32_t reserved_20: 12;
+        };
+        uint32_t val;
+    } hi;
+    union {
+        struct {
+            /** timer_target_lo : R/W; bitpos: [31:0]; default: 0;
+             *  timer target low 32 bit
+             */
+            uint32_t timer_target_lo: 32;
+        };
+        uint32_t val;
+    } lo;
+} systimer_target_val_reg_t;
+
+
+/** Type of target_conf register
+ *  SYSTIMER_TARGET_CONF.
+ */
+typedef union {
+    struct {
+        /** target_period : R/W; bitpos: [25:0]; default: 0;
+         *  target period
+         */
+        uint32_t target_period: 26;
+        uint32_t reserved_26: 4;
+        /** target_period_mode : R/W; bitpos: [30]; default: 0;
+         *  Set target to period mode
+         */
+        uint32_t target_period_mode: 1;
+        /** target_timer_unit_sel : R/W; bitpos: [31]; default: 0;
+         *  select which unit to compare
+         */
+        uint32_t target_timer_unit_sel: 1;
+    };
+    uint32_t val;
+} systimer_target_conf_reg_t;
+
+
+/** Type of unit_value_hi register
+ *  SYSTIMER_UNIT_VALUE_HI.
+ */
+typedef struct {
+    union {
+        struct {
+            /** timer_unit_value_hi : RO; bitpos: [19:0]; default: 0;
+             *  timer read value high 20bit
+             */
+            uint32_t timer_unit_value_hi: 20;
+            uint32_t reserved_20: 12;
+        };
+        uint32_t val;
+    } hi;
+    union {
+        struct {
+            /** timer_unit_value_lo : RO; bitpos: [31:0]; default: 0;
+             *  timer read value low 32bit
+             */
+            uint32_t timer_unit_value_lo: 32;
+        };
+        uint32_t val;
+    } lo;
+} systimer_unit_value_reg_t;
+
+
+/** Type of comp_load register
+ *  SYSTIMER_COMP_LOAD.
+ */
+typedef union {
+    struct {
+        /** timer_comp_load : WT; bitpos: [0]; default: 0;
+         *  timer comp load value
+         */
+        uint32_t timer_comp_load: 1;
+        uint32_t reserved_1: 31;
+    };
+    uint32_t val;
+} systimer_comp_load_reg_t;
+
+
+/** Type of unit_load register
+ *  SYSTIMER_UNIT_LOAD.
+ */
+typedef union {
+    struct {
+        /** timer_unit_load : WT; bitpos: [0]; default: 0;
+         *  timer unit load value
+         */
+        uint32_t timer_unit_load: 1;
+        uint32_t reserved_1: 31;
+    };
+    uint32_t val;
+} systimer_unit_load_reg_t;
+
+
+/** SYSTEM TIMER INTERRUPT REGISTER */
+/** Type of int_ena register
+ *  systimer interrupt enable register
+ */
+typedef union {
+    struct {
+        /** target0_int_ena : R/W; bitpos: [0]; default: 0;
+         *  interupt0 enable
+         */
+        uint32_t target0_int_ena: 1;
+        /** target1_int_ena : R/W; bitpos: [1]; default: 0;
+         *  interupt1 enable
+         */
+        uint32_t target1_int_ena: 1;
+        /** target2_int_ena : R/W; bitpos: [2]; default: 0;
+         *  interupt2 enable
+         */
+        uint32_t target2_int_ena: 1;
+        uint32_t reserved_3: 29;
+    };
+    uint32_t val;
+} systimer_int_ena_reg_t;
+
+/** Type of int_raw register
+ *  systimer interrupt raw register
+ */
+typedef union {
+    struct {
+        /** target0_int_raw : R/WTC/SS; bitpos: [0]; default: 0;
+         *  interupt0 raw
+         */
+        uint32_t target0_int_raw: 1;
+        /** target1_int_raw : R/WTC/SS; bitpos: [1]; default: 0;
+         *  interupt1 raw
+         */
+        uint32_t target1_int_raw: 1;
+        /** target2_int_raw : R/WTC/SS; bitpos: [2]; default: 0;
+         *  interupt2 raw
+         */
+        uint32_t target2_int_raw: 1;
+        uint32_t reserved_3: 29;
+    };
+    uint32_t val;
+} systimer_int_raw_reg_t;
+
+/** Type of int_clr register
+ *  systimer interrupt clear register
+ */
+typedef union {
+    struct {
+        /** target0_int_clr : WT; bitpos: [0]; default: 0;
+         *  interupt0 clear
+         */
+        uint32_t target0_int_clr: 1;
+        /** target1_int_clr : WT; bitpos: [1]; default: 0;
+         *  interupt1 clear
+         */
+        uint32_t target1_int_clr: 1;
+        /** target2_int_clr : WT; bitpos: [2]; default: 0;
+         *  interupt2 clear
+         */
+        uint32_t target2_int_clr: 1;
+        uint32_t reserved_3: 29;
+    };
+    uint32_t val;
+} systimer_int_clr_reg_t;
+
+/** Type of int_st register
+ *  systimer interrupt status register
+ */
+typedef union {
+    struct {
+        /** target0_int_st : RO; bitpos: [0]; default: 0;
+         *  interupt0 status
+         */
+        uint32_t target0_int_st: 1;
+        /** target1_int_st : RO; bitpos: [1]; default: 0;
+         *  interupt1 status
+         */
+        uint32_t target1_int_st: 1;
+        /** target2_int_st : RO; bitpos: [2]; default: 0;
+         *  interupt2 status
+         */
+        uint32_t target2_int_st: 1;
+        uint32_t reserved_3: 29;
+    };
+    uint32_t val;
+} systimer_int_st_reg_t;
+
+
+/** SYSTEM TIMER COMP STATUS REGISTER
+ *  systimer comp actual target value low register
+ */
+typedef struct {
+    union {
+        struct {
+            /** target_lo_ro : RO; bitpos: [31:0]; default: 0;
+             *  actual target value value low 32bits
+             */
+            uint32_t target_lo_ro: 32;
+        };
+        uint32_t val;
+    } lo;
+    union {
+        struct {
+            /** target_hi_ro : RO; bitpos: [19:0]; default: 0;
+             *  actual target value value high 20bits
+             */
+            uint32_t target_hi_ro: 20;
+            uint32_t reserved_20: 12;
+        };
+        uint32_t val;
+    } hi;
+} systimer_real_target_val_reg_t;
+
+
+/** VERSION REGISTER */
+/** Type of date register
+ *  system timer version control register
+ */
+typedef union {
+    struct {
+        /** date : R/W; bitpos: [31:0]; default: 33628753;
+         *  systimer register version
+         */
+        uint32_t date: 32;
+    };
+    uint32_t val;
+} systimer_date_reg_t;
+
+
+typedef struct {
+    volatile systimer_conf_reg_t conf;
+    volatile systimer_unit_op_reg_t unit_op[2];
+    volatile systimer_unit_load_val_reg_t unit_load_val[2];
+    volatile systimer_target_val_reg_t target_val[3];
+    volatile systimer_target_conf_reg_t target_conf[3];
+    volatile systimer_unit_value_reg_t unit_val[2];
+    volatile systimer_comp_load_reg_t comp_load[3];
+    volatile systimer_unit_load_reg_t unit_load[2];
+    volatile systimer_int_ena_reg_t int_ena;
+    volatile systimer_int_raw_reg_t int_raw;
+    volatile systimer_int_clr_reg_t int_clr;
+    volatile systimer_int_st_reg_t int_st;
+    volatile systimer_real_target_val_reg_t real_target_val[3];
+    uint32_t reserved_08c;
+    uint32_t reserved_090;
+    uint32_t reserved_094;
+    uint32_t reserved_098;
+    uint32_t reserved_09c;
+    uint32_t reserved_0a0;
+    uint32_t reserved_0a4;
+    uint32_t reserved_0a8;
+    uint32_t reserved_0ac;
+    uint32_t reserved_0b0;
+    uint32_t reserved_0b4;
+    uint32_t reserved_0b8;
+    uint32_t reserved_0bc;
+    uint32_t reserved_0c0;
+    uint32_t reserved_0c4;
+    uint32_t reserved_0c8;
+    uint32_t reserved_0cc;
+    uint32_t reserved_0d0;
+    uint32_t reserved_0d4;
+    uint32_t reserved_0d8;
+    uint32_t reserved_0dc;
+    uint32_t reserved_0e0;
+    uint32_t reserved_0e4;
+    uint32_t reserved_0e8;
+    uint32_t reserved_0ec;
+    uint32_t reserved_0f0;
+    uint32_t reserved_0f4;
+    uint32_t reserved_0f8;
+    volatile systimer_date_reg_t date;
+} systimer_dev_t;
+
+extern systimer_dev_t SYSTIMER;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/timer_group_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/timer_group_reg.h
new file mode 100644
index 00000000000..7252d250673
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/timer_group_reg.h
@@ -0,0 +1,706 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** TIMG_T0CONFIG_REG register
+ *  Timer 0 configuration register
+ */
+#define TIMG_T0CONFIG_REG(i) (REG_TIMG_BASE(i) + 0x0)
+/** TIMG_T0_USE_XTAL : R/W; bitpos: [9]; default: 0;
+ *  1: Use XTAL_CLK as the source clock of timer group. 0: Use APB_CLK as the source
+ *  clock of timer group.
+ */
+#define TIMG_T0_USE_XTAL    (BIT(9))
+#define TIMG_T0_USE_XTAL_M  (TIMG_T0_USE_XTAL_V << TIMG_T0_USE_XTAL_S)
+#define TIMG_T0_USE_XTAL_V  0x00000001U
+#define TIMG_T0_USE_XTAL_S  9
+/** TIMG_T0_ALARM_EN : R/W/SC; bitpos: [10]; default: 0;
+ *  When set, the alarm is enabled. This bit is automatically cleared once an
+ *  alarm occurs.
+ */
+#define TIMG_T0_ALARM_EN    (BIT(10))
+#define TIMG_T0_ALARM_EN_M  (TIMG_T0_ALARM_EN_V << TIMG_T0_ALARM_EN_S)
+#define TIMG_T0_ALARM_EN_V  0x00000001U
+#define TIMG_T0_ALARM_EN_S  10
+/** TIMG_T0_DIVIDER : R/W; bitpos: [28:13]; default: 1;
+ *  Timer 0 clock (T0_clk) prescaler value.
+ */
+#define TIMG_T0_DIVIDER    0x0000FFFFU
+#define TIMG_T0_DIVIDER_M  (TIMG_T0_DIVIDER_V << TIMG_T0_DIVIDER_S)
+#define TIMG_T0_DIVIDER_V  0x0000FFFFU
+#define TIMG_T0_DIVIDER_S  13
+/** TIMG_T0_AUTORELOAD : R/W; bitpos: [29]; default: 1;
+ *  When set, timer 0 auto-reload at alarm is enabled.
+ */
+#define TIMG_T0_AUTORELOAD    (BIT(29))
+#define TIMG_T0_AUTORELOAD_M  (TIMG_T0_AUTORELOAD_V << TIMG_T0_AUTORELOAD_S)
+#define TIMG_T0_AUTORELOAD_V  0x00000001U
+#define TIMG_T0_AUTORELOAD_S  29
+/** TIMG_T0_INCREASE : R/W; bitpos: [30]; default: 1;
+ *  When set, the timer 0 time-base counter will increment every clock tick. When
+ *  cleared, the timer 0 time-base counter will decrement.
+ */
+#define TIMG_T0_INCREASE    (BIT(30))
+#define TIMG_T0_INCREASE_M  (TIMG_T0_INCREASE_V << TIMG_T0_INCREASE_S)
+#define TIMG_T0_INCREASE_V  0x00000001U
+#define TIMG_T0_INCREASE_S  30
+/** TIMG_T0_EN : R/W; bitpos: [31]; default: 0;
+ *  When set, the timer 0 time-base counter is enabled.
+ */
+#define TIMG_T0_EN    (BIT(31))
+#define TIMG_T0_EN_M  (TIMG_T0_EN_V << TIMG_T0_EN_S)
+#define TIMG_T0_EN_V  0x00000001U
+#define TIMG_T0_EN_S  31
+
+/** TIMG_T0LO_REG register
+ *  Timer 0 current value, low 32 bits
+ */
+#define TIMG_T0LO_REG(i) (REG_TIMG_BASE(i) + 0x4)
+/** TIMG_T0_LO : RO; bitpos: [31:0]; default: 0;
+ *  After writing to TIMG_T0UPDATE_REG, the low 32 bits of the time-base counter
+ *  of timer 0 can be read here.
+ */
+#define TIMG_T0_LO    0xFFFFFFFFU
+#define TIMG_T0_LO_M  (TIMG_T0_LO_V << TIMG_T0_LO_S)
+#define TIMG_T0_LO_V  0xFFFFFFFFU
+#define TIMG_T0_LO_S  0
+
+/** TIMG_T0HI_REG register
+ *  Timer 0 current value, high 22 bits
+ */
+#define TIMG_T0HI_REG(i) (REG_TIMG_BASE(i) + 0x8)
+/** TIMG_T0_HI : RO; bitpos: [21:0]; default: 0;
+ *  After writing to TIMG_T0UPDATE_REG, the high 22 bits of the time-base counter
+ *  of timer 0 can be read here.
+ */
+#define TIMG_T0_HI    0x003FFFFFU
+#define TIMG_T0_HI_M  (TIMG_T0_HI_V << TIMG_T0_HI_S)
+#define TIMG_T0_HI_V  0x003FFFFFU
+#define TIMG_T0_HI_S  0
+
+/** TIMG_T0UPDATE_REG register
+ *  Write to copy current timer value to TIMGn_T0_(LO/HI)_REG
+ */
+#define TIMG_T0UPDATE_REG(i) (REG_TIMG_BASE(i) + 0xc)
+/** TIMG_T0_UPDATE : R/W/SC; bitpos: [31]; default: 0;
+ *  After writing 0 or 1 to TIMG_T0UPDATE_REG, the counter value is latched.
+ */
+#define TIMG_T0_UPDATE    (BIT(31))
+#define TIMG_T0_UPDATE_M  (TIMG_T0_UPDATE_V << TIMG_T0_UPDATE_S)
+#define TIMG_T0_UPDATE_V  0x00000001U
+#define TIMG_T0_UPDATE_S  31
+
+/** TIMG_T0ALARMLO_REG register
+ *  Timer 0 alarm value, low 32 bits
+ */
+#define TIMG_T0ALARMLO_REG(i) (REG_TIMG_BASE(i) + 0x10)
+/** TIMG_T0_ALARM_LO : R/W; bitpos: [31:0]; default: 0;
+ *  Timer 0 alarm trigger time-base counter value, low 32 bits.
+ */
+#define TIMG_T0_ALARM_LO    0xFFFFFFFFU
+#define TIMG_T0_ALARM_LO_M  (TIMG_T0_ALARM_LO_V << TIMG_T0_ALARM_LO_S)
+#define TIMG_T0_ALARM_LO_V  0xFFFFFFFFU
+#define TIMG_T0_ALARM_LO_S  0
+
+/** TIMG_T0ALARMHI_REG register
+ *  Timer 0 alarm value, high bits
+ */
+#define TIMG_T0ALARMHI_REG(i) (REG_TIMG_BASE(i) + 0x14)
+/** TIMG_T0_ALARM_HI : R/W; bitpos: [21:0]; default: 0;
+ *  Timer 0 alarm trigger time-base counter value, high 22 bits.
+ */
+#define TIMG_T0_ALARM_HI    0x003FFFFFU
+#define TIMG_T0_ALARM_HI_M  (TIMG_T0_ALARM_HI_V << TIMG_T0_ALARM_HI_S)
+#define TIMG_T0_ALARM_HI_V  0x003FFFFFU
+#define TIMG_T0_ALARM_HI_S  0
+
+/** TIMG_T0LOADLO_REG register
+ *  Timer 0 reload value, low 32 bits
+ */
+#define TIMG_T0LOADLO_REG(i) (REG_TIMG_BASE(i) + 0x18)
+/** TIMG_T0_LOAD_LO : R/W; bitpos: [31:0]; default: 0;
+ *  Low 32 bits of the value that a reload will load onto timer 0 time-base
+ *  Counter.
+ */
+#define TIMG_T0_LOAD_LO    0xFFFFFFFFU
+#define TIMG_T0_LOAD_LO_M  (TIMG_T0_LOAD_LO_V << TIMG_T0_LOAD_LO_S)
+#define TIMG_T0_LOAD_LO_V  0xFFFFFFFFU
+#define TIMG_T0_LOAD_LO_S  0
+
+/** TIMG_T0LOADHI_REG register
+ *  Timer 0 reload value, high 22 bits
+ */
+#define TIMG_T0LOADHI_REG(i) (REG_TIMG_BASE(i) + 0x1c)
+/** TIMG_T0_LOAD_HI : R/W; bitpos: [21:0]; default: 0;
+ *  High 22 bits of the value that a reload will load onto timer 0 time-base
+ *  counter.
+ */
+#define TIMG_T0_LOAD_HI    0x003FFFFFU
+#define TIMG_T0_LOAD_HI_M  (TIMG_T0_LOAD_HI_V << TIMG_T0_LOAD_HI_S)
+#define TIMG_T0_LOAD_HI_V  0x003FFFFFU
+#define TIMG_T0_LOAD_HI_S  0
+
+/** TIMG_T0LOAD_REG register
+ *  Write to reload timer from TIMG_T0_(LOADLOLOADHI)_REG
+ */
+#define TIMG_T0LOAD_REG(i) (REG_TIMG_BASE(i) + 0x20)
+/** TIMG_T0_LOAD : WT; bitpos: [31:0]; default: 0;
+ *
+ *  Write any value to trigger a timer 0 time-base counter reload.
+ */
+#define TIMG_T0_LOAD    0xFFFFFFFFU
+#define TIMG_T0_LOAD_M  (TIMG_T0_LOAD_V << TIMG_T0_LOAD_S)
+#define TIMG_T0_LOAD_V  0xFFFFFFFFU
+#define TIMG_T0_LOAD_S  0
+
+/** TIMG_T1CONFIG_REG register
+ *  Timer 1 configuration register
+ */
+#define TIMG_T1CONFIG_REG(i) (REG_TIMG_BASE(i) + 0x24)
+/** TIMG_T1_USE_XTAL : R/W; bitpos: [9]; default: 0;
+ *  1: Use XTAL_CLK as the source clock of timer group. 0: Use APB_CLK as the source
+ *  clock of timer group.
+ */
+#define TIMG_T1_USE_XTAL    (BIT(9))
+#define TIMG_T1_USE_XTAL_M  (TIMG_T1_USE_XTAL_V << TIMG_T1_USE_XTAL_S)
+#define TIMG_T1_USE_XTAL_V  0x00000001U
+#define TIMG_T1_USE_XTAL_S  9
+/** TIMG_T1_ALARM_EN : R/W/SC; bitpos: [10]; default: 0;
+ *  When set, the alarm is enabled. This bit is automatically cleared once an
+ *  alarm occurs.
+ */
+#define TIMG_T1_ALARM_EN    (BIT(10))
+#define TIMG_T1_ALARM_EN_M  (TIMG_T1_ALARM_EN_V << TIMG_T1_ALARM_EN_S)
+#define TIMG_T1_ALARM_EN_V  0x00000001U
+#define TIMG_T1_ALARM_EN_S  10
+/** TIMG_T1_DIVIDER : R/W; bitpos: [28:13]; default: 1;
+ *  Timer 1 clock (T1_clk) prescaler value.
+ */
+#define TIMG_T1_DIVIDER    0x0000FFFFU
+#define TIMG_T1_DIVIDER_M  (TIMG_T1_DIVIDER_V << TIMG_T1_DIVIDER_S)
+#define TIMG_T1_DIVIDER_V  0x0000FFFFU
+#define TIMG_T1_DIVIDER_S  13
+/** TIMG_T1_AUTORELOAD : R/W; bitpos: [29]; default: 1;
+ *  When set, timer 1 auto-reload at alarm is enabled.
+ */
+#define TIMG_T1_AUTORELOAD    (BIT(29))
+#define TIMG_T1_AUTORELOAD_M  (TIMG_T1_AUTORELOAD_V << TIMG_T1_AUTORELOAD_S)
+#define TIMG_T1_AUTORELOAD_V  0x00000001U
+#define TIMG_T1_AUTORELOAD_S  29
+/** TIMG_T1_INCREASE : R/W; bitpos: [30]; default: 1;
+ *  When set, the timer 1 time-base counter will increment every clock tick. When
+ *  cleared, the timer 1 time-base counter will decrement.
+ */
+#define TIMG_T1_INCREASE    (BIT(30))
+#define TIMG_T1_INCREASE_M  (TIMG_T1_INCREASE_V << TIMG_T1_INCREASE_S)
+#define TIMG_T1_INCREASE_V  0x00000001U
+#define TIMG_T1_INCREASE_S  30
+/** TIMG_T1_EN : R/W; bitpos: [31]; default: 0;
+ *  When set, the timer 1 time-base counter is enabled.
+ */
+#define TIMG_T1_EN    (BIT(31))
+#define TIMG_T1_EN_M  (TIMG_T1_EN_V << TIMG_T1_EN_S)
+#define TIMG_T1_EN_V  0x00000001U
+#define TIMG_T1_EN_S  31
+
+/** TIMG_T1LO_REG register
+ *  Timer 1 current value, low 32 bits
+ */
+#define TIMG_T1LO_REG(i) (REG_TIMG_BASE(i) + 0x28)
+/** TIMG_T1_LO : RO; bitpos: [31:0]; default: 0;
+ *  After writing to TIMG_T1UPDATE_REG, the low 32 bits of the time-base counter
+ *  of timer 1 can be read here.
+ */
+#define TIMG_T1_LO    0xFFFFFFFFU
+#define TIMG_T1_LO_M  (TIMG_T1_LO_V << TIMG_T1_LO_S)
+#define TIMG_T1_LO_V  0xFFFFFFFFU
+#define TIMG_T1_LO_S  0
+
+/** TIMG_T1HI_REG register
+ *  Timer 1 current value, high 22 bits
+ */
+#define TIMG_T1HI_REG(i) (REG_TIMG_BASE(i) + 0x2c)
+/** TIMG_T1_HI : RO; bitpos: [21:0]; default: 0;
+ *  After writing to TIMG_T1UPDATE_REG, the high 22 bits of the time-base counter
+ *  of timer 1 can be read here.
+ */
+#define TIMG_T1_HI    0x003FFFFFU
+#define TIMG_T1_HI_M  (TIMG_T1_HI_V << TIMG_T1_HI_S)
+#define TIMG_T1_HI_V  0x003FFFFFU
+#define TIMG_T1_HI_S  0
+
+/** TIMG_T1UPDATE_REG register
+ *  Write to copy current timer value to TIMGn_T1_(LO/HI)_REG
+ */
+#define TIMG_T1UPDATE_REG(i) (REG_TIMG_BASE(i) + 0x30)
+/** TIMG_T1_UPDATE : R/W/SC; bitpos: [31]; default: 0;
+ *  After writing 0 or 1 to TIMG_T1UPDATE_REG, the counter value is latched.
+ */
+#define TIMG_T1_UPDATE    (BIT(31))
+#define TIMG_T1_UPDATE_M  (TIMG_T1_UPDATE_V << TIMG_T1_UPDATE_S)
+#define TIMG_T1_UPDATE_V  0x00000001U
+#define TIMG_T1_UPDATE_S  31
+
+/** TIMG_T1ALARMLO_REG register
+ *  Timer 1 alarm value, low 32 bits
+ */
+#define TIMG_T1ALARMLO_REG(i) (REG_TIMG_BASE(i) + 0x34)
+/** TIMG_T1_ALARM_LO : R/W; bitpos: [31:0]; default: 0;
+ *  Timer 1 alarm trigger time-base counter value, low 32 bits.
+ */
+#define TIMG_T1_ALARM_LO    0xFFFFFFFFU
+#define TIMG_T1_ALARM_LO_M  (TIMG_T1_ALARM_LO_V << TIMG_T1_ALARM_LO_S)
+#define TIMG_T1_ALARM_LO_V  0xFFFFFFFFU
+#define TIMG_T1_ALARM_LO_S  0
+
+/** TIMG_T1ALARMHI_REG register
+ *  Timer 1 alarm value, high bits
+ */
+#define TIMG_T1ALARMHI_REG(i) (REG_TIMG_BASE(i) + 0x38)
+/** TIMG_T1_ALARM_HI : R/W; bitpos: [21:0]; default: 0;
+ *  Timer 1 alarm trigger time-base counter value, high 22 bits.
+ */
+#define TIMG_T1_ALARM_HI    0x003FFFFFU
+#define TIMG_T1_ALARM_HI_M  (TIMG_T1_ALARM_HI_V << TIMG_T1_ALARM_HI_S)
+#define TIMG_T1_ALARM_HI_V  0x003FFFFFU
+#define TIMG_T1_ALARM_HI_S  0
+
+/** TIMG_T1LOADLO_REG register
+ *  Timer 1 reload value, low 32 bits
+ */
+#define TIMG_T1LOADLO_REG(i) (REG_TIMG_BASE(i) + 0x3c)
+/** TIMG_T1_LOAD_LO : R/W; bitpos: [31:0]; default: 0;
+ *  Low 32 bits of the value that a reload will load onto timer 1 time-base
+ *  Counter.
+ */
+#define TIMG_T1_LOAD_LO    0xFFFFFFFFU
+#define TIMG_T1_LOAD_LO_M  (TIMG_T1_LOAD_LO_V << TIMG_T1_LOAD_LO_S)
+#define TIMG_T1_LOAD_LO_V  0xFFFFFFFFU
+#define TIMG_T1_LOAD_LO_S  0
+
+/** TIMG_T1LOADHI_REG register
+ *  Timer 1 reload value, high 22 bits
+ */
+#define TIMG_T1LOADHI_REG(i) (REG_TIMG_BASE(i) + 0x40)
+/** TIMG_T1_LOAD_HI : R/W; bitpos: [21:0]; default: 0;
+ *  High 22 bits of the value that a reload will load onto timer 1 time-base
+ *  counter.
+ */
+#define TIMG_T1_LOAD_HI    0x003FFFFFU
+#define TIMG_T1_LOAD_HI_M  (TIMG_T1_LOAD_HI_V << TIMG_T1_LOAD_HI_S)
+#define TIMG_T1_LOAD_HI_V  0x003FFFFFU
+#define TIMG_T1_LOAD_HI_S  0
+
+/** TIMG_T1LOAD_REG register
+ *  Write to reload timer from TIMG_T1_(LOADLOLOADHI)_REG
+ */
+#define TIMG_T1LOAD_REG(i) (REG_TIMG_BASE(i) + 0x44)
+/** TIMG_T1_LOAD : WT; bitpos: [31:0]; default: 0;
+ *
+ *  Write any value to trigger a timer 1 time-base counter reload.
+ */
+#define TIMG_T1_LOAD    0xFFFFFFFFU
+#define TIMG_T1_LOAD_M  (TIMG_T1_LOAD_V << TIMG_T1_LOAD_S)
+#define TIMG_T1_LOAD_V  0xFFFFFFFFU
+#define TIMG_T1_LOAD_S  0
+
+/** TIMG_WDTCONFIG0_REG register
+ *  Watchdog timer configuration register
+ */
+#define TIMG_WDTCONFIG0_REG(i) (REG_TIMG_BASE(i) + 0x48)
+/** TIMG_WDT_APPCPU_RESET_EN : R/W; bitpos: [12]; default: 0;
+ *  Reserved
+ */
+#define TIMG_WDT_APPCPU_RESET_EN    (BIT(12))
+#define TIMG_WDT_APPCPU_RESET_EN_M  (TIMG_WDT_APPCPU_RESET_EN_V << TIMG_WDT_APPCPU_RESET_EN_S)
+#define TIMG_WDT_APPCPU_RESET_EN_V  0x00000001U
+#define TIMG_WDT_APPCPU_RESET_EN_S  12
+/** TIMG_WDT_PROCPU_RESET_EN : R/W; bitpos: [13]; default: 0;
+ *  WDT reset CPU enable.
+ */
+#define TIMG_WDT_PROCPU_RESET_EN    (BIT(13))
+#define TIMG_WDT_PROCPU_RESET_EN_M  (TIMG_WDT_PROCPU_RESET_EN_V << TIMG_WDT_PROCPU_RESET_EN_S)
+#define TIMG_WDT_PROCPU_RESET_EN_V  0x00000001U
+#define TIMG_WDT_PROCPU_RESET_EN_S  13
+/** TIMG_WDT_FLASHBOOT_MOD_EN : R/W; bitpos: [14]; default: 1;
+ *  When set, Flash boot protection is enabled.
+ */
+#define TIMG_WDT_FLASHBOOT_MOD_EN    (BIT(14))
+#define TIMG_WDT_FLASHBOOT_MOD_EN_M  (TIMG_WDT_FLASHBOOT_MOD_EN_V << TIMG_WDT_FLASHBOOT_MOD_EN_S)
+#define TIMG_WDT_FLASHBOOT_MOD_EN_V  0x00000001U
+#define TIMG_WDT_FLASHBOOT_MOD_EN_S  14
+/** TIMG_WDT_SYS_RESET_LENGTH : R/W; bitpos: [17:15]; default: 1;
+ *  System reset signal length selection. 0: 100 ns, 1: 200 ns,
+ *  2: 300 ns, 3: 400 ns, 4: 500 ns, 5: 800 ns, 6: 1.6 us, 7: 3.2 us.
+ */
+#define TIMG_WDT_SYS_RESET_LENGTH    0x00000007U
+#define TIMG_WDT_SYS_RESET_LENGTH_M  (TIMG_WDT_SYS_RESET_LENGTH_V << TIMG_WDT_SYS_RESET_LENGTH_S)
+#define TIMG_WDT_SYS_RESET_LENGTH_V  0x00000007U
+#define TIMG_WDT_SYS_RESET_LENGTH_S  15
+/** TIMG_WDT_CPU_RESET_LENGTH : R/W; bitpos: [20:18]; default: 1;
+ *  CPU reset signal length selection. 0: 100 ns, 1: 200 ns,
+ *  2: 300 ns, 3: 400 ns, 4: 500 ns, 5: 800 ns, 6: 1.6 us, 7: 3.2 us.
+ */
+#define TIMG_WDT_CPU_RESET_LENGTH    0x00000007U
+#define TIMG_WDT_CPU_RESET_LENGTH_M  (TIMG_WDT_CPU_RESET_LENGTH_V << TIMG_WDT_CPU_RESET_LENGTH_S)
+#define TIMG_WDT_CPU_RESET_LENGTH_V  0x00000007U
+#define TIMG_WDT_CPU_RESET_LENGTH_S  18
+/** TIMG_WDT_STG3 : R/W; bitpos: [24:23]; default: 0;
+ *  Stage 3 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.
+ */
+#define TIMG_WDT_STG3    0x00000003U
+#define TIMG_WDT_STG3_M  (TIMG_WDT_STG3_V << TIMG_WDT_STG3_S)
+#define TIMG_WDT_STG3_V  0x00000003U
+#define TIMG_WDT_STG3_S  23
+/** TIMG_WDT_STG2 : R/W; bitpos: [26:25]; default: 0;
+ *  Stage 2 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.
+ */
+#define TIMG_WDT_STG2    0x00000003U
+#define TIMG_WDT_STG2_M  (TIMG_WDT_STG2_V << TIMG_WDT_STG2_S)
+#define TIMG_WDT_STG2_V  0x00000003U
+#define TIMG_WDT_STG2_S  25
+/** TIMG_WDT_STG1 : R/W; bitpos: [28:27]; default: 0;
+ *  Stage 1 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.
+ */
+#define TIMG_WDT_STG1    0x00000003U
+#define TIMG_WDT_STG1_M  (TIMG_WDT_STG1_V << TIMG_WDT_STG1_S)
+#define TIMG_WDT_STG1_V  0x00000003U
+#define TIMG_WDT_STG1_S  27
+/** TIMG_WDT_STG0 : R/W; bitpos: [30:29]; default: 0;
+ *  Stage 0 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.
+ */
+#define TIMG_WDT_STG0    0x00000003U
+#define TIMG_WDT_STG0_M  (TIMG_WDT_STG0_V << TIMG_WDT_STG0_S)
+#define TIMG_WDT_STG0_V  0x00000003U
+#define TIMG_WDT_STG0_S  29
+/** TIMG_WDT_EN : R/W; bitpos: [31]; default: 0;
+ *  When set, MWDT is enabled.
+ */
+#define TIMG_WDT_EN    (BIT(31))
+#define TIMG_WDT_EN_M  (TIMG_WDT_EN_V << TIMG_WDT_EN_S)
+#define TIMG_WDT_EN_V  0x00000001U
+#define TIMG_WDT_EN_S  31
+
+/** TIMG_WDTCONFIG1_REG register
+ *  Watchdog timer prescaler register
+ */
+#define TIMG_WDTCONFIG1_REG(i) (REG_TIMG_BASE(i) + 0x4c)
+/** TIMG_WDT_CLK_PRESCALE : R/W; bitpos: [31:16]; default: 1;
+ *  MWDT clock prescaler value. MWDT clock period = 12.5 ns *
+ *  TIMG_WDT_CLK_PRESCALE.
+ */
+#define TIMG_WDT_CLK_PRESCALE    0x0000FFFFU
+#define TIMG_WDT_CLK_PRESCALE_M  (TIMG_WDT_CLK_PRESCALE_V << TIMG_WDT_CLK_PRESCALE_S)
+#define TIMG_WDT_CLK_PRESCALE_V  0x0000FFFFU
+#define TIMG_WDT_CLK_PRESCALE_S  16
+
+/** TIMG_WDTCONFIG2_REG register
+ *  Watchdog timer stage 0 timeout value
+ */
+#define TIMG_WDTCONFIG2_REG(i) (REG_TIMG_BASE(i) + 0x50)
+/** TIMG_WDT_STG0_HOLD : R/W; bitpos: [31:0]; default: 26000000;
+ *  Stage 0 timeout value, in MWDT clock cycles.
+ */
+#define TIMG_WDT_STG0_HOLD    0xFFFFFFFFU
+#define TIMG_WDT_STG0_HOLD_M  (TIMG_WDT_STG0_HOLD_V << TIMG_WDT_STG0_HOLD_S)
+#define TIMG_WDT_STG0_HOLD_V  0xFFFFFFFFU
+#define TIMG_WDT_STG0_HOLD_S  0
+
+/** TIMG_WDTCONFIG3_REG register
+ *  Watchdog timer stage 1 timeout value
+ */
+#define TIMG_WDTCONFIG3_REG(i) (REG_TIMG_BASE(i) + 0x54)
+/** TIMG_WDT_STG1_HOLD : R/W; bitpos: [31:0]; default: 134217727;
+ *  Stage 1 timeout value, in MWDT clock cycles.
+ */
+#define TIMG_WDT_STG1_HOLD    0xFFFFFFFFU
+#define TIMG_WDT_STG1_HOLD_M  (TIMG_WDT_STG1_HOLD_V << TIMG_WDT_STG1_HOLD_S)
+#define TIMG_WDT_STG1_HOLD_V  0xFFFFFFFFU
+#define TIMG_WDT_STG1_HOLD_S  0
+
+/** TIMG_WDTCONFIG4_REG register
+ *  Watchdog timer stage 2 timeout value
+ */
+#define TIMG_WDTCONFIG4_REG(i) (REG_TIMG_BASE(i) + 0x58)
+/** TIMG_WDT_STG2_HOLD : R/W; bitpos: [31:0]; default: 1048575;
+ *  Stage 2 timeout value, in MWDT clock cycles.
+ */
+#define TIMG_WDT_STG2_HOLD    0xFFFFFFFFU
+#define TIMG_WDT_STG2_HOLD_M  (TIMG_WDT_STG2_HOLD_V << TIMG_WDT_STG2_HOLD_S)
+#define TIMG_WDT_STG2_HOLD_V  0xFFFFFFFFU
+#define TIMG_WDT_STG2_HOLD_S  0
+
+/** TIMG_WDTCONFIG5_REG register
+ *  Watchdog timer stage 3 timeout value
+ */
+#define TIMG_WDTCONFIG5_REG(i) (REG_TIMG_BASE(i) + 0x5c)
+/** TIMG_WDT_STG3_HOLD : R/W; bitpos: [31:0]; default: 1048575;
+ *  Stage 3 timeout value, in MWDT clock cycles.
+ */
+#define TIMG_WDT_STG3_HOLD    0xFFFFFFFFU
+#define TIMG_WDT_STG3_HOLD_M  (TIMG_WDT_STG3_HOLD_V << TIMG_WDT_STG3_HOLD_S)
+#define TIMG_WDT_STG3_HOLD_V  0xFFFFFFFFU
+#define TIMG_WDT_STG3_HOLD_S  0
+
+/** TIMG_WDTFEED_REG register
+ *  Write to feed the watchdog timer
+ */
+#define TIMG_WDTFEED_REG(i) (REG_TIMG_BASE(i) + 0x60)
+/** TIMG_WDT_FEED : WT; bitpos: [31:0]; default: 0;
+ *  Write any value to feed the MWDT. (WO)
+ */
+#define TIMG_WDT_FEED    0xFFFFFFFFU
+#define TIMG_WDT_FEED_M  (TIMG_WDT_FEED_V << TIMG_WDT_FEED_S)
+#define TIMG_WDT_FEED_V  0xFFFFFFFFU
+#define TIMG_WDT_FEED_S  0
+
+/** TIMG_WDTWPROTECT_REG register
+ *  Watchdog write protect register
+ */
+#define TIMG_WDTWPROTECT_REG(i) (REG_TIMG_BASE(i) + 0x64)
+/** TIMG_WDT_WKEY : R/W; bitpos: [31:0]; default: 1356348065;
+ *  If the register contains a different value than its reset value, write
+ *  protection is enabled.
+ */
+#define TIMG_WDT_WKEY    0xFFFFFFFFU
+#define TIMG_WDT_WKEY_M  (TIMG_WDT_WKEY_V << TIMG_WDT_WKEY_S)
+#define TIMG_WDT_WKEY_V  0xFFFFFFFFU
+#define TIMG_WDT_WKEY_S  0
+
+/** TIMG_RTCCALICFG_REG register
+ *  RTC calibration configure register
+ */
+#define TIMG_RTCCALICFG_REG(i) (REG_TIMG_BASE(i) + 0x68)
+/** TIMG_RTC_CALI_START_CYCLING : R/W; bitpos: [12]; default: 1;
+ *  Reserved
+ */
+#define TIMG_RTC_CALI_START_CYCLING    (BIT(12))
+#define TIMG_RTC_CALI_START_CYCLING_M  (TIMG_RTC_CALI_START_CYCLING_V << TIMG_RTC_CALI_START_CYCLING_S)
+#define TIMG_RTC_CALI_START_CYCLING_V  0x00000001U
+#define TIMG_RTC_CALI_START_CYCLING_S  12
+/** TIMG_RTC_CALI_CLK_SEL : R/W; bitpos: [14:13]; default: 1;
+ *  0:rtc slow clock. 1:clk_80m.  2:xtal_32k.
+ */
+#define TIMG_RTC_CALI_CLK_SEL    0x00000003U
+#define TIMG_RTC_CALI_CLK_SEL_M  (TIMG_RTC_CALI_CLK_SEL_V << TIMG_RTC_CALI_CLK_SEL_S)
+#define TIMG_RTC_CALI_CLK_SEL_V  0x00000003U
+#define TIMG_RTC_CALI_CLK_SEL_S  13
+/** TIMG_RTC_CALI_RDY : RO; bitpos: [15]; default: 0;
+ *  Reserved
+ */
+#define TIMG_RTC_CALI_RDY    (BIT(15))
+#define TIMG_RTC_CALI_RDY_M  (TIMG_RTC_CALI_RDY_V << TIMG_RTC_CALI_RDY_S)
+#define TIMG_RTC_CALI_RDY_V  0x00000001U
+#define TIMG_RTC_CALI_RDY_S  15
+/** TIMG_RTC_CALI_MAX : R/W; bitpos: [30:16]; default: 1;
+ *  Reserved
+ */
+#define TIMG_RTC_CALI_MAX    0x00007FFFU
+#define TIMG_RTC_CALI_MAX_M  (TIMG_RTC_CALI_MAX_V << TIMG_RTC_CALI_MAX_S)
+#define TIMG_RTC_CALI_MAX_V  0x00007FFFU
+#define TIMG_RTC_CALI_MAX_S  16
+/** TIMG_RTC_CALI_START : R/W; bitpos: [31]; default: 0;
+ *  Reserved
+ */
+#define TIMG_RTC_CALI_START    (BIT(31))
+#define TIMG_RTC_CALI_START_M  (TIMG_RTC_CALI_START_V << TIMG_RTC_CALI_START_S)
+#define TIMG_RTC_CALI_START_V  0x00000001U
+#define TIMG_RTC_CALI_START_S  31
+
+/** TIMG_RTCCALICFG1_REG register
+ *  RTC calibration configure1 register
+ */
+#define TIMG_RTCCALICFG1_REG(i) (REG_TIMG_BASE(i) + 0x6c)
+/** TIMG_RTC_CALI_CYCLING_DATA_VLD : RO; bitpos: [0]; default: 0;
+ *  Reserved
+ */
+#define TIMG_RTC_CALI_CYCLING_DATA_VLD    (BIT(0))
+#define TIMG_RTC_CALI_CYCLING_DATA_VLD_M  (TIMG_RTC_CALI_CYCLING_DATA_VLD_V << TIMG_RTC_CALI_CYCLING_DATA_VLD_S)
+#define TIMG_RTC_CALI_CYCLING_DATA_VLD_V  0x00000001U
+#define TIMG_RTC_CALI_CYCLING_DATA_VLD_S  0
+/** TIMG_RTC_CALI_VALUE : RO; bitpos: [31:7]; default: 0;
+ *  Reserved
+ */
+#define TIMG_RTC_CALI_VALUE    0x01FFFFFFU
+#define TIMG_RTC_CALI_VALUE_M  (TIMG_RTC_CALI_VALUE_V << TIMG_RTC_CALI_VALUE_S)
+#define TIMG_RTC_CALI_VALUE_V  0x01FFFFFFU
+#define TIMG_RTC_CALI_VALUE_S  7
+
+/** TIMG_INT_ENA_TIMERS_REG register
+ *  Interrupt enable bits
+ */
+#define TIMG_INT_ENA_TIMERS_REG(i) (REG_TIMG_BASE(i) + 0x70)
+/** TIMG_T0_INT_ENA : R/W; bitpos: [0]; default: 0;
+ *  The interrupt enable bit for the TIMG_T0_INT interrupt.
+ */
+#define TIMG_T0_INT_ENA    (BIT(0))
+#define TIMG_T0_INT_ENA_M  (TIMG_T0_INT_ENA_V << TIMG_T0_INT_ENA_S)
+#define TIMG_T0_INT_ENA_V  0x00000001U
+#define TIMG_T0_INT_ENA_S  0
+/** TIMG_T1_INT_ENA : R/W; bitpos: [1]; default: 0;
+ *  The interrupt enable bit for the TIMG_T1_INT interrupt.
+ */
+#define TIMG_T1_INT_ENA    (BIT(1))
+#define TIMG_T1_INT_ENA_M  (TIMG_T1_INT_ENA_V << TIMG_T1_INT_ENA_S)
+#define TIMG_T1_INT_ENA_V  0x00000001U
+#define TIMG_T1_INT_ENA_S  1
+/** TIMG_WDT_INT_ENA : R/W; bitpos: [2]; default: 0;
+ *  The interrupt enable bit for the TIMG_WDT_INT interrupt.
+ */
+#define TIMG_WDT_INT_ENA    (BIT(2))
+#define TIMG_WDT_INT_ENA_M  (TIMG_WDT_INT_ENA_V << TIMG_WDT_INT_ENA_S)
+#define TIMG_WDT_INT_ENA_V  0x00000001U
+#define TIMG_WDT_INT_ENA_S  2
+
+/** TIMG_INT_RAW_TIMERS_REG register
+ *  Raw interrupt status
+ */
+#define TIMG_INT_RAW_TIMERS_REG(i) (REG_TIMG_BASE(i) + 0x74)
+/** TIMG_T0_INT_RAW : R/WTC/SS; bitpos: [0]; default: 0;
+ *  The raw interrupt status bit for the TIMG_T0_INT interrupt.
+ */
+#define TIMG_T0_INT_RAW    (BIT(0))
+#define TIMG_T0_INT_RAW_M  (TIMG_T0_INT_RAW_V << TIMG_T0_INT_RAW_S)
+#define TIMG_T0_INT_RAW_V  0x00000001U
+#define TIMG_T0_INT_RAW_S  0
+/** TIMG_T1_INT_RAW : R/WTC/SS; bitpos: [1]; default: 0;
+ *  The raw interrupt status bit for the TIMG_T1_INT interrupt.
+ */
+#define TIMG_T1_INT_RAW    (BIT(1))
+#define TIMG_T1_INT_RAW_M  (TIMG_T1_INT_RAW_V << TIMG_T1_INT_RAW_S)
+#define TIMG_T1_INT_RAW_V  0x00000001U
+#define TIMG_T1_INT_RAW_S  1
+/** TIMG_WDT_INT_RAW : R/WTC/SS; bitpos: [2]; default: 0;
+ *  The raw interrupt status bit for the TIMG_WDT_INT interrupt.
+ */
+#define TIMG_WDT_INT_RAW    (BIT(2))
+#define TIMG_WDT_INT_RAW_M  (TIMG_WDT_INT_RAW_V << TIMG_WDT_INT_RAW_S)
+#define TIMG_WDT_INT_RAW_V  0x00000001U
+#define TIMG_WDT_INT_RAW_S  2
+
+/** TIMG_INT_ST_TIMERS_REG register
+ *  Masked interrupt status
+ */
+#define TIMG_INT_ST_TIMERS_REG(i) (REG_TIMG_BASE(i) + 0x78)
+/** TIMG_T0_INT_ST : RO; bitpos: [0]; default: 0;
+ *  The masked interrupt status bit for the TIMG_T0_INT interrupt.
+ */
+#define TIMG_T0_INT_ST    (BIT(0))
+#define TIMG_T0_INT_ST_M  (TIMG_T0_INT_ST_V << TIMG_T0_INT_ST_S)
+#define TIMG_T0_INT_ST_V  0x00000001U
+#define TIMG_T0_INT_ST_S  0
+/** TIMG_T1_INT_ST : RO; bitpos: [1]; default: 0;
+ *  The masked interrupt status bit for the TIMG_T1_INT interrupt.
+ */
+#define TIMG_T1_INT_ST    (BIT(1))
+#define TIMG_T1_INT_ST_M  (TIMG_T1_INT_ST_V << TIMG_T1_INT_ST_S)
+#define TIMG_T1_INT_ST_V  0x00000001U
+#define TIMG_T1_INT_ST_S  1
+/** TIMG_WDT_INT_ST : RO; bitpos: [2]; default: 0;
+ *  The masked interrupt status bit for the TIMG_WDT_INT interrupt.
+ */
+#define TIMG_WDT_INT_ST    (BIT(2))
+#define TIMG_WDT_INT_ST_M  (TIMG_WDT_INT_ST_V << TIMG_WDT_INT_ST_S)
+#define TIMG_WDT_INT_ST_V  0x00000001U
+#define TIMG_WDT_INT_ST_S  2
+
+/** TIMG_INT_CLR_TIMERS_REG register
+ *  Interrupt clear bits
+ */
+#define TIMG_INT_CLR_TIMERS_REG(i) (REG_TIMG_BASE(i) + 0x7c)
+/** TIMG_T0_INT_CLR : WT; bitpos: [0]; default: 0;
+ *  Set this bit to clear the TIMG_T0_INT interrupt.
+ */
+#define TIMG_T0_INT_CLR    (BIT(0))
+#define TIMG_T0_INT_CLR_M  (TIMG_T0_INT_CLR_V << TIMG_T0_INT_CLR_S)
+#define TIMG_T0_INT_CLR_V  0x00000001U
+#define TIMG_T0_INT_CLR_S  0
+/** TIMG_T1_INT_CLR : WT; bitpos: [1]; default: 0;
+ *  Set this bit to clear the TIMG_T1_INT interrupt.
+ */
+#define TIMG_T1_INT_CLR    (BIT(1))
+#define TIMG_T1_INT_CLR_M  (TIMG_T1_INT_CLR_V << TIMG_T1_INT_CLR_S)
+#define TIMG_T1_INT_CLR_V  0x00000001U
+#define TIMG_T1_INT_CLR_S  1
+/** TIMG_WDT_INT_CLR : WT; bitpos: [2]; default: 0;
+ *  Set this bit to clear the TIMG_WDT_INT interrupt.
+ */
+#define TIMG_WDT_INT_CLR    (BIT(2))
+#define TIMG_WDT_INT_CLR_M  (TIMG_WDT_INT_CLR_V << TIMG_WDT_INT_CLR_S)
+#define TIMG_WDT_INT_CLR_V  0x00000001U
+#define TIMG_WDT_INT_CLR_S  2
+
+/** TIMG_RTCCALICFG2_REG register
+ *  Timer group calibration register
+ */
+#define TIMG_RTCCALICFG2_REG(i) (REG_TIMG_BASE(i) + 0x80)
+/** TIMG_RTC_CALI_TIMEOUT : RO; bitpos: [0]; default: 0;
+ *  RTC calibration timeout indicator
+ */
+#define TIMG_RTC_CALI_TIMEOUT    (BIT(0))
+#define TIMG_RTC_CALI_TIMEOUT_M  (TIMG_RTC_CALI_TIMEOUT_V << TIMG_RTC_CALI_TIMEOUT_S)
+#define TIMG_RTC_CALI_TIMEOUT_V  0x00000001U
+#define TIMG_RTC_CALI_TIMEOUT_S  0
+/** TIMG_RTC_CALI_TIMEOUT_RST_CNT : R/W; bitpos: [6:3]; default: 3;
+ *  Cycles that release calibration timeout reset
+ */
+#define TIMG_RTC_CALI_TIMEOUT_RST_CNT    0x0000000FU
+#define TIMG_RTC_CALI_TIMEOUT_RST_CNT_M  (TIMG_RTC_CALI_TIMEOUT_RST_CNT_V << TIMG_RTC_CALI_TIMEOUT_RST_CNT_S)
+#define TIMG_RTC_CALI_TIMEOUT_RST_CNT_V  0x0000000FU
+#define TIMG_RTC_CALI_TIMEOUT_RST_CNT_S  3
+/** TIMG_RTC_CALI_TIMEOUT_THRES : R/W; bitpos: [31:7]; default: 33554431;
+ *  Threshold value for the RTC calibration timer. If the calibration timer's value
+ *  exceeds this threshold, a timeout is triggered.
+ */
+#define TIMG_RTC_CALI_TIMEOUT_THRES    0x01FFFFFFU
+#define TIMG_RTC_CALI_TIMEOUT_THRES_M  (TIMG_RTC_CALI_TIMEOUT_THRES_V << TIMG_RTC_CALI_TIMEOUT_THRES_S)
+#define TIMG_RTC_CALI_TIMEOUT_THRES_V  0x01FFFFFFU
+#define TIMG_RTC_CALI_TIMEOUT_THRES_S  7
+
+/** TIMG_NTIMERS_DATE_REG register
+ *  Timer version control register
+ */
+#define TIMG_NTIMERS_DATE_REG(i) (REG_TIMG_BASE(i) + 0xf8)
+/** TIMG_NTIMERS_DATE : R/W; bitpos: [27:0]; default: 33566833;
+ *  Timer version control register
+ */
+#define TIMG_NTIMERS_DATE    0x0FFFFFFFU
+#define TIMG_NTIMERS_DATE_M  (TIMG_NTIMERS_DATE_V << TIMG_NTIMERS_DATE_S)
+#define TIMG_NTIMERS_DATE_V  0x0FFFFFFFU
+#define TIMG_NTIMERS_DATE_S  0
+
+/** TIMG_REGCLK_REG register
+ *  Timer group clock gate register
+ */
+#define TIMG_REGCLK_REG(i) (REG_TIMG_BASE(i) + 0xfc)
+/** TIMG_CLK_EN : R/W; bitpos: [31]; default: 0;
+ *  Register clock gate signal. 1: The clock for software to read and write registers
+ *  is always on. 0: The clock for software to read and write registers only exits when
+ *  the operation happens.
+ */
+#define TIMG_CLK_EN    (BIT(31))
+#define TIMG_CLK_EN_M  (TIMG_CLK_EN_V << TIMG_CLK_EN_S)
+#define TIMG_CLK_EN_V  0x00000001U
+#define TIMG_CLK_EN_S  31
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/timer_group_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/timer_group_struct.h
new file mode 100644
index 00000000000..8d5e4a6be77
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/timer_group_struct.h
@@ -0,0 +1,559 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Group: Configuration and control registers */
+/** Type of tnconfig register
+ *  Timer n configuration register
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0:9;
+        /** tn_use_xtal : R/W; bitpos: [9]; default: 0;
+         *  1: Use XTAL_CLK as the source clock of timer group. 0: Use APB_CLK as the source
+         *  clock of timer group.
+         */
+        uint32_t tn_use_xtal:1;
+        /** tn_alarm_en : R/W/SC; bitpos: [10]; default: 0;
+         *  When set, the alarm is enabled. This bit is automatically cleared once an
+         *  alarm occurs.
+         */
+        uint32_t tn_alarm_en:1;
+        uint32_t reserved_11:2;
+        /** tn_divider : R/W; bitpos: [28:13]; default: 1;
+         *  Timer n clock (Tn_clk) prescaler value.
+         */
+        uint32_t tn_divider:16;
+        /** tn_autoreload : R/W; bitpos: [29]; default: 1;
+         *  When set, timer n auto-reload at alarm is enabled.
+         */
+        uint32_t tn_autoreload:1;
+        /** tn_increase : R/W; bitpos: [30]; default: 1;
+         *  When set, the timer n time-base counter will increment every clock tick. When
+         *  cleared, the timer n time-base counter will decrement.
+         */
+        uint32_t tn_increase:1;
+        /** tn_en : R/W; bitpos: [31]; default: 0;
+         *  When set, the timer n time-base counter is enabled.
+         */
+        uint32_t tn_en:1;
+    };
+    uint32_t val;
+} timg_tnconfig_reg_t;
+
+/** Type of tnlo register
+ *  Timer n current value, low 32 bits
+ */
+typedef union {
+    struct {
+        /** tn_lo : RO; bitpos: [31:0]; default: 0;
+         *  After writing to TIMG_TnUPDATE_REG, the low 32 bits of the time-base counter
+         *  of timer n can be read here.
+         */
+        uint32_t tn_lo:32;
+    };
+    uint32_t val;
+} timg_tnlo_reg_t;
+
+/** Type of tnhi register
+ *  Timer n current value, high 22 bits
+ */
+typedef union {
+    struct {
+        /** tn_hi : RO; bitpos: [21:0]; default: 0;
+         *  After writing to TIMG_TnUPDATE_REG, the high 22 bits of the time-base counter
+         *  of timer n can be read here.
+         */
+        uint32_t tn_hi:22;
+        uint32_t reserved_22:10;
+    };
+    uint32_t val;
+} timg_tnhi_reg_t;
+
+/** Type of tnupdate register
+ *  Write to copy current timer value to TIMGn_Tn_(LO/HI)_REG
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0:31;
+        /** tn_update : R/W/SC; bitpos: [31]; default: 0;
+         *  After writing 0 or 1 to TIMG_TnUPDATE_REG, the counter value is latched.
+         */
+        uint32_t tn_update:1;
+    };
+    uint32_t val;
+} timg_tnupdate_reg_t;
+
+/** Type of tnalarmlo register
+ *  Timer n alarm value, low 32 bits
+ */
+typedef union {
+    struct {
+        /** tn_alarm_lo : R/W; bitpos: [31:0]; default: 0;
+         *  Timer n alarm trigger time-base counter value, low 32 bits.
+         */
+        uint32_t tn_alarm_lo:32;
+    };
+    uint32_t val;
+} timg_tnalarmlo_reg_t;
+
+/** Type of tnalarmhi register
+ *  Timer n alarm value, high bits
+ */
+typedef union {
+    struct {
+        /** tn_alarm_hi : R/W; bitpos: [21:0]; default: 0;
+         *  Timer n alarm trigger time-base counter value, high 22 bits.
+         */
+        uint32_t tn_alarm_hi:22;
+        uint32_t reserved_22:10;
+    };
+    uint32_t val;
+} timg_tnalarmhi_reg_t;
+
+/** Type of tnloadlo register
+ *  Timer n reload value, low 32 bits
+ */
+typedef union {
+    struct {
+        /** tn_load_lo : R/W; bitpos: [31:0]; default: 0;
+         *  Low 32 bits of the value that a reload will load onto timer n time-base
+         *  Counter.
+         */
+        uint32_t tn_load_lo:32;
+    };
+    uint32_t val;
+} timg_tnloadlo_reg_t;
+
+/** Type of tnloadhi register
+ *  Timer n reload value, high 22 bits
+ */
+typedef union {
+    struct {
+        /** tn_load_hi : R/W; bitpos: [21:0]; default: 0;
+         *  High 22 bits of the value that a reload will load onto timer n time-base
+         *  counter.
+         */
+        uint32_t tn_load_hi:22;
+        uint32_t reserved_22:10;
+    };
+    uint32_t val;
+} timg_tnloadhi_reg_t;
+
+/** Type of tnload register
+ *  Write to reload timer from TIMG_Tn_(LOADLOLOADHI)_REG
+ */
+typedef union {
+    struct {
+        /** tn_load : WT; bitpos: [31:0]; default: 0;
+         *
+         *  Write any value to trigger a timer n time-base counter reload.
+         */
+        uint32_t tn_load:32;
+    };
+    uint32_t val;
+} timg_tnload_reg_t;
+
+
+/** Group: Configuration and control registers for WDT */
+/** Type of wdtconfig0 register
+ *  Watchdog timer configuration register
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0:12;
+        /** wdt_appcpu_reset_en : R/W; bitpos: [12]; default: 0;
+         *  Reserved
+         */
+        uint32_t wdt_appcpu_reset_en:1;
+        /** wdt_procpu_reset_en : R/W; bitpos: [13]; default: 0;
+         *  WDT reset CPU enable.
+         */
+        uint32_t wdt_procpu_reset_en:1;
+        /** wdt_flashboot_mod_en : R/W; bitpos: [14]; default: 1;
+         *  When set, Flash boot protection is enabled.
+         */
+        uint32_t wdt_flashboot_mod_en:1;
+        /** wdt_sys_reset_length : R/W; bitpos: [17:15]; default: 1;
+         *  System reset signal length selection. 0: 100 ns, 1: 200 ns,
+         *  2: 300 ns, 3: 400 ns, 4: 500 ns, 5: 800 ns, 6: 1.6 us, 7: 3.2 us.
+         */
+        uint32_t wdt_sys_reset_length:3;
+        /** wdt_cpu_reset_length : R/W; bitpos: [20:18]; default: 1;
+         *  CPU reset signal length selection. 0: 100 ns, 1: 200 ns,
+         *  2: 300 ns, 3: 400 ns, 4: 500 ns, 5: 800 ns, 6: 1.6 us, 7: 3.2 us.
+         */
+        uint32_t wdt_cpu_reset_length:3;
+        uint32_t reserved_21:2;
+        /** wdt_stg3 : R/W; bitpos: [24:23]; default: 0;
+         *  Stage 3 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.
+         */
+        uint32_t wdt_stg3:2;
+        /** wdt_stg2 : R/W; bitpos: [26:25]; default: 0;
+         *  Stage 2 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.
+         */
+        uint32_t wdt_stg2:2;
+        /** wdt_stg1 : R/W; bitpos: [28:27]; default: 0;
+         *  Stage 1 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.
+         */
+        uint32_t wdt_stg1:2;
+        /** wdt_stg0 : R/W; bitpos: [30:29]; default: 0;
+         *  Stage 0 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.
+         */
+        uint32_t wdt_stg0:2;
+        /** wdt_en : R/W; bitpos: [31]; default: 0;
+         *  When set, MWDT is enabled.
+         */
+        uint32_t wdt_en:1;
+    };
+    uint32_t val;
+} timg_wdtconfig0_reg_t;
+
+/** Type of wdtconfig1 register
+ *  Watchdog timer prescaler register
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0:16;
+        /** wdt_clk_prescale : R/W; bitpos: [31:16]; default: 1;
+         *  MWDT clock prescaler value. MWDT clock period = 12.5 ns *
+         *  TIMG_WDT_CLK_PRESCALE.
+         */
+        uint32_t wdt_clk_prescale:16;
+    };
+    uint32_t val;
+} timg_wdtconfig1_reg_t;
+
+/** Type of wdtconfig2 register
+ *  Watchdog timer stage 0 timeout value
+ */
+typedef union {
+    struct {
+        /** wdt_stg0_hold : R/W; bitpos: [31:0]; default: 26000000;
+         *  Stage 0 timeout value, in MWDT clock cycles.
+         */
+        uint32_t wdt_stg0_hold:32;
+    };
+    uint32_t val;
+} timg_wdtconfig2_reg_t;
+
+/** Type of wdtconfig3 register
+ *  Watchdog timer stage 1 timeout value
+ */
+typedef union {
+    struct {
+        /** wdt_stg1_hold : R/W; bitpos: [31:0]; default: 134217727;
+         *  Stage 1 timeout value, in MWDT clock cycles.
+         */
+        uint32_t wdt_stg1_hold:32;
+    };
+    uint32_t val;
+} timg_wdtconfig3_reg_t;
+
+/** Type of wdtconfig4 register
+ *  Watchdog timer stage 2 timeout value
+ */
+typedef union {
+    struct {
+        /** wdt_stg2_hold : R/W; bitpos: [31:0]; default: 1048575;
+         *  Stage 2 timeout value, in MWDT clock cycles.
+         */
+        uint32_t wdt_stg2_hold:32;
+    };
+    uint32_t val;
+} timg_wdtconfig4_reg_t;
+
+/** Type of wdtconfig5 register
+ *  Watchdog timer stage 3 timeout value
+ */
+typedef union {
+    struct {
+        /** wdt_stg3_hold : R/W; bitpos: [31:0]; default: 1048575;
+         *  Stage 3 timeout value, in MWDT clock cycles.
+         */
+        uint32_t wdt_stg3_hold:32;
+    };
+    uint32_t val;
+} timg_wdtconfig5_reg_t;
+
+/** Type of wdtfeed register
+ *  Write to feed the watchdog timer
+ */
+typedef union {
+    struct {
+        /** wdt_feed : WT; bitpos: [31:0]; default: 0;
+         *  Write any value to feed the MWDT. (WO)
+         */
+        uint32_t wdt_feed:32;
+    };
+    uint32_t val;
+} timg_wdtfeed_reg_t;
+
+/** Type of wdtwprotect register
+ *  Watchdog write protect register
+ */
+typedef union {
+    struct {
+        /** wdt_wkey : R/W; bitpos: [31:0]; default: 1356348065;
+         *  If the register contains a different value than its reset value, write
+         *  protection is enabled.
+         */
+        uint32_t wdt_wkey:32;
+    };
+    uint32_t val;
+} timg_wdtwprotect_reg_t;
+
+
+/** Group: Configuration and control registers for RTC CALI */
+/** Type of rtccalicfg register
+ *  RTC calibration configure register
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0:12;
+        /** rtc_cali_start_cycling : R/W; bitpos: [12]; default: 1;
+         *  Reserved
+         */
+        uint32_t rtc_cali_start_cycling:1;
+        /** rtc_cali_clk_sel : R/W; bitpos: [14:13]; default: 1;
+         *  0:rtc slow clock. 1:clk_80m.  2:xtal_32k.
+         */
+        uint32_t rtc_cali_clk_sel:2;
+        /** rtc_cali_rdy : RO; bitpos: [15]; default: 0;
+         *  Reserved
+         */
+        uint32_t rtc_cali_rdy:1;
+        /** rtc_cali_max : R/W; bitpos: [30:16]; default: 1;
+         *  Reserved
+         */
+        uint32_t rtc_cali_max:15;
+        /** rtc_cali_start : R/W; bitpos: [31]; default: 0;
+         *  Reserved
+         */
+        uint32_t rtc_cali_start:1;
+    };
+    uint32_t val;
+} timg_rtccalicfg_reg_t;
+
+/** Type of rtccalicfg1 register
+ *  RTC calibration configure1 register
+ */
+typedef union {
+    struct {
+        /** rtc_cali_cycling_data_vld : RO; bitpos: [0]; default: 0;
+         *  Reserved
+         */
+        uint32_t rtc_cali_cycling_data_vld:1;
+        uint32_t reserved_1:6;
+        /** rtc_cali_value : RO; bitpos: [31:7]; default: 0;
+         *  Reserved
+         */
+        uint32_t rtc_cali_value:25;
+    };
+    uint32_t val;
+} timg_rtccalicfg1_reg_t;
+
+/** Type of rtccalicfg2 register
+ *  Timer group calibration register
+ */
+typedef union {
+    struct {
+        /** rtc_cali_timeout : RO; bitpos: [0]; default: 0;
+         *  RTC calibration timeout indicator
+         */
+        uint32_t rtc_cali_timeout:1;
+        uint32_t reserved_1:2;
+        /** rtc_cali_timeout_rst_cnt : R/W; bitpos: [6:3]; default: 3;
+         *  Cycles that release calibration timeout reset
+         */
+        uint32_t rtc_cali_timeout_rst_cnt:4;
+        /** rtc_cali_timeout_thres : R/W; bitpos: [31:7]; default: 33554431;
+         *  Threshold value for the RTC calibration timer. If the calibration timer's value
+         *  exceeds this threshold, a timeout is triggered.
+         */
+        uint32_t rtc_cali_timeout_thres:25;
+    };
+    uint32_t val;
+} timg_rtccalicfg2_reg_t;
+
+
+/** Group: Interrupt registers */
+/** Type of int_ena_timers register
+ *  Interrupt enable bits
+ */
+typedef union {
+    struct {
+        /** t0_int_ena : R/W; bitpos: [0]; default: 0;
+         *  The interrupt enable bit for the TIMG_T0_INT interrupt.
+         */
+        uint32_t t0_int_ena:1;
+        /** t1_int_ena : R/W; bitpos: [1]; default: 0;
+         *  The interrupt enable bit for the TIMG_T1_INT interrupt.
+         */
+        uint32_t t1_int_ena:1;
+        /** wdt_int_ena : R/W; bitpos: [2]; default: 0;
+         *  The interrupt enable bit for the TIMG_WDT_INT interrupt.
+         */
+        uint32_t wdt_int_ena:1;
+        uint32_t reserved_3:29;
+    };
+    uint32_t val;
+} timg_int_ena_timers_reg_t;
+
+/** Type of int_raw_timers register
+ *  Raw interrupt status
+ */
+typedef union {
+    struct {
+        /** t0_int_raw : R/WTC/SS; bitpos: [0]; default: 0;
+         *  The raw interrupt status bit for the TIMG_T0_INT interrupt.
+         */
+        uint32_t t0_int_raw:1;
+        /** t1_int_raw : R/WTC/SS; bitpos: [1]; default: 0;
+         *  The raw interrupt status bit for the TIMG_T1_INT interrupt.
+         */
+        uint32_t t1_int_raw:1;
+        /** wdt_int_raw : R/WTC/SS; bitpos: [2]; default: 0;
+         *  The raw interrupt status bit for the TIMG_WDT_INT interrupt.
+         */
+        uint32_t wdt_int_raw:1;
+        uint32_t reserved_3:29;
+    };
+    uint32_t val;
+} timg_int_raw_timers_reg_t;
+
+/** Type of int_st_timers register
+ *  Masked interrupt status
+ */
+typedef union {
+    struct {
+        /** t0_int_st : RO; bitpos: [0]; default: 0;
+         *  The masked interrupt status bit for the TIMG_T0_INT interrupt.
+         */
+        uint32_t t0_int_st:1;
+        /** t1_int_st : RO; bitpos: [1]; default: 0;
+         *  The masked interrupt status bit for the TIMG_T1_INT interrupt.
+         */
+        uint32_t t1_int_st:1;
+        /** wdt_int_st : RO; bitpos: [2]; default: 0;
+         *  The masked interrupt status bit for the TIMG_WDT_INT interrupt.
+         */
+        uint32_t wdt_int_st:1;
+        uint32_t reserved_3:29;
+    };
+    uint32_t val;
+} timg_int_st_timers_reg_t;
+
+/** Type of int_clr_timers register
+ *  Interrupt clear bits
+ */
+typedef union {
+    struct {
+        /** t0_int_clr : WT; bitpos: [0]; default: 0;
+         *  Set this bit to clear the TIMG_T0_INT interrupt.
+         */
+        uint32_t t0_int_clr:1;
+        /** t1_int_clr : WT; bitpos: [1]; default: 0;
+         *  Set this bit to clear the TIMG_T1_INT interrupt.
+         */
+        uint32_t t1_int_clr:1;
+        /** wdt_int_clr : WT; bitpos: [2]; default: 0;
+         *  Set this bit to clear the TIMG_WDT_INT interrupt.
+         */
+        uint32_t wdt_int_clr:1;
+        uint32_t reserved_3:29;
+    };
+    uint32_t val;
+} timg_int_clr_timers_reg_t;
+
+
+/** Group: Configuration registers */
+/** Type of ntimers_date register
+ *  Timer version control register
+ */
+typedef union {
+    struct {
+        /** ntimers_date : R/W; bitpos: [27:0]; default: 33566833;
+         *  Timer version control register
+         */
+        uint32_t ntimers_date:28;
+        uint32_t reserved_28:4;
+    };
+    uint32_t val;
+} timg_ntimers_date_reg_t;
+
+/** Type of regclk register
+ *  Timer group clock gate register
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0:31;
+        /** clk_en : R/W; bitpos: [31]; default: 0;
+         *  Register clock gate signal. 1: The clock for software to read and write registers
+         *  is always on. 0: The clock for software to read and write registers only exits when
+         *  the operation happens.
+         */
+        uint32_t clk_en:1;
+    };
+    uint32_t val;
+} timg_regclk_reg_t;
+
+typedef struct {
+    volatile timg_tnconfig_reg_t config;
+    volatile timg_tnlo_reg_t lo;
+    volatile timg_tnhi_reg_t hi;
+    volatile timg_tnupdate_reg_t update;
+    volatile timg_tnalarmlo_reg_t alarmlo;
+    volatile timg_tnalarmhi_reg_t alarmhi;
+    volatile timg_tnloadlo_reg_t loadlo;
+    volatile timg_tnloadhi_reg_t loadhi;
+    volatile timg_tnload_reg_t load;
+} timg_hwtimer_reg_t;
+
+typedef struct {
+    volatile timg_hwtimer_reg_t hw_timer[2];
+    volatile timg_wdtconfig0_reg_t wdtconfig0;
+    volatile timg_wdtconfig1_reg_t wdtconfig1;
+    volatile timg_wdtconfig2_reg_t wdtconfig2;
+    volatile timg_wdtconfig3_reg_t wdtconfig3;
+    volatile timg_wdtconfig4_reg_t wdtconfig4;
+    volatile timg_wdtconfig5_reg_t wdtconfig5;
+    volatile timg_wdtfeed_reg_t wdtfeed;
+    volatile timg_wdtwprotect_reg_t wdtwprotect;
+    volatile timg_rtccalicfg_reg_t rtccalicfg;
+    volatile timg_rtccalicfg1_reg_t rtccalicfg1;
+    volatile timg_int_ena_timers_reg_t int_ena_timers;
+    volatile timg_int_raw_timers_reg_t int_raw_timers;
+    volatile timg_int_st_timers_reg_t int_st_timers;
+    volatile timg_int_clr_timers_reg_t int_clr_timers;
+    volatile timg_rtccalicfg2_reg_t rtccalicfg2;
+    uint32_t reserved_084[29];
+    volatile timg_ntimers_date_reg_t ntimers_date;
+    volatile timg_regclk_reg_t regclk;
+} timg_dev_t;
+
+extern timg_dev_t TIMERG0;
+extern timg_dev_t TIMERG1;
+
+_Static_assert(sizeof(timg_dev_t) == 0x100, "Invalid size of timg_dev_t structure");
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/touch_channel.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/touch_channel.h
new file mode 100644
index 00000000000..d0921c59ae1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/touch_channel.h
@@ -0,0 +1,46 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+//Touch channels
+#define TOUCH_PAD_GPIO4_CHANNEL     TOUCH_PAD_NUM0
+#define TOUCH_PAD_NUM0_GPIO_NUM     4
+
+#define TOUCH_PAD_GPIO0_CHANNEL     TOUCH_PAD_NUM1
+#define TOUCH_PAD_NUM1_GPIO_NUM     0
+
+#define TOUCH_PAD_GPIO2_CHANNEL     TOUCH_PAD_NUM2
+#define TOUCH_PAD_NUM2_GPIO_NUM     2
+
+#define TOUCH_PAD_GPIO15_CHANNEL    TOUCH_PAD_NUM3
+#define TOUCH_PAD_NUM3_GPIO_NUM     15
+
+#define TOUCH_PAD_GPIO13_CHANNEL    TOUCH_PAD_NUM4
+#define TOUCH_PAD_NUM4_GPIO_NUM     13
+
+#define TOUCH_PAD_GPIO12_CHANNEL    TOUCH_PAD_NUM5
+#define TOUCH_PAD_NUM5_GPIO_NUM     12
+
+#define TOUCH_PAD_GPIO14_CHANNEL    TOUCH_PAD_NUM6
+#define TOUCH_PAD_NUM6_GPIO_NUM     14
+
+#define TOUCH_PAD_GPIO27_CHANNEL    TOUCH_PAD_NUM7
+#define TOUCH_PAD_NUM7_GPIO_NUM     27
+
+#define TOUCH_PAD_GPIO33_CHANNEL    TOUCH_PAD_NUM8
+#define TOUCH_PAD_NUM8_GPIO_NUM     33
+
+#define TOUCH_PAD_GPIO32_CHANNEL    TOUCH_PAD_NUM9
+#define TOUCH_PAD_NUM9_GPIO_NUM     32
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/touch_sensor_channel.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/touch_sensor_channel.h
new file mode 100644
index 00000000000..d5065eac4f3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/touch_sensor_channel.h
@@ -0,0 +1,53 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+//Touch channels
+
+/* Note: T0 is an internal channel that does not have a corresponding external GPIO. */
+
+#define TOUCH_PAD_GPIO1_CHANNEL     TOUCH_PAD_NUM1
+#define TOUCH_PAD_NUM1_GPIO_NUM     1
+
+#define TOUCH_PAD_GPIO2_CHANNEL     TOUCH_PAD_NUM2
+#define TOUCH_PAD_NUM2_GPIO_NUM     2
+
+#define TOUCH_PAD_GPIO3_CHANNEL     TOUCH_PAD_NUM3
+#define TOUCH_PAD_NUM3_GPIO_NUM     3
+
+#define TOUCH_PAD_GPIO4_CHANNEL     TOUCH_PAD_NUM4
+#define TOUCH_PAD_NUM4_GPIO_NUM     4
+
+#define TOUCH_PAD_GPIO5_CHANNEL     TOUCH_PAD_NUM5
+#define TOUCH_PAD_NUM5_GPIO_NUM     5
+
+#define TOUCH_PAD_GPIO6_CHANNEL     TOUCH_PAD_NUM6
+#define TOUCH_PAD_NUM6_GPIO_NUM     6
+
+#define TOUCH_PAD_GPIO7_CHANNEL     TOUCH_PAD_NUM7
+#define TOUCH_PAD_NUM7_GPIO_NUM     7
+
+#define TOUCH_PAD_GPIO8_CHANNEL     TOUCH_PAD_NUM8
+#define TOUCH_PAD_NUM8_GPIO_NUM     8
+
+#define TOUCH_PAD_GPIO9_CHANNEL     TOUCH_PAD_NUM9
+#define TOUCH_PAD_NUM9_GPIO_NUM     9
+
+#define TOUCH_PAD_GPIO10_CHANNEL    TOUCH_PAD_NUM10
+#define TOUCH_PAD_NUM10_GPIO_NUM     10
+
+#define TOUCH_PAD_GPIO11_CHANNEL    TOUCH_PAD_NUM11
+#define TOUCH_PAD_NUM11_GPIO_NUM     11
+
+#define TOUCH_PAD_GPIO12_CHANNEL    TOUCH_PAD_NUM12
+#define TOUCH_PAD_NUM12_GPIO_NUM     12
+
+#define TOUCH_PAD_GPIO13_CHANNEL    TOUCH_PAD_NUM13
+#define TOUCH_PAD_NUM13_GPIO_NUM     13
+
+#define TOUCH_PAD_GPIO14_CHANNEL    TOUCH_PAD_NUM14
+#define TOUCH_PAD_NUM14_GPIO_NUM     14
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/touch_sensor_pins.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/touch_sensor_pins.h
new file mode 100644
index 00000000000..70046fc6490
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/touch_sensor_pins.h
@@ -0,0 +1,20 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SOC_TOUCH_SHIELD_CHANNEL            (14) /*!< The waterproof function includes a shielded channel (TOUCH_PAD_NUM14) */
+#define SOC_TOUCH_DENOISE_CHANNEL           (0)  /*!< T0 is an internal channel that does not have a corresponding external GPIO.
+                                                    T0 will work simultaneously with the measured channel Tn. Finally, the actual
+                                                    measured value of Tn is the value after subtracting lower bits of T0. */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/tracemem_config.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/tracemem_config.h
new file mode 100644
index 00000000000..55c9b907dd9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/tracemem_config.h
@@ -0,0 +1,39 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define TRACEMEM_MUX_BLK0_NUM                   22
+#define TRACEMEM_MUX_BLK1_NUM                   23
+
+#if (TRACEMEM_MUX_BLK0_NUM < 6) || (TRACEMEM_MUX_BLK0_NUM > 29)
+#error Invalid TRAX block 0 num!
+#endif
+#if (TRACEMEM_MUX_BLK1_NUM < 6) || (TRACEMEM_MUX_BLK1_NUM > 29)
+#error Invalid TRAX block 1 num!
+#endif
+
+#if TRACEMEM_MUX_BLK0_NUM < 6
+#define TRACEMEM_BLK0_ADDR                      (0x3FC88000UL + 0x2000UL*(TRACEMEM_MUX_BLK0_NUM-2UL))
+#elif TRACEMEM_MUX_BLK0_NUM < 30
+#define TRACEMEM_BLK0_ADDR                      (0x3FC90000UL + 0x4000UL*(TRACEMEM_MUX_BLK0_NUM-6UL))
+#endif
+#if TRACEMEM_MUX_BLK1_NUM < 6
+#define TRACEMEM_BLK1_ADDR                      (0x3FC88000UL + 0x2000UL*(TRACEMEM_MUX_BLK1_NUM-2UL))
+#elif TRACEMEM_MUX_BLK1_NUM < 30
+#define TRACEMEM_BLK1_ADDR                      (0x3FC90000UL + 0x4000UL*(TRACEMEM_MUX_BLK1_NUM-6UL))
+#endif
+
+#define TRACEMEM_MUX_BLK_ALLOC(_n_)             (((_n_)-2UL)%4UL)
+#define TRACEMEM_CORE0_MUX_BLK_BITS(_n_)         (BIT(((_n_)-2UL)/4UL) | (TRACEMEM_MUX_BLK_ALLOC(_n_) << 14))
+#define TRACEMEM_CORE1_MUX_BLK_BITS(_n_)         (BIT(7UL+(((_n_)-2UL)/4UL)) | (TRACEMEM_MUX_BLK_ALLOC(_n_) << 16))
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/twai_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/twai_caps.h
new file mode 100644
index 00000000000..c9c83861b4b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/twai_caps.h
@@ -0,0 +1,28 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SOC_TWAI_BRP_MIN    2
+#define SOC_TWAI_BRP_MAX    16384
+
+#define SOC_TWAI_SUPPORTS_RX_STATUS     1
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/twai_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/twai_struct.h
new file mode 100644
index 00000000000..df022feb471
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/twai_struct.h
@@ -0,0 +1,216 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/* ---------------------------- Register Layout ------------------------------ */
+
+/* The TWAI peripheral's registers are 8bits, however the ESP32-S3 can only access
+ * peripheral registers every 32bits. Therefore each TWAI register is mapped to
+ * the least significant byte of every 32bits.
+ */
+
+typedef volatile struct twai_dev_s {
+    //Configuration and Control Registers
+    union {
+        struct {
+            uint32_t rm: 1;                     /* MOD.0 Reset Mode */
+            uint32_t lom: 1;                    /* MOD.1 Listen Only Mode */
+            uint32_t stm: 1;                    /* MOD.2 Self Test Mode */
+            uint32_t afm: 1;                    /* MOD.3 Acceptance Filter Mode */
+            uint32_t reserved4: 28;             /* Internal Reserved. MOD.4 Sleep Mode not supported */
+        };
+        uint32_t val;
+    } mode_reg;                                 /* Address 0x0000 */
+    union {
+        struct {
+            uint32_t tr: 1;                     /* CMR.0 Transmission Request */
+            uint32_t at: 1;                     /* CMR.1 Abort Transmission */
+            uint32_t rrb: 1;                    /* CMR.2 Release Receive Buffer */
+            uint32_t cdo: 1;                    /* CMR.3 Clear Data Overrun */
+            uint32_t srr: 1;                    /* CMR.4 Self Reception Request */
+            uint32_t reserved5: 27;             /* Internal Reserved */
+        };
+        uint32_t val;
+    } command_reg;                              /* Address 0x0004 */
+    union {
+        struct {
+            uint32_t rbs: 1;                    /* SR.0 Receive Buffer Status */
+            uint32_t dos: 1;                    /* SR.1 Data Overrun Status */
+            uint32_t tbs: 1;                    /* SR.2 Transmit Buffer Status */
+            uint32_t tcs: 1;                    /* SR.3 Transmission Complete Status */
+            uint32_t rs: 1;                     /* SR.4 Receive Status */
+            uint32_t ts: 1;                     /* SR.5 Transmit Status */
+            uint32_t es: 1;                     /* SR.6 Error Status */
+            uint32_t bs: 1;                     /* SR.7 Bus Status */
+            uint32_t ms: 1;                     /* SR.8 Miss Status */
+            uint32_t reserved9: 23;             /* Internal Reserved */
+        };
+        uint32_t val;
+    } status_reg;                               /* Address 0x0008 */
+    union {
+        struct {
+            uint32_t ri: 1;                     /* IR.0 Receive Interrupt */
+            uint32_t ti: 1;                     /* IR.1 Transmit Interrupt */
+            uint32_t ei: 1;                     /* IR.2 Error Interrupt */
+            uint32_t doi: 1;                    /* IR.3 Data Overrun Interrupt */
+            uint32_t reserved4: 1;              /* Internal Reserved (Wake-up not supported) */
+            uint32_t epi: 1;                    /* IR.5 Error Passive Interrupt */
+            uint32_t ali: 1;                    /* IR.6 Arbitration Lost Interrupt */
+            uint32_t bei: 1;                    /* IR.7 Bus Error Interrupt */
+            uint32_t reserved8: 24;             /* Internal Reserved */
+        };
+        uint32_t val;
+    } interrupt_reg;                           /* Address 0x000C */
+    union {
+        struct {
+            uint32_t rie: 1;                    /* IER.0 Receive Interrupt Enable */
+            uint32_t tie: 1;                    /* IER.1 Transmit Interrupt Enable */
+            uint32_t eie: 1;                    /* IER.2 Error Interrupt Enable */
+            uint32_t doie: 1;                   /* IER.3 Data Overrun Interrupt Enable */
+            uint32_t reserved4: 1;              /* Internal Reserved (Wake-up not supported) */
+            uint32_t epie: 1;                   /* IER.5 Error Passive Interrupt Enable */
+            uint32_t alie: 1;                   /* IER.6 Arbitration Lost Interrupt Enable */
+            uint32_t beie: 1;                   /* IER.7 Bus Error Interrupt Enable */
+            uint32_t reserved8: 24;             /* Internal Reserved */
+        };
+        uint32_t val;
+    } interrupt_enable_reg;                     /* Address 0x0010 */
+    uint32_t reserved_14;
+    union {
+        struct {
+            uint32_t brp: 13;                   /* BTR0[12:0] Baud Rate Prescaler */
+            uint32_t reserved13: 1;             /* Internal Reserved */
+            uint32_t sjw: 2;                    /* BTR0[15:14] Synchronization Jump Width*/
+            uint32_t reserved16: 16;            /* Internal Reserved */
+        };
+        uint32_t val;
+    } bus_timing_0_reg;                         /* Address 0x0018 */
+    union {
+        struct {
+            uint32_t tseg1: 4;                  /* BTR1[3:0] Timing Segment 1 */
+            uint32_t tseg2: 3;                  /* BTR1[6:4] Timing Segment 2 */
+            uint32_t sam: 1;                    /* BTR1.7 Sampling*/
+            uint32_t reserved8: 24;             /* Internal Reserved */
+        };
+        uint32_t val;
+    } bus_timing_1_reg;                         /* Address 0x001C */
+    uint32_t reserved_20;                       /* Address 0x0020 (Output control not supported) */
+    uint32_t reserved_24;                       /* Address 0x0024 (Test Register not supported) */
+    uint32_t reserved_28;                       /* Address 0x0028 */
+
+    //Capture and Counter Registers
+    union {
+        struct {
+            uint32_t alc: 5;                    /* ALC[4:0] Arbitration lost capture */
+            uint32_t reserved5: 27;             /* Internal Reserved */
+        };
+        uint32_t val;
+    } arbitration_lost_captue_reg;              /* Address 0x002C */
+    union {
+        struct {
+            uint32_t seg: 5;                    /* ECC[4:0] Error Code Segment 0 to 5 */
+            uint32_t dir: 1;                    /* ECC.5 Error Direction (TX/RX) */
+            uint32_t errc: 2;                   /* ECC[7:6] Error Code */
+            uint32_t reserved8: 24;             /* Internal Reserved */
+        };
+        uint32_t val;
+    } error_code_capture_reg;                   /* Address 0x0030 */
+    union {
+        struct {
+            uint32_t ewl: 8;                    /* EWL[7:0] Error Warning Limit */
+            uint32_t reserved8: 24;             /* Internal Reserved */
+        };
+        uint32_t val;
+    } error_warning_limit_reg;                  /* Address 0x0034 */
+    union {
+        struct {
+            uint32_t rxerr: 8;                  /* RXERR[7:0] Receive Error Counter */
+            uint32_t reserved8: 24;             /* Internal Reserved */
+        };
+        uint32_t val;
+    } rx_error_counter_reg;                     /* Address 0x0038 */
+    union {
+        struct {
+            uint32_t txerr: 8;                  /* TXERR[7:0] Receive Error Counter */
+            uint32_t reserved8: 24;             /* Internal Reserved */
+        };
+        uint32_t val;
+    } tx_error_counter_reg;                     /* Address 0x003C */
+
+    //Shared Registers (TX Buff/RX Buff/Acc Filter)
+    union {
+        struct {
+            union {
+                struct {
+                    uint32_t byte: 8;           /* ACRx[7:0] Acceptance Code */
+                    uint32_t reserved8: 24;     /* Internal Reserved */
+                };
+                uint32_t val;
+            } acr[4];
+            union {
+                struct {
+                    uint32_t byte: 8;           /* AMRx[7:0] Acceptance Mask */
+                    uint32_t reserved8: 24;     /* Internal Reserved */
+                };
+                uint32_t val;
+            } amr[4];
+            uint32_t reserved_60;
+            uint32_t reserved_64;
+            uint32_t reserved_68;
+            uint32_t reserved_6c;
+            uint32_t reserved_70;
+        } acceptance_filter;
+        union {
+            struct {
+                uint32_t byte: 8;               /* TX/RX Byte X [7:0] */
+                uint32_t reserved24: 24;        /* Internal Reserved */
+            };
+            uint32_t val;
+        } tx_rx_buffer[13];
+    };                                          /* Address 0x0040 - 0x0070 */
+
+    //Misc Registers
+    union {
+        struct {
+            uint32_t rmc: 7;                    /* RMC[6:0] RX Message Counter */
+            uint32_t reserved7: 25;             /* Internal Reserved */
+        };
+        uint32_t val;
+    } rx_message_counter_reg;                   /* Address 0x0074 */
+    uint32_t reserved_78;                       /* Address 0x0078 (RX Buffer Start Address not supported) */
+    union {
+        struct {
+            uint32_t cd: 8;                     /* CDR[7:0] CLKOUT frequency selector based of fOSC */
+            uint32_t co: 1;                     /* CDR.8 CLKOUT enable/disable */
+            uint32_t reserved9: 23;             /* Internal Reserved  */
+        };
+        uint32_t val;
+    } clock_divider_reg;                        /* Address 0x007C */
+} twai_dev_t;
+
+_Static_assert(sizeof(twai_dev_t) == 128, "TWAI registers should be 32 * 4 bytes");
+
+extern twai_dev_t TWAI;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_caps.h
new file mode 100644
index 00000000000..30d219baac6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_caps.h
@@ -0,0 +1,31 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SOC_UART_FIFO_LEN          (128)      /*!< The UART hardware FIFO length */
+#define SOC_UART_BITRATE_MAX       (5000000)  /*!< Max bit rate supported by UART */
+
+#define SOC_UART_NUM           (3)
+
+// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
+#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_channel.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_channel.h
new file mode 100644
index 00000000000..1b8b41da001
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_channel.h
@@ -0,0 +1,38 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32S3.
+
+#pragma once
+
+//UART channels
+#define UART_GPIO43_DIRECT_CHANNEL      UART_NUM_0
+#define UART_NUM_0_TXD_DIRECT_GPIO_NUM  43
+#define UART_GPIO44_DIRECT_CHANNEL      UART_NUM_0
+#define UART_NUM_0_RXD_DIRECT_GPIO_NUM  44
+#define UART_GPIO16_DIRECT_CHANNEL      UART_NUM_0
+#define UART_NUM_0_CTS_DIRECT_GPIO_NUM  16
+#define UART_GPIO15_DIRECT_CHANNEL      UART_NUM_0
+#define UART_NUM_0_RTS_DIRECT_GPIO_NUM  15
+
+#define UART_TXD_GPIO43_DIRECT_CHANNEL  UART_GPIO43_DIRECT_CHANNEL
+#define UART_RXD_GPIO44_DIRECT_CHANNEL  UART_GPIO44_DIRECT_CHANNEL
+#define UART_CTS_GPIO16_DIRECT_CHANNEL  UART_GPIO16_DIRECT_CHANNEL
+#define UART_RTS_GPIO15_DIRECT_CHANNEL  UART_GPIO15_DIRECT_CHANNEL
+
+#define UART_GPIO17_DIRECT_CHANNEL      UART_NUM_1
+#define UART_NUM_1_TXD_DIRECT_GPIO_NUM  17
+#define UART_GPIO18_DIRECT_CHANNEL      UART_NUM_1
+#define UART_NUM_1_RXD_DIRECT_GPIO_NUM  18
+#define UART_GPIO20_DIRECT_CHANNEL      UART_NUM_1
+#define UART_NUM_1_CTS_DIRECT_GPIO_NUM  20
+#define UART_GPIO19_DIRECT_CHANNEL      UART_NUM_1
+#define UART_NUM_1_RTS_DIRECT_GPIO_NUM  19
+
+#define UART_TXD_GPIO17_DIRECT_CHANNEL  UART_GPIO17_DIRECT_CHANNEL
+#define UART_RXD_GPIO18_DIRECT_CHANNEL  UART_GPIO18_DIRECT_CHANNEL
+#define UART_CTS_GPIO20_DIRECT_CHANNEL  UART_GPIO20_DIRECT_CHANNEL
+#define UART_RTS_GPIO19_DIRECT_CHANNEL  UART_GPIO19_DIRECT_CHANNEL
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_pins.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_pins.h
new file mode 100644
index 00000000000..c2e9e245274
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_pins.h
@@ -0,0 +1,55 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/io_mux_reg.h"
+
+/* Specify the number of pins for UART */
+#define SOC_UART_PINS_COUNT  (4)
+
+/* Specify the GPIO pin number for each UART signal in the IOMUX */
+#define U0RXD_GPIO_NUM 44
+#define U0TXD_GPIO_NUM 43
+#define U0CTS_GPIO_NUM 16
+#define U0RTS_GPIO_NUM 15
+
+#define U1RXD_GPIO_NUM 18
+#define U1TXD_GPIO_NUM 17
+#define U1CTS_GPIO_NUM 20
+#define U1RTS_GPIO_NUM 19
+
+#define U2RXD_GPIO_NUM (-1)
+#define U2TXD_GPIO_NUM (-1)
+#define U2CTS_GPIO_NUM (-1)
+#define U2RTS_GPIO_NUM (-1)
+
+/* The following defines are necessary for reconfiguring the UART
+ * to use IOMUX, at runtime. */
+#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
+#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
+#define U0RTS_MUX_FUNC  (FUNC_XTAL_32K_P_U0RTS)
+#define U0CTS_MUX_FUNC  (FUNC_XTAL_32K_N_U0CTS)
+
+#define U1TXD_MUX_FUNC  (FUNC_DAC_1_U1TXD)
+#define U1RXD_MUX_FUNC  (FUNC_DAC_2_U1RXD)
+#define U1RTS_MUX_FUNC  (FUNC_GPIO19_U1RTS)
+#define U1CTS_MUX_FUNC  (FUNC_GPIO20_U1CTS)
+
+/* UART2 cannot be used directly through the IOMUX, these value
+ * shall not be used. */
+#define U2TXD_MUX_FUNC  (-1)
+#define U2RXD_MUX_FUNC  (-1)
+#define U2RTS_MUX_FUNC  (-1)
+#define U2CTS_MUX_FUNC  (-1)
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_reg.h
new file mode 100644
index 00000000000..73c2d80b9d8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_reg.h
@@ -0,0 +1,1532 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** UART_FIFO_REG register
+ *  FIFO data register
+ */
+#define UART_FIFO_REG(i) (REG_UART_BASE(i) + 0x0)
+/** UART_RXFIFO_RD_BYTE : RO; bitpos: [7:0]; default: 0;
+ *  UART(i) accesses FIFO via this register.
+ */
+#define UART_RXFIFO_RD_BYTE    0x000000FFU
+#define UART_RXFIFO_RD_BYTE_M  (UART_RXFIFO_RD_BYTE_V << UART_RXFIFO_RD_BYTE_S)
+#define UART_RXFIFO_RD_BYTE_V  0x000000FFU
+#define UART_RXFIFO_RD_BYTE_S  0
+
+/** UART_INT_RAW_REG register
+ *  Raw interrupt status
+ */
+#define UART_INT_RAW_REG(i) (REG_UART_BASE(i) + 0x4)
+/** UART_RXFIFO_FULL_INT_RAW : R/WTC/SS; bitpos: [0]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver receives more data than
+ *  what rxfifo_full_thrhd specifies.
+ */
+#define UART_RXFIFO_FULL_INT_RAW    (BIT(0))
+#define UART_RXFIFO_FULL_INT_RAW_M  (UART_RXFIFO_FULL_INT_RAW_V << UART_RXFIFO_FULL_INT_RAW_S)
+#define UART_RXFIFO_FULL_INT_RAW_V  0x00000001U
+#define UART_RXFIFO_FULL_INT_RAW_S  0
+/** UART_TXFIFO_EMPTY_INT_RAW : R/WTC/SS; bitpos: [1]; default: 1;
+ *  This interrupt raw bit turns to high level when the amount of data in Tx-FIFO is
+ *  less than what txfifo_empty_thrhd specifies .
+ */
+#define UART_TXFIFO_EMPTY_INT_RAW    (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_RAW_M  (UART_TXFIFO_EMPTY_INT_RAW_V << UART_TXFIFO_EMPTY_INT_RAW_S)
+#define UART_TXFIFO_EMPTY_INT_RAW_V  0x00000001U
+#define UART_TXFIFO_EMPTY_INT_RAW_S  1
+/** UART_PARITY_ERR_INT_RAW : R/WTC/SS; bitpos: [2]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver detects a parity error in
+ *  the data.
+ */
+#define UART_PARITY_ERR_INT_RAW    (BIT(2))
+#define UART_PARITY_ERR_INT_RAW_M  (UART_PARITY_ERR_INT_RAW_V << UART_PARITY_ERR_INT_RAW_S)
+#define UART_PARITY_ERR_INT_RAW_V  0x00000001U
+#define UART_PARITY_ERR_INT_RAW_S  2
+/** UART_FRM_ERR_INT_RAW : R/WTC/SS; bitpos: [3]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver detects a data frame error
+ *  .
+ */
+#define UART_FRM_ERR_INT_RAW    (BIT(3))
+#define UART_FRM_ERR_INT_RAW_M  (UART_FRM_ERR_INT_RAW_V << UART_FRM_ERR_INT_RAW_S)
+#define UART_FRM_ERR_INT_RAW_V  0x00000001U
+#define UART_FRM_ERR_INT_RAW_S  3
+/** UART_RXFIFO_OVF_INT_RAW : R/WTC/SS; bitpos: [4]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver receives more data than
+ *  the FIFO can store.
+ */
+#define UART_RXFIFO_OVF_INT_RAW    (BIT(4))
+#define UART_RXFIFO_OVF_INT_RAW_M  (UART_RXFIFO_OVF_INT_RAW_V << UART_RXFIFO_OVF_INT_RAW_S)
+#define UART_RXFIFO_OVF_INT_RAW_V  0x00000001U
+#define UART_RXFIFO_OVF_INT_RAW_S  4
+/** UART_DSR_CHG_INT_RAW : R/WTC/SS; bitpos: [5]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver detects the edge change of
+ *  DSRn signal.
+ */
+#define UART_DSR_CHG_INT_RAW    (BIT(5))
+#define UART_DSR_CHG_INT_RAW_M  (UART_DSR_CHG_INT_RAW_V << UART_DSR_CHG_INT_RAW_S)
+#define UART_DSR_CHG_INT_RAW_V  0x00000001U
+#define UART_DSR_CHG_INT_RAW_S  5
+/** UART_CTS_CHG_INT_RAW : R/WTC/SS; bitpos: [6]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver detects the edge change of
+ *  CTSn signal.
+ */
+#define UART_CTS_CHG_INT_RAW    (BIT(6))
+#define UART_CTS_CHG_INT_RAW_M  (UART_CTS_CHG_INT_RAW_V << UART_CTS_CHG_INT_RAW_S)
+#define UART_CTS_CHG_INT_RAW_V  0x00000001U
+#define UART_CTS_CHG_INT_RAW_S  6
+/** UART_BRK_DET_INT_RAW : R/WTC/SS; bitpos: [7]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver detects a 0 after the stop
+ *  bit.
+ */
+#define UART_BRK_DET_INT_RAW    (BIT(7))
+#define UART_BRK_DET_INT_RAW_M  (UART_BRK_DET_INT_RAW_V << UART_BRK_DET_INT_RAW_S)
+#define UART_BRK_DET_INT_RAW_V  0x00000001U
+#define UART_BRK_DET_INT_RAW_S  7
+/** UART_RXFIFO_TOUT_INT_RAW : R/WTC/SS; bitpos: [8]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver takes more time than
+ *  rx_tout_thrhd to receive a byte.
+ */
+#define UART_RXFIFO_TOUT_INT_RAW    (BIT(8))
+#define UART_RXFIFO_TOUT_INT_RAW_M  (UART_RXFIFO_TOUT_INT_RAW_V << UART_RXFIFO_TOUT_INT_RAW_S)
+#define UART_RXFIFO_TOUT_INT_RAW_V  0x00000001U
+#define UART_RXFIFO_TOUT_INT_RAW_S  8
+/** UART_SW_XON_INT_RAW : R/WTC/SS; bitpos: [9]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver recevies Xon char when
+ *  uart_sw_flow_con_en is set to 1.
+ */
+#define UART_SW_XON_INT_RAW    (BIT(9))
+#define UART_SW_XON_INT_RAW_M  (UART_SW_XON_INT_RAW_V << UART_SW_XON_INT_RAW_S)
+#define UART_SW_XON_INT_RAW_V  0x00000001U
+#define UART_SW_XON_INT_RAW_S  9
+/** UART_SW_XOFF_INT_RAW : R/WTC/SS; bitpos: [10]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver receives Xoff char when
+ *  uart_sw_flow_con_en is set to 1.
+ */
+#define UART_SW_XOFF_INT_RAW    (BIT(10))
+#define UART_SW_XOFF_INT_RAW_M  (UART_SW_XOFF_INT_RAW_V << UART_SW_XOFF_INT_RAW_S)
+#define UART_SW_XOFF_INT_RAW_V  0x00000001U
+#define UART_SW_XOFF_INT_RAW_S  10
+/** UART_GLITCH_DET_INT_RAW : R/WTC/SS; bitpos: [11]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver detects a glitch in the
+ *  middle of a start bit.
+ */
+#define UART_GLITCH_DET_INT_RAW    (BIT(11))
+#define UART_GLITCH_DET_INT_RAW_M  (UART_GLITCH_DET_INT_RAW_V << UART_GLITCH_DET_INT_RAW_S)
+#define UART_GLITCH_DET_INT_RAW_V  0x00000001U
+#define UART_GLITCH_DET_INT_RAW_S  11
+/** UART_TX_BRK_DONE_INT_RAW : R/WTC/SS; bitpos: [12]; default: 0;
+ *  This interrupt raw bit turns to high level when transmitter completes  sending
+ *  NULL characters, after all data in Tx-FIFO are sent.
+ */
+#define UART_TX_BRK_DONE_INT_RAW    (BIT(12))
+#define UART_TX_BRK_DONE_INT_RAW_M  (UART_TX_BRK_DONE_INT_RAW_V << UART_TX_BRK_DONE_INT_RAW_S)
+#define UART_TX_BRK_DONE_INT_RAW_V  0x00000001U
+#define UART_TX_BRK_DONE_INT_RAW_S  12
+/** UART_TX_BRK_IDLE_DONE_INT_RAW : R/WTC/SS; bitpos: [13]; default: 0;
+ *  This interrupt raw bit turns to high level when transmitter has kept the shortest
+ *  duration after sending the  last data.
+ */
+#define UART_TX_BRK_IDLE_DONE_INT_RAW    (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_RAW_M  (UART_TX_BRK_IDLE_DONE_INT_RAW_V << UART_TX_BRK_IDLE_DONE_INT_RAW_S)
+#define UART_TX_BRK_IDLE_DONE_INT_RAW_V  0x00000001U
+#define UART_TX_BRK_IDLE_DONE_INT_RAW_S  13
+/** UART_TX_DONE_INT_RAW : R/WTC/SS; bitpos: [14]; default: 0;
+ *  This interrupt raw bit turns to high level when transmitter has send out all data
+ *  in FIFO.
+ */
+#define UART_TX_DONE_INT_RAW    (BIT(14))
+#define UART_TX_DONE_INT_RAW_M  (UART_TX_DONE_INT_RAW_V << UART_TX_DONE_INT_RAW_S)
+#define UART_TX_DONE_INT_RAW_V  0x00000001U
+#define UART_TX_DONE_INT_RAW_S  14
+/** UART_RS485_PARITY_ERR_INT_RAW : R/WTC/SS; bitpos: [15]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver detects a parity error
+ *  from the echo of transmitter in rs485 mode.
+ */
+#define UART_RS485_PARITY_ERR_INT_RAW    (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_RAW_M  (UART_RS485_PARITY_ERR_INT_RAW_V << UART_RS485_PARITY_ERR_INT_RAW_S)
+#define UART_RS485_PARITY_ERR_INT_RAW_V  0x00000001U
+#define UART_RS485_PARITY_ERR_INT_RAW_S  15
+/** UART_RS485_FRM_ERR_INT_RAW : R/WTC/SS; bitpos: [16]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver detects a data frame error
+ *  from the echo of transmitter in rs485 mode.
+ */
+#define UART_RS485_FRM_ERR_INT_RAW    (BIT(16))
+#define UART_RS485_FRM_ERR_INT_RAW_M  (UART_RS485_FRM_ERR_INT_RAW_V << UART_RS485_FRM_ERR_INT_RAW_S)
+#define UART_RS485_FRM_ERR_INT_RAW_V  0x00000001U
+#define UART_RS485_FRM_ERR_INT_RAW_S  16
+/** UART_RS485_CLASH_INT_RAW : R/WTC/SS; bitpos: [17]; default: 0;
+ *  This interrupt raw bit turns to high level when detects a clash between transmitter
+ *  and receiver in rs485 mode.
+ */
+#define UART_RS485_CLASH_INT_RAW    (BIT(17))
+#define UART_RS485_CLASH_INT_RAW_M  (UART_RS485_CLASH_INT_RAW_V << UART_RS485_CLASH_INT_RAW_S)
+#define UART_RS485_CLASH_INT_RAW_V  0x00000001U
+#define UART_RS485_CLASH_INT_RAW_S  17
+/** UART_AT_CMD_CHAR_DET_INT_RAW : R/WTC/SS; bitpos: [18]; default: 0;
+ *  This interrupt raw bit turns to high level when receiver detects the configured
+ *  at_cmd char.
+ */
+#define UART_AT_CMD_CHAR_DET_INT_RAW    (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_RAW_M  (UART_AT_CMD_CHAR_DET_INT_RAW_V << UART_AT_CMD_CHAR_DET_INT_RAW_S)
+#define UART_AT_CMD_CHAR_DET_INT_RAW_V  0x00000001U
+#define UART_AT_CMD_CHAR_DET_INT_RAW_S  18
+/** UART_WAKEUP_INT_RAW : R/WTC/SS; bitpos: [19]; default: 0;
+ *  This interrupt raw bit turns to high level when input rxd edge changes more times
+ *  than what reg_active_threshold specifies in light sleeping mode.
+ */
+#define UART_WAKEUP_INT_RAW    (BIT(19))
+#define UART_WAKEUP_INT_RAW_M  (UART_WAKEUP_INT_RAW_V << UART_WAKEUP_INT_RAW_S)
+#define UART_WAKEUP_INT_RAW_V  0x00000001U
+#define UART_WAKEUP_INT_RAW_S  19
+
+/** UART_INT_ST_REG register
+ *  Masked interrupt status
+ */
+#define UART_INT_ST_REG(i) (REG_UART_BASE(i) + 0x8)
+/** UART_RXFIFO_FULL_INT_ST : RO; bitpos: [0]; default: 0;
+ *  This is the status bit for rxfifo_full_int_raw when rxfifo_full_int_ena is set to 1.
+ */
+#define UART_RXFIFO_FULL_INT_ST    (BIT(0))
+#define UART_RXFIFO_FULL_INT_ST_M  (UART_RXFIFO_FULL_INT_ST_V << UART_RXFIFO_FULL_INT_ST_S)
+#define UART_RXFIFO_FULL_INT_ST_V  0x00000001U
+#define UART_RXFIFO_FULL_INT_ST_S  0
+/** UART_TXFIFO_EMPTY_INT_ST : RO; bitpos: [1]; default: 0;
+ *  This is the status bit for  txfifo_empty_int_raw  when txfifo_empty_int_ena is set
+ *  to 1.
+ */
+#define UART_TXFIFO_EMPTY_INT_ST    (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_ST_M  (UART_TXFIFO_EMPTY_INT_ST_V << UART_TXFIFO_EMPTY_INT_ST_S)
+#define UART_TXFIFO_EMPTY_INT_ST_V  0x00000001U
+#define UART_TXFIFO_EMPTY_INT_ST_S  1
+/** UART_PARITY_ERR_INT_ST : RO; bitpos: [2]; default: 0;
+ *  This is the status bit for parity_err_int_raw when parity_err_int_ena is set to 1.
+ */
+#define UART_PARITY_ERR_INT_ST    (BIT(2))
+#define UART_PARITY_ERR_INT_ST_M  (UART_PARITY_ERR_INT_ST_V << UART_PARITY_ERR_INT_ST_S)
+#define UART_PARITY_ERR_INT_ST_V  0x00000001U
+#define UART_PARITY_ERR_INT_ST_S  2
+/** UART_FRM_ERR_INT_ST : RO; bitpos: [3]; default: 0;
+ *  This is the status bit for frm_err_int_raw when frm_err_int_ena is set to 1.
+ */
+#define UART_FRM_ERR_INT_ST    (BIT(3))
+#define UART_FRM_ERR_INT_ST_M  (UART_FRM_ERR_INT_ST_V << UART_FRM_ERR_INT_ST_S)
+#define UART_FRM_ERR_INT_ST_V  0x00000001U
+#define UART_FRM_ERR_INT_ST_S  3
+/** UART_RXFIFO_OVF_INT_ST : RO; bitpos: [4]; default: 0;
+ *  This is the status bit for rxfifo_ovf_int_raw when rxfifo_ovf_int_ena is set to 1.
+ */
+#define UART_RXFIFO_OVF_INT_ST    (BIT(4))
+#define UART_RXFIFO_OVF_INT_ST_M  (UART_RXFIFO_OVF_INT_ST_V << UART_RXFIFO_OVF_INT_ST_S)
+#define UART_RXFIFO_OVF_INT_ST_V  0x00000001U
+#define UART_RXFIFO_OVF_INT_ST_S  4
+/** UART_DSR_CHG_INT_ST : RO; bitpos: [5]; default: 0;
+ *  This is the status bit for dsr_chg_int_raw when dsr_chg_int_ena is set to 1.
+ */
+#define UART_DSR_CHG_INT_ST    (BIT(5))
+#define UART_DSR_CHG_INT_ST_M  (UART_DSR_CHG_INT_ST_V << UART_DSR_CHG_INT_ST_S)
+#define UART_DSR_CHG_INT_ST_V  0x00000001U
+#define UART_DSR_CHG_INT_ST_S  5
+/** UART_CTS_CHG_INT_ST : RO; bitpos: [6]; default: 0;
+ *  This is the status bit for cts_chg_int_raw when cts_chg_int_ena is set to 1.
+ */
+#define UART_CTS_CHG_INT_ST    (BIT(6))
+#define UART_CTS_CHG_INT_ST_M  (UART_CTS_CHG_INT_ST_V << UART_CTS_CHG_INT_ST_S)
+#define UART_CTS_CHG_INT_ST_V  0x00000001U
+#define UART_CTS_CHG_INT_ST_S  6
+/** UART_BRK_DET_INT_ST : RO; bitpos: [7]; default: 0;
+ *  This is the status bit for brk_det_int_raw when brk_det_int_ena is set to 1.
+ */
+#define UART_BRK_DET_INT_ST    (BIT(7))
+#define UART_BRK_DET_INT_ST_M  (UART_BRK_DET_INT_ST_V << UART_BRK_DET_INT_ST_S)
+#define UART_BRK_DET_INT_ST_V  0x00000001U
+#define UART_BRK_DET_INT_ST_S  7
+/** UART_RXFIFO_TOUT_INT_ST : RO; bitpos: [8]; default: 0;
+ *  This is the status bit for rxfifo_tout_int_raw when rxfifo_tout_int_ena is set to 1.
+ */
+#define UART_RXFIFO_TOUT_INT_ST    (BIT(8))
+#define UART_RXFIFO_TOUT_INT_ST_M  (UART_RXFIFO_TOUT_INT_ST_V << UART_RXFIFO_TOUT_INT_ST_S)
+#define UART_RXFIFO_TOUT_INT_ST_V  0x00000001U
+#define UART_RXFIFO_TOUT_INT_ST_S  8
+/** UART_SW_XON_INT_ST : RO; bitpos: [9]; default: 0;
+ *  This is the status bit for sw_xon_int_raw when sw_xon_int_ena is set to 1.
+ */
+#define UART_SW_XON_INT_ST    (BIT(9))
+#define UART_SW_XON_INT_ST_M  (UART_SW_XON_INT_ST_V << UART_SW_XON_INT_ST_S)
+#define UART_SW_XON_INT_ST_V  0x00000001U
+#define UART_SW_XON_INT_ST_S  9
+/** UART_SW_XOFF_INT_ST : RO; bitpos: [10]; default: 0;
+ *  This is the status bit for sw_xoff_int_raw when sw_xoff_int_ena is set to 1.
+ */
+#define UART_SW_XOFF_INT_ST    (BIT(10))
+#define UART_SW_XOFF_INT_ST_M  (UART_SW_XOFF_INT_ST_V << UART_SW_XOFF_INT_ST_S)
+#define UART_SW_XOFF_INT_ST_V  0x00000001U
+#define UART_SW_XOFF_INT_ST_S  10
+/** UART_GLITCH_DET_INT_ST : RO; bitpos: [11]; default: 0;
+ *  This is the status bit for glitch_det_int_raw when glitch_det_int_ena is set to 1.
+ */
+#define UART_GLITCH_DET_INT_ST    (BIT(11))
+#define UART_GLITCH_DET_INT_ST_M  (UART_GLITCH_DET_INT_ST_V << UART_GLITCH_DET_INT_ST_S)
+#define UART_GLITCH_DET_INT_ST_V  0x00000001U
+#define UART_GLITCH_DET_INT_ST_S  11
+/** UART_TX_BRK_DONE_INT_ST : RO; bitpos: [12]; default: 0;
+ *  This is the status bit for tx_brk_done_int_raw when tx_brk_done_int_ena is set to 1.
+ */
+#define UART_TX_BRK_DONE_INT_ST    (BIT(12))
+#define UART_TX_BRK_DONE_INT_ST_M  (UART_TX_BRK_DONE_INT_ST_V << UART_TX_BRK_DONE_INT_ST_S)
+#define UART_TX_BRK_DONE_INT_ST_V  0x00000001U
+#define UART_TX_BRK_DONE_INT_ST_S  12
+/** UART_TX_BRK_IDLE_DONE_INT_ST : RO; bitpos: [13]; default: 0;
+ *  This is the stauts bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena
+ *  is set to 1.
+ */
+#define UART_TX_BRK_IDLE_DONE_INT_ST    (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_ST_M  (UART_TX_BRK_IDLE_DONE_INT_ST_V << UART_TX_BRK_IDLE_DONE_INT_ST_S)
+#define UART_TX_BRK_IDLE_DONE_INT_ST_V  0x00000001U
+#define UART_TX_BRK_IDLE_DONE_INT_ST_S  13
+/** UART_TX_DONE_INT_ST : RO; bitpos: [14]; default: 0;
+ *  This is the status bit for tx_done_int_raw when tx_done_int_ena is set to 1.
+ */
+#define UART_TX_DONE_INT_ST    (BIT(14))
+#define UART_TX_DONE_INT_ST_M  (UART_TX_DONE_INT_ST_V << UART_TX_DONE_INT_ST_S)
+#define UART_TX_DONE_INT_ST_V  0x00000001U
+#define UART_TX_DONE_INT_ST_S  14
+/** UART_RS485_PARITY_ERR_INT_ST : RO; bitpos: [15]; default: 0;
+ *  This is the status bit for rs485_parity_err_int_raw when rs485_parity_int_ena is
+ *  set to 1.
+ */
+#define UART_RS485_PARITY_ERR_INT_ST    (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_ST_M  (UART_RS485_PARITY_ERR_INT_ST_V << UART_RS485_PARITY_ERR_INT_ST_S)
+#define UART_RS485_PARITY_ERR_INT_ST_V  0x00000001U
+#define UART_RS485_PARITY_ERR_INT_ST_S  15
+/** UART_RS485_FRM_ERR_INT_ST : RO; bitpos: [16]; default: 0;
+ *  This is the status bit for rs485_frm_err_int_raw when rs485_fm_err_int_ena is set
+ *  to 1.
+ */
+#define UART_RS485_FRM_ERR_INT_ST    (BIT(16))
+#define UART_RS485_FRM_ERR_INT_ST_M  (UART_RS485_FRM_ERR_INT_ST_V << UART_RS485_FRM_ERR_INT_ST_S)
+#define UART_RS485_FRM_ERR_INT_ST_V  0x00000001U
+#define UART_RS485_FRM_ERR_INT_ST_S  16
+/** UART_RS485_CLASH_INT_ST : RO; bitpos: [17]; default: 0;
+ *  This is the status bit for rs485_clash_int_raw when rs485_clash_int_ena is set to 1.
+ */
+#define UART_RS485_CLASH_INT_ST    (BIT(17))
+#define UART_RS485_CLASH_INT_ST_M  (UART_RS485_CLASH_INT_ST_V << UART_RS485_CLASH_INT_ST_S)
+#define UART_RS485_CLASH_INT_ST_V  0x00000001U
+#define UART_RS485_CLASH_INT_ST_S  17
+/** UART_AT_CMD_CHAR_DET_INT_ST : RO; bitpos: [18]; default: 0;
+ *  This is the status bit for at_cmd_det_int_raw when at_cmd_char_det_int_ena is set
+ *  to 1.
+ */
+#define UART_AT_CMD_CHAR_DET_INT_ST    (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_ST_M  (UART_AT_CMD_CHAR_DET_INT_ST_V << UART_AT_CMD_CHAR_DET_INT_ST_S)
+#define UART_AT_CMD_CHAR_DET_INT_ST_V  0x00000001U
+#define UART_AT_CMD_CHAR_DET_INT_ST_S  18
+/** UART_WAKEUP_INT_ST : RO; bitpos: [19]; default: 0;
+ *  This is the status bit for uart_wakeup_int_raw when uart_wakeup_int_ena is set to 1.
+ */
+#define UART_WAKEUP_INT_ST    (BIT(19))
+#define UART_WAKEUP_INT_ST_M  (UART_WAKEUP_INT_ST_V << UART_WAKEUP_INT_ST_S)
+#define UART_WAKEUP_INT_ST_V  0x00000001U
+#define UART_WAKEUP_INT_ST_S  19
+
+/** UART_INT_ENA_REG register
+ *  Interrupt enable bits
+ */
+#define UART_INT_ENA_REG(i) (REG_UART_BASE(i) + 0xc)
+/** UART_RXFIFO_FULL_INT_ENA : R/W; bitpos: [0]; default: 0;
+ *  This is the enable bit for rxfifo_full_int_st register.
+ */
+#define UART_RXFIFO_FULL_INT_ENA    (BIT(0))
+#define UART_RXFIFO_FULL_INT_ENA_M  (UART_RXFIFO_FULL_INT_ENA_V << UART_RXFIFO_FULL_INT_ENA_S)
+#define UART_RXFIFO_FULL_INT_ENA_V  0x00000001U
+#define UART_RXFIFO_FULL_INT_ENA_S  0
+/** UART_TXFIFO_EMPTY_INT_ENA : R/W; bitpos: [1]; default: 0;
+ *  This is the enable bit for txfifo_empty_int_st register.
+ */
+#define UART_TXFIFO_EMPTY_INT_ENA    (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_ENA_M  (UART_TXFIFO_EMPTY_INT_ENA_V << UART_TXFIFO_EMPTY_INT_ENA_S)
+#define UART_TXFIFO_EMPTY_INT_ENA_V  0x00000001U
+#define UART_TXFIFO_EMPTY_INT_ENA_S  1
+/** UART_PARITY_ERR_INT_ENA : R/W; bitpos: [2]; default: 0;
+ *  This is the enable bit for parity_err_int_st register.
+ */
+#define UART_PARITY_ERR_INT_ENA    (BIT(2))
+#define UART_PARITY_ERR_INT_ENA_M  (UART_PARITY_ERR_INT_ENA_V << UART_PARITY_ERR_INT_ENA_S)
+#define UART_PARITY_ERR_INT_ENA_V  0x00000001U
+#define UART_PARITY_ERR_INT_ENA_S  2
+/** UART_FRM_ERR_INT_ENA : R/W; bitpos: [3]; default: 0;
+ *  This is the enable bit for frm_err_int_st register.
+ */
+#define UART_FRM_ERR_INT_ENA    (BIT(3))
+#define UART_FRM_ERR_INT_ENA_M  (UART_FRM_ERR_INT_ENA_V << UART_FRM_ERR_INT_ENA_S)
+#define UART_FRM_ERR_INT_ENA_V  0x00000001U
+#define UART_FRM_ERR_INT_ENA_S  3
+/** UART_RXFIFO_OVF_INT_ENA : R/W; bitpos: [4]; default: 0;
+ *  This is the enable bit for rxfifo_ovf_int_st register.
+ */
+#define UART_RXFIFO_OVF_INT_ENA    (BIT(4))
+#define UART_RXFIFO_OVF_INT_ENA_M  (UART_RXFIFO_OVF_INT_ENA_V << UART_RXFIFO_OVF_INT_ENA_S)
+#define UART_RXFIFO_OVF_INT_ENA_V  0x00000001U
+#define UART_RXFIFO_OVF_INT_ENA_S  4
+/** UART_DSR_CHG_INT_ENA : R/W; bitpos: [5]; default: 0;
+ *  This is the enable bit for dsr_chg_int_st register.
+ */
+#define UART_DSR_CHG_INT_ENA    (BIT(5))
+#define UART_DSR_CHG_INT_ENA_M  (UART_DSR_CHG_INT_ENA_V << UART_DSR_CHG_INT_ENA_S)
+#define UART_DSR_CHG_INT_ENA_V  0x00000001U
+#define UART_DSR_CHG_INT_ENA_S  5
+/** UART_CTS_CHG_INT_ENA : R/W; bitpos: [6]; default: 0;
+ *  This is the enable bit for cts_chg_int_st register.
+ */
+#define UART_CTS_CHG_INT_ENA    (BIT(6))
+#define UART_CTS_CHG_INT_ENA_M  (UART_CTS_CHG_INT_ENA_V << UART_CTS_CHG_INT_ENA_S)
+#define UART_CTS_CHG_INT_ENA_V  0x00000001U
+#define UART_CTS_CHG_INT_ENA_S  6
+/** UART_BRK_DET_INT_ENA : R/W; bitpos: [7]; default: 0;
+ *  This is the enable bit for brk_det_int_st register.
+ */
+#define UART_BRK_DET_INT_ENA    (BIT(7))
+#define UART_BRK_DET_INT_ENA_M  (UART_BRK_DET_INT_ENA_V << UART_BRK_DET_INT_ENA_S)
+#define UART_BRK_DET_INT_ENA_V  0x00000001U
+#define UART_BRK_DET_INT_ENA_S  7
+/** UART_RXFIFO_TOUT_INT_ENA : R/W; bitpos: [8]; default: 0;
+ *  This is the enable bit for rxfifo_tout_int_st register.
+ */
+#define UART_RXFIFO_TOUT_INT_ENA    (BIT(8))
+#define UART_RXFIFO_TOUT_INT_ENA_M  (UART_RXFIFO_TOUT_INT_ENA_V << UART_RXFIFO_TOUT_INT_ENA_S)
+#define UART_RXFIFO_TOUT_INT_ENA_V  0x00000001U
+#define UART_RXFIFO_TOUT_INT_ENA_S  8
+/** UART_SW_XON_INT_ENA : R/W; bitpos: [9]; default: 0;
+ *  This is the enable bit for sw_xon_int_st register.
+ */
+#define UART_SW_XON_INT_ENA    (BIT(9))
+#define UART_SW_XON_INT_ENA_M  (UART_SW_XON_INT_ENA_V << UART_SW_XON_INT_ENA_S)
+#define UART_SW_XON_INT_ENA_V  0x00000001U
+#define UART_SW_XON_INT_ENA_S  9
+/** UART_SW_XOFF_INT_ENA : R/W; bitpos: [10]; default: 0;
+ *  This is the enable bit for sw_xoff_int_st register.
+ */
+#define UART_SW_XOFF_INT_ENA    (BIT(10))
+#define UART_SW_XOFF_INT_ENA_M  (UART_SW_XOFF_INT_ENA_V << UART_SW_XOFF_INT_ENA_S)
+#define UART_SW_XOFF_INT_ENA_V  0x00000001U
+#define UART_SW_XOFF_INT_ENA_S  10
+/** UART_GLITCH_DET_INT_ENA : R/W; bitpos: [11]; default: 0;
+ *  This is the enable bit for glitch_det_int_st register.
+ */
+#define UART_GLITCH_DET_INT_ENA    (BIT(11))
+#define UART_GLITCH_DET_INT_ENA_M  (UART_GLITCH_DET_INT_ENA_V << UART_GLITCH_DET_INT_ENA_S)
+#define UART_GLITCH_DET_INT_ENA_V  0x00000001U
+#define UART_GLITCH_DET_INT_ENA_S  11
+/** UART_TX_BRK_DONE_INT_ENA : R/W; bitpos: [12]; default: 0;
+ *  This is the enable bit for tx_brk_done_int_st register.
+ */
+#define UART_TX_BRK_DONE_INT_ENA    (BIT(12))
+#define UART_TX_BRK_DONE_INT_ENA_M  (UART_TX_BRK_DONE_INT_ENA_V << UART_TX_BRK_DONE_INT_ENA_S)
+#define UART_TX_BRK_DONE_INT_ENA_V  0x00000001U
+#define UART_TX_BRK_DONE_INT_ENA_S  12
+/** UART_TX_BRK_IDLE_DONE_INT_ENA : R/W; bitpos: [13]; default: 0;
+ *  This is the enable bit for tx_brk_idle_done_int_st register.
+ */
+#define UART_TX_BRK_IDLE_DONE_INT_ENA    (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_ENA_M  (UART_TX_BRK_IDLE_DONE_INT_ENA_V << UART_TX_BRK_IDLE_DONE_INT_ENA_S)
+#define UART_TX_BRK_IDLE_DONE_INT_ENA_V  0x00000001U
+#define UART_TX_BRK_IDLE_DONE_INT_ENA_S  13
+/** UART_TX_DONE_INT_ENA : R/W; bitpos: [14]; default: 0;
+ *  This is the enable bit for tx_done_int_st register.
+ */
+#define UART_TX_DONE_INT_ENA    (BIT(14))
+#define UART_TX_DONE_INT_ENA_M  (UART_TX_DONE_INT_ENA_V << UART_TX_DONE_INT_ENA_S)
+#define UART_TX_DONE_INT_ENA_V  0x00000001U
+#define UART_TX_DONE_INT_ENA_S  14
+/** UART_RS485_PARITY_ERR_INT_ENA : R/W; bitpos: [15]; default: 0;
+ *  This is the enable bit for rs485_parity_err_int_st register.
+ */
+#define UART_RS485_PARITY_ERR_INT_ENA    (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_ENA_M  (UART_RS485_PARITY_ERR_INT_ENA_V << UART_RS485_PARITY_ERR_INT_ENA_S)
+#define UART_RS485_PARITY_ERR_INT_ENA_V  0x00000001U
+#define UART_RS485_PARITY_ERR_INT_ENA_S  15
+/** UART_RS485_FRM_ERR_INT_ENA : R/W; bitpos: [16]; default: 0;
+ *  This is the enable bit for rs485_parity_err_int_st register.
+ */
+#define UART_RS485_FRM_ERR_INT_ENA    (BIT(16))
+#define UART_RS485_FRM_ERR_INT_ENA_M  (UART_RS485_FRM_ERR_INT_ENA_V << UART_RS485_FRM_ERR_INT_ENA_S)
+#define UART_RS485_FRM_ERR_INT_ENA_V  0x00000001U
+#define UART_RS485_FRM_ERR_INT_ENA_S  16
+/** UART_RS485_CLASH_INT_ENA : R/W; bitpos: [17]; default: 0;
+ *  This is the enable bit for rs485_clash_int_st register.
+ */
+#define UART_RS485_CLASH_INT_ENA    (BIT(17))
+#define UART_RS485_CLASH_INT_ENA_M  (UART_RS485_CLASH_INT_ENA_V << UART_RS485_CLASH_INT_ENA_S)
+#define UART_RS485_CLASH_INT_ENA_V  0x00000001U
+#define UART_RS485_CLASH_INT_ENA_S  17
+/** UART_AT_CMD_CHAR_DET_INT_ENA : R/W; bitpos: [18]; default: 0;
+ *  This is the enable bit for at_cmd_char_det_int_st register.
+ */
+#define UART_AT_CMD_CHAR_DET_INT_ENA    (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_ENA_M  (UART_AT_CMD_CHAR_DET_INT_ENA_V << UART_AT_CMD_CHAR_DET_INT_ENA_S)
+#define UART_AT_CMD_CHAR_DET_INT_ENA_V  0x00000001U
+#define UART_AT_CMD_CHAR_DET_INT_ENA_S  18
+/** UART_WAKEUP_INT_ENA : R/W; bitpos: [19]; default: 0;
+ *  This is the enable bit for uart_wakeup_int_st register.
+ */
+#define UART_WAKEUP_INT_ENA    (BIT(19))
+#define UART_WAKEUP_INT_ENA_M  (UART_WAKEUP_INT_ENA_V << UART_WAKEUP_INT_ENA_S)
+#define UART_WAKEUP_INT_ENA_V  0x00000001U
+#define UART_WAKEUP_INT_ENA_S  19
+
+/** UART_INT_CLR_REG register
+ *  Interrupt clear bits
+ */
+#define UART_INT_CLR_REG(i) (REG_UART_BASE(i) + 0x10)
+/** UART_RXFIFO_FULL_INT_CLR : WT; bitpos: [0]; default: 0;
+ *  Set this bit to clear the rxfifo_full_int_raw interrupt.
+ */
+#define UART_RXFIFO_FULL_INT_CLR    (BIT(0))
+#define UART_RXFIFO_FULL_INT_CLR_M  (UART_RXFIFO_FULL_INT_CLR_V << UART_RXFIFO_FULL_INT_CLR_S)
+#define UART_RXFIFO_FULL_INT_CLR_V  0x00000001U
+#define UART_RXFIFO_FULL_INT_CLR_S  0
+/** UART_TXFIFO_EMPTY_INT_CLR : WT; bitpos: [1]; default: 0;
+ *  Set this bit to clear txfifo_empty_int_raw interrupt.
+ */
+#define UART_TXFIFO_EMPTY_INT_CLR    (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_CLR_M  (UART_TXFIFO_EMPTY_INT_CLR_V << UART_TXFIFO_EMPTY_INT_CLR_S)
+#define UART_TXFIFO_EMPTY_INT_CLR_V  0x00000001U
+#define UART_TXFIFO_EMPTY_INT_CLR_S  1
+/** UART_PARITY_ERR_INT_CLR : WT; bitpos: [2]; default: 0;
+ *  Set this bit to clear parity_err_int_raw interrupt.
+ */
+#define UART_PARITY_ERR_INT_CLR    (BIT(2))
+#define UART_PARITY_ERR_INT_CLR_M  (UART_PARITY_ERR_INT_CLR_V << UART_PARITY_ERR_INT_CLR_S)
+#define UART_PARITY_ERR_INT_CLR_V  0x00000001U
+#define UART_PARITY_ERR_INT_CLR_S  2
+/** UART_FRM_ERR_INT_CLR : WT; bitpos: [3]; default: 0;
+ *  Set this bit to clear frm_err_int_raw interrupt.
+ */
+#define UART_FRM_ERR_INT_CLR    (BIT(3))
+#define UART_FRM_ERR_INT_CLR_M  (UART_FRM_ERR_INT_CLR_V << UART_FRM_ERR_INT_CLR_S)
+#define UART_FRM_ERR_INT_CLR_V  0x00000001U
+#define UART_FRM_ERR_INT_CLR_S  3
+/** UART_RXFIFO_OVF_INT_CLR : WT; bitpos: [4]; default: 0;
+ *  Set this bit to clear rxfifo_ovf_int_raw interrupt.
+ */
+#define UART_RXFIFO_OVF_INT_CLR    (BIT(4))
+#define UART_RXFIFO_OVF_INT_CLR_M  (UART_RXFIFO_OVF_INT_CLR_V << UART_RXFIFO_OVF_INT_CLR_S)
+#define UART_RXFIFO_OVF_INT_CLR_V  0x00000001U
+#define UART_RXFIFO_OVF_INT_CLR_S  4
+/** UART_DSR_CHG_INT_CLR : WT; bitpos: [5]; default: 0;
+ *  Set this bit to clear the dsr_chg_int_raw interrupt.
+ */
+#define UART_DSR_CHG_INT_CLR    (BIT(5))
+#define UART_DSR_CHG_INT_CLR_M  (UART_DSR_CHG_INT_CLR_V << UART_DSR_CHG_INT_CLR_S)
+#define UART_DSR_CHG_INT_CLR_V  0x00000001U
+#define UART_DSR_CHG_INT_CLR_S  5
+/** UART_CTS_CHG_INT_CLR : WT; bitpos: [6]; default: 0;
+ *  Set this bit to clear the cts_chg_int_raw interrupt.
+ */
+#define UART_CTS_CHG_INT_CLR    (BIT(6))
+#define UART_CTS_CHG_INT_CLR_M  (UART_CTS_CHG_INT_CLR_V << UART_CTS_CHG_INT_CLR_S)
+#define UART_CTS_CHG_INT_CLR_V  0x00000001U
+#define UART_CTS_CHG_INT_CLR_S  6
+/** UART_BRK_DET_INT_CLR : WT; bitpos: [7]; default: 0;
+ *  Set this bit to clear the brk_det_int_raw interrupt.
+ */
+#define UART_BRK_DET_INT_CLR    (BIT(7))
+#define UART_BRK_DET_INT_CLR_M  (UART_BRK_DET_INT_CLR_V << UART_BRK_DET_INT_CLR_S)
+#define UART_BRK_DET_INT_CLR_V  0x00000001U
+#define UART_BRK_DET_INT_CLR_S  7
+/** UART_RXFIFO_TOUT_INT_CLR : WT; bitpos: [8]; default: 0;
+ *  Set this bit to clear the rxfifo_tout_int_raw interrupt.
+ */
+#define UART_RXFIFO_TOUT_INT_CLR    (BIT(8))
+#define UART_RXFIFO_TOUT_INT_CLR_M  (UART_RXFIFO_TOUT_INT_CLR_V << UART_RXFIFO_TOUT_INT_CLR_S)
+#define UART_RXFIFO_TOUT_INT_CLR_V  0x00000001U
+#define UART_RXFIFO_TOUT_INT_CLR_S  8
+/** UART_SW_XON_INT_CLR : WT; bitpos: [9]; default: 0;
+ *  Set this bit to clear the sw_xon_int_raw interrupt.
+ */
+#define UART_SW_XON_INT_CLR    (BIT(9))
+#define UART_SW_XON_INT_CLR_M  (UART_SW_XON_INT_CLR_V << UART_SW_XON_INT_CLR_S)
+#define UART_SW_XON_INT_CLR_V  0x00000001U
+#define UART_SW_XON_INT_CLR_S  9
+/** UART_SW_XOFF_INT_CLR : WT; bitpos: [10]; default: 0;
+ *  Set this bit to clear the sw_xoff_int_raw interrupt.
+ */
+#define UART_SW_XOFF_INT_CLR    (BIT(10))
+#define UART_SW_XOFF_INT_CLR_M  (UART_SW_XOFF_INT_CLR_V << UART_SW_XOFF_INT_CLR_S)
+#define UART_SW_XOFF_INT_CLR_V  0x00000001U
+#define UART_SW_XOFF_INT_CLR_S  10
+/** UART_GLITCH_DET_INT_CLR : WT; bitpos: [11]; default: 0;
+ *  Set this bit to clear the glitch_det_int_raw interrupt.
+ */
+#define UART_GLITCH_DET_INT_CLR    (BIT(11))
+#define UART_GLITCH_DET_INT_CLR_M  (UART_GLITCH_DET_INT_CLR_V << UART_GLITCH_DET_INT_CLR_S)
+#define UART_GLITCH_DET_INT_CLR_V  0x00000001U
+#define UART_GLITCH_DET_INT_CLR_S  11
+/** UART_TX_BRK_DONE_INT_CLR : WT; bitpos: [12]; default: 0;
+ *  Set this bit to clear the tx_brk_done_int_raw interrupt..
+ */
+#define UART_TX_BRK_DONE_INT_CLR    (BIT(12))
+#define UART_TX_BRK_DONE_INT_CLR_M  (UART_TX_BRK_DONE_INT_CLR_V << UART_TX_BRK_DONE_INT_CLR_S)
+#define UART_TX_BRK_DONE_INT_CLR_V  0x00000001U
+#define UART_TX_BRK_DONE_INT_CLR_S  12
+/** UART_TX_BRK_IDLE_DONE_INT_CLR : WT; bitpos: [13]; default: 0;
+ *  Set this bit to clear the tx_brk_idle_done_int_raw interrupt.
+ */
+#define UART_TX_BRK_IDLE_DONE_INT_CLR    (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_CLR_M  (UART_TX_BRK_IDLE_DONE_INT_CLR_V << UART_TX_BRK_IDLE_DONE_INT_CLR_S)
+#define UART_TX_BRK_IDLE_DONE_INT_CLR_V  0x00000001U
+#define UART_TX_BRK_IDLE_DONE_INT_CLR_S  13
+/** UART_TX_DONE_INT_CLR : WT; bitpos: [14]; default: 0;
+ *  Set this bit to clear the tx_done_int_raw interrupt.
+ */
+#define UART_TX_DONE_INT_CLR    (BIT(14))
+#define UART_TX_DONE_INT_CLR_M  (UART_TX_DONE_INT_CLR_V << UART_TX_DONE_INT_CLR_S)
+#define UART_TX_DONE_INT_CLR_V  0x00000001U
+#define UART_TX_DONE_INT_CLR_S  14
+/** UART_RS485_PARITY_ERR_INT_CLR : WT; bitpos: [15]; default: 0;
+ *  Set this bit to clear the rs485_parity_err_int_raw interrupt.
+ */
+#define UART_RS485_PARITY_ERR_INT_CLR    (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_CLR_M  (UART_RS485_PARITY_ERR_INT_CLR_V << UART_RS485_PARITY_ERR_INT_CLR_S)
+#define UART_RS485_PARITY_ERR_INT_CLR_V  0x00000001U
+#define UART_RS485_PARITY_ERR_INT_CLR_S  15
+/** UART_RS485_FRM_ERR_INT_CLR : WT; bitpos: [16]; default: 0;
+ *  Set this bit to clear the rs485_frm_err_int_raw interrupt.
+ */
+#define UART_RS485_FRM_ERR_INT_CLR    (BIT(16))
+#define UART_RS485_FRM_ERR_INT_CLR_M  (UART_RS485_FRM_ERR_INT_CLR_V << UART_RS485_FRM_ERR_INT_CLR_S)
+#define UART_RS485_FRM_ERR_INT_CLR_V  0x00000001U
+#define UART_RS485_FRM_ERR_INT_CLR_S  16
+/** UART_RS485_CLASH_INT_CLR : WT; bitpos: [17]; default: 0;
+ *  Set this bit to clear the rs485_clash_int_raw interrupt.
+ */
+#define UART_RS485_CLASH_INT_CLR    (BIT(17))
+#define UART_RS485_CLASH_INT_CLR_M  (UART_RS485_CLASH_INT_CLR_V << UART_RS485_CLASH_INT_CLR_S)
+#define UART_RS485_CLASH_INT_CLR_V  0x00000001U
+#define UART_RS485_CLASH_INT_CLR_S  17
+/** UART_AT_CMD_CHAR_DET_INT_CLR : WT; bitpos: [18]; default: 0;
+ *  Set this bit to clear the at_cmd_char_det_int_raw interrupt.
+ */
+#define UART_AT_CMD_CHAR_DET_INT_CLR    (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_CLR_M  (UART_AT_CMD_CHAR_DET_INT_CLR_V << UART_AT_CMD_CHAR_DET_INT_CLR_S)
+#define UART_AT_CMD_CHAR_DET_INT_CLR_V  0x00000001U
+#define UART_AT_CMD_CHAR_DET_INT_CLR_S  18
+/** UART_WAKEUP_INT_CLR : WT; bitpos: [19]; default: 0;
+ *  Set this bit to clear the uart_wakeup_int_raw interrupt.
+ */
+#define UART_WAKEUP_INT_CLR    (BIT(19))
+#define UART_WAKEUP_INT_CLR_M  (UART_WAKEUP_INT_CLR_V << UART_WAKEUP_INT_CLR_S)
+#define UART_WAKEUP_INT_CLR_V  0x00000001U
+#define UART_WAKEUP_INT_CLR_S  19
+
+/** UART_CLKDIV_REG register
+ *  Clock divider configuration
+ */
+#define UART_CLKDIV_REG(i) (REG_UART_BASE(i) + 0x14)
+/** UART_CLKDIV : R/W; bitpos: [11:0]; default: 694;
+ *  The integral part of the frequency divider factor.
+ */
+#define UART_CLKDIV    0x00000FFFU
+#define UART_CLKDIV_M  (UART_CLKDIV_V << UART_CLKDIV_S)
+#define UART_CLKDIV_V  0x00000FFFU
+#define UART_CLKDIV_S  0
+/** UART_CLKDIV_FRAG : R/W; bitpos: [23:20]; default: 0;
+ *  The decimal part of the frequency divider factor.
+ */
+#define UART_CLKDIV_FRAG    0x0000000FU
+#define UART_CLKDIV_FRAG_M  (UART_CLKDIV_FRAG_V << UART_CLKDIV_FRAG_S)
+#define UART_CLKDIV_FRAG_V  0x0000000FU
+#define UART_CLKDIV_FRAG_S  20
+
+/** UART_RX_FILT_REG register
+ *  Rx Filter configuration
+ */
+#define UART_RX_FILT_REG(i) (REG_UART_BASE(i) + 0x18)
+/** UART_GLITCH_FILT : R/W; bitpos: [7:0]; default: 8;
+ *  when input pulse width is lower than this value, the pulse is ignored.
+ */
+#define UART_GLITCH_FILT    0x000000FFU
+#define UART_GLITCH_FILT_M  (UART_GLITCH_FILT_V << UART_GLITCH_FILT_S)
+#define UART_GLITCH_FILT_V  0x000000FFU
+#define UART_GLITCH_FILT_S  0
+/** UART_GLITCH_FILT_EN : R/W; bitpos: [8]; default: 0;
+ *  Set this bit to enable Rx signal filter.
+ */
+#define UART_GLITCH_FILT_EN    (BIT(8))
+#define UART_GLITCH_FILT_EN_M  (UART_GLITCH_FILT_EN_V << UART_GLITCH_FILT_EN_S)
+#define UART_GLITCH_FILT_EN_V  0x00000001U
+#define UART_GLITCH_FILT_EN_S  8
+
+/** UART_STATUS_REG register
+ *  UART status register
+ */
+#define UART_STATUS_REG(i) (REG_UART_BASE(i) + 0x1c)
+/** UART_RXFIFO_CNT : RO; bitpos: [9:0]; default: 0;
+ *  Stores the byte number of valid data in Rx-FIFO.
+ */
+#define UART_RXFIFO_CNT    0x000003FFU
+#define UART_RXFIFO_CNT_M  (UART_RXFIFO_CNT_V << UART_RXFIFO_CNT_S)
+#define UART_RXFIFO_CNT_V  0x000003FFU
+#define UART_RXFIFO_CNT_S  0
+/** UART_DSRN : RO; bitpos: [13]; default: 0;
+ *  The register represent the level value of the internal uart dsr signal.
+ */
+#define UART_DSRN    (BIT(13))
+#define UART_DSRN_M  (UART_DSRN_V << UART_DSRN_S)
+#define UART_DSRN_V  0x00000001U
+#define UART_DSRN_S  13
+/** UART_CTSN : RO; bitpos: [14]; default: 1;
+ *  This register represent the level value of the internal uart cts signal.
+ */
+#define UART_CTSN    (BIT(14))
+#define UART_CTSN_M  (UART_CTSN_V << UART_CTSN_S)
+#define UART_CTSN_V  0x00000001U
+#define UART_CTSN_S  14
+/** UART_RXD : RO; bitpos: [15]; default: 1;
+ *  This register represent the  level value of the internal uart rxd signal.
+ */
+#define UART_RXD    (BIT(15))
+#define UART_RXD_M  (UART_RXD_V << UART_RXD_S)
+#define UART_RXD_V  0x00000001U
+#define UART_RXD_S  15
+/** UART_TXFIFO_CNT : RO; bitpos: [25:16]; default: 0;
+ *  Stores the byte number of data in Tx-FIFO.
+ */
+#define UART_TXFIFO_CNT    0x000003FFU
+#define UART_TXFIFO_CNT_M  (UART_TXFIFO_CNT_V << UART_TXFIFO_CNT_S)
+#define UART_TXFIFO_CNT_V  0x000003FFU
+#define UART_TXFIFO_CNT_S  16
+/** UART_DTRN : RO; bitpos: [29]; default: 1;
+ *  This bit represents the level of the internal uart dtr signal.
+ */
+#define UART_DTRN    (BIT(29))
+#define UART_DTRN_M  (UART_DTRN_V << UART_DTRN_S)
+#define UART_DTRN_V  0x00000001U
+#define UART_DTRN_S  29
+/** UART_RTSN : RO; bitpos: [30]; default: 1;
+ *  This bit represents the level of the internal uart rts signal.
+ */
+#define UART_RTSN    (BIT(30))
+#define UART_RTSN_M  (UART_RTSN_V << UART_RTSN_S)
+#define UART_RTSN_V  0x00000001U
+#define UART_RTSN_S  30
+/** UART_TXD : RO; bitpos: [31]; default: 1;
+ *  This bit represents the  level of the internal uart txd signal.
+ */
+#define UART_TXD    (BIT(31))
+#define UART_TXD_M  (UART_TXD_V << UART_TXD_S)
+#define UART_TXD_V  0x00000001U
+#define UART_TXD_S  31
+
+/** UART_CONF0_REG register
+ *  a
+ */
+#define UART_CONF0_REG(i) (REG_UART_BASE(i) + 0x20)
+/** UART_PARITY : R/W; bitpos: [0]; default: 0;
+ *  This register is used to configure the parity check mode.
+ */
+#define UART_PARITY    (BIT(0))
+#define UART_PARITY_M  (UART_PARITY_V << UART_PARITY_S)
+#define UART_PARITY_V  0x00000001U
+#define UART_PARITY_S  0
+/** UART_PARITY_EN : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to enable uart parity check.
+ */
+#define UART_PARITY_EN    (BIT(1))
+#define UART_PARITY_EN_M  (UART_PARITY_EN_V << UART_PARITY_EN_S)
+#define UART_PARITY_EN_V  0x00000001U
+#define UART_PARITY_EN_S  1
+/** UART_BIT_NUM : R/W; bitpos: [3:2]; default: 3;
+ *  This register is used to set the length of data.
+ */
+#define UART_BIT_NUM    0x00000003U
+#define UART_BIT_NUM_M  (UART_BIT_NUM_V << UART_BIT_NUM_S)
+#define UART_BIT_NUM_V  0x00000003U
+#define UART_BIT_NUM_S  2
+/** UART_STOP_BIT_NUM : R/W; bitpos: [5:4]; default: 1;
+ *  This register is used to set the length of  stop bit.
+ */
+#define UART_STOP_BIT_NUM    0x00000003U
+#define UART_STOP_BIT_NUM_M  (UART_STOP_BIT_NUM_V << UART_STOP_BIT_NUM_S)
+#define UART_STOP_BIT_NUM_V  0x00000003U
+#define UART_STOP_BIT_NUM_S  4
+/** UART_SW_RTS : R/W; bitpos: [6]; default: 0;
+ *  This register is used to configure the software rts signal which is used in
+ *  software flow control.
+ */
+#define UART_SW_RTS    (BIT(6))
+#define UART_SW_RTS_M  (UART_SW_RTS_V << UART_SW_RTS_S)
+#define UART_SW_RTS_V  0x00000001U
+#define UART_SW_RTS_S  6
+/** UART_SW_DTR : R/W; bitpos: [7]; default: 0;
+ *  This register is used to configure the software dtr signal which is used in
+ *  software flow control.
+ */
+#define UART_SW_DTR    (BIT(7))
+#define UART_SW_DTR_M  (UART_SW_DTR_V << UART_SW_DTR_S)
+#define UART_SW_DTR_V  0x00000001U
+#define UART_SW_DTR_S  7
+/** UART_TXD_BRK : R/W; bitpos: [8]; default: 0;
+ *  Set this bit to enbale transmitter to  send NULL when the process of sending data
+ *  is done.
+ */
+#define UART_TXD_BRK    (BIT(8))
+#define UART_TXD_BRK_M  (UART_TXD_BRK_V << UART_TXD_BRK_S)
+#define UART_TXD_BRK_V  0x00000001U
+#define UART_TXD_BRK_S  8
+/** UART_IRDA_DPLX : R/W; bitpos: [9]; default: 0;
+ *  Set this bit to enable IrDA loopback mode.
+ */
+#define UART_IRDA_DPLX    (BIT(9))
+#define UART_IRDA_DPLX_M  (UART_IRDA_DPLX_V << UART_IRDA_DPLX_S)
+#define UART_IRDA_DPLX_V  0x00000001U
+#define UART_IRDA_DPLX_S  9
+/** UART_IRDA_TX_EN : R/W; bitpos: [10]; default: 0;
+ *  This is the start enable bit for IrDA transmitter.
+ */
+#define UART_IRDA_TX_EN    (BIT(10))
+#define UART_IRDA_TX_EN_M  (UART_IRDA_TX_EN_V << UART_IRDA_TX_EN_S)
+#define UART_IRDA_TX_EN_V  0x00000001U
+#define UART_IRDA_TX_EN_S  10
+/** UART_IRDA_WCTL : R/W; bitpos: [11]; default: 0;
+ *  1'h1: The IrDA transmitter's 11th bit is the same as 10th bit. 1'h0: Set IrDA
+ *  transmitter's 11th bit to 0.
+ */
+#define UART_IRDA_WCTL    (BIT(11))
+#define UART_IRDA_WCTL_M  (UART_IRDA_WCTL_V << UART_IRDA_WCTL_S)
+#define UART_IRDA_WCTL_V  0x00000001U
+#define UART_IRDA_WCTL_S  11
+/** UART_IRDA_TX_INV : R/W; bitpos: [12]; default: 0;
+ *  Set this bit to invert the level of  IrDA transmitter.
+ */
+#define UART_IRDA_TX_INV    (BIT(12))
+#define UART_IRDA_TX_INV_M  (UART_IRDA_TX_INV_V << UART_IRDA_TX_INV_S)
+#define UART_IRDA_TX_INV_V  0x00000001U
+#define UART_IRDA_TX_INV_S  12
+/** UART_IRDA_RX_INV : R/W; bitpos: [13]; default: 0;
+ *  Set this bit to invert the level of IrDA receiver.
+ */
+#define UART_IRDA_RX_INV    (BIT(13))
+#define UART_IRDA_RX_INV_M  (UART_IRDA_RX_INV_V << UART_IRDA_RX_INV_S)
+#define UART_IRDA_RX_INV_V  0x00000001U
+#define UART_IRDA_RX_INV_S  13
+/** UART_LOOPBACK : R/W; bitpos: [14]; default: 0;
+ *  Set this bit to enable uart loopback test mode.
+ */
+#define UART_LOOPBACK    (BIT(14))
+#define UART_LOOPBACK_M  (UART_LOOPBACK_V << UART_LOOPBACK_S)
+#define UART_LOOPBACK_V  0x00000001U
+#define UART_LOOPBACK_S  14
+/** UART_TX_FLOW_EN : R/W; bitpos: [15]; default: 0;
+ *  Set this bit to enable flow control function for transmitter.
+ */
+#define UART_TX_FLOW_EN    (BIT(15))
+#define UART_TX_FLOW_EN_M  (UART_TX_FLOW_EN_V << UART_TX_FLOW_EN_S)
+#define UART_TX_FLOW_EN_V  0x00000001U
+#define UART_TX_FLOW_EN_S  15
+/** UART_IRDA_EN : R/W; bitpos: [16]; default: 0;
+ *  Set this bit to enable IrDA protocol.
+ */
+#define UART_IRDA_EN    (BIT(16))
+#define UART_IRDA_EN_M  (UART_IRDA_EN_V << UART_IRDA_EN_S)
+#define UART_IRDA_EN_V  0x00000001U
+#define UART_IRDA_EN_S  16
+/** UART_RXFIFO_RST : R/W; bitpos: [17]; default: 0;
+ *  Set this bit to reset the uart receive-FIFO.
+ */
+#define UART_RXFIFO_RST    (BIT(17))
+#define UART_RXFIFO_RST_M  (UART_RXFIFO_RST_V << UART_RXFIFO_RST_S)
+#define UART_RXFIFO_RST_V  0x00000001U
+#define UART_RXFIFO_RST_S  17
+/** UART_TXFIFO_RST : R/W; bitpos: [18]; default: 0;
+ *  Set this bit to reset the uart transmit-FIFO.
+ */
+#define UART_TXFIFO_RST    (BIT(18))
+#define UART_TXFIFO_RST_M  (UART_TXFIFO_RST_V << UART_TXFIFO_RST_S)
+#define UART_TXFIFO_RST_V  0x00000001U
+#define UART_TXFIFO_RST_S  18
+/** UART_RXD_INV : R/W; bitpos: [19]; default: 0;
+ *  Set this bit to inverse the level value of uart rxd signal.
+ */
+#define UART_RXD_INV    (BIT(19))
+#define UART_RXD_INV_M  (UART_RXD_INV_V << UART_RXD_INV_S)
+#define UART_RXD_INV_V  0x00000001U
+#define UART_RXD_INV_S  19
+/** UART_CTS_INV : R/W; bitpos: [20]; default: 0;
+ *  Set this bit to inverse the level value of uart cts signal.
+ */
+#define UART_CTS_INV    (BIT(20))
+#define UART_CTS_INV_M  (UART_CTS_INV_V << UART_CTS_INV_S)
+#define UART_CTS_INV_V  0x00000001U
+#define UART_CTS_INV_S  20
+/** UART_DSR_INV : R/W; bitpos: [21]; default: 0;
+ *  Set this bit to inverse the level value of uart dsr signal.
+ */
+#define UART_DSR_INV    (BIT(21))
+#define UART_DSR_INV_M  (UART_DSR_INV_V << UART_DSR_INV_S)
+#define UART_DSR_INV_V  0x00000001U
+#define UART_DSR_INV_S  21
+/** UART_TXD_INV : R/W; bitpos: [22]; default: 0;
+ *  Set this bit to inverse the level value of uart txd signal.
+ */
+#define UART_TXD_INV    (BIT(22))
+#define UART_TXD_INV_M  (UART_TXD_INV_V << UART_TXD_INV_S)
+#define UART_TXD_INV_V  0x00000001U
+#define UART_TXD_INV_S  22
+/** UART_RTS_INV : R/W; bitpos: [23]; default: 0;
+ *  Set this bit to inverse the level value of uart rts signal.
+ */
+#define UART_RTS_INV    (BIT(23))
+#define UART_RTS_INV_M  (UART_RTS_INV_V << UART_RTS_INV_S)
+#define UART_RTS_INV_V  0x00000001U
+#define UART_RTS_INV_S  23
+/** UART_DTR_INV : R/W; bitpos: [24]; default: 0;
+ *  Set this bit to inverse the level value of uart dtr signal.
+ */
+#define UART_DTR_INV    (BIT(24))
+#define UART_DTR_INV_M  (UART_DTR_INV_V << UART_DTR_INV_S)
+#define UART_DTR_INV_V  0x00000001U
+#define UART_DTR_INV_S  24
+/** UART_CLK_EN : R/W; bitpos: [25]; default: 0;
+ *  1'h1: Force clock on for register. 1'h0: Support clock only when application writes
+ *  registers.
+ */
+#define UART_CLK_EN    (BIT(25))
+#define UART_CLK_EN_M  (UART_CLK_EN_V << UART_CLK_EN_S)
+#define UART_CLK_EN_V  0x00000001U
+#define UART_CLK_EN_S  25
+/** UART_ERR_WR_MASK : R/W; bitpos: [26]; default: 0;
+ *  1'h1: Receiver stops storing data into FIFO when data is wrong. 1'h0: Receiver
+ *  stores the data even if the  received data is wrong.
+ */
+#define UART_ERR_WR_MASK    (BIT(26))
+#define UART_ERR_WR_MASK_M  (UART_ERR_WR_MASK_V << UART_ERR_WR_MASK_S)
+#define UART_ERR_WR_MASK_V  0x00000001U
+#define UART_ERR_WR_MASK_S  26
+/** UART_AUTOBAUD_EN : R/W; bitpos: [27]; default: 0;
+ *  This is the enable bit for detecting baudrate.
+ */
+#define UART_AUTOBAUD_EN    (BIT(27))
+#define UART_AUTOBAUD_EN_M  (UART_AUTOBAUD_EN_V << UART_AUTOBAUD_EN_S)
+#define UART_AUTOBAUD_EN_V  0x00000001U
+#define UART_AUTOBAUD_EN_S  27
+/** UART_MEM_CLK_EN : R/W; bitpos: [28]; default: 1;
+ *  UART memory clock gate enable signal.
+ */
+#define UART_MEM_CLK_EN    (BIT(28))
+#define UART_MEM_CLK_EN_M  (UART_MEM_CLK_EN_V << UART_MEM_CLK_EN_S)
+#define UART_MEM_CLK_EN_V  0x00000001U
+#define UART_MEM_CLK_EN_S  28
+
+/** UART_CONF1_REG register
+ *  Configuration register 1
+ */
+#define UART_CONF1_REG(i) (REG_UART_BASE(i) + 0x24)
+/** UART_RXFIFO_FULL_THRHD : R/W; bitpos: [9:0]; default: 96;
+ *  It will produce rxfifo_full_int interrupt when receiver receives more data than
+ *  this register value.
+ */
+#define UART_RXFIFO_FULL_THRHD    0x000003FFU
+#define UART_RXFIFO_FULL_THRHD_M  (UART_RXFIFO_FULL_THRHD_V << UART_RXFIFO_FULL_THRHD_S)
+#define UART_RXFIFO_FULL_THRHD_V  0x000003FFU
+#define UART_RXFIFO_FULL_THRHD_S  0
+/** UART_TXFIFO_EMPTY_THRHD : R/W; bitpos: [19:10]; default: 96;
+ *  It will produce txfifo_empty_int interrupt when the data amount in Tx-FIFO is less
+ *  than this register value.
+ */
+#define UART_TXFIFO_EMPTY_THRHD    0x000003FFU
+#define UART_TXFIFO_EMPTY_THRHD_M  (UART_TXFIFO_EMPTY_THRHD_V << UART_TXFIFO_EMPTY_THRHD_S)
+#define UART_TXFIFO_EMPTY_THRHD_V  0x000003FFU
+#define UART_TXFIFO_EMPTY_THRHD_S  10
+/** UART_DIS_RX_DAT_OVF : R/W; bitpos: [20]; default: 0;
+ *  Disable UART Rx data overflow detect.
+ */
+#define UART_DIS_RX_DAT_OVF    (BIT(20))
+#define UART_DIS_RX_DAT_OVF_M  (UART_DIS_RX_DAT_OVF_V << UART_DIS_RX_DAT_OVF_S)
+#define UART_DIS_RX_DAT_OVF_V  0x00000001U
+#define UART_DIS_RX_DAT_OVF_S  20
+/** UART_RX_TOUT_FLOW_DIS : R/W; bitpos: [21]; default: 0;
+ *  Set this bit to stop accumulating idle_cnt when hardware flow control works.
+ */
+#define UART_RX_TOUT_FLOW_DIS    (BIT(21))
+#define UART_RX_TOUT_FLOW_DIS_M  (UART_RX_TOUT_FLOW_DIS_V << UART_RX_TOUT_FLOW_DIS_S)
+#define UART_RX_TOUT_FLOW_DIS_V  0x00000001U
+#define UART_RX_TOUT_FLOW_DIS_S  21
+/** UART_RX_FLOW_EN : R/W; bitpos: [22]; default: 0;
+ *  This is the flow enable bit for UART receiver.
+ */
+#define UART_RX_FLOW_EN    (BIT(22))
+#define UART_RX_FLOW_EN_M  (UART_RX_FLOW_EN_V << UART_RX_FLOW_EN_S)
+#define UART_RX_FLOW_EN_V  0x00000001U
+#define UART_RX_FLOW_EN_S  22
+/** UART_RX_TOUT_EN : R/W; bitpos: [23]; default: 0;
+ *  This is the enble bit for uart receiver's timeout function.
+ */
+#define UART_RX_TOUT_EN    (BIT(23))
+#define UART_RX_TOUT_EN_M  (UART_RX_TOUT_EN_V << UART_RX_TOUT_EN_S)
+#define UART_RX_TOUT_EN_V  0x00000001U
+#define UART_RX_TOUT_EN_S  23
+
+/** UART_LOWPULSE_REG register
+ *  Autobaud minimum low pulse duration register
+ */
+#define UART_LOWPULSE_REG(i) (REG_UART_BASE(i) + 0x28)
+/** UART_LOWPULSE_MIN_CNT : RO; bitpos: [11:0]; default: 4095;
+ *  This register stores the value of the minimum duration time of the low level pulse.
+ *  It is used in baud rate-detect process.
+ */
+#define UART_LOWPULSE_MIN_CNT    0x00000FFFU
+#define UART_LOWPULSE_MIN_CNT_M  (UART_LOWPULSE_MIN_CNT_V << UART_LOWPULSE_MIN_CNT_S)
+#define UART_LOWPULSE_MIN_CNT_V  0x00000FFFU
+#define UART_LOWPULSE_MIN_CNT_S  0
+
+/** UART_HIGHPULSE_REG register
+ *  Autobaud minimum high pulse duration register
+ */
+#define UART_HIGHPULSE_REG(i) (REG_UART_BASE(i) + 0x2c)
+/** UART_HIGHPULSE_MIN_CNT : RO; bitpos: [11:0]; default: 4095;
+ *  This register stores  the value of the maxinum duration time for the high level
+ *  pulse. It is used in baud rate-detect process.
+ */
+#define UART_HIGHPULSE_MIN_CNT    0x00000FFFU
+#define UART_HIGHPULSE_MIN_CNT_M  (UART_HIGHPULSE_MIN_CNT_V << UART_HIGHPULSE_MIN_CNT_S)
+#define UART_HIGHPULSE_MIN_CNT_V  0x00000FFFU
+#define UART_HIGHPULSE_MIN_CNT_S  0
+
+/** UART_RXD_CNT_REG register
+ *  Autobaud edge change count register
+ */
+#define UART_RXD_CNT_REG(i) (REG_UART_BASE(i) + 0x30)
+/** UART_RXD_EDGE_CNT : RO; bitpos: [9:0]; default: 0;
+ *  This register stores the count of rxd edge change. It is used in baud rate-detect
+ *  process.
+ */
+#define UART_RXD_EDGE_CNT    0x000003FFU
+#define UART_RXD_EDGE_CNT_M  (UART_RXD_EDGE_CNT_V << UART_RXD_EDGE_CNT_S)
+#define UART_RXD_EDGE_CNT_V  0x000003FFU
+#define UART_RXD_EDGE_CNT_S  0
+
+/** UART_FLOW_CONF_REG register
+ *  Software flow-control configuration
+ */
+#define UART_FLOW_CONF_REG(i) (REG_UART_BASE(i) + 0x34)
+/** UART_SW_FLOW_CON_EN : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to enable software flow control. It is used with register sw_xon or
+ *  sw_xoff.
+ */
+#define UART_SW_FLOW_CON_EN    (BIT(0))
+#define UART_SW_FLOW_CON_EN_M  (UART_SW_FLOW_CON_EN_V << UART_SW_FLOW_CON_EN_S)
+#define UART_SW_FLOW_CON_EN_V  0x00000001U
+#define UART_SW_FLOW_CON_EN_S  0
+/** UART_XONOFF_DEL : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to remove flow control char from the received data.
+ */
+#define UART_XONOFF_DEL    (BIT(1))
+#define UART_XONOFF_DEL_M  (UART_XONOFF_DEL_V << UART_XONOFF_DEL_S)
+#define UART_XONOFF_DEL_V  0x00000001U
+#define UART_XONOFF_DEL_S  1
+/** UART_FORCE_XON : R/W; bitpos: [2]; default: 0;
+ *  Set this bit to enable the transmitter to go on sending data.
+ */
+#define UART_FORCE_XON    (BIT(2))
+#define UART_FORCE_XON_M  (UART_FORCE_XON_V << UART_FORCE_XON_S)
+#define UART_FORCE_XON_V  0x00000001U
+#define UART_FORCE_XON_S  2
+/** UART_FORCE_XOFF : R/W; bitpos: [3]; default: 0;
+ *  Set this bit to stop the  transmitter from sending data.
+ */
+#define UART_FORCE_XOFF    (BIT(3))
+#define UART_FORCE_XOFF_M  (UART_FORCE_XOFF_V << UART_FORCE_XOFF_S)
+#define UART_FORCE_XOFF_V  0x00000001U
+#define UART_FORCE_XOFF_S  3
+/** UART_SEND_XON : R/W/SS/SC; bitpos: [4]; default: 0;
+ *  Set this bit to send Xon char. It is cleared by hardware automatically.
+ */
+#define UART_SEND_XON    (BIT(4))
+#define UART_SEND_XON_M  (UART_SEND_XON_V << UART_SEND_XON_S)
+#define UART_SEND_XON_V  0x00000001U
+#define UART_SEND_XON_S  4
+/** UART_SEND_XOFF : R/W/SS/SC; bitpos: [5]; default: 0;
+ *  Set this bit to send Xoff char. It is cleared by hardware automatically.
+ */
+#define UART_SEND_XOFF    (BIT(5))
+#define UART_SEND_XOFF_M  (UART_SEND_XOFF_V << UART_SEND_XOFF_S)
+#define UART_SEND_XOFF_V  0x00000001U
+#define UART_SEND_XOFF_S  5
+
+/** UART_SLEEP_CONF_REG register
+ *  Sleep-mode configuration
+ */
+#define UART_SLEEP_CONF_REG(i) (REG_UART_BASE(i) + 0x38)
+/** UART_ACTIVE_THRESHOLD : R/W; bitpos: [9:0]; default: 240;
+ *  The uart is activated from light sleeping mode when the input rxd edge changes more
+ *  times than this register value.
+ */
+#define UART_ACTIVE_THRESHOLD    0x000003FFU
+#define UART_ACTIVE_THRESHOLD_M  (UART_ACTIVE_THRESHOLD_V << UART_ACTIVE_THRESHOLD_S)
+#define UART_ACTIVE_THRESHOLD_V  0x000003FFU
+#define UART_ACTIVE_THRESHOLD_S  0
+
+/** UART_SWFC_CONF0_REG register
+ *  Software flow-control character configuration
+ */
+#define UART_SWFC_CONF0_REG(i) (REG_UART_BASE(i) + 0x3c)
+/** UART_XOFF_THRESHOLD : R/W; bitpos: [9:0]; default: 224;
+ *  When the data amount in Rx-FIFO is more than this register value with
+ *  uart_sw_flow_con_en set to 1, it will send a Xoff char.
+ */
+#define UART_XOFF_THRESHOLD    0x000003FFU
+#define UART_XOFF_THRESHOLD_M  (UART_XOFF_THRESHOLD_V << UART_XOFF_THRESHOLD_S)
+#define UART_XOFF_THRESHOLD_V  0x000003FFU
+#define UART_XOFF_THRESHOLD_S  0
+/** UART_XOFF_CHAR : R/W; bitpos: [17:10]; default: 19;
+ *  This register stores the Xoff flow control char.
+ */
+#define UART_XOFF_CHAR    0x000000FFU
+#define UART_XOFF_CHAR_M  (UART_XOFF_CHAR_V << UART_XOFF_CHAR_S)
+#define UART_XOFF_CHAR_V  0x000000FFU
+#define UART_XOFF_CHAR_S  10
+
+/** UART_SWFC_CONF1_REG register
+ *  Software flow-control character configuration
+ */
+#define UART_SWFC_CONF1_REG(i) (REG_UART_BASE(i) + 0x40)
+/** UART_XON_THRESHOLD : R/W; bitpos: [9:0]; default: 0;
+ *  When the data amount in Rx-FIFO is less than this register value with
+ *  uart_sw_flow_con_en set to 1, it will send a Xon char.
+ */
+#define UART_XON_THRESHOLD    0x000003FFU
+#define UART_XON_THRESHOLD_M  (UART_XON_THRESHOLD_V << UART_XON_THRESHOLD_S)
+#define UART_XON_THRESHOLD_V  0x000003FFU
+#define UART_XON_THRESHOLD_S  0
+/** UART_XON_CHAR : R/W; bitpos: [17:10]; default: 17;
+ *  This register stores the Xon flow control char.
+ */
+#define UART_XON_CHAR    0x000000FFU
+#define UART_XON_CHAR_M  (UART_XON_CHAR_V << UART_XON_CHAR_S)
+#define UART_XON_CHAR_V  0x000000FFU
+#define UART_XON_CHAR_S  10
+
+/** UART_TXBRK_CONF_REG register
+ *  Tx Break character configuration
+ */
+#define UART_TXBRK_CONF_REG(i) (REG_UART_BASE(i) + 0x44)
+/** UART_TX_BRK_NUM : R/W; bitpos: [7:0]; default: 10;
+ *  This register is used to configure the number of 0 to be sent after the process of
+ *  sending data is done. It is active when txd_brk is set to 1.
+ */
+#define UART_TX_BRK_NUM    0x000000FFU
+#define UART_TX_BRK_NUM_M  (UART_TX_BRK_NUM_V << UART_TX_BRK_NUM_S)
+#define UART_TX_BRK_NUM_V  0x000000FFU
+#define UART_TX_BRK_NUM_S  0
+
+/** UART_IDLE_CONF_REG register
+ *  Frame-end idle configuration
+ */
+#define UART_IDLE_CONF_REG(i) (REG_UART_BASE(i) + 0x48)
+/** UART_RX_IDLE_THRHD : R/W; bitpos: [9:0]; default: 256;
+ *  It will produce frame end signal when receiver takes more time to receive one byte
+ *  data than this register value.
+ */
+#define UART_RX_IDLE_THRHD    0x000003FFU
+#define UART_RX_IDLE_THRHD_M  (UART_RX_IDLE_THRHD_V << UART_RX_IDLE_THRHD_S)
+#define UART_RX_IDLE_THRHD_V  0x000003FFU
+#define UART_RX_IDLE_THRHD_S  0
+/** UART_TX_IDLE_NUM : R/W; bitpos: [19:10]; default: 256;
+ *  This register is used to configure the duration time between transfers.
+ */
+#define UART_TX_IDLE_NUM    0x000003FFU
+#define UART_TX_IDLE_NUM_M  (UART_TX_IDLE_NUM_V << UART_TX_IDLE_NUM_S)
+#define UART_TX_IDLE_NUM_V  0x000003FFU
+#define UART_TX_IDLE_NUM_S  10
+
+/** UART_RS485_CONF_REG register
+ *  RS485 mode configuration
+ */
+#define UART_RS485_CONF_REG(i) (REG_UART_BASE(i) + 0x4c)
+/** UART_RS485_EN : R/W; bitpos: [0]; default: 0;
+ *  Set this bit to choose the rs485 mode.
+ */
+#define UART_RS485_EN    (BIT(0))
+#define UART_RS485_EN_M  (UART_RS485_EN_V << UART_RS485_EN_S)
+#define UART_RS485_EN_V  0x00000001U
+#define UART_RS485_EN_S  0
+/** UART_DL0_EN : R/W; bitpos: [1]; default: 0;
+ *  Set this bit to delay the stop bit by 1 bit.
+ */
+#define UART_DL0_EN    (BIT(1))
+#define UART_DL0_EN_M  (UART_DL0_EN_V << UART_DL0_EN_S)
+#define UART_DL0_EN_V  0x00000001U
+#define UART_DL0_EN_S  1
+/** UART_DL1_EN : R/W; bitpos: [2]; default: 0;
+ *  Set this bit to delay the stop bit by 1 bit.
+ */
+#define UART_DL1_EN    (BIT(2))
+#define UART_DL1_EN_M  (UART_DL1_EN_V << UART_DL1_EN_S)
+#define UART_DL1_EN_V  0x00000001U
+#define UART_DL1_EN_S  2
+/** UART_RS485TX_RX_EN : R/W; bitpos: [3]; default: 0;
+ *  Set this bit to enable receiver could receive data when the transmitter is
+ *  transmitting data in rs485 mode.
+ */
+#define UART_RS485TX_RX_EN    (BIT(3))
+#define UART_RS485TX_RX_EN_M  (UART_RS485TX_RX_EN_V << UART_RS485TX_RX_EN_S)
+#define UART_RS485TX_RX_EN_V  0x00000001U
+#define UART_RS485TX_RX_EN_S  3
+/** UART_RS485RXBY_TX_EN : R/W; bitpos: [4]; default: 0;
+ *  1'h1: enable rs485 transmitter to send data when rs485 receiver line is busy.
+ */
+#define UART_RS485RXBY_TX_EN    (BIT(4))
+#define UART_RS485RXBY_TX_EN_M  (UART_RS485RXBY_TX_EN_V << UART_RS485RXBY_TX_EN_S)
+#define UART_RS485RXBY_TX_EN_V  0x00000001U
+#define UART_RS485RXBY_TX_EN_S  4
+/** UART_RS485_RX_DLY_NUM : R/W; bitpos: [5]; default: 0;
+ *  This register is used to delay the receiver's internal data signal.
+ */
+#define UART_RS485_RX_DLY_NUM    (BIT(5))
+#define UART_RS485_RX_DLY_NUM_M  (UART_RS485_RX_DLY_NUM_V << UART_RS485_RX_DLY_NUM_S)
+#define UART_RS485_RX_DLY_NUM_V  0x00000001U
+#define UART_RS485_RX_DLY_NUM_S  5
+/** UART_RS485_TX_DLY_NUM : R/W; bitpos: [9:6]; default: 0;
+ *  This register is used to delay the transmitter's internal data signal.
+ */
+#define UART_RS485_TX_DLY_NUM    0x0000000FU
+#define UART_RS485_TX_DLY_NUM_M  (UART_RS485_TX_DLY_NUM_V << UART_RS485_TX_DLY_NUM_S)
+#define UART_RS485_TX_DLY_NUM_V  0x0000000FU
+#define UART_RS485_TX_DLY_NUM_S  6
+
+/** UART_AT_CMD_PRECNT_REG register
+ *  Pre-sequence timing configuration
+ */
+#define UART_AT_CMD_PRECNT_REG(i) (REG_UART_BASE(i) + 0x50)
+/** UART_PRE_IDLE_NUM : R/W; bitpos: [15:0]; default: 2305;
+ *  This register is used to configure the idle duration time before the first at_cmd
+ *  is received by receiver.
+ */
+#define UART_PRE_IDLE_NUM    0x0000FFFFU
+#define UART_PRE_IDLE_NUM_M  (UART_PRE_IDLE_NUM_V << UART_PRE_IDLE_NUM_S)
+#define UART_PRE_IDLE_NUM_V  0x0000FFFFU
+#define UART_PRE_IDLE_NUM_S  0
+
+/** UART_AT_CMD_POSTCNT_REG register
+ *  Post-sequence timing configuration
+ */
+#define UART_AT_CMD_POSTCNT_REG(i) (REG_UART_BASE(i) + 0x54)
+/** UART_POST_IDLE_NUM : R/W; bitpos: [15:0]; default: 2305;
+ *  This register is used to configure the duration time between the last at_cmd and
+ *  the next data.
+ */
+#define UART_POST_IDLE_NUM    0x0000FFFFU
+#define UART_POST_IDLE_NUM_M  (UART_POST_IDLE_NUM_V << UART_POST_IDLE_NUM_S)
+#define UART_POST_IDLE_NUM_V  0x0000FFFFU
+#define UART_POST_IDLE_NUM_S  0
+
+/** UART_AT_CMD_GAPTOUT_REG register
+ *  Timeout configuration
+ */
+#define UART_AT_CMD_GAPTOUT_REG(i) (REG_UART_BASE(i) + 0x58)
+/** UART_RX_GAP_TOUT : R/W; bitpos: [15:0]; default: 11;
+ *  This register is used to configure the duration time between the at_cmd chars.
+ */
+#define UART_RX_GAP_TOUT    0x0000FFFFU
+#define UART_RX_GAP_TOUT_M  (UART_RX_GAP_TOUT_V << UART_RX_GAP_TOUT_S)
+#define UART_RX_GAP_TOUT_V  0x0000FFFFU
+#define UART_RX_GAP_TOUT_S  0
+
+/** UART_AT_CMD_CHAR_REG register
+ *  AT escape sequence detection configuration
+ */
+#define UART_AT_CMD_CHAR_REG(i) (REG_UART_BASE(i) + 0x5c)
+/** UART_AT_CMD_CHAR : R/W; bitpos: [7:0]; default: 43;
+ *  This register is used to configure the content of at_cmd char.
+ */
+#define UART_AT_CMD_CHAR    0x000000FFU
+#define UART_AT_CMD_CHAR_M  (UART_AT_CMD_CHAR_V << UART_AT_CMD_CHAR_S)
+#define UART_AT_CMD_CHAR_V  0x000000FFU
+#define UART_AT_CMD_CHAR_S  0
+/** UART_CHAR_NUM : R/W; bitpos: [15:8]; default: 3;
+ *  This register is used to configure the num of continuous at_cmd chars received by
+ *  receiver.
+ */
+#define UART_CHAR_NUM    0x000000FFU
+#define UART_CHAR_NUM_M  (UART_CHAR_NUM_V << UART_CHAR_NUM_S)
+#define UART_CHAR_NUM_V  0x000000FFU
+#define UART_CHAR_NUM_S  8
+
+/** UART_MEM_CONF_REG register
+ *  UART threshold and allocation configuration
+ */
+#define UART_MEM_CONF_REG(i) (REG_UART_BASE(i) + 0x60)
+/** UART_RX_SIZE : R/W; bitpos: [3:1]; default: 1;
+ *  This register is used to configure the amount of mem allocated for receive-FIFO.
+ *  The default number is 128 bytes.
+ */
+#define UART_RX_SIZE    0x00000007U
+#define UART_RX_SIZE_M  (UART_RX_SIZE_V << UART_RX_SIZE_S)
+#define UART_RX_SIZE_V  0x00000007U
+#define UART_RX_SIZE_S  1
+/** UART_TX_SIZE : R/W; bitpos: [6:4]; default: 1;
+ *  This register is used to configure the amount of mem allocated for transmit-FIFO.
+ *  The default number is 128 bytes.
+ */
+#define UART_TX_SIZE    0x00000007U
+#define UART_TX_SIZE_M  (UART_TX_SIZE_V << UART_TX_SIZE_S)
+#define UART_TX_SIZE_V  0x00000007U
+#define UART_TX_SIZE_S  4
+/** UART_RX_FLOW_THRHD : R/W; bitpos: [16:7]; default: 0;
+ *  This register is used to configure the maximum amount of data that can be received
+ *  when hardware flow control works.
+ */
+#define UART_RX_FLOW_THRHD    0x000003FFU
+#define UART_RX_FLOW_THRHD_M  (UART_RX_FLOW_THRHD_V << UART_RX_FLOW_THRHD_S)
+#define UART_RX_FLOW_THRHD_V  0x000003FFU
+#define UART_RX_FLOW_THRHD_S  7
+/** UART_RX_TOUT_THRHD : R/W; bitpos: [26:17]; default: 10;
+ *  This register is used to configure the threshold time that receiver takes to
+ *  receive one byte. The rxfifo_tout_int interrupt will be trigger when the receiver
+ *  takes more time to receive one byte with rx_tout_en set to 1.
+ */
+#define UART_RX_TOUT_THRHD    0x000003FFU
+#define UART_RX_TOUT_THRHD_M  (UART_RX_TOUT_THRHD_V << UART_RX_TOUT_THRHD_S)
+#define UART_RX_TOUT_THRHD_V  0x000003FFU
+#define UART_RX_TOUT_THRHD_S  17
+/** UART_MEM_FORCE_PD : R/W; bitpos: [27]; default: 0;
+ *  Set this bit to force power down UART memory.
+ */
+#define UART_MEM_FORCE_PD    (BIT(27))
+#define UART_MEM_FORCE_PD_M  (UART_MEM_FORCE_PD_V << UART_MEM_FORCE_PD_S)
+#define UART_MEM_FORCE_PD_V  0x00000001U
+#define UART_MEM_FORCE_PD_S  27
+/** UART_MEM_FORCE_PU : R/W; bitpos: [28]; default: 0;
+ *  Set this bit to force power up UART memory.
+ */
+#define UART_MEM_FORCE_PU    (BIT(28))
+#define UART_MEM_FORCE_PU_M  (UART_MEM_FORCE_PU_V << UART_MEM_FORCE_PU_S)
+#define UART_MEM_FORCE_PU_V  0x00000001U
+#define UART_MEM_FORCE_PU_S  28
+
+/** UART_MEM_TX_STATUS_REG register
+ *  Tx-FIFO write and read offset address.
+ */
+#define UART_MEM_TX_STATUS_REG(i) (REG_UART_BASE(i) + 0x64)
+/** UART_APB_TX_WADDR : RO; bitpos: [9:0]; default: 0;
+ *  This register stores the offset address in Tx-FIFO when software writes Tx-FIFO via
+ *  APB.
+ */
+#define UART_APB_TX_WADDR    0x000003FFU
+#define UART_APB_TX_WADDR_M  (UART_APB_TX_WADDR_V << UART_APB_TX_WADDR_S)
+#define UART_APB_TX_WADDR_V  0x000003FFU
+#define UART_APB_TX_WADDR_S  0
+/** UART_TX_RADDR : RO; bitpos: [20:11]; default: 0;
+ *  This register stores the offset address in Tx-FIFO when Tx-FSM reads data via
+ *  Tx-FIFO_Ctrl.
+ */
+#define UART_TX_RADDR    0x000003FFU
+#define UART_TX_RADDR_M  (UART_TX_RADDR_V << UART_TX_RADDR_S)
+#define UART_TX_RADDR_V  0x000003FFU
+#define UART_TX_RADDR_S  11
+
+/** UART_MEM_RX_STATUS_REG register
+ *  Rx-FIFO write and read offset address.
+ */
+#define UART_MEM_RX_STATUS_REG(i) (REG_UART_BASE(i) + 0x68)
+/** UART_APB_RX_RADDR : RO; bitpos: [9:0]; default: 512;
+ *  This register stores the offset address in RX-FIFO when software reads data from
+ *  Rx-FIFO via APB. UART0 is 10'h200. UART1 is 10'h280. UART2 is 10'h300.
+ */
+#define UART_APB_RX_RADDR    0x000003FFU
+#define UART_APB_RX_RADDR_M  (UART_APB_RX_RADDR_V << UART_APB_RX_RADDR_S)
+#define UART_APB_RX_RADDR_V  0x000003FFU
+#define UART_APB_RX_RADDR_S  0
+/** UART_RX_WADDR : RO; bitpos: [20:11]; default: 512;
+ *  This register stores the offset address in Rx-FIFO when Rx-FIFO_Ctrl writes
+ *  Rx-FIFO. UART0 is 10'h200. UART1 is 10'h280. UART2 is 10'h300.
+ */
+#define UART_RX_WADDR    0x000003FFU
+#define UART_RX_WADDR_M  (UART_RX_WADDR_V << UART_RX_WADDR_S)
+#define UART_RX_WADDR_V  0x000003FFU
+#define UART_RX_WADDR_S  11
+
+/** UART_FSM_STATUS_REG register
+ *  UART transmit and receive status.
+ */
+#define UART_FSM_STATUS_REG(i) (REG_UART_BASE(i) + 0x6c)
+/** UART_ST_URX_OUT : RO; bitpos: [3:0]; default: 0;
+ *  This is the status register of receiver.
+ */
+#define UART_ST_URX_OUT    0x0000000FU
+#define UART_ST_URX_OUT_M  (UART_ST_URX_OUT_V << UART_ST_URX_OUT_S)
+#define UART_ST_URX_OUT_V  0x0000000FU
+#define UART_ST_URX_OUT_S  0
+/** UART_ST_UTX_OUT : RO; bitpos: [7:4]; default: 0;
+ *  This is the status register of transmitter.
+ */
+#define UART_ST_UTX_OUT    0x0000000FU
+#define UART_ST_UTX_OUT_M  (UART_ST_UTX_OUT_V << UART_ST_UTX_OUT_S)
+#define UART_ST_UTX_OUT_V  0x0000000FU
+#define UART_ST_UTX_OUT_S  4
+
+/** UART_POSPULSE_REG register
+ *  Autobaud high pulse register
+ */
+#define UART_POSPULSE_REG(i) (REG_UART_BASE(i) + 0x70)
+/** UART_POSEDGE_MIN_CNT : RO; bitpos: [11:0]; default: 4095;
+ *  This register stores the minimal input clock count between two positive edges. It
+ *  is used in boudrate-detect process.
+ */
+#define UART_POSEDGE_MIN_CNT    0x00000FFFU
+#define UART_POSEDGE_MIN_CNT_M  (UART_POSEDGE_MIN_CNT_V << UART_POSEDGE_MIN_CNT_S)
+#define UART_POSEDGE_MIN_CNT_V  0x00000FFFU
+#define UART_POSEDGE_MIN_CNT_S  0
+
+/** UART_NEGPULSE_REG register
+ *  Autobaud low pulse register
+ */
+#define UART_NEGPULSE_REG(i) (REG_UART_BASE(i) + 0x74)
+/** UART_NEGEDGE_MIN_CNT : RO; bitpos: [11:0]; default: 4095;
+ *  This register stores the minimal input clock count between two negative edges. It
+ *  is used in boudrate-detect process.
+ */
+#define UART_NEGEDGE_MIN_CNT    0x00000FFFU
+#define UART_NEGEDGE_MIN_CNT_M  (UART_NEGEDGE_MIN_CNT_V << UART_NEGEDGE_MIN_CNT_S)
+#define UART_NEGEDGE_MIN_CNT_V  0x00000FFFU
+#define UART_NEGEDGE_MIN_CNT_S  0
+
+/** UART_CLK_CONF_REG register
+ *  UART core clock configuration
+ */
+#define UART_CLK_CONF_REG(i) (REG_UART_BASE(i) + 0x78)
+/** UART_SCLK_DIV_B : R/W; bitpos: [5:0]; default: 0;
+ *  The  denominator of the frequency divider factor.
+ */
+#define UART_SCLK_DIV_B    0x0000003FU
+#define UART_SCLK_DIV_B_M  (UART_SCLK_DIV_B_V << UART_SCLK_DIV_B_S)
+#define UART_SCLK_DIV_B_V  0x0000003FU
+#define UART_SCLK_DIV_B_S  0
+/** UART_SCLK_DIV_A : R/W; bitpos: [11:6]; default: 0;
+ *  The numerator of the frequency divider factor.
+ */
+#define UART_SCLK_DIV_A    0x0000003FU
+#define UART_SCLK_DIV_A_M  (UART_SCLK_DIV_A_V << UART_SCLK_DIV_A_S)
+#define UART_SCLK_DIV_A_V  0x0000003FU
+#define UART_SCLK_DIV_A_S  6
+/** UART_SCLK_DIV_NUM : R/W; bitpos: [19:12]; default: 1;
+ *  The integral part of the frequency divider factor.
+ */
+#define UART_SCLK_DIV_NUM    0x000000FFU
+#define UART_SCLK_DIV_NUM_M  (UART_SCLK_DIV_NUM_V << UART_SCLK_DIV_NUM_S)
+#define UART_SCLK_DIV_NUM_V  0x000000FFU
+#define UART_SCLK_DIV_NUM_S  12
+/** UART_SCLK_SEL : R/W; bitpos: [21:20]; default: 3;
+ *  UART clock source select. 1: 80Mhz, 2: 8Mhz, 3: XTAL.
+ */
+#define UART_SCLK_SEL    0x00000003U
+#define UART_SCLK_SEL_M  (UART_SCLK_SEL_V << UART_SCLK_SEL_S)
+#define UART_SCLK_SEL_V  0x00000003U
+#define UART_SCLK_SEL_S  20
+/** UART_SCLK_EN : R/W; bitpos: [22]; default: 1;
+ *  Set this bit to enable UART Tx/Rx clock.
+ */
+#define UART_SCLK_EN    (BIT(22))
+#define UART_SCLK_EN_M  (UART_SCLK_EN_V << UART_SCLK_EN_S)
+#define UART_SCLK_EN_V  0x00000001U
+#define UART_SCLK_EN_S  22
+/** UART_RST_CORE : R/W; bitpos: [23]; default: 0;
+ *  Write 1 then write 0 to this bit, reset UART Tx/Rx.
+ */
+#define UART_RST_CORE    (BIT(23))
+#define UART_RST_CORE_M  (UART_RST_CORE_V << UART_RST_CORE_S)
+#define UART_RST_CORE_V  0x00000001U
+#define UART_RST_CORE_S  23
+/** UART_TX_SCLK_EN : R/W; bitpos: [24]; default: 1;
+ *  Set this bit to enable UART Tx clock.
+ */
+#define UART_TX_SCLK_EN    (BIT(24))
+#define UART_TX_SCLK_EN_M  (UART_TX_SCLK_EN_V << UART_TX_SCLK_EN_S)
+#define UART_TX_SCLK_EN_V  0x00000001U
+#define UART_TX_SCLK_EN_S  24
+/** UART_RX_SCLK_EN : R/W; bitpos: [25]; default: 1;
+ *  Set this bit to enable UART Rx clock.
+ */
+#define UART_RX_SCLK_EN    (BIT(25))
+#define UART_RX_SCLK_EN_M  (UART_RX_SCLK_EN_V << UART_RX_SCLK_EN_S)
+#define UART_RX_SCLK_EN_V  0x00000001U
+#define UART_RX_SCLK_EN_S  25
+/** UART_TX_RST_CORE : R/W; bitpos: [26]; default: 0;
+ *  Write 1 then write 0 to this bit, reset UART Tx.
+ */
+#define UART_TX_RST_CORE    (BIT(26))
+#define UART_TX_RST_CORE_M  (UART_TX_RST_CORE_V << UART_TX_RST_CORE_S)
+#define UART_TX_RST_CORE_V  0x00000001U
+#define UART_TX_RST_CORE_S  26
+/** UART_RX_RST_CORE : R/W; bitpos: [27]; default: 0;
+ *  Write 1 then write 0 to this bit, reset UART Rx.
+ */
+#define UART_RX_RST_CORE    (BIT(27))
+#define UART_RX_RST_CORE_M  (UART_RX_RST_CORE_V << UART_RX_RST_CORE_S)
+#define UART_RX_RST_CORE_V  0x00000001U
+#define UART_RX_RST_CORE_S  27
+
+/** UART_DATE_REG register
+ *  UART Version register
+ */
+#define UART_DATE_REG(i) (REG_UART_BASE(i) + 0x7c)
+/** UART_DATE : R/W; bitpos: [31:0]; default: 33587824;
+ *  This is the version register.
+ */
+#define UART_DATE    0xFFFFFFFFU
+#define UART_DATE_M  (UART_DATE_V << UART_DATE_S)
+#define UART_DATE_V  0xFFFFFFFFU
+#define UART_DATE_S  0
+
+/** UART_ID_REG register
+ *  UART ID register
+ */
+#define UART_ID_REG(i) (REG_UART_BASE(i) + 0x80)
+/** UART_ID : R/W; bitpos: [29:0]; default: 1280;
+ *  This register is used to configure the uart_id.
+ */
+#define UART_ID    0x3FFFFFFFU
+#define UART_ID_M  (UART_ID_V << UART_ID_S)
+#define UART_ID_V  0x3FFFFFFFU
+#define UART_ID_S  0
+/** UART_HIGH_SPEED : R/W; bitpos: [30]; default: 1;
+ *  This bit used to select synchronize mode. 1: Registers are auto synchronized into
+ *  UART Core clock and UART core should be keep the same with APB clock. 0: After
+ *  configure registers, software needs to write 1 to UART_REG_UPDATE to synchronize
+ *  registers.
+ */
+#define UART_HIGH_SPEED    (BIT(30))
+#define UART_HIGH_SPEED_M  (UART_HIGH_SPEED_V << UART_HIGH_SPEED_S)
+#define UART_HIGH_SPEED_V  0x00000001U
+#define UART_HIGH_SPEED_S  30
+/** UART_REG_UPDATE : R/W/SC; bitpos: [31]; default: 0;
+ *  Software write 1 would synchronize registers into UART Core clock domain and would
+ *  be cleared by hardware after synchronization is done.
+ */
+#define UART_REG_UPDATE    (BIT(31))
+#define UART_REG_UPDATE_M  (UART_REG_UPDATE_V << UART_REG_UPDATE_S)
+#define UART_REG_UPDATE_V  0x00000001U
+#define UART_REG_UPDATE_S  31
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_struct.h
new file mode 100644
index 00000000000..23d6d15450e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uart_struct.h
@@ -0,0 +1,1213 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Group: FIFO Configuration */
+/** Type of fifo register
+ *  FIFO data register
+ */
+typedef union {
+    struct {
+        /** rxfifo_rd_byte : RO; bitpos: [7:0]; default: 0;
+         *  UART $n accesses FIFO via this register.
+         *  Must be a unit32_t not a bitfield as to avoid
+         *  a read->write operation during writing. Reading
+         *  during writing would impact RX fifo
+         */
+        uint32_t rxfifo_rd_byte;
+    };
+    uint32_t val;
+} uart_fifo_reg_t;
+
+/** Type of mem_conf register
+ *  UART threshold and allocation configuration
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0:1;
+        /** rx_size : R/W; bitpos: [3:1]; default: 1;
+         *  This register is used to configure the amount of mem allocated for receive-FIFO.
+         *  The default number is 128 bytes.
+         */
+        uint32_t rx_size:3;
+        /** tx_size : R/W; bitpos: [6:4]; default: 1;
+         *  This register is used to configure the amount of mem allocated for transmit-FIFO.
+         *  The default number is 128 bytes.
+         */
+        uint32_t tx_size:3;
+        /** rx_flow_thrhd : R/W; bitpos: [16:7]; default: 0;
+         *  This register is used to configure the maximum amount of data that can be received
+         *  when hardware flow control works.
+         */
+        uint32_t rx_flow_thrhd:10;
+        /** rx_tout_thrhd : R/W; bitpos: [26:17]; default: 10;
+         *  This register is used to configure the threshold time that receiver takes to
+         *  receive one byte. The rxfifo_tout_int interrupt will be trigger when the receiver
+         *  takes more time to receive one byte with rx_tout_en set to 1.
+         */
+        uint32_t rx_tout_thrhd:10;
+        /** mem_force_pd : R/W; bitpos: [27]; default: 0;
+         *  Set this bit to force power down UART memory.
+         */
+        uint32_t mem_force_pd:1;
+        /** mem_force_pu : R/W; bitpos: [28]; default: 0;
+         *  Set this bit to force power up UART memory.
+         */
+        uint32_t mem_force_pu:1;
+        uint32_t reserved_29:3;
+    };
+    uint32_t val;
+} uart_mem_conf_reg_t;
+
+
+/** Group: Interrupt Register */
+/** Type of int_raw register
+ *  Raw interrupt status
+ */
+typedef union {
+    struct {
+        /** rxfifo_full_int_raw : R/WTC/SS; bitpos: [0]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver receives more data than
+         *  what rxfifo_full_thrhd specifies.
+         */
+        uint32_t rxfifo_full_int_raw:1;
+        /** txfifo_empty_int_raw : R/WTC/SS; bitpos: [1]; default: 1;
+         *  This interrupt raw bit turns to high level when the amount of data in Tx-FIFO is
+         *  less than what txfifo_empty_thrhd specifies .
+         */
+        uint32_t txfifo_empty_int_raw:1;
+        /** parity_err_int_raw : R/WTC/SS; bitpos: [2]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver detects a parity error in
+         *  the data.
+         */
+        uint32_t parity_err_int_raw:1;
+        /** frm_err_int_raw : R/WTC/SS; bitpos: [3]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver detects a data frame error
+         *  .
+         */
+        uint32_t frm_err_int_raw:1;
+        /** rxfifo_ovf_int_raw : R/WTC/SS; bitpos: [4]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver receives more data than
+         *  the FIFO can store.
+         */
+        uint32_t rxfifo_ovf_int_raw:1;
+        /** dsr_chg_int_raw : R/WTC/SS; bitpos: [5]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver detects the edge change of
+         *  DSRn signal.
+         */
+        uint32_t dsr_chg_int_raw:1;
+        /** cts_chg_int_raw : R/WTC/SS; bitpos: [6]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver detects the edge change of
+         *  CTSn signal.
+         */
+        uint32_t cts_chg_int_raw:1;
+        /** brk_det_int_raw : R/WTC/SS; bitpos: [7]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver detects a 0 after the stop
+         *  bit.
+         */
+        uint32_t brk_det_int_raw:1;
+        /** rxfifo_tout_int_raw : R/WTC/SS; bitpos: [8]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver takes more time than
+         *  rx_tout_thrhd to receive a byte.
+         */
+        uint32_t rxfifo_tout_int_raw:1;
+        /** sw_xon_int_raw : R/WTC/SS; bitpos: [9]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver recevies Xon char when
+         *  uart_sw_flow_con_en is set to 1.
+         */
+        uint32_t sw_xon_int_raw:1;
+        /** sw_xoff_int_raw : R/WTC/SS; bitpos: [10]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver receives Xoff char when
+         *  uart_sw_flow_con_en is set to 1.
+         */
+        uint32_t sw_xoff_int_raw:1;
+        /** glitch_det_int_raw : R/WTC/SS; bitpos: [11]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver detects a glitch in the
+         *  middle of a start bit.
+         */
+        uint32_t glitch_det_int_raw:1;
+        /** tx_brk_done_int_raw : R/WTC/SS; bitpos: [12]; default: 0;
+         *  This interrupt raw bit turns to high level when transmitter completes  sending
+         *  NULL characters, after all data in Tx-FIFO are sent.
+         */
+        uint32_t tx_brk_done_int_raw:1;
+        /** tx_brk_idle_done_int_raw : R/WTC/SS; bitpos: [13]; default: 0;
+         *  This interrupt raw bit turns to high level when transmitter has kept the shortest
+         *  duration after sending the  last data.
+         */
+        uint32_t tx_brk_idle_done_int_raw:1;
+        /** tx_done_int_raw : R/WTC/SS; bitpos: [14]; default: 0;
+         *  This interrupt raw bit turns to high level when transmitter has send out all data
+         *  in FIFO.
+         */
+        uint32_t tx_done_int_raw:1;
+        /** rs485_parity_err_int_raw : R/WTC/SS; bitpos: [15]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver detects a parity error
+         *  from the echo of transmitter in rs485 mode.
+         */
+        uint32_t rs485_parity_err_int_raw:1;
+        /** rs485_frm_err_int_raw : R/WTC/SS; bitpos: [16]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver detects a data frame error
+         *  from the echo of transmitter in rs485 mode.
+         */
+        uint32_t rs485_frm_err_int_raw:1;
+        /** rs485_clash_int_raw : R/WTC/SS; bitpos: [17]; default: 0;
+         *  This interrupt raw bit turns to high level when detects a clash between transmitter
+         *  and receiver in rs485 mode.
+         */
+        uint32_t rs485_clash_int_raw:1;
+        /** at_cmd_char_det_int_raw : R/WTC/SS; bitpos: [18]; default: 0;
+         *  This interrupt raw bit turns to high level when receiver detects the configured
+         *  at_cmd char.
+         */
+        uint32_t at_cmd_char_det_int_raw:1;
+        /** wakeup_int_raw : R/WTC/SS; bitpos: [19]; default: 0;
+         *  This interrupt raw bit turns to high level when input rxd edge changes more times
+         *  than what reg_active_threshold specifies in light sleeping mode.
+         */
+        uint32_t wakeup_int_raw:1;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} uart_int_raw_reg_t;
+
+/** Type of int_st register
+ *  Masked interrupt status
+ */
+typedef union {
+    struct {
+        /** rxfifo_full_int_st : RO; bitpos: [0]; default: 0;
+         *  This is the status bit for rxfifo_full_int_raw when rxfifo_full_int_ena is set to 1.
+         */
+        uint32_t rxfifo_full_int_st:1;
+        /** txfifo_empty_int_st : RO; bitpos: [1]; default: 0;
+         *  This is the status bit for  txfifo_empty_int_raw  when txfifo_empty_int_ena is set
+         *  to 1.
+         */
+        uint32_t txfifo_empty_int_st:1;
+        /** parity_err_int_st : RO; bitpos: [2]; default: 0;
+         *  This is the status bit for parity_err_int_raw when parity_err_int_ena is set to 1.
+         */
+        uint32_t parity_err_int_st:1;
+        /** frm_err_int_st : RO; bitpos: [3]; default: 0;
+         *  This is the status bit for frm_err_int_raw when frm_err_int_ena is set to 1.
+         */
+        uint32_t frm_err_int_st:1;
+        /** rxfifo_ovf_int_st : RO; bitpos: [4]; default: 0;
+         *  This is the status bit for rxfifo_ovf_int_raw when rxfifo_ovf_int_ena is set to 1.
+         */
+        uint32_t rxfifo_ovf_int_st:1;
+        /** dsr_chg_int_st : RO; bitpos: [5]; default: 0;
+         *  This is the status bit for dsr_chg_int_raw when dsr_chg_int_ena is set to 1.
+         */
+        uint32_t dsr_chg_int_st:1;
+        /** cts_chg_int_st : RO; bitpos: [6]; default: 0;
+         *  This is the status bit for cts_chg_int_raw when cts_chg_int_ena is set to 1.
+         */
+        uint32_t cts_chg_int_st:1;
+        /** brk_det_int_st : RO; bitpos: [7]; default: 0;
+         *  This is the status bit for brk_det_int_raw when brk_det_int_ena is set to 1.
+         */
+        uint32_t brk_det_int_st:1;
+        /** rxfifo_tout_int_st : RO; bitpos: [8]; default: 0;
+         *  This is the status bit for rxfifo_tout_int_raw when rxfifo_tout_int_ena is set to 1.
+         */
+        uint32_t rxfifo_tout_int_st:1;
+        /** sw_xon_int_st : RO; bitpos: [9]; default: 0;
+         *  This is the status bit for sw_xon_int_raw when sw_xon_int_ena is set to 1.
+         */
+        uint32_t sw_xon_int_st:1;
+        /** sw_xoff_int_st : RO; bitpos: [10]; default: 0;
+         *  This is the status bit for sw_xoff_int_raw when sw_xoff_int_ena is set to 1.
+         */
+        uint32_t sw_xoff_int_st:1;
+        /** glitch_det_int_st : RO; bitpos: [11]; default: 0;
+         *  This is the status bit for glitch_det_int_raw when glitch_det_int_ena is set to 1.
+         */
+        uint32_t glitch_det_int_st:1;
+        /** tx_brk_done_int_st : RO; bitpos: [12]; default: 0;
+         *  This is the status bit for tx_brk_done_int_raw when tx_brk_done_int_ena is set to 1.
+         */
+        uint32_t tx_brk_done_int_st:1;
+        /** tx_brk_idle_done_int_st : RO; bitpos: [13]; default: 0;
+         *  This is the stauts bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena
+         *  is set to 1.
+         */
+        uint32_t tx_brk_idle_done_int_st:1;
+        /** tx_done_int_st : RO; bitpos: [14]; default: 0;
+         *  This is the status bit for tx_done_int_raw when tx_done_int_ena is set to 1.
+         */
+        uint32_t tx_done_int_st:1;
+        /** rs485_parity_err_int_st : RO; bitpos: [15]; default: 0;
+         *  This is the status bit for rs485_parity_err_int_raw when rs485_parity_int_ena is
+         *  set to 1.
+         */
+        uint32_t rs485_parity_err_int_st:1;
+        /** rs485_frm_err_int_st : RO; bitpos: [16]; default: 0;
+         *  This is the status bit for rs485_frm_err_int_raw when rs485_fm_err_int_ena is set
+         *  to 1.
+         */
+        uint32_t rs485_frm_err_int_st:1;
+        /** rs485_clash_int_st : RO; bitpos: [17]; default: 0;
+         *  This is the status bit for rs485_clash_int_raw when rs485_clash_int_ena is set to 1.
+         */
+        uint32_t rs485_clash_int_st:1;
+        /** at_cmd_char_det_int_st : RO; bitpos: [18]; default: 0;
+         *  This is the status bit for at_cmd_det_int_raw when at_cmd_char_det_int_ena is set
+         *  to 1.
+         */
+        uint32_t at_cmd_char_det_int_st:1;
+        /** wakeup_int_st : RO; bitpos: [19]; default: 0;
+         *  This is the status bit for uart_wakeup_int_raw when uart_wakeup_int_ena is set to 1.
+         */
+        uint32_t wakeup_int_st:1;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} uart_int_st_reg_t;
+
+/** Type of int_ena register
+ *  Interrupt enable bits
+ */
+typedef union {
+    struct {
+        /** rxfifo_full_int_ena : R/W; bitpos: [0]; default: 0;
+         *  This is the enable bit for rxfifo_full_int_st register.
+         */
+        uint32_t rxfifo_full_int_ena:1;
+        /** txfifo_empty_int_ena : R/W; bitpos: [1]; default: 0;
+         *  This is the enable bit for txfifo_empty_int_st register.
+         */
+        uint32_t txfifo_empty_int_ena:1;
+        /** parity_err_int_ena : R/W; bitpos: [2]; default: 0;
+         *  This is the enable bit for parity_err_int_st register.
+         */
+        uint32_t parity_err_int_ena:1;
+        /** frm_err_int_ena : R/W; bitpos: [3]; default: 0;
+         *  This is the enable bit for frm_err_int_st register.
+         */
+        uint32_t frm_err_int_ena:1;
+        /** rxfifo_ovf_int_ena : R/W; bitpos: [4]; default: 0;
+         *  This is the enable bit for rxfifo_ovf_int_st register.
+         */
+        uint32_t rxfifo_ovf_int_ena:1;
+        /** dsr_chg_int_ena : R/W; bitpos: [5]; default: 0;
+         *  This is the enable bit for dsr_chg_int_st register.
+         */
+        uint32_t dsr_chg_int_ena:1;
+        /** cts_chg_int_ena : R/W; bitpos: [6]; default: 0;
+         *  This is the enable bit for cts_chg_int_st register.
+         */
+        uint32_t cts_chg_int_ena:1;
+        /** brk_det_int_ena : R/W; bitpos: [7]; default: 0;
+         *  This is the enable bit for brk_det_int_st register.
+         */
+        uint32_t brk_det_int_ena:1;
+        /** rxfifo_tout_int_ena : R/W; bitpos: [8]; default: 0;
+         *  This is the enable bit for rxfifo_tout_int_st register.
+         */
+        uint32_t rxfifo_tout_int_ena:1;
+        /** sw_xon_int_ena : R/W; bitpos: [9]; default: 0;
+         *  This is the enable bit for sw_xon_int_st register.
+         */
+        uint32_t sw_xon_int_ena:1;
+        /** sw_xoff_int_ena : R/W; bitpos: [10]; default: 0;
+         *  This is the enable bit for sw_xoff_int_st register.
+         */
+        uint32_t sw_xoff_int_ena:1;
+        /** glitch_det_int_ena : R/W; bitpos: [11]; default: 0;
+         *  This is the enable bit for glitch_det_int_st register.
+         */
+        uint32_t glitch_det_int_ena:1;
+        /** tx_brk_done_int_ena : R/W; bitpos: [12]; default: 0;
+         *  This is the enable bit for tx_brk_done_int_st register.
+         */
+        uint32_t tx_brk_done_int_ena:1;
+        /** tx_brk_idle_done_int_ena : R/W; bitpos: [13]; default: 0;
+         *  This is the enable bit for tx_brk_idle_done_int_st register.
+         */
+        uint32_t tx_brk_idle_done_int_ena:1;
+        /** tx_done_int_ena : R/W; bitpos: [14]; default: 0;
+         *  This is the enable bit for tx_done_int_st register.
+         */
+        uint32_t tx_done_int_ena:1;
+        /** rs485_parity_err_int_ena : R/W; bitpos: [15]; default: 0;
+         *  This is the enable bit for rs485_parity_err_int_st register.
+         */
+        uint32_t rs485_parity_err_int_ena:1;
+        /** rs485_frm_err_int_ena : R/W; bitpos: [16]; default: 0;
+         *  This is the enable bit for rs485_parity_err_int_st register.
+         */
+        uint32_t rs485_frm_err_int_ena:1;
+        /** rs485_clash_int_ena : R/W; bitpos: [17]; default: 0;
+         *  This is the enable bit for rs485_clash_int_st register.
+         */
+        uint32_t rs485_clash_int_ena:1;
+        /** at_cmd_char_det_int_ena : R/W; bitpos: [18]; default: 0;
+         *  This is the enable bit for at_cmd_char_det_int_st register.
+         */
+        uint32_t at_cmd_char_det_int_ena:1;
+        /** wakeup_int_ena : R/W; bitpos: [19]; default: 0;
+         *  This is the enable bit for uart_wakeup_int_st register.
+         */
+        uint32_t wakeup_int_ena:1;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} uart_int_ena_reg_t;
+
+/** Type of int_clr register
+ *  Interrupt clear bits
+ */
+typedef union {
+    struct {
+        /** rxfifo_full_int_clr : WT; bitpos: [0]; default: 0;
+         *  Set this bit to clear the rxfifo_full_int_raw interrupt.
+         */
+        uint32_t rxfifo_full_int_clr:1;
+        /** txfifo_empty_int_clr : WT; bitpos: [1]; default: 0;
+         *  Set this bit to clear txfifo_empty_int_raw interrupt.
+         */
+        uint32_t txfifo_empty_int_clr:1;
+        /** parity_err_int_clr : WT; bitpos: [2]; default: 0;
+         *  Set this bit to clear parity_err_int_raw interrupt.
+         */
+        uint32_t parity_err_int_clr:1;
+        /** frm_err_int_clr : WT; bitpos: [3]; default: 0;
+         *  Set this bit to clear frm_err_int_raw interrupt.
+         */
+        uint32_t frm_err_int_clr:1;
+        /** rxfifo_ovf_int_clr : WT; bitpos: [4]; default: 0;
+         *  Set this bit to clear rxfifo_ovf_int_raw interrupt.
+         */
+        uint32_t rxfifo_ovf_int_clr:1;
+        /** dsr_chg_int_clr : WT; bitpos: [5]; default: 0;
+         *  Set this bit to clear the dsr_chg_int_raw interrupt.
+         */
+        uint32_t dsr_chg_int_clr:1;
+        /** cts_chg_int_clr : WT; bitpos: [6]; default: 0;
+         *  Set this bit to clear the cts_chg_int_raw interrupt.
+         */
+        uint32_t cts_chg_int_clr:1;
+        /** brk_det_int_clr : WT; bitpos: [7]; default: 0;
+         *  Set this bit to clear the brk_det_int_raw interrupt.
+         */
+        uint32_t brk_det_int_clr:1;
+        /** rxfifo_tout_int_clr : WT; bitpos: [8]; default: 0;
+         *  Set this bit to clear the rxfifo_tout_int_raw interrupt.
+         */
+        uint32_t rxfifo_tout_int_clr:1;
+        /** sw_xon_int_clr : WT; bitpos: [9]; default: 0;
+         *  Set this bit to clear the sw_xon_int_raw interrupt.
+         */
+        uint32_t sw_xon_int_clr:1;
+        /** sw_xoff_int_clr : WT; bitpos: [10]; default: 0;
+         *  Set this bit to clear the sw_xoff_int_raw interrupt.
+         */
+        uint32_t sw_xoff_int_clr:1;
+        /** glitch_det_int_clr : WT; bitpos: [11]; default: 0;
+         *  Set this bit to clear the glitch_det_int_raw interrupt.
+         */
+        uint32_t glitch_det_int_clr:1;
+        /** tx_brk_done_int_clr : WT; bitpos: [12]; default: 0;
+         *  Set this bit to clear the tx_brk_done_int_raw interrupt..
+         */
+        uint32_t tx_brk_done_int_clr:1;
+        /** tx_brk_idle_done_int_clr : WT; bitpos: [13]; default: 0;
+         *  Set this bit to clear the tx_brk_idle_done_int_raw interrupt.
+         */
+        uint32_t tx_brk_idle_done_int_clr:1;
+        /** tx_done_int_clr : WT; bitpos: [14]; default: 0;
+         *  Set this bit to clear the tx_done_int_raw interrupt.
+         */
+        uint32_t tx_done_int_clr:1;
+        /** rs485_parity_err_int_clr : WT; bitpos: [15]; default: 0;
+         *  Set this bit to clear the rs485_parity_err_int_raw interrupt.
+         */
+        uint32_t rs485_parity_err_int_clr:1;
+        /** rs485_frm_err_int_clr : WT; bitpos: [16]; default: 0;
+         *  Set this bit to clear the rs485_frm_err_int_raw interrupt.
+         */
+        uint32_t rs485_frm_err_int_clr:1;
+        /** rs485_clash_int_clr : WT; bitpos: [17]; default: 0;
+         *  Set this bit to clear the rs485_clash_int_raw interrupt.
+         */
+        uint32_t rs485_clash_int_clr:1;
+        /** at_cmd_char_det_int_clr : WT; bitpos: [18]; default: 0;
+         *  Set this bit to clear the at_cmd_char_det_int_raw interrupt.
+         */
+        uint32_t at_cmd_char_det_int_clr:1;
+        /** wakeup_int_clr : WT; bitpos: [19]; default: 0;
+         *  Set this bit to clear the uart_wakeup_int_raw interrupt.
+         */
+        uint32_t wakeup_int_clr:1;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} uart_int_clr_reg_t;
+
+
+/** Group: Configuration Register */
+/** Type of clkdiv register
+ *  Clock divider configuration
+ */
+typedef union {
+    struct {
+        /** clkdiv : R/W; bitpos: [11:0]; default: 694;
+         *  The integral part of the frequency divider factor.
+         */
+        uint32_t clkdiv:12;
+        uint32_t reserved_12:8;
+        /** clkdiv_frag : R/W; bitpos: [23:20]; default: 0;
+         *  The decimal part of the frequency divider factor.
+         */
+        uint32_t clkdiv_frag:4;
+        uint32_t reserved_24:8;
+    };
+    uint32_t val;
+} uart_clkdiv_reg_t;
+
+/** Type of rx_filt register
+ *  Rx Filter configuration
+ */
+typedef union {
+    struct {
+        /** glitch_filt : R/W; bitpos: [7:0]; default: 8;
+         *  when input pulse width is lower than this value, the pulse is ignored.
+         */
+        uint32_t glitch_filt:8;
+        /** glitch_filt_en : R/W; bitpos: [8]; default: 0;
+         *  Set this bit to enable Rx signal filter.
+         */
+        uint32_t glitch_filt_en:1;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} uart_rx_filt_reg_t;
+
+/** Type of conf0 register
+ *  a
+ */
+typedef union {
+    struct {
+        /** parity : R/W; bitpos: [0]; default: 0;
+         *  This register is used to configure the parity check mode.
+         */
+        uint32_t parity:1;
+        /** parity_en : R/W; bitpos: [1]; default: 0;
+         *  Set this bit to enable uart parity check.
+         */
+        uint32_t parity_en:1;
+        /** bit_num : R/W; bitpos: [3:2]; default: 3;
+         *  This register is used to set the length of data.
+         */
+        uint32_t bit_num:2;
+        /** stop_bit_num : R/W; bitpos: [5:4]; default: 1;
+         *  This register is used to set the length of  stop bit.
+         */
+        uint32_t stop_bit_num:2;
+        /** sw_rts : R/W; bitpos: [6]; default: 0;
+         *  This register is used to configure the software rts signal which is used in
+         *  software flow control.
+         */
+        uint32_t sw_rts:1;
+        /** sw_dtr : R/W; bitpos: [7]; default: 0;
+         *  This register is used to configure the software dtr signal which is used in
+         *  software flow control.
+         */
+        uint32_t sw_dtr:1;
+        /** txd_brk : R/W; bitpos: [8]; default: 0;
+         *  Set this bit to enbale transmitter to  send NULL when the process of sending data
+         *  is done.
+         */
+        uint32_t txd_brk:1;
+        /** irda_dplx : R/W; bitpos: [9]; default: 0;
+         *  Set this bit to enable IrDA loopback mode.
+         */
+        uint32_t irda_dplx:1;
+        /** irda_tx_en : R/W; bitpos: [10]; default: 0;
+         *  This is the start enable bit for IrDA transmitter.
+         */
+        uint32_t irda_tx_en:1;
+        /** irda_wctl : R/W; bitpos: [11]; default: 0;
+         *  1'h1: The IrDA transmitter's 11th bit is the same as 10th bit. 1'h0: Set IrDA
+         *  transmitter's 11th bit to 0.
+         */
+        uint32_t irda_wctl:1;
+        /** irda_tx_inv : R/W; bitpos: [12]; default: 0;
+         *  Set this bit to invert the level of  IrDA transmitter.
+         */
+        uint32_t irda_tx_inv:1;
+        /** irda_rx_inv : R/W; bitpos: [13]; default: 0;
+         *  Set this bit to invert the level of IrDA receiver.
+         */
+        uint32_t irda_rx_inv:1;
+        /** loopback : R/W; bitpos: [14]; default: 0;
+         *  Set this bit to enable uart loopback test mode.
+         */
+        uint32_t loopback:1;
+        /** tx_flow_en : R/W; bitpos: [15]; default: 0;
+         *  Set this bit to enable flow control function for transmitter.
+         */
+        uint32_t tx_flow_en:1;
+        /** irda_en : R/W; bitpos: [16]; default: 0;
+         *  Set this bit to enable IrDA protocol.
+         */
+        uint32_t irda_en:1;
+        /** rxfifo_rst : R/W; bitpos: [17]; default: 0;
+         *  Set this bit to reset the uart receive-FIFO.
+         */
+        uint32_t rxfifo_rst:1;
+        /** txfifo_rst : R/W; bitpos: [18]; default: 0;
+         *  Set this bit to reset the uart transmit-FIFO.
+         */
+        uint32_t txfifo_rst:1;
+        /** rxd_inv : R/W; bitpos: [19]; default: 0;
+         *  Set this bit to inverse the level value of uart rxd signal.
+         */
+        uint32_t rxd_inv:1;
+        /** cts_inv : R/W; bitpos: [20]; default: 0;
+         *  Set this bit to inverse the level value of uart cts signal.
+         */
+        uint32_t cts_inv:1;
+        /** dsr_inv : R/W; bitpos: [21]; default: 0;
+         *  Set this bit to inverse the level value of uart dsr signal.
+         */
+        uint32_t dsr_inv:1;
+        /** txd_inv : R/W; bitpos: [22]; default: 0;
+         *  Set this bit to inverse the level value of uart txd signal.
+         */
+        uint32_t txd_inv:1;
+        /** rts_inv : R/W; bitpos: [23]; default: 0;
+         *  Set this bit to inverse the level value of uart rts signal.
+         */
+        uint32_t rts_inv:1;
+        /** dtr_inv : R/W; bitpos: [24]; default: 0;
+         *  Set this bit to inverse the level value of uart dtr signal.
+         */
+        uint32_t dtr_inv:1;
+        /** clk_en : R/W; bitpos: [25]; default: 0;
+         *  1'h1: Force clock on for register. 1'h0: Support clock only when application writes
+         *  registers.
+         */
+        uint32_t clk_en:1;
+        /** err_wr_mask : R/W; bitpos: [26]; default: 0;
+         *  1'h1: Receiver stops storing data into FIFO when data is wrong. 1'h0: Receiver
+         *  stores the data even if the  received data is wrong.
+         */
+        uint32_t err_wr_mask:1;
+        /** autobaud_en : R/W; bitpos: [27]; default: 0;
+         *  This is the enable bit for detecting baudrate.
+         */
+        uint32_t autobaud_en:1;
+        /** mem_clk_en : R/W; bitpos: [28]; default: 1;
+         *  UART memory clock gate enable signal.
+         */
+        uint32_t mem_clk_en:1;
+        uint32_t reserved_29:3;
+    };
+    uint32_t val;
+} uart_conf0_reg_t;
+
+/** Type of conf1 register
+ *  Configuration register 1
+ */
+typedef union {
+    struct {
+        /** rxfifo_full_thrhd : R/W; bitpos: [9:0]; default: 96;
+         *  It will produce rxfifo_full_int interrupt when receiver receives more data than
+         *  this register value.
+         */
+        uint32_t rxfifo_full_thrhd:10;
+        /** txfifo_empty_thrhd : R/W; bitpos: [19:10]; default: 96;
+         *  It will produce txfifo_empty_int interrupt when the data amount in Tx-FIFO is less
+         *  than this register value.
+         */
+        uint32_t txfifo_empty_thrhd:10;
+        /** dis_rx_dat_ovf : R/W; bitpos: [20]; default: 0;
+         *  Disable UART Rx data overflow detect.
+         */
+        uint32_t dis_rx_dat_ovf:1;
+        /** rx_tout_flow_dis : R/W; bitpos: [21]; default: 0;
+         *  Set this bit to stop accumulating idle_cnt when hardware flow control works.
+         */
+        uint32_t rx_tout_flow_dis:1;
+        /** rx_flow_en : R/W; bitpos: [22]; default: 0;
+         *  This is the flow enable bit for UART receiver.
+         */
+        uint32_t rx_flow_en:1;
+        /** rx_tout_en : R/W; bitpos: [23]; default: 0;
+         *  This is the enble bit for uart receiver's timeout function.
+         */
+        uint32_t rx_tout_en:1;
+        uint32_t reserved_24:8;
+    };
+    uint32_t val;
+} uart_conf1_reg_t;
+
+/** Type of flow_conf register
+ *  Software flow-control configuration
+ */
+typedef union {
+    struct {
+        /** sw_flow_con_en : R/W; bitpos: [0]; default: 0;
+         *  Set this bit to enable software flow control. It is used with register sw_xon or
+         *  sw_xoff.
+         */
+        uint32_t sw_flow_con_en:1;
+        /** xonoff_del : R/W; bitpos: [1]; default: 0;
+         *  Set this bit to remove flow control char from the received data.
+         */
+        uint32_t xonoff_del:1;
+        /** force_xon : R/W; bitpos: [2]; default: 0;
+         *  Set this bit to enable the transmitter to go on sending data.
+         */
+        uint32_t force_xon:1;
+        /** force_xoff : R/W; bitpos: [3]; default: 0;
+         *  Set this bit to stop the  transmitter from sending data.
+         */
+        uint32_t force_xoff:1;
+        /** send_xon : R/W/SS/SC; bitpos: [4]; default: 0;
+         *  Set this bit to send Xon char. It is cleared by hardware automatically.
+         */
+        uint32_t send_xon:1;
+        /** send_xoff : R/W/SS/SC; bitpos: [5]; default: 0;
+         *  Set this bit to send Xoff char. It is cleared by hardware automatically.
+         */
+        uint32_t send_xoff:1;
+        uint32_t reserved_6:26;
+    };
+    uint32_t val;
+} uart_flow_conf_reg_t;
+
+/** Type of sleep_conf register
+ *  Sleep-mode configuration
+ */
+typedef union {
+    struct {
+        /** active_threshold : R/W; bitpos: [9:0]; default: 240;
+         *  The uart is activated from light sleeping mode when the input rxd edge changes more
+         *  times than this register value.
+         */
+        uint32_t active_threshold:10;
+        uint32_t reserved_10:22;
+    };
+    uint32_t val;
+} uart_sleep_conf_reg_t;
+
+/** Type of swfc_conf0 register
+ *  Software flow-control character configuration
+ */
+typedef union {
+    struct {
+        /** xoff_threshold : R/W; bitpos: [9:0]; default: 224;
+         *  When the data amount in Rx-FIFO is more than this register value with
+         *  uart_sw_flow_con_en set to 1, it will send a Xoff char.
+         */
+        uint32_t xoff_threshold:10;
+        /** xoff_char : R/W; bitpos: [17:10]; default: 19;
+         *  This register stores the Xoff flow control char.
+         */
+        uint32_t xoff_char:8;
+        uint32_t reserved_18:14;
+    };
+    uint32_t val;
+} uart_swfc_conf0_reg_t;
+
+/** Type of swfc_conf1 register
+ *  Software flow-control character configuration
+ */
+typedef union {
+    struct {
+        /** xon_threshold : R/W; bitpos: [9:0]; default: 0;
+         *  When the data amount in Rx-FIFO is less than this register value with
+         *  uart_sw_flow_con_en set to 1, it will send a Xon char.
+         */
+        uint32_t xon_threshold:10;
+        /** xon_char : R/W; bitpos: [17:10]; default: 17;
+         *  This register stores the Xon flow control char.
+         */
+        uint32_t xon_char:8;
+        uint32_t reserved_18:14;
+    };
+    uint32_t val;
+} uart_swfc_conf1_reg_t;
+
+/** Type of txbrk_conf register
+ *  Tx Break character configuration
+ */
+typedef union {
+    struct {
+        /** tx_brk_num : R/W; bitpos: [7:0]; default: 10;
+         *  This register is used to configure the number of 0 to be sent after the process of
+         *  sending data is done. It is active when txd_brk is set to 1.
+         */
+        uint32_t tx_brk_num:8;
+        uint32_t reserved_8:24;
+    };
+    uint32_t val;
+} uart_txbrk_conf_reg_t;
+
+/** Type of idle_conf register
+ *  Frame-end idle configuration
+ */
+typedef union {
+    struct {
+        /** rx_idle_thrhd : R/W; bitpos: [9:0]; default: 256;
+         *  It will produce frame end signal when receiver takes more time to receive one byte
+         *  data than this register value.
+         */
+        uint32_t rx_idle_thrhd:10;
+        /** tx_idle_num : R/W; bitpos: [19:10]; default: 256;
+         *  This register is used to configure the duration time between transfers.
+         */
+        uint32_t tx_idle_num:10;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} uart_idle_conf_reg_t;
+
+/** Type of rs485_conf register
+ *  RS485 mode configuration
+ */
+typedef union {
+    struct {
+        /** rs485_en : R/W; bitpos: [0]; default: 0;
+         *  Set this bit to choose the rs485 mode.
+         */
+        uint32_t rs485_en:1;
+        /** dl0_en : R/W; bitpos: [1]; default: 0;
+         *  Set this bit to delay the stop bit by 1 bit.
+         */
+        uint32_t dl0_en:1;
+        /** dl1_en : R/W; bitpos: [2]; default: 0;
+         *  Set this bit to delay the stop bit by 1 bit.
+         */
+        uint32_t dl1_en:1;
+        /** rs485tx_rx_en : R/W; bitpos: [3]; default: 0;
+         *  Set this bit to enable receiver could receive data when the transmitter is
+         *  transmitting data in rs485 mode.
+         */
+        uint32_t rs485tx_rx_en:1;
+        /** rs485rxby_tx_en : R/W; bitpos: [4]; default: 0;
+         *  1'h1: enable rs485 transmitter to send data when rs485 receiver line is busy.
+         */
+        uint32_t rs485rxby_tx_en:1;
+        /** rs485_rx_dly_num : R/W; bitpos: [5]; default: 0;
+         *  This register is used to delay the receiver's internal data signal.
+         */
+        uint32_t rs485_rx_dly_num:1;
+        /** rs485_tx_dly_num : R/W; bitpos: [9:6]; default: 0;
+         *  This register is used to delay the transmitter's internal data signal.
+         */
+        uint32_t rs485_tx_dly_num:4;
+        uint32_t reserved_10:22;
+    };
+    uint32_t val;
+} uart_rs485_conf_reg_t;
+
+/** Type of clk_conf register
+ *  UART core clock configuration
+ */
+typedef union {
+    struct {
+        /** sclk_div_b : R/W; bitpos: [5:0]; default: 0;
+         *  The  denominator of the frequency divider factor.
+         */
+        uint32_t sclk_div_b:6;
+        /** sclk_div_a : R/W; bitpos: [11:6]; default: 0;
+         *  The numerator of the frequency divider factor.
+         */
+        uint32_t sclk_div_a:6;
+        /** sclk_div_num : R/W; bitpos: [19:12]; default: 1;
+         *  The integral part of the frequency divider factor.
+         */
+        uint32_t sclk_div_num:8;
+        /** sclk_sel : R/W; bitpos: [21:20]; default: 3;
+         *  UART clock source select. 1: 80Mhz, 2: 8Mhz, 3: XTAL.
+         */
+        uint32_t sclk_sel:2;
+        /** sclk_en : R/W; bitpos: [22]; default: 1;
+         *  Set this bit to enable UART Tx/Rx clock.
+         */
+        uint32_t sclk_en:1;
+        /** rst_core : R/W; bitpos: [23]; default: 0;
+         *  Write 1 then write 0 to this bit, reset UART Tx/Rx.
+         */
+        uint32_t rst_core:1;
+        /** tx_sclk_en : R/W; bitpos: [24]; default: 1;
+         *  Set this bit to enable UART Tx clock.
+         */
+        uint32_t tx_sclk_en:1;
+        /** rx_sclk_en : R/W; bitpos: [25]; default: 1;
+         *  Set this bit to enable UART Rx clock.
+         */
+        uint32_t rx_sclk_en:1;
+        /** tx_rst_core : R/W; bitpos: [26]; default: 0;
+         *  Write 1 then write 0 to this bit, reset UART Tx.
+         */
+        uint32_t tx_rst_core:1;
+        /** rx_rst_core : R/W; bitpos: [27]; default: 0;
+         *  Write 1 then write 0 to this bit, reset UART Rx.
+         */
+        uint32_t rx_rst_core:1;
+        uint32_t reserved_28:4;
+    };
+    uint32_t val;
+} uart_clk_conf_reg_t;
+
+
+/** Group: Status Register */
+/** Type of status register
+ *  UART status register
+ */
+typedef union {
+    struct {
+        /** rxfifo_cnt : RO; bitpos: [9:0]; default: 0;
+         *  Stores the byte number of valid data in Rx-FIFO.
+         */
+        uint32_t rxfifo_cnt:10;
+        uint32_t reserved_10:3;
+        /** dsrn : RO; bitpos: [13]; default: 0;
+         *  The register represent the level value of the internal uart dsr signal.
+         */
+        uint32_t dsrn:1;
+        /** ctsn : RO; bitpos: [14]; default: 1;
+         *  This register represent the level value of the internal uart cts signal.
+         */
+        uint32_t ctsn:1;
+        /** rxd : RO; bitpos: [15]; default: 1;
+         *  This register represent the  level value of the internal uart rxd signal.
+         */
+        uint32_t rxd:1;
+        /** txfifo_cnt : RO; bitpos: [25:16]; default: 0;
+         *  Stores the byte number of data in Tx-FIFO.
+         */
+        uint32_t txfifo_cnt:10;
+        uint32_t reserved_26:3;
+        /** dtrn : RO; bitpos: [29]; default: 1;
+         *  This bit represents the level of the internal uart dtr signal.
+         */
+        uint32_t dtrn:1;
+        /** rtsn : RO; bitpos: [30]; default: 1;
+         *  This bit represents the level of the internal uart rts signal.
+         */
+        uint32_t rtsn:1;
+        /** txd : RO; bitpos: [31]; default: 1;
+         *  This bit represents the  level of the internal uart txd signal.
+         */
+        uint32_t txd:1;
+    };
+    uint32_t val;
+} uart_status_reg_t;
+
+/** Type of mem_tx_status register
+ *  Tx-FIFO write and read offset address.
+ */
+typedef union {
+    struct {
+        /** apb_tx_waddr : RO; bitpos: [9:0]; default: 0;
+         *  This register stores the offset address in Tx-FIFO when software writes Tx-FIFO via
+         *  APB.
+         */
+        uint32_t apb_tx_waddr:10;
+        uint32_t reserved_10:1;
+        /** tx_raddr : RO; bitpos: [20:11]; default: 0;
+         *  This register stores the offset address in Tx-FIFO when Tx-FSM reads data via
+         *  Tx-FIFO_Ctrl.
+         */
+        uint32_t tx_raddr:10;
+        uint32_t reserved_21:11;
+    };
+    uint32_t val;
+} uart_mem_tx_status_reg_t;
+
+/** Type of mem_rx_status register
+ *  Rx-FIFO write and read offset address.
+ */
+typedef union {
+    struct {
+        /** apb_rx_raddr : RO; bitpos: [9:0]; default: 512;
+         *  This register stores the offset address in RX-FIFO when software reads data from
+         *  Rx-FIFO via APB. UART0 is 10'h200. UART1 is 10'h280. UART2 is 10'h300.
+         */
+        uint32_t apb_rx_raddr:10;
+        uint32_t reserved_10:1;
+        /** rx_waddr : RO; bitpos: [20:11]; default: 512;
+         *  This register stores the offset address in Rx-FIFO when Rx-FIFO_Ctrl writes
+         *  Rx-FIFO. UART0 is 10'h200. UART1 is 10'h280. UART2 is 10'h300.
+         */
+        uint32_t rx_waddr:10;
+        uint32_t reserved_21:11;
+    };
+    uint32_t val;
+} uart_mem_rx_status_reg_t;
+
+/** Type of fsm_status register
+ *  UART transmit and receive status.
+ */
+typedef union {
+    struct {
+        /** st_urx_out : RO; bitpos: [3:0]; default: 0;
+         *  This is the status register of receiver.
+         */
+        uint32_t st_urx_out:4;
+        /** st_utx_out : RO; bitpos: [7:4]; default: 0;
+         *  This is the status register of transmitter.
+         */
+        uint32_t st_utx_out:4;
+        uint32_t reserved_8:24;
+    };
+    uint32_t val;
+} uart_fsm_status_reg_t;
+
+
+/** Group: Autobaud Register */
+/** Type of lowpulse register
+ *  Autobaud minimum low pulse duration register
+ */
+typedef union {
+    struct {
+        /** lowpulse_min_cnt : RO; bitpos: [11:0]; default: 4095;
+         *  This register stores the value of the minimum duration time of the low level pulse.
+         *  It is used in baud rate-detect process.
+         */
+        uint32_t lowpulse_min_cnt:12;
+        uint32_t reserved_12:20;
+    };
+    uint32_t val;
+} uart_lowpulse_reg_t;
+
+/** Type of highpulse register
+ *  Autobaud minimum high pulse duration register
+ */
+typedef union {
+    struct {
+        /** highpulse_min_cnt : RO; bitpos: [11:0]; default: 4095;
+         *  This register stores  the value of the maxinum duration time for the high level
+         *  pulse. It is used in baud rate-detect process.
+         */
+        uint32_t highpulse_min_cnt:12;
+        uint32_t reserved_12:20;
+    };
+    uint32_t val;
+} uart_highpulse_reg_t;
+
+/** Type of rxd_cnt register
+ *  Autobaud edge change count register
+ */
+typedef union {
+    struct {
+        /** rxd_edge_cnt : RO; bitpos: [9:0]; default: 0;
+         *  This register stores the count of rxd edge change. It is used in baud rate-detect
+         *  process.
+         */
+        uint32_t rxd_edge_cnt:10;
+        uint32_t reserved_10:22;
+    };
+    uint32_t val;
+} uart_rxd_cnt_reg_t;
+
+/** Type of pospulse register
+ *  Autobaud high pulse register
+ */
+typedef union {
+    struct {
+        /** posedge_min_cnt : RO; bitpos: [11:0]; default: 4095;
+         *  This register stores the minimal input clock count between two positive edges. It
+         *  is used in boudrate-detect process.
+         */
+        uint32_t posedge_min_cnt:12;
+        uint32_t reserved_12:20;
+    };
+    uint32_t val;
+} uart_pospulse_reg_t;
+
+/** Type of negpulse register
+ *  Autobaud low pulse register
+ */
+typedef union {
+    struct {
+        /** negedge_min_cnt : RO; bitpos: [11:0]; default: 4095;
+         *  This register stores the minimal input clock count between two negative edges. It
+         *  is used in boudrate-detect process.
+         */
+        uint32_t negedge_min_cnt:12;
+        uint32_t reserved_12:20;
+    };
+    uint32_t val;
+} uart_negpulse_reg_t;
+
+
+/** Group: AT Escape Sequence Selection Configuration */
+/** Type of at_cmd_precnt register
+ *  Pre-sequence timing configuration
+ */
+typedef union {
+    struct {
+        /** pre_idle_num : R/W; bitpos: [15:0]; default: 2305;
+         *  This register is used to configure the idle duration time before the first at_cmd
+         *  is received by receiver.
+         */
+        uint32_t pre_idle_num:16;
+        uint32_t reserved_16:16;
+    };
+    uint32_t val;
+} uart_at_cmd_precnt_reg_t;
+
+/** Type of at_cmd_postcnt register
+ *  Post-sequence timing configuration
+ */
+typedef union {
+    struct {
+        /** post_idle_num : R/W; bitpos: [15:0]; default: 2305;
+         *  This register is used to configure the duration time between the last at_cmd and
+         *  the next data.
+         */
+        uint32_t post_idle_num:16;
+        uint32_t reserved_16:16;
+    };
+    uint32_t val;
+} uart_at_cmd_postcnt_reg_t;
+
+/** Type of at_cmd_gaptout register
+ *  Timeout configuration
+ */
+typedef union {
+    struct {
+        /** rx_gap_tout : R/W; bitpos: [15:0]; default: 11;
+         *  This register is used to configure the duration time between the at_cmd chars.
+         */
+        uint32_t rx_gap_tout:16;
+        uint32_t reserved_16:16;
+    };
+    uint32_t val;
+} uart_at_cmd_gaptout_reg_t;
+
+/** Type of at_cmd_char register
+ *  AT escape sequence detection configuration
+ */
+typedef union {
+    struct {
+        /** at_cmd_char : R/W; bitpos: [7:0]; default: 43;
+         *  This register is used to configure the content of at_cmd char.
+         */
+        uint32_t at_cmd_char:8;
+        /** char_num : R/W; bitpos: [15:8]; default: 3;
+         *  This register is used to configure the num of continuous at_cmd chars received by
+         *  receiver.
+         */
+        uint32_t char_num:8;
+        uint32_t reserved_16:16;
+    };
+    uint32_t val;
+} uart_at_cmd_char_reg_t;
+
+
+/** Group: Version Register */
+/** Type of date register
+ *  UART Version register
+ */
+typedef union {
+    struct {
+        /** date : R/W; bitpos: [31:0]; default: 33587824;
+         *  This is the version register.
+         */
+        uint32_t date:32;
+    };
+    uint32_t val;
+} uart_date_reg_t;
+
+/** Type of id register
+ *  UART ID register
+ */
+typedef union {
+    struct {
+        /** id : R/W; bitpos: [29:0]; default: 1280;
+         *  This register is used to configure the uart_id.
+         */
+        uint32_t id:30;
+        /** high_speed : R/W; bitpos: [30]; default: 1;
+         *  This bit used to select synchronize mode. 1: Registers are auto synchronized into
+         *  UART Core clock and UART core should be keep the same with APB clock. 0: After
+         *  configure registers, software needs to write 1 to UART_REG_UPDATE to synchronize
+         *  registers.
+         */
+        uint32_t high_speed:1;
+        /** reg_update : R/W/SC; bitpos: [31]; default: 0;
+         *  Software write 1 would synchronize registers into UART Core clock domain and would
+         *  be cleared by hardware after synchronization is done.
+         */
+        uint32_t reg_update:1;
+    };
+    uint32_t val;
+} uart_id_reg_t;
+
+
+typedef struct {
+    volatile uart_fifo_reg_t fifo;
+    volatile uart_int_raw_reg_t int_raw;
+    volatile uart_int_st_reg_t int_st;
+    volatile uart_int_ena_reg_t int_ena;
+    volatile uart_int_clr_reg_t int_clr;
+    volatile uart_clkdiv_reg_t clkdiv;
+    volatile uart_rx_filt_reg_t rx_filt;
+    volatile uart_status_reg_t status;
+    volatile uart_conf0_reg_t conf0;
+    volatile uart_conf1_reg_t conf1;
+    volatile uart_lowpulse_reg_t lowpulse;
+    volatile uart_highpulse_reg_t highpulse;
+    volatile uart_rxd_cnt_reg_t rxd_cnt;
+    volatile uart_flow_conf_reg_t flow_conf;
+    volatile uart_sleep_conf_reg_t sleep_conf;
+    volatile uart_swfc_conf0_reg_t swfc_conf0;
+    volatile uart_swfc_conf1_reg_t swfc_conf1;
+    volatile uart_txbrk_conf_reg_t txbrk_conf;
+    volatile uart_idle_conf_reg_t idle_conf;
+    volatile uart_rs485_conf_reg_t rs485_conf;
+    volatile uart_at_cmd_precnt_reg_t at_cmd_precnt;
+    volatile uart_at_cmd_postcnt_reg_t at_cmd_postcnt;
+    volatile uart_at_cmd_gaptout_reg_t at_cmd_gaptout;
+    volatile uart_at_cmd_char_reg_t at_cmd_char;
+    volatile uart_mem_conf_reg_t mem_conf;
+    volatile uart_mem_tx_status_reg_t mem_tx_status;
+    volatile uart_mem_rx_status_reg_t mem_rx_status;
+    volatile uart_fsm_status_reg_t fsm_status;
+    volatile uart_pospulse_reg_t pospulse;
+    volatile uart_negpulse_reg_t negpulse;
+    volatile uart_clk_conf_reg_t clk_conf;
+    volatile uart_date_reg_t date;
+    volatile uart_id_reg_t id;
+} uart_dev_t;
+
+extern uart_dev_t UART0;
+extern uart_dev_t UART1;
+extern uart_dev_t UART2;
+
+#ifndef __cplusplus
+_Static_assert(sizeof(uart_dev_t) == 0x84, "Invalid size of uart_dev_t structure");
+_Static_assert(sizeof(UART0.fifo.rxfifo_rd_byte) == 4, "FIFO, must be a uint32_t, not bitfield!");
+_Static_assert(sizeof(UART1.fifo.rxfifo_rd_byte) == 4, "FIFO, must be a uint32_t, not bitfield!");
+_Static_assert(sizeof(UART2.fifo.rxfifo_rd_byte) == 4, "FIFO, must be a uint32_t, not bitfield!");
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uhci_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uhci_reg.h
new file mode 100644
index 00000000000..280bafd55c7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uhci_reg.h
@@ -0,0 +1,764 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_UHCI_REG_H_
+#define _SOC_UHCI_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define UHCI_CONF0_REG(i)          (REG_UHCI_BASE(i) + 0x0)
+/* UHCI_UART_RX_BRK_EOF_EN : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_UART_RX_BRK_EOF_EN    (BIT(12))
+#define UHCI_UART_RX_BRK_EOF_EN_M  (BIT(12))
+#define UHCI_UART_RX_BRK_EOF_EN_V  0x1
+#define UHCI_UART_RX_BRK_EOF_EN_S  12
+/* UHCI_CLK_EN : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_CLK_EN    (BIT(11))
+#define UHCI_CLK_EN_M  (BIT(11))
+#define UHCI_CLK_EN_V  0x1
+#define UHCI_CLK_EN_S  11
+/* UHCI_ENCODE_CRC_EN : R/W ;bitpos:[10] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_ENCODE_CRC_EN    (BIT(10))
+#define UHCI_ENCODE_CRC_EN_M  (BIT(10))
+#define UHCI_ENCODE_CRC_EN_V  0x1
+#define UHCI_ENCODE_CRC_EN_S  10
+/* UHCI_LEN_EOF_EN : R/W ;bitpos:[9] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_LEN_EOF_EN    (BIT(9))
+#define UHCI_LEN_EOF_EN_M  (BIT(9))
+#define UHCI_LEN_EOF_EN_V  0x1
+#define UHCI_LEN_EOF_EN_S  9
+/* UHCI_UART_IDLE_EOF_EN : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_UART_IDLE_EOF_EN    (BIT(8))
+#define UHCI_UART_IDLE_EOF_EN_M  (BIT(8))
+#define UHCI_UART_IDLE_EOF_EN_V  0x1
+#define UHCI_UART_IDLE_EOF_EN_S  8
+/* UHCI_CRC_REC_EN : R/W ;bitpos:[7] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_CRC_REC_EN    (BIT(7))
+#define UHCI_CRC_REC_EN_M  (BIT(7))
+#define UHCI_CRC_REC_EN_V  0x1
+#define UHCI_CRC_REC_EN_S  7
+/* UHCI_HEAD_EN : R/W ;bitpos:[6] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_HEAD_EN    (BIT(6))
+#define UHCI_HEAD_EN_M  (BIT(6))
+#define UHCI_HEAD_EN_V  0x1
+#define UHCI_HEAD_EN_S  6
+/* UHCI_SEPER_EN : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_SEPER_EN    (BIT(5))
+#define UHCI_SEPER_EN_M  (BIT(5))
+#define UHCI_SEPER_EN_V  0x1
+#define UHCI_SEPER_EN_S  5
+/* UHCI_UART2_CE : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_UART2_CE    (BIT(4))
+#define UHCI_UART2_CE_M  (BIT(4))
+#define UHCI_UART2_CE_V  0x1
+#define UHCI_UART2_CE_S  4
+/* UHCI_UART1_CE : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_UART1_CE    (BIT(3))
+#define UHCI_UART1_CE_M  (BIT(3))
+#define UHCI_UART1_CE_V  0x1
+#define UHCI_UART1_CE_S  3
+/* UHCI_UART0_CE : R/W ;bitpos:[2] ;default: 1'h0 ; */
+/*description: .*/
+#define UHCI_UART0_CE    (BIT(2))
+#define UHCI_UART0_CE_M  (BIT(2))
+#define UHCI_UART0_CE_V  0x1
+#define UHCI_UART0_CE_S  2
+/* UHCI_RX_RST : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_RX_RST    (BIT(1))
+#define UHCI_RX_RST_M  (BIT(1))
+#define UHCI_RX_RST_V  0x1
+#define UHCI_RX_RST_S  1
+/* UHCI_TX_RST : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/*description: .*/
+#define UHCI_TX_RST    (BIT(0))
+#define UHCI_TX_RST_M  (BIT(0))
+#define UHCI_TX_RST_V  0x1
+#define UHCI_TX_RST_S  0
+
+#define UHCI_INT_RAW_REG(i)          (REG_UHCI_BASE(i) + 0x4)
+/* UHCI_APP_CTRL1_INT_RAW : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_APP_CTRL1_INT_RAW    (BIT(8))
+#define UHCI_APP_CTRL1_INT_RAW_M  (BIT(8))
+#define UHCI_APP_CTRL1_INT_RAW_V  0x1
+#define UHCI_APP_CTRL1_INT_RAW_S  8
+/* UHCI_APP_CTRL0_INT_RAW : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_APP_CTRL0_INT_RAW    (BIT(7))
+#define UHCI_APP_CTRL0_INT_RAW_M  (BIT(7))
+#define UHCI_APP_CTRL0_INT_RAW_V  0x1
+#define UHCI_APP_CTRL0_INT_RAW_S  7
+/* UHCI_OUTLINK_EOF_ERR_INT_RAW : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_OUTLINK_EOF_ERR_INT_RAW    (BIT(6))
+#define UHCI_OUTLINK_EOF_ERR_INT_RAW_M  (BIT(6))
+#define UHCI_OUTLINK_EOF_ERR_INT_RAW_V  0x1
+#define UHCI_OUTLINK_EOF_ERR_INT_RAW_S  6
+/* UHCI_SEND_A_Q_INT_RAW : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_SEND_A_Q_INT_RAW    (BIT(5))
+#define UHCI_SEND_A_Q_INT_RAW_M  (BIT(5))
+#define UHCI_SEND_A_Q_INT_RAW_V  0x1
+#define UHCI_SEND_A_Q_INT_RAW_S  5
+/* UHCI_SEND_S_Q_INT_RAW : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_SEND_S_Q_INT_RAW    (BIT(4))
+#define UHCI_SEND_S_Q_INT_RAW_M  (BIT(4))
+#define UHCI_SEND_S_Q_INT_RAW_V  0x1
+#define UHCI_SEND_S_Q_INT_RAW_S  4
+/* UHCI_TX_HUNG_INT_RAW : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_TX_HUNG_INT_RAW    (BIT(3))
+#define UHCI_TX_HUNG_INT_RAW_M  (BIT(3))
+#define UHCI_TX_HUNG_INT_RAW_V  0x1
+#define UHCI_TX_HUNG_INT_RAW_S  3
+/* UHCI_RX_HUNG_INT_RAW : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_RX_HUNG_INT_RAW    (BIT(2))
+#define UHCI_RX_HUNG_INT_RAW_M  (BIT(2))
+#define UHCI_RX_HUNG_INT_RAW_V  0x1
+#define UHCI_RX_HUNG_INT_RAW_S  2
+/* UHCI_TX_START_INT_RAW : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_TX_START_INT_RAW    (BIT(1))
+#define UHCI_TX_START_INT_RAW_M  (BIT(1))
+#define UHCI_TX_START_INT_RAW_V  0x1
+#define UHCI_TX_START_INT_RAW_S  1
+/* UHCI_RX_START_INT_RAW : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_RX_START_INT_RAW    (BIT(0))
+#define UHCI_RX_START_INT_RAW_M  (BIT(0))
+#define UHCI_RX_START_INT_RAW_V  0x1
+#define UHCI_RX_START_INT_RAW_S  0
+
+#define UHCI_INT_ST_REG(i)          (REG_UHCI_BASE(i) + 0x8)
+/* UHCI_APP_CTRL1_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_APP_CTRL1_INT_ST    (BIT(8))
+#define UHCI_APP_CTRL1_INT_ST_M  (BIT(8))
+#define UHCI_APP_CTRL1_INT_ST_V  0x1
+#define UHCI_APP_CTRL1_INT_ST_S  8
+/* UHCI_APP_CTRL0_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_APP_CTRL0_INT_ST    (BIT(7))
+#define UHCI_APP_CTRL0_INT_ST_M  (BIT(7))
+#define UHCI_APP_CTRL0_INT_ST_V  0x1
+#define UHCI_APP_CTRL0_INT_ST_S  7
+/* UHCI_OUTLINK_EOF_ERR_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_OUTLINK_EOF_ERR_INT_ST    (BIT(6))
+#define UHCI_OUTLINK_EOF_ERR_INT_ST_M  (BIT(6))
+#define UHCI_OUTLINK_EOF_ERR_INT_ST_V  0x1
+#define UHCI_OUTLINK_EOF_ERR_INT_ST_S  6
+/* UHCI_SEND_A_Q_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_SEND_A_Q_INT_ST    (BIT(5))
+#define UHCI_SEND_A_Q_INT_ST_M  (BIT(5))
+#define UHCI_SEND_A_Q_INT_ST_V  0x1
+#define UHCI_SEND_A_Q_INT_ST_S  5
+/* UHCI_SEND_S_Q_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_SEND_S_Q_INT_ST    (BIT(4))
+#define UHCI_SEND_S_Q_INT_ST_M  (BIT(4))
+#define UHCI_SEND_S_Q_INT_ST_V  0x1
+#define UHCI_SEND_S_Q_INT_ST_S  4
+/* UHCI_TX_HUNG_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_TX_HUNG_INT_ST    (BIT(3))
+#define UHCI_TX_HUNG_INT_ST_M  (BIT(3))
+#define UHCI_TX_HUNG_INT_ST_V  0x1
+#define UHCI_TX_HUNG_INT_ST_S  3
+/* UHCI_RX_HUNG_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_RX_HUNG_INT_ST    (BIT(2))
+#define UHCI_RX_HUNG_INT_ST_M  (BIT(2))
+#define UHCI_RX_HUNG_INT_ST_V  0x1
+#define UHCI_RX_HUNG_INT_ST_S  2
+/* UHCI_TX_START_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_TX_START_INT_ST    (BIT(1))
+#define UHCI_TX_START_INT_ST_M  (BIT(1))
+#define UHCI_TX_START_INT_ST_V  0x1
+#define UHCI_TX_START_INT_ST_S  1
+/* UHCI_RX_START_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_RX_START_INT_ST    (BIT(0))
+#define UHCI_RX_START_INT_ST_M  (BIT(0))
+#define UHCI_RX_START_INT_ST_V  0x1
+#define UHCI_RX_START_INT_ST_S  0
+
+#define UHCI_INT_ENA_REG(i)          (REG_UHCI_BASE(i) + 0xC)
+/* UHCI_APP_CTRL1_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_APP_CTRL1_INT_ENA    (BIT(8))
+#define UHCI_APP_CTRL1_INT_ENA_M  (BIT(8))
+#define UHCI_APP_CTRL1_INT_ENA_V  0x1
+#define UHCI_APP_CTRL1_INT_ENA_S  8
+/* UHCI_APP_CTRL0_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_APP_CTRL0_INT_ENA    (BIT(7))
+#define UHCI_APP_CTRL0_INT_ENA_M  (BIT(7))
+#define UHCI_APP_CTRL0_INT_ENA_V  0x1
+#define UHCI_APP_CTRL0_INT_ENA_S  7
+/* UHCI_OUTLINK_EOF_ERR_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_OUTLINK_EOF_ERR_INT_ENA    (BIT(6))
+#define UHCI_OUTLINK_EOF_ERR_INT_ENA_M  (BIT(6))
+#define UHCI_OUTLINK_EOF_ERR_INT_ENA_V  0x1
+#define UHCI_OUTLINK_EOF_ERR_INT_ENA_S  6
+/* UHCI_SEND_A_Q_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_SEND_A_Q_INT_ENA    (BIT(5))
+#define UHCI_SEND_A_Q_INT_ENA_M  (BIT(5))
+#define UHCI_SEND_A_Q_INT_ENA_V  0x1
+#define UHCI_SEND_A_Q_INT_ENA_S  5
+/* UHCI_SEND_S_Q_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_SEND_S_Q_INT_ENA    (BIT(4))
+#define UHCI_SEND_S_Q_INT_ENA_M  (BIT(4))
+#define UHCI_SEND_S_Q_INT_ENA_V  0x1
+#define UHCI_SEND_S_Q_INT_ENA_S  4
+/* UHCI_TX_HUNG_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_TX_HUNG_INT_ENA    (BIT(3))
+#define UHCI_TX_HUNG_INT_ENA_M  (BIT(3))
+#define UHCI_TX_HUNG_INT_ENA_V  0x1
+#define UHCI_TX_HUNG_INT_ENA_S  3
+/* UHCI_RX_HUNG_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_RX_HUNG_INT_ENA    (BIT(2))
+#define UHCI_RX_HUNG_INT_ENA_M  (BIT(2))
+#define UHCI_RX_HUNG_INT_ENA_V  0x1
+#define UHCI_RX_HUNG_INT_ENA_S  2
+/* UHCI_TX_START_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_TX_START_INT_ENA    (BIT(1))
+#define UHCI_TX_START_INT_ENA_M  (BIT(1))
+#define UHCI_TX_START_INT_ENA_V  0x1
+#define UHCI_TX_START_INT_ENA_S  1
+/* UHCI_RX_START_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_RX_START_INT_ENA    (BIT(0))
+#define UHCI_RX_START_INT_ENA_M  (BIT(0))
+#define UHCI_RX_START_INT_ENA_V  0x1
+#define UHCI_RX_START_INT_ENA_S  0
+
+#define UHCI_INT_CLR_REG(i)          (REG_UHCI_BASE(i) + 0x10)
+/* UHCI_APP_CTRL1_INT_CLR : WO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_APP_CTRL1_INT_CLR    (BIT(8))
+#define UHCI_APP_CTRL1_INT_CLR_M  (BIT(8))
+#define UHCI_APP_CTRL1_INT_CLR_V  0x1
+#define UHCI_APP_CTRL1_INT_CLR_S  8
+/* UHCI_APP_CTRL0_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_APP_CTRL0_INT_CLR    (BIT(7))
+#define UHCI_APP_CTRL0_INT_CLR_M  (BIT(7))
+#define UHCI_APP_CTRL0_INT_CLR_V  0x1
+#define UHCI_APP_CTRL0_INT_CLR_S  7
+/* UHCI_OUTLINK_EOF_ERR_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_OUTLINK_EOF_ERR_INT_CLR    (BIT(6))
+#define UHCI_OUTLINK_EOF_ERR_INT_CLR_M  (BIT(6))
+#define UHCI_OUTLINK_EOF_ERR_INT_CLR_V  0x1
+#define UHCI_OUTLINK_EOF_ERR_INT_CLR_S  6
+/* UHCI_SEND_A_Q_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_SEND_A_Q_INT_CLR    (BIT(5))
+#define UHCI_SEND_A_Q_INT_CLR_M  (BIT(5))
+#define UHCI_SEND_A_Q_INT_CLR_V  0x1
+#define UHCI_SEND_A_Q_INT_CLR_S  5
+/* UHCI_SEND_S_Q_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_SEND_S_Q_INT_CLR    (BIT(4))
+#define UHCI_SEND_S_Q_INT_CLR_M  (BIT(4))
+#define UHCI_SEND_S_Q_INT_CLR_V  0x1
+#define UHCI_SEND_S_Q_INT_CLR_S  4
+/* UHCI_TX_HUNG_INT_CLR : WO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_TX_HUNG_INT_CLR    (BIT(3))
+#define UHCI_TX_HUNG_INT_CLR_M  (BIT(3))
+#define UHCI_TX_HUNG_INT_CLR_V  0x1
+#define UHCI_TX_HUNG_INT_CLR_S  3
+/* UHCI_RX_HUNG_INT_CLR : WO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_RX_HUNG_INT_CLR    (BIT(2))
+#define UHCI_RX_HUNG_INT_CLR_M  (BIT(2))
+#define UHCI_RX_HUNG_INT_CLR_V  0x1
+#define UHCI_RX_HUNG_INT_CLR_S  2
+/* UHCI_TX_START_INT_CLR : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_TX_START_INT_CLR    (BIT(1))
+#define UHCI_TX_START_INT_CLR_M  (BIT(1))
+#define UHCI_TX_START_INT_CLR_V  0x1
+#define UHCI_TX_START_INT_CLR_S  1
+/* UHCI_RX_START_INT_CLR : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_RX_START_INT_CLR    (BIT(0))
+#define UHCI_RX_START_INT_CLR_M  (BIT(0))
+#define UHCI_RX_START_INT_CLR_V  0x1
+#define UHCI_RX_START_INT_CLR_S  0
+
+#define UHCI_APP_INT_SET_REG(i)          (REG_UHCI_BASE(i) + 0x14)
+/* UHCI_APP_CTRL1_INT_SET : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_APP_CTRL1_INT_SET    (BIT(1))
+#define UHCI_APP_CTRL1_INT_SET_M  (BIT(1))
+#define UHCI_APP_CTRL1_INT_SET_V  0x1
+#define UHCI_APP_CTRL1_INT_SET_S  1
+/* UHCI_APP_CTRL0_INT_SET : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_APP_CTRL0_INT_SET    (BIT(0))
+#define UHCI_APP_CTRL0_INT_SET_M  (BIT(0))
+#define UHCI_APP_CTRL0_INT_SET_V  0x1
+#define UHCI_APP_CTRL0_INT_SET_S  0
+
+#define UHCI_CONF1_REG(i)          (REG_UHCI_BASE(i) + 0x18)
+/* UHCI_SW_START : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_SW_START    (BIT(8))
+#define UHCI_SW_START_M  (BIT(8))
+#define UHCI_SW_START_V  0x1
+#define UHCI_SW_START_S  8
+/* UHCI_WAIT_SW_START : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_WAIT_SW_START    (BIT(7))
+#define UHCI_WAIT_SW_START_M  (BIT(7))
+#define UHCI_WAIT_SW_START_V  0x1
+#define UHCI_WAIT_SW_START_S  7
+/* UHCI_TX_ACK_NUM_RE : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_TX_ACK_NUM_RE    (BIT(5))
+#define UHCI_TX_ACK_NUM_RE_M  (BIT(5))
+#define UHCI_TX_ACK_NUM_RE_V  0x1
+#define UHCI_TX_ACK_NUM_RE_S  5
+/* UHCI_TX_CHECK_SUM_RE : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_TX_CHECK_SUM_RE    (BIT(4))
+#define UHCI_TX_CHECK_SUM_RE_M  (BIT(4))
+#define UHCI_TX_CHECK_SUM_RE_V  0x1
+#define UHCI_TX_CHECK_SUM_RE_S  4
+/* UHCI_SAVE_HEAD : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_SAVE_HEAD    (BIT(3))
+#define UHCI_SAVE_HEAD_M  (BIT(3))
+#define UHCI_SAVE_HEAD_V  0x1
+#define UHCI_SAVE_HEAD_S  3
+/* UHCI_CRC_DISABLE : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_CRC_DISABLE    (BIT(2))
+#define UHCI_CRC_DISABLE_M  (BIT(2))
+#define UHCI_CRC_DISABLE_V  0x1
+#define UHCI_CRC_DISABLE_S  2
+/* UHCI_CHECK_SEQ_EN : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_CHECK_SEQ_EN    (BIT(1))
+#define UHCI_CHECK_SEQ_EN_M  (BIT(1))
+#define UHCI_CHECK_SEQ_EN_V  0x1
+#define UHCI_CHECK_SEQ_EN_S  1
+/* UHCI_CHECK_SUM_EN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_CHECK_SUM_EN    (BIT(0))
+#define UHCI_CHECK_SUM_EN_M  (BIT(0))
+#define UHCI_CHECK_SUM_EN_V  0x1
+#define UHCI_CHECK_SUM_EN_S  0
+
+#define UHCI_STATE0_REG(i)          (REG_UHCI_BASE(i) + 0x1C)
+/* UHCI_DECODE_STATE : RO ;bitpos:[5:3] ;default: 3'b0 ; */
+/*description: .*/
+#define UHCI_DECODE_STATE    0x00000007
+#define UHCI_DECODE_STATE_M  ((UHCI_DECODE_STATE_V)<<(UHCI_DECODE_STATE_S))
+#define UHCI_DECODE_STATE_V  0x7
+#define UHCI_DECODE_STATE_S  3
+/* UHCI_RX_ERR_CAUSE : RO ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: .*/
+#define UHCI_RX_ERR_CAUSE    0x00000007
+#define UHCI_RX_ERR_CAUSE_M  ((UHCI_RX_ERR_CAUSE_V)<<(UHCI_RX_ERR_CAUSE_S))
+#define UHCI_RX_ERR_CAUSE_V  0x7
+#define UHCI_RX_ERR_CAUSE_S  0
+
+#define UHCI_STATE1_REG(i)          (REG_UHCI_BASE(i) + 0x20)
+/* UHCI_ENCODE_STATE : RO ;bitpos:[2:0] ;default: 3'b0 ; */
+/*description: .*/
+#define UHCI_ENCODE_STATE    0x00000007
+#define UHCI_ENCODE_STATE_M  ((UHCI_ENCODE_STATE_V)<<(UHCI_ENCODE_STATE_S))
+#define UHCI_ENCODE_STATE_V  0x7
+#define UHCI_ENCODE_STATE_S  0
+
+#define UHCI_ESCAPE_CONF_REG(i)          (REG_UHCI_BASE(i) + 0x24)
+/* UHCI_RX_13_ESC_EN : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_RX_13_ESC_EN    (BIT(7))
+#define UHCI_RX_13_ESC_EN_M  (BIT(7))
+#define UHCI_RX_13_ESC_EN_V  0x1
+#define UHCI_RX_13_ESC_EN_S  7
+/* UHCI_RX_11_ESC_EN : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_RX_11_ESC_EN    (BIT(6))
+#define UHCI_RX_11_ESC_EN_M  (BIT(6))
+#define UHCI_RX_11_ESC_EN_V  0x1
+#define UHCI_RX_11_ESC_EN_S  6
+/* UHCI_RX_DB_ESC_EN : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_RX_DB_ESC_EN    (BIT(5))
+#define UHCI_RX_DB_ESC_EN_M  (BIT(5))
+#define UHCI_RX_DB_ESC_EN_V  0x1
+#define UHCI_RX_DB_ESC_EN_S  5
+/* UHCI_RX_C0_ESC_EN : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_RX_C0_ESC_EN    (BIT(4))
+#define UHCI_RX_C0_ESC_EN_M  (BIT(4))
+#define UHCI_RX_C0_ESC_EN_V  0x1
+#define UHCI_RX_C0_ESC_EN_S  4
+/* UHCI_TX_13_ESC_EN : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_TX_13_ESC_EN    (BIT(3))
+#define UHCI_TX_13_ESC_EN_M  (BIT(3))
+#define UHCI_TX_13_ESC_EN_V  0x1
+#define UHCI_TX_13_ESC_EN_S  3
+/* UHCI_TX_11_ESC_EN : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_TX_11_ESC_EN    (BIT(2))
+#define UHCI_TX_11_ESC_EN_M  (BIT(2))
+#define UHCI_TX_11_ESC_EN_V  0x1
+#define UHCI_TX_11_ESC_EN_S  2
+/* UHCI_TX_DB_ESC_EN : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_TX_DB_ESC_EN    (BIT(1))
+#define UHCI_TX_DB_ESC_EN_M  (BIT(1))
+#define UHCI_TX_DB_ESC_EN_V  0x1
+#define UHCI_TX_DB_ESC_EN_S  1
+/* UHCI_TX_C0_ESC_EN : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_TX_C0_ESC_EN    (BIT(0))
+#define UHCI_TX_C0_ESC_EN_M  (BIT(0))
+#define UHCI_TX_C0_ESC_EN_V  0x1
+#define UHCI_TX_C0_ESC_EN_S  0
+
+#define UHCI_HUNG_CONF_REG(i)          (REG_UHCI_BASE(i) + 0x28)
+/* UHCI_RXFIFO_TIMEOUT_ENA : R/W ;bitpos:[23] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_RXFIFO_TIMEOUT_ENA    (BIT(23))
+#define UHCI_RXFIFO_TIMEOUT_ENA_M  (BIT(23))
+#define UHCI_RXFIFO_TIMEOUT_ENA_V  0x1
+#define UHCI_RXFIFO_TIMEOUT_ENA_S  23
+/* UHCI_RXFIFO_TIMEOUT_SHIFT : R/W ;bitpos:[22:20] ;default: 3'b0 ; */
+/*description: .*/
+#define UHCI_RXFIFO_TIMEOUT_SHIFT    0x00000007
+#define UHCI_RXFIFO_TIMEOUT_SHIFT_M  ((UHCI_RXFIFO_TIMEOUT_SHIFT_V)<<(UHCI_RXFIFO_TIMEOUT_SHIFT_S))
+#define UHCI_RXFIFO_TIMEOUT_SHIFT_V  0x7
+#define UHCI_RXFIFO_TIMEOUT_SHIFT_S  20
+/* UHCI_RXFIFO_TIMEOUT : R/W ;bitpos:[19:12] ;default: 8'h10 ; */
+/*description: .*/
+#define UHCI_RXFIFO_TIMEOUT    0x000000FF
+#define UHCI_RXFIFO_TIMEOUT_M  ((UHCI_RXFIFO_TIMEOUT_V)<<(UHCI_RXFIFO_TIMEOUT_S))
+#define UHCI_RXFIFO_TIMEOUT_V  0xFF
+#define UHCI_RXFIFO_TIMEOUT_S  12
+/* UHCI_TXFIFO_TIMEOUT_ENA : R/W ;bitpos:[11] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_TXFIFO_TIMEOUT_ENA    (BIT(11))
+#define UHCI_TXFIFO_TIMEOUT_ENA_M  (BIT(11))
+#define UHCI_TXFIFO_TIMEOUT_ENA_V  0x1
+#define UHCI_TXFIFO_TIMEOUT_ENA_S  11
+/* UHCI_TXFIFO_TIMEOUT_SHIFT : R/W ;bitpos:[10:8] ;default: 3'b0 ; */
+/*description: .*/
+#define UHCI_TXFIFO_TIMEOUT_SHIFT    0x00000007
+#define UHCI_TXFIFO_TIMEOUT_SHIFT_M  ((UHCI_TXFIFO_TIMEOUT_SHIFT_V)<<(UHCI_TXFIFO_TIMEOUT_SHIFT_S))
+#define UHCI_TXFIFO_TIMEOUT_SHIFT_V  0x7
+#define UHCI_TXFIFO_TIMEOUT_SHIFT_S  8
+/* UHCI_TXFIFO_TIMEOUT : R/W ;bitpos:[7:0] ;default: 8'h10 ; */
+/*description: .*/
+#define UHCI_TXFIFO_TIMEOUT    0x000000FF
+#define UHCI_TXFIFO_TIMEOUT_M  ((UHCI_TXFIFO_TIMEOUT_V)<<(UHCI_TXFIFO_TIMEOUT_S))
+#define UHCI_TXFIFO_TIMEOUT_V  0xFF
+#define UHCI_TXFIFO_TIMEOUT_S  0
+
+#define UHCI_ACK_NUM_REG(i)          (REG_UHCI_BASE(i) + 0x2C)
+/* UHCI_ACK_NUM_LOAD : WO ;bitpos:[3] ;default: 1'b1 ; */
+/*description: .*/
+#define UHCI_ACK_NUM_LOAD    (BIT(3))
+#define UHCI_ACK_NUM_LOAD_M  (BIT(3))
+#define UHCI_ACK_NUM_LOAD_V  0x1
+#define UHCI_ACK_NUM_LOAD_S  3
+/* UHCI_ACK_NUM : R/W ;bitpos:[2:0] ;default: 3'h0 ; */
+/*description: .*/
+#define UHCI_ACK_NUM    0x00000007
+#define UHCI_ACK_NUM_M  ((UHCI_ACK_NUM_V)<<(UHCI_ACK_NUM_S))
+#define UHCI_ACK_NUM_V  0x7
+#define UHCI_ACK_NUM_S  0
+
+#define UHCI_RX_HEAD_REG(i)          (REG_UHCI_BASE(i) + 0x30)
+/* UHCI_RX_HEAD : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_RX_HEAD    0xFFFFFFFF
+#define UHCI_RX_HEAD_M  ((UHCI_RX_HEAD_V)<<(UHCI_RX_HEAD_S))
+#define UHCI_RX_HEAD_V  0xFFFFFFFF
+#define UHCI_RX_HEAD_S  0
+
+#define UHCI_QUICK_SENT_REG(i)          (REG_UHCI_BASE(i) + 0x34)
+/* UHCI_ALWAYS_SEND_EN : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_ALWAYS_SEND_EN    (BIT(7))
+#define UHCI_ALWAYS_SEND_EN_M  (BIT(7))
+#define UHCI_ALWAYS_SEND_EN_V  0x1
+#define UHCI_ALWAYS_SEND_EN_S  7
+/* UHCI_ALWAYS_SEND_NUM : R/W ;bitpos:[6:4] ;default: 3'h0 ; */
+/*description: .*/
+#define UHCI_ALWAYS_SEND_NUM    0x00000007
+#define UHCI_ALWAYS_SEND_NUM_M  ((UHCI_ALWAYS_SEND_NUM_V)<<(UHCI_ALWAYS_SEND_NUM_S))
+#define UHCI_ALWAYS_SEND_NUM_V  0x7
+#define UHCI_ALWAYS_SEND_NUM_S  4
+/* UHCI_SINGLE_SEND_EN : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: .*/
+#define UHCI_SINGLE_SEND_EN    (BIT(3))
+#define UHCI_SINGLE_SEND_EN_M  (BIT(3))
+#define UHCI_SINGLE_SEND_EN_V  0x1
+#define UHCI_SINGLE_SEND_EN_S  3
+/* UHCI_SINGLE_SEND_NUM : R/W ;bitpos:[2:0] ;default: 3'h0 ; */
+/*description: .*/
+#define UHCI_SINGLE_SEND_NUM    0x00000007
+#define UHCI_SINGLE_SEND_NUM_M  ((UHCI_SINGLE_SEND_NUM_V)<<(UHCI_SINGLE_SEND_NUM_S))
+#define UHCI_SINGLE_SEND_NUM_V  0x7
+#define UHCI_SINGLE_SEND_NUM_S  0
+
+#define UHCI_Q0_WORD0_REG(i)          (REG_UHCI_BASE(i) + 0x38)
+/* UHCI_SEND_Q0_WORD0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q0_WORD0    0xFFFFFFFF
+#define UHCI_SEND_Q0_WORD0_M  ((UHCI_SEND_Q0_WORD0_V)<<(UHCI_SEND_Q0_WORD0_S))
+#define UHCI_SEND_Q0_WORD0_V  0xFFFFFFFF
+#define UHCI_SEND_Q0_WORD0_S  0
+
+#define UHCI_Q0_WORD1_REG(i)          (REG_UHCI_BASE(i) + 0x3C)
+/* UHCI_SEND_Q0_WORD1 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q0_WORD1    0xFFFFFFFF
+#define UHCI_SEND_Q0_WORD1_M  ((UHCI_SEND_Q0_WORD1_V)<<(UHCI_SEND_Q0_WORD1_S))
+#define UHCI_SEND_Q0_WORD1_V  0xFFFFFFFF
+#define UHCI_SEND_Q0_WORD1_S  0
+
+#define UHCI_Q1_WORD0_REG(i)          (REG_UHCI_BASE(i) + 0x40)
+/* UHCI_SEND_Q1_WORD0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q1_WORD0    0xFFFFFFFF
+#define UHCI_SEND_Q1_WORD0_M  ((UHCI_SEND_Q1_WORD0_V)<<(UHCI_SEND_Q1_WORD0_S))
+#define UHCI_SEND_Q1_WORD0_V  0xFFFFFFFF
+#define UHCI_SEND_Q1_WORD0_S  0
+
+#define UHCI_Q1_WORD1_REG(i)          (REG_UHCI_BASE(i) + 0x44)
+/* UHCI_SEND_Q1_WORD1 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q1_WORD1    0xFFFFFFFF
+#define UHCI_SEND_Q1_WORD1_M  ((UHCI_SEND_Q1_WORD1_V)<<(UHCI_SEND_Q1_WORD1_S))
+#define UHCI_SEND_Q1_WORD1_V  0xFFFFFFFF
+#define UHCI_SEND_Q1_WORD1_S  0
+
+#define UHCI_Q2_WORD0_REG(i)          (REG_UHCI_BASE(i) + 0x48)
+/* UHCI_SEND_Q2_WORD0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q2_WORD0    0xFFFFFFFF
+#define UHCI_SEND_Q2_WORD0_M  ((UHCI_SEND_Q2_WORD0_V)<<(UHCI_SEND_Q2_WORD0_S))
+#define UHCI_SEND_Q2_WORD0_V  0xFFFFFFFF
+#define UHCI_SEND_Q2_WORD0_S  0
+
+#define UHCI_Q2_WORD1_REG(i)          (REG_UHCI_BASE(i) + 0x4C)
+/* UHCI_SEND_Q2_WORD1 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q2_WORD1    0xFFFFFFFF
+#define UHCI_SEND_Q2_WORD1_M  ((UHCI_SEND_Q2_WORD1_V)<<(UHCI_SEND_Q2_WORD1_S))
+#define UHCI_SEND_Q2_WORD1_V  0xFFFFFFFF
+#define UHCI_SEND_Q2_WORD1_S  0
+
+#define UHCI_Q3_WORD0_REG(i)          (REG_UHCI_BASE(i) + 0x50)
+/* UHCI_SEND_Q3_WORD0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q3_WORD0    0xFFFFFFFF
+#define UHCI_SEND_Q3_WORD0_M  ((UHCI_SEND_Q3_WORD0_V)<<(UHCI_SEND_Q3_WORD0_S))
+#define UHCI_SEND_Q3_WORD0_V  0xFFFFFFFF
+#define UHCI_SEND_Q3_WORD0_S  0
+
+#define UHCI_Q3_WORD1_REG(i)          (REG_UHCI_BASE(i) + 0x54)
+/* UHCI_SEND_Q3_WORD1 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q3_WORD1    0xFFFFFFFF
+#define UHCI_SEND_Q3_WORD1_M  ((UHCI_SEND_Q3_WORD1_V)<<(UHCI_SEND_Q3_WORD1_S))
+#define UHCI_SEND_Q3_WORD1_V  0xFFFFFFFF
+#define UHCI_SEND_Q3_WORD1_S  0
+
+#define UHCI_Q4_WORD0_REG(i)          (REG_UHCI_BASE(i) + 0x58)
+/* UHCI_SEND_Q4_WORD0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q4_WORD0    0xFFFFFFFF
+#define UHCI_SEND_Q4_WORD0_M  ((UHCI_SEND_Q4_WORD0_V)<<(UHCI_SEND_Q4_WORD0_S))
+#define UHCI_SEND_Q4_WORD0_V  0xFFFFFFFF
+#define UHCI_SEND_Q4_WORD0_S  0
+
+#define UHCI_Q4_WORD1_REG(i)          (REG_UHCI_BASE(i) + 0x5C)
+/* UHCI_SEND_Q4_WORD1 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q4_WORD1    0xFFFFFFFF
+#define UHCI_SEND_Q4_WORD1_M  ((UHCI_SEND_Q4_WORD1_V)<<(UHCI_SEND_Q4_WORD1_S))
+#define UHCI_SEND_Q4_WORD1_V  0xFFFFFFFF
+#define UHCI_SEND_Q4_WORD1_S  0
+
+#define UHCI_Q5_WORD0_REG(i)          (REG_UHCI_BASE(i) + 0x60)
+/* UHCI_SEND_Q5_WORD0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q5_WORD0    0xFFFFFFFF
+#define UHCI_SEND_Q5_WORD0_M  ((UHCI_SEND_Q5_WORD0_V)<<(UHCI_SEND_Q5_WORD0_S))
+#define UHCI_SEND_Q5_WORD0_V  0xFFFFFFFF
+#define UHCI_SEND_Q5_WORD0_S  0
+
+#define UHCI_Q5_WORD1_REG(i)          (REG_UHCI_BASE(i) + 0x64)
+/* UHCI_SEND_Q5_WORD1 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q5_WORD1    0xFFFFFFFF
+#define UHCI_SEND_Q5_WORD1_M  ((UHCI_SEND_Q5_WORD1_V)<<(UHCI_SEND_Q5_WORD1_S))
+#define UHCI_SEND_Q5_WORD1_V  0xFFFFFFFF
+#define UHCI_SEND_Q5_WORD1_S  0
+
+#define UHCI_Q6_WORD0_REG(i)          (REG_UHCI_BASE(i) + 0x68)
+/* UHCI_SEND_Q6_WORD0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q6_WORD0    0xFFFFFFFF
+#define UHCI_SEND_Q6_WORD0_M  ((UHCI_SEND_Q6_WORD0_V)<<(UHCI_SEND_Q6_WORD0_S))
+#define UHCI_SEND_Q6_WORD0_V  0xFFFFFFFF
+#define UHCI_SEND_Q6_WORD0_S  0
+
+#define UHCI_Q6_WORD1_REG(i)          (REG_UHCI_BASE(i) + 0x6C)
+/* UHCI_SEND_Q6_WORD1 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: .*/
+#define UHCI_SEND_Q6_WORD1    0xFFFFFFFF
+#define UHCI_SEND_Q6_WORD1_M  ((UHCI_SEND_Q6_WORD1_V)<<(UHCI_SEND_Q6_WORD1_S))
+#define UHCI_SEND_Q6_WORD1_V  0xFFFFFFFF
+#define UHCI_SEND_Q6_WORD1_S  0
+
+#define UHCI_ESC_CONF0_REG(i)          (REG_UHCI_BASE(i) + 0x70)
+/* UHCI_SEPER_ESC_CHAR1 : R/W ;bitpos:[23:16] ;default: 8'hdc ; */
+/*description: .*/
+#define UHCI_SEPER_ESC_CHAR1    0x000000FF
+#define UHCI_SEPER_ESC_CHAR1_M  ((UHCI_SEPER_ESC_CHAR1_V)<<(UHCI_SEPER_ESC_CHAR1_S))
+#define UHCI_SEPER_ESC_CHAR1_V  0xFF
+#define UHCI_SEPER_ESC_CHAR1_S  16
+/* UHCI_SEPER_ESC_CHAR0 : R/W ;bitpos:[15:8] ;default: 8'hdb ; */
+/*description: .*/
+#define UHCI_SEPER_ESC_CHAR0    0x000000FF
+#define UHCI_SEPER_ESC_CHAR0_M  ((UHCI_SEPER_ESC_CHAR0_V)<<(UHCI_SEPER_ESC_CHAR0_S))
+#define UHCI_SEPER_ESC_CHAR0_V  0xFF
+#define UHCI_SEPER_ESC_CHAR0_S  8
+/* UHCI_SEPER_CHAR : R/W ;bitpos:[7:0] ;default: 8'hc0 ; */
+/*description: .*/
+#define UHCI_SEPER_CHAR    0x000000FF
+#define UHCI_SEPER_CHAR_M  ((UHCI_SEPER_CHAR_V)<<(UHCI_SEPER_CHAR_S))
+#define UHCI_SEPER_CHAR_V  0xFF
+#define UHCI_SEPER_CHAR_S  0
+
+#define UHCI_ESC_CONF1_REG(i)          (REG_UHCI_BASE(i) + 0x74)
+/* UHCI_ESC_SEQ0_CHAR1 : R/W ;bitpos:[23:16] ;default: 8'hdd ; */
+/*description: .*/
+#define UHCI_ESC_SEQ0_CHAR1    0x000000FF
+#define UHCI_ESC_SEQ0_CHAR1_M  ((UHCI_ESC_SEQ0_CHAR1_V)<<(UHCI_ESC_SEQ0_CHAR1_S))
+#define UHCI_ESC_SEQ0_CHAR1_V  0xFF
+#define UHCI_ESC_SEQ0_CHAR1_S  16
+/* UHCI_ESC_SEQ0_CHAR0 : R/W ;bitpos:[15:8] ;default: 8'hdb ; */
+/*description: .*/
+#define UHCI_ESC_SEQ0_CHAR0    0x000000FF
+#define UHCI_ESC_SEQ0_CHAR0_M  ((UHCI_ESC_SEQ0_CHAR0_V)<<(UHCI_ESC_SEQ0_CHAR0_S))
+#define UHCI_ESC_SEQ0_CHAR0_V  0xFF
+#define UHCI_ESC_SEQ0_CHAR0_S  8
+/* UHCI_ESC_SEQ0 : R/W ;bitpos:[7:0] ;default: 8'hdb ; */
+/*description: .*/
+#define UHCI_ESC_SEQ0    0x000000FF
+#define UHCI_ESC_SEQ0_M  ((UHCI_ESC_SEQ0_V)<<(UHCI_ESC_SEQ0_S))
+#define UHCI_ESC_SEQ0_V  0xFF
+#define UHCI_ESC_SEQ0_S  0
+
+#define UHCI_ESC_CONF2_REG(i)          (REG_UHCI_BASE(i) + 0x78)
+/* UHCI_ESC_SEQ1_CHAR1 : R/W ;bitpos:[23:16] ;default: 8'hde ; */
+/*description: .*/
+#define UHCI_ESC_SEQ1_CHAR1    0x000000FF
+#define UHCI_ESC_SEQ1_CHAR1_M  ((UHCI_ESC_SEQ1_CHAR1_V)<<(UHCI_ESC_SEQ1_CHAR1_S))
+#define UHCI_ESC_SEQ1_CHAR1_V  0xFF
+#define UHCI_ESC_SEQ1_CHAR1_S  16
+/* UHCI_ESC_SEQ1_CHAR0 : R/W ;bitpos:[15:8] ;default: 8'hdb ; */
+/*description: .*/
+#define UHCI_ESC_SEQ1_CHAR0    0x000000FF
+#define UHCI_ESC_SEQ1_CHAR0_M  ((UHCI_ESC_SEQ1_CHAR0_V)<<(UHCI_ESC_SEQ1_CHAR0_S))
+#define UHCI_ESC_SEQ1_CHAR0_V  0xFF
+#define UHCI_ESC_SEQ1_CHAR0_S  8
+/* UHCI_ESC_SEQ1 : R/W ;bitpos:[7:0] ;default: 8'h11 ; */
+/*description: .*/
+#define UHCI_ESC_SEQ1    0x000000FF
+#define UHCI_ESC_SEQ1_M  ((UHCI_ESC_SEQ1_V)<<(UHCI_ESC_SEQ1_S))
+#define UHCI_ESC_SEQ1_V  0xFF
+#define UHCI_ESC_SEQ1_S  0
+
+#define UHCI_ESC_CONF3_REG(i)          (REG_UHCI_BASE(i) + 0x7C)
+/* UHCI_ESC_SEQ2_CHAR1 : R/W ;bitpos:[23:16] ;default: 8'hdf ; */
+/*description: .*/
+#define UHCI_ESC_SEQ2_CHAR1    0x000000FF
+#define UHCI_ESC_SEQ2_CHAR1_M  ((UHCI_ESC_SEQ2_CHAR1_V)<<(UHCI_ESC_SEQ2_CHAR1_S))
+#define UHCI_ESC_SEQ2_CHAR1_V  0xFF
+#define UHCI_ESC_SEQ2_CHAR1_S  16
+/* UHCI_ESC_SEQ2_CHAR0 : R/W ;bitpos:[15:8] ;default: 8'hdb ; */
+/*description: .*/
+#define UHCI_ESC_SEQ2_CHAR0    0x000000FF
+#define UHCI_ESC_SEQ2_CHAR0_M  ((UHCI_ESC_SEQ2_CHAR0_V)<<(UHCI_ESC_SEQ2_CHAR0_S))
+#define UHCI_ESC_SEQ2_CHAR0_V  0xFF
+#define UHCI_ESC_SEQ2_CHAR0_S  8
+/* UHCI_ESC_SEQ2 : R/W ;bitpos:[7:0] ;default: 8'h13 ; */
+/*description: .*/
+#define UHCI_ESC_SEQ2    0x000000FF
+#define UHCI_ESC_SEQ2_M  ((UHCI_ESC_SEQ2_V)<<(UHCI_ESC_SEQ2_S))
+#define UHCI_ESC_SEQ2_V  0xFF
+#define UHCI_ESC_SEQ2_S  0
+
+#define UHCI_PKT_THRES_REG(i)          (REG_UHCI_BASE(i) + 0x80)
+/* UHCI_PKT_THRS : R/W ;bitpos:[12:0] ;default: 13'h80 ; */
+/*description: .*/
+#define UHCI_PKT_THRS    0x00001FFF
+#define UHCI_PKT_THRS_M  ((UHCI_PKT_THRS_V)<<(UHCI_PKT_THRS_S))
+#define UHCI_PKT_THRS_V  0x1FFF
+#define UHCI_PKT_THRS_S  0
+
+#define UHCI_DATE_REG(i)          (REG_UHCI_BASE(i) + 0x84)
+/* UHCI_DATE : R/W ;bitpos:[31:0] ;default: 32'h2010090 ; */
+/*description: .*/
+#define UHCI_DATE    0xFFFFFFFF
+#define UHCI_DATE_M  ((UHCI_DATE_V)<<(UHCI_DATE_S))
+#define UHCI_DATE_V  0xFFFFFFFF
+#define UHCI_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_UHCI_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uhci_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uhci_struct.h
new file mode 100644
index 00000000000..6fdd2cad1f2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/uhci_struct.h
@@ -0,0 +1,243 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_UHCI_STRUCT_H_
+#define _SOC_UHCI_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct uhci_dev_s {
+    union {
+        struct {
+            uint32_t tx_rst                        :    1;
+            uint32_t rx_rst                        :    1;
+            uint32_t uart0_ce                      :    1;
+            uint32_t uart1_ce                      :    1;
+            uint32_t uart2_ce                      :    1;
+            uint32_t seper_en                      :    1;
+            uint32_t head_en                       :    1;
+            uint32_t crc_rec_en                    :    1;
+            uint32_t uart_idle_eof_en              :    1;
+            uint32_t len_eof_en                    :    1;
+            uint32_t encode_crc_en                 :    1;
+            uint32_t clk_en                        :    1;
+            uint32_t uart_rx_brk_eof_en            :    1;
+            uint32_t reserved13                    :    19;
+        };
+        uint32_t val;
+    } conf0;
+    union {
+        struct {
+            uint32_t rx_start                      :    1;
+            uint32_t tx_start                      :    1;
+            uint32_t rx_hung                       :    1;
+            uint32_t tx_hung                       :    1;
+            uint32_t send_s_q                      :    1;
+            uint32_t send_a_q                      :    1;
+            uint32_t outlink_eof_err               :    1;
+            uint32_t app_ctrl0                     :    1;
+            uint32_t app_ctrl1                     :    1;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } int_raw;
+    union {
+        struct {
+            uint32_t rx_start                      :    1;
+            uint32_t tx_start                      :    1;
+            uint32_t rx_hung                       :    1;
+            uint32_t tx_hung                       :    1;
+            uint32_t send_s_q                      :    1;
+            uint32_t send_a_q                      :    1;
+            uint32_t outlink_eof_err               :    1;
+            uint32_t app_ctrl0                     :    1;
+            uint32_t app_ctrl1                     :    1;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } int_st;
+    union {
+        struct {
+            uint32_t rx_start                      :    1;
+            uint32_t tx_start                      :    1;
+            uint32_t rx_hung                       :    1;
+            uint32_t tx_hung                       :    1;
+            uint32_t send_s_q                      :    1;
+            uint32_t send_a_q                      :    1;
+            uint32_t outlink_eof_err               :    1;
+            uint32_t app_ctrl0                     :    1;
+            uint32_t app_ctrl1                     :    1;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } int_ena;
+    union {
+        struct {
+            uint32_t rx_start                      :    1;
+            uint32_t tx_start                      :    1;
+            uint32_t rx_hung                       :    1;
+            uint32_t tx_hung                       :    1;
+            uint32_t send_s_q                      :    1;
+            uint32_t send_a_q                      :    1;
+            uint32_t outlink_eof_err               :    1;
+            uint32_t app_ctrl0                     :    1;
+            uint32_t app_ctrl1                     :    1;
+            uint32_t reserved9                     :    23;
+        };
+        uint32_t val;
+    } int_clr;
+    union {
+        struct {
+            uint32_t app_ctrl0_int_set             :    1;
+            uint32_t app_ctrl1_int_set             :    1;
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } app_int_set;
+    union {
+        struct {
+            uint32_t check_sum_en                  :    1;
+            uint32_t check_seq_en                  :    1;
+            uint32_t crc_disable                   :    1;
+            uint32_t save_head                     :    1;
+            uint32_t tx_check_sum_re               :    1;
+            uint32_t tx_ack_num_re                 :    1;
+            uint32_t reserved6                     :    1;
+            uint32_t wait_sw_start                 :    1;
+            uint32_t sw_start                      :    1;
+            uint32_t reserved9                     :    12;
+            uint32_t reserved21                    :    11;
+        };
+        uint32_t val;
+    } conf1;
+    union {
+        struct {
+            uint32_t rx_err_cause                  :    3;
+            uint32_t decode_state                  :    3;
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } state0;
+    union {
+        struct {
+            uint32_t encode_state                  :    3;
+            uint32_t reserved3                     :    29;
+        };
+        uint32_t val;
+    } state1;
+    union {
+        struct {
+            uint32_t tx_c0_esc_en                  :    1;
+            uint32_t tx_db_esc_en                  :    1;
+            uint32_t tx_11_esc_en                  :    1;
+            uint32_t tx_13_esc_en                  :    1;
+            uint32_t rx_c0_esc_en                  :    1;
+            uint32_t rx_db_esc_en                  :    1;
+            uint32_t rx_11_esc_en                  :    1;
+            uint32_t rx_13_esc_en                  :    1;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } escape_conf;
+    union {
+        struct {
+            uint32_t txfifo_timeout                :    8;
+            uint32_t txfifo_timeout_shift          :    3;
+            uint32_t txfifo_timeout_ena            :    1;
+            uint32_t rxfifo_timeout                :    8;
+            uint32_t rxfifo_timeout_shift          :    3;
+            uint32_t rxfifo_timeout_ena            :    1;
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } hung_conf;
+    union {
+        struct {
+            uint32_t ack_num                       :    3;
+            uint32_t ack_num_load                  :    1;
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } ack_num;
+    uint32_t rx_head;
+    union {
+        struct {
+            uint32_t single_send_num               :    3;
+            uint32_t single_send_en                :    1;
+            uint32_t always_send_num               :    3;
+            uint32_t always_send_en                :    1;
+            uint32_t reserved8                     :    24;
+        };
+        uint32_t val;
+    } quick_sent;
+    struct {
+        uint32_t word[2];
+    } q_data[7];
+    union {
+        struct {
+            uint32_t seper_char                    :    8;
+            uint32_t seper_esc_char0               :    8;
+            uint32_t seper_esc_char1               :    8;
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } esc_conf0;
+    union {
+        struct {
+            uint32_t seq0                          :    8;
+            uint32_t seq0_char0                    :    8;
+            uint32_t seq0_char1                    :    8;
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } esc_conf1;
+    union {
+        struct {
+            uint32_t seq1                          :    8;
+            uint32_t seq1_char0                    :    8;
+            uint32_t seq1_char1                    :    8;
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } esc_conf2;
+    union {
+        struct {
+            uint32_t seq2                          :    8;
+            uint32_t seq2_char0                    :    8;
+            uint32_t seq2_char1                    :    8;
+            uint32_t reserved24                    :    8;
+        };
+        uint32_t val;
+    } esc_conf3;
+    union {
+        struct {
+            uint32_t thrs                          :    13;
+            uint32_t reserved13                    :    19;
+        };
+        uint32_t val;
+    } pkt_thres;
+    uint32_t date;
+} uhci_dev_t;
+extern uhci_dev_t UHCI0;
+extern uhci_dev_t UHCI1;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_UHCI_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_caps.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_caps.h
new file mode 100644
index 00000000000..820e98a4dd5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_caps.h
@@ -0,0 +1,17 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define SOC_USB_PERIPH_NUM 1
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_device_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_device_reg.h
new file mode 100644
index 00000000000..efb6bc5476b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_device_reg.h
@@ -0,0 +1,737 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_USB_DEVICE_REG_H_
+#define _SOC_USB_DEVICE_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define USB_DEVICE_EP1_REG          (DR_REG_USB_DEVICE_BASE + 0x0)
+/* USB_DEVICE_RDWR_BYTE : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: Write and read byte data to/from UART Tx/Rx FIFO through this field. When USB_DE
+VICE_SERIAL_IN_EMPTY_INT is set, then user can write data (up to 64 bytes) into
+UART Tx FIFO. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is set, user can check USB
+_DEVICE_OUT_EP1_WR_ADDR USB_DEVICE_OUT_EP0_RD_ADDR to know how many data is rece
+ived, then read data from UART Rx FIFO..*/
+#define USB_DEVICE_RDWR_BYTE    0x000000FF
+#define USB_DEVICE_RDWR_BYTE_M  ((USB_DEVICE_RDWR_BYTE_V)<<(USB_DEVICE_RDWR_BYTE_S))
+#define USB_DEVICE_RDWR_BYTE_V  0xFF
+#define USB_DEVICE_RDWR_BYTE_S  0
+
+#define USB_DEVICE_EP1_CONF_REG          (DR_REG_USB_DEVICE_BASE + 0x4)
+/* USB_DEVICE_SERIAL_OUT_EP_DATA_AVAIL : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: 1'b1: Indicate there is data in UART Rx FIFO..*/
+#define USB_DEVICE_SERIAL_OUT_EP_DATA_AVAIL    (BIT(2))
+#define USB_DEVICE_SERIAL_OUT_EP_DATA_AVAIL_M  (BIT(2))
+#define USB_DEVICE_SERIAL_OUT_EP_DATA_AVAIL_V  0x1
+#define USB_DEVICE_SERIAL_OUT_EP_DATA_AVAIL_S  2
+/* USB_DEVICE_SERIAL_IN_EP_DATA_FREE : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: 1'b1: Indicate UART Tx FIFO is not full and can write data into in. After writin
+g USB_DEVICE_WR_DONE, this bit would be 0 until data in UART Tx FIFO is read by
+USB Host..*/
+#define USB_DEVICE_SERIAL_IN_EP_DATA_FREE    (BIT(1))
+#define USB_DEVICE_SERIAL_IN_EP_DATA_FREE_M  (BIT(1))
+#define USB_DEVICE_SERIAL_IN_EP_DATA_FREE_V  0x1
+#define USB_DEVICE_SERIAL_IN_EP_DATA_FREE_S  1
+/* USB_DEVICE_WR_DONE : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to indicate writing byte data to UART Tx FIFO is done..*/
+#define USB_DEVICE_WR_DONE    (BIT(0))
+#define USB_DEVICE_WR_DONE_M  (BIT(0))
+#define USB_DEVICE_WR_DONE_V  0x1
+#define USB_DEVICE_WR_DONE_S  0
+
+#define USB_DEVICE_INT_RAW_REG          (DR_REG_USB_DEVICE_BASE + 0x8)
+/* USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_RAW : R/WTC/SS ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when OUT endpoint 2 received packet wi
+th zero palyload..*/
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_RAW    (BIT(11))
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_RAW_M  (BIT(11))
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_RAW_V  0x1
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_RAW_S  11
+/* USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_RAW : R/WTC/SS ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when OUT endpoint 1 received packet wi
+th zero palyload..*/
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_RAW    (BIT(10))
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_RAW_M  (BIT(10))
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_RAW_V  0x1
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_RAW_S  10
+/* USB_DEVICE_USB_BUS_RESET_INT_RAW : R/WTC/SS ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when usb bus reset is detected..*/
+#define USB_DEVICE_USB_BUS_RESET_INT_RAW    (BIT(9))
+#define USB_DEVICE_USB_BUS_RESET_INT_RAW_M  (BIT(9))
+#define USB_DEVICE_USB_BUS_RESET_INT_RAW_V  0x1
+#define USB_DEVICE_USB_BUS_RESET_INT_RAW_S  9
+/* USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_RAW : R/WTC/SS ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when IN token for IN endpoint 1 is rec
+eived..*/
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_RAW    (BIT(8))
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_RAW_M  (BIT(8))
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_RAW_V  0x1
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_RAW_S  8
+/* USB_DEVICE_STUFF_ERR_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when stuff error is detected..*/
+#define USB_DEVICE_STUFF_ERR_INT_RAW    (BIT(7))
+#define USB_DEVICE_STUFF_ERR_INT_RAW_M  (BIT(7))
+#define USB_DEVICE_STUFF_ERR_INT_RAW_V  0x1
+#define USB_DEVICE_STUFF_ERR_INT_RAW_S  7
+/* USB_DEVICE_CRC16_ERR_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when CRC16 error is detected..*/
+#define USB_DEVICE_CRC16_ERR_INT_RAW    (BIT(6))
+#define USB_DEVICE_CRC16_ERR_INT_RAW_M  (BIT(6))
+#define USB_DEVICE_CRC16_ERR_INT_RAW_V  0x1
+#define USB_DEVICE_CRC16_ERR_INT_RAW_S  6
+/* USB_DEVICE_CRC5_ERR_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when CRC5 error is detected..*/
+#define USB_DEVICE_CRC5_ERR_INT_RAW    (BIT(5))
+#define USB_DEVICE_CRC5_ERR_INT_RAW_M  (BIT(5))
+#define USB_DEVICE_CRC5_ERR_INT_RAW_V  0x1
+#define USB_DEVICE_CRC5_ERR_INT_RAW_S  5
+/* USB_DEVICE_PID_ERR_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when pid error is detected..*/
+#define USB_DEVICE_PID_ERR_INT_RAW    (BIT(4))
+#define USB_DEVICE_PID_ERR_INT_RAW_M  (BIT(4))
+#define USB_DEVICE_PID_ERR_INT_RAW_V  0x1
+#define USB_DEVICE_PID_ERR_INT_RAW_S  4
+/* USB_DEVICE_SERIAL_IN_EMPTY_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b1 ; */
+/*description: The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty..*/
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_RAW    (BIT(3))
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_RAW_M  (BIT(3))
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_RAW_V  0x1
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_RAW_S  3
+/* USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when Serial Port OUT Endpoint received
+ one packet..*/
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_RAW    (BIT(2))
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_RAW_M  (BIT(2))
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_RAW_V  0x1
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_RAW_S  2
+/* USB_DEVICE_SOF_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when SOF frame is received..*/
+#define USB_DEVICE_SOF_INT_RAW    (BIT(1))
+#define USB_DEVICE_SOF_INT_RAW_M  (BIT(1))
+#define USB_DEVICE_SOF_INT_RAW_V  0x1
+#define USB_DEVICE_SOF_INT_RAW_S  1
+/* USB_DEVICE_JTAG_IN_FLUSH_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when flush cmd is received for IN endp
+oint 2 of JTAG..*/
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_RAW    (BIT(0))
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_RAW_M  (BIT(0))
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_RAW_V  0x1
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_RAW_S  0
+
+#define USB_DEVICE_INT_ST_REG          (DR_REG_USB_DEVICE_BASE + 0xC)
+/* USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_ST : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interru
+pt..*/
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_ST    (BIT(11))
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_ST_M  (BIT(11))
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_ST_V  0x1
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_ST_S  11
+/* USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_ST : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interru
+pt..*/
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_ST    (BIT(10))
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_ST_M  (BIT(10))
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_ST_V  0x1
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_ST_S  10
+/* USB_DEVICE_USB_BUS_RESET_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_USB_BUS_RESET_INT interrupt..*/
+#define USB_DEVICE_USB_BUS_RESET_INT_ST    (BIT(9))
+#define USB_DEVICE_USB_BUS_RESET_INT_ST_M  (BIT(9))
+#define USB_DEVICE_USB_BUS_RESET_INT_ST_V  0x1
+#define USB_DEVICE_USB_BUS_RESET_INT_ST_S  9
+/* USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT interrup
+t..*/
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_ST    (BIT(8))
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_ST_M  (BIT(8))
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_ST_V  0x1
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_ST_S  8
+/* USB_DEVICE_STUFF_ERR_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_STUFF_ERR_INT interrupt..*/
+#define USB_DEVICE_STUFF_ERR_INT_ST    (BIT(7))
+#define USB_DEVICE_STUFF_ERR_INT_ST_M  (BIT(7))
+#define USB_DEVICE_STUFF_ERR_INT_ST_V  0x1
+#define USB_DEVICE_STUFF_ERR_INT_ST_S  7
+/* USB_DEVICE_CRC16_ERR_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_CRC16_ERR_INT interrupt..*/
+#define USB_DEVICE_CRC16_ERR_INT_ST    (BIT(6))
+#define USB_DEVICE_CRC16_ERR_INT_ST_M  (BIT(6))
+#define USB_DEVICE_CRC16_ERR_INT_ST_V  0x1
+#define USB_DEVICE_CRC16_ERR_INT_ST_S  6
+/* USB_DEVICE_CRC5_ERR_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_CRC5_ERR_INT interrupt..*/
+#define USB_DEVICE_CRC5_ERR_INT_ST    (BIT(5))
+#define USB_DEVICE_CRC5_ERR_INT_ST_M  (BIT(5))
+#define USB_DEVICE_CRC5_ERR_INT_ST_V  0x1
+#define USB_DEVICE_CRC5_ERR_INT_ST_S  5
+/* USB_DEVICE_PID_ERR_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_PID_ERR_INT interrupt..*/
+#define USB_DEVICE_PID_ERR_INT_ST    (BIT(4))
+#define USB_DEVICE_PID_ERR_INT_ST_M  (BIT(4))
+#define USB_DEVICE_PID_ERR_INT_ST_V  0x1
+#define USB_DEVICE_PID_ERR_INT_ST_S  4
+/* USB_DEVICE_SERIAL_IN_EMPTY_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt..*/
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_ST    (BIT(3))
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_ST_M  (BIT(3))
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_ST_V  0x1
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_ST_S  3
+/* USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrup
+t..*/
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ST    (BIT(2))
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ST_M  (BIT(2))
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ST_V  0x1
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ST_S  2
+/* USB_DEVICE_SOF_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_SOF_INT interrupt..*/
+#define USB_DEVICE_SOF_INT_ST    (BIT(1))
+#define USB_DEVICE_SOF_INT_ST_M  (BIT(1))
+#define USB_DEVICE_SOF_INT_ST_V  0x1
+#define USB_DEVICE_SOF_INT_ST_S  1
+/* USB_DEVICE_JTAG_IN_FLUSH_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt..*/
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_ST    (BIT(0))
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_ST_M  (BIT(0))
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_ST_V  0x1
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_ST_S  0
+
+#define USB_DEVICE_INT_ENA_REG          (DR_REG_USB_DEVICE_BASE + 0x10)
+/* USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_ENA : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt..*/
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_ENA    (BIT(11))
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_ENA_M  (BIT(11))
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_ENA_V  0x1
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_ENA_S  11
+/* USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt..*/
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_ENA    (BIT(10))
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_ENA_M  (BIT(10))
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_ENA_V  0x1
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_ENA_S  10
+/* USB_DEVICE_USB_BUS_RESET_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_USB_BUS_RESET_INT interrupt..*/
+#define USB_DEVICE_USB_BUS_RESET_INT_ENA    (BIT(9))
+#define USB_DEVICE_USB_BUS_RESET_INT_ENA_M  (BIT(9))
+#define USB_DEVICE_USB_BUS_RESET_INT_ENA_V  0x1
+#define USB_DEVICE_USB_BUS_RESET_INT_ENA_S  9
+/* USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT interrupt..*/
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_ENA    (BIT(8))
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_ENA_M  (BIT(8))
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_ENA_V  0x1
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_ENA_S  8
+/* USB_DEVICE_STUFF_ERR_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_STUFF_ERR_INT interrupt..*/
+#define USB_DEVICE_STUFF_ERR_INT_ENA    (BIT(7))
+#define USB_DEVICE_STUFF_ERR_INT_ENA_M  (BIT(7))
+#define USB_DEVICE_STUFF_ERR_INT_ENA_V  0x1
+#define USB_DEVICE_STUFF_ERR_INT_ENA_S  7
+/* USB_DEVICE_CRC16_ERR_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_CRC16_ERR_INT interrupt..*/
+#define USB_DEVICE_CRC16_ERR_INT_ENA    (BIT(6))
+#define USB_DEVICE_CRC16_ERR_INT_ENA_M  (BIT(6))
+#define USB_DEVICE_CRC16_ERR_INT_ENA_V  0x1
+#define USB_DEVICE_CRC16_ERR_INT_ENA_S  6
+/* USB_DEVICE_CRC5_ERR_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_CRC5_ERR_INT interrupt..*/
+#define USB_DEVICE_CRC5_ERR_INT_ENA    (BIT(5))
+#define USB_DEVICE_CRC5_ERR_INT_ENA_M  (BIT(5))
+#define USB_DEVICE_CRC5_ERR_INT_ENA_V  0x1
+#define USB_DEVICE_CRC5_ERR_INT_ENA_S  5
+/* USB_DEVICE_PID_ERR_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_PID_ERR_INT interrupt..*/
+#define USB_DEVICE_PID_ERR_INT_ENA    (BIT(4))
+#define USB_DEVICE_PID_ERR_INT_ENA_M  (BIT(4))
+#define USB_DEVICE_PID_ERR_INT_ENA_V  0x1
+#define USB_DEVICE_PID_ERR_INT_ENA_S  4
+/* USB_DEVICE_SERIAL_IN_EMPTY_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt..*/
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_ENA    (BIT(3))
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_ENA_M  (BIT(3))
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_ENA_V  0x1
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_ENA_S  3
+/* USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt..*/
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ENA    (BIT(2))
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ENA_M  (BIT(2))
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ENA_V  0x1
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ENA_S  2
+/* USB_DEVICE_SOF_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_SOF_INT interrupt..*/
+#define USB_DEVICE_SOF_INT_ENA    (BIT(1))
+#define USB_DEVICE_SOF_INT_ENA_M  (BIT(1))
+#define USB_DEVICE_SOF_INT_ENA_V  0x1
+#define USB_DEVICE_SOF_INT_ENA_S  1
+/* USB_DEVICE_JTAG_IN_FLUSH_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt..*/
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_ENA    (BIT(0))
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_ENA_M  (BIT(0))
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_ENA_V  0x1
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_ENA_S  0
+
+#define USB_DEVICE_INT_CLR_REG          (DR_REG_USB_DEVICE_BASE + 0x14)
+/* USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_CLR : WT ;bitpos:[11] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt..*/
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_CLR    (BIT(11))
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_CLR_M  (BIT(11))
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_CLR_V  0x1
+#define USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT_CLR_S  11
+/* USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_CLR : WT ;bitpos:[10] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt..*/
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_CLR    (BIT(10))
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_CLR_M  (BIT(10))
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_CLR_V  0x1
+#define USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT_CLR_S  10
+/* USB_DEVICE_USB_BUS_RESET_INT_CLR : WT ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_USB_BUS_RESET_INT interrupt..*/
+#define USB_DEVICE_USB_BUS_RESET_INT_CLR    (BIT(9))
+#define USB_DEVICE_USB_BUS_RESET_INT_CLR_M  (BIT(9))
+#define USB_DEVICE_USB_BUS_RESET_INT_CLR_V  0x1
+#define USB_DEVICE_USB_BUS_RESET_INT_CLR_S  9
+/* USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_CLR : WT ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_IN_TOKEN_IN_EP1_INT interrupt..*/
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_CLR    (BIT(8))
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_CLR_M  (BIT(8))
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_CLR_V  0x1
+#define USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT_CLR_S  8
+/* USB_DEVICE_STUFF_ERR_INT_CLR : WT ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_STUFF_ERR_INT interrupt..*/
+#define USB_DEVICE_STUFF_ERR_INT_CLR    (BIT(7))
+#define USB_DEVICE_STUFF_ERR_INT_CLR_M  (BIT(7))
+#define USB_DEVICE_STUFF_ERR_INT_CLR_V  0x1
+#define USB_DEVICE_STUFF_ERR_INT_CLR_S  7
+/* USB_DEVICE_CRC16_ERR_INT_CLR : WT ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_CRC16_ERR_INT interrupt..*/
+#define USB_DEVICE_CRC16_ERR_INT_CLR    (BIT(6))
+#define USB_DEVICE_CRC16_ERR_INT_CLR_M  (BIT(6))
+#define USB_DEVICE_CRC16_ERR_INT_CLR_V  0x1
+#define USB_DEVICE_CRC16_ERR_INT_CLR_S  6
+/* USB_DEVICE_CRC5_ERR_INT_CLR : WT ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_CRC5_ERR_INT interrupt..*/
+#define USB_DEVICE_CRC5_ERR_INT_CLR    (BIT(5))
+#define USB_DEVICE_CRC5_ERR_INT_CLR_M  (BIT(5))
+#define USB_DEVICE_CRC5_ERR_INT_CLR_V  0x1
+#define USB_DEVICE_CRC5_ERR_INT_CLR_S  5
+/* USB_DEVICE_PID_ERR_INT_CLR : WT ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_PID_ERR_INT interrupt..*/
+#define USB_DEVICE_PID_ERR_INT_CLR    (BIT(4))
+#define USB_DEVICE_PID_ERR_INT_CLR_M  (BIT(4))
+#define USB_DEVICE_PID_ERR_INT_CLR_V  0x1
+#define USB_DEVICE_PID_ERR_INT_CLR_S  4
+/* USB_DEVICE_SERIAL_IN_EMPTY_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt..*/
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_CLR    (BIT(3))
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_CLR_M  (BIT(3))
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_CLR_V  0x1
+#define USB_DEVICE_SERIAL_IN_EMPTY_INT_CLR_S  3
+/* USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt..*/
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_CLR    (BIT(2))
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_CLR_M  (BIT(2))
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_CLR_V  0x1
+#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_CLR_S  2
+/* USB_DEVICE_SOF_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_JTAG_SOF_INT interrupt..*/
+#define USB_DEVICE_SOF_INT_CLR    (BIT(1))
+#define USB_DEVICE_SOF_INT_CLR_M  (BIT(1))
+#define USB_DEVICE_SOF_INT_CLR_V  0x1
+#define USB_DEVICE_SOF_INT_CLR_S  1
+/* USB_DEVICE_JTAG_IN_FLUSH_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt..*/
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_CLR    (BIT(0))
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_CLR_M  (BIT(0))
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_CLR_V  0x1
+#define USB_DEVICE_JTAG_IN_FLUSH_INT_CLR_S  0
+
+#define USB_DEVICE_CONF0_REG          (DR_REG_USB_DEVICE_BASE + 0x18)
+/* USB_DEVICE_PHY_TX_EDGE_SEL : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: 0: TX output at clock negedge. 1: Tx output at clock posedge..*/
+#define USB_DEVICE_PHY_TX_EDGE_SEL    (BIT(15))
+#define USB_DEVICE_PHY_TX_EDGE_SEL_M  (BIT(15))
+#define USB_DEVICE_PHY_TX_EDGE_SEL_V  0x1
+#define USB_DEVICE_PHY_TX_EDGE_SEL_S  15
+/* USB_DEVICE_USB_PAD_ENABLE : R/W ;bitpos:[14] ;default: 1'b1 ; */
+/*description: Enable USB pad function..*/
+#define USB_DEVICE_USB_PAD_ENABLE    (BIT(14))
+#define USB_DEVICE_USB_PAD_ENABLE_M  (BIT(14))
+#define USB_DEVICE_USB_PAD_ENABLE_V  0x1
+#define USB_DEVICE_USB_PAD_ENABLE_S  14
+/* USB_DEVICE_PULLUP_VALUE : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: Control pull up value..*/
+#define USB_DEVICE_PULLUP_VALUE    (BIT(13))
+#define USB_DEVICE_PULLUP_VALUE_M  (BIT(13))
+#define USB_DEVICE_PULLUP_VALUE_V  0x1
+#define USB_DEVICE_PULLUP_VALUE_S  13
+/* USB_DEVICE_DM_PULLDOWN : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Control USB D- pull down..*/
+#define USB_DEVICE_DM_PULLDOWN    (BIT(12))
+#define USB_DEVICE_DM_PULLDOWN_M  (BIT(12))
+#define USB_DEVICE_DM_PULLDOWN_V  0x1
+#define USB_DEVICE_DM_PULLDOWN_S  12
+/* USB_DEVICE_DM_PULLUP : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: Control USB D- pull up..*/
+#define USB_DEVICE_DM_PULLUP    (BIT(11))
+#define USB_DEVICE_DM_PULLUP_M  (BIT(11))
+#define USB_DEVICE_DM_PULLUP_V  0x1
+#define USB_DEVICE_DM_PULLUP_S  11
+/* USB_DEVICE_DP_PULLDOWN : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: Control USB D+ pull down..*/
+#define USB_DEVICE_DP_PULLDOWN    (BIT(10))
+#define USB_DEVICE_DP_PULLDOWN_M  (BIT(10))
+#define USB_DEVICE_DP_PULLDOWN_V  0x1
+#define USB_DEVICE_DP_PULLDOWN_S  10
+/* USB_DEVICE_DP_PULLUP : R/W ;bitpos:[9] ;default: 1'b1 ; */
+/*description: Control USB D+ pull up..*/
+#define USB_DEVICE_DP_PULLUP    (BIT(9))
+#define USB_DEVICE_DP_PULLUP_M  (BIT(9))
+#define USB_DEVICE_DP_PULLUP_V  0x1
+#define USB_DEVICE_DP_PULLUP_S  9
+/* USB_DEVICE_PAD_PULL_OVERRIDE : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Enable software control USB D+ D- pullup pulldown.*/
+#define USB_DEVICE_PAD_PULL_OVERRIDE    (BIT(8))
+#define USB_DEVICE_PAD_PULL_OVERRIDE_M  (BIT(8))
+#define USB_DEVICE_PAD_PULL_OVERRIDE_V  0x1
+#define USB_DEVICE_PAD_PULL_OVERRIDE_S  8
+/* USB_DEVICE_VREF_OVERRIDE : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Enable software control input  threshold.*/
+#define USB_DEVICE_VREF_OVERRIDE    (BIT(7))
+#define USB_DEVICE_VREF_OVERRIDE_M  (BIT(7))
+#define USB_DEVICE_VREF_OVERRIDE_V  0x1
+#define USB_DEVICE_VREF_OVERRIDE_S  7
+/* USB_DEVICE_VREFL : R/W ;bitpos:[6:5] ;default: 2'b0 ; */
+/*description: Control single-end input low threshold,0.8V to 1.04V, step 80mV.*/
+#define USB_DEVICE_VREFL    0x00000003
+#define USB_DEVICE_VREFL_M  ((USB_DEVICE_VREFL_V)<<(USB_DEVICE_VREFL_S))
+#define USB_DEVICE_VREFL_V  0x3
+#define USB_DEVICE_VREFL_S  5
+/* USB_DEVICE_VREFH : R/W ;bitpos:[4:3] ;default: 2'b0 ; */
+/*description: Control single-end input high threshold,1.76V to 2V, step 80mV.*/
+#define USB_DEVICE_VREFH    0x00000003
+#define USB_DEVICE_VREFH_M  ((USB_DEVICE_VREFH_V)<<(USB_DEVICE_VREFH_S))
+#define USB_DEVICE_VREFH_V  0x3
+#define USB_DEVICE_VREFH_S  3
+/* USB_DEVICE_EXCHG_PINS : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: USB D+ D- exchange.*/
+#define USB_DEVICE_EXCHG_PINS    (BIT(2))
+#define USB_DEVICE_EXCHG_PINS_M  (BIT(2))
+#define USB_DEVICE_EXCHG_PINS_V  0x1
+#define USB_DEVICE_EXCHG_PINS_S  2
+/* USB_DEVICE_EXCHG_PINS_OVERRIDE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Enable software control USB D+ D- exchange.*/
+#define USB_DEVICE_EXCHG_PINS_OVERRIDE    (BIT(1))
+#define USB_DEVICE_EXCHG_PINS_OVERRIDE_M  (BIT(1))
+#define USB_DEVICE_EXCHG_PINS_OVERRIDE_V  0x1
+#define USB_DEVICE_EXCHG_PINS_OVERRIDE_S  1
+/* USB_DEVICE_PHY_SEL : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Select internal/external PHY.*/
+#define USB_DEVICE_PHY_SEL    (BIT(0))
+#define USB_DEVICE_PHY_SEL_M  (BIT(0))
+#define USB_DEVICE_PHY_SEL_V  0x1
+#define USB_DEVICE_PHY_SEL_S  0
+
+#define USB_DEVICE_TEST_REG          (DR_REG_USB_DEVICE_BASE + 0x1C)
+/* USB_DEVICE_TEST_RX_DM : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: USB D- rx value in test.*/
+#define USB_DEVICE_TEST_RX_DM    (BIT(6))
+#define USB_DEVICE_TEST_RX_DM_M  (BIT(6))
+#define USB_DEVICE_TEST_RX_DM_V  0x1
+#define USB_DEVICE_TEST_RX_DM_S  6
+/* USB_DEVICE_TEST_RX_DP : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: USB D+ rx value in test.*/
+#define USB_DEVICE_TEST_RX_DP    (BIT(5))
+#define USB_DEVICE_TEST_RX_DP_M  (BIT(5))
+#define USB_DEVICE_TEST_RX_DP_V  0x1
+#define USB_DEVICE_TEST_RX_DP_S  5
+/* USB_DEVICE_TEST_RX_RCV : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: USB differential rx value in test.*/
+#define USB_DEVICE_TEST_RX_RCV    (BIT(4))
+#define USB_DEVICE_TEST_RX_RCV_M  (BIT(4))
+#define USB_DEVICE_TEST_RX_RCV_V  0x1
+#define USB_DEVICE_TEST_RX_RCV_S  4
+/* USB_DEVICE_TEST_TX_DM : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: USB D- tx value in test.*/
+#define USB_DEVICE_TEST_TX_DM    (BIT(3))
+#define USB_DEVICE_TEST_TX_DM_M  (BIT(3))
+#define USB_DEVICE_TEST_TX_DM_V  0x1
+#define USB_DEVICE_TEST_TX_DM_S  3
+/* USB_DEVICE_TEST_TX_DP : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: USB D+ tx value in test.*/
+#define USB_DEVICE_TEST_TX_DP    (BIT(2))
+#define USB_DEVICE_TEST_TX_DP_M  (BIT(2))
+#define USB_DEVICE_TEST_TX_DP_V  0x1
+#define USB_DEVICE_TEST_TX_DP_S  2
+/* USB_DEVICE_TEST_USB_OE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: USB pad oen in test.*/
+#define USB_DEVICE_TEST_USB_OE    (BIT(1))
+#define USB_DEVICE_TEST_USB_OE_M  (BIT(1))
+#define USB_DEVICE_TEST_USB_OE_V  0x1
+#define USB_DEVICE_TEST_USB_OE_S  1
+/* USB_DEVICE_TEST_ENABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Enable test of the USB pad.*/
+#define USB_DEVICE_TEST_ENABLE    (BIT(0))
+#define USB_DEVICE_TEST_ENABLE_M  (BIT(0))
+#define USB_DEVICE_TEST_ENABLE_V  0x1
+#define USB_DEVICE_TEST_ENABLE_S  0
+
+#define USB_DEVICE_JFIFO_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x20)
+/* USB_DEVICE_OUT_FIFO_RESET : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Write 1 to reset JTAG out fifo..*/
+#define USB_DEVICE_OUT_FIFO_RESET    (BIT(9))
+#define USB_DEVICE_OUT_FIFO_RESET_M  (BIT(9))
+#define USB_DEVICE_OUT_FIFO_RESET_V  0x1
+#define USB_DEVICE_OUT_FIFO_RESET_S  9
+/* USB_DEVICE_IN_FIFO_RESET : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Write 1 to reset JTAG in fifo..*/
+#define USB_DEVICE_IN_FIFO_RESET    (BIT(8))
+#define USB_DEVICE_IN_FIFO_RESET_M  (BIT(8))
+#define USB_DEVICE_IN_FIFO_RESET_V  0x1
+#define USB_DEVICE_IN_FIFO_RESET_S  8
+/* USB_DEVICE_OUT_FIFO_FULL : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: 1: JTAG out fifo is full..*/
+#define USB_DEVICE_OUT_FIFO_FULL    (BIT(7))
+#define USB_DEVICE_OUT_FIFO_FULL_M  (BIT(7))
+#define USB_DEVICE_OUT_FIFO_FULL_V  0x1
+#define USB_DEVICE_OUT_FIFO_FULL_S  7
+/* USB_DEVICE_OUT_FIFO_EMPTY : RO ;bitpos:[6] ;default: 1'b1 ; */
+/*description: 1: JTAG out fifo is empty..*/
+#define USB_DEVICE_OUT_FIFO_EMPTY    (BIT(6))
+#define USB_DEVICE_OUT_FIFO_EMPTY_M  (BIT(6))
+#define USB_DEVICE_OUT_FIFO_EMPTY_V  0x1
+#define USB_DEVICE_OUT_FIFO_EMPTY_S  6
+/* USB_DEVICE_OUT_FIFO_CNT : RO ;bitpos:[5:4] ;default: 2'd0 ; */
+/*description: JTAT out fifo counter..*/
+#define USB_DEVICE_OUT_FIFO_CNT    0x00000003
+#define USB_DEVICE_OUT_FIFO_CNT_M  ((USB_DEVICE_OUT_FIFO_CNT_V)<<(USB_DEVICE_OUT_FIFO_CNT_S))
+#define USB_DEVICE_OUT_FIFO_CNT_V  0x3
+#define USB_DEVICE_OUT_FIFO_CNT_S  4
+/* USB_DEVICE_IN_FIFO_FULL : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: 1: JTAG in fifo is full..*/
+#define USB_DEVICE_IN_FIFO_FULL    (BIT(3))
+#define USB_DEVICE_IN_FIFO_FULL_M  (BIT(3))
+#define USB_DEVICE_IN_FIFO_FULL_V  0x1
+#define USB_DEVICE_IN_FIFO_FULL_S  3
+/* USB_DEVICE_IN_FIFO_EMPTY : RO ;bitpos:[2] ;default: 1'b1 ; */
+/*description: 1: JTAG in fifo is empty..*/
+#define USB_DEVICE_IN_FIFO_EMPTY    (BIT(2))
+#define USB_DEVICE_IN_FIFO_EMPTY_M  (BIT(2))
+#define USB_DEVICE_IN_FIFO_EMPTY_V  0x1
+#define USB_DEVICE_IN_FIFO_EMPTY_S  2
+/* USB_DEVICE_IN_FIFO_CNT : RO ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: JTAT in fifo counter..*/
+#define USB_DEVICE_IN_FIFO_CNT    0x00000003
+#define USB_DEVICE_IN_FIFO_CNT_M  ((USB_DEVICE_IN_FIFO_CNT_V)<<(USB_DEVICE_IN_FIFO_CNT_S))
+#define USB_DEVICE_IN_FIFO_CNT_V  0x3
+#define USB_DEVICE_IN_FIFO_CNT_S  0
+
+#define USB_DEVICE_FRAM_NUM_REG          (DR_REG_USB_DEVICE_BASE + 0x24)
+/* USB_DEVICE_SOF_FRAME_INDEX : RO ;bitpos:[10:0] ;default: 11'd0 ; */
+/*description: Frame index of received SOF frame..*/
+#define USB_DEVICE_SOF_FRAME_INDEX    0x000007FF
+#define USB_DEVICE_SOF_FRAME_INDEX_M  ((USB_DEVICE_SOF_FRAME_INDEX_V)<<(USB_DEVICE_SOF_FRAME_INDEX_S))
+#define USB_DEVICE_SOF_FRAME_INDEX_V  0x7FF
+#define USB_DEVICE_SOF_FRAME_INDEX_S  0
+
+#define USB_DEVICE_IN_EP0_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x28)
+/* USB_DEVICE_IN_EP0_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of IN endpoint 0..*/
+#define USB_DEVICE_IN_EP0_RD_ADDR    0x0000007F
+#define USB_DEVICE_IN_EP0_RD_ADDR_M  ((USB_DEVICE_IN_EP0_RD_ADDR_V)<<(USB_DEVICE_IN_EP0_RD_ADDR_S))
+#define USB_DEVICE_IN_EP0_RD_ADDR_V  0x7F
+#define USB_DEVICE_IN_EP0_RD_ADDR_S  9
+/* USB_DEVICE_IN_EP0_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of IN endpoint 0..*/
+#define USB_DEVICE_IN_EP0_WR_ADDR    0x0000007F
+#define USB_DEVICE_IN_EP0_WR_ADDR_M  ((USB_DEVICE_IN_EP0_WR_ADDR_V)<<(USB_DEVICE_IN_EP0_WR_ADDR_S))
+#define USB_DEVICE_IN_EP0_WR_ADDR_V  0x7F
+#define USB_DEVICE_IN_EP0_WR_ADDR_S  2
+/* USB_DEVICE_IN_EP0_STATE : RO ;bitpos:[1:0] ;default: 2'b1 ; */
+/*description: State of IN Endpoint 0..*/
+#define USB_DEVICE_IN_EP0_STATE    0x00000003
+#define USB_DEVICE_IN_EP0_STATE_M  ((USB_DEVICE_IN_EP0_STATE_V)<<(USB_DEVICE_IN_EP0_STATE_S))
+#define USB_DEVICE_IN_EP0_STATE_V  0x3
+#define USB_DEVICE_IN_EP0_STATE_S  0
+
+#define USB_DEVICE_IN_EP1_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x2C)
+/* USB_DEVICE_IN_EP1_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of IN endpoint 1..*/
+#define USB_DEVICE_IN_EP1_RD_ADDR    0x0000007F
+#define USB_DEVICE_IN_EP1_RD_ADDR_M  ((USB_DEVICE_IN_EP1_RD_ADDR_V)<<(USB_DEVICE_IN_EP1_RD_ADDR_S))
+#define USB_DEVICE_IN_EP1_RD_ADDR_V  0x7F
+#define USB_DEVICE_IN_EP1_RD_ADDR_S  9
+/* USB_DEVICE_IN_EP1_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of IN endpoint 1..*/
+#define USB_DEVICE_IN_EP1_WR_ADDR    0x0000007F
+#define USB_DEVICE_IN_EP1_WR_ADDR_M  ((USB_DEVICE_IN_EP1_WR_ADDR_V)<<(USB_DEVICE_IN_EP1_WR_ADDR_S))
+#define USB_DEVICE_IN_EP1_WR_ADDR_V  0x7F
+#define USB_DEVICE_IN_EP1_WR_ADDR_S  2
+/* USB_DEVICE_IN_EP1_STATE : RO ;bitpos:[1:0] ;default: 2'b1 ; */
+/*description: State of IN Endpoint 1..*/
+#define USB_DEVICE_IN_EP1_STATE    0x00000003
+#define USB_DEVICE_IN_EP1_STATE_M  ((USB_DEVICE_IN_EP1_STATE_V)<<(USB_DEVICE_IN_EP1_STATE_S))
+#define USB_DEVICE_IN_EP1_STATE_V  0x3
+#define USB_DEVICE_IN_EP1_STATE_S  0
+
+#define USB_DEVICE_IN_EP2_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x30)
+/* USB_DEVICE_IN_EP2_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of IN endpoint 2..*/
+#define USB_DEVICE_IN_EP2_RD_ADDR    0x0000007F
+#define USB_DEVICE_IN_EP2_RD_ADDR_M  ((USB_DEVICE_IN_EP2_RD_ADDR_V)<<(USB_DEVICE_IN_EP2_RD_ADDR_S))
+#define USB_DEVICE_IN_EP2_RD_ADDR_V  0x7F
+#define USB_DEVICE_IN_EP2_RD_ADDR_S  9
+/* USB_DEVICE_IN_EP2_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of IN endpoint 2..*/
+#define USB_DEVICE_IN_EP2_WR_ADDR    0x0000007F
+#define USB_DEVICE_IN_EP2_WR_ADDR_M  ((USB_DEVICE_IN_EP2_WR_ADDR_V)<<(USB_DEVICE_IN_EP2_WR_ADDR_S))
+#define USB_DEVICE_IN_EP2_WR_ADDR_V  0x7F
+#define USB_DEVICE_IN_EP2_WR_ADDR_S  2
+/* USB_DEVICE_IN_EP2_STATE : RO ;bitpos:[1:0] ;default: 2'b1 ; */
+/*description: State of IN Endpoint 2..*/
+#define USB_DEVICE_IN_EP2_STATE    0x00000003
+#define USB_DEVICE_IN_EP2_STATE_M  ((USB_DEVICE_IN_EP2_STATE_V)<<(USB_DEVICE_IN_EP2_STATE_S))
+#define USB_DEVICE_IN_EP2_STATE_V  0x3
+#define USB_DEVICE_IN_EP2_STATE_S  0
+
+#define USB_DEVICE_IN_EP3_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x34)
+/* USB_DEVICE_IN_EP3_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of IN endpoint 3..*/
+#define USB_DEVICE_IN_EP3_RD_ADDR    0x0000007F
+#define USB_DEVICE_IN_EP3_RD_ADDR_M  ((USB_DEVICE_IN_EP3_RD_ADDR_V)<<(USB_DEVICE_IN_EP3_RD_ADDR_S))
+#define USB_DEVICE_IN_EP3_RD_ADDR_V  0x7F
+#define USB_DEVICE_IN_EP3_RD_ADDR_S  9
+/* USB_DEVICE_IN_EP3_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of IN endpoint 3..*/
+#define USB_DEVICE_IN_EP3_WR_ADDR    0x0000007F
+#define USB_DEVICE_IN_EP3_WR_ADDR_M  ((USB_DEVICE_IN_EP3_WR_ADDR_V)<<(USB_DEVICE_IN_EP3_WR_ADDR_S))
+#define USB_DEVICE_IN_EP3_WR_ADDR_V  0x7F
+#define USB_DEVICE_IN_EP3_WR_ADDR_S  2
+/* USB_DEVICE_IN_EP3_STATE : RO ;bitpos:[1:0] ;default: 2'b1 ; */
+/*description: State of IN Endpoint 3..*/
+#define USB_DEVICE_IN_EP3_STATE    0x00000003
+#define USB_DEVICE_IN_EP3_STATE_M  ((USB_DEVICE_IN_EP3_STATE_V)<<(USB_DEVICE_IN_EP3_STATE_S))
+#define USB_DEVICE_IN_EP3_STATE_V  0x3
+#define USB_DEVICE_IN_EP3_STATE_S  0
+
+#define USB_DEVICE_OUT_EP0_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x38)
+/* USB_DEVICE_OUT_EP0_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of OUT endpoint 0..*/
+#define USB_DEVICE_OUT_EP0_RD_ADDR    0x0000007F
+#define USB_DEVICE_OUT_EP0_RD_ADDR_M  ((USB_DEVICE_OUT_EP0_RD_ADDR_V)<<(USB_DEVICE_OUT_EP0_RD_ADDR_S))
+#define USB_DEVICE_OUT_EP0_RD_ADDR_V  0x7F
+#define USB_DEVICE_OUT_EP0_RD_ADDR_S  9
+/* USB_DEVICE_OUT_EP0_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of OUT endpoint 0. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is
+ detected, there are USB_DEVICE_OUT_EP0_WR_ADDR-2 bytes data in OUT EP0..*/
+#define USB_DEVICE_OUT_EP0_WR_ADDR    0x0000007F
+#define USB_DEVICE_OUT_EP0_WR_ADDR_M  ((USB_DEVICE_OUT_EP0_WR_ADDR_V)<<(USB_DEVICE_OUT_EP0_WR_ADDR_S))
+#define USB_DEVICE_OUT_EP0_WR_ADDR_V  0x7F
+#define USB_DEVICE_OUT_EP0_WR_ADDR_S  2
+/* USB_DEVICE_OUT_EP0_STATE : RO ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: State of OUT Endpoint 0..*/
+#define USB_DEVICE_OUT_EP0_STATE    0x00000003
+#define USB_DEVICE_OUT_EP0_STATE_M  ((USB_DEVICE_OUT_EP0_STATE_V)<<(USB_DEVICE_OUT_EP0_STATE_S))
+#define USB_DEVICE_OUT_EP0_STATE_V  0x3
+#define USB_DEVICE_OUT_EP0_STATE_S  0
+
+#define USB_DEVICE_OUT_EP1_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x3C)
+/* USB_DEVICE_OUT_EP1_REC_DATA_CNT : RO ;bitpos:[22:16] ;default: 7'd0 ; */
+/*description: Data count in OUT endpoint 1 when one packet is received..*/
+#define USB_DEVICE_OUT_EP1_REC_DATA_CNT    0x0000007F
+#define USB_DEVICE_OUT_EP1_REC_DATA_CNT_M  ((USB_DEVICE_OUT_EP1_REC_DATA_CNT_V)<<(USB_DEVICE_OUT_EP1_REC_DATA_CNT_S))
+#define USB_DEVICE_OUT_EP1_REC_DATA_CNT_V  0x7F
+#define USB_DEVICE_OUT_EP1_REC_DATA_CNT_S  16
+/* USB_DEVICE_OUT_EP1_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of OUT endpoint 1..*/
+#define USB_DEVICE_OUT_EP1_RD_ADDR    0x0000007F
+#define USB_DEVICE_OUT_EP1_RD_ADDR_M  ((USB_DEVICE_OUT_EP1_RD_ADDR_V)<<(USB_DEVICE_OUT_EP1_RD_ADDR_S))
+#define USB_DEVICE_OUT_EP1_RD_ADDR_V  0x7F
+#define USB_DEVICE_OUT_EP1_RD_ADDR_S  9
+/* USB_DEVICE_OUT_EP1_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of OUT endpoint 1. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is
+ detected, there are USB_DEVICE_OUT_EP1_WR_ADDR-2 bytes data in OUT EP1..*/
+#define USB_DEVICE_OUT_EP1_WR_ADDR    0x0000007F
+#define USB_DEVICE_OUT_EP1_WR_ADDR_M  ((USB_DEVICE_OUT_EP1_WR_ADDR_V)<<(USB_DEVICE_OUT_EP1_WR_ADDR_S))
+#define USB_DEVICE_OUT_EP1_WR_ADDR_V  0x7F
+#define USB_DEVICE_OUT_EP1_WR_ADDR_S  2
+/* USB_DEVICE_OUT_EP1_STATE : RO ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: State of OUT Endpoint 1..*/
+#define USB_DEVICE_OUT_EP1_STATE    0x00000003
+#define USB_DEVICE_OUT_EP1_STATE_M  ((USB_DEVICE_OUT_EP1_STATE_V)<<(USB_DEVICE_OUT_EP1_STATE_S))
+#define USB_DEVICE_OUT_EP1_STATE_V  0x3
+#define USB_DEVICE_OUT_EP1_STATE_S  0
+
+#define USB_DEVICE_OUT_EP2_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x40)
+/* USB_DEVICE_OUT_EP2_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of OUT endpoint 2..*/
+#define USB_DEVICE_OUT_EP2_RD_ADDR    0x0000007F
+#define USB_DEVICE_OUT_EP2_RD_ADDR_M  ((USB_DEVICE_OUT_EP2_RD_ADDR_V)<<(USB_DEVICE_OUT_EP2_RD_ADDR_S))
+#define USB_DEVICE_OUT_EP2_RD_ADDR_V  0x7F
+#define USB_DEVICE_OUT_EP2_RD_ADDR_S  9
+/* USB_DEVICE_OUT_EP2_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of OUT endpoint 2. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is
+ detected, there are USB_DEVICE_OUT_EP2_WR_ADDR-2 bytes data in OUT EP2..*/
+#define USB_DEVICE_OUT_EP2_WR_ADDR    0x0000007F
+#define USB_DEVICE_OUT_EP2_WR_ADDR_M  ((USB_DEVICE_OUT_EP2_WR_ADDR_V)<<(USB_DEVICE_OUT_EP2_WR_ADDR_S))
+#define USB_DEVICE_OUT_EP2_WR_ADDR_V  0x7F
+#define USB_DEVICE_OUT_EP2_WR_ADDR_S  2
+/* USB_DEVICE_OUT_EP2_STATE : RO ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: State of OUT Endpoint 2..*/
+#define USB_DEVICE_OUT_EP2_STATE    0x00000003
+#define USB_DEVICE_OUT_EP2_STATE_M  ((USB_DEVICE_OUT_EP2_STATE_V)<<(USB_DEVICE_OUT_EP2_STATE_S))
+#define USB_DEVICE_OUT_EP2_STATE_V  0x3
+#define USB_DEVICE_OUT_EP2_STATE_S  0
+
+#define USB_DEVICE_MISC_CONF_REG          (DR_REG_USB_DEVICE_BASE + 0x44)
+/* USB_DEVICE_CLK_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: 1'h1: Force clock on for register. 1'h0: Support clock only when application wri
+tes registers..*/
+#define USB_DEVICE_CLK_EN    (BIT(0))
+#define USB_DEVICE_CLK_EN_M  (BIT(0))
+#define USB_DEVICE_CLK_EN_V  0x1
+#define USB_DEVICE_CLK_EN_S  0
+
+#define USB_DEVICE_MEM_CONF_REG          (DR_REG_USB_DEVICE_BASE + 0x48)
+/* USB_DEVICE_USB_MEM_CLK_EN : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: 1: Force clock on for usb memory..*/
+#define USB_DEVICE_USB_MEM_CLK_EN    (BIT(1))
+#define USB_DEVICE_USB_MEM_CLK_EN_M  (BIT(1))
+#define USB_DEVICE_USB_MEM_CLK_EN_V  0x1
+#define USB_DEVICE_USB_MEM_CLK_EN_S  1
+/* USB_DEVICE_USB_MEM_PD : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: 1: power down usb memory..*/
+#define USB_DEVICE_USB_MEM_PD    (BIT(0))
+#define USB_DEVICE_USB_MEM_PD_M  (BIT(0))
+#define USB_DEVICE_USB_MEM_PD_V  0x1
+#define USB_DEVICE_USB_MEM_PD_S  0
+
+#define USB_DEVICE_DATE_REG          (DR_REG_USB_DEVICE_BASE + 0x80)
+/* USB_DEVICE_DATE : R/W ;bitpos:[31:0] ;default: 32'h2011190 ; */
+/*description: register version..*/
+#define USB_DEVICE_DATE    0xFFFFFFFF
+#define USB_DEVICE_DATE_M  ((USB_DEVICE_DATE_V)<<(USB_DEVICE_DATE_S))
+#define USB_DEVICE_DATE_V  0xFFFFFFFF
+#define USB_DEVICE_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_USB_DEVICE_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_pins.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_pins.h
new file mode 100644
index 00000000000..c8ad806e083
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_pins.h
@@ -0,0 +1,27 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/* GPIOs used to connect an external USB PHY */
+#define USBPHY_VP_NUM 33
+#define USBPHY_VM_NUM 34
+#define USBPHY_RCV_NUM 35
+#define USBPHY_OEN_NUM 36
+#define USBPHY_VPO_NUM 37
+#define USBPHY_VMO_NUM 38
+
+/* GPIOs corresponding to the pads of the internal USB PHY */
+#define USBPHY_DP_NUM 20
+#define USBPHY_DM_NUM 19
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_reg.h
new file mode 100644
index 00000000000..db5087600e0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_reg.h
@@ -0,0 +1,10460 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Control/Status registers */
+/** USB_GOTGCTL_REG register
+ *  OTG Control and Status Register
+ */
+#define USB_GOTGCTL_REG (SOC_DPORT_USB_BASE + 0x0)
+/** USB_SESREQSCS : RO; bitpos: [0]; default: 0;
+ *  Session Request Success.The core sets this bit when a session request initiation is
+ *  successful
+ */
+#define USB_SESREQSCS    (BIT(0))
+#define USB_SESREQSCS_M  (USB_SESREQSCS_V << USB_SESREQSCS_S)
+#define USB_SESREQSCS_V  0x00000001
+#define USB_SESREQSCS_S  0
+/** USB_SESREQ : R/W; bitpos: [1]; default: 0;
+ *  Session Request.The application sets this bit to initiate a session request on the
+ *  USB. The application can clear this bit by writing a 0 when the Host Negotiation
+ *  Success Status Change bit in the OTG Interrupt register
+ *  (GOTGINT_REG.USB_HSTNEGSUCSTSCHNG) is SET. The core clears this bit when the
+ *  USB_HSTNEGSUCSTSCHNG bit is cleared
+ */
+#define USB_SESREQ    (BIT(1))
+#define USB_SESREQ_M  (USB_SESREQ_V << USB_SESREQ_S)
+#define USB_SESREQ_V  0x00000001
+#define USB_SESREQ_S  1
+/** USB_VBVALIDOVEN : R/W; bitpos: [2]; default: 0;
+ *  VBUS Valid Override Enable
+ *  1'b1 : Internally Bvalid received from the PHY is overridden with
+ *  GOTGCTL_REG.REG_VBVALIDOVVAl
+ *  1'b0 : Override is disabled and bvalid signal from the respective PHY selected is
+ *  used internally by the controller
+ */
+#define USB_VBVALIDOVEN    (BIT(2))
+#define USB_VBVALIDOVEN_M  (USB_VBVALIDOVEN_V << USB_VBVALIDOVEN_S)
+#define USB_VBVALIDOVEN_V  0x00000001
+#define USB_VBVALIDOVEN_S  2
+/** USB_VBVALIDOVVAL : R/W; bitpos: [3]; default: 0;
+ *  VBUS Valid OverrideValue
+ *  1'b0 : vbusvalid value is 1'b0 when GOTGCTL_REG.USB_VBVALIDOVEN =1
+ *  1'b1 : vbusvalid value is 1'b1 when GOTGCTL_REG.USB_VBVALIDOVEN =1
+ */
+#define USB_VBVALIDOVVAL    (BIT(3))
+#define USB_VBVALIDOVVAL_M  (USB_VBVALIDOVVAL_V << USB_VBVALIDOVVAL_S)
+#define USB_VBVALIDOVVAL_V  0x00000001
+#define USB_VBVALIDOVVAL_S  3
+/** USB_AVALIDOVEN : R/W; bitpos: [4]; default: 0;
+ *  This bit is used to enable/disable the software to override the Avalid signal using
+ *  the GOTGCTL.AVALIDOVVAL
+ *  1'b1: Internally Avalid received from the PHY is overridden with
+ *  GOTGCTL_REG.REG_AVALIDOVVAL
+ *  1'b0: Override is disabled and avalid signal from the respective PHY selected is
+ *  used internally by the core
+ */
+#define USB_AVALIDOVEN    (BIT(4))
+#define USB_AVALIDOVEN_M  (USB_AVALIDOVEN_V << USB_AVALIDOVEN_S)
+#define USB_AVALIDOVEN_V  0x00000001
+#define USB_AVALIDOVEN_S  4
+/** USB_AVALIDOVVAL : R/W; bitpos: [5]; default: 0;
+ *  A-Peripheral Session Valid OverrideValue
+ *  1'b0 : Avalid value is 1'b0 when GOTGCTL_REG.USB_AVALIDOVEN =1
+ *  1'b1 : Avalid value is 1'b1 when GOTGCTL_REG.USB_AVALIDOVEN =1
+ */
+#define USB_AVALIDOVVAL    (BIT(5))
+#define USB_AVALIDOVVAL_M  (USB_AVALIDOVVAL_V << USB_AVALIDOVVAL_S)
+#define USB_AVALIDOVVAL_V  0x00000001
+#define USB_AVALIDOVVAL_S  5
+/** USB_BVALIDOVEN : R/W; bitpos: [6]; default: 0;
+ *  This bit is used to enable/disable the software to override the Bvalid signal using
+ *  the GOTGCTLREG.BVALIDOVVAL
+ *  1'b1 : Internally Bvalid received from the PHY is overridden with
+ *  GOTGCTL_REG.USB_BVALIDOVVAL
+ *  1'b0 : Override is disabled and bvalid signal from the respective PHY selected is
+ *  used internally by the force
+ */
+#define USB_BVALIDOVEN    (BIT(6))
+#define USB_BVALIDOVEN_M  (USB_BVALIDOVEN_V << USB_BVALIDOVEN_S)
+#define USB_BVALIDOVEN_V  0x00000001
+#define USB_BVALIDOVEN_S  6
+/** USB_BVALIDOVVAL : R/W; bitpos: [7]; default: 0;
+ *  B-Peripheral Session Valid OverrideValue
+ *  1'b0 : Bvalid value is 1'b0 when GOTGCTL_REG.USB_BVALIDOVEN =1
+ *  1'b1 : Bvalid value is 1'b1 when GOTGCTL_REG.USB_BVALIDOVEN =1
+ */
+#define USB_BVALIDOVVAL    (BIT(7))
+#define USB_BVALIDOVVAL_M  (USB_BVALIDOVVAL_V << USB_BVALIDOVVAL_S)
+#define USB_BVALIDOVVAL_V  0x00000001
+#define USB_BVALIDOVVAL_S  7
+/** USB_HSTNEGSCS : RO; bitpos: [8]; default: 0;
+ *  Host Negotiation Success.The controller sets this bit when host negotiation is
+ *  successful. The controller clears this bit when the HNP Request (HNPReq) bit in
+ *  this register is set.
+ */
+#define USB_HSTNEGSCS    (BIT(8))
+#define USB_HSTNEGSCS_M  (USB_HSTNEGSCS_V << USB_HSTNEGSCS_S)
+#define USB_HSTNEGSCS_V  0x00000001
+#define USB_HSTNEGSCS_S  8
+/** USB_HNPREQ : R/W; bitpos: [9]; default: 0;
+ *  HNP Request .The application sets this bit to initiate an HNP request to the
+ *  Connected USB host. The application can clear this bit by writing a 0 when the Host
+ *  Negotiation Success Status Change bit in the OTG Interrupt register
+ *  (GOTGINT_REG.HSTNEGSUCSTSCHNG) is SET. The controller clears this bit when the
+ *  HSTNEGSUCSTSCHNG bit is cleared.
+ */
+#define USB_HNPREQ    (BIT(9))
+#define USB_HNPREQ_M  (USB_HNPREQ_V << USB_HNPREQ_S)
+#define USB_HNPREQ_V  0x00000001
+#define USB_HNPREQ_S  9
+/** USB_HSTSETHNPEN : R/W; bitpos: [10]; default: 0;
+ *  Host Set HNP Enable.The application sets this bit when it has successfully enabled
+ *  HNP (using the SetFeature.SetHNPEnable command) on the connected device
+ *  1'b0: Host Set HNP is not enabled
+ *  1'b1: Host Set HNP is enabled
+ */
+#define USB_HSTSETHNPEN    (BIT(10))
+#define USB_HSTSETHNPEN_M  (USB_HSTSETHNPEN_V << USB_HSTSETHNPEN_S)
+#define USB_HSTSETHNPEN_V  0x00000001
+#define USB_HSTSETHNPEN_S  10
+/** USB_DEVHNPEN : R/W; bitpos: [11]; default: 0;
+ *  Device HNP Enabled.The application sets this bit when it successfully receives a
+ *  SetFeature.SetHNPEnable command from the connected USB host
+ *  1'b0: HNP is not enabled in the application
+ *  1'b1: HNP is enabled in the application
+ */
+#define USB_DEVHNPEN    (BIT(11))
+#define USB_DEVHNPEN_M  (USB_DEVHNPEN_V << USB_DEVHNPEN_S)
+#define USB_DEVHNPEN_V  0x00000001
+#define USB_DEVHNPEN_S  11
+/** USB_EHEN : R/W; bitpos: [12]; default: 0;
+ *  Embedded Host Enable.It is used to select between OTG A Device state Machine and
+ *  Embedded Host state machine
+ *  1'b0: OTG A Device state machine is selected
+ *  1'b1: Embedded Host State Machine is selected
+ */
+#define USB_EHEN    (BIT(12))
+#define USB_EHEN_M  (USB_EHEN_V << USB_EHEN_S)
+#define USB_EHEN_V  0x00000001
+#define USB_EHEN_S  12
+/** USB_DBNCEFLTRBYPASS : R/W; bitpos: [15]; default: 0;
+ *  Bypass Debounce filters for avalid, bvalid, vbusvalid, sessend, iddig signals when
+ *  enabled
+ *  1'b0: Disabled
+ *  1'b1: Enabled
+ */
+#define USB_DBNCEFLTRBYPASS    (BIT(15))
+#define USB_DBNCEFLTRBYPASS_M  (USB_DBNCEFLTRBYPASS_V << USB_DBNCEFLTRBYPASS_S)
+#define USB_DBNCEFLTRBYPASS_V  0x00000001
+#define USB_DBNCEFLTRBYPASS_S  15
+/** USB_CONIDSTS : RO; bitpos: [16]; default: 0;
+ *  Connector ID Status. Indicates the connector ID status on a connect event
+ *  1'b0: The core is in A-Device mode
+ *  1'b1: The core is in B-Device mode
+ */
+#define USB_CONIDSTS    (BIT(16))
+#define USB_CONIDSTS_M  (USB_CONIDSTS_V << USB_CONIDSTS_S)
+#define USB_CONIDSTS_V  0x00000001
+#define USB_CONIDSTS_S  16
+/** USB_DBNCTIME : RO; bitpos: [17]; default: 0;
+ *  Long/Short Debounce Time. Indicates the debounce time of a detected connection
+ *  1'b0: Long debounce time, used for physical connections (100ms + 2.5 micro-sec)
+ *  1'b1: Short debounce time, used for soft connections (2.5 micro-sec)
+ */
+#define USB_DBNCTIME    (BIT(17))
+#define USB_DBNCTIME_M  (USB_DBNCTIME_V << USB_DBNCTIME_S)
+#define USB_DBNCTIME_V  0x00000001
+#define USB_DBNCTIME_S  17
+/** USB_ASESVLD : RO; bitpos: [18]; default: 0;
+ *  A-Session Valid. Indicates the Host mode transceiver status
+ *  1'b0: A-session is not valid
+ *  1'b1: A-session is valid
+ */
+#define USB_ASESVLD    (BIT(18))
+#define USB_ASESVLD_M  (USB_ASESVLD_V << USB_ASESVLD_S)
+#define USB_ASESVLD_V  0x00000001
+#define USB_ASESVLD_S  18
+/** USB_BSESVLD : RO; bitpos: [19]; default: 0;
+ *  B-Session Valid.Indicates the Device mode transceiver status
+ *  1'b0: B-session is not valid
+ *  1'b1: B-session is valid
+ */
+#define USB_BSESVLD    (BIT(19))
+#define USB_BSESVLD_M  (USB_BSESVLD_V << USB_BSESVLD_S)
+#define USB_BSESVLD_V  0x00000001
+#define USB_BSESVLD_S  19
+/** USB_OTGVER : R/W; bitpos: [20]; default: 0;
+ *  OTG Version
+ *  1'b0:Supports OTG Version 1.3
+ *  1'b1:Supports OTG Version 2.0
+ */
+#define USB_OTGVER    (BIT(20))
+#define USB_OTGVER_M  (USB_OTGVER_V << USB_OTGVER_S)
+#define USB_OTGVER_V  0x00000001
+#define USB_OTGVER_S  20
+/** USB_CURMOD : RO; bitpos: [21]; default: 0;
+ *  Current Mode of Operation
+ *  1'b0: Device mode
+ *  1'b1:Host mode
+ */
+#define USB_CURMOD    (BIT(21))
+#define USB_CURMOD_M  (USB_CURMOD_V << USB_CURMOD_S)
+#define USB_CURMOD_V  0x00000001
+#define USB_CURMOD_S  21
+
+
+/** USB_GDFIFOCFG_REG register
+ *  Global DFIFO Configuration Register
+ */
+#define USB_GDFIFOCFG_REG (SOC_DPORT_USB_BASE + 0x5c)
+/** USB_GDFIFOCFG : R/W; bitpos: [16:0]; default: 0;
+ *  GDFIFOCfg
+ */
+#define USB_GDFIFOCFG    0x0000FFFF
+#define USB_GDFIFOCFG_M  (USB_GDFIFOCFG_V << USB_GDFIFOCFG_S)
+#define USB_GDFIFOCFG_V  0x0000FFFF
+#define USB_GDFIFOCFG_S  0
+/** USB_EPINFOBASEADDR : R/W; bitpos: [32:16]; default: 0;
+ *  EPInfoBaseAddr
+ */
+#define USB_EPINFOBASEADDR    0x0000FFFF
+#define USB_EPINFOBASEADDR_M  (USB_EPINFOBASEADDR_V << USB_EPINFOBASEADDR_S)
+#define USB_EPINFOBASEADDR_V  0x0000FFFF
+#define USB_EPINFOBASEADDR_S  16
+
+
+/** USB_HPTXFSIZ_REG register
+ *  Host Periodic Transmit FIFO Size Register
+ */
+#define USB_HPTXFSIZ_REG (SOC_DPORT_USB_BASE + 0x100)
+/** USB_PTXFSTADDR : R/W; bitpos: [16:0]; default: 512;
+ *  Host Periodic TxFIFO Start Address.
+ */
+#define USB_PTXFSTADDR    0x0000FFFF
+#define USB_PTXFSTADDR_M  (USB_PTXFSTADDR_V << USB_PTXFSTADDR_S)
+#define USB_PTXFSTADDR_V  0x0000FFFF
+#define USB_PTXFSTADDR_S  0
+/** USB_PTXFSIZE : R/W; bitpos: [32:16]; default: 4096;
+ *  Host Periodic TxFIFO Depth,This value is in terms of 32-bit words..
+ */
+#define USB_PTXFSIZE    0x0000FFFF
+#define USB_PTXFSIZE_M  (USB_PTXFSIZE_V << USB_PTXFSIZE_S)
+#define USB_PTXFSIZE_V  0x0000FFFF
+#define USB_PTXFSIZE_S  16
+
+
+/** USB_DIEPTXF1_REG register
+ *  Device IN Endpoint Transmit FIFO Size Register
+ */
+#define USB_DIEPTXF1_REG (SOC_DPORT_USB_BASE + 0x104)
+/** USB_INEP1TXFSTADDR : R/W; bitpos: [16:0]; default: 512;
+ *  IN Endpoint FIFOn Transmit RAM Start Address.
+ */
+#define USB_INEP1TXFSTADDR    0x0000FFFF
+#define USB_INEP1TXFSTADDR_M  (USB_INEP1TXFSTADDR_V << USB_INEP1TXFSTADDR_S)
+#define USB_INEP1TXFSTADDR_V  0x0000FFFF
+#define USB_INEP1TXFSTADDR_S  0
+/** USB_INEP1TXFDEP : R/W; bitpos: [32:16]; default: 4096;
+ *  IN Endpoint TxFIFO Depth
+ */
+#define USB_INEP1TXFDEP    0x0000FFFF
+#define USB_INEP1TXFDEP_M  (USB_INEP1TXFDEP_V << USB_INEP1TXFDEP_S)
+#define USB_INEP1TXFDEP_V  0x0000FFFF
+#define USB_INEP1TXFDEP_S  16
+
+
+/** USB_DIEPTXF2_REG register
+ *  Device IN Endpoint Transmit FIFO Size Register
+ */
+#define USB_DIEPTXF2_REG (SOC_DPORT_USB_BASE + 0x108)
+/** USB_INEP2TXFSTADDR : R/W; bitpos: [16:0]; default: 512;
+ *  IN Endpoint FIFOn Transmit RAM Start Address.
+ */
+#define USB_INEP2TXFSTADDR    0x0000FFFF
+#define USB_INEP2TXFSTADDR_M  (USB_INEP2TXFSTADDR_V << USB_INEP2TXFSTADDR_S)
+#define USB_INEP2TXFSTADDR_V  0x0000FFFF
+#define USB_INEP2TXFSTADDR_S  0
+/** USB_INEP2TXFDEP : R/W; bitpos: [32:16]; default: 4096;
+ *  IN Endpoint TxFIFO Depth
+ */
+#define USB_INEP2TXFDEP    0x0000FFFF
+#define USB_INEP2TXFDEP_M  (USB_INEP2TXFDEP_V << USB_INEP2TXFDEP_S)
+#define USB_INEP2TXFDEP_V  0x0000FFFF
+#define USB_INEP2TXFDEP_S  16
+
+
+/** USB_DIEPTXF3_REG register
+ *  Device IN Endpoint Transmit FIFO Size Register
+ */
+#define USB_DIEPTXF3_REG (SOC_DPORT_USB_BASE + 0x10c)
+/** USB_INEP3TXFSTADDR : R/W; bitpos: [16:0]; default: 512;
+ *  IN Endpoint FIFOn Transmit RAM Start Address.
+ */
+#define USB_INEP3TXFSTADDR    0x0000FFFF
+#define USB_INEP3TXFSTADDR_M  (USB_INEP3TXFSTADDR_V << USB_INEP3TXFSTADDR_S)
+#define USB_INEP3TXFSTADDR_V  0x0000FFFF
+#define USB_INEP3TXFSTADDR_S  0
+/** USB_INEP3TXFDEP : R/W; bitpos: [32:16]; default: 4096;
+ *  IN Endpoint TxFIFO Depth
+ */
+#define USB_INEP3TXFDEP    0x0000FFFF
+#define USB_INEP3TXFDEP_M  (USB_INEP3TXFDEP_V << USB_INEP3TXFDEP_S)
+#define USB_INEP3TXFDEP_V  0x0000FFFF
+#define USB_INEP3TXFDEP_S  16
+
+
+/** USB_DIEPTXF4_REG register
+ *  Device IN Endpoint Transmit FIFO Size Register
+ */
+#define USB_DIEPTXF4_REG (SOC_DPORT_USB_BASE + 0x110)
+/** USB_INEP4TXFSTADDR : R/W; bitpos: [16:0]; default: 512;
+ *  IN Endpoint FIFOn Transmit RAM Start Address.
+ */
+#define USB_INEP4TXFSTADDR    0x0000FFFF
+#define USB_INEP4TXFSTADDR_M  (USB_INEP4TXFSTADDR_V << USB_INEP4TXFSTADDR_S)
+#define USB_INEP4TXFSTADDR_V  0x0000FFFF
+#define USB_INEP4TXFSTADDR_S  0
+/** USB_INEP4TXFDEP : R/W; bitpos: [32:16]; default: 4096;
+ *  IN Endpoint TxFIFO Depth
+ */
+#define USB_INEP4TXFDEP    0x0000FFFF
+#define USB_INEP4TXFDEP_M  (USB_INEP4TXFDEP_V << USB_INEP4TXFDEP_S)
+#define USB_INEP4TXFDEP_V  0x0000FFFF
+#define USB_INEP4TXFDEP_S  16
+
+
+/** USB_HCFG_REG register
+ *  Host Configuration Register
+ */
+#define USB_HCFG_REG (SOC_DPORT_USB_BASE + 0x400)
+/** USB_H_FSLSPCLKSEL : R/W; bitpos: [2:0]; default: 0;
+ *  0x0 : PHY clock is running at 30/60 MHz
+ *  0x1 : PHY clock is running at 48 MHz
+ *  0x2 : PHY clock is running at 6 MHz
+ */
+#define USB_H_FSLSPCLKSEL    0x00000003
+#define USB_H_FSLSPCLKSEL_M  (USB_H_FSLSPCLKSEL_V << USB_H_FSLSPCLKSEL_S)
+#define USB_H_FSLSPCLKSEL_V  0x00000003
+#define USB_H_FSLSPCLKSEL_S  0
+/** USB_H_FSLSSUPP : R/W; bitpos: [2]; default: 0;
+ *  FS- and LS-Only Support
+ *  1'b0: HS/FS/LS, based on the maximum speed supported by the connected device
+ *  1'b1: FS/LS-only, even If the connected device can support HS
+ */
+#define USB_H_FSLSSUPP    (BIT(2))
+#define USB_H_FSLSSUPP_M  (USB_H_FSLSSUPP_V << USB_H_FSLSSUPP_S)
+#define USB_H_FSLSSUPP_V  0x00000001
+#define USB_H_FSLSSUPP_S  2
+/** USB_H_ENA32KHZS : R/W; bitpos: [7]; default: 0;
+ *  1'b0:32 KHz Suspend mode disabled
+ *  1'b1:32 KHz Suspend mode enabled
+ */
+#define USB_H_ENA32KHZS    (BIT(7))
+#define USB_H_ENA32KHZS_M  (USB_H_ENA32KHZS_V << USB_H_ENA32KHZS_S)
+#define USB_H_ENA32KHZS_V  0x00000001
+#define USB_H_ENA32KHZS_S  7
+/** USB_H_DESCDMA : R/W; bitpos: [23]; default: 0;
+ *  GAHBCFG_REG.USB_DMAEN=0,HCFG_REG.USB_DESCDMA=0 => Slave mode
+ *  GAHBCFG_REG.USB_DMAEN=0,HCFG_REG.USB_DESCDMA=1 => Invalid
+ *  GAHBCFG_REG.USB_DMAEN=1,HCFG_REG.USB_DESCDMA=0 => Buffered DMA
+ *  GAHBCFG_REG.USB_DMAEN=1,HCFG_REG.USB_DESCDMA=1 => Scatter/Gather DMA mode
+ */
+#define USB_H_DESCDMA    (BIT(23))
+#define USB_H_DESCDMA_M  (USB_H_DESCDMA_V << USB_H_DESCDMA_S)
+#define USB_H_DESCDMA_V  0x00000001
+#define USB_H_DESCDMA_S  23
+/** USB_H_FRLISTEN : R/W; bitpos: [26:24]; default: 0;
+ *  Frame List Entries
+ *  2'b00: 8 Entries
+ *  2'b01: 16 Entries
+ *  2'b10: 32 Entries
+ *  2'b11: 64 Entries
+ */
+#define USB_H_FRLISTEN    0x00000003
+#define USB_H_FRLISTEN_M  (USB_H_FRLISTEN_V << USB_H_FRLISTEN_S)
+#define USB_H_FRLISTEN_V  0x00000003
+#define USB_H_FRLISTEN_S  24
+/** USB_H_PERSCHEDENA : R/W; bitpos: [26]; default: 0;
+ *  0x0 (DISABLED): Disables periodic scheduling within the core
+ *  0x1 (ENABLED): Enables periodic scheduling within the core
+ */
+#define USB_H_PERSCHEDENA    (BIT(26))
+#define USB_H_PERSCHEDENA_M  (USB_H_PERSCHEDENA_V << USB_H_PERSCHEDENA_S)
+#define USB_H_PERSCHEDENA_V  0x00000001
+#define USB_H_PERSCHEDENA_S  26
+/** USB_H_MODECHTIMEN : R/W; bitpos: [31]; default: 0;
+ *  Mode Change Ready Timer Enable,
+ *  1'b0 : The Host core waits for either 200 PHY clock cycles or a linestate of SE0 at
+ *  the end of resume to the change the opmode from 2'b10 to 2'b00.
+ *  1'b1 : The Host core waits only for a linstate of SE0 at the end of resume to
+ *  change the opmode from 2'b10 to 2'b00.
+ */
+#define USB_H_MODECHTIMEN    (BIT(31))
+#define USB_H_MODECHTIMEN_M  (USB_H_MODECHTIMEN_V << USB_H_MODECHTIMEN_S)
+#define USB_H_MODECHTIMEN_V  0x00000001
+#define USB_H_MODECHTIMEN_S  31
+
+
+/** USB_HFIR_REG register
+ *  Host Frame Interval Register
+ */
+#define USB_HFIR_REG (SOC_DPORT_USB_BASE + 0x404)
+/** USB_FRINT : R/W; bitpos: [16:0]; default: 6103;
+ *  Frame Interval .  1 ms * (PHY clock frequency for FS/LS)
+ */
+#define USB_FRINT    0x0000FFFF
+#define USB_FRINT_M  (USB_FRINT_V << USB_FRINT_S)
+#define USB_FRINT_V  0x0000FFFF
+#define USB_FRINT_S  0
+/** USB_HFIRRLDCTRL : R/W; bitpos: [16]; default: 0;
+ *  Reload Control
+ *  1'b0 : The HFIR cannot be reloaded dynamically
+ *  1'b1: the HFIR can be dynamically reloaded during runtime
+ */
+#define USB_HFIRRLDCTRL    (BIT(16))
+#define USB_HFIRRLDCTRL_M  (USB_HFIRRLDCTRL_V << USB_HFIRRLDCTRL_S)
+#define USB_HFIRRLDCTRL_V  0x00000001
+#define USB_HFIRRLDCTRL_S  16
+
+
+/** USB_HFLBADDR_REG register
+ *  Host Frame List Base Address Register
+ */
+#define USB_HFLBADDR_REG (SOC_DPORT_USB_BASE + 0x41c)
+/** USB_HFLBADDR : R/W; bitpos: [32:0]; default: 0;
+ *  The starting address of the Frame list. This register is used only for Isochronous
+ *  and Interrupt Channels.
+ */
+#define USB_HFLBADDR    0xFFFFFFFF
+#define USB_HFLBADDR_M  (USB_HFLBADDR_V << USB_HFLBADDR_S)
+#define USB_HFLBADDR_V  0xFFFFFFFF
+#define USB_HFLBADDR_S  0
+
+
+/** USB_HPRT_REG register
+ *  Host Port Control and Status Register
+ */
+#define USB_HPRT_REG (SOC_DPORT_USB_BASE + 0x440)
+/** USB_PRTCONNSTS : RO; bitpos: [0]; default: 0;
+ *  Port Connect Status
+ *  0x0: No device is attached to the port
+ *  0x1: A device is attached to the port
+ */
+#define USB_PRTCONNSTS    (BIT(0))
+#define USB_PRTCONNSTS_M  (USB_PRTCONNSTS_V << USB_PRTCONNSTS_S)
+#define USB_PRTCONNSTS_V  0x00000001
+#define USB_PRTCONNSTS_S  0
+/** USB_PRTCONNDET : R/W; bitpos: [1]; default: 0;
+ *  Port Connect Detected.
+ *  0x1 : Device connection detected.
+ *  0x0 : No device connection detected.
+ */
+#define USB_PRTCONNDET    (BIT(1))
+#define USB_PRTCONNDET_M  (USB_PRTCONNDET_V << USB_PRTCONNDET_S)
+#define USB_PRTCONNDET_V  0x00000001
+#define USB_PRTCONNDET_S  1
+/** USB_PRTENA : R/W; bitpos: [2]; default: 0;
+ *  Port Enable
+ *  1'b0: Port disabled
+ *  1'b1: Port enabled
+ */
+#define USB_PRTENA    (BIT(2))
+#define USB_PRTENA_M  (USB_PRTENA_V << USB_PRTENA_S)
+#define USB_PRTENA_V  0x00000001
+#define USB_PRTENA_S  2
+/** USB_PRTENCHNG : R/W; bitpos: [3]; default: 0;
+ *  Port Enable/Disable Change
+ *  0x0 : Port Enable bit 2 has not changed
+ *  0x1 : Port Enable bit 2 changed
+ */
+#define USB_PRTENCHNG    (BIT(3))
+#define USB_PRTENCHNG_M  (USB_PRTENCHNG_V << USB_PRTENCHNG_S)
+#define USB_PRTENCHNG_V  0x00000001
+#define USB_PRTENCHNG_S  3
+/** USB_PRTOVRCURRACT : RO; bitpos: [4]; default: 0;
+ *  Port Overcurrent Active
+ *  1'b0: No overcurrent condition
+ *  1'b1: Overcurrent condition
+ */
+#define USB_PRTOVRCURRACT    (BIT(4))
+#define USB_PRTOVRCURRACT_M  (USB_PRTOVRCURRACT_V << USB_PRTOVRCURRACT_S)
+#define USB_PRTOVRCURRACT_V  0x00000001
+#define USB_PRTOVRCURRACT_S  4
+/** USB_PRTOVRCURRCHNG : R/W; bitpos: [5]; default: 0;
+ *  Port Overcurrent Change
+ *  0x0: Status of port overcurrent status is not changed
+ *  0x1: Status of port overcurrent changed
+ */
+#define USB_PRTOVRCURRCHNG    (BIT(5))
+#define USB_PRTOVRCURRCHNG_M  (USB_PRTOVRCURRCHNG_V << USB_PRTOVRCURRCHNG_S)
+#define USB_PRTOVRCURRCHNG_V  0x00000001
+#define USB_PRTOVRCURRCHNG_S  5
+/** USB_PRTRES : R/W; bitpos: [6]; default: 0;
+ *  Port Resume
+ *  1'b0: No resume driven
+ *  1'b1: Resume driven
+ */
+#define USB_PRTRES    (BIT(6))
+#define USB_PRTRES_M  (USB_PRTRES_V << USB_PRTRES_S)
+#define USB_PRTRES_V  0x00000001
+#define USB_PRTRES_S  6
+/** USB_PRTSUSP : R/W; bitpos: [7]; default: 0;
+ *  Port Suspend
+ *  1'b0: Port not in Suspend mode
+ *  1'b1: Port in Suspend mode
+ */
+#define USB_PRTSUSP    (BIT(7))
+#define USB_PRTSUSP_M  (USB_PRTSUSP_V << USB_PRTSUSP_S)
+#define USB_PRTSUSP_V  0x00000001
+#define USB_PRTSUSP_S  7
+/** USB_PRTRST : R/W; bitpos: [8]; default: 0;
+ *  Port Reset.
+ *  1'b0: Port not in reset
+ *  1'b1: Port in reset
+ */
+#define USB_PRTRST    (BIT(8))
+#define USB_PRTRST_M  (USB_PRTRST_V << USB_PRTRST_S)
+#define USB_PRTRST_V  0x00000001
+#define USB_PRTRST_S  8
+/** USB_PRTLNSTS : RO; bitpos: [12:10]; default: 0;
+ *  Port Line Status
+ *  Bit [10]: Logic level of D+
+ *  Bit [11]: Logic level of D-
+ */
+#define USB_PRTLNSTS    0x00000003
+#define USB_PRTLNSTS_M  (USB_PRTLNSTS_V << USB_PRTLNSTS_S)
+#define USB_PRTLNSTS_V  0x00000003
+#define USB_PRTLNSTS_S  10
+/** USB_PRTPWR : R/W; bitpos: [12]; default: 0;
+ *  Port Power
+ *  1'b0: Power off
+ *  1'b1: Power on
+ */
+#define USB_PRTPWR    (BIT(12))
+#define USB_PRTPWR_M  (USB_PRTPWR_V << USB_PRTPWR_S)
+#define USB_PRTPWR_V  0x00000001
+#define USB_PRTPWR_S  12
+/** USB_PRTTSTCTL : R/W; bitpos: [17:13]; default: 0;
+ *  Port Test Control
+ *  4'b0000: Test mode disabled
+ *  4'b0001: Test_J mode
+ *  4'b0010: Test_K mode
+ *  4'b0011: Test_SE0_NAK mode
+ *  4'b0100: Test_Packet mode
+ *  4'b0101: Test_Force_Enable
+ *  Others: Reserved
+ */
+#define USB_PRTTSTCTL    0x0000000F
+#define USB_PRTTSTCTL_M  (USB_PRTTSTCTL_V << USB_PRTTSTCTL_S)
+#define USB_PRTTSTCTL_V  0x0000000F
+#define USB_PRTTSTCTL_S  13
+/** USB_PRTSPD : RO; bitpos: [19:17]; default: 0;
+ *  Port Speed
+ *  2'b00: High speed
+ *  2'b01: Full speed
+ *  2'b10: Low speed
+ *  2'b11: Reserved
+ */
+#define USB_PRTSPD    0x00000003
+#define USB_PRTSPD_M  (USB_PRTSPD_V << USB_PRTSPD_S)
+#define USB_PRTSPD_V  0x00000003
+#define USB_PRTSPD_S  17
+
+
+/** USB_HCCHAR0_REG register
+ *  Host Channel 0 Characteristics Register
+ */
+#define USB_HCCHAR0_REG (SOC_DPORT_USB_BASE + 0x500)
+/** USB_H_MPS0 : R/W; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size.
+ */
+#define USB_H_MPS0    0x000007FF
+#define USB_H_MPS0_M  (USB_H_MPS0_V << USB_H_MPS0_S)
+#define USB_H_MPS0_V  0x000007FF
+#define USB_H_MPS0_S  0
+/** USB_H_EPNUM0 : R/W; bitpos: [15:11]; default: 0;
+ *  Endpoint Number.
+ */
+#define USB_H_EPNUM0    0x0000000F
+#define USB_H_EPNUM0_M  (USB_H_EPNUM0_V << USB_H_EPNUM0_S)
+#define USB_H_EPNUM0_V  0x0000000F
+#define USB_H_EPNUM0_S  11
+/** USB_H_EPDIR0 : R/W; bitpos: [15]; default: 0;
+ *  1'b0: OUT
+ *  1'b1: IN
+ */
+#define USB_H_EPDIR0    (BIT(15))
+#define USB_H_EPDIR0_M  (USB_H_EPDIR0_V << USB_H_EPDIR0_S)
+#define USB_H_EPDIR0_V  0x00000001
+#define USB_H_EPDIR0_S  15
+/** USB_H_LSPDDEV0 : R/W; bitpos: [17]; default: 0;
+ *  0x0: Not Communicating with low speed device
+ *  0x1: Communicating with low speed device
+ */
+#define USB_H_LSPDDEV0    (BIT(17))
+#define USB_H_LSPDDEV0_M  (USB_H_LSPDDEV0_V << USB_H_LSPDDEV0_S)
+#define USB_H_LSPDDEV0_V  0x00000001
+#define USB_H_LSPDDEV0_S  17
+/** USB_H_EPTYPE0 : R/W; bitpos: [20:18]; default: 0;
+ *  0x0 (CTRL): Contro
+ *  0x1 (ISOC): Isochronous
+ *  0x2 (BULK): Bulk
+ *  0x3 (INTERR): Interrupt
+ */
+#define USB_H_EPTYPE0    0x00000003
+#define USB_H_EPTYPE0_M  (USB_H_EPTYPE0_V << USB_H_EPTYPE0_S)
+#define USB_H_EPTYPE0_V  0x00000003
+#define USB_H_EPTYPE0_S  18
+/** USB_H_EC0 : R/W; bitpos: [21]; default: 0;
+ *  Multi Count (MC) / Error Count(EC)
+ *  0x0 (RESERVED): Reserved. This field yields undefined result
+ *  0x1 (TRANSONE): 1 transaction
+ *  0x2 (TRANSTWO):2 transactions to be issued for this endpoint per microframe
+ *  0x3 (TRANSTHREE): 3 transactions to be issued for this endpoint per microframe
+ */
+#define USB_H_EC0    (BIT(21))
+#define USB_H_EC0_M  (USB_H_EC0_V << USB_H_EC0_S)
+#define USB_H_EC0_V  0x00000001
+#define USB_H_EC0_S  21
+/** USB_H_DEVADDR0 : R/W; bitpos: [29:22]; default: 0;
+ *  Device Address .    This field selects the specific device serving as the data
+ *  source or sink.
+ */
+#define USB_H_DEVADDR0    0x0000007F
+#define USB_H_DEVADDR0_M  (USB_H_DEVADDR0_V << USB_H_DEVADDR0_S)
+#define USB_H_DEVADDR0_V  0x0000007F
+#define USB_H_DEVADDR0_S  22
+/** USB_H_ODDFRM0 : R/W; bitpos: [29]; default: 0;
+ *  Odd Frame
+ *  1'b0: Even (micro)Frame
+ *  1'b1: Odd (micro)Frame
+ */
+#define USB_H_ODDFRM0    (BIT(29))
+#define USB_H_ODDFRM0_M  (USB_H_ODDFRM0_V << USB_H_ODDFRM0_S)
+#define USB_H_ODDFRM0_V  0x00000001
+#define USB_H_ODDFRM0_S  29
+/** USB_H_CHDIS0 : R/W; bitpos: [30]; default: 0;
+ *  Channel Disable
+ *  0x0 : Transmit/Recieve norma
+ *  0x1 : Stop transmitting/receiving data on channel
+ */
+#define USB_H_CHDIS0    (BIT(30))
+#define USB_H_CHDIS0_M  (USB_H_CHDIS0_V << USB_H_CHDIS0_S)
+#define USB_H_CHDIS0_V  0x00000001
+#define USB_H_CHDIS0_S  30
+/** USB_H_CHENA0 : R/W; bitpos: [31]; default: 0;
+ *  Channel Enable
+ *  0x0 :If Scatter/Gather mode is enabled, indicates that the descriptor structure is
+ *  not yet ready. If Scatter/Gather mode is disabled, indicates that the channel is
+ *  disabled
+ *  0x1 : If Scatter/Gather mode is enabled, indicates that the descriptor structure
+ *  and data buffer with data is set up and this channel can access the descriptor. If
+ *  Scatter/Gather mode is disabled, indicates that the channel is enabled
+ */
+#define USB_H_CHENA0    (BIT(31))
+#define USB_H_CHENA0_M  (USB_H_CHENA0_V << USB_H_CHENA0_S)
+#define USB_H_CHENA0_V  0x00000001
+#define USB_H_CHENA0_S  31
+
+
+/** USB_HCDMA0_REG register
+ *  Host Channel 0 DMA Address Register
+ */
+#define USB_HCDMA0_REG (SOC_DPORT_USB_BASE + 0x514)
+/** USB_H_DMAADDR0 : R/W; bitpos: [32:0]; default: 0;
+ *  In Scatter-Gather DMA (DescDMA) Mode for Non-Isochronous:
+ *  [31:9]: DMA Address
+ *  [8:3]: Current Transfer Desc
+ *  [2:0]: Reserved
+ */
+#define USB_H_DMAADDR0    0xFFFFFFFF
+#define USB_H_DMAADDR0_M  (USB_H_DMAADDR0_V << USB_H_DMAADDR0_S)
+#define USB_H_DMAADDR0_V  0xFFFFFFFF
+#define USB_H_DMAADDR0_S  0
+
+
+/** USB_HCCHAR1_REG register
+ *  Host Channel 1 Characteristics Register
+ */
+#define USB_HCCHAR1_REG (SOC_DPORT_USB_BASE + 0x520)
+/** USB_H_MPS1 : R/W; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size.
+ */
+#define USB_H_MPS1    0x000007FF
+#define USB_H_MPS1_M  (USB_H_MPS1_V << USB_H_MPS1_S)
+#define USB_H_MPS1_V  0x000007FF
+#define USB_H_MPS1_S  0
+/** USB_H_EPNUM1 : R/W; bitpos: [15:11]; default: 0;
+ *  Endpoint Number.
+ */
+#define USB_H_EPNUM1    0x0000000F
+#define USB_H_EPNUM1_M  (USB_H_EPNUM1_V << USB_H_EPNUM1_S)
+#define USB_H_EPNUM1_V  0x0000000F
+#define USB_H_EPNUM1_S  11
+/** USB_H_EPDIR1 : R/W; bitpos: [15]; default: 0;
+ *  1'b0: OUT
+ *  1'b1: IN
+ */
+#define USB_H_EPDIR1    (BIT(15))
+#define USB_H_EPDIR1_M  (USB_H_EPDIR1_V << USB_H_EPDIR1_S)
+#define USB_H_EPDIR1_V  0x00000001
+#define USB_H_EPDIR1_S  15
+/** USB_H_LSPDDEV1 : R/W; bitpos: [17]; default: 0;
+ *  0x0: Not Communicating with low speed device
+ *  0x1: Communicating with low speed device
+ */
+#define USB_H_LSPDDEV1    (BIT(17))
+#define USB_H_LSPDDEV1_M  (USB_H_LSPDDEV1_V << USB_H_LSPDDEV1_S)
+#define USB_H_LSPDDEV1_V  0x00000001
+#define USB_H_LSPDDEV1_S  17
+/** USB_H_EPTYPE1 : R/W; bitpos: [20:18]; default: 0;
+ *  0x0 (CTRL): Contro
+ *  0x1 (ISOC): Isochronous
+ *  0x2 (BULK): Bulk
+ *  0x3 (INTERR): Interrupt
+ */
+#define USB_H_EPTYPE1    0x00000003
+#define USB_H_EPTYPE1_M  (USB_H_EPTYPE1_V << USB_H_EPTYPE1_S)
+#define USB_H_EPTYPE1_V  0x00000003
+#define USB_H_EPTYPE1_S  18
+/** USB_H_EC1 : R/W; bitpos: [21]; default: 0;
+ *  Multi Count (MC) / Error Count(EC)
+ *  0x0 (RESERVED): Reserved. This field yields undefined result
+ *  0x1 (TRANSONE): 1 transaction
+ *  0x2 (TRANSTWO):2 transactions to be issued for this endpoint per microframe
+ *  0x3 (TRANSTHREE): 3 transactions to be issued for this endpoint per microframe
+ */
+#define USB_H_EC1    (BIT(21))
+#define USB_H_EC1_M  (USB_H_EC1_V << USB_H_EC1_S)
+#define USB_H_EC1_V  0x00000001
+#define USB_H_EC1_S  21
+/** USB_H_DEVADDR1 : R/W; bitpos: [29:22]; default: 0;
+ *  Device Address .    This field selects the specific device serving as the data
+ *  source or sink.
+ */
+#define USB_H_DEVADDR1    0x0000007F
+#define USB_H_DEVADDR1_M  (USB_H_DEVADDR1_V << USB_H_DEVADDR1_S)
+#define USB_H_DEVADDR1_V  0x0000007F
+#define USB_H_DEVADDR1_S  22
+/** USB_H_ODDFRM1 : R/W; bitpos: [29]; default: 0;
+ *  Odd Frame
+ *  1'b0: Even (micro)Frame
+ *  1'b1: Odd (micro)Frame
+ */
+#define USB_H_ODDFRM1    (BIT(29))
+#define USB_H_ODDFRM1_M  (USB_H_ODDFRM1_V << USB_H_ODDFRM1_S)
+#define USB_H_ODDFRM1_V  0x00000001
+#define USB_H_ODDFRM1_S  29
+/** USB_H_CHDIS1 : R/W; bitpos: [30]; default: 0;
+ *  Channel Disable
+ *  0x0 : Transmit/Recieve norma
+ *  0x1 : Stop transmitting/receiving data on channel
+ */
+#define USB_H_CHDIS1    (BIT(30))
+#define USB_H_CHDIS1_M  (USB_H_CHDIS1_V << USB_H_CHDIS1_S)
+#define USB_H_CHDIS1_V  0x00000001
+#define USB_H_CHDIS1_S  30
+/** USB_H_CHENA1 : R/W; bitpos: [31]; default: 0;
+ *  Channel Enable
+ *  0x0 :If Scatter/Gather mode is enabled, indicates that the descriptor structure is
+ *  not yet ready. If Scatter/Gather mode is disabled, indicates that the channel is
+ *  disabled
+ *  0x1 : If Scatter/Gather mode is enabled, indicates that the descriptor structure
+ *  and data buffer with data is set up and this channel can access the descriptor. If
+ *  Scatter/Gather mode is disabled, indicates that the channel is enabled
+ */
+#define USB_H_CHENA1    (BIT(31))
+#define USB_H_CHENA1_M  (USB_H_CHENA1_V << USB_H_CHENA1_S)
+#define USB_H_CHENA1_V  0x00000001
+#define USB_H_CHENA1_S  31
+
+
+/** USB_HCDMA1_REG register
+ *  Host Channel 1 DMA Address Register
+ */
+#define USB_HCDMA1_REG (SOC_DPORT_USB_BASE + 0x534)
+/** USB_H_DMAADDR1 : R/W; bitpos: [32:0]; default: 0;
+ *  In Scatter-Gather DMA (DescDMA) Mode for Non-Isochronous:
+ *  [31:9]: DMA Address
+ *  [8:3]: Current Transfer Desc
+ *  [2:0]: Reserved
+ */
+#define USB_H_DMAADDR1    0xFFFFFFFF
+#define USB_H_DMAADDR1_M  (USB_H_DMAADDR1_V << USB_H_DMAADDR1_S)
+#define USB_H_DMAADDR1_V  0xFFFFFFFF
+#define USB_H_DMAADDR1_S  0
+
+
+/** USB_HCCHAR2_REG register
+ *  Host Channel 2 Characteristics Register
+ */
+#define USB_HCCHAR2_REG (SOC_DPORT_USB_BASE + 0x540)
+/** USB_H_MPS2 : R/W; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size.
+ */
+#define USB_H_MPS2    0x000007FF
+#define USB_H_MPS2_M  (USB_H_MPS2_V << USB_H_MPS2_S)
+#define USB_H_MPS2_V  0x000007FF
+#define USB_H_MPS2_S  0
+/** USB_H_EPNUM2 : R/W; bitpos: [15:11]; default: 0;
+ *  Endpoint Number.
+ */
+#define USB_H_EPNUM2    0x0000000F
+#define USB_H_EPNUM2_M  (USB_H_EPNUM2_V << USB_H_EPNUM2_S)
+#define USB_H_EPNUM2_V  0x0000000F
+#define USB_H_EPNUM2_S  11
+/** USB_H_EPDIR2 : R/W; bitpos: [15]; default: 0;
+ *  1'b0: OUT
+ *  1'b1: IN
+ */
+#define USB_H_EPDIR2    (BIT(15))
+#define USB_H_EPDIR2_M  (USB_H_EPDIR2_V << USB_H_EPDIR2_S)
+#define USB_H_EPDIR2_V  0x00000001
+#define USB_H_EPDIR2_S  15
+/** USB_H_LSPDDEV2 : R/W; bitpos: [17]; default: 0;
+ *  0x0: Not Communicating with low speed device
+ *  0x1: Communicating with low speed device
+ */
+#define USB_H_LSPDDEV2    (BIT(17))
+#define USB_H_LSPDDEV2_M  (USB_H_LSPDDEV2_V << USB_H_LSPDDEV2_S)
+#define USB_H_LSPDDEV2_V  0x00000001
+#define USB_H_LSPDDEV2_S  17
+/** USB_H_EPTYPE2 : R/W; bitpos: [20:18]; default: 0;
+ *  0x0 (CTRL): Contro
+ *  0x1 (ISOC): Isochronous
+ *  0x2 (BULK): Bulk
+ *  0x3 (INTERR): Interrupt
+ */
+#define USB_H_EPTYPE2    0x00000003
+#define USB_H_EPTYPE2_M  (USB_H_EPTYPE2_V << USB_H_EPTYPE2_S)
+#define USB_H_EPTYPE2_V  0x00000003
+#define USB_H_EPTYPE2_S  18
+/** USB_H_EC2 : R/W; bitpos: [21]; default: 0;
+ *  Multi Count (MC) / Error Count(EC)
+ *  0x0 (RESERVED): Reserved. This field yields undefined result
+ *  0x1 (TRANSONE): 1 transaction
+ *  0x2 (TRANSTWO):2 transactions to be issued for this endpoint per microframe
+ *  0x3 (TRANSTHREE): 3 transactions to be issued for this endpoint per microframe
+ */
+#define USB_H_EC2    (BIT(21))
+#define USB_H_EC2_M  (USB_H_EC2_V << USB_H_EC2_S)
+#define USB_H_EC2_V  0x00000001
+#define USB_H_EC2_S  21
+/** USB_H_DEVADDR2 : R/W; bitpos: [29:22]; default: 0;
+ *  Device Address .    This field selects the specific device serving as the data
+ *  source or sink.
+ */
+#define USB_H_DEVADDR2    0x0000007F
+#define USB_H_DEVADDR2_M  (USB_H_DEVADDR2_V << USB_H_DEVADDR2_S)
+#define USB_H_DEVADDR2_V  0x0000007F
+#define USB_H_DEVADDR2_S  22
+/** USB_H_ODDFRM2 : R/W; bitpos: [29]; default: 0;
+ *  Odd Frame
+ *  1'b0: Even (micro)Frame
+ *  1'b1: Odd (micro)Frame
+ */
+#define USB_H_ODDFRM2    (BIT(29))
+#define USB_H_ODDFRM2_M  (USB_H_ODDFRM2_V << USB_H_ODDFRM2_S)
+#define USB_H_ODDFRM2_V  0x00000001
+#define USB_H_ODDFRM2_S  29
+/** USB_H_CHDIS2 : R/W; bitpos: [30]; default: 0;
+ *  Channel Disable
+ *  0x0 : Transmit/Recieve norma
+ *  0x1 : Stop transmitting/receiving data on channel
+ */
+#define USB_H_CHDIS2    (BIT(30))
+#define USB_H_CHDIS2_M  (USB_H_CHDIS2_V << USB_H_CHDIS2_S)
+#define USB_H_CHDIS2_V  0x00000001
+#define USB_H_CHDIS2_S  30
+/** USB_H_CHENA2 : R/W; bitpos: [31]; default: 0;
+ *  Channel Enable
+ *  0x0 :If Scatter/Gather mode is enabled, indicates that the descriptor structure is
+ *  not yet ready. If Scatter/Gather mode is disabled, indicates that the channel is
+ *  disabled
+ *  0x1 : If Scatter/Gather mode is enabled, indicates that the descriptor structure
+ *  and data buffer with data is set up and this channel can access the descriptor. If
+ *  Scatter/Gather mode is disabled, indicates that the channel is enabled
+ */
+#define USB_H_CHENA2    (BIT(31))
+#define USB_H_CHENA2_M  (USB_H_CHENA2_V << USB_H_CHENA2_S)
+#define USB_H_CHENA2_V  0x00000001
+#define USB_H_CHENA2_S  31
+
+
+/** USB_HCDMA2_REG register
+ *  Host Channel 2 DMA Address Register
+ */
+#define USB_HCDMA2_REG (SOC_DPORT_USB_BASE + 0x554)
+/** USB_H_DMAADDR2 : R/W; bitpos: [32:0]; default: 0;
+ *  In Scatter-Gather DMA (DescDMA) Mode for Non-Isochronous:
+ *  [31:9]: DMA Address
+ *  [8:3]: Current Transfer Desc
+ *  [2:0]: Reserved
+ */
+#define USB_H_DMAADDR2    0xFFFFFFFF
+#define USB_H_DMAADDR2_M  (USB_H_DMAADDR2_V << USB_H_DMAADDR2_S)
+#define USB_H_DMAADDR2_V  0xFFFFFFFF
+#define USB_H_DMAADDR2_S  0
+
+
+/** USB_HCCHAR3_REG register
+ *  Host Channel 3 Characteristics Register
+ */
+#define USB_HCCHAR3_REG (SOC_DPORT_USB_BASE + 0x560)
+/** USB_H_MPS3 : R/W; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size.
+ */
+#define USB_H_MPS3    0x000007FF
+#define USB_H_MPS3_M  (USB_H_MPS3_V << USB_H_MPS3_S)
+#define USB_H_MPS3_V  0x000007FF
+#define USB_H_MPS3_S  0
+/** USB_H_EPNUM3 : R/W; bitpos: [15:11]; default: 0;
+ *  Endpoint Number.
+ */
+#define USB_H_EPNUM3    0x0000000F
+#define USB_H_EPNUM3_M  (USB_H_EPNUM3_V << USB_H_EPNUM3_S)
+#define USB_H_EPNUM3_V  0x0000000F
+#define USB_H_EPNUM3_S  11
+/** USB_H_EPDIR3 : R/W; bitpos: [15]; default: 0;
+ *  1'b0: OUT
+ *  1'b1: IN
+ */
+#define USB_H_EPDIR3    (BIT(15))
+#define USB_H_EPDIR3_M  (USB_H_EPDIR3_V << USB_H_EPDIR3_S)
+#define USB_H_EPDIR3_V  0x00000001
+#define USB_H_EPDIR3_S  15
+/** USB_H_LSPDDEV3 : R/W; bitpos: [17]; default: 0;
+ *  0x0: Not Communicating with low speed device
+ *  0x1: Communicating with low speed device
+ */
+#define USB_H_LSPDDEV3    (BIT(17))
+#define USB_H_LSPDDEV3_M  (USB_H_LSPDDEV3_V << USB_H_LSPDDEV3_S)
+#define USB_H_LSPDDEV3_V  0x00000001
+#define USB_H_LSPDDEV3_S  17
+/** USB_H_EPTYPE3 : R/W; bitpos: [20:18]; default: 0;
+ *  0x0 (CTRL): Contro
+ *  0x1 (ISOC): Isochronous
+ *  0x2 (BULK): Bulk
+ *  0x3 (INTERR): Interrupt
+ */
+#define USB_H_EPTYPE3    0x00000003
+#define USB_H_EPTYPE3_M  (USB_H_EPTYPE3_V << USB_H_EPTYPE3_S)
+#define USB_H_EPTYPE3_V  0x00000003
+#define USB_H_EPTYPE3_S  18
+/** USB_H_EC3 : R/W; bitpos: [21]; default: 0;
+ *  Multi Count (MC) / Error Count(EC)
+ *  0x0 (RESERVED): Reserved. This field yields undefined result
+ *  0x1 (TRANSONE): 1 transaction
+ *  0x2 (TRANSTWO):2 transactions to be issued for this endpoint per microframe
+ *  0x3 (TRANSTHREE): 3 transactions to be issued for this endpoint per microframe
+ */
+#define USB_H_EC3    (BIT(21))
+#define USB_H_EC3_M  (USB_H_EC3_V << USB_H_EC3_S)
+#define USB_H_EC3_V  0x00000001
+#define USB_H_EC3_S  21
+/** USB_H_DEVADDR3 : R/W; bitpos: [29:22]; default: 0;
+ *  Device Address .    This field selects the specific device serving as the data
+ *  source or sink.
+ */
+#define USB_H_DEVADDR3    0x0000007F
+#define USB_H_DEVADDR3_M  (USB_H_DEVADDR3_V << USB_H_DEVADDR3_S)
+#define USB_H_DEVADDR3_V  0x0000007F
+#define USB_H_DEVADDR3_S  22
+/** USB_H_ODDFRM3 : R/W; bitpos: [29]; default: 0;
+ *  Odd Frame
+ *  1'b0: Even (micro)Frame
+ *  1'b1: Odd (micro)Frame
+ */
+#define USB_H_ODDFRM3    (BIT(29))
+#define USB_H_ODDFRM3_M  (USB_H_ODDFRM3_V << USB_H_ODDFRM3_S)
+#define USB_H_ODDFRM3_V  0x00000001
+#define USB_H_ODDFRM3_S  29
+/** USB_H_CHDIS3 : R/W; bitpos: [30]; default: 0;
+ *  Channel Disable
+ *  0x0 : Transmit/Recieve norma
+ *  0x1 : Stop transmitting/receiving data on channel
+ */
+#define USB_H_CHDIS3    (BIT(30))
+#define USB_H_CHDIS3_M  (USB_H_CHDIS3_V << USB_H_CHDIS3_S)
+#define USB_H_CHDIS3_V  0x00000001
+#define USB_H_CHDIS3_S  30
+/** USB_H_CHENA3 : R/W; bitpos: [31]; default: 0;
+ *  Channel Enable
+ *  0x0 :If Scatter/Gather mode is enabled, indicates that the descriptor structure is
+ *  not yet ready. If Scatter/Gather mode is disabled, indicates that the channel is
+ *  disabled
+ *  0x1 : If Scatter/Gather mode is enabled, indicates that the descriptor structure
+ *  and data buffer with data is set up and this channel can access the descriptor. If
+ *  Scatter/Gather mode is disabled, indicates that the channel is enabled
+ */
+#define USB_H_CHENA3    (BIT(31))
+#define USB_H_CHENA3_M  (USB_H_CHENA3_V << USB_H_CHENA3_S)
+#define USB_H_CHENA3_V  0x00000001
+#define USB_H_CHENA3_S  31
+
+
+/** USB_HCDMA3_REG register
+ *  Host Channel 3 DMA Address Register
+ */
+#define USB_HCDMA3_REG (SOC_DPORT_USB_BASE + 0x574)
+/** USB_H_DMAADDR3 : R/W; bitpos: [32:0]; default: 0;
+ *  In Scatter-Gather DMA (DescDMA) Mode for Non-Isochronous:
+ *  [31:9]: DMA Address
+ *  [8:3]: Current Transfer Desc
+ *  [2:0]: Reserved
+ */
+#define USB_H_DMAADDR3    0xFFFFFFFF
+#define USB_H_DMAADDR3_M  (USB_H_DMAADDR3_V << USB_H_DMAADDR3_S)
+#define USB_H_DMAADDR3_V  0xFFFFFFFF
+#define USB_H_DMAADDR3_S  0
+
+
+/** USB_HCCHAR4_REG register
+ *  Host Channel 4 Characteristics Register
+ */
+#define USB_HCCHAR4_REG (SOC_DPORT_USB_BASE + 0x580)
+/** USB_H_MPS4 : R/W; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size.
+ */
+#define USB_H_MPS4    0x000007FF
+#define USB_H_MPS4_M  (USB_H_MPS4_V << USB_H_MPS4_S)
+#define USB_H_MPS4_V  0x000007FF
+#define USB_H_MPS4_S  0
+/** USB_H_EPNUM4 : R/W; bitpos: [15:11]; default: 0;
+ *  Endpoint Number.
+ */
+#define USB_H_EPNUM4    0x0000000F
+#define USB_H_EPNUM4_M  (USB_H_EPNUM4_V << USB_H_EPNUM4_S)
+#define USB_H_EPNUM4_V  0x0000000F
+#define USB_H_EPNUM4_S  11
+/** USB_H_EPDIR4 : R/W; bitpos: [15]; default: 0;
+ *  1'b0: OUT
+ *  1'b1: IN
+ */
+#define USB_H_EPDIR4    (BIT(15))
+#define USB_H_EPDIR4_M  (USB_H_EPDIR4_V << USB_H_EPDIR4_S)
+#define USB_H_EPDIR4_V  0x00000001
+#define USB_H_EPDIR4_S  15
+/** USB_H_LSPDDEV4 : R/W; bitpos: [17]; default: 0;
+ *  0x0: Not Communicating with low speed device
+ *  0x1: Communicating with low speed device
+ */
+#define USB_H_LSPDDEV4    (BIT(17))
+#define USB_H_LSPDDEV4_M  (USB_H_LSPDDEV4_V << USB_H_LSPDDEV4_S)
+#define USB_H_LSPDDEV4_V  0x00000001
+#define USB_H_LSPDDEV4_S  17
+/** USB_H_EPTYPE4 : R/W; bitpos: [20:18]; default: 0;
+ *  0x0 (CTRL): Contro
+ *  0x1 (ISOC): Isochronous
+ *  0x2 (BULK): Bulk
+ *  0x3 (INTERR): Interrupt
+ */
+#define USB_H_EPTYPE4    0x00000003
+#define USB_H_EPTYPE4_M  (USB_H_EPTYPE4_V << USB_H_EPTYPE4_S)
+#define USB_H_EPTYPE4_V  0x00000003
+#define USB_H_EPTYPE4_S  18
+/** USB_H_EC4 : R/W; bitpos: [21]; default: 0;
+ *  Multi Count (MC) / Error Count(EC)
+ *  0x0 (RESERVED): Reserved. This field yields undefined result
+ *  0x1 (TRANSONE): 1 transaction
+ *  0x2 (TRANSTWO):2 transactions to be issued for this endpoint per microframe
+ *  0x3 (TRANSTHREE): 3 transactions to be issued for this endpoint per microframe
+ */
+#define USB_H_EC4    (BIT(21))
+#define USB_H_EC4_M  (USB_H_EC4_V << USB_H_EC4_S)
+#define USB_H_EC4_V  0x00000001
+#define USB_H_EC4_S  21
+/** USB_H_DEVADDR4 : R/W; bitpos: [29:22]; default: 0;
+ *  Device Address .    This field selects the specific device serving as the data
+ *  source or sink.
+ */
+#define USB_H_DEVADDR4    0x0000007F
+#define USB_H_DEVADDR4_M  (USB_H_DEVADDR4_V << USB_H_DEVADDR4_S)
+#define USB_H_DEVADDR4_V  0x0000007F
+#define USB_H_DEVADDR4_S  22
+/** USB_H_ODDFRM4 : R/W; bitpos: [29]; default: 0;
+ *  Odd Frame
+ *  1'b0: Even (micro)Frame
+ *  1'b1: Odd (micro)Frame
+ */
+#define USB_H_ODDFRM4    (BIT(29))
+#define USB_H_ODDFRM4_M  (USB_H_ODDFRM4_V << USB_H_ODDFRM4_S)
+#define USB_H_ODDFRM4_V  0x00000001
+#define USB_H_ODDFRM4_S  29
+/** USB_H_CHDIS4 : R/W; bitpos: [30]; default: 0;
+ *  Channel Disable
+ *  0x0 : Transmit/Recieve norma
+ *  0x1 : Stop transmitting/receiving data on channel
+ */
+#define USB_H_CHDIS4    (BIT(30))
+#define USB_H_CHDIS4_M  (USB_H_CHDIS4_V << USB_H_CHDIS4_S)
+#define USB_H_CHDIS4_V  0x00000001
+#define USB_H_CHDIS4_S  30
+/** USB_H_CHENA4 : R/W; bitpos: [31]; default: 0;
+ *  Channel Enable
+ *  0x0 :If Scatter/Gather mode is enabled, indicates that the descriptor structure is
+ *  not yet ready. If Scatter/Gather mode is disabled, indicates that the channel is
+ *  disabled
+ *  0x1 : If Scatter/Gather mode is enabled, indicates that the descriptor structure
+ *  and data buffer with data is set up and this channel can access the descriptor. If
+ *  Scatter/Gather mode is disabled, indicates that the channel is enabled
+ */
+#define USB_H_CHENA4    (BIT(31))
+#define USB_H_CHENA4_M  (USB_H_CHENA4_V << USB_H_CHENA4_S)
+#define USB_H_CHENA4_V  0x00000001
+#define USB_H_CHENA4_S  31
+
+
+/** USB_HCDMA4_REG register
+ *  Host Channel 4 DMA Address Register
+ */
+#define USB_HCDMA4_REG (SOC_DPORT_USB_BASE + 0x594)
+/** USB_H_DMAADDR4 : R/W; bitpos: [32:0]; default: 0;
+ *  In Scatter-Gather DMA (DescDMA) Mode for Non-Isochronous:
+ *  [31:9]: DMA Address
+ *  [8:3]: Current Transfer Desc
+ *  [2:0]: Reserved
+ */
+#define USB_H_DMAADDR4    0xFFFFFFFF
+#define USB_H_DMAADDR4_M  (USB_H_DMAADDR4_V << USB_H_DMAADDR4_S)
+#define USB_H_DMAADDR4_V  0xFFFFFFFF
+#define USB_H_DMAADDR4_S  0
+
+
+/** USB_HCCHAR5_REG register
+ *  Host Channel 5 Characteristics Register
+ */
+#define USB_HCCHAR5_REG (SOC_DPORT_USB_BASE + 0x5a0)
+/** USB_H_MPS5 : R/W; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size.
+ */
+#define USB_H_MPS5    0x000007FF
+#define USB_H_MPS5_M  (USB_H_MPS5_V << USB_H_MPS5_S)
+#define USB_H_MPS5_V  0x000007FF
+#define USB_H_MPS5_S  0
+/** USB_H_EPNUM5 : R/W; bitpos: [15:11]; default: 0;
+ *  Endpoint Number.
+ */
+#define USB_H_EPNUM5    0x0000000F
+#define USB_H_EPNUM5_M  (USB_H_EPNUM5_V << USB_H_EPNUM5_S)
+#define USB_H_EPNUM5_V  0x0000000F
+#define USB_H_EPNUM5_S  11
+/** USB_H_EPDIR5 : R/W; bitpos: [15]; default: 0;
+ *  1'b0: OUT
+ *  1'b1: IN
+ */
+#define USB_H_EPDIR5    (BIT(15))
+#define USB_H_EPDIR5_M  (USB_H_EPDIR5_V << USB_H_EPDIR5_S)
+#define USB_H_EPDIR5_V  0x00000001
+#define USB_H_EPDIR5_S  15
+/** USB_H_LSPDDEV5 : R/W; bitpos: [17]; default: 0;
+ *  0x0: Not Communicating with low speed device
+ *  0x1: Communicating with low speed device
+ */
+#define USB_H_LSPDDEV5    (BIT(17))
+#define USB_H_LSPDDEV5_M  (USB_H_LSPDDEV5_V << USB_H_LSPDDEV5_S)
+#define USB_H_LSPDDEV5_V  0x00000001
+#define USB_H_LSPDDEV5_S  17
+/** USB_H_EPTYPE5 : R/W; bitpos: [20:18]; default: 0;
+ *  0x0 (CTRL): Contro
+ *  0x1 (ISOC): Isochronous
+ *  0x2 (BULK): Bulk
+ *  0x3 (INTERR): Interrupt
+ */
+#define USB_H_EPTYPE5    0x00000003
+#define USB_H_EPTYPE5_M  (USB_H_EPTYPE5_V << USB_H_EPTYPE5_S)
+#define USB_H_EPTYPE5_V  0x00000003
+#define USB_H_EPTYPE5_S  18
+/** USB_H_EC5 : R/W; bitpos: [21]; default: 0;
+ *  Multi Count (MC) / Error Count(EC)
+ *  0x0 (RESERVED): Reserved. This field yields undefined result
+ *  0x1 (TRANSONE): 1 transaction
+ *  0x2 (TRANSTWO):2 transactions to be issued for this endpoint per microframe
+ *  0x3 (TRANSTHREE): 3 transactions to be issued for this endpoint per microframe
+ */
+#define USB_H_EC5    (BIT(21))
+#define USB_H_EC5_M  (USB_H_EC5_V << USB_H_EC5_S)
+#define USB_H_EC5_V  0x00000001
+#define USB_H_EC5_S  21
+/** USB_H_DEVADDR5 : R/W; bitpos: [29:22]; default: 0;
+ *  Device Address .    This field selects the specific device serving as the data
+ *  source or sink.
+ */
+#define USB_H_DEVADDR5    0x0000007F
+#define USB_H_DEVADDR5_M  (USB_H_DEVADDR5_V << USB_H_DEVADDR5_S)
+#define USB_H_DEVADDR5_V  0x0000007F
+#define USB_H_DEVADDR5_S  22
+/** USB_H_ODDFRM5 : R/W; bitpos: [29]; default: 0;
+ *  Odd Frame
+ *  1'b0: Even (micro)Frame
+ *  1'b1: Odd (micro)Frame
+ */
+#define USB_H_ODDFRM5    (BIT(29))
+#define USB_H_ODDFRM5_M  (USB_H_ODDFRM5_V << USB_H_ODDFRM5_S)
+#define USB_H_ODDFRM5_V  0x00000001
+#define USB_H_ODDFRM5_S  29
+/** USB_H_CHDIS5 : R/W; bitpos: [30]; default: 0;
+ *  Channel Disable
+ *  0x0 : Transmit/Recieve norma
+ *  0x1 : Stop transmitting/receiving data on channel
+ */
+#define USB_H_CHDIS5    (BIT(30))
+#define USB_H_CHDIS5_M  (USB_H_CHDIS5_V << USB_H_CHDIS5_S)
+#define USB_H_CHDIS5_V  0x00000001
+#define USB_H_CHDIS5_S  30
+/** USB_H_CHENA5 : R/W; bitpos: [31]; default: 0;
+ *  Channel Enable
+ *  0x0 :If Scatter/Gather mode is enabled, indicates that the descriptor structure is
+ *  not yet ready. If Scatter/Gather mode is disabled, indicates that the channel is
+ *  disabled
+ *  0x1 : If Scatter/Gather mode is enabled, indicates that the descriptor structure
+ *  and data buffer with data is set up and this channel can access the descriptor. If
+ *  Scatter/Gather mode is disabled, indicates that the channel is enabled
+ */
+#define USB_H_CHENA5    (BIT(31))
+#define USB_H_CHENA5_M  (USB_H_CHENA5_V << USB_H_CHENA5_S)
+#define USB_H_CHENA5_V  0x00000001
+#define USB_H_CHENA5_S  31
+
+
+/** USB_HCDMA5_REG register
+ *  Host Channel 5 DMA Address Register
+ */
+#define USB_HCDMA5_REG (SOC_DPORT_USB_BASE + 0x5b4)
+/** USB_H_DMAADDR5 : R/W; bitpos: [32:0]; default: 0;
+ *  In Scatter-Gather DMA (DescDMA) Mode for Non-Isochronous:
+ *  [31:9]: DMA Address
+ *  [8:3]: Current Transfer Desc
+ *  [2:0]: Reserved
+ */
+#define USB_H_DMAADDR5    0xFFFFFFFF
+#define USB_H_DMAADDR5_M  (USB_H_DMAADDR5_V << USB_H_DMAADDR5_S)
+#define USB_H_DMAADDR5_V  0xFFFFFFFF
+#define USB_H_DMAADDR5_S  0
+
+
+/** USB_HCCHAR6_REG register
+ *  Host Channel 6 Characteristics Register
+ */
+#define USB_HCCHAR6_REG (SOC_DPORT_USB_BASE + 0x5c0)
+/** USB_H_MPS6 : R/W; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size.
+ */
+#define USB_H_MPS6    0x000007FF
+#define USB_H_MPS6_M  (USB_H_MPS6_V << USB_H_MPS6_S)
+#define USB_H_MPS6_V  0x000007FF
+#define USB_H_MPS6_S  0
+/** USB_H_EPNUM6 : R/W; bitpos: [15:11]; default: 0;
+ *  Endpoint Number.
+ */
+#define USB_H_EPNUM6    0x0000000F
+#define USB_H_EPNUM6_M  (USB_H_EPNUM6_V << USB_H_EPNUM6_S)
+#define USB_H_EPNUM6_V  0x0000000F
+#define USB_H_EPNUM6_S  11
+/** USB_H_EPDIR6 : R/W; bitpos: [15]; default: 0;
+ *  1'b0: OUT
+ *  1'b1: IN
+ */
+#define USB_H_EPDIR6    (BIT(15))
+#define USB_H_EPDIR6_M  (USB_H_EPDIR6_V << USB_H_EPDIR6_S)
+#define USB_H_EPDIR6_V  0x00000001
+#define USB_H_EPDIR6_S  15
+/** USB_H_LSPDDEV6 : R/W; bitpos: [17]; default: 0;
+ *  0x0: Not Communicating with low speed device
+ *  0x1: Communicating with low speed device
+ */
+#define USB_H_LSPDDEV6    (BIT(17))
+#define USB_H_LSPDDEV6_M  (USB_H_LSPDDEV6_V << USB_H_LSPDDEV6_S)
+#define USB_H_LSPDDEV6_V  0x00000001
+#define USB_H_LSPDDEV6_S  17
+/** USB_H_EPTYPE6 : R/W; bitpos: [20:18]; default: 0;
+ *  0x0 (CTRL): Contro
+ *  0x1 (ISOC): Isochronous
+ *  0x2 (BULK): Bulk
+ *  0x3 (INTERR): Interrupt
+ */
+#define USB_H_EPTYPE6    0x00000003
+#define USB_H_EPTYPE6_M  (USB_H_EPTYPE6_V << USB_H_EPTYPE6_S)
+#define USB_H_EPTYPE6_V  0x00000003
+#define USB_H_EPTYPE6_S  18
+/** USB_H_EC6 : R/W; bitpos: [21]; default: 0;
+ *  Multi Count (MC) / Error Count(EC)
+ *  0x0 (RESERVED): Reserved. This field yields undefined result
+ *  0x1 (TRANSONE): 1 transaction
+ *  0x2 (TRANSTWO):2 transactions to be issued for this endpoint per microframe
+ *  0x3 (TRANSTHREE): 3 transactions to be issued for this endpoint per microframe
+ */
+#define USB_H_EC6    (BIT(21))
+#define USB_H_EC6_M  (USB_H_EC6_V << USB_H_EC6_S)
+#define USB_H_EC6_V  0x00000001
+#define USB_H_EC6_S  21
+/** USB_H_DEVADDR6 : R/W; bitpos: [29:22]; default: 0;
+ *  Device Address .    This field selects the specific device serving as the data
+ *  source or sink.
+ */
+#define USB_H_DEVADDR6    0x0000007F
+#define USB_H_DEVADDR6_M  (USB_H_DEVADDR6_V << USB_H_DEVADDR6_S)
+#define USB_H_DEVADDR6_V  0x0000007F
+#define USB_H_DEVADDR6_S  22
+/** USB_H_ODDFRM6 : R/W; bitpos: [29]; default: 0;
+ *  Odd Frame
+ *  1'b0: Even (micro)Frame
+ *  1'b1: Odd (micro)Frame
+ */
+#define USB_H_ODDFRM6    (BIT(29))
+#define USB_H_ODDFRM6_M  (USB_H_ODDFRM6_V << USB_H_ODDFRM6_S)
+#define USB_H_ODDFRM6_V  0x00000001
+#define USB_H_ODDFRM6_S  29
+/** USB_H_CHDIS6 : R/W; bitpos: [30]; default: 0;
+ *  Channel Disable
+ *  0x0 : Transmit/Recieve norma
+ *  0x1 : Stop transmitting/receiving data on channel
+ */
+#define USB_H_CHDIS6    (BIT(30))
+#define USB_H_CHDIS6_M  (USB_H_CHDIS6_V << USB_H_CHDIS6_S)
+#define USB_H_CHDIS6_V  0x00000001
+#define USB_H_CHDIS6_S  30
+/** USB_H_CHENA6 : R/W; bitpos: [31]; default: 0;
+ *  Channel Enable
+ *  0x0 :If Scatter/Gather mode is enabled, indicates that the descriptor structure is
+ *  not yet ready. If Scatter/Gather mode is disabled, indicates that the channel is
+ *  disabled
+ *  0x1 : If Scatter/Gather mode is enabled, indicates that the descriptor structure
+ *  and data buffer with data is set up and this channel can access the descriptor. If
+ *  Scatter/Gather mode is disabled, indicates that the channel is enabled
+ */
+#define USB_H_CHENA6    (BIT(31))
+#define USB_H_CHENA6_M  (USB_H_CHENA6_V << USB_H_CHENA6_S)
+#define USB_H_CHENA6_V  0x00000001
+#define USB_H_CHENA6_S  31
+
+
+/** USB_HCDMA6_REG register
+ *  Host Channel 6 DMA Address Register
+ */
+#define USB_HCDMA6_REG (SOC_DPORT_USB_BASE + 0x5d4)
+/** USB_H_DMAADDR6 : R/W; bitpos: [32:0]; default: 0;
+ *  In Scatter-Gather DMA (DescDMA) Mode for Non-Isochronous:
+ *  [31:9]: DMA Address
+ *  [8:3]: Current Transfer Desc
+ *  [2:0]: Reserved
+ */
+#define USB_H_DMAADDR6    0xFFFFFFFF
+#define USB_H_DMAADDR6_M  (USB_H_DMAADDR6_V << USB_H_DMAADDR6_S)
+#define USB_H_DMAADDR6_V  0xFFFFFFFF
+#define USB_H_DMAADDR6_S  0
+
+
+/** USB_HCCHAR7_REG register
+ *  Host Channel 7 Characteristics Register
+ */
+#define USB_HCCHAR7_REG (SOC_DPORT_USB_BASE + 0x5e0)
+/** USB_H_MPS7 : R/W; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size.
+ */
+#define USB_H_MPS7    0x000007FF
+#define USB_H_MPS7_M  (USB_H_MPS7_V << USB_H_MPS7_S)
+#define USB_H_MPS7_V  0x000007FF
+#define USB_H_MPS7_S  0
+/** USB_H_EPNUM7 : R/W; bitpos: [15:11]; default: 0;
+ *  Endpoint Number.
+ */
+#define USB_H_EPNUM7    0x0000000F
+#define USB_H_EPNUM7_M  (USB_H_EPNUM7_V << USB_H_EPNUM7_S)
+#define USB_H_EPNUM7_V  0x0000000F
+#define USB_H_EPNUM7_S  11
+/** USB_H_EPDIR7 : R/W; bitpos: [15]; default: 0;
+ *  1'b0: OUT
+ *  1'b1: IN
+ */
+#define USB_H_EPDIR7    (BIT(15))
+#define USB_H_EPDIR7_M  (USB_H_EPDIR7_V << USB_H_EPDIR7_S)
+#define USB_H_EPDIR7_V  0x00000001
+#define USB_H_EPDIR7_S  15
+/** USB_H_LSPDDEV7 : R/W; bitpos: [17]; default: 0;
+ *  0x0: Not Communicating with low speed device
+ *  0x1: Communicating with low speed device
+ */
+#define USB_H_LSPDDEV7    (BIT(17))
+#define USB_H_LSPDDEV7_M  (USB_H_LSPDDEV7_V << USB_H_LSPDDEV7_S)
+#define USB_H_LSPDDEV7_V  0x00000001
+#define USB_H_LSPDDEV7_S  17
+/** USB_H_EPTYPE7 : R/W; bitpos: [20:18]; default: 0;
+ *  0x0 (CTRL): Contro
+ *  0x1 (ISOC): Isochronous
+ *  0x2 (BULK): Bulk
+ *  0x3 (INTERR): Interrupt
+ */
+#define USB_H_EPTYPE7    0x00000003
+#define USB_H_EPTYPE7_M  (USB_H_EPTYPE7_V << USB_H_EPTYPE7_S)
+#define USB_H_EPTYPE7_V  0x00000003
+#define USB_H_EPTYPE7_S  18
+/** USB_H_EC7 : R/W; bitpos: [21]; default: 0;
+ *  Multi Count (MC) / Error Count(EC)
+ *  0x0 (RESERVED): Reserved. This field yields undefined result
+ *  0x1 (TRANSONE): 1 transaction
+ *  0x2 (TRANSTWO):2 transactions to be issued for this endpoint per microframe
+ *  0x3 (TRANSTHREE): 3 transactions to be issued for this endpoint per microframe
+ */
+#define USB_H_EC7    (BIT(21))
+#define USB_H_EC7_M  (USB_H_EC7_V << USB_H_EC7_S)
+#define USB_H_EC7_V  0x00000001
+#define USB_H_EC7_S  21
+/** USB_H_DEVADDR7 : R/W; bitpos: [29:22]; default: 0;
+ *  Device Address .    This field selects the specific device serving as the data
+ *  source or sink.
+ */
+#define USB_H_DEVADDR7    0x0000007F
+#define USB_H_DEVADDR7_M  (USB_H_DEVADDR7_V << USB_H_DEVADDR7_S)
+#define USB_H_DEVADDR7_V  0x0000007F
+#define USB_H_DEVADDR7_S  22
+/** USB_H_ODDFRM7 : R/W; bitpos: [29]; default: 0;
+ *  Odd Frame
+ *  1'b0: Even (micro)Frame
+ *  1'b1: Odd (micro)Frame
+ */
+#define USB_H_ODDFRM7    (BIT(29))
+#define USB_H_ODDFRM7_M  (USB_H_ODDFRM7_V << USB_H_ODDFRM7_S)
+#define USB_H_ODDFRM7_V  0x00000001
+#define USB_H_ODDFRM7_S  29
+/** USB_H_CHDIS7 : R/W; bitpos: [30]; default: 0;
+ *  Channel Disable
+ *  0x0 : Transmit/Recieve norma
+ *  0x1 : Stop transmitting/receiving data on channel
+ */
+#define USB_H_CHDIS7    (BIT(30))
+#define USB_H_CHDIS7_M  (USB_H_CHDIS7_V << USB_H_CHDIS7_S)
+#define USB_H_CHDIS7_V  0x00000001
+#define USB_H_CHDIS7_S  30
+/** USB_H_CHENA7 : R/W; bitpos: [31]; default: 0;
+ *  Channel Enable
+ *  0x0 :If Scatter/Gather mode is enabled, indicates that the descriptor structure is
+ *  not yet ready. If Scatter/Gather mode is disabled, indicates that the channel is
+ *  disabled
+ *  0x1 : If Scatter/Gather mode is enabled, indicates that the descriptor structure
+ *  and data buffer with data is set up and this channel can access the descriptor. If
+ *  Scatter/Gather mode is disabled, indicates that the channel is enabled
+ */
+#define USB_H_CHENA7    (BIT(31))
+#define USB_H_CHENA7_M  (USB_H_CHENA7_V << USB_H_CHENA7_S)
+#define USB_H_CHENA7_V  0x00000001
+#define USB_H_CHENA7_S  31
+
+
+/** USB_HCDMA7_REG register
+ *  Host Channel 7 DMA Address Register
+ */
+#define USB_HCDMA7_REG (SOC_DPORT_USB_BASE + 0x5f4)
+/** USB_H_DMAADDR7 : R/W; bitpos: [32:0]; default: 0;
+ *  In Scatter-Gather DMA (DescDMA) Mode for Non-Isochronous:
+ *  [31:9]: DMA Address
+ *  [8:3]: Current Transfer Desc
+ *  [2:0]: Reserved
+ */
+#define USB_H_DMAADDR7    0xFFFFFFFF
+#define USB_H_DMAADDR7_M  (USB_H_DMAADDR7_V << USB_H_DMAADDR7_S)
+#define USB_H_DMAADDR7_V  0xFFFFFFFF
+#define USB_H_DMAADDR7_S  0
+
+
+/** USB_DCFG_REG register
+ *  Device Configuration Register
+ */
+#define USB_DCFG_REG (SOC_DPORT_USB_BASE + 0x800)
+/** USB_NZSTSOUTHSHK : R/W; bitpos: [2]; default: 0;
+ *  1'b0: Send the received OUT packet to the application (zero-length or non-zero
+ *  length) and send a handshake based on NAK and STALL bits for the endpoint in the
+ *  Devce Endpoint Control Register
+ *  1'b1: Send a STALL handshake on a nonzero-length status OUT transaction and do not
+ *  send the received OUT packet to the application
+ */
+#define USB_NZSTSOUTHSHK    (BIT(2))
+#define USB_NZSTSOUTHSHK_M  (USB_NZSTSOUTHSHK_V << USB_NZSTSOUTHSHK_S)
+#define USB_NZSTSOUTHSHK_V  0x00000001
+#define USB_NZSTSOUTHSHK_S  2
+/** USB_DEVADDR : R/W; bitpos: [11:4]; default: 0;
+ *  Device Address.
+ */
+#define USB_DEVADDR    0x0000007F
+#define USB_DEVADDR_M  (USB_DEVADDR_V << USB_DEVADDR_S)
+#define USB_DEVADDR_V  0x0000007F
+#define USB_DEVADDR_S  4
+/** USB_PERFRLINT : R/W; bitpos: [13:11]; default: 0;
+ *  0x0 (EOPF80): 80% of the (micro)Frame interval
+ *  0x1 (EOPF85): 85% of the (micro)Frame interval
+ *  0x2 (EOPF90): 90% of the (micro)Frame interval
+ *  0x3 (EOPF95): 95% of the (micro)Frame interval
+ */
+#define USB_PERFRLINT    0x00000003
+#define USB_PERFRLINT_M  (USB_PERFRLINT_V << USB_PERFRLINT_S)
+#define USB_PERFRLINT_V  0x00000003
+#define USB_PERFRLINT_S  11
+/** USB_ENDEVOUTNAK : R/W; bitpos: [13]; default: 0;
+ *  1'b0:The core does not set NAK after Bulk OUT transfer complete
+ *  1'b1: The core sets NAK after Bulk OUT transfer complete
+ */
+#define USB_ENDEVOUTNAK    (BIT(13))
+#define USB_ENDEVOUTNAK_M  (USB_ENDEVOUTNAK_V << USB_ENDEVOUTNAK_S)
+#define USB_ENDEVOUTNAK_V  0x00000001
+#define USB_ENDEVOUTNAK_S  13
+/** USB_XCVRDLY : R/W; bitpos: [14]; default: 0;
+ *  0x0 : No delay between xcvr_sel and txvalid during Device chirp
+ *  0x1 : Enable delay between xcvr_sel and txvalid during Device chirp
+ */
+#define USB_XCVRDLY    (BIT(14))
+#define USB_XCVRDLY_M  (USB_XCVRDLY_V << USB_XCVRDLY_S)
+#define USB_XCVRDLY_V  0x00000001
+#define USB_XCVRDLY_S  14
+/** USB_ERRATICINTMSK : R/W; bitpos: [15]; default: 0;
+ *  0x0 : Early suspend interrupt is generated on erratic error
+ *  0x1: Mask early suspend interrupt on erratic error
+ */
+#define USB_ERRATICINTMSK    (BIT(15))
+#define USB_ERRATICINTMSK_M  (USB_ERRATICINTMSK_V << USB_ERRATICINTMSK_S)
+#define USB_ERRATICINTMSK_V  0x00000001
+#define USB_ERRATICINTMSK_S  15
+/** USB_EPMISCNT : R/W; bitpos: [23:18]; default: 4;
+ *  IN Endpoint Mismatch Count.
+ */
+#define USB_EPMISCNT    0x0000001F
+#define USB_EPMISCNT_M  (USB_EPMISCNT_V << USB_EPMISCNT_S)
+#define USB_EPMISCNT_V  0x0000001F
+#define USB_EPMISCNT_S  18
+/** USB_DESCDMA : R/W; bitpos: [23]; default: 0;
+ *  1'b0: Disable Scatter/Gather DMA
+ *  1'b1: Enable Scatter/Gather DMA
+ */
+#define USB_DESCDMA    (BIT(23))
+#define USB_DESCDMA_M  (USB_DESCDMA_V << USB_DESCDMA_S)
+#define USB_DESCDMA_V  0x00000001
+#define USB_DESCDMA_S  23
+/** USB_PERSCHINTVL : R/W; bitpos: [26:24]; default: 0;
+ *  Periodic Scheduling Interval
+ *  0x0 (MF25): 25% of (micro)Frame
+ *  0x1 (MF50): 50% of (micro)Frame
+ *  0x2 (MF75): 75% of (micro)Frame
+ *  0x3 (RESERVED): Reserved
+ */
+#define USB_PERSCHINTVL    0x00000003
+#define USB_PERSCHINTVL_M  (USB_PERSCHINTVL_V << USB_PERSCHINTVL_S)
+#define USB_PERSCHINTVL_V  0x00000003
+#define USB_PERSCHINTVL_S  24
+/** USB_RESVALID : R/W; bitpos: [32:26]; default: 2;
+ *  This field is effective only when DCFG.Ena32KHzSusp is set. It controls the resume
+ *  period when the core resumes from suspend.
+ *  The core counts for ResValid number of clock cycles to detect a valid resume when
+ *  this bit is set
+ */
+#define USB_RESVALID    0x0000003F
+#define USB_RESVALID_M  (USB_RESVALID_V << USB_RESVALID_S)
+#define USB_RESVALID_V  0x0000003F
+#define USB_RESVALID_S  26
+
+
+/** USB_DCTL_REG register
+ *  Device Control Register
+ */
+#define USB_DCTL_REG (SOC_DPORT_USB_BASE + 0x804)
+/** USB_RMTWKUPSIG : R/W; bitpos: [0]; default: 0;
+ *  0x0 : Core does not send Remote Wakeup Signaling
+ *  0x1 : Core sends Remote Wakeup Signalin
+ */
+#define USB_RMTWKUPSIG    (BIT(0))
+#define USB_RMTWKUPSIG_M  (USB_RMTWKUPSIG_V << USB_RMTWKUPSIG_S)
+#define USB_RMTWKUPSIG_V  0x00000001
+#define USB_RMTWKUPSIG_S  0
+/** USB_SFTDISCON : R/W; bitpos: [1]; default: 0;
+ *  1'b0: Normal operation. When this bit is cleared after a soft disconnect, the core
+ *  drives the phy_opmode_o signal on the UTMI+ to 2'b00, which generates a device
+ *  connect event to the USB host. When the device is reconnected, the USB host
+ *  restarts device enumeration
+ *  1'b1: The core drives the phy_opmode_o signal on the UTMI+ to  2'b01, which
+ *  generates a device disconnect event to the USB host
+ */
+#define USB_SFTDISCON    (BIT(1))
+#define USB_SFTDISCON_M  (USB_SFTDISCON_V << USB_SFTDISCON_S)
+#define USB_SFTDISCON_V  0x00000001
+#define USB_SFTDISCON_S  1
+/** USB_GNPINNAKSTS : RO; bitpos: [2]; default: 0;
+ *  0x0 : A handshake is sent out based on the data availability in the transmit FIFO
+ *  0x1 : A NAK handshake is sent out on all non-periodic  IN endpoints, irrespective
+ *  of the data availability in the transmit FIFO
+ */
+#define USB_GNPINNAKSTS    (BIT(2))
+#define USB_GNPINNAKSTS_M  (USB_GNPINNAKSTS_V << USB_GNPINNAKSTS_S)
+#define USB_GNPINNAKSTS_V  0x00000001
+#define USB_GNPINNAKSTS_S  2
+/** USB_GOUTNAKSTS : RO; bitpos: [3]; default: 0;
+ *  0x0 : A handshake is sent based on the FIFO Status and the NAK and STALL bit
+ *  settings
+ *  0x1 : No data is written to the RxFIFO, irrespective of  space availability. Sends
+ *  a NAK handshake on all packets, except on SETUP transactions. All isochronous OUT
+ *  packets are dropped
+ */
+#define USB_GOUTNAKSTS    (BIT(3))
+#define USB_GOUTNAKSTS_M  (USB_GOUTNAKSTS_V << USB_GOUTNAKSTS_S)
+#define USB_GOUTNAKSTS_V  0x00000001
+#define USB_GOUTNAKSTS_S  3
+/** USB_TSTCTL : R/W; bitpos: [7:4]; default: 0;
+ *  0x0: Test mode disabled
+ *  0x1: Test_J mode
+ *  0x2 : Test_K mode
+ *  0x3 : Test_SE0_NAK mode
+ *  0x4 : Test_Packet mode
+ *  0x5 : Test_force_Enable
+ */
+#define USB_TSTCTL    0x00000007
+#define USB_TSTCTL_M  (USB_TSTCTL_V << USB_TSTCTL_S)
+#define USB_TSTCTL_V  0x00000007
+#define USB_TSTCTL_S  4
+/** USB_SGNPINNAK : WO; bitpos: [7]; default: 0;
+ *  Set Global Non-periodic IN NAK. A write to this field sets the Global Non-periodic
+ *  IN NAK.The application uses this bit to send a NAK handshake on all non-periodic IN
+ *  endpoints. The core can also Set this bit when a timeout condition is detected on a
+ *  non-periodic endpoint in shared FIFO operation. The application must Set this bit
+ *  only after making sure that the Global IN NAK Effective bit in the Core Interrupt
+ *  Register (GINTSTS.GINNakEff) is cleared
+ */
+#define USB_SGNPINNAK    (BIT(7))
+#define USB_SGNPINNAK_M  (USB_SGNPINNAK_V << USB_SGNPINNAK_S)
+#define USB_SGNPINNAK_V  0x00000001
+#define USB_SGNPINNAK_S  7
+/** USB_CGNPINNAK : WO; bitpos: [8]; default: 0;
+ *  Clear Global Non-periodic IN NAK. A write to this field clears the Global
+ *  Non-periodic IN NAK.
+ */
+#define USB_CGNPINNAK    (BIT(8))
+#define USB_CGNPINNAK_M  (USB_CGNPINNAK_V << USB_CGNPINNAK_S)
+#define USB_CGNPINNAK_V  0x00000001
+#define USB_CGNPINNAK_S  8
+/** USB_SGOUTNAK : WO; bitpos: [9]; default: 0;
+ *  Set Global OUT NAK. A write to this field sets the Global OUT NAK. The application
+ *  uses this bit to send a NAK handshake on all OUT endpoints. The application must
+ *  set the this bit only after making sure that the Global OUT NAK Effective bit in
+ *  the Core Interrupt Register (GINTSTS.GOUTNakEff) is cleared.
+ */
+#define USB_SGOUTNAK    (BIT(9))
+#define USB_SGOUTNAK_M  (USB_SGOUTNAK_V << USB_SGOUTNAK_S)
+#define USB_SGOUTNAK_V  0x00000001
+#define USB_SGOUTNAK_S  9
+/** USB_CGOUTNAK : WO; bitpos: [10]; default: 0;
+ *  Clear Global OUT NAK. A write to this field clears the Global OUT NAK.
+ */
+#define USB_CGOUTNAK    (BIT(10))
+#define USB_CGOUTNAK_M  (USB_CGOUTNAK_V << USB_CGOUTNAK_S)
+#define USB_CGOUTNAK_V  0x00000001
+#define USB_CGOUTNAK_S  10
+/** USB_PWRONPRGDONE : R/W; bitpos: [11]; default: 0;
+ *  1'b0: Power-On Programming not done
+ *  1'b1: Power-On Programming Done
+ */
+#define USB_PWRONPRGDONE    (BIT(11))
+#define USB_PWRONPRGDONE_M  (USB_PWRONPRGDONE_V << USB_PWRONPRGDONE_S)
+#define USB_PWRONPRGDONE_V  0x00000001
+#define USB_PWRONPRGDONE_S  11
+/** USB_GMC : R/W; bitpos: [15:13]; default: 1;
+ *  Global Multi Count. applicable only for Scatter/Gather DMA mode
+ *  0x0 : Invalid
+ *  0x1 : 1 packet
+ *  0x2 : 2 packets
+ *  0x3 : 3 packets
+ */
+#define USB_GMC    0x00000003
+#define USB_GMC_M  (USB_GMC_V << USB_GMC_S)
+#define USB_GMC_V  0x00000003
+#define USB_GMC_S  13
+/** USB_IGNRFRMNUM : R/W; bitpos: [15]; default: 0;
+ *  0: The core transmits the packets only in the frame number in which they are
+ *  intended to be transmitted
+ *  1: The core ignores the frame number, sending packets immediately as the packets
+ *  are ready
+ */
+#define USB_IGNRFRMNUM    (BIT(15))
+#define USB_IGNRFRMNUM_M  (USB_IGNRFRMNUM_V << USB_IGNRFRMNUM_S)
+#define USB_IGNRFRMNUM_V  0x00000001
+#define USB_IGNRFRMNUM_S  15
+/** USB_NAKONBBLE : R/W; bitpos: [16]; default: 0;
+ *  1'b0: Disable NAK on Babble Error
+ *  1'b1: NAK on Babble Error
+ */
+#define USB_NAKONBBLE    (BIT(16))
+#define USB_NAKONBBLE_M  (USB_NAKONBBLE_V << USB_NAKONBBLE_S)
+#define USB_NAKONBBLE_V  0x00000001
+#define USB_NAKONBBLE_S  16
+/** USB_ENCOUNTONBNA : R/W; bitpos: [17]; default: 0;
+ *  1'b0: After receiving BNA interrupt,the core disables the endpoint. When the
+ *  endpoint is re-enabled by the application,the core starts processing from the
+ *  DOEPDMA descriptor
+ *  1'b1: After receiving BNA interrupt, the core disables the endpoint. When the
+ *  endpoint is re-enabled by the application, the core starts processing from the
+ *  descriptor that received the BNA interrupt
+ */
+#define USB_ENCOUNTONBNA    (BIT(17))
+#define USB_ENCOUNTONBNA_M  (USB_ENCOUNTONBNA_V << USB_ENCOUNTONBNA_S)
+#define USB_ENCOUNTONBNA_V  0x00000001
+#define USB_ENCOUNTONBNA_S  17
+/** USB_DEEPSLEEPBESLREJECT : R/W; bitpos: [18]; default: 0;
+ *  1'b0: Deep Sleep BESL Reject feature is disabled
+ *  1'b1: Deep Sleep BESL Reject feature is enabled
+ */
+#define USB_DEEPSLEEPBESLREJECT    (BIT(18))
+#define USB_DEEPSLEEPBESLREJECT_M  (USB_DEEPSLEEPBESLREJECT_V << USB_DEEPSLEEPBESLREJECT_S)
+#define USB_DEEPSLEEPBESLREJECT_V  0x00000001
+#define USB_DEEPSLEEPBESLREJECT_S  18
+
+
+/** USB_DVBUSDIS_REG register
+ *  Device VBUS Discharge Time Register
+ */
+#define USB_DVBUSDIS_REG (SOC_DPORT_USB_BASE + 0x828)
+/** USB_DVBUSDIS : R/W; bitpos: [16:0]; default: 6103;
+ *  Specifies the VBUS discharge time after VBUS pulsing during SRP. This value equals
+ *  (VBUS discharge time in PHY clocks) / 1, 024. The value you use depends whether the
+ *  PHY is operating at 30MHz (16-bit data width) or 60 MHz (8-bit data width).
+ *  Depending on your VBUS load, this value can need adjustment.
+ */
+#define USB_DVBUSDIS    0x0000FFFF
+#define USB_DVBUSDIS_M  (USB_DVBUSDIS_V << USB_DVBUSDIS_S)
+#define USB_DVBUSDIS_V  0x0000FFFF
+#define USB_DVBUSDIS_S  0
+
+
+/** USB_DVBUSPULSE_REG register
+ *  Device VBUS Pulsing Time Register
+ */
+#define USB_DVBUSPULSE_REG (SOC_DPORT_USB_BASE + 0x82c)
+/** USB_DVBUSPULSE : R/W; bitpos: [12:0]; default: 1464;
+ *  Specifies the VBUS pulsing time during SRP. This value equals (VBUS pulsing time in
+ *  PHY clocks) / 1, 024 The value you use depends whether the PHY is operating at
+ *  30MHz (16-bit data width) or 60 MHz (8-bit data width).
+ */
+#define USB_DVBUSPULSE    0x00000FFF
+#define USB_DVBUSPULSE_M  (USB_DVBUSPULSE_V << USB_DVBUSPULSE_S)
+#define USB_DVBUSPULSE_V  0x00000FFF
+#define USB_DVBUSPULSE_S  0
+
+
+/** USB_DTHRCTL_REG register
+ *  Device Threshold Control Register
+ */
+#define USB_DTHRCTL_REG (SOC_DPORT_USB_BASE + 0x830)
+/** USB_NONISOTHREN : R/W; bitpos: [0]; default: 0;
+ *  Non-ISO IN Endpoints Threshold Enable
+ *  0x0 : No thresholding
+ *  0x1 : Enable thresholding for non-isochronous IN endpoints
+ */
+#define USB_NONISOTHREN    (BIT(0))
+#define USB_NONISOTHREN_M  (USB_NONISOTHREN_V << USB_NONISOTHREN_S)
+#define USB_NONISOTHREN_V  0x00000001
+#define USB_NONISOTHREN_S  0
+/** USB_ISOTHREN : R/W; bitpos: [1]; default: 0;
+ *  ISO IN Endpoints Threshold Enable
+ *  0x0 : No thresholding
+ *  0x1 : Enables thresholding for isochronous IN endpoints
+ */
+#define USB_ISOTHREN    (BIT(1))
+#define USB_ISOTHREN_M  (USB_ISOTHREN_V << USB_ISOTHREN_S)
+#define USB_ISOTHREN_V  0x00000001
+#define USB_ISOTHREN_S  1
+/** USB_TXTHRLEN : R/W; bitpos: [11:2]; default: 8;
+ *  This field specifies Transmit thresholding size in DWORDS. This also forms the MAC
+ *  threshold and specifies the amount of data in bytes to be in the corresponding
+ *  endpoint transmit FIFO, before the core can start transmit on the USB. The
+ *  threshold length has to be at least eight DWORDS when the value of AHBThrRatio is
+ *  2'h00. In case the AHBThrRatio is non zero the application needs to ensure that the
+ *  AHB Threshold value does not go below the recommended eight DWORD. This field
+ *  controls both isochronous and non-isochronous IN endpoint thresholds. The
+ *  recommended value for ThrLen is to be the same as the programmed AHB Burst Length
+ *  (GAHBCFG.HBstLen).
+ */
+#define USB_TXTHRLEN    0x000001FF
+#define USB_TXTHRLEN_M  (USB_TXTHRLEN_V << USB_TXTHRLEN_S)
+#define USB_TXTHRLEN_V  0x000001FF
+#define USB_TXTHRLEN_S  2
+/** USB_AHBTHRRATIO : R/W; bitpos: [13:11]; default: 0;
+ *  2'b00: AHB threshold = MAC threshold
+ *  2'b01: AHB threshold = MAC threshold/2
+ *  2'b10: AHB threshold = MAC threshold/4
+ *  2'b11: AHB threshold = MAC threshold/8
+ */
+#define USB_AHBTHRRATIO    0x00000003
+#define USB_AHBTHRRATIO_M  (USB_AHBTHRRATIO_V << USB_AHBTHRRATIO_S)
+#define USB_AHBTHRRATIO_V  0x00000003
+#define USB_AHBTHRRATIO_S  11
+/** USB_RXTHREN : R/W; bitpos: [16]; default: 0;
+ *  0x0 : Disable thresholding
+ *  0x1 : Enable thresholding in the receive direction
+ */
+#define USB_RXTHREN    (BIT(16))
+#define USB_RXTHREN_M  (USB_RXTHREN_V << USB_RXTHREN_S)
+#define USB_RXTHREN_V  0x00000001
+#define USB_RXTHREN_S  16
+/** USB_RXTHRLEN : R/W; bitpos: [26:17]; default: 1;
+ *  Receive Threshold Length.  This field specifies Receive thresholding size in
+ *  DWORDS. This field also specifies the amount of data received on the USB before the
+ *  core can start transmitting on the AHB. The threshold length has to be at least
+ *  eight DWORDS. The recommended value for ThrLen is to be the same as the programmed
+ *  AHB Burst Length(GAHBCFG.HBstLen).
+ */
+#define USB_RXTHRLEN    0x000001FF
+#define USB_RXTHRLEN_M  (USB_RXTHRLEN_V << USB_RXTHRLEN_S)
+#define USB_RXTHRLEN_V  0x000001FF
+#define USB_RXTHRLEN_S  17
+/** USB_ARBPRKEN : R/W; bitpos: [27]; default: 1;
+ *  0x0 : Disable DMA arbiter parking
+ *  0x1 : Enable DMA arbiter parking for IN endpoints
+ */
+#define USB_ARBPRKEN    (BIT(27))
+#define USB_ARBPRKEN_M  (USB_ARBPRKEN_V << USB_ARBPRKEN_S)
+#define USB_ARBPRKEN_V  0x00000001
+#define USB_ARBPRKEN_S  27
+
+
+/** USB_DIEPCTL0_REG register
+ *  Device Control IN Endpoint $n Control Register
+ */
+#define USB_DIEPCTL0_REG (SOC_DPORT_USB_BASE + 0x900)
+/** USB_D_MPS0 : R/W; bitpos: [2:0]; default: 0;
+ *  Maximum Packet Size
+ *  0x0 : 64 bytes
+ *  0x1 : 32 bytes
+ *  0x2 : 16 bytes
+ *  0x3 : 8 bytes
+ */
+#define USB_D_MPS0    0x00000003
+#define USB_D_MPS0_M  (USB_D_MPS0_V << USB_D_MPS0_S)
+#define USB_D_MPS0_V  0x00000003
+#define USB_D_MPS0_S  0
+/** USB_D_USBACTEP0 : RO; bitpos: [15]; default: 1;
+ *  USB Active Endpoint
+ *  0x1 : Control endpoint is always active
+ */
+#define USB_D_USBACTEP0    (BIT(15))
+#define USB_D_USBACTEP0_M  (USB_D_USBACTEP0_V << USB_D_USBACTEP0_S)
+#define USB_D_USBACTEP0_V  0x00000001
+#define USB_D_USBACTEP0_S  15
+/** USB_D_NAKSTS0 : RO; bitpos: [17]; default: 0;
+ *  NAK Status
+ *  0x0 : The core is transmitting non-NAK handshakes based on the FIFO Status
+ *  0x1 : The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_D_NAKSTS0    (BIT(17))
+#define USB_D_NAKSTS0_M  (USB_D_NAKSTS0_V << USB_D_NAKSTS0_S)
+#define USB_D_NAKSTS0_V  0x00000001
+#define USB_D_NAKSTS0_S  17
+/** USB_D_EPTYPE0 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 0
+ */
+#define USB_D_EPTYPE0    0x00000003
+#define USB_D_EPTYPE0_M  (USB_D_EPTYPE0_V << USB_D_EPTYPE0_S)
+#define USB_D_EPTYPE0_V  0x00000003
+#define USB_D_EPTYPE0_S  18
+/** USB_D_STALL0 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it
+ *  0x0 : No Stall
+ *  0x1 : Stall Handshake
+ */
+#define USB_D_STALL0    (BIT(21))
+#define USB_D_STALL0_M  (USB_D_STALL0_V << USB_D_STALL0_S)
+#define USB_D_STALL0_V  0x00000001
+#define USB_D_STALL0_S  21
+/** USB_D_TXFNUM0 : R/W; bitpos: [26:22]; default: 0;
+ *  TxFIFO Number.
+ */
+#define USB_D_TXFNUM0    0x0000000F
+#define USB_D_TXFNUM0_M  (USB_D_TXFNUM0_V << USB_D_TXFNUM0_S)
+#define USB_D_TXFNUM0_V  0x0000000F
+#define USB_D_TXFNUM0_S  22
+/** USB_D_CNAK0 : WO; bitpos: [26]; default: 0;
+ *  A write to this bit clears the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_D_CNAK0    (BIT(26))
+#define USB_D_CNAK0_M  (USB_D_CNAK0_V << USB_D_CNAK0_S)
+#define USB_D_CNAK0_V  0x00000001
+#define USB_D_CNAK0_S  26
+/** USB_DI_SNAK0 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DI_SNAK0    (BIT(27))
+#define USB_DI_SNAK0_M  (USB_DI_SNAK0_V << USB_DI_SNAK0_S)
+#define USB_DI_SNAK0_V  0x00000001
+#define USB_DI_SNAK0_S  27
+/** USB_D_EPDIS0 : R/W; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No action
+ *  0x1 : Disabled Endpoint
+ */
+#define USB_D_EPDIS0    (BIT(30))
+#define USB_D_EPDIS0_M  (USB_D_EPDIS0_V << USB_D_EPDIS0_S)
+#define USB_D_EPDIS0_V  0x00000001
+#define USB_D_EPDIS0_S  30
+/** USB_D_EPENA0 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_D_EPENA0    (BIT(31))
+#define USB_D_EPENA0_M  (USB_D_EPENA0_V << USB_D_EPENA0_S)
+#define USB_D_EPENA0_V  0x00000001
+#define USB_D_EPENA0_S  31
+
+
+/** USB_DIEPTSIZ0_REG register
+ *  Device IN Endpoint 0 Transfer Size Register
+ */
+#define USB_DIEPTSIZ0_REG (SOC_DPORT_USB_BASE + 0x910)
+/** USB_D_XFERSIZE0 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size
+ *  IN Endpoints: The core decrements this field every time a packet from the external
+ *  memory is written to the TxFIFO
+ *  OUT Endpoints: The core decrements this field every time a  packet is read from the
+ *  RxFIFO and written to the external memory
+ */
+#define USB_D_XFERSIZE0    0x0000007F
+#define USB_D_XFERSIZE0_M  (USB_D_XFERSIZE0_V << USB_D_XFERSIZE0_S)
+#define USB_D_XFERSIZE0_V  0x0000007F
+#define USB_D_XFERSIZE0_S  0
+/** USB_D_PKTCNT0 : R/W; bitpos: [21:19]; default: 0;
+ *  Packet Count
+ *  IN Endpoints : This field is decremented every time a packet (maximum size or short
+ *  packet) is read from the TxFIFO
+ *  OUT Endpoints: This field is decremented every time a packet (maximum size or short
+ *  packet) is written to the RxFIFO
+ */
+#define USB_D_PKTCNT0    0x00000003
+#define USB_D_PKTCNT0_M  (USB_D_PKTCNT0_V << USB_D_PKTCNT0_S)
+#define USB_D_PKTCNT0_V  0x00000003
+#define USB_D_PKTCNT0_S  19
+
+
+/** USB_DIEPDMA0_REG register
+ *  Device IN Endpoint 0 DMA Address Register
+ */
+#define USB_DIEPDMA0_REG (SOC_DPORT_USB_BASE + 0x914)
+/** USB_D_DMAADDR0 : R/W; bitpos: [32:0]; default: 0;
+ *  This field holds the start address of the external memory for storing or fetching
+ *  endpoint data.
+ */
+#define USB_D_DMAADDR0    0xFFFFFFFF
+#define USB_D_DMAADDR0_M  (USB_D_DMAADDR0_V << USB_D_DMAADDR0_S)
+#define USB_D_DMAADDR0_V  0xFFFFFFFF
+#define USB_D_DMAADDR0_S  0
+
+
+/** USB_DIEPCTL1_REG register
+ *  Device Control IN Endpoint $n Control Register
+ */
+#define USB_DIEPCTL1_REG (SOC_DPORT_USB_BASE + 0x920)
+/** USB_D_MPS1 : R/W; bitpos: [2:0]; default: 0;
+ *  Maximum Packet Size
+ *  0x0 : 64 bytes
+ *  0x1 : 32 bytes
+ *  0x2 : 16 bytes
+ *  0x3 : 8 bytes
+ */
+#define USB_D_MPS1    0x00000003
+#define USB_D_MPS1_M  (USB_D_MPS1_V << USB_D_MPS1_S)
+#define USB_D_MPS1_V  0x00000003
+#define USB_D_MPS1_S  0
+/** USB_D_USBACTEP1 : RO; bitpos: [15]; default: 1;
+ *  USB Active Endpoint
+ *  0x1 : Control endpoint is always active
+ */
+#define USB_D_USBACTEP1    (BIT(15))
+#define USB_D_USBACTEP1_M  (USB_D_USBACTEP1_V << USB_D_USBACTEP1_S)
+#define USB_D_USBACTEP1_V  0x00000001
+#define USB_D_USBACTEP1_S  15
+/** USB_D_NAKSTS1 : RO; bitpos: [17]; default: 0;
+ *  NAK Status
+ *  0x0 : The core is transmitting non-NAK handshakes based on the FIFO Status
+ *  0x1 : The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_D_NAKSTS1    (BIT(17))
+#define USB_D_NAKSTS1_M  (USB_D_NAKSTS1_V << USB_D_NAKSTS1_S)
+#define USB_D_NAKSTS1_V  0x00000001
+#define USB_D_NAKSTS1_S  17
+/** USB_D_EPTYPE1 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 0
+ */
+#define USB_D_EPTYPE1    0x00000003
+#define USB_D_EPTYPE1_M  (USB_D_EPTYPE1_V << USB_D_EPTYPE1_S)
+#define USB_D_EPTYPE1_V  0x00000003
+#define USB_D_EPTYPE1_S  18
+/** USB_D_STALL1 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it
+ *  0x0 : No Stall
+ *  0x1 : Stall Handshake
+ */
+#define USB_D_STALL1    (BIT(21))
+#define USB_D_STALL1_M  (USB_D_STALL1_V << USB_D_STALL1_S)
+#define USB_D_STALL1_V  0x00000001
+#define USB_D_STALL1_S  21
+/** USB_D_TXFNUM1 : R/W; bitpos: [26:22]; default: 0;
+ *  TxFIFO Number.
+ */
+#define USB_D_TXFNUM1    0x0000000F
+#define USB_D_TXFNUM1_M  (USB_D_TXFNUM1_V << USB_D_TXFNUM1_S)
+#define USB_D_TXFNUM1_V  0x0000000F
+#define USB_D_TXFNUM1_S  22
+/** USB_D_CNAK1 : WO; bitpos: [26]; default: 0;
+ *  A write to this bit clears the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_D_CNAK1    (BIT(26))
+#define USB_D_CNAK1_M  (USB_D_CNAK1_V << USB_D_CNAK1_S)
+#define USB_D_CNAK1_V  0x00000001
+#define USB_D_CNAK1_S  26
+/** USB_DI_SNAK1 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DI_SNAK1    (BIT(27))
+#define USB_DI_SNAK1_M  (USB_DI_SNAK1_V << USB_DI_SNAK1_S)
+#define USB_DI_SNAK1_V  0x00000001
+#define USB_DI_SNAK1_S  27
+/** USB_DI_SETD0PID1 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DI_SETD0PID1    (BIT(28))
+#define USB_DI_SETD0PID1_M  (USB_DI_SETD0PID1_V << USB_DI_SETD0PID1_S)
+#define USB_DI_SETD0PID1_V  0x00000001
+#define USB_DI_SETD0PID1_S  28
+/** USB_DI_SETD1PID1 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DI_SETD1PID1    (BIT(29))
+#define USB_DI_SETD1PID1_M  (USB_DI_SETD1PID1_V << USB_DI_SETD1PID1_S)
+#define USB_DI_SETD1PID1_V  0x00000001
+#define USB_DI_SETD1PID1_S  29
+/** USB_D_EPDIS1 : R/W; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No action
+ *  0x1 : Disabled Endpoint
+ */
+#define USB_D_EPDIS1    (BIT(30))
+#define USB_D_EPDIS1_M  (USB_D_EPDIS1_V << USB_D_EPDIS1_S)
+#define USB_D_EPDIS1_V  0x00000001
+#define USB_D_EPDIS1_S  30
+/** USB_D_EPENA1 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_D_EPENA1    (BIT(31))
+#define USB_D_EPENA1_M  (USB_D_EPENA1_V << USB_D_EPENA1_S)
+#define USB_D_EPENA1_V  0x00000001
+#define USB_D_EPENA1_S  31
+
+
+/** USB_DIEPTSIZ1_REG register
+ *  Device IN Endpoint 1 Transfer Size Register
+ */
+#define USB_DIEPTSIZ1_REG (SOC_DPORT_USB_BASE + 0x930)
+/** USB_D_XFERSIZE1 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size
+ *  IN Endpoints: The core decrements this field every time a packet from the external
+ *  memory is written to the TxFIFO
+ *  OUT Endpoints: The core decrements this field every time a  packet is read from the
+ *  RxFIFO and written to the external memory
+ */
+#define USB_D_XFERSIZE1    0x0000007F
+#define USB_D_XFERSIZE1_M  (USB_D_XFERSIZE1_V << USB_D_XFERSIZE1_S)
+#define USB_D_XFERSIZE1_V  0x0000007F
+#define USB_D_XFERSIZE1_S  0
+/** USB_D_PKTCNT1 : R/W; bitpos: [21:19]; default: 0;
+ *  Packet Count
+ *  IN Endpoints : This field is decremented every time a packet (maximum size or short
+ *  packet) is read from the TxFIFO
+ *  OUT Endpoints: This field is decremented every time a packet (maximum size or short
+ *  packet) is written to the RxFIFO
+ */
+#define USB_D_PKTCNT1    0x00000003
+#define USB_D_PKTCNT1_M  (USB_D_PKTCNT1_V << USB_D_PKTCNT1_S)
+#define USB_D_PKTCNT1_V  0x00000003
+#define USB_D_PKTCNT1_S  19
+
+
+/** USB_DIEPDMA1_REG register
+ *  Device IN Endpoint 1 DMA Address Register
+ */
+#define USB_DIEPDMA1_REG (SOC_DPORT_USB_BASE + 0x934)
+/** USB_D_DMAADDR1 : R/W; bitpos: [32:0]; default: 0;
+ *  This field holds the start address of the external memory for storing or fetching
+ *  endpoint data.
+ */
+#define USB_D_DMAADDR1    0xFFFFFFFF
+#define USB_D_DMAADDR1_M  (USB_D_DMAADDR1_V << USB_D_DMAADDR1_S)
+#define USB_D_DMAADDR1_V  0xFFFFFFFF
+#define USB_D_DMAADDR1_S  0
+
+
+/** USB_DIEPCTL2_REG register
+ *  Device Control IN Endpoint 2 Control Register
+ */
+#define USB_DIEPCTL2_REG (SOC_DPORT_USB_BASE + 0x940)
+/** USB_D_MPS2 : R/W; bitpos: [2:0]; default: 0;
+ *  Maximum Packet Size
+ *  0x0 : 64 bytes
+ *  0x1 : 32 bytes
+ *  0x2 : 16 bytes
+ *  0x3 : 8 bytes
+ */
+#define USB_D_MPS2    0x00000003
+#define USB_D_MPS2_M  (USB_D_MPS2_V << USB_D_MPS2_S)
+#define USB_D_MPS2_V  0x00000003
+#define USB_D_MPS2_S  0
+/** USB_D_USBACTEP2 : RO; bitpos: [15]; default: 1;
+ *  USB Active Endpoint
+ *  0x1 : Control endpoint is always active
+ */
+#define USB_D_USBACTEP2    (BIT(15))
+#define USB_D_USBACTEP2_M  (USB_D_USBACTEP2_V << USB_D_USBACTEP2_S)
+#define USB_D_USBACTEP2_V  0x00000001
+#define USB_D_USBACTEP2_S  15
+/** USB_D_NAKSTS2 : RO; bitpos: [17]; default: 0;
+ *  NAK Status
+ *  0x0 : The core is transmitting non-NAK handshakes based on the FIFO Status
+ *  0x1 : The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_D_NAKSTS2    (BIT(17))
+#define USB_D_NAKSTS2_M  (USB_D_NAKSTS2_V << USB_D_NAKSTS2_S)
+#define USB_D_NAKSTS2_V  0x00000001
+#define USB_D_NAKSTS2_S  17
+/** USB_D_EPTYPE2 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 0
+ */
+#define USB_D_EPTYPE2    0x00000003
+#define USB_D_EPTYPE2_M  (USB_D_EPTYPE2_V << USB_D_EPTYPE2_S)
+#define USB_D_EPTYPE2_V  0x00000003
+#define USB_D_EPTYPE2_S  18
+/** USB_D_STALL2 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it
+ *  0x0 : No Stall
+ *  0x1 : Stall Handshake
+ */
+#define USB_D_STALL2    (BIT(21))
+#define USB_D_STALL2_M  (USB_D_STALL2_V << USB_D_STALL2_S)
+#define USB_D_STALL2_V  0x00000001
+#define USB_D_STALL2_S  21
+/** USB_D_TXFNUM2 : R/W; bitpos: [26:22]; default: 0;
+ *  TxFIFO Number.
+ */
+#define USB_D_TXFNUM2    0x0000000F
+#define USB_D_TXFNUM2_M  (USB_D_TXFNUM2_V << USB_D_TXFNUM2_S)
+#define USB_D_TXFNUM2_V  0x0000000F
+#define USB_D_TXFNUM2_S  22
+/** USB_D_CNAK2 : WO; bitpos: [26]; default: 0;
+ *  A write to this bit clears the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_D_CNAK2    (BIT(26))
+#define USB_D_CNAK2_M  (USB_D_CNAK2_V << USB_D_CNAK2_S)
+#define USB_D_CNAK2_V  0x00000001
+#define USB_D_CNAK2_S  26
+/** USB_DI_SNAK2 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DI_SNAK2    (BIT(27))
+#define USB_DI_SNAK2_M  (USB_DI_SNAK2_V << USB_DI_SNAK2_S)
+#define USB_DI_SNAK2_V  0x00000001
+#define USB_DI_SNAK2_S  27
+/** USB_DI_SETD0PID2 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DI_SETD0PID2    (BIT(28))
+#define USB_DI_SETD0PID2_M  (USB_DI_SETD0PID2_V << USB_DI_SETD0PID2_S)
+#define USB_DI_SETD0PID2_V  0x00000001
+#define USB_DI_SETD0PID2_S  28
+/** USB_DI_SETD1PID2 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DI_SETD1PID2    (BIT(29))
+#define USB_DI_SETD1PID2_M  (USB_DI_SETD1PID2_V << USB_DI_SETD1PID2_S)
+#define USB_DI_SETD1PID2_V  0x00000001
+#define USB_DI_SETD1PID2_S  29
+/** USB_D_EPDIS2 : R/W; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No action
+ *  0x1 : Disabled Endpoint
+ */
+#define USB_D_EPDIS2    (BIT(30))
+#define USB_D_EPDIS2_M  (USB_D_EPDIS2_V << USB_D_EPDIS2_S)
+#define USB_D_EPDIS2_V  0x00000001
+#define USB_D_EPDIS2_S  30
+/** USB_D_EPENA2 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_D_EPENA2    (BIT(31))
+#define USB_D_EPENA2_M  (USB_D_EPENA2_V << USB_D_EPENA2_S)
+#define USB_D_EPENA2_V  0x00000001
+#define USB_D_EPENA2_S  31
+
+
+/** USB_DIEPTSIZ2_REG register
+ *  Device IN Endpoint 2 Transfer Size Register
+ */
+#define USB_DIEPTSIZ2_REG (SOC_DPORT_USB_BASE + 0x950)
+/** USB_D_XFERSIZE2 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size
+ *  IN Endpoints: The core decrements this field every time a packet from the external
+ *  memory is written to the TxFIFO
+ *  OUT Endpoints: The core decrements this field every time a  packet is read from the
+ *  RxFIFO and written to the external memory
+ */
+#define USB_D_XFERSIZE2    0x0000007F
+#define USB_D_XFERSIZE2_M  (USB_D_XFERSIZE2_V << USB_D_XFERSIZE2_S)
+#define USB_D_XFERSIZE2_V  0x0000007F
+#define USB_D_XFERSIZE2_S  0
+/** USB_D_PKTCNT2 : R/W; bitpos: [21:19]; default: 0;
+ *  Packet Count
+ *  IN Endpoints : This field is decremented every time a packet (maximum size or short
+ *  packet) is read from the TxFIFO
+ *  OUT Endpoints: This field is decremented every time a packet (maximum size or short
+ *  packet) is written to the RxFIFO
+ */
+#define USB_D_PKTCNT2    0x00000003
+#define USB_D_PKTCNT2_M  (USB_D_PKTCNT2_V << USB_D_PKTCNT2_S)
+#define USB_D_PKTCNT2_V  0x00000003
+#define USB_D_PKTCNT2_S  19
+
+
+/** USB_DIEPDMA2_REG register
+ *  Device IN Endpoint 2 DMA Address Register
+ */
+#define USB_DIEPDMA2_REG (SOC_DPORT_USB_BASE + 0x954)
+/** USB_D_DMAADDR2 : R/W; bitpos: [32:0]; default: 0;
+ *  This field holds the start address of the external memory for storing or fetching
+ *  endpoint data.
+ */
+#define USB_D_DMAADDR2    0xFFFFFFFF
+#define USB_D_DMAADDR2_M  (USB_D_DMAADDR2_V << USB_D_DMAADDR2_S)
+#define USB_D_DMAADDR2_V  0xFFFFFFFF
+#define USB_D_DMAADDR2_S  0
+
+
+/** USB_DIEPCTL3_REG register
+ *  Device Control IN Endpoint $n Control Register
+ */
+#define USB_DIEPCTL3_REG (SOC_DPORT_USB_BASE + 0x960)
+/** USB_DI_MPS3 : R/W; bitpos: [2:0]; default: 0;
+ *  Maximum Packet Size
+ *  0x0 : 64 bytes
+ *  0x1 : 32 bytes
+ *  0x2 : 16 bytes
+ *  0x3 : 8 bytes
+ */
+#define USB_DI_MPS3    0x00000003
+#define USB_DI_MPS3_M  (USB_DI_MPS3_V << USB_DI_MPS3_S)
+#define USB_DI_MPS3_V  0x00000003
+#define USB_DI_MPS3_S  0
+/** USB_DI_USBACTEP3 : RO; bitpos: [15]; default: 1;
+ *  USB Active Endpoint
+ *  0x1 : Control endpoint is always active
+ */
+#define USB_DI_USBACTEP3    (BIT(15))
+#define USB_DI_USBACTEP3_M  (USB_DI_USBACTEP3_V << USB_DI_USBACTEP3_S)
+#define USB_DI_USBACTEP3_V  0x00000001
+#define USB_DI_USBACTEP3_S  15
+/** USB_DI_NAKSTS3 : RO; bitpos: [17]; default: 0;
+ *  NAK Status
+ *  0x0 : The core is transmitting non-NAK handshakes based on the FIFO Status
+ *  0x1 : The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_DI_NAKSTS3    (BIT(17))
+#define USB_DI_NAKSTS3_M  (USB_DI_NAKSTS3_V << USB_DI_NAKSTS3_S)
+#define USB_DI_NAKSTS3_V  0x00000001
+#define USB_DI_NAKSTS3_S  17
+/** USB_DI_EPTYPE3 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 0
+ */
+#define USB_DI_EPTYPE3    0x00000003
+#define USB_DI_EPTYPE3_M  (USB_DI_EPTYPE3_V << USB_DI_EPTYPE3_S)
+#define USB_DI_EPTYPE3_V  0x00000003
+#define USB_DI_EPTYPE3_S  18
+/** USB_DI_STALL3 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it
+ *  0x0 : No Stall
+ *  0x1 : Stall Handshake
+ */
+#define USB_DI_STALL3    (BIT(21))
+#define USB_DI_STALL3_M  (USB_DI_STALL3_V << USB_DI_STALL3_S)
+#define USB_DI_STALL3_V  0x00000001
+#define USB_DI_STALL3_S  21
+/** USB_DI_TXFNUM3 : R/W; bitpos: [26:22]; default: 0;
+ *  TxFIFO Number.
+ */
+#define USB_DI_TXFNUM3    0x0000000F
+#define USB_DI_TXFNUM3_M  (USB_DI_TXFNUM3_V << USB_DI_TXFNUM3_S)
+#define USB_DI_TXFNUM3_V  0x0000000F
+#define USB_DI_TXFNUM3_S  22
+/** USB_DI_CNAK3 : WO; bitpos: [26]; default: 0;
+ *  A write to this bit clears the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_DI_CNAK3    (BIT(26))
+#define USB_DI_CNAK3_M  (USB_DI_CNAK3_V << USB_DI_CNAK3_S)
+#define USB_DI_CNAK3_V  0x00000001
+#define USB_DI_CNAK3_S  26
+/** USB_DI_SNAK3 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DI_SNAK3    (BIT(27))
+#define USB_DI_SNAK3_M  (USB_DI_SNAK3_V << USB_DI_SNAK3_S)
+#define USB_DI_SNAK3_V  0x00000001
+#define USB_DI_SNAK3_S  27
+/** USB_DI_SETD0PID3 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DI_SETD0PID3    (BIT(28))
+#define USB_DI_SETD0PID3_M  (USB_DI_SETD0PID3_V << USB_DI_SETD0PID3_S)
+#define USB_DI_SETD0PID3_V  0x00000001
+#define USB_DI_SETD0PID3_S  28
+/** USB_DI_SETD1PID3 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DI_SETD1PID3    (BIT(29))
+#define USB_DI_SETD1PID3_M  (USB_DI_SETD1PID3_V << USB_DI_SETD1PID3_S)
+#define USB_DI_SETD1PID3_V  0x00000001
+#define USB_DI_SETD1PID3_S  29
+/** USB_DI_EPDIS3 : R/W; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No action
+ *  0x1 : Disabled Endpoint
+ */
+#define USB_DI_EPDIS3    (BIT(30))
+#define USB_DI_EPDIS3_M  (USB_DI_EPDIS3_V << USB_DI_EPDIS3_S)
+#define USB_DI_EPDIS3_V  0x00000001
+#define USB_DI_EPDIS3_S  30
+/** USB_DI_EPENA3 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_DI_EPENA3    (BIT(31))
+#define USB_DI_EPENA3_M  (USB_DI_EPENA3_V << USB_DI_EPENA3_S)
+#define USB_DI_EPENA3_V  0x00000001
+#define USB_DI_EPENA3_S  31
+
+
+/** USB_DIEPTSIZ3_REG register
+ *  Device IN Endpoint 3 Transfer Size Register
+ */
+#define USB_DIEPTSIZ3_REG (SOC_DPORT_USB_BASE + 0x970)
+/** USB_D_XFERSIZE3 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size
+ *  IN Endpoints: The core decrements this field every time a packet from the external
+ *  memory is written to the TxFIFO
+ *  OUT Endpoints: The core decrements this field every time a  packet is read from the
+ *  RxFIFO and written to the external memory
+ */
+#define USB_D_XFERSIZE3    0x0000007F
+#define USB_D_XFERSIZE3_M  (USB_D_XFERSIZE3_V << USB_D_XFERSIZE3_S)
+#define USB_D_XFERSIZE3_V  0x0000007F
+#define USB_D_XFERSIZE3_S  0
+/** USB_D_PKTCNT3 : R/W; bitpos: [21:19]; default: 0;
+ *  Packet Count
+ *  IN Endpoints : This field is decremented every time a packet (maximum size or short
+ *  packet) is read from the TxFIFO
+ *  OUT Endpoints: This field is decremented every time a packet (maximum size or short
+ *  packet) is written to the RxFIFO
+ */
+#define USB_D_PKTCNT3    0x00000003
+#define USB_D_PKTCNT3_M  (USB_D_PKTCNT3_V << USB_D_PKTCNT3_S)
+#define USB_D_PKTCNT3_V  0x00000003
+#define USB_D_PKTCNT3_S  19
+
+
+/** USB_DIEPDMA3_REG register
+ *  Device IN Endpoint 3 DMA Address Register
+ */
+#define USB_DIEPDMA3_REG (SOC_DPORT_USB_BASE + 0x974)
+/** USB_D_DMAADDR3 : R/W; bitpos: [32:0]; default: 0;
+ *  This field holds the start address of the external memory for storing or fetching
+ *  endpoint data.
+ */
+#define USB_D_DMAADDR3    0xFFFFFFFF
+#define USB_D_DMAADDR3_M  (USB_D_DMAADDR3_V << USB_D_DMAADDR3_S)
+#define USB_D_DMAADDR3_V  0xFFFFFFFF
+#define USB_D_DMAADDR3_S  0
+
+
+/** USB_DIEPCTL4_REG register
+ *  Device Control IN Endpoint $n Control Register
+ */
+#define USB_DIEPCTL4_REG (SOC_DPORT_USB_BASE + 0x980)
+/** USB_D_MPS4 : R/W; bitpos: [2:0]; default: 0;
+ *  Maximum Packet Size
+ *  0x0 : 64 bytes
+ *  0x1 : 32 bytes
+ *  0x2 : 16 bytes
+ *  0x3 : 8 bytes
+ */
+#define USB_D_MPS4    0x00000003
+#define USB_D_MPS4_M  (USB_D_MPS4_V << USB_D_MPS4_S)
+#define USB_D_MPS4_V  0x00000003
+#define USB_D_MPS4_S  0
+/** USB_D_USBACTEP4 : RO; bitpos: [15]; default: 1;
+ *  USB Active Endpoint
+ *  0x1 : Control endpoint is always active
+ */
+#define USB_D_USBACTEP4    (BIT(15))
+#define USB_D_USBACTEP4_M  (USB_D_USBACTEP4_V << USB_D_USBACTEP4_S)
+#define USB_D_USBACTEP4_V  0x00000001
+#define USB_D_USBACTEP4_S  15
+/** USB_D_NAKSTS4 : RO; bitpos: [17]; default: 0;
+ *  NAK Status
+ *  0x0 : The core is transmitting non-NAK handshakes based on the FIFO Status
+ *  0x1 : The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_D_NAKSTS4    (BIT(17))
+#define USB_D_NAKSTS4_M  (USB_D_NAKSTS4_V << USB_D_NAKSTS4_S)
+#define USB_D_NAKSTS4_V  0x00000001
+#define USB_D_NAKSTS4_S  17
+/** USB_D_EPTYPE4 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 0
+ */
+#define USB_D_EPTYPE4    0x00000003
+#define USB_D_EPTYPE4_M  (USB_D_EPTYPE4_V << USB_D_EPTYPE4_S)
+#define USB_D_EPTYPE4_V  0x00000003
+#define USB_D_EPTYPE4_S  18
+/** USB_D_STALL4 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it
+ *  0x0 : No Stall
+ *  0x1 : Stall Handshake
+ */
+#define USB_D_STALL4    (BIT(21))
+#define USB_D_STALL4_M  (USB_D_STALL4_V << USB_D_STALL4_S)
+#define USB_D_STALL4_V  0x00000001
+#define USB_D_STALL4_S  21
+/** USB_D_TXFNUM4 : R/W; bitpos: [26:22]; default: 0;
+ *  TxFIFO Number.
+ */
+#define USB_D_TXFNUM4    0x0000000F
+#define USB_D_TXFNUM4_M  (USB_D_TXFNUM4_V << USB_D_TXFNUM4_S)
+#define USB_D_TXFNUM4_V  0x0000000F
+#define USB_D_TXFNUM4_S  22
+/** USB_D_CNAK4 : WO; bitpos: [26]; default: 0;
+ *  A write to this bit clears the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_D_CNAK4    (BIT(26))
+#define USB_D_CNAK4_M  (USB_D_CNAK4_V << USB_D_CNAK4_S)
+#define USB_D_CNAK4_V  0x00000001
+#define USB_D_CNAK4_S  26
+/** USB_DI_SNAK4 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DI_SNAK4    (BIT(27))
+#define USB_DI_SNAK4_M  (USB_DI_SNAK4_V << USB_DI_SNAK4_S)
+#define USB_DI_SNAK4_V  0x00000001
+#define USB_DI_SNAK4_S  27
+/** USB_DI_SETD0PID4 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DI_SETD0PID4    (BIT(28))
+#define USB_DI_SETD0PID4_M  (USB_DI_SETD0PID4_V << USB_DI_SETD0PID4_S)
+#define USB_DI_SETD0PID4_V  0x00000001
+#define USB_DI_SETD0PID4_S  28
+/** USB_DI_SETD1PID4 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DI_SETD1PID4    (BIT(29))
+#define USB_DI_SETD1PID4_M  (USB_DI_SETD1PID4_V << USB_DI_SETD1PID4_S)
+#define USB_DI_SETD1PID4_V  0x00000001
+#define USB_DI_SETD1PID4_S  29
+/** USB_D_EPDIS4 : R/W; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No action
+ *  0x1 : Disabled Endpoint
+ */
+#define USB_D_EPDIS4    (BIT(30))
+#define USB_D_EPDIS4_M  (USB_D_EPDIS4_V << USB_D_EPDIS4_S)
+#define USB_D_EPDIS4_V  0x00000001
+#define USB_D_EPDIS4_S  30
+/** USB_D_EPENA4 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_D_EPENA4    (BIT(31))
+#define USB_D_EPENA4_M  (USB_D_EPENA4_V << USB_D_EPENA4_S)
+#define USB_D_EPENA4_V  0x00000001
+#define USB_D_EPENA4_S  31
+
+
+/** USB_DIEPTSIZ4_REG register
+ *  Device IN Endpoint 4 Transfer Size Register
+ */
+#define USB_DIEPTSIZ4_REG (SOC_DPORT_USB_BASE + 0x990)
+/** USB_D_XFERSIZE4 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size
+ *  IN Endpoints: The core decrements this field every time a packet from the external
+ *  memory is written to the TxFIFO
+ *  OUT Endpoints: The core decrements this field every time a  packet is read from the
+ *  RxFIFO and written to the external memory
+ */
+#define USB_D_XFERSIZE4    0x0000007F
+#define USB_D_XFERSIZE4_M  (USB_D_XFERSIZE4_V << USB_D_XFERSIZE4_S)
+#define USB_D_XFERSIZE4_V  0x0000007F
+#define USB_D_XFERSIZE4_S  0
+/** USB_D_PKTCNT4 : R/W; bitpos: [21:19]; default: 0;
+ *  Packet Count
+ *  IN Endpoints : This field is decremented every time a packet (maximum size or short
+ *  packet) is read from the TxFIFO
+ *  OUT Endpoints: This field is decremented every time a packet (maximum size or short
+ *  packet) is written to the RxFIFO
+ */
+#define USB_D_PKTCNT4    0x00000003
+#define USB_D_PKTCNT4_M  (USB_D_PKTCNT4_V << USB_D_PKTCNT4_S)
+#define USB_D_PKTCNT4_V  0x00000003
+#define USB_D_PKTCNT4_S  19
+
+
+/** USB_DIEPDMA4_REG register
+ *  Device IN Endpoint 4 DMA Address Register
+ */
+#define USB_DIEPDMA4_REG (SOC_DPORT_USB_BASE + 0x994)
+/** USB_D_DMAADDR4 : R/W; bitpos: [32:0]; default: 0;
+ *  This field holds the start address of the external memory for storing or fetching
+ *  endpoint data.
+ */
+#define USB_D_DMAADDR4    0xFFFFFFFF
+#define USB_D_DMAADDR4_M  (USB_D_DMAADDR4_V << USB_D_DMAADDR4_S)
+#define USB_D_DMAADDR4_V  0xFFFFFFFF
+#define USB_D_DMAADDR4_S  0
+
+
+/** USB_DIEPCTL5_REG register
+ *  Device Control IN Endpoint $n Control Register
+ */
+#define USB_DIEPCTL5_REG (SOC_DPORT_USB_BASE + 0x9a0)
+/** USB_DI_MPS5 : R/W; bitpos: [2:0]; default: 0;
+ *  Maximum Packet Size
+ *  0x0 : 64 bytes
+ *  0x1 : 32 bytes
+ *  0x2 : 16 bytes
+ *  0x3 : 8 bytes
+ */
+#define USB_DI_MPS5    0x00000003
+#define USB_DI_MPS5_M  (USB_DI_MPS5_V << USB_DI_MPS5_S)
+#define USB_DI_MPS5_V  0x00000003
+#define USB_DI_MPS5_S  0
+/** USB_DI_USBACTEP5 : RO; bitpos: [15]; default: 1;
+ *  USB Active Endpoint
+ *  0x1 : Control endpoint is always active
+ */
+#define USB_DI_USBACTEP5    (BIT(15))
+#define USB_DI_USBACTEP5_M  (USB_DI_USBACTEP5_V << USB_DI_USBACTEP5_S)
+#define USB_DI_USBACTEP5_V  0x00000001
+#define USB_DI_USBACTEP5_S  15
+/** USB_DI_NAKSTS5 : RO; bitpos: [17]; default: 0;
+ *  NAK Status
+ *  0x0 : The core is transmitting non-NAK handshakes based on the FIFO Status
+ *  0x1 : The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_DI_NAKSTS5    (BIT(17))
+#define USB_DI_NAKSTS5_M  (USB_DI_NAKSTS5_V << USB_DI_NAKSTS5_S)
+#define USB_DI_NAKSTS5_V  0x00000001
+#define USB_DI_NAKSTS5_S  17
+/** USB_DI_EPTYPE5 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 0
+ */
+#define USB_DI_EPTYPE5    0x00000003
+#define USB_DI_EPTYPE5_M  (USB_DI_EPTYPE5_V << USB_DI_EPTYPE5_S)
+#define USB_DI_EPTYPE5_V  0x00000003
+#define USB_DI_EPTYPE5_S  18
+/** USB_DI_STALL5 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it
+ *  0x0 : No Stall
+ *  0x1 : Stall Handshake
+ */
+#define USB_DI_STALL5    (BIT(21))
+#define USB_DI_STALL5_M  (USB_DI_STALL5_V << USB_DI_STALL5_S)
+#define USB_DI_STALL5_V  0x00000001
+#define USB_DI_STALL5_S  21
+/** USB_DI_TXFNUM5 : R/W; bitpos: [26:22]; default: 0;
+ *  TxFIFO Number.
+ */
+#define USB_DI_TXFNUM5    0x0000000F
+#define USB_DI_TXFNUM5_M  (USB_DI_TXFNUM5_V << USB_DI_TXFNUM5_S)
+#define USB_DI_TXFNUM5_V  0x0000000F
+#define USB_DI_TXFNUM5_S  22
+/** USB_DI_CNAK5 : WO; bitpos: [26]; default: 0;
+ *  A write to this bit clears the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_DI_CNAK5    (BIT(26))
+#define USB_DI_CNAK5_M  (USB_DI_CNAK5_V << USB_DI_CNAK5_S)
+#define USB_DI_CNAK5_V  0x00000001
+#define USB_DI_CNAK5_S  26
+/** USB_DI_SNAK5 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DI_SNAK5    (BIT(27))
+#define USB_DI_SNAK5_M  (USB_DI_SNAK5_V << USB_DI_SNAK5_S)
+#define USB_DI_SNAK5_V  0x00000001
+#define USB_DI_SNAK5_S  27
+/** USB_DI_SETD0PID5 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DI_SETD0PID5    (BIT(28))
+#define USB_DI_SETD0PID5_M  (USB_DI_SETD0PID5_V << USB_DI_SETD0PID5_S)
+#define USB_DI_SETD0PID5_V  0x00000001
+#define USB_DI_SETD0PID5_S  28
+/** USB_DI_SETD1PID5 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DI_SETD1PID5    (BIT(29))
+#define USB_DI_SETD1PID5_M  (USB_DI_SETD1PID5_V << USB_DI_SETD1PID5_S)
+#define USB_DI_SETD1PID5_V  0x00000001
+#define USB_DI_SETD1PID5_S  29
+/** USB_DI_EPDIS5 : R/W; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No action
+ *  0x1 : Disabled Endpoint
+ */
+#define USB_DI_EPDIS5    (BIT(30))
+#define USB_DI_EPDIS5_M  (USB_DI_EPDIS5_V << USB_DI_EPDIS5_S)
+#define USB_DI_EPDIS5_V  0x00000001
+#define USB_DI_EPDIS5_S  30
+/** USB_DI_EPENA5 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_DI_EPENA5    (BIT(31))
+#define USB_DI_EPENA5_M  (USB_DI_EPENA5_V << USB_DI_EPENA5_S)
+#define USB_DI_EPENA5_V  0x00000001
+#define USB_DI_EPENA5_S  31
+
+
+/** USB_DIEPTSIZ5_REG register
+ *  Device IN Endpoint 5 Transfer Size Register
+ */
+#define USB_DIEPTSIZ5_REG (SOC_DPORT_USB_BASE + 0x9b0)
+/** USB_D_XFERSIZE5 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size
+ *  IN Endpoints: The core decrements this field every time a packet from the external
+ *  memory is written to the TxFIFO
+ *  OUT Endpoints: The core decrements this field every time a  packet is read from the
+ *  RxFIFO and written to the external memory
+ */
+#define USB_D_XFERSIZE5    0x0000007F
+#define USB_D_XFERSIZE5_M  (USB_D_XFERSIZE5_V << USB_D_XFERSIZE5_S)
+#define USB_D_XFERSIZE5_V  0x0000007F
+#define USB_D_XFERSIZE5_S  0
+/** USB_D_PKTCNT5 : R/W; bitpos: [21:19]; default: 0;
+ *  Packet Count
+ *  IN Endpoints : This field is decremented every time a packet (maximum size or short
+ *  packet) is read from the TxFIFO
+ *  OUT Endpoints: This field is decremented every time a packet (maximum size or short
+ *  packet) is written to the RxFIFO
+ */
+#define USB_D_PKTCNT5    0x00000003
+#define USB_D_PKTCNT5_M  (USB_D_PKTCNT5_V << USB_D_PKTCNT5_S)
+#define USB_D_PKTCNT5_V  0x00000003
+#define USB_D_PKTCNT5_S  19
+
+
+/** USB_DIEPDMA5_REG register
+ *  Device IN Endpoint 5 DMA Address Register
+ */
+#define USB_DIEPDMA5_REG (SOC_DPORT_USB_BASE + 0x9b4)
+/** USB_D_DMAADDR5 : R/W; bitpos: [32:0]; default: 0;
+ *  This field holds the start address of the external memory for storing or fetching
+ *  endpoint data.
+ */
+#define USB_D_DMAADDR5    0xFFFFFFFF
+#define USB_D_DMAADDR5_M  (USB_D_DMAADDR5_V << USB_D_DMAADDR5_S)
+#define USB_D_DMAADDR5_V  0xFFFFFFFF
+#define USB_D_DMAADDR5_S  0
+
+
+/** USB_DIEPCTL6_REG register
+ *  Device Control IN Endpoint $n Control Register
+ */
+#define USB_DIEPCTL6_REG (SOC_DPORT_USB_BASE + 0x9c0)
+/** USB_D_MPS6 : R/W; bitpos: [2:0]; default: 0;
+ *  Maximum Packet Size
+ *  0x0 : 64 bytes
+ *  0x1 : 32 bytes
+ *  0x2 : 16 bytes
+ *  0x3 : 8 bytes
+ */
+#define USB_D_MPS6    0x00000003
+#define USB_D_MPS6_M  (USB_D_MPS6_V << USB_D_MPS6_S)
+#define USB_D_MPS6_V  0x00000003
+#define USB_D_MPS6_S  0
+/** USB_D_USBACTEP6 : RO; bitpos: [15]; default: 1;
+ *  USB Active Endpoint
+ *  0x1 : Control endpoint is always active
+ */
+#define USB_D_USBACTEP6    (BIT(15))
+#define USB_D_USBACTEP6_M  (USB_D_USBACTEP6_V << USB_D_USBACTEP6_S)
+#define USB_D_USBACTEP6_V  0x00000001
+#define USB_D_USBACTEP6_S  15
+/** USB_D_NAKSTS6 : RO; bitpos: [17]; default: 0;
+ *  NAK Status
+ *  0x0 : The core is transmitting non-NAK handshakes based on the FIFO Status
+ *  0x1 : The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_D_NAKSTS6    (BIT(17))
+#define USB_D_NAKSTS6_M  (USB_D_NAKSTS6_V << USB_D_NAKSTS6_S)
+#define USB_D_NAKSTS6_V  0x00000001
+#define USB_D_NAKSTS6_S  17
+/** USB_D_EPTYPE6 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 0
+ */
+#define USB_D_EPTYPE6    0x00000003
+#define USB_D_EPTYPE6_M  (USB_D_EPTYPE6_V << USB_D_EPTYPE6_S)
+#define USB_D_EPTYPE6_V  0x00000003
+#define USB_D_EPTYPE6_S  18
+/** USB_D_STALL6 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it
+ *  0x0 : No Stall
+ *  0x1 : Stall Handshake
+ */
+#define USB_D_STALL6    (BIT(21))
+#define USB_D_STALL6_M  (USB_D_STALL6_V << USB_D_STALL6_S)
+#define USB_D_STALL6_V  0x00000001
+#define USB_D_STALL6_S  21
+/** USB_D_TXFNUM6 : R/W; bitpos: [26:22]; default: 0;
+ *  TxFIFO Number.
+ */
+#define USB_D_TXFNUM6    0x0000000F
+#define USB_D_TXFNUM6_M  (USB_D_TXFNUM6_V << USB_D_TXFNUM6_S)
+#define USB_D_TXFNUM6_V  0x0000000F
+#define USB_D_TXFNUM6_S  22
+/** USB_D_CNAK6 : WO; bitpos: [26]; default: 0;
+ *  A write to this bit clears the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_D_CNAK6    (BIT(26))
+#define USB_D_CNAK6_M  (USB_D_CNAK6_V << USB_D_CNAK6_S)
+#define USB_D_CNAK6_V  0x00000001
+#define USB_D_CNAK6_S  26
+/** USB_DI_SNAK6 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DI_SNAK6    (BIT(27))
+#define USB_DI_SNAK6_M  (USB_DI_SNAK6_V << USB_DI_SNAK6_S)
+#define USB_DI_SNAK6_V  0x00000001
+#define USB_DI_SNAK6_S  27
+/** USB_DI_SETD0PID6 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DI_SETD0PID6    (BIT(28))
+#define USB_DI_SETD0PID6_M  (USB_DI_SETD0PID6_V << USB_DI_SETD0PID6_S)
+#define USB_DI_SETD0PID6_V  0x00000001
+#define USB_DI_SETD0PID6_S  28
+/** USB_DI_SETD1PID6 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DI_SETD1PID6    (BIT(29))
+#define USB_DI_SETD1PID6_M  (USB_DI_SETD1PID6_V << USB_DI_SETD1PID6_S)
+#define USB_DI_SETD1PID6_V  0x00000001
+#define USB_DI_SETD1PID6_S  29
+/** USB_D_EPDIS6 : R/W; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No action
+ *  0x1 : Disabled Endpoint
+ */
+#define USB_D_EPDIS6    (BIT(30))
+#define USB_D_EPDIS6_M  (USB_D_EPDIS6_V << USB_D_EPDIS6_S)
+#define USB_D_EPDIS6_V  0x00000001
+#define USB_D_EPDIS6_S  30
+/** USB_D_EPENA6 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_D_EPENA6    (BIT(31))
+#define USB_D_EPENA6_M  (USB_D_EPENA6_V << USB_D_EPENA6_S)
+#define USB_D_EPENA6_V  0x00000001
+#define USB_D_EPENA6_S  31
+
+
+/** USB_DIEPTSIZ6_REG register
+ *  Device IN Endpoint 6 Transfer Size Register
+ */
+#define USB_DIEPTSIZ6_REG (SOC_DPORT_USB_BASE + 0x9d0)
+/** USB_D_XFERSIZE6 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size
+ *  IN Endpoints: The core decrements this field every time a packet from the external
+ *  memory is written to the TxFIFO
+ *  OUT Endpoints: The core decrements this field every time a  packet is read from the
+ *  RxFIFO and written to the external memory
+ */
+#define USB_D_XFERSIZE6    0x0000007F
+#define USB_D_XFERSIZE6_M  (USB_D_XFERSIZE6_V << USB_D_XFERSIZE6_S)
+#define USB_D_XFERSIZE6_V  0x0000007F
+#define USB_D_XFERSIZE6_S  0
+/** USB_D_PKTCNT6 : R/W; bitpos: [21:19]; default: 0;
+ *  Packet Count
+ *  IN Endpoints : This field is decremented every time a packet (maximum size or short
+ *  packet) is read from the TxFIFO
+ *  OUT Endpoints: This field is decremented every time a packet (maximum size or short
+ *  packet) is written to the RxFIFO
+ */
+#define USB_D_PKTCNT6    0x00000003
+#define USB_D_PKTCNT6_M  (USB_D_PKTCNT6_V << USB_D_PKTCNT6_S)
+#define USB_D_PKTCNT6_V  0x00000003
+#define USB_D_PKTCNT6_S  19
+
+
+/** USB_DIEPDMA6_REG register
+ *  Device IN Endpoint 6 DMA Address Register
+ */
+#define USB_DIEPDMA6_REG (SOC_DPORT_USB_BASE + 0x9d4)
+/** USB_D_DMAADDR6 : R/W; bitpos: [32:0]; default: 0;
+ *  This field holds the start address of the external memory for storing or fetching
+ *  endpoint data.
+ */
+#define USB_D_DMAADDR6    0xFFFFFFFF
+#define USB_D_DMAADDR6_M  (USB_D_DMAADDR6_V << USB_D_DMAADDR6_S)
+#define USB_D_DMAADDR6_V  0xFFFFFFFF
+#define USB_D_DMAADDR6_S  0
+
+
+/** USB_DOEPCTL0_REG register
+ *  Device Control OUT Endpoint $n Control Register
+ */
+#define USB_DOEPCTL0_REG (SOC_DPORT_USB_BASE + 0xb00)
+/** USB_MPS0 : RO; bitpos: [2:0]; default: 0;
+ *  Maximum Packet Size
+ *  0x0 : 64 bytes
+ *  0x1 : 32 bytes
+ *  0x2 : 16 bytes
+ *  0x3 : 8 bytes
+ */
+#define USB_MPS0    0x00000003
+#define USB_MPS0_M  (USB_MPS0_V << USB_MPS0_S)
+#define USB_MPS0_V  0x00000003
+#define USB_MPS0_S  0
+/** USB_USBACTEP0 : RO; bitpos: [15]; default: 1;
+ *  0x1: USB Active Endpoint 0
+ */
+#define USB_USBACTEP0    (BIT(15))
+#define USB_USBACTEP0_M  (USB_USBACTEP0_V << USB_USBACTEP0_S)
+#define USB_USBACTEP0_V  0x00000001
+#define USB_USBACTEP0_S  15
+/** USB_NAKSTS0 : RO; bitpos: [17]; default: 0;
+ *  0x0 :  The core is transmitting non-NAK handshakes based on the FIFO status
+ *  0x1 :The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_NAKSTS0    (BIT(17))
+#define USB_NAKSTS0_M  (USB_NAKSTS0_V << USB_NAKSTS0_S)
+#define USB_NAKSTS0_V  0x00000001
+#define USB_NAKSTS0_S  17
+/** USB_EPTYPE0 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control $n
+ */
+#define USB_EPTYPE0    0x00000003
+#define USB_EPTYPE0_M  (USB_EPTYPE0_V << USB_EPTYPE0_S)
+#define USB_EPTYPE0_V  0x00000003
+#define USB_EPTYPE0_S  18
+/** USB_SNP0 : R/W; bitpos: [20]; default: 0;
+ *  0x0 : Reserved 0
+ *  0x1 : Reserved 1
+ */
+#define USB_SNP0    (BIT(20))
+#define USB_SNP0_M  (USB_SNP0_V << USB_SNP0_S)
+#define USB_SNP0_V  0x00000001
+#define USB_SNP0_S  20
+/** USB_STALL0 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it, when a SETUP token
+ *  is received for this endpoint
+ *  0x0 (INACTIVE): No Stall
+ *  0x1 (ACTIVE): Stall Handshake
+ */
+#define USB_STALL0    (BIT(21))
+#define USB_STALL0_M  (USB_STALL0_V << USB_STALL0_S)
+#define USB_STALL0_V  0x00000001
+#define USB_STALL0_S  21
+/** USB_CNAK0 : WO; bitpos: [26]; default: 0;
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_CNAK0    (BIT(26))
+#define USB_CNAK0_M  (USB_CNAK0_V << USB_CNAK0_S)
+#define USB_CNAK0_V  0x00000001
+#define USB_CNAK0_S  26
+/** USB_DO_SNAK0 : WO; bitpos: [27]; default: 0;
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DO_SNAK0    (BIT(27))
+#define USB_DO_SNAK0_M  (USB_DO_SNAK0_V << USB_DO_SNAK0_S)
+#define USB_DO_SNAK0_V  0x00000001
+#define USB_DO_SNAK0_S  27
+/** USB_EPDIS0 : RO; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No Endpoint disable
+ */
+#define USB_EPDIS0    (BIT(30))
+#define USB_EPDIS0_M  (USB_EPDIS0_V << USB_EPDIS0_S)
+#define USB_EPDIS0_V  0x00000001
+#define USB_EPDIS0_S  30
+/** USB_EPENA0 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_EPENA0    (BIT(31))
+#define USB_EPENA0_M  (USB_EPENA0_V << USB_EPENA0_S)
+#define USB_EPENA0_V  0x00000001
+#define USB_EPENA0_S  31
+
+
+/** USB_DOEPTSIZ0_REG register
+ *  Device OUT Endpoint 0 Transfer Size Register
+ */
+#define USB_DOEPTSIZ0_REG (SOC_DPORT_USB_BASE + 0xb10)
+/** USB_XFERSIZE0 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size.Indicates the transfer size in bytes for ENDPOINT0
+ */
+#define USB_XFERSIZE0    0x0000007F
+#define USB_XFERSIZE0_M  (USB_XFERSIZE0_V << USB_XFERSIZE0_S)
+#define USB_XFERSIZE0_V  0x0000007F
+#define USB_XFERSIZE0_S  0
+/** USB_PKTCNT0 : R/W; bitpos: [19]; default: 0;
+ *  Packet Count (PktCnt).This field is decremented to zero after a packet is written
+ *  into the RxFIFO.
+ */
+#define USB_PKTCNT0    (BIT(19))
+#define USB_PKTCNT0_M  (USB_PKTCNT0_V << USB_PKTCNT0_S)
+#define USB_PKTCNT0_V  0x00000001
+#define USB_PKTCNT0_S  19
+/** USB_SUPCNT0 : R/W; bitpos: [31:29]; default: 0;
+ *  SETUP Packet Count (SUPCnt).This field specifies the number of back-to-back SETUP
+ *  data packets the endpoint can receive
+ *  2'b01: 1 packet
+ *  2'b10: 2 packets
+ *  2'b11: 3 packets
+ */
+#define USB_SUPCNT0    0x00000003
+#define USB_SUPCNT0_M  (USB_SUPCNT0_V << USB_SUPCNT0_S)
+#define USB_SUPCNT0_V  0x00000003
+#define USB_SUPCNT0_S  29
+
+
+/** USB_DOEPDMA0_REG register
+ *  Device OUT Endpoint 0 DMA Address Register
+ */
+#define USB_DOEPDMA0_REG (SOC_DPORT_USB_BASE + 0xb14)
+/** USB_DMAADDR0 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the start address of the external memory for storing or fetching endpoint
+ *  data.
+ */
+#define USB_DMAADDR0    0xFFFFFFFF
+#define USB_DMAADDR0_M  (USB_DMAADDR0_V << USB_DMAADDR0_S)
+#define USB_DMAADDR0_V  0xFFFFFFFF
+#define USB_DMAADDR0_S  0
+
+
+/** USB_DOEPDMAB0_REG register
+ *  Device OUT Endpoint 16 Buffer Address Register
+ */
+#define USB_DOEPDMAB0_REG (SOC_DPORT_USB_BASE + 0xb1c)
+/** USB_DMABUFFERADDR0 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_DMABUFFERADDR0    0xFFFFFFFF
+#define USB_DMABUFFERADDR0_M  (USB_DMABUFFERADDR0_V << USB_DMABUFFERADDR0_S)
+#define USB_DMABUFFERADDR0_V  0xFFFFFFFF
+#define USB_DMABUFFERADDR0_S  0
+
+
+/** USB_DOEPCTL1_REG register
+ *  Device Control OUT Endpoint 1 Control Register
+ */
+#define USB_DOEPCTL1_REG (SOC_DPORT_USB_BASE + 0xb20)
+/** USB_MPS1 : RO; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size in bytes
+ */
+#define USB_MPS1    0x000007FF
+#define USB_MPS1_M  (USB_MPS1_V << USB_MPS1_S)
+#define USB_MPS1_V  0x000007FF
+#define USB_MPS1_S  0
+/** USB_USBACTEP1 : RO; bitpos: [15]; default: 1;
+ *  0x1: USB Active Endpoint 0
+ */
+#define USB_USBACTEP1    (BIT(15))
+#define USB_USBACTEP1_M  (USB_USBACTEP1_V << USB_USBACTEP1_S)
+#define USB_USBACTEP1_V  0x00000001
+#define USB_USBACTEP1_S  15
+/** USB_NAKSTS1 : RO; bitpos: [17]; default: 0;
+ *  0x0 :  The core is transmitting non-NAK handshakes based on the FIFO status
+ *  0x1 :The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_NAKSTS1    (BIT(17))
+#define USB_NAKSTS1_M  (USB_NAKSTS1_V << USB_NAKSTS1_S)
+#define USB_NAKSTS1_V  0x00000001
+#define USB_NAKSTS1_S  17
+/** USB_EPTYPE1 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 1
+ */
+#define USB_EPTYPE1    0x00000003
+#define USB_EPTYPE1_M  (USB_EPTYPE1_V << USB_EPTYPE1_S)
+#define USB_EPTYPE1_V  0x00000003
+#define USB_EPTYPE1_S  18
+/** USB_SNP1 : R/W; bitpos: [20]; default: 0;
+ *  0x0 : Reserved 0
+ *  0x1 : Reserved 1
+ */
+#define USB_SNP1    (BIT(20))
+#define USB_SNP1_M  (USB_SNP1_V << USB_SNP1_S)
+#define USB_SNP1_V  0x00000001
+#define USB_SNP1_S  20
+/** USB_STALL1 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it, when a SETUP token
+ *  is received for this endpoint
+ *  0x0 (INACTIVE): No Stall
+ *  0x1 (ACTIVE): Stall Handshake
+ */
+#define USB_STALL1    (BIT(21))
+#define USB_STALL1_M  (USB_STALL1_V << USB_STALL1_S)
+#define USB_STALL1_V  0x00000001
+#define USB_STALL1_S  21
+/** USB_CNAK1 : WO; bitpos: [26]; default: 0;
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_CNAK1    (BIT(26))
+#define USB_CNAK1_M  (USB_CNAK1_V << USB_CNAK1_S)
+#define USB_CNAK1_V  0x00000001
+#define USB_CNAK1_S  26
+/** USB_DO_SNAK1 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DO_SNAK1    (BIT(27))
+#define USB_DO_SNAK1_M  (USB_DO_SNAK1_V << USB_DO_SNAK1_S)
+#define USB_DO_SNAK1_V  0x00000001
+#define USB_DO_SNAK1_S  27
+/** USB_DO_SETD0PID1 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DO_SETD0PID1    (BIT(28))
+#define USB_DO_SETD0PID1_M  (USB_DO_SETD0PID1_V << USB_DO_SETD0PID1_S)
+#define USB_DO_SETD0PID1_V  0x00000001
+#define USB_DO_SETD0PID1_S  28
+/** USB_DO_SETD1PID1 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DO_SETD1PID1    (BIT(29))
+#define USB_DO_SETD1PID1_M  (USB_DO_SETD1PID1_V << USB_DO_SETD1PID1_S)
+#define USB_DO_SETD1PID1_V  0x00000001
+#define USB_DO_SETD1PID1_S  29
+/** USB_EPDIS1 : RO; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No Endpoint disable
+ */
+#define USB_EPDIS1    (BIT(30))
+#define USB_EPDIS1_M  (USB_EPDIS1_V << USB_EPDIS1_S)
+#define USB_EPDIS1_V  0x00000001
+#define USB_EPDIS1_S  30
+/** USB_EPENA1 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_EPENA1    (BIT(31))
+#define USB_EPENA1_M  (USB_EPENA1_V << USB_EPENA1_S)
+#define USB_EPENA1_V  0x00000001
+#define USB_EPENA1_S  31
+
+
+/** USB_DOEPTSIZ1_REG register
+ *  Device OUT Endpoint 1 Transfer Size Register
+ */
+#define USB_DOEPTSIZ1_REG (SOC_DPORT_USB_BASE + 0xb30)
+/** USB_XFERSIZE1 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size.Indicates the transfer size in bytes for ENDPOINT1
+ */
+#define USB_XFERSIZE1    0x0000007F
+#define USB_XFERSIZE1_M  (USB_XFERSIZE1_V << USB_XFERSIZE1_S)
+#define USB_XFERSIZE1_V  0x0000007F
+#define USB_XFERSIZE1_S  0
+/** USB_PKTCNT1 : R/W; bitpos: [19]; default: 0;
+ *  Packet Count (PktCnt).This field is decremented to zero after a packet is written
+ *  into the RxFIFO.
+ */
+#define USB_PKTCNT1    (BIT(19))
+#define USB_PKTCNT1_M  (USB_PKTCNT1_V << USB_PKTCNT1_S)
+#define USB_PKTCNT1_V  0x00000001
+#define USB_PKTCNT1_S  19
+/** USB_SUPCNT1 : R/W; bitpos: [31:29]; default: 0;
+ *  SETUP Packet Count (SUPCnt).This field specifies the number of back-to-back SETUP
+ *  data packets the endpoint can receive
+ *  2'b01: 1 packet
+ *  2'b10: 2 packets
+ *  2'b11: 3 packets
+ */
+#define USB_SUPCNT1    0x00000003
+#define USB_SUPCNT1_M  (USB_SUPCNT1_V << USB_SUPCNT1_S)
+#define USB_SUPCNT1_V  0x00000003
+#define USB_SUPCNT1_S  29
+
+
+/** USB_DOEPDMA1_REG register
+ *  Device OUT Endpoint 1 DMA Address Register
+ */
+#define USB_DOEPDMA1_REG (SOC_DPORT_USB_BASE + 0xb34)
+/** USB_DMAADDR1 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the start address of the external memory for storing or fetching endpoint
+ *  data.
+ */
+#define USB_DMAADDR1    0xFFFFFFFF
+#define USB_DMAADDR1_M  (USB_DMAADDR1_V << USB_DMAADDR1_S)
+#define USB_DMAADDR1_V  0xFFFFFFFF
+#define USB_DMAADDR1_S  0
+
+
+/** USB_DOEPDMAB1_REG register
+ *  Device OUT Endpoint 16 Buffer Address Register
+ */
+#define USB_DOEPDMAB1_REG (SOC_DPORT_USB_BASE + 0xb3c)
+/** USB_DMABUFFERADDR1 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_DMABUFFERADDR1    0xFFFFFFFF
+#define USB_DMABUFFERADDR1_M  (USB_DMABUFFERADDR1_V << USB_DMABUFFERADDR1_S)
+#define USB_DMABUFFERADDR1_V  0xFFFFFFFF
+#define USB_DMABUFFERADDR1_S  0
+
+
+/** USB_DOEPCTL2_REG register
+ *  Device Control OUT Endpoint 2 Control Register
+ */
+#define USB_DOEPCTL2_REG (SOC_DPORT_USB_BASE + 0xb40)
+/** USB_MPS2 : RO; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size in bytes
+ */
+#define USB_MPS2    0x000007FF
+#define USB_MPS2_M  (USB_MPS2_V << USB_MPS2_S)
+#define USB_MPS2_V  0x000007FF
+#define USB_MPS2_S  0
+/** USB_USBACTEP2 : RO; bitpos: [15]; default: 1;
+ *  0x1: USB Active Endpoint 0
+ */
+#define USB_USBACTEP2    (BIT(15))
+#define USB_USBACTEP2_M  (USB_USBACTEP2_V << USB_USBACTEP2_S)
+#define USB_USBACTEP2_V  0x00000001
+#define USB_USBACTEP2_S  15
+/** USB_NAKSTS2 : RO; bitpos: [17]; default: 0;
+ *  0x0 :  The core is transmitting non-NAK handshakes based on the FIFO status
+ *  0x1 :The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_NAKSTS2    (BIT(17))
+#define USB_NAKSTS2_M  (USB_NAKSTS2_V << USB_NAKSTS2_S)
+#define USB_NAKSTS2_V  0x00000001
+#define USB_NAKSTS2_S  17
+/** USB_EPTYPE2 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 2
+ */
+#define USB_EPTYPE2    0x00000003
+#define USB_EPTYPE2_M  (USB_EPTYPE2_V << USB_EPTYPE2_S)
+#define USB_EPTYPE2_V  0x00000003
+#define USB_EPTYPE2_S  18
+/** USB_SNP2 : R/W; bitpos: [20]; default: 0;
+ *  0x0 : Reserved 0
+ *  0x1 : Reserved 1
+ */
+#define USB_SNP2    (BIT(20))
+#define USB_SNP2_M  (USB_SNP2_V << USB_SNP2_S)
+#define USB_SNP2_V  0x00000001
+#define USB_SNP2_S  20
+/** USB_STALL2 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it, when a SETUP token
+ *  is received for this endpoint
+ *  0x0 (INACTIVE): No Stall
+ *  0x1 (ACTIVE): Stall Handshake
+ */
+#define USB_STALL2    (BIT(21))
+#define USB_STALL2_M  (USB_STALL2_V << USB_STALL2_S)
+#define USB_STALL2_V  0x00000001
+#define USB_STALL2_S  21
+/** USB_CNAK2 : WO; bitpos: [26]; default: 0;
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_CNAK2    (BIT(26))
+#define USB_CNAK2_M  (USB_CNAK2_V << USB_CNAK2_S)
+#define USB_CNAK2_V  0x00000001
+#define USB_CNAK2_S  26
+/** USB_DO_SNAK2 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DO_SNAK2    (BIT(27))
+#define USB_DO_SNAK2_M  (USB_DO_SNAK2_V << USB_DO_SNAK2_S)
+#define USB_DO_SNAK2_V  0x00000001
+#define USB_DO_SNAK2_S  27
+/** USB_DO_SETD0PID2 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DO_SETD0PID2    (BIT(28))
+#define USB_DO_SETD0PID2_M  (USB_DO_SETD0PID2_V << USB_DO_SETD0PID2_S)
+#define USB_DO_SETD0PID2_V  0x00000001
+#define USB_DO_SETD0PID2_S  28
+/** USB_DO_SETD1PID2 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DO_SETD1PID2    (BIT(29))
+#define USB_DO_SETD1PID2_M  (USB_DO_SETD1PID2_V << USB_DO_SETD1PID2_S)
+#define USB_DO_SETD1PID2_V  0x00000001
+#define USB_DO_SETD1PID2_S  29
+/** USB_EPDIS2 : RO; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No Endpoint disable
+ */
+#define USB_EPDIS2    (BIT(30))
+#define USB_EPDIS2_M  (USB_EPDIS2_V << USB_EPDIS2_S)
+#define USB_EPDIS2_V  0x00000001
+#define USB_EPDIS2_S  30
+/** USB_EPENA2 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_EPENA2    (BIT(31))
+#define USB_EPENA2_M  (USB_EPENA2_V << USB_EPENA2_S)
+#define USB_EPENA2_V  0x00000001
+#define USB_EPENA2_S  31
+
+
+/** USB_DOEPTSIZ2_REG register
+ *  Device OUT Endpoint 2 Transfer Size Register
+ */
+#define USB_DOEPTSIZ2_REG (SOC_DPORT_USB_BASE + 0xb50)
+/** USB_XFERSIZE2 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size.Indicates the transfer size in bytes for ENDPOINT2
+ */
+#define USB_XFERSIZE2    0x0000007F
+#define USB_XFERSIZE2_M  (USB_XFERSIZE2_V << USB_XFERSIZE2_S)
+#define USB_XFERSIZE2_V  0x0000007F
+#define USB_XFERSIZE2_S  0
+/** USB_PKTCNT2 : R/W; bitpos: [19]; default: 0;
+ *  Packet Count (PktCnt).This field is decremented to zero after a packet is written
+ *  into the RxFIFO.
+ */
+#define USB_PKTCNT2    (BIT(19))
+#define USB_PKTCNT2_M  (USB_PKTCNT2_V << USB_PKTCNT2_S)
+#define USB_PKTCNT2_V  0x00000001
+#define USB_PKTCNT2_S  19
+/** USB_SUPCNT2 : R/W; bitpos: [31:29]; default: 0;
+ *  SETUP Packet Count (SUPCnt).This field specifies the number of back-to-back SETUP
+ *  data packets the endpoint can receive
+ *  2'b01: 1 packet
+ *  2'b10: 2 packets
+ *  2'b11: 3 packets
+ */
+#define USB_SUPCNT2    0x00000003
+#define USB_SUPCNT2_M  (USB_SUPCNT2_V << USB_SUPCNT2_S)
+#define USB_SUPCNT2_V  0x00000003
+#define USB_SUPCNT2_S  29
+
+
+/** USB_DOEPDMA2_REG register
+ *  Device OUT Endpoint 2 DMA Address Register
+ */
+#define USB_DOEPDMA2_REG (SOC_DPORT_USB_BASE + 0xb54)
+/** USB_DMAADDR2 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the start address of the external memory for storing or fetching endpoint
+ *  data.
+ */
+#define USB_DMAADDR2    0xFFFFFFFF
+#define USB_DMAADDR2_M  (USB_DMAADDR2_V << USB_DMAADDR2_S)
+#define USB_DMAADDR2_V  0xFFFFFFFF
+#define USB_DMAADDR2_S  0
+
+
+/** USB_DOEPDMAB2_REG register
+ *  Device OUT Endpoint 16 Buffer Address Register
+ */
+#define USB_DOEPDMAB2_REG (SOC_DPORT_USB_BASE + 0xb5c)
+/** USB_DMABUFFERADDR2 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_DMABUFFERADDR2    0xFFFFFFFF
+#define USB_DMABUFFERADDR2_M  (USB_DMABUFFERADDR2_V << USB_DMABUFFERADDR2_S)
+#define USB_DMABUFFERADDR2_V  0xFFFFFFFF
+#define USB_DMABUFFERADDR2_S  0
+
+
+/** USB_DOEPCTL3_REG register
+ *  Device Control OUT Endpoint 3 Control Register
+ */
+#define USB_DOEPCTL3_REG (SOC_DPORT_USB_BASE + 0xb60)
+/** USB_MPS3 : RO; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size in bytes
+ */
+#define USB_MPS3    0x000007FF
+#define USB_MPS3_M  (USB_MPS3_V << USB_MPS3_S)
+#define USB_MPS3_V  0x000007FF
+#define USB_MPS3_S  0
+/** USB_USBACTEP3 : RO; bitpos: [15]; default: 1;
+ *  0x1: USB Active Endpoint 0
+ */
+#define USB_USBACTEP3    (BIT(15))
+#define USB_USBACTEP3_M  (USB_USBACTEP3_V << USB_USBACTEP3_S)
+#define USB_USBACTEP3_V  0x00000001
+#define USB_USBACTEP3_S  15
+/** USB_NAKSTS3 : RO; bitpos: [17]; default: 0;
+ *  0x0 :  The core is transmitting non-NAK handshakes based on the FIFO status
+ *  0x1 :The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_NAKSTS3    (BIT(17))
+#define USB_NAKSTS3_M  (USB_NAKSTS3_V << USB_NAKSTS3_S)
+#define USB_NAKSTS3_V  0x00000001
+#define USB_NAKSTS3_S  17
+/** USB_EPTYPE3 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 3
+ */
+#define USB_EPTYPE3    0x00000003
+#define USB_EPTYPE3_M  (USB_EPTYPE3_V << USB_EPTYPE3_S)
+#define USB_EPTYPE3_V  0x00000003
+#define USB_EPTYPE3_S  18
+/** USB_SNP3 : R/W; bitpos: [20]; default: 0;
+ *  0x0 : Reserved 0
+ *  0x1 : Reserved 1
+ */
+#define USB_SNP3    (BIT(20))
+#define USB_SNP3_M  (USB_SNP3_V << USB_SNP3_S)
+#define USB_SNP3_V  0x00000001
+#define USB_SNP3_S  20
+/** USB_STALL3 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it, when a SETUP token
+ *  is received for this endpoint
+ *  0x0 (INACTIVE): No Stall
+ *  0x1 (ACTIVE): Stall Handshake
+ */
+#define USB_STALL3    (BIT(21))
+#define USB_STALL3_M  (USB_STALL3_V << USB_STALL3_S)
+#define USB_STALL3_V  0x00000001
+#define USB_STALL3_S  21
+/** USB_CNAK3 : WO; bitpos: [26]; default: 0;
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_CNAK3    (BIT(26))
+#define USB_CNAK3_M  (USB_CNAK3_V << USB_CNAK3_S)
+#define USB_CNAK3_V  0x00000001
+#define USB_CNAK3_S  26
+/** USB_DO_SNAK3 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DO_SNAK3    (BIT(27))
+#define USB_DO_SNAK3_M  (USB_DO_SNAK3_V << USB_DO_SNAK3_S)
+#define USB_DO_SNAK3_V  0x00000001
+#define USB_DO_SNAK3_S  27
+/** USB_DO_SETD0PID3 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DO_SETD0PID3    (BIT(28))
+#define USB_DO_SETD0PID3_M  (USB_DO_SETD0PID3_V << USB_DO_SETD0PID3_S)
+#define USB_DO_SETD0PID3_V  0x00000001
+#define USB_DO_SETD0PID3_S  28
+/** USB_DO_SETD1PID3 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DO_SETD1PID3    (BIT(29))
+#define USB_DO_SETD1PID3_M  (USB_DO_SETD1PID3_V << USB_DO_SETD1PID3_S)
+#define USB_DO_SETD1PID3_V  0x00000001
+#define USB_DO_SETD1PID3_S  29
+/** USB_EPDIS3 : RO; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No Endpoint disable
+ */
+#define USB_EPDIS3    (BIT(30))
+#define USB_EPDIS3_M  (USB_EPDIS3_V << USB_EPDIS3_S)
+#define USB_EPDIS3_V  0x00000001
+#define USB_EPDIS3_S  30
+/** USB_EPENA3 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_EPENA3    (BIT(31))
+#define USB_EPENA3_M  (USB_EPENA3_V << USB_EPENA3_S)
+#define USB_EPENA3_V  0x00000001
+#define USB_EPENA3_S  31
+
+
+/** USB_DOEPTSIZ3_REG register
+ *  Device OUT Endpoint 3 Transfer Size Register
+ */
+#define USB_DOEPTSIZ3_REG (SOC_DPORT_USB_BASE + 0xb70)
+/** USB_XFERSIZE3 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size.Indicates the transfer size in bytes for ENDPOINT3
+ */
+#define USB_XFERSIZE3    0x0000007F
+#define USB_XFERSIZE3_M  (USB_XFERSIZE3_V << USB_XFERSIZE3_S)
+#define USB_XFERSIZE3_V  0x0000007F
+#define USB_XFERSIZE3_S  0
+/** USB_PKTCNT3 : R/W; bitpos: [19]; default: 0;
+ *  Packet Count (PktCnt).This field is decremented to zero after a packet is written
+ *  into the RxFIFO.
+ */
+#define USB_PKTCNT3    (BIT(19))
+#define USB_PKTCNT3_M  (USB_PKTCNT3_V << USB_PKTCNT3_S)
+#define USB_PKTCNT3_V  0x00000001
+#define USB_PKTCNT3_S  19
+/** USB_SUPCNT3 : R/W; bitpos: [31:29]; default: 0;
+ *  SETUP Packet Count (SUPCnt).This field specifies the number of back-to-back SETUP
+ *  data packets the endpoint can receive
+ *  2'b01: 1 packet
+ *  2'b10: 2 packets
+ *  2'b11: 3 packets
+ */
+#define USB_SUPCNT3    0x00000003
+#define USB_SUPCNT3_M  (USB_SUPCNT3_V << USB_SUPCNT3_S)
+#define USB_SUPCNT3_V  0x00000003
+#define USB_SUPCNT3_S  29
+
+
+/** USB_DOEPDMA3_REG register
+ *  Device OUT Endpoint 3 DMA Address Register
+ */
+#define USB_DOEPDMA3_REG (SOC_DPORT_USB_BASE + 0xb74)
+/** USB_DMAADDR3 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the start address of the external memory for storing or fetching endpoint
+ *  data.
+ */
+#define USB_DMAADDR3    0xFFFFFFFF
+#define USB_DMAADDR3_M  (USB_DMAADDR3_V << USB_DMAADDR3_S)
+#define USB_DMAADDR3_V  0xFFFFFFFF
+#define USB_DMAADDR3_S  0
+
+
+/** USB_DOEPDMAB3_REG register
+ *  Device OUT Endpoint 16 Buffer Address Register
+ */
+#define USB_DOEPDMAB3_REG (SOC_DPORT_USB_BASE + 0xb7c)
+/** USB_DMABUFFERADDR3 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_DMABUFFERADDR3    0xFFFFFFFF
+#define USB_DMABUFFERADDR3_M  (USB_DMABUFFERADDR3_V << USB_DMABUFFERADDR3_S)
+#define USB_DMABUFFERADDR3_V  0xFFFFFFFF
+#define USB_DMABUFFERADDR3_S  0
+
+
+/** USB_DOEPCTL4_REG register
+ *  Device Control OUT Endpoint 4 Control Register
+ */
+#define USB_DOEPCTL4_REG (SOC_DPORT_USB_BASE + 0xb80)
+/** USB_MPS4 : RO; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size in bytes
+ */
+#define USB_MPS4    0x000007FF
+#define USB_MPS4_M  (USB_MPS4_V << USB_MPS4_S)
+#define USB_MPS4_V  0x000007FF
+#define USB_MPS4_S  0
+/** USB_USBACTEP4 : RO; bitpos: [15]; default: 1;
+ *  0x1: USB Active Endpoint 0
+ */
+#define USB_USBACTEP4    (BIT(15))
+#define USB_USBACTEP4_M  (USB_USBACTEP4_V << USB_USBACTEP4_S)
+#define USB_USBACTEP4_V  0x00000001
+#define USB_USBACTEP4_S  15
+/** USB_NAKSTS4 : RO; bitpos: [17]; default: 0;
+ *  0x0 :  The core is transmitting non-NAK handshakes based on the FIFO status
+ *  0x1 :The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_NAKSTS4    (BIT(17))
+#define USB_NAKSTS4_M  (USB_NAKSTS4_V << USB_NAKSTS4_S)
+#define USB_NAKSTS4_V  0x00000001
+#define USB_NAKSTS4_S  17
+/** USB_EPTYPE4 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 4
+ */
+#define USB_EPTYPE4    0x00000003
+#define USB_EPTYPE4_M  (USB_EPTYPE4_V << USB_EPTYPE4_S)
+#define USB_EPTYPE4_V  0x00000003
+#define USB_EPTYPE4_S  18
+/** USB_SNP4 : R/W; bitpos: [20]; default: 0;
+ *  0x0 : Reserved 0
+ *  0x1 : Reserved 1
+ */
+#define USB_SNP4    (BIT(20))
+#define USB_SNP4_M  (USB_SNP4_V << USB_SNP4_S)
+#define USB_SNP4_V  0x00000001
+#define USB_SNP4_S  20
+/** USB_STALL4 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it, when a SETUP token
+ *  is received for this endpoint
+ *  0x0 (INACTIVE): No Stall
+ *  0x1 (ACTIVE): Stall Handshake
+ */
+#define USB_STALL4    (BIT(21))
+#define USB_STALL4_M  (USB_STALL4_V << USB_STALL4_S)
+#define USB_STALL4_V  0x00000001
+#define USB_STALL4_S  21
+/** USB_CNAK4 : WO; bitpos: [26]; default: 0;
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_CNAK4    (BIT(26))
+#define USB_CNAK4_M  (USB_CNAK4_V << USB_CNAK4_S)
+#define USB_CNAK4_V  0x00000001
+#define USB_CNAK4_S  26
+/** USB_DO_SNAK4 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DO_SNAK4    (BIT(27))
+#define USB_DO_SNAK4_M  (USB_DO_SNAK4_V << USB_DO_SNAK4_S)
+#define USB_DO_SNAK4_V  0x00000001
+#define USB_DO_SNAK4_S  27
+/** USB_DO_SETD0PID4 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DO_SETD0PID4    (BIT(28))
+#define USB_DO_SETD0PID4_M  (USB_DO_SETD0PID4_V << USB_DO_SETD0PID4_S)
+#define USB_DO_SETD0PID4_V  0x00000001
+#define USB_DO_SETD0PID4_S  28
+/** USB_DO_SETD1PID4 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DO_SETD1PID4    (BIT(29))
+#define USB_DO_SETD1PID4_M  (USB_DO_SETD1PID4_V << USB_DO_SETD1PID4_S)
+#define USB_DO_SETD1PID4_V  0x00000001
+#define USB_DO_SETD1PID4_S  29
+/** USB_EPDIS4 : RO; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No Endpoint disable
+ */
+#define USB_EPDIS4    (BIT(30))
+#define USB_EPDIS4_M  (USB_EPDIS4_V << USB_EPDIS4_S)
+#define USB_EPDIS4_V  0x00000001
+#define USB_EPDIS4_S  30
+/** USB_EPENA4 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_EPENA4    (BIT(31))
+#define USB_EPENA4_M  (USB_EPENA4_V << USB_EPENA4_S)
+#define USB_EPENA4_V  0x00000001
+#define USB_EPENA4_S  31
+
+
+/** USB_DOEPTSIZ4_REG register
+ *  Device OUT Endpoint 4 Transfer Size Register
+ */
+#define USB_DOEPTSIZ4_REG (SOC_DPORT_USB_BASE + 0xb90)
+/** USB_XFERSIZE4 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size.Indicates the transfer size in bytes for ENDPOINT4
+ */
+#define USB_XFERSIZE4    0x0000007F
+#define USB_XFERSIZE4_M  (USB_XFERSIZE4_V << USB_XFERSIZE4_S)
+#define USB_XFERSIZE4_V  0x0000007F
+#define USB_XFERSIZE4_S  0
+/** USB_PKTCNT4 : R/W; bitpos: [19]; default: 0;
+ *  Packet Count (PktCnt).This field is decremented to zero after a packet is written
+ *  into the RxFIFO.
+ */
+#define USB_PKTCNT4    (BIT(19))
+#define USB_PKTCNT4_M  (USB_PKTCNT4_V << USB_PKTCNT4_S)
+#define USB_PKTCNT4_V  0x00000001
+#define USB_PKTCNT4_S  19
+/** USB_SUPCNT4 : R/W; bitpos: [31:29]; default: 0;
+ *  SETUP Packet Count (SUPCnt).This field specifies the number of back-to-back SETUP
+ *  data packets the endpoint can receive
+ *  2'b01: 1 packet
+ *  2'b10: 2 packets
+ *  2'b11: 3 packets
+ */
+#define USB_SUPCNT4    0x00000003
+#define USB_SUPCNT4_M  (USB_SUPCNT4_V << USB_SUPCNT4_S)
+#define USB_SUPCNT4_V  0x00000003
+#define USB_SUPCNT4_S  29
+
+
+/** USB_DOEPDMA4_REG register
+ *  Device OUT Endpoint 4 DMA Address Register
+ */
+#define USB_DOEPDMA4_REG (SOC_DPORT_USB_BASE + 0xb94)
+/** USB_DMAADDR4 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the start address of the external memory for storing or fetching endpoint
+ *  data.
+ */
+#define USB_DMAADDR4    0xFFFFFFFF
+#define USB_DMAADDR4_M  (USB_DMAADDR4_V << USB_DMAADDR4_S)
+#define USB_DMAADDR4_V  0xFFFFFFFF
+#define USB_DMAADDR4_S  0
+
+
+/** USB_DOEPDMAB4_REG register
+ *  Device OUT Endpoint 16 Buffer Address Register
+ */
+#define USB_DOEPDMAB4_REG (SOC_DPORT_USB_BASE + 0xb9c)
+/** USB_DMABUFFERADDR4 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_DMABUFFERADDR4    0xFFFFFFFF
+#define USB_DMABUFFERADDR4_M  (USB_DMABUFFERADDR4_V << USB_DMABUFFERADDR4_S)
+#define USB_DMABUFFERADDR4_V  0xFFFFFFFF
+#define USB_DMABUFFERADDR4_S  0
+
+
+/** USB_DOEPCTL5_REG register
+ *  Device Control OUT Endpoint 5 Control Register
+ */
+#define USB_DOEPCTL5_REG (SOC_DPORT_USB_BASE + 0xba0)
+/** USB_MPS5 : RO; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size in bytes
+ */
+#define USB_MPS5    0x000007FF
+#define USB_MPS5_M  (USB_MPS5_V << USB_MPS5_S)
+#define USB_MPS5_V  0x000007FF
+#define USB_MPS5_S  0
+/** USB_USBACTEP5 : RO; bitpos: [15]; default: 1;
+ *  0x1: USB Active Endpoint 0
+ */
+#define USB_USBACTEP5    (BIT(15))
+#define USB_USBACTEP5_M  (USB_USBACTEP5_V << USB_USBACTEP5_S)
+#define USB_USBACTEP5_V  0x00000001
+#define USB_USBACTEP5_S  15
+/** USB_NAKSTS5 : RO; bitpos: [17]; default: 0;
+ *  0x0 :  The core is transmitting non-NAK handshakes based on the FIFO status
+ *  0x1 :The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_NAKSTS5    (BIT(17))
+#define USB_NAKSTS5_M  (USB_NAKSTS5_V << USB_NAKSTS5_S)
+#define USB_NAKSTS5_V  0x00000001
+#define USB_NAKSTS5_S  17
+/** USB_EPTYPE5 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 5
+ */
+#define USB_EPTYPE5    0x00000003
+#define USB_EPTYPE5_M  (USB_EPTYPE5_V << USB_EPTYPE5_S)
+#define USB_EPTYPE5_V  0x00000003
+#define USB_EPTYPE5_S  18
+/** USB_SNP5 : R/W; bitpos: [20]; default: 0;
+ *  0x0 : Reserved 0
+ *  0x1 : Reserved 1
+ */
+#define USB_SNP5    (BIT(20))
+#define USB_SNP5_M  (USB_SNP5_V << USB_SNP5_S)
+#define USB_SNP5_V  0x00000001
+#define USB_SNP5_S  20
+/** USB_STALL5 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it, when a SETUP token
+ *  is received for this endpoint
+ *  0x0 (INACTIVE): No Stall
+ *  0x1 (ACTIVE): Stall Handshake
+ */
+#define USB_STALL5    (BIT(21))
+#define USB_STALL5_M  (USB_STALL5_V << USB_STALL5_S)
+#define USB_STALL5_V  0x00000001
+#define USB_STALL5_S  21
+/** USB_CNAK5 : WO; bitpos: [26]; default: 0;
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_CNAK5    (BIT(26))
+#define USB_CNAK5_M  (USB_CNAK5_V << USB_CNAK5_S)
+#define USB_CNAK5_V  0x00000001
+#define USB_CNAK5_S  26
+/** USB_DO_SNAK5 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DO_SNAK5    (BIT(27))
+#define USB_DO_SNAK5_M  (USB_DO_SNAK5_V << USB_DO_SNAK5_S)
+#define USB_DO_SNAK5_V  0x00000001
+#define USB_DO_SNAK5_S  27
+/** USB_DO_SETD0PID5 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DO_SETD0PID5    (BIT(28))
+#define USB_DO_SETD0PID5_M  (USB_DO_SETD0PID5_V << USB_DO_SETD0PID5_S)
+#define USB_DO_SETD0PID5_V  0x00000001
+#define USB_DO_SETD0PID5_S  28
+/** USB_DO_SETD1PID5 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DO_SETD1PID5    (BIT(29))
+#define USB_DO_SETD1PID5_M  (USB_DO_SETD1PID5_V << USB_DO_SETD1PID5_S)
+#define USB_DO_SETD1PID5_V  0x00000001
+#define USB_DO_SETD1PID5_S  29
+/** USB_EPDIS5 : RO; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No Endpoint disable
+ */
+#define USB_EPDIS5    (BIT(30))
+#define USB_EPDIS5_M  (USB_EPDIS5_V << USB_EPDIS5_S)
+#define USB_EPDIS5_V  0x00000001
+#define USB_EPDIS5_S  30
+/** USB_EPENA5 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_EPENA5    (BIT(31))
+#define USB_EPENA5_M  (USB_EPENA5_V << USB_EPENA5_S)
+#define USB_EPENA5_V  0x00000001
+#define USB_EPENA5_S  31
+
+
+/** USB_DOEPTSIZ5_REG register
+ *  Device OUT Endpoint 5 Transfer Size Register
+ */
+#define USB_DOEPTSIZ5_REG (SOC_DPORT_USB_BASE + 0xbb0)
+/** USB_XFERSIZE5 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size.Indicates the transfer size in bytes for ENDPOINT5
+ */
+#define USB_XFERSIZE5    0x0000007F
+#define USB_XFERSIZE5_M  (USB_XFERSIZE5_V << USB_XFERSIZE5_S)
+#define USB_XFERSIZE5_V  0x0000007F
+#define USB_XFERSIZE5_S  0
+/** USB_PKTCNT5 : R/W; bitpos: [19]; default: 0;
+ *  Packet Count (PktCnt).This field is decremented to zero after a packet is written
+ *  into the RxFIFO.
+ */
+#define USB_PKTCNT5    (BIT(19))
+#define USB_PKTCNT5_M  (USB_PKTCNT5_V << USB_PKTCNT5_S)
+#define USB_PKTCNT5_V  0x00000001
+#define USB_PKTCNT5_S  19
+/** USB_SUPCNT5 : R/W; bitpos: [31:29]; default: 0;
+ *  SETUP Packet Count (SUPCnt).This field specifies the number of back-to-back SETUP
+ *  data packets the endpoint can receive
+ *  2'b01: 1 packet
+ *  2'b10: 2 packets
+ *  2'b11: 3 packets
+ */
+#define USB_SUPCNT5    0x00000003
+#define USB_SUPCNT5_M  (USB_SUPCNT5_V << USB_SUPCNT5_S)
+#define USB_SUPCNT5_V  0x00000003
+#define USB_SUPCNT5_S  29
+
+
+/** USB_DOEPDMA5_REG register
+ *  Device OUT Endpoint 5 DMA Address Register
+ */
+#define USB_DOEPDMA5_REG (SOC_DPORT_USB_BASE + 0xbb4)
+/** USB_DMAADDR5 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the start address of the external memory for storing or fetching endpoint
+ *  data.
+ */
+#define USB_DMAADDR5    0xFFFFFFFF
+#define USB_DMAADDR5_M  (USB_DMAADDR5_V << USB_DMAADDR5_S)
+#define USB_DMAADDR5_V  0xFFFFFFFF
+#define USB_DMAADDR5_S  0
+
+
+/** USB_DOEPDMAB5_REG register
+ *  Device OUT Endpoint 16 Buffer Address Register
+ */
+#define USB_DOEPDMAB5_REG (SOC_DPORT_USB_BASE + 0xbbc)
+/** USB_DMABUFFERADDR5 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_DMABUFFERADDR5    0xFFFFFFFF
+#define USB_DMABUFFERADDR5_M  (USB_DMABUFFERADDR5_V << USB_DMABUFFERADDR5_S)
+#define USB_DMABUFFERADDR5_V  0xFFFFFFFF
+#define USB_DMABUFFERADDR5_S  0
+
+
+/** USB_DOEPCTL6_REG register
+ *  Device Control OUT Endpoint 6 Control Register
+ */
+#define USB_DOEPCTL6_REG (SOC_DPORT_USB_BASE + 0xbc0)
+/** USB_MPS6 : RO; bitpos: [11:0]; default: 0;
+ *  Maximum Packet Size in bytes
+ */
+#define USB_MPS6    0x000007FF
+#define USB_MPS6_M  (USB_MPS6_V << USB_MPS6_S)
+#define USB_MPS6_V  0x000007FF
+#define USB_MPS6_S  0
+/** USB_USBACTEP6 : RO; bitpos: [15]; default: 1;
+ *  0x1: USB Active Endpoint 0
+ */
+#define USB_USBACTEP6    (BIT(15))
+#define USB_USBACTEP6_M  (USB_USBACTEP6_V << USB_USBACTEP6_S)
+#define USB_USBACTEP6_V  0x00000001
+#define USB_USBACTEP6_S  15
+/** USB_NAKSTS6 : RO; bitpos: [17]; default: 0;
+ *  0x0 :  The core is transmitting non-NAK handshakes based on the FIFO status
+ *  0x1 :The core is transmitting NAK handshakes on this endpoint
+ */
+#define USB_NAKSTS6    (BIT(17))
+#define USB_NAKSTS6_M  (USB_NAKSTS6_V << USB_NAKSTS6_S)
+#define USB_NAKSTS6_V  0x00000001
+#define USB_NAKSTS6_S  17
+/** USB_EPTYPE6 : RO; bitpos: [20:18]; default: 0;
+ *  Endpoint Type
+ *  0x0 : Endpoint Control 6
+ */
+#define USB_EPTYPE6    0x00000003
+#define USB_EPTYPE6_M  (USB_EPTYPE6_V << USB_EPTYPE6_S)
+#define USB_EPTYPE6_V  0x00000003
+#define USB_EPTYPE6_S  18
+/** USB_SNP6 : R/W; bitpos: [20]; default: 0;
+ *  0x0 : Reserved 0
+ *  0x1 : Reserved 1
+ */
+#define USB_SNP6    (BIT(20))
+#define USB_SNP6_M  (USB_SNP6_V << USB_SNP6_S)
+#define USB_SNP6_V  0x00000001
+#define USB_SNP6_S  20
+/** USB_STALL6 : R/W; bitpos: [21]; default: 0;
+ *  The application can only set this bit, and the core clears it, when a SETUP token
+ *  is received for this endpoint
+ *  0x0 (INACTIVE): No Stall
+ *  0x1 (ACTIVE): Stall Handshake
+ */
+#define USB_STALL6    (BIT(21))
+#define USB_STALL6_M  (USB_STALL6_V << USB_STALL6_S)
+#define USB_STALL6_V  0x00000001
+#define USB_STALL6_S  21
+/** USB_CNAK6 : WO; bitpos: [26]; default: 0;
+ *  0x0 : No action
+ *  0x1 : Clear NAK
+ */
+#define USB_CNAK6    (BIT(26))
+#define USB_CNAK6_M  (USB_CNAK6_V << USB_CNAK6_S)
+#define USB_CNAK6_V  0x00000001
+#define USB_CNAK6_S  26
+/** USB_DO_SNAK6 : WO; bitpos: [27]; default: 0;
+ *  A write to this bit sets the NAK bit for the endpoint
+ *  0x0 : No action
+ *  0x1 : Set NAK
+ */
+#define USB_DO_SNAK6    (BIT(27))
+#define USB_DO_SNAK6_M  (USB_DO_SNAK6_V << USB_DO_SNAK6_S)
+#define USB_DO_SNAK6_V  0x00000001
+#define USB_DO_SNAK6_S  27
+/** USB_DO_SETD0PID6 : WO; bitpos: [28]; default: 0;
+ *  Set DATA0 PID
+ */
+#define USB_DO_SETD0PID6    (BIT(28))
+#define USB_DO_SETD0PID6_M  (USB_DO_SETD0PID6_V << USB_DO_SETD0PID6_S)
+#define USB_DO_SETD0PID6_V  0x00000001
+#define USB_DO_SETD0PID6_S  28
+/** USB_DO_SETD1PID6 : WO; bitpos: [29]; default: 0;
+ *  Set DATA1 PID
+ */
+#define USB_DO_SETD1PID6    (BIT(29))
+#define USB_DO_SETD1PID6_M  (USB_DO_SETD1PID6_V << USB_DO_SETD1PID6_S)
+#define USB_DO_SETD1PID6_V  0x00000001
+#define USB_DO_SETD1PID6_S  29
+/** USB_EPDIS6 : RO; bitpos: [30]; default: 0;
+ *  Endpoint Disable
+ *  0x0 : No Endpoint disable
+ */
+#define USB_EPDIS6    (BIT(30))
+#define USB_EPDIS6_M  (USB_EPDIS6_V << USB_EPDIS6_S)
+#define USB_EPDIS6_V  0x00000001
+#define USB_EPDIS6_S  30
+/** USB_EPENA6 : R/W; bitpos: [31]; default: 0;
+ *  Endpoint Enable
+ *  0x0 : No action
+ *  0x1 : Enable Endpoint
+ */
+#define USB_EPENA6    (BIT(31))
+#define USB_EPENA6_M  (USB_EPENA6_V << USB_EPENA6_S)
+#define USB_EPENA6_V  0x00000001
+#define USB_EPENA6_S  31
+
+
+/** USB_DOEPTSIZ6_REG register
+ *  Device OUT Endpoint 6 Transfer Size Register
+ */
+#define USB_DOEPTSIZ6_REG (SOC_DPORT_USB_BASE + 0xbd0)
+/** USB_XFERSIZE6 : R/W; bitpos: [7:0]; default: 0;
+ *  Transfer Size.Indicates the transfer size in bytes for ENDPOINT6
+ */
+#define USB_XFERSIZE6    0x0000007F
+#define USB_XFERSIZE6_M  (USB_XFERSIZE6_V << USB_XFERSIZE6_S)
+#define USB_XFERSIZE6_V  0x0000007F
+#define USB_XFERSIZE6_S  0
+/** USB_PKTCNT6 : R/W; bitpos: [19]; default: 0;
+ *  Packet Count (PktCnt).This field is decremented to zero after a packet is written
+ *  into the RxFIFO.
+ */
+#define USB_PKTCNT6    (BIT(19))
+#define USB_PKTCNT6_M  (USB_PKTCNT6_V << USB_PKTCNT6_S)
+#define USB_PKTCNT6_V  0x00000001
+#define USB_PKTCNT6_S  19
+/** USB_SUPCNT6 : R/W; bitpos: [31:29]; default: 0;
+ *  SETUP Packet Count (SUPCnt).This field specifies the number of back-to-back SETUP
+ *  data packets the endpoint can receive
+ *  2'b01: 1 packet
+ *  2'b10: 2 packets
+ *  2'b11: 3 packets
+ */
+#define USB_SUPCNT6    0x00000003
+#define USB_SUPCNT6_M  (USB_SUPCNT6_V << USB_SUPCNT6_S)
+#define USB_SUPCNT6_V  0x00000003
+#define USB_SUPCNT6_S  29
+
+
+/** USB_DOEPDMA6_REG register
+ *  Device OUT Endpoint 6 DMA Address Register
+ */
+#define USB_DOEPDMA6_REG (SOC_DPORT_USB_BASE + 0xbd4)
+/** USB_DMAADDR6 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the start address of the external memory for storing or fetching endpoint
+ *  data.
+ */
+#define USB_DMAADDR6    0xFFFFFFFF
+#define USB_DMAADDR6_M  (USB_DMAADDR6_V << USB_DMAADDR6_S)
+#define USB_DMAADDR6_V  0xFFFFFFFF
+#define USB_DMAADDR6_S  0
+
+
+/** USB_DOEPDMAB6_REG register
+ *  Device OUT Endpoint 16 Buffer Address Register
+ */
+#define USB_DOEPDMAB6_REG (SOC_DPORT_USB_BASE + 0xbdc)
+/** USB_DMABUFFERADDR6 : R/W; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_DMABUFFERADDR6    0xFFFFFFFF
+#define USB_DMABUFFERADDR6_M  (USB_DMABUFFERADDR6_V << USB_DMABUFFERADDR6_S)
+#define USB_DMABUFFERADDR6_V  0xFFFFFFFF
+#define USB_DMABUFFERADDR6_S  0
+
+
+/** USB_PCGCCTL_REG register
+ *  Power and Clock Gating Control Register
+ */
+#define USB_PCGCCTL_REG (SOC_DPORT_USB_BASE + 0xe00)
+/** USB_STOPPCLK : R/W; bitpos: [0]; default: 0;
+ *  0x0 : Disable Stop Pclk
+ *  0x1 : Enable Stop Pclk
+ */
+#define USB_STOPPCLK    (BIT(0))
+#define USB_STOPPCLK_M  (USB_STOPPCLK_V << USB_STOPPCLK_S)
+#define USB_STOPPCLK_V  0x00000001
+#define USB_STOPPCLK_S  0
+/** USB_GATEHCLK : R/W; bitpos: [1]; default: 0;
+ *  gate hclk
+ *  0x0:clears this bit when USB is resumed or a new session starts
+ *  0x1:set this bit to gate hclk to modules, when the USB is suspended or the session
+ *  is not valid
+ */
+#define USB_GATEHCLK    (BIT(1))
+#define USB_GATEHCLK_M  (USB_GATEHCLK_V << USB_GATEHCLK_S)
+#define USB_GATEHCLK_V  0x00000001
+#define USB_GATEHCLK_S  1
+/** USB_PWRCLMP : R/W; bitpos: [2]; default: 0;
+ *  0x0:Clears this bit to disable the clamping before the power is turned on
+ *  0x1:In only Partial Power-Down mode, sets this bit to clamp the signals between the
+ *  power-on modules and the power-off modules before the power is turned off
+ */
+#define USB_PWRCLMP    (BIT(2))
+#define USB_PWRCLMP_M  (USB_PWRCLMP_V << USB_PWRCLMP_S)
+#define USB_PWRCLMP_V  0x00000001
+#define USB_PWRCLMP_S  2
+/** USB_RSTPDWNMODULE : R/W; bitpos: [3]; default: 0;
+ *  Reset Power-Down Modules.
+ *  0x0 : Power is turned on
+ *  0x1 : Power is turned off
+ */
+#define USB_RSTPDWNMODULE    (BIT(3))
+#define USB_RSTPDWNMODULE_M  (USB_RSTPDWNMODULE_V << USB_RSTPDWNMODULE_S)
+#define USB_RSTPDWNMODULE_V  0x00000001
+#define USB_RSTPDWNMODULE_S  3
+/** USB_PHYSLEEP : RO; bitpos: [6]; default: 0;
+ *  0x0 : Phy not in Sleep state
+ *  0x1 : Phy in Sleep state
+ */
+#define USB_PHYSLEEP    (BIT(6))
+#define USB_PHYSLEEP_M  (USB_PHYSLEEP_V << USB_PHYSLEEP_S)
+#define USB_PHYSLEEP_V  0x00000001
+#define USB_PHYSLEEP_S  6
+/** USB_L1SUSPENDED : RO; bitpos: [7]; default: 0;
+ *  L1 Deep Sleep
+ *  0x0 : Non Deep Sleep
+ *  0x1 : Deep Sleep
+ */
+#define USB_L1SUSPENDED    (BIT(7))
+#define USB_L1SUSPENDED_M  (USB_L1SUSPENDED_V << USB_L1SUSPENDED_S)
+#define USB_L1SUSPENDED_V  0x00000001
+#define USB_L1SUSPENDED_S  7
+/** USB_RESETAFTERSUSP : R/W; bitpos: [8]; default: 0;
+ *  Reset after suspend
+ *  0x0 : In Host-only mode, host issues Resume after Suspend
+ *  0x1 : In Host-only mode, host sets this bit before clamp is removed if the host
+ *  needs to issue Reset after Suspend
+ */
+#define USB_RESETAFTERSUSP    (BIT(8))
+#define USB_RESETAFTERSUSP_M  (USB_RESETAFTERSUSP_V << USB_RESETAFTERSUSP_S)
+#define USB_RESETAFTERSUSP_V  0x00000001
+#define USB_RESETAFTERSUSP_S  8
+
+
+
+
+/** Interrupt registers */
+/** USB_GOTGINT_REG register
+ *  OTG Interrupt Register
+ */
+#define USB_GOTGINT_REG (SOC_DPORT_USB_BASE + 0x4)
+/** USB_SESENDDET : R/W1C; bitpos: [2]; default: 0;
+ *  Session End Detected.The controller sets this bit when the utmiotg_bvalid signal is
+ *  deasserted. This bit can be set only by the core and the application should write 1
+ *  to clear it
+ */
+#define USB_SESENDDET    (BIT(2))
+#define USB_SESENDDET_M  (USB_SESENDDET_V << USB_SESENDDET_S)
+#define USB_SESENDDET_V  0x00000001
+#define USB_SESENDDET_S  2
+/** USB_SESREQSUCSTSCHNG : R/W1C; bitpos: [8]; default: 0;
+ *  Session Request Success Status Change.The core sets this bit on the success or
+ *  failure of a session request.The application must read the Session Request Success
+ *  bit in the OTG Control and Status register (GOTGCTL_REG.USB_SESREQSCS) to check for
+ *  success or failure. This bit can be set only by the core and the application should
+ *  write 1 to clear it.
+ */
+#define USB_SESREQSUCSTSCHNG    (BIT(8))
+#define USB_SESREQSUCSTSCHNG_M  (USB_SESREQSUCSTSCHNG_V << USB_SESREQSUCSTSCHNG_S)
+#define USB_SESREQSUCSTSCHNG_V  0x00000001
+#define USB_SESREQSUCSTSCHNG_S  8
+/** USB_HSTNEGSUCSTSCHNG : R/W1C; bitpos: [9]; default: 0;
+ *  Host Negotiation Success Status Change. The core sets this bit on the success or
+ *  failure of a USB host negotiation request. The application must read the Host
+ *  Negotiation Success bit of the OTG Control and Status register
+ *  (GOTGCTL_REG.USB_HSTNEGSCS) to check for success or failure. This bit can be set
+ *  only by the core and the application should write 1 to clear it
+ */
+#define USB_HSTNEGSUCSTSCHNG    (BIT(9))
+#define USB_HSTNEGSUCSTSCHNG_M  (USB_HSTNEGSUCSTSCHNG_V << USB_HSTNEGSUCSTSCHNG_S)
+#define USB_HSTNEGSUCSTSCHNG_V  0x00000001
+#define USB_HSTNEGSUCSTSCHNG_S  9
+/** USB_HSTNEGDET : R/W1C; bitpos: [17]; default: 0;
+ *  Host Negotiation Detected.The core sets this bit when it detects a host negotiation
+ *  request on the USB. This bit can be set only by the core and the application should
+ *  write 1 to clear it.
+ */
+#define USB_HSTNEGDET    (BIT(17))
+#define USB_HSTNEGDET_M  (USB_HSTNEGDET_V << USB_HSTNEGDET_S)
+#define USB_HSTNEGDET_V  0x00000001
+#define USB_HSTNEGDET_S  17
+/** USB_ADEVTOUTCHG : R/W1C; bitpos: [18]; default: 0;
+ *  A-Device Timeout Change. The core sets this bit to indicate that the A-device has
+ *  timed out while waiting for the B-device to connect.This bit can be set only by the
+ *  core and the application should write 1 to clear it
+ */
+#define USB_ADEVTOUTCHG    (BIT(18))
+#define USB_ADEVTOUTCHG_M  (USB_ADEVTOUTCHG_V << USB_ADEVTOUTCHG_S)
+#define USB_ADEVTOUTCHG_V  0x00000001
+#define USB_ADEVTOUTCHG_S  18
+/** USB_DBNCEDONE : R/W1C; bitpos: [19]; default: 0;
+ *  Debounce Done. The core sets this bit when the debounce is completed after the
+ *  device connect. The application can start driving USB reset after seeing this
+ *  interrupt. This bit is only valid when the HNP Capable or SRP Capable bit is SET in
+ *  the Core USB Configuration register (GUSBCFG.HNPCap or GUSBCFG.SRPCap,
+ *  respectively). This bit can be set only by the core and the application should
+ *  write 1 to clear it
+ */
+#define USB_DBNCEDONE    (BIT(19))
+#define USB_DBNCEDONE_M  (USB_DBNCEDONE_V << USB_DBNCEDONE_S)
+#define USB_DBNCEDONE_V  0x00000001
+#define USB_DBNCEDONE_S  19
+
+
+/** USB_GINTSTS_REG register
+ *  Interrupt Register
+ */
+#define USB_GINTSTS_REG (SOC_DPORT_USB_BASE + 0x14)
+/** USB_CURMOD_INT : RO; bitpos: [0]; default: 0;
+ *  Current Mode of Operation
+ *  1'b0: Device mode
+ *  1'b1: Host mode
+ */
+#define USB_CURMOD_INT    (BIT(0))
+#define USB_CURMOD_INT_M  (USB_CURMOD_INT_V << USB_CURMOD_INT_S)
+#define USB_CURMOD_INT_V  0x00000001
+#define USB_CURMOD_INT_S  0
+/** USB_MODEMIS : R/W1C; bitpos: [1]; default: 0;
+ *  Mode Mismatch Interrupt.The core sets this bit when the application is trying to
+ *  access:A Host mode register, when the controller is operating in Device mode
+ */
+#define USB_MODEMIS    (BIT(1))
+#define USB_MODEMIS_M  (USB_MODEMIS_V << USB_MODEMIS_S)
+#define USB_MODEMIS_V  0x00000001
+#define USB_MODEMIS_S  1
+/** USB_OTGINT : RO; bitpos: [2]; default: 0;
+ *  OTG Interrupt.The controller sets this bit to indicate an OTG protocol event. The
+ *  application must read the OTG Interrupt Status (GOTGINT_REG) register to determine
+ *  the exact event that caused this interrupt. The application must clear the
+ *  appropriate status bit in the GOTGINT_REG register to clear this bit.
+ */
+#define USB_OTGINT    (BIT(2))
+#define USB_OTGINT_M  (USB_OTGINT_V << USB_OTGINT_S)
+#define USB_OTGINT_V  0x00000001
+#define USB_OTGINT_S  2
+/** USB_SOF : R/W1C; bitpos: [3]; default: 0;
+ *  Start of (micro)Frame (Sof)
+ *  In Host mode, the core sets this bit to indicate that an SOF (FS), micro-SOF (HS),
+ *  or Keep-Alive (LS) is transmitted on the USB. The application must write a 1 to
+ *  this bit to clear the interrupt
+ *  In Device mode, the controller sets this bit to indicate that an SOF token has been
+ *  received on the USB. The application can read the Device Status register to get the
+ *  current (micro)Frame number. This Interrupt is seen only when the core is operating
+ *  at either HS or FS. This bit can be set only by the core and the application must
+ *  write 1 to clear it
+ */
+#define USB_SOF    (BIT(3))
+#define USB_SOF_M  (USB_SOF_V << USB_SOF_S)
+#define USB_SOF_V  0x00000001
+#define USB_SOF_S  3
+/** USB_RXFLVI : RO; bitpos: [4]; default: 0;
+ *  RxFIFO Non-Empty.Indicates that there is at least one packet pending to be read
+ *  from the RxFIFO
+ *  1'b0: Rx Fifo is empty
+ *  1'b1: Rx Fifo is not empty
+ */
+#define USB_RXFLVI    (BIT(4))
+#define USB_RXFLVI_M  (USB_RXFLVI_V << USB_RXFLVI_S)
+#define USB_RXFLVI_V  0x00000001
+#define USB_RXFLVI_S  4
+/** USB_NPTXFEMP : RO; bitpos: [5]; default: 0;
+ *  Non-periodic TxFIFO Empty.This interrupt is asserted when the Non-periodic TxFIFO
+ *  is either half or completely empty, and there is space for at least one Entry to be
+ *  written to the Non-periodic Transmit Request Queue. The half or completely empty
+ *  status is determined by the Non-periodic TxFIFO Empty Level bit in the Core AHB
+ *  Configuration register (GAHBCFG_REG.USB_NPTXFEMPLVL).
+ */
+#define USB_NPTXFEMP    (BIT(5))
+#define USB_NPTXFEMP_M  (USB_NPTXFEMP_V << USB_NPTXFEMP_S)
+#define USB_NPTXFEMP_V  0x00000001
+#define USB_NPTXFEMP_S  5
+/** USB_GINNAKEFF : RO; bitpos: [6]; default: 0;
+ *  Device only.Global IN Non-periodic NAK Effective.Indicates that the Set Global
+ *  Non-periodic IN NAK bit in the Device Control register (DCTL.SGNPInNak) set by the
+ *  application, has taken effect in the core. That is, the core has sampled the Global
+ *  IN NAK bit Set by the application. This bit can be cleared by clearing the Clear
+ *  Global Non-periodic IN NAK bit in the Device Control register (DCTL.CGNPInNak).
+ *  This interrupt does not necessarily mean that a NAK handshake is sent out on the
+ *  USB. The STALL bit takes precedence over the NAK bit.
+ */
+#define USB_GINNAKEFF    (BIT(6))
+#define USB_GINNAKEFF_M  (USB_GINNAKEFF_V << USB_GINNAKEFF_S)
+#define USB_GINNAKEFF_V  0x00000001
+#define USB_GINNAKEFF_S  6
+/** USB_GOUTNAKEFF : RO; bitpos: [7]; default: 0;
+ *  Device only.Global OUT NAK Effective.Indicates that the Set Global OUT NAK bit in
+ *  the Device Control register (DCTL_REG.USB_SGOUTNAK), Set by the application, has
+ *  taken effect in the core. This bit can be cleared by writing the Clear Global OUT
+ *  NAK bit in the Device Control register (DCTL_REG.REG_CGOUTNAK).
+ */
+#define USB_GOUTNAKEFF    (BIT(7))
+#define USB_GOUTNAKEFF_M  (USB_GOUTNAKEFF_V << USB_GOUTNAKEFF_S)
+#define USB_GOUTNAKEFF_V  0x00000001
+#define USB_GOUTNAKEFF_S  7
+/** USB_ERLYSUSP : R/W1C; bitpos: [10]; default: 0;
+ *  Device only.Early Suspend.The controller sets this bit to indicate that an Idle
+ *  state has been detected on the USB for 3 ms.
+ */
+#define USB_ERLYSUSP    (BIT(10))
+#define USB_ERLYSUSP_M  (USB_ERLYSUSP_V << USB_ERLYSUSP_S)
+#define USB_ERLYSUSP_V  0x00000001
+#define USB_ERLYSUSP_S  10
+/** USB_USBSUSP : R/W1C; bitpos: [11]; default: 0;
+ *  Device only.USB Suspend.The controller sets this bit to indicate that a suspend was
+ *  detected on the USB. The controller enters the Suspended state when there is no
+ *  activity on the linestate signal for an extended period of time.
+ */
+#define USB_USBSUSP    (BIT(11))
+#define USB_USBSUSP_M  (USB_USBSUSP_V << USB_USBSUSP_S)
+#define USB_USBSUSP_V  0x00000001
+#define USB_USBSUSP_S  11
+/** USB_USBRST : R/W1C; bitpos: [12]; default: 0;
+ *  Device only.USB Reset.The controller sets this bit to indicate that a reset is
+ *  detected on the USB
+ */
+#define USB_USBRST    (BIT(12))
+#define USB_USBRST_M  (USB_USBRST_V << USB_USBRST_S)
+#define USB_USBRST_V  0x00000001
+#define USB_USBRST_S  12
+/** USB_ENUMDONE : R/W1C; bitpos: [13]; default: 0;
+ *  Device only.Enumeration Done.The core sets this bit to indicate that speed
+ *  enumeration is complete. The application must read the Device Status (DSTS_REG)
+ *  register to obtain the enumerated speed.
+ */
+#define USB_ENUMDONE    (BIT(13))
+#define USB_ENUMDONE_M  (USB_ENUMDONE_V << USB_ENUMDONE_S)
+#define USB_ENUMDONE_V  0x00000001
+#define USB_ENUMDONE_S  13
+/** USB_ISOOUTDROP : R/W1C; bitpos: [14]; default: 0;
+ *  Device only.Isochronous OUT Packet Dropped Interrupt.The controller sets this bit
+ *  when it fails to write an isochronous OUT packet into the RxFIFO because the RxFIFO
+ *  does not have enough space to accommodate a maximum packet size packet for the
+ *  isochronous OUT endpoint.
+ */
+#define USB_ISOOUTDROP    (BIT(14))
+#define USB_ISOOUTDROP_M  (USB_ISOOUTDROP_V << USB_ISOOUTDROP_S)
+#define USB_ISOOUTDROP_V  0x00000001
+#define USB_ISOOUTDROP_S  14
+/** USB_EOPF : R/W1C; bitpos: [15]; default: 0;
+ *  Device only.End of Periodic Frame Interrupt.Indicates that the period specified in
+ *  the Periodic Frame Interval field of the Device Configuration register
+ *  (DCFG_REG.REG_PERFRINT) has been reached in the current microframe.
+ */
+#define USB_EOPF    (BIT(15))
+#define USB_EOPF_M  (USB_EOPF_V << USB_EOPF_S)
+#define USB_EOPF_V  0x00000001
+#define USB_EOPF_S  15
+/** USB_EPMIS : R/W1C; bitpos: [17]; default: 0;
+ *  Device only.Endpoint Mismatch Interrupt.This interrupt is valid only in shared FIFO
+ *  operation.Indicates that an IN token has been received for a non-periodic endpoint,
+ *  but the data for another endpoint is present in the top of the Non-periodic
+ *  Transmit FIFO and the IN endpoint mismatch count programmed by the application has
+ *  expired.
+ */
+#define USB_EPMIS    (BIT(17))
+#define USB_EPMIS_M  (USB_EPMIS_V << USB_EPMIS_S)
+#define USB_EPMIS_V  0x00000001
+#define USB_EPMIS_S  17
+/** USB_IEPINT : RO; bitpos: [18]; default: 0;
+ *  Device only.IN Endpoints Interrupt.The core sets this bit to indicate that an
+ *  interrupt is pending on one of the IN endpoints of the core (in Device mode). The
+ *  application must read the Device All Endpoints Interrupt (DAINT) register to
+ *  determine the exact number of the IN endpoint on Device IN Endpoint-n Interrupt
+ *  (DIEPINTn) register to determine the exact cause of the interrupt. The application
+ *  must clear the appropriate status bit in the corresponding DIEPINTn register to
+ *  clear this bit.
+ */
+#define USB_IEPINT    (BIT(18))
+#define USB_IEPINT_M  (USB_IEPINT_V << USB_IEPINT_S)
+#define USB_IEPINT_V  0x00000001
+#define USB_IEPINT_S  18
+/** USB_OEPINT : RO; bitpos: [19]; default: 0;
+ *  Device only.OUT Endpoints Interrupt.The controller sets this bit to indicate that
+ *  an interrupt is pending on one of the OUT endpoints of the core (in Device mode).
+ *  The application must read the Device All Endpoints Interrupt (DAINT) register to
+ *  determine the exact number of the OUT endpoint on which the interrupt occurred, and
+ *  then read the corresponding Device OUT Endpoint-n Interrupt (DOEPINTn) register to
+ *  determine the exact cause of the interrupt. The application must clear the
+ *  appropriate status bit in the corresponding DOEPINTn register to clear this bit.
+ */
+#define USB_OEPINT    (BIT(19))
+#define USB_OEPINT_M  (USB_OEPINT_V << USB_OEPINT_S)
+#define USB_OEPINT_V  0x00000001
+#define USB_OEPINT_S  19
+/** USB_INCOMPISOIN : R/W1C; bitpos: [20]; default: 0;
+ *  Device only.Incomplete Isochronous IN Transfer.The core sets this interrupt to
+ *  indicate that there is at least one isochronous IN endpoint on which the transfer
+ *  is not completed in the current microframe. This interrupt is asserted along with
+ *  the End of Periodic Frame Interrupt (EOPF) bit in this register.
+ */
+#define USB_INCOMPISOIN    (BIT(20))
+#define USB_INCOMPISOIN_M  (USB_INCOMPISOIN_V << USB_INCOMPISOIN_S)
+#define USB_INCOMPISOIN_V  0x00000001
+#define USB_INCOMPISOIN_S  20
+/** USB_INCOMPIP : R/W1C; bitpos: [21]; default: 0;
+ *  In Host mode, the core sets this interrupt bit when there are incomplete periodic
+ *  transactions still pending which are scheduled for the current microframe.The
+ *  Device mode, the core sets this interrupt to indicate that thereis at least one
+ *  isochronous OUT endpoint on which the transfer is not completed in the current
+ *  microframe. This interrupt is asserted along with the End of Periodic Frame
+ *  Interrupt (EOPF) bit in this register.
+ */
+#define USB_INCOMPIP    (BIT(21))
+#define USB_INCOMPIP_M  (USB_INCOMPIP_V << USB_INCOMPIP_S)
+#define USB_INCOMPIP_V  0x00000001
+#define USB_INCOMPIP_S  21
+/** USB_FETSUSP : R/W1C; bitpos: [22]; default: 0;
+ *  Device only.Data Fetch Suspended.This interrupt is valid only in DMA mode. This
+ *  interrupt indicates that the core has stopped fetching data. For IN endpoints due
+ *  to the unavailability of TxFIFO space or Request Queue space. This interrupt is
+ *  used by the application for an endpoint mismatch algorithm
+ */
+#define USB_FETSUSP    (BIT(22))
+#define USB_FETSUSP_M  (USB_FETSUSP_V << USB_FETSUSP_S)
+#define USB_FETSUSP_V  0x00000001
+#define USB_FETSUSP_S  22
+/** USB_RESETDET : R/W1C; bitpos: [23]; default: 0;
+ *  Reset detected Interrupt
+ *  In Device mode, this interrupt is asserted when a reset is detected on the USB in
+ *  partial power-down mode when the device is in Suspend
+ *  In Host mode, this interrupt is not asserted
+ */
+#define USB_RESETDET    (BIT(23))
+#define USB_RESETDET_M  (USB_RESETDET_V << USB_RESETDET_S)
+#define USB_RESETDET_V  0x00000001
+#define USB_RESETDET_S  23
+/** USB_PRTLNT : RO; bitpos: [24]; default: 0;
+ *  Host only.Host Port Interrupt.The core sets this bit to indicate a change in port
+ *  status of one of the controller ports in Host mode. The application must read the
+ *  Host Port Control and Status (HPRT) register to determine the exact event that
+ *  caused this interrupt. The application must clear the appropriate status bit in the
+ *  Host Port Control and Status register to clear this bit.
+ */
+#define USB_PRTLNT    (BIT(24))
+#define USB_PRTLNT_M  (USB_PRTLNT_V << USB_PRTLNT_S)
+#define USB_PRTLNT_V  0x00000001
+#define USB_PRTLNT_S  24
+/** USB_HCHLNT : RO; bitpos: [25]; default: 0;
+ *  Host only.Host Channels Interrupt.The core sets this bit to indicate that an
+ *  interrupt is pending on one of the channels of the core (in Host mode). The
+ *  application must read the Host All Channels Interrupt (HAINT) register to determine
+ *  the exact number of the channel on which the interrupt occurred,and Then read the
+ *  corresponding Host Channel-n Interrupt (HCINTn) register to determine the exact
+ *  cause of the interrupt.The application must clear the appropriate status bit in the
+ *  HCINTn register to clear this bit.
+ */
+#define USB_HCHLNT    (BIT(25))
+#define USB_HCHLNT_M  (USB_HCHLNT_V << USB_HCHLNT_S)
+#define USB_HCHLNT_V  0x00000001
+#define USB_HCHLNT_S  25
+/** USB_PTXFEMP : RO; bitpos: [26]; default: 0;
+ *  Host only.Periodic TxFIFO Empty.This interrupt is asserted when the Periodic
+ *  Transmit FIFO is either half or completely empty and there is space for at least
+ *  one entry to be written in the Periodic Request Queue. The half or completelyempty
+ *  status is determined by the Periodic TxFIFO Empty Level bit in the Core AHB
+ *  Configuration register (GAHBCFG.PTxFEmpLvl)
+ */
+#define USB_PTXFEMP    (BIT(26))
+#define USB_PTXFEMP_M  (USB_PTXFEMP_V << USB_PTXFEMP_S)
+#define USB_PTXFEMP_V  0x00000001
+#define USB_PTXFEMP_S  26
+/** USB_CONIDSTSCHNG : R/W1C; bitpos: [28]; default: 0;
+ *  Connector ID Status Change
+ *  1'b0:Not active
+ *  1'b1:Connector ID Status Change
+ */
+#define USB_CONIDSTSCHNG    (BIT(28))
+#define USB_CONIDSTSCHNG_M  (USB_CONIDSTSCHNG_V << USB_CONIDSTSCHNG_S)
+#define USB_CONIDSTSCHNG_V  0x00000001
+#define USB_CONIDSTSCHNG_S  28
+/** USB_DISCONNINT : R/W1C; bitpos: [29]; default: 0;
+ *  Disconnect Detected Interrupt
+ *  1'b0:Not active
+ *  1'b1:Disconnect Detected Interrupt
+ */
+#define USB_DISCONNINT    (BIT(29))
+#define USB_DISCONNINT_M  (USB_DISCONNINT_V << USB_DISCONNINT_S)
+#define USB_DISCONNINT_V  0x00000001
+#define USB_DISCONNINT_S  29
+/** USB_SESSREQINT : R/W1C; bitpos: [30]; default: 0;
+ *  1'b0:Not active
+ *  1'b1:Session Request New Session Detected
+ */
+#define USB_SESSREQINT    (BIT(30))
+#define USB_SESSREQINT_M  (USB_SESSREQINT_V << USB_SESSREQINT_S)
+#define USB_SESSREQINT_V  0x00000001
+#define USB_SESSREQINT_S  30
+/** USB_WKUPINT : R/W1C; bitpos: [31]; default: 0;
+ *  Resume/Remote Wakeup Detected Interrupt
+ *  1'b0:Not active
+ *  1'b1:Resume or Remote Wakeup Detected Interrupt
+ */
+#define USB_WKUPINT    (BIT(31))
+#define USB_WKUPINT_M  (USB_WKUPINT_V << USB_WKUPINT_S)
+#define USB_WKUPINT_V  0x00000001
+#define USB_WKUPINT_S  31
+
+
+/** USB_GINTMSK_REG register
+ *  Interrupt Mask Register
+ */
+#define USB_GINTMSK_REG (SOC_DPORT_USB_BASE + 0x18)
+/** USB_MODEMISMSK : R/W; bitpos: [1]; default: 0;
+ *  1'b0:Mode Mismatch Interrupt Mask
+ *  1'b1:No Mode Mismatch Interrupt Mask
+ */
+#define USB_MODEMISMSK    (BIT(1))
+#define USB_MODEMISMSK_M  (USB_MODEMISMSK_V << USB_MODEMISMSK_S)
+#define USB_MODEMISMSK_V  0x00000001
+#define USB_MODEMISMSK_S  1
+/** USB_OTGINTMSK : R/W; bitpos: [2]; default: 0;
+ *  1'b0:OTG Interrupt Mask
+ *  1'b1:No OTG Interrupt Mask
+ */
+#define USB_OTGINTMSK    (BIT(2))
+#define USB_OTGINTMSK_M  (USB_OTGINTMSK_V << USB_OTGINTMSK_S)
+#define USB_OTGINTMSK_V  0x00000001
+#define USB_OTGINTMSK_S  2
+/** USB_SOFMSK : R/W; bitpos: [3]; default: 0;
+ *  1'b0:Start of (micro)Frame Mask
+ *  1'b1:No Start of (micro)Frame Mask
+ */
+#define USB_SOFMSK    (BIT(3))
+#define USB_SOFMSK_M  (USB_SOFMSK_V << USB_SOFMSK_S)
+#define USB_SOFMSK_V  0x00000001
+#define USB_SOFMSK_S  3
+/** USB_RXFLVIMSK : R/W; bitpos: [4]; default: 0;
+ *  1'b0:Receive FIFO Non-Empty Mask
+ *  1'b1:No Receive FIFO Non-Empty Mask
+ */
+#define USB_RXFLVIMSK    (BIT(4))
+#define USB_RXFLVIMSK_M  (USB_RXFLVIMSK_V << USB_RXFLVIMSK_S)
+#define USB_RXFLVIMSK_V  0x00000001
+#define USB_RXFLVIMSK_S  4
+/** USB_NPTXFEMPMSK : R/W; bitpos: [5]; default: 0;
+ *  1'b0:Non-periodic TxFIFO Empty Mask
+ *  1'b1:No Non-periodic TxFIFO Empty Mask
+ */
+#define USB_NPTXFEMPMSK    (BIT(5))
+#define USB_NPTXFEMPMSK_M  (USB_NPTXFEMPMSK_V << USB_NPTXFEMPMSK_S)
+#define USB_NPTXFEMPMSK_V  0x00000001
+#define USB_NPTXFEMPMSK_S  5
+/** USB_GINNAKEFFMSK : R/W; bitpos: [6]; default: 0;
+ *  1'b0:Global Non-periodic IN NAK Effective Mask
+ *  1'b1:No Global Non-periodic IN NAK Effective Mask
+ */
+#define USB_GINNAKEFFMSK    (BIT(6))
+#define USB_GINNAKEFFMSK_M  (USB_GINNAKEFFMSK_V << USB_GINNAKEFFMSK_S)
+#define USB_GINNAKEFFMSK_V  0x00000001
+#define USB_GINNAKEFFMSK_S  6
+/** USB_GOUTNACKEFFMSK : R/W; bitpos: [7]; default: 0;
+ *  1'b0:Global OUT NAK Effective Mask
+ *  1'b1:No Global OUT NAK Effective Mask
+ */
+#define USB_GOUTNACKEFFMSK    (BIT(7))
+#define USB_GOUTNACKEFFMSK_M  (USB_GOUTNACKEFFMSK_V << USB_GOUTNACKEFFMSK_S)
+#define USB_GOUTNACKEFFMSK_V  0x00000001
+#define USB_GOUTNACKEFFMSK_S  7
+/** USB_ERLYSUSPMSK : R/W; bitpos: [10]; default: 0;
+ *  1'b0:Early Suspend Mask
+ *  1'b1:No Early Suspend Mask
+ */
+#define USB_ERLYSUSPMSK    (BIT(10))
+#define USB_ERLYSUSPMSK_M  (USB_ERLYSUSPMSK_V << USB_ERLYSUSPMSK_S)
+#define USB_ERLYSUSPMSK_V  0x00000001
+#define USB_ERLYSUSPMSK_S  10
+/** USB_USBSUSPMSK : R/W; bitpos: [11]; default: 0;
+ *  1'b0:USB Suspend Mask
+ *  1'b1:No USB Suspend Mask
+ */
+#define USB_USBSUSPMSK    (BIT(11))
+#define USB_USBSUSPMSK_M  (USB_USBSUSPMSK_V << USB_USBSUSPMSK_S)
+#define USB_USBSUSPMSK_V  0x00000001
+#define USB_USBSUSPMSK_S  11
+/** USB_USBRSTMSK : R/W; bitpos: [12]; default: 0;
+ *  1'b0:USB Reset Mask
+ *  1'b1:No USB Reset Mask
+ */
+#define USB_USBRSTMSK    (BIT(12))
+#define USB_USBRSTMSK_M  (USB_USBRSTMSK_V << USB_USBRSTMSK_S)
+#define USB_USBRSTMSK_V  0x00000001
+#define USB_USBRSTMSK_S  12
+/** USB_ENUMDONEMSK : R/W; bitpos: [13]; default: 0;
+ *  1'b0: Enumeration Done Mask
+ *  1'b1: No Enumeration Done Mask
+ */
+#define USB_ENUMDONEMSK    (BIT(13))
+#define USB_ENUMDONEMSK_M  (USB_ENUMDONEMSK_V << USB_ENUMDONEMSK_S)
+#define USB_ENUMDONEMSK_V  0x00000001
+#define USB_ENUMDONEMSK_S  13
+/** USB_ISOOUTDROPMSK : R/W; bitpos: [14]; default: 0;
+ *  1'b0: Isochronous OUT Packet Dropped Interrupt Mask
+ *  1'b1: No Isochronous OUT Packet Dropped Interrupt Mask
+ */
+#define USB_ISOOUTDROPMSK    (BIT(14))
+#define USB_ISOOUTDROPMSK_M  (USB_ISOOUTDROPMSK_V << USB_ISOOUTDROPMSK_S)
+#define USB_ISOOUTDROPMSK_V  0x00000001
+#define USB_ISOOUTDROPMSK_S  14
+/** USB_EOPFMSK : R/W; bitpos: [15]; default: 0;
+ *  1'b0: End of Periodic Frame Interrupt Mask
+ *  1'b1: No End of Periodic Frame Interrupt Mask
+ */
+#define USB_EOPFMSK    (BIT(15))
+#define USB_EOPFMSK_M  (USB_EOPFMSK_V << USB_EOPFMSK_S)
+#define USB_EOPFMSK_V  0x00000001
+#define USB_EOPFMSK_S  15
+/** USB_EPMISMSK : R/W; bitpos: [17]; default: 0;
+ *  1'b0: Endpoint Mismatch Interrupt Mask
+ *  1'b1: No Endpoint Mismatch Interrupt Mask
+ */
+#define USB_EPMISMSK    (BIT(17))
+#define USB_EPMISMSK_M  (USB_EPMISMSK_V << USB_EPMISMSK_S)
+#define USB_EPMISMSK_V  0x00000001
+#define USB_EPMISMSK_S  17
+/** USB_IEPINTMSK : R/W; bitpos: [18]; default: 0;
+ *  1'b0: IN Endpoints Interrupt Mask
+ *  1'b1: No IN Endpoints Interrupt Mask
+ */
+#define USB_IEPINTMSK    (BIT(18))
+#define USB_IEPINTMSK_M  (USB_IEPINTMSK_V << USB_IEPINTMSK_S)
+#define USB_IEPINTMSK_V  0x00000001
+#define USB_IEPINTMSK_S  18
+/** USB_OEPINTMSK : R/W; bitpos: [19]; default: 0;
+ *  1'b0: OUT Endpoints Interrupt Mask
+ *  1'b1: No OUT Endpoints Interrupt Mask
+ */
+#define USB_OEPINTMSK    (BIT(19))
+#define USB_OEPINTMSK_M  (USB_OEPINTMSK_V << USB_OEPINTMSK_S)
+#define USB_OEPINTMSK_V  0x00000001
+#define USB_OEPINTMSK_S  19
+/** USB_INCOMPISOINMSK : R/W; bitpos: [20]; default: 0;
+ *  1'b0: Incomplete Isochronous IN Transfer Mask
+ *  1'b1: No Incomplete Isochronous IN Transfer Mask
+ */
+#define USB_INCOMPISOINMSK    (BIT(20))
+#define USB_INCOMPISOINMSK_M  (USB_INCOMPISOINMSK_V << USB_INCOMPISOINMSK_S)
+#define USB_INCOMPISOINMSK_V  0x00000001
+#define USB_INCOMPISOINMSK_S  20
+/** USB_INCOMPIPMSK : R/W; bitpos: [21]; default: 0;
+ *  1'b0: Host mode: Incomplete Periodic Transfer Mask Device mode: Incomplete
+ *  Isochronous OUT Transfer Mask
+ *  1'b1: Host mode: No Incomplete Periodic Transfer Mask  Device mode: No Incomplete
+ *  Isochronous OUT Transfer Mask
+ */
+#define USB_INCOMPIPMSK    (BIT(21))
+#define USB_INCOMPIPMSK_M  (USB_INCOMPIPMSK_V << USB_INCOMPIPMSK_S)
+#define USB_INCOMPIPMSK_V  0x00000001
+#define USB_INCOMPIPMSK_S  21
+/** USB_FETSUSPMSK : R/W; bitpos: [22]; default: 0;
+ *  1'b0: Data Fetch Suspended Mask
+ *  1'b1: No Data Fetch Suspended Mask
+ */
+#define USB_FETSUSPMSK    (BIT(22))
+#define USB_FETSUSPMSK_M  (USB_FETSUSPMSK_V << USB_FETSUSPMSK_S)
+#define USB_FETSUSPMSK_V  0x00000001
+#define USB_FETSUSPMSK_S  22
+/** USB_RESETDETMSK : R/W; bitpos: [23]; default: 0;
+ *  1'b0: Reset detected Interrupt Mask
+ *  1'b1: No Reset detected Interrupt Mask
+ */
+#define USB_RESETDETMSK    (BIT(23))
+#define USB_RESETDETMSK_M  (USB_RESETDETMSK_V << USB_RESETDETMSK_S)
+#define USB_RESETDETMSK_V  0x00000001
+#define USB_RESETDETMSK_S  23
+/** USB_PRTLNTMSK : R/W; bitpos: [24]; default: 0;
+ *  1'b0: Host Port Interrupt Mask
+ *  1'b1: No Host Port Interrupt Mask
+ */
+#define USB_PRTLNTMSK    (BIT(24))
+#define USB_PRTLNTMSK_M  (USB_PRTLNTMSK_V << USB_PRTLNTMSK_S)
+#define USB_PRTLNTMSK_V  0x00000001
+#define USB_PRTLNTMSK_S  24
+/** USB_HCHINTMSK : R/W; bitpos: [25]; default: 0;
+ *  1'b0: Host Channels Interrupt Mask
+ *  1'b1: No Host Channels Interrupt Mask
+ */
+#define USB_HCHINTMSK    (BIT(25))
+#define USB_HCHINTMSK_M  (USB_HCHINTMSK_V << USB_HCHINTMSK_S)
+#define USB_HCHINTMSK_V  0x00000001
+#define USB_HCHINTMSK_S  25
+/** USB_PTXFEMPMSK : R/W; bitpos: [26]; default: 0;
+ *  1'b0: Periodic TxFIFO Empty Mask
+ *  1'b1: No Periodic TxFIFO Empty Mask
+ */
+#define USB_PTXFEMPMSK    (BIT(26))
+#define USB_PTXFEMPMSK_M  (USB_PTXFEMPMSK_V << USB_PTXFEMPMSK_S)
+#define USB_PTXFEMPMSK_V  0x00000001
+#define USB_PTXFEMPMSK_S  26
+/** USB_CONIDSTSCHNGMSK : R/W; bitpos: [28]; default: 0;
+ *  1'b0: Connector ID Status Change Mask
+ *  1'b1: No Connector ID Status Change Mask
+ */
+#define USB_CONIDSTSCHNGMSK    (BIT(28))
+#define USB_CONIDSTSCHNGMSK_M  (USB_CONIDSTSCHNGMSK_V << USB_CONIDSTSCHNGMSK_S)
+#define USB_CONIDSTSCHNGMSK_V  0x00000001
+#define USB_CONIDSTSCHNGMSK_S  28
+/** USB_DISCONNINTMSK : R/W; bitpos: [29]; default: 0;
+ *  1'b0: Disconnect Detected Interrupt Mask
+ *  1'b1: No Disconnect Detected Interrupt Mask
+ */
+#define USB_DISCONNINTMSK    (BIT(29))
+#define USB_DISCONNINTMSK_M  (USB_DISCONNINTMSK_V << USB_DISCONNINTMSK_S)
+#define USB_DISCONNINTMSK_V  0x00000001
+#define USB_DISCONNINTMSK_S  29
+/** USB_SESSREQINTMSK : R/W; bitpos: [30]; default: 0;
+ *  1'b0: Session Request or New Session Detected Interrupt Mask
+ *  1'b1: No Session Request or New Session Detected Interrupt Mask
+ */
+#define USB_SESSREQINTMSK    (BIT(30))
+#define USB_SESSREQINTMSK_M  (USB_SESSREQINTMSK_V << USB_SESSREQINTMSK_S)
+#define USB_SESSREQINTMSK_V  0x00000001
+#define USB_SESSREQINTMSK_S  30
+/** USB_WKUPINTMSK : R/W; bitpos: [31]; default: 0;
+ *  1'b0 : Resume or Remote Wakeup Detected Interrupt Mask
+ *  1'b1 : Unmask Resume Remote Wakeup Detected Interrupt
+ */
+#define USB_WKUPINTMSK    (BIT(31))
+#define USB_WKUPINTMSK_M  (USB_WKUPINTMSK_V << USB_WKUPINTMSK_S)
+#define USB_WKUPINTMSK_V  0x00000001
+#define USB_WKUPINTMSK_S  31
+
+
+/** USB_HAINT_REG register
+ *  Host All Channels Interrupt Register
+ */
+#define USB_HAINT_REG (SOC_DPORT_USB_BASE + 0x414)
+/** USB_HAINT : RO; bitpos: [8:0]; default: 0;
+ *  Channel Interrupt for channel no.
+ */
+#define USB_HAINT    0x000000FF
+#define USB_HAINT_M  (USB_HAINT_V << USB_HAINT_S)
+#define USB_HAINT_V  0x000000FF
+#define USB_HAINT_S  0
+
+
+/** USB_HAINTMSK_REG register
+ *  Host All Channels Interrupt Mask Register
+ */
+#define USB_HAINTMSK_REG (SOC_DPORT_USB_BASE + 0x418)
+/** USB_HAINTMSK : R/W; bitpos: [8:0]; default: 0;
+ *  Channel Interrupt Mask (HAINTMSK_REG) One bit per channel: Bit 0 for channel 0, bit
+ *  15 for channel 15.
+ */
+#define USB_HAINTMSK    0x000000FF
+#define USB_HAINTMSK_M  (USB_HAINTMSK_V << USB_HAINTMSK_S)
+#define USB_HAINTMSK_V  0x000000FF
+#define USB_HAINTMSK_S  0
+
+
+/** USB_HCINT0_REG register
+ *  Host Channel 0 Interrupt Register
+ */
+#define USB_HCINT0_REG (SOC_DPORT_USB_BASE + 0x508)
+/** USB_H_XFERCOMPL0 : R/W1C; bitpos: [0]; default: 0;
+ *  1'b0: Transfer in progress or No Active Transfer
+ *  1'b1: Transfer completed normally without any errors
+ */
+#define USB_H_XFERCOMPL0    (BIT(0))
+#define USB_H_XFERCOMPL0_M  (USB_H_XFERCOMPL0_V << USB_H_XFERCOMPL0_S)
+#define USB_H_XFERCOMPL0_V  0x00000001
+#define USB_H_XFERCOMPL0_S  0
+/** USB_H_CHHLTD0 : R/W1C; bitpos: [1]; default: 0;
+ *  1'b0: Channel not halted
+ *  1'b1: Channel Halted
+ */
+#define USB_H_CHHLTD0    (BIT(1))
+#define USB_H_CHHLTD0_M  (USB_H_CHHLTD0_V << USB_H_CHHLTD0_S)
+#define USB_H_CHHLTD0_V  0x00000001
+#define USB_H_CHHLTD0_S  1
+/** USB_H_AHBERR0 : R/W1C; bitpos: [2]; default: 0;
+ *  1'b0: No AHB error
+ *  1'b1: AHB error during AHB read/write
+ */
+#define USB_H_AHBERR0    (BIT(2))
+#define USB_H_AHBERR0_M  (USB_H_AHBERR0_V << USB_H_AHBERR0_S)
+#define USB_H_AHBERR0_V  0x00000001
+#define USB_H_AHBERR0_S  2
+/** USB_H_STALL0 : R/W1C; bitpos: [3]; default: 0;
+ *  1'b0: No Stall Response Received Interrupt
+ *  1'b1: Stall Response Received Interrupt
+ */
+#define USB_H_STALL0    (BIT(3))
+#define USB_H_STALL0_M  (USB_H_STALL0_V << USB_H_STALL0_S)
+#define USB_H_STALL0_V  0x00000001
+#define USB_H_STALL0_S  3
+/** USB_H_NACK0 : R/W1C; bitpos: [4]; default: 0;
+ *  1'b0: No NAK Response Received Interrupt
+ *  1'b1: NAK Response Received Interrupt
+ */
+#define USB_H_NACK0    (BIT(4))
+#define USB_H_NACK0_M  (USB_H_NACK0_V << USB_H_NACK0_S)
+#define USB_H_NACK0_V  0x00000001
+#define USB_H_NACK0_S  4
+/** USB_H_ACK0 : R/W1C; bitpos: [5]; default: 0;
+ *  1'b0: No ACK Response Received or Transmitted Interrupt
+ *  1'b1: ACK Response Received or Transmitted Interrup
+ */
+#define USB_H_ACK0    (BIT(5))
+#define USB_H_ACK0_M  (USB_H_ACK0_V << USB_H_ACK0_S)
+#define USB_H_ACK0_V  0x00000001
+#define USB_H_ACK0_S  5
+/** USB_H_NYET0 : R/W1C; bitpos: [6]; default: 0;
+ *  1'b0: No NYET Response Received Interrupt
+ *  1'b1: NYET Response Received Interrupt
+ */
+#define USB_H_NYET0    (BIT(6))
+#define USB_H_NYET0_M  (USB_H_NYET0_V << USB_H_NYET0_S)
+#define USB_H_NYET0_V  0x00000001
+#define USB_H_NYET0_S  6
+/** USB_H_XACTERR0 : R/W1C; bitpos: [7]; default: 0;
+ *  Indicates one of the following errors occurred on the USB:
+ *  CRC check failure
+ *  Timeout
+ *  Bit stuff error
+ *  False EOP
+ */
+#define USB_H_XACTERR0    (BIT(7))
+#define USB_H_XACTERR0_M  (USB_H_XACTERR0_V << USB_H_XACTERR0_S)
+#define USB_H_XACTERR0_V  0x00000001
+#define USB_H_XACTERR0_S  7
+/** USB_H_BBLERR0 : R/W1C; bitpos: [8]; default: 0;
+ *  1'b0: No Babble Error
+ *  1'b1: Babble Error
+ */
+#define USB_H_BBLERR0    (BIT(8))
+#define USB_H_BBLERR0_M  (USB_H_BBLERR0_V << USB_H_BBLERR0_S)
+#define USB_H_BBLERR0_V  0x00000001
+#define USB_H_BBLERR0_S  8
+/** USB_H_FRMOVRUN0 : R/W1C; bitpos: [9]; default: 0;
+ *  1'b0: No Frame Overrun
+ *  1'b1: Frame Overrun
+ */
+#define USB_H_FRMOVRUN0    (BIT(9))
+#define USB_H_FRMOVRUN0_M  (USB_H_FRMOVRUN0_V << USB_H_FRMOVRUN0_S)
+#define USB_H_FRMOVRUN0_V  0x00000001
+#define USB_H_FRMOVRUN0_S  9
+/** USB_H_DATATGLERR0 : R/W1C; bitpos: [10]; default: 0;
+ *  1'b0: No Data Toggle Error
+ *  1'b1: Data Toggle Error
+ */
+#define USB_H_DATATGLERR0    (BIT(10))
+#define USB_H_DATATGLERR0_M  (USB_H_DATATGLERR0_V << USB_H_DATATGLERR0_S)
+#define USB_H_DATATGLERR0_V  0x00000001
+#define USB_H_DATATGLERR0_S  10
+/** USB_H_BNAINTR0 : R/W1C; bitpos: [11]; default: 0;
+ *  1'b0: No BNA Interrupt
+ *  1'b1: BNA Interrupt
+ */
+#define USB_H_BNAINTR0    (BIT(11))
+#define USB_H_BNAINTR0_M  (USB_H_BNAINTR0_V << USB_H_BNAINTR0_S)
+#define USB_H_BNAINTR0_V  0x00000001
+#define USB_H_BNAINTR0_S  11
+/** USB_H_XCS_XACT_ERR0 : R/W1C; bitpos: [12]; default: 0;
+ *  1'b0: No Excessive Transaction Error
+ *  1'b1: Excessive Transaction Error
+ */
+#define USB_H_XCS_XACT_ERR0    (BIT(12))
+#define USB_H_XCS_XACT_ERR0_M  (USB_H_XCS_XACT_ERR0_V << USB_H_XCS_XACT_ERR0_S)
+#define USB_H_XCS_XACT_ERR0_V  0x00000001
+#define USB_H_XCS_XACT_ERR0_S  12
+/** USB_H_DESC_LST_ROLLINTR0 : R/W1C; bitpos: [13]; default: 0;
+ *  1'b0: No Descriptor rollover interrupt
+ *  1'b1: Descriptor rollover interrupt
+ */
+#define USB_H_DESC_LST_ROLLINTR0    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTR0_M  (USB_H_DESC_LST_ROLLINTR0_V << USB_H_DESC_LST_ROLLINTR0_S)
+#define USB_H_DESC_LST_ROLLINTR0_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTR0_S  13
+
+
+/** USB_HCINTMSK0_REG register
+ *  Host Channel 0 Interrupt Mask Register
+ */
+#define USB_HCINTMSK0_REG (SOC_DPORT_USB_BASE + 0x50c)
+/** USB_H_XFERCOMPLMSK0 : R/W; bitpos: [0]; default: 0;
+ *  1'b0: Transfer Completed Mask
+ *  1'b1: No Transfer Completed Mask
+ */
+#define USB_H_XFERCOMPLMSK0    (BIT(0))
+#define USB_H_XFERCOMPLMSK0_M  (USB_H_XFERCOMPLMSK0_V << USB_H_XFERCOMPLMSK0_S)
+#define USB_H_XFERCOMPLMSK0_V  0x00000001
+#define USB_H_XFERCOMPLMSK0_S  0
+/** USB_H_CHHLTDMSK0 : R/W; bitpos: [1]; default: 0;
+ *  1'b0: Channel Halted Mask
+ *  1'b1: No Channel Halted Mask
+ */
+#define USB_H_CHHLTDMSK0    (BIT(1))
+#define USB_H_CHHLTDMSK0_M  (USB_H_CHHLTDMSK0_V << USB_H_CHHLTDMSK0_S)
+#define USB_H_CHHLTDMSK0_V  0x00000001
+#define USB_H_CHHLTDMSK0_S  1
+/** USB_H_AHBERRMSK0 : R/W; bitpos: [2]; default: 0;
+ *  1'b0: AHB Error Mask
+ *  1'b1: No AHB Error Mask
+ */
+#define USB_H_AHBERRMSK0    (BIT(2))
+#define USB_H_AHBERRMSK0_M  (USB_H_AHBERRMSK0_V << USB_H_AHBERRMSK0_S)
+#define USB_H_AHBERRMSK0_V  0x00000001
+#define USB_H_AHBERRMSK0_S  2
+/** USB_H_STALLMSK0 : R/W; bitpos: [3]; default: 0;
+ *  1'b0: Mask STALL Response Received Interrupt
+ *  1'b1: No STALL Response Received Interrupt Mask
+ */
+#define USB_H_STALLMSK0    (BIT(3))
+#define USB_H_STALLMSK0_M  (USB_H_STALLMSK0_V << USB_H_STALLMSK0_S)
+#define USB_H_STALLMSK0_V  0x00000001
+#define USB_H_STALLMSK0_S  3
+/** USB_H_NAKMSK0 : R/W; bitpos: [4]; default: 0;
+ *  1'b0: Mask NAK Response Received Interrupt
+ *  1'b1: No NAK Response Received Interrupt Mask
+ */
+#define USB_H_NAKMSK0    (BIT(4))
+#define USB_H_NAKMSK0_M  (USB_H_NAKMSK0_V << USB_H_NAKMSK0_S)
+#define USB_H_NAKMSK0_V  0x00000001
+#define USB_H_NAKMSK0_S  4
+/** USB_H_ACKMSK0 : R/W; bitpos: [5]; default: 0;
+ *  1'b0: Mask ACK Response Received/Transmitted Interrupt
+ *  1'b1: No ACK Response Received/Transmitted Interrupt Mask
+ */
+#define USB_H_ACKMSK0    (BIT(5))
+#define USB_H_ACKMSK0_M  (USB_H_ACKMSK0_V << USB_H_ACKMSK0_S)
+#define USB_H_ACKMSK0_V  0x00000001
+#define USB_H_ACKMSK0_S  5
+/** USB_H_NYETMSK0 : R/W; bitpos: [6]; default: 0;
+ *  1'b0: Mask NYET Response Received Interrupt
+ *  1'b1: No NYET Response Received Interrupt Mask
+ */
+#define USB_H_NYETMSK0    (BIT(6))
+#define USB_H_NYETMSK0_M  (USB_H_NYETMSK0_V << USB_H_NYETMSK0_S)
+#define USB_H_NYETMSK0_V  0x00000001
+#define USB_H_NYETMSK0_S  6
+/** USB_H_XACTERRMSK0 : R/W; bitpos: [7]; default: 0;
+ *  1'b0: Mask Transaction Error
+ *  1'b1: No Transaction Error Mask
+ */
+#define USB_H_XACTERRMSK0    (BIT(7))
+#define USB_H_XACTERRMSK0_M  (USB_H_XACTERRMSK0_V << USB_H_XACTERRMSK0_S)
+#define USB_H_XACTERRMSK0_V  0x00000001
+#define USB_H_XACTERRMSK0_S  7
+/** USB_H_BBLERRMSK0 : R/W; bitpos: [8]; default: 0;
+ *  Babble Error Mask
+ *  1'b0: Mask Babble Error
+ *  1'b1: No Babble Error Mask
+ */
+#define USB_H_BBLERRMSK0    (BIT(8))
+#define USB_H_BBLERRMSK0_M  (USB_H_BBLERRMSK0_V << USB_H_BBLERRMSK0_S)
+#define USB_H_BBLERRMSK0_V  0x00000001
+#define USB_H_BBLERRMSK0_S  8
+/** USB_H_FRMOVRUNMSK0 : R/W; bitpos: [9]; default: 0;
+ *  Frame Overrun Mask
+ *  0x0 (MASK): Mask Overrun Mask
+ *  0x1 (NOMASK): No Frame Overrun Mask
+ */
+#define USB_H_FRMOVRUNMSK0    (BIT(9))
+#define USB_H_FRMOVRUNMSK0_M  (USB_H_FRMOVRUNMSK0_V << USB_H_FRMOVRUNMSK0_S)
+#define USB_H_FRMOVRUNMSK0_V  0x00000001
+#define USB_H_FRMOVRUNMSK0_S  9
+/** USB_H_DATATGLERRMSK0 : R/W; bitpos: [10]; default: 0;
+ *  Data Toggle Error Mask n scatter/gather DMA mode for host
+ *  1'b0: Mask Data Toggle Error
+ *  1'b1: No Data Toggle Error Mask
+ */
+#define USB_H_DATATGLERRMSK0    (BIT(10))
+#define USB_H_DATATGLERRMSK0_M  (USB_H_DATATGLERRMSK0_V << USB_H_DATATGLERRMSK0_S)
+#define USB_H_DATATGLERRMSK0_V  0x00000001
+#define USB_H_DATATGLERRMSK0_S  10
+/** USB_H_BNAINTRMSK0 : R/W; bitpos: [11]; default: 0;
+ *  BNA (Buffer Not Available) Interrupt mask register
+ *  1'b0: BNA Interrupt Masked
+ *  1'b1: BNA Interrupt not masked
+ */
+#define USB_H_BNAINTRMSK0    (BIT(11))
+#define USB_H_BNAINTRMSK0_M  (USB_H_BNAINTRMSK0_V << USB_H_BNAINTRMSK0_S)
+#define USB_H_BNAINTRMSK0_V  0x00000001
+#define USB_H_BNAINTRMSK0_S  11
+/** USB_H_DESC_LST_ROLLINTRMSK0 : R/W; bitpos: [13]; default: 0;
+ *  Descriptor List rollover interrupt Mask
+ *  1'b0: Descriptor Rollover Interrupt Mask
+ *  1'b1: Descriptor Rollover Interrupt not masked
+ */
+#define USB_H_DESC_LST_ROLLINTRMSK0    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTRMSK0_M  (USB_H_DESC_LST_ROLLINTRMSK0_V << USB_H_DESC_LST_ROLLINTRMSK0_S)
+#define USB_H_DESC_LST_ROLLINTRMSK0_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTRMSK0_S  13
+
+
+/** USB_HCINT1_REG register
+ *  Host Channel 1 Interrupt Register
+ */
+#define USB_HCINT1_REG (SOC_DPORT_USB_BASE + 0x528)
+/** USB_H_XFERCOMPL1 : R/W1C; bitpos: [0]; default: 0;
+ *  1'b0: Transfer in progress or No Active Transfer
+ *  1'b1: Transfer completed normally without any errors
+ */
+#define USB_H_XFERCOMPL1    (BIT(0))
+#define USB_H_XFERCOMPL1_M  (USB_H_XFERCOMPL1_V << USB_H_XFERCOMPL1_S)
+#define USB_H_XFERCOMPL1_V  0x00000001
+#define USB_H_XFERCOMPL1_S  0
+/** USB_H_CHHLTD1 : R/W1C; bitpos: [1]; default: 0;
+ *  1'b0: Channel not halted
+ *  1'b1: Channel Halted
+ */
+#define USB_H_CHHLTD1    (BIT(1))
+#define USB_H_CHHLTD1_M  (USB_H_CHHLTD1_V << USB_H_CHHLTD1_S)
+#define USB_H_CHHLTD1_V  0x00000001
+#define USB_H_CHHLTD1_S  1
+/** USB_H_AHBERR1 : R/W1C; bitpos: [2]; default: 0;
+ *  1'b0: No AHB error
+ *  1'b1: AHB error during AHB read/write
+ */
+#define USB_H_AHBERR1    (BIT(2))
+#define USB_H_AHBERR1_M  (USB_H_AHBERR1_V << USB_H_AHBERR1_S)
+#define USB_H_AHBERR1_V  0x00000001
+#define USB_H_AHBERR1_S  2
+/** USB_H_STALL1 : R/W1C; bitpos: [3]; default: 0;
+ *  1'b0: No Stall Response Received Interrupt
+ *  1'b1: Stall Response Received Interrupt
+ */
+#define USB_H_STALL1    (BIT(3))
+#define USB_H_STALL1_M  (USB_H_STALL1_V << USB_H_STALL1_S)
+#define USB_H_STALL1_V  0x00000001
+#define USB_H_STALL1_S  3
+/** USB_H_NACK1 : R/W1C; bitpos: [4]; default: 0;
+ *  1'b0: No NAK Response Received Interrupt
+ *  1'b1: NAK Response Received Interrupt
+ */
+#define USB_H_NACK1    (BIT(4))
+#define USB_H_NACK1_M  (USB_H_NACK1_V << USB_H_NACK1_S)
+#define USB_H_NACK1_V  0x00000001
+#define USB_H_NACK1_S  4
+/** USB_H_ACK1 : R/W1C; bitpos: [5]; default: 0;
+ *  1'b0: No ACK Response Received or Transmitted Interrupt
+ *  1'b1: ACK Response Received or Transmitted Interrup
+ */
+#define USB_H_ACK1    (BIT(5))
+#define USB_H_ACK1_M  (USB_H_ACK1_V << USB_H_ACK1_S)
+#define USB_H_ACK1_V  0x00000001
+#define USB_H_ACK1_S  5
+/** USB_H_NYET1 : R/W1C; bitpos: [6]; default: 0;
+ *  1'b0: No NYET Response Received Interrupt
+ *  1'b1: NYET Response Received Interrupt
+ */
+#define USB_H_NYET1    (BIT(6))
+#define USB_H_NYET1_M  (USB_H_NYET1_V << USB_H_NYET1_S)
+#define USB_H_NYET1_V  0x00000001
+#define USB_H_NYET1_S  6
+/** USB_H_XACTERR1 : R/W1C; bitpos: [7]; default: 0;
+ *  Indicates one of the following errors occurred on the USB:
+ *  CRC check failure
+ *  Timeout
+ *  Bit stuff error
+ *  False EOP
+ */
+#define USB_H_XACTERR1    (BIT(7))
+#define USB_H_XACTERR1_M  (USB_H_XACTERR1_V << USB_H_XACTERR1_S)
+#define USB_H_XACTERR1_V  0x00000001
+#define USB_H_XACTERR1_S  7
+/** USB_H_BBLERR1 : R/W1C; bitpos: [8]; default: 0;
+ *  1'b0: No Babble Error
+ *  1'b1: Babble Error
+ */
+#define USB_H_BBLERR1    (BIT(8))
+#define USB_H_BBLERR1_M  (USB_H_BBLERR1_V << USB_H_BBLERR1_S)
+#define USB_H_BBLERR1_V  0x00000001
+#define USB_H_BBLERR1_S  8
+/** USB_H_FRMOVRUN1 : R/W1C; bitpos: [9]; default: 0;
+ *  1'b0: No Frame Overrun
+ *  1'b1: Frame Overrun
+ */
+#define USB_H_FRMOVRUN1    (BIT(9))
+#define USB_H_FRMOVRUN1_M  (USB_H_FRMOVRUN1_V << USB_H_FRMOVRUN1_S)
+#define USB_H_FRMOVRUN1_V  0x00000001
+#define USB_H_FRMOVRUN1_S  9
+/** USB_H_DATATGLERR1 : R/W1C; bitpos: [10]; default: 0;
+ *  1'b0: No Data Toggle Error
+ *  1'b1: Data Toggle Error
+ */
+#define USB_H_DATATGLERR1    (BIT(10))
+#define USB_H_DATATGLERR1_M  (USB_H_DATATGLERR1_V << USB_H_DATATGLERR1_S)
+#define USB_H_DATATGLERR1_V  0x00000001
+#define USB_H_DATATGLERR1_S  10
+/** USB_H_BNAINTR1 : R/W1C; bitpos: [11]; default: 0;
+ *  1'b0: No BNA Interrupt
+ *  1'b1: BNA Interrupt
+ */
+#define USB_H_BNAINTR1    (BIT(11))
+#define USB_H_BNAINTR1_M  (USB_H_BNAINTR1_V << USB_H_BNAINTR1_S)
+#define USB_H_BNAINTR1_V  0x00000001
+#define USB_H_BNAINTR1_S  11
+/** USB_H_XCS_XACT_ERR1 : R/W1C; bitpos: [12]; default: 0;
+ *  1'b0: No Excessive Transaction Error
+ *  1'b1: Excessive Transaction Error
+ */
+#define USB_H_XCS_XACT_ERR1    (BIT(12))
+#define USB_H_XCS_XACT_ERR1_M  (USB_H_XCS_XACT_ERR1_V << USB_H_XCS_XACT_ERR1_S)
+#define USB_H_XCS_XACT_ERR1_V  0x00000001
+#define USB_H_XCS_XACT_ERR1_S  12
+/** USB_H_DESC_LST_ROLLINTR1 : R/W1C; bitpos: [13]; default: 0;
+ *  1'b0: No Descriptor rollover interrupt
+ *  1'b1: Descriptor rollover interrupt
+ */
+#define USB_H_DESC_LST_ROLLINTR1    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTR1_M  (USB_H_DESC_LST_ROLLINTR1_V << USB_H_DESC_LST_ROLLINTR1_S)
+#define USB_H_DESC_LST_ROLLINTR1_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTR1_S  13
+
+
+/** USB_HCINTMSK1_REG register
+ *  Host Channel 1 Interrupt Mask Register
+ */
+#define USB_HCINTMSK1_REG (SOC_DPORT_USB_BASE + 0x52c)
+/** USB_H_XFERCOMPLMSK1 : R/W; bitpos: [0]; default: 0;
+ *  1'b0: Transfer Completed Mask
+ *  1'b1: No Transfer Completed Mask
+ */
+#define USB_H_XFERCOMPLMSK1    (BIT(0))
+#define USB_H_XFERCOMPLMSK1_M  (USB_H_XFERCOMPLMSK1_V << USB_H_XFERCOMPLMSK1_S)
+#define USB_H_XFERCOMPLMSK1_V  0x00000001
+#define USB_H_XFERCOMPLMSK1_S  0
+/** USB_H_CHHLTDMSK1 : R/W; bitpos: [1]; default: 0;
+ *  1'b0: Channel Halted Mask
+ *  1'b1: No Channel Halted Mask
+ */
+#define USB_H_CHHLTDMSK1    (BIT(1))
+#define USB_H_CHHLTDMSK1_M  (USB_H_CHHLTDMSK1_V << USB_H_CHHLTDMSK1_S)
+#define USB_H_CHHLTDMSK1_V  0x00000001
+#define USB_H_CHHLTDMSK1_S  1
+/** USB_H_AHBERRMSK1 : R/W; bitpos: [2]; default: 0;
+ *  1'b0: AHB Error Mask
+ *  1'b1: No AHB Error Mask
+ */
+#define USB_H_AHBERRMSK1    (BIT(2))
+#define USB_H_AHBERRMSK1_M  (USB_H_AHBERRMSK1_V << USB_H_AHBERRMSK1_S)
+#define USB_H_AHBERRMSK1_V  0x00000001
+#define USB_H_AHBERRMSK1_S  2
+/** USB_H_STALLMSK1 : R/W; bitpos: [3]; default: 0;
+ *  1'b0: Mask STALL Response Received Interrupt
+ *  1'b1: No STALL Response Received Interrupt Mask
+ */
+#define USB_H_STALLMSK1    (BIT(3))
+#define USB_H_STALLMSK1_M  (USB_H_STALLMSK1_V << USB_H_STALLMSK1_S)
+#define USB_H_STALLMSK1_V  0x00000001
+#define USB_H_STALLMSK1_S  3
+/** USB_H_NAKMSK1 : R/W; bitpos: [4]; default: 0;
+ *  1'b0: Mask NAK Response Received Interrupt
+ *  1'b1: No NAK Response Received Interrupt Mask
+ */
+#define USB_H_NAKMSK1    (BIT(4))
+#define USB_H_NAKMSK1_M  (USB_H_NAKMSK1_V << USB_H_NAKMSK1_S)
+#define USB_H_NAKMSK1_V  0x00000001
+#define USB_H_NAKMSK1_S  4
+/** USB_H_ACKMSK1 : R/W; bitpos: [5]; default: 0;
+ *  1'b0: Mask ACK Response Received/Transmitted Interrupt
+ *  1'b1: No ACK Response Received/Transmitted Interrupt Mask
+ */
+#define USB_H_ACKMSK1    (BIT(5))
+#define USB_H_ACKMSK1_M  (USB_H_ACKMSK1_V << USB_H_ACKMSK1_S)
+#define USB_H_ACKMSK1_V  0x00000001
+#define USB_H_ACKMSK1_S  5
+/** USB_H_NYETMSK1 : R/W; bitpos: [6]; default: 0;
+ *  1'b0: Mask NYET Response Received Interrupt
+ *  1'b1: No NYET Response Received Interrupt Mask
+ */
+#define USB_H_NYETMSK1    (BIT(6))
+#define USB_H_NYETMSK1_M  (USB_H_NYETMSK1_V << USB_H_NYETMSK1_S)
+#define USB_H_NYETMSK1_V  0x00000001
+#define USB_H_NYETMSK1_S  6
+/** USB_H_XACTERRMSK1 : R/W; bitpos: [7]; default: 0;
+ *  1'b0: Mask Transaction Error
+ *  1'b1: No Transaction Error Mask
+ */
+#define USB_H_XACTERRMSK1    (BIT(7))
+#define USB_H_XACTERRMSK1_M  (USB_H_XACTERRMSK1_V << USB_H_XACTERRMSK1_S)
+#define USB_H_XACTERRMSK1_V  0x00000001
+#define USB_H_XACTERRMSK1_S  7
+/** USB_H_BBLERRMSK1 : R/W; bitpos: [8]; default: 0;
+ *  Babble Error Mask
+ *  1'b0: Mask Babble Error
+ *  1'b1: No Babble Error Mask
+ */
+#define USB_H_BBLERRMSK1    (BIT(8))
+#define USB_H_BBLERRMSK1_M  (USB_H_BBLERRMSK1_V << USB_H_BBLERRMSK1_S)
+#define USB_H_BBLERRMSK1_V  0x00000001
+#define USB_H_BBLERRMSK1_S  8
+/** USB_H_FRMOVRUNMSK1 : R/W; bitpos: [9]; default: 0;
+ *  Frame Overrun Mask
+ *  0x0 (MASK): Mask Overrun Mask
+ *  0x1 (NOMASK): No Frame Overrun Mask
+ */
+#define USB_H_FRMOVRUNMSK1    (BIT(9))
+#define USB_H_FRMOVRUNMSK1_M  (USB_H_FRMOVRUNMSK1_V << USB_H_FRMOVRUNMSK1_S)
+#define USB_H_FRMOVRUNMSK1_V  0x00000001
+#define USB_H_FRMOVRUNMSK1_S  9
+/** USB_H_DATATGLERRMSK1 : R/W; bitpos: [10]; default: 0;
+ *  Data Toggle Error Mask n scatter/gather DMA mode for host
+ *  1'b0: Mask Data Toggle Error
+ *  1'b1: No Data Toggle Error Mask
+ */
+#define USB_H_DATATGLERRMSK1    (BIT(10))
+#define USB_H_DATATGLERRMSK1_M  (USB_H_DATATGLERRMSK1_V << USB_H_DATATGLERRMSK1_S)
+#define USB_H_DATATGLERRMSK1_V  0x00000001
+#define USB_H_DATATGLERRMSK1_S  10
+/** USB_H_BNAINTRMSK1 : R/W; bitpos: [11]; default: 0;
+ *  BNA (Buffer Not Available) Interrupt mask register
+ *  1'b0: BNA Interrupt Masked
+ *  1'b1: BNA Interrupt not masked
+ */
+#define USB_H_BNAINTRMSK1    (BIT(11))
+#define USB_H_BNAINTRMSK1_M  (USB_H_BNAINTRMSK1_V << USB_H_BNAINTRMSK1_S)
+#define USB_H_BNAINTRMSK1_V  0x00000001
+#define USB_H_BNAINTRMSK1_S  11
+/** USB_H_DESC_LST_ROLLINTRMSK1 : R/W; bitpos: [13]; default: 0;
+ *  Descriptor List rollover interrupt Mask
+ *  1'b0: Descriptor Rollover Interrupt Mask
+ *  1'b1: Descriptor Rollover Interrupt not masked
+ */
+#define USB_H_DESC_LST_ROLLINTRMSK1    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTRMSK1_M  (USB_H_DESC_LST_ROLLINTRMSK1_V << USB_H_DESC_LST_ROLLINTRMSK1_S)
+#define USB_H_DESC_LST_ROLLINTRMSK1_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTRMSK1_S  13
+
+
+/** USB_HCINT2_REG register
+ *  Host Channel 2 Interrupt Register
+ */
+#define USB_HCINT2_REG (SOC_DPORT_USB_BASE + 0x548)
+/** USB_H_XFERCOMPL2 : R/W1C; bitpos: [0]; default: 0;
+ *  1'b0: Transfer in progress or No Active Transfer
+ *  1'b1: Transfer completed normally without any errors
+ */
+#define USB_H_XFERCOMPL2    (BIT(0))
+#define USB_H_XFERCOMPL2_M  (USB_H_XFERCOMPL2_V << USB_H_XFERCOMPL2_S)
+#define USB_H_XFERCOMPL2_V  0x00000001
+#define USB_H_XFERCOMPL2_S  0
+/** USB_H_CHHLTD2 : R/W1C; bitpos: [1]; default: 0;
+ *  1'b0: Channel not halted
+ *  1'b1: Channel Halted
+ */
+#define USB_H_CHHLTD2    (BIT(1))
+#define USB_H_CHHLTD2_M  (USB_H_CHHLTD2_V << USB_H_CHHLTD2_S)
+#define USB_H_CHHLTD2_V  0x00000001
+#define USB_H_CHHLTD2_S  1
+/** USB_H_AHBERR2 : R/W1C; bitpos: [2]; default: 0;
+ *  1'b0: No AHB error
+ *  1'b1: AHB error during AHB read/write
+ */
+#define USB_H_AHBERR2    (BIT(2))
+#define USB_H_AHBERR2_M  (USB_H_AHBERR2_V << USB_H_AHBERR2_S)
+#define USB_H_AHBERR2_V  0x00000001
+#define USB_H_AHBERR2_S  2
+/** USB_H_STALL2 : R/W1C; bitpos: [3]; default: 0;
+ *  1'b0: No Stall Response Received Interrupt
+ *  1'b1: Stall Response Received Interrupt
+ */
+#define USB_H_STALL2    (BIT(3))
+#define USB_H_STALL2_M  (USB_H_STALL2_V << USB_H_STALL2_S)
+#define USB_H_STALL2_V  0x00000001
+#define USB_H_STALL2_S  3
+/** USB_H_NACK2 : R/W1C; bitpos: [4]; default: 0;
+ *  1'b0: No NAK Response Received Interrupt
+ *  1'b1: NAK Response Received Interrupt
+ */
+#define USB_H_NACK2    (BIT(4))
+#define USB_H_NACK2_M  (USB_H_NACK2_V << USB_H_NACK2_S)
+#define USB_H_NACK2_V  0x00000001
+#define USB_H_NACK2_S  4
+/** USB_H_ACK2 : R/W1C; bitpos: [5]; default: 0;
+ *  1'b0: No ACK Response Received or Transmitted Interrupt
+ *  1'b1: ACK Response Received or Transmitted Interrup
+ */
+#define USB_H_ACK2    (BIT(5))
+#define USB_H_ACK2_M  (USB_H_ACK2_V << USB_H_ACK2_S)
+#define USB_H_ACK2_V  0x00000001
+#define USB_H_ACK2_S  5
+/** USB_H_NYET2 : R/W1C; bitpos: [6]; default: 0;
+ *  1'b0: No NYET Response Received Interrupt
+ *  1'b1: NYET Response Received Interrupt
+ */
+#define USB_H_NYET2    (BIT(6))
+#define USB_H_NYET2_M  (USB_H_NYET2_V << USB_H_NYET2_S)
+#define USB_H_NYET2_V  0x00000001
+#define USB_H_NYET2_S  6
+/** USB_H_XACTERR2 : R/W1C; bitpos: [7]; default: 0;
+ *  Indicates one of the following errors occurred on the USB:
+ *  CRC check failure
+ *  Timeout
+ *  Bit stuff error
+ *  False EOP
+ */
+#define USB_H_XACTERR2    (BIT(7))
+#define USB_H_XACTERR2_M  (USB_H_XACTERR2_V << USB_H_XACTERR2_S)
+#define USB_H_XACTERR2_V  0x00000001
+#define USB_H_XACTERR2_S  7
+/** USB_H_BBLERR2 : R/W1C; bitpos: [8]; default: 0;
+ *  1'b0: No Babble Error
+ *  1'b1: Babble Error
+ */
+#define USB_H_BBLERR2    (BIT(8))
+#define USB_H_BBLERR2_M  (USB_H_BBLERR2_V << USB_H_BBLERR2_S)
+#define USB_H_BBLERR2_V  0x00000001
+#define USB_H_BBLERR2_S  8
+/** USB_H_FRMOVRUN2 : R/W1C; bitpos: [9]; default: 0;
+ *  1'b0: No Frame Overrun
+ *  1'b1: Frame Overrun
+ */
+#define USB_H_FRMOVRUN2    (BIT(9))
+#define USB_H_FRMOVRUN2_M  (USB_H_FRMOVRUN2_V << USB_H_FRMOVRUN2_S)
+#define USB_H_FRMOVRUN2_V  0x00000001
+#define USB_H_FRMOVRUN2_S  9
+/** USB_H_DATATGLERR2 : R/W1C; bitpos: [10]; default: 0;
+ *  1'b0: No Data Toggle Error
+ *  1'b1: Data Toggle Error
+ */
+#define USB_H_DATATGLERR2    (BIT(10))
+#define USB_H_DATATGLERR2_M  (USB_H_DATATGLERR2_V << USB_H_DATATGLERR2_S)
+#define USB_H_DATATGLERR2_V  0x00000001
+#define USB_H_DATATGLERR2_S  10
+/** USB_H_BNAINTR2 : R/W1C; bitpos: [11]; default: 0;
+ *  1'b0: No BNA Interrupt
+ *  1'b1: BNA Interrupt
+ */
+#define USB_H_BNAINTR2    (BIT(11))
+#define USB_H_BNAINTR2_M  (USB_H_BNAINTR2_V << USB_H_BNAINTR2_S)
+#define USB_H_BNAINTR2_V  0x00000001
+#define USB_H_BNAINTR2_S  11
+/** USB_H_XCS_XACT_ERR2 : R/W1C; bitpos: [12]; default: 0;
+ *  1'b0: No Excessive Transaction Error
+ *  1'b1: Excessive Transaction Error
+ */
+#define USB_H_XCS_XACT_ERR2    (BIT(12))
+#define USB_H_XCS_XACT_ERR2_M  (USB_H_XCS_XACT_ERR2_V << USB_H_XCS_XACT_ERR2_S)
+#define USB_H_XCS_XACT_ERR2_V  0x00000001
+#define USB_H_XCS_XACT_ERR2_S  12
+/** USB_H_DESC_LST_ROLLINTR2 : R/W1C; bitpos: [13]; default: 0;
+ *  1'b0: No Descriptor rollover interrupt
+ *  1'b1: Descriptor rollover interrupt
+ */
+#define USB_H_DESC_LST_ROLLINTR2    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTR2_M  (USB_H_DESC_LST_ROLLINTR2_V << USB_H_DESC_LST_ROLLINTR2_S)
+#define USB_H_DESC_LST_ROLLINTR2_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTR2_S  13
+
+
+/** USB_HCINTMSK2_REG register
+ *  Host Channel 2 Interrupt Mask Register
+ */
+#define USB_HCINTMSK2_REG (SOC_DPORT_USB_BASE + 0x54c)
+/** USB_H_XFERCOMPLMSK2 : R/W; bitpos: [0]; default: 0;
+ *  1'b0: Transfer Completed Mask
+ *  1'b1: No Transfer Completed Mask
+ */
+#define USB_H_XFERCOMPLMSK2    (BIT(0))
+#define USB_H_XFERCOMPLMSK2_M  (USB_H_XFERCOMPLMSK2_V << USB_H_XFERCOMPLMSK2_S)
+#define USB_H_XFERCOMPLMSK2_V  0x00000001
+#define USB_H_XFERCOMPLMSK2_S  0
+/** USB_H_CHHLTDMSK2 : R/W; bitpos: [1]; default: 0;
+ *  1'b0: Channel Halted Mask
+ *  1'b1: No Channel Halted Mask
+ */
+#define USB_H_CHHLTDMSK2    (BIT(1))
+#define USB_H_CHHLTDMSK2_M  (USB_H_CHHLTDMSK2_V << USB_H_CHHLTDMSK2_S)
+#define USB_H_CHHLTDMSK2_V  0x00000001
+#define USB_H_CHHLTDMSK2_S  1
+/** USB_H_AHBERRMSK2 : R/W; bitpos: [2]; default: 0;
+ *  1'b0: AHB Error Mask
+ *  1'b1: No AHB Error Mask
+ */
+#define USB_H_AHBERRMSK2    (BIT(2))
+#define USB_H_AHBERRMSK2_M  (USB_H_AHBERRMSK2_V << USB_H_AHBERRMSK2_S)
+#define USB_H_AHBERRMSK2_V  0x00000001
+#define USB_H_AHBERRMSK2_S  2
+/** USB_H_STALLMSK2 : R/W; bitpos: [3]; default: 0;
+ *  1'b0: Mask STALL Response Received Interrupt
+ *  1'b1: No STALL Response Received Interrupt Mask
+ */
+#define USB_H_STALLMSK2    (BIT(3))
+#define USB_H_STALLMSK2_M  (USB_H_STALLMSK2_V << USB_H_STALLMSK2_S)
+#define USB_H_STALLMSK2_V  0x00000001
+#define USB_H_STALLMSK2_S  3
+/** USB_H_NAKMSK2 : R/W; bitpos: [4]; default: 0;
+ *  1'b0: Mask NAK Response Received Interrupt
+ *  1'b1: No NAK Response Received Interrupt Mask
+ */
+#define USB_H_NAKMSK2    (BIT(4))
+#define USB_H_NAKMSK2_M  (USB_H_NAKMSK2_V << USB_H_NAKMSK2_S)
+#define USB_H_NAKMSK2_V  0x00000001
+#define USB_H_NAKMSK2_S  4
+/** USB_H_ACKMSK2 : R/W; bitpos: [5]; default: 0;
+ *  1'b0: Mask ACK Response Received/Transmitted Interrupt
+ *  1'b1: No ACK Response Received/Transmitted Interrupt Mask
+ */
+#define USB_H_ACKMSK2    (BIT(5))
+#define USB_H_ACKMSK2_M  (USB_H_ACKMSK2_V << USB_H_ACKMSK2_S)
+#define USB_H_ACKMSK2_V  0x00000001
+#define USB_H_ACKMSK2_S  5
+/** USB_H_NYETMSK2 : R/W; bitpos: [6]; default: 0;
+ *  1'b0: Mask NYET Response Received Interrupt
+ *  1'b1: No NYET Response Received Interrupt Mask
+ */
+#define USB_H_NYETMSK2    (BIT(6))
+#define USB_H_NYETMSK2_M  (USB_H_NYETMSK2_V << USB_H_NYETMSK2_S)
+#define USB_H_NYETMSK2_V  0x00000001
+#define USB_H_NYETMSK2_S  6
+/** USB_H_XACTERRMSK2 : R/W; bitpos: [7]; default: 0;
+ *  1'b0: Mask Transaction Error
+ *  1'b1: No Transaction Error Mask
+ */
+#define USB_H_XACTERRMSK2    (BIT(7))
+#define USB_H_XACTERRMSK2_M  (USB_H_XACTERRMSK2_V << USB_H_XACTERRMSK2_S)
+#define USB_H_XACTERRMSK2_V  0x00000001
+#define USB_H_XACTERRMSK2_S  7
+/** USB_H_BBLERRMSK2 : R/W; bitpos: [8]; default: 0;
+ *  Babble Error Mask
+ *  1'b0: Mask Babble Error
+ *  1'b1: No Babble Error Mask
+ */
+#define USB_H_BBLERRMSK2    (BIT(8))
+#define USB_H_BBLERRMSK2_M  (USB_H_BBLERRMSK2_V << USB_H_BBLERRMSK2_S)
+#define USB_H_BBLERRMSK2_V  0x00000001
+#define USB_H_BBLERRMSK2_S  8
+/** USB_H_FRMOVRUNMSK2 : R/W; bitpos: [9]; default: 0;
+ *  Frame Overrun Mask
+ *  0x0 (MASK): Mask Overrun Mask
+ *  0x1 (NOMASK): No Frame Overrun Mask
+ */
+#define USB_H_FRMOVRUNMSK2    (BIT(9))
+#define USB_H_FRMOVRUNMSK2_M  (USB_H_FRMOVRUNMSK2_V << USB_H_FRMOVRUNMSK2_S)
+#define USB_H_FRMOVRUNMSK2_V  0x00000001
+#define USB_H_FRMOVRUNMSK2_S  9
+/** USB_H_DATATGLERRMSK2 : R/W; bitpos: [10]; default: 0;
+ *  Data Toggle Error Mask n scatter/gather DMA mode for host
+ *  1'b0: Mask Data Toggle Error
+ *  1'b1: No Data Toggle Error Mask
+ */
+#define USB_H_DATATGLERRMSK2    (BIT(10))
+#define USB_H_DATATGLERRMSK2_M  (USB_H_DATATGLERRMSK2_V << USB_H_DATATGLERRMSK2_S)
+#define USB_H_DATATGLERRMSK2_V  0x00000001
+#define USB_H_DATATGLERRMSK2_S  10
+/** USB_H_BNAINTRMSK2 : R/W; bitpos: [11]; default: 0;
+ *  BNA (Buffer Not Available) Interrupt mask register
+ *  1'b0: BNA Interrupt Masked
+ *  1'b1: BNA Interrupt not masked
+ */
+#define USB_H_BNAINTRMSK2    (BIT(11))
+#define USB_H_BNAINTRMSK2_M  (USB_H_BNAINTRMSK2_V << USB_H_BNAINTRMSK2_S)
+#define USB_H_BNAINTRMSK2_V  0x00000001
+#define USB_H_BNAINTRMSK2_S  11
+/** USB_H_DESC_LST_ROLLINTRMSK2 : R/W; bitpos: [13]; default: 0;
+ *  Descriptor List rollover interrupt Mask
+ *  1'b0: Descriptor Rollover Interrupt Mask
+ *  1'b1: Descriptor Rollover Interrupt not masked
+ */
+#define USB_H_DESC_LST_ROLLINTRMSK2    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTRMSK2_M  (USB_H_DESC_LST_ROLLINTRMSK2_V << USB_H_DESC_LST_ROLLINTRMSK2_S)
+#define USB_H_DESC_LST_ROLLINTRMSK2_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTRMSK2_S  13
+
+
+/** USB_HCINT3_REG register
+ *  Host Channel 3 Interrupt Register
+ */
+#define USB_HCINT3_REG (SOC_DPORT_USB_BASE + 0x568)
+/** USB_H_XFERCOMPL3 : R/W1C; bitpos: [0]; default: 0;
+ *  1'b0: Transfer in progress or No Active Transfer
+ *  1'b1: Transfer completed normally without any errors
+ */
+#define USB_H_XFERCOMPL3    (BIT(0))
+#define USB_H_XFERCOMPL3_M  (USB_H_XFERCOMPL3_V << USB_H_XFERCOMPL3_S)
+#define USB_H_XFERCOMPL3_V  0x00000001
+#define USB_H_XFERCOMPL3_S  0
+/** USB_H_CHHLTD3 : R/W1C; bitpos: [1]; default: 0;
+ *  1'b0: Channel not halted
+ *  1'b1: Channel Halted
+ */
+#define USB_H_CHHLTD3    (BIT(1))
+#define USB_H_CHHLTD3_M  (USB_H_CHHLTD3_V << USB_H_CHHLTD3_S)
+#define USB_H_CHHLTD3_V  0x00000001
+#define USB_H_CHHLTD3_S  1
+/** USB_H_AHBERR3 : R/W1C; bitpos: [2]; default: 0;
+ *  1'b0: No AHB error
+ *  1'b1: AHB error during AHB read/write
+ */
+#define USB_H_AHBERR3    (BIT(2))
+#define USB_H_AHBERR3_M  (USB_H_AHBERR3_V << USB_H_AHBERR3_S)
+#define USB_H_AHBERR3_V  0x00000001
+#define USB_H_AHBERR3_S  2
+/** USB_H_STALL3 : R/W1C; bitpos: [3]; default: 0;
+ *  1'b0: No Stall Response Received Interrupt
+ *  1'b1: Stall Response Received Interrupt
+ */
+#define USB_H_STALL3    (BIT(3))
+#define USB_H_STALL3_M  (USB_H_STALL3_V << USB_H_STALL3_S)
+#define USB_H_STALL3_V  0x00000001
+#define USB_H_STALL3_S  3
+/** USB_H_NACK3 : R/W1C; bitpos: [4]; default: 0;
+ *  1'b0: No NAK Response Received Interrupt
+ *  1'b1: NAK Response Received Interrupt
+ */
+#define USB_H_NACK3    (BIT(4))
+#define USB_H_NACK3_M  (USB_H_NACK3_V << USB_H_NACK3_S)
+#define USB_H_NACK3_V  0x00000001
+#define USB_H_NACK3_S  4
+/** USB_H_ACK3 : R/W1C; bitpos: [5]; default: 0;
+ *  1'b0: No ACK Response Received or Transmitted Interrupt
+ *  1'b1: ACK Response Received or Transmitted Interrup
+ */
+#define USB_H_ACK3    (BIT(5))
+#define USB_H_ACK3_M  (USB_H_ACK3_V << USB_H_ACK3_S)
+#define USB_H_ACK3_V  0x00000001
+#define USB_H_ACK3_S  5
+/** USB_H_NYET3 : R/W1C; bitpos: [6]; default: 0;
+ *  1'b0: No NYET Response Received Interrupt
+ *  1'b1: NYET Response Received Interrupt
+ */
+#define USB_H_NYET3    (BIT(6))
+#define USB_H_NYET3_M  (USB_H_NYET3_V << USB_H_NYET3_S)
+#define USB_H_NYET3_V  0x00000001
+#define USB_H_NYET3_S  6
+/** USB_H_XACTERR3 : R/W1C; bitpos: [7]; default: 0;
+ *  Indicates one of the following errors occurred on the USB:
+ *  CRC check failure
+ *  Timeout
+ *  Bit stuff error
+ *  False EOP
+ */
+#define USB_H_XACTERR3    (BIT(7))
+#define USB_H_XACTERR3_M  (USB_H_XACTERR3_V << USB_H_XACTERR3_S)
+#define USB_H_XACTERR3_V  0x00000001
+#define USB_H_XACTERR3_S  7
+/** USB_H_BBLERR3 : R/W1C; bitpos: [8]; default: 0;
+ *  1'b0: No Babble Error
+ *  1'b1: Babble Error
+ */
+#define USB_H_BBLERR3    (BIT(8))
+#define USB_H_BBLERR3_M  (USB_H_BBLERR3_V << USB_H_BBLERR3_S)
+#define USB_H_BBLERR3_V  0x00000001
+#define USB_H_BBLERR3_S  8
+/** USB_H_FRMOVRUN3 : R/W1C; bitpos: [9]; default: 0;
+ *  1'b0: No Frame Overrun
+ *  1'b1: Frame Overrun
+ */
+#define USB_H_FRMOVRUN3    (BIT(9))
+#define USB_H_FRMOVRUN3_M  (USB_H_FRMOVRUN3_V << USB_H_FRMOVRUN3_S)
+#define USB_H_FRMOVRUN3_V  0x00000001
+#define USB_H_FRMOVRUN3_S  9
+/** USB_H_DATATGLERR3 : R/W1C; bitpos: [10]; default: 0;
+ *  1'b0: No Data Toggle Error
+ *  1'b1: Data Toggle Error
+ */
+#define USB_H_DATATGLERR3    (BIT(10))
+#define USB_H_DATATGLERR3_M  (USB_H_DATATGLERR3_V << USB_H_DATATGLERR3_S)
+#define USB_H_DATATGLERR3_V  0x00000001
+#define USB_H_DATATGLERR3_S  10
+/** USB_H_BNAINTR3 : R/W1C; bitpos: [11]; default: 0;
+ *  1'b0: No BNA Interrupt
+ *  1'b1: BNA Interrupt
+ */
+#define USB_H_BNAINTR3    (BIT(11))
+#define USB_H_BNAINTR3_M  (USB_H_BNAINTR3_V << USB_H_BNAINTR3_S)
+#define USB_H_BNAINTR3_V  0x00000001
+#define USB_H_BNAINTR3_S  11
+/** USB_H_XCS_XACT_ERR3 : R/W1C; bitpos: [12]; default: 0;
+ *  1'b0: No Excessive Transaction Error
+ *  1'b1: Excessive Transaction Error
+ */
+#define USB_H_XCS_XACT_ERR3    (BIT(12))
+#define USB_H_XCS_XACT_ERR3_M  (USB_H_XCS_XACT_ERR3_V << USB_H_XCS_XACT_ERR3_S)
+#define USB_H_XCS_XACT_ERR3_V  0x00000001
+#define USB_H_XCS_XACT_ERR3_S  12
+/** USB_H_DESC_LST_ROLLINTR3 : R/W1C; bitpos: [13]; default: 0;
+ *  1'b0: No Descriptor rollover interrupt
+ *  1'b1: Descriptor rollover interrupt
+ */
+#define USB_H_DESC_LST_ROLLINTR3    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTR3_M  (USB_H_DESC_LST_ROLLINTR3_V << USB_H_DESC_LST_ROLLINTR3_S)
+#define USB_H_DESC_LST_ROLLINTR3_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTR3_S  13
+
+
+/** USB_HCINTMSK3_REG register
+ *  Host Channel 3 Interrupt Mask Register
+ */
+#define USB_HCINTMSK3_REG (SOC_DPORT_USB_BASE + 0x56c)
+/** USB_H_XFERCOMPLMSK3 : R/W; bitpos: [0]; default: 0;
+ *  1'b0: Transfer Completed Mask
+ *  1'b1: No Transfer Completed Mask
+ */
+#define USB_H_XFERCOMPLMSK3    (BIT(0))
+#define USB_H_XFERCOMPLMSK3_M  (USB_H_XFERCOMPLMSK3_V << USB_H_XFERCOMPLMSK3_S)
+#define USB_H_XFERCOMPLMSK3_V  0x00000001
+#define USB_H_XFERCOMPLMSK3_S  0
+/** USB_H_CHHLTDMSK3 : R/W; bitpos: [1]; default: 0;
+ *  1'b0: Channel Halted Mask
+ *  1'b1: No Channel Halted Mask
+ */
+#define USB_H_CHHLTDMSK3    (BIT(1))
+#define USB_H_CHHLTDMSK3_M  (USB_H_CHHLTDMSK3_V << USB_H_CHHLTDMSK3_S)
+#define USB_H_CHHLTDMSK3_V  0x00000001
+#define USB_H_CHHLTDMSK3_S  1
+/** USB_H_AHBERRMSK3 : R/W; bitpos: [2]; default: 0;
+ *  1'b0: AHB Error Mask
+ *  1'b1: No AHB Error Mask
+ */
+#define USB_H_AHBERRMSK3    (BIT(2))
+#define USB_H_AHBERRMSK3_M  (USB_H_AHBERRMSK3_V << USB_H_AHBERRMSK3_S)
+#define USB_H_AHBERRMSK3_V  0x00000001
+#define USB_H_AHBERRMSK3_S  2
+/** USB_H_STALLMSK3 : R/W; bitpos: [3]; default: 0;
+ *  1'b0: Mask STALL Response Received Interrupt
+ *  1'b1: No STALL Response Received Interrupt Mask
+ */
+#define USB_H_STALLMSK3    (BIT(3))
+#define USB_H_STALLMSK3_M  (USB_H_STALLMSK3_V << USB_H_STALLMSK3_S)
+#define USB_H_STALLMSK3_V  0x00000001
+#define USB_H_STALLMSK3_S  3
+/** USB_H_NAKMSK3 : R/W; bitpos: [4]; default: 0;
+ *  1'b0: Mask NAK Response Received Interrupt
+ *  1'b1: No NAK Response Received Interrupt Mask
+ */
+#define USB_H_NAKMSK3    (BIT(4))
+#define USB_H_NAKMSK3_M  (USB_H_NAKMSK3_V << USB_H_NAKMSK3_S)
+#define USB_H_NAKMSK3_V  0x00000001
+#define USB_H_NAKMSK3_S  4
+/** USB_H_ACKMSK3 : R/W; bitpos: [5]; default: 0;
+ *  1'b0: Mask ACK Response Received/Transmitted Interrupt
+ *  1'b1: No ACK Response Received/Transmitted Interrupt Mask
+ */
+#define USB_H_ACKMSK3    (BIT(5))
+#define USB_H_ACKMSK3_M  (USB_H_ACKMSK3_V << USB_H_ACKMSK3_S)
+#define USB_H_ACKMSK3_V  0x00000001
+#define USB_H_ACKMSK3_S  5
+/** USB_H_NYETMSK3 : R/W; bitpos: [6]; default: 0;
+ *  1'b0: Mask NYET Response Received Interrupt
+ *  1'b1: No NYET Response Received Interrupt Mask
+ */
+#define USB_H_NYETMSK3    (BIT(6))
+#define USB_H_NYETMSK3_M  (USB_H_NYETMSK3_V << USB_H_NYETMSK3_S)
+#define USB_H_NYETMSK3_V  0x00000001
+#define USB_H_NYETMSK3_S  6
+/** USB_H_XACTERRMSK3 : R/W; bitpos: [7]; default: 0;
+ *  1'b0: Mask Transaction Error
+ *  1'b1: No Transaction Error Mask
+ */
+#define USB_H_XACTERRMSK3    (BIT(7))
+#define USB_H_XACTERRMSK3_M  (USB_H_XACTERRMSK3_V << USB_H_XACTERRMSK3_S)
+#define USB_H_XACTERRMSK3_V  0x00000001
+#define USB_H_XACTERRMSK3_S  7
+/** USB_H_BBLERRMSK3 : R/W; bitpos: [8]; default: 0;
+ *  Babble Error Mask
+ *  1'b0: Mask Babble Error
+ *  1'b1: No Babble Error Mask
+ */
+#define USB_H_BBLERRMSK3    (BIT(8))
+#define USB_H_BBLERRMSK3_M  (USB_H_BBLERRMSK3_V << USB_H_BBLERRMSK3_S)
+#define USB_H_BBLERRMSK3_V  0x00000001
+#define USB_H_BBLERRMSK3_S  8
+/** USB_H_FRMOVRUNMSK3 : R/W; bitpos: [9]; default: 0;
+ *  Frame Overrun Mask
+ *  0x0 (MASK): Mask Overrun Mask
+ *  0x1 (NOMASK): No Frame Overrun Mask
+ */
+#define USB_H_FRMOVRUNMSK3    (BIT(9))
+#define USB_H_FRMOVRUNMSK3_M  (USB_H_FRMOVRUNMSK3_V << USB_H_FRMOVRUNMSK3_S)
+#define USB_H_FRMOVRUNMSK3_V  0x00000001
+#define USB_H_FRMOVRUNMSK3_S  9
+/** USB_H_DATATGLERRMSK3 : R/W; bitpos: [10]; default: 0;
+ *  Data Toggle Error Mask n scatter/gather DMA mode for host
+ *  1'b0: Mask Data Toggle Error
+ *  1'b1: No Data Toggle Error Mask
+ */
+#define USB_H_DATATGLERRMSK3    (BIT(10))
+#define USB_H_DATATGLERRMSK3_M  (USB_H_DATATGLERRMSK3_V << USB_H_DATATGLERRMSK3_S)
+#define USB_H_DATATGLERRMSK3_V  0x00000001
+#define USB_H_DATATGLERRMSK3_S  10
+/** USB_H_BNAINTRMSK3 : R/W; bitpos: [11]; default: 0;
+ *  BNA (Buffer Not Available) Interrupt mask register
+ *  1'b0: BNA Interrupt Masked
+ *  1'b1: BNA Interrupt not masked
+ */
+#define USB_H_BNAINTRMSK3    (BIT(11))
+#define USB_H_BNAINTRMSK3_M  (USB_H_BNAINTRMSK3_V << USB_H_BNAINTRMSK3_S)
+#define USB_H_BNAINTRMSK3_V  0x00000001
+#define USB_H_BNAINTRMSK3_S  11
+/** USB_H_DESC_LST_ROLLINTRMSK3 : R/W; bitpos: [13]; default: 0;
+ *  Descriptor List rollover interrupt Mask
+ *  1'b0: Descriptor Rollover Interrupt Mask
+ *  1'b1: Descriptor Rollover Interrupt not masked
+ */
+#define USB_H_DESC_LST_ROLLINTRMSK3    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTRMSK3_M  (USB_H_DESC_LST_ROLLINTRMSK3_V << USB_H_DESC_LST_ROLLINTRMSK3_S)
+#define USB_H_DESC_LST_ROLLINTRMSK3_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTRMSK3_S  13
+
+
+/** USB_HCINT4_REG register
+ *  Host Channel 4 Interrupt Register
+ */
+#define USB_HCINT4_REG (SOC_DPORT_USB_BASE + 0x588)
+/** USB_H_XFERCOMPL4 : R/W1C; bitpos: [0]; default: 0;
+ *  1'b0: Transfer in progress or No Active Transfer
+ *  1'b1: Transfer completed normally without any errors
+ */
+#define USB_H_XFERCOMPL4    (BIT(0))
+#define USB_H_XFERCOMPL4_M  (USB_H_XFERCOMPL4_V << USB_H_XFERCOMPL4_S)
+#define USB_H_XFERCOMPL4_V  0x00000001
+#define USB_H_XFERCOMPL4_S  0
+/** USB_H_CHHLTD4 : R/W1C; bitpos: [1]; default: 0;
+ *  1'b0: Channel not halted
+ *  1'b1: Channel Halted
+ */
+#define USB_H_CHHLTD4    (BIT(1))
+#define USB_H_CHHLTD4_M  (USB_H_CHHLTD4_V << USB_H_CHHLTD4_S)
+#define USB_H_CHHLTD4_V  0x00000001
+#define USB_H_CHHLTD4_S  1
+/** USB_H_AHBERR4 : R/W1C; bitpos: [2]; default: 0;
+ *  1'b0: No AHB error
+ *  1'b1: AHB error during AHB read/write
+ */
+#define USB_H_AHBERR4    (BIT(2))
+#define USB_H_AHBERR4_M  (USB_H_AHBERR4_V << USB_H_AHBERR4_S)
+#define USB_H_AHBERR4_V  0x00000001
+#define USB_H_AHBERR4_S  2
+/** USB_H_STALL4 : R/W1C; bitpos: [3]; default: 0;
+ *  1'b0: No Stall Response Received Interrupt
+ *  1'b1: Stall Response Received Interrupt
+ */
+#define USB_H_STALL4    (BIT(3))
+#define USB_H_STALL4_M  (USB_H_STALL4_V << USB_H_STALL4_S)
+#define USB_H_STALL4_V  0x00000001
+#define USB_H_STALL4_S  3
+/** USB_H_NACK4 : R/W1C; bitpos: [4]; default: 0;
+ *  1'b0: No NAK Response Received Interrupt
+ *  1'b1: NAK Response Received Interrupt
+ */
+#define USB_H_NACK4    (BIT(4))
+#define USB_H_NACK4_M  (USB_H_NACK4_V << USB_H_NACK4_S)
+#define USB_H_NACK4_V  0x00000001
+#define USB_H_NACK4_S  4
+/** USB_H_ACK4 : R/W1C; bitpos: [5]; default: 0;
+ *  1'b0: No ACK Response Received or Transmitted Interrupt
+ *  1'b1: ACK Response Received or Transmitted Interrup
+ */
+#define USB_H_ACK4    (BIT(5))
+#define USB_H_ACK4_M  (USB_H_ACK4_V << USB_H_ACK4_S)
+#define USB_H_ACK4_V  0x00000001
+#define USB_H_ACK4_S  5
+/** USB_H_NYET4 : R/W1C; bitpos: [6]; default: 0;
+ *  1'b0: No NYET Response Received Interrupt
+ *  1'b1: NYET Response Received Interrupt
+ */
+#define USB_H_NYET4    (BIT(6))
+#define USB_H_NYET4_M  (USB_H_NYET4_V << USB_H_NYET4_S)
+#define USB_H_NYET4_V  0x00000001
+#define USB_H_NYET4_S  6
+/** USB_H_XACTERR4 : R/W1C; bitpos: [7]; default: 0;
+ *  Indicates one of the following errors occurred on the USB:
+ *  CRC check failure
+ *  Timeout
+ *  Bit stuff error
+ *  False EOP
+ */
+#define USB_H_XACTERR4    (BIT(7))
+#define USB_H_XACTERR4_M  (USB_H_XACTERR4_V << USB_H_XACTERR4_S)
+#define USB_H_XACTERR4_V  0x00000001
+#define USB_H_XACTERR4_S  7
+/** USB_H_BBLERR4 : R/W1C; bitpos: [8]; default: 0;
+ *  1'b0: No Babble Error
+ *  1'b1: Babble Error
+ */
+#define USB_H_BBLERR4    (BIT(8))
+#define USB_H_BBLERR4_M  (USB_H_BBLERR4_V << USB_H_BBLERR4_S)
+#define USB_H_BBLERR4_V  0x00000001
+#define USB_H_BBLERR4_S  8
+/** USB_H_FRMOVRUN4 : R/W1C; bitpos: [9]; default: 0;
+ *  1'b0: No Frame Overrun
+ *  1'b1: Frame Overrun
+ */
+#define USB_H_FRMOVRUN4    (BIT(9))
+#define USB_H_FRMOVRUN4_M  (USB_H_FRMOVRUN4_V << USB_H_FRMOVRUN4_S)
+#define USB_H_FRMOVRUN4_V  0x00000001
+#define USB_H_FRMOVRUN4_S  9
+/** USB_H_DATATGLERR4 : R/W1C; bitpos: [10]; default: 0;
+ *  1'b0: No Data Toggle Error
+ *  1'b1: Data Toggle Error
+ */
+#define USB_H_DATATGLERR4    (BIT(10))
+#define USB_H_DATATGLERR4_M  (USB_H_DATATGLERR4_V << USB_H_DATATGLERR4_S)
+#define USB_H_DATATGLERR4_V  0x00000001
+#define USB_H_DATATGLERR4_S  10
+/** USB_H_BNAINTR4 : R/W1C; bitpos: [11]; default: 0;
+ *  1'b0: No BNA Interrupt
+ *  1'b1: BNA Interrupt
+ */
+#define USB_H_BNAINTR4    (BIT(11))
+#define USB_H_BNAINTR4_M  (USB_H_BNAINTR4_V << USB_H_BNAINTR4_S)
+#define USB_H_BNAINTR4_V  0x00000001
+#define USB_H_BNAINTR4_S  11
+/** USB_H_XCS_XACT_ERR4 : R/W1C; bitpos: [12]; default: 0;
+ *  1'b0: No Excessive Transaction Error
+ *  1'b1: Excessive Transaction Error
+ */
+#define USB_H_XCS_XACT_ERR4    (BIT(12))
+#define USB_H_XCS_XACT_ERR4_M  (USB_H_XCS_XACT_ERR4_V << USB_H_XCS_XACT_ERR4_S)
+#define USB_H_XCS_XACT_ERR4_V  0x00000001
+#define USB_H_XCS_XACT_ERR4_S  12
+/** USB_H_DESC_LST_ROLLINTR4 : R/W1C; bitpos: [13]; default: 0;
+ *  1'b0: No Descriptor rollover interrupt
+ *  1'b1: Descriptor rollover interrupt
+ */
+#define USB_H_DESC_LST_ROLLINTR4    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTR4_M  (USB_H_DESC_LST_ROLLINTR4_V << USB_H_DESC_LST_ROLLINTR4_S)
+#define USB_H_DESC_LST_ROLLINTR4_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTR4_S  13
+
+
+/** USB_HCINTMSK4_REG register
+ *  Host Channel 4 Interrupt Mask Register
+ */
+#define USB_HCINTMSK4_REG (SOC_DPORT_USB_BASE + 0x58c)
+/** USB_H_XFERCOMPLMSK4 : R/W; bitpos: [0]; default: 0;
+ *  1'b0: Transfer Completed Mask
+ *  1'b1: No Transfer Completed Mask
+ */
+#define USB_H_XFERCOMPLMSK4    (BIT(0))
+#define USB_H_XFERCOMPLMSK4_M  (USB_H_XFERCOMPLMSK4_V << USB_H_XFERCOMPLMSK4_S)
+#define USB_H_XFERCOMPLMSK4_V  0x00000001
+#define USB_H_XFERCOMPLMSK4_S  0
+/** USB_H_CHHLTDMSK4 : R/W; bitpos: [1]; default: 0;
+ *  1'b0: Channel Halted Mask
+ *  1'b1: No Channel Halted Mask
+ */
+#define USB_H_CHHLTDMSK4    (BIT(1))
+#define USB_H_CHHLTDMSK4_M  (USB_H_CHHLTDMSK4_V << USB_H_CHHLTDMSK4_S)
+#define USB_H_CHHLTDMSK4_V  0x00000001
+#define USB_H_CHHLTDMSK4_S  1
+/** USB_H_AHBERRMSK4 : R/W; bitpos: [2]; default: 0;
+ *  1'b0: AHB Error Mask
+ *  1'b1: No AHB Error Mask
+ */
+#define USB_H_AHBERRMSK4    (BIT(2))
+#define USB_H_AHBERRMSK4_M  (USB_H_AHBERRMSK4_V << USB_H_AHBERRMSK4_S)
+#define USB_H_AHBERRMSK4_V  0x00000001
+#define USB_H_AHBERRMSK4_S  2
+/** USB_H_STALLMSK4 : R/W; bitpos: [3]; default: 0;
+ *  1'b0: Mask STALL Response Received Interrupt
+ *  1'b1: No STALL Response Received Interrupt Mask
+ */
+#define USB_H_STALLMSK4    (BIT(3))
+#define USB_H_STALLMSK4_M  (USB_H_STALLMSK4_V << USB_H_STALLMSK4_S)
+#define USB_H_STALLMSK4_V  0x00000001
+#define USB_H_STALLMSK4_S  3
+/** USB_H_NAKMSK4 : R/W; bitpos: [4]; default: 0;
+ *  1'b0: Mask NAK Response Received Interrupt
+ *  1'b1: No NAK Response Received Interrupt Mask
+ */
+#define USB_H_NAKMSK4    (BIT(4))
+#define USB_H_NAKMSK4_M  (USB_H_NAKMSK4_V << USB_H_NAKMSK4_S)
+#define USB_H_NAKMSK4_V  0x00000001
+#define USB_H_NAKMSK4_S  4
+/** USB_H_ACKMSK4 : R/W; bitpos: [5]; default: 0;
+ *  1'b0: Mask ACK Response Received/Transmitted Interrupt
+ *  1'b1: No ACK Response Received/Transmitted Interrupt Mask
+ */
+#define USB_H_ACKMSK4    (BIT(5))
+#define USB_H_ACKMSK4_M  (USB_H_ACKMSK4_V << USB_H_ACKMSK4_S)
+#define USB_H_ACKMSK4_V  0x00000001
+#define USB_H_ACKMSK4_S  5
+/** USB_H_NYETMSK4 : R/W; bitpos: [6]; default: 0;
+ *  1'b0: Mask NYET Response Received Interrupt
+ *  1'b1: No NYET Response Received Interrupt Mask
+ */
+#define USB_H_NYETMSK4    (BIT(6))
+#define USB_H_NYETMSK4_M  (USB_H_NYETMSK4_V << USB_H_NYETMSK4_S)
+#define USB_H_NYETMSK4_V  0x00000001
+#define USB_H_NYETMSK4_S  6
+/** USB_H_XACTERRMSK4 : R/W; bitpos: [7]; default: 0;
+ *  1'b0: Mask Transaction Error
+ *  1'b1: No Transaction Error Mask
+ */
+#define USB_H_XACTERRMSK4    (BIT(7))
+#define USB_H_XACTERRMSK4_M  (USB_H_XACTERRMSK4_V << USB_H_XACTERRMSK4_S)
+#define USB_H_XACTERRMSK4_V  0x00000001
+#define USB_H_XACTERRMSK4_S  7
+/** USB_H_BBLERRMSK4 : R/W; bitpos: [8]; default: 0;
+ *  Babble Error Mask
+ *  1'b0: Mask Babble Error
+ *  1'b1: No Babble Error Mask
+ */
+#define USB_H_BBLERRMSK4    (BIT(8))
+#define USB_H_BBLERRMSK4_M  (USB_H_BBLERRMSK4_V << USB_H_BBLERRMSK4_S)
+#define USB_H_BBLERRMSK4_V  0x00000001
+#define USB_H_BBLERRMSK4_S  8
+/** USB_H_FRMOVRUNMSK4 : R/W; bitpos: [9]; default: 0;
+ *  Frame Overrun Mask
+ *  0x0 (MASK): Mask Overrun Mask
+ *  0x1 (NOMASK): No Frame Overrun Mask
+ */
+#define USB_H_FRMOVRUNMSK4    (BIT(9))
+#define USB_H_FRMOVRUNMSK4_M  (USB_H_FRMOVRUNMSK4_V << USB_H_FRMOVRUNMSK4_S)
+#define USB_H_FRMOVRUNMSK4_V  0x00000001
+#define USB_H_FRMOVRUNMSK4_S  9
+/** USB_H_DATATGLERRMSK4 : R/W; bitpos: [10]; default: 0;
+ *  Data Toggle Error Mask n scatter/gather DMA mode for host
+ *  1'b0: Mask Data Toggle Error
+ *  1'b1: No Data Toggle Error Mask
+ */
+#define USB_H_DATATGLERRMSK4    (BIT(10))
+#define USB_H_DATATGLERRMSK4_M  (USB_H_DATATGLERRMSK4_V << USB_H_DATATGLERRMSK4_S)
+#define USB_H_DATATGLERRMSK4_V  0x00000001
+#define USB_H_DATATGLERRMSK4_S  10
+/** USB_H_BNAINTRMSK4 : R/W; bitpos: [11]; default: 0;
+ *  BNA (Buffer Not Available) Interrupt mask register
+ *  1'b0: BNA Interrupt Masked
+ *  1'b1: BNA Interrupt not masked
+ */
+#define USB_H_BNAINTRMSK4    (BIT(11))
+#define USB_H_BNAINTRMSK4_M  (USB_H_BNAINTRMSK4_V << USB_H_BNAINTRMSK4_S)
+#define USB_H_BNAINTRMSK4_V  0x00000001
+#define USB_H_BNAINTRMSK4_S  11
+/** USB_H_DESC_LST_ROLLINTRMSK4 : R/W; bitpos: [13]; default: 0;
+ *  Descriptor List rollover interrupt Mask
+ *  1'b0: Descriptor Rollover Interrupt Mask
+ *  1'b1: Descriptor Rollover Interrupt not masked
+ */
+#define USB_H_DESC_LST_ROLLINTRMSK4    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTRMSK4_M  (USB_H_DESC_LST_ROLLINTRMSK4_V << USB_H_DESC_LST_ROLLINTRMSK4_S)
+#define USB_H_DESC_LST_ROLLINTRMSK4_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTRMSK4_S  13
+
+
+/** USB_HCINT5_REG register
+ *  Host Channel 5 Interrupt Register
+ */
+#define USB_HCINT5_REG (SOC_DPORT_USB_BASE + 0x5a8)
+/** USB_H_XFERCOMPL5 : R/W1C; bitpos: [0]; default: 0;
+ *  1'b0: Transfer in progress or No Active Transfer
+ *  1'b1: Transfer completed normally without any errors
+ */
+#define USB_H_XFERCOMPL5    (BIT(0))
+#define USB_H_XFERCOMPL5_M  (USB_H_XFERCOMPL5_V << USB_H_XFERCOMPL5_S)
+#define USB_H_XFERCOMPL5_V  0x00000001
+#define USB_H_XFERCOMPL5_S  0
+/** USB_H_CHHLTD5 : R/W1C; bitpos: [1]; default: 0;
+ *  1'b0: Channel not halted
+ *  1'b1: Channel Halted
+ */
+#define USB_H_CHHLTD5    (BIT(1))
+#define USB_H_CHHLTD5_M  (USB_H_CHHLTD5_V << USB_H_CHHLTD5_S)
+#define USB_H_CHHLTD5_V  0x00000001
+#define USB_H_CHHLTD5_S  1
+/** USB_H_AHBERR5 : R/W1C; bitpos: [2]; default: 0;
+ *  1'b0: No AHB error
+ *  1'b1: AHB error during AHB read/write
+ */
+#define USB_H_AHBERR5    (BIT(2))
+#define USB_H_AHBERR5_M  (USB_H_AHBERR5_V << USB_H_AHBERR5_S)
+#define USB_H_AHBERR5_V  0x00000001
+#define USB_H_AHBERR5_S  2
+/** USB_H_STALL5 : R/W1C; bitpos: [3]; default: 0;
+ *  1'b0: No Stall Response Received Interrupt
+ *  1'b1: Stall Response Received Interrupt
+ */
+#define USB_H_STALL5    (BIT(3))
+#define USB_H_STALL5_M  (USB_H_STALL5_V << USB_H_STALL5_S)
+#define USB_H_STALL5_V  0x00000001
+#define USB_H_STALL5_S  3
+/** USB_H_NACK5 : R/W1C; bitpos: [4]; default: 0;
+ *  1'b0: No NAK Response Received Interrupt
+ *  1'b1: NAK Response Received Interrupt
+ */
+#define USB_H_NACK5    (BIT(4))
+#define USB_H_NACK5_M  (USB_H_NACK5_V << USB_H_NACK5_S)
+#define USB_H_NACK5_V  0x00000001
+#define USB_H_NACK5_S  4
+/** USB_H_ACK5 : R/W1C; bitpos: [5]; default: 0;
+ *  1'b0: No ACK Response Received or Transmitted Interrupt
+ *  1'b1: ACK Response Received or Transmitted Interrup
+ */
+#define USB_H_ACK5    (BIT(5))
+#define USB_H_ACK5_M  (USB_H_ACK5_V << USB_H_ACK5_S)
+#define USB_H_ACK5_V  0x00000001
+#define USB_H_ACK5_S  5
+/** USB_H_NYET5 : R/W1C; bitpos: [6]; default: 0;
+ *  1'b0: No NYET Response Received Interrupt
+ *  1'b1: NYET Response Received Interrupt
+ */
+#define USB_H_NYET5    (BIT(6))
+#define USB_H_NYET5_M  (USB_H_NYET5_V << USB_H_NYET5_S)
+#define USB_H_NYET5_V  0x00000001
+#define USB_H_NYET5_S  6
+/** USB_H_XACTERR5 : R/W1C; bitpos: [7]; default: 0;
+ *  Indicates one of the following errors occurred on the USB:
+ *  CRC check failure
+ *  Timeout
+ *  Bit stuff error
+ *  False EOP
+ */
+#define USB_H_XACTERR5    (BIT(7))
+#define USB_H_XACTERR5_M  (USB_H_XACTERR5_V << USB_H_XACTERR5_S)
+#define USB_H_XACTERR5_V  0x00000001
+#define USB_H_XACTERR5_S  7
+/** USB_H_BBLERR5 : R/W1C; bitpos: [8]; default: 0;
+ *  1'b0: No Babble Error
+ *  1'b1: Babble Error
+ */
+#define USB_H_BBLERR5    (BIT(8))
+#define USB_H_BBLERR5_M  (USB_H_BBLERR5_V << USB_H_BBLERR5_S)
+#define USB_H_BBLERR5_V  0x00000001
+#define USB_H_BBLERR5_S  8
+/** USB_H_FRMOVRUN5 : R/W1C; bitpos: [9]; default: 0;
+ *  1'b0: No Frame Overrun
+ *  1'b1: Frame Overrun
+ */
+#define USB_H_FRMOVRUN5    (BIT(9))
+#define USB_H_FRMOVRUN5_M  (USB_H_FRMOVRUN5_V << USB_H_FRMOVRUN5_S)
+#define USB_H_FRMOVRUN5_V  0x00000001
+#define USB_H_FRMOVRUN5_S  9
+/** USB_H_DATATGLERR5 : R/W1C; bitpos: [10]; default: 0;
+ *  1'b0: No Data Toggle Error
+ *  1'b1: Data Toggle Error
+ */
+#define USB_H_DATATGLERR5    (BIT(10))
+#define USB_H_DATATGLERR5_M  (USB_H_DATATGLERR5_V << USB_H_DATATGLERR5_S)
+#define USB_H_DATATGLERR5_V  0x00000001
+#define USB_H_DATATGLERR5_S  10
+/** USB_H_BNAINTR5 : R/W1C; bitpos: [11]; default: 0;
+ *  1'b0: No BNA Interrupt
+ *  1'b1: BNA Interrupt
+ */
+#define USB_H_BNAINTR5    (BIT(11))
+#define USB_H_BNAINTR5_M  (USB_H_BNAINTR5_V << USB_H_BNAINTR5_S)
+#define USB_H_BNAINTR5_V  0x00000001
+#define USB_H_BNAINTR5_S  11
+/** USB_H_XCS_XACT_ERR5 : R/W1C; bitpos: [12]; default: 0;
+ *  1'b0: No Excessive Transaction Error
+ *  1'b1: Excessive Transaction Error
+ */
+#define USB_H_XCS_XACT_ERR5    (BIT(12))
+#define USB_H_XCS_XACT_ERR5_M  (USB_H_XCS_XACT_ERR5_V << USB_H_XCS_XACT_ERR5_S)
+#define USB_H_XCS_XACT_ERR5_V  0x00000001
+#define USB_H_XCS_XACT_ERR5_S  12
+/** USB_H_DESC_LST_ROLLINTR5 : R/W1C; bitpos: [13]; default: 0;
+ *  1'b0: No Descriptor rollover interrupt
+ *  1'b1: Descriptor rollover interrupt
+ */
+#define USB_H_DESC_LST_ROLLINTR5    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTR5_M  (USB_H_DESC_LST_ROLLINTR5_V << USB_H_DESC_LST_ROLLINTR5_S)
+#define USB_H_DESC_LST_ROLLINTR5_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTR5_S  13
+
+
+/** USB_HCINTMSK5_REG register
+ *  Host Channel 5 Interrupt Mask Register
+ */
+#define USB_HCINTMSK5_REG (SOC_DPORT_USB_BASE + 0x5ac)
+/** USB_H_XFERCOMPLMSK5 : R/W; bitpos: [0]; default: 0;
+ *  1'b0: Transfer Completed Mask
+ *  1'b1: No Transfer Completed Mask
+ */
+#define USB_H_XFERCOMPLMSK5    (BIT(0))
+#define USB_H_XFERCOMPLMSK5_M  (USB_H_XFERCOMPLMSK5_V << USB_H_XFERCOMPLMSK5_S)
+#define USB_H_XFERCOMPLMSK5_V  0x00000001
+#define USB_H_XFERCOMPLMSK5_S  0
+/** USB_H_CHHLTDMSK5 : R/W; bitpos: [1]; default: 0;
+ *  1'b0: Channel Halted Mask
+ *  1'b1: No Channel Halted Mask
+ */
+#define USB_H_CHHLTDMSK5    (BIT(1))
+#define USB_H_CHHLTDMSK5_M  (USB_H_CHHLTDMSK5_V << USB_H_CHHLTDMSK5_S)
+#define USB_H_CHHLTDMSK5_V  0x00000001
+#define USB_H_CHHLTDMSK5_S  1
+/** USB_H_AHBERRMSK5 : R/W; bitpos: [2]; default: 0;
+ *  1'b0: AHB Error Mask
+ *  1'b1: No AHB Error Mask
+ */
+#define USB_H_AHBERRMSK5    (BIT(2))
+#define USB_H_AHBERRMSK5_M  (USB_H_AHBERRMSK5_V << USB_H_AHBERRMSK5_S)
+#define USB_H_AHBERRMSK5_V  0x00000001
+#define USB_H_AHBERRMSK5_S  2
+/** USB_H_STALLMSK5 : R/W; bitpos: [3]; default: 0;
+ *  1'b0: Mask STALL Response Received Interrupt
+ *  1'b1: No STALL Response Received Interrupt Mask
+ */
+#define USB_H_STALLMSK5    (BIT(3))
+#define USB_H_STALLMSK5_M  (USB_H_STALLMSK5_V << USB_H_STALLMSK5_S)
+#define USB_H_STALLMSK5_V  0x00000001
+#define USB_H_STALLMSK5_S  3
+/** USB_H_NAKMSK5 : R/W; bitpos: [4]; default: 0;
+ *  1'b0: Mask NAK Response Received Interrupt
+ *  1'b1: No NAK Response Received Interrupt Mask
+ */
+#define USB_H_NAKMSK5    (BIT(4))
+#define USB_H_NAKMSK5_M  (USB_H_NAKMSK5_V << USB_H_NAKMSK5_S)
+#define USB_H_NAKMSK5_V  0x00000001
+#define USB_H_NAKMSK5_S  4
+/** USB_H_ACKMSK5 : R/W; bitpos: [5]; default: 0;
+ *  1'b0: Mask ACK Response Received/Transmitted Interrupt
+ *  1'b1: No ACK Response Received/Transmitted Interrupt Mask
+ */
+#define USB_H_ACKMSK5    (BIT(5))
+#define USB_H_ACKMSK5_M  (USB_H_ACKMSK5_V << USB_H_ACKMSK5_S)
+#define USB_H_ACKMSK5_V  0x00000001
+#define USB_H_ACKMSK5_S  5
+/** USB_H_NYETMSK5 : R/W; bitpos: [6]; default: 0;
+ *  1'b0: Mask NYET Response Received Interrupt
+ *  1'b1: No NYET Response Received Interrupt Mask
+ */
+#define USB_H_NYETMSK5    (BIT(6))
+#define USB_H_NYETMSK5_M  (USB_H_NYETMSK5_V << USB_H_NYETMSK5_S)
+#define USB_H_NYETMSK5_V  0x00000001
+#define USB_H_NYETMSK5_S  6
+/** USB_H_XACTERRMSK5 : R/W; bitpos: [7]; default: 0;
+ *  1'b0: Mask Transaction Error
+ *  1'b1: No Transaction Error Mask
+ */
+#define USB_H_XACTERRMSK5    (BIT(7))
+#define USB_H_XACTERRMSK5_M  (USB_H_XACTERRMSK5_V << USB_H_XACTERRMSK5_S)
+#define USB_H_XACTERRMSK5_V  0x00000001
+#define USB_H_XACTERRMSK5_S  7
+/** USB_H_BBLERRMSK5 : R/W; bitpos: [8]; default: 0;
+ *  Babble Error Mask
+ *  1'b0: Mask Babble Error
+ *  1'b1: No Babble Error Mask
+ */
+#define USB_H_BBLERRMSK5    (BIT(8))
+#define USB_H_BBLERRMSK5_M  (USB_H_BBLERRMSK5_V << USB_H_BBLERRMSK5_S)
+#define USB_H_BBLERRMSK5_V  0x00000001
+#define USB_H_BBLERRMSK5_S  8
+/** USB_H_FRMOVRUNMSK5 : R/W; bitpos: [9]; default: 0;
+ *  Frame Overrun Mask
+ *  0x0 (MASK): Mask Overrun Mask
+ *  0x1 (NOMASK): No Frame Overrun Mask
+ */
+#define USB_H_FRMOVRUNMSK5    (BIT(9))
+#define USB_H_FRMOVRUNMSK5_M  (USB_H_FRMOVRUNMSK5_V << USB_H_FRMOVRUNMSK5_S)
+#define USB_H_FRMOVRUNMSK5_V  0x00000001
+#define USB_H_FRMOVRUNMSK5_S  9
+/** USB_H_DATATGLERRMSK5 : R/W; bitpos: [10]; default: 0;
+ *  Data Toggle Error Mask n scatter/gather DMA mode for host
+ *  1'b0: Mask Data Toggle Error
+ *  1'b1: No Data Toggle Error Mask
+ */
+#define USB_H_DATATGLERRMSK5    (BIT(10))
+#define USB_H_DATATGLERRMSK5_M  (USB_H_DATATGLERRMSK5_V << USB_H_DATATGLERRMSK5_S)
+#define USB_H_DATATGLERRMSK5_V  0x00000001
+#define USB_H_DATATGLERRMSK5_S  10
+/** USB_H_BNAINTRMSK5 : R/W; bitpos: [11]; default: 0;
+ *  BNA (Buffer Not Available) Interrupt mask register
+ *  1'b0: BNA Interrupt Masked
+ *  1'b1: BNA Interrupt not masked
+ */
+#define USB_H_BNAINTRMSK5    (BIT(11))
+#define USB_H_BNAINTRMSK5_M  (USB_H_BNAINTRMSK5_V << USB_H_BNAINTRMSK5_S)
+#define USB_H_BNAINTRMSK5_V  0x00000001
+#define USB_H_BNAINTRMSK5_S  11
+/** USB_H_DESC_LST_ROLLINTRMSK5 : R/W; bitpos: [13]; default: 0;
+ *  Descriptor List rollover interrupt Mask
+ *  1'b0: Descriptor Rollover Interrupt Mask
+ *  1'b1: Descriptor Rollover Interrupt not masked
+ */
+#define USB_H_DESC_LST_ROLLINTRMSK5    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTRMSK5_M  (USB_H_DESC_LST_ROLLINTRMSK5_V << USB_H_DESC_LST_ROLLINTRMSK5_S)
+#define USB_H_DESC_LST_ROLLINTRMSK5_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTRMSK5_S  13
+
+
+/** USB_HCINT6_REG register
+ *  Host Channel 6 Interrupt Register
+ */
+#define USB_HCINT6_REG (SOC_DPORT_USB_BASE + 0x5c8)
+/** USB_H_XFERCOMPL6 : R/W1C; bitpos: [0]; default: 0;
+ *  1'b0: Transfer in progress or No Active Transfer
+ *  1'b1: Transfer completed normally without any errors
+ */
+#define USB_H_XFERCOMPL6    (BIT(0))
+#define USB_H_XFERCOMPL6_M  (USB_H_XFERCOMPL6_V << USB_H_XFERCOMPL6_S)
+#define USB_H_XFERCOMPL6_V  0x00000001
+#define USB_H_XFERCOMPL6_S  0
+/** USB_H_CHHLTD6 : R/W1C; bitpos: [1]; default: 0;
+ *  1'b0: Channel not halted
+ *  1'b1: Channel Halted
+ */
+#define USB_H_CHHLTD6    (BIT(1))
+#define USB_H_CHHLTD6_M  (USB_H_CHHLTD6_V << USB_H_CHHLTD6_S)
+#define USB_H_CHHLTD6_V  0x00000001
+#define USB_H_CHHLTD6_S  1
+/** USB_H_AHBERR6 : R/W1C; bitpos: [2]; default: 0;
+ *  1'b0: No AHB error
+ *  1'b1: AHB error during AHB read/write
+ */
+#define USB_H_AHBERR6    (BIT(2))
+#define USB_H_AHBERR6_M  (USB_H_AHBERR6_V << USB_H_AHBERR6_S)
+#define USB_H_AHBERR6_V  0x00000001
+#define USB_H_AHBERR6_S  2
+/** USB_H_STALL6 : R/W1C; bitpos: [3]; default: 0;
+ *  1'b0: No Stall Response Received Interrupt
+ *  1'b1: Stall Response Received Interrupt
+ */
+#define USB_H_STALL6    (BIT(3))
+#define USB_H_STALL6_M  (USB_H_STALL6_V << USB_H_STALL6_S)
+#define USB_H_STALL6_V  0x00000001
+#define USB_H_STALL6_S  3
+/** USB_H_NACK6 : R/W1C; bitpos: [4]; default: 0;
+ *  1'b0: No NAK Response Received Interrupt
+ *  1'b1: NAK Response Received Interrupt
+ */
+#define USB_H_NACK6    (BIT(4))
+#define USB_H_NACK6_M  (USB_H_NACK6_V << USB_H_NACK6_S)
+#define USB_H_NACK6_V  0x00000001
+#define USB_H_NACK6_S  4
+/** USB_H_ACK6 : R/W1C; bitpos: [5]; default: 0;
+ *  1'b0: No ACK Response Received or Transmitted Interrupt
+ *  1'b1: ACK Response Received or Transmitted Interrup
+ */
+#define USB_H_ACK6    (BIT(5))
+#define USB_H_ACK6_M  (USB_H_ACK6_V << USB_H_ACK6_S)
+#define USB_H_ACK6_V  0x00000001
+#define USB_H_ACK6_S  5
+/** USB_H_NYET6 : R/W1C; bitpos: [6]; default: 0;
+ *  1'b0: No NYET Response Received Interrupt
+ *  1'b1: NYET Response Received Interrupt
+ */
+#define USB_H_NYET6    (BIT(6))
+#define USB_H_NYET6_M  (USB_H_NYET6_V << USB_H_NYET6_S)
+#define USB_H_NYET6_V  0x00000001
+#define USB_H_NYET6_S  6
+/** USB_H_XACTERR6 : R/W1C; bitpos: [7]; default: 0;
+ *  Indicates one of the following errors occurred on the USB:
+ *  CRC check failure
+ *  Timeout
+ *  Bit stuff error
+ *  False EOP
+ */
+#define USB_H_XACTERR6    (BIT(7))
+#define USB_H_XACTERR6_M  (USB_H_XACTERR6_V << USB_H_XACTERR6_S)
+#define USB_H_XACTERR6_V  0x00000001
+#define USB_H_XACTERR6_S  7
+/** USB_H_BBLERR6 : R/W1C; bitpos: [8]; default: 0;
+ *  1'b0: No Babble Error
+ *  1'b1: Babble Error
+ */
+#define USB_H_BBLERR6    (BIT(8))
+#define USB_H_BBLERR6_M  (USB_H_BBLERR6_V << USB_H_BBLERR6_S)
+#define USB_H_BBLERR6_V  0x00000001
+#define USB_H_BBLERR6_S  8
+/** USB_H_FRMOVRUN6 : R/W1C; bitpos: [9]; default: 0;
+ *  1'b0: No Frame Overrun
+ *  1'b1: Frame Overrun
+ */
+#define USB_H_FRMOVRUN6    (BIT(9))
+#define USB_H_FRMOVRUN6_M  (USB_H_FRMOVRUN6_V << USB_H_FRMOVRUN6_S)
+#define USB_H_FRMOVRUN6_V  0x00000001
+#define USB_H_FRMOVRUN6_S  9
+/** USB_H_DATATGLERR6 : R/W1C; bitpos: [10]; default: 0;
+ *  1'b0: No Data Toggle Error
+ *  1'b1: Data Toggle Error
+ */
+#define USB_H_DATATGLERR6    (BIT(10))
+#define USB_H_DATATGLERR6_M  (USB_H_DATATGLERR6_V << USB_H_DATATGLERR6_S)
+#define USB_H_DATATGLERR6_V  0x00000001
+#define USB_H_DATATGLERR6_S  10
+/** USB_H_BNAINTR6 : R/W1C; bitpos: [11]; default: 0;
+ *  1'b0: No BNA Interrupt
+ *  1'b1: BNA Interrupt
+ */
+#define USB_H_BNAINTR6    (BIT(11))
+#define USB_H_BNAINTR6_M  (USB_H_BNAINTR6_V << USB_H_BNAINTR6_S)
+#define USB_H_BNAINTR6_V  0x00000001
+#define USB_H_BNAINTR6_S  11
+/** USB_H_XCS_XACT_ERR6 : R/W1C; bitpos: [12]; default: 0;
+ *  1'b0: No Excessive Transaction Error
+ *  1'b1: Excessive Transaction Error
+ */
+#define USB_H_XCS_XACT_ERR6    (BIT(12))
+#define USB_H_XCS_XACT_ERR6_M  (USB_H_XCS_XACT_ERR6_V << USB_H_XCS_XACT_ERR6_S)
+#define USB_H_XCS_XACT_ERR6_V  0x00000001
+#define USB_H_XCS_XACT_ERR6_S  12
+/** USB_H_DESC_LST_ROLLINTR6 : R/W1C; bitpos: [13]; default: 0;
+ *  1'b0: No Descriptor rollover interrupt
+ *  1'b1: Descriptor rollover interrupt
+ */
+#define USB_H_DESC_LST_ROLLINTR6    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTR6_M  (USB_H_DESC_LST_ROLLINTR6_V << USB_H_DESC_LST_ROLLINTR6_S)
+#define USB_H_DESC_LST_ROLLINTR6_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTR6_S  13
+
+
+/** USB_HCINTMSK6_REG register
+ *  Host Channel 6 Interrupt Mask Register
+ */
+#define USB_HCINTMSK6_REG (SOC_DPORT_USB_BASE + 0x5cc)
+/** USB_H_XFERCOMPLMSK6 : R/W; bitpos: [0]; default: 0;
+ *  1'b0: Transfer Completed Mask
+ *  1'b1: No Transfer Completed Mask
+ */
+#define USB_H_XFERCOMPLMSK6    (BIT(0))
+#define USB_H_XFERCOMPLMSK6_M  (USB_H_XFERCOMPLMSK6_V << USB_H_XFERCOMPLMSK6_S)
+#define USB_H_XFERCOMPLMSK6_V  0x00000001
+#define USB_H_XFERCOMPLMSK6_S  0
+/** USB_H_CHHLTDMSK6 : R/W; bitpos: [1]; default: 0;
+ *  1'b0: Channel Halted Mask
+ *  1'b1: No Channel Halted Mask
+ */
+#define USB_H_CHHLTDMSK6    (BIT(1))
+#define USB_H_CHHLTDMSK6_M  (USB_H_CHHLTDMSK6_V << USB_H_CHHLTDMSK6_S)
+#define USB_H_CHHLTDMSK6_V  0x00000001
+#define USB_H_CHHLTDMSK6_S  1
+/** USB_H_AHBERRMSK6 : R/W; bitpos: [2]; default: 0;
+ *  1'b0: AHB Error Mask
+ *  1'b1: No AHB Error Mask
+ */
+#define USB_H_AHBERRMSK6    (BIT(2))
+#define USB_H_AHBERRMSK6_M  (USB_H_AHBERRMSK6_V << USB_H_AHBERRMSK6_S)
+#define USB_H_AHBERRMSK6_V  0x00000001
+#define USB_H_AHBERRMSK6_S  2
+/** USB_H_STALLMSK6 : R/W; bitpos: [3]; default: 0;
+ *  1'b0: Mask STALL Response Received Interrupt
+ *  1'b1: No STALL Response Received Interrupt Mask
+ */
+#define USB_H_STALLMSK6    (BIT(3))
+#define USB_H_STALLMSK6_M  (USB_H_STALLMSK6_V << USB_H_STALLMSK6_S)
+#define USB_H_STALLMSK6_V  0x00000001
+#define USB_H_STALLMSK6_S  3
+/** USB_H_NAKMSK6 : R/W; bitpos: [4]; default: 0;
+ *  1'b0: Mask NAK Response Received Interrupt
+ *  1'b1: No NAK Response Received Interrupt Mask
+ */
+#define USB_H_NAKMSK6    (BIT(4))
+#define USB_H_NAKMSK6_M  (USB_H_NAKMSK6_V << USB_H_NAKMSK6_S)
+#define USB_H_NAKMSK6_V  0x00000001
+#define USB_H_NAKMSK6_S  4
+/** USB_H_ACKMSK6 : R/W; bitpos: [5]; default: 0;
+ *  1'b0: Mask ACK Response Received/Transmitted Interrupt
+ *  1'b1: No ACK Response Received/Transmitted Interrupt Mask
+ */
+#define USB_H_ACKMSK6    (BIT(5))
+#define USB_H_ACKMSK6_M  (USB_H_ACKMSK6_V << USB_H_ACKMSK6_S)
+#define USB_H_ACKMSK6_V  0x00000001
+#define USB_H_ACKMSK6_S  5
+/** USB_H_NYETMSK6 : R/W; bitpos: [6]; default: 0;
+ *  1'b0: Mask NYET Response Received Interrupt
+ *  1'b1: No NYET Response Received Interrupt Mask
+ */
+#define USB_H_NYETMSK6    (BIT(6))
+#define USB_H_NYETMSK6_M  (USB_H_NYETMSK6_V << USB_H_NYETMSK6_S)
+#define USB_H_NYETMSK6_V  0x00000001
+#define USB_H_NYETMSK6_S  6
+/** USB_H_XACTERRMSK6 : R/W; bitpos: [7]; default: 0;
+ *  1'b0: Mask Transaction Error
+ *  1'b1: No Transaction Error Mask
+ */
+#define USB_H_XACTERRMSK6    (BIT(7))
+#define USB_H_XACTERRMSK6_M  (USB_H_XACTERRMSK6_V << USB_H_XACTERRMSK6_S)
+#define USB_H_XACTERRMSK6_V  0x00000001
+#define USB_H_XACTERRMSK6_S  7
+/** USB_H_BBLERRMSK6 : R/W; bitpos: [8]; default: 0;
+ *  Babble Error Mask
+ *  1'b0: Mask Babble Error
+ *  1'b1: No Babble Error Mask
+ */
+#define USB_H_BBLERRMSK6    (BIT(8))
+#define USB_H_BBLERRMSK6_M  (USB_H_BBLERRMSK6_V << USB_H_BBLERRMSK6_S)
+#define USB_H_BBLERRMSK6_V  0x00000001
+#define USB_H_BBLERRMSK6_S  8
+/** USB_H_FRMOVRUNMSK6 : R/W; bitpos: [9]; default: 0;
+ *  Frame Overrun Mask
+ *  0x0 (MASK): Mask Overrun Mask
+ *  0x1 (NOMASK): No Frame Overrun Mask
+ */
+#define USB_H_FRMOVRUNMSK6    (BIT(9))
+#define USB_H_FRMOVRUNMSK6_M  (USB_H_FRMOVRUNMSK6_V << USB_H_FRMOVRUNMSK6_S)
+#define USB_H_FRMOVRUNMSK6_V  0x00000001
+#define USB_H_FRMOVRUNMSK6_S  9
+/** USB_H_DATATGLERRMSK6 : R/W; bitpos: [10]; default: 0;
+ *  Data Toggle Error Mask n scatter/gather DMA mode for host
+ *  1'b0: Mask Data Toggle Error
+ *  1'b1: No Data Toggle Error Mask
+ */
+#define USB_H_DATATGLERRMSK6    (BIT(10))
+#define USB_H_DATATGLERRMSK6_M  (USB_H_DATATGLERRMSK6_V << USB_H_DATATGLERRMSK6_S)
+#define USB_H_DATATGLERRMSK6_V  0x00000001
+#define USB_H_DATATGLERRMSK6_S  10
+/** USB_H_BNAINTRMSK6 : R/W; bitpos: [11]; default: 0;
+ *  BNA (Buffer Not Available) Interrupt mask register
+ *  1'b0: BNA Interrupt Masked
+ *  1'b1: BNA Interrupt not masked
+ */
+#define USB_H_BNAINTRMSK6    (BIT(11))
+#define USB_H_BNAINTRMSK6_M  (USB_H_BNAINTRMSK6_V << USB_H_BNAINTRMSK6_S)
+#define USB_H_BNAINTRMSK6_V  0x00000001
+#define USB_H_BNAINTRMSK6_S  11
+/** USB_H_DESC_LST_ROLLINTRMSK6 : R/W; bitpos: [13]; default: 0;
+ *  Descriptor List rollover interrupt Mask
+ *  1'b0: Descriptor Rollover Interrupt Mask
+ *  1'b1: Descriptor Rollover Interrupt not masked
+ */
+#define USB_H_DESC_LST_ROLLINTRMSK6    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTRMSK6_M  (USB_H_DESC_LST_ROLLINTRMSK6_V << USB_H_DESC_LST_ROLLINTRMSK6_S)
+#define USB_H_DESC_LST_ROLLINTRMSK6_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTRMSK6_S  13
+
+
+/** USB_HCINT7_REG register
+ *  Host Channel 7 Interrupt Register
+ */
+#define USB_HCINT7_REG (SOC_DPORT_USB_BASE + 0x5e8)
+/** USB_H_XFERCOMPL7 : R/W1C; bitpos: [0]; default: 0;
+ *  1'b0: Transfer in progress or No Active Transfer
+ *  1'b1: Transfer completed normally without any errors
+ */
+#define USB_H_XFERCOMPL7    (BIT(0))
+#define USB_H_XFERCOMPL7_M  (USB_H_XFERCOMPL7_V << USB_H_XFERCOMPL7_S)
+#define USB_H_XFERCOMPL7_V  0x00000001
+#define USB_H_XFERCOMPL7_S  0
+/** USB_H_CHHLTD7 : R/W1C; bitpos: [1]; default: 0;
+ *  1'b0: Channel not halted
+ *  1'b1: Channel Halted
+ */
+#define USB_H_CHHLTD7    (BIT(1))
+#define USB_H_CHHLTD7_M  (USB_H_CHHLTD7_V << USB_H_CHHLTD7_S)
+#define USB_H_CHHLTD7_V  0x00000001
+#define USB_H_CHHLTD7_S  1
+/** USB_H_AHBERR7 : R/W1C; bitpos: [2]; default: 0;
+ *  1'b0: No AHB error
+ *  1'b1: AHB error during AHB read/write
+ */
+#define USB_H_AHBERR7    (BIT(2))
+#define USB_H_AHBERR7_M  (USB_H_AHBERR7_V << USB_H_AHBERR7_S)
+#define USB_H_AHBERR7_V  0x00000001
+#define USB_H_AHBERR7_S  2
+/** USB_H_STALL7 : R/W1C; bitpos: [3]; default: 0;
+ *  1'b0: No Stall Response Received Interrupt
+ *  1'b1: Stall Response Received Interrupt
+ */
+#define USB_H_STALL7    (BIT(3))
+#define USB_H_STALL7_M  (USB_H_STALL7_V << USB_H_STALL7_S)
+#define USB_H_STALL7_V  0x00000001
+#define USB_H_STALL7_S  3
+/** USB_H_NACK7 : R/W1C; bitpos: [4]; default: 0;
+ *  1'b0: No NAK Response Received Interrupt
+ *  1'b1: NAK Response Received Interrupt
+ */
+#define USB_H_NACK7    (BIT(4))
+#define USB_H_NACK7_M  (USB_H_NACK7_V << USB_H_NACK7_S)
+#define USB_H_NACK7_V  0x00000001
+#define USB_H_NACK7_S  4
+/** USB_H_ACK7 : R/W1C; bitpos: [5]; default: 0;
+ *  1'b0: No ACK Response Received or Transmitted Interrupt
+ *  1'b1: ACK Response Received or Transmitted Interrup
+ */
+#define USB_H_ACK7    (BIT(5))
+#define USB_H_ACK7_M  (USB_H_ACK7_V << USB_H_ACK7_S)
+#define USB_H_ACK7_V  0x00000001
+#define USB_H_ACK7_S  5
+/** USB_H_NYET7 : R/W1C; bitpos: [6]; default: 0;
+ *  1'b0: No NYET Response Received Interrupt
+ *  1'b1: NYET Response Received Interrupt
+ */
+#define USB_H_NYET7    (BIT(6))
+#define USB_H_NYET7_M  (USB_H_NYET7_V << USB_H_NYET7_S)
+#define USB_H_NYET7_V  0x00000001
+#define USB_H_NYET7_S  6
+/** USB_H_XACTERR7 : R/W1C; bitpos: [7]; default: 0;
+ *  Indicates one of the following errors occurred on the USB:
+ *  CRC check failure
+ *  Timeout
+ *  Bit stuff error
+ *  False EOP
+ */
+#define USB_H_XACTERR7    (BIT(7))
+#define USB_H_XACTERR7_M  (USB_H_XACTERR7_V << USB_H_XACTERR7_S)
+#define USB_H_XACTERR7_V  0x00000001
+#define USB_H_XACTERR7_S  7
+/** USB_H_BBLERR7 : R/W1C; bitpos: [8]; default: 0;
+ *  1'b0: No Babble Error
+ *  1'b1: Babble Error
+ */
+#define USB_H_BBLERR7    (BIT(8))
+#define USB_H_BBLERR7_M  (USB_H_BBLERR7_V << USB_H_BBLERR7_S)
+#define USB_H_BBLERR7_V  0x00000001
+#define USB_H_BBLERR7_S  8
+/** USB_H_FRMOVRUN7 : R/W1C; bitpos: [9]; default: 0;
+ *  1'b0: No Frame Overrun
+ *  1'b1: Frame Overrun
+ */
+#define USB_H_FRMOVRUN7    (BIT(9))
+#define USB_H_FRMOVRUN7_M  (USB_H_FRMOVRUN7_V << USB_H_FRMOVRUN7_S)
+#define USB_H_FRMOVRUN7_V  0x00000001
+#define USB_H_FRMOVRUN7_S  9
+/** USB_H_DATATGLERR7 : R/W1C; bitpos: [10]; default: 0;
+ *  1'b0: No Data Toggle Error
+ *  1'b1: Data Toggle Error
+ */
+#define USB_H_DATATGLERR7    (BIT(10))
+#define USB_H_DATATGLERR7_M  (USB_H_DATATGLERR7_V << USB_H_DATATGLERR7_S)
+#define USB_H_DATATGLERR7_V  0x00000001
+#define USB_H_DATATGLERR7_S  10
+/** USB_H_BNAINTR7 : R/W1C; bitpos: [11]; default: 0;
+ *  1'b0: No BNA Interrupt
+ *  1'b1: BNA Interrupt
+ */
+#define USB_H_BNAINTR7    (BIT(11))
+#define USB_H_BNAINTR7_M  (USB_H_BNAINTR7_V << USB_H_BNAINTR7_S)
+#define USB_H_BNAINTR7_V  0x00000001
+#define USB_H_BNAINTR7_S  11
+/** USB_H_XCS_XACT_ERR7 : R/W1C; bitpos: [12]; default: 0;
+ *  1'b0: No Excessive Transaction Error
+ *  1'b1: Excessive Transaction Error
+ */
+#define USB_H_XCS_XACT_ERR7    (BIT(12))
+#define USB_H_XCS_XACT_ERR7_M  (USB_H_XCS_XACT_ERR7_V << USB_H_XCS_XACT_ERR7_S)
+#define USB_H_XCS_XACT_ERR7_V  0x00000001
+#define USB_H_XCS_XACT_ERR7_S  12
+/** USB_H_DESC_LST_ROLLINTR7 : R/W1C; bitpos: [13]; default: 0;
+ *  1'b0: No Descriptor rollover interrupt
+ *  1'b1: Descriptor rollover interrupt
+ */
+#define USB_H_DESC_LST_ROLLINTR7    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTR7_M  (USB_H_DESC_LST_ROLLINTR7_V << USB_H_DESC_LST_ROLLINTR7_S)
+#define USB_H_DESC_LST_ROLLINTR7_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTR7_S  13
+
+
+/** USB_HCINTMSK7_REG register
+ *  Host Channel 7 Interrupt Mask Register
+ */
+#define USB_HCINTMSK7_REG (SOC_DPORT_USB_BASE + 0x5ec)
+/** USB_H_XFERCOMPLMSK7 : R/W; bitpos: [0]; default: 0;
+ *  1'b0: Transfer Completed Mask
+ *  1'b1: No Transfer Completed Mask
+ */
+#define USB_H_XFERCOMPLMSK7    (BIT(0))
+#define USB_H_XFERCOMPLMSK7_M  (USB_H_XFERCOMPLMSK7_V << USB_H_XFERCOMPLMSK7_S)
+#define USB_H_XFERCOMPLMSK7_V  0x00000001
+#define USB_H_XFERCOMPLMSK7_S  0
+/** USB_H_CHHLTDMSK7 : R/W; bitpos: [1]; default: 0;
+ *  1'b0: Channel Halted Mask
+ *  1'b1: No Channel Halted Mask
+ */
+#define USB_H_CHHLTDMSK7    (BIT(1))
+#define USB_H_CHHLTDMSK7_M  (USB_H_CHHLTDMSK7_V << USB_H_CHHLTDMSK7_S)
+#define USB_H_CHHLTDMSK7_V  0x00000001
+#define USB_H_CHHLTDMSK7_S  1
+/** USB_H_AHBERRMSK7 : R/W; bitpos: [2]; default: 0;
+ *  1'b0: AHB Error Mask
+ *  1'b1: No AHB Error Mask
+ */
+#define USB_H_AHBERRMSK7    (BIT(2))
+#define USB_H_AHBERRMSK7_M  (USB_H_AHBERRMSK7_V << USB_H_AHBERRMSK7_S)
+#define USB_H_AHBERRMSK7_V  0x00000001
+#define USB_H_AHBERRMSK7_S  2
+/** USB_H_STALLMSK7 : R/W; bitpos: [3]; default: 0;
+ *  1'b0: Mask STALL Response Received Interrupt
+ *  1'b1: No STALL Response Received Interrupt Mask
+ */
+#define USB_H_STALLMSK7    (BIT(3))
+#define USB_H_STALLMSK7_M  (USB_H_STALLMSK7_V << USB_H_STALLMSK7_S)
+#define USB_H_STALLMSK7_V  0x00000001
+#define USB_H_STALLMSK7_S  3
+/** USB_H_NAKMSK7 : R/W; bitpos: [4]; default: 0;
+ *  1'b0: Mask NAK Response Received Interrupt
+ *  1'b1: No NAK Response Received Interrupt Mask
+ */
+#define USB_H_NAKMSK7    (BIT(4))
+#define USB_H_NAKMSK7_M  (USB_H_NAKMSK7_V << USB_H_NAKMSK7_S)
+#define USB_H_NAKMSK7_V  0x00000001
+#define USB_H_NAKMSK7_S  4
+/** USB_H_ACKMSK7 : R/W; bitpos: [5]; default: 0;
+ *  1'b0: Mask ACK Response Received/Transmitted Interrupt
+ *  1'b1: No ACK Response Received/Transmitted Interrupt Mask
+ */
+#define USB_H_ACKMSK7    (BIT(5))
+#define USB_H_ACKMSK7_M  (USB_H_ACKMSK7_V << USB_H_ACKMSK7_S)
+#define USB_H_ACKMSK7_V  0x00000001
+#define USB_H_ACKMSK7_S  5
+/** USB_H_NYETMSK7 : R/W; bitpos: [6]; default: 0;
+ *  1'b0: Mask NYET Response Received Interrupt
+ *  1'b1: No NYET Response Received Interrupt Mask
+ */
+#define USB_H_NYETMSK7    (BIT(6))
+#define USB_H_NYETMSK7_M  (USB_H_NYETMSK7_V << USB_H_NYETMSK7_S)
+#define USB_H_NYETMSK7_V  0x00000001
+#define USB_H_NYETMSK7_S  6
+/** USB_H_XACTERRMSK7 : R/W; bitpos: [7]; default: 0;
+ *  1'b0: Mask Transaction Error
+ *  1'b1: No Transaction Error Mask
+ */
+#define USB_H_XACTERRMSK7    (BIT(7))
+#define USB_H_XACTERRMSK7_M  (USB_H_XACTERRMSK7_V << USB_H_XACTERRMSK7_S)
+#define USB_H_XACTERRMSK7_V  0x00000001
+#define USB_H_XACTERRMSK7_S  7
+/** USB_H_BBLERRMSK7 : R/W; bitpos: [8]; default: 0;
+ *  Babble Error Mask
+ *  1'b0: Mask Babble Error
+ *  1'b1: No Babble Error Mask
+ */
+#define USB_H_BBLERRMSK7    (BIT(8))
+#define USB_H_BBLERRMSK7_M  (USB_H_BBLERRMSK7_V << USB_H_BBLERRMSK7_S)
+#define USB_H_BBLERRMSK7_V  0x00000001
+#define USB_H_BBLERRMSK7_S  8
+/** USB_H_FRMOVRUNMSK7 : R/W; bitpos: [9]; default: 0;
+ *  Frame Overrun Mask
+ *  0x0 (MASK): Mask Overrun Mask
+ *  0x1 (NOMASK): No Frame Overrun Mask
+ */
+#define USB_H_FRMOVRUNMSK7    (BIT(9))
+#define USB_H_FRMOVRUNMSK7_M  (USB_H_FRMOVRUNMSK7_V << USB_H_FRMOVRUNMSK7_S)
+#define USB_H_FRMOVRUNMSK7_V  0x00000001
+#define USB_H_FRMOVRUNMSK7_S  9
+/** USB_H_DATATGLERRMSK7 : R/W; bitpos: [10]; default: 0;
+ *  Data Toggle Error Mask n scatter/gather DMA mode for host
+ *  1'b0: Mask Data Toggle Error
+ *  1'b1: No Data Toggle Error Mask
+ */
+#define USB_H_DATATGLERRMSK7    (BIT(10))
+#define USB_H_DATATGLERRMSK7_M  (USB_H_DATATGLERRMSK7_V << USB_H_DATATGLERRMSK7_S)
+#define USB_H_DATATGLERRMSK7_V  0x00000001
+#define USB_H_DATATGLERRMSK7_S  10
+/** USB_H_BNAINTRMSK7 : R/W; bitpos: [11]; default: 0;
+ *  BNA (Buffer Not Available) Interrupt mask register
+ *  1'b0: BNA Interrupt Masked
+ *  1'b1: BNA Interrupt not masked
+ */
+#define USB_H_BNAINTRMSK7    (BIT(11))
+#define USB_H_BNAINTRMSK7_M  (USB_H_BNAINTRMSK7_V << USB_H_BNAINTRMSK7_S)
+#define USB_H_BNAINTRMSK7_V  0x00000001
+#define USB_H_BNAINTRMSK7_S  11
+/** USB_H_DESC_LST_ROLLINTRMSK7 : R/W; bitpos: [13]; default: 0;
+ *  Descriptor List rollover interrupt Mask
+ *  1'b0: Descriptor Rollover Interrupt Mask
+ *  1'b1: Descriptor Rollover Interrupt not masked
+ */
+#define USB_H_DESC_LST_ROLLINTRMSK7    (BIT(13))
+#define USB_H_DESC_LST_ROLLINTRMSK7_M  (USB_H_DESC_LST_ROLLINTRMSK7_V << USB_H_DESC_LST_ROLLINTRMSK7_S)
+#define USB_H_DESC_LST_ROLLINTRMSK7_V  0x00000001
+#define USB_H_DESC_LST_ROLLINTRMSK7_S  13
+
+
+/** USB_DIEPMSK_REG register
+ *  Device IN Endpoint Common Interrupt Mask Register
+ */
+#define USB_DIEPMSK_REG (SOC_DPORT_USB_BASE + 0x810)
+/** USB_DI_XFERCOMPLMSK : R/W; bitpos: [0]; default: 0;
+ *  0x0 : Mask Transfer Completed Interrupt
+ *  0x1 : No Transfer Completed Interrupt Mask
+ */
+#define USB_DI_XFERCOMPLMSK    (BIT(0))
+#define USB_DI_XFERCOMPLMSK_M  (USB_DI_XFERCOMPLMSK_V << USB_DI_XFERCOMPLMSK_S)
+#define USB_DI_XFERCOMPLMSK_V  0x00000001
+#define USB_DI_XFERCOMPLMSK_S  0
+/** USB_DI_EPDISBLDMSK : R/W; bitpos: [1]; default: 0;
+ *  0x0 : Mask Endpoint Disabled Interrupt
+ *  0x1 : No Endpoint Disabled Interrupt Mask
+ */
+#define USB_DI_EPDISBLDMSK    (BIT(1))
+#define USB_DI_EPDISBLDMSK_M  (USB_DI_EPDISBLDMSK_V << USB_DI_EPDISBLDMSK_S)
+#define USB_DI_EPDISBLDMSK_V  0x00000001
+#define USB_DI_EPDISBLDMSK_S  1
+/** USB_DI_AHBERMSK : R/W; bitpos: [2]; default: 0;
+ *  0x0 : Mask AHB Error Interrupt
+ *  0x1 : No AHB Error Interrupt Mask
+ */
+#define USB_DI_AHBERMSK    (BIT(2))
+#define USB_DI_AHBERMSK_M  (USB_DI_AHBERMSK_V << USB_DI_AHBERMSK_S)
+#define USB_DI_AHBERMSK_V  0x00000001
+#define USB_DI_AHBERMSK_S  2
+/** USB_TIMEOUTMSK : R/W; bitpos: [3]; default: 0;
+ *  0x0 : Mask Timeout Condition Interrupt
+ *  0x1 : No Timeout Condition Interrupt Mask
+ */
+#define USB_TIMEOUTMSK    (BIT(3))
+#define USB_TIMEOUTMSK_M  (USB_TIMEOUTMSK_V << USB_TIMEOUTMSK_S)
+#define USB_TIMEOUTMSK_V  0x00000001
+#define USB_TIMEOUTMSK_S  3
+/** USB_INTKNTXFEMPMSK : R/W; bitpos: [4]; default: 0;
+ *  0x0 : Mask IN Token Received When TxFIFO Empty Interrupt
+ *  0x1 : No IN Token Received When TxFIFO Empty Interrupt
+ */
+#define USB_INTKNTXFEMPMSK    (BIT(4))
+#define USB_INTKNTXFEMPMSK_M  (USB_INTKNTXFEMPMSK_V << USB_INTKNTXFEMPMSK_S)
+#define USB_INTKNTXFEMPMSK_V  0x00000001
+#define USB_INTKNTXFEMPMSK_S  4
+/** USB_INTKNEPMISMSK : R/W; bitpos: [5]; default: 0;
+ *  0x0 : Mask IN Token received with EP Mismatch Interrupt
+ *  0x1 : No Mask IN Token received with EP Mismatch Interrupt
+ */
+#define USB_INTKNEPMISMSK    (BIT(5))
+#define USB_INTKNEPMISMSK_M  (USB_INTKNEPMISMSK_V << USB_INTKNEPMISMSK_S)
+#define USB_INTKNEPMISMSK_V  0x00000001
+#define USB_INTKNEPMISMSK_S  5
+/** USB_INEPNAKEFFMSK : R/W; bitpos: [6]; default: 0;
+ *  0x0 : Mask IN Endpoint NAK Effective Interrupt
+ *  0x1 : No IN Endpoint NAK Effective Interrupt Mask
+ */
+#define USB_INEPNAKEFFMSK    (BIT(6))
+#define USB_INEPNAKEFFMSK_M  (USB_INEPNAKEFFMSK_V << USB_INEPNAKEFFMSK_S)
+#define USB_INEPNAKEFFMSK_V  0x00000001
+#define USB_INEPNAKEFFMSK_S  6
+/** USB_TXFIFOUNDRNMSK : R/W; bitpos: [8]; default: 0;
+ *  0x0 : Mask Fifo Underrun Interrupt
+ *  0x1 : No Fifo Underrun Interrupt Mask
+ */
+#define USB_TXFIFOUNDRNMSK    (BIT(8))
+#define USB_TXFIFOUNDRNMSK_M  (USB_TXFIFOUNDRNMSK_V << USB_TXFIFOUNDRNMSK_S)
+#define USB_TXFIFOUNDRNMSK_V  0x00000001
+#define USB_TXFIFOUNDRNMSK_S  8
+/** USB_BNAININTRMSK : R/W; bitpos: [9]; default: 0;
+ *  0x0 : Mask BNA Interrupt
+ *  0x1 : No BNA Interrupt Mask
+ */
+#define USB_BNAININTRMSK    (BIT(9))
+#define USB_BNAININTRMSK_M  (USB_BNAININTRMSK_V << USB_BNAININTRMSK_S)
+#define USB_BNAININTRMSK_V  0x00000001
+#define USB_BNAININTRMSK_S  9
+/** USB_DI_NAKMSK : R/W; bitpos: [13]; default: 0;
+ *  0x0 : Mask NAK Interrupt
+ *  0x1 : No Mask NAK Interrupt
+ */
+#define USB_DI_NAKMSK    (BIT(13))
+#define USB_DI_NAKMSK_M  (USB_DI_NAKMSK_V << USB_DI_NAKMSK_S)
+#define USB_DI_NAKMSK_V  0x00000001
+#define USB_DI_NAKMSK_S  13
+
+
+/** USB_DOEPMSK_REG register
+ *  Device OUT Endpoint Common Interrupt Mask Register
+ */
+#define USB_DOEPMSK_REG (SOC_DPORT_USB_BASE + 0x814)
+/** USB_XFERCOMPLMSK : R/W; bitpos: [0]; default: 0;
+ *  0x0 : Mask Transfer Completed Interrupt
+ *  0x1 : No Transfer Completed Interrupt Mask
+ */
+#define USB_XFERCOMPLMSK    (BIT(0))
+#define USB_XFERCOMPLMSK_M  (USB_XFERCOMPLMSK_V << USB_XFERCOMPLMSK_S)
+#define USB_XFERCOMPLMSK_V  0x00000001
+#define USB_XFERCOMPLMSK_S  0
+/** USB_EPDISBLDMSK : R/W; bitpos: [1]; default: 0;
+ *  0x0 : Mask Endpoint Disabled Interrupt
+ *  0x1 : No Endpoint Disabled Interrupt Mask
+ */
+#define USB_EPDISBLDMSK    (BIT(1))
+#define USB_EPDISBLDMSK_M  (USB_EPDISBLDMSK_V << USB_EPDISBLDMSK_S)
+#define USB_EPDISBLDMSK_V  0x00000001
+#define USB_EPDISBLDMSK_S  1
+/** USB_AHBERMSK : R/W; bitpos: [2]; default: 0;
+ *  0x0 : Mask AHB Error Interrupt
+ *  0x1 : No AHB Error Interrupt Mask
+ */
+#define USB_AHBERMSK    (BIT(2))
+#define USB_AHBERMSK_M  (USB_AHBERMSK_V << USB_AHBERMSK_S)
+#define USB_AHBERMSK_V  0x00000001
+#define USB_AHBERMSK_S  2
+/** USB_SETUPMSK : R/W; bitpos: [3]; default: 0;
+ *  0x0 : Mask SETUP Phase Done Interrupt
+ *  0x1 : No SETUP Phase Done Interrupt Mask
+ */
+#define USB_SETUPMSK    (BIT(3))
+#define USB_SETUPMSK_M  (USB_SETUPMSK_V << USB_SETUPMSK_S)
+#define USB_SETUPMSK_V  0x00000001
+#define USB_SETUPMSK_S  3
+/** USB_OUTTKNEPDISMSK : R/W; bitpos: [4]; default: 0;
+ *  0x0 : Mask OUT Token Received when Endpoint Disabled Interrupt
+ *  0x1 : No OUT Token Received when Endpoint Disabled Interrupt Mask
+ */
+#define USB_OUTTKNEPDISMSK    (BIT(4))
+#define USB_OUTTKNEPDISMSK_M  (USB_OUTTKNEPDISMSK_V << USB_OUTTKNEPDISMSK_S)
+#define USB_OUTTKNEPDISMSK_V  0x00000001
+#define USB_OUTTKNEPDISMSK_S  4
+/** USB_STSPHSERCVDMSK : R/W; bitpos: [5]; default: 0;
+ *  0x0 : Status Phase Received Mask
+ *  0x1 : No Status Phase Received Mask
+ */
+#define USB_STSPHSERCVDMSK    (BIT(5))
+#define USB_STSPHSERCVDMSK_M  (USB_STSPHSERCVDMSK_V << USB_STSPHSERCVDMSK_S)
+#define USB_STSPHSERCVDMSK_V  0x00000001
+#define USB_STSPHSERCVDMSK_S  5
+/** USB_BACK2BACKSETUP : R/W; bitpos: [6]; default: 0;
+ *  0x0 : Mask Back-to-Back SETUP Packets Received Interrupt
+ *  0x1 : No Back-to-Back SETUP Packets Received Interrupt Mask
+ */
+#define USB_BACK2BACKSETUP    (BIT(6))
+#define USB_BACK2BACKSETUP_M  (USB_BACK2BACKSETUP_V << USB_BACK2BACKSETUP_S)
+#define USB_BACK2BACKSETUP_V  0x00000001
+#define USB_BACK2BACKSETUP_S  6
+/** USB_OUTPKTERRMSK : R/W; bitpos: [8]; default: 0;
+ *  0x0 : Mask OUT Packet Error Interrupt
+ *  0x1 : No OUT Packet Error Interrupt Mask
+ */
+#define USB_OUTPKTERRMSK    (BIT(8))
+#define USB_OUTPKTERRMSK_M  (USB_OUTPKTERRMSK_V << USB_OUTPKTERRMSK_S)
+#define USB_OUTPKTERRMSK_V  0x00000001
+#define USB_OUTPKTERRMSK_S  8
+/** USB_BNAOUTINTRMSK : R/W; bitpos: [9]; default: 0;
+ *  0x0 : Mask BNA Interrupt
+ *  0x1 : No BNA Interrupt Mask
+ */
+#define USB_BNAOUTINTRMSK    (BIT(9))
+#define USB_BNAOUTINTRMSK_M  (USB_BNAOUTINTRMSK_V << USB_BNAOUTINTRMSK_S)
+#define USB_BNAOUTINTRMSK_V  0x00000001
+#define USB_BNAOUTINTRMSK_S  9
+/** USB_BBLEERRMSK : R/W; bitpos: [12]; default: 0;
+ *  0x0 : Mask Babble Error Interrupt
+ *  0x1 : No Babble Error Interrupt Mask
+ */
+#define USB_BBLEERRMSK    (BIT(12))
+#define USB_BBLEERRMSK_M  (USB_BBLEERRMSK_V << USB_BBLEERRMSK_S)
+#define USB_BBLEERRMSK_V  0x00000001
+#define USB_BBLEERRMSK_S  12
+/** USB_NAKMSK : R/W; bitpos: [13]; default: 0;
+ *  0x0 : Mask NAK Interrupt
+ *  0x1 : No NAK Interrupt Mask
+ */
+#define USB_NAKMSK    (BIT(13))
+#define USB_NAKMSK_M  (USB_NAKMSK_V << USB_NAKMSK_S)
+#define USB_NAKMSK_V  0x00000001
+#define USB_NAKMSK_S  13
+/** USB_NYETMSK : R/W; bitpos: [14]; default: 0;
+ *  NYET interrupt Mask
+ *  0x0 : Mask NYET Interrupt
+ *  0x1 : No NYET Interrupt Mask
+ */
+#define USB_NYETMSK    (BIT(14))
+#define USB_NYETMSK_M  (USB_NYETMSK_V << USB_NYETMSK_S)
+#define USB_NYETMSK_V  0x00000001
+#define USB_NYETMSK_S  14
+
+
+/** USB_DAINT_REG register
+ *  Device All Endpoints Interrupt Register
+ */
+#define USB_DAINT_REG (SOC_DPORT_USB_BASE + 0x818)
+/** USB_INEPINT0 : RO; bitpos: [0]; default: 0;
+ *  IN Endpoint 0 Interrupt Bit.
+ */
+#define USB_INEPINT0    (BIT(0))
+#define USB_INEPINT0_M  (USB_INEPINT0_V << USB_INEPINT0_S)
+#define USB_INEPINT0_V  0x00000001
+#define USB_INEPINT0_S  0
+/** USB_INEPINT1 : RO; bitpos: [1]; default: 0;
+ *  IN Endpoint 1 Interrupt Bit.
+ */
+#define USB_INEPINT1    (BIT(1))
+#define USB_INEPINT1_M  (USB_INEPINT1_V << USB_INEPINT1_S)
+#define USB_INEPINT1_V  0x00000001
+#define USB_INEPINT1_S  1
+/** USB_INEPINT2 : RO; bitpos: [2]; default: 0;
+ *  IN Endpoint 2 Interrupt Bit.
+ */
+#define USB_INEPINT2    (BIT(2))
+#define USB_INEPINT2_M  (USB_INEPINT2_V << USB_INEPINT2_S)
+#define USB_INEPINT2_V  0x00000001
+#define USB_INEPINT2_S  2
+/** USB_INEPINT3 : RO; bitpos: [3]; default: 0;
+ *  IN Endpoint 3 Interrupt Bit.
+ */
+#define USB_INEPINT3    (BIT(3))
+#define USB_INEPINT3_M  (USB_INEPINT3_V << USB_INEPINT3_S)
+#define USB_INEPINT3_V  0x00000001
+#define USB_INEPINT3_S  3
+/** USB_INEPINT4 : RO; bitpos: [4]; default: 0;
+ *  IN Endpoint 4 Interrupt Bit.
+ */
+#define USB_INEPINT4    (BIT(4))
+#define USB_INEPINT4_M  (USB_INEPINT4_V << USB_INEPINT4_S)
+#define USB_INEPINT4_V  0x00000001
+#define USB_INEPINT4_S  4
+/** USB_INEPINT5 : RO; bitpos: [5]; default: 0;
+ *  IN Endpoint 5 Interrupt Bit.
+ */
+#define USB_INEPINT5    (BIT(5))
+#define USB_INEPINT5_M  (USB_INEPINT5_V << USB_INEPINT5_S)
+#define USB_INEPINT5_V  0x00000001
+#define USB_INEPINT5_S  5
+/** USB_INEPINT6 : RO; bitpos: [6]; default: 0;
+ *  IN Endpoint 6 Interrupt Bit.
+ */
+#define USB_INEPINT6    (BIT(6))
+#define USB_INEPINT6_M  (USB_INEPINT6_V << USB_INEPINT6_S)
+#define USB_INEPINT6_V  0x00000001
+#define USB_INEPINT6_S  6
+/** USB_OUTEPINT0 : RO; bitpos: [16]; default: 0;
+ *  OUT Endpoint 0 Interrupt Bit.
+ */
+#define USB_OUTEPINT0    (BIT(16))
+#define USB_OUTEPINT0_M  (USB_OUTEPINT0_V << USB_OUTEPINT0_S)
+#define USB_OUTEPINT0_V  0x00000001
+#define USB_OUTEPINT0_S  16
+/** USB_OUTEPINT1 : RO; bitpos: [17]; default: 0;
+ *  OUT Endpoint 1 Interrupt Bit.
+ */
+#define USB_OUTEPINT1    (BIT(17))
+#define USB_OUTEPINT1_M  (USB_OUTEPINT1_V << USB_OUTEPINT1_S)
+#define USB_OUTEPINT1_V  0x00000001
+#define USB_OUTEPINT1_S  17
+/** USB_OUTEPINT2 : RO; bitpos: [18]; default: 0;
+ *  OUT Endpoint 2 Interrupt Bit.
+ */
+#define USB_OUTEPINT2    (BIT(18))
+#define USB_OUTEPINT2_M  (USB_OUTEPINT2_V << USB_OUTEPINT2_S)
+#define USB_OUTEPINT2_V  0x00000001
+#define USB_OUTEPINT2_S  18
+/** USB_OUTEPINT3 : RO; bitpos: [19]; default: 0;
+ *  OUT Endpoint 3 Interrupt Bit.
+ */
+#define USB_OUTEPINT3    (BIT(19))
+#define USB_OUTEPINT3_M  (USB_OUTEPINT3_V << USB_OUTEPINT3_S)
+#define USB_OUTEPINT3_V  0x00000001
+#define USB_OUTEPINT3_S  19
+/** USB_OUTEPINT4 : RO; bitpos: [20]; default: 0;
+ *  OUT Endpoint 4 Interrupt Bit.
+ */
+#define USB_OUTEPINT4    (BIT(20))
+#define USB_OUTEPINT4_M  (USB_OUTEPINT4_V << USB_OUTEPINT4_S)
+#define USB_OUTEPINT4_V  0x00000001
+#define USB_OUTEPINT4_S  20
+/** USB_OUTEPINT5 : RO; bitpos: [21]; default: 0;
+ *  OUT Endpoint 5 Interrupt Bit.
+ */
+#define USB_OUTEPINT5    (BIT(21))
+#define USB_OUTEPINT5_M  (USB_OUTEPINT5_V << USB_OUTEPINT5_S)
+#define USB_OUTEPINT5_V  0x00000001
+#define USB_OUTEPINT5_S  21
+/** USB_OUTEPINT6 : RO; bitpos: [22]; default: 0;
+ *  OUT Endpoint 6 Interrupt Bit.
+ */
+#define USB_OUTEPINT6    (BIT(22))
+#define USB_OUTEPINT6_M  (USB_OUTEPINT6_V << USB_OUTEPINT6_S)
+#define USB_OUTEPINT6_V  0x00000001
+#define USB_OUTEPINT6_S  22
+
+
+/** USB_DAINTMSK_REG register
+ *  Device All Endpoints Interrupt Mask Register
+ */
+#define USB_DAINTMSK_REG (SOC_DPORT_USB_BASE + 0x81c)
+/** USB_INEPMSK0 : R/W; bitpos: [0]; default: 0;
+ *  IN Endpoint 0 Interrupt mask Bit.
+ */
+#define USB_INEPMSK0    (BIT(0))
+#define USB_INEPMSK0_M  (USB_INEPMSK0_V << USB_INEPMSK0_S)
+#define USB_INEPMSK0_V  0x00000001
+#define USB_INEPMSK0_S  0
+/** USB_INEPMSK1 : R/W; bitpos: [1]; default: 0;
+ *  IN Endpoint 1 Interrupt mask Bit.
+ */
+#define USB_INEPMSK1    (BIT(1))
+#define USB_INEPMSK1_M  (USB_INEPMSK1_V << USB_INEPMSK1_S)
+#define USB_INEPMSK1_V  0x00000001
+#define USB_INEPMSK1_S  1
+/** USB_INEPMSK2 : R/W; bitpos: [2]; default: 0;
+ *  IN Endpoint 2 Interrupt mask Bit.
+ */
+#define USB_INEPMSK2    (BIT(2))
+#define USB_INEPMSK2_M  (USB_INEPMSK2_V << USB_INEPMSK2_S)
+#define USB_INEPMSK2_V  0x00000001
+#define USB_INEPMSK2_S  2
+/** USB_INEPMSK3 : R/W; bitpos: [3]; default: 0;
+ *  IN Endpoint 3 Interrupt mask Bit.
+ */
+#define USB_INEPMSK3    (BIT(3))
+#define USB_INEPMSK3_M  (USB_INEPMSK3_V << USB_INEPMSK3_S)
+#define USB_INEPMSK3_V  0x00000001
+#define USB_INEPMSK3_S  3
+/** USB_INEPMSK4 : R/W; bitpos: [4]; default: 0;
+ *  IN Endpoint 4 Interrupt mask Bit.
+ */
+#define USB_INEPMSK4    (BIT(4))
+#define USB_INEPMSK4_M  (USB_INEPMSK4_V << USB_INEPMSK4_S)
+#define USB_INEPMSK4_V  0x00000001
+#define USB_INEPMSK4_S  4
+/** USB_INEPMSK5 : R/W; bitpos: [5]; default: 0;
+ *  IN Endpoint 5 Interrupt mask Bit.
+ */
+#define USB_INEPMSK5    (BIT(5))
+#define USB_INEPMSK5_M  (USB_INEPMSK5_V << USB_INEPMSK5_S)
+#define USB_INEPMSK5_V  0x00000001
+#define USB_INEPMSK5_S  5
+/** USB_INEPMSK6 : R/W; bitpos: [6]; default: 0;
+ *  IN Endpoint 6 Interrupt mask Bit.
+ */
+#define USB_INEPMSK6    (BIT(6))
+#define USB_INEPMSK6_M  (USB_INEPMSK6_V << USB_INEPMSK6_S)
+#define USB_INEPMSK6_V  0x00000001
+#define USB_INEPMSK6_S  6
+/** USB_OUTEPMSK0 : R/W; bitpos: [16]; default: 0;
+ *  OUT Endpoint 0 Interrupt mask Bit.
+ */
+#define USB_OUTEPMSK0    (BIT(16))
+#define USB_OUTEPMSK0_M  (USB_OUTEPMSK0_V << USB_OUTEPMSK0_S)
+#define USB_OUTEPMSK0_V  0x00000001
+#define USB_OUTEPMSK0_S  16
+/** USB_OUTEPMSK1 : R/W; bitpos: [17]; default: 0;
+ *  OUT Endpoint 1 Interrupt mask Bit.
+ */
+#define USB_OUTEPMSK1    (BIT(17))
+#define USB_OUTEPMSK1_M  (USB_OUTEPMSK1_V << USB_OUTEPMSK1_S)
+#define USB_OUTEPMSK1_V  0x00000001
+#define USB_OUTEPMSK1_S  17
+/** USB_OUTEPMSK2 : R/W; bitpos: [18]; default: 0;
+ *  OUT Endpoint 2 Interrupt mask Bit.
+ */
+#define USB_OUTEPMSK2    (BIT(18))
+#define USB_OUTEPMSK2_M  (USB_OUTEPMSK2_V << USB_OUTEPMSK2_S)
+#define USB_OUTEPMSK2_V  0x00000001
+#define USB_OUTEPMSK2_S  18
+/** USB_OUTEPMSK3 : R/W; bitpos: [19]; default: 0;
+ *  OUT Endpoint 3 Interrupt mask Bit.
+ */
+#define USB_OUTEPMSK3    (BIT(19))
+#define USB_OUTEPMSK3_M  (USB_OUTEPMSK3_V << USB_OUTEPMSK3_S)
+#define USB_OUTEPMSK3_V  0x00000001
+#define USB_OUTEPMSK3_S  19
+/** USB_OUTEPMSK4 : R/W; bitpos: [20]; default: 0;
+ *  OUT Endpoint 4 Interrupt mask Bit.
+ */
+#define USB_OUTEPMSK4    (BIT(20))
+#define USB_OUTEPMSK4_M  (USB_OUTEPMSK4_V << USB_OUTEPMSK4_S)
+#define USB_OUTEPMSK4_V  0x00000001
+#define USB_OUTEPMSK4_S  20
+/** USB_OUTEPMSK5 : R/W; bitpos: [21]; default: 0;
+ *  OUT Endpoint 5 Interrupt mask Bit.
+ */
+#define USB_OUTEPMSK5    (BIT(21))
+#define USB_OUTEPMSK5_M  (USB_OUTEPMSK5_V << USB_OUTEPMSK5_S)
+#define USB_OUTEPMSK5_V  0x00000001
+#define USB_OUTEPMSK5_S  21
+/** USB_OUTEPMSK6 : R/W; bitpos: [22]; default: 0;
+ *  OUT Endpoint 6 Interrupt mask Bit.
+ */
+#define USB_OUTEPMSK6    (BIT(22))
+#define USB_OUTEPMSK6_M  (USB_OUTEPMSK6_V << USB_OUTEPMSK6_S)
+#define USB_OUTEPMSK6_V  0x00000001
+#define USB_OUTEPMSK6_S  22
+
+
+/** USB_DIEPEMPMSK_REG register
+ *  Device IN Endpoint FIFO Empty Interrupt Mask Register
+ */
+#define USB_DIEPEMPMSK_REG (SOC_DPORT_USB_BASE + 0x834)
+/** USB_D_INEPTXFEMPMSK : R/W; bitpos: [16:0]; default: 0;
+ *  IN EP Tx FIFO Empty Interrupt Mask Bits
+ *  0x1 (EP0_MASK): Mask IN EP0 Tx FIFO Empty Interrupt
+ *  0x2 (EP1_MASK): Mask IN EP1 Tx FIFO Empty Interrupt
+ *  0x4 (EP2_MASK): Mask IN EP2 Tx FIFO Empty Interrupt
+ *  0x8 (EP3_MASK): Mask IN EP3 Tx FIFO Empty Interrupt
+ *  0x10 (EP4_MASK): Mask IN EP4 Tx FIFO Empty Interrupt
+ *  0x20 (EP5_MASK): Mask IN EP5 Tx FIFO Empty Interrupt
+ *  0x40 (EP6_MASK): Mask IN EP6 Tx FIFO Empty Interrupt
+ *  0x80 (EP7_MASK): Mask IN EP7 Tx FIFO Empty Interrupt
+ *  0x100 (EP8_MASK): Mask IN EP8 Tx FIFO Empty Interrupt
+ *  0x200 (EP9_MASK): Mask IN EP9 Tx FIFO Empty Interrupt
+ *  0x400 (EP10_MASK): Mask IN EP10 Tx FIFO Empty Interrupt
+ *  0x800 (EP11_MASK): Mask IN EP11 Tx FIFO Empty Interrupt
+ *  0x1000 (EP12_MASK): Mask IN EP12 Tx FIFO Empty Interrupt
+ *  0x2000 (EP13_MASK): Mask IN EP13 Tx FIFO Empty Interrupt
+ *  0x4000 (EP14_MASK): Mask IN EP14 Tx FIFO Empty Interrupt
+ *  0x8000 (EP15_MASK): Mask IN EP15 Tx FIFO Empty Interrupt
+ */
+#define USB_D_INEPTXFEMPMSK    0x0000FFFF
+#define USB_D_INEPTXFEMPMSK_M  (USB_D_INEPTXFEMPMSK_V << USB_D_INEPTXFEMPMSK_S)
+#define USB_D_INEPTXFEMPMSK_V  0x0000FFFF
+#define USB_D_INEPTXFEMPMSK_S  0
+
+
+/** USB_DIEPINT0_REG register
+ *  Device IN Endpoint 0 Interrupt Register
+ */
+#define USB_DIEPINT0_REG (SOC_DPORT_USB_BASE + 0x908)
+/** USB_D_XFERCOMPL0 : R/W1C; bitpos: [0]; default: 0;
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Completed Interrupt
+ */
+#define USB_D_XFERCOMPL0    (BIT(0))
+#define USB_D_XFERCOMPL0_M  (USB_D_XFERCOMPL0_V << USB_D_XFERCOMPL0_S)
+#define USB_D_XFERCOMPL0_V  0x00000001
+#define USB_D_XFERCOMPL0_S  0
+/** USB_D_EPDISBLD0 : R/W1C; bitpos: [1]; default: 0;
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_D_EPDISBLD0    (BIT(1))
+#define USB_D_EPDISBLD0_M  (USB_D_EPDISBLD0_V << USB_D_EPDISBLD0_S)
+#define USB_D_EPDISBLD0_V  0x00000001
+#define USB_D_EPDISBLD0_S  1
+/** USB_D_AHBERR0 : R/W1C; bitpos: [2]; default: 0;
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_D_AHBERR0    (BIT(2))
+#define USB_D_AHBERR0_M  (USB_D_AHBERR0_V << USB_D_AHBERR0_S)
+#define USB_D_AHBERR0_V  0x00000001
+#define USB_D_AHBERR0_S  2
+/** USB_D_TIMEOUT0 : R/W1C; bitpos: [3]; default: 0;
+ *  0x0 : No Timeout interrupt
+ *  0x1 : Timeout interrupt
+ */
+#define USB_D_TIMEOUT0    (BIT(3))
+#define USB_D_TIMEOUT0_M  (USB_D_TIMEOUT0_V << USB_D_TIMEOUT0_S)
+#define USB_D_TIMEOUT0_V  0x00000001
+#define USB_D_TIMEOUT0_S  3
+/** USB_D_INTKNTXFEMP0 : R/W1C; bitpos: [4]; default: 0;
+ *  0x0 : No IN Token Received when TxFIFO Empty Interrupt
+ *  0x1 : IN Token Received when TxFIFO Empty Interrupt
+ */
+#define USB_D_INTKNTXFEMP0    (BIT(4))
+#define USB_D_INTKNTXFEMP0_M  (USB_D_INTKNTXFEMP0_V << USB_D_INTKNTXFEMP0_S)
+#define USB_D_INTKNTXFEMP0_V  0x00000001
+#define USB_D_INTKNTXFEMP0_S  4
+/** USB_D_INTKNEPMIS0 : R/W1C; bitpos: [5]; default: 0;
+ *  0x0 : No IN Token Received with EP Mismatch Interrupt
+ *  0x1 : IN Token Received with EP Mismatch interrupt
+ */
+#define USB_D_INTKNEPMIS0    (BIT(5))
+#define USB_D_INTKNEPMIS0_M  (USB_D_INTKNEPMIS0_V << USB_D_INTKNEPMIS0_S)
+#define USB_D_INTKNEPMIS0_V  0x00000001
+#define USB_D_INTKNEPMIS0_S  5
+/** USB_D_INEPNAKEFF0 : R/W1C; bitpos: [6]; default: 0;
+ *  IN Endpoint NAK Effective
+ *  0x0 : No IN Endpoint NAK Effective interrupt
+ *  0x1 : IN Endpoint NAK Effective interrupt
+ */
+#define USB_D_INEPNAKEFF0    (BIT(6))
+#define USB_D_INEPNAKEFF0_M  (USB_D_INEPNAKEFF0_V << USB_D_INEPNAKEFF0_S)
+#define USB_D_INEPNAKEFF0_V  0x00000001
+#define USB_D_INEPNAKEFF0_S  6
+/** USB_D_TXFEMP0 : RO; bitpos: [7]; default: 0;
+ *  This interrupt is asserted when the TxFIFO for this endpoint is either half or
+ *  completely empty
+ *  0x0 : No Transmit FIFO Empty interrupt
+ *  0x1 : Transmit FIFO Empty interrupt
+ */
+#define USB_D_TXFEMP0    (BIT(7))
+#define USB_D_TXFEMP0_M  (USB_D_TXFEMP0_V << USB_D_TXFEMP0_S)
+#define USB_D_TXFEMP0_V  0x00000001
+#define USB_D_TXFEMP0_S  7
+/** USB_D_TXFIFOUNDRN0 : R/W1C; bitpos: [8]; default: 0;
+ *  The core generates this interrupt when it detects a transmit FIFO underrun
+ *  condition in threshold mode for this endpoint
+ *  0x0 : No Fifo Underrun interrupt
+ *  0x1 : Fifo Underrun interrupt
+ */
+#define USB_D_TXFIFOUNDRN0    (BIT(8))
+#define USB_D_TXFIFOUNDRN0_M  (USB_D_TXFIFOUNDRN0_V << USB_D_TXFIFOUNDRN0_S)
+#define USB_D_TXFIFOUNDRN0_V  0x00000001
+#define USB_D_TXFIFOUNDRN0_S  8
+/** USB_D_BNAINTR0 : R/W1C; bitpos: [9]; default: 0;
+ *  This bit is valid only when Scatter/Gather DMA mode is enabled. The core generates
+ *  this interrupt when the descriptor accessed is not ready for the Core to process,
+ *  such as Host busy or DMA done
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_D_BNAINTR0    (BIT(9))
+#define USB_D_BNAINTR0_M  (USB_D_BNAINTR0_V << USB_D_BNAINTR0_S)
+#define USB_D_BNAINTR0_V  0x00000001
+#define USB_D_BNAINTR0_S  9
+/** USB_D_PKTDRPSTS0 : R/W1C; bitpos: [11]; default: 0;
+ *  Packet Drop Status. This bit indicates to the application that an ISOC OUT packet
+ *  has been dropped. This bit does not have an associated mask bit and does not
+ *  generate an interrupt
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status
+ */
+#define USB_D_PKTDRPSTS0    (BIT(11))
+#define USB_D_PKTDRPSTS0_M  (USB_D_PKTDRPSTS0_V << USB_D_PKTDRPSTS0_S)
+#define USB_D_PKTDRPSTS0_V  0x00000001
+#define USB_D_PKTDRPSTS0_S  11
+/** USB_D_BBLEERR0 : R/W1C; bitpos: [12]; default: 0;
+ *  The core generates this interrupt when babble is received for the endpoint
+ *  0x0 : No interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_D_BBLEERR0    (BIT(12))
+#define USB_D_BBLEERR0_M  (USB_D_BBLEERR0_V << USB_D_BBLEERR0_S)
+#define USB_D_BBLEERR0_V  0x00000001
+#define USB_D_BBLEERR0_S  12
+/** USB_D_NAKINTRPT0 : R/W1C; bitpos: [13]; default: 0;
+ *  NAK Interrupt. The core generates this interrupt when a NAK is transmitted or
+ *  received by the device
+ *  0x0 : No interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_D_NAKINTRPT0    (BIT(13))
+#define USB_D_NAKINTRPT0_M  (USB_D_NAKINTRPT0_V << USB_D_NAKINTRPT0_S)
+#define USB_D_NAKINTRPT0_V  0x00000001
+#define USB_D_NAKINTRPT0_S  13
+/** USB_D_NYETINTRPT0 : R/W1C; bitpos: [14]; default: 0;
+ *  NYET Interrupt. The core generates this interrupt when a NYET response is
+ *  transmitted for a non isochronous OUT endpoint
+ *  0x0 : No interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_D_NYETINTRPT0    (BIT(14))
+#define USB_D_NYETINTRPT0_M  (USB_D_NYETINTRPT0_V << USB_D_NYETINTRPT0_S)
+#define USB_D_NYETINTRPT0_V  0x00000001
+#define USB_D_NYETINTRPT0_S  14
+
+
+/** USB_DIEPINT1_REG register
+ *  Device IN Endpoint 1 Interrupt Register
+ */
+#define USB_DIEPINT1_REG (SOC_DPORT_USB_BASE + 0x928)
+/** USB_D_XFERCOMPL1 : R/W1C; bitpos: [0]; default: 0;
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Completed Interrupt
+ */
+#define USB_D_XFERCOMPL1    (BIT(0))
+#define USB_D_XFERCOMPL1_M  (USB_D_XFERCOMPL1_V << USB_D_XFERCOMPL1_S)
+#define USB_D_XFERCOMPL1_V  0x00000001
+#define USB_D_XFERCOMPL1_S  0
+/** USB_D_EPDISBLD1 : R/W1C; bitpos: [1]; default: 0;
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_D_EPDISBLD1    (BIT(1))
+#define USB_D_EPDISBLD1_M  (USB_D_EPDISBLD1_V << USB_D_EPDISBLD1_S)
+#define USB_D_EPDISBLD1_V  0x00000001
+#define USB_D_EPDISBLD1_S  1
+/** USB_D_AHBERR1 : R/W1C; bitpos: [2]; default: 0;
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_D_AHBERR1    (BIT(2))
+#define USB_D_AHBERR1_M  (USB_D_AHBERR1_V << USB_D_AHBERR1_S)
+#define USB_D_AHBERR1_V  0x00000001
+#define USB_D_AHBERR1_S  2
+/** USB_D_TIMEOUT1 : R/W1C; bitpos: [3]; default: 0;
+ *  0x0 : No Timeout interrupt
+ *  0x1 : Timeout interrupt
+ */
+#define USB_D_TIMEOUT1    (BIT(3))
+#define USB_D_TIMEOUT1_M  (USB_D_TIMEOUT1_V << USB_D_TIMEOUT1_S)
+#define USB_D_TIMEOUT1_V  0x00000001
+#define USB_D_TIMEOUT1_S  3
+/** USB_D_INTKNTXFEMP1 : R/W1C; bitpos: [4]; default: 0;
+ *  0x0 : No IN Token Received when TxFIFO Empty Interrupt
+ *  0x1 : IN Token Received when TxFIFO Empty Interrupt
+ */
+#define USB_D_INTKNTXFEMP1    (BIT(4))
+#define USB_D_INTKNTXFEMP1_M  (USB_D_INTKNTXFEMP1_V << USB_D_INTKNTXFEMP1_S)
+#define USB_D_INTKNTXFEMP1_V  0x00000001
+#define USB_D_INTKNTXFEMP1_S  4
+/** USB_D_INTKNEPMIS1 : R/W1C; bitpos: [5]; default: 0;
+ *  0x0 : No IN Token Received with EP Mismatch Interrupt
+ *  0x1 : IN Token Received with EP Mismatch interrupt
+ */
+#define USB_D_INTKNEPMIS1    (BIT(5))
+#define USB_D_INTKNEPMIS1_M  (USB_D_INTKNEPMIS1_V << USB_D_INTKNEPMIS1_S)
+#define USB_D_INTKNEPMIS1_V  0x00000001
+#define USB_D_INTKNEPMIS1_S  5
+/** USB_D_INEPNAKEFF1 : R/W1C; bitpos: [6]; default: 0;
+ *  IN Endpoint NAK Effective
+ *  0x0 : No IN Endpoint NAK Effective interrupt
+ *  0x1 : IN Endpoint NAK Effective interrupt
+ */
+#define USB_D_INEPNAKEFF1    (BIT(6))
+#define USB_D_INEPNAKEFF1_M  (USB_D_INEPNAKEFF1_V << USB_D_INEPNAKEFF1_S)
+#define USB_D_INEPNAKEFF1_V  0x00000001
+#define USB_D_INEPNAKEFF1_S  6
+/** USB_D_TXFEMP1 : RO; bitpos: [7]; default: 0;
+ *  This interrupt is asserted when the TxFIFO for this endpoint is either half or
+ *  completely empty
+ *  0x0 : No Transmit FIFO Empty interrupt
+ *  0x1 : Transmit FIFO Empty interrupt
+ */
+#define USB_D_TXFEMP1    (BIT(7))
+#define USB_D_TXFEMP1_M  (USB_D_TXFEMP1_V << USB_D_TXFEMP1_S)
+#define USB_D_TXFEMP1_V  0x00000001
+#define USB_D_TXFEMP1_S  7
+/** USB_D_TXFIFOUNDRN1 : R/W1C; bitpos: [8]; default: 0;
+ *  The core generates this interrupt when it detects a transmit FIFO underrun
+ *  condition in threshold mode for this endpoint
+ *  0x0 : No Fifo Underrun interrupt
+ *  0x1 : Fifo Underrun interrupt
+ */
+#define USB_D_TXFIFOUNDRN1    (BIT(8))
+#define USB_D_TXFIFOUNDRN1_M  (USB_D_TXFIFOUNDRN1_V << USB_D_TXFIFOUNDRN1_S)
+#define USB_D_TXFIFOUNDRN1_V  0x00000001
+#define USB_D_TXFIFOUNDRN1_S  8
+/** USB_D_BNAINTR1 : R/W1C; bitpos: [9]; default: 0;
+ *  This bit is valid only when Scatter/Gather DMA mode is enabled. The core generates
+ *  this interrupt when the descriptor accessed is not ready for the Core to process,
+ *  such as Host busy or DMA done
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_D_BNAINTR1    (BIT(9))
+#define USB_D_BNAINTR1_M  (USB_D_BNAINTR1_V << USB_D_BNAINTR1_S)
+#define USB_D_BNAINTR1_V  0x00000001
+#define USB_D_BNAINTR1_S  9
+/** USB_D_PKTDRPSTS1 : R/W1C; bitpos: [11]; default: 0;
+ *  Packet Drop Status. This bit indicates to the application that an ISOC OUT packet
+ *  has been dropped. This bit does not have an associated mask bit and does not
+ *  generate an interrupt
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status
+ */
+#define USB_D_PKTDRPSTS1    (BIT(11))
+#define USB_D_PKTDRPSTS1_M  (USB_D_PKTDRPSTS1_V << USB_D_PKTDRPSTS1_S)
+#define USB_D_PKTDRPSTS1_V  0x00000001
+#define USB_D_PKTDRPSTS1_S  11
+/** USB_D_BBLEERR1 : R/W1C; bitpos: [12]; default: 0;
+ *  The core generates this interrupt when babble is received for the endpoint
+ *  0x0 : No interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_D_BBLEERR1    (BIT(12))
+#define USB_D_BBLEERR1_M  (USB_D_BBLEERR1_V << USB_D_BBLEERR1_S)
+#define USB_D_BBLEERR1_V  0x00000001
+#define USB_D_BBLEERR1_S  12
+/** USB_D_NAKINTRPT1 : R/W1C; bitpos: [13]; default: 0;
+ *  NAK Interrupt. The core generates this interrupt when a NAK is transmitted or
+ *  received by the device
+ *  0x0 : No interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_D_NAKINTRPT1    (BIT(13))
+#define USB_D_NAKINTRPT1_M  (USB_D_NAKINTRPT1_V << USB_D_NAKINTRPT1_S)
+#define USB_D_NAKINTRPT1_V  0x00000001
+#define USB_D_NAKINTRPT1_S  13
+/** USB_D_NYETINTRPT1 : R/W1C; bitpos: [14]; default: 0;
+ *  NYET Interrupt. The core generates this interrupt when a NYET response is
+ *  transmitted for a non isochronous OUT endpoint
+ *  0x0 : No interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_D_NYETINTRPT1    (BIT(14))
+#define USB_D_NYETINTRPT1_M  (USB_D_NYETINTRPT1_V << USB_D_NYETINTRPT1_S)
+#define USB_D_NYETINTRPT1_V  0x00000001
+#define USB_D_NYETINTRPT1_S  14
+
+
+/** USB_DIEPINT2_REG register
+ *  Device IN Endpoint 2 Interrupt Register
+ */
+#define USB_DIEPINT2_REG (SOC_DPORT_USB_BASE + 0x948)
+/** USB_D_XFERCOMPL2 : R/W1C; bitpos: [0]; default: 0;
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Completed Interrupt
+ */
+#define USB_D_XFERCOMPL2    (BIT(0))
+#define USB_D_XFERCOMPL2_M  (USB_D_XFERCOMPL2_V << USB_D_XFERCOMPL2_S)
+#define USB_D_XFERCOMPL2_V  0x00000001
+#define USB_D_XFERCOMPL2_S  0
+/** USB_D_EPDISBLD2 : R/W1C; bitpos: [1]; default: 0;
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_D_EPDISBLD2    (BIT(1))
+#define USB_D_EPDISBLD2_M  (USB_D_EPDISBLD2_V << USB_D_EPDISBLD2_S)
+#define USB_D_EPDISBLD2_V  0x00000001
+#define USB_D_EPDISBLD2_S  1
+/** USB_D_AHBERR2 : R/W1C; bitpos: [2]; default: 0;
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_D_AHBERR2    (BIT(2))
+#define USB_D_AHBERR2_M  (USB_D_AHBERR2_V << USB_D_AHBERR2_S)
+#define USB_D_AHBERR2_V  0x00000001
+#define USB_D_AHBERR2_S  2
+/** USB_D_TIMEOUT2 : R/W1C; bitpos: [3]; default: 0;
+ *  0x0 : No Timeout interrupt
+ *  0x1 : Timeout interrupt
+ */
+#define USB_D_TIMEOUT2    (BIT(3))
+#define USB_D_TIMEOUT2_M  (USB_D_TIMEOUT2_V << USB_D_TIMEOUT2_S)
+#define USB_D_TIMEOUT2_V  0x00000001
+#define USB_D_TIMEOUT2_S  3
+/** USB_D_INTKNTXFEMP2 : R/W1C; bitpos: [4]; default: 0;
+ *  0x0 : No IN Token Received when TxFIFO Empty Interrupt
+ *  0x1 : IN Token Received when TxFIFO Empty Interrupt
+ */
+#define USB_D_INTKNTXFEMP2    (BIT(4))
+#define USB_D_INTKNTXFEMP2_M  (USB_D_INTKNTXFEMP2_V << USB_D_INTKNTXFEMP2_S)
+#define USB_D_INTKNTXFEMP2_V  0x00000001
+#define USB_D_INTKNTXFEMP2_S  4
+/** USB_D_INTKNEPMIS2 : R/W1C; bitpos: [5]; default: 0;
+ *  0x0 : No IN Token Received with EP Mismatch Interrupt
+ *  0x1 : IN Token Received with EP Mismatch interrupt
+ */
+#define USB_D_INTKNEPMIS2    (BIT(5))
+#define USB_D_INTKNEPMIS2_M  (USB_D_INTKNEPMIS2_V << USB_D_INTKNEPMIS2_S)
+#define USB_D_INTKNEPMIS2_V  0x00000001
+#define USB_D_INTKNEPMIS2_S  5
+/** USB_D_INEPNAKEFF2 : R/W1C; bitpos: [6]; default: 0;
+ *  IN Endpoint NAK Effective
+ *  0x0 : No IN Endpoint NAK Effective interrupt
+ *  0x1 : IN Endpoint NAK Effective interrupt
+ */
+#define USB_D_INEPNAKEFF2    (BIT(6))
+#define USB_D_INEPNAKEFF2_M  (USB_D_INEPNAKEFF2_V << USB_D_INEPNAKEFF2_S)
+#define USB_D_INEPNAKEFF2_V  0x00000001
+#define USB_D_INEPNAKEFF2_S  6
+/** USB_D_TXFEMP2 : RO; bitpos: [7]; default: 0;
+ *  This interrupt is asserted when the TxFIFO for this endpoint is either half or
+ *  completely empty
+ *  0x0 : No Transmit FIFO Empty interrupt
+ *  0x1 : Transmit FIFO Empty interrupt
+ */
+#define USB_D_TXFEMP2    (BIT(7))
+#define USB_D_TXFEMP2_M  (USB_D_TXFEMP2_V << USB_D_TXFEMP2_S)
+#define USB_D_TXFEMP2_V  0x00000001
+#define USB_D_TXFEMP2_S  7
+/** USB_D_TXFIFOUNDRN2 : R/W1C; bitpos: [8]; default: 0;
+ *  The core generates this interrupt when it detects a transmit FIFO underrun
+ *  condition in threshold mode for this endpoint
+ *  0x0 : No Fifo Underrun interrupt
+ *  0x1 : Fifo Underrun interrupt
+ */
+#define USB_D_TXFIFOUNDRN2    (BIT(8))
+#define USB_D_TXFIFOUNDRN2_M  (USB_D_TXFIFOUNDRN2_V << USB_D_TXFIFOUNDRN2_S)
+#define USB_D_TXFIFOUNDRN2_V  0x00000001
+#define USB_D_TXFIFOUNDRN2_S  8
+/** USB_D_BNAINTR2 : R/W1C; bitpos: [9]; default: 0;
+ *  This bit is valid only when Scatter/Gather DMA mode is enabled. The core generates
+ *  this interrupt when the descriptor accessed is not ready for the Core to process,
+ *  such as Host busy or DMA done
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_D_BNAINTR2    (BIT(9))
+#define USB_D_BNAINTR2_M  (USB_D_BNAINTR2_V << USB_D_BNAINTR2_S)
+#define USB_D_BNAINTR2_V  0x00000001
+#define USB_D_BNAINTR2_S  9
+/** USB_D_PKTDRPSTS2 : R/W1C; bitpos: [11]; default: 0;
+ *  Packet Drop Status. This bit indicates to the application that an ISOC OUT packet
+ *  has been dropped. This bit does not have an associated mask bit and does not
+ *  generate an interrupt
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status
+ */
+#define USB_D_PKTDRPSTS2    (BIT(11))
+#define USB_D_PKTDRPSTS2_M  (USB_D_PKTDRPSTS2_V << USB_D_PKTDRPSTS2_S)
+#define USB_D_PKTDRPSTS2_V  0x00000001
+#define USB_D_PKTDRPSTS2_S  11
+/** USB_D_BBLEERR2 : R/W1C; bitpos: [12]; default: 0;
+ *  The core generates this interrupt when babble is received for the endpoint
+ *  0x0 : No interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_D_BBLEERR2    (BIT(12))
+#define USB_D_BBLEERR2_M  (USB_D_BBLEERR2_V << USB_D_BBLEERR2_S)
+#define USB_D_BBLEERR2_V  0x00000001
+#define USB_D_BBLEERR2_S  12
+/** USB_D_NAKINTRPT2 : R/W1C; bitpos: [13]; default: 0;
+ *  NAK Interrupt. The core generates this interrupt when a NAK is transmitted or
+ *  received by the device
+ *  0x0 : No interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_D_NAKINTRPT2    (BIT(13))
+#define USB_D_NAKINTRPT2_M  (USB_D_NAKINTRPT2_V << USB_D_NAKINTRPT2_S)
+#define USB_D_NAKINTRPT2_V  0x00000001
+#define USB_D_NAKINTRPT2_S  13
+/** USB_D_NYETINTRPT2 : R/W1C; bitpos: [14]; default: 0;
+ *  NYET Interrupt. The core generates this interrupt when a NYET response is
+ *  transmitted for a non isochronous OUT endpoint
+ *  0x0 : No interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_D_NYETINTRPT2    (BIT(14))
+#define USB_D_NYETINTRPT2_M  (USB_D_NYETINTRPT2_V << USB_D_NYETINTRPT2_S)
+#define USB_D_NYETINTRPT2_V  0x00000001
+#define USB_D_NYETINTRPT2_S  14
+
+
+/** USB_DIEPINT3_REG register
+ *  Device IN Endpoint 3 Interrupt Register
+ */
+#define USB_DIEPINT3_REG (SOC_DPORT_USB_BASE + 0x968)
+/** USB_D_XFERCOMPL3 : R/W1C; bitpos: [0]; default: 0;
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Completed Interrupt
+ */
+#define USB_D_XFERCOMPL3    (BIT(0))
+#define USB_D_XFERCOMPL3_M  (USB_D_XFERCOMPL3_V << USB_D_XFERCOMPL3_S)
+#define USB_D_XFERCOMPL3_V  0x00000001
+#define USB_D_XFERCOMPL3_S  0
+/** USB_D_EPDISBLD3 : R/W1C; bitpos: [1]; default: 0;
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_D_EPDISBLD3    (BIT(1))
+#define USB_D_EPDISBLD3_M  (USB_D_EPDISBLD3_V << USB_D_EPDISBLD3_S)
+#define USB_D_EPDISBLD3_V  0x00000001
+#define USB_D_EPDISBLD3_S  1
+/** USB_D_AHBERR3 : R/W1C; bitpos: [2]; default: 0;
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_D_AHBERR3    (BIT(2))
+#define USB_D_AHBERR3_M  (USB_D_AHBERR3_V << USB_D_AHBERR3_S)
+#define USB_D_AHBERR3_V  0x00000001
+#define USB_D_AHBERR3_S  2
+/** USB_D_TIMEOUT3 : R/W1C; bitpos: [3]; default: 0;
+ *  0x0 : No Timeout interrupt
+ *  0x1 : Timeout interrupt
+ */
+#define USB_D_TIMEOUT3    (BIT(3))
+#define USB_D_TIMEOUT3_M  (USB_D_TIMEOUT3_V << USB_D_TIMEOUT3_S)
+#define USB_D_TIMEOUT3_V  0x00000001
+#define USB_D_TIMEOUT3_S  3
+/** USB_D_INTKNTXFEMP3 : R/W1C; bitpos: [4]; default: 0;
+ *  0x0 : No IN Token Received when TxFIFO Empty Interrupt
+ *  0x1 : IN Token Received when TxFIFO Empty Interrupt
+ */
+#define USB_D_INTKNTXFEMP3    (BIT(4))
+#define USB_D_INTKNTXFEMP3_M  (USB_D_INTKNTXFEMP3_V << USB_D_INTKNTXFEMP3_S)
+#define USB_D_INTKNTXFEMP3_V  0x00000001
+#define USB_D_INTKNTXFEMP3_S  4
+/** USB_D_INTKNEPMIS3 : R/W1C; bitpos: [5]; default: 0;
+ *  0x0 : No IN Token Received with EP Mismatch Interrupt
+ *  0x1 : IN Token Received with EP Mismatch interrupt
+ */
+#define USB_D_INTKNEPMIS3    (BIT(5))
+#define USB_D_INTKNEPMIS3_M  (USB_D_INTKNEPMIS3_V << USB_D_INTKNEPMIS3_S)
+#define USB_D_INTKNEPMIS3_V  0x00000001
+#define USB_D_INTKNEPMIS3_S  5
+/** USB_D_INEPNAKEFF3 : R/W1C; bitpos: [6]; default: 0;
+ *  IN Endpoint NAK Effective
+ *  0x0 : No IN Endpoint NAK Effective interrupt
+ *  0x1 : IN Endpoint NAK Effective interrupt
+ */
+#define USB_D_INEPNAKEFF3    (BIT(6))
+#define USB_D_INEPNAKEFF3_M  (USB_D_INEPNAKEFF3_V << USB_D_INEPNAKEFF3_S)
+#define USB_D_INEPNAKEFF3_V  0x00000001
+#define USB_D_INEPNAKEFF3_S  6
+/** USB_D_TXFEMP3 : RO; bitpos: [7]; default: 0;
+ *  This interrupt is asserted when the TxFIFO for this endpoint is either half or
+ *  completely empty
+ *  0x0 : No Transmit FIFO Empty interrupt
+ *  0x1 : Transmit FIFO Empty interrupt
+ */
+#define USB_D_TXFEMP3    (BIT(7))
+#define USB_D_TXFEMP3_M  (USB_D_TXFEMP3_V << USB_D_TXFEMP3_S)
+#define USB_D_TXFEMP3_V  0x00000001
+#define USB_D_TXFEMP3_S  7
+/** USB_D_TXFIFOUNDRN3 : R/W1C; bitpos: [8]; default: 0;
+ *  The core generates this interrupt when it detects a transmit FIFO underrun
+ *  condition in threshold mode for this endpoint
+ *  0x0 : No Fifo Underrun interrupt
+ *  0x1 : Fifo Underrun interrupt
+ */
+#define USB_D_TXFIFOUNDRN3    (BIT(8))
+#define USB_D_TXFIFOUNDRN3_M  (USB_D_TXFIFOUNDRN3_V << USB_D_TXFIFOUNDRN3_S)
+#define USB_D_TXFIFOUNDRN3_V  0x00000001
+#define USB_D_TXFIFOUNDRN3_S  8
+/** USB_D_BNAINTR3 : R/W1C; bitpos: [9]; default: 0;
+ *  This bit is valid only when Scatter/Gather DMA mode is enabled. The core generates
+ *  this interrupt when the descriptor accessed is not ready for the Core to process,
+ *  such as Host busy or DMA done
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_D_BNAINTR3    (BIT(9))
+#define USB_D_BNAINTR3_M  (USB_D_BNAINTR3_V << USB_D_BNAINTR3_S)
+#define USB_D_BNAINTR3_V  0x00000001
+#define USB_D_BNAINTR3_S  9
+/** USB_D_PKTDRPSTS3 : R/W1C; bitpos: [11]; default: 0;
+ *  Packet Drop Status. This bit indicates to the application that an ISOC OUT packet
+ *  has been dropped. This bit does not have an associated mask bit and does not
+ *  generate an interrupt
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status
+ */
+#define USB_D_PKTDRPSTS3    (BIT(11))
+#define USB_D_PKTDRPSTS3_M  (USB_D_PKTDRPSTS3_V << USB_D_PKTDRPSTS3_S)
+#define USB_D_PKTDRPSTS3_V  0x00000001
+#define USB_D_PKTDRPSTS3_S  11
+/** USB_D_BBLEERR3 : R/W1C; bitpos: [12]; default: 0;
+ *  The core generates this interrupt when babble is received for the endpoint
+ *  0x0 : No interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_D_BBLEERR3    (BIT(12))
+#define USB_D_BBLEERR3_M  (USB_D_BBLEERR3_V << USB_D_BBLEERR3_S)
+#define USB_D_BBLEERR3_V  0x00000001
+#define USB_D_BBLEERR3_S  12
+/** USB_D_NAKINTRPT3 : R/W1C; bitpos: [13]; default: 0;
+ *  NAK Interrupt. The core generates this interrupt when a NAK is transmitted or
+ *  received by the device
+ *  0x0 : No interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_D_NAKINTRPT3    (BIT(13))
+#define USB_D_NAKINTRPT3_M  (USB_D_NAKINTRPT3_V << USB_D_NAKINTRPT3_S)
+#define USB_D_NAKINTRPT3_V  0x00000001
+#define USB_D_NAKINTRPT3_S  13
+/** USB_D_NYETINTRPT3 : R/W1C; bitpos: [14]; default: 0;
+ *  NYET Interrupt. The core generates this interrupt when a NYET response is
+ *  transmitted for a non isochronous OUT endpoint
+ *  0x0 : No interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_D_NYETINTRPT3    (BIT(14))
+#define USB_D_NYETINTRPT3_M  (USB_D_NYETINTRPT3_V << USB_D_NYETINTRPT3_S)
+#define USB_D_NYETINTRPT3_V  0x00000001
+#define USB_D_NYETINTRPT3_S  14
+
+
+/** USB_DIEPINT4_REG register
+ *  Device IN Endpoint 4 Interrupt Register
+ */
+#define USB_DIEPINT4_REG (SOC_DPORT_USB_BASE + 0x988)
+/** USB_D_XFERCOMPL4 : R/W1C; bitpos: [0]; default: 0;
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Completed Interrupt
+ */
+#define USB_D_XFERCOMPL4    (BIT(0))
+#define USB_D_XFERCOMPL4_M  (USB_D_XFERCOMPL4_V << USB_D_XFERCOMPL4_S)
+#define USB_D_XFERCOMPL4_V  0x00000001
+#define USB_D_XFERCOMPL4_S  0
+/** USB_D_EPDISBLD4 : R/W1C; bitpos: [1]; default: 0;
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_D_EPDISBLD4    (BIT(1))
+#define USB_D_EPDISBLD4_M  (USB_D_EPDISBLD4_V << USB_D_EPDISBLD4_S)
+#define USB_D_EPDISBLD4_V  0x00000001
+#define USB_D_EPDISBLD4_S  1
+/** USB_D_AHBERR4 : R/W1C; bitpos: [2]; default: 0;
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_D_AHBERR4    (BIT(2))
+#define USB_D_AHBERR4_M  (USB_D_AHBERR4_V << USB_D_AHBERR4_S)
+#define USB_D_AHBERR4_V  0x00000001
+#define USB_D_AHBERR4_S  2
+/** USB_D_TIMEOUT4 : R/W1C; bitpos: [3]; default: 0;
+ *  0x0 : No Timeout interrupt
+ *  0x1 : Timeout interrupt
+ */
+#define USB_D_TIMEOUT4    (BIT(3))
+#define USB_D_TIMEOUT4_M  (USB_D_TIMEOUT4_V << USB_D_TIMEOUT4_S)
+#define USB_D_TIMEOUT4_V  0x00000001
+#define USB_D_TIMEOUT4_S  3
+/** USB_D_INTKNTXFEMP4 : R/W1C; bitpos: [4]; default: 0;
+ *  0x0 : No IN Token Received when TxFIFO Empty Interrupt
+ *  0x1 : IN Token Received when TxFIFO Empty Interrupt
+ */
+#define USB_D_INTKNTXFEMP4    (BIT(4))
+#define USB_D_INTKNTXFEMP4_M  (USB_D_INTKNTXFEMP4_V << USB_D_INTKNTXFEMP4_S)
+#define USB_D_INTKNTXFEMP4_V  0x00000001
+#define USB_D_INTKNTXFEMP4_S  4
+/** USB_D_INTKNEPMIS4 : R/W1C; bitpos: [5]; default: 0;
+ *  0x0 : No IN Token Received with EP Mismatch Interrupt
+ *  0x1 : IN Token Received with EP Mismatch interrupt
+ */
+#define USB_D_INTKNEPMIS4    (BIT(5))
+#define USB_D_INTKNEPMIS4_M  (USB_D_INTKNEPMIS4_V << USB_D_INTKNEPMIS4_S)
+#define USB_D_INTKNEPMIS4_V  0x00000001
+#define USB_D_INTKNEPMIS4_S  5
+/** USB_D_INEPNAKEFF4 : R/W1C; bitpos: [6]; default: 0;
+ *  IN Endpoint NAK Effective
+ *  0x0 : No IN Endpoint NAK Effective interrupt
+ *  0x1 : IN Endpoint NAK Effective interrupt
+ */
+#define USB_D_INEPNAKEFF4    (BIT(6))
+#define USB_D_INEPNAKEFF4_M  (USB_D_INEPNAKEFF4_V << USB_D_INEPNAKEFF4_S)
+#define USB_D_INEPNAKEFF4_V  0x00000001
+#define USB_D_INEPNAKEFF4_S  6
+/** USB_D_TXFEMP4 : RO; bitpos: [7]; default: 0;
+ *  This interrupt is asserted when the TxFIFO for this endpoint is either half or
+ *  completely empty
+ *  0x0 : No Transmit FIFO Empty interrupt
+ *  0x1 : Transmit FIFO Empty interrupt
+ */
+#define USB_D_TXFEMP4    (BIT(7))
+#define USB_D_TXFEMP4_M  (USB_D_TXFEMP4_V << USB_D_TXFEMP4_S)
+#define USB_D_TXFEMP4_V  0x00000001
+#define USB_D_TXFEMP4_S  7
+/** USB_D_TXFIFOUNDRN4 : R/W1C; bitpos: [8]; default: 0;
+ *  The core generates this interrupt when it detects a transmit FIFO underrun
+ *  condition in threshold mode for this endpoint
+ *  0x0 : No Fifo Underrun interrupt
+ *  0x1 : Fifo Underrun interrupt
+ */
+#define USB_D_TXFIFOUNDRN4    (BIT(8))
+#define USB_D_TXFIFOUNDRN4_M  (USB_D_TXFIFOUNDRN4_V << USB_D_TXFIFOUNDRN4_S)
+#define USB_D_TXFIFOUNDRN4_V  0x00000001
+#define USB_D_TXFIFOUNDRN4_S  8
+/** USB_D_BNAINTR4 : R/W1C; bitpos: [9]; default: 0;
+ *  This bit is valid only when Scatter/Gather DMA mode is enabled. The core generates
+ *  this interrupt when the descriptor accessed is not ready for the Core to process,
+ *  such as Host busy or DMA done
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_D_BNAINTR4    (BIT(9))
+#define USB_D_BNAINTR4_M  (USB_D_BNAINTR4_V << USB_D_BNAINTR4_S)
+#define USB_D_BNAINTR4_V  0x00000001
+#define USB_D_BNAINTR4_S  9
+/** USB_D_PKTDRPSTS4 : R/W1C; bitpos: [11]; default: 0;
+ *  Packet Drop Status. This bit indicates to the application that an ISOC OUT packet
+ *  has been dropped. This bit does not have an associated mask bit and does not
+ *  generate an interrupt
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status
+ */
+#define USB_D_PKTDRPSTS4    (BIT(11))
+#define USB_D_PKTDRPSTS4_M  (USB_D_PKTDRPSTS4_V << USB_D_PKTDRPSTS4_S)
+#define USB_D_PKTDRPSTS4_V  0x00000001
+#define USB_D_PKTDRPSTS4_S  11
+/** USB_D_BBLEERR4 : R/W1C; bitpos: [12]; default: 0;
+ *  The core generates this interrupt when babble is received for the endpoint
+ *  0x0 : No interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_D_BBLEERR4    (BIT(12))
+#define USB_D_BBLEERR4_M  (USB_D_BBLEERR4_V << USB_D_BBLEERR4_S)
+#define USB_D_BBLEERR4_V  0x00000001
+#define USB_D_BBLEERR4_S  12
+/** USB_D_NAKINTRPT4 : R/W1C; bitpos: [13]; default: 0;
+ *  NAK Interrupt. The core generates this interrupt when a NAK is transmitted or
+ *  received by the device
+ *  0x0 : No interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_D_NAKINTRPT4    (BIT(13))
+#define USB_D_NAKINTRPT4_M  (USB_D_NAKINTRPT4_V << USB_D_NAKINTRPT4_S)
+#define USB_D_NAKINTRPT4_V  0x00000001
+#define USB_D_NAKINTRPT4_S  13
+/** USB_D_NYETINTRPT4 : R/W1C; bitpos: [14]; default: 0;
+ *  NYET Interrupt. The core generates this interrupt when a NYET response is
+ *  transmitted for a non isochronous OUT endpoint
+ *  0x0 : No interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_D_NYETINTRPT4    (BIT(14))
+#define USB_D_NYETINTRPT4_M  (USB_D_NYETINTRPT4_V << USB_D_NYETINTRPT4_S)
+#define USB_D_NYETINTRPT4_V  0x00000001
+#define USB_D_NYETINTRPT4_S  14
+
+
+/** USB_DIEPINT5_REG register
+ *  Device IN Endpoint 5 Interrupt Register
+ */
+#define USB_DIEPINT5_REG (SOC_DPORT_USB_BASE + 0x9a8)
+/** USB_D_XFERCOMPL5 : R/W1C; bitpos: [0]; default: 0;
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Completed Interrupt
+ */
+#define USB_D_XFERCOMPL5    (BIT(0))
+#define USB_D_XFERCOMPL5_M  (USB_D_XFERCOMPL5_V << USB_D_XFERCOMPL5_S)
+#define USB_D_XFERCOMPL5_V  0x00000001
+#define USB_D_XFERCOMPL5_S  0
+/** USB_D_EPDISBLD5 : R/W1C; bitpos: [1]; default: 0;
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_D_EPDISBLD5    (BIT(1))
+#define USB_D_EPDISBLD5_M  (USB_D_EPDISBLD5_V << USB_D_EPDISBLD5_S)
+#define USB_D_EPDISBLD5_V  0x00000001
+#define USB_D_EPDISBLD5_S  1
+/** USB_D_AHBERR5 : R/W1C; bitpos: [2]; default: 0;
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_D_AHBERR5    (BIT(2))
+#define USB_D_AHBERR5_M  (USB_D_AHBERR5_V << USB_D_AHBERR5_S)
+#define USB_D_AHBERR5_V  0x00000001
+#define USB_D_AHBERR5_S  2
+/** USB_D_TIMEOUT5 : R/W1C; bitpos: [3]; default: 0;
+ *  0x0 : No Timeout interrupt
+ *  0x1 : Timeout interrupt
+ */
+#define USB_D_TIMEOUT5    (BIT(3))
+#define USB_D_TIMEOUT5_M  (USB_D_TIMEOUT5_V << USB_D_TIMEOUT5_S)
+#define USB_D_TIMEOUT5_V  0x00000001
+#define USB_D_TIMEOUT5_S  3
+/** USB_D_INTKNTXFEMP5 : R/W1C; bitpos: [4]; default: 0;
+ *  0x0 : No IN Token Received when TxFIFO Empty Interrupt
+ *  0x1 : IN Token Received when TxFIFO Empty Interrupt
+ */
+#define USB_D_INTKNTXFEMP5    (BIT(4))
+#define USB_D_INTKNTXFEMP5_M  (USB_D_INTKNTXFEMP5_V << USB_D_INTKNTXFEMP5_S)
+#define USB_D_INTKNTXFEMP5_V  0x00000001
+#define USB_D_INTKNTXFEMP5_S  4
+/** USB_D_INTKNEPMIS5 : R/W1C; bitpos: [5]; default: 0;
+ *  0x0 : No IN Token Received with EP Mismatch Interrupt
+ *  0x1 : IN Token Received with EP Mismatch interrupt
+ */
+#define USB_D_INTKNEPMIS5    (BIT(5))
+#define USB_D_INTKNEPMIS5_M  (USB_D_INTKNEPMIS5_V << USB_D_INTKNEPMIS5_S)
+#define USB_D_INTKNEPMIS5_V  0x00000001
+#define USB_D_INTKNEPMIS5_S  5
+/** USB_D_INEPNAKEFF5 : R/W1C; bitpos: [6]; default: 0;
+ *  IN Endpoint NAK Effective
+ *  0x0 : No IN Endpoint NAK Effective interrupt
+ *  0x1 : IN Endpoint NAK Effective interrupt
+ */
+#define USB_D_INEPNAKEFF5    (BIT(6))
+#define USB_D_INEPNAKEFF5_M  (USB_D_INEPNAKEFF5_V << USB_D_INEPNAKEFF5_S)
+#define USB_D_INEPNAKEFF5_V  0x00000001
+#define USB_D_INEPNAKEFF5_S  6
+/** USB_D_TXFEMP5 : RO; bitpos: [7]; default: 0;
+ *  This interrupt is asserted when the TxFIFO for this endpoint is either half or
+ *  completely empty
+ *  0x0 : No Transmit FIFO Empty interrupt
+ *  0x1 : Transmit FIFO Empty interrupt
+ */
+#define USB_D_TXFEMP5    (BIT(7))
+#define USB_D_TXFEMP5_M  (USB_D_TXFEMP5_V << USB_D_TXFEMP5_S)
+#define USB_D_TXFEMP5_V  0x00000001
+#define USB_D_TXFEMP5_S  7
+/** USB_D_TXFIFOUNDRN5 : R/W1C; bitpos: [8]; default: 0;
+ *  The core generates this interrupt when it detects a transmit FIFO underrun
+ *  condition in threshold mode for this endpoint
+ *  0x0 : No Fifo Underrun interrupt
+ *  0x1 : Fifo Underrun interrupt
+ */
+#define USB_D_TXFIFOUNDRN5    (BIT(8))
+#define USB_D_TXFIFOUNDRN5_M  (USB_D_TXFIFOUNDRN5_V << USB_D_TXFIFOUNDRN5_S)
+#define USB_D_TXFIFOUNDRN5_V  0x00000001
+#define USB_D_TXFIFOUNDRN5_S  8
+/** USB_D_BNAINTR5 : R/W1C; bitpos: [9]; default: 0;
+ *  This bit is valid only when Scatter/Gather DMA mode is enabled. The core generates
+ *  this interrupt when the descriptor accessed is not ready for the Core to process,
+ *  such as Host busy or DMA done
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_D_BNAINTR5    (BIT(9))
+#define USB_D_BNAINTR5_M  (USB_D_BNAINTR5_V << USB_D_BNAINTR5_S)
+#define USB_D_BNAINTR5_V  0x00000001
+#define USB_D_BNAINTR5_S  9
+/** USB_D_PKTDRPSTS5 : R/W1C; bitpos: [11]; default: 0;
+ *  Packet Drop Status. This bit indicates to the application that an ISOC OUT packet
+ *  has been dropped. This bit does not have an associated mask bit and does not
+ *  generate an interrupt
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status
+ */
+#define USB_D_PKTDRPSTS5    (BIT(11))
+#define USB_D_PKTDRPSTS5_M  (USB_D_PKTDRPSTS5_V << USB_D_PKTDRPSTS5_S)
+#define USB_D_PKTDRPSTS5_V  0x00000001
+#define USB_D_PKTDRPSTS5_S  11
+/** USB_D_BBLEERR5 : R/W1C; bitpos: [12]; default: 0;
+ *  The core generates this interrupt when babble is received for the endpoint
+ *  0x0 : No interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_D_BBLEERR5    (BIT(12))
+#define USB_D_BBLEERR5_M  (USB_D_BBLEERR5_V << USB_D_BBLEERR5_S)
+#define USB_D_BBLEERR5_V  0x00000001
+#define USB_D_BBLEERR5_S  12
+/** USB_D_NAKINTRPT5 : R/W1C; bitpos: [13]; default: 0;
+ *  NAK Interrupt. The core generates this interrupt when a NAK is transmitted or
+ *  received by the device
+ *  0x0 : No interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_D_NAKINTRPT5    (BIT(13))
+#define USB_D_NAKINTRPT5_M  (USB_D_NAKINTRPT5_V << USB_D_NAKINTRPT5_S)
+#define USB_D_NAKINTRPT5_V  0x00000001
+#define USB_D_NAKINTRPT5_S  13
+/** USB_D_NYETINTRPT5 : R/W1C; bitpos: [14]; default: 0;
+ *  NYET Interrupt. The core generates this interrupt when a NYET response is
+ *  transmitted for a non isochronous OUT endpoint
+ *  0x0 : No interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_D_NYETINTRPT5    (BIT(14))
+#define USB_D_NYETINTRPT5_M  (USB_D_NYETINTRPT5_V << USB_D_NYETINTRPT5_S)
+#define USB_D_NYETINTRPT5_V  0x00000001
+#define USB_D_NYETINTRPT5_S  14
+
+
+/** USB_DIEPINT6_REG register
+ *  Device IN Endpoint 6 Interrupt Register
+ */
+#define USB_DIEPINT6_REG (SOC_DPORT_USB_BASE + 0x9c8)
+/** USB_D_XFERCOMPL6 : R/W1C; bitpos: [0]; default: 0;
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Completed Interrupt
+ */
+#define USB_D_XFERCOMPL6    (BIT(0))
+#define USB_D_XFERCOMPL6_M  (USB_D_XFERCOMPL6_V << USB_D_XFERCOMPL6_S)
+#define USB_D_XFERCOMPL6_V  0x00000001
+#define USB_D_XFERCOMPL6_S  0
+/** USB_D_EPDISBLD6 : R/W1C; bitpos: [1]; default: 0;
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_D_EPDISBLD6    (BIT(1))
+#define USB_D_EPDISBLD6_M  (USB_D_EPDISBLD6_V << USB_D_EPDISBLD6_S)
+#define USB_D_EPDISBLD6_V  0x00000001
+#define USB_D_EPDISBLD6_S  1
+/** USB_D_AHBERR6 : R/W1C; bitpos: [2]; default: 0;
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_D_AHBERR6    (BIT(2))
+#define USB_D_AHBERR6_M  (USB_D_AHBERR6_V << USB_D_AHBERR6_S)
+#define USB_D_AHBERR6_V  0x00000001
+#define USB_D_AHBERR6_S  2
+/** USB_D_TIMEOUT6 : R/W1C; bitpos: [3]; default: 0;
+ *  0x0 : No Timeout interrupt
+ *  0x1 : Timeout interrupt
+ */
+#define USB_D_TIMEOUT6    (BIT(3))
+#define USB_D_TIMEOUT6_M  (USB_D_TIMEOUT6_V << USB_D_TIMEOUT6_S)
+#define USB_D_TIMEOUT6_V  0x00000001
+#define USB_D_TIMEOUT6_S  3
+/** USB_D_INTKNTXFEMP6 : R/W1C; bitpos: [4]; default: 0;
+ *  0x0 : No IN Token Received when TxFIFO Empty Interrupt
+ *  0x1 : IN Token Received when TxFIFO Empty Interrupt
+ */
+#define USB_D_INTKNTXFEMP6    (BIT(4))
+#define USB_D_INTKNTXFEMP6_M  (USB_D_INTKNTXFEMP6_V << USB_D_INTKNTXFEMP6_S)
+#define USB_D_INTKNTXFEMP6_V  0x00000001
+#define USB_D_INTKNTXFEMP6_S  4
+/** USB_D_INTKNEPMIS6 : R/W1C; bitpos: [5]; default: 0;
+ *  0x0 : No IN Token Received with EP Mismatch Interrupt
+ *  0x1 : IN Token Received with EP Mismatch interrupt
+ */
+#define USB_D_INTKNEPMIS6    (BIT(5))
+#define USB_D_INTKNEPMIS6_M  (USB_D_INTKNEPMIS6_V << USB_D_INTKNEPMIS6_S)
+#define USB_D_INTKNEPMIS6_V  0x00000001
+#define USB_D_INTKNEPMIS6_S  5
+/** USB_D_INEPNAKEFF6 : R/W1C; bitpos: [6]; default: 0;
+ *  IN Endpoint NAK Effective
+ *  0x0 : No IN Endpoint NAK Effective interrupt
+ *  0x1 : IN Endpoint NAK Effective interrupt
+ */
+#define USB_D_INEPNAKEFF6    (BIT(6))
+#define USB_D_INEPNAKEFF6_M  (USB_D_INEPNAKEFF6_V << USB_D_INEPNAKEFF6_S)
+#define USB_D_INEPNAKEFF6_V  0x00000001
+#define USB_D_INEPNAKEFF6_S  6
+/** USB_D_TXFEMP6 : RO; bitpos: [7]; default: 0;
+ *  This interrupt is asserted when the TxFIFO for this endpoint is either half or
+ *  completely empty
+ *  0x0 : No Transmit FIFO Empty interrupt
+ *  0x1 : Transmit FIFO Empty interrupt
+ */
+#define USB_D_TXFEMP6    (BIT(7))
+#define USB_D_TXFEMP6_M  (USB_D_TXFEMP6_V << USB_D_TXFEMP6_S)
+#define USB_D_TXFEMP6_V  0x00000001
+#define USB_D_TXFEMP6_S  7
+/** USB_D_TXFIFOUNDRN6 : R/W1C; bitpos: [8]; default: 0;
+ *  The core generates this interrupt when it detects a transmit FIFO underrun
+ *  condition in threshold mode for this endpoint
+ *  0x0 : No Fifo Underrun interrupt
+ *  0x1 : Fifo Underrun interrupt
+ */
+#define USB_D_TXFIFOUNDRN6    (BIT(8))
+#define USB_D_TXFIFOUNDRN6_M  (USB_D_TXFIFOUNDRN6_V << USB_D_TXFIFOUNDRN6_S)
+#define USB_D_TXFIFOUNDRN6_V  0x00000001
+#define USB_D_TXFIFOUNDRN6_S  8
+/** USB_D_BNAINTR6 : R/W1C; bitpos: [9]; default: 0;
+ *  This bit is valid only when Scatter/Gather DMA mode is enabled. The core generates
+ *  this interrupt when the descriptor accessed is not ready for the Core to process,
+ *  such as Host busy or DMA done
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_D_BNAINTR6    (BIT(9))
+#define USB_D_BNAINTR6_M  (USB_D_BNAINTR6_V << USB_D_BNAINTR6_S)
+#define USB_D_BNAINTR6_V  0x00000001
+#define USB_D_BNAINTR6_S  9
+/** USB_D_PKTDRPSTS6 : R/W1C; bitpos: [11]; default: 0;
+ *  Packet Drop Status. This bit indicates to the application that an ISOC OUT packet
+ *  has been dropped. This bit does not have an associated mask bit and does not
+ *  generate an interrupt
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status
+ */
+#define USB_D_PKTDRPSTS6    (BIT(11))
+#define USB_D_PKTDRPSTS6_M  (USB_D_PKTDRPSTS6_V << USB_D_PKTDRPSTS6_S)
+#define USB_D_PKTDRPSTS6_V  0x00000001
+#define USB_D_PKTDRPSTS6_S  11
+/** USB_D_BBLEERR6 : R/W1C; bitpos: [12]; default: 0;
+ *  The core generates this interrupt when babble is received for the endpoint
+ *  0x0 : No interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_D_BBLEERR6    (BIT(12))
+#define USB_D_BBLEERR6_M  (USB_D_BBLEERR6_V << USB_D_BBLEERR6_S)
+#define USB_D_BBLEERR6_V  0x00000001
+#define USB_D_BBLEERR6_S  12
+/** USB_D_NAKINTRPT6 : R/W1C; bitpos: [13]; default: 0;
+ *  NAK Interrupt. The core generates this interrupt when a NAK is transmitted or
+ *  received by the device
+ *  0x0 : No interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_D_NAKINTRPT6    (BIT(13))
+#define USB_D_NAKINTRPT6_M  (USB_D_NAKINTRPT6_V << USB_D_NAKINTRPT6_S)
+#define USB_D_NAKINTRPT6_V  0x00000001
+#define USB_D_NAKINTRPT6_S  13
+/** USB_D_NYETINTRPT6 : R/W1C; bitpos: [14]; default: 0;
+ *  NYET Interrupt. The core generates this interrupt when a NYET response is
+ *  transmitted for a non isochronous OUT endpoint
+ *  0x0 : No interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_D_NYETINTRPT6    (BIT(14))
+#define USB_D_NYETINTRPT6_M  (USB_D_NYETINTRPT6_V << USB_D_NYETINTRPT6_S)
+#define USB_D_NYETINTRPT6_V  0x00000001
+#define USB_D_NYETINTRPT6_S  14
+
+
+/** USB_DOEPINT0_REG register
+ *  Device OUT Endpoint 0 Interrupt Register
+ */
+#define USB_DOEPINT0_REG (SOC_DPORT_USB_BASE + 0xb08)
+/** USB_XFERCOMPL0 : R/W1C; bitpos: [0]; default: 0;
+ *  Transfer Completed Interrupt
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Complete Interrupt
+ */
+#define USB_XFERCOMPL0    (BIT(0))
+#define USB_XFERCOMPL0_M  (USB_XFERCOMPL0_V << USB_XFERCOMPL0_S)
+#define USB_XFERCOMPL0_V  0x00000001
+#define USB_XFERCOMPL0_S  0
+/** USB_EPDISBLD0 : R/W1C; bitpos: [1]; default: 0;
+ *  Endpoint Disabled Interrupt
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_EPDISBLD0    (BIT(1))
+#define USB_EPDISBLD0_M  (USB_EPDISBLD0_V << USB_EPDISBLD0_S)
+#define USB_EPDISBLD0_V  0x00000001
+#define USB_EPDISBLD0_S  1
+/** USB_AHBERR0 : R/W1C; bitpos: [2]; default: 0;
+ *  AHB Error
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_AHBERR0    (BIT(2))
+#define USB_AHBERR0_M  (USB_AHBERR0_V << USB_AHBERR0_S)
+#define USB_AHBERR0_V  0x00000001
+#define USB_AHBERR0_S  2
+/** USB_SETUP0 : R/W1C; bitpos: [3]; default: 0;
+ *  SETUP Phase Done
+ *  0x0 : No SETUP Phase Done
+ *  0x1 : SETUP Phase Done
+ */
+#define USB_SETUP0    (BIT(3))
+#define USB_SETUP0_M  (USB_SETUP0_V << USB_SETUP0_S)
+#define USB_SETUP0_V  0x00000001
+#define USB_SETUP0_S  3
+/** USB_OUTTKNEPDIS0 : R/W1C; bitpos: [4]; default: 0;
+ *  OUT Token Received When Endpoint Disabled
+ *  0x0 : No OUT Token Received When Endpoint Disabled
+ *  0x1 : OUT Token Received When Endpoint Disabled
+ */
+#define USB_OUTTKNEPDIS0    (BIT(4))
+#define USB_OUTTKNEPDIS0_M  (USB_OUTTKNEPDIS0_V << USB_OUTTKNEPDIS0_S)
+#define USB_OUTTKNEPDIS0_V  0x00000001
+#define USB_OUTTKNEPDIS0_S  4
+/** USB_STSPHSERCVD0 : R/W1C; bitpos: [5]; default: 0;
+ *  Status Phase Received for Control Write
+ *  0x0 : No Status Phase Received for Control Write
+ *  0x1 : Status Phase Received for Control Write
+ */
+#define USB_STSPHSERCVD0    (BIT(5))
+#define USB_STSPHSERCVD0_M  (USB_STSPHSERCVD0_V << USB_STSPHSERCVD0_S)
+#define USB_STSPHSERCVD0_V  0x00000001
+#define USB_STSPHSERCVD0_S  5
+/** USB_BACK2BACKSETUP0 : R/W1C; bitpos: [6]; default: 0;
+ *  Back-to-Back SETUP Packets Received
+ *  0x0 : No Back-to-Back SETUP Packets Received
+ *  0x1 : Back-to-Back SETUP Packets Received
+ */
+#define USB_BACK2BACKSETUP0    (BIT(6))
+#define USB_BACK2BACKSETUP0_M  (USB_BACK2BACKSETUP0_V << USB_BACK2BACKSETUP0_S)
+#define USB_BACK2BACKSETUP0_V  0x00000001
+#define USB_BACK2BACKSETUP0_S  6
+/** USB_OUTPKTERR0 : R/W1C; bitpos: [8]; default: 0;
+ *  OUT Packet Error
+ *  0x0 : No OUT Packet Error
+ *  0x1 : OUT Packet Error
+ */
+#define USB_OUTPKTERR0    (BIT(8))
+#define USB_OUTPKTERR0_M  (USB_OUTPKTERR0_V << USB_OUTPKTERR0_S)
+#define USB_OUTPKTERR0_V  0x00000001
+#define USB_OUTPKTERR0_S  8
+/** USB_BNAINTR0 : R/W1C; bitpos: [9]; default: 0;
+ *  Buffer Not Available Interrupt
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_BNAINTR0    (BIT(9))
+#define USB_BNAINTR0_M  (USB_BNAINTR0_V << USB_BNAINTR0_S)
+#define USB_BNAINTR0_V  0x00000001
+#define USB_BNAINTR0_S  9
+/** USB_PKTDRPSTS0 : R/W1C; bitpos: [11]; default: 0;
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status interrupt
+ */
+#define USB_PKTDRPSTS0    (BIT(11))
+#define USB_PKTDRPSTS0_M  (USB_PKTDRPSTS0_V << USB_PKTDRPSTS0_S)
+#define USB_PKTDRPSTS0_V  0x00000001
+#define USB_PKTDRPSTS0_S  11
+/** USB_BBLEERR0 : R/W1C; bitpos: [12]; default: 0;
+ *  0x0 : No BbleErr interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_BBLEERR0    (BIT(12))
+#define USB_BBLEERR0_M  (USB_BBLEERR0_V << USB_BBLEERR0_S)
+#define USB_BBLEERR0_V  0x00000001
+#define USB_BBLEERR0_S  12
+/** USB_NAKINTRPT0 : R/W1C; bitpos: [13]; default: 0;
+ *  0x0 : No NAK interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_NAKINTRPT0    (BIT(13))
+#define USB_NAKINTRPT0_M  (USB_NAKINTRPT0_V << USB_NAKINTRPT0_S)
+#define USB_NAKINTRPT0_V  0x00000001
+#define USB_NAKINTRPT0_S  13
+/** USB_NYEPINTRPT0 : R/W1C; bitpos: [14]; default: 0;
+ *  0x0 : No NYET interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_NYEPINTRPT0    (BIT(14))
+#define USB_NYEPINTRPT0_M  (USB_NYEPINTRPT0_V << USB_NYEPINTRPT0_S)
+#define USB_NYEPINTRPT0_V  0x00000001
+#define USB_NYEPINTRPT0_S  14
+/** USB_STUPPKTRCVD0 : R/W1C; bitpos: [15]; default: 0;
+ *  0x0 : No Setup packet received
+ *  0x1 : Setup packet received
+ */
+#define USB_STUPPKTRCVD0    (BIT(15))
+#define USB_STUPPKTRCVD0_M  (USB_STUPPKTRCVD0_V << USB_STUPPKTRCVD0_S)
+#define USB_STUPPKTRCVD0_V  0x00000001
+#define USB_STUPPKTRCVD0_S  15
+
+
+/** USB_DOEPINT1_REG register
+ *  Device OUT Endpoint 1 Interrupt Register
+ */
+#define USB_DOEPINT1_REG (SOC_DPORT_USB_BASE + 0xb28)
+/** USB_XFERCOMPL1 : R/W1C; bitpos: [0]; default: 0;
+ *  Transfer Completed Interrupt
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Complete Interrupt
+ */
+#define USB_XFERCOMPL1    (BIT(0))
+#define USB_XFERCOMPL1_M  (USB_XFERCOMPL1_V << USB_XFERCOMPL1_S)
+#define USB_XFERCOMPL1_V  0x00000001
+#define USB_XFERCOMPL1_S  0
+/** USB_EPDISBLD1 : R/W1C; bitpos: [1]; default: 0;
+ *  Endpoint Disabled Interrupt
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_EPDISBLD1    (BIT(1))
+#define USB_EPDISBLD1_M  (USB_EPDISBLD1_V << USB_EPDISBLD1_S)
+#define USB_EPDISBLD1_V  0x00000001
+#define USB_EPDISBLD1_S  1
+/** USB_AHBERR1 : R/W1C; bitpos: [2]; default: 0;
+ *  AHB Error
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_AHBERR1    (BIT(2))
+#define USB_AHBERR1_M  (USB_AHBERR1_V << USB_AHBERR1_S)
+#define USB_AHBERR1_V  0x00000001
+#define USB_AHBERR1_S  2
+/** USB_SETUP1 : R/W1C; bitpos: [3]; default: 0;
+ *  SETUP Phase Done
+ *  0x0 : No SETUP Phase Done
+ *  0x1 : SETUP Phase Done
+ */
+#define USB_SETUP1    (BIT(3))
+#define USB_SETUP1_M  (USB_SETUP1_V << USB_SETUP1_S)
+#define USB_SETUP1_V  0x00000001
+#define USB_SETUP1_S  3
+/** USB_OUTTKNEPDIS1 : R/W1C; bitpos: [4]; default: 0;
+ *  OUT Token Received When Endpoint Disabled
+ *  0x0 : No OUT Token Received When Endpoint Disabled
+ *  0x1 : OUT Token Received When Endpoint Disabled
+ */
+#define USB_OUTTKNEPDIS1    (BIT(4))
+#define USB_OUTTKNEPDIS1_M  (USB_OUTTKNEPDIS1_V << USB_OUTTKNEPDIS1_S)
+#define USB_OUTTKNEPDIS1_V  0x00000001
+#define USB_OUTTKNEPDIS1_S  4
+/** USB_STSPHSERCVD1 : R/W1C; bitpos: [5]; default: 0;
+ *  Status Phase Received for Control Write
+ *  0x0 : No Status Phase Received for Control Write
+ *  0x1 : Status Phase Received for Control Write
+ */
+#define USB_STSPHSERCVD1    (BIT(5))
+#define USB_STSPHSERCVD1_M  (USB_STSPHSERCVD1_V << USB_STSPHSERCVD1_S)
+#define USB_STSPHSERCVD1_V  0x00000001
+#define USB_STSPHSERCVD1_S  5
+/** USB_BACK2BACKSETUP1 : R/W1C; bitpos: [6]; default: 0;
+ *  Back-to-Back SETUP Packets Received
+ *  0x0 : No Back-to-Back SETUP Packets Received
+ *  0x1 : Back-to-Back SETUP Packets Received
+ */
+#define USB_BACK2BACKSETUP1    (BIT(6))
+#define USB_BACK2BACKSETUP1_M  (USB_BACK2BACKSETUP1_V << USB_BACK2BACKSETUP1_S)
+#define USB_BACK2BACKSETUP1_V  0x00000001
+#define USB_BACK2BACKSETUP1_S  6
+/** USB_OUTPKTERR1 : R/W1C; bitpos: [8]; default: 0;
+ *  OUT Packet Error
+ *  0x0 : No OUT Packet Error
+ *  0x1 : OUT Packet Error
+ */
+#define USB_OUTPKTERR1    (BIT(8))
+#define USB_OUTPKTERR1_M  (USB_OUTPKTERR1_V << USB_OUTPKTERR1_S)
+#define USB_OUTPKTERR1_V  0x00000001
+#define USB_OUTPKTERR1_S  8
+/** USB_BNAINTR1 : R/W1C; bitpos: [9]; default: 0;
+ *  Buffer Not Available Interrupt
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_BNAINTR1    (BIT(9))
+#define USB_BNAINTR1_M  (USB_BNAINTR1_V << USB_BNAINTR1_S)
+#define USB_BNAINTR1_V  0x00000001
+#define USB_BNAINTR1_S  9
+/** USB_PKTDRPSTS1 : R/W1C; bitpos: [11]; default: 0;
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status interrupt
+ */
+#define USB_PKTDRPSTS1    (BIT(11))
+#define USB_PKTDRPSTS1_M  (USB_PKTDRPSTS1_V << USB_PKTDRPSTS1_S)
+#define USB_PKTDRPSTS1_V  0x00000001
+#define USB_PKTDRPSTS1_S  11
+/** USB_BBLEERR1 : R/W1C; bitpos: [12]; default: 0;
+ *  0x0 : No BbleErr interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_BBLEERR1    (BIT(12))
+#define USB_BBLEERR1_M  (USB_BBLEERR1_V << USB_BBLEERR1_S)
+#define USB_BBLEERR1_V  0x00000001
+#define USB_BBLEERR1_S  12
+/** USB_NAKINTRPT1 : R/W1C; bitpos: [13]; default: 0;
+ *  0x0 : No NAK interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_NAKINTRPT1    (BIT(13))
+#define USB_NAKINTRPT1_M  (USB_NAKINTRPT1_V << USB_NAKINTRPT1_S)
+#define USB_NAKINTRPT1_V  0x00000001
+#define USB_NAKINTRPT1_S  13
+/** USB_NYEPINTRPT1 : R/W1C; bitpos: [14]; default: 0;
+ *  0x0 : No NYET interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_NYEPINTRPT1    (BIT(14))
+#define USB_NYEPINTRPT1_M  (USB_NYEPINTRPT1_V << USB_NYEPINTRPT1_S)
+#define USB_NYEPINTRPT1_V  0x00000001
+#define USB_NYEPINTRPT1_S  14
+/** USB_STUPPKTRCVD1 : R/W1C; bitpos: [15]; default: 0;
+ *  0x0 : No Setup packet received
+ *  0x1 : Setup packet received
+ */
+#define USB_STUPPKTRCVD1    (BIT(15))
+#define USB_STUPPKTRCVD1_M  (USB_STUPPKTRCVD1_V << USB_STUPPKTRCVD1_S)
+#define USB_STUPPKTRCVD1_V  0x00000001
+#define USB_STUPPKTRCVD1_S  15
+
+
+/** USB_DOEPINT2_REG register
+ *  Device OUT Endpoint 2 Interrupt Register
+ */
+#define USB_DOEPINT2_REG (SOC_DPORT_USB_BASE + 0xb48)
+/** USB_XFERCOMPL2 : R/W1C; bitpos: [0]; default: 0;
+ *  Transfer Completed Interrupt
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Complete Interrupt
+ */
+#define USB_XFERCOMPL2    (BIT(0))
+#define USB_XFERCOMPL2_M  (USB_XFERCOMPL2_V << USB_XFERCOMPL2_S)
+#define USB_XFERCOMPL2_V  0x00000001
+#define USB_XFERCOMPL2_S  0
+/** USB_EPDISBLD2 : R/W1C; bitpos: [1]; default: 0;
+ *  Endpoint Disabled Interrupt
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_EPDISBLD2    (BIT(1))
+#define USB_EPDISBLD2_M  (USB_EPDISBLD2_V << USB_EPDISBLD2_S)
+#define USB_EPDISBLD2_V  0x00000001
+#define USB_EPDISBLD2_S  1
+/** USB_AHBERR2 : R/W1C; bitpos: [2]; default: 0;
+ *  AHB Error
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_AHBERR2    (BIT(2))
+#define USB_AHBERR2_M  (USB_AHBERR2_V << USB_AHBERR2_S)
+#define USB_AHBERR2_V  0x00000001
+#define USB_AHBERR2_S  2
+/** USB_SETUP2 : R/W1C; bitpos: [3]; default: 0;
+ *  SETUP Phase Done
+ *  0x0 : No SETUP Phase Done
+ *  0x1 : SETUP Phase Done
+ */
+#define USB_SETUP2    (BIT(3))
+#define USB_SETUP2_M  (USB_SETUP2_V << USB_SETUP2_S)
+#define USB_SETUP2_V  0x00000001
+#define USB_SETUP2_S  3
+/** USB_OUTTKNEPDIS2 : R/W1C; bitpos: [4]; default: 0;
+ *  OUT Token Received When Endpoint Disabled
+ *  0x0 : No OUT Token Received When Endpoint Disabled
+ *  0x1 : OUT Token Received When Endpoint Disabled
+ */
+#define USB_OUTTKNEPDIS2    (BIT(4))
+#define USB_OUTTKNEPDIS2_M  (USB_OUTTKNEPDIS2_V << USB_OUTTKNEPDIS2_S)
+#define USB_OUTTKNEPDIS2_V  0x00000001
+#define USB_OUTTKNEPDIS2_S  4
+/** USB_STSPHSERCVD2 : R/W1C; bitpos: [5]; default: 0;
+ *  Status Phase Received for Control Write
+ *  0x0 : No Status Phase Received for Control Write
+ *  0x1 : Status Phase Received for Control Write
+ */
+#define USB_STSPHSERCVD2    (BIT(5))
+#define USB_STSPHSERCVD2_M  (USB_STSPHSERCVD2_V << USB_STSPHSERCVD2_S)
+#define USB_STSPHSERCVD2_V  0x00000001
+#define USB_STSPHSERCVD2_S  5
+/** USB_BACK2BACKSETUP2 : R/W1C; bitpos: [6]; default: 0;
+ *  Back-to-Back SETUP Packets Received
+ *  0x0 : No Back-to-Back SETUP Packets Received
+ *  0x1 : Back-to-Back SETUP Packets Received
+ */
+#define USB_BACK2BACKSETUP2    (BIT(6))
+#define USB_BACK2BACKSETUP2_M  (USB_BACK2BACKSETUP2_V << USB_BACK2BACKSETUP2_S)
+#define USB_BACK2BACKSETUP2_V  0x00000001
+#define USB_BACK2BACKSETUP2_S  6
+/** USB_OUTPKTERR2 : R/W1C; bitpos: [8]; default: 0;
+ *  OUT Packet Error
+ *  0x0 : No OUT Packet Error
+ *  0x1 : OUT Packet Error
+ */
+#define USB_OUTPKTERR2    (BIT(8))
+#define USB_OUTPKTERR2_M  (USB_OUTPKTERR2_V << USB_OUTPKTERR2_S)
+#define USB_OUTPKTERR2_V  0x00000001
+#define USB_OUTPKTERR2_S  8
+/** USB_BNAINTR2 : R/W1C; bitpos: [9]; default: 0;
+ *  Buffer Not Available Interrupt
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_BNAINTR2    (BIT(9))
+#define USB_BNAINTR2_M  (USB_BNAINTR2_V << USB_BNAINTR2_S)
+#define USB_BNAINTR2_V  0x00000001
+#define USB_BNAINTR2_S  9
+/** USB_PKTDRPSTS2 : R/W1C; bitpos: [11]; default: 0;
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status interrupt
+ */
+#define USB_PKTDRPSTS2    (BIT(11))
+#define USB_PKTDRPSTS2_M  (USB_PKTDRPSTS2_V << USB_PKTDRPSTS2_S)
+#define USB_PKTDRPSTS2_V  0x00000001
+#define USB_PKTDRPSTS2_S  11
+/** USB_BBLEERR2 : R/W1C; bitpos: [12]; default: 0;
+ *  0x0 : No BbleErr interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_BBLEERR2    (BIT(12))
+#define USB_BBLEERR2_M  (USB_BBLEERR2_V << USB_BBLEERR2_S)
+#define USB_BBLEERR2_V  0x00000001
+#define USB_BBLEERR2_S  12
+/** USB_NAKINTRPT2 : R/W1C; bitpos: [13]; default: 0;
+ *  0x0 : No NAK interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_NAKINTRPT2    (BIT(13))
+#define USB_NAKINTRPT2_M  (USB_NAKINTRPT2_V << USB_NAKINTRPT2_S)
+#define USB_NAKINTRPT2_V  0x00000001
+#define USB_NAKINTRPT2_S  13
+/** USB_NYEPINTRPT2 : R/W1C; bitpos: [14]; default: 0;
+ *  0x0 : No NYET interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_NYEPINTRPT2    (BIT(14))
+#define USB_NYEPINTRPT2_M  (USB_NYEPINTRPT2_V << USB_NYEPINTRPT2_S)
+#define USB_NYEPINTRPT2_V  0x00000001
+#define USB_NYEPINTRPT2_S  14
+/** USB_STUPPKTRCVD2 : R/W1C; bitpos: [15]; default: 0;
+ *  0x0 : No Setup packet received
+ *  0x1 : Setup packet received
+ */
+#define USB_STUPPKTRCVD2    (BIT(15))
+#define USB_STUPPKTRCVD2_M  (USB_STUPPKTRCVD2_V << USB_STUPPKTRCVD2_S)
+#define USB_STUPPKTRCVD2_V  0x00000001
+#define USB_STUPPKTRCVD2_S  15
+
+
+/** USB_DOEPINT3_REG register
+ *  Device OUT Endpoint 3 Interrupt Register
+ */
+#define USB_DOEPINT3_REG (SOC_DPORT_USB_BASE + 0xb68)
+/** USB_XFERCOMPL3 : R/W1C; bitpos: [0]; default: 0;
+ *  Transfer Completed Interrupt
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Complete Interrupt
+ */
+#define USB_XFERCOMPL3    (BIT(0))
+#define USB_XFERCOMPL3_M  (USB_XFERCOMPL3_V << USB_XFERCOMPL3_S)
+#define USB_XFERCOMPL3_V  0x00000001
+#define USB_XFERCOMPL3_S  0
+/** USB_EPDISBLD3 : R/W1C; bitpos: [1]; default: 0;
+ *  Endpoint Disabled Interrupt
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_EPDISBLD3    (BIT(1))
+#define USB_EPDISBLD3_M  (USB_EPDISBLD3_V << USB_EPDISBLD3_S)
+#define USB_EPDISBLD3_V  0x00000001
+#define USB_EPDISBLD3_S  1
+/** USB_AHBERR3 : R/W1C; bitpos: [2]; default: 0;
+ *  AHB Error
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_AHBERR3    (BIT(2))
+#define USB_AHBERR3_M  (USB_AHBERR3_V << USB_AHBERR3_S)
+#define USB_AHBERR3_V  0x00000001
+#define USB_AHBERR3_S  2
+/** USB_SETUP3 : R/W1C; bitpos: [3]; default: 0;
+ *  SETUP Phase Done
+ *  0x0 : No SETUP Phase Done
+ *  0x1 : SETUP Phase Done
+ */
+#define USB_SETUP3    (BIT(3))
+#define USB_SETUP3_M  (USB_SETUP3_V << USB_SETUP3_S)
+#define USB_SETUP3_V  0x00000001
+#define USB_SETUP3_S  3
+/** USB_OUTTKNEPDIS3 : R/W1C; bitpos: [4]; default: 0;
+ *  OUT Token Received When Endpoint Disabled
+ *  0x0 : No OUT Token Received When Endpoint Disabled
+ *  0x1 : OUT Token Received When Endpoint Disabled
+ */
+#define USB_OUTTKNEPDIS3    (BIT(4))
+#define USB_OUTTKNEPDIS3_M  (USB_OUTTKNEPDIS3_V << USB_OUTTKNEPDIS3_S)
+#define USB_OUTTKNEPDIS3_V  0x00000001
+#define USB_OUTTKNEPDIS3_S  4
+/** USB_STSPHSERCVD3 : R/W1C; bitpos: [5]; default: 0;
+ *  Status Phase Received for Control Write
+ *  0x0 : No Status Phase Received for Control Write
+ *  0x1 : Status Phase Received for Control Write
+ */
+#define USB_STSPHSERCVD3    (BIT(5))
+#define USB_STSPHSERCVD3_M  (USB_STSPHSERCVD3_V << USB_STSPHSERCVD3_S)
+#define USB_STSPHSERCVD3_V  0x00000001
+#define USB_STSPHSERCVD3_S  5
+/** USB_BACK2BACKSETUP3 : R/W1C; bitpos: [6]; default: 0;
+ *  Back-to-Back SETUP Packets Received
+ *  0x0 : No Back-to-Back SETUP Packets Received
+ *  0x1 : Back-to-Back SETUP Packets Received
+ */
+#define USB_BACK2BACKSETUP3    (BIT(6))
+#define USB_BACK2BACKSETUP3_M  (USB_BACK2BACKSETUP3_V << USB_BACK2BACKSETUP3_S)
+#define USB_BACK2BACKSETUP3_V  0x00000001
+#define USB_BACK2BACKSETUP3_S  6
+/** USB_OUTPKTERR3 : R/W1C; bitpos: [8]; default: 0;
+ *  OUT Packet Error
+ *  0x0 : No OUT Packet Error
+ *  0x1 : OUT Packet Error
+ */
+#define USB_OUTPKTERR3    (BIT(8))
+#define USB_OUTPKTERR3_M  (USB_OUTPKTERR3_V << USB_OUTPKTERR3_S)
+#define USB_OUTPKTERR3_V  0x00000001
+#define USB_OUTPKTERR3_S  8
+/** USB_BNAINTR3 : R/W1C; bitpos: [9]; default: 0;
+ *  Buffer Not Available Interrupt
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_BNAINTR3    (BIT(9))
+#define USB_BNAINTR3_M  (USB_BNAINTR3_V << USB_BNAINTR3_S)
+#define USB_BNAINTR3_V  0x00000001
+#define USB_BNAINTR3_S  9
+/** USB_PKTDRPSTS3 : R/W1C; bitpos: [11]; default: 0;
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status interrupt
+ */
+#define USB_PKTDRPSTS3    (BIT(11))
+#define USB_PKTDRPSTS3_M  (USB_PKTDRPSTS3_V << USB_PKTDRPSTS3_S)
+#define USB_PKTDRPSTS3_V  0x00000001
+#define USB_PKTDRPSTS3_S  11
+/** USB_BBLEERR3 : R/W1C; bitpos: [12]; default: 0;
+ *  0x0 : No BbleErr interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_BBLEERR3    (BIT(12))
+#define USB_BBLEERR3_M  (USB_BBLEERR3_V << USB_BBLEERR3_S)
+#define USB_BBLEERR3_V  0x00000001
+#define USB_BBLEERR3_S  12
+/** USB_NAKINTRPT3 : R/W1C; bitpos: [13]; default: 0;
+ *  0x0 : No NAK interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_NAKINTRPT3    (BIT(13))
+#define USB_NAKINTRPT3_M  (USB_NAKINTRPT3_V << USB_NAKINTRPT3_S)
+#define USB_NAKINTRPT3_V  0x00000001
+#define USB_NAKINTRPT3_S  13
+/** USB_NYEPINTRPT3 : R/W1C; bitpos: [14]; default: 0;
+ *  0x0 : No NYET interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_NYEPINTRPT3    (BIT(14))
+#define USB_NYEPINTRPT3_M  (USB_NYEPINTRPT3_V << USB_NYEPINTRPT3_S)
+#define USB_NYEPINTRPT3_V  0x00000001
+#define USB_NYEPINTRPT3_S  14
+/** USB_STUPPKTRCVD3 : R/W1C; bitpos: [15]; default: 0;
+ *  0x0 : No Setup packet received
+ *  0x1 : Setup packet received
+ */
+#define USB_STUPPKTRCVD3    (BIT(15))
+#define USB_STUPPKTRCVD3_M  (USB_STUPPKTRCVD3_V << USB_STUPPKTRCVD3_S)
+#define USB_STUPPKTRCVD3_V  0x00000001
+#define USB_STUPPKTRCVD3_S  15
+
+
+/** USB_DOEPINT4_REG register
+ *  Device OUT Endpoint 4 Interrupt Register
+ */
+#define USB_DOEPINT4_REG (SOC_DPORT_USB_BASE + 0xb88)
+/** USB_XFERCOMPL4 : R/W1C; bitpos: [0]; default: 0;
+ *  Transfer Completed Interrupt
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Complete Interrupt
+ */
+#define USB_XFERCOMPL4    (BIT(0))
+#define USB_XFERCOMPL4_M  (USB_XFERCOMPL4_V << USB_XFERCOMPL4_S)
+#define USB_XFERCOMPL4_V  0x00000001
+#define USB_XFERCOMPL4_S  0
+/** USB_EPDISBLD4 : R/W1C; bitpos: [1]; default: 0;
+ *  Endpoint Disabled Interrupt
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_EPDISBLD4    (BIT(1))
+#define USB_EPDISBLD4_M  (USB_EPDISBLD4_V << USB_EPDISBLD4_S)
+#define USB_EPDISBLD4_V  0x00000001
+#define USB_EPDISBLD4_S  1
+/** USB_AHBERR4 : R/W1C; bitpos: [2]; default: 0;
+ *  AHB Error
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_AHBERR4    (BIT(2))
+#define USB_AHBERR4_M  (USB_AHBERR4_V << USB_AHBERR4_S)
+#define USB_AHBERR4_V  0x00000001
+#define USB_AHBERR4_S  2
+/** USB_SETUP4 : R/W1C; bitpos: [3]; default: 0;
+ *  SETUP Phase Done
+ *  0x0 : No SETUP Phase Done
+ *  0x1 : SETUP Phase Done
+ */
+#define USB_SETUP4    (BIT(3))
+#define USB_SETUP4_M  (USB_SETUP4_V << USB_SETUP4_S)
+#define USB_SETUP4_V  0x00000001
+#define USB_SETUP4_S  3
+/** USB_OUTTKNEPDIS4 : R/W1C; bitpos: [4]; default: 0;
+ *  OUT Token Received When Endpoint Disabled
+ *  0x0 : No OUT Token Received When Endpoint Disabled
+ *  0x1 : OUT Token Received When Endpoint Disabled
+ */
+#define USB_OUTTKNEPDIS4    (BIT(4))
+#define USB_OUTTKNEPDIS4_M  (USB_OUTTKNEPDIS4_V << USB_OUTTKNEPDIS4_S)
+#define USB_OUTTKNEPDIS4_V  0x00000001
+#define USB_OUTTKNEPDIS4_S  4
+/** USB_STSPHSERCVD4 : R/W1C; bitpos: [5]; default: 0;
+ *  Status Phase Received for Control Write
+ *  0x0 : No Status Phase Received for Control Write
+ *  0x1 : Status Phase Received for Control Write
+ */
+#define USB_STSPHSERCVD4    (BIT(5))
+#define USB_STSPHSERCVD4_M  (USB_STSPHSERCVD4_V << USB_STSPHSERCVD4_S)
+#define USB_STSPHSERCVD4_V  0x00000001
+#define USB_STSPHSERCVD4_S  5
+/** USB_BACK2BACKSETUP4 : R/W1C; bitpos: [6]; default: 0;
+ *  Back-to-Back SETUP Packets Received
+ *  0x0 : No Back-to-Back SETUP Packets Received
+ *  0x1 : Back-to-Back SETUP Packets Received
+ */
+#define USB_BACK2BACKSETUP4    (BIT(6))
+#define USB_BACK2BACKSETUP4_M  (USB_BACK2BACKSETUP4_V << USB_BACK2BACKSETUP4_S)
+#define USB_BACK2BACKSETUP4_V  0x00000001
+#define USB_BACK2BACKSETUP4_S  6
+/** USB_OUTPKTERR4 : R/W1C; bitpos: [8]; default: 0;
+ *  OUT Packet Error
+ *  0x0 : No OUT Packet Error
+ *  0x1 : OUT Packet Error
+ */
+#define USB_OUTPKTERR4    (BIT(8))
+#define USB_OUTPKTERR4_M  (USB_OUTPKTERR4_V << USB_OUTPKTERR4_S)
+#define USB_OUTPKTERR4_V  0x00000001
+#define USB_OUTPKTERR4_S  8
+/** USB_BNAINTR4 : R/W1C; bitpos: [9]; default: 0;
+ *  Buffer Not Available Interrupt
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_BNAINTR4    (BIT(9))
+#define USB_BNAINTR4_M  (USB_BNAINTR4_V << USB_BNAINTR4_S)
+#define USB_BNAINTR4_V  0x00000001
+#define USB_BNAINTR4_S  9
+/** USB_PKTDRPSTS4 : R/W1C; bitpos: [11]; default: 0;
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status interrupt
+ */
+#define USB_PKTDRPSTS4    (BIT(11))
+#define USB_PKTDRPSTS4_M  (USB_PKTDRPSTS4_V << USB_PKTDRPSTS4_S)
+#define USB_PKTDRPSTS4_V  0x00000001
+#define USB_PKTDRPSTS4_S  11
+/** USB_BBLEERR4 : R/W1C; bitpos: [12]; default: 0;
+ *  0x0 : No BbleErr interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_BBLEERR4    (BIT(12))
+#define USB_BBLEERR4_M  (USB_BBLEERR4_V << USB_BBLEERR4_S)
+#define USB_BBLEERR4_V  0x00000001
+#define USB_BBLEERR4_S  12
+/** USB_NAKINTRPT4 : R/W1C; bitpos: [13]; default: 0;
+ *  0x0 : No NAK interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_NAKINTRPT4    (BIT(13))
+#define USB_NAKINTRPT4_M  (USB_NAKINTRPT4_V << USB_NAKINTRPT4_S)
+#define USB_NAKINTRPT4_V  0x00000001
+#define USB_NAKINTRPT4_S  13
+/** USB_NYEPINTRPT4 : R/W1C; bitpos: [14]; default: 0;
+ *  0x0 : No NYET interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_NYEPINTRPT4    (BIT(14))
+#define USB_NYEPINTRPT4_M  (USB_NYEPINTRPT4_V << USB_NYEPINTRPT4_S)
+#define USB_NYEPINTRPT4_V  0x00000001
+#define USB_NYEPINTRPT4_S  14
+/** USB_STUPPKTRCVD4 : R/W1C; bitpos: [15]; default: 0;
+ *  0x0 : No Setup packet received
+ *  0x1 : Setup packet received
+ */
+#define USB_STUPPKTRCVD4    (BIT(15))
+#define USB_STUPPKTRCVD4_M  (USB_STUPPKTRCVD4_V << USB_STUPPKTRCVD4_S)
+#define USB_STUPPKTRCVD4_V  0x00000001
+#define USB_STUPPKTRCVD4_S  15
+
+
+/** USB_DOEPINT5_REG register
+ *  Device OUT Endpoint 5 Interrupt Register
+ */
+#define USB_DOEPINT5_REG (SOC_DPORT_USB_BASE + 0xba8)
+/** USB_XFERCOMPL5 : R/W1C; bitpos: [0]; default: 0;
+ *  Transfer Completed Interrupt
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Complete Interrupt
+ */
+#define USB_XFERCOMPL5    (BIT(0))
+#define USB_XFERCOMPL5_M  (USB_XFERCOMPL5_V << USB_XFERCOMPL5_S)
+#define USB_XFERCOMPL5_V  0x00000001
+#define USB_XFERCOMPL5_S  0
+/** USB_EPDISBLD5 : R/W1C; bitpos: [1]; default: 0;
+ *  Endpoint Disabled Interrupt
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_EPDISBLD5    (BIT(1))
+#define USB_EPDISBLD5_M  (USB_EPDISBLD5_V << USB_EPDISBLD5_S)
+#define USB_EPDISBLD5_V  0x00000001
+#define USB_EPDISBLD5_S  1
+/** USB_AHBERR5 : R/W1C; bitpos: [2]; default: 0;
+ *  AHB Error
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_AHBERR5    (BIT(2))
+#define USB_AHBERR5_M  (USB_AHBERR5_V << USB_AHBERR5_S)
+#define USB_AHBERR5_V  0x00000001
+#define USB_AHBERR5_S  2
+/** USB_SETUP5 : R/W1C; bitpos: [3]; default: 0;
+ *  SETUP Phase Done
+ *  0x0 : No SETUP Phase Done
+ *  0x1 : SETUP Phase Done
+ */
+#define USB_SETUP5    (BIT(3))
+#define USB_SETUP5_M  (USB_SETUP5_V << USB_SETUP5_S)
+#define USB_SETUP5_V  0x00000001
+#define USB_SETUP5_S  3
+/** USB_OUTTKNEPDIS5 : R/W1C; bitpos: [4]; default: 0;
+ *  OUT Token Received When Endpoint Disabled
+ *  0x0 : No OUT Token Received When Endpoint Disabled
+ *  0x1 : OUT Token Received When Endpoint Disabled
+ */
+#define USB_OUTTKNEPDIS5    (BIT(4))
+#define USB_OUTTKNEPDIS5_M  (USB_OUTTKNEPDIS5_V << USB_OUTTKNEPDIS5_S)
+#define USB_OUTTKNEPDIS5_V  0x00000001
+#define USB_OUTTKNEPDIS5_S  4
+/** USB_STSPHSERCVD5 : R/W1C; bitpos: [5]; default: 0;
+ *  Status Phase Received for Control Write
+ *  0x0 : No Status Phase Received for Control Write
+ *  0x1 : Status Phase Received for Control Write
+ */
+#define USB_STSPHSERCVD5    (BIT(5))
+#define USB_STSPHSERCVD5_M  (USB_STSPHSERCVD5_V << USB_STSPHSERCVD5_S)
+#define USB_STSPHSERCVD5_V  0x00000001
+#define USB_STSPHSERCVD5_S  5
+/** USB_BACK2BACKSETUP5 : R/W1C; bitpos: [6]; default: 0;
+ *  Back-to-Back SETUP Packets Received
+ *  0x0 : No Back-to-Back SETUP Packets Received
+ *  0x1 : Back-to-Back SETUP Packets Received
+ */
+#define USB_BACK2BACKSETUP5    (BIT(6))
+#define USB_BACK2BACKSETUP5_M  (USB_BACK2BACKSETUP5_V << USB_BACK2BACKSETUP5_S)
+#define USB_BACK2BACKSETUP5_V  0x00000001
+#define USB_BACK2BACKSETUP5_S  6
+/** USB_OUTPKTERR5 : R/W1C; bitpos: [8]; default: 0;
+ *  OUT Packet Error
+ *  0x0 : No OUT Packet Error
+ *  0x1 : OUT Packet Error
+ */
+#define USB_OUTPKTERR5    (BIT(8))
+#define USB_OUTPKTERR5_M  (USB_OUTPKTERR5_V << USB_OUTPKTERR5_S)
+#define USB_OUTPKTERR5_V  0x00000001
+#define USB_OUTPKTERR5_S  8
+/** USB_BNAINTR5 : R/W1C; bitpos: [9]; default: 0;
+ *  Buffer Not Available Interrupt
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_BNAINTR5    (BIT(9))
+#define USB_BNAINTR5_M  (USB_BNAINTR5_V << USB_BNAINTR5_S)
+#define USB_BNAINTR5_V  0x00000001
+#define USB_BNAINTR5_S  9
+/** USB_PKTDRPSTS5 : R/W1C; bitpos: [11]; default: 0;
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status interrupt
+ */
+#define USB_PKTDRPSTS5    (BIT(11))
+#define USB_PKTDRPSTS5_M  (USB_PKTDRPSTS5_V << USB_PKTDRPSTS5_S)
+#define USB_PKTDRPSTS5_V  0x00000001
+#define USB_PKTDRPSTS5_S  11
+/** USB_BBLEERR5 : R/W1C; bitpos: [12]; default: 0;
+ *  0x0 : No BbleErr interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_BBLEERR5    (BIT(12))
+#define USB_BBLEERR5_M  (USB_BBLEERR5_V << USB_BBLEERR5_S)
+#define USB_BBLEERR5_V  0x00000001
+#define USB_BBLEERR5_S  12
+/** USB_NAKINTRPT5 : R/W1C; bitpos: [13]; default: 0;
+ *  0x0 : No NAK interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_NAKINTRPT5    (BIT(13))
+#define USB_NAKINTRPT5_M  (USB_NAKINTRPT5_V << USB_NAKINTRPT5_S)
+#define USB_NAKINTRPT5_V  0x00000001
+#define USB_NAKINTRPT5_S  13
+/** USB_NYEPINTRPT5 : R/W1C; bitpos: [14]; default: 0;
+ *  0x0 : No NYET interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_NYEPINTRPT5    (BIT(14))
+#define USB_NYEPINTRPT5_M  (USB_NYEPINTRPT5_V << USB_NYEPINTRPT5_S)
+#define USB_NYEPINTRPT5_V  0x00000001
+#define USB_NYEPINTRPT5_S  14
+/** USB_STUPPKTRCVD5 : R/W1C; bitpos: [15]; default: 0;
+ *  0x0 : No Setup packet received
+ *  0x1 : Setup packet received
+ */
+#define USB_STUPPKTRCVD5    (BIT(15))
+#define USB_STUPPKTRCVD5_M  (USB_STUPPKTRCVD5_V << USB_STUPPKTRCVD5_S)
+#define USB_STUPPKTRCVD5_V  0x00000001
+#define USB_STUPPKTRCVD5_S  15
+
+
+/** USB_DOEPINT6_REG register
+ *  Device OUT Endpoint 6 Interrupt Register
+ */
+#define USB_DOEPINT6_REG (SOC_DPORT_USB_BASE + 0xbc8)
+/** USB_XFERCOMPL6 : R/W1C; bitpos: [0]; default: 0;
+ *  Transfer Completed Interrupt
+ *  0x0 : No Transfer Complete Interrupt
+ *  0x1 : Transfer Complete Interrupt
+ */
+#define USB_XFERCOMPL6    (BIT(0))
+#define USB_XFERCOMPL6_M  (USB_XFERCOMPL6_V << USB_XFERCOMPL6_S)
+#define USB_XFERCOMPL6_V  0x00000001
+#define USB_XFERCOMPL6_S  0
+/** USB_EPDISBLD6 : R/W1C; bitpos: [1]; default: 0;
+ *  Endpoint Disabled Interrupt
+ *  0x0 : No Endpoint Disabled Interrupt
+ *  0x1 : Endpoint Disabled Interrupt
+ */
+#define USB_EPDISBLD6    (BIT(1))
+#define USB_EPDISBLD6_M  (USB_EPDISBLD6_V << USB_EPDISBLD6_S)
+#define USB_EPDISBLD6_V  0x00000001
+#define USB_EPDISBLD6_S  1
+/** USB_AHBERR6 : R/W1C; bitpos: [2]; default: 0;
+ *  AHB Error
+ *  0x0 : No AHB Error Interrupt
+ *  0x1 : AHB Error interrupt
+ */
+#define USB_AHBERR6    (BIT(2))
+#define USB_AHBERR6_M  (USB_AHBERR6_V << USB_AHBERR6_S)
+#define USB_AHBERR6_V  0x00000001
+#define USB_AHBERR6_S  2
+/** USB_SETUP6 : R/W1C; bitpos: [3]; default: 0;
+ *  SETUP Phase Done
+ *  0x0 : No SETUP Phase Done
+ *  0x1 : SETUP Phase Done
+ */
+#define USB_SETUP6    (BIT(3))
+#define USB_SETUP6_M  (USB_SETUP6_V << USB_SETUP6_S)
+#define USB_SETUP6_V  0x00000001
+#define USB_SETUP6_S  3
+/** USB_OUTTKNEPDIS6 : R/W1C; bitpos: [4]; default: 0;
+ *  OUT Token Received When Endpoint Disabled
+ *  0x0 : No OUT Token Received When Endpoint Disabled
+ *  0x1 : OUT Token Received When Endpoint Disabled
+ */
+#define USB_OUTTKNEPDIS6    (BIT(4))
+#define USB_OUTTKNEPDIS6_M  (USB_OUTTKNEPDIS6_V << USB_OUTTKNEPDIS6_S)
+#define USB_OUTTKNEPDIS6_V  0x00000001
+#define USB_OUTTKNEPDIS6_S  4
+/** USB_STSPHSERCVD6 : R/W1C; bitpos: [5]; default: 0;
+ *  Status Phase Received for Control Write
+ *  0x0 : No Status Phase Received for Control Write
+ *  0x1 : Status Phase Received for Control Write
+ */
+#define USB_STSPHSERCVD6    (BIT(5))
+#define USB_STSPHSERCVD6_M  (USB_STSPHSERCVD6_V << USB_STSPHSERCVD6_S)
+#define USB_STSPHSERCVD6_V  0x00000001
+#define USB_STSPHSERCVD6_S  5
+/** USB_BACK2BACKSETUP6 : R/W1C; bitpos: [6]; default: 0;
+ *  Back-to-Back SETUP Packets Received
+ *  0x0 : No Back-to-Back SETUP Packets Received
+ *  0x1 : Back-to-Back SETUP Packets Received
+ */
+#define USB_BACK2BACKSETUP6    (BIT(6))
+#define USB_BACK2BACKSETUP6_M  (USB_BACK2BACKSETUP6_V << USB_BACK2BACKSETUP6_S)
+#define USB_BACK2BACKSETUP6_V  0x00000001
+#define USB_BACK2BACKSETUP6_S  6
+/** USB_OUTPKTERR6 : R/W1C; bitpos: [8]; default: 0;
+ *  OUT Packet Error
+ *  0x0 : No OUT Packet Error
+ *  0x1 : OUT Packet Error
+ */
+#define USB_OUTPKTERR6    (BIT(8))
+#define USB_OUTPKTERR6_M  (USB_OUTPKTERR6_V << USB_OUTPKTERR6_S)
+#define USB_OUTPKTERR6_V  0x00000001
+#define USB_OUTPKTERR6_S  8
+/** USB_BNAINTR6 : R/W1C; bitpos: [9]; default: 0;
+ *  Buffer Not Available Interrupt
+ *  0x0 : No BNA interrupt
+ *  0x1 : BNA interrupt
+ */
+#define USB_BNAINTR6    (BIT(9))
+#define USB_BNAINTR6_M  (USB_BNAINTR6_V << USB_BNAINTR6_S)
+#define USB_BNAINTR6_V  0x00000001
+#define USB_BNAINTR6_S  9
+/** USB_PKTDRPSTS6 : R/W1C; bitpos: [11]; default: 0;
+ *  0x0 : No interrupt
+ *  0x1 : Packet Drop Status interrupt
+ */
+#define USB_PKTDRPSTS6    (BIT(11))
+#define USB_PKTDRPSTS6_M  (USB_PKTDRPSTS6_V << USB_PKTDRPSTS6_S)
+#define USB_PKTDRPSTS6_V  0x00000001
+#define USB_PKTDRPSTS6_S  11
+/** USB_BBLEERR6 : R/W1C; bitpos: [12]; default: 0;
+ *  0x0 : No BbleErr interrupt
+ *  0x1 : BbleErr interrupt
+ */
+#define USB_BBLEERR6    (BIT(12))
+#define USB_BBLEERR6_M  (USB_BBLEERR6_V << USB_BBLEERR6_S)
+#define USB_BBLEERR6_V  0x00000001
+#define USB_BBLEERR6_S  12
+/** USB_NAKINTRPT6 : R/W1C; bitpos: [13]; default: 0;
+ *  0x0 : No NAK interrupt
+ *  0x1 : NAK Interrupt
+ */
+#define USB_NAKINTRPT6    (BIT(13))
+#define USB_NAKINTRPT6_M  (USB_NAKINTRPT6_V << USB_NAKINTRPT6_S)
+#define USB_NAKINTRPT6_V  0x00000001
+#define USB_NAKINTRPT6_S  13
+/** USB_NYEPINTRPT6 : R/W1C; bitpos: [14]; default: 0;
+ *  0x0 : No NYET interrupt
+ *  0x1 : NYET Interrupt
+ */
+#define USB_NYEPINTRPT6    (BIT(14))
+#define USB_NYEPINTRPT6_M  (USB_NYEPINTRPT6_V << USB_NYEPINTRPT6_S)
+#define USB_NYEPINTRPT6_V  0x00000001
+#define USB_NYEPINTRPT6_S  14
+/** USB_STUPPKTRCVD6 : R/W1C; bitpos: [15]; default: 0;
+ *  0x0 : No Setup packet received
+ *  0x1 : Setup packet received
+ */
+#define USB_STUPPKTRCVD6    (BIT(15))
+#define USB_STUPPKTRCVD6_M  (USB_STUPPKTRCVD6_V << USB_STUPPKTRCVD6_S)
+#define USB_STUPPKTRCVD6_V  0x00000001
+#define USB_STUPPKTRCVD6_S  15
+
+
+
+
+/** configuration registers */
+/** USB_GAHBCFG_REG register
+ *  AHB Configuration Register
+ */
+#define USB_GAHBCFG_REG (SOC_DPORT_USB_BASE + 0x8)
+/** USB_GLBLLNTRMSK : R/W; bitpos: [0]; default: 0;
+ *  1'b0: Mask the interrupt assertion to the application.
+ *  1'b1: Unmask the interrupt assertion to the application
+ */
+#define USB_GLBLLNTRMSK    (BIT(0))
+#define USB_GLBLLNTRMSK_M  (USB_GLBLLNTRMSK_V << USB_GLBLLNTRMSK_S)
+#define USB_GLBLLNTRMSK_V  0x00000001
+#define USB_GLBLLNTRMSK_S  0
+/** USB_HBSTLEN : R/W; bitpos: [5:1]; default: 0;
+ *  this field is used in Internal DMA modes
+ *  4'b0000 Single
+ *  4'b0001: INCR
+ *  4'b0011 INCR4
+ *  4'b0101 INCR8
+ *  4'b0111 INCR16
+ *  Others: Reserved
+ */
+#define USB_HBSTLEN    0x0000000F
+#define USB_HBSTLEN_M  (USB_HBSTLEN_V << USB_HBSTLEN_S)
+#define USB_HBSTLEN_V  0x0000000F
+#define USB_HBSTLEN_S  1
+/** USB_DMAEN : R/W; bitpos: [5]; default: 0;
+ *  This bit is always 0 when Slave-Only mode has been selected
+ *  1'b0:Core operates in Slave mode
+ *  1'b1:Core operates in a DMA mode
+ */
+#define USB_DMAEN    (BIT(5))
+#define USB_DMAEN_M  (USB_DMAEN_V << USB_DMAEN_S)
+#define USB_DMAEN_V  0x00000001
+#define USB_DMAEN_S  5
+/** USB_NPTXFEMPLVL : R/W; bitpos: [7]; default: 0;
+ *  Non-Periodic TxFIFO Empty Level
+ *  1'b0: DIEPINTn_REG.REG_TXFEMP interrupt indicates that the Non-Periodic TxFIFO is
+ *  half empty or that the IN Endpoint TxFIFO is half empty
+ *  1'b1: GINTSTS_REG.USB_NPTXFEMP interrupt indicates that the Non-Periodic TxFIFO is
+ *  completely empty or that the IN Endpoint TxFIFO is completely empty
+ */
+#define USB_NPTXFEMPLVL    (BIT(7))
+#define USB_NPTXFEMPLVL_M  (USB_NPTXFEMPLVL_V << USB_NPTXFEMPLVL_S)
+#define USB_NPTXFEMPLVL_V  0x00000001
+#define USB_NPTXFEMPLVL_S  7
+/** USB_PTXFEMPLVL : R/W; bitpos: [8]; default: 0;
+ *  Indicates when the Periodic TxFIFO Empty Interrupt bit in the Core Interrupt
+ *  register (GINTSTS_REG.USB_PTXFEMP) is triggered. This bit is used only in Slave
+ *  mode
+ *  1'b0: GINTSTS_REG.USB_PTXFEMP interrupt indicates that the Periodic TxFIFO is half
+ *  empty
+ *  1'b1: GINTSTS_REG.USB_PTXFEMP interrupt indicates that the Periodic TxFIFO is
+ *  completely empty
+ */
+#define USB_PTXFEMPLVL    (BIT(8))
+#define USB_PTXFEMPLVL_M  (USB_PTXFEMPLVL_V << USB_PTXFEMPLVL_S)
+#define USB_PTXFEMPLVL_V  0x00000001
+#define USB_PTXFEMPLVL_S  8
+/** USB_REMMEMSUPP : R/W; bitpos: [21]; default: 0;
+ *  Remote Memory Support (RemMemSupp) This bit is programmed to enable the
+ *  functionality to wait for thesystem DMA Done Signal for the DMA Write Transfers
+ *  1'b0:Remote Memory Support Feature disabled
+ *  1'b1:Remote Memory Support Feature enabled
+ */
+#define USB_REMMEMSUPP    (BIT(21))
+#define USB_REMMEMSUPP_M  (USB_REMMEMSUPP_V << USB_REMMEMSUPP_S)
+#define USB_REMMEMSUPP_V  0x00000001
+#define USB_REMMEMSUPP_S  21
+/** USB_NOTIALLDMAWRIT : R/W; bitpos: [22]; default: 0;
+ *  Notify All DMA Write Transactions (NotiAllDmaWrit) This bit is programmed to enable
+ *  the System DMA Done functionality for all the DMA write Transactions corresponding
+ *  to the Channel/Endpoint. This bit is valid only when GAHBCFG.RemMemSupp is set to 1
+ */
+#define USB_NOTIALLDMAWRIT    (BIT(22))
+#define USB_NOTIALLDMAWRIT_M  (USB_NOTIALLDMAWRIT_V << USB_NOTIALLDMAWRIT_S)
+#define USB_NOTIALLDMAWRIT_V  0x00000001
+#define USB_NOTIALLDMAWRIT_S  22
+/** USB_AHBSINGLE : R/W; bitpos: [23]; default: 0;
+ *  AHB Single Support (AHBSingle) This bit when programmed supports Single transfers
+ *  for the remaining data in a transfer when the core is operating in DMA mode
+ *  1'b0: The remaining data in the transfer is sent using INCR burst size
+ *  1'b1: The remaining data in the transfer is sent using Single burst size
+ */
+#define USB_AHBSINGLE    (BIT(23))
+#define USB_AHBSINGLE_M  (USB_AHBSINGLE_V << USB_AHBSINGLE_S)
+#define USB_AHBSINGLE_V  0x00000001
+#define USB_AHBSINGLE_S  23
+/** USB_INVDESCENDIANESS : R/W; bitpos: [24]; default: 0;
+ *  Invert Descriptor Endianess
+ *  1'b0: Descriptor Endianness is same as AHB Master Endianness
+ *  1'b1:Invert Descriptor Endianess according to AHB Master endianness
+ */
+#define USB_INVDESCENDIANESS    (BIT(24))
+#define USB_INVDESCENDIANESS_M  (USB_INVDESCENDIANESS_V << USB_INVDESCENDIANESS_S)
+#define USB_INVDESCENDIANESS_V  0x00000001
+#define USB_INVDESCENDIANESS_S  24
+
+
+/** USB_GUSBCFG_REG register
+ *  USB Configuration Register
+ */
+#define USB_GUSBCFG_REG (SOC_DPORT_USB_BASE + 0xc)
+/** USB_TOUTCAL : R/W; bitpos: [3:0]; default: 0;
+ *  FS Timeout Calibration
+ */
+#define USB_TOUTCAL    0x00000007
+#define USB_TOUTCAL_M  (USB_TOUTCAL_V << USB_TOUTCAL_S)
+#define USB_TOUTCAL_V  0x00000007
+#define USB_TOUTCAL_S  0
+/** USB_PHYIF : R/W; bitpos: [3]; default: 0;
+ *  The application uses this bit to configure the core to support a
+ *  UTMI+ PHY with an 8- or 16-bit interface. When a ULPI PHY is
+ *  chosen, this must be Set to 8-bit mode
+ *  1'b0: 8 bits
+ *  1'b1: 16 bits
+ */
+#define USB_PHYIF    (BIT(3))
+#define USB_PHYIF_M  (USB_PHYIF_V << USB_PHYIF_S)
+#define USB_PHYIF_V  0x00000001
+#define USB_PHYIF_S  3
+/** USB_ULPI_UTMI_SEL : RO; bitpos: [4]; default: 0;
+ *  1'b0: UTMI+ Interface
+ *  1'b1: ULPI Interface
+ */
+#define USB_ULPI_UTMI_SEL    (BIT(4))
+#define USB_ULPI_UTMI_SEL_M  (USB_ULPI_UTMI_SEL_V << USB_ULPI_UTMI_SEL_S)
+#define USB_ULPI_UTMI_SEL_V  0x00000001
+#define USB_ULPI_UTMI_SEL_S  4
+/** USB_FSINTF : R/W; bitpos: [5]; default: 0;
+ *  1'b0: 6-pin unidirectional full-speed serial interface
+ *  1'b1: 3-pin bidirectional full-speed serial interface
+ */
+#define USB_FSINTF    (BIT(5))
+#define USB_FSINTF_M  (USB_FSINTF_V << USB_FSINTF_S)
+#define USB_FSINTF_V  0x00000001
+#define USB_FSINTF_S  5
+/** USB_PHYSEL : RO; bitpos: [6]; default: 1;
+ *  1'b0: USB 2.0 high-speed UTMI+ or ULPI PHY
+ *  1'b1: USB 1.1 full-speed serial transceiver
+ */
+#define USB_PHYSEL    (BIT(6))
+#define USB_PHYSEL_M  (USB_PHYSEL_V << USB_PHYSEL_S)
+#define USB_PHYSEL_V  0x00000001
+#define USB_PHYSEL_S  6
+/** USB_SRPCAP : R/W; bitpos: [8]; default: 0;
+ *  1'b0: SRP capability is not enabled
+ *  1'b1: SRP capability is enabled
+ */
+#define USB_SRPCAP    (BIT(8))
+#define USB_SRPCAP_M  (USB_SRPCAP_V << USB_SRPCAP_S)
+#define USB_SRPCAP_V  0x00000001
+#define USB_SRPCAP_S  8
+/** USB_HNPCAP : R/W; bitpos: [9]; default: 0;
+ *  1'b0: HNP capability is not enabled
+ *  1'b1: HNP capability is enabled
+ */
+#define USB_HNPCAP    (BIT(9))
+#define USB_HNPCAP_M  (USB_HNPCAP_V << USB_HNPCAP_S)
+#define USB_HNPCAP_V  0x00000001
+#define USB_HNPCAP_S  9
+/** USB_USBTRDTIM : R/W; bitpos: [14:10]; default: 5;
+ *  4'h5: When the MAC interface is 16-bit UTMI+
+ *  4'h9: When the MAC interface is 8-bit UTMI+
+ */
+#define USB_USBTRDTIM    0x0000000F
+#define USB_USBTRDTIM_M  (USB_USBTRDTIM_V << USB_USBTRDTIM_S)
+#define USB_USBTRDTIM_V  0x0000000F
+#define USB_USBTRDTIM_S  10
+/** USB_TERMSELDLPULSE : R/W; bitpos: [22]; default: 0;
+ *  TermSel DLine Pulsing Selection
+ *  1'b0: Data line pulsing using utmi_txvalid (Default)
+ *  1'b1: Data line pulsing using utmi_termsel
+ */
+#define USB_TERMSELDLPULSE    (BIT(22))
+#define USB_TERMSELDLPULSE_M  (USB_TERMSELDLPULSE_V << USB_TERMSELDLPULSE_S)
+#define USB_TERMSELDLPULSE_V  0x00000001
+#define USB_TERMSELDLPULSE_S  22
+/** USB_TXENDDELAY : R/W; bitpos: [28]; default: 0;
+ *  1'b0 : Normal Mode
+ *  1'b1 : Tx End delay
+ */
+#define USB_TXENDDELAY    (BIT(28))
+#define USB_TXENDDELAY_M  (USB_TXENDDELAY_V << USB_TXENDDELAY_S)
+#define USB_TXENDDELAY_V  0x00000001
+#define USB_TXENDDELAY_S  28
+/** USB_FORCEHSTMODE : R/W; bitpos: [29]; default: 0;
+ *  1'b0 : Normal Mode
+ *  1'b1 : Force Host Mode
+ */
+#define USB_FORCEHSTMODE    (BIT(29))
+#define USB_FORCEHSTMODE_M  (USB_FORCEHSTMODE_V << USB_FORCEHSTMODE_S)
+#define USB_FORCEHSTMODE_V  0x00000001
+#define USB_FORCEHSTMODE_S  29
+/** USB_FORCEDEVMODE : R/W; bitpos: [30]; default: 0;
+ *  1'b0 : Normal Mode
+ *  1'b1 : Force Device Mode
+ */
+#define USB_FORCEDEVMODE    (BIT(30))
+#define USB_FORCEDEVMODE_M  (USB_FORCEDEVMODE_V << USB_FORCEDEVMODE_S)
+#define USB_FORCEDEVMODE_V  0x00000001
+#define USB_FORCEDEVMODE_S  30
+/** USB_CORRUPTTXPKT : R/W; bitpos: [31]; default: 0;
+ *  This bit is for debug purposes only. Never Set this bit to 1. The application
+ *  should always write 1'b0 to this bit
+ *  1'b0:Normal Mode
+ *  1'b1:Debug Mode
+ */
+#define USB_CORRUPTTXPKT    (BIT(31))
+#define USB_CORRUPTTXPKT_M  (USB_CORRUPTTXPKT_V << USB_CORRUPTTXPKT_S)
+#define USB_CORRUPTTXPKT_V  0x00000001
+#define USB_CORRUPTTXPKT_S  31
+
+
+/** USB_GRSTCTL_REG register
+ *  Reset Register
+ */
+#define USB_GRSTCTL_REG (SOC_DPORT_USB_BASE + 0x10)
+/** USB_CSFTRST : R_WS_SC; bitpos: [0]; default: 0;
+ *  Core Soft Reset
+ */
+#define USB_CSFTRST    (BIT(0))
+#define USB_CSFTRST_M  (USB_CSFTRST_V << USB_CSFTRST_S)
+#define USB_CSFTRST_V  0x00000001
+#define USB_CSFTRST_S  0
+/** USB_PIUFSSFTRST : R_WS_SC; bitpos: [1]; default: 0;
+ *  1'b0: No Reset
+ *  1'b1:PIU FS Dedicated Controller Soft Reset
+ */
+#define USB_PIUFSSFTRST    (BIT(1))
+#define USB_PIUFSSFTRST_M  (USB_PIUFSSFTRST_V << USB_PIUFSSFTRST_S)
+#define USB_PIUFSSFTRST_V  0x00000001
+#define USB_PIUFSSFTRST_S  1
+/** USB_FRMCNTRRST : R/W1S; bitpos: [2]; default: 0;
+ *  Host only. Host Frame Counter Reset.The application writes this bit to reset the
+ *  (micro)Frame number counter inside the core. When the (micro)Frame counter is
+ *  reset, the subsequent SOF sent out by the core has a (micro)Frame number of 0
+ */
+#define USB_FRMCNTRRST    (BIT(2))
+#define USB_FRMCNTRRST_M  (USB_FRMCNTRRST_V << USB_FRMCNTRRST_S)
+#define USB_FRMCNTRRST_V  0x00000001
+#define USB_FRMCNTRRST_S  2
+/** USB_RXFFLSH : R/W1S; bitpos: [4]; default: 0;
+ *  RxFIFO Flush. The application can flush the entire RxFIFO using this bit, but must
+ *  first ensure that the core is not in the middle of a transaction.The application
+ *  must only write to this bit after checking that the controller is neither reading
+ *  from the RxFIFO nor writing to the RxFIFO
+ *  1'b0:Does not flush the entire RxFIFO
+ *  1'b1:flushes the entire RxFIFO
+ */
+#define USB_RXFFLSH    (BIT(4))
+#define USB_RXFFLSH_M  (USB_RXFFLSH_V << USB_RXFFLSH_S)
+#define USB_RXFFLSH_V  0x00000001
+#define USB_RXFFLSH_S  4
+/** USB_TXFFLSH : R/W1S; bitpos: [5]; default: 0;
+ *  TxFIFO Flush.This bit selectively flushes a single or all transmit FIFOs, but
+ *  cannot do so If the core is in the midst of a transaction.The application must
+ *  write this bit only after checking that the core is neither writing to the TxFIFO
+ *  nor reading from the TxFIFO.
+ */
+#define USB_TXFFLSH    (BIT(5))
+#define USB_TXFFLSH_M  (USB_TXFFLSH_V << USB_TXFFLSH_S)
+#define USB_TXFFLSH_V  0x00000001
+#define USB_TXFFLSH_S  5
+/** USB_TXFNUM : R/W; bitpos: [11:6]; default: 0;
+ *  TxFIFO Number.This is the FIFO number that must be flushed using the TxFIFO Flush
+ *  bit. This field must not be changed until the core clears the TxFIFO Flush bit
+ */
+#define USB_TXFNUM    0x0000001F
+#define USB_TXFNUM_M  (USB_TXFNUM_V << USB_TXFNUM_S)
+#define USB_TXFNUM_V  0x0000001F
+#define USB_TXFNUM_S  6
+/** USB_DMAREQ : RO; bitpos: [30]; default: 0;
+ *  DMA Request Signal
+ *  1'b0:No DMA request
+ *  1'b1:DMA request is in progress
+ */
+#define USB_DMAREQ    (BIT(30))
+#define USB_DMAREQ_M  (USB_DMAREQ_V << USB_DMAREQ_S)
+#define USB_DMAREQ_V  0x00000001
+#define USB_DMAREQ_S  30
+/** USB_AHBIDLE : RO; bitpos: [31]; default: 0;
+ *  AHB Master Idle
+ *  1'b0:Not Idle
+ *  1'b1:AHB Master Idle
+ */
+#define USB_AHBIDLE    (BIT(31))
+#define USB_AHBIDLE_M  (USB_AHBIDLE_V << USB_AHBIDLE_S)
+#define USB_AHBIDLE_V  0x00000001
+#define USB_AHBIDLE_S  31
+
+
+/** USB_GRXFSIZ_REG register
+ *  Receive FIFO Size Register
+ */
+#define USB_GRXFSIZ_REG (SOC_DPORT_USB_BASE + 0x24)
+/** USB_RXFDEP : R/W; bitpos: [16:0]; default: 256;
+ *  RxFIFO Depth.This value is in terms of 32-bit words.Minimum value is 16,Maximum
+ *  value is 32,768
+ */
+#define USB_RXFDEP    0x0000FFFF
+#define USB_RXFDEP_M  (USB_RXFDEP_V << USB_RXFDEP_S)
+#define USB_RXFDEP_V  0x0000FFFF
+#define USB_RXFDEP_S  0
+
+
+/** USB_GNPTXFSIZ_REG register
+ *  Non-periodic Transmit FIFO Size Register
+ */
+#define USB_GNPTXFSIZ_REG (SOC_DPORT_USB_BASE + 0x28)
+/** USB_NPTXFSTADDR : R/W; bitpos: [16:0]; default: 256;
+ *  The NPTxFStAddr field description is valid only for host mode.This field contains
+ *  the memory start address for Non-periodic Transmit FIFO RAM.
+ */
+#define USB_NPTXFSTADDR    0x0000FFFF
+#define USB_NPTXFSTADDR_M  (USB_NPTXFSTADDR_V << USB_NPTXFSTADDR_S)
+#define USB_NPTXFSTADDR_V  0x0000FFFF
+#define USB_NPTXFSTADDR_S  0
+/** USB_NPTXFDEP : R/W; bitpos: [32:16]; default: 256;
+ *  The NPTxFDep field description is valid only for host mode or device mode when
+ *  OTG_EN_DED_TX_FIFO=0.Minimum value is 16,Maximum value is 32,768.
+ */
+#define USB_NPTXFDEP    0x0000FFFF
+#define USB_NPTXFDEP_M  (USB_NPTXFDEP_V << USB_NPTXFDEP_S)
+#define USB_NPTXFDEP_V  0x0000FFFF
+#define USB_NPTXFDEP_S  16
+
+
+/** USB_GNPTXSTS_REG register
+ *  Non-periodic Transmit FIFO/Queue Status Register
+ */
+#define USB_GNPTXSTS_REG (SOC_DPORT_USB_BASE + 0x2c)
+/** USB_NPTXFSPCAVAIL : RO; bitpos: [16:0]; default: 256;
+ *  Non-periodic TxFIFO Space Avail.Indicates the amount of free space available in the
+ *  Non-periodic TxFIFO.Values are in terms of 32-bit words.
+ */
+#define USB_NPTXFSPCAVAIL    0x0000FFFF
+#define USB_NPTXFSPCAVAIL_M  (USB_NPTXFSPCAVAIL_V << USB_NPTXFSPCAVAIL_S)
+#define USB_NPTXFSPCAVAIL_V  0x0000FFFF
+#define USB_NPTXFSPCAVAIL_S  0
+/** USB_NPTXQSPCAVAIL : RO; bitpos: [20:16]; default: 4;
+ *  Non-periodic Transmit Request Queue Space Available.Indicates the amount of free
+ *  space available in the Non-periodic Transmit Request Queue. This queue holds both
+ *  IN and OUT requests in Host mode. Device mode has only IN requests.
+ */
+#define USB_NPTXQSPCAVAIL    0x0000000F
+#define USB_NPTXQSPCAVAIL_M  (USB_NPTXQSPCAVAIL_V << USB_NPTXQSPCAVAIL_S)
+#define USB_NPTXQSPCAVAIL_V  0x0000000F
+#define USB_NPTXQSPCAVAIL_S  16
+/** USB_NPTXQTOP : RO; bitpos: [31:24]; default: 0;
+ *  Top of the Non-periodic Transmit Request Queue.
+ *  Bits [30:27]: Channel/endpoint number.
+ *  Bits [26:25]:  2'b00: IN/OUT token   2'b01: Zero-length transmit packet (device
+ *  IN/host OUT)   2'b10: PING/CSPLIT token  2'b11: Channel halt command.
+ *  Bit [24]: Terminate (last Entry for selected channel/endpoint).
+ */
+#define USB_NPTXQTOP    0x0000007F
+#define USB_NPTXQTOP_M  (USB_NPTXQTOP_V << USB_NPTXQTOP_S)
+#define USB_NPTXQTOP_V  0x0000007F
+#define USB_NPTXQTOP_S  24
+
+
+/** USB_HCTSIZ0_REG register
+ *  Host Channel 0Transfer Size Register
+ */
+#define USB_HCTSIZ0_REG (SOC_DPORT_USB_BASE + 0x510)
+/** USB_H_XFERSIZE0 : R/W; bitpos: [19:0]; default: 0;
+ *  Non-Scatter/Gather DMA Mode: Transfer Size.
+ *  Scatter/Gather DMA Mode:
+ *  [18:16]: Reserved
+ *  [15:8]: NTD (Number of Transfer Descriptors)
+ */
+#define USB_H_XFERSIZE0    0x0007FFFF
+#define USB_H_XFERSIZE0_M  (USB_H_XFERSIZE0_V << USB_H_XFERSIZE0_S)
+#define USB_H_XFERSIZE0_V  0x0007FFFF
+#define USB_H_XFERSIZE0_S  0
+/** USB_H_PKTCNT0 : R/W; bitpos: [29:19]; default: 0;
+ *  when in Non-Scatter/Gather DMA mode: Packet Count . This field is programmed by the
+ *  application with the expected number of packets to be transmitted (OUT) or received
+ *  (IN).
+ *  Scatter/Gather DMA Mode: Reserved.
+ */
+#define USB_H_PKTCNT0    0x000003FF
+#define USB_H_PKTCNT0_M  (USB_H_PKTCNT0_V << USB_H_PKTCNT0_S)
+#define USB_H_PKTCNT0_V  0x000003FF
+#define USB_H_PKTCNT0_S  19
+/** USB_H_PID0 : R/W; bitpos: [31:29]; default: 0;
+ *  2'b00: DATA0
+ *  2'b01: DATA2
+ *  2'b10: DATA1
+ *  2'b11: MDATA (non-control)/SETUP (control)
+ */
+#define USB_H_PID0    0x00000003
+#define USB_H_PID0_M  (USB_H_PID0_V << USB_H_PID0_S)
+#define USB_H_PID0_V  0x00000003
+#define USB_H_PID0_S  29
+/** USB_H_DOPNG0 : R/W; bitpos: [31]; default: 0;
+ *  This bit is used only for OUT transfers. Setting this field to 1 directs the host
+ *  to do PING protocol
+ *  1'b0: No ping protocol
+ *  1'b1: Ping protocol
+ */
+#define USB_H_DOPNG0    (BIT(31))
+#define USB_H_DOPNG0_M  (USB_H_DOPNG0_V << USB_H_DOPNG0_S)
+#define USB_H_DOPNG0_V  0x00000001
+#define USB_H_DOPNG0_S  31
+
+
+/** USB_HCTSIZ1_REG register
+ *  Host Channel 1Transfer Size Register
+ */
+#define USB_HCTSIZ1_REG (SOC_DPORT_USB_BASE + 0x530)
+/** USB_H_XFERSIZE1 : R/W; bitpos: [19:0]; default: 0;
+ *  Non-Scatter/Gather DMA Mode: Transfer Size.
+ *  Scatter/Gather DMA Mode:
+ *  [18:16]: Reserved
+ *  [15:8]: NTD (Number of Transfer Descriptors)
+ */
+#define USB_H_XFERSIZE1    0x0007FFFF
+#define USB_H_XFERSIZE1_M  (USB_H_XFERSIZE1_V << USB_H_XFERSIZE1_S)
+#define USB_H_XFERSIZE1_V  0x0007FFFF
+#define USB_H_XFERSIZE1_S  0
+/** USB_H_PKTCNT1 : R/W; bitpos: [29:19]; default: 0;
+ *  when in Non-Scatter/Gather DMA mode: Packet Count . This field is programmed by the
+ *  application with the expected number of packets to be transmitted (OUT) or received
+ *  (IN).
+ *  Scatter/Gather DMA Mode: Reserved.
+ */
+#define USB_H_PKTCNT1    0x000003FF
+#define USB_H_PKTCNT1_M  (USB_H_PKTCNT1_V << USB_H_PKTCNT1_S)
+#define USB_H_PKTCNT1_V  0x000003FF
+#define USB_H_PKTCNT1_S  19
+/** USB_H_PID1 : R/W; bitpos: [31:29]; default: 0;
+ *  2'b00: DATA0
+ *  2'b01: DATA2
+ *  2'b10: DATA1
+ *  2'b11: MDATA (non-control)/SETUP (control)
+ */
+#define USB_H_PID1    0x00000003
+#define USB_H_PID1_M  (USB_H_PID1_V << USB_H_PID1_S)
+#define USB_H_PID1_V  0x00000003
+#define USB_H_PID1_S  29
+/** USB_H_DOPNG1 : R/W; bitpos: [31]; default: 0;
+ *  This bit is used only for OUT transfers. Setting this field to 1 directs the host
+ *  to do PING protocol
+ *  1'b0: No ping protocol
+ *  1'b1: Ping protocol
+ */
+#define USB_H_DOPNG1    (BIT(31))
+#define USB_H_DOPNG1_M  (USB_H_DOPNG1_V << USB_H_DOPNG1_S)
+#define USB_H_DOPNG1_V  0x00000001
+#define USB_H_DOPNG1_S  31
+
+
+/** USB_HCTSIZ2_REG register
+ *  Host Channel 2Transfer Size Register
+ */
+#define USB_HCTSIZ2_REG (SOC_DPORT_USB_BASE + 0x550)
+/** USB_H_XFERSIZE2 : R/W; bitpos: [19:0]; default: 0;
+ *  Non-Scatter/Gather DMA Mode: Transfer Size.
+ *  Scatter/Gather DMA Mode:
+ *  [18:16]: Reserved
+ *  [15:8]: NTD (Number of Transfer Descriptors)
+ */
+#define USB_H_XFERSIZE2    0x0007FFFF
+#define USB_H_XFERSIZE2_M  (USB_H_XFERSIZE2_V << USB_H_XFERSIZE2_S)
+#define USB_H_XFERSIZE2_V  0x0007FFFF
+#define USB_H_XFERSIZE2_S  0
+/** USB_H_PKTCNT2 : R/W; bitpos: [29:19]; default: 0;
+ *  when in Non-Scatter/Gather DMA mode: Packet Count . This field is programmed by the
+ *  application with the expected number of packets to be transmitted (OUT) or received
+ *  (IN).
+ *  Scatter/Gather DMA Mode: Reserved.
+ */
+#define USB_H_PKTCNT2    0x000003FF
+#define USB_H_PKTCNT2_M  (USB_H_PKTCNT2_V << USB_H_PKTCNT2_S)
+#define USB_H_PKTCNT2_V  0x000003FF
+#define USB_H_PKTCNT2_S  19
+/** USB_H_PID2 : R/W; bitpos: [31:29]; default: 0;
+ *  2'b00: DATA0
+ *  2'b01: DATA2
+ *  2'b10: DATA1
+ *  2'b11: MDATA (non-control)/SETUP (control)
+ */
+#define USB_H_PID2    0x00000003
+#define USB_H_PID2_M  (USB_H_PID2_V << USB_H_PID2_S)
+#define USB_H_PID2_V  0x00000003
+#define USB_H_PID2_S  29
+/** USB_H_DOPNG2 : R/W; bitpos: [31]; default: 0;
+ *  This bit is used only for OUT transfers. Setting this field to 1 directs the host
+ *  to do PING protocol
+ *  1'b0: No ping protocol
+ *  1'b1: Ping protocol
+ */
+#define USB_H_DOPNG2    (BIT(31))
+#define USB_H_DOPNG2_M  (USB_H_DOPNG2_V << USB_H_DOPNG2_S)
+#define USB_H_DOPNG2_V  0x00000001
+#define USB_H_DOPNG2_S  31
+
+
+/** USB_HCTSIZ3_REG register
+ *  Host Channel 3Transfer Size Register
+ */
+#define USB_HCTSIZ3_REG (SOC_DPORT_USB_BASE + 0x570)
+/** USB_H_XFERSIZE3 : R/W; bitpos: [19:0]; default: 0;
+ *  Non-Scatter/Gather DMA Mode: Transfer Size.
+ *  Scatter/Gather DMA Mode:
+ *  [18:16]: Reserved
+ *  [15:8]: NTD (Number of Transfer Descriptors)
+ */
+#define USB_H_XFERSIZE3    0x0007FFFF
+#define USB_H_XFERSIZE3_M  (USB_H_XFERSIZE3_V << USB_H_XFERSIZE3_S)
+#define USB_H_XFERSIZE3_V  0x0007FFFF
+#define USB_H_XFERSIZE3_S  0
+/** USB_H_PKTCNT3 : R/W; bitpos: [29:19]; default: 0;
+ *  when in Non-Scatter/Gather DMA mode: Packet Count . This field is programmed by the
+ *  application with the expected number of packets to be transmitted (OUT) or received
+ *  (IN).
+ *  Scatter/Gather DMA Mode: Reserved.
+ */
+#define USB_H_PKTCNT3    0x000003FF
+#define USB_H_PKTCNT3_M  (USB_H_PKTCNT3_V << USB_H_PKTCNT3_S)
+#define USB_H_PKTCNT3_V  0x000003FF
+#define USB_H_PKTCNT3_S  19
+/** USB_H_PID3 : R/W; bitpos: [31:29]; default: 0;
+ *  2'b00: DATA0
+ *  2'b01: DATA2
+ *  2'b10: DATA1
+ *  2'b11: MDATA (non-control)/SETUP (control)
+ */
+#define USB_H_PID3    0x00000003
+#define USB_H_PID3_M  (USB_H_PID3_V << USB_H_PID3_S)
+#define USB_H_PID3_V  0x00000003
+#define USB_H_PID3_S  29
+/** USB_H_DOPNG3 : R/W; bitpos: [31]; default: 0;
+ *  This bit is used only for OUT transfers. Setting this field to 1 directs the host
+ *  to do PING protocol
+ *  1'b0: No ping protocol
+ *  1'b1: Ping protocol
+ */
+#define USB_H_DOPNG3    (BIT(31))
+#define USB_H_DOPNG3_M  (USB_H_DOPNG3_V << USB_H_DOPNG3_S)
+#define USB_H_DOPNG3_V  0x00000001
+#define USB_H_DOPNG3_S  31
+
+
+/** USB_HCTSIZ4_REG register
+ *  Host Channel 4Transfer Size Register
+ */
+#define USB_HCTSIZ4_REG (SOC_DPORT_USB_BASE + 0x590)
+/** USB_H_XFERSIZE4 : R/W; bitpos: [19:0]; default: 0;
+ *  Non-Scatter/Gather DMA Mode: Transfer Size.
+ *  Scatter/Gather DMA Mode:
+ *  [18:16]: Reserved
+ *  [15:8]: NTD (Number of Transfer Descriptors)
+ */
+#define USB_H_XFERSIZE4    0x0007FFFF
+#define USB_H_XFERSIZE4_M  (USB_H_XFERSIZE4_V << USB_H_XFERSIZE4_S)
+#define USB_H_XFERSIZE4_V  0x0007FFFF
+#define USB_H_XFERSIZE4_S  0
+/** USB_H_PKTCNT4 : R/W; bitpos: [29:19]; default: 0;
+ *  when in Non-Scatter/Gather DMA mode: Packet Count . This field is programmed by the
+ *  application with the expected number of packets to be transmitted (OUT) or received
+ *  (IN).
+ *  Scatter/Gather DMA Mode: Reserved.
+ */
+#define USB_H_PKTCNT4    0x000003FF
+#define USB_H_PKTCNT4_M  (USB_H_PKTCNT4_V << USB_H_PKTCNT4_S)
+#define USB_H_PKTCNT4_V  0x000003FF
+#define USB_H_PKTCNT4_S  19
+/** USB_H_PID4 : R/W; bitpos: [31:29]; default: 0;
+ *  2'b00: DATA0
+ *  2'b01: DATA2
+ *  2'b10: DATA1
+ *  2'b11: MDATA (non-control)/SETUP (control)
+ */
+#define USB_H_PID4    0x00000003
+#define USB_H_PID4_M  (USB_H_PID4_V << USB_H_PID4_S)
+#define USB_H_PID4_V  0x00000003
+#define USB_H_PID4_S  29
+/** USB_H_DOPNG4 : R/W; bitpos: [31]; default: 0;
+ *  This bit is used only for OUT transfers. Setting this field to 1 directs the host
+ *  to do PING protocol
+ *  1'b0: No ping protocol
+ *  1'b1: Ping protocol
+ */
+#define USB_H_DOPNG4    (BIT(31))
+#define USB_H_DOPNG4_M  (USB_H_DOPNG4_V << USB_H_DOPNG4_S)
+#define USB_H_DOPNG4_V  0x00000001
+#define USB_H_DOPNG4_S  31
+
+
+/** USB_HCTSIZ5_REG register
+ *  Host Channel 5Transfer Size Register
+ */
+#define USB_HCTSIZ5_REG (SOC_DPORT_USB_BASE + 0x5b0)
+/** USB_H_XFERSIZE5 : R/W; bitpos: [19:0]; default: 0;
+ *  Non-Scatter/Gather DMA Mode: Transfer Size.
+ *  Scatter/Gather DMA Mode:
+ *  [18:16]: Reserved
+ *  [15:8]: NTD (Number of Transfer Descriptors)
+ */
+#define USB_H_XFERSIZE5    0x0007FFFF
+#define USB_H_XFERSIZE5_M  (USB_H_XFERSIZE5_V << USB_H_XFERSIZE5_S)
+#define USB_H_XFERSIZE5_V  0x0007FFFF
+#define USB_H_XFERSIZE5_S  0
+/** USB_H_PKTCNT5 : R/W; bitpos: [29:19]; default: 0;
+ *  when in Non-Scatter/Gather DMA mode: Packet Count . This field is programmed by the
+ *  application with the expected number of packets to be transmitted (OUT) or received
+ *  (IN).
+ *  Scatter/Gather DMA Mode: Reserved.
+ */
+#define USB_H_PKTCNT5    0x000003FF
+#define USB_H_PKTCNT5_M  (USB_H_PKTCNT5_V << USB_H_PKTCNT5_S)
+#define USB_H_PKTCNT5_V  0x000003FF
+#define USB_H_PKTCNT5_S  19
+/** USB_H_PID5 : R/W; bitpos: [31:29]; default: 0;
+ *  2'b00: DATA0
+ *  2'b01: DATA2
+ *  2'b10: DATA1
+ *  2'b11: MDATA (non-control)/SETUP (control)
+ */
+#define USB_H_PID5    0x00000003
+#define USB_H_PID5_M  (USB_H_PID5_V << USB_H_PID5_S)
+#define USB_H_PID5_V  0x00000003
+#define USB_H_PID5_S  29
+/** USB_H_DOPNG5 : R/W; bitpos: [31]; default: 0;
+ *  This bit is used only for OUT transfers. Setting this field to 1 directs the host
+ *  to do PING protocol
+ *  1'b0: No ping protocol
+ *  1'b1: Ping protocol
+ */
+#define USB_H_DOPNG5    (BIT(31))
+#define USB_H_DOPNG5_M  (USB_H_DOPNG5_V << USB_H_DOPNG5_S)
+#define USB_H_DOPNG5_V  0x00000001
+#define USB_H_DOPNG5_S  31
+
+
+/** USB_HCTSIZ6_REG register
+ *  Host Channel 6Transfer Size Register
+ */
+#define USB_HCTSIZ6_REG (SOC_DPORT_USB_BASE + 0x5d0)
+/** USB_H_XFERSIZE6 : R/W; bitpos: [19:0]; default: 0;
+ *  Non-Scatter/Gather DMA Mode: Transfer Size.
+ *  Scatter/Gather DMA Mode:
+ *  [18:16]: Reserved
+ *  [15:8]: NTD (Number of Transfer Descriptors)
+ */
+#define USB_H_XFERSIZE6    0x0007FFFF
+#define USB_H_XFERSIZE6_M  (USB_H_XFERSIZE6_V << USB_H_XFERSIZE6_S)
+#define USB_H_XFERSIZE6_V  0x0007FFFF
+#define USB_H_XFERSIZE6_S  0
+/** USB_H_PKTCNT6 : R/W; bitpos: [29:19]; default: 0;
+ *  when in Non-Scatter/Gather DMA mode: Packet Count . This field is programmed by the
+ *  application with the expected number of packets to be transmitted (OUT) or received
+ *  (IN).
+ *  Scatter/Gather DMA Mode: Reserved.
+ */
+#define USB_H_PKTCNT6    0x000003FF
+#define USB_H_PKTCNT6_M  (USB_H_PKTCNT6_V << USB_H_PKTCNT6_S)
+#define USB_H_PKTCNT6_V  0x000003FF
+#define USB_H_PKTCNT6_S  19
+/** USB_H_PID6 : R/W; bitpos: [31:29]; default: 0;
+ *  2'b00: DATA0
+ *  2'b01: DATA2
+ *  2'b10: DATA1
+ *  2'b11: MDATA (non-control)/SETUP (control)
+ */
+#define USB_H_PID6    0x00000003
+#define USB_H_PID6_M  (USB_H_PID6_V << USB_H_PID6_S)
+#define USB_H_PID6_V  0x00000003
+#define USB_H_PID6_S  29
+/** USB_H_DOPNG6 : R/W; bitpos: [31]; default: 0;
+ *  This bit is used only for OUT transfers. Setting this field to 1 directs the host
+ *  to do PING protocol
+ *  1'b0: No ping protocol
+ *  1'b1: Ping protocol
+ */
+#define USB_H_DOPNG6    (BIT(31))
+#define USB_H_DOPNG6_M  (USB_H_DOPNG6_V << USB_H_DOPNG6_S)
+#define USB_H_DOPNG6_V  0x00000001
+#define USB_H_DOPNG6_S  31
+
+
+/** USB_HCTSIZ7_REG register
+ *  Host Channel 7Transfer Size Register
+ */
+#define USB_HCTSIZ7_REG (SOC_DPORT_USB_BASE + 0x5f0)
+/** USB_H_XFERSIZE7 : R/W; bitpos: [19:0]; default: 0;
+ *  Non-Scatter/Gather DMA Mode: Transfer Size.
+ *  Scatter/Gather DMA Mode:
+ *  [18:16]: Reserved
+ *  [15:8]: NTD (Number of Transfer Descriptors)
+ */
+#define USB_H_XFERSIZE7    0x0007FFFF
+#define USB_H_XFERSIZE7_M  (USB_H_XFERSIZE7_V << USB_H_XFERSIZE7_S)
+#define USB_H_XFERSIZE7_V  0x0007FFFF
+#define USB_H_XFERSIZE7_S  0
+/** USB_H_PKTCNT7 : R/W; bitpos: [29:19]; default: 0;
+ *  when in Non-Scatter/Gather DMA mode: Packet Count . This field is programmed by the
+ *  application with the expected number of packets to be transmitted (OUT) or received
+ *  (IN).
+ *  Scatter/Gather DMA Mode: Reserved.
+ */
+#define USB_H_PKTCNT7    0x000003FF
+#define USB_H_PKTCNT7_M  (USB_H_PKTCNT7_V << USB_H_PKTCNT7_S)
+#define USB_H_PKTCNT7_V  0x000003FF
+#define USB_H_PKTCNT7_S  19
+/** USB_H_PID7 : R/W; bitpos: [31:29]; default: 0;
+ *  2'b00: DATA0
+ *  2'b01: DATA2
+ *  2'b10: DATA1
+ *  2'b11: MDATA (non-control)/SETUP (control)
+ */
+#define USB_H_PID7    0x00000003
+#define USB_H_PID7_M  (USB_H_PID7_V << USB_H_PID7_S)
+#define USB_H_PID7_V  0x00000003
+#define USB_H_PID7_S  29
+/** USB_H_DOPNG7 : R/W; bitpos: [31]; default: 0;
+ *  This bit is used only for OUT transfers. Setting this field to 1 directs the host
+ *  to do PING protocol
+ *  1'b0: No ping protocol
+ *  1'b1: Ping protocol
+ */
+#define USB_H_DOPNG7    (BIT(31))
+#define USB_H_DOPNG7_M  (USB_H_DOPNG7_V << USB_H_DOPNG7_S)
+#define USB_H_DOPNG7_V  0x00000001
+#define USB_H_DOPNG7_S  31
+
+
+
+
+/** Status registers */
+/** USB_GRXSTSR_REG register
+ *  Receive Status Debug Read Register
+ */
+#define USB_GRXSTSR_REG (SOC_DPORT_USB_BASE + 0x1c)
+/** USB_G_CHNUM : RO; bitpos: [4:0]; default: 0;
+ *  Channel Number: Host only. Indicates the channel number to which the current
+ *  received packet belongs.
+ *  Endpoint Number: Device only Indicates the endpoint number to which the current
+ *  received packet belongs
+ */
+#define USB_G_CHNUM    0x0000000F
+#define USB_G_CHNUM_M  (USB_G_CHNUM_V << USB_G_CHNUM_S)
+#define USB_G_CHNUM_V  0x0000000F
+#define USB_G_CHNUM_S  0
+/** USB_G_BCNT : RO; bitpos: [15:4]; default: 0;
+ *  In host mode, indicates the byte count of the received IN data Packet
+ *  In device mode, indicates the byte count of the received data packet
+ */
+#define USB_G_BCNT    0x000007FF
+#define USB_G_BCNT_M  (USB_G_BCNT_V << USB_G_BCNT_S)
+#define USB_G_BCNT_V  0x000007FF
+#define USB_G_BCNT_S  4
+/** USB_G_DPID : RO; bitpos: [17:15]; default: 0;
+ *  Data PID
+ *  0x0 (DATA0): DATA0
+ *  0x2 (DATA1): DATA1
+ *  0x1 (DATA2): DATA2
+ *  0x3 (MDATA): MDATA
+ */
+#define USB_G_DPID    0x00000003
+#define USB_G_DPID_M  (USB_G_DPID_V << USB_G_DPID_S)
+#define USB_G_DPID_V  0x00000003
+#define USB_G_DPID_S  15
+/** USB_G_PKTSTS : RO; bitpos: [21:17]; default: 0;
+ *  0x1 (OUTNAK): Global OUT NAK in device mode (triggers an Interrupt)
+ *  0x2 (INOUTDPRX): IN data packet received in host mode and  OUT data received in
+ *  device mode
+ *  0x3 (INOUTTRCOM): IN or OUT transfer completed in both host  and device (triggers
+ *  an interrupt)
+ *  0x4 (DSETUPCOM): SETUP transaction completed in device mode (triggers an interrupt)
+ *  0x5 (DTTOG): Data toggle error (triggers an interrupt) in host Mode
+ *  0x6 (DSETUPRX): SETUP data packet received in device mode
+ *  0x7 (CHHALT): Channel halted in host mode (triggers an  interrupt)
+ */
+#define USB_G_PKTSTS    0x0000000F
+#define USB_G_PKTSTS_M  (USB_G_PKTSTS_V << USB_G_PKTSTS_S)
+#define USB_G_PKTSTS_V  0x0000000F
+#define USB_G_PKTSTS_S  17
+/** USB_G_FN : RO; bitpos: [25:21]; default: 0;
+ *  This is the least significant 4 bits of the (micro)Frame number in which the packet
+ *  is received on the USB. This field is supported only when isochronous OUT endpoints
+ *  are supported
+ */
+#define USB_G_FN    0x0000000F
+#define USB_G_FN_M  (USB_G_FN_V << USB_G_FN_S)
+#define USB_G_FN_V  0x0000000F
+#define USB_G_FN_S  21
+
+
+/** USB_GRXSTSP_REG register
+ *  Receive Status Read/Pop Register
+ */
+#define USB_GRXSTSP_REG (SOC_DPORT_USB_BASE + 0x20)
+/** USB_CHNUM : RO; bitpos: [4:0]; default: 0;
+ *  Channel Number: Host only. Indicates the channel number to which the current
+ *  received packet belongs.
+ *  Endpoint Number: Device only Indicates the endpoint number to which the current
+ *  received packet belongs
+ */
+#define USB_CHNUM    0x0000000F
+#define USB_CHNUM_M  (USB_CHNUM_V << USB_CHNUM_S)
+#define USB_CHNUM_V  0x0000000F
+#define USB_CHNUM_S  0
+/** USB_BCNT : RO; bitpos: [15:4]; default: 0;
+ *  In host mode, indicates the byte count of the received IN data Packet
+ *  In device mode, indicates the byte count of the received data packet
+ */
+#define USB_BCNT    0x000007FF
+#define USB_BCNT_M  (USB_BCNT_V << USB_BCNT_S)
+#define USB_BCNT_V  0x000007FF
+#define USB_BCNT_S  4
+/** USB_DPID : RO; bitpos: [17:15]; default: 0;
+ *  Data PID
+ *  0x0 (DATA0): DATA0
+ *  0x2 (DATA1): DATA1
+ *  0x1 (DATA2): DATA2
+ *  0x3 (MDATA): MDATA
+ */
+#define USB_DPID    0x00000003
+#define USB_DPID_M  (USB_DPID_V << USB_DPID_S)
+#define USB_DPID_V  0x00000003
+#define USB_DPID_S  15
+/** USB_PKTSTS : RO; bitpos: [21:17]; default: 0;
+ *  0x1 (OUTNAK): Global OUT NAK in device mode (triggers an Interrupt)
+ *  0x2 (INOUTDPRX): IN data packet received in host mode and  OUT data packet received
+ *  in device mode
+ *  0x3 (INOUTTRCOM): IN or OUT transfer completed in both host  and device mode
+ *  (triggers an interrupt)
+ *  0x4 (DSETUPCOM): SETUP transaction completed in device mode (triggers an interrupt)
+ *  0x5 (DTTOG): Data toggle error (triggers an interrupt) in host Mode
+ *  0x6 (DSETUPRX): SETUP data packet received in device mode
+ *  0x7 (CHHALT): Channel halted in host mode (triggers an  interrupt)
+ */
+#define USB_PKTSTS    0x0000000F
+#define USB_PKTSTS_M  (USB_PKTSTS_V << USB_PKTSTS_S)
+#define USB_PKTSTS_V  0x0000000F
+#define USB_PKTSTS_S  17
+/** USB_FN : RO; bitpos: [25:21]; default: 0;
+ *  This is the least significant 4 bits of the (micro)Frame number in which the packet
+ *  is received on the USB. This field is supported only when isochronous OUT endpoints
+ *  are supported
+ */
+#define USB_FN    0x0000000F
+#define USB_FN_M  (USB_FN_V << USB_FN_S)
+#define USB_FN_V  0x0000000F
+#define USB_FN_S  21
+
+
+/** USB_GSNPSID_REG register
+ *  Synopsys ID Register
+ */
+#define USB_GSNPSID_REG (SOC_DPORT_USB_BASE + 0x40)
+/** USB_SYNOPSYSID : RO; bitpos: [32:0]; default: 1330921482;
+ *  ID register
+ */
+#define USB_SYNOPSYSID    0xFFFFFFFF
+#define USB_SYNOPSYSID_M  (USB_SYNOPSYSID_V << USB_SYNOPSYSID_S)
+#define USB_SYNOPSYSID_V  0xFFFFFFFF
+#define USB_SYNOPSYSID_S  0
+
+
+/** USB_GHWCFG1_REG register
+ *  User Hardware Configuration 1 Register
+ */
+#define USB_GHWCFG1_REG (SOC_DPORT_USB_BASE + 0x44)
+/** USB_EPDIR : RO; bitpos: [32:0]; default: 0;
+ *  This 32-bit field uses two bits per endpoint to determine the endpoint direction.
+ *  Bits [31:30]: Endpoint 15 direction
+ *  Bits [29:28]: Endpoint 14 direction
+ *  ...
+ *  Direction:
+ *  2'b00: BIDIR (IN and OUT) endpoint
+ *  2'b01: IN endpoint
+ *  2'b10: OUT endpoint
+ *  2'b11: Reserved
+ */
+#define USB_EPDIR    0xFFFFFFFF
+#define USB_EPDIR_M  (USB_EPDIR_V << USB_EPDIR_S)
+#define USB_EPDIR_V  0xFFFFFFFF
+#define USB_EPDIR_S  0
+
+
+/** USB_GHWCFG2_REG register
+ *  User Hardware Configuration 2 Register
+ */
+#define USB_GHWCFG2_REG (SOC_DPORT_USB_BASE + 0x48)
+/** USB_OTGMODE : RO; bitpos: [3:0]; default: 0;
+ *  3'b000: HNP- and SRP-Capable OTG (Host  Device)
+ */
+#define USB_OTGMODE    0x00000007
+#define USB_OTGMODE_M  (USB_OTGMODE_V << USB_OTGMODE_S)
+#define USB_OTGMODE_V  0x00000007
+#define USB_OTGMODE_S  0
+/** USB_OTGARCH : RO; bitpos: [5:3]; default: 2;
+ *  2'b10: Internal DMA
+ */
+#define USB_OTGARCH    0x00000003
+#define USB_OTGARCH_M  (USB_OTGARCH_V << USB_OTGARCH_S)
+#define USB_OTGARCH_V  0x00000003
+#define USB_OTGARCH_S  3
+/** USB_SINGPNT : RO; bitpos: [5]; default: 1;
+ *  Point-to-Point
+ *  1'b1: Single-point application (no hub and split support).
+ */
+#define USB_SINGPNT    (BIT(5))
+#define USB_SINGPNT_M  (USB_SINGPNT_V << USB_SINGPNT_S)
+#define USB_SINGPNT_V  0x00000001
+#define USB_SINGPNT_S  5
+/** USB_HSPHYTYPE : RO; bitpos: [8:6]; default: 0;
+ *  High-Speed PHY Interface Type
+ *  2'b00: High-Speed interface not supported
+ */
+#define USB_HSPHYTYPE    0x00000003
+#define USB_HSPHYTYPE_M  (USB_HSPHYTYPE_V << USB_HSPHYTYPE_S)
+#define USB_HSPHYTYPE_V  0x00000003
+#define USB_HSPHYTYPE_S  6
+/** USB_FSPHYTYPE : RO; bitpos: [10:8]; default: 1;
+ *  Full-Speed PHY Interface Type.
+ */
+#define USB_FSPHYTYPE    0x00000003
+#define USB_FSPHYTYPE_M  (USB_FSPHYTYPE_V << USB_FSPHYTYPE_S)
+#define USB_FSPHYTYPE_V  0x00000003
+#define USB_FSPHYTYPE_S  8
+/** USB_NUMDEVEPS : RO; bitpos: [14:10]; default: 6;
+ *  Number of Device Endpoints.
+ */
+#define USB_NUMDEVEPS    0x0000000F
+#define USB_NUMDEVEPS_M  (USB_NUMDEVEPS_V << USB_NUMDEVEPS_S)
+#define USB_NUMDEVEPS_V  0x0000000F
+#define USB_NUMDEVEPS_S  10
+/** USB_NUMHSTCHNL : RO; bitpos: [18:14]; default: 7;
+ *  Number of Host Channels.
+ */
+#define USB_NUMHSTCHNL    0x0000000F
+#define USB_NUMHSTCHNL_M  (USB_NUMHSTCHNL_V << USB_NUMHSTCHNL_S)
+#define USB_NUMHSTCHNL_V  0x0000000F
+#define USB_NUMHSTCHNL_S  14
+/** USB_PERIOSUPPORT : RO; bitpos: [18]; default: 1;
+ *  1'b0:Periodic OUT Channels is not Supported in Host Mode
+ *  1'b1:Periodic OUT Channels Supported in Host Mode
+ */
+#define USB_PERIOSUPPORT    (BIT(18))
+#define USB_PERIOSUPPORT_M  (USB_PERIOSUPPORT_V << USB_PERIOSUPPORT_S)
+#define USB_PERIOSUPPORT_V  0x00000001
+#define USB_PERIOSUPPORT_S  18
+/** USB_DYNFIFOSIZING : RO; bitpos: [19]; default: 1;
+ *  1'b0:Dynamic FIFO Sizing Disabled
+ *  1'b1:Dynamic FIFO Sizing Enabled
+ */
+#define USB_DYNFIFOSIZING    (BIT(19))
+#define USB_DYNFIFOSIZING_M  (USB_DYNFIFOSIZING_V << USB_DYNFIFOSIZING_S)
+#define USB_DYNFIFOSIZING_V  0x00000001
+#define USB_DYNFIFOSIZING_S  19
+/** USB_MULTIPROCINTRPT : RO; bitpos: [20]; default: 0;
+ *  1'b0: No Multi Processor Interrupt Enabled
+ *  1'b1:Multi Processor Interrupt Enabled
+ */
+#define USB_MULTIPROCINTRPT    (BIT(20))
+#define USB_MULTIPROCINTRPT_M  (USB_MULTIPROCINTRPT_V << USB_MULTIPROCINTRPT_S)
+#define USB_MULTIPROCINTRPT_V  0x00000001
+#define USB_MULTIPROCINTRPT_S  20
+/** USB_NPTXQDEPTH : RO; bitpos: [24:22]; default: 1;
+ *  Non-periodic Request Queue Depth
+ *  2'b01: 4
+ */
+#define USB_NPTXQDEPTH    0x00000003
+#define USB_NPTXQDEPTH_M  (USB_NPTXQDEPTH_V << USB_NPTXQDEPTH_S)
+#define USB_NPTXQDEPTH_V  0x00000003
+#define USB_NPTXQDEPTH_S  22
+/** USB_PTXQDEPTH : RO; bitpos: [26:24]; default: 2;
+ *  Host Mode Periodic Request Queue Depth.
+ *  2'b10: 8
+ */
+#define USB_PTXQDEPTH    0x00000003
+#define USB_PTXQDEPTH_M  (USB_PTXQDEPTH_V << USB_PTXQDEPTH_S)
+#define USB_PTXQDEPTH_V  0x00000003
+#define USB_PTXQDEPTH_S  24
+/** USB_TKNQDEPTH : RO; bitpos: [31:26]; default: 8;
+ *  Device Mode IN Token Sequence Learning Queue Depth.
+ */
+#define USB_TKNQDEPTH    0x0000001F
+#define USB_TKNQDEPTH_M  (USB_TKNQDEPTH_V << USB_TKNQDEPTH_S)
+#define USB_TKNQDEPTH_V  0x0000001F
+#define USB_TKNQDEPTH_S  26
+/** USB_OTG_ENABLE_IC_USB : RO; bitpos: [31]; default: 0;
+ *  0x0 (DISABLE): Disabled the IC_USB Full-Speed Serial Transceiver interface
+ *  0x1 (ENABLE): Enabled the IC_USB Full-Speed Serial Transceiver interface
+ */
+#define USB_OTG_ENABLE_IC_USB    (BIT(31))
+#define USB_OTG_ENABLE_IC_USB_M  (USB_OTG_ENABLE_IC_USB_V << USB_OTG_ENABLE_IC_USB_S)
+#define USB_OTG_ENABLE_IC_USB_V  0x00000001
+#define USB_OTG_ENABLE_IC_USB_S  31
+
+
+/** USB_GHWCFG3_REG register
+ *  User Hardware Configuration 3 Register
+ */
+#define USB_GHWCFG3_REG (SOC_DPORT_USB_BASE + 0x4c)
+/** USB_XFERSIZEWIDTH : RO; bitpos: [4:0]; default: 5;
+ *  Width of Transfer Size Counters
+ *  0x5 (WIDTH16): Width of Transfer Size Counter 16 bits
+ */
+#define USB_XFERSIZEWIDTH    0x0000000F
+#define USB_XFERSIZEWIDTH_M  (USB_XFERSIZEWIDTH_V << USB_XFERSIZEWIDTH_S)
+#define USB_XFERSIZEWIDTH_V  0x0000000F
+#define USB_XFERSIZEWIDTH_S  0
+/** USB_PKTSIZEWIDTH : RO; bitpos: [7:4]; default: 3;
+ *  Width of Packet Size Counters
+ *  3'b011: 7 bits
+ */
+#define USB_PKTSIZEWIDTH    0x00000007
+#define USB_PKTSIZEWIDTH_M  (USB_PKTSIZEWIDTH_V << USB_PKTSIZEWIDTH_S)
+#define USB_PKTSIZEWIDTH_V  0x00000007
+#define USB_PKTSIZEWIDTH_S  4
+/** USB_OTGEN : RO; bitpos: [7]; default: 1;
+ *  OTG Function Enabled.
+ */
+#define USB_OTGEN    (BIT(7))
+#define USB_OTGEN_M  (USB_OTGEN_V << USB_OTGEN_S)
+#define USB_OTGEN_V  0x00000001
+#define USB_OTGEN_S  7
+/** USB_I2CINTSEL : RO; bitpos: [8]; default: 0;
+ *  1'b0: I2C Interface is not available on the controller.
+ */
+#define USB_I2CINTSEL    (BIT(8))
+#define USB_I2CINTSEL_M  (USB_I2CINTSEL_V << USB_I2CINTSEL_S)
+#define USB_I2CINTSEL_V  0x00000001
+#define USB_I2CINTSEL_S  8
+/** USB_VNDCTLSUPT : RO; bitpos: [9]; default: 0;
+ *  Vendor Control Interface is not available .
+ */
+#define USB_VNDCTLSUPT    (BIT(9))
+#define USB_VNDCTLSUPT_M  (USB_VNDCTLSUPT_V << USB_VNDCTLSUPT_S)
+#define USB_VNDCTLSUPT_V  0x00000001
+#define USB_VNDCTLSUPT_S  9
+/** USB_OPTFEATURE : RO; bitpos: [10]; default: 1;
+ *  Optional Features have been Removed.
+ */
+#define USB_OPTFEATURE    (BIT(10))
+#define USB_OPTFEATURE_M  (USB_OPTFEATURE_V << USB_OPTFEATURE_S)
+#define USB_OPTFEATURE_V  0x00000001
+#define USB_OPTFEATURE_S  10
+/** USB_RSTTYPE : RO; bitpos: [11]; default: 0;
+ *  Asynchronous reset is used in the core
+ */
+#define USB_RSTTYPE    (BIT(11))
+#define USB_RSTTYPE_M  (USB_RSTTYPE_V << USB_RSTTYPE_S)
+#define USB_RSTTYPE_V  0x00000001
+#define USB_RSTTYPE_S  11
+/** USB_ADPSUPPORT : RO; bitpos: [12]; default: 0;
+ *  ADP logic is not present along with the controller.
+ */
+#define USB_ADPSUPPORT    (BIT(12))
+#define USB_ADPSUPPORT_M  (USB_ADPSUPPORT_V << USB_ADPSUPPORT_S)
+#define USB_ADPSUPPORT_V  0x00000001
+#define USB_ADPSUPPORT_S  12
+/** USB_HSICMODE : RO; bitpos: [13]; default: 0;
+ *  HSIC mode specified for Mode of Operation.
+ *  1'b0: Non-HSIC-capable
+ */
+#define USB_HSICMODE    (BIT(13))
+#define USB_HSICMODE_M  (USB_HSICMODE_V << USB_HSICMODE_S)
+#define USB_HSICMODE_V  0x00000001
+#define USB_HSICMODE_S  13
+/** USB_BCSUPPORT : RO; bitpos: [14]; default: 0;
+ *  1'b0: No Battery Charger Support
+ */
+#define USB_BCSUPPORT    (BIT(14))
+#define USB_BCSUPPORT_M  (USB_BCSUPPORT_V << USB_BCSUPPORT_S)
+#define USB_BCSUPPORT_V  0x00000001
+#define USB_BCSUPPORT_S  14
+/** USB_LPMMODE : RO; bitpos: [15]; default: 0;
+ *  LPM mode specified for Mode of Operation.
+ */
+#define USB_LPMMODE    (BIT(15))
+#define USB_LPMMODE_M  (USB_LPMMODE_V << USB_LPMMODE_S)
+#define USB_LPMMODE_V  0x00000001
+#define USB_LPMMODE_S  15
+/** USB_DFIFODEPTH : RO; bitpos: [32:16]; default: 256;
+ *  DFIFO Depth.This value is in terms of 32-bit words.
+ */
+#define USB_DFIFODEPTH    0x0000FFFF
+#define USB_DFIFODEPTH_M  (USB_DFIFODEPTH_V << USB_DFIFODEPTH_S)
+#define USB_DFIFODEPTH_V  0x0000FFFF
+#define USB_DFIFODEPTH_S  16
+
+
+/** USB_GHWCFG4_REG register
+ *  User Hardware Configuration 4 Register
+ */
+#define USB_GHWCFG4_REG (SOC_DPORT_USB_BASE + 0x50)
+/** USB_G_NUMDEVPERIOEPS : RO; bitpos: [4:0]; default: 0;
+ *  Number of Device Mode Periodic IN Endpoints.
+ */
+#define USB_G_NUMDEVPERIOEPS    0x0000000F
+#define USB_G_NUMDEVPERIOEPS_M  (USB_G_NUMDEVPERIOEPS_V << USB_G_NUMDEVPERIOEPS_S)
+#define USB_G_NUMDEVPERIOEPS_V  0x0000000F
+#define USB_G_NUMDEVPERIOEPS_S  0
+/** USB_G_PARTIALPWRDN : RO; bitpos: [4]; default: 1;
+ *  Enable Partial Power Down.
+ */
+#define USB_G_PARTIALPWRDN    (BIT(4))
+#define USB_G_PARTIALPWRDN_M  (USB_G_PARTIALPWRDN_V << USB_G_PARTIALPWRDN_S)
+#define USB_G_PARTIALPWRDN_V  0x00000001
+#define USB_G_PARTIALPWRDN_S  4
+/** USB_G_AHBFREQ : RO; bitpos: [5]; default: 1;
+ *  Minimum AHB Frequency Less Than 60 MHz
+ */
+#define USB_G_AHBFREQ    (BIT(5))
+#define USB_G_AHBFREQ_M  (USB_G_AHBFREQ_V << USB_G_AHBFREQ_S)
+#define USB_G_AHBFREQ_V  0x00000001
+#define USB_G_AHBFREQ_S  5
+/** USB_G_HIBERNATION : RO; bitpos: [6]; default: 0;
+ *  1'b0: Hibernation feature not enabled.
+ */
+#define USB_G_HIBERNATION    (BIT(6))
+#define USB_G_HIBERNATION_M  (USB_G_HIBERNATION_V << USB_G_HIBERNATION_S)
+#define USB_G_HIBERNATION_V  0x00000001
+#define USB_G_HIBERNATION_S  6
+/** USB_G_EXTENDEDHIBERNATION : RO; bitpos: [7]; default: 0;
+ *  Extended Hibernation feature not enabled
+ */
+#define USB_G_EXTENDEDHIBERNATION    (BIT(7))
+#define USB_G_EXTENDEDHIBERNATION_M  (USB_G_EXTENDEDHIBERNATION_V << USB_G_EXTENDEDHIBERNATION_S)
+#define USB_G_EXTENDEDHIBERNATION_V  0x00000001
+#define USB_G_EXTENDEDHIBERNATION_S  7
+/** USB_G_ACGSUPT : RO; bitpos: [12]; default: 0;
+ *  Active Clock Gating is not enabled.
+ */
+#define USB_G_ACGSUPT    (BIT(12))
+#define USB_G_ACGSUPT_M  (USB_G_ACGSUPT_V << USB_G_ACGSUPT_S)
+#define USB_G_ACGSUPT_V  0x00000001
+#define USB_G_ACGSUPT_S  12
+/** USB_G_ENHANCEDLPMSUPT : RO; bitpos: [13]; default: 1;
+ *  Enhanced LPM Support.
+ */
+#define USB_G_ENHANCEDLPMSUPT    (BIT(13))
+#define USB_G_ENHANCEDLPMSUPT_M  (USB_G_ENHANCEDLPMSUPT_V << USB_G_ENHANCEDLPMSUPT_S)
+#define USB_G_ENHANCEDLPMSUPT_V  0x00000001
+#define USB_G_ENHANCEDLPMSUPT_S  13
+/** USB_G_PHYDATAWIDTH : RO; bitpos: [16:14]; default: 2;
+ *  UTMI+ PHY/ULPI-to-Internal UTMI+ Wrapper Data Width (PhyDataWidth) When a ULPI PHY
+ *  is used, an internal wrapper converts ULPI to UTMI+
+ *  2'b10: 8/16 bits, software selectable
+ */
+#define USB_G_PHYDATAWIDTH    0x00000003
+#define USB_G_PHYDATAWIDTH_M  (USB_G_PHYDATAWIDTH_V << USB_G_PHYDATAWIDTH_S)
+#define USB_G_PHYDATAWIDTH_V  0x00000003
+#define USB_G_PHYDATAWIDTH_S  14
+/** USB_G_NUMCTLEPS : RO; bitpos: [20:16]; default: 0;
+ *  Number of Device Mode Control Endpoints in Addition to Endpoint 0
+ */
+#define USB_G_NUMCTLEPS    0x0000000F
+#define USB_G_NUMCTLEPS_M  (USB_G_NUMCTLEPS_V << USB_G_NUMCTLEPS_S)
+#define USB_G_NUMCTLEPS_V  0x0000000F
+#define USB_G_NUMCTLEPS_S  16
+/** USB_G_IDDQFLTR : RO; bitpos: [20]; default: 1;
+ *  IDDIG Filter Enable.
+ */
+#define USB_G_IDDQFLTR    (BIT(20))
+#define USB_G_IDDQFLTR_M  (USB_G_IDDQFLTR_V << USB_G_IDDQFLTR_S)
+#define USB_G_IDDQFLTR_V  0x00000001
+#define USB_G_IDDQFLTR_S  20
+/** USB_G_VBUSVALIDFLTR : RO; bitpos: [21]; default: 1;
+ *  VBUS Valid Filter Enabled.
+ */
+#define USB_G_VBUSVALIDFLTR    (BIT(21))
+#define USB_G_VBUSVALIDFLTR_M  (USB_G_VBUSVALIDFLTR_V << USB_G_VBUSVALIDFLTR_S)
+#define USB_G_VBUSVALIDFLTR_V  0x00000001
+#define USB_G_VBUSVALIDFLTR_S  21
+/** USB_G_AVALIDFLTR : RO; bitpos: [22]; default: 1;
+ *  a_valid Filter Enabled.
+ */
+#define USB_G_AVALIDFLTR    (BIT(22))
+#define USB_G_AVALIDFLTR_M  (USB_G_AVALIDFLTR_V << USB_G_AVALIDFLTR_S)
+#define USB_G_AVALIDFLTR_V  0x00000001
+#define USB_G_AVALIDFLTR_S  22
+/** USB_G_BVALIDFLTR : RO; bitpos: [23]; default: 1;
+ *  b_valid Filter Enabled.
+ */
+#define USB_G_BVALIDFLTR    (BIT(23))
+#define USB_G_BVALIDFLTR_M  (USB_G_BVALIDFLTR_V << USB_G_BVALIDFLTR_S)
+#define USB_G_BVALIDFLTR_V  0x00000001
+#define USB_G_BVALIDFLTR_S  23
+/** USB_G_SESSENDFLTR : RO; bitpos: [24]; default: 1;
+ *  session_end Filter Enabled.
+ */
+#define USB_G_SESSENDFLTR    (BIT(24))
+#define USB_G_SESSENDFLTR_M  (USB_G_SESSENDFLTR_V << USB_G_SESSENDFLTR_S)
+#define USB_G_SESSENDFLTR_V  0x00000001
+#define USB_G_SESSENDFLTR_S  24
+/** USB_G_DEDFIFOMODE : RO; bitpos: [25]; default: 1;
+ *  Enable Dedicated Transmit FIFO for device IN Endpoints
+ */
+#define USB_G_DEDFIFOMODE    (BIT(25))
+#define USB_G_DEDFIFOMODE_M  (USB_G_DEDFIFOMODE_V << USB_G_DEDFIFOMODE_S)
+#define USB_G_DEDFIFOMODE_V  0x00000001
+#define USB_G_DEDFIFOMODE_S  25
+/** USB_G_INEPS : RO; bitpos: [30:26]; default: 4;
+ *  Number of Device Mode IN Endpoints Including Control Endpoints.
+ */
+#define USB_G_INEPS    0x0000000F
+#define USB_G_INEPS_M  (USB_G_INEPS_V << USB_G_INEPS_S)
+#define USB_G_INEPS_V  0x0000000F
+#define USB_G_INEPS_S  26
+/** USB_G_DESCDMAENABLED : RO; bitpos: [30]; default: 1;
+ *  0x1: Scatter/Gather DMA configuration.
+ */
+#define USB_G_DESCDMAENABLED    (BIT(30))
+#define USB_G_DESCDMAENABLED_M  (USB_G_DESCDMAENABLED_V << USB_G_DESCDMAENABLED_S)
+#define USB_G_DESCDMAENABLED_V  0x00000001
+#define USB_G_DESCDMAENABLED_S  30
+/** USB_G_DESCDMA : RO; bitpos: [31]; default: 1;
+ *  Scatter/Gather DMA configuration
+ *  1'b1: Dynamic configuration
+ */
+#define USB_G_DESCDMA    (BIT(31))
+#define USB_G_DESCDMA_M  (USB_G_DESCDMA_V << USB_G_DESCDMA_S)
+#define USB_G_DESCDMA_V  0x00000001
+#define USB_G_DESCDMA_S  31
+
+
+/** USB_HFNUM_REG register
+ *  Frame Number configure Resigster
+ */
+#define USB_HFNUM_REG (SOC_DPORT_USB_BASE + 0x408)
+/** USB_FRNUM : RO; bitpos: [14:0]; default: 16383;
+ *  Frame Number
+ *  0x0 (INACTIVE): No SOF is transmitted
+ *  0x1 (ACTIVE): SOF is transmitted
+ */
+#define USB_FRNUM    0x00003FFF
+#define USB_FRNUM_M  (USB_FRNUM_V << USB_FRNUM_S)
+#define USB_FRNUM_V  0x00003FFF
+#define USB_FRNUM_S  0
+/** USB_FRREM : RO; bitpos: [32:16]; default: 0;
+ *  Frame Time Remaining.ndicates the amount of time remaining in the current
+ *  microframe
+ *  (HS) or Frame (FS/LS), in terms of PHY clocks.
+ */
+#define USB_FRREM    0x0000FFFF
+#define USB_FRREM_M  (USB_FRREM_V << USB_FRREM_S)
+#define USB_FRREM_V  0x0000FFFF
+#define USB_FRREM_S  16
+
+
+/** USB_HPTXSTS_REG register
+ *  Host Periodic Transmit FIFO/Queue Status Register
+ */
+#define USB_HPTXSTS_REG (SOC_DPORT_USB_BASE + 0x410)
+/** USB_PTXFSPCAVAIL : RO; bitpos: [16:0]; default: 256;
+ *  Periodic Transmit Data FIFO Space Available. Values are in terms of 32-bit words.
+ */
+#define USB_PTXFSPCAVAIL    0x0000FFFF
+#define USB_PTXFSPCAVAIL_M  (USB_PTXFSPCAVAIL_V << USB_PTXFSPCAVAIL_S)
+#define USB_PTXFSPCAVAIL_V  0x0000FFFF
+#define USB_PTXFSPCAVAIL_S  0
+/** USB_PTXQSPCAVAIL : RO; bitpos: [21:16]; default: 8;
+ *  Periodic Transmit Request Queue Space Available.
+ */
+#define USB_PTXQSPCAVAIL    0x0000001F
+#define USB_PTXQSPCAVAIL_M  (USB_PTXQSPCAVAIL_V << USB_PTXQSPCAVAIL_S)
+#define USB_PTXQSPCAVAIL_V  0x0000001F
+#define USB_PTXQSPCAVAIL_S  16
+/** USB_PTXQTOP : RO; bitpos: [32:24]; default: 0;
+ *  Bit [31]: Odd/Even (micro)Frame. 1'b0: send in even (micro)Frame
+ *  Bits [30:27]: Channel/endpoint number
+ *  Bits [26:25]: Type. 2'b00: IN/OUT.   2'b01: Zero-length packet.     2'b10: CSPLIT
+ *    2'b11: Disable channel command
+ *  Bit [24]: Terminate
+ */
+#define USB_PTXQTOP    0x000000FF
+#define USB_PTXQTOP_M  (USB_PTXQTOP_V << USB_PTXQTOP_S)
+#define USB_PTXQTOP_V  0x000000FF
+#define USB_PTXQTOP_S  24
+
+
+/** USB_HCDMAB$n_REG register
+ *  Host Channel $n DMA Buffer Address Register
+ */
+#define USB_HCDMAB$N_REG (SOC_DPORT_USB_BASE + 0x51c)
+/** USB_H_HCDMAB0 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address
+ */
+#define USB_H_HCDMAB0    0xFFFFFFFF
+#define USB_H_HCDMAB0_M  (USB_H_HCDMAB0_V << USB_H_HCDMAB0_S)
+#define USB_H_HCDMAB0_V  0xFFFFFFFF
+#define USB_H_HCDMAB0_S  0
+
+
+/** USB_HCDMAB1_REG register
+ *  Host Channel 1 DMA Buffer Address Register
+ */
+#define USB_HCDMAB1_REG (SOC_DPORT_USB_BASE + 0x53c)
+/** USB_H_HCDMAB1 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address
+ */
+#define USB_H_HCDMAB1    0xFFFFFFFF
+#define USB_H_HCDMAB1_M  (USB_H_HCDMAB1_V << USB_H_HCDMAB1_S)
+#define USB_H_HCDMAB1_V  0xFFFFFFFF
+#define USB_H_HCDMAB1_S  0
+
+
+/** USB_HCDMAB2_REG register
+ *  Host Channel 2 DMA Buffer Address Register
+ */
+#define USB_HCDMAB2_REG (SOC_DPORT_USB_BASE + 0x55c)
+/** USB_H_HCDMAB2 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address
+ */
+#define USB_H_HCDMAB2    0xFFFFFFFF
+#define USB_H_HCDMAB2_M  (USB_H_HCDMAB2_V << USB_H_HCDMAB2_S)
+#define USB_H_HCDMAB2_V  0xFFFFFFFF
+#define USB_H_HCDMAB2_S  0
+
+
+/** USB_HCDMAB3_REG register
+ *  Host Channel 3 DMA Buffer Address Register
+ */
+#define USB_HCDMAB3_REG (SOC_DPORT_USB_BASE + 0x57c)
+/** USB_H_HCDMAB3 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address
+ */
+#define USB_H_HCDMAB3    0xFFFFFFFF
+#define USB_H_HCDMAB3_M  (USB_H_HCDMAB3_V << USB_H_HCDMAB3_S)
+#define USB_H_HCDMAB3_V  0xFFFFFFFF
+#define USB_H_HCDMAB3_S  0
+
+
+/** USB_HCDMAB4_REG register
+ *  Host Channel 4 DMA Buffer Address Register
+ */
+#define USB_HCDMAB4_REG (SOC_DPORT_USB_BASE + 0x59c)
+/** USB_H_HCDMAB4 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address
+ */
+#define USB_H_HCDMAB4    0xFFFFFFFF
+#define USB_H_HCDMAB4_M  (USB_H_HCDMAB4_V << USB_H_HCDMAB4_S)
+#define USB_H_HCDMAB4_V  0xFFFFFFFF
+#define USB_H_HCDMAB4_S  0
+
+
+/** USB_HCDMAB5_REG register
+ *  Host Channel 5 DMA Buffer Address Register
+ */
+#define USB_HCDMAB5_REG (SOC_DPORT_USB_BASE + 0x5bc)
+/** USB_H_HCDMAB5 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address
+ */
+#define USB_H_HCDMAB5    0xFFFFFFFF
+#define USB_H_HCDMAB5_M  (USB_H_HCDMAB5_V << USB_H_HCDMAB5_S)
+#define USB_H_HCDMAB5_V  0xFFFFFFFF
+#define USB_H_HCDMAB5_S  0
+
+
+/** USB_HCDMAB6_REG register
+ *  Host Channel 6 DMA Buffer Address Register
+ */
+#define USB_HCDMAB6_REG (SOC_DPORT_USB_BASE + 0x5dc)
+/** USB_H_HCDMAB6 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address
+ */
+#define USB_H_HCDMAB6    0xFFFFFFFF
+#define USB_H_HCDMAB6_M  (USB_H_HCDMAB6_V << USB_H_HCDMAB6_S)
+#define USB_H_HCDMAB6_V  0xFFFFFFFF
+#define USB_H_HCDMAB6_S  0
+
+
+/** USB_HCDMAB7_REG register
+ *  Host Channel 7 DMA Buffer Address Register
+ */
+#define USB_HCDMAB7_REG (SOC_DPORT_USB_BASE + 0x5fc)
+/** USB_H_HCDMAB7 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address
+ */
+#define USB_H_HCDMAB7    0xFFFFFFFF
+#define USB_H_HCDMAB7_M  (USB_H_HCDMAB7_V << USB_H_HCDMAB7_S)
+#define USB_H_HCDMAB7_V  0xFFFFFFFF
+#define USB_H_HCDMAB7_S  0
+
+
+/** USB_DSTS_REG register
+ *  Device Status Register
+ */
+#define USB_DSTS_REG (SOC_DPORT_USB_BASE + 0x808)
+/** USB_SUSPSTS : RO; bitpos: [0]; default: 0;
+ *  Suspend Status
+ *  0x0 : No suspend state
+ *  0x1 : Suspend state
+ */
+#define USB_SUSPSTS    (BIT(0))
+#define USB_SUSPSTS_M  (USB_SUSPSTS_V << USB_SUSPSTS_S)
+#define USB_SUSPSTS_V  0x00000001
+#define USB_SUSPSTS_S  0
+/** USB_ENUMSPD : RO; bitpos: [3:1]; default: 1;
+ *  0x0 : High speed (PHY clock is running at 30 or 60 MHz)
+ *  0x1 : Full speed (PHY clock is running at 30 or 60 MHz)
+ *  0x2 : Low speed (PHY clock is running at 6 MHz)
+ *  0x3 : Full speed (PHY clock is running at 48 MHz)
+ */
+#define USB_ENUMSPD    0x00000003
+#define USB_ENUMSPD_M  (USB_ENUMSPD_V << USB_ENUMSPD_S)
+#define USB_ENUMSPD_V  0x00000003
+#define USB_ENUMSPD_S  1
+/** USB_ERRTICERR : RO; bitpos: [3]; default: 0;
+ *  0x0 : No Erratic Error
+ *  0x1 : Erratic Error
+ */
+#define USB_ERRTICERR    (BIT(3))
+#define USB_ERRTICERR_M  (USB_ERRTICERR_V << USB_ERRTICERR_S)
+#define USB_ERRTICERR_V  0x00000001
+#define USB_ERRTICERR_S  3
+/** USB_SOFFN : RO; bitpos: [22:8]; default: 0;
+ *  Frame or Microframe Number of the Received SOF (SOFFN).  This field contains a
+ *  Frame number.
+ */
+#define USB_SOFFN    0x00003FFF
+#define USB_SOFFN_M  (USB_SOFFN_V << USB_SOFFN_S)
+#define USB_SOFFN_V  0x00003FFF
+#define USB_SOFFN_S  8
+/** USB_DEVLNSTS : RO; bitpos: [24:22]; default: 0;
+ *  Device Line Status
+ *  DevLnSts[1]: Logic level of D+
+ *  DevLnSts[0]: Logic level of D-
+ */
+#define USB_DEVLNSTS    0x00000003
+#define USB_DEVLNSTS_M  (USB_DEVLNSTS_V << USB_DEVLNSTS_S)
+#define USB_DEVLNSTS_V  0x00000003
+#define USB_DEVLNSTS_S  22
+
+
+/** USB_DTXFSTS0_REG register
+ *  Device IN Endpoint Transmit FIFO Status Register 0
+ */
+#define USB_DTXFSTS0_REG (SOC_DPORT_USB_BASE + 0x918)
+/** USB_D_INEPTXFSPCAVAIL0 : RO; bitpos: [16:0]; default: 0;
+ *  Indicates the amount of free space available in the Endpoint  TxFIFO.
+ */
+#define USB_D_INEPTXFSPCAVAIL0    0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL0_M  (USB_D_INEPTXFSPCAVAIL0_V << USB_D_INEPTXFSPCAVAIL0_S)
+#define USB_D_INEPTXFSPCAVAIL0_V  0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL0_S  0
+
+
+/** USB_DIEPDMAB0_REG register
+ *  Device IN Endpoint 16 Buffer Address Register
+ */
+#define USB_DIEPDMAB0_REG (SOC_DPORT_USB_BASE + 0x91c)
+/** USB_D_DMABUFFERADDR0 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_D_DMABUFFERADDR0    0xFFFFFFFF
+#define USB_D_DMABUFFERADDR0_M  (USB_D_DMABUFFERADDR0_V << USB_D_DMABUFFERADDR0_S)
+#define USB_D_DMABUFFERADDR0_V  0xFFFFFFFF
+#define USB_D_DMABUFFERADDR0_S  0
+
+
+/** USB_DTXFSTS1_REG register
+ *  Device IN Endpoint Transmit FIFO Status Register 1
+ */
+#define USB_DTXFSTS1_REG (SOC_DPORT_USB_BASE + 0x938)
+/** USB_D_INEPTXFSPCAVAIL1 : RO; bitpos: [16:0]; default: 0;
+ *  Indicates the amount of free space available in the Endpoint  TxFIFO.
+ */
+#define USB_D_INEPTXFSPCAVAIL1    0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL1_M  (USB_D_INEPTXFSPCAVAIL1_V << USB_D_INEPTXFSPCAVAIL1_S)
+#define USB_D_INEPTXFSPCAVAIL1_V  0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL1_S  0
+
+
+/** USB_DIEPDMAB1_REG register
+ *  Device IN Endpoint 16 Buffer Address Register
+ */
+#define USB_DIEPDMAB1_REG (SOC_DPORT_USB_BASE + 0x93c)
+/** USB_D_DMABUFFERADDR1 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_D_DMABUFFERADDR1    0xFFFFFFFF
+#define USB_D_DMABUFFERADDR1_M  (USB_D_DMABUFFERADDR1_V << USB_D_DMABUFFERADDR1_S)
+#define USB_D_DMABUFFERADDR1_V  0xFFFFFFFF
+#define USB_D_DMABUFFERADDR1_S  0
+
+
+/** USB_DTXFSTS2_REG register
+ *  Device IN Endpoint Transmit FIFO Status Register 2
+ */
+#define USB_DTXFSTS2_REG (SOC_DPORT_USB_BASE + 0x958)
+/** USB_D_INEPTXFSPCAVAIL2 : RO; bitpos: [16:0]; default: 0;
+ *  Indicates the amount of free space available in the Endpoint  TxFIFO.
+ */
+#define USB_D_INEPTXFSPCAVAIL2    0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL2_M  (USB_D_INEPTXFSPCAVAIL2_V << USB_D_INEPTXFSPCAVAIL2_S)
+#define USB_D_INEPTXFSPCAVAIL2_V  0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL2_S  0
+
+
+/** USB_DIEPDMAB2_REG register
+ *  Device IN Endpoint 16 Buffer Address Register
+ */
+#define USB_DIEPDMAB2_REG (SOC_DPORT_USB_BASE + 0x95c)
+/** USB_D_DMABUFFERADDR2 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_D_DMABUFFERADDR2    0xFFFFFFFF
+#define USB_D_DMABUFFERADDR2_M  (USB_D_DMABUFFERADDR2_V << USB_D_DMABUFFERADDR2_S)
+#define USB_D_DMABUFFERADDR2_V  0xFFFFFFFF
+#define USB_D_DMABUFFERADDR2_S  0
+
+
+/** USB_DTXFSTS3_REG register
+ *  Device IN Endpoint Transmit FIFO Status Register 3
+ */
+#define USB_DTXFSTS3_REG (SOC_DPORT_USB_BASE + 0x978)
+/** USB_D_INEPTXFSPCAVAIL3 : RO; bitpos: [16:0]; default: 0;
+ *  Indicates the amount of free space available in the Endpoint  TxFIFO.
+ */
+#define USB_D_INEPTXFSPCAVAIL3    0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL3_M  (USB_D_INEPTXFSPCAVAIL3_V << USB_D_INEPTXFSPCAVAIL3_S)
+#define USB_D_INEPTXFSPCAVAIL3_V  0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL3_S  0
+
+
+/** USB_DIEPDMAB3_REG register
+ *  Device IN Endpoint 16 Buffer Address Register
+ */
+#define USB_DIEPDMAB3_REG (SOC_DPORT_USB_BASE + 0x97c)
+/** USB_D_DMABUFFERADDR3 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_D_DMABUFFERADDR3    0xFFFFFFFF
+#define USB_D_DMABUFFERADDR3_M  (USB_D_DMABUFFERADDR3_V << USB_D_DMABUFFERADDR3_S)
+#define USB_D_DMABUFFERADDR3_V  0xFFFFFFFF
+#define USB_D_DMABUFFERADDR3_S  0
+
+
+/** USB_DTXFSTS4_REG register
+ *  Device IN Endpoint Transmit FIFO Status Register 4
+ */
+#define USB_DTXFSTS4_REG (SOC_DPORT_USB_BASE + 0x998)
+/** USB_D_INEPTXFSPCAVAIL4 : RO; bitpos: [16:0]; default: 0;
+ *  Indicates the amount of free space available in the Endpoint  TxFIFO.
+ */
+#define USB_D_INEPTXFSPCAVAIL4    0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL4_M  (USB_D_INEPTXFSPCAVAIL4_V << USB_D_INEPTXFSPCAVAIL4_S)
+#define USB_D_INEPTXFSPCAVAIL4_V  0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL4_S  0
+
+
+/** USB_DIEPDMAB4_REG register
+ *  Device IN Endpoint 16 Buffer Address Register
+ */
+#define USB_DIEPDMAB4_REG (SOC_DPORT_USB_BASE + 0x99c)
+/** USB_D_DMABUFFERADDR4 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_D_DMABUFFERADDR4    0xFFFFFFFF
+#define USB_D_DMABUFFERADDR4_M  (USB_D_DMABUFFERADDR4_V << USB_D_DMABUFFERADDR4_S)
+#define USB_D_DMABUFFERADDR4_V  0xFFFFFFFF
+#define USB_D_DMABUFFERADDR4_S  0
+
+
+/** USB_DTXFSTS5_REG register
+ *  Device IN Endpoint Transmit FIFO Status Register 5
+ */
+#define USB_DTXFSTS5_REG (SOC_DPORT_USB_BASE + 0x9b8)
+/** USB_D_INEPTXFSPCAVAIL5 : RO; bitpos: [16:0]; default: 0;
+ *  Indicates the amount of free space available in the Endpoint  TxFIFO.
+ */
+#define USB_D_INEPTXFSPCAVAIL5    0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL5_M  (USB_D_INEPTXFSPCAVAIL5_V << USB_D_INEPTXFSPCAVAIL5_S)
+#define USB_D_INEPTXFSPCAVAIL5_V  0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL5_S  0
+
+
+/** USB_DIEPDMAB5_REG register
+ *  Device IN Endpoint 16 Buffer Address Register
+ */
+#define USB_DIEPDMAB5_REG (SOC_DPORT_USB_BASE + 0x9bc)
+/** USB_D_DMABUFFERADDR5 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_D_DMABUFFERADDR5    0xFFFFFFFF
+#define USB_D_DMABUFFERADDR5_M  (USB_D_DMABUFFERADDR5_V << USB_D_DMABUFFERADDR5_S)
+#define USB_D_DMABUFFERADDR5_V  0xFFFFFFFF
+#define USB_D_DMABUFFERADDR5_S  0
+
+
+/** USB_DTXFSTS6_REG register
+ *  Device IN Endpoint Transmit FIFO Status Register 6
+ */
+#define USB_DTXFSTS6_REG (SOC_DPORT_USB_BASE + 0x9d8)
+/** USB_D_INEPTXFSPCAVAIL6 : RO; bitpos: [16:0]; default: 0;
+ *  Indicates the amount of free space available in the Endpoint  TxFIFO.
+ */
+#define USB_D_INEPTXFSPCAVAIL6    0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL6_M  (USB_D_INEPTXFSPCAVAIL6_V << USB_D_INEPTXFSPCAVAIL6_S)
+#define USB_D_INEPTXFSPCAVAIL6_V  0x0000FFFF
+#define USB_D_INEPTXFSPCAVAIL6_S  0
+
+
+/** USB_DIEPDMAB6_REG register
+ *  Device IN Endpoint 16 Buffer Address Register
+ */
+#define USB_DIEPDMAB6_REG (SOC_DPORT_USB_BASE + 0x9dc)
+/** USB_D_DMABUFFERADDR6 : RO; bitpos: [32:0]; default: 0;
+ *  Holds the current buffer address.This register is updated as and when the data
+ *  transfer for the corresponding end point is in progress. This register is present
+ *  only in Scatter/Gather DMA mode. Otherwise this field is reserved.
+ */
+#define USB_D_DMABUFFERADDR6    0xFFFFFFFF
+#define USB_D_DMABUFFERADDR6_M  (USB_D_DMABUFFERADDR6_V << USB_D_DMABUFFERADDR6_S)
+#define USB_D_DMABUFFERADDR6_V  0xFFFFFFFF
+#define USB_D_DMABUFFERADDR6_S  0
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_serial_jtag_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_serial_jtag_reg.h
new file mode 100644
index 00000000000..44a617806e7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_serial_jtag_reg.h
@@ -0,0 +1,745 @@
+// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_USB_DEVICE_REG_H_
+#define _SOC_USB_DEVICE_REG_H_
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include "soc.h"
+
+#define USB_SERIAL_JTAG_EP1_REG          (DR_REG_USB_DEVICE_BASE + 0x0)
+/* USB_SERIAL_JTAG_RDWR_BYTE : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/*description: Write and read byte data to/from UART Tx/Rx FIFO through this field. When USB_DE
+VICE_SERIAL_IN_EMPTY_INT is set, then user can write data (up to 64 bytes) into
+UART Tx FIFO. When USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is set, user can check USB
+_DEVICE_OUT_EP1_WR_ADDR USB_SERIAL_JTAG_OUT_EP0_RD_ADDR to know how many data is rece
+ived, then read data from UART Rx FIFO..*/
+#define USB_SERIAL_JTAG_RDWR_BYTE    0x000000FF
+#define USB_SERIAL_JTAG_RDWR_BYTE_M  ((USB_DEVICE_RDWR_BYTE_V)<<(USB_DEVICE_RDWR_BYTE_S))
+#define USB_SERIAL_JTAG_RDWR_BYTE_V  0xFF
+#define USB_SERIAL_JTAG_RDWR_BYTE_S  0
+
+#define USB_SERIAL_JTAG_EP1_CONF_REG          (DR_REG_USB_DEVICE_BASE + 0x4)
+/* USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: 1'b1: Indicate there is data in UART Rx FIFO..*/
+#define USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL    (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL_M  (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL_V  0x1
+#define USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL_S  2
+/* USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE : RO ;bitpos:[1] ;default: 1'b1 ; */
+/*description: 1'b1: Indicate UART Tx FIFO is not full and can write data into in. After writin
+g USB_SERIAL_JTAG_WR_DONE, this bit would be 0 until data in UART Tx FIFO is read by
+USB Host..*/
+#define USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE    (BIT(1))
+#define USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE_M  (BIT(1))
+#define USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE_V  0x1
+#define USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE_S  1
+/* USB_SERIAL_JTAG_WR_DONE : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to indicate writing byte data to UART Tx FIFO is done..*/
+#define USB_SERIAL_JTAG_WR_DONE    (BIT(0))
+#define USB_SERIAL_JTAG_WR_DONE_M  (BIT(0))
+#define USB_SERIAL_JTAG_WR_DONE_V  0x1
+#define USB_SERIAL_JTAG_WR_DONE_S  0
+
+#define USB_SERIAL_JTAG_INT_RAW_REG          (DR_REG_USB_DEVICE_BASE + 0x8)
+/* USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW : R/WTC/SS ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when OUT endpoint 2 received packet wi
+th zero palyload..*/
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW    (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW_M  (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW_S  11
+/* USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW : R/WTC/SS ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when OUT endpoint 1 received packet wi
+th zero palyload..*/
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW    (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW_M  (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW_S  10
+/* USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW : R/WTC/SS ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when usb bus reset is detected..*/
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW    (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW_M  (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW_S  9
+/* USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW : R/WTC/SS ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when IN token for IN endpoint 1 is rec
+eived..*/
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW    (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW_M  (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW_S  8
+/* USB_SERIAL_JTAG_STUFF_ERR_INT_RAW : R/WTC/SS ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when stuff error is detected..*/
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_RAW    (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_RAW_M  (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_RAW_S  7
+/* USB_SERIAL_JTAG_CRC16_ERR_INT_RAW : R/WTC/SS ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when CRC16 error is detected..*/
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_RAW    (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_RAW_M  (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_RAW_S  6
+/* USB_SERIAL_JTAG_CRC5_ERR_INT_RAW : R/WTC/SS ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when CRC5 error is detected..*/
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_RAW    (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_RAW_M  (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_RAW_S  5
+/* USB_SERIAL_JTAG_PID_ERR_INT_RAW : R/WTC/SS ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when pid error is detected..*/
+#define USB_SERIAL_JTAG_PID_ERR_INT_RAW    (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_RAW_M  (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_PID_ERR_INT_RAW_S  4
+/* USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW : R/WTC/SS ;bitpos:[3] ;default: 1'b1 ; */
+/*description: The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty..*/
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW    (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW_M  (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW_S  3
+/* USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when Serial Port OUT Endpoint received
+ one packet..*/
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW    (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW_M  (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW_S  2
+/* USB_SERIAL_JTAG_SOF_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when SOF frame is received..*/
+#define USB_SERIAL_JTAG_SOF_INT_RAW    (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_RAW_M  (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_SOF_INT_RAW_S  1
+/* USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt bit turns to high level when flush cmd is received for IN endp
+oint 2 of JTAG..*/
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW    (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW_M  (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW_V  0x1
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW_S  0
+
+#define USB_SERIAL_JTAG_INT_ST_REG          (DR_REG_USB_DEVICE_BASE + 0xC)
+/* USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST : RO ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT interru
+pt..*/
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST    (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST_M  (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST_S  11
+/* USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST : RO ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT interru
+pt..*/
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST    (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST_M  (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST_S  10
+/* USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_USB_BUS_RESET_INT interrupt..*/
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST    (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST_M  (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST_S  9
+/* USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT interrup
+t..*/
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST    (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST_M  (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST_S  8
+/* USB_SERIAL_JTAG_STUFF_ERR_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_STUFF_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ST    (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ST_M  (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ST_S  7
+/* USB_SERIAL_JTAG_CRC16_ERR_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_CRC16_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ST    (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ST_M  (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ST_S  6
+/* USB_SERIAL_JTAG_CRC5_ERR_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_CRC5_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ST    (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ST_M  (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ST_S  5
+/* USB_SERIAL_JTAG_PID_ERR_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_PID_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_PID_ERR_INT_ST    (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_ST_M  (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_PID_ERR_INT_ST_S  4
+/* USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT interrupt..*/
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST    (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST_M  (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST_S  3
+/* USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT interrup
+t..*/
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST    (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST_M  (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST_S  2
+/* USB_SERIAL_JTAG_SOF_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_SOF_INT interrupt..*/
+#define USB_SERIAL_JTAG_SOF_INT_ST    (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_ST_M  (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_SOF_INT_ST_S  1
+/* USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The raw interrupt status bit for the USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT interrupt..*/
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST    (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST_M  (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST_V  0x1
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST_S  0
+
+#define USB_SERIAL_JTAG_INT_ENA_REG          (DR_REG_USB_DEVICE_BASE + 0x10)
+/* USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT interrupt..*/
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA    (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA_M  (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA_S  11
+/* USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT interrupt..*/
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA    (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA_M  (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA_S  10
+/* USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_USB_BUS_RESET_INT interrupt..*/
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA    (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA_M  (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA_S  9
+/* USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT interrupt..*/
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA    (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA_M  (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA_S  8
+/* USB_SERIAL_JTAG_STUFF_ERR_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_STUFF_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ENA    (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ENA_M  (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ENA_S  7
+/* USB_SERIAL_JTAG_CRC16_ERR_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_CRC16_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ENA    (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ENA_M  (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ENA_S  6
+/* USB_SERIAL_JTAG_CRC5_ERR_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_CRC5_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ENA    (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ENA_M  (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ENA_S  5
+/* USB_SERIAL_JTAG_PID_ERR_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_PID_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_PID_ERR_INT_ENA    (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_ENA_M  (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_PID_ERR_INT_ENA_S  4
+/* USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT interrupt..*/
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA    (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA_M  (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA_S  3
+/* USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT interrupt..*/
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA    (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA_M  (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA_S  2
+/* USB_SERIAL_JTAG_SOF_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_SOF_INT interrupt..*/
+#define USB_SERIAL_JTAG_SOF_INT_ENA    (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_ENA_M  (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_SOF_INT_ENA_S  1
+/* USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: The interrupt enable bit for the USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT interrupt..*/
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA    (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA_M  (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA_V  0x1
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA_S  0
+
+#define USB_SERIAL_JTAG_INT_CLR_REG          (DR_REG_USB_DEVICE_BASE + 0x14)
+/* USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR : WT ;bitpos:[11] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT interrupt..*/
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR    (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR_M  (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR_S  11
+/* USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR : WT ;bitpos:[10] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT interrupt..*/
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR    (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR_M  (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR_S  10
+/* USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR : WT ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_USB_BUS_RESET_INT interrupt..*/
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR    (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR_M  (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR_S  9
+/* USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR : WT ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_IN_TOKEN_IN_EP1_INT interrupt..*/
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR    (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR_M  (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR_S  8
+/* USB_SERIAL_JTAG_STUFF_ERR_INT_CLR : WT ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_STUFF_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_CLR    (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_CLR_M  (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_CLR_S  7
+/* USB_SERIAL_JTAG_CRC16_ERR_INT_CLR : WT ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_CRC16_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_CLR    (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_CLR_M  (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_CLR_S  6
+/* USB_SERIAL_JTAG_CRC5_ERR_INT_CLR : WT ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_CRC5_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_CLR    (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_CLR_M  (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_CLR_S  5
+/* USB_SERIAL_JTAG_PID_ERR_INT_CLR : WT ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_PID_ERR_INT interrupt..*/
+#define USB_SERIAL_JTAG_PID_ERR_INT_CLR    (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_CLR_M  (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_PID_ERR_INT_CLR_S  4
+/* USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR : WT ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT interrupt..*/
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR    (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR_M  (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR_S  3
+/* USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT interrupt..*/
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR    (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR_M  (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR_S  2
+/* USB_SERIAL_JTAG_SOF_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_JTAG_SOF_INT interrupt..*/
+#define USB_SERIAL_JTAG_SOF_INT_CLR    (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_CLR_M  (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_SOF_INT_CLR_S  1
+/* USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Set this bit to clear the USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT interrupt..*/
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR    (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR_M  (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR_V  0x1
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR_S  0
+
+#define USB_SERIAL_JTAG_CONF0_REG          (DR_REG_USB_DEVICE_BASE + 0x18)
+/* USB_SERIAL_JTAG_USB_JTAG_BRIDGE_EN : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: Set this bit usb_jtag, the connection between usb_jtag and internal JTAG is disc
+onnected, and MTMS, MTDI, MTCK are output through GPIO Matrix, MTDO is input thr
+ough GPIO Matrix..*/
+#define USB_SERIAL_JTAG_USB_JTAG_BRIDGE_EN    (BIT(16))
+#define USB_SERIAL_JTAG_USB_JTAG_BRIDGE_EN_M  (BIT(16))
+#define USB_SERIAL_JTAG_USB_JTAG_BRIDGE_EN_V  0x1
+#define USB_SERIAL_JTAG_USB_JTAG_BRIDGE_EN_S  16
+/* USB_SERIAL_JTAG_PHY_TX_EDGE_SEL : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: 0: TX output at clock negedge. 1: Tx output at clock posedge..*/
+#define USB_SERIAL_JTAG_PHY_TX_EDGE_SEL    (BIT(15))
+#define USB_SERIAL_JTAG_PHY_TX_EDGE_SEL_M  (BIT(15))
+#define USB_SERIAL_JTAG_PHY_TX_EDGE_SEL_V  0x1
+#define USB_SERIAL_JTAG_PHY_TX_EDGE_SEL_S  15
+/* USB_SERIAL_JTAG_USB_PAD_ENABLE : R/W ;bitpos:[14] ;default: 1'b1 ; */
+/*description: Enable USB pad function..*/
+#define USB_SERIAL_JTAG_USB_PAD_ENABLE    (BIT(14))
+#define USB_SERIAL_JTAG_USB_PAD_ENABLE_M  (BIT(14))
+#define USB_SERIAL_JTAG_USB_PAD_ENABLE_V  0x1
+#define USB_SERIAL_JTAG_USB_PAD_ENABLE_S  14
+/* USB_SERIAL_JTAG_PULLUP_VALUE : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: Control pull up value..*/
+#define USB_SERIAL_JTAG_PULLUP_VALUE    (BIT(13))
+#define USB_SERIAL_JTAG_PULLUP_VALUE_M  (BIT(13))
+#define USB_SERIAL_JTAG_PULLUP_VALUE_V  0x1
+#define USB_SERIAL_JTAG_PULLUP_VALUE_S  13
+/* USB_SERIAL_JTAG_DM_PULLDOWN : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Control USB D- pull down..*/
+#define USB_SERIAL_JTAG_DM_PULLDOWN    (BIT(12))
+#define USB_SERIAL_JTAG_DM_PULLDOWN_M  (BIT(12))
+#define USB_SERIAL_JTAG_DM_PULLDOWN_V  0x1
+#define USB_SERIAL_JTAG_DM_PULLDOWN_S  12
+/* USB_SERIAL_JTAG_DM_PULLUP : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: Control USB D- pull up..*/
+#define USB_SERIAL_JTAG_DM_PULLUP    (BIT(11))
+#define USB_SERIAL_JTAG_DM_PULLUP_M  (BIT(11))
+#define USB_SERIAL_JTAG_DM_PULLUP_V  0x1
+#define USB_SERIAL_JTAG_DM_PULLUP_S  11
+/* USB_SERIAL_JTAG_DP_PULLDOWN : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: Control USB D+ pull down..*/
+#define USB_SERIAL_JTAG_DP_PULLDOWN    (BIT(10))
+#define USB_SERIAL_JTAG_DP_PULLDOWN_M  (BIT(10))
+#define USB_SERIAL_JTAG_DP_PULLDOWN_V  0x1
+#define USB_SERIAL_JTAG_DP_PULLDOWN_S  10
+/* USB_SERIAL_JTAG_DP_PULLUP : R/W ;bitpos:[9] ;default: 1'b1 ; */
+/*description: Control USB D+ pull up..*/
+#define USB_SERIAL_JTAG_DP_PULLUP    (BIT(9))
+#define USB_SERIAL_JTAG_DP_PULLUP_M  (BIT(9))
+#define USB_SERIAL_JTAG_DP_PULLUP_V  0x1
+#define USB_SERIAL_JTAG_DP_PULLUP_S  9
+/* USB_SERIAL_JTAG_PAD_PULL_OVERRIDE : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Enable software control USB D+ D- pullup pulldown.*/
+#define USB_SERIAL_JTAG_PAD_PULL_OVERRIDE    (BIT(8))
+#define USB_SERIAL_JTAG_PAD_PULL_OVERRIDE_M  (BIT(8))
+#define USB_SERIAL_JTAG_PAD_PULL_OVERRIDE_V  0x1
+#define USB_SERIAL_JTAG_PAD_PULL_OVERRIDE_S  8
+/* USB_SERIAL_JTAG_VREF_OVERRIDE : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Enable software control input  threshold.*/
+#define USB_SERIAL_JTAG_VREF_OVERRIDE    (BIT(7))
+#define USB_SERIAL_JTAG_VREF_OVERRIDE_M  (BIT(7))
+#define USB_SERIAL_JTAG_VREF_OVERRIDE_V  0x1
+#define USB_SERIAL_JTAG_VREF_OVERRIDE_S  7
+/* USB_SERIAL_JTAG_VREFL : R/W ;bitpos:[6:5] ;default: 2'b0 ; */
+/*description: Control single-end input low threshold,0.8V to 1.04V, step 80mV.*/
+#define USB_SERIAL_JTAG_VREFL    0x00000003
+#define USB_SERIAL_JTAG_VREFL_M  ((USB_DEVICE_VREFL_V)<<(USB_DEVICE_VREFL_S))
+#define USB_SERIAL_JTAG_VREFL_V  0x3
+#define USB_SERIAL_JTAG_VREFL_S  5
+/* USB_SERIAL_JTAG_VREFH : R/W ;bitpos:[4:3] ;default: 2'b0 ; */
+/*description: Control single-end input high threshold,1.76V to 2V, step 80mV.*/
+#define USB_SERIAL_JTAG_VREFH    0x00000003
+#define USB_SERIAL_JTAG_VREFH_M  ((USB_DEVICE_VREFH_V)<<(USB_DEVICE_VREFH_S))
+#define USB_SERIAL_JTAG_VREFH_V  0x3
+#define USB_SERIAL_JTAG_VREFH_S  3
+/* USB_SERIAL_JTAG_EXCHG_PINS : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: USB D+ D- exchange.*/
+#define USB_SERIAL_JTAG_EXCHG_PINS    (BIT(2))
+#define USB_SERIAL_JTAG_EXCHG_PINS_M  (BIT(2))
+#define USB_SERIAL_JTAG_EXCHG_PINS_V  0x1
+#define USB_SERIAL_JTAG_EXCHG_PINS_S  2
+/* USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Enable software control USB D+ D- exchange.*/
+#define USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE    (BIT(1))
+#define USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE_M  (BIT(1))
+#define USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE_V  0x1
+#define USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE_S  1
+/* USB_SERIAL_JTAG_PHY_SEL : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Select internal/external PHY.*/
+#define USB_SERIAL_JTAG_PHY_SEL    (BIT(0))
+#define USB_SERIAL_JTAG_PHY_SEL_M  (BIT(0))
+#define USB_SERIAL_JTAG_PHY_SEL_V  0x1
+#define USB_SERIAL_JTAG_PHY_SEL_S  0
+
+#define USB_SERIAL_JTAG_TEST_REG          (DR_REG_USB_DEVICE_BASE + 0x1C)
+/* USB_SERIAL_JTAG_TEST_RX_DM : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: USB D- rx value in test.*/
+#define USB_SERIAL_JTAG_TEST_RX_DM    (BIT(6))
+#define USB_SERIAL_JTAG_TEST_RX_DM_M  (BIT(6))
+#define USB_SERIAL_JTAG_TEST_RX_DM_V  0x1
+#define USB_SERIAL_JTAG_TEST_RX_DM_S  6
+/* USB_SERIAL_JTAG_TEST_RX_DP : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: USB D+ rx value in test.*/
+#define USB_SERIAL_JTAG_TEST_RX_DP    (BIT(5))
+#define USB_SERIAL_JTAG_TEST_RX_DP_M  (BIT(5))
+#define USB_SERIAL_JTAG_TEST_RX_DP_V  0x1
+#define USB_SERIAL_JTAG_TEST_RX_DP_S  5
+/* USB_SERIAL_JTAG_TEST_RX_RCV : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: USB differential rx value in test.*/
+#define USB_SERIAL_JTAG_TEST_RX_RCV    (BIT(4))
+#define USB_SERIAL_JTAG_TEST_RX_RCV_M  (BIT(4))
+#define USB_SERIAL_JTAG_TEST_RX_RCV_V  0x1
+#define USB_SERIAL_JTAG_TEST_RX_RCV_S  4
+/* USB_SERIAL_JTAG_TEST_TX_DM : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: USB D- tx value in test.*/
+#define USB_SERIAL_JTAG_TEST_TX_DM    (BIT(3))
+#define USB_SERIAL_JTAG_TEST_TX_DM_M  (BIT(3))
+#define USB_SERIAL_JTAG_TEST_TX_DM_V  0x1
+#define USB_SERIAL_JTAG_TEST_TX_DM_S  3
+/* USB_SERIAL_JTAG_TEST_TX_DP : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: USB D+ tx value in test.*/
+#define USB_SERIAL_JTAG_TEST_TX_DP    (BIT(2))
+#define USB_SERIAL_JTAG_TEST_TX_DP_M  (BIT(2))
+#define USB_SERIAL_JTAG_TEST_TX_DP_V  0x1
+#define USB_SERIAL_JTAG_TEST_TX_DP_S  2
+/* USB_SERIAL_JTAG_TEST_USB_OE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: USB pad oen in test.*/
+#define USB_SERIAL_JTAG_TEST_USB_OE    (BIT(1))
+#define USB_SERIAL_JTAG_TEST_USB_OE_M  (BIT(1))
+#define USB_SERIAL_JTAG_TEST_USB_OE_V  0x1
+#define USB_SERIAL_JTAG_TEST_USB_OE_S  1
+/* USB_SERIAL_JTAG_TEST_ENABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Enable test of the USB pad.*/
+#define USB_SERIAL_JTAG_TEST_ENABLE    (BIT(0))
+#define USB_SERIAL_JTAG_TEST_ENABLE_M  (BIT(0))
+#define USB_SERIAL_JTAG_TEST_ENABLE_V  0x1
+#define USB_SERIAL_JTAG_TEST_ENABLE_S  0
+
+#define USB_SERIAL_JTAG_JFIFO_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x20)
+/* USB_SERIAL_JTAG_OUT_FIFO_RESET : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: Write 1 to reset JTAG out fifo..*/
+#define USB_SERIAL_JTAG_OUT_FIFO_RESET    (BIT(9))
+#define USB_SERIAL_JTAG_OUT_FIFO_RESET_M  (BIT(9))
+#define USB_SERIAL_JTAG_OUT_FIFO_RESET_V  0x1
+#define USB_SERIAL_JTAG_OUT_FIFO_RESET_S  9
+/* USB_SERIAL_JTAG_IN_FIFO_RESET : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Write 1 to reset JTAG in fifo..*/
+#define USB_SERIAL_JTAG_IN_FIFO_RESET    (BIT(8))
+#define USB_SERIAL_JTAG_IN_FIFO_RESET_M  (BIT(8))
+#define USB_SERIAL_JTAG_IN_FIFO_RESET_V  0x1
+#define USB_SERIAL_JTAG_IN_FIFO_RESET_S  8
+/* USB_SERIAL_JTAG_OUT_FIFO_FULL : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: 1: JTAG out fifo is full..*/
+#define USB_SERIAL_JTAG_OUT_FIFO_FULL    (BIT(7))
+#define USB_SERIAL_JTAG_OUT_FIFO_FULL_M  (BIT(7))
+#define USB_SERIAL_JTAG_OUT_FIFO_FULL_V  0x1
+#define USB_SERIAL_JTAG_OUT_FIFO_FULL_S  7
+/* USB_SERIAL_JTAG_OUT_FIFO_EMPTY : RO ;bitpos:[6] ;default: 1'b1 ; */
+/*description: 1: JTAG out fifo is empty..*/
+#define USB_SERIAL_JTAG_OUT_FIFO_EMPTY    (BIT(6))
+#define USB_SERIAL_JTAG_OUT_FIFO_EMPTY_M  (BIT(6))
+#define USB_SERIAL_JTAG_OUT_FIFO_EMPTY_V  0x1
+#define USB_SERIAL_JTAG_OUT_FIFO_EMPTY_S  6
+/* USB_SERIAL_JTAG_OUT_FIFO_CNT : RO ;bitpos:[5:4] ;default: 2'd0 ; */
+/*description: JTAT out fifo counter..*/
+#define USB_SERIAL_JTAG_OUT_FIFO_CNT    0x00000003
+#define USB_SERIAL_JTAG_OUT_FIFO_CNT_M  ((USB_DEVICE_OUT_FIFO_CNT_V)<<(USB_DEVICE_OUT_FIFO_CNT_S))
+#define USB_SERIAL_JTAG_OUT_FIFO_CNT_V  0x3
+#define USB_SERIAL_JTAG_OUT_FIFO_CNT_S  4
+/* USB_SERIAL_JTAG_IN_FIFO_FULL : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: 1: JTAG in fifo is full..*/
+#define USB_SERIAL_JTAG_IN_FIFO_FULL    (BIT(3))
+#define USB_SERIAL_JTAG_IN_FIFO_FULL_M  (BIT(3))
+#define USB_SERIAL_JTAG_IN_FIFO_FULL_V  0x1
+#define USB_SERIAL_JTAG_IN_FIFO_FULL_S  3
+/* USB_SERIAL_JTAG_IN_FIFO_EMPTY : RO ;bitpos:[2] ;default: 1'b1 ; */
+/*description: 1: JTAG in fifo is empty..*/
+#define USB_SERIAL_JTAG_IN_FIFO_EMPTY    (BIT(2))
+#define USB_SERIAL_JTAG_IN_FIFO_EMPTY_M  (BIT(2))
+#define USB_SERIAL_JTAG_IN_FIFO_EMPTY_V  0x1
+#define USB_SERIAL_JTAG_IN_FIFO_EMPTY_S  2
+/* USB_SERIAL_JTAG_IN_FIFO_CNT : RO ;bitpos:[1:0] ;default: 2'd0 ; */
+/*description: JTAT in fifo counter..*/
+#define USB_SERIAL_JTAG_IN_FIFO_CNT    0x00000003
+#define USB_SERIAL_JTAG_IN_FIFO_CNT_M  ((USB_DEVICE_IN_FIFO_CNT_V)<<(USB_DEVICE_IN_FIFO_CNT_S))
+#define USB_SERIAL_JTAG_IN_FIFO_CNT_V  0x3
+#define USB_SERIAL_JTAG_IN_FIFO_CNT_S  0
+
+#define USB_SERIAL_JTAG_FRAM_NUM_REG          (DR_REG_USB_DEVICE_BASE + 0x24)
+/* USB_SERIAL_JTAG_SOF_FRAME_INDEX : RO ;bitpos:[10:0] ;default: 11'd0 ; */
+/*description: Frame index of received SOF frame..*/
+#define USB_SERIAL_JTAG_SOF_FRAME_INDEX    0x000007FF
+#define USB_SERIAL_JTAG_SOF_FRAME_INDEX_M  ((USB_DEVICE_SOF_FRAME_INDEX_V)<<(USB_DEVICE_SOF_FRAME_INDEX_S))
+#define USB_SERIAL_JTAG_SOF_FRAME_INDEX_V  0x7FF
+#define USB_SERIAL_JTAG_SOF_FRAME_INDEX_S  0
+
+#define USB_SERIAL_JTAG_IN_EP0_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x28)
+/* USB_SERIAL_JTAG_IN_EP0_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of IN endpoint 0..*/
+#define USB_SERIAL_JTAG_IN_EP0_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP0_RD_ADDR_M  ((USB_DEVICE_IN_EP0_RD_ADDR_V)<<(USB_DEVICE_IN_EP0_RD_ADDR_S))
+#define USB_SERIAL_JTAG_IN_EP0_RD_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_IN_EP0_RD_ADDR_S  9
+/* USB_SERIAL_JTAG_IN_EP0_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of IN endpoint 0..*/
+#define USB_SERIAL_JTAG_IN_EP0_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP0_WR_ADDR_M  ((USB_DEVICE_IN_EP0_WR_ADDR_V)<<(USB_DEVICE_IN_EP0_WR_ADDR_S))
+#define USB_SERIAL_JTAG_IN_EP0_WR_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_IN_EP0_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_IN_EP0_STATE : RO ;bitpos:[1:0] ;default: 2'b1 ; */
+/*description: State of IN Endpoint 0..*/
+#define USB_SERIAL_JTAG_IN_EP0_STATE    0x00000003
+#define USB_SERIAL_JTAG_IN_EP0_STATE_M  ((USB_DEVICE_IN_EP0_STATE_V)<<(USB_DEVICE_IN_EP0_STATE_S))
+#define USB_SERIAL_JTAG_IN_EP0_STATE_V  0x3
+#define USB_SERIAL_JTAG_IN_EP0_STATE_S  0
+
+#define USB_SERIAL_JTAG_IN_EP1_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x2C)
+/* USB_SERIAL_JTAG_IN_EP1_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of IN endpoint 1..*/
+#define USB_SERIAL_JTAG_IN_EP1_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP1_RD_ADDR_M  ((USB_DEVICE_IN_EP1_RD_ADDR_V)<<(USB_DEVICE_IN_EP1_RD_ADDR_S))
+#define USB_SERIAL_JTAG_IN_EP1_RD_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_IN_EP1_RD_ADDR_S  9
+/* USB_SERIAL_JTAG_IN_EP1_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of IN endpoint 1..*/
+#define USB_SERIAL_JTAG_IN_EP1_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP1_WR_ADDR_M  ((USB_DEVICE_IN_EP1_WR_ADDR_V)<<(USB_DEVICE_IN_EP1_WR_ADDR_S))
+#define USB_SERIAL_JTAG_IN_EP1_WR_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_IN_EP1_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_IN_EP1_STATE : RO ;bitpos:[1:0] ;default: 2'b1 ; */
+/*description: State of IN Endpoint 1..*/
+#define USB_SERIAL_JTAG_IN_EP1_STATE    0x00000003
+#define USB_SERIAL_JTAG_IN_EP1_STATE_M  ((USB_DEVICE_IN_EP1_STATE_V)<<(USB_DEVICE_IN_EP1_STATE_S))
+#define USB_SERIAL_JTAG_IN_EP1_STATE_V  0x3
+#define USB_SERIAL_JTAG_IN_EP1_STATE_S  0
+
+#define USB_SERIAL_JTAG_IN_EP2_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x30)
+/* USB_SERIAL_JTAG_IN_EP2_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of IN endpoint 2..*/
+#define USB_SERIAL_JTAG_IN_EP2_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP2_RD_ADDR_M  ((USB_DEVICE_IN_EP2_RD_ADDR_V)<<(USB_DEVICE_IN_EP2_RD_ADDR_S))
+#define USB_SERIAL_JTAG_IN_EP2_RD_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_IN_EP2_RD_ADDR_S  9
+/* USB_SERIAL_JTAG_IN_EP2_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of IN endpoint 2..*/
+#define USB_SERIAL_JTAG_IN_EP2_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP2_WR_ADDR_M  ((USB_DEVICE_IN_EP2_WR_ADDR_V)<<(USB_DEVICE_IN_EP2_WR_ADDR_S))
+#define USB_SERIAL_JTAG_IN_EP2_WR_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_IN_EP2_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_IN_EP2_STATE : RO ;bitpos:[1:0] ;default: 2'b1 ; */
+/*description: State of IN Endpoint 2..*/
+#define USB_SERIAL_JTAG_IN_EP2_STATE    0x00000003
+#define USB_SERIAL_JTAG_IN_EP2_STATE_M  ((USB_DEVICE_IN_EP2_STATE_V)<<(USB_DEVICE_IN_EP2_STATE_S))
+#define USB_SERIAL_JTAG_IN_EP2_STATE_V  0x3
+#define USB_SERIAL_JTAG_IN_EP2_STATE_S  0
+
+#define USB_SERIAL_JTAG_IN_EP3_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x34)
+/* USB_SERIAL_JTAG_IN_EP3_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of IN endpoint 3..*/
+#define USB_SERIAL_JTAG_IN_EP3_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP3_RD_ADDR_M  ((USB_DEVICE_IN_EP3_RD_ADDR_V)<<(USB_DEVICE_IN_EP3_RD_ADDR_S))
+#define USB_SERIAL_JTAG_IN_EP3_RD_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_IN_EP3_RD_ADDR_S  9
+/* USB_SERIAL_JTAG_IN_EP3_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of IN endpoint 3..*/
+#define USB_SERIAL_JTAG_IN_EP3_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP3_WR_ADDR_M  ((USB_DEVICE_IN_EP3_WR_ADDR_V)<<(USB_DEVICE_IN_EP3_WR_ADDR_S))
+#define USB_SERIAL_JTAG_IN_EP3_WR_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_IN_EP3_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_IN_EP3_STATE : RO ;bitpos:[1:0] ;default: 2'b1 ; */
+/*description: State of IN Endpoint 3..*/
+#define USB_SERIAL_JTAG_IN_EP3_STATE    0x00000003
+#define USB_SERIAL_JTAG_IN_EP3_STATE_M  ((USB_DEVICE_IN_EP3_STATE_V)<<(USB_DEVICE_IN_EP3_STATE_S))
+#define USB_SERIAL_JTAG_IN_EP3_STATE_V  0x3
+#define USB_SERIAL_JTAG_IN_EP3_STATE_S  0
+
+#define USB_SERIAL_JTAG_OUT_EP0_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x38)
+/* USB_SERIAL_JTAG_OUT_EP0_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of OUT endpoint 0..*/
+#define USB_SERIAL_JTAG_OUT_EP0_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP0_RD_ADDR_M  ((USB_DEVICE_OUT_EP0_RD_ADDR_V)<<(USB_DEVICE_OUT_EP0_RD_ADDR_S))
+#define USB_SERIAL_JTAG_OUT_EP0_RD_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_OUT_EP0_RD_ADDR_S  9
+/* USB_SERIAL_JTAG_OUT_EP0_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of OUT endpoint 0. When USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is
+ detected, there are USB_SERIAL_JTAG_OUT_EP0_WR_ADDR-2 bytes data in OUT EP0..*/
+#define USB_SERIAL_JTAG_OUT_EP0_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP0_WR_ADDR_M  ((USB_DEVICE_OUT_EP0_WR_ADDR_V)<<(USB_DEVICE_OUT_EP0_WR_ADDR_S))
+#define USB_SERIAL_JTAG_OUT_EP0_WR_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_OUT_EP0_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_OUT_EP0_STATE : RO ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: State of OUT Endpoint 0..*/
+#define USB_SERIAL_JTAG_OUT_EP0_STATE    0x00000003
+#define USB_SERIAL_JTAG_OUT_EP0_STATE_M  ((USB_DEVICE_OUT_EP0_STATE_V)<<(USB_DEVICE_OUT_EP0_STATE_S))
+#define USB_SERIAL_JTAG_OUT_EP0_STATE_V  0x3
+#define USB_SERIAL_JTAG_OUT_EP0_STATE_S  0
+
+#define USB_SERIAL_JTAG_OUT_EP1_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x3C)
+/* USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT : RO ;bitpos:[22:16] ;default: 7'd0 ; */
+/*description: Data count in OUT endpoint 1 when one packet is received..*/
+#define USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT_M  ((USB_DEVICE_OUT_EP1_REC_DATA_CNT_V)<<(USB_DEVICE_OUT_EP1_REC_DATA_CNT_S))
+#define USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT_V  0x7F
+#define USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT_S  16
+/* USB_SERIAL_JTAG_OUT_EP1_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of OUT endpoint 1..*/
+#define USB_SERIAL_JTAG_OUT_EP1_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP1_RD_ADDR_M  ((USB_DEVICE_OUT_EP1_RD_ADDR_V)<<(USB_DEVICE_OUT_EP1_RD_ADDR_S))
+#define USB_SERIAL_JTAG_OUT_EP1_RD_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_OUT_EP1_RD_ADDR_S  9
+/* USB_SERIAL_JTAG_OUT_EP1_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of OUT endpoint 1. When USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is
+ detected, there are USB_SERIAL_JTAG_OUT_EP1_WR_ADDR-2 bytes data in OUT EP1..*/
+#define USB_SERIAL_JTAG_OUT_EP1_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP1_WR_ADDR_M  ((USB_DEVICE_OUT_EP1_WR_ADDR_V)<<(USB_DEVICE_OUT_EP1_WR_ADDR_S))
+#define USB_SERIAL_JTAG_OUT_EP1_WR_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_OUT_EP1_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_OUT_EP1_STATE : RO ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: State of OUT Endpoint 1..*/
+#define USB_SERIAL_JTAG_OUT_EP1_STATE    0x00000003
+#define USB_SERIAL_JTAG_OUT_EP1_STATE_M  ((USB_DEVICE_OUT_EP1_STATE_V)<<(USB_DEVICE_OUT_EP1_STATE_S))
+#define USB_SERIAL_JTAG_OUT_EP1_STATE_V  0x3
+#define USB_SERIAL_JTAG_OUT_EP1_STATE_S  0
+
+#define USB_SERIAL_JTAG_OUT_EP2_ST_REG          (DR_REG_USB_DEVICE_BASE + 0x40)
+/* USB_SERIAL_JTAG_OUT_EP2_RD_ADDR : RO ;bitpos:[15:9] ;default: 7'd0 ; */
+/*description: Read data address of OUT endpoint 2..*/
+#define USB_SERIAL_JTAG_OUT_EP2_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP2_RD_ADDR_M  ((USB_DEVICE_OUT_EP2_RD_ADDR_V)<<(USB_DEVICE_OUT_EP2_RD_ADDR_S))
+#define USB_SERIAL_JTAG_OUT_EP2_RD_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_OUT_EP2_RD_ADDR_S  9
+/* USB_SERIAL_JTAG_OUT_EP2_WR_ADDR : RO ;bitpos:[8:2] ;default: 7'd0 ; */
+/*description: Write data address of OUT endpoint 2. When USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is
+ detected, there are USB_SERIAL_JTAG_OUT_EP2_WR_ADDR-2 bytes data in OUT EP2..*/
+#define USB_SERIAL_JTAG_OUT_EP2_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP2_WR_ADDR_M  ((USB_DEVICE_OUT_EP2_WR_ADDR_V)<<(USB_DEVICE_OUT_EP2_WR_ADDR_S))
+#define USB_SERIAL_JTAG_OUT_EP2_WR_ADDR_V  0x7F
+#define USB_SERIAL_JTAG_OUT_EP2_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_OUT_EP2_STATE : RO ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: State of OUT Endpoint 2..*/
+#define USB_SERIAL_JTAG_OUT_EP2_STATE    0x00000003
+#define USB_SERIAL_JTAG_OUT_EP2_STATE_M  ((USB_DEVICE_OUT_EP2_STATE_V)<<(USB_DEVICE_OUT_EP2_STATE_S))
+#define USB_SERIAL_JTAG_OUT_EP2_STATE_V  0x3
+#define USB_SERIAL_JTAG_OUT_EP2_STATE_S  0
+
+#define USB_SERIAL_JTAG_MISC_CONF_REG          (DR_REG_USB_DEVICE_BASE + 0x44)
+/* USB_SERIAL_JTAG_CLK_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: 1'h1: Force clock on for register. 1'h0: Support clock only when application wri
+tes registers..*/
+#define USB_SERIAL_JTAG_CLK_EN    (BIT(0))
+#define USB_SERIAL_JTAG_CLK_EN_M  (BIT(0))
+#define USB_SERIAL_JTAG_CLK_EN_V  0x1
+#define USB_SERIAL_JTAG_CLK_EN_S  0
+
+#define USB_SERIAL_JTAG_MEM_CONF_REG          (DR_REG_USB_DEVICE_BASE + 0x48)
+/* USB_SERIAL_JTAG_USB_MEM_CLK_EN : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/*description: 1: Force clock on for usb memory..*/
+#define USB_SERIAL_JTAG_USB_MEM_CLK_EN    (BIT(1))
+#define USB_SERIAL_JTAG_USB_MEM_CLK_EN_M  (BIT(1))
+#define USB_SERIAL_JTAG_USB_MEM_CLK_EN_V  0x1
+#define USB_SERIAL_JTAG_USB_MEM_CLK_EN_S  1
+/* USB_SERIAL_JTAG_USB_MEM_PD : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: 1: power down usb memory..*/
+#define USB_SERIAL_JTAG_USB_MEM_PD    (BIT(0))
+#define USB_SERIAL_JTAG_USB_MEM_PD_M  (BIT(0))
+#define USB_SERIAL_JTAG_USB_MEM_PD_V  0x1
+#define USB_SERIAL_JTAG_USB_MEM_PD_S  0
+
+#define USB_SERIAL_JTAG_DATE_REG          (DR_REG_USB_DEVICE_BASE + 0x80)
+/* USB_SERIAL_JTAG_DATE : R/W ;bitpos:[31:0] ;default: 32'h2101200 ; */
+/*description: register version..*/
+#define USB_SERIAL_JTAG_DATE    0xFFFFFFFF
+#define USB_SERIAL_JTAG_DATE_M  ((USB_DEVICE_DATE_V)<<(USB_DEVICE_DATE_S))
+#define USB_SERIAL_JTAG_DATE_V  0xFFFFFFFF
+#define USB_SERIAL_JTAG_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_USB_DEVICE_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_serial_jtag_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_serial_jtag_struct.h
new file mode 100644
index 00000000000..539717f267b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_serial_jtag_struct.h
@@ -0,0 +1,267 @@
+// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_USB_SERIAL_JTAG_STRUCT_H_
+#define _SOC_USB_SERIAL_JTAG_STRUCT_H_
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include "soc.h"
+
+typedef volatile struct usb_serial_jtag_dev_s {
+    union {
+        struct {
+            uint32_t rdwr_byte                 :    32;  /*Although only low 8-bits is valid, but change it to 32bits to avoid there's no read/modify/write behaviour*/ /*Write and read byte data to/from UART Tx/Rx FIFO through this field. When USB_DEVICE_SERIAL_IN_EMPTY_INT is set, then user can write data (up to 64 bytes) into UART Tx FIFO. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is set, user can check USB_DEVICE_OUT_EP1_WR_ADDR USB_DEVICE_OUT_EP0_RD_ADDR to know how many data is received, then read data from UART Rx FIFO.*/
+        };
+        uint32_t val;
+    } ep1;
+    union {
+        struct {
+            uint32_t wr_done                   :    1;  /*Set this bit to indicate writing byte data to UART Tx FIFO is done.*/
+            uint32_t serial_in_ep_data_free    :    1;  /*1'b1: Indicate UART Tx FIFO is not full and can write data into in. After writing USB_DEVICE_WR_DONE, this bit would be 0 until data in UART Tx FIFO is read by USB Host.*/
+            uint32_t serial_out_ep_data_avail  :    1;  /*1'b1: Indicate there is data in UART Rx FIFO.*/
+            uint32_t reserved3                     :    29;  /*reserved*/
+        };
+        uint32_t val;
+    } ep1_conf;
+    union {
+        struct {
+            uint32_t jtag_in_flush_int_raw     :    1;  /*The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG.*/
+            uint32_t sof_int_raw               :    1;  /*The raw interrupt bit turns to high level when SOF frame is received.*/
+            uint32_t serial_out_recv_pkt_int_raw:    1;  /*The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet.*/
+            uint32_t serial_in_empty_int_raw   :    1;  /*The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty.*/
+            uint32_t pid_err_int_raw           :    1;  /*The raw interrupt bit turns to high level when pid error is detected.*/
+            uint32_t crc5_err_int_raw          :    1;  /*The raw interrupt bit turns to high level when CRC5 error is detected.*/
+            uint32_t crc16_err_int_raw         :    1;  /*The raw interrupt bit turns to high level when CRC16 error is detected.*/
+            uint32_t stuff_err_int_raw         :    1;  /*The raw interrupt bit turns to high level when stuff error is detected.*/
+            uint32_t in_token_rec_in_ep1_int_raw:    1;  /*The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received.*/
+            uint32_t usb_bus_reset_int_raw     :    1;  /*The raw interrupt bit turns to high level when usb bus reset is detected.*/
+            uint32_t out_ep1_zero_payload_int_raw:    1;  /*The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload.*/
+            uint32_t out_ep2_zero_payload_int_raw:    1;  /*The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload.*/
+            uint32_t reserved12                    :    20;  /*reserved*/
+        };
+        uint32_t val;
+    } int_raw;
+    union {
+        struct {
+            uint32_t jtag_in_flush_int_st      :    1;  /*The raw interrupt status bit for the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt.*/
+            uint32_t sof_int_st                :    1;  /*The raw interrupt status bit for the USB_DEVICE_SOF_INT interrupt.*/
+            uint32_t serial_out_recv_pkt_int_st:    1;  /*The raw interrupt status bit for the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt.*/
+            uint32_t serial_in_empty_int_st    :    1;  /*The raw interrupt status bit for the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt.*/
+            uint32_t pid_err_int_st            :    1;  /*The raw interrupt status bit for the USB_DEVICE_PID_ERR_INT interrupt.*/
+            uint32_t crc5_err_int_st           :    1;  /*The raw interrupt status bit for the USB_DEVICE_CRC5_ERR_INT interrupt.*/
+            uint32_t crc16_err_int_st          :    1;  /*The raw interrupt status bit for the USB_DEVICE_CRC16_ERR_INT interrupt.*/
+            uint32_t stuff_err_int_st          :    1;  /*The raw interrupt status bit for the USB_DEVICE_STUFF_ERR_INT interrupt.*/
+            uint32_t in_token_rec_in_ep1_int_st:    1;  /*The raw interrupt status bit for the USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT interrupt.*/
+            uint32_t usb_bus_reset_int_st      :    1;  /*The raw interrupt status bit for the USB_DEVICE_USB_BUS_RESET_INT interrupt.*/
+            uint32_t out_ep1_zero_payload_int_st:    1;  /*The raw interrupt status bit for the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t out_ep2_zero_payload_int_st:    1;  /*The raw interrupt status bit for the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t reserved12                    :    20;  /*reserved*/
+        };
+        uint32_t val;
+    } int_st;
+    union {
+        struct {
+            uint32_t jtag_in_flush_int_ena     :    1;  /*The interrupt enable bit for the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt.*/
+            uint32_t sof_int_ena               :    1;  /*The interrupt enable bit for the USB_DEVICE_SOF_INT interrupt.*/
+            uint32_t serial_out_recv_pkt_int_ena:    1;  /*The interrupt enable bit for the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt.*/
+            uint32_t serial_in_empty_int_ena   :    1;  /*The interrupt enable bit for the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt.*/
+            uint32_t pid_err_int_ena           :    1;  /*The interrupt enable bit for the USB_DEVICE_PID_ERR_INT interrupt.*/
+            uint32_t crc5_err_int_ena          :    1;  /*The interrupt enable bit for the USB_DEVICE_CRC5_ERR_INT interrupt.*/
+            uint32_t crc16_err_int_ena         :    1;  /*The interrupt enable bit for the USB_DEVICE_CRC16_ERR_INT interrupt.*/
+            uint32_t stuff_err_int_ena         :    1;  /*The interrupt enable bit for the USB_DEVICE_STUFF_ERR_INT interrupt.*/
+            uint32_t in_token_rec_in_ep1_int_ena:    1;  /*The interrupt enable bit for the USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT interrupt.*/
+            uint32_t usb_bus_reset_int_ena     :    1;  /*The interrupt enable bit for the USB_DEVICE_USB_BUS_RESET_INT interrupt.*/
+            uint32_t out_ep1_zero_payload_int_ena:    1;  /*The interrupt enable bit for the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t out_ep2_zero_payload_int_ena:    1;  /*The interrupt enable bit for the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t reserved12                    :    20;  /*reserved*/
+        };
+        uint32_t val;
+    } int_ena;
+    union {
+        struct {
+            uint32_t jtag_in_flush_int_clr     :    1;  /*Set this bit to clear the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt.*/
+            uint32_t sof_int_clr               :    1;  /*Set this bit to clear the USB_DEVICE_JTAG_SOF_INT interrupt.*/
+            uint32_t serial_out_recv_pkt_int_clr:    1;  /*Set this bit to clear the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt.*/
+            uint32_t serial_in_empty_int_clr   :    1;  /*Set this bit to clear the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt.*/
+            uint32_t pid_err_int_clr           :    1;  /*Set this bit to clear the USB_DEVICE_PID_ERR_INT interrupt.*/
+            uint32_t crc5_err_int_clr          :    1;  /*Set this bit to clear the USB_DEVICE_CRC5_ERR_INT interrupt.*/
+            uint32_t crc16_err_int_clr         :    1;  /*Set this bit to clear the USB_DEVICE_CRC16_ERR_INT interrupt.*/
+            uint32_t stuff_err_int_clr         :    1;  /*Set this bit to clear the USB_DEVICE_STUFF_ERR_INT interrupt.*/
+            uint32_t in_token_rec_in_ep1_int_clr:    1;  /*Set this bit to clear the USB_DEVICE_IN_TOKEN_IN_EP1_INT interrupt.*/
+            uint32_t usb_bus_reset_int_clr     :    1;  /*Set this bit to clear the USB_DEVICE_USB_BUS_RESET_INT interrupt.*/
+            uint32_t out_ep1_zero_payload_int_clr:    1;  /*Set this bit to clear the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t out_ep2_zero_payload_int_clr:    1;  /*Set this bit to clear the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t reserved12                    :    20;  /*reserved*/
+        };
+        uint32_t val;
+    } int_clr;
+    union {
+        struct {
+            uint32_t phy_sel                   :    1;  /*Select internal/external PHY*/
+            uint32_t exchg_pins_override       :    1;  /*Enable software control USB D+ D- exchange*/
+            uint32_t exchg_pins                :    1;  /*USB D+ D- exchange*/
+            uint32_t vrefh                     :    2;  /*Control single-end input high threshold,1.76V to 2V, step 80mV*/
+            uint32_t vrefl                     :    2;  /*Control single-end input low threshold,0.8V to 1.04V, step 80mV*/
+            uint32_t vref_override             :    1;  /*Enable software control input  threshold*/
+            uint32_t pad_pull_override         :    1;  /*Enable software control USB D+ D- pullup pulldown*/
+            uint32_t dp_pullup                 :    1;  /*Control USB D+ pull up.*/
+            uint32_t dp_pulldown               :    1;  /*Control USB D+ pull down.*/
+            uint32_t dm_pullup                 :    1;  /*Control USB D- pull up.*/
+            uint32_t dm_pulldown               :    1;  /*Control USB D- pull down.*/
+            uint32_t pullup_value              :    1;  /*Control pull up value.*/
+            uint32_t usb_pad_enable            :    1;  /*Enable USB pad function.*/
+            uint32_t phy_tx_edge_sel           :    1;  /*0: TX output at clock negedge. 1: Tx output at clock posedge.*/
+            uint32_t usb_jtag_bridge_en        :    1;  /*Set this bit usb_jtag, the connection between usb_jtag and internal JTAG is disconnected, and MTMS, MTDI, MTCK are output through GPIO Matrix, MTDO is input through GPIO Matrix.*/
+            uint32_t reserved17                    :    15;
+        };
+        uint32_t val;
+    } conf0;
+    union {
+        struct {
+            uint32_t test_enable               :    1;  /*Enable test of the USB pad*/
+            uint32_t test_usb_oe               :    1;  /*USB pad oen in test*/
+            uint32_t test_tx_dp                :    1;  /*USB D+ tx value in test*/
+            uint32_t test_tx_dm                :    1;  /*USB D- tx value in test*/
+            uint32_t test_rx_rcv               :    1;  /*USB differential rx value in test*/
+            uint32_t test_rx_dp                :    1;  /*USB D+ rx value in test*/
+            uint32_t test_rx_dm                :    1;  /*USB D- rx value in test*/
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } test;
+    union {
+        struct {
+            uint32_t in_fifo_cnt               :    2;  /*JTAT in fifo counter.*/
+            uint32_t in_fifo_empty             :    1;  /*1: JTAG in fifo is empty.*/
+            uint32_t in_fifo_full              :    1;  /*1: JTAG in fifo is full.*/
+            uint32_t out_fifo_cnt              :    2;  /*JTAT out fifo counter.*/
+            uint32_t out_fifo_empty            :    1;  /*1: JTAG out fifo is empty.*/
+            uint32_t out_fifo_full             :    1;  /*1: JTAG out fifo is full.*/
+            uint32_t in_fifo_reset             :    1;  /*Write 1 to reset JTAG in fifo.*/
+            uint32_t out_fifo_reset            :    1;  /*Write 1 to reset JTAG out fifo.*/
+            uint32_t reserved10                    :    22;
+        };
+        uint32_t val;
+    } jfifo_st;
+    union {
+        struct {
+            uint32_t sof_frame_index           :    11;  /*Frame index of received SOF frame.*/
+            uint32_t reserved11                    :    21;
+        };
+        uint32_t val;
+    } fram_num;
+    union {
+        struct {
+            uint32_t in_ep0_state              :    2;  /*State of IN Endpoint 0.*/
+            uint32_t in_ep0_wr_addr            :    7;  /*Write data address of IN endpoint 0.*/
+            uint32_t in_ep0_rd_addr            :    7;  /*Read data address of IN endpoint 0.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } in_ep0_st;
+    union {
+        struct {
+            uint32_t in_ep1_state              :    2;  /*State of IN Endpoint 1.*/
+            uint32_t in_ep1_wr_addr            :    7;  /*Write data address of IN endpoint 1.*/
+            uint32_t in_ep1_rd_addr            :    7;  /*Read data address of IN endpoint 1.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } in_ep1_st;
+    union {
+        struct {
+            uint32_t in_ep2_state              :    2;  /*State of IN Endpoint 2.*/
+            uint32_t in_ep2_wr_addr            :    7;  /*Write data address of IN endpoint 2.*/
+            uint32_t in_ep2_rd_addr            :    7;  /*Read data address of IN endpoint 2.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } in_ep2_st;
+    union {
+        struct {
+            uint32_t in_ep3_state              :    2;  /*State of IN Endpoint 3.*/
+            uint32_t in_ep3_wr_addr            :    7;  /*Write data address of IN endpoint 3.*/
+            uint32_t in_ep3_rd_addr            :    7;  /*Read data address of IN endpoint 3.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } in_ep3_st;
+    union {
+        struct {
+            uint32_t out_ep0_state             :    2;  /*State of OUT Endpoint 0.*/
+            uint32_t out_ep0_wr_addr           :    7;  /*Write data address of OUT endpoint 0. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is detected, there are USB_DEVICE_OUT_EP0_WR_ADDR-2 bytes data in OUT EP0.*/
+            uint32_t out_ep0_rd_addr           :    7;  /*Read data address of OUT endpoint 0.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } out_ep0_st;
+    union {
+        struct {
+            uint32_t out_ep1_state             :    2;  /*State of OUT Endpoint 1.*/
+            uint32_t out_ep1_wr_addr           :    7;  /*Write data address of OUT endpoint 1. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is detected, there are USB_DEVICE_OUT_EP1_WR_ADDR-2 bytes data in OUT EP1.*/
+            uint32_t out_ep1_rd_addr           :    7;  /*Read data address of OUT endpoint 1.*/
+            uint32_t out_ep1_rec_data_cnt      :    7;  /*Data count in OUT endpoint 1 when one packet is received.*/
+            uint32_t reserved23                    :    9;  /*reserved*/
+        };
+        uint32_t val;
+    } out_ep1_st;
+    union {
+        struct {
+            uint32_t out_ep2_state             :    2;  /*State of OUT Endpoint 2.*/
+            uint32_t out_ep2_wr_addr           :    7;  /*Write data address of OUT endpoint 2. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is detected, there are USB_DEVICE_OUT_EP2_WR_ADDR-2 bytes data in OUT EP2.*/
+            uint32_t out_ep2_rd_addr           :    7;  /*Read data address of OUT endpoint 2.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } out_ep2_st;
+    union {
+        struct {
+            uint32_t clk_en                    :    1;  /*1'h1: Force clock on for register. 1'h0: Support clock only when application writes registers.*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } misc_conf;
+    union {
+        struct {
+            uint32_t usb_mem_pd                :    1;  /*1: power down usb memory.*/
+            uint32_t usb_mem_clk_en            :    1;  /*1: Force clock on for usb memory.*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } mem_conf;
+    uint32_t reserved_4c;
+    uint32_t reserved_50;
+    uint32_t reserved_54;
+    uint32_t reserved_58;
+    uint32_t reserved_5c;
+    uint32_t reserved_60;
+    uint32_t reserved_64;
+    uint32_t reserved_68;
+    uint32_t reserved_6c;
+    uint32_t reserved_70;
+    uint32_t reserved_74;
+    uint32_t reserved_78;
+    uint32_t reserved_7c;
+    uint32_t date;
+} usb_serial_jtag_dev_t;
+extern usb_serial_jtag_dev_t USB_SERIAL_JTAG;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_USB_SERIAL_JTAG_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_struct.h
new file mode 100644
index 00000000000..d9645f1cb5d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_struct.h
@@ -0,0 +1,107 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "usb_types.h"
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct usb_reg {
+    volatile uint32_t gotgctl;              // 0x0000 OTG Control and Status Register
+    volatile uint32_t gotgint;              // 0x0004 OTG Interrupt Register
+    volatile uint32_t gahbcfg;              // 0x0008 AHB Configuration Register
+    volatile uint32_t gusbcfg;              // 0x000c USB Configuration Register
+    volatile uint32_t grstctl;              // 0x0010 Reset Register
+    volatile uint32_t gintsts;              // 0x0014 Interrupt Register
+    volatile uint32_t gintmsk;              // 0x0018 Interrupt Mask Register
+    volatile uint32_t grxstsr;              // 0x001c Receive Status Debug Read Register
+    volatile uint32_t grxstsp;              // 0x0020 Receive Status Read/Pop Register
+    volatile uint32_t grxfsiz;              // 0x0024 Receive FIFO Size Register
+    volatile uint32_t gnptxfsiz;            // 0x0028 Non-periodic Transmit FIFO Size Register
+    volatile uint32_t gnptxsts;             // 0x002c Non-periodic Transmit FIFO/Queue Status Register
+    uint32_t reserved_0x0030_0x0040[4];     // 0x0030 to 0x0040
+    volatile uint32_t gsnpsid;              // 0x0040 Synopsys ID Register
+    volatile uint32_t ghwcfg1;              // 0x0044 User Hardware Configuration 1 Register
+    volatile uint32_t ghwcfg2;              // 0x0048 User Hardware Configuration 2 Register
+    volatile uint32_t ghwcfg3;              // 0x004c User Hardware Configuration 3 Register
+    volatile uint32_t ghwcfg4;              // 0x0050 User Hardware Configuration 4 Register
+    uint32_t reserved_0x0054_0x005c[2];     // 0x0054 to 0x005c
+    volatile uint32_t gdfifocfg;            // 0x005c Global DFIFO Configuration Register
+    uint32_t reserved_0x0060_0x0100[40];    // 0x0060 to 0x0100
+    volatile uint32_t hptxfsiz;             // 0x0100 Host Periodic Transmit FIFO Size Register
+    volatile uint32_t dieptxf[4];           // 0x0104 to 0x0114 Device IN Endpoint Transmit FIFO Size Register i
+    uint32_t reserved_0x0114_0x0140[11];    // 0x0114 to 0x0140
+    uint32_t reserved_0x0140_0x0400[176];   // 0x0140 to 0x0400
+    /**
+     * Host mode registers offsets from 0x0400 to 0x07FF
+     */
+    volatile uint32_t hcfg;                 // 0x0400 Host Configuration Register
+    volatile uint32_t hfir;                 // 0x0404 Host Frame Interval Register
+    volatile uint32_t hfnum;                // 0x0408 Host Frame Number/Frame Remaining Register
+    uint32_t reserved0x40C;                 // 0x040c Reserved
+    volatile uint32_t hptxsts;              // 0x0410 Host Periodic Transmit FIFO/ Queue Status Register
+    volatile uint32_t haint;                // 0x0414 Host All Channels Interrupt Register
+    volatile uint32_t haintmsk;             // 0x0418 Host All Channels Interrupt Mask Register
+    volatile uint32_t hflbaddr;             // 0x041c Host Frame List Base Address Register
+    uint32_t reserved0x0420_0x0440[8];      // 0x0420 to 0x0440
+    volatile uint32_t hprt;                 // 0x0440 Host Port Control and Status Register
+    uint32_t reserved_0x0444_0x0500[47];    // 0x0444 to 0x0500
+    //Skip over the host channel registers
+    volatile uint32_t host_chan_regs[128];  // 0x0500 to 0x0700
+    uint32_t reserved_0x0700_0x0800[64];    // 0x0700 to 0x0800
+    /**
+     * Device mode registers offsets from
+     */
+    volatile uint32_t dcfg;                 // 0x0800 Device Configuration Register
+    volatile uint32_t dctl;                 // 0x0804 Device Control Register
+    volatile uint32_t dsts;                 // 0x0808 Device Status Register (Read Only)
+    uint32_t reserved0x80c;                 // 0x080c
+    volatile uint32_t diepmsk;              // 0x0810 Device IN Endpoint Common Interrupt Mask Register
+    volatile uint32_t doepmsk;              // 0x0814 Device OUT Endpoint Common Interrupt Mask Register
+    volatile uint32_t daint;                // 0x0818 Device All Endpoints Interrupt Register
+    volatile uint32_t daintmsk;             // 0x081c Device All Endpoints Interrupt Mask Register
+    uint32_t reserved_0x0820_0x0828[2];     // 0x0820 to 0x0828
+    volatile uint32_t dvbusdis;             // 0x0828 Device VBUS discharge Register
+    volatile uint32_t dvbuspulse;           // 0x082c Device VBUS Pulse Register
+    volatile uint32_t dthrctl;              // 0x0830 Device Thresholding control register (Read/Write)
+    volatile uint32_t dtknqr4_fifoemptymsk; // 0x0834 Device IN Endpoint FIFO Empty Interrupt Mask register
+    uint32_t reserved_0x0838_0x0900[50];    // 0x0838 to 0x0900
+    // Input Endpoints
+    usb_in_endpoint_t in_ep_reg[USB_IN_EP_NUM];     // 0x0900 to 0x09e0 IN EP registers
+    uint32_t reserved_0x09e0_0x0b00[72];    // 0x09e0 to 0x0b00
+    // Output Endpoints
+    usb_out_endpoint_t out_ep_reg[USB_OUT_EP_NUM];  // 0x0b00 to 0x0be0 OUT EP registers
+    uint32_t reserved_0x0be0_0x0d00[72];    // 0x0be0 to 0x0d00
+    uint32_t reserved_0x0d00_0x0e00[64];    // 0x0d00 to 0x0e00
+    /**
+     * Power Control and direct FIFO access
+     */
+    uint32_t pcgctrl;                       // 0x0e00 Power and Clock Gating Control Register
+    uint32_t reserved_0x0e04;               // 0x0e04
+    uint8_t reserved8[0x1000 - 0xe08];      // 0x0d00 to 0x1000
+    uint32_t fifo[16][0x400];               // 0x1000 to 0x2000 Device EP i/Host Channel i FIFO
+    uint8_t reserved0x11000[0x20000 - 0x11000];
+    uint32_t dbg_fifo[0x20000];             // 0x2000 to 0x22000 Direct Access to Data FIFO RAM for Debugging
+} usb_dev_t;
+
+extern usb_dev_t USB0;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_types.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_types.h
new file mode 100644
index 00000000000..69e213ec847
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_types.h
@@ -0,0 +1,73 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stdint.h>
+
+/* USB IN EP index */
+typedef enum {
+    USB_IN_EP_0 = 0,
+    USB_IN_EP_1,
+    USB_IN_EP_2,
+    USB_IN_EP_3,
+    USB_IN_EP_4,
+    USB_IN_EP_5,
+    USB_IN_EP_6,
+    USB_IN_EP_NUM
+} usb_in_ep_idx_t;
+
+/* USB OUT EP index */
+typedef enum {
+    USB_OUT_EP_0 = 0,
+    USB_OUT_EP_1,
+    USB_OUT_EP_2,
+    USB_OUT_EP_3,
+    USB_OUT_EP_4,
+    USB_OUT_EP_5,
+    USB_OUT_EP_6,
+    USB_OUT_EP_NUM
+} usb_out_ep_idx_t;
+
+/* USB IN EP Register block type */
+typedef struct usb_in_ep_reg {
+    volatile uint32_t diepctl;
+    uint32_t reserved;
+    volatile uint32_t diepint;
+    uint32_t reserved1;
+    volatile uint32_t dieptsiz;
+    volatile uint32_t diepdma;
+    volatile uint32_t dtxfsts;
+    uint32_t reserved2;
+} usb_in_endpoint_t;
+
+/* USB OUT EP Register block type */
+typedef struct usb_out_ep_reg {
+    volatile uint32_t doepctl;
+    uint32_t reserved;
+    volatile uint32_t doepint;
+    uint32_t reserved1;
+    volatile uint32_t doeptsiz;
+    volatile uint32_t doepdma;
+    uint32_t reserved2;
+    uint32_t reserved3;
+} usb_out_endpoint_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_wrap_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_wrap_reg.h
new file mode 100644
index 00000000000..45502289cdf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_wrap_reg.h
@@ -0,0 +1,216 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_USB_WRAP_REG_H_
+#define _SOC_USB_WRAP_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define USB_WRAP_OTG_CONF_REG          (DR_REG_USB_WRAP_BASE + 0x0)
+/* USB_WRAP_CLK_EN : R/W ;bitpos:[31] ;default: 1'h0 ; */
+/*description: Disable auto clock gating of CSR registers .*/
+#define USB_WRAP_CLK_EN    (BIT(31))
+#define USB_WRAP_CLK_EN_M  (BIT(31))
+#define USB_WRAP_CLK_EN_V  0x1
+#define USB_WRAP_CLK_EN_S  31
+/* USB_WRAP_DFIFO_FORCE_PU : R/W ;bitpos:[22] ;default: 1'b0 ; */
+/*description: Disable the dfifo to go into low power mode. The data in dfifo will not lost..*/
+#define USB_WRAP_DFIFO_FORCE_PU    (BIT(22))
+#define USB_WRAP_DFIFO_FORCE_PU_M  (BIT(22))
+#define USB_WRAP_DFIFO_FORCE_PU_V  0x1
+#define USB_WRAP_DFIFO_FORCE_PU_S  22
+/* USB_WRAP_PHY_TX_EDGE_SEL : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: Select phy tx signal output clock edge.*/
+#define USB_WRAP_PHY_TX_EDGE_SEL    (BIT(21))
+#define USB_WRAP_PHY_TX_EDGE_SEL_M  (BIT(21))
+#define USB_WRAP_PHY_TX_EDGE_SEL_V  0x1
+#define USB_WRAP_PHY_TX_EDGE_SEL_S  21
+/* USB_WRAP_PHY_CLK_FORCE_ON : R/W ;bitpos:[20] ;default: 1'b1 ; */
+/*description: Force phy clock always on.*/
+#define USB_WRAP_PHY_CLK_FORCE_ON    (BIT(20))
+#define USB_WRAP_PHY_CLK_FORCE_ON_M  (BIT(20))
+#define USB_WRAP_PHY_CLK_FORCE_ON_V  0x1
+#define USB_WRAP_PHY_CLK_FORCE_ON_S  20
+/* USB_WRAP_AHB_CLK_FORCE_ON : R/W ;bitpos:[19] ;default: 1'b1 ; */
+/*description: Force ahb clock always on.*/
+#define USB_WRAP_AHB_CLK_FORCE_ON    (BIT(19))
+#define USB_WRAP_AHB_CLK_FORCE_ON_M  (BIT(19))
+#define USB_WRAP_AHB_CLK_FORCE_ON_V  0x1
+#define USB_WRAP_AHB_CLK_FORCE_ON_S  19
+/* USB_WRAP_USB_PAD_ENABLE : R/W ;bitpos:[18] ;default: 1'b1 ; */
+/*description: Enable USB pad function.*/
+#define USB_WRAP_USB_PAD_ENABLE    (BIT(18))
+#define USB_WRAP_USB_PAD_ENABLE_M  (BIT(18))
+#define USB_WRAP_USB_PAD_ENABLE_V  0x1
+#define USB_WRAP_USB_PAD_ENABLE_S  18
+/* USB_WRAP_PULLUP_VALUE : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: Controlle pullup value.*/
+#define USB_WRAP_PULLUP_VALUE    (BIT(17))
+#define USB_WRAP_PULLUP_VALUE_M  (BIT(17))
+#define USB_WRAP_PULLUP_VALUE_V  0x1
+#define USB_WRAP_PULLUP_VALUE_S  17
+/* USB_WRAP_DM_PULLDOWN : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: Controlle USB D+ pulldown.*/
+#define USB_WRAP_DM_PULLDOWN    (BIT(16))
+#define USB_WRAP_DM_PULLDOWN_M  (BIT(16))
+#define USB_WRAP_DM_PULLDOWN_V  0x1
+#define USB_WRAP_DM_PULLDOWN_S  16
+/* USB_WRAP_DM_PULLUP : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: Controlle USB D+ pullup.*/
+#define USB_WRAP_DM_PULLUP    (BIT(15))
+#define USB_WRAP_DM_PULLUP_M  (BIT(15))
+#define USB_WRAP_DM_PULLUP_V  0x1
+#define USB_WRAP_DM_PULLUP_S  15
+/* USB_WRAP_DP_PULLDOWN : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: Controlle USB D+ pulldown.*/
+#define USB_WRAP_DP_PULLDOWN    (BIT(14))
+#define USB_WRAP_DP_PULLDOWN_M  (BIT(14))
+#define USB_WRAP_DP_PULLDOWN_V  0x1
+#define USB_WRAP_DP_PULLDOWN_S  14
+/* USB_WRAP_DP_PULLUP : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: Controlle USB D+ pullup.*/
+#define USB_WRAP_DP_PULLUP    (BIT(13))
+#define USB_WRAP_DP_PULLUP_M  (BIT(13))
+#define USB_WRAP_DP_PULLUP_V  0x1
+#define USB_WRAP_DP_PULLUP_S  13
+/* USB_WRAP_PAD_PULL_OVERRIDE : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Enable software controlle USB D+ D- pullup pulldown.*/
+#define USB_WRAP_PAD_PULL_OVERRIDE    (BIT(12))
+#define USB_WRAP_PAD_PULL_OVERRIDE_M  (BIT(12))
+#define USB_WRAP_PAD_PULL_OVERRIDE_V  0x1
+#define USB_WRAP_PAD_PULL_OVERRIDE_S  12
+/* USB_WRAP_VREF_OVERRIDE : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: Enable software controlle input  threshold.*/
+#define USB_WRAP_VREF_OVERRIDE    (BIT(11))
+#define USB_WRAP_VREF_OVERRIDE_M  (BIT(11))
+#define USB_WRAP_VREF_OVERRIDE_V  0x1
+#define USB_WRAP_VREF_OVERRIDE_S  11
+/* USB_WRAP_VREFL : R/W ;bitpos:[10:9] ;default: 2'b0 ; */
+/*description: Control single-end input low threshold,0.8V to 1.04V, step 80mV.*/
+#define USB_WRAP_VREFL    0x00000003
+#define USB_WRAP_VREFL_M  ((USB_WRAP_VREFL_V)<<(USB_WRAP_VREFL_S))
+#define USB_WRAP_VREFL_V  0x3
+#define USB_WRAP_VREFL_S  9
+/* USB_WRAP_VREFH : R/W ;bitpos:[8:7] ;default: 2'b0 ; */
+/*description: Control single-end input high threshold,1.76V to 2V, step 80mV.*/
+#define USB_WRAP_VREFH    0x00000003
+#define USB_WRAP_VREFH_M  ((USB_WRAP_VREFH_V)<<(USB_WRAP_VREFH_S))
+#define USB_WRAP_VREFH_V  0x3
+#define USB_WRAP_VREFH_S  7
+/* USB_WRAP_EXCHG_PINS : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: USB D+ D- exchange.*/
+#define USB_WRAP_EXCHG_PINS    (BIT(6))
+#define USB_WRAP_EXCHG_PINS_M  (BIT(6))
+#define USB_WRAP_EXCHG_PINS_V  0x1
+#define USB_WRAP_EXCHG_PINS_S  6
+/* USB_WRAP_EXCHG_PINS_OVERRIDE : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Enable software controlle USB D+ D- exchange.*/
+#define USB_WRAP_EXCHG_PINS_OVERRIDE    (BIT(5))
+#define USB_WRAP_EXCHG_PINS_OVERRIDE_M  (BIT(5))
+#define USB_WRAP_EXCHG_PINS_OVERRIDE_V  0x1
+#define USB_WRAP_EXCHG_PINS_OVERRIDE_S  5
+/* USB_WRAP_DBNCE_FLTR_BYPASS : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Bypass Debounce filters for avalid,bvalid,vbusvalid,session end, id signals.*/
+#define USB_WRAP_DBNCE_FLTR_BYPASS    (BIT(4))
+#define USB_WRAP_DBNCE_FLTR_BYPASS_M  (BIT(4))
+#define USB_WRAP_DBNCE_FLTR_BYPASS_V  0x1
+#define USB_WRAP_DBNCE_FLTR_BYPASS_S  4
+/* USB_WRAP_DFIFO_FORCE_PD : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Force the dfifo to go into low power mode. The data in dfifo will not lost..*/
+#define USB_WRAP_DFIFO_FORCE_PD    (BIT(3))
+#define USB_WRAP_DFIFO_FORCE_PD_M  (BIT(3))
+#define USB_WRAP_DFIFO_FORCE_PD_V  0x1
+#define USB_WRAP_DFIFO_FORCE_PD_S  3
+/* USB_WRAP_PHY_SEL : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Select internal external PHY.*/
+#define USB_WRAP_PHY_SEL    (BIT(2))
+#define USB_WRAP_PHY_SEL_M  (BIT(2))
+#define USB_WRAP_PHY_SEL_V  0x1
+#define USB_WRAP_PHY_SEL_S  2
+/* USB_WRAP_SRP_SESSEND_VALUE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Software over-ride value of srp session end signal..*/
+#define USB_WRAP_SRP_SESSEND_VALUE    (BIT(1))
+#define USB_WRAP_SRP_SESSEND_VALUE_M  (BIT(1))
+#define USB_WRAP_SRP_SESSEND_VALUE_V  0x1
+#define USB_WRAP_SRP_SESSEND_VALUE_S  1
+/* USB_WRAP_SRP_SESSEND_OVERRIDE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to enable the software over-ride of srp session end signal..*/
+#define USB_WRAP_SRP_SESSEND_OVERRIDE    (BIT(0))
+#define USB_WRAP_SRP_SESSEND_OVERRIDE_M  (BIT(0))
+#define USB_WRAP_SRP_SESSEND_OVERRIDE_V  0x1
+#define USB_WRAP_SRP_SESSEND_OVERRIDE_S  0
+
+#define USB_WRAP_TEST_CONF_REG          (DR_REG_USB_WRAP_BASE + 0x4)
+/* USB_WRAP_TEST_RX_DM : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: USB D- rx value in test.*/
+#define USB_WRAP_TEST_RX_DM    (BIT(6))
+#define USB_WRAP_TEST_RX_DM_M  (BIT(6))
+#define USB_WRAP_TEST_RX_DM_V  0x1
+#define USB_WRAP_TEST_RX_DM_S  6
+/* USB_WRAP_TEST_RX_DP : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: USB D+ rx value in test.*/
+#define USB_WRAP_TEST_RX_DP    (BIT(5))
+#define USB_WRAP_TEST_RX_DP_M  (BIT(5))
+#define USB_WRAP_TEST_RX_DP_V  0x1
+#define USB_WRAP_TEST_RX_DP_S  5
+/* USB_WRAP_TEST_RX_RCV : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: USB differential rx value in test.*/
+#define USB_WRAP_TEST_RX_RCV    (BIT(4))
+#define USB_WRAP_TEST_RX_RCV_M  (BIT(4))
+#define USB_WRAP_TEST_RX_RCV_V  0x1
+#define USB_WRAP_TEST_RX_RCV_S  4
+/* USB_WRAP_TEST_TX_DM : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: USB D- tx value in test.*/
+#define USB_WRAP_TEST_TX_DM    (BIT(3))
+#define USB_WRAP_TEST_TX_DM_M  (BIT(3))
+#define USB_WRAP_TEST_TX_DM_V  0x1
+#define USB_WRAP_TEST_TX_DM_S  3
+/* USB_WRAP_TEST_TX_DP : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: USB D+ tx value in test.*/
+#define USB_WRAP_TEST_TX_DP    (BIT(2))
+#define USB_WRAP_TEST_TX_DP_M  (BIT(2))
+#define USB_WRAP_TEST_TX_DP_V  0x1
+#define USB_WRAP_TEST_TX_DP_S  2
+/* USB_WRAP_TEST_USB_OE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: USB pad oen in test.*/
+#define USB_WRAP_TEST_USB_OE    (BIT(1))
+#define USB_WRAP_TEST_USB_OE_M  (BIT(1))
+#define USB_WRAP_TEST_USB_OE_V  0x1
+#define USB_WRAP_TEST_USB_OE_S  1
+/* USB_WRAP_TEST_ENABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Enable test of the USB pad.*/
+#define USB_WRAP_TEST_ENABLE    (BIT(0))
+#define USB_WRAP_TEST_ENABLE_M  (BIT(0))
+#define USB_WRAP_TEST_ENABLE_V  0x1
+#define USB_WRAP_TEST_ENABLE_S  0
+
+#define USB_WRAP_DATE_REG          (DR_REG_USB_WRAP_BASE + 0x3FC)
+/* USB_WRAP_DATE : R/W ;bitpos:[31:0] ;default: 32'h2102010 ; */
+/*description: Date register.*/
+#define USB_WRAP_DATE    0xFFFFFFFF
+#define USB_WRAP_DATE_M  ((USB_WRAP_DATE_V)<<(USB_WRAP_DATE_S))
+#define USB_WRAP_DATE_V  0xFFFFFFFF
+#define USB_WRAP_DATE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_USB_WRAP_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_wrap_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_wrap_struct.h
new file mode 100644
index 00000000000..3df4106cd5b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usb_wrap_struct.h
@@ -0,0 +1,443 @@
+/** Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Control/Status registers */
+/** Type of otg_conf register
+ *  PAD/DFIFO/PHY configuration register.
+ */
+typedef union {
+    struct {
+        /** srp_sessend_override : R/W; bitpos: [0]; default: 0;
+         *  This bit is used to enable the software override of srp session end signal.1'b0:
+         *  the signal is controlled by the chip input.1'b1: the signal is controlled by the
+         *  software.
+         */
+        uint32_t srp_sessend_override:1;
+        /** srp_sessend_value : R/W; bitpos: [1]; default: 0;
+         *  Software override value of srp session end signal.
+         */
+        uint32_t srp_sessend_value:1;
+        /** phy_sel : R/W; bitpos: [2]; default: 0;
+         *  Select internal or external PHY.1'b0: Select internal PHY.1'b1: Select external PHY
+         */
+        uint32_t phy_sel:1;
+        /** dfifo_force_pd : R/W; bitpos: [3]; default: 0;
+         *  Force the dfifo to go into low power mode. The data in dfifo will not lost.
+         */
+        uint32_t dfifo_force_pd:1;
+        /** dbnce_fltr_bypass : R/W; bitpos: [4]; default: 0;
+         *  Bypass Debounce filters for avalid.
+         */
+        uint32_t dbnce_fltr_bypass:1;
+        /** exchg_pins_override : R/W; bitpos: [5]; default: 0;
+         *  Enable software to control USB D+ D- exchange
+         */
+        uint32_t exchg_pins_override:1;
+        /** exchg_pins : R/W; bitpos: [6]; default: 0;
+         *  USB D+/D- exchange.1'b0: don't change.1'b1: exchange D+ D-.
+         */
+        uint32_t exchg_pins:1;
+        /** vrefh : R/W; bitpos: [8:7]; default: 0;
+         *  Control single-end input high threshold.
+         */
+        uint32_t vrefh:2;
+        /** vrefl : R/W; bitpos: [10:9]; default: 0;
+         *  Control single-end input low threshold.
+         */
+        uint32_t vrefl:2;
+        /** vref_override : R/W; bitpos: [11]; default: 0;
+         *  Enable software to control input  threshold.
+         */
+        uint32_t vref_override:1;
+        /** pad_pull_override : R/W; bitpos: [12]; default: 0;
+         *  Enable software to control USB pad in pullup or pulldown mode.
+         */
+        uint32_t pad_pull_override:1;
+        /** dp_pullup : R/W; bitpos: [13]; default: 0;
+         *  Control USB D+ pullup.
+         */
+        uint32_t dp_pullup:1;
+        /** dp_pulldown : R/W; bitpos: [14]; default: 0;
+         *  Control USB D+ pulldown.
+         */
+        uint32_t dp_pulldown:1;
+        /** dm_pullup : R/W; bitpos: [15]; default: 0;
+         *  Control USB D+ pullup.
+         */
+        uint32_t dm_pullup:1;
+        /** dm_pulldown : R/W; bitpos: [16]; default: 0;
+         *  Control USB D+ pulldown.
+         */
+        uint32_t dm_pulldown:1;
+        /** pullup_value : R/W; bitpos: [17]; default: 0;
+         *  Control pullup value.1'b0: typical value is 2.4K.1'b1: typical value is 1.2K.
+         */
+        uint32_t pullup_value:1;
+        /** pad_enable : R/W; bitpos: [18]; default: 0;
+         *  Enable USB pad function.
+         */
+        uint32_t pad_enable:1;
+        /** ahb_clk_force_on : R/W; bitpos: [19]; default: 1;
+         *  Force AHB clock always on.
+         */
+        uint32_t ahb_clk_force_on:1;
+        /** phy_clk_force_on : R/W; bitpos: [20]; default: 1;
+         *  Force PHY clock always on.
+         */
+        uint32_t phy_clk_force_on:1;
+        /** phy_tx_edge_sel : R/W; bitpos: [21]; default: 0;
+         *  Select PHY tx signal output clock edge.1'b0: negedge;1'b1: posedge.
+         */
+        uint32_t phy_tx_edge_sel:1;
+        /** dfifo_force_pu : R/W; bitpos: [22]; default: 0;
+         *  Disable the dfifo to go into low power mode. The data in dfifo will not lost.
+         */
+        uint32_t dfifo_force_pu:1;
+        uint32_t reserved_23:8;
+        /** clk_en : R/W; bitpos: [31]; default: 0;
+         *  Disable auto clock gating of CSR registers.
+         */
+        uint32_t clk_en:1;
+    };
+    uint32_t val;
+} usb_wrap_otg_conf_reg_t;
+
+/** Type of test_conf register
+ *  TEST relative configuration registers.
+ */
+typedef union {
+    struct {
+        /** test_enable : R/W; bitpos: [0]; default: 0;
+         *  Enable to test the USB pad.
+         */
+        uint32_t test_enable:1;
+        /** test_usb_wrap_oe : R/W; bitpos: [1]; default: 0;
+         *  USB pad oen in test.
+         */
+        uint32_t test_usb_wrap_oe:1;
+        /** test_tx_dp : R/W; bitpos: [2]; default: 0;
+         *  USB D+ tx value in test.
+         */
+        uint32_t test_tx_dp:1;
+        /** test_tx_dm : R/W; bitpos: [3]; default: 0;
+         *  USB D- tx value in test.
+         */
+        uint32_t test_tx_dm:1;
+        /** test_rx_rcv : RO; bitpos: [4]; default: 0;
+         *  USB differential rx value in test.
+         */
+        uint32_t test_rx_rcv:1;
+        /** test_rx_dp : RO; bitpos: [5]; default: 0;
+         *  USB D+ rx value in test.
+         */
+        uint32_t test_rx_dp:1;
+        /** test_rx_dm : RO; bitpos: [6]; default: 0;
+         *  USB D- rx value in test.
+         */
+        uint32_t test_rx_dm:1;
+        uint32_t reserved7:25;
+    };
+    uint32_t val;
+} usb_wrap_test_conf_reg_t;
+
+
+/** Status registers */
+/** Type of date register
+ *  Version register.
+ */
+typedef union {
+    struct {
+        /** date : R/W; bitpos: [31:0]; default: 419631616;
+         *  data register.
+         */
+        uint32_t date:32;
+    };
+    uint32_t val;
+} usb_wrap_date_reg_t;
+
+
+typedef struct {
+    volatile usb_wrap_otg_conf_reg_t otg_conf;
+    volatile usb_wrap_test_conf_reg_t test_conf;
+    uint32_t reserved_008;
+    uint32_t reserved_00c;
+    uint32_t reserved_010;
+    uint32_t reserved_014;
+    uint32_t reserved_018;
+    uint32_t reserved_01c;
+    uint32_t reserved_020;
+    uint32_t reserved_024;
+    uint32_t reserved_028;
+    uint32_t reserved_02c;
+    uint32_t reserved_030;
+    uint32_t reserved_034;
+    uint32_t reserved_038;
+    uint32_t reserved_03c;
+    uint32_t reserved_040;
+    uint32_t reserved_044;
+    uint32_t reserved_048;
+    uint32_t reserved_04c;
+    uint32_t reserved_050;
+    uint32_t reserved_054;
+    uint32_t reserved_058;
+    uint32_t reserved_05c;
+    uint32_t reserved_060;
+    uint32_t reserved_064;
+    uint32_t reserved_068;
+    uint32_t reserved_06c;
+    uint32_t reserved_070;
+    uint32_t reserved_074;
+    uint32_t reserved_078;
+    uint32_t reserved_07c;
+    uint32_t reserved_080;
+    uint32_t reserved_084;
+    uint32_t reserved_088;
+    uint32_t reserved_08c;
+    uint32_t reserved_090;
+    uint32_t reserved_094;
+    uint32_t reserved_098;
+    uint32_t reserved_09c;
+    uint32_t reserved_0a0;
+    uint32_t reserved_0a4;
+    uint32_t reserved_0a8;
+    uint32_t reserved_0ac;
+    uint32_t reserved_0b0;
+    uint32_t reserved_0b4;
+    uint32_t reserved_0b8;
+    uint32_t reserved_0bc;
+    uint32_t reserved_0c0;
+    uint32_t reserved_0c4;
+    uint32_t reserved_0c8;
+    uint32_t reserved_0cc;
+    uint32_t reserved_0d0;
+    uint32_t reserved_0d4;
+    uint32_t reserved_0d8;
+    uint32_t reserved_0dc;
+    uint32_t reserved_0e0;
+    uint32_t reserved_0e4;
+    uint32_t reserved_0e8;
+    uint32_t reserved_0ec;
+    uint32_t reserved_0f0;
+    uint32_t reserved_0f4;
+    uint32_t reserved_0f8;
+    uint32_t reserved_0fc;
+    uint32_t reserved_100;
+    uint32_t reserved_104;
+    uint32_t reserved_108;
+    uint32_t reserved_10c;
+    uint32_t reserved_110;
+    uint32_t reserved_114;
+    uint32_t reserved_118;
+    uint32_t reserved_11c;
+    uint32_t reserved_120;
+    uint32_t reserved_124;
+    uint32_t reserved_128;
+    uint32_t reserved_12c;
+    uint32_t reserved_130;
+    uint32_t reserved_134;
+    uint32_t reserved_138;
+    uint32_t reserved_13c;
+    uint32_t reserved_140;
+    uint32_t reserved_144;
+    uint32_t reserved_148;
+    uint32_t reserved_14c;
+    uint32_t reserved_150;
+    uint32_t reserved_154;
+    uint32_t reserved_158;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t reserved_180;
+    uint32_t reserved_184;
+    uint32_t reserved_188;
+    uint32_t reserved_18c;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    uint32_t reserved_1fc;
+    uint32_t reserved_200;
+    uint32_t reserved_204;
+    uint32_t reserved_208;
+    uint32_t reserved_20c;
+    uint32_t reserved_210;
+    uint32_t reserved_214;
+    uint32_t reserved_218;
+    uint32_t reserved_21c;
+    uint32_t reserved_220;
+    uint32_t reserved_224;
+    uint32_t reserved_228;
+    uint32_t reserved_22c;
+    uint32_t reserved_230;
+    uint32_t reserved_234;
+    uint32_t reserved_238;
+    uint32_t reserved_23c;
+    uint32_t reserved_240;
+    uint32_t reserved_244;
+    uint32_t reserved_248;
+    uint32_t reserved_24c;
+    uint32_t reserved_250;
+    uint32_t reserved_254;
+    uint32_t reserved_258;
+    uint32_t reserved_25c;
+    uint32_t reserved_260;
+    uint32_t reserved_264;
+    uint32_t reserved_268;
+    uint32_t reserved_26c;
+    uint32_t reserved_270;
+    uint32_t reserved_274;
+    uint32_t reserved_278;
+    uint32_t reserved_27c;
+    uint32_t reserved_280;
+    uint32_t reserved_284;
+    uint32_t reserved_288;
+    uint32_t reserved_28c;
+    uint32_t reserved_290;
+    uint32_t reserved_294;
+    uint32_t reserved_298;
+    uint32_t reserved_29c;
+    uint32_t reserved_2a0;
+    uint32_t reserved_2a4;
+    uint32_t reserved_2a8;
+    uint32_t reserved_2ac;
+    uint32_t reserved_2b0;
+    uint32_t reserved_2b4;
+    uint32_t reserved_2b8;
+    uint32_t reserved_2bc;
+    uint32_t reserved_2c0;
+    uint32_t reserved_2c4;
+    uint32_t reserved_2c8;
+    uint32_t reserved_2cc;
+    uint32_t reserved_2d0;
+    uint32_t reserved_2d4;
+    uint32_t reserved_2d8;
+    uint32_t reserved_2dc;
+    uint32_t reserved_2e0;
+    uint32_t reserved_2e4;
+    uint32_t reserved_2e8;
+    uint32_t reserved_2ec;
+    uint32_t reserved_2f0;
+    uint32_t reserved_2f4;
+    uint32_t reserved_2f8;
+    uint32_t reserved_2fc;
+    uint32_t reserved_300;
+    uint32_t reserved_304;
+    uint32_t reserved_308;
+    uint32_t reserved_30c;
+    uint32_t reserved_310;
+    uint32_t reserved_314;
+    uint32_t reserved_318;
+    uint32_t reserved_31c;
+    uint32_t reserved_320;
+    uint32_t reserved_324;
+    uint32_t reserved_328;
+    uint32_t reserved_32c;
+    uint32_t reserved_330;
+    uint32_t reserved_334;
+    uint32_t reserved_338;
+    uint32_t reserved_33c;
+    uint32_t reserved_340;
+    uint32_t reserved_344;
+    uint32_t reserved_348;
+    uint32_t reserved_34c;
+    uint32_t reserved_350;
+    uint32_t reserved_354;
+    uint32_t reserved_358;
+    uint32_t reserved_35c;
+    uint32_t reserved_360;
+    uint32_t reserved_364;
+    uint32_t reserved_368;
+    uint32_t reserved_36c;
+    uint32_t reserved_370;
+    uint32_t reserved_374;
+    uint32_t reserved_378;
+    uint32_t reserved_37c;
+    uint32_t reserved_380;
+    uint32_t reserved_384;
+    uint32_t reserved_388;
+    uint32_t reserved_38c;
+    uint32_t reserved_390;
+    uint32_t reserved_394;
+    uint32_t reserved_398;
+    uint32_t reserved_39c;
+    uint32_t reserved_3a0;
+    uint32_t reserved_3a4;
+    uint32_t reserved_3a8;
+    uint32_t reserved_3ac;
+    uint32_t reserved_3b0;
+    uint32_t reserved_3b4;
+    uint32_t reserved_3b8;
+    uint32_t reserved_3bc;
+    uint32_t reserved_3c0;
+    uint32_t reserved_3c4;
+    uint32_t reserved_3c8;
+    uint32_t reserved_3cc;
+    uint32_t reserved_3d0;
+    uint32_t reserved_3d4;
+    uint32_t reserved_3d8;
+    uint32_t reserved_3dc;
+    uint32_t reserved_3e0;
+    uint32_t reserved_3e4;
+    uint32_t reserved_3e8;
+    uint32_t reserved_3ec;
+    uint32_t reserved_3f0;
+    uint32_t reserved_3f4;
+    uint32_t reserved_3f8;
+    volatile usb_wrap_date_reg_t date;
+} usb_wrap_dev_t;
+
+_Static_assert(sizeof(usb_wrap_dev_t)==0x400, "Invalid USB_WRAP size");
+
+extern usb_wrap_dev_t USB_WRAP;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usbh_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usbh_struct.h
new file mode 100644
index 00000000000..3a52bf9952e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/usbh_struct.h
@@ -0,0 +1,1164 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/* ---------------------------- Register Types ------------------------------ */
+
+typedef union {
+    struct {
+        uint32_t sesreqscs: 1;
+        uint32_t sesreq: 1;
+        uint32_t vbvalidoven: 1;
+        uint32_t vbvalidovval: 1;
+        uint32_t avalidoven: 1;
+        uint32_t avalidovval: 1;
+        uint32_t bvalidoven: 1;
+        uint32_t bvalidovval: 1;
+        uint32_t hstnegscs: 1;
+        uint32_t hnpreq: 1;
+        uint32_t hstsethnpen: 1;
+        uint32_t devhnpen: 1;
+        uint32_t ehen: 1;
+        uint32_t reserved2: 2;
+        uint32_t dbncefltrbypass: 1;
+        uint32_t conidsts: 1;
+        uint32_t dbnctime: 1;
+        uint32_t asesvld: 1;
+        uint32_t bsesvld: 1;
+        uint32_t otgver: 1;
+        uint32_t curmod: 1;
+        uint32_t reserved10: 10;
+    };
+    uint32_t val;
+} usb_gotgctl_reg_t;
+
+typedef union {
+    struct {
+        uint32_t reserved2: 2;
+        uint32_t sesenddet: 1;
+        uint32_t reserved5: 5;
+        uint32_t sesreqsucstschng: 1;
+        uint32_t hstnegsucstschng: 1;
+        uint32_t reserved7: 7;
+        uint32_t hstnegdet: 1;
+        uint32_t adevtoutchg: 1;
+        uint32_t dbncedone: 1;
+        uint32_t reserved12: 12;
+    };
+    uint32_t val;
+} usb_gotgint_reg_t;
+
+typedef union {
+        struct {
+        uint32_t glbllntrmsk: 1;
+        uint32_t hbstlen: 4;
+        uint32_t dmaen: 1;
+        uint32_t reserved1: 1;
+        uint32_t nptxfemplvl: 1;
+        uint32_t ptxfemplvl: 1;
+        uint32_t reserved12: 12;
+        uint32_t remmemsupp: 1;
+        uint32_t notialldmawrit: 1;
+        uint32_t ahbsingle: 1;
+        uint32_t invdescendianess: 1;
+        uint32_t reserved7: 7;
+    };
+    uint32_t val;
+    //Checked
+} usb_gahbcfg_reg_t;
+
+typedef union {
+    struct {
+        uint32_t toutcal: 3;
+        uint32_t phyif: 1;
+        uint32_t reserved1a: 1;
+        uint32_t fsintf: 1;
+        uint32_t physel: 1;
+        uint32_t reserved1b: 1;
+        uint32_t srpcap: 1;
+        uint32_t hnpcap: 1;
+        uint32_t usbtrdtim: 4;
+        uint32_t reserved8: 8;
+        uint32_t termseldlpulse: 1;
+        uint32_t reserved5: 5;
+        uint32_t txenddelay: 1;
+        uint32_t forcehstmode: 1;
+        uint32_t forcedevmode: 1;
+        uint32_t corrupttxpkt: 1;
+    };
+    uint32_t val;
+} usb_gusbcfg_reg_t;
+
+typedef union {
+    struct {
+        uint32_t csftrst: 1;
+        uint32_t piufssftrst: 1;
+        uint32_t frmcntrrst: 1;
+        uint32_t reserved1: 1;
+        uint32_t rxfflsh: 1;
+        uint32_t txfflsh: 1;
+        uint32_t txfnum: 5;
+        uint32_t reserved19: 19;
+        uint32_t dmareq: 1;
+        uint32_t ahbidle: 1;
+    };
+    uint32_t val;
+} usb_grstctl_reg_t;
+
+typedef union {
+    struct {
+        uint32_t curmod_int: 1;
+        uint32_t modemis: 1;
+        uint32_t otgint: 1;
+        uint32_t sof: 1;
+        uint32_t rxflvi: 1;
+        uint32_t nptxfemp: 1;
+        uint32_t ginnakeff: 1;
+        uint32_t goutnakeff: 1;
+        uint32_t reserved2: 2;
+        uint32_t erlysusp: 1;
+        uint32_t usbsusp: 1;
+        uint32_t usbrst: 1;
+        uint32_t enumdone: 1;
+        uint32_t isooutdrop: 1;
+        uint32_t eopf: 1;
+        uint32_t reserved1a: 1;
+        uint32_t epmis: 1;
+        uint32_t iepint: 1;
+        uint32_t oepint: 1;
+        uint32_t incompisoin: 1;
+        uint32_t incompip: 1;
+        uint32_t fetsusp: 1;
+        uint32_t resetdet: 1;
+        uint32_t prtlnt: 1;
+        uint32_t hchlnt: 1;
+        uint32_t ptxfemp: 1;
+        uint32_t reserved1b: 1;
+        uint32_t conidstschng: 1;
+        uint32_t disconnint: 1;
+        uint32_t sessreqint: 1;
+        uint32_t wkupint: 1;
+    };
+    uint32_t val;
+} usb_gintsts_reg_t;
+
+typedef union {
+    struct {
+        uint32_t reserved1a: 1;
+        uint32_t modemismsk: 1;
+        uint32_t otgintmsk: 1;
+        uint32_t sofmsk: 1;
+        uint32_t rxflvimsk: 1;
+        uint32_t nptxfempmsk: 1;
+        uint32_t ginnakeffmsk: 1;
+        uint32_t goutnackeffmsk: 1;
+        uint32_t reserved2: 2;
+        uint32_t erlysuspmsk: 1;
+        uint32_t usbsuspmsk: 1;
+        uint32_t usbrstmsk: 1;
+        uint32_t enumdonemsk: 1;
+        uint32_t isooutdropmsk: 1;
+        uint32_t eopfmsk: 1;
+        uint32_t reserved1b: 1;
+        uint32_t epmismsk: 1;
+        uint32_t iepintmsk: 1;
+        uint32_t oepintmsk: 1;
+        uint32_t incompisoinmsk: 1;
+        uint32_t incompipmsk: 1;
+        uint32_t fetsuspmsk: 1;
+        uint32_t resetdetmsk: 1;
+        uint32_t prtlntmsk: 1;
+        uint32_t hchintmsk: 1;
+        uint32_t ptxfempmsk: 1;
+        uint32_t reserved1c: 1;
+        uint32_t conidstschngmsk: 1;
+        uint32_t disconnintmsk: 1;
+        uint32_t sessreqintmsk: 1;
+        uint32_t wkupintmsk: 1;
+    };
+    uint32_t val;
+} usb_gintmsk_reg_t;
+
+typedef union {
+    struct {
+        uint32_t g_chnum: 4;
+        uint32_t g_bcnt: 11;
+        uint32_t g_dpid: 2;
+        uint32_t g_pktsts: 4;
+        uint32_t g_fn: 4;
+        uint32_t reserved7: 7;
+    };
+    uint32_t val;
+} usb_grxstsr_reg_t;
+
+typedef union {
+    struct {
+        uint32_t chnum: 4;
+        uint32_t bcnt: 11;
+        uint32_t dpid: 2;
+        uint32_t pktsts: 4;
+        uint32_t fn: 4;
+        uint32_t reserved7: 7;
+    };
+    uint32_t val;
+} usb_grxstsp_reg_t;
+
+typedef union {
+    struct {
+        uint32_t rxfdep: 16;
+        uint32_t reserved16: 16;
+    };
+    uint32_t val;
+} usb_grxfsiz_reg_t;
+
+typedef union {
+    struct {
+        uint32_t nptxfstaddr: 16;
+        uint32_t nptxfdep: 16;
+    };
+    uint32_t val;
+} usb_gnptxfsiz_reg_t;
+
+typedef union {
+    struct {
+        uint32_t nptxfspcavail: 16;
+        uint32_t nptxqspcavail: 4;
+        uint32_t reserved4: 4;
+        uint32_t nptxqtop: 7;
+        uint32_t reserved1: 1;
+    };
+    uint32_t val;
+} usb_gnptxsts_reg_t;
+
+typedef union {
+    struct {
+        uint32_t synopsysid;
+    };
+    uint32_t val;
+} usb_gsnpsid_reg_t;
+
+typedef union {
+    struct {
+        uint32_t epdir;
+    };
+    uint32_t val;
+} usb_ghwcfg1_reg_t;
+
+typedef union {
+    struct {
+        uint32_t otgmode: 3;
+        uint32_t otgarch: 2;
+        uint32_t singpnt: 1;
+        uint32_t hsphytype: 2;
+        uint32_t fsphytype: 2;
+        uint32_t numdeveps: 4;
+        uint32_t numhstchnl: 4;
+        uint32_t periosupport: 1;
+        uint32_t dynfifosizing: 1;
+        uint32_t multiprocintrpt: 1;
+        uint32_t reserved1a: 1;
+        uint32_t nptxqdepth: 2;
+        uint32_t ptxqdepth: 2;
+        uint32_t tknqdepth: 5;
+        uint32_t reserved1b: 1;
+    };
+    uint32_t val;
+} usb_ghwcfg2_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfersizewidth: 4;
+        uint32_t pktsizewidth: 3;
+        uint32_t otgen: 1;
+        uint32_t i2cintsel: 1;
+        uint32_t vndctlsupt: 1;
+        uint32_t optfeature: 1;
+        uint32_t rsttype: 1;
+        uint32_t adpsupport: 1;
+        uint32_t hsicmode: 1;
+        uint32_t bcsupport: 1;
+        uint32_t lpmmode: 1;
+        uint32_t dfifodepth: 16;
+    };
+    uint32_t val;
+} usb_ghwcfg3_reg_t;
+
+typedef union {
+    struct {
+        uint32_t g_numdevperioeps: 4;
+        uint32_t g_partialpwrdn: 1;
+        uint32_t g_ahbfreq: 1;
+        uint32_t g_hibernation: 1;
+        uint32_t g_extendedhibernation: 1;
+        uint32_t reserved4: 4;
+        uint32_t g_acgsupt: 1;
+        uint32_t g_enhancedlpmsupt: 1;
+        uint32_t g_phydatawidth: 2;
+        uint32_t g_numctleps: 4;
+        uint32_t g_iddqfltr: 1;
+        uint32_t g_vbusvalidfltr: 1;
+        uint32_t g_avalidfltr: 1;
+        uint32_t g_bvalidfltr: 1;
+        uint32_t g_sessendfltr: 1;
+        uint32_t g_dedfifomode: 1;
+        uint32_t g_ineps: 4;
+        uint32_t g_descdmaenabled: 1;
+        uint32_t g_descdma: 1;
+    };
+    uint32_t val;
+} usb_ghwcfg4_reg_t;
+
+typedef union {
+    struct {
+        uint32_t gdfifocfg: 16;
+        uint32_t epinfobaseaddr: 16;
+
+    };
+    uint32_t val;
+} usb_gdfifocfg_reg_t;
+
+typedef union {
+    struct {
+        uint32_t ptxfstaddr: 16;
+        uint32_t ptxfsize: 16;
+    };
+    uint32_t val;
+} usb_hptxfsiz_reg_t;
+
+typedef union {
+    struct {
+        uint32_t inepitxfstaddr: 16;
+        uint32_t inep1txfdep: 16;
+    };
+    uint32_t val;
+} usb_dieptxfi_reg_t;
+
+typedef union {
+    struct {
+        uint32_t fslspclksel: 2;
+        uint32_t fslssupp: 1;
+        uint32_t reserved4a: 4;
+        uint32_t ena32khzs: 1;
+        uint32_t resvalid: 8;
+        uint32_t reserved1: 1;
+        uint32_t reserved6: 6;
+        uint32_t descdma: 1;
+        uint32_t frlisten: 2;
+        uint32_t perschedena: 1;
+        uint32_t reserved4b: 4;
+        uint32_t modechtimen: 1;
+    };
+    uint32_t val;
+} usb_hcfg_reg_t;
+
+typedef union {
+    struct {
+        uint32_t frint: 16;
+        uint32_t hfirrldctrl: 1;
+        uint32_t reserved15: 15;
+    };
+    uint32_t val;
+} usb_hfir_reg_t;
+
+typedef union {
+    struct {
+        uint32_t frnum: 14;
+        uint32_t reserved: 2;
+        uint32_t frrem: 16;
+    };
+    uint32_t val;
+} usb_hfnum_reg_t;
+
+typedef union {
+    struct {
+        uint32_t ptxfspcavail: 16;
+        uint32_t ptxqspcavail: 5;
+        uint32_t reserved: 3;
+        uint32_t ptxqtop: 8;
+    };
+    uint32_t val;
+} usb_hptxsts_reg_t;
+
+typedef union {
+    struct {
+        uint32_t haint: 8;
+        uint32_t reserved24: 24;
+    };
+    uint32_t val;
+} usb_haint_reg_t;
+
+typedef union {
+    struct {
+        uint32_t haintmsk: 8;
+        uint32_t reserved24: 24;
+    };
+    uint32_t val;
+} usb_haintmsk_reg_t;
+
+typedef union {
+    struct {
+        uint32_t hflbaddr;
+    };
+    uint32_t val;
+} usb_hflbaddr_reg_t;
+
+typedef union {
+    struct {
+        uint32_t prtconnsts: 1;
+        uint32_t prtconndet: 1;
+        uint32_t prtena: 1;
+        uint32_t prtenchng: 1;
+        uint32_t prtovrcurract: 1;
+        uint32_t prtovrcurrchng: 1;
+        uint32_t prtres: 1;
+        uint32_t prtsusp: 1;
+        uint32_t prtrst: 1;
+        uint32_t reserved1: 1;
+        uint32_t prtlnsts: 2;
+        uint32_t prtpwr: 1;
+        uint32_t prttstctl: 4;
+        uint32_t prtspd: 2;
+        uint32_t reserved13: 13;
+    };
+    uint32_t val;
+} usb_hprt_reg_t;
+
+typedef union {
+    struct {
+        uint32_t mps: 11;
+        uint32_t epnum: 4;
+        uint32_t epdir: 1;
+        uint32_t reserved: 1;
+        uint32_t lspddev: 1;
+        uint32_t eptype: 2;
+        uint32_t ec: 2;
+        uint32_t devaddr: 7;
+        uint32_t oddfrm: 1;
+        uint32_t chdis: 1;
+        uint32_t chena: 1;
+    };
+    uint32_t val;
+    //Checked with changes
+} usb_hcchar_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfercompl: 1;
+        uint32_t chhltd: 1;
+        uint32_t ahberr: 1;
+        uint32_t stall: 1;
+        uint32_t nack: 1;
+        uint32_t ack: 1;
+        uint32_t nyet: 1;
+        uint32_t xacterr: 1;
+        uint32_t bblerr: 1;
+        uint32_t frmovrun: 1;
+        uint32_t datatglerr: 1;
+        uint32_t bnaintr: 1;
+        uint32_t xcs_xact_err: 1;
+        uint32_t desc_lst_rollintr: 1;
+        uint32_t reserved18: 18;
+    };
+    uint32_t val;
+    //Checked
+} usb_hcint_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfercomplmsk: 1;
+        uint32_t chhltdmsk: 1;
+        uint32_t ahberrmsk: 1;
+        uint32_t stallmsk: 1;
+        uint32_t nakmsk: 1;
+        uint32_t ackmsk: 1;
+        uint32_t nyetmsk: 1;
+        uint32_t xacterrmsk: 1;
+        uint32_t bblerrmsk: 1;
+        uint32_t frmovrunmsk: 1;
+        uint32_t datatglerrmsk: 1;
+        uint32_t bnaintrmsk: 1;
+        uint32_t reserved1: 1;
+        uint32_t desc_lst_rollintrmsk: 1;
+        uint32_t reserved18: 18;
+    };
+    uint32_t val;
+    //Checked
+} usb_hcintmsk_reg_t;
+
+typedef union {
+    struct {
+        uint32_t sched_info: 8;
+        uint32_t ntd: 8;
+        uint32_t reserved3: 3;
+        uint32_t reserved10: 10;
+        uint32_t pid: 2;
+        uint32_t dopng: 1;
+    };
+    uint32_t val;
+    //Checked
+} usb_hctsiz_reg_t;
+
+typedef union {
+    struct {
+        uint32_t reserved3: 3;
+        uint32_t ctd: 6;
+        uint32_t dmaaddr: 23;
+    } non_iso;
+    struct {
+        uint32_t reserved3: 3;
+        uint32_t dmaaddr_ctd: 29;
+    } iso;
+    uint32_t val;
+    //Checked
+} usb_hcdma_reg_t;
+
+typedef union {
+    struct {
+        uint32_t hcdmab;
+    };
+    uint32_t val;
+} usb_hcdmab_reg_t;
+
+typedef union {
+    struct {
+        uint32_t reserved2a: 2;
+        uint32_t nzstsouthshk: 1;
+        uint32_t reserved1: 1;
+        uint32_t devaddr: 7;
+        uint32_t perfrlint: 2;
+        uint32_t endevoutnak: 1;
+        uint32_t xcvrdly: 1;
+        uint32_t erraticintmsk: 1;
+        uint32_t reserved2b: 2;
+        uint32_t epmiscnt: 5;
+        uint32_t descdma: 1;
+        uint32_t perschintvl: 2;
+        uint32_t resvalid: 6;
+    };
+    uint32_t val;
+} usb_dcfg_reg_t;
+
+typedef union {
+    struct {
+        uint32_t rmtwkupsig: 1;
+        uint32_t sftdiscon: 1;
+        uint32_t gnpinnaksts: 1;
+        uint32_t goutnaksts: 1;
+        uint32_t tstctl: 3;
+        uint32_t sgnpinnak: 1;
+        uint32_t cgnpinnak: 1;
+        uint32_t sgoutnak: 1;
+        uint32_t cgoutnak: 1;
+        uint32_t pwronprgdone: 1;
+        uint32_t reserved1: 1;
+        uint32_t gmc: 2;
+        uint32_t ignrfrmnum: 1;
+        uint32_t nakonbble: 1;
+        uint32_t encountonbna: 1;
+        uint32_t deepsleepbeslreject: 1;
+        uint32_t reserved3: 13;
+    };
+    uint32_t val;
+} usb_dctl_reg_t;
+
+typedef union {
+    struct {
+        uint32_t suspsts: 1;
+        uint32_t enumspd: 2;
+        uint32_t errticerr: 1;
+        uint32_t reserved4: 4;
+        uint32_t soffn: 14;
+        uint32_t devlnsts: 2;
+        uint32_t reserved8: 8;
+    };
+    uint32_t val;
+} usb_dsts_reg_t;
+
+typedef union {
+    struct {
+        uint32_t di_xfercomplmsk: 1;
+        uint32_t di_epdisbldmsk: 1;
+        uint32_t di_ahbermsk: 1;
+        uint32_t timeoutmsk: 1;
+        uint32_t intkntxfempmsk: 1;
+        uint32_t intknepmismsk: 1;
+        uint32_t inepnakeffmsk: 1;
+        uint32_t reserved1: 1;
+        uint32_t txfifoundrnmsk: 1;
+        uint32_t bnainintrmsk: 1;
+        uint32_t reserved3: 3;
+        uint32_t di_nakmsk: 1;
+        uint32_t reserved18: 18;
+    };
+    uint32_t val;
+} usb_diepmsk_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfercomplmsk: 1;
+        uint32_t epdisbldmsk: 1;
+        uint32_t ahbermsk: 1;
+        uint32_t setupmsk: 1;
+        uint32_t outtknepdismsk: 1;
+        uint32_t stsphsercvdmsk: 1;
+        uint32_t back2backsetup: 1;
+        uint32_t reserved1: 1;
+        uint32_t outpkterrmsk: 1;
+        uint32_t bnaoutintrmsk: 1;
+        uint32_t reserved2: 2;
+        uint32_t bbleerrmsk: 1;
+        uint32_t nakmsk: 1;
+        uint32_t nyetmsk: 1;
+        uint32_t reserved17: 17;
+    };
+    uint32_t val;
+} usb_doepmsk_reg_t;
+
+typedef union {
+    struct {
+        uint32_t inepint0: 1;
+        uint32_t inepint1: 1;
+        uint32_t inepint2: 1;
+        uint32_t inepint3: 1;
+        uint32_t inepint4: 1;
+        uint32_t inepint5: 1;
+        uint32_t inepint6: 1;
+        uint32_t reserved9a: 9;
+        uint32_t outepint0: 1;
+        uint32_t outepint1: 1;
+        uint32_t outepint2: 1;
+        uint32_t outepint3: 1;
+        uint32_t outepint4: 1;
+        uint32_t outepint5: 1;
+        uint32_t outepint6: 1;
+        uint32_t reserved9b: 9;
+    };
+    uint32_t val;
+} usb_daint_reg_t;
+
+typedef union {
+    struct {
+        uint32_t inepmsk0: 1;
+        uint32_t inepmsk1: 1;
+        uint32_t inepmsk2: 1;
+        uint32_t inepmsk3: 1;
+        uint32_t inepmsk4: 1;
+        uint32_t inepmsk5: 1;
+        uint32_t inepmsk6: 1;
+        uint32_t reserved9a: 9;
+        uint32_t outepmsk0: 1;
+        uint32_t outepmsk1: 1;
+        uint32_t outepmsk2: 1;
+        uint32_t outepmsk3: 1;
+        uint32_t outepmsk4: 1;
+        uint32_t outepmsk5: 1;
+        uint32_t outepmsk6: 1;
+        uint32_t reserved9b: 9;
+    };
+    uint32_t val;
+} usb_daintmsk_reg_t;
+
+typedef union {
+    struct {
+        uint32_t dvbusdis: 16;
+        uint32_t reserved16: 16;
+    };
+    uint32_t val;
+} usb_dvbusdis_reg_t;
+
+typedef union {
+    struct {
+        uint32_t dvbuspulse: 12;
+        uint32_t reserved20: 20;
+    };
+    uint32_t val;
+} usb_dvbuspulse_reg_t;
+
+typedef union {
+    struct {
+        uint32_t nonisothren: 1;
+        uint32_t isothren: 1;
+        uint32_t txthrlen: 9;
+        uint32_t ahbthrratio: 2;
+        uint32_t reserved3: 3;
+        uint32_t rxthren: 1;
+        uint32_t rxthrlen: 9;
+        uint32_t reserved1: 1;
+        uint32_t arbprken: 1;
+        uint32_t reserved4: 4;
+    };
+    uint32_t val;
+} usb_dthrctl_reg_t;
+
+typedef union {
+    struct {
+        uint32_t ineptxfernpmsk: 16;
+        uint32_t reserved16: 16;
+    };
+    uint32_t val;
+} usb_diepempmsk_reg_t;
+
+typedef union {
+    struct {
+        uint32_t mps0: 2;
+        uint32_t reserved9: 9;
+        uint32_t reserved4: 4;
+        uint32_t usbactep0: 1;
+        uint32_t reserved1a: 1;
+        uint32_t naksts0: 1;
+        uint32_t eptype0: 2;
+        uint32_t reserved1b: 1;
+        uint32_t stall0: 1;
+        uint32_t txfnum0: 4;
+        uint32_t cnak0: 1;
+        uint32_t snak0: 1;
+        uint32_t reserved2: 2;
+        uint32_t epdis0: 1;
+        uint32_t epena0: 1;
+    };
+    uint32_t val;
+} usb_diepctl0_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfercompl0: 1;
+        uint32_t epdisbld0: 1;
+        uint32_t ahberr0: 1;
+        uint32_t timeout0: 1;
+        uint32_t intkntxfemp0: 1;
+        uint32_t intknepmis0: 1;
+        uint32_t inepnakeff0: 1;
+        uint32_t txfemp0: 1;
+        uint32_t txfifoundrn0: 1;
+        uint32_t bnaintr0: 1;
+        uint32_t reserved1: 1;
+        uint32_t pktdrpsts0: 1;
+        uint32_t bbleerr0: 1;
+        uint32_t nakintrpt0: 1;
+        uint32_t nyetintrpt0: 1;
+        uint32_t reserved17: 17;
+    };
+    uint32_t val;
+} usb_diepint0_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfersize0: 7;
+        uint32_t reserved12: 12;
+        uint32_t pktcnt0: 2;
+        uint32_t reserved11: 11;
+    };
+    uint32_t val;
+} usb_dieptsiz0_reg_t;
+
+typedef union {
+    struct {
+        uint32_t dmaaddr0;
+    };
+    uint32_t val;
+} usb_diepdma0_reg_t;
+
+typedef union {
+    struct {
+        uint32_t ineptxfspcavail0: 16;
+        uint32_t reserved16: 16;
+    };
+    uint32_t val;
+} usb_dtxfsts0_reg_t;
+
+typedef union {
+    struct {
+        uint32_t dmabufferaddr0;
+    };
+    uint32_t val;
+} usb_diepdmab0_reg_t;
+
+typedef union {
+    struct {
+        uint32_t mps: 2;
+        uint32_t reserved9: 9;
+        uint32_t reserved4: 4;
+        uint32_t usbactep: 1;
+        uint32_t reserved1a: 1;
+        uint32_t naksts: 1;
+        uint32_t eptype: 2;
+        uint32_t reserved1b: 1;
+        uint32_t stall: 1;
+        uint32_t txfnum: 4;
+        uint32_t cnak: 1;
+        uint32_t snak: 1;
+        uint32_t setd0pid: 1;
+        uint32_t setd1pid: 1;
+        uint32_t epdis: 1;
+        uint32_t epena: 1;
+    };
+    uint32_t val;
+} usb_diepctl_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfercompl: 1;
+        uint32_t epdisbld: 1;
+        uint32_t ahberr: 1;
+        uint32_t timeout: 1;
+        uint32_t intkntxfemp: 1;
+        uint32_t intknepmis: 1;
+        uint32_t inepnakeff: 1;
+        uint32_t txfemp: 1;
+        uint32_t txfifoundrn: 1;
+        uint32_t bnaintr: 1;
+        uint32_t reserved1: 1;
+        uint32_t pktdrpsts: 1;
+        uint32_t bbleerr: 1;
+        uint32_t nakintrpt: 1;
+        uint32_t nyetintrpt: 1;
+        uint32_t reserved15: 17;
+    };
+    uint32_t val;
+} usb_diepint_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfersize: 7;
+        uint32_t reserved12: 12;
+        uint32_t pktcnt: 2;
+        uint32_t reserved11: 11;
+    };
+    uint32_t val;
+} usb_dieptsiz_reg_t;
+
+typedef union {
+    struct {
+        uint32_t dmaddr1;
+    };
+    uint32_t val;
+} usb_diepdma_reg_t;
+
+typedef union {
+    struct {
+        uint32_t ineptxfspcavail: 16;
+        uint32_t reserved16: 16;
+    };
+    uint32_t val;
+} usb_dtxfsts_reg_t;
+
+typedef union {
+    struct {
+        uint32_t dmabufferaddr1;
+    };
+    uint32_t val;
+} usb_diepdmab_reg_t;
+
+typedef union {
+    struct {
+        uint32_t mps0: 2;
+        uint32_t reserved13: 13;
+        uint32_t usbactep0: 1;
+        uint32_t reserved1: 1;
+        uint32_t naksts0: 1;
+        uint32_t eptype0: 2;
+        uint32_t snp0: 1;
+        uint32_t stall0: 1;
+        uint32_t reserved4: 4;
+        uint32_t cnak0: 1;
+        uint32_t snak0: 1;
+        uint32_t reserved2: 2;
+        uint32_t epdis0: 1;
+        uint32_t epena0: 1;
+    };
+    uint32_t val;
+} usb_doepctl0_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfercompl0: 1;
+        uint32_t epdisbld0: 1;
+        uint32_t ahberr0: 1;
+        uint32_t setup0: 1;
+        uint32_t outtknepdis0: 1;
+        uint32_t stsphsercvd0: 1;
+        uint32_t back2backsetup0: 1;
+        uint32_t reserved1a: 1;
+        uint32_t outpkterr0: 1;
+        uint32_t bnaintr0: 1;
+        uint32_t reserved1b: 1;
+        uint32_t pktdrpsts0: 1;
+        uint32_t bbleerr0: 1;
+        uint32_t nakintrpt0: 1;
+        uint32_t nyepintrpt0: 1;
+        uint32_t stuppktrcvd0: 1;
+        uint32_t reserved16: 16;
+    };
+    uint32_t val;
+} usb_doepint0_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfersize0: 7;
+        uint32_t reserved12: 12;
+        uint32_t pktcnt0: 1;
+        uint32_t reserved9: 9;
+        uint32_t supcnt0: 2;
+        uint32_t reserved1: 1;
+    };
+    uint32_t val;
+} usb_doeptsiz0_reg_t;
+
+typedef union {
+    struct {
+        uint32_t dmaaddr0;
+    };
+    uint32_t val;
+} usb_doepdma0_reg_t;
+
+typedef union {
+    struct {
+        uint32_t dmabufferaddr0;
+    };
+    uint32_t val;
+} usb_doepdmab0_reg_t;
+
+typedef union {
+    struct {
+        uint32_t mps: 11;
+        uint32_t reserved4a: 4;
+        uint32_t usbactep: 1;
+        uint32_t reserved1: 1;
+        uint32_t naksts: 1;
+        uint32_t eptype: 2;
+        uint32_t snp: 1;
+        uint32_t stall: 1;
+        uint32_t reserved4b: 4;
+        uint32_t cnak: 1;
+        uint32_t snak: 1;
+        uint32_t setd0pid: 1;
+        uint32_t setd1pid: 1;
+        uint32_t epdis: 1;
+        uint32_t epena: 1;
+    };
+    uint32_t val;
+} usb_doepctl_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfercompl: 1;
+        uint32_t epdisbld: 1;
+        uint32_t ahberr: 1;
+        uint32_t setup: 1;
+        uint32_t outtknepdis: 1;
+        uint32_t stsphsercvd: 1;
+        uint32_t back2backsetup: 1;
+        uint32_t reserved1a: 1;
+        uint32_t outpkterr: 1;
+        uint32_t bnaintr: 1;
+        uint32_t reserved1b: 1;
+        uint32_t pktdrpsts: 1;
+        uint32_t bbleerr: 1;
+        uint32_t nakintrpt: 1;
+        uint32_t nyepintrpt: 1;
+        uint32_t stuppktrcvd: 1;
+        uint32_t reserved16: 16;
+    };
+    uint32_t val;
+} usb_doepint_reg_t;
+
+typedef union {
+    struct {
+        uint32_t xfersize: 7;
+        uint32_t reserved12: 12;
+        uint32_t pktcnt: 1;
+        uint32_t reserved9: 9;
+        uint32_t supcnt: 2;
+        uint32_t reserved1: 1;
+    };
+    uint32_t val;
+} usb_doeptsiz_reg_t;
+
+typedef union {
+    struct {
+        uint32_t dmaaddr;
+    };
+    uint32_t val;
+} usb_doepdma_reg_t;
+
+typedef union {
+    struct {
+        uint32_t dmabufferaddr;
+    };
+    uint32_t val;
+} usb_doepdmab_reg_t;
+
+typedef union {
+    struct {
+        uint32_t stoppclk: 1;
+        uint32_t gatehclk: 1;
+        uint32_t pwrclmp: 1;
+        uint32_t rstpdwnmodule: 1;
+        uint32_t reserved2: 2;
+        uint32_t physleep: 1;
+        uint32_t l1suspended: 1;
+        uint32_t resetaftersusp: 1;
+        uint32_t reserved23: 23;
+    };
+    uint32_t val;
+} usb_pcgcctl_reg_t;
+
+/* --------------------------- Register Groups ------------------------------ */
+
+typedef struct {
+    volatile usb_hcchar_reg_t hcchar_reg;    //0x00
+    uint32_t reserved_0x04_0x08[1]; //0x04
+    volatile usb_hcint_reg_t hcint_reg;      //0x08
+    volatile usb_hcintmsk_reg_t hcintmsk_reg;    //0x0c
+    volatile usb_hctsiz_reg_t hctsiz_reg;    //0x10
+    volatile usb_hcdma_reg_t hcdma_reg;      //0x14
+    uint32_t reserved_0x14_0x14[1]; //0x18*
+    volatile usb_hcdmab_reg_t hcdmab_reg;    //0x1c
+} usb_host_chan_regs_t;
+
+typedef struct {
+    volatile usb_diepctl_reg_t diepctl_reg;  //0x00
+    uint32_t reserved_0x04_0x08[1]; //0x04
+    volatile usb_diepint_reg_t diepint_reg;  //0x08
+    uint32_t reserved_0x0c_0x10[1]; //0x0c
+    volatile usb_dieptsiz_reg_t dieptsiz_reg;    //0x010
+    volatile usb_diepdma_reg_t diepdma_reg;  //0x14
+    volatile usb_dtxfsts_reg_t dtxfsts_reg;  //0x18
+    volatile usb_diepdmab_reg_t diepdmab_reg;    //0x1c
+} usb_in_ep_regs_t;
+
+typedef struct {
+    volatile usb_doepctl_reg_t doepctl_reg;  //0x00
+    uint32_t reserved_0x04_0x08[1]; //0x04
+    volatile usb_doepint_reg_t doepint_reg;  //0x08
+    uint32_t reserved_0x0c_0x10[1]; //0x0c
+    volatile usb_doeptsiz_reg_t doeptsiz_reg;    //0x10
+    volatile usb_doepdma_reg_t doepdma_reg;  //0x14
+    uint32_t reserved_0x18_0x1c[1]; //0x18
+    volatile usb_doepdmab_reg_t doepdmab_reg;    //0x1c
+} usb_out_ep_regs_t;
+
+/* --------------------------- Register Layout ------------------------------ */
+
+typedef struct {
+    //Global Registers
+    volatile usb_gotgctl_reg_t gotgctl_reg;             //0x0000
+    volatile usb_gotgint_reg_t gotgint_reg;             //0x0004
+    volatile usb_gahbcfg_reg_t gahbcfg_reg;             //0x0008
+    volatile usb_gusbcfg_reg_t gusbcfg_reg;             //0x000c
+    volatile usb_grstctl_reg_t grstctl_reg;             //0x0010
+    volatile usb_gintsts_reg_t gintsts_reg;             //0x0014
+    volatile usb_gintmsk_reg_t gintmsk_reg;             //0x0018
+    volatile usb_grxstsr_reg_t grxstsr_reg;             //0x001c
+    volatile usb_grxstsp_reg_t grxstsp_reg;             //0x0020
+    volatile usb_grxfsiz_reg_t grxfsiz_reg;             //0x0024
+    volatile usb_gnptxfsiz_reg_t gnptxfsiz_reg;         //0x0028
+    volatile usb_gnptxsts_reg_t gnptxsts_reg;           //0x002c
+    uint32_t reserved_0x0030_0x0040[4];                 //0x0030 to 0x0040
+    volatile usb_gsnpsid_reg_t gsnpsid_reg;             //0x0040
+    volatile usb_ghwcfg1_reg_t ghwcfg1_reg;             //0x0044
+    volatile usb_ghwcfg2_reg_t ghwcfg2_reg;             //0x0048
+    volatile usb_ghwcfg3_reg_t ghwcfg3_reg;             //0x004c
+    volatile usb_ghwcfg4_reg_t ghwcfg4_reg;             //0x0050
+    uint32_t reserved_0x0054_0x005c[2];                 //0x0054 to 0x005c
+
+    //FIFO Configurations
+    volatile usb_gdfifocfg_reg_t gdfifocfg_reg;         //0x005c
+    uint32_t reserved_0x0060_0x0100[40];                //0x0060 to 0x0100
+    volatile usb_hptxfsiz_reg_t hptxfsiz_reg;           //0x0100
+    volatile usb_dieptxfi_reg_t dieptxfi_regs[4];       //0x0104 to 0x0114
+    usb_dieptxfi_reg_t reserved_0x0114_0x0140[11];      //0x0114 to 0x0140
+    uint32_t reserved_0x140_0x400[176];                 //0x0140 to 0x0400
+
+    //Host Mode Registers
+    volatile usb_hcfg_reg_t hcfg_reg;                   //0x0400
+    volatile usb_hfir_reg_t hfir_reg;                   //0x0404
+    volatile usb_hfnum_reg_t hfnum_reg;                 //0x0408
+    uint32_t reserved_0x40c_0x410[1];                   //0x040c to 0x0410
+    volatile usb_hptxsts_reg_t hptxsts_reg;             //0x0410
+    volatile usb_haint_reg_t haint_reg;                 //0x0414
+    volatile usb_haintmsk_reg_t haintmsk_reg;           //0x0418
+    volatile usb_hflbaddr_reg_t hflbaddr_reg;           //0x041c
+    uint32_t reserved_0x420_0x440[8];                   //0x0420 to 0x0440
+    volatile usb_hprt_reg_t hprt_reg;                   //0x0440
+    uint32_t reserved_0x0444_0x0500[47];                //0x0444 to 0x0500
+    usb_host_chan_regs_t host_chans[8];                 //0x0500 to 0x0600
+    usb_host_chan_regs_t reserved_0x0600_0x0700[8];     //0x0600 to 0x0700
+    uint32_t reserved_0x0700_0x0800[64];                //0x0700 to 0x0800
+    volatile usb_dcfg_reg_t dcfg_reg;                   //0x0800
+    volatile usb_dctl_reg_t dctl_reg;                   //0x0804
+    volatile usb_dsts_reg_t dsts_reg;                   //0x0808
+    uint32_t reserved_0x080c_0x0810[1];                 //0x080c to 0x0810
+
+    //Device Mode Registers
+    volatile usb_diepmsk_reg_t diepmsk_reg;             //0x810
+    volatile usb_doepmsk_reg_t doepmsk_reg;             //0x0814
+    volatile usb_daint_reg_t daint_reg;                 //0x0818
+    volatile usb_daintmsk_reg_t daintmsk_reg;           //0x081c
+    uint32_t reserved_0x0820_0x0828[2];                 //0x0820 to 0x0828
+    volatile usb_dvbusdis_reg_t dvbusdis_reg;           //0x0828
+    volatile usb_dvbuspulse_reg_t dvbuspulse_reg;       //0x082c
+    volatile usb_dthrctl_reg_t dthrctl_reg;             //0x0830
+    volatile usb_diepempmsk_reg_t diepempmsk_reg;       //0x0834
+    uint32_t reserved_0x0838_0x0900[50];                //0x0838 to 0x0900
+
+    //Deivce: IN EP0 reigsters
+    volatile usb_diepctl0_reg_t diepctl0_reg;           //0x0900
+    uint32_t reserved_0x0904_0x0908[1];                 //0x0904 to 0x0908
+    volatile usb_diepint0_reg_t diepint0_reg;           //0x0908
+    uint32_t reserved_0x090c_0x0910[1];                 //0x090c to 0x0910
+    volatile usb_dieptsiz0_reg_t dieptsiz0_reg;         //0x0910
+    volatile usb_diepdma0_reg_t diepdma0_reg;           //0x0914
+    volatile usb_dtxfsts0_reg_t dtxfsts0_reg;           //0x0918
+    volatile usb_diepdmab0_reg_t diepdmab0_reg;         //0x091c
+
+    //Deivce: IN EP registers
+    usb_in_ep_regs_t in_eps[6];                         //0x0920 to 0x09e0
+    usb_in_ep_regs_t reserved_0x09e0_0x0b00[9];         //0x09e0 to 0x0b00
+
+    //Device: OUT EP0 reigsters
+    volatile usb_doepctl0_reg_t doepctl0_reg;           //0x0b00
+    uint32_t reserved_0x0b04_0x0b08[1];                 //0x0b04 to 0x0b08
+    volatile usb_doepint0_reg_t doepint0_reg;           //0b0b08
+    uint32_t reserved_0x0b0c_0x0b10[1];                 //0x0b0c to 0x0b10
+    volatile usb_doeptsiz0_reg_t doeptsiz0_reg;         //0x0b10
+    volatile usb_doepdma0_reg_t doepdma0_reg;           //0x0b14
+    uint32_t reserved_0x0b18_0x0b1c[1];                 //0x0b18 to 0x0b1c
+    volatile usb_doepdmab0_reg_t doepdmab0_reg;         //0x0b1c
+
+    //Deivce: OUT EP registers
+    usb_out_ep_regs_t out_eps[6];                       //0xb1c
+    usb_out_ep_regs_t reserved_0x0be0_0x0d00[9];        //0x0be0 to 0x0d00
+    uint32_t reserved_0x0d00_0x0e00[64];                //0x0d00 to 0x0e00
+    volatile usb_pcgcctl_reg_t pcgcctl_reg;             //0x0e00
+    uint32_t reserved_0x0e04_0x0e08[1];                 //0x0d00 to 0x0e00
+} usbh_dev_t;
+
+
+_Static_assert(sizeof(usbh_dev_t) == 0xe08, "USB new struct should be 0xe08 large");
+
+extern usbh_dev_t USBH;
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/wdev_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/wdev_reg.h
new file mode 100644
index 00000000000..9d4981c8d72
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/wdev_reg.h
@@ -0,0 +1,20 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc.h"
+
+/* Hardware random number generator register */
+#define WDEV_RND_REG 0x6003507C
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/world_controller_reg.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/world_controller_reg.h
new file mode 100644
index 00000000000..610e66089df
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/world_controller_reg.h
@@ -0,0 +1,1084 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_WORLD_CONTROLLER_REG_H_
+#define _SOC_WORLD_CONTROLLER_REG_H_
+
+
+#include "soc.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_1_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x0)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_1_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 1 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_1_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_1_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_1_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_1_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_1_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_1_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_2_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x4)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_2_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 2 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_2_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_2_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_2_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_2_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_2_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_2_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_3_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x8)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_3_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 3 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_3_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_3_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_3_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_3_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_3_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_3_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_4_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0xC)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_4_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 4 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_4_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_4_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_4_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_4_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_4_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_4_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_5_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x10)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_5_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 5 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_5_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_5_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_5_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_5_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_5_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_5_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_6_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x14)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_6_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 6 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_6_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_6_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_6_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_6_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_6_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_6_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_7_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x18)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_7_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 7 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_7_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_7_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_7_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_7_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_7_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_7_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_8_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x1C)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_8_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 8 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_8_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_8_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_8_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_8_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_8_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_8_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_9_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x20)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_9_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 9 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_9_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_9_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_9_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_9_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_9_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_9_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_10_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x24)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_10_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 10 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_10_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_10_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_10_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_10_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_10_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_10_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_11_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x28)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_11_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 11 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_11_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_11_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_11_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_11_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_11_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_11_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_12_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x2C)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_12_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 12 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_12_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_12_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_12_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_12_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_12_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_12_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_13_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x30)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_13_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_0 Entry 13 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_13_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_13_ADDR_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_13_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_13_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_13_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_13_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_ENTRY_CHECK_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x7C)
+/* WORLD_CONTROLLER_CORE_0_ENTRY_CHECK : R/W ;bitpos:[13:1] ;default: 1'b1 ; */
+/*description: This filed is used to enable entry address check .*/
+#define WORLD_CONTROLLER_CORE_0_ENTRY_CHECK    0x00001FFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_CHECK_M  ((WORLD_CONTROLLER_CORE_0_ENTRY_CHECK_V)<<(WORLD_CONTROLLER_CORE_0_ENTRY_CHECK_S))
+#define WORLD_CONTROLLER_CORE_0_ENTRY_CHECK_V  0x1FFF
+#define WORLD_CONTROLLER_CORE_0_ENTRY_CHECK_S  1
+
+#define WORLD_CONTROLLER_WCL_CORE_0_MESSAGE_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x100)
+/* WORLD_CONTROLLER_CORE_0_MESSAGE_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: This field is used to set address that need to write when enter WORLD0.*/
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_ADDR_M  ((WORLD_CONTROLLER_CORE_0_MESSAGE_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_MESSAGE_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_MESSAGE_MAX_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x104)
+/* WORLD_CONTROLLER_CORE_0_MESSAGE_MAX : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: This filed is used to set the max value of clear write_buffer.*/
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_MAX    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_MAX_M  ((WORLD_CONTROLLER_CORE_0_MESSAGE_MAX_V)<<(WORLD_CONTROLLER_CORE_0_MESSAGE_MAX_S))
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_MAX_V  0xF
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_MAX_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE1_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x80)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_1 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 1 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_1    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_1_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_1_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_1_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_1 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 1.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_1    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_1_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_1_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_1_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_1_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_1_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_1 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 1 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_1    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_1_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_1_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_1_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE2_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x84)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_2 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 2 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_2    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_2_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_2_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_2_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_2 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 2.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_2    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_2_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_2_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_2_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_2_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_2_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_2 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 2 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_2    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_2_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_2_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_2_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE3_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x88)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_3 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 3 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_3    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_3_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_3_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_3_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_3 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 3.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_3    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_3_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_3_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_3_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_3_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_3_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_3 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 3 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_3    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_3_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_3_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_3_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE4_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x8C)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_4 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 4 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_4    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_4_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_4_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_4_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_4 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 4.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_4    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_4_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_4_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_4_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_4_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_4_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_4 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 4 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_4    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_4_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_4_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_4_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE5_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x90)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_5 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 5 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_5    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_5_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_5_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_5_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_5 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 5.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_5    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_5_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_5_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_5_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_5_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_5_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_5 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 5 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_5    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_5_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_5_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_5_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE6_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x94)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_6 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 6 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_6    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_6_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_6_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_6_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_6 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 6.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_6    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_6_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_6_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_6_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_6_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_6_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_6 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 6 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_6    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_6_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_6_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_6_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE7_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x98)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_7 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 7 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_7    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_7_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_7_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_7_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_7 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 7.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_7    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_7_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_7_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_7_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_7_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_7_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_7 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 7 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_7    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_7_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_7_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_7_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE8_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x9C)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_8 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 8 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_8    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_8_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_8_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_8_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_8 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 8.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_8    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_8_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_8_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_8_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_8_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_8_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_8 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 8 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_8    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_8_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_8_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_8_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE9_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0xA0)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_9 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 9 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_9    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_9_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_9_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_9_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_9 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 9.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_9    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_9_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_9_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_9_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_9_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_9_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_9 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 9 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_9    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_9_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_9_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_9_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE10_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0xA4)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_10 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 10 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_10    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_10_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_10_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_10_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_10 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 10.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_10    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_10_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_10_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_10_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_10_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_10_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_10 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 10 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_10    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_10_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_10_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_10_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE11_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0xA8)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_11 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 11 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_11    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_11_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_11_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_11_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_11 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 11.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_11    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_11_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_11_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_11_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_11_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_11_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_11 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 11 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_11    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_11_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_11_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_11_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE12_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0xAC)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_12 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 12 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_12    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_12_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_12_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_12_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_12 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 12.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_12    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_12_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_12_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_12_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_12_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_12_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_12 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 12 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_12    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_12_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_12_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_12_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE13_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0xB0)
+/* WORLD_CONTROLLER_CORE_0_CURRENT_13 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 13 .*/
+#define WORLD_CONTROLLER_CORE_0_CURRENT_13    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_13_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_CURRENT_13_V  0x1
+#define WORLD_CONTROLLER_CORE_0_CURRENT_13_S  5
+/* WORLD_CONTROLLER_CORE_0_FROM_ENTRY_13 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 13.*/
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_13    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_13_M  ((WORLD_CONTROLLER_CORE_0_FROM_ENTRY_13_V)<<(WORLD_CONTROLLER_CORE_0_FROM_ENTRY_13_S))
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_13_V  0xF
+#define WORLD_CONTROLLER_CORE_0_FROM_ENTRY_13_S  1
+/* WORLD_CONTROLLER_CORE_0_FROM_WORLD_13 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 13 .*/
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_13    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_13_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_13_V  0x1
+#define WORLD_CONTROLLER_CORE_0_FROM_WORLD_13_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_STATUSTABLE_CURRENT_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0xFC)
+/* WORLD_CONTROLLER_CORE_0_STATUSTABLE_CURRENT : R/W ;bitpos:[13:1] ;default: 13'b0 ; */
+/*description: This field is used to quickly read and rewrite the current field of all STATUSTA
+BLE registers.For example.*/
+#define WORLD_CONTROLLER_CORE_0_STATUSTABLE_CURRENT    0x00001FFF
+#define WORLD_CONTROLLER_CORE_0_STATUSTABLE_CURRENT_M  ((WORLD_CONTROLLER_CORE_0_STATUSTABLE_CURRENT_V)<<(WORLD_CONTROLLER_CORE_0_STATUSTABLE_CURRENT_S))
+#define WORLD_CONTROLLER_CORE_0_STATUSTABLE_CURRENT_V  0x1FFF
+#define WORLD_CONTROLLER_CORE_0_STATUSTABLE_CURRENT_S  1
+
+#define WORLD_CONTROLLER_WCL_CORE_0_MESSAGE_PHASE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x108)
+/* WORLD_CONTROLLER_CORE_0_MESSAGE_ADDRESSPHASE : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: If this bit is 1.*/
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_ADDRESSPHASE    (BIT(6))
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_ADDRESSPHASE_M  (BIT(6))
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_ADDRESSPHASE_V  0x1
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_ADDRESSPHASE_S  6
+/* WORLD_CONTROLLER_CORE_0_MESSAGE_DATAPHASE : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: If this bit is 1.*/
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_DATAPHASE    (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_DATAPHASE_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_DATAPHASE_V  0x1
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_DATAPHASE_S  5
+/* WORLD_CONTROLLER_CORE_0_MESSAGE_EXPECT : RO ;bitpos:[4:1] ;default: 4'b0 ; */
+/*description: This field indicates the data to be written next time.*/
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_EXPECT    0x0000000F
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_EXPECT_M  ((WORLD_CONTROLLER_CORE_0_MESSAGE_EXPECT_V)<<(WORLD_CONTROLLER_CORE_0_MESSAGE_EXPECT_S))
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_EXPECT_V  0xF
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_EXPECT_S  1
+/* WORLD_CONTROLLER_CORE_0_MESSAGE_MATCH : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit indicates whether the check is successful.*/
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_MATCH    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_MATCH_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_MATCH_V  0x1
+#define WORLD_CONTROLLER_CORE_0_MESSAGE_MATCH_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_WORLD_TRIGGER_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x140)
+/* WORLD_CONTROLLER_CORE_0_WORLD_TRIGGER_ADDR : RW ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: This field is used to configure the entry address from WORLD0 to WORLD1.*/
+#define WORLD_CONTROLLER_CORE_0_WORLD_TRIGGER_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_WORLD_TRIGGER_ADDR_M  ((WORLD_CONTROLLER_CORE_0_WORLD_TRIGGER_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_WORLD_TRIGGER_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_WORLD_TRIGGER_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_WORLD_TRIGGER_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_WORLD_PREPARE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x144)
+/* WORLD_CONTROLLER_CORE_0_WORLD_PREPARE : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: This field to used to set world to enter.*/
+#define WORLD_CONTROLLER_CORE_0_WORLD_PREPARE    0x00000003
+#define WORLD_CONTROLLER_CORE_0_WORLD_PREPARE_M  ((WORLD_CONTROLLER_CORE_0_WORLD_PREPARE_V)<<(WORLD_CONTROLLER_CORE_0_WORLD_PREPARE_S))
+#define WORLD_CONTROLLER_CORE_0_WORLD_PREPARE_V  0x3
+#define WORLD_CONTROLLER_CORE_0_WORLD_PREPARE_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_WORLD_UPDATE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x148)
+/* WORLD_CONTROLLER_CORE_0_UPDATE : WO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: This field is used to update configuration completed.*/
+#define WORLD_CONTROLLER_CORE_0_UPDATE    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_UPDATE_M  ((WORLD_CONTROLLER_CORE_0_UPDATE_V)<<(WORLD_CONTROLLER_CORE_0_UPDATE_S))
+#define WORLD_CONTROLLER_CORE_0_UPDATE_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_UPDATE_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_WORLD_CANCEL_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x14C)
+/* WORLD_CONTROLLER_CORE_0_WORLD_CANCEL : WO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: This field is used to cancel switch world configuration.*/
+#define WORLD_CONTROLLER_CORE_0_WORLD_CANCEL    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_WORLD_CANCEL_M  ((WORLD_CONTROLLER_CORE_0_WORLD_CANCEL_V)<<(WORLD_CONTROLLER_CORE_0_WORLD_CANCEL_S))
+#define WORLD_CONTROLLER_CORE_0_WORLD_CANCEL_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_WORLD_CANCEL_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_WORLD_IRAM0_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x150)
+/* WORLD_CONTROLLER_CORE_0_WORLD_IRAM0 : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: this field is used to read current world of Iram0 bus.*/
+#define WORLD_CONTROLLER_CORE_0_WORLD_IRAM0    0x00000003
+#define WORLD_CONTROLLER_CORE_0_WORLD_IRAM0_M  ((WORLD_CONTROLLER_CORE_0_WORLD_IRAM0_V)<<(WORLD_CONTROLLER_CORE_0_WORLD_IRAM0_S))
+#define WORLD_CONTROLLER_CORE_0_WORLD_IRAM0_V  0x3
+#define WORLD_CONTROLLER_CORE_0_WORLD_IRAM0_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_WORLD_DRAM0_PIF_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x154)
+/* WORLD_CONTROLLER_CORE_0_WORLD_DRAM0_PIF : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: this field is used to read current world of Dram0 bus and PIF bus.*/
+#define WORLD_CONTROLLER_CORE_0_WORLD_DRAM0_PIF    0x00000003
+#define WORLD_CONTROLLER_CORE_0_WORLD_DRAM0_PIF_M  ((WORLD_CONTROLLER_CORE_0_WORLD_DRAM0_PIF_V)<<(WORLD_CONTROLLER_CORE_0_WORLD_DRAM0_PIF_S))
+#define WORLD_CONTROLLER_CORE_0_WORLD_DRAM0_PIF_V  0x3
+#define WORLD_CONTROLLER_CORE_0_WORLD_DRAM0_PIF_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_WORLD_PHASE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x158)
+/* WORLD_CONTROLLER_CORE_0_WORLD_PHASE : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit indicates whether is preparing to switch to WORLD1.*/
+#define WORLD_CONTROLLER_CORE_0_WORLD_PHASE    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_WORLD_PHASE_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_WORLD_PHASE_V  0x1
+#define WORLD_CONTROLLER_CORE_0_WORLD_PHASE_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_NMI_MASK_ENABLE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x180)
+/* WORLD_CONTROLLER_CORE_0_NMI_MASK_ENABLE : WO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: this field is used to set NMI mask.*/
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_ENABLE    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_ENABLE_M  ((WORLD_CONTROLLER_CORE_0_NMI_MASK_ENABLE_V)<<(WORLD_CONTROLLER_CORE_0_NMI_MASK_ENABLE_S))
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_ENABLE_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_ENABLE_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_NMI_MASK_TRIGGER_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x184)
+/* WORLD_CONTROLLER_CORE_0_NMI_MASK_TRIGGER_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: this field to used to set trigger address.*/
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_TRIGGER_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_TRIGGER_ADDR_M  ((WORLD_CONTROLLER_CORE_0_NMI_MASK_TRIGGER_ADDR_V)<<(WORLD_CONTROLLER_CORE_0_NMI_MASK_TRIGGER_ADDR_S))
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_TRIGGER_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_TRIGGER_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_NMI_MASK_DISABLE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x188)
+/* WORLD_CONTROLLER_CORE_0_NMI_MASK_DISABLE : WO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: this field is used to disable NMI mask.*/
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_DISABLE    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_DISABLE_M  ((WORLD_CONTROLLER_CORE_0_NMI_MASK_DISABLE_V)<<(WORLD_CONTROLLER_CORE_0_NMI_MASK_DISABLE_S))
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_DISABLE_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_DISABLE_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_NMI_MASK_CANCLE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x18C)
+/* WORLD_CONTROLLER_CORE_0_NMI_MASK_CANCEL : WO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: this field is used to cancel NMI mask disable function..*/
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_CANCEL    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_CANCEL_M  ((WORLD_CONTROLLER_CORE_0_NMI_MASK_CANCEL_V)<<(WORLD_CONTROLLER_CORE_0_NMI_MASK_CANCEL_S))
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_CANCEL_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_CANCEL_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_NMI_MASK_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x190)
+/* WORLD_CONTROLLER_CORE_0_NMI_MASK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: this bit is used to mask NMI interrupt.*/
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_V  0x1
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_0_NMI_MASK_PHASE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x194)
+/* WORLD_CONTROLLER_CORE_0_NMI_MASK_PHASE : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: this bit is used to indicates whether the NMI interrupt is being masked.*/
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_PHASE    (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_PHASE_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_PHASE_V  0x1
+#define WORLD_CONTROLLER_CORE_0_NMI_MASK_PHASE_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_1_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x400)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_1_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 1 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_1_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_1_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_1_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_1_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_1_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_1_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_2_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x404)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_2_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 2 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_2_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_2_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_2_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_2_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_2_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_2_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_3_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x408)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_3_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 3 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_3_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_3_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_3_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_3_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_3_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_3_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_4_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x40C)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_4_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 4 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_4_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_4_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_4_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_4_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_4_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_4_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_5_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x410)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_5_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 5 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_5_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_5_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_5_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_5_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_5_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_5_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_6_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x414)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_6_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 6 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_6_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_6_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_6_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_6_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_6_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_6_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_7_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x418)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_7_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 7 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_7_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_7_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_7_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_7_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_7_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_7_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_8_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x41C)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_8_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 8 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_8_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_8_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_8_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_8_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_8_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_8_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_9_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x420)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_9_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 9 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_9_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_9_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_9_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_9_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_9_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_9_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_10_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x424)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_10_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 10 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_10_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_10_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_10_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_10_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_10_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_10_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_11_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x428)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_11_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 11 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_11_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_11_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_11_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_11_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_11_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_11_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_12_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x42C)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_12_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 12 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_12_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_12_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_12_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_12_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_12_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_12_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_13_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x430)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_13_ADDR : R/W ;bitpos:[31:0] ;default: 31'b0 ; */
+/*description: Core_1 Entry 13 address from WORLD1 to WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_13_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_13_ADDR_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_13_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_13_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_13_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_13_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_ENTRY_CHECK_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x47C)
+/* WORLD_CONTROLLER_CORE_1_ENTRY_CHECK : R/W ;bitpos:[13:1] ;default: 1'b1 ; */
+/*description: This filed is used to enable entry address check .*/
+#define WORLD_CONTROLLER_CORE_1_ENTRY_CHECK    0x00001FFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_CHECK_M  ((WORLD_CONTROLLER_CORE_1_ENTRY_CHECK_V)<<(WORLD_CONTROLLER_CORE_1_ENTRY_CHECK_S))
+#define WORLD_CONTROLLER_CORE_1_ENTRY_CHECK_V  0x1FFF
+#define WORLD_CONTROLLER_CORE_1_ENTRY_CHECK_S  1
+
+#define WORLD_CONTROLLER_WCL_CORE_1_MESSAGE_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x500)
+/* WORLD_CONTROLLER_CORE_1_MESSAGE_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: This field is used to set address that need to write when enter WORLD0.*/
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_ADDR_M  ((WORLD_CONTROLLER_CORE_1_MESSAGE_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_MESSAGE_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_MESSAGE_MAX_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x504)
+/* WORLD_CONTROLLER_CORE_1_MESSAGE_MAX : R/W ;bitpos:[3:0] ;default: 4'b0 ; */
+/*description: This filed is used to set the max value of clear write_buffer.*/
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_MAX    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_MAX_M  ((WORLD_CONTROLLER_CORE_1_MESSAGE_MAX_V)<<(WORLD_CONTROLLER_CORE_1_MESSAGE_MAX_S))
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_MAX_V  0xF
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_MAX_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE1_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x480)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_1 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 1 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_1    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_1_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_1_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_1_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_1 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 1.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_1    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_1_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_1_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_1_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_1_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_1_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_1 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 1 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_1    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_1_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_1_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_1_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE2_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x484)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_2 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 2 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_2    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_2_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_2_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_2_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_2 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 2.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_2    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_2_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_2_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_2_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_2_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_2_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_2 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 2 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_2    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_2_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_2_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_2_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE3_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x488)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_3 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 3 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_3    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_3_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_3_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_3_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_3 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 3.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_3    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_3_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_3_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_3_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_3_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_3_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_3 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 3 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_3    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_3_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_3_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_3_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE4_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x48C)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_4 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 4 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_4    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_4_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_4_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_4_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_4 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 4.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_4    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_4_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_4_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_4_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_4_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_4_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_4 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 4 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_4    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_4_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_4_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_4_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE5_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x490)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_5 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 5 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_5    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_5_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_5_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_5_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_5 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 5.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_5    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_5_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_5_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_5_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_5_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_5_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_5 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 5 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_5    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_5_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_5_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_5_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE6_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x494)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_6 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 6 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_6    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_6_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_6_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_6_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_6 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 6.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_6    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_6_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_6_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_6_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_6_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_6_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_6 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 6 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_6    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_6_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_6_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_6_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE7_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x498)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_7 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 7 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_7    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_7_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_7_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_7_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_7 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 7.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_7    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_7_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_7_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_7_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_7_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_7_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_7 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 7 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_7    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_7_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_7_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_7_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE8_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x49C)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_8 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 8 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_8    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_8_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_8_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_8_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_8 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 8.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_8    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_8_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_8_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_8_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_8_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_8_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_8 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 8 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_8    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_8_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_8_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_8_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE9_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x4A0)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_9 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 9 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_9    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_9_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_9_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_9_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_9 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 9.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_9    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_9_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_9_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_9_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_9_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_9_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_9 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 9 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_9    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_9_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_9_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_9_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE10_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x4A4)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_10 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 10 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_10    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_10_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_10_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_10_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_10 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 10.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_10    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_10_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_10_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_10_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_10_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_10_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_10 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 10 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_10    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_10_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_10_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_10_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE11_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x4A8)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_11 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 11 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_11    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_11_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_11_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_11_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_11 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 11.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_11    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_11_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_11_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_11_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_11_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_11_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_11 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 11 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_11    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_11_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_11_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_11_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE12_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x4AC)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_12 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 12 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_12    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_12_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_12_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_12_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_12 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 12.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_12    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_12_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_12_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_12_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_12_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_12_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_12 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 12 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_12    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_12_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_12_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_12_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE13_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x4B0)
+/* WORLD_CONTROLLER_CORE_1_CURRENT_13 : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: This bit is used to confirm whether the current state is in entry 13 .*/
+#define WORLD_CONTROLLER_CORE_1_CURRENT_13    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_13_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_CURRENT_13_V  0x1
+#define WORLD_CONTROLLER_CORE_1_CURRENT_13_S  5
+/* WORLD_CONTROLLER_CORE_1_FROM_ENTRY_13 : R/W ;bitpos:[4:1] ;default: 4'h0 ; */
+/*description: This filed is used to confirm in which entry before enter entry 13.*/
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_13    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_13_M  ((WORLD_CONTROLLER_CORE_1_FROM_ENTRY_13_V)<<(WORLD_CONTROLLER_CORE_1_FROM_ENTRY_13_S))
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_13_V  0xF
+#define WORLD_CONTROLLER_CORE_1_FROM_ENTRY_13_S  1
+/* WORLD_CONTROLLER_CORE_1_FROM_WORLD_13 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit is used to confirm world before enter entry 13 .*/
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_13    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_13_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_13_V  0x1
+#define WORLD_CONTROLLER_CORE_1_FROM_WORLD_13_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_STATUSTABLE_CURRENT_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x4FC)
+/* WORLD_CONTROLLER_CORE_1_STATUSTABLE_CURRENT : R/W ;bitpos:[13:1] ;default: 13'b0 ; */
+/*description: This field is used to quickly read and rewrite the current field of all STATUSTA
+BLE registers.For example.*/
+#define WORLD_CONTROLLER_CORE_1_STATUSTABLE_CURRENT    0x00001FFF
+#define WORLD_CONTROLLER_CORE_1_STATUSTABLE_CURRENT_M  ((WORLD_CONTROLLER_CORE_1_STATUSTABLE_CURRENT_V)<<(WORLD_CONTROLLER_CORE_1_STATUSTABLE_CURRENT_S))
+#define WORLD_CONTROLLER_CORE_1_STATUSTABLE_CURRENT_V  0x1FFF
+#define WORLD_CONTROLLER_CORE_1_STATUSTABLE_CURRENT_S  1
+
+#define WORLD_CONTROLLER_WCL_CORE_1_MESSAGE_PHASE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x508)
+/* WORLD_CONTROLLER_CORE_1_MESSAGE_ADDRESSPHASE : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: If this bit is 1.*/
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_ADDRESSPHASE    (BIT(6))
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_ADDRESSPHASE_M  (BIT(6))
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_ADDRESSPHASE_V  0x1
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_ADDRESSPHASE_S  6
+/* WORLD_CONTROLLER_CORE_1_MESSAGE_DATAPHASE : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: If this bit is 1.*/
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_DATAPHASE    (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_DATAPHASE_M  (BIT(5))
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_DATAPHASE_V  0x1
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_DATAPHASE_S  5
+/* WORLD_CONTROLLER_CORE_1_MESSAGE_EXPECT : RO ;bitpos:[4:1] ;default: 4'b0 ; */
+/*description: This field indicates the data to be written next time.*/
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_EXPECT    0x0000000F
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_EXPECT_M  ((WORLD_CONTROLLER_CORE_1_MESSAGE_EXPECT_V)<<(WORLD_CONTROLLER_CORE_1_MESSAGE_EXPECT_S))
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_EXPECT_V  0xF
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_EXPECT_S  1
+/* WORLD_CONTROLLER_CORE_1_MESSAGE_MATCH : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit indicates whether the check is successful.*/
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_MATCH    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_MATCH_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_MATCH_V  0x1
+#define WORLD_CONTROLLER_CORE_1_MESSAGE_MATCH_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_WORLD_TRIGGER_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x540)
+/* WORLD_CONTROLLER_CORE_1_WORLD_TRIGGER_ADDR : RW ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: This field is used to configure the entry address from WORLD0 to WORLD1.*/
+#define WORLD_CONTROLLER_CORE_1_WORLD_TRIGGER_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_WORLD_TRIGGER_ADDR_M  ((WORLD_CONTROLLER_CORE_1_WORLD_TRIGGER_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_WORLD_TRIGGER_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_WORLD_TRIGGER_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_WORLD_TRIGGER_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_WORLD_PREPARE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x544)
+/* WORLD_CONTROLLER_CORE_1_WORLD_PREPARE : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: This field to used to set world to enter.*/
+#define WORLD_CONTROLLER_CORE_1_WORLD_PREPARE    0x00000003
+#define WORLD_CONTROLLER_CORE_1_WORLD_PREPARE_M  ((WORLD_CONTROLLER_CORE_1_WORLD_PREPARE_V)<<(WORLD_CONTROLLER_CORE_1_WORLD_PREPARE_S))
+#define WORLD_CONTROLLER_CORE_1_WORLD_PREPARE_V  0x3
+#define WORLD_CONTROLLER_CORE_1_WORLD_PREPARE_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_WORLD_UPDATE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x548)
+/* WORLD_CONTROLLER_CORE_1_UPDATE : WO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: This field is used to update configuration completed.*/
+#define WORLD_CONTROLLER_CORE_1_UPDATE    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_UPDATE_M  ((WORLD_CONTROLLER_CORE_1_UPDATE_V)<<(WORLD_CONTROLLER_CORE_1_UPDATE_S))
+#define WORLD_CONTROLLER_CORE_1_UPDATE_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_UPDATE_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_WORLD_CANCEL_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x54C)
+/* WORLD_CONTROLLER_CORE_1_WORLD_CANCEL : WO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: This field is used to cancel switch world configuration.*/
+#define WORLD_CONTROLLER_CORE_1_WORLD_CANCEL    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_WORLD_CANCEL_M  ((WORLD_CONTROLLER_CORE_1_WORLD_CANCEL_V)<<(WORLD_CONTROLLER_CORE_1_WORLD_CANCEL_S))
+#define WORLD_CONTROLLER_CORE_1_WORLD_CANCEL_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_WORLD_CANCEL_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_WORLD_IRAM0_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x550)
+/* WORLD_CONTROLLER_CORE_1_WORLD_IRAM0 : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: this field is used to read current world of Iram0 bus.*/
+#define WORLD_CONTROLLER_CORE_1_WORLD_IRAM0    0x00000003
+#define WORLD_CONTROLLER_CORE_1_WORLD_IRAM0_M  ((WORLD_CONTROLLER_CORE_1_WORLD_IRAM0_V)<<(WORLD_CONTROLLER_CORE_1_WORLD_IRAM0_S))
+#define WORLD_CONTROLLER_CORE_1_WORLD_IRAM0_V  0x3
+#define WORLD_CONTROLLER_CORE_1_WORLD_IRAM0_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_WORLD_DRAM0_PIF_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x554)
+/* WORLD_CONTROLLER_CORE_1_WORLD_DRAM0_PIF : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
+/*description: this field is used to read current world of Dram0 bus and PIF bus.*/
+#define WORLD_CONTROLLER_CORE_1_WORLD_DRAM0_PIF    0x00000003
+#define WORLD_CONTROLLER_CORE_1_WORLD_DRAM0_PIF_M  ((WORLD_CONTROLLER_CORE_1_WORLD_DRAM0_PIF_V)<<(WORLD_CONTROLLER_CORE_1_WORLD_DRAM0_PIF_S))
+#define WORLD_CONTROLLER_CORE_1_WORLD_DRAM0_PIF_V  0x3
+#define WORLD_CONTROLLER_CORE_1_WORLD_DRAM0_PIF_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_WORLD_PHASE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x558)
+/* WORLD_CONTROLLER_CORE_1_WORLD_PHASE : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: This bit indicates whether is preparing to switch to WORLD1.*/
+#define WORLD_CONTROLLER_CORE_1_WORLD_PHASE    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_WORLD_PHASE_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_WORLD_PHASE_V  0x1
+#define WORLD_CONTROLLER_CORE_1_WORLD_PHASE_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_NMI_MASK_ENABLE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x580)
+/* WORLD_CONTROLLER_CORE_1_NMI_MASK_ENABLE : WO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: this field is used to set NMI mask.*/
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_ENABLE    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_ENABLE_M  ((WORLD_CONTROLLER_CORE_1_NMI_MASK_ENABLE_V)<<(WORLD_CONTROLLER_CORE_1_NMI_MASK_ENABLE_S))
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_ENABLE_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_ENABLE_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_NMI_MASK_TRIGGER_ADDR_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x584)
+/* WORLD_CONTROLLER_CORE_1_NMI_MASK_TRIGGER_ADDR : R/W ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: this field to used to set trigger address.*/
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_TRIGGER_ADDR    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_TRIGGER_ADDR_M  ((WORLD_CONTROLLER_CORE_1_NMI_MASK_TRIGGER_ADDR_V)<<(WORLD_CONTROLLER_CORE_1_NMI_MASK_TRIGGER_ADDR_S))
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_TRIGGER_ADDR_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_TRIGGER_ADDR_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_NMI_MASK_DISABLE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x588)
+/* WORLD_CONTROLLER_CORE_1_NMI_MASK_DISABLE : WO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: this field is used to disable NMI mask.*/
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_DISABLE    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_DISABLE_M  ((WORLD_CONTROLLER_CORE_1_NMI_MASK_DISABLE_V)<<(WORLD_CONTROLLER_CORE_1_NMI_MASK_DISABLE_S))
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_DISABLE_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_DISABLE_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_NMI_MASK_CANCLE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x58C)
+/* WORLD_CONTROLLER_CORE_1_NMI_MASK_CANCEL : WO ;bitpos:[31:0] ;default: 32'b0 ; */
+/*description: this field is used to cancel NMI mask disable function..*/
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_CANCEL    0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_CANCEL_M  ((WORLD_CONTROLLER_CORE_1_NMI_MASK_CANCEL_V)<<(WORLD_CONTROLLER_CORE_1_NMI_MASK_CANCEL_S))
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_CANCEL_V  0xFFFFFFFF
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_CANCEL_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_NMI_MASK_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x590)
+/* WORLD_CONTROLLER_CORE_1_NMI_MASK : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: this bit is used to mask NMI interrupt.*/
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_V  0x1
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_S  0
+
+#define WORLD_CONTROLLER_WCL_CORE_1_NMI_MASK_PHASE_REG          (DR_REG_WORLD_CONTROLLER_BASE + 0x594)
+/* WORLD_CONTROLLER_CORE_1_NMI_MASK_PHASE : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: this bit is used to indicates whether the NMI interrupt is being masked.*/
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_PHASE    (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_PHASE_M  (BIT(0))
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_PHASE_V  0x1
+#define WORLD_CONTROLLER_CORE_1_NMI_MASK_PHASE_S  0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_WORLD_CONTROLLER_REG_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/world_controller_struct.h b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/world_controller_struct.h
new file mode 100644
index 00000000000..89a317d9a33
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/include/soc/world_controller_struct.h
@@ -0,0 +1,796 @@
+// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_WORLD_CONTROLLER_STRUCT_H_
+#define _SOC_WORLD_CONTROLLER_STRUCT_H_
+
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef volatile struct world_controller_dev_s {
+    uint32_t wcl_core_0_entry_1_addr;
+    uint32_t wcl_core_0_entry_2_addr;
+    uint32_t wcl_core_0_entry_3_addr;
+    uint32_t wcl_core_0_entry_4_addr;
+    uint32_t wcl_core_0_entry_5_addr;
+    uint32_t wcl_core_0_entry_6_addr;
+    uint32_t wcl_core_0_entry_7_addr;
+    uint32_t wcl_core_0_entry_8_addr;
+    uint32_t wcl_core_0_entry_9_addr;
+    uint32_t wcl_core_0_entry_10_addr;
+    uint32_t wcl_core_0_entry_11_addr;
+    uint32_t wcl_core_0_entry_12_addr;
+    uint32_t wcl_core_0_entry_13_addr;
+    uint32_t reserved_34;
+    uint32_t reserved_38;
+    uint32_t reserved_3c;
+    uint32_t reserved_40;
+    uint32_t reserved_44;
+    uint32_t reserved_48;
+    uint32_t reserved_4c;
+    uint32_t reserved_50;
+    uint32_t reserved_54;
+    uint32_t reserved_58;
+    uint32_t reserved_5c;
+    uint32_t reserved_60;
+    uint32_t reserved_64;
+    uint32_t reserved_68;
+    uint32_t reserved_6c;
+    uint32_t reserved_70;
+    uint32_t reserved_74;
+    uint32_t reserved_78;
+    union {
+        struct {
+            uint32_t reserved0                     :    1;
+            uint32_t reg_core_0_entry_check        :    13;  /*This filed is used to enable entry address check */
+            uint32_t reserved14                    :    18;  /*reserved*/
+        };
+        uint32_t val;
+    } wcl_core_0_entry_check;
+    uint32_t reserved_80;
+    uint32_t reserved_84;
+    uint32_t reserved_88;
+    uint32_t reserved_8c;
+    uint32_t reserved_90;
+    uint32_t reserved_94;
+    uint32_t reserved_98;
+    uint32_t reserved_9c;
+    uint32_t reserved_a0;
+    uint32_t reserved_a4;
+    uint32_t reserved_a8;
+    uint32_t reserved_ac;
+    uint32_t reserved_b0;
+    uint32_t reserved_b4;
+    uint32_t reserved_b8;
+    uint32_t reserved_bc;
+    uint32_t reserved_c0;
+    uint32_t reserved_c4;
+    uint32_t reserved_c8;
+    uint32_t reserved_cc;
+    uint32_t reserved_d0;
+    uint32_t reserved_d4;
+    uint32_t reserved_d8;
+    uint32_t reserved_dc;
+    uint32_t reserved_e0;
+    uint32_t reserved_e4;
+    uint32_t reserved_e8;
+    uint32_t reserved_ec;
+    uint32_t reserved_f0;
+    uint32_t reserved_f4;
+    uint32_t reserved_f8;
+    uint32_t reserved_fc;
+    uint32_t wcl_core_0_message_addr;
+    union {
+        struct {
+            uint32_t reg_core_0_message_max        :    4;  /*This filed is used to set the max value of clear write_buffer*/
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } wcl_core_0_message_max;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_1       :    1;  /*This bit is used to confirm world before enter entry 1 */
+            uint32_t reg_core_0_from_entry_1       :    4;  /*This filed is used to confirm in which entry before enter entry 1*/
+            uint32_t reg_core_0_current_1          :    1;  /*This bit is used to confirm whether the current state is in entry 1 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable1;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_2       :    1;  /*This bit is used to confirm world before enter entry 2 */
+            uint32_t reg_core_0_from_entry_2       :    4;  /*This filed is used to confirm in which entry before enter entry 2*/
+            uint32_t reg_core_0_current_2          :    1;  /*This bit is used to confirm whether the current state is in entry 2 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable2;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_3       :    1;  /*This bit is used to confirm world before enter entry 3 */
+            uint32_t reg_core_0_from_entry_3       :    4;  /*This filed is used to confirm in which entry before enter entry 3*/
+            uint32_t reg_core_0_current_3          :    1;  /*This bit is used to confirm whether the current state is in entry 3 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable3;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_4       :    1;  /*This bit is used to confirm world before enter entry 4 */
+            uint32_t reg_core_0_from_entry_4       :    4;  /*This filed is used to confirm in which entry before enter entry 4*/
+            uint32_t reg_core_0_current_4          :    1;  /*This bit is used to confirm whether the current state is in entry 4 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable4;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_5       :    1;  /*This bit is used to confirm world before enter entry 5 */
+            uint32_t reg_core_0_from_entry_5       :    4;  /*This filed is used to confirm in which entry before enter entry 5*/
+            uint32_t reg_core_0_current_5          :    1;  /*This bit is used to confirm whether the current state is in entry 5 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable5;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_6       :    1;  /*This bit is used to confirm world before enter entry 6 */
+            uint32_t reg_core_0_from_entry_6       :    4;  /*This filed is used to confirm in which entry before enter entry 6*/
+            uint32_t reg_core_0_current_6          :    1;  /*This bit is used to confirm whether the current state is in entry 6 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable6;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_7       :    1;  /*This bit is used to confirm world before enter entry 7 */
+            uint32_t reg_core_0_from_entry_7       :    4;  /*This filed is used to confirm in which entry before enter entry 7*/
+            uint32_t reg_core_0_current_7          :    1;  /*This bit is used to confirm whether the current state is in entry 7 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable7;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_8       :    1;  /*This bit is used to confirm world before enter entry 8 */
+            uint32_t reg_core_0_from_entry_8       :    4;  /*This filed is used to confirm in which entry before enter entry 8*/
+            uint32_t reg_core_0_current_8          :    1;  /*This bit is used to confirm whether the current state is in entry 8 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable8;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_9       :    1;  /*This bit is used to confirm world before enter entry 9 */
+            uint32_t reg_core_0_from_entry_9       :    4;  /*This filed is used to confirm in which entry before enter entry 9*/
+            uint32_t reg_core_0_current_9          :    1;  /*This bit is used to confirm whether the current state is in entry 9 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable9;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_10      :    1;  /*This bit is used to confirm world before enter entry 10 */
+            uint32_t reg_core_0_from_entry_10      :    4;  /*This filed is used to confirm in which entry before enter entry 10*/
+            uint32_t reg_core_0_current_10         :    1;  /*This bit is used to confirm whether the current state is in entry 10 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable10;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_11      :    1;  /*This bit is used to confirm world before enter entry 11 */
+            uint32_t reg_core_0_from_entry_11      :    4;  /*This filed is used to confirm in which entry before enter entry 11*/
+            uint32_t reg_core_0_current_11         :    1;  /*This bit is used to confirm whether the current state is in entry 11 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable11;
+    union {
+        struct {
+            uint32_t core_0_from_world_12          :    1;  /*This bit is used to confirm world before enter entry 12 */
+            uint32_t core_0_from_entry_12          :    4;  /*This filed is used to confirm in which entry before enter entry 12*/
+            uint32_t core_0_current_12             :    1;  /*This bit is used to confirm whether the current state is in entry 12 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable12;
+    union {
+        struct {
+            uint32_t reg_core_0_from_world_13      :    1;  /*This bit is used to confirm world before enter entry 13 */
+            uint32_t reg_core_0_from_entry_13      :    4;  /*This filed is used to confirm in which entry before enter entry 13*/
+            uint32_t reg_core_0_current_13         :    1;  /*This bit is used to confirm whether the current state is in entry 13 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable13;
+    uint32_t reserved_b4;
+    uint32_t reserved_b8;
+    uint32_t reserved_bc;
+    uint32_t reserved_c0;
+    uint32_t reserved_c4;
+    uint32_t reserved_c8;
+    uint32_t reserved_cc;
+    uint32_t reserved_d0;
+    uint32_t reserved_d4;
+    uint32_t reserved_d8;
+    uint32_t reserved_dc;
+    uint32_t reserved_e0;
+    uint32_t reserved_e4;
+    uint32_t reserved_e8;
+    uint32_t reserved_ec;
+    uint32_t reserved_f0;
+    uint32_t reserved_f4;
+    uint32_t reserved_f8;
+    union {
+        struct {
+            uint32_t reserved0                     :    1;
+            uint32_t reg_core_0_statustable_current:    13;  /*This field is used to quickly read and rewrite the current field of all STATUSTABLE registers.For example*/
+            uint32_t reserved14                    :    18;
+        };
+        uint32_t val;
+    } wcl_core_0_statustable_current;
+    uint32_t reserved_100;
+    uint32_t reserved_104;
+    union {
+        struct {
+            uint32_t reg_core_0_message_match      :    1;  /*This bit indicates whether the check is successful*/
+            uint32_t reg_core_0_message_expect     :    4;  /*This field indicates the data to be written next time*/
+            uint32_t reg_core_0_message_dataphase  :    1;  /*If this bit is 1*/
+            uint32_t reg_core_0_message_addressphase:    1;  /*If this bit is 1*/
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } wcl_core_0_message_phase;
+    uint32_t reserved_10c;
+    uint32_t reserved_110;
+    uint32_t reserved_114;
+    uint32_t reserved_118;
+    uint32_t reserved_11c;
+    uint32_t reserved_120;
+    uint32_t reserved_124;
+    uint32_t reserved_128;
+    uint32_t reserved_12c;
+    uint32_t reserved_130;
+    uint32_t reserved_134;
+    uint32_t reserved_138;
+    uint32_t reserved_13c;
+    uint32_t wcl_core_0_world_trigger_addr;
+    union {
+        struct {
+            uint32_t reg_core_0_world_prepare      :    2;  /*This field to used to set world to enter*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } wcl_core_0_world_prepare;
+    uint32_t wcl_core_0_world_update;
+    uint32_t wcl_core_0_world_cancel;
+    union {
+        struct {
+            uint32_t reg_core_0_world_iram0        :    2;  /*this field is used to read current world of Iram0 bus*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } wcl_core_0_world_iram0;
+    union {
+        struct {
+            uint32_t reg_core_0_world_dram0_pif    :    2;  /*this field is used to read current world of Dram0 bus and PIF bus*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } wcl_core_0_world_dram0_pif;
+    union {
+        struct {
+            uint32_t reg_core_0_world_phase        :    1;  /*This bit indicates whether is preparing to switch to WORLD1*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } wcl_core_0_world_phase;
+    uint32_t reserved_15c;
+    uint32_t reserved_160;
+    uint32_t reserved_164;
+    uint32_t reserved_168;
+    uint32_t reserved_16c;
+    uint32_t reserved_170;
+    uint32_t reserved_174;
+    uint32_t reserved_178;
+    uint32_t reserved_17c;
+    uint32_t wcl_core_0_nmi_mask_enable;
+    uint32_t wcl_core_0_nmi_mask_trigger_addr;
+    uint32_t wcl_core_0_nmi_mask_disable;
+    uint32_t wcl_core_0_nmi_mask_cancle;
+    union {
+        struct {
+            uint32_t reg_core_0_nmi_mask           :    1;  /*this bit is used to mask NMI interrupt*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } wcl_core_0_nmi_mask;
+    union {
+        struct {
+            uint32_t reg_core_0_nmi_mask_phase     :    1;  /*this bit is used to indicates whether the NMI interrupt is being masked*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } wcl_core_0_nmi_mask_phase;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
+    uint32_t reserved_1c0;
+    uint32_t reserved_1c4;
+    uint32_t reserved_1c8;
+    uint32_t reserved_1cc;
+    uint32_t reserved_1d0;
+    uint32_t reserved_1d4;
+    uint32_t reserved_1d8;
+    uint32_t reserved_1dc;
+    uint32_t reserved_1e0;
+    uint32_t reserved_1e4;
+    uint32_t reserved_1e8;
+    uint32_t reserved_1ec;
+    uint32_t reserved_1f0;
+    uint32_t reserved_1f4;
+    uint32_t reserved_1f8;
+    uint32_t reserved_1fc;
+    uint32_t reserved_200;
+    uint32_t reserved_204;
+    uint32_t reserved_208;
+    uint32_t reserved_20c;
+    uint32_t reserved_210;
+    uint32_t reserved_214;
+    uint32_t reserved_218;
+    uint32_t reserved_21c;
+    uint32_t reserved_220;
+    uint32_t reserved_224;
+    uint32_t reserved_228;
+    uint32_t reserved_22c;
+    uint32_t reserved_230;
+    uint32_t reserved_234;
+    uint32_t reserved_238;
+    uint32_t reserved_23c;
+    uint32_t reserved_240;
+    uint32_t reserved_244;
+    uint32_t reserved_248;
+    uint32_t reserved_24c;
+    uint32_t reserved_250;
+    uint32_t reserved_254;
+    uint32_t reserved_258;
+    uint32_t reserved_25c;
+    uint32_t reserved_260;
+    uint32_t reserved_264;
+    uint32_t reserved_268;
+    uint32_t reserved_26c;
+    uint32_t reserved_270;
+    uint32_t reserved_274;
+    uint32_t reserved_278;
+    uint32_t reserved_27c;
+    uint32_t reserved_280;
+    uint32_t reserved_284;
+    uint32_t reserved_288;
+    uint32_t reserved_28c;
+    uint32_t reserved_290;
+    uint32_t reserved_294;
+    uint32_t reserved_298;
+    uint32_t reserved_29c;
+    uint32_t reserved_2a0;
+    uint32_t reserved_2a4;
+    uint32_t reserved_2a8;
+    uint32_t reserved_2ac;
+    uint32_t reserved_2b0;
+    uint32_t reserved_2b4;
+    uint32_t reserved_2b8;
+    uint32_t reserved_2bc;
+    uint32_t reserved_2c0;
+    uint32_t reserved_2c4;
+    uint32_t reserved_2c8;
+    uint32_t reserved_2cc;
+    uint32_t reserved_2d0;
+    uint32_t reserved_2d4;
+    uint32_t reserved_2d8;
+    uint32_t reserved_2dc;
+    uint32_t reserved_2e0;
+    uint32_t reserved_2e4;
+    uint32_t reserved_2e8;
+    uint32_t reserved_2ec;
+    uint32_t reserved_2f0;
+    uint32_t reserved_2f4;
+    uint32_t reserved_2f8;
+    uint32_t reserved_2fc;
+    uint32_t reserved_300;
+    uint32_t reserved_304;
+    uint32_t reserved_308;
+    uint32_t reserved_30c;
+    uint32_t reserved_310;
+    uint32_t reserved_314;
+    uint32_t reserved_318;
+    uint32_t reserved_31c;
+    uint32_t reserved_320;
+    uint32_t reserved_324;
+    uint32_t reserved_328;
+    uint32_t reserved_32c;
+    uint32_t reserved_330;
+    uint32_t reserved_334;
+    uint32_t reserved_338;
+    uint32_t reserved_33c;
+    uint32_t reserved_340;
+    uint32_t reserved_344;
+    uint32_t reserved_348;
+    uint32_t reserved_34c;
+    uint32_t reserved_350;
+    uint32_t reserved_354;
+    uint32_t reserved_358;
+    uint32_t reserved_35c;
+    uint32_t reserved_360;
+    uint32_t reserved_364;
+    uint32_t reserved_368;
+    uint32_t reserved_36c;
+    uint32_t reserved_370;
+    uint32_t reserved_374;
+    uint32_t reserved_378;
+    uint32_t reserved_37c;
+    uint32_t reserved_380;
+    uint32_t reserved_384;
+    uint32_t reserved_388;
+    uint32_t reserved_38c;
+    uint32_t reserved_390;
+    uint32_t reserved_394;
+    uint32_t reserved_398;
+    uint32_t reserved_39c;
+    uint32_t reserved_3a0;
+    uint32_t reserved_3a4;
+    uint32_t reserved_3a8;
+    uint32_t reserved_3ac;
+    uint32_t reserved_3b0;
+    uint32_t reserved_3b4;
+    uint32_t reserved_3b8;
+    uint32_t reserved_3bc;
+    uint32_t reserved_3c0;
+    uint32_t reserved_3c4;
+    uint32_t reserved_3c8;
+    uint32_t reserved_3cc;
+    uint32_t reserved_3d0;
+    uint32_t reserved_3d4;
+    uint32_t reserved_3d8;
+    uint32_t reserved_3dc;
+    uint32_t reserved_3e0;
+    uint32_t reserved_3e4;
+    uint32_t reserved_3e8;
+    uint32_t reserved_3ec;
+    uint32_t reserved_3f0;
+    uint32_t reserved_3f4;
+    uint32_t reserved_3f8;
+    uint32_t reserved_3fc;
+    uint32_t wcl_core_1_entry_1_addr;
+    uint32_t wcl_core_1_entry_2_addr;
+    uint32_t wcl_core_1_entry_3_addr;
+    uint32_t wcl_core_1_entry_4_addr;
+    uint32_t wcl_core_1_entry_5_addr;
+    uint32_t wcl_core_1_entry_6_addr;
+    uint32_t wcl_core_1_entry_7_addr;
+    uint32_t wcl_core_1_entry_8_addr;
+    uint32_t wcl_core_1_entry_9_addr;
+    uint32_t wcl_core_1_entry_10_addr;
+    uint32_t wcl_core_1_entry_11_addr;
+    uint32_t wcl_core_1_entry_12_addr;
+    uint32_t wcl_core_1_entry_13_addr;
+    uint32_t reserved_434;
+    uint32_t reserved_438;
+    uint32_t reserved_43c;
+    uint32_t reserved_440;
+    uint32_t reserved_444;
+    uint32_t reserved_448;
+    uint32_t reserved_44c;
+    uint32_t reserved_450;
+    uint32_t reserved_454;
+    uint32_t reserved_458;
+    uint32_t reserved_45c;
+    uint32_t reserved_460;
+    uint32_t reserved_464;
+    uint32_t reserved_468;
+    uint32_t reserved_46c;
+    uint32_t reserved_470;
+    uint32_t reserved_474;
+    uint32_t reserved_478;
+    union {
+        struct {
+            uint32_t reserved0                     :    1;
+            uint32_t reg_core_1_entry_check        :    13;  /*This filed is used to enable entry address check */
+            uint32_t reserved14                    :    18;  /*reserved*/
+        };
+        uint32_t val;
+    } wcl_core_1_entry_check;
+    uint32_t reserved_480;
+    uint32_t reserved_484;
+    uint32_t reserved_488;
+    uint32_t reserved_48c;
+    uint32_t reserved_490;
+    uint32_t reserved_494;
+    uint32_t reserved_498;
+    uint32_t reserved_49c;
+    uint32_t reserved_4a0;
+    uint32_t reserved_4a4;
+    uint32_t reserved_4a8;
+    uint32_t reserved_4ac;
+    uint32_t reserved_4b0;
+    uint32_t reserved_4b4;
+    uint32_t reserved_4b8;
+    uint32_t reserved_4bc;
+    uint32_t reserved_4c0;
+    uint32_t reserved_4c4;
+    uint32_t reserved_4c8;
+    uint32_t reserved_4cc;
+    uint32_t reserved_4d0;
+    uint32_t reserved_4d4;
+    uint32_t reserved_4d8;
+    uint32_t reserved_4dc;
+    uint32_t reserved_4e0;
+    uint32_t reserved_4e4;
+    uint32_t reserved_4e8;
+    uint32_t reserved_4ec;
+    uint32_t reserved_4f0;
+    uint32_t reserved_4f4;
+    uint32_t reserved_4f8;
+    uint32_t reserved_4fc;
+    uint32_t wcl_core_1_message_addr;
+    union {
+        struct {
+            uint32_t reg_core_1_message_max        :    4;  /*This filed is used to set the max value of clear write_buffer*/
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } wcl_core_1_message_max;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_1       :    1;  /*This bit is used to confirm world before enter entry 1 */
+            uint32_t reg_core_1_from_entry_1       :    4;  /*This filed is used to confirm in which entry before enter entry 1*/
+            uint32_t reg_core_1_current_1          :    1;  /*This bit is used to confirm whether the current state is in entry 1 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable1;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_2       :    1;  /*This bit is used to confirm world before enter entry 2 */
+            uint32_t reg_core_1_from_entry_2       :    4;  /*This filed is used to confirm in which entry before enter entry 2*/
+            uint32_t reg_core_1_current_2          :    1;  /*This bit is used to confirm whether the current state is in entry 2 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable2;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_3       :    1;  /*This bit is used to confirm world before enter entry 3 */
+            uint32_t reg_core_1_from_entry_3       :    4;  /*This filed is used to confirm in which entry before enter entry 3*/
+            uint32_t reg_core_1_current_3          :    1;  /*This bit is used to confirm whether the current state is in entry 3 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable3;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_4       :    1;  /*This bit is used to confirm world before enter entry 4 */
+            uint32_t reg_core_1_from_entry_4       :    4;  /*This filed is used to confirm in which entry before enter entry 4*/
+            uint32_t reg_core_1_current_4          :    1;  /*This bit is used to confirm whether the current state is in entry 4 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable4;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_5       :    1;  /*This bit is used to confirm world before enter entry 5 */
+            uint32_t reg_core_1_from_entry_5       :    4;  /*This filed is used to confirm in which entry before enter entry 5*/
+            uint32_t reg_core_1_current_5          :    1;  /*This bit is used to confirm whether the current state is in entry 5 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable5;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_6       :    1;  /*This bit is used to confirm world before enter entry 6 */
+            uint32_t reg_core_1_from_entry_6       :    4;  /*This filed is used to confirm in which entry before enter entry 6*/
+            uint32_t reg_core_1_current_6          :    1;  /*This bit is used to confirm whether the current state is in entry 6 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable6;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_7       :    1;  /*This bit is used to confirm world before enter entry 7 */
+            uint32_t reg_core_1_from_entry_7       :    4;  /*This filed is used to confirm in which entry before enter entry 7*/
+            uint32_t reg_core_1_current_7          :    1;  /*This bit is used to confirm whether the current state is in entry 7 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable7;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_8       :    1;  /*This bit is used to confirm world before enter entry 8 */
+            uint32_t reg_core_1_from_entry_8       :    4;  /*This filed is used to confirm in which entry before enter entry 8*/
+            uint32_t reg_core_1_current_8          :    1;  /*This bit is used to confirm whether the current state is in entry 8 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable8;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_9       :    1;  /*This bit is used to confirm world before enter entry 9 */
+            uint32_t reg_core_1_from_entry_9       :    4;  /*This filed is used to confirm in which entry before enter entry 9*/
+            uint32_t reg_core_1_current_9          :    1;  /*This bit is used to confirm whether the current state is in entry 9 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable9;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_10      :    1;  /*This bit is used to confirm world before enter entry 10 */
+            uint32_t reg_core_1_from_entry_10      :    4;  /*This filed is used to confirm in which entry before enter entry 10*/
+            uint32_t reg_core_1_current_10         :    1;  /*This bit is used to confirm whether the current state is in entry 10 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable10;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_11      :    1;  /*This bit is used to confirm world before enter entry 11 */
+            uint32_t reg_core_1_from_entry_11      :    4;  /*This filed is used to confirm in which entry before enter entry 11*/
+            uint32_t reg_core_1_current_11         :    1;  /*This bit is used to confirm whether the current state is in entry 11 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable11;
+    union {
+        struct {
+            uint32_t core_1_from_world_12          :    1;  /*This bit is used to confirm world before enter entry 12 */
+            uint32_t core_1_from_entry_12          :    4;  /*This filed is used to confirm in which entry before enter entry 12*/
+            uint32_t core_1_current_12             :    1;  /*This bit is used to confirm whether the current state is in entry 12 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable12;
+    union {
+        struct {
+            uint32_t reg_core_1_from_world_13      :    1;  /*This bit is used to confirm world before enter entry 13 */
+            uint32_t reg_core_1_from_entry_13      :    4;  /*This filed is used to confirm in which entry before enter entry 13*/
+            uint32_t reg_core_1_current_13         :    1;  /*This bit is used to confirm whether the current state is in entry 13 */
+            uint32_t reserved6                     :    26;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable13;
+    uint32_t reserved_4b4;
+    uint32_t reserved_4b8;
+    uint32_t reserved_4bc;
+    uint32_t reserved_4c0;
+    uint32_t reserved_4c4;
+    uint32_t reserved_4c8;
+    uint32_t reserved_4cc;
+    uint32_t reserved_4d0;
+    uint32_t reserved_4d4;
+    uint32_t reserved_4d8;
+    uint32_t reserved_4dc;
+    uint32_t reserved_4e0;
+    uint32_t reserved_4e4;
+    uint32_t reserved_4e8;
+    uint32_t reserved_4ec;
+    uint32_t reserved_4f0;
+    uint32_t reserved_4f4;
+    uint32_t reserved_4f8;
+    union {
+        struct {
+            uint32_t reserved0                     :    1;
+            uint32_t reg_core_1_statustable_current:    13;  /*This field is used to quickly read and rewrite the current field of all STATUSTABLE registers.For example*/
+            uint32_t reserved14                    :    18;
+        };
+        uint32_t val;
+    } wcl_core_1_statustable_current;
+    uint32_t reserved_500;
+    uint32_t reserved_504;
+    union {
+        struct {
+            uint32_t reg_core_1_message_match      :    1;  /*This bit indicates whether the check is successful*/
+            uint32_t reg_core_1_message_expect     :    4;  /*This field indicates the data to be written next time*/
+            uint32_t reg_core_1_message_dataphase  :    1;  /*If this bit is 1*/
+            uint32_t reg_core_1_message_addressphase:    1;  /*If this bit is 1*/
+            uint32_t reserved7                     :    25;
+        };
+        uint32_t val;
+    } wcl_core_1_message_phase;
+    uint32_t reserved_50c;
+    uint32_t reserved_510;
+    uint32_t reserved_514;
+    uint32_t reserved_518;
+    uint32_t reserved_51c;
+    uint32_t reserved_520;
+    uint32_t reserved_524;
+    uint32_t reserved_528;
+    uint32_t reserved_52c;
+    uint32_t reserved_530;
+    uint32_t reserved_534;
+    uint32_t reserved_538;
+    uint32_t reserved_53c;
+    uint32_t wcl_core_1_world_trigger_addr;
+    union {
+        struct {
+            uint32_t reg_core_1_world_prepare      :    2;  /*This field to used to set world to enter*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } wcl_core_1_world_prepare;
+    uint32_t wcl_core_1_world_update;
+    uint32_t wcl_core_1_world_cancel;
+    union {
+        struct {
+            uint32_t reg_core_1_world_iram0        :    2;  /*this field is used to read current world of Iram0 bus*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } wcl_core_1_world_iram0;
+    union {
+        struct {
+            uint32_t reg_core_1_world_dram0_pif    :    2;  /*this field is used to read current world of Dram0 bus and PIF bus*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } wcl_core_1_world_dram0_pif;
+    union {
+        struct {
+            uint32_t reg_core_1_world_phase        :    1;  /*This bit indicates whether is preparing to switch to WORLD1*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } wcl_core_1_world_phase;
+    uint32_t reserved_55c;
+    uint32_t reserved_560;
+    uint32_t reserved_564;
+    uint32_t reserved_568;
+    uint32_t reserved_56c;
+    uint32_t reserved_570;
+    uint32_t reserved_574;
+    uint32_t reserved_578;
+    uint32_t reserved_57c;
+    uint32_t wcl_core_1_nmi_mask_enable;
+    uint32_t wcl_core_1_nmi_mask_trigger_addr;
+    uint32_t wcl_core_1_nmi_mask_disable;
+    uint32_t wcl_core_1_nmi_mask_cancle;
+    union {
+        struct {
+            uint32_t reg_core_1_nmi_mask           :    1;  /*this bit is used to mask NMI interrupt*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } wcl_core_1_nmi_mask;
+    union {
+        struct {
+            uint32_t reg_core_1_nmi_mask_phase     :    1;  /*this bit is used to indicates whether the NMI interrupt is being masked*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } wcl_core_1_nmi_mask_phase;
+} world_controller_dev_t;
+extern world_controller_dev_t WORLD_CONTROLLER;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_WORLD_CONTROLLER_STRUCT_H_ */
diff --git a/tools/sdk/esp32s3/include/soc/esp32s3/usb_periph.h b/tools/sdk/esp32s3/include/soc/esp32s3/usb_periph.h
new file mode 100644
index 00000000000..782e5ad2404
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/esp32s3/usb_periph.h
@@ -0,0 +1,37 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/usb_pins.h"
+#include "soc/gpio_sig_map.h"
+#include "soc/usb_reg.h"
+#include "soc/usb_types.h"
+#include "soc/usb_struct.h"
+#include "soc/usb_wrap_reg.h"
+#include "soc/usb_wrap_struct.h"
+
+/**
+ * @brief A pin descriptor for init
+ */
+typedef struct {
+    const int pin;
+    const int func;
+    const bool is_output;
+    const int ext_phy_only;
+} usb_iopin_dsc_t;
+
+extern const usb_iopin_dsc_t usb_periph_iopins[];
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/adc_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/adc_periph.h
new file mode 100644
index 00000000000..437d8ad6e6a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/adc_periph.h
@@ -0,0 +1,48 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc.h"
+#include "soc/soc_caps.h"
+#include "soc/syscon_struct.h"
+
+#if SOC_ADC_RTC_CTRL_SUPPORTED
+#include "soc/sens_reg.h"
+#include "soc/sens_struct.h"
+#endif
+
+#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+#include "soc/rtc_io_struct.h"
+#endif
+#include "soc/rtc_cntl_struct.h"
+#include "soc/adc_channel.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Store IO number corresponding to the ADC channel number.
+ *
+ * @value
+ *      - >=0 : GPIO number index.
+ *      - -1  : Not support.
+ */
+extern const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM];
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/dac_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/dac_periph.h
new file mode 100644
index 00000000000..bed3f22a661
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/dac_periph.h
@@ -0,0 +1,38 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/sens_reg.h"
+#include "soc/sens_struct.h"
+#include "soc/rtc_io_reg.h"
+#include "soc/rtc_io_struct.h"
+#include "soc/rtc.h"
+#include "soc/dac_channel.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+typedef struct {
+    const uint8_t dac_channel_io_num[SOC_DAC_PERIPH_NUM];
+} dac_signal_conn_t;
+
+extern const dac_signal_conn_t dac_periph_signal;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/dedic_gpio_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/dedic_gpio_periph.h
new file mode 100644
index 00000000000..f6eeeeb5e7e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/dedic_gpio_periph.h
@@ -0,0 +1,41 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+#include "soc/soc_caps.h"
+#include "soc/periph_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_DEDICATED_GPIO_SUPPORTED
+typedef struct {
+    const periph_module_t module; // Peripheral module
+    const int irq;                // Interrupt resource (-1 means no interrupt supported)
+    struct {
+        const int in_sig_per_channel[SOC_DEDIC_GPIO_IN_CHANNELS_NUM];
+        const int out_sig_per_channel[SOC_DEDIC_GPIO_OUT_CHANNELS_NUM];
+    } cores[SOC_CPU_CORES_NUM]; // Signals routed to/from GPIO matrix
+} dedic_gpio_signal_conn_t;
+
+extern const dedic_gpio_signal_conn_t dedic_gpio_periph_signals;
+#endif // SOC_DEDICATED_GPIO_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/efuse_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/efuse_periph.h
new file mode 100644
index 00000000000..76a118e3b68
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/efuse_periph.h
@@ -0,0 +1,16 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "soc/efuse_reg.h"
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/emac_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/emac_periph.h
new file mode 100644
index 00000000000..6f7323f46fe
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/emac_periph.h
@@ -0,0 +1,15 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/gdma_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/gdma_periph.h
new file mode 100644
index 00000000000..4cc9cb1728a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/gdma_periph.h
@@ -0,0 +1,38 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc_caps.h"
+#include "soc/periph_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    struct {
+        const periph_module_t module;
+        struct {
+            const int rx_irq_id;
+            const int tx_irq_id;
+        } pairs[SOC_GDMA_PAIRS_PER_GROUP];
+    } groups[SOC_GDMA_GROUPS];
+} gdma_signal_conn_t;
+
+extern const gdma_signal_conn_t gdma_periph_signals;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/gpio_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/gpio_periph.h
new file mode 100644
index 00000000000..ae0ed73ec9c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/gpio_periph.h
@@ -0,0 +1,34 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "stdint.h"
+#include "soc/io_mux_reg.h"
+#include "soc/gpio_struct.h"
+#include "soc/gpio_reg.h"
+#include "soc/soc_caps.h"
+#include "soc/gpio_sig_map.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+extern const uint32_t GPIO_PIN_MUX_REG[SOC_GPIO_PIN_COUNT];
+
+extern const uint32_t GPIO_HOLD_MASK[SOC_GPIO_PIN_COUNT];
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/hwcrypto_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/hwcrypto_periph.h
new file mode 100644
index 00000000000..3c517879b12
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/hwcrypto_periph.h
@@ -0,0 +1,25 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "sdkconfig.h"
+
+#if CONFIG_IDF_TARGET_ESP32
+/* included here for ESP-IDF v4.x compatibility */
+#include "soc/dport_reg.h"
+#include "soc/dport_access.h"
+#endif
+
+#include "soc/hwcrypto_reg.h"
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/i2c_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/i2c_periph.h
new file mode 100644
index 00000000000..0da893cab25
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/i2c_periph.h
@@ -0,0 +1,38 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/i2c_reg.h"
+#include "soc/i2c_struct.h"
+#include "soc/soc_caps.h"
+#include "soc/periph_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    const uint8_t sda_out_sig;
+    const uint8_t sda_in_sig;
+    const uint8_t scl_out_sig;
+    const uint8_t scl_in_sig;
+    const uint8_t irq;
+    const periph_module_t module;
+} i2c_signal_conn_t;
+
+extern const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM];
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/i2s_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/i2s_periph.h
new file mode 100644
index 00000000000..167c84700fd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/i2s_periph.h
@@ -0,0 +1,53 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "soc/soc.h"
+#include "soc/periph_defs.h"
+#include "soc/i2s_struct.h"
+#include "soc/i2s_reg.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ Stores a bunch of per-I2S-peripheral data.
+*/
+typedef struct {
+    const uint8_t mck_out_sig;
+
+    const uint8_t m_tx_bck_sig;
+    const uint8_t m_rx_bck_sig;
+    const uint8_t m_tx_ws_sig;
+    const uint8_t m_rx_ws_sig;
+
+    const uint8_t s_tx_bck_sig;
+    const uint8_t s_rx_bck_sig;
+    const uint8_t s_tx_ws_sig;
+    const uint8_t s_rx_ws_sig;
+
+    const uint8_t data_out_sig;
+    const uint8_t data_in_sig;
+
+    const uint8_t irq;
+    const periph_module_t module;
+} i2s_signal_conn_t;
+
+extern const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_NUM];
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/interrupts.h b/tools/sdk/esp32s3/include/soc/include/soc/interrupts.h
new file mode 100644
index 00000000000..cb2527eeb8d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/interrupts.h
@@ -0,0 +1,29 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "stdint.h"
+#include "soc/soc.h"
+#include "soc/periph_defs.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/lcd_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/lcd_periph.h
new file mode 100644
index 00000000000..7bb7c530cf2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/lcd_periph.h
@@ -0,0 +1,54 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "soc/soc_caps.h"
+#include "soc/periph_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_LCDCAM_SUPPORTED
+typedef struct {
+    struct {
+        const periph_module_t module;
+        const int irq_id;
+        const int data_sigs[SOC_LCD_I80_BUS_WIDTH];
+        const int cs_sig;
+        const int dc_sig;
+        const int wr_sig;
+    } buses[SOC_LCD_I80_BUSES];
+    struct {
+        const periph_module_t module;
+        const int irq_id;
+        const int data_sigs[SOC_LCD_RGB_DATA_WIDTH];
+        const int hsync_sig;
+        const int vsync_sig;
+        const int pclk_sig;
+        const int de_sig;
+    } panels[SOC_LCD_RGB_PANELS];
+} lcd_signal_conn_t;
+
+#endif // SOC_LCDCAM_SUPPORTED
+
+#if SOC_I2S_LCD_I80_VARIANT
+typedef struct {
+    struct {
+        const periph_module_t module;
+        const int irq_id;
+        const int data_sigs[SOC_LCD_I80_BUS_WIDTH];
+        const int wr_sig;
+    } buses[SOC_LCD_I80_BUSES];
+} lcd_signal_conn_t;
+#endif // SOC_I2S_LCD_I80_VARIANT
+
+extern const lcd_signal_conn_t lcd_periph_signals;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/ledc_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/ledc_periph.h
new file mode 100644
index 00000000000..d90f22e7931
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/ledc_periph.h
@@ -0,0 +1,39 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "soc/soc_caps.h"
+#include "soc/ledc_reg.h"
+#include "soc/ledc_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ Stores a bunch of per-ledc-peripheral data.
+*/
+typedef struct {
+    const uint8_t sig_out0_idx;
+} ledc_signal_conn_t;
+
+#if SOC_LEDC_SUPPORT_HS_MODE
+extern const ledc_signal_conn_t ledc_periph_signal[2];
+#else
+extern const ledc_signal_conn_t ledc_periph_signal[1];
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/lldesc.h b/tools/sdk/esp32s3/include/soc/include/soc/lldesc.h
new file mode 100644
index 00000000000..966917da516
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/lldesc.h
@@ -0,0 +1,96 @@
+// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdbool.h>
+#include "sdkconfig.h"
+
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/lldesc.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/lldesc.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/lldesc.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/lldesc.h"
+#elif CONFIG_IDF_TARGET_ESP32H2
+#include "esp32h2/rom/lldesc.h"
+#endif
+
+//the size field has 12 bits, but 0 not for 4096.
+//to avoid possible problem when the size is not word-aligned, we only use 4096-4 per desc.
+/** Maximum size of data in the buffer that a DMA descriptor can hold. */
+#define LLDESC_MAX_NUM_PER_DESC (4096-4)
+
+// Some DMA operations might impose certain alignment restrictions on the length
+#define LLDESC_MAX_NUM_PER_DESC_16B_ALIGNED (4096 - 16)
+#define LLDESC_MAX_NUM_PER_DESC_32B_ALIGNED (4096 - 32)
+
+/**
+ * Generate a linked list pointing to a (huge) buffer in an descriptor array.
+ *
+ * The caller should ensure there is enough size to hold the array, by calling
+ * ``lldesc_get_required_num_constrained`` with the same max_desc_size argument.
+ *
+ * @param[out] out_desc_array Output of a descriptor array, the head should be fed to the DMA.
+ * @param buffer Buffer for the descriptors to point to.
+ * @param size Size (or length for TX) of the buffer
+ * @param max_desc_size Maximum length of each descriptor
+ * @param isrx The RX DMA may require the buffer to be word-aligned, set to true for a RX link, otherwise false.
+ */
+void lldesc_setup_link_constrained(lldesc_t *out_desc_array, const void *buffer, int size, int max_desc_size, bool isrx);
+
+/**
+ * Generate a linked list pointing to a (huge) buffer in an descriptor array.
+ *
+ * The caller should ensure there is enough size to hold the array, by calling
+ * ``lldesc_get_required_num``.
+ *
+ * @param[out] out_desc_array Output of a descriptor array, the head should be fed to the DMA.
+ * @param buffer Buffer for the descriptors to point to.
+ * @param size Size (or length for TX) of the buffer
+ * @param isrx The RX DMA may require the buffer to be word-aligned, set to true for a RX link, otherwise false.
+ */
+#define lldesc_setup_link(out_desc_array, buffer, size, isrx) lldesc_setup_link_constrained(out_desc_array, buffer, size, LLDESC_MAX_NUM_PER_DESC, isrx)
+
+/**
+ * @brief Get the received length of a linked list, until end of the link or eof.
+ *
+ * @param head      The head of the linked list.
+ * @param[out] out_next Output of the next descriptor of the EOF descriptor. Return NULL if there's no
+ *                 EOF. Can be set to NULL if next descriptor is not needed.
+ * @return The accumulation of the `len` field of all descriptors until EOF or the end of the link.
+ */
+int lldesc_get_received_len(lldesc_t* head, lldesc_t** out_next);
+
+/**
+ * Get the number of descriptors required for a given buffer size.
+ *
+ * @param data_size Size to check descriptor num.
+ *
+ * @return Numbers required.
+ */
+static inline int lldesc_get_required_num_constrained(int data_size, int max_desc_size)
+{
+    return (data_size + max_desc_size - 1) / max_desc_size;
+}
+
+/**
+ * Get the number of descriptors required for a given buffer size.
+ *
+ * @param data_size Size to check descriptor num.
+ * @param max_desc_size Maximum length of each descriptor
+ * @return Numbers required.
+ */
+#define lldesc_get_required_num(data_size) lldesc_get_required_num_constrained(data_size, LLDESC_MAX_NUM_PER_DESC)
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/mcpwm_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/mcpwm_periph.h
new file mode 100644
index 00000000000..d807600c4a7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/mcpwm_periph.h
@@ -0,0 +1,51 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc_caps.h"
+#include "soc/mcpwm_reg.h"
+#include "soc/mcpwm_struct.h"
+#include "soc/periph_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    struct {
+        const periph_module_t module; // Peripheral module
+        const int irq_id;
+        struct {
+            struct {
+                const uint32_t pwm_sig;
+            } generators[SOC_MCPWM_GENERATORS_PER_OPERATOR];
+        } operators[SOC_MCPWM_OPERATORS_PER_GROUP];
+        struct {
+            const uint32_t fault_sig;
+        } gpio_faults[SOC_MCPWM_GPIO_FAULTS_PER_GROUP];
+        struct {
+            const uint32_t cap_sig;
+        } captures[SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER];
+        struct {
+            const uint32_t sync_sig;
+        } gpio_synchros[SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP];
+    } groups[SOC_MCPWM_GROUPS];
+} mcpwm_signal_conn_t;
+
+extern const mcpwm_signal_conn_t mcpwm_periph_signals;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/pcnt_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/pcnt_periph.h
new file mode 100644
index 00000000000..966950c8461
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/pcnt_periph.h
@@ -0,0 +1,44 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc_caps.h"
+#include "soc/periph_defs.h"
+#include "soc/pcnt_reg.h"
+#include "soc/pcnt_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    struct {
+        struct {
+            struct {
+                const uint32_t pulse_sig;
+                const uint32_t control_sig;
+            } channels[SOC_PCNT_CHANNELS_PER_UNIT];
+        } units[SOC_PCNT_UNITS_PER_GROUP];
+        const uint32_t irq;
+        const periph_module_t module;
+    } groups[SOC_PCNT_GROUPS];
+} pcnt_signal_conn_t;
+
+extern const pcnt_signal_conn_t pcnt_periph_signals;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/rmt_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/rmt_periph.h
new file mode 100644
index 00000000000..0a2d8e2a9a3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/rmt_periph.h
@@ -0,0 +1,41 @@
+// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc_caps.h"
+#include "soc/periph_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    struct {
+        const int irq;
+        const periph_module_t module;
+        struct {
+            struct {
+                const int tx_sig;
+                const int rx_sig;
+            };
+        } channels[SOC_RMT_CHANNELS_PER_GROUP];
+    } groups[SOC_RMT_GROUPS];
+} rmt_signal_conn_t;
+
+extern const rmt_signal_conn_t rmt_periph_signals;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/rtc_cntl_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/rtc_cntl_periph.h
new file mode 100644
index 00000000000..60e3d3216d7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/rtc_cntl_periph.h
@@ -0,0 +1,18 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/rtc_cntl_reg.h"
+#include "soc/rtc_cntl_struct.h"
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/rtc_io_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/rtc_io_periph.h
new file mode 100644
index 00000000000..618b64cd8f7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/rtc_io_periph.h
@@ -0,0 +1,120 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc.h"
+//include soc related (generated) definitions
+#include "soc/soc_caps.h"
+
+#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+#include "soc/rtc_io_channel.h"
+#include "soc/rtc_io_reg.h"
+#include "soc/rtc_io_struct.h"
+#endif
+
+#include "soc/rtc_cntl_reg.h"
+#include "soc/rtc_cntl_struct.h"
+
+#if SOC_ADC_RTC_CTRL_SUPPORTED
+#include "soc/sens_struct.h"
+#endif
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+
+/**
+ * @brief Pin function information for a single RTCIO pad's.
+ *
+ * This is an internal function of the driver, and is not usually useful
+ * for external use.
+ */
+typedef struct {
+    uint32_t reg;       /*!< Register of RTC pad, or 0 if not an RTC GPIO */
+    uint32_t mux;       /*!< Bit mask for selecting digital pad or RTC pad */
+    uint32_t func;      /*!< Shift of pad function (FUN_SEL) field */
+    uint32_t ie;        /*!< Mask of input enable */
+    uint32_t pullup;    /*!< Mask of pullup enable */
+    uint32_t pulldown;  /*!< Mask of pulldown enable */
+    uint32_t slpsel;    /*!< If slpsel bit is set, slpie will be used as pad input enabled signal in sleep mode */
+    uint32_t slpie;     /*!< Mask of input enable in sleep mode */
+    uint32_t slpoe;     /*!< Mask of output enable in sleep mode */
+    uint32_t hold;      /*!< Mask of hold enable */
+    uint32_t hold_force;/*!< Mask of hold_force bit for RTC IO in RTC_CNTL_HOLD_REG */
+    uint32_t drv_v;     /*!< Mask of drive capability */
+    uint32_t drv_s;     /*!< Offset of drive capability */
+    int rtc_num;        /*!< GPIO number (corresponds to RTC pad) */
+} rtc_io_desc_t;
+
+/**
+ * @brief Provides access to a constant table of RTC I/O pin
+ * function information.
+ * The index of table is the index of rtcio.
+ *
+ * This is an internal function of the driver, and is not usually useful
+ * for external use.
+ */
+extern const rtc_io_desc_t rtc_io_desc[SOC_RTCIO_PIN_COUNT];
+
+/**
+ * @brief Provides a constant table to get rtc io number with gpio number
+ *
+ * This is an internal function of the driver, and is not usually useful
+ * for external use.
+ */
+extern const int rtc_io_num_map[SOC_GPIO_PIN_COUNT];
+
+#ifdef CONFIG_RTCIO_SUPPORT_RTC_GPIO_DESC
+/**
+ * @brief Pin function information for a single GPIO pad's RTC functions.
+ *
+ * This is an internal function of the driver, and is not usually useful
+ * for external use.
+ */
+typedef struct {
+    uint32_t reg;       /*!< Register of RTC pad, or 0 if not an RTC GPIO */
+    uint32_t mux;       /*!< Bit mask for selecting digital pad or RTC pad */
+    uint32_t func;      /*!< Shift of pad function (FUN_SEL) field */
+    uint32_t ie;        /*!< Mask of input enable */
+    uint32_t pullup;    /*!< Mask of pullup enable */
+    uint32_t pulldown;  /*!< Mask of pulldown enable */
+    uint32_t slpsel;    /*!< If slpsel bit is set, slpie will be used as pad input enabled signal in sleep mode */
+    uint32_t slpie;     /*!< Mask of input enable in sleep mode */
+    uint32_t hold;      /*!< Mask of hold enable */
+    uint32_t hold_force;/*!< Mask of hold_force bit for RTC IO in RTC_CNTL_HOLD_FORCE_REG */
+    uint32_t drv_v;     /*!< Mask of drive capability */
+    uint32_t drv_s;     /*!< Offset of drive capability */
+    int rtc_num;        /*!< RTC IO number, or -1 if not an RTC GPIO */
+} rtc_gpio_desc_t;
+
+/**
+ * @brief Provides access to a constant table of RTC I/O pin
+ * function information.
+ *
+ * This is an internal function of the driver, and is not usually useful
+ * for external use.
+ */
+extern const rtc_gpio_desc_t rtc_gpio_desc[SOC_GPIO_PIN_COUNT];
+
+#endif // CONFIG_RTCIO_SUPPORT_RTC_GPIO_DESC
+
+#endif // SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/rtc_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/rtc_periph.h
new file mode 100644
index 00000000000..433f5cc42eb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/rtc_periph.h
@@ -0,0 +1,28 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include "rtc_io_periph.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/sdio_slave_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/sdio_slave_periph.h
new file mode 100644
index 00000000000..0f748ae12e5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/sdio_slave_periph.h
@@ -0,0 +1,48 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+//include soc related (generated) definitions
+#include "soc/soc_caps.h"
+#include "soc/soc_pins.h"
+#ifdef SOC_SDIO_SLAVE_SUPPORTED
+#include "soc/slc_reg.h"
+#include "soc/slc_struct.h"
+#endif
+#include "soc/host_reg.h"
+#include "soc/host_struct.h"
+#include "soc/hinf_reg.h"
+#include "soc/hinf_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** pin and signal information of each slot */
+typedef struct {
+    uint32_t clk_gpio;
+    uint32_t cmd_gpio;
+    uint32_t d0_gpio;
+    uint32_t d1_gpio;
+    uint32_t d2_gpio;
+    uint32_t d3_gpio;
+    int      func;
+} sdio_slave_slot_info_t;
+
+extern const sdio_slave_slot_info_t sdio_slave_slot_info[];
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/sdmmc_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/sdmmc_periph.h
new file mode 100644
index 00000000000..c1d38fa29b8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/sdmmc_periph.h
@@ -0,0 +1,75 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+//include soc related (generated) definitions
+#include "soc/soc_caps.h"
+#include "soc/soc_pins.h"
+#include "soc/sdmmc_reg.h"
+#include "soc/sdmmc_struct.h"
+#include "soc/gpio_sig_map.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Common SDMMC slot info, doesn't depend on SOC_SDMMC_USE_{IOMUX,GPIO_MATRIX}
+ */
+typedef struct {
+    uint8_t width;          /*!< Maximum supported slot width (1, 4, 8) */
+    uint8_t card_detect;    /*!< Card detect signal in GPIO Matrix */
+    uint8_t write_protect;  /*!< Write protect signal in GPIO Matrix */
+    uint8_t card_int;       /*!< Card interrupt signal in GPIO Matrix */
+} sdmmc_slot_info_t;
+
+/** Width and GPIO matrix signal numbers for auxillary SD host signals, one structure per slot */
+extern const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS];
+
+/**
+ * This structure lists pin numbers (if SOC_SDMMC_USE_IOMUX is set)
+ * or GPIO Matrix signal numbers (if SOC_SDMMC_USE_GPIO_MATRIX is set)
+ * for the SD bus signals. Field names match SD bus signal names.
+ */
+typedef struct {
+    uint8_t clk;
+    uint8_t cmd;
+    uint8_t d0;
+    uint8_t d1;
+    uint8_t d2;
+    uint8_t d3;
+    uint8_t d4;
+    uint8_t d5;
+    uint8_t d6;
+    uint8_t d7;
+} sdmmc_slot_io_info_t;
+
+/* Note: it is in theory possible to have both IOMUX and GPIO Matrix supported
+ * in the same SoC. However this is not used on any SoC at this point, and would
+ * complicate the driver. Hence only one of these options is supported at a time.
+ */
+#if SOC_SDMMC_USE_IOMUX
+/** GPIO pin numbers of SD bus signals, one structure per slot */
+extern const sdmmc_slot_io_info_t sdmmc_slot_gpio_num[SOC_SDMMC_NUM_SLOTS];
+
+#elif SOC_SDMMC_USE_GPIO_MATRIX
+/** GPIO matrix signal numbers of SD bus signals, one structure per slot */
+extern const sdmmc_slot_io_info_t sdmmc_slot_gpio_sig[SOC_SDMMC_NUM_SLOTS];
+
+#endif // SOC_SDMMC_USE_{IOMUX,GPIO_MATRIX}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/sens_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/sens_periph.h
new file mode 100644
index 00000000000..38b76575373
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/sens_periph.h
@@ -0,0 +1,17 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "soc/sens_reg.h"
+#include "soc/sens_struct.h"
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/sigmadelta_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/sigmadelta_periph.h
new file mode 100644
index 00000000000..695a7835035
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/sigmadelta_periph.h
@@ -0,0 +1,36 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc_caps.h"
+#include "soc/gpio_sd_reg.h"
+#include "soc/gpio_sd_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    struct {
+        const uint32_t sd_sig;
+    } channels[SOC_SIGMADELTA_CHANNEL_NUM];
+} sigma_delta_signal_conn_t;
+
+extern const sigma_delta_signal_conn_t sigma_delta_periph_signals;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/soc_memory_types.h b/tools/sdk/esp32s3/include/soc/include/soc/soc_memory_types.h
new file mode 100644
index 00000000000..cf0d7ff11e6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/soc_memory_types.h
@@ -0,0 +1,193 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "soc/soc.h"
+#include "soc/soc_caps.h"
+#include "sdkconfig.h"
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+inline static bool IRAM_ATTR esp_ptr_dma_capable(const void *p)
+{
+    return (intptr_t)p >= SOC_DMA_LOW && (intptr_t)p < SOC_DMA_HIGH;
+}
+
+inline static bool IRAM_ATTR esp_ptr_dma_ext_capable(const void *p)
+{
+#ifdef SOC_PSRAM_DMA_CAPABLE
+    return (intptr_t)p >= SOC_DMA_EXT_LOW && (intptr_t)p < SOC_DMA_EXT_HIGH;
+#else
+    return false;
+#endif
+}
+
+inline static bool IRAM_ATTR esp_ptr_word_aligned(const void *p)
+{
+    return ((intptr_t)p) % 4 == 0;
+}
+
+inline static bool IRAM_ATTR esp_ptr_executable(const void *p)
+{
+    intptr_t ip = (intptr_t) p;
+    return (ip >= SOC_IROM_LOW && ip < SOC_IROM_HIGH)
+        || (ip >= SOC_IRAM_LOW && ip < SOC_IRAM_HIGH)
+        || (ip >= SOC_IROM_MASK_LOW && ip < SOC_IROM_MASK_HIGH)
+#if defined(SOC_CACHE_APP_LOW) && defined(CONFIG_FREERTOS_UNICORE)
+        || (ip >= SOC_CACHE_APP_LOW && ip < SOC_CACHE_APP_HIGH)
+#endif
+        || (ip >= SOC_RTC_IRAM_LOW && ip < SOC_RTC_IRAM_HIGH);
+}
+
+inline static bool IRAM_ATTR esp_ptr_byte_accessible(const void *p)
+{
+    intptr_t ip = (intptr_t) p;
+    bool r;
+    r = (ip >= SOC_BYTE_ACCESSIBLE_LOW && ip < SOC_BYTE_ACCESSIBLE_HIGH);
+#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+    /* For ESP32 case, RTC fast memory is accessible to PRO cpu only and hence
+     * for single core configuration (where it gets added to system heap) following
+     * additional check is required */
+    r |= (ip >= SOC_RTC_DRAM_LOW && ip < SOC_RTC_DRAM_HIGH);
+#endif
+#if CONFIG_SPIRAM
+#if CONFIG_SPIRAM_SIZE != -1 // Fixed size, can be more accurate
+    r |= (ip >= SOC_EXTRAM_DATA_LOW && ip < (SOC_EXTRAM_DATA_LOW + CONFIG_SPIRAM_SIZE));
+#else
+    r |= (ip >= SOC_EXTRAM_DATA_LOW && ip < (SOC_EXTRAM_DATA_HIGH));
+#endif
+#endif
+    return r;
+}
+
+inline static bool IRAM_ATTR esp_ptr_internal(const void *p) {
+    bool r;
+    r = ((intptr_t)p >= SOC_MEM_INTERNAL_LOW && (intptr_t)p < SOC_MEM_INTERNAL_HIGH);
+    r |= ((intptr_t)p >= SOC_RTC_DATA_LOW && (intptr_t)p < SOC_RTC_DATA_HIGH);
+#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+    /* For ESP32 case, RTC fast memory is accessible to PRO cpu only and hence
+     * for single core configuration (where it gets added to system heap) following
+     * additional check is required */
+    r |= ((intptr_t)p >= SOC_RTC_DRAM_LOW && (intptr_t)p < SOC_RTC_DRAM_HIGH);
+#endif
+    return r;
+}
+
+
+inline static bool IRAM_ATTR esp_ptr_external_ram(const void *p) {
+#if SOC_SPIRAM_SUPPORTED
+    return ((intptr_t)p >= SOC_EXTRAM_DATA_LOW && (intptr_t)p < SOC_EXTRAM_DATA_HIGH);
+#else
+    return false; // SoC has no external RAM
+#endif
+}
+
+inline static bool IRAM_ATTR esp_ptr_in_iram(const void *p) {
+#if CONFIG_IDF_TARGET_ESP32 && CONFIG_FREERTOS_UNICORE
+    return ((intptr_t)p >= SOC_CACHE_APP_LOW && (intptr_t)p < SOC_IRAM_HIGH);
+#else
+    return ((intptr_t)p >= SOC_IRAM_LOW && (intptr_t)p < SOC_IRAM_HIGH);
+#endif
+}
+
+inline static bool IRAM_ATTR esp_ptr_in_drom(const void *p) {
+    return ((intptr_t)p >= SOC_DROM_LOW && (intptr_t)p < SOC_DROM_HIGH);
+}
+
+inline static bool IRAM_ATTR esp_ptr_in_dram(const void *p) {
+    return ((intptr_t)p >= SOC_DRAM_LOW && (intptr_t)p < SOC_DRAM_HIGH);
+}
+
+inline static bool IRAM_ATTR esp_ptr_in_diram_dram(const void *p) {
+    return ((intptr_t)p >= SOC_DIRAM_DRAM_LOW && (intptr_t)p < SOC_DIRAM_DRAM_HIGH);
+}
+
+inline static bool IRAM_ATTR esp_ptr_in_diram_iram(const void *p) {
+    return ((intptr_t)p >= SOC_DIRAM_IRAM_LOW && (intptr_t)p < SOC_DIRAM_IRAM_HIGH);
+}
+
+inline static bool IRAM_ATTR esp_ptr_in_rtc_iram_fast(const void *p) {
+    return ((intptr_t)p >= SOC_RTC_IRAM_LOW && (intptr_t)p < SOC_RTC_IRAM_HIGH);
+}
+
+inline static bool IRAM_ATTR esp_ptr_in_rtc_dram_fast(const void *p) {
+    return ((intptr_t)p >= SOC_RTC_DRAM_LOW && (intptr_t)p < SOC_RTC_DRAM_HIGH);
+}
+
+inline static bool IRAM_ATTR esp_ptr_in_rtc_slow(const void *p) {
+    return ((intptr_t)p >= SOC_RTC_DATA_LOW && (intptr_t)p < SOC_RTC_DATA_HIGH);
+}
+
+/* Convert a D/IRAM DRAM pointer to equivalent word address in IRAM
+
+   - Address must be word aligned
+   - Address must pass esp_ptr_in_diram_dram() test, or result will be invalid pointer
+*/
+inline static void * IRAM_ATTR esp_ptr_diram_dram_to_iram(const void *p) {
+#if SOC_DIRAM_INVERTED
+    return (void *) ( SOC_DIRAM_IRAM_LOW + (SOC_DIRAM_DRAM_HIGH - (intptr_t)p) - 4);
+#else
+    return (void *) ( SOC_DIRAM_IRAM_LOW + ((intptr_t)p - SOC_DIRAM_DRAM_LOW) );
+#endif
+}
+
+/* Convert a D/IRAM IRAM pointer to equivalent word address in DRAM
+
+   - Address must be word aligned
+   - Address must pass esp_ptr_in_diram_iram() test, or result will be invalid pointer
+*/
+inline static void * IRAM_ATTR esp_ptr_diram_iram_to_dram(const void *p) {
+#if SOC_DIRAM_INVERTED
+    return (void *) ( SOC_DIRAM_DRAM_LOW + (SOC_DIRAM_IRAM_HIGH - (intptr_t)p) - 4);
+#else
+    return (void *) ( SOC_DIRAM_DRAM_LOW + ((intptr_t)p - SOC_DIRAM_IRAM_LOW) );
+#endif
+}
+
+inline static bool IRAM_ATTR esp_stack_ptr_in_dram(uint32_t sp)
+{
+    //Check if stack ptr is in between SOC_DRAM_LOW and SOC_DRAM_HIGH, and 16 byte aligned.
+    return !(sp < SOC_DRAM_LOW + 0x10 || sp > SOC_DRAM_HIGH - 0x10 || ((sp & 0xF) != 0));
+}
+
+#if CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
+inline static bool IRAM_ATTR esp_stack_ptr_in_extram(uint32_t sp)
+{
+    //Check if stack ptr is in between SOC_EXTRAM_DATA_LOW and SOC_EXTRAM_DATA_HIGH, and 16 byte aligned.
+    return !(sp < SOC_EXTRAM_DATA_LOW + 0x10 || sp > SOC_EXTRAM_DATA_HIGH - 0x10 || ((sp & 0xF) != 0));
+}
+#endif
+
+inline static bool IRAM_ATTR esp_stack_ptr_is_sane(uint32_t sp)
+{
+    return esp_stack_ptr_in_dram(sp)
+#if CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
+        || esp_stack_ptr_in_extram(sp)
+#endif
+#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+        || esp_ptr_in_rtc_dram_fast((void*) sp)
+#endif
+        ;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/spi_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/spi_periph.h
new file mode 100644
index 00000000000..7aa38650356
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/spi_periph.h
@@ -0,0 +1,90 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include "sdkconfig.h"
+#include "soc/soc.h"
+#include "soc/periph_defs.h"
+
+//include soc related (generated) definitions
+#include "soc/soc_caps.h"
+#include "soc/soc_pins.h"
+#include "soc/spi_reg.h"
+#include "soc/spi_struct.h"
+#include "soc/gpio_sig_map.h"
+#if SOC_MEMSPI_IS_INDEPENDENT
+#include "soc/spi_mem_struct.h"
+#include "soc/spi_mem_reg.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32S2
+#define SPI_FREAD_DIO 0
+#define SPI_FREAD_QIO 0
+#define SPI_FWRITE_DIO 0
+#define SPI_FWRITE_QIO 0
+#endif
+
+/*
+ Stores a bunch of per-spi-peripheral data.
+*/
+typedef struct {
+    const uint8_t spiclk_out;       //GPIO mux output signals
+    const uint8_t spiclk_in;
+    const uint8_t spid_out;
+    const uint8_t spiq_out;
+    const uint8_t spiwp_out;
+    const uint8_t spihd_out;
+#if SOC_SPI_SUPPORT_OCT
+    const uint8_t spid4_out;
+    const uint8_t spid5_out;
+    const uint8_t spid6_out;
+    const uint8_t spid7_out;
+#endif // SOC_SPI_SUPPORT_OCT
+    const uint8_t spid_in;          //GPIO mux input signals
+    const uint8_t spiq_in;
+    const uint8_t spiwp_in;
+    const uint8_t spihd_in;
+#if SOC_SPI_SUPPORT_OCT
+    const uint8_t spid4_in;
+    const uint8_t spid5_in;
+    const uint8_t spid6_in;
+    const uint8_t spid7_in;
+#endif // SOC_SPI_SUPPORT_OCT
+    const uint8_t spics_out[3];     // /CS GPIO output mux signals
+    const uint8_t spics_in;
+    const uint8_t spidqs_out;
+    const uint8_t spicd_out;
+    const uint8_t spiclk_iomux_pin;    //IO pins of IO_MUX muxed signals
+    const uint8_t spid_iomux_pin;
+    const uint8_t spiq_iomux_pin;
+    const uint8_t spiwp_iomux_pin;
+    const uint8_t spihd_iomux_pin;
+    const uint8_t spics0_iomux_pin;
+    const uint8_t irq;              //irq source for interrupt mux
+    const uint8_t irq_dma;          //dma irq source for interrupt mux
+    const periph_module_t module;   //peripheral module, for enabling clock etc
+    const int func;             //function number for IOMUX
+    spi_dev_t *hw;              //Pointer to the hardware registers
+} spi_signal_conn_t;
+
+extern const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM];
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/syscon_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/syscon_periph.h
new file mode 100644
index 00000000000..0179e867c76
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/syscon_periph.h
@@ -0,0 +1,17 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "soc/syscon_reg.h"
+#include "soc/syscon_struct.h"
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/timer_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/timer_periph.h
new file mode 100644
index 00000000000..a7da2da0fca
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/timer_periph.h
@@ -0,0 +1,38 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "soc/timer_group_reg.h"
+#include "soc/timer_group_struct.h"
+#include "soc/soc_caps.h"
+#include "soc/periph_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    struct {
+        const periph_module_t module; // Peripheral module
+        const int t0_irq_id;          // Interrupt ID of the first timer in the group
+    } groups[SOC_TIMER_GROUPS];
+} timer_group_signal_conn_t;
+
+extern const timer_group_signal_conn_t timer_group_periph_signals;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/touch_sensor_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/touch_sensor_periph.h
new file mode 100644
index 00000000000..e38b18b0597
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/touch_sensor_periph.h
@@ -0,0 +1,35 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc_caps.h"
+#include "soc/touch_sensor_channel.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/rtc_cntl_struct.h"
+#include "soc/sens_reg.h"
+#include "soc/sens_struct.h"
+#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+#include "soc/rtc_io_struct.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern const int touch_sensor_channel_io_map[SOC_TOUCH_SENSOR_NUM];
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/twai_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/twai_periph.h
new file mode 100644
index 00000000000..48fc1d8ea8d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/twai_periph.h
@@ -0,0 +1,28 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "soc/soc_caps.h"
+#include "soc/twai_struct.h"
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/uart_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/uart_periph.h
new file mode 100644
index 00000000000..320b947c3b8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/uart_periph.h
@@ -0,0 +1,63 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc_caps.h"
+#include "soc/uart_reg.h"
+#include "soc/uart_struct.h"
+#include "soc/periph_defs.h"
+#include "soc/gpio_sig_map.h"
+#include "soc/io_mux_reg.h"
+#include "soc/uart_pins.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SOC_UART_TX_PIN_IDX  (0)
+#define SOC_UART_RX_PIN_IDX  (1)
+#define SOC_UART_RTS_PIN_IDX (2)
+#define SOC_UART_CTS_PIN_IDX (3)
+
+/**
+ * @brief Macro that can be used to retrieve the signal of a certain pin for a
+ *        certain UART.
+ */
+#define UART_PERIPH_SIGNAL(IDX, PIN) (uart_periph_signal[(IDX)].pins[(PIN)].signal)
+
+typedef struct {
+    /* Default GPIO number for this UART pin in the IOMUX.
+     * This value can be -1 if there is no default GPIO for a pin.
+     * For example, ESP32-C3 doesn't have any default GPIO for
+     * U0CTS and U0RTS. */
+    int32_t default_gpio    : 15;
+    /* Func which should be assigned to the GPIO to be used as UART */
+    int32_t iomux_func      : 4;
+    /* Marks if the current UART pin is input (or not) */
+    uint32_t input          : 1;
+    /* Signal in the GPIO signal map. */
+    uint32_t signal         : 12;
+} uart_periph_sig_t;
+
+typedef struct {
+    const uart_periph_sig_t pins[SOC_UART_PINS_COUNT];
+    const uint8_t irq;
+    const periph_module_t module;
+} uart_signal_conn_t;
+
+extern const uart_signal_conn_t uart_periph_signal[SOC_UART_NUM];
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/uhci_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/uhci_periph.h
new file mode 100644
index 00000000000..f75807c8172
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/uhci_periph.h
@@ -0,0 +1,18 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/uhci_reg.h"
+#include "soc/uhci_struct.h"
+#include "soc/periph_defs.h"
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/usb_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/usb_periph.h
new file mode 100644
index 00000000000..af18350aea4
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/usb_periph.h
@@ -0,0 +1,37 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_pins.h"
+#include "soc/gpio_sig_map.h"
+#include "soc/usb_reg.h"
+#include "soc/usb_types.h"
+#include "soc/usb_struct.h"
+#include "soc/usb_wrap_reg.h"
+#include "soc/usb_wrap_struct.h"
+
+/**
+ * @brief A pin descriptor for init
+ */
+typedef struct {
+    const int pin;
+    const int func;
+    const bool is_output;
+    const int ext_phy_only;
+} usb_iopin_dsc_t;
+
+extern const usb_iopin_dsc_t usb_periph_iopins[];
diff --git a/tools/sdk/esp32s3/include/soc/include/soc/usb_phy_periph.h b/tools/sdk/esp32s3/include/soc/include/soc/usb_phy_periph.h
new file mode 100644
index 00000000000..802d1720cec
--- /dev/null
+++ b/tools/sdk/esp32s3/include/soc/include/soc/usb_phy_periph.h
@@ -0,0 +1,35 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdint.h>
+#include "soc/soc_caps.h"
+#include "soc/periph_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ Stores a bunch of USB-peripheral data.
+*/
+typedef struct {
+    const uint8_t extphy_vp_in;
+    const uint8_t extphy_vm_in;
+    const uint8_t extphy_rcv_in;
+    const uint8_t extphy_oen_out;
+    const uint8_t extphy_vpo_out;
+    const uint8_t extphy_vmo_out;
+    const uint8_t extphy_suspend_in;
+    const uint8_t extphy_speed_in;
+    const periph_module_t module;
+} usb_phy_signal_conn_t;
+
+extern const usb_phy_signal_conn_t usb_phy_periph_signal;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/esp_flash.h b/tools/sdk/esp32s3/include/spi_flash/include/esp_flash.h
new file mode 100644
index 00000000000..c5adb279dcd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/esp_flash.h
@@ -0,0 +1,367 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "esp_err.h"
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "hal/spi_flash_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct spi_flash_chip_t;
+typedef struct spi_flash_chip_t spi_flash_chip_t;
+
+typedef struct esp_flash_t esp_flash_t;
+
+/** @brief Structure for describing a region of flash */
+typedef struct {
+    uint32_t offset;    ///< Start address of this region
+    uint32_t size;      ///< Size of the region
+} esp_flash_region_t;
+
+/** @brief OS-level integration hooks for accessing flash chips inside a running OS
+ *
+ * It's in the public header because some instances should be allocated statically in the startup
+ * code. May be updated according to hardware version and new flash chip feature requirements,
+ * shouldn't be treated as public API.
+ *
+ *  For advanced developers, you may replace some of them with your implementations at your own
+ *  risk.
+*/
+typedef struct {
+    /**
+     * Called before commencing any flash operation. Does not need to be
+     * recursive (ie is called at most once for each call to 'end').
+     */
+    esp_err_t (*start)(void *arg);
+
+    /** Called after completing any flash operation. */
+    esp_err_t (*end)(void *arg);
+
+    /** Called before any erase/write operations to check whether the region is limited by the OS */
+    esp_err_t (*region_protected)(void* arg, size_t start_addr, size_t size);
+
+    /** Delay for at least 'us' microseconds. Called in between 'start' and 'end'. */
+    esp_err_t (*delay_us)(void *arg, uint32_t us);
+
+    /** Called for get temp buffer when buffer from application cannot be directly read into/write from. */
+    void *(*get_temp_buffer)(void* arg, size_t reqest_size, size_t* out_size);
+
+    /** Called for release temp buffer. */
+    void (*release_temp_buffer)(void* arg, void *temp_buf);
+
+    #define SPI_FLASH_YIELD_REQ_YIELD   BIT(0)
+    #define SPI_FLASH_YIELD_REQ_SUSPEND BIT(1)
+
+    /** Yield to other tasks. Called during erase operations.
+     * @return ESP_OK means yield needs to be called (got an event to handle), while ESP_ERR_TIMEOUT means skip yield.*/
+    esp_err_t (*check_yield)(void *arg, uint32_t chip_status, uint32_t* out_request);
+
+    #define SPI_FLASH_YIELD_STA_RESUME  BIT(2)
+
+    /** Yield to other tasks. Called during erase operations. */
+    esp_err_t (*yield)(void *arg, uint32_t* out_status);
+
+    /** Called for get system time. */
+    int64_t (*get_system_time)(void *arg);
+
+} esp_flash_os_functions_t;
+
+/** @brief Structure to describe a SPI flash chip connected to the system.
+
+    Structure must be initialized before use (passed to esp_flash_init()). It's in the public
+    header because some instances should be allocated statically in the startup code. May be
+    updated according to hardware version and new flash chip feature requirements, shouldn't be
+    treated as public API.
+
+    For advanced developers, you may replace some of them with your implementations at your own
+    risk.
+*/
+struct esp_flash_t {
+    spi_flash_host_inst_t* host;   ///< Pointer to hardware-specific "host_driver" structure. Must be initialized before used.
+    const spi_flash_chip_t *chip_drv;   ///< Pointer to chip-model-specific "adapter" structure. If NULL, will be detected during initialisation.
+
+    const esp_flash_os_functions_t *os_func;    ///< Pointer to os-specific hook structure. Call ``esp_flash_init_os_functions()`` to setup this field, after the host is properly initialized.
+    void *os_func_data;                         ///< Pointer to argument for os-specific hooks. Left NULL and will be initialized with ``os_func``.
+
+    esp_flash_io_mode_t read_mode; ///< Configured SPI flash read mode. Set before ``esp_flash_init`` is called.
+    uint32_t size;                   ///< Size of SPI flash in bytes. If 0, size will be detected during initialisation.
+    uint32_t chip_id;               ///< Detected chip id.
+    uint32_t busy             :1;   ///< This flag is used to verify chip's status.
+    uint32_t reserved_flags   :31;  ///< reserved.
+};
+
+
+/** @brief Initialise SPI flash chip interface.
+ *
+ * This function must be called before any other API functions are called for this chip.
+ *
+ * @note Only the ``host`` and ``read_mode`` fields of the chip structure must
+ *       be initialised before this function is called. Other fields may be
+ *       auto-detected if left set to zero or NULL.
+ *
+ * @note If the chip->drv pointer is NULL, chip chip_drv will be auto-detected
+ *       based on its manufacturer & product IDs. See
+ *       ``esp_flash_registered_flash_drivers`` pointer for details of this process.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @return ESP_OK on success, or a flash error code if initialisation fails.
+ */
+esp_err_t esp_flash_init(esp_flash_t *chip);
+
+/**
+ * Check if appropriate chip driver is set.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ *
+ * @return true if set, otherwise false.
+ */
+bool esp_flash_chip_driver_initialized(const esp_flash_t *chip);
+
+/** @brief Read flash ID via the common "RDID" SPI flash command.
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()
+ * @param[out] out_id Pointer to receive ID value.
+ *
+ * ID is a 24-bit value. Lower 16 bits of 'id' are the chip ID, upper 8 bits are the manufacturer ID.
+ *
+ * @return ESP_OK on success, or a flash error code if operation failed.
+ */
+esp_err_t esp_flash_read_id(esp_flash_t *chip, uint32_t *out_id);
+
+/** @brief Detect flash size based on flash ID.
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()
+ * @param[out] out_size Detected size in bytes.
+ *
+ * @note Most flash chips use a common format for flash ID, where the lower 4 bits specify the size as a power of 2. If
+ * the manufacturer doesn't follow this convention, the size may be incorrectly detected.
+ *
+ * @return ESP_OK on success, or a flash error code if operation failed.
+ */
+esp_err_t esp_flash_get_size(esp_flash_t *chip, uint32_t *out_size);
+
+/** @brief Read flash unique ID via the common "RDUID" SPI flash command.
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init().
+ * @param[out] out_id Pointer to receive unique ID value.
+ *
+ * ID is a 64-bit value.
+ *
+ * @return
+ *      - ESP_OK on success, or a flash error code if operation failed.
+ *      - ESP_ERR_NOT_SUPPORTED if the chip doesn't support read id.
+ */
+esp_err_t esp_flash_read_unique_chip_id(esp_flash_t *chip, uint64_t *out_id);
+
+/** @brief Erase flash chip contents
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()
+ *
+ *
+ * @return
+ *      - ESP_OK on success,
+ *      - ESP_ERR_NOT_SUPPORTED if the chip is not able to perform the operation. This is indicated by WREN = 1 after the command is sent.
+ *      - Other flash error code if operation failed.
+ */
+esp_err_t esp_flash_erase_chip(esp_flash_t *chip);
+
+/** @brief Erase a region of the flash chip
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()
+ * @param start Address to start erasing flash. Must be sector aligned.
+ * @param len Length of region to erase. Must also be sector aligned.
+ *
+ * Sector size is specifyed in chip->drv->sector_size field (typically 4096 bytes.) ESP_ERR_INVALID_ARG will be
+ * returned if the start & length are not a multiple of this size.
+ *
+ * Erase is performed using block (multi-sector) erases where possible (block size is specified in
+ * chip->drv->block_erase_size field, typically 65536 bytes). Remaining sectors are erased using individual sector erase
+ * commands.
+ *
+ * @return
+ *      - ESP_OK on success,
+ *      - ESP_ERR_NOT_SUPPORTED if the chip is not able to perform the operation. This is indicated by WREN = 1 after the command is sent.
+ *      - Other flash error code if operation failed.
+ */
+esp_err_t esp_flash_erase_region(esp_flash_t *chip, uint32_t start, uint32_t len);
+
+/** @brief Read if the entire chip is write protected
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()
+ * @param[out] write_protected Pointer to boolean, set to the value of the write protect flag.
+ *
+ * @note A correct result for this flag depends on the SPI flash chip model and chip_drv in use (via the 'chip->drv'
+ * field).
+ *
+ * @return ESP_OK on success, or a flash error code if operation failed.
+ */
+esp_err_t esp_flash_get_chip_write_protect(esp_flash_t *chip, bool *write_protected);
+
+/** @brief Set write protection for the SPI flash chip
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()
+ * @param write_protect Boolean value for the write protect flag
+ *
+ * @note Correct behaviour of this function depends on the SPI flash chip model and chip_drv in use (via the 'chip->drv'
+ * field).
+ *
+ * Some SPI flash chips may require a power cycle before write protect status can be cleared. Otherwise,
+ * write protection can be removed via a follow-up call to this function.
+ *
+ * @return ESP_OK on success, or a flash error code if operation failed.
+ */
+esp_err_t esp_flash_set_chip_write_protect(esp_flash_t *chip, bool write_protect);
+
+
+/** @brief Read the list of individually protectable regions of this SPI flash chip.
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()
+ * @param[out] out_regions Pointer to receive a pointer to the array of protectable regions of the chip.
+ * @param[out] out_num_regions Pointer to an integer receiving the count of protectable regions in the array returned in 'regions'.
+ *
+ * @note Correct behaviour of this function depends on the SPI flash chip model and chip_drv in use (via the 'chip->drv'
+ * field).
+ *
+ * @return ESP_OK on success, or a flash error code if operation failed.
+ */
+esp_err_t esp_flash_get_protectable_regions(const esp_flash_t *chip, const esp_flash_region_t **out_regions, uint32_t *out_num_regions);
+
+
+/** @brief Detect if a region of the SPI flash chip is protected
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()
+ * @param region Pointer to a struct describing a protected region. This must match one of the regions returned from esp_flash_get_protectable_regions(...).
+ * @param[out] out_protected Pointer to a flag which is set based on the protected status for this region.
+ *
+ * @note It is possible for this result to be false and write operations to still fail, if protection is enabled for the entire chip.
+ *
+ * @note Correct behaviour of this function depends on the SPI flash chip model and chip_drv in use (via the 'chip->drv'
+ * field).
+ *
+ * @return ESP_OK on success, or a flash error code if operation failed.
+ */
+esp_err_t esp_flash_get_protected_region(esp_flash_t *chip, const esp_flash_region_t *region, bool *out_protected);
+
+/** @brief Update the protected status for a region of the SPI flash chip
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()
+ * @param region Pointer to a struct describing a protected region. This must match one of the regions returned from esp_flash_get_protectable_regions(...).
+ * @param protect Write protection flag to set.
+ *
+ * @note It is possible for the region protection flag to be cleared and write operations to still fail, if protection is enabled for the entire chip.
+ *
+ * @note Correct behaviour of this function depends on the SPI flash chip model and chip_drv in use (via the 'chip->drv'
+ * field).
+ *
+ * @return ESP_OK on success, or a flash error code if operation failed.
+ */
+esp_err_t esp_flash_set_protected_region(esp_flash_t *chip, const esp_flash_region_t *region, bool protect);
+
+/** @brief Read data from the SPI flash chip
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()
+ * @param buffer Pointer to a buffer where the data will be read. To get better performance, this should be in the DRAM and word aligned.
+ * @param address Address on flash to read from. Must be less than chip->size field.
+ * @param length Length (in bytes) of data to read.
+ *
+ * There are no alignment constraints on buffer, address or length.
+ *
+ * @note If on-chip flash encryption is used, this function returns raw (ie encrypted) data. Use the flash cache
+ * to transparently decrypt data.
+ *
+ * @return
+ *      - ESP_OK: success
+ *      - ESP_ERR_NO_MEM: Buffer is in external PSRAM which cannot be concurrently accessed, and a temporary internal buffer could not be allocated.
+ *      - or a flash error code if operation failed.
+ */
+esp_err_t esp_flash_read(esp_flash_t *chip, void *buffer, uint32_t address, uint32_t length);
+
+/** @brief Write data to the SPI flash chip
+ *
+ * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()
+ * @param address Address on flash to write to. Must be previously erased (SPI NOR flash can only write bits 1->0).
+ * @param buffer Pointer to a buffer with the data to write. To get better performance, this should be in the DRAM and word aligned.
+ * @param length Length (in bytes) of data to write.
+ *
+ * There are no alignment constraints on buffer, address or length.
+ *
+ * @return
+ *      - ESP_OK on success,
+ *      - ESP_ERR_NOT_SUPPORTED if the chip is not able to perform the operation. This is indicated by WREN = 1 after the command is sent.
+ *      - Other flash error code if operation failed.
+ */
+esp_err_t esp_flash_write(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length);
+
+/** @brief Encrypted and write data to the SPI flash chip using on-chip hardware flash encryption
+ *
+ * @param chip Pointer to identify flash chip. Must be NULL (the main flash chip). For other chips, encrypted write is not supported.
+ * @param address Address on flash to write to. 16 byte aligned. Must be previously erased (SPI NOR flash can only write bits 1->0).
+ * @param buffer Pointer to a buffer with the data to write.
+ * @param length Length (in bytes) of data to write. 16 byte aligned.
+ *
+ * @note Both address & length must be 16 byte aligned, as this is the encryption block size
+ *
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_NOT_SUPPORTED: encrypted write not supported for this chip.
+ *  - ESP_ERR_INVALID_ARG: Either the address, buffer or length is invalid.
+ *  - or other flash error code from spi_flash_write_encrypted().
+ */
+esp_err_t esp_flash_write_encrypted(esp_flash_t *chip, uint32_t address, const void *buffer, uint32_t length);
+
+/** @brief Read and decrypt data from the SPI flash chip using on-chip hardware flash encryption
+ *
+ * @param chip Pointer to identify flash chip. Must be NULL (the main flash chip). For other chips, encrypted read is not supported.
+ * @param address Address on flash to read from.
+ * @param out_buffer Pointer to a buffer for the data to read to.
+ * @param length Length (in bytes) of data to read.
+ *
+ * @return
+ *  - ESP_OK: on success
+ *  - ESP_ERR_NOT_SUPPORTED: encrypted read not supported for this chip.
+ *  - or other flash error code from spi_flash_read_encrypted().
+ */
+esp_err_t esp_flash_read_encrypted(esp_flash_t *chip, uint32_t address, void *out_buffer, uint32_t length);
+
+/** @brief Pointer to the "default" SPI flash chip, ie the main chip attached to the MCU.
+
+   This chip is used if the 'chip' argument pass to esp_flash_xxx API functions is ever NULL.
+*/
+extern esp_flash_t *esp_flash_default_chip;
+
+
+/*******************************************************************************
+ * Utility Functions
+ ******************************************************************************/
+
+/**
+ * @brief Returns true if chip is configured for Quad I/O or Quad Fast Read.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ *
+ * @return true if flash works in quad mode, otherwise false
+ */
+static inline bool esp_flash_is_quad_mode(const esp_flash_t *chip)
+{
+    return (chip->read_mode == SPI_FLASH_QIO) || (chip->read_mode == SPI_FLASH_QOUT);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/esp_flash_internal.h b/tools/sdk/esp32s3/include/spi_flash/include/esp_flash_internal.h
new file mode 100644
index 00000000000..1ef3ed1eafb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/esp_flash_internal.h
@@ -0,0 +1,120 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "esp_err.h"
+#include <stdint.h>
+#include <stdbool.h>
+#include <driver/spi_common_internal.h>
+#include "sdkconfig.h"
+
+#include "esp_flash.h"
+
+/** Internal API, don't use in the applications */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/** @brief Initialise the default SPI flash chip
+ *
+ * Called by OS startup code. You do not need to call this in your own applications.
+ */
+#ifdef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
+#define esp_flash_init_default_chip(...) ({ESP_OK;})
+#else
+esp_err_t esp_flash_init_default_chip(void);
+#endif
+
+/**
+ *  Enable OS-level SPI flash protections in IDF
+ *
+ *  Called by OS startup code. You do not need to call this in your own applications.
+ *
+ * @return ESP_OK if success, otherwise failed. See return value of ``esp_flash_init_os_functions``.
+ */
+#ifdef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
+#define esp_flash_app_init(...) ({ESP_OK;})
+#else
+esp_err_t esp_flash_app_init(void);
+#endif
+
+/**
+ *  Disable (or enable) OS-level SPI flash protections in IDF
+ *
+ *  Called by the IDF internal code (e.g. coredump). You do not need to call this in your own applications.
+ *
+ * @return always ESP_OK.
+ */
+#ifdef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
+#define esp_flash_app_disable_protect(...) ({ESP_OK;})
+#else
+esp_err_t esp_flash_app_disable_protect(bool disable);
+#endif
+
+/**
+ *  Initialize OS-level functions for a specific chip.
+ *
+ * @param chip The chip to init os functions.
+ * @param host_id Which SPI host to use, 1 for SPI1, 2 for SPI2 (HSPI), 3 for SPI3 (VSPI)
+ * @param out_dev_id Output of occupied device slot
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - ESP_ERR_INVALID_ARG if host_id is invalid
+ */
+esp_err_t esp_flash_init_os_functions(esp_flash_t *chip, int host_id, int *out_dev_id);
+
+/**
+ * @brief Deinitialize OS-level functions
+ *
+ * @param chip  The chip to deinit os functions
+ * @return always ESP_OK.
+ */
+esp_err_t esp_flash_deinit_os_functions(esp_flash_t* chip);
+
+/**
+ * @brief Initialize the bus lock on the SPI1 bus. Should be called if drivers (including esp_flash)
+ * wants to use SPI1 bus.
+ *
+ * @note When using legacy spi flash API, the bus lock will not be available on SPI1 bus.
+ *
+ * @return esp_err_t always ESP_OK.
+ */
+esp_err_t esp_flash_init_main_bus_lock(void);
+
+/**
+ *  Initialize OS-level functions for the main flash chip.
+ *
+ * @param chip The chip to init os functions. Only pointer to the default chip is supported now.
+ *
+ * @return always ESP_OK
+ */
+esp_err_t esp_flash_app_enable_os_functions(esp_flash_t* chip);
+
+/**
+ *  Disable OS-level functions for the main flash chip during special phases (e.g. coredump)
+ *
+ * @param chip The chip to init os functions. Only "esp_flash_default_chip" is supported now.
+ *
+ * @return always ESP_OK
+ */
+esp_err_t esp_flash_app_disable_os_functions(esp_flash_t* chip);
+
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/esp_flash_spi_init.h b/tools/sdk/esp32s3/include/spi_flash/include/esp_flash_spi_init.h
new file mode 100644
index 00000000000..85334d3ea5a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/esp_flash_spi_init.h
@@ -0,0 +1,67 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "hal/spi_types.h"
+#include "esp_flash.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Configurations for the SPI Flash to init
+typedef struct {
+    spi_host_device_t host_id;      ///< Bus to use
+    int cs_io_num;                  ///< GPIO pin to output the CS signal
+    esp_flash_io_mode_t io_mode;    ///< IO mode to read from the Flash
+    esp_flash_speed_t speed;        ///< Speed of the Flash clock
+    int input_delay_ns;             ///< Input delay of the data pins, in ns. Set to 0 if unknown.
+    /**
+     * CS line ID, ignored when not `host_id` is not SPI1_HOST, or
+     * `CONFIG_SPI_FLASH_SHARE_SPI1_BUS` is enabled. In this case, the CS line used is
+     * automatically assigned by the SPI bus lock.
+     */
+    int cs_id;
+} esp_flash_spi_device_config_t;
+
+/**
+ *  Add a SPI Flash device onto the SPI bus.
+ *
+ * The bus should be already initialized by ``spi_bus_initialization``.
+ *
+ * @param out_chip Pointer to hold the initialized chip.
+ * @param config Configuration of the chips to initialize.
+ *
+ * @return
+ *      - ESP_ERR_INVALID_ARG: out_chip is NULL, or some field in the config is invalid.
+ *      - ESP_ERR_NO_MEM: failed to allocate memory for the chip structures.
+ *      - ESP_OK: success.
+ */
+esp_err_t spi_bus_add_flash_device(esp_flash_t **out_chip, const esp_flash_spi_device_config_t *config);
+
+/**
+ *  Remove a SPI Flash device from the SPI bus.
+ *
+ * @param chip The flash device to remove.
+ *
+ * @return
+ *      - ESP_ERR_INVALID_ARG: The chip is invalid.
+ *      - ESP_OK: success.
+ */
+esp_err_t spi_bus_remove_flash_device(esp_flash_t *chip);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/esp_partition.h b/tools/sdk/esp32s3/include/spi_flash/include/esp_partition.h
new file mode 100644
index 00000000000..550bf6b6b26
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/esp_partition.h
@@ -0,0 +1,441 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_PARTITION_H__
+#define __ESP_PARTITION_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include "esp_err.h"
+#include "esp_flash.h"
+#include "esp_spi_flash.h"
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp_partition.h
+ * @brief Partition APIs
+ */
+
+
+/**
+ * @brief Partition type
+ *
+ * @note Partition types with integer value 0x00-0x3F are reserved for partition types defined by ESP-IDF.
+ * Any other integer value 0x40-0xFE can be used by individual applications, without restriction.
+ *
+ * @internal Keep this enum in sync with PartitionDefinition class gen_esp32part.py @endinternal
+ *
+ */
+typedef enum {
+    ESP_PARTITION_TYPE_APP = 0x00,       //!< Application partition type
+    ESP_PARTITION_TYPE_DATA = 0x01,      //!< Data partition type
+
+    ESP_PARTITION_TYPE_ANY = 0xff,       //!< Used to search for partitions with any type
+} esp_partition_type_t;
+
+/**
+ * @brief Partition subtype
+ *
+ * @note These ESP-IDF-defined partition subtypes apply to partitions of type ESP_PARTITION_TYPE_APP
+ * and ESP_PARTITION_TYPE_DATA.
+ *
+ * Application-defined partition types (0x40-0xFE) can set any numeric subtype value.
+ *
+ * @internal Keep this enum in sync with PartitionDefinition class gen_esp32part.py @endinternal
+ */
+typedef enum {
+    ESP_PARTITION_SUBTYPE_APP_FACTORY = 0x00,                                 //!< Factory application partition
+    ESP_PARTITION_SUBTYPE_APP_OTA_MIN = 0x10,                                 //!< Base for OTA partition subtypes
+    ESP_PARTITION_SUBTYPE_APP_OTA_0 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 0,  //!< OTA partition 0
+    ESP_PARTITION_SUBTYPE_APP_OTA_1 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 1,  //!< OTA partition 1
+    ESP_PARTITION_SUBTYPE_APP_OTA_2 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 2,  //!< OTA partition 2
+    ESP_PARTITION_SUBTYPE_APP_OTA_3 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 3,  //!< OTA partition 3
+    ESP_PARTITION_SUBTYPE_APP_OTA_4 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 4,  //!< OTA partition 4
+    ESP_PARTITION_SUBTYPE_APP_OTA_5 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 5,  //!< OTA partition 5
+    ESP_PARTITION_SUBTYPE_APP_OTA_6 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 6,  //!< OTA partition 6
+    ESP_PARTITION_SUBTYPE_APP_OTA_7 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 7,  //!< OTA partition 7
+    ESP_PARTITION_SUBTYPE_APP_OTA_8 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 8,  //!< OTA partition 8
+    ESP_PARTITION_SUBTYPE_APP_OTA_9 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 9,  //!< OTA partition 9
+    ESP_PARTITION_SUBTYPE_APP_OTA_10 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 10,//!< OTA partition 10
+    ESP_PARTITION_SUBTYPE_APP_OTA_11 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 11,//!< OTA partition 11
+    ESP_PARTITION_SUBTYPE_APP_OTA_12 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 12,//!< OTA partition 12
+    ESP_PARTITION_SUBTYPE_APP_OTA_13 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 13,//!< OTA partition 13
+    ESP_PARTITION_SUBTYPE_APP_OTA_14 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 14,//!< OTA partition 14
+    ESP_PARTITION_SUBTYPE_APP_OTA_15 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 15,//!< OTA partition 15
+    ESP_PARTITION_SUBTYPE_APP_OTA_MAX = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 16,//!< Max subtype of OTA partition
+    ESP_PARTITION_SUBTYPE_APP_TEST = 0x20,                                    //!< Test application partition
+
+    ESP_PARTITION_SUBTYPE_DATA_OTA = 0x00,                                    //!< OTA selection partition
+    ESP_PARTITION_SUBTYPE_DATA_PHY = 0x01,                                    //!< PHY init data partition
+    ESP_PARTITION_SUBTYPE_DATA_NVS = 0x02,                                    //!< NVS partition
+    ESP_PARTITION_SUBTYPE_DATA_COREDUMP = 0x03,                               //!< COREDUMP partition
+    ESP_PARTITION_SUBTYPE_DATA_NVS_KEYS = 0x04,                               //!< Partition for NVS keys
+    ESP_PARTITION_SUBTYPE_DATA_EFUSE_EM = 0x05,                               //!< Partition for emulate eFuse bits
+    ESP_PARTITION_SUBTYPE_DATA_UNDEFINED = 0x06,                              //!< Undefined (or unspecified) data partition
+
+    ESP_PARTITION_SUBTYPE_DATA_ESPHTTPD = 0x80,                               //!< ESPHTTPD partition
+    ESP_PARTITION_SUBTYPE_DATA_FAT = 0x81,                                    //!< FAT partition
+    ESP_PARTITION_SUBTYPE_DATA_SPIFFS = 0x82,                                 //!< SPIFFS partition
+
+    ESP_PARTITION_SUBTYPE_ANY = 0xff,                                         //!< Used to search for partitions with any subtype
+} esp_partition_subtype_t;
+
+/**
+ * @brief Convenience macro to get esp_partition_subtype_t value for the i-th OTA partition
+ */
+#define ESP_PARTITION_SUBTYPE_OTA(i) ((esp_partition_subtype_t)(ESP_PARTITION_SUBTYPE_APP_OTA_MIN + ((i) & 0xf)))
+
+/**
+ * @brief Opaque partition iterator type
+ */
+typedef struct esp_partition_iterator_opaque_* esp_partition_iterator_t;
+
+/**
+ * @brief partition information structure
+ *
+ * This is not the format in flash, that format is esp_partition_info_t.
+ *
+ * However, this is the format used by this API.
+ */
+typedef struct {
+    esp_flash_t* flash_chip;            /*!< SPI flash chip on which the partition resides */
+    esp_partition_type_t type;          /*!< partition type (app/data) */
+    esp_partition_subtype_t subtype;    /*!< partition subtype */
+    uint32_t address;                   /*!< starting address of the partition in flash */
+    uint32_t size;                      /*!< size of the partition, in bytes */
+    char label[17];                     /*!< partition label, zero-terminated ASCII string */
+    bool encrypted;                     /*!< flag is set to true if partition is encrypted */
+} esp_partition_t;
+
+/**
+ * @brief Find partition based on one or more parameters
+ *
+ * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer.
+ *             To find all partitions, no matter the type, use ESP_PARTITION_TYPE_ANY, and set
+ *             subtype argument to ESP_PARTITION_SUBTYPE_ANY.
+ * @param subtype Partition subtype, one of esp_partition_subtype_t values or an 8-bit unsigned integer.
+ *                To find all partitions of given type, use ESP_PARTITION_SUBTYPE_ANY.
+ * @param label (optional) Partition label. Set this value if looking
+ *             for partition with a specific name. Pass NULL otherwise.
+ *
+ * @return iterator which can be used to enumerate all the partitions found,
+ *         or NULL if no partitions were found.
+ *         Iterator obtained through this function has to be released
+ *         using esp_partition_iterator_release when not used any more.
+ */
+esp_partition_iterator_t esp_partition_find(esp_partition_type_t type, esp_partition_subtype_t subtype, const char* label);
+
+/**
+ * @brief Find first partition based on one or more parameters
+ *
+ * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer.
+ *             To find all partitions, no matter the type, use ESP_PARTITION_TYPE_ANY, and set
+ *             subtype argument to ESP_PARTITION_SUBTYPE_ANY.
+ * @param subtype Partition subtype, one of esp_partition_subtype_t values or an 8-bit unsigned integer
+ *                To find all partitions of given type, use ESP_PARTITION_SUBTYPE_ANY.
+ * @param label (optional) Partition label. Set this value if looking
+ *             for partition with a specific name. Pass NULL otherwise.
+ *
+ * @return pointer to esp_partition_t structure, or NULL if no partition is found.
+ *         This pointer is valid for the lifetime of the application.
+ */
+const esp_partition_t* esp_partition_find_first(esp_partition_type_t type, esp_partition_subtype_t subtype, const char* label);
+
+/**
+ * @brief Get esp_partition_t structure for given partition
+ *
+ * @param iterator  Iterator obtained using esp_partition_find. Must be non-NULL.
+ *
+ * @return pointer to esp_partition_t structure. This pointer is valid for the lifetime
+ *         of the application.
+ */
+const esp_partition_t* esp_partition_get(esp_partition_iterator_t iterator);
+
+/**
+ * @brief Move partition iterator to the next partition found
+ *
+ * Any copies of the iterator will be invalid after this call.
+ *
+ * @param iterator Iterator obtained using esp_partition_find. Must be non-NULL.
+ *
+ * @return NULL if no partition was found, valid esp_partition_iterator_t otherwise.
+ */
+esp_partition_iterator_t esp_partition_next(esp_partition_iterator_t iterator);
+
+/**
+ * @brief Release partition iterator
+ *
+ * @param iterator Iterator obtained using esp_partition_find.
+ *                 The iterator is allowed to be NULL, so it is not necessary to check its value
+ *                 before calling this function.
+ *
+ */
+void esp_partition_iterator_release(esp_partition_iterator_t iterator);
+
+/**
+ * @brief Verify partition data
+ *
+ * Given a pointer to partition data, verify this partition exists in the partition table (all fields match.)
+ *
+ * This function is also useful to take partition data which may be in a RAM buffer and convert it to a pointer to the
+ * permanent partition data stored in flash.
+ *
+ * Pointers returned from this function can be compared directly to the address of any pointer returned from
+ * esp_partition_get(), as a test for equality.
+ *
+ * @param partition Pointer to partition data to verify. Must be non-NULL. All fields of this structure must match the
+ * partition table entry in flash for this function to return a successful match.
+ *
+ * @return
+ * - If partition not found, returns NULL.
+ * - If found, returns a pointer to the esp_partition_t structure in flash. This pointer is always valid for the lifetime of the application.
+ */
+const esp_partition_t *esp_partition_verify(const esp_partition_t *partition);
+
+/**
+ * @brief Read data from the partition
+ *
+ * Partitions marked with an encryption flag will automatically be
+ * be read and decrypted via a cache mapping.
+ *
+ * @param partition Pointer to partition structure obtained using
+ *                  esp_partition_find_first or esp_partition_get.
+ *                  Must be non-NULL.
+ * @param dst Pointer to the buffer where data should be stored.
+ *            Pointer must be non-NULL and buffer must be at least 'size' bytes long.
+ * @param src_offset Address of the data to be read, relative to the
+ *                   beginning of the partition.
+ * @param size Size of data to be read, in bytes.
+ *
+ * @return ESP_OK, if data was read successfully;
+ *         ESP_ERR_INVALID_ARG, if src_offset exceeds partition size;
+ *         ESP_ERR_INVALID_SIZE, if read would go out of bounds of the partition;
+ *         or one of error codes from lower-level flash driver.
+ */
+esp_err_t esp_partition_read(const esp_partition_t* partition,
+                             size_t src_offset, void* dst, size_t size);
+
+/**
+ * @brief Write data to the partition
+ *
+ * Before writing data to flash, corresponding region of flash needs to be erased.
+ * This can be done using esp_partition_erase_range function.
+ *
+ * Partitions marked with an encryption flag will automatically be
+ * written via the spi_flash_write_encrypted() function. If writing to
+ * an encrypted partition, all write offsets and lengths must be
+ * multiples of 16 bytes. See the spi_flash_write_encrypted() function
+ * for more details. Unencrypted partitions do not have this
+ * restriction.
+ *
+ * @param partition Pointer to partition structure obtained using
+ *                  esp_partition_find_first or esp_partition_get.
+ *                  Must be non-NULL.
+ * @param dst_offset Address where the data should be written, relative to the
+ *                   beginning of the partition.
+ * @param src Pointer to the source buffer.  Pointer must be non-NULL and
+ *            buffer must be at least 'size' bytes long.
+ * @param size Size of data to be written, in bytes.
+ *
+ * @note Prior to writing to flash memory, make sure it has been erased with
+ *       esp_partition_erase_range call.
+ *
+ * @return ESP_OK, if data was written successfully;
+ *         ESP_ERR_INVALID_ARG, if dst_offset exceeds partition size;
+ *         ESP_ERR_INVALID_SIZE, if write would go out of bounds of the partition;
+ *         or one of error codes from lower-level flash driver.
+ */
+esp_err_t esp_partition_write(const esp_partition_t* partition,
+                              size_t dst_offset, const void* src, size_t size);
+
+/**
+ * @brief Read data from the partition without any transformation/decryption.
+ *
+ * @note This function is essentially the same as \c esp_partition_read() above.
+ *       It just never decrypts data but returns it as is.
+ *
+ * @param partition Pointer to partition structure obtained using
+ *                  esp_partition_find_first or esp_partition_get.
+ *                  Must be non-NULL.
+ * @param dst Pointer to the buffer where data should be stored.
+ *            Pointer must be non-NULL and buffer must be at least 'size' bytes long.
+ * @param src_offset Address of the data to be read, relative to the
+ *                   beginning of the partition.
+ * @param size Size of data to be read, in bytes.
+ *
+ * @return ESP_OK, if data was read successfully;
+ *         ESP_ERR_INVALID_ARG, if src_offset exceeds partition size;
+ *         ESP_ERR_INVALID_SIZE, if read would go out of bounds of the partition;
+ *         or one of error codes from lower-level flash driver.
+ */
+esp_err_t esp_partition_read_raw(const esp_partition_t* partition,
+                                 size_t src_offset, void* dst, size_t size);
+
+/**
+ * @brief Write data to the partition without any transformation/encryption.
+ *
+ * @note This function is essentially the same as \c esp_partition_write() above.
+ *       It just never encrypts data but writes it as is.
+ *
+ * Before writing data to flash, corresponding region of flash needs to be erased.
+ * This can be done using esp_partition_erase_range function.
+ *
+ * @param partition Pointer to partition structure obtained using
+ *                  esp_partition_find_first or esp_partition_get.
+ *                  Must be non-NULL.
+ * @param dst_offset Address where the data should be written, relative to the
+ *                   beginning of the partition.
+ * @param src Pointer to the source buffer.  Pointer must be non-NULL and
+ *            buffer must be at least 'size' bytes long.
+ * @param size Size of data to be written, in bytes.
+ *
+ * @note Prior to writing to flash memory, make sure it has been erased with
+ *       esp_partition_erase_range call.
+ *
+ * @return ESP_OK, if data was written successfully;
+ *         ESP_ERR_INVALID_ARG, if dst_offset exceeds partition size;
+ *         ESP_ERR_INVALID_SIZE, if write would go out of bounds of the partition;
+ *         or one of the error codes from lower-level flash driver.
+ */
+esp_err_t esp_partition_write_raw(const esp_partition_t* partition,
+                                  size_t dst_offset, const void* src, size_t size);
+
+/**
+ * @brief Erase part of the partition
+ *
+ * @param partition Pointer to partition structure obtained using
+ *                  esp_partition_find_first or esp_partition_get.
+ *                  Must be non-NULL.
+ * @param offset Offset from the beginning of partition where erase operation
+ *               should start. Must be aligned to 4 kilobytes.
+ * @param size Size of the range which should be erased, in bytes.
+ *                   Must be divisible by 4 kilobytes.
+ *
+ * @return ESP_OK, if the range was erased successfully;
+ *         ESP_ERR_INVALID_ARG, if iterator or dst are NULL;
+ *         ESP_ERR_INVALID_SIZE, if erase would go out of bounds of the partition;
+ *         or one of error codes from lower-level flash driver.
+ */
+esp_err_t esp_partition_erase_range(const esp_partition_t* partition,
+                                    size_t offset, size_t size);
+
+/**
+ * @brief Configure MMU to map partition into data memory
+ *
+ * Unlike spi_flash_mmap function, which requires a 64kB aligned base address,
+ * this function doesn't impose such a requirement.
+ * If offset results in a flash address which is not aligned to 64kB boundary,
+ * address will be rounded to the lower 64kB boundary, so that mapped region
+ * includes requested range.
+ * Pointer returned via out_ptr argument will be adjusted to point to the
+ * requested offset (not necessarily to the beginning of mmap-ed region).
+ *
+ * To release mapped memory, pass handle returned via out_handle argument to
+ * spi_flash_munmap function.
+ *
+ * @param partition Pointer to partition structure obtained using
+ *                  esp_partition_find_first or esp_partition_get.
+ *                  Must be non-NULL.
+ * @param offset Offset from the beginning of partition where mapping should start.
+ * @param size Size of the area to be mapped.
+ * @param memory  Memory space where the region should be mapped
+ * @param out_ptr  Output, pointer to the mapped memory region
+ * @param out_handle  Output, handle which should be used for spi_flash_munmap call
+ *
+ * @return ESP_OK, if successful
+ */
+esp_err_t esp_partition_mmap(const esp_partition_t* partition, size_t offset, size_t size,
+                             spi_flash_mmap_memory_t memory,
+                             const void** out_ptr, spi_flash_mmap_handle_t* out_handle);
+
+/**
+ * @brief Get SHA-256 digest for required partition.
+ *
+ * For apps with SHA-256 appended to the app image, the result is the appended SHA-256 value for the app image content.
+ * The hash is verified before returning, if app content is invalid then the function returns ESP_ERR_IMAGE_INVALID.
+ * For apps without SHA-256 appended to the image, the result is the SHA-256 of all bytes in the app image.
+ * For other partition types, the result is the SHA-256 of the entire partition.
+ *
+ * @param[in]  partition    Pointer to info for partition containing app or data. (fields: address, size and type, are required to be filled).
+ * @param[out] sha_256      Returned SHA-256 digest for a given partition.
+ *
+ * @return
+ *          - ESP_OK: In case of successful operation.
+ *          - ESP_ERR_INVALID_ARG: The size was 0 or the sha_256 was NULL.
+ *          - ESP_ERR_NO_MEM: Cannot allocate memory for sha256 operation.
+ *          - ESP_ERR_IMAGE_INVALID: App partition doesn't contain a valid app image.
+ *          - ESP_FAIL: An allocation error occurred.
+ */
+esp_err_t esp_partition_get_sha256(const esp_partition_t *partition, uint8_t *sha_256);
+
+/**
+ * @brief Check for the identity of two partitions by SHA-256 digest.
+ *
+ * @param[in] partition_1 Pointer to info for partition 1 containing app or data. (fields: address, size and type, are required to be filled).
+ * @param[in] partition_2 Pointer to info for partition 2 containing app or data. (fields: address, size and type, are required to be filled).
+ *
+ * @return
+ *         - True:  In case of the two firmware is equal.
+ *         - False: Otherwise
+ */
+bool esp_partition_check_identity(const esp_partition_t *partition_1, const esp_partition_t *partition_2);
+
+/**
+ * @brief Register a partition on an external flash chip
+ *
+ * This API allows designating certain areas of external flash chips (identified by the esp_flash_t structure)
+ * as partitions. This allows using them with components which access SPI flash through the esp_partition API.
+ *
+ * @param flash_chip  Pointer to the structure identifying the flash chip
+ * @param offset  Address in bytes, where the partition starts
+ * @param size  Size of the partition in bytes
+ * @param label  Partition name
+ * @param type  One of the partition types (ESP_PARTITION_TYPE_*), or an integer. Note that applications can not be booted from external flash
+ *              chips, so using ESP_PARTITION_TYPE_APP is not supported.
+ * @param subtype  One of the partition subtypes (ESP_PARTITION_SUBTYPE_*), or an integer.
+ * @param[out] out_partition  Output, if non-NULL, receives the pointer to the resulting esp_partition_t structure
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_SUPPORTED if CONFIG_CONFIG_SPI_FLASH_USE_LEGACY_IMPL is enabled
+ *      - ESP_ERR_NO_MEM if memory allocation has failed
+ *      - ESP_ERR_INVALID_ARG if the new partition overlaps another partition on the same flash chip
+ *      - ESP_ERR_INVALID_SIZE if the partition doesn't fit into the flash chip size
+ */
+esp_err_t esp_partition_register_external(esp_flash_t* flash_chip, size_t offset, size_t size,
+                                     const char* label, esp_partition_type_t type, esp_partition_subtype_t subtype,
+                                     const esp_partition_t** out_partition);
+
+/**
+ * @brief Deregister the partition previously registered using esp_partition_register_external
+ * @param partition  pointer to the partition structure obtained from esp_partition_register_external,
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NOT_FOUND if the partition pointer is not found
+ *      - ESP_ERR_INVALID_ARG if the partition comes from the partition table
+ *      - ESP_ERR_INVALID_ARG if the partition was not registered using
+ *        esp_partition_register_external function.
+ */
+esp_err_t esp_partition_deregister_external(const esp_partition_t* partition);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __ESP_PARTITION_H__ */
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/esp_private/spi_flash_os.h b/tools/sdk/esp32s3/include/spi_flash/include/esp_private/spi_flash_os.h
new file mode 100644
index 00000000000..e73511bc117
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/esp_private/spi_flash_os.h
@@ -0,0 +1,114 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * System level MSPI APIs (private)
+ */
+/**
+ * Currently the MSPI timing tuning related APIs are designed to be private.
+ * Because:
+ * 1. now we don't split SPI0 and SPI1, we don't have a component for SPI0, including PSRAM, Cache, etc..
+ * 2. SPI0 and SPI1 are strongly coupling.
+ *
+ * In the future, we may consider creating a component for SPI0, and spi_flash component will only work on SPI1 (and it
+ * can rely on SPI0). Therefore, we can put these APIs there.
+ *
+ */
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "sdkconfig.h"
+#include "esp_err.h"
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/spi_flash.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/spi_flash.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/spi_flash.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/spi_flash.h"
+#endif
+#include "esp_flash.h"
+#include "hal/spi_flash_hal.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief To setup Flash chip
+ */
+esp_err_t spi_flash_init_chip_state(void);
+
+/**
+ * @brief Make MSPI work under 20Mhz, remove the timing tuning required delays.
+ * @param control_spi1  Select whether to control SPI1. For tuning, we need to use SPI1. After tuning (during startup stage), let the flash driver to control SPI1
+ */
+void spi_timing_enter_mspi_low_speed_mode(bool control_spi1);
+
+/**
+ * @brief Make MSPI work under the frequency as users set, may add certain delays to MSPI RX direction to meet timing requirements.
+ * @param control_spi1  Select whether to control SPI1. For tuning, we need to use SPI1. After tuning (during startup stage), let the flash driver to control SPI1
+ */
+void spi_timing_enter_mspi_high_speed_mode(bool control_spi1);
+
+/**
+ * @brief Switch MSPI into low speed mode / high speed mode.
+ * @note This API is cache safe, it will freeze both D$ and I$ and restore them after MSPI is switched
+ * @note For some of the MSPI high frequency settings (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
+ *       Certain delays will be added to the MSPI RX direction. When CPU clock switches from PLL to XTAL, should call
+ *       this API first to enter MSPI low speed mode to remove the delays, and vice versa.
+ */
+void spi_timing_change_speed_mode_cache_safe(bool switch_down);
+
+/**
+ * @brief Tune MSPI flash timing to make it work under high frequency
+ */
+void spi_timing_flash_tuning(void);
+
+/**
+ * @brief Tune MSPI psram timing to make it work under high frequency
+ */
+void spi_timing_psram_tuning(void);
+
+/**
+ * @brief To initislize the MSPI pins
+ */
+void esp_mspi_pin_init(void);
+
+/**
+ * @brief Set SPI1 registers to make ROM functions work
+ * @note This function is used for setting SPI1 registers to the state that ROM SPI functions work
+ */
+void spi_flash_set_rom_required_regs(void);
+
+/**
+ * @brief Initialize main flash
+ * @param chip Pointer to main SPI flash(SPI1 CS0) chip to use..
+ */
+esp_err_t esp_flash_init_main(esp_flash_t *chip);
+
+/**
+ * @brief Should be only used by SPI1 Flash driver to know the necessary timing registers
+ * @param out_timing_config Pointer to timing_tuning parameters.
+ */
+void spi_timing_get_flash_timing_param(spi_flash_hal_timing_config_t *out_timing_config);
+
+/**
+ * @brief Get the knowledge if the MSPI timing is tuned or not
+ */
+bool spi_timing_is_tuned(void);
+
+/**
+ * @brief Set Flash chip specifically required MSPI register settings here
+ */
+void spi_flash_set_vendor_required_regs(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/esp_spi_flash.h b/tools/sdk/esp32s3/include/spi_flash/include/esp_spi_flash.h
new file mode 100644
index 00000000000..5e7b77de8ae
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/esp_spi_flash.h
@@ -0,0 +1,428 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef ESP_SPI_FLASH_H
+#define ESP_SPI_FLASH_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include "esp_err.h"
+#include "sdkconfig.h"
+#include "esp_spi_flash_counters.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_ERR_FLASH_OP_FAIL    (ESP_ERR_FLASH_BASE + 1)
+#define ESP_ERR_FLASH_OP_TIMEOUT (ESP_ERR_FLASH_BASE + 2)
+
+#define SPI_FLASH_SEC_SIZE  4096    /**< SPI Flash sector size */
+
+#define SPI_FLASH_MMU_PAGE_SIZE 0x10000 /**< Flash cache MMU mapping page size */
+
+typedef enum {
+    FLASH_WRAP_MODE_8B = 0,
+    FLASH_WRAP_MODE_16B = 2,
+    FLASH_WRAP_MODE_32B = 4,
+    FLASH_WRAP_MODE_64B = 6,
+    FLASH_WRAP_MODE_DISABLE = 1
+} spi_flash_wrap_mode_t;
+
+/**
+ * @brief set wrap mode of flash
+ *
+ * @param mode: wrap mode support disable, 16 32, 64 byte
+ *
+ * @return esp_err_t : ESP_OK for successful.
+ *
+ */
+esp_err_t spi_flash_wrap_set(spi_flash_wrap_mode_t mode);
+
+/**
+ * @brief  Initialize SPI flash access driver
+ *
+ *  This function must be called exactly once, before any other
+ *  spi_flash_* functions are called.
+ *  Currently this function is called from startup code. There is
+ *  no need to call it from application code.
+ *
+ */
+void spi_flash_init(void);
+
+/**
+ * @brief  Get flash chip size, as set in binary image header
+ *
+ * @note This value does not necessarily match real flash size.
+ *
+ * @return size of flash chip, in bytes
+ */
+size_t spi_flash_get_chip_size(void);
+
+/**
+ * @brief  Erase the Flash sector.
+ *
+ * @param  sector: Sector number, the count starts at sector 0, 4KB per sector.
+ *
+ * @return esp_err_t
+ */
+esp_err_t spi_flash_erase_sector(size_t sector);
+
+/**
+ * @brief  Erase a range of flash sectors
+ *
+ * @param  start_address  Address where erase operation has to start.
+ *                                  Must be 4kB-aligned
+ * @param  size  Size of erased range, in bytes. Must be divisible by 4kB.
+ *
+ * @return esp_err_t
+ */
+esp_err_t spi_flash_erase_range(size_t start_address, size_t size);
+
+
+/**
+ * @brief  Write data to Flash.
+ *
+ * @note For fastest write performance, write a 4 byte aligned size at a
+ * 4 byte aligned offset in flash from a source buffer in DRAM. Varying any of
+ * these parameters will still work, but will be slower due to buffering.
+ *
+ * @note Writing more than 8KB at a time will be split into multiple
+ * write operations to avoid disrupting other tasks in the system.
+ *
+ * @param  dest_addr Destination address in Flash.
+ * @param  src       Pointer to the source buffer.
+ * @param  size      Length of data, in bytes.
+ *
+ * @return esp_err_t
+ */
+esp_err_t spi_flash_write(size_t dest_addr, const void *src, size_t size);
+
+
+/**
+ * @brief  Write data encrypted to Flash.
+ *
+ * @note Flash encryption must be enabled for this function to work.
+ *
+ * @note Flash encryption must be enabled when calling this function.
+ * If flash encryption is disabled, the function returns
+ * ESP_ERR_INVALID_STATE.  Use esp_flash_encryption_enabled()
+ * function to determine if flash encryption is enabled.
+ *
+ * @note Both dest_addr and size must be multiples of 16 bytes. For
+ * absolute best performance, both dest_addr and size arguments should
+ * be multiples of 32 bytes.
+ *
+ * @param  dest_addr Destination address in Flash. Must be a multiple of 16 bytes.
+ * @param  src       Pointer to the source buffer.
+ * @param  size      Length of data, in bytes. Must be a multiple of 16 bytes.
+ *
+ * @return esp_err_t
+ */
+esp_err_t spi_flash_write_encrypted(size_t dest_addr, const void *src, size_t size);
+
+/**
+ * @brief  Read data from Flash.
+ *
+ * @note For fastest read performance, all parameters should be
+ * 4 byte aligned. If source address and read size are not 4 byte
+ * aligned, read may be split into multiple flash operations. If
+ * destination buffer is not 4 byte aligned, a temporary buffer will
+ * be allocated on the stack.
+ *
+ * @note Reading more than 16KB of data at a time will be split
+ * into multiple reads to avoid disruption to other tasks in the
+ * system. Consider using spi_flash_mmap() to read large amounts
+ * of data.
+ *
+ * @param  src_addr source address of the data in Flash.
+ * @param  dest     pointer to the destination buffer
+ * @param  size     length of data
+ *
+ *
+ * @return esp_err_t
+ */
+esp_err_t spi_flash_read(size_t src_addr, void *dest, size_t size);
+
+
+/**
+ * @brief  Read data from Encrypted Flash.
+ *
+ * If flash encryption is enabled, this function will transparently decrypt data as it is read.
+ * If flash encryption is not enabled, this function behaves the same as spi_flash_read().
+ *
+ * See esp_flash_encryption_enabled() for a function to check if flash encryption is enabled.
+ *
+ * @param  src   source address of the data in Flash.
+ * @param  dest  pointer to the destination buffer
+ * @param  size  length of data
+ *
+ * @return esp_err_t
+ */
+esp_err_t spi_flash_read_encrypted(size_t src, void *dest, size_t size);
+
+/**
+ * @brief Enumeration which specifies memory space requested in an mmap call
+ */
+typedef enum {
+    SPI_FLASH_MMAP_DATA,    /**< map to data memory (Vaddr0), allows byte-aligned access, 4 MB total */
+    SPI_FLASH_MMAP_INST,    /**< map to instruction memory (Vaddr1-3), allows only 4-byte-aligned access, 11 MB total */
+} spi_flash_mmap_memory_t;
+
+/**
+ * @brief Opaque handle for memory region obtained from spi_flash_mmap.
+ */
+typedef uint32_t spi_flash_mmap_handle_t;
+
+/**
+ * @brief Map region of flash memory into data or instruction address space
+ *
+ * This function allocates sufficient number of 64kB MMU pages and configures
+ * them to map the requested region of flash memory into the address space.
+ * It may reuse MMU pages which already provide the required mapping.
+ *
+ * As with any allocator, if mmap/munmap are heavily used then the address space
+ * may become fragmented. To troubleshoot issues with page allocation, use
+ * spi_flash_mmap_dump() function.
+ *
+ * @param src_addr  Physical address in flash where requested region starts.
+ *                  This address *must* be aligned to 64kB boundary
+ *                  (SPI_FLASH_MMU_PAGE_SIZE)
+ * @param size  Size of region to be mapped. This size will be rounded
+ *              up to a 64kB boundary
+ * @param memory  Address space where the region should be mapped (data or instruction)
+ * @param[out] out_ptr  Output, pointer to the mapped memory region
+ * @param[out] out_handle  Output, handle which should be used for spi_flash_munmap call
+ *
+ * @return  ESP_OK on success, ESP_ERR_NO_MEM if pages can not be allocated
+ */
+esp_err_t spi_flash_mmap(size_t src_addr, size_t size, spi_flash_mmap_memory_t memory,
+                         const void** out_ptr, spi_flash_mmap_handle_t* out_handle);
+
+/**
+ * @brief Map sequences of pages of flash memory into data or instruction address space
+ *
+ * This function allocates sufficient number of 64kB MMU pages and configures
+ * them to map the indicated pages of flash memory contiguously into address space.
+ * In this respect, it works in a similar way as spi_flash_mmap() but it allows mapping
+ * a (maybe non-contiguous) set of pages into a contiguous region of memory.
+ *
+ * @param pages An array of numbers indicating the 64kB pages in flash to be mapped
+ *              contiguously into memory. These indicate the indexes of the 64kB pages,
+ *              not the byte-size addresses as used in other functions.
+ *              Array must be located in internal memory.
+ * @param page_count  Number of entries in the pages array
+ * @param memory  Address space where the region should be mapped (instruction or data)
+ * @param[out] out_ptr  Output, pointer to the mapped memory region
+ * @param[out] out_handle  Output, handle which should be used for spi_flash_munmap call
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NO_MEM if pages can not be allocated
+ *      - ESP_ERR_INVALID_ARG if pagecount is zero or pages array is not in
+ *        internal memory
+ */
+esp_err_t spi_flash_mmap_pages(const int *pages, size_t page_count, spi_flash_mmap_memory_t memory,
+                         const void** out_ptr, spi_flash_mmap_handle_t* out_handle);
+
+
+/**
+ * @brief Release region previously obtained using spi_flash_mmap
+ *
+ * @note Calling this function will not necessarily unmap memory region.
+ *       Region will only be unmapped when there are no other handles which
+ *       reference this region. In case of partially overlapping regions
+ *       it is possible that memory will be unmapped partially.
+ *
+ * @param handle  Handle obtained from spi_flash_mmap
+ */
+void spi_flash_munmap(spi_flash_mmap_handle_t handle);
+
+/**
+ * @brief Display information about mapped regions
+ *
+ * This function lists handles obtained using spi_flash_mmap, along with range
+ * of pages allocated to each handle. It also lists all non-zero entries of
+ * MMU table and corresponding reference counts.
+ */
+void spi_flash_mmap_dump(void);
+
+/**
+ * @brief get free pages number which can be mmap
+ *
+ * This function will return number of free pages available in mmu table. This could be useful
+ * before calling actual spi_flash_mmap (maps flash range to DCache or ICache memory) to check
+ * if there is sufficient space available for mapping.
+ *
+ * @param memory memory type of MMU table free page
+ *
+ * @return number of free pages which can be mmaped
+ */
+uint32_t spi_flash_mmap_get_free_pages(spi_flash_mmap_memory_t memory);
+
+
+#define SPI_FLASH_CACHE2PHYS_FAIL UINT32_MAX /*<! Result from spi_flash_cache2phys() if flash cache address is invalid */
+
+/**
+ * @brief Given a memory address where flash is mapped, return the corresponding physical flash offset.
+ *
+ * Cache address does not have have been assigned via spi_flash_mmap(), any address in memory mapped flash space can be looked up.
+ *
+ * @param cached Pointer to flashed cached memory.
+ *
+ * @return
+ * - SPI_FLASH_CACHE2PHYS_FAIL If cache address is outside flash cache region, or the address is not mapped.
+ * - Otherwise, returns physical offset in flash
+ */
+size_t spi_flash_cache2phys(const void *cached);
+
+/** @brief Given a physical offset in flash, return the address where it is mapped in the memory space.
+ *
+ * Physical address does not have to have been assigned via spi_flash_mmap(), any address in flash can be looked up.
+ *
+ * @note Only the first matching cache address is returned. If MMU flash cache table is configured so multiple entries
+ * point to the same physical address, there may be more than one cache address corresponding to that physical
+ * address. It is also possible for a single physical address to be mapped to both the IROM and DROM regions.
+ *
+ * @note This function doesn't impose any alignment constraints, but if memory argument is SPI_FLASH_MMAP_INST and
+ * phys_offs is not 4-byte aligned, then reading from the returned pointer will result in a crash.
+ *
+ * @param phys_offs Physical offset in flash memory to look up.
+ * @param memory Address space type to look up a flash cache address mapping for (instruction or data)
+ *
+ * @return
+ * - NULL if the physical address is invalid or not mapped to flash cache of the specified memory type.
+ * - Cached memory address (in IROM or DROM space) corresponding to phys_offs.
+ */
+const void *spi_flash_phys2cache(size_t phys_offs, spi_flash_mmap_memory_t memory);
+
+/** @brief Check at runtime if flash cache is enabled on both CPUs
+ *
+ * @return true if both CPUs have flash cache enabled, false otherwise.
+ */
+bool spi_flash_cache_enabled(void);
+
+/**
+ * @brief Re-enable cache for the core defined as cpuid parameter.
+ *
+ * @param cpuid the core number to enable instruction cache for
+ */
+void spi_flash_enable_cache(uint32_t cpuid);
+
+/**
+ * @brief SPI flash critical section enter function.
+ *
+ */
+typedef void (*spi_flash_guard_start_func_t)(void);
+/**
+ * @brief SPI flash critical section exit function.
+ */
+typedef void (*spi_flash_guard_end_func_t)(void);
+/**
+ * @brief SPI flash operation lock function.
+ */
+typedef void (*spi_flash_op_lock_func_t)(void);
+/**
+ * @brief SPI flash operation unlock function.
+ */
+typedef void (*spi_flash_op_unlock_func_t)(void);
+/**
+ * @brief Function to protect SPI flash critical regions corruption.
+ */
+typedef bool (*spi_flash_is_safe_write_address_t)(size_t addr, size_t size);
+/**
+ * @brief Function to yield to the OS during erase operation.
+ */
+typedef void (*spi_flash_os_yield_t)(void);
+
+/**
+ * Structure holding SPI flash access critical sections management functions.
+ *
+ * Flash API uses two types of flash access management functions:
+ * 1) Functions which prepare/restore flash cache and interrupts before calling
+ *    appropriate ROM functions (SPIWrite, SPIRead and SPIEraseBlock):
+ *   - 'start' function should disables flash cache and non-IRAM interrupts and
+ *      is invoked before the call to one of ROM function above.
+ *   - 'end' function should restore state of flash cache and non-IRAM interrupts and
+ *      is invoked after the call to one of ROM function above.
+ *    These two functions are not recursive.
+ * 2) Functions which synchronizes access to internal data used by flash API.
+ *    This functions are mostly intended to synchronize access to flash API internal data
+ *    in multithreaded environment and use OS primitives:
+ *   - 'op_lock' locks access to flash API internal data.
+ *   - 'op_unlock' unlocks access to flash API internal data.
+ *   These two functions are recursive and can be used around the outside of multiple calls to
+ *   'start' & 'end', in order to create atomic multi-part flash operations.
+ * 3) When CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is disabled, flash writing/erasing
+ *    API checks for addresses provided by user to avoid corruption of critical flash regions
+ *    (bootloader, partition table, running application etc.).
+ *
+ * Different versions of the guarding functions should be used depending on the context of
+ * execution (with or without functional OS). In normal conditions when flash API is called
+ * from task the functions use OS primitives. When there is no OS at all or when
+ * it is not guaranteed that OS is functional (accessing flash from exception handler) these
+ * functions cannot use OS primitives or even does not need them (multithreaded access is not possible).
+ *
+ * @note Structure and corresponding guard functions should not reside in flash.
+ *       For example structure can be placed in DRAM and functions in IRAM sections.
+ */
+typedef struct {
+    spi_flash_guard_start_func_t        start;      /**< critical section start function. */
+    spi_flash_guard_end_func_t          end;        /**< critical section end function. */
+    spi_flash_op_lock_func_t            op_lock;    /**< flash access API lock function.*/
+    spi_flash_op_unlock_func_t          op_unlock;  /**< flash access API unlock function.*/
+#if !CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED
+    spi_flash_is_safe_write_address_t   is_safe_write_address; /**< checks flash write addresses.*/
+#endif
+    spi_flash_os_yield_t                yield;      /**< yield to the OS during flash erase */
+} spi_flash_guard_funcs_t;
+
+/**
+ * @brief  Sets guard functions to access flash.
+ *
+ * @note Pointed structure and corresponding guard functions should not reside in flash.
+ *       For example structure can be placed in DRAM and functions in IRAM sections.
+ *
+ * @param funcs pointer to structure holding flash access guard functions.
+ */
+void spi_flash_guard_set(const spi_flash_guard_funcs_t* funcs);
+
+/**
+ * @brief Get the guard functions used for flash access
+ *
+ * @return The guard functions that were set via spi_flash_guard_set(). These functions
+ * can be called if implementing custom low-level SPI flash operations.
+ */
+const spi_flash_guard_funcs_t *spi_flash_guard_get(void);
+
+/**
+ * @brief Default OS-aware flash access guard functions
+ */
+extern const spi_flash_guard_funcs_t g_flash_guard_default_ops;
+
+/**
+ * @brief Non-OS flash access guard functions
+ *
+ * @note This version of flash guard functions is to be used when no OS is present or from panic handler.
+ *       It does not use any OS primitives and IPC and implies that only calling CPU is active.
+ */
+extern const spi_flash_guard_funcs_t g_flash_guard_no_os_ops;
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* ESP_SPI_FLASH_H */
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/esp_spi_flash_counters.h b/tools/sdk/esp32s3/include/spi_flash/include/esp_spi_flash_counters.h
new file mode 100644
index 00000000000..ab8157c256d
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/esp_spi_flash_counters.h
@@ -0,0 +1,65 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "sdkconfig.h"
+
+#if CONFIG_SPI_FLASH_ENABLE_COUNTERS
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Structure holding statistics for one type of operation
+ */
+typedef struct {
+    uint32_t count;     // number of times operation was executed
+    uint32_t time;      // total time taken, in microseconds
+    uint32_t bytes;     // total number of bytes
+} spi_flash_counter_t;
+
+typedef struct {
+    spi_flash_counter_t read;
+    spi_flash_counter_t write;
+    spi_flash_counter_t erase;
+} spi_flash_counters_t;
+
+/**
+ * @brief  Reset SPI flash operation counters
+ */
+void spi_flash_reset_counters(void);
+
+/**
+ * @brief  Print SPI flash operation counters
+ */
+void spi_flash_dump_counters(void);
+
+/**
+ * @brief  Return current SPI flash operation counters
+ *
+ * @return  pointer to the spi_flash_counters_t structure holding values
+ *          of the operation counters
+ */
+const spi_flash_counters_t* spi_flash_get_counters(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //CONFIG_SPI_FLASH_ENABLE_COUNTERS
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/memspi_host_driver.h b/tools/sdk/esp32s3/include/spi_flash/include/memspi_host_driver.h
new file mode 100644
index 00000000000..1c7b3cb29c8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/memspi_host_driver.h
@@ -0,0 +1,182 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "hal/spi_flash_hal.h"
+
+/** Default configuration for the memspi (high speed version) */
+#define ESP_FLASH_DEFAULT_HOST_DRIVER()  (spi_flash_host_driver_t) { \
+        .dev_config = spi_flash_hal_device_config, \
+        .common_command = spi_flash_hal_common_command, \
+        .read_id = memspi_host_read_id_hs, \
+        .erase_chip = spi_flash_hal_erase_chip, \
+        .erase_sector = spi_flash_hal_erase_sector, \
+        .erase_block = spi_flash_hal_erase_block, \
+        .read_status = memspi_host_read_status_hs, \
+        .set_write_protect = spi_flash_hal_set_write_protect, \
+        .supports_direct_write = spi_flash_hal_supports_direct_write, \
+        .supports_direct_read = spi_flash_hal_supports_direct_read, \
+        .program_page = spi_flash_hal_program_page, \
+        .write_data_slicer = memspi_host_write_data_slicer, \
+        .read = spi_flash_hal_read, \
+        .read_data_slicer = memspi_host_read_data_slicer, \
+        .host_status = spi_flash_hal_check_status, \
+        .configure_host_io_mode = spi_flash_hal_configure_host_io_mode, \
+        .poll_cmd_done = spi_flash_hal_poll_cmd_done, \
+        .flush_cache = memspi_host_flush_cache, \
+        .check_suspend = NULL, \
+        .resume = spi_flash_hal_resume, \
+        .suspend = spi_flash_hal_suspend,\
+        .sus_setup = spi_flash_hal_setup_read_suspend,\
+}
+
+/// configuration for the memspi host
+typedef spi_flash_hal_config_t memspi_host_config_t;
+/// context for the memspi host
+typedef spi_flash_hal_context_t memspi_host_inst_t;
+
+/**
+ * Initialize the memory SPI host.
+ *
+ * @param host Pointer to the host structure.
+ * @param cfg Pointer to configuration structure
+ *
+ * @return always return ESP_OK
+ */
+esp_err_t memspi_host_init_pointers(memspi_host_inst_t *host, const memspi_host_config_t *cfg);
+
+/*******************************************************************************
+ * NOTICE
+ * Rest part of this file are part of the HAL layer
+ * The HAL is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+/**
+ * @brief Read the Status Register read from RDSR (05h).
+ *
+ * High speed implementation of RDID through memspi interface relying on the
+ * ``common_command``.
+ *
+ * @param host The driver context.
+ * @param id Output of the read ID from the slave.
+ *
+ * @return
+ *  - ESP_OK: if success
+ *  - ESP_ERR_FLASH_NO_RESPONSE: if no response from chip
+ *  - or other cases from ``spi_hal_common_command``
+ */
+esp_err_t memspi_host_read_id_hs(spi_flash_host_inst_t *host, uint32_t *id);
+
+/**
+ * High speed implementation of RDSR through memspi interface relying on the
+ * ``common_command``.
+ *
+ * @param host The driver context.
+ * @param id Output of the read ID from the slave.
+ *
+ * @return
+ *  - ESP_OK: if success
+ *  - or other cases from ``spi_hal_common_command``
+ */
+esp_err_t memspi_host_read_status_hs(spi_flash_host_inst_t *host, uint8_t *out_sr);
+
+/**
+ * Flush the cache (if needed) after the contents are modified.
+ *
+ * @param host The driver context.
+ * @param addr Start address of the modified region
+ * @param size Size of the region modified.
+ *
+ * @return always ESP_OK.
+ */
+esp_err_t memspi_host_flush_cache(spi_flash_host_inst_t *host, uint32_t addr, uint32_t size);
+
+/**
+ *  Erase contents of entire chip.
+ *
+ * @param host The driver context.
+ */
+void memspi_host_erase_chip(spi_flash_host_inst_t *host);
+
+/**
+ *  Erase a sector starting from a given address. For 24bit address only.
+ *
+ * @param host The driver context.
+ * @param start_address Starting address of the sector.
+ */
+void memspi_host_erase_sector(spi_flash_host_inst_t *host, uint32_t start_address);
+
+/**
+ *  Erase a block starting from a given address. For 24bit address only.
+ *
+ * @param host The driver context.
+ * @param start_address Starting address of the block.
+ */
+void memspi_host_erase_block(spi_flash_host_inst_t *host, uint32_t start_address);
+
+/**
+ * Program a page with contents of a buffer. For 24bit address only.
+ *
+ * @param host The driver context.
+ * @param buffer Buffer which contains the data to be flashed.
+ * @param address Starting address of where to flash the data.
+ * @param length The number of bytes to flash.
+ */
+void memspi_host_program_page(spi_flash_host_inst_t *host, const void *buffer, uint32_t address, uint32_t length);
+
+/**
+ * Set ability to write to chip.
+ *
+ * @param host The driver context.
+ * @param wp Enable or disable write protect (true - enable, false - disable).
+ */
+esp_err_t memspi_host_set_write_protect(spi_flash_host_inst_t *host, bool wp);
+
+/**
+ * Read data to buffer.
+ *
+ * @param host The driver context.
+ * @param buffer Buffer which contains the data to be read.
+ * @param address Starting address of where to read the data.
+ * @param length The number of bytes to read.
+ */
+esp_err_t memspi_host_read(spi_flash_host_inst_t *host, void *buffer, uint32_t address, uint32_t read_len);
+
+/**
+ * @brief Slicer for read data used in non-encrypted regions. This slicer does nothing but
+ *        limit the length to the maximum size the host supports.
+ *
+ * @param address Flash address to read
+ * @param len Length to read
+ * @param align_address Output of the address to read, should be equal to the input `address`
+ * @param page_size Physical SPI flash page size
+ *
+ * @return Length that can actually be read in one `read` call in `spi_flash_host_driver_t`.
+ */
+int memspi_host_read_data_slicer(spi_flash_host_inst_t *host, uint32_t address, uint32_t len, uint32_t *align_address, uint32_t page_size);
+
+/**
+ * @brief Slicer for write data used in non-encrypted regions. This slicer limit the length to the
+ *        maximum size the host supports, and truncate if the write data lie accross the page boundary
+ *        (256 bytes)
+ *
+ * @param address Flash address to write
+ * @param len Length to write
+ * @param align_address Output of the address to write, should be equal to the input `address`
+ * @param page_size Physical SPI flash page size
+ *
+ * @return Length that can actually be written in one `program_page` call in `spi_flash_host_driver_t`.
+ */
+int memspi_host_write_data_slicer(spi_flash_host_inst_t *host, uint32_t address, uint32_t len, uint32_t *align_address, uint32_t page_size);
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/spi_flash/spi_flash_defs.h b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash/spi_flash_defs.h
new file mode 100644
index 00000000000..1ff0bfdea5c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash/spi_flash_defs.h
@@ -0,0 +1,74 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/* SPI commands (actual on-wire commands not SPI controller bitmasks)
+   Suitable for use with spi_flash_hal_common_command static function.
+*/
+#define CMD_RDID       0x9F
+#define CMD_RDUID      0x4B   /* Read the flash unique ID*/
+#define CMD_WRSR       0x01
+#define  SR_WIP         (1<<0) /* Status register write-in-progress bit */
+#define  SR_WREN        (1<<1) /* Status register write enable bit */
+#define CMD_WRSR2      0x31 /* Not all SPI flash uses this command */
+#define CMD_WREN       0x06
+#define CMD_WRDI       0x04
+#define CMD_RDSR       0x05
+#define CMD_RDSR2      0x35 /* Not all SPI flash uses this command */
+#define CMD_RDSCUR     0x2B /* on specific(MXIC) board, read security register */
+#define CMD_RDFR       0x48 /* on specific(ISSI) board, read function register */
+
+#define CMD_FASTRD_QIO      0xEB
+#define CMD_FASTRD_QIO_4B   0xEC
+#define CMD_FASTRD_QUAD     0x6B
+#define CMD_FASTRD_QUAD_4B  0x6C
+#define CMD_FASTRD_DIO      0xBB
+#define CMD_FASTRD_DIO_4B   0xBC
+#define CMD_FASTRD_DUAL     0x3B
+#define CMD_FASTRD_DUAL_4B  0x3C
+#define CMD_FASTRD          0x0B
+#define CMD_FASTRD_4B       0x0C
+#define CMD_READ            0x03 /* Speed limited */
+#define CMD_READ_4B         0x13 /* Speed limited */
+
+#define CMD_CHIP_ERASE          0xC7
+#define CMD_SECTOR_ERASE        0x20
+#define CMD_SECTOR_ERASE_4B     0x21
+#define CMD_LARGE_BLOCK_ERASE   0xD8 /* 64KB block erase command */
+#define CMD_LARGE_BLOCK_ERASE_4B 0xDC /* 64KB block erase command */
+#define CMD_PROGRAM_PAGE        0x02
+#define CMD_PROGRAM_PAGE_4B     0x12
+#define CMD_SUSPEND             0x75
+#define CMD_RESUME              0x7A
+
+#define CMD_RST_EN      0x66
+#define CMD_RST_DEV     0x99
+
+#define SPI_FLASH_DIO_ADDR_BITLEN       24
+#define SPI_FLASH_DIO_DUMMY_BITLEN      4
+#define SPI_FLASH_QIO_ADDR_BITLEN       24
+#define SPI_FLASH_QIO_DUMMY_BITLEN      6
+#define SPI_FLASH_QOUT_ADDR_BITLEN      24
+#define SPI_FLASH_QOUT_DUMMY_BITLEN     8
+#define SPI_FLASH_DOUT_ADDR_BITLEN      24
+#define SPI_FLASH_DOUT_DUMMY_BITLEN     8
+#define SPI_FLASH_FASTRD_ADDR_BITLEN    24
+#define SPI_FLASH_FASTRD_DUMMY_BITLEN   8
+#define SPI_FLASH_SLOWRD_ADDR_BITLEN    24
+#define SPI_FLASH_SLOWRD_DUMMY_BITLEN   0
+#define SPI_FLASH_OPISTR_ADDR_BITLEN    32
+#define SPI_FLASH_OPISTR_DUMMY_BITLEN   20
+#define SPI_FLASH_OPIDTR_ADDR_BITLEN    32
+#define SPI_FLASH_OPIDTR_DUMMY_BITLEN   40
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_boya.h b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_boya.h
new file mode 100644
index 00000000000..58139b3c941
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_boya.h
@@ -0,0 +1,21 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_flash.h"
+#include "spi_flash_chip_driver.h"
+
+extern const spi_flash_chip_t esp_flash_chip_boya;
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_driver.h b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_driver.h
new file mode 100644
index 00000000000..d2ef25bf6de
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_driver.h
@@ -0,0 +1,223 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "esp_flash.h"
+#include "esp_attr.h"
+
+struct esp_flash_t;
+typedef struct esp_flash_t esp_flash_t;
+
+typedef struct spi_flash_chip_t spi_flash_chip_t;
+
+/** Timeout configurations for flash operations, all in us */
+typedef struct {
+    uint32_t idle_timeout;          ///< Default timeout for other commands to be sent by host and get done by flash
+    uint32_t chip_erase_timeout;    ///< Timeout for chip erase operation
+    uint32_t block_erase_timeout;   ///< Timeout for block erase operation
+    uint32_t sector_erase_timeout;  ///< Timeout for sector erase operation
+    uint32_t page_program_timeout;  ///< Timeout for page program operation
+} flash_chip_op_timeout_t;
+
+typedef enum {
+    SPI_FLASH_REG_STATUS = 1,
+} spi_flash_register_t;
+
+typedef enum {
+   SPI_FLASH_CHIP_CAP_SUSPEND = BIT(0),            ///< Flash chip support suspend feature.
+   SPI_FLASH_CHIP_CAP_32MB_SUPPORT = BIT(1),       ///< Flash chip driver support flash size larger than 32M Bytes.
+   SPI_FLASH_CHIP_CAP_UNIQUE_ID = BIT(2),          ///< Flash chip driver support read the flash unique id.
+} spi_flash_caps_t;
+FLAG_ATTR(spi_flash_caps_t)
+
+/** @brief SPI flash chip driver definition structure.
+ *
+ * The chip driver structure contains chip-specific pointers to functions to perform SPI flash operations, and some
+ * chip-specific numeric values.
+ *
+ * @note This is not a public API. These functions are called from the public API (declared in
+ * esp_flash.h). They assume the caller has already validated arguments and enabled relevant protections
+ * (disabling flash cache, prevent concurrent SPI access, etc.)
+ *
+ * Do not call chip driver functions directly in other contexts.
+ *
+ * A generic driver for generic chips and its related operations are defined in
+ * spi_flash_chip_generic.h which can be used as building blocks for written
+ * new/specific SPI flash chip drivers.
+ *
+ * @note All of these functions may be called with SPI flash cache disabled, so must only ever access IRAM/DRAM/ROM.
+ */
+struct spi_flash_chip_t {
+    const char *name; ///< Name of the chip driver
+    const flash_chip_op_timeout_t *timeout; ///< Timeout configuration for this chip
+    /* Probe to detect if a supported SPI flash chip is found.
+     *
+     * Attempts to configure 'chip' with these operations and probes for a matching SPI flash chip.
+     *
+     * Auto-detection of a SPI flash chip calls this function in turn on each registered driver (see esp_flash_registered_flash_drivers).
+     *
+     * ID - as read by spi_flash_generic_read_id() - is supplied so each probe
+     * function doesn't need to unnecessarily read ID, but probe is permitted
+     * to interrogate flash in any non-destructive way.
+     *
+     * It is permissible for the driver to modify the 'chip' structure if probing succeeds (specifically, to assign something to the
+     * driver_data pointer if that is useful for the driver.)
+     *
+     * @return ESP_OK if probing was successful, an error otherwise. Driver may
+     * assume that returning ESP_OK means it has claimed this chip.
+     */
+    esp_err_t (*probe)(esp_flash_t *chip, uint32_t flash_id);
+
+    esp_err_t (*reset)(esp_flash_t *chip);
+
+
+    /* Detect SPI flash size
+     *
+     * Interrogate the chip to detect its size.
+     */
+    esp_err_t (*detect_size)(esp_flash_t *chip, uint32_t *size);
+
+    /* Erase the entire chip
+
+       Caller has verified the chip is not write protected.
+     */
+    esp_err_t (*erase_chip)(esp_flash_t *chip);
+
+    /* Erase a sector of the chip. Sector size is specified in the 'sector_size' field.
+
+       sector_address is an offset in bytes.
+
+       Caller has verified that this sector should be non-write-protected.
+     */
+    esp_err_t (*erase_sector)(esp_flash_t *chip, uint32_t sector_address);
+
+    /* Erase a multi-sector block of the chip. Block size is specified in the 'block_erase_size' field.
+       sector_address is an offset in bytes.
+
+       Caller has verified that this block should be non-write-protected.
+     */
+    esp_err_t (*erase_block)(esp_flash_t *chip, uint32_t block_address);
+
+    uint32_t sector_size; /* Sector is minimum erase size */
+    uint32_t block_erase_size; /* Optimal (fastest) block size for multi-sector erases on this chip */
+
+    /* Read the write protect status of the entire chip. */
+    esp_err_t (*get_chip_write_protect)(esp_flash_t *chip, bool *out_write_protected);
+
+    /* Set the write protect status of the entire chip. */
+    esp_err_t (*set_chip_write_protect)(esp_flash_t *chip, bool chip_write_protect);
+
+    /* Number of individually write protectable regions on this chip. Range 0-63. */
+    uint8_t num_protectable_regions;
+    /* Pointer to an array describing each protectable region. Should have num_protectable_regions elements. */
+    const esp_flash_region_t *protectable_regions;
+    /* Get a bitmask describing all protectable regions on the chip. Each bit represents one entry in the
+       protectable_regions array, ie bit (1<<N) is set then the region at array entry N is write protected. */
+    esp_err_t (*get_protected_regions)(esp_flash_t *chip, uint64_t *regions);
+
+    /* Set protectable regions on the chip. Each bit represents on entry in the protectable regions array. */
+    esp_err_t (*set_protected_regions)(esp_flash_t *chip, uint64_t regions);
+
+    /* Read data from the chip.
+     *
+     * Before calling this function, the caller will have called chip->drv->set_read_mode(chip) in order to configure the chip's read mode correctly.
+     */
+    esp_err_t (*read)(esp_flash_t *chip, void *buffer, uint32_t address, uint32_t length);
+
+    /* Write any amount of data to the chip.
+     */
+    esp_err_t (*write)(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length);
+
+
+    /* Use the page program command to write data to the chip.
+     *
+     * This function is expected to be called by chip->drv->write (if the
+     * chip->drv->write implementation doesn't call it then it can be left as NULL.)
+     *
+     * - The length argument supplied to this function is at most 'page_size' bytes.
+     *
+     * - The region between 'address' and 'address + length' will not cross a page_size aligned boundary (the write
+     *   implementation is expected to split such a write into two before calling page_program.)
+     */
+    esp_err_t (*program_page)(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length);
+
+    /* Page size as written by the page_program function. Usually 256 bytes. */
+    uint32_t page_size;
+
+    /* Perform an encrypted write to the chip, using internal flash encryption hardware. */
+    esp_err_t (*write_encrypted)(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length);
+
+
+    /* Wait for the SPI flash chip to be idle (any write operation to be complete.) This function is both called from the higher-level API functions, and from other functions in this structure.
+
+       timeout_ms should be a timeout (in milliseconds) before the function returns ESP_ERR_TIMEOUT. This is useful to avoid hanging
+       if the chip is otherwise unresponsive (ie returns all 0xFF or similar.)
+    */
+    esp_err_t (*wait_idle)(esp_flash_t *chip, uint32_t timeout_us);
+
+    /* Configure both the SPI host and the chip for the read mode specified in chip->read_mode.
+     *
+     * This function is called by the higher-level API before the 'read' function is called.
+     *
+     * Can return ESP_ERR_FLASH_UNSUPPORTED_HOST or ESP_ERR_FLASH_UNSUPPORTED_CHIP if the specified mode is unsupported.
+     */
+    esp_err_t (*set_io_mode)(esp_flash_t *chip);
+
+    /*
+     * Get whether the Quad Enable (QE) is set. (*out_io_mode)=SPI_FLASH_QOUT if
+     * enabled, otherwise disabled
+     */
+    esp_err_t (*get_io_mode)(esp_flash_t *chip, esp_flash_io_mode_t* out_io_mode);
+
+    /*
+     * Read the chip ID. Called when chip driver is set, but we want to know the exact chip id (to
+     * get the size, etc.).
+     */
+    esp_err_t (*read_id)(esp_flash_t *chip, uint32_t* out_chip_id);
+
+    /*
+     * Read the requested register (status, etc.).
+     */
+    esp_err_t (*read_reg)(esp_flash_t *chip, spi_flash_register_t reg_id, uint32_t* out_reg);
+
+    /** Yield to other tasks. Called during erase operations. */
+    esp_err_t (*yield)(esp_flash_t *chip, uint32_t wip);
+
+    /** Setup flash suspend configuration. */
+    esp_err_t (*sus_setup)(esp_flash_t *chip);
+
+    /**
+     * Read the chip unique ID.
+     */
+    esp_err_t (*read_unique_id)(esp_flash_t *chip, uint64_t* flash_unique_id);
+
+    /**
+     * Get the capabilities of the flash chip. See SPI_FLASH_CHIP_CAP_* macros as reference.
+     */
+    spi_flash_caps_t (*get_chip_caps)(esp_flash_t *chip);
+
+    /**
+     *  Configure the host registers to use the specified read mode set in the ``chip->read_mode``.
+     */
+    esp_err_t (*config_host_io_mode)(esp_flash_t *chip, uint32_t flags);
+};
+
+/* Pointer to an array of pointers to all known drivers for flash chips. This array is used
+   by esp_flash_init() to detect the flash chip driver, if none is supplied by the caller.
+
+   Array is terminated with a NULL pointer.
+
+   This pointer can be overwritten with a pointer to a new array, to update the list of known flash chips.
+ */
+extern const spi_flash_chip_t **esp_flash_registered_chips;
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_gd.h b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_gd.h
new file mode 100644
index 00000000000..09e16611744
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_gd.h
@@ -0,0 +1,36 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_flash.h"
+#include "spi_flash_chip_driver.h"
+
+
+/**
+ * GD (GigaDevice) SPI flash chip_drv, uses all the above functions for its operations. In
+ * default autodetection, this is used as a catchall if a more specific chip_drv
+ * is not found.
+ *
+ * Note that this is for GD chips with product ID 40H (GD25Q) and 60H (GD25LQ). The chip diver uses
+ * different commands to write the SR2 register according to the chip ID. For GD25Q40 - GD25Q16
+ * chips, and GD25LQ chips, WRSR (01H) command is used; while WRSR2 (31H) is used for GD25Q32 -
+ * GD25Q127 chips.
+ */
+esp_err_t spi_flash_chip_gd_probe(esp_flash_t *chip, uint32_t flash_id);
+esp_err_t spi_flash_chip_gd_set_io_mode(esp_flash_t *chip);
+esp_err_t spi_flash_chip_gd_get_io_mode(esp_flash_t *chip, esp_flash_io_mode_t* out_io_mode);
+
+extern const spi_flash_chip_t esp_flash_chip_gd;
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_generic.h b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_generic.h
new file mode 100644
index 00000000000..019a6966a40
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_generic.h
@@ -0,0 +1,411 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_flash.h"
+#include "spi_flash_chip_driver.h"
+
+
+/*
+ * The 'chip_generic' SPI flash operations are a lowest common subset of SPI
+ * flash commands, that work across most chips.
+ *
+ * These can be used as-is via the esp_flash_common_chip_driver chip_drv, or
+ * they can be used as "base chip_drv" functions when creating a new
+ * spi_flash_host_driver_t chip_drv structure.
+ *
+ * All of the functions in this header are internal functions, not part of a
+ * public API. See esp_flash.h for the public API.
+ */
+
+/**
+ * @brief Generic probe function
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param flash_id expected manufacture id.
+ *
+ * @return ESP_OK if the id read from chip->drv_read_id matches (always).
+ */
+esp_err_t spi_flash_chip_generic_probe(esp_flash_t *chip, uint32_t flash_id);
+
+/**
+ * @brief Generic reset function
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ *
+ * @return ESP_OK if sending success, or error code passed from ``common_command`` or ``wait_idle`` functions of host driver.
+ */
+esp_err_t spi_flash_chip_generic_reset(esp_flash_t *chip);
+
+/**
+ * @brief Generic size detection function
+ *
+ * Tries to detect the size of chip by using the lower 4 bits of the chip->drv->read_id result = N, and assuming size is 2 ^ N.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param size Output of the detected size
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - ESP_ERR_FLASH_UNSUPPORTED_CHIP if the manufacturer id is not correct, which may means an error in the reading
+ *      - or other error passed from the ``read_id`` function of host driver
+ */
+esp_err_t spi_flash_chip_generic_detect_size(esp_flash_t *chip, uint32_t *size);
+
+/**
+ * @brief Erase chip by using the generic erase chip command.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - ESP_ERR_NOT_SUPPORTED if the chip is not able to perform the operation. This is indicated by WREN = 1 after the command is sent.
+ *      - or other error passed from the ``set_write_protect``, ``wait_idle`` or ``erase_chip`` function of host driver
+ */
+esp_err_t spi_flash_chip_generic_erase_chip(esp_flash_t *chip);
+
+/**
+ * @brief Erase sector by using the generic sector erase command.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param start_address Start address of the sector to erase
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - ESP_ERR_NOT_SUPPORTED if the chip is not able to perform the operation. This is indicated by WREN = 1 after the command is sent.
+ *      - or other error passed from the ``set_write_protect``, ``wait_idle`` or ``erase_sector`` function of host driver
+ */
+esp_err_t spi_flash_chip_generic_erase_sector(esp_flash_t *chip, uint32_t start_address);
+
+/**
+ * @brief Erase block by the generic 64KB block erase command
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param start_address Start address of the block to erase
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - ESP_ERR_NOT_SUPPORTED if the chip is not able to perform the operation. This is indicated by WREN = 1 after the command is sent.
+ *      - or other error passed from the ``set_write_protect``, ``wait_idle`` or ``erase_block`` function of host driver
+ */
+esp_err_t spi_flash_chip_generic_erase_block(esp_flash_t *chip, uint32_t start_address);
+
+/**
+ * @brief Read from flash by using a read command that matches the programmed
+ * read mode.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param buffer Buffer to hold the data read from flash
+ * @param address Start address of the data on the flash
+ * @param length Length to read
+ *
+ * @return always ESP_OK currently
+ */
+esp_err_t spi_flash_chip_generic_read(esp_flash_t *chip, void *buffer, uint32_t address, uint32_t length);
+
+/**
+ * @brief Perform a page program using the page program command.
+ *
+ * @note Length of each call should not excced the limitation in
+ * ``chip->host->max_write_bytes``. This function is called in
+ * ``spi_flash_chip_generic_write`` recursively until the whole page is
+ * programmed. Strongly suggest to call ``spi_flash_chip_generic_write``
+ * instead.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param buffer Buffer holding the data to program
+ * @param address Start address to write to flash
+ * @param length Length to write, no longer than ``chip->host->max_write_bytes``.
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - ESP_ERR_NOT_SUPPORTED if the chip is not able to perform the operation. This is indicated by WREN = 1 after the command is sent.
+ *      - or other error passed from the ``wait_idle`` or ``program_page`` function of host driver
+ */
+esp_err_t
+spi_flash_chip_generic_page_program(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length);
+
+/**
+ * @brief Perform a generic write. Split the write buffer into page program
+ * operations, and call chip->chip_drv->page-program() for each.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param buffer Buffer holding the data to program
+ * @param address Start address to write to flash
+ * @param length Length to write
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - or other error passed from the ``wait_idle`` or ``program_page`` function of host driver
+  */
+esp_err_t spi_flash_chip_generic_write(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length);
+
+/**
+ * @brief Perform a write using on-chip flash encryption. Not implemented yet.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param buffer Buffer holding the data to program
+ * @param address Start address to write to flash
+ * @param length Length to write
+ *
+ * @return always ESP_ERR_FLASH_UNSUPPORTED_HOST.
+ */
+esp_err_t
+spi_flash_chip_generic_write_encrypted(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length);
+
+/**
+ * @brief Send the write enable or write disable command and verify the expected bit (1) in
+ * the status register is set.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param write_protect true to enable write protection, false to send write enable.
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - or other error passed from the ``wait_idle``, ``read_status`` or
+ *        ``set_write_protect`` function of host driver
+ */
+esp_err_t spi_flash_chip_generic_set_write_protect(esp_flash_t *chip, bool write_protect);
+
+/**
+ * @brief Check whether WEL (write enable latch) bit is set in the Status Register read from RDSR.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param out_write_protect Output of whether the write protect is set.
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - or other error passed from the ``read_status`` function of host driver
+ */
+esp_err_t spi_flash_chip_generic_get_write_protect(esp_flash_t *chip, bool *out_write_protect);
+
+#define ESP_FLASH_CHIP_GENERIC_NO_TIMEOUT -1
+/**
+ * @brief Send commands to read one of the reg of the chip
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param reg_id     Type of the register to read
+ * @param out_reg    Output of the register value
+ * @return esp_err_t Error code passed from the ``read_status`` function of host driver.
+ */
+esp_err_t spi_flash_chip_generic_read_reg(esp_flash_t* chip, spi_flash_register_t reg_id, uint32_t* out_reg);
+
+/**
+ * @brief Read flash status via the RDSR command and wait for bit 0 (write in
+ * progress bit) to be cleared.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param timeout_us Time to wait before timeout, in us.
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - ESP_ERR_TIMEOUT if not idle before timeout
+ *      - or other error passed from the ``wait_idle`` or ``read_status`` function of host driver
+ */
+esp_err_t spi_flash_chip_generic_wait_idle(esp_flash_t *chip, uint32_t timeout_us);
+
+/**
+ * @brief Set the specified SPI read mode according to the data in the chip
+ *        context. Set quad enable status register bit if needed.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ *
+ * @return
+ *      - ESP_OK if success
+*      - ESP_ERR_TIMEOUT if not idle before timeout
+ *      - or other error passed from the ``set_write_protect`` or ``common_command`` function of host driver
+ */
+esp_err_t spi_flash_chip_generic_set_io_mode(esp_flash_t *chip);
+
+/**
+  * Get whether the Quad Enable (QE) is set.
+  *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param out_quad_mode Pointer to store the output mode.
+ *          - SPI_FLASH_QOUT: QE is enabled
+ *          - otherwise: QE is disabled
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - or other error passed from the ``common_command`` function of host driver
+  */
+esp_err_t spi_flash_chip_generic_get_io_mode(esp_flash_t *chip, esp_flash_io_mode_t* out_quad_mode);
+
+/**
+ * @brief Read the chip unique ID.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param flash_unique_id Pointer to store output unique id.
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - ESP_ERR_NOT_SUPPORTED if the chip doesn't support read id.
+ */
+esp_err_t spi_flash_chip_generic_read_unique_id(esp_flash_t *chip, uint64_t* flash_unique_id);
+
+/**
+ * Generic SPI flash chip_drv, uses all the above functions for its operations.
+ * In default autodetection, this is used as a catchall if a more specific
+ * chip_drv is not found.
+ */
+extern const spi_flash_chip_t esp_flash_chip_generic;
+
+/*******************************************************************************
+ *  Utilities
+*******************************************************************************/
+
+/// Function pointer type for reading status register with QE bit.
+typedef esp_err_t (*esp_flash_rdsr_func_t)(esp_flash_t* chip, uint32_t* out_sr);
+
+/**
+ * Use RDSR2 (35H) to read bit 15-8 of the SR, and RDSR (05H) to read bit 7-0.
+ *
+ * @param chip Pointer to SPI flash chip to use.
+ * @param out_sr Pointer to buffer to hold the status register, 16 bits.
+ *
+ * @return ESP_OK if success, otherwise error code passed from the
+ *         `common_command` function of the host driver.
+ */
+esp_err_t spi_flash_common_read_status_16b_rdsr_rdsr2(esp_flash_t* chip, uint32_t* out_sr);
+
+/**
+ * Use RDSR2 (35H) to read bit 15-8 of the SR.
+ *
+ * @param chip Pointer to SPI flash chip to use.
+ * @param out_sr Pointer to buffer to hold the status register, 8 bits.
+ *
+ * @return ESP_OK if success, otherwise error code passed from the
+ *         `common_command` function of the host driver.
+ */
+esp_err_t spi_flash_common_read_status_8b_rdsr2(esp_flash_t* chip, uint32_t* out_sr);
+
+/**
+ * Use RDSR (05H) to read bit 7-0 of the SR.
+ *
+ * @param chip Pointer to SPI flash chip to use.
+ * @param out_sr Pointer to buffer to hold the status register, 8 bits.
+ *
+ * @return ESP_OK if success, otherwise error code passed from the
+ *         `common_command` function of the host driver.
+ */
+esp_err_t spi_flash_common_read_status_8b_rdsr(esp_flash_t* chip, uint32_t* out_sr);
+
+/// Function pointer type for writing status register with QE bit.
+typedef esp_err_t (*esp_flash_wrsr_func_t)(esp_flash_t* chip, uint32_t sr);
+
+/**
+ * Use WRSR (01H) to write bit 7-0 of the SR.
+ *
+ * @param chip Pointer to SPI flash chip to use.
+ * @param sr Value of the status register to write, 8 bits.
+ *
+ * @return ESP_OK if success, otherwise error code passed from the
+ *         `common_command` function of the host driver.
+ */
+esp_err_t spi_flash_common_write_status_8b_wrsr(esp_flash_t* chip, uint32_t sr);
+
+/**
+ * Use WRSR (01H) to write bit 15-0 of the SR.
+ *
+ * @param chip Pointer to SPI flash chip to use.
+ * @param sr Value of the status register to write, 16 bits.
+ *
+ * @return ESP_OK if success, otherwise error code passed from the
+ *         `common_command` function of the host driver.
+ */
+esp_err_t spi_flash_common_write_status_16b_wrsr(esp_flash_t* chip, uint32_t sr);
+
+/**
+ * Use WRSR2 (31H) to write bit 15-8 of the SR.
+ *
+ * @param chip Pointer to SPI flash chip to use.
+ * @param sr Value of the status register to write, 8 bits.
+ *
+ * @return ESP_OK if success, otherwise error code passed from the
+ *         `common_command` function of the host driver.
+ */
+esp_err_t spi_flash_common_write_status_8b_wrsr2(esp_flash_t* chip, uint32_t sr);
+
+/**
+ * @brief Utility function for set_read_mode chip_drv function. If required,
+ * set and check the QE bit in the flash chip to enable the QIO/QOUT mode.
+ *
+ * Most chip QE enable follows a common pattern, though commands to read/write
+ * the status register may be different, as well as the position of QE bit.
+ *
+ * Registers to actually do Quad transtions and command to be sent in reading
+ * should also be configured via
+ * spi_flash_chip_generic_config_host_io_mode().
+ *
+ * Note that the bit length and qe position of wrsr_func, rdsr_func and
+ * qe_sr_bit should be consistent.
+ *
+ * @param chip Pointer to SPI flash chip to use.
+ * @param wrsr_func Function pointer for writing the status register
+ * @param rdsr_func Function pointer for reading the status register
+ * @param qe_sr_bit status with the qe bit only.
+ *
+ * @return always ESP_OK (currently).
+ */
+esp_err_t spi_flash_common_set_io_mode(esp_flash_t *chip, esp_flash_wrsr_func_t wrsr_func, esp_flash_rdsr_func_t rdsr_func, uint32_t qe_sr_bit);
+
+/**
+ * @brief Configure the host registers to use the specified read mode set in
+ *        the ``chip->read_mode``.
+ *
+ * Usually called in chip_drv read() functions before actual reading
+ * transactions. Also prepare the command to be sent in read functions.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param flags Special rules to configure io mode, (i.e. Whether 32 bit commands will be used (Currently only W25Q256 and GD25Q256 are supported))
+ *
+ * @return
+ *      - ESP_OK if success
+ *      - ESP_ERR_FLASH_NOT_INITIALISED if chip not initialized properly
+ *      - or other error passed from the ``configure_host_mode`` function of host driver
+ */
+esp_err_t spi_flash_chip_generic_config_host_io_mode(esp_flash_t *chip, uint32_t flags);
+#define SPI_FLASH_CONFIG_IO_MODE_32B_ADDR BIT(0)
+
+/**
+ * @brief Handle explicit yield requests
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @param wip  Write (erase) in progress, `true` if this function is called during waiting idle of a erase/write command; else `false`.
+ * @return ESP_OK if success, otherwise failed.
+ */
+esp_err_t spi_flash_chip_generic_yield(esp_flash_t* chip, uint32_t wip);
+
+/**
+ * @brief Setup for flash suspend command configuration.
+ *
+ * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
+ * @return ESP_OK
+ */
+esp_err_t spi_flash_chip_generic_suspend_cmd_conf(esp_flash_t *chip);
+
+/**
+ *
+ * @brief Read the chip unique ID unsupported function.
+ *
+ * @param chip Pointer to SPI flash chip to use.
+ * @param flash_unique_id Pointer to store output unique id (Although this function is an unsupported function, but the parameter should be kept for the consistence of the function pointer).
+ * @return Always ESP_ERR_NOT_SUPPORTED.
+ */
+esp_err_t spi_flash_chip_generic_read_unique_id_none(esp_flash_t *chip, uint64_t* flash_unique_id);
+
+/// Default timeout configuration used by most chips
+extern const flash_chip_op_timeout_t spi_flash_chip_generic_timeout;
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_issi.h b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_issi.h
new file mode 100644
index 00000000000..2f1b0635397
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_issi.h
@@ -0,0 +1,31 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_flash.h"
+#include "spi_flash_chip_driver.h"
+
+
+/**
+ * ISSI SPI flash chip_drv, uses all the above functions for its operations. In
+ * default autodetection, this is used as a catchall if a more specific chip_drv
+ * is not found.
+ */
+esp_err_t spi_flash_chip_issi_probe(esp_flash_t *chip, uint32_t flash_id);
+esp_err_t spi_flash_chip_issi_set_io_mode(esp_flash_t *chip);
+esp_err_t spi_flash_chip_issi_get_io_mode(esp_flash_t *chip, esp_flash_io_mode_t* out_io_mode);
+
+extern const spi_flash_chip_t esp_flash_chip_issi;
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_mxic.h b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_mxic.h
new file mode 100644
index 00000000000..201ad496e2a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_mxic.h
@@ -0,0 +1,34 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_flash.h"
+#include "spi_flash_chip_driver.h"
+
+
+/**
+ * MXIC SPI flash chip_drv, uses all the above functions for its operations. In
+ * default autodetection, this is used as a catchall if a more specific chip_drv
+ * is not found.
+ */
+extern const spi_flash_chip_t esp_flash_chip_mxic;
+
+/**
+ * MXIC OPI flash chip_drv, uses all the above functions for its operations. In
+ * default autodetection, this is used as a catchall if a more specific chip_drv
+ * is not found.
+ */
+extern const spi_flash_chip_t esp_flash_chip_mxic_opi;
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_th.h b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_th.h
new file mode 100644
index 00000000000..7f631faf136
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_th.h
@@ -0,0 +1,13 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_flash.h"
+#include "spi_flash_chip_driver.h"
+
+extern const spi_flash_chip_t esp_flash_chip_th;
diff --git a/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_winbond.h b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_winbond.h
new file mode 100644
index 00000000000..23dc19c259e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spi_flash/include/spi_flash_chip_winbond.h
@@ -0,0 +1,27 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_flash.h"
+#include "spi_flash_chip_driver.h"
+
+
+/**
+ * Winbond SPI flash chip_drv, uses all the above functions for its operations. In
+ * default autodetection, this is used as a catchall if a more specific chip_drv
+ * is not found.
+ */
+extern const spi_flash_chip_t esp_flash_chip_winbond;
diff --git a/tools/sdk/esp32s3/include/spiffs/include/esp_spiffs.h b/tools/sdk/esp32s3/include/spiffs/include/esp_spiffs.h
new file mode 100644
index 00000000000..9cc120895db
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spiffs/include/esp_spiffs.h
@@ -0,0 +1,99 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_SPIFFS_H_
+#define _ESP_SPIFFS_H_
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configuration structure for esp_vfs_spiffs_register
+ */
+typedef struct {
+        const char* base_path;          /*!< File path prefix associated with the filesystem. */
+        const char* partition_label;    /*!< Optional, label of SPIFFS partition to use. If set to NULL, first partition with subtype=spiffs will be used. */
+        size_t max_files;               /*!< Maximum files that could be open at the same time. */
+        bool format_if_mount_failed;    /*!< If true, it will format the file system if it fails to mount. */
+} esp_vfs_spiffs_conf_t;
+
+/**
+ * Register and mount SPIFFS to VFS with given path prefix.
+ *
+ * @param   conf                      Pointer to esp_vfs_spiffs_conf_t configuration structure
+ *
+ * @return
+ *          - ESP_OK                  if success
+ *          - ESP_ERR_NO_MEM          if objects could not be allocated
+ *          - ESP_ERR_INVALID_STATE   if already mounted or partition is encrypted
+ *          - ESP_ERR_NOT_FOUND       if partition for SPIFFS was not found
+ *          - ESP_FAIL                if mount or format fails
+ */
+esp_err_t esp_vfs_spiffs_register(const esp_vfs_spiffs_conf_t * conf);
+
+/**
+ * Unregister and unmount SPIFFS from VFS
+ *
+ * @param partition_label  Same label as passed to esp_vfs_spiffs_register.
+ *
+ * @return
+ *          - ESP_OK if successful
+ *          - ESP_ERR_INVALID_STATE already unregistered
+ */
+esp_err_t esp_vfs_spiffs_unregister(const char* partition_label);
+
+/**
+ * Check if SPIFFS is mounted
+ *
+ * @param partition_label  Optional, label of the partition to check.
+ *                         If not specified, first partition with subtype=spiffs is used.
+ *
+ * @return
+ *          - true    if mounted
+ *          - false   if not mounted
+ */
+bool esp_spiffs_mounted(const char* partition_label);
+
+/**
+ * Format the SPIFFS partition
+ *
+ * @param partition_label  Same label as passed to esp_vfs_spiffs_register.
+ * @return
+ *          - ESP_OK      if successful
+ *          - ESP_FAIL    on error
+ */
+esp_err_t esp_spiffs_format(const char* partition_label);
+
+/**
+ * Get information for SPIFFS
+ *
+ * @param partition_label           Same label as passed to esp_vfs_spiffs_register
+ * @param[out] total_bytes          Size of the file system
+ * @param[out] used_bytes           Current used bytes in the file system
+ *
+ * @return
+ *          - ESP_OK                  if success
+ *          - ESP_ERR_INVALID_STATE   if not mounted
+ */
+esp_err_t esp_spiffs_info(const char* partition_label, size_t *total_bytes, size_t *used_bytes);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_SPIFFS_H_ */
diff --git a/tools/sdk/esp32s3/include/spiffs/include/spiffs_config.h b/tools/sdk/esp32s3/include/spiffs/include/spiffs_config.h
new file mode 100644
index 00000000000..5cc3d78049c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/spiffs/include/spiffs_config.h
@@ -0,0 +1,317 @@
+/*
+ * spiffs_config.h
+ *
+ *  Created on: Jul 3, 2013
+ *      Author: petera
+ */
+
+#ifndef SPIFFS_CONFIG_H_
+#define SPIFFS_CONFIG_H_
+
+// ----------- 8< ------------
+// Following includes are for the linux test build of spiffs
+// These may/should/must be removed/altered/replaced in your target
+#include <stdio.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stddef.h>
+#include <unistd.h>
+#include <sdkconfig.h>
+#include <esp_log.h>
+#include <assert.h>
+
+// compile time switches
+#define SPIFFS_TAG "SPIFFS"
+
+// Set generic spiffs debug output call.
+#if CONFIG_SPIFFS_DBG
+#define SPIFFS_DBG(...)             ESP_LOGD(SPIFFS_TAG, __VA_ARGS__)
+#else
+#define SPIFFS_DBG(...)
+#endif
+#if CONFIG_SPIFFS_API_DBG
+#define SPIFFS_API_DBG(...)         ESP_LOGD(SPIFFS_TAG, __VA_ARGS__)
+#else
+#define SPIFFS_API_DBG(...)
+#endif
+#if CONFIG_SPIFFS_DBG
+#define SPIFFS_GC_DBG(...)          ESP_LOGD(SPIFFS_TAG, __VA_ARGS__)
+#else
+#define SPIFFS_GC_DBG(...)
+#endif
+#if CONFIG_SPIFFS_CACHE_DBG
+#define SPIFFS_CACHE_DBG(...)       ESP_LOGD(SPIFFS_TAG, __VA_ARGS__)
+#else
+#define SPIFFS_CACHE_DBG(...)
+#endif
+#if CONFIG_SPIFFS_CHECK_DBG
+#define SPIFFS_CHECK_DBG(...)       ESP_LOGD(SPIFFS_TAG, __VA_ARGS__)
+#else
+#define SPIFFS_CHECK_DBG(...)
+#endif
+
+// needed types
+typedef int32_t s32_t;
+typedef uint32_t u32_t;
+typedef int16_t s16_t;
+typedef uint16_t u16_t;
+typedef int8_t s8_t;
+typedef uint8_t u8_t;
+
+struct spiffs_t;
+extern void spiffs_api_lock(struct spiffs_t *fs);
+extern void spiffs_api_unlock(struct spiffs_t *fs);
+
+// Defines spiffs debug print formatters
+// some general signed number
+#define _SPIPRIi   "%d"
+// address
+#define _SPIPRIad  "%08x"
+// block
+#define _SPIPRIbl  "%04x"
+// page
+#define _SPIPRIpg  "%04x"
+// span index
+#define _SPIPRIsp  "%04x"
+// file descriptor
+#define _SPIPRIfd  "%d"
+// file object id
+#define _SPIPRIid  "%04x"
+// file flags
+#define _SPIPRIfl  "%02x"
+
+
+// Enable/disable API functions to determine exact number of bytes
+// for filedescriptor and cache buffers. Once decided for a configuration,
+// this can be disabled to reduce flash.
+#define SPIFFS_BUFFER_HELP              0
+
+// Enables/disable memory read caching of nucleus file system operations.
+// If enabled, memory area must be provided for cache in SPIFFS_mount.
+#ifdef CONFIG_SPIFFS_CACHE
+#define SPIFFS_CACHE                (1)
+#else
+#define SPIFFS_CACHE                (0)
+#endif
+#if SPIFFS_CACHE
+// Enables memory write caching for file descriptors in hydrogen
+#ifdef CONFIG_SPIFFS_CACHE_WR
+#define SPIFFS_CACHE_WR             (1)
+#else
+#define SPIFFS_CACHE_WR             (0)
+#endif
+
+// Enable/disable statistics on caching. Debug/test purpose only.
+#ifdef CONFIG_SPIFFS_CACHE_STATS
+#define SPIFFS_CACHE_STATS          (1)
+#else
+#define SPIFFS_CACHE_STATS          (0)
+#endif
+#endif
+
+// Always check header of each accessed page to ensure consistent state.
+// If enabled it will increase number of reads, will increase flash.
+#ifdef CONFIG_SPIFFS_PAGE_CHECK
+#define SPIFFS_PAGE_CHECK           (1)
+#else
+#define SPIFFS_PAGE_CHECK           (0)
+#endif
+
+// Define maximum number of gc runs to perform to reach desired free pages.
+#define SPIFFS_GC_MAX_RUNS              CONFIG_SPIFFS_GC_MAX_RUNS
+
+// Enable/disable statistics on gc. Debug/test purpose only.
+#ifdef CONFIG_SPIFFS_GC_STATS
+#define SPIFFS_GC_STATS             (1)
+#else
+#define SPIFFS_GC_STATS             (0)
+#endif
+
+// Garbage collecting examines all pages in a block which and sums up
+// to a block score. Deleted pages normally gives positive score and
+// used pages normally gives a negative score (as these must be moved).
+// To have a fair wear-leveling, the erase age is also included in score,
+// whose factor normally is the most positive.
+// The larger the score, the more likely it is that the block will
+// picked for garbage collection.
+
+// Garbage collecting heuristics - weight used for deleted pages.
+#define SPIFFS_GC_HEUR_W_DELET          (5)
+// Garbage collecting heuristics - weight used for used pages.
+#define SPIFFS_GC_HEUR_W_USED           (-1)
+// Garbage collecting heuristics - weight used for time between
+// last erased and erase of this block.
+#define SPIFFS_GC_HEUR_W_ERASE_AGE      (50)
+
+// Object name maximum length. Note that this length include the
+// zero-termination character, meaning maximum string of characters
+// can at most be SPIFFS_OBJ_NAME_LEN - 1.
+#define SPIFFS_OBJ_NAME_LEN             (CONFIG_SPIFFS_OBJ_NAME_LEN)
+
+// Maximum length of the metadata associated with an object.
+// Setting to non-zero value enables metadata-related API but also
+// changes the on-disk format, so the change is not backward-compatible.
+//
+// Do note: the meta length must never exceed
+// logical_page_size - (SPIFFS_OBJ_NAME_LEN + SPIFFS_PAGE_EXTRA_SIZE)
+//
+// This is derived from following:
+// logical_page_size - (SPIFFS_OBJ_NAME_LEN + sizeof(spiffs_page_header) +
+// spiffs_object_ix_header fields + at least some LUT entries)
+#define SPIFFS_OBJ_META_LEN             (CONFIG_SPIFFS_META_LENGTH)
+#define SPIFFS_PAGE_EXTRA_SIZE          (64)
+_Static_assert(SPIFFS_OBJ_META_LEN + SPIFFS_OBJ_NAME_LEN + SPIFFS_PAGE_EXTRA_SIZE
+        <= CONFIG_SPIFFS_PAGE_SIZE, "SPIFFS_OBJ_META_LEN or SPIFFS_OBJ_NAME_LEN too long");
+
+// Size of buffer allocated on stack used when copying data.
+// Lower value generates more read/writes. No meaning having it bigger
+// than logical page size.
+#define SPIFFS_COPY_BUFFER_STACK        (256)
+
+// Enable this to have an identifiable spiffs filesystem. This will look for
+// a magic in all sectors to determine if this is a valid spiffs system or
+// not on mount point. If not, SPIFFS_format must be called prior to mounting
+// again.
+#ifdef CONFIG_SPIFFS_USE_MAGIC
+#define SPIFFS_USE_MAGIC                (1)
+#else
+#define SPIFFS_USE_MAGIC                (0)
+#endif
+
+#if SPIFFS_USE_MAGIC
+// Only valid when SPIFFS_USE_MAGIC is enabled. If SPIFFS_USE_MAGIC_LENGTH is
+// enabled, the magic will also be dependent on the length of the filesystem.
+// For example, a filesystem configured and formatted for 4 megabytes will not
+// be accepted for mounting with a configuration defining the filesystem as 2
+// megabytes.
+#ifdef CONFIG_SPIFFS_USE_MAGIC_LENGTH
+#define SPIFFS_USE_MAGIC_LENGTH         (1)
+#else
+#define SPIFFS_USE_MAGIC_LENGTH         (0)
+#endif
+#endif
+
+// SPIFFS_LOCK and SPIFFS_UNLOCK protects spiffs from reentrancy on api level
+// These should be defined on a multithreaded system
+
+// define this to enter a mutex if you're running on a multithreaded system
+#define SPIFFS_LOCK(fs)   spiffs_api_lock(fs)
+// define this to exit a mutex if you're running on a multithreaded system
+#define SPIFFS_UNLOCK(fs) spiffs_api_unlock(fs)
+
+// Enable if only one spiffs instance with constant configuration will exist
+// on the target. This will reduce calculations, flash and memory accesses.
+// Parts of configuration must be defined below instead of at time of mount.
+#define SPIFFS_SINGLETON 0
+
+// Enable this if your target needs aligned data for index tables
+#define SPIFFS_ALIGNED_OBJECT_INDEX_TABLES      0
+
+// Enable this if you want the HAL callbacks to be called with the spiffs struct
+#define SPIFFS_HAL_CALLBACK_EXTRA               1
+
+// Enable this if you want to add an integer offset to all file handles
+// (spiffs_file). This is useful if running multiple instances of spiffs on
+// same target, in order to recognise to what spiffs instance a file handle
+// belongs.
+// NB: This adds config field fh_ix_offset in the configuration struct when
+// mounting, which must be defined.
+#define SPIFFS_FILEHDL_OFFSET                   0
+
+// Enable this to compile a read only version of spiffs.
+// This will reduce binary size of spiffs. All code comprising modification
+// of the file system will not be compiled. Some config will be ignored.
+// HAL functions for erasing and writing to spi-flash may be null. Cache
+// can be disabled for even further binary size reduction (and ram savings).
+// Functions modifying the fs will return SPIFFS_ERR_RO_NOT_IMPL.
+// If the file system cannot be mounted due to aborted erase operation and
+// SPIFFS_USE_MAGIC is enabled, SPIFFS_ERR_RO_ABORTED_OPERATION will be
+// returned.
+// Might be useful for e.g. bootloaders and such.
+#define SPIFFS_READ_ONLY                        0
+
+// Enable this to add a temporal file cache using the fd buffer.
+// The effects of the cache is that SPIFFS_open will find the file faster in
+// certain cases. It will make it a lot easier for spiffs to find files
+// opened frequently, reducing number of readings from the spi flash for
+// finding those files.
+// This will grow each fd by 6 bytes. If your files are opened in patterns
+// with a degree of temporal locality, the system is optimized.
+// Examples can be letting spiffs serve web content, where one file is the css.
+// The css is accessed for each html file that is opened, meaning it is
+// accessed almost every second time a file is opened. Another example could be
+// a log file that is often opened, written, and closed.
+// The size of the cache is number of given file descriptors, as it piggybacks
+// on the fd update mechanism. The cache lives in the closed file descriptors.
+// When closed, the fd know the whereabouts of the file. Instead of forgetting
+// this, the temporal cache will keep handling updates to that file even if the
+// fd is closed. If the file is opened again, the location of the file is found
+// directly. If all available descriptors become opened, all cache memory is
+// lost.
+#define SPIFFS_TEMPORAL_FD_CACHE                1
+
+// Temporal file cache hit score. Each time a file is opened, all cached files
+// will lose one point. If the opened file is found in cache, that entry will
+// gain SPIFFS_TEMPORAL_CACHE_HIT_SCORE points. One can experiment with this
+// value for the specific access patterns of the application. However, it must
+// be between 1 (no gain for hitting a cached entry often) and 255.
+#define SPIFFS_TEMPORAL_CACHE_HIT_SCORE         4
+
+// Enable to be able to map object indices to memory.
+// This allows for faster and more deterministic reading if cases of reading
+// large files and when changing file offset by seeking around a lot.
+// When mapping a file's index, the file system will be scanned for index pages
+// and the info will be put in memory provided by user. When reading, the
+// memory map can be looked up instead of searching for index pages on the
+// medium. This way, user can trade memory against performance.
+// Whole, parts of, or future parts not being written yet can be mapped. The
+// memory array will be owned by spiffs and updated accordingly during garbage
+// collecting or when modifying the indices. The latter is invoked by when the
+// file is modified in some way. The index buffer is tied to the file
+// descriptor.
+#define SPIFFS_IX_MAP                           1
+
+// Set SPIFFS_TEST_VISUALISATION to non-zero to enable SPIFFS_vis function
+// in the api. This function will visualize all filesystem using given printf
+// function.
+#ifdef CONFIG_SPIFFS_TEST_VISUALISATION
+#define SPIFFS_TEST_VISUALISATION               1
+#else
+#define SPIFFS_TEST_VISUALISATION               0
+#endif
+#if SPIFFS_TEST_VISUALISATION
+#ifndef spiffs_printf
+#define spiffs_printf(...)                ESP_LOGD(SPIFFS_TAG, __VA_ARGS__)
+#endif
+// spiffs_printf argument for a free page
+#define SPIFFS_TEST_VIS_FREE_STR          "_"
+// spiffs_printf argument for a deleted page
+#define SPIFFS_TEST_VIS_DELE_STR          "/"
+// spiffs_printf argument for an index page for given object id
+#define SPIFFS_TEST_VIS_INDX_STR(id)      "i"
+// spiffs_printf argument for a data page for given object id
+#define SPIFFS_TEST_VIS_DATA_STR(id)      "d"
+#endif
+
+// Types depending on configuration such as the amount of flash bytes
+// given to spiffs file system in total (spiffs_file_system_size),
+// the logical block size (log_block_size), and the logical page size
+// (log_page_size)
+
+// Block index type. Make sure the size of this type can hold
+// the highest number of all blocks - i.e. spiffs_file_system_size / log_block_size
+typedef u16_t spiffs_block_ix;
+// Page index type. Make sure the size of this type can hold
+// the highest page number of all pages - i.e. spiffs_file_system_size / log_page_size
+typedef u16_t spiffs_page_ix;
+// Object id type - most significant bit is reserved for index flag. Make sure the
+// size of this type can hold the highest object id on a full system,
+// i.e. 2 + (spiffs_file_system_size / (2*log_page_size))*2
+typedef u16_t spiffs_obj_id;
+// Object span index type. Make sure the size of this type can
+// hold the largest possible span index on the system -
+// i.e. (spiffs_file_system_size / log_page_size) - 1
+typedef u16_t spiffs_span_ix;
+
+#endif /* SPIFFS_CONFIG_H_ */
diff --git a/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport.h b/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport.h
new file mode 100644
index 00000000000..5c7f2f77ed2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport.h
@@ -0,0 +1,346 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_TRANSPORT_H_
+#define _ESP_TRANSPORT_H_
+
+#include <esp_err.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+*  @brief Keep alive parameters structure
+*/
+typedef struct esp_transport_keepalive {
+    bool            keep_alive_enable;      /*!< Enable keep-alive timeout */
+    int             keep_alive_idle;        /*!< Keep-alive idle time (second) */
+    int             keep_alive_interval;    /*!< Keep-alive interval time (second) */
+    int             keep_alive_count;       /*!< Keep-alive packet retry send count */
+} esp_transport_keep_alive_t;
+
+typedef struct esp_transport_internal* esp_transport_list_handle_t;
+typedef struct esp_transport_item_t* esp_transport_handle_t;
+
+typedef int (*connect_func)(esp_transport_handle_t t, const char *host, int port, int timeout_ms);
+typedef int (*io_func)(esp_transport_handle_t t, const char *buffer, int len, int timeout_ms);
+typedef int (*io_read_func)(esp_transport_handle_t t, char *buffer, int len, int timeout_ms);
+typedef int (*trans_func)(esp_transport_handle_t t);
+typedef int (*poll_func)(esp_transport_handle_t t, int timeout_ms);
+typedef int (*connect_async_func)(esp_transport_handle_t t, const char *host, int port, int timeout_ms);
+typedef esp_transport_handle_t (*payload_transfer_func)(esp_transport_handle_t);
+
+typedef struct esp_tls_last_error* esp_tls_error_handle_t;
+
+/**
+ * @brief      Create transport list
+ *
+ * @return     A handle can hold all transports
+ */
+esp_transport_list_handle_t esp_transport_list_init(void);
+
+/**
+ * @brief      Cleanup and free all transports, include itself,
+ *             this function will invoke esp_transport_destroy of every transport have added this the list
+ *
+ * @param[in]  list  The list
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_FAIL
+ */
+esp_err_t esp_transport_list_destroy(esp_transport_list_handle_t list);
+
+/**
+ * @brief      Add a transport to the list, and define a scheme to indentify this transport in the list
+ *
+ * @param[in]  list    The list
+ * @param[in]  t       The Transport
+ * @param[in]  scheme  The scheme
+ *
+ * @return
+ *     - ESP_OK
+ */
+esp_err_t esp_transport_list_add(esp_transport_list_handle_t list, esp_transport_handle_t t, const char *scheme);
+
+/**
+ * @brief      This function will remove all transport from the list,
+ *             invoke esp_transport_destroy of every transport have added this the list
+ *
+ * @param[in]  list  The list
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t esp_transport_list_clean(esp_transport_list_handle_t list);
+
+/**
+ * @brief      Get the transport by scheme, which has been defined when calling function `esp_transport_list_add`
+ *
+ * @param[in]  list  The list
+ * @param[in]  tag   The tag
+ *
+ * @return     The transport handle
+ */
+esp_transport_handle_t esp_transport_list_get_transport(esp_transport_list_handle_t list, const char *scheme);
+
+/**
+ * @brief      Initialize a transport handle object
+ *
+ * @return     The transport handle
+ */
+esp_transport_handle_t esp_transport_init(void);
+
+/**
+ * @brief      Cleanup and free memory the transport
+ *
+ * @param[in]  t     The transport handle
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_FAIL
+ */
+esp_err_t esp_transport_destroy(esp_transport_handle_t t);
+
+/**
+ * @brief      Get default port number used by this transport
+ *
+ * @param[in]  t     The transport handle
+ *
+ * @return     the port number
+ */
+int esp_transport_get_default_port(esp_transport_handle_t t);
+
+/**
+ * @brief      Set default port number that can be used by this transport
+ *
+ * @param[in]  t     The transport handle
+ * @param[in]  port  The port number
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_FAIL
+ */
+esp_err_t esp_transport_set_default_port(esp_transport_handle_t t, int port);
+
+/**
+ * @brief      Transport connection function, to make a connection to server
+ *
+ * @param      t           The transport handle
+ * @param[in]  host        Hostname
+ * @param[in]  port        Port
+ * @param[in]  timeout_ms  The timeout milliseconds (-1 indicates wait forever)
+ *
+ * @return
+ * - socket for will use by this transport
+ * - (-1) if there are any errors, should check errno
+ */
+int esp_transport_connect(esp_transport_handle_t t, const char *host, int port, int timeout_ms);
+
+/**
+ * @brief      Non-blocking transport connection function, to make a connection to server
+ *
+ * @param      t           The transport handle
+ * @param[in]  host        Hostname
+ * @param[in]  port        Port
+ * @param[in]  timeout_ms  The timeout milliseconds (-1 indicates wait forever)
+ *
+ * @return
+ * - socket for will use by this transport
+ * - (-1) if there are any errors, should check errno
+ */
+int esp_transport_connect_async(esp_transport_handle_t t, const char *host, int port, int timeout_ms);
+
+/**
+ * @brief      Transport read function
+ *
+ * @param      t           The transport handle
+ * @param      buffer      The buffer
+ * @param[in]  len         The length
+ * @param[in]  timeout_ms  The timeout milliseconds (-1 indicates wait forever)
+ *
+ * @return
+ *  - Number of bytes was read
+ *  - (-1) if there are any errors, should check errno
+ */
+int esp_transport_read(esp_transport_handle_t t, char *buffer, int len, int timeout_ms);
+
+/**
+ * @brief      Poll the transport until readable or timeout
+ *
+ * @param[in]  t           The transport handle
+ * @param[in]  timeout_ms  The timeout milliseconds (-1 indicates wait forever)
+ *
+ * @return
+ *     - 0      Timeout
+ *     - (-1)   If there are any errors, should check errno
+ *     - other  The transport can read
+ */
+int esp_transport_poll_read(esp_transport_handle_t t, int timeout_ms);
+
+/**
+ * @brief      Transport write function
+ *
+ * @param      t           The transport handle
+ * @param      buffer      The buffer
+ * @param[in]  len         The length
+ * @param[in]  timeout_ms  The timeout milliseconds (-1 indicates wait forever)
+ *
+ * @return
+ *  - Number of bytes was written
+ *  - (-1) if there are any errors, should check errno
+ */
+int esp_transport_write(esp_transport_handle_t t, const char *buffer, int len, int timeout_ms);
+
+/**
+ * @brief      Poll the transport until writeable or timeout
+ *
+ * @param[in]  t           The transport handle
+ * @param[in]  timeout_ms  The timeout milliseconds (-1 indicates wait forever)
+ *
+ * @return
+ *     - 0      Timeout
+ *     - (-1)   If there are any errors, should check errno
+ *     - other  The transport can write
+ */
+int esp_transport_poll_write(esp_transport_handle_t t, int timeout_ms);
+
+/**
+ * @brief      Transport close
+ *
+ * @param      t     The transport handle
+ *
+ * @return
+ * - 0 if ok
+ * - (-1) if there are any errors, should check errno
+ */
+int esp_transport_close(esp_transport_handle_t t);
+
+/**
+ * @brief      Get user data context of this transport
+ *
+ * @param[in]  t        The transport handle
+ *
+ * @return     The user data context
+ */
+void *esp_transport_get_context_data(esp_transport_handle_t t);
+
+/**
+ * @brief      Get transport handle of underlying protocol
+ *             which can access this protocol payload directly
+ *             (used for receiving longer msg multiple times)
+ *
+ * @param[in]  t        The transport handle
+ *
+ * @return     Payload transport handle
+ */
+esp_transport_handle_t esp_transport_get_payload_transport_handle(esp_transport_handle_t t);
+
+/**
+ * @brief      Set the user context data for this transport
+ *
+ * @param[in]  t        The transport handle
+ * @param      data     The user data context
+ *
+ * @return
+ *     - ESP_OK
+ */
+esp_err_t esp_transport_set_context_data(esp_transport_handle_t t, void *data);
+
+/**
+ * @brief      Set transport functions for the transport handle
+ *
+ * @param[in]  t            The transport handle
+ * @param[in]  _connect     The connect function pointer
+ * @param[in]  _read        The read function pointer
+ * @param[in]  _write       The write function pointer
+ * @param[in]  _close       The close function pointer
+ * @param[in]  _poll_read   The poll read function pointer
+ * @param[in]  _poll_write  The poll write function pointer
+ * @param[in]  _destroy     The destroy function pointer
+ *
+ * @return
+ *     - ESP_OK
+ */
+esp_err_t esp_transport_set_func(esp_transport_handle_t t,
+                             connect_func _connect,
+                             io_read_func _read,
+                             io_func _write,
+                             trans_func _close,
+                             poll_func _poll_read,
+                             poll_func _poll_write,
+                             trans_func _destroy);
+
+
+/**
+ * @brief      Set transport functions for the transport handle
+ *
+ * @param[in]  t                    The transport handle
+ * @param[in]  _connect_async_func  The connect_async function pointer
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_FAIL
+ */
+esp_err_t esp_transport_set_async_connect_func(esp_transport_handle_t t, connect_async_func _connect_async_func);
+
+/**
+ * @brief      Set parent transport function to the handle
+ *
+ * @param[in]  t                    The transport handle
+ * @param[in]  _parent_transport    The underlying transport getter pointer
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_FAIL
+ */
+esp_err_t esp_transport_set_parent_transport_func(esp_transport_handle_t t, payload_transfer_func _parent_transport);
+
+/**
+ * @brief      Returns esp_tls error handle.
+ *             Warning: The returned pointer is valid only as long as esp_transport_handle_t exists. Once transport
+ *             handle gets destroyed, this value (esp_tls_error_handle_t) is freed automatically.
+ *
+ * @param[in]  A transport handle
+ *
+ * @return
+ *            - valid pointer of esp_error_handle_t
+ *            - NULL if invalid transport handle
+ */
+esp_tls_error_handle_t esp_transport_get_error_handle(esp_transport_handle_t t);
+
+/**
+ * @brief      Get and clear last captured socket errno
+ *
+ * Socket errno is internally stored whenever any of public facing API
+ * for reading, writing, polling or connection fails returning negative return code.
+ * The error code corresponds to the `SO_ERROR` value retrieved from the underlying
+ * transport socket using `getsockopt()` API. After reading the captured errno,
+ * the internal value is cleared to 0.
+ *
+ * @param[in] t The transport handle
+ *
+ * @return
+ *   - >=0 Last captured socket errno
+ *   - -1  Invalid transport handle or invalid transport's internal error storage
+ */
+int esp_transport_get_errno(esp_transport_handle_t t);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _ESP_TRANSPORT_ */
diff --git a/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport_ssl.h b/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport_ssl.h
new file mode 100644
index 00000000000..b31e5b4495a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport_ssl.h
@@ -0,0 +1,196 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_TRANSPORT_SSL_H_
+#define _ESP_TRANSPORT_SSL_H_
+
+#include "esp_transport.h"
+#include "esp_tls.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @brief       Create new SSL transport, the transport handle must be release esp_transport_destroy callback
+ *
+ * @return      the allocated esp_transport_handle_t, or NULL if the handle can not be allocated
+ */
+esp_transport_handle_t esp_transport_ssl_init(void);
+
+/**
+ * @brief      Set SSL certificate data (as PEM format).
+ *             Note that, this function stores the pointer to data, rather than making a copy.
+ *             So this data must remain valid until after the connection is cleaned up
+ *
+ * @param      t     ssl transport
+ * @param[in]  data  The pem data
+ * @param[in]  len   The length
+ */
+void esp_transport_ssl_set_cert_data(esp_transport_handle_t t, const char *data, int len);
+
+/**
+ * @brief      Set SSL certificate data (as DER format).
+ *             Note that, this function stores the pointer to data, rather than making a copy.
+ *             So this data must remain valid until after the connection is cleaned up
+ *
+ * @param      t     ssl transport
+ * @param[in]  data  The der data
+ * @param[in]  len   The length
+ */
+void esp_transport_ssl_set_cert_data_der(esp_transport_handle_t t, const char *data, int len);
+
+/**
+ * @brief      Enable the use of certification bundle for server verfication for
+ *             an SSL connection.
+ *             It must be first enabled in menuconfig.
+ *
+ * @param      t    ssl transport
+ * @param[in]  crt_bundle_attach    Function pointer to esp_crt_bundle_attach
+ */
+void esp_transport_ssl_crt_bundle_attach(esp_transport_handle_t t, esp_err_t ((*crt_bundle_attach)(void *conf)));
+
+/**
+ * @brief      Enable global CA store for SSL connection
+ *
+ * @param      t    ssl transport
+ */
+void esp_transport_ssl_enable_global_ca_store(esp_transport_handle_t t);
+
+/**
+ * @brief      Set SSL client certificate data for mutual authentication (as PEM format).
+ *             Note that, this function stores the pointer to data, rather than making a copy.
+ *             So this data must remain valid until after the connection is cleaned up
+ *
+ * @param      t     ssl transport
+ * @param[in]  data  The pem data
+ * @param[in]  len   The length
+ */
+void esp_transport_ssl_set_client_cert_data(esp_transport_handle_t t, const char *data, int len);
+
+/**
+ * @brief      Set SSL client certificate data for mutual authentication (as DER format).
+ *             Note that, this function stores the pointer to data, rather than making a copy.
+ *             So this data must remain valid until after the connection is cleaned up
+ *
+ * @param      t     ssl transport
+ * @param[in]  data  The der data
+ * @param[in]  len   The length
+ */
+void esp_transport_ssl_set_client_cert_data_der(esp_transport_handle_t t, const char *data, int len);
+
+/**
+ * @brief      Set SSL client key data for mutual authentication (as PEM format).
+ *             Note that, this function stores the pointer to data, rather than making a copy.
+ *             So this data must remain valid until after the connection is cleaned up
+ *
+ * @param      t     ssl transport
+ * @param[in]  data  The pem data
+ * @param[in]  len   The length
+ */
+void esp_transport_ssl_set_client_key_data(esp_transport_handle_t t, const char *data, int len);
+
+/**
+ * @brief      Set SSL client key password if the key is password protected. The configured
+ *             password is passed to the underlying TLS stack to decrypt the client key
+ *
+ * @param      t     ssl transport
+ * @param[in]  password  Pointer to the password
+ * @param[in]  password_len   Password length
+ */
+void esp_transport_ssl_set_client_key_password(esp_transport_handle_t t, const char *password, int password_len);
+
+/**
+ * @brief      Set SSL client key data for mutual authentication (as DER format).
+ *             Note that, this function stores the pointer to data, rather than making a copy.
+ *             So this data must remain valid until after the connection is cleaned up
+ *
+ * @param      t     ssl transport
+ * @param[in]  data  The der data
+ * @param[in]  len   The length
+ */
+void esp_transport_ssl_set_client_key_data_der(esp_transport_handle_t t, const char *data, int len);
+
+/**
+ * @brief      Set the list of supported application protocols to be used with ALPN.
+ *             Note that, this function stores the pointer to data, rather than making a copy.
+ *             So this data must remain valid until after the connection is cleaned up
+ *
+ * @param      t            ssl transport
+ * @param[in]  alpn_porot   The list of ALPN protocols, the last entry must be NULL
+ */
+void esp_transport_ssl_set_alpn_protocol(esp_transport_handle_t t, const char **alpn_protos);
+
+/**
+ * @brief      Skip validation of certificate's common name field
+ *
+ * @note       Skipping CN validation is not recommended
+ *
+ * @param      t     ssl transport
+ */
+void esp_transport_ssl_skip_common_name_check(esp_transport_handle_t t);
+
+/**
+ * @brief      Set the ssl context to use secure element (atecc608a) for client(device) private key and certificate
+ *
+ * @note       Recommended to be used with ESP32-WROOM-32SE (which has inbuilt ATECC608A a.k.a Secure Element)
+ *
+ * @param      t     ssl transport
+ */
+void esp_transport_ssl_use_secure_element(esp_transport_handle_t t);
+
+/**
+ * @brief      Set the ds_data handle in ssl context.(used for the digital signature operation)
+ *
+ * @param      t        ssl transport
+ *             ds_data  the handle for ds data params
+ */
+void esp_transport_ssl_set_ds_data(esp_transport_handle_t t, void *ds_data);
+
+/**
+ * @brief      Set PSK key and hint for PSK server/client verification in esp-tls component.
+ *             Important notes:
+ *             - This function stores the pointer to data, rather than making a copy.
+ *             So this data must remain valid until after the connection is cleaned up
+ *             - ESP_TLS_PSK_VERIFICATION config option must be enabled in menuconfig
+ *             - certificate verification takes priority so it must not be configured
+ *             to enable PSK method.
+ *
+ * @param      t             ssl transport
+ * @param[in]  psk_hint_key  psk key and hint structure defined in esp_tls.h
+ */
+void esp_transport_ssl_set_psk_key_hint(esp_transport_handle_t t, const psk_hint_key_t* psk_hint_key);
+
+/**
+ * @brief      Set keep-alive status in current ssl context
+ *
+ * @param[in]  t               ssl transport
+ * @param[in]  keep_alive_cfg  The handle for keep-alive configuration
+ */
+void esp_transport_ssl_set_keep_alive(esp_transport_handle_t t, esp_transport_keep_alive_t *keep_alive_cfg);
+
+/**
+ * @brief      Set name of interface that socket can be binded on
+ *             So the data can transport on this interface
+ *
+ * @param[in]  t        The transport handle
+ * @param[in]  if_name  The interface name
+ */
+void esp_transport_ssl_set_interface_name(esp_transport_handle_t t, struct ifreq *if_name);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _ESP_TRANSPORT_SSL_H_ */
diff --git a/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport_tcp.h b/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport_tcp.h
new file mode 100644
index 00000000000..6941820f0e7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport_tcp.h
@@ -0,0 +1,55 @@
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_TRANSPORT_TCP_H_
+#define _ESP_TRANSPORT_TCP_H_
+
+#include "esp_transport.h"
+#include <sys/socket.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief      Set TCP keep-alive configuration
+ *
+ * @param[in]  t               The transport handle
+ * @param[in]  keep_alive_cfg  The keep-alive config
+ *
+ */
+void esp_transport_tcp_set_keep_alive(esp_transport_handle_t t, esp_transport_keep_alive_t *keep_alive_cfg);
+
+/**
+ * @brief      Set name of interface that socket can be binded on
+ *             So the data can transport on this interface
+ *
+ * @param[in]  t        The transport handle
+ * @param[in]  if_name  The interface name
+ */
+void esp_transport_tcp_set_interface_name(esp_transport_handle_t t, struct ifreq *if_name);
+
+/**
+ * @brief      Create TCP transport, the transport handle must be release esp_transport_destroy callback
+ *
+ * @return  the allocated esp_transport_handle_t, or NULL if the handle can not be allocated
+ */
+esp_transport_handle_t esp_transport_tcp_init(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_TRANSPORT_TCP_H_ */
diff --git a/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport_ws.h b/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport_ws.h
new file mode 100644
index 00000000000..338b3fcd019
--- /dev/null
+++ b/tools/sdk/esp32s3/include/tcp_transport/include/esp_transport_ws.h
@@ -0,0 +1,169 @@
+/*
+ * This file is subject to the terms and conditions defined in
+ * file 'LICENSE', which is part of this source code package.
+ * Tuan PM <tuanpm at live dot com>
+ */
+
+#ifndef _ESP_TRANSPORT_WS_H_
+#define _ESP_TRANSPORT_WS_H_
+
+#include "esp_transport.h"
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum ws_transport_opcodes {
+    WS_TRANSPORT_OPCODES_CONT =  0x00,
+    WS_TRANSPORT_OPCODES_TEXT =  0x01,
+    WS_TRANSPORT_OPCODES_BINARY = 0x02,
+    WS_TRANSPORT_OPCODES_CLOSE = 0x08,
+    WS_TRANSPORT_OPCODES_PING = 0x09,
+    WS_TRANSPORT_OPCODES_PONG = 0x0a,
+    WS_TRANSPORT_OPCODES_FIN = 0x80,
+    WS_TRANSPORT_OPCODES_NONE = 0x100,   /*!< not a valid opcode to indicate no message previously received
+                                          * from the API esp_transport_ws_get_read_opcode() */
+} ws_transport_opcodes_t;
+
+/**
+ * WS transport configuration structure
+ */
+typedef struct {
+    const char *ws_path;                    /*!< HTTP path to update protocol to websocket */
+    const char *sub_protocol;               /*!< WS subprotocol */
+    const char *user_agent;                 /*!< WS user agent */
+    const char *headers;                    /*!< WS additional headers */
+    bool        propagate_control_frames;   /*!< If true, control frames are passed to the reader
+                                             *   If false, only user frames are propagated, control frames are handled
+                                             *   automatically during read operations
+                                             */
+} esp_transport_ws_config_t;
+
+/**
+ * @brief      Create web socket transport
+ *
+ * @return
+ *  - transport
+ *  - NULL
+ */
+esp_transport_handle_t esp_transport_ws_init(esp_transport_handle_t parent_handle);
+
+/**
+ * @brief       Set HTTP path to update protocol to websocket
+ *
+ * @param t     websocket transport handle
+ * @param path  The HTTP Path
+ */
+void esp_transport_ws_set_path(esp_transport_handle_t t, const char *path);
+
+/**
+ * @brief               Set websocket sub protocol header
+ *
+ * @param t             websocket transport handle
+ * @param sub_protocol  Sub protocol string
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes
+ */
+esp_err_t esp_transport_ws_set_subprotocol(esp_transport_handle_t t, const char *sub_protocol);
+
+/**
+ * @brief               Set websocket user-agent header
+ *
+ * @param t             websocket transport handle
+ * @param sub_protocol  user-agent string
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes
+ */
+esp_err_t esp_transport_ws_set_user_agent(esp_transport_handle_t t, const char *user_agent);
+
+/**
+ * @brief               Set websocket additional headers
+ *
+ * @param t             websocket transport handle
+ * @param sub_protocol  additional header strings each terminated with \r\n
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes
+ */
+esp_err_t esp_transport_ws_set_headers(esp_transport_handle_t t, const char *headers);
+
+/**
+ * @brief               Set websocket transport parameters
+ *
+ * @param t             websocket transport handle
+ * @param config        pointer to websocket config structure
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes
+ */
+esp_err_t esp_transport_ws_set_config(esp_transport_handle_t t, const esp_transport_ws_config_t *config);
+
+/**
+ * @brief               Sends websocket raw message with custom opcode and payload
+ *
+ * Note that generic esp_transport_write for ws handle sends
+ * binary massages by default if size is > 0 and
+ * ping message if message size is set to 0.
+ * This API is provided to support explicit messages with arbitrary opcode,
+ * should it be PING, PONG or TEXT message with arbitrary data.
+ *
+ * @param[in]  t           Websocket transport handle
+ * @param[in]  opcode      ws operation code
+ * @param[in]  buffer      The buffer
+ * @param[in]  len         The length
+ * @param[in]  timeout_ms  The timeout milliseconds (-1 indicates block forever)
+ *
+ * @return
+ *  - Number of bytes was written
+ *  - (-1) if there are any errors, should check errno
+ */
+int esp_transport_ws_send_raw(esp_transport_handle_t t, ws_transport_opcodes_t opcode, const char *b, int len, int timeout_ms);
+
+/**
+ * @brief               Returns websocket op-code for last received data
+ *
+ * @param t             websocket transport handle
+ *
+ * @return
+ *      - Received op-code as enum
+ */
+ws_transport_opcodes_t esp_transport_ws_get_read_opcode(esp_transport_handle_t t);
+
+/**
+ * @brief               Returns payload length of the last received data
+ *
+ * @param t             websocket transport handle
+ *
+ * @return
+ *      - Number of bytes in the payload
+ */
+int esp_transport_ws_get_read_payload_len(esp_transport_handle_t t);
+
+/**
+ * @brief               Polls the active connection for termination
+ *
+ * This API is typically used by the client to wait for clean connection closure
+ * by websocket server
+ *
+ * @param t             Websocket transport handle
+ * @param[in] timeout_ms The timeout milliseconds
+ *
+ * @return
+ *      0 - no activity on read and error socket descriptor within timeout
+ *      1 - Success: either connection terminated by FIN or the most common RST err codes
+ *      -1 - Failure: Unexpected error code or socket is normally readable
+ */
+int esp_transport_ws_poll_connection_closed(esp_transport_handle_t t, int timeout_ms);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_TRANSPORT_WS_H_ */
diff --git a/tools/sdk/esp32s3/include/tcpip_adapter/include/tcpip_adapter.h b/tools/sdk/esp32s3/include/tcpip_adapter/include/tcpip_adapter.h
new file mode 100644
index 00000000000..aab4a8abeb1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/tcpip_adapter/include/tcpip_adapter.h
@@ -0,0 +1,269 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ESP_NETIF_SUPPRESS_LEGACY_WARNING_
+#warning "This header is deprecated, please use new network related API in esp_netif.h"
+#include "esp_netif.h"
+#endif
+
+#ifndef _TCPIP_ADAPTER_H_
+#define _TCPIP_ADAPTER_H_
+
+#include "esp_netif.h"
+
+#include "tcpip_adapter_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief tcpip adapter legacy init. It is used only to set the compatibility mode of esp-netif, which
+ * will enable backward compatibility of esp-netif.
+ */
+void tcpip_adapter_init(void)  __attribute__ ((deprecated));
+
+/**
+ * @brief Compatiblity mode: convert the esp-netif handle to tcpip_adapter legacy interface enum
+ *
+ * @param esp_netif
+ *
+ * @return corresponding interface if valid or known esp_netif provided, TCPIP_ADAPTER_IF_MAX otherwise
+ */
+tcpip_adapter_if_t tcpip_adapter_if_from_esp_netif(esp_netif_t *esp_netif);
+
+/**
+ * @brief Translates to esp_netif_get_ip_info
+ *
+ * @param tcpip_if Interface type corresponding to appropriate instance of esp-netif
+ * @param ip_info See esp_netif_get_ip_info
+ * @return See esp_netif_get_ip_info
+ */
+esp_err_t tcpip_adapter_get_ip_info(tcpip_adapter_if_t tcpip_if, tcpip_adapter_ip_info_t *ip_info);
+
+#if CONFIG_LWIP_IPV6
+/**
+ * @brief Translates to esp_netif_get_ip6_linklocal
+ *
+ * @param tcpip_if  Interface type corresponding to appropriate instance of esp-netif
+ * @param if_ip6 See esp_netif_get_ip6_linklocal
+ * @return See esp_netif_get_ip6_linklocal
+ */
+esp_err_t tcpip_adapter_get_ip6_linklocal(tcpip_adapter_if_t tcpip_if, ip6_addr_t *if_ip6);
+
+/**
+ * @brief Translates to esp_netif_get_ip6_global
+ *
+ * @param tcpip_if  Interface type corresponding to appropriate instance of esp-netif
+ * @param if_ip6 See esp_netif_get_ip6_global
+ * @return See esp_netif_get_ip6_global
+ */
+esp_err_t tcpip_adapter_get_ip6_global(tcpip_adapter_if_t tcpip_if, ip6_addr_t *if_ip6);
+#endif
+
+/**
+ * @brief`Translates to esp_netif_dhcpc_get_status
+ * @param tcpip_if Interface type corresponding to appropriate instance of esp-netif
+ * @param status
+ * @return See esp_netif_dhcpc_get_status
+ */
+esp_err_t tcpip_adapter_dhcpc_get_status(tcpip_adapter_if_t tcpip_if, tcpip_adapter_dhcp_status_t *status);
+
+/**
+ * @brief Translates to esp_netif_is_netif_up
+ * @param tcpip_if Interface type corresponding to appropriate instance of esp-netif
+ * @return see esp_netif_is_netif_up
+ */
+bool tcpip_adapter_is_netif_up(tcpip_adapter_if_t tcpip_if);
+
+/**
+ * @brief Translates to esp_netif_get_netif
+ * @param tcpip_if Interface type corresponding to appropriate instance of esp-netif
+ * @param netif
+ * @return see esp_netif_get_netif
+ */
+esp_err_t tcpip_adapter_get_netif(tcpip_adapter_if_t tcpip_if, void ** netif);
+
+#if CONFIG_LWIP_IPV6
+/**
+ * @brief Translates to esp_netif_create_ip6_linklocal
+ * @param tcpip_if Interface type corresponding to appropriate instance of esp-netif
+ * @return see esp_netif_create_ip6_linklocal
+ */
+esp_err_t tcpip_adapter_create_ip6_linklocal(tcpip_adapter_if_t tcpip_if);
+#endif
+
+/**
+ * @brief Compatible version of setting ethernet default handlers
+ * @note Compatible version of wifi handlers are provided in a separate header,
+ * as this used to be called privately from wifi_init()
+ * @return ESP_OK on success
+ */
+esp_err_t tcpip_adapter_set_default_eth_handlers(void);
+
+/**
+ * @brief Compatible version of network stack input function. Translates to esp_netif_receive()
+ */
+esp_err_t tcpip_adapter_eth_input(void *buffer, uint16_t len, void *eb);
+
+/**
+ * @brief Compatible version of network stack input function. Translates to esp_netif_receive()
+ */
+esp_err_t tcpip_adapter_sta_input(void *buffer, uint16_t len, void *eb);
+
+/**
+ * @brief Compatible version of network stack input function. Translates to esp_netif_receive()
+ */
+esp_err_t tcpip_adapter_ap_input(void *buffer, uint16_t len, void *eb);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API to clear default WIFI handlers
+ * @return ESP_OK on success
+ */
+esp_err_t tcpip_adapter_clear_default_wifi_handlers(void);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API to clear default ethernet handlers
+ * @return ESP_OK on success
+ */
+esp_err_t tcpip_adapter_clear_default_eth_handlers(void);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_dhcps_stop
+*/
+esp_err_t tcpip_adapter_dhcps_stop(tcpip_adapter_if_t tcpip_if);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_dhcpc_stop
+*/
+esp_err_t tcpip_adapter_dhcpc_stop(tcpip_adapter_if_t tcpip_if);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_dhcps_start
+*/
+esp_err_t tcpip_adapter_dhcps_start(tcpip_adapter_if_t tcpip_if);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_dhcpc_start
+*/
+esp_err_t tcpip_adapter_dhcpc_start(tcpip_adapter_if_t tcpip_if);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_dhcps_get_status
+*/
+esp_err_t tcpip_adapter_dhcps_get_status(tcpip_adapter_if_t tcpip_if, tcpip_adapter_dhcp_status_t *status);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_dhcps_option
+*/
+esp_err_t tcpip_adapter_dhcps_option(tcpip_adapter_dhcp_option_mode_t opt_op, tcpip_adapter_dhcp_option_id_t opt_id, void *opt_val, uint32_t opt_len);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_dhcpc_option
+*/
+esp_err_t tcpip_adapter_dhcpc_option(tcpip_adapter_dhcp_option_mode_t opt_op, tcpip_adapter_dhcp_option_id_t opt_id, void *opt_val, uint32_t opt_len);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_set_ip_info
+*/
+esp_err_t tcpip_adapter_set_ip_info(tcpip_adapter_if_t tcpip_if, const tcpip_adapter_ip_info_t *ip_info);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_get_dns_info
+*/
+esp_err_t tcpip_adapter_get_dns_info(tcpip_adapter_if_t tcpip_if, tcpip_adapter_dns_type_t type, tcpip_adapter_dns_info_t *dns);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_set_dns_info
+*/
+esp_err_t tcpip_adapter_set_dns_info(tcpip_adapter_if_t tcpip_if, tcpip_adapter_dns_type_t type, tcpip_adapter_dns_info_t *dns);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_get_netif_impl_index
+*/
+int tcpip_adapter_get_netif_index(tcpip_adapter_if_t tcpip_if);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_get_sta_list
+*/
+esp_err_t tcpip_adapter_get_sta_list(const wifi_sta_list_t *wifi_sta_list, tcpip_adapter_sta_list_t *tcpip_sta_list);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_action_start for default ethernet
+*/
+esp_err_t tcpip_adapter_eth_start(uint8_t *mac, tcpip_adapter_ip_info_t *ip_info, void *args);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_action_start for default station
+*/
+esp_err_t tcpip_adapter_sta_start(uint8_t *mac, tcpip_adapter_ip_info_t *ip_info);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_action_start for default softAP
+*/
+esp_err_t tcpip_adapter_ap_start(uint8_t *mac, tcpip_adapter_ip_info_t *ip_info);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_action_stop
+*/
+esp_err_t tcpip_adapter_stop(tcpip_adapter_if_t tcpip_if);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_up
+*/
+esp_err_t tcpip_adapter_up(tcpip_adapter_if_t tcpip_if);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_down
+*/
+esp_err_t tcpip_adapter_down(tcpip_adapter_if_t tcpip_if);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_get_old_ip_info
+*/
+esp_err_t tcpip_adapter_get_old_ip_info(tcpip_adapter_if_t tcpip_if, tcpip_adapter_ip_info_t *ip_info);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_set_old_ip_info
+*/
+esp_err_t tcpip_adapter_set_old_ip_info(tcpip_adapter_if_t tcpip_if, const tcpip_adapter_ip_info_t *ip_info);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_get_handle_from_netif_impl
+*/
+esp_interface_t tcpip_adapter_get_esp_if(void *dev);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_set_hostname
+*/
+esp_err_t tcpip_adapter_set_hostname(tcpip_adapter_if_t tcpip_if, const char *hostname);
+
+/**
+ * @brief Compatible version of former tcpip_adapter API of esp_netif_get_hostname
+*/
+esp_err_t tcpip_adapter_get_hostname(tcpip_adapter_if_t tcpip_if, const char **hostname);
+
+/**
+ * @brief This function is called from wifi_init to assure backward compatibility mode
+ * of tcpip_adapter. In case of legacy use, default instances of ap and sta
+ * are created and handlers are registered
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t tcpip_adapter_set_default_wifi_handlers(void);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif //_TCPIP_ADAPTER_H_
diff --git a/tools/sdk/esp32s3/include/tcpip_adapter/include/tcpip_adapter_compatible/tcpip_adapter_compat.h b/tools/sdk/esp32s3/include/tcpip_adapter/include/tcpip_adapter_compatible/tcpip_adapter_compat.h
new file mode 100644
index 00000000000..2ccf4a4837f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/tcpip_adapter/include/tcpip_adapter_compatible/tcpip_adapter_compat.h
@@ -0,0 +1,65 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _TCPIP_ADAPTER_COMPAT_H_
+#define _TCPIP_ADAPTER_COMPAT_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief This function is called from ethernet driver init code to facilitate
+ * autostart fo the driver in backward compatible tcpip_adapter way
+ *
+ * @note This api is provided in a separate header, which is included internally only (from wifi driver)
+ * rather then user initialization code.
+ *
+ * @param[in] h Handle to the ethernet driver
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t tcpip_adapter_compat_start_eth(void* h);
+
+/**
+ * @brief This function is called from wifi_init to assure backward compatibility mode
+ * of tcpip_adapter. In case of legacy use, default instances of ap and sta
+ * are created and handlers are registered
+ *
+ * @note This API is provided in a separate header, which is included internally only (from wifi_init)
+ * rather then user initialization code. At this same time this API is also a public API of former tcqpip_adapter
+ * and thus provided also in tcpip_adapter.h
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t tcpip_adapter_set_default_wifi_handlers(void);
+
+/**
+ * @brief This function is called from wifi_init to assure backward compatibility mode
+ * of tcpip_adapter. In case of legacy use, default instances of ap and sta
+ * are destroyed and handlers are unregistered
+ *
+ * @note This API is provided in a separate header, which is included internally only (from wifi_init)
+ * rather then user initialization code. At this same time this API is also a public API of former tcqpip_adapter
+ * and thus provided also in tcpip_adapter.h
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t tcpip_adapter_clear_default_wifi_handlers(void);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif //_TCPIP_ADAPTER_COMPAT_H_
diff --git a/tools/sdk/esp32s3/include/tcpip_adapter/include/tcpip_adapter_types.h b/tools/sdk/esp32s3/include/tcpip_adapter/include/tcpip_adapter_types.h
new file mode 100644
index 00000000000..3442b691d1f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/tcpip_adapter/include/tcpip_adapter_types.h
@@ -0,0 +1,82 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _TCPIP_ADAPTER_TYPES_H_
+#define _TCPIP_ADAPTER_TYPES_H_
+
+#include "lwip/ip_addr.h"
+#include "dhcpserver/dhcpserver.h"
+#include "esp_netif_sta_list.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//
+// Define compatible types if tcpip_adapter interface used
+//
+#define TCPIP_ADAPTER_DHCP_STARTED ESP_NETIF_DHCP_STARTED
+#define TCPIP_ADAPTER_DHCP_STOPPED ESP_NETIF_DHCP_STOPPED
+#define TCPIP_ADAPTER_DHCP_INIT    ESP_NETIF_DHCP_INIT
+#define TCPIP_ADAPTER_OP_SET       ESP_NETIF_OP_SET
+#define TCPIP_ADAPTER_OP_GET       ESP_NETIF_OP_GET
+#define TCPIP_ADAPTER_DOMAIN_NAME_SERVER             ESP_NETIF_DOMAIN_NAME_SERVER
+#define TCPIP_ADAPTER_ROUTER_SOLICITATION_ADDRESS    ESP_NETIF_ROUTER_SOLICITATION_ADDRESS
+#define TCPIP_ADAPTER_REQUESTED_IP_ADDRESS           ESP_NETIF_REQUESTED_IP_ADDRESS
+#define TCPIP_ADAPTER_IP_ADDRESS_LEASE_TIME          ESP_NETIF_IP_ADDRESS_LEASE_TIME
+#define TCPIP_ADAPTER_IP_REQUEST_RETRY_TIME          ESP_NETIF_IP_REQUEST_RETRY_TIME
+
+/** @brief Legacy error code definitions
+ *
+ */
+#define ESP_ERR_TCPIP_ADAPTER_INVALID_PARAMS        ESP_ERR_ESP_NETIF_INVALID_PARAMS
+#define ESP_ERR_TCPIP_ADAPTER_IF_NOT_READY          ESP_ERR_ESP_NETIF_IF_NOT_READY
+#define ESP_ERR_TCPIP_ADAPTER_DHCPC_START_FAILED    ESP_ERR_ESP_NETIF_DHCPC_START_FAILED
+#define ESP_ERR_TCPIP_ADAPTER_DHCP_ALREADY_STARTED  ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED
+#define ESP_ERR_TCPIP_ADAPTER_DHCP_ALREADY_STOPPED  ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED
+#define ESP_ERR_TCPIP_ADAPTER_NO_MEM                ESP_ERR_ESP_NETIF_NO_MEM
+#define ESP_ERR_TCPIP_ADAPTER_DHCP_NOT_STOPPED      ESP_ERR_ESP_NETIF_DHCP_NOT_STOPPED
+
+typedef enum {
+    TCPIP_ADAPTER_IF_STA = 0,     /**< Wi-Fi STA (station) interface */
+    TCPIP_ADAPTER_IF_AP,          /**< Wi-Fi soft-AP interface */
+    TCPIP_ADAPTER_IF_ETH,         /**< Ethernet interface */
+    TCPIP_ADAPTER_IF_TEST,        /**< tcpip stack test interface */
+    TCPIP_ADAPTER_IF_MAX
+} tcpip_adapter_if_t;
+
+/** @brief legacy ip_info type
+ */
+typedef struct {
+    ip4_addr_t ip;      /**< Interface IPV4 address */
+    ip4_addr_t netmask; /**< Interface IPV4 netmask */
+    ip4_addr_t gw;      /**< Interface IPV4 gateway address */
+} tcpip_adapter_ip_info_t;
+
+/** @brief legacy typedefs
+ */
+typedef esp_netif_dhcp_status_t tcpip_adapter_dhcp_status_t;
+typedef dhcps_lease_t tcpip_adapter_dhcps_lease_t;
+typedef esp_netif_dhcp_option_mode_t tcpip_adapter_dhcp_option_mode_t;
+typedef esp_netif_dhcp_option_id_t tcpip_adapter_dhcp_option_id_t;
+typedef esp_netif_dns_type_t tcpip_adapter_dns_type_t;
+typedef esp_netif_dns_info_t tcpip_adapter_dns_info_t;
+typedef esp_netif_sta_list_t tcpip_adapter_sta_list_t;
+typedef esp_netif_sta_info_t tcpip_adapter_sta_info_t;
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif // _TCPIP_ADAPTER_TYPES_H_
diff --git a/tools/sdk/esp32s3/include/ulp/include/esp32/ulp.h b/tools/sdk/esp32s3/include/ulp/include/esp32/ulp.h
new file mode 100644
index 00000000000..e5d673a23cd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/ulp/include/esp32/ulp.h
@@ -0,0 +1,1047 @@
+// Copyright 2016-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stddef.h>
+#include <stdlib.h>
+#include "esp_err.h"
+#include "soc/soc.h"
+#include "ulp_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ULP_FSM_PREPARE_SLEEP_CYCLES 2    /*!< Cycles spent by FSM preparing ULP for sleep */
+#define ULP_FSM_WAKEUP_SLEEP_CYCLES  2    /*!< Cycles spent by FSM waking up ULP from sleep */
+
+/**
+ * @defgroup ulp_registers ULP coprocessor registers
+ * @{
+ */
+
+
+#define R0 0    /*!< general purpose register 0 */
+#define R1 1    /*!< general purpose register 1 */
+#define R2 2    /*!< general purpose register 2 */
+#define R3 3    /*!< general purpose register 3 */
+/**@}*/
+
+/** @defgroup ulp_opcodes ULP coprocessor opcodes, sub opcodes, and various modifiers/flags
+ *
+ * These definitions are not intended to be used directly.
+ * They are used in definitions of instructions later on.
+ *
+ * @{
+ */
+
+#define OPCODE_WR_REG 1         /*!< Instruction: write peripheral register (RTC_CNTL/RTC_IO/SARADC) */
+
+#define OPCODE_RD_REG 2         /*!< Instruction: read peripheral register (RTC_CNTL/RTC_IO/SARADC) */
+
+#define RD_REG_PERIPH_RTC_CNTL 0    /*!< Identifier of RTC_CNTL peripheral for RD_REG and WR_REG instructions */
+#define RD_REG_PERIPH_RTC_IO   1    /*!< Identifier of RTC_IO peripheral for RD_REG and WR_REG instructions */
+#define RD_REG_PERIPH_SENS     2    /*!< Identifier of SARADC peripheral for RD_REG and WR_REG instructions */
+#define RD_REG_PERIPH_RTC_I2C  3    /*!< Identifier of RTC_I2C peripheral for RD_REG and WR_REG instructions */
+
+#define OPCODE_I2C 3            /*!< Instruction: read/write I2C */
+#define SUB_OPCODE_I2C_RD 0     /*!< I2C read */
+#define SUB_OPCODE_I2C_WR 1     /*!< I2C write */
+
+#define OPCODE_DELAY 4          /*!< Instruction: delay (nop) for a given number of cycles */
+
+#define OPCODE_ADC 5            /*!< Instruction: SAR ADC measurement */
+
+#define OPCODE_ST 6             /*!< Instruction: store indirect to RTC memory */
+#define SUB_OPCODE_ST 4         /*!< Store 32 bits, 16 MSBs contain PC, 16 LSBs contain value from source register */
+
+#define OPCODE_ALU 7            /*!< Arithmetic instructions */
+#define SUB_OPCODE_ALU_REG 0    /*!< Arithmetic instruction, both source values are in register */
+#define SUB_OPCODE_ALU_IMM 1    /*!< Arithmetic instruction, one source value is an immediate */
+#define SUB_OPCODE_ALU_CNT 2    /*!< Arithmetic instruction, stage counter and an immediate */
+#define ALU_SEL_ADD 0           /*!< Addition */
+#define ALU_SEL_SUB 1           /*!< Subtraction */
+#define ALU_SEL_AND 2           /*!< Logical AND */
+#define ALU_SEL_OR  3           /*!< Logical OR */
+#define ALU_SEL_MOV 4           /*!< Copy value (immediate to destination register or source register to destination register */
+#define ALU_SEL_LSH 5           /*!< Shift left by given number of bits */
+#define ALU_SEL_RSH 6           /*!< Shift right by given number of bits */
+#define ALU_SEL_SINC  0         /*!< Increment the stage counter */
+#define ALU_SEL_SDEC  1         /*!< Decrement the stage counter */
+#define ALU_SEL_SRST  2         /*!< Reset the stage counter */
+
+#define OPCODE_BRANCH 8         /*!< Branch instructions */
+#define SUB_OPCODE_BX  0        /*!< Branch to absolute PC (immediate or in register) */
+#define SUB_OPCODE_BR  1        /*!< Branch to relative PC, conditional on R0 */
+#define SUB_OPCODE_BS  2        /*!< Branch to relative PC, conditional on the stage counter */
+#define BX_JUMP_TYPE_DIRECT 0   /*!< Unconditional jump */
+#define BX_JUMP_TYPE_ZERO 1     /*!< Branch if last ALU result is zero */
+#define BX_JUMP_TYPE_OVF 2      /*!< Branch if last ALU operation caused and overflow */
+#define SUB_OPCODE_B  1         /*!< Branch to a relative offset */
+#define B_CMP_L 0               /*!< Branch if R0 is less than an immediate */
+#define B_CMP_GE 1              /*!< Branch if R0 is greater than or equal to an immediate */
+#define JUMPS_LT 0              /*!< Branch if the stage counter < */
+#define JUMPS_GE 1              /*!< Branch if the stage counter >= */
+#define JUMPS_LE 2              /*!< Branch if the stage counter <= */
+
+#define OPCODE_END 9            /*!< Stop executing the program */
+#define SUB_OPCODE_END 0        /*!< Stop executing the program and optionally wake up the chip */
+#define SUB_OPCODE_SLEEP 1      /*!< Stop executing the program and run it again after selected interval */
+
+#define OPCODE_TSENS 10         /*!< Instruction: temperature sensor measurement */
+
+#define OPCODE_HALT 11          /*!< Halt the coprocessor */
+
+#define OPCODE_LD 13            /*!< Indirect load lower 16 bits from RTC memory */
+
+#define OPCODE_MACRO 15         /*!< Not a real opcode. Used to identify labels and branches in the program */
+#define SUB_OPCODE_MACRO_LABEL 0    /*!< Label macro */
+#define SUB_OPCODE_MACRO_BRANCH 1   /*!< Branch macro */
+#define SUB_OPCODE_MACRO_LABELPC 2  /*!< Label pointer macro */
+/**@}*/
+
+
+/**
+ * @brief Instruction format structure
+ *
+ * All ULP instructions are 32 bit long.
+ * This union contains field layouts used by all of the supported instructions.
+ * This union also includes a special "macro" instruction layout.
+ * This is not a real instruction which can be executed by the CPU. It acts
+ * as a token which is removed from the program by the
+ * ulp_process_macros_and_load function.
+ *
+ * These structures are not intended to be used directly.
+ * Preprocessor definitions provided below fill the fields of these structure with
+ * the right arguments.
+ */
+union ulp_insn {
+
+    struct {
+        uint32_t cycles : 16;       /*!< Number of cycles to sleep */
+        uint32_t unused : 12;       /*!< Unused */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_DELAY) */
+    } delay;                        /*!< Format of DELAY instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register which contains data to store */
+        uint32_t sreg : 2;          /*!< Register which contains address in RTC memory (expressed in words) */
+        uint32_t unused1 : 6;       /*!< Unused */
+        uint32_t offset : 11;       /*!< Offset to add to sreg */
+        uint32_t unused2 : 4;       /*!< Unused */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_ST) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_ST) */
+    } st;                           /*!< Format of ST instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register where the data should be loaded to */
+        uint32_t sreg : 2;          /*!< Register which contains address in RTC memory (expressed in words) */
+        uint32_t unused1 : 6;       /*!< Unused */
+        uint32_t offset : 11;       /*!< Offset to add to sreg */
+        uint32_t unused2 : 7;       /*!< Unused */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_LD) */
+    } ld;                           /*!< Format of LD instruction */
+
+    struct {
+        uint32_t unused : 28;       /*!< Unused */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_HALT) */
+    } halt;                         /*!< Format of HALT instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register which contains target PC, expressed in words (used if .reg == 1) */
+        uint32_t addr : 11;         /*!< Target PC, expressed in words (used if .reg == 0) */
+        uint32_t unused : 8;        /*!< Unused */
+        uint32_t reg : 1;           /*!< Target PC in register (1) or immediate (0) */
+        uint32_t type : 3;          /*!< Jump condition (BX_JUMP_TYPE_xxx) */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_BX) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_BRANCH) */
+    } bx;                           /*!< Format of BRANCH instruction (absolute address) */
+
+    struct {
+        uint32_t imm : 16;          /*!< Immediate value to compare against */
+        uint32_t cmp : 1;           /*!< Comparison to perform: B_CMP_L or B_CMP_GE */
+        uint32_t offset : 7;        /*!< Absolute value of target PC offset w.r.t. current PC, expressed in words */
+        uint32_t sign : 1;          /*!< Sign of target PC offset: 0: positive, 1: negative */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_B) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_BRANCH) */
+    } b;                            /*!< Format of BRANCH instruction (relative address, conditional on R0) */
+
+    struct {
+        uint32_t imm : 8;           /*!< Immediate value to compare against */
+        uint32_t unused : 7;        /*!< Unused */
+        uint32_t cmp : 2;           /*!< Comparison to perform: JUMPS_LT, JUMPS_GE or JUMPS_LE */
+        uint32_t offset : 7;        /*!< Absolute value of target PC offset w.r.t. current PC, expressed in words */
+        uint32_t sign : 1;          /*!< Sign of target PC offset: 0: positive, 1: negative */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_BS) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_BRANCH) */
+    } bs;                           /*!< Format of BRANCH instruction (relative address, conditional on the stage counter) */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Destination register */
+        uint32_t sreg : 2;          /*!< Register with operand A */
+        uint32_t treg : 2;          /*!< Register with operand B */
+        uint32_t unused : 15;       /*!< Unused */
+        uint32_t sel : 4;           /*!< Operation to perform, one of ALU_SEL_xxx */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_ALU_REG) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_ALU) */
+    } alu_reg;                      /*!< Format of ALU instruction (both sources are registers) */
+
+    struct {
+        uint32_t unused1 : 4;       /*!< Unused */
+        uint32_t imm : 8;           /*!< Immediate value of operand */
+        uint32_t unused2 : 9;       /*!< Unused */
+        uint32_t sel : 4;           /*!< Operation to perform, one of ALU_SEL_Sxxx */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_ALU_CNT) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_ALU) */
+    } alu_reg_s;                    /*!< Format of ALU instruction (stage counter and an immediate) */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Destination register */
+        uint32_t sreg : 2;          /*!< Register with operand A */
+        uint32_t imm : 16;          /*!< Immediate value of operand B */
+        uint32_t unused : 1;        /*!< Unused */
+        uint32_t sel : 4;           /*!< Operation to perform, one of ALU_SEL_xxx */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_ALU_IMM) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_ALU) */
+    } alu_imm;                      /*!< Format of ALU instruction (one source is an immediate) */
+
+    struct {
+        uint32_t addr : 8;          /*!< Address within either RTC_CNTL, RTC_IO, or SARADC */
+        uint32_t periph_sel : 2;    /*!< Select peripheral: RTC_CNTL (0), RTC_IO(1), SARADC(2) */
+        uint32_t data : 8;          /*!< 8 bits of data to write */
+        uint32_t low : 5;           /*!< Low bit */
+        uint32_t high : 5;          /*!< High bit */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_WR_REG) */
+    } wr_reg;                       /*!< Format of WR_REG instruction */
+
+    struct {
+        uint32_t addr : 8;          /*!< Address within either RTC_CNTL, RTC_IO, or SARADC */
+        uint32_t periph_sel : 2;    /*!< Select peripheral: RTC_CNTL (0), RTC_IO(1), SARADC(2) */
+        uint32_t unused : 8;        /*!< Unused */
+        uint32_t low : 5;           /*!< Low bit */
+        uint32_t high : 5;          /*!< High bit */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_RD_REG) */
+    } rd_reg;                       /*!< Format of RD_REG instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register where to store ADC result */
+        uint32_t mux : 4;           /*!< Select SARADC pad (mux + 1) */
+        uint32_t sar_sel : 1;       /*!< Select SARADC0 (0) or SARADC1 (1) */
+        uint32_t unused1 : 1;       /*!< Unused */
+        uint32_t cycles : 16;       /*!< TBD, cycles used for measurement */
+        uint32_t unused2 : 4;       /*!< Unused */
+        uint32_t opcode: 4;         /*!< Opcode (OPCODE_ADC) */
+    } adc;                          /*!< Format of ADC instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register where to store temperature measurement result */
+        uint32_t wait_delay: 14;    /*!< Cycles to wait after measurement is done */
+        uint32_t reserved: 12;      /*!< Reserved, set to 0 */
+        uint32_t opcode: 4;         /*!< Opcode (OPCODE_TSENS) */
+    } tsens;                        /*!< Format of TSENS instruction */
+
+    struct {
+        uint32_t i2c_addr : 8;      /*!< I2C slave address */
+        uint32_t data : 8;          /*!< 8 bits of data for write operation */
+        uint32_t low_bits : 3;      /*!< low bit of range for write operation (lower bits are masked) */
+        uint32_t high_bits : 3;     /*!< high bit of range for write operation (higher bits are masked) */
+        uint32_t i2c_sel : 4;       /*!< index of slave address register [7:0] */
+        uint32_t unused : 1;        /*!< Unused */
+        uint32_t rw : 1;            /*!< Write (1) or read (0) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_I2C) */
+    } i2c;                          /*!< Format of I2C instruction */
+
+    struct {
+        uint32_t wakeup : 1;        /*!< Set to 1 to wake up chip */
+        uint32_t unused : 24;       /*!< Unused */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_WAKEUP) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_END) */
+    } end;                          /*!< Format of END instruction with wakeup */
+
+    struct {
+        uint32_t cycle_sel : 4;     /*!< Select which one of SARADC_ULP_CP_SLEEP_CYCx_REG to get the sleep duration from */
+        uint32_t unused : 21;       /*!< Unused */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_SLEEP) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_END) */
+    } sleep;                        /*!< Format of END instruction with sleep */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Destination register (for SUB_OPCODE_MACRO_LABELPC) > */
+        uint32_t label : 16;        /*!< Label number */
+        uint32_t unused : 6;        /*!< Unused */
+        uint32_t sub_opcode : 4;    /*!< SUB_OPCODE_MACRO_LABEL or SUB_OPCODE_MACRO_BRANCH or SUB_OPCODE_MACRO_LABELPC */
+        uint32_t opcode: 4;         /*!< Opcode (OPCODE_MACRO) */
+    } macro;                        /*!< Format of tokens used by MACROs */
+
+    uint32_t instruction;           /*!< Encoded instruction for ULP coprocessor */
+
+};
+
+typedef union ulp_insn ulp_insn_t;
+
+_Static_assert(sizeof(ulp_insn_t) == 4, "ULP coprocessor instruction size should be 4 bytes");
+
+/**
+ * Delay (nop) for a given number of cycles
+ */
+#define I_DELAY(cycles_) { .delay = {\
+    .cycles = cycles_, \
+    .unused = 0, \
+    .opcode = OPCODE_DELAY } }
+
+/**
+ * Halt the coprocessor.
+ *
+ * This instruction halts the coprocessor, but keeps ULP timer active.
+ * As such, ULP program will be restarted again by timer.
+ * To stop the program and prevent the timer from restarting the program,
+ * use I_END(0) instruction.
+ */
+#define I_HALT() { .halt = {\
+    .unused = 0, \
+    .opcode = OPCODE_HALT } }
+
+/**
+ * Map SoC peripheral register to periph_sel field of RD_REG and WR_REG
+ * instructions.
+ *
+ * @param reg peripheral register in RTC_CNTL_, RTC_IO_, SENS_, RTC_I2C peripherals.
+ * @return periph_sel value for the peripheral to which this register belongs.
+ */
+static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
+    uint32_t ret = 3;
+    if (reg < DR_REG_RTCCNTL_BASE) {
+        assert(0 && "invalid register base");
+    } else if (reg < DR_REG_RTCIO_BASE) {
+        ret = RD_REG_PERIPH_RTC_CNTL;
+    } else if (reg < DR_REG_SENS_BASE) {
+        ret = RD_REG_PERIPH_RTC_IO;
+    } else if (reg < DR_REG_RTC_I2C_BASE){
+        ret = RD_REG_PERIPH_SENS;
+    } else if (reg < DR_REG_IO_MUX_BASE){
+        ret = RD_REG_PERIPH_RTC_I2C;
+    } else {
+        assert(0 && "invalid register base");
+    }
+    return ret;
+}
+
+/**
+ * Write literal value to a peripheral register
+ *
+ * reg[high_bit : low_bit] = val
+ * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
+ */
+#define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
+    .addr = (reg & 0xff) / sizeof(uint32_t), \
+    .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
+    .data = val, \
+    .low = low_bit, \
+    .high = high_bit, \
+    .opcode = OPCODE_WR_REG } }
+
+/**
+ * Read from peripheral register into R0
+ *
+ * R0 = reg[high_bit : low_bit]
+ * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
+ */
+#define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\
+    .addr = (reg & 0xff) / sizeof(uint32_t), \
+    .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
+    .unused = 0, \
+    .low = low_bit, \
+    .high = high_bit, \
+    .opcode = OPCODE_RD_REG } }
+
+/**
+ * Set or clear a bit in the peripheral register.
+ *
+ * Sets bit (1 << shift) of register reg to value val.
+ * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
+ */
+#define I_WR_REG_BIT(reg, shift, val) I_WR_REG(reg, shift, shift, val)
+
+/**
+ * Wake the SoC from deep sleep.
+ *
+ * This instruction initiates wake up from deep sleep.
+ * Use esp_deep_sleep_enable_ulp_wakeup to enable deep sleep wakeup
+ * triggered by the ULP before going into deep sleep.
+ * Note that ULP program will still keep running until the I_HALT
+ * instruction, and it will still be restarted by timer at regular
+ * intervals, even when the SoC is woken up.
+ *
+ * To stop the ULP program, use I_HALT instruction.
+ *
+ * To disable the timer which start ULP program, use I_END()
+ * instruction. I_END instruction clears the
+ * RTC_CNTL_ULP_CP_SLP_TIMER_EN_S bit of RTC_CNTL_STATE0_REG
+ * register, which controls the ULP timer.
+ */
+#define I_WAKE() { .end = { \
+        .wakeup = 1, \
+        .unused = 0, \
+        .sub_opcode = SUB_OPCODE_END, \
+        .opcode = OPCODE_END } }
+
+/**
+ * Stop ULP program timer.
+ *
+ * This is a convenience macro which disables the ULP program timer.
+ * Once this instruction is used, ULP program will not be restarted
+ * anymore until ulp_run function is called.
+ *
+ * ULP program will continue running after this instruction. To stop
+ * the currently running program, use I_HALT().
+ */
+#define I_END() \
+    I_WR_REG_BIT(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN_S, 0)
+/**
+ * Select the time interval used to run ULP program.
+ *
+ * This instructions selects which of the SENS_SLEEP_CYCLES_Sx
+ * registers' value is used by the ULP program timer.
+ * When the ULP program stops at I_HALT instruction, ULP program
+ * timer start counting. When the counter reaches the value of
+ * the selected SENS_SLEEP_CYCLES_Sx register, ULP program
+ * start running again from the start address (passed to the ulp_run
+ * function).
+ * There are 5 SENS_SLEEP_CYCLES_Sx registers, so 0 <= timer_idx < 5.
+ *
+ * By default, SENS_SLEEP_CYCLES_S0 register is used by the ULP
+ * program timer.
+ */
+#define I_SLEEP_CYCLE_SEL(timer_idx) { .sleep = { \
+        .cycle_sel = timer_idx, \
+        .unused = 0, \
+        .sub_opcode = SUB_OPCODE_SLEEP, \
+        .opcode = OPCODE_END } }
+
+/**
+ * Perform temperature sensor measurement and store it into reg_dest.
+ *
+ * Delay can be set between 1 and ((1 << 14) - 1). Higher values give
+ * higher measurement resolution.
+ */
+#define I_TSENS(reg_dest, delay) { .tsens = { \
+        .dreg = reg_dest, \
+        .wait_delay = delay, \
+        .reserved = 0, \
+        .opcode = OPCODE_TSENS } }
+
+/**
+ * Perform ADC measurement and store result in reg_dest.
+ *
+ * adc_idx selects ADC (0 or 1).
+ * pad_idx selects ADC pad (0 - 7).
+ */
+#define I_ADC(reg_dest, adc_idx, pad_idx) { .adc = {\
+        .dreg = reg_dest, \
+        .mux = pad_idx + 1, \
+        .sar_sel = adc_idx, \
+        .unused1 = 0, \
+        .cycles = 0, \
+        .unused2 = 0, \
+        .opcode = OPCODE_ADC } }
+
+/**
+ * Store value from register reg_val into RTC memory.
+ *
+ * The value is written to an offset calculated by adding value of
+ * reg_addr register and offset_ field (this offset is expressed in 32-bit words).
+ * 32 bits written to RTC memory are built as follows:
+ * - bits [31:21] hold the PC of current instruction, expressed in 32-bit words
+ * - bits [20:18] = 3'b0
+ * - bits [17:16] reg_addr (0..3)
+ * - bits [15:0] are assigned the contents of reg_val
+ *
+ * RTC_SLOW_MEM[addr + offset_] = { insn_PC[10:0], 3'b0, reg_addr, reg_val[15:0] }
+ */
+#define I_ST(reg_val, reg_addr, offset_) { .st = { \
+    .dreg = reg_val, \
+    .sreg = reg_addr, \
+    .unused1 = 0, \
+    .offset = offset_, \
+    .unused2 = 0, \
+    .sub_opcode = SUB_OPCODE_ST, \
+    .opcode = OPCODE_ST } }
+
+
+/**
+ * Load value from RTC memory into reg_dest register.
+ *
+ * Loads 16 LSBs from RTC memory word given by the sum of value in reg_addr and
+ * value of offset_.
+ */
+#define I_LD(reg_dest, reg_addr, offset_) { .ld = { \
+    .dreg = reg_dest, \
+    .sreg = reg_addr, \
+    .unused1 = 0, \
+    .offset = offset_, \
+    .unused2 = 0, \
+    .opcode = OPCODE_LD } }
+
+
+/**
+ *  Branch relative if R0 less than immediate value.
+ *
+ *  pc_offset is expressed in words, and can be from -127 to 127
+ *  imm_value is a 16-bit value to compare R0 against
+ */
+#define I_BL(pc_offset, imm_value) { .b = { \
+    .imm = imm_value, \
+    .cmp = B_CMP_L, \
+    .offset = abs(pc_offset), \
+    .sign = (pc_offset >= 0) ? 0 : 1, \
+    .sub_opcode = SUB_OPCODE_B, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ *  Branch relative if R0 greater or equal than immediate value.
+ *
+ *  pc_offset is expressed in words, and can be from -127 to 127
+ *  imm_value is a 16-bit value to compare R0 against
+ */
+#define I_BGE(pc_offset, imm_value) { .b = { \
+    .imm = imm_value, \
+    .cmp = B_CMP_GE, \
+    .offset = abs(pc_offset), \
+    .sign = (pc_offset >= 0) ? 0 : 1, \
+    .sub_opcode = SUB_OPCODE_B, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Unconditional branch to absolute PC, address in register.
+ *
+ * reg_pc is the register which contains address to jump to.
+ * Address is expressed in 32-bit words.
+ */
+#define I_BXR(reg_pc) { .bx = { \
+    .dreg = reg_pc, \
+    .addr = 0, \
+    .unused = 0, \
+    .reg = 1, \
+    .type = BX_JUMP_TYPE_DIRECT, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ *  Unconditional branch to absolute PC, immediate address.
+ *
+ *  Address imm_pc is expressed in 32-bit words.
+ */
+#define I_BXI(imm_pc) { .bx = { \
+    .dreg = 0, \
+    .addr = imm_pc, \
+    .unused = 0, \
+    .reg = 0, \
+    .type = BX_JUMP_TYPE_DIRECT, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU result is zero, address in register.
+ *
+ * reg_pc is the register which contains address to jump to.
+ * Address is expressed in 32-bit words.
+ */
+#define I_BXZR(reg_pc) { .bx = { \
+    .dreg = reg_pc, \
+    .addr = 0, \
+    .unused = 0, \
+    .reg = 1, \
+    .type = BX_JUMP_TYPE_ZERO, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU result is zero, immediate address.
+ *
+ * Address imm_pc is expressed in 32-bit words.
+ */
+#define I_BXZI(imm_pc) { .bx = { \
+    .dreg = 0, \
+    .addr = imm_pc, \
+    .unused = 0, \
+    .reg = 0, \
+    .type = BX_JUMP_TYPE_ZERO, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU overflow, address in register
+ *
+ * reg_pc is the register which contains address to jump to.
+ * Address is expressed in 32-bit words.
+ */
+#define I_BXFR(reg_pc) { .bx = { \
+    .dreg = reg_pc, \
+    .addr = 0, \
+    .unused = 0, \
+    .reg = 1, \
+    .type = BX_JUMP_TYPE_OVF, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU overflow, immediate address
+ *
+ * Address imm_pc is expressed in 32-bit words.
+ */
+#define I_BXFI(imm_pc) { .bx = { \
+    .dreg = 0, \
+    .addr = imm_pc, \
+    .unused = 0, \
+    .reg = 0, \
+    .type = BX_JUMP_TYPE_OVF, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+
+/**
+ * Addition: dest = src1 + src2
+ */
+#define I_ADDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_ADD, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Subtraction: dest = src1 - src2
+ */
+#define I_SUBR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_SUB, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical AND: dest = src1 & src2
+ */
+#define I_ANDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_AND, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical OR: dest = src1 | src2
+ */
+#define I_ORR(reg_dest, reg_src1, reg_src2)  { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_OR, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Copy: dest = src
+ */
+#define I_MOVR(reg_dest, reg_src) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .treg = 0, \
+    .unused = 0, \
+    .sel = ALU_SEL_MOV, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical shift left: dest = src << shift
+ */
+#define I_LSHR(reg_dest, reg_src, reg_shift)  { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .treg = reg_shift, \
+    .unused = 0, \
+    .sel = ALU_SEL_LSH, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+
+/**
+ * Logical shift right: dest = src >> shift
+ */
+#define I_RSHR(reg_dest, reg_src, reg_shift)  { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .treg = reg_shift, \
+    .unused = 0, \
+    .sel = ALU_SEL_RSH, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Add register and an immediate value: dest = src1 + imm
+ */
+#define I_ADDI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_ADD, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+
+/**
+ *  Subtract register and an immediate value: dest = src - imm
+ */
+#define I_SUBI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_SUB, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical AND register and an immediate value: dest = src & imm
+ */
+#define I_ANDI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_AND, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical OR register and an immediate value: dest = src | imm
+ */
+#define I_ORI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_OR, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Copy an immediate value into register: dest = imm
+ */
+#define I_MOVI(reg_dest, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = 0, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_MOV, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical shift left register value by an immediate: dest = src << imm
+ */
+#define I_LSHI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_LSH, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+
+/**
+ * Logical shift right register value by an immediate: dest = val >> imm
+ */
+#define I_RSHI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_RSH, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Define a label with number label_num.
+ *
+ * This is a macro which doesn't generate a real instruction.
+ * The token generated by this macro is removed by ulp_process_macros_and_load
+ * function. Label defined using this macro can be used in branch macros defined
+ * below.
+ */
+#define M_LABEL(label_num) { .macro = { \
+    .dreg = 0, \
+    .label = label_num, \
+    .unused = 0, \
+    .sub_opcode = SUB_OPCODE_MACRO_LABEL, \
+    .opcode = OPCODE_MACRO } }
+
+/**
+ * Token macro used by M_B and M_BX macros. Not to be used directly.
+ */
+#define M_BRANCH(label_num) { .macro = { \
+    .dreg = 0, \
+    .label = label_num, \
+    .unused = 0, \
+    .sub_opcode = SUB_OPCODE_MACRO_BRANCH, \
+    .opcode = OPCODE_MACRO } }
+
+/**
+ * Token macro used by M_MOVL macro. Not to be used directly.
+ */
+#define M_LABELPC(label_num) { .macro = { \
+    .dreg = 0, \
+    .label = label_num, \
+    .unused = 0, \
+    .sub_opcode = SUB_OPCODE_MACRO_LABELPC, \
+    .opcode = OPCODE_MACRO } }
+
+/**
+ * Macro: Move the program counter at the given label into the register.
+ * This address can then be used with I_BXR, I_BXZR, I_BXFR, etc.
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_MOVL(reg_dest, label_num) \
+    M_LABELPC(label_num), \
+    I_MOVI(reg_dest, 0)
+
+/**
+ * Macro: branch to label label_num if R0 is less than immediate value.
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BL(label_num, imm_value) \
+    M_BRANCH(label_num), \
+    I_BL(0, imm_value)
+
+/**
+ * Macro: branch to label label_num if R0 is greater or equal than immediate value
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BGE(label_num, imm_value) \
+    M_BRANCH(label_num), \
+    I_BGE(0, imm_value)
+
+/**
+ * Macro: unconditional branch to label
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BX(label_num) \
+    M_BRANCH(label_num), \
+    I_BXI(0)
+
+/**
+ * Macro: branch to label if ALU result is zero
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BXZ(label_num) \
+    M_BRANCH(label_num), \
+    I_BXZI(0)
+
+/**
+ * Macro: branch to label if ALU overflow
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BXF(label_num) \
+    M_BRANCH(label_num), \
+    I_BXFI(0)
+
+/**
+ * Increment the stage counter by immediate value
+ */
+#define I_STAGE_INC(imm_) { .alu_reg_s = { \
+    .unused1 = 0, \
+    .imm = imm_, \
+    .unused2 = 0, \
+    .sel = ALU_SEL_SINC, \
+    .sub_opcode = SUB_OPCODE_ALU_CNT, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Decrement the stage counter by immediate value
+ */
+#define I_STAGE_DEC(imm_) { .alu_reg_s = { \
+    .unused1 = 0, \
+    .imm = imm_, \
+    .unused2 = 0, \
+    .sel = ALU_SEL_SDEC, \
+    .sub_opcode = SUB_OPCODE_ALU_CNT, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Reset the stage counter
+ */
+#define I_STAGE_RST() { .alu_reg_s = { \
+    .unused1 = 0, \
+    .imm = 0, \
+    .unused2 = 0, \
+    .sel = ALU_SEL_SRST, \
+    .sub_opcode = SUB_OPCODE_ALU_CNT, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Macro: branch to label if the stage counter is less than immediate value
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BSLT(label_num, imm_value) \
+    M_BRANCH(label_num), \
+    I_JUMPS(0, imm_value, JUMPS_LT)
+
+/**
+ * Macro: branch to label if the stage counter is greater than or equal to immediate value
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BSGE(label_num, imm_value) \
+    M_BRANCH(label_num), \
+    I_JUMPS(0, imm_value, JUMPS_GE)
+
+/**
+ * Macro: branch to label if the stage counter is less than or equal to immediate value
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BSLE(label_num, imm_value) \
+    M_BRANCH(label_num), \
+    I_JUMPS(0, imm_value, JUMPS_LE)
+
+/**
+ * Macro: branch to label if the stage counter is equal to immediate value.
+ *  Implemented using two JUMPS instructions:
+ *      JUMPS next, imm_value, LT
+ *      JUMPS label_num, imm_value, LE
+ *
+ * This macro generates three ulp_insn_t values separated by commas, and should
+ * be used when defining contents of ulp_insn_t arrays. Second value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BSEQ(label_num, imm_value) \
+    I_JUMPS(2, imm_value, JUMPS_LT), \
+    M_BRANCH(label_num), \
+    I_JUMPS(0, imm_value, JUMPS_LE)
+
+/**
+ * Macro: branch to label if the stage counter is greater than immediate value.
+ *  Implemented using two instructions:
+ *      JUMPS next, imm_value, LE
+ *      JUMPS label_num, imm_value, GE
+ *
+ * This macro generates three ulp_insn_t values separated by commas, and should
+ * be used when defining contents of ulp_insn_t arrays. Second value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BSGT(label_num, imm_value) \
+    I_JUMPS(2, imm_value, JUMPS_LE), \
+    M_BRANCH(label_num), \
+    I_JUMPS(0, imm_value, JUMPS_GE)
+
+/**
+ *  Branch relative if (stage counter [comp_type] [imm_value]) evaluates to true.
+ *
+ *  pc_offset is expressed in words, and can be from -127 to 127
+ *  imm_value is an 8-bit value to compare the stage counter against
+ *  comp_type is the type of comparison to perform: JUMPS_LT (<), JUMPS_GE (>=) or JUMPS_LE (<=)
+ */
+#define I_JUMPS(pc_offset, imm_value, comp_type) { .bs = { \
+    .imm = imm_value, \
+    .unused = 0, \
+    .cmp = comp_type, \
+    .offset = abs(pc_offset), \
+    .sign = (pc_offset >= 0) ? 0 : 1, \
+    .sub_opcode = SUB_OPCODE_BS, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ *  Perform an I2C transaction with a slave device.
+ *  I_I2C_READ and I_I2C_WRITE are provided for convenience, instead of using this directly.
+ *
+ *  Slave address (in 7-bit format) has to be set in advance into SENS_I2C_SLAVE_ADDRx register field, where x == slave_sel.
+ *  For read operations, 8 bits of read result is stored into R0 register.
+ *  For write operations, val will be written to sub_addr at [high_bit:low_bit]. Bits outside of this range are masked.
+ */
+#define I_I2C_RW(sub_addr, val, low_bit, high_bit, slave_sel, rw_bit) { .i2c = {\
+        .i2c_addr = sub_addr, \
+        .data = val, \
+        .low_bits = low_bit, \
+        .high_bits = high_bit, \
+        .i2c_sel = slave_sel, \
+        .unused = 0, \
+        .rw = rw_bit, \
+        .opcode = OPCODE_I2C } }
+
+/**
+ * Read a byte from the sub address of an I2C slave, and store the result in R0.
+ *
+ * Slave address (in 7-bit format) has to be set in advance into SENS_I2C_SLAVE_ADDRx register field, where x == slave_sel.
+ */
+#define I_I2C_READ(slave_sel, sub_addr) I_I2C_RW(sub_addr, 0, 0, 0, slave_sel, SUB_OPCODE_I2C_RD)
+
+/**
+ * Write a byte to the sub address of an I2C slave.
+ *
+ * Slave address (in 7-bit format) has to be set in advance into SENS_I2C_SLAVE_ADDRx register field, where x == slave_sel.
+ */
+#define I_I2C_WRITE(slave_sel, sub_addr, val) I_I2C_RW(sub_addr, val, 0, 7, slave_sel, SUB_OPCODE_I2C_WR)
+
+#define RTC_SLOW_MEM ((uint32_t*) 0x50000000)       /*!< RTC slow memory, 8k size */
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/ulp/include/esp32s2/ulp.h b/tools/sdk/esp32s3/include/ulp/include/esp32s2/ulp.h
new file mode 100644
index 00000000000..04d38c457e6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/ulp/include/esp32s2/ulp.h
@@ -0,0 +1,840 @@
+// Copyright 2016-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stddef.h>
+#include <stdlib.h>
+#include "esp_err.h"
+#include "soc/soc.h"
+#include "ulp_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ULP_FSM_PREPARE_SLEEP_CYCLES 2    /*!< Cycles spent by FSM preparing ULP for sleep */
+#define ULP_FSM_WAKEUP_SLEEP_CYCLES  2    /*!< Cycles spent by FSM waking up ULP from sleep */
+
+/**
+ * @defgroup ulp_registers ULP coprocessor registers
+ * @{
+ */
+
+
+#define R0 0    /*!< general purpose register 0 */
+#define R1 1    /*!< general purpose register 1 */
+#define R2 2    /*!< general purpose register 2 */
+#define R3 3    /*!< general purpose register 3 */
+/**@}*/
+
+/** @defgroup ulp_opcodes ULP coprocessor opcodes, sub opcodes, and various modifiers/flags
+ *
+ * These definitions are not intended to be used directly.
+ * They are used in definitions of instructions later on.
+ *
+ * @{
+ */
+
+#define OPCODE_WR_REG 1         /*!< Instruction: write peripheral register (RTC_CNTL/RTC_IO/SARADC) (not implemented yet) */
+
+#define OPCODE_RD_REG 2         /*!< Instruction: read peripheral register (RTC_CNTL/RTC_IO/SARADC) (not implemented yet) */
+
+#define RD_REG_PERIPH_RTC_CNTL 0    /*!< Identifier of RTC_CNTL peripheral for RD_REG and WR_REG instructions */
+#define RD_REG_PERIPH_RTC_IO   1    /*!< Identifier of RTC_IO peripheral for RD_REG and WR_REG instructions */
+#define RD_REG_PERIPH_SENS     2    /*!< Identifier of SARADC peripheral for RD_REG and WR_REG instructions */
+#define RD_REG_PERIPH_RTC_I2C  3    /*!< Identifier of RTC_I2C peripheral for RD_REG and WR_REG instructions */
+
+#define OPCODE_I2C 3            /*!< Instruction: read/write I2C (not implemented yet) */
+
+#define OPCODE_DELAY 4          /*!< Instruction: delay (nop) for a given number of cycles */
+
+#define OPCODE_ADC 5            /*!< Instruction: SAR ADC measurement (not implemented yet) */
+
+#define OPCODE_ST 6             /*!< Instruction: store indirect to RTC memory */
+#define SUB_OPCODE_ST 4         /*!< Store 32 bits, 16 MSBs contain PC, 16 LSBs contain value from source register */
+
+#define OPCODE_ALU 7            /*!< Arithmetic instructions */
+#define SUB_OPCODE_ALU_REG 0    /*!< Arithmetic instruction, both source values are in register */
+#define SUB_OPCODE_ALU_IMM 1    /*!< Arithmetic instruction, one source value is an immediate */
+#define SUB_OPCODE_ALU_CNT 2    /*!< Arithmetic instruction between counter register and an immediate (not implemented yet)*/
+#define ALU_SEL_ADD 0           /*!< Addition */
+#define ALU_SEL_SUB 1           /*!< Subtraction */
+#define ALU_SEL_AND 2           /*!< Logical AND */
+#define ALU_SEL_OR  3           /*!< Logical OR */
+#define ALU_SEL_MOV 4           /*!< Copy value (immediate to destination register or source register to destination register */
+#define ALU_SEL_LSH 5           /*!< Shift left by given number of bits */
+#define ALU_SEL_RSH 6           /*!< Shift right by given number of bits */
+
+#define OPCODE_BRANCH 8         /*!< Branch instructions */
+#define SUB_OPCODE_BX  0        /*!< Branch to absolute PC (immediate or in register) */
+#define BX_JUMP_TYPE_DIRECT 0   /*!< Unconditional jump */
+#define BX_JUMP_TYPE_ZERO 1     /*!< Branch if last ALU result is zero */
+#define BX_JUMP_TYPE_OVF 2      /*!< Branch if last ALU operation caused and overflow */
+#define SUB_OPCODE_B  1         /*!< Branch to a relative offset */
+#define B_CMP_L 0               /*!< Branch if R0 is less than an immediate */
+#define B_CMP_GE 1              /*!< Branch if R0 is greater than or equal to an immediate */
+
+#define OPCODE_END 9            /*!< Stop executing the program */
+#define SUB_OPCODE_END 0        /*!< Stop executing the program and optionally wake up the chip */
+#define SUB_OPCODE_SLEEP 1      /*!< Stop executing the program and run it again after selected interval */
+
+#define OPCODE_TSENS 10         /*!< Instruction: temperature sensor measurement (not implemented yet) */
+
+#define OPCODE_HALT 11          /*!< Halt the coprocessor */
+
+#define OPCODE_LD 13            /*!< Indirect load lower 16 bits from RTC memory */
+
+#define OPCODE_MACRO 15         /*!< Not a real opcode. Used to identify labels and branches in the program */
+#define SUB_OPCODE_MACRO_LABEL 0    /*!< Label macro */
+#define SUB_OPCODE_MACRO_BRANCH 1   /*!< Branch macro */
+/**@}*/
+
+/**
+ * @brief Instruction format structure
+ *
+ * All ULP instructions are 32 bit long.
+ * This union contains field layouts used by all of the supported instructions.
+ * This union also includes a special "macro" instruction layout.
+ * This is not a real instruction which can be executed by the CPU. It acts
+ * as a token which is removed from the program by the
+ * ulp_process_macros_and_load function.
+ *
+ * These structures are not intended to be used directly.
+ * Preprocessor definitions provided below fill the fields of these structure with
+ * the right arguments.
+ */
+union ulp_insn {
+
+    struct {
+        uint32_t cycles : 16;       /*!< Number of cycles to sleep */
+        uint32_t unused : 12;       /*!< Unused */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_DELAY) */
+    } delay;                        /*!< Format of DELAY instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register which contains data to store */
+        uint32_t sreg : 2;          /*!< Register which contains address in RTC memory (expressed in words) */
+        uint32_t unused1 : 6;       /*!< Unused */
+        uint32_t offset : 11;       /*!< Offset to add to sreg */
+        uint32_t unused2 : 4;       /*!< Unused */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_ST) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_ST) */
+    } st;                           /*!< Format of ST instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register where the data should be loaded to */
+        uint32_t sreg : 2;          /*!< Register which contains address in RTC memory (expressed in words) */
+        uint32_t unused1 : 6;       /*!< Unused */
+        uint32_t offset : 11;       /*!< Offset to add to sreg */
+        uint32_t unused2 : 7;       /*!< Unused */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_LD) */
+    } ld;                           /*!< Format of LD instruction */
+
+    struct {
+        uint32_t unused : 28;       /*!< Unused */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_HALT) */
+    } halt;                         /*!< Format of HALT instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register which contains target PC, expressed in words (used if .reg == 1) */
+        uint32_t addr : 11;         /*!< Target PC, expressed in words (used if .reg == 0) */
+        uint32_t unused : 8;        /*!< Unused */
+        uint32_t reg : 1;           /*!< Target PC in register (1) or immediate (0) */
+        uint32_t type : 3;          /*!< Jump condition (BX_JUMP_TYPE_xxx) */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_BX) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_BRANCH) */
+    } bx;                           /*!< Format of BRANCH instruction (absolute address) */
+
+    struct {
+        uint32_t imm : 16;          /*!< Immediate value to compare against */
+        uint32_t cmp : 1;           /*!< Comparison to perform: B_CMP_L or B_CMP_GE */
+        uint32_t offset : 7;        /*!< Absolute value of target PC offset w.r.t. current PC, expressed in words */
+        uint32_t sign : 1;          /*!< Sign of target PC offset: 0: positive, 1: negative */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_B) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_BRANCH) */
+    } b;                            /*!< Format of BRANCH instruction (relative address) */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Destination register */
+        uint32_t sreg : 2;          /*!< Register with operand A */
+        uint32_t treg : 2;          /*!< Register with operand B */
+        uint32_t unused : 15;       /*!< Unused */
+        uint32_t sel : 4;           /*!< Operation to perform, one of ALU_SEL_xxx */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_ALU_REG) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_ALU) */
+    } alu_reg;                      /*!< Format of ALU instruction (both sources are registers) */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Destination register */
+        uint32_t sreg : 2;          /*!< Register with operand A */
+        uint32_t imm : 16;          /*!< Immediate value of operand B */
+        uint32_t unused : 1;        /*!< Unused */
+        uint32_t sel : 4;           /*!< Operation to perform, one of ALU_SEL_xxx */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_ALU_IMM) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_ALU) */
+    } alu_imm;                      /*!< Format of ALU instruction (one source is an immediate) */
+
+    struct {
+        uint32_t addr : 8;          /*!< Address within either RTC_CNTL, RTC_IO, or SARADC */
+        uint32_t periph_sel : 2;    /*!< Select peripheral: RTC_CNTL (0), RTC_IO(1), SARADC(2) */
+        uint32_t data : 8;          /*!< 8 bits of data to write */
+        uint32_t low : 5;           /*!< Low bit */
+        uint32_t high : 5;          /*!< High bit */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_WR_REG) */
+    } wr_reg;                       /*!< Format of WR_REG instruction */
+
+    struct {
+        uint32_t addr : 8;          /*!< Address within either RTC_CNTL, RTC_IO, or SARADC */
+        uint32_t periph_sel : 2;    /*!< Select peripheral: RTC_CNTL (0), RTC_IO(1), SARADC(2) */
+        uint32_t unused : 8;        /*!< Unused */
+        uint32_t low : 5;           /*!< Low bit */
+        uint32_t high : 5;          /*!< High bit */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_RD_REG) */
+    } rd_reg;                       /*!< Format of RD_REG instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register where to store ADC result */
+        uint32_t mux : 4;           /*!< Select SARADC pad (mux + 1) */
+        uint32_t sar_sel : 1;       /*!< Select SARADC0 (0) or SARADC1 (1) */
+        uint32_t unused1 : 1;       /*!< Unused */
+        uint32_t cycles : 16;       /*!< TBD, cycles used for measurement */
+        uint32_t unused2 : 4;       /*!< Unused */
+        uint32_t opcode: 4;         /*!< Opcode (OPCODE_ADC) */
+    } adc;                          /*!< Format of ADC instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register where to store temperature measurement result */
+        uint32_t wait_delay: 14;    /*!< Cycles to wait after measurement is done */
+        uint32_t reserved: 12;      /*!< Reserved, set to 0 */
+        uint32_t opcode: 4;         /*!< Opcode (OPCODE_TSENS) */
+    } tsens;                        /*!< Format of TSENS instruction */
+
+    struct {
+        uint32_t i2c_addr : 8;      /*!< I2C slave address */
+        uint32_t data : 8;          /*!< Data to read or write */
+        uint32_t low_bits : 3;      /*!< TBD */
+        uint32_t high_bits : 3;     /*!< TBD */
+        uint32_t i2c_sel : 4;       /*!< TBD, select reg_i2c_slave_address[7:0] */
+        uint32_t unused : 1;        /*!< Unused */
+        uint32_t rw : 1;            /*!< Write (1) or read (0) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_I2C) */
+    } i2c;                          /*!< Format of I2C instruction */
+
+    struct {
+        uint32_t wakeup : 1;        /*!< Set to 1 to wake up chip */
+        uint32_t unused : 24;       /*!< Unused */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_WAKEUP) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_END) */
+    } end;                          /*!< Format of END instruction with wakeup */
+
+    struct {
+        uint32_t cycle_sel : 4;     /*!< Select which one of SARADC_ULP_CP_SLEEP_CYCx_REG to get the sleep duration from */
+        uint32_t unused : 21;       /*!< Unused */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_SLEEP) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_END) */
+    } sleep;                        /*!< Format of END instruction with sleep */
+
+    struct {
+        uint32_t label : 16;        /*!< Label number */
+        uint32_t unused : 8;        /*!< Unused */
+        uint32_t sub_opcode : 4;    /*!< SUB_OPCODE_MACRO_LABEL or SUB_OPCODE_MACRO_BRANCH */
+        uint32_t opcode: 4;         /*!< Opcode (OPCODE_MACRO) */
+    } macro;                        /*!< Format of tokens used by LABEL and BRANCH macros */
+
+};
+
+typedef union ulp_insn ulp_insn_t;
+
+_Static_assert(sizeof(ulp_insn_t) == 4, "ULP coprocessor instruction size should be 4 bytes");
+
+/**
+ * Delay (nop) for a given number of cycles
+ */
+#define I_DELAY(cycles_) { .delay = {\
+    .cycles = cycles_, \
+    .unused = 0, \
+    .opcode = OPCODE_DELAY } }
+
+/**
+ * Halt the coprocessor.
+ *
+ * This instruction halts the coprocessor, but keeps ULP timer active.
+ * As such, ULP program will be restarted again by timer.
+ * To stop the program and prevent the timer from restarting the program,
+ * use I_END(0) instruction.
+ */
+#define I_HALT() { .halt = {\
+    .unused = 0, \
+    .opcode = OPCODE_HALT } }
+
+/**
+ * Map SoC peripheral register to periph_sel field of RD_REG and WR_REG
+ * instructions.
+ *
+ * @param reg peripheral register in RTC_CNTL_, RTC_IO_, SENS_, RTC_I2C peripherals.
+ * @return periph_sel value for the peripheral to which this register belongs.
+ */
+static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
+    uint32_t ret = 3;
+    if (reg < DR_REG_RTCCNTL_BASE) {
+        assert(0 && "invalid register base");
+    } else if (reg < DR_REG_RTCIO_BASE) {
+        ret = RD_REG_PERIPH_RTC_CNTL;
+    } else if (reg < DR_REG_SENS_BASE) {
+        ret = RD_REG_PERIPH_RTC_IO;
+    } else if (reg < DR_REG_RTC_I2C_BASE){
+        ret = RD_REG_PERIPH_SENS;
+    } else if (reg < DR_REG_IO_MUX_BASE){
+        ret = RD_REG_PERIPH_RTC_I2C;
+    } else {
+        assert(0 && "invalid register base");
+    }
+    return ret;
+}
+
+/**
+ * Write literal value to a peripheral register
+ *
+ * reg[high_bit : low_bit] = val
+ * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
+ */
+#define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
+    .addr = (reg & 0xff) / sizeof(uint32_t), \
+    .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
+    .data = val, \
+    .low = low_bit, \
+    .high = high_bit, \
+    .opcode = OPCODE_WR_REG } }
+
+/**
+ * Read from peripheral register into R0
+ *
+ * R0 = reg[high_bit : low_bit]
+ * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
+ */
+#define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\
+    .addr = (reg & 0xff) / sizeof(uint32_t), \
+    .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
+    .unused = 0, \
+    .low = low_bit, \
+    .high = high_bit, \
+    .opcode = OPCODE_RD_REG } }
+
+/**
+ * Set or clear a bit in the peripheral register.
+ *
+ * Sets bit (1 << shift) of register reg to value val.
+ * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
+ */
+#define I_WR_REG_BIT(reg, shift, val) I_WR_REG(reg, shift, shift, val)
+
+/**
+ * Wake the SoC from deep sleep.
+ *
+ * This instruction initiates wake up from deep sleep.
+ * Use esp_deep_sleep_enable_ulp_wakeup to enable deep sleep wakeup
+ * triggered by the ULP before going into deep sleep.
+ * Note that ULP program will still keep running until the I_HALT
+ * instruction, and it will still be restarted by timer at regular
+ * intervals, even when the SoC is woken up.
+ *
+ * To stop the ULP program, use I_HALT instruction.
+ *
+ * To disable the timer which start ULP program, use I_END()
+ * instruction. I_END instruction clears the
+ * RTC_CNTL_ULP_CP_SLP_TIMER_EN_S bit of RTC_CNTL_STATE0_REG
+ * register, which controls the ULP timer.
+ */
+#define I_WAKE() { .end = { \
+        .wakeup = 1, \
+        .unused = 0, \
+        .sub_opcode = SUB_OPCODE_END, \
+        .opcode = OPCODE_END } }
+
+/**
+ * Stop ULP program timer.
+ *
+ * This is a convenience macro which disables the ULP program timer.
+ * Once this instruction is used, ULP program will not be restarted
+ * anymore until ulp_run function is called.
+ *
+ * ULP program will continue running after this instruction. To stop
+ * the currently running program, use I_HALT().
+ */
+#define I_END() \
+    I_WR_REG_BIT(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN_S, 0)
+/**
+ * Select the time interval used to run ULP program.
+ *
+ * This instructions selects which of the SENS_SLEEP_CYCLES_Sx
+ * registers' value is used by the ULP program timer.
+ * When the ULP program stops at I_HALT instruction, ULP program
+ * timer start counting. When the counter reaches the value of
+ * the selected SENS_SLEEP_CYCLES_Sx register, ULP program
+ * start running again from the start address (passed to the ulp_run
+ * function).
+ * There are 5 SENS_SLEEP_CYCLES_Sx registers, so 0 <= timer_idx < 5.
+ *
+ * By default, SENS_SLEEP_CYCLES_S0 register is used by the ULP
+ * program timer.
+ */
+#define I_SLEEP_CYCLE_SEL(timer_idx) { .sleep = { \
+        .cycle_sel = timer_idx, \
+        .unused = 0, \
+        .sub_opcode = SUB_OPCODE_SLEEP, \
+        .opcode = OPCODE_END } }
+
+/**
+ * Perform temperature sensor measurement and store it into reg_dest.
+ *
+ * Delay can be set between 1 and ((1 << 14) - 1). Higher values give
+ * higher measurement resolution.
+ */
+#define I_TSENS(reg_dest, delay) { .tsens = { \
+        .dreg = reg_dest, \
+        .wait_delay = delay, \
+        .reserved = 0, \
+        .opcode = OPCODE_TSENS } }
+
+/**
+ * Perform ADC measurement and store result in reg_dest.
+ *
+ * adc_idx selects ADC (0 or 1).
+ * pad_idx selects ADC pad (0 - 7).
+ */
+#define I_ADC(reg_dest, adc_idx, pad_idx) { .adc = {\
+        .dreg = reg_dest, \
+        .mux = pad_idx + 1, \
+        .sar_sel = adc_idx, \
+        .unused1 = 0, \
+        .cycles = 0, \
+        .unused2 = 0, \
+        .opcode = OPCODE_ADC } }
+
+/**
+ * Store value from register reg_val into RTC memory.
+ *
+ * The value is written to an offset calculated by adding value of
+ * reg_addr register and offset_ field (this offset is expressed in 32-bit words).
+ * 32 bits written to RTC memory are built as follows:
+ * - bits [31:21] hold the PC of current instruction, expressed in 32-bit words
+ * - bits [20:18] = 3'b0
+ * - bits [17:16] reg_addr (0..3)
+ * - bits [15:0] are assigned the contents of reg_val
+ *
+ * RTC_SLOW_MEM[addr + offset_] = { insn_PC[10:0], 3'b0, reg_addr, reg_val[15:0] }
+ */
+#define I_ST(reg_val, reg_addr, offset_) { .st = { \
+    .dreg = reg_val, \
+    .sreg = reg_addr, \
+    .unused1 = 0, \
+    .offset = offset_, \
+    .unused2 = 0, \
+    .sub_opcode = SUB_OPCODE_ST, \
+    .opcode = OPCODE_ST } }
+
+
+/**
+ * Load value from RTC memory into reg_dest register.
+ *
+ * Loads 16 LSBs from RTC memory word given by the sum of value in reg_addr and
+ * value of offset_.
+ */
+#define I_LD(reg_dest, reg_addr, offset_) { .ld = { \
+    .dreg = reg_dest, \
+    .sreg = reg_addr, \
+    .unused1 = 0, \
+    .offset = offset_, \
+    .unused2 = 0, \
+    .opcode = OPCODE_LD } }
+
+
+/**
+ *  Branch relative if R0 less than immediate value.
+ *
+ *  pc_offset is expressed in words, and can be from -127 to 127
+ *  imm_value is a 16-bit value to compare R0 against
+ */
+#define I_BL(pc_offset, imm_value) { .b = { \
+    .imm = imm_value, \
+    .cmp = B_CMP_L, \
+    .offset = abs(pc_offset), \
+    .sign = (pc_offset >= 0) ? 0 : 1, \
+    .sub_opcode = SUB_OPCODE_B, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ *  Branch relative if R0 greater or equal than immediate value.
+ *
+ *  pc_offset is expressed in words, and can be from -127 to 127
+ *  imm_value is a 16-bit value to compare R0 against
+ */
+#define I_BGE(pc_offset, imm_value) { .b = { \
+    .imm = imm_value, \
+    .cmp = B_CMP_GE, \
+    .offset = abs(pc_offset), \
+    .sign = (pc_offset >= 0) ? 0 : 1, \
+    .sub_opcode = SUB_OPCODE_B, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Unconditional branch to absolute PC, address in register.
+ *
+ * reg_pc is the register which contains address to jump to.
+ * Address is expressed in 32-bit words.
+ */
+#define I_BXR(reg_pc) { .bx = { \
+    .dreg = reg_pc, \
+    .addr = 0, \
+    .unused = 0, \
+    .reg = 1, \
+    .type = BX_JUMP_TYPE_DIRECT, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ *  Unconditional branch to absolute PC, immediate address.
+ *
+ *  Address imm_pc is expressed in 32-bit words.
+ */
+#define I_BXI(imm_pc) { .bx = { \
+    .dreg = 0, \
+    .addr = imm_pc, \
+    .unused = 0, \
+    .reg = 0, \
+    .type = BX_JUMP_TYPE_DIRECT, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU result is zero, address in register.
+ *
+ * reg_pc is the register which contains address to jump to.
+ * Address is expressed in 32-bit words.
+ */
+#define I_BXZR(reg_pc) { .bx = { \
+    .dreg = reg_pc, \
+    .addr = 0, \
+    .unused = 0, \
+    .reg = 1, \
+    .type = BX_JUMP_TYPE_ZERO, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU result is zero, immediate address.
+ *
+ * Address imm_pc is expressed in 32-bit words.
+ */
+#define I_BXZI(imm_pc) { .bx = { \
+    .dreg = 0, \
+    .addr = imm_pc, \
+    .unused = 0, \
+    .reg = 0, \
+    .type = BX_JUMP_TYPE_ZERO, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU overflow, address in register
+ *
+ * reg_pc is the register which contains address to jump to.
+ * Address is expressed in 32-bit words.
+ */
+#define I_BXFR(reg_pc) { .bx = { \
+    .dreg = reg_pc, \
+    .addr = 0, \
+    .unused = 0, \
+    .reg = 1, \
+    .type = BX_JUMP_TYPE_OVF, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU overflow, immediate address
+ *
+ * Address imm_pc is expressed in 32-bit words.
+ */
+#define I_BXFI(imm_pc) { .bx = { \
+    .dreg = 0, \
+    .addr = imm_pc, \
+    .unused = 0, \
+    .reg = 0, \
+    .type = BX_JUMP_TYPE_OVF, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+
+/**
+ * Addition: dest = src1 + src2
+ */
+#define I_ADDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_ADD, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Subtraction: dest = src1 - src2
+ */
+#define I_SUBR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_SUB, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical AND: dest = src1 & src2
+ */
+#define I_ANDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_AND, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical OR: dest = src1 | src2
+ */
+#define I_ORR(reg_dest, reg_src1, reg_src2)  { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_OR, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Copy: dest = src
+ */
+#define I_MOVR(reg_dest, reg_src) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .treg = 0, \
+    .unused = 0, \
+    .sel = ALU_SEL_MOV, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical shift left: dest = src << shift
+ */
+#define I_LSHR(reg_dest, reg_src, reg_shift)  { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .treg = reg_shift, \
+    .unused = 0, \
+    .sel = ALU_SEL_LSH, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+
+/**
+ * Logical shift right: dest = src >> shift
+ */
+#define I_RSHR(reg_dest, reg_src, reg_shift)  { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .treg = reg_shift, \
+    .unused = 0, \
+    .sel = ALU_SEL_RSH, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Add register and an immediate value: dest = src1 + imm
+ */
+#define I_ADDI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_ADD, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+
+/**
+ *  Subtract register and an immediate value: dest = src - imm
+ */
+#define I_SUBI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_SUB, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical AND register and an immediate value: dest = src & imm
+ */
+#define I_ANDI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_AND, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical OR register and an immediate value: dest = src | imm
+ */
+#define I_ORI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_OR, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Copy an immediate value into register: dest = imm
+ */
+#define I_MOVI(reg_dest, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = 0, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_MOV, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical shift left register value by an immediate: dest = src << imm
+ */
+#define I_LSHI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_LSH, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+
+/**
+ * Logical shift right register value by an immediate: dest = val >> imm
+ */
+#define I_RSHI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_RSH, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Define a label with number label_num.
+ *
+ * This is a macro which doesn't generate a real instruction.
+ * The token generated by this macro is removed by ulp_process_macros_and_load
+ * function. Label defined using this macro can be used in branch macros defined
+ * below.
+ */
+#define M_LABEL(label_num) { .macro = { \
+    .label = label_num, \
+    .unused = 0, \
+    .sub_opcode = SUB_OPCODE_MACRO_LABEL, \
+    .opcode = OPCODE_MACRO } }
+
+/**
+ * Token macro used by M_B and M_BX macros. Not to be used directly.
+ */
+#define M_BRANCH(label_num) { .macro = { \
+    .label = label_num, \
+    .unused = 0, \
+    .sub_opcode = SUB_OPCODE_MACRO_BRANCH, \
+    .opcode = OPCODE_MACRO } }
+
+/**
+ * Macro: branch to label label_num if R0 is less than immediate value.
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BL(label_num, imm_value) \
+    M_BRANCH(label_num), \
+    I_BL(0, imm_value)
+
+/**
+ * Macro: branch to label label_num if R0 is greater or equal than immediate value
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BGE(label_num, imm_value) \
+    M_BRANCH(label_num), \
+    I_BGE(0, imm_value)
+
+/**
+ * Macro: unconditional branch to label
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BX(label_num) \
+    M_BRANCH(label_num), \
+    I_BXI(0)
+
+/**
+ * Macro: branch to label if ALU result is zero
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BXZ(label_num) \
+    M_BRANCH(label_num), \
+    I_BXZI(0)
+
+/**
+ * Macro: branch to label if ALU overflow
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BXF(label_num) \
+    M_BRANCH(label_num), \
+    I_BXFI(0)
+
+
+
+#define RTC_SLOW_MEM ((uint32_t*) 0x50000000)       /*!< RTC slow memory, 8k size */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/ulp/include/esp32s2/ulp_riscv.h b/tools/sdk/esp32s3/include/ulp/include/esp32s2/ulp_riscv.h
new file mode 100644
index 00000000000..f98f2acdac1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/ulp/include/esp32s2/ulp_riscv.h
@@ -0,0 +1,44 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stddef.h>
+#include <stdlib.h>
+#include "esp_err.h"
+#include "soc/soc.h"
+#include "ulp_common.h"
+
+/**
+ * @brief Run the program loaded into RTC memory
+ * @return  ESP_OK on success
+ */
+esp_err_t ulp_riscv_run(void);
+
+/**
+ * @brief Load ULP-RISC-V program binary into RTC memory
+ *
+ * Different than ULP FSM, the binary program has no special format, it is the ELF
+ * file generated by RISC-V toolchain converted to binary format using objcopy.
+ *
+ * Linker script in components/ulp/ld/esp32s2.ulp.riscv.ld produces ELF files which
+ * correspond to this format. This linker script produces binaries with load_addr == 0.
+ *
+ * @param program_binary pointer to program binary
+ * @param program_size_bytes size of the program binary
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_SIZE if program_size_bytes is more than 8KiB
+ */
+esp_err_t ulp_riscv_load_binary(const uint8_t* program_binary, size_t program_size_bytes);
diff --git a/tools/sdk/esp32s3/include/ulp/include/esp32s3/ulp.h b/tools/sdk/esp32s3/include/ulp/include/esp32s3/ulp.h
new file mode 100644
index 00000000000..9207a00ead1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/ulp/include/esp32s3/ulp.h
@@ -0,0 +1,840 @@
+// Copyright 2016-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+#include <stddef.h>
+#include <stdlib.h>
+#include "esp_err.h"
+#include "soc/soc.h"
+#include "ulp_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ULP_FSM_PREPARE_SLEEP_CYCLES 2    /*!< Cycles spent by FSM preparing ULP for sleep */
+#define ULP_FSM_WAKEUP_SLEEP_CYCLES  2    /*!< Cycles spent by FSM waking up ULP from sleep */
+
+/**
+ * @defgroup ulp_registers ULP coprocessor registers
+ * @{
+ */
+
+
+#define R0 0    /*!< general purpose register 0 */
+#define R1 1    /*!< general purpose register 1 */
+#define R2 2    /*!< general purpose register 2 */
+#define R3 3    /*!< general purpose register 3 */
+/**@}*/
+
+/** @defgroup ulp_opcodes ULP coprocessor opcodes, sub opcodes, and various modifiers/flags
+ *
+ * These definitions are not intended to be used directly.
+ * They are used in definitions of instructions later on.
+ *
+ * @{
+ */
+
+#define OPCODE_WR_REG 1         /*!< Instruction: write peripheral register (RTC_CNTL/RTC_IO/SARADC) (not implemented yet) */
+
+#define OPCODE_RD_REG 2         /*!< Instruction: read peripheral register (RTC_CNTL/RTC_IO/SARADC) (not implemented yet) */
+
+#define RD_REG_PERIPH_RTC_CNTL 0    /*!< Identifier of RTC_CNTL peripheral for RD_REG and WR_REG instructions */
+#define RD_REG_PERIPH_RTC_IO   1    /*!< Identifier of RTC_IO peripheral for RD_REG and WR_REG instructions */
+#define RD_REG_PERIPH_SENS     2    /*!< Identifier of SARADC peripheral for RD_REG and WR_REG instructions */
+#define RD_REG_PERIPH_RTC_I2C  3    /*!< Identifier of RTC_I2C peripheral for RD_REG and WR_REG instructions */
+
+#define OPCODE_I2C 3            /*!< Instruction: read/write I2C (not implemented yet) */
+
+#define OPCODE_DELAY 4          /*!< Instruction: delay (nop) for a given number of cycles */
+
+#define OPCODE_ADC 5            /*!< Instruction: SAR ADC measurement (not implemented yet) */
+
+#define OPCODE_ST 6             /*!< Instruction: store indirect to RTC memory */
+#define SUB_OPCODE_ST 4         /*!< Store 32 bits, 16 MSBs contain PC, 16 LSBs contain value from source register */
+
+#define OPCODE_ALU 7            /*!< Arithmetic instructions */
+#define SUB_OPCODE_ALU_REG 0    /*!< Arithmetic instruction, both source values are in register */
+#define SUB_OPCODE_ALU_IMM 1    /*!< Arithmetic instruction, one source value is an immediate */
+#define SUB_OPCODE_ALU_CNT 2    /*!< Arithmetic instruction between counter register and an immediate (not implemented yet)*/
+#define ALU_SEL_ADD 0           /*!< Addition */
+#define ALU_SEL_SUB 1           /*!< Subtraction */
+#define ALU_SEL_AND 2           /*!< Logical AND */
+#define ALU_SEL_OR  3           /*!< Logical OR */
+#define ALU_SEL_MOV 4           /*!< Copy value (immediate to destination register or source register to destination register */
+#define ALU_SEL_LSH 5           /*!< Shift left by given number of bits */
+#define ALU_SEL_RSH 6           /*!< Shift right by given number of bits */
+
+#define OPCODE_BRANCH 8         /*!< Branch instructions */
+#define SUB_OPCODE_BX  0        /*!< Branch to absolute PC (immediate or in register) */
+#define BX_JUMP_TYPE_DIRECT 0   /*!< Unconditional jump */
+#define BX_JUMP_TYPE_ZERO 1     /*!< Branch if last ALU result is zero */
+#define BX_JUMP_TYPE_OVF 2      /*!< Branch if last ALU operation caused and overflow */
+#define SUB_OPCODE_B  1         /*!< Branch to a relative offset */
+#define B_CMP_L 0               /*!< Branch if R0 is less than an immediate */
+#define B_CMP_GE 1              /*!< Branch if R0 is greater than or equal to an immediate */
+
+#define OPCODE_END 9            /*!< Stop executing the program */
+#define SUB_OPCODE_END 0        /*!< Stop executing the program and optionally wake up the chip */
+#define SUB_OPCODE_SLEEP 1      /*!< Stop executing the program and run it again after selected interval */
+
+#define OPCODE_TSENS 10         /*!< Instruction: temperature sensor measurement (not implemented yet) */
+
+#define OPCODE_HALT 11          /*!< Halt the coprocessor */
+
+#define OPCODE_LD 13            /*!< Indirect load lower 16 bits from RTC memory */
+
+#define OPCODE_MACRO 15         /*!< Not a real opcode. Used to identify labels and branches in the program */
+#define SUB_OPCODE_MACRO_LABEL 0    /*!< Label macro */
+#define SUB_OPCODE_MACRO_BRANCH 1   /*!< Branch macro */
+/**@}*/
+
+/**
+ * @brief Instruction format structure
+ *
+ * All ULP instructions are 32 bit long.
+ * This union contains field layouts used by all of the supported instructions.
+ * This union also includes a special "macro" instruction layout.
+ * This is not a real instruction which can be executed by the CPU. It acts
+ * as a token which is removed from the program by the
+ * ulp_process_macros_and_load function.
+ *
+ * These structures are not intended to be used directly.
+ * Preprocessor definitions provided below fill the fields of these structure with
+ * the right arguments.
+ */
+union ulp_insn {
+
+    struct {
+        uint32_t cycles : 16;       /*!< Number of cycles to sleep */
+        uint32_t unused : 12;       /*!< Unused */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_DELAY) */
+    } delay;                        /*!< Format of DELAY instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register which contains data to store */
+        uint32_t sreg : 2;          /*!< Register which contains address in RTC memory (expressed in words) */
+        uint32_t unused1 : 6;       /*!< Unused */
+        uint32_t offset : 11;       /*!< Offset to add to sreg */
+        uint32_t unused2 : 4;       /*!< Unused */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_ST) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_ST) */
+    } st;                           /*!< Format of ST instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register where the data should be loaded to */
+        uint32_t sreg : 2;          /*!< Register which contains address in RTC memory (expressed in words) */
+        uint32_t unused1 : 6;       /*!< Unused */
+        uint32_t offset : 11;       /*!< Offset to add to sreg */
+        uint32_t unused2 : 7;       /*!< Unused */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_LD) */
+    } ld;                           /*!< Format of LD instruction */
+
+    struct {
+        uint32_t unused : 28;       /*!< Unused */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_HALT) */
+    } halt;                         /*!< Format of HALT instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register which contains target PC, expressed in words (used if .reg == 1) */
+        uint32_t addr : 11;         /*!< Target PC, expressed in words (used if .reg == 0) */
+        uint32_t unused : 8;        /*!< Unused */
+        uint32_t reg : 1;           /*!< Target PC in register (1) or immediate (0) */
+        uint32_t type : 3;          /*!< Jump condition (BX_JUMP_TYPE_xxx) */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_BX) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_BRANCH) */
+    } bx;                           /*!< Format of BRANCH instruction (absolute address) */
+
+    struct {
+        uint32_t imm : 16;          /*!< Immediate value to compare against */
+        uint32_t cmp : 1;           /*!< Comparison to perform: B_CMP_L or B_CMP_GE */
+        uint32_t offset : 7;        /*!< Absolute value of target PC offset w.r.t. current PC, expressed in words */
+        uint32_t sign : 1;          /*!< Sign of target PC offset: 0: positive, 1: negative */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_B) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_BRANCH) */
+    } b;                            /*!< Format of BRANCH instruction (relative address) */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Destination register */
+        uint32_t sreg : 2;          /*!< Register with operand A */
+        uint32_t treg : 2;          /*!< Register with operand B */
+        uint32_t unused : 15;       /*!< Unused */
+        uint32_t sel : 4;           /*!< Operation to perform, one of ALU_SEL_xxx */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_ALU_REG) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_ALU) */
+    } alu_reg;                      /*!< Format of ALU instruction (both sources are registers) */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Destination register */
+        uint32_t sreg : 2;          /*!< Register with operand A */
+        uint32_t imm : 16;          /*!< Immediate value of operand B */
+        uint32_t unused : 1;        /*!< Unused */
+        uint32_t sel : 4;           /*!< Operation to perform, one of ALU_SEL_xxx */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_ALU_IMM) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_ALU) */
+    } alu_imm;                      /*!< Format of ALU instruction (one source is an immediate) */
+
+    struct {
+        uint32_t addr : 8;          /*!< Address within either RTC_CNTL, RTC_IO, or SARADC */
+        uint32_t periph_sel : 2;    /*!< Select peripheral: RTC_CNTL (0), RTC_IO(1), SARADC(2) */
+        uint32_t data : 8;          /*!< 8 bits of data to write */
+        uint32_t low : 5;           /*!< Low bit */
+        uint32_t high : 5;          /*!< High bit */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_WR_REG) */
+    } wr_reg;                       /*!< Format of WR_REG instruction */
+
+    struct {
+        uint32_t addr : 8;          /*!< Address within either RTC_CNTL, RTC_IO, or SARADC */
+        uint32_t periph_sel : 2;    /*!< Select peripheral: RTC_CNTL (0), RTC_IO(1), SARADC(2) */
+        uint32_t unused : 8;        /*!< Unused */
+        uint32_t low : 5;           /*!< Low bit */
+        uint32_t high : 5;          /*!< High bit */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_WR_REG) */
+    } rd_reg;                       /*!< Format of RD_REG instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register where to store ADC result */
+        uint32_t mux : 4;           /*!< Select SARADC pad (mux + 1) */
+        uint32_t sar_sel : 1;       /*!< Select SARADC0 (0) or SARADC1 (1) */
+        uint32_t unused1 : 1;       /*!< Unused */
+        uint32_t cycles : 16;       /*!< TBD, cycles used for measurement */
+        uint32_t unused2 : 4;       /*!< Unused */
+        uint32_t opcode: 4;         /*!< Opcode (OPCODE_ADC) */
+    } adc;                          /*!< Format of ADC instruction */
+
+    struct {
+        uint32_t dreg : 2;          /*!< Register where to store temperature measurement result */
+        uint32_t wait_delay: 14;    /*!< Cycles to wait after measurement is done */
+        uint32_t reserved: 12;      /*!< Reserved, set to 0 */
+        uint32_t opcode: 4;         /*!< Opcode (OPCODE_TSENS) */
+    } tsens;                        /*!< Format of TSENS instruction */
+
+    struct {
+        uint32_t i2c_addr : 8;      /*!< I2C slave address */
+        uint32_t data : 8;          /*!< Data to read or write */
+        uint32_t low_bits : 3;      /*!< TBD */
+        uint32_t high_bits : 3;     /*!< TBD */
+        uint32_t i2c_sel : 4;       /*!< TBD, select reg_i2c_slave_address[7:0] */
+        uint32_t unused : 1;        /*!< Unused */
+        uint32_t rw : 1;            /*!< Write (1) or read (0) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_I2C) */
+    } i2c;                          /*!< Format of I2C instruction */
+
+    struct {
+        uint32_t wakeup : 1;        /*!< Set to 1 to wake up chip */
+        uint32_t unused : 24;       /*!< Unused */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_WAKEUP) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_END) */
+    } end;                          /*!< Format of END instruction with wakeup */
+
+    struct {
+        uint32_t cycle_sel : 4;     /*!< Select which one of SARADC_ULP_CP_SLEEP_CYCx_REG to get the sleep duration from */
+        uint32_t unused : 21;       /*!< Unused */
+        uint32_t sub_opcode : 3;    /*!< Sub opcode (SUB_OPCODE_SLEEP) */
+        uint32_t opcode : 4;        /*!< Opcode (OPCODE_END) */
+    } sleep;                        /*!< Format of END instruction with sleep */
+
+    struct {
+        uint32_t label : 16;        /*!< Label number */
+        uint32_t unused : 8;        /*!< Unused */
+        uint32_t sub_opcode : 4;    /*!< SUB_OPCODE_MACRO_LABEL or SUB_OPCODE_MACRO_BRANCH */
+        uint32_t opcode: 4;         /*!< Opcode (OPCODE_MACRO) */
+    } macro;                        /*!< Format of tokens used by LABEL and BRANCH macros */
+
+};
+
+typedef union ulp_insn ulp_insn_t;
+
+_Static_assert(sizeof(ulp_insn_t) == 4, "ULP coprocessor instruction size should be 4 bytes");
+
+/**
+ * Delay (nop) for a given number of cycles
+ */
+#define I_DELAY(cycles_) { .delay = {\
+    .cycles = cycles_, \
+    .unused = 0, \
+    .opcode = OPCODE_DELAY } }
+
+/**
+ * Halt the coprocessor.
+ *
+ * This instruction halts the coprocessor, but keeps ULP timer active.
+ * As such, ULP program will be restarted again by timer.
+ * To stop the program and prevent the timer from restarting the program,
+ * use I_END(0) instruction.
+ */
+#define I_HALT() { .halt = {\
+    .unused = 0, \
+    .opcode = OPCODE_HALT } }
+
+/**
+ * Map SoC peripheral register to periph_sel field of RD_REG and WR_REG
+ * instructions.
+ *
+ * @param reg peripheral register in RTC_CNTL_, RTC_IO_, SENS_, RTC_I2C peripherals.
+ * @return periph_sel value for the peripheral to which this register belongs.
+ */
+static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg)
+{
+    uint32_t ret = 3;
+    if (reg < DR_REG_RTCCNTL_BASE) {
+        assert(0 && "invalid register base");
+    } else if (reg < DR_REG_RTCIO_BASE) {
+        ret = RD_REG_PERIPH_RTC_CNTL;
+    } else if (reg < DR_REG_SENS_BASE) {
+        ret = RD_REG_PERIPH_RTC_IO;
+    } else if (reg < DR_REG_RTC_I2C_BASE) {
+        ret = RD_REG_PERIPH_SENS;
+    } else if (reg < DR_REG_IO_MUX_BASE) {
+        ret = RD_REG_PERIPH_RTC_I2C;
+    } else {
+        assert(0 && "invalid register base");
+    }
+    return ret;
+}
+
+/**
+ * Write literal value to a peripheral register
+ *
+ * reg[high_bit : low_bit] = val
+ * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
+ */
+#define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
+    .addr = (reg & 0xff) / sizeof(uint32_t), \
+    .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
+    .data = val, \
+    .low = low_bit, \
+    .high = high_bit, \
+    .opcode = OPCODE_WR_REG } }
+
+/**
+ * Read from peripheral register into R0
+ *
+ * R0 = reg[high_bit : low_bit]
+ * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
+ */
+#define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\
+    .addr = (reg & 0xff) / sizeof(uint32_t), \
+    .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
+    .unused = 0, \
+    .low = low_bit, \
+    .high = high_bit, \
+    .opcode = OPCODE_RD_REG } }
+
+/**
+ * Set or clear a bit in the peripheral register.
+ *
+ * Sets bit (1 << shift) of register reg to value val.
+ * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
+ */
+#define I_WR_REG_BIT(reg, shift, val) I_WR_REG(reg, shift, shift, val)
+
+/**
+ * Wake the SoC from deep sleep.
+ *
+ * This instruction initiates wake up from deep sleep.
+ * Use esp_deep_sleep_enable_ulp_wakeup to enable deep sleep wakeup
+ * triggered by the ULP before going into deep sleep.
+ * Note that ULP program will still keep running until the I_HALT
+ * instruction, and it will still be restarted by timer at regular
+ * intervals, even when the SoC is woken up.
+ *
+ * To stop the ULP program, use I_HALT instruction.
+ *
+ * To disable the timer which start ULP program, use I_END()
+ * instruction. I_END instruction clears the
+ * RTC_CNTL_ULP_CP_SLP_TIMER_EN_S bit of RTC_CNTL_STATE0_REG
+ * register, which controls the ULP timer.
+ */
+#define I_WAKE() { .end = { \
+        .wakeup = 1, \
+        .unused = 0, \
+        .sub_opcode = SUB_OPCODE_END, \
+        .opcode = OPCODE_END } }
+
+/**
+ * Stop ULP program timer.
+ *
+ * This is a convenience macro which disables the ULP program timer.
+ * Once this instruction is used, ULP program will not be restarted
+ * anymore until ulp_run function is called.
+ *
+ * ULP program will continue running after this instruction. To stop
+ * the currently running program, use I_HALT().
+ */
+#define I_END() \
+    I_WR_REG_BIT(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN_S, 0)
+/**
+ * Select the time interval used to run ULP program.
+ *
+ * This instructions selects which of the SENS_SLEEP_CYCLES_Sx
+ * registers' value is used by the ULP program timer.
+ * When the ULP program stops at I_HALT instruction, ULP program
+ * timer start counting. When the counter reaches the value of
+ * the selected SENS_SLEEP_CYCLES_Sx register, ULP program
+ * start running again from the start address (passed to the ulp_run
+ * function).
+ * There are 5 SENS_SLEEP_CYCLES_Sx registers, so 0 <= timer_idx < 5.
+ *
+ * By default, SENS_SLEEP_CYCLES_S0 register is used by the ULP
+ * program timer.
+ */
+#define I_SLEEP_CYCLE_SEL(timer_idx) { .sleep = { \
+        .cycle_sel = timer_idx, \
+        .unused = 0, \
+        .sub_opcode = SUB_OPCODE_SLEEP, \
+        .opcode = OPCODE_END } }
+
+/**
+ * Perform temperature sensor measurement and store it into reg_dest.
+ *
+ * Delay can be set between 1 and ((1 << 14) - 1). Higher values give
+ * higher measurement resolution.
+ */
+#define I_TSENS(reg_dest, delay) { .tsens = { \
+        .dreg = reg_dest, \
+        .wait_delay = delay, \
+        .reserved = 0, \
+        .opcode = OPCODE_TSENS } }
+
+/**
+ * Perform ADC measurement and store result in reg_dest.
+ *
+ * adc_idx selects ADC (0 or 1).
+ * pad_idx selects ADC pad (0 - 7).
+ */
+#define I_ADC(reg_dest, adc_idx, pad_idx) { .adc = {\
+        .dreg = reg_dest, \
+        .mux = pad_idx + 1, \
+        .sar_sel = adc_idx, \
+        .unused1 = 0, \
+        .cycles = 0, \
+        .unused2 = 0, \
+        .opcode = OPCODE_ADC } }
+
+/**
+ * Store value from register reg_val into RTC memory.
+ *
+ * The value is written to an offset calculated by adding value of
+ * reg_addr register and offset_ field (this offset is expressed in 32-bit words).
+ * 32 bits written to RTC memory are built as follows:
+ * - bits [31:21] hold the PC of current instruction, expressed in 32-bit words
+ * - bits [20:16] = 5'b1
+ * - bits [15:0] are assigned the contents of reg_val
+ *
+ * RTC_SLOW_MEM[addr + offset_] = { 5'b0, insn_PC[10:0], val[15:0] }
+ */
+#define I_ST(reg_val, reg_addr, offset_) { .st = { \
+    .dreg = reg_val, \
+    .sreg = reg_addr, \
+    .unused1 = 0, \
+    .offset = offset_, \
+    .unused2 = 0, \
+    .sub_opcode = SUB_OPCODE_ST, \
+    .opcode = OPCODE_ST } }
+
+
+/**
+ * Load value from RTC memory into reg_dest register.
+ *
+ * Loads 16 LSBs from RTC memory word given by the sum of value in reg_addr and
+ * value of offset_.
+ */
+#define I_LD(reg_dest, reg_addr, offset_) { .ld = { \
+    .dreg = reg_dest, \
+    .sreg = reg_addr, \
+    .unused1 = 0, \
+    .offset = offset_, \
+    .unused2 = 0, \
+    .opcode = OPCODE_LD } }
+
+
+/**
+ *  Branch relative if R0 less than immediate value.
+ *
+ *  pc_offset is expressed in words, and can be from -127 to 127
+ *  imm_value is a 16-bit value to compare R0 against
+ */
+#define I_BL(pc_offset, imm_value) { .b = { \
+    .imm = imm_value, \
+    .cmp = B_CMP_L, \
+    .offset = abs(pc_offset), \
+    .sign = (pc_offset >= 0) ? 0 : 1, \
+    .sub_opcode = SUB_OPCODE_B, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ *  Branch relative if R0 greater or equal than immediate value.
+ *
+ *  pc_offset is expressed in words, and can be from -127 to 127
+ *  imm_value is a 16-bit value to compare R0 against
+ */
+#define I_BGE(pc_offset, imm_value) { .b = { \
+    .imm = imm_value, \
+    .cmp = B_CMP_GE, \
+    .offset = abs(pc_offset), \
+    .sign = (pc_offset >= 0) ? 0 : 1, \
+    .sub_opcode = SUB_OPCODE_B, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Unconditional branch to absolute PC, address in register.
+ *
+ * reg_pc is the register which contains address to jump to.
+ * Address is expressed in 32-bit words.
+ */
+#define I_BXR(reg_pc) { .bx = { \
+    .dreg = reg_pc, \
+    .addr = 0, \
+    .unused = 0, \
+    .reg = 1, \
+    .type = BX_JUMP_TYPE_DIRECT, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ *  Unconditional branch to absolute PC, immediate address.
+ *
+ *  Address imm_pc is expressed in 32-bit words.
+ */
+#define I_BXI(imm_pc) { .bx = { \
+    .dreg = 0, \
+    .addr = imm_pc, \
+    .unused = 0, \
+    .reg = 0, \
+    .type = BX_JUMP_TYPE_DIRECT, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU result is zero, address in register.
+ *
+ * reg_pc is the register which contains address to jump to.
+ * Address is expressed in 32-bit words.
+ */
+#define I_BXZR(reg_pc) { .bx = { \
+    .dreg = reg_pc, \
+    .addr = 0, \
+    .unused = 0, \
+    .reg = 1, \
+    .type = BX_JUMP_TYPE_ZERO, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU result is zero, immediate address.
+ *
+ * Address imm_pc is expressed in 32-bit words.
+ */
+#define I_BXZI(imm_pc) { .bx = { \
+    .dreg = 0, \
+    .addr = imm_pc, \
+    .unused = 0, \
+    .reg = 0, \
+    .type = BX_JUMP_TYPE_ZERO, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU overflow, address in register
+ *
+ * reg_pc is the register which contains address to jump to.
+ * Address is expressed in 32-bit words.
+ */
+#define I_BXFR(reg_pc) { .bx = { \
+    .dreg = reg_pc, \
+    .addr = 0, \
+    .unused = 0, \
+    .reg = 1, \
+    .type = BX_JUMP_TYPE_OVF, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+/**
+ * Branch to absolute PC if ALU overflow, immediate address
+ *
+ * Address imm_pc is expressed in 32-bit words.
+ */
+#define I_BXFI(imm_pc) { .bx = { \
+    .dreg = 0, \
+    .addr = imm_pc, \
+    .unused = 0, \
+    .reg = 0, \
+    .type = BX_JUMP_TYPE_OVF, \
+    .sub_opcode = SUB_OPCODE_BX, \
+    .opcode = OPCODE_BRANCH } }
+
+
+/**
+ * Addition: dest = src1 + src2
+ */
+#define I_ADDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_ADD, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Subtraction: dest = src1 - src2
+ */
+#define I_SUBR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_SUB, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical AND: dest = src1 & src2
+ */
+#define I_ANDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_AND, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical OR: dest = src1 | src2
+ */
+#define I_ORR(reg_dest, reg_src1, reg_src2)  { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src1, \
+    .treg = reg_src2, \
+    .unused = 0, \
+    .sel = ALU_SEL_OR, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Copy: dest = src
+ */
+#define I_MOVR(reg_dest, reg_src) { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .treg = 0, \
+    .unused = 0, \
+    .sel = ALU_SEL_MOV, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical shift left: dest = src << shift
+ */
+#define I_LSHR(reg_dest, reg_src, reg_shift)  { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .treg = reg_shift, \
+    .unused = 0, \
+    .sel = ALU_SEL_LSH, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+
+/**
+ * Logical shift right: dest = src >> shift
+ */
+#define I_RSHR(reg_dest, reg_src, reg_shift)  { .alu_reg = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .treg = reg_shift, \
+    .unused = 0, \
+    .sel = ALU_SEL_RSH, \
+    .sub_opcode = SUB_OPCODE_ALU_REG, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Add register and an immediate value: dest = src1 + imm
+ */
+#define I_ADDI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_ADD, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+
+/**
+ *  Subtract register and an immediate value: dest = src - imm
+ */
+#define I_SUBI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_SUB, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical AND register and an immediate value: dest = src & imm
+ */
+#define I_ANDI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_AND, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical OR register and an immediate value: dest = src | imm
+ */
+#define I_ORI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_OR, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Copy an immediate value into register: dest = imm
+ */
+#define I_MOVI(reg_dest, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = 0, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_MOV, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Logical shift left register value by an immediate: dest = src << imm
+ */
+#define I_LSHI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_LSH, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+
+/**
+ * Logical shift right register value by an immediate: dest = val >> imm
+ */
+#define I_RSHI(reg_dest, reg_src, imm_) { .alu_imm = { \
+    .dreg = reg_dest, \
+    .sreg = reg_src, \
+    .imm = imm_, \
+    .unused = 0, \
+    .sel = ALU_SEL_RSH, \
+    .sub_opcode = SUB_OPCODE_ALU_IMM, \
+    .opcode = OPCODE_ALU } }
+
+/**
+ * Define a label with number label_num.
+ *
+ * This is a macro which doesn't generate a real instruction.
+ * The token generated by this macro is removed by ulp_process_macros_and_load
+ * function. Label defined using this macro can be used in branch macros defined
+ * below.
+ */
+#define M_LABEL(label_num) { .macro = { \
+    .label = label_num, \
+    .unused = 0, \
+    .sub_opcode = SUB_OPCODE_MACRO_LABEL, \
+    .opcode = OPCODE_MACRO } }
+
+/**
+ * Token macro used by M_B and M_BX macros. Not to be used directly.
+ */
+#define M_BRANCH(label_num) { .macro = { \
+    .label = label_num, \
+    .unused = 0, \
+    .sub_opcode = SUB_OPCODE_MACRO_BRANCH, \
+    .opcode = OPCODE_MACRO } }
+
+/**
+ * Macro: branch to label label_num if R0 is less than immediate value.
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BL(label_num, imm_value) \
+    M_BRANCH(label_num), \
+    I_BL(0, imm_value)
+
+/**
+ * Macro: branch to label label_num if R0 is greater or equal than immediate value
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BGE(label_num, imm_value) \
+    M_BRANCH(label_num), \
+    I_BGE(0, imm_value)
+
+/**
+ * Macro: unconditional branch to label
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BX(label_num) \
+    M_BRANCH(label_num), \
+    I_BXI(0)
+
+/**
+ * Macro: branch to label if ALU result is zero
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BXZ(label_num) \
+    M_BRANCH(label_num), \
+    I_BXZI(0)
+
+/**
+ * Macro: branch to label if ALU overflow
+ *
+ * This macro generates two ulp_insn_t values separated by a comma, and should
+ * be used when defining contents of ulp_insn_t arrays. First value is not a
+ * real instruction; it is a token which is removed by ulp_process_macros_and_load
+ * function.
+ */
+#define M_BXF(label_num) \
+    M_BRANCH(label_num), \
+    I_BXFI(0)
+
+
+
+#define RTC_SLOW_MEM ((uint32_t*) 0x50000000)       /*!< RTC slow memory, 8k size */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/ulp/include/ulp_common.h b/tools/sdk/esp32s3/include/ulp/include/ulp_common.h
new file mode 100644
index 00000000000..7ca7b85943c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/ulp/include/ulp_common.h
@@ -0,0 +1,116 @@
+// Copyright 2016-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+/* This file contains definitions that are common between esp32/ulp.h
+   and esp32s2/ulp.h
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**@{*/
+#define ESP_ERR_ULP_BASE                0x1200                  /*!< Offset for ULP-related error codes */
+#define ESP_ERR_ULP_SIZE_TOO_BIG        (ESP_ERR_ULP_BASE + 1)  /*!< Program doesn't fit into RTC memory reserved for the ULP */
+#define ESP_ERR_ULP_INVALID_LOAD_ADDR   (ESP_ERR_ULP_BASE + 2)  /*!< Load address is outside of RTC memory reserved for the ULP */
+#define ESP_ERR_ULP_DUPLICATE_LABEL     (ESP_ERR_ULP_BASE + 3)  /*!< More than one label with the same number was defined */
+#define ESP_ERR_ULP_UNDEFINED_LABEL     (ESP_ERR_ULP_BASE + 4)  /*!< Branch instructions references an undefined label */
+#define ESP_ERR_ULP_BRANCH_OUT_OF_RANGE (ESP_ERR_ULP_BASE + 5)  /*!< Branch target is out of range of B instruction (try replacing with BX) */
+/**@}*/
+
+union ulp_insn;  // Declared in the chip-specific ulp.h header
+
+typedef union ulp_insn ulp_insn_t;
+
+/**
+ * @brief Resolve all macro references in a program and load it into RTC memory
+ * @param load_addr  address where the program should be loaded, expressed in 32-bit words
+ * @param program  ulp_insn_t array with the program
+ * @param psize  size of the program, expressed in 32-bit words
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_NO_MEM if auxiliary temporary structure can not be allocated
+ *      - one of ESP_ERR_ULP_xxx if program is not valid or can not be loaded
+ */
+esp_err_t ulp_process_macros_and_load(uint32_t load_addr, const ulp_insn_t* program, size_t* psize);
+
+/**
+ * @brief Load ULP program binary into RTC memory
+ *
+ * ULP program binary should have the following format (all values little-endian):
+ *
+ * 1. MAGIC, (value 0x00706c75, 4 bytes)
+ * 2. TEXT_OFFSET, offset of .text section from binary start (2 bytes)
+ * 3. TEXT_SIZE, size of .text section (2 bytes)
+ * 4. DATA_SIZE, size of .data section (2 bytes)
+ * 5. BSS_SIZE, size of .bss section (2 bytes)
+ * 6. (TEXT_OFFSET - 12) bytes of arbitrary data (will not be loaded into RTC memory)
+ * 7. .text section
+ * 8. .data section
+ *
+ * Linker script in components/ulp/ld/esp32.ulp.ld produces ELF files which
+ * correspond to this format. This linker script produces binaries with load_addr == 0.
+ *
+ * @param load_addr address where the program should be loaded, expressed in 32-bit words
+ * @param program_binary pointer to program binary
+ * @param program_size size of the program binary
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if load_addr is out of range
+ *      - ESP_ERR_INVALID_SIZE if program_size doesn't match (TEXT_OFFSET + TEXT_SIZE + DATA_SIZE)
+ *      - ESP_ERR_NOT_SUPPORTED if the magic number is incorrect
+ */
+esp_err_t ulp_load_binary(uint32_t load_addr, const uint8_t* program_binary, size_t program_size);
+
+/**
+ * @brief Run the program loaded into RTC memory
+ * @param entry_point entry point, expressed in 32-bit words
+ * @return  ESP_OK on success
+ */
+esp_err_t ulp_run(uint32_t entry_point);
+
+/**
+ * @brief Set one of ULP wakeup period values
+ *
+ * ULP coprocessor starts running the program when the wakeup timer counts up
+ * to a given value (called period). There are 5 period values which can be
+ * programmed into SENS_ULP_CP_SLEEP_CYCx_REG registers, x = 0..4 for ESP32, and
+ * one period value which can be programmed into RTC_CNTL_ULP_CP_TIMER_1_REG register for ESP32-S2.
+ * By default, for ESP32, wakeup timer will use the period set into SENS_ULP_CP_SLEEP_CYC0_REG,
+ * i.e. period number 0. ULP program code can use SLEEP instruction to select
+ * which of the SENS_ULP_CP_SLEEP_CYCx_REG should be used for subsequent wakeups.
+ *
+ * However, please note that SLEEP instruction issued (from ULP program) while the system
+ * is in deep sleep mode does not have effect, and sleep cycle count 0 is used.
+ *
+ * For ESP32-s2 the SLEEP instruction not exist. Instead a WAKE instruction will be used.
+ *
+ * @param period_index wakeup period setting number (0 - 4)
+ * @param period_us wakeup period, us
+ * @note  The ULP FSM requires two clock cycles to wakeup before being able to run the program.
+ *        Then additional 16 cycles are reserved after wakeup waiting until the 8M clock is stable.
+ *        The FSM also requires two more clock cycles to go to sleep after the program execution is halted.
+ *        The minimum wakeup period that may be set up for the ULP
+ *        is equal to the total number of cycles spent on the above internal tasks.
+ *        For a default configuration of the ULP running at 150kHz it makes about 133us.
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if period_index is out of range
+ */
+esp_err_t ulp_set_wakeup_period(size_t period_index, uint32_t period_us);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/unity/include/priv/setjmp.h b/tools/sdk/esp32s3/include/unity/include/priv/setjmp.h
new file mode 100644
index 00000000000..c467cbd94a1
--- /dev/null
+++ b/tools/sdk/esp32s3/include/unity/include/priv/setjmp.h
@@ -0,0 +1,14 @@
+#include_next <setjmp.h>
+#include "esp_debug_helpers.h"
+
+/*
+ * This is the middle layer of setjmp to be used with the unity.
+ */
+
+/** Insert backtrace before longjmp (TEST_ABORT).
+ *
+ * Currently we only do long jump before test is ignored or failed.
+ * If this is also called when test pass, we may need to add some check before
+ * backtrace is called.
+ */
+#define longjmp(buf, val) do {esp_backtrace_print(100); longjmp(buf, val);} while(0)
diff --git a/tools/sdk/esp32s3/include/unity/include/unity_config.h b/tools/sdk/esp32s3/include/unity/include/unity_config.h
new file mode 100644
index 00000000000..32f97190087
--- /dev/null
+++ b/tools/sdk/esp32s3/include/unity/include/unity_config.h
@@ -0,0 +1,61 @@
+#ifndef UNITY_CONFIG_H
+#define UNITY_CONFIG_H
+
+// This file gets included from unity.h via unity_internals.h
+// It is inside #ifdef __cplusplus / extern "C" block, so we can
+// only use C features here
+
+#include <esp_err.h>
+#include <stddef.h>
+#include "sdkconfig.h"
+
+#ifdef CONFIG_UNITY_ENABLE_FLOAT
+#define UNITY_INCLUDE_FLOAT
+#else
+#define UNITY_EXCLUDE_FLOAT
+#endif //CONFIG_UNITY_ENABLE_FLOAT
+
+#ifdef CONFIG_UNITY_ENABLE_DOUBLE
+#define UNITY_INCLUDE_DOUBLE
+#else
+#define UNITY_EXCLUDE_DOUBLE
+#endif //CONFIG_UNITY_ENABLE_DOUBLE
+
+#ifdef CONFIG_UNITY_ENABLE_64BIT
+#define UNITY_SUPPORT_64
+#endif
+
+#ifdef CONFIG_UNITY_ENABLE_COLOR
+#define UNITY_OUTPUT_COLOR
+#endif
+
+#define UNITY_EXCLUDE_TIME_H
+
+void unity_flush(void);
+void unity_putc(int c);
+void unity_gets(char* dst, size_t len);
+void unity_exec_time_start(void);
+void unity_exec_time_stop(void);
+uint32_t unity_exec_time_get_ms(void);
+
+#define UNITY_OUTPUT_CHAR(a)    unity_putc(a)
+#define UNITY_OUTPUT_FLUSH()    unity_flush()
+#define UNITY_EXEC_TIME_START() unity_exec_time_start()
+#define UNITY_EXEC_TIME_STOP()  unity_exec_time_stop()
+#define UNITY_EXEC_TIME_MS()    unity_exec_time_get_ms()
+
+#ifdef CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER
+
+#include "unity_test_runner.h"
+
+#endif //CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER
+
+#ifdef CONFIG_UNITY_ENABLE_FIXTURE
+#include "unity_fixture_extras.h"
+#endif // CONFIG_UNITY_ENABLE_FIXTURE
+
+// shorthand to check esp_err_t return code
+#define TEST_ESP_OK(rc) TEST_ASSERT_EQUAL_HEX32(ESP_OK, rc)
+#define TEST_ESP_ERR(err, rc) TEST_ASSERT_EQUAL_HEX32(err, rc)
+
+#endif //UNITY_CONFIG_H
diff --git a/tools/sdk/esp32s3/include/unity/include/unity_fixture_extras.h b/tools/sdk/esp32s3/include/unity/include/unity_fixture_extras.h
new file mode 100644
index 00000000000..c6ad8ba46d8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/unity/include/unity_fixture_extras.h
@@ -0,0 +1,78 @@
+// Copyright 2016-2021 Espressif Systems (Shanghai) Co. Ltd.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/* IDF-specific additions to "Unity Fixture".
+ * This file doesn't need to be included directly, it gets included into unity.h
+ * through unity_config.h.
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(CONFIG_IDF_TARGET) || defined(CONFIG_IDF_TARGET_LINUX)
+#define UNITY_MAYBE_EXIT(rc)  do { exit(rc); } while(0)
+#else
+#define UNITY_MAYBE_EXIT(rc)  do { (void) rc; } while(0)
+#endif
+
+/* A shorthand for running all tests called from one function "func_", from the app_main function.
+ * Use this when there is more than one test group.
+ *
+ * Example:
+ *
+ *    #include "unity.h"
+ *    #include "unity_fixture.h"
+ *
+ *    static_void run_all_tests(void) {
+ *        RUN_TEST_GROUP(group1);   // test group defined in another file, e.g. test_group1.c
+ *        RUN_TEST_GROUP(group2);   // test group defined in another file, e.g. test_group2.c
+ *    }
+ *
+ *    void app_main(void) {
+ *        UNITY_MAIN_FUNC(run_all_tests);
+ *    }
+ */
+#define UNITY_MAIN_FUNC(func_) do { \
+    const char* argv[] = { "test", "-v" }; \
+    const int argc = sizeof(argv)/sizeof(argv[0]); \
+    int rc = UnityMain(argc, argv, func_); \
+    printf("\nTests finished, rc=%d\n", rc); \
+    UNITY_MAYBE_EXIT(rc); \
+} while(0)
+
+/* A shorthand for running one test group from the app_main function, when there is only
+ * one test group and it is defined in the same file.
+ *
+ * Example:
+ *
+ *    #include "unity.h"
+ *    #include "unity_fixture.h"
+ *
+ *    TEST_GROUP(my_feature);
+ *    // also define TEST_SETUP, TEST_TEARDOWN, TESTs, TEST_GROUP_RUNNER
+ *
+ *    void app_main(void) {
+ *        UNITY_MAIN(my_feature);
+ *    }
+ */
+#define UNITY_MAIN(group_) UNITY_MAIN_FUNC(TEST_ ## group_ ## _GROUP_RUNNER)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/unity/include/unity_test_runner.h b/tools/sdk/esp32s3/include/unity/include/unity_test_runner.h
new file mode 100644
index 00000000000..ac504a29eec
--- /dev/null
+++ b/tools/sdk/esp32s3/include/unity/include/unity_test_runner.h
@@ -0,0 +1,211 @@
+// Copyright 2016-2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+// This file gets included from unity.h via unity_internals.h via unity_config.h
+// It is inside #ifdef __cplusplus / extern "C" block, so we can
+// only use C features here
+
+// Define helpers to register test cases from multiple files
+#define UNITY_EXPAND2(a, b) a ## b
+#define UNITY_EXPAND(a, b) UNITY_EXPAND2(a, b)
+#define UNITY_TEST_UID(what) UNITY_EXPAND(what, __LINE__)
+
+#define UNITY_TEST_REG_HELPER reg_helper ## UNITY_TEST_UID
+#define UNITY_TEST_DESC_UID desc ## UNITY_TEST_UID
+
+
+// get count of __VA_ARGS__
+#define PP_NARG(...) \
+         PP_NARG_(__VA_ARGS__,PP_RSEQ_N())
+#define PP_NARG_(...) \
+         PP_ARG_N(__VA_ARGS__)
+#define PP_ARG_N( \
+          _1, _2, _3, _4, _5, _6, _7, _8, _9, N, ...) N
+#define PP_RSEQ_N() 9,8,7,6,5,4,3,2,1,0
+
+// support max 5 test func now
+#define FN_NAME_SET_1(a)                {#a}
+#define FN_NAME_SET_2(a, b)             {#a, #b}
+#define FN_NAME_SET_3(a, b, c)          {#a, #b, #c}
+#define FN_NAME_SET_4(a, b, c, d)       {#a, #b, #c, #d}
+#define FN_NAME_SET_5(a, b, c, d, e)    {#a, #b, #c, #d, #e}
+
+#define FN_NAME_SET2(n) FN_NAME_SET_##n
+#define FN_NAME_SET(n, ...) FN_NAME_SET2(n)(__VA_ARGS__)
+
+#define UNITY_TEST_FN_SET(...)  \
+    static test_func UNITY_TEST_UID(test_functions)[] = {__VA_ARGS__}; \
+    static const char* UNITY_TEST_UID(test_fn_name)[] = FN_NAME_SET(PP_NARG(__VA_ARGS__), __VA_ARGS__)
+
+
+typedef void (* test_func)(void);
+
+typedef struct test_desc_t
+{
+    const char* name;
+    const char* desc;
+    test_func* fn;
+    const char* file;
+    int line;
+    uint8_t test_fn_count;
+    const char ** test_fn_name;
+    struct test_desc_t* next;
+} test_desc_t;
+
+void unity_testcase_register(test_desc_t* desc);
+
+
+/*  Test case macro, a-la CATCH framework.
+    First argument is a free-form description,
+    second argument is (by convention) a list of identifiers, each one in square brackets.
+    Identifiers are used to group related tests, or tests with specific properties.
+    Use like:
+
+    TEST_CASE("Frobnicator forbnicates", "[frobnicator][rom]")
+    {
+        // test goes here
+    }
+*/
+
+#define TEST_CASE(name_, desc_) \
+    static void UNITY_TEST_UID(test_func_) (void); \
+    static void __attribute__((constructor)) UNITY_TEST_UID(test_reg_helper_) (void) \
+    { \
+        static test_func test_fn_[] = {&UNITY_TEST_UID(test_func_)}; \
+        static test_desc_t UNITY_TEST_UID(test_desc_) = { \
+            .name = name_, \
+            .desc = desc_, \
+            .fn = test_fn_, \
+            .file = __FILE__, \
+            .line = __LINE__, \
+            .test_fn_count = 1, \
+            .test_fn_name = NULL, \
+            .next = NULL \
+        }; \
+        unity_testcase_register( & UNITY_TEST_UID(test_desc_) ); \
+    }\
+    static void UNITY_TEST_UID(test_func_) (void)
+
+
+/*
+ * Multiple stages test cases will handle the case that test steps are separated by DUT reset.
+ * e.g: we want to verify some function after SW reset, WDT reset or deep sleep reset.
+ *
+ * First argument is a free-form description,
+ * second argument is (by convention) a list of identifiers, each one in square brackets.
+ * subsequent arguments are names test functions separated by reset.
+ * e.g:
+ * TEST_CASE_MULTIPLE_STAGES("run light sleep after deep sleep","[sleep]", goto_deepsleep, light_sleep_after_deep_sleep_wakeup);
+ * */
+
+#define TEST_CASE_MULTIPLE_STAGES(name_, desc_, ...) \
+    UNITY_TEST_FN_SET(__VA_ARGS__); \
+    static void __attribute__((constructor)) UNITY_TEST_UID(test_reg_helper_) (void) \
+    { \
+        static test_desc_t UNITY_TEST_UID(test_desc_) = { \
+            .name = name_, \
+            .desc = desc_"[multi_stage]", \
+            .fn = UNITY_TEST_UID(test_functions), \
+            .file = __FILE__, \
+            .line = __LINE__, \
+            .test_fn_count = PP_NARG(__VA_ARGS__), \
+            .test_fn_name = UNITY_TEST_UID(test_fn_name), \
+            .next = NULL \
+        }; \
+        unity_testcase_register( & UNITY_TEST_UID(test_desc_) ); \
+    }
+
+
+
+/*
+ * First argument is a free-form description,
+ * second argument is (by convention) a list of identifiers, each one in square brackets.
+ * subsequent arguments are names of test functions for different DUTs
+ * e.g:
+ * TEST_CASE_MULTIPLE_DEVICES("master and slave spi","[spi][test_env=UT_T2_1]", master_test, slave_test);
+ * */
+
+#define TEST_CASE_MULTIPLE_DEVICES(name_, desc_, ...) \
+    UNITY_TEST_FN_SET(__VA_ARGS__); \
+    static void __attribute__((constructor)) UNITY_TEST_UID(test_reg_helper_) (void) \
+    { \
+        static test_desc_t UNITY_TEST_UID(test_desc_) = { \
+            .name = name_, \
+            .desc = desc_"[multi_device]", \
+            .fn = UNITY_TEST_UID(test_functions), \
+            .file = __FILE__, \
+            .line = __LINE__, \
+            .test_fn_count = PP_NARG(__VA_ARGS__), \
+            .test_fn_name = UNITY_TEST_UID(test_fn_name), \
+            .next = NULL \
+        }; \
+        unity_testcase_register( & UNITY_TEST_UID(test_desc_) ); \
+    }
+
+/**
+ * Note: initialization of test_desc_t fields above has to be done exactly
+ * in the same order as the fields are declared in the structure.
+ * Otherwise the initializer will not be valid in C++ (which doesn't
+ * support designated initializers). G++ can parse the syntax, but
+ * field names are treated as annotations and don't affect initialization
+ * order. Also make sure all the fields are initialized.
+ */
+
+void unity_run_test_by_name(const char *name);
+
+void unity_run_tests_by_tag(const char *tag, bool invert);
+
+void unity_run_all_tests(void);
+
+void unity_run_menu(void);
+
+#include "sdkconfig.h" //to get IDF_TARGET_xxx
+
+#define CONFIG_IDF_TARGET_NA   0
+
+/*
+ * This macro is to disable those tests and their callees that cannot be built or run temporarily
+ * (needs update or runners).
+ *
+ * Usage:
+ * ```
+ * #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S2)
+ * TEST_CASE("only for esp32", "")
+ * {
+ * }
+ * #endif
+ * ```
+ */
+#define TEMPORARY_DISABLED_FOR_TARGETS(...)    (_UNITY_DFT_10(__VA_ARGS__, NA, NA, NA, NA, NA, NA, NA, NA, NA))
+
+/*
+ * This macro is to disable those tests and their callees that is totally impossible to run on the
+ * specific targets. Usage same as TEMPORARY_DISABLED_FOR_TARGETS.
+ */
+#define DISABLED_FOR_TARGETS(...)    TEMPORARY_DISABLED_FOR_TARGETS(__VA_ARGS__)
+
+#define _UNITY_DFT_10(TARGET, ...)  (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_9(__VA_ARGS__))
+#define _UNITY_DFT_9(TARGET, ...)   (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_8(__VA_ARGS__))
+#define _UNITY_DFT_8(TARGET, ...)   (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_7(__VA_ARGS__))
+#define _UNITY_DFT_7(TARGET, ...)   (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_6(__VA_ARGS__))
+#define _UNITY_DFT_6(TARGET, ...)   (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_5(__VA_ARGS__))
+#define _UNITY_DFT_5(TARGET, ...)   (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_4(__VA_ARGS__))
+#define _UNITY_DFT_4(TARGET, ...)   (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_3(__VA_ARGS__))
+#define _UNITY_DFT_3(TARGET, ...)   (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_2(__VA_ARGS__))
+#define _UNITY_DFT_2(TARGET, ...)   (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_1(__VA_ARGS__))
+#define _UNITY_DFT_1(TARGET, ...)   (CONFIG_IDF_TARGET_##TARGET)
diff --git a/tools/sdk/esp32s3/include/unity/unity/src/unity.h b/tools/sdk/esp32s3/include/unity/unity/src/unity.h
new file mode 100644
index 00000000000..a0c301d25a2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/unity/unity/src/unity.h
@@ -0,0 +1,503 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007-14 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#ifndef UNITY_FRAMEWORK_H
+#define UNITY_FRAMEWORK_H
+#define UNITY
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "unity_internals.h"
+
+/*-------------------------------------------------------
+ * Test Setup / Teardown
+ *-------------------------------------------------------*/
+
+/* These functions are intended to be called before and after each test. */
+void setUp(void);
+void tearDown(void);
+
+/* These functions are intended to be called at the beginning and end of an
+ * entire test suite.  suiteTearDown() is passed the number of tests that
+ * failed, and its return value becomes the exit code of main(). */
+void suiteSetUp(void);
+int suiteTearDown(int num_failures);
+
+/* If the compiler supports it, the following block provides stub
+ * implementations of the above functions as weak symbols.  Note that on
+ * some platforms (MinGW for example), weak function implementations need
+ * to be in the same translation unit they are called from.  This can be
+ * achieved by defining UNITY_INCLUDE_SETUP_STUBS before including unity.h. */
+#ifdef UNITY_INCLUDE_SETUP_STUBS
+  #ifdef UNITY_WEAK_ATTRIBUTE
+    UNITY_WEAK_ATTRIBUTE void setUp(void) { }
+    UNITY_WEAK_ATTRIBUTE void tearDown(void) { }
+    UNITY_WEAK_ATTRIBUTE void suiteSetUp(void) { }
+    UNITY_WEAK_ATTRIBUTE int suiteTearDown(int num_failures) { return num_failures; }
+  #elif defined(UNITY_WEAK_PRAGMA)
+    #pragma weak setUp
+    void setUp(void) { }
+    #pragma weak tearDown
+    void tearDown(void) { }
+    #pragma weak suiteSetUp
+    void suiteSetUp(void) { }
+    #pragma weak suiteTearDown
+    int suiteTearDown(int num_failures) { return num_failures; }
+  #endif
+#endif
+
+/*-------------------------------------------------------
+ * Configuration Options
+ *-------------------------------------------------------
+ * All options described below should be passed as a compiler flag to all files using Unity. If you must add #defines, place them BEFORE the #include above.
+
+ * Integers/longs/pointers
+ *     - Unity attempts to automatically discover your integer sizes
+ *       - define UNITY_EXCLUDE_STDINT_H to stop attempting to look in <stdint.h>
+ *       - define UNITY_EXCLUDE_LIMITS_H to stop attempting to look in <limits.h>
+ *     - If you cannot use the automatic methods above, you can force Unity by using these options:
+ *       - define UNITY_SUPPORT_64
+ *       - set UNITY_INT_WIDTH
+ *       - set UNITY_LONG_WIDTH
+ *       - set UNITY_POINTER_WIDTH
+
+ * Floats
+ *     - define UNITY_EXCLUDE_FLOAT to disallow floating point comparisons
+ *     - define UNITY_FLOAT_PRECISION to specify the precision to use when doing TEST_ASSERT_EQUAL_FLOAT
+ *     - define UNITY_FLOAT_TYPE to specify doubles instead of single precision floats
+ *     - define UNITY_INCLUDE_DOUBLE to allow double floating point comparisons
+ *     - define UNITY_EXCLUDE_DOUBLE to disallow double floating point comparisons (default)
+ *     - define UNITY_DOUBLE_PRECISION to specify the precision to use when doing TEST_ASSERT_EQUAL_DOUBLE
+ *     - define UNITY_DOUBLE_TYPE to specify something other than double
+ *     - define UNITY_EXCLUDE_FLOAT_PRINT to trim binary size, won't print floating point values in errors
+
+ * Output
+ *     - by default, Unity prints to standard out with putchar.  define UNITY_OUTPUT_CHAR(a) with a different function if desired
+ *     - define UNITY_DIFFERENTIATE_FINAL_FAIL to print FAILED (vs. FAIL) at test end summary - for automated search for failure
+
+ * Optimization
+ *     - by default, line numbers are stored in unsigned shorts.  Define UNITY_LINE_TYPE with a different type if your files are huge
+ *     - by default, test and failure counters are unsigned shorts.  Define UNITY_COUNTER_TYPE with a different type if you want to save space or have more than 65535 Tests.
+
+ * Test Cases
+ *     - define UNITY_SUPPORT_TEST_CASES to include the TEST_CASE macro, though really it's mostly about the runner generator script
+
+ * Parameterized Tests
+ *     - you'll want to create a define of TEST_CASE(...) which basically evaluates to nothing
+
+ * Tests with Arguments
+ *     - you'll want to define UNITY_USE_COMMAND_LINE_ARGS if you have the test runner passing arguments to Unity
+
+ *-------------------------------------------------------
+ * Basic Fail and Ignore
+ *-------------------------------------------------------*/
+
+#define TEST_FAIL_MESSAGE(message)                                                                 UNITY_TEST_FAIL(__LINE__, (message))
+#define TEST_FAIL()                                                                                UNITY_TEST_FAIL(__LINE__, NULL)
+#define TEST_IGNORE_MESSAGE(message)                                                               UNITY_TEST_IGNORE(__LINE__, (message))
+#define TEST_IGNORE()                                                                              UNITY_TEST_IGNORE(__LINE__, NULL)
+#define TEST_ONLY()
+
+/* It is not necessary for you to call PASS. A PASS condition is assumed if nothing fails.
+ * This method allows you to abort a test immediately with a PASS state, ignoring the remainder of the test. */
+#define TEST_PASS()                                                                                TEST_ABORT()
+
+/* This macro does nothing, but it is useful for build tools (like Ceedling) to make use of this to figure out
+ * which files should be linked to in order to perform a test. Use it like TEST_FILE("sandwiches.c") */
+#define TEST_FILE(a)
+
+/*-------------------------------------------------------
+ * Test Asserts (simple)
+ *-------------------------------------------------------*/
+
+/* Boolean */
+#define TEST_ASSERT(condition)                                                                     UNITY_TEST_ASSERT(       (condition), __LINE__, " Expression Evaluated To FALSE")
+#define TEST_ASSERT_TRUE(condition)                                                                UNITY_TEST_ASSERT(       (condition), __LINE__, " Expected TRUE Was FALSE")
+#define TEST_ASSERT_UNLESS(condition)                                                              UNITY_TEST_ASSERT(      !(condition), __LINE__, " Expression Evaluated To TRUE")
+#define TEST_ASSERT_FALSE(condition)                                                               UNITY_TEST_ASSERT(      !(condition), __LINE__, " Expected FALSE Was TRUE")
+#define TEST_ASSERT_NULL(pointer)                                                                  UNITY_TEST_ASSERT_NULL(    (pointer), __LINE__, " Expected NULL")
+#define TEST_ASSERT_NOT_NULL(pointer)                                                              UNITY_TEST_ASSERT_NOT_NULL((pointer), __LINE__, " Expected Non-NULL")
+
+/* Integers (of all sizes) */
+#define TEST_ASSERT_EQUAL_INT(expected, actual)                                                    UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT8(expected, actual)                                                   UNITY_TEST_ASSERT_EQUAL_INT8((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT16(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_INT16((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT32(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_INT32((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT64(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_INT64((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL(expected, actual)                                                        UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL(expected, actual)                                                    UNITY_TEST_ASSERT(((expected) !=  (actual)), __LINE__, " Expected Not-Equal")
+#define TEST_ASSERT_EQUAL_UINT(expected, actual)                                                   UNITY_TEST_ASSERT_EQUAL_UINT( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT8(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_UINT8( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT16(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_UINT16( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT32(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_UINT32( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT64(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_UINT64( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX(expected, actual)                                                    UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX8(expected, actual)                                                   UNITY_TEST_ASSERT_EQUAL_HEX8( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX16(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_HEX16((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX32(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX64(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_HEX64((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BITS(mask, expected, actual)                                                   UNITY_TEST_ASSERT_BITS((mask), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BITS_HIGH(mask, actual)                                                        UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(-1), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BITS_LOW(mask, actual)                                                         UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(0), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BIT_HIGH(bit, actual)                                                          UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(-1), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BIT_LOW(bit, actual)                                                           UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(0), (actual), __LINE__, NULL)
+
+/* Integer Greater Than/ Less Than (of all sizes) */
+#define TEST_ASSERT_GREATER_THAN(threshold, actual)                                                UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT(threshold, actual)                                            UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT8(threshold, actual)                                           UNITY_TEST_ASSERT_GREATER_THAN_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT16(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT32(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT64(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT(threshold, actual)                                           UNITY_TEST_ASSERT_GREATER_THAN_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT8(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT16(threshold, actual)                                         UNITY_TEST_ASSERT_GREATER_THAN_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT32(threshold, actual)                                         UNITY_TEST_ASSERT_GREATER_THAN_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT64(threshold, actual)                                         UNITY_TEST_ASSERT_GREATER_THAN_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX8(threshold, actual)                                           UNITY_TEST_ASSERT_GREATER_THAN_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX16(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX32(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX64(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_HEX64((threshold), (actual), __LINE__, NULL)
+
+#define TEST_ASSERT_LESS_THAN(threshold, actual)                                                   UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT(threshold, actual)                                               UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT8(threshold, actual)                                              UNITY_TEST_ASSERT_SMALLER_THAN_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT16(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT32(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT64(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT(threshold, actual)                                              UNITY_TEST_ASSERT_SMALLER_THAN_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT8(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT16(threshold, actual)                                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT32(threshold, actual)                                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT64(threshold, actual)                                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX8(threshold, actual)                                              UNITY_TEST_ASSERT_SMALLER_THAN_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX16(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX32(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX64(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX64((threshold), (actual), __LINE__, NULL)
+
+#define TEST_ASSERT_GREATER_OR_EQUAL(threshold, actual)                                            UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT(threshold, actual)                                        UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT8(threshold, actual)                                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT16(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT32(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT64(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT(threshold, actual)                                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT8(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT16(threshold, actual)                                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT32(threshold, actual)                                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT64(threshold, actual)                                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX8(threshold, actual)                                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX16(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX32(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX64(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64((threshold), (actual), __LINE__, NULL)
+
+#define TEST_ASSERT_LESS_OR_EQUAL(threshold, actual)                                               UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT(threshold, actual)                                           UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT8(threshold, actual)                                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT16(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT32(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT64(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT(threshold, actual)                                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT8(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT16(threshold, actual)                                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT32(threshold, actual)                                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT64(threshold, actual)                                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX8(threshold, actual)                                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX16(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX32(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX64(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX64((threshold), (actual), __LINE__, NULL)
+
+/* Integer Ranges (of all sizes) */
+#define TEST_ASSERT_INT_WITHIN(delta, expected, actual)                                            UNITY_TEST_ASSERT_INT_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT8_WITHIN(delta, expected, actual)                                           UNITY_TEST_ASSERT_INT8_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT16_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_INT16_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT32_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_INT32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT64_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_INT64_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT_WITHIN(delta, expected, actual)                                           UNITY_TEST_ASSERT_UINT_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT8_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_UINT8_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT16_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_UINT16_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT32_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_UINT32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT64_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_UINT64_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX_WITHIN(delta, expected, actual)                                            UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX8_WITHIN(delta, expected, actual)                                           UNITY_TEST_ASSERT_HEX8_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX16_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_HEX16_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX32_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX64_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_HEX64_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+
+/* Structs and Strings */
+#define TEST_ASSERT_EQUAL_PTR(expected, actual)                                                    UNITY_TEST_ASSERT_EQUAL_PTR((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_STRING(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_STRING((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_STRING_LEN(expected, actual, len)                                        UNITY_TEST_ASSERT_EQUAL_STRING_LEN((expected), (actual), (len), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_MEMORY(expected, actual, len)                                            UNITY_TEST_ASSERT_EQUAL_MEMORY((expected), (actual), (len), __LINE__, NULL)
+
+/* Arrays */
+#define TEST_ASSERT_EQUAL_INT_ARRAY(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EQUAL_INT_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT8_ARRAY(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EQUAL_INT8_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT16_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_INT16_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT32_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_INT32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT64_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT_ARRAY(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EQUAL_UINT_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT8_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_UINT8_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT16_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT32_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_UINT32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT64_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX_ARRAY(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX8_ARRAY(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EQUAL_HEX8_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX16_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_HEX16_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX32_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX64_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_PTR_ARRAY(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EQUAL_PTR_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_STRING_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_STRING_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_MEMORY_ARRAY(expected, actual, len, num_elements)                        UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY((expected), (actual), (len), (num_elements), __LINE__, NULL)
+
+/* Arrays Compared To Single Value */
+#define TEST_ASSERT_EACH_EQUAL_INT(expected, actual, num_elements)                                 UNITY_TEST_ASSERT_EACH_EQUAL_INT((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT8(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EACH_EQUAL_INT8((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT16(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_INT16((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT32(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_INT32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT64(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_INT64((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EACH_EQUAL_UINT((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT8(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_UINT8((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT16(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_UINT16((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT32(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_UINT32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT64(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_UINT64((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX(expected, actual, num_elements)                                 UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX8(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EACH_EQUAL_HEX8((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX16(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_HEX16((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX32(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX64(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_HEX64((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_PTR(expected, actual, num_elements)                                 UNITY_TEST_ASSERT_EACH_EQUAL_PTR((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_STRING(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_STRING((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_MEMORY(expected, actual, len, num_elements)                         UNITY_TEST_ASSERT_EACH_EQUAL_MEMORY((expected), (actual), (len), (num_elements), __LINE__, NULL)
+
+/* Floating Point (If Enabled) */
+#define TEST_ASSERT_FLOAT_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_FLOAT_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_FLOAT(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_FLOAT((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_FLOAT_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_FLOAT(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_INF(actual)                                                           UNITY_TEST_ASSERT_FLOAT_IS_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NEG_INF(actual)                                                       UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NAN(actual)                                                           UNITY_TEST_ASSERT_FLOAT_IS_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_DETERMINATE(actual)                                                   UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_INF(actual)                                                       UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_NEG_INF(actual)                                                   UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_NAN(actual)                                                       UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(actual)                                               UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE((actual), __LINE__, NULL)
+
+/* Double (If Enabled) */
+#define TEST_ASSERT_DOUBLE_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_DOUBLE_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_DOUBLE(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_DOUBLE((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_DOUBLE_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_DOUBLE(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_INF(actual)                                                          UNITY_TEST_ASSERT_DOUBLE_IS_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NEG_INF(actual)                                                      UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NAN(actual)                                                          UNITY_TEST_ASSERT_DOUBLE_IS_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_DETERMINATE(actual)                                                  UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_INF(actual)                                                      UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF(actual)                                                  UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_NAN(actual)                                                      UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(actual)                                              UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE((actual), __LINE__, NULL)
+
+/*-------------------------------------------------------
+ * Test Asserts (with additional messages)
+ *-------------------------------------------------------*/
+
+/* Boolean */
+#define TEST_ASSERT_MESSAGE(condition, message)                                                    UNITY_TEST_ASSERT(       (condition), __LINE__, (message))
+#define TEST_ASSERT_TRUE_MESSAGE(condition, message)                                               UNITY_TEST_ASSERT(       (condition), __LINE__, (message))
+#define TEST_ASSERT_UNLESS_MESSAGE(condition, message)                                             UNITY_TEST_ASSERT(      !(condition), __LINE__, (message))
+#define TEST_ASSERT_FALSE_MESSAGE(condition, message)                                              UNITY_TEST_ASSERT(      !(condition), __LINE__, (message))
+#define TEST_ASSERT_NULL_MESSAGE(pointer, message)                                                 UNITY_TEST_ASSERT_NULL(    (pointer), __LINE__, (message))
+#define TEST_ASSERT_NOT_NULL_MESSAGE(pointer, message)                                             UNITY_TEST_ASSERT_NOT_NULL((pointer), __LINE__, (message))
+
+/* Integers (of all sizes) */
+#define TEST_ASSERT_EQUAL_INT_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT8_MESSAGE(expected, actual, message)                                  UNITY_TEST_ASSERT_EQUAL_INT8((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT16_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_INT16((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT32_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_INT32((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT64_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_INT64((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_MESSAGE(expected, actual, message)                                       UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT(((expected) !=  (actual)), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT_MESSAGE(expected, actual, message)                                  UNITY_TEST_ASSERT_EQUAL_UINT( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT8_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_UINT8( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT16_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_UINT16( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT32_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_UINT32( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT64_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_UINT64( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX8_MESSAGE(expected, actual, message)                                  UNITY_TEST_ASSERT_EQUAL_HEX8( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX16_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_HEX16((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX32_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX64_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_HEX64((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_BITS_MESSAGE(mask, expected, actual, message)                                  UNITY_TEST_ASSERT_BITS((mask), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_BITS_HIGH_MESSAGE(mask, actual, message)                                       UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(-1), (actual), __LINE__, (message))
+#define TEST_ASSERT_BITS_LOW_MESSAGE(mask, actual, message)                                        UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(0), (actual), __LINE__, (message))
+#define TEST_ASSERT_BIT_HIGH_MESSAGE(bit, actual, message)                                         UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(-1), (actual), __LINE__, (message))
+#define TEST_ASSERT_BIT_LOW_MESSAGE(bit, actual, message)                                          UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(0), (actual), __LINE__, (message))
+
+/* Integer Greater Than/ Less Than (of all sizes) */
+#define TEST_ASSERT_GREATER_THAN_MESSAGE(threshold, actual, message)                               UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT8_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_GREATER_THAN_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT16_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT32_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT64_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_GREATER_THAN_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT8_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT16_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_GREATER_THAN_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT32_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_GREATER_THAN_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT64_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_GREATER_THAN_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX8_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_GREATER_THAN_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX16_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX32_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX64_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_HEX64((threshold), (actual), __LINE__, (message))
+
+#define TEST_ASSERT_LESS_THAN_MESSAGE(threshold, actual, message)                                  UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT_MESSAGE(threshold, actual, message)                              UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT8_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_SMALLER_THAN_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT16_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT32_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT64_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_SMALLER_THAN_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT8_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT16_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_SMALLER_THAN_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT32_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_SMALLER_THAN_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT64_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_SMALLER_THAN_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX8_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX16_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX32_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX64_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_HEX64((threshold), (actual), __LINE__, (message))
+
+#define TEST_ASSERT_GREATER_OR_EQUAL_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT8_MESSAGE(threshold, actual, message)                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT16_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT64_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT_MESSAGE(threshold, actual, message)                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT8_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT16_MESSAGE(threshold, actual, message)                    UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT32_MESSAGE(threshold, actual, message)                    UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT64_MESSAGE(threshold, actual, message)                    UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX8_MESSAGE(threshold, actual, message)                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX16_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX32_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX64_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64((threshold), (actual), __LINE__, (message))
+
+#define TEST_ASSERT_LESS_OR_EQUAL_MESSAGE(threshold, actual, message)                              UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT8_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT16_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT32_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT64_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT8_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT16_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT32_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT64_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX8_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX16_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX32_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX64_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX64((threshold), (actual), __LINE__, (message))
+
+/* Integer Ranges (of all sizes) */
+#define TEST_ASSERT_INT_WITHIN_MESSAGE(delta, expected, actual, message)                           UNITY_TEST_ASSERT_INT_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT8_WITHIN_MESSAGE(delta, expected, actual, message)                          UNITY_TEST_ASSERT_INT8_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT16_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_INT16_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT32_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_INT32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT64_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_INT64_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT_WITHIN_MESSAGE(delta, expected, actual, message)                          UNITY_TEST_ASSERT_UINT_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT8_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_UINT8_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT16_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_UINT16_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT32_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_UINT32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT64_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_UINT64_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX_WITHIN_MESSAGE(delta, expected, actual, message)                           UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX8_WITHIN_MESSAGE(delta, expected, actual, message)                          UNITY_TEST_ASSERT_HEX8_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX16_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_HEX16_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX32_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX64_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_HEX64_WITHIN((delta), (expected), (actual), __LINE__, (message))
+
+/* Structs and Strings */
+#define TEST_ASSERT_EQUAL_PTR_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT_EQUAL_PTR((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_STRING_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_STRING((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_STRING_LEN_MESSAGE(expected, actual, len, message)                       UNITY_TEST_ASSERT_EQUAL_STRING_LEN((expected), (actual), (len), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_MEMORY_MESSAGE(expected, actual, len, message)                           UNITY_TEST_ASSERT_EQUAL_MEMORY((expected), (actual), (len), __LINE__, (message))
+
+/* Arrays */
+#define TEST_ASSERT_EQUAL_INT_ARRAY_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EQUAL_INT_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT8_ARRAY_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EQUAL_INT8_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT16_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_INT16_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT32_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_INT32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT64_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT_ARRAY_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EQUAL_UINT_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT8_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_UINT8_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT16_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT32_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_UINT32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT64_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX_ARRAY_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX8_ARRAY_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EQUAL_HEX8_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX16_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_HEX16_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX32_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX64_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_PTR_ARRAY_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EQUAL_PTR_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_STRING_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_STRING_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_MEMORY_ARRAY_MESSAGE(expected, actual, len, num_elements, message)       UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY((expected), (actual), (len), (num_elements), __LINE__, (message))
+
+/* Arrays Compared To Single Value*/
+#define TEST_ASSERT_EACH_EQUAL_INT_MESSAGE(expected, actual, num_elements, message)                UNITY_TEST_ASSERT_EACH_EQUAL_INT((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT8_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EACH_EQUAL_INT8((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT16_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_INT16((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT32_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_INT32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT64_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_INT64((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EACH_EQUAL_UINT((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT8_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_UINT8((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT16_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_UINT16((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT32_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_UINT32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT64_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_UINT64((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX_MESSAGE(expected, actual, num_elements, message)                UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX8_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EACH_EQUAL_HEX8((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX16_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_HEX16((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX32_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX64_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_HEX64((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_PTR_MESSAGE(expected, actual, num_elements, message)                UNITY_TEST_ASSERT_EACH_EQUAL_PTR((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_STRING_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_STRING((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_MEMORY_MESSAGE(expected, actual, len, num_elements, message)        UNITY_TEST_ASSERT_EACH_EQUAL_MEMORY((expected), (actual), (len), (num_elements), __LINE__, (message))
+
+/* Floating Point (If Enabled) */
+#define TEST_ASSERT_FLOAT_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_FLOAT_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_FLOAT_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_FLOAT((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_FLOAT_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_FLOAT_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_INF_MESSAGE(actual, message)                                          UNITY_TEST_ASSERT_FLOAT_IS_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NEG_INF_MESSAGE(actual, message)                                      UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NAN_MESSAGE(actual, message)                                          UNITY_TEST_ASSERT_FLOAT_IS_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_DETERMINATE_MESSAGE(actual, message)                                  UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_INF_MESSAGE(actual, message)                                      UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_NEG_INF_MESSAGE(actual, message)                                  UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_NAN_MESSAGE(actual, message)                                      UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE_MESSAGE(actual, message)                              UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE((actual), __LINE__, (message))
+
+/* Double (If Enabled) */
+#define TEST_ASSERT_DOUBLE_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_DOUBLE_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_DOUBLE_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_DOUBLE((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_DOUBLE_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_DOUBLE_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_INF_MESSAGE(actual, message)                                         UNITY_TEST_ASSERT_DOUBLE_IS_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NEG_INF_MESSAGE(actual, message)                                     UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NAN_MESSAGE(actual, message)                                         UNITY_TEST_ASSERT_DOUBLE_IS_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_DETERMINATE_MESSAGE(actual, message)                                 UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_INF_MESSAGE(actual, message)                                     UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF_MESSAGE(actual, message)                                 UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_NAN_MESSAGE(actual, message)                                     UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE_MESSAGE(actual, message)                             UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE((actual), __LINE__, (message))
+
+/* end of UNITY_FRAMEWORK_H */
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/unity/unity/src/unity_internals.h b/tools/sdk/esp32s3/include/unity/unity/src/unity_internals.h
new file mode 100644
index 00000000000..7249fc7991a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/unity/unity/src/unity_internals.h
@@ -0,0 +1,928 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007-14 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#ifndef UNITY_INTERNALS_H
+#define UNITY_INTERNALS_H
+
+#ifdef UNITY_INCLUDE_CONFIG_H
+#include "unity_config.h"
+#endif
+
+#ifndef UNITY_EXCLUDE_SETJMP_H
+#include <setjmp.h>
+#endif
+
+#ifndef UNITY_EXCLUDE_MATH_H
+#include <math.h>
+#endif
+
+#ifndef UNITY_EXCLUDE_STDDEF_H
+#include <stddef.h>
+#endif
+
+/* Unity Attempts to Auto-Detect Integer Types
+ * Attempt 1: UINT_MAX, ULONG_MAX in <limits.h>, or default to 32 bits
+ * Attempt 2: UINTPTR_MAX in <stdint.h>, or default to same size as long
+ * The user may override any of these derived constants:
+ * UNITY_INT_WIDTH, UNITY_LONG_WIDTH, UNITY_POINTER_WIDTH */
+#ifndef UNITY_EXCLUDE_STDINT_H
+#include <stdint.h>
+#endif
+
+#ifndef UNITY_EXCLUDE_LIMITS_H
+#include <limits.h>
+#endif
+
+#ifndef UNITY_EXCLUDE_TIME_H
+#include <time.h>
+#endif
+
+/*-------------------------------------------------------
+ * Guess Widths If Not Specified
+ *-------------------------------------------------------*/
+
+/* Determine the size of an int, if not already specified.
+ * We cannot use sizeof(int), because it is not yet defined
+ * at this stage in the translation of the C program.
+ * Therefore, infer it from UINT_MAX if possible. */
+#ifndef UNITY_INT_WIDTH
+  #ifdef UINT_MAX
+    #if (UINT_MAX == 0xFFFF)
+      #define UNITY_INT_WIDTH (16)
+    #elif (UINT_MAX == 0xFFFFFFFF)
+      #define UNITY_INT_WIDTH (32)
+    #elif (UINT_MAX == 0xFFFFFFFFFFFFFFFF)
+      #define UNITY_INT_WIDTH (64)
+    #endif
+  #else /* Set to default */
+    #define UNITY_INT_WIDTH (32)
+  #endif /* UINT_MAX */
+#endif
+
+/* Determine the size of a long, if not already specified. */
+#ifndef UNITY_LONG_WIDTH
+  #ifdef ULONG_MAX
+    #if (ULONG_MAX == 0xFFFF)
+      #define UNITY_LONG_WIDTH (16)
+    #elif (ULONG_MAX == 0xFFFFFFFF)
+      #define UNITY_LONG_WIDTH (32)
+    #elif (ULONG_MAX == 0xFFFFFFFFFFFFFFFF)
+      #define UNITY_LONG_WIDTH (64)
+    #endif
+  #else /* Set to default */
+    #define UNITY_LONG_WIDTH (32)
+  #endif /* ULONG_MAX */
+#endif
+
+/* Determine the size of a pointer, if not already specified. */
+#ifndef UNITY_POINTER_WIDTH
+  #ifdef UINTPTR_MAX
+    #if (UINTPTR_MAX <= 0xFFFF)
+      #define UNITY_POINTER_WIDTH (16)
+    #elif (UINTPTR_MAX <= 0xFFFFFFFF)
+      #define UNITY_POINTER_WIDTH (32)
+    #elif (UINTPTR_MAX <= 0xFFFFFFFFFFFFFFFF)
+      #define UNITY_POINTER_WIDTH (64)
+    #endif
+  #else /* Set to default */
+    #define UNITY_POINTER_WIDTH UNITY_LONG_WIDTH
+  #endif /* UINTPTR_MAX */
+#endif
+
+/*-------------------------------------------------------
+ * Int Support (Define types based on detected sizes)
+ *-------------------------------------------------------*/
+
+#if (UNITY_INT_WIDTH == 32)
+    typedef unsigned char   UNITY_UINT8;
+    typedef unsigned short  UNITY_UINT16;
+    typedef unsigned int    UNITY_UINT32;
+    typedef signed char     UNITY_INT8;
+    typedef signed short    UNITY_INT16;
+    typedef signed int      UNITY_INT32;
+#elif (UNITY_INT_WIDTH == 16)
+    typedef unsigned char   UNITY_UINT8;
+    typedef unsigned int    UNITY_UINT16;
+    typedef unsigned long   UNITY_UINT32;
+    typedef signed char     UNITY_INT8;
+    typedef signed int      UNITY_INT16;
+    typedef signed long     UNITY_INT32;
+#else
+    #error Invalid UNITY_INT_WIDTH specified! (16 or 32 are supported)
+#endif
+
+/*-------------------------------------------------------
+ * 64-bit Support
+ *-------------------------------------------------------*/
+
+#ifndef UNITY_SUPPORT_64
+  #if UNITY_LONG_WIDTH == 64 || UNITY_POINTER_WIDTH == 64
+    #define UNITY_SUPPORT_64
+  #endif
+#endif
+
+#ifndef UNITY_SUPPORT_64
+    /* No 64-bit Support */
+    typedef UNITY_UINT32 UNITY_UINT;
+    typedef UNITY_INT32 UNITY_INT;
+#else
+
+    /* 64-bit Support */
+  #if (UNITY_LONG_WIDTH == 32)
+    typedef unsigned long long UNITY_UINT64;
+    typedef signed long long   UNITY_INT64;
+  #elif (UNITY_LONG_WIDTH == 64)
+    typedef unsigned long      UNITY_UINT64;
+    typedef signed long        UNITY_INT64;
+  #else
+    #error Invalid UNITY_LONG_WIDTH specified! (32 or 64 are supported)
+  #endif
+    typedef UNITY_UINT64 UNITY_UINT;
+    typedef UNITY_INT64 UNITY_INT;
+
+#endif
+
+/*-------------------------------------------------------
+ * Pointer Support
+ *-------------------------------------------------------*/
+
+#if (UNITY_POINTER_WIDTH == 32)
+#define UNITY_PTR_TO_INT UNITY_INT32
+#define UNITY_DISPLAY_STYLE_POINTER UNITY_DISPLAY_STYLE_HEX32
+#elif (UNITY_POINTER_WIDTH == 64)
+#define UNITY_PTR_TO_INT UNITY_INT64
+#define UNITY_DISPLAY_STYLE_POINTER UNITY_DISPLAY_STYLE_HEX64
+#elif (UNITY_POINTER_WIDTH == 16)
+#define UNITY_PTR_TO_INT UNITY_INT16
+#define UNITY_DISPLAY_STYLE_POINTER UNITY_DISPLAY_STYLE_HEX16
+#else
+    #error Invalid UNITY_POINTER_WIDTH specified! (16, 32 or 64 are supported)
+#endif
+
+#ifndef UNITY_PTR_ATTRIBUTE
+#define UNITY_PTR_ATTRIBUTE
+#endif
+
+#ifndef UNITY_INTERNAL_PTR
+#define UNITY_INTERNAL_PTR UNITY_PTR_ATTRIBUTE const void*
+#endif
+
+/*-------------------------------------------------------
+ * Float Support
+ *-------------------------------------------------------*/
+
+#ifdef UNITY_EXCLUDE_FLOAT
+
+/* No Floating Point Support */
+#ifndef UNITY_EXCLUDE_DOUBLE
+#define UNITY_EXCLUDE_DOUBLE /* Remove double when excluding float support */
+#endif
+#ifndef UNITY_EXCLUDE_FLOAT_PRINT
+#define UNITY_EXCLUDE_FLOAT_PRINT
+#endif
+
+#else
+
+/* Floating Point Support */
+#ifndef UNITY_FLOAT_PRECISION
+#define UNITY_FLOAT_PRECISION (0.00001f)
+#endif
+#ifndef UNITY_FLOAT_TYPE
+#define UNITY_FLOAT_TYPE float
+#endif
+typedef UNITY_FLOAT_TYPE UNITY_FLOAT;
+
+/* isinf & isnan macros should be provided by math.h */
+#ifndef isinf
+/* The value of Inf - Inf is NaN */
+#define isinf(n) (isnan((n) - (n)) && !isnan(n))
+#endif
+
+#ifndef isnan
+/* NaN is the only floating point value that does NOT equal itself.
+ * Therefore if n != n, then it is NaN. */
+#define isnan(n) ((n != n) ? 1 : 0)
+#endif
+
+#endif
+
+/*-------------------------------------------------------
+ * Double Float Support
+ *-------------------------------------------------------*/
+
+/* unlike float, we DON'T include by default */
+#if defined(UNITY_EXCLUDE_DOUBLE) || !defined(UNITY_INCLUDE_DOUBLE)
+
+  /* No Floating Point Support */
+  #ifndef UNITY_EXCLUDE_DOUBLE
+  #define UNITY_EXCLUDE_DOUBLE
+  #else
+    #undef UNITY_INCLUDE_DOUBLE
+  #endif
+
+  #ifndef UNITY_EXCLUDE_FLOAT
+    #ifndef UNITY_DOUBLE_TYPE
+    #define UNITY_DOUBLE_TYPE double
+    #endif
+  typedef UNITY_FLOAT UNITY_DOUBLE;
+  /* For parameter in UnityPrintFloat(UNITY_DOUBLE), which aliases to double or float */
+  #endif
+
+#else
+
+  /* Double Floating Point Support */
+  #ifndef UNITY_DOUBLE_PRECISION
+  #define UNITY_DOUBLE_PRECISION (1e-12)
+  #endif
+
+  #ifndef UNITY_DOUBLE_TYPE
+  #define UNITY_DOUBLE_TYPE double
+  #endif
+  typedef UNITY_DOUBLE_TYPE UNITY_DOUBLE;
+
+#endif
+
+/*-------------------------------------------------------
+ * Output Method: stdout (DEFAULT)
+ *-------------------------------------------------------*/
+#ifndef UNITY_OUTPUT_CHAR
+  /* Default to using putchar, which is defined in stdio.h */
+  #include <stdio.h>
+  #define UNITY_OUTPUT_CHAR(a) (void)putchar(a)
+#else
+  /* If defined as something else, make sure we declare it here so it's ready for use */
+  #ifdef UNITY_OUTPUT_CHAR_HEADER_DECLARATION
+    extern void UNITY_OUTPUT_CHAR_HEADER_DECLARATION;
+  #endif
+#endif
+
+#ifndef UNITY_OUTPUT_FLUSH
+  #ifdef UNITY_USE_FLUSH_STDOUT
+    /* We want to use the stdout flush utility */
+    #include <stdio.h>
+    #define UNITY_OUTPUT_FLUSH() (void)fflush(stdout)
+  #else
+    /* We've specified nothing, therefore flush should just be ignored */
+    #define UNITY_OUTPUT_FLUSH()
+  #endif
+#else
+  /* If defined as something else, make sure we declare it here so it's ready for use */
+  #ifdef UNITY_OUTPUT_FLUSH_HEADER_DECLARATION
+    extern void UNITY_OUTPUT_FLUSH_HEADER_DECLARATION;
+  #endif
+#endif
+
+#ifndef UNITY_OUTPUT_FLUSH
+#define UNITY_FLUSH_CALL()
+#else
+#define UNITY_FLUSH_CALL() UNITY_OUTPUT_FLUSH()
+#endif
+
+#ifndef UNITY_PRINT_EOL
+#define UNITY_PRINT_EOL()    UNITY_OUTPUT_CHAR('\n')
+#endif
+
+#ifndef UNITY_OUTPUT_START
+#define UNITY_OUTPUT_START()
+#endif
+
+#ifndef UNITY_OUTPUT_COMPLETE
+#define UNITY_OUTPUT_COMPLETE()
+#endif
+
+#ifndef UNITY_EXEC_TIME_RESET
+#ifdef UNITY_INCLUDE_EXEC_TIME
+#define UNITY_EXEC_TIME_RESET()\
+    Unity.CurrentTestStartTime = 0;\
+    Unity.CurrentTestStopTime = 0;
+#else
+#define UNITY_EXEC_TIME_RESET()
+#endif
+#endif
+
+#ifndef UNITY_EXEC_TIME_START
+#ifdef UNITY_INCLUDE_EXEC_TIME
+#define UNITY_EXEC_TIME_START() Unity.CurrentTestStartTime = UNITY_CLOCK_MS();
+#else
+#define UNITY_EXEC_TIME_START()
+#endif
+#endif
+
+#ifndef UNITY_EXEC_TIME_STOP
+#ifdef UNITY_INCLUDE_EXEC_TIME
+#define UNITY_EXEC_TIME_STOP() Unity.CurrentTestStopTime = UNITY_CLOCK_MS();
+#else
+#define UNITY_EXEC_TIME_STOP()
+#endif
+#endif
+
+#ifndef UNITY_PRINT_EXEC_TIME
+#ifdef UNITY_INCLUDE_EXEC_TIME
+#define UNITY_PRINT_EXEC_TIME() \
+	UnityPrint(" (");\
+	UNITY_COUNTER_TYPE execTimeMs = (Unity.CurrentTestStopTime - Unity.CurrentTestStartTime);\
+    UnityPrintNumberUnsigned(execTimeMs);\
+    UnityPrint(" ms)");
+#else
+#define UNITY_PRINT_EXEC_TIME()
+#endif
+#endif
+
+/*-------------------------------------------------------
+ * Footprint
+ *-------------------------------------------------------*/
+
+#ifndef UNITY_LINE_TYPE
+#define UNITY_LINE_TYPE UNITY_UINT
+#endif
+
+#ifndef UNITY_COUNTER_TYPE
+#define UNITY_COUNTER_TYPE UNITY_UINT
+#endif
+
+/*-------------------------------------------------------
+ * Language Features Available
+ *-------------------------------------------------------*/
+#if !defined(UNITY_WEAK_ATTRIBUTE) && !defined(UNITY_WEAK_PRAGMA)
+#   if defined(__GNUC__) || defined(__ghs__) /* __GNUC__ includes clang */
+#       if !(defined(__WIN32__) && defined(__clang__)) && !defined(__TMS470__)
+#           define UNITY_WEAK_ATTRIBUTE __attribute__((weak))
+#       endif
+#   endif
+#endif
+
+#ifdef UNITY_NO_WEAK
+#   undef UNITY_WEAK_ATTRIBUTE
+#   undef UNITY_WEAK_PRAGMA
+#endif
+
+
+/*-------------------------------------------------------
+ * Internal Structs Needed
+ *-------------------------------------------------------*/
+
+typedef void (*UnityTestFunction)(void);
+
+#define UNITY_DISPLAY_RANGE_INT  (0x10)
+#define UNITY_DISPLAY_RANGE_UINT (0x20)
+#define UNITY_DISPLAY_RANGE_HEX  (0x40)
+
+typedef enum
+{
+UNITY_DISPLAY_STYLE_INT = sizeof(int)+ UNITY_DISPLAY_RANGE_INT,
+    UNITY_DISPLAY_STYLE_INT8     = 1 + UNITY_DISPLAY_RANGE_INT,
+    UNITY_DISPLAY_STYLE_INT16    = 2 + UNITY_DISPLAY_RANGE_INT,
+    UNITY_DISPLAY_STYLE_INT32    = 4 + UNITY_DISPLAY_RANGE_INT,
+#ifdef UNITY_SUPPORT_64
+    UNITY_DISPLAY_STYLE_INT64    = 8 + UNITY_DISPLAY_RANGE_INT,
+#endif
+
+UNITY_DISPLAY_STYLE_UINT = sizeof(unsigned) + UNITY_DISPLAY_RANGE_UINT,
+    UNITY_DISPLAY_STYLE_UINT8    = 1 + UNITY_DISPLAY_RANGE_UINT,
+    UNITY_DISPLAY_STYLE_UINT16   = 2 + UNITY_DISPLAY_RANGE_UINT,
+    UNITY_DISPLAY_STYLE_UINT32   = 4 + UNITY_DISPLAY_RANGE_UINT,
+#ifdef UNITY_SUPPORT_64
+    UNITY_DISPLAY_STYLE_UINT64   = 8 + UNITY_DISPLAY_RANGE_UINT,
+#endif
+
+    UNITY_DISPLAY_STYLE_HEX8     = 1 + UNITY_DISPLAY_RANGE_HEX,
+    UNITY_DISPLAY_STYLE_HEX16    = 2 + UNITY_DISPLAY_RANGE_HEX,
+    UNITY_DISPLAY_STYLE_HEX32    = 4 + UNITY_DISPLAY_RANGE_HEX,
+#ifdef UNITY_SUPPORT_64
+    UNITY_DISPLAY_STYLE_HEX64    = 8 + UNITY_DISPLAY_RANGE_HEX,
+#endif
+
+    UNITY_DISPLAY_STYLE_UNKNOWN
+} UNITY_DISPLAY_STYLE_T;
+
+typedef enum
+{
+    UNITY_EQUAL_TO         = 1,
+    UNITY_GREATER_THAN     = 2,
+    UNITY_GREATER_OR_EQUAL = 2 + UNITY_EQUAL_TO,
+    UNITY_SMALLER_THAN     = 4,
+    UNITY_SMALLER_OR_EQUAL = 4 + UNITY_EQUAL_TO
+} UNITY_COMPARISON_T;
+
+#ifndef UNITY_EXCLUDE_FLOAT
+typedef enum UNITY_FLOAT_TRAIT
+{
+    UNITY_FLOAT_IS_NOT_INF       = 0,
+    UNITY_FLOAT_IS_INF,
+    UNITY_FLOAT_IS_NOT_NEG_INF,
+    UNITY_FLOAT_IS_NEG_INF,
+    UNITY_FLOAT_IS_NOT_NAN,
+    UNITY_FLOAT_IS_NAN,
+    UNITY_FLOAT_IS_NOT_DET,
+    UNITY_FLOAT_IS_DET,
+    UNITY_FLOAT_INVALID_TRAIT
+} UNITY_FLOAT_TRAIT_T;
+#endif
+
+typedef enum
+{
+    UNITY_ARRAY_TO_VAL = 0,
+    UNITY_ARRAY_TO_ARRAY
+} UNITY_FLAGS_T;
+
+struct UNITY_STORAGE_T
+{
+    const char* TestFile;
+    const char* CurrentTestName;
+#ifndef UNITY_EXCLUDE_DETAILS
+    const char* CurrentDetail1;
+    const char* CurrentDetail2;
+#endif
+    UNITY_LINE_TYPE CurrentTestLineNumber;
+    UNITY_COUNTER_TYPE NumberOfTests;
+    UNITY_COUNTER_TYPE TestFailures;
+    UNITY_COUNTER_TYPE TestIgnores;
+    UNITY_COUNTER_TYPE CurrentTestFailed;
+    UNITY_COUNTER_TYPE CurrentTestIgnored;
+#ifdef UNITY_INCLUDE_EXEC_TIME
+    UNITY_COUNTER_TYPE CurrentTestStartTime;
+    UNITY_COUNTER_TYPE CurrentTestStopTime;
+#endif
+#ifndef UNITY_EXCLUDE_SETJMP_H
+    jmp_buf AbortFrame;
+#endif
+};
+
+extern struct UNITY_STORAGE_T Unity;
+
+/*-------------------------------------------------------
+ * Test Suite Management
+ *-------------------------------------------------------*/
+
+void UnityBegin(const char* filename);
+int  UnityEnd(void);
+void UnityConcludeTest(void);
+void UnityDefaultTestRun(UnityTestFunction Func, const char* FuncName, const int FuncLineNum);
+
+/*-------------------------------------------------------
+ * Details Support
+ *-------------------------------------------------------*/
+
+#ifdef UNITY_EXCLUDE_DETAILS
+#define UNITY_CLR_DETAILS()
+#define UNITY_SET_DETAIL(d1)
+#define UNITY_SET_DETAILS(d1,d2)
+#else
+#define UNITY_CLR_DETAILS()      { Unity.CurrentDetail1 = 0;   Unity.CurrentDetail2 = 0;  }
+#define UNITY_SET_DETAIL(d1)     { Unity.CurrentDetail1 = (d1);  Unity.CurrentDetail2 = 0;  }
+#define UNITY_SET_DETAILS(d1,d2) { Unity.CurrentDetail1 = (d1);  Unity.CurrentDetail2 = (d2); }
+
+#ifndef UNITY_DETAIL1_NAME
+#define UNITY_DETAIL1_NAME "Function"
+#endif
+
+#ifndef UNITY_DETAIL2_NAME
+#define UNITY_DETAIL2_NAME "Argument"
+#endif
+#endif
+
+/*-------------------------------------------------------
+ * Test Output
+ *-------------------------------------------------------*/
+
+void UnityPrint(const char* string);
+void UnityPrintLen(const char* string, const UNITY_UINT32 length);
+void UnityPrintMask(const UNITY_UINT mask, const UNITY_UINT number);
+void UnityPrintNumberByStyle(const UNITY_INT number, const UNITY_DISPLAY_STYLE_T style);
+void UnityPrintNumber(const UNITY_INT number_to_print);
+void UnityPrintNumberUnsigned(const UNITY_UINT number);
+void UnityPrintNumberHex(const UNITY_UINT number, const char nibbles_to_print);
+
+#ifndef UNITY_EXCLUDE_FLOAT_PRINT
+void UnityPrintFloat(const UNITY_DOUBLE input_number);
+#endif
+
+/*-------------------------------------------------------
+ * Test Assertion Functions
+ *-------------------------------------------------------
+ *  Use the macros below this section instead of calling
+ *  these directly. The macros have a consistent naming
+ *  convention and will pull in file and line information
+ *  for you. */
+
+void UnityAssertEqualNumber(const UNITY_INT expected,
+                            const UNITY_INT actual,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber,
+                            const UNITY_DISPLAY_STYLE_T style);
+
+void UnityAssertGreaterOrLessOrEqualNumber(const UNITY_INT threshold,
+                                           const UNITY_INT actual,
+                                           const UNITY_COMPARISON_T compare,
+                                           const char *msg,
+                                           const UNITY_LINE_TYPE lineNumber,
+                                           const UNITY_DISPLAY_STYLE_T style);
+
+void UnityAssertEqualIntArray(UNITY_INTERNAL_PTR expected,
+                              UNITY_INTERNAL_PTR actual,
+                              const UNITY_UINT32 num_elements,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_DISPLAY_STYLE_T style,
+                              const UNITY_FLAGS_T flags);
+
+void UnityAssertBits(const UNITY_INT mask,
+                     const UNITY_INT expected,
+                     const UNITY_INT actual,
+                     const char* msg,
+                     const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualString(const char* expected,
+                            const char* actual,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualStringLen(const char* expected,
+                            const char* actual,
+                            const UNITY_UINT32 length,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualStringArray( UNITY_INTERNAL_PTR expected,
+                                  const char** actual,
+                                  const UNITY_UINT32 num_elements,
+                                  const char* msg,
+                                  const UNITY_LINE_TYPE lineNumber,
+                                  const UNITY_FLAGS_T flags);
+
+void UnityAssertEqualMemory( UNITY_INTERNAL_PTR expected,
+                             UNITY_INTERNAL_PTR actual,
+                             const UNITY_UINT32 length,
+                             const UNITY_UINT32 num_elements,
+                             const char* msg,
+                             const UNITY_LINE_TYPE lineNumber,
+                             const UNITY_FLAGS_T flags);
+
+void UnityAssertNumbersWithin(const UNITY_UINT delta,
+                              const UNITY_INT expected,
+                              const UNITY_INT actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_DISPLAY_STYLE_T style);
+
+void UnityFail(const char* msg, const UNITY_LINE_TYPE line);
+
+void UnityIgnore(const char* msg, const UNITY_LINE_TYPE line);
+
+#ifndef UNITY_EXCLUDE_FLOAT
+void UnityAssertFloatsWithin(const UNITY_FLOAT delta,
+                             const UNITY_FLOAT expected,
+                             const UNITY_FLOAT actual,
+                             const char* msg,
+                             const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualFloatArray(UNITY_PTR_ATTRIBUTE const UNITY_FLOAT* expected,
+                                UNITY_PTR_ATTRIBUTE const UNITY_FLOAT* actual,
+                                const UNITY_UINT32 num_elements,
+                                const char* msg,
+                                const UNITY_LINE_TYPE lineNumber,
+                                const UNITY_FLAGS_T flags);
+
+void UnityAssertFloatSpecial(const UNITY_FLOAT actual,
+                             const char* msg,
+                             const UNITY_LINE_TYPE lineNumber,
+                             const UNITY_FLOAT_TRAIT_T style);
+#endif
+
+#ifndef UNITY_EXCLUDE_DOUBLE
+void UnityAssertDoublesWithin(const UNITY_DOUBLE delta,
+                              const UNITY_DOUBLE expected,
+                              const UNITY_DOUBLE actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualDoubleArray(UNITY_PTR_ATTRIBUTE const UNITY_DOUBLE* expected,
+                                 UNITY_PTR_ATTRIBUTE const UNITY_DOUBLE* actual,
+                                 const UNITY_UINT32 num_elements,
+                                 const char* msg,
+                                 const UNITY_LINE_TYPE lineNumber,
+                                 const UNITY_FLAGS_T flags);
+
+void UnityAssertDoubleSpecial(const UNITY_DOUBLE actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_FLOAT_TRAIT_T style);
+#endif
+
+/*-------------------------------------------------------
+ * Helpers
+ *-------------------------------------------------------*/
+
+UNITY_INTERNAL_PTR UnityNumToPtr(const UNITY_INT num, const UNITY_UINT8 size);
+#ifndef UNITY_EXCLUDE_FLOAT
+UNITY_INTERNAL_PTR UnityFloatToPtr(const float num);
+#endif
+#ifndef UNITY_EXCLUDE_DOUBLE
+UNITY_INTERNAL_PTR UnityDoubleToPtr(const double num);
+#endif
+
+/*-------------------------------------------------------
+ * Error Strings We Might Need
+ *-------------------------------------------------------*/
+
+extern const char UnityStrErrFloat[];
+extern const char UnityStrErrDouble[];
+extern const char UnityStrErr64[];
+
+/*-------------------------------------------------------
+ * Test Running Macros
+ *-------------------------------------------------------*/
+
+#ifndef UNITY_EXCLUDE_SETJMP_H
+#define TEST_PROTECT() (setjmp(Unity.AbortFrame) == 0)
+#define TEST_ABORT() longjmp(Unity.AbortFrame, 1)
+#else
+#define TEST_PROTECT() 1
+#define TEST_ABORT() return
+#endif
+
+#ifndef UNITY_EXCLUDE_TIME_H
+#define UNITY_CLOCK_MS() (UNITY_COUNTER_TYPE)((clock() * 1000) / CLOCKS_PER_SEC)
+#else
+#define UNITY_CLOCK_MS()
+#endif
+
+/* This tricky series of macros gives us an optional line argument to treat it as RUN_TEST(func, num=__LINE__) */
+#ifndef RUN_TEST
+#ifdef __STDC_VERSION__
+#if __STDC_VERSION__ >= 199901L
+#define RUN_TEST(...) UnityDefaultTestRun(RUN_TEST_FIRST(__VA_ARGS__), RUN_TEST_SECOND(__VA_ARGS__))
+#define RUN_TEST_FIRST(...) RUN_TEST_FIRST_HELPER(__VA_ARGS__, throwaway)
+#define RUN_TEST_FIRST_HELPER(first, ...) (first), #first
+#define RUN_TEST_SECOND(...) RUN_TEST_SECOND_HELPER(__VA_ARGS__, __LINE__, throwaway)
+#define RUN_TEST_SECOND_HELPER(first, second, ...) (second)
+#endif
+#endif
+#endif
+
+/* If we can't do the tricky version, we'll just have to require them to always include the line number */
+#ifndef RUN_TEST
+#ifdef CMOCK
+#define RUN_TEST(func, num) UnityDefaultTestRun(func, #func, num)
+#else
+#define RUN_TEST(func) UnityDefaultTestRun(func, #func, __LINE__)
+#endif
+#endif
+
+#define TEST_LINE_NUM (Unity.CurrentTestLineNumber)
+#define TEST_IS_IGNORED (Unity.CurrentTestIgnored)
+#define UNITY_NEW_TEST(a) \
+    Unity.CurrentTestName = (a); \
+    Unity.CurrentTestLineNumber = (UNITY_LINE_TYPE)(__LINE__); \
+    Unity.NumberOfTests++;
+
+#ifndef UNITY_BEGIN
+#define UNITY_BEGIN() UnityBegin(__FILE__)
+#endif
+
+#ifndef UNITY_END
+#define UNITY_END() UnityEnd()
+#endif
+
+/*-----------------------------------------------
+ * Command Line Argument Support
+ *-----------------------------------------------*/
+
+#ifdef UNITY_USE_COMMAND_LINE_ARGS
+int UnityParseOptions(int argc, char** argv);
+int UnityTestMatches(void);
+#endif
+
+/*-------------------------------------------------------
+ * Basic Fail and Ignore
+ *-------------------------------------------------------*/
+
+#define UNITY_TEST_FAIL(line, message)   UnityFail(   (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_IGNORE(line, message) UnityIgnore( (message), (UNITY_LINE_TYPE)(line))
+
+/*-------------------------------------------------------
+ * Test Asserts
+ *-------------------------------------------------------*/
+
+#define UNITY_TEST_ASSERT(condition, line, message)                                              if (condition) {} else {UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), (message));}
+#define UNITY_TEST_ASSERT_NULL(pointer, line, message)                                           UNITY_TEST_ASSERT(((pointer) == NULL),  (UNITY_LINE_TYPE)(line), (message))
+#define UNITY_TEST_ASSERT_NOT_NULL(pointer, line, message)                                       UNITY_TEST_ASSERT(((pointer) != NULL),  (UNITY_LINE_TYPE)(line), (message))
+
+#define UNITY_TEST_ASSERT_EQUAL_INT(expected, actual, line, message)                             UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_EQUAL_INT8(expected, actual, line, message)                            UnityAssertEqualNumber((UNITY_INT)(UNITY_INT8 )(expected), (UNITY_INT)(UNITY_INT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_EQUAL_INT16(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT16)(expected), (UNITY_INT)(UNITY_INT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_EQUAL_INT32(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT32)(expected), (UNITY_INT)(UNITY_INT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_EQUAL_UINT(expected, actual, line, message)                            UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_EQUAL_UINT8(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_UINT8 )(expected), (UNITY_INT)(UNITY_UINT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_EQUAL_UINT16(expected, actual, line, message)                          UnityAssertEqualNumber((UNITY_INT)(UNITY_UINT16)(expected), (UNITY_INT)(UNITY_UINT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_EQUAL_UINT32(expected, actual, line, message)                          UnityAssertEqualNumber((UNITY_INT)(UNITY_UINT32)(expected), (UNITY_INT)(UNITY_UINT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_EQUAL_HEX8(expected, actual, line, message)                            UnityAssertEqualNumber((UNITY_INT)(UNITY_INT8 )(expected), (UNITY_INT)(UNITY_INT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_EQUAL_HEX16(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT16)(expected), (UNITY_INT)(UNITY_INT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_EQUAL_HEX32(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT32)(expected), (UNITY_INT)(UNITY_INT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+#define UNITY_TEST_ASSERT_BITS(mask, expected, actual, line, message)                            UnityAssertBits((UNITY_INT)(mask), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line))
+
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT(threshold, actual, line, message)                     UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold), (UNITY_INT)(UNITY_INT16)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold), (UNITY_INT)(UNITY_INT32)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT8(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT16(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT32(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT(threshold, actual, line, message)                     UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold), (UNITY_INT)(UNITY_INT16)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold), (UNITY_INT)(UNITY_INT32)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT8(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT16(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT32(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT(threshold, actual, line, message)                 UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold), (UNITY_INT)(UNITY_INT16)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold), (UNITY_INT)(UNITY_INT32)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT8(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT16(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT32(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT(threshold, actual, line, message)                 UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold), (UNITY_INT)(UNITY_INT16)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold), (UNITY_INT)(UNITY_INT32)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT8(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT16(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT32(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+
+#define UNITY_TEST_ASSERT_INT_WITHIN(delta, expected, actual, line, message)                     UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_INT8_WITHIN(delta, expected, actual, line, message)                    UnityAssertNumbersWithin((UNITY_UINT8 )(delta), (UNITY_INT)(UNITY_INT8 )(expected), (UNITY_INT)(UNITY_INT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_INT16_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT16)(delta), (UNITY_INT)(UNITY_INT16)(expected), (UNITY_INT)(UNITY_INT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_INT32_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT32)(delta), (UNITY_INT)(UNITY_INT32)(expected), (UNITY_INT)(UNITY_INT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_UINT_WITHIN(delta, expected, actual, line, message)                    UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_UINT8_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT8 )(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_UINT16_WITHIN(delta, expected, actual, line, message)                  UnityAssertNumbersWithin((UNITY_UINT16)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_UINT32_WITHIN(delta, expected, actual, line, message)                  UnityAssertNumbersWithin((UNITY_UINT32)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_HEX8_WITHIN(delta, expected, actual, line, message)                    UnityAssertNumbersWithin((UNITY_UINT8 )(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_HEX16_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT16)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_HEX32_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT32)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+
+#define UNITY_TEST_ASSERT_EQUAL_PTR(expected, actual, line, message)                             UnityAssertEqualNumber((UNITY_PTR_TO_INT)(expected), (UNITY_PTR_TO_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_POINTER)
+#define UNITY_TEST_ASSERT_EQUAL_STRING(expected, actual, line, message)                          UnityAssertEqualString((const char*)(expected), (const char*)(actual), (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_ASSERT_EQUAL_STRING_LEN(expected, actual, len, line, message)                 UnityAssertEqualStringLen((const char*)(expected), (const char*)(actual), (UNITY_UINT32)(len), (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_ASSERT_EQUAL_MEMORY(expected, actual, len, line, message)                     UnityAssertEqualMemory((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(len), 1, (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+
+#define UNITY_TEST_ASSERT_EQUAL_INT_ARRAY(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT,     UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_INT8_ARRAY(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8,    UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_INT16_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_INT32_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT_ARRAY(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT,    UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT8_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT32_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX8_ARRAY(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8,    UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX16_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_PTR_ARRAY(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_POINTER, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_STRING_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualStringArray((UNITY_INTERNAL_PTR)(expected), (const char**)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY(expected, actual, len, num_elements, line, message) UnityAssertEqualMemory((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(len), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT(expected, actual, num_elements, line, message)          UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)              (expected), sizeof(int)),  (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT,     UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT8(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT8  )(expected), 1),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8,    UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT16(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT16 )(expected), 2),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT32(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT32 )(expected), 4),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)              (expected), sizeof(unsigned int)), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT,    UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT8(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT8 )(expected), 1),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT16(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT16)(expected), 2),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT32(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT32)(expected), 4),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX8(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT8  )(expected), 1),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8,    UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX16(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT16 )(expected), 2),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX32(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT32 )(expected), 4),            (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_PTR(expected, actual, num_elements, line, message)          UnityAssertEqualIntArray(UnityNumToPtr((UNITY_PTR_TO_INT)       (expected), sizeof(int*)), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_POINTER, UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_STRING(expected, actual, num_elements, line, message)       UnityAssertEqualStringArray((UNITY_INTERNAL_PTR)(expected), (const char**)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_MEMORY(expected, actual, len, num_elements, line, message)  UnityAssertEqualMemory((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(len), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_VAL)
+
+#ifdef UNITY_SUPPORT_64
+#define UNITY_TEST_ASSERT_EQUAL_INT64(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64(expected, actual, line, message)                          UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT64(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT64)expected, 8), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT64(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT64)expected, 8), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64, UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX64(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT64)expected, 8), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_INT64_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_UINT64_WITHIN(delta, expected, actual, line, message)                  UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_HEX64_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT64(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT64(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#else
+#define UNITY_TEST_ASSERT_EQUAL_INT64(expected, actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64(expected, actual, line, message)                          UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64(expected, actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY(expected, actual, num_elements, line, message)      UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_INT64_WITHIN(delta, expected, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_UINT64_WITHIN(delta, expected, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_HEX64_WITHIN(delta, expected, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT64(threshold, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64(threshold, actual, line, message)              UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT64(threshold, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64(threshold, actual, line, message)              UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#endif
+
+#ifdef UNITY_EXCLUDE_FLOAT
+#define UNITY_TEST_ASSERT_FLOAT_WITHIN(delta, expected, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT(expected, actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT(expected, actual, num_elements, line, message)        UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_INF(actual, line, message)                                    UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF(actual, line, message)                                UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NAN(actual, line, message)                                    UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE(actual, line, message)                            UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF(actual, line, message)                                UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF(actual, line, message)                            UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN(actual, line, message)                                UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(actual, line, message)                        UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#else
+#define UNITY_TEST_ASSERT_FLOAT_WITHIN(delta, expected, actual, line, message)                   UnityAssertFloatsWithin((UNITY_FLOAT)(delta), (UNITY_FLOAT)(expected), (UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT(expected, actual, line, message)                           UNITY_TEST_ASSERT_FLOAT_WITHIN((UNITY_FLOAT)(expected) * (UNITY_FLOAT)UNITY_FLOAT_PRECISION, (UNITY_FLOAT)(expected), (UNITY_FLOAT)(actual), (UNITY_LINE_TYPE)(line), (message))
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualFloatArray((UNITY_FLOAT*)(expected), (UNITY_FLOAT*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT(expected, actual, num_elements, line, message)        UnityAssertEqualFloatArray(UnityFloatToPtr(expected), (UNITY_FLOAT*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_FLOAT_IS_INF(actual, line, message)                                    UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF(actual, line, message)                                UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NEG_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NAN(actual, line, message)                                    UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NAN)
+#define UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE(actual, line, message)                            UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_DET)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF(actual, line, message)                                UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF(actual, line, message)                            UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NEG_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN(actual, line, message)                                UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NAN)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(actual, line, message)                        UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_DET)
+#endif
+
+#ifdef UNITY_EXCLUDE_DOUBLE
+#define UNITY_TEST_ASSERT_DOUBLE_WITHIN(delta, expected, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE(expected, actual, line, message)                          UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY(expected, actual, num_elements, line, message)      UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_INF(actual, line, message)                                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF(actual, line, message)                               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NAN(actual, line, message)                                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE(actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF(actual, line, message)                               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF(actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN(actual, line, message)                               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(actual, line, message)                       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#else
+#define UNITY_TEST_ASSERT_DOUBLE_WITHIN(delta, expected, actual, line, message)                  UnityAssertDoublesWithin((UNITY_DOUBLE)(delta), (UNITY_DOUBLE)(expected), (UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)line)
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE(expected, actual, line, message)                          UNITY_TEST_ASSERT_DOUBLE_WITHIN((UNITY_DOUBLE)(expected) * (UNITY_DOUBLE)UNITY_DOUBLE_PRECISION, (UNITY_DOUBLE)expected, (UNITY_DOUBLE)actual, (UNITY_LINE_TYPE)(line), message)
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualDoubleArray((UNITY_DOUBLE*)(expected), (UNITY_DOUBLE*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)line, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE(expected, actual, num_elements, line, message)       UnityAssertEqualDoubleArray(UnityDoubleToPtr(expected), (UNITY_DOUBLE*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)line, UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_INF(actual, line, message)                                   UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF(actual, line, message)                               UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NEG_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NAN(actual, line, message)                                   UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NAN)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE(actual, line, message)                           UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_DET)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF(actual, line, message)                               UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF(actual, line, message)                           UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NEG_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN(actual, line, message)                               UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NAN)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(actual, line, message)                       UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_DET)
+#endif
+
+/* End of UNITY_INTERNALS_H */
+#endif
diff --git a/tools/sdk/esp32s3/include/usb/include/esp_private/usb_phy.h b/tools/sdk/esp32s3/include/usb/include/esp_private/usb_phy.h
new file mode 100644
index 00000000000..5260e0589e6
--- /dev/null
+++ b/tools/sdk/esp32s3/include/usb/include/esp_private/usb_phy.h
@@ -0,0 +1,144 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+#include "hal/usb_phy_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief USB PHY status
+ */
+typedef enum {
+    USB_PHY_STATUS_FREE,             /**< PHY is not being used */
+    USB_PHY_STATUS_IN_USE,           /**< PHY is in use */
+} usb_phy_status_t;
+
+/**
+ * @brief USB PHY available actions
+ */
+typedef enum {
+    USB_PHY_ACTION_HOST_ALLOW_CONN,             /**< Enable physical connection when operating as an OTG Host */
+    USB_PHY_ACTION_HOST_FORCE_DISCONN,          /**< Disable physical connection when operating as an OTG Host */
+    USB_PHY_ACTION_MAX,
+} usb_phy_action_t;
+
+/**
+ * @brief USB external PHY iopins configure struct
+ */
+typedef struct {
+    int vp_io_num;             /**< GPIO pin to USB_EXTPHY_VP_IDX */
+    int vm_io_num;             /**< GPIO pin to USB_EXTPHY_VM_IDX */
+    int rcv_io_num;            /**< GPIO pin to USB_EXTPHY_RCV_IDX */
+    int oen_io_num;            /**< GPIO pin to USB_EXTPHY_OEN_IDX */
+    int vpo_io_num;            /**< GPIO pin to USB_EXTPHY_VPO_IDX */
+    int vmo_io_num;            /**< GPIO pin to USB_EXTPHY_VMO_IDX */
+} usb_phy_gpio_conf_t;
+
+/**
+ * @brief USB PHY configure struct
+ *
+ * At minimum the PHY controller and PHY target must be initialized.
+ */
+typedef struct {
+    usb_phy_controller_t controller;    /**< USB PHY controller */
+    usb_phy_target_t target;            /**< USB PHY target INT/EXT */
+    usb_otg_mode_t otg_mode;            /**< USB OTG mode */
+    usb_phy_speed_t otg_speed;          /**< USB OTG speed */
+    usb_phy_gpio_conf_t *gpio_conf;     /**< USB external PHY iopins configure */
+} usb_phy_config_t;
+
+typedef struct phy_context_t *usb_phy_handle_t;    /**< USB PHY context handle */
+
+/**
+ * @brief Initialize a new USB PHY
+ *        Configure at least PHY source.
+ *
+ * This function will enable the OTG Controller
+ *
+ * @param[in] config USB PHY configurtion struct
+ * @param[out] handle_ret USB PHY context handle
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL USB PHY init error.
+ *     - ESP_ERR_INVALID_STATE USB PHY not installed.
+ *     - ESP_ERR_NO_MEM USB_OTG installation failed due to no mem.
+ */
+esp_err_t usb_new_phy(const usb_phy_config_t *config, usb_phy_handle_t *handle_ret);
+
+/**
+ * @brief Configure OTG mode for a USB PHY
+ *
+ * @param handle Pointer of USB PHY context handle
+ * @param mode USB OTG mode
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error.
+ *     - ESP_FAIL OTG set mode fail.
+ */
+esp_err_t usb_phy_otg_set_mode(usb_phy_handle_t handle, usb_otg_mode_t mode);
+
+/**
+ * @brief Configure USB speed for a USB PHY that is operating as an OTG Device
+ *
+ * @param handle Pointer of USB PHY context handle
+ * @param mode USB speed
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error.
+ *     - ESP_FAIL OTG set speed fail.
+ */
+esp_err_t usb_phy_otg_dev_set_speed(usb_phy_handle_t handle, usb_phy_speed_t speed);
+
+/**
+ * @brief Take a action for a USB PHY
+ *
+ * @param handle Pointer of USB PHY context handle
+ * @param action USB PHY action
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error.
+ *     - ESP_FAIL Action cannot be performed.
+ */
+esp_err_t usb_phy_action(usb_phy_handle_t handle, usb_phy_action_t action);
+
+/**
+ * @brief Delete a USB PHY
+ *
+ * @param handle Pointer of USB PHY context handle
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error.
+ */
+esp_err_t usb_del_phy(usb_phy_handle_t handle);
+
+/**
+ * @brief Get status of a USB PHY
+ *
+ * @param[in] target The specific PHY target to check
+ * @param[out] status Status of the PHY
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG Parameter error.
+ *     - ESP_ERR_INVALID_STATE USB PHY not installed.
+ */
+esp_err_t usb_phy_get_phy_status(usb_phy_target_t target, usb_phy_status_t *status);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/usb/include/usb/usb_helpers.h b/tools/sdk/esp32s3/include/usb/include/usb/usb_helpers.h
new file mode 100644
index 00000000000..955d2fa96d3
--- /dev/null
+++ b/tools/sdk/esp32s3/include/usb/include/usb/usb_helpers.h
@@ -0,0 +1,176 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+Warning: The USB Host Library API is still a beta version and may be subject to change
+*/
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_err.h"
+#include "usb/usb_types_stack.h"
+#include "usb/usb_types_ch9.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ---------------------------------------- Configuration Descriptor Parsing -------------------------------------------
+
+/**
+ * @brief Get the next descriptor
+ *
+ * Given a particular descriptor within a full configuration descriptor, get the next descriptor within the
+ * configuration descriptor. This is a convenience function that can be used to walk each individual descriptor within
+ * a full configuration descriptor.
+ *
+ * @param[in] cur_desc Current descriptor
+ * @param[in] wTotalLength Total length of the configuration descriptor
+ * @param[inout] offset Byte offset relative to the start of the configuration descriptor. On input, it is the offset of
+ *                      the current descriptor. On output, it is the offset of the returned descriptor.
+ * @return usb_standard_desc_t* Next descriptor, NULL if end of configuration descriptor reached
+ */
+const usb_standard_desc_t *usb_parse_next_descriptor(const usb_standard_desc_t *cur_desc, uint16_t wTotalLength, int *offset);
+
+/**
+ * @brief Get the next descriptor of a particular type
+ *
+ * Given a particular descriptor within a full configuration descriptor, get the next descriptor of a particular type
+ * (i.e., using the bDescriptorType value) within the configuration descriptor.
+ *
+ * @param[in] cur_desc Current descriptor
+ * @param[in] wTotalLength Total length of the configuration descriptor
+ * @param[in] bDescriptorType Type of the next descriptor to get
+ * @param[inout] offset Byte offset relative to the start of the configuration descriptor. On input, it is the offset of
+ *                      the current descriptor. On output, it is the offset of the returned descriptor.
+ * @return usb_standard_desc_t* Next descriptor, NULL if end descriptor is not found or configuration descriptor reached
+ */
+const usb_standard_desc_t *usb_parse_next_descriptor_of_type(const usb_standard_desc_t *cur_desc, uint16_t wTotalLength, uint8_t bDescriptorType, int *offset);
+
+/**
+ * @brief Get the number of alternate settings for a bInterfaceNumber
+ *
+ * Given a particular configuration descriptor, for a particular bInterfaceNumber, get the number of alternate settings
+ * available for that interface (i.e., the max possible value of bAlternateSetting for that bInterfaceNumber).
+ *
+ * @param[in] config_desc Pointer to the start of a full configuration descriptor
+ * @param[in] bInterfaceNumber Interface number
+ * @return int The number of alternate settings that the interface has, -1 if bInterfaceNumber not found
+ */
+int usb_parse_interface_number_of_alternate(const usb_config_desc_t *config_desc, uint8_t bInterfaceNumber);
+
+/**
+ * @brief Get a particular interface descriptor (using bInterfaceNumber and bAlternateSetting)
+ *
+ * Given a full configuration descriptor, get a particular interface descriptor.
+ *
+ * @note To get the number of alternate settings for a particular bInterfaceNumber, call
+ *       usb_parse_interface_number_of_alternate()
+ *
+ * @param[in] config_desc Pointer to the start of a full configuration descriptor
+ * @param[in] bInterfaceNumber Interface number
+ * @param[in] bAlternateSetting Alternate setting number
+ * @param[out] offset Byte offset of the interface descriptor relative to the start of the configuration descriptor. Can be NULL.
+ * @return const usb_intf_desc_t* Pointer to interface descriptor, NULL if not found.
+ */
+const usb_intf_desc_t *usb_parse_interface_descriptor(const usb_config_desc_t *config_desc, uint8_t bInterfaceNumber, uint8_t bAlternateSetting, int *offset);
+
+/**
+ * @brief Get an endpoint descriptor within an interface descriptor
+ *
+ * Given an interface descriptor, get the Nth endpoint descriptor of the interface. The number of endpoints in an
+ * interface is indicated by the bNumEndpoints field of the interface descriptor.
+ *
+ * @note If bNumEndpoints is 0, it means the interface uses the default endpoint only
+ *
+ * @param[in] intf_desc Pointer to thee start of an interface descriptor
+ * @param[in] index Endpoint index
+ * @param[in] wTotalLength Total length of the containing configuration descriptor
+ * @param[inout] offset Byte offset relative to the start of the configuration descriptor. On input, it is the offset
+ *                      of the interface descriptor. On output, it is the offset of the endpoint descriptor.
+ * @return const usb_ep_desc_t* Pointer to endpoint descriptor, NULL if not found.
+ */
+const usb_ep_desc_t *usb_parse_endpoint_descriptor_by_index(const usb_intf_desc_t *intf_desc, int index, uint16_t wTotalLength, int *offset);
+
+/**
+ * @brief Get an endpoint descriptor based on an endpoint's address
+ *
+ * Given a configuration descriptor, get an endpoint descriptor based on it's bEndpointAddress, bAlternateSetting, and
+ * bInterfaceNumber.
+ *
+ * @param[in] config_desc Pointer to the start of a full configuration descriptor
+ * @param[in] bInterfaceNumber Interface number
+ * @param[in] bAlternateSetting Alternate setting number
+ * @param[in] bEndpointAddress Endpoint address
+ * @param[out] offset Byte offset of the endpoint descriptor relative to the start of the configuration descriptor. Can be NULL
+ * @return const usb_ep_desc_t* Pointer to endpoint descriptor, NULL if not found.
+ */
+const usb_ep_desc_t *usb_parse_endpoint_descriptor_by_address(const usb_config_desc_t *config_desc, uint8_t bInterfaceNumber, uint8_t bAlternateSetting, uint8_t bEndpointAddress, int *offset);
+
+// ----------------------------------------------- Descriptor Printing -------------------------------------------------
+
+/**
+ * @brief Print class specific descriptor callback
+ *
+ * Optional callback to be provided to usb_print_config_descriptor() function.
+ * The callback is called when when a non-standard descriptor is encountered.
+ * The callback should decode the descriptor as print it.
+ */
+typedef void (*print_class_descriptor_cb)(const usb_standard_desc_t *);
+
+/**
+ * @brief Print device descriptor
+ *
+ * @param devc_desc Device descriptor
+ */
+void usb_print_device_descriptor(const usb_device_desc_t *devc_desc);
+
+/**
+ * @brief Print configuration descriptor
+ *
+ * - This function prints the full contents of a configuration descriptor (including interface and endpoint descriptors)
+ * - When a non-standard descriptor is encountered, this function will call the class_specific_cb if it is provided
+ *
+ * @param cfg_desc Configuration descriptor
+ * @param class_specific_cb Class specific descriptor callback. Can be NULL
+ */
+void usb_print_config_descriptor(const usb_config_desc_t *cfg_desc, print_class_descriptor_cb class_specific_cb);
+
+/**
+ * @brief Print a string descriptor
+ *
+ * This funciton will only print ASCII characters of the UTF-16 encoded string
+ *
+ * @param str_desc String descriptor
+ */
+void usb_print_string_descriptor(const usb_str_desc_t *str_desc);
+
+// ------------------------------------------------------ Misc ---------------------------------------------------------
+
+/**
+ * @brief Round up to an integer multiple of endpoint's MPS
+ *
+ * This is a convenience function to round up a size/length to an endpoint's MPS (Maximum packet size). This is useful
+ * when calculating transfer or buffer lengths of IN endpoints.
+ * - If MPS <= 0, this function will return 0
+ * - If num_bytes <= 0, this function will return 0
+ *
+ * @param[in] num_bytes Number of bytes
+ * @param[in] mps MPS
+ * @return int Round up integer multiple of MPS
+ */
+static inline int usb_round_up_to_mps(int num_bytes, int mps)
+{
+    if (num_bytes <= 0 || mps <= 0) {    //MPS can never be zero
+        return 0;
+    }
+    return ((num_bytes + mps - 1) / mps) * mps;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/usb/include/usb/usb_host.h b/tools/sdk/esp32s3/include/usb/include/usb/usb_host.h
new file mode 100644
index 00000000000..8c6f6f42b1b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/usb/include/usb/usb_host.h
@@ -0,0 +1,479 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+Warning: The USB Host Library API is still a beta version and may be subject to change
+*/
+
+#pragma once
+
+#include <stdint.h>
+#include "freertos/FreeRTOS.h"
+#include "esp_err.h"
+#include "esp_intr_alloc.h"
+//Include the other USB Host Library headers as well
+#include "usb/usb_helpers.h"
+#include "usb/usb_types_ch9.h"
+#include "usb/usb_types_stack.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ------------------------------------------------- Macros and Types --------------------------------------------------
+
+// ----------------------- Handles -------------------------
+
+/**
+ * @brief Handle to a USB Host Library asynchronous client
+ *
+ * An asynchronous client can be registered using usb_host_client_register()
+ *
+ * @note Asynchronous API
+ */
+typedef struct usb_host_client_handle_s * usb_host_client_handle_t;
+
+// ----------------------- Events --------------------------
+
+#define USB_HOST_LIB_EVENT_FLAGS_NO_CLIENTS     0x01    /**< All clients have been deregistered from the USB Host Library */
+#define USB_HOST_LIB_EVENT_FLAGS_ALL_FREE       0x02    /**< The USB Host Library has freed all devices */
+
+/**
+ * @brief The type event in a client event message
+ */
+typedef enum {
+    USB_HOST_CLIENT_EVENT_NEW_DEV,                  /**< A new device has been enumerated and added to the USB Host Library */
+    USB_HOST_CLIENT_EVENT_DEV_GONE,                 /**< A device opened by the client is now gone */
+} usb_host_client_event_t;
+
+/**
+ * @brief Client event message
+ *
+ * Client event messages are sent to each client of the USB Host Library in order to notify them of various
+ * USB Host Library events such as:
+ * - Addition of new devices
+ * - Removal of existing devices
+ *
+ * @note The event message structure has a union with members corresponding to each particular event. Based on the event
+ *       type, only the relevant member field should be accessed.
+ */
+typedef struct {
+    usb_host_client_event_t event;              /**< Type of event */
+    union {
+        struct {
+            uint8_t address;                    /**< New device's address */
+        } new_dev;
+        struct {
+            usb_device_handle_t dev_hdl;        /**< The handle of the device that was gone */
+        } dev_gone;
+    };
+} usb_host_client_event_msg_t;
+
+// ------------------------ Info ---------------------------
+
+/**
+ * @brief Current information about the USB Host Library obtained via usb_host_lib_info()
+ */
+typedef struct {
+    int num_devices;    /**< Current number of connected (and enumerated) devices */
+    int num_clients;    /**< Current number of registered clients */
+} usb_host_lib_info_t;
+
+// ---------------------- Callbacks ------------------------
+
+/**
+ * @brief Client event callback
+ *
+ * - Each client of the USB Host Library must register an event callback to receive event messages from the USB Host
+ *   Library.
+ * - The client event callback is run from the context of the clients usb_host_client_handle_events() function
+ */
+typedef void (*usb_host_client_event_cb_t)(const usb_host_client_event_msg_t *event_msg, void *arg);
+
+// -------------------- Configurations ---------------------
+
+/**
+ * @brief USB Host Library configuration
+ *
+ * Configuration structure of the USB Host Library. Provided in the usb_host_install() function
+ */
+typedef struct {
+    bool skip_phy_setup;        /**< If set, the USB Host Library will not configure the USB PHY thus allowing the user
+                                     to manually configure the USB PHY before calling usb_host_install(). Users should
+                                     set this if they want to use an external USB PHY. Otherwise, the USB Host Library
+                                     will automatically configure the internal USB PHY */
+    int intr_flags;             /**< Interrupt flags for the underlying ISR used by the USB Host stack */
+} usb_host_config_t;
+
+/**
+ * @brief USB Host Library Client configuration
+ *
+ * Configuration structure for a USB Host Library client. Provided in usb_host_client_register()
+ */
+typedef struct {
+    bool is_synchronous;        /**< Whether the client is asynchronous or synchronous or not. Set to false for now. */
+    int max_num_event_msg;      /**< Maximum number of event messages that can be stored (e.g., 3) */
+    union {     //Note: Made into union or future expansion
+        struct {
+            usb_host_client_event_cb_t client_event_callback;   /**< Client's event callback function */
+            void *callback_arg;                                 /**< Event callback function argument */
+        } async;
+    };
+} usb_host_client_config_t;
+
+// ------------------------------------------------ Library Functions --------------------------------------------------
+
+/**
+ * @brief Install the USB Host Library
+ *
+ * - This function should only once to install the USB Host Library
+ * - This function should be called before any other USB Host Library functions are called
+ *
+ * @note If skip_phy_setup is set in the install configuration, the user is responsible for ensuring that the underlying
+ *       Host Controller is enabled and the USB PHY (internal or external) is already setup before this function is
+ *       called.
+ * @param[in] config USB Host Library configuration
+ * @return esp_err_t
+ */
+esp_err_t usb_host_install(const usb_host_config_t *config);
+
+/**
+ * @brief Uninstall the USB Host Library
+ *
+ * - This function should be called to uninstall the USB Host Library, thereby freeing its resources
+ * - All clients must have been deregistered before calling this function
+ * - All devices must have been freed by calling usb_host_device_free_all() and receiving the
+ *   USB_HOST_LIB_EVENT_FLAGS_ALL_FREE event flag
+ *
+ * @note If skip_phy_setup was set when the Host Library was installed, the user is responsible for disabling the
+ *       underlying Host Controller and USB PHY (internal or external).
+ * @return esp_err_t
+ */
+esp_err_t usb_host_uninstall(void);
+
+/**
+ * @brief Handle USB Host Library events
+ *
+ * - This function handles all of the USB Host Library's processing and should be called repeatedly in a loop
+ * - Check event_flags_ret to see if an flags are set indicating particular USB Host Library events
+ * - This function should never be called by multiple threads simultaneously
+ *
+ * @note This function can block
+ * @param[in] timeout_ticks Timeout in ticks to wait for an event to occur
+ * @param[out] event_flags_ret Event flags that indicate what USB Host Library event occurred.
+ * @return esp_err_t
+ */
+esp_err_t usb_host_lib_handle_events(TickType_t timeout_ticks, uint32_t *event_flags_ret);
+
+/**
+ * @brief Unblock the USB Host Library handler
+ *
+ * - This function simply unblocks the USB Host Library event handling function (usb_host_lib_handle_events())
+ *
+ * @return esp_err_t
+ */
+esp_err_t usb_host_lib_unblock(void);
+
+/**
+ * @brief Get current information about the USB Host Library
+ *
+ * @param[out] info_ret USB Host Library Information
+ * @return esp_err_t
+ */
+esp_err_t usb_host_lib_info(usb_host_lib_info_t *info_ret);
+
+// ------------------------------------------------ Client Functions ---------------------------------------------------
+
+/**
+ * @brief Register a client of the USB Host Library
+ *
+ * - This function registers a client of the USB Host Library
+ * - Once a client is registered, its processing function usb_host_client_handle_events() should be called repeatedly
+ *
+ * @param[in] client_config Client configuration
+ * @param[out] client_hdl_ret Client handle
+ * @return esp_err_t
+ */
+esp_err_t usb_host_client_register(const usb_host_client_config_t *client_config, usb_host_client_handle_t *client_hdl_ret);
+
+/**
+ * @brief Deregister a USB Host Library client
+ *
+ * - This function deregisters a client of the USB Host Library
+ * - The client must have closed all previously opened devices before attempting to deregister
+ *
+ * @param[in] client_hdl Client handle
+ * @return esp_err_t
+ */
+esp_err_t usb_host_client_deregister(usb_host_client_handle_t client_hdl);
+
+/**
+ * @brief USB Host Library client processing function
+ *
+ * - This function handles all of a client's processing and should be called repeatedly in a loop
+ * - For a particular client, this function should never be called by multiple threads simultaneously
+ *
+ * @note This function can block
+ * @param[in] client_hdl Client handle
+ * @param[in] timeout_ticks Timeout in ticks to wait for an event to occur
+ * @return esp_err_t
+ */
+esp_err_t usb_host_client_handle_events(usb_host_client_handle_t client_hdl, TickType_t timeout_ticks);
+
+/**
+ * @brief Unblock a client
+ *
+ * - This function simply unblocks a client if it is blocked on the usb_host_client_handle_events() function.
+ * - This function is useful when need to unblock a client in order to deregister it.
+ *
+ * @param[in] client_hdl Client handle
+ * @return esp_err_t
+ */
+esp_err_t usb_host_client_unblock(usb_host_client_handle_t client_hdl);
+
+// ------------------------------------------------- Device Handling ---------------------------------------------------
+
+/**
+ * @brief Open a device
+ *
+ * - This function allows a client to open a device
+ * - A client must open a device first before attempting to use it (e.g., sending transfers, device requests etc.)
+ *
+ * @param[in] client_hdl Client handle
+ * @param[in] dev_addr Device's address
+ * @param[out] dev_hdl_ret Device's handle
+ * @return esp_err_t
+ */
+esp_err_t usb_host_device_open(usb_host_client_handle_t client_hdl, uint8_t dev_addr, usb_device_handle_t *dev_hdl_ret);
+
+/**
+ * @brief Close a device
+ *
+ * - This function allows a client to close a device
+ * - A client must close a device after it has finished using the device (claimed interfaces must also be released)
+ * - A client must close all devices it has opened before deregistering
+ *
+ * @note This function can block
+ * @param[in] client_hdl Client handle
+ * @param[in] dev_hdl Device handle
+ * @return esp_err_t
+ */
+esp_err_t usb_host_device_close(usb_host_client_handle_t client_hdl, usb_device_handle_t dev_hdl);
+
+/**
+ * @brief Indicate that all devices can be freed when possible
+ *
+ * - This function marks all devices as waiting to be freed
+ * - If a device is not opened by any clients, it will be freed immediately
+ * - If a device is opened by at least one client, the device will be free when the last client closes that device.
+ * - Wait for the USB_HOST_LIB_EVENT_FLAGS_ALL_FREE flag to be set by usb_host_lib_handle_events() in order to know
+ *   when all devices have been freed
+ * - This function is useful when cleaning up devices before uninstalling the USB Host Library
+ *
+ * @return
+ *  - ESP_ERR_NOT_FINISHED: There are one or more devices that still need to be freed. Wait for USB_HOST_LIB_EVENT_FLAGS_ALL_FREE event
+ *  - ESP_OK: All devices already freed (i.e., there were no devices)
+ *  - Other: Error
+ */
+esp_err_t usb_host_device_free_all(void);
+
+/**
+ * @brief Fill a list of device address
+ *
+ * - This function fills an empty list with the address of connected devices
+ * - The Device addresses can then used in usb_host_device_open()
+ * - If there are more devices than the list_len, this function will only fill up to list_len number of devices.
+ *
+ * @param[in] list_len Length of the empty list
+ * @param[inout] dev_addr_list Empty list to be filled
+ * @param[out] num_dev_ret Number of devices
+ * @return esp_err_t
+ */
+esp_err_t usb_host_device_addr_list_fill(int list_len, uint8_t *dev_addr_list, int *num_dev_ret);
+
+// ------------------------------------------------- Device Requests ---------------------------------------------------
+
+// ------------------- Cached Requests ---------------------
+
+/**
+ * @brief Get device's information
+ *
+ * - This function gets some basic information of a device
+ * - The device must be opened first before attempting to get its information
+ *
+ * @note This function can block
+ * @param[in] dev_hdl Device handle
+ * @param[out] dev_info Device information
+ * @return esp_err_t
+ */
+esp_err_t usb_host_device_info(usb_device_handle_t dev_hdl, usb_device_info_t *dev_info);
+
+// ----------------------------------------------- Descriptor Requests -------------------------------------------------
+
+// ----------------- Cached Descriptors --------------------
+
+/**
+ * @brief Get device's device descriptor
+ *
+ * - A client must call usb_host_device_open() first
+ * - No control transfer is sent. The device's descriptor is cached on enumeration
+ * - This function simple returns a pointer to the cached descriptor
+ *
+ * @note No control transfer is sent. The device's descriptor is cached on enumeration
+ * @param[in] dev_hdl Device handle
+ * @param[out] device_desc Device descriptor
+ * @return esp_err_t
+ */
+esp_err_t usb_host_get_device_descriptor(usb_device_handle_t dev_hdl, const usb_device_desc_t **device_desc);
+
+/**
+ * @brief Get device's active configuration descriptor
+ *
+ * - A client must call usb_host_device_open() first
+ * - No control transfer is sent. The device's active configuration descriptor is cached on enumeration
+ * - This function simple returns a pointer to the cached descriptor
+ *
+ * @note This function can block
+ * @note No control transfer is sent. A device's active configuration descriptor is cached on enumeration
+ * @param[in] dev_hdl Device handle
+ * @param[out] config_desc Configuration descriptor
+ * @return esp_err_t
+ */
+esp_err_t usb_host_get_active_config_descriptor(usb_device_handle_t dev_hdl, const usb_config_desc_t **config_desc);
+
+// ----------------------------------------------- Interface Functions -------------------------------------------------
+
+/**
+ * @brief Function for a client to claim a device's interface
+ *
+ * - A client must claim a device's interface before attempting to communicate with any of its endpoints
+ * - Once an interface is claimed by a client, it cannot be claimed by any other client.
+ *
+ * @note This function can block
+ * @param[in] client_hdl Client handle
+ * @param[in] dev_hdl Device handle
+ * @param[in] bInterfaceNumber Interface number
+ * @param[in] bAlternateSetting Interface alternate setting number
+ * @return esp_err_t
+ */
+esp_err_t usb_host_interface_claim(usb_host_client_handle_t client_hdl, usb_device_handle_t dev_hdl, uint8_t bInterfaceNumber, uint8_t bAlternateSetting);
+
+/**
+ * @brief Function for a client to release a previously claimed interface
+ *
+ * - A client should release a device's interface after it no longer needs to communicate with the interface
+ * - A client must release all of its interfaces of a device it has claimed before being able to close the device
+ *
+ * @note This function can block
+ * @param[in] client_hdl Client handle
+ * @param[in] dev_hdl Device handle
+ * @param[in] bInterfaceNumber Interface number
+ * @return esp_err_t
+ */
+esp_err_t usb_host_interface_release(usb_host_client_handle_t client_hdl, usb_device_handle_t dev_hdl, uint8_t bInterfaceNumber);
+
+/**
+ * @brief Halt a particular endpoint
+ *
+ * - The device must have been opened by a client
+ * - The endpoint must be part of an interface claimed by a client
+ * - Once halted, the endpoint must be cleared using usb_host_endpoint_clear() before it can communicate again
+ *
+ * @note This function can block
+ * @param dev_hdl Device handle
+ * @param bEndpointAddress Endpoint address
+ * @return esp_err_t
+ */
+esp_err_t usb_host_endpoint_halt(usb_device_handle_t dev_hdl, uint8_t bEndpointAddress);
+
+/**
+ * @brief Flush a particular endpoint
+ *
+ * - The device must have been opened by a client
+ * - The endpoint must be part of an interface claimed by a client
+ * - The endpoint must have been halted (either through a transfer error, or usb_host_endpoint_halt())
+ * - Flushing an endpoint will caused an queued up transfers to be canceled
+ *
+ * @note This function can block
+ * @param dev_hdl Device handle
+ * @param bEndpointAddress Endpoint address
+ * @return esp_err_t
+ */
+esp_err_t usb_host_endpoint_flush(usb_device_handle_t dev_hdl, uint8_t bEndpointAddress);
+
+/**
+ * @brief Clear a halt on a particular endpoint
+ *
+ * - The device must have been opened by a client
+ * - The endpoint must be part of an interface claimed by a client
+ * - The endpoint must have been halted (either through a transfer error, or usb_host_endpoint_halt())
+ * - If the endpoint has any queued up transfers, clearing a halt will resume their execution
+ *
+ * @note This function can block
+ * @param dev_hdl Device handle
+ * @param bEndpointAddress Endpoint address
+ * @return esp_err_t
+ */
+esp_err_t usb_host_endpoint_clear(usb_device_handle_t dev_hdl, uint8_t bEndpointAddress);
+
+// ------------------------------------------------ Asynchronous I/O ---------------------------------------------------
+
+/**
+ * @brief Allocate a transfer object
+ *
+ * - This function allocates a transfer object
+ * - Each transfer object has a fixed sized buffer specified on allocation
+ * - A transfer object can be re-used indefinitely
+ * - A transfer can be submitted using usb_host_transfer_submit() or usb_host_transfer_submit_control()
+ *
+ * @param[in] data_buffer_size Size of the transfer's data buffer
+ * @param[in] num_isoc_packets Number of isochronous packets in transfer (set to 0 for non-isochronous transfers)
+ * @param[out] transfer Transfer object
+ * @return esp_err_t
+ */
+esp_err_t usb_host_transfer_alloc(size_t data_buffer_size, int num_isoc_packets, usb_transfer_t **transfer);
+
+/**
+ * @brief Free a transfer object
+ *
+ * - Free a transfer object previously allocated using usb_host_transfer_alloc()
+ * - The transfer must not be in-flight when attempting to free it
+ * - If a NULL pointer is passed, this function will simply return ESP_OK
+ *
+ * @param[in] transfer Transfer object
+ * @return esp_err_t
+ */
+esp_err_t usb_host_transfer_free(usb_transfer_t *transfer);
+
+/**
+ * @brief Submit a non-control transfer
+ *
+ * - Submit a transfer to a particular endpoint. The device and endpoint number is specified inside the transfer
+ * - The transfer must be properly initialized before submitting
+ * - On completion, the transfer's callback will be called from the client's usb_host_client_handle_events() function.
+ *
+ * @param[in] transfer Initialized transfer object
+ * @return esp_err_t
+ */
+esp_err_t usb_host_transfer_submit(usb_transfer_t *transfer);
+
+/**
+ * @brief Submit a control transfer
+ *
+ * - Submit a control transfer to a particular device. The client must have opened the device first
+ * - The transfer must be properly initialized before submitting. The first 8 bytes of the transfer's data buffer should
+ *   contain the control transfer setup packet
+ * - On completion, the transfer's callback will be called from the client's usb_host_client_handle_events() function.
+ *
+ * @param[in] client_hdl Client handle
+ * @param[in] transfer Initialized transfer object
+ * @return esp_err_t
+ */
+esp_err_t usb_host_transfer_submit_control(usb_host_client_handle_t client_hdl, usb_transfer_t *transfer);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/usb/include/usb/usb_types_ch9.h b/tools/sdk/esp32s3/include/usb/include/usb/usb_types_ch9.h
new file mode 100644
index 00000000000..b11305900f0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/usb/include/usb/usb_types_ch9.h
@@ -0,0 +1,485 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+Warning: The USB Host Library API is still a beta version and may be subject to change
+*/
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define USB_DESC_ATTR                   __attribute__((packed))
+
+// ---------------------------------------------------- Chapter 9 ------------------------------------------------------
+
+/**
+ * @brief USB2.0 device states
+ *
+ * See Table 9-1 of USB2.0 specification for more details
+ *
+ * @note The USB_DEVICE_STATE_NOT_ATTACHED is not part of the USB2.0 specification, but is a catch all state for devices
+ *       that need to be cleaned up after a sudden disconnection or port error.
+ */
+typedef enum {
+    USB_DEVICE_STATE_NOT_ATTACHED,              /**< The device was previously configured or suspended, but is no longer attached (either suddenly disconnected or a port error) */
+    USB_DEVICE_STATE_ATTACHED,                  /**< Device is attached to the USB, but is not powered. */
+    USB_DEVICE_STATE_POWERED,                   /**< Device is attached to the USB and powered, but has not been reset. */
+    USB_DEVICE_STATE_DEFAULT,                   /**< Device is attached to the USB and powered and has been reset, but has not been assigned a unique address. Device responds at the default address. */
+    USB_DEVICE_STATE_ADDRESS,                   /**< Device is attached to the USB, powered, has been reset, and a unique device address has been assigned. Device is not configured. */
+    USB_DEVICE_STATE_CONFIGURED,                /**< Device is attached to the USB, powered, has been reset, has a unique address, is configured, and is not suspended. The host may now use the function provided by the device. */
+    USB_DEVICE_STATE_SUSPENDED,                 /**< Device is, at minimum, attached to the USB and is powered and has not seen bus activity for 3 ms. It may also have a unique address and be configured for use. However, because the device is suspended, the host may not use the device’s function. */
+} usb_device_state_t;
+
+/**
+ * @brief Descriptor types from USB2.0 specification table 9.5
+ */
+#define USB_B_DESCRIPTOR_TYPE_DEVICE                        0x01
+#define USB_B_DESCRIPTOR_TYPE_CONFIGURATION                 0x02
+#define USB_B_DESCRIPTOR_TYPE_STRING                        0x03
+#define USB_B_DESCRIPTOR_TYPE_INTERFACE                     0x04
+#define USB_B_DESCRIPTOR_TYPE_ENDPOINT                      0x05
+#define USB_B_DESCRIPTOR_TYPE_DEVICE_QUALIFIER              0x06
+#define USB_B_DESCRIPTOR_TYPE_OTHER_SPEED_CONFIGURATION     0x07
+#define USB_B_DESCRIPTOR_TYPE_INTERFACE_POWER               0x08
+
+/**
+ * @brief Descriptor types from USB 2.0 ECN
+ */
+#define USB_B_DESCRIPTOR_TYPE_OTG                           0x09
+#define USB_B_DESCRIPTOR_TYPE_DEBUG                         0x0a
+#define USB_B_DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION         0x0b
+
+/**
+ * @brief Descriptor types from Wireless USB spec
+ */
+#define USB_B_DESCRIPTOR_TYPE_SECURITY                      0x0c
+#define USB_B_DESCRIPTOR_TYPE_KEY                           0x0d
+#define USB_B_DESCRIPTOR_TYPE_ENCRYPTION_TYPE               0x0e
+#define USB_B_DESCRIPTOR_TYPE_BOS                           0x0f
+#define USB_B_DESCRIPTOR_TYPE_DEVICE_CAPABILITY             0x10
+#define USB_B_DESCRIPTOR_TYPE_WIRELESS_ENDPOINT_COMP        0x11
+#define USB_B_DESCRIPTOR_TYPE_WIRE_ADAPTER                  0x21
+#define USB_B_DESCRIPTOR_TYPE_RPIPE                         0x22
+#define USB_B_DESCRIPTOR_TYPE_CS_RADIO_CONTROL              0x23
+
+/**
+ * @brief Descriptor types from UAS specification
+ */
+#define USB_B_DESCRIPTOR_TYPE_PIPE_USAGE                    0x24
+
+// -------------------- Setup Packet -----------------------
+
+/**
+ * @brief Size of a USB control transfer setup packet in bytes
+ */
+#define USB_SETUP_PACKET_SIZE               8
+
+/**
+ * @brief Structure representing a USB control transfer setup packet
+ *
+ * See Table 9-2 of USB2.0 specification for more details
+ */
+typedef union {
+    struct {
+        uint8_t bmRequestType;              /**< Characteristics of request */
+        uint8_t bRequest;                   /**< Specific request */
+        uint16_t wValue;                    /**< Word-sized field that varies according to request */
+        uint16_t wIndex;                    /**< Word-sized field that varies according to request; typically used to pass an index or offset */
+        uint16_t wLength;                   /**< Number of bytes to transfer if there is a data stage */
+    } __attribute__((packed));
+    uint8_t val[USB_SETUP_PACKET_SIZE];
+} usb_setup_packet_t;
+_Static_assert(sizeof(usb_setup_packet_t) == USB_SETUP_PACKET_SIZE, "Size of usb_setup_packet_t incorrect");
+
+/**
+ * @brief Bit masks belonging to the bmRequestType field of a setup packet
+ */
+#define USB_BM_REQUEST_TYPE_DIR_OUT         (0X00 << 7)
+#define USB_BM_REQUEST_TYPE_DIR_IN          (0x01 << 7)
+#define USB_BM_REQUEST_TYPE_TYPE_STANDARD   (0x00 << 5)
+#define USB_BM_REQUEST_TYPE_TYPE_CLASS      (0x01 << 5)
+#define USB_BM_REQUEST_TYPE_TYPE_VENDOR     (0x02 << 5)
+#define USB_BM_REQUEST_TYPE_TYPE_RESERVED   (0x03 << 5)
+#define USB_BM_REQUEST_TYPE_TYPE_MASK       (0x03 << 5)
+#define USB_BM_REQUEST_TYPE_RECIP_DEVICE    (0x00 << 0)
+#define USB_BM_REQUEST_TYPE_RECIP_INTERFACE (0x01 << 0)
+#define USB_BM_REQUEST_TYPE_RECIP_ENDPOINT  (0x02 << 0)
+#define USB_BM_REQUEST_TYPE_RECIP_OTHER     (0x03 << 0)
+#define USB_BM_REQUEST_TYPE_RECIP_MASK      (0x1f << 0)
+
+/**
+ * @brief Bit masks belonging to the bRequest field of a setup packet
+ */
+#define USB_B_REQUEST_GET_STATUS            0x00
+#define USB_B_REQUEST_CLEAR_FEATURE         0x01
+#define USB_B_REQUEST_SET_FEATURE           0x03
+#define USB_B_REQUEST_SET_ADDRESS           0x05
+#define USB_B_REQUEST_GET_DESCRIPTOR        0x06
+#define USB_B_REQUEST_SET_DESCRIPTOR        0x07
+#define USB_B_REQUEST_GET_CONFIGURATION     0x08
+#define USB_B_REQUEST_SET_CONFIGURATION     0x09
+#define USB_B_REQUEST_GET_INTERFACE         0x0A
+#define USB_B_REQUEST_SET_INTERFACE         0x0B
+#define USB_B_REQUEST_SYNCH_FRAME           0x0C
+
+/**
+ * @brief Bit masks belonging to the wValue field of a setup packet
+ */
+#define USB_W_VALUE_DT_DEVICE               0x01
+#define USB_W_VALUE_DT_CONFIG               0x02
+#define USB_W_VALUE_DT_STRING               0x03
+#define USB_W_VALUE_DT_INTERFACE            0x04
+#define USB_W_VALUE_DT_ENDPOINT             0x05
+#define USB_W_VALUE_DT_DEVICE_QUALIFIER     0x06
+#define USB_W_VALUE_DT_OTHER_SPEED_CONFIG   0x07
+#define USB_W_VALUE_DT_INTERFACE_POWER      0x08
+
+/**
+ * @brief Initializer for a SET_ADDRESS request
+ *
+ * Sets the address of a connected device
+ */
+#define USB_SETUP_PACKET_INIT_SET_ADDR(setup_pkt_ptr, addr) ({  \
+    (setup_pkt_ptr)->bmRequestType = USB_BM_REQUEST_TYPE_DIR_OUT | USB_BM_REQUEST_TYPE_TYPE_STANDARD |USB_BM_REQUEST_TYPE_RECIP_DEVICE;   \
+    (setup_pkt_ptr)->bRequest = USB_B_REQUEST_SET_ADDRESS;  \
+    (setup_pkt_ptr)->wValue = (addr);   \
+    (setup_pkt_ptr)->wIndex = 0;    \
+    (setup_pkt_ptr)->wLength = 0;   \
+})
+
+/**
+ * @brief Initializer for a request to get a device's device descriptor
+ */
+#define USB_SETUP_PACKET_INIT_GET_DEVICE_DESC(setup_pkt_ptr) ({  \
+    (setup_pkt_ptr)->bmRequestType = USB_BM_REQUEST_TYPE_DIR_IN | USB_BM_REQUEST_TYPE_TYPE_STANDARD | USB_BM_REQUEST_TYPE_RECIP_DEVICE;   \
+    (setup_pkt_ptr)->bRequest = USB_B_REQUEST_GET_DESCRIPTOR;   \
+    (setup_pkt_ptr)->wValue = (USB_W_VALUE_DT_DEVICE << 8); \
+    (setup_pkt_ptr)->wIndex = 0;    \
+    (setup_pkt_ptr)->wLength = 18;  \
+})
+
+/**
+ * @brief Initializer for a request to get a device's current configuration number
+ */
+#define USB_SETUP_PACKET_INIT_GET_CONFIG(setup_pkt_ptr) ({  \
+    (setup_pkt_ptr)->bmRequestType = USB_BM_REQUEST_TYPE_DIR_IN | USB_BM_REQUEST_TYPE_TYPE_STANDARD | USB_BM_REQUEST_TYPE_RECIP_DEVICE;   \
+    (setup_pkt_ptr)->bRequest = USB_B_REQUEST_GET_CONFIGURATION;    \
+    (setup_pkt_ptr)->wValue = 0;    \
+    (setup_pkt_ptr)->wIndex = 0;    \
+    (setup_pkt_ptr)->wLength = 1;   \
+})
+
+/**
+ * @brief Initializer for a request to get one of the device's current configuration descriptor
+ *
+ * - desc_index indicates the configuration's index number
+ * - Number of bytes of the configuration descriptor to get
+ */
+#define USB_SETUP_PACKET_INIT_GET_CONFIG_DESC(setup_pkt_ptr, desc_index, desc_len) ({    \
+    (setup_pkt_ptr)->bmRequestType = USB_BM_REQUEST_TYPE_DIR_IN | USB_BM_REQUEST_TYPE_TYPE_STANDARD | USB_BM_REQUEST_TYPE_RECIP_DEVICE;   \
+    (setup_pkt_ptr)->bRequest = USB_B_REQUEST_GET_DESCRIPTOR;   \
+    (setup_pkt_ptr)->wValue = (USB_W_VALUE_DT_CONFIG << 8) | ((desc_index) & 0xFF); \
+    (setup_pkt_ptr)->wIndex = 0;    \
+    (setup_pkt_ptr)->wLength = (desc_len);  \
+})
+
+/**
+ * @brief Initializer for a request to set a device's current configuration number
+ */
+#define USB_SETUP_PACKET_INIT_SET_CONFIG(setup_pkt_ptr, config_num) ({  \
+    (setup_pkt_ptr)->bmRequestType = USB_BM_REQUEST_TYPE_DIR_OUT | USB_BM_REQUEST_TYPE_TYPE_STANDARD | USB_BM_REQUEST_TYPE_RECIP_DEVICE;   \
+    (setup_pkt_ptr)->bRequest = USB_B_REQUEST_SET_CONFIGURATION;    \
+    (setup_pkt_ptr)->wValue = (config_num); \
+    (setup_pkt_ptr)->wIndex = 0;    \
+    (setup_pkt_ptr)->wLength = 0;   \
+})
+
+/**
+ * @brief Initializer for a request to set an interface's alternate setting
+ */
+#define USB_SETUP_PACKET_INIT_SET_INTERFACE(setup_pkt_ptr, intf_num, alt_setting_num) ({    \
+    (setup_pkt_ptr)->bmRequestType = USB_BM_REQUEST_TYPE_DIR_OUT | USB_BM_REQUEST_TYPE_TYPE_STANDARD | USB_BM_REQUEST_TYPE_RECIP_INTERFACE;  \
+    (setup_pkt_ptr)->bRequest = USB_B_REQUEST_SET_INTERFACE; \
+    (setup_pkt_ptr)->wValue = (alt_setting_num); \
+    (setup_pkt_ptr)->wIndex = (intf_num);  \
+    (setup_pkt_ptr)->wLength = 0;   \
+})
+
+/**
+ * @brief Initializer for a request to get an string descriptor
+ */
+#define USB_SETUP_PACKET_INIT_GET_STR_DESC(setup_pkt_ptr, string_index, lang_id, desc_len) ({ \
+    (setup_pkt_ptr)->bmRequestType = USB_BM_REQUEST_TYPE_DIR_IN | USB_BM_REQUEST_TYPE_TYPE_STANDARD | USB_BM_REQUEST_TYPE_RECIP_DEVICE; \
+    (setup_pkt_ptr)->bRequest = USB_B_REQUEST_GET_DESCRIPTOR; \
+    (setup_pkt_ptr)->wValue = (USB_W_VALUE_DT_STRING << 8) | ((string_index) & 0xFF); \
+    (setup_pkt_ptr)->wIndex = (lang_id); \
+    (setup_pkt_ptr)->wLength = (desc_len); \
+})
+
+// ---------------- Standard Descriptor --------------------
+
+/**
+ * @brief Size of dummy USB standard descriptor
+ */
+#define USB_STANDARD_DESC_SIZE              2
+
+/**
+ * @brief USB standard descriptor
+ *
+ * All USB standard descriptors start with these two bytes. Use this type when traversing over configuration descriptors
+ */
+typedef union {
+    struct {
+        uint8_t bLength;                    /**< Size of the descriptor in bytes */
+        uint8_t bDescriptorType;            /**< Descriptor Type */
+    } USB_DESC_ATTR;
+    uint8_t val[USB_STANDARD_DESC_SIZE];
+} usb_standard_desc_t;
+_Static_assert(sizeof(usb_standard_desc_t) == USB_STANDARD_DESC_SIZE, "Size of usb_standard_desc_t incorrect");
+
+// ------------------ Device Descriptor --------------------
+
+/**
+ * @brief Size of a USB device descriptor in bytes
+ */
+#define USB_DEVICE_DESC_SIZE                18
+
+/**
+ * @brief Structure representing a USB device descriptor
+ *
+ * See Table 9-8 of USB2.0 specification for more details
+ */
+typedef union {
+    struct {
+        uint8_t bLength;                    /**< Size of the descriptor in bytes */
+        uint8_t bDescriptorType;            /**< DEVICE Descriptor Type */
+        uint16_t bcdUSB;                    /**< USB Specification Release Number in Binary-Coded Decimal (i.e., 2.10 is 210H) */
+        uint8_t bDeviceClass;               /**< Class code (assigned by the USB-IF) */
+        uint8_t bDeviceSubClass;            /**< Subclass code (assigned by the USB-IF) */
+        uint8_t bDeviceProtocol;            /**< Protocol code (assigned by the USB-IF) */
+        uint8_t bMaxPacketSize0;            /**< Maximum packet size for endpoint zero (only 8, 16, 32, or 64 are valid) */
+        uint16_t idVendor;                  /**< Vendor ID (assigned by the USB-IF) */
+        uint16_t idProduct;                 /**< Product ID (assigned by the manufacturer) */
+        uint16_t bcdDevice;                 /**< Device release number in binary-coded decimal */
+        uint8_t iManufacturer;              /**< Index of string descriptor describing manufacturer */
+        uint8_t iProduct;                   /**< Index of string descriptor describing product */
+        uint8_t iSerialNumber;              /**< Index of string descriptor describing the device’s serial number */
+        uint8_t bNumConfigurations;         /**< Number of possible configurations */
+    } USB_DESC_ATTR;
+    uint8_t val[USB_DEVICE_DESC_SIZE];
+} usb_device_desc_t;
+_Static_assert(sizeof(usb_device_desc_t) == USB_DEVICE_DESC_SIZE, "Size of usb_device_desc_t incorrect");
+
+/**
+ * @brief Possible base class values of the bDeviceClass field of a USB device descriptor
+ */
+#define USB_CLASS_PER_INTERFACE             0x00
+#define USB_CLASS_AUDIO                     0x01
+#define USB_CLASS_COMM                      0x02
+#define USB_CLASS_HID                       0x03
+#define USB_CLASS_PHYSICAL                  0x05
+#define USB_CLASS_STILL_IMAGE               0x06
+#define USB_CLASS_PRINTER                   0x07
+#define USB_CLASS_MASS_STORAGE              0x08
+#define USB_CLASS_HUB                       0x09
+#define USB_CLASS_CDC_DATA                  0x0a
+#define USB_CLASS_CSCID                     0x0b
+#define USB_CLASS_CONTENT_SEC               0x0d
+#define USB_CLASS_VIDEO                     0x0e
+#define USB_CLASS_WIRELESS_CONTROLLER       0xe0
+#define USB_CLASS_PERSONAL_HEALTHCARE       0x0f
+#define USB_CLASS_AUDIO_VIDEO               0x10
+#define USB_CLASS_BILLBOARD                 0x11
+#define USB_CLASS_USB_TYPE_C_BRIDGE         0x12
+#define USB_CLASS_MISC                      0xef
+#define USB_CLASS_APP_SPEC                  0xfe
+#define USB_CLASS_VENDOR_SPEC               0xff
+
+/**
+ * @brief Vendor specific subclass code
+ */
+#define USB_SUBCLASS_VENDOR_SPEC            0xff
+
+// -------------- Configuration Descriptor -----------------
+
+/**
+ * @brief Size of a short USB configuration descriptor in bytes
+ *
+ * @note The size of a full USB configuration includes all the interface and endpoint
+ *       descriptors of that configuration.
+ */
+#define USB_CONFIG_DESC_SIZE        9
+
+/**
+ * @brief Structure representing a short USB configuration descriptor
+ *
+ * See Table 9-10 of USB2.0 specification for more details
+ *
+ * @note The full USB configuration includes all the interface and endpoint
+ *       descriptors of that configuration.
+ */
+typedef union {
+    struct {
+        uint8_t bLength;                    /**< Size of the descriptor in bytes */
+        uint8_t bDescriptorType;            /**< CONFIGURATION Descriptor Type */
+        uint16_t wTotalLength;              /**< Total length of data returned for this configuration */
+        uint8_t bNumInterfaces;             /**< Number of interfaces supported by this configuration */
+        uint8_t bConfigurationValue;        /**< Value to use as an argument to the SetConfiguration() request to select this configuration */
+        uint8_t iConfiguration;             /**< Index of string descriptor describing this configuration */
+        uint8_t bmAttributes;               /**< Configuration characteristics */
+        uint8_t bMaxPower;                  /**< Maximum power consumption of the USB device from the bus in this specific configuration when the device is fully operational. */
+    } USB_DESC_ATTR;
+    uint8_t val[USB_CONFIG_DESC_SIZE];
+} usb_config_desc_t;
+_Static_assert(sizeof(usb_config_desc_t) == USB_CONFIG_DESC_SIZE, "Size of usb_config_desc_t incorrect");
+
+/**
+ * @brief Bit masks belonging to the bmAttributes field of a configuration descriptor
+ */
+#define USB_BM_ATTRIBUTES_ONE               (1 << 7)    //Must be set
+#define USB_BM_ATTRIBUTES_SELFPOWER         (1 << 6)    //Self powered
+#define USB_BM_ATTRIBUTES_WAKEUP            (1 << 5)    //Can wake-up
+#define USB_BM_ATTRIBUTES_BATTERY           (1 << 4)    //Battery powered
+
+// ---------- Interface Association Descriptor -------------
+
+/**
+ * @brief Size of a USB interface association descriptor in bytes
+ */
+#define USB_IAD_DESC_SIZE    9
+
+/**
+ * @brief Structure representing a USB interface association descriptor
+ */
+typedef union {
+    struct {
+        uint8_t bLength;                    /**< Size of the descriptor in bytes */
+        uint8_t bDescriptorType;            /**< INTERFACE ASSOCIATION Descriptor Type */
+        uint8_t bFirstInterface;            /**< Interface number of the first interface that is associated with this function */
+        uint8_t bInterfaceCount;            /**< Number of contiguous interfaces that are associated with this function */
+        uint8_t bFunctionClass;             /**< Class code (assigned by USB-IF) */
+        uint8_t bFunctionSubClass;          /**< Subclass code (assigned by USB-IF) */
+        uint8_t bFunctionProtocol;          /**< Protocol code (assigned by USB-IF) */
+        uint8_t iFunction;                  /**< Index of string descriptor describing this function */
+    } USB_DESC_ATTR;
+    uint8_t val[USB_IAD_DESC_SIZE];
+} usb_iad_desc_t;
+_Static_assert(sizeof(usb_iad_desc_t) == USB_IAD_DESC_SIZE, "Size of usb_iad_desc_t incorrect");
+
+// ---------------- Interface Descriptor -------------------
+
+/**
+ * @brief Size of a USB interface descriptor in bytes
+ */
+#define USB_INTF_DESC_SIZE      9
+
+/**
+ * @brief Structure representing a USB interface descriptor
+ *
+ * See Table 9-12 of USB2.0 specification for more details
+ */
+typedef union {
+    struct {
+        uint8_t bLength;                    /**< Size of the descriptor in bytes */
+        uint8_t bDescriptorType;            /**< INTERFACE Descriptor Type */
+        uint8_t bInterfaceNumber;           /**< Number of this interface. */
+        uint8_t bAlternateSetting;          /**< Value used to select this alternate setting for the interface identified in the prior field */
+        uint8_t bNumEndpoints;              /**< Number of endpoints used by this interface (excluding endpoint zero). */
+        uint8_t bInterfaceClass;            /**< Class code (assigned by the USB-IF) */
+        uint8_t bInterfaceSubClass;         /**< Subclass code (assigned by the USB-IF) */
+        uint8_t bInterfaceProtocol;         /**< Protocol code (assigned by the USB) */
+        uint8_t iInterface;                 /**< Index of string descriptor describing this interface */
+    } USB_DESC_ATTR;
+    uint8_t val[USB_INTF_DESC_SIZE];
+} usb_intf_desc_t;
+_Static_assert(sizeof(usb_intf_desc_t) == USB_INTF_DESC_SIZE, "Size of usb_intf_desc_t incorrect");
+
+// ----------------- Endpoint Descriptor -------------------
+
+/**
+ * @brief Size of a USB endpoint descriptor in bytes
+ */
+#define USB_EP_DESC_SIZE        7
+
+/**
+ * @brief Structure representing a USB endpoint descriptor
+ *
+ * See Table 9-13 of USB2.0 specification for more details
+ */
+typedef union {
+    struct {
+        uint8_t bLength;                    /**< Size of the descriptor in bytes */
+        uint8_t bDescriptorType;            /**< ENDPOINT Descriptor Type */
+        uint8_t bEndpointAddress;           /**< The address of the endpoint on the USB device described by this descriptor */
+        uint8_t bmAttributes;               /**< This field describes the endpoint’s attributes when it is configured using the bConfigurationValue. */
+        uint16_t wMaxPacketSize;            /**< Maximum packet size this endpoint is capable of sending or receiving when this configuration is selected. */
+        uint8_t bInterval;                  /**< Interval for polling Isochronous and Interrupt endpoints. Expressed in frames or microframes depending on the device operating speed (1 ms for Low-Speed and Full-Speed or 125 us for USB High-Speed and above). */
+    } USB_DESC_ATTR;
+    uint8_t val[USB_EP_DESC_SIZE];
+} usb_ep_desc_t;
+_Static_assert(sizeof(usb_ep_desc_t) == USB_EP_DESC_SIZE, "Size of usb_ep_desc_t incorrect");
+
+/**
+ * @brief Bit masks belonging to the bEndpointAddress field of an endpoint descriptor
+ */
+#define USB_B_ENDPOINT_ADDRESS_EP_NUM_MASK              0x0f
+#define USB_B_ENDPOINT_ADDRESS_EP_DIR_MASK              0x80
+
+/**
+ * @brief Bit masks belonging to the bmAttributes field of an endpoint descriptor
+ */
+#define USB_BM_ATTRIBUTES_XFERTYPE_MASK                 0x03
+#define USB_BM_ATTRIBUTES_XFER_CONTROL                  (0 << 0)
+#define USB_BM_ATTRIBUTES_XFER_ISOC                     (1 << 0)
+#define USB_BM_ATTRIBUTES_XFER_BULK                     (2 << 0)
+#define USB_BM_ATTRIBUTES_XFER_INT                      (3 << 0)
+#define USB_BM_ATTRIBUTES_SYNCTYPE_MASK                 0x0C    /* in bmAttributes */
+#define USB_BM_ATTRIBUTES_SYNC_NONE                     (0 << 2)
+#define USB_BM_ATTRIBUTES_SYNC_ASYNC                    (1 << 2)
+#define USB_BM_ATTRIBUTES_SYNC_ADAPTIVE                 (2 << 2)
+#define USB_BM_ATTRIBUTES_SYNC_SYNC                     (3 << 2)
+#define USB_BM_ATTRIBUTES_USAGETYPE_MASK                0x30
+#define USB_BM_ATTRIBUTES_USAGE_DATA                    (0 << 4)
+#define USB_BM_ATTRIBUTES_USAGE_FEEDBACK                (1 << 4)
+#define USB_BM_ATTRIBUTES_USAGE_IMPLICIT_FB             (2 << 4)
+
+/**
+ * @brief Macro helpers to get information about an endpoint from its descriptor
+ */
+#define USB_EP_DESC_GET_XFERTYPE(desc_ptr) ((usb_transfer_type_t) ((desc_ptr)->bmAttributes & USB_BM_ATTRIBUTES_XFERTYPE_MASK))
+#define USB_EP_DESC_GET_EP_NUM(desc_ptr) ((desc_ptr)->bEndpointAddress & USB_B_ENDPOINT_ADDRESS_EP_NUM_MASK)
+#define USB_EP_DESC_GET_EP_DIR(desc_ptr) (((desc_ptr)->bEndpointAddress & USB_B_ENDPOINT_ADDRESS_EP_DIR_MASK) ? 1 : 0)
+#define USB_EP_DESC_GET_MPS(desc_ptr) ((desc_ptr)->wMaxPacketSize & 0x7FF)
+
+// ------------------ String Descriptor --------------------
+
+/**
+ * @brief Size of a short USB string descriptor in bytes
+ */
+#define USB_STR_DESC_SIZE       2
+
+/**
+ * @brief Structure representing a USB string descriptor
+ */
+typedef union {
+    struct {
+        uint8_t bLength;                    /**< Size of the descriptor in bytes */
+        uint8_t bDescriptorType;            /**< STRING Descriptor Type */
+        uint16_t wData[];                   /**< UTF-16LE encoded */
+    } USB_DESC_ATTR;
+    uint8_t val[USB_STR_DESC_SIZE];
+} usb_str_desc_t;
+_Static_assert(sizeof(usb_str_desc_t) == USB_STR_DESC_SIZE, "Size of usb_str_desc_t incorrect");
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/usb/include/usb/usb_types_stack.h b/tools/sdk/esp32s3/include/usb/include/usb/usb_types_stack.h
new file mode 100644
index 00000000000..c438c54a7f8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/usb/include/usb/usb_types_stack.h
@@ -0,0 +1,171 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+Warning: The USB Host Library API is still a beta version and may be subject to change
+*/
+
+#pragma once
+
+#include "usb/usb_types_ch9.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// ------------------------------------------------ Protocol Standard --------------------------------------------------
+
+/**
+ * @brief USB Standard Speeds
+ */
+typedef enum {
+    USB_SPEED_LOW = 0,                  /**< USB Low Speed (1.5 Mbit/s) */
+    USB_SPEED_FULL,                     /**< USB Full Speed (12 Mbit/s) */
+} usb_speed_t;
+
+/**
+ * @brief The type of USB transfer
+ *
+ * @note The enum values need to match the bmAttributes field of an EP descriptor
+ */
+typedef enum {
+    USB_TRANSFER_TYPE_CTRL = 0,
+    USB_TRANSFER_TYPE_ISOCHRONOUS,
+    USB_TRANSFER_TYPE_BULK,
+    USB_TRANSFER_TYPE_INTR,
+} usb_transfer_type_t;
+
+// ------------------------------------------------- Device Related ----------------------------------------------------
+
+/**
+ * @brief Handle of a USB Device connected to a USB Host
+ */
+typedef struct usb_device_handle_s * usb_device_handle_t;
+
+/**
+ * @brief Basic information of an enumerated device
+ */
+typedef struct {
+    usb_speed_t speed;                              /**< Device's speed */
+    uint8_t dev_addr;                               /**< Device's address */
+    uint8_t bMaxPacketSize0;                        /**< The maximum packet size of the device's default endpoint */
+    uint8_t bConfigurationValue;                    /**< Device's current configuration number */
+    const usb_str_desc_t *str_desc_manufacturer;    /**< Pointer to Manufacturer string descriptor (can be NULL) */
+    const usb_str_desc_t *str_desc_product;         /**< Pointer to Product string descriptor (can be NULL) */
+    const usb_str_desc_t *str_desc_serial_num;      /**< Pointer to Serial Number string descriptor (can be NULL) */
+} usb_device_info_t;
+
+// ------------------------------------------------ Transfer Related ---------------------------------------------------
+
+/**
+ * @brief The status of a particular transfer
+ */
+typedef enum {
+    USB_TRANSFER_STATUS_COMPLETED,      /**< The transfer was successful (but may be short) */
+    USB_TRANSFER_STATUS_ERROR,          /**< The transfer failed because due to excessive errors (e.g. no response or CRC error) */
+    USB_TRANSFER_STATUS_TIMED_OUT,      /**< The transfer failed due to a time out */
+    USB_TRANSFER_STATUS_CANCELED,       /**< The transfer was canceled */
+    USB_TRANSFER_STATUS_STALL,          /**< The transfer was stalled */
+    USB_TRANSFER_STATUS_OVERFLOW,       /**< The transfer as more data was sent than was requested */
+    USB_TRANSFER_STATUS_SKIPPED,        /**< ISOC packets only. The packet was skipped due to system latency or bus overload */
+    USB_TRANSFER_STATUS_NO_DEVICE,      /**< The transfer failed because the target device is gone */
+} usb_transfer_status_t;
+
+/**
+ * @brief Isochronous packet descriptor
+ *
+ * If the number of bytes in an Isochronous transfer is larger than the MPS of the endpoint, the transfer is split
+ * into multiple packets transmitted at the endpoint's specified interval. An array of Isochronous packet descriptors
+ * describes how an Isochronous transfer should be split into multiple packets.
+ */
+typedef struct {
+    int num_bytes;                                  /**< Number of bytes to transmit/receive in the packet. IN packets should be integer multiple of MPS */
+    int actual_num_bytes;                           /**< Actual number of bytes transmitted/received in the packet */
+    usb_transfer_status_t status;                   /**< Status of the packet */
+} usb_isoc_packet_desc_t;
+
+/**
+ * @brief USB transfer structure
+ *
+ * This structure is used to represent a transfer from a software client to an endpoint over the USB bus. Some of the
+ * fields are made const on purpose as they are fixed on allocation. Users should call the appropriate USB Host Library
+ * function to allocate a USB transfer structure instead of allocating this structure themselves.
+ *
+ * The transfer type is inferred from the endpoint this transfer is sent to. Depending on the transfer type, users
+ * should note the following:
+ *
+ * - Bulk: This structure represents a single bulk transfer. If the number of bytes exceeds the endpoint's MPS, the
+ *         transfer will be split into multiple MPS sized packets followed by a short packet.
+ * - Control: This structure represents a single control transfer. This first 8 bytes of the data_buffer must be filled
+ *            with the setup packet (see usb_setup_packet_t). The num_bytes field should be the total size of the
+ *            transfer (i.e., size of setup packet + wLength).
+ * - Interrupt: Represents an interrupt transfer. If num_bytes exceeds the MPS of the endpoint, the transfer will be
+ *              split into multiple packets, and each packet is transferred at the endpoint's specified interval.
+ * - Isochronous: Represents a stream of bytes that should be transferred to an endpoint at a fixed rate. The transfer
+ *                is split into packets according to the each isoc_packet_desc. A packet is transferred at each interval
+ *                of the endpoint. If an entire ISOC URB was transferred without error (skipped packets do not count as
+ *                errors), the URB's overall status and the status of each packet descriptor will be updated, and the
+ *                actual_num_bytes reflects the total bytes transferred over all packets. If the ISOC URB encounters an
+ *                error, the entire URB is considered erroneous so only the overall status will updated.
+ *
+ * @note For Bulk/Control/Interrupt IN transfers, the num_bytes must be a integer multiple of the endpoint's MPS
+ * @note This structure should be allocated via usb_host_transfer_alloc()
+ * @note Once the transfer has be submitted, users should not modify the structure until the transfer has completed
+ */
+typedef struct usb_transfer_s usb_transfer_t;
+
+/**
+ * @brief USB transfer completion callback
+ */
+typedef void (*usb_transfer_cb_t)(usb_transfer_t *transfer);
+
+struct usb_transfer_s{
+    uint8_t *const data_buffer;                     /**< Pointer to data buffer */
+    const size_t data_buffer_size;                  /**< Size of the data buffer in bytes */
+    int num_bytes;                                  /**< Number of bytes to transfer.
+                                                         Control transfers should include the size of the setup packet.
+                                                         Isochronous transfer should be the total transfer size of all packets.
+                                                         For non-control IN transfers, num_bytes should be an integer multiple of MPS. */
+    int actual_num_bytes;                           /**< Actual number of bytes transferred */
+    uint32_t flags;                                 /**< Transfer flags */
+    usb_device_handle_t device_handle;              /**< Device handle */
+    uint8_t bEndpointAddress;                       /**< Endpoint Address */
+    usb_transfer_status_t status;                   /**< Status of the transfer */
+    uint32_t timeout_ms;                            /**< Timeout (in milliseconds) of the packet (currently not supported yet) */
+    usb_transfer_cb_t callback;                     /**< Transfer callback */
+    void *context;                                  /**< Context variable for transfer to associate transfer with something */
+    const int num_isoc_packets;                     /**< Only relevant to Isochronous. Number of service periods (i.e., intervals) to transfer data buffer over. */
+    usb_isoc_packet_desc_t isoc_packet_desc[];      /**< Descriptors for each Isochronous packet */
+};
+
+/**
+ * @brief Terminate Bulk/Interrupt OUT transfer with a zero length packet
+ *
+ * OUT transfers normally terminate when the Host has transferred the exact amount of data it needs to the device.
+ * However, for bulk and interrupt OUT transfers, if the transfer size just happened to be a multiple of MPS, it will be
+ * impossible to know the boundary between two consecutive transfers to the same endpoint.
+ *
+ * Therefore, this flag will cause the transfer to automatically add a zero length packet (ZLP) at the end of the
+ * transfer if the following conditions are met:
+ * - The target endpoint is a Bulk/Interrupt OUT endpoint (Host to device)
+ * - The transfer's length (i.e., transfer.num_bytes) is a multiple of the endpoint's MPS
+ *
+ * Otherwise, this flag has no effect.
+ *
+ * Users should check whether their target device's class requires a ZLP, as not all Bulk/Interrupt OUT endpoints
+ * require them. For example:
+ * - For MSC Bulk Only Transport class, the Host MUST NEVER send a ZLP. Bulk transfer boundaries are determined by the CBW and CSW instead
+ * - For CDC Ethernet, the Host MUST ALWAYS send a ZLP if a segment (i.e., a transfer) is a multiple of MPS (See 3.3.1 Segment Delineation)
+ *
+ * @note See USB2.0 specification 5.7.3 and 5.8.3 for more details
+ * @note IN transfers normally terminate when the Host as receive the exact amount of data it needs (must be multiple of MPS)
+ *       or the endpoint sends a short packet to the Host
+ */
+#define USB_TRANSFER_FLAG_ZERO_PACK  0x01           /**< (For bulk OUT only). Indicates that a bulk OUT transfers should always terminate with a short packet, even if it means adding an extra zero length packet */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/vfs/include/esp_vfs.h b/tools/sdk/esp32s3/include/vfs/include/esp_vfs.h
new file mode 100644
index 00000000000..0498a3aa59b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/vfs/include/esp_vfs.h
@@ -0,0 +1,466 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __ESP_VFS_H__
+#define __ESP_VFS_H__
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdarg.h>
+#include <unistd.h>
+#include <utime.h>
+#include "freertos/FreeRTOS.h"
+#include "freertos/semphr.h"
+#include "esp_err.h"
+#include <sys/types.h>
+#include <sys/reent.h>
+#include <sys/stat.h>
+#include <sys/time.h>
+#include <sys/termios.h>
+#include <sys/poll.h>
+#include <sys/dirent.h>
+#include <string.h>
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef _SYS_TYPES_FD_SET
+#error "VFS should be used with FD_SETSIZE and FD_SET from sys/types.h"
+#endif
+
+/**
+ * Maximum number of (global) file descriptors.
+ */
+#define MAX_FDS         FD_SETSIZE /* for compatibility with fd_set and select() */
+
+/**
+ * Maximum length of path prefix (not including zero terminator)
+ */
+#define ESP_VFS_PATH_MAX 15
+
+/**
+ * Default value of flags member in esp_vfs_t structure.
+ */
+#define ESP_VFS_FLAG_DEFAULT        0
+
+/**
+ * Flag which indicates that FS needs extra context pointer in syscalls.
+ */
+#define ESP_VFS_FLAG_CONTEXT_PTR    1
+
+/*
+ * @brief VFS identificator used for esp_vfs_register_with_id()
+ */
+typedef int esp_vfs_id_t;
+
+/**
+ * @brief VFS semaphore type for select()
+ *
+ */
+typedef struct
+{
+    bool is_sem_local;      /*!< type of "sem" is SemaphoreHandle_t when true, defined by socket driver otherwise */
+    void *sem;              /*!< semaphore instance */
+} esp_vfs_select_sem_t;
+
+/**
+ * @brief VFS definition structure
+ *
+ * This structure should be filled with pointers to corresponding
+ * FS driver functions.
+ *
+ * VFS component will translate all FDs so that the filesystem implementation
+ * sees them starting at zero. The caller sees a global FD which is prefixed
+ * with an pre-filesystem-implementation.
+ *
+ * Some FS implementations expect some state (e.g. pointer to some structure)
+ * to be passed in as a first argument. For these implementations,
+ * populate the members of this structure which have _p suffix, set
+ * flags member to ESP_VFS_FLAG_CONTEXT_PTR and provide the context pointer
+ * to esp_vfs_register function.
+ * If the implementation doesn't use this extra argument, populate the
+ * members without _p suffix and set flags member to ESP_VFS_FLAG_DEFAULT.
+ *
+ * If the FS driver doesn't provide some of the functions, set corresponding
+ * members to NULL.
+ */
+typedef struct
+{
+    int flags;      /*!< ESP_VFS_FLAG_CONTEXT_PTR or ESP_VFS_FLAG_DEFAULT */
+    union {
+        ssize_t (*write_p)(void* p, int fd, const void * data, size_t size);                         /*!< Write with context pointer */
+        ssize_t (*write)(int fd, const void * data, size_t size);                                    /*!< Write without context pointer */
+    };
+    union {
+        off_t (*lseek_p)(void* p, int fd, off_t size, int mode);                                     /*!< Seek with context pointer */
+        off_t (*lseek)(int fd, off_t size, int mode);                                                /*!< Seek without context pointer */
+    };
+    union {
+        ssize_t (*read_p)(void* ctx, int fd, void * dst, size_t size);                               /*!< Read with context pointer */
+        ssize_t (*read)(int fd, void * dst, size_t size);                                            /*!< Read without context pointer */
+    };
+    union {
+        ssize_t (*pread_p)(void *ctx, int fd, void * dst, size_t size, off_t offset);                /*!< pread with context pointer */
+        ssize_t (*pread)(int fd, void * dst, size_t size, off_t offset);                             /*!< pread without context pointer */
+    };
+    union {
+        ssize_t (*pwrite_p)(void *ctx, int fd, const void *src, size_t size, off_t offset);          /*!< pwrite with context pointer */
+        ssize_t (*pwrite)(int fd, const void *src, size_t size, off_t offset);                       /*!< pwrite without context pointer */
+    };
+    union {
+        int (*open_p)(void* ctx, const char * path, int flags, int mode);                            /*!< open with context pointer */
+        int (*open)(const char * path, int flags, int mode);                                         /*!< open without context pointer */
+    };
+    union {
+        int (*close_p)(void* ctx, int fd);                                                           /*!< close with context pointer */
+        int (*close)(int fd);                                                                        /*!< close without context pointer */
+    };
+    union {
+        int (*fstat_p)(void* ctx, int fd, struct stat * st);                                         /*!< fstat with context pointer */
+        int (*fstat)(int fd, struct stat * st);                                                      /*!< fstat without context pointer */
+    };
+#ifdef CONFIG_VFS_SUPPORT_DIR
+    union {
+        int (*stat_p)(void* ctx, const char * path, struct stat * st);                               /*!< stat with context pointer */
+        int (*stat)(const char * path, struct stat * st);                                            /*!< stat without context pointer */
+    };
+    union {
+        int (*link_p)(void* ctx, const char* n1, const char* n2);                                    /*!< link with context pointer */
+        int (*link)(const char* n1, const char* n2);                                                 /*!< link without context pointer */
+    };
+    union {
+        int (*unlink_p)(void* ctx, const char *path);                                                /*!< unlink with context pointer */
+        int (*unlink)(const char *path);                                                             /*!< unlink without context pointer */
+    };
+    union {
+        int (*rename_p)(void* ctx, const char *src, const char *dst);                               /*!< rename with context pointer */
+        int (*rename)(const char *src, const char *dst);                                            /*!< rename without context pointer */
+    };
+    union {
+        DIR* (*opendir_p)(void* ctx, const char* name);                                             /*!< opendir with context pointer */
+        DIR* (*opendir)(const char* name);                                                          /*!< opendir without context pointer */
+    };
+    union {
+        struct dirent* (*readdir_p)(void* ctx, DIR* pdir);                                          /*!< readdir with context pointer */
+        struct dirent* (*readdir)(DIR* pdir);                                                       /*!< readdir without context pointer */
+    };
+    union {
+        int (*readdir_r_p)(void* ctx, DIR* pdir, struct dirent* entry, struct dirent** out_dirent); /*!< readdir_r with context pointer */
+        int (*readdir_r)(DIR* pdir, struct dirent* entry, struct dirent** out_dirent);              /*!< readdir_r without context pointer */
+    };
+    union {
+        long (*telldir_p)(void* ctx, DIR* pdir);                                                    /*!< telldir with context pointer */
+        long (*telldir)(DIR* pdir);                                                                 /*!< telldir without context pointer */
+    };
+    union {
+        void (*seekdir_p)(void* ctx, DIR* pdir, long offset);                                       /*!< seekdir with context pointer */
+        void (*seekdir)(DIR* pdir, long offset);                                                    /*!< seekdir without context pointer */
+    };
+    union {
+        int (*closedir_p)(void* ctx, DIR* pdir);                                                    /*!< closedir with context pointer */
+        int (*closedir)(DIR* pdir);                                                                 /*!< closedir without context pointer */
+    };
+    union {
+        int (*mkdir_p)(void* ctx, const char* name, mode_t mode);                                   /*!< mkdir with context pointer */
+        int (*mkdir)(const char* name, mode_t mode);                                                /*!< mkdir without context pointer */
+    };
+    union {
+        int (*rmdir_p)(void* ctx, const char* name);                                                /*!< rmdir with context pointer */
+        int (*rmdir)(const char* name);                                                             /*!< rmdir without context pointer */
+    };
+#endif // CONFIG_VFS_SUPPORT_DIR
+    union {
+        int (*fcntl_p)(void* ctx, int fd, int cmd, int arg);                                        /*!< fcntl with context pointer */
+        int (*fcntl)(int fd, int cmd, int arg);                                                     /*!< fcntl without context pointer */
+    };
+    union {
+        int (*ioctl_p)(void* ctx, int fd, int cmd, va_list args);                                   /*!< ioctl with context pointer */
+        int (*ioctl)(int fd, int cmd, va_list args);                                                /*!< ioctl without context pointer */
+    };
+    union {
+        int (*fsync_p)(void* ctx, int fd);                                                          /*!< fsync with context pointer */
+        int (*fsync)(int fd);                                                                       /*!< fsync without context pointer */
+    };
+#ifdef CONFIG_VFS_SUPPORT_DIR
+    union {
+        int (*access_p)(void* ctx, const char *path, int amode);                                    /*!< access with context pointer */
+        int (*access)(const char *path, int amode);                                                 /*!< access without context pointer */
+    };
+    union {
+        int (*truncate_p)(void* ctx, const char *path, off_t length);                               /*!< truncate with context pointer */
+        int (*truncate)(const char *path, off_t length);                                            /*!< truncate without context pointer */
+    };
+    union {
+        int (*utime_p)(void* ctx, const char *path, const struct utimbuf *times);                   /*!< utime with context pointer */
+        int (*utime)(const char *path, const struct utimbuf *times);                                /*!< utime without context pointer */
+    };
+#endif // CONFIG_VFS_SUPPORT_DIR
+#ifdef CONFIG_VFS_SUPPORT_TERMIOS
+    union {
+        int (*tcsetattr_p)(void *ctx, int fd, int optional_actions, const struct termios *p);       /*!< tcsetattr with context pointer */
+        int (*tcsetattr)(int fd, int optional_actions, const struct termios *p);                    /*!< tcsetattr without context pointer */
+    };
+    union {
+        int (*tcgetattr_p)(void *ctx, int fd, struct termios *p);                                   /*!< tcgetattr with context pointer */
+        int (*tcgetattr)(int fd, struct termios *p);                                                /*!< tcgetattr without context pointer */
+    };
+    union {
+        int (*tcdrain_p)(void *ctx, int fd);                                                        /*!< tcdrain with context pointer */
+        int (*tcdrain)(int fd);                                                                     /*!< tcdrain without context pointer */
+    };
+    union {
+        int (*tcflush_p)(void *ctx, int fd, int select);                                            /*!< tcflush with context pointer */
+        int (*tcflush)(int fd, int select);                                                         /*!< tcflush without context pointer */
+    };
+    union {
+        int (*tcflow_p)(void *ctx, int fd, int action);                                             /*!< tcflow with context pointer */
+        int (*tcflow)(int fd, int action);                                                          /*!< tcflow without context pointer */
+    };
+    union {
+        pid_t (*tcgetsid_p)(void *ctx, int fd);                                                     /*!< tcgetsid with context pointer */
+        pid_t (*tcgetsid)(int fd);                                                                  /*!< tcgetsid without context pointer */
+    };
+    union {
+        int (*tcsendbreak_p)(void *ctx, int fd, int duration);                                      /*!< tcsendbreak with context pointer */
+        int (*tcsendbreak)(int fd, int duration);                                                   /*!< tcsendbreak without context pointer */
+    };
+#endif // CONFIG_VFS_SUPPORT_TERMIOS
+#ifdef CONFIG_VFS_SUPPORT_SELECT
+    /** start_select is called for setting up synchronous I/O multiplexing of the desired file descriptors in the given VFS */
+    esp_err_t (*start_select)(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds, esp_vfs_select_sem_t sem, void **end_select_args);
+    /** socket select function for socket FDs with the functionality of POSIX select(); this should be set only for the socket VFS */
+    int (*socket_select)(int nfds, fd_set *readfds, fd_set *writefds, fd_set *errorfds, struct timeval *timeout);
+    /** called by VFS to interrupt the socket_select call when select is activated from a non-socket VFS driver; set only for the socket driver */
+    void (*stop_socket_select)(void *sem);
+    /** stop_socket_select which can be called from ISR; set only for the socket driver */
+    void (*stop_socket_select_isr)(void *sem, BaseType_t *woken);
+    /** end_select is called to stop the I/O multiplexing and deinitialize the environment created by start_select for the given VFS */
+    void* (*get_socket_select_semaphore)(void);
+    /** get_socket_select_semaphore returns semaphore allocated in the socket driver; set only for the socket driver */
+    esp_err_t (*end_select)(void *end_select_args);
+#endif // CONFIG_VFS_SUPPORT_SELECT
+} esp_vfs_t;
+
+/**
+ * Register a virtual filesystem for given path prefix.
+ *
+ * @param base_path  file path prefix associated with the filesystem.
+ *                   Must be a zero-terminated C string, may be empty.
+ *                   If not empty, must be up to ESP_VFS_PATH_MAX
+ *                   characters long, and at least 2 characters long.
+ *                   Name must start with a "/" and must not end with "/".
+ *                   For example, "/data" or "/dev/spi" are valid.
+ *                   These VFSes would then be called to handle file paths such as
+ *                   "/data/myfile.txt" or "/dev/spi/0".
+ *                   In the special case of an empty base_path, a "fallback"
+ *                   VFS is registered. Such VFS will handle paths which are not
+ *                   matched by any other registered VFS.
+ * @param vfs  Pointer to esp_vfs_t, a structure which maps syscalls to
+ *             the filesystem driver functions. VFS component doesn't
+ *             assume ownership of this pointer.
+ * @param ctx  If vfs->flags has ESP_VFS_FLAG_CONTEXT_PTR set, a pointer
+ *             which should be passed to VFS functions. Otherwise, NULL.
+ *
+ * @return  ESP_OK if successful, ESP_ERR_NO_MEM if too many VFSes are
+ *          registered.
+ */
+esp_err_t esp_vfs_register(const char* base_path, const esp_vfs_t* vfs, void* ctx);
+
+
+/**
+ * Special case function for registering a VFS that uses a method other than
+ * open() to open new file descriptors from the interval <min_fd; max_fd).
+ *
+ * This is a special-purpose function intended for registering LWIP sockets to VFS.
+ *
+ * @param vfs Pointer to esp_vfs_t. Meaning is the same as for esp_vfs_register().
+ * @param ctx Pointer to context structure. Meaning is the same as for esp_vfs_register().
+ * @param min_fd The smallest file descriptor this VFS will use.
+ * @param max_fd Upper boundary for file descriptors this VFS will use (the biggest file descriptor plus one).
+ *
+ * @return  ESP_OK if successful, ESP_ERR_NO_MEM if too many VFSes are
+ *          registered, ESP_ERR_INVALID_ARG if the file descriptor boundaries
+ *          are incorrect.
+ */
+esp_err_t esp_vfs_register_fd_range(const esp_vfs_t *vfs, void *ctx, int min_fd, int max_fd);
+
+/**
+ * Special case function for registering a VFS that uses a method other than
+ * open() to open new file descriptors. In comparison with
+ * esp_vfs_register_fd_range, this function doesn't pre-registers an interval
+ * of file descriptors. File descriptors can be registered later, by using
+ * esp_vfs_register_fd.
+ *
+ * @param vfs Pointer to esp_vfs_t. Meaning is the same as for esp_vfs_register().
+ * @param ctx Pointer to context structure. Meaning is the same as for esp_vfs_register().
+ * @param vfs_id Here will be written the VFS ID which can be passed to
+ *               esp_vfs_register_fd for registering file descriptors.
+ *
+ * @return  ESP_OK if successful, ESP_ERR_NO_MEM if too many VFSes are
+ *          registered, ESP_ERR_INVALID_ARG if the file descriptor boundaries
+ *          are incorrect.
+ */
+esp_err_t esp_vfs_register_with_id(const esp_vfs_t *vfs, void *ctx, esp_vfs_id_t *vfs_id);
+
+/**
+ * Unregister a virtual filesystem for given path prefix
+ *
+ * @param base_path  file prefix previously used in esp_vfs_register call
+ * @return ESP_OK if successful, ESP_ERR_INVALID_STATE if VFS for given prefix
+ *         hasn't been registered
+ */
+esp_err_t esp_vfs_unregister(const char* base_path);
+
+/**
+ * Unregister a virtual filesystem with the given index
+ *
+ * @param vfs_id  The VFS ID returned by esp_vfs_register_with_id
+ * @return ESP_OK if successful, ESP_ERR_INVALID_STATE if VFS for the given index
+ *         hasn't been registered
+ */
+esp_err_t esp_vfs_unregister_with_id(esp_vfs_id_t vfs_id);
+
+/**
+ * Special function for registering another file descriptor for a VFS registered
+ * by esp_vfs_register_with_id.
+ *
+ * @param vfs_id VFS identificator returned by esp_vfs_register_with_id.
+ * @param fd The registered file descriptor will be written to this address.
+ *
+ * @return  ESP_OK if the registration is successful,
+ *          ESP_ERR_NO_MEM if too many file descriptors are registered,
+ *          ESP_ERR_INVALID_ARG if the arguments are incorrect.
+ */
+esp_err_t esp_vfs_register_fd(esp_vfs_id_t vfs_id, int *fd);
+
+/**
+ * Special function for registering another file descriptor with given local_fd
+ * for a VFS registered by esp_vfs_register_with_id.
+ *
+ * @param vfs_id VFS identificator returned by esp_vfs_register_with_id.
+ * @param local_fd The fd in the local vfs. Passing -1 will set the local fd as the (*fd) value.
+ * @param permanent Whether the fd should be treated as permannet (not removed after close())
+ * @param fd The registered file descriptor will be written to this address.
+ *
+ * @return  ESP_OK if the registration is successful,
+ *          ESP_ERR_NO_MEM if too many file descriptors are registered,
+ *          ESP_ERR_INVALID_ARG if the arguments are incorrect.
+ */
+esp_err_t esp_vfs_register_fd_with_local_fd(esp_vfs_id_t vfs_id, int local_fd, bool permanent, int *fd);
+
+/**
+ * Special function for unregistering a file descriptor belonging to a VFS
+ * registered by esp_vfs_register_with_id.
+ *
+ * @param vfs_id VFS identificator returned by esp_vfs_register_with_id.
+ * @param fd File descriptor which should be unregistered.
+ *
+ * @return  ESP_OK if the registration is successful,
+ *          ESP_ERR_INVALID_ARG if the arguments are incorrect.
+ */
+esp_err_t esp_vfs_unregister_fd(esp_vfs_id_t vfs_id, int fd);
+
+/**
+ * These functions are to be used in newlib syscall table. They will be called by
+ * newlib when it needs to use any of the syscalls.
+ */
+/**@{*/
+ssize_t esp_vfs_write(struct _reent *r, int fd, const void * data, size_t size);
+off_t esp_vfs_lseek(struct _reent *r, int fd, off_t size, int mode);
+ssize_t esp_vfs_read(struct _reent *r, int fd, void * dst, size_t size);
+int esp_vfs_open(struct _reent *r, const char * path, int flags, int mode);
+int esp_vfs_close(struct _reent *r, int fd);
+int esp_vfs_fstat(struct _reent *r, int fd, struct stat * st);
+int esp_vfs_stat(struct _reent *r, const char * path, struct stat * st);
+int esp_vfs_link(struct _reent *r, const char* n1, const char* n2);
+int esp_vfs_unlink(struct _reent *r, const char *path);
+int esp_vfs_rename(struct _reent *r, const char *src, const char *dst);
+int esp_vfs_utime(const char *path, const struct utimbuf *times);
+/**@}*/
+
+/**
+ * @brief Synchronous I/O multiplexing which implements the functionality of POSIX select() for VFS
+ * @param nfds      Specifies the range of descriptors which should be checked.
+ *                  The first nfds descriptors will be checked in each set.
+ * @param readfds   If not NULL, then points to a descriptor set that on input
+ *                  specifies which descriptors should be checked for being
+ *                  ready to read, and on output indicates which descriptors
+ *                  are ready to read.
+ * @param writefds  If not NULL, then points to a descriptor set that on input
+ *                  specifies which descriptors should be checked for being
+ *                  ready to write, and on output indicates which descriptors
+ *                  are ready to write.
+ * @param errorfds  If not NULL, then points to a descriptor set that on input
+ *                  specifies which descriptors should be checked for error
+ *                  conditions, and on output indicates which descriptors
+ *                  have error conditions.
+ * @param timeout   If not NULL, then points to timeval structure which
+ *                  specifies the time period after which the functions should
+ *                  time-out and return. If it is NULL, then the function will
+ *                  not time-out. Note that the timeout period is rounded up to
+ *                  the system tick and incremented by one.
+ *
+ * @return      The number of descriptors set in the descriptor sets, or -1
+ *              when an error (specified by errno) have occurred.
+ */
+int esp_vfs_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *errorfds, struct timeval *timeout);
+
+/**
+ * @brief Notification from a VFS driver about a read/write/error condition
+ *
+ * This function is called when the VFS driver detects a read/write/error
+ * condition as it was requested by the previous call to start_select.
+ *
+ * @param sem semaphore structure which was passed to the driver by the start_select call
+ */
+void esp_vfs_select_triggered(esp_vfs_select_sem_t sem);
+
+/**
+ * @brief Notification from a VFS driver about a read/write/error condition (ISR version)
+ *
+ * This function is called when the VFS driver detects a read/write/error
+ * condition as it was requested by the previous call to start_select.
+ *
+ * @param sem semaphore structure which was passed to the driver by the start_select call
+ * @param woken is set to pdTRUE if the function wakes up a task with higher priority
+ */
+void esp_vfs_select_triggered_isr(esp_vfs_select_sem_t sem, BaseType_t *woken);
+
+/**
+ *
+ * @brief Implements the VFS layer of POSIX pread()
+ *
+ * @param fd         File descriptor used for read
+ * @param dst        Pointer to the buffer where the output will be written
+ * @param size       Number of bytes to be read
+ * @param offset     Starting offset of the read
+ *
+ * @return           A positive return value indicates the number of bytes read. -1 is return on failure and errno is
+ *                   set accordingly.
+ */
+ssize_t esp_vfs_pread(int fd, void *dst, size_t size, off_t offset);
+
+/**
+ *
+ * @brief Implements the VFS layer of POSIX pwrite()
+ *
+ * @param fd         File descriptor used for write
+ * @param src        Pointer to the buffer from where the output will be read
+ * @param size       Number of bytes to write
+ * @param offset     Starting offset of the write
+ *
+ * @return           A positive return value indicates the number of bytes written. -1 is return on failure and errno is
+ *                   set accordingly.
+ */
+ssize_t esp_vfs_pwrite(int fd, const void *src, size_t size, off_t offset);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif //__ESP_VFS_H__
diff --git a/tools/sdk/esp32s3/include/vfs/include/esp_vfs_cdcacm.h b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_cdcacm.h
new file mode 100644
index 00000000000..416efb35a4e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_cdcacm.h
@@ -0,0 +1,58 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_err.h"
+#include "esp_vfs.h"
+#include "esp_vfs_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief add /dev/cdcacm virtual filesystem driver
+ *
+ * This function is called from startup code to enable console output
+ */
+esp_err_t esp_vfs_dev_cdcacm_register(void);
+
+/**
+ * @brief Set the line endings expected to be received
+ *
+ * This specifies the conversion between line endings received and
+ * newlines ('\n', LF) passed into stdin:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert CRLF to LF
+ * - ESP_LINE_ENDINGS_CR: convert CR to LF
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. reading
+ *
+ * @param mode line endings expected
+ */
+void esp_vfs_dev_cdcacm_set_rx_line_endings(esp_line_endings_t mode);
+
+/**
+ * @brief Set the line endings to sent
+ *
+ * This specifies the conversion between newlines ('\n', LF) on stdout and line
+ * endings sent:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert LF to CRLF
+ * - ESP_LINE_ENDINGS_CR: convert LF to CR
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. writing
+ *
+ * @param mode line endings to send
+ */
+void esp_vfs_dev_cdcacm_set_tx_line_endings(esp_line_endings_t mode);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/vfs/include/esp_vfs_common.h b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_common.h
new file mode 100644
index 00000000000..2d7986a6676
--- /dev/null
+++ b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_common.h
@@ -0,0 +1,32 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Line ending settings
+ */
+typedef enum {
+    ESP_LINE_ENDINGS_CRLF,//!< CR + LF
+    ESP_LINE_ENDINGS_CR,  //!< CR
+    ESP_LINE_ENDINGS_LF,  //!< LF
+} esp_line_endings_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/vfs/include/esp_vfs_console.h b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_console.h
new file mode 100644
index 00000000000..bc5ce6733dd
--- /dev/null
+++ b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_console.h
@@ -0,0 +1,24 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief add uart/usb_serial_jtag/usb_otg_acmcdc virtual filesystem driver
+ *
+ * This function is called from startup code to enable serial output
+ */
+esp_err_t esp_vfs_console_register(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/vfs/include/esp_vfs_dev.h b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_dev.h
new file mode 100644
index 00000000000..91e9374972e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_dev.h
@@ -0,0 +1,125 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_vfs.h"
+#include "esp_vfs_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief add /dev/uart virtual filesystem driver
+ *
+ * This function is called from startup code to enable serial output
+ */
+void esp_vfs_dev_uart_register(void);
+
+/**
+ * @brief Set the line endings expected to be received on UART
+ *
+ * This specifies the conversion between line endings received on UART and
+ * newlines ('\n', LF) passed into stdin:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert CRLF to LF
+ * - ESP_LINE_ENDINGS_CR: convert CR to LF
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. reading from UART
+ *
+ * @param mode line endings expected on UART
+ */
+void esp_vfs_dev_uart_set_rx_line_endings(esp_line_endings_t mode) __attribute__((deprecated));
+
+/**
+ * @brief Set the line endings to sent to UART
+ *
+ * This specifies the conversion between newlines ('\n', LF) on stdout and line
+ * endings sent over UART:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert LF to CRLF
+ * - ESP_LINE_ENDINGS_CR: convert LF to CR
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. writing to UART
+ *
+ * @param mode line endings to send to UART
+ */
+void esp_vfs_dev_uart_set_tx_line_endings(esp_line_endings_t mode) __attribute__((deprecated));
+
+/**
+ * @brief Set the line endings expected to be received on specified UART
+ *
+ * This specifies the conversion between line endings received on UART and
+ * newlines ('\n', LF) passed into stdin:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert CRLF to LF
+ * - ESP_LINE_ENDINGS_CR: convert CR to LF
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. reading from UART
+ *
+ * @param uart_num the UART number
+ * @param mode line endings to send to UART
+ * @return  0 if successed, or -1
+ *              when an error (specified by errno) have occurred.
+ */
+int esp_vfs_dev_uart_port_set_rx_line_endings(int uart_num, esp_line_endings_t mode);
+
+/**
+ * @brief Set the line endings to sent to specified UART
+ *
+ * This specifies the conversion between newlines ('\n', LF) on stdout and line
+ * endings sent over UART:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert LF to CRLF
+ * - ESP_LINE_ENDINGS_CR: convert LF to CR
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. writing to UART
+ *
+ * @param uart_num the UART number
+ * @param mode line endings to send to UART
+  * @return  0 if successed, or -1
+ *              when an error (specified by errno) have occurred.
+ */
+int esp_vfs_dev_uart_port_set_tx_line_endings(int uart_num, esp_line_endings_t mode);
+
+/**
+ * @brief set VFS to use simple functions for reading and writing UART
+ * Read is non-blocking, write is busy waiting until TX FIFO has enough space.
+ * These functions are used by default.
+ * @param uart_num UART peripheral number
+ */
+void esp_vfs_dev_uart_use_nonblocking(int uart_num);
+
+/**
+ * @brief set VFS to use UART driver for reading and writing
+ * @note application must configure UART driver before calling these functions
+ * With these functions, read and write are blocking and interrupt-driven.
+ * @param uart_num UART peripheral number
+ */
+void esp_vfs_dev_uart_use_driver(int uart_num);
+
+/**
+ * @brief set VFS to use USB-SERIAL-JTAG driver for reading and writing
+ * @note application must configure USB-SERIAL-JTAG driver before calling these functions
+ * With these functions, read and write are blocking and interrupt-driven.
+ */
+void esp_vfs_usb_serial_jtag_use_driver(void);
+
+/**
+ * @brief set VFS to use simple functions for reading and writing UART
+ * Read is non-blocking, write is busy waiting until TX FIFO has enough space.
+ * These functions are used by default.
+ */
+void esp_vfs_usb_serial_jtag_use_nonblocking(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/vfs/include/esp_vfs_eventfd.h b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_eventfd.h
new file mode 100644
index 00000000000..430112111a0
--- /dev/null
+++ b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_eventfd.h
@@ -0,0 +1,71 @@
+// Copyright 2021 Espressif Systems (Shanghai) CO LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+
+#pragma once
+
+#include <stddef.h>
+#include <sys/types.h>
+
+#include "esp_err.h"
+
+#define EFD_SUPPORT_ISR (1 << 4)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Eventfd vfs initialization settings
+ */
+typedef struct {
+    size_t max_fds;     /*!< The maxinum number of eventfds supported */
+} esp_vfs_eventfd_config_t;
+
+#define ESP_VFS_EVENTD_CONFIG_DEFAULT() (esp_vfs_eventfd_config_t) { \
+      .max_fds = 5, \
+};
+
+/**
+ * @brief  Registers the event vfs.
+ *
+ * @return  ESP_OK if successful, ESP_ERR_NO_MEM if too many VFSes are
+ *          registered.
+ */
+esp_err_t esp_vfs_eventfd_register(const esp_vfs_eventfd_config_t *config);
+
+/**
+ * @brief  Unregisters the event vfs.
+ *
+ * @return ESP_OK if successful, ESP_ERR_INVALID_STATE if VFS for given prefix
+ *         hasn't been registered
+ */
+esp_err_t esp_vfs_eventfd_unregister(void);
+
+/*
+ * @brief Creates an event file descirptor.
+ *
+ * The behavior of read, write and select is the same as man(2) eventfd with
+ * EFD_SEMAPHORE **NOT** specified. A new flag EFD_SUPPORT_ISR has been added.
+ * This flag is required to write to event fds in interrupt handlers. Accessing
+ * the control blocks of event fds with EFD_SUPPORT_ISR will cause interrupts to
+ * be temporarily blocked (e.g. during read, write and beginning and ending of
+ * the * select).
+ *
+ * @return The file descriptor if successful, -1 if error happens.
+ */
+int eventfd(unsigned int initval, int flags);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/vfs/include/esp_vfs_semihost.h b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_semihost.h
new file mode 100644
index 00000000000..20a0ed55066
--- /dev/null
+++ b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_semihost.h
@@ -0,0 +1,46 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_vfs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief add virtual filesystem semihosting driver
+ *
+ * @param base_path VFS path to mount host directory
+ * @param host_path host path to mount; if NULL default dirctory will be used (see OpenOCD configuration)
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if esp_vfs_semihost_register was already called for specified VFS path
+ *      - ESP_ERR_NO_MEM if there are no slots to register new mount point
+ */
+esp_err_t esp_vfs_semihost_register(const char* base_path, const char* host_path);
+
+/**
+ * @brief Un-register semihosting driver from VFS
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if semihosting driver is not registered in VFS at that path
+ */
+esp_err_t esp_vfs_semihost_unregister(const char* base_path);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/vfs/include/esp_vfs_usb_serial_jtag.h b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_usb_serial_jtag.h
new file mode 100644
index 00000000000..c53a671be89
--- /dev/null
+++ b/tools/sdk/esp32s3/include/vfs/include/esp_vfs_usb_serial_jtag.h
@@ -0,0 +1,58 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_err.h"
+#include "esp_vfs.h"
+#include "esp_vfs_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief add /dev/usbserjtag virtual filesystem driver
+ *
+ * This function is called from startup code to enable console output
+ */
+esp_err_t esp_vfs_dev_usb_serial_jtag_register(void);
+
+/**
+ * @brief Set the line endings expected to be received
+ *
+ * This specifies the conversion between line endings received and
+ * newlines ('\n', LF) passed into stdin:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert CRLF to LF
+ * - ESP_LINE_ENDINGS_CR: convert CR to LF
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. reading
+ *
+ * @param mode line endings expected
+ */
+void esp_vfs_dev_usb_serial_jtag_set_rx_line_endings(esp_line_endings_t mode);
+
+/**
+ * @brief Set the line endings to sent
+ *
+ * This specifies the conversion between newlines ('\n', LF) on stdout and line
+ * endings sent:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert LF to CRLF
+ * - ESP_LINE_ENDINGS_CR: convert LF to CR
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. writing
+ *
+ * @param mode line endings to send
+ */
+void esp_vfs_dev_usb_serial_jtag_set_tx_line_endings(esp_line_endings_t mode);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/wear_levelling/include/wear_levelling.h b/tools/sdk/esp32s3/include/wear_levelling/include/wear_levelling.h
new file mode 100644
index 00000000000..137b13f1d19
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wear_levelling/include/wear_levelling.h
@@ -0,0 +1,136 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _wear_levelling_H_
+#define _wear_levelling_H_
+
+#include "esp_log.h"
+#include "esp_partition.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* @brief wear levelling handle
+*/
+typedef int32_t wl_handle_t;
+
+#define WL_INVALID_HANDLE -1
+
+/**
+* @brief Mount WL for defined partition
+*
+* @param partition that will be used for access
+* @param out_handle handle of the WL instance
+*
+* @return
+*       - ESP_OK, if the allocation was successfully;
+*       - ESP_ERR_INVALID_ARG, if WL allocation was unsuccessful;
+*       - ESP_ERR_NO_MEM, if there was no memory to allocate WL components;
+*/
+esp_err_t wl_mount(const esp_partition_t *partition, wl_handle_t *out_handle);
+
+/**
+* @brief Unmount WL for defined partition
+*
+* @param handle WL partition handle
+*
+* @return
+*       - ESP_OK, if the operation completed successfully;
+*       - or one of error codes from lower-level flash driver.
+*/
+esp_err_t wl_unmount(wl_handle_t handle);
+
+/**
+* @brief Erase part of the WL storage
+*
+* @param handle WL handle that are related to the partition
+* @param start_addr Address where erase operation should start. Must be aligned
+*                   to the result of function wl_sector_size(...).
+* @param size Size of the range which should be erased, in bytes.
+*                   Must be divisible by result of function wl_sector_size(...)..
+*
+* @return
+*       - ESP_OK, if the range was erased successfully;
+*       - ESP_ERR_INVALID_ARG, if iterator or dst are NULL;
+*       - ESP_ERR_INVALID_SIZE, if erase would go out of bounds of the partition;
+*       - or one of error codes from lower-level flash driver.
+*/
+esp_err_t wl_erase_range(wl_handle_t handle, size_t start_addr, size_t size);
+
+/**
+* @brief Write data to the WL storage
+*
+* Before writing data to flash, corresponding region of flash needs to be erased.
+* This can be done using wl_erase_range function.
+*
+* @param handle WL handle that are related to the partition
+* @param dest_addr Address where the data should be written, relative to the
+*                   beginning of the partition.
+* @param src Pointer to the source buffer.  Pointer must be non-NULL and
+*            buffer must be at least 'size' bytes long.
+* @param size Size of data to be written, in bytes.
+*
+* @note Prior to writing to WL storage, make sure it has been erased with
+*       wl_erase_range call.
+*
+* @return
+*       - ESP_OK, if data was written successfully;
+*       - ESP_ERR_INVALID_ARG, if dst_offset exceeds partition size;
+*       - ESP_ERR_INVALID_SIZE, if write would go out of bounds of the partition;
+*       - or one of error codes from lower-level flash driver.
+*/
+esp_err_t wl_write(wl_handle_t handle, size_t dest_addr, const void *src, size_t size);
+
+/**
+* @brief Read data from the WL storage
+*
+* @param handle WL module instance that was initialized before
+* @param dest Pointer to the buffer where data should be stored.
+*            Pointer must be non-NULL and buffer must be at least 'size' bytes long.
+* @param src_addr Address of the data to be read, relative to the
+*                   beginning of the partition.
+* @param size Size of data to be read, in bytes.
+*
+* @return
+*       - ESP_OK, if data was read successfully;
+*       - ESP_ERR_INVALID_ARG, if src_offset exceeds partition size;
+*       - ESP_ERR_INVALID_SIZE, if read would go out of bounds of the partition;
+*       - or one of error codes from lower-level flash driver.
+*/
+esp_err_t wl_read(wl_handle_t handle, size_t src_addr, void *dest, size_t size);
+
+/**
+* @brief Get size of the WL storage
+*
+* @param handle WL module handle that was initialized before
+* @return usable size, in bytes
+*/
+size_t wl_size(wl_handle_t handle);
+
+/**
+* @brief Get sector size of the WL instance
+*
+* @param handle WL module handle that was initialized before
+* @return sector size, in bytes
+*/
+size_t wl_sector_size(wl_handle_t handle);
+
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif // _wear_levelling_H_
diff --git a/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/manager.h b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/manager.h
new file mode 100644
index 00000000000..0d51bd27394
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/manager.h
@@ -0,0 +1,581 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <protocomm.h>
+
+#include "esp_event.h"
+#include "wifi_provisioning/wifi_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ESP_EVENT_DECLARE_BASE(WIFI_PROV_EVENT);
+
+/**
+ * @brief   Events generated by manager
+ *
+ * These events are generated in order of declaration and, for the
+ * stretch of time between initialization and de-initialization of
+ * the manager, each event is signaled only once
+ */
+typedef enum {
+    /**
+     * Emitted when the manager is initialized
+     */
+    WIFI_PROV_INIT,
+
+    /**
+     * Indicates that provisioning has started
+     */
+    WIFI_PROV_START,
+
+    /**
+     * Emitted when Wi-Fi AP credentials are received via `protocomm`
+     * endpoint `wifi_config`. The event data in this case is a pointer
+     * to the corresponding `wifi_sta_config_t` structure
+     */
+    WIFI_PROV_CRED_RECV,
+
+    /**
+     * Emitted when device fails to connect to the AP of which the
+     * credentials were received earlier on event `WIFI_PROV_CRED_RECV`.
+     * The event data in this case is a pointer to the disconnection
+     * reason code with type `wifi_prov_sta_fail_reason_t`
+     */
+    WIFI_PROV_CRED_FAIL,
+
+    /**
+     * Emitted when device successfully connects to the AP of which the
+     * credentials were received earlier on event `WIFI_PROV_CRED_RECV`
+     */
+    WIFI_PROV_CRED_SUCCESS,
+
+    /**
+     * Signals that provisioning service has stopped
+     */
+    WIFI_PROV_END,
+
+    /**
+     * Signals that manager has been de-initialized
+     */
+    WIFI_PROV_DEINIT,
+} wifi_prov_cb_event_t;
+
+typedef void (*wifi_prov_cb_func_t)(void *user_data, wifi_prov_cb_event_t event, void *event_data);
+
+/**
+ * @brief   Event handler that is used by the manager while
+ *          provisioning service is active
+ */
+typedef struct {
+    /**
+     * Callback function to be executed on provisioning events
+     */
+    wifi_prov_cb_func_t event_cb;
+
+    /**
+     * User context data to pass as parameter to callback function
+     */
+    void *user_data;
+} wifi_prov_event_handler_t;
+
+/**
+ * @brief Event handler can be set to none if not used
+ */
+#define WIFI_PROV_EVENT_HANDLER_NONE { \
+    .event_cb  = NULL,                 \
+    .user_data = NULL                  \
+}
+
+/**
+ * @brief   Structure for specifying the provisioning scheme to be
+ *          followed by the manager
+ *
+ * @note    Ready to use schemes are available:
+ *              - wifi_prov_scheme_ble     : for provisioning over BLE transport + GATT server
+ *              - wifi_prov_scheme_softap  : for provisioning over SoftAP transport + HTTP server
+ *              - wifi_prov_scheme_console : for provisioning over Serial UART transport + Console (for debugging)
+ */
+typedef struct wifi_prov_scheme {
+    /**
+     * Function which is to be called by the manager when it is to
+     * start the provisioning service associated with a protocomm instance
+     * and a scheme specific configuration
+     */
+    esp_err_t (*prov_start) (protocomm_t *pc, void *config);
+
+    /**
+     * Function which is to be called by the manager to stop the
+     * provisioning service previously associated with a protocomm instance
+     */
+    esp_err_t (*prov_stop) (protocomm_t *pc);
+
+    /**
+     * Function which is to be called by the manager to generate
+     * a new configuration for the provisioning service, that is
+     * to be passed to prov_start()
+     */
+    void *(*new_config) (void);
+
+    /**
+     * Function which is to be called by the manager to delete a
+     * configuration generated using new_config()
+     */
+    void (*delete_config) (void *config);
+
+    /**
+     * Function which is to be called by the manager to set the
+     * service name and key values in the configuration structure
+     */
+    esp_err_t (*set_config_service) (void *config, const char *service_name, const char *service_key);
+
+    /**
+     * Function which is to be called by the manager to set a protocomm endpoint
+     * with an identifying name and UUID in the configuration structure
+     */
+    esp_err_t (*set_config_endpoint) (void *config, const char *endpoint_name, uint16_t uuid);
+
+    /**
+     * Sets mode of operation of Wi-Fi during provisioning
+     * This is set to :
+     * - WIFI_MODE_APSTA for SoftAP transport
+     * - WIFI_MODE_STA for BLE transport
+     */
+    wifi_mode_t wifi_mode;
+} wifi_prov_scheme_t;
+
+/**
+ * @brief   Structure for specifying the manager configuration
+ */
+typedef struct {
+    /**
+     * Provisioning scheme to use. Following schemes are already available:
+     *     - wifi_prov_scheme_ble     : for provisioning over BLE transport + GATT server
+     *     - wifi_prov_scheme_softap  : for provisioning over SoftAP transport + HTTP server + mDNS (optional)
+     *     - wifi_prov_scheme_console : for provisioning over Serial UART transport + Console (for debugging)
+     */
+    wifi_prov_scheme_t scheme;
+
+    /**
+     * Event handler required by the scheme for incorporating scheme specific
+     * behavior while provisioning manager is running. Various options may be
+     * provided by the scheme for setting this field. Use WIFI_PROV_EVENT_HANDLER_NONE
+     * when not used. When using scheme wifi_prov_scheme_ble, the following
+     * options are available:
+     *     - WIFI_PROV_SCHEME_BLE_EVENT_HANDLER_FREE_BTDM
+     *     - WIFI_PROV_SCHEME_BLE_EVENT_HANDLER_FREE_BLE
+     *     - WIFI_PROV_SCHEME_BLE_EVENT_HANDLER_FREE_BT
+     */
+    wifi_prov_event_handler_t scheme_event_handler;
+
+    /**
+     * Event handler that can be set for the purpose of incorporating application
+     * specific behavior. Use WIFI_PROV_EVENT_HANDLER_NONE when not used.
+     */
+    wifi_prov_event_handler_t app_event_handler;
+} wifi_prov_mgr_config_t;
+
+/**
+ * @brief   Security modes supported by the Provisioning Manager.
+ *
+ * These are same as the security modes provided by protocomm
+ */
+typedef enum wifi_prov_security {
+    /**
+     * No security (plain-text communication)
+     */
+    WIFI_PROV_SECURITY_0 = 0,
+
+    /**
+     * This secure communication mode consists of
+     *   X25519 key exchange
+     * + proof of possession (pop) based authentication
+     * + AES-CTR encryption
+     */
+    WIFI_PROV_SECURITY_1
+} wifi_prov_security_t;
+
+/**
+ * @brief   Initialize provisioning manager instance
+ *
+ * Configures the manager and allocates internal resources
+ *
+ * Configuration specifies the provisioning scheme (transport)
+ * and event handlers
+ *
+ * Event WIFI_PROV_INIT is emitted right after initialization
+ * is complete
+ *
+ * @param[in] config Configuration structure
+ *
+ * @return
+ *  - ESP_OK      : Success
+ *  - ESP_FAIL    : Fail
+ */
+esp_err_t wifi_prov_mgr_init(wifi_prov_mgr_config_t config);
+
+/**
+ * @brief   Stop provisioning (if running) and release
+ *          resource used by the manager
+ *
+ * Event WIFI_PROV_DEINIT is emitted right after de-initialization
+ * is finished
+ *
+ * If provisioning service is  still active when this API is called,
+ * it first stops the service, hence emitting WIFI_PROV_END, and
+ * then performs the de-initialization
+ */
+void wifi_prov_mgr_deinit(void);
+
+/**
+ * @brief   Checks if device is provisioned
+ *
+ * This checks if Wi-Fi credentials are present on the NVS
+ *
+ * The Wi-Fi credentials are assumed to be kept in the same
+ * NVS namespace as used by esp_wifi component
+ *
+ * If one were to call esp_wifi_set_config() directly instead
+ * of going through the provisioning process, this function will
+ * still yield true (i.e. device will be found to be provisioned)
+ *
+ * @note    Calling wifi_prov_mgr_start_provisioning() automatically
+ *          resets the provision state, irrespective of what the
+ *          state was prior to making the call.
+ *
+ * @param[out] provisioned  True if provisioned, else false
+ *
+ * @return
+ *  - ESP_OK      : Retrieved provision state successfully
+ *  - ESP_FAIL    : Wi-Fi not initialized
+ *  - ESP_ERR_INVALID_ARG   : Null argument supplied
+ *  - ESP_ERR_INVALID_STATE : Manager not initialized
+ */
+esp_err_t wifi_prov_mgr_is_provisioned(bool *provisioned);
+
+/**
+ * @brief   Start provisioning service
+ *
+ * This starts the provisioning service according to the scheme
+ * configured at the time of initialization. For scheme :
+ * - wifi_prov_scheme_ble : This starts protocomm_ble, which internally initializes
+ *                          BLE transport and starts GATT server for handling
+ *                          provisioning requests
+ * - wifi_prov_scheme_softap : This activates SoftAP mode of Wi-Fi and starts
+ *                          protocomm_httpd, which internally starts an HTTP
+ *                          server for handling provisioning requests (If mDNS is
+ *                          active it also starts advertising service with type
+ *                          _esp_wifi_prov._tcp)
+ *
+ * Event WIFI_PROV_START is emitted right after provisioning starts without failure
+ *
+ * @note   This API will start provisioning service even if device is found to be
+ *         already provisioned, i.e. wifi_prov_mgr_is_provisioned() yields true
+ *
+ * @param[in] security      Specify which protocomm security scheme to use :
+ *                              - WIFI_PROV_SECURITY_0 : For no security
+ *                              - WIFI_PROV_SECURITY_1 : x25519 secure handshake for session
+ *                                establishment followed by AES-CTR encryption of provisioning messages
+ * @param[in] pop           Pointer to proof of possession string (NULL if not needed). This
+ *                          is relevant only for protocomm security 1, in which case it is used
+ *                          for authenticating secure session
+ * @param[in] service_name  Unique name of the service. This translates to:
+ *                              - Wi-Fi SSID when provisioning mode is softAP
+ *                              - Device name when provisioning mode is BLE
+ * @param[in] service_key   Key required by client to access the service (NULL if not needed).
+ *                          This translates to:
+ *                              - Wi-Fi password when provisioning mode is softAP
+ *                              - ignored when provisioning mode is BLE
+ *
+ * @return
+ *  - ESP_OK      : Provisioning started successfully
+ *  - ESP_FAIL    : Failed to start provisioning service
+ *  - ESP_ERR_INVALID_STATE : Provisioning manager not initialized or already started
+ */
+esp_err_t wifi_prov_mgr_start_provisioning(wifi_prov_security_t security, const char *pop,
+                                           const char *service_name, const char *service_key);
+
+/**
+ * @brief   Stop provisioning service
+ *
+ * If provisioning service is active, this API will initiate a process to stop
+ * the service and return. Once the service actually stops, the event WIFI_PROV_END
+ * will be emitted.
+ *
+ * If wifi_prov_mgr_deinit() is called without calling this API first, it will
+ * automatically stop the provisioning service and emit the WIFI_PROV_END, followed
+ * by WIFI_PROV_DEINIT, before returning.
+ *
+ * This API will generally be used along with wifi_prov_mgr_disable_auto_stop()
+ * in the scenario when the main application has registered its own endpoints,
+ * and wishes that the provisioning service is stopped only when some protocomm
+ * command from the client side application is received.
+ *
+ * Calling this API inside an endpoint handler, with sufficient cleanup_delay,
+ * will allow the response / acknowledgment to be sent successfully before the
+ * underlying protocomm service is stopped.
+ *
+ * Cleaup_delay is set when calling wifi_prov_mgr_disable_auto_stop().
+ * If not specified, it defaults to 1000ms.
+ *
+ * For straightforward cases, using this API is usually not necessary as
+ * provisioning is stopped automatically once WIFI_PROV_CRED_SUCCESS is emitted.
+ * Stopping is delayed (maximum 30 seconds) thus allowing the client side
+ * application to query for Wi-Fi state, i.e. after receiving the first query
+ * and sending `Wi-Fi state connected` response the service is stopped immediately.
+ */
+void wifi_prov_mgr_stop_provisioning(void);
+
+/**
+ * @brief   Wait for provisioning service to finish
+ *
+ * Calling this API will block until provisioning service is stopped
+ * i.e. till event WIFI_PROV_END is emitted.
+ *
+ * This will not block if provisioning is not started or not initialized.
+ */
+void wifi_prov_mgr_wait(void);
+
+/**
+ * @brief   Disable auto stopping of provisioning service upon completion
+ *
+ * By default, once provisioning is complete, the provisioning service is automatically
+ * stopped, and all endpoints (along with those registered by main application) are
+ * deactivated.
+ *
+ * This API is useful in the case when main application wishes to close provisioning service
+ * only after it receives some protocomm command from the client side app. For example, after
+ * connecting to Wi-Fi, the device may want to connect to the cloud, and only once that is
+ * successfully, the device is said to be fully configured. But, then it is upto the main
+ * application to explicitly call wifi_prov_mgr_stop_provisioning() later when the device is
+ * fully configured and the provisioning service is no longer required.
+ *
+ * @note    This must be called before executing wifi_prov_mgr_start_provisioning()
+ *
+ * @param[in] cleanup_delay Sets the delay after which the actual cleanup of transport related
+ *                          resources is done after a call to wifi_prov_mgr_stop_provisioning()
+ *                          returns. Minimum allowed value is 100ms. If not specified, this will
+ *                          default to 1000ms.
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_ERR_INVALID_STATE : Manager not initialized or
+ *                            provisioning service already started
+ */
+esp_err_t wifi_prov_mgr_disable_auto_stop(uint32_t cleanup_delay);
+
+/**
+ * @brief   Set application version and capabilities in the JSON data returned by
+ *          proto-ver endpoint
+ *
+ * This function can be called multiple times, to specify information about the various
+ * application specific services running on the device, identified by unique labels.
+ *
+ * The provisioning service itself registers an entry in the JSON data, by the label "prov",
+ * containing only provisioning service version and capabilities. Application services should
+ * use a label other than "prov" so as not to overwrite this.
+ *
+ * @note    This must be called before executing wifi_prov_mgr_start_provisioning()
+ *
+ * @param[in] label   String indicating the application name.
+ *
+ * @param[in] version String indicating the application version.
+ *                    There is no constraint on format.
+ *
+ * @param[in] capabilities  Array of strings with capabilities.
+ *                          These could be used by the client side app to know
+ *                          the application registered endpoint capabilities
+ *
+ * @param[in] total_capabilities  Size of capabilities array
+ *
+ * @return
+ *  - ESP_OK : Success
+ *  - ESP_ERR_INVALID_STATE : Manager not initialized or
+ *                            provisioning service already started
+ *  - ESP_ERR_NO_MEM : Failed to allocate memory for version string
+ *  - ESP_ERR_INVALID_ARG : Null argument
+ */
+esp_err_t wifi_prov_mgr_set_app_info(const char *label, const char *version,
+                                     const char**capabilities, size_t total_capabilities);
+
+/**
+ * @brief   Create an additional endpoint and allocate internal resources for it
+ *
+ * This API is to be called by the application if it wants to create an additional
+ * endpoint. All additional endpoints will be assigned UUIDs starting from 0xFF54
+ * and so on in the order of execution.
+ *
+ * protocomm handler for the created endpoint is to be registered later using
+ * wifi_prov_mgr_endpoint_register() after provisioning has started.
+ *
+ * @note    This API can only be called BEFORE provisioning is started
+ *
+ * @note    Additional endpoints can be used for configuring client provided
+ *          parameters other than Wi-Fi credentials, that are necessary for the
+ *          main application and hence must be set prior to starting the application
+ *
+ * @note    After session establishment, the additional endpoints must be targeted
+ *          first by the client side application before sending Wi-Fi configuration,
+ *          because once Wi-Fi configuration finishes the provisioning service is
+ *          stopped and hence all endpoints are unregistered
+ *
+ * @param[in] ep_name  unique name of the endpoint
+ *
+ * @return
+ *  - ESP_OK      : Success
+ *  - ESP_FAIL    : Failure
+ */
+esp_err_t wifi_prov_mgr_endpoint_create(const char *ep_name);
+
+/**
+ * @brief   Register a handler for the previously created endpoint
+ *
+ * This API can be called by the application to register a protocomm handler
+ * to any endpoint that was created using wifi_prov_mgr_endpoint_create().
+ *
+ * @note    This API can only be called AFTER provisioning has started
+ *
+ * @note    Additional endpoints can be used for configuring client provided
+ *          parameters other than Wi-Fi credentials, that are necessary for the
+ *          main application and hence must be set prior to starting the application
+ *
+ * @note    After session establishment, the additional endpoints must be targeted
+ *          first by the client side application before sending Wi-Fi configuration,
+ *          because once Wi-Fi configuration finishes the provisioning service is
+ *          stopped and hence all endpoints are unregistered
+ *
+ * @param[in] ep_name   Name of the endpoint
+ * @param[in] handler   Endpoint handler function
+ * @param[in] user_ctx  User data
+ *
+ * @return
+ *  - ESP_OK      : Success
+ *  - ESP_FAIL    : Failure
+ */
+esp_err_t wifi_prov_mgr_endpoint_register(const char *ep_name,
+                                          protocomm_req_handler_t handler,
+                                          void *user_ctx);
+
+/**
+ * @brief   Unregister the handler for an endpoint
+ *
+ * This API can be called if the application wants to selectively
+ * unregister the handler of an endpoint while the provisioning
+ * is still in progress.
+ *
+ * All the endpoint handlers are unregistered automatically when
+ * the provisioning stops.
+ *
+ * @param[in] ep_name  Name of the endpoint
+ */
+void wifi_prov_mgr_endpoint_unregister(const char *ep_name);
+
+/**
+ * @brief   Event handler for provisioning manager
+ *
+ * This is called from the main event handler and controls the
+ * provisioning manager's internal state machine depending on
+ * incoming Wi-Fi events
+ *
+ * @note : This function is DEPRECATED, because events are now
+ * handled internally using the event loop library, esp_event.
+ * Calling this will do nothing and simply return ESP_OK.
+ *
+ * @param[in] ctx   Event context data
+ * @param[in] event Event info
+ *
+ * @return
+ *  - ESP_OK : Event handled successfully
+ */
+esp_err_t wifi_prov_mgr_event_handler(void *ctx, system_event_t *event) __attribute__ ((deprecated));
+
+/**
+ * @brief   Get state of Wi-Fi Station during provisioning
+ *
+ * @param[out] state    Pointer to wifi_prov_sta_state_t
+ *                      variable to be filled
+ *
+ * @return
+ *  - ESP_OK    : Successfully retrieved Wi-Fi state
+ *  - ESP_FAIL  : Provisioning app not running
+ */
+esp_err_t wifi_prov_mgr_get_wifi_state(wifi_prov_sta_state_t *state);
+
+/**
+ * @brief   Get reason code in case of Wi-Fi station
+ *          disconnection during provisioning
+ *
+* @param[out] reason    Pointer to wifi_prov_sta_fail_reason_t
+*                       variable to be filled
+ *
+ * @return
+ *  - ESP_OK    : Successfully retrieved Wi-Fi disconnect reason
+ *  - ESP_FAIL  : Provisioning app not running
+ */
+esp_err_t wifi_prov_mgr_get_wifi_disconnect_reason(wifi_prov_sta_fail_reason_t *reason);
+
+/**
+ * @brief   Runs Wi-Fi as Station with the supplied configuration
+ *
+ * Configures the Wi-Fi station mode to connect to the AP with
+ * SSID and password specified in config structure and sets
+ * Wi-Fi to run as station.
+ *
+ * This is automatically called by provisioning service upon
+ * receiving new credentials.
+ *
+ * If credentials are to be supplied to the manager via a
+ * different mode other than through protocomm, then this
+ * API needs to be called.
+ *
+ * Event WIFI_PROV_CRED_RECV is emitted after credentials have
+ * been applied and Wi-Fi station started
+ *
+ * @param[in] wifi_cfg  Pointer to Wi-Fi configuration structure
+ *
+ * @return
+ *  - ESP_OK      : Wi-Fi configured and started successfully
+ *  - ESP_FAIL    : Failed to set configuration
+ */
+esp_err_t wifi_prov_mgr_configure_sta(wifi_config_t *wifi_cfg);
+
+/**
+ * @brief   Reset Wi-Fi provisioning config
+ *
+ * Calling this API will restore WiFi stack persistent settings to default values.
+ *
+ * @return
+ *  - ESP_OK      : Reset provisioning config successfully
+ *  - ESP_FAIL    : Failed to reset provisioning config
+ */
+esp_err_t wifi_prov_mgr_reset_provisioning(void);
+
+/**
+ * @brief   Reset internal state machine and clear provisioned credentials.
+ *
+ * This API can be used to restart provisioning in case invalid credentials are entered.
+ *
+ * @return
+ *  - ESP_OK      : Reset provisioning state machine successfully
+ *  - ESP_FAIL    : Failed to reset provisioning state machine
+ *  - ESP_ERR_INVALID_STATE : Manager not initialized
+ */
+esp_err_t wifi_prov_mgr_reset_sm_state_on_failure(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h
new file mode 100644
index 00000000000..fc19e16b171
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h
@@ -0,0 +1,105 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <protocomm.h>
+#include <protocomm_ble.h>
+
+#include "wifi_provisioning/manager.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   Scheme that can be used by manager for provisioning
+ *          over BLE transport with GATT server
+ */
+extern const wifi_prov_scheme_t wifi_prov_scheme_ble;
+
+/* This scheme specific event handler is to be used when application
+ * doesn't require BT and BLE after provisioning has finished */
+#define WIFI_PROV_SCHEME_BLE_EVENT_HANDLER_FREE_BTDM {    \
+    .event_cb  = wifi_prov_scheme_ble_event_cb_free_btdm, \
+    .user_data = NULL                                     \
+}
+
+/* This scheme specific event handler is to be used when application
+ * doesn't require BLE to be active after provisioning has finished */
+#define WIFI_PROV_SCHEME_BLE_EVENT_HANDLER_FREE_BLE {    \
+    .event_cb  = wifi_prov_scheme_ble_event_cb_free_ble, \
+    .user_data = NULL                                    \
+}
+
+/* This scheme specific event handler is to be used when application
+ * doesn't require BT to be active after provisioning has finished */
+#define WIFI_PROV_SCHEME_BLE_EVENT_HANDLER_FREE_BT {    \
+    .event_cb  = wifi_prov_scheme_ble_event_cb_free_bt, \
+    .user_data = NULL                                   \
+}
+
+void wifi_prov_scheme_ble_event_cb_free_btdm(void *user_data, wifi_prov_cb_event_t event, void *event_data);
+void wifi_prov_scheme_ble_event_cb_free_ble (void *user_data, wifi_prov_cb_event_t event, void *event_data);
+void wifi_prov_scheme_ble_event_cb_free_bt  (void *user_data, wifi_prov_cb_event_t event, void *event_data);
+
+/**
+ * @brief   Set the 128 bit GATT service UUID used for provisioning
+ *
+ * This API is used to override the default 128 bit provisioning
+ * service UUID, which is 0000ffff-0000-1000-8000-00805f9b34fb.
+ *
+ * This must be called before starting provisioning, i.e. before
+ * making a call to wifi_prov_mgr_start_provisioning(), otherwise
+ * the default UUID will be used.
+ *
+ * @note    The data being pointed to by the argument must be valid
+ *          atleast till provisioning is started. Upon start, the
+ *          manager will store an internal copy of this UUID, and
+ *          this data can be freed or invalidated afterwords.
+ *
+ * @param[in] uuid128  A custom 128 bit UUID
+ *
+ * @return
+ *  - ESP_OK              : Success
+ *  - ESP_ERR_INVALID_ARG : Null argument
+ */
+esp_err_t wifi_prov_scheme_ble_set_service_uuid(uint8_t *uuid128);
+
+/**
+ * @brief   Set manufacturer specific data in scan response
+ *
+ * This must be called before starting provisioning, i.e. before
+ * making a call to wifi_prov_mgr_start_provisioning().
+ *
+ * @note    It is important to understand that length of custom manufacturer
+ *          data should be within limits. The manufacturer data goes into scan
+ *          response along with BLE device name. By default, BLE device name
+ *          length is of 11 Bytes, however it can vary as per application use
+ *          case. So, one has to honour the scan response data size limits i.e.
+ *          (mfg_data_len + 2) < 31 - (device_name_length + 2 ). If the
+ *          mfg_data length exceeds this limit, the length will be truncated.
+ *
+ * @param[in] mfg_data      Custom manufacturer data
+ * @param[in] mfg_data_len  Manufacturer data length
+ *
+ * @return
+ *  - ESP_OK              : Success
+ *  - ESP_ERR_INVALID_ARG : Null argument
+ */
+esp_err_t wifi_prov_scheme_ble_set_mfg_data(uint8_t *mfg_data, ssize_t mfg_data_len);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/scheme_console.h b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/scheme_console.h
new file mode 100644
index 00000000000..760fe3243a5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/scheme_console.h
@@ -0,0 +1,34 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <protocomm.h>
+#include <protocomm_console.h>
+
+#include "wifi_provisioning/manager.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   Scheme that can be used by manager for provisioning
+ *          over console (Serial UART)
+ */
+extern const wifi_prov_scheme_t wifi_prov_scheme_console;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/scheme_softap.h b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/scheme_softap.h
new file mode 100644
index 00000000000..eda48be0f7e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/scheme_softap.h
@@ -0,0 +1,47 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <protocomm.h>
+#include <protocomm_httpd.h>
+
+#include "wifi_provisioning/manager.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   Scheme that can be used by manager for provisioning
+ *          over SoftAP transport with HTTP server
+ */
+extern const wifi_prov_scheme_t wifi_prov_scheme_softap;
+
+/**
+ *
+ * @brief Provide HTTPD Server handle externally.
+ *
+ * Useful in cases wherein applications need the webserver for some
+ * different operations, and do not want the wifi provisioning component
+ * to start/stop a new instance.
+ *
+ * @note This API should be called before wifi_prov_mgr_start_provisioning()
+ *
+ * @param[in] handle Handle to HTTPD server instance
+ */
+void wifi_prov_scheme_softap_set_httpd_handle(void *handle);
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h
new file mode 100644
index 00000000000..d477580fa99
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/wifi_config.h
@@ -0,0 +1,144 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _WIFI_PROV_CONFIG_H_
+#define _WIFI_PROV_CONFIG_H_
+
+#include <lwip/ip4_addr.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   WiFi STA status for conveying back to the provisioning master
+ */
+typedef enum {
+    WIFI_PROV_STA_CONNECTING,
+    WIFI_PROV_STA_CONNECTED,
+    WIFI_PROV_STA_DISCONNECTED
+} wifi_prov_sta_state_t;
+
+/**
+ * @brief   WiFi STA connection fail reason
+ */
+typedef enum {
+    WIFI_PROV_STA_AUTH_ERROR,
+    WIFI_PROV_STA_AP_NOT_FOUND
+} wifi_prov_sta_fail_reason_t;
+
+/**
+ * @brief   WiFi STA connected status information
+ */
+typedef struct {
+    /**
+     * IP Address received by station
+     */
+    char    ip_addr[IP4ADDR_STRLEN_MAX];
+
+    char    bssid[6];   /*!< BSSID of the AP to which connection was estalished */
+    char    ssid[33];   /*!< SSID of the to which connection was estalished */
+    uint8_t channel;    /*!< Channel of the AP */
+    uint8_t auth_mode;  /*!< Authorization mode of the AP */
+} wifi_prov_sta_conn_info_t;
+
+/**
+ * @brief   WiFi status data to be sent in response to `get_status` request from master
+ */
+typedef struct {
+    wifi_prov_sta_state_t wifi_state;    /*!< WiFi state of the station */
+    union {
+        /**
+         * Reason for disconnection (valid only when `wifi_state` is `WIFI_STATION_DISCONNECTED`)
+         */
+        wifi_prov_sta_fail_reason_t fail_reason;
+
+        /**
+         * Connection information (valid only when `wifi_state` is `WIFI_STATION_CONNECTED`)
+         */
+        wifi_prov_sta_conn_info_t   conn_info;
+    };
+} wifi_prov_config_get_data_t;
+
+/**
+ * @brief   WiFi config data received by slave during `set_config` request from master
+ */
+typedef struct {
+    char    ssid[33];       /*!< SSID of the AP to which the slave is to be connected */
+    char    password[64];   /*!< Password of the AP */
+    char    bssid[6];       /*!< BSSID of the AP */
+    uint8_t channel;        /*!< Channel of the AP */
+} wifi_prov_config_set_data_t;
+
+/**
+ * @brief   Type of context data passed to each get/set/apply handler
+ *           function set in `wifi_prov_config_handlers` structure.
+ *
+ * This is passed as an opaque pointer, thereby allowing it be defined
+ * later in application code as per requirements.
+ */
+typedef struct wifi_prov_ctx wifi_prov_ctx_t;
+
+/**
+ * @brief   Internal handlers for receiving and responding to protocomm
+ *          requests from master
+ *
+ * This is to be passed as priv_data for protocomm request handler
+ * (refer to `wifi_prov_config_data_handler()`) when calling `protocomm_add_endpoint()`.
+ */
+typedef struct wifi_prov_config_handlers {
+    /**
+     * Handler function called when connection status
+     * of the slave (in WiFi station mode) is requested
+     */
+    esp_err_t (*get_status_handler)(wifi_prov_config_get_data_t *resp_data,
+                                    wifi_prov_ctx_t **ctx);
+
+    /**
+     * Handler function called when WiFi connection configuration
+     * (eg. AP SSID, password, etc.) of the slave (in WiFi station mode)
+     * is to be set to user provided values
+     */
+    esp_err_t (*set_config_handler)(const wifi_prov_config_set_data_t *req_data,
+                                    wifi_prov_ctx_t **ctx);
+
+    /**
+     * Handler function for applying the configuration that was set in
+     * `set_config_handler`. After applying the station may get connected to
+     * the AP or may fail to connect. The slave must be ready to convey the
+     * updated connection status information when `get_status_handler` is
+     * invoked again by the master.
+     */
+    esp_err_t (*apply_config_handler)(wifi_prov_ctx_t **ctx);
+
+    /**
+     * Context pointer to be passed to above handler functions upon invocation
+     */
+    wifi_prov_ctx_t *ctx;
+} wifi_prov_config_handlers_t;
+
+/**
+ * @brief   Handler for receiving and responding to requests from master
+ *
+ * This is to be registered as the `wifi_config` endpoint handler
+ * (protocomm `protocomm_req_handler_t`) using `protocomm_add_endpoint()`
+ */
+esp_err_t wifi_prov_config_data_handler(uint32_t session_id, const uint8_t *inbuf, ssize_t inlen,
+                                        uint8_t **outbuf, ssize_t *outlen, void *priv_data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/wifi_scan.h b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/wifi_scan.h
new file mode 100644
index 00000000000..a4ebb7e5700
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wifi_provisioning/include/wifi_provisioning/wifi_scan.h
@@ -0,0 +1,166 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _PROV_WIFI_SCAN_H_
+#define _PROV_WIFI_SCAN_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <esp_wifi.h>
+
+#define WIFI_SSID_LEN  sizeof(((wifi_ap_record_t *)0)->ssid)
+#define WIFI_BSSID_LEN sizeof(((wifi_ap_record_t *)0)->bssid)
+
+/**
+ * @brief   Type of context data passed to each get/set/apply handler
+ *           function set in `wifi_prov_scan_handlers` structure.
+ *
+ * This is passed as an opaque pointer, thereby allowing it be defined
+ * later in application code as per requirements.
+ */
+typedef struct wifi_prov_scan_ctx wifi_prov_scan_ctx_t;
+
+/**
+ * @brief   Structure of entries in the scan results list
+ */
+typedef struct {
+    /**
+     * SSID of Wi-Fi AP
+     */
+    char ssid[WIFI_SSID_LEN];
+
+    /**
+     * BSSID of Wi-Fi AP
+     */
+    char bssid[WIFI_BSSID_LEN];
+
+    /**
+     * Wi-Fi channel number
+     */
+    uint8_t channel;
+
+    /**
+     * Signal strength
+     */
+    int rssi;
+
+    /**
+     * Wi-Fi security mode
+     */
+    uint8_t auth;
+} wifi_prov_scan_result_t;
+
+/**
+ * @brief   Internal handlers for receiving and responding to protocomm
+ *          requests from client
+ *
+ * This is to be passed as priv_data for protocomm request handler
+ * (refer to `wifi_prov_scan_handler()`) when calling `protocomm_add_endpoint()`.
+ */
+typedef struct wifi_prov_scan_handlers {
+    /**
+     * Handler function called when scan start command is received
+     * with various scan parameters :
+     *
+     * blocking (input) - If true, the function should return only
+     * when the scanning is finished
+     *
+     * passive (input) - If true, scan is to be started in passive
+     * mode (this may be slower) instead of active mode
+     *
+     * group_channels (input) - This specifies whether to scan
+     * all channels in one go (when zero) or perform scanning of
+     * channels in groups, with 120ms delay between scanning of
+     * consecutive groups, and the value of this parameter sets the
+     * number of channels in each group. This is useful when transport
+     * mode is SoftAP, where scanning all channels in one go may not
+     * give the Wi-Fi driver enough time to send out beacons, and
+     * hence may cause disconnection with any connected stations.
+     * When scanning in groups, the manager will wait for atleast
+     * 120ms after completing scan on a group of channels, and thus
+     * allow the driver to send out the beacons. For example, given
+     * that the total number of Wi-Fi channels is 14, then setting
+     * group_channels to 4, will create 5 groups, with each group
+     * having 3 channels, except the last one which will have
+     * 14 % 3 = 2 channels. So, when scan is started, the first 3
+     * channels will be scanned, followed by a 120ms delay, and then
+     * the next 3 channels, and so on, until all the 14 channels have
+     * been scanned. One may need to adjust this parameter as having
+     * only few channels in a group may slow down the overall scan
+     * time, while having too many may again cause disconnection.
+     * Usually a value of 4 should work for most cases. Note that
+     * for any other mode of transport, e.g. BLE, this can be safely
+     * set to 0, and hence achieve the fastest overall scanning time.
+     *
+     * period_ms (input) - Scan parameter specifying how long to
+     * wait on each channel (in milli-seconds)
+     */
+    esp_err_t (*scan_start)(bool blocking, bool passive,
+                            uint8_t group_channels, uint32_t period_ms,
+                            wifi_prov_scan_ctx_t **ctx);
+
+    /**
+     * Handler function called when scan status is requested. Status
+     * is given the parameters :
+     *
+     * scan_finished (output) - When scan has finished this returns true
+     *
+     * result_count (output) - This gives the total number of results
+     * obtained till now. If scan is yet happening this number will
+     * keep on updating
+     */
+    esp_err_t (*scan_status)(bool *scan_finished,
+                             uint16_t *result_count,
+                             wifi_prov_scan_ctx_t **ctx);
+
+    /**
+     * Handler function called when scan result is requested. Parameters :
+     *
+     * scan_result - For fetching scan results. This can be called even
+     * if scan is still on going
+     *
+     * start_index (input) - Starting index from where to fetch the
+     * entries from the results list
+     *
+     * count (input) - Number of entries to fetch from the starting index
+     *
+     * entries (output) - List of entries returned. Each entry consists
+     * of ssid, channel and rssi information
+     */
+    esp_err_t (*scan_result)(uint16_t result_index,
+                             wifi_prov_scan_result_t *result,
+                             wifi_prov_scan_ctx_t **ctx);
+
+    /**
+     * Context pointer to be passed to above handler functions upon invocation
+     */
+    wifi_prov_scan_ctx_t *ctx;
+} wifi_prov_scan_handlers_t;
+
+/**
+ * @brief   Handler for sending on demand Wi-Fi scan results
+ *
+ * This is to be registered as the `prov-scan` endpoint handler
+ * (protocomm `protocomm_req_handler_t`) using `protocomm_add_endpoint()`
+ */
+esp_err_t wifi_prov_scan_handler(uint32_t session_id, const uint8_t *inbuf, ssize_t inlen,
+                                 uint8_t **outbuf, ssize_t *outlen, void *priv_data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_dpp.h b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_dpp.h
new file mode 100644
index 00000000000..c6c86bc536f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_dpp.h
@@ -0,0 +1,116 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef ESP_DPP_H
+#define ESP_DPP_H
+
+#include <stdbool.h>
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_ERR_DPP_FAILURE         (ESP_ERR_WIFI_BASE + 151)   /*!< Generic failure during DPP Operation */
+#define ESP_ERR_DPP_TX_FAILURE      (ESP_ERR_WIFI_BASE + 152)   /*!< DPP Frame Tx failed OR not Acked */
+#define ESP_ERR_DPP_INVALID_ATTR    (ESP_ERR_WIFI_BASE + 153)   /*!< Encountered invalid DPP Attribute */
+
+/** @brief Types of Bootstrap Methods for DPP. */
+typedef enum dpp_bootstrap_type {
+    DPP_BOOTSTRAP_QR_CODE,  /**< QR Code Method */
+    DPP_BOOTSTRAP_PKEX,     /**< Proof of Knowledge Method */
+    DPP_BOOTSTRAP_NFC_URI,  /**< NFC URI record Method */
+} esp_supp_dpp_bootstrap_t;
+
+/** @brief Types of Callback Events received from DPP Supplicant. */
+typedef enum {
+    ESP_SUPP_DPP_URI_READY,     /**< URI is ready through Bootstrapping */
+    ESP_SUPP_DPP_CFG_RECVD,     /**< Config received via DPP Authentication */
+    ESP_SUPP_DPP_FAIL,          /**< DPP Authentication failure */
+} esp_supp_dpp_event_t;
+
+/**
+  * @brief Callback function for receiving DPP Events from Supplicant.
+  *
+  *        Callback function will be called with DPP related information.
+  *
+  * @param evt DPP event ID
+  * @param data Event data payload
+  */
+typedef void (*esp_supp_dpp_event_cb_t)(esp_supp_dpp_event_t evt, void *data);
+
+/**
+  * @brief Initialize DPP Supplicant
+  *
+  *        Starts DPP Supplicant and initializes related Data Structures.
+  *
+  * @param evt_cb Callback function to receive DPP related events
+  *
+  * return
+  *    - ESP_OK: Success
+  *    - ESP_FAIL: Failure
+  */
+esp_err_t esp_supp_dpp_init(esp_supp_dpp_event_cb_t evt_cb);
+
+/**
+  * @brief De-initalize DPP Supplicant
+  *
+  *        Frees memory from DPP Supplicant Data Structures.
+  */
+void esp_supp_dpp_deinit(void);
+
+/**
+  * @brief Generates Bootstrap Information as an Enrollee.
+  *
+  *        Generates Out Of Band Bootstrap information as an Enrollee which can be
+  *        used by a DPP Configurator to provision the Enrollee.
+  *
+  * @param chan_list List of channels device will be available on for listening
+  * @param type Bootstrap method type, only QR Code method is supported for now.
+  * @param key (Optional) Private Key used to generate a Bootstrapping Public Key
+  * @param info (Optional) Ancilliary Device Information like Serial Number
+  *
+  * @return
+  *    - ESP_OK: Success
+  *    - ESP_FAIL: Failure
+  */
+esp_err_t
+esp_supp_dpp_bootstrap_gen(const char *chan_list, esp_supp_dpp_bootstrap_t type,
+                           const char *key, const char *info);
+
+/**
+  * @brief Start listening on Channels provided during esp_supp_dpp_bootstrap_gen.
+  *
+  *        Listens on every Channel from Channel List for a pre-defined wait time.
+  *
+  * @return
+  *    - ESP_OK: Success
+  *    - ESP_FAIL: Generic Failure
+  *    - ESP_ERR_INVALID_STATE: ROC attempted before WiFi is started
+  *    - ESP_ERR_NO_MEM: Memory allocation failed while posting ROC request
+  */
+esp_err_t esp_supp_dpp_start_listen(void);
+
+/**
+  * @brief Stop listening on Channels.
+  *
+  *        Stops listening on Channels and cancels ongoing listen operation.
+  */
+void esp_supp_dpp_stop_listen(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* ESP_DPP_H */
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_mbo.h b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_mbo.h
new file mode 100644
index 00000000000..4292213943f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_mbo.h
@@ -0,0 +1,64 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_MBO_H
+#define _ESP_MBO_H
+
+#include <stdbool.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * enum non_pref_chan_reason: Reason for non preference of channel
+  */
+enum non_pref_chan_reason {
+	NON_PREF_CHAN_REASON_UNSPECIFIED = 0,
+	NON_PREF_CHAN_REASON_RSSI = 1,
+	NON_PREF_CHAN_REASON_EXT_INTERFERENCE = 2,
+	NON_PREF_CHAN_REASON_INT_INTERFERENCE = 3,
+};
+
+/**
+  * @brief  Channel structure for non preferred channel
+  *
+  * @param  reason: enum non_pref_chan_reason
+  * @param  oper_class: operating class for the channel
+  * @param  chan: channel number
+  * @param  preference: channel preference
+  */
+struct non_pref_chan {
+	enum non_pref_chan_reason reason;
+	uint8_t oper_class;
+	uint8_t chan;
+	uint8_t preference;
+};
+
+/**
+  * @brief  Array structure for non preferred channel struct
+  *
+  * @param  non_pref_chan_num: channel count
+  * @param  chan: array of non_pref_chan type
+  */
+struct non_pref_chan_s {
+	size_t non_pref_chan_num;
+	struct non_pref_chan chan[];
+};
+
+/**
+  * @brief  Update channel preference for MBO IE
+  *
+  * @param  non_pref_chan: Non preference channel list
+  *
+  * @return
+  *    - 0: success else failure
+  */
+int esp_mbo_update_non_pref_chan(struct non_pref_chan_s *non_pref_chan);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_rrm.h b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_rrm.h
new file mode 100644
index 00000000000..1ffcf180475
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_rrm.h
@@ -0,0 +1,52 @@
+/**
+ * Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ESP_RRM_H
+#define _ESP_RRM_H
+
+#include <stdbool.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief  Callback function type to get neighbor report
+  *
+  * @param  ctx: neighbor report context
+  * @param  report: neighbor report
+  * @param  report_len: neighbor report length
+  *
+  * @return
+  *    - void
+  */
+typedef void (*neighbor_rep_request_cb)(void *ctx, const uint8_t *report, size_t report_len);
+
+/**
+  * @brief  Send Radio measurement neighbor report request to connected AP
+  *
+  * @param  cb: callback function for neighbor report
+  * @param  cb_ctx: callback context
+  *
+  * @return
+  *    - 0: success else failure
+  */
+int esp_rrm_send_neighbor_rep_request(neighbor_rep_request_cb cb,
+				      void *cb_ctx);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wnm.h b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wnm.h
new file mode 100644
index 00000000000..4301385d2cf
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wnm.h
@@ -0,0 +1,48 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_WNM_H
+#define _ESP_WNM_H
+
+#include <stdbool.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * enum btm_query_reason: Reason code for sending btm query
+  */
+enum btm_query_reason {
+	REASON_UNSPECIFIED = 0,
+	REASON_FRAME_LOSS = 1,
+	REASON_DELAY = 2,
+	REASON_BANDWIDTH = 3,
+	REASON_LOAD_BALANCE = 4,
+	REASON_RSSI = 5,
+	REASON_RETRANSMISSIONS = 6,
+	REASON_INTERFERENCE = 7,
+	REASON_GRAY_ZONE = 8,
+	REASON_PREMIUM_AP = 9,
+};
+
+/**
+  * @brief  Send bss transition query to connected AP
+  *
+  * @param  query_reason: reason for sending query
+  * @param  btm_candidates: btm candidates list if available
+  * @param  cand_list: whether candidate list to be included from scan results available in supplicant's cache.
+  *
+  * @return
+  *    - 0: success else failure
+  */
+int esp_wnm_send_bss_transition_mgmt_query(enum btm_query_reason query_reason,
+					   const char *btm_candidates,
+					   int cand_list);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wpa.h b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wpa.h
new file mode 100644
index 00000000000..f448b737c70
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wpa.h
@@ -0,0 +1,79 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_WPA_H__
+#define __ESP_WPA_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_wifi_crypto_types.h"
+#include "esp_wifi_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup WiFi_APIs WiFi Related APIs
+  * @brief WiFi APIs
+  */
+
+/** @addtogroup WiFi_APIs
+  * @{
+  */
+
+/** \defgroup WPA_APIs  WPS APIs
+  * @brief ESP32 Supplicant APIs
+  *
+  */
+
+/** @addtogroup WPA_APIs
+  * @{
+  */
+/* Crypto callback functions */
+const wpa_crypto_funcs_t g_wifi_default_wpa_crypto_funcs;
+/* Mesh crypto callback functions */
+const mesh_crypto_funcs_t g_wifi_default_mesh_crypto_funcs;
+
+/**
+  * @brief     Supplicant initialization
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_NO_MEM : out of memory
+  */
+esp_err_t esp_supplicant_init(void);
+
+/**
+  * @brief     Supplicant deinitialization
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - others: failed
+  */
+esp_err_t esp_supplicant_deinit(void);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_WPA_H__ */
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h
new file mode 100644
index 00000000000..41a6a7d685c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wpa2.h
@@ -0,0 +1,252 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ESP_WPA2_H
+#define _ESP_WPA2_H
+
+#include <stdbool.h>
+
+#include "esp_err.h"
+
+typedef enum {
+    ESP_EAP_TTLS_PHASE2_EAP,
+    ESP_EAP_TTLS_PHASE2_MSCHAPV2,
+    ESP_EAP_TTLS_PHASE2_MSCHAP,
+    ESP_EAP_TTLS_PHASE2_PAP,
+    ESP_EAP_TTLS_PHASE2_CHAP
+} esp_eap_ttls_phase2_types;
+
+typedef struct {
+   int fast_provisioning;
+   int fast_max_pac_list_len;
+   bool fast_pac_format_binary;
+} esp_eap_fast_config;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief  Enable wpa2 enterprise authentication.
+  *
+  * @attention 1. wpa2 enterprise authentication can only be used when ESP32 station is enabled.
+  * @attention 2. wpa2 enterprise authentication can only support TLS, PEAP-MSCHAPv2 and TTLS-MSCHAPv2 method.
+  *
+  * @return
+  *    - ESP_OK: succeed.
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_enable(void);
+
+/**
+  * @brief  Disable wpa2 enterprise authentication.
+  *
+  * @attention 1. wpa2 enterprise authentication can only be used when ESP32 station is enabled.
+  * @attention 2. wpa2 enterprise authentication can only support TLS, PEAP-MSCHAPv2 and TTLS-MSCHAPv2 method.
+  *
+  * @return
+  *    - ESP_OK: succeed.
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_disable(void);
+
+/**
+  * @brief  Set identity for PEAP/TTLS method.
+  *
+  * @attention The API only passes the parameter identity to the global pointer variable in wpa2 enterprise module.
+  *
+  * @param  identity: point to address where stores the identity;
+  * @param  len: length of identity, limited to 1~127
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_ARG: fail(len <= 0 or len >= 128)
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_identity(const unsigned char *identity, int len);
+
+/**
+  * @brief  Clear identity for PEAP/TTLS method.
+  */
+void esp_wifi_sta_wpa2_ent_clear_identity(void);
+
+/**
+  * @brief  Set username for PEAP/TTLS method.
+  *
+  * @attention The API only passes the parameter username to the global pointer variable in wpa2 enterprise module.
+  *
+  * @param  username: point to address where stores the username;
+  * @param  len: length of username, limited to 1~127
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_ARG: fail(len <= 0 or len >= 128)
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_username(const unsigned char *username, int len);
+
+/**
+  * @brief  Clear username for PEAP/TTLS method.
+  */
+void esp_wifi_sta_wpa2_ent_clear_username(void);
+
+/**
+  * @brief  Set password for PEAP/TTLS method..
+  *
+  * @attention The API only passes the parameter password to the global pointer variable in wpa2 enterprise module.
+  *
+  * @param  password: point to address where stores the password;
+  * @param  len: length of password(len > 0)
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_ARG: fail(len <= 0)
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_password(const unsigned char *password, int len);
+
+/**
+  * @brief  Clear password for PEAP/TTLS method..
+  */
+void esp_wifi_sta_wpa2_ent_clear_password(void);
+
+/**
+  * @brief  Set new password for MSCHAPv2 method..
+  *
+  * @attention 1. The API only passes the parameter password to the global pointer variable in wpa2 enterprise module.
+  * @attention 2. The new password is used to substitute the old password when eap-mschapv2 failure request message with error code ERROR_PASSWD_EXPIRED is received.
+  *
+  * @param  new_password: point to address where stores the password;
+  * @param  len: length of password
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_ARG: fail(len <= 0)
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+
+esp_err_t esp_wifi_sta_wpa2_ent_set_new_password(const unsigned char *new_password, int len);
+
+/**
+  * @brief  Clear new password for MSCHAPv2 method..
+  */
+void esp_wifi_sta_wpa2_ent_clear_new_password(void);
+
+/**
+  * @brief  Set CA certificate for PEAP/TTLS method.
+  *
+  * @attention 1. The API only passes the parameter ca_cert to the global pointer variable in wpa2 enterprise module.
+  * @attention 2. The ca_cert should be zero terminated.
+  *
+  * @param  ca_cert: point to address where stores the CA certificate;
+  * @param  ca_cert_len: length of ca_cert
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_ca_cert(const unsigned char *ca_cert, int ca_cert_len);
+
+/**
+  * @brief  Clear CA certificate for PEAP/TTLS method.
+  */
+void esp_wifi_sta_wpa2_ent_clear_ca_cert(void);
+
+/**
+  * @brief  Set client certificate and key.
+  *
+  * @attention 1. The API only passes the parameter client_cert, private_key and private_key_passwd to the global pointer variable in wpa2 enterprise module.
+  * @attention 2. The client_cert, private_key and private_key_passwd should be zero terminated.
+  *
+  * @param  client_cert: point to address where stores the client certificate;
+  * @param  client_cert_len: length of client certificate;
+  * @param  private_key: point to address where stores the private key;
+  * @param  private_key_len: length of private key, limited to 1~2048;
+  * @param  private_key_password: point to address where stores the private key password;
+  * @param  private_key_password_len: length of private key password;
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_cert_key(const unsigned char *client_cert, int client_cert_len, const unsigned char *private_key, int private_key_len, const unsigned char *private_key_passwd, int private_key_passwd_len);
+
+/**
+  * @brief  Clear client certificate and key.
+  */
+void esp_wifi_sta_wpa2_ent_clear_cert_key(void);
+
+/**
+  * @brief  Set wpa2 enterprise certs time check(disable or not).
+  *
+  * @param  true: disable wpa2 enterprise certs time check
+  * @param  false: enable wpa2 enterprise certs time check
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_disable_time_check(bool disable);
+
+/**
+  * @brief  Get wpa2 enterprise certs time check(disable or not).
+  *
+  * @param  disable: store disable value
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_get_disable_time_check(bool *disable);
+
+/**
+  * @brief  Set wpa2 enterprise ttls phase2 method
+  *
+  * @param  type: the type of phase 2 method to be used
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_ttls_phase2_method(esp_eap_ttls_phase2_types type);
+
+/**
+  * @brief  enable/disable 192 bit suite b certification checks
+  *
+  * @param  enable: bool to enable/disable it.
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_wifi_sta_wpa2_set_suiteb_192bit_certification(bool enable);
+
+/**
+  * @brief  Set client pac file
+  *
+  * @attention  1. For files read from the file system, length has to be decremented by 1 byte.
+  * @attention  2. Disabling the WPA_MBEDTLS_CRYPTO config is required to use EAP-FAST.
+  *
+  * @param  pac_file: pointer to the pac file
+  *         pac_file_len: length of the pac file
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_pac_file(const unsigned char *pac_file, int pac_file_len);
+
+/**
+  * @brief  Set Phase 1 parameters for EAP-FAST
+  *
+  * @attention  1. Disabling the WPA_MBEDTLS_CRYPTO config is required to use EAP-FAST.
+  *
+  * @param  config: eap fast phase 1 configuration
+  *
+  * @return
+  *    - ESP_OK: succeed
+  *    - ESP_ERR_INVALID_ARG: fail(out of bound arguments)
+  *    - ESP_ERR_NO_MEM: fail(internal memory malloc fail)
+  */
+esp_err_t esp_wifi_sta_wpa2_ent_set_fast_phase1_params(esp_eap_fast_config config);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wps.h b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wps.h
new file mode 100644
index 00000000000..25c06782ecb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/esp_supplicant/include/esp_wps.h
@@ -0,0 +1,141 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_WPS_H__
+#define __ESP_WPS_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_wifi_crypto_types.h"
+#include "esp_compiler.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup WiFi_APIs WiFi Related APIs
+  * @brief WiFi APIs
+  */
+
+/** @addtogroup WiFi_APIs
+  * @{
+  */
+
+/** \defgroup WPS_APIs  WPS APIs
+  * @brief ESP32 WPS APIs
+  *
+  * WPS can only be used when ESP32 station is enabled.
+  *
+  */
+
+/** @addtogroup WPS_APIs
+  * @{
+  */
+
+#define ESP_ERR_WIFI_REGISTRAR   (ESP_ERR_WIFI_BASE + 51)  /*!< WPS registrar is not supported */
+#define ESP_ERR_WIFI_WPS_TYPE    (ESP_ERR_WIFI_BASE + 52)  /*!< WPS type error */
+#define ESP_ERR_WIFI_WPS_SM      (ESP_ERR_WIFI_BASE + 53)  /*!< WPS state machine is not initialized */
+
+typedef enum wps_type {
+    WPS_TYPE_DISABLE = 0,
+    WPS_TYPE_PBC,
+    WPS_TYPE_PIN,
+    WPS_TYPE_MAX,
+} wps_type_t;
+
+#define WPS_MAX_MANUFACTURER_LEN 65
+#define WPS_MAX_MODEL_NUMBER_LEN 33
+#define WPS_MAX_MODEL_NAME_LEN   33
+#define WPS_MAX_DEVICE_NAME_LEN  33
+
+typedef struct {
+    char manufacturer[WPS_MAX_MANUFACTURER_LEN]; /*!< Manufacturer, null-terminated string. The default manufcturer is used if the string is empty */
+    char model_number[WPS_MAX_MODEL_NUMBER_LEN]; /*!< Model number, null-terminated string. The default model number is used if the string is empty */
+    char model_name[WPS_MAX_MODEL_NAME_LEN];     /*!< Model name, null-terminated string. The default model name is used if the string is empty */
+    char device_name[WPS_MAX_DEVICE_NAME_LEN];   /*!< Device name, null-terminated string. The default device name is used if the string is empty */
+} wps_factory_information_t;
+
+typedef struct {
+    wps_type_t wps_type;
+    wps_factory_information_t factory_info;
+} esp_wps_config_t;
+
+#define WPS_CONFIG_INIT_DEFAULT(type) { \
+    .wps_type = type, \
+    .factory_info = {   \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_STR(manufacturer, "ESPRESSIF")  \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_STR(model_number, "ESP32")  \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_STR(model_name, "ESPRESSIF IOT")  \
+        ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_STR(device_name, "ESP STATION")  \
+    }  \
+}
+
+/**
+  * @brief     Enable Wi-Fi WPS function.
+  *
+  * @attention WPS can only be used when ESP32 station is enabled.
+  *
+  * @param     wps_type_t wps_type : WPS type, so far only WPS_TYPE_PBC and WPS_TYPE_PIN is supported
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_WIFI_WPS_TYPE : wps type is invalid
+  *          - ESP_ERR_WIFI_WPS_MODE : wifi is not in station mode or sniffer mode is on
+  *          - ESP_FAIL : wps initialization fails
+  */
+esp_err_t esp_wifi_wps_enable(const esp_wps_config_t *config);
+
+/**
+  * @brief  Disable Wi-Fi WPS function and release resource it taken.
+  *
+  * @param  null
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_WIFI_WPS_MODE : wifi is not in station mode or sniffer mode is on
+  */
+esp_err_t esp_wifi_wps_disable(void);
+
+/**
+  * @brief     WPS starts to work.
+  *
+  * @attention WPS can only be used when ESP32 station is enabled.
+  *
+  * @param     timeout_ms : maximum blocking time before API return.
+  *          - 0 : non-blocking
+  *          - 1~120000 : blocking time (not supported in IDF v1.0)
+  *
+  * @return
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_WIFI_WPS_TYPE : wps type is invalid
+  *          - ESP_ERR_WIFI_WPS_MODE : wifi is not in station mode or sniffer mode is on
+  *          - ESP_ERR_WIFI_WPS_SM : wps state machine is not initialized
+  *          - ESP_FAIL : wps initialization fails
+  */
+esp_err_t esp_wifi_wps_start(int timeout_ms);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_WPS_H__ */
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/include/utils/wpa_debug.h b/tools/sdk/esp32s3/include/wpa_supplicant/include/utils/wpa_debug.h
new file mode 100644
index 00000000000..c6ac189c228
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/include/utils/wpa_debug.h
@@ -0,0 +1,209 @@
+/*
+ * wpa_supplicant/hostapd / Debug prints
+ * Copyright (c) 2002-2007, Jouni Malinen <j@w1.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Alternatively, this software may be distributed under the terms of BSD
+ * license.
+ *
+ * See README and COPYING for more details.
+ */
+
+#ifndef WPA_DEBUG_H
+#define WPA_DEBUG_H
+
+#include "wpabuf.h"
+#include "esp_log.h"
+#include "supplicant_opt.h"
+
+#ifdef ESPRESSIF_USE
+
+#define TAG "wpa"
+
+#define MSG_ERROR ESP_LOG_ERROR
+#define MSG_WARNING ESP_LOG_WARN
+#define MSG_INFO ESP_LOG_INFO
+#define MSG_DEBUG ESP_LOG_DEBUG
+#define MSG_MSGDUMP ESP_LOG_VERBOSE
+#define MSG_EXCESSIVE ESP_LOG_VERBOSE
+
+#else
+enum { MSG_MSGDUMP, MSG_DEBUG, MSG_INFO, MSG_WARNING, MSG_ERROR };
+#endif
+
+/** EAP authentication completed successfully */
+#define WPA_EVENT_EAP_SUCCESS "CTRL-EVENT-EAP-SUCCESS "
+
+int wpa_debug_open_file(const char *path);
+void wpa_debug_close_file(void);
+
+/**
+ * wpa_debug_printf_timestamp - Print timestamp for debug output
+ *
+ * This function prints a timestamp in seconds_from_1970.microsoconds
+ * format if debug output has been configured to include timestamps in debug
+ * messages.
+ */
+void wpa_debug_print_timestamp(void);
+
+#ifdef DEBUG_PRINT
+/**
+ * wpa_printf - conditional printf
+ * @level: priority level (MSG_*) of the message
+ * @fmt: printf format string, followed by optional arguments
+ *
+ * This function is used to print conditional debugging and error messages. The
+ * output may be directed to stdout, stderr, and/or syslog based on
+ * configuration.
+ *
+ * Note: New line '\n' is added to the end of the text when printing to stdout.
+ */
+#define wpa_printf(level,fmt, args...) ESP_LOG_LEVEL_LOCAL(level, TAG, fmt, ##args)
+#define wpa_dbg(ctx, level, fmt, args...) wpa_printf(level, fmt, ##args)
+
+void wpa_dump_mem(char* desc, uint8_t *addr, uint16_t len);
+static inline void wpa_hexdump_ascii(int level, const char *title, const u8 *buf, size_t len)
+{
+
+}
+
+static inline void wpa_hexdump_ascii_key(int level, const char *title, const u8 *buf, size_t len)
+{
+}
+
+/**
+ * wpa_hexdump - conditional hex dump
+ * @level: priority level (MSG_*) of the message
+ * @title: title of for the message
+ * @buf: data buffer to be dumped
+ * @len: length of the buf
+ *
+ * This function is used to print conditional debugging and error messages. The
+ * output may be directed to stdout, stderr, and/or syslog based on
+ * configuration. The contents of buf is printed out has hex dump.
+ */
+void wpa_hexdump(int level, const char *title, const u8 *buf, size_t len);
+
+static inline void wpa_hexdump_buf(int level, const char *title,
+				   const struct wpabuf *buf)
+{
+	wpa_hexdump(level, title, wpabuf_head(buf), wpabuf_len(buf));
+}
+
+/**
+ * wpa_hexdump_key - conditional hex dump, hide keys
+ * @level: priority level (MSG_*) of the message
+ * @title: title of for the message
+ * @buf: data buffer to be dumped
+ * @len: length of the buf
+ *
+ * This function is used to print conditional debugging and error messages. The
+ * output may be directed to stdout, stderr, and/or syslog based on
+ * configuration. The contents of buf is printed out has hex dump. This works
+ * like wpa_hexdump(), but by default, does not include secret keys (passwords,
+ * etc.) in debug output.
+ */
+void wpa_hexdump_key(int level, const char *title, const u8 *buf, size_t len);
+
+
+static inline void wpa_hexdump_buf_key(int level, const char *title,
+				       const struct wpabuf *buf)
+{
+	wpa_hexdump_key(level, title, wpabuf_head(buf), wpabuf_len(buf));
+}
+
+/**
+ * wpa_hexdump_ascii - conditional hex dump
+ * @level: priority level (MSG_*) of the message
+ * @title: title of for the message
+ * @buf: data buffer to be dumped
+ * @len: length of the buf
+ *
+ * This function is used to print conditional debugging and error messages. The
+ * output may be directed to stdout, stderr, and/or syslog based on
+ * configuration. The contents of buf is printed out has hex dump with both
+ * the hex numbers and ASCII characters (for printable range) are shown. 16
+ * bytes per line will be shown.
+ */
+void wpa_hexdump_ascii(int level, const char *title, const u8 *buf,
+		       size_t len);
+
+/**
+ * wpa_hexdump_ascii_key - conditional hex dump, hide keys
+ * @level: priority level (MSG_*) of the message
+ * @title: title of for the message
+ * @buf: data buffer to be dumped
+ * @len: length of the buf
+ *
+ * This function is used to print conditional debugging and error messages. The
+ * output may be directed to stdout, stderr, and/or syslog based on
+ * configuration. The contents of buf is printed out has hex dump with both
+ * the hex numbers and ASCII characters (for printable range) are shown. 16
+ * bytes per line will be shown. This works like wpa_hexdump_ascii(), but by
+ * default, does not include secret keys (passwords, etc.) in debug output.
+ */
+void wpa_hexdump_ascii_key(int level, const char *title, const u8 *buf,
+			   size_t len);
+#else
+#define wpa_printf(level,fmt, args...) do {} while(0)
+#define wpa_hexdump(...) do {} while(0)
+#define wpa_dump_mem(...) do {} while(0)
+#define wpa_hexdump_buf(...) do {} while(0)
+#define wpa_hexdump_key(...) do {} while(0)
+#define wpa_hexdump_buf_key(...) do {} while(0)
+#define wpa_hexdump_ascii(...) do {} while(0)
+#define wpa_hexdump_ascii_key(...) do {} while(0)
+#define wpa_dbg(...) do {} while(0)
+#endif
+
+#define wpa_auth_logger
+#define wpa_auth_vlogger
+
+/**
+ * wpa_msg - Conditional printf for default target and ctrl_iface monitors
+ * @ctx: Pointer to context data; this is the ctx variable registered
+ *	with struct wpa_driver_ops::init()
+ * @level: priority level (MSG_*) of the message
+ * @fmt: printf format string, followed by optional arguments
+ *
+ * This function is used to print conditional debugging and error messages. The
+ * output may be directed to stdout, stderr, and/or syslog based on
+ * configuration. This function is like wpa_printf(), but it also sends the
+ * same message to all attached ctrl_iface monitors.
+ *
+ * Note: New line '\n' is added to the end of the text when printing to stdout.
+ */
+#define wpa_msg(...) do {} while(0)
+
+/**
+ * wpa_msg_ctrl - Conditional printf for ctrl_iface monitors
+ * @ctx: Pointer to context data; this is the ctx variable registered
+ *	with struct wpa_driver_ops::init()
+ * @level: priority level (MSG_*) of the message
+ * @fmt: printf format string, followed by optional arguments
+ *
+ * This function is used to print conditional debugging and error messages.
+ * This function is like wpa_msg(), but it sends the output only to the
+ * attached ctrl_iface monitors. In other words, it can be used for frequent
+ * events that do not need to be sent to syslog.
+ */
+void wpa_msg_ctrl(void *ctx, int level, const char *fmt, ...)
+PRINTF_FORMAT(3, 4);
+
+typedef void (*wpa_msg_cb_func)(void *ctx, int level, const char *txt,
+				size_t len);
+
+typedef void (*eloop_timeout_handler)(void *eloop_data, void *user_ctx);
+
+int eloop_cancel_timeout(eloop_timeout_handler handler,
+			 void *eloop_data, void *user_data);
+
+int eloop_register_timeout(unsigned int secs, unsigned int usecs,
+			   eloop_timeout_handler handler,
+			   void *eloop_data, void *user_data);
+
+
+#endif /* WPA_DEBUG_H */
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/include/utils/wpabuf.h b/tools/sdk/esp32s3/include/wpa_supplicant/include/utils/wpabuf.h
new file mode 100644
index 00000000000..092b31e08ba
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/include/utils/wpabuf.h
@@ -0,0 +1,169 @@
+/*
+ * Dynamic data buffer
+ * Copyright (c) 2007-2012, Jouni Malinen <j@w1.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Alternatively, this software may be distributed under the terms of BSD
+ * license.
+ *
+ * See README and COPYING for more details.
+ */
+
+#ifndef WPABUF_H
+#define WPABUF_H
+
+/* wpabuf::buf is a pointer to external data */
+#define WPABUF_FLAG_EXT_DATA BIT(0)
+
+/*
+ * Internal data structure for wpabuf. Please do not touch this directly from
+ * elsewhere. This is only defined in header file to allow inline functions
+ * from this file to access data.
+ */
+struct wpabuf {
+	size_t size; /* total size of the allocated buffer */
+	size_t used; /* length of data in the buffer */
+	u8 *buf; /* pointer to the head of the buffer */
+	unsigned int flags;
+	/* optionally followed by the allocated buffer */
+};
+
+
+int wpabuf_resize(struct wpabuf **buf, size_t add_len);
+struct wpabuf * wpabuf_alloc(size_t len);
+struct wpabuf * wpabuf_alloc_ext_data(u8 *data, size_t len);
+struct wpabuf * wpabuf_alloc_copy(const void *data, size_t len);
+struct wpabuf * wpabuf_dup(const struct wpabuf *src);
+void wpabuf_free(struct wpabuf *buf);
+void wpabuf_clear_free(struct wpabuf *buf);
+void * wpabuf_put(struct wpabuf *buf, size_t len);
+struct wpabuf * wpabuf_concat(struct wpabuf *a, struct wpabuf *b);
+struct wpabuf * wpabuf_zeropad(struct wpabuf *buf, size_t len);
+void wpabuf_printf(struct wpabuf *buf, const char *fmt, ...) PRINTF_FORMAT(2, 3);
+
+
+/**
+ * wpabuf_size - Get the currently allocated size of a wpabuf buffer
+ * @buf: wpabuf buffer
+ * Returns: Currently allocated size of the buffer
+ */
+static inline size_t wpabuf_size(const struct wpabuf *buf)
+{
+	return buf->size;
+}
+
+/**
+ * wpabuf_len - Get the current length of a wpabuf buffer data
+ * @buf: wpabuf buffer
+ * Returns: Currently used length of the buffer
+ */
+static inline size_t wpabuf_len(const struct wpabuf *buf)
+{
+	return buf->used;
+}
+
+/**
+ * wpabuf_tailroom - Get size of available tail room in the end of the buffer
+ * @buf: wpabuf buffer
+ * Returns: Tail room (in bytes) of available space in the end of the buffer
+ */
+static inline size_t wpabuf_tailroom(const struct wpabuf *buf)
+{
+	return buf->size - buf->used;
+}
+
+/**
+ * wpabuf_head - Get pointer to the head of the buffer data
+ * @buf: wpabuf buffer
+ * Returns: Pointer to the head of the buffer data
+ */
+static inline const void * wpabuf_head(const struct wpabuf *buf)
+{
+	return buf->buf;
+}
+
+static inline const u8 * wpabuf_head_u8(const struct wpabuf *buf)
+{
+	return wpabuf_head(buf);
+}
+
+/**
+ * wpabuf_mhead - Get modifiable pointer to the head of the buffer data
+ * @buf: wpabuf buffer
+ * Returns: Pointer to the head of the buffer data
+ */
+static inline void * wpabuf_mhead(struct wpabuf *buf)
+{
+	return buf->buf;
+}
+
+static inline u8 * wpabuf_mhead_u8(struct wpabuf *buf)
+{
+	return wpabuf_mhead(buf);
+}
+
+static inline void wpabuf_put_u8(struct wpabuf *buf, u8 data)
+{
+	u8 *pos = wpabuf_put(buf, 1);
+	*pos = data;
+}
+
+static inline void wpabuf_put_le16(struct wpabuf *buf, u16 data)
+{
+	u8 *pos = wpabuf_put(buf, 2);
+	WPA_PUT_LE16(pos, data);
+}
+
+static inline void wpabuf_put_le32(struct wpabuf *buf, u32 data)
+{
+	u8 *pos = wpabuf_put(buf, 4);
+	WPA_PUT_LE32(pos, data);
+}
+
+static inline void wpabuf_put_be16(struct wpabuf *buf, u16 data)
+{
+	u8 *pos = wpabuf_put(buf, 2);
+	WPA_PUT_BE16(pos, data);
+}
+
+static inline void wpabuf_put_be24(struct wpabuf *buf, u32 data)
+{
+	u8 *pos = wpabuf_put(buf, 3);
+	WPA_PUT_BE24(pos, data);
+}
+
+static inline void wpabuf_put_be32(struct wpabuf *buf, u32 data)
+{
+	u8 *pos = wpabuf_put(buf, 4);
+	WPA_PUT_BE32(pos, data);
+}
+
+static inline void wpabuf_put_data(struct wpabuf *buf, const void *data,
+				   size_t len)
+{
+	if (data)
+		os_memcpy(wpabuf_put(buf, len), data, len);
+}
+
+static inline void wpabuf_put_buf(struct wpabuf *dst,
+				  const struct wpabuf *src)
+{
+	wpabuf_put_data(dst, wpabuf_head(src), wpabuf_len(src));
+}
+
+static inline void wpabuf_set(struct wpabuf *buf, const void *data, size_t len)
+{
+	buf->buf = (u8 *) data;
+	buf->flags = WPABUF_FLAG_EXT_DATA;
+	buf->size = buf->used = len;
+}
+
+static inline void wpabuf_put_str(struct wpabuf *dst, const char *str)
+{
+	wpabuf_put_data(dst, str, os_strlen(str));
+}
+
+#endif /* WPABUF_H */
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/port/include/byteswap.h b/tools/sdk/esp32s3/include/wpa_supplicant/port/include/byteswap.h
new file mode 100644
index 00000000000..d65503ba391
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/port/include/byteswap.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2010 Espressif System
+ */
+
+#ifndef BYTESWAP_H
+#define BYTESWAP_H
+
+#include <machine/endian.h>
+
+/* Swap bytes in 16 bit value.  */
+#ifndef __bswap_16
+#ifdef __GNUC__
+# define __bswap_16(x) \
+    (__extension__							      \
+     ({ unsigned short int __bsx = (x);					      \
+        ((((__bsx) >> 8) & 0xff) | (((__bsx) & 0xff) << 8)); }))
+#else
+static INLINE unsigned short int
+__bswap_16 (unsigned short int __bsx)
+{
+  return ((((__bsx) >> 8) & 0xff) | (((__bsx) & 0xff) << 8));
+}
+#endif
+#endif // __bswap_16
+
+/* Swap bytes in 32 bit value.  */
+#ifndef __bswap_32
+#ifdef __GNUC__
+# define __bswap_32(x) \
+    (__extension__							      \
+     ({ unsigned int __bsx = (x);					      \
+        ((((__bsx) & 0xff000000) >> 24) | (((__bsx) & 0x00ff0000) >>  8) |    \
+	 (((__bsx) & 0x0000ff00) <<  8) | (((__bsx) & 0x000000ff) << 24)); }))
+#else
+static INLINE unsigned int
+__bswap_32 (unsigned int __bsx)
+{
+  return ((((__bsx) & 0xff000000) >> 24) | (((__bsx) & 0x00ff0000) >>  8) |
+	  (((__bsx) & 0x0000ff00) <<  8) | (((__bsx) & 0x000000ff) << 24));
+}
+#endif
+#endif // __bswap_32
+
+#ifndef __bswap_64
+#if defined __GNUC__ && __GNUC__ >= 2
+/* Swap bytes in 64 bit value.  */
+# define __bswap_constant_64(x) \
+     ((((x) & 0xff00000000000000ull) >> 56)				      \
+      | (((x) & 0x00ff000000000000ull) >> 40)				      \
+      | (((x) & 0x0000ff0000000000ull) >> 24)				      \
+      | (((x) & 0x000000ff00000000ull) >> 8)				      \
+      | (((x) & 0x00000000ff000000ull) << 8)				      \
+      | (((x) & 0x0000000000ff0000ull) << 24)				      \
+      | (((x) & 0x000000000000ff00ull) << 40)				      \
+      | (((x) & 0x00000000000000ffull) << 56))
+
+# define __bswap_64(x) \
+     (__extension__							      \
+      ({ union { __extension__ unsigned long long int __ll;		      \
+		 unsigned int __l[2]; } __w, __r;			      \
+         if (__builtin_constant_p (x))					      \
+	   __r.__ll = __bswap_constant_64 (x);				      \
+	 else								      \
+	   {								      \
+	     __w.__ll = (x);						      \
+	     __r.__l[0] = __bswap_32 (__w.__l[1]);			      \
+	     __r.__l[1] = __bswap_32 (__w.__l[0]);			      \
+	   }								      \
+	 __r.__ll; }))
+#endif
+#endif // __bswap_64
+
+#endif /* BYTESWAP_H */
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/port/include/endian.h b/tools/sdk/esp32s3/include/wpa_supplicant/port/include/endian.h
new file mode 100644
index 00000000000..3527cea6586
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/port/include/endian.h
@@ -0,0 +1,226 @@
+/*-
+ * Copyright (c) 2002 Thomas Moestl <tmm@FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _ENDIAN_H_
+#define _ENDIAN_H_
+
+#include <stdint.h>
+#include <sys/types.h>
+#include "byteswap.h"
+
+#ifndef BIG_ENDIAN
+#define BIG_ENDIAN 4321
+#endif
+#ifndef LITTLE_ENDIAN
+#define LITTLE_ENDIAN 1234
+#endif
+
+#ifndef BYTE_ORDER
+#ifdef __IEEE_LITTLE_ENDIAN
+#define BYTE_ORDER LITTLE_ENDIAN
+#else
+#define BYTE_ORDER BIG_ENDIAN
+#endif
+#endif
+
+#define _UINT8_T_DECLARED
+#ifndef _UINT8_T_DECLARED
+typedef	__uint8_t	uint8_t;
+#define	_UINT8_T_DECLARED
+#endif
+
+#define _UINT16_T_DECLARED
+#ifndef _UINT16_T_DECLARED
+typedef	__uint16_t	uint16_t;
+#define	_UINT16_T_DECLARED
+#endif
+
+#define _UINT32_T_DECLARED
+#ifndef _UINT32_T_DECLARED
+typedef	__uint32_t	uint32_t;
+#define	_UINT32_T_DECLARED
+#endif
+
+#define _UINT64_T_DECLARED
+#ifndef _UINT64_T_DECLARED
+typedef	__uint64_t	uint64_t;
+#define	_UINT64_T_DECLARED
+#endif
+
+/*
+ * General byte order swapping functions.
+ */
+#define	bswap16(x)	__bswap16(x)
+#define	bswap32(x)	__bswap32(x)
+#define	bswap64(x)	__bswap64(x)
+
+/*
+ * Host to big endian, host to little endian, big endian to host, and little
+ * endian to host byte order functions as detailed in byteorder(9).
+ */
+#if BYTE_ORDER == _LITTLE_ENDIAN
+#define	htobe16(x)	bswap16((x))
+#define	htobe32(x)	bswap32((x))
+#define	htobe64(x)	bswap64((x))
+#define	htole16(x)	((uint16_t)(x))
+#define	htole32(x)	((uint32_t)(x))
+#define	htole64(x)	((uint64_t)(x))
+
+#define	be16toh(x)	bswap16((x))
+#define	be32toh(x)	bswap32((x))
+#define	be64toh(x)	bswap64((x))
+#define	le16toh(x)	((uint16_t)(x))
+#define	le32toh(x)	((uint32_t)(x))
+#define	le64toh(x)	((uint64_t)(x))
+
+#else /* _BYTE_ORDER != _LITTLE_ENDIAN */
+#define	htobe16(x)	((uint16_t)(x))
+#define	htobe32(x)	((uint32_t)(x))
+#define	htobe64(x)	((uint64_t)(x))
+#define	htole16(x)	bswap16((x))
+#define	htole32(x)	bswap32((x))
+#define	htole64(x)	bswap64((x))
+
+#define	be16toh(x)	((uint16_t)(x))
+#define	be32toh(x)	((uint32_t)(x))
+#define	be64toh(x)	((uint64_t)(x))
+#define	le16toh(x)	bswap16((x))
+#define	le32toh(x)	bswap32((x))
+#define	le64toh(x)	bswap64((x))
+#endif /* _BYTE_ORDER == _LITTLE_ENDIAN */
+
+/* Alignment-agnostic encode/decode bytestream to/from little/big endian. */
+#define INLINE                  __inline__
+
+static INLINE uint16_t
+be16dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return ((p[0] << 8) | p[1]);
+}
+
+static INLINE uint32_t
+be32dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return (((unsigned)p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]);
+}
+
+static INLINE uint64_t
+be64dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return (((uint64_t)be32dec(p) << 32) | be32dec(p + 4));
+}
+
+static INLINE uint16_t
+le16dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return ((p[1] << 8) | p[0]);
+}
+
+static INLINE uint32_t
+le32dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return (((unsigned)p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]);
+}
+
+static INLINE uint64_t
+le64dec(const void *pp)
+{
+	uint8_t const *p = (uint8_t const *)pp;
+
+	return (((uint64_t)le32dec(p + 4) << 32) | le32dec(p));
+}
+
+static INLINE void
+be16enc(void *pp, uint16_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	p[0] = (u >> 8) & 0xff;
+	p[1] = u & 0xff;
+}
+
+static INLINE void
+be32enc(void *pp, uint32_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	p[0] = (u >> 24) & 0xff;
+	p[1] = (u >> 16) & 0xff;
+	p[2] = (u >> 8) & 0xff;
+	p[3] = u & 0xff;
+}
+
+static INLINE void
+be64enc(void *pp, uint64_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	be32enc(p, (uint32_t)(u >> 32));
+	be32enc(p + 4, (uint32_t)(u & 0xffffffffU));
+}
+
+static INLINE void
+le16enc(void *pp, uint16_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	p[0] = u & 0xff;
+	p[1] = (u >> 8) & 0xff;
+}
+
+static INLINE void
+le32enc(void *pp, uint32_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	p[0] = u & 0xff;
+	p[1] = (u >> 8) & 0xff;
+	p[2] = (u >> 16) & 0xff;
+	p[3] = (u >> 24) & 0xff;
+}
+
+static INLINE void
+le64enc(void *pp, uint64_t u)
+{
+	uint8_t *p = (uint8_t *)pp;
+
+	le32enc(p, (uint32_t)(u & 0xffffffffU));
+	le32enc(p + 4, (uint32_t)(u >> 32));
+}
+
+#endif	/* _ENDIAN_H_ */
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/port/include/os.h b/tools/sdk/esp32s3/include/wpa_supplicant/port/include/os.h
new file mode 100644
index 00000000000..ce9aa559a44
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/port/include/os.h
@@ -0,0 +1,341 @@
+/*
+ * OS specific functions
+ * Copyright (c) 2005-2009, Jouni Malinen <j@w1.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Alternatively, this software may be distributed under the terms of BSD
+ * license.
+ *
+ * See README and COPYING for more details.
+ */
+
+#ifndef OS_H
+#define OS_H
+#include "esp_types.h"
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include "esp_err.h"
+#include "supplicant_opt.h"
+
+typedef time_t os_time_t;
+
+/**
+ * os_sleep - Sleep (sec, usec)
+ * @sec: Number of seconds to sleep
+ * @usec: Number of microseconds to sleep
+ */
+void os_sleep(os_time_t sec, os_time_t usec);
+
+struct os_time {
+	os_time_t sec;
+	suseconds_t usec;
+};
+
+#define os_reltime os_time
+
+struct os_tm {
+    int sec; /* 0..59 or 60 for leap seconds */
+    int min; /* 0..59 */
+    int hour; /* 0..23 */
+    int day; /* 1..31 */
+    int month; /* 1..12 */
+    int year; /* Four digit year */
+};
+
+/**
+ * os_get_time - Get current time (sec, usec)
+ * @t: Pointer to buffer for the time
+ * Returns: 0 on success, -1 on failure
+ */
+int os_get_time(struct os_time *t);
+#define os_get_reltime os_get_time
+
+/* Helper macros for handling struct os_time */
+
+#define os_time_before(a, b) \
+	((a)->sec < (b)->sec || \
+	 ((a)->sec == (b)->sec && (a)->usec < (b)->usec))
+
+#define os_reltime_before os_time_before
+#define os_time_sub(a, b, res) do { \
+	(res)->sec = (a)->sec - (b)->sec; \
+	(res)->usec = (a)->usec - (b)->usec; \
+	if ((res)->usec < 0) { \
+		(res)->sec--; \
+		(res)->usec += 1000000; \
+	} \
+} while (0)
+#define os_reltime_sub os_time_sub
+
+/**
+ * os_mktime - Convert broken-down time into seconds since 1970-01-01
+ * @year: Four digit year
+ * @month: Month (1 .. 12)
+ * @day: Day of month (1 .. 31)
+ * @hour: Hour (0 .. 23)
+ * @min: Minute (0 .. 59)
+ * @sec: Second (0 .. 60)
+ * @t: Buffer for returning calendar time representation (seconds since
+ * 1970-01-01 00:00:00)
+ * Returns: 0 on success, -1 on failure
+ *
+ * Note: The result is in seconds from Epoch, i.e., in UTC, not in local time
+ * which is used by POSIX mktime().
+ */
+int os_mktime(int year, int month, int day, int hour, int min, int sec,
+	      os_time_t *t);
+
+int os_gmtime(os_time_t t, struct os_tm *tm);
+
+/**
+ * os_daemonize - Run in the background (detach from the controlling terminal)
+ * @pid_file: File name to write the process ID to or %NULL to skip this
+ * Returns: 0 on success, -1 on failure
+ */
+int os_daemonize(const char *pid_file);
+
+/**
+ * os_daemonize_terminate - Stop running in the background (remove pid file)
+ * @pid_file: File name to write the process ID to or %NULL to skip this
+ */
+void os_daemonize_terminate(const char *pid_file);
+
+/**
+ * os_get_random - Get cryptographically strong pseudo random data
+ * @buf: Buffer for pseudo random data
+ * @len: Length of the buffer
+ * Returns: 0 on success, -1 on failure
+ */
+int os_get_random(unsigned char *buf, size_t len);
+
+/**
+ * os_random - Get pseudo random value (not necessarily very strong)
+ * Returns: Pseudo random value
+ */
+unsigned long os_random(void);
+
+/**
+ * os_rel2abs_path - Get an absolute path for a file
+ * @rel_path: Relative path to a file
+ * Returns: Absolute path for the file or %NULL on failure
+ *
+ * This function tries to convert a relative path of a file to an absolute path
+ * in order for the file to be found even if current working directory has
+ * changed. The returned value is allocated and caller is responsible for
+ * freeing it. It is acceptable to just return the same path in an allocated
+ * buffer, e.g., return strdup(rel_path). This function is only used to find
+ * configuration files when os_daemonize() may have changed the current working
+ * directory and relative path would be pointing to a different location.
+ */
+char * os_rel2abs_path(const char *rel_path);
+
+/**
+ * os_program_init - Program initialization (called at start)
+ * Returns: 0 on success, -1 on failure
+ *
+ * This function is called when a programs starts. If there are any OS specific
+ * processing that is needed, it can be placed here. It is also acceptable to
+ * just return 0 if not special processing is needed.
+ */
+int os_program_init(void);
+
+/**
+ * os_program_deinit - Program deinitialization (called just before exit)
+ *
+ * This function is called just before a program exists. If there are any OS
+ * specific processing, e.g., freeing resourced allocated in os_program_init(),
+ * it should be done here. It is also acceptable for this function to do
+ * nothing.
+ */
+void os_program_deinit(void);
+
+/**
+ * os_setenv - Set environment variable
+ * @name: Name of the variable
+ * @value: Value to set to the variable
+ * @overwrite: Whether existing variable should be overwritten
+ * Returns: 0 on success, -1 on error
+ *
+ * This function is only used for wpa_cli action scripts. OS wrapper does not
+ * need to implement this if such functionality is not needed.
+ */
+int os_setenv(const char *name, const char *value, int overwrite);
+
+/**
+ * os_unsetenv - Delete environent variable
+ * @name: Name of the variable
+ * Returns: 0 on success, -1 on error
+ *
+ * This function is only used for wpa_cli action scripts. OS wrapper does not
+ * need to implement this if such functionality is not needed.
+ */
+int os_unsetenv(const char *name);
+
+/**
+ * os_readfile - Read a file to an allocated memory buffer
+ * @name: Name of the file to read
+ * @len: For returning the length of the allocated buffer
+ * Returns: Pointer to the allocated buffer or %NULL on failure
+ *
+ * This function allocates memory and reads the given file to this buffer. Both
+ * binary and text files can be read with this function. The caller is
+ * responsible for freeing the returned buffer with os_free().
+ */
+char * os_readfile(const char *name, size_t *len);
+
+/*
+ * The following functions are wrapper for standard ANSI C or POSIX functions.
+ * By default, they are just defined to use the standard function name and no
+ * os_*.c implementation is needed for them. This avoids extra function calls
+ * by allowing the C pre-processor take care of the function name mapping.
+ *
+ * If the target system uses a C library that does not provide these functions,
+ * build_config.h can be used to define the wrappers to use a different
+ * function name. This can be done on function-by-function basis since the
+ * defines here are only used if build_config.h does not define the os_* name.
+ * If needed, os_*.c file can be used to implement the functions that are not
+ * included in the C library on the target system. Alternatively,
+ * OS_NO_C_LIB_DEFINES can be defined to skip all defines here in which case
+ * these functions need to be implemented in os_*.c file for the target system.
+ */
+
+#ifndef os_malloc
+#define os_malloc(s) malloc((s))
+#endif
+#ifndef os_realloc
+#define os_realloc(p, s) realloc((p), (s))
+#endif
+#ifndef os_zalloc
+#define os_zalloc(s) calloc(1, (s))
+#endif
+#ifndef os_calloc
+#define os_calloc(p, s) calloc((p), (s))
+#endif
+
+#ifndef os_free
+#define os_free(p) free((p))
+#endif
+
+#ifndef os_bzero
+#define os_bzero(s, n) bzero(s, n)
+#endif
+
+
+#ifndef os_strdup
+#ifdef _MSC_VER
+#define os_strdup(s) _strdup(s)
+#else
+#define os_strdup(s) strdup(s)
+#endif
+#endif
+char * ets_strdup(const char *s);
+
+#ifndef os_memcpy
+#define os_memcpy(d, s, n) memcpy((d), (s), (n))
+#endif
+#ifndef os_memmove
+#define os_memmove(d, s, n) memmove((d), (s), (n))
+#endif
+#ifndef os_memset
+#define os_memset(s, c, n) memset(s, c, n)
+#endif
+#ifndef os_memcmp
+#define os_memcmp(s1, s2, n) memcmp((s1), (s2), (n))
+#endif
+#ifndef os_memcmp_const
+#define os_memcmp_const(s1, s2, n) memcmp((s1), (s2), (n))
+#endif
+
+
+#ifndef os_strlen
+#define os_strlen(s) strlen(s)
+#endif
+#ifndef os_strcasecmp
+#ifdef _MSC_VER
+#define os_strcasecmp(s1, s2) _stricmp((s1), (s2))
+#else
+#define os_strcasecmp(s1, s2) strcasecmp((s1), (s2))
+#endif
+#endif
+#ifndef os_strncasecmp
+#ifdef _MSC_VER
+#define os_strncasecmp(s1, s2, n) _strnicmp((s1), (s2), (n))
+#else
+#define os_strncasecmp(s1, s2, n) strncasecmp((s1), (s2), (n))
+#endif
+#endif
+#ifndef os_strchr
+#define os_strchr(s, c) strchr((s), (c))
+#endif
+#ifndef os_strcmp
+#define os_strcmp(s1, s2) strcmp((s1), (s2))
+#endif
+#ifndef os_strncmp
+#define os_strncmp(s1, s2, n) strncmp((s1), (s2), (n))
+#endif
+#ifndef os_strncpy
+#define os_strncpy(d, s, n) strncpy((d), (s), (n))
+#endif
+#ifndef os_strrchr
+#define os_strrchr(s, c)  strrchr((s), (c))
+#endif
+#ifndef os_strstr
+#define os_strstr(h, n) strstr((h), (n))
+#endif
+#ifndef os_strlcpy
+#define os_strlcpy(d, s, n) strlcpy((d), (s), (n))
+#endif
+#ifndef os_strcat
+#define os_strcat(d, s) strcat((d), (s))
+#endif
+
+#ifndef os_snprintf
+#ifdef _MSC_VER
+#define os_snprintf _snprintf
+#else
+#define os_snprintf snprintf
+#endif
+#endif
+#ifndef os_sprintf
+#define os_sprintf sprintf
+#endif
+
+static inline int os_snprintf_error(size_t size, int res)
+{
+        return res < 0 || (unsigned int) res >= size;
+}
+
+static inline void * os_realloc_array(void *ptr, size_t nmemb, size_t size)
+{
+	if (size && nmemb > (~(size_t) 0) / size)
+		return NULL;
+	return os_realloc(ptr, nmemb * size);
+}
+
+#ifdef USE_MBEDTLS_CRYPTO
+void forced_memzero(void *ptr, size_t len);
+#else
+/* Try to prevent most compilers from optimizing out clearing of memory that
+ * becomes unaccessible after this function is called. This is mostly the case
+ * for clearing local stack variables at the end of a function. This is not
+ * exactly perfect, i.e., someone could come up with a compiler that figures out
+ * the pointer is pointing to memset and then end up optimizing the call out, so
+ * try go a bit further by storing the first octet (now zero) to make this even
+ * a bit more difficult to optimize out. Once memset_s() is available, that
+ * could be used here instead. */
+static void * (* const volatile memset_func)(void *, int, size_t) = memset;
+static uint8_t forced_memzero_val;
+
+static inline void forced_memzero(void *ptr, size_t len)
+{
+	memset_func(ptr, 0, len);
+	if (len) {
+		forced_memzero_val = ((uint8_t *) ptr)[0];
+	}
+}
+#endif
+#endif /* OS_H */
diff --git a/tools/sdk/esp32s3/include/wpa_supplicant/port/include/supplicant_opt.h b/tools/sdk/esp32s3/include/wpa_supplicant/port/include/supplicant_opt.h
new file mode 100644
index 00000000000..59b428d5462
--- /dev/null
+++ b/tools/sdk/esp32s3/include/wpa_supplicant/port/include/supplicant_opt.h
@@ -0,0 +1,40 @@
+// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SUPPLICANT_OPT_H
+#define _SUPPLICANT_OPT_H
+
+#include "sdkconfig.h"
+
+#if CONFIG_WPA_MBEDTLS_CRYPTO
+#define USE_MBEDTLS_CRYPTO 1
+#else
+#define CONFIG_TLS_INTERNAL_CLIENT
+#define CONFIG_CRYPTO_INTERNAL
+#define CONFIG_TLSV12
+#endif
+
+#if CONFIG_WPA_DEBUG_PRINT
+#define DEBUG_PRINT
+#endif
+
+#if CONFIG_WPA_11KV_SUPPORT
+#define ROAMING_SUPPORT 1
+#endif
+
+#if CONFIG_WPA_SCAN_CACHE
+#define SCAN_CACHE_SUPPORTED
+#endif
+
+#endif /* _SUPPLICANT_OPT_H */
diff --git a/tools/sdk/esp32s3/include/ws2812_led/led_strip.h b/tools/sdk/esp32s3/include/ws2812_led/led_strip.h
new file mode 100644
index 00000000000..8b0e826c705
--- /dev/null
+++ b/tools/sdk/esp32s3/include/ws2812_led/led_strip.h
@@ -0,0 +1,126 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "esp_err.h"
+
+/**
+* @brief LED Strip Type
+*
+*/
+typedef struct led_strip_s led_strip_t;
+
+/**
+* @brief LED Strip Device Type
+*
+*/
+typedef void *led_strip_dev_t;
+
+/**
+* @brief Declare of LED Strip Type
+*
+*/
+struct led_strip_s {
+    /**
+    * @brief Set RGB for a specific pixel
+    *
+    * @param strip: LED strip
+    * @param index: index of pixel to set
+    * @param red: red part of color
+    * @param green: green part of color
+    * @param blue: blue part of color
+    *
+    * @return
+    *      - ESP_OK: Set RGB for a specific pixel successfully
+    *      - ESP_ERR_INVALID_ARG: Set RGB for a specific pixel failed because of invalid parameters
+    *      - ESP_FAIL: Set RGB for a specific pixel failed because other error occurred
+    */
+    esp_err_t (*set_pixel)(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue);
+
+    /**
+    * @brief Refresh memory colors to LEDs
+    *
+    * @param strip: LED strip
+    * @param timeout_ms: timeout value for refreshing task
+    *
+    * @return
+    *      - ESP_OK: Refresh successfully
+    *      - ESP_ERR_TIMEOUT: Refresh failed because of timeout
+    *      - ESP_FAIL: Refresh failed because some other error occurred
+    *
+    * @note:
+    *      After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip.
+    */
+    esp_err_t (*refresh)(led_strip_t *strip, uint32_t timeout_ms);
+
+    /**
+    * @brief Clear LED strip (turn off all LEDs)
+    *
+    * @param strip: LED strip
+    * @param timeout_ms: timeout value for clearing task
+    *
+    * @return
+    *      - ESP_OK: Clear LEDs successfully
+    *      - ESP_ERR_TIMEOUT: Clear LEDs failed because of timeout
+    *      - ESP_FAIL: Clear LEDs failed because some other error occurred
+    */
+    esp_err_t (*clear)(led_strip_t *strip, uint32_t timeout_ms);
+
+    /**
+    * @brief Free LED strip resources
+    *
+    * @param strip: LED strip
+    *
+    * @return
+    *      - ESP_OK: Free resources successfully
+    *      - ESP_FAIL: Free resources failed because error occurred
+    */
+    esp_err_t (*del)(led_strip_t *strip);
+};
+
+/**
+* @brief LED Strip Configuration Type
+*
+*/
+typedef struct {
+    uint32_t max_leds;   /*!< Maximum LEDs in a single strip */
+    led_strip_dev_t dev; /*!< LED strip device (e.g. RMT channel, PWM channel, etc) */
+} led_strip_config_t;
+
+/**
+ * @brief Default configuration for LED strip
+ *
+ */
+#define LED_STRIP_DEFAULT_CONFIG(number, dev_hdl) \
+    {                                             \
+        .max_leds = number,                       \
+        .dev = dev_hdl,                           \
+    }
+
+/**
+* @brief Install a new ws2812 driver (based on RMT peripheral)
+*
+* @param config: LED strip configuration
+* @return
+*      LED strip instance or NULL
+*/
+led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s3/include/ws2812_led/ws2812_led.h b/tools/sdk/esp32s3/include/ws2812_led/ws2812_led.h
new file mode 100644
index 00000000000..8a3e4076663
--- /dev/null
+++ b/tools/sdk/esp32s3/include/ws2812_led/ws2812_led.h
@@ -0,0 +1,44 @@
+/*
+   This example code is in the Public Domain (or CC0 licensed, at your option.)
+
+   Unless required by applicable law or agreed to in writing, this
+   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+*/
+#pragma once
+#include <esp_err.h>
+
+/** Initialize the WS2812 RGB LED
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_init(void);
+
+/** Set RGB value for the WS2812 LED
+ *
+ * @param[in] red Intensity of Red color (0-100)
+ * @param[in] green Intensity of Green color (0-100)
+ * @param[in] blue Intensity of Green color (0-100)
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_set_rgb(uint32_t red, uint32_t green, uint32_t blue);
+
+/** Set HSV value for the WS2812 LED
+ *
+ * @param[in] hue Value of hue in arc degrees (0-360)
+ * @param[in] saturation Saturation in percentage (0-100)
+ * @param[in] value Value (also called Intensity) in percentage (0-100)
+ *
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_set_hsv(uint32_t hue, uint32_t saturation, uint32_t value);
+
+/** Clear (turn off) the WS2812 LED
+ * @return ESP_OK on success.
+ * @return error in case of failure.
+ */
+esp_err_t ws2812_led_clear(void);
diff --git a/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/core-isa.h b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/core-isa.h
new file mode 100644
index 00000000000..6c8fc963c0a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/core-isa.h
@@ -0,0 +1,681 @@
+/*
+ * xtensa/config/core-isa.h -- HAL definitions that are dependent on Xtensa
+ *				processor CORE configuration
+ *
+ *  See <xtensa/config/core.h>, which includes this file, for more details.
+ */
+
+/* Xtensa processor core configuration information.
+
+   Customer ID=15128; Build=0x90f1f; Copyright (c) 1999-2021 Tensilica Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
+
+#ifndef _XTENSA_CORE_CONFIGURATION_H
+#define _XTENSA_CORE_CONFIGURATION_H
+
+
+/****************************************************************************
+	    Parameters Useful for Any Code, USER or PRIVILEGED
+ ****************************************************************************/
+
+/*
+ *  Note:  Macros of the form XCHAL_HAVE_*** have a value of 1 if the option is
+ *  configured, and a value of 0 otherwise.  These macros are always defined.
+ */
+
+
+/*----------------------------------------------------------------------
+				ISA
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_HAVE_BE			0	/* big-endian byte ordering */
+#define XCHAL_HAVE_WINDOWED		1	/* windowed registers option */
+#define XCHAL_NUM_AREGS			64	/* num of physical addr regs */
+#define XCHAL_NUM_AREGS_LOG2		6	/* log2(XCHAL_NUM_AREGS) */
+#define XCHAL_MAX_INSTRUCTION_SIZE	4	/* max instr bytes (3..8) */
+#define XCHAL_HAVE_DEBUG		1	/* debug option */
+#define XCHAL_HAVE_DENSITY		1	/* 16-bit instructions */
+#define XCHAL_HAVE_LOOPS		1	/* zero-overhead loops */
+#define XCHAL_LOOP_BUFFER_SIZE		256	/* zero-ov. loop instr buffer size */
+#define XCHAL_HAVE_NSA			1	/* NSA/NSAU instructions */
+#define XCHAL_HAVE_MINMAX		1	/* MIN/MAX instructions */
+#define XCHAL_HAVE_SEXT			1	/* SEXT instruction */
+#define XCHAL_HAVE_DEPBITS		0	/* DEPBITS instruction */
+#define XCHAL_HAVE_CLAMPS		1	/* CLAMPS instruction */
+#define XCHAL_HAVE_MUL16		1	/* MUL16S/MUL16U instructions */
+#define XCHAL_HAVE_MUL32		1	/* MULL instruction */
+#define XCHAL_HAVE_MUL32_HIGH		1	/* MULUH/MULSH instructions */
+#define XCHAL_HAVE_DIV32		1	/* QUOS/QUOU/REMS/REMU instructions */
+#define XCHAL_HAVE_L32R			1	/* L32R instruction */
+#define XCHAL_HAVE_ABSOLUTE_LITERALS	0	/* non-PC-rel (extended) L32R */
+#define XCHAL_HAVE_CONST16		0	/* CONST16 instruction */
+#define XCHAL_HAVE_ADDX			1	/* ADDX#/SUBX# instructions */
+#define XCHAL_HAVE_EXCLUSIVE            0	/* L32EX/S32EX instructions */
+#define XCHAL_HAVE_WIDE_BRANCHES	0	/* B*.W18 or B*.W15 instr's */
+#define XCHAL_HAVE_PREDICTED_BRANCHES	0	/* B[EQ/EQZ/NE/NEZ]T instr's */
+#define XCHAL_HAVE_CALL4AND12		1	/* (obsolete option) */
+#define XCHAL_HAVE_ABS			1	/* ABS instruction */
+/*#define XCHAL_HAVE_POPC		0*/	/* POPC instruction */
+/*#define XCHAL_HAVE_CRC		0*/	/* CRC instruction */
+#define XCHAL_HAVE_RELEASE_SYNC		1	/* L32AI/S32RI instructions */
+#define XCHAL_HAVE_S32C1I		1	/* S32C1I instruction */
+#define XCHAL_HAVE_SPECULATION		0	/* speculation */
+#define XCHAL_HAVE_FULL_RESET		1	/* all regs/state reset */
+#define XCHAL_NUM_CONTEXTS		1	/* */
+#define XCHAL_NUM_MISC_REGS		4	/* num of scratch regs (0..4) */
+#define XCHAL_HAVE_TAP_MASTER		0	/* JTAG TAP control instr's */
+#define XCHAL_HAVE_PRID			1	/* processor ID register */
+#define XCHAL_HAVE_EXTERN_REGS		1	/* WER/RER instructions */
+#define XCHAL_HAVE_MX			0	/* MX core (Tensilica internal) */
+#define XCHAL_HAVE_MP_INTERRUPTS	0	/* interrupt distributor port */
+#define XCHAL_HAVE_MP_RUNSTALL		0	/* core RunStall control port */
+#define XCHAL_HAVE_PSO			0	/* Power Shut-Off */
+#define XCHAL_HAVE_PSO_CDM		0	/* core/debug/mem pwr domains */
+#define XCHAL_HAVE_PSO_FULL_RETENTION	0	/* all regs preserved on PSO */
+#define XCHAL_HAVE_THREADPTR		1	/* THREADPTR register */
+#define XCHAL_HAVE_BOOLEANS		1	/* boolean registers */
+#define XCHAL_HAVE_CP			1	/* CPENABLE reg (coprocessor) */
+#define XCHAL_CP_MAXCFG			8	/* max allowed cp id plus one */
+#define XCHAL_HAVE_MAC16		1	/* MAC16 package */
+
+#define XCHAL_HAVE_FUSION		0	/* Fusion*/
+#define XCHAL_HAVE_FUSION_FP		0	/* Fusion FP option */
+#define XCHAL_HAVE_FUSION_LOW_POWER	0	/* Fusion Low Power option */
+#define XCHAL_HAVE_FUSION_AES		0	/* Fusion BLE/Wifi AES-128 CCM option */
+#define XCHAL_HAVE_FUSION_CONVENC	0	/* Fusion Conv Encode option */
+#define XCHAL_HAVE_FUSION_LFSR_CRC	0	/* Fusion LFSR-CRC option */
+#define XCHAL_HAVE_FUSION_BITOPS	0	/* Fusion Bit Operations Support option */
+#define XCHAL_HAVE_FUSION_AVS		0	/* Fusion AVS option */
+#define XCHAL_HAVE_FUSION_16BIT_BASEBAND 0	/* Fusion 16-bit Baseband option */
+#define XCHAL_HAVE_FUSION_VITERBI	0	/* Fusion Viterbi option */
+#define XCHAL_HAVE_FUSION_SOFTDEMAP	0	/* Fusion Soft Bit Demap option */
+#define XCHAL_HAVE_HIFIPRO		0	/* HiFiPro Audio Engine pkg */
+#define XCHAL_HAVE_HIFI5		0	/* HiFi5 Audio Engine pkg */
+#define XCHAL_HAVE_HIFI5_NN_MAC		0	/* HiFi5 Audio Engine NN-MAC option */
+#define XCHAL_HAVE_HIFI5_VFPU		0	/* HiFi5 Audio Engine Single-Precision VFPU option */
+#define XCHAL_HAVE_HIFI5_HP_VFPU	0	/* HiFi5 Audio Engine Half-Precision VFPU option */
+#define XCHAL_HAVE_HIFI4		0	/* HiFi4 Audio Engine pkg */
+#define XCHAL_HAVE_HIFI4_VFPU		0	/* HiFi4 Audio Engine VFPU option */
+#define XCHAL_HAVE_HIFI3		0	/* HiFi3 Audio Engine pkg */
+#define XCHAL_HAVE_HIFI3_VFPU		0	/* HiFi3 Audio Engine VFPU option */
+#define XCHAL_HAVE_HIFI3Z		0	/* HiFi3Z Audio Engine pkg */
+#define XCHAL_HAVE_HIFI3Z_VFPU	0	/* HiFi3Z Audio Engine VFPU option */
+#define XCHAL_HAVE_HIFI2		0	/* HiFi2 Audio Engine pkg */
+#define XCHAL_HAVE_HIFI2EP		0	/* HiFi2EP */
+#define XCHAL_HAVE_HIFI_MINI		0
+
+
+
+#define XCHAL_HAVE_VECTORFPU2005	0	/* vector floating-point pkg */
+#define XCHAL_HAVE_USER_DPFPU		0       /* user DP floating-point pkg */
+#define XCHAL_HAVE_USER_SPFPU		0       /* user SP floating-point pkg */
+#define XCHAL_HAVE_FP			1	/* single prec floating point */
+#define XCHAL_HAVE_FP_DIV		1	/* FP with DIV instructions */
+#define XCHAL_HAVE_FP_RECIP		1	/* FP with RECIP instructions */
+#define XCHAL_HAVE_FP_SQRT		1	/* FP with SQRT instructions */
+#define XCHAL_HAVE_FP_RSQRT		1	/* FP with RSQRT instructions */
+#define XCHAL_HAVE_DFP			0	/* double precision FP pkg */
+#define XCHAL_HAVE_DFP_DIV		0	/* DFP with DIV instructions */
+#define XCHAL_HAVE_DFP_RECIP		0	/* DFP with RECIP instructions*/
+#define XCHAL_HAVE_DFP_SQRT		0	/* DFP with SQRT instructions */
+#define XCHAL_HAVE_DFP_RSQRT		0	/* DFP with RSQRT instructions*/
+#define XCHAL_HAVE_DFP_ACCEL		0	/* double precision FP acceleration pkg */
+#define XCHAL_HAVE_DFP_accel		XCHAL_HAVE_DFP_ACCEL	/* for backward compatibility */
+
+#define XCHAL_HAVE_DFPU_SINGLE_ONLY	1	/* DFPU Coprocessor, single precision only */
+#define XCHAL_HAVE_DFPU_SINGLE_DOUBLE	0	/* DFPU Coprocessor, single and double precision */
+#define XCHAL_HAVE_VECTRA1		0	/* Vectra I  pkg */
+#define XCHAL_HAVE_VECTRALX		0	/* Vectra LX pkg */
+
+#define XCHAL_HAVE_FUSIONG		0    /* FusionG */
+#define XCHAL_HAVE_FUSIONG3		0    /* FusionG3 */
+#define XCHAL_HAVE_FUSIONG6		0    /* FusionG6 */
+#define XCHAL_HAVE_FUSIONG_SP_VFPU	0    /* sp_vfpu option on FusionG */
+#define XCHAL_HAVE_FUSIONG_DP_VFPU	0    /* dp_vfpu option on FusionG */
+#define XCHAL_FUSIONG_SIMD32		0    /* simd32 for FusionG */
+
+#define XCHAL_HAVE_PDX			0    /* PDX */
+#define XCHAL_PDX_SIMD32		0    /* simd32 for PDX */
+#define XCHAL_HAVE_PDX4			0    /* PDX4 */
+#define XCHAL_HAVE_PDX8			0    /* PDX8 */
+#define XCHAL_HAVE_PDX16		0    /* PDX16 */
+
+#define XCHAL_HAVE_CONNXD2		0	/* ConnX D2 pkg */
+#define XCHAL_HAVE_CONNXD2_DUALLSFLIX   0	/* ConnX D2 & Dual LoadStore Flix */
+#define XCHAL_HAVE_BBE16		0	/* ConnX BBE16 pkg */
+#define XCHAL_HAVE_BBE16_RSQRT		0	/* BBE16 & vector recip sqrt */
+#define XCHAL_HAVE_BBE16_VECDIV		0	/* BBE16 & vector divide */
+#define XCHAL_HAVE_BBE16_DESPREAD	0	/* BBE16 & despread */
+#define XCHAL_HAVE_BBENEP		0	/* ConnX BBENEP pkgs */
+#define XCHAL_HAVE_BBENEP_SP_VFPU	0      /* sp_vfpu option on BBE-EP */
+#define XCHAL_HAVE_BSP3			0	/* ConnX BSP3 pkg */
+#define XCHAL_HAVE_BSP3_TRANSPOSE	0	/* BSP3 & transpose32x32 */
+#define XCHAL_HAVE_SSP16		0	/* ConnX SSP16 pkg */
+#define XCHAL_HAVE_SSP16_VITERBI	0	/* SSP16 & viterbi */
+#define XCHAL_HAVE_TURBO16		0	/* ConnX Turbo16 pkg */
+#define XCHAL_HAVE_BBP16		0	/* ConnX BBP16 pkg */
+#define XCHAL_HAVE_FLIX3		0	/* basic 3-way FLIX option */
+#define XCHAL_HAVE_GRIVPEP		0	/* General Release of IVPEP */
+#define XCHAL_HAVE_GRIVPEP_HISTOGRAM	0       /* Histogram option on GRIVPEP */
+
+#define XCHAL_HAVE_VISION	        0     /* Vision P5/P6 */
+#define XCHAL_VISION_SIMD16             0     /* simd16 for Vision P5/P6 */
+#define XCHAL_VISION_TYPE               0     /* Vision P5, P6, or P3 */
+#define XCHAL_VISION_QUAD_MAC_TYPE      0     /* quad_mac option on Vision P6 */
+#define XCHAL_HAVE_VISION_HISTOGRAM     0     /* histogram option on Vision P5/P6 */
+#define XCHAL_HAVE_VISION_SP_VFPU       0     /* sp_vfpu option on Vision P5/P6 */
+#define XCHAL_HAVE_VISION_HP_VFPU       0     /* hp_vfpu option on Vision P6 */
+
+#define XCHAL_HAVE_VISIONC	        0     /* Vision C */
+
+/*----------------------------------------------------------------------
+				MISC
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_NUM_LOADSTORE_UNITS	1	/* load/store units */
+#define XCHAL_NUM_WRITEBUFFER_ENTRIES	4	/* size of write buffer */
+#define XCHAL_INST_FETCH_WIDTH		4	/* instr-fetch width in bytes */
+#define XCHAL_DATA_WIDTH		16	/* data width in bytes */
+#define XCHAL_DATA_PIPE_DELAY		1	/* d-side pipeline delay
+						   (1 = 5-stage, 2 = 7-stage) */
+#define XCHAL_CLOCK_GATING_GLOBAL	1	/* global clock gating */
+#define XCHAL_CLOCK_GATING_FUNCUNIT	1	/* funct. unit clock gating */
+/*  In T1050, applies to selected core load and store instructions (see ISA): */
+#define XCHAL_UNALIGNED_LOAD_EXCEPTION	0	/* unaligned loads cause exc. */
+#define XCHAL_UNALIGNED_STORE_EXCEPTION	0	/* unaligned stores cause exc.*/
+#define XCHAL_UNALIGNED_LOAD_HW		1	/* unaligned loads work in hw */
+#define XCHAL_UNALIGNED_STORE_HW	1	/* unaligned stores work in hw*/
+
+#define XCHAL_SW_VERSION		1200012	/* sw version of this header */
+
+#define XCHAL_CORE_ID			"LX7_ESP32_S3_MP"	/* alphanum core name
+						   (CoreID) set in the Xtensa
+						   Processor Generator */
+
+#define XCHAL_BUILD_UNIQUE_ID		0x00090F1F	/* 22-bit sw build ID */
+
+/*
+ *  These definitions describe the hardware targeted by this software.
+ */
+#define XCHAL_HW_CONFIGID0		0xC2F0FFFE	/* ConfigID hi 32 bits*/
+#define XCHAL_HW_CONFIGID1		0x23090F1F	/* ConfigID lo 32 bits*/
+#define XCHAL_HW_VERSION_NAME		"LX7.0.12"	/* full version name */
+#define XCHAL_HW_VERSION_MAJOR		2700	/* major ver# of targeted hw */
+#define XCHAL_HW_VERSION_MINOR		12	/* minor ver# of targeted hw */
+#define XCHAL_HW_VERSION		270012	/* major*100+minor */
+#define XCHAL_HW_REL_LX7		1
+#define XCHAL_HW_REL_LX7_0		1
+#define XCHAL_HW_REL_LX7_0_12		1
+#define XCHAL_HW_CONFIGID_RELIABLE	1
+/*  If software targets a *range* of hardware versions, these are the bounds: */
+#define XCHAL_HW_MIN_VERSION_MAJOR	2700	/* major v of earliest tgt hw */
+#define XCHAL_HW_MIN_VERSION_MINOR	12	/* minor v of earliest tgt hw */
+#define XCHAL_HW_MIN_VERSION		270012	/* earliest targeted hw */
+#define XCHAL_HW_MAX_VERSION_MAJOR	2700	/* major v of latest tgt hw */
+#define XCHAL_HW_MAX_VERSION_MINOR	12	/* minor v of latest tgt hw */
+#define XCHAL_HW_MAX_VERSION		270012	/* latest targeted hw */
+
+
+/*----------------------------------------------------------------------
+				CACHE
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_ICACHE_LINESIZE		4	/* I-cache line size in bytes */
+#define XCHAL_DCACHE_LINESIZE		16	/* D-cache line size in bytes */
+#define XCHAL_ICACHE_LINEWIDTH		2	/* log2(I line size in bytes) */
+#define XCHAL_DCACHE_LINEWIDTH		4	/* log2(D line size in bytes) */
+
+#define XCHAL_ICACHE_SIZE		0	/* I-cache size in bytes or 0 */
+#define XCHAL_DCACHE_SIZE		0	/* D-cache size in bytes or 0 */
+
+#define XCHAL_DCACHE_IS_WRITEBACK	0	/* writeback feature */
+#define XCHAL_DCACHE_IS_COHERENT	0	/* MP coherence feature */
+
+#define XCHAL_HAVE_PREFETCH		0	/* PREFCTL register */
+#define XCHAL_HAVE_PREFETCH_L1		0	/* prefetch to L1 dcache */
+#define XCHAL_PREFETCH_CASTOUT_LINES	0	/* dcache pref. castout bufsz */
+#define XCHAL_PREFETCH_ENTRIES		0	/* cache prefetch entries */
+#define XCHAL_PREFETCH_BLOCK_ENTRIES	0	/* prefetch block streams */
+#define XCHAL_HAVE_CACHE_BLOCKOPS	0	/* block prefetch for caches */
+#define XCHAL_HAVE_ICACHE_TEST		0	/* Icache test instructions */
+#define XCHAL_HAVE_DCACHE_TEST		0	/* Dcache test instructions */
+#define XCHAL_HAVE_ICACHE_DYN_WAYS	0	/* Icache dynamic way support */
+#define XCHAL_HAVE_DCACHE_DYN_WAYS	0	/* Dcache dynamic way support */
+
+
+
+
+/****************************************************************************
+    Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
+ ****************************************************************************/
+
+
+#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
+
+/*----------------------------------------------------------------------
+				CACHE
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_HAVE_PIF			1	/* any outbound bus present */
+
+#define XCHAL_HAVE_AXI			0	/* AXI bus */
+#define XCHAL_HAVE_AXI_ECC		0	/* ECC on AXI bus */
+#define XCHAL_HAVE_ACELITE		0	/* ACELite bus */
+
+#define XCHAL_HAVE_PIF_WR_RESP			0	/* pif write response */
+#define XCHAL_HAVE_PIF_REQ_ATTR			1	/* pif attribute */
+
+/*  If present, cache size in bytes == (ways * 2^(linewidth + setwidth)).  */
+
+/*  Number of cache sets in log2(lines per way):  */
+#define XCHAL_ICACHE_SETWIDTH		0
+#define XCHAL_DCACHE_SETWIDTH		0
+
+/*  Cache set associativity (number of ways):  */
+#define XCHAL_ICACHE_WAYS		1
+#define XCHAL_DCACHE_WAYS		1
+
+/*  Cache features:  */
+#define XCHAL_ICACHE_LINE_LOCKABLE	0
+#define XCHAL_DCACHE_LINE_LOCKABLE	0
+#define XCHAL_ICACHE_ECC_PARITY		0
+#define XCHAL_DCACHE_ECC_PARITY		0
+#define XCHAL_ICACHE_ECC_WIDTH		1
+#define XCHAL_DCACHE_ECC_WIDTH		1
+
+/*  Cache access size in bytes (affects operation of SICW instruction):  */
+#define XCHAL_ICACHE_ACCESS_SIZE	1
+#define XCHAL_DCACHE_ACCESS_SIZE	1
+
+#define XCHAL_DCACHE_BANKS		0	/* number of banks */
+
+/*  Number of encoded cache attr bits (see <xtensa/hal.h> for decoded bits):  */
+#define XCHAL_CA_BITS			4
+
+
+/*----------------------------------------------------------------------
+			INTERNAL I/D RAM/ROMs and XLMI
+  ----------------------------------------------------------------------*/
+#define XCHAL_NUM_INSTROM		0	/* number of core instr. ROMs */
+#define XCHAL_NUM_INSTRAM		1	/* number of core instr. RAMs */
+#define XCHAL_NUM_DATAROM		0	/* number of core data ROMs */
+#define XCHAL_NUM_DATARAM		1	/* number of core data RAMs */
+#define XCHAL_NUM_URAM			0	/* number of core unified RAMs*/
+#define XCHAL_NUM_XLMI			0	/* number of core XLMI ports */
+
+/*  Instruction RAM 0:  */
+#define XCHAL_INSTRAM0_VADDR		0x40000000	/* virtual address */
+#define XCHAL_INSTRAM0_PADDR		0x40000000	/* physical address */
+#define XCHAL_INSTRAM0_SIZE		67108864	/* size in bytes */
+#define XCHAL_INSTRAM0_ECC_PARITY	0	/* ECC/parity type, 0=none */
+#define XCHAL_HAVE_INSTRAM0		1
+#define XCHAL_INSTRAM0_HAVE_IDMA	0	/* idma supported by this local memory */
+
+/*  Data RAM 0:  */
+#define XCHAL_DATARAM0_VADDR		0x3C000000	/* virtual address */
+#define XCHAL_DATARAM0_PADDR		0x3C000000	/* physical address */
+#define XCHAL_DATARAM0_SIZE		67108864	/* size in bytes */
+#define XCHAL_DATARAM0_ECC_PARITY	0	/* ECC/parity type, 0=none */
+#define XCHAL_DATARAM0_BANKS		1	/* number of banks */
+#define XCHAL_HAVE_DATARAM0		1
+#define XCHAL_DATARAM0_HAVE_IDMA	0	/* idma supported by this local memory */
+
+#define XCHAL_HAVE_IDMA			0
+#define XCHAL_HAVE_IDMA_TRANSPOSE	0
+
+#define XCHAL_HAVE_IMEM_LOADSTORE	1	/* can load/store to IROM/IRAM*/
+
+
+/*----------------------------------------------------------------------
+			INTERRUPTS and TIMERS
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_HAVE_INTERRUPTS		1	/* interrupt option */
+#define XCHAL_HAVE_HIGHPRI_INTERRUPTS	1	/* med/high-pri. interrupts */
+#define XCHAL_HAVE_NMI			1	/* non-maskable interrupt */
+#define XCHAL_HAVE_CCOUNT		1	/* CCOUNT reg. (timer option) */
+#define XCHAL_NUM_TIMERS		3	/* number of CCOMPAREn regs */
+#define XCHAL_NUM_INTERRUPTS		32	/* number of interrupts */
+#define XCHAL_NUM_INTERRUPTS_LOG2	5	/* ceil(log2(NUM_INTERRUPTS)) */
+#define XCHAL_NUM_EXTINTERRUPTS		26	/* num of external interrupts */
+#define XCHAL_NUM_INTLEVELS		6	/* number of interrupt levels
+						   (not including level zero) */
+#define XCHAL_EXCM_LEVEL		3	/* level masked by PS.EXCM */
+	/* (always 1 in XEA1; levels 2 .. EXCM_LEVEL are "medium priority") */
+
+/*  Masks of interrupts at each interrupt level:  */
+#define XCHAL_INTLEVEL1_MASK		0x000637FF
+#define XCHAL_INTLEVEL2_MASK		0x00380000
+#define XCHAL_INTLEVEL3_MASK		0x28C08800
+#define XCHAL_INTLEVEL4_MASK		0x53000000
+#define XCHAL_INTLEVEL5_MASK		0x84010000
+#define XCHAL_INTLEVEL6_MASK		0x00000000
+#define XCHAL_INTLEVEL7_MASK		0x00004000
+
+/*  Masks of interrupts at each range 1..n of interrupt levels:  */
+#define XCHAL_INTLEVEL1_ANDBELOW_MASK	0x000637FF
+#define XCHAL_INTLEVEL2_ANDBELOW_MASK	0x003E37FF
+#define XCHAL_INTLEVEL3_ANDBELOW_MASK	0x28FEBFFF
+#define XCHAL_INTLEVEL4_ANDBELOW_MASK	0x7BFEBFFF
+#define XCHAL_INTLEVEL5_ANDBELOW_MASK	0xFFFFBFFF
+#define XCHAL_INTLEVEL6_ANDBELOW_MASK	0xFFFFBFFF
+#define XCHAL_INTLEVEL7_ANDBELOW_MASK	0xFFFFFFFF
+
+/*  Level of each interrupt:  */
+#define XCHAL_INT0_LEVEL		1
+#define XCHAL_INT1_LEVEL		1
+#define XCHAL_INT2_LEVEL		1
+#define XCHAL_INT3_LEVEL		1
+#define XCHAL_INT4_LEVEL		1
+#define XCHAL_INT5_LEVEL		1
+#define XCHAL_INT6_LEVEL		1
+#define XCHAL_INT7_LEVEL		1
+#define XCHAL_INT8_LEVEL		1
+#define XCHAL_INT9_LEVEL		1
+#define XCHAL_INT10_LEVEL		1
+#define XCHAL_INT11_LEVEL		3
+#define XCHAL_INT12_LEVEL		1
+#define XCHAL_INT13_LEVEL		1
+#define XCHAL_INT14_LEVEL		7
+#define XCHAL_INT15_LEVEL		3
+#define XCHAL_INT16_LEVEL		5
+#define XCHAL_INT17_LEVEL		1
+#define XCHAL_INT18_LEVEL		1
+#define XCHAL_INT19_LEVEL		2
+#define XCHAL_INT20_LEVEL		2
+#define XCHAL_INT21_LEVEL		2
+#define XCHAL_INT22_LEVEL		3
+#define XCHAL_INT23_LEVEL		3
+#define XCHAL_INT24_LEVEL		4
+#define XCHAL_INT25_LEVEL		4
+#define XCHAL_INT26_LEVEL		5
+#define XCHAL_INT27_LEVEL		3
+#define XCHAL_INT28_LEVEL		4
+#define XCHAL_INT29_LEVEL		3
+#define XCHAL_INT30_LEVEL		4
+#define XCHAL_INT31_LEVEL		5
+#define XCHAL_DEBUGLEVEL		6	/* debug interrupt level */
+#define XCHAL_HAVE_DEBUG_EXTERN_INT	1	/* OCD external db interrupt */
+#define XCHAL_NMILEVEL			7	/* NMI "level" (for use with
+						   EXCSAVE/EPS/EPC_n, RFI n) */
+
+/*  Type of each interrupt:  */
+#define XCHAL_INT0_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT1_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT2_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT3_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT4_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT5_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT6_TYPE 	XTHAL_INTTYPE_TIMER
+#define XCHAL_INT7_TYPE 	XTHAL_INTTYPE_SOFTWARE
+#define XCHAL_INT8_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT9_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT10_TYPE 	XTHAL_INTTYPE_EXTERN_EDGE
+#define XCHAL_INT11_TYPE 	XTHAL_INTTYPE_PROFILING
+#define XCHAL_INT12_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT13_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT14_TYPE 	XTHAL_INTTYPE_NMI
+#define XCHAL_INT15_TYPE 	XTHAL_INTTYPE_TIMER
+#define XCHAL_INT16_TYPE 	XTHAL_INTTYPE_TIMER
+#define XCHAL_INT17_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT18_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT19_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT20_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT21_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT22_TYPE 	XTHAL_INTTYPE_EXTERN_EDGE
+#define XCHAL_INT23_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT24_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT25_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT26_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT27_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT28_TYPE 	XTHAL_INTTYPE_EXTERN_EDGE
+#define XCHAL_INT29_TYPE 	XTHAL_INTTYPE_SOFTWARE
+#define XCHAL_INT30_TYPE 	XTHAL_INTTYPE_EXTERN_EDGE
+#define XCHAL_INT31_TYPE 	XTHAL_INTTYPE_EXTERN_LEVEL
+
+/*  Masks of interrupts for each type of interrupt:  */
+#define XCHAL_INTTYPE_MASK_UNCONFIGURED	0x00000000
+#define XCHAL_INTTYPE_MASK_SOFTWARE	0x20000080
+#define XCHAL_INTTYPE_MASK_EXTERN_EDGE	0x50400400
+#define XCHAL_INTTYPE_MASK_EXTERN_LEVEL	0x8FBE333F
+#define XCHAL_INTTYPE_MASK_TIMER	0x00018040
+#define XCHAL_INTTYPE_MASK_NMI		0x00004000
+#define XCHAL_INTTYPE_MASK_WRITE_ERROR	0x00000000
+#define XCHAL_INTTYPE_MASK_PROFILING	0x00000800
+#define XCHAL_INTTYPE_MASK_IDMA_DONE	0x00000000
+#define XCHAL_INTTYPE_MASK_IDMA_ERR	0x00000000
+#define XCHAL_INTTYPE_MASK_GS_ERR	0x00000000
+
+/*  Interrupt numbers assigned to specific interrupt sources:  */
+#define XCHAL_TIMER0_INTERRUPT		6	/* CCOMPARE0 */
+#define XCHAL_TIMER1_INTERRUPT		15	/* CCOMPARE1 */
+#define XCHAL_TIMER2_INTERRUPT		16	/* CCOMPARE2 */
+#define XCHAL_TIMER3_INTERRUPT		XTHAL_TIMER_UNCONFIGURED
+#define XCHAL_NMI_INTERRUPT		14	/* non-maskable interrupt */
+#define XCHAL_PROFILING_INTERRUPT	11
+
+/*  Interrupt numbers for levels at which only one interrupt is configured:  */
+#define XCHAL_INTLEVEL7_NUM		14
+/*  (There are many interrupts each at level(s) 1, 2, 3, 4, 5.)  */
+
+
+/*
+ *  External interrupt mapping.
+ *  These macros describe how Xtensa processor interrupt numbers
+ *  (as numbered internally, eg. in INTERRUPT and INTENABLE registers)
+ *  map to external BInterrupt<n> pins, for those interrupts
+ *  configured as external (level-triggered, edge-triggered, or NMI).
+ *  See the Xtensa processor databook for more details.
+ */
+
+/*  Core interrupt numbers mapped to each EXTERNAL BInterrupt pin number:  */
+#define XCHAL_EXTINT0_NUM		0	/* (intlevel 1) */
+#define XCHAL_EXTINT1_NUM		1	/* (intlevel 1) */
+#define XCHAL_EXTINT2_NUM		2	/* (intlevel 1) */
+#define XCHAL_EXTINT3_NUM		3	/* (intlevel 1) */
+#define XCHAL_EXTINT4_NUM		4	/* (intlevel 1) */
+#define XCHAL_EXTINT5_NUM		5	/* (intlevel 1) */
+#define XCHAL_EXTINT6_NUM		8	/* (intlevel 1) */
+#define XCHAL_EXTINT7_NUM		9	/* (intlevel 1) */
+#define XCHAL_EXTINT8_NUM		10	/* (intlevel 1) */
+#define XCHAL_EXTINT9_NUM		12	/* (intlevel 1) */
+#define XCHAL_EXTINT10_NUM		13	/* (intlevel 1) */
+#define XCHAL_EXTINT11_NUM		14	/* (intlevel 7) */
+#define XCHAL_EXTINT12_NUM		17	/* (intlevel 1) */
+#define XCHAL_EXTINT13_NUM		18	/* (intlevel 1) */
+#define XCHAL_EXTINT14_NUM		19	/* (intlevel 2) */
+#define XCHAL_EXTINT15_NUM		20	/* (intlevel 2) */
+#define XCHAL_EXTINT16_NUM		21	/* (intlevel 2) */
+#define XCHAL_EXTINT17_NUM		22	/* (intlevel 3) */
+#define XCHAL_EXTINT18_NUM		23	/* (intlevel 3) */
+#define XCHAL_EXTINT19_NUM		24	/* (intlevel 4) */
+#define XCHAL_EXTINT20_NUM		25	/* (intlevel 4) */
+#define XCHAL_EXTINT21_NUM		26	/* (intlevel 5) */
+#define XCHAL_EXTINT22_NUM		27	/* (intlevel 3) */
+#define XCHAL_EXTINT23_NUM		28	/* (intlevel 4) */
+#define XCHAL_EXTINT24_NUM		30	/* (intlevel 4) */
+#define XCHAL_EXTINT25_NUM		31	/* (intlevel 5) */
+/*  EXTERNAL BInterrupt pin numbers mapped to each core interrupt number:  */
+#define XCHAL_INT0_EXTNUM		0	/* (intlevel 1) */
+#define XCHAL_INT1_EXTNUM		1	/* (intlevel 1) */
+#define XCHAL_INT2_EXTNUM		2	/* (intlevel 1) */
+#define XCHAL_INT3_EXTNUM		3	/* (intlevel 1) */
+#define XCHAL_INT4_EXTNUM		4	/* (intlevel 1) */
+#define XCHAL_INT5_EXTNUM		5	/* (intlevel 1) */
+#define XCHAL_INT8_EXTNUM		6	/* (intlevel 1) */
+#define XCHAL_INT9_EXTNUM		7	/* (intlevel 1) */
+#define XCHAL_INT10_EXTNUM		8	/* (intlevel 1) */
+#define XCHAL_INT12_EXTNUM		9	/* (intlevel 1) */
+#define XCHAL_INT13_EXTNUM		10	/* (intlevel 1) */
+#define XCHAL_INT14_EXTNUM		11	/* (intlevel 7) */
+#define XCHAL_INT17_EXTNUM		12	/* (intlevel 1) */
+#define XCHAL_INT18_EXTNUM		13	/* (intlevel 1) */
+#define XCHAL_INT19_EXTNUM		14	/* (intlevel 2) */
+#define XCHAL_INT20_EXTNUM		15	/* (intlevel 2) */
+#define XCHAL_INT21_EXTNUM		16	/* (intlevel 2) */
+#define XCHAL_INT22_EXTNUM		17	/* (intlevel 3) */
+#define XCHAL_INT23_EXTNUM		18	/* (intlevel 3) */
+#define XCHAL_INT24_EXTNUM		19	/* (intlevel 4) */
+#define XCHAL_INT25_EXTNUM		20	/* (intlevel 4) */
+#define XCHAL_INT26_EXTNUM		21	/* (intlevel 5) */
+#define XCHAL_INT27_EXTNUM		22	/* (intlevel 3) */
+#define XCHAL_INT28_EXTNUM		23	/* (intlevel 4) */
+#define XCHAL_INT30_EXTNUM		24	/* (intlevel 4) */
+#define XCHAL_INT31_EXTNUM		25	/* (intlevel 5) */
+
+
+/*----------------------------------------------------------------------
+			EXCEPTIONS and VECTORS
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_XEA_VERSION		2	/* Xtensa Exception Architecture
+						   number: 1 == XEA1 (old)
+							   2 == XEA2 (new)
+							   0 == XEAX (extern) or TX */
+#define XCHAL_HAVE_XEA1			0	/* Exception Architecture 1 */
+#define XCHAL_HAVE_XEA2			1	/* Exception Architecture 2 */
+#define XCHAL_HAVE_XEAX			0	/* External Exception Arch. */
+#define XCHAL_HAVE_EXCEPTIONS		1	/* exception option */
+#define XCHAL_HAVE_HALT			0	/* halt architecture option */
+#define XCHAL_HAVE_BOOTLOADER		0	/* boot loader (for TX) */
+#define XCHAL_HAVE_MEM_ECC_PARITY	0	/* local memory ECC/parity */
+#define XCHAL_HAVE_VECTOR_SELECT	1	/* relocatable vectors */
+#define XCHAL_HAVE_VECBASE		1	/* relocatable vectors */
+#define XCHAL_VECBASE_RESET_VADDR	0x40000000  /* VECBASE reset value */
+#define XCHAL_VECBASE_RESET_PADDR	0x40000000
+#define XCHAL_RESET_VECBASE_OVERLAP	0
+
+#define XCHAL_RESET_VECTOR0_VADDR	0x50000000
+#define XCHAL_RESET_VECTOR0_PADDR	0x50000000
+#define XCHAL_RESET_VECTOR1_VADDR	0x40000400
+#define XCHAL_RESET_VECTOR1_PADDR	0x40000400
+#define XCHAL_RESET_VECTOR_VADDR	0x40000400
+#define XCHAL_RESET_VECTOR_PADDR	0x40000400
+#define XCHAL_USER_VECOFS		0x00000340
+#define XCHAL_USER_VECTOR_VADDR		0x40000340
+#define XCHAL_USER_VECTOR_PADDR		0x40000340
+#define XCHAL_KERNEL_VECOFS		0x00000300
+#define XCHAL_KERNEL_VECTOR_VADDR	0x40000300
+#define XCHAL_KERNEL_VECTOR_PADDR	0x40000300
+#define XCHAL_DOUBLEEXC_VECOFS		0x000003C0
+#define XCHAL_DOUBLEEXC_VECTOR_VADDR	0x400003C0
+#define XCHAL_DOUBLEEXC_VECTOR_PADDR	0x400003C0
+#define XCHAL_WINDOW_OF4_VECOFS		0x00000000
+#define XCHAL_WINDOW_UF4_VECOFS		0x00000040
+#define XCHAL_WINDOW_OF8_VECOFS		0x00000080
+#define XCHAL_WINDOW_UF8_VECOFS		0x000000C0
+#define XCHAL_WINDOW_OF12_VECOFS	0x00000100
+#define XCHAL_WINDOW_UF12_VECOFS	0x00000140
+#define XCHAL_WINDOW_VECTORS_VADDR	0x40000000
+#define XCHAL_WINDOW_VECTORS_PADDR	0x40000000
+#define XCHAL_INTLEVEL2_VECOFS		0x00000180
+#define XCHAL_INTLEVEL2_VECTOR_VADDR	0x40000180
+#define XCHAL_INTLEVEL2_VECTOR_PADDR	0x40000180
+#define XCHAL_INTLEVEL3_VECOFS		0x000001C0
+#define XCHAL_INTLEVEL3_VECTOR_VADDR	0x400001C0
+#define XCHAL_INTLEVEL3_VECTOR_PADDR	0x400001C0
+#define XCHAL_INTLEVEL4_VECOFS		0x00000200
+#define XCHAL_INTLEVEL4_VECTOR_VADDR	0x40000200
+#define XCHAL_INTLEVEL4_VECTOR_PADDR	0x40000200
+#define XCHAL_INTLEVEL5_VECOFS		0x00000240
+#define XCHAL_INTLEVEL5_VECTOR_VADDR	0x40000240
+#define XCHAL_INTLEVEL5_VECTOR_PADDR	0x40000240
+#define XCHAL_INTLEVEL6_VECOFS		0x00000280
+#define XCHAL_INTLEVEL6_VECTOR_VADDR	0x40000280
+#define XCHAL_INTLEVEL6_VECTOR_PADDR	0x40000280
+#define XCHAL_DEBUG_VECOFS		XCHAL_INTLEVEL6_VECOFS
+#define XCHAL_DEBUG_VECTOR_VADDR	XCHAL_INTLEVEL6_VECTOR_VADDR
+#define XCHAL_DEBUG_VECTOR_PADDR	XCHAL_INTLEVEL6_VECTOR_PADDR
+#define XCHAL_NMI_VECOFS		0x000002C0
+#define XCHAL_NMI_VECTOR_VADDR		0x400002C0
+#define XCHAL_NMI_VECTOR_PADDR		0x400002C0
+#define XCHAL_INTLEVEL7_VECOFS		XCHAL_NMI_VECOFS
+#define XCHAL_INTLEVEL7_VECTOR_VADDR	XCHAL_NMI_VECTOR_VADDR
+#define XCHAL_INTLEVEL7_VECTOR_PADDR	XCHAL_NMI_VECTOR_PADDR
+
+
+/*----------------------------------------------------------------------
+				DEBUG MODULE
+  ----------------------------------------------------------------------*/
+
+/*  Misc  */
+#define XCHAL_HAVE_DEBUG_ERI		1	/* ERI to debug module */
+#define XCHAL_HAVE_DEBUG_APB		0	/* APB to debug module */
+#define XCHAL_HAVE_DEBUG_JTAG		1	/* JTAG to debug module */
+
+/*  On-Chip Debug (OCD)  */
+#define XCHAL_HAVE_OCD			1	/* OnChipDebug option */
+#define XCHAL_NUM_IBREAK		2	/* number of IBREAKn regs */
+#define XCHAL_NUM_DBREAK		2	/* number of DBREAKn regs */
+#define XCHAL_HAVE_OCD_DIR_ARRAY	0	/* faster OCD option (to LX4) */
+#define XCHAL_HAVE_OCD_LS32DDR		1	/* L32DDR/S32DDR (faster OCD) */
+
+/*  TRAX (in core)  */
+#define XCHAL_HAVE_TRAX			1	/* TRAX in debug module */
+#define XCHAL_TRAX_MEM_SIZE		16384	/* TRAX memory size in bytes */
+#define XCHAL_TRAX_MEM_SHAREABLE	1	/* start/end regs; ready sig. */
+#define XCHAL_TRAX_ATB_WIDTH		0	/* ATB width (bits), 0=no ATB */
+#define XCHAL_TRAX_TIME_WIDTH		0	/* timestamp bitwidth, 0=none */
+
+/*  Perf counters  */
+#define XCHAL_NUM_PERF_COUNTERS		2	/* performance counters */
+
+
+/*----------------------------------------------------------------------
+				MMU
+  ----------------------------------------------------------------------*/
+
+/*  See core-matmap.h header file for more details.  */
+
+#define XCHAL_HAVE_TLBS			1	/* inverse of HAVE_CACHEATTR */
+#define XCHAL_HAVE_SPANNING_WAY		1	/* one way maps I+D 4GB vaddr */
+#define XCHAL_SPANNING_WAY		0	/* TLB spanning way number */
+#define XCHAL_HAVE_IDENTITY_MAP		1	/* vaddr == paddr always */
+#define XCHAL_HAVE_CACHEATTR		0	/* CACHEATTR register present */
+#define XCHAL_HAVE_MIMIC_CACHEATTR	1	/* region protection */
+#define XCHAL_HAVE_XLT_CACHEATTR	0	/* region prot. w/translation */
+#define XCHAL_HAVE_PTP_MMU		0	/* full MMU (with page table
+						   [autorefill] and protection)
+						   usable for an MMU-based OS */
+
+/*  If none of the above last 5 are set, it's a custom TLB configuration.  */
+
+#define XCHAL_MMU_ASID_BITS		0	/* number of bits in ASIDs */
+#define XCHAL_MMU_RINGS			1	/* number of rings (1..4) */
+#define XCHAL_MMU_RING_BITS		0	/* num of bits in RING field */
+
+/*----------------------------------------------------------------------
+				MPU
+  ----------------------------------------------------------------------*/
+#define XCHAL_HAVE_MPU			0
+#define XCHAL_MPU_ENTRIES		0
+
+#define XCHAL_MPU_ALIGN_REQ		1	/* MPU requires alignment of entries to background map */
+#define XCHAL_MPU_BACKGROUND_ENTRIES	0	/* number of entries in bg map*/
+#define XCHAL_MPU_BG_CACHEADRDIS	0	/* default CACHEADRDIS for bg */
+
+#define XCHAL_MPU_ALIGN_BITS		0
+#define XCHAL_MPU_ALIGN			0
+
+#endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */
+
+
+#endif /* _XTENSA_CORE_CONFIGURATION_H */
diff --git a/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/core-matmap.h b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/core-matmap.h
new file mode 100644
index 00000000000..0a3d5de487a
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/core-matmap.h
@@ -0,0 +1,321 @@
+/*
+ * xtensa/config/core-matmap.h -- Memory access and translation mapping
+ *	parameters (CHAL) of the Xtensa processor core configuration.
+ *
+ *  If you are using Xtensa Tools, see <xtensa/config/core.h> (which includes
+ *  this file) for more details.
+ *
+ *  In the Xtensa processor products released to date, all parameters
+ *  defined in this file are derivable (at least in theory) from
+ *  information contained in the core-isa.h header file.
+ *  In particular, the following core configuration parameters are relevant:
+ *	XCHAL_HAVE_CACHEATTR
+ *	XCHAL_HAVE_MIMIC_CACHEATTR
+ *	XCHAL_HAVE_XLT_CACHEATTR
+ *	XCHAL_HAVE_PTP_MMU
+ *	XCHAL_ITLB_ARF_ENTRIES_LOG2
+ *	XCHAL_DTLB_ARF_ENTRIES_LOG2
+ *	XCHAL_DCACHE_IS_WRITEBACK
+ *	XCHAL_ICACHE_SIZE		(presence of I-cache)
+ *	XCHAL_DCACHE_SIZE		(presence of D-cache)
+ *	XCHAL_HW_VERSION_MAJOR
+ *	XCHAL_HW_VERSION_MINOR
+ */
+
+/* Customer ID=15128; Build=0x90f1f; Copyright (c) 1999-2021 Tensilica Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
+
+
+#ifndef XTENSA_CONFIG_CORE_MATMAP_H
+#define XTENSA_CONFIG_CORE_MATMAP_H
+
+
+/*----------------------------------------------------------------------
+			CACHE (MEMORY ACCESS) ATTRIBUTES
+  ----------------------------------------------------------------------*/
+
+
+
+/*  Cache Attribute encodings -- lists of access modes for each cache attribute:  */
+#define XCHAL_FCA_LIST		XTHAL_FAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_FAM_BYPASS	XCHAL_SEP \
+				XTHAL_FAM_BYPASS	XCHAL_SEP \
+				XTHAL_FAM_BYPASS	XCHAL_SEP \
+				XTHAL_FAM_BYPASS	XCHAL_SEP \
+				XTHAL_FAM_BYPASS	XCHAL_SEP \
+				XTHAL_FAM_BYPASS	XCHAL_SEP \
+				XTHAL_FAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_FAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_FAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_FAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_FAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_FAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_FAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_FAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_FAM_EXCEPTION
+#define XCHAL_LCA_LIST		XTHAL_LAM_BYPASSG	XCHAL_SEP \
+				XTHAL_LAM_BYPASSG	XCHAL_SEP \
+				XTHAL_LAM_BYPASSG	XCHAL_SEP \
+				XTHAL_LAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_LAM_BYPASSG	XCHAL_SEP \
+				XTHAL_LAM_BYPASSG	XCHAL_SEP \
+				XTHAL_LAM_BYPASSG	XCHAL_SEP \
+				XTHAL_LAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_LAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_LAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_LAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_LAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_LAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_LAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_LAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_LAM_EXCEPTION
+#define XCHAL_SCA_LIST		XTHAL_SAM_BYPASS	XCHAL_SEP \
+				XTHAL_SAM_BYPASS	XCHAL_SEP \
+				XTHAL_SAM_BYPASS	XCHAL_SEP \
+				XTHAL_SAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_SAM_BYPASS	XCHAL_SEP \
+				XTHAL_SAM_BYPASS	XCHAL_SEP \
+				XTHAL_SAM_BYPASS	XCHAL_SEP \
+				XTHAL_SAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_SAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_SAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_SAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_SAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_SAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_SAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_SAM_EXCEPTION	XCHAL_SEP \
+				XTHAL_SAM_EXCEPTION
+
+#define XCHAL_CA_R   (0xC0 | 0x40000000)
+#define XCHAL_CA_RX  (0xD0 | 0x40000000)
+#define XCHAL_CA_RW  (0xE0 | 0x40000000)
+#define XCHAL_CA_RWX (0xF0 | 0x40000000)
+
+/*
+ *  Specific encoded cache attribute values of general interest.
+ *  If a specific cache mode is not available, the closest available
+ *  one is returned instead (eg. writethru instead of writeback,
+ *  bypass instead of writethru).
+ */
+#define XCHAL_CA_BYPASS  		2	/* cache disabled (bypassed) mode */
+#define XCHAL_CA_BYPASSBUF  		6	/* cache disabled (bypassed) bufferable mode */
+#define XCHAL_CA_WRITETHRU		1	/* cache enabled (write-through) mode */
+#define XCHAL_CA_WRITEBACK		2	/* cache enabled (write-back) mode */
+#define XCHAL_HAVE_CA_WRITEBACK_NOALLOC	0	/* write-back no-allocate availability */
+#define XCHAL_CA_WRITEBACK_NOALLOC	2	/* cache enabled (write-back no-allocate) mode */
+#define XCHAL_CA_BYPASS_RW  		0	/* cache disabled (bypassed) mode (no exec) */
+#define XCHAL_CA_WRITETHRU_RW		0	/* cache enabled (write-through) mode (no exec) (FALLBACK) */
+#define XCHAL_CA_WRITEBACK_RW		0	/* cache enabled (write-back) mode (no exec) */
+#define XCHAL_CA_WRITEBACK_NOALLOC_RW	0	/* cache enabled (write-back no-allocate) mode (no exec) */
+#define XCHAL_CA_ILLEGAL		15	/* no access allowed (all cause exceptions) mode */
+#define XCHAL_CA_ISOLATE		0	/* cache isolate (accesses go to cache not memory) mode */
+
+/*----------------------------------------------------------------------
+				MMU
+  ----------------------------------------------------------------------*/
+
+/*
+ *  General notes on MMU parameters.
+ *
+ *  Terminology:
+ *	ASID = address-space ID (acts as an "extension" of virtual addresses)
+ *	VPN  = virtual page number
+ *	PPN  = physical page number
+ *	CA   = encoded cache attribute (access modes)
+ *	TLB  = translation look-aside buffer (term is stretched somewhat here)
+ *	I    = instruction (fetch accesses)
+ *	D    = data (load and store accesses)
+ *	way  = each TLB (ITLB and DTLB) consists of a number of "ways"
+ *		that simultaneously match the virtual address of an access;
+ *		a TLB successfully translates a virtual address if exactly
+ *		one way matches the vaddr; if none match, it is a miss;
+ *		if multiple match, one gets a "multihit" exception;
+ *		each way can be independently configured in terms of number of
+ *		entries, page sizes, which fields are writable or constant, etc.
+ *	set  = group of contiguous ways with exactly identical parameters
+ *	ARF  = auto-refill; hardware services a 1st-level miss by loading a PTE
+ *		from the page table and storing it in one of the auto-refill ways;
+ *		if this PTE load also misses, a miss exception is posted for s/w.
+ *	min-wired = a "min-wired" way can be used to map a single (minimum-sized)
+ * 		page arbitrarily under program control; it has a single entry,
+ *		is non-auto-refill (some other way(s) must be auto-refill),
+ *		all its fields (VPN, PPN, ASID, CA) are all writable, and it
+ *		supports the XCHAL_MMU_MIN_PTE_PAGE_SIZE page size (a current
+ *		restriction is that this be the only page size it supports).
+ *
+ *  TLB way entries are virtually indexed.
+ *  TLB ways that support multiple page sizes:
+ *	- must have all writable VPN and PPN fields;
+ *	- can only use one page size at any given time (eg. setup at startup),
+ *	  selected by the respective ITLBCFG or DTLBCFG special register,
+ *	  whose bits n*4+3 .. n*4 index the list of page sizes for way n
+ *	  (XCHAL_xTLB_SETm_PAGESZ_LOG2_LIST for set m corresponding to way n);
+ *	  this list may be sparse for auto-refill ways because auto-refill
+ *	  ways have independent lists of supported page sizes sharing a
+ *	  common encoding with PTE entries; the encoding is the index into
+ *	  this list; unsupported sizes for a given way are zero in the list;
+ *	  selecting unsupported sizes results in undefine hardware behaviour;
+ *	- is only possible for ways 0 thru 7 (due to ITLBCFG/DTLBCFG definition).
+ */
+
+#define XCHAL_MMU_ASID_INVALID		0	/* ASID value indicating invalid address space */
+#define XCHAL_MMU_ASID_KERNEL		0	/* ASID value indicating kernel (ring 0) address space */
+#define XCHAL_MMU_SR_BITS		0	/* number of size-restriction bits supported */
+#define XCHAL_MMU_CA_BITS		4	 /* number of bits needed to hold cache attribute encoding */
+#define XCHAL_MMU_MAX_PTE_PAGE_SIZE	29	/* max page size in a PTE structure (log2) */
+#define XCHAL_MMU_MIN_PTE_PAGE_SIZE	29	/* min page size in a PTE structure (log2) */
+
+
+/***  Instruction TLB:  ***/
+
+#define XCHAL_ITLB_WAY_BITS		0	/* number of bits holding the ways */
+#define XCHAL_ITLB_WAYS			1	/* number of ways (n-way set-associative TLB) */
+#define XCHAL_ITLB_ARF_WAYS		0	/* number of auto-refill ways */
+#define XCHAL_ITLB_SETS			1	/* number of sets (groups of ways with identical settings) */
+
+/*  Way set to which each way belongs:  */
+#define XCHAL_ITLB_WAY0_SET		0
+
+/*  Ways sets that are used by hardware auto-refill (ARF):  */
+#define XCHAL_ITLB_ARF_SETS		0	/* number of auto-refill sets */
+
+/*  Way sets that are "min-wired" (see terminology comment above):  */
+#define XCHAL_ITLB_MINWIRED_SETS	0	/* number of "min-wired" sets */
+
+
+/*  ITLB way set 0 (group of ways 0 thru 0):  */
+#define XCHAL_ITLB_SET0_WAY			0	/* index of first way in this way set */
+#define XCHAL_ITLB_SET0_WAYS			1	/* number of (contiguous) ways in this way set */
+#define XCHAL_ITLB_SET0_ENTRIES_LOG2		3	/* log2(number of entries in this way) */
+#define XCHAL_ITLB_SET0_ENTRIES			8	/* number of entries in this way (always a power of 2) */
+#define XCHAL_ITLB_SET0_ARF			0	/* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */
+#define XCHAL_ITLB_SET0_PAGESIZES		1	/* number of supported page sizes in this way */
+#define XCHAL_ITLB_SET0_PAGESZ_BITS		0	/* number of bits to encode the page size */
+#define XCHAL_ITLB_SET0_PAGESZ_LOG2_MIN		29	/* log2(minimum supported page size) */
+#define XCHAL_ITLB_SET0_PAGESZ_LOG2_MAX		29	/* log2(maximum supported page size) */
+#define XCHAL_ITLB_SET0_PAGESZ_LOG2_LIST	29	/* list of log2(page size)s, separated by XCHAL_SEP;
+							   2^PAGESZ_BITS entries in list, unsupported entries are zero */
+#define XCHAL_ITLB_SET0_ASID_CONSTMASK		0	/* constant ASID bits; 0 if all writable */
+#define XCHAL_ITLB_SET0_VPN_CONSTMASK		0x00000000	/* constant VPN bits, not including entry index bits; 0 if all writable */
+#define XCHAL_ITLB_SET0_PPN_CONSTMASK		0xE0000000	/* constant PPN bits, including entry index bits; 0 if all writable */
+#define XCHAL_ITLB_SET0_CA_CONSTMASK		0	/* constant CA bits; 0 if all writable */
+#define XCHAL_ITLB_SET0_ASID_RESET		0	/* 1 if ASID reset values defined (and all writable); 0 otherwise */
+#define XCHAL_ITLB_SET0_VPN_RESET		0	/* 1 if VPN reset values defined (and all writable); 0 otherwise */
+#define XCHAL_ITLB_SET0_PPN_RESET		0	/* 1 if PPN reset values defined (and all writable); 0 otherwise */
+#define XCHAL_ITLB_SET0_CA_RESET		1	/* 1 if CA reset values defined (and all writable); 0 otherwise */
+/*  Constant VPN values for each entry of ITLB way set 0 (because VPN_CONSTMASK is non-zero):  */
+#define XCHAL_ITLB_SET0_E0_VPN_CONST		0x00000000
+#define XCHAL_ITLB_SET0_E1_VPN_CONST		0x20000000
+#define XCHAL_ITLB_SET0_E2_VPN_CONST		0x40000000
+#define XCHAL_ITLB_SET0_E3_VPN_CONST		0x60000000
+#define XCHAL_ITLB_SET0_E4_VPN_CONST		0x80000000
+#define XCHAL_ITLB_SET0_E5_VPN_CONST		0xA0000000
+#define XCHAL_ITLB_SET0_E6_VPN_CONST		0xC0000000
+#define XCHAL_ITLB_SET0_E7_VPN_CONST		0xE0000000
+/*  Constant PPN values for each entry of ITLB way set 0 (because PPN_CONSTMASK is non-zero):  */
+#define XCHAL_ITLB_SET0_E0_PPN_CONST		0x00000000
+#define XCHAL_ITLB_SET0_E1_PPN_CONST		0x20000000
+#define XCHAL_ITLB_SET0_E2_PPN_CONST		0x40000000
+#define XCHAL_ITLB_SET0_E3_PPN_CONST		0x60000000
+#define XCHAL_ITLB_SET0_E4_PPN_CONST		0x80000000
+#define XCHAL_ITLB_SET0_E5_PPN_CONST		0xA0000000
+#define XCHAL_ITLB_SET0_E6_PPN_CONST		0xC0000000
+#define XCHAL_ITLB_SET0_E7_PPN_CONST		0xE0000000
+/*  Reset CA values for each entry of ITLB way set 0 (because SET0_CA_RESET is non-zero):  */
+#define XCHAL_ITLB_SET0_E0_CA_RESET		0x02
+#define XCHAL_ITLB_SET0_E1_CA_RESET		0x02
+#define XCHAL_ITLB_SET0_E2_CA_RESET		0x02
+#define XCHAL_ITLB_SET0_E3_CA_RESET		0x02
+#define XCHAL_ITLB_SET0_E4_CA_RESET		0x02
+#define XCHAL_ITLB_SET0_E5_CA_RESET		0x02
+#define XCHAL_ITLB_SET0_E6_CA_RESET		0x02
+#define XCHAL_ITLB_SET0_E7_CA_RESET		0x02
+
+
+/***  Data TLB:  ***/
+
+#define XCHAL_DTLB_WAY_BITS		0	/* number of bits holding the ways */
+#define XCHAL_DTLB_WAYS			1	/* number of ways (n-way set-associative TLB) */
+#define XCHAL_DTLB_ARF_WAYS		0	/* number of auto-refill ways */
+#define XCHAL_DTLB_SETS			1	/* number of sets (groups of ways with identical settings) */
+
+/*  Way set to which each way belongs:  */
+#define XCHAL_DTLB_WAY0_SET		0
+
+/*  Ways sets that are used by hardware auto-refill (ARF):  */
+#define XCHAL_DTLB_ARF_SETS		0	/* number of auto-refill sets */
+
+/*  Way sets that are "min-wired" (see terminology comment above):  */
+#define XCHAL_DTLB_MINWIRED_SETS	0	/* number of "min-wired" sets */
+
+
+/*  DTLB way set 0 (group of ways 0 thru 0):  */
+#define XCHAL_DTLB_SET0_WAY			0	/* index of first way in this way set */
+#define XCHAL_DTLB_SET0_WAYS			1	/* number of (contiguous) ways in this way set */
+#define XCHAL_DTLB_SET0_ENTRIES_LOG2		3	/* log2(number of entries in this way) */
+#define XCHAL_DTLB_SET0_ENTRIES			8	/* number of entries in this way (always a power of 2) */
+#define XCHAL_DTLB_SET0_ARF			0	/* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */
+#define XCHAL_DTLB_SET0_PAGESIZES		1	/* number of supported page sizes in this way */
+#define XCHAL_DTLB_SET0_PAGESZ_BITS		0	/* number of bits to encode the page size */
+#define XCHAL_DTLB_SET0_PAGESZ_LOG2_MIN		29	/* log2(minimum supported page size) */
+#define XCHAL_DTLB_SET0_PAGESZ_LOG2_MAX		29	/* log2(maximum supported page size) */
+#define XCHAL_DTLB_SET0_PAGESZ_LOG2_LIST	29	/* list of log2(page size)s, separated by XCHAL_SEP;
+							   2^PAGESZ_BITS entries in list, unsupported entries are zero */
+#define XCHAL_DTLB_SET0_ASID_CONSTMASK		0	/* constant ASID bits; 0 if all writable */
+#define XCHAL_DTLB_SET0_VPN_CONSTMASK		0x00000000	/* constant VPN bits, not including entry index bits; 0 if all writable */
+#define XCHAL_DTLB_SET0_PPN_CONSTMASK		0xE0000000	/* constant PPN bits, including entry index bits; 0 if all writable */
+#define XCHAL_DTLB_SET0_CA_CONSTMASK		0	/* constant CA bits; 0 if all writable */
+#define XCHAL_DTLB_SET0_ASID_RESET		0	/* 1 if ASID reset values defined (and all writable); 0 otherwise */
+#define XCHAL_DTLB_SET0_VPN_RESET		0	/* 1 if VPN reset values defined (and all writable); 0 otherwise */
+#define XCHAL_DTLB_SET0_PPN_RESET		0	/* 1 if PPN reset values defined (and all writable); 0 otherwise */
+#define XCHAL_DTLB_SET0_CA_RESET		1	/* 1 if CA reset values defined (and all writable); 0 otherwise */
+/*  Constant VPN values for each entry of DTLB way set 0 (because VPN_CONSTMASK is non-zero):  */
+#define XCHAL_DTLB_SET0_E0_VPN_CONST		0x00000000
+#define XCHAL_DTLB_SET0_E1_VPN_CONST		0x20000000
+#define XCHAL_DTLB_SET0_E2_VPN_CONST		0x40000000
+#define XCHAL_DTLB_SET0_E3_VPN_CONST		0x60000000
+#define XCHAL_DTLB_SET0_E4_VPN_CONST		0x80000000
+#define XCHAL_DTLB_SET0_E5_VPN_CONST		0xA0000000
+#define XCHAL_DTLB_SET0_E6_VPN_CONST		0xC0000000
+#define XCHAL_DTLB_SET0_E7_VPN_CONST		0xE0000000
+/*  Constant PPN values for each entry of DTLB way set 0 (because PPN_CONSTMASK is non-zero):  */
+#define XCHAL_DTLB_SET0_E0_PPN_CONST		0x00000000
+#define XCHAL_DTLB_SET0_E1_PPN_CONST		0x20000000
+#define XCHAL_DTLB_SET0_E2_PPN_CONST		0x40000000
+#define XCHAL_DTLB_SET0_E3_PPN_CONST		0x60000000
+#define XCHAL_DTLB_SET0_E4_PPN_CONST		0x80000000
+#define XCHAL_DTLB_SET0_E5_PPN_CONST		0xA0000000
+#define XCHAL_DTLB_SET0_E6_PPN_CONST		0xC0000000
+#define XCHAL_DTLB_SET0_E7_PPN_CONST		0xE0000000
+/*  Reset CA values for each entry of DTLB way set 0 (because SET0_CA_RESET is non-zero):  */
+#define XCHAL_DTLB_SET0_E0_CA_RESET		0x02
+#define XCHAL_DTLB_SET0_E1_CA_RESET		0x02
+#define XCHAL_DTLB_SET0_E2_CA_RESET		0x02
+#define XCHAL_DTLB_SET0_E3_CA_RESET		0x02
+#define XCHAL_DTLB_SET0_E4_CA_RESET		0x02
+#define XCHAL_DTLB_SET0_E5_CA_RESET		0x02
+#define XCHAL_DTLB_SET0_E6_CA_RESET		0x02
+#define XCHAL_DTLB_SET0_E7_CA_RESET		0x02
+
+
+
+
+#endif /*XTENSA_CONFIG_CORE_MATMAP_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/core.h b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/core.h
new file mode 100644
index 00000000000..7979f0c4ada
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/core.h
@@ -0,0 +1,1407 @@
+/*
+ * xtensa/config/core.h -- HAL definitions dependent on CORE configuration
+ *
+ *  This header file is sometimes referred to as the "compile-time HAL" or CHAL.
+ *  It pulls definitions tailored for a specific Xtensa processor configuration.
+ *
+ *  Sources for binaries meant to be configuration-independent generally avoid
+ *  including this file (they may use the configuration-specific HAL library).
+ *  It is normal for the HAL library source itself to include this file.
+ */
+
+/*
+ * Copyright (c) 2005-2015 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#ifndef XTENSA_CONFIG_CORE_H
+#define XTENSA_CONFIG_CORE_H
+
+/*  CONFIGURATION INDEPENDENT DEFINITIONS:  */
+#ifdef __XTENSA__
+#include <xtensa/hal.h>
+#include <xtensa/xtensa-versions.h>
+#else
+#include "../hal.h"
+#include "../xtensa-versions.h"
+#endif
+
+/*  CONFIGURATION SPECIFIC DEFINITIONS:  */
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+#include <xtensa/config/tie.h>
+#else
+#include "core-isa.h"
+#include "core-matmap.h"
+#include "tie.h"
+#endif
+
+#if defined (_ASMLANGUAGE) || defined (__ASSEMBLER__)
+#ifdef __XTENSA__
+#include <xtensa/config/tie-asm.h>
+#else
+#include "tie-asm.h"
+#endif
+#endif /*_ASMLANGUAGE or __ASSEMBLER__*/
+
+
+/*----------------------------------------------------------------------
+                GENERAL
+  ----------------------------------------------------------------------*/
+
+/*
+ *  Separators for macros that expand into arrays.
+ *  These can be predefined by files that #include this one,
+ *  when different separators are required.
+ */
+/*  Element separator for macros that expand into 1-dimensional arrays:  */
+#ifndef XCHAL_SEP
+#define XCHAL_SEP           ,
+#endif
+/*  Array separator for macros that expand into 2-dimensional arrays:  */
+#ifndef XCHAL_SEP2
+#define XCHAL_SEP2          },{
+#endif
+
+
+/*----------------------------------------------------------------------
+                                ERRATA
+  ----------------------------------------------------------------------*/
+
+/*
+ *  Erratum T1020.H13, T1030.H7, T1040.H10, T1050.H4 (fixed in T1040.3 and T1050.1;
+ *  relevant only in XEA1, kernel-vector mode, level-one interrupts and overflows enabled):
+ */
+#define XCHAL_MAYHAVE_ERRATUM_XEA1KWIN  (XCHAL_HAVE_XEA1 && \
+                                         (XCHAL_HW_RELEASE_AT_OR_BELOW(1040,2) != 0 \
+                                          || XCHAL_HW_RELEASE_AT(1050,0)))
+/*
+ *  Erratum 453 present in RE-2013.2 up to RF-2014.0, fixed in RF-2014.1.
+ *  Applies to specific set of configuration options.
+ *  Part of the workaround is to add ISYNC at certain points in the code.
+ *  The workaround gated by this macro can be disabled if not needed, e.g. if
+ *  zero-overhead loop buffer will be disabled, by defining _NO_ERRATUM_453.
+ */
+#if (   XCHAL_HW_MAX_VERSION >= XTENSA_HWVERSION_RE_2013_2 && \
+        XCHAL_HW_MIN_VERSION <= XTENSA_HWVERSION_RF_2014_0 && \
+        XCHAL_ICACHE_SIZE != 0    && XCHAL_HAVE_PIF /*covers also AXI/AHB*/ && \
+        XCHAL_HAVE_LOOPS          && XCHAL_LOOP_BUFFER_SIZE != 0 && \
+        XCHAL_CLOCK_GATING_GLOBAL && !defined(_NO_ERRATUM_453) )
+#define XCHAL_ERRATUM_453       1
+#else
+#define XCHAL_ERRATUM_453       0
+#endif
+
+/*
+ *  Erratum 497 present in RE-2012.2 up to RG/RF-2015.2
+ *  Applies to specific set of configuration options.
+ *  Workaround is to add MEMWs after at most 8 cache WB instructions
+ */
+#if ( ((XCHAL_HW_MAX_VERSION >= XTENSA_HWVERSION_RE_2012_0 &&    \
+        XCHAL_HW_MIN_VERSION <= XTENSA_HWVERSION_RF_2015_2) ||   \
+       (XCHAL_HW_MAX_VERSION >= XTENSA_HWVERSION_RG_2015_0 &&    \
+        XCHAL_HW_MIN_VERSION <= XTENSA_HWVERSION_RG_2015_2)     \
+      ) && \
+      XCHAL_DCACHE_IS_WRITEBACK && \
+      XCHAL_HAVE_AXI && \
+      XCHAL_HAVE_PIF_WR_RESP && \
+      XCHAL_HAVE_PIF_REQ_ATTR &&  !defined(_NO_ERRATUM_497) \
+    )
+#define XCHAL_ERRATUM_497       1
+#else
+#define XCHAL_ERRATUM_497       0
+#endif
+
+
+/*----------------------------------------------------------------------
+                ISA
+  ----------------------------------------------------------------------*/
+
+#if XCHAL_HAVE_BE
+# define XCHAL_HAVE_LE          0
+# define XCHAL_MEMORY_ORDER     XTHAL_BIGENDIAN
+#else
+# define XCHAL_HAVE_LE          1
+# define XCHAL_MEMORY_ORDER     XTHAL_LITTLEENDIAN
+#endif
+
+
+
+/*----------------------------------------------------------------------
+                INTERRUPTS
+  ----------------------------------------------------------------------*/
+
+/*  Indexing macros:  */
+#define _XCHAL_INTLEVEL_MASK(n)     XCHAL_INTLEVEL ## n ## _MASK
+#define XCHAL_INTLEVEL_MASK(n)      _XCHAL_INTLEVEL_MASK(n)     /* n = 0 .. 15 */
+#define _XCHAL_INTLEVEL_ANDBELOWMASK(n) XCHAL_INTLEVEL ## n ## _ANDBELOW_MASK
+#define XCHAL_INTLEVEL_ANDBELOW_MASK(n) _XCHAL_INTLEVEL_ANDBELOWMASK(n) /* n = 0 .. 15 */
+#define _XCHAL_INTLEVEL_NUM(n)      XCHAL_INTLEVEL ## n ## _NUM
+#define XCHAL_INTLEVEL_NUM(n)       _XCHAL_INTLEVEL_NUM(n)      /* n = 0 .. 15 */
+#define _XCHAL_INT_LEVEL(n)     XCHAL_INT ## n ## _LEVEL
+#define XCHAL_INT_LEVEL(n)      _XCHAL_INT_LEVEL(n)     /* n = 0 .. 31 */
+#define _XCHAL_INT_TYPE(n)      XCHAL_INT ## n ## _TYPE
+#define XCHAL_INT_TYPE(n)       _XCHAL_INT_TYPE(n)      /* n = 0 .. 31 */
+#define _XCHAL_TIMER_INTERRUPT(n)   XCHAL_TIMER ## n ## _INTERRUPT
+#define XCHAL_TIMER_INTERRUPT(n)    _XCHAL_TIMER_INTERRUPT(n)   /* n = 0 .. 3 */
+
+
+#define XCHAL_HAVE_HIGHLEVEL_INTERRUPTS XCHAL_HAVE_HIGHPRI_INTERRUPTS
+#define XCHAL_NUM_LOWPRI_LEVELS     1           /* number of low-priority interrupt levels (always 1) */
+#define XCHAL_FIRST_HIGHPRI_LEVEL   (XCHAL_NUM_LOWPRI_LEVELS+1) /* level of first high-priority interrupt (always 2) */
+/*  Note:  1 <= LOWPRI_LEVELS <= EXCM_LEVEL < DEBUGLEVEL <= NUM_INTLEVELS < NMILEVEL <= 15  */
+
+/*  These values are constant for existing Xtensa processor implementations:  */
+#define XCHAL_INTLEVEL0_MASK        0x00000000
+#define XCHAL_INTLEVEL8_MASK        0x00000000
+#define XCHAL_INTLEVEL9_MASK        0x00000000
+#define XCHAL_INTLEVEL10_MASK       0x00000000
+#define XCHAL_INTLEVEL11_MASK       0x00000000
+#define XCHAL_INTLEVEL12_MASK       0x00000000
+#define XCHAL_INTLEVEL13_MASK       0x00000000
+#define XCHAL_INTLEVEL14_MASK       0x00000000
+#define XCHAL_INTLEVEL15_MASK       0x00000000
+
+/*  Array of masks of interrupts at each interrupt level:  */
+#define XCHAL_INTLEVEL_MASKS        XCHAL_INTLEVEL0_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL1_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL2_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL3_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL4_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL5_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL6_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL7_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL8_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL9_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL10_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL11_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL12_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL13_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL14_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL15_MASK
+
+/*  These values are constant for existing Xtensa processor implementations:  */
+#define XCHAL_INTLEVEL0_ANDBELOW_MASK   0x00000000
+#define XCHAL_INTLEVEL8_ANDBELOW_MASK   XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL9_ANDBELOW_MASK   XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL10_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL11_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL12_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL13_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL14_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL15_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+
+/*  Mask of all low-priority interrupts:  */
+#define XCHAL_LOWPRI_MASK       XCHAL_INTLEVEL1_ANDBELOW_MASK
+
+/*  Mask of all interrupts masked by PS.EXCM (or CEXCM):  */
+#define XCHAL_EXCM_MASK         XCHAL_INTLEVEL_ANDBELOW_MASK(XCHAL_EXCM_LEVEL)
+
+/*  Array of masks of interrupts at each range 1..n of interrupt levels:  */
+#define XCHAL_INTLEVEL_ANDBELOW_MASKS   XCHAL_INTLEVEL0_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL1_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL2_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL3_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL4_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL5_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL6_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL7_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL8_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL9_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL10_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL11_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL12_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL13_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL14_ANDBELOW_MASK \
+            XCHAL_SEP   XCHAL_INTLEVEL15_ANDBELOW_MASK
+
+#if 0 /*XCHAL_HAVE_NMI*/
+/*  NMI "interrupt level" (for use with EXCSAVE_n, EPS_n, EPC_n, RFI n):  */
+# define XCHAL_NMILEVEL     (XCHAL_NUM_INTLEVELS+1)
+#endif
+
+/*  Array of levels of each possible interrupt:  */
+#define XCHAL_INT_LEVELS        XCHAL_INT0_LEVEL \
+            XCHAL_SEP   XCHAL_INT1_LEVEL \
+            XCHAL_SEP   XCHAL_INT2_LEVEL \
+            XCHAL_SEP   XCHAL_INT3_LEVEL \
+            XCHAL_SEP   XCHAL_INT4_LEVEL \
+            XCHAL_SEP   XCHAL_INT5_LEVEL \
+            XCHAL_SEP   XCHAL_INT6_LEVEL \
+            XCHAL_SEP   XCHAL_INT7_LEVEL \
+            XCHAL_SEP   XCHAL_INT8_LEVEL \
+            XCHAL_SEP   XCHAL_INT9_LEVEL \
+            XCHAL_SEP   XCHAL_INT10_LEVEL \
+            XCHAL_SEP   XCHAL_INT11_LEVEL \
+            XCHAL_SEP   XCHAL_INT12_LEVEL \
+            XCHAL_SEP   XCHAL_INT13_LEVEL \
+            XCHAL_SEP   XCHAL_INT14_LEVEL \
+            XCHAL_SEP   XCHAL_INT15_LEVEL \
+            XCHAL_SEP   XCHAL_INT16_LEVEL \
+            XCHAL_SEP   XCHAL_INT17_LEVEL \
+            XCHAL_SEP   XCHAL_INT18_LEVEL \
+            XCHAL_SEP   XCHAL_INT19_LEVEL \
+            XCHAL_SEP   XCHAL_INT20_LEVEL \
+            XCHAL_SEP   XCHAL_INT21_LEVEL \
+            XCHAL_SEP   XCHAL_INT22_LEVEL \
+            XCHAL_SEP   XCHAL_INT23_LEVEL \
+            XCHAL_SEP   XCHAL_INT24_LEVEL \
+            XCHAL_SEP   XCHAL_INT25_LEVEL \
+            XCHAL_SEP   XCHAL_INT26_LEVEL \
+            XCHAL_SEP   XCHAL_INT27_LEVEL \
+            XCHAL_SEP   XCHAL_INT28_LEVEL \
+            XCHAL_SEP   XCHAL_INT29_LEVEL \
+            XCHAL_SEP   XCHAL_INT30_LEVEL \
+            XCHAL_SEP   XCHAL_INT31_LEVEL
+
+/*  Array of types of each possible interrupt:  */
+#define XCHAL_INT_TYPES         XCHAL_INT0_TYPE \
+            XCHAL_SEP   XCHAL_INT1_TYPE \
+            XCHAL_SEP   XCHAL_INT2_TYPE \
+            XCHAL_SEP   XCHAL_INT3_TYPE \
+            XCHAL_SEP   XCHAL_INT4_TYPE \
+            XCHAL_SEP   XCHAL_INT5_TYPE \
+            XCHAL_SEP   XCHAL_INT6_TYPE \
+            XCHAL_SEP   XCHAL_INT7_TYPE \
+            XCHAL_SEP   XCHAL_INT8_TYPE \
+            XCHAL_SEP   XCHAL_INT9_TYPE \
+            XCHAL_SEP   XCHAL_INT10_TYPE \
+            XCHAL_SEP   XCHAL_INT11_TYPE \
+            XCHAL_SEP   XCHAL_INT12_TYPE \
+            XCHAL_SEP   XCHAL_INT13_TYPE \
+            XCHAL_SEP   XCHAL_INT14_TYPE \
+            XCHAL_SEP   XCHAL_INT15_TYPE \
+            XCHAL_SEP   XCHAL_INT16_TYPE \
+            XCHAL_SEP   XCHAL_INT17_TYPE \
+            XCHAL_SEP   XCHAL_INT18_TYPE \
+            XCHAL_SEP   XCHAL_INT19_TYPE \
+            XCHAL_SEP   XCHAL_INT20_TYPE \
+            XCHAL_SEP   XCHAL_INT21_TYPE \
+            XCHAL_SEP   XCHAL_INT22_TYPE \
+            XCHAL_SEP   XCHAL_INT23_TYPE \
+            XCHAL_SEP   XCHAL_INT24_TYPE \
+            XCHAL_SEP   XCHAL_INT25_TYPE \
+            XCHAL_SEP   XCHAL_INT26_TYPE \
+            XCHAL_SEP   XCHAL_INT27_TYPE \
+            XCHAL_SEP   XCHAL_INT28_TYPE \
+            XCHAL_SEP   XCHAL_INT29_TYPE \
+            XCHAL_SEP   XCHAL_INT30_TYPE \
+            XCHAL_SEP   XCHAL_INT31_TYPE
+
+/*  Array of masks of interrupts for each type of interrupt:  */
+#define XCHAL_INTTYPE_MASKS     XCHAL_INTTYPE_MASK_UNCONFIGURED \
+            XCHAL_SEP   XCHAL_INTTYPE_MASK_SOFTWARE \
+            XCHAL_SEP   XCHAL_INTTYPE_MASK_EXTERN_EDGE  \
+            XCHAL_SEP   XCHAL_INTTYPE_MASK_EXTERN_LEVEL \
+            XCHAL_SEP   XCHAL_INTTYPE_MASK_TIMER    \
+            XCHAL_SEP   XCHAL_INTTYPE_MASK_NMI      \
+            XCHAL_SEP   XCHAL_INTTYPE_MASK_WRITE_ERROR  \
+            XCHAL_SEP   XCHAL_INTTYPE_MASK_IDMA_DONE    \
+            XCHAL_SEP   XCHAL_INTTYPE_MASK_IDMA_ERR \
+            XCHAL_SEP   XCHAL_INTTYPE_MASK_GS_ERR
+
+/*  Interrupts that can be cleared using the INTCLEAR special register:  */
+#define XCHAL_INTCLEARABLE_MASK (XCHAL_INTTYPE_MASK_SOFTWARE+XCHAL_INTTYPE_MASK_EXTERN_EDGE+XCHAL_INTTYPE_MASK_WRITE_ERROR)
+/*  Interrupts that can be triggered using the INTSET special register:  */
+#define XCHAL_INTSETTABLE_MASK  XCHAL_INTTYPE_MASK_SOFTWARE
+
+/*  Array of interrupts assigned to each timer (CCOMPARE0 to CCOMPARE3):  */
+#define XCHAL_TIMER_INTERRUPTS      XCHAL_TIMER0_INTERRUPT \
+            XCHAL_SEP   XCHAL_TIMER1_INTERRUPT \
+            XCHAL_SEP   XCHAL_TIMER2_INTERRUPT \
+            XCHAL_SEP   XCHAL_TIMER3_INTERRUPT
+
+
+
+/*  For backward compatibility and for the array macros, define macros for
+ *  each unconfigured interrupt number (unfortunately, the value of
+ *  XTHAL_INTTYPE_UNCONFIGURED is not zero):  */
+#if XCHAL_NUM_INTERRUPTS == 0
+# define XCHAL_INT0_LEVEL       0
+# define XCHAL_INT0_TYPE        XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 1
+# define XCHAL_INT1_LEVEL       0
+# define XCHAL_INT1_TYPE        XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 2
+# define XCHAL_INT2_LEVEL       0
+# define XCHAL_INT2_TYPE        XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 3
+# define XCHAL_INT3_LEVEL       0
+# define XCHAL_INT3_TYPE        XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 4
+# define XCHAL_INT4_LEVEL       0
+# define XCHAL_INT4_TYPE        XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 5
+# define XCHAL_INT5_LEVEL       0
+# define XCHAL_INT5_TYPE        XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 6
+# define XCHAL_INT6_LEVEL       0
+# define XCHAL_INT6_TYPE        XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 7
+# define XCHAL_INT7_LEVEL       0
+# define XCHAL_INT7_TYPE        XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 8
+# define XCHAL_INT8_LEVEL       0
+# define XCHAL_INT8_TYPE        XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 9
+# define XCHAL_INT9_LEVEL       0
+# define XCHAL_INT9_TYPE        XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 10
+# define XCHAL_INT10_LEVEL      0
+# define XCHAL_INT10_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 11
+# define XCHAL_INT11_LEVEL      0
+# define XCHAL_INT11_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 12
+# define XCHAL_INT12_LEVEL      0
+# define XCHAL_INT12_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 13
+# define XCHAL_INT13_LEVEL      0
+# define XCHAL_INT13_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 14
+# define XCHAL_INT14_LEVEL      0
+# define XCHAL_INT14_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 15
+# define XCHAL_INT15_LEVEL      0
+# define XCHAL_INT15_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 16
+# define XCHAL_INT16_LEVEL      0
+# define XCHAL_INT16_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 17
+# define XCHAL_INT17_LEVEL      0
+# define XCHAL_INT17_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 18
+# define XCHAL_INT18_LEVEL      0
+# define XCHAL_INT18_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 19
+# define XCHAL_INT19_LEVEL      0
+# define XCHAL_INT19_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 20
+# define XCHAL_INT20_LEVEL      0
+# define XCHAL_INT20_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 21
+# define XCHAL_INT21_LEVEL      0
+# define XCHAL_INT21_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 22
+# define XCHAL_INT22_LEVEL      0
+# define XCHAL_INT22_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 23
+# define XCHAL_INT23_LEVEL      0
+# define XCHAL_INT23_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 24
+# define XCHAL_INT24_LEVEL      0
+# define XCHAL_INT24_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 25
+# define XCHAL_INT25_LEVEL      0
+# define XCHAL_INT25_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 26
+# define XCHAL_INT26_LEVEL      0
+# define XCHAL_INT26_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 27
+# define XCHAL_INT27_LEVEL      0
+# define XCHAL_INT27_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 28
+# define XCHAL_INT28_LEVEL      0
+# define XCHAL_INT28_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 29
+# define XCHAL_INT29_LEVEL      0
+# define XCHAL_INT29_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 30
+# define XCHAL_INT30_LEVEL      0
+# define XCHAL_INT30_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 31
+# define XCHAL_INT31_LEVEL      0
+# define XCHAL_INT31_TYPE       XTHAL_INTTYPE_UNCONFIGURED
+#endif
+
+
+/*
+ *  Masks and levels corresponding to each *external* interrupt.
+ */
+
+#define XCHAL_EXTINT0_MASK      (1 << XCHAL_EXTINT0_NUM)
+#define XCHAL_EXTINT0_LEVEL     XCHAL_INT_LEVEL(XCHAL_EXTINT0_NUM)
+#define XCHAL_EXTINT1_MASK      (1 << XCHAL_EXTINT1_NUM)
+#define XCHAL_EXTINT1_LEVEL     XCHAL_INT_LEVEL(XCHAL_EXTINT1_NUM)
+#define XCHAL_EXTINT2_MASK      (1 << XCHAL_EXTINT2_NUM)
+#define XCHAL_EXTINT2_LEVEL     XCHAL_INT_LEVEL(XCHAL_EXTINT2_NUM)
+#define XCHAL_EXTINT3_MASK      (1 << XCHAL_EXTINT3_NUM)
+#define XCHAL_EXTINT3_LEVEL     XCHAL_INT_LEVEL(XCHAL_EXTINT3_NUM)
+#define XCHAL_EXTINT4_MASK      (1 << XCHAL_EXTINT4_NUM)
+#define XCHAL_EXTINT4_LEVEL     XCHAL_INT_LEVEL(XCHAL_EXTINT4_NUM)
+#define XCHAL_EXTINT5_MASK      (1 << XCHAL_EXTINT5_NUM)
+#define XCHAL_EXTINT5_LEVEL     XCHAL_INT_LEVEL(XCHAL_EXTINT5_NUM)
+#define XCHAL_EXTINT6_MASK      (1 << XCHAL_EXTINT6_NUM)
+#define XCHAL_EXTINT6_LEVEL     XCHAL_INT_LEVEL(XCHAL_EXTINT6_NUM)
+#define XCHAL_EXTINT7_MASK      (1 << XCHAL_EXTINT7_NUM)
+#define XCHAL_EXTINT7_LEVEL     XCHAL_INT_LEVEL(XCHAL_EXTINT7_NUM)
+#define XCHAL_EXTINT8_MASK      (1 << XCHAL_EXTINT8_NUM)
+#define XCHAL_EXTINT8_LEVEL     XCHAL_INT_LEVEL(XCHAL_EXTINT8_NUM)
+#define XCHAL_EXTINT9_MASK      (1 << XCHAL_EXTINT9_NUM)
+#define XCHAL_EXTINT9_LEVEL     XCHAL_INT_LEVEL(XCHAL_EXTINT9_NUM)
+#define XCHAL_EXTINT10_MASK     (1 << XCHAL_EXTINT10_NUM)
+#define XCHAL_EXTINT10_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT10_NUM)
+#define XCHAL_EXTINT11_MASK     (1 << XCHAL_EXTINT11_NUM)
+#define XCHAL_EXTINT11_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT11_NUM)
+#define XCHAL_EXTINT12_MASK     (1 << XCHAL_EXTINT12_NUM)
+#define XCHAL_EXTINT12_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT12_NUM)
+#define XCHAL_EXTINT13_MASK     (1 << XCHAL_EXTINT13_NUM)
+#define XCHAL_EXTINT13_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT13_NUM)
+#define XCHAL_EXTINT14_MASK     (1 << XCHAL_EXTINT14_NUM)
+#define XCHAL_EXTINT14_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT14_NUM)
+#define XCHAL_EXTINT15_MASK     (1 << XCHAL_EXTINT15_NUM)
+#define XCHAL_EXTINT15_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT15_NUM)
+#define XCHAL_EXTINT16_MASK     (1 << XCHAL_EXTINT16_NUM)
+#define XCHAL_EXTINT16_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT16_NUM)
+#define XCHAL_EXTINT17_MASK     (1 << XCHAL_EXTINT17_NUM)
+#define XCHAL_EXTINT17_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT17_NUM)
+#define XCHAL_EXTINT18_MASK     (1 << XCHAL_EXTINT18_NUM)
+#define XCHAL_EXTINT18_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT18_NUM)
+#define XCHAL_EXTINT19_MASK     (1 << XCHAL_EXTINT19_NUM)
+#define XCHAL_EXTINT19_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT19_NUM)
+#define XCHAL_EXTINT20_MASK     (1 << XCHAL_EXTINT20_NUM)
+#define XCHAL_EXTINT20_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT20_NUM)
+#define XCHAL_EXTINT21_MASK     (1 << XCHAL_EXTINT21_NUM)
+#define XCHAL_EXTINT21_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT21_NUM)
+#define XCHAL_EXTINT22_MASK     (1 << XCHAL_EXTINT22_NUM)
+#define XCHAL_EXTINT22_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT22_NUM)
+#define XCHAL_EXTINT23_MASK     (1 << XCHAL_EXTINT23_NUM)
+#define XCHAL_EXTINT23_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT23_NUM)
+#define XCHAL_EXTINT24_MASK     (1 << XCHAL_EXTINT24_NUM)
+#define XCHAL_EXTINT24_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT24_NUM)
+#define XCHAL_EXTINT25_MASK     (1 << XCHAL_EXTINT25_NUM)
+#define XCHAL_EXTINT25_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT25_NUM)
+#define XCHAL_EXTINT26_MASK     (1 << XCHAL_EXTINT26_NUM)
+#define XCHAL_EXTINT26_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT26_NUM)
+#define XCHAL_EXTINT27_MASK     (1 << XCHAL_EXTINT27_NUM)
+#define XCHAL_EXTINT27_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT27_NUM)
+#define XCHAL_EXTINT28_MASK     (1 << XCHAL_EXTINT28_NUM)
+#define XCHAL_EXTINT28_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT28_NUM)
+#define XCHAL_EXTINT29_MASK     (1 << XCHAL_EXTINT29_NUM)
+#define XCHAL_EXTINT29_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT29_NUM)
+#define XCHAL_EXTINT30_MASK     (1 << XCHAL_EXTINT30_NUM)
+#define XCHAL_EXTINT30_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT30_NUM)
+#define XCHAL_EXTINT31_MASK     (1 << XCHAL_EXTINT31_NUM)
+#define XCHAL_EXTINT31_LEVEL        XCHAL_INT_LEVEL(XCHAL_EXTINT31_NUM)
+
+
+/*----------------------------------------------------------------------
+            EXCEPTIONS and VECTORS
+  ----------------------------------------------------------------------*/
+
+/*  For backward compatibility ONLY -- DO NOT USE (will be removed in future release):  */
+#define XCHAL_HAVE_OLD_EXC_ARCH     XCHAL_HAVE_XEA1 /* (DEPRECATED) 1 if old exception architecture (XEA1), 0 otherwise (eg. XEA2) */
+#define XCHAL_HAVE_EXCM         XCHAL_HAVE_XEA2 /* (DEPRECATED) 1 if PS.EXCM bit exists (currently equals XCHAL_HAVE_TLBS) */
+#ifdef XCHAL_USER_VECTOR_VADDR
+#define XCHAL_PROGRAMEXC_VECTOR_VADDR   XCHAL_USER_VECTOR_VADDR
+#define XCHAL_USEREXC_VECTOR_VADDR  XCHAL_USER_VECTOR_VADDR
+#endif
+#ifdef XCHAL_USER_VECTOR_PADDR
+# define XCHAL_PROGRAMEXC_VECTOR_PADDR  XCHAL_USER_VECTOR_PADDR
+# define XCHAL_USEREXC_VECTOR_PADDR XCHAL_USER_VECTOR_PADDR
+#endif
+#ifdef XCHAL_KERNEL_VECTOR_VADDR
+# define XCHAL_STACKEDEXC_VECTOR_VADDR  XCHAL_KERNEL_VECTOR_VADDR
+# define XCHAL_KERNELEXC_VECTOR_VADDR   XCHAL_KERNEL_VECTOR_VADDR
+#endif
+#ifdef XCHAL_KERNEL_VECTOR_PADDR
+# define XCHAL_STACKEDEXC_VECTOR_PADDR  XCHAL_KERNEL_VECTOR_PADDR
+# define XCHAL_KERNELEXC_VECTOR_PADDR   XCHAL_KERNEL_VECTOR_PADDR
+#endif
+
+#if 0
+#if XCHAL_HAVE_DEBUG
+# define XCHAL_DEBUG_VECTOR_VADDR   XCHAL_INTLEVEL_VECTOR_VADDR(XCHAL_DEBUGLEVEL)
+/*  This one should only get defined if the corresponding intlevel paddr macro exists:  */
+# define XCHAL_DEBUG_VECTOR_PADDR   XCHAL_INTLEVEL_VECTOR_PADDR(XCHAL_DEBUGLEVEL)
+#endif
+#endif
+
+/*  Indexing macros:  */
+#define _XCHAL_INTLEVEL_VECTOR_VADDR(n)     XCHAL_INTLEVEL ## n ## _VECTOR_VADDR
+#define XCHAL_INTLEVEL_VECTOR_VADDR(n)      _XCHAL_INTLEVEL_VECTOR_VADDR(n)     /* n = 0 .. 15 */
+
+/*
+ *  General Exception Causes
+ *  (values of EXCCAUSE special register set by general exceptions,
+ *   which vector to the user, kernel, or double-exception vectors).
+ *
+ *  DEPRECATED.  Please use the equivalent EXCCAUSE_xxx macros
+ *  defined in <xtensa/corebits.h>.  (Note that these have slightly
+ *  different names, they don't just have the XCHAL_ prefix removed.)
+ */
+#define XCHAL_EXCCAUSE_ILLEGAL_INSTRUCTION      0   /* Illegal Instruction */
+#define XCHAL_EXCCAUSE_SYSTEM_CALL          1   /* System Call */
+#define XCHAL_EXCCAUSE_INSTRUCTION_FETCH_ERROR      2   /* Instruction Fetch Error */
+#define XCHAL_EXCCAUSE_LOAD_STORE_ERROR         3   /* Load Store Error */
+#define XCHAL_EXCCAUSE_LEVEL1_INTERRUPT         4   /* Level 1 Interrupt */
+#define XCHAL_EXCCAUSE_ALLOCA               5   /* Stack Extension Assist */
+#define XCHAL_EXCCAUSE_INTEGER_DIVIDE_BY_ZERO       6   /* Integer Divide by Zero */
+#define XCHAL_EXCCAUSE_SPECULATION          7   /* Speculation */
+#define XCHAL_EXCCAUSE_PRIVILEGED           8   /* Privileged Instruction */
+#define XCHAL_EXCCAUSE_UNALIGNED            9   /* Unaligned Load Store */
+/*10..15 reserved*/
+#define XCHAL_EXCCAUSE_ITLB_MISS            16  /* ITlb Miss Exception */
+#define XCHAL_EXCCAUSE_ITLB_MULTIHIT            17  /* ITlb Mutltihit Exception */
+#define XCHAL_EXCCAUSE_ITLB_PRIVILEGE           18  /* ITlb Privilege Exception */
+#define XCHAL_EXCCAUSE_ITLB_SIZE_RESTRICTION        19  /* ITlb Size Restriction Exception */
+#define XCHAL_EXCCAUSE_FETCH_CACHE_ATTRIBUTE        20  /* Fetch Cache Attribute Exception */
+/*21..23 reserved*/
+#define XCHAL_EXCCAUSE_DTLB_MISS            24  /* DTlb Miss Exception */
+#define XCHAL_EXCCAUSE_DTLB_MULTIHIT            25  /* DTlb Multihit Exception */
+#define XCHAL_EXCCAUSE_DTLB_PRIVILEGE           26  /* DTlb Privilege Exception */
+#define XCHAL_EXCCAUSE_DTLB_SIZE_RESTRICTION        27  /* DTlb Size Restriction Exception */
+#define XCHAL_EXCCAUSE_LOAD_CACHE_ATTRIBUTE     28  /* Load Cache Attribute Exception */
+#define XCHAL_EXCCAUSE_STORE_CACHE_ATTRIBUTE        29  /* Store Cache Attribute Exception */
+/*30..31 reserved*/
+#define XCHAL_EXCCAUSE_COPROCESSOR0_DISABLED        32  /* Coprocessor 0 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR1_DISABLED        33  /* Coprocessor 1 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR2_DISABLED        34  /* Coprocessor 2 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR3_DISABLED        35  /* Coprocessor 3 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR4_DISABLED        36  /* Coprocessor 4 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR5_DISABLED        37  /* Coprocessor 5 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR6_DISABLED        38  /* Coprocessor 6 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR7_DISABLED        39  /* Coprocessor 7 disabled */
+/*40..63 reserved*/
+
+
+/*
+ *  Miscellaneous special register fields.
+ *
+ *  For each special register, and each field within each register:
+ *  XCHAL_<regname>_VALIDMASK is the set of bits defined in the register.
+ *  XCHAL_<regname>_<field>_BITS is the number of bits in the field.
+ *  XCHAL_<regname>_<field>_NUM is 2^bits, the number of possible values
+ *          of the field.
+ *  XCHAL_<regname>_<field>_SHIFT is the position of the field within
+ *          the register, starting from the least significant bit.
+ *
+ *  DEPRECATED.  Please use the equivalent macros defined in
+ *  <xtensa/corebits.h>.  (Note that these have different names.)
+ */
+
+/*  DBREAKC (special register number 160):  */
+#define XCHAL_DBREAKC_VALIDMASK     0xC000003F
+#define XCHAL_DBREAKC_MASK_BITS     6
+#define XCHAL_DBREAKC_MASK_NUM      64
+#define XCHAL_DBREAKC_MASK_SHIFT    0
+#define XCHAL_DBREAKC_MASK_MASK     0x0000003F
+#define XCHAL_DBREAKC_LOADBREAK_BITS    1
+#define XCHAL_DBREAKC_LOADBREAK_NUM     2
+#define XCHAL_DBREAKC_LOADBREAK_SHIFT   30
+#define XCHAL_DBREAKC_LOADBREAK_MASK    0x40000000
+#define XCHAL_DBREAKC_STOREBREAK_BITS   1
+#define XCHAL_DBREAKC_STOREBREAK_NUM    2
+#define XCHAL_DBREAKC_STOREBREAK_SHIFT  31
+#define XCHAL_DBREAKC_STOREBREAK_MASK   0x80000000
+/*  PS (special register number 230):  */
+#define XCHAL_PS_VALIDMASK      0x00070F3F
+#define XCHAL_PS_INTLEVEL_BITS      4
+#define XCHAL_PS_INTLEVEL_NUM       16
+#define XCHAL_PS_INTLEVEL_SHIFT     0
+#define XCHAL_PS_INTLEVEL_MASK      0x0000000F
+#define XCHAL_PS_EXCM_BITS      1
+#define XCHAL_PS_EXCM_NUM       2
+#define XCHAL_PS_EXCM_SHIFT     4
+#define XCHAL_PS_EXCM_MASK      0x00000010
+#define XCHAL_PS_UM_BITS        1
+#define XCHAL_PS_UM_NUM         2
+#define XCHAL_PS_UM_SHIFT       5
+#define XCHAL_PS_UM_MASK        0x00000020
+#define XCHAL_PS_RING_BITS      2
+#define XCHAL_PS_RING_NUM       4
+#define XCHAL_PS_RING_SHIFT     6
+#define XCHAL_PS_RING_MASK      0x000000C0
+#define XCHAL_PS_OWB_BITS       4
+#define XCHAL_PS_OWB_NUM        16
+#define XCHAL_PS_OWB_SHIFT      8
+#define XCHAL_PS_OWB_MASK       0x00000F00
+#define XCHAL_PS_CALLINC_BITS       2
+#define XCHAL_PS_CALLINC_NUM        4
+#define XCHAL_PS_CALLINC_SHIFT      16
+#define XCHAL_PS_CALLINC_MASK       0x00030000
+#define XCHAL_PS_WOE_BITS       1
+#define XCHAL_PS_WOE_NUM        2
+#define XCHAL_PS_WOE_SHIFT      18
+#define XCHAL_PS_WOE_MASK       0x00040000
+/*  EXCCAUSE (special register number 232):  */
+#define XCHAL_EXCCAUSE_VALIDMASK    0x0000003F
+#define XCHAL_EXCCAUSE_BITS         6
+#define XCHAL_EXCCAUSE_NUM          64
+#define XCHAL_EXCCAUSE_SHIFT        0
+#define XCHAL_EXCCAUSE_MASK         0x0000003F
+/*  DEBUGCAUSE (special register number 233):  */
+#define XCHAL_DEBUGCAUSE_VALIDMASK  0x0000003F
+#define XCHAL_DEBUGCAUSE_ICOUNT_BITS    1
+#define XCHAL_DEBUGCAUSE_ICOUNT_NUM     2
+#define XCHAL_DEBUGCAUSE_ICOUNT_SHIFT   0
+#define XCHAL_DEBUGCAUSE_ICOUNT_MASK    0x00000001
+#define XCHAL_DEBUGCAUSE_IBREAK_BITS    1
+#define XCHAL_DEBUGCAUSE_IBREAK_NUM     2
+#define XCHAL_DEBUGCAUSE_IBREAK_SHIFT   1
+#define XCHAL_DEBUGCAUSE_IBREAK_MASK    0x00000002
+#define XCHAL_DEBUGCAUSE_DBREAK_BITS    1
+#define XCHAL_DEBUGCAUSE_DBREAK_NUM     2
+#define XCHAL_DEBUGCAUSE_DBREAK_SHIFT   2
+#define XCHAL_DEBUGCAUSE_DBREAK_MASK    0x00000004
+#define XCHAL_DEBUGCAUSE_BREAK_BITS     1
+#define XCHAL_DEBUGCAUSE_BREAK_NUM      2
+#define XCHAL_DEBUGCAUSE_BREAK_SHIFT    3
+#define XCHAL_DEBUGCAUSE_BREAK_MASK     0x00000008
+#define XCHAL_DEBUGCAUSE_BREAKN_BITS    1
+#define XCHAL_DEBUGCAUSE_BREAKN_NUM     2
+#define XCHAL_DEBUGCAUSE_BREAKN_SHIFT   4
+#define XCHAL_DEBUGCAUSE_BREAKN_MASK    0x00000010
+#define XCHAL_DEBUGCAUSE_DEBUGINT_BITS  1
+#define XCHAL_DEBUGCAUSE_DEBUGINT_NUM   2
+#define XCHAL_DEBUGCAUSE_DEBUGINT_SHIFT 5
+#define XCHAL_DEBUGCAUSE_DEBUGINT_MASK  0x00000020
+
+
+
+
+/*----------------------------------------------------------------------
+                TIMERS
+  ----------------------------------------------------------------------*/
+
+/*#define XCHAL_HAVE_TIMERS     XCHAL_HAVE_CCOUNT*/
+
+
+
+/*----------------------------------------------------------------------
+            INTERNAL I/D RAM/ROMs and XLMI
+  ----------------------------------------------------------------------*/
+
+#define  XCHAL_NUM_IROM     XCHAL_NUM_INSTROM   /* (DEPRECATED) */
+#define  XCHAL_NUM_IRAM     XCHAL_NUM_INSTRAM   /* (DEPRECATED) */
+#define  XCHAL_NUM_DROM     XCHAL_NUM_DATAROM   /* (DEPRECATED) */
+#define  XCHAL_NUM_DRAM     XCHAL_NUM_DATARAM   /* (DEPRECATED) */
+
+#define XCHAL_IROM0_VADDR   XCHAL_INSTROM0_VADDR    /* (DEPRECATED) */
+#define XCHAL_IROM0_PADDR   XCHAL_INSTROM0_PADDR    /* (DEPRECATED) */
+#define XCHAL_IROM0_SIZE    XCHAL_INSTROM0_SIZE /* (DEPRECATED) */
+#define XCHAL_IROM1_VADDR   XCHAL_INSTROM1_VADDR    /* (DEPRECATED) */
+#define XCHAL_IROM1_PADDR   XCHAL_INSTROM1_PADDR    /* (DEPRECATED) */
+#define XCHAL_IROM1_SIZE    XCHAL_INSTROM1_SIZE /* (DEPRECATED) */
+#define XCHAL_IRAM0_VADDR   XCHAL_INSTRAM0_VADDR    /* (DEPRECATED) */
+#define XCHAL_IRAM0_PADDR   XCHAL_INSTRAM0_PADDR    /* (DEPRECATED) */
+#define XCHAL_IRAM0_SIZE    XCHAL_INSTRAM0_SIZE /* (DEPRECATED) */
+#define XCHAL_IRAM1_VADDR   XCHAL_INSTRAM1_VADDR    /* (DEPRECATED) */
+#define XCHAL_IRAM1_PADDR   XCHAL_INSTRAM1_PADDR    /* (DEPRECATED) */
+#define XCHAL_IRAM1_SIZE    XCHAL_INSTRAM1_SIZE /* (DEPRECATED) */
+#define XCHAL_DROM0_VADDR   XCHAL_DATAROM0_VADDR    /* (DEPRECATED) */
+#define XCHAL_DROM0_PADDR   XCHAL_DATAROM0_PADDR    /* (DEPRECATED) */
+#define XCHAL_DROM0_SIZE    XCHAL_DATAROM0_SIZE /* (DEPRECATED) */
+#define XCHAL_DROM1_VADDR   XCHAL_DATAROM1_VADDR    /* (DEPRECATED) */
+#define XCHAL_DROM1_PADDR   XCHAL_DATAROM1_PADDR    /* (DEPRECATED) */
+#define XCHAL_DROM1_SIZE    XCHAL_DATAROM1_SIZE /* (DEPRECATED) */
+#define XCHAL_DRAM0_VADDR   XCHAL_DATARAM0_VADDR    /* (DEPRECATED) */
+#define XCHAL_DRAM0_PADDR   XCHAL_DATARAM0_PADDR    /* (DEPRECATED) */
+#define XCHAL_DRAM0_SIZE    XCHAL_DATARAM0_SIZE /* (DEPRECATED) */
+#define XCHAL_DRAM1_VADDR   XCHAL_DATARAM1_VADDR    /* (DEPRECATED) */
+#define XCHAL_DRAM1_PADDR   XCHAL_DATARAM1_PADDR    /* (DEPRECATED) */
+#define XCHAL_DRAM1_SIZE    XCHAL_DATARAM1_SIZE /* (DEPRECATED) */
+
+
+
+/*----------------------------------------------------------------------
+                CACHE
+  ----------------------------------------------------------------------*/
+
+
+/*  Default PREFCTL value to enable prefetch.  */
+#if XCHAL_HW_MIN_VERSION < XTENSA_HWVERSION_RE_2012_0
+#define XCHAL_CACHE_PREFCTL_DEFAULT 0x00044 /* enabled, not aggressive */
+#elif XCHAL_HW_MIN_VERSION < XTENSA_HWVERSION_RF_2014_0
+#define XCHAL_CACHE_PREFCTL_DEFAULT 0x01044 /* + enable prefetch to L1 */
+#elif ((XCHAL_PREFETCH_ENTRIES >= 16) && XCHAL_HAVE_CACHE_BLOCKOPS)
+#define XCHAL_CACHE_PREFCTL_DEFAULT 0x81044 /* 12 entries for block ops */
+#elif ((XCHAL_PREFETCH_ENTRIES >= 8) && XCHAL_HAVE_CACHE_BLOCKOPS)
+#define XCHAL_CACHE_PREFCTL_DEFAULT 0x51044 /* 5 entries for block ops */
+#else
+#define XCHAL_CACHE_PREFCTL_DEFAULT 0x01044 /* 0 entries for block ops */
+#endif
+
+
+/*  Max for both I-cache and D-cache (used for general alignment):  */
+#if XCHAL_ICACHE_LINESIZE > XCHAL_DCACHE_LINESIZE
+# define XCHAL_CACHE_LINEWIDTH_MAX  XCHAL_ICACHE_LINEWIDTH
+# define XCHAL_CACHE_LINESIZE_MAX   XCHAL_ICACHE_LINESIZE
+#else
+# define XCHAL_CACHE_LINEWIDTH_MAX  XCHAL_DCACHE_LINEWIDTH
+# define XCHAL_CACHE_LINESIZE_MAX   XCHAL_DCACHE_LINESIZE
+#endif
+
+#define XCHAL_ICACHE_SETSIZE        (1<<XCHAL_ICACHE_SETWIDTH)
+#define XCHAL_DCACHE_SETSIZE        (1<<XCHAL_DCACHE_SETWIDTH)
+/*  Max for both I and D caches (used for cache-coherency page alignment):  */
+#if XCHAL_ICACHE_SETWIDTH > XCHAL_DCACHE_SETWIDTH
+# define XCHAL_CACHE_SETWIDTH_MAX   XCHAL_ICACHE_SETWIDTH
+# define XCHAL_CACHE_SETSIZE_MAX    XCHAL_ICACHE_SETSIZE
+#else
+# define XCHAL_CACHE_SETWIDTH_MAX   XCHAL_DCACHE_SETWIDTH
+# define XCHAL_CACHE_SETSIZE_MAX    XCHAL_DCACHE_SETSIZE
+#endif
+
+/*  Instruction cache tag bits:  */
+#define XCHAL_ICACHE_TAG_V_SHIFT    0
+#define XCHAL_ICACHE_TAG_V      0x1 /* valid bit */
+#if XCHAL_ICACHE_WAYS > 1
+# define XCHAL_ICACHE_TAG_F_SHIFT   1
+# define XCHAL_ICACHE_TAG_F     0x2 /* fill (LRU) bit */
+#else
+# define XCHAL_ICACHE_TAG_F_SHIFT   0
+# define XCHAL_ICACHE_TAG_F     0   /* no fill (LRU) bit */
+#endif
+#if XCHAL_ICACHE_LINE_LOCKABLE
+# define XCHAL_ICACHE_TAG_L_SHIFT   (XCHAL_ICACHE_TAG_F_SHIFT+1)
+# define XCHAL_ICACHE_TAG_L     (1 << XCHAL_ICACHE_TAG_L_SHIFT) /* lock bit */
+#else
+# define XCHAL_ICACHE_TAG_L_SHIFT   XCHAL_ICACHE_TAG_F_SHIFT
+# define XCHAL_ICACHE_TAG_L     0   /* no lock bit */
+#endif
+/*  Data cache tag bits:  */
+#define XCHAL_DCACHE_TAG_V_SHIFT    0
+#define XCHAL_DCACHE_TAG_V      0x1 /* valid bit */
+#if XCHAL_DCACHE_WAYS > 1
+# define XCHAL_DCACHE_TAG_F_SHIFT   1
+# define XCHAL_DCACHE_TAG_F     0x2 /* fill (LRU) bit */
+#else
+# define XCHAL_DCACHE_TAG_F_SHIFT   0
+# define XCHAL_DCACHE_TAG_F     0   /* no fill (LRU) bit */
+#endif
+#if XCHAL_DCACHE_IS_WRITEBACK
+# define XCHAL_DCACHE_TAG_D_SHIFT   (XCHAL_DCACHE_TAG_F_SHIFT+1)
+# define XCHAL_DCACHE_TAG_D     (1 << XCHAL_DCACHE_TAG_D_SHIFT) /* dirty bit */
+#else
+# define XCHAL_DCACHE_TAG_D_SHIFT   XCHAL_DCACHE_TAG_F_SHIFT
+# define XCHAL_DCACHE_TAG_D     0   /* no dirty bit */
+#endif
+#if XCHAL_DCACHE_LINE_LOCKABLE
+# define XCHAL_DCACHE_TAG_L_SHIFT   (XCHAL_DCACHE_TAG_D_SHIFT+1)
+# define XCHAL_DCACHE_TAG_L     (1 << XCHAL_DCACHE_TAG_L_SHIFT) /* lock bit */
+#else
+# define XCHAL_DCACHE_TAG_L_SHIFT   XCHAL_DCACHE_TAG_D_SHIFT
+# define XCHAL_DCACHE_TAG_L     0   /* no lock bit */
+#endif
+
+/*  Whether MEMCTL register has anything useful  */
+#define XCHAL_USE_MEMCTL        (((XCHAL_LOOP_BUFFER_SIZE > 0)  ||      \
+                    XCHAL_DCACHE_IS_COHERENT    ||      \
+                    XCHAL_HAVE_ICACHE_DYN_WAYS  ||      \
+                    XCHAL_HAVE_DCACHE_DYN_WAYS) &&      \
+                    (XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RE_2012_0))
+
+#if XCHAL_DCACHE_IS_COHERENT
+#define _MEMCTL_SNOOP_EN        0x02        /* Enable snoop */
+#else
+#define _MEMCTL_SNOOP_EN        0x00        /* Don't enable snoop */
+#endif
+
+#if (XCHAL_LOOP_BUFFER_SIZE == 0) || XCHAL_ERRATUM_453
+#define _MEMCTL_L0IBUF_EN       0x00        /* No loop buffer or don't enable */
+#else
+#define _MEMCTL_L0IBUF_EN       0x01        /* Enable loop buffer */
+#endif
+
+/*  Default MEMCTL values:  */
+#if XCHAL_HAVE_ICACHE_DYN_WAYS || XCHAL_HAVE_DCACHE_DYN_WAYS
+#define XCHAL_CACHE_MEMCTL_DEFAULT  (0xFFFFFF00 | _MEMCTL_L0IBUF_EN)
+#else
+#define XCHAL_CACHE_MEMCTL_DEFAULT  (0x00000000 | _MEMCTL_L0IBUF_EN)
+#endif
+
+#define XCHAL_SNOOP_LB_MEMCTL_DEFAULT   (_MEMCTL_SNOOP_EN | _MEMCTL_L0IBUF_EN)
+
+
+/*----------------------------------------------------------------------
+                MMU
+  ----------------------------------------------------------------------*/
+
+/*  See <xtensa/config/core-matmap.h> for more details.  */
+
+/*  Has different semantic in open source headers (where it means HAVE_PTP_MMU),
+    so comment out starting with RB-2008.3 release; later, might get
+    get reintroduced as a synonym for XCHAL_HAVE_PTP_MMU instead:  */
+/*#define XCHAL_HAVE_MMU        XCHAL_HAVE_TLBS*/   /* (DEPRECATED; use XCHAL_HAVE_TLBS instead) */
+
+/*  Indexing macros:  */
+#define _XCHAL_ITLB_SET(n,_what)    XCHAL_ITLB_SET ## n ## _what
+#define XCHAL_ITLB_SET(n,what)      _XCHAL_ITLB_SET(n, _ ## what )
+#define _XCHAL_ITLB_SET_E(n,i,_what)    XCHAL_ITLB_SET ## n ## _E ## i ## _what
+#define XCHAL_ITLB_SET_E(n,i,what)  _XCHAL_ITLB_SET_E(n,i, _ ## what )
+#define _XCHAL_DTLB_SET(n,_what)    XCHAL_DTLB_SET ## n ## _what
+#define XCHAL_DTLB_SET(n,what)      _XCHAL_DTLB_SET(n, _ ## what )
+#define _XCHAL_DTLB_SET_E(n,i,_what)    XCHAL_DTLB_SET ## n ## _E ## i ## _what
+#define XCHAL_DTLB_SET_E(n,i,what)  _XCHAL_DTLB_SET_E(n,i, _ ## what )
+/*
+ *  Example use:  XCHAL_ITLB_SET(XCHAL_ITLB_ARF_SET0,ENTRIES)
+ *  to get the value of XCHAL_ITLB_SET<n>_ENTRIES where <n> is the first auto-refill set.
+ */
+
+/*  Number of entries per autorefill way:  */
+#define XCHAL_ITLB_ARF_ENTRIES      (1<<XCHAL_ITLB_ARF_ENTRIES_LOG2)
+#define XCHAL_DTLB_ARF_ENTRIES      (1<<XCHAL_DTLB_ARF_ENTRIES_LOG2)
+
+/*
+ *  Determine whether we have a full MMU (with Page Table and Protection)
+ *  usable for an MMU-based OS:
+ */
+#if 0
+#if XCHAL_HAVE_TLBS && !XCHAL_HAVE_SPANNING_WAY && XCHAL_ITLB_ARF_WAYS > 0 && XCHAL_DTLB_ARF_WAYS > 0 && XCHAL_MMU_RINGS >= 2
+# define XCHAL_HAVE_PTP_MMU     1   /* have full MMU (with page table [autorefill] and protection) */
+#else
+# define XCHAL_HAVE_PTP_MMU     0   /* don't have full MMU */
+#endif
+#endif
+
+/*
+ *  For full MMUs, report kernel RAM segment and kernel I/O segment static page mappings:
+ */
+#if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY
+#define XCHAL_KSEG_CACHED_VADDR     0xD0000000  /* virt.addr of kernel RAM cached static map */
+#define XCHAL_KSEG_CACHED_PADDR     0x00000000  /* phys.addr of kseg_cached */
+#define XCHAL_KSEG_CACHED_SIZE      0x08000000  /* size in bytes of kseg_cached (assumed power of 2!!!) */
+#define XCHAL_KSEG_BYPASS_VADDR     0xD8000000  /* virt.addr of kernel RAM bypass (uncached) static map */
+#define XCHAL_KSEG_BYPASS_PADDR     0x00000000  /* phys.addr of kseg_bypass */
+#define XCHAL_KSEG_BYPASS_SIZE      0x08000000  /* size in bytes of kseg_bypass (assumed power of 2!!!) */
+
+#define XCHAL_KIO_CACHED_VADDR      0xE0000000  /* virt.addr of kernel I/O cached static map */
+#define XCHAL_KIO_CACHED_PADDR      0xF0000000  /* phys.addr of kio_cached */
+#define XCHAL_KIO_CACHED_SIZE       0x10000000  /* size in bytes of kio_cached (assumed power of 2!!!) */
+#define XCHAL_KIO_BYPASS_VADDR      0xF0000000  /* virt.addr of kernel I/O bypass (uncached) static map */
+#define XCHAL_KIO_BYPASS_PADDR      0xF0000000  /* phys.addr of kio_bypass */
+#define XCHAL_KIO_BYPASS_SIZE       0x10000000  /* size in bytes of kio_bypass (assumed power of 2!!!) */
+
+#define XCHAL_SEG_MAPPABLE_VADDR    0x00000000  /* start of largest non-static-mapped virtual addr area */
+#define XCHAL_SEG_MAPPABLE_SIZE     0xD0000000  /* size in bytes of  "  */
+/* define XCHAL_SEG_MAPPABLE2_xxx if more areas present, sorted in order of descending size.  */
+#endif
+
+
+/*----------------------------------------------------------------------
+                MISC
+  ----------------------------------------------------------------------*/
+
+/*  Data alignment required if used for instructions:  */
+#if XCHAL_INST_FETCH_WIDTH > XCHAL_DATA_WIDTH
+# define XCHAL_ALIGN_MAX        XCHAL_INST_FETCH_WIDTH
+#else
+# define XCHAL_ALIGN_MAX        XCHAL_DATA_WIDTH
+#endif
+
+/*
+ *  Names kept for backward compatibility.
+ *  (Here "RELEASE" is now a misnomer; these are product *versions*, not the releases
+ *   under which they are released.  In the T10##.# era there was no distinction.)
+ */
+#define XCHAL_HW_RELEASE_MAJOR      XCHAL_HW_VERSION_MAJOR
+#define XCHAL_HW_RELEASE_MINOR      XCHAL_HW_VERSION_MINOR
+#define XCHAL_HW_RELEASE_NAME       XCHAL_HW_VERSION_NAME
+
+
+
+
+/*----------------------------------------------------------------------
+            COPROCESSORS and EXTRA STATE
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_EXTRA_SA_SIZE     XCHAL_NCP_SA_SIZE
+#define XCHAL_EXTRA_SA_ALIGN        XCHAL_NCP_SA_ALIGN
+#define XCHAL_CPEXTRA_SA_SIZE       XCHAL_TOTAL_SA_SIZE
+#define XCHAL_CPEXTRA_SA_ALIGN      XCHAL_TOTAL_SA_ALIGN
+
+#if defined (_ASMLANGUAGE) || defined (__ASSEMBLER__)
+
+/*  Invoked at start of save area load/store sequence macro to setup macro
+ *  internal offsets.  Not usually invoked directly.
+ *  continue    0 for 1st sequence, 1 for subsequent consecutive ones.
+ *  totofs      offset from original ptr to next load/store location.
+ */
+.macro  xchal_sa_start  continue totofs
+.ifeq \continue
+.set   .Lxchal_pofs_, 0    /* offset from original ptr to current \ptr */
+.set   .Lxchal_ofs_, 0     /* offset from current \ptr to next load/store location */
+.endif
+.if \totofs + 1         /* if totofs specified (not -1) */
+.set   .Lxchal_ofs_, \totofs - .Lxchal_pofs_   /* specific offset from original ptr */
+.endif
+.endm
+
+/*  Align portion of save area and bring ptr in range if necessary.
+ *  Used by save area load/store sequences.  Not usually invoked directly.
+ *  Allows combining multiple (sub-)sequences arbitrarily.
+ *  ptr     pointer to save area (may be off, see .Lxchal_pofs_)
+ *  minofs,maxofs   range of offset from cur ptr to next load/store loc;
+ *          minofs <= 0 <= maxofs  (0 must always be valid offset)
+ *          range must be within +/- 30kB or so.
+ *  ofsalign    alignment granularity of minofs .. maxofs (pow of 2)
+ *          (restriction on offset from ptr to next load/store loc)
+ *  totalign    align from orig ptr to next load/store loc (pow of 2)
+ */
+.macro  xchal_sa_align  ptr minofs maxofs ofsalign totalign
+/*  First align where we start accessing the next register
+ *  per \totalign relative to original ptr (i.e. start of the save area):
+ */
+.set    .Lxchal_ofs_, ((.Lxchal_pofs_ + .Lxchal_ofs_ + \totalign - 1) & -\totalign) - .Lxchal_pofs_
+/*  If necessary, adjust \ptr to bring .Lxchal_ofs_ in acceptable range:  */
+.if (((\maxofs) - .Lxchal_ofs_) & 0xC0000000) | ((.Lxchal_ofs_ - (\minofs)) & 0xC0000000) | (.Lxchal_ofs_ & (\ofsalign - 1))
+.set   .Ligmask, 0xFFFFFFFF    /* TODO: optimize to addmi, per aligns and .Lxchal_ofs_ */
+addi   \ptr, \ptr, (.Lxchal_ofs_ & .Ligmask)
+.set   .Lxchal_pofs_, .Lxchal_pofs_ + (.Lxchal_ofs_ & .Ligmask)
+.set   .Lxchal_ofs_, (.Lxchal_ofs_ & ~.Ligmask)
+.endif
+.endm
+/*
+ *  We could optimize for addi to expand to only addmi instead of
+ *  "addmi;addi", where possible.  Here's a partial example how:
+ * .set .Lmaxmask, -(\ofsalign) & -(\totalign)
+ * .if (((\maxofs) + ~.Lmaxmask + 1) & 0xFFFFFF00) && ((.Lxchal_ofs_ & ~.Lmaxmask) == 0)
+ *  .set    .Ligmask, 0xFFFFFF00
+ * .elif ... ditto for negative ofs range ...
+ *  .set .Ligmask, 0xFFFFFF00
+ *  .set ... adjust per offset ...
+ * .else
+ *  .set .Ligmask, 0xFFFFFFFF
+ * .endif
+ */
+
+/*  Invoke this after xchal_XXX_{load,store} macros to restore \ptr.  */
+.macro  xchal_sa_ptr_restore    ptr
+.if .Lxchal_pofs_
+addi   \ptr, \ptr, - .Lxchal_pofs_
+.set   .Lxchal_ofs_, .Lxchal_ofs_ + .Lxchal_pofs_
+.set   .Lxchal_pofs_, 0
+.endif
+.endm
+
+/*
+ *  Use as eg:
+ *  xchal_atmps_store a1, SOMEOFS, XCHAL_SA_NUM_ATMPS, a4, a5
+ *  xchal_ncp_load a2, a0,a3,a4,a5
+ *  xchal_atmps_load  a1, SOMEOFS, XCHAL_SA_NUM_ATMPS, a4, a5
+ *
+ *  Specify only the ARs you *haven't* saved/restored already, up to 4.
+ *  They *must* be the *last* ARs (in same order) specified to save area
+ *  load/store sequences.  In the example above, a0 and a3 were already
+ *  saved/restored and unused (thus available) but a4 and a5 were not.
+ */
+#define xchal_atmps_store   xchal_atmps_loadstore s32i,
+#define xchal_atmps_load    xchal_atmps_loadstore l32i,
+.macro  xchal_atmps_loadstore   inst ptr offset nreq aa = 0 ab = 0 ac = 0 ad = 0
+        .set    .Lnsaved_, 0
+        .irp    reg, \aa, \ab, \ac, \ad
+        .ifeq 0x\reg ; .set .Lnsaved_, .Lnsaved_ + 1 ; .endif
+.endr
+.set    .Laofs_, 0
+.irp    reg, \aa, \ab, \ac, \ad
+.ifgt (\nreq) - .Lnsaved_
+\inst \reg, \ptr, .Laofs_ + \offset
+.set  .Laofs_, .Laofs_ + 4
+.set  .Lnsaved_, .Lnsaved_ + 1
+.endif
+.endr
+.endm
+
+/*#define xchal_ncp_load_a2 xchal_ncp_load  a2,a3,a4,a5,a6*/
+/*#define xchal_ncp_store_a2    xchal_ncp_store a2,a3,a4,a5,a6*/
+#define xchal_extratie_load     xchal_ncptie_load
+#define xchal_extratie_store        xchal_ncptie_store
+#define xchal_extratie_load_a2      xchal_ncptie_load  a2,a3,a4,a5,a6
+#define xchal_extratie_store_a2     xchal_ncptie_store a2,a3,a4,a5,a6
+#define xchal_extra_load        xchal_ncp_load
+#define xchal_extra_store       xchal_ncp_store
+#define xchal_extra_load_a2     xchal_ncp_load  a2,a3,a4,a5,a6
+#define xchal_extra_store_a2        xchal_ncp_store a2,a3,a4,a5,a6
+#define xchal_extra_load_funcbody   xchal_ncp_load  a2,a3,a4,a5,a6
+#define xchal_extra_store_funcbody  xchal_ncp_store a2,a3,a4,a5,a6
+#define xchal_cp0_store_a2      xchal_cp0_store  a2,a3,a4,a5,a6
+#define xchal_cp0_load_a2       xchal_cp0_load   a2,a3,a4,a5,a6
+#define xchal_cp1_store_a2      xchal_cp1_store  a2,a3,a4,a5,a6
+#define xchal_cp1_load_a2       xchal_cp1_load   a2,a3,a4,a5,a6
+#define xchal_cp2_store_a2      xchal_cp2_store  a2,a3,a4,a5,a6
+#define xchal_cp2_load_a2       xchal_cp2_load   a2,a3,a4,a5,a6
+#define xchal_cp3_store_a2      xchal_cp3_store  a2,a3,a4,a5,a6
+#define xchal_cp3_load_a2       xchal_cp3_load   a2,a3,a4,a5,a6
+#define xchal_cp4_store_a2      xchal_cp4_store  a2,a3,a4,a5,a6
+#define xchal_cp4_load_a2       xchal_cp4_load   a2,a3,a4,a5,a6
+#define xchal_cp5_store_a2      xchal_cp5_store  a2,a3,a4,a5,a6
+#define xchal_cp5_load_a2       xchal_cp5_load   a2,a3,a4,a5,a6
+#define xchal_cp6_store_a2      xchal_cp6_store  a2,a3,a4,a5,a6
+#define xchal_cp6_load_a2       xchal_cp6_load   a2,a3,a4,a5,a6
+#define xchal_cp7_store_a2      xchal_cp7_store  a2,a3,a4,a5,a6
+#define xchal_cp7_load_a2       xchal_cp7_load   a2,a3,a4,a5,a6
+
+/*  Empty placeholder macros for undefined coprocessors:  */
+#if (XCHAL_CP_MASK & ~XCHAL_CP_PORT_MASK) == 0
+# if XCHAL_CP0_SA_SIZE == 0
+.macro xchal_cp0_store  p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+.macro xchal_cp0_load   p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+# endif
+# if XCHAL_CP1_SA_SIZE == 0
+.macro xchal_cp1_store  p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+.macro xchal_cp1_load   p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+# endif
+# if XCHAL_CP2_SA_SIZE == 0
+.macro xchal_cp2_store  p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+.macro xchal_cp2_load   p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+# endif
+# if XCHAL_CP3_SA_SIZE == 0
+.macro xchal_cp3_store  p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+.macro xchal_cp3_load   p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+# endif
+# if XCHAL_CP4_SA_SIZE == 0
+.macro xchal_cp4_store  p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+.macro xchal_cp4_load   p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+# endif
+# if XCHAL_CP5_SA_SIZE == 0
+.macro xchal_cp5_store  p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+.macro xchal_cp5_load   p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+# endif
+# if XCHAL_CP6_SA_SIZE == 0
+.macro xchal_cp6_store  p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+.macro xchal_cp6_load   p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+# endif
+# if XCHAL_CP7_SA_SIZE == 0
+.macro xchal_cp7_store  p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+.macro xchal_cp7_load   p a b c d continue = 0 ofs = -1 select = -1 ; .endm
+# endif
+#endif
+
+/********************
+ *  Macros to create functions that save and restore the state of *any* TIE
+ *  coprocessor (by dynamic index).
+ */
+
+/*
+ *  Macro that expands to the body of a function
+ *  that stores the selected coprocessor's state (registers etc).
+ *  Entry:  a2 = ptr to save area in which to save cp state
+ *      a3 = coprocessor number
+ *  Exit:   any register a2-a15 (?) may have been clobbered.
+ */
+.macro  xchal_cpi_store_funcbody
+#if (XCHAL_CP_MASK & ~XCHAL_CP_PORT_MASK)
+# if XCHAL_CP0_SA_SIZE
+bnez    a3, 99f
+xchal_cp0_store_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP1_SA_SIZE
+bnei    a3, 1, 99f
+xchal_cp1_store_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP2_SA_SIZE
+bnei    a3, 2, 99f
+xchal_cp2_store_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP3_SA_SIZE
+bnei    a3, 3, 99f
+xchal_cp3_store_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP4_SA_SIZE
+bnei    a3, 4, 99f
+xchal_cp4_store_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP5_SA_SIZE
+bnei    a3, 5, 99f
+xchal_cp5_store_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP6_SA_SIZE
+bnei    a3, 6, 99f
+xchal_cp6_store_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP7_SA_SIZE
+bnei    a3, 7, 99f
+xchal_cp7_store_a2
+j   90f
+99:
+# endif
+90:
+#endif
+.endm
+
+/*
+ *  Macro that expands to the body of a function
+ *  that loads the selected coprocessor's state (registers etc).
+ *  Entry:  a2 = ptr to save area from which to restore cp state
+ *      a3 = coprocessor number
+ *  Exit:   any register a2-a15 (?) may have been clobbered.
+ */
+.macro  xchal_cpi_load_funcbody
+#if (XCHAL_CP_MASK & ~XCHAL_CP_PORT_MASK)
+# if XCHAL_CP0_SA_SIZE
+bnez    a3, 99f
+xchal_cp0_load_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP1_SA_SIZE
+bnei    a3, 1, 99f
+xchal_cp1_load_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP2_SA_SIZE
+bnei    a3, 2, 99f
+xchal_cp2_load_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP3_SA_SIZE
+bnei    a3, 3, 99f
+xchal_cp3_load_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP4_SA_SIZE
+bnei    a3, 4, 99f
+xchal_cp4_load_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP5_SA_SIZE
+bnei    a3, 5, 99f
+xchal_cp5_load_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP6_SA_SIZE
+bnei    a3, 6, 99f
+xchal_cp6_load_a2
+j   90f
+99:
+# endif
+# if XCHAL_CP7_SA_SIZE
+bnei    a3, 7, 99f
+xchal_cp7_load_a2
+j   90f
+99:
+# endif
+90:
+#endif
+.endm
+
+#endif /*_ASMLANGUAGE or __ASSEMBLER__*/
+
+
+/*  Other default macros for undefined coprocessors:  */
+#ifndef XCHAL_CP0_NAME
+# define XCHAL_CP0_NAME             0
+# define XCHAL_CP0_SA_CONTENTS_LIBDB_NUM    0
+# define XCHAL_CP0_SA_CONTENTS_LIBDB        /* empty */
+#endif
+#ifndef XCHAL_CP1_NAME
+# define XCHAL_CP1_NAME             0
+# define XCHAL_CP1_SA_CONTENTS_LIBDB_NUM    0
+# define XCHAL_CP1_SA_CONTENTS_LIBDB        /* empty */
+#endif
+#ifndef XCHAL_CP2_NAME
+# define XCHAL_CP2_NAME             0
+# define XCHAL_CP2_SA_CONTENTS_LIBDB_NUM    0
+# define XCHAL_CP2_SA_CONTENTS_LIBDB        /* empty */
+#endif
+#ifndef XCHAL_CP3_NAME
+# define XCHAL_CP3_NAME             0
+# define XCHAL_CP3_SA_CONTENTS_LIBDB_NUM    0
+# define XCHAL_CP3_SA_CONTENTS_LIBDB        /* empty */
+#endif
+#ifndef XCHAL_CP4_NAME
+# define XCHAL_CP4_NAME             0
+# define XCHAL_CP4_SA_CONTENTS_LIBDB_NUM    0
+# define XCHAL_CP4_SA_CONTENTS_LIBDB        /* empty */
+#endif
+#ifndef XCHAL_CP5_NAME
+# define XCHAL_CP5_NAME             0
+# define XCHAL_CP5_SA_CONTENTS_LIBDB_NUM    0
+# define XCHAL_CP5_SA_CONTENTS_LIBDB        /* empty */
+#endif
+#ifndef XCHAL_CP6_NAME
+# define XCHAL_CP6_NAME             0
+# define XCHAL_CP6_SA_CONTENTS_LIBDB_NUM    0
+# define XCHAL_CP6_SA_CONTENTS_LIBDB        /* empty */
+#endif
+#ifndef XCHAL_CP7_NAME
+# define XCHAL_CP7_NAME             0
+# define XCHAL_CP7_SA_CONTENTS_LIBDB_NUM    0
+# define XCHAL_CP7_SA_CONTENTS_LIBDB        /* empty */
+#endif
+
+#if XCHAL_CP_MASK == 0
+/*  Filler info for unassigned coprocessors, to simplify arrays etc:  */
+#define XCHAL_CP0_SA_SIZE               0
+#define XCHAL_CP0_SA_ALIGN              1
+#define XCHAL_CP1_SA_SIZE               0
+#define XCHAL_CP1_SA_ALIGN              1
+#define XCHAL_CP2_SA_SIZE               0
+#define XCHAL_CP2_SA_ALIGN              1
+#define XCHAL_CP3_SA_SIZE               0
+#define XCHAL_CP3_SA_ALIGN              1
+#define XCHAL_CP4_SA_SIZE               0
+#define XCHAL_CP4_SA_ALIGN              1
+#define XCHAL_CP5_SA_SIZE               0
+#define XCHAL_CP5_SA_ALIGN              1
+#define XCHAL_CP6_SA_SIZE               0
+#define XCHAL_CP6_SA_ALIGN              1
+#define XCHAL_CP7_SA_SIZE               0
+#define XCHAL_CP7_SA_ALIGN              1
+#endif
+
+
+/*  Indexing macros:  */
+#define _XCHAL_CP_SA_SIZE(n)        XCHAL_CP ## n ## _SA_SIZE
+#define XCHAL_CP_SA_SIZE(n)     _XCHAL_CP_SA_SIZE(n)    /* n = 0 .. 7 */
+#define _XCHAL_CP_SA_ALIGN(n)       XCHAL_CP ## n ## _SA_ALIGN
+#define XCHAL_CP_SA_ALIGN(n)        _XCHAL_CP_SA_ALIGN(n)   /* n = 0 .. 7 */
+
+#define XCHAL_CPEXTRA_SA_SIZE_TOR2      XCHAL_CPEXTRA_SA_SIZE   /* Tor2Beta only - do not use */
+
+/*  Link-time HAL global variables that report coprocessor numbers by name
+    (names are case-preserved from the original TIE):  */
+#if !defined(_ASMLANGUAGE) && !defined(_NOCLANGUAGE) && !defined(__ASSEMBLER__)
+# define _XCJOIN(a,b)   a ## b
+# define XCJOIN(a,b)    _XCJOIN(a,b)
+# ifdef XCHAL_CP0_NAME
+extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP0_IDENT);
+extern const unsigned int  XCJOIN(Xthal_cp_mask_, XCHAL_CP0_IDENT);
+# endif
+# ifdef XCHAL_CP1_NAME
+extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP1_IDENT);
+extern const unsigned int  XCJOIN(Xthal_cp_mask_, XCHAL_CP1_IDENT);
+# endif
+# ifdef XCHAL_CP2_NAME
+extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP2_IDENT);
+extern const unsigned int  XCJOIN(Xthal_cp_mask_, XCHAL_CP2_IDENT);
+# endif
+# ifdef XCHAL_CP3_NAME
+extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP3_IDENT);
+extern const unsigned int  XCJOIN(Xthal_cp_mask_, XCHAL_CP3_IDENT);
+# endif
+# ifdef XCHAL_CP4_NAME
+extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP4_IDENT);
+extern const unsigned int  XCJOIN(Xthal_cp_mask_, XCHAL_CP4_IDENT);
+# endif
+# ifdef XCHAL_CP5_NAME
+extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP5_IDENT);
+extern const unsigned int  XCJOIN(Xthal_cp_mask_, XCHAL_CP5_IDENT);
+# endif
+# ifdef XCHAL_CP6_NAME
+extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP6_IDENT);
+extern const unsigned int  XCJOIN(Xthal_cp_mask_, XCHAL_CP6_IDENT);
+# endif
+# ifdef XCHAL_CP7_NAME
+extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP7_IDENT);
+extern const unsigned int  XCJOIN(Xthal_cp_mask_, XCHAL_CP7_IDENT);
+# endif
+#endif
+
+
+
+
+/*----------------------------------------------------------------------
+                DERIVED
+  ----------------------------------------------------------------------*/
+
+#if XCHAL_HAVE_BE
+#define XCHAL_INST_ILLN         0xD60F      /* 2-byte illegal instruction, msb-first */
+#define XCHAL_INST_ILLN_BYTE0       0xD6        /* 2-byte illegal instruction, 1st byte */
+#define XCHAL_INST_ILLN_BYTE1       0x0F        /* 2-byte illegal instruction, 2nd byte */
+#else
+#define XCHAL_INST_ILLN         0xF06D      /* 2-byte illegal instruction, lsb-first */
+#define XCHAL_INST_ILLN_BYTE0       0x6D        /* 2-byte illegal instruction, 1st byte */
+#define XCHAL_INST_ILLN_BYTE1       0xF0        /* 2-byte illegal instruction, 2nd byte */
+#endif
+/*  Belongs in xtensa/hal.h:  */
+#define XTHAL_INST_ILL          0x000000    /* 3-byte illegal instruction */
+
+
+/*
+ *  Because information as to exactly which hardware version is targeted
+ *  by a given software build is not always available, compile-time HAL
+ *  Hardware-Release "_AT" macros are fuzzy (return 0, 1, or XCHAL_MAYBE):
+ *  (Here "RELEASE" is now a misnomer; these are product *versions*, not the releases
+ *   under which they are released.  In the T10##.# era there was no distinction.)
+ */
+#if XCHAL_HW_CONFIGID_RELIABLE
+# define XCHAL_HW_RELEASE_AT_OR_BELOW(major,minor)  (XTHAL_REL_LE( XCHAL_HW_VERSION_MAJOR,XCHAL_HW_VERSION_MINOR, major,minor ) ? 1 : 0)
+# define XCHAL_HW_RELEASE_AT_OR_ABOVE(major,minor)  (XTHAL_REL_GE( XCHAL_HW_VERSION_MAJOR,XCHAL_HW_VERSION_MINOR, major,minor ) ? 1 : 0)
+# define XCHAL_HW_RELEASE_AT(major,minor)       (XTHAL_REL_EQ( XCHAL_HW_VERSION_MAJOR,XCHAL_HW_VERSION_MINOR, major,minor ) ? 1 : 0)
+# define XCHAL_HW_RELEASE_MAJOR_AT(major)       ((XCHAL_HW_VERSION_MAJOR == (major)) ? 1 : 0)
+#else
+# define XCHAL_HW_RELEASE_AT_OR_BELOW(major,minor)  ( ((major) < 1040 && XCHAL_HAVE_XEA2) ? 0 \
+                            : ((major) > 1050 && XCHAL_HAVE_XEA1) ? 1 \
+                            : XTHAL_MAYBE )
+# define XCHAL_HW_RELEASE_AT_OR_ABOVE(major,minor)  ( ((major) >= 2000 && XCHAL_HAVE_XEA1) ? 0 \
+                            : (XTHAL_REL_LE(major,minor, 1040,0) && XCHAL_HAVE_XEA2) ? 1 \
+                            : XTHAL_MAYBE )
+# define XCHAL_HW_RELEASE_AT(major,minor)       ( (((major) < 1040 && XCHAL_HAVE_XEA2) || \
+                               ((major) >= 2000 && XCHAL_HAVE_XEA1)) ? 0 : XTHAL_MAYBE)
+# define XCHAL_HW_RELEASE_MAJOR_AT(major)       XCHAL_HW_RELEASE_AT(major,0)
+#endif
+
+
+#endif /*XTENSA_CONFIG_CORE_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/defs.h b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/defs.h
new file mode 100644
index 00000000000..e89655c4928
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/defs.h
@@ -0,0 +1,38 @@
+/* Definitions for Xtensa instructions, types, and protos. */
+
+/* Customer ID=15128; Build=0x90f1f; Copyright (c) 2003-2004 Tensilica Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
+
+/* NOTE: This file exists only for backward compatibility with T1050
+   and earlier Xtensa releases.  It includes only a subset of the
+   available header files.  */
+
+#ifndef _XTENSA_BASE_HEADER
+#define _XTENSA_BASE_HEADER
+
+#ifdef __XTENSA__
+
+#include <xtensa/tie/xt_core.h>
+#include <xtensa/tie/xt_misc.h>
+#include <xtensa/tie/xt_booleans.h>
+
+#endif /* __XTENSA__ */
+#endif /* !_XTENSA_BASE_HEADER */
diff --git a/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/extreg.h b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/extreg.h
new file mode 100644
index 00000000000..3db7b8c3bdb
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/extreg.h
@@ -0,0 +1,21 @@
+/*
+ * ESP32-S3 External Register symbolic names
+ */
+
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define DSRSET 0x10200C
diff --git a/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/specreg.h b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/specreg.h
new file mode 100644
index 00000000000..a49974c1ca5
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/specreg.h
@@ -0,0 +1,118 @@
+/*
+ * Xtensa Special Register symbolic names
+ */
+
+/* $Id: //depot/rel/Foxhill/dot.12/Xtensa/SWConfig/hal/specreg.h.tpp#1 $ */
+
+/* Customer ID=15128; Build=0x90f1f; Copyright (c) 1998-2002 Tensilica Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
+
+#ifndef XTENSA_SPECREG_H
+#define XTENSA_SPECREG_H
+
+/*  Include these special register bitfield definitions, for historical reasons:  */
+#include <xtensa/corebits.h>
+
+
+/*  Special registers:  */
+#define LBEG		0
+#define LEND		1
+#define LCOUNT		2
+#define SAR		3
+#define BR		4
+#define SCOMPARE1	12
+#define ACCLO		16
+#define ACCHI		17
+#define MR_0		32
+#define MR_1		33
+#define MR_2		34
+#define MR_3		35
+#define WINDOWBASE	72
+#define WINDOWSTART	73
+#define IBREAKENABLE	96
+#define MEMCTL		97
+#define ATOMCTL		99
+#define DDR		104
+#define IBREAKA_0	128
+#define IBREAKA_1	129
+#define DBREAKA_0	144
+#define DBREAKA_1	145
+#define DBREAKC_0	160
+#define DBREAKC_1	161
+#define CONFIGID0    176
+#define EPC_1		177
+#define EPC_2		178
+#define EPC_3		179
+#define EPC_4		180
+#define EPC_5		181
+#define EPC_6		182
+#define EPC_7		183
+#define DEPC		192
+#define EPS_2		194
+#define EPS_3		195
+#define EPS_4		196
+#define EPS_5		197
+#define EPS_6		198
+#define EPS_7		199
+#define CONFIGID1    208
+#define EXCSAVE_1	209
+#define EXCSAVE_2	210
+#define EXCSAVE_3	211
+#define EXCSAVE_4	212
+#define EXCSAVE_5	213
+#define EXCSAVE_6	214
+#define EXCSAVE_7	215
+#define CPENABLE	224
+#define INTERRUPT	226
+#define INTENABLE	228
+#define PS		230
+#define VECBASE		231
+#define EXCCAUSE	232
+#define DEBUGCAUSE	233
+#define CCOUNT		234
+#define PRID		235
+#define ICOUNT		236
+#define ICOUNTLEVEL	237
+#define EXCVADDR	238
+#define CCOMPARE_0	240
+#define CCOMPARE_1	241
+#define CCOMPARE_2	242
+#define MISC_REG_0	244
+#define MISC_REG_1	245
+#define MISC_REG_2	246
+#define MISC_REG_3	247
+
+/*  Special cases (bases of special register series):  */
+#define MR		32
+#define IBREAKA		128
+#define DBREAKA		144
+#define DBREAKC		160
+#define EPC		176
+#define EPS		192
+#define EXCSAVE		208
+#define CCOMPARE	240
+
+/*  Special names for read-only and write-only interrupt registers:  */
+#define INTREAD		226
+#define INTSET		226
+#define INTCLEAR	227
+
+#endif /* XTENSA_SPECREG_H */
diff --git a/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/system.h b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/system.h
new file mode 100644
index 00000000000..ee68e4eab7e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/system.h
@@ -0,0 +1,276 @@
+/*
+ * xtensa/config/system.h -- HAL definitions that are dependent on SYSTEM configuration
+ *
+ *  NOTE: The location and contents of this file are highly subject to change.
+ *
+ *  Source for configuration-independent binaries (which link in a
+ *  configuration-specific HAL library) must NEVER include this file.
+ *  The HAL itself has historically included this file in some instances,
+ *  but this is not appropriate either, because the HAL is meant to be
+ *  core-specific but system independent.
+ */
+
+/* Customer ID=15128; Build=0x90f1f; Copyright (c) 2000-2010 Tensilica Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
+
+
+#ifndef XTENSA_CONFIG_SYSTEM_H
+#define XTENSA_CONFIG_SYSTEM_H
+
+/*#include <xtensa/hal.h>*/
+
+
+
+/*----------------------------------------------------------------------
+				CONFIGURED SOFTWARE OPTIONS
+  ----------------------------------------------------------------------*/
+
+#define XSHAL_USE_ABSOLUTE_LITERALS	0	/* (sw-only option, whether software uses absolute literals) */
+#define XSHAL_HAVE_TEXT_SECTION_LITERALS 1 /* Set if there is some memory that allows both code and literals.  */
+
+#define XSHAL_ABI			XTHAL_ABI_WINDOWED	/* (sw-only option, selected ABI) */
+/*  The above maps to one of the following constants:  */
+#define XTHAL_ABI_WINDOWED		0
+#define XTHAL_ABI_CALL0			1
+/*  Alternatives:  */
+/*#define XSHAL_WINDOWED_ABI		1*/	/* set if windowed ABI selected */
+/*#define XSHAL_CALL0_ABI		0*/	/* set if call0 ABI selected */
+
+#define XSHAL_CLIB			XTHAL_CLIB_NEWLIB	/* (sw-only option, selected C library) */
+/*  The above maps to one of the following constants:  */
+#define XTHAL_CLIB_NEWLIB		0
+#define XTHAL_CLIB_UCLIBC		1
+#define XTHAL_CLIB_XCLIB		2
+/*  Alternatives:  */
+/*#define XSHAL_NEWLIB			1*/	/* set if newlib C library selected */
+/*#define XSHAL_UCLIBC			0*/	/* set if uCLibC C library selected */
+/*#define XSHAL_XCLIB			0*/	/* set if Xtensa C library selected */
+
+#define XSHAL_USE_FLOATING_POINT	1
+
+#define XSHAL_FLOATING_POINT_ABI	0
+
+/*  SW workarounds enabled for HW errata:  */
+
+/*  SW options for functional safety:  */
+#define XSHAL_FUNC_SAFETY_ENABLED	0
+
+/*----------------------------------------------------------------------
+				DEVICE ADDRESSES
+  ----------------------------------------------------------------------*/
+
+/*
+ *  Strange place to find these, but the configuration GUI
+ *  allows moving these around to account for various core
+ *  configurations.  Specific boards (and their BSP software)
+ *  will have specific meanings for these components.
+ */
+
+/*  I/O Block areas:  */
+#define XSHAL_IOBLOCK_CACHED_VADDR	0x70000000
+#define XSHAL_IOBLOCK_CACHED_PADDR	0x70000000
+#define XSHAL_IOBLOCK_CACHED_SIZE	0x0E000000
+
+#define XSHAL_IOBLOCK_BYPASS_VADDR	0x90000000
+#define XSHAL_IOBLOCK_BYPASS_PADDR	0x90000000
+#define XSHAL_IOBLOCK_BYPASS_SIZE	0x0E000000
+
+/*  System ROM:  */
+#define XSHAL_ROM_VADDR		0x50000000
+#define XSHAL_ROM_PADDR		0x50000000
+#define XSHAL_ROM_SIZE		0x01000000
+/*  Largest available area (free of vectors):  */
+#define XSHAL_ROM_AVAIL_VADDR	0x50000000
+#define XSHAL_ROM_AVAIL_VSIZE	0x01000000
+
+/*  System RAM:  */
+#define XSHAL_RAM_VADDR		0x60000000
+#define XSHAL_RAM_PADDR		0x60000000
+#define XSHAL_RAM_VSIZE		0x20000000
+#define XSHAL_RAM_PSIZE		0x20000000
+#define XSHAL_RAM_SIZE		XSHAL_RAM_PSIZE
+/*  Largest available area (free of vectors):  */
+#define XSHAL_RAM_AVAIL_VADDR	0x60000000
+#define XSHAL_RAM_AVAIL_VSIZE	0x20000000
+
+/*
+ *  Shadow system RAM (same device as system RAM, at different address).
+ *  (Emulation boards need this for the SONIC Ethernet driver
+ *   when data caches are configured for writeback mode.)
+ *  NOTE: on full MMU configs, this points to the BYPASS virtual address
+ *  of system RAM, ie. is the same as XSHAL_RAM_* except that virtual
+ *  addresses are viewed through the BYPASS static map rather than
+ *  the CACHED static map.
+ */
+#define XSHAL_RAM_BYPASS_VADDR		0xA0000000
+#define XSHAL_RAM_BYPASS_PADDR		0xA0000000
+#define XSHAL_RAM_BYPASS_PSIZE		0x20000000
+
+/*  Alternate system RAM (different device than system RAM):  */
+/*#define XSHAL_ALTRAM_[VP]ADDR		...not configured...*/
+/*#define XSHAL_ALTRAM_SIZE		...not configured...*/
+
+/*  Some available location in which to place devices in a simulation (eg. XTMP):  */
+#define XSHAL_SIMIO_CACHED_VADDR	0xC0000000
+#define XSHAL_SIMIO_BYPASS_VADDR	0xC0000000
+#define XSHAL_SIMIO_PADDR		0xC0000000
+#define XSHAL_SIMIO_SIZE		0x20000000
+
+
+/*----------------------------------------------------------------------
+ *  For use by reference testbench exit and diagnostic routines.
+ */
+#define XSHAL_MAGIC_EXIT		0x0
+
+/*----------------------------------------------------------------------
+ *			DEVICE-ADDRESS DEPENDENT...
+ *
+ *  Values written to CACHEATTR special register (or its equivalent)
+ *  to enable and disable caches in various modes.
+ *----------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------
+			BACKWARD COMPATIBILITY ...
+  ----------------------------------------------------------------------*/
+
+/*
+ *  NOTE:  the following two macros are DEPRECATED.  Use the latter
+ *  board-specific macros instead, which are specially tuned for the
+ *  particular target environments' memory maps.
+ */
+#define XSHAL_CACHEATTR_BYPASS		XSHAL_XT2000_CACHEATTR_BYPASS	/* disable caches in bypass mode */
+#define XSHAL_CACHEATTR_DEFAULT		XSHAL_XT2000_CACHEATTR_DEFAULT	/* default setting to enable caches (no writeback!) */
+
+/*----------------------------------------------------------------------
+				GENERIC
+  ----------------------------------------------------------------------*/
+
+/*  For the following, a 512MB region is used if it contains a system (PIF) RAM,
+ *  system (PIF) ROM, local memory, or XLMI.  */
+
+/*  These set any unused 512MB region to cache-BYPASS attribute:  */
+#define XSHAL_ALLVALID_CACHEATTR_WRITEBACK	0x22221112	/* enable caches in write-back mode */
+#define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC	0x22221112	/* enable caches in write-allocate mode */
+#define XSHAL_ALLVALID_CACHEATTR_WRITETHRU	0x22221112	/* enable caches in write-through mode */
+#define XSHAL_ALLVALID_CACHEATTR_BYPASS		0x22222222	/* disable caches in bypass mode */
+#define XSHAL_ALLVALID_CACHEATTR_DEFAULT	XSHAL_ALLVALID_CACHEATTR_WRITEBACK	/* default setting to enable caches */
+
+/*  These set any unused 512MB region to ILLEGAL attribute:  */
+#define XSHAL_STRICT_CACHEATTR_WRITEBACK	0xFFFF111F	/* enable caches in write-back mode */
+#define XSHAL_STRICT_CACHEATTR_WRITEALLOC	0xFFFF111F	/* enable caches in write-allocate mode */
+#define XSHAL_STRICT_CACHEATTR_WRITETHRU	0xFFFF111F	/* enable caches in write-through mode */
+#define XSHAL_STRICT_CACHEATTR_BYPASS		0xFFFF222F	/* disable caches in bypass mode */
+#define XSHAL_STRICT_CACHEATTR_DEFAULT		XSHAL_STRICT_CACHEATTR_WRITEBACK	/* default setting to enable caches */
+
+/*  These set the first 512MB, if unused, to ILLEGAL attribute to help catch
+ *  NULL-pointer dereference bugs; all other unused 512MB regions are set
+ *  to cache-BYPASS attribute:  */
+#define XSHAL_TRAPNULL_CACHEATTR_WRITEBACK	0x2222111F	/* enable caches in write-back mode */
+#define XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC	0x2222111F	/* enable caches in write-allocate mode */
+#define XSHAL_TRAPNULL_CACHEATTR_WRITETHRU	0x2222111F	/* enable caches in write-through mode */
+#define XSHAL_TRAPNULL_CACHEATTR_BYPASS		0x2222222F	/* disable caches in bypass mode */
+#define XSHAL_TRAPNULL_CACHEATTR_DEFAULT	XSHAL_TRAPNULL_CACHEATTR_WRITEBACK	/* default setting to enable caches */
+
+/*----------------------------------------------------------------------
+			ISS (Instruction Set Simulator) SPECIFIC ...
+  ----------------------------------------------------------------------*/
+
+/*  For now, ISS defaults to the TRAPNULL settings:  */
+#define XSHAL_ISS_CACHEATTR_WRITEBACK	XSHAL_TRAPNULL_CACHEATTR_WRITEBACK
+#define XSHAL_ISS_CACHEATTR_WRITEALLOC	XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC
+#define XSHAL_ISS_CACHEATTR_WRITETHRU	XSHAL_TRAPNULL_CACHEATTR_WRITETHRU
+#define XSHAL_ISS_CACHEATTR_BYPASS	XSHAL_TRAPNULL_CACHEATTR_BYPASS
+#define XSHAL_ISS_CACHEATTR_DEFAULT	XSHAL_TRAPNULL_CACHEATTR_WRITEBACK
+
+#define XSHAL_ISS_PIPE_REGIONS	0
+#define XSHAL_ISS_SDRAM_REGIONS	0
+
+
+/*----------------------------------------------------------------------
+			XT2000 BOARD SPECIFIC ...
+  ----------------------------------------------------------------------*/
+
+/*  For the following, a 512MB region is used if it contains any system RAM,
+ *  system ROM, local memory, XLMI, or other XT2000 board device or memory.
+ *  Regions containing devices are forced to cache-BYPASS mode regardless
+ *  of whether the macro is _WRITEBACK vs. _BYPASS etc.  */
+
+/*  These set any 512MB region unused on the XT2000 to ILLEGAL attribute:  */
+#define XSHAL_XT2000_CACHEATTR_WRITEBACK	0xFF22111F	/* enable caches in write-back mode */
+#define XSHAL_XT2000_CACHEATTR_WRITEALLOC	0xFF22111F	/* enable caches in write-allocate mode */
+#define XSHAL_XT2000_CACHEATTR_WRITETHRU	0xFF22111F	/* enable caches in write-through mode */
+#define XSHAL_XT2000_CACHEATTR_BYPASS		0xFF22222F	/* disable caches in bypass mode */
+#define XSHAL_XT2000_CACHEATTR_DEFAULT		XSHAL_XT2000_CACHEATTR_WRITEBACK	/* default setting to enable caches */
+
+#define XSHAL_XT2000_PIPE_REGIONS	0x00000000	/* BusInt pipeline regions */
+#define XSHAL_XT2000_SDRAM_REGIONS	0x00000440	/* BusInt SDRAM regions */
+
+
+/*----------------------------------------------------------------------
+				VECTOR INFO AND SIZES
+  ----------------------------------------------------------------------*/
+
+#define XSHAL_VECTORS_PACKED		0
+#define XSHAL_STATIC_VECTOR_SELECT	1
+#define XSHAL_RESET_VECTOR_VADDR	0x40000400
+#define XSHAL_RESET_VECTOR_PADDR	0x40000400
+
+/*
+ *  Sizes allocated to vectors by the system (memory map) configuration.
+ *  These sizes are constrained by core configuration (eg. one vector's
+ *  code cannot overflow into another vector) but are dependent on the
+ *  system or board (or LSP) memory map configuration.
+ *
+ *  Whether or not each vector happens to be in a system ROM is also
+ *  a system configuration matter, sometimes useful, included here also:
+ */
+#define XSHAL_RESET_VECTOR_SIZE	0x00000300
+#define XSHAL_RESET_VECTOR_ISROM	0
+#define XSHAL_USER_VECTOR_SIZE	0x00000038
+#define XSHAL_USER_VECTOR_ISROM	0
+#define XSHAL_PROGRAMEXC_VECTOR_SIZE	XSHAL_USER_VECTOR_SIZE	/* for backward compatibility */
+#define XSHAL_USEREXC_VECTOR_SIZE	XSHAL_USER_VECTOR_SIZE	/* for backward compatibility */
+#define XSHAL_KERNEL_VECTOR_SIZE	0x00000038
+#define XSHAL_KERNEL_VECTOR_ISROM	0
+#define XSHAL_STACKEDEXC_VECTOR_SIZE	XSHAL_KERNEL_VECTOR_SIZE	/* for backward compatibility */
+#define XSHAL_KERNELEXC_VECTOR_SIZE	XSHAL_KERNEL_VECTOR_SIZE	/* for backward compatibility */
+#define XSHAL_DOUBLEEXC_VECTOR_SIZE	0x00000040
+#define XSHAL_DOUBLEEXC_VECTOR_ISROM	0
+#define XSHAL_WINDOW_VECTORS_SIZE	0x00000178
+#define XSHAL_WINDOW_VECTORS_ISROM	0
+#define XSHAL_INTLEVEL2_VECTOR_SIZE	0x00000038
+#define XSHAL_INTLEVEL2_VECTOR_ISROM	0
+#define XSHAL_INTLEVEL3_VECTOR_SIZE	0x00000038
+#define XSHAL_INTLEVEL3_VECTOR_ISROM	0
+#define XSHAL_INTLEVEL4_VECTOR_SIZE	0x00000038
+#define XSHAL_INTLEVEL4_VECTOR_ISROM	0
+#define XSHAL_INTLEVEL5_VECTOR_SIZE	0x00000038
+#define XSHAL_INTLEVEL5_VECTOR_ISROM	0
+#define XSHAL_INTLEVEL6_VECTOR_SIZE	0x00000038
+#define XSHAL_INTLEVEL6_VECTOR_ISROM	0
+#define XSHAL_DEBUG_VECTOR_SIZE		XSHAL_INTLEVEL6_VECTOR_SIZE
+#define XSHAL_DEBUG_VECTOR_ISROM	XSHAL_INTLEVEL6_VECTOR_ISROM
+#define XSHAL_NMI_VECTOR_SIZE	0x00000038
+#define XSHAL_NMI_VECTOR_ISROM	0
+#define XSHAL_INTLEVEL7_VECTOR_SIZE	XSHAL_NMI_VECTOR_SIZE
+
+
+#endif /*XTENSA_CONFIG_SYSTEM_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/tie-asm.h b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/tie-asm.h
new file mode 100644
index 00000000000..104dc10fd41
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/tie-asm.h
@@ -0,0 +1,429 @@
+/*
+ * tie-asm.h -- compile-time HAL assembler definitions dependent on CORE & TIE
+ *
+ *  NOTE:  This header file is not meant to be included directly.
+ */
+
+/* This header file contains assembly-language definitions (assembly
+   macros, etc.) for this specific Xtensa processor's TIE extensions
+   and options.  It is customized to this Xtensa processor configuration.
+
+   Customer ID=15128; Build=0x90f1f; Copyright (c) 1999-2021 Cadence Design Systems Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
+
+#ifndef _XTENSA_CORE_TIE_ASM_H
+#define _XTENSA_CORE_TIE_ASM_H
+
+/*  Selection parameter values for save-area save/restore macros:  */
+/*  Option vs. TIE:  */
+#define XTHAL_SAS_TIE	0x0001	/* custom extension or coprocessor */
+#define XTHAL_SAS_OPT	0x0002	/* optional (and not a coprocessor) */
+#define XTHAL_SAS_ANYOT	0x0003	/* both of the above */
+/*  Whether used automatically by compiler:  */
+#define XTHAL_SAS_NOCC	0x0004	/* not used by compiler w/o special opts/code */
+#define XTHAL_SAS_CC	0x0008	/* used by compiler without special opts/code */
+#define XTHAL_SAS_ANYCC	0x000C	/* both of the above */
+/*  ABI handling across function calls:  */
+#define XTHAL_SAS_CALR	0x0010	/* caller-saved */
+#define XTHAL_SAS_CALE	0x0020	/* callee-saved */
+#define XTHAL_SAS_GLOB	0x0040	/* global across function calls (in thread) */
+#define XTHAL_SAS_ANYABI	0x0070	/* all of the above three */
+/*  Misc  */
+#define XTHAL_SAS_ALL	0xFFFF	/* include all default NCP contents */
+#define XTHAL_SAS3(optie,ccuse,abi)	( ((optie) & XTHAL_SAS_ANYOT)  \
+					| ((ccuse) & XTHAL_SAS_ANYCC)  \
+					| ((abi)   & XTHAL_SAS_ANYABI) )
+
+
+    /*
+      *  Macro to store all non-coprocessor (extra) custom TIE and optional state
+      *  (not including zero-overhead loop registers).
+      *  Required parameters:
+      *      ptr         Save area pointer address register (clobbered)
+      *                  (register must contain a 4 byte aligned address).
+      *      at1..at4    Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
+      *                  registers are clobbered, the remaining are unused).
+      *  Optional parameters:
+      *      continue    If macro invoked as part of a larger store sequence, set to 1
+      *                  if this is not the first in the sequence.  Defaults to 0.
+      *      ofs         Offset from start of larger sequence (from value of first ptr
+      *                  in sequence) at which to store.  Defaults to next available space
+      *                  (or 0 if <continue> is 0).
+      *      select      Select what category(ies) of registers to store, as a bitmask
+      *                  (see XTHAL_SAS_xxx constants).  Defaults to all registers.
+      *      alloc       Select what category(ies) of registers to allocate; if any
+      *                  category is selected here that is not in <select>, space for
+      *                  the corresponding registers is skipped without doing any store.
+      */
+    .macro xchal_ncp_store  ptr at1 at2 at3 at4  continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
+	xchal_sa_start	\continue, \ofs
+	// Optional global registers used by default by the compiler:
+	.ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~(\select)
+	xchal_sa_align	\ptr, 0, 1016, 4, 4
+	rur.THREADPTR	\at1		// threadptr option
+	s32i	\at1, \ptr, .Lxchal_ofs_+0
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 4
+	.elseif ((XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~(\alloc)) == 0
+	xchal_sa_align	\ptr, 0, 1016, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 4
+	.endif
+	// Optional caller-saved registers used by default by the compiler:
+	.ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_CALR) & ~(\select)
+	xchal_sa_align	\ptr, 0, 1012, 4, 4
+	rsr.ACCLO	\at1		// MAC16 option
+	s32i	\at1, \ptr, .Lxchal_ofs_+0
+	rsr.ACCHI	\at1		// MAC16 option
+	s32i	\at1, \ptr, .Lxchal_ofs_+4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 8
+	.elseif ((XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+	xchal_sa_align	\ptr, 0, 1012, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 8
+	.endif
+	// Optional caller-saved registers not used by default by the compiler:
+	.ifeq (XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
+	xchal_sa_align	\ptr, 0, 996, 4, 4
+	rsr.BR	\at1		// boolean option
+	s32i	\at1, \ptr, .Lxchal_ofs_+0
+	rsr.SCOMPARE1	\at1		// conditional store option
+	s32i	\at1, \ptr, .Lxchal_ofs_+4
+	rsr.M0	\at1		// MAC16 option
+	s32i	\at1, \ptr, .Lxchal_ofs_+8
+	rsr.M1	\at1		// MAC16 option
+	s32i	\at1, \ptr, .Lxchal_ofs_+12
+	rsr.M2	\at1		// MAC16 option
+	s32i	\at1, \ptr, .Lxchal_ofs_+16
+	rsr.M3	\at1		// MAC16 option
+	s32i	\at1, \ptr, .Lxchal_ofs_+20
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 24
+	.elseif ((XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+	xchal_sa_align	\ptr, 0, 996, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 24
+	.endif
+    .endm	// xchal_ncp_store
+
+    /*
+      *  Macro to load all non-coprocessor (extra) custom TIE and optional state
+      *  (not including zero-overhead loop registers).
+      *  Required parameters:
+      *      ptr         Save area pointer address register (clobbered)
+      *                  (register must contain a 4 byte aligned address).
+      *      at1..at4    Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
+      *                  registers are clobbered, the remaining are unused).
+      *  Optional parameters:
+      *      continue    If macro invoked as part of a larger load sequence, set to 1
+      *                  if this is not the first in the sequence.  Defaults to 0.
+      *      ofs         Offset from start of larger sequence (from value of first ptr
+      *                  in sequence) at which to load.  Defaults to next available space
+      *                  (or 0 if <continue> is 0).
+      *      select      Select what category(ies) of registers to load, as a bitmask
+      *                  (see XTHAL_SAS_xxx constants).  Defaults to all registers.
+      *      alloc       Select what category(ies) of registers to allocate; if any
+      *                  category is selected here that is not in <select>, space for
+      *                  the corresponding registers is skipped without doing any load.
+      */
+    .macro xchal_ncp_load  ptr at1 at2 at3 at4  continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
+	xchal_sa_start	\continue, \ofs
+	// Optional global registers used by default by the compiler:
+	.ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~(\select)
+	xchal_sa_align	\ptr, 0, 1016, 4, 4
+	l32i	\at1, \ptr, .Lxchal_ofs_+0
+	wur.THREADPTR	\at1		// threadptr option
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 4
+	.elseif ((XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~(\alloc)) == 0
+	xchal_sa_align	\ptr, 0, 1016, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 4
+	.endif
+	// Optional caller-saved registers used by default by the compiler:
+	.ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_CALR) & ~(\select)
+	xchal_sa_align	\ptr, 0, 1012, 4, 4
+	l32i	\at1, \ptr, .Lxchal_ofs_+0
+	wsr.ACCLO	\at1		// MAC16 option
+	l32i	\at1, \ptr, .Lxchal_ofs_+4
+	wsr.ACCHI	\at1		// MAC16 option
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 8
+	.elseif ((XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+	xchal_sa_align	\ptr, 0, 1012, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 8
+	.endif
+	// Optional caller-saved registers not used by default by the compiler:
+	.ifeq (XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
+	xchal_sa_align	\ptr, 0, 996, 4, 4
+	l32i	\at1, \ptr, .Lxchal_ofs_+0
+	wsr.BR	\at1		// boolean option
+	l32i	\at1, \ptr, .Lxchal_ofs_+4
+	wsr.SCOMPARE1	\at1		// conditional store option
+	l32i	\at1, \ptr, .Lxchal_ofs_+8
+	wsr.M0	\at1		// MAC16 option
+	l32i	\at1, \ptr, .Lxchal_ofs_+12
+	wsr.M1	\at1		// MAC16 option
+	l32i	\at1, \ptr, .Lxchal_ofs_+16
+	wsr.M2	\at1		// MAC16 option
+	l32i	\at1, \ptr, .Lxchal_ofs_+20
+	wsr.M3	\at1		// MAC16 option
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 24
+	.elseif ((XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+	xchal_sa_align	\ptr, 0, 996, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 24
+	.endif
+    .endm	// xchal_ncp_load
+
+
+#define XCHAL_NCP_NUM_ATMPS	1
+
+    /*
+     *  Macro to store the state of TIE coprocessor FPU.
+     *  Required parameters:
+     *      ptr         Save area pointer address register (clobbered)
+     *                  (register must contain a 4 byte aligned address).
+     *      at1..at4    Four temporary address registers (first XCHAL_CP0_NUM_ATMPS
+     *                  registers are clobbered, the remaining are unused).
+     *  Optional parameters are the same as for xchal_ncp_store.
+     */
+#define xchal_cp_FPU_store	xchal_cp0_store
+    .macro	xchal_cp0_store  ptr at1 at2 at3 at4  continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
+	xchal_sa_start \continue, \ofs
+	// Custom caller-saved registers not used by default by the compiler:
+	.ifeq (XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
+	xchal_sa_align	\ptr, 0, 948, 4, 4
+	rur.FCR	\at1		// ureg 232
+	s32i	\at1, \ptr, .Lxchal_ofs_+0
+	rur.FSR	\at1		// ureg 233
+	s32i	\at1, \ptr, .Lxchal_ofs_+4
+	ssi	f0, \ptr, .Lxchal_ofs_+8
+	ssi	f1, \ptr, .Lxchal_ofs_+12
+	ssi	f2, \ptr, .Lxchal_ofs_+16
+	ssi	f3, \ptr, .Lxchal_ofs_+20
+	ssi	f4, \ptr, .Lxchal_ofs_+24
+	ssi	f5, \ptr, .Lxchal_ofs_+28
+	ssi	f6, \ptr, .Lxchal_ofs_+32
+	ssi	f7, \ptr, .Lxchal_ofs_+36
+	ssi	f8, \ptr, .Lxchal_ofs_+40
+	ssi	f9, \ptr, .Lxchal_ofs_+44
+	ssi	f10, \ptr, .Lxchal_ofs_+48
+	ssi	f11, \ptr, .Lxchal_ofs_+52
+	ssi	f12, \ptr, .Lxchal_ofs_+56
+	ssi	f13, \ptr, .Lxchal_ofs_+60
+	ssi	f14, \ptr, .Lxchal_ofs_+64
+	ssi	f15, \ptr, .Lxchal_ofs_+68
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 72
+	.elseif ((XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+	xchal_sa_align	\ptr, 0, 948, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 72
+	.endif
+    .endm	// xchal_cp0_store
+
+    /*
+     *  Macro to load the state of TIE coprocessor FPU.
+     *  Required parameters:
+     *      ptr         Save area pointer address register (clobbered)
+     *                  (register must contain a 4 byte aligned address).
+     *      at1..at4    Four temporary address registers (first XCHAL_CP0_NUM_ATMPS
+     *                  registers are clobbered, the remaining are unused).
+     *  Optional parameters are the same as for xchal_ncp_load.
+     */
+#define xchal_cp_FPU_load	xchal_cp0_load
+    .macro	xchal_cp0_load  ptr at1 at2 at3 at4  continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
+	xchal_sa_start \continue, \ofs
+	// Custom caller-saved registers not used by default by the compiler:
+	.ifeq (XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
+	xchal_sa_align	\ptr, 0, 948, 4, 4
+	l32i	\at1, \ptr, .Lxchal_ofs_+0
+	wur.FCR	\at1		// ureg 232
+	l32i	\at1, \ptr, .Lxchal_ofs_+4
+	wur.FSR	\at1		// ureg 233
+	lsi	f0, \ptr, .Lxchal_ofs_+8
+	lsi	f1, \ptr, .Lxchal_ofs_+12
+	lsi	f2, \ptr, .Lxchal_ofs_+16
+	lsi	f3, \ptr, .Lxchal_ofs_+20
+	lsi	f4, \ptr, .Lxchal_ofs_+24
+	lsi	f5, \ptr, .Lxchal_ofs_+28
+	lsi	f6, \ptr, .Lxchal_ofs_+32
+	lsi	f7, \ptr, .Lxchal_ofs_+36
+	lsi	f8, \ptr, .Lxchal_ofs_+40
+	lsi	f9, \ptr, .Lxchal_ofs_+44
+	lsi	f10, \ptr, .Lxchal_ofs_+48
+	lsi	f11, \ptr, .Lxchal_ofs_+52
+	lsi	f12, \ptr, .Lxchal_ofs_+56
+	lsi	f13, \ptr, .Lxchal_ofs_+60
+	lsi	f14, \ptr, .Lxchal_ofs_+64
+	lsi	f15, \ptr, .Lxchal_ofs_+68
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 72
+	.elseif ((XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+	xchal_sa_align	\ptr, 0, 948, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 72
+	.endif
+    .endm	// xchal_cp0_load
+
+#define XCHAL_CP0_NUM_ATMPS	1
+    /*
+     *  Macro to store the state of TIE coprocessor cop_ai.
+     *  Required parameters:
+     *      ptr         Save area pointer address register (clobbered)
+     *                  (register must contain a 16 byte aligned address).
+     *      at1..at4    Four temporary address registers (first XCHAL_CP3_NUM_ATMPS
+     *                  registers are clobbered, the remaining are unused).
+     *  Optional parameters are the same as for xchal_ncp_store.
+     */
+#define xchal_cp_cop_ai_store	xchal_cp3_store
+    .macro	xchal_cp3_store  ptr at1 at2 at3 at4  continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
+	xchal_sa_start \continue, \ofs
+	// Custom caller-saved registers not used by default by the compiler:
+	.ifeq (XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
+	xchal_sa_align	\ptr, 0, 0, 16, 16
+	rur.ACCX_0	\at1		// ureg 0
+	s32i	\at1, \ptr, .Lxchal_ofs_+0
+	rur.ACCX_1	\at1		// ureg 1
+	s32i	\at1, \ptr, .Lxchal_ofs_+4
+	rur.QACC_H_0	\at1		// ureg 2
+	s32i	\at1, \ptr, .Lxchal_ofs_+8
+	rur.QACC_H_1	\at1		// ureg 3
+	s32i	\at1, \ptr, .Lxchal_ofs_+12
+	rur.QACC_H_2	\at1		// ureg 4
+	s32i	\at1, \ptr, .Lxchal_ofs_+16
+	rur.QACC_H_3	\at1		// ureg 5
+	s32i	\at1, \ptr, .Lxchal_ofs_+20
+	rur.QACC_H_4	\at1		// ureg 6
+	s32i	\at1, \ptr, .Lxchal_ofs_+24
+	rur.QACC_L_0	\at1		// ureg 7
+	s32i	\at1, \ptr, .Lxchal_ofs_+28
+	rur.QACC_L_1	\at1		// ureg 8
+	s32i	\at1, \ptr, .Lxchal_ofs_+32
+	rur.QACC_L_2	\at1		// ureg 9
+	s32i	\at1, \ptr, .Lxchal_ofs_+36
+	rur.QACC_L_3	\at1		// ureg 10
+	s32i	\at1, \ptr, .Lxchal_ofs_+40
+	rur.QACC_L_4	\at1		// ureg 11
+	s32i	\at1, \ptr, .Lxchal_ofs_+44
+	rur.SAR_BYTE	\at1		// ureg 13
+	s32i	\at1, \ptr, .Lxchal_ofs_+48
+	rur.FFT_BIT_WIDTH	\at1		// ureg 14
+	s32i	\at1, \ptr, .Lxchal_ofs_+52
+	rur.UA_STATE_0	\at1		// ureg 15
+	s32i	\at1, \ptr, .Lxchal_ofs_+56
+	rur.UA_STATE_1	\at1		// ureg 16
+	s32i	\at1, \ptr, .Lxchal_ofs_+60
+	rur.UA_STATE_2	\at1		// ureg 17
+	s32i	\at1, \ptr, .Lxchal_ofs_+64
+	rur.UA_STATE_3	\at1		// ureg 18
+	s32i	\at1, \ptr, .Lxchal_ofs_+68
+	st.qr	q0, \ptr, .Lxchal_ofs_+80
+	st.qr	q1, \ptr, .Lxchal_ofs_+96
+	st.qr	q2, \ptr, .Lxchal_ofs_+112
+	addi	\ptr, \ptr, 128
+	st.qr	q3, \ptr, .Lxchal_ofs_+0
+	st.qr	q4, \ptr, .Lxchal_ofs_+16
+	st.qr	q5, \ptr, .Lxchal_ofs_+32
+	st.qr	q6, \ptr, .Lxchal_ofs_+48
+	st.qr	q7, \ptr, .Lxchal_ofs_+64
+	.set	.Lxchal_pofs_, .Lxchal_pofs_ + 128
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 80
+	.elseif ((XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+	xchal_sa_align	\ptr, 0, 0, 16, 16
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 208
+	.endif
+    .endm	// xchal_cp3_store
+
+    /*
+     *  Macro to load the state of TIE coprocessor cop_ai.
+     *  Required parameters:
+     *      ptr         Save area pointer address register (clobbered)
+     *                  (register must contain a 16 byte aligned address).
+     *      at1..at4    Four temporary address registers (first XCHAL_CP3_NUM_ATMPS
+     *                  registers are clobbered, the remaining are unused).
+     *  Optional parameters are the same as for xchal_ncp_load.
+     */
+#define xchal_cp_cop_ai_load	xchal_cp3_load
+    .macro	xchal_cp3_load  ptr at1 at2 at3 at4  continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
+	xchal_sa_start \continue, \ofs
+	// Custom caller-saved registers not used by default by the compiler:
+	.ifeq (XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
+	xchal_sa_align	\ptr, 0, 0, 16, 16
+	l32i	\at1, \ptr, .Lxchal_ofs_+0
+	wur.ACCX_0	\at1		// ureg 0
+	l32i	\at1, \ptr, .Lxchal_ofs_+4
+	wur.ACCX_1	\at1		// ureg 1
+	l32i	\at1, \ptr, .Lxchal_ofs_+8
+	wur.QACC_H_0	\at1		// ureg 2
+	l32i	\at1, \ptr, .Lxchal_ofs_+12
+	wur.QACC_H_1	\at1		// ureg 3
+	l32i	\at1, \ptr, .Lxchal_ofs_+16
+	wur.QACC_H_2	\at1		// ureg 4
+	l32i	\at1, \ptr, .Lxchal_ofs_+20
+	wur.QACC_H_3	\at1		// ureg 5
+	l32i	\at1, \ptr, .Lxchal_ofs_+24
+	wur.QACC_H_4	\at1		// ureg 6
+	l32i	\at1, \ptr, .Lxchal_ofs_+28
+	wur.QACC_L_0	\at1		// ureg 7
+	l32i	\at1, \ptr, .Lxchal_ofs_+32
+	wur.QACC_L_1	\at1		// ureg 8
+	l32i	\at1, \ptr, .Lxchal_ofs_+36
+	wur.QACC_L_2	\at1		// ureg 9
+	l32i	\at1, \ptr, .Lxchal_ofs_+40
+	wur.QACC_L_3	\at1		// ureg 10
+	l32i	\at1, \ptr, .Lxchal_ofs_+44
+	wur.QACC_L_4	\at1		// ureg 11
+	l32i	\at1, \ptr, .Lxchal_ofs_+48
+	wur.SAR_BYTE	\at1		// ureg 13
+	l32i	\at1, \ptr, .Lxchal_ofs_+52
+	wur.FFT_BIT_WIDTH	\at1		// ureg 14
+	l32i	\at1, \ptr, .Lxchal_ofs_+56
+	wur.UA_STATE_0	\at1		// ureg 15
+	l32i	\at1, \ptr, .Lxchal_ofs_+60
+	wur.UA_STATE_1	\at1		// ureg 16
+	l32i	\at1, \ptr, .Lxchal_ofs_+64
+	wur.UA_STATE_2	\at1		// ureg 17
+	l32i	\at1, \ptr, .Lxchal_ofs_+68
+	wur.UA_STATE_3	\at1		// ureg 18
+	ld.qr	q0, \ptr, .Lxchal_ofs_+80
+	ld.qr	q1, \ptr, .Lxchal_ofs_+96
+	ld.qr	q2, \ptr, .Lxchal_ofs_+112
+	addi	\ptr, \ptr, 128
+	ld.qr	q3, \ptr, .Lxchal_ofs_+0
+	ld.qr	q4, \ptr, .Lxchal_ofs_+16
+	ld.qr	q5, \ptr, .Lxchal_ofs_+32
+	ld.qr	q6, \ptr, .Lxchal_ofs_+48
+	ld.qr	q7, \ptr, .Lxchal_ofs_+64
+	.set	.Lxchal_pofs_, .Lxchal_pofs_ + 128
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 80
+	.elseif ((XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+	xchal_sa_align	\ptr, 0, 0, 16, 16
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 208
+	.endif
+    .endm	// xchal_cp3_load
+
+#define XCHAL_CP3_NUM_ATMPS	1
+#define XCHAL_SA_NUM_ATMPS	1
+
+	/*  Empty macros for unconfigured coprocessors:  */
+	.macro xchal_cp1_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp1_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp2_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp2_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp4_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp4_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp5_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp5_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp6_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp6_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp7_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp7_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+
+#endif /*_XTENSA_CORE_TIE_ASM_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/tie.h b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/tie.h
new file mode 100644
index 00000000000..e7671b1979e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/esp32s3/include/xtensa/config/tie.h
@@ -0,0 +1,207 @@
+/*
+ * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
+ *
+ *  NOTE:  This header file is not meant to be included directly.
+ */
+
+/* This header file describes this specific Xtensa processor's TIE extensions
+   that extend basic Xtensa core functionality.  It is customized to this
+   Xtensa processor configuration.
+
+   Customer ID=15128; Build=0x90f1f; Copyright (c) 1999-2021 Cadence Design Systems Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
+
+#ifndef _XTENSA_CORE_TIE_H
+#define _XTENSA_CORE_TIE_H
+
+#define XCHAL_CP_NUM			2	/* number of coprocessors */
+#define XCHAL_CP_MAX			4	/* max CP ID + 1 (0 if none) */
+#define XCHAL_CP_MASK			0x09	/* bitmask of all CPs by ID */
+#define XCHAL_CP_PORT_MASK		0x00	/* bitmask of only port CPs */
+
+/*  Basic parameters of each coprocessor:  */
+#define XCHAL_CP0_NAME			"FPU"
+#define XCHAL_CP0_IDENT			FPU
+#define XCHAL_CP0_SA_SIZE		72	/* size of state save area */
+#define XCHAL_CP0_SA_ALIGN		4	/* min alignment of save area */
+#define XCHAL_CP_ID_FPU             	0	/* coprocessor ID (0..7) */
+#define XCHAL_CP3_NAME			"cop_ai"
+#define XCHAL_CP3_IDENT			cop_ai
+#define XCHAL_CP3_SA_SIZE		208	/* size of state save area */
+#define XCHAL_CP3_SA_ALIGN		16	/* min alignment of save area */
+#define XCHAL_CP_ID_COP_AI          	3	/* coprocessor ID (0..7) */
+
+/*  Filler info for unassigned coprocessors, to simplify arrays etc:  */
+#define XCHAL_CP1_SA_SIZE		0
+#define XCHAL_CP1_SA_ALIGN		1
+#define XCHAL_CP2_SA_SIZE		0
+#define XCHAL_CP2_SA_ALIGN		1
+#define XCHAL_CP4_SA_SIZE		0
+#define XCHAL_CP4_SA_ALIGN		1
+#define XCHAL_CP5_SA_SIZE		0
+#define XCHAL_CP5_SA_ALIGN		1
+#define XCHAL_CP6_SA_SIZE		0
+#define XCHAL_CP6_SA_ALIGN		1
+#define XCHAL_CP7_SA_SIZE		0
+#define XCHAL_CP7_SA_ALIGN		1
+
+/*  Save area for non-coprocessor optional and custom (TIE) state:  */
+#define XCHAL_NCP_SA_SIZE		36
+#define XCHAL_NCP_SA_ALIGN		4
+
+/*  Total save area for optional and custom state (NCP + CPn):  */
+#define XCHAL_TOTAL_SA_SIZE		336	/* with 16-byte align padding */
+#define XCHAL_TOTAL_SA_ALIGN		16	/* actual minimum alignment */
+
+/*
+ * Detailed contents of save areas.
+ * NOTE:  caller must define the XCHAL_SA_REG macro (not defined here)
+ * before expanding the XCHAL_xxx_SA_LIST() macros.
+ *
+ * XCHAL_SA_REG(s,ccused,abikind,kind,opt,name,galign,align,asize,
+ *		dbnum,base,regnum,bitsz,gapsz,reset,x...)
+ *
+ *	s = passed from XCHAL_*_LIST(s), eg. to select how to expand
+ *	ccused = set if used by compiler without special options or code
+ *	abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
+ *	kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
+ *	opt = 0 (custom TIE extension or coprocessor), or 1 (optional reg)
+ *	name = lowercase reg name (no quotes)
+ *	galign = group byte alignment (power of 2) (galign >= align)
+ *	align = register byte alignment (power of 2)
+ *	asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz)
+ *	  (not including any pad bytes required to galign this or next reg)
+ *	dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
+ *	base = reg shortname w/o index (or sr=special, ur=TIE user reg)
+ *	regnum = reg index in regfile, or special/TIE-user reg number
+ *	bitsz = number of significant bits (regfile width, or ur/sr mask bits)
+ *	gapsz = intervening bits, if bitsz bits not stored contiguously
+ *	(padsz = pad bits at end [TIE regfile] or at msbits [ur,sr] of asize)
+ *	reset = register reset value (or 0 if undefined at reset)
+ *	x = reserved for future use (0 until then)
+ *
+ *  To filter out certain registers, e.g. to expand only the non-global
+ *  registers used by the compiler, you can do something like this:
+ *
+ *  #define XCHAL_SA_REG(s,ccused,p...)	SELCC##ccused(p)
+ *  #define SELCC0(p...)
+ *  #define SELCC1(abikind,p...)	SELAK##abikind(p)
+ *  #define SELAK0(p...)		REG(p)
+ *  #define SELAK1(p...)		REG(p)
+ *  #define SELAK2(p...)
+ *  #define REG(kind,tie,name,galn,aln,asz,csz,dbnum,base,rnum,bsz,rst,x...) \
+ *		...what you want to expand...
+ */
+
+#define XCHAL_NCP_SA_NUM	9
+#define XCHAL_NCP_SA_LIST(s)	\
+ XCHAL_SA_REG(s,1,2,1,1,      threadptr, 4, 4, 4,0x03E7,  ur,231, 32,0,0,0) \
+ XCHAL_SA_REG(s,1,0,0,1,          acclo, 4, 4, 4,0x0210,  sr,16 , 32,0,0,0) \
+ XCHAL_SA_REG(s,1,0,0,1,          acchi, 4, 4, 4,0x0211,  sr,17 ,  8,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,             br, 4, 4, 4,0x0204,  sr,4  , 16,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,      scompare1, 4, 4, 4,0x020C,  sr,12 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,             m0, 4, 4, 4,0x0220,  sr,32 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,             m1, 4, 4, 4,0x0221,  sr,33 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,             m2, 4, 4, 4,0x0222,  sr,34 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,             m3, 4, 4, 4,0x0223,  sr,35 , 32,0,0,0)
+
+#define XCHAL_CP0_SA_NUM	18
+#define XCHAL_CP0_SA_LIST(s)	\
+ XCHAL_SA_REG(s,0,0,1,0,            fcr, 4, 4, 4,0x03E8,  ur,232, 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,            fsr, 4, 4, 4,0x03E9,  ur,233, 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f0, 4, 4, 4,0x0030,   f,0  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f1, 4, 4, 4,0x0031,   f,1  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f2, 4, 4, 4,0x0032,   f,2  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f3, 4, 4, 4,0x0033,   f,3  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f4, 4, 4, 4,0x0034,   f,4  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f5, 4, 4, 4,0x0035,   f,5  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f6, 4, 4, 4,0x0036,   f,6  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f7, 4, 4, 4,0x0037,   f,7  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f8, 4, 4, 4,0x0038,   f,8  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f9, 4, 4, 4,0x0039,   f,9  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f10, 4, 4, 4,0x003A,   f,10 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f11, 4, 4, 4,0x003B,   f,11 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f12, 4, 4, 4,0x003C,   f,12 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f13, 4, 4, 4,0x003D,   f,13 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f14, 4, 4, 4,0x003E,   f,14 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f15, 4, 4, 4,0x003F,   f,15 , 32,0,0,0)
+
+#define XCHAL_CP1_SA_NUM	0
+#define XCHAL_CP1_SA_LIST(s)	/* empty */
+
+#define XCHAL_CP2_SA_NUM	0
+#define XCHAL_CP2_SA_LIST(s)	/* empty */
+
+#define XCHAL_CP3_SA_NUM	26
+#define XCHAL_CP3_SA_LIST(s)	\
+ XCHAL_SA_REG(s,0,0,1,0,         accx_0,16, 4, 4,0x0300,  ur,0  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,         accx_1, 4, 4, 4,0x0301,  ur,1  ,  8,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,       qacc_h_0, 4, 4, 4,0x0302,  ur,2  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,       qacc_h_1, 4, 4, 4,0x0303,  ur,3  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,       qacc_h_2, 4, 4, 4,0x0304,  ur,4  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,       qacc_h_3, 4, 4, 4,0x0305,  ur,5  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,       qacc_h_4, 4, 4, 4,0x0306,  ur,6  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,       qacc_l_0, 4, 4, 4,0x0307,  ur,7  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,       qacc_l_1, 4, 4, 4,0x0308,  ur,8  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,       qacc_l_2, 4, 4, 4,0x0309,  ur,9  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,       qacc_l_3, 4, 4, 4,0x030A,  ur,10 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,       qacc_l_4, 4, 4, 4,0x030B,  ur,11 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,       sar_byte, 4, 4, 4,0x030D,  ur,13 ,  4,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,  fft_bit_width, 4, 4, 4,0x030E,  ur,14 ,  4,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,     ua_state_0, 4, 4, 4,0x030F,  ur,15 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,     ua_state_1, 4, 4, 4,0x0310,  ur,16 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,     ua_state_2, 4, 4, 4,0x0311,  ur,17 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,     ua_state_3, 4, 4, 4,0x0312,  ur,18 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             q0,16,16,16,0x1008,   q,0  ,128,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             q1,16,16,16,0x1009,   q,1  ,128,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             q2,16,16,16,0x100A,   q,2  ,128,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             q3,16,16,16,0x100B,   q,3  ,128,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             q4,16,16,16,0x100C,   q,4  ,128,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             q5,16,16,16,0x100D,   q,5  ,128,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             q6,16,16,16,0x100E,   q,6  ,128,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             q7,16,16,16,0x100F,   q,7  ,128,0,0,0)
+
+#define XCHAL_CP4_SA_NUM	0
+#define XCHAL_CP4_SA_LIST(s)	/* empty */
+
+#define XCHAL_CP5_SA_NUM	0
+#define XCHAL_CP5_SA_LIST(s)	/* empty */
+
+#define XCHAL_CP6_SA_NUM	0
+#define XCHAL_CP6_SA_LIST(s)	/* empty */
+
+#define XCHAL_CP7_SA_NUM	0
+#define XCHAL_CP7_SA_LIST(s)	/* empty */
+
+/* Byte length of instruction from its first nibble (op0 field), per FLIX.  */
+#define XCHAL_OP0_FORMAT_LENGTHS	3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4
+/* Byte length of instruction from its first byte, per FLIX.  */
+#define XCHAL_BYTE0_FORMAT_LENGTHS	\
+	3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4,\
+	3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4,\
+	3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4,\
+	3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4,\
+	3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4,\
+	3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4,\
+	3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4,\
+	3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,4,4
+
+#endif /*_XTENSA_CORE_TIE_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/include/eri.h b/tools/sdk/esp32s3/include/xtensa/include/eri.h
new file mode 100644
index 00000000000..83ff7767138
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/eri.h
@@ -0,0 +1,31 @@
+#ifndef ERI_H
+#define ERI_H
+
+#include <stdint.h>
+
+/*
+ The ERI is a bus internal to each Xtensa core. It connects, amongst others, to the debug interface, where it
+ allows reading/writing the same registers as available over JTAG.
+*/
+
+
+/**
+ * @brief  Perform an ERI read
+ * @param  addr : ERI register to read from
+ *
+ * @return Value read
+ */
+uint32_t eri_read(int addr);
+
+
+/**
+ * @brief  Perform an ERI write
+ * @param  addr : ERI register to write to
+ * @param  data : Value to write
+ *
+ * @return Value read
+ */
+void eri_write(int addr, uint32_t data);
+
+
+#endif
diff --git a/tools/sdk/esp32s3/include/xtensa/include/esp_panic.h b/tools/sdk/esp32s3/include/xtensa/include/esp_panic.h
new file mode 100644
index 00000000000..587c7953b08
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/esp_panic.h
@@ -0,0 +1,4 @@
+#pragma once
+#warning "esp_panic.h is deprecated, please use esp_debug_helpers.h or/and esp_private/panic_reason.h"
+#include "esp_private/panic_reason.h"
+#include "esp_debug_helpers.h"
diff --git a/tools/sdk/esp32s3/include/xtensa/include/esp_private/panic_reason.h b/tools/sdk/esp32s3/include/xtensa/include/esp_private/panic_reason.h
new file mode 100644
index 00000000000..a83c5de7733
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/esp_private/panic_reason.h
@@ -0,0 +1,11 @@
+#pragma once
+
+#define PANIC_RSN_NONE 0
+#define PANIC_RSN_DEBUGEXCEPTION 1
+#define PANIC_RSN_DOUBLEEXCEPTION 2
+#define PANIC_RSN_KERNELEXCEPTION 3
+#define PANIC_RSN_COPROCEXCEPTION 4
+#define PANIC_RSN_INTWDT_CPU0 5
+#define PANIC_RSN_INTWDT_CPU1 6
+#define PANIC_RSN_CACHEERR 7
+#define PANIC_RSN_MAX 7
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xt_instr_macros.h b/tools/sdk/esp32s3/include/xtensa/include/xt_instr_macros.h
new file mode 100644
index 00000000000..e7931f4bf41
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xt_instr_macros.h
@@ -0,0 +1,98 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define RSR(reg, at)         asm volatile ("rsr %0, %1" : "=r" (at) : "i" (reg))
+#define WSR(reg, at)         asm volatile ("wsr %0, %1" : : "r" (at), "i" (reg))
+#define XSR(reg, at)         asm volatile ("xsr %0, %1" : "+r" (at) : "i" (reg))
+
+#define RER(reg, at)         asm volatile ("rer %0, %1" : "=r" (at) : "r" (reg))
+
+#define WITLB(at, as)        asm volatile ("witlb  %0, %1; \n isync \n " : : "r" (at), "r" (as))
+#define WDTLB(at, as)        asm volatile ("wdtlb  %0, %1; \n dsync \n " : : "r" (at), "r" (as))
+
+/* The SET_STACK implements a setting a new stack pointer (sp or a1).
+ * to do this the need reset PS_WOE, reset WINDOWSTART, update SP, and return PS_WOE.
+ *
+ * Note: It has 2 implementations one for using in assembler files (*.S) and one for using in C.
+ *
+ * C code prototype for SET_STACK:
+ *   uint32_t ps_reg;
+ *   uint32_t w_base;
+ *   RSR(PS, ps_reg);
+ *   ps_reg &= ~(PS_WOE_MASK | PS_OWB_MASK | PS_CALLINC_MASK);
+ *   WSR(PS, ps_reg);
+ *
+ *   RSR(WINDOWBASE, w_base);
+ *   WSR(WINDOWSTART, (1 << w_base));
+ *
+ *   asm volatile ( "movi sp, "XTSTR( (SOC_DRAM_LOW + (SOC_DRAM_HIGH - SOC_DRAM_LOW) / 2) )"");
+ *
+ *   RSR(PS, ps_reg);
+ *   ps_reg |= (PS_WOE_MASK);
+ *   WSR(PS, ps_reg);
+*/
+#ifdef __ASSEMBLER__
+    .macro SET_STACK  new_sp tmp1 tmp2
+    rsr.ps \tmp1
+    movi \tmp2, ~(PS_WOE_MASK | PS_OWB_MASK | PS_CALLINC_MASK)
+    and \tmp1, \tmp1, \tmp2
+    wsr.ps \tmp1
+    rsync
+
+    rsr.windowbase \tmp1
+    ssl	\tmp1
+    movi \tmp1, 1
+    sll	\tmp1, \tmp1
+    wsr.windowstart \tmp1
+    rsync
+
+    mov sp, \new_sp
+
+    rsr.ps \tmp1
+    movi \tmp2, (PS_WOE)
+    or \tmp1, \tmp1, \tmp2
+    wsr.ps \tmp1
+    rsync
+    .endm
+#else
+#define SET_STACK(new_sp) \
+    do { \
+        uint32_t tmp1 = 0, tmp2 = 0; \
+        asm volatile ( \
+          "rsr.ps %1 \n"\
+          "movi %2, ~" XTSTR( PS_WOE_MASK | PS_OWB_MASK | PS_CALLINC_MASK ) " \n"\
+          "and %1, %1, %2 \n"\
+          "wsr.ps %1 \n"\
+          "rsync \n"\
+          " \n"\
+          "rsr.windowbase %1 \n"\
+          "ssl	%1 \n"\
+          "movi %1, 1 \n"\
+          "sll	%1, %1 \n"\
+          "wsr.windowstart %1 \n"\
+          "rsync \n"\
+          " \n"\
+          "mov sp, %0 \n"\
+          "rsr.ps %1 \n"\
+          " \n"\
+          "movi %2, " XTSTR( PS_WOE_MASK ) "\n"\
+          " \n"\
+          "or %1, %1, %2 \n"\
+          "wsr.ps %1 \n"\
+          "rsync \n"\
+          : "+r"(new_sp), "+r"(tmp1), "+r"(tmp2)); \
+    } while (0);
+#endif // __ASSEMBLER__
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xt_trax.h b/tools/sdk/esp32s3/include/xtensa/include/xt_trax.h
new file mode 100644
index 00000000000..763d638c8b2
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xt_trax.h
@@ -0,0 +1,54 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdbool.h>
+
+#include "eri.h"
+#include "xtensa-debug-module.h"
+
+// Low-level Xtensa TRAX utils
+
+/**
+ * @brief  Start a Trax trace on the current CPU with instructions as unit of delay.
+ * Memory blocks to be used as Trax memory must be enabled before
+ * calling this function, if needed.
+ */
+void xt_trax_start_trace_instructions(void);
+
+/**
+ * @brief  Start a Trax trace on the current CPU with words as unit of delay.
+ * Memory blocks to be used as Trax memory must be enabled before
+ * calling this function, if needed.
+ */
+void xt_trax_start_trace_words(void);
+
+/**
+ * @brief Check if Trax trace is active on current CPU.
+ *
+ * @return bool. Return true if trace is active.
+ */
+bool xt_trax_trace_is_active(void);
+
+/**
+ * @brief  Trigger a Trax trace stop after the indicated delay. If this is called
+ *         before and the previous delay hasn't ended yet, this will overwrite
+ *         that delay with the new value. The delay will always start at the time
+ *         the function is called.
+ *
+ * @param  delay : The delay to stop the trace in, in the unit indicated to
+ *              trax_start_trace. Note: the trace memory has 4K words available.
+ */
+void xt_trax_trigger_traceend_after_delay(int delay);
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa-debug-module.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa-debug-module.h
new file mode 100644
index 00000000000..d1aca40d5b7
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa-debug-module.h
@@ -0,0 +1,115 @@
+#ifndef XTENSA_DEBUG_MODULE_H
+#define XTENSA_DEBUG_MODULE_H
+
+/*
+ERI registers / OCD offsets and field definitions
+*/
+
+#define ERI_DEBUG_OFFSET 0x100000
+
+#define ERI_TRAX_OFFSET         (ERI_DEBUG_OFFSET+0)
+#define ERI_PERFMON_OFFSET      (ERI_DEBUG_OFFSET+0x1000)
+#define ERI_OCDREG_OFFSET       (ERI_DEBUG_OFFSET+0x2000)
+#define ERI_MISCDBG_OFFSET      (ERI_DEBUG_OFFSET+0x3000)
+#define ERI_CORESIGHT_OFFSET    (ERI_DEBUG_OFFSET+0x3F00)
+
+#define ERI_TRAX_TRAXID         (ERI_TRAX_OFFSET+0x00)
+#define ERI_TRAX_TRAXCTRL       (ERI_TRAX_OFFSET+0x04)
+#define ERI_TRAX_TRAXSTAT       (ERI_TRAX_OFFSET+0x08)
+#define ERI_TRAX_TRAXDATA       (ERI_TRAX_OFFSET+0x0C)
+#define ERI_TRAX_TRAXADDR       (ERI_TRAX_OFFSET+0x10)
+#define ERI_TRAX_TRIGGERPC      (ERI_TRAX_OFFSET+0x14)
+#define ERI_TRAX_PCMATCHCTRL    (ERI_TRAX_OFFSET+0x18)
+#define ERI_TRAX_DELAYCNT       (ERI_TRAX_OFFSET+0x1C)
+#define ERI_TRAX_MEMADDRSTART   (ERI_TRAX_OFFSET+0x20)
+#define ERI_TRAX_MEMADDREND     (ERI_TRAX_OFFSET+0x24)
+
+#define TRAXCTRL_TREN           (1<<0)  //Trace enable. Tracing starts on 0->1
+#define TRAXCTRL_TRSTP          (1<<1)  //Trace Stop. Make 1 to stop trace.
+#define TRAXCTRL_PCMEN          (1<<2)  //PC match enable
+#define TRAXCTRL_PTIEN          (1<<4)  //Processor-trigger enable
+#define TRAXCTRL_CTIEN          (1<<5)  //Cross-trigger enable
+#define TRAXCTRL_TMEN           (1<<7)  //Tracemem Enable. Always set.
+#define TRAXCTRL_CNTU           (1<<9)  //Post-stop-trigger countdown units; selects when DelayCount-- happens.
+                                        //0 - every 32-bit word written to tracemem, 1 - every cpu instruction
+#define TRAXCTRL_TSEN           (1<<11) //Undocumented/deprecated?
+#define TRAXCTRL_SMPER_SHIFT    12      //Send sync every 2^(9-smper) messages. 7=reserved, 0=no sync msg
+#define TRAXCTRL_SMPER_MASK     0x7     //Synchronization message period
+#define TRAXCTRL_PTOWT          (1<<16) //Processor Trigger Out (OCD halt) enabled when stop triggered
+#define TRAXCTRL_PTOWS          (1<<17) //Processor Trigger Out (OCD halt) enabled when trace stop completes
+#define TRAXCTRL_CTOWT          (1<<20) //Cross-trigger Out enabled when stop triggered
+#define TRAXCTRL_CTOWS          (1<<21) //Cross-trigger Out enabled when trace stop completes
+#define TRAXCTRL_ITCTO          (1<<22) //Integration mode: cross-trigger output
+#define TRAXCTRL_ITCTIA         (1<<23) //Integration mode: cross-trigger ack
+#define TRAXCTRL_ITATV          (1<<24) //replaces ATID when in integration mode: ATVALID output
+#define TRAXCTRL_ATID_MASK      0x7F    //ARB source ID
+#define TRAXCTRL_ATID_SHIFT     24
+#define TRAXCTRL_ATEN           (1<<31) //ATB interface enable
+
+#define TRAXSTAT_TRACT          (1<<0)  //Trace active flag.
+#define TRAXSTAT_TRIG           (1<<1)  //Trace stop trigger. Clears on TREN 1->0
+#define TRAXSTAT_PCMTG          (1<<2)  //Stop trigger caused by PC match. Clears on TREN 1->0
+#define TRAXSTAT_PJTR           (1<<3)  //JTAG transaction result. 1=err in preceding jtag transaction.
+#define TRAXSTAT_PTITG          (1<<4)  //Stop trigger caused by Processor Trigger Input. Clears on TREN 1->0
+#define TRAXSTAT_CTITG          (1<<5)  //Stop trigger caused by Cross-Trigger Input. Clears on TREN 1->0
+#define TRAXSTAT_MEMSZ_SHIFT    8       //Traceram size inducator. Usable trace ram is 2^MEMSZ bytes.
+#define TRAXSTAT_MEMSZ_MASK     0x1F
+#define TRAXSTAT_PTO            (1<<16) //Processor Trigger Output: current value
+#define TRAXSTAT_CTO            (1<<17) //Cross-Trigger Output: current value
+#define TRAXSTAT_ITCTOA         (1<<22) //Cross-Trigger Out Ack: current value
+#define TRAXSTAT_ITCTI          (1<<23) //Cross-Trigger Input: current value
+#define TRAXSTAT_ITATR          (1<<24) //ATREADY Input: current value
+
+#define TRAXADDR_TADDR_SHIFT    0       //Trax memory address, in 32-bit words.
+#define TRAXADDR_TADDR_MASK     0x1FFFFF //Actually is only as big as the trace buffer size max addr.
+#define TRAXADDR_TWRAP_SHIFT    21      //Amount of times TADDR has overflown
+#define TRAXADDR_TWRAP_MASK     0x3FF
+#define TRAXADDR_TWSAT          (1<<31) //1 if TWRAP has overflown, clear by disabling tren.
+
+#define PCMATCHCTRL_PCML_SHIFT  0       //Amount of lower bits to ignore in pc trigger register
+#define PCMATCHCTRL_PCML_MASK   0x1F
+#define PCMATCHCTRL_PCMS        (1<<31) //PC Match Sense, 0 - match when procs PC is in-range, 1 - match when
+                                        //out-of-range
+
+// Global control/status for all performance counters
+#define ERI_PERFMON_PGM             (ERI_PERFMON_OFFSET+0x0000)
+//PC at the cycle of the event that caused PerfMonInt assertion
+#define ERI_PERFMON_INTPC           (ERI_PERFMON_OFFSET+0x0010)
+
+// Maximum amount of counter (depends on chip)
+#define ERI_PERFMON_MAX     XCHAL_NUM_PERF_COUNTERS
+
+// Performance counter value
+#define ERI_PERFMON_PM0             (ERI_PERFMON_OFFSET+0x0080)
+// Performance counter control register
+#define ERI_PERFMON_PMCTRL0         (ERI_PERFMON_OFFSET+0x0100)
+// Performance counter status register
+#define ERI_PERFMON_PMSTAT0         (ERI_PERFMON_OFFSET+0x0180)
+
+
+#define PMCTRL_INTEN                (1<<0)      // Enables assertion of PerfMonInt output when overflow happens
+#define PMCTRL_KRNLCNT              (1<<3)      // Enables counting when CINTLEVEL* >
+// TRACELEVEL (i.e. If this bit is set, this counter
+// counts only when CINTLEVEL >TRACELEVEL;
+// if this bit is cleared, this counter counts only when
+// CINTLEVEL ≤ TRACELEVEL)
+#define PMCTRL_KRNLCNT_SHIFT        3
+#define PMCTRL_TRACELEVEL_SHIFT     4           // Compares this value to CINTLEVEL* when deciding whether to count
+#define PMCTRL_TRACELEVEL_MASK      0xf
+#define PMCTRL_SELECT_SHIFT         8           // Selects input to be counted by the counter
+#define PMCTRL_SELECT_MASK          0x1f
+#define PMCTRL_MASK_SHIFT           16          // Selects input subsets to be counted (counter will
+// increment only once even if more than one condition
+// corresponding to a mask bit occurs)
+#define PMCTRL_MASK_MASK            0xffff
+
+
+#define PMSTAT_OVFL                 (1<<0)      // Counter Overflow. Sticky bit set when a counter rolls over
+// from 0xffffffff to 0x0.
+#define PMSTAT_INTSTART             (1<<4)      // This counter’s overflow caused PerfMonInt to be asserted.
+
+
+#define PGM_PMEN                    (1<<0)      // Overall enable for all performance counting
+
+
+#endif
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/cacheasm.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/cacheasm.h
new file mode 100644
index 00000000000..e917b9f4504
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/cacheasm.h
@@ -0,0 +1,961 @@
+/*
+ * xtensa/cacheasm.h -- assembler-specific cache related definitions
+ *			that depend on CORE configuration
+ *
+ *  This file is logically part of xtensa/coreasm.h ,
+ *  but is kept separate for modularity / compilation-performance.
+ */
+
+/*
+ * Copyright (c) 2001-2014 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef XTENSA_CACHEASM_H
+#define XTENSA_CACHEASM_H
+
+#include <xtensa/coreasm.h>
+#include <xtensa/corebits.h>
+#include <xtensa/xtensa-xer.h>
+#include <xtensa/xtensa-versions.h>
+
+/*
+ *  This header file defines assembler macros of the form:
+ *	<x>cache_<func>
+ *  where <x> is 'i' or 'd' for instruction and data caches,
+ *  and <func> indicates the function of the macro.
+ *
+ *  The following functions <func> are defined,
+ *  and apply only to the specified cache (I or D):
+ *
+ *  reset
+ *	Resets the cache.
+ *
+ *  sync
+ *	Makes sure any previous cache instructions have been completed;
+ *	ie. makes sure any previous cache control operations
+ *	have had full effect and been synchronized to memory.
+ *	Eg. any invalidate completed [so as not to generate a hit],
+ *	any writebacks or other pipelined writes written to memory, etc.
+ *
+ *  invalidate_line		(single cache line)
+ *  invalidate_region		(specified memory range)
+ *  invalidate_all		(entire cache)
+ *	Invalidates all cache entries that cache
+ *	data from the specified memory range.
+ *	NOTE: locked entries are not invalidated.
+ *
+ *  writeback_line		(single cache line)
+ *  writeback_region		(specified memory range)
+ *  writeback_all		(entire cache)
+ *	Writes back to memory all dirty cache entries
+ *	that cache data from the specified memory range,
+ *	and marks these entries as clean.
+ *	NOTE: on some future implementations, this might
+ *		also invalidate.
+ *	NOTE: locked entries are written back, but never invalidated.
+ *	NOTE: instruction caches never implement writeback.
+ *
+ *  writeback_inv_line		(single cache line)
+ *  writeback_inv_region	(specified memory range)
+ *  writeback_inv_all		(entire cache)
+ *	Writes back to memory all dirty cache entries
+ *	that cache data from the specified memory range,
+ *	and invalidates these entries (including all clean
+ *	cache entries that cache data from that range).
+ *	NOTE: locked entries are written back but not invalidated.
+ *	NOTE: instruction caches never implement writeback.
+ *
+ *  lock_line			(single cache line)
+ *  lock_region			(specified memory range)
+ *	Prefetch and lock the specified memory range into cache.
+ *	NOTE:  if any part of the specified memory range cannot
+ *	be locked, a Load/Store Error (for dcache) or Instruction
+ *	Fetch Error (for icache) exception occurs.  These macros don't
+ *	do anything special (yet anyway) to handle this situation.
+ *
+ *  unlock_line			(single cache line)
+ *  unlock_region		(specified memory range)
+ *  unlock_all			(entire cache)
+ *	Unlock cache entries that cache the specified memory range.
+ *	Entries not already locked are unaffected.
+ *
+ *  coherence_on
+ *  coherence_off
+ *      Turn off and on cache coherence
+ *
+ */
+
+
+
+/***************************   GENERIC -- ALL CACHES   ***************************/
+
+
+/*
+ *  The following macros assume the following cache size/parameter limits
+ *  in the current Xtensa core implementation:
+ *	cache size:	1024 bytes minimum
+ *	line size:	16 - 64 bytes
+ *	way count:	1 - 4
+ *
+ *  Minimum entries per way (ie. per associativity) = 1024 / 64 / 4 = 4
+ *  Hence the assumption that each loop can execute four cache instructions.
+ *
+ *  Correspondingly, the offset range of instructions is assumed able to cover
+ *  four lines, ie. offsets {0,1,2,3} * line_size are assumed valid for
+ *  both hit and indexed cache instructions.  Ie. these offsets are all
+ *  valid:  0, 16, 32, 48, 64, 96, 128, 192 (for line sizes 16, 32, 64).
+ *  This is true of all original cache instructions
+ *  (dhi, ihi, dhwb, dhwbi, dii, iii) which have offsets
+ *  of 0 to 1020 in multiples of 4 (ie. 8 bits shifted by 2).
+ *  This is also true of subsequent cache instructions
+ *  (dhu, ihu, diu, iiu, diwb, diwbi, dpfl, ipfl) which have offsets
+ *  of 0 to 240 in multiples of 16 (ie. 4 bits shifted by 4).
+ *
+ *  (Maximum cache size, currently 32k, doesn't affect the following macros.
+ *  Cache ways > MMU min page size cause aliasing but that's another matter.)
+ */
+
+
+
+/*
+ *  Macro to apply an 'indexed' cache instruction to the entire cache.
+ *
+ *  Parameters:
+ *	cainst      instruction/ that takes an address register parameter
+ *              and an offset parameter (in range 0 .. 3*linesize).
+ *	size        size of cache in bytes
+ *	linesize    size of cache line in bytes (always power-of-2)
+ *	assoc_or1   number of associativities (ways/sets) in cache
+ *                  if all sets affected by cainst,
+ *                  or 1 if only one set (or not all sets) of the cache
+ *                  is affected by cainst (eg. DIWB or DIWBI [not yet ISA defined]).
+ *	aa, ab      unique address registers (temporaries).
+ *	awb         set to other than a0 if wb type of instruction
+ *	loopokay    1 allows use of zero-overhead loops, 0 does not
+ *	immrange    range (max value) of cainst's immediate offset parameter, in bytes
+ *              (NOTE: macro assumes immrange allows power-of-2 number of lines)
+ */
+
+	.macro	cache_index_all		cainst, size, linesize, assoc_or1, aa, ab, loopokay, maxofs, awb=a0
+
+	//  Number of indices in cache (lines per way):
+	.set	.Lindices, (\size / (\linesize * \assoc_or1))
+	//  Number of indices processed per loop iteration (max 4):
+	.set	.Lperloop, .Lindices
+	.ifgt	.Lperloop - 4
+	 .set	.Lperloop, 4
+	.endif
+	//  Also limit instructions per loop if cache line size exceeds immediate range:
+	.set	.Lmaxperloop, (\maxofs / \linesize) + 1
+	.ifgt	.Lperloop - .Lmaxperloop
+	 .set	.Lperloop, .Lmaxperloop
+	.endif
+	//  Avoid addi of 128 which takes two instructions (addmi,addi):
+	.ifeq	.Lperloop*\linesize - 128
+	 .ifgt	.Lperloop - 1
+	  .set	.Lperloop, .Lperloop / 2
+	 .endif
+	.endif
+
+	//  \size byte cache, \linesize byte lines, \assoc_or1 way(s) affected by each \cainst.
+	// XCHAL_ERRATUM_497 - don't execute using loop, to reduce the amount of added code
+	.ifne	(\loopokay & XCHAL_HAVE_LOOPS && !XCHAL_ERRATUM_497)
+
+	movi	\aa, .Lindices / .Lperloop		// number of loop iterations
+	// Possible improvement: need only loop if \aa > 1 ;
+	// however \aa == 1 is highly unlikely.
+	movi	\ab, 0		// to iterate over cache
+	loop		\aa, .Lend_cachex\@
+	.set	.Li, 0 ;     .rept .Lperloop
+	  \cainst	\ab, .Li*\linesize
+	.set	.Li, .Li+1 ; .endr
+	addi		\ab, \ab, .Lperloop*\linesize	// move to next line
+.Lend_cachex\@:
+
+	.else
+
+	movi	\aa, (\size / \assoc_or1)
+	// Possible improvement: need only loop if \aa > 1 ;
+	// however \aa == 1 is highly unlikely.
+	movi	\ab, 0		// to iterate over cache
+	.ifne	((\awb !=a0) & XCHAL_ERRATUM_497)		// don't use awb if set to a0
+	movi \awb, 0
+	.endif
+.Lstart_cachex\@:
+	.set	.Li, 0 ;     .rept .Lperloop
+	  \cainst	\ab, .Li*\linesize
+	.set	.Li, .Li+1 ; .endr
+	.ifne	((\awb !=a0) & XCHAL_ERRATUM_497)		// do memw after 8 cainst wb instructions
+	addi \awb, \awb, .Lperloop
+	blti \awb, 8, .Lstart_memw\@
+	memw
+	movi \awb, 0
+.Lstart_memw\@:
+	.endif
+	addi		\ab, \ab, .Lperloop*\linesize	// move to next line
+	bltu		\ab, \aa, .Lstart_cachex\@
+	.endif
+
+	.endm
+
+
+/*
+ *  Macro to apply a 'hit' cache instruction to a memory region,
+ *  ie. to any cache entries that cache a specified portion (region) of memory.
+ *  Takes care of the unaligned cases, ie. may apply to one
+ *  more cache line than $asize / lineSize if $aaddr is not aligned.
+ *
+ *
+ *  Parameters are:
+ *	cainst	instruction/macro that takes an address register parameter
+ *		and an offset parameter (currently always zero)
+ *		and generates a cache instruction (eg. "dhi", "dhwb", "ihi", etc.)
+ *	linesize_log2	log2(size of cache line in bytes)
+ *	addr	register containing start address of region (clobbered)
+ *	asize	register containing size of the region in bytes (clobbered)
+ *	askew	unique register used as temporary
+ *	awb		unique register used as temporary for erratum 497.
+ *
+ *  Note: A possible optimization to this macro is to apply the operation
+ *  to the entire cache if the region exceeds the size of the cache
+ *  by some empirically determined amount or factor.  Some experimentation
+ *  is required to determine the appropriate factors, which also need
+ *  to be tunable if required.
+ */
+
+	.macro	cache_hit_region	cainst, linesize_log2, addr, asize, askew, awb=a0
+
+	//  Make \asize the number of iterations:
+	extui	\askew, \addr, 0, \linesize_log2	// get unalignment amount of \addr
+	add	\asize, \asize, \askew			// ... and add it to \asize
+	addi	\asize, \asize, (1 << \linesize_log2) - 1	// round up!
+	srli	\asize, \asize, \linesize_log2
+
+	//  Iterate over region:
+	.ifne	((\awb !=a0) & XCHAL_ERRATUM_497)		// don't use awb if set to a0
+	movi \awb, 0
+	.endif
+	floopnez	\asize, cacheh\@
+	\cainst		\addr, 0
+	.ifne	((\awb !=a0) & XCHAL_ERRATUM_497)		// do memw after 8 cainst wb instructions
+	addi \awb, \awb, 1
+	blti \awb, 8, .Lstart_memw\@
+	memw
+	movi \awb, 0
+.Lstart_memw\@:
+	.endif
+	addi		\addr, \addr, (1 << \linesize_log2)	// move to next line
+	floopend	\asize, cacheh\@
+	.endm
+
+
+
+
+
+/***************************   INSTRUCTION CACHE   ***************************/
+
+
+/*
+ *  Reset/initialize the instruction cache by simply invalidating it:
+ *  (need to unlock first also, if cache locking implemented):
+ *
+ *  Parameters:
+ *	aa, ab		unique address registers (temporaries)
+ */
+	.macro	icache_reset	aa, ab, loopokay=0
+	icache_unlock_all	\aa, \ab, \loopokay
+	icache_invalidate_all	\aa, \ab, \loopokay
+	.endm
+
+
+/*
+ * Synchronize after an instruction cache operation,
+ * to be sure everything is in sync with memory as to be
+ * expected following any previous instruction cache control operations.
+ *
+ * Even if a config doesn't have caches, an isync is still needed
+ * when instructions in any memory are modified, whether by a loader
+ * or self-modifying code.  Therefore, this macro always produces
+ * an isync, whether or not an icache is present.
+ *
+ * Parameters are:
+ *	ar	an address register (temporary) (currently unused, but may be used in future)
+ */
+	.macro	icache_sync	ar
+	isync
+	.endm
+
+
+
+/*
+ *  Invalidate a single line of the instruction cache.
+ *  Parameters are:
+ *	ar	address register that contains (virtual) address to invalidate
+ *		(may get clobbered in a future implementation, but not currently)
+ *	offset	(optional) offset to add to \ar to compute effective address to invalidate
+ *		(note: some number of lsbits are ignored)
+ */
+	.macro	icache_invalidate_line	ar, offset
+#if XCHAL_ICACHE_SIZE > 0
+	ihi	\ar, \offset		// invalidate icache line
+	icache_sync	\ar
+#endif
+	.endm
+
+
+
+
+/*
+ *  Invalidate instruction  cache entries that cache a specified portion of memory.
+ *  Parameters are:
+ *	astart	start address (register gets clobbered)
+ *	asize	size of the region in bytes (register gets clobbered)
+ *	ac	unique register used as temporary
+ */
+	.macro	icache_invalidate_region	astart, asize, ac
+#if XCHAL_ICACHE_SIZE > 0
+	//  Instruction cache region invalidation:
+	cache_hit_region	ihi, XCHAL_ICACHE_LINEWIDTH, \astart, \asize, \ac
+	icache_sync	\ac
+	//  End of instruction cache region invalidation
+#endif
+	.endm
+
+
+
+/*
+ *  Invalidate entire instruction cache.
+ *
+ *  Parameters:
+ *	aa, ab		unique address registers (temporaries)
+ */
+	.macro	icache_invalidate_all	aa, ab, loopokay=1
+#if XCHAL_ICACHE_SIZE > 0
+	//  Instruction cache invalidation:
+	cache_index_all		iii, XCHAL_ICACHE_SIZE, XCHAL_ICACHE_LINESIZE, XCHAL_ICACHE_WAYS, \aa, \ab, \loopokay, 1020
+	icache_sync	\aa
+	//  End of instruction cache invalidation
+#endif
+	.endm
+
+
+
+/*
+ *  Lock (prefetch & lock) a single line of the instruction cache.
+ *
+ *  Parameters are:
+ *	ar	address register that contains (virtual) address to lock
+ *		(may get clobbered in a future implementation, but not currently)
+ *	offset	offset to add to \ar to compute effective address to lock
+ *		(note: some number of lsbits are ignored)
+ */
+	.macro	icache_lock_line	ar, offset
+#if XCHAL_ICACHE_SIZE > 0 && XCHAL_ICACHE_LINE_LOCKABLE
+	ipfl	\ar, \offset	/* prefetch and lock icache line */
+	icache_sync	\ar
+#endif
+	.endm
+
+
+
+/*
+ *  Lock (prefetch & lock) a specified portion of memory into the instruction cache.
+ *  Parameters are:
+ *	astart	start address (register gets clobbered)
+ *	asize	size of the region in bytes (register gets clobbered)
+ *	ac	unique register used as temporary
+ */
+	.macro	icache_lock_region	astart, asize, ac
+#if XCHAL_ICACHE_SIZE > 0 && XCHAL_ICACHE_LINE_LOCKABLE
+	//  Instruction cache region lock:
+	cache_hit_region	ipfl, XCHAL_ICACHE_LINEWIDTH, \astart, \asize, \ac
+	icache_sync	\ac
+	//  End of instruction cache region lock
+#endif
+	.endm
+
+
+
+/*
+ *  Unlock a single line of the instruction cache.
+ *
+ *  Parameters are:
+ *	ar	address register that contains (virtual) address to unlock
+ *		(may get clobbered in a future implementation, but not currently)
+ *	offset	offset to add to \ar to compute effective address to unlock
+ *		(note: some number of lsbits are ignored)
+ */
+	.macro	icache_unlock_line	ar, offset
+#if XCHAL_ICACHE_SIZE > 0 && XCHAL_ICACHE_LINE_LOCKABLE
+	ihu	\ar, \offset	/* unlock icache line */
+	icache_sync	\ar
+#endif
+	.endm
+
+
+
+/*
+ *  Unlock a specified portion of memory from the instruction cache.
+ *  Parameters are:
+ *	astart	start address (register gets clobbered)
+ *	asize	size of the region in bytes (register gets clobbered)
+ *	ac	unique register used as temporary
+ */
+	.macro	icache_unlock_region	astart, asize, ac
+#if XCHAL_ICACHE_SIZE > 0 && XCHAL_ICACHE_LINE_LOCKABLE
+	//  Instruction cache region unlock:
+	cache_hit_region	ihu, XCHAL_ICACHE_LINEWIDTH, \astart, \asize, \ac
+	icache_sync	\ac
+	//  End of instruction cache region unlock
+#endif
+	.endm
+
+
+
+/*
+ *  Unlock entire instruction cache.
+ *
+ *  Parameters:
+ *	aa, ab		unique address registers (temporaries)
+ */
+	.macro	icache_unlock_all	aa, ab, loopokay=1
+#if XCHAL_ICACHE_SIZE > 0 && XCHAL_ICACHE_LINE_LOCKABLE
+	//  Instruction cache unlock:
+	cache_index_all		iiu, XCHAL_ICACHE_SIZE, XCHAL_ICACHE_LINESIZE, 1, \aa, \ab, \loopokay, 240
+	icache_sync	\aa
+	//  End of instruction cache unlock
+#endif
+	.endm
+
+
+
+
+
+/***************************   DATA CACHE   ***************************/
+
+
+
+/*
+ *  Reset/initialize the data cache by simply invalidating it
+ *  (need to unlock first also, if cache locking implemented):
+ *
+ *  Parameters:
+ *	aa, ab		unique address registers (temporaries)
+ */
+	.macro	dcache_reset	aa, ab, loopokay=0
+	dcache_unlock_all	\aa, \ab, \loopokay
+	dcache_invalidate_all	\aa, \ab, \loopokay
+	.endm
+
+
+
+
+/*
+ * Synchronize after a data cache operation,
+ * to be sure everything is in sync with memory as to be
+ * expected following any previous data cache control operations.
+ *
+ * Parameters are:
+ *	ar	an address register (temporary) (currently unused, but may be used in future)
+ */
+	.macro	dcache_sync	ar, wbtype=0
+#if XCHAL_DCACHE_SIZE > 0
+	//  No synchronization is needed.
+	//  (memw may be desired e.g. after writeback operation to help ensure subsequent
+	//   external accesses are seen to follow that writeback, however that's outside
+	//   the scope of this macro)
+
+	//dsync
+	.ifne	(\wbtype & XCHAL_ERRATUM_497)
+	memw
+	.endif
+#endif
+	.endm
+
+
+
+/*
+ * Turn on cache coherence.
+ *
+ * WARNING:  for RE-201x.x and later hardware, any interrupt that tries
+ * to change MEMCTL will see its changes dropped if the interrupt comes
+ * in the middle of this routine.  If this might be an issue, call this
+ * routine with interrupts disabled.
+ *
+ * Parameters are:
+ *	ar,at	two scratch address registers (both clobbered)
+ */
+	.macro	cache_coherence_on	ar at
+#if XCHAL_DCACHE_IS_COHERENT
+# if XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RE_2012_0
+	/*  Have MEMCTL.  Enable snoop responses.  */
+	rsr.memctl	\ar
+	movi		\at, MEMCTL_SNOOP_EN
+	or		\ar, \ar, \at
+	wsr.memctl	\ar
+# elif XCHAL_HAVE_EXTERN_REGS && XCHAL_HAVE_MX
+	/* Opt into coherence for MX (for backward compatibility / testing).  */
+	movi	\ar, 1
+	movi	\at, XER_CCON
+	wer	\ar, \at
+	extw
+# endif
+#endif
+	.endm
+
+
+
+/*
+ * Turn off cache coherence.
+ *
+ * NOTE:  this is generally preceded by emptying the cache;
+ * see xthal_cache_coherence_optout() in hal/coherence.c for details.
+ *
+ * WARNING:  for RE-201x.x and later hardware, any interrupt that tries
+ * to change MEMCTL will see its changes dropped if the interrupt comes
+ * in the middle of this routine.  If this might be an issue, call this
+ * routine with interrupts disabled.
+ *
+ * Parameters are:
+ *	ar,at	two scratch address registers (both clobbered)
+ */
+	.macro	cache_coherence_off	ar at
+#if XCHAL_DCACHE_IS_COHERENT
+# if XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RE_2012_0
+	/*  Have MEMCTL.  Disable snoop responses.  */
+	rsr.memctl	\ar
+	movi		\at, ~MEMCTL_SNOOP_EN
+	and		\ar, \ar, \at
+	wsr.memctl	\ar
+# elif XCHAL_HAVE_EXTERN_REGS && XCHAL_HAVE_MX
+	/* Opt out of coherence, for MX (for backward compatibility / testing).  */
+	extw
+	movi	\at, 0
+	movi	\ar, XER_CCON
+	wer	\at, \ar
+	extw
+# endif
+#endif
+	.endm
+
+
+
+/*
+ * Synchronize after a data store operation,
+ * to be sure the stored data is completely off the processor
+ * (and assuming there is no buffering outside the processor,
+ *  that the data is in memory).  This may be required to
+ * ensure that the processor's write buffers are emptied.
+ * A MEMW followed by a read guarantees this, by definition.
+ * We also try to make sure the read itself completes.
+ *
+ * Parameters are:
+ *	ar	an address register (temporary)
+ */
+	.macro	write_sync	ar
+	memw			// ensure previous memory accesses are complete prior to subsequent memory accesses
+	l32i	\ar, sp, 0	// completing this read ensures any previous write has completed, because of MEMW
+	//slot
+	add	\ar, \ar, \ar	// use the result of the read to help ensure the read completes (in future architectures)
+	.endm
+
+
+/*
+ *  Invalidate a single line of the data cache.
+ *  Parameters are:
+ *	ar	address register that contains (virtual) address to invalidate
+ *		(may get clobbered in a future implementation, but not currently)
+ *	offset	(optional) offset to add to \ar to compute effective address to invalidate
+ *		(note: some number of lsbits are ignored)
+ */
+	.macro	dcache_invalidate_line	ar, offset
+#if XCHAL_DCACHE_SIZE > 0
+	dhi	\ar, \offset
+	dcache_sync	\ar
+#endif
+	.endm
+
+
+
+
+
+/*
+ *  Invalidate data cache entries that cache a specified portion of memory.
+ *  Parameters are:
+ *	astart	start address (register gets clobbered)
+ *	asize	size of the region in bytes (register gets clobbered)
+ *	ac	unique register used as temporary
+ */
+	.macro	dcache_invalidate_region	astart, asize, ac
+#if XCHAL_DCACHE_SIZE > 0
+	//  Data cache region invalidation:
+	cache_hit_region	dhi, XCHAL_DCACHE_LINEWIDTH, \astart, \asize, \ac
+	dcache_sync	\ac
+	//  End of data cache region invalidation
+#endif
+	.endm
+
+
+
+/*
+ *  Invalidate entire data cache.
+ *
+ *  Parameters:
+ *	aa, ab		unique address registers (temporaries)
+ */
+	.macro	dcache_invalidate_all	aa, ab, loopokay=1
+#if XCHAL_DCACHE_SIZE > 0
+	//  Data cache invalidation:
+	cache_index_all		dii, XCHAL_DCACHE_SIZE, XCHAL_DCACHE_LINESIZE, XCHAL_DCACHE_WAYS, \aa, \ab, \loopokay, 1020
+	dcache_sync	\aa
+	//  End of data cache invalidation
+#endif
+	.endm
+
+
+
+/*
+ *  Writeback a single line of the data cache.
+ *  Parameters are:
+ *	ar	address register that contains (virtual) address to writeback
+ *		(may get clobbered in a future implementation, but not currently)
+ *	offset	offset to add to \ar to compute effective address to writeback
+ *		(note: some number of lsbits are ignored)
+ */
+	.macro	dcache_writeback_line	ar, offset
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_IS_WRITEBACK
+	dhwb	\ar, \offset
+	dcache_sync	\ar, wbtype=1
+#endif
+	.endm
+
+
+
+/*
+ *  Writeback dirty data cache entries that cache a specified portion of memory.
+ *  Parameters are:
+ *	astart	start address (register gets clobbered)
+ *	asize	size of the region in bytes (register gets clobbered)
+ *	ac	unique register used as temporary
+ */
+	.macro	dcache_writeback_region		astart, asize, ac, awb
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_IS_WRITEBACK
+	//  Data cache region writeback:
+	cache_hit_region	dhwb, XCHAL_DCACHE_LINEWIDTH, \astart, \asize, \ac, \awb
+	dcache_sync	\ac, wbtype=1
+	//  End of data cache region writeback
+#endif
+	.endm
+
+
+
+/*
+ *  Writeback entire data cache.
+ *  Parameters:
+ *	aa, ab		unique address registers (temporaries)
+ */
+	.macro	dcache_writeback_all	aa, ab, awb, loopokay=1
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_IS_WRITEBACK
+	//  Data cache writeback:
+	cache_index_all		diwb, XCHAL_DCACHE_SIZE, XCHAL_DCACHE_LINESIZE, 1, \aa, \ab, \loopokay, 240, \awb,
+	dcache_sync	\aa, wbtype=1
+	//  End of data cache writeback
+#endif
+	.endm
+
+
+
+/*
+ *  Writeback and invalidate a single line of the data cache.
+ *  Parameters are:
+ *	ar	address register that contains (virtual) address to writeback and invalidate
+ *		(may get clobbered in a future implementation, but not currently)
+ *	offset	offset to add to \ar to compute effective address to writeback and invalidate
+ *		(note: some number of lsbits are ignored)
+ */
+	.macro	dcache_writeback_inv_line	ar, offset
+#if XCHAL_DCACHE_SIZE > 0
+	dhwbi	\ar, \offset	/* writeback and invalidate dcache line */
+	dcache_sync	\ar, wbtype=1
+#endif
+	.endm
+
+
+
+/*
+ *  Writeback and invalidate data cache entries that cache a specified portion of memory.
+ *  Parameters are:
+ *	astart	start address (register gets clobbered)
+ *	asize	size of the region in bytes (register gets clobbered)
+ *	ac	unique register used as temporary
+ */
+	.macro	dcache_writeback_inv_region	astart, asize, ac, awb
+#if XCHAL_DCACHE_SIZE > 0
+	//  Data cache region writeback and invalidate:
+	cache_hit_region	dhwbi, XCHAL_DCACHE_LINEWIDTH, \astart, \asize, \ac, \awb
+	dcache_sync	\ac, wbtype=1
+	//  End of data cache region writeback and invalidate
+#endif
+	.endm
+
+
+
+/*
+ *  Writeback and invalidate entire data cache.
+ *  Parameters:
+ *	aa, ab		unique address registers (temporaries)
+ */
+	.macro	dcache_writeback_inv_all	aa, ab, awb, loopokay=1
+#if XCHAL_DCACHE_SIZE > 0
+	//  Data cache writeback and invalidate:
+#if XCHAL_DCACHE_IS_WRITEBACK
+	cache_index_all		diwbi, XCHAL_DCACHE_SIZE, XCHAL_DCACHE_LINESIZE, 1, \aa, \ab, \loopokay, 240, \awb
+	dcache_sync	\aa, wbtype=1
+#else /*writeback*/
+	//  Data cache does not support writeback, so just invalidate: */
+	dcache_invalidate_all	\aa, \ab, \loopokay
+#endif /*writeback*/
+	//  End of data cache writeback and invalidate
+#endif
+	.endm
+
+
+
+
+/*
+ *  Lock (prefetch & lock) a single line of the data cache.
+ *
+ *  Parameters are:
+ *	ar	address register that contains (virtual) address to lock
+ *		(may get clobbered in a future implementation, but not currently)
+ *	offset	offset to add to \ar to compute effective address to lock
+ *		(note: some number of lsbits are ignored)
+ */
+	.macro	dcache_lock_line	ar, offset
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_LINE_LOCKABLE
+	dpfl	\ar, \offset	/* prefetch and lock dcache line */
+	dcache_sync	\ar
+#endif
+	.endm
+
+
+
+/*
+ *  Lock (prefetch & lock) a specified portion of memory into the data cache.
+ *  Parameters are:
+ *	astart	start address (register gets clobbered)
+ *	asize	size of the region in bytes (register gets clobbered)
+ *	ac	unique register used as temporary
+ */
+	.macro	dcache_lock_region	astart, asize, ac
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_LINE_LOCKABLE
+	//  Data cache region lock:
+	cache_hit_region	dpfl, XCHAL_DCACHE_LINEWIDTH, \astart, \asize, \ac
+	dcache_sync	\ac
+	//  End of data cache region lock
+#endif
+	.endm
+
+
+
+/*
+ *  Unlock a single line of the data cache.
+ *
+ *  Parameters are:
+ *	ar	address register that contains (virtual) address to unlock
+ *		(may get clobbered in a future implementation, but not currently)
+ *	offset	offset to add to \ar to compute effective address to unlock
+ *		(note: some number of lsbits are ignored)
+ */
+	.macro	dcache_unlock_line	ar, offset
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_LINE_LOCKABLE
+	dhu	\ar, \offset	/* unlock dcache line */
+	dcache_sync	\ar
+#endif
+	.endm
+
+
+
+/*
+ *  Unlock a specified portion of memory from the data cache.
+ *  Parameters are:
+ *	astart	start address (register gets clobbered)
+ *	asize	size of the region in bytes (register gets clobbered)
+ *	ac	unique register used as temporary
+ */
+	.macro	dcache_unlock_region	astart, asize, ac
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_LINE_LOCKABLE
+	//  Data cache region unlock:
+	cache_hit_region	dhu, XCHAL_DCACHE_LINEWIDTH, \astart, \asize, \ac
+	dcache_sync	\ac
+	//  End of data cache region unlock
+#endif
+	.endm
+
+
+
+/*
+ *  Unlock entire data cache.
+ *
+ *  Parameters:
+ *	aa, ab		unique address registers (temporaries)
+ */
+	.macro	dcache_unlock_all	aa, ab, loopokay=1
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_LINE_LOCKABLE
+	//  Data cache unlock:
+	cache_index_all		diu, XCHAL_DCACHE_SIZE, XCHAL_DCACHE_LINESIZE, 1, \aa, \ab,  \loopokay, 240
+	dcache_sync	\aa
+	//  End of data cache unlock
+#endif
+	.endm
+
+
+
+/*
+ * Get the number of enabled icache ways. Note that this may
+ * be different from the value read from the MEMCTL register.
+ *
+ * Parameters:
+ *	aa	address register where value is returned
+ */
+	.macro	icache_get_ways		aa
+#if XCHAL_ICACHE_SIZE > 0
+#if XCHAL_HAVE_ICACHE_DYN_WAYS
+	// Read from MEMCTL and shift/mask
+	rsr.memctl	\aa
+	extui	\aa, \aa, MEMCTL_ICWU_SHIFT, MEMCTL_ICWU_BITS
+	blti	\aa, XCHAL_ICACHE_WAYS, .Licgw
+	movi	\aa, XCHAL_ICACHE_WAYS
+.Licgw:
+#else
+	// All ways are always enabled
+	movi	\aa, XCHAL_ICACHE_WAYS
+#endif
+#else
+	// No icache
+	movi	\aa, 0
+#endif
+	.endm
+
+
+
+/*
+ * Set the number of enabled icache ways.
+ *
+ * Parameters:
+ *	aa      address register specifying number of ways (trashed)
+ *	ab,ac	address register for scratch use (trashed)
+ */
+	.macro  icache_set_ways		aa, ab, ac
+#if XCHAL_ICACHE_SIZE > 0
+#if XCHAL_HAVE_ICACHE_DYN_WAYS
+	movi	\ac, MEMCTL_ICWU_CLR_MASK	// set up to clear bits 18-22
+	rsr.memctl	\ab
+	and	\ab, \ab, \ac
+	movi	\ac, MEMCTL_INV_EN		// set bit 23
+	slli	\aa, \aa, MEMCTL_ICWU_SHIFT	// move to right spot
+	or	\ab, \ab, \aa
+	or	\ab, \ab, \ac
+	wsr.memctl	\ab
+	isync
+#else
+	// All ways are always enabled
+#endif
+#else
+	// No icache
+#endif
+	.endm
+
+
+
+/*
+ * Get the number of enabled dcache ways. Note that this may
+ * be different from the value read from the MEMCTL register.
+ *
+ * Parameters:
+ *	aa	address register where value is returned
+ */
+	.macro	dcache_get_ways		aa
+#if XCHAL_DCACHE_SIZE > 0
+#if XCHAL_HAVE_DCACHE_DYN_WAYS
+	// Read from MEMCTL and shift/mask
+	rsr.memctl	\aa
+	extui	\aa, \aa, MEMCTL_DCWU_SHIFT, MEMCTL_DCWU_BITS
+	blti	\aa, XCHAL_DCACHE_WAYS, .Ldcgw
+	movi	\aa, XCHAL_DCACHE_WAYS
+.Ldcgw:
+#else
+	// All ways are always enabled
+	movi	\aa, XCHAL_DCACHE_WAYS
+#endif
+#else
+	// No dcache
+	movi	\aa, 0
+#endif
+	.endm
+
+
+
+/*
+ * Set the number of enabled dcache ways.
+ *
+ * Parameters:
+ *	aa	address register specifying number of ways (trashed)
+ *	ab,ac	address register for scratch use (trashed)
+ */
+	.macro	dcache_set_ways		aa, ab, ac
+#if (XCHAL_DCACHE_SIZE > 0) && XCHAL_HAVE_DCACHE_DYN_WAYS
+	movi	\ac, MEMCTL_DCWA_CLR_MASK	// set up to clear bits 13-17
+	rsr.memctl	\ab
+	and	\ab, \ab, \ac			// clear ways allocatable
+	slli	\ac, \aa, MEMCTL_DCWA_SHIFT
+	or	\ab, \ab, \ac			// set ways allocatable
+	wsr.memctl	\ab
+#if XCHAL_DCACHE_IS_WRITEBACK
+	// Check if the way count is increasing or decreasing
+	extui	\ac, \ab, MEMCTL_DCWU_SHIFT, MEMCTL_DCWU_BITS			// bits 8-12 - ways in use
+	bge	\aa, \ac, .Ldsw3						// equal or increasing
+	slli	\ab, \aa, XCHAL_DCACHE_LINEWIDTH + XCHAL_DCACHE_SETWIDTH	// start way number
+	slli	\ac, \ac, XCHAL_DCACHE_LINEWIDTH + XCHAL_DCACHE_SETWIDTH	// end way number
+.Ldsw1:
+	diwbui.p	\ab		// auto-increments ab
+	bge	\ab, \ac, .Ldsw2
+	beqz	\ab, .Ldsw2
+	j	.Ldsw1
+.Ldsw2:
+	rsr.memctl	\ab
+#endif
+.Ldsw3:
+	// No dirty data to write back, just set the new number of ways
+	movi	\ac, MEMCTL_DCWU_CLR_MASK		// set up to clear bits 8-12
+	and	\ab, \ab, \ac				// clear ways in use
+	movi	\ac, MEMCTL_INV_EN
+	or	\ab, \ab, \ac				// set bit 23
+	slli	\aa, \aa, MEMCTL_DCWU_SHIFT
+	or	\ab, \ab, \aa				// set ways in use
+	wsr.memctl	\ab
+#else
+	// No dcache or no way disable support
+#endif
+	.endm
+
+#endif /*XTENSA_CACHEASM_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/cacheattrasm.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/cacheattrasm.h
new file mode 100644
index 00000000000..c80caa7d257
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/cacheattrasm.h
@@ -0,0 +1,435 @@
+/*
+ * xtensa/cacheattrasm.h -- assembler-specific CACHEATTR register related definitions
+ *			that depend on CORE configuration
+ *
+ *  This file is logically part of xtensa/coreasm.h (or perhaps xtensa/cacheasm.h),
+ *  but is kept separate for modularity / compilation-performance.
+ */
+
+/*
+ * Copyright (c) 2001-2009 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef XTENSA_CACHEATTRASM_H
+#define XTENSA_CACHEATTRASM_H
+
+#include <xtensa/coreasm.h>
+
+/*  Determine whether cache attributes are controlled using eight 512MB entries:  */
+#define XCHAL_CA_8X512	(XCHAL_HAVE_CACHEATTR || XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR \
+	|| (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY))
+
+
+/*
+ *  This header file defines assembler macros of the form:
+ *	<x>cacheattr_<func>
+ *  where:
+ *	<x> is 'i', 'd' or absent for instruction, data
+ *		or both caches; and
+ *	<func> indicates the function of the macro.
+ *
+ *  The following functions are defined:
+ *
+ *  icacheattr_get
+ *	Reads I-cache CACHEATTR into a2 (clobbers a3-a5).
+ *
+ *  dcacheattr_get
+ *	Reads D-cache CACHEATTR into a2 (clobbers a3-a5).
+ *	(Note:  for configs with a real CACHEATTR register, the
+ *	 above two macros are identical.)
+ *
+ *  cacheattr_set
+ *	Writes both I-cache and D-cache CACHEATTRs from a2 (a3-a8 clobbered).
+ *	Works even when changing one's own code's attributes.
+ *
+ *  icacheattr_is_enabled  label
+ *	Branches to \label if I-cache appears to have been enabled
+ *	(eg. if CACHEATTR contains a cache-enabled attribute).
+ *	(clobbers a2-a5,SAR)
+ *
+ *  dcacheattr_is_enabled  label
+ *	Branches to \label if D-cache appears to have been enabled
+ *	(eg. if CACHEATTR contains a cache-enabled attribute).
+ *	(clobbers a2-a5,SAR)
+ *
+ *  cacheattr_is_enabled  label
+ *	Branches to \label if either I-cache or D-cache appears to have been enabled
+ *	(eg. if CACHEATTR contains a cache-enabled attribute).
+ *	(clobbers a2-a5,SAR)
+ *
+ *  The following macros are only defined under certain conditions:
+ *
+ *  icacheattr_set	(if XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR)
+ *	Writes I-cache CACHEATTR from a2 (a3-a8 clobbered).
+ *
+ *  dcacheattr_set	(if XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR)
+ *	Writes D-cache CACHEATTR from a2 (a3-a8 clobbered).
+ */
+
+
+
+/***************************   GENERIC -- ALL CACHES   ***************************/
+
+/*
+ *  _cacheattr_get
+ *
+ *  (Internal macro.)
+ *  Returns value of CACHEATTR register (or closest equivalent) in a2.
+ *
+ *  Entry:
+ *	(none)
+ *  Exit:
+ *	a2	value read from CACHEATTR
+ *	a3-a5	clobbered (temporaries)
+ */
+	.macro	_cacheattr_get	tlb
+#if XCHAL_HAVE_CACHEATTR
+	rsr.cacheattr	a2
+#elif XCHAL_CA_8X512
+	//  We have a config that "mimics" CACHEATTR using a simplified
+	//  "MMU" composed of a single statically-mapped way.
+	//  DTLB and ITLB are independent, so there's no single
+	//  cache attribute that can describe both.  So for now
+	//  just return the DTLB state.
+	movi	a5, 0xE0000000
+	movi	a2, 0
+	movi	a3, XCHAL_SPANNING_WAY
+1:	add	a3, a3, a5	// next segment
+	r&tlb&1	a4, a3		// get PPN+CA of segment at 0xE0000000, 0xC0000000, ..., 0
+	dsync	// interlock???
+	slli	a2, a2, 4
+	extui	a4, a4, 0, 4	// extract CA
+	or	a2, a2, a4
+	bgeui	a3, 16, 1b
+#else
+	//  This macro isn't applicable to arbitrary MMU configurations.
+	//  Just return zero.
+	movi	a2, 0
+#endif
+	.endm
+
+	.macro	icacheattr_get
+	_cacheattr_get	itlb
+	.endm
+
+	.macro	dcacheattr_get
+	_cacheattr_get	dtlb
+	.endm
+
+
+/* Default (powerup/reset) value of CACHEATTR,
+   all BYPASS mode (ie. disabled/bypassed caches): */
+#if XCHAL_HAVE_PTP_MMU
+# define XCHAL_CACHEATTR_ALL_BYPASS	0x33333333
+#else
+# define XCHAL_CACHEATTR_ALL_BYPASS	0x22222222
+#endif
+
+#if XCHAL_CA_8X512
+
+#if XCHAL_HAVE_PTP_MMU
+# define XCHAL_FCA_ENAMASK	0x0AA0	/* bitmap of fetch attributes that require enabled icache */
+# define XCHAL_LCA_ENAMASK	0x0FF0	/* bitmap of load  attributes that require enabled dcache */
+# define XCHAL_SCA_ENAMASK	0x0CC0	/* bitmap of store attributes that require enabled dcache */
+#else
+# define XCHAL_FCA_ENAMASK	0x003A	/* bitmap of fetch attributes that require enabled icache */
+# define XCHAL_LCA_ENAMASK	0x0033	/* bitmap of load  attributes that require enabled dcache */
+# define XCHAL_SCA_ENAMASK	0x0033	/* bitmap of store attributes that require enabled dcache */
+#endif
+#define XCHAL_LSCA_ENAMASK	(XCHAL_LCA_ENAMASK|XCHAL_SCA_ENAMASK)	/* l/s attrs requiring enabled dcache */
+#define XCHAL_ALLCA_ENAMASK	(XCHAL_FCA_ENAMASK|XCHAL_LSCA_ENAMASK)	/* all attrs requiring enabled caches */
+
+/*
+ *  _cacheattr_is_enabled
+ *
+ *  (Internal macro.)
+ *  Branches to \label if CACHEATTR in a2 indicates an enabled
+ *  cache, using mask in a3.
+ *
+ *  Parameters:
+ *	label	where to branch to if cache is enabled
+ *  Entry:
+ *	a2	contains CACHEATTR value used to determine whether
+ *		caches are enabled
+ *	a3	16-bit constant where each bit correspond to
+ *		one of the 16 possible CA values (in a CACHEATTR mask);
+ *		CA values that indicate the cache is enabled
+ *		have their corresponding bit set in this mask
+ *		(eg. use XCHAL_xCA_ENAMASK , above)
+ *  Exit:
+ *	a2,a4,a5	clobbered
+ *	SAR		clobbered
+ */
+	.macro	_cacheattr_is_enabled	label
+	movi	a4, 8		// loop 8 times
+.Lcaife\@:
+	extui	a5, a2, 0, 4	// get CA nibble
+	ssr	a5		// index into mask according to CA...
+	srl	a5, a3		// ...and get CA's mask bit in a5 bit 0
+	bbsi.l	a5, 0, \label	// if CA indicates cache enabled, jump to label
+	srli	a2, a2, 4	// next nibble
+	addi	a4, a4, -1
+	bnez	a4, .Lcaife\@	// loop for each nibble
+	.endm
+
+#else /* XCHAL_CA_8X512 */
+	.macro	_cacheattr_is_enabled	label
+	j	\label		// macro not applicable, assume caches always enabled
+	.endm
+#endif /* XCHAL_CA_8X512 */
+
+
+
+/*
+ *  icacheattr_is_enabled
+ *
+ *  Branches to \label if I-cache is enabled.
+ *
+ *  Parameters:
+ *	label	where to branch to if icache is enabled
+ *  Entry:
+ *	(none)
+ *  Exit:
+ *	a2-a5, SAR	clobbered (temporaries)
+ */
+	.macro	icacheattr_is_enabled	label
+#if XCHAL_CA_8X512
+	icacheattr_get
+	movi	a3, XCHAL_FCA_ENAMASK
+#endif
+	_cacheattr_is_enabled	\label
+	.endm
+
+/*
+ *  dcacheattr_is_enabled
+ *
+ *  Branches to \label if D-cache is enabled.
+ *
+ *  Parameters:
+ *	label	where to branch to if dcache is enabled
+ *  Entry:
+ *	(none)
+ *  Exit:
+ *	a2-a5, SAR	clobbered (temporaries)
+ */
+	.macro	dcacheattr_is_enabled	label
+#if XCHAL_CA_8X512
+	dcacheattr_get
+	movi	a3, XCHAL_LSCA_ENAMASK
+#endif
+	_cacheattr_is_enabled	\label
+	.endm
+
+/*
+ *  cacheattr_is_enabled
+ *
+ *  Branches to \label if either I-cache or D-cache is enabled.
+ *
+ *  Parameters:
+ *	label	where to branch to if a cache is enabled
+ *  Entry:
+ *	(none)
+ *  Exit:
+ *	a2-a5, SAR	clobbered (temporaries)
+ */
+	.macro	cacheattr_is_enabled	label
+#if XCHAL_HAVE_CACHEATTR
+	rsr.cacheattr	a2
+	movi	a3, XCHAL_ALLCA_ENAMASK
+#elif XCHAL_CA_8X512
+	icacheattr_get
+	movi	a3, XCHAL_FCA_ENAMASK
+	_cacheattr_is_enabled	\label
+	dcacheattr_get
+	movi	a3, XCHAL_LSCA_ENAMASK
+#endif
+	_cacheattr_is_enabled	\label
+	.endm
+
+
+
+/*
+ *  The ISA does not have a defined way to change the
+ *  instruction cache attributes of the running code,
+ *  ie. of the memory area that encloses the current PC.
+ *  However, each micro-architecture (or class of
+ *  configurations within a micro-architecture)
+ *  provides a way to deal with this issue.
+ *
+ *  Here are a few macros used to implement the relevant
+ *  approach taken.
+ */
+
+#if XCHAL_CA_8X512 && !XCHAL_HAVE_CACHEATTR
+	//  We have a config that "mimics" CACHEATTR using a simplified
+	//  "MMU" composed of a single statically-mapped way.
+
+/*
+ *  icacheattr_set
+ *
+ *  Entry:
+ *	a2		cacheattr value to set
+ *  Exit:
+ *	a2		unchanged
+ *	a3-a8		clobbered (temporaries)
+ */
+	.macro	icacheattr_set
+
+	movi	a5, 0xE0000000	// mask of upper 3 bits
+	movi	a6, 3f		// PC where ITLB is set
+	movi	a3, XCHAL_SPANNING_WAY	// start at region 0 (0 .. 7)
+	mov	a7, a2		// copy a2 so it doesn't get clobbered
+	and	a6, a6, a5	// upper 3 bits of local PC area
+	j	3f
+
+	//  Use micro-architecture specific method.
+	//  The following 4-instruction sequence is aligned such that
+	//  it all fits within a single I-cache line.  Sixteen byte
+	//  alignment is sufficient for this (using XCHAL_ICACHE_LINESIZE
+	//  actually causes problems because that can be greater than
+	//  the alignment of the reset vector, where this macro is often
+	//  invoked, which would cause the linker to align the reset
+	//  vector code away from the reset vector!!).
+	.begin	no-transform
+	.align	16 /*XCHAL_ICACHE_LINESIZE*/
+1:	witlb	a4, a3		// write wired PTE (CA, no PPN) of 512MB segment to ITLB
+	isync
+	.end	no-transform
+	nop
+	nop
+
+	sub	a3, a3, a5	// next segment (add 0x20000000)
+	bltui	a3, 16, 4f	// done?
+
+	//  Note that in the WITLB loop, we don't do any load/stores
+	//  (may not be an issue here, but it is important in the DTLB case).
+2:	srli	a7, a7, 4	// next CA
+3:
+# if XCHAL_HAVE_MIMIC_CACHEATTR
+	extui	a4, a7, 0, 4	// extract CA to set
+# else	/* have translation, preserve it: */
+	ritlb1	a8, a3		// get current PPN+CA of segment
+	//dsync	// interlock???
+	extui	a4, a7, 0, 4	// extract CA to set
+	srli	a8, a8, 4	// clear CA but keep PPN ...
+	slli	a8, a8, 4	// ...
+	add	a4, a4, a8	// combine new CA with PPN to preserve
+# endif
+	beq	a3, a6, 1b	// current PC's region? if so, do it in a safe way
+	witlb	a4, a3		// write wired PTE (CA [+PPN]) of 512MB segment to ITLB
+	sub	a3, a3, a5	// next segment (add 0x20000000)
+	bgeui	a3, 16, 2b
+	isync			// make sure all ifetch changes take effect
+4:
+	.endm	// icacheattr_set
+
+
+/*
+ *  dcacheattr_set
+ *
+ *  Entry:
+ *	a2		cacheattr value to set
+ *  Exit:
+ *	a2		unchanged
+ *	a3-a8		clobbered (temporaries)
+ */
+
+	.macro	dcacheattr_set
+
+	movi	a5, 0xE0000000	// mask of upper 3 bits
+	movi	a3, XCHAL_SPANNING_WAY	// start at region 0 (0 .. 7)
+	mov	a7, a2		// copy a2 so it doesn't get clobbered
+	//  Note that in the WDTLB loop, we don't do any load/stores
+2:	//  (including implicit l32r via movi) because it isn't safe.
+# if XCHAL_HAVE_MIMIC_CACHEATTR
+	extui	a4, a7, 0, 4	// extract CA to set
+# else	/* have translation, preserve it: */
+	rdtlb1	a8, a3		// get current PPN+CA of segment
+	//dsync	// interlock???
+	extui	a4, a7, 0, 4	// extract CA to set
+	srli	a8, a8, 4	// clear CA but keep PPN ...
+	slli	a8, a8, 4	// ...
+	add	a4, a4, a8	// combine new CA with PPN to preserve
+# endif
+	wdtlb	a4, a3		// write wired PTE (CA [+PPN]) of 512MB segment to DTLB
+	sub	a3, a3, a5	// next segment (add 0x20000000)
+	srli	a7, a7, 4	// next CA
+	bgeui	a3, 16, 2b
+	dsync			// make sure all data path changes take effect
+	.endm	// dcacheattr_set
+
+#endif /* XCHAL_CA_8X512 && !XCHAL_HAVE_CACHEATTR */
+
+
+
+/*
+ *  cacheattr_set
+ *
+ *  Macro that sets the current CACHEATTR safely
+ *  (both i and d) according to the current contents of a2.
+ *  It works even when changing the cache attributes of
+ *  the currently running code.
+ *
+ *  Entry:
+ *	a2		cacheattr value to set
+ *  Exit:
+ *	a2		unchanged
+ *	a3-a8		clobbered (temporaries)
+ */
+	.macro	cacheattr_set
+
+#if XCHAL_HAVE_CACHEATTR
+# if XCHAL_ICACHE_LINESIZE < 4
+	//  No i-cache, so can always safely write to CACHEATTR:
+	wsr.cacheattr	a2
+# else
+	//  The Athens micro-architecture, when using the old
+	//  exception architecture option (ie. with the CACHEATTR register)
+	//  allows changing the cache attributes of the running code
+	//  using the following exact sequence aligned to be within
+	//  an instruction cache line.  (NOTE: using XCHAL_ICACHE_LINESIZE
+	//  alignment actually causes problems because that can be greater
+	//  than the alignment of the reset vector, where this macro is often
+	//  invoked, which would cause the linker to align the reset
+	//  vector code away from the reset vector!!).
+	j	1f
+	.begin	no-transform
+	.align	16 /*XCHAL_ICACHE_LINESIZE*/	// align to within an I-cache line
+1:	wsr.cacheattr	a2
+	isync
+	.end	no-transform
+	nop
+	nop
+# endif
+#elif XCHAL_CA_8X512
+	//  DTLB and ITLB are independent, but to keep semantics
+	//  of this macro we simply write to both.
+	icacheattr_set
+	dcacheattr_set
+#else
+	//  This macro isn't applicable to arbitrary MMU configurations.
+	//  Do nothing in this case.
+#endif
+	.endm
+
+
+#endif /*XTENSA_CACHEATTRASM_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/core-macros.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/core-macros.h
new file mode 100644
index 00000000000..e042158dc5b
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/core-macros.h
@@ -0,0 +1,505 @@
+/*
+ * xtensa/core-macros.h -- C specific definitions
+ *                         that depend on CORE configuration
+ */
+
+/*
+ * Copyright (c) 2012 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef XTENSA_CACHE_H
+#define XTENSA_CACHE_H
+
+#include <xtensa/config/core.h>
+
+/*  Only define things for C code.  */
+#if !defined(_ASMLANGUAGE) && !defined(_NOCLANGUAGE) && !defined(__ASSEMBLER__)
+
+
+
+/***************************   CACHE   ***************************/
+
+/* All the macros are in the lower case now and some of them
+ * share the name with the existing functions from hal.h.
+ * Including this header file will define XTHAL_USE_CACHE_MACROS
+ * which directs hal.h not to use the functions.
+ *
+
+ *
+ *  Single-cache-line operations in C-callable inline assembly.
+ *  Essentially macro versions (uppercase) of:
+ *
+ *	xthal_icache_line_invalidate(void *addr);
+ *	xthal_icache_line_lock(void *addr);
+ *	xthal_icache_line_unlock(void *addr);
+ *	xthal_icache_sync(void);
+ *
+ *  NOTE:  unlike the above functions, the following macros do NOT
+ *  execute the xthal_icache_sync() as part of each line operation.
+ *  This sync must be called explicitly by the caller.  This is to
+ *  allow better optimization when operating on more than one line.
+ *
+ *	xthal_dcache_line_invalidate(void *addr);
+ *	xthal_dcache_line_writeback(void *addr);
+ *	xthal_dcache_line_writeback_inv(void *addr);
+ *	xthal_dcache_line_lock(void *addr);
+ *	xthal_dcache_line_unlock(void *addr);
+ *	xthal_dcache_sync(void);
+ *	xthal_dcache_line_prefetch_for_write(void *addr);
+ *	xthal_dcache_line_prefetch_for_read(void *addr);
+ *
+ *  All are made memory-barriers, given that's how they're typically used
+ *  (ops operate on a whole line, so clobbers all memory not just *addr).
+ *
+ *  NOTE:  All the block block cache ops and line prefetches are implemented
+ *  using intrinsics so they are better optimized regarding memory barriers etc.
+ *
+ * All block downgrade functions exist in two forms: with and without
+ * the 'max' parameter: This parameter allows compiler to optimize
+ * the functions whenever the parameter is smaller than the cache size.
+ *
+ *	xthal_dcache_block_invalidate(void *addr, unsigned size);
+ *	xthal_dcache_block_writeback(void *addr, unsigned size);
+ *	xthal_dcache_block_writeback_inv(void *addr, unsigned size);
+ *	xthal_dcache_block_invalidate_max(void *addr, unsigned size, unsigned max);
+ *	xthal_dcache_block_writeback_max(void *addr, unsigned size, unsigned max);
+ *	xthal_dcache_block_writeback_inv_max(void *addr, unsigned size, unsigned max);
+ *
+ *      xthal_dcache_block_prefetch_for_read(void *addr, unsigned size);
+ *      xthal_dcache_block_prefetch_for_write(void *addr, unsigned size);
+ *      xthal_dcache_block_prefetch_modify(void *addr, unsigned size);
+ *      xthal_dcache_block_prefetch_read_write(void *addr, unsigned size);
+ *      xthal_dcache_block_prefetch_for_read_grp(void *addr, unsigned size);
+ *      xthal_dcache_block_prefetch_for_write_grp(void *addr, unsigned size);
+ *      xthal_dcache_block_prefetch_modify_grp(void *addr, unsigned size);
+ *      xthal_dcache_block_prefetch_read_write_grp(void *addr, unsigned size)
+ *
+ *	xthal_dcache_block_wait();
+ *	xthal_dcache_block_required_wait();
+ *	xthal_dcache_block_abort();
+ *	xthal_dcache_block_prefetch_end();
+ *	xthal_dcache_block_newgrp();
+ */
+
+/***   INSTRUCTION CACHE   ***/
+
+#define XTHAL_USE_CACHE_MACROS
+
+#if XCHAL_ICACHE_SIZE > 0
+# define xthal_icache_line_invalidate(addr)	do { void *__a = (void*)(addr); \
+		__asm__ __volatile__("ihi %0, 0" :: "a"(__a) : "memory"); 	\
+		} while(0)
+#else
+# define xthal_icache_line_invalidate(addr)	do {/*nothing*/} while(0)
+#endif
+
+#if XCHAL_ICACHE_SIZE > 0 && XCHAL_ICACHE_LINE_LOCKABLE
+# define xthal_icache_line_lock(addr)	do { void *__a = (void*)(addr);	 	\
+		__asm__ __volatile__("ipfl %0, 0" :: "a"(__a) : "memory"); 	\
+		} while(0)
+# define xthal_icache_line_unlock(addr)	do { void *__a = (void*)(addr); 	\
+		__asm__ __volatile__("ihu %0, 0" :: "a"(__a) : "memory");	\
+		} while(0)
+#else
+# define xthal_icache_line_lock(addr)		do {/*nothing*/} while(0)
+# define xthal_icache_line_unlock(addr)		do {/*nothing*/} while(0)
+#endif
+
+/*
+ * Even if a config doesn't have caches, an isync is still needed
+ * when instructions in any memory are modified, whether by a loader
+ * or self-modifying code.  Therefore, this macro always produces
+ * an isync, whether or not an icache is present.
+ */
+#define xthal_icache_sync()							\
+		__asm__ __volatile__("isync":::"memory")
+
+
+/***   DATA CACHE   ***/
+
+#if XCHAL_DCACHE_SIZE > 0
+
+# include <xtensa/tie/xt_datacache.h>
+
+# define xthal_dcache_line_invalidate(addr)	do { void *__a = (void*)(addr); \
+		__asm__ __volatile__("dhi %0, 0" :: "a"(__a) : "memory"); 	\
+		} while(0)
+# define xthal_dcache_line_writeback(addr)	do { void *__a = (void*)(addr); \
+		__asm__ __volatile__("dhwb %0, 0" :: "a"(__a) : "memory"); 	\
+		} while(0)
+# define xthal_dcache_line_writeback_inv(addr)	do { void *__a = (void*)(addr); \
+		__asm__ __volatile__("dhwbi %0, 0" :: "a"(__a) : "memory"); 	\
+		} while(0)
+# define xthal_dcache_sync()							\
+		__asm__ __volatile__("" /*"dsync"?*/:::"memory")
+# define xthal_dcache_line_prefetch_for_read(addr) do {				\
+		XT_DPFR((const int*)addr, 0);					\
+		} while(0)
+#else
+# define xthal_dcache_line_invalidate(addr)		do {/*nothing*/} while(0)
+# define xthal_dcache_line_writeback(addr)		do {/*nothing*/} while(0)
+# define xthal_dcache_line_writeback_inv(addr)		do {/*nothing*/} while(0)
+# define xthal_dcache_sync()				__asm__ __volatile__("":::"memory")
+# define xthal_dcache_line_prefetch_for_read(addr)	do {/*nothing*/} while(0)
+#endif
+
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_LINE_LOCKABLE
+# define xthal_dcache_line_lock(addr)	do { void *__a = (void*)(addr); 	\
+		__asm__ __volatile__("dpfl %0, 0" :: "a"(__a) : "memory"); 	\
+		} while(0)
+# define xthal_dcache_line_unlock(addr)	do { void *__a = (void*)(addr); 	\
+		__asm__ __volatile__("dhu %0, 0" :: "a"(__a) : "memory"); 	\
+		} while(0)
+#else
+# define xthal_dcache_line_lock(addr)		do {/*nothing*/} while(0)
+# define xthal_dcache_line_unlock(addr)		do {/*nothing*/} while(0)
+#endif
+
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_IS_WRITEBACK
+
+# define xthal_dcache_line_prefetch_for_write(addr) do {			\
+		XT_DPFW((const int*)addr, 0);					\
+		} while(0)
+#else
+# define xthal_dcache_line_prefetch_for_write(addr)	do {/*nothing*/} while(0)
+#endif
+
+
+/*****   Block Operations   *****/
+
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_HAVE_CACHE_BLOCKOPS
+
+/* upgrades */
+
+# define _XTHAL_DCACHE_BLOCK_UPGRADE(addr, size, type)		\
+		{						\
+		type((const int*)addr, size);			\
+		}
+
+/*downgrades */
+
+# define _XTHAL_DCACHE_BLOCK_DOWNGRADE(addr, size, type)	\
+	unsigned _s = size;					\
+	unsigned _a = (unsigned) addr;					\
+	do {							\
+		unsigned __s = (_s > XCHAL_DCACHE_SIZE) ? 	\
+				XCHAL_DCACHE_SIZE : _s; 	\
+		type((const int*)_a, __s);			\
+		_s -= __s; 					\
+		_a += __s;					\
+	} while(_s > 0);
+
+# define _XTHAL_DCACHE_BLOCK_DOWNGRADE_MAX(addr, size, type, max)	\
+	if (max <= XCHAL_DCACHE_SIZE) {					\
+		unsigned _s = size;					\
+		unsigned _a = (unsigned) addr;					\
+		type((const int*)_a, _s);				\
+	}								\
+	else {								\
+		_XTHAL_DCACHE_BLOCK_DOWNGRADE(addr, size, type);	\
+	}
+
+# define xthal_dcache_block_invalidate(addr, size)	do { 		\
+		_XTHAL_DCACHE_BLOCK_DOWNGRADE(addr, size, XT_DHI_B);	\
+		} while(0)
+# define xthal_dcache_block_writeback(addr, size)	do {		\
+		_XTHAL_DCACHE_BLOCK_DOWNGRADE(addr, size, XT_DHWB_B);	\
+		} while(0)
+# define xthal_dcache_block_writeback_inv(addr, size)	do {		\
+		_XTHAL_DCACHE_BLOCK_DOWNGRADE(addr, size, XT_DHWBI_B);	\
+		} while(0)
+
+# define xthal_dcache_block_invalidate_max(addr, size, max)	do {		\
+		_XTHAL_DCACHE_BLOCK_DOWNGRADE_MAX(addr, size, XT_DHI_B, max);	\
+		} while(0)
+# define xthal_dcache_block_writeback_max(addr, size, max)	do { 		\
+		_XTHAL_DCACHE_BLOCK_DOWNGRADE_MAX(addr, size, XT_DHWB_B, max);	\
+		} while(0)
+# define xthal_dcache_block_writeback_inv_max(addr, size, max)	do {		\
+		_XTHAL_DCACHE_BLOCK_DOWNGRADE_MAX(addr, size, XT_DHWBI_B, max);	\
+		} while(0)
+
+/* upgrades that are performed even with write-thru caches  */
+
+# define xthal_dcache_block_prefetch_read_write(addr, size) do {	\
+		_XTHAL_DCACHE_BLOCK_UPGRADE(addr, size, XT_DPFW_B);	\
+		} while(0)
+# define xthal_dcache_block_prefetch_read_write_grp(addr, size) do {	\
+		_XTHAL_DCACHE_BLOCK_UPGRADE(addr, size, XT_DPFW_BF);	\
+		} while(0)
+# define xthal_dcache_block_prefetch_for_read(addr, size) do {		\
+		_XTHAL_DCACHE_BLOCK_UPGRADE(addr, size, XT_DPFR_B);	\
+		} while(0)
+# define xthal_dcache_block_prefetch_for_read_grp(addr, size) do {	\
+		_XTHAL_DCACHE_BLOCK_UPGRADE(addr, size, XT_DPFR_BF);	\
+		} while(0)
+
+/* abort all or end optional block cache operations */
+# define xthal_dcache_block_abort()	do { 		\
+		XT_PFEND_A();				\
+		} while(0)
+# define xthal_dcache_block_end()	do { 		\
+		XT_PFEND_O();				\
+		} while(0)
+
+/* wait for all/required block cache operations to finish */
+# define xthal_dcache_block_wait()	do { 		\
+		XT_PFWAIT_A();				\
+		} while(0)
+# define xthal_dcache_block_required_wait()	do { 	\
+		XT_PFWAIT_R();				\
+		} while(0)
+/* Start a new group */
+# define xthal_dcache_block_newgrp()	do { 		\
+		XT_PFNXT_F();				\
+		} while(0)
+#else
+# define xthal_dcache_block_invalidate(addr, size)		do {/*nothing*/} while(0)
+# define xthal_dcache_block_writeback(addr, size)		do {/*nothing*/} while(0)
+# define xthal_dcache_block_writeback_inv(addr, size)		do {/*nothing*/} while(0)
+# define xthal_dcache_block_invalidate_max(addr, size, max)	do {/*nothing*/} while(0)
+# define xthal_dcache_block_writeback_max(addr, size, max)	do {/*nothing*/} while(0)
+# define xthal_dcache_block_writeback_inv_max(addr, size, max) 	do {/*nothing*/} while(0)
+# define xthal_dcache_block_prefetch_read_write(addr, size)	do {/*nothing*/} while(0)
+# define xthal_dcache_block_prefetch_read_write_grp(addr, size)	do {/*nothing*/} while(0)
+# define xthal_dcache_block_prefetch_for_read(addr, size)	do {/*nothing*/} while(0)
+# define xthal_dcache_block_prefetch_for_read_grp(addr, size)	do {/*nothing*/} while(0)
+# define xthal_dcache_block_end()   				do {/*nothing*/} while(0)
+# define xthal_dcache_block_abort()  				do {/*nothing*/} while(0)
+# define xthal_dcache_block_wait()  				do {/*nothing*/} while(0)
+# define xthal_dcache_block_required_wait()   			do {/*nothing*/} while(0)
+# define xthal_dcache_block_newgrp()				do {/*nothing*/} while(0)
+#endif
+
+#if XCHAL_DCACHE_SIZE > 0 && XCHAL_HAVE_CACHE_BLOCKOPS && XCHAL_DCACHE_IS_WRITEBACK
+
+# define xthal_dcache_block_prefetch_for_write(addr, size) do {	\
+		_XTHAL_DCACHE_BLOCK_UPGRADE(addr, size, XT_DPFW_B);	\
+		} while(0)
+# define xthal_dcache_block_prefetch_modify(addr, size) do {		\
+		_XTHAL_DCACHE_BLOCK_UPGRADE(addr, size, XT_DPFM_B);	\
+		} while(0)
+# define xthal_dcache_block_prefetch_for_write_grp(addr, size) do {	\
+		_XTHAL_DCACHE_BLOCK_UPGRADE(addr, size, XT_DPFW_BF);	\
+		} while(0)
+# define xthal_dcache_block_prefetch_modify_grp(addr, size) do {	\
+		_XTHAL_DCACHE_BLOCK_UPGRADE(addr, size, XT_DPFM_BF);	\
+		} while(0)
+#else
+# define xthal_dcache_block_prefetch_for_write(addr, size)	do {/*nothing*/} while(0)
+# define xthal_dcache_block_prefetch_modify(addr, size) 	do {/*nothing*/} while(0)
+# define xthal_dcache_block_prefetch_for_write_grp(addr, size)	do {/*nothing*/} while(0)
+# define xthal_dcache_block_prefetch_modify_grp(addr, size)  	do {/*nothing*/} while(0)
+#endif
+
+/***************************   INTERRUPTS   ***************************/
+
+/*
+ *  Macro versions of:
+ *	unsigned  xthal_get_intenable( void );
+ *	void      xthal_set_intenable( unsigned );
+ *	unsigned  xthal_get_interrupt( void );
+ *	void      xthal_set_intset( unsigned );
+ *	void      xthal_set_intclear( unsigned );
+ *	unsigned  xthal_get_ccount(void);
+ *	void      xthal_set_ccompare(int, unsigned);
+ *	unsigned  xthal_get_ccompare(int);
+ *
+ *  NOTE: for {set,get}_ccompare, the first argument MUST be a decimal constant.
+ */
+
+#if XCHAL_HAVE_INTERRUPTS
+# define XTHAL_GET_INTENABLE()	({ int __intenable; \
+				__asm__("rsr.intenable %0" : "=a"(__intenable)); \
+				__intenable; })
+# define XTHAL_SET_INTENABLE(v)	do { int __intenable = (int)(v); \
+			__asm__ __volatile__("wsr.intenable %0" :: "a"(__intenable):"memory"); \
+				} while(0)
+# define XTHAL_GET_INTERRUPT()	({ int __interrupt; \
+				__asm__ __volatile__("rsr.interrupt %0" : "=a"(__interrupt)); \
+				__interrupt; })
+# define XTHAL_SET_INTSET(v)	do { int __interrupt = (int)(v); \
+			__asm__ __volatile__("wsr.intset %0" :: "a"(__interrupt):"memory"); \
+				} while(0)
+# define XTHAL_SET_INTCLEAR(v)	do { int __interrupt = (int)(v); \
+			__asm__ __volatile__("wsr.intclear %0" :: "a"(__interrupt):"memory"); \
+				} while(0)
+# define XTHAL_GET_CCOUNT()	({ int __ccount; \
+				__asm__ __volatile__("rsr.ccount %0" : "=a"(__ccount)); \
+				__ccount; })
+# define XTHAL_SET_CCOUNT(v)	do { int __ccount = (int)(v); \
+			__asm__ __volatile__("wsr.ccount %0" :: "a"(__ccount):"memory"); \
+				} while(0)
+# define _XTHAL_GET_CCOMPARE(n)	({ int __ccompare; \
+				__asm__("rsr.ccompare" #n " %0" : "=a"(__ccompare)); \
+				__ccompare; })
+# define XTHAL_GET_CCOMPARE(n)	_XTHAL_GET_CCOMPARE(n)
+# define _XTHAL_SET_CCOMPARE(n,v) do { int __ccompare = (int)(v); \
+			__asm__ __volatile__("wsr.ccompare" #n " %0 ; esync" :: "a"(__ccompare):"memory"); \
+				} while(0)
+# define XTHAL_SET_CCOMPARE(n,v) _XTHAL_SET_CCOMPARE(n,v)
+#else
+# define XTHAL_GET_INTENABLE()		0
+# define XTHAL_SET_INTENABLE(v)		do {/*nothing*/} while(0)
+# define XTHAL_GET_INTERRUPT()		0
+# define XTHAL_SET_INTSET(v)		do {/*nothing*/} while(0)
+# define XTHAL_SET_INTCLEAR(v)		do {/*nothing*/} while(0)
+# define XTHAL_GET_CCOUNT()		0
+# define XTHAL_SET_CCOUNT(v)		do {/*nothing*/} while(0)
+# define XTHAL_GET_CCOMPARE(n)		0
+# define XTHAL_SET_CCOMPARE(n,v)	do {/*nothing*/} while(0)
+#endif
+
+/*  New functions added to accomodate XEA3 and allow deprecation of older
+    functions. For this release they just map to the older ones.  */
+
+/*  Enables the specified interrupt.  */
+static inline void xthal_interrupt_enable(unsigned intnum)
+{
+    xthal_int_enable(1 << intnum);
+}
+
+/*  Disables the specified interrupt.  */
+static inline void xthal_interrupt_disable(unsigned intnum)
+{
+    xthal_int_disable(1 << intnum);
+}
+
+/*  Triggers the specified interrupt.  */
+static inline void xthal_interrupt_trigger(unsigned intnum)
+{
+    xthal_set_intset(1 << intnum);
+}
+
+/*  Clears the specified interrupt.  */
+static inline void xthal_interrupt_clear(unsigned intnum)
+{
+    xthal_set_intclear(1 << intnum);
+}
+
+
+/***************************   MISC   ***************************/
+
+/*
+ *  Macro or inline versions of:
+ *	void	  xthal_clear_regcached_code( void );
+ *	unsigned  xthal_get_prid( void );
+ *	unsigned  xthal_compare_and_set( int *addr, int testval, int setval );
+ */
+
+#if XCHAL_HAVE_LOOPS
+# define XTHAL_CLEAR_REGCACHED_CODE()		\
+		__asm__ __volatile__("wsr.lcount %0" :: "a"(0) : "memory")
+#else
+# define XTHAL_CLEAR_REGCACHED_CODE()		do {/*nothing*/} while(0)
+#endif
+
+#if XCHAL_HAVE_PRID
+# define XTHAL_GET_PRID()	({ int __prid; \
+				__asm__("rsr.prid %0" : "=a"(__prid)); \
+				__prid; })
+#else
+# define XTHAL_GET_PRID()	0
+#endif
+
+
+static inline unsigned  XTHAL_COMPARE_AND_SET( int *addr, int testval, int setval )
+{
+    int result;
+
+#if XCHAL_HAVE_S32C1I && XCHAL_HW_MIN_VERSION_MAJOR >= 2200
+    __asm__ __volatile__ (
+	"   wsr.scompare1 %2 \n"
+	"   s32c1i %0, %3, 0 \n"
+	    : "=a"(result) : "0" (setval), "a" (testval), "a" (addr)
+	    : "memory");
+#elif XCHAL_HAVE_INTERRUPTS
+    int tmp;
+    __asm__ __volatile__ (
+        "   rsil   %4, 15 \n"		// %4 == saved ps
+        "   l32i   %0, %3, 0 \n"	// %0 == value to test, return val
+        "   bne    %2, %0, 9f \n"	// test
+        "   s32i   %1, %3, 0 \n"	// write the new value
+	"9: wsr.ps %4 ; rsync \n"	// restore the PS
+	: "=a"(result)
+	: "0" (setval), "a" (testval), "a" (addr), "a" (tmp)
+	: "memory");
+#else
+    __asm__ __volatile__ (
+        "   l32i  %0, %3, 0 \n"		// %0 == value to test, return val
+        "   bne   %2, %0, 9f \n"	// test
+        "   s32i  %1, %3, 0 \n"		// write the new value
+	"9: \n"
+	    : "=a"(result) : "0" (setval), "a" (testval), "a" (addr)
+	    : "memory");
+#endif
+    return result;
+}
+
+#if XCHAL_HAVE_EXTERN_REGS
+
+static inline unsigned XTHAL_RER (unsigned int reg)
+{
+  unsigned result;
+
+  __asm__ __volatile__ (
+	"   rer     %0, %1"
+	: "=a" (result) : "a" (reg) : "memory");
+
+  return result;
+}
+
+static inline void XTHAL_WER (unsigned reg, unsigned value)
+{
+  __asm__ __volatile__ (
+	"   wer     %0, %1"
+	: : "a" (value), "a" (reg) : "memory");
+}
+
+#endif /* XCHAL_HAVE_EXTERN_REGS */
+
+/*
+ * Sets a single entry at 'index' within the MPU
+ *
+ * The caller must ensure that the resulting MPU map is ordered.
+ */
+static inline void xthal_mpu_set_entry (xthal_MPU_entry entry)
+{
+#if XCHAL_HAVE_MPU
+  __asm__ __volatile__("j 1f\n\t.align 8\n\t1: memw\n\twptlb %0, %1\n\t" : : "a" (entry.at), "a"(entry.as));
+#endif
+}
+
+/* Same as xthal_mpu_set_entry except that this function must not be used to change the MPU entry
+ * for the currently executing instruction ... use xthal_mpu_set_entry instead. */
+static inline void xthal_mpu_set_entry_ (xthal_MPU_entry entry)
+{
+#if XCHAL_HAVE_MPU
+  __asm__ __volatile__("wptlb %0, %1\n\t" : : "a" (entry.at), "a"(entry.as));
+#endif
+}
+
+
+
+#endif /* C code */
+
+#endif /*XTENSA_CACHE_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/coreasm.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/coreasm.h
new file mode 100644
index 00000000000..0dea3b094fc
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/coreasm.h
@@ -0,0 +1,1058 @@
+/*
+ * xtensa/coreasm.h -- assembler-specific definitions that depend on CORE configuration
+ *
+ *  Source for configuration-independent binaries (which link in a
+ *  configuration-specific HAL library) must NEVER include this file.
+ *  It is perfectly normal, however, for the HAL itself to include this file.
+ *
+ *  This file must NOT include xtensa/config/system.h.  Any assembler
+ *  header file that depends on system information should likely go
+ *  in a new systemasm.h (or sysasm.h) header file.
+ *
+ *  NOTE: macro beqi32 is NOT configuration-dependent, and is placed
+ *        here until we have a proper configuration-independent header file.
+ */
+
+/* $Id: //depot/rel/Foxhill/dot.9/Xtensa/OS/include/xtensa/coreasm.h#1 $ */
+
+/*
+ * Copyright (c) 2000-2014 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef XTENSA_COREASM_H
+#define XTENSA_COREASM_H
+
+/*
+ *  Tell header files this is assembly source, so they can avoid non-assembler
+ *  definitions (eg. C types etc):
+ */
+#ifndef _ASMLANGUAGE	/* conditionalize to avoid cpp warnings (3rd parties might use same macro) */
+#define _ASMLANGUAGE
+#endif
+
+#include <xtensa/config/core.h>
+#include <xtensa/config/specreg.h>
+#include <xtensa/config/system.h>
+
+/*
+ *  Assembly-language specific definitions (assembly macros, etc.).
+ */
+
+/*----------------------------------------------------------------------
+ *  find_ms_setbit
+ *
+ *  This macro finds the most significant bit that is set in <as>
+ *  and return its index + <base> in <ad>, or <base> - 1 if <as> is zero.
+ *  The index counts starting at zero for the lsbit, so the return
+ *  value ranges from <base>-1 (no bit set) to <base>+31 (msbit set).
+ *
+ *  Parameters:
+ *	<ad>	destination address register (any register)
+ *	<as>	source address register
+ *	<at>	temporary address register (must be different than <as>)
+ *	<base>	constant value added to result (usually 0 or 1)
+ *  On entry:
+ *	<ad> = undefined if different than <as>
+ *	<as> = value whose most significant set bit is to be found
+ *	<at> = undefined
+ *	no other registers are used by this macro.
+ *  On exit:
+ *	<ad> = <base> + index of msbit set in original <as>,
+ *	     = <base> - 1 if original <as> was zero.
+ *	<as> clobbered (if not <ad>)
+ *	<at> clobbered (if not <ad>)
+ *  Example:
+ *	find_ms_setbit a0, a4, a0, 0		-- return in a0 index of msbit set in a4
+ */
+
+	.macro	find_ms_setbit ad, as, at, base
+#if XCHAL_HAVE_NSA
+	movi	\at, 31+\base
+	nsau	\as, \as	// get index of \as, numbered from msbit (32 if absent)
+	sub	\ad, \at, \as	// get numbering from lsbit (0..31, -1 if absent)
+#else /* XCHAL_HAVE_NSA */
+	movi	\at, \base	// start with result of 0 (point to lsbit of 32)
+
+	beqz	\as, 2f		// special case for zero argument: return -1
+	bltui	\as, 0x10000, 1f	// is it one of the 16 lsbits? (if so, check lower 16 bits)
+	addi	\at, \at, 16	// no, increment result to upper 16 bits (of 32)
+	//srli	\as, \as, 16	// check upper half (shift right 16 bits)
+	extui	\as, \as, 16, 16	// check upper half (shift right 16 bits)
+1:	bltui	\as, 0x100, 1f	// is it one of the 8 lsbits? (if so, check lower 8 bits)
+	addi	\at, \at, 8	// no, increment result to upper 8 bits (of 16)
+	srli	\as, \as, 8	// shift right to check upper 8 bits
+1:	bltui	\as, 0x10, 1f	// is it one of the 4 lsbits? (if so, check lower 4 bits)
+	addi	\at, \at, 4	// no, increment result to upper 4 bits (of 8)
+	srli	\as, \as, 4	// shift right 4 bits to check upper half
+1:	bltui	\as, 0x4, 1f	// is it one of the 2 lsbits? (if so, check lower 2 bits)
+	addi	\at, \at, 2	// no, increment result to upper 2 bits (of 4)
+	srli	\as, \as, 2	// shift right 2 bits to check upper half
+1:	bltui	\as, 0x2, 1f	// is it the lsbit?
+	addi	\at, \at, 2	// no, increment result to upper bit (of 2)
+2:	addi	\at, \at, -1	// (from just above: add 1;  from beqz: return -1)
+	//srli	\as, \as, 1
+1:				// done! \at contains index of msbit set (or -1 if none set)
+	.if	0x\ad - 0x\at	// destination different than \at ? (works because regs are a0-a15)
+	mov	\ad, \at	// then move result to \ad
+	.endif
+#endif /* XCHAL_HAVE_NSA */
+	.endm	// find_ms_setbit
+
+/*----------------------------------------------------------------------
+ *  find_ls_setbit
+ *
+ *  This macro finds the least significant bit that is set in <as>,
+ *  and return its index in <ad>.
+ *  Usage is the same as for the find_ms_setbit macro.
+ *  Example:
+ *	find_ls_setbit a0, a4, a0, 0	-- return in a0 index of lsbit set in a4
+ */
+
+	.macro	find_ls_setbit ad, as, at, base
+	neg	\at, \as	// keep only the least-significant bit that is set...
+	and	\as, \at, \as	// ... in \as
+	find_ms_setbit	\ad, \as, \at, \base
+	.endm	// find_ls_setbit
+
+/*----------------------------------------------------------------------
+ *  find_ls_one
+ *
+ *  Same as find_ls_setbit with base zero.
+ *  Source (as) and destination (ad) registers must be different.
+ *  Provided for backward compatibility.
+ */
+
+	.macro	find_ls_one ad, as
+	find_ls_setbit	\ad, \as, \ad, 0
+	.endm	// find_ls_one
+
+/*----------------------------------------------------------------------
+ *  floop, floopnez, floopgtz, floopend
+ *
+ *  These macros are used for fast inner loops that
+ *  work whether or not the Loops options is configured.
+ *  If the Loops option is configured, they simply use
+ *  the zero-overhead LOOP instructions; otherwise
+ *  they use explicit decrement and branch instructions.
+ *
+ *  They are used in pairs, with floop, floopnez or floopgtz
+ *  at the beginning of the loop, and floopend at the end.
+ *
+ *  Each pair of loop macro calls must be given the loop count
+ *  address register and a unique label for that loop.
+ *
+ *  Example:
+ *
+ *	movi	 a3, 16     // loop 16 times
+ *	floop    a3, myloop1
+ *	:
+ *	bnez     a7, end1	// exit loop if a7 != 0
+ *	:
+ *	floopend a3, myloop1
+ *  end1:
+ *
+ *  Like the LOOP instructions, these macros cannot be
+ *  nested, must include at least one instruction,
+ *  cannot call functions inside the loop, etc.
+ *  The loop can be exited by jumping to the instruction
+ *  following floopend (or elsewhere outside the loop),
+ *  or continued by jumping to a NOP instruction placed
+ *  immediately before floopend.
+ *
+ *  Unlike LOOP instructions, the register passed to floop*
+ *  cannot be used inside the loop, because it is used as
+ *  the loop counter if the Loops option is not configured.
+ *  And its value is undefined after exiting the loop.
+ *  And because the loop counter register is active inside
+ *  the loop, you can't easily use this construct to loop
+ *  across a register file using ROTW as you might with LOOP
+ *  instructions, unless you copy the loop register along.
+ */
+
+	/*  Named label version of the macros:  */
+
+	.macro	floop		ar, endlabel
+	floop_		\ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel
+	.endm
+
+	.macro	floopnez	ar, endlabel
+	floopnez_	\ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel
+	.endm
+
+	.macro	floopgtz	ar, endlabel
+	floopgtz_	\ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel
+	.endm
+
+	.macro	floopend	ar, endlabel
+	floopend_	\ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel
+	.endm
+
+	/*  Numbered local label version of the macros:  */
+#if 0 /*UNTESTED*/
+	.macro	floop89		ar
+	floop_		\ar, 8, 9f
+	.endm
+
+	.macro	floopnez89	ar
+	floopnez_	\ar, 8, 9f
+	.endm
+
+	.macro	floopgtz89	ar
+	floopgtz_	\ar, 8, 9f
+	.endm
+
+	.macro	floopend89	ar
+	floopend_	\ar, 8b, 9
+	.endm
+#endif /*0*/
+
+	/*  Underlying version of the macros:  */
+
+	.macro	floop_	ar, startlabel, endlabelref
+	.ifdef	_infloop_
+	.if	_infloop_
+	.err	// Error: floop cannot be nested
+	.endif
+	.endif
+	.set	_infloop_, 1
+#if XCHAL_HAVE_LOOPS
+	loop	\ar, \endlabelref
+#else /* XCHAL_HAVE_LOOPS */
+\startlabel:
+	addi	\ar, \ar, -1
+#endif /* XCHAL_HAVE_LOOPS */
+	.endm	// floop_
+
+	.macro	floopnez_	ar, startlabel, endlabelref
+	.ifdef	_infloop_
+	.if	_infloop_
+	.err	// Error: floopnez cannot be nested
+	.endif
+	.endif
+	.set	_infloop_, 1
+#if XCHAL_HAVE_LOOPS
+	loopnez	\ar, \endlabelref
+#else /* XCHAL_HAVE_LOOPS */
+	beqz	\ar, \endlabelref
+\startlabel:
+	addi	\ar, \ar, -1
+#endif /* XCHAL_HAVE_LOOPS */
+	.endm	// floopnez_
+
+	.macro	floopgtz_	ar, startlabel, endlabelref
+	.ifdef	_infloop_
+	.if	_infloop_
+	.err	// Error: floopgtz cannot be nested
+	.endif
+	.endif
+	.set	_infloop_, 1
+#if XCHAL_HAVE_LOOPS
+	loopgtz	\ar, \endlabelref
+#else /* XCHAL_HAVE_LOOPS */
+	bltz	\ar, \endlabelref
+	beqz	\ar, \endlabelref
+\startlabel:
+	addi	\ar, \ar, -1
+#endif /* XCHAL_HAVE_LOOPS */
+	.endm	// floopgtz_
+
+
+	.macro	floopend_	ar, startlabelref, endlabel
+	.ifndef	_infloop_
+	.err	// Error: floopend without matching floopXXX
+	.endif
+	.ifeq	_infloop_
+	.err	// Error: floopend without matching floopXXX
+	.endif
+	.set	_infloop_, 0
+#if ! XCHAL_HAVE_LOOPS
+	bnez	\ar, \startlabelref
+#endif /* XCHAL_HAVE_LOOPS */
+\endlabel:
+	.endm	// floopend_
+
+/*----------------------------------------------------------------------
+ *  crsil  --  conditional RSIL (read/set interrupt level)
+ *
+ *  Executes the RSIL instruction if it exists, else just reads PS.
+ *  The RSIL instruction does not exist in the new exception architecture
+ *  if the interrupt option is not selected.
+ */
+
+	.macro	crsil	ar, newlevel
+#if XCHAL_HAVE_OLD_EXC_ARCH || XCHAL_HAVE_INTERRUPTS
+	rsil	\ar, \newlevel
+#else
+	rsr.ps	\ar
+#endif
+	.endm	// crsil
+
+/*----------------------------------------------------------------------
+ *  safe_movi_a0  --  move constant into a0 when L32R is not safe
+ *
+ *  This macro is typically used by interrupt/exception handlers.
+ *  Loads a 32-bit constant in a0, without using any other register,
+ *  and without corrupting the LITBASE register, even when the
+ *  value of the LITBASE register is unknown (eg. when application
+ *  code and interrupt/exception handling code are built independently,
+ *  and thus with independent values of the LITBASE register;
+ *  debug monitors are one example of this).
+ *
+ *  Worst-case size of resulting code:  17 bytes.
+ */
+
+	.macro	safe_movi_a0	constant
+#if XCHAL_HAVE_ABSOLUTE_LITERALS
+	/*  Contort a PC-relative literal load even though we may be in litbase-relative mode: */
+	j	1f
+	.begin	no-transform			// ensure what follows is assembled exactly as-is
+	.align	4				// ensure constant and call0 target ...
+	.byte	0				// ... are 4-byte aligned (call0 instruction is 3 bytes long)
+1:	call0	2f				// read PC (that follows call0) in a0
+	.long	\constant			// 32-bit constant to load into a0
+2:
+	.end	no-transform
+	l32i	a0, a0, 0			// load constant
+#else
+	movi	a0, \constant			// no LITBASE, can assume PC-relative L32R
+#endif
+	.endm
+
+
+
+
+/*----------------------------------------------------------------------
+ *  window_spill{4,8,12}
+ *
+ *  These macros spill callers' register windows to the stack.
+ *  They work for both privileged and non-privileged tasks.
+ *  Must be called from a windowed ABI context, eg. within
+ *  a windowed ABI function (ie. valid stack frame, window
+ *  exceptions enabled, not in exception mode, etc).
+ *
+ *  This macro requires a single invocation of the window_spill_common
+ *  macro in the same assembly unit and section.
+ *
+ *  Note that using window_spill{4,8,12} macros is more efficient
+ *  than calling a function implemented using window_spill_function,
+ *  because the latter needs extra code to figure out the size of
+ *  the call to the spilling function.
+ *
+ *  Example usage:
+ *
+ *		.text
+ *		.align	4
+ *		.global	some_function
+ *		.type	some_function,@function
+ *	some_function:
+ *		entry	a1, 16
+ *		:
+ *		:
+ *
+ *		window_spill4	// Spill windows of some_function's callers; preserves a0..a3 only;
+ *				// to use window_spill{8,12} in this example function we'd have
+ *				// to increase space allocated by the entry instruction, because
+ *				// 16 bytes only allows call4; 32 or 48 bytes (+locals) are needed
+ *				// for call8/window_spill8 or call12/window_spill12 respectively.
+ *
+ *		:
+ *
+ *		retw
+ *
+ *		window_spill_common	// instantiates code used by window_spill4
+ *
+ *
+ *  On entry:
+ *	none (if window_spill4)
+ *	stack frame has enough space allocated for call8 (if window_spill8)
+ *	stack frame has enough space allocated for call12 (if window_spill12)
+ *  On exit:
+ *	 a4..a15 clobbered (if window_spill4)
+ *	 a8..a15 clobbered (if window_spill8)
+ *	a12..a15 clobbered (if window_spill12)
+ *	no caller windows are in live registers
+ */
+
+	.macro	window_spill4
+#if XCHAL_HAVE_WINDOWED
+# if XCHAL_NUM_AREGS == 16
+	movi	a15, 0			// for 16-register files, no need to call to reach the end
+# elif XCHAL_NUM_AREGS == 32
+	call4	.L__wdwspill_assist28	// call deep enough to clear out any live callers
+# elif XCHAL_NUM_AREGS == 64
+	call4	.L__wdwspill_assist60	// call deep enough to clear out any live callers
+# endif
+#endif
+	.endm	// window_spill4
+
+	.macro	window_spill8
+#if XCHAL_HAVE_WINDOWED
+# if XCHAL_NUM_AREGS == 16
+	movi	a15, 0			// for 16-register files, no need to call to reach the end
+# elif XCHAL_NUM_AREGS == 32
+	call8	.L__wdwspill_assist24	// call deep enough to clear out any live callers
+# elif XCHAL_NUM_AREGS == 64
+	call8	.L__wdwspill_assist56	// call deep enough to clear out any live callers
+# endif
+#endif
+	.endm	// window_spill8
+
+	.macro	window_spill12
+#if XCHAL_HAVE_WINDOWED
+# if XCHAL_NUM_AREGS == 16
+	movi	a15, 0			// for 16-register files, no need to call to reach the end
+# elif XCHAL_NUM_AREGS == 32
+	call12	.L__wdwspill_assist20	// call deep enough to clear out any live callers
+# elif XCHAL_NUM_AREGS == 64
+	call12	.L__wdwspill_assist52	// call deep enough to clear out any live callers
+# endif
+#endif
+	.endm	// window_spill12
+
+
+/*----------------------------------------------------------------------
+ *  window_spill_function
+ *
+ *  This macro outputs a function that will spill its caller's callers'
+ *  register windows to the stack.  Eg. it could be used to implement
+ *  a version of xthal_window_spill() that works in non-privileged tasks.
+ *  This works for both privileged and non-privileged tasks.
+ *
+ *  Typical usage:
+ *
+ *		.text
+ *		.align	4
+ *		.global	my_spill_function
+ *		.type	my_spill_function,@function
+ *	my_spill_function:
+ *		window_spill_function
+ *
+ *  On entry to resulting function:
+ *	none
+ *  On exit from resulting function:
+ *	none (no caller windows are in live registers)
+ */
+
+	.macro	window_spill_function
+#if XCHAL_HAVE_WINDOWED
+#  if XCHAL_NUM_AREGS == 32
+	entry	sp, 48
+	bbci.l	a0, 31, 1f		// branch if called with call4
+	bbsi.l	a0, 30, 2f		// branch if called with call12
+	call8	.L__wdwspill_assist16	// called with call8, only need another 8
+	retw
+1:	call12	.L__wdwspill_assist16	// called with call4, only need another 12
+	retw
+2:	call4	.L__wdwspill_assist16	// called with call12, only need another 4
+	retw
+#  elif XCHAL_NUM_AREGS == 64
+	entry	sp, 48
+	bbci.l	a0, 31, 1f		// branch if called with call4
+	bbsi.l	a0, 30, 2f		// branch if called with call12
+	call4	.L__wdwspill_assist52	// called with call8, only need a call4
+	retw
+1:	call8	.L__wdwspill_assist52	// called with call4, only need a call8
+	retw
+2:	call12	.L__wdwspill_assist40	// called with call12, can skip a call12
+	retw
+#  elif XCHAL_NUM_AREGS == 16
+	entry	sp, 16
+	bbci.l	a0, 31, 1f	// branch if called with call4
+	bbsi.l	a0, 30, 2f	// branch if called with call12
+	movi	a7, 0		// called with call8
+	retw
+1:	movi	a11, 0		// called with call4
+2:	retw			// if called with call12, everything already spilled
+
+//	movi	a15, 0		// trick to spill all but the direct caller
+//	j	1f
+//	//  The entry instruction is magical in the assembler (gets auto-aligned)
+//	//  so we have to jump to it to avoid falling through the padding.
+//	//  We need entry/retw to know where to return.
+//1:	entry	sp, 16
+//	retw
+#  else
+#   error "unrecognized address register file size"
+#  endif
+
+#endif /* XCHAL_HAVE_WINDOWED */
+	window_spill_common
+	.endm	// window_spill_function
+
+/*----------------------------------------------------------------------
+ *  window_spill_common
+ *
+ *  Common code used by any number of invocations of the window_spill##
+ *  and window_spill_function macros.
+ *
+ *  Must be instantiated exactly once within a given assembly unit,
+ *  within call/j range of and same section as window_spill##
+ *  macro invocations for that assembly unit.
+ *  (Is automatically instantiated by the window_spill_function macro.)
+ */
+
+	.macro	window_spill_common
+#if XCHAL_HAVE_WINDOWED && (XCHAL_NUM_AREGS == 32 || XCHAL_NUM_AREGS == 64)
+	.ifndef	.L__wdwspill_defined
+#  if XCHAL_NUM_AREGS >= 64
+.L__wdwspill_assist60:
+	entry	sp, 32
+	call8	.L__wdwspill_assist52
+	retw
+.L__wdwspill_assist56:
+	entry	sp, 16
+	call4	.L__wdwspill_assist52
+	retw
+.L__wdwspill_assist52:
+	entry	sp, 48
+	call12	.L__wdwspill_assist40
+	retw
+.L__wdwspill_assist40:
+	entry	sp, 48
+	call12	.L__wdwspill_assist28
+	retw
+#  endif
+.L__wdwspill_assist28:
+	entry	sp, 48
+	call12	.L__wdwspill_assist16
+	retw
+.L__wdwspill_assist24:
+	entry	sp, 32
+	call8	.L__wdwspill_assist16
+	retw
+.L__wdwspill_assist20:
+	entry	sp, 16
+	call4	.L__wdwspill_assist16
+	retw
+.L__wdwspill_assist16:
+	entry	sp, 16
+	movi	a15, 0
+	retw
+	.set	.L__wdwspill_defined, 1
+	.endif
+#endif /* XCHAL_HAVE_WINDOWED with 32 or 64 aregs */
+	.endm	// window_spill_common
+
+/*----------------------------------------------------------------------
+ *  beqi32
+ *
+ *  macro implements version of beqi for arbitrary 32-bit immediate value
+ *
+ *     beqi32 ax, ay, imm32, label
+ *
+ *  Compares value in register ax with imm32 value and jumps to label if
+ *  equal. Clobbers register ay if needed
+ *
+ */
+   .macro beqi32	ax, ay, imm, label
+    .ifeq ((\imm-1) & ~7)	// 1..8 ?
+		beqi	\ax, \imm, \label
+    .else
+      .ifeq (\imm+1)		// -1 ?
+		beqi	\ax, \imm, \label
+      .else
+        .ifeq (\imm)		// 0 ?
+		beqz	\ax, \label
+        .else
+		//  We could also handle immediates 10,12,16,32,64,128,256
+		//  but it would be a long macro...
+		movi	\ay, \imm
+		beq	\ax, \ay, \label
+        .endif
+      .endif
+    .endif
+   .endm // beqi32
+
+/*----------------------------------------------------------------------
+ *  isync_retw_nop
+ *
+ *  This macro must be invoked immediately after ISYNC if ISYNC
+ *  would otherwise be immediately followed by RETW (or other instruction
+ *  modifying WindowBase or WindowStart), in a context where
+ *  kernel vector mode may be selected, and level-one interrupts
+ *  and window overflows may be enabled, on an XEA1 configuration.
+ *
+ *  On hardware with erratum "XEA1KWIN" (see <xtensa/core.h> for details),
+ *  XEA1 code must have at least one instruction between ISYNC and RETW if
+ *  run in kernel vector mode with interrupts and window overflows enabled.
+ */
+	.macro	isync_retw_nop
+#if XCHAL_MAYHAVE_ERRATUM_XEA1KWIN
+	nop
+#endif
+	.endm
+
+/*----------------------------------------------------------------------
+ *  isync_return_nop
+ *
+ *  This macro should be used instead of isync_retw_nop in code that is
+ *  intended to run on both the windowed and call0 ABIs
+ */
+        .macro  isync_return_nop
+#ifdef __XTENSA_WINDOWED_ABI__
+        isync_retw_nop
+#endif
+        .endm
+
+/*----------------------------------------------------------------------
+ *  isync_erratum453
+ *
+ *  This macro must be invoked at certain points in the code,
+ *  such as in exception and interrupt vectors in particular,
+ *  to work around erratum 453.
+ */
+	.macro	isync_erratum453
+#if XCHAL_ERRATUM_453
+	isync
+#endif
+	.endm
+
+
+/*----------------------------------------------------------------------
+ *  readsr
+ *
+ *  wrapper for 'rsr' that constructs register names that involve levels
+ *  e.g. EPCn etc. Use like so:
+ *      readsr epc XCHAL_DEBUGLEVEL a2
+ */
+	.macro	readsr  reg suf ar
+	rsr.\reg\suf	\ar
+	.endm
+
+/*----------------------------------------------------------------------
+ *  writesr
+ *
+ *  wrapper for 'wsr' that constructs register names that involve levels
+ *  e.g. EPCn etc. Use like so:
+ *      writesr epc XCHAL_DEBUGLEVEL a2
+ */
+	.macro	writesr  reg suf ar
+	wsr.\reg\suf	\ar
+	.endm
+
+/*----------------------------------------------------------------------
+ *  xchgsr
+ *
+ *  wrapper for 'xsr' that constructs register names that involve levels
+ *  e.g. EPCn etc. Use like so:
+ *      xchgsr epc XCHAL_DEBUGLEVEL a2
+ */
+	.macro	xchgsr  reg suf ar
+	xsr.\reg\suf	\ar
+	.endm
+
+/*----------------------------------------------------------------------
+ * INDEX_SR
+ *
+ * indexing wrapper for rsr/wsr/xsr that constructs register names from
+ * the provided base name and the current index. Use like so:
+ *     .set _idx, 0
+ *     INDEX_SR rsr.ccompare a2
+ *
+ * this yields: rsr.ccompare0 a2
+ */
+	.macro	INDEX_SR  instr ar
+.ifeq (_idx)
+	&instr&0	\ar
+.endif
+.ifeq (_idx-1)
+	&instr&1	\ar
+.endif
+.ifeq (_idx-2)
+	&instr&2	\ar
+.endif
+.ifeq (_idx-3)
+	&instr&3	\ar
+.endif
+.ifeq (_idx-4)
+	&instr&4	\ar
+.endif
+.ifeq (_idx-5)
+	&instr&5	\ar
+.endif
+.ifeq (_idx-6)
+	&instr&6	\ar
+.endif
+.ifeq (_idx-7)
+	&instr&7	\ar
+.endif
+	.endm
+
+
+/*----------------------------------------------------------------------
+ *  abs
+ *
+ *  implements abs on machines that do not have it configured
+ */
+
+#if !XCHAL_HAVE_ABS
+	.macro abs arr, ars
+	.ifc \arr, \ars
+	//src equal dest is less efficient
+	bgez \arr, 1f
+	neg \arr, \arr
+1:
+	.else
+	neg \arr, \ars
+	movgez \arr, \ars, \ars
+	.endif
+	.endm
+#endif /* !XCHAL_HAVE_ABS */
+
+
+/*----------------------------------------------------------------------
+ *  addx2
+ *
+ *  implements addx2 on machines that do not have it configured
+ *
+ */
+
+#if !XCHAL_HAVE_ADDX
+	.macro addx2 arr, ars, art
+	.ifc \arr, \art
+	.ifc \arr, \ars
+	// addx2 a, a, a     (not common)
+	.err
+	.else
+	add \arr, \ars, \art
+	add \arr, \ars, \art
+	.endif
+	.else
+	//addx2 a, b, c
+	//addx2 a, a, b
+	//addx2 a, b, b
+	slli \arr, \ars, 1
+	add  \arr, \arr, \art
+	.endif
+	.endm
+#endif /* !XCHAL_HAVE_ADDX */
+
+/*----------------------------------------------------------------------
+ *  addx4
+ *
+ *  implements addx4 on machines that do not have it configured
+ *
+ */
+
+#if !XCHAL_HAVE_ADDX
+	.macro addx4 arr, ars, art
+	.ifc \arr, \art
+	.ifc \arr, \ars
+	// addx4 a, a, a     (not common)
+	 .err
+	 .else
+	//# addx4 a, b, a
+	add \arr, \ars, \art
+	add \arr, \ars, \art
+	add \arr, \ars, \art
+	add \arr, \ars, \art
+	.endif
+	.else
+	//addx4 a, b, c
+	//addx4 a, a, b
+	//addx4 a, b, b
+	slli \arr, \ars, 2
+	add  \arr, \arr, \art
+	.endif
+	.endm
+#endif /* !XCHAL_HAVE_ADDX */
+
+/*----------------------------------------------------------------------
+ *  addx8
+ *
+ *  implements addx8 on machines that do not have it configured
+ *
+ */
+
+#if !XCHAL_HAVE_ADDX
+	.macro addx8 arr, ars, art
+	.ifc \arr, \art
+	.ifc \arr, \ars
+	//addx8 a, a, a     (not common)
+	.err
+	.else
+	//addx8 a, b, a
+	add \arr, \ars, \art
+	add \arr, \ars, \art
+	add \arr, \ars, \art
+	add \arr, \ars, \art
+	add \arr, \ars, \art
+	add \arr, \ars, \art
+	add \arr, \ars, \art
+	add \arr, \ars, \art
+	.endif
+	.else
+	//addx8 a, b, c
+	//addx8 a, a, b
+	//addx8 a, b, b
+	slli \arr, \ars, 3
+	add  \arr, \arr, \art
+	.endif
+	.endm
+#endif /* !XCHAL_HAVE_ADDX */
+
+
+/*----------------------------------------------------------------------
+ *  rfe_rfue
+ *
+ *  Maps to RFUE on XEA1, and RFE on XEA2.  No mapping on XEAX.
+ */
+
+#if XCHAL_HAVE_XEA1
+	.macro	rfe_rfue
+	rfue
+	.endm
+#elif XCHAL_HAVE_XEA2
+	.macro	rfe_rfue
+	rfe
+	.endm
+#endif
+
+
+/*----------------------------------------------------------------------
+ *  abi_entry
+ *
+ *  Generate proper function entry sequence for the current ABI
+ *  (windowed or call0).  Takes care of allocating stack space (up to 1kB)
+ *  and saving the return PC, if necessary.  The corresponding abi_return
+ *  macro does the corresponding stack deallocation and restoring return PC.
+ *
+ *  Parameters are:
+ *
+ *	locsize		Number of bytes to allocate on the stack
+ *			for local variables (and for args to pass to
+ *			callees, if any calls are made).  Defaults to zero.
+ *			The macro rounds this up to a multiple of 16.
+ *			NOTE:  large values are allowed (e.g. up to 1 GB).
+ *
+ *	callsize	Maximum call size made by this function.
+ *			Leave zero (default) for leaf functions, i.e. if
+ *			this function makes no calls to other functions.
+ *			Otherwise must be set to 4, 8, or 12 according
+ *			to whether the "largest" call made is a call[x]4,
+ *			call[x]8, or call[x]12 (for call0 ABI, it makes
+ *			no difference whether this is set to 4, 8 or 12,
+ *			but it must be set to one of these values).
+ *
+ *  NOTE:  It is up to the caller to align the entry point, declare the
+ *  function symbol, make it global, etc.
+ *
+ *  NOTE:  This macro relies on assembler relaxation for large values
+ *  of locsize.  It might not work with the no-transform directive.
+ *  NOTE:  For the call0 ABI, this macro ensures SP is allocated or
+ *  de-allocated cleanly, i.e. without temporarily allocating too much
+ *  (or allocating negatively!) due to addi relaxation.
+ *
+ *  NOTE:  Generating the proper sequence and register allocation for
+ *  making calls in an ABI independent manner is a separate topic not
+ *  covered by this macro.
+ *
+ *  NOTE:  To access arguments, you can't use a fixed offset from SP.
+ *  The offset depends on the ABI, whether the function is leaf, etc.
+ *  The simplest method is probably to use the .locsz symbol, which
+ *  is set by this macro to the actual number of bytes allocated on
+ *  the stack, in other words, to the offset from SP to the arguments.
+ *  E.g. for a function whose arguments are all 32-bit integers, you
+ *  can get the 7th and 8th arguments (1st and 2nd args stored on stack)
+ *  using:
+ *	l32i	a2, sp, .locsz
+ *	l32i	a3, sp, .locsz+4
+ *  (this example works as long as locsize is under L32I's offset limit
+ *   of 1020 minus up to 48 bytes of ABI-specific stack usage;
+ *   otherwise you might first need to do "addi a?, sp, .locsz"
+ *   or similar sequence).
+ *
+ *  NOTE:  For call0 ABI, this macro (and abi_return) may clobber a9
+ *  (a caller-saved register).
+ *
+ *  Examples:
+ *		abi_entry
+ *		abi_entry  5
+ *		abi_entry  22, 8
+ *		abi_entry  0, 4
+ */
+
+	/*
+	 *  Compute .locsz and .callsz without emitting any instructions.
+	 *  Used by both abi_entry and abi_return.
+	 *  Assumes locsize >= 0.
+	 */
+	.macro	abi_entry_size locsize=0, callsize=0
+#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
+	.ifeq	\callsize
+	 .set	.callsz, 16
+	.else
+	 .ifeq	\callsize-4
+	  .set	.callsz, 16
+	 .else
+	  .ifeq	\callsize-8
+	   .set	.callsz, 32
+	  .else
+	   .ifeq \callsize-12
+	    .set .callsz, 48
+	   .else
+	    .error	"abi_entry: invalid call size \callsize"
+	   .endif
+	  .endif
+	 .endif
+	.endif
+	.set	.locsz, .callsz + ((\locsize + 15) & -16)
+#else
+	.set	.callsz, \callsize
+	.if	.callsz		/* if calls, need space for return PC */
+	 .set	.locsz, (\locsize + 4 + 15) & -16
+	.else
+	 .set	.locsz, (\locsize + 15) & -16
+	.endif
+#endif
+	.endm
+
+	.macro abi_entry locsize=0, callsize=0
+	.iflt	\locsize
+	 .error	"abi_entry: invalid negative size of locals (\locsize)"
+	.endif
+	abi_entry_size	\locsize, \callsize
+#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
+# define ABI_ENTRY_MINSIZE	3	/* size of abi_entry (no arguments) instructions in bytes */
+	.ifgt	.locsz - 32760	/* .locsz > 32760 (ENTRY's max range)? */
+	/*  Funky computation to try to have assembler use addmi efficiently if possible:  */
+	entry	sp, 0x7F00 + (.locsz & 0xF0)
+	addi	a12, sp, - ((.locsz & -0x100) - 0x7F00)
+	movsp	sp, a12
+	.else
+	entry	sp, .locsz
+	.endif
+#else
+# define ABI_ENTRY_MINSIZE	0	/* size of abi_entry (no arguments) instructions in bytes */
+	.if	.locsz
+	 .ifle	.locsz - 128	/* if locsz <= 128 */
+	addi	sp, sp, -.locsz
+	  .if	.callsz
+	s32i	a0, sp, .locsz - 4
+	  .endif
+	 .elseif  .callsz	/* locsz > 128, with calls: */
+	movi	a9, .locsz - 16		/* note: a9 is caller-saved */
+	addi	sp, sp, -16
+	s32i	a0, sp, 12
+	sub	sp, sp, a9
+	 .else			/* locsz > 128, no calls: */
+	movi	a9, .locsz
+	sub	sp, sp, a9
+	 .endif			/* end */
+	.endif
+#endif
+	.endm
+
+
+
+/*----------------------------------------------------------------------
+ *  abi_return
+ *
+ *  Generate proper function exit sequence for the current ABI
+ *  (windowed or call0).  Takes care of freeing stack space and
+ *  restoring the return PC, if necessary.
+ *  NOTE:  This macro MUST be invoked following a corresponding
+ *  abi_entry macro invocation.  For call0 ABI in particular,
+ *  all stack and PC restoration are done according to the last
+ *  abi_entry macro invoked before this macro in the assembly file.
+ *
+ *  Normally this macro takes no arguments.  However to allow
+ *  for placing abi_return *before* abi_entry (as must be done
+ *  for some highly optimized assembly), it optionally takes
+ *  exactly the same arguments as abi_entry.
+ */
+
+	.macro abi_return	locsize=-1, callsize=0
+	.ifge	\locsize
+	abi_entry_size	\locsize, \callsize
+	.endif
+#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
+	retw
+#else
+	.if	.locsz
+	 .iflt	.locsz - 128	/* if locsz < 128 */
+	  .if	.callsz
+	l32i	a0, sp, .locsz - 4
+	  .endif
+	addi	sp, sp, .locsz
+	 .elseif  .callsz	/* locsz >= 128, with calls: */
+	addi	a9, sp, .locsz - 16
+	l32i	a0, a9, 12
+	addi	sp, a9, 16
+	 .else			/* locsz >= 128, no calls: */
+	movi	a9, .locsz
+	add	sp, sp, a9
+	 .endif			/* end */
+	.endif
+	ret
+#endif
+	.endm
+
+
+/*
+ * HW erratum fixes.
+ */
+
+	.macro hw_erratum_487_fix
+#if defined XSHAL_ERRATUM_487_FIX
+	isync
+#endif
+	.endm
+
+/*
+ * These macros are internal, subject to change, and should not be used in
+ * any new code.
+ */
+
+#define _GBL(x)    .global x
+#define _TYP(x)    .type x,@function
+#define _ALN(x)    .align x
+#define _SIZ(x)    .size x, . - x
+#define _MKEND(x)  .purgem endfunc ; .macro endfunc ; _SIZ(x) ; .purgem endfunc ; .macro endfunc ; .endm ; .endm
+#define _SYMT(x)   _GBL(x); _MKEND(x); _TYP(x); _ALN(4); x:
+#define _SYM2(x)   _GBL(x); _TYP(x); x:
+#define _SYM(x)   _GBL(x); _MKEND(x); _ALN(4); x:
+.macro endfunc ; .endm
+
+/*
+ * the DECLFUNC() macro provides a mechanism for implementing both the
+ * standard and _nw interface with a single copy of the code.
+ *
+ * For Call0 ABI there is one function definition which is labeled with
+ * both the xthal_..._nw and xthal_... symbols.
+ *
+ * For windowed ABI, two compilations are involved (one with the __NW_FUNCTION__
+ * symbol defined) resulting in two separate functions (the _nw one without
+ * the window adjustments).
+*/
+
+#if defined(__NW_FUNCTION__)
+# define DECLFUNC(x) _SYMT(x ## _nw)
+#else
+# if defined (__XTENSA_CALL0_ABI__)
+#  define DECLFUNC(x)  _SYMT(x); _SYM2(x ## _nw)
+# else
+#  define DECLFUNC(x)  _SYMT(x)
+# endif
+#endif
+
+#endif /*XTENSA_COREASM_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/corebits.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/corebits.h
new file mode 100644
index 00000000000..5d14a8c6716
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/corebits.h
@@ -0,0 +1,194 @@
+/*
+ * xtensa/corebits.h - Xtensa Special Register field positions, masks, values.
+ *
+ * (In previous releases, these were defined in specreg.h, a generated file.
+ *  This file is not generated, ie. it is processor configuration independent.)
+ */
+
+/* $Id: //depot/rel/Foxhill/dot.9/Xtensa/OS/include/xtensa/corebits.h#1 $ */
+
+/*
+ * Copyright (c) 2005-2011 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef XTENSA_COREBITS_H
+#define XTENSA_COREBITS_H
+
+/*  EXCCAUSE register fields:  */
+#define EXCCAUSE_EXCCAUSE_SHIFT	0
+#define EXCCAUSE_EXCCAUSE_MASK	0x3F
+/*  EXCCAUSE register values:  */
+/*
+ *  General Exception Causes
+ *  (values of EXCCAUSE special register set by general exceptions,
+ *   which vector to the user, kernel, or double-exception vectors).
+ */
+#define EXCCAUSE_ILLEGAL		0	/* Illegal Instruction */
+#define EXCCAUSE_SYSCALL		1	/* System Call (SYSCALL instruction) */
+#define EXCCAUSE_INSTR_ERROR		2	/* Instruction Fetch Error */
+# define EXCCAUSE_IFETCHERROR		2	/* (backward compatibility macro, deprecated, avoid) */
+#define EXCCAUSE_LOAD_STORE_ERROR	3	/* Load Store Error */
+# define EXCCAUSE_LOADSTOREERROR	3	/* (backward compatibility macro, deprecated, avoid) */
+#define EXCCAUSE_LEVEL1_INTERRUPT	4	/* Level 1 Interrupt */
+# define EXCCAUSE_LEVEL1INTERRUPT	4	/* (backward compatibility macro, deprecated, avoid) */
+#define EXCCAUSE_ALLOCA			5	/* Stack Extension Assist (MOVSP instruction) for alloca */
+#define EXCCAUSE_DIVIDE_BY_ZERO		6	/* Integer Divide by Zero */
+# define EXCCAUSE_SPECULATION		7	/* Use of Failed Speculative Access (deprecated) */
+#define EXCCAUSE_PC_ERROR		7	/* Next PC Value Illegal */
+#define EXCCAUSE_PRIVILEGED		8	/* Privileged Instruction */
+#define EXCCAUSE_UNALIGNED		9	/* Unaligned Load or Store */
+#define EXCCAUSE_EXTREG_PRIVILEGE	10	/* External Register Privilege Error */
+#define EXCCAUSE_EXCLUSIVE_ERROR	11	/* Load exclusive to unsupported memory type or unaligned address */
+#define EXCCAUSE_INSTR_DATA_ERROR	12	/* PIF Data Error on Instruction Fetch (RB-200x and later) */
+#define EXCCAUSE_LOAD_STORE_DATA_ERROR	13	/* PIF Data Error on Load or Store (RB-200x and later) */
+#define EXCCAUSE_INSTR_ADDR_ERROR	14	/* PIF Address Error on Instruction Fetch (RB-200x and later) */
+#define EXCCAUSE_LOAD_STORE_ADDR_ERROR	15	/* PIF Address Error on Load or Store (RB-200x and later) */
+#define EXCCAUSE_ITLB_MISS		16	/* ITLB Miss (no ITLB entry matches, hw refill also missed) */
+#define EXCCAUSE_ITLB_MULTIHIT		17	/* ITLB Multihit (multiple ITLB entries match) */
+#define EXCCAUSE_INSTR_RING		18	/* Ring Privilege Violation on Instruction Fetch */
+/* Reserved				19 */	/* Size Restriction on IFetch (not implemented) */
+#define EXCCAUSE_INSTR_PROHIBITED	20	/* Cache Attribute does not allow Instruction Fetch */
+/* Reserved				21..23 */
+#define EXCCAUSE_DTLB_MISS		24	/* DTLB Miss (no DTLB entry matches, hw refill also missed) */
+#define EXCCAUSE_DTLB_MULTIHIT		25	/* DTLB Multihit (multiple DTLB entries match) */
+#define EXCCAUSE_LOAD_STORE_RING	26	/* Ring Privilege Violation on Load or Store */
+/* Reserved				27 */	/* Size Restriction on Load/Store (not implemented) */
+#define EXCCAUSE_LOAD_PROHIBITED	28	/* Cache Attribute does not allow Load */
+#define EXCCAUSE_STORE_PROHIBITED	29	/* Cache Attribute does not allow Store */
+/* Reserved				30..31 */
+#define EXCCAUSE_CP_DISABLED(n)		(32+(n))	/* Access to Coprocessor 'n' when disabled */
+#define EXCCAUSE_CP0_DISABLED		32	/* Access to Coprocessor 0 when disabled */
+#define EXCCAUSE_CP1_DISABLED		33	/* Access to Coprocessor 1 when disabled */
+#define EXCCAUSE_CP2_DISABLED		34	/* Access to Coprocessor 2 when disabled */
+#define EXCCAUSE_CP3_DISABLED		35	/* Access to Coprocessor 3 when disabled */
+#define EXCCAUSE_CP4_DISABLED		36	/* Access to Coprocessor 4 when disabled */
+#define EXCCAUSE_CP5_DISABLED		37	/* Access to Coprocessor 5 when disabled */
+#define EXCCAUSE_CP6_DISABLED		38	/* Access to Coprocessor 6 when disabled */
+#define EXCCAUSE_CP7_DISABLED		39	/* Access to Coprocessor 7 when disabled */
+/* Reserved				40..63 */
+
+/*  PS register fields:  */
+#define PS_WOE_SHIFT		18
+#define PS_WOE_MASK		0x00040000
+#define PS_WOE			PS_WOE_MASK
+#define PS_CALLINC_SHIFT	16
+#define PS_CALLINC_MASK		0x00030000
+#define PS_CALLINC(n)		(((n)&3)<<PS_CALLINC_SHIFT)	/* n = 0..3 */
+#define PS_OWB_SHIFT		8
+#define PS_OWB_MASK		0x00000F00
+#define PS_OWB(n)		(((n)&15)<<PS_OWB_SHIFT)	/* n = 0..15 (or 0..7) */
+#define PS_RING_SHIFT		6
+#define PS_RING_MASK		0x000000C0
+#define PS_RING(n)		(((n)&3)<<PS_RING_SHIFT)	/* n = 0..3 */
+#define PS_UM_SHIFT		5
+#define PS_UM_MASK		0x00000020
+#define PS_UM			PS_UM_MASK
+#define PS_EXCM_SHIFT		4
+#define PS_EXCM_MASK		0x00000010
+#define PS_EXCM			PS_EXCM_MASK
+#define PS_INTLEVEL_SHIFT	0
+#define PS_INTLEVEL_MASK	0x0000000F
+#define PS_INTLEVEL(n)		((n)&PS_INTLEVEL_MASK)		/* n = 0..15 */
+/*  ABI-derived field values:  */
+#ifdef __XTENSA_CALL0_ABI__
+#define PS_WOE_ABI		0
+#define PS_WOECALL4_ABI		0
+#else
+#define PS_WOE_ABI		PS_WOE				/* 0x40000 */
+#define PS_WOECALL4_ABI		(PS_WOE | PS_CALLINC(1))	/* 0x50000, per call4 */
+#endif
+/*  Backward compatibility (deprecated):  */
+#define PS_PROGSTACK_SHIFT	PS_UM_SHIFT
+#define PS_PROGSTACK_MASK	PS_UM_MASK
+#define PS_PROG_SHIFT		PS_UM_SHIFT
+#define PS_PROG_MASK		PS_UM_MASK
+#define PS_PROG			PS_UM
+
+/*  DBREAKCn register fields:  */
+#define DBREAKC_MASK_SHIFT		0
+#define DBREAKC_MASK_MASK		0x0000003F
+#define DBREAKC_LOADBREAK_SHIFT		30
+#define DBREAKC_LOADBREAK_MASK		0x40000000
+#define DBREAKC_STOREBREAK_SHIFT	31
+#define DBREAKC_STOREBREAK_MASK		0x80000000
+
+/*  DEBUGCAUSE register fields:  */
+#define DEBUGCAUSE_DEBUGINT_SHIFT	5
+#define DEBUGCAUSE_DEBUGINT_MASK	0x20	/* debug interrupt */
+#define DEBUGCAUSE_BREAKN_SHIFT		4
+#define DEBUGCAUSE_BREAKN_MASK		0x10	/* BREAK.N instruction */
+#define DEBUGCAUSE_BREAK_SHIFT		3
+#define DEBUGCAUSE_BREAK_MASK		0x08	/* BREAK instruction */
+#define DEBUGCAUSE_DBREAK_SHIFT		2
+#define DEBUGCAUSE_DBREAK_MASK		0x04	/* DBREAK match */
+#define DEBUGCAUSE_IBREAK_SHIFT		1
+#define DEBUGCAUSE_IBREAK_MASK		0x02	/* IBREAK match */
+#define DEBUGCAUSE_ICOUNT_SHIFT		0
+#define DEBUGCAUSE_ICOUNT_MASK		0x01	/* ICOUNT would increment to zero */
+
+/*  MESR register fields:  */
+#define MESR_MEME		0x00000001	/* memory error */
+#define MESR_MEME_SHIFT		0
+#define MESR_DME		0x00000002	/* double memory error */
+#define MESR_DME_SHIFT		1
+#define MESR_RCE		0x00000010	/* recorded memory error */
+#define MESR_RCE_SHIFT		4
+#define MESR_LCE
+#define MESR_LCE_SHIFT		?
+#define MESR_LCE_L
+#define MESR_ERRENAB		0x00000100
+#define MESR_ERRENAB_SHIFT	8
+#define MESR_ERRTEST		0x00000200
+#define MESR_ERRTEST_SHIFT	9
+#define MESR_DATEXC		0x00000400
+#define MESR_DATEXC_SHIFT	10
+#define MESR_INSEXC		0x00000800
+#define MESR_INSEXC_SHIFT	11
+#define MESR_WAYNUM_SHIFT	16
+#define MESR_ACCTYPE_SHIFT	20
+#define MESR_MEMTYPE_SHIFT	24
+#define MESR_ERRTYPE_SHIFT	30
+
+/*  MEMCTL register fields:  */
+#define MEMCTL_SNOOP_EN_SHIFT	1
+#define MEMCTL_SNOOP_EN		0x02	/* enable snoop responses (default 0) */
+#define MEMCTL_L0IBUF_EN_SHIFT	0
+#define MEMCTL_L0IBUF_EN	0x01	/* enable loop instr. buffer (default 1) */
+#define MEMCTL_INV_EN_SHIFT	23
+#define MEMCTL_INV_EN		0x00800000	/* invalidate cache ways being increased */
+#define MEMCTL_DCWU_SHIFT	8
+#define MEMCTL_DCWU_BITS	5
+#define MEMCTL_DCWA_SHIFT	13
+#define MEMCTL_DCWA_BITS	5
+#define MEMCTL_ICWU_SHIFT	18
+#define MEMCTL_ICWU_BITS	5
+#define MEMCTL_DCWU_MASK	0x00001F00	/* Bits  8-12 dcache ways in use */
+#define MEMCTL_DCWA_MASK	0x0003E000	/* Bits 13-17 dcache ways allocatable */
+#define MEMCTL_ICWU_MASK	0x007C0000	/* Bits 18-22 icache ways in use */
+#define MEMCTL_DCWU_CLR_MASK	~(MEMCTL_DCWU_MASK)
+#define MEMCTL_DCWA_CLR_MASK	~(MEMCTL_DCWA_MASK)
+#define MEMCTL_ICWU_CLR_MASK	~(MEMCTL_ICWU_MASK)
+#define MEMCTL_DCW_CLR_MASK	(MEMCTL_DCWU_CLR_MASK | MEMCTL_DCWA_CLR_MASK)
+#define MEMCTL_IDCW_CLR_MASK	(MEMCTL_DCW_CLR_MASK | MEMCTL_ICWU_CLR_MASK)
+
+
+#endif /*XTENSA_COREBITS_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/hal.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/hal.h
new file mode 100644
index 00000000000..11120ec1c37
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/hal.h
@@ -0,0 +1,1507 @@
+/*
+   xtensa/hal.h -- contains a definition of the Core HAL interface
+
+   All definitions in this header file are independent of any specific
+   Xtensa processor configuration.  Thus software (eg. OS, application,
+   etc) can include this header file and be compiled into configuration-
+   independent objects that can be distributed and eventually linked
+   to the HAL library (libhal.a) to create a configuration-specific
+   final executable.
+
+   Certain definitions, however, are release/version-specific -- such as
+   the XTHAL_RELEASE_xxx macros (or additions made in later versions).
+
+
+   $Id: //depot/rel/Foxhill/dot.9/Xtensa/OS/target-os-src/hal.h.tpp#1 $
+
+   Copyright (c) 1999-2015 Cadence Design Systems, Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+#ifndef XTENSA_HAL_H
+#define XTENSA_HAL_H
+
+/****************************************************************************
+	    Definitions Useful for Any Code, USER or PRIVILEGED
+ ****************************************************************************/
+
+
+/*----------------------------------------------------------------------
+	   Constant Definitions  (shared with assembly)
+  ----------------------------------------------------------------------*/
+
+/*
+ *  Software (Xtensa Tools) version information.  Not configuration-specific!
+ *
+ *  NOTE:  "release" is a misnomer here, these are really product "version"
+ *	numbers.  A "release" is a collection of product versions
+ *	made available at once (together) to customers.
+ *	In the past, release and version names all matched in T####.# form,
+ *	making the distinction irrelevant.  This is no longer the case.
+ */
+#define XTHAL_RELEASE_MAJOR	12000
+#define XTHAL_RELEASE_MINOR	9
+#define XTHAL_RELEASE_NAME	"12.0.9"
+#define XTHAL_REL_12	1
+#define XTHAL_REL_12_0	1
+#define XTHAL_REL_12_0_9	1
+
+/*  HAL version numbers (these names are for backward compatibility):  */
+#define XTHAL_MAJOR_REV		XTHAL_RELEASE_MAJOR
+#define XTHAL_MINOR_REV		XTHAL_RELEASE_MINOR
+/*
+ *  A bit of software release/version history on values of XTHAL_{MAJOR,MINOR}_REV:
+ *
+ *	SW Version	MAJOR	MINOR		Comment
+ *	=======		=====	=====		=======
+ *	T1015.n		n/a	n/a		(HAL not yet available)
+ *	T1020.{0,1,2}	0	1		(HAL beta)
+ *	T1020.{3,4}	0	2		First release.
+ *	T1020.n (n>4)	0	2 or >3		(TBD)
+ *	T1030.0		0	1		(HAL beta)
+ *	T1030.{1,2}	0	3		Equivalent to first release.
+ *	T1030.n (n>=3)	0	>= 3		(TBD)
+ *	T1040.n		1040	n		Full CHAL available from T1040.2
+ *	T1050.n		1050	n		.
+ *	6.0.n		6000	n		Xtensa Tools v6   (RA-200x.n)
+ *	7.0.n		7000	n		Xtensa Tools v7   (RB-200x.n)
+ *	7.1.n		7010	n		Xtensa Tools v7.1 (RB-200x.(n+2))
+ *	8.0.n		8000	n		Xtensa Tools v8   (RC-20xx.n)
+ *	9.0.n		9000	n		Xtensa Tools v9   (RD-201x.n)
+ *	10.0.n		10000	n		Xtensa Tools v10  (RE-201x.n)
+ *
+ *
+ *  Note:  there is a distinction between the software version with
+ *  which something is compiled (accessible using XTHAL_RELEASE_* macros)
+ *  and the software version with which the HAL library was compiled
+ *  (accessible using Xthal_release_* global variables).  This
+ *  distinction is particularly relevant for vendors that distribute
+ *  configuration-independent binaries (eg. an OS), where their customer
+ *  might link it with a HAL of a different Xtensa software version.
+ *  In this case, it may be appropriate for the OS to verify at run-time
+ *  whether XTHAL_RELEASE_* and Xthal_release_* are compatible.
+ *  [Guidelines as to which version is compatible with which are not
+ *  currently provided explicitly, but might be inferred from reading
+ *  OSKit documentation for all releases -- compatibility is also highly
+ *  dependent on which HAL features are used.  Each version is usually
+ *  backward compatible, with very few exceptions if any.]
+ */
+
+/*  Version comparison operators (among major/minor pairs):  */
+#define XTHAL_REL_GE(maja,mina, majb,minb)	((maja) > (majb) || \
+						 ((maja) == (majb) && (mina) >= (minb)))
+#define XTHAL_REL_GT(maja,mina, majb,minb)	((maja) > (majb) || \
+						 ((maja) == (majb) && (mina) > (minb)))
+#define XTHAL_REL_LE(maja,mina, majb,minb)	((maja) < (majb) || \
+						 ((maja) == (majb) && (mina) <= (minb)))
+#define XTHAL_REL_LT(maja,mina, majb,minb)	((maja) < (majb) || \
+						 ((maja) == (majb) && (mina) < (minb)))
+#define XTHAL_REL_EQ(maja,mina, majb,minb)	((maja) == (majb) && (mina) == (minb))
+
+/*  Fuzzy (3-way) logic operators:  */
+#define XTHAL_MAYBE		-1	/* 0=NO, 1=YES, -1=MAYBE */
+#define XTHAL_FUZZY_AND(a,b)	(((a)==0 || (b)==0) ? 0 : ((a)==1 && (b)==1) ? 1 : XTHAL_MAYBE)
+#define XTHAL_FUZZY_OR(a,b)	(((a)==1 || (b)==1) ? 1 : ((a)==0 && (b)==0) ? 0 : XTHAL_MAYBE)
+#define XTHAL_FUZZY_NOT(a)	(((a)==0 || (a)==1) ? (1-(a)) : XTHAL_MAYBE)
+
+
+/*
+ *  Architectural limit, independent of configuration:
+ */
+#define XTHAL_MAX_CPS		8	/* max number of coprocessors (0..7) */
+
+/*  Misc:  */
+#define XTHAL_LITTLEENDIAN		0
+#define XTHAL_BIGENDIAN			1
+
+
+
+#if !defined(_ASMLANGUAGE) && !defined(_NOCLANGUAGE) && !defined(__ASSEMBLER__)
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stddef.h>
+
+/*----------------------------------------------------------------------
+				HAL
+  ----------------------------------------------------------------------*/
+
+/* Constant to be checked in build = (XTHAL_MAJOR_REV<<16)|XTHAL_MINOR_REV */
+extern const unsigned int Xthal_rev_no;
+
+
+/*----------------------------------------------------------------------
+			Optional/Custom Processor State
+  ----------------------------------------------------------------------*/
+
+/* save & restore the extra processor state */
+extern void xthal_save_extra(void *base);
+extern void xthal_restore_extra(void *base);
+
+extern void xthal_save_cpregs(void *base, int);
+extern void xthal_restore_cpregs(void *base, int);
+/* versions specific to each coprocessor id */
+extern void xthal_save_cp0(void *base);
+extern void xthal_save_cp1(void *base);
+extern void xthal_save_cp2(void *base);
+extern void xthal_save_cp3(void *base);
+extern void xthal_save_cp4(void *base);
+extern void xthal_save_cp5(void *base);
+extern void xthal_save_cp6(void *base);
+extern void xthal_save_cp7(void *base);
+extern void xthal_restore_cp0(void *base);
+extern void xthal_restore_cp1(void *base);
+extern void xthal_restore_cp2(void *base);
+extern void xthal_restore_cp3(void *base);
+extern void xthal_restore_cp4(void *base);
+extern void xthal_restore_cp5(void *base);
+extern void xthal_restore_cp6(void *base);
+extern void xthal_restore_cp7(void *base);
+/* pointers to each of the functions above */
+extern void* Xthal_cpregs_save_fn[XTHAL_MAX_CPS];
+extern void* Xthal_cpregs_restore_fn[XTHAL_MAX_CPS];
+/* similarly for non-windowed ABI (may be same or different) */
+extern void* Xthal_cpregs_save_nw_fn[XTHAL_MAX_CPS];
+extern void* Xthal_cpregs_restore_nw_fn[XTHAL_MAX_CPS];
+
+/*extern void xthal_save_all_extra(void *base);*/
+/*extern void xthal_restore_all_extra(void *base);*/
+
+/* space for processor state */
+extern const unsigned int Xthal_extra_size;
+extern const unsigned int Xthal_extra_align;
+extern const unsigned int Xthal_cpregs_size[XTHAL_MAX_CPS];
+extern const unsigned int Xthal_cpregs_align[XTHAL_MAX_CPS];
+extern const unsigned int Xthal_all_extra_size;
+extern const unsigned int Xthal_all_extra_align;
+/* coprocessor names */
+extern const char * const Xthal_cp_names[XTHAL_MAX_CPS];
+
+/* initialize the extra processor */
+/*extern void xthal_init_extra(void);*/
+/* initialize the TIE coprocessor */
+/*extern void xthal_init_cp(int);*/
+
+/* initialize the extra processor */
+extern void xthal_init_mem_extra(void *);
+/* initialize the TIE coprocessor */
+extern void xthal_init_mem_cp(void *, int);
+
+/* the number of TIE coprocessors contiguous from zero (for Tor2) */
+extern const unsigned int Xthal_num_coprocessors;
+
+/* actual number of coprocessors */
+extern const unsigned char Xthal_cp_num;
+/* index of highest numbered coprocessor, plus one */
+extern const unsigned char Xthal_cp_max;
+/* index of highest allowed coprocessor number, per cfg, plus one */
+/*extern const unsigned char Xthal_cp_maxcfg;*/
+/* bitmask of which coprocessors are present */
+extern const unsigned int  Xthal_cp_mask;
+
+/* read & write extra state register */
+/*extern int xthal_read_extra(void *base, unsigned reg, unsigned *value);*/
+/*extern int xthal_write_extra(void *base, unsigned reg, unsigned value);*/
+
+/* read & write a TIE coprocessor register */
+/*extern int xthal_read_cpreg(void *base, int cp, unsigned reg, unsigned *value);*/
+/*extern int xthal_write_cpreg(void *base, int cp, unsigned reg, unsigned value);*/
+
+/* return coprocessor number based on register */
+/*extern int xthal_which_cp(unsigned reg);*/
+
+
+/*----------------------------------------------------------------------
+   				Register Windows
+  ----------------------------------------------------------------------*/
+
+/* number of registers in register window */
+extern const unsigned int  Xthal_num_aregs;
+extern const unsigned char Xthal_num_aregs_log2;
+
+
+/*----------------------------------------------------------------------
+   				Cache
+  ----------------------------------------------------------------------*/
+
+/* size of the cache lines in log2(bytes) */
+extern const unsigned char Xthal_icache_linewidth;
+extern const unsigned char Xthal_dcache_linewidth;
+/* size of the cache lines in bytes (2^linewidth) */
+extern const unsigned short Xthal_icache_linesize;
+extern const unsigned short Xthal_dcache_linesize;
+
+/* size of the caches in bytes (ways * 2^(linewidth + setwidth)) */
+extern const unsigned int  Xthal_icache_size;
+extern const unsigned int  Xthal_dcache_size;
+/* cache features */
+extern const unsigned char Xthal_dcache_is_writeback;
+
+/* cache region operations*/
+extern void xthal_icache_region_invalidate( void *addr, unsigned size );
+extern void xthal_dcache_region_invalidate( void *addr, unsigned size );
+extern void xthal_dcache_region_writeback( void *addr, unsigned size );
+extern void xthal_dcache_region_writeback_inv( void *addr, unsigned size );
+
+#ifndef XTHAL_USE_CACHE_MACROS
+/* cache line operations*/
+extern void xthal_icache_line_invalidate(void *addr);
+extern void xthal_dcache_line_invalidate(void *addr);
+extern void xthal_dcache_line_writeback(void *addr);
+extern void xthal_dcache_line_writeback_inv(void *addr);
+/* sync icache and memory */
+extern void xthal_icache_sync( void );
+/* sync dcache and memory */
+extern void xthal_dcache_sync( void );
+#endif
+
+/* get/set number of icache ways enabled */
+extern unsigned int xthal_icache_get_ways(void);
+extern void         xthal_icache_set_ways(unsigned int ways);
+/* get/set number of dcache ways enabled */
+extern unsigned int xthal_dcache_get_ways(void);
+extern void         xthal_dcache_set_ways(unsigned int ways);
+
+/* coherency (low-level -- not normally called directly) */
+extern void xthal_cache_coherence_on( void );
+extern void xthal_cache_coherence_off( void );
+/* coherency (high-level) */
+extern void xthal_cache_coherence_optin( void );
+extern void xthal_cache_coherence_optout( void );
+
+/*
+ *  Cache prefetch control.
+ *  The parameter to xthal_set_cache_prefetch() contains both
+ *  a PREFCTL register value and a mask of which bits to actually modify.
+ *  This allows easily combining field macros (below) by ORing,
+ *  leaving unspecified fields unmodified.
+ *
+ *  For backward compatibility with the older version of this routine
+ *  (that took 15-bit value and mask in a 32-bit parameter, for pre-RF
+ *  cores with only the lower 15 bits of PREFCTL defined), the 32-bit
+ *  value and mask are staggered as follows in a 64-bit parameter:
+ *	param[63:48] are PREFCTL[31:16]		if param[31] is set
+ *	param[47:32] are mask[31:16]		if param[31] is set
+ *	param[31]    is set if mask is used, 0 if not
+ *	param[31:16] are mask[15:0]		if param[31] is set
+ *	param[31:16] are PREFCTL[31:16]		if param[31] is clear
+ *	param[15:0]  are PREFCTL[15:0]
+ *
+ *  Limitation:  PREFCTL register bit 31 cannot be set without masking,
+ *  and bit 15 must always be set when using masking, so it is hoped that
+ *  these two bits will remain reserved, read-as-zero in PREFCTL.
+ */
+#define XTHAL_PREFETCH_ENABLE		-1	/* enable inst+data prefetch */
+#define XTHAL_PREFETCH_DISABLE		0xFFFF0000 /* disab inst+data prefetch*/
+#define XTHAL_DCACHE_PREFETCH(n)	(0x800F0000+((n)&0xF))   /* data-side */
+#define XTHAL_DCACHE_PREFETCH_OFF	XTHAL_DCACHE_PREFETCH(0) /* disable */
+#define XTHAL_DCACHE_PREFETCH_LOW	XTHAL_DCACHE_PREFETCH(4) /* less aggr.*/
+#define XTHAL_DCACHE_PREFETCH_MEDIUM	XTHAL_DCACHE_PREFETCH(5) /* mid aggr. */
+#define XTHAL_DCACHE_PREFETCH_HIGH	XTHAL_DCACHE_PREFETCH(8) /* more aggr.*/
+#define XTHAL_DCACHE_PREFETCH_L1_OFF	0x90000000	/* to prefetch buffers*/
+#define XTHAL_DCACHE_PREFETCH_L1	0x90001000	/* direct to L1 dcache*/
+#define XTHAL_ICACHE_PREFETCH(n)	(0x80F00000+(((n)&0xF)<<4)) /* i-side */
+#define XTHAL_ICACHE_PREFETCH_OFF	XTHAL_ICACHE_PREFETCH(0) /* disable */
+#define XTHAL_ICACHE_PREFETCH_LOW	XTHAL_ICACHE_PREFETCH(4) /* less aggr.*/
+#define XTHAL_ICACHE_PREFETCH_MEDIUM	XTHAL_ICACHE_PREFETCH(5) /* mid aggr. */
+#define XTHAL_ICACHE_PREFETCH_HIGH	XTHAL_ICACHE_PREFETCH(8) /* more aggr.*/
+#define XTHAL_ICACHE_PREFETCH_L1_OFF	0xA0000000	/* (not implemented) */
+#define XTHAL_ICACHE_PREFETCH_L1	0xA0002000	/* (not implemented) */
+#define _XTHAL_PREFETCH_BLOCKS(n)	((n)<0?0:(n)<5?(n):(n)<15?((n)>>1)+2:9)
+#define XTHAL_PREFETCH_BLOCKS(n)	(0x0000000F80000000ULL + \
+					(((unsigned long long)_XTHAL_PREFETCH_BLOCKS(n))<<48))
+
+extern int  xthal_get_cache_prefetch( void );
+extern int  xthal_set_cache_prefetch( int );
+extern int  xthal_set_cache_prefetch_long( unsigned long long );
+/*  Only use the new extended function from now on:  */
+#define xthal_set_cache_prefetch	xthal_set_cache_prefetch_long
+#define xthal_set_cache_prefetch_nw	xthal_set_cache_prefetch_long_nw
+
+
+/*----------------------------------------------------------------------
+   				Debug
+  ----------------------------------------------------------------------*/
+
+/*  1 if debug option configured, 0 if not:  */
+extern const int Xthal_debug_configured;
+
+/*  Set (plant) and remove software breakpoint, both synchronizing cache:  */
+extern unsigned int xthal_set_soft_break(void *addr);
+extern void         xthal_remove_soft_break(void *addr, unsigned int);
+
+
+/*----------------------------------------------------------------------
+   				Disassembler
+  ----------------------------------------------------------------------*/
+
+/*  Max expected size of the return buffer for a disassembled instruction (hint only):  */
+#define XTHAL_DISASM_BUFSIZE	80
+
+/*  Disassembly option bits for selecting what to return:  */
+#define XTHAL_DISASM_OPT_ADDR	0x0001	/* display address */
+#define XTHAL_DISASM_OPT_OPHEX	0x0002	/* display opcode bytes in hex */
+#define XTHAL_DISASM_OPT_OPCODE	0x0004	/* display opcode name (mnemonic) */
+#define XTHAL_DISASM_OPT_PARMS	0x0008	/* display parameters */
+#define XTHAL_DISASM_OPT_ALL	0x0FFF	/* display everything */
+
+/* routine to get a string for the disassembled instruction */
+extern int xthal_disassemble( unsigned char *instr_buf, void *tgt_addr,
+		       char *buffer, unsigned buflen, unsigned options );
+
+/* routine to get the size of the next instruction. Returns 0 for
+   illegal instruction */
+extern int xthal_disassemble_size( unsigned char *instr_buf );
+
+
+/*----------------------------------------------------------------------
+			Instruction/Data RAM/ROM Access
+  ----------------------------------------------------------------------*/
+
+extern void* xthal_memcpy(void *dst, const void *src, unsigned len);
+extern void* xthal_bcopy(const void *src, void *dst, unsigned len);
+
+
+/*----------------------------------------------------------------------
+                           MP Synchronization
+  ----------------------------------------------------------------------*/
+
+extern int      xthal_compare_and_set( int *addr, int test_val, int compare_val );
+
+/*extern const char  Xthal_have_s32c1i;*/
+
+
+/*----------------------------------------------------------------------
+                             Miscellaneous
+  ----------------------------------------------------------------------*/
+
+extern const unsigned int  Xthal_release_major;
+extern const unsigned int  Xthal_release_minor;
+extern const char * const  Xthal_release_name;
+extern const char * const  Xthal_release_internal;
+
+extern const unsigned char Xthal_memory_order;
+extern const unsigned char Xthal_have_windowed;
+extern const unsigned char Xthal_have_density;
+extern const unsigned char Xthal_have_booleans;
+extern const unsigned char Xthal_have_loops;
+extern const unsigned char Xthal_have_nsa;
+extern const unsigned char Xthal_have_minmax;
+extern const unsigned char Xthal_have_sext;
+extern const unsigned char Xthal_have_clamps;
+extern const unsigned char Xthal_have_mac16;
+extern const unsigned char Xthal_have_mul16;
+extern const unsigned char Xthal_have_fp;
+extern const unsigned char Xthal_have_speculation;
+extern const unsigned char Xthal_have_threadptr;
+
+extern const unsigned char Xthal_have_pif;
+extern const unsigned short Xthal_num_writebuffer_entries;
+
+extern const unsigned int  Xthal_build_unique_id;
+/*  Version info for hardware targeted by software upgrades:  */
+extern const unsigned int  Xthal_hw_configid0;
+extern const unsigned int  Xthal_hw_configid1;
+extern const unsigned int  Xthal_hw_release_major;
+extern const unsigned int  Xthal_hw_release_minor;
+extern const char * const  Xthal_hw_release_name;
+extern const char * const  Xthal_hw_release_internal;
+
+/*  Clear any remnant code-dependent state (i.e. clear loop count regs).  */
+extern void	xthal_clear_regcached_code( void );
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*!_ASMLANGUAGE && !_NOCLANGUAGE && !__ASSEMBLER__ */
+
+
+
+
+
+/****************************************************************************
+    Definitions Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
+ ****************************************************************************/
+
+
+#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
+
+/*----------------------------------------------------------------------
+	   Constant Definitions  (shared with assembly)
+  ----------------------------------------------------------------------*/
+
+/*
+ *  Architectural limits, independent of configuration.
+ *  Note that these are ISA-defined limits, not micro-architecture implementation
+ *  limits enforced by the Xtensa Processor Generator (which may be stricter than
+ *  these below).
+ */
+#define XTHAL_MAX_INTERRUPTS	32	/* max number of interrupts (0..31) */
+#define XTHAL_MAX_INTLEVELS	16	/* max number of interrupt levels (0..15) */
+					/* (as of T1040, implementation limit is 7: 0..6) */
+#define XTHAL_MAX_TIMERS	4	/* max number of timers (CCOMPARE0..CCOMPARE3) */
+					/* (as of T1040, implementation limit is 3: 0..2) */
+
+/*  Interrupt types:  */
+#define XTHAL_INTTYPE_UNCONFIGURED	0
+#define XTHAL_INTTYPE_SOFTWARE		1
+#define XTHAL_INTTYPE_EXTERN_EDGE	2
+#define XTHAL_INTTYPE_EXTERN_LEVEL	3
+#define XTHAL_INTTYPE_TIMER		4
+#define XTHAL_INTTYPE_NMI		5
+#define XTHAL_INTTYPE_WRITE_ERROR	6
+#define XTHAL_INTTYPE_PROFILING		7
+#define XTHAL_INTTYPE_IDMA_DONE		8
+#define XTHAL_INTTYPE_IDMA_ERR		9
+#define XTHAL_INTTYPE_GS_ERR		10
+#define XTHAL_INTTYPE_SG_ERR		10	/* backward compatibility name - deprecated */
+#define XTHAL_MAX_INTTYPES		11	/* number of interrupt types */
+
+/*  Timer related:  */
+#define XTHAL_TIMER_UNCONFIGURED	-1	/* Xthal_timer_interrupt[] value for non-existent timers */
+#define XTHAL_TIMER_UNASSIGNED	XTHAL_TIMER_UNCONFIGURED	/* (for backwards compatibility only) */
+
+/*  Local Memory ECC/Parity:  */
+#define XTHAL_MEMEP_PARITY	1
+#define XTHAL_MEMEP_ECC		2
+/*  Flags parameter to xthal_memep_inject_error():  */
+#define XTHAL_MEMEP_F_LOCAL		0	/* local memory (default) */
+#define XTHAL_MEMEP_F_DCACHE_DATA	4	/* data cache data */
+#define XTHAL_MEMEP_F_DCACHE_TAG	5	/* data cache tag */
+#define XTHAL_MEMEP_F_ICACHE_DATA	6	/* instruction cache data */
+#define XTHAL_MEMEP_F_ICACHE_TAG	7	/* instruction cache tag */
+#define XTHAL_MEMEP_F_CORRECTABLE	16	/* inject correctable error
+						   (default is non-corr.) */
+
+
+/*  Access Mode bits (tentative):  */	/* bit abbr unit short_name       PPC equ - Description */
+#define XTHAL_AMB_EXCEPTION	0	/* 001 E EX fls: EXception        none
+					   exception on any access (aka "illegal") */
+#define XTHAL_AMB_HITCACHE	1	/* 002 C CH fls: use Cache on Hit ~(I CI)
+					   [or H HC]  way from tag match;
+					   [or U UC] (ISA: same except Isolate case) */
+#define XTHAL_AMB_ALLOCATE	2	/* 004 A AL fl?: ALlocate         none
+					   [or F FI fill] refill cache on miss, way from LRU
+					   (ISA: Read/Write Miss Refill) */
+#define XTHAL_AMB_WRITETHRU	3	/* 008 W WT --s: WriteThrough     W WT
+					   store immediately to memory (ISA: same) */
+#define XTHAL_AMB_ISOLATE	4	/* 010 I IS fls: ISolate          none
+					   use cache regardless of hit-vs-miss,
+					   way from vaddr (ISA: use-cache-on-miss+hit) */
+#define XTHAL_AMB_GUARD		5	/* 020 G GU ?l?: GUard            G *
+					   non-speculative; spec/replay refs not permitted */
+#define XTHAL_AMB_COHERENT	6	/* 040 M MC ?ls: Mem/MP Coherent  M
+					   on read, other CPU/bus-master may need to supply data;
+					   on write, maybe redirect to or flush other CPU dirty line; etc */
+#if 0
+#define XTHAL_AMB_BUFFERABLE	x	/* 000 B BU --s: BUfferable       ?
+					   write response may return earlier than from final destination */
+#define XTHAL_AMB_ORDERED	x	/* 000 O OR fls: ORdered          G *
+					   mem accesses cannot be out of order */
+#define XTHAL_AMB_FUSEWRITES	x	/* 000 F FW --s: FuseWrites       none
+					   allow combining/merging/coalescing multiple writes
+					   (to same datapath data unit) into one
+					   (implied by writeback) */
+#define XTHAL_AMB_TRUSTED	x	/* 000 T TR ?l?: TRusted          none
+					   memory will not bus error (if it does,
+					   handle as fatal imprecise interrupt) */
+#define XTHAL_AMB_PREFETCH	x	/* 000 P PR fl?: PRefetch         none
+					   on refill, read line+1 into prefetch buffers */
+#define XTHAL_AMB_STREAM	x	/* 000 S ST ???: STreaming        none
+					   access one of N stream buffers */
+#endif /*0*/
+
+#define XTHAL_AM_EXCEPTION	(1<<XTHAL_AMB_EXCEPTION)
+#define XTHAL_AM_HITCACHE	(1<<XTHAL_AMB_HITCACHE)
+#define XTHAL_AM_ALLOCATE	(1<<XTHAL_AMB_ALLOCATE)
+#define XTHAL_AM_WRITETHRU	(1<<XTHAL_AMB_WRITETHRU)
+#define XTHAL_AM_ISOLATE	(1<<XTHAL_AMB_ISOLATE)
+#define XTHAL_AM_GUARD		(1<<XTHAL_AMB_GUARD)
+#define XTHAL_AM_COHERENT	(1<<XTHAL_AMB_COHERENT)
+#if 0
+#define XTHAL_AM_BUFFERABLE	(1<<XTHAL_AMB_BUFFERABLE)
+#define XTHAL_AM_ORDERED	(1<<XTHAL_AMB_ORDERED)
+#define XTHAL_AM_FUSEWRITES	(1<<XTHAL_AMB_FUSEWRITES)
+#define XTHAL_AM_TRUSTED	(1<<XTHAL_AMB_TRUSTED)
+#define XTHAL_AM_PREFETCH	(1<<XTHAL_AMB_PREFETCH)
+#define XTHAL_AM_STREAM		(1<<XTHAL_AMB_STREAM)
+#endif /*0*/
+
+/*
+ *  Allowed Access Modes (bit combinations).
+ *
+ *  Columns are:
+ *  "FOGIWACE"
+ *	Access mode bits (see XTHAL_AMB_xxx above).
+ *	<letter> = bit is set
+ *	'-'      = bit is clear
+ *	'.'      = bit is irrelevant / don't care, as follows:
+ *			E=1 makes all others irrelevant
+ *			W,F relevant only for stores
+ *  "2345"
+ *	Indicates which Xtensa releases support the corresponding
+ *	access mode.  Releases for each character column are:
+ *		2 = prior to T1020.2:   T1015 (V1.5), T1020.0, T1020.1
+ *		3 = T1020.2 and later:  T1020.2+, T1030
+ *		4 = T1040
+ *		5 = T1050 (maybe), LX1, LX2, LX2.1
+ *		7 = LX2.2
+ *		8 = LX3, LX4
+ *		9 = LX5
+ *	And the character column contents are:
+ *		<number> = supported by release(s)
+ *		"." = unsupported by release(s)
+ *		"?" = support unknown
+ */
+						/* foMGIWACE 2345789 */
+/*  For instruction fetch:  */
+#define XTHAL_FAM_EXCEPTION		0x001	/* ........E 2345789 exception */
+/*efine XTHAL_FAM_ISOLATE*/	      /*0x012*/	/* .---I.-C- ....... isolate */
+#define XTHAL_FAM_BYPASS		0x000	/* .----.--- 2345789 bypass */
+/*efine XTHAL_FAM_NACACHED*/	      /*0x002*/	/* .----.-C- ....... cached no-allocate (frozen) */
+#define XTHAL_FAM_CACHED		0x006	/* .----.AC- 2345789 cached */
+/*  For data load:  */
+#define XTHAL_LAM_EXCEPTION		0x001	/* ........E 2345789 exception */
+#define XTHAL_LAM_ISOLATE		0x012	/* .---I.-C- 2345789 isolate */
+#define XTHAL_LAM_BYPASS		0x000	/* .O---.--- 2...... bypass speculative */
+#define XTHAL_LAM_BYPASSG		0x020	/* .O-G-.--- .345789 bypass guarded */
+#define XTHAL_LAM_CACHED_NOALLOC	0x002	/* .O---.-C- 2345789 cached no-allocate speculative */
+#define XTHAL_LAM_NACACHED		XTHAL_LAM_CACHED_NOALLOC
+#define XTHAL_LAM_NACACHEDG		0x022	/* .O-G-.-C- .?..... cached no-allocate guarded */
+#define XTHAL_LAM_CACHED		0x006	/* .----.AC- 2345789 cached speculative */
+#define XTHAL_LAM_COHCACHED		0x046	/* .-M--.AC- ....*89 cached speculative MP-coherent */
+/*  For data store:  */
+#define XTHAL_SAM_EXCEPTION		0x001	/* ........E 2345789 exception */
+#define XTHAL_SAM_ISOLATE		0x032	/* .--GI--C- 2345789 isolate */
+#define XTHAL_SAM_BYPASS		0x028	/* -O-G-W--- 2345789 bypass */
+#define XTHAL_SAM_WRITETHRU		0x02A	/* -O-G-W-C- 2345789 writethrough */
+/*efine XTHAL_SAM_WRITETHRU_ALLOC*/   /*0x02E*/	/* -O-G-WAC- ....... writethrough allocate */
+#define XTHAL_SAM_WRITEBACK		0x026	/* F--G--AC- ...5789 writeback */
+#define XTHAL_SAM_WRITEBACK_NOALLOC	0x022	/* ?--G---C- .....89 writeback no-allocate */
+#define XTHAL_SAM_COHWRITEBACK		0x066	/* F-MG--AC- ....*89 writeback MP-coherent */
+/*  For PIF attributes:  */			/* -PIwrWCBUUUU ...9 */
+#define XTHAL_PAM_BYPASS		0x000	/* xxx00000xxxx ...9 bypass non-bufferable */
+#define XTHAL_PAM_BYPASS_BUF		0x010	/* xxx0000bxxxx ...9 bypass */
+#define XTHAL_PAM_CACHED_NOALLOC	0x030	/* xxx0001bxxxx ...9 cached no-allocate */
+#define XTHAL_PAM_WRITETHRU		0x0B0	/* xxx0101bxxxx ...9 writethrough (WT) */
+#define XTHAL_PAM_WRITEBACK_NOALLOC	0x0F0	/* xxx0111bxxxx ...9 writeback no-alloc (WBNA) */
+#define XTHAL_PAM_WRITEBACK		0x1F0	/* xxx1111bxxxx ...9 writeback (WB) */
+/*efine XTHAL_PAM_NORMAL*/	      /*0x050*/	/* xxx0010bxxxx .... (unimplemented) */
+/*efine XTHAL_PAM_WRITETHRU_WA*/      /*0x130*/	/* xxx1001bxxxx .... (unimplemented, less likely) */
+/*efine XTHAL_PAM_WRITETHRU_RWA*/     /*0x1B0*/	/* xxx1101bxxxx .... (unimplemented, less likely) */
+/*efine XTHAL_PAM_WRITEBACK_WA*/      /*0x170*/	/* xxx1011bxxxx .... (unimplemented, less likely) */
+
+
+#if 0
+/*
+    Cache attribute encoding for CACHEATTR (per ISA):
+    (Note:  if this differs from ISA Ref Manual, ISA has precedence)
+
+	Inst-fetches	Loads		Stores
+	-------------	------------	-------------
+0x0	FCA_EXCEPTION	LCA_NACACHED	SCA_WRITETHRU	cached no-allocate (previously misnamed "uncached")
+0x1	FCA_CACHED	LCA_CACHED	SCA_WRITETHRU	cached
+0x2	FCA_BYPASS	LCA_BYPASS_G*	SCA_BYPASS	bypass cache (what most people call uncached)
+0x3	FCA_CACHED	LCA_CACHED	SCA_WRITEALLOCF	write-allocate
+		     or LCA_EXCEPTION	SCA_EXCEPTION	(if unimplemented)
+0x4	FCA_CACHED	LCA_CACHED	SCA_WRITEBACK[M] write-back [MP-coherent]
+		     or LCA_EXCEPTION	SCA_EXCEPTION	(if unimplemented)
+0x5	FCA_CACHED	LCA_CACHED	SCA_WRITEBACK_NOALLOC	write-back no-allocate
+     or	FCA_EXCEPTION	LCA_EXCEPTION	SCA_EXCEPTION	(if unimplemented)
+0x6..D	FCA_EXCEPTION	LCA_EXCEPTION	SCA_EXCEPTION	(reserved)
+0xE	FCA_EXCEPTION	LCA_ISOLATE	SCA_ISOLATE	isolate
+0xF	FCA_EXCEPTION	LCA_EXCEPTION	SCA_EXCEPTION	illegal
+     *  Prior to T1020.2?, guard feature not supported, this defaulted to speculative (no _G)
+*/
+#endif /*0*/
+
+
+#if !defined(_ASMLANGUAGE) && !defined(_NOCLANGUAGE) && !defined(__ASSEMBLER__)
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/*----------------------------------------------------------------------
+   				Register Windows
+  ----------------------------------------------------------------------*/
+
+/*  This spill any live register windows (other than the caller's):
+ *  (NOTE:  current implementation require privileged code, but
+ *   a user-callable implementation is possible.)  */
+extern void      xthal_window_spill( void );
+
+
+/*----------------------------------------------------------------------
+			Optional/Custom Processor State
+  ----------------------------------------------------------------------*/
+
+/* validate & invalidate the TIE register file */
+extern void xthal_validate_cp(int);
+extern void xthal_invalidate_cp(int);
+
+/* read and write cpenable register */
+extern void xthal_set_cpenable(unsigned);
+extern unsigned xthal_get_cpenable(void);
+
+
+/*----------------------------------------------------------------------
+   				Interrupts
+  ----------------------------------------------------------------------*/
+
+/* the number of interrupt levels */
+extern const unsigned char Xthal_num_intlevels;
+/* the number of interrupts */
+extern const unsigned char Xthal_num_interrupts;
+/* the highest level of interrupts masked by PS.EXCM */
+extern const unsigned char Xthal_excm_level;
+
+/* mask for level of interrupts */
+extern const unsigned int Xthal_intlevel_mask[XTHAL_MAX_INTLEVELS];
+/* mask for level 0 to N interrupts */
+extern const unsigned int Xthal_intlevel_andbelow_mask[XTHAL_MAX_INTLEVELS];
+
+/* level of each interrupt */
+extern const unsigned char Xthal_intlevel[XTHAL_MAX_INTERRUPTS];
+
+/* type per interrupt */
+extern const unsigned char Xthal_inttype[XTHAL_MAX_INTERRUPTS];
+
+/* masks of each type of interrupt */
+extern const unsigned int Xthal_inttype_mask[XTHAL_MAX_INTTYPES];
+
+/* interrupt numbers assigned to each timer interrupt */
+extern const int Xthal_timer_interrupt[XTHAL_MAX_TIMERS];
+
+/*  INTENABLE,INTERRUPT,INTSET,INTCLEAR register access functions:  */
+extern unsigned  xthal_get_intenable( void );
+extern void      xthal_set_intenable( unsigned );
+extern unsigned  xthal_get_interrupt( void );
+#define xthal_get_intread	xthal_get_interrupt	/* backward compatibility */
+
+/*  These two functions are deprecated. Use the newer functions
+    xthal_interrupt_trigger and xthal_interrupt_clear instead.  */
+extern void      xthal_set_intset( unsigned );
+extern void      xthal_set_intclear( unsigned );
+
+
+/*----------------------------------------------------------------------
+   				Debug
+  ----------------------------------------------------------------------*/
+
+/*  Number of instruction and data break registers:  */
+extern const int Xthal_num_ibreak;
+extern const int Xthal_num_dbreak;
+
+
+/*----------------------------------------------------------------------
+   				Core Counter
+  ----------------------------------------------------------------------*/
+
+/* counter info */
+extern const unsigned char Xthal_have_ccount;	/* set if CCOUNT register present */
+extern const unsigned char Xthal_num_ccompare;	/* number of CCOMPAREn registers */
+
+/* get CCOUNT register (if not present return 0) */
+extern unsigned xthal_get_ccount(void);
+
+/* set and get CCOMPAREn registers (if not present, get returns 0) */
+extern void     xthal_set_ccompare(int, unsigned);
+extern unsigned xthal_get_ccompare(int);
+
+
+/*----------------------------------------------------------------------
+                             Miscellaneous
+  ----------------------------------------------------------------------*/
+
+extern const unsigned char Xthal_have_prid;
+extern const unsigned char Xthal_have_exceptions;
+extern const unsigned char Xthal_xea_version;
+extern const unsigned char Xthal_have_interrupts;
+extern const unsigned char Xthal_have_highlevel_interrupts;
+extern const unsigned char Xthal_have_nmi;
+
+extern unsigned xthal_get_prid( void );
+
+
+/*----------------------------------------------------------------------
+		Virtual interrupt prioritization (DEPRECATED)
+  ----------------------------------------------------------------------*/
+
+/*  Convert between interrupt levels (as per PS.INTLEVEL) and virtual interrupt priorities:  */
+extern unsigned	xthal_vpri_to_intlevel(unsigned vpri);
+extern unsigned	xthal_intlevel_to_vpri(unsigned intlevel);
+
+/*  Enables/disables given set (mask) of interrupts; returns previous enabled-mask of all ints:  */
+/*  These functions are deprecated. Use xthal_interrupt_enable and xthal_interrupt_disable instead.  */
+extern unsigned	xthal_int_enable(unsigned);
+extern unsigned	xthal_int_disable(unsigned);
+
+/*  Set/get virtual priority of an interrupt:  */
+extern int	xthal_set_int_vpri(int intnum, int vpri);
+extern int	xthal_get_int_vpri(int intnum);
+
+/*  Set/get interrupt lockout level for exclusive access to virtual priority data structures:  */
+extern void	xthal_set_vpri_locklevel(unsigned intlevel);
+extern unsigned	xthal_get_vpri_locklevel(void);
+
+/*  Set/get current virtual interrupt priority:  */
+extern unsigned	xthal_set_vpri(unsigned vpri);
+extern unsigned	xthal_get_vpri(void);
+extern unsigned	xthal_set_vpri_intlevel(unsigned intlevel);
+extern unsigned	xthal_set_vpri_lock(void);
+
+
+/*----------------------------------------------------------------------
+	Generic Interrupt Trampolining Support (DEPRECATED)
+  ----------------------------------------------------------------------*/
+
+typedef void (XtHalVoidFunc)(void);
+
+/*  Bitmask of interrupts currently trampolining down:  */
+extern unsigned Xthal_tram_pending;
+
+/*
+ *  Bitmask of which interrupts currently trampolining down synchronously are
+ *  actually enabled; this bitmask is necessary because INTENABLE cannot hold
+ *  that state (sync-trampolining interrupts must be kept disabled while
+ *  trampolining);  in the current implementation, any bit set here is not set
+ *  in INTENABLE, and vice-versa; once a sync-trampoline is handled (at level
+ *  one), its enable bit must be moved from here to INTENABLE:
+ */
+extern unsigned Xthal_tram_enabled;
+
+/*  Bitmask of interrupts configured for sync trampolining:  */
+extern unsigned Xthal_tram_sync;
+
+/*  Trampoline support functions:  */
+extern unsigned  xthal_tram_pending_to_service( void );
+extern void      xthal_tram_done( unsigned serviced_mask );
+extern int       xthal_tram_set_sync( int intnum, int sync );
+extern XtHalVoidFunc* xthal_set_tram_trigger_func( XtHalVoidFunc *trigger_fn );
+
+
+/*----------------------------------------------------------------------
+			Internal Memories
+  ----------------------------------------------------------------------*/
+
+extern const unsigned char Xthal_num_instrom;
+extern const unsigned char Xthal_num_instram;
+extern const unsigned char Xthal_num_datarom;
+extern const unsigned char Xthal_num_dataram;
+extern const unsigned char Xthal_num_xlmi;
+
+/*  Each of the following arrays contains at least one entry,
+ *  or as many entries as needed if more than one:  */
+extern const unsigned int  Xthal_instrom_vaddr[];
+extern const unsigned int  Xthal_instrom_paddr[];
+extern const unsigned int  Xthal_instrom_size [];
+extern const unsigned int  Xthal_instram_vaddr[];
+extern const unsigned int  Xthal_instram_paddr[];
+extern const unsigned int  Xthal_instram_size [];
+extern const unsigned int  Xthal_datarom_vaddr[];
+extern const unsigned int  Xthal_datarom_paddr[];
+extern const unsigned int  Xthal_datarom_size [];
+extern const unsigned int  Xthal_dataram_vaddr[];
+extern const unsigned int  Xthal_dataram_paddr[];
+extern const unsigned int  Xthal_dataram_size [];
+extern const unsigned int  Xthal_xlmi_vaddr[];
+extern const unsigned int  Xthal_xlmi_paddr[];
+extern const unsigned int  Xthal_xlmi_size [];
+
+
+/*----------------------------------------------------------------------
+   				Cache
+  ----------------------------------------------------------------------*/
+
+/* number of cache sets in log2(lines per way) */
+extern const unsigned char Xthal_icache_setwidth;
+extern const unsigned char Xthal_dcache_setwidth;
+/* cache set associativity (number of ways) */
+extern const unsigned int  Xthal_icache_ways;
+extern const unsigned int  Xthal_dcache_ways;
+/* cache features */
+extern const unsigned char Xthal_icache_line_lockable;
+extern const unsigned char Xthal_dcache_line_lockable;
+
+/* cache attribute register control (used by other HAL routines) */
+extern unsigned xthal_get_cacheattr( void );
+extern unsigned xthal_get_icacheattr( void );
+extern unsigned xthal_get_dcacheattr( void );
+extern void     xthal_set_cacheattr( unsigned );
+extern void     xthal_set_icacheattr( unsigned );
+extern void     xthal_set_dcacheattr( unsigned );
+/* set cache attribute (access modes) for a range of memory */
+extern int      xthal_set_region_attribute( void *addr, unsigned size,
+					    unsigned cattr, unsigned flags );
+/*  Bits of flags parameter to xthal_set_region_attribute():  */
+#define XTHAL_CAFLAG_EXPAND		0x000100	/* only expand allowed access to range, don't reduce it */
+#define XTHAL_CAFLAG_EXACT		0x000200	/* return error if can't apply change to exact range specified */
+#define XTHAL_CAFLAG_NO_PARTIAL		0x000400	/* don't apply change to regions partially covered by range */
+#define XTHAL_CAFLAG_NO_AUTO_WB		0x000800	/* don't writeback data after leaving writeback attribute */
+#define XTHAL_CAFLAG_NO_AUTO_INV	0x001000	/* don't invalidate after disabling cache (entering bypass) */
+
+/* enable caches */
+extern void xthal_icache_enable( void );	/* DEPRECATED */
+extern void xthal_dcache_enable( void );	/* DEPRECATED */
+/* disable caches */
+extern void xthal_icache_disable( void );	/* DEPRECATED */
+extern void xthal_dcache_disable( void );	/* DEPRECATED */
+
+/* whole cache operations (privileged) */
+extern void xthal_icache_all_invalidate( void );
+extern void xthal_dcache_all_invalidate( void );
+extern void xthal_dcache_all_writeback( void );
+extern void xthal_dcache_all_writeback_inv( void );
+extern void xthal_icache_all_unlock( void );
+extern void xthal_dcache_all_unlock( void );
+
+/* address-range cache operations (privileged) */
+/* prefetch and lock specified memory range into cache */
+extern void xthal_icache_region_lock( void *addr, unsigned size );
+extern void xthal_dcache_region_lock( void *addr, unsigned size );
+/* unlock from cache */
+extern void xthal_icache_region_unlock( void *addr, unsigned size );
+extern void xthal_dcache_region_unlock( void *addr, unsigned size );
+
+/* huge-range cache operations (privileged) (EXPERIMENTAL) */
+extern void xthal_icache_hugerange_invalidate( void *addr, unsigned size );
+extern void xthal_icache_hugerange_unlock( void *addr, unsigned size );
+extern void xthal_dcache_hugerange_invalidate( void *addr, unsigned size );
+extern void xthal_dcache_hugerange_unlock( void *addr, unsigned size );
+extern void xthal_dcache_hugerange_writeback( void *addr, unsigned size );
+extern void xthal_dcache_hugerange_writeback_inv( void *addr, unsigned size );
+
+# ifndef XTHAL_USE_CACHE_MACROS
+/* cache line operations (privileged) */
+extern void xthal_icache_line_lock(void *addr);
+extern void xthal_dcache_line_lock(void *addr);
+extern void xthal_icache_line_unlock(void *addr);
+extern void xthal_dcache_line_unlock(void *addr);
+# endif
+
+
+
+/*----------------------------------------------------------------------
+                         Local Memory ECC/Parity
+  ----------------------------------------------------------------------*/
+
+/*  Inject memory errors; flags is bit combination of XTHAL_MEMEP_F_xxx:  */
+extern void xthal_memep_inject_error(void *addr, int size, int flags);
+
+
+
+/*----------------------------------------------------------------------
+                         Memory Management Unit
+  ----------------------------------------------------------------------*/
+
+extern const unsigned char Xthal_have_spanning_way;
+extern const unsigned char Xthal_have_identity_map;
+extern const unsigned char Xthal_have_mimic_cacheattr;
+extern const unsigned char Xthal_have_xlt_cacheattr;
+extern const unsigned char Xthal_have_cacheattr;
+extern const unsigned char Xthal_have_tlbs;
+
+extern const unsigned char Xthal_mmu_asid_bits;		/* 0 .. 8 */
+extern const unsigned char Xthal_mmu_asid_kernel;
+extern const unsigned char Xthal_mmu_rings;		/* 1 .. 4 (perhaps 0 if no MMU and/or no protection?) */
+extern const unsigned char Xthal_mmu_ring_bits;
+extern const unsigned char Xthal_mmu_sr_bits;
+extern const unsigned char Xthal_mmu_ca_bits;
+extern const unsigned int  Xthal_mmu_max_pte_page_size;
+extern const unsigned int  Xthal_mmu_min_pte_page_size;
+
+extern const unsigned char Xthal_itlb_way_bits;
+extern const unsigned char Xthal_itlb_ways;
+extern const unsigned char Xthal_itlb_arf_ways;
+extern const unsigned char Xthal_dtlb_way_bits;
+extern const unsigned char Xthal_dtlb_ways;
+extern const unsigned char Xthal_dtlb_arf_ways;
+
+/* Return error codes for hal functions */
+
+/* function sucessful, operation completed as expected */
+#define XTHAL_SUCCESS                                    0
+/* XTHAL_CAFLAGS_NO_PARTIAL was specified, and no full region is
+ * covered by the address range. */
+#define XTHAL_NO_REGIONS_COVERED                        -1
+/* The XTHAL_CAFLAGS_EXACT flag was given, but no exact mapping is possible. */
+#define XTHAL_INEXACT                                   -2
+/* The supplied address doesn't correspond to the start of a region. */
+#define XTHAL_INVALID_ADDRESS                           -3
+/* This functionality is not available on this architecture. */
+#define XTHAL_UNSUPPORTED                               -4
+/* Translation failed because vaddr and paddr were not aligned. */
+#define XTHAL_ADDRESS_MISALIGNED                        -5
+/* There is mapping for the supplied address. */
+#define XTHAL_NO_MAPPING                                -6
+/* The requested access rights are not supported */
+#define XTHAL_BAD_ACCESS_RIGHTS                         -7
+/* The requested memory type is not supported */
+#define XTHAL_BAD_MEMORY_TYPE                           -8
+/* The entries supplied are not properly aligned to the MPU's background map. */
+#define XTHAL_MAP_NOT_ALIGNED                           -9
+/* There are not enough MPU entries available to do the requeste mapping. */
+#define XTHAL_OUT_OF_ENTRIES                           -10
+/* The entries supplied are not properly ordered for the MPU. */
+#define XTHAL_OUT_OF_ORDER_MAP                         -11
+/* an invalid argument such as a null pointer was supplied to the function */
+#define XTHAL_INVALID                                  -12
+/* specified region is of zero size, therefore no mapping is done. */
+#define XTHAL_ZERO_SIZED_REGION                        -13
+/* specified range wraps around '0' */
+#define XTHAL_INVALID_ADDRESS_RANGE                    -14
+
+/*
+   For backward compatibility we retain the following inconsistenly named
+   constants. Do not use them as they may be removed in a future release.
+ */
+#define XCHAL_SUCCESS XTHAL_SUCCESS
+#define XCHAL_ADDRESS_MISALIGNED XTHAL_ADDRESS_MISALIGNED
+#define XCHAL_INEXACT XTHAL_INEXACT
+#define XCHAL_INVALID_ADDRESS XTHAL_INVALID_ADDRESS
+#define XCHAL_UNSUPPORTED_ON_THIS_ARCH XTHAL_UNSUPPORTED
+#define XCHAL_NO_PAGES_MAPPED XTHAL_NO_REGIONS_COVERED
+
+
+/*  Convert between virtual and physical addresses (through static maps only)
+ *  WARNING: these two functions may go away in a future release;
+ *  don't depend on them!
+*/
+extern int  xthal_static_v2p( unsigned vaddr, unsigned *paddrp );
+extern int  xthal_static_p2v( unsigned paddr, unsigned *vaddrp, unsigned cached );
+
+extern int xthal_set_region_translation(void* vaddr, void* paddr,
+                  unsigned size, unsigned cache_atr, unsigned flags);
+extern int xthal_v2p(void*, void**, unsigned*, unsigned*);
+extern int xthal_invalidate_region(void* addr);
+extern int xthal_set_region_translation_raw(void *vaddr, void *paddr, unsigned cattr);
+
+/*------------------------------------------------------------------------
+	MPU (Memory Protection Unit)
+-------------------------------------------------------------------------*/
+
+/*
+ *  General notes on MPU (Memory Protection Unit):
+ *
+ *  The MPU supports setting the access rights (read, write, execute) as
+ *  well as the memory type (cacheablity, ...)
+ *  for regions of memory. The granularity can be as small as 32 bytes.
+ *  (XCHAL_MPU_ALIGN specifies the granularity for any specific MPU config)
+ *
+ *  The MPU doesn't support mapping between virtual and physical addresses.
+ *
+ *  The MPU contains a fixed number of map changeable forground map entries,
+ *  and a background map which is fixed at configuration time.
+ *
+ *  Each entry has a start address (up to 27 bits), valid flag,
+ *  access rights (4 bits), and memory type (9 bits);
+ *
+ */
+
+
+/*
+    MPU access rights constants:
+    Only the combinations listed below are supported by the MPU.
+*/
+
+#define XTHAL_AR_NONE    0 /* no access */
+#define XTHAL_AR_R       4 /* Kernel read, User no access*/
+#define XTHAL_AR_RX      5 /* Kernel read/execute, User no access */
+#define XTHAL_AR_RW      6 /* Kernel read/write, User no access */
+#define XTHAL_AR_RWX     7 /* Kernel read/write/execute, User no access */
+#define XTHAL_AR_Ww      8 /* Kernel write, User write */
+#define XTHAL_AR_RWrwx   9 /* Kernel read/write , User read/write/execute */
+#define XTHAL_AR_RWr    10 /* Kernel read/write, User read */
+#define XTHAL_AR_RWXrx  11 /* Kernel read/write/execute, User read/execute */
+#define XTHAL_AR_Rr     12 /* Kernel read, User read */
+#define XTHAL_AR_RXrx   13 /* Kernel read/execute, User read/execute */
+#define XTHAL_AR_RWrw   14 /* Kernel read/write, User read/write */
+#define XTHAL_AR_RWXrwx 15 /* Kernel read/write/execute,
+                                    User read/write/execute */
+
+#define XTHAL_AR_WIDTH  4  /* # bits used to encode access rights */
+
+/* If the bit XTHAL_MPU_USE_EXISTING_ACCESS_RIGHTS is set in the accessRights
+ * argument to xthal_mpu_set_region_attribute(), or to the cattr argument of
+ * xthal_set_region_attribute() then the existing access rights for the first
+ * byte of the region will be used as the access rights of the new region.
+ */
+#define XTHAL_MPU_USE_EXISTING_ACCESS_RIGHTS     0x00002000
+
+/* If the bit XTHAL_MPU_USE_EXISTING_MEMORY_TYPE is set in the memoryType
+ * argument to xthal_mpu_set_region_attribute(), or to the cattr argument of
+ * xthal_set_region_attribute() then the existing memory type for the first
+ * byte of the region will be used as the memory type of the new region.
+ */
+#define XTHAL_MPU_USE_EXISTING_MEMORY_TYPE       0x00004000
+
+/* The following groups of constants are bit-wise or'd together to specify
+ * the memory type as input to the macros and functions that accept an
+ * unencoded memory type specifier:
+ * XTHAL_ENCODE_MEMORY_TYPE, xthal_encode_memory_type,
+ * xthal_mpu_set_region_attribute(), and xthal_set_region_attribute().
+ *
+ * example:
+ * XTHAL_MEM_DEVICE | XTHAL_MEM_INTERRUPTIBLE | XTHAL_MEM_SYSTEM_SHARABLE
+ *
+ * or
+ * XTHAL_MEM_WRITEBACK |  XTHAL_MEM_INNER_SHAREABLE
+ *
+ * If it is desired to specify different attributes for the system and
+ * local cache, then macro XTHAL_MEM_PROC_CACHE is used:
+ *
+ * XTHAL_MEM_PROC_CACHE(XTHAL_MEM_WRITEBACK, XTHAL_MEM_WRITETHRU)
+ *
+ * indicates the shared cache is writeback, but the processor's local cache
+ * is writethrough.
+ *
+ */
+
+/* The following group of constants are used to specify cache attributes of
+ * an MPU entry.  If the processors local cache and the system's shared cache
+ * have the same attributes (or if there aren't distinct local and shared
+ * caches) then the constant can be used directly.  If different attributes
+ * for the shared and local caches, then use these constants as the parameters
+ * to the XTHAL_MEM_PROC_CACHE() macro.
+ */
+#define XTHAL_MEM_DEVICE                         0x00008000
+#define XTHAL_MEM_NON_CACHEABLE                  0x00090000
+#define XTHAL_MEM_WRITETHRU_NOALLOC              0x00080000
+#define XTHAL_MEM_WRITETHRU                      0x00040000
+#define XTHAL_MEM_WRITETHRU_WRITEALLOC           0x00060000
+#define XTHAL_MEM_WRITEBACK_NOALLOC              0x00050000
+#define XTHAL_MEM_WRITEBACK                      0x00070000
+
+/* Indicates a read is interruptible. Only applicable to devices */
+#define XTHAL_MEM_INTERRUPTIBLE                  0x08000000
+
+/* Indicates if writes to this memory are bufferable ... only applicable
+ * to devices, and non-cacheable memory.
+ */
+#define XTHAL_MEM_BUFFERABLE                     0x01000000
+
+/* The following group of constants indicates the scope of the sharing of
+ * the memory region. XTHAL_MEM_INNER_SHAREABLE and XTHAL_MEM_OUTER_SHARABLE are
+ * only applicable to cacheable regions. XTHAL_MEM_SYSTEM_SHAREABLE is only
+ * applicable to devices and non-cacheable regions.
+ */
+#define XTHAL_MEM_NON_SHAREABLE                  0x00000000
+#define XTHAL_MEM_INNER_SHAREABLE                0x02000000
+#define XTHAL_MEM_OUTER_SHAREABLE                0x04000000
+#define XTHAL_MEM_SYSTEM_SHAREABLE               0x06000000
+
+
+/*
+ * This macro is needed when the cache attributes are different for the shared
+ * and processor's local caches. For example:
+ *
+ * XTHAL_MEM_PROC_CACHE(XTHAL_MEM_WRITEBACK, XTHAL_MEM_NON_CACHEABLE)
+ * creates a memory type that is writeback cacheable in the system cache, and not
+ * cacheable in the processor's local cache.
+ */
+#define XTHAL_MEM_PROC_CACHE(system, processor) \
+    (((system) & 0x000f0000) | (((processor) & 0x000f0000 ) << 4) | \
+    (((system) & XTHAL_MEM_DEVICE) | ((processor) & XTHAL_MEM_DEVICE)))
+
+/*
+ * This macro converts a bit-wise combination of the XTHAL_MEM_... constants
+ * to the corresponding MPU memory type (9-bits).
+ *
+ * Unsupported combinations are mapped to the best available substitute.
+ *
+ * The same functionality plus error checking is available from
+ * xthal_encode_memory_type().
+ */
+#define XTHAL_ENCODE_MEMORY_TYPE(x) \
+    (((x) & 0xffffe000) ? \
+    (_XTHAL_MEM_IS_DEVICE((x)) ?  _XTHAL_ENCODE_DEVICE((x)) : \
+      (_XTHAL_IS_SYSTEM_NONCACHEABLE((x)) ? \
+        _XTHAL_ENCODE_SYSTEM_NONCACHEABLE((x)) : \
+        _XTHAL_ENCODE_SYSTEM_CACHEABLE((x)))) : (x))
+
+/*
+ * This structure is used to represent each MPU entry (both foreground and
+ * background). The internal representation of the structure is subject to
+ * change, so it should only be accessed by the XTHAL_MPU_ENTRY_... macros
+ * below.
+ */
+typedef struct xthal_MPU_entry
+{
+	uint32_t as;	/* virtual start address, and valid bit */
+	uint32_t at;	/* access rights, and memory type (and space for entry index) */
+} xthal_MPU_entry;
+
+extern const xthal_MPU_entry Xthal_mpu_bgmap[];
+
+
+
+
+/*
+ * XTHAL_MPU_ENTRY creates an MPU entry from its component values.  It is
+ * intended for initializing an MPU map.  Example:
+ *     const struct xthal_MPU_entry mpumap[] =
+            { XTHAL_MPU_ENTRY( 0x00000000, 1, XTHAL_AR_RWXrwx, XTHAL_MEM_WRITEBACK),
+              XTHAL_MPU_ENTRY( 0xE0000000, 1, XTHAL_AR_RWXrwx,
+              XTHAL_MEM_NON_CACHEABLE | XTHAL_MEM_BUFFERABLE),
+              XTHAL_MPU_ENTRY( 0xF0000000, 1, XTHAL_AR_RWX,
+              XTHAL_MEM_NON_CACHEABLE | XTHAL_MEM_BUFFERABLE) };
+       xthal_write_map(mpumap, sizeof(mpumap) / sizeof(struct xthal_MPU_entry));
+ *
+ */
+#define XTHAL_MPU_ENTRY(vaddr, valid, access, memtype) \
+    { (((vaddr) & 0xffffffe0) | ((valid & 0x1))), \
+    (((XTHAL_ENCODE_MEMORY_TYPE(memtype)) << 12) | (((access) & 0xf) << 8)) }
+
+/*
+ * These macros get (or set) the specified field of the MPU entry.
+ */
+#define XTHAL_MPU_ENTRY_GET_VSTARTADDR(x) ((x).as & 0xffffffe0)
+
+#define XTHAL_MPU_ENTRY_SET_VSTARTADDR(x, vaddr) (x).as = \
+    (((x).as) & 0x1) | ((vaddr) & 0xffffffe0)
+
+#define XTHAL_MPU_ENTRY_GET_VALID(x) (((x).as & 0x1))
+
+#define XTHAL_MPU_ENTRY_SET_VALID(x, valid) (x).as = \
+    (((x).as & 0xfffffffe) | ((valid) & 0x1))
+#define XTHAL_MPU_ENTRY_GET_ACCESS(x) ((((x).at) >> 8) & 0xf)
+
+#define XTHAL_MPU_ENTRY_SET_ACCESS(x, accessRights) ((x).at = \
+        ((x).at & 0xfffff0ff) | (((accessRights) & 0xf) << 8))
+
+#define XTHAL_MPU_ENTRY_GET_MEMORY_TYPE(x) ((((x).at) >> 12) & 0x1ff)
+
+#define XTHAL_MPU_ENTRY_SET_MEMORY_TYPE(x, memtype) ((x).at = \
+        ((x).at & 0xffe00fff) | (((XTHAL_ENCODE_MEMORY_TYPE(memtype)) & 0x1ff) << 12))
+
+/*
+ * These functions accept encoded access rights, and return 1 if the
+ * supplied memory type has the property specified by the function name,
+ * otherwise they return 0.
+ */
+extern int32_t xthal_is_kernel_readable(uint32_t accessRights);
+extern int32_t xthal_is_kernel_writeable(uint32_t accessRights);
+extern int32_t xthal_is_kernel_executable(uint32_t accessRights);
+extern int32_t xthal_is_user_readable(uint32_t accessRights);
+extern int32_t xthal_is_user_writeable (uint32_t accessRights);
+extern int32_t xthal_is_user_executable(uint32_t accessRights);
+
+
+/*
+ * This function converts a bit-wise combination of the XTHAL_MEM_.. constants
+ * to the corresponding MPU memory type (9-bits).
+ *
+ * If none of the XTHAL_MEM_.. bits are present in the argument, then
+ * bits 4-12 (9-bits) are returned ... this supports using an already encoded
+ * memoryType (perhaps obtained from an xthal_MPU_entry structure) as input
+ * to xthal_set_region_attribute().
+ *
+ * This function first checks that the supplied constants are a valid and
+ * supported combination.  If not, it returns XTHAL_BAD_MEMORY_TYPE.
+ */
+extern int xthal_encode_memory_type(uint32_t x);
+
+/*
+ * This function accepts a 9-bit memory type value (such as returned by
+ * XTHAL_MEM_ENTRY_GET_MEMORY_TYPE() or xthal_encode_memory_type(). They
+ * return 1 if the memoryType has the property specified in the function
+ * name and 0 otherwise.
+ */
+extern int32_t xthal_is_cacheable(uint32_t memoryType);
+extern int32_t xthal_is_writeback(uint32_t memoryType);
+extern int32_t xthal_is_device(uint32_t  memoryType);
+
+/*
+ * Copies the current MPU entry list into 'entries' which
+ * must point to available memory of at least
+ * sizeof(struct xthal_MPU_entry) * XCHAL_MPU_ENTRIES.
+ *
+ * This function returns XTHAL_SUCCESS.
+ * XTHAL_INVALID, or
+ * XTHAL_UNSUPPORTED.
+ */
+extern int32_t xthal_read_map(struct xthal_MPU_entry* entries);
+
+/*
+ * Writes the map pointed to by 'entries' to the MPU. Before updating
+ * the map, it commits any uncommitted
+ * cache writes, and invalidates the cache if necessary.
+ *
+ * This function does not check for the correctness of the map.  Generally
+ * xthal_check_map() should be called first to check the map.
+ *
+ * If n == 0 then the existing map is cleared, and no new map is written
+ * (useful for returning to reset state)
+ *
+ * If (n > 0 && n < XCHAL_MPU_ENTRIES) then a new map is written with
+ * (XCHAL_MPU_ENTRIES-n) padding entries added to ensure a properly ordered
+ * map.  The resulting foreground map will be equivalent to the map vector
+ * fg, but the position of the padding entries should not be relied upon.
+ *
+ * If n == XCHAL_MPU_ENTRIES then the complete map as specified by fg is
+ * written.
+ *
+ * The CACHEADRDIS register will be set to enable caching any 512MB region
+ * that is overlapped by an MPU region with a cacheable memory type.
+ * Caching will be disabled if none of the 512 MB region is cacheable.
+ *
+ * xthal_write_map() disables the MPU foreground map during the MPU
+ * update and relies on the background map.
+ *
+ * As a result any interrupt that does not meet the following conditions
+ * must be disabled before calling xthal_write_map():
+ *    1) All code and data needed for the interrupt must be
+ *       mapped by the background map with sufficient access rights.
+ *    2) The interrupt code must not access the MPU.
+ *
+ */
+extern void xthal_write_map(const struct xthal_MPU_entry* entries, uint32_t n);
+
+/*
+ * Checks if entry vector 'entries' of length 'n' is a valid MPU access map.
+ * Returns:
+ *    XTHAL_SUCCESS if valid,
+ *    XTHAL_OUT_OF_ENTRIES
+ *    XTHAL_MAP_NOT_ALIGNED,
+ *    XTHAL_BAD_ACCESS_RIGHTS,
+ *    XTHAL_OUT_OF_ORDER_MAP, or
+ *    XTHAL_UNSUPPORTED if config doesn't have an MPU.
+ */
+extern int xthal_check_map(const struct xthal_MPU_entry* entries, uint32_t n);
+
+/*
+ * Returns the MPU entry that maps 'vaddr'. If 'infgmap' is non-NULL then
+ * *infgmap is set to 1 if 'vaddr' is mapped by the foreground map, and
+ * *infgmap is set to 0 if 'vaddr' is mapped by the background map.
+ */
+extern struct xthal_MPU_entry xthal_get_entry_for_address(void* vaddr,
+	int32_t* infgmap);
+
+/*
+ * Scans the supplied MPU map and returns a value suitable for writing to
+ * the CACHEADRDIS register:
+ * Bits 0-7    -> 1 if there are no cacheable areas in the corresponding 512MB
+ * region and 0 otherwise.
+ * Bits 8-31   -> undefined.
+ * This function can accept a partial memory map in the same manner
+ * xthal_write_map() does, */
+extern uint32_t
+xthal_calc_cacheadrdis(const struct xthal_MPU_entry* e, uint32_t n);
+
+/*
+ * This function is intended as an MPU specific version of
+ * xthal_set_region_attributes(). xthal_set_region_attributes() calls
+ * this function for MPU configurations.
+ *
+ * This function sets the attributes for the region [vaddr, vaddr+size)
+ * in the MPU.
+ *
+ * Depending on the state of the MPU this function will require from
+ * 0 to 3 unused MPU entries.
+ *
+ * This function typically will move, add, and subtract entries from
+ * the MPU map during execution, so that the resulting map may
+ * be quite different than when the function was called.
+ *
+ * This function does make the following guarantees:
+ *    1) The MPU access map remains in a valid state at all times
+ *       during its execution.
+ *    2) At all points during (and after) completion the memoryType
+ *       and accessRights remain the same for all addresses
+ *       that are not in the range [vaddr, vaddr+size).
+ *    3) If XTHAL_SUCCESS is returned, then the range
+ *       [vaddr, vaddr+size) will have the accessRights and memoryType
+ *       specified.
+ *    4) The CACHEADRDIS register will be set to enable caching any 512MB region
+ *       that is overlapped by an MPU region with a cacheable memory type.
+ *       Caching will be disabled if none of the 512 MB region is cacheable.
+ *
+ * The accessRights parameter should be either a 4-bit value corresponding
+ * to an MPU access mode (as defined by the XTHAL_AR_.. constants), or
+ * XTHAL_MPU_USE_EXISTING_ACCESS_RIGHTS.
+ *
+ * The memoryType parameter should be either a bit-wise or-ing of XTHAL_MEM_..
+ * constants that represent a valid MPU memoryType, a 9-bit MPU memoryType
+ * value, or XTHAL_MPU_USE_EXISTING_MEMORY_TYPE.
+ *
+ * In addition to the error codes that xthal_set_region_attribute()
+ * returns, this function can also return: XTHAL_BAD_ACCESS_RIGHTS
+ * (if the access rights bits map to an unsupported combination), or
+ * XTHAL_OUT_OF_MAP_ENTRIES (if there are not enough unused MPU entries)
+ *
+ * If this function is called with an invalid MPU map, then this function
+ * will return one of the codes that is returned by xthal_check_map().
+ *
+ * The flag, XTHAL_CAFLAG_EXPAND, is not supported
+ *
+ */
+
+extern int xthal_mpu_set_region_attribute(void* vaddr, size_t size,
+	int32_t accessRights, int32_t memoryType, uint32_t flags);
+
+/* The following are internal implementation macros.  These should not
+ * be directly used except by the hal code and headers.
+*/
+
+/*
+ * Layout of the MPU specifier for: XTHAL_ENCODE_MEMORY_TYPE(),
+ * xthal_encode_memory_type(), xthal_set_region_attribute(),
+ * and xthal_mpu_set_region_attribute(). THIS IS SUBJECT TO CHANGE:
+ *
+ * Bits 0-3  - reserved for pass through of accessRights
+ * Bits 4-12 - reserved for pass through of memoryType bits
+ * Bit  13   - indicates to use existing access rights of region
+ * Bit  14   - indicates to use existing memory type of region
+ * Bit  15   - indicates device
+ * Bit  16-19- system cache properties
+ * Bit  20-23- local cache properties
+ * Bit  24   - indicates bufferable
+ * Bit  25-26- encodes shareability (1=inner, 2=outer, 3=system)
+ * Bit  27   - indicates interruptible
+ * Bits 28-31- reserved for future use
+ */
+#define _XTHAL_SYSTEM_CACHE_BITS 0x000f0000
+#define _XTHAL_LOCAL_CACHE_BITS 0x00f00000
+#define _XTHAL_MEM_SYSTEM_RWC_MASK 0x00070000
+#define _XTHAL_MEM_LOCAL_RWC_MASK  0x00700000
+#define _XTHAL_SHIFT_RWC 16
+
+#define _XTHAL_MEM_ANY_SHAREABLE(x) (((x) & XTHAL_MEM_SYSTEM_SHAREABLE) ? 1 : 0)
+
+#define _XTHAL_MEM_INNER_SHAREABLE(x) ((((x) & XTHAL_MEM_SYSTEM_SHAREABLE) \
+        == XTHAL_MEM_INNER_SHAREABLE) ? 1 : 0)
+
+#define _XTHAL_MEM_IS_BUFFERABLE(x) (((x) & XTHAL_MEM_BUFFERABLE) ? 1 : 0)
+
+#define _XTHAL_MEM_IS_DEVICE(x) (((x) & XTHAL_MEM_DEVICE) ? 1 : 0)
+
+#define _XTHAL_NON_CACHEABLE_DOMAIN(x) \
+    (_XTHAL_MEM_IS_DEVICE(x) || _XTHAL_MEM_ANY_SHAREABLE(x)? 0x3 : 0)
+
+#define _XTHAL_CACHEABLE_DOMAIN(x)  (_XTHAL_MEM_ANY_SHAREABLE(x) ? \
+        0x3 : 0x1)
+
+#define _XTHAL_MEM_CACHE_MASK(x) ((x) & _XTHAL_SYSTEM_CACHE_BITS)
+
+#define _XTHAL_IS_SYSTEM_NONCACHEABLE(x) \
+        (((_XTHAL_MEM_CACHE_MASK(x) & XTHAL_MEM_NON_CACHEABLE) == \
+                XTHAL_MEM_NON_CACHEABLE) ? 1 : 0)
+
+#define _XTHAL_ENCODE_DEVICE(x) \
+         (((((x) & XTHAL_MEM_INTERRUPTIBLE) ? 1 : 0) << 3) | \
+         (_XTHAL_NON_CACHEABLE_DOMAIN(x) << 1) | _XTHAL_MEM_IS_BUFFERABLE(x))
+
+#define _XTHAL_ENCODE_SYSTEM_NONCACHEABLE(x) \
+        (0x18 | (_XTHAL_NON_CACHEABLE_DOMAIN(x) << 1) \
+                | _XTHAL_MEM_IS_BUFFERABLE(x))
+
+#define _XTHAL_ENCODE_SYSTEM_CACHEABLE(x) \
+        (((((((x) & _XTHAL_LOCAL_CACHE_BITS) >> 4) & XTHAL_MEM_NON_CACHEABLE) == \
+                XTHAL_MEM_NON_CACHEABLE) ? 1 : 0) ? \
+         (_XTHAL_CACHEABLE_DOMAIN(x) << 4) : \
+         _XTHAL_ENCODE_SYSTEM_CACHEABLE_LOCAL_CACHEABLE(x)) | \
+         ((_XTHAL_MEM_INNER_SHAREABLE(x) << 3) | \
+                  (_XTHAL_MEM_CACHE_MASK(x) & _XTHAL_MEM_SYSTEM_RWC_MASK) \
+                  >> _XTHAL_SHIFT_RWC)
+
+#define _XTHAL_ENCODE_SYSTEM_CACHEABLE_LOCAL_CACHEABLE(x) \
+        ((_XTHAL_CACHEABLE_DOMAIN(x) << 7) | (((((x) & _XTHAL_LOCAL_CACHE_BITS) ? \
+                ((x) & _XTHAL_LOCAL_CACHE_BITS) : \
+                (_XTHAL_MEM_CACHE_MASK(x) << 4)) \
+        & (_XTHAL_MEM_LOCAL_RWC_MASK)) >> _XTHAL_SHIFT_RWC ))
+
+/* End of internal macros */
+
+/* The functions and constants below here have been deprecated.*/
+#define XTHAL_MEM_NON_CACHED                     XTHAL_MEM_NON_CACHEABLE
+#define XTHAL_MEM_NON_SHARED                     XTHAL_MEM_NON_SHAREABLE
+#define XTHAL_MEM_INNER_SHARED                   XTHAL_MEM_INNER_SHAREABLE
+#define XTHAL_MEM_OUTER_SHARED                   XTHAL_MEM_OUTER_SHAREABLE
+#define XTHAL_MEM_SYSTEM_SHARED                  XTHAL_MEM_SYSTEM_SHAREABLE
+#define XTHAL_MEM_SW_SHAREABLE 0
+
+#define xthal_is_cached(memoryType) (xthal_is_cacheable((memoryType)))
+extern int32_t xthal_read_background_map(struct xthal_MPU_entry* entries);
+
+/* end deprecated functions and constants */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*!_ASMLANGUAGE && !_NOCLANGUAGE && !__ASSEMBLER__ */
+
+#endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */
+
+
+
+
+/****************************************************************************
+		EXPERIMENTAL and DEPRECATED Definitions
+ ****************************************************************************/
+
+
+#if !defined(_ASMLANGUAGE) && !defined(_NOCLANGUAGE) && !defined(__ASSEMBLER__)
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef INCLUDE_DEPRECATED_HAL_DEBUG_CODE
+#define XTHAL_24_BIT_BREAK		0x80000000
+#define XTHAL_16_BIT_BREAK		0x40000000
+extern const unsigned short	Xthal_ill_inst_16[16];
+#define XTHAL_DEST_REG		0xf0000000	/* Mask for destination register */
+#define XTHAL_DEST_REG_INST	0x08000000	/* Branch address is in register */
+#define XTHAL_DEST_REL_INST	0x04000000	/* Branch address is relative */
+#define XTHAL_RFW_INST		0x00000800
+#define XTHAL_RFUE_INST		0x00000400
+#define XTHAL_RFI_INST		0x00000200
+#define XTHAL_RFE_INST		0x00000100
+#define XTHAL_RET_INST		0x00000080
+#define XTHAL_BREAK_INST	0x00000040
+#define XTHAL_SYSCALL_INST	0x00000020
+#define XTHAL_LOOP_END		0x00000010	/* Not set by xthal_inst_type */
+#define XTHAL_JUMP_INST		0x00000008	/* Call or jump instruction */
+#define XTHAL_BRANCH_INST	0x00000004	/* Branch instruction */
+#define XTHAL_24_BIT_INST	0x00000002
+#define XTHAL_16_BIT_INST   0x00000001
+typedef struct xthal_state {
+    unsigned	pc;
+    unsigned	ar[16];
+    unsigned	lbeg;
+    unsigned	lend;
+    unsigned	lcount;
+    unsigned	extra_ptr;
+    unsigned	cpregs_ptr[XTHAL_MAX_CPS];
+} XTHAL_STATE;
+extern unsigned int xthal_inst_type(void *addr);
+extern unsigned int xthal_branch_addr(void *addr);
+extern unsigned int xthal_get_npc(XTHAL_STATE *user_state);
+#endif /* INCLUDE_DEPRECATED_HAL_DEBUG_CODE */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*!_ASMLANGUAGE && !_NOCLANGUAGE && !__ASSEMBLER__ */
+
+#endif /*XTENSA_HAL_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/idmaasm.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/idmaasm.h
new file mode 100644
index 00000000000..6c8499c5711
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/idmaasm.h
@@ -0,0 +1,72 @@
+/* $Id: //depot/dev/Foxhill/Xtensa/OS/include/xtensa/mpuasm.h#5 $ */
+
+/*
+ * Copyright (c) 2016 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _IDMAASM_H_
+#define _IDMAASM_H_
+
+#if XCHAL_HAVE_IDMA
+#include <xtensa/idma.h>
+#endif
+
+/*
+ * Macro for restore IDMA regs
+ *
+ * Parameters:
+ * 	a_save				=>	address register containing pointer to IDMA save area
+ * 	a_temp1, a_temp2, a_temp3.	=>  address register temporaries
+ */
+//   IDMA_REG_SETTINGS,
+//   IDMA_REG_TIMEOUT,
+//   IDMA_REG_DESC_START,
+//   IDMA_REG_CONTROL,
+//   IDMA_REG_USERPRIV,
+
+.macro _idma_restore a_save, a_temp1, a_temp2, a_temp3
+#if XCHAL_HAVE_IDMA
+	l32i	\a_temp1, \a_save, 0
+	movi	\a_temp3, idmareg_base
+	movi	\a_temp2, IDMA_REG_SETTINGS
+	add	\a_temp2, \a_temp2, \a_temp3
+	wer	\a_temp1, \a_temp2
+	l32i	\a_temp1, \a_save, 4
+	movi	\a_temp2, IDMA_REG_TIMEOUT
+	add	\a_temp2, \a_temp2, \a_temp3
+	wer	\a_temp1, \a_temp2
+	l32i	\a_temp1, \a_save, 8
+	movi	\a_temp2, IDMA_REG_DESC_START
+	add	\a_temp2, \a_temp2, \a_temp3
+	wer	\a_temp1, \a_temp2
+	l32i	\a_temp1, \a_save, 12
+	movi	\a_temp2, IDMA_REG_CONTROL
+	add	\a_temp2, \a_temp2, \a_temp3
+	wer	\a_temp1, \a_temp2
+	l32i	\a_temp1, \a_save, 16
+	movi	\a_temp2, IDMA_REG_USERPRIV
+	add	\a_temp2, \a_temp2, \a_temp3
+	wer	\a_temp1, \a_temp2
+#endif
+.endm
+
+#endif //_IDMAASM_H_
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/mpuasm.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/mpuasm.h
new file mode 100644
index 00000000000..ec43f41827c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/mpuasm.h
@@ -0,0 +1,111 @@
+/* $Id: //depot/dev/Foxhill/Xtensa/OS/include/xtensa/mpuasm.h#5 $ */
+
+/*
+ * Copyright (c) 2016 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _MPUASM_H_
+#define _MPUASM_H_
+#include <xtensa/config/core.h>
+
+/*
+ * Macro for writing MPU map.
+ *
+ * Parameters:
+ * 	a_map				=>	address register containing pointer to MPU map
+ * 	a_num_entries		=>	number of entries in the forementioned map
+ * 	a_temp1, a_temp2.	=>  address register temporaries
+ * 	a_temp3, a_temp4
+ */
+
+.macro mpu_write_map a_map, a_num_entries, a_temp1, a_temp2, a_temp3, a_temp4
+#if XCHAL_HAVE_MPU
+	movi	\a_temp1, 0
+	wsr.cacheadrdis \a_temp1 // enable the cache in all regions
+	wsr.mpuenb	\a_temp1	// disable all foreground entries
+
+    // Clear out the unused entries.
+    //
+    // Currently we are clearing out all the entries because currently
+    // the entries must be ordered even if they are all disabled.
+    // If out of order entries were permitted when all are disabled,
+    // performance could be improved by clearing XCHAL_MPU_ENTRIES - n
+	// (n = number of entries) rather than XCHAL_MPU_ENTRIES - 1 entries.
+	//
+	movi	\a_temp2, 0
+	movi	\a_temp3, XCHAL_MPU_ENTRIES - 1
+	j	1f
+	.align 16 // this alignment is done to ensure that
+1:
+	memw     // todo currently wptlb must be preceeded by a memw.  The instructions must
+	// be aligned to ensure that both are in the same cache line.  These statements should be
+	// properly conditionalized when that restriction is removed from the HW
+	wptlb	\a_temp2, \a_temp1
+	addi	\a_temp2, \a_temp2, 1
+	bltu	\a_temp2, \a_temp3, 1b
+
+        // Write the new entries.
+	//
+	beqz	\a_num_entries, 4f				// if no entries, skip loop
+	addx8	\a_map, \a_num_entries, \a_map			// compute end of provided map
+	j		3f
+	.align 16
+2:	memw     // todo currently wptlb must be preceeded by a memw.  The instructions must
+	// be aligned to ensure that both are in the same cache line.  These statements should be
+	// properly conditionalized when that restriction is removed from the HW
+	wptlb	\a_temp2, \a_temp4
+	addi	\a_temp3, \a_temp3, -1
+	beqz	\a_num_entries, 4f		// loop until done
+3:	addi	\a_map, \a_map, -8
+	l32i	\a_temp2, \a_map, 4			// get at (acc.rights, memtype)
+	l32i	\a_temp4, \a_map, 0			// get as (vstart, valid)
+	addi	\a_num_entries, \a_num_entries, -1
+	extui	\a_temp1, \a_temp2, 0, 5			// entry index portion
+	xor		\a_temp2, \a_temp2, \a_temp1			// zero it
+	or		\a_temp2, \a_temp2, \a_temp3			// set index = \a_temp3
+	j		2b
+4:
+#endif
+.endm
+
+/*
+ * Macro for reading MPU map
+ *
+ * Parameters:
+ * 	a_map_ptr			=> address register pointing to memory where map is written
+ * 	a_temp1, a_temp2	=> address register temporaries
+ */
+.macro mpu_read_map a_map_ptr, a_temp1, a_temp2
+#if XCHAL_HAVE_MPU
+	movi	\a_temp1, XCHAL_MPU_ENTRIES // set index to last entry + 1
+	addx8	\a_map_ptr, \a_temp1, \a_map_ptr // set map ptr to last entry + 1
+1:	addi	\a_temp1, \a_temp1, -1 // decrement index
+	addi	\a_map_ptr, \a_map_ptr, -8 // decrement index
+	rptlb0	\a_temp2, \a_temp1 // read 1/2 of entry
+	s32i	\a_temp2, \a_map_ptr, 0 // write 1/2 of entry
+	rptlb1	\a_temp2,	\a_temp1
+	s32i	\a_temp2, \a_map_ptr, 4
+	bnez	\a_temp1, 1b // loop until done
+#endif
+	.endm
+
+#endif
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/specreg.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/specreg.h
new file mode 100644
index 00000000000..8f8222c2ad9
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/specreg.h
@@ -0,0 +1,143 @@
+/*
+ * Xtensa Special Register symbolic names
+ */
+
+/* $Id: //depot/rel/Foxhill/dot.9/Xtensa/OS/include/xtensa/specreg.h#1 $ */
+
+/*
+ * Copyright (c) 2005-2011 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef XTENSA_SPECREG_H
+#define XTENSA_SPECREG_H
+
+/*  Special registers:  */
+#define LBEG		0
+#define LEND		1
+#define LCOUNT		2
+#define SAR		3
+#define BR		4
+#define LITBASE		5
+#define SCOMPARE1	12
+#define ACCLO		16
+#define ACCHI		17
+#define MR_0		32
+#define MR_1		33
+#define MR_2		34
+#define MR_3		35
+#define PREFCTL		40
+#define WINDOWBASE	72
+#define WINDOWSTART	73
+#define PTEVADDR	83
+#define RASID		90
+#define ITLBCFG		91
+#define DTLBCFG		92
+#define IBREAKENABLE	96
+#define MEMCTL		97
+#define CACHEATTR	98	/* until T1050, XEA1 */
+#define CACHEADRDIS	98	/* LX7+ */
+#define ATOMCTL		99
+#define DDR		104
+#define MECR		110
+#define IBREAKA_0	128
+#define IBREAKA_1	129
+#define DBREAKA_0	144
+#define DBREAKA_1	145
+#define DBREAKC_0	160
+#define DBREAKC_1	161
+#define CONFIGID0	176
+#define EPC_1		177
+#define EPC_2		178
+#define EPC_3		179
+#define EPC_4		180
+#define EPC_5		181
+#define EPC_6		182
+#define EPC_7		183
+#define DEPC		192
+#define EPS_2		194
+#define EPS_3		195
+#define EPS_4		196
+#define EPS_5		197
+#define EPS_6		198
+#define EPS_7		199
+#define CONFIGID1	208
+#define EXCSAVE_1	209
+#define EXCSAVE_2	210
+#define EXCSAVE_3	211
+#define EXCSAVE_4	212
+#define EXCSAVE_5	213
+#define EXCSAVE_6	214
+#define EXCSAVE_7	215
+#define CPENABLE	224
+#define INTERRUPT	226
+#define INTREAD		INTERRUPT	/* alternate name for backward compatibility */
+#define INTSET		INTERRUPT	/* alternate name for backward compatibility */
+#define INTCLEAR	227
+#define INTENABLE	228
+#define PS		230
+#define VECBASE		231
+#define EXCCAUSE	232
+#define DEBUGCAUSE	233
+#define CCOUNT		234
+#define PRID		235
+#define ICOUNT		236
+#define ICOUNTLEVEL	237
+#define EXCVADDR	238
+#define CCOMPARE_0	240
+#define CCOMPARE_1	241
+#define CCOMPARE_2	242
+#define MISC_REG_0	244
+#define MISC_REG_1	245
+#define MISC_REG_2	246
+#define MISC_REG_3	247
+
+/*  Special cases (bases of special register series):  */
+#define MR		32
+#define IBREAKA		128
+#define DBREAKA		144
+#define DBREAKC		160
+#define EPC		176
+#define EPS		192
+#define EXCSAVE		208
+#define CCOMPARE	240
+#define MISC_REG	244
+
+/*  Tensilica-defined user registers:  */
+#if 0
+/*#define ...	 21..24 */	/* (545CK) */
+/*#define ...	140..143 */	/* (545CK) */
+#define EXPSTATE	230	/* Diamond */
+#define THREADPTR	231	/* threadptr option */
+#define FCR		232	/* FPU */
+#define FSR		233	/* FPU */
+#define AE_OVF_SAR	240	/* HiFi2 */
+#define AE_BITHEAD	241	/* HiFi2 */
+#define AE_TS_FTS_BU_BP	242	/* HiFi2 */
+#define AE_SD_NO	243	/* HiFi2 */
+#define VSAR		240	/* VectraLX */
+#define ROUND_LO	242	/* VectraLX */
+#define ROUND_HI	243	/* VectraLX */
+#define CBEGIN		246	/* VectraLX */
+#define CEND		247	/* VectraLX */
+#endif
+
+#endif /* XTENSA_SPECREG_H */
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/traxreg.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/traxreg.h
new file mode 100644
index 00000000000..82f87b12054
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/traxreg.h
@@ -0,0 +1,195 @@
+/* TRAX register definitions
+
+   Copyright (c) 2006-2012 Tensilica Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
+
+#ifndef _TRAX_REGISTERS_H_
+#define _TRAX_REGISTERS_H_
+
+#define SHOW	1
+#define HIDE	0
+
+#define RO	0
+#define RW	1
+
+/*  TRAX Register Numbers (from possible range of 0..127)  */
+#if 0
+#define TRAXREG_ID		0
+#define TRAXREG_CONTROL		1
+#define TRAXREG_STATUS		2
+#define TRAXREG_DATA		3
+#define TRAXREG_ADDRESS		4
+#define TRAXREG_TRIGGER		5
+#define TRAXREG_MATCH		6
+#define TRAXREG_DELAY		7
+#define TRAXREG_STARTADDR	8
+#define TRAXREG_ENDADDR		9
+/*  Internal use only (unpublished):  */
+#define TRAXREG_P4CHANGE	16
+#define TRAXREG_P4REV		17
+#define TRAXREG_P4DATE		18
+#define TRAXREG_P4TIME		19
+#define TRAXREG_PDSTATUS	20
+#define TRAXREG_PDDATA		21
+#define TRAXREG_STOP_PC		22
+#define TRAXREG_STOP_ICNT	23
+#define TRAXREG_MSG_STATUS	24
+#define TRAXREG_FSM_STATUS	25
+#define TRAXREG_IB_STATUS	26
+#define TRAXREG_MAX		27
+#define TRAXREG_ITCTRL		96
+#endif
+/* The registers above match the NAR addresses. So, their values are used for NAR access */
+
+/*  TRAX Register Fields  */
+
+/*  TRAX ID register fields:  */
+#define TRAX_ID_PRODNO          0xf0000000	/* product number (0=TRAX) */
+#define TRAX_ID_PRODOPT         0x0f000000	/* product options */
+#define TRAX_ID_MIW64		0x08000000	/* opt: instruction width */
+#define TRAX_ID_AMTRAX		0x04000000	/* opt: collection of options, internal (VER_2_0 or later)*/
+#define TRAX_ID_MAJVER(id)	(((id) >> 20) & 0x0f)
+#define TRAX_ID_MINVER(id)	(((id) >> 17) & 0x07)
+#define TRAX_ID_VER(id)		((TRAX_ID_MAJVER(id)<<4)|TRAX_ID_MINVER(id))
+#define TRAX_ID_STDCFG		0x00010000	/* standard config */
+#define TRAX_ID_CFGID		0x0000ffff	/* TRAX configuration ID */
+#define TRAX_ID_MEMSHARED	0x00001000	/* Memshared option in TRAX */
+#define TRAX_ID_FROM_VER(ver)	((((ver) & 0xf0) << 16) | (((ver) & 0x7) << 17))
+/*  Other TRAX ID register macros:  */
+/*  TRAX versions of interest (TRAX_ID_VER(), ie. MAJVER*16 + MINVER):  */
+#define TRAX_VER_1_0		0x10		/* RA */
+#define TRAX_VER_1_1		0x11		/* RB thru RC-2010.1 */
+#define TRAX_VER_2_0		0x20		/* RC-2010.2, RD-2010.0, RD-2011.1 */
+#define TRAX_VER_2_1		0x21		/* RC-2011.3 / RD-2011.2 and later */
+#define TRAX_VER_3_0		0x30		/* RE-2012.0 */
+#define	TRAX_VER_3_1		0x31		/* RE-2012.1 */
+#define TRAX_VER_HUAWEI_3	TRAX_VER_3_0	/* For Huawei, PRs: 25223, 25224, 24880 */
+
+
+/*  TRAX version 1.0 requires a couple software workarounds:  */
+#define TRAX_ID_1_0_ERRATUM(id)	(TRAX_ID_VER(id) == TRAX_VER_1_0)
+/*  TRAX version 2.0 requires software workaround for PR 22161:  */
+#define TRAX_ID_MEMSZ_ERRATUM(id)	(TRAX_ID_VER(id) == TRAX_VER_2_0)
+
+/*  TRAX Control register fields:  */
+#define TRAX_CONTROL_TREN	0x00000001
+#define TRAX_CONTROL_TRSTP	0x00000002
+#define TRAX_CONTROL_PCMEN	0x00000004
+#define TRAX_CONTROL_PTIEN	0x00000010
+#define TRAX_CONTROL_CTIEN	0x00000020
+#define TRAX_CONTROL_TMEN	0x00000080	/* 2.0+ */
+#define TRAX_CONTROL_CNTU	0x00000200
+#define TRAX_CONTROL_BIEN	0x00000400
+#define TRAX_CONTROL_BOEN	0x00000800
+#define TRAX_CONTROL_TSEN	0x00000800
+#define TRAX_CONTROL_SMPER	0x00007000
+#define TRAX_CONTROL_SMPER_SHIFT	12
+#define TRAX_CONTROL_PTOWT	0x00010000
+#define TRAX_CONTROL_CTOWT	0x00020000
+#define TRAX_CONTROL_PTOWS	0x00100000
+#define TRAX_CONTROL_CTOWS	0x00200000
+#define TRAX_CONTROL_ATID	0x7F000000	/* 2.0+, amtrax */
+#define TRAX_CONTROL_ATID_SHIFT		24
+#define TRAX_CONTROL_ATEN	0x80000000	/* 2.0+, amtrax */
+
+#define TRAX_CONTROL_PTOWS_ER	0x00020000	/* For 3.0 */
+#define TRAX_CONTROL_CTOWT_ER	0x00100000	/* For 3.0 */
+
+#define TRAX_CONTROL_ITCTO	0x00400000	/* For 3.0 */
+#define TRAX_CONTROL_ITCTIA	0x00800000	/* For 3.0 */
+#define TRAX_CONTROL_ITATV	0x01000000	/* For 3.0 */
+
+
+/*  TRAX Status register fields:  */
+#define TRAX_STATUS_TRACT	0x00000001
+#define TRAX_STATUS_TRIG	0x00000002
+#define TRAX_STATUS_PCMTG	0x00000004
+#define TRAX_STATUS_BUSY	0x00000008  /* ER ??? */
+#define TRAX_STATUS_PTITG	0x00000010
+#define TRAX_STATUS_CTITG	0x00000020
+#define TRAX_STATUS_MEMSZ	0x00001F00
+#define TRAX_STATUS_MEMSZ_SHIFT		8
+#define TRAX_STATUS_PTO		0x00010000
+#define TRAX_STATUS_CTO		0x00020000
+
+#define TRAX_STATUS_ITCTOA	0x00400000	/* For 3.0 */
+#define TRAX_STATUS_ITCTI	0x00800000	/* For 3.0 */
+#define TRAX_STATUS_ITATR	0x01000000	/* For 3.0 */
+
+
+/*  TRAX Address register fields:  */
+#define TRAX_ADDRESS_TWSAT	0x80000000
+#define TRAX_ADDRESS_TWSAT_SHIFT	31
+#define TRAX_ADDRESS_TOTALMASK	0x00FFFFFF
+// !!! VUakiVU. added for new TRAX:
+#define TRAX_ADDRESS_WRAPCNT	0x7FE00000	/* version ???... */
+#define TRAX_ADDRESS_WRAP_SHIFT		21
+
+/*  TRAX PCMatch register fields:  */
+#define TRAX_PCMATCH_PCML	0x0000001F
+#define TRAX_PCMATCH_PCML_SHIFT		0
+#define TRAX_PCMATCH_PCMS	0x80000000
+
+/*  Compute trace ram buffer size (in bytes) from status register:  */
+#define TRAX_MEM_SIZE(status)	(1L << (((status) & TRAX_STATUS_MEMSZ) >> TRAX_STATUS_MEMSZ_SHIFT))
+
+#if 0
+/*  Describes a field within a register:  */
+typedef struct {
+    const char*	name;
+// unsigned	width;
+// unsigned	shift;
+    char	width;
+    char	shift;
+    char	visible;		/* 0 = internal use only, 1 = shown */
+    char	reserved;
+} trax_regfield_t;
+#endif
+
+/*  Describes a TRAX register:  */
+typedef struct {
+    const char*	name;
+    unsigned	id;
+    char	width;
+    char	visible;
+    char	writable;
+    char	reserved;
+    //const trax_regfield_t * fieldset;
+} trax_regdef_t;
+
+
+extern const trax_regdef_t	trax_reglist[];
+extern const signed int 	trax_readable_regs[];
+extern const signed int 	trax_unamed_header_regs[];
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*  Prototypes:  */
+extern int		trax_find_reg(char * regname, char **errmsg);
+extern const char *	trax_regname(int regno);
+
+#ifdef  __cplusplus
+}
+#endif
+
+#endif /* _TRAX_REGISTERS_H_ */
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/xdm-regs.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xdm-regs.h
new file mode 100644
index 00000000000..d45ee323c59
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xdm-regs.h
@@ -0,0 +1,536 @@
+/* xdm-regs.h  -  Common register and related definitions for the XDM
+                  (Xtensa Debug Module) */
+
+/* Copyright (c) 2016 Cadence Design Systems Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
+
+
+#ifndef _XDM_REGS_H_
+#define _XDM_REGS_H_
+
+/*  NOTE:  This header file is included by C, assembler, and other sources.
+    So any C-specific or asm-specific content must be appropriately #ifdef'd.  */
+
+
+/*
+ *  XDM registers can be accessed using APB, ERI, or JTAG (via NAR).
+ *  Address offsets for APB and ERI are the same, and for JTAG
+ *  is different (due to the limited 7-bit NAR addressing).
+ *
+ *  Here, we first provide the constants as APB / ERI address offsets.
+ *  This is necessary for assembler code (which accesses XDM via ERI),
+ *  because complex conversion macros between the two address maps
+ *  don't work in the assembler.
+ *  Conversion macros are used to convert these to/from JTAG (NAR),
+ *  addresses, for software using JTAG.
+ */
+/* FIXME: maybe provide only MISC+CS registers here, and leave specific
+   subsystem registers in separate headers? eg. for TRAX, PERF, OCD */
+
+/*       XDM_....     		ERI addr  [NAR addr] Description...... */
+
+/*  TRAX  */
+#define  XDM_TRAX_ID		 0x100000	/*[0x00] ID */
+#define  XDM_TRAX_CONTROL 	 0x100004	/*[0x01] Control */
+#define  XDM_TRAX_STATUS	 0x100008	/*[0x02] Status */
+#define  XDM_TRAX_DATA		 0x10000C	/*[0x03] Data */
+#define  XDM_TRAX_ADDRESS	 0x100010	/*[0x04] Address */
+#define  XDM_TRAX_TRIGGER	 0x100014	/*[0x05] Stop PC */
+#define  XDM_TRAX_MATCH		 0x100018	/*[0x06] Stop PC Range */
+#define  XDM_TRAX_DELAY		 0x10001C	/*[0x07] Post Stop Trigger Capture Size */
+#define  XDM_TRAX_STARTADDR	 0x100020	/*[0x08] Trace Memory Start */
+#define  XDM_TRAX_ENDADDR	 0x100024	/*[0x09] Trace Memory End */
+#define  XDM_TRAX_DEBUGPC	 0x10003C	/*[0x0F] Debug PC */
+#define  XDM_TRAX_P4CHANGE	 0x100040	/*[0x10] X */
+#define  XDM_TRAX_TIME0		 0x100040	/*[0x10] First Time Register */
+#define  XDM_TRAX_P4REV		 0x100044	/*[0x11] X */
+#define  XDM_TRAX_TIME1		 0x100044	/*[0x11] Second Time Register */
+#define  XDM_TRAX_P4DATE	 0x100048	/*[0x12] X */
+#define  XDM_TRAX_INTTIME_MAX	 0x100048 	/*[0x12] maximal Value of Timestamp IntTime */
+#define  XDM_TRAX_P4TIME	 0x10004C	/*[0x13] X */
+#define  XDM_TRAX_PDSTATUS	 0x100050	/*[0x14] Sample of PDebugStatus */
+#define  XDM_TRAX_PDDATA	 0x100054	/*[0x15] Sample of PDebugData */
+#define  XDM_TRAX_STOP_PC	 0x100058	/*[0x16] X */
+#define  XDM_TRAX_STOP_ICNT	 0x10005C	/*[0x16] X */
+#define  XDM_TRAX_MSG_STATUS	 0x100060	/*[0x17] X */
+#define  XDM_TRAX_FSM_STATUS	 0x100064	/*[0x18] X */
+#define  XDM_TRAX_IB_STATUS	 0x100068	/*[0x19] X */
+#define  XDM_TRAX_STOPCNT	 0x10006C	/*[0x1A] X */
+
+/*  Performance Monitoring Counters  */
+#define  XDM_PERF_PMG		0x101000	/*[0x20] perf. mon. global control register */
+#define  XDM_PERF_INTPC		0x101010	/*[0x24] perf. mon. interrupt PC */
+#define  XDM_PERF_PM0		0x101080	/*[0x28] perf. mon. counter 0 value */
+#define  XDM_PERF_PM1		0x101084	/*[0x29] perf. mon. counter 1 value */
+#define  XDM_PERF_PM2		0x101088	/*[0x2A] perf. mon. counter 2 value */
+#define  XDM_PERF_PM3		0x10108C	/*[0x2B] perf. mon. counter 3 value */
+#define  XDM_PERF_PM4		0x101090	/*[0x2C] perf. mon. counter 4 value */
+#define  XDM_PERF_PM5		0x101094	/*[0x2D] perf. mon. counter 5 value */
+#define  XDM_PERF_PM6		0x101098	/*[0x2E] perf. mon. counter 6 value */
+#define  XDM_PERF_PM7		0x10109C	/*[0x2F] perf. mon. counter 7 value */
+#define  XDM_PERF_PM(n)		(0x101080+((n)<<2)) /* perfmon cnt n=0..7 value */
+#define  XDM_PERF_PMCTRL0	0x101100	/*[0x30] perf. mon. counter 0 control */
+#define  XDM_PERF_PMCTRL1	0x101104	/*[0x31] perf. mon. counter 1 control */
+#define  XDM_PERF_PMCTRL2	0x101108	/*[0x32] perf. mon. counter 2 control */
+#define  XDM_PERF_PMCTRL3	0x10110C	/*[0x33] perf. mon. counter 3 control */
+#define  XDM_PERF_PMCTRL4	0x101110	/*[0x34] perf. mon. counter 4 control */
+#define  XDM_PERF_PMCTRL5	0x101114	/*[0x35] perf. mon. counter 5 control */
+#define  XDM_PERF_PMCTRL6	0x101118	/*[0x36] perf. mon. counter 6 control */
+#define  XDM_PERF_PMCTRL7	0x10111C	/*[0x37] perf. mon. counter 7 control */
+#define  XDM_PERF_PMCTRL(n)	(0x101100+((n)<<2)) /* perfmon cnt n=0..7 control */
+#define  XDM_PERF_PMSTAT0	0x101180	/*[0x38] perf. mon. counter 0 status */
+#define  XDM_PERF_PMSTAT1	0x101184	/*[0x39] perf. mon. counter 1 status */
+#define  XDM_PERF_PMSTAT2	0x101188	/*[0x3A] perf. mon. counter 2 status */
+#define  XDM_PERF_PMSTAT3	0x10118C	/*[0x3B] perf. mon. counter 3 status */
+#define  XDM_PERF_PMSTAT4	0x101190	/*[0x3C] perf. mon. counter 4 status */
+#define  XDM_PERF_PMSTAT5	0x101194	/*[0x3D] perf. mon. counter 5 status */
+#define  XDM_PERF_PMSTAT6	0x101198	/*[0x3E] perf. mon. counter 6 status */
+#define  XDM_PERF_PMSTAT7	0x10119C	/*[0x3F] perf. mon. counter 7 status */
+#define  XDM_PERF_PMSTAT(n)	(0x101180+((n)<<2)) /* perfmon cnt n=0..7 status */
+
+/*  On-Chip-Debug (OCD)  */
+#define  XDM_OCD_ID		0x102000	/*[0x40] ID register */
+#define  XDM_OCD_DCR_CLR	0x102008	/*[0x42] Debug Control reg clear */
+#define  XDM_OCD_DCR_SET	0x10200C	/*[0x43] Debug Control reg set */
+#define  XDM_OCD_DSR		0x102010	/*[0x44] Debug Status reg */
+#define  XDM_OCD_DDR		0x102014	/*[0x45] Debug Data reg */
+#define  XDM_OCD_DDREXEC	0x102018	/*[0x46] Debug Data reg + execute-DIR */
+#define  XDM_OCD_DIR0EXEC	0x10201C	/*[0x47] Debug Instruction reg, word 0 + execute-DIR */
+#define  XDM_OCD_DIR0		0x102020	/*[0x48] Debug Instruction reg, word 1 */
+#define  XDM_OCD_DIR1		0x102024	/*[0x49] Debug Instruction reg, word 2 */
+#define  XDM_OCD_DIR2		0x102028	/*[0x4A] Debug Instruction reg, word 3 */
+#define  XDM_OCD_DIR3		0x10202C	/*[0x49] Debug Instruction reg, word 4 */
+#define  XDM_OCD_DIR4		0x102030	/*[0x4C] Debug Instruction reg, word 5 */
+#define  XDM_OCD_DIR5		0x102034	/*[0x4D] Debug Instruction reg, word 5 */
+#define  XDM_OCD_DIR6		0x102038	/*[0x4E] Debug Instruction reg, word 6 */
+#define  XDM_OCD_DIR7		0x10203C	/*[0x4F] Debug Instruction reg, word 7 */
+
+/*  Miscellaneous Registers  */
+#define  XDM_MISC_PWRCTL	0x103020	/*[0x58] Power and Reset Control */
+#define  XDM_MISC_PWRSTAT	0x103024	/*[0x59] Power and Reset Status */
+#define  XDM_MISC_ERISTAT	0x103028	/*[0x5A] ERI Transaction Status */
+#define  XDM_MISC_DATETIME	0x103034
+#define  XDM_MISC_CONFIGID1_V0	0x103034	/*[0x5D] [INTERNAL] ConfigID1 in XDM v0/1 */
+#define  XDM_MISC_CONFIGID1_V2	0x10007c	/*[0x1F] [INTERNAL] ConfigID1 since XDM v2 */
+#define  XDM_MISC_CONFIGID0_V2	0x100078	/*[0x1E] [INTERNAL] ConfigID0 since XDM v2 */
+#define  XDM_MISC_UBID		0x103038	/*[0x5E] [INTERNAL] Build Unique ID */
+#define  XDM_MISC_CID		0x10303C	/*[0x5F] [INTERNAL] Customer ID */
+
+/*  CoreSight compatibility  */
+#define  XDM_CS_ITCTRL		0x103F00	/*[0x60] InTegration Mode control reg */
+#define  XDM_CS_CLAIMSET	0x103FA0	/*[0x68] Claim Tag Set reg */
+#define  XDM_CS_CLAIMCLR	0x103FA4	/*[0x69] Claim Tag Clear reg */
+#define  XDM_CS_LOCK_ACCESS	0x103FB0	/*[0x6B] Lock Access (writing 0xC5ACCE55 unlocks) */
+#define  XDM_CS_LOCK_STATUS	0x103FB4	/*[0x6D] Lock Status */
+#define  XDM_CS_AUTH_STATUS	0x103FB8	/*[0x6E] Authentication Status */
+#define  XDM_CS_DEV_ID		0x103FC8	/*[0x72] Device ID */
+#define  XDM_CS_DEV_TYPE	0x103FCC	/*[0x73] Device Type */
+#define  XDM_CS_PER_ID4		0x103FD0	/*[0x74] Peripheral ID reg byte 4 */
+#define  XDM_CS_PER_ID5		0x103FD4	/*[0x75] Peripheral ID reg byte 5 */
+#define  XDM_CS_PER_ID6		0x103FD8	/*[0x76] Peripheral ID reg byte 6 */
+#define  XDM_CS_PER_ID7		0x103FDC	/*[0x77] Peripheral ID reg byte 7 */
+#define  XDM_CS_PER_ID0		0x103FE0	/*[0x78] Peripheral ID reg byte 0 */
+#define  XDM_CS_PER_ID1		0x103FE4	/*[0x79] Peripheral ID reg byte 1 */
+#define  XDM_CS_PER_ID2		0x103FE8	/*[0x7A] Peripheral ID reg byte 2 */
+#define  XDM_CS_PER_ID3		0x103FEC	/*[0x7B] Peripheral ID reg byte 3 */
+#define  XDM_CS_COMP_ID0	0x103FF0	/*[0x7C] Component ID reg byte 0 */
+#define  XDM_CS_COMP_ID1	0x103FF4	/*[0x7D] Component ID reg byte 1 */
+#define  XDM_CS_COMP_ID2	0x103FF8	/*[0x7E] Component ID reg byte 2 */
+#define  XDM_CS_COMP_ID3	0x103FFC	/*[0x7F] Component ID reg byte 3 */
+
+#define CS_PER_ID0	0x00000003
+#define CS_PER_ID1	0x00000021
+#define CS_PER_ID2	0x0000000f
+#define CS_PER_ID3	0x00000000
+#define CS_PER_ID4	0x00000024
+
+#define CS_COMP_ID0	0x0000000d
+#define CS_COMP_ID1	0x00000090
+#define CS_COMP_ID2	0x00000005
+#define CS_COMP_ID3	0x000000b1
+
+#define CS_DEV_TYPE	0x00000015
+
+#define XTENSA_IDCODE	0x120034e5    // FIXME (upper bits not spec. out but BE is !)
+#define XTENSA_MFC_ID	(XTENSA_IDCODE & 0xFFF)
+#define CS_DEV_ID	XTENSA_IDCODE //FIXME - for XDM v0 only, for v2 is the new ID, that includes vars like PRID but also can be custom
+#define CS_DEV_ID_v0_MASK	0x00000FFF // can compare only the lower 12 bits
+#define CS_DEV_ID_v2_MASK	0xF0000000 // can compare only the upper 4 bits
+
+#define NXS_OCD_REG(val)  ((val >= 0x40) && (val <= 0x5F))
+#define NXS_TRAX_REG(val)  val <= 0x3F
+
+#define ERI_TRAX_REG(val)  ((val & 0xFFFF) < 0x1000)
+#define ERI_OCD_REG(val)   ((val & 0xFFFF) >= 0x2000) && ((val & 0xFFFF) < 0x4000))
+
+/*  Convert above 14-bit ERI/APB address/offset to 7-bit NAR address:  */
+#define _XDM_ERI_TO_NAR(a)	( ((a)&0x3F80)==0x0000 ? (((a)>>2) & 0x1F) \
+				: ((a)&0x3E00)==0x1000 ? (0x20 | (((a)>>2) & 7) | (((a)>>4) & 0x18)) \
+				: ((a)&0x3FC0)==0x2000 ? (0x40 | (((a)>>2) & 0xF)) \
+				: ((a)&0x3FE0)==0x3020 ? (0x50 | (((a)>>2) & 0xF)) \
+				: ((a)&0x3FFC)==0x3F00 ? 0x60 \
+				: ((a)&0x3F80)==0x3F80 ? (0x60 | (((a)>>2) & 0x1F)) \
+				: -1 )
+
+#define XDM_ERI_TO_NAR(a)	_XDM_ERI_TO_NAR(a & 0xFFFF)
+
+/* Convert 7-bit NAR address back to ERI/APB address/offset:  */
+#define _XDM_NAR_TO_APB(a)	((a) <= 0x1f                ? ((a) << 2)                   \
+				:(a) >= 0x20 && (a) <= 0x3F ? (0x1000 | (((a)&  7) << 2) | (((a)&0x18)<<4)) \
+				:(a) >= 0x40 && (a) <= 0x4F ? (0x2000 | (((a)&0xF) << 2))  \
+				:(a) >= 0x58 && (a) <= 0x5F ? (0x3000 | (((a)&0xF) << 2))  \
+				:(a) == 0x60                ? (0x3F00)                     \
+				:(a) >= 0x68 && (a) <= 0x7F ? (0x3F80 | (((a)&0x1F) << 2)) \
+				: -1)
+
+#define XDM_NAR_TO_APB(a)	_XDM_NAR_TO_APB((a & 0xFFFF))
+#define XDM_NAR_TO_ERI(a)	_XDM_NAR_TO_APB((a & 0xFFFF)) | 0x100000
+
+/* Convert APB to ERI address */
+#define XDM_APB_TO_ERI(a)	((a) | (0x100000))
+#define XDM_ERI_TO_APB(a)	((a) & (0x0FFFFF))
+
+/***********  Bit definitions within some of the above registers  ***********/
+#define OCD_ID_LSDDRP			0x01000000
+#define OCD_ID_LSDDRP_SHIFT			24
+#define OCD_ID_ENDIANESS		0x00000001
+#define OCD_ID_ENDIANESS_SHIFT			 0
+#define OCD_ID_PSO			0x0000000C
+#define OCD_ID_PSO_SHIFT			 2
+#define OCD_ID_TRACEPORT		0x00000080
+#define OCD_ID_TRACEPORT_SHIFT			 7
+
+#define OCD_ID_LSDDRP_XEA3		0x00000400
+
+/*  Power Status register.  NOTE:  different bit positions in JTAG vs. ERI/APB !!  */
+/*  ERI/APB:  */
+#define PWRSTAT_CORE_DOMAIN_ON		0x00000001	/* set if core is powered on */
+#define PWRSTAT_CORE_DOMAIN_ON_SHIFT		0
+#define PWRSTAT_WAKEUP_RESET		0x00000002	/* [ERI only] 0=cold start, 1=PSO wakeup */
+#define PWRSTAT_WAKEUP_RESET_SHIFT		1
+#define PWRSTAT_CACHES_LOST_POWER	0x00000004	/* [ERI only] set if caches (/localmems?) lost power */
+							/* FIXME: does this include local memories? */
+#define PWRSTAT_CACHES_LOST_POWER_SHIFT		2
+#define PWRSTAT_CORE_STILL_NEEDED	0x00000010	/* set if others keeping core awake */
+#define PWRSTAT_CORE_STILL_NEEDED_SHIFT		4
+#define PWRSTAT_MEM_DOMAIN_ON		0x00000100	/* set if memory domain is powered on */
+#define PWRSTAT_MEM_DOMAIN_ON_SHIFT		8
+#define PWRSTAT_DEBUG_DOMAIN_ON		0x00001000	/* set if debug domain is powered on */
+#define PWRSTAT_DEBUG_DOMAIN_ON_SHIFT		12
+#define PWRSTAT_ALL_ON			(PWRSTAT_CORE_DOMAIN_ON | PWRSTAT_MEM_DOMAIN_ON | PWRSTAT_DEBUG_DOMAIN_ON)
+#define PWRSTAT_CORE_WAS_RESET		0x00010000	/* [APB only] set if core got reset */
+#define PWRSTAT_CORE_WAS_RESET_SHIFT		16
+#define PWRSTAT_DEBUG_WAS_RESET		0x10000000	/* set if debug module got reset */
+#define PWRSTAT_DEBUG_WAS_RESET_SHIFT		28
+/*  JTAG:  */
+#define J_PWRSTAT_CORE_DOMAIN_ON	0x01		/* set if core is powered on */
+#define J_PWRSTAT_MEM_DOMAIN_ON		0x02		/* set if memory domain is powered on */
+#define J_PWRSTAT_DEBUG_DOMAIN_ON	0x04		/* set if debug domain is powered on */
+#define J_PWRSTAT_ALL_ON		(J_PWRSTAT_CORE_DOMAIN_ON | J_PWRSTAT_MEM_DOMAIN_ON | J_PWRSTAT_DEBUG_DOMAIN_ON)
+#define J_PWRSTAT_CORE_STILL_NEEDED	0x08		/* set if others keeping core awake */
+#define J_PWRSTAT_CORE_WAS_RESET	0x10		/* set if core got reset */
+#define J_PWRSTAT_DEBUG_WAS_RESET	0x40		/* set if debug module got reset */
+
+/*  Power Control register.  NOTE:  different bit positions in JTAG vs. ERI/APB !!  */
+/*  ERI/APB:  */
+#define PWRCTL_CORE_SHUTOFF		0x00000001	/* [ERI only] core wants to shut off on WAITI */
+#define PWRCTL_CORE_SHUTOFF_SHIFT		0
+#define PWRCTL_CORE_WAKEUP		0x00000001	/* [APB only] set to force core to stay powered on */
+#define PWRCTL_CORE_WAKEUP_SHIFT		0
+#define PWRCTL_MEM_WAKEUP		0x00000100	/* set to force memory domain to stay powered on */
+#define PWRCTL_MEM_WAKEUP_SHIFT			8
+#define PWRCTL_DEBUG_WAKEUP		0x00001000	/* set to force debug domain to stay powered on */
+#define PWRCTL_DEBUG_WAKEUP_SHIFT		12
+#define PWRCTL_ALL_ON			(PWRCTL_CORE_WAKEUP | PWRCTL_MEM_WAKEUP | PWRCTL_DEBUG_WAKEUP)
+#define PWRCTL_CORE_RESET		0x00010000	/* [APB only] set to assert core reset */
+#define PWRCTL_CORE_RESET_SHIFT			16
+#define PWRCTL_DEBUG_RESET		0x10000000	/* set to assert debug module reset */
+#define PWRCTL_DEBUG_RESET_SHIFT		28
+/*  JTAG:  */
+#define J_PWRCTL_CORE_WAKEUP		0x01		/* set to force core to stay powered on */
+#define J_PWRCTL_MEM_WAKEUP		0x02		/* set to force memory domain to stay powered on */
+#define J_PWRCTL_DEBUG_WAKEUP		0x04		/* set to force debug domain to stay powered on */
+#define J_DEBUG_USE			0x80		/*  */
+#define J_PWRCTL_ALL_ON			(J_DEBUG_USE | J_PWRCTL_CORE_WAKEUP | J_PWRCTL_MEM_WAKEUP | J_PWRCTL_DEBUG_WAKEUP)
+#define J_PWRCTL_DEBUG_ON		J_DEBUG_USE | J_PWRCTL_DEBUG_WAKEUP
+#define J_PWRCTL_CORE_RESET		0x10		/* set to assert core reset */
+#define J_PWRCTL_DEBUG_RESET		0x40		/* set to assert debug module reset */
+
+#define J_PWRCTL_WRITE_MASK		0xFF
+#define J_PWRSTAT_WRITE_MASK		0xFF
+
+#define PWRCTL_WRITE_MASK		~0
+#define PWRSTAT_WRITE_MASK		~0
+
+/************  The following are only relevant for JTAG, so perhaps belong in OCD only  **************/
+
+/*  XDM 5-bit JTAG Instruction Register (IR) values:  */
+#define XDM_IR_PWRCTL		0x08	/* select 8-bit Power/Reset Control (PRC) */
+#define XDM_IR_PWRSTAT		0x09	/* select 8-bit Power/Reset Status (PRS) */
+#define XDM_IR_NAR_SEL		0x1c	/* select altern. 8-bit NAR / 32-bit NDR (Nexus-style) */
+#define XDM_IR_NDR_SEL		0x1d	/* select altern. 32-bit NDR / 8-bit NAR
+					   (FIXME - functionality not yet in HW) */
+#define XDM_IR_IDCODE		0x1e	/* select 32-bit JTAG IDCODE */
+#define XDM_IR_BYPASS		0x1f	/* select 1-bit bypass */
+
+#define XDM_IR_WIDTH		5	/* width of IR for Xtensa TAP */
+
+/*  NAR register bits:  */
+#define XDM_NAR_WRITE		0x01
+#define XDM_NAR_ADDR_MASK	0xFE
+#define XDM_NAR_ADDR_SHIFT	1
+
+#define XDM_NAR_BUSY		0x02
+#define XDM_NAR_ERROR		0x01
+
+#define NEXUS_DIR_READ	0x00
+#define	NEXUS_DIR_WRITE	0x01
+
+/************  Define DCR register bits  **************/
+
+#define DCR_ENABLEOCD		0x0000001
+#define DCR_ENABLEOCD_SHIFT		0
+#define DCR_DEBUG_INT		0x0000002
+#define DCR_DEBUG_INT_SHIFT		1
+#define DCR_DEBUG_OVERRIDE	0x0000004  //ER or later
+#define DCR_DEBUG_OVERRIDE_SHIFT	2
+#define DCR_DEBUG_SS_REQ	0x0000008
+#define DCR_DEBUG_SS_REQ_SHIFT		3
+#define DCR_DEBUG_OVERRIDE_CW	0x0000010  //RD and earlier
+#define DCR_DEBUG_OVERRIDE_CW_SHIFT	4
+#define DCR_MASK_NMI		0x0000020
+#define DCR_MASK_NMI_SHIFT		5
+#define DCR_STEP_ENABLE		0x0000040
+#define DCR_STEP_ENABLE_SHIFT		6
+#define DCR_BREAK_IN_EN		0x0010000
+#define DCR_BREAK_IN_EN_SHIFT		16
+#define DCR_BREAK_OUT_EN	0x0020000
+#define DCR_BREAK_OUT_EN_SHIFT		17
+#define DCR_DEBUG_INT_EN	0x0040000
+#define DCR_DEBUG_INT_EN_SHIFT		18
+#define DCR_DBG_SW_ACTIVE	0x0100000
+#define DCR_DBG_SW_ACTIVE_SHIFT		20
+#define DCR_STALL_IN_EN		0x0200000
+#define DCR_STALL_IN_EN_SHIFT		21
+#define DCR_DEBUG_OUT_EN	0x0400000
+#define DCR_DEBUG_OUT_EN_SHIFT		22
+#define DCR_BREAK_OUT_ITO	0x1000000
+#define DCR_STALL_OUT_ITO	0x2000000
+#define DCR_STALL_OUT_ITO_SHIFT		25
+
+/************  Define DSR register bits  **************/
+
+#define DOSR_STOP_CAUSE_SHIFT	5
+#define DOSR_STOP_CAUSE_MASK	0xF
+
+#define DOSR_EXECDONE_SHIFT	0
+#define DOSR_EXECDONE_ER	0x01
+#define DOSR_EXECDONE_SHIFT	0
+#define DOSR_EXCEPTION_ER	0x02
+#define DOSR_EXCEPTION_SHIFT	1
+#define DOSR_BUSY		0x04
+#define DOSR_BUSY_SHIFT		2
+#define DOSR_OVERRUN		0x08
+#define DOSR_OVERRUN_SHIFT	3
+#define DOSR_INOCDMODE_ER	0x10
+#define DOSR_INOCDMODE_SHIFT	4
+#define DOSR_CORE_WROTE_DDR_ER		0x400
+#define DOSR_CORE_WROTE_DDR_SHIFT	10
+#define DOSR_CORE_READ_DDR_ER		0x800
+#define DOSR_CORE_READ_DDR_SHIFT	11
+#define DOSR_HOST_WROTE_DDR_ER		0x4000
+#define DOSR_HOST_WROTE_DDR_SHIFT	14
+#define DOSR_HOST_READ_DDR_ER		0x8000
+#define DOSR_HOST_READ_DDR_SHIFT	15
+
+#define DOSR_DEBUG_PEND_BIN		0x10000
+#define DOSR_DEBUG_PEND_HOST		0x20000
+#define DOSR_DEBUG_PEND_TRAX		0x40000
+#define DOSR_DEBUG_BIN		 	0x100000
+#define DOSR_DEBUG_HOST			0x200000
+#define DOSR_DEBUG_TRAX			0x400000
+#define DOSR_DEBUG_PEND_BIN_SHIFT	16
+#define DOSR_DEBUG_PEND_HOST_SHIFT	17
+#define DOSR_DEBUG_PEND_TRAX_SHIFT	18
+#define DOSR_DEBUG_BREAKIN              0x0100000
+#define DOSR_DEBUG_BREAKIN_SHIFT        20
+#define DOSR_DEBUG_HOST_SHIFT		21
+#define DOSR_DEBUG_TRAX_SHIFT		22
+
+#define DOSR_DEBUG_STALL		0x1000000
+#define DOSR_DEBUG_STALL_SHIFT		24
+
+#define DOSR_CORE_ON			0x40000000
+#define DOSR_CORE_ON_SHIFT		30
+#define DOSR_DEBUG_ON			0x80000000
+#define DOSR_DEBUG_ON_SHIFT		31
+
+/********** Performance monitor registers bits **********/
+
+#define PERF_PMG_ENABLE                 0x00000001 /* global enable bit */
+#define PERF_PMG_ENABLE_SHIFT           0
+
+#define PERF_PMCTRL_INT_ENABLE          0x00000001 /* assert interrupt on overflow */
+#define PERF_PMCTRL_INT_ENABLE_SHIFT    0
+#define PERF_PMCTRL_KRNLCNT             0x00000008 /* ignore TRACELEVEL */
+#define PERF_PMCTRL_KRNLCNT_SHIFT       3
+#define PERF_PMCTRL_TRACELEVEL          0x000000F0 /* count when CINTLEVEL <= TRACELEVEL */
+#define PERF_PMCTRL_TRACELEVEL_SHIFT    4
+#define PERF_PMCTRL_SELECT              0x00001F00 /* events group selector */
+#define PERF_PMCTRL_SELECT_SHIFT        8
+#define PERF_PMCTRL_MASK                0xFFFF0000 /* events mask */
+#define PERF_PMCTRL_MASK_SHIFT          16
+
+#define PERF_PMSTAT_OVERFLOW            0x00000001 /* counter overflowed */
+#define PERF_PMSTAT_OVERFLOW_SHIFT      0
+#define PERF_PMSTAT_INT                 0x00000010 /* interrupt asserted */
+#define PERF_PMSTAT_INT_SHIFT           4
+
+#if defined (USE_XDM_REGNAME) || defined (USE_DAP_REGNAME)
+/*  Describes XDM register:  */
+typedef struct {
+    int    reg;
+    char*  name;
+} regdef_t;
+
+/*
+ *  Returns the name of the specified XDM register number,
+ *  or simply "???" if the register number is not recognized.
+ *  FIXME - requires -1 as the last entry - change to compare the name to ???
+ *  or even better, make the code above to work.
+ */
+static char*
+regname(regdef_t* list, int reg)
+{
+  int i = 0;
+  while (list[i].reg != -1) {
+    if (list[i].reg == reg)
+      break;
+    i++;
+  }
+  return list[i].name;
+}
+
+#if defined (USE_XDM_REGNAME)
+static regdef_t xdm_reglist[] =
+{
+  {XDM_OCD_DSR        ,"DOSR"    },
+  {XDM_OCD_DDR        ,"DDR"     },
+  {XDM_OCD_DDREXEC    ,"DDREXEC" },
+  {XDM_OCD_DIR0EXEC   ,"DIR0EXEC"},
+  {XDM_OCD_DCR_CLR    ,"DCR_CLR" },
+  {XDM_OCD_DCR_SET    ,"DCR_SET" },
+  {XDM_TRAX_CONTROL   ,"CONTROL" },
+  {XDM_TRAX_STATUS    ,"STATUS"  },
+  {XDM_TRAX_DATA      ,"DATA"    },
+  {XDM_TRAX_ADDRESS   ,"ADDRESS" },
+
+  {XDM_TRAX_ID        ,"TRAX_ID"      },
+
+  {XDM_TRAX_TRIGGER   ,"TRIGGER PC"   },
+  {XDM_TRAX_MATCH     ,"PC MATCH"     },
+  {XDM_TRAX_DELAY     ,"DELAY CNT."   },
+  {XDM_TRAX_STARTADDR ,"START ADDRESS"},
+  {XDM_TRAX_ENDADDR   ,"END ADDRESS"  },
+  {XDM_TRAX_DEBUGPC   ,"DEBUG PC"  },
+  {XDM_TRAX_P4CHANGE  ,"P4 CHANGE"    },
+  {XDM_TRAX_P4REV     ,"P4 REV."      },
+  {XDM_TRAX_P4DATE    ,"P4 DATE"      },
+  {XDM_TRAX_P4TIME    ,"P4 TIME"      },
+  {XDM_TRAX_PDSTATUS  ,"PD STATUS"    },
+  {XDM_TRAX_PDDATA    ,"PD DATA"      },
+  {XDM_TRAX_STOP_PC   ,"STOP PC"      },
+  {XDM_TRAX_STOP_ICNT ,"STOP ICNT"    },
+  {XDM_TRAX_MSG_STATUS,"MSG STAT."    },
+  {XDM_TRAX_FSM_STATUS,"FSM STAT."    },
+  {XDM_TRAX_IB_STATUS ,"IB STAT."     },
+
+  {XDM_OCD_ID         ,"OCD_ID"  },
+  {XDM_OCD_DIR0       ,"DIR0"    },
+  {XDM_OCD_DIR1       ,"DIR1"    },
+  {XDM_OCD_DIR2       ,"DIR2"    },
+  {XDM_OCD_DIR3       ,"DIR3"    },
+  {XDM_OCD_DIR4       ,"DIR4"    },
+  {XDM_OCD_DIR5       ,"DIR5"    },
+  {XDM_OCD_DIR6       ,"DIR6"    },
+  {XDM_OCD_DIR7       ,"DIR7"    },
+
+  {XDM_PERF_PMG       ,"PMG"    },
+  {XDM_PERF_INTPC     ,"INTPC"  },
+  {XDM_PERF_PM0       ,"PM0 "   },
+  {XDM_PERF_PM1       ,"PM1 "   },
+  {XDM_PERF_PM2       ,"PM2 "   },
+  {XDM_PERF_PM3       ,"PM3 "   },
+  {XDM_PERF_PM4       ,"PM4 "   },
+  {XDM_PERF_PM5       ,"PM5 "   },
+  {XDM_PERF_PM6       ,"PM6 "   },
+  {XDM_PERF_PM7       ,"PM7 "   },
+  {XDM_PERF_PMCTRL0   ,"PMCTRL0"},
+  {XDM_PERF_PMCTRL1   ,"PMCTRL1"},
+  {XDM_PERF_PMCTRL2   ,"PMCTRL2"},
+  {XDM_PERF_PMCTRL3   ,"PMCTRL3"},
+  {XDM_PERF_PMCTRL4   ,"PMCTRL4"},
+  {XDM_PERF_PMCTRL5   ,"PMCTRL5"},
+  {XDM_PERF_PMCTRL6   ,"PMCTRL6"},
+  {XDM_PERF_PMCTRL7   ,"PMCTRL7"},
+  {XDM_PERF_PMSTAT0   ,"PMSTAT0"},
+  {XDM_PERF_PMSTAT1   ,"PMSTAT1"},
+  {XDM_PERF_PMSTAT2   ,"PMSTAT2"},
+  {XDM_PERF_PMSTAT3   ,"PMSTAT3"},
+  {XDM_PERF_PMSTAT4   ,"PMSTAT4"},
+  {XDM_PERF_PMSTAT5   ,"PMSTAT5"},
+  {XDM_PERF_PMSTAT6   ,"PMSTAT6"},
+  {XDM_PERF_PMSTAT7   ,"PMSTAT7"},
+
+  {XDM_MISC_PWRCTL    ,"PWRCTL"  },
+  {XDM_MISC_PWRSTAT   ,"PWRSTAT" },
+  {XDM_MISC_ERISTAT   ,"ERISTAT" },
+  {XDM_MISC_DATETIME  ,"DATETIME"},
+  {XDM_MISC_UBID      ,"UBID"    },
+  {XDM_MISC_CID       ,"CID"     },
+
+  {XDM_CS_ITCTRL      ,"ITCTRL"     },
+  {XDM_CS_CLAIMSET    ,"CLAIMSET"   },
+  {XDM_CS_CLAIMCLR    ,"CLAIMCLR"   },
+  {XDM_CS_LOCK_ACCESS ,"LOCK_ACCESS"},
+  {XDM_CS_LOCK_STATUS ,"LOCK_STATUS"},
+  {XDM_CS_AUTH_STATUS ,"AUTH_STATUS"},
+  {XDM_CS_DEV_ID      ,"DEV_ID"     },
+  {XDM_CS_DEV_TYPE    ,"DEV_TYPE"   },
+  {XDM_CS_PER_ID4     ,"PER_ID4"    },
+  {XDM_CS_PER_ID5     ,"PER_ID5"    },
+  {XDM_CS_PER_ID6     ,"PER_ID6"    },
+  {XDM_CS_PER_ID7     ,"PER_ID7"    },
+  {XDM_CS_PER_ID0     ,"PER_ID0"    },
+  {XDM_CS_PER_ID1     ,"PER_ID1"    },
+  {XDM_CS_PER_ID2     ,"PER_ID2"    },
+  {XDM_CS_PER_ID3     ,"PER_ID3"    },
+  {XDM_CS_COMP_ID0    ,"COMP_ID0"   },
+  {XDM_CS_COMP_ID1    ,"COMP_ID1"   },
+  {XDM_CS_COMP_ID2    ,"COMP_ID2"   },
+  {XDM_CS_COMP_ID3    ,"COMP_ID3"   },
+  {-1                 ,"???"        },
+};
+#endif
+
+#endif
+
+#endif /* _XDM_REGS_H_ */
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/xt_perf_consts.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xt_perf_consts.h
new file mode 100644
index 00000000000..a713ac9c191
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xt_perf_consts.h
@@ -0,0 +1,325 @@
+/*
+ * Copyright (c) 2012 by Tensilica Inc. ALL RIGHTS RESERVED.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef __XT_PERF_CONSTS_H__
+#define __XT_PERF_CONSTS_H__
+
+#include <xtensa/config/core.h>
+
+/*
+ * Performance monitor counter selectors
+ */
+
+#define XTPERF_CNT_COMMITTED_INSN        0x8002  /* Instructions committed          */
+#define XTPERF_CNT_BRANCH_PENALTY        0x8003  /* Branch penalty cycles           */
+#define XTPERF_CNT_PIPELINE_INTERLOCKS   0x8004  /* Pipeline interlocks cycles      */
+#define XTPERF_CNT_ICACHE_MISSES         0x8005  /* ICache misses penalty in cycles */
+#define XTPERF_CNT_DCACHE_MISSES         0x8006  /* DCache misses penalty in cycles */
+
+#define XTPERF_CNT_CYCLES         0  /* Count cycles */
+#define XTPERF_CNT_OVERFLOW       1  /* Overflow of counter n-1 (assuming this is counter n) */
+#define XTPERF_CNT_INSN           2  /* Successfully completed instructions */
+#define XTPERF_CNT_D_STALL        3  /* Data-related GlobalStall cycles */
+#define XTPERF_CNT_I_STALL        4  /* Instruction-related and other GlobalStall cycles */
+#define XTPERF_CNT_EXR            5  /* Exceptions and pipeline replays */
+#define XTPERF_CNT_BUBBLES        6  /* Hold and other bubble cycles */
+#define XTPERF_CNT_I_TLB          7  /* Instruction TLB Accesses (per instruction retiring) */
+#define XTPERF_CNT_I_MEM          8  /* Instruction memory accesses (per instruction retiring) */
+#define XTPERF_CNT_D_TLB          9  /* Data TLB accesses */
+#define XTPERF_CNT_D_LOAD_U1      10 /* Data memory load instruction (load-store unit 1) */
+#define XTPERF_CNT_D_STORE_U1     11 /* Data memory store instruction (load-store unit 1) */
+#define XTPERF_CNT_D_ACCESS_U1    12 /* Data memory accesses (load, store, S32C1I, etc; load-store unit 1) */
+#define XTPERF_CNT_D_LOAD_U2      13 /* Data memory load instruction (load-store unit 2) */
+#define XTPERF_CNT_D_STORE_U2     14 /* Data memory store instruction (load-store unit 2) */
+#define XTPERF_CNT_D_ACCESS_U2    15 /* Data memory accesses (load, store, S32C1I, etc; load-store unit 2) */
+#define XTPERF_CNT_D_LOAD_U3      16 /* Data memory load instruction (load-store unit 3) */
+#define XTPERF_CNT_D_STORE_U3     17 /* Data memory store instruction (load-store unit 3) */
+#define XTPERF_CNT_D_ACCESS_U3    18 /* Data memory accesses (load, store, S32C1I, etc; load-store unit 3) */
+#define XTPERF_CNT_MULTIPLE_LS    22 /* Multiple Load/Store */
+#define XTPERF_CNT_OUTBOUND_PIF   23 /* Outbound PIF transactions */
+#define XTPERF_CNT_INBOUND_PIF    24 /* Inbound PIF transactions */
+#define XTPERF_CNT_PREFETCH       26 /* Prefetch events */
+
+#if XCHAL_HW_VERSION >= 270004
+
+#define XTPERF_CNT_IDMA           27 /* iDMA counters */
+#define XTPERF_CNT_INSN_LENGTH    28 /* Instruction length counters */
+
+#endif /* HW version >= 270004 */
+
+/*
+ * Masks for each of the selector listed above
+ */
+
+/* XTPERF_CNT_COMMITTED_INSN selector mask */
+
+#define XTPERF_MASK_COMMITTED_INSN               0x0001
+
+/* XTPERF_CNT_BRANCH_PENALTY selector mask */
+
+#define XTPERF_MASK_BRANCH_PENALTY               0x0001
+
+/* XTPERF_CNT_PIPELINE_INTERLOCKS selector mask */
+
+#define XTPERF_MASK_PIPELINE_INTERLOCKS          0x0001
+
+/* XTPERF_CNT_ICACHE_MISSES selector mask */
+
+#define XTPERF_MASK_ICACHE_MISSES                0x0001
+
+/* XTPERF_CNT_DCACHE_MISSES selector mask */
+
+#define XTPERF_MASK_DCACHE_MISSES                0x0001
+
+/* XTPERF_CNT_CYCLES selector mask */
+
+#define XTPERF_MASK_CYCLES                       0x0001
+
+/* XTPERF_CNT_OVERFLOW selector mask */
+
+#define XTPERF_MASK_OVERFLOW                     0x0001
+
+/*
+ * XTPERF_CNT_INSN selector mask
+ */
+
+#define XTPERF_MASK_INSN_ALL                     0x8DFF
+
+#define XTPERF_MASK_INSN_JX                      0x0001 /* JX */
+#define XTPERF_MASK_INSN_CALLX                   0x0002 /* CALLXn */
+#define XTPERF_MASK_INSN_RET                     0x0004 /* call return i.e. RET, RETW */
+#define XTPERF_MASK_INSN_RF                      0x0008 /* supervisor return i.e. RFDE, RFE, RFI, RFWO, RFWU */
+#define XTPERF_MASK_INSN_BRANCH_TAKEN            0x0010 /* Conditional branch taken, or loopgtz/loopnez skips loop */
+#define XTPERF_MASK_INSN_J                       0x0020 /* J */
+#define XTPERF_MASK_INSN_CALL                    0x0040 /* CALLn */
+#define XTPERF_MASK_INSN_BRANCH_NOT_TAKEN        0x0080 /* Conditional branch fall through (aka. not-taken branch) */
+#define XTPERF_MASK_INSN_LOOP_TAKEN              0x0100 /* Loop instr falls into loop (aka. taken loop) */
+#define XTPERF_MASK_INSN_LOOP_BEG                0x0400 /* Loopback taken to LBEG */
+#define XTPERF_MASK_INSN_LOOP_END                0x0800 /* Loopback falls through to LEND */
+#define XTPERF_MASK_INSN_NON_BRANCH              0x8000 /* Non-branch instruction (aka. non-CTI) */
+
+/*
+ * XTPERF_CNT_D_STALL selector mask
+ */
+
+#define XTPERF_MASK_D_STALL_ALL                  0x01FE
+
+#define XTPERF_MASK_D_STALL_STORE_BUF_FULL       0x0002 /* Store buffer full stall */
+#define XTPERF_MASK_D_STALL_STORE_BUF_CONFLICT   0x0004 /* Store buffer conflict stall */
+#define XTPERF_MASK_D_STALL_CACHE_MISS           0x0008 /* DCache-miss stall */
+#define XTPERF_MASK_D_STALL_BUSY                 0x0010 /* Data RAM/ROM/XLMI busy stall */
+#define XTPERF_MASK_D_STALL_IN_PIF               0x0020 /* Data inbound-PIF request stall (incl s32c1i) */
+#define XTPERF_MASK_D_STALL_MHT_LOOKUP           0x0040 /* MHT lookup stall */
+#define XTPERF_MASK_D_STALL_UNCACHED_LOAD        0x0080 /* Uncached load stall (included in MHT lookup stall) */
+#define XTPERF_MASK_D_STALL_BANK_CONFLICT        0x0100 /* Bank-conflict stall */
+
+/*
+ * XTPERF_CNT_I_STALL selector mask
+ */
+
+#define XTPERF_MASK_I_STALL_ALL                  0x01FF
+
+#define XTPERF_MASK_I_STALL_CACHE_MISS           0x0001 /* ICache-miss stall */
+#define XTPERF_MASK_I_STALL_BUSY                 0x0002 /* Instruction RAM/ROM busy stall */
+#define XTPERF_MASK_I_STALL_IN_PIF               0x0004 /* Instruction RAM inbound-PIF request stall */
+#define XTPERF_MASK_I_STALL_TIE_PORT             0x0008 /* TIE port stall */
+#define XTPERF_MASK_I_STALL_EXTERNAL_SIGNAL      0x0010 /* External RunStall signal status */
+#define XTPERF_MASK_I_STALL_UNCACHED_FETCH       0x0020 /* Uncached fetch stall */
+#define XTPERF_MASK_I_STALL_FAST_L32R            0x0040 /* FastL32R stall */
+#define XTPERF_MASK_I_STALL_ITERATIVE_MUL        0x0080 /* Iterative multiply stall */
+#define XTPERF_MASK_I_STALL_ITERATIVE_DIV        0x0100 /* Iterative divide stall */
+
+/*
+ * XTPERF_CNT_EXR selector mask
+ */
+
+#define XTPERF_MASK_EXR_ALL                      0x01FF
+
+#define XTPERF_MASK_EXR_REPLAYS                  0x0001 /* Other Pipeline Replay (i.e. excludes $ miss etc.) */
+#define XTPERF_MASK_EXR_LEVEL1_INT               0x0002 /* Level-1 interrupt */
+#define XTPERF_MASK_EXR_LEVELH_INT               0x0004 /* Greater-than-level-1 interrupt */
+#define XTPERF_MASK_EXR_DEBUG                    0x0008 /* Debug exception */
+#define XTPERF_MASK_EXR_NMI                      0x0010 /* NMI */
+#define XTPERF_MASK_EXR_WINDOW                   0x0020 /* Window exception */
+#define XTPERF_MASK_EXR_ALLOCA                   0x0040 /* Alloca exception */
+#define XTPERF_MASK_EXR_OTHER                    0x0080 /* Other exceptions */
+#define XTPERF_MASK_EXR_MEM_ERR                  0x0100 /* HW-corrected memory error */
+
+/*
+ * XTPERF_CNT_BUBBLES selector mask
+ */
+
+#define XTPERF_MASK_BUBBLES_ALL                   0x01FD
+
+#define XTPERF_MASK_BUBBLES_PSO                   0x0001 /* Processor domain PSO bubble */
+#define XTPERF_MASK_BUBBLES_R_HOLD_D_CACHE_MISS   0x0004 /* R hold caused by DCache miss */
+#define XTPERF_MASK_BUBBLES_R_HOLD_STORE_RELEASE  0x0008 /* R hold caused by Store release */
+#define XTPERF_MASK_BUBBLES_R_HOLD_REG_DEP        0x0010 /* R hold caused by register dependency */
+#define XTPERF_MASK_BUBBLES_R_HOLD_WAIT           0x0020 /* R hold caused by MEMW, EXTW or EXCW */
+#define XTPERF_MASK_BUBBLES_R_HOLD_HALT           0x0040 /* R hold caused by Halt instruction (TX only) */
+#define XTPERF_MASK_BUBBLES_CTI                   0x0080 /* CTI bubble (e.g. branch delay slot) */
+#define XTPERF_MASK_BUBBLES_WAITI                 0x0100 /* WAITI bubble */
+
+/*
+ * XTPERF_CNT_I_TLB selector mask
+ */
+
+#define XTPERF_MASK_I_TLB_ALL                     0x000F
+
+#define XTPERF_MASK_I_TLB_HITS                    0x0001 /* Hit */
+#define XTPERF_MASK_I_TLB_REPLAYS                 0x0002 /* Replay of instruction due to ITLB miss */
+#define XTPERF_MASK_I_TLB_REFILLS                 0x0004 /* HW-assisted TLB Refill completes */
+#define XTPERF_MASK_I_TLB_MISSES                  0x0008 /* ITLB Miss Exception */
+
+/*
+ * XTPERF_CNT_I_MEM selector mask
+ */
+
+#define XTPERF_MASK_I_MEM_ALL                     0x000F
+
+#define XTPERF_MASK_I_MEM_CACHE_HITS              0x0001 /* ICache Hit */
+#define XTPERF_MASK_I_MEM_CACHE_MISSES            0x0002 /* ICache Miss (includes uncached) */
+#define XTPERF_MASK_I_MEM_IRAM                    0x0004 /* InstRAM or InstROM */
+#define XTPERF_MASK_I_MEM_BYPASS                  0x0008 /* Bypass (i.e. uncached) fetch */
+
+/*
+ * XTPERF_CNT_D_TLB selector mask
+ */
+
+#define XTPERF_MASK_D_TLB_ALL                     0x000F
+
+#define XTPERF_MASK_D_TLB_HITS                    0x0001 /* Hit */
+#define XTPERF_MASK_D_TLB_REPLAYS                 0x0002 /* Replay of instruction due to DTLB miss */
+#define XTPERF_MASK_D_TLB_REFILLS                 0x0004 /* HW-assisted TLB Refill completes */
+#define XTPERF_MASK_D_TLB_MISSES                  0x0008 /* DTLB Miss Exception */
+
+/*
+ * XTPERF_CNT_D_LOAD_U* selector mask
+ */
+
+#define XTPERF_MASK_D_LOAD_ALL                    0x000F
+
+#define XTPERF_MASK_D_LOAD_CACHE_HITS             0x0001 /* Cache Hit */
+#define XTPERF_MASK_D_LOAD_CACHE_MISSES           0x0002 /* Cache Miss */
+#define XTPERF_MASK_D_LOAD_LOCAL_MEM              0x0004 /* Local memory hit */
+#define XTPERF_MASK_D_LOAD_BYPASS                 0x0008 /* Bypass (i.e. uncached) load */
+
+/*
+ * XTPERF_CNT_D_STORE_U* selector mask
+ */
+
+#define XTPERF_MASK_D_STORE_ALL                    0x000F
+
+#define XTPERF_MASK_D_STORE_CACHE_HITS             0x0001 /* DCache Hit */
+#define XTPERF_MASK_D_STORE_CACHE_MISSES           0x0002 /* DCache Miss */
+#define XTPERF_MASK_D_STORE_LOCAL_MEM              0x0004 /* Local memory hit */
+#define XTPERF_MASK_D_STORE_PIF                    0x0008 /* PIF Store */
+
+/*
+ * XTPERF_CNT_D_ACCESS_U* selector mask
+ */
+
+#define XTPERF_MASK_D_ACCESS_ALL                   0x000F
+
+#define XTPERF_MASK_D_ACCESS_CACHE_MISSES          0x0001 /* DCache Miss */
+#define XTPERF_MASK_D_ACCESS_HITS_SHARED           0x0002 /* Hit Shared */
+#define XTPERF_MASK_D_ACCESS_HITS_EXCLUSIVE        0x0004 /* Hit Exclusive */
+#define XTPERF_MASK_D_ACCESS_HITS_MODIFIED         0x0008 /* Hit Modified */
+
+/*
+ * XTPERF_CNT_MULTIPLE_LS selector mask
+ */
+
+#define XTPERF_MASK_MULTIPLE_LS_ALL                0x003F
+
+#define XTPERF_MASK_MULTIPLE_LS_0S_0L              0x0001 /* 0 stores and 0 loads */
+#define XTPERF_MASK_MULTIPLE_LS_0S_1L              0x0002 /* 0 stores and 1 loads */
+#define XTPERF_MASK_MULTIPLE_LS_1S_0L              0x0004 /* 1 stores and 0 loads */
+#define XTPERF_MASK_MULTIPLE_LS_1S_1L              0x0008 /* 1 stores and 1 loads */
+#define XTPERF_MASK_MULTIPLE_LS_0S_2L              0x0010 /* 0 stores and 2 loads */
+#define XTPERF_MASK_MULTIPLE_LS_2S_0L              0x0020 /* 2 stores and 0 loads */
+
+/*
+ * XTPERF_CNT_OUTBOUND_PIF selector mask
+ */
+
+#define XTPERF_MASK_OUTBOUND_PIF_ALL               0x0003
+
+#define XTPERF_MASK_OUTBOUND_PIF_CASTOUT           0x0001 /* Castout */
+#define XTPERF_MASK_OUTBOUND_PIF_PREFETCH          0x0002 /* Prefetch */
+
+/*
+ * XTPERF_CNT_INBOUND_PIF selector mask
+ */
+
+#define XTPERF_MASK_INBOUND_PIF_ALL                0x0003
+
+#define XTPERF_MASK_INBOUND_PIF_I_DMA              0x0001 /* Instruction DMA */
+#define XTPERF_MASK_INBOUND_PIF_D_DMA              0x0002 /* Data DMA */
+
+/*
+ * XTPERF_CNT_PREFETCH selector mask
+ */
+
+#define XTPERF_MASK_PREFETCH_ALL                   0x002F
+
+#define XTPERF_MASK_PREFETCH_I_HIT                 0x0001 /* I prefetch-buffer-lookup hit */
+#define XTPERF_MASK_PREFETCH_D_HIT                 0x0002 /* D prefetch-buffer-lookup hit */
+#define XTPERF_MASK_PREFETCH_I_MISS                0x0004 /* I prefetch-buffer-lookup miss */
+#define XTPERF_MASK_PREFETCH_D_MISS                0x0008 /* D prefetch-buffer-lookup miss */
+#define XTPERF_MASK_PREFETCH_D_L1_FILL             0x0020 /* Fill directly to DCache L1 */
+
+#if XCHAL_HW_VERSION >= 270004
+
+/*
+ * XTPERF_CNT_IDMA selector mask
+ */
+
+#define XTPERF_MASK_IDMA_ALL                       0x0001
+
+#define XTPERF_MASK_IDMA_ACTIVE_CYCLES             0x0001 /* Active Cycles */
+
+/*
+ * XTPERF_CNT_INSN_LENGTH selector mask
+ */
+
+#define XTPERF_MASK_INSN_LENGTH_ALL                0x7FFF
+
+#define XTPERF_MASK_INSN_LENGTH_16                 0x0001 /* 16-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_24                 0x0002 /* 24-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_32                 0x0004 /* 32-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_40                 0x0008 /* 40-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_48                 0x0010 /* 48-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_56                 0x0020 /* 56-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_64                 0x0040 /* 64-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_72                 0x0080 /* 72-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_80                 0x0100 /* 80-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_88                 0x0200 /* 88-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_96                 0x0400 /* 96-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_104                0x0800 /* 104-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_112                0x1000 /* 112-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_120                0x2000 /* 120-bit instruction length */
+#define XTPERF_MASK_INSN_LENGTH_128                0x4000 /* 128-bit instruction length */
+
+#endif /* HW version >= 270004 */
+
+#endif /* __XT_PERF_CONSTS_H__ */
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa-libdb-macros.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa-libdb-macros.h
new file mode 100644
index 00000000000..85b14ada987
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa-libdb-macros.h
@@ -0,0 +1,160 @@
+/*
+ *  xtensa-libdb-macros.h
+ */
+
+/* $Id: //depot/rel/Foxhill/dot.9/Xtensa/Software/libdb/xtensa-libdb-macros.h#1 $ */
+
+/* Copyright (c) 2004-2008 Tensilica Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
+
+#ifndef __H_LIBDB_MACROS
+#define __H_LIBDB_MACROS
+
+/*
+ *  This header file provides macros used to construct, identify and use
+ *  "target numbers" that are assigned to various types of Xtensa processor
+ *  registers and states.  These target numbers are used by GDB in the remote
+ *  protocol, and are thus used by all GDB debugger agents (targets).
+ *  They are also used in ELF debugger information sections (stabs, dwarf, etc).
+ *
+ *  These macros are separated from xtensa-libdb.h because they are needed
+ *  by certain debugger agents that do not use or have access to libdb,
+ *  e.g. the OCD daemon, RedBoot, XMON, etc.
+ *
+ *  For the time being, for compatibility with certain 3rd party debugger
+ *  software vendors, target numbers are limited to 16 bits.  It is
+ *  conceivable that this will be extended in the future to 32 bits.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef uint32
+ #define uint32	unsigned int
+#endif
+#ifndef int32
+ #define int32	int
+#endif
+
+
+/*
+ *  Macros to form register "target numbers" for various standard registers/states:
+ */
+#define XTENSA_DBREGN_INVALID		-1		/* not a valid target number */
+#define XTENSA_DBREGN_A(n)		(0x0000+(n))	/* address registers a0..a15 */
+#define XTENSA_DBREGN_B(n)		(0x0010+(n))	/* boolean bits b0..b15 */
+#define XTENSA_DBREGN_PC		 0x0020		/* program counter */
+				      /* 0x0021		   RESERVED for use by Tensilica */
+#define XTENSA_DBREGN_BO(n)		(0x0022+(n))	/* boolean octuple-bits bo0..bo1 */
+#define XTENSA_DBREGN_BQ(n)		(0x0024+(n))	/* boolean quadruple-bits bq0..bq3 */
+#define XTENSA_DBREGN_BD(n)		(0x0028+(n))	/* boolean double-bits bd0..bd7 */
+#define XTENSA_DBREGN_F(n)		(0x0030+(n))	/* floating point registers f0..f15 */
+#define XTENSA_DBREGN_VEC(n)		(0x0040+(n))	/* Vectra vec regs v0..v15 */
+#define XTENSA_DBREGN_VSEL(n)		(0x0050+(n))	/* Vectra sel s0..s3 (V1) ..s7 (V2) */
+#define XTENSA_DBREGN_VALIGN(n)		(0x0058+(n))	/* Vectra valign regs u0..u3 */
+#define XTENSA_DBREGN_VCOEFF(n)		(0x005C+(n))	/* Vectra I vcoeff regs c0..c1 */
+				      /* 0x005E..0x005F	   RESERVED for use by Tensilica */
+#define XTENSA_DBREGN_AEP(n)		(0x0060+(n))	/* HiFi2 Audio Engine regs aep0..aep7 */
+#define XTENSA_DBREGN_AEQ(n)		(0x0068+(n))	/* HiFi2 Audio Engine regs aeq0..aeq3 */
+				      /* 0x006C..0x00FF	   RESERVED for use by Tensilica */
+#define XTENSA_DBREGN_AR(n)		(0x0100+(n))	/* physical address regs ar0..ar63
+							   (note: only with window option) */
+				      /* 0x0140..0x01FF	   RESERVED for use by Tensilica */
+#define XTENSA_DBREGN_SREG(n)		(0x0200+(n))	/* special registers 0..255 (core) */
+#define XTENSA_DBREGN_BR		XTENSA_DBREGN_SREG(0x04)	/* all 16 boolean bits, BR */
+#define XTENSA_DBREGN_MR(n)		XTENSA_DBREGN_SREG(0x20+(n))	/* MAC16 registers m0..m3 */
+#define XTENSA_DBREGN_UREG(n)		(0x0300+(n))	/* user registers 0..255 (TIE) */
+				      /* 0x0400..0x0FFF	   RESERVED for use by Tensilica */
+				      /* 0x1000..0x1FFF	   user-defined regfiles */
+				      /* 0x2000..0xEFFF	   other states (and regfiles) */
+#define XTENSA_DBREGN_DBAGENT(n)	(0xF000+(n))	/* non-processor "registers" 0..4095 for
+							   3rd-party debugger agent defined use */
+				      /* > 0xFFFF (32-bit) RESERVED for use by Tensilica */
+/*#define XTENSA_DBREGN_CONTEXT(n)	(0x02000000+((n)<<20))*/	/* add this macro's value to a target
+							   number to identify a specific context 0..31
+							   for context-replicated registers */
+#define XTENSA_DBREGN_MASK		0xFFFF		/* mask of valid target_number bits */
+#define XTENSA_DBREGN_WRITE_SIDE	0x04000000	/* flag to request write half of a register
+							   split into distinct read and write entries
+							   with the same target number (currently only
+							   valid in a couple of libdb API functions;
+							   see xtensa-libdb.h for details) */
+
+/*
+ *  Macros to identify specific ranges of target numbers (formed above):
+ *  NOTE:  any context number (or other upper 12 bits) are considered
+ *  modifiers and are thus stripped out for identification purposes.
+ */
+#define XTENSA_DBREGN_IS_VALID(tn)	(((tn) & ~0xFFFF) == 0)	/* just tests it's 16-bit unsigned */
+#define XTENSA_DBREGN_IS_A(tn)		(((tn) & 0xFFF0)==0x0000)	/* is a0..a15 */
+#define XTENSA_DBREGN_IS_B(tn)		(((tn) & 0xFFF0)==0x0010)	/* is b0..b15 */
+#define XTENSA_DBREGN_IS_PC(tn)		(((tn) & 0xFFFF)==0x0020)	/* is program counter */
+#define XTENSA_DBREGN_IS_BO(tn)		(((tn) & 0xFFFE)==0x0022)	/* is bo0..bo1 */
+#define XTENSA_DBREGN_IS_BQ(tn)		(((tn) & 0xFFFC)==0x0024)	/* is bq0..bq3 */
+#define XTENSA_DBREGN_IS_BD(tn)		(((tn) & 0xFFF8)==0x0028)	/* is bd0..bd7 */
+#define XTENSA_DBREGN_IS_F(tn)		(((tn) & 0xFFF0)==0x0030)	/* is f0..f15 */
+#define XTENSA_DBREGN_IS_VEC(tn)	(((tn) & 0xFFF0)==0x0040)	/* is v0..v15 */
+#define XTENSA_DBREGN_IS_VSEL(tn)	(((tn) & 0xFFF8)==0x0050)	/* is s0..s7 (s0..s3 in V1) */
+#define XTENSA_DBREGN_IS_VALIGN(tn)	(((tn) & 0xFFFC)==0x0058)	/* is u0..u3 */
+#define XTENSA_DBREGN_IS_VCOEFF(tn)	(((tn) & 0xFFFE)==0x005C)	/* is c0..c1 */
+#define XTENSA_DBREGN_IS_AEP(tn)	(((tn) & 0xFFF8)==0x0060)	/* is aep0..aep7 */
+#define XTENSA_DBREGN_IS_AEQ(tn)	(((tn) & 0xFFFC)==0x0068)	/* is aeq0..aeq3 */
+#define XTENSA_DBREGN_IS_AR(tn)		(((tn) & 0xFFC0)==0x0100)	/* is ar0..ar63 */
+#define XTENSA_DBREGN_IS_SREG(tn)	(((tn) & 0xFF00)==0x0200)	/* is special register */
+#define XTENSA_DBREGN_IS_BR(tn)		(((tn) & 0xFFFF)==XTENSA_DBREGN_SREG(0x04))	/* is BR */
+#define XTENSA_DBREGN_IS_MR(tn)		(((tn) & 0xFFFC)==XTENSA_DBREGN_SREG(0x20))	/* m0..m3 */
+#define XTENSA_DBREGN_IS_UREG(tn)	(((tn) & 0xFF00)==0x0300)	/* is user register */
+#define XTENSA_DBREGN_IS_DBAGENT(tn)	(((tn) & 0xF000)==0xF000)	/* is non-processor */
+/*#define XTENSA_DBREGN_IS_CONTEXT(tn)	(((tn) & 0x02000000) != 0)*/	/* specifies context # */
+
+/*
+ *  Macros to extract register index from a register "target number"
+ *  when a specific range has been identified using one of the _IS_ macros above.
+ *  These macros only return a useful value if the corresponding _IS_ macro returns true.
+ */
+#define XTENSA_DBREGN_A_INDEX(tn)	((tn) & 0x0F)		/* 0..15  for a0..a15 */
+#define XTENSA_DBREGN_B_INDEX(tn)	((tn) & 0x0F)		/* 0..15  for b0..b15 */
+#define XTENSA_DBREGN_BO_INDEX(tn)	((tn) & 0x01)		/* 0..1   for bo0..bo1 */
+#define XTENSA_DBREGN_BQ_INDEX(tn)	((tn) & 0x03)		/* 0..3   for bq0..bq3 */
+#define XTENSA_DBREGN_BD_INDEX(tn)	((tn) & 0x07)		/* 0..7   for bd0..bd7 */
+#define XTENSA_DBREGN_F_INDEX(tn)	((tn) & 0x0F)		/* 0..15  for f0..f15 */
+#define XTENSA_DBREGN_VEC_INDEX(tn)	((tn) & 0x0F)		/* 0..15  for v0..v15 */
+#define XTENSA_DBREGN_VSEL_INDEX(tn)	((tn) & 0x07)		/* 0..7   for s0..s7 */
+#define XTENSA_DBREGN_VALIGN_INDEX(tn)	((tn) & 0x03)		/* 0..3   for u0..u3 */
+#define XTENSA_DBREGN_VCOEFF_INDEX(tn)	((tn) & 0x01)		/* 0..1   for c0..c1 */
+#define XTENSA_DBREGN_AEP_INDEX(tn)	((tn) & 0x07)		/* 0..7   for aep0..aep7 */
+#define XTENSA_DBREGN_AEQ_INDEX(tn)	((tn) & 0x03)		/* 0..3   for aeq0..aeq3 */
+#define XTENSA_DBREGN_AR_INDEX(tn)	((tn) & 0x3F)		/* 0..63  for ar0..ar63 */
+#define XTENSA_DBREGN_SREG_INDEX(tn)	((tn) & 0xFF)		/* 0..255 for special registers */
+#define XTENSA_DBREGN_MR_INDEX(tn)	((tn) & 0x03)		/* 0..3   for m0..m3 */
+#define XTENSA_DBREGN_UREG_INDEX(tn)	((tn) & 0xFF)		/* 0..255 for user registers */
+#define XTENSA_DBREGN_DBAGENT_INDEX(tn)	((tn) & 0xFFF)		/* 0..4095 for non-processor */
+/*#define XTENSA_DBREGN_CONTEXT_INDEX(tn)	(((tn) >> 20) & 0x1F)*/	/* 0..31  context numbers */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __H_LIBDB_MACROS */
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa-versions.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa-versions.h
new file mode 100644
index 00000000000..b60b251b2c8
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa-versions.h
@@ -0,0 +1,403 @@
+/*
+   xtensa-versions.h -- definitions of Xtensa version and release numbers
+
+   This file defines most Xtensa-related product versions and releases
+   that exist so far.
+   It also provides a bit of information about which ones are current.
+   This file changes every release, as versions/releases get added.
+
+*/
+//   $Id: //depot/rel/Foxhill/dot.9/Xtensa/Software/misc/xtensa-versions.h.tpp#1 $
+
+/*
+   Copyright (c) 2006-2018 Tensilica Inc.
+
+   Permission is hereby granted, free of charge, to any person obtaining
+   a copy of this software and associated documentation files (the
+   "Software"), to deal in the Software without restriction, including
+   without limitation the rights to use, copy, modify, merge, publish,
+   distribute, sublicense, and/or sell copies of the Software, and to
+   permit persons to whom the Software is furnished to do so, subject to
+   the following conditions:
+
+   The above copyright notice and this permission notice shall be included
+   in all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+#ifndef XTENSA_VERSIONS_H
+#define XTENSA_VERSIONS_H
+
+
+/*
+ *  NOTE:  A "release" is a collection of product versions
+ *	made available at once (together) to customers.
+ *	In the past, release and version names all matched in T####.# form,
+ *	making the distinction irrelevant.
+ *	Starting with the RA-2004.1 release, this is no longer the case.
+ */
+
+
+/* Hardware (Xtensa/Diamond processor) versions:  */
+#define XTENSA_HWVERSION_T1020_0	102000	/* versions T1020.0 */
+#define  XTENSA_HWCIDSCHEME_T1020_0	 10
+#define  XTENSA_HWCIDVERS_T1020_0	 2
+#define XTENSA_HWVERSION_T1020_1	102001	/* versions T1020.1 */
+#define  XTENSA_HWCIDSCHEME_T1020_1	 10
+#define  XTENSA_HWCIDVERS_T1020_1	 3
+#define XTENSA_HWVERSION_T1020_2	102002	/* versions T1020.2 */
+#define  XTENSA_HWCIDSCHEME_T1020_2	 10
+#define  XTENSA_HWCIDVERS_T1020_2	 4
+#define XTENSA_HWVERSION_T1020_2B	102002	/* versions T1020.2b */
+#define  XTENSA_HWCIDSCHEME_T1020_2B	 10
+#define  XTENSA_HWCIDVERS_T1020_2B	 5
+#define XTENSA_HWVERSION_T1020_3	102003	/* versions T1020.3 */
+#define  XTENSA_HWCIDSCHEME_T1020_3	 10
+#define  XTENSA_HWCIDVERS_T1020_3	 6
+#define XTENSA_HWVERSION_T1020_4	102004	/* versions T1020.4 */
+#define  XTENSA_HWCIDSCHEME_T1020_4	 10
+#define  XTENSA_HWCIDVERS_T1020_4	 7
+#define XTENSA_HWVERSION_T1030_0	103000	/* versions T1030.0 */
+#define  XTENSA_HWCIDSCHEME_T1030_0	 10
+#define  XTENSA_HWCIDVERS_T1030_0	 9
+#define XTENSA_HWVERSION_T1030_1	103001	/* versions T1030.1 */
+#define  XTENSA_HWCIDSCHEME_T1030_1	 10
+#define  XTENSA_HWCIDVERS_T1030_1	 10
+#define XTENSA_HWVERSION_T1030_2	103002	/* versions T1030.2 */
+#define  XTENSA_HWCIDSCHEME_T1030_2	 10
+#define  XTENSA_HWCIDVERS_T1030_2	 11
+#define XTENSA_HWVERSION_T1030_3	103003	/* versions T1030.3 */
+#define  XTENSA_HWCIDSCHEME_T1030_3	 10
+#define  XTENSA_HWCIDVERS_T1030_3	 12
+#define XTENSA_HWVERSION_T1040_0	104000	/* versions T1040.0 */
+#define  XTENSA_HWCIDSCHEME_T1040_0	 10
+#define  XTENSA_HWCIDVERS_T1040_0	 15
+#define XTENSA_HWVERSION_T1040_1	104001	/* versions T1040.1 */
+#define  XTENSA_HWCIDSCHEME_T1040_1	 1
+#define  XTENSA_HWCIDVERS_T1040_1	 32
+#define XTENSA_HWVERSION_T1040_1P	104001	/* versions T1040.1-prehotfix */
+#define  XTENSA_HWCIDSCHEME_T1040_1P	 10
+#define  XTENSA_HWCIDVERS_T1040_1P	 16
+#define XTENSA_HWVERSION_T1040_2	104002	/* versions T1040.2 */
+#define  XTENSA_HWCIDSCHEME_T1040_2	 1
+#define  XTENSA_HWCIDVERS_T1040_2	 33
+#define XTENSA_HWVERSION_T1040_3	104003	/* versions T1040.3 */
+#define  XTENSA_HWCIDSCHEME_T1040_3	 1
+#define  XTENSA_HWCIDVERS_T1040_3	 34
+#define XTENSA_HWVERSION_T1050_0	105000	/* versions T1050.0 */
+#define  XTENSA_HWCIDSCHEME_T1050_0	 1100
+#define  XTENSA_HWCIDVERS_T1050_0	 1
+#define XTENSA_HWVERSION_T1050_1	105001	/* versions T1050.1 */
+#define  XTENSA_HWCIDSCHEME_T1050_1	 1100
+#define  XTENSA_HWCIDVERS_T1050_1	 2
+#define XTENSA_HWVERSION_T1050_2	105002	/* versions T1050.2 */
+#define  XTENSA_HWCIDSCHEME_T1050_2	 1100
+#define  XTENSA_HWCIDVERS_T1050_2	 4
+#define XTENSA_HWVERSION_T1050_3	105003	/* versions T1050.3 */
+#define  XTENSA_HWCIDSCHEME_T1050_3	 1100
+#define  XTENSA_HWCIDVERS_T1050_3	 6
+#define XTENSA_HWVERSION_T1050_4	105004	/* versions T1050.4 */
+#define  XTENSA_HWCIDSCHEME_T1050_4	 1100
+#define  XTENSA_HWCIDVERS_T1050_4	 7
+#define XTENSA_HWVERSION_T1050_5	105005	/* versions T1050.5 */
+#define  XTENSA_HWCIDSCHEME_T1050_5	 1100
+#define  XTENSA_HWCIDVERS_T1050_5	 8
+#define XTENSA_HWVERSION_RA_2004_1	210000	/* versions LX1.0.0 */
+#define  XTENSA_HWCIDSCHEME_RA_2004_1	 1100
+#define  XTENSA_HWCIDVERS_RA_2004_1	 3
+#define XTENSA_HWVERSION_RA_2005_1	210001	/* versions LX1.0.1 */
+#define  XTENSA_HWCIDSCHEME_RA_2005_1	 1100
+#define  XTENSA_HWCIDVERS_RA_2005_1	 20
+#define XTENSA_HWVERSION_RA_2005_2	210002	/* versions LX1.0.2 */
+#define  XTENSA_HWCIDSCHEME_RA_2005_2	 1100
+#define  XTENSA_HWCIDVERS_RA_2005_2	 21
+#define XTENSA_HWVERSION_RA_2005_3	210003	/* versions LX1.0.3, X6.0.3 */
+#define  XTENSA_HWCIDSCHEME_RA_2005_3	 1100
+#define  XTENSA_HWCIDVERS_RA_2005_3	 22
+#define XTENSA_HWVERSION_RA_2006_4	210004	/* versions LX1.0.4, X6.0.4 */
+#define  XTENSA_HWCIDSCHEME_RA_2006_4	 1100
+#define  XTENSA_HWCIDVERS_RA_2006_4	 23
+#define XTENSA_HWVERSION_RA_2006_5	210005	/* versions LX1.0.5, X6.0.5 */
+#define  XTENSA_HWCIDSCHEME_RA_2006_5	 1100
+#define  XTENSA_HWCIDVERS_RA_2006_5	 24
+#define XTENSA_HWVERSION_RA_2006_6	210006	/* versions LX1.0.6, X6.0.6 */
+#define  XTENSA_HWCIDSCHEME_RA_2006_6	 1100
+#define  XTENSA_HWCIDVERS_RA_2006_6	 25
+#define XTENSA_HWVERSION_RA_2007_7	210007	/* versions LX1.0.7, X6.0.7 */
+#define  XTENSA_HWCIDSCHEME_RA_2007_7	 1100
+#define  XTENSA_HWCIDVERS_RA_2007_7	 26
+#define XTENSA_HWVERSION_RA_2008_8	210008	/* versions LX1.0.8, X6.0.8 */
+#define  XTENSA_HWCIDSCHEME_RA_2008_8	 1100
+#define  XTENSA_HWCIDVERS_RA_2008_8	 27
+#define XTENSA_HWVERSION_RB_2006_0	220000	/* versions LX2.0.0, X7.0.0 */
+#define  XTENSA_HWCIDSCHEME_RB_2006_0	 1100
+#define  XTENSA_HWCIDVERS_RB_2006_0	 48
+#define XTENSA_HWVERSION_RB_2007_1	220001	/* versions LX2.0.1, X7.0.1 */
+#define  XTENSA_HWCIDSCHEME_RB_2007_1	 1100
+#define  XTENSA_HWCIDVERS_RB_2007_1	 49
+#define XTENSA_HWVERSION_RB_2007_2	221000	/* versions LX2.1.0, X7.1.0 */
+#define  XTENSA_HWCIDSCHEME_RB_2007_2	 1100
+#define  XTENSA_HWCIDVERS_RB_2007_2	 52
+#define XTENSA_HWVERSION_RB_2008_3	221001	/* versions LX2.1.1, X7.1.1 */
+#define  XTENSA_HWCIDSCHEME_RB_2008_3	 1100
+#define  XTENSA_HWCIDVERS_RB_2008_3	 53
+#define XTENSA_HWVERSION_RB_2008_4	221002	/* versions LX2.1.2, X7.1.2 */
+#define  XTENSA_HWCIDSCHEME_RB_2008_4	 1100
+#define  XTENSA_HWCIDVERS_RB_2008_4	 54
+#define XTENSA_HWVERSION_RB_2009_5	221003	/* versions LX2.1.3, X7.1.3 */
+#define  XTENSA_HWCIDSCHEME_RB_2009_5	 1100
+#define  XTENSA_HWCIDVERS_RB_2009_5	 55
+#define XTENSA_HWVERSION_RB_2007_2_MP	221100	/* versions LX2.1.8-MP, X7.1.8-MP */
+#define  XTENSA_HWCIDSCHEME_RB_2007_2_MP	 1100
+#define  XTENSA_HWCIDVERS_RB_2007_2_MP	 64
+#define XTENSA_HWVERSION_RC_2009_0	230000	/* versions LX3.0.0, X8.0.0, MX1.0.0 */
+#define  XTENSA_HWCIDSCHEME_RC_2009_0	 1100
+#define  XTENSA_HWCIDVERS_RC_2009_0	 65
+#define XTENSA_HWVERSION_RC_2010_1	230001	/* versions LX3.0.1, X8.0.1, MX1.0.1 */
+#define  XTENSA_HWCIDSCHEME_RC_2010_1	 1100
+#define  XTENSA_HWCIDVERS_RC_2010_1	 66
+#define XTENSA_HWVERSION_RC_2010_2	230002	/* versions LX3.0.2, X8.0.2, MX1.0.2 */
+#define  XTENSA_HWCIDSCHEME_RC_2010_2	 1100
+#define  XTENSA_HWCIDVERS_RC_2010_2	 67
+#define XTENSA_HWVERSION_RC_2011_3	230003	/* versions LX3.0.3, X8.0.3, MX1.0.3 */
+#define  XTENSA_HWCIDSCHEME_RC_2011_3	 1100
+#define  XTENSA_HWCIDVERS_RC_2011_3	 68
+#define XTENSA_HWVERSION_RD_2010_0	240000	/* versions LX4.0.0, X9.0.0, MX1.1.0, TX1.0.0 */
+#define  XTENSA_HWCIDSCHEME_RD_2010_0	 1100
+#define  XTENSA_HWCIDVERS_RD_2010_0	 80
+#define XTENSA_HWVERSION_RD_2011_1	240001	/* versions LX4.0.1, X9.0.1, MX1.1.1, TX1.0.1 */
+#define  XTENSA_HWCIDSCHEME_RD_2011_1	 1100
+#define  XTENSA_HWCIDVERS_RD_2011_1	 81
+#define XTENSA_HWVERSION_RD_2011_2	240002	/* versions LX4.0.2, X9.0.2, MX1.1.2, TX1.0.2 */
+#define  XTENSA_HWCIDSCHEME_RD_2011_2	 1100
+#define  XTENSA_HWCIDVERS_RD_2011_2	 82
+#define XTENSA_HWVERSION_RD_2011_3	240003	/* versions LX4.0.3, X9.0.3, MX1.1.3, TX1.0.3 */
+#define  XTENSA_HWCIDSCHEME_RD_2011_3	 1100
+#define  XTENSA_HWCIDVERS_RD_2011_3	 83
+#define XTENSA_HWVERSION_RD_2012_4	240004	/* versions LX4.0.4, X9.0.4, MX1.1.4, TX1.0.4 */
+#define  XTENSA_HWCIDSCHEME_RD_2012_4	 1100
+#define  XTENSA_HWCIDVERS_RD_2012_4	 84
+#define XTENSA_HWVERSION_RD_2012_5	240005	/* versions LX4.0.5, X9.0.5, MX1.1.5, TX1.0.5 */
+#define  XTENSA_HWCIDSCHEME_RD_2012_5	 1100
+#define  XTENSA_HWCIDVERS_RD_2012_5	 85
+#define XTENSA_HWVERSION_RE_2012_0	250000	/* versions LX5.0.0, X10.0.0, MX1.2.0 */
+#define  XTENSA_HWCIDSCHEME_RE_2012_0	 1100
+#define  XTENSA_HWCIDVERS_RE_2012_0	 96
+#define XTENSA_HWVERSION_RE_2012_1	250001	/* versions LX5.0.1, X10.0.1, MX1.2.1 */
+#define  XTENSA_HWCIDSCHEME_RE_2012_1	 1100
+#define  XTENSA_HWCIDVERS_RE_2012_1	 97
+#define XTENSA_HWVERSION_RE_2013_2	250002	/* versions LX5.0.2, X10.0.2, MX1.2.2 */
+#define  XTENSA_HWCIDSCHEME_RE_2013_2	 1100
+#define  XTENSA_HWCIDVERS_RE_2013_2	 98
+#define XTENSA_HWVERSION_RE_2013_3	250003	/* versions LX5.0.3, X10.0.3, MX1.2.3 */
+#define  XTENSA_HWCIDSCHEME_RE_2013_3	 1100
+#define  XTENSA_HWCIDVERS_RE_2013_3	 99
+#define XTENSA_HWVERSION_RE_2013_4	250004	/* versions LX5.0.4, X10.0.4, MX1.2.4 */
+#define  XTENSA_HWCIDSCHEME_RE_2013_4	 1100
+#define  XTENSA_HWCIDVERS_RE_2013_4	 100
+#define XTENSA_HWVERSION_RE_2014_5	250005	/* versions LX5.0.5, X10.0.5, MX1.2.5 */
+#define  XTENSA_HWCIDSCHEME_RE_2014_5	 1100
+#define  XTENSA_HWCIDVERS_RE_2014_5	 101
+#define XTENSA_HWVERSION_RE_2015_6	250006	/* versions LX5.0.6, X10.0.6, MX1.2.6 */
+#define  XTENSA_HWCIDSCHEME_RE_2015_6	 1100
+#define  XTENSA_HWCIDVERS_RE_2015_6	 102
+#define XTENSA_HWVERSION_RF_2014_0	260000	/* versions LX6.0.0, X11.0.0, MX1.3.0 */
+#define  XTENSA_HWCIDSCHEME_RF_2014_0	 1100
+#define  XTENSA_HWCIDVERS_RF_2014_0	 112
+#define XTENSA_HWVERSION_RF_2014_1	260001	/* versions LX6.0.1, X11.0.1 */
+#define  XTENSA_HWCIDSCHEME_RF_2014_1	 1100
+#define  XTENSA_HWCIDVERS_RF_2014_1	 113
+#define XTENSA_HWVERSION_RF_2015_2	260002	/* versions LX6.0.2, X11.0.2 */
+#define  XTENSA_HWCIDSCHEME_RF_2015_2	 1100
+#define  XTENSA_HWCIDVERS_RF_2015_2	 114
+#define XTENSA_HWVERSION_RF_2015_3	260003	/* versions LX6.0.3, X11.0.3 */
+#define  XTENSA_HWCIDSCHEME_RF_2015_3	 1100
+#define  XTENSA_HWCIDVERS_RF_2015_3	 115
+#define XTENSA_HWVERSION_RF_2016_4	260004	/* versions LX6.0.4, X11.0.4 */
+#define  XTENSA_HWCIDSCHEME_RF_2016_4	 1100
+#define  XTENSA_HWCIDVERS_RF_2016_4	 116
+#define XTENSA_HWVERSION_RG_2015_0	270000	/* versions LX7.0.0 */
+#define  XTENSA_HWCIDSCHEME_RG_2015_0	 1100
+#define  XTENSA_HWCIDVERS_RG_2015_0	 128
+#define XTENSA_HWVERSION_RG_2015_1	270001	/* versions LX7.0.1 */
+#define  XTENSA_HWCIDSCHEME_RG_2015_1	 1100
+#define  XTENSA_HWCIDVERS_RG_2015_1	 129
+#define XTENSA_HWVERSION_RG_2015_2	270002	/* versions LX7.0.2 */
+#define  XTENSA_HWCIDSCHEME_RG_2015_2	 1100
+#define  XTENSA_HWCIDVERS_RG_2015_2	 130
+#define XTENSA_HWVERSION_RG_2016_3	270003	/* versions LX7.0.3 */
+#define  XTENSA_HWCIDSCHEME_RG_2016_3	 1100
+#define  XTENSA_HWCIDVERS_RG_2016_3	 131
+#define XTENSA_HWVERSION_RG_2016_4	270004	/* versions LX7.0.4 */
+#define  XTENSA_HWCIDSCHEME_RG_2016_4	 1100
+#define  XTENSA_HWCIDVERS_RG_2016_4	 132
+#define XTENSA_HWVERSION_RG_2017_5	270005	/* versions LX7.0.5 */
+#define  XTENSA_HWCIDSCHEME_RG_2017_5	 1100
+#define  XTENSA_HWCIDVERS_RG_2017_5	 133
+#define XTENSA_HWVERSION_RG_2017_6	270006	/* versions LX7.0.6 */
+#define  XTENSA_HWCIDSCHEME_RG_2017_6	 1100
+#define  XTENSA_HWCIDVERS_RG_2017_6	 134
+#define XTENSA_HWVERSION_RG_2017_7	270007	/* versions LX7.0.7 */
+#define  XTENSA_HWCIDSCHEME_RG_2017_7	 1100
+#define  XTENSA_HWCIDVERS_RG_2017_7	 135
+#define XTENSA_HWVERSION_RG_2017_8	270008	/* versions LX7.0.8 */
+#define  XTENSA_HWCIDSCHEME_RG_2017_8	 1100
+#define  XTENSA_HWCIDVERS_RG_2017_8	 136
+#define XTENSA_HWVERSION_RG_2018_9	270009	/* versions LX7.0.9 */
+#define  XTENSA_HWCIDSCHEME_RG_2018_9	 1100
+#define  XTENSA_HWCIDVERS_RG_2018_9	 137
+#define XTENSA_HWVERSION_RH_2016_0	280000	/* versions LX8.0.0, NX1.0.0, SX1.0.0 */
+#define  XTENSA_HWCIDSCHEME_RH_2016_0	 1100
+#define  XTENSA_HWCIDVERS_RH_2016_0	 144
+
+/* Software (Xtensa Tools) versions:  */
+#define XTENSA_SWVERSION_T1020_0	102000	/* versions T1020.0 */
+#define XTENSA_SWVERSION_T1020_1	102001	/* versions T1020.1 */
+#define XTENSA_SWVERSION_T1020_2	102002	/* versions T1020.2 */
+#define XTENSA_SWVERSION_T1020_2B	102002	/* versions T1020.2b */
+#define XTENSA_SWVERSION_T1020_3	102003	/* versions T1020.3 */
+#define XTENSA_SWVERSION_T1020_4	102004	/* versions T1020.4 */
+#define XTENSA_SWVERSION_T1030_0	103000	/* versions T1030.0 */
+#define XTENSA_SWVERSION_T1030_1	103001	/* versions T1030.1 */
+#define XTENSA_SWVERSION_T1030_2	103002	/* versions T1030.2 */
+#define XTENSA_SWVERSION_T1030_3	103003	/* versions T1030.3 */
+#define XTENSA_SWVERSION_T1040_0	104000	/* versions T1040.0 */
+#define XTENSA_SWVERSION_T1040_1	104001	/* versions T1040.1 */
+#define XTENSA_SWVERSION_T1040_1P	104001	/* versions T1040.1-prehotfix */
+#define XTENSA_SWVERSION_T1040_2	104002	/* versions T1040.2 */
+#define XTENSA_SWVERSION_T1040_3	104003	/* versions T1040.3 */
+#define XTENSA_SWVERSION_T1050_0	105000	/* versions T1050.0 */
+#define XTENSA_SWVERSION_T1050_1	105001	/* versions T1050.1 */
+#define XTENSA_SWVERSION_T1050_2	105002	/* versions T1050.2 */
+#define XTENSA_SWVERSION_T1050_3	105003	/* versions T1050.3 */
+#define XTENSA_SWVERSION_T1050_4	105004	/* versions T1050.4 */
+#define XTENSA_SWVERSION_T1050_5	105005	/* versions T1050.5 */
+#define XTENSA_SWVERSION_RA_2004_1	600000	/* versions 6.0.0 */
+#define XTENSA_SWVERSION_RA_2005_1	600001	/* versions 6.0.1 */
+#define XTENSA_SWVERSION_RA_2005_2	600002	/* versions 6.0.2 */
+#define XTENSA_SWVERSION_RA_2005_3	600003	/* versions 6.0.3 */
+#define XTENSA_SWVERSION_RA_2006_4	600004	/* versions 6.0.4 */
+#define XTENSA_SWVERSION_RA_2006_5	600005	/* versions 6.0.5 */
+#define XTENSA_SWVERSION_RA_2006_6	600006	/* versions 6.0.6 */
+#define XTENSA_SWVERSION_RA_2007_7	600007	/* versions 6.0.7 */
+#define XTENSA_SWVERSION_RA_2008_8	600008	/* versions 6.0.8 */
+#define XTENSA_SWVERSION_RB_2006_0	700000	/* versions 7.0.0 */
+#define XTENSA_SWVERSION_RB_2007_1	700001	/* versions 7.0.1 */
+#define XTENSA_SWVERSION_RB_2007_2	701000	/* versions 7.1.0 */
+#define XTENSA_SWVERSION_RB_2008_3	701001	/* versions 7.1.1 */
+#define XTENSA_SWVERSION_RB_2008_4	701002	/* versions 7.1.2 */
+#define XTENSA_SWVERSION_RB_2009_5	701003	/* versions 7.1.3 */
+#define XTENSA_SWVERSION_RB_2007_2_MP	701100	/* versions 7.1.8-MP */
+#define XTENSA_SWVERSION_RC_2009_0	800000	/* versions 8.0.0 */
+#define XTENSA_SWVERSION_RC_2010_1	800001	/* versions 8.0.1 */
+#define XTENSA_SWVERSION_RC_2010_2	800002	/* versions 8.0.2 */
+#define XTENSA_SWVERSION_RC_2011_3	800003	/* versions 8.0.3 */
+#define XTENSA_SWVERSION_RD_2010_0	900000	/* versions 9.0.0 */
+#define XTENSA_SWVERSION_RD_2011_1	900001	/* versions 9.0.1 */
+#define XTENSA_SWVERSION_RD_2011_2	900002	/* versions 9.0.2 */
+#define XTENSA_SWVERSION_RD_2011_3	900003	/* versions 9.0.3 */
+#define XTENSA_SWVERSION_RD_2012_4	900004	/* versions 9.0.4 */
+#define XTENSA_SWVERSION_RD_2012_5	900005	/* versions 9.0.5 */
+#define XTENSA_SWVERSION_RE_2012_0	1000000	/* versions 10.0.0 */
+#define XTENSA_SWVERSION_RE_2012_1	1000001	/* versions 10.0.1 */
+#define XTENSA_SWVERSION_RE_2013_2	1000002	/* versions 10.0.2 */
+#define XTENSA_SWVERSION_RE_2013_3	1000003	/* versions 10.0.3 */
+#define XTENSA_SWVERSION_RE_2013_4	1000004	/* versions 10.0.4 */
+#define XTENSA_SWVERSION_RE_2014_5	1000005	/* versions 10.0.5 */
+#define XTENSA_SWVERSION_RE_2015_6	1000006	/* versions 10.0.6 */
+#define XTENSA_SWVERSION_RF_2014_0	1100000	/* versions 11.0.0 */
+#define XTENSA_SWVERSION_RF_2014_1	1100001	/* versions 11.0.1 */
+#define XTENSA_SWVERSION_RF_2015_2	1100002	/* versions 11.0.2 */
+#define XTENSA_SWVERSION_RF_2015_3	1100003	/* versions 11.0.3 */
+#define XTENSA_SWVERSION_RF_2016_4	1100004	/* versions 11.0.4 */
+#define XTENSA_SWVERSION_RG_2015_0	1200000	/* versions 12.0.0 */
+#define XTENSA_SWVERSION_RG_2015_1	1200001	/* versions 12.0.1 */
+#define XTENSA_SWVERSION_RG_2015_2	1200002	/* versions 12.0.2 */
+#define XTENSA_SWVERSION_RG_2016_3	1200003	/* versions 12.0.3 */
+#define XTENSA_SWVERSION_RG_2016_4	1200004	/* versions 12.0.4 */
+#define XTENSA_SWVERSION_RG_2017_5	1200005	/* versions 12.0.5 */
+#define XTENSA_SWVERSION_RG_2017_6	1200006	/* versions 12.0.6 */
+#define XTENSA_SWVERSION_RG_2017_7	1200007	/* versions 12.0.7 */
+#define XTENSA_SWVERSION_RG_2017_8	1200008	/* versions 12.0.8 */
+#define XTENSA_SWVERSION_RG_2018_9	1200009	/* versions 12.0.9 */
+#define XTENSA_SWVERSION_RH_2016_0	1300000	/* versions 13.0.0 */
+#define XTENSA_SWVERSION_T1040_1_PREHOTFIX	XTENSA_SWVERSION_T1040_1P	/* T1040.1-prehotfix */
+#define XTENSA_SWVERSION_6_0_0	XTENSA_SWVERSION_RA_2004_1	/* 6.0.0 */
+#define XTENSA_SWVERSION_6_0_1	XTENSA_SWVERSION_RA_2005_1	/* 6.0.1 */
+#define XTENSA_SWVERSION_6_0_2	XTENSA_SWVERSION_RA_2005_2	/* 6.0.2 */
+#define XTENSA_SWVERSION_6_0_3	XTENSA_SWVERSION_RA_2005_3	/* 6.0.3 */
+#define XTENSA_SWVERSION_6_0_4	XTENSA_SWVERSION_RA_2006_4	/* 6.0.4 */
+#define XTENSA_SWVERSION_6_0_5	XTENSA_SWVERSION_RA_2006_5	/* 6.0.5 */
+#define XTENSA_SWVERSION_6_0_6	XTENSA_SWVERSION_RA_2006_6	/* 6.0.6 */
+#define XTENSA_SWVERSION_6_0_7	XTENSA_SWVERSION_RA_2007_7	/* 6.0.7 */
+#define XTENSA_SWVERSION_6_0_8	XTENSA_SWVERSION_RA_2008_8	/* 6.0.8 */
+#define XTENSA_SWVERSION_7_0_0	XTENSA_SWVERSION_RB_2006_0	/* 7.0.0 */
+#define XTENSA_SWVERSION_7_0_1	XTENSA_SWVERSION_RB_2007_1	/* 7.0.1 */
+#define XTENSA_SWVERSION_7_1_0	XTENSA_SWVERSION_RB_2007_2	/* 7.1.0 */
+#define XTENSA_SWVERSION_7_1_1	XTENSA_SWVERSION_RB_2008_3	/* 7.1.1 */
+#define XTENSA_SWVERSION_7_1_2	XTENSA_SWVERSION_RB_2008_4	/* 7.1.2 */
+#define XTENSA_SWVERSION_7_1_3	XTENSA_SWVERSION_RB_2009_5	/* 7.1.3 */
+#define XTENSA_SWVERSION_7_1_8_MP	XTENSA_SWVERSION_RB_2007_2_MP	/* 7.1.8-MP */
+#define XTENSA_SWVERSION_8_0_0	XTENSA_SWVERSION_RC_2009_0	/* 8.0.0 */
+#define XTENSA_SWVERSION_8_0_1	XTENSA_SWVERSION_RC_2010_1	/* 8.0.1 */
+#define XTENSA_SWVERSION_8_0_2	XTENSA_SWVERSION_RC_2010_2	/* 8.0.2 */
+#define XTENSA_SWVERSION_8_0_3	XTENSA_SWVERSION_RC_2011_3	/* 8.0.3 */
+#define XTENSA_SWVERSION_9_0_0	XTENSA_SWVERSION_RD_2010_0	/* 9.0.0 */
+#define XTENSA_SWVERSION_9_0_1	XTENSA_SWVERSION_RD_2011_1	/* 9.0.1 */
+#define XTENSA_SWVERSION_9_0_2	XTENSA_SWVERSION_RD_2011_2	/* 9.0.2 */
+#define XTENSA_SWVERSION_9_0_3	XTENSA_SWVERSION_RD_2011_3	/* 9.0.3 */
+#define XTENSA_SWVERSION_9_0_4	XTENSA_SWVERSION_RD_2012_4	/* 9.0.4 */
+#define XTENSA_SWVERSION_9_0_5	XTENSA_SWVERSION_RD_2012_5	/* 9.0.5 */
+#define XTENSA_SWVERSION_10_0_0	XTENSA_SWVERSION_RE_2012_0	/* 10.0.0 */
+#define XTENSA_SWVERSION_10_0_1	XTENSA_SWVERSION_RE_2012_1	/* 10.0.1 */
+#define XTENSA_SWVERSION_10_0_2	XTENSA_SWVERSION_RE_2013_2	/* 10.0.2 */
+#define XTENSA_SWVERSION_10_0_3	XTENSA_SWVERSION_RE_2013_3	/* 10.0.3 */
+#define XTENSA_SWVERSION_10_0_4	XTENSA_SWVERSION_RE_2013_4	/* 10.0.4 */
+#define XTENSA_SWVERSION_10_0_5	XTENSA_SWVERSION_RE_2014_5	/* 10.0.5 */
+#define XTENSA_SWVERSION_10_0_6	XTENSA_SWVERSION_RE_2015_6	/* 10.0.6 */
+#define XTENSA_SWVERSION_11_0_0	XTENSA_SWVERSION_RF_2014_0	/* 11.0.0 */
+#define XTENSA_SWVERSION_11_0_1	XTENSA_SWVERSION_RF_2014_1	/* 11.0.1 */
+#define XTENSA_SWVERSION_11_0_2	XTENSA_SWVERSION_RF_2015_2	/* 11.0.2 */
+#define XTENSA_SWVERSION_11_0_3	XTENSA_SWVERSION_RF_2015_3	/* 11.0.3 */
+#define XTENSA_SWVERSION_11_0_4	XTENSA_SWVERSION_RF_2016_4	/* 11.0.4 */
+#define XTENSA_SWVERSION_12_0_0	XTENSA_SWVERSION_RG_2015_0	/* 12.0.0 */
+#define XTENSA_SWVERSION_12_0_1	XTENSA_SWVERSION_RG_2015_1	/* 12.0.1 */
+#define XTENSA_SWVERSION_12_0_2	XTENSA_SWVERSION_RG_2015_2	/* 12.0.2 */
+#define XTENSA_SWVERSION_12_0_3	XTENSA_SWVERSION_RG_2016_3	/* 12.0.3 */
+#define XTENSA_SWVERSION_12_0_4	XTENSA_SWVERSION_RG_2016_4	/* 12.0.4 */
+#define XTENSA_SWVERSION_12_0_5	XTENSA_SWVERSION_RG_2017_5	/* 12.0.5 */
+#define XTENSA_SWVERSION_12_0_6	XTENSA_SWVERSION_RG_2017_6	/* 12.0.6 */
+#define XTENSA_SWVERSION_12_0_7	XTENSA_SWVERSION_RG_2017_7	/* 12.0.7 */
+#define XTENSA_SWVERSION_12_0_8	XTENSA_SWVERSION_RG_2017_8	/* 12.0.8 */
+#define XTENSA_SWVERSION_12_0_9	XTENSA_SWVERSION_RG_2018_9	/* 12.0.9 */
+#define XTENSA_SWVERSION_13_0_0	XTENSA_SWVERSION_RH_2016_0	/* 13.0.0 */
+
+
+/*  The current release:  */
+#define XTENSA_RELEASE_NAME		"RG-2018.9"
+#define XTENSA_RELEASE_CANONICAL_NAME	"RG-2018.9"
+
+/*  The product versions within the current release:  */
+#define XTENSA_SWVERSION		XTENSA_SWVERSION_RG_2018_9
+#define XTENSA_SWVERSION_NAME		"12.0.9"
+#define XTENSA_SWVERSION_NAME_IDENT	 12_0_9
+#define XTENSA_SWVERSION_CANONICAL_NAME	"12.0.9"
+#define XTENSA_SWVERSION_MAJORMID_NAME	"12.0"
+#define XTENSA_SWVERSION_MAJOR_NAME	"12"
+/*  For product licensing (not necessarily same as *_MAJORMID_NAME):  */
+#define XTENSA_SWVERSION_LICENSE_NAME	"12.0"
+
+/*  Note:  there may be multiple hardware products in one release,
+    and software can target older hardware, so the notion of
+    "current" hardware versions is partially configuration dependent.
+    For now, "current" hardware product version info is left out
+    to avoid confusion.  */
+
+#endif /*XTENSA_VERSIONS_H*/
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa-xer.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa-xer.h
new file mode 100644
index 00000000000..52741c99633
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa-xer.h
@@ -0,0 +1,147 @@
+/* xer-constants.h -- various constants describing external registers accessed
+      via wer and rer.
+
+      TODO: find a better prefix. Also conditionalize certain constants based
+      on number of cores and interrupts actually present.
+*/
+
+/*
+ * Copyright (c) 1999-2008 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <xtensa/config/core.h>
+
+#define NUM_INTERRUPTS 27
+#define NUM_CORES       4
+
+/* Routing of NMI (BInterrupt2)	and interrupts 0..n-1 (BInterrupt3+)
+   RER reads
+   WER writes
+ */
+
+#define XER_MIROUT           0x0000
+#define XER_MIROUT_LAST      (XER_MIROUT + NUM_INTERRUPTS)
+
+
+/* IPI to core M (all 16 causes).
+
+   RER reads
+   WER clears
+ */
+#define XER_MIPICAUSE        0x0100
+#define XER_MIPICAUSE_FIELD_A_FIRST 0x0
+#define XER_MIPICAUSE_FIELD_A_LAST  0x0
+#define XER_MIPICAUSE_FIELD_B_FIRST 0x1
+#define XER_MIPICAUSE_FIELD_B_LAST  0x3
+#define XER_MIPICAUSE_FIELD_C_FIRST 0x4
+#define XER_MIPICAUSE_FIELD_C_LAST  0x7
+#define XER_MIPICAUSE_FIELD_D_FIRST 0x8
+#define XER_MIPICAUSE_FIELD_D_LAST  0xF
+
+
+/* IPI from cause bit 0..15
+
+   RER invalid
+   WER sets
+*/
+#define XER_MIPISET          0x0140
+#define XER_MIPISET_LAST     0x014F
+
+
+/* Global enable
+
+   RER read
+   WER clear
+*/
+#define XER_MIENG            0x0180
+
+
+/* Global enable
+
+   RER invalid
+   WER set
+*/
+#define XER_MIENG_SET        0x0184
+
+/* Global assert
+
+   RER read
+   WER clear
+*/
+#define XER_MIASG            0x0188
+
+
+/* Global enable
+
+   RER invalid
+   WER set
+*/
+#define XER_MIASG_SET        0x018C
+
+
+/* IPI partition register
+
+   RER read
+   WER write
+*/
+#define XER_PART            0x0190
+#define XER_IPI0            0x0
+#define XER_IPI1            0x1
+#define XER_IPI2            0x2
+#define XER_IPI3            0x3
+
+#define XER_PART_ROUTE_IPI(NUM, FIELD) ((NUM) << ((FIELD) << 2))
+
+#define XER_PART_ROUTE_IPI_CAUSE(TO_A, TO_B, TO_C, TO_D)		\
+  (XER_PART_ROUTE_IPI(TO_A, XER_IPI0) |					\
+   XER_PART_ROUTE_IPI(TO_B, XER_IPI1) |					\
+   XER_PART_ROUTE_IPI(TO_C, XER_IPI2) |					\
+   XER_PART_ROUTE_IPI(TO_D, XER_IPI3))
+
+#define XER_IPI_WAKE_EXT_INTERRUPT XCHAL_EXTINT0_NUM
+#define XER_IPI_WAKE_CAUSE  XER_MIPICAUSE_FIELD_C_FIRST
+#define XER_IPI_WAKE_ADDRESS    (XER_MIPISET + XER_IPI_WAKE_CAUSE)
+#define XER_DEFAULT_IPI_ROUTING XER_PART_ROUTE_IPI_CAUSE(XER_IPI1, XER_IPI0, XER_IPI2, XER_IPI3)
+
+
+/* System configuration ID
+
+   RER read
+   WER invalid
+*/
+#define XER_SYSCFGID        0x01A0
+
+
+/* RunStall to slave processors
+
+   RER read
+   WER write
+*/
+#define XER_MPSCORE        0x0200
+
+
+/* Cache coherency ON
+
+   RER read
+   WER write
+*/
+#define XER_CCON           0x0220
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa_api.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa_api.h
new file mode 100644
index 00000000000..deef36f7c6c
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa_api.h
@@ -0,0 +1,139 @@
+/*******************************************************************************
+Copyright (c) 2006-2015 Cadence Design Systems Inc.
+
+Permission is hereby granted, free of charge, to any person obtaining
+a copy of this software and associated documentation files (the
+"Software"), to deal in the Software without restriction, including
+without limitation the rights to use, copy, modify, merge, publish,
+distribute, sublicense, and/or sell copies of the Software, and to
+permit persons to whom the Software is furnished to do so, subject to
+the following conditions:
+
+The above copyright notice and this permission notice shall be included
+in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+******************************************************************************/
+
+/******************************************************************************
+  Xtensa-specific API for RTOS ports.
+******************************************************************************/
+
+#ifndef __XTENSA_API_H__
+#define __XTENSA_API_H__
+
+#include <stdbool.h>
+#include <xtensa/hal.h>
+#include "xtensa_context.h"
+
+
+/* Typedef for C-callable interrupt handler function */
+typedef void (*xt_handler)(void *);
+
+/* Typedef for C-callable exception handler function */
+typedef void (*xt_exc_handler)(XtExcFrame *);
+
+
+/*
+-------------------------------------------------------------------------------
+  Call this function to set a handler for the specified exception. The handler
+  will be installed on the core that calls this function.
+
+    n        - Exception number (type)
+    f        - Handler function address, NULL to uninstall handler.
+
+  The handler will be passed a pointer to the exception frame, which is created
+  on the stack of the thread that caused the exception.
+
+  If the handler returns, the thread context will be restored and the faulting
+  instruction will be retried. Any values in the exception frame that are
+  modified by the handler will be restored as part of the context. For details
+  of the exception frame structure see xtensa_context.h.
+-------------------------------------------------------------------------------
+*/
+extern xt_exc_handler xt_set_exception_handler(int n, xt_exc_handler f);
+
+
+/*
+-------------------------------------------------------------------------------
+  Call this function to set a handler for the specified interrupt. The handler
+  will be installed on the core that calls this function.
+
+    n        - Interrupt number.
+    f        - Handler function address, NULL to uninstall handler.
+    arg      - Argument to be passed to handler.
+-------------------------------------------------------------------------------
+*/
+extern xt_handler xt_set_interrupt_handler(int n, xt_handler f, void * arg);
+
+
+/*
+-------------------------------------------------------------------------------
+  Call this function to enable the specified interrupts on the core that runs
+  this code.
+
+    mask     - Bit mask of interrupts to be enabled.
+-------------------------------------------------------------------------------
+*/
+extern void xt_ints_on(unsigned int mask);
+
+
+/*
+-------------------------------------------------------------------------------
+  Call this function to disable the specified interrupts on the core that runs
+  this code.
+
+    mask     - Bit mask of interrupts to be disabled.
+-------------------------------------------------------------------------------
+*/
+extern void xt_ints_off(unsigned int mask);
+
+
+/*
+-------------------------------------------------------------------------------
+  Call this function to set the specified (s/w) interrupt.
+-------------------------------------------------------------------------------
+*/
+static inline void xt_set_intset(unsigned int arg)
+{
+    xthal_set_intset(arg);
+}
+
+
+/*
+-------------------------------------------------------------------------------
+  Call this function to clear the specified (s/w or edge-triggered)
+  interrupt.
+-------------------------------------------------------------------------------
+*/
+static inline void xt_set_intclear(unsigned int arg)
+{
+    xthal_set_intclear(arg);
+}
+
+/*
+-------------------------------------------------------------------------------
+  Call this function to get handler's argument for the specified interrupt.
+
+    n        - Interrupt number.
+-------------------------------------------------------------------------------
+*/
+extern void * xt_get_interrupt_handler_arg(int n);
+
+/*
+-------------------------------------------------------------------------------
+  Call this function to check if the specified interrupt is free to use.
+
+    intr       - Interrupt number.
+    cpu        - cpu number.
+-------------------------------------------------------------------------------
+*/
+bool xt_int_has_handler(int intr, int cpu);
+
+#endif /* __XTENSA_API_H__ */
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa_context.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa_context.h
new file mode 100644
index 00000000000..e655904423f
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtensa_context.h
@@ -0,0 +1,386 @@
+/*******************************************************************************
+Copyright (c) 2006-2015 Cadence Design Systems Inc.
+
+Permission is hereby granted, free of charge, to any person obtaining
+a copy of this software and associated documentation files (the
+"Software"), to deal in the Software without restriction, including
+without limitation the rights to use, copy, modify, merge, publish,
+distribute, sublicense, and/or sell copies of the Software, and to
+permit persons to whom the Software is furnished to do so, subject to
+the following conditions:
+
+The above copyright notice and this permission notice shall be included
+in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+--------------------------------------------------------------------------------
+
+        XTENSA CONTEXT FRAMES AND MACROS FOR RTOS ASSEMBLER SOURCES
+
+This header contains definitions and macros for use primarily by Xtensa
+RTOS assembly coded source files. It includes and uses the Xtensa hardware
+abstraction layer (HAL) to deal with config specifics. It may also be
+included in C source files.
+
+!! Supports only Xtensa Exception Architecture 2 (XEA2). XEA1 not supported. !!
+
+NOTE: The Xtensa architecture requires stack pointer alignment to 16 bytes.
+
+*******************************************************************************/
+
+#ifndef XTENSA_CONTEXT_H
+#define XTENSA_CONTEXT_H
+
+#ifdef __ASSEMBLER__
+#include    <xtensa/coreasm.h>
+#endif
+
+#include    <xtensa/config/tie.h>
+#include    <xtensa/corebits.h>
+#include    <xtensa/config/system.h>
+#include <xtensa/xtruntime-frames.h>
+
+
+/* Align a value up to nearest n-byte boundary, where n is a power of 2. */
+#define ALIGNUP(n, val) (((val) + (n)-1) & -(n))
+
+
+/*
+-------------------------------------------------------------------------------
+  Macros that help define structures for both C and assembler.
+-------------------------------------------------------------------------------
+*/
+
+#ifdef STRUCT_BEGIN
+#undef STRUCT_BEGIN
+#undef STRUCT_FIELD
+#undef STRUCT_AFIELD
+#undef STRUCT_END
+#endif
+
+#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
+
+#define STRUCT_BEGIN            .pushsection .text; .struct 0
+#define STRUCT_FIELD(ctype,size,asname,name)    asname: .space  size
+#define STRUCT_AFIELD(ctype,size,asname,name,n) asname: .space  (size)*(n)
+#define STRUCT_END(sname)       sname##Size:; .popsection
+
+#else
+
+#define STRUCT_BEGIN            typedef struct {
+#define STRUCT_FIELD(ctype,size,asname,name)    ctype   name;
+#define STRUCT_AFIELD(ctype,size,asname,name,n) ctype   name[n];
+#define STRUCT_END(sname)       } sname;
+
+#endif //_ASMLANGUAGE || __ASSEMBLER__
+
+
+/*
+-------------------------------------------------------------------------------
+  INTERRUPT/EXCEPTION STACK FRAME FOR A THREAD OR NESTED INTERRUPT
+
+  A stack frame of this structure is allocated for any interrupt or exception.
+  It goes on the current stack. If the RTOS has a system stack for handling
+  interrupts, every thread stack must allow space for just one interrupt stack
+  frame, then nested interrupt stack frames go on the system stack.
+
+  The frame includes basic registers (explicit) and "extra" registers introduced
+  by user TIE or the use of the MAC16 option in the user's Xtensa config.
+  The frame size is minimized by omitting regs not applicable to user's config.
+
+  For Windowed ABI, this stack frame includes the interruptee's base save area,
+  another base save area to manage gcc nested functions, and a little temporary
+  space to help manage the spilling of the register windows.
+-------------------------------------------------------------------------------
+*/
+
+STRUCT_BEGIN
+STRUCT_FIELD (long, 4, XT_STK_EXIT,     exit) /* exit point for dispatch */
+STRUCT_FIELD (long, 4, XT_STK_PC,       pc)   /* return PC */
+STRUCT_FIELD (long, 4, XT_STK_PS,       ps)   /* return PS */
+STRUCT_FIELD (long, 4, XT_STK_A0,       a0)
+STRUCT_FIELD (long, 4, XT_STK_A1,       a1)   /* stack pointer before interrupt */
+STRUCT_FIELD (long, 4, XT_STK_A2,       a2)
+STRUCT_FIELD (long, 4, XT_STK_A3,       a3)
+STRUCT_FIELD (long, 4, XT_STK_A4,       a4)
+STRUCT_FIELD (long, 4, XT_STK_A5,       a5)
+STRUCT_FIELD (long, 4, XT_STK_A6,       a6)
+STRUCT_FIELD (long, 4, XT_STK_A7,       a7)
+STRUCT_FIELD (long, 4, XT_STK_A8,       a8)
+STRUCT_FIELD (long, 4, XT_STK_A9,       a9)
+STRUCT_FIELD (long, 4, XT_STK_A10,      a10)
+STRUCT_FIELD (long, 4, XT_STK_A11,      a11)
+STRUCT_FIELD (long, 4, XT_STK_A12,      a12)
+STRUCT_FIELD (long, 4, XT_STK_A13,      a13)
+STRUCT_FIELD (long, 4, XT_STK_A14,      a14)
+STRUCT_FIELD (long, 4, XT_STK_A15,      a15)
+STRUCT_FIELD (long, 4, XT_STK_SAR,      sar)
+STRUCT_FIELD (long, 4, XT_STK_EXCCAUSE, exccause)
+STRUCT_FIELD (long, 4, XT_STK_EXCVADDR, excvaddr)
+#if XCHAL_HAVE_LOOPS
+STRUCT_FIELD (long, 4, XT_STK_LBEG,   lbeg)
+STRUCT_FIELD (long, 4, XT_STK_LEND,   lend)
+STRUCT_FIELD (long, 4, XT_STK_LCOUNT, lcount)
+#endif
+#ifndef __XTENSA_CALL0_ABI__
+/* Temporary space for saving stuff during window spill */
+STRUCT_FIELD (long, 4, XT_STK_TMP0,   tmp0)
+STRUCT_FIELD (long, 4, XT_STK_TMP1,   tmp1)
+STRUCT_FIELD (long, 4, XT_STK_TMP2,   tmp2)
+#endif
+#ifdef XT_USE_SWPRI
+/* Storage for virtual priority mask */
+STRUCT_FIELD (long, 4, XT_STK_VPRI,   vpri)
+#endif
+#ifdef XT_USE_OVLY
+/* Storage for overlay state */
+STRUCT_FIELD (long, 4, XT_STK_OVLY,   ovly)
+#endif
+STRUCT_END(XtExcFrame)
+
+#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
+#define XT_STK_NEXT1      XtExcFrameSize
+#else
+#define XT_STK_NEXT1      sizeof(XtExcFrame)
+#endif
+
+/* Allocate extra storage if needed */
+#if XCHAL_EXTRA_SA_SIZE != 0
+
+#if XCHAL_EXTRA_SA_ALIGN <= 16
+#define XT_STK_EXTRA            ALIGNUP(XCHAL_EXTRA_SA_ALIGN, XT_STK_NEXT1)
+#else
+/* If need more alignment than stack, add space for dynamic alignment */
+#define XT_STK_EXTRA            (ALIGNUP(XCHAL_EXTRA_SA_ALIGN, XT_STK_NEXT1) + XCHAL_EXTRA_SA_ALIGN)
+#endif
+#define XT_STK_NEXT2            (XT_STK_EXTRA + XCHAL_EXTRA_SA_SIZE)
+
+#else
+
+#define XT_STK_NEXT2            XT_STK_NEXT1
+
+#endif
+
+/*
+-------------------------------------------------------------------------------
+  This is the frame size. Add space for 4 registers (interruptee's base save
+  area) and some space for gcc nested functions if any.
+-------------------------------------------------------------------------------
+*/
+#define XT_STK_FRMSZ            (ALIGNUP(0x10, XT_STK_NEXT2) + 0x20)
+
+
+/*
+-------------------------------------------------------------------------------
+  SOLICITED STACK FRAME FOR A THREAD
+
+  A stack frame of this structure is allocated whenever a thread enters the
+  RTOS kernel intentionally (and synchronously) to submit to thread scheduling.
+  It goes on the current thread's stack.
+
+  The solicited frame only includes registers that are required to be preserved
+  by the callee according to the compiler's ABI conventions, some space to save
+  the return address for returning to the caller, and the caller's PS register.
+
+  For Windowed ABI, this stack frame includes the caller's base save area.
+
+  Note on XT_SOL_EXIT field:
+      It is necessary to distinguish a solicited from an interrupt stack frame.
+      This field corresponds to XT_STK_EXIT in the interrupt stack frame and is
+      always at the same offset (0). It can be written with a code (usually 0)
+      to distinguish a solicted frame from an interrupt frame. An RTOS port may
+      opt to ignore this field if it has another way of distinguishing frames.
+-------------------------------------------------------------------------------
+*/
+
+STRUCT_BEGIN
+#ifdef __XTENSA_CALL0_ABI__
+STRUCT_FIELD (long, 4, XT_SOL_EXIT, exit)
+STRUCT_FIELD (long, 4, XT_SOL_PC,   pc)
+STRUCT_FIELD (long, 4, XT_SOL_PS,   ps)
+STRUCT_FIELD (long, 4, XT_SOL_NEXT, next)
+STRUCT_FIELD (long, 4, XT_SOL_A12,  a12)    /* should be on 16-byte alignment */
+STRUCT_FIELD (long, 4, XT_SOL_A13,  a13)
+STRUCT_FIELD (long, 4, XT_SOL_A14,  a14)
+STRUCT_FIELD (long, 4, XT_SOL_A15,  a15)
+#else
+STRUCT_FIELD (long, 4, XT_SOL_EXIT, exit)
+STRUCT_FIELD (long, 4, XT_SOL_PC,   pc)
+STRUCT_FIELD (long, 4, XT_SOL_PS,   ps)
+STRUCT_FIELD (long, 4, XT_SOL_NEXT, next)
+STRUCT_FIELD (long, 4, XT_SOL_A0,   a0)    /* should be on 16-byte alignment */
+STRUCT_FIELD (long, 4, XT_SOL_A1,   a1)
+STRUCT_FIELD (long, 4, XT_SOL_A2,   a2)
+STRUCT_FIELD (long, 4, XT_SOL_A3,   a3)
+#endif
+STRUCT_END(XtSolFrame)
+
+/* Size of solicited stack frame */
+#define XT_SOL_FRMSZ            ALIGNUP(0x10, XtSolFrameSize)
+
+
+/*
+-------------------------------------------------------------------------------
+  CO-PROCESSOR STATE SAVE AREA FOR A THREAD
+
+  The RTOS must provide an area per thread to save the state of co-processors
+  when that thread does not have control. Co-processors are context-switched
+  lazily (on demand) only when a new thread uses a co-processor instruction,
+  otherwise a thread retains ownership of the co-processor even when it loses
+  control of the processor. An Xtensa co-processor exception is triggered when
+  any co-processor instruction is executed by a thread that is not the owner,
+  and the context switch of that co-processor is then peformed by the handler.
+  Ownership represents which thread's state is currently in the co-processor.
+
+  Co-processors may not be used by interrupt or exception handlers. If an
+  co-processor instruction is executed by an interrupt or exception handler,
+  the co-processor exception handler will trigger a kernel panic and freeze.
+  This restriction is introduced to reduce the overhead of saving and restoring
+  co-processor state (which can be quite large) and in particular remove that
+  overhead from interrupt handlers.
+
+  The co-processor state save area may be in any convenient per-thread location
+  such as in the thread control block or above the thread stack area. It need
+  not be in the interrupt stack frame since interrupts don't use co-processors.
+
+  Along with the save area for each co-processor, two bitmasks with flags per
+  co-processor (laid out as in the CPENABLE reg) help manage context-switching
+  co-processors as efficiently as possible:
+
+  XT_CPENABLE
+    The contents of a non-running thread's CPENABLE register.
+    It represents the co-processors owned (and whose state is still needed)
+    by the thread. When a thread is preempted, its CPENABLE is saved here.
+    When a thread solicits a context-swtich, its CPENABLE is cleared - the
+    compiler has saved the (caller-saved) co-proc state if it needs to.
+    When a non-running thread loses ownership of a CP, its bit is cleared.
+    When a thread runs, it's XT_CPENABLE is loaded into the CPENABLE reg.
+    Avoids co-processor exceptions when no change of ownership is needed.
+
+  XT_CPSTORED
+    A bitmask with the same layout as CPENABLE, a bit per co-processor.
+    Indicates whether the state of each co-processor is saved in the state
+    save area. When a thread enters the kernel, only the state of co-procs
+    still enabled in CPENABLE is saved. When the co-processor exception
+    handler assigns ownership of a co-processor to a thread, it restores
+    the saved state only if this bit is set, and clears this bit.
+
+  XT_CP_CS_ST
+    A bitmask with the same layout as CPENABLE, a bit per co-processor.
+    Indicates whether callee-saved state is saved in the state save area.
+    Callee-saved state is saved by itself on a solicited context switch,
+    and restored when needed by the coprocessor exception handler.
+    Unsolicited switches will cause the entire coprocessor to be saved
+    when necessary.
+
+  XT_CP_ASA
+    Pointer to the aligned save area.  Allows it to be aligned more than
+    the overall save area (which might only be stack-aligned or TCB-aligned).
+    Especially relevant for Xtensa cores configured with a very large data
+    path that requires alignment greater than 16 bytes (ABI stack alignment).
+-------------------------------------------------------------------------------
+*/
+
+#if XCHAL_CP_NUM > 0
+
+/*  Offsets of each coprocessor save area within the 'aligned save area':  */
+#define XT_CP0_SA   0
+#define XT_CP1_SA   ALIGNUP(XCHAL_CP1_SA_ALIGN, XT_CP0_SA + XCHAL_CP0_SA_SIZE)
+#define XT_CP2_SA   ALIGNUP(XCHAL_CP2_SA_ALIGN, XT_CP1_SA + XCHAL_CP1_SA_SIZE)
+#define XT_CP3_SA   ALIGNUP(XCHAL_CP3_SA_ALIGN, XT_CP2_SA + XCHAL_CP2_SA_SIZE)
+#define XT_CP4_SA   ALIGNUP(XCHAL_CP4_SA_ALIGN, XT_CP3_SA + XCHAL_CP3_SA_SIZE)
+#define XT_CP5_SA   ALIGNUP(XCHAL_CP5_SA_ALIGN, XT_CP4_SA + XCHAL_CP4_SA_SIZE)
+#define XT_CP6_SA   ALIGNUP(XCHAL_CP6_SA_ALIGN, XT_CP5_SA + XCHAL_CP5_SA_SIZE)
+#define XT_CP7_SA   ALIGNUP(XCHAL_CP7_SA_ALIGN, XT_CP6_SA + XCHAL_CP6_SA_SIZE)
+#define XT_CP_SA_SIZE   ALIGNUP(16, XT_CP7_SA + XCHAL_CP7_SA_SIZE)
+
+/*  Offsets within the overall save area:  */
+#define XT_CPENABLE 0   /* (2 bytes) coprocessors active for this thread */
+#define XT_CPSTORED 2   /* (2 bytes) coprocessors saved for this thread */
+#define XT_CP_CS_ST 4   /* (2 bytes) coprocessor callee-saved regs stored for this thread */
+#define XT_CP_ASA   8   /* (4 bytes) ptr to aligned save area */
+/*  Overall size allows for dynamic alignment:  */
+#define XT_CP_SIZE  (12 + XT_CP_SA_SIZE + XCHAL_TOTAL_SA_ALIGN)
+#else
+#define XT_CP_SIZE  0
+#endif
+
+
+/*
+ Macro to get the current core ID. Only uses the reg given as an argument.
+ Reading PRID on the ESP32 gives us 0xCDCD on the PRO processor (0)
+ and 0xABAB on the APP CPU (1). We can distinguish between the two by checking
+ bit 13: it's 1 on the APP and 0 on the PRO processor.
+*/
+#ifdef __ASSEMBLER__
+	.macro getcoreid reg
+	rsr.prid \reg
+	extui \reg,\reg,13,1
+	.endm
+#endif
+
+/* Note: These are different to xCoreID used in ESP-IDF FreeRTOS, most places use
+   0 and 1 which are determined by checking bit 13 (see previous comment)
+*/
+#define CORE_ID_REGVAL_PRO 0xCDCD
+#define CORE_ID_REGVAL_APP 0xABAB
+
+/* Included for compatibility, recommend using CORE_ID_REGVAL_PRO instead */
+#define CORE_ID_PRO CORE_ID_REGVAL_PRO
+
+/* Included for compatibility, recommend using CORE_ID_REGVAL_APP instead */
+#define CORE_ID_APP CORE_ID_REGVAL_APP
+
+/*
+-------------------------------------------------------------------------------
+  MACROS TO HANDLE ABI SPECIFICS OF FUNCTION ENTRY AND RETURN
+
+  Convenient where the frame size requirements are the same for both ABIs.
+    ENTRY(sz), RET(sz) are for framed functions (have locals or make calls).
+    ENTRY0,    RET0    are for frameless functions (no locals, no calls).
+
+  where size = size of stack frame in bytes (must be >0 and aligned to 16).
+  For framed functions the frame is created and the return address saved at
+  base of frame (Call0 ABI) or as determined by hardware (Windowed ABI).
+  For frameless functions, there is no frame and return address remains in a0.
+  Note: Because CPP macros expand to a single line, macros requiring multi-line
+  expansions are implemented as assembler macros.
+-------------------------------------------------------------------------------
+*/
+
+#ifdef __ASSEMBLER__
+#ifdef __XTENSA_CALL0_ABI__
+  /* Call0 */
+  #define ENTRY(sz)     entry1  sz
+    .macro  entry1 size=0x10
+    addi    sp, sp, -\size
+    s32i    a0, sp, 0
+    .endm
+  #define ENTRY0
+  #define RET(sz)       ret1    sz
+    .macro  ret1 size=0x10
+    l32i    a0, sp, 0
+    addi    sp, sp, \size
+    ret
+    .endm
+  #define RET0          ret
+#else
+  /* Windowed */
+  #define ENTRY(sz)     entry   sp, sz
+  #define ENTRY0        entry   sp, 0x10
+  #define RET(sz)       retw
+  #define RET0          retw
+#endif
+#endif
+
+
+
+
+
+#endif /* XTENSA_CONTEXT_H */
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtruntime-core-state.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtruntime-core-state.h
new file mode 100644
index 00000000000..f099517be3e
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtruntime-core-state.h
@@ -0,0 +1,239 @@
+/*  xtruntime-core-state.h  -  core state save area (used eg. by PSO) */
+/* $Id: //depot/rel/Foxhill/dot.9/Xtensa/OS/include/xtensa/xtruntime-core-state.h#1 $ */
+
+/*
+ * Copyright (c) 2012-2013 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _XTOS_CORE_STATE_H_
+#define _XTOS_CORE_STATE_H_
+
+/*  Import STRUCT_xxx macros for defining structures:  */
+#include <xtensa/xtruntime-frames.h>
+#include <xtensa/config/core.h>
+#include <xtensa/config/tie.h>
+#if XCHAL_HAVE_IDMA
+#include <xtensa/idma.h>
+#endif
+
+//#define XTOS_PSO_TEST	1		// uncommented for internal PSO testing only
+
+#define CORE_STATE_SIGNATURE	0xB1C5AFED	// pattern that indicates state was saved
+
+
+/*
+ *  Save area for saving entire core state, such as across Power Shut-Off (PSO).
+ */
+
+STRUCT_BEGIN
+STRUCT_FIELD (long,4,CS_SA_,signature)		// for checking whether state was saved
+STRUCT_FIELD (long,4,CS_SA_,restore_label)
+STRUCT_FIELD (long,4,CS_SA_,aftersave_label)
+STRUCT_AFIELD(long,4,CS_SA_,areg,XCHAL_NUM_AREGS)
+#if XCHAL_HAVE_WINDOWED
+STRUCT_AFIELD(long,4,CS_SA_,caller_regs,16)	// save a max of 16 caller regs
+STRUCT_FIELD (long,4,CS_SA_,caller_regs_saved)  // flag to show if caller regs saved
+#endif
+#if XCHAL_HAVE_PSO_CDM
+STRUCT_FIELD (long,4,CS_SA_,pwrctl)
+#endif
+#if XCHAL_HAVE_WINDOWED
+STRUCT_FIELD (long,4,CS_SA_,windowbase)
+STRUCT_FIELD (long,4,CS_SA_,windowstart)
+#endif
+STRUCT_FIELD (long,4,CS_SA_,sar)
+#if XCHAL_HAVE_EXCEPTIONS
+STRUCT_FIELD (long,4,CS_SA_,epc1)
+STRUCT_FIELD (long,4,CS_SA_,ps)
+STRUCT_FIELD (long,4,CS_SA_,excsave1)
+# ifdef XCHAL_DOUBLEEXC_VECTOR_VADDR
+STRUCT_FIELD (long,4,CS_SA_,depc)
+# endif
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 2
+STRUCT_AFIELD(long,4,CS_SA_,epc,    XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI - 1)
+STRUCT_AFIELD(long,4,CS_SA_,eps,    XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI - 1)
+STRUCT_AFIELD(long,4,CS_SA_,excsave,XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI - 1)
+#endif
+#if XCHAL_HAVE_LOOPS
+STRUCT_FIELD (long,4,CS_SA_,lcount)
+STRUCT_FIELD (long,4,CS_SA_,lbeg)
+STRUCT_FIELD (long,4,CS_SA_,lend)
+#endif
+#if XCHAL_HAVE_ABSOLUTE_LITERALS
+STRUCT_FIELD (long,4,CS_SA_,litbase)
+#endif
+#if XCHAL_HAVE_VECBASE
+STRUCT_FIELD (long,4,CS_SA_,vecbase)
+#endif
+#if XCHAL_HAVE_S32C1I && (XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RC_2009_0)	/* have ATOMCTL ? */
+STRUCT_FIELD (long,4,CS_SA_,atomctl)
+#endif
+#if XCHAL_HAVE_PREFETCH
+STRUCT_FIELD (long,4,CS_SA_,prefctl)
+#endif
+#if XCHAL_USE_MEMCTL
+STRUCT_FIELD (long,4,CS_SA_,memctl)
+#endif
+#if XCHAL_HAVE_CCOUNT
+STRUCT_FIELD (long,4,CS_SA_,ccount)
+STRUCT_AFIELD(long,4,CS_SA_,ccompare, XCHAL_NUM_TIMERS)
+#endif
+#if XCHAL_HAVE_INTERRUPTS
+STRUCT_FIELD (long,4,CS_SA_,intenable)
+STRUCT_FIELD (long,4,CS_SA_,interrupt)
+#endif
+#if XCHAL_HAVE_DEBUG
+STRUCT_FIELD (long,4,CS_SA_,icount)
+STRUCT_FIELD (long,4,CS_SA_,icountlevel)
+STRUCT_FIELD (long,4,CS_SA_,debugcause)
+// DDR not saved
+# if XCHAL_NUM_DBREAK
+STRUCT_AFIELD(long,4,CS_SA_,dbreakc, XCHAL_NUM_DBREAK)
+STRUCT_AFIELD(long,4,CS_SA_,dbreaka, XCHAL_NUM_DBREAK)
+# endif
+# if XCHAL_NUM_IBREAK
+STRUCT_AFIELD(long,4,CS_SA_,ibreaka, XCHAL_NUM_IBREAK)
+STRUCT_FIELD (long,4,CS_SA_,ibreakenable)
+# endif
+#endif
+#if XCHAL_NUM_MISC_REGS
+STRUCT_AFIELD(long,4,CS_SA_,misc,XCHAL_NUM_MISC_REGS)
+#endif
+#if XCHAL_HAVE_MEM_ECC_PARITY
+STRUCT_FIELD (long,4,CS_SA_,mepc)
+STRUCT_FIELD (long,4,CS_SA_,meps)
+STRUCT_FIELD (long,4,CS_SA_,mesave)
+STRUCT_FIELD (long,4,CS_SA_,mesr)
+STRUCT_FIELD (long,4,CS_SA_,mecr)
+STRUCT_FIELD (long,4,CS_SA_,mevaddr)
+#endif
+
+/*  We put this ahead of TLB and other TIE state,
+    to keep it within S32I/L32I offset range.  */
+#if XCHAL_HAVE_CP
+STRUCT_FIELD (long,4,CS_SA_,cpenable)
+#endif
+
+/*  TLB state  */
+#if XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR
+STRUCT_AFIELD(long,4,CS_SA_,tlbs,8*2)
+#endif
+#if XCHAL_HAVE_PTP_MMU
+/*  Compute number of auto-refill (ARF) entries as max of I and D,
+    to simplify TLB save logic.  On the unusual configs with
+    ITLB ARF != DTLB ARF entries, we'll just end up
+    saving/restoring some extra entries redundantly.  */
+#  if XCHAL_DTLB_ARF_ENTRIES_LOG2 + XCHAL_ITLB_ARF_ENTRIES_LOG2 > 4
+#   define ARF_ENTRIES	8
+#  else
+#   define ARF_ENTRIES	4
+#  endif
+STRUCT_FIELD (long,4,CS_SA_,ptevaddr)
+STRUCT_FIELD (long,4,CS_SA_,rasid)
+STRUCT_FIELD (long,4,CS_SA_,dtlbcfg)
+STRUCT_FIELD (long,4,CS_SA_,itlbcfg)
+/*** WARNING:  past this point, field offsets may be larger than S32I/L32I range ***/
+STRUCT_AFIELD(long,4,CS_SA_,tlbs,((4*ARF_ENTRIES+4)*2+3)*2)
+# if XCHAL_HAVE_SPANNING_WAY	/* MMU v3 */
+STRUCT_AFIELD(long,4,CS_SA_,tlbs_ways56,(4+8)*2*2)
+# endif
+#endif
+/* MPU state */
+#if XCHAL_HAVE_MPU
+STRUCT_AFIELD(long,4,CS_SA_,mpuentry,8*XCHAL_MPU_ENTRIES)
+STRUCT_FIELD (long,4,CS_SA_,cacheadrdis)
+#endif
+
+#if XCHAL_HAVE_IDMA
+STRUCT_AFIELD(long,4,CS_SA_,idmaregs, IDMA_PSO_SAVE_SIZE)
+#endif
+
+/*  TIE state  */
+/*  NOTE: NCP area is aligned to XCHAL_TOTAL_SA_ALIGN not XCHAL_NCP_SA_ALIGN,
+    because the offsets of all subsequent coprocessor save areas are relative
+    to the NCP save area.  */
+STRUCT_AFIELD_A(char,1,XCHAL_TOTAL_SA_ALIGN,CS_SA_,ncp,XCHAL_NCP_SA_SIZE)
+#if XCHAL_HAVE_CP
+#if XCHAL_CP0_SA_SIZE > 0
+STRUCT_AFIELD_A(char,1,XCHAL_CP0_SA_ALIGN,CS_SA_,cp0,XCHAL_CP0_SA_SIZE)
+#endif
+#if XCHAL_CP1_SA_SIZE > 0
+STRUCT_AFIELD_A(char,1,XCHAL_CP1_SA_ALIGN,CS_SA_,cp1,XCHAL_CP1_SA_SIZE)
+#endif
+#if XCHAL_CP2_SA_SIZE > 0
+STRUCT_AFIELD_A(char,1,XCHAL_CP2_SA_ALIGN,CS_SA_,cp2,XCHAL_CP2_SA_SIZE)
+#endif
+#if XCHAL_CP3_SA_SIZE > 0
+STRUCT_AFIELD_A(char,1,XCHAL_CP3_SA_ALIGN,CS_SA_,cp3,XCHAL_CP3_SA_SIZE)
+#endif
+#if XCHAL_CP4_SA_SIZE > 0
+STRUCT_AFIELD_A(char,1,XCHAL_CP4_SA_ALIGN,CS_SA_,cp4,XCHAL_CP4_SA_SIZE)
+#endif
+#if XCHAL_CP5_SA_SIZE > 0
+STRUCT_AFIELD_A(char,1,XCHAL_CP5_SA_ALIGN,CS_SA_,cp5,XCHAL_CP5_SA_SIZE)
+#endif
+#if XCHAL_CP6_SA_SIZE > 0
+STRUCT_AFIELD_A(char,1,XCHAL_CP6_SA_ALIGN,CS_SA_,cp6,XCHAL_CP6_SA_SIZE)
+#endif
+#if XCHAL_CP7_SA_SIZE > 0
+STRUCT_AFIELD_A(char,1,XCHAL_CP7_SA_ALIGN,CS_SA_,cp7,XCHAL_CP7_SA_SIZE)
+#endif
+//STRUCT_AFIELD_A(char,1,XCHAL_CP8_SA_ALIGN,CS_SA_,cp8,XCHAL_CP8_SA_SIZE)
+//STRUCT_AFIELD_A(char,1,XCHAL_CP9_SA_ALIGN,CS_SA_,cp9,XCHAL_CP9_SA_SIZE)
+//STRUCT_AFIELD_A(char,1,XCHAL_CP10_SA_ALIGN,CS_SA_,cp10,XCHAL_CP10_SA_SIZE)
+//STRUCT_AFIELD_A(char,1,XCHAL_CP11_SA_ALIGN,CS_SA_,cp11,XCHAL_CP11_SA_SIZE)
+//STRUCT_AFIELD_A(char,1,XCHAL_CP12_SA_ALIGN,CS_SA_,cp12,XCHAL_CP12_SA_SIZE)
+//STRUCT_AFIELD_A(char,1,XCHAL_CP13_SA_ALIGN,CS_SA_,cp13,XCHAL_CP13_SA_SIZE)
+//STRUCT_AFIELD_A(char,1,XCHAL_CP14_SA_ALIGN,CS_SA_,cp14,XCHAL_CP14_SA_SIZE)
+//STRUCT_AFIELD_A(char,1,XCHAL_CP15_SA_ALIGN,CS_SA_,cp15,XCHAL_CP15_SA_SIZE)
+#endif
+
+STRUCT_END(XtosCoreState)
+
+
+
+//  These are part of non-coprocessor state (ncp):
+#if XCHAL_HAVE_MAC16
+//STRUCT_FIELD (long,4,CS_SA_,acclo)
+//STRUCT_FIELD (long,4,CS_SA_,acchi)
+//STRUCT_AFIELD(long,4,CS_SA_,mr, 4)
+#endif
+#if XCHAL_HAVE_THREADPTR
+//STRUCT_FIELD (long,4,CS_SA_,threadptr)
+#endif
+#if XCHAL_HAVE_S32C1I
+//STRUCT_FIELD (long,4,CS_SA_,scompare1)
+#endif
+#if XCHAL_HAVE_BOOLEANS
+//STRUCT_FIELD (long,4,CS_SA_,br)
+#endif
+
+//  Not saved:
+//	EXCCAUSE ??
+//	DEBUGCAUSE ??
+//	EXCVADDR ??
+//	DDR
+//	INTERRUPT
+//	... locked cache lines ...
+
+#endif /* _XTOS_CORE_STATE_H_ */
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtruntime-frames.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtruntime-frames.h
new file mode 100644
index 00000000000..d0eb3687355
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtruntime-frames.h
@@ -0,0 +1,161 @@
+/*  xtruntime-frames.h  -  exception stack frames for single-threaded run-time  */
+/* $Id: //depot/rel/Foxhill/dot.9/Xtensa/OS/include/xtensa/xtruntime-frames.h#1 $ */
+
+/*
+ * Copyright (c) 2002-2012 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _XTRUNTIME_FRAMES_H_
+#define _XTRUNTIME_FRAMES_H_
+
+#include <xtensa/config/core.h>
+
+/*  Macros that help define structures for both C and assembler:  */
+#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
+#define STRUCT_BEGIN		.pushsection .text; .struct 0
+#define STRUCT_FIELD(ctype,size,pre,name)	pre##name:	.space	size
+#define STRUCT_AFIELD(ctype,size,pre,name,n)	pre##name:	.if n ; .space	(size)*(n) ; .endif
+#define STRUCT_AFIELD_A(ctype,size,align,pre,name,n)	.balign align ; pre##name:	.if n ; .space (size)*(n) ; .endif
+#define STRUCT_END(sname)	sname##Size:; .popsection
+#else /*_ASMLANGUAGE||__ASSEMBLER__*/
+#define STRUCT_BEGIN		typedef struct {
+#define STRUCT_FIELD(ctype,size,pre,name)	ctype	name;
+#define STRUCT_AFIELD(ctype,size,pre,name,n)	ctype	name[n];
+#define STRUCT_AFIELD_A(ctype,size,align,pre,name,n)	ctype	name[n] __attribute__((aligned(align)));
+#define STRUCT_END(sname)	} sname;
+#endif /*_ASMLANGUAGE||__ASSEMBLER__*/
+
+
+/*
+ *  Kernel vector mode exception stack frame.
+ *
+ *  NOTE:  due to the limited range of addi used in the current
+ *  kernel exception vector, and the fact that historically
+ *  the vector is limited to 12 bytes, the size of this
+ *  stack frame is limited to 128 bytes (currently at 64).
+ */
+STRUCT_BEGIN
+STRUCT_FIELD (long,4,KEXC_,pc)		/* "parm" */
+STRUCT_FIELD (long,4,KEXC_,ps)
+STRUCT_AFIELD(long,4,KEXC_,areg, 4)	/* a12 .. a15 */
+STRUCT_FIELD (long,4,KEXC_,sar)		/* "save" */
+#if XCHAL_HAVE_LOOPS
+STRUCT_FIELD (long,4,KEXC_,lcount)
+STRUCT_FIELD (long,4,KEXC_,lbeg)
+STRUCT_FIELD (long,4,KEXC_,lend)
+#endif
+#if XCHAL_HAVE_MAC16
+STRUCT_FIELD (long,4,KEXC_,acclo)
+STRUCT_FIELD (long,4,KEXC_,acchi)
+STRUCT_AFIELD(long,4,KEXC_,mr, 4)
+#endif
+STRUCT_END(KernelFrame)
+
+
+/*
+ *  User vector mode exception stack frame:
+ *
+ *  WARNING:  if you modify this structure, you MUST modify the
+ *  computation of the pad size (ALIGNPAD) accordingly.
+ */
+STRUCT_BEGIN
+STRUCT_FIELD (long,4,UEXC_,pc)
+STRUCT_FIELD (long,4,UEXC_,ps)
+STRUCT_FIELD (long,4,UEXC_,sar)
+STRUCT_FIELD (long,4,UEXC_,vpri)
+#ifdef __XTENSA_CALL0_ABI__
+STRUCT_FIELD (long,4,UEXC_,a0)
+#endif
+STRUCT_FIELD (long,4,UEXC_,a2)
+STRUCT_FIELD (long,4,UEXC_,a3)
+STRUCT_FIELD (long,4,UEXC_,a4)
+STRUCT_FIELD (long,4,UEXC_,a5)
+#ifdef __XTENSA_CALL0_ABI__
+STRUCT_FIELD (long,4,UEXC_,a6)
+STRUCT_FIELD (long,4,UEXC_,a7)
+STRUCT_FIELD (long,4,UEXC_,a8)
+STRUCT_FIELD (long,4,UEXC_,a9)
+STRUCT_FIELD (long,4,UEXC_,a10)
+STRUCT_FIELD (long,4,UEXC_,a11)
+STRUCT_FIELD (long,4,UEXC_,a12)
+STRUCT_FIELD (long,4,UEXC_,a13)
+STRUCT_FIELD (long,4,UEXC_,a14)
+STRUCT_FIELD (long,4,UEXC_,a15)
+#endif
+STRUCT_FIELD (long,4,UEXC_,exccause)	/* NOTE: can probably rid of this one (pass direct) */
+#if XCHAL_HAVE_LOOPS
+STRUCT_FIELD (long,4,UEXC_,lcount)
+STRUCT_FIELD (long,4,UEXC_,lbeg)
+STRUCT_FIELD (long,4,UEXC_,lend)
+#endif
+#if XCHAL_HAVE_MAC16
+STRUCT_FIELD (long,4,UEXC_,acclo)
+STRUCT_FIELD (long,4,UEXC_,acchi)
+STRUCT_AFIELD(long,4,UEXC_,mr, 4)
+#endif
+/* ALIGNPAD is the 16-byte alignment padding. */
+#ifdef __XTENSA_CALL0_ABI__
+# define CALL0_ABI	1
+#else
+# define CALL0_ABI	0
+#endif
+#define ALIGNPAD  ((3 + XCHAL_HAVE_LOOPS*1 + XCHAL_HAVE_MAC16*2 + CALL0_ABI*1) & 3)
+#if ALIGNPAD
+STRUCT_AFIELD(long,4,UEXC_,pad, ALIGNPAD)	/* 16-byte alignment padding */
+#endif
+/*STRUCT_AFIELD_A(char,1,XCHAL_CPEXTRA_SA_ALIGN,UEXC_,ureg, (XCHAL_CPEXTRA_SA_SIZE+3)&-4)*/	/* not used */
+STRUCT_END(UserFrame)
+
+
+#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
+
+
+/*  Check for UserFrameSize small enough not to require rounding...:  */
+	/*  Skip 16-byte save area, then 32-byte space for 8 regs of call12
+	 *  (which overlaps with 16-byte GCC nested func chaining area),
+	 *  then exception stack frame:  */
+	.set	UserFrameTotalSize, 16+32+UserFrameSize
+	/*  Greater than 112 bytes? (max range of ADDI, both signs, when aligned to 16 bytes):  */
+	.ifgt	UserFrameTotalSize-112
+	/*  Round up to 256-byte multiple to accelerate immediate adds:  */
+	.set	UserFrameTotalSize, ((UserFrameTotalSize+255) & 0xFFFFFF00)
+	.endif
+# define ESF_TOTALSIZE	UserFrameTotalSize
+
+#endif /* _ASMLANGUAGE || __ASSEMBLER__ */
+
+
+#if XCHAL_NUM_CONTEXTS > 1
+/*  Structure of info stored on new context's stack for setup:  */
+STRUCT_BEGIN
+STRUCT_FIELD (long,4,INFO_,sp)
+STRUCT_FIELD (long,4,INFO_,arg1)
+STRUCT_FIELD (long,4,INFO_,funcpc)
+STRUCT_FIELD (long,4,INFO_,prevps)
+STRUCT_END(SetupInfo)
+#endif
+
+
+#define KERNELSTACKSIZE	1024
+
+
+#endif /* _XTRUNTIME_FRAMES_H_ */
diff --git a/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtruntime.h b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtruntime.h
new file mode 100644
index 00000000000..b6d35184d87
--- /dev/null
+++ b/tools/sdk/esp32s3/include/xtensa/include/xtensa/xtruntime.h
@@ -0,0 +1,236 @@
+/*
+ * xtruntime.h  --  general C definitions for single-threaded run-time
+ *
+ * Copyright (c) 2002-2013 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef XTRUNTIME_H
+#define XTRUNTIME_H
+
+#include <xtensa/config/core.h>
+#include <xtensa/config/specreg.h>
+#include <xtensa/xtruntime-core-state.h>
+
+#ifndef XTSTR
+#define _XTSTR(x)	# x
+#define XTSTR(x)	_XTSTR(x)
+#endif
+
+/*  _xtos_core_shutoff() flags parameter values:  */
+#define XTOS_KEEPON_MEM		0x00000100	/* ==PWRCTL_MEM_WAKEUP */
+#define XTOS_KEEPON_MEM_SHIFT	8
+#define XTOS_KEEPON_DEBUG	0x00001000	/* ==PWRCTL_DEBUG_WAKEUP */
+#define XTOS_KEEPON_DEBUG_SHIFT	12
+
+#define XTOS_IDMA_NO_WAIT	0x00010000	/* Do not wait for idma to finish. Disable if necessary */
+#define XTOS_IDMA_WAIT_STANDBY	0x00020000	/* Also treat standby state as the end of wait */
+
+#define XTOS_COREF_PSO		0x00000001	/* do power shutoff */
+#define XTOS_COREF_PSO_SHIFT	0
+
+#define _xtos_set_execption_handler _xtos_set_exception_handler	/* backward compatibility */
+#define _xtos_set_saved_intenable	_xtos_ints_on	/* backward compatibility */
+#define _xtos_clear_saved_intenable	_xtos_ints_off	/* backward compatibility */
+
+#if !defined(_ASMLANGUAGE) && !defined(__ASSEMBLER__)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(XTOS_MISRA)
+typedef void (_xtos_handler_func)(void *);
+#elif defined(__cplusplus)
+typedef void (_xtos_handler_func)(...);
+#else
+typedef void (_xtos_handler_func)(void);
+#endif
+typedef _xtos_handler_func *_xtos_handler;
+
+/*
+ *  unsigned XTOS_SET_INTLEVEL(int intlevel);
+ *  This macro sets the current interrupt level.
+ *  The 'intlevel' parameter must be a constant.
+ *  This macro returns a 32-bit value that must be passed to
+ *  XTOS_RESTORE_INTLEVEL() to restore the previous interrupt level.
+ *  XTOS_RESTORE_JUST_INTLEVEL() also does this, but in XEA2 configs
+ *  it restores only PS.INTLEVEL rather than the entire PS register
+ *  and thus is slower.
+ */
+#if !XCHAL_HAVE_INTERRUPTS
+# define XTOS_SET_INTLEVEL(intlevel)		0
+# define XTOS_SET_MIN_INTLEVEL(intlevel)	0
+# define XTOS_RESTORE_INTLEVEL(restoreval)
+# define XTOS_RESTORE_JUST_INTLEVEL(restoreval)
+#elif XCHAL_HAVE_XEA2
+/*  In XEA2, we can simply safely set PS.INTLEVEL directly:  */
+/*  NOTE: these asm macros don't modify memory, but they are marked
+ *  as such to act as memory access barriers to the compiler because
+ *  these macros are sometimes used to delineate critical sections;
+ *  function calls are natural barriers (the compiler does not know
+ *  whether a function modifies memory) unless declared to be inlined.  */
+# define XTOS_SET_INTLEVEL(intlevel)	__extension__({ unsigned __tmp; \
+			__asm__ __volatile__(	"rsil	%0, " XTSTR(intlevel) "\n" \
+						: "=a" (__tmp) : : "memory" ); \
+			__tmp;})
+# define XTOS_SET_MIN_INTLEVEL(intlevel)		({ unsigned __tmp, __tmp2, __tmp3; \
+			__asm__ __volatile__(	"rsr.ps	%0\n"		/* get old (current) PS.INTLEVEL */ \
+						"movi	%2, " XTSTR(intlevel) "\n" \
+						"extui	%1, %0, 0, 4\n"	/* keep only INTLEVEL bits of parameter */ \
+						"blt	%2, %1, 1f\n" \
+						"rsil	%0, " XTSTR(intlevel) "\n" \
+						"1:\n" \
+						: "=a" (__tmp), "=&a" (__tmp2), "=&a" (__tmp3) : : "memory" ); \
+			__tmp;})
+# define XTOS_RESTORE_INTLEVEL(restoreval)	do{ unsigned __tmp = (restoreval); \
+			__asm__ __volatile__(	"wsr.ps	%0 ; rsync\n" \
+						: : "a" (__tmp) : "memory" ); \
+			}while(0)
+# define XTOS_RESTORE_JUST_INTLEVEL(restoreval)	_xtos_set_intlevel(restoreval)
+#else
+/*  In XEA1, we have to rely on INTENABLE register virtualization:  */
+extern unsigned		_xtos_set_vpri( unsigned vpri );
+extern unsigned		_xtos_vpri_enabled;	/* current virtual priority */
+# define XTOS_SET_INTLEVEL(intlevel)		_xtos_set_vpri(~XCHAL_INTLEVEL_ANDBELOW_MASK(intlevel))
+# define XTOS_SET_MIN_INTLEVEL(intlevel)	_xtos_set_vpri(_xtos_vpri_enabled & ~XCHAL_INTLEVEL_ANDBELOW_MASK(intlevel))
+# define XTOS_RESTORE_INTLEVEL(restoreval)	_xtos_set_vpri(restoreval)
+# define XTOS_RESTORE_JUST_INTLEVEL(restoreval)	_xtos_set_vpri(restoreval)
+#endif
+
+/*
+ *  The following macros build upon the above.  They are generally used
+ *  instead of invoking the SET_INTLEVEL and SET_MIN_INTLEVEL macros directly.
+ *  They all return a value that can be used with XTOS_RESTORE_INTLEVEL()
+ *  or _xtos_restore_intlevel() or _xtos_restore_just_intlevel() to restore
+ *  the effective interrupt level to what it was before the macro was invoked.
+ *  In XEA2, the DISABLE macros are much faster than the MASK macros
+ *  (in all configs, DISABLE sets the effective interrupt level, whereas MASK
+ *  makes ensures the effective interrupt level is at least the level given
+ *  without lowering it; in XEA2 with INTENABLE virtualization, these macros
+ *  affect PS.INTLEVEL only, not the virtual priority, so DISABLE has partial
+ *  MASK semantics).
+ *
+ *  A typical critical section sequence might be:
+ *	unsigned rval = XTOS_DISABLE_EXCM_INTERRUPTS;
+ *	... critical section ...
+ *	XTOS_RESTORE_INTLEVEL(rval);
+ */
+/*  Enable all interrupts (those activated with _xtos_ints_on()):  */
+#define XTOS_ENABLE_INTERRUPTS		XTOS_SET_INTLEVEL(0)
+/*  Disable low priority level interrupts (they can interact with the OS):  */
+#define XTOS_DISABLE_LOWPRI_INTERRUPTS	XTOS_SET_INTLEVEL(XCHAL_NUM_LOWPRI_LEVELS)
+#define XTOS_MASK_LOWPRI_INTERRUPTS	XTOS_SET_MIN_INTLEVEL(XCHAL_NUM_LOWPRI_LEVELS)
+/*  Disable interrupts that can interact with the OS:  */
+#define XTOS_DISABLE_EXCM_INTERRUPTS	XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL)
+#define XTOS_MASK_EXCM_INTERRUPTS	XTOS_SET_MIN_INTLEVEL(XCHAL_EXCM_LEVEL)
+#if 0 /* XTOS_LOCK_LEVEL is not exported to applications */
+/*  Disable interrupts that can interact with the OS, or manipulate virtual INTENABLE:  */
+#define XTOS_DISABLE_LOCK_INTERRUPTS	XTOS_SET_INTLEVEL(XTOS_LOCK_LEVEL)
+#define XTOS_MASK_LOCK_INTERRUPTS	XTOS_SET_MIN_INTLEVEL(XTOS_LOCK_LEVEL)
+#endif
+/*  Disable ALL interrupts (not for common use, particularly if one's processor
+ *  configuration has high-level interrupts and one cares about their latency):  */
+#define XTOS_DISABLE_ALL_INTERRUPTS	XTOS_SET_INTLEVEL(15)
+
+/*  These two are deprecated. Use the newer functions below.  */
+extern unsigned int	_xtos_ints_off( unsigned int mask );
+extern unsigned int	_xtos_ints_on( unsigned int mask );
+
+/* Newer functions to enable/disable the specified interrupt.  */
+static inline void _xtos_interrupt_enable(unsigned int intnum)
+{
+    _xtos_ints_on(1U << intnum);
+}
+
+static inline void _xtos_interrupt_disable(unsigned int intnum)
+{
+    _xtos_ints_off(1U << intnum);
+}
+
+extern unsigned		_xtos_set_intlevel( int intlevel );
+extern unsigned		_xtos_set_min_intlevel( int intlevel );
+extern unsigned		_xtos_restore_intlevel( unsigned restoreval );
+extern unsigned		_xtos_restore_just_intlevel( unsigned restoreval );
+extern _xtos_handler	_xtos_set_interrupt_handler( int n, _xtos_handler f );
+extern _xtos_handler	_xtos_set_interrupt_handler_arg( int n, _xtos_handler f, void *arg );
+extern _xtos_handler	_xtos_set_exception_handler( int n, _xtos_handler f );
+
+extern void		_xtos_memep_initrams( void );
+extern void		_xtos_memep_enable( int flags );
+
+/*  For use with the tiny LSP (see LSP reference manual).  */
+#if XCHAL_NUM_INTLEVELS >= 1
+extern void		_xtos_dispatch_level1_interrupts( void );
+#endif
+#if XCHAL_NUM_INTLEVELS >= 2
+extern void		_xtos_dispatch_level2_interrupts( void );
+#endif
+#if XCHAL_NUM_INTLEVELS >= 3
+extern void		_xtos_dispatch_level3_interrupts( void );
+#endif
+#if XCHAL_NUM_INTLEVELS >= 4
+extern void		_xtos_dispatch_level4_interrupts( void );
+#endif
+#if XCHAL_NUM_INTLEVELS >= 5
+extern void		_xtos_dispatch_level5_interrupts( void );
+#endif
+#if XCHAL_NUM_INTLEVELS >= 6
+extern void		_xtos_dispatch_level6_interrupts( void );
+#endif
+
+/*  Deprecated (but kept because they were documented):  */
+extern unsigned int	_xtos_read_ints( void );
+extern void		_xtos_clear_ints( unsigned int mask );
+
+
+/*  Power shut-off related routines.  */
+extern int		_xtos_core_shutoff(unsigned flags);
+extern int		_xtos_core_save(unsigned flags, XtosCoreState *savearea, void *code);
+extern void		_xtos_core_restore(unsigned retvalue, XtosCoreState *savearea);
+
+
+#if XCHAL_NUM_CONTEXTS > 1
+extern unsigned		_xtos_init_context(int context_num, int stack_size,
+					    _xtos_handler_func *start_func, int arg1);
+#endif
+
+/*  Deprecated:  */
+#if XCHAL_NUM_TIMERS > 0
+extern void		_xtos_timer_0_delta( int cycles );
+#endif
+#if XCHAL_NUM_TIMERS > 1
+extern void		_xtos_timer_1_delta( int cycles );
+#endif
+#if XCHAL_NUM_TIMERS > 2
+extern void		_xtos_timer_2_delta( int cycles );
+#endif
+#if XCHAL_NUM_TIMERS > 3
+extern void		_xtos_timer_3_delta( int cycles );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !_ASMLANGUAGE && !__ASSEMBLER__ */
+
+#endif /* XTRUNTIME_H */
diff --git a/tools/sdk/esp32s3/ld/esp32s3.peripherals.ld b/tools/sdk/esp32s3/ld/esp32s3.peripherals.ld
new file mode 100644
index 00000000000..27343e9dd9f
--- /dev/null
+++ b/tools/sdk/esp32s3/ld/esp32s3.peripherals.ld
@@ -0,0 +1,48 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+PROVIDE ( UART0 = 0x60000000 );
+PROVIDE ( SPIMEM1 = 0x60002000 );
+PROVIDE ( SPIMEM0 = 0x60003000 );
+PROVIDE ( GPIO = 0x60004000 );
+PROVIDE ( SIGMADELTA = 0x60004f00 );
+PROVIDE ( RTCCNTL = 0x60008000 );
+PROVIDE ( RTCIO = 0x60008400 );
+PROVIDE ( SENS = 0x60008800 );
+PROVIDE ( HINF = 0x6000B000 );
+PROVIDE ( I2S0 = 0x6000F000 );
+PROVIDE ( I2S1 = 0x6002D000 );
+PROVIDE ( UART1 = 0x60010000 );
+PROVIDE ( I2C0 = 0x60013000 );
+PROVIDE ( UHCI0 = 0x60014000 );
+PROVIDE ( UHCI1 = 0x60014000 );
+PROVIDE ( HOST = 0x60015000 );
+PROVIDE ( RMT = 0x60016000 );
+PROVIDE ( RMTMEM = 0x60016800 );
+PROVIDE ( PCNT = 0x60017000 );
+PROVIDE ( SLC = 0x60018000 );
+PROVIDE ( LEDC = 0x60019000 );
+PROVIDE ( MCPWM0 = 0x6001E000 );
+PROVIDE ( MCPWM1 = 0x6002C000 );
+PROVIDE ( MCP = 0x600c3000 );
+PROVIDE ( TIMERG0 = 0x6001F000 );
+PROVIDE ( TIMERG1 = 0x60020000 );
+PROVIDE ( SYSTIMER = 0x60023000 );
+PROVIDE ( GPSPI2  = 0x60024000 );
+PROVIDE ( GPSPI3  = 0x60025000 );
+PROVIDE ( SYSCON = 0x60026000 );
+PROVIDE ( I2C1 = 0x60027000 );
+PROVIDE ( SDMMC = 0x60028000 );
+PROVIDE ( TWAI = 0x6002B000 );
+PROVIDE ( GPSPI4 = 0x60037000 );
+PROVIDE ( GDMA = 0x6003F000 );
+PROVIDE ( UART2  = 0x6002E000 );
+PROVIDE ( DMA = 0x6003F000 );
+PROVIDE ( APB_SARADC = 0x60040000 );
+PROVIDE ( LCD_CAM    = 0x60041000 );
+PROVIDE ( USB_SERIAL_JTAG  = 0x60038000 );
+PROVIDE ( USB0     = 0x60080000 );
+PROVIDE ( USBH     = 0x60080000 );
+PROVIDE ( USB_WRAP = 0x60039000 );
diff --git a/tools/sdk/esp32s3/ld/esp32s3.rom.api.ld b/tools/sdk/esp32s3/ld/esp32s3.rom.api.ld
new file mode 100644
index 00000000000..4d451883931
--- /dev/null
+++ b/tools/sdk/esp32s3/ld/esp32s3.rom.api.ld
@@ -0,0 +1,47 @@
+/**
+ * ROM APIs
+ */
+
+/* user may provide newer version of tjpgd */
+/* so here directly assign the symbols with the ROM API address to make sure one from rom is correctly linked */
+PROVIDE ( esp_rom_tjpgd_decomp = 0x40000864 );
+PROVIDE ( esp_rom_tjpgd_prepare = 0x40000858 );
+
+PROVIDE ( esp_rom_crc32_le = crc32_le );
+PROVIDE ( esp_rom_crc16_le = crc16_le );
+PROVIDE ( esp_rom_crc8_le  = crc8_le );
+PROVIDE ( esp_rom_crc32_be = crc32_be );
+PROVIDE ( esp_rom_crc16_be = crc16_be );
+PROVIDE ( esp_rom_crc8_be  = crc8_be );
+
+PROVIDE ( esp_rom_gpio_pad_select_gpio    = gpio_pad_select_gpio );
+PROVIDE ( esp_rom_gpio_pad_pullup_only    = gpio_pad_pullup );
+PROVIDE ( esp_rom_gpio_pad_set_drv        = gpio_pad_set_drv );
+PROVIDE ( esp_rom_gpio_pad_unhold         = gpio_pad_unhold );
+PROVIDE ( esp_rom_gpio_connect_in_signal  = gpio_matrix_in );
+PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
+
+PROVIDE ( esp_rom_efuse_mac_address_crc8       = esp_crc8 );
+PROVIDE ( esp_rom_efuse_get_flash_gpio_info    = ets_efuse_get_spiconfig );
+PROVIDE ( esp_rom_efuse_get_flash_wp_gpio      = ets_efuse_get_wp_pad );
+PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
+
+PROVIDE ( esp_rom_uart_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
+PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_uart_usb_acm_init   = Uart_Init_USB );
+PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
+
+PROVIDE ( esp_rom_md5_init   = MD5Init );
+PROVIDE ( esp_rom_md5_update = MD5Update );
+PROVIDE ( esp_rom_md5_final  = MD5Final );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
+PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
+PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
+
+PROVIDE( esp_rom_spiflash_attach = spi_flash_attach );
diff --git a/tools/sdk/esp32s3/ld/esp32s3.rom.ld b/tools/sdk/esp32s3/ld/esp32s3.rom.ld
new file mode 100644
index 00000000000..954f027f0d1
--- /dev/null
+++ b/tools/sdk/esp32s3/ld/esp32s3.rom.ld
@@ -0,0 +1,2270 @@
+/* ROM function interface esp32s3.rom.ld for esp32s3
+ *
+ *
+ * Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group common
+ ***************************************/
+
+/* Functions */
+rtc_get_reset_reason = 0x4000057c;
+analog_super_wdt_reset_happened = 0x40000588;
+jtag_cpu_reset_happened = 0x40000594;
+rtc_get_wakeup_cause = 0x400005a0;
+rtc_select_apb_bridge = 0x400005ac;
+rtc_unhold_all_pads = 0x400005b8;
+ets_is_print_boot = 0x400005c4;
+ets_printf = 0x400005d0;
+ets_install_putc1 = 0x400005dc;
+ets_install_uart_printf = 0x400005e8;
+ets_install_putc2 = 0x400005f4;
+PROVIDE( ets_delay_us = 0x40000600 );
+ets_get_stack_info = 0x4000060c;
+ets_install_lock = 0x40000618;
+ets_backup_dma_copy = 0x40000624;
+ets_apb_backup_init_lock_func = 0x40000630;
+UartRxString = 0x4000063c;
+uart_tx_one_char = 0x40000648;
+uart_tx_one_char2 = 0x40000654;
+uart_rx_one_char = 0x40000660;
+uart_rx_one_char_block = 0x4000066c;
+uart_rx_readbuff = 0x40000678;
+uartAttach = 0x40000684;
+uart_tx_flush = 0x40000690;
+uart_tx_wait_idle = 0x4000069c;
+uart_div_modify = 0x400006a8;
+ets_write_char_uart = 0x400006b4;
+uart_tx_switch = 0x400006c0;
+multofup = 0x400006cc;
+software_reset = 0x400006d8;
+software_reset_cpu = 0x400006e4;
+assist_debug_clock_enable = 0x400006f0;
+assist_debug_record_enable = 0x400006fc;
+clear_super_wdt_reset_flag = 0x40000708;
+disable_default_watchdog = 0x40000714;
+ets_set_appcpu_boot_addr = 0x40000720;
+esp_rom_set_rtc_wake_addr = 0x4000072c;
+esp_rom_get_rtc_wake_addr = 0x40000738;
+send_packet = 0x40000744;
+recv_packet = 0x40000750;
+GetUartDevice = 0x4000075c;
+UartDwnLdProc = 0x40000768;
+Uart_Init = 0x40000774;
+ets_set_user_start = 0x40000780;
+/* Data (.data, .bss, .rodata) */
+ets_rom_layout_p = 0x3ff1fffc;
+ets_ops_table_ptr = 0x3fcefffc;
+
+
+/***************************************
+ Group miniz
+ ***************************************/
+
+/* Functions */
+mz_adler32 = 0x4000078c;
+mz_crc32 = 0x40000798;
+mz_free = 0x400007a4;
+tdefl_compress = 0x400007b0;
+tdefl_compress_buffer = 0x400007bc;
+tdefl_compress_mem_to_heap = 0x400007c8;
+tdefl_compress_mem_to_mem = 0x400007d4;
+tdefl_compress_mem_to_output = 0x400007e0;
+tdefl_get_adler32 = 0x400007ec;
+tdefl_get_prev_return_status = 0x400007f8;
+tdefl_init = 0x40000804;
+tdefl_write_image_to_png_file_in_memory = 0x40000810;
+tdefl_write_image_to_png_file_in_memory_ex = 0x4000081c;
+tinfl_decompress = 0x40000828;
+tinfl_decompress_mem_to_callback = 0x40000834;
+tinfl_decompress_mem_to_heap = 0x40000840;
+tinfl_decompress_mem_to_mem = 0x4000084c;
+
+
+/***************************************
+ Group tjpgd
+ ***************************************/
+
+/* Functions */
+PROVIDE( jd_prepare = 0x40000858 );
+PROVIDE (jd_decomp = 0x40000864 );
+
+
+/***************************************
+ Group esp-dsp
+ ***************************************/
+
+/* Data (.data, .bss, .rodata) */
+dsps_fft2r_w_table_fc32_1024 = 0x3fcefff8;
+
+
+/***************************************
+ Group opi_flash
+ ***************************************/
+
+/* Functions */
+PROVIDE( opi_flash_set_lock_func = 0x40000870 );
+PROVIDE( esp_rom_spi_cmd_config = 0x4000087c );
+PROVIDE( esp_rom_spi_cmd_start = 0x40000888 );
+PROVIDE( esp_rom_opiflash_pin_config = 0x40000894 );
+PROVIDE( esp_rom_spi_set_op_mode = 0x400008a0 );
+PROVIDE( esp_rom_opiflash_mode_reset = 0x400008ac );
+PROVIDE( esp_rom_opiflash_exec_cmd = 0x400008b8 );
+PROVIDE( esp_rom_opiflash_soft_reset = 0x400008c4 );
+PROVIDE( esp_rom_opiflash_read_id = 0x400008d0 );
+PROVIDE( esp_rom_opiflash_rdsr = 0x400008dc );
+PROVIDE( esp_rom_opiflash_wait_idle = 0x400008e8 );
+PROVIDE( esp_rom_opiflash_wren = 0x400008f4 );
+PROVIDE( esp_rom_opiflash_erase_sector = 0x40000900 );
+PROVIDE( esp_rom_opiflash_erase_block_64k = 0x4000090c );
+PROVIDE( esp_rom_opiflash_erase_area = 0x40000918 );
+PROVIDE( esp_rom_opiflash_read = 0x40000924 );
+PROVIDE( esp_rom_opiflash_write = 0x40000930 );
+PROVIDE( esp_rom_spi_set_dtr_swap_mode = 0x4000093c );
+PROVIDE( esp_rom_opiflash_exit_continuous_read_mode = 0x40000948 );
+PROVIDE( esp_rom_opiflash_legacy_driver_init = 0x40000954 );
+PROVIDE( esp_rom_opiflash_read_raw = 0x4004d9d4);
+/* Data (.data, .bss, .rodata) */
+PROVIDE( rom_opiflash_cmd_def = 0x3fcefff4 );
+PROVIDE( rom_spi_usr_cmd_legacy_funcs = 0x3fcefff0 );
+
+
+/***************************************
+ Group spiflash_legacy
+ ***************************************/
+
+/* Functions */
+PROVIDE( esp_rom_spiflash_wait_idle = 0x40000960 );
+PROVIDE( esp_rom_spiflash_write_encrypted = 0x4000096c );
+PROVIDE( esp_rom_spiflash_write_encrypted_dest = 0x40000978 );
+PROVIDE( esp_rom_spiflash_write_encrypted_enable = 0x40000984 );
+PROVIDE( esp_rom_spiflash_write_encrypted_disable = 0x40000990 );
+PROVIDE( esp_rom_spiflash_erase_chip = 0x4000099c );
+PROVIDE( _esp_rom_spiflash_erase_sector = 0x400009a8 );
+PROVIDE( _esp_rom_spiflash_erase_block = 0x400009b4 );
+PROVIDE( _esp_rom_spiflash_write = 0x400009c0 );
+PROVIDE( _esp_rom_spiflash_read = 0x400009cc );
+PROVIDE( _esp_rom_spiflash_unlock = 0x400009d8 );
+PROVIDE( _SPIEraseArea = 0x400009e4 );
+PROVIDE( _SPI_write_enable = 0x400009f0 );
+PROVIDE( esp_rom_spiflash_erase_sector = 0x400009fc );
+PROVIDE( esp_rom_spiflash_erase_block = 0x40000a08 );
+PROVIDE( esp_rom_spiflash_write = 0x40000a14 );
+PROVIDE( esp_rom_spiflash_read = 0x40000a20 );
+PROVIDE( esp_rom_spiflash_unlock = 0x40000a2c );
+PROVIDE( SPIEraseArea = 0x40000a38 );
+PROVIDE( SPI_write_enable = 0x40000a44 );
+PROVIDE( esp_rom_spiflash_config_param = 0x40000a50 );
+PROVIDE( esp_rom_spiflash_read_user_cmd = 0x40000a5c );
+PROVIDE( esp_rom_spiflash_select_qio_pins = 0x40000a68 );
+PROVIDE( esp_rom_spi_flash_auto_sus_res = 0x40000a74 );
+PROVIDE( esp_rom_spi_flash_send_resume = 0x40000a80 );
+PROVIDE( esp_rom_spi_flash_update_id = 0x40000a8c );
+PROVIDE( esp_rom_spiflash_config_clk = 0x40000a98 );
+PROVIDE( esp_rom_spiflash_config_readmode = 0x40000aa4 );
+PROVIDE( esp_rom_spiflash_read_status = 0x40000ab0 );
+PROVIDE( esp_rom_spiflash_read_statushigh = 0x40000abc );
+PROVIDE( esp_rom_spiflash_write_status = 0x40000ac8 );
+PROVIDE( esp_rom_opiflash_cache_mode_config = 0x40000ad4 );
+PROVIDE( esp_rom_spiflash_auto_wait_idle = 0x40000ae0 );
+PROVIDE( spi_flash_attach = 0x40000aec );
+PROVIDE( spi_flash_get_chip_size = 0x40000af8 );
+PROVIDE( spi_flash_guard_set = 0x40000b04 );
+PROVIDE( spi_flash_guard_get = 0x40000b10 );
+PROVIDE( spi_flash_write_config_set = 0x40000b1c );
+PROVIDE( spi_flash_write_config_get = 0x40000b28 );
+PROVIDE( spi_flash_safe_write_address_func_set = 0x40000b34 );
+PROVIDE( spi_flash_unlock = 0x40000b40 );
+PROVIDE( spi_flash_erase_range = 0x40000b4c );
+PROVIDE( spi_flash_erase_sector = 0x40000b58 );
+PROVIDE( spi_flash_write = 0x40000b64 );
+PROVIDE( spi_flash_read = 0x40000b70 );
+PROVIDE( spi_flash_write_encrypted = 0x40000b7c );
+PROVIDE( spi_flash_read_encrypted = 0x40000b88 );
+PROVIDE( spi_flash_mmap_os_func_set = 0x40000b94 );
+PROVIDE( spi_flash_mmap_page_num_init = 0x40000ba0 );
+PROVIDE( spi_flash_mmap = 0x40000bac );
+PROVIDE( spi_flash_mmap_pages = 0x40000bb8 );
+PROVIDE( spi_flash_munmap = 0x40000bc4 );
+PROVIDE( spi_flash_mmap_dump = 0x40000bd0 );
+PROVIDE( spi_flash_check_and_flush_cache = 0x40000bdc );
+PROVIDE( spi_flash_mmap_get_free_pages = 0x40000be8 );
+PROVIDE( spi_flash_cache2phys = 0x40000bf4 );
+PROVIDE( spi_flash_phys2cache = 0x40000c00 );
+PROVIDE( spi_flash_disable_cache = 0x40000c0c );
+PROVIDE( spi_flash_restore_cache = 0x40000c18 );
+PROVIDE( spi_flash_cache_enabled = 0x40000c24 );
+PROVIDE( spi_flash_enable_cache = 0x40000c30 );
+PROVIDE( spi_cache_mode_switch = 0x40000c3c );
+PROVIDE( spi_common_set_dummy_output = 0x40000c48 );
+PROVIDE( spi_common_set_flash_cs_timing = 0x40000c54 );
+PROVIDE( esp_rom_spi_set_address_bit_len = 0x40000c60 );
+PROVIDE( esp_enable_cache_flash_wrap = 0x40000c6c );
+PROVIDE( SPILock = 0x40000c78 );
+PROVIDE( SPIMasterReadModeCnfig = 0x40000c84 );
+PROVIDE( SPI_Common_Command = 0x40000c90 );
+PROVIDE( SPI_WakeUp = 0x40000c9c );
+PROVIDE( SPI_block_erase = 0x40000ca8 );
+PROVIDE( SPI_chip_erase = 0x40000cb4 );
+PROVIDE( SPI_init = 0x40000cc0 );
+PROVIDE( SPI_page_program = 0x40000ccc );
+PROVIDE( SPI_read_data = 0x40000cd8 );
+PROVIDE( SPI_sector_erase = 0x40000ce4 );
+PROVIDE( SelectSpiFunction = 0x40000cf0 );
+PROVIDE( SetSpiDrvs = 0x40000cfc );
+PROVIDE( Wait_SPI_Idle = 0x40000d08 );
+PROVIDE( spi_dummy_len_fix = 0x40000d14 );
+PROVIDE( Disable_QMode = 0x40000d20 );
+PROVIDE( Enable_QMode = 0x40000d2c );
+/* Data (.data, .bss, .rodata) */
+PROVIDE( rom_spiflash_legacy_funcs = 0x3fceffe8 );
+PROVIDE( rom_spiflash_legacy_data = 0x3fceffe4 );
+PROVIDE( g_flash_guard_ops = 0x3fceffec );
+
+
+/***************************************
+ Group hal_soc
+ ***************************************/
+
+/* Functions */
+PROVIDE( spi_flash_hal_poll_cmd_done = 0x40000d38 );
+PROVIDE( spi_flash_hal_device_config = 0x40000d44 );
+PROVIDE( spi_flash_hal_configure_host_io_mode = 0x40000d50 );
+PROVIDE( spi_flash_hal_common_command = 0x40000d5c );
+PROVIDE( spi_flash_hal_read = 0x40000d68 );
+PROVIDE( spi_flash_hal_erase_chip = 0x40000d74 );
+PROVIDE( spi_flash_hal_erase_sector = 0x40000d80 );
+PROVIDE( spi_flash_hal_erase_block = 0x40000d8c );
+PROVIDE( spi_flash_hal_program_page = 0x40000d98 );
+PROVIDE( spi_flash_hal_set_write_protect = 0x40000da4 );
+PROVIDE( spi_flash_hal_host_idle = 0x40000db0 );
+PROVIDE( wdt_hal_init = 0x40000dbc );
+PROVIDE( wdt_hal_deinit = 0x40000dc8 );
+PROVIDE( wdt_hal_config_stage = 0x40000dd4 );
+PROVIDE( wdt_hal_write_protect_disable = 0x40000de0 );
+PROVIDE( wdt_hal_write_protect_enable = 0x40000dec );
+PROVIDE( wdt_hal_enable = 0x40000df8 );
+PROVIDE( wdt_hal_disable = 0x40000e04 );
+PROVIDE( wdt_hal_handle_intr = 0x40000e10 );
+PROVIDE( wdt_hal_feed = 0x40000e1c );
+PROVIDE( wdt_hal_set_flashboot_en = 0x40000e28 );
+PROVIDE( wdt_hal_is_enabled = 0x40000e34 );
+PROVIDE( systimer_hal_get_counter_value = 0x40000e40 );
+PROVIDE( systimer_hal_get_time = 0x40000e4c );
+PROVIDE( systimer_hal_set_alarm_target = 0x40000e58 );
+PROVIDE( systimer_hal_set_alarm_period = 0x40000e64 );
+PROVIDE( systimer_hal_get_alarm_value = 0x40000e70 );
+PROVIDE( systimer_hal_enable_alarm_int = 0x40000e7c );
+PROVIDE( systimer_hal_on_apb_freq_update = 0x40000e88 );
+PROVIDE( systimer_hal_counter_value_advance = 0x40000e94 );
+PROVIDE( systimer_hal_enable_counter = 0x40000ea0 );
+PROVIDE( systimer_hal_init = 0x40000eac );
+PROVIDE( systimer_hal_select_alarm_mode = 0x40000eb8 );
+PROVIDE( systimer_hal_connect_alarm_counter = 0x40000ec4 );
+
+
+/***************************************
+ Group spi_flash_chips
+ ***************************************/
+
+/* Functions */
+PROVIDE( spi_flash_chip_generic_probe = 0x40000ed0 );
+PROVIDE( spi_flash_chip_generic_detect_size = 0x40000edc );
+PROVIDE( spi_flash_chip_generic_write = 0x40000ee8 );
+PROVIDE( spi_flash_chip_generic_write_encrypted = 0x40000ef4 );
+PROVIDE( spi_flash_chip_generic_set_write_protect = 0x40000f00 );
+PROVIDE( spi_flash_common_write_status_16b_wrsr = 0x40000f0c );
+PROVIDE( spi_flash_chip_generic_reset = 0x40000f18 );
+PROVIDE( spi_flash_chip_generic_erase_chip = 0x40000f24 );
+PROVIDE( spi_flash_chip_generic_erase_sector = 0x40000f30 );
+PROVIDE( spi_flash_chip_generic_erase_block = 0x40000f3c );
+PROVIDE( spi_flash_chip_generic_page_program = 0x40000f48 );
+PROVIDE( spi_flash_chip_generic_get_write_protect = 0x40000f54 );
+PROVIDE( spi_flash_common_read_status_16b_rdsr_rdsr2 = 0x40000f60 );
+PROVIDE( spi_flash_chip_generic_read_reg = 0x40000f6c );
+PROVIDE( spi_flash_chip_generic_yield = 0x40000f78 );
+PROVIDE( spi_flash_generic_wait_host_idle = 0x40000f84 );
+PROVIDE( spi_flash_chip_generic_wait_idle = 0x40000f90 );
+PROVIDE( spi_flash_chip_generic_config_host_io_mode = 0x40000f9c );
+PROVIDE( spi_flash_chip_generic_read = 0x40000fa8 );
+PROVIDE( spi_flash_common_read_status_8b_rdsr2 = 0x40000fb4 );
+PROVIDE( spi_flash_chip_generic_get_io_mode = 0x40000fc0 );
+PROVIDE( spi_flash_common_read_status_8b_rdsr = 0x40000fcc );
+PROVIDE( spi_flash_common_write_status_8b_wrsr = 0x40000fd8 );
+PROVIDE( spi_flash_common_write_status_8b_wrsr2 = 0x40000fe4 );
+PROVIDE( spi_flash_common_set_io_mode = 0x40000ff0 );
+PROVIDE( spi_flash_chip_generic_set_io_mode = 0x40000ffc );
+PROVIDE( spi_flash_chip_gd_get_io_mode = 0x40001008 );
+PROVIDE( spi_flash_chip_gd_probe = 0x40001014 );
+PROVIDE( spi_flash_chip_gd_set_io_mode = 0x40001020 );
+/* Data (.data, .bss, .rodata) */
+PROVIDE( spi_flash_chip_generic_config_data = 0x3fceffe0 );
+
+
+/***************************************
+ Group memspi_host
+ ***************************************/
+
+/* Functions */
+PROVIDE( memspi_host_read_id_hs = 0x4000102c );
+PROVIDE( memspi_host_read_status_hs = 0x40001038 );
+PROVIDE( memspi_host_flush_cache = 0x40001044 );
+PROVIDE( memspi_host_erase_chip = 0x40001050 );
+PROVIDE( memspi_host_erase_sector = 0x4000105c );
+PROVIDE( memspi_host_erase_block = 0x40001068 );
+PROVIDE( memspi_host_program_page = 0x40001074 );
+PROVIDE( memspi_host_read = 0x40001080 );
+PROVIDE( memspi_host_set_write_protect = 0x4000108c );
+PROVIDE( memspi_host_set_max_read_len = 0x40001098 );
+PROVIDE( memspi_host_read_data_slicer = 0x400010a4 );
+PROVIDE( memspi_host_write_data_slicer = 0x400010b0 );
+
+
+/***************************************
+ Group esp_flash
+ ***************************************/
+
+/* Functions */
+PROVIDE( esp_flash_chip_driver_initialized = 0x400010bc );
+PROVIDE( esp_flash_read_id = 0x400010c8 );
+PROVIDE( esp_flash_get_size = 0x400010d4 );
+PROVIDE( esp_flash_erase_chip = 0x400010e0 );
+PROVIDE( rom_esp_flash_erase_region = 0x400010ec );
+PROVIDE( esp_flash_get_chip_write_protect = 0x400010f8 );
+PROVIDE( esp_flash_set_chip_write_protect = 0x40001104 );
+PROVIDE( esp_flash_get_protectable_regions = 0x40001110 );
+PROVIDE( esp_flash_get_protected_region = 0x4000111c );
+PROVIDE( esp_flash_set_protected_region = 0x40001128 );
+PROVIDE( esp_flash_read = 0x40001134 );
+PROVIDE( esp_flash_write = 0x40001140 );
+PROVIDE( esp_flash_write_encrypted = 0x4000114c );
+PROVIDE( esp_flash_read_encrypted = 0x40001158 );
+PROVIDE( esp_flash_get_io_mode = 0x40001164 );
+PROVIDE( esp_flash_set_io_mode = 0x40001170 );
+PROVIDE( spi_flash_boot_attach = 0x4000117c );
+PROVIDE( spi_flash_dump_counters = 0x40001188 );
+PROVIDE( spi_flash_get_counters = 0x40001194 );
+PROVIDE( spi_flash_op_counters_config = 0x400011a0 );
+PROVIDE( spi_flash_reset_counters = 0x400011ac );
+PROVIDE( esp_flash_read_chip_id = 0x400011b8 );
+PROVIDE( detect_spi_flash_chip = 0x400011c4 );
+PROVIDE( esp_rom_spiflash_write_disable = 0x400011d0 );
+/* Data (.data, .bss, .rodata) */
+PROVIDE( esp_flash_default_chip = 0x3fceffdc );
+PROVIDE( esp_flash_api_funcs = 0x3fceffd8 );
+
+
+/***************************************
+ Group cache
+ ***************************************/
+
+/* Functions */
+PROVIDE( Cache_Get_ICache_Line_Size = 0x400015fc );
+PROVIDE( Cache_Get_DCache_Line_Size = 0x40001608 );
+PROVIDE( Cache_Get_Mode = 0x40001614 );
+PROVIDE( Cache_Set_ICache_Mode = 0x40001620 );
+PROVIDE( Cache_Set_DCache_Mode = 0x4000162c );
+PROVIDE( Cache_Address_Through_ICache = 0x40001638 );
+PROVIDE( Cache_Address_Through_DCache = 0x40001644 );
+PROVIDE( Cache_Set_Default_Mode = 0x40001650 );
+PROVIDE( Cache_Enable_Defalut_ICache_Mode = 0x4000165c );
+PROVIDE( ROM_Boot_Cache_Init = 0x40001668 );
+PROVIDE( Cache_Invalidate_ICache_Items = 0x40001674 );
+PROVIDE( Cache_Invalidate_DCache_Items = 0x40001680 );
+PROVIDE( Cache_Clean_Items = 0x4000168c );
+PROVIDE( Cache_WriteBack_Items = 0x40001698 );
+PROVIDE( Cache_Op_Addr = 0x400016a4 );
+PROVIDE( Cache_Invalidate_Addr = 0x400016b0 );
+PROVIDE( Cache_Clean_Addr = 0x400016bc );
+PROVIDE( Cache_WriteBack_Addr = 0x400016c8 );
+PROVIDE( Cache_Invalidate_ICache_All = 0x400016d4 );
+PROVIDE( Cache_Invalidate_DCache_All = 0x400016e0 );
+PROVIDE( Cache_Clean_All = 0x400016ec );
+PROVIDE( Cache_WriteBack_All = 0x400016f8 );
+PROVIDE( Cache_Mask_All = 0x40001704 );
+PROVIDE( Cache_UnMask_Dram0 = 0x40001710 );
+PROVIDE( Cache_Suspend_ICache_Autoload = 0x4000171c );
+PROVIDE( Cache_Resume_ICache_Autoload = 0x40001728 );
+PROVIDE( Cache_Suspend_DCache_Autoload = 0x40001734 );
+PROVIDE( Cache_Resume_DCache_Autoload = 0x40001740 );
+PROVIDE( Cache_Start_ICache_Preload = 0x4000174c );
+PROVIDE( Cache_ICache_Preload_Done = 0x40001758 );
+PROVIDE( Cache_End_ICache_Preload = 0x40001764 );
+PROVIDE( Cache_Start_DCache_Preload = 0x40001770 );
+PROVIDE( Cache_DCache_Preload_Done = 0x4000177c );
+PROVIDE( Cache_End_DCache_Preload = 0x40001788 );
+PROVIDE( Cache_Config_ICache_Autoload = 0x40001794 );
+PROVIDE( Cache_Config_ICache_Region_Autoload = 0x400017a0 );
+PROVIDE( Cache_Enable_ICache_Autoload = 0x400017ac );
+PROVIDE( Cache_Disable_ICache_Autoload = 0x400017b8 );
+PROVIDE( Cache_Config_DCache_Autoload = 0x400017c4 );
+PROVIDE( Cache_Config_DCache_Region_Autoload = 0x400017d0 );
+PROVIDE( Cache_Enable_DCache_Autoload = 0x400017dc );
+PROVIDE( Cache_Disable_DCache_Autoload = 0x400017e8 );
+PROVIDE( Cache_Enable_ICache_PreLock = 0x400017f4 );
+PROVIDE( Cache_Disable_ICache_PreLock = 0x40001800 );
+PROVIDE( Cache_Lock_ICache_Items = 0x4000180c );
+PROVIDE( Cache_Unlock_ICache_Items = 0x40001818 );
+PROVIDE( Cache_Enable_DCache_PreLock = 0x40001824 );
+PROVIDE( Cache_Disable_DCache_PreLock = 0x40001830 );
+PROVIDE( Cache_Lock_DCache_Items = 0x4000183c );
+PROVIDE( Cache_Unlock_DCache_Items = 0x40001848 );
+PROVIDE( Cache_Lock_Addr = 0x40001854 );
+PROVIDE( Cache_Unlock_Addr = 0x40001860 );
+PROVIDE( Cache_Disable_ICache = 0x4000186c );
+PROVIDE( Cache_Enable_ICache = 0x40001878 );
+PROVIDE( Cache_Disable_DCache = 0x40001884 );
+PROVIDE( Cache_Enable_DCache = 0x40001890 );
+PROVIDE( Cache_Suspend_ICache = 0x4000189c );
+PROVIDE( Cache_Resume_ICache = 0x400018a8 );
+PROVIDE( Cache_Suspend_DCache = 0x400018b4 );
+PROVIDE( Cache_Resume_DCache = 0x400018c0 );
+PROVIDE( Cache_Occupy_Items = 0x400018cc );
+PROVIDE( Cache_Occupy_Addr = 0x400018d8 );
+PROVIDE( Cache_Freeze_ICache_Enable = 0x400018e4 );
+PROVIDE( Cache_Freeze_ICache_Disable = 0x400018f0 );
+PROVIDE( Cache_Freeze_DCache_Enable = 0x400018fc );
+PROVIDE( Cache_Freeze_DCache_Disable = 0x40001908 );
+PROVIDE( Cache_Set_IDROM_MMU_Size = 0x40001914 );
+PROVIDE( flash2spiram_instruction_offset = 0x40001920 );
+PROVIDE( flash2spiram_rodata_offset = 0x4000192c );
+PROVIDE( flash_instr_rodata_start_page = 0x40001938 );
+PROVIDE( flash_instr_rodata_end_page = 0x40001944 );
+PROVIDE( Cache_Set_IDROM_MMU_Info = 0x40001950 );
+PROVIDE( Cache_Get_IROM_MMU_End = 0x4000195c );
+PROVIDE( Cache_Get_DROM_MMU_End = 0x40001968 );
+PROVIDE( Cache_Owner_Init = 0x40001974 );
+PROVIDE( Cache_Occupy_ICache_MEMORY = 0x40001980 );
+PROVIDE( Cache_Occupy_DCache_MEMORY = 0x4000198c );
+PROVIDE( Cache_MMU_Init = 0x40001998 );
+PROVIDE( Cache_Ibus_MMU_Set = 0x400019a4 );
+PROVIDE( Cache_Dbus_MMU_Set = 0x400019b0 );
+PROVIDE( Cache_Count_Flash_Pages = 0x400019bc );
+PROVIDE( Cache_Flash_To_SPIRAM_Copy = 0x400019c8 );
+PROVIDE( Cache_Travel_Tag_Memory = 0x400019d4 );
+PROVIDE( Cache_Travel_Tag_Memory2 = 0x400019e0 );
+PROVIDE( Cache_Get_Virtual_Addr = 0x400019ec );
+PROVIDE( Cache_Get_Memory_BaseAddr = 0x400019f8 );
+PROVIDE( Cache_Get_Memory_Addr = 0x40001a04 );
+PROVIDE( Cache_Get_Memory_value = 0x40001a10 );
+PROVIDE( rom_config_instruction_cache_mode = 0x40001a1c );
+PROVIDE( rom_config_data_cache_mode = 0x40001a28 );
+/* Data (.data, .bss, .rodata) */
+PROVIDE( rom_cache_op_cb = 0x3fceffc8 );
+PROVIDE( rom_cache_internal_table_ptr = 0x3fceffc4 );
+
+
+/***************************************
+ Group clock
+ ***************************************/
+
+/* Functions */
+ets_get_apb_freq = 0x40001a34;
+ets_get_cpu_frequency = 0x40001a40;
+ets_update_cpu_frequency = 0x40001a4c;
+ets_get_printf_channel = 0x40001a58;
+ets_get_xtal_div = 0x40001a64;
+ets_set_xtal_div = 0x40001a70;
+ets_get_xtal_freq = 0x40001a7c;
+
+
+/***************************************
+ Group gpio
+ ***************************************/
+
+/* Functions */
+gpio_input_get = 0x40001a88;
+gpio_matrix_in = 0x40001a94;
+gpio_matrix_out = 0x40001aa0;
+gpio_output_disable = 0x40001aac;
+gpio_output_enable = 0x40001ab8;
+gpio_output_set = 0x40001ac4;
+gpio_pad_hold = 0x40001ad0;
+gpio_pad_input_disable = 0x40001adc;
+gpio_pad_input_enable = 0x40001ae8;
+gpio_pad_pulldown = 0x40001af4;
+gpio_pad_pullup = 0x40001b00;
+gpio_pad_select_gpio = 0x40001b0c;
+gpio_pad_set_drv = 0x40001b18;
+gpio_pad_unhold = 0x40001b24;
+gpio_pin_wakeup_disable = 0x40001b30;
+gpio_pin_wakeup_enable = 0x40001b3c;
+gpio_bypass_matrix_in = 0x40001b48;
+
+
+/***************************************
+ Group interrupts
+ ***************************************/
+
+/* Functions */
+intr_matrix_set = 0x40001b54;
+ets_intr_lock = 0x40001b60;
+ets_intr_unlock = 0x40001b6c;
+ets_isr_attach = 0x40001b78;
+ets_isr_mask = 0x40001b84;
+ets_isr_unmask = 0x40001b90;
+
+
+/***************************************
+ Group xtos
+ ***************************************/
+
+/* Functions */
+xthal_bcopy = 0x40001b9c;
+xthal_memcpy = 0x40001ba8;
+xthal_get_ccompare = 0x40001bb4;
+xthal_set_ccompare = 0x40001bc0;
+xthal_get_ccount = 0x40001bcc;
+xthal_get_interrupt = 0x40001bd8;
+xthal_set_intclear = 0x40001be4;
+_xtos_ints_off = 0x40001bf0;
+_xtos_ints_on = 0x40001bfc;
+_xtos_restore_intlevel = 0x40001c08;
+_xtos_set_exception_handler = 0x40001c14;
+_xtos_set_interrupt_handler = 0x40001c20;
+_xtos_set_interrupt_handler_arg = 0x40001c2c;
+_xtos_set_intlevel = 0x40001c38;
+_xtos_set_vpri = 0x40001c44;
+
+
+/***************************************
+ Group crypto
+ ***************************************/
+
+/* Functions */
+md5_vector = 0x40001c50;
+MD5Init = 0x40001c5c;
+MD5Update = 0x40001c68;
+MD5Final = 0x40001c74;
+hmac_md5_vector = 0x40001c80;
+hmac_md5 = 0x40001c8c;
+crc32_le = 0x40001c98;
+crc32_be = 0x40001ca4;
+crc16_le = 0x40001cb0;
+crc16_be = 0x40001cbc;
+crc8_le = 0x40001cc8;
+crc8_be = 0x40001cd4;
+esp_crc8 = 0x40001ce0;
+ets_sha_enable = 0x40001cec;
+ets_sha_disable = 0x40001cf8;
+ets_sha_get_state = 0x40001d04;
+ets_sha_init = 0x40001d10;
+ets_sha_process = 0x40001d1c;
+ets_sha_starts = 0x40001d28;
+ets_sha_update = 0x40001d34;
+ets_sha_finish = 0x40001d40;
+ets_sha_clone = 0x40001d4c;
+ets_hmac_enable = 0x40001d58;
+ets_hmac_disable = 0x40001d64;
+ets_hmac_calculate_message = 0x40001d70;
+ets_hmac_calculate_downstream = 0x40001d7c;
+ets_hmac_invalidate_downstream = 0x40001d88;
+ets_jtag_enable_temporarily = 0x40001d94;
+ets_aes_enable = 0x40001da0;
+ets_aes_disable = 0x40001dac;
+ets_aes_setkey = 0x40001db8;
+ets_aes_block = 0x40001dc4;
+ets_bigint_enable = 0x40001dd0;
+ets_bigint_disable = 0x40001ddc;
+ets_bigint_multiply = 0x40001de8;
+ets_bigint_modmult = 0x40001df4;
+ets_bigint_modexp = 0x40001e00;
+ets_bigint_wait_finish = 0x40001e0c;
+ets_bigint_getz = 0x40001e18;
+ets_ds_enable = 0x40001e24;
+ets_ds_disable = 0x40001e30;
+ets_ds_start_sign = 0x40001e3c;
+ets_ds_is_busy = 0x40001e48;
+ets_ds_finish_sign = 0x40001e54;
+ets_ds_encrypt_params = 0x40001e60;
+ets_aes_setkey_dec = 0x40001e6c;
+ets_aes_setkey_enc = 0x40001e78;
+ets_mgf1_sha256 = 0x40001e84;
+
+
+/***************************************
+ Group efuse
+ ***************************************/
+
+/* Functions */
+ets_efuse_read = 0x40001e90;
+ets_efuse_program = 0x40001e9c;
+ets_efuse_clear_program_registers = 0x40001ea8;
+ets_efuse_write_key = 0x40001eb4;
+ets_efuse_get_read_register_address = 0x40001ec0;
+ets_efuse_get_key_purpose = 0x40001ecc;
+ets_efuse_key_block_unused = 0x40001ed8;
+ets_efuse_find_unused_key_block = 0x40001ee4;
+ets_efuse_rs_calculate = 0x40001ef0;
+ets_efuse_count_unused_key_blocks = 0x40001efc;
+ets_efuse_secure_boot_enabled = 0x40001f08;
+ets_efuse_secure_boot_aggressive_revoke_enabled = 0x40001f14;
+ets_efuse_cache_encryption_enabled = 0x40001f20;
+ets_efuse_download_modes_disabled = 0x40001f2c;
+ets_efuse_find_purpose = 0x40001f38;
+ets_efuse_flash_opi_5pads_power_sel_vddspi = 0x40001f44;
+ets_efuse_force_send_resume = 0x40001f50;
+ets_efuse_get_flash_delay_us = 0x40001f5c;
+ets_efuse_get_mac = 0x40001f68;
+ets_efuse_get_spiconfig = 0x40001f74;
+ets_efuse_usb_print_is_disabled = 0x40001f80;
+ets_efuse_get_uart_print_channel = 0x40001f8c;
+ets_efuse_get_uart_print_control = 0x40001f98;
+ets_efuse_get_wp_pad = 0x40001fa4;
+ets_efuse_legacy_spi_boot_mode_disabled = 0x40001fb0;
+ets_efuse_security_download_modes_enabled = 0x40001fbc;
+ets_efuse_set_timing = 0x40001fc8;
+ets_efuse_jtag_disabled = 0x40001fd4;
+ets_efuse_usb_download_mode_disabled = 0x40001fe0;
+ets_efuse_usb_module_disabled = 0x40001fec;
+ets_efuse_usb_device_disabled = 0x40001ff8;
+ets_efuse_flash_octal_mode = 0x40002004;
+ets_efuse_ecc_en = 0x40002010;
+ets_efuse_ecc_flash_page_size = 0x4000201c;
+ets_efuse_ecc_16to17_mode = 0x40002028;
+
+
+/***************************************
+ Group ecc
+ ***************************************/
+
+/* Functions */
+ets_ecc_flash_enable = 0x40002034;
+ets_ecc_flash_enable_all = 0x40002040;
+ets_ecc_flash_disable = 0x4000204c;
+ets_ecc_flash_disable_all = 0x40002058;
+ets_ecc_get_flash_page_size = 0x40002064;
+ets_ecc_set_flash_page_size = 0x40002070;
+ets_ecc_set_flash_byte_mode = 0x4000207c;
+ets_ecc_get_flash_byte_mode = 0x40002088;
+ets_ecc_set_flash_range = 0x40002094;
+ets_ecc_get_flash_range = 0x400020a0;
+ets_ecc_sram_enable = 0x400020ac;
+ets_ecc_sram_disable = 0x400020b8;
+ets_ecc_sram_enable_all = 0x400020c4;
+ets_ecc_sram_disable_all = 0x400020d0;
+ets_ecc_get_sram_page_size = 0x400020dc;
+ets_ecc_set_sram_page_size = 0x400020e8;
+ets_ecc_get_sram_byte_mode = 0x400020f4;
+ets_ecc_set_sram_byte_mode = 0x40002100;
+ets_ecc_set_sram_range = 0x4000210c;
+ets_ecc_get_sram_range = 0x40002118;
+/* Data (.data, .bss, .rodata) */
+ets_ecc_table_ptr = 0x3fceffc0;
+
+
+/***************************************
+ Group secureboot
+ ***************************************/
+
+/* Functions */
+ets_emsa_pss_verify = 0x40002124;
+ets_rsa_pss_verify = 0x40002130;
+ets_secure_boot_verify_bootloader_with_keys = 0x4000213c;
+ets_secure_boot_verify_signature = 0x40002148;
+ets_secure_boot_read_key_digests = 0x40002154;
+ets_secure_boot_revoke_public_key_digest = 0x40002160;
+
+
+/***************************************
+ Group usb_uart
+ ***************************************/
+
+/* Functions */
+PROVIDE( usb_uart_otg_rx_one_char = 0x400025a4 );
+PROVIDE( usb_uart_otg_rx_one_char_block = 0x400025b0 );
+PROVIDE( usb_uart_otg_tx_flush = 0x400025bc );
+PROVIDE( usb_uart_otg_tx_one_char = 0x400025c8 );
+PROVIDE( usb_uart_device_rx_one_char = 0x400025d4 );
+PROVIDE( usb_uart_device_rx_one_char_block = 0x400025e0 );
+PROVIDE( usb_uart_device_tx_flush = 0x400025ec );
+PROVIDE( usb_uart_device_tx_one_char = 0x400025f8 );
+PROVIDE( Uart_Init_USB = 0x40002604 );
+/* Data (.data, .bss, .rodata) */
+PROVIDE( uart_acm_dev = 0x3fceffbc );
+PROVIDE( g_uart_print = 0x3fceffb9 );
+PROVIDE( g_usb_print = 0x3fceffb8 );
+
+
+/***************************************
+ Group usb_module
+ ***************************************/
+
+/* Functions */
+cdc_acm_class_handle_req = 0x40002610;
+cdc_acm_init = 0x4000261c;
+cdc_acm_fifo_fill = 0x40002628;
+cdc_acm_rx_fifo_cnt = 0x40002634;
+cdc_acm_fifo_read = 0x40002640;
+cdc_acm_irq_tx_enable = 0x4000264c;
+cdc_acm_irq_tx_disable = 0x40002658;
+cdc_acm_irq_state_enable = 0x40002664;
+cdc_acm_irq_state_disable = 0x40002670;
+cdc_acm_irq_tx_ready = 0x4000267c;
+cdc_acm_irq_rx_enable = 0x40002688;
+cdc_acm_irq_rx_disable = 0x40002694;
+cdc_acm_irq_rx_ready = 0x400026a0;
+cdc_acm_irq_is_pending = 0x400026ac;
+cdc_acm_irq_callback_set = 0x400026b8;
+cdc_acm_line_ctrl_set = 0x400026c4;
+cdc_acm_line_ctrl_get = 0x400026d0;
+cdc_acm_poll_out = 0x400026dc;
+chip_usb_dw_did_persist = 0x400026e8;
+chip_usb_dw_init = 0x400026f4;
+chip_usb_detach = 0x40002700;
+chip_usb_dw_prepare_persist = 0x4000270c;
+chip_usb_get_persist_flags = 0x40002718;
+chip_usb_set_persist_flags = 0x40002724;
+cpio_start = 0x40002730;
+cpio_feed = 0x4000273c;
+cpio_done = 0x40002748;
+cpio_destroy = 0x40002754;
+dfu_flash_init = 0x40002760;
+dfu_flash_erase = 0x4000276c;
+dfu_flash_program = 0x40002778;
+dfu_flash_read = 0x40002784;
+dfu_flash_attach = 0x40002790;
+dfu_cpio_callback = 0x4000279c;
+dfu_updater_get_err = 0x400027a8;
+dfu_updater_clear_err = 0x400027b4;
+dfu_updater_enable = 0x400027c0;
+dfu_updater_begin = 0x400027cc;
+dfu_updater_feed = 0x400027d8;
+dfu_updater_end = 0x400027e4;
+dfu_updater_set_raw_addr = 0x400027f0;
+dfu_updater_flash_read = 0x400027fc;
+usb_dc_prepare_persist = 0x40002808;
+usb_dw_isr_handler = 0x40002814;
+usb_dc_attach = 0x40002820;
+usb_dc_detach = 0x4000282c;
+usb_dc_reset = 0x40002838;
+usb_dc_set_address = 0x40002844;
+usb_dc_ep_check_cap = 0x40002850;
+usb_dc_ep_configure = 0x4000285c;
+usb_dc_ep_set_stall = 0x40002868;
+usb_dc_ep_clear_stall = 0x40002874;
+usb_dc_ep_halt = 0x40002880;
+usb_dc_ep_is_stalled = 0x4000288c;
+usb_dc_ep_enable = 0x40002898;
+usb_dc_ep_disable = 0x400028a4;
+usb_dc_ep_flush = 0x400028b0;
+usb_dc_ep_write_would_block = 0x400028bc;
+usb_dc_ep_write = 0x400028c8;
+usb_dc_ep_read_wait = 0x400028d4;
+usb_dc_ep_read_continue = 0x400028e0;
+usb_dc_ep_read = 0x400028ec;
+usb_dc_ep_set_callback = 0x400028f8;
+usb_dc_set_status_callback = 0x40002904;
+usb_dc_ep_mps = 0x40002910;
+usb_dc_check_poll_for_interrupts = 0x4000291c;
+mac_addr_to_serial_str_desc = 0x40002928;
+usb_set_current_descriptor = 0x40002934;
+usb_get_descriptor = 0x40002940;
+usb_dev_resume = 0x4000294c;
+usb_dev_get_configuration = 0x40002958;
+usb_set_config = 0x40002964;
+usb_deconfig = 0x40002970;
+usb_enable = 0x4000297c;
+usb_disable = 0x40002988;
+usb_write_would_block = 0x40002994;
+usb_write = 0x400029a0;
+usb_read = 0x400029ac;
+usb_ep_set_stall = 0x400029b8;
+usb_ep_clear_stall = 0x400029c4;
+usb_ep_read_wait = 0x400029d0;
+usb_ep_read_continue = 0x400029dc;
+usb_transfer_ep_callback = 0x400029e8;
+usb_transfer = 0x400029f4;
+usb_cancel_transfer = 0x40002a00;
+usb_transfer_sync = 0x40002a0c;
+usb_dfu_set_detach_cb = 0x40002a18;
+dfu_class_handle_req = 0x40002a24;
+dfu_status_cb = 0x40002a30;
+dfu_custom_handle_req = 0x40002a3c;
+usb_dfu_init = 0x40002a48;
+usb_dfu_force_detach = 0x40002a54;
+usb_dev_deinit = 0x40002a60;
+usb_dw_ctrl_deinit = 0x40002a6c;
+/* Data (.data, .bss, .rodata) */
+s_usb_osglue = 0x3fceffac;
+
+
+/***************************************
+ Group bluetooth
+ ***************************************/
+
+/* Functions */
+bt_rf_coex_get_dft_cfg = 0x40002a78;
+bt_rf_coex_hooks_p_set = 0x40002a84;
+btdm_con_maxevtime_cal_impl = 0x40002a90;
+btdm_controller_get_compile_version_impl = 0x40002a9c;
+btdm_controller_rom_data_init = 0x40002aa8;
+btdm_dis_privacy_err_report_impl = 0x40002ab4;
+btdm_disable_adv_delay_impl = 0x40002ac0;
+btdm_enable_scan_continue_impl = 0x40002acc;
+btdm_enable_scan_forever_impl = 0x40002ad8;
+btdm_get_power_state_impl = 0x40002ae4;
+btdm_get_prevent_sleep_flag_impl = 0x40002af0;
+btdm_power_state_active_impl = 0x40002afc;
+btdm_switch_phy_coded_impl = 0x40002b08;
+hci_acl_data_handler = 0x40002b14;
+hci_disconnect_cmd_handler = 0x40002b20;
+hci_le_con_upd_cmd_handler = 0x40002b2c;
+hci_le_ltk_req_neg_reply_cmd_handler = 0x40002b38;
+hci_le_ltk_req_reply_cmd_handler = 0x40002b44;
+hci_le_rd_chnl_map_cmd_handler = 0x40002b50;
+hci_le_rd_phy_cmd_handler = 0x40002b5c;
+hci_le_rd_rem_feats_cmd_handler = 0x40002b68;
+hci_le_rem_con_param_req_neg_reply_cmd_handler = 0x40002b74;
+hci_le_rem_con_param_req_reply_cmd_handler = 0x40002b80;
+hci_le_set_data_len_cmd_handler = 0x40002b8c;
+hci_le_set_phy_cmd_handler = 0x40002b98;
+hci_le_start_enc_cmd_handler = 0x40002ba4;
+hci_rd_auth_payl_to_cmd_handler = 0x40002bb0;
+hci_rd_rem_ver_info_cmd_handler = 0x40002bbc;
+hci_rd_rssi_cmd_handler = 0x40002bc8;
+hci_rd_tx_pwr_lvl_cmd_handler = 0x40002bd4;
+hci_vs_set_pref_slave_evt_dur_cmd_handler = 0x40002be0;
+hci_vs_set_pref_slave_latency_cmd_handler = 0x40002bec;
+hci_wr_auth_payl_to_cmd_handler = 0x40002bf8;
+ll_channel_map_ind_handler = 0x40002c04;
+ll_connection_param_req_handler = 0x40002c10;
+ll_connection_param_rsp_handler = 0x40002c1c;
+ll_connection_update_ind_handler = 0x40002c28;
+ll_enc_req_handler = 0x40002c34;
+ll_enc_rsp_handler = 0x40002c40;
+ll_feature_req_handler = 0x40002c4c;
+ll_feature_rsp_handler = 0x40002c58;
+ll_length_req_handler = 0x40002c64;
+ll_length_rsp_handler = 0x40002c70;
+ll_min_used_channels_ind_handler = 0x40002c7c;
+ll_pause_enc_req_handler = 0x40002c88;
+ll_pause_enc_rsp_handler = 0x40002c94;
+ll_phy_req_handler = 0x40002ca0;
+ll_phy_rsp_handler = 0x40002cac;
+ll_phy_update_ind_handler = 0x40002cb8;
+ll_ping_req_handler = 0x40002cc4;
+ll_ping_rsp_handler = 0x40002cd0;
+ll_slave_feature_req_handler = 0x40002cdc;
+ll_start_enc_req_handler = 0x40002ce8;
+ll_start_enc_rsp_handler = 0x40002cf4;
+ll_terminate_ind_handler = 0x40002d00;
+ll_version_ind_handler = 0x40002d0c;
+llc_auth_payl_nearly_to_handler = 0x40002d18;
+llc_auth_payl_real_to_handler = 0x40002d24;
+llc_encrypt_ind_handler = 0x40002d30;
+llc_hci_command_handler_wrapper = 0x40002d3c;
+llc_ll_connection_param_req_pdu_send = 0x40002d48;
+llc_ll_connection_param_rsp_pdu_send = 0x40002d54;
+llc_ll_connection_update_ind_pdu_send = 0x40002d60;
+llc_ll_enc_req_pdu_send = 0x40002d6c;
+llc_ll_enc_rsp_pdu_send = 0x40002d78;
+llc_ll_feature_req_pdu_send = 0x40002d84;
+llc_ll_feature_rsp_pdu_send = 0x40002d90;
+llc_ll_length_req_pdu_send = 0x40002d9c;
+llc_ll_length_rsp_pdu_send = 0x40002da8;
+llc_ll_pause_enc_req_pdu_send = 0x40002db4;
+llc_ll_pause_enc_rsp_pdu_send = 0x40002dc0;
+llc_ll_phy_req_pdu_send = 0x40002dcc;
+llc_ll_phy_rsp_pdu_send = 0x40002dd8;
+llc_ll_ping_req_pdu_send = 0x40002de4;
+llc_ll_ping_rsp_pdu_send = 0x40002df0;
+llc_ll_start_enc_req_pdu_send = 0x40002dfc;
+llc_ll_start_enc_rsp_pdu_send = 0x40002e08;
+llc_ll_terminate_ind_pdu_send = 0x40002e14;
+llc_ll_unknown_rsp_pdu_send = 0x40002e20;
+llc_llcp_ch_map_update_ind_pdu_send = 0x40002e2c;
+llc_llcp_phy_upd_ind_pdu_send = 0x40002e38;
+llc_llcp_version_ind_pdu_send = 0x40002e44;
+llc_op_ch_map_upd_ind_handler = 0x40002e50;
+llc_op_con_upd_ind_handler = 0x40002e5c;
+llc_op_disconnect_ind_handler = 0x40002e68;
+llc_op_dl_upd_ind_handler = 0x40002e74;
+llc_op_encrypt_ind_handler = 0x40002e80;
+llc_op_feats_exch_ind_handler = 0x40002e8c;
+llc_op_le_ping_ind_handler = 0x40002e98;
+llc_op_phy_upd_ind_handler = 0x40002ea4;
+llc_op_ver_exch_ind_handler = 0x40002eb0;
+llc_stopped_ind_handler = 0x40002ebc;
+lld_acl_rx_ind_handler = 0x40002ec8;
+lld_acl_tx_cfm_handler = 0x40002ed4;
+lld_adv_end_ind_handler = 0x40002ee0;
+lld_adv_rep_ind_handler = 0x40002eec;
+lld_ch_map_upd_cfm_handler = 0x40002ef8;
+lld_con_estab_ind_handler = 0x40002f04;
+lld_con_evt_sd_evt_time_set = 0x40002f10;
+lld_con_offset_upd_ind_handler = 0x40002f1c;
+lld_con_param_upd_cfm_handler = 0x40002f28;
+lld_disc_ind_handler = 0x40002f34;
+lld_init_end_ind_handler = 0x40002f40;
+lld_llcp_rx_ind_handler_wrapper = 0x40002f4c;
+lld_llcp_tx_cfm_handler = 0x40002f58;
+lld_per_adv_end_ind_handler = 0x40002f64;
+lld_per_adv_rep_ind_handler = 0x40002f70;
+lld_per_adv_rx_end_ind_handler = 0x40002f7c;
+lld_phy_coded_500k_get = 0x40002f88;
+lld_phy_upd_cfm_handler = 0x40002f94;
+lld_scan_end_ind_handler = 0x40002fa0;
+lld_scan_req_ind_handler = 0x40002fac;
+lld_sync_start_req_handler = 0x40002fb8;
+lld_test_end_ind_handler = 0x40002fc4;
+lld_update_rxbuf_handler = 0x40002fd0;
+llm_ch_map_update_ind_handler = 0x40002fdc;
+llm_hci_command_handler_wrapper = 0x40002fe8;
+llm_scan_period_to_handler = 0x40002ff4;
+r_Add2SelfBigHex256 = 0x40003000;
+r_AddBigHex256 = 0x4000300c;
+r_AddBigHexModP256 = 0x40003018;
+r_AddP256 = 0x40003024;
+r_AddPdiv2_256 = 0x40003030;
+r_GF_Jacobian_Point_Addition256 = 0x4000303c;
+r_GF_Jacobian_Point_Double256 = 0x40003048;
+r_GF_Point_Jacobian_To_Affine256 = 0x40003054;
+r_MultiplyBigHexByUint32_256 = 0x40003060;
+r_MultiplyBigHexModP256 = 0x4000306c;
+r_MultiplyByU16ModP256 = 0x40003078;
+r_SubtractBigHex256 = 0x40003084;
+r_SubtractBigHexMod256 = 0x40003090;
+r_SubtractBigHexUint32_256 = 0x4000309c;
+r_SubtractFromSelfBigHex256 = 0x400030a8;
+r_SubtractFromSelfBigHexSign256 = 0x400030b4;
+r_aes_alloc = 0x400030c0;
+r_aes_ccm_continue = 0x400030cc;
+r_aes_ccm_process_e = 0x400030d8;
+r_aes_ccm_xor_128_lsb = 0x400030e4;
+r_aes_ccm_xor_128_msb = 0x400030f0;
+r_aes_cmac_continue = 0x400030fc;
+r_aes_cmac_start = 0x40003108;
+r_aes_k1_continue = 0x40003114;
+r_aes_k2_continue = 0x40003120;
+r_aes_k3_continue = 0x4000312c;
+r_aes_k4_continue = 0x40003138;
+r_aes_shift_left_128 = 0x40003144;
+r_aes_start = 0x40003150;
+r_aes_xor_128 = 0x4000315c;
+r_assert_err = 0x40003168;
+r_assert_param = 0x40003174;
+r_assert_warn = 0x40003180;
+r_bigHexInversion256 = 0x4000318c;
+r_ble_sw_cca_check_isr = 0x40003198;
+r_ble_util_buf_acl_tx_alloc = 0x400031a4;
+r_ble_util_buf_acl_tx_elt_get = 0x400031b0;
+r_ble_util_buf_acl_tx_free = 0x400031bc;
+r_ble_util_buf_acl_tx_free_in_isr = 0x400031c8;
+r_ble_util_buf_adv_tx_alloc = 0x400031d4;
+r_ble_util_buf_adv_tx_free = 0x400031e0;
+r_ble_util_buf_adv_tx_free_in_isr = 0x400031ec;
+r_ble_util_buf_env_deinit = 0x400031f8;
+r_ble_util_buf_env_init = 0x40003204;
+r_ble_util_buf_get_rx_buf_nb = 0x40003210;
+r_ble_util_buf_get_rx_buf_size = 0x4000321c;
+r_ble_util_buf_llcp_tx_alloc = 0x40003228;
+r_ble_util_buf_llcp_tx_free = 0x40003234;
+r_ble_util_buf_rx_alloc = 0x40003240;
+r_ble_util_buf_rx_alloc_in_isr = 0x4000324c;
+r_ble_util_buf_rx_free = 0x40003258;
+r_ble_util_buf_rx_free_in_isr = 0x40003264;
+r_ble_util_buf_set_rx_buf_nb = 0x40003270;
+r_ble_util_buf_set_rx_buf_size = 0x4000327c;
+r_ble_util_data_rx_buf_reset = 0x40003288;
+r_bt_bb_get_intr_mask = 0x40003294;
+r_bt_bb_intr_clear = 0x400032a0;
+r_bt_bb_intr_mask_set = 0x400032ac;
+r_bt_bb_isr = 0x400032b8;
+r_bt_rf_coex_cfg_set = 0x400032c4;
+r_bt_rf_coex_conn_dynamic_pti_en_get = 0x400032d0;
+r_bt_rf_coex_conn_phy_coded_data_time_limit_en_get = 0x400032dc;
+r_bt_rf_coex_ext_adv_dynamic_pti_en_get = 0x400032e8;
+r_bt_rf_coex_ext_scan_dynamic_pti_en_get = 0x400032f4;
+r_bt_rf_coex_legacy_adv_dynamic_pti_en_get = 0x40003300;
+r_bt_rf_coex_per_adv_dynamic_pti_en_get = 0x4000330c;
+r_bt_rf_coex_pti_table_get = 0x40003318;
+r_bt_rf_coex_st_param_get = 0x40003324;
+r_bt_rf_coex_st_param_set = 0x40003330;
+r_bt_rf_coex_sync_scan_dynamic_pti_en_get = 0x4000333c;
+r_bt_rma_apply_rule_cs_fmt = 0x40003348;
+r_bt_rma_apply_rule_cs_idx = 0x40003354;
+r_bt_rma_configure = 0x40003360;
+r_bt_rma_deregister_rule_cs_fmt = 0x4000336c;
+r_bt_rma_deregister_rule_cs_idx = 0x40003378;
+r_bt_rma_get_ant_by_act = 0x40003384;
+r_bt_rma_init = 0x40003390;
+r_bt_rma_register_rule_cs_fmt = 0x4000339c;
+r_bt_rma_register_rule_cs_idx = 0x400033a8;
+r_bt_rtp_apply_rule_cs_fmt = 0x400033b4;
+r_bt_rtp_apply_rule_cs_idx = 0x400033c0;
+r_bt_rtp_deregister_rule_cs_fmt = 0x400033cc;
+r_bt_rtp_deregister_rule_cs_idx = 0x400033d8;
+r_bt_rtp_get_txpwr_idx_by_act = 0x400033e4;
+r_bt_rtp_init = 0x400033f0;
+r_bt_rtp_register_rule_cs_fmt = 0x400033fc;
+r_bt_rtp_register_rule_cs_idx = 0x40003408;
+r_btdm_isr = 0x40003414;
+r_btdm_task_post = 0x40003420;
+r_btdm_task_post_from_isr = 0x4000342c;
+r_btdm_task_recycle = 0x40003438;
+r_cali_phase_match_p = 0x40003444;
+r_cmp_abs_time = 0x40003450;
+r_cmp_dest_id = 0x4000345c;
+r_cmp_timer_id = 0x40003468;
+r_co_bdaddr_compare = 0x40003474;
+r_co_ble_pkt_dur_in_us = 0x40003480;
+r_co_list_extract = 0x4000348c;
+r_co_list_extract_after = 0x40003498;
+r_co_list_extract_sublist = 0x400034a4;
+r_co_list_find = 0x400034b0;
+r_co_list_init = 0x400034bc;
+r_co_list_insert_after = 0x400034c8;
+r_co_list_insert_before = 0x400034d4;
+r_co_list_merge = 0x400034e0;
+r_co_list_pool_init = 0x400034ec;
+r_co_list_pop_front = 0x400034f8;
+r_co_list_push_back = 0x40003504;
+r_co_list_push_back_sublist = 0x40003510;
+r_co_list_push_front = 0x4000351c;
+r_co_list_size = 0x40003528;
+r_co_nb_good_le_channels = 0x40003534;
+r_co_util_pack = 0x40003540;
+r_co_util_read_array_size = 0x4000354c;
+r_co_util_unpack = 0x40003558;
+r_dbg_env_deinit = 0x40003564;
+r_dbg_env_init = 0x40003570;
+r_dbg_platform_reset_complete = 0x4000357c;
+r_dl_upd_proc_start = 0x40003588;
+r_dump_data = 0x40003594;
+r_ecc_abort_key256_generation = 0x400035a0;
+r_ecc_gen_new_public_key = 0x400035ac;
+r_ecc_gen_new_secret_key = 0x400035b8;
+r_ecc_generate_key256 = 0x400035c4;
+r_ecc_get_debug_Keys = 0x400035d0;
+r_ecc_init = 0x400035dc;
+r_ecc_is_valid_point = 0x400035e8;
+r_ecc_multiplication_event_handler = 0x400035f4;
+r_ecc_point_multiplication_win_256 = 0x40003600;
+r_emi_alloc_em_mapping_by_offset = 0x4000360c;
+r_emi_base_reg_lut_show = 0x40003618;
+r_emi_em_base_reg_show = 0x40003624;
+r_emi_free_em_mapping_by_offset = 0x40003630;
+r_emi_get_em_mapping_idx_by_offset = 0x4000363c;
+r_emi_get_mem_addr_by_offset = 0x40003648;
+r_emi_overwrite_em_mapping_by_offset = 0x40003654;
+r_esp_vendor_hci_command_handler = 0x40003660;
+r_get_stack_usage = 0x4000366c;
+r_h4tl_acl_hdr_rx_evt_handler = 0x40003678;
+r_h4tl_cmd_hdr_rx_evt_handler = 0x40003684;
+r_h4tl_cmd_pld_rx_evt_handler = 0x40003690;
+r_h4tl_eif_io_event_post = 0x4000369c;
+r_h4tl_eif_register = 0x400036a8;
+r_h4tl_init = 0x400036b4;
+r_h4tl_out_of_sync = 0x400036c0;
+r_h4tl_out_of_sync_check = 0x400036cc;
+r_h4tl_read_hdr = 0x400036d8;
+r_h4tl_read_next_out_of_sync = 0x400036e4;
+r_h4tl_read_payl = 0x400036f0;
+r_h4tl_read_start = 0x400036fc;
+r_h4tl_rx_acl_hdr_extract = 0x40003708;
+r_h4tl_rx_cmd_hdr_extract = 0x40003714;
+r_h4tl_rx_done = 0x40003720;
+r_h4tl_start = 0x4000372c;
+r_h4tl_stop = 0x40003738;
+r_h4tl_tx_done = 0x40003744;
+r_h4tl_tx_evt_handler = 0x40003750;
+r_h4tl_write = 0x4000375c;
+r_hci_acl_tx_data_alloc = 0x40003768;
+r_hci_acl_tx_data_received = 0x40003774;
+r_hci_basic_cmd_send_2_controller = 0x40003780;
+r_hci_ble_adv_report_filter_check = 0x4000378c;
+r_hci_ble_adv_report_tx_check = 0x40003798;
+r_hci_ble_conhdl_register = 0x400037a4;
+r_hci_ble_conhdl_unregister = 0x400037b0;
+r_hci_build_acl_data = 0x400037bc;
+r_hci_build_cc_evt = 0x400037c8;
+r_hci_build_cs_evt = 0x400037d4;
+r_hci_build_evt = 0x400037e0;
+r_hci_build_le_evt = 0x400037ec;
+r_hci_cmd_get_max_param_size = 0x400037f8;
+r_hci_cmd_received = 0x40003804;
+r_hci_cmd_reject = 0x40003810;
+r_hci_evt_mask_check = 0x4000381c;
+r_hci_evt_mask_set = 0x40003828;
+r_hci_fc_acl_buf_size_set = 0x40003834;
+r_hci_fc_acl_en = 0x40003840;
+r_hci_fc_acl_packet_sent = 0x4000384c;
+r_hci_fc_check_host_available_nb_acl_packets = 0x40003858;
+r_hci_fc_host_nb_acl_pkts_complete = 0x40003864;
+r_hci_fc_init = 0x40003870;
+r_hci_look_for_cmd_desc = 0x4000387c;
+r_hci_look_for_evt_desc = 0x40003888;
+r_hci_look_for_le_evt_desc = 0x40003894;
+r_hci_look_for_le_evt_desc_esp = 0x400038a0;
+r_hci_pack_bytes = 0x400038ac;
+r_hci_register_vendor_desc_tab = 0x400038b8;
+r_hci_send_2_controller = 0x400038c4;
+r_hci_send_2_host = 0x400038d0;
+r_hci_tl_c2h_data_flow_on = 0x400038dc;
+r_hci_tl_cmd_hdr_rx_evt_handler = 0x400038e8;
+r_hci_tl_cmd_pld_rx_evt_handler = 0x400038f4;
+r_hci_tl_get_pkt = 0x40003900;
+r_hci_tl_hci_pkt_handler = 0x4000390c;
+r_hci_tl_hci_tx_done_evt_handler = 0x40003918;
+r_hci_tl_inc_nb_h2c_cmd_pkts = 0x40003924;
+r_hci_tl_save_pkt = 0x40003930;
+r_hci_tl_send = 0x4000393c;
+r_hci_tx_done = 0x40003948;
+r_hci_tx_start = 0x40003954;
+r_hci_tx_trigger = 0x40003960;
+r_isValidSecretKey_256 = 0x4000396c;
+r_ke_check_malloc = 0x40003978;
+r_ke_event_callback_set = 0x40003984;
+r_ke_event_clear = 0x40003990;
+r_ke_event_flush = 0x4000399c;
+r_ke_event_get = 0x400039a8;
+r_ke_event_get_all = 0x400039b4;
+r_ke_event_init = 0x400039c0;
+r_ke_event_schedule = 0x400039cc;
+r_ke_event_set = 0x400039d8;
+r_ke_flush = 0x400039e4;
+r_ke_free = 0x400039f0;
+r_ke_handler_search = 0x400039fc;
+r_ke_init = 0x40003a08;
+r_ke_is_free = 0x40003a14;
+r_ke_malloc = 0x40003a20;
+r_ke_mem_init = 0x40003a2c;
+r_ke_mem_is_empty = 0x40003a38;
+r_ke_mem_is_in_heap = 0x40003a44;
+r_ke_msg_alloc = 0x40003a50;
+r_ke_msg_dest_id_get = 0x40003a5c;
+r_ke_msg_discard = 0x40003a68;
+r_ke_msg_forward = 0x40003a74;
+r_ke_msg_forward_new_id = 0x40003a80;
+r_ke_msg_free = 0x40003a8c;
+r_ke_msg_in_queue = 0x40003a98;
+r_ke_msg_save = 0x40003aa4;
+r_ke_msg_send = 0x40003ab0;
+r_ke_msg_send_basic = 0x40003abc;
+r_ke_msg_src_id_get = 0x40003ac8;
+r_ke_queue_extract = 0x40003ad4;
+r_ke_queue_insert = 0x40003ae0;
+r_ke_sleep_check = 0x40003aec;
+r_ke_state_get = 0x40003af8;
+r_ke_state_set = 0x40003b04;
+r_ke_task_check = 0x40003b10;
+r_ke_task_create = 0x40003b1c;
+r_ke_task_delete = 0x40003b28;
+r_ke_task_handler_get = 0x40003b34;
+r_ke_task_init = 0x40003b40;
+r_ke_task_msg_flush = 0x40003b4c;
+r_ke_task_saved_update = 0x40003b58;
+r_ke_task_schedule = 0x40003b64;
+r_ke_time = 0x40003b70;
+r_ke_time_cmp = 0x40003b7c;
+r_ke_time_past = 0x40003b88;
+r_ke_timer_active = 0x40003b94;
+r_ke_timer_adjust_all = 0x40003ba0;
+r_ke_timer_clear = 0x40003bac;
+r_ke_timer_init = 0x40003bb8;
+r_ke_timer_schedule = 0x40003bc4;
+r_ke_timer_set = 0x40003bd0;
+r_led_init = 0x40003bdc;
+r_led_set_all = 0x40003be8;
+r_llc_aes_res_cb = 0x40003bf4;
+r_llc_ch_map_up_proc_err_cb = 0x40003c00;
+r_llc_cleanup = 0x40003c0c;
+r_llc_cmd_cmp_send = 0x40003c18;
+r_llc_cmd_stat_send = 0x40003c24;
+r_llc_con_move_cbk = 0x40003c30;
+r_llc_con_plan_set_update = 0x40003c3c;
+r_llc_con_upd_param_in_range = 0x40003c48;
+r_llc_disconnect = 0x40003c54;
+r_llc_disconnect_end = 0x40003c60;
+r_llc_disconnect_proc_continue = 0x40003c6c;
+r_llc_disconnect_proc_err_cb = 0x40003c78;
+r_llc_dl_chg_check = 0x40003c84;
+r_llc_dle_proc_err_cb = 0x40003c90;
+r_llc_feats_exch_proc_err_cb = 0x40003c9c;
+r_llc_hci_cmd_handler_tab_p_get = 0x40003ca8;
+r_llc_hci_command_handler = 0x40003cb4;
+r_llc_hci_con_param_req_evt_send = 0x40003cc0;
+r_llc_hci_con_upd_info_send = 0x40003ccc;
+r_llc_hci_disconnected_dis = 0x40003cd8;
+r_llc_hci_dl_upd_info_send = 0x40003ce4;
+r_llc_hci_enc_evt_send = 0x40003cf0;
+r_llc_hci_feats_info_send = 0x40003cfc;
+r_llc_hci_le_phy_upd_cmp_evt_send = 0x40003d08;
+r_llc_hci_ltk_request_evt_send = 0x40003d14;
+r_llc_hci_nb_cmp_pkts_evt_send = 0x40003d20;
+r_llc_hci_version_info_send = 0x40003d2c;
+r_llc_init_term_proc = 0x40003d38;
+r_llc_iv_skd_rand_gen = 0x40003d44;
+r_llc_le_ping_proc_continue = 0x40003d50;
+r_llc_le_ping_proc_err_cb = 0x40003d5c;
+r_llc_le_ping_restart = 0x40003d68;
+r_llc_le_ping_set = 0x40003d74;
+r_llc_ll_pause_enc_rsp_ack_handler = 0x40003d80;
+r_llc_ll_reject_ind_ack_handler = 0x40003d8c;
+r_llc_ll_reject_ind_pdu_send = 0x40003d98;
+r_llc_ll_start_enc_rsp_ack_handler = 0x40003da4;
+r_llc_ll_terminate_ind_ack = 0x40003db0;
+r_llc_ll_unknown_ind_handler = 0x40003dbc;
+r_llc_llcp_send = 0x40003dc8;
+r_llc_llcp_state_set = 0x40003dd4;
+r_llc_llcp_trans_timer_set = 0x40003de0;
+r_llc_llcp_tx_check = 0x40003dec;
+r_llc_loc_ch_map_proc_continue = 0x40003df8;
+r_llc_loc_con_upd_proc_continue = 0x40003e04;
+r_llc_loc_con_upd_proc_err_cb = 0x40003e10;
+r_llc_loc_dl_upd_proc_continue = 0x40003e1c;
+r_llc_loc_encrypt_proc_continue = 0x40003e28;
+r_llc_loc_encrypt_proc_err_cb = 0x40003e34;
+r_llc_loc_feats_exch_proc_continue = 0x40003e40;
+r_llc_loc_phy_upd_proc_continue = 0x40003e4c;
+r_llc_loc_phy_upd_proc_err_cb = 0x40003e58;
+r_llc_msg_handler_tab_p_get = 0x40003e64;
+r_llc_pref_param_compute = 0x40003e70;
+r_llc_proc_collision_check = 0x40003e7c;
+r_llc_proc_err_ind = 0x40003e88;
+r_llc_proc_get = 0x40003e94;
+r_llc_proc_id_get = 0x40003ea0;
+r_llc_proc_reg = 0x40003eac;
+r_llc_proc_state_get = 0x40003eb8;
+r_llc_proc_state_set = 0x40003ec4;
+r_llc_proc_timer_pause_set = 0x40003ed0;
+r_llc_proc_timer_set = 0x40003edc;
+r_llc_proc_unreg = 0x40003ee8;
+r_llc_rem_ch_map_proc_continue = 0x40003ef4;
+r_llc_rem_con_upd_proc_continue = 0x40003f00;
+r_llc_rem_con_upd_proc_err_cb = 0x40003f0c;
+r_llc_rem_dl_upd_proc = 0x40003f18;
+r_llc_rem_encrypt_proc_continue = 0x40003f24;
+r_llc_rem_encrypt_proc_err_cb = 0x40003f30;
+r_llc_rem_phy_upd_proc_continue = 0x40003f3c;
+r_llc_rem_phy_upd_proc_err_cb = 0x40003f48;
+r_llc_role_get = 0x40003f54;
+r_llc_sk_gen = 0x40003f60;
+r_llc_start = 0x40003f6c;
+r_llc_stop = 0x40003f78;
+r_llc_ver_exch_loc_proc_continue = 0x40003f84;
+r_llc_ver_proc_err_cb = 0x40003f90;
+r_llcp_pdu_handler_tab_p_get = 0x40003f9c;
+r_lld_aa_gen = 0x40003fa8;
+r_lld_adv_adv_data_set = 0x40003fb4;
+r_lld_adv_adv_data_update = 0x40003fc0;
+r_lld_adv_aux_ch_idx_set = 0x40003fcc;
+r_lld_adv_aux_evt_canceled_cbk = 0x40003fd8;
+r_lld_adv_aux_evt_start_cbk = 0x40003fe4;
+r_lld_adv_coex_check_ext_adv_synced = 0x40003ff0;
+r_lld_adv_coex_env_reset = 0x40003ffc;
+r_lld_adv_duration_update = 0x40004008;
+r_lld_adv_dynamic_pti_process = 0x40004014;
+r_lld_adv_end = 0x40004020;
+r_lld_adv_evt_canceled_cbk = 0x4000402c;
+r_lld_adv_evt_start_cbk = 0x40004038;
+r_lld_adv_ext_chain_construct = 0x40004044;
+r_lld_adv_ext_pkt_prepare = 0x40004050;
+r_lld_adv_frm_cbk = 0x4000405c;
+r_lld_adv_frm_isr = 0x40004068;
+r_lld_adv_frm_skip_isr = 0x40004074;
+r_lld_adv_init = 0x40004080;
+r_lld_adv_pkt_rx = 0x4000408c;
+r_lld_adv_pkt_rx_connect_ind = 0x40004098;
+r_lld_adv_pkt_rx_send_scan_req_evt = 0x400040a4;
+r_lld_adv_rand_addr_update = 0x400040b0;
+r_lld_adv_restart = 0x400040bc;
+r_lld_adv_scan_rsp_data_set = 0x400040c8;
+r_lld_adv_scan_rsp_data_update = 0x400040d4;
+r_lld_adv_set_tx_power = 0x400040e0;
+r_lld_adv_start = 0x400040ec;
+r_lld_adv_stop = 0x400040f8;
+r_lld_adv_sync_info_set = 0x40004104;
+r_lld_adv_sync_info_update = 0x40004110;
+r_lld_calc_aux_rx = 0x4000411c;
+r_lld_cca_alloc = 0x40004128;
+r_lld_cca_data_reset = 0x40004134;
+r_lld_cca_free = 0x40004140;
+r_lld_ch_assess_data_get = 0x4000414c;
+r_lld_ch_idx_get = 0x40004158;
+r_lld_ch_map_set = 0x40004164;
+r_lld_channel_assess = 0x40004170;
+r_lld_con_activity_act_offset_compute = 0x4000417c;
+r_lld_con_activity_offset_compute = 0x40004188;
+r_lld_con_ch_map_update = 0x40004194;
+r_lld_con_cleanup = 0x400041a0;
+r_lld_con_current_tx_power_get = 0x400041ac;
+r_lld_con_data_flow_set = 0x400041b8;
+r_lld_con_data_len_update = 0x400041c4;
+r_lld_con_data_tx = 0x400041d0;
+r_lld_con_enc_key_load = 0x400041dc;
+r_lld_con_event_counter_get = 0x400041e8;
+r_lld_con_evt_canceled_cbk = 0x400041f4;
+r_lld_con_evt_duration_min_get = 0x40004200;
+r_lld_con_evt_max_eff_time_cal = 0x4000420c;
+r_lld_con_evt_sd_evt_time_get = 0x40004218;
+r_lld_con_evt_start_cbk = 0x40004224;
+r_lld_con_evt_time_update = 0x40004230;
+r_lld_con_free_all_tx_buf = 0x4000423c;
+r_lld_con_frm_cbk = 0x40004248;
+r_lld_con_frm_isr = 0x40004254;
+r_lld_con_frm_skip_isr = 0x40004260;
+r_lld_con_init = 0x4000426c;
+r_lld_con_llcp_tx = 0x40004278;
+r_lld_con_max_lat_calc = 0x40004284;
+r_lld_con_offset_get = 0x40004290;
+r_lld_con_param_update = 0x4000429c;
+r_lld_con_phys_update = 0x400042a8;
+r_lld_con_pref_slave_evt_dur_set = 0x400042b4;
+r_lld_con_pref_slave_latency_set = 0x400042c0;
+r_lld_con_rssi_get = 0x400042cc;
+r_lld_con_rx = 0x400042d8;
+r_lld_con_rx_channel_assess = 0x400042e4;
+r_lld_con_rx_enc = 0x400042f0;
+r_lld_con_rx_isr = 0x400042fc;
+r_lld_con_rx_link_info_check = 0x40004308;
+r_lld_con_rx_llcp_check = 0x40004314;
+r_lld_con_rx_sync_time_update = 0x40004320;
+r_lld_con_sched = 0x4000432c;
+r_lld_con_set_tx_power = 0x40004338;
+r_lld_con_start = 0x40004344;
+r_lld_con_stop = 0x40004350;
+r_lld_con_tx = 0x4000435c;
+r_lld_con_tx_enc = 0x40004368;
+r_lld_con_tx_isr = 0x40004374;
+r_lld_con_tx_len_update = 0x40004380;
+r_lld_con_tx_len_update_for_intv = 0x4000438c;
+r_lld_con_tx_len_update_for_rate = 0x40004398;
+r_lld_con_tx_prog = 0x400043a4;
+r_lld_conn_dynamic_pti_process = 0x400043b0;
+r_lld_continue_scan_rx_isr_end_process = 0x400043bc;
+r_lld_ext_scan_dynamic_pti_process = 0x400043c8;
+r_lld_hw_cca_end_isr = 0x400043d4;
+r_lld_hw_cca_evt_handler = 0x400043e0;
+r_lld_hw_cca_isr = 0x400043ec;
+r_lld_init_cal_anchor_point = 0x400043f8;
+r_lld_init_compute_winoffset = 0x40004404;
+r_lld_init_connect_req_pack = 0x40004410;
+r_lld_init_end = 0x4000441c;
+r_lld_init_evt_canceled_cbk = 0x40004428;
+r_lld_init_evt_start_cbk = 0x40004434;
+r_lld_init_frm_cbk = 0x40004440;
+r_lld_init_frm_eof_isr = 0x4000444c;
+r_lld_init_frm_skip_isr = 0x40004458;
+r_lld_init_init = 0x40004464;
+r_lld_init_process_pkt_rx = 0x40004470;
+r_lld_init_process_pkt_rx_adv_ext_ind = 0x4000447c;
+r_lld_init_process_pkt_rx_adv_ind_or_direct_ind = 0x40004488;
+r_lld_init_process_pkt_rx_aux_connect_rsp = 0x40004494;
+r_lld_init_process_pkt_tx = 0x400044a0;
+r_lld_init_process_pkt_tx_cal_con_timestamp = 0x400044ac;
+r_lld_init_sched = 0x400044b8;
+r_lld_init_set_tx_power = 0x400044c4;
+r_lld_init_start = 0x400044d0;
+r_lld_init_stop = 0x400044dc;
+r_lld_instant_proc_end = 0x400044e8;
+r_lld_llcp_rx_ind_handler = 0x400044f4;
+r_lld_per_adv_ch_map_update = 0x40004500;
+r_lld_per_adv_chain_construct = 0x4000450c;
+r_lld_per_adv_cleanup = 0x40004518;
+r_lld_per_adv_coex_env_reset = 0x40004524;
+r_lld_per_adv_data_set = 0x40004530;
+r_lld_per_adv_data_update = 0x4000453c;
+r_lld_per_adv_dynamic_pti_process = 0x40004548;
+r_lld_per_adv_evt_canceled_cbk = 0x40004554;
+r_lld_per_adv_evt_start_cbk = 0x40004560;
+r_lld_per_adv_ext_pkt_prepare = 0x4000456c;
+r_lld_per_adv_frm_cbk = 0x40004578;
+r_lld_per_adv_frm_isr = 0x40004584;
+r_lld_per_adv_frm_skip_isr = 0x40004590;
+r_lld_per_adv_init = 0x4000459c;
+r_lld_per_adv_init_info_get = 0x400045a8;
+r_lld_per_adv_list_add = 0x400045b4;
+r_lld_per_adv_list_rem = 0x400045c0;
+r_lld_per_adv_sched = 0x400045cc;
+r_lld_per_adv_set_tx_power = 0x400045d8;
+r_lld_per_adv_start = 0x400045e4;
+r_lld_per_adv_stop = 0x400045f0;
+r_lld_per_adv_sync_info_get = 0x400045fc;
+r_lld_process_cca_data = 0x40004608;
+r_lld_ral_search = 0x40004614;
+r_lld_read_clock = 0x40004620;
+r_lld_res_list_add = 0x4000462c;
+r_lld_res_list_clear = 0x40004638;
+r_lld_res_list_is_empty = 0x40004644;
+r_lld_res_list_local_rpa_get = 0x40004650;
+r_lld_res_list_peer_rpa_get = 0x4000465c;
+r_lld_res_list_peer_update = 0x40004668;
+r_lld_res_list_priv_mode_update = 0x40004674;
+r_lld_res_list_rem = 0x40004680;
+r_lld_reset_reg = 0x4000468c;
+r_lld_rpa_renew = 0x40004698;
+r_lld_rpa_renew_evt_canceled_cbk = 0x400046a4;
+r_lld_rpa_renew_evt_start_cbk = 0x400046b0;
+r_lld_rpa_renew_instant_cbk = 0x400046bc;
+r_lld_rxdesc_check = 0x400046c8;
+r_lld_rxdesc_free = 0x400046d4;
+r_lld_scan_create_sync = 0x400046e0;
+r_lld_scan_create_sync_cancel = 0x400046ec;
+r_lld_scan_end = 0x400046f8;
+r_lld_scan_evt_canceled_cbk = 0x40004704;
+r_lld_scan_evt_start_cbk = 0x40004710;
+r_lld_scan_frm_cbk = 0x4000471c;
+r_lld_scan_frm_eof_isr = 0x40004728;
+r_lld_scan_frm_rx_isr = 0x40004734;
+r_lld_scan_frm_skip_isr = 0x40004740;
+r_lld_scan_init = 0x4000474c;
+r_lld_scan_params_update = 0x40004758;
+r_lld_scan_process_pkt_rx = 0x40004764;
+r_lld_scan_process_pkt_rx_adv_rep = 0x40004770;
+r_lld_scan_process_pkt_rx_aux_adv_ind = 0x4000477c;
+r_lld_scan_process_pkt_rx_aux_chain_ind = 0x40004788;
+r_lld_scan_process_pkt_rx_aux_scan_rsp = 0x40004794;
+r_lld_scan_process_pkt_rx_ext_adv = 0x400047a0;
+r_lld_scan_process_pkt_rx_ext_adv_ind = 0x400047ac;
+r_lld_scan_process_pkt_rx_legacy_adv = 0x400047b8;
+r_lld_scan_restart = 0x400047c4;
+r_lld_scan_sched = 0x400047d0;
+r_lld_scan_set_tx_power = 0x400047dc;
+r_lld_scan_start = 0x400047e8;
+r_lld_scan_stop = 0x400047f4;
+r_lld_scan_sync_accept = 0x40004800;
+r_lld_scan_sync_info_unpack = 0x4000480c;
+r_lld_scan_trunc_ind = 0x40004818;
+r_lld_sw_cca_evt_handler = 0x40004824;
+r_lld_sw_cca_isr = 0x40004830;
+r_lld_sync_ch_map_update = 0x4000483c;
+r_lld_sync_cleanup = 0x40004848;
+r_lld_sync_evt_canceled_cbk = 0x40004854;
+r_lld_sync_evt_start_cbk = 0x40004860;
+r_lld_sync_frm_cbk = 0x4000486c;
+r_lld_sync_frm_eof_isr = 0x40004878;
+r_lld_sync_frm_rx_isr = 0x40004884;
+r_lld_sync_frm_skip_isr = 0x40004890;
+r_lld_sync_init = 0x4000489c;
+r_lld_sync_process_pkt_rx = 0x400048a8;
+r_lld_sync_process_pkt_rx_aux_sync_ind = 0x400048b4;
+r_lld_sync_process_pkt_rx_pkt_check = 0x400048c0;
+r_lld_sync_scan_dynamic_pti_process = 0x400048cc;
+r_lld_sync_sched = 0x400048d8;
+r_lld_sync_start = 0x400048e4;
+r_lld_sync_stop = 0x400048f0;
+r_lld_sync_trunc_ind = 0x400048fc;
+r_lld_test_cleanup = 0x40004908;
+r_lld_test_evt_canceled_cbk = 0x40004914;
+r_lld_test_evt_start_cbk = 0x40004920;
+r_lld_test_freq2chnl = 0x4000492c;
+r_lld_test_frm_cbk = 0x40004938;
+r_lld_test_frm_isr = 0x40004944;
+r_lld_test_init = 0x40004950;
+r_lld_test_rx_isr = 0x4000495c;
+r_lld_test_set_tx_power = 0x40004968;
+r_lld_test_start = 0x40004974;
+r_lld_test_stop = 0x40004980;
+r_lld_update_rxbuf = 0x4000498c;
+r_lld_update_rxbuf_isr = 0x40004998;
+r_lld_white_list_add = 0x400049a4;
+r_lld_white_list_rem = 0x400049b0;
+r_llm_activity_free_get = 0x400049bc;
+r_llm_activity_free_set = 0x400049c8;
+r_llm_activity_syncing_get = 0x400049d4;
+r_llm_adv_con_len_check = 0x400049e0;
+r_llm_adv_hdl_to_id = 0x400049ec;
+r_llm_adv_rep_flow_control_check = 0x400049f8;
+r_llm_adv_rep_flow_control_update = 0x40004a04;
+r_llm_adv_reports_list_check = 0x40004a10;
+r_llm_adv_set_all_release = 0x40004a1c;
+r_llm_adv_set_dft_params = 0x40004a28;
+r_llm_adv_set_release = 0x40004a34;
+r_llm_aes_res_cb = 0x40004a40;
+r_llm_ble_update_adv_flow_control = 0x40004a4c;
+r_llm_ch_map_update = 0x40004a58;
+r_llm_cmd_cmp_send = 0x40004a64;
+r_llm_cmd_stat_send = 0x40004a70;
+r_llm_dev_list_empty_entry = 0x40004a7c;
+r_llm_dev_list_search = 0x40004a88;
+r_llm_env_adv_dup_filt_deinit = 0x40004a94;
+r_llm_env_adv_dup_filt_init = 0x40004aa0;
+r_llm_init_ble_adv_report_flow_contol = 0x40004aac;
+r_llm_is_dev_connected = 0x40004ab8;
+r_llm_is_dev_synced = 0x40004ac4;
+r_llm_is_non_con_act_ongoing_check = 0x40004ad0;
+r_llm_is_wl_accessible = 0x40004adc;
+r_llm_le_evt_mask_check = 0x40004ae8;
+r_llm_le_features_get = 0x40004af4;
+r_llm_link_disc = 0x40004b00;
+r_llm_master_ch_map_get = 0x40004b0c;
+r_llm_msg_handler_tab_p_get = 0x40004b18;
+r_llm_no_activity = 0x40004b24;
+r_llm_per_adv_slot_dur = 0x40004b30;
+r_llm_plan_elt_get = 0x40004b3c;
+r_llm_rx_path_comp_get = 0x40004b48;
+r_llm_scan_start = 0x40004b54;
+r_llm_scan_sync_acad_attach = 0x40004b60;
+r_llm_scan_sync_acad_detach = 0x40004b6c;
+r_llm_send_adv_lost_event_to_host = 0x40004b78;
+r_llm_tx_path_comp_get = 0x40004b84;
+r_misc_deinit = 0x40004b90;
+r_misc_free_em_buf_in_isr = 0x40004b9c;
+r_misc_init = 0x40004ba8;
+r_misc_msg_handler_tab_p_get = 0x40004bb4;
+r_notEqual256 = 0x40004bc0;
+r_phy_upd_proc_start = 0x40004bcc;
+r_platform_reset = 0x40004bd8;
+r_register_esp_vendor_cmd_handler = 0x40004be4;
+r_rf_em_init = 0x40004bf0;
+r_rf_force_agc_enable = 0x40004bfc;
+r_rf_reg_rd = 0x40004c08;
+r_rf_reg_wr = 0x40004c14;
+r_rf_reset = 0x40004c20;
+r_rf_rssi_convert = 0x40004c2c;
+r_rf_rw_v9_le_disable = 0x40004c38;
+r_rf_rw_v9_le_enable = 0x40004c44;
+r_rf_sleep = 0x40004c50;
+r_rf_txpwr_cs_get = 0x40004c5c;
+r_rf_txpwr_dbm_get = 0x40004c68;
+r_rf_util_cs_fmt_convert = 0x40004c74;
+r_rw_crypto_aes_ccm = 0x40004c80;
+r_rw_crypto_aes_encrypt = 0x40004c8c;
+r_rw_crypto_aes_init = 0x40004c98;
+r_rw_crypto_aes_k1 = 0x40004ca4;
+r_rw_crypto_aes_k2 = 0x40004cb0;
+r_rw_crypto_aes_k3 = 0x40004cbc;
+r_rw_crypto_aes_k4 = 0x40004cc8;
+r_rw_crypto_aes_rand = 0x40004cd4;
+r_rw_crypto_aes_result_handler = 0x40004ce0;
+r_rw_crypto_aes_s1 = 0x40004cec;
+r_rw_cryto_aes_cmac = 0x40004cf8;
+r_rw_v9_init_em_radio_table = 0x40004d04;
+r_rwble_isr = 0x40004d10;
+r_rwble_sleep_enter = 0x40004d1c;
+r_rwble_sleep_wakeup_end = 0x40004d28;
+r_rwbtdm_isr_wrapper = 0x40004d34;
+r_rwip_active_check = 0x40004d40;
+r_rwip_aes_encrypt = 0x40004d4c;
+r_rwip_assert = 0x40004d58;
+r_rwip_crypt_evt_handler = 0x40004d64;
+r_rwip_crypt_isr_handler = 0x40004d70;
+r_rwip_eif_get = 0x40004d7c;
+r_rwip_half_slot_2_lpcycles = 0x40004d88;
+r_rwip_hus_2_lpcycles = 0x40004d94;
+r_rwip_isr = 0x40004da0;
+r_rwip_lpcycles_2_hus = 0x40004dac;
+r_rwip_prevent_sleep_clear = 0x40004db8;
+r_rwip_prevent_sleep_set = 0x40004dc4;
+r_rwip_schedule = 0x40004dd0;
+r_rwip_sleep = 0x40004ddc;
+r_rwip_sw_int_handler = 0x40004de8;
+r_rwip_sw_int_req = 0x40004df4;
+r_rwip_time_get = 0x40004e00;
+r_rwip_timer_10ms_handler = 0x40004e0c;
+r_rwip_timer_10ms_set = 0x40004e18;
+r_rwip_timer_hs_handler = 0x40004e24;
+r_rwip_timer_hs_set = 0x40004e30;
+r_rwip_timer_hus_handler = 0x40004e3c;
+r_rwip_timer_hus_set = 0x40004e48;
+r_rwip_wakeup = 0x40004e54;
+r_rwip_wakeup_end = 0x40004e60;
+r_rwip_wlcoex_set = 0x40004e6c;
+r_sch_alarm_clear = 0x40004e78;
+r_sch_alarm_init = 0x40004e84;
+r_sch_alarm_prog = 0x40004e90;
+r_sch_alarm_set = 0x40004e9c;
+r_sch_alarm_timer_isr = 0x40004ea8;
+r_sch_arb_conflict_check = 0x40004eb4;
+r_sch_arb_elt_cancel = 0x40004ec0;
+r_sch_arb_event_start_isr = 0x40004ecc;
+r_sch_arb_init = 0x40004ed8;
+r_sch_arb_insert = 0x40004ee4;
+r_sch_arb_prog_timer = 0x40004ef0;
+r_sch_arb_remove = 0x40004efc;
+r_sch_arb_sw_isr = 0x40004f08;
+r_sch_plan_chk = 0x40004f14;
+r_sch_plan_clock_wrap_offset_update = 0x40004f20;
+r_sch_plan_init = 0x40004f2c;
+r_sch_plan_interval_req = 0x40004f38;
+r_sch_plan_offset_max_calc = 0x40004f44;
+r_sch_plan_offset_req = 0x40004f50;
+r_sch_plan_position_range_compute = 0x40004f5c;
+r_sch_plan_rem = 0x40004f68;
+r_sch_plan_req = 0x40004f74;
+r_sch_plan_set = 0x40004f80;
+r_sch_prog_end_isr = 0x40004f8c;
+r_sch_prog_init = 0x40004f98;
+r_sch_prog_push = 0x40004fa4;
+r_sch_prog_rx_isr = 0x40004fb0;
+r_sch_prog_skip_isr = 0x40004fbc;
+r_sch_prog_tx_isr = 0x40004fc8;
+r_sch_slice_bg_add = 0x40004fd4;
+r_sch_slice_bg_remove = 0x40004fe0;
+r_sch_slice_compute = 0x40004fec;
+r_sch_slice_fg_add = 0x40004ff8;
+r_sch_slice_fg_remove = 0x40005004;
+r_sch_slice_init = 0x40005010;
+r_sch_slice_per_add = 0x4000501c;
+r_sch_slice_per_remove = 0x40005028;
+r_sdk_config_get_bt_sleep_enable = 0x40005034;
+r_sdk_config_get_hl_derived_opts = 0x40005040;
+r_sdk_config_get_opts = 0x4000504c;
+r_sdk_config_get_priv_opts = 0x40005058;
+r_sdk_config_set_bt_sleep_enable = 0x40005064;
+r_sdk_config_set_hl_derived_opts = 0x40005070;
+r_sdk_config_set_opts = 0x4000507c;
+r_specialModP256 = 0x40005088;
+r_unloaded_area_init = 0x40005094;
+r_vhci_flow_off = 0x400050a0;
+r_vhci_flow_on = 0x400050ac;
+r_vhci_notify_host_send_available = 0x400050b8;
+r_vhci_send_to_host = 0x400050c4;
+r_vnd_hci_command_handler = 0x400050d0;
+r_vshci_init = 0x400050dc;
+vnd_hci_command_handler_wrapper = 0x400050e8;
+r_lld_legacy_adv_dynamic_pti_get = 0x400050f4;
+r_lld_legacy_adv_dynamic_pti_process = 0x40005100;
+r_lld_ext_adv_dynamic_pti_get = 0x4000510c;
+r_lld_ext_adv_dynamic_aux_pti_process = 0x40005118;
+r_lld_ext_adv_dynamic_pti_process = 0x40005124;
+r_lld_adv_ext_pkt_prepare_set = 0x40005130;
+r_lld_adv_ext_chain_none_construct = 0x4000513c;
+r_lld_adv_ext_chain_connectable_construct = 0x40005148;
+r_lld_adv_ext_chain_scannable_construct = 0x40005154;
+r_lld_adv_pkt_rx_connect_post = 0x40005160;
+r_lld_adv_start_init_evt_param = 0x4000516c;
+r_lld_adv_start_set_cs = 0x40005178;
+r_lld_adv_start_update_filter_policy = 0x40005184;
+r_lld_adv_start_schedule_asap = 0x40005190;
+r_lld_con_tx_prog_new_packet_coex = 0x4000519c;
+r_lld_con_tx_prog_new_packet = 0x400051a8;
+r_lld_per_adv_dynamic_pti_get = 0x400051b4;
+r_lld_per_adv_evt_start_chm_upd = 0x400051c0;
+r_lld_ext_scan_dynamic_pti_get = 0x400051cc;
+r_lld_scan_try_sched = 0x400051d8;
+r_lld_sync_insert = 0x400051e4;
+r_sch_prog_ble_push = 0x400051f0;
+r_sch_prog_bt_push = 0x400051fc;
+r_lld_init_evt_end_type_set = 0x40005208;
+r_lld_init_evt_end_type_get = 0x40005214;
+r_lld_adv_direct_adv_use_rpa_addr_state_set = 0x40005220;
+r_lld_adv_direct_adv_use_rpa_addr_state_get = 0x4000522c;
+r_lld_init_evt_end_type_check_state_set = 0x40005238;
+r_lld_init_evt_end_type_check_state_get = 0x40005244;
+/* Data (.data, .bss, .rodata) */
+bt_rf_coex_cfg_p = 0x3fceffa8;
+bt_rf_coex_hooks_p = 0x3fceffa4;
+btdm_env_p = 0x3fceffa0;
+g_rw_controller_task_handle = 0x3fceff9c;
+g_rw_init_sem = 0x3fceff98;
+g_rw_schd_queue = 0x3fceff94;
+lld_init_env = 0x3fceff90;
+lld_rpa_renew_env = 0x3fceff8c;
+lld_scan_env = 0x3fceff88;
+lld_scan_sync_env = 0x3fceff84;
+lld_test_env = 0x3fceff80;
+p_ble_util_buf_env = 0x3fceff7c;
+p_lld_env = 0x3fceff78;
+p_llm_env = 0x3fceff74;
+r_h4tl_eif_p = 0x3fceff70;
+r_hli_funcs_p = 0x3fceff6c;
+r_ip_funcs_p = 0x3fceff68;
+r_modules_funcs_p = 0x3fceff64;
+r_osi_funcs_p = 0x3fceff60;
+r_plf_funcs_p = 0x3fceff5c;
+vhci_env_p = 0x3fceff58;
+aa_gen = 0x3fceff54;
+aes_env = 0x3fceff48;
+bt_rf_coex_cfg_cb = 0x3fcefef8;
+btdm_pwr_state = 0x3fcefef4;
+btdm_slp_err = 0x3fcefef0;
+ecc_env = 0x3fcefee8;
+esp_handler = 0x3fcefee0;
+esp_vendor_cmd = 0x3fcefed8;
+g_adv_delay_dis = 0x3fcefed4;
+g_conflict_elt = 0x3fcefed0;
+g_eif_api = 0x3fcefec0;
+g_event_empty = 0x3fcefeb4;
+g_llc_state = 0x3fcefeaa;
+g_llm_state = 0x3fcefea9;
+g_max_evt_env = 0x3fcefea7;
+g_misc_state = 0x3fcefea6;
+g_rma_rule_db = 0x3fcefe8a;
+g_rtp_rule_db = 0x3fcefe6e;
+g_scan_forever = 0x3fcefe6d;
+g_time_msb = 0x3fcefe6c;
+h4tl_env = 0x3fcefe44;
+hci_env = 0x3fcefe21;
+hci_ext_host = 0x3fcefe20;
+hci_fc_env = 0x3fcefe18;
+hci_tl_env = 0x3fcefdec;
+ke_env = 0x3fcefdbc;
+ke_event_env = 0x3fcefd7c;
+ke_task_env = 0x3fcefd00;
+llc_env = 0x3fcefcd8;
+lld_adv_env = 0x3fcefcb0;
+lld_con_env = 0x3fcefc88;
+lld_exp_sync_pos_tab = 0x3fcefc80;
+lld_per_adv_env = 0x3fcefc58;
+lld_sync_env = 0x3fcefc30;
+llm_le_adv_flow_env = 0x3fcefc24;
+rw_sleep_enable = 0x3fcefc20;
+rwble_env = 0x3fcefc18;
+rwip_env = 0x3fcefbfc;
+rwip_param = 0x3fcefbf0;
+rwip_prog_delay = 0x3fcefbec;
+rwip_rf = 0x3fcefbb4;
+sch_alarm_env = 0x3fcefbac;
+sch_arb_env = 0x3fcefb98;
+sch_plan_env = 0x3fcefb90;
+sch_prog_env = 0x3fcefa8c;
+sch_slice_env = 0x3fcefa2c;
+sch_slice_params = 0x3fcefa24;
+timer_env = 0x3fcefa1c;
+unloaded_area = 0x3fcefa18;
+vshci_state = 0x3fcefa14;
+TASK_DESC_LLC = 0x3fcefa08;
+TASK_DESC_LLM = 0x3fcef9fc;
+TASK_DESC_VSHCI = 0x3fcef9f0;
+co_default_bdaddr = 0x3fcef9e8;
+dbg_assert_block = 0x3fcef9e4;
+g_bt_plf_log_level = 0x3fcef9e0;
+hci_cmd_desc_tab_vs_esp = 0x3fcef9bc;
+hci_command_handler_tab_esp = 0x3fcef9a4;
+privacy_en = 0x3fcef9a0;
+sdk_cfg_priv_opts = 0x3fcef958;
+BasePoint_x_256 = 0x3ff1ffdc;
+BasePoint_y_256 = 0x3ff1ffbc;
+DebugE256PublicKey_x = 0x3ff1ff9c;
+DebugE256PublicKey_y = 0x3ff1ff7c;
+DebugE256SecretKey = 0x3ff1ff5c;
+ECC_4Win_Look_up_table = 0x3ff1f7a0;
+LLM_AA_CT1 = 0x3ff1f79a;
+LLM_AA_CT2 = 0x3ff1f798;
+RF_TX_PW_CONV_TBL = 0x3ff1f790;
+TASK_DESC_MISC = 0x3ff1f784;
+adv_evt_prop2type = 0x3ff1f766;
+adv_evt_type2prop = 0x3ff1f761;
+aes_cmac_zero = 0x3ff1f751;
+aes_k2_salt = 0x3ff1f741;
+aes_k3_id64 = 0x3ff1f73c;
+aes_k3_salt = 0x3ff1f72c;
+aes_k4_id6 = 0x3ff1f728;
+aes_k4_salt = 0x3ff1f718;
+bigHexP256 = 0x3ff1f6ec;
+byte_tx_time = 0x3ff1f6e2;
+co_null_bdaddr = 0x3ff1f6dc;
+co_phy_mask_to_rate = 0x3ff1f6d7;
+co_phy_mask_to_value = 0x3ff1f6d2;
+co_phy_to_rate = 0x3ff1f6ce;
+co_phy_value_to_mask = 0x3ff1f6ca;
+co_rate_to_byte_dur_us = 0x3ff1f6c5;
+co_rate_to_phy = 0x3ff1f6c0;
+co_rate_to_phy_mask = 0x3ff1f6bc;
+co_sca2ppm = 0x3ff1f6ac;
+coef_B = 0x3ff1f680;
+connect_req_dur_tab = 0x3ff1f678;
+ecc_Jacobian_InfinityPoint256 = 0x3ff1f5f4;
+em_base_reg_lut = 0x3ff1f526;
+fixed_tx_time = 0x3ff1f51e;
+h4tl_msgtype2hdrlen = 0x3ff1f518;
+hci_cmd_desc_root_tab = 0x3ff1f4e8;
+hci_cmd_desc_tab_ctrl_bb = 0x3ff1f47c;
+hci_cmd_desc_tab_info_par = 0x3ff1f44c;
+hci_cmd_desc_tab_le = 0x3ff1f0b0;
+hci_cmd_desc_tab_lk_ctrl = 0x3ff1f098;
+hci_cmd_desc_tab_stat_par = 0x3ff1f08c;
+hci_cmd_desc_tab_vs = 0x3ff1f050;
+hci_evt_desc_tab = 0x3ff1f008;
+hci_evt_le_desc_tab = 0x3ff1ef68;
+hci_evt_le_desc_tab_esp = 0x3ff1ef60;
+hci_rsvd_evt_msk = 0x3ff1ef57;
+lld_aux_phy_to_rate = 0x3ff1ef54;
+lld_init_max_aux_dur_tab = 0x3ff1ef4c;
+lld_scan_map_legacy_pdu_to_evt_type = 0x3ff1ef44;
+lld_scan_max_aux_dur_tab = 0x3ff1ef3c;
+lld_sync_max_aux_dur_tab = 0x3ff1ef34;
+llm_local_le_feats = 0x3ff1ef2c;
+llm_local_le_states = 0x3ff1ef24;
+llm_local_supp_cmds = 0x3ff1eefc;
+maxSecretKey_256 = 0x3ff1eedc;
+max_data_tx_time = 0x3ff1eed4;
+one_bits = 0x3ff1eec3;
+rwip_coex_cfg = 0x3ff1eebe;
+rwip_priority = 0x3ff1eea8;
+veryBigHexP256 = 0x3ff1ee5c;
+
+
+/***************************************
+ Group rom_pp
+ ***************************************/
+
+/* Functions */
+esp_pp_rom_version_get = 0x40005250;
+RC_GetBlockAckTime = 0x4000525c;
+ebuf_list_remove = 0x40005268;
+esf_buf_alloc = 0x40005274;
+esf_buf_alloc_dynamic = 0x40005280;
+esf_buf_recycle = 0x4000528c;
+GetAccess = 0x40005298;
+hal_mac_is_low_rate_enabled = 0x400052a4;
+hal_mac_tx_get_blockack = 0x400052b0;
+hal_mac_tx_set_ppdu = 0x400052bc;
+ic_get_trc = 0x400052c8;
+ic_mac_deinit = 0x400052d4;
+ic_mac_init = 0x400052e0;
+ic_interface_enabled = 0x400052ec;
+is_lmac_idle = 0x400052f8;
+lmacAdjustTimestamp = 0x40005304;
+lmacDiscardAgedMSDU = 0x40005310;
+lmacDiscardMSDU = 0x4000531c;
+lmacEndFrameExchangeSequence = 0x40005328;
+lmacIsIdle = 0x40005334;
+lmacIsLongFrame = 0x40005340;
+lmacMSDUAged = 0x4000534c;
+lmacPostTxComplete = 0x40005358;
+lmacProcessAllTxTimeout = 0x40005364;
+lmacProcessCollisions = 0x40005370;
+lmacProcessRxSucData = 0x4000537c;
+lmacReachLongLimit = 0x40005388;
+lmacReachShortLimit = 0x40005394;
+lmacRecycleMPDU = 0x400053a0;
+lmacRxDone = 0x400053ac;
+lmacSetTxFrame = 0x400053b8;
+lmacTxDone = 0x400053c4;
+lmacTxFrame = 0x400053d0;
+mac_tx_set_duration = 0x400053dc;
+mac_tx_set_htsig = 0x400053e8;
+mac_tx_set_plcp0 = 0x400053f4;
+mac_tx_set_plcp1 = 0x40005400;
+mac_tx_set_plcp2 = 0x4000540c;
+pm_check_state = 0x40005418;
+pm_disable_dream_timer = 0x40005424;
+pm_disable_sleep_delay_timer = 0x40005430;
+pm_dream = 0x4000543c;
+pm_mac_wakeup = 0x40005448;
+pm_mac_sleep = 0x40005454;
+pm_enable_active_timer = 0x40005460;
+pm_enable_sleep_delay_timer = 0x4000546c;
+pm_local_tsf_process = 0x40005478;
+pm_set_beacon_filter = 0x40005484;
+pm_is_in_wifi_slice_threshold = 0x40005490;
+pm_is_waked = 0x4000549c;
+pm_keep_alive = 0x400054a8;
+pm_on_beacon_rx = 0x400054b4;
+pm_on_data_rx = 0x400054c0;
+pm_on_tbtt = 0x400054cc;
+pm_parse_beacon = 0x400054d8;
+pm_process_tim = 0x400054e4;
+pm_rx_beacon_process = 0x400054f0;
+pm_rx_data_process = 0x400054fc;
+pm_sleep = 0x40005508;
+pm_sleep_for = 0x40005514;
+pm_tbtt_process = 0x40005520;
+ppAMPDU2Normal = 0x4000552c;
+ppAssembleAMPDU = 0x40005538;
+ppCalFrameTimes = 0x40005544;
+ppCalSubFrameLength = 0x40005550;
+ppCalTxAMPDULength = 0x4000555c;
+ppCheckTxAMPDUlength = 0x40005568;
+ppDequeueRxq_Locked = 0x40005574;
+ppDequeueTxQ = 0x40005580;
+ppEmptyDelimiterLength = 0x4000558c;
+ppEnqueueRxq = 0x40005598;
+ppEnqueueTxDone = 0x400055a4;
+ppGetTxQFirstAvail_Locked = 0x400055b0;
+ppGetTxframe = 0x400055bc;
+ppMapTxQueue = 0x400055c8;
+ppProcessRxPktHdr = 0x400055e0;
+ppProcessTxQ = 0x400055ec;
+ppRecordBarRRC = 0x400055f8;
+lmacRequestTxopQueue = 0x40005604;
+lmacReleaseTxopQueue = 0x40005610;
+ppRecycleAmpdu = 0x4000561c;
+ppRecycleRxPkt = 0x40005628;
+ppResortTxAMPDU = 0x40005634;
+ppResumeTxAMPDU = 0x40005640;
+/* ppRxFragmentProc = 0x4000564c; */
+ppRxPkt = 0x40005658;
+ppRxProtoProc = 0x40005664;
+ppSearchTxQueue = 0x40005670;
+ppSearchTxframe = 0x4000567c;
+ppSelectNextQueue = 0x40005688;
+ppSubFromAMPDU = 0x40005694;
+ppTask = 0x400056a0;
+ppTxPkt = 0x400056ac;
+ppTxProtoProc = 0x400056b8;
+ppTxqUpdateBitmap = 0x400056c4;
+pp_coex_tx_request = 0x400056d0;
+pp_hdrsize = 0x400056dc;
+pp_post = 0x400056e8;
+pp_process_hmac_waiting_txq = 0x400056f4;
+rcGetAmpduSched = 0x40005700;
+rcUpdateRxDone = 0x4000570c;
+rc_get_trc = 0x40005718;
+rc_get_trc_by_index = 0x40005724;
+rcAmpduLowerRate = 0x40005730;
+rcampduuprate = 0x4000573c;
+rcClearCurAMPDUSched = 0x40005748;
+rcClearCurSched = 0x40005754;
+rcClearCurStat = 0x40005760;
+rcGetSched = 0x4000576c;
+rcLowerSched = 0x40005778;
+rcSetTxAmpduLimit = 0x40005784;
+rcTxUpdatePer = 0x40005790;
+rcUpdateAckSnr = 0x4000579c;
+rcUpdateRate = 0x400057a8;
+/* rcUpdateTxDone = 0x400057b4; */
+rcUpdateTxDoneAmpdu2 = 0x400057c0;
+rcUpSched = 0x400057cc;
+rssi_margin = 0x400057d8;
+rx11NRate2AMPDULimit = 0x400057e4;
+TRC_AMPDU_PER_DOWN_THRESHOLD = 0x400057f0;
+TRC_AMPDU_PER_UP_THRESHOLD = 0x400057fc;
+trc_calc_duration = 0x40005808;
+trc_isTxAmpduOperational = 0x40005814;
+trc_onAmpduOp = 0x40005820;
+TRC_PER_IS_GOOD = 0x4000582c;
+trc_SetTxAmpduState = 0x40005838;
+trc_tid_isTxAmpduOperational = 0x40005844;
+trcAmpduSetState = 0x40005850;
+wDevCheckBlockError = 0x4000585c;
+wDev_AppendRxBlocks = 0x40005868;
+wDev_DiscardFrame = 0x40005874;
+wDev_GetNoiseFloor = 0x40005880;
+wDev_IndicateAmpdu = 0x4000588c;
+wDev_IndicateFrame = 0x40005898;
+wdev_bank_store = 0x400058a4;
+wdev_bank_load = 0x400058b0;
+wdev_mac_reg_load = 0x400058bc;
+wdev_mac_reg_store = 0x400058c8;
+wdev_mac_special_reg_load = 0x400058d4;
+wdev_mac_special_reg_store = 0x400058e0;
+wdev_mac_wakeup = 0x400058ec;
+wdev_mac_sleep = 0x400058f8;
+hal_mac_is_dma_enable = 0x40005904;
+wDev_ProcessFiq = 0x40005910;
+wDev_ProcessRxSucData = 0x4000591c;
+wdevProcessRxSucDataAll = 0x40005928;
+wdev_csi_len_align = 0x40005934;
+ppDequeueTxDone_Locked = 0x40005940;
+ppProcTxDone = 0x4000594c;
+pm_tx_data_done_process = 0x40005958;
+config_is_cache_tx_buf_enabled = 0x40005964;
+ppMapWaitTxq = 0x40005970;
+ppProcessWaitingQueue = 0x4000597c;
+ppDisableQueue = 0x40005988;
+pm_allow_tx = 0x40005994;
+wdev_is_data_in_rxlist = 0x400059a0;
+ppProcTxCallback = 0x400059ac;
+/* Data (.data, .bss, .rodata) */
+our_instances_ptr = 0x3ff1ee58;
+pTxRx = 0x3fcef954;
+lmacConfMib_ptr = 0x3fcef950;
+our_wait_eb = 0x3fcef94c;
+our_tx_eb = 0x3fcef948;
+pp_wdev_funcs = 0x3fcef944;
+g_osi_funcs_p = 0x3fcef940;
+wDevCtrl_ptr = 0x3fcef93c;
+g_wdev_last_desc_reset_ptr = 0x3ff1ee54;
+wDevMacSleep_ptr = 0x3fcef938;
+g_lmac_cnt_ptr = 0x3fcef934;
+our_controls_ptr = 0x3ff1ee50;
+pp_sig_cnt_ptr = 0x3fcef930;
+g_eb_list_desc_ptr = 0x3fcef92c;
+s_fragment_ptr = 0x3fcef928;
+if_ctrl_ptr = 0x3fcef924;
+g_intr_lock_mux = 0x3fcef920;
+g_wifi_global_lock = 0x3fcef91c;
+s_wifi_queue = 0x3fcef918;
+pp_task_hdl = 0x3fcef914;
+s_pp_task_create_sem = 0x3fcef910;
+s_pp_task_del_sem = 0x3fcef90c;
+g_wifi_menuconfig_ptr = 0x3fcef908;
+xphyQueue = 0x3fcef904;
+ap_no_lr_ptr = 0x3fcef900;
+rc11BSchedTbl_ptr = 0x3fcef8fc;
+rc11NSchedTbl_ptr = 0x3fcef8f8;
+rcLoRaSchedTbl_ptr = 0x3fcef8f4;
+BasicOFDMSched_ptr = 0x3fcef8f0;
+trc_ctl_ptr = 0x3fcef8ec;
+g_pm_cnt_ptr = 0x3fcef8e8;
+g_pm_ptr = 0x3fcef8e4;
+g_pm_cfg_ptr = 0x3fcef8e0;
+g_esp_mesh_quick_funcs_ptr = 0x3fcef8dc;
+g_txop_queue_status_ptr = 0x3fcef8d8;
+g_mac_sleep_en_ptr = 0x3fcef8d4;
+g_mesh_is_root_ptr = 0x3fcef8d0;
+g_mesh_topology_ptr = 0x3fcef8cc;
+g_mesh_init_ps_type_ptr = 0x3fcef8c8;
+g_mesh_is_started_ptr = 0x3fcef8c4;
+g_config_func = 0x3fcef8c0;
+g_net80211_tx_func = 0x3fcef8bc;
+g_timer_func = 0x3fcef8b8;
+s_michael_mic_failure_cb = 0x3fcef8b4;
+wifi_sta_rx_probe_req = 0x3fcef8b0;
+g_tx_done_cb_func = 0x3fcef8ac;
+g_per_conn_trc = 0x3fcef860;
+s_encap_amsdu_func = 0x3fcef85c;
+
+
+/***************************************
+ Group rom_net80211
+ ***************************************/
+
+/* Functions */
+esp_net80211_rom_version_get = 0x400059b8;
+ampdu_dispatch = 0x400059c4;
+ampdu_dispatch_all = 0x400059d0;
+ampdu_dispatch_as_many_as_possible = 0x400059dc;
+ampdu_dispatch_movement = 0x400059e8;
+ampdu_dispatch_upto = 0x400059f4;
+chm_is_at_home_channel = 0x40005a00;
+cnx_node_is_existing = 0x40005a0c;
+cnx_node_search = 0x40005a18;
+ic_ebuf_recycle_rx = 0x40005a24;
+ic_ebuf_recycle_tx = 0x40005a30;
+ic_reset_rx_ba = 0x40005a3c;
+ieee80211_align_eb = 0x40005a48;
+ieee80211_ampdu_reorder = 0x40005a54;
+ieee80211_ampdu_start_age_timer = 0x40005a60;
+/* ieee80211_encap_esfbuf = 0x40005a6c; */
+ieee80211_is_tx_allowed = 0x40005a78;
+ieee80211_output_pending_eb = 0x40005a84;
+ieee80211_output_process = 0x40005a90;
+ieee80211_set_tx_desc = 0x40005a9c;
+sta_input = 0x40005aa8;
+wifi_get_macaddr = 0x40005ab4;
+wifi_rf_phy_disable = 0x40005ac0;
+wifi_rf_phy_enable = 0x40005acc;
+ic_ebuf_alloc = 0x40005ad8;
+ieee80211_classify = 0x40005ae4;
+ieee80211_copy_eb_header = 0x40005af0;
+ieee80211_recycle_cache_eb = 0x40005afc;
+ieee80211_search_node = 0x40005b08;
+roundup2 = 0x40005b14;
+ieee80211_crypto_encap = 0x40005b20;
+ieee80211_crypto_decap = 0x40005b2c;
+/* ieee80211_decap = 0x40005b38; */
+ieee80211_set_tx_pti = 0x40005b44;
+wifi_is_started = 0x40005b50;
+ieee80211_gettid = 0x40005b5c;
+/* Data (.data, .bss, .rodata) */
+net80211_funcs = 0x3fcef858;
+g_scan = 0x3fcef854;
+g_chm = 0x3fcef850;
+g_ic_ptr = 0x3fcef84c;
+g_hmac_cnt_ptr = 0x3fcef848;
+g_tx_cacheq_ptr = 0x3fcef844;
+s_netstack_free = 0x3fcef840;
+mesh_rxcb = 0x3fcef83c;
+sta_rxcb = 0x3fcef838;
+
+
+/***************************************
+ Group rom_coexist
+ ***************************************/
+
+/* Functions */
+esp_coex_rom_version_get = 0x40005b68;
+coex_bt_release = 0x40005b74;
+coex_bt_request = 0x40005b80;
+coex_core_ble_conn_dyn_prio_get = 0x40005b8c;
+coex_core_event_duration_get = 0x40005b98;
+coex_core_pti_get = 0x40005ba4;
+coex_core_release = 0x40005bb0;
+coex_core_request = 0x40005bbc;
+coex_core_status_get = 0x40005bc8;
+coex_core_timer_idx_get = 0x40005bd4;
+coex_event_duration_get = 0x40005be0;
+coex_hw_timer_disable = 0x40005bec;
+coex_hw_timer_enable = 0x40005bf8;
+coex_hw_timer_set = 0x40005c04;
+coex_schm_interval_set = 0x40005c10;
+coex_schm_lock = 0x40005c1c;
+coex_schm_unlock = 0x40005c28;
+coex_status_get = 0x40005c34;
+coex_wifi_release = 0x40005c40;
+esp_coex_ble_conn_dynamic_prio_get = 0x40005c4c;
+/* Data (.data, .bss, .rodata) */
+coex_env_ptr = 0x3fcef834;
+coex_pti_tab_ptr = 0x3fcef830;
+coex_schm_env_ptr = 0x3fcef82c;
+coexist_funcs = 0x3fcef828;
+g_coa_funcs_p = 0x3fcef824;
+g_coex_param_ptr = 0x3fcef820;
+
+
+/***************************************
+ Group rom_phy
+ ***************************************/
+
+/* Functions */
+phy_get_romfuncs = 0x40005c58;
+rom_abs_temp = 0x40005c64;
+rom_bb_bss_cbw40_dig = 0x40005c70;
+rom_bb_wdg_test_en = 0x40005c7c;
+rom_bb_wdt_get_status = 0x40005c88;
+rom_bb_wdt_int_enable = 0x40005c94;
+rom_bb_wdt_rst_enable = 0x40005ca0;
+rom_bb_wdt_timeout_clear = 0x40005cac;
+rom_cbw2040_cfg = 0x40005cb8;
+rom_check_noise_floor = 0x40005cc4;
+rom_chip_i2c_readReg = 0x40005cd0;
+rom_chip_i2c_writeReg = 0x40005cdc;
+rom_dc_iq_est = 0x40005ce8;
+rom_disable_agc = 0x40005cf4;
+rom_en_pwdet = 0x40005d00;
+rom_enable_agc = 0x40005d0c;
+rom_get_bbgain_db = 0x40005d18;
+rom_get_data_sat = 0x40005d24;
+rom_get_i2c_read_mask = 0x40005d30;
+rom_get_pwctrl_correct = 0x40005d3c;
+rom_i2c_readReg = 0x40005d48;
+rom_i2c_readReg_Mask = 0x40005d54;
+rom_i2c_writeReg = 0x40005d60;
+rom_i2c_writeReg_Mask = 0x40005d6c;
+rom_index_to_txbbgain = 0x40005d78;
+rom_iq_est_disable = 0x40005d84;
+rom_iq_est_enable = 0x40005d90;
+rom_linear_to_db = 0x40005d9c;
+rom_loopback_mode_en = 0x40005da8;
+rom_mhz2ieee = 0x40005db4;
+rom_noise_floor_auto_set = 0x40005dc0;
+rom_pbus_debugmode = 0x40005dcc;
+rom_pbus_force_mode = 0x40005dd8;
+rom_pbus_force_test = 0x40005de4;
+rom_pbus_rd = 0x40005df0;
+rom_pbus_rd_addr = 0x40005dfc;
+rom_pbus_rd_shift = 0x40005e08;
+rom_pbus_set_dco = 0x40005e14;
+rom_pbus_set_rxgain = 0x40005e20;
+rom_pbus_workmode = 0x40005e2c;
+rom_pbus_xpd_rx_off = 0x40005e38;
+rom_pbus_xpd_rx_on = 0x40005e44;
+rom_pbus_xpd_tx_off = 0x40005e50;
+rom_pbus_xpd_tx_on = 0x40005e5c;
+rom_phy_byte_to_word = 0x40005e68;
+rom_phy_disable_cca = 0x40005e74;
+rom_phy_enable_cca = 0x40005e80;
+rom_phy_get_noisefloor = 0x40005e8c;
+rom_phy_get_rx_freq = 0x40005e98;
+rom_phy_set_bbfreq_init = 0x40005ea4;
+rom_pow_usr = 0x40005eb0;
+rom_pwdet_sar2_init = 0x40005ebc;
+rom_read_hw_noisefloor = 0x40005ec8;
+rom_read_sar_dout = 0x40005ed4;
+rom_set_cal_rxdc = 0x40005ee0;
+rom_set_chan_cal_interp = 0x40005eec;
+rom_set_loopback_gain = 0x40005ef8;
+rom_set_noise_floor = 0x40005f04;
+rom_set_rxclk_en = 0x40005f10;
+rom_set_tx_dig_gain = 0x40005f1c;
+rom_set_txcap_reg = 0x40005f28;
+rom_set_txclk_en = 0x40005f34;
+rom_spur_cal = 0x40005f40;
+rom_spur_reg_write_one_tone = 0x40005f4c;
+rom_target_power_add_backoff = 0x40005f58;
+rom_tx_pwctrl_bg_init = 0x40005f64;
+rom_txbbgain_to_index = 0x40005f70;
+rom_wifi_11g_rate_chg = 0x40005f7c;
+rom_write_gain_mem = 0x40005f88;
+chip728_phyrom_version = 0x40005f94;
+rom_disable_wifi_agc = 0x40005fa0;
+rom_enable_wifi_agc = 0x40005fac;
+rom_bt_index_to_bb = 0x40005fb8;
+rom_bt_bb_to_index = 0x40005fc4;
+rom_spur_coef_cfg = 0x40005fd0;
+rom_bb_bss_cbw40 = 0x40005fdc;
+rom_set_cca = 0x40005fe8;
+rom_tx_paon_set = 0x40005ff4;
+rom_i2cmst_reg_init = 0x40006000;
+rom_iq_corr_enable = 0x4000600c;
+rom_fe_reg_init = 0x40006018;
+rom_agc_reg_init = 0x40006024;
+rom_bb_reg_init = 0x40006030;
+rom_mac_enable_bb = 0x4000603c;
+rom_bb_wdg_cfg = 0x40006048;
+rom_force_txon = 0x40006054;
+rom_fe_txrx_reset = 0x40006060;
+rom_set_rx_comp = 0x4000606c;
+rom_set_pbus_reg = 0x40006078;
+rom_write_chan_freq = 0x40006084;
+rom_phy_xpd_rf = 0x40006090;
+rom_set_xpd_sar = 0x4000609c;
+rom_get_target_power_offset = 0x400060a8;
+rom_write_txrate_power_offset = 0x400060b4;
+rom_get_rate_fcc_index = 0x400060c0;
+rom_get_rate_target_power = 0x400060cc;
+rom_pkdet_vol_start = 0x400060d8;
+rom_read_sar2_code = 0x400060e4;
+rom_get_sar2_vol = 0x400060f0;
+rom_get_pll_vol = 0x400060fc;
+rom_get_phy_target_power = 0x40006108;
+rom_temp_to_power = 0x40006114;
+rom_phy_track_pll_cap = 0x40006120;
+rom_phy_pwdet_always_en = 0x4000612c;
+rom_phy_pwdet_onetime_en = 0x40006138;
+rom_get_i2c_mst0_mask = 0x40006144;
+rom_get_i2c_hostid = 0x40006150;
+rom_enter_critical_phy = 0x4000615c;
+rom_exit_critical_phy = 0x40006168;
+rom_chip_i2c_readReg_org = 0x40006174;
+rom_i2c_paral_set_mst0 = 0x40006180;
+rom_i2c_paral_set_read = 0x4000618c;
+rom_i2c_paral_read = 0x40006198;
+rom_i2c_paral_write = 0x400061a4;
+rom_i2c_paral_write_num = 0x400061b0;
+rom_i2c_paral_write_mask = 0x400061bc;
+rom_bb_bss_cbw40_ana = 0x400061c8;
+rom_chan_to_freq = 0x400061d4;
+rom_open_i2c_xpd = 0x400061e0;
+rom_dac_rate_set = 0x400061ec;
+rom_tsens_read_init = 0x400061f8;
+rom_tsens_code_read = 0x40006204;
+rom_tsens_index_to_dac = 0x40006210;
+rom_tsens_index_to_offset = 0x4000621c;
+rom_tsens_dac_cal = 0x40006228;
+rom_code_to_temp = 0x40006234;
+rom_write_pll_cap_mem = 0x40006240;
+rom_pll_correct_dcap = 0x4000624c;
+rom_phy_en_hw_set_freq = 0x40006258;
+rom_phy_dis_hw_set_freq = 0x40006264;
+rom_pll_vol_cal = 0x40006270;
+rom_wrtie_pll_cap = 0x4000627c;
+rom_set_tx_gain_mem = 0x40006288;
+rom_bt_tx_dig_gain = 0x40006294;
+rom_bt_get_tx_gain = 0x400062a0;
+rom_get_chan_target_power = 0x400062ac;
+rom_get_tx_gain_value = 0x400062b8;
+rom_wifi_tx_dig_gain = 0x400062c4;
+rom_wifi_get_tx_gain = 0x400062d0;
+rom_fe_i2c_reg_renew = 0x400062dc;
+rom_wifi_agc_sat_gain = 0x400062e8;
+rom_i2c_master_reset = 0x400062f4;
+rom_bt_filter_reg = 0x40006300;
+rom_phy_bbpll_cal = 0x4000630c;
+rom_i2c_sar2_init_code = 0x40006318;
+rom_phy_param_addr = 0x40006324;
+rom_phy_reg_init = 0x40006330;
+rom_set_chan_reg = 0x4000633c;
+rom_phy_wakeup_init = 0x40006348;
+rom_phy_i2c_init1 = 0x40006354;
+rom_tsens_temp_read = 0x40006360;
+rom_bt_track_pll_cap = 0x4000636c;
+rom_wifi_track_pll_cap = 0x40006378;
+rom_wifi_set_tx_gain = 0x40006384;
+rom_txpwr_cal_track = 0x40006390;
+rom_tx_pwctrl_background = 0x4000639c;
+rom_bt_set_tx_gain = 0x400063a8;
+rom_noise_check_loop = 0x400063b4;
+rom_phy_close_rf = 0x400063c0;
+rom_phy_xpd_tsens = 0x400063cc;
+rom_phy_freq_mem_backup = 0x400063d8;
+rom_phy_ant_init = 0x400063e4;
+rom_bt_track_tx_power = 0x400063f0;
+rom_wifi_track_tx_power = 0x400063fc;
+rom_phy_dig_reg_backup = 0x40006408;
+chip728_phyrom_version_num = 0x40006414;
+rom_mac_tx_chan_offset = 0x40006420;
+rom_rx_gain_force = 0x4000642c;
+/* Data (.data, .bss, .rodata) */
+phy_param_rom = 0x3fcef81c;
diff --git a/tools/sdk/esp32s3/ld/esp32s3.rom.libgcc.ld b/tools/sdk/esp32s3/ld/esp32s3.rom.libgcc.ld
new file mode 100644
index 00000000000..3571b0380d8
--- /dev/null
+++ b/tools/sdk/esp32s3/ld/esp32s3.rom.libgcc.ld
@@ -0,0 +1,105 @@
+/* ROM function interface esp32s3.rom.libgcc.ld for esp32s3
+ *
+ *
+ * Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group libgcc
+ ***************************************/
+
+/* Functions */
+__absvdi2 = 0x4000216c;
+__absvsi2 = 0x40002178;
+__adddf3 = 0x40002184;
+__addsf3 = 0x40002190;
+__addvdi3 = 0x4000219c;
+__addvsi3 = 0x400021a8;
+__ashldi3 = 0x400021b4;
+__ashrdi3 = 0x400021c0;
+__bswapdi2 = 0x400021cc;
+__bswapsi2 = 0x400021d8;
+__clear_cache = 0x400021e4;
+__clrsbdi2 = 0x400021f0;
+__clrsbsi2 = 0x400021fc;
+__clzdi2 = 0x40002208;
+__clzsi2 = 0x40002214;
+__cmpdi2 = 0x40002220;
+__ctzdi2 = 0x4000222c;
+__ctzsi2 = 0x40002238;
+__divdc3 = 0x40002244;
+__divdf3 = 0x40002250;
+__divdi3 = 0x4000225c;
+__divsc3 = 0x40002268;
+__divsf3 = 0x40002274;
+__divsi3 = 0x40002280;
+__eqdf2 = 0x4000228c;
+__eqsf2 = 0x40002298;
+__extendsfdf2 = 0x400022a4;
+__ffsdi2 = 0x400022b0;
+__ffssi2 = 0x400022bc;
+__fixdfdi = 0x400022c8;
+__fixdfsi = 0x400022d4;
+__fixsfdi = 0x400022e0;
+__fixsfsi = 0x400022ec;
+__fixunsdfsi = 0x400022f8;
+__fixunssfdi = 0x40002304;
+__fixunssfsi = 0x40002310;
+__floatdidf = 0x4000231c;
+__floatdisf = 0x40002328;
+__floatsidf = 0x40002334;
+__floatsisf = 0x40002340;
+__floatundidf = 0x4000234c;
+__floatundisf = 0x40002358;
+__floatunsidf = 0x40002364;
+__floatunsisf = 0x40002370;
+__gcc_bcmp = 0x4000237c;
+__gedf2 = 0x40002388;
+__gesf2 = 0x40002394;
+__gtdf2 = 0x400023a0;
+__gtsf2 = 0x400023ac;
+__ledf2 = 0x400023b8;
+__lesf2 = 0x400023c4;
+__lshrdi3 = 0x400023d0;
+__ltdf2 = 0x400023dc;
+__ltsf2 = 0x400023e8;
+__moddi3 = 0x400023f4;
+__modsi3 = 0x40002400;
+__muldc3 = 0x4000240c;
+__muldf3 = 0x40002418;
+__muldi3 = 0x40002424;
+__mulsc3 = 0x40002430;
+__mulsf3 = 0x4000243c;
+__mulsi3 = 0x40002448;
+__mulvdi3 = 0x40002454;
+__mulvsi3 = 0x40002460;
+__nedf2 = 0x4000246c;
+__negdf2 = 0x40002478;
+__negdi2 = 0x40002484;
+__negsf2 = 0x40002490;
+__negvdi2 = 0x4000249c;
+__negvsi2 = 0x400024a8;
+__nesf2 = 0x400024b4;
+__paritysi2 = 0x400024c0;
+__popcountdi2 = 0x400024cc;
+__popcountsi2 = 0x400024d8;
+__powidf2 = 0x400024e4;
+__powisf2 = 0x400024f0;
+__subdf3 = 0x400024fc;
+__subsf3 = 0x40002508;
+__subvdi3 = 0x40002514;
+__subvsi3 = 0x40002520;
+__truncdfsf2 = 0x4000252c;
+__ucmpdi2 = 0x40002538;
+__udivdi3 = 0x40002544;
+__udivmoddi4 = 0x40002550;
+__udivsi3 = 0x4000255c;
+__udiv_w_sdiv = 0x40002568;
+__umoddi3 = 0x40002574;
+__umodsi3 = 0x40002580;
+__unorddf2 = 0x4000258c;
+__unordsf2 = 0x40002598;
diff --git a/tools/sdk/esp32s3/ld/esp32s3.rom.newlib-nano.ld b/tools/sdk/esp32s3/ld/esp32s3.rom.newlib-nano.ld
new file mode 100644
index 00000000000..1be53790e6b
--- /dev/null
+++ b/tools/sdk/esp32s3/ld/esp32s3.rom.newlib-nano.ld
@@ -0,0 +1,27 @@
+/* ROM function interface esp32s3.rom.newlib-nano.ld for esp32s3
+ *
+ *
+ * Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group newlib_nano_format
+ ***************************************/
+
+/* Functions */
+__sprint_r = 0x4000156c;
+_fiprintf_r = 0x40001578;
+_fprintf_r = 0x40001584;
+_printf_common = 0x40001590;
+_printf_i = 0x4000159c;
+_vfiprintf_r = 0x400015a8;
+_vfprintf_r = 0x400015b4;
+fiprintf = 0x400015c0;
+fprintf = 0x400015cc;
+printf = 0x400015d8;
+vfiprintf = 0x400015e4;
+vfprintf = 0x400015f0;
diff --git a/tools/sdk/esp32s3/ld/esp32s3.rom.newlib-time.ld b/tools/sdk/esp32s3/ld/esp32s3.rom.newlib-time.ld
new file mode 100644
index 00000000000..986ce3a18d5
--- /dev/null
+++ b/tools/sdk/esp32s3/ld/esp32s3.rom.newlib-time.ld
@@ -0,0 +1,15 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* These are the newlib functions and the .bss/.data symbols which are related to 'time_t'
+   or other structures which include 'time_t' (like 'struct stat').
+   These ROM functions were compiled with sizeof(time_t) == 4.
+   When compiling with sizeof(time_t) == 8, these functions should be excluded from the build.
+ */
+
+_isatty_r = 0x4000126c;
+PROVIDE( __smakebuf_r = 0x40001530 );
+PROVIDE( __swsetup_r = 0x40001560 );
+PROVIDE( __swhatbuf_r = 0x4000153c );
diff --git a/tools/sdk/esp32s3/ld/esp32s3.rom.newlib.ld b/tools/sdk/esp32s3/ld/esp32s3.rom.newlib.ld
new file mode 100644
index 00000000000..2b64c0e9405
--- /dev/null
+++ b/tools/sdk/esp32s3/ld/esp32s3.rom.newlib.ld
@@ -0,0 +1,90 @@
+/* ROM function interface esp32s3.rom.newlib.ld for esp32s3
+ *
+ *
+ * Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group newlib
+ ***************************************/
+
+/* Functions */
+esp_rom_newlib_init_common_mutexes = 0x400011dc;
+memset = 0x400011e8;
+memcpy = 0x400011f4;
+memmove = 0x40001200;
+memcmp = 0x4000120c;
+strcpy = 0x40001218;
+strncpy = 0x40001224;
+strcmp = 0x40001230;
+strncmp = 0x4000123c;
+strlen = 0x40001248;
+strstr = 0x40001254;
+bzero = 0x40001260;
+sbrk = 0x40001278;
+isalnum = 0x40001284;
+isalpha = 0x40001290;
+isascii = 0x4000129c;
+isblank = 0x400012a8;
+iscntrl = 0x400012b4;
+isdigit = 0x400012c0;
+islower = 0x400012cc;
+isgraph = 0x400012d8;
+isprint = 0x400012e4;
+ispunct = 0x400012f0;
+isspace = 0x400012fc;
+isupper = 0x40001308;
+toupper = 0x40001314;
+tolower = 0x40001320;
+toascii = 0x4000132c;
+memccpy = 0x40001338;
+memchr = 0x40001344;
+memrchr = 0x40001350;
+strcasecmp = 0x4000135c;
+strcasestr = 0x40001368;
+strcat = 0x40001374;
+strdup = 0x40001380;
+strchr = 0x4000138c;
+strcspn = 0x40001398;
+strcoll = 0x400013a4;
+strlcat = 0x400013b0;
+strlcpy = 0x400013bc;
+strlwr = 0x400013c8;
+strncasecmp = 0x400013d4;
+strncat = 0x400013e0;
+strndup = 0x400013ec;
+strnlen = 0x400013f8;
+strrchr = 0x40001404;
+strsep = 0x40001410;
+strspn = 0x4000141c;
+strtok_r = 0x40001428;
+strupr = 0x40001434;
+longjmp = 0x40001440;
+setjmp = 0x4000144c;
+abs = 0x40001458;
+div = 0x40001464;
+labs = 0x40001470;
+ldiv = 0x4000147c;
+qsort = 0x40001488;
+rand_r = 0x40001494;
+rand = 0x400014a0;
+srand = 0x400014ac;
+utoa = 0x400014b8;
+itoa = 0x400014c4;
+atoi = 0x400014d0;
+atol = 0x400014dc;
+strtol = 0x400014e8;
+strtoul = 0x400014f4;
+PROVIDE( fflush = 0x40001500 );
+PROVIDE( _fflush_r = 0x4000150c );
+PROVIDE( _fwalk = 0x40001518 );
+PROVIDE( _fwalk_reent = 0x40001524 );
+PROVIDE( __swbuf_r = 0x40001548 );
+__swbuf = 0x40001554;
+/* Data (.data, .bss, .rodata) */
+syscall_table_ptr = 0x3fceffd4;
+_global_impure_ptr = 0x3fceffd0;
diff --git a/tools/sdk/esp32s3/ld/esp32s3.rom.version.ld b/tools/sdk/esp32s3/ld/esp32s3.rom.version.ld
new file mode 100644
index 00000000000..402022f94a6
--- /dev/null
+++ b/tools/sdk/esp32s3/ld/esp32s3.rom.version.ld
@@ -0,0 +1,8 @@
+/* ROM version variables for esp32s3
+ *
+ * These addresses should be compatible with any ROM version for this chip.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+_rom_chip_id = 0x40000570;
+_rom_eco_version = 0x40000574;
diff --git a/tools/sdk/esp32s3/ld/libbtbb.a b/tools/sdk/esp32s3/ld/libbtbb.a
new file mode 100644
index 00000000000..88c2b9f9e23
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diff --git a/tools/sdk/esp32s3/ld/libbtdm_app.a b/tools/sdk/esp32s3/ld/libbtdm_app.a
new file mode 100644
index 00000000000..c8189c4a006
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diff --git a/tools/sdk/esp32s3/ld/libc_speech_features.a b/tools/sdk/esp32s3/ld/libc_speech_features.a
new file mode 100644
index 00000000000..d889e5bc030
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diff --git a/tools/sdk/esp32s3/ld/libcat_face_detect.a b/tools/sdk/esp32s3/ld/libcat_face_detect.a
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index 00000000000..d02a60713ba
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diff --git a/tools/sdk/esp32s3/ld/libcolor_detect.a b/tools/sdk/esp32s3/ld/libcolor_detect.a
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index 00000000000..563b575e0f6
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diff --git a/tools/sdk/esp32s3/ld/libdl.a b/tools/sdk/esp32s3/ld/libdl.a
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index 00000000000..99d593fd1ee
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diff --git a/tools/sdk/esp32s3/ld/libdl_lib.a b/tools/sdk/esp32s3/ld/libdl_lib.a
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index 00000000000..026588c95b0
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diff --git a/tools/sdk/esp32s3/ld/libesp_tts_chinese.a b/tools/sdk/esp32s3/ld/libesp_tts_chinese.a
new file mode 100644
index 00000000000..5278f364db3
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diff --git a/tools/sdk/esp32s3/ld/libhuman_face_detect.a b/tools/sdk/esp32s3/ld/libhuman_face_detect.a
new file mode 100644
index 00000000000..3da8016abc1
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diff --git a/tools/sdk/esp32s3/ld/libmfn.a b/tools/sdk/esp32s3/ld/libmfn.a
new file mode 100644
index 00000000000..beccb735b1a
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diff --git a/tools/sdk/esp32s3/ld/libphy.a b/tools/sdk/esp32s3/ld/libphy.a
new file mode 100644
index 00000000000..dba6f1b2928
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diff --git a/tools/sdk/esp32s3/ld/libvoice_set_xiaole.a b/tools/sdk/esp32s3/ld/libvoice_set_xiaole.a
new file mode 100644
index 00000000000..8b76acd7529
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diff --git a/tools/sdk/esp32s3/ld/memory.ld b/tools/sdk/esp32s3/ld/memory.ld
new file mode 100644
index 00000000000..f399b703611
--- /dev/null
+++ b/tools/sdk/esp32s3/ld/memory.ld
@@ -0,0 +1,94 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/**
+ *                    ESP32-S3 Linker Script Memory Layout
+ * This file describes the memory layout (memory blocks) by virtual memory addresses.
+ * This linker script is passed through the C preprocessor to include configuration options.
+ * Please use preprocessor features sparingly!
+ * Restrict to simple macros with numeric values, and/or #if/#endif blocks.
+ */
+/*
+ * Automatically generated file. DO NOT EDIT.
+ * Espressif IoT Development Framework (ESP-IDF) Configuration Header
+ */
+       
+/* List of deprecated options */
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* CPU instruction prefetch padding size for flash mmap scenario */
+_esp_flash_mmap_prefetch_pad_size = 16;
+/* CPU instruction prefetch padding size for memory protection scenario */
+_esp_memprot_prefetch_pad_size = 0;
+/* Memory alignment size for PMS */
+_esp_memprot_align_size = 0;
+/*
+ * 40370000 <- IRAM/Icache -> 40378000 <- D/IRAM (I) -> 403E0000
+ *                            3FC88000 <- D/IRAM (D) -> 3FCF0000 <- DRAM/DCache -> 3FD00000
+ *
+ * Startup code uses the IRAM from 0x403BA000 to 0x403E0000, which is not available for static
+ * memory, but can only be used after app starts.
+ *
+ * D cache use the memory from high address, so when it's configured to 16K/32K, the region
+ * 0x3FCF000 ~ (3FD00000 - DATA_CACHE_SIZE) should be available. This region is not used as
+ * static memory, leaving to the heap.
+ */
+MEMORY
+{
+  /**
+   *  All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
+   *  of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
+   *  are connected to the data port of the CPU and eg allow byte-wise access.
+   */
+  /* IRAM for PRO CPU. */
+  iram0_0_seg (RX) : org = (0x40370000 + 0x4000), len = (((0x403BA000 - (0x40378000 - 0x3FC88000)) - 0x3FC88000) + 0x8000 - 0x4000)
+  /* Flash mapped instruction data */
+  iram0_2_seg (RX) : org = 0x42000020, len = 0x800000-0x20
+  /**
+   * (0x20 offset above is a convenience for the app binary image generation.
+   * Flash cache has 64KB pages. The .bin file which is flashed to the chip
+   * has a 0x18 byte file header, and each segment has a 0x08 byte segment
+   * header. Setting this offset makes it simple to meet the flash cache MMU's
+   * constraint that (paddr % 64KB == vaddr % 64KB).)
+   */
+  /**
+   * Shared data RAM, excluding memory reserved for ROM bss/data/stack.
+   * Enabling Bluetooth & Trace Memory features in menuconfig will decrease the amount of RAM available.
+   */
+  dram0_0_seg (RW) : org = (0x3FC88000), len = ((0x403BA000 - (0x40378000 - 0x3FC88000)) - 0x3FC88000)
+  /* Flash mapped constant data */
+  drom0_0_seg (R) : org = 0x3C000020, len = 0x800000-0x20
+  /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
+  /**
+   * RTC fast memory (executable). Persists over deep sleep.
+   */
+  rtc_iram_seg(RWX) : org = 0x600fe000, len = 0x2000 - (0x10)
+  /**
+   * RTC fast memory (same block as above), viewed from data bus
+   */
+  rtc_data_seg(RW) : org = 0x600fe000, len = 0x2000 - (0x10)
+  /**
+   * RTC slow memory (data accessible). Persists over deep sleep.
+   * Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
+   */
+  rtc_slow_seg(RW) : org = 0x50000000 + 0,
+                                     len = 0x2000 - 0
+}
+_static_data_end = _bss_end;
+/* Heap ends at top of dram0_0_seg */
+_heap_end = 0x40000000;
+_data_seg_org = ORIGIN(rtc_data_seg);
+REGION_ALIAS("rtc_data_location", rtc_slow_seg );
+REGION_ALIAS("default_code_seg", iram0_2_seg);
+REGION_ALIAS("default_rodata_seg", drom0_0_seg);
+/**
+ *  If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
+ *  also be first in the segment.
+ */
+  ASSERT(_flash_rodata_dummy_start == ORIGIN(default_rodata_seg),
+         ".flash_rodata_dummy section must be placed at the beginning of the rodata segment.")
diff --git a/tools/sdk/esp32s3/lib/libapp_trace.a b/tools/sdk/esp32s3/lib/libapp_trace.a
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index 00000000000..5720c8977f6
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diff --git a/tools/sdk/esp32s3/lib/libapp_update.a b/tools/sdk/esp32s3/lib/libapp_update.a
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index 00000000000..916a28ee901
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diff --git a/tools/sdk/esp32s3/lib/libarduino_tinyusb.a b/tools/sdk/esp32s3/lib/libarduino_tinyusb.a
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index 00000000000..f12161a69f4
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diff --git a/tools/sdk/esp32s3/lib/libasio.a b/tools/sdk/esp32s3/lib/libasio.a
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index 00000000000..c358af6008e
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diff --git a/tools/sdk/esp32s3/lib/libbt.a b/tools/sdk/esp32s3/lib/libbt.a
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index 00000000000..d6c9485cd89
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diff --git a/tools/sdk/esp32s3/lib/libbutton.a b/tools/sdk/esp32s3/lib/libbutton.a
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index 00000000000..8f8b2e582a7
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diff --git a/tools/sdk/esp32s3/lib/libcbor.a b/tools/sdk/esp32s3/lib/libcbor.a
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index 00000000000..dedc967bc48
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diff --git a/tools/sdk/esp32s3/lib/libcoexist.a b/tools/sdk/esp32s3/lib/libcoexist.a
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index 00000000000..1c296cfb4d8
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diff --git a/tools/sdk/esp32s3/lib/libconsole.a b/tools/sdk/esp32s3/lib/libconsole.a
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index 00000000000..53e216e6f76
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diff --git a/tools/sdk/esp32s3/lib/libcore.a b/tools/sdk/esp32s3/lib/libcore.a
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diff --git a/tools/sdk/esp32s3/lib/libdriver.a b/tools/sdk/esp32s3/lib/libdriver.a
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index 00000000000..59029884448
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diff --git a/tools/sdk/esp32s3/lib/libesp-dsp.a b/tools/sdk/esp32s3/lib/libesp-dsp.a
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index 00000000000..bbd4491f949
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diff --git a/tools/sdk/esp32s3/lib/libesp-sr.a b/tools/sdk/esp32s3/lib/libesp-sr.a
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index 00000000000..d63e9198934
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diff --git a/tools/sdk/esp32s3/lib/libesp-tls.a b/tools/sdk/esp32s3/lib/libesp-tls.a
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diff --git a/tools/sdk/esp32s3/lib/libesp32-camera.a b/tools/sdk/esp32s3/lib/libesp32-camera.a
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index 00000000000..e1714695bdf
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diff --git a/tools/sdk/esp32s3/opi_opi/include/sdkconfig.h b/tools/sdk/esp32s3/opi_opi/include/sdkconfig.h
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+++ b/tools/sdk/esp32s3/opi_opi/include/sdkconfig.h
@@ -0,0 +1,994 @@
+/*
+ * Automatically generated file. DO NOT EDIT.
+ * Espressif IoT Development Framework (ESP-IDF) Configuration Header
+ */
+#pragma once
+#define CONFIG_IDF_CMAKE 1
+#define CONFIG_IDF_TARGET_ARCH_XTENSA 1
+#define CONFIG_IDF_TARGET "esp32s3"
+#define CONFIG_IDF_TARGET_ESP32S3 1
+#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0009
+#define CONFIG_SDK_TOOLPREFIX "xtensa-esp32s3-elf-"
+#define CONFIG_APP_BUILD_TYPE_APP_2NDBOOT 1
+#define CONFIG_APP_BUILD_GENERATE_BINARIES 1
+#define CONFIG_APP_BUILD_BOOTLOADER 1
+#define CONFIG_APP_BUILD_USE_FLASH_SECTIONS 1
+#define CONFIG_APP_COMPILE_TIME_DATE 1
+#define CONFIG_APP_RETRIEVE_LEN_ELF_SHA 16
+#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0
+#define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
+#define CONFIG_BOOTLOADER_LOG_LEVEL_NONE 1
+#define CONFIG_BOOTLOADER_LOG_LEVEL 0
+#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
+#define CONFIG_BOOTLOADER_WDT_ENABLE 1
+#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
+#define CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP 1
+#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x10
+#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
+#define CONFIG_SECURE_BOOT_SUPPORTS_RSA 1
+#define CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE 1
+#define CONFIG_BOOT_ROM_LOG_ALWAYS_ON 1
+#define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
+#define CONFIG_ESPTOOLPY_OCT_FLASH 1
+#define CONFIG_ESPTOOLPY_FLASHMODE_OPI 1
+#define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR 1
+#define CONFIG_ESPTOOLPY_FLASHMODE "dout"
+#define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1
+#define CONFIG_ESPTOOLPY_FLASHFREQ "80m"
+#define CONFIG_ESPTOOLPY_FLASHSIZE_4MB 1
+#define CONFIG_ESPTOOLPY_FLASHSIZE "4MB"
+#define CONFIG_ESPTOOLPY_FLASHSIZE_DETECT 1
+#define CONFIG_ESPTOOLPY_BEFORE_RESET 1
+#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
+#define CONFIG_ESPTOOLPY_AFTER_RESET 1
+#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B 1
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL 115200
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD 115200
+#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
+#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
+#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
+#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
+#define CONFIG_PARTITION_TABLE_MD5 1
+#define CONFIG_LIB_BUILDER_FLASHMODE "opi"
+#define CONFIG_LIB_BUILDER_FLASHFREQ "80m"
+#define CONFIG_ESP_RMAKER_ASSISTED_CLAIM 1
+#define CONFIG_ESP_RMAKER_CLAIM_TYPE 2
+#define CONFIG_ESP_RMAKER_MQTT_HOST "a1p72mufdu6064-ats.iot.us-east-1.amazonaws.com"
+#define CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE 1024
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0 1
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM 0
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH 1
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD 0
+#define CONFIG_ESP_RMAKER_OTA_HTTP_RX_BUFFER_SIZE 1024
+#define CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES 10
+#define CONFIG_ESP_RMAKER_SCENES_MAX_SCENES 10
+#define CONFIG_ENABLE_ARDUINO_DEPENDS 1
+#define CONFIG_AUTOSTART_ARDUINO 1
+#define CONFIG_ARDUINO_RUN_CORE1 1
+#define CONFIG_ARDUINO_RUNNING_CORE 1
+#define CONFIG_ARDUINO_LOOP_STACK_SIZE 8192
+#define CONFIG_ARDUINO_EVENT_RUN_CORE1 1
+#define CONFIG_ARDUINO_EVENT_RUNNING_CORE 1
+#define CONFIG_ARDUINO_UDP_RUN_CORE0 1
+#define CONFIG_ARDUINO_UDP_TASK_PRIORITY 3
+#define CONFIG_ARDUINO_UDP_RUNNING_CORE 0
+#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR 1
+#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL 1
+#define CONFIG_ARDUHAL_ESP_LOG 1
+#define CONFIG_ARDUHAL_PARTITION_SCHEME_DEFAULT 1
+#define CONFIG_ARDUHAL_PARTITION_SCHEME "default"
+#define CONFIG_TINYUSB_ENABLED 1
+#define CONFIG_TINYUSB_CDC_ENABLED 1
+#define CONFIG_TINYUSB_DESC_CDC_STRING "Espressif CDC Device"
+#define CONFIG_TINYUSB_CDC_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_CDC_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_MSC_ENABLED 1
+#define CONFIG_TINYUSB_DESC_MSC_STRING "Espressif MSC Device"
+#define CONFIG_TINYUSB_MSC_BUFSIZE 4096
+#define CONFIG_TINYUSB_HID_ENABLED 1
+#define CONFIG_TINYUSB_DESC_HID_STRING "Espressif HID Device"
+#define CONFIG_TINYUSB_HID_BUFSIZE 64
+#define CONFIG_TINYUSB_MIDI_ENABLED 1
+#define CONFIG_TINYUSB_DESC_MIDI_STRING "Espressif MIDI Device"
+#define CONFIG_TINYUSB_MIDI_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_MIDI_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_VIDEO_ENABLED 1
+#define CONFIG_TINYUSB_DESC_VIDEO_STRING "Espressif VIDEO Device"
+#define CONFIG_TINYUSB_VIDEO_STREAMING_BUFSIZE 64
+#define CONFIG_TINYUSB_VIDEO_STREAMING_IFS 1
+#define CONFIG_TINYUSB_DFU_RT_ENABLED 1
+#define CONFIG_TINYUSB_DESC_DFU_RT_STRING "Espressif DFU_RT Device"
+#define CONFIG_TINYUSB_VENDOR_ENABLED 1
+#define CONFIG_TINYUSB_DESC_VENDOR_STRING "Espressif VENDOR Device"
+#define CONFIG_TINYUSB_VENDOR_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_VENDOR_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_DEBUG_LEVEL 0
+#define CONFIG_MODEL_IN_SPIFFS 1
+#define CONFIG_USE_WAKENET 1
+#define CONFIG_SR_WN_MODEL_WN8_QUANT 1
+#define CONFIG_SR_WN_WN8_HIESP 1
+#define CONFIG_USE_MULTINET 1
+#define CONFIG_SR_MN_ENGLISH 1
+#define CONFIG_SR_MN_EN_MULTINET5_SINGLE_RECOGNITION_QUANT8 1
+#define CONFIG_EN_SPEECH_COMMAND_ID0 "TfL Mm c qbK"
+#define CONFIG_EN_SPEECH_COMMAND_ID1 "Sgl c Sel"
+#define CONFIG_EN_SPEECH_COMMAND_ID2 "PLd NoZ paNcL"
+#define CONFIG_EN_SPEECH_COMMAND_ID3 "TkN nN Mi StNDBnKS"
+#define CONFIG_EN_SPEECH_COMMAND_ID4 "TkN eF Mi StNDBnKS"
+#define CONFIG_EN_SPEECH_COMMAND_ID5 "hicST VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID6 "LbcST VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID7 "gNKRmS jc VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID8 "DgKRmS jc VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID9 "TkN nN jc TmVm"
+#define CONFIG_EN_SPEECH_COMMAND_ID10 "TkN eF jc TmVm"
+#define CONFIG_EN_SPEECH_COMMAND_ID11 "MdK Mm c Tm"
+#define CONFIG_EN_SPEECH_COMMAND_ID12 "MdK Mm c KnFm"
+#define CONFIG_EN_SPEECH_COMMAND_ID13 "TkN nN jc LiT"
+#define CONFIG_EN_SPEECH_COMMAND_ID14 "TkN eF jc LiT"
+#define CONFIG_EN_SPEECH_COMMAND_ID15 "pdNq jc KcLk To RfD"
+#define CONFIG_EN_SPEECH_COMMAND_ID16 "pdNq jc KcLk To GRmN"
+#define CONFIG_EN_SPEECH_COMMAND_ID17 "TkN nN eL jc LiTS"
+#define CONFIG_EN_SPEECH_COMMAND_ID18 "TkN eF eL jc LiTS"
+#define CONFIG_EN_SPEECH_COMMAND_ID19 "TkN nN jc fR KcNDgscNk"
+#define CONFIG_EN_SPEECH_COMMAND_ID20 "TkN eF jc fR KcNDgscNk"
+#define CONFIG_EN_SPEECH_COMMAND_ID21 "SfT jc TfMPRcpk To SgKSTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID22 "SfT jc TfMPRcpk To SfVcNTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID23 "SfT jc TfMPRcpk To dTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID24 "SfT jc TfMPRcpk To NiNTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID25 "SfT jc TfMPRcpk To TWfNTm DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID26 "SfT jc TfMPRcpk To TWfNTm WcN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID27 "SfT jc TfMPRcpk To TWfNTm To DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID28 "SfT jc TfMPRcpk To TWfNTm vRm DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID29 "SfT jc TfMPRcpk To TWfNTm FeR DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID30 "SfT jc TfMPRcpk To TWfNTm FiV DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID31 "SfT jc TfMPRcpk To TWfNTm SgKS DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID32 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID33 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID34 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID35 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID36 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID37 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID38 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID39 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID40 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID41 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID42 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID43 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID44 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID45 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID46 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID47 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID48 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID49 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID50 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID51 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID52 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID53 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID54 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID55 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID56 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID57 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID58 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID59 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID60 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID61 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID62 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID63 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID64 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID65 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID66 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID67 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID68 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID69 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID70 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID71 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID72 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID73 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID74 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID75 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID76 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID77 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID78 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID79 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID80 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID81 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID82 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID83 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID84 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID85 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID86 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID87 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID88 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID89 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID90 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID91 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID92 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID93 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID94 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID95 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID96 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID97 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID98 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID99 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID100 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID101 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID102 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID103 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID104 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID105 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID106 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID107 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID108 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID109 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID110 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID111 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID112 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID113 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID114 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID115 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID116 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID117 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID118 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID119 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID120 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID121 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID122 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID123 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID124 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID125 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID126 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID127 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID128 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID129 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID130 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID131 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID132 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID133 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID134 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID135 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID136 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID137 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID138 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID139 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID140 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID141 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID142 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID143 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID144 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID145 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID146 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID147 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID148 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID149 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID150 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID151 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID152 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID153 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID154 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID155 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID156 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID157 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID158 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID159 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID160 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID161 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID162 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID163 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID164 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID165 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID166 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID167 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID168 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID169 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID170 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID171 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID172 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID173 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID174 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID175 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID176 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID177 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID178 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID179 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID180 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID181 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID182 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID183 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID184 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID185 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID186 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID187 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID188 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID189 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID190 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID191 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID192 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID193 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID194 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID195 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID196 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID197 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID198 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID199 ""
+#define CONFIG_COMPILER_OPTIMIZATION_SIZE 1
+#define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
+#define CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL 2
+#define CONFIG_COMPILER_HIDE_PATHS_MACROS 1
+#define CONFIG_COMPILER_CXX_EXCEPTIONS 1
+#define CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE 0
+#define CONFIG_COMPILER_STACK_CHECK_MODE_NORM 1
+#define CONFIG_COMPILER_STACK_CHECK 1
+#define CONFIG_COMPILER_WARN_WRITE_STRINGS 1
+#define CONFIG_APPTRACE_DEST_NONE 1
+#define CONFIG_APPTRACE_LOCK_ENABLE 1
+#define CONFIG_BT_ENABLED 1
+#define CONFIG_BT_SOC_SUPPORT_5_0 1
+#define CONFIG_BT_CTRL_MODE_EFF 1
+#define CONFIG_BT_CTRL_BLE_MAX_ACT 10
+#define CONFIG_BT_CTRL_BLE_MAX_ACT_EFF 10
+#define CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB 0
+#define CONFIG_BT_CTRL_PINNED_TO_CORE_0 1
+#define CONFIG_BT_CTRL_PINNED_TO_CORE 0
+#define CONFIG_BT_CTRL_HCI_MODE_VHCI 1
+#define CONFIG_BT_CTRL_HCI_TL 1
+#define CONFIG_BT_CTRL_ADV_DUP_FILT_MAX 30
+#define CONFIG_BT_CTRL_HW_CCA_VAL 20
+#define CONFIG_BT_CTRL_HW_CCA_EFF 0
+#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG 1
+#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF 0
+#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0 1
+#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF 0
+#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0 1
+#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF 0
+#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P3 1
+#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF 10
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM 100
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD 20
+#define CONFIG_BT_CTRL_BLE_SCAN_DUPL 1
+#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DEVICE 1
+#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE 0
+#define CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE 100
+#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS 1
+#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF 0
+#define CONFIG_BT_CTRL_SLEEP_MODE_EFF 0
+#define CONFIG_BT_CTRL_SLEEP_CLOCK_EFF 0
+#define CONFIG_BT_CTRL_HCI_TL_EFF 1
+#define CONFIG_BT_BLUEDROID_ENABLED 1
+#define CONFIG_BT_BTC_TASK_STACK_SIZE 3072
+#define CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0 1
+#define CONFIG_BT_BLUEDROID_PINNED_TO_CORE 0
+#define CONFIG_BT_BTU_TASK_STACK_SIZE 4096
+#define CONFIG_BT_BLE_ENABLED 1
+#define CONFIG_BT_GATTS_ENABLE 1
+#define CONFIG_BT_GATT_MAX_SR_PROFILES 8
+#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO 1
+#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE 0
+#define CONFIG_BT_GATTC_ENABLE 1
+#define CONFIG_BT_GATTC_CONNECT_RETRY_COUNT 3
+#define CONFIG_BT_BLE_SMP_ENABLE 1
+#define CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_HCI_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTM_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_SDP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_GAP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_PAN_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_A2D_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_MCA_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_HID_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_APPL_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_GATT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_SMP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTC_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_OSI_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL 2
+#define CONFIG_BT_ACL_CONNECTIONS 4
+#define CONFIG_BT_MULTI_CONNECTION_ENBALE 1
+#define CONFIG_BT_SMP_ENABLE 1
+#define CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT 30
+#define CONFIG_BT_BLE_RPA_SUPPORTED 1
+#define CONFIG_BT_BLE_50_FEATURES_SUPPORTED 1
+#define CONFIG_BT_BLE_42_FEATURES_SUPPORTED 1
+#define CONFIG_BLE_MESH 1
+#define CONFIG_BLE_MESH_HCI_5_0 1
+#define CONFIG_BLE_MESH_USE_DUPLICATE_SCAN 1
+#define CONFIG_BLE_MESH_MEM_ALLOC_MODE_INTERNAL 1
+#define CONFIG_BLE_MESH_DEINIT 1
+#define CONFIG_BLE_MESH_PROV 1
+#define CONFIG_BLE_MESH_PB_ADV 1
+#define CONFIG_BLE_MESH_PROXY 1
+#define CONFIG_BLE_MESH_NET_BUF_POOL_USAGE 1
+#define CONFIG_BLE_MESH_SUBNET_COUNT 3
+#define CONFIG_BLE_MESH_APP_KEY_COUNT 3
+#define CONFIG_BLE_MESH_MODEL_KEY_COUNT 3
+#define CONFIG_BLE_MESH_MODEL_GROUP_COUNT 3
+#define CONFIG_BLE_MESH_LABEL_COUNT 3
+#define CONFIG_BLE_MESH_CRPL 10
+#define CONFIG_BLE_MESH_MSG_CACHE_SIZE 10
+#define CONFIG_BLE_MESH_ADV_BUF_COUNT 60
+#define CONFIG_BLE_MESH_IVU_DIVIDER 4
+#define CONFIG_BLE_MESH_TX_SEG_MSG_COUNT 1
+#define CONFIG_BLE_MESH_RX_SEG_MSG_COUNT 1
+#define CONFIG_BLE_MESH_RX_SDU_MAX 384
+#define CONFIG_BLE_MESH_TX_SEG_MAX 32
+#define CONFIG_BLE_MESH_TRACE_LEVEL_WARNING 1
+#define CONFIG_BLE_MESH_STACK_TRACE_LEVEL 2
+#define CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL_WARNING 1
+#define CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL 2
+#define CONFIG_BLE_MESH_CLIENT_MSG_TIMEOUT 4000
+#define CONFIG_BLE_MESH_HEALTH_SRV 1
+#define CONFIG_BLE_MESH_GENERIC_SERVER 1
+#define CONFIG_BLE_MESH_SENSOR_SERVER 1
+#define CONFIG_BLE_MESH_TIME_SCENE_SERVER 1
+#define CONFIG_BLE_MESH_LIGHTING_SERVER 1
+#define CONFIG_COAP_MBEDTLS_PSK 1
+#define CONFIG_COAP_LOG_DEFAULT_LEVEL 0
+#define CONFIG_ADC_DISABLE_DAC 1
+#define CONFIG_EFUSE_MAX_BLK_LEN 256
+#define CONFIG_ESP_TLS_USING_MBEDTLS 1
+#define CONFIG_ESP_TLS_USE_DS_PERIPHERAL 1
+#define CONFIG_ESP_TLS_SERVER 1
+#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240 1
+#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 240
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB 1
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE 0x4000
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS 1
+#define CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS 8
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B 1
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE 32
+#define CONFIG_ESP32S3_DATA_CACHE_32KB 1
+#define CONFIG_ESP32S3_DATA_CACHE_SIZE 0x8000
+#define CONFIG_ESP32S3_DATA_CACHE_8WAYS 1
+#define CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS 8
+#define CONFIG_ESP32S3_DATA_CACHE_LINE_32B 1
+#define CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE 32
+#define CONFIG_ESP32S3_SPIRAM_SUPPORT 1
+#define CONFIG_SPIRAM_MODE_OCT 1
+#define CONFIG_SPIRAM_TYPE_AUTO 1
+#define CONFIG_SPIRAM_SIZE -1
+#define CONFIG_DEFAULT_PSRAM_CLK_IO 30
+#define CONFIG_DEFAULT_PSRAM_CS_IO 26
+#define CONFIG_SPIRAM_SPEED_80M 1
+#define CONFIG_SPIRAM 1
+#define CONFIG_SPIRAM_BOOT_INIT 1
+#define CONFIG_SPIRAM_IGNORE_NOTFOUND 1
+#define CONFIG_SPIRAM_USE_MALLOC 1
+#define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 4096
+#define CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP 1
+#define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 0
+#define CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM 0x0
+#define CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM 0
+#define CONFIG_ESP32S3_DEBUG_OCDAWARE 1
+#define CONFIG_ESP32S3_BROWNOUT_DET 1
+#define CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7 1
+#define CONFIG_ESP32S3_BROWNOUT_DET_LVL 7
+#define CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1 1
+#define CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC 1
+#define CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES 576
+#define CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY 2000
+#define CONFIG_ESP_ERR_TO_NAME_LOOKUP 1
+#define CONFIG_ETH_ENABLED 1
+#define CONFIG_ETH_USE_SPI_ETHERNET 1
+#define CONFIG_ETH_SPI_ETHERNET_DM9051 1
+#define CONFIG_ETH_SPI_ETHERNET_W5500 1
+#define CONFIG_ESP_EVENT_POST_FROM_ISR 1
+#define CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH 1
+#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 1024
+#define CONFIG_HTTPD_MAX_URI_LEN 512
+#define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
+#define CONFIG_HTTPD_PURGE_BUF_LEN 32
+#define CONFIG_HTTPD_WS_SUPPORT 1
+#define CONFIG_ESP_HTTPS_SERVER_ENABLE 1
+#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA 1
+#define CONFIG_ESP_MAC_ADDR_UNIVERSE_BT 1
+#define CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO 1
+#define CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES 2
+#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1
+#define CONFIG_RTC_CLOCK_BBPLL_POWER_ON_WITH_USB 1
+#define CONFIG_ESP_IPC_TASK_STACK_SIZE 1024
+#define CONFIG_ESP_IPC_USES_CALLERS_PRIORITY 1
+#define CONFIG_ESP_IPC_ISR_ENABLE 1
+#define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE 32
+#define CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL 120
+#define CONFIG_ESP_NETIF_TCPIP_LWIP 1
+#define CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER 1
+#define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
+#define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
+#define CONFIG_ESP_PHY_MAX_TX_POWER 20
+#define CONFIG_ESP_PHY_ENABLE_USB 1
+#define CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP 1
+#define CONFIG_PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP 1
+#define CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT 1
+#define CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK 1
+#define CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP 1
+#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
+#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2048
+#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 4096
+#define CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 1
+#define CONFIG_ESP_MAIN_TASK_AFFINITY 0x0
+#define CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE 2048
+#define CONFIG_ESP_CONSOLE_UART_DEFAULT 1
+#define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1
+#define CONFIG_ESP_CONSOLE_UART 1
+#define CONFIG_ESP_CONSOLE_MULTIPLE_UART 1
+#define CONFIG_ESP_CONSOLE_UART_NUM 0
+#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
+#define CONFIG_ESP_INT_WDT 1
+#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 1000
+#define CONFIG_ESP_INT_WDT_CHECK_CPU1 1
+#define CONFIG_ESP_TASK_WDT 1
+#define CONFIG_ESP_TASK_WDT_PANIC 1
+#define CONFIG_ESP_TASK_WDT_TIMEOUT_S 5
+#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 1
+#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
+#define CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER 1
+#define CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER 1
+#define CONFIG_ESP_TIMER_TASK_STACK_SIZE 4096
+#define CONFIG_ESP_TIMER_INTERRUPT_LEVEL 1
+#define CONFIG_ESP_TIMER_IMPL_SYSTIMER 1
+#define CONFIG_ESP32_WIFI_ENABLED 1
+#define CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE 1
+#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 8
+#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 32
+#define CONFIG_ESP32_WIFI_STATIC_TX_BUFFER 1
+#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 0
+#define CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM 8
+#define CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM 16
+#define CONFIG_ESP32_WIFI_CSI_ENABLED 1
+#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED 1
+#define CONFIG_ESP32_WIFI_TX_BA_WIN 6
+#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED 1
+#define CONFIG_ESP32_WIFI_RX_BA_WIN 16
+#define CONFIG_ESP32_WIFI_NVS_ENABLED 1
+#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 1
+#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN 752
+#define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM 32
+#define CONFIG_ESP_WIFI_FTM_ENABLE 1
+#define CONFIG_ESP_WIFI_FTM_INITIATOR_SUPPORT 1
+#define CONFIG_ESP_WIFI_FTM_RESPONDER_SUPPORT 1
+#define CONFIG_ESP_WIFI_SOFTAP_SUPPORT 1
+#define CONFIG_ESP_COREDUMP_ENABLE_TO_NONE 1
+#define CONFIG_FATFS_CODEPAGE_850 1
+#define CONFIG_FATFS_CODEPAGE 850
+#define CONFIG_FATFS_LFN_STACK 1
+#define CONFIG_FATFS_MAX_LFN 255
+#define CONFIG_FATFS_API_ENCODING_ANSI_OEM 1
+#define CONFIG_FATFS_FS_LOCK 0
+#define CONFIG_FATFS_TIMEOUT_MS 10000
+#define CONFIG_FATFS_PER_FILE_CACHE 1
+#define CONFIG_FATFS_ALLOC_PREFER_EXTRAM 1
+#define CONFIG_FMB_COMM_MODE_TCP_EN 1
+#define CONFIG_FMB_TCP_PORT_DEFAULT 502
+#define CONFIG_FMB_TCP_PORT_MAX_CONN 5
+#define CONFIG_FMB_TCP_CONNECTION_TOUT_SEC 20
+#define CONFIG_FMB_COMM_MODE_RTU_EN 1
+#define CONFIG_FMB_COMM_MODE_ASCII_EN 1
+#define CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND 150
+#define CONFIG_FMB_MASTER_DELAY_MS_CONVERT 200
+#define CONFIG_FMB_QUEUE_LENGTH 20
+#define CONFIG_FMB_PORT_TASK_STACK_SIZE 4096
+#define CONFIG_FMB_SERIAL_BUF_SIZE 256
+#define CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB 8
+#define CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS 1000
+#define CONFIG_FMB_PORT_TASK_PRIO 10
+#define CONFIG_FMB_PORT_TASK_AFFINITY_CPU0 1
+#define CONFIG_FMB_PORT_TASK_AFFINITY 0x0
+#define CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT 20
+#define CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE 20
+#define CONFIG_FMB_CONTROLLER_STACK_SIZE 4096
+#define CONFIG_FMB_EVENT_QUEUE_TIMEOUT 20
+#define CONFIG_FMB_TIMER_PORT_ENABLED 1
+#define CONFIG_FMB_TIMER_GROUP 0
+#define CONFIG_FMB_TIMER_INDEX 0
+#define CONFIG_FMB_MASTER_TIMER_GROUP 0
+#define CONFIG_FMB_MASTER_TIMER_INDEX 0
+#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
+#define CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER 1
+#define CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1 1
+#define CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER 1
+#define CONFIG_FREERTOS_HZ 1000
+#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
+#define CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK 1
+#define CONFIG_FREERTOS_INTERRUPT_BACKTRACE 1
+#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
+#define CONFIG_FREERTOS_ASSERT_FAIL_ABORT 1
+#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1024
+#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
+#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
+#define CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION 1
+#define CONFIG_FREERTOS_TIMER_TASK_PRIORITY 1
+#define CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH 2048
+#define CONFIG_FREERTOS_TIMER_QUEUE_LENGTH 10
+#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
+#define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
+#define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
+#define CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT 1
+#define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
+#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
+#define CONFIG_HEAP_POISONING_LIGHT 1
+#define CONFIG_HEAP_TRACING_OFF 1
+#define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
+#define CONFIG_LOG_DEFAULT_LEVEL 1
+#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
+#define CONFIG_LOG_MAXIMUM_LEVEL 1
+#define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
+#define CONFIG_LWIP_LOCAL_HOSTNAME "espressif"
+#define CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES 1
+#define CONFIG_LWIP_TIMERS_ONDEMAND 1
+#define CONFIG_LWIP_MAX_SOCKETS 16
+#define CONFIG_LWIP_SO_REUSE 1
+#define CONFIG_LWIP_SO_REUSE_RXTOALL 1
+#define CONFIG_LWIP_SO_RCVBUF 1
+#define CONFIG_LWIP_IP4_FRAG 1
+#define CONFIG_LWIP_IP6_FRAG 1
+#define CONFIG_LWIP_ETHARP_TRUST_IP_MAC 1
+#define CONFIG_LWIP_ESP_GRATUITOUS_ARP 1
+#define CONFIG_LWIP_GARP_TMR_INTERVAL 60
+#define CONFIG_LWIP_TCPIP_RECVMBOX_SIZE 32
+#define CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID 1
+#define CONFIG_LWIP_DHCP_RESTORE_LAST_IP 1
+#define CONFIG_LWIP_DHCP_OPTIONS_LEN 128
+#define CONFIG_LWIP_DHCPS 1
+#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
+#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
+#define CONFIG_LWIP_IPV6 1
+#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
+#define CONFIG_LWIP_NETIF_LOOPBACK 1
+#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
+#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
+#define CONFIG_LWIP_MAX_LISTENING_TCP 16
+#define CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION 1
+#define CONFIG_LWIP_TCP_MAXRTX 12
+#define CONFIG_LWIP_TCP_SYNMAXRTX 6
+#define CONFIG_LWIP_TCP_MSS 1436
+#define CONFIG_LWIP_TCP_TMR_INTERVAL 250
+#define CONFIG_LWIP_TCP_MSL 60000
+#define CONFIG_LWIP_TCP_SND_BUF_DEFAULT 5744
+#define CONFIG_LWIP_TCP_WND_DEFAULT 5744
+#define CONFIG_LWIP_TCP_RECVMBOX_SIZE 6
+#define CONFIG_LWIP_TCP_QUEUE_OOSEQ 1
+#define CONFIG_LWIP_TCP_OVERSIZE_MSS 1
+#define CONFIG_LWIP_TCP_RTO_TIME 3000
+#define CONFIG_LWIP_MAX_UDP_PCBS 16
+#define CONFIG_LWIP_UDP_RECVMBOX_SIZE 6
+#define CONFIG_LWIP_CHECKSUM_CHECK_ICMP 1
+#define CONFIG_LWIP_TCPIP_TASK_STACK_SIZE 2560
+#define CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 1
+#define CONFIG_LWIP_TCPIP_TASK_AFFINITY 0x0
+#define CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE 3
+#define CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS 5
+#define CONFIG_LWIP_ICMP 1
+#define CONFIG_LWIP_MAX_RAW_PCBS 16
+#define CONFIG_LWIP_SNTP_MAX_SERVERS 3
+#define CONFIG_LWIP_DHCP_GET_NTP_SRV 1
+#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
+#define CONFIG_LWIP_SNTP_UPDATE_DELAY 3600000
+#define CONFIG_LWIP_ESP_LWIP_ASSERT 1
+#define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
+#define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
+#define CONFIG_LWIP_HOOK_ND6_GET_GW_NONE 1
+#define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
+#define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
+#define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
+#define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
+#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
+#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
+#define CONFIG_MBEDTLS_HARDWARE_AES 1
+#define CONFIG_MBEDTLS_AES_USE_INTERRUPT 1
+#define CONFIG_MBEDTLS_HARDWARE_MPI 1
+#define CONFIG_MBEDTLS_HARDWARE_SHA 1
+#define CONFIG_MBEDTLS_ROM_MD5 1
+#define CONFIG_MBEDTLS_HAVE_TIME 1
+#define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
+#define CONFIG_MBEDTLS_SHA512_C 1
+#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
+#define CONFIG_MBEDTLS_TLS_SERVER 1
+#define CONFIG_MBEDTLS_TLS_CLIENT 1
+#define CONFIG_MBEDTLS_TLS_ENABLED 1
+#define CONFIG_MBEDTLS_PSK_MODES 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1
+#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
+#define CONFIG_MBEDTLS_SSL_PROTO_DTLS 1
+#define CONFIG_MBEDTLS_SSL_ALPN 1
+#define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
+#define CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE 1
+#define CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE 1
+#define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
+#define CONFIG_MBEDTLS_AES_C 1
+#define CONFIG_MBEDTLS_RC4_DISABLED 1
+#define CONFIG_MBEDTLS_CCM_C 1
+#define CONFIG_MBEDTLS_GCM_C 1
+#define CONFIG_MBEDTLS_PEM_PARSE_C 1
+#define CONFIG_MBEDTLS_PEM_WRITE_C 1
+#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1
+#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
+#define CONFIG_MBEDTLS_ECP_C 1
+#define CONFIG_MBEDTLS_ECDH_C 1
+#define CONFIG_MBEDTLS_ECDSA_C 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
+#define CONFIG_MDNS_MAX_SERVICES 10
+#define CONFIG_MDNS_TASK_PRIORITY 1
+#define CONFIG_MDNS_TASK_STACK_SIZE 4096
+#define CONFIG_MDNS_TASK_AFFINITY_CPU0 1
+#define CONFIG_MDNS_TASK_AFFINITY 0x0
+#define CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS 2000
+#define CONFIG_MDNS_TIMER_PERIOD_MS 100
+#define CONFIG_MDNS_MULTIPLE_INSTANCE 1
+#define CONFIG_MQTT_PROTOCOL_311 1
+#define CONFIG_MQTT_TRANSPORT_SSL 1
+#define CONFIG_MQTT_TRANSPORT_WEBSOCKET 1
+#define CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE 1
+#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
+#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
+#define CONFIG_OPENSSL_ERROR_STACK 1
+#define CONFIG_OPENSSL_ASSERT_DO_NOTHING 1
+#define CONFIG_PTHREAD_TASK_PRIO_DEFAULT 5
+#define CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT 2048
+#define CONFIG_PTHREAD_STACK_MIN 768
+#define CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY 1
+#define CONFIG_PTHREAD_TASK_CORE_DEFAULT -1
+#define CONFIG_PTHREAD_TASK_NAME_DEFAULT "pthread"
+#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
+#define CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS 1
+#define CONFIG_SPI_FLASH_YIELD_DURING_ERASE 1
+#define CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS 10
+#define CONFIG_SPI_FLASH_ERASE_YIELD_TICKS 2
+#define CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE 4096
+#define CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_GD_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_TH_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP 1
+#define CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE 1
+#define CONFIG_SPIFFS_MAX_PARTITIONS 3
+#define CONFIG_SPIFFS_CACHE 1
+#define CONFIG_SPIFFS_CACHE_WR 1
+#define CONFIG_SPIFFS_PAGE_CHECK 1
+#define CONFIG_SPIFFS_GC_MAX_RUNS 10
+#define CONFIG_SPIFFS_PAGE_SIZE 256
+#define CONFIG_SPIFFS_OBJ_NAME_LEN 32
+#define CONFIG_SPIFFS_USE_MAGIC 1
+#define CONFIG_SPIFFS_USE_MAGIC_LENGTH 1
+#define CONFIG_SPIFFS_META_LENGTH 4
+#define CONFIG_SPIFFS_USE_MTIME 1
+#define CONFIG_WS_TRANSPORT 1
+#define CONFIG_WS_BUFFER_SIZE 1024
+#define CONFIG_UNITY_ENABLE_FLOAT 1
+#define CONFIG_UNITY_ENABLE_DOUBLE 1
+#define CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER 1
+#define CONFIG_USB_OTG_SUPPORTED 1
+#define CONFIG_USB_HOST_CONTROL_TRANSFER_MAX_SIZE 256
+#define CONFIG_USB_HOST_HW_BUFFER_BIAS_BALANCED 1
+#define CONFIG_VFS_SUPPORT_IO 1
+#define CONFIG_VFS_SUPPORT_DIR 1
+#define CONFIG_VFS_SUPPORT_SELECT 1
+#define CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT 1
+#define CONFIG_VFS_SUPPORT_TERMIOS 1
+#define CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS 1
+#define CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN 128
+#define CONFIG_WL_SECTOR_SIZE_4096 1
+#define CONFIG_WL_SECTOR_SIZE 4096
+#define CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES 16
+#define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
+#define CONFIG_WPA_MBEDTLS_CRYPTO 1
+#define CONFIG_IO_GLITCH_FILTER_TIME_MS 50
+#define CONFIG_ESP_RMAKER_LIB_ESP_MQTT 1
+#define CONFIG_ESP_RMAKER_MQTT_GLUE_LIB 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT_443 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT 1
+#define CONFIG_ESP_RMAKER_MQTT_SEND_USERNAME 1
+#define CONFIG_ESP_RMAKER_MQTT_USERNAME "?Platform=APN/1 ESPIF,RAINMAKER,v1.0"
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK 4096
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_PRIORITY 5
+#define CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME "fctry"
+#define CONFIG_ESP_RMAKER_FACTORY_NAMESPACE "rmaker_creds"
+#define CONFIG_ESP_RMAKER_DEF_TIMEZONE "Asia/Shanghai"
+#define CONFIG_ESP_RMAKER_SNTP_SERVER_NAME "pool.ntp.org"
+#define CONFIG_DSP_OPTIMIZATIONS_SUPPORTED 1
+#define CONFIG_DSP_OPTIMIZED 1
+#define CONFIG_DSP_OPTIMIZATION 1
+#define CONFIG_DSP_MAX_FFT_SIZE_4096 1
+#define CONFIG_DSP_MAX_FFT_SIZE 4096
+#define CONFIG_OV7670_SUPPORT 1
+#define CONFIG_OV7725_SUPPORT 1
+#define CONFIG_NT99141_SUPPORT 1
+#define CONFIG_OV2640_SUPPORT 1
+#define CONFIG_OV3660_SUPPORT 1
+#define CONFIG_OV5640_SUPPORT 1
+#define CONFIG_GC2145_SUPPORT 1
+#define CONFIG_GC032A_SUPPORT 1
+#define CONFIG_GC0308_SUPPORT 1
+#define CONFIG_BF3005_SUPPORT 1
+#define CONFIG_BF20A6_SUPPORT 1
+#define CONFIG_SCCB_HARDWARE_I2C_PORT1 1
+#define CONFIG_SCCB_CLK_FREQ 100000
+#define CONFIG_GC_SENSOR_SUBSAMPLE_MODE 1
+#define CONFIG_CAMERA_CORE0 1
+#define CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX 32768
+#define CONFIG_LITTLEFS_MAX_PARTITIONS 3
+#define CONFIG_LITTLEFS_PAGE_SIZE 256
+#define CONFIG_LITTLEFS_OBJ_NAME_LEN 64
+#define CONFIG_LITTLEFS_READ_SIZE 128
+#define CONFIG_LITTLEFS_WRITE_SIZE 128
+#define CONFIG_LITTLEFS_LOOKAHEAD_SIZE 128
+#define CONFIG_LITTLEFS_CACHE_SIZE 512
+#define CONFIG_LITTLEFS_BLOCK_CYCLES 512
+#define CONFIG_LITTLEFS_USE_MTIME 1
+#define CONFIG_LITTLEFS_MTIME_USE_SECONDS 1
+
+/* List of deprecated options */
+#define CONFIG_A2D_TRACE_LEVEL_WARNING CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING
+#define CONFIG_ADC2_DISABLE_DAC CONFIG_ADC_DISABLE_DAC
+#define CONFIG_APPL_TRACE_LEVEL_WARNING CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING
+#define CONFIG_AVCT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING
+#define CONFIG_AVDT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING
+#define CONFIG_AVRC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING
+#define CONFIG_BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT
+#define CONFIG_BLE_SMP_ENABLE CONFIG_BT_BLE_SMP_ENABLE
+#define CONFIG_BLUEDROID_ENABLED CONFIG_BT_BLUEDROID_ENABLED
+#define CONFIG_BLUEDROID_PINNED_TO_CORE_0 CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0
+#define CONFIG_BLUFI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING
+#define CONFIG_BTC_TASK_STACK_SIZE CONFIG_BT_BTC_TASK_STACK_SIZE
+#define CONFIG_BTC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING
+#define CONFIG_BTIF_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING
+#define CONFIG_BTM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING
+#define CONFIG_BTU_TASK_STACK_SIZE CONFIG_BT_BTU_TASK_STACK_SIZE
+#define CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
+#define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
+#define CONFIG_CXX_EXCEPTIONS CONFIG_COMPILER_CXX_EXCEPTIONS
+#define CONFIG_CXX_EXCEPTIONS_EMG_POOL_SIZE CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE
+#define CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+#define CONFIG_ESP32S2_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
+#define CONFIG_ESP32_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+#define CONFIG_ESP32_APPTRACE_DEST_NONE CONFIG_APPTRACE_DEST_NONE
+#define CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY
+#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE CONFIG_ESP_COREDUMP_ENABLE_TO_NONE
+#define CONFIG_ESP32_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
+#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE
+#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER CONFIG_ESP_PHY_MAX_WIFI_TX_POWER
+#define CONFIG_ESP32_PTHREAD_STACK_MIN CONFIG_PTHREAD_STACK_MIN
+#define CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT CONFIG_PTHREAD_TASK_NAME_DEFAULT
+#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT CONFIG_PTHREAD_TASK_PRIO_DEFAULT
+#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT
+#define CONFIG_ESP_GRATUITOUS_ARP CONFIG_LWIP_ESP_GRATUITOUS_ARP
+#define CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
+#define CONFIG_GAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING
+#define CONFIG_GARP_TMR_INTERVAL CONFIG_LWIP_GARP_TMR_INTERVAL
+#define CONFIG_GATTC_ENABLE CONFIG_BT_GATTC_ENABLE
+#define CONFIG_GATTS_ENABLE CONFIG_BT_GATTS_ENABLE
+#define CONFIG_GATTS_SEND_SERVICE_CHANGE_AUTO CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO
+#define CONFIG_GATT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING
+#define CONFIG_HCI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING
+#define CONFIG_HID_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING
+#define CONFIG_INT_WDT CONFIG_ESP_INT_WDT
+#define CONFIG_INT_WDT_CHECK_CPU1 CONFIG_ESP_INT_WDT_CHECK_CPU1
+#define CONFIG_INT_WDT_TIMEOUT_MS CONFIG_ESP_INT_WDT_TIMEOUT_MS
+#define CONFIG_IPC_TASK_STACK_SIZE CONFIG_ESP_IPC_TASK_STACK_SIZE
+#define CONFIG_L2CAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING
+#define CONFIG_LOG_BOOTLOADER_LEVEL_NONE CONFIG_BOOTLOADER_LOG_LEVEL_NONE
+#define CONFIG_MAIN_TASK_STACK_SIZE CONFIG_ESP_MAIN_TASK_STACK_SIZE
+#define CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE
+#define CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT
+#define CONFIG_MB_CONTROLLER_STACK_SIZE CONFIG_FMB_CONTROLLER_STACK_SIZE
+#define CONFIG_MB_EVENT_QUEUE_TIMEOUT CONFIG_FMB_EVENT_QUEUE_TIMEOUT
+#define CONFIG_MB_MASTER_DELAY_MS_CONVERT CONFIG_FMB_MASTER_DELAY_MS_CONVERT
+#define CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND
+#define CONFIG_MB_QUEUE_LENGTH CONFIG_FMB_QUEUE_LENGTH
+#define CONFIG_MB_SERIAL_BUF_SIZE CONFIG_FMB_SERIAL_BUF_SIZE
+#define CONFIG_MB_SERIAL_TASK_PRIO CONFIG_FMB_PORT_TASK_PRIO
+#define CONFIG_MB_SERIAL_TASK_STACK_SIZE CONFIG_FMB_PORT_TASK_STACK_SIZE
+#define CONFIG_MB_TIMER_GROUP CONFIG_FMB_TIMER_GROUP
+#define CONFIG_MB_TIMER_INDEX CONFIG_FMB_TIMER_INDEX
+#define CONFIG_MB_TIMER_PORT_ENABLED CONFIG_FMB_TIMER_PORT_ENABLED
+#define CONFIG_MCA_TRACE_LEVEL_WARNING CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING
+#define CONFIG_MONITOR_BAUD_115200B CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B
+#define CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE
+#define CONFIG_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
+#define CONFIG_OSI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING
+#define CONFIG_PAN_TRACE_LEVEL_WARNING CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING
+#define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
+#define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
+#define CONFIG_RFCOMM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING
+#define CONFIG_SDP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING
+#define CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN
+#define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
+#define CONFIG_SMP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING
+#define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS
+#define CONFIG_STACK_CHECK_NORM CONFIG_COMPILER_STACK_CHECK_MODE_NORM
+#define CONFIG_SUPPORT_TERMIOS CONFIG_VFS_SUPPORT_TERMIOS
+#define CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT
+#define CONFIG_SW_COEXIST_ENABLE CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE
+#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE
+#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE
+#define CONFIG_TASK_WDT CONFIG_ESP_TASK_WDT
+#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
+#define CONFIG_TASK_WDT_PANIC CONFIG_ESP_TASK_WDT_PANIC
+#define CONFIG_TASK_WDT_TIMEOUT_S CONFIG_ESP_TASK_WDT_TIMEOUT_S
+#define CONFIG_TCPIP_RECVMBOX_SIZE CONFIG_LWIP_TCPIP_RECVMBOX_SIZE
+#define CONFIG_TCPIP_TASK_AFFINITY_CPU0 CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0
+#define CONFIG_TCPIP_TASK_STACK_SIZE CONFIG_LWIP_TCPIP_TASK_STACK_SIZE
+#define CONFIG_TCP_MAXRTX CONFIG_LWIP_TCP_MAXRTX
+#define CONFIG_TCP_MSL CONFIG_LWIP_TCP_MSL
+#define CONFIG_TCP_MSS CONFIG_LWIP_TCP_MSS
+#define CONFIG_TCP_OVERSIZE_MSS CONFIG_LWIP_TCP_OVERSIZE_MSS
+#define CONFIG_TCP_QUEUE_OOSEQ CONFIG_LWIP_TCP_QUEUE_OOSEQ
+#define CONFIG_TCP_RECVMBOX_SIZE CONFIG_LWIP_TCP_RECVMBOX_SIZE
+#define CONFIG_TCP_SND_BUF_DEFAULT CONFIG_LWIP_TCP_SND_BUF_DEFAULT
+#define CONFIG_TCP_SYNMAXRTX CONFIG_LWIP_TCP_SYNMAXRTX
+#define CONFIG_TCP_WND_DEFAULT CONFIG_LWIP_TCP_WND_DEFAULT
+#define CONFIG_TIMER_QUEUE_LENGTH CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
+#define CONFIG_TIMER_TASK_PRIORITY CONFIG_FREERTOS_TIMER_TASK_PRIORITY
+#define CONFIG_TIMER_TASK_STACK_DEPTH CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
+#define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
+#define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
+#define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
+#define CONFIG_USB_CDC_ENABLED CONFIG_TINYUSB_CDC_ENABLED
+#define CONFIG_USB_CDC_RX_BUFSIZE CONFIG_TINYUSB_CDC_RX_BUFSIZE
+#define CONFIG_USB_CDC_TX_BUFSIZE CONFIG_TINYUSB_CDC_TX_BUFSIZE
+#define CONFIG_USB_DEBUG_LEVEL CONFIG_TINYUSB_DEBUG_LEVEL
+#define CONFIG_USB_DESC_CDC_STRING CONFIG_TINYUSB_DESC_CDC_STRING
+#define CONFIG_USB_DESC_HID_STRING CONFIG_TINYUSB_DESC_HID_STRING
+#define CONFIG_USB_DESC_MSC_STRING CONFIG_TINYUSB_DESC_MSC_STRING
+#define CONFIG_USB_MSC_BUFSIZE CONFIG_TINYUSB_MSC_BUFSIZE
+#define CONFIG_USB_MSC_ENABLED CONFIG_TINYUSB_MSC_ENABLED
+#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
+#define CONFIG_ARDUINO_IDF_COMMIT "b8050b365e"
+#define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32s3/opi_opi/libbootloader_support.a b/tools/sdk/esp32s3/opi_opi/libbootloader_support.a
new file mode 100644
index 00000000000..e2a7ad4b953
Binary files /dev/null and b/tools/sdk/esp32s3/opi_opi/libbootloader_support.a differ
diff --git a/tools/sdk/esp32s3/opi_opi/libesp_hw_support.a b/tools/sdk/esp32s3/opi_opi/libesp_hw_support.a
new file mode 100644
index 00000000000..8c0266c0a50
Binary files /dev/null and b/tools/sdk/esp32s3/opi_opi/libesp_hw_support.a differ
diff --git a/tools/sdk/esp32s3/opi_opi/libesp_system.a b/tools/sdk/esp32s3/opi_opi/libesp_system.a
new file mode 100644
index 00000000000..fc20120ffbd
Binary files /dev/null and b/tools/sdk/esp32s3/opi_opi/libesp_system.a differ
diff --git a/tools/sdk/esp32s3/opi_opi/libfreertos.a b/tools/sdk/esp32s3/opi_opi/libfreertos.a
new file mode 100644
index 00000000000..753f15178b3
Binary files /dev/null and b/tools/sdk/esp32s3/opi_opi/libfreertos.a differ
diff --git a/tools/sdk/esp32s3/opi_opi/libspi_flash.a b/tools/sdk/esp32s3/opi_opi/libspi_flash.a
new file mode 100644
index 00000000000..9b9acdf3dd4
Binary files /dev/null and b/tools/sdk/esp32s3/opi_opi/libspi_flash.a differ
diff --git a/tools/sdk/esp32s3/opi_opi/sections.ld b/tools/sdk/esp32s3/opi_opi/sections.ld
new file mode 100644
index 00000000000..7f7c2142455
--- /dev/null
+++ b/tools/sdk/esp32s3/opi_opi/sections.ld
@@ -0,0 +1,596 @@
+/* Automatically generated file; DO NOT EDIT */
+/* Espressif IoT Development Framework Linker Script */
+/* Generated from: /home/runner/work/esp32-arduino-lib-builder/esp32-arduino-lib-builder/esp-idf/components/esp_system/ld/esp32s3/sections.ld.in */
+
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Default entry point */
+ENTRY(call_start_cpu0);
+
+_diram_i_start = 0x40378000;
+
+SECTIONS
+{
+  /**
+   * RTC fast memory holds RTC wake stub code,
+   * including from any source file named rtc_wake_stub*.c
+   */
+  .rtc.text :
+  {
+    . = ALIGN(4);
+    _rtc_text_start = ABSOLUTE(.);
+    *(.rtc.entry.text)
+
+    *(.rtc.literal .rtc.text .rtc.text.*)
+
+    *rtc_wake_stub*.*(.literal .text .literal.* .text.*)
+    _rtc_text_end = ABSOLUTE(.);
+  } > rtc_iram_seg
+
+  /**
+   * This section is required to skip rtc.text area because rtc_iram_seg and
+   * rtc_data_seg are reflect the same address space on different buses.
+   */
+  .rtc.dummy :
+  {
+    _rtc_dummy_start = ABSOLUTE(.);
+    _rtc_fast_start = ABSOLUTE(.);
+    . = SIZEOF(.rtc.text);
+    _rtc_dummy_end = ABSOLUTE(.);
+  } > rtc_data_seg
+
+  /**
+   * This section located in RTC FAST Memory area.
+   * It holds data marked with RTC_FAST_ATTR attribute.
+   * See the file "esp_attr.h" for more information.
+   */
+  .rtc.force_fast :
+  {
+    . = ALIGN(4);
+    _rtc_force_fast_start = ABSOLUTE(.);
+
+    _coredump_rtc_fast_start = ABSOLUTE(.);
+    *(.rtc.fast.coredump .rtc.fast.coredump.*)
+    _coredump_rtc_fast_end = ABSOLUTE(.);
+
+    *(.rtc.force_fast .rtc.force_fast.*)
+    . = ALIGN(4) ;
+    _rtc_force_fast_end = ABSOLUTE(.);
+  } > rtc_data_seg
+
+  /**
+   * RTC data section holds RTC wake stub
+   * data/rodata, including from any source file
+   * named rtc_wake_stub*.c and the data marked with
+   * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
+   * The memory location of the data is dependent on
+   * CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
+   */
+  .rtc.data :
+  {
+    _rtc_data_start = ABSOLUTE(.);
+
+    _coredump_rtc_start = ABSOLUTE(.);
+    *(.rtc.coredump .rtc.coredump.*)
+    _coredump_rtc_end = ABSOLUTE(.);
+    *(.rtc.data .rtc.data.*)
+    *(.rtc.rodata .rtc.rodata.*)
+
+    *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
+    _rtc_data_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /* RTC bss, from any source file named rtc_wake_stub*.c */
+  .rtc.bss (NOLOAD) :
+  {
+    _rtc_bss_start = ABSOLUTE(.);
+    *rtc_wake_stub*.*(.bss .bss.*)
+    *rtc_wake_stub*.*(COMMON)
+
+    *(.rtc.bss)
+
+    _rtc_bss_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /**
+   * This section holds data that should not be initialized at power up
+   * and will be retained during deep sleep.
+   * User data marked with RTC_NOINIT_ATTR will be placed
+   * into this section. See the file "esp_attr.h" for more information.
+	 * The memory location of the data is dependent on CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
+   */
+  .rtc_noinit (NOLOAD):
+  {
+    . = ALIGN(4);
+    _rtc_noinit_start = ABSOLUTE(.);
+    *(.rtc_noinit .rtc_noinit.*)
+    . = ALIGN(4) ;
+    _rtc_noinit_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /**
+   * This section located in RTC SLOW Memory area.
+   * It holds data marked with RTC_SLOW_ATTR attribute.
+   * See the file "esp_attr.h" for more information.
+   */
+  .rtc.force_slow :
+  {
+    . = ALIGN(4);
+    _rtc_force_slow_start = ABSOLUTE(.);
+    *(.rtc.force_slow .rtc.force_slow.*)
+    . = ALIGN(4) ;
+    _rtc_force_slow_end = ABSOLUTE(.);
+  } > rtc_slow_seg
+
+  /* Get size of rtc slow data based on rtc_data_location alias */
+  _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
+                        ? (_rtc_force_slow_end - _rtc_data_start)
+                        : (_rtc_force_slow_end - _rtc_force_slow_start);
+
+  _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
+                        ? (_rtc_force_fast_end - _rtc_fast_start)
+                        : (_rtc_noinit_end - _rtc_fast_start);
+
+  ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
+          "RTC_SLOW segment data does not fit.")
+
+  ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
+          "RTC_FAST segment data does not fit.")
+
+  /* Send .iram0 code to iram */
+  .iram0.vectors :
+  {
+    _iram_start = ABSOLUTE(.);
+    /* Vectors go to IRAM */
+    _vector_table = ABSOLUTE(.);
+    . = 0x0;
+    KEEP(*(.WindowVectors.text));
+    . = 0x180;
+    KEEP(*(.Level2InterruptVector.text));
+    . = 0x1c0;
+    KEEP(*(.Level3InterruptVector.text));
+    . = 0x200;
+    KEEP(*(.Level4InterruptVector.text));
+    . = 0x240;
+    KEEP(*(.Level5InterruptVector.text));
+    . = 0x280;
+    KEEP(*(.DebugExceptionVector.text));
+    . = 0x2c0;
+    KEEP(*(.NMIExceptionVector.text));
+    . = 0x300;
+    KEEP(*(.KernelExceptionVector.text));
+    . = 0x340;
+    KEEP(*(.UserExceptionVector.text));
+    . = 0x3C0;
+    KEEP(*(.DoubleExceptionVector.text));
+    . = 0x400;
+    _invalid_pc_placeholder = ABSOLUTE(.);
+    *(.*Vector.literal)
+
+    *(.UserEnter.literal);
+    *(.UserEnter.text);
+    . = ALIGN (16);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    _init_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.text :
+  {
+    /* Code marked as running out of IRAM */
+    _iram_text_start = ABSOLUTE(.);
+
+    *(.iram1 .iram1.*)
+    *libapp_trace.a:app_trace.*(.literal .literal.* .text .text.*)
+    *libapp_trace.a:app_trace_util.*(.literal .literal.* .text .text.*)
+    *libesp_event.a:default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
+    *libesp_event.a:esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
+    *libesp_hw_support.a:cpu_util.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:opiram_psram.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_clk.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
+    *libesp_hw_support.a:rtc_pm.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_sleep.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_time.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_wdt.*(.literal .literal.* .text .text.*)
+    *libesp_ringbuf.a:(.literal .literal.* .text .text.*)
+    *libesp_system.a:esp_err.*(.literal .literal.* .text .text.*)
+    *libesp_system.a:esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
+    *libesp_system.a:ubsan.*(.literal .literal.* .text .text.*)
+    *libfreertos.a:(EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal.* EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text.*)
+    *libfreertos.a:port.*(.literal.pxPortInitialiseStack .literal.unlikely.vPortEndScheduler .literal.vApplicationStackOverflowHook .literal.vPortAssertIfInISR .literal.vPortExitCritical .literal.vPortExitCriticalCompliance .literal.vPortReleaseTaskMPUSettings .literal.vPortSetStackWatchpoint .literal.vPortYieldOtherCore .literal.xPortEnterCriticalTimeout .literal.xPortEnterCriticalTimeoutCompliance .literal.xPortInIsrContext .literal.xPortStartScheduler .text .text.pxPortInitialiseStack .text.unlikely.vPortEndScheduler .text.vApplicationStackOverflowHook .text.vPortAssertIfInISR .text.vPortExitCritical .text.vPortExitCriticalCompliance .text.vPortReleaseTaskMPUSettings .text.vPortSetStackWatchpoint .text.vPortStoreTaskMPUSettings .text.vPortYieldOtherCore .text.xPortEnterCriticalTimeout .text.xPortEnterCriticalTimeoutCompliance .text.xPortGetTickRateHz .text.xPortInIsrContext .text.xPortStartScheduler)
+    *libfreertos.a:port_common.*(.literal.esp_startup_start_app_common .literal.vApplicationGetIdleTaskMemory .literal.vApplicationGetTimerTaskMemory .literal.xPortCheckValidTCBMem .literal.xPortcheckValidStackMem .text .text.esp_startup_start_app_common .text.vApplicationGetIdleTaskMemory .text.vApplicationGetTimerTaskMemory .text.xPortCheckValidTCBMem .text.xPortcheckValidStackMem)
+    *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
+    *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
+    *libgcov.a:(.literal .literal.* .text .text.*)
+    *libhal.a:cpu_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:i2c_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:ledc_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:soc_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:systimer_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:wdt_hal_iram.*(.literal .literal.* .text .text.*)
+    *libheap.a:heap_tlsf.*(.literal .literal.* .text .text.*)
+    *libheap.a:multi_heap.*(.literal .literal.* .text .text.*)
+    *libheap.a:multi_heap_poisoning.*(.literal .literal.* .text .text.*)
+    *liblog.a:log.*(.literal.esp_log_write .text.esp_log_write)
+    *liblog.a:log_freertos.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_lock .text.esp_log_impl_lock)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_lock_timeout .text.esp_log_impl_lock_timeout)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_unlock .text.esp_log_impl_unlock)
+    *liblog.a:log_freertos.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
+    *libnewlib.a:abort.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:assert.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:heap.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:stdatomic.*(.literal .literal.* .text .text.*)
+    *librtc.a:(.literal .literal.* .text .text.*)
+    *libsoc.a:lldesc.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_oct_flash_init.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_timing_tuning.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_timing_config.*(.literal .literal.* .text .text.*)
+    *libxt_hal.a:(.literal .literal.* .text .text.*)
+    *libxtensa.a:eri.*(.literal .literal.* .text .text.*)
+    *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*)
+
+  } > iram0_0_seg
+
+  /**
+   * This section is required to skip .iram0.text area because iram0_0_seg and
+   * dram0_0_seg reflect the same address space on different buses.
+   */
+  .dram0.dummy (NOLOAD):
+  {
+    . = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0);
+  } > dram0_0_seg
+
+  .dram0.data :
+  {
+    _data_start = ABSOLUTE(.);
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    *(.jcr)
+
+    _esp_system_init_fn_array_start = ABSOLUTE(.);
+    KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*)))
+    _esp_system_init_fn_array_end = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*)
+    *(.dram1 .dram1.*)
+    _coredump_dram_start = ABSOLUTE(.);
+    *(.dram2.coredump .dram2.coredump.*)
+    _coredump_dram_end = ABSOLUTE(.);
+    *libapp_trace.a:app_trace.*(.rodata .rodata.*)
+    *libapp_trace.a:app_trace_util.*(.rodata .rodata.*)
+    _bt_data_start = ABSOLUTE(.);
+    *libbt.a:(.data .data.*)
+    . = ALIGN(4);
+    _bt_data_end = ABSOLUTE(.);
+    _btdm_data_start = ABSOLUTE(.);
+    *libbtdm_app.a:(.data .data.*)
+    . = ALIGN(4);
+    _btdm_data_end = ABSOLUTE(.);
+    *libesp_hw_support.a:opiram_psram.*(.rodata .rodata.*)
+    *libesp_hw_support.a:rtc_clk.*(.rodata .rodata.*)
+    *libesp_system.a:esp_err.*(.rodata .rodata.*)
+    *libesp_system.a:ubsan.*(.rodata .rodata.*)
+    *libgcc.a:_divsf3.*(.rodata .rodata.*)
+    *libgcov.a:(.rodata .rodata.*)
+    *libhal.a:cpu_hal.*(.rodata .rodata.*)
+    *libhal.a:i2c_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:ledc_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:soc_hal.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_hal_gpspi.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_slave_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:systimer_hal.*(.rodata .rodata.*)
+    *libhal.a:wdt_hal_iram.*(.rodata .rodata.*)
+    *libheap.a:heap_tlsf.*(.rodata .rodata.*)
+    *libheap.a:multi_heap.*(.rodata .rodata.*)
+    *libheap.a:multi_heap_poisoning.*(.rodata .rodata.*)
+    *libnewlib.a:abort.*(.rodata .rodata.*)
+    *libnewlib.a:assert.*(.rodata .rodata.*)
+    *libnewlib.a:heap.*(.rodata .rodata.*)
+    *libnewlib.a:stdatomic.*(.rodata .rodata.*)
+    _nimble_data_start = ABSOLUTE(.);
+    *libnimble.a:(.data .data.*)
+    . = ALIGN(4);
+    _nimble_data_end = ABSOLUTE(.);
+    *libphy.a:(.rodata .rodata.*)
+    *libsoc.a:lldesc.*(.rodata .rodata.*)
+    *libspi_flash.a:memspi_host_driver.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_boya.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_gd.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_mxic.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_mxic_opi.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_oct_flash_init.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_rom_patch.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_timing_tuning.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_timing_config.*(.rodata .rodata.*)
+
+    _data_end = ABSOLUTE(.);
+    . = ALIGN(4);
+  } > dram0_0_seg
+
+  /**
+   * This section holds data that should not be initialized at power up.
+   * The section located in Internal SRAM memory region. The macro _NOINIT
+   * can be used as attribute to place data into this section.
+   * See the "esp_attr.h" file for more information.
+   */
+  .noinit (NOLOAD):
+  {
+    . = ALIGN(4);
+    _noinit_start = ABSOLUTE(.);
+    *(.noinit .noinit.*)
+    . = ALIGN(4) ;
+    _noinit_end = ABSOLUTE(.);
+  } > dram0_0_seg
+
+  /* Shared RAM */
+  .dram0.bss (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.ext_ram.bss*)
+
+    *(.bss .bss.*)
+    *(.ext_ram.bss .ext_ram.bss.*)
+    *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
+    *(COMMON)
+    _bt_bss_start = ABSOLUTE(.);
+    *libbt.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _bt_bss_end = ABSOLUTE(.);
+    _btdm_bss_start = ABSOLUTE(.);
+    *libbtdm_app.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _btdm_bss_end = ABSOLUTE(.);
+    _nimble_bss_start = ABSOLUTE(.);
+    *libnimble.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _nimble_bss_end = ABSOLUTE(.);
+
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.share.mem)
+    *(.gnu.linkonce.b.*)
+
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+  } > dram0_0_seg
+
+  ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")
+
+  .flash.text :
+  {
+    _stext = .;
+    _instruction_reserved_start = ABSOLUTE(.);
+    _text_start = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*)
+    *(.wifi0iram .wifi0iram.*)
+    *(.wifiorslpiram .wifiorslpiram.*)
+    *(.wifirxiram .wifirxiram.*)
+    *(.wifislpiram .wifislpiram.*)
+    *(.wifislprxiram .wifislprxiram.*)
+    *libesp_event.a:default_event_loop.*(.literal.esp_event_handler_instance_register .literal.esp_event_handler_instance_unregister .literal.esp_event_handler_register .literal.esp_event_handler_unregister .literal.esp_event_loop_create_default .literal.esp_event_loop_delete_default .literal.esp_event_post .literal.esp_event_send_to_default_loop .text .text.esp_event_handler_instance_register .text.esp_event_handler_instance_unregister .text.esp_event_handler_register .text.esp_event_handler_unregister .text.esp_event_loop_create_default .text.esp_event_loop_delete_default .text.esp_event_post .text.esp_event_send_to_default_loop)
+    *libesp_event.a:esp_event.*(.literal.base_node_add_handler .literal.esp_event_handler_instance_register_with .literal.esp_event_handler_instance_unregister_with .literal.esp_event_handler_register_with .literal.esp_event_handler_register_with_internal .literal.esp_event_handler_unregister_with .literal.esp_event_handler_unregister_with_internal .literal.esp_event_loop_create .literal.esp_event_loop_delete .literal.esp_event_loop_run .literal.esp_event_loop_run_task .literal.esp_event_post_to .literal.handler_instances_add .literal.handler_instances_remove .literal.handler_instances_remove_all$isra$1 .literal.loop_node_add_handler .text .text.base_node_add_handler .text.esp_event_dump .text.esp_event_handler_instance_register_with .text.esp_event_handler_instance_unregister_with .text.esp_event_handler_register_with .text.esp_event_handler_register_with_internal .text.esp_event_handler_unregister_with .text.esp_event_handler_unregister_with_internal .text.esp_event_loop_create .text.esp_event_loop_delete .text.esp_event_loop_run .text.esp_event_loop_run_task .text.esp_event_post_to .text.handler_instances_add .text.handler_instances_remove .text.handler_instances_remove_all$isra$1 .text.loop_node_add_handler)
+    *libesp_hw_support.a:rtc_init.*(.literal.rtc_init .literal.rtc_vddsdio_get_config .text .text.rtc_init .text.rtc_vddsdio_get_config)
+    *libesp_system.a:esp_system.*(.literal.esp_get_free_heap_size .literal.esp_get_free_internal_heap_size .literal.esp_get_idf_version .literal.esp_get_minimum_free_heap_size .literal.esp_register_shutdown_handler .literal.esp_unregister_shutdown_handler .text .text.esp_get_free_heap_size .text.esp_get_free_internal_heap_size .text.esp_get_idf_version .text.esp_get_minimum_free_heap_size .text.esp_register_shutdown_handler .text.esp_unregister_shutdown_handler)
+    *libfreertos.a:port.*(.literal.esp_startup_start_app .text.esp_startup_start_app)
+    *libfreertos.a:port.*(.literal.esp_startup_start_app_other_cores .text.esp_startup_start_app_other_cores)
+    *libfreertos.a:port_common.*(.literal.main_task .text.main_task)
+    *liblog.a:log.*(.literal.esp_log_level_get .literal.esp_log_level_set .literal.esp_log_set_vprintf .literal.esp_log_writev .literal.heap_bubble_down .literal.s_log_level_get_and_unlock .text .text.esp_log_level_get .text.esp_log_level_set .text.esp_log_set_vprintf .text.esp_log_writev .text.heap_bubble_down .text.s_log_level_get_and_unlock)
+    *liblog.a:log_freertos.*(.literal.esp_log_system_timestamp .text .text.esp_log_system_timestamp)
+
+    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+
+    /** CPU will try to prefetch up to 16 bytes of
+      * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
+      * safe access to up to 16 bytes after the last real instruction, add
+      * dummy bytes to ensure this
+      */
+    . += _esp_flash_mmap_prefetch_pad_size;
+
+    _text_end = ABSOLUTE(.);
+    _instruction_reserved_end = ABSOLUTE(.);
+    _etext = .;
+
+    /**
+     * Similar to _iram_start, this symbol goes here so it is
+     * resolved by addr2line in preference to the first symbol in
+     * the flash.text segment.
+     */
+    _flash_cache_start = ABSOLUTE(0);
+  } > default_code_seg
+
+  /**
+   * This dummy section represents the .flash.text section but in default_rodata_seg.
+   * Thus, it must have its alignement and (at least) its size.
+   */
+  .flash_rodata_dummy (NOLOAD):
+  {
+    _flash_rodata_dummy_start = .;
+    /* Start at the same alignement constraint than .flash.text */
+    . = ALIGN(ALIGNOF(.flash.text));
+    /* Create an empty gap as big as .flash.text section */
+    . = . + SIZEOF(.flash.text);
+    /* Prepare the alignement of the section above. Few bytes (0x20) must be
+     * added for the mapping header. */
+    . = ALIGN(0x10000) + 0x20;
+    _rodata_reserved_start = .;
+  } > default_rodata_seg
+
+  .flash.appdesc : ALIGN(0x10)
+  {
+    _rodata_start = ABSOLUTE(.);
+
+    *(.rodata_desc .rodata_desc.*)               /* Should be the first.  App version info.        DO NOT PUT ANYTHING BEFORE IT! */
+    *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
+
+    /* Create an empty gap within this section. Thanks to this, the end of this
+     * section will match .flah.rodata's begin address. Thus, both sections
+     * will be merged when creating the final bin image. */
+    . = ALIGN(ALIGNOF(.flash.rodata));
+  } >default_rodata_seg
+
+  .flash.rodata : ALIGN(0x10)
+  {
+    _flash_rodata_start = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata.*)
+    *(.rodata_wlog_error .rodata_wlog_error.*)
+
+    *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table .gcc_except_table.*)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    . = (. + 3) & ~ 3;
+    __eh_frame = ABSOLUTE(.);
+    KEEP(*(.eh_frame))
+    . = (. + 7) & ~ 3;
+    /* C++ constructor and destructor tables */
+    /* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt */
+    __init_array_start = ABSOLUTE(.);
+    KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
+    __init_array_end = ABSOLUTE(.);
+    KEEP (*crtbegin.*(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /* C++ exception handlers table: */
+    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
+    soc_reserved_memory_region_start = ABSOLUTE(.);
+    KEEP (*(.reserved_memory_address))
+    soc_reserved_memory_region_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+    /* Literals are also RO data. */
+    _lit4_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.lit4.*)
+    *(.gnu.linkonce.lit4.*)
+    _lit4_end = ABSOLUTE(.);
+    . = ALIGN(4);
+    _thread_local_start = ABSOLUTE(.);
+    *(.tdata)
+    *(.tdata.*)
+    *(.tbss)
+    *(.tbss.*)
+    _thread_local_end = ABSOLUTE(.);
+    _rodata_reserved_end = ABSOLUTE(.);
+    . = ALIGN(4);
+  } > default_rodata_seg
+
+  _flash_rodata_align = ALIGNOF(.flash.rodata);
+
+  .flash.rodata_noload (NOLOAD) :
+  {
+    . = ALIGN (4);
+    *(.rodata_wlog_debug .rodata_wlog_debug.*)
+    *(.rodata_wlog_info .rodata_wlog_info.*)
+    *(.rodata_wlog_verbose .rodata_wlog_verbose.*)
+    *(.rodata_wlog_warning .rodata_wlog_warning.*)
+  } > default_rodata_seg
+
+  /* Marks the end of IRAM code segment */
+  .iram0.text_end (NOLOAD) :
+  {
+    /* ESP32-S3 memprot requires 16B padding for possible CPU prefetch and 256B alignment for PMS split lines */
+    . += _esp_memprot_prefetch_pad_size;
+    . = ALIGN(_esp_memprot_align_size);
+    /* iram_end_test section exists for use by memprot unit tests only */
+    *(.iram_end_test)
+    _iram_text_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.data :
+  {
+    . = ALIGN(4);
+    _iram_data_start = ABSOLUTE(.);
+
+    *(.iram.data .iram.data.*)
+    _coredump_iram_start = ABSOLUTE(.);
+    *(.iram2.coredump .iram2.coredump.*)
+    _coredump_iram_end = ABSOLUTE(.);
+
+    _iram_data_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.bss (NOLOAD) :
+  {
+    . = ALIGN(4);
+    _iram_bss_start = ABSOLUTE(.);
+
+    *(.iram.bss .iram.bss.*)
+
+    _iram_bss_end = ABSOLUTE(.);
+    . = ALIGN(4);
+    _iram_end = ABSOLUTE(.);
+   } > iram0_0_seg
+
+  /* Marks the end of data, bss and possibly rodata  */
+  .dram0.heap_start (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _heap_start = ABSOLUTE(.);
+  } > dram0_0_seg
+}
+
+ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
+          "IRAM0 segment data does not fit.")
+
+ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
+          "DRAM segment data does not fit.")
diff --git a/tools/sdk/esp32s3/opi_qspi/include/sdkconfig.h b/tools/sdk/esp32s3/opi_qspi/include/sdkconfig.h
new file mode 100644
index 00000000000..34a97254f39
--- /dev/null
+++ b/tools/sdk/esp32s3/opi_qspi/include/sdkconfig.h
@@ -0,0 +1,992 @@
+/*
+ * Automatically generated file. DO NOT EDIT.
+ * Espressif IoT Development Framework (ESP-IDF) Configuration Header
+ */
+#pragma once
+#define CONFIG_IDF_CMAKE 1
+#define CONFIG_IDF_TARGET_ARCH_XTENSA 1
+#define CONFIG_IDF_TARGET "esp32s3"
+#define CONFIG_IDF_TARGET_ESP32S3 1
+#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0009
+#define CONFIG_SDK_TOOLPREFIX "xtensa-esp32s3-elf-"
+#define CONFIG_APP_BUILD_TYPE_APP_2NDBOOT 1
+#define CONFIG_APP_BUILD_GENERATE_BINARIES 1
+#define CONFIG_APP_BUILD_BOOTLOADER 1
+#define CONFIG_APP_BUILD_USE_FLASH_SECTIONS 1
+#define CONFIG_APP_COMPILE_TIME_DATE 1
+#define CONFIG_APP_RETRIEVE_LEN_ELF_SHA 16
+#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0
+#define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
+#define CONFIG_BOOTLOADER_LOG_LEVEL_NONE 1
+#define CONFIG_BOOTLOADER_LOG_LEVEL 0
+#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
+#define CONFIG_BOOTLOADER_WDT_ENABLE 1
+#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
+#define CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP 1
+#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x10
+#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
+#define CONFIG_SECURE_BOOT_SUPPORTS_RSA 1
+#define CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE 1
+#define CONFIG_BOOT_ROM_LOG_ALWAYS_ON 1
+#define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
+#define CONFIG_ESPTOOLPY_OCT_FLASH 1
+#define CONFIG_ESPTOOLPY_FLASHMODE_OPI 1
+#define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR 1
+#define CONFIG_ESPTOOLPY_FLASHMODE "dout"
+#define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1
+#define CONFIG_ESPTOOLPY_FLASHFREQ "80m"
+#define CONFIG_ESPTOOLPY_FLASHSIZE_4MB 1
+#define CONFIG_ESPTOOLPY_FLASHSIZE "4MB"
+#define CONFIG_ESPTOOLPY_FLASHSIZE_DETECT 1
+#define CONFIG_ESPTOOLPY_BEFORE_RESET 1
+#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
+#define CONFIG_ESPTOOLPY_AFTER_RESET 1
+#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B 1
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL 115200
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD 115200
+#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
+#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
+#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
+#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
+#define CONFIG_PARTITION_TABLE_MD5 1
+#define CONFIG_LIB_BUILDER_FLASHMODE "opi"
+#define CONFIG_LIB_BUILDER_FLASHFREQ "80m"
+#define CONFIG_ESP_RMAKER_ASSISTED_CLAIM 1
+#define CONFIG_ESP_RMAKER_CLAIM_TYPE 2
+#define CONFIG_ESP_RMAKER_MQTT_HOST "a1p72mufdu6064-ats.iot.us-east-1.amazonaws.com"
+#define CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE 1024
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0 1
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM 0
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH 1
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD 0
+#define CONFIG_ESP_RMAKER_OTA_HTTP_RX_BUFFER_SIZE 1024
+#define CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES 10
+#define CONFIG_ESP_RMAKER_SCENES_MAX_SCENES 10
+#define CONFIG_ENABLE_ARDUINO_DEPENDS 1
+#define CONFIG_AUTOSTART_ARDUINO 1
+#define CONFIG_ARDUINO_RUN_CORE1 1
+#define CONFIG_ARDUINO_RUNNING_CORE 1
+#define CONFIG_ARDUINO_LOOP_STACK_SIZE 8192
+#define CONFIG_ARDUINO_EVENT_RUN_CORE1 1
+#define CONFIG_ARDUINO_EVENT_RUNNING_CORE 1
+#define CONFIG_ARDUINO_UDP_RUN_CORE0 1
+#define CONFIG_ARDUINO_UDP_TASK_PRIORITY 3
+#define CONFIG_ARDUINO_UDP_RUNNING_CORE 0
+#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR 1
+#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL 1
+#define CONFIG_ARDUHAL_ESP_LOG 1
+#define CONFIG_ARDUHAL_PARTITION_SCHEME_DEFAULT 1
+#define CONFIG_ARDUHAL_PARTITION_SCHEME "default"
+#define CONFIG_TINYUSB_ENABLED 1
+#define CONFIG_TINYUSB_CDC_ENABLED 1
+#define CONFIG_TINYUSB_DESC_CDC_STRING "Espressif CDC Device"
+#define CONFIG_TINYUSB_CDC_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_CDC_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_MSC_ENABLED 1
+#define CONFIG_TINYUSB_DESC_MSC_STRING "Espressif MSC Device"
+#define CONFIG_TINYUSB_MSC_BUFSIZE 4096
+#define CONFIG_TINYUSB_HID_ENABLED 1
+#define CONFIG_TINYUSB_DESC_HID_STRING "Espressif HID Device"
+#define CONFIG_TINYUSB_HID_BUFSIZE 64
+#define CONFIG_TINYUSB_MIDI_ENABLED 1
+#define CONFIG_TINYUSB_DESC_MIDI_STRING "Espressif MIDI Device"
+#define CONFIG_TINYUSB_MIDI_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_MIDI_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_VIDEO_ENABLED 1
+#define CONFIG_TINYUSB_DESC_VIDEO_STRING "Espressif VIDEO Device"
+#define CONFIG_TINYUSB_VIDEO_STREAMING_BUFSIZE 64
+#define CONFIG_TINYUSB_VIDEO_STREAMING_IFS 1
+#define CONFIG_TINYUSB_DFU_RT_ENABLED 1
+#define CONFIG_TINYUSB_DESC_DFU_RT_STRING "Espressif DFU_RT Device"
+#define CONFIG_TINYUSB_VENDOR_ENABLED 1
+#define CONFIG_TINYUSB_DESC_VENDOR_STRING "Espressif VENDOR Device"
+#define CONFIG_TINYUSB_VENDOR_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_VENDOR_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_DEBUG_LEVEL 0
+#define CONFIG_MODEL_IN_SPIFFS 1
+#define CONFIG_USE_WAKENET 1
+#define CONFIG_SR_WN_MODEL_WN8_QUANT 1
+#define CONFIG_SR_WN_WN8_HIESP 1
+#define CONFIG_USE_MULTINET 1
+#define CONFIG_SR_MN_ENGLISH 1
+#define CONFIG_SR_MN_EN_MULTINET5_SINGLE_RECOGNITION_QUANT8 1
+#define CONFIG_EN_SPEECH_COMMAND_ID0 "TfL Mm c qbK"
+#define CONFIG_EN_SPEECH_COMMAND_ID1 "Sgl c Sel"
+#define CONFIG_EN_SPEECH_COMMAND_ID2 "PLd NoZ paNcL"
+#define CONFIG_EN_SPEECH_COMMAND_ID3 "TkN nN Mi StNDBnKS"
+#define CONFIG_EN_SPEECH_COMMAND_ID4 "TkN eF Mi StNDBnKS"
+#define CONFIG_EN_SPEECH_COMMAND_ID5 "hicST VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID6 "LbcST VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID7 "gNKRmS jc VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID8 "DgKRmS jc VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID9 "TkN nN jc TmVm"
+#define CONFIG_EN_SPEECH_COMMAND_ID10 "TkN eF jc TmVm"
+#define CONFIG_EN_SPEECH_COMMAND_ID11 "MdK Mm c Tm"
+#define CONFIG_EN_SPEECH_COMMAND_ID12 "MdK Mm c KnFm"
+#define CONFIG_EN_SPEECH_COMMAND_ID13 "TkN nN jc LiT"
+#define CONFIG_EN_SPEECH_COMMAND_ID14 "TkN eF jc LiT"
+#define CONFIG_EN_SPEECH_COMMAND_ID15 "pdNq jc KcLk To RfD"
+#define CONFIG_EN_SPEECH_COMMAND_ID16 "pdNq jc KcLk To GRmN"
+#define CONFIG_EN_SPEECH_COMMAND_ID17 "TkN nN eL jc LiTS"
+#define CONFIG_EN_SPEECH_COMMAND_ID18 "TkN eF eL jc LiTS"
+#define CONFIG_EN_SPEECH_COMMAND_ID19 "TkN nN jc fR KcNDgscNk"
+#define CONFIG_EN_SPEECH_COMMAND_ID20 "TkN eF jc fR KcNDgscNk"
+#define CONFIG_EN_SPEECH_COMMAND_ID21 "SfT jc TfMPRcpk To SgKSTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID22 "SfT jc TfMPRcpk To SfVcNTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID23 "SfT jc TfMPRcpk To dTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID24 "SfT jc TfMPRcpk To NiNTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID25 "SfT jc TfMPRcpk To TWfNTm DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID26 "SfT jc TfMPRcpk To TWfNTm WcN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID27 "SfT jc TfMPRcpk To TWfNTm To DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID28 "SfT jc TfMPRcpk To TWfNTm vRm DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID29 "SfT jc TfMPRcpk To TWfNTm FeR DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID30 "SfT jc TfMPRcpk To TWfNTm FiV DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID31 "SfT jc TfMPRcpk To TWfNTm SgKS DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID32 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID33 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID34 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID35 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID36 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID37 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID38 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID39 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID40 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID41 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID42 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID43 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID44 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID45 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID46 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID47 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID48 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID49 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID50 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID51 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID52 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID53 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID54 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID55 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID56 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID57 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID58 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID59 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID60 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID61 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID62 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID63 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID64 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID65 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID66 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID67 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID68 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID69 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID70 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID71 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID72 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID73 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID74 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID75 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID76 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID77 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID78 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID79 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID80 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID81 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID82 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID83 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID84 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID85 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID86 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID87 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID88 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID89 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID90 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID91 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID92 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID93 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID94 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID95 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID96 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID97 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID98 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID99 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID100 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID101 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID102 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID103 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID104 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID105 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID106 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID107 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID108 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID109 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID110 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID111 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID112 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID113 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID114 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID115 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID116 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID117 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID118 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID119 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID120 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID121 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID122 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID123 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID124 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID125 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID126 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID127 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID128 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID129 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID130 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID131 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID132 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID133 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID134 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID135 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID136 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID137 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID138 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID139 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID140 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID141 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID142 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID143 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID144 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID145 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID146 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID147 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID148 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID149 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID150 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID151 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID152 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID153 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID154 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID155 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID156 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID157 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID158 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID159 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID160 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID161 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID162 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID163 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID164 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID165 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID166 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID167 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID168 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID169 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID170 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID171 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID172 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID173 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID174 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID175 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID176 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID177 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID178 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID179 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID180 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID181 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID182 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID183 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID184 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID185 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID186 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID187 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID188 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID189 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID190 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID191 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID192 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID193 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID194 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID195 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID196 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID197 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID198 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID199 ""
+#define CONFIG_COMPILER_OPTIMIZATION_SIZE 1
+#define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
+#define CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL 2
+#define CONFIG_COMPILER_HIDE_PATHS_MACROS 1
+#define CONFIG_COMPILER_CXX_EXCEPTIONS 1
+#define CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE 0
+#define CONFIG_COMPILER_STACK_CHECK_MODE_NORM 1
+#define CONFIG_COMPILER_STACK_CHECK 1
+#define CONFIG_COMPILER_WARN_WRITE_STRINGS 1
+#define CONFIG_APPTRACE_DEST_NONE 1
+#define CONFIG_APPTRACE_LOCK_ENABLE 1
+#define CONFIG_BT_ENABLED 1
+#define CONFIG_BT_SOC_SUPPORT_5_0 1
+#define CONFIG_BT_CTRL_MODE_EFF 1
+#define CONFIG_BT_CTRL_BLE_MAX_ACT 10
+#define CONFIG_BT_CTRL_BLE_MAX_ACT_EFF 10
+#define CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB 0
+#define CONFIG_BT_CTRL_PINNED_TO_CORE_0 1
+#define CONFIG_BT_CTRL_PINNED_TO_CORE 0
+#define CONFIG_BT_CTRL_HCI_MODE_VHCI 1
+#define CONFIG_BT_CTRL_HCI_TL 1
+#define CONFIG_BT_CTRL_ADV_DUP_FILT_MAX 30
+#define CONFIG_BT_CTRL_HW_CCA_VAL 20
+#define CONFIG_BT_CTRL_HW_CCA_EFF 0
+#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG 1
+#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF 0
+#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0 1
+#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF 0
+#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0 1
+#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF 0
+#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P3 1
+#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF 10
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM 100
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD 20
+#define CONFIG_BT_CTRL_BLE_SCAN_DUPL 1
+#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DEVICE 1
+#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE 0
+#define CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE 100
+#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS 1
+#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF 0
+#define CONFIG_BT_CTRL_SLEEP_MODE_EFF 0
+#define CONFIG_BT_CTRL_SLEEP_CLOCK_EFF 0
+#define CONFIG_BT_CTRL_HCI_TL_EFF 1
+#define CONFIG_BT_BLUEDROID_ENABLED 1
+#define CONFIG_BT_BTC_TASK_STACK_SIZE 3072
+#define CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0 1
+#define CONFIG_BT_BLUEDROID_PINNED_TO_CORE 0
+#define CONFIG_BT_BTU_TASK_STACK_SIZE 4096
+#define CONFIG_BT_BLE_ENABLED 1
+#define CONFIG_BT_GATTS_ENABLE 1
+#define CONFIG_BT_GATT_MAX_SR_PROFILES 8
+#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO 1
+#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE 0
+#define CONFIG_BT_GATTC_ENABLE 1
+#define CONFIG_BT_GATTC_CONNECT_RETRY_COUNT 3
+#define CONFIG_BT_BLE_SMP_ENABLE 1
+#define CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_HCI_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTM_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_SDP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_GAP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_PAN_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_A2D_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_MCA_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_HID_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_APPL_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_GATT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_SMP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTC_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_OSI_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL 2
+#define CONFIG_BT_ACL_CONNECTIONS 4
+#define CONFIG_BT_MULTI_CONNECTION_ENBALE 1
+#define CONFIG_BT_SMP_ENABLE 1
+#define CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT 30
+#define CONFIG_BT_BLE_RPA_SUPPORTED 1
+#define CONFIG_BT_BLE_50_FEATURES_SUPPORTED 1
+#define CONFIG_BT_BLE_42_FEATURES_SUPPORTED 1
+#define CONFIG_BLE_MESH 1
+#define CONFIG_BLE_MESH_HCI_5_0 1
+#define CONFIG_BLE_MESH_USE_DUPLICATE_SCAN 1
+#define CONFIG_BLE_MESH_MEM_ALLOC_MODE_INTERNAL 1
+#define CONFIG_BLE_MESH_DEINIT 1
+#define CONFIG_BLE_MESH_PROV 1
+#define CONFIG_BLE_MESH_PB_ADV 1
+#define CONFIG_BLE_MESH_PROXY 1
+#define CONFIG_BLE_MESH_NET_BUF_POOL_USAGE 1
+#define CONFIG_BLE_MESH_SUBNET_COUNT 3
+#define CONFIG_BLE_MESH_APP_KEY_COUNT 3
+#define CONFIG_BLE_MESH_MODEL_KEY_COUNT 3
+#define CONFIG_BLE_MESH_MODEL_GROUP_COUNT 3
+#define CONFIG_BLE_MESH_LABEL_COUNT 3
+#define CONFIG_BLE_MESH_CRPL 10
+#define CONFIG_BLE_MESH_MSG_CACHE_SIZE 10
+#define CONFIG_BLE_MESH_ADV_BUF_COUNT 60
+#define CONFIG_BLE_MESH_IVU_DIVIDER 4
+#define CONFIG_BLE_MESH_TX_SEG_MSG_COUNT 1
+#define CONFIG_BLE_MESH_RX_SEG_MSG_COUNT 1
+#define CONFIG_BLE_MESH_RX_SDU_MAX 384
+#define CONFIG_BLE_MESH_TX_SEG_MAX 32
+#define CONFIG_BLE_MESH_TRACE_LEVEL_WARNING 1
+#define CONFIG_BLE_MESH_STACK_TRACE_LEVEL 2
+#define CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL_WARNING 1
+#define CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL 2
+#define CONFIG_BLE_MESH_CLIENT_MSG_TIMEOUT 4000
+#define CONFIG_BLE_MESH_HEALTH_SRV 1
+#define CONFIG_BLE_MESH_GENERIC_SERVER 1
+#define CONFIG_BLE_MESH_SENSOR_SERVER 1
+#define CONFIG_BLE_MESH_TIME_SCENE_SERVER 1
+#define CONFIG_BLE_MESH_LIGHTING_SERVER 1
+#define CONFIG_COAP_MBEDTLS_PSK 1
+#define CONFIG_COAP_LOG_DEFAULT_LEVEL 0
+#define CONFIG_ADC_DISABLE_DAC 1
+#define CONFIG_EFUSE_MAX_BLK_LEN 256
+#define CONFIG_ESP_TLS_USING_MBEDTLS 1
+#define CONFIG_ESP_TLS_USE_DS_PERIPHERAL 1
+#define CONFIG_ESP_TLS_SERVER 1
+#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240 1
+#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 240
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB 1
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE 0x4000
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS 1
+#define CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS 8
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B 1
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE 32
+#define CONFIG_ESP32S3_DATA_CACHE_32KB 1
+#define CONFIG_ESP32S3_DATA_CACHE_SIZE 0x8000
+#define CONFIG_ESP32S3_DATA_CACHE_8WAYS 1
+#define CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS 8
+#define CONFIG_ESP32S3_DATA_CACHE_LINE_32B 1
+#define CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE 32
+#define CONFIG_ESP32S3_SPIRAM_SUPPORT 1
+#define CONFIG_SPIRAM_MODE_QUAD 1
+#define CONFIG_SPIRAM_TYPE_AUTO 1
+#define CONFIG_SPIRAM_SIZE -1
+#define CONFIG_DEFAULT_PSRAM_CLK_IO 30
+#define CONFIG_DEFAULT_PSRAM_CS_IO 26
+#define CONFIG_SPIRAM_SPEED_80M 1
+#define CONFIG_SPIRAM 1
+#define CONFIG_SPIRAM_USE_MALLOC 1
+#define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 4096
+#define CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP 1
+#define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 0
+#define CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM 0x0
+#define CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM 0
+#define CONFIG_ESP32S3_DEBUG_OCDAWARE 1
+#define CONFIG_ESP32S3_BROWNOUT_DET 1
+#define CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7 1
+#define CONFIG_ESP32S3_BROWNOUT_DET_LVL 7
+#define CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1 1
+#define CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC 1
+#define CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES 576
+#define CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY 2000
+#define CONFIG_ESP_ERR_TO_NAME_LOOKUP 1
+#define CONFIG_ETH_ENABLED 1
+#define CONFIG_ETH_USE_SPI_ETHERNET 1
+#define CONFIG_ETH_SPI_ETHERNET_DM9051 1
+#define CONFIG_ETH_SPI_ETHERNET_W5500 1
+#define CONFIG_ESP_EVENT_POST_FROM_ISR 1
+#define CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH 1
+#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 1024
+#define CONFIG_HTTPD_MAX_URI_LEN 512
+#define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
+#define CONFIG_HTTPD_PURGE_BUF_LEN 32
+#define CONFIG_HTTPD_WS_SUPPORT 1
+#define CONFIG_ESP_HTTPS_SERVER_ENABLE 1
+#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA 1
+#define CONFIG_ESP_MAC_ADDR_UNIVERSE_BT 1
+#define CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO 1
+#define CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES 2
+#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1
+#define CONFIG_RTC_CLOCK_BBPLL_POWER_ON_WITH_USB 1
+#define CONFIG_ESP_IPC_TASK_STACK_SIZE 1024
+#define CONFIG_ESP_IPC_USES_CALLERS_PRIORITY 1
+#define CONFIG_ESP_IPC_ISR_ENABLE 1
+#define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE 32
+#define CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL 120
+#define CONFIG_ESP_NETIF_TCPIP_LWIP 1
+#define CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER 1
+#define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
+#define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
+#define CONFIG_ESP_PHY_MAX_TX_POWER 20
+#define CONFIG_ESP_PHY_ENABLE_USB 1
+#define CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP 1
+#define CONFIG_PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP 1
+#define CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT 1
+#define CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK 1
+#define CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP 1
+#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
+#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2048
+#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 4096
+#define CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 1
+#define CONFIG_ESP_MAIN_TASK_AFFINITY 0x0
+#define CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE 2048
+#define CONFIG_ESP_CONSOLE_UART_DEFAULT 1
+#define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1
+#define CONFIG_ESP_CONSOLE_UART 1
+#define CONFIG_ESP_CONSOLE_MULTIPLE_UART 1
+#define CONFIG_ESP_CONSOLE_UART_NUM 0
+#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
+#define CONFIG_ESP_INT_WDT 1
+#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 1000
+#define CONFIG_ESP_INT_WDT_CHECK_CPU1 1
+#define CONFIG_ESP_TASK_WDT 1
+#define CONFIG_ESP_TASK_WDT_PANIC 1
+#define CONFIG_ESP_TASK_WDT_TIMEOUT_S 5
+#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 1
+#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
+#define CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER 1
+#define CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER 1
+#define CONFIG_ESP_TIMER_TASK_STACK_SIZE 4096
+#define CONFIG_ESP_TIMER_INTERRUPT_LEVEL 1
+#define CONFIG_ESP_TIMER_IMPL_SYSTIMER 1
+#define CONFIG_ESP32_WIFI_ENABLED 1
+#define CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE 1
+#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 8
+#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 32
+#define CONFIG_ESP32_WIFI_STATIC_TX_BUFFER 1
+#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 0
+#define CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM 8
+#define CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM 16
+#define CONFIG_ESP32_WIFI_CSI_ENABLED 1
+#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED 1
+#define CONFIG_ESP32_WIFI_TX_BA_WIN 6
+#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED 1
+#define CONFIG_ESP32_WIFI_RX_BA_WIN 16
+#define CONFIG_ESP32_WIFI_NVS_ENABLED 1
+#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 1
+#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN 752
+#define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM 32
+#define CONFIG_ESP_WIFI_FTM_ENABLE 1
+#define CONFIG_ESP_WIFI_FTM_INITIATOR_SUPPORT 1
+#define CONFIG_ESP_WIFI_FTM_RESPONDER_SUPPORT 1
+#define CONFIG_ESP_WIFI_SOFTAP_SUPPORT 1
+#define CONFIG_ESP_COREDUMP_ENABLE_TO_NONE 1
+#define CONFIG_FATFS_CODEPAGE_850 1
+#define CONFIG_FATFS_CODEPAGE 850
+#define CONFIG_FATFS_LFN_STACK 1
+#define CONFIG_FATFS_MAX_LFN 255
+#define CONFIG_FATFS_API_ENCODING_ANSI_OEM 1
+#define CONFIG_FATFS_FS_LOCK 0
+#define CONFIG_FATFS_TIMEOUT_MS 10000
+#define CONFIG_FATFS_PER_FILE_CACHE 1
+#define CONFIG_FATFS_ALLOC_PREFER_EXTRAM 1
+#define CONFIG_FMB_COMM_MODE_TCP_EN 1
+#define CONFIG_FMB_TCP_PORT_DEFAULT 502
+#define CONFIG_FMB_TCP_PORT_MAX_CONN 5
+#define CONFIG_FMB_TCP_CONNECTION_TOUT_SEC 20
+#define CONFIG_FMB_COMM_MODE_RTU_EN 1
+#define CONFIG_FMB_COMM_MODE_ASCII_EN 1
+#define CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND 150
+#define CONFIG_FMB_MASTER_DELAY_MS_CONVERT 200
+#define CONFIG_FMB_QUEUE_LENGTH 20
+#define CONFIG_FMB_PORT_TASK_STACK_SIZE 4096
+#define CONFIG_FMB_SERIAL_BUF_SIZE 256
+#define CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB 8
+#define CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS 1000
+#define CONFIG_FMB_PORT_TASK_PRIO 10
+#define CONFIG_FMB_PORT_TASK_AFFINITY_CPU0 1
+#define CONFIG_FMB_PORT_TASK_AFFINITY 0x0
+#define CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT 20
+#define CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE 20
+#define CONFIG_FMB_CONTROLLER_STACK_SIZE 4096
+#define CONFIG_FMB_EVENT_QUEUE_TIMEOUT 20
+#define CONFIG_FMB_TIMER_PORT_ENABLED 1
+#define CONFIG_FMB_TIMER_GROUP 0
+#define CONFIG_FMB_TIMER_INDEX 0
+#define CONFIG_FMB_MASTER_TIMER_GROUP 0
+#define CONFIG_FMB_MASTER_TIMER_INDEX 0
+#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
+#define CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER 1
+#define CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1 1
+#define CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER 1
+#define CONFIG_FREERTOS_HZ 1000
+#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
+#define CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK 1
+#define CONFIG_FREERTOS_INTERRUPT_BACKTRACE 1
+#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
+#define CONFIG_FREERTOS_ASSERT_FAIL_ABORT 1
+#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1024
+#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
+#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
+#define CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION 1
+#define CONFIG_FREERTOS_TIMER_TASK_PRIORITY 1
+#define CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH 2048
+#define CONFIG_FREERTOS_TIMER_QUEUE_LENGTH 10
+#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
+#define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
+#define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
+#define CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT 1
+#define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
+#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
+#define CONFIG_HEAP_POISONING_LIGHT 1
+#define CONFIG_HEAP_TRACING_OFF 1
+#define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
+#define CONFIG_LOG_DEFAULT_LEVEL 1
+#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
+#define CONFIG_LOG_MAXIMUM_LEVEL 1
+#define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
+#define CONFIG_LWIP_LOCAL_HOSTNAME "espressif"
+#define CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES 1
+#define CONFIG_LWIP_TIMERS_ONDEMAND 1
+#define CONFIG_LWIP_MAX_SOCKETS 16
+#define CONFIG_LWIP_SO_REUSE 1
+#define CONFIG_LWIP_SO_REUSE_RXTOALL 1
+#define CONFIG_LWIP_SO_RCVBUF 1
+#define CONFIG_LWIP_IP4_FRAG 1
+#define CONFIG_LWIP_IP6_FRAG 1
+#define CONFIG_LWIP_ETHARP_TRUST_IP_MAC 1
+#define CONFIG_LWIP_ESP_GRATUITOUS_ARP 1
+#define CONFIG_LWIP_GARP_TMR_INTERVAL 60
+#define CONFIG_LWIP_TCPIP_RECVMBOX_SIZE 32
+#define CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID 1
+#define CONFIG_LWIP_DHCP_RESTORE_LAST_IP 1
+#define CONFIG_LWIP_DHCP_OPTIONS_LEN 128
+#define CONFIG_LWIP_DHCPS 1
+#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
+#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
+#define CONFIG_LWIP_IPV6 1
+#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
+#define CONFIG_LWIP_NETIF_LOOPBACK 1
+#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
+#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
+#define CONFIG_LWIP_MAX_LISTENING_TCP 16
+#define CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION 1
+#define CONFIG_LWIP_TCP_MAXRTX 12
+#define CONFIG_LWIP_TCP_SYNMAXRTX 6
+#define CONFIG_LWIP_TCP_MSS 1436
+#define CONFIG_LWIP_TCP_TMR_INTERVAL 250
+#define CONFIG_LWIP_TCP_MSL 60000
+#define CONFIG_LWIP_TCP_SND_BUF_DEFAULT 5744
+#define CONFIG_LWIP_TCP_WND_DEFAULT 5744
+#define CONFIG_LWIP_TCP_RECVMBOX_SIZE 6
+#define CONFIG_LWIP_TCP_QUEUE_OOSEQ 1
+#define CONFIG_LWIP_TCP_OVERSIZE_MSS 1
+#define CONFIG_LWIP_TCP_RTO_TIME 3000
+#define CONFIG_LWIP_MAX_UDP_PCBS 16
+#define CONFIG_LWIP_UDP_RECVMBOX_SIZE 6
+#define CONFIG_LWIP_CHECKSUM_CHECK_ICMP 1
+#define CONFIG_LWIP_TCPIP_TASK_STACK_SIZE 2560
+#define CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 1
+#define CONFIG_LWIP_TCPIP_TASK_AFFINITY 0x0
+#define CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE 3
+#define CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS 5
+#define CONFIG_LWIP_ICMP 1
+#define CONFIG_LWIP_MAX_RAW_PCBS 16
+#define CONFIG_LWIP_SNTP_MAX_SERVERS 3
+#define CONFIG_LWIP_DHCP_GET_NTP_SRV 1
+#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
+#define CONFIG_LWIP_SNTP_UPDATE_DELAY 3600000
+#define CONFIG_LWIP_ESP_LWIP_ASSERT 1
+#define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
+#define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
+#define CONFIG_LWIP_HOOK_ND6_GET_GW_NONE 1
+#define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
+#define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
+#define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
+#define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
+#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
+#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
+#define CONFIG_MBEDTLS_HARDWARE_AES 1
+#define CONFIG_MBEDTLS_AES_USE_INTERRUPT 1
+#define CONFIG_MBEDTLS_HARDWARE_MPI 1
+#define CONFIG_MBEDTLS_HARDWARE_SHA 1
+#define CONFIG_MBEDTLS_ROM_MD5 1
+#define CONFIG_MBEDTLS_HAVE_TIME 1
+#define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
+#define CONFIG_MBEDTLS_SHA512_C 1
+#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
+#define CONFIG_MBEDTLS_TLS_SERVER 1
+#define CONFIG_MBEDTLS_TLS_CLIENT 1
+#define CONFIG_MBEDTLS_TLS_ENABLED 1
+#define CONFIG_MBEDTLS_PSK_MODES 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1
+#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
+#define CONFIG_MBEDTLS_SSL_PROTO_DTLS 1
+#define CONFIG_MBEDTLS_SSL_ALPN 1
+#define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
+#define CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE 1
+#define CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE 1
+#define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
+#define CONFIG_MBEDTLS_AES_C 1
+#define CONFIG_MBEDTLS_RC4_DISABLED 1
+#define CONFIG_MBEDTLS_CCM_C 1
+#define CONFIG_MBEDTLS_GCM_C 1
+#define CONFIG_MBEDTLS_PEM_PARSE_C 1
+#define CONFIG_MBEDTLS_PEM_WRITE_C 1
+#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1
+#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
+#define CONFIG_MBEDTLS_ECP_C 1
+#define CONFIG_MBEDTLS_ECDH_C 1
+#define CONFIG_MBEDTLS_ECDSA_C 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
+#define CONFIG_MDNS_MAX_SERVICES 10
+#define CONFIG_MDNS_TASK_PRIORITY 1
+#define CONFIG_MDNS_TASK_STACK_SIZE 4096
+#define CONFIG_MDNS_TASK_AFFINITY_CPU0 1
+#define CONFIG_MDNS_TASK_AFFINITY 0x0
+#define CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS 2000
+#define CONFIG_MDNS_TIMER_PERIOD_MS 100
+#define CONFIG_MDNS_MULTIPLE_INSTANCE 1
+#define CONFIG_MQTT_PROTOCOL_311 1
+#define CONFIG_MQTT_TRANSPORT_SSL 1
+#define CONFIG_MQTT_TRANSPORT_WEBSOCKET 1
+#define CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE 1
+#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
+#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
+#define CONFIG_OPENSSL_ERROR_STACK 1
+#define CONFIG_OPENSSL_ASSERT_DO_NOTHING 1
+#define CONFIG_PTHREAD_TASK_PRIO_DEFAULT 5
+#define CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT 2048
+#define CONFIG_PTHREAD_STACK_MIN 768
+#define CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY 1
+#define CONFIG_PTHREAD_TASK_CORE_DEFAULT -1
+#define CONFIG_PTHREAD_TASK_NAME_DEFAULT "pthread"
+#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
+#define CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS 1
+#define CONFIG_SPI_FLASH_YIELD_DURING_ERASE 1
+#define CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS 10
+#define CONFIG_SPI_FLASH_ERASE_YIELD_TICKS 2
+#define CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE 4096
+#define CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_GD_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_TH_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP 1
+#define CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE 1
+#define CONFIG_SPIFFS_MAX_PARTITIONS 3
+#define CONFIG_SPIFFS_CACHE 1
+#define CONFIG_SPIFFS_CACHE_WR 1
+#define CONFIG_SPIFFS_PAGE_CHECK 1
+#define CONFIG_SPIFFS_GC_MAX_RUNS 10
+#define CONFIG_SPIFFS_PAGE_SIZE 256
+#define CONFIG_SPIFFS_OBJ_NAME_LEN 32
+#define CONFIG_SPIFFS_USE_MAGIC 1
+#define CONFIG_SPIFFS_USE_MAGIC_LENGTH 1
+#define CONFIG_SPIFFS_META_LENGTH 4
+#define CONFIG_SPIFFS_USE_MTIME 1
+#define CONFIG_WS_TRANSPORT 1
+#define CONFIG_WS_BUFFER_SIZE 1024
+#define CONFIG_UNITY_ENABLE_FLOAT 1
+#define CONFIG_UNITY_ENABLE_DOUBLE 1
+#define CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER 1
+#define CONFIG_USB_OTG_SUPPORTED 1
+#define CONFIG_USB_HOST_CONTROL_TRANSFER_MAX_SIZE 256
+#define CONFIG_USB_HOST_HW_BUFFER_BIAS_BALANCED 1
+#define CONFIG_VFS_SUPPORT_IO 1
+#define CONFIG_VFS_SUPPORT_DIR 1
+#define CONFIG_VFS_SUPPORT_SELECT 1
+#define CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT 1
+#define CONFIG_VFS_SUPPORT_TERMIOS 1
+#define CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS 1
+#define CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN 128
+#define CONFIG_WL_SECTOR_SIZE_4096 1
+#define CONFIG_WL_SECTOR_SIZE 4096
+#define CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES 16
+#define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
+#define CONFIG_WPA_MBEDTLS_CRYPTO 1
+#define CONFIG_IO_GLITCH_FILTER_TIME_MS 50
+#define CONFIG_ESP_RMAKER_LIB_ESP_MQTT 1
+#define CONFIG_ESP_RMAKER_MQTT_GLUE_LIB 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT_443 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT 1
+#define CONFIG_ESP_RMAKER_MQTT_SEND_USERNAME 1
+#define CONFIG_ESP_RMAKER_MQTT_USERNAME "?Platform=APN/1 ESPIF,RAINMAKER,v1.0"
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK 4096
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_PRIORITY 5
+#define CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME "fctry"
+#define CONFIG_ESP_RMAKER_FACTORY_NAMESPACE "rmaker_creds"
+#define CONFIG_ESP_RMAKER_DEF_TIMEZONE "Asia/Shanghai"
+#define CONFIG_ESP_RMAKER_SNTP_SERVER_NAME "pool.ntp.org"
+#define CONFIG_DSP_OPTIMIZATIONS_SUPPORTED 1
+#define CONFIG_DSP_OPTIMIZED 1
+#define CONFIG_DSP_OPTIMIZATION 1
+#define CONFIG_DSP_MAX_FFT_SIZE_4096 1
+#define CONFIG_DSP_MAX_FFT_SIZE 4096
+#define CONFIG_OV7670_SUPPORT 1
+#define CONFIG_OV7725_SUPPORT 1
+#define CONFIG_NT99141_SUPPORT 1
+#define CONFIG_OV2640_SUPPORT 1
+#define CONFIG_OV3660_SUPPORT 1
+#define CONFIG_OV5640_SUPPORT 1
+#define CONFIG_GC2145_SUPPORT 1
+#define CONFIG_GC032A_SUPPORT 1
+#define CONFIG_GC0308_SUPPORT 1
+#define CONFIG_BF3005_SUPPORT 1
+#define CONFIG_BF20A6_SUPPORT 1
+#define CONFIG_SCCB_HARDWARE_I2C_PORT1 1
+#define CONFIG_SCCB_CLK_FREQ 100000
+#define CONFIG_GC_SENSOR_SUBSAMPLE_MODE 1
+#define CONFIG_CAMERA_CORE0 1
+#define CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX 32768
+#define CONFIG_LITTLEFS_MAX_PARTITIONS 3
+#define CONFIG_LITTLEFS_PAGE_SIZE 256
+#define CONFIG_LITTLEFS_OBJ_NAME_LEN 64
+#define CONFIG_LITTLEFS_READ_SIZE 128
+#define CONFIG_LITTLEFS_WRITE_SIZE 128
+#define CONFIG_LITTLEFS_LOOKAHEAD_SIZE 128
+#define CONFIG_LITTLEFS_CACHE_SIZE 512
+#define CONFIG_LITTLEFS_BLOCK_CYCLES 512
+#define CONFIG_LITTLEFS_USE_MTIME 1
+#define CONFIG_LITTLEFS_MTIME_USE_SECONDS 1
+
+/* List of deprecated options */
+#define CONFIG_A2D_TRACE_LEVEL_WARNING CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING
+#define CONFIG_ADC2_DISABLE_DAC CONFIG_ADC_DISABLE_DAC
+#define CONFIG_APPL_TRACE_LEVEL_WARNING CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING
+#define CONFIG_AVCT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING
+#define CONFIG_AVDT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING
+#define CONFIG_AVRC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING
+#define CONFIG_BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT
+#define CONFIG_BLE_SMP_ENABLE CONFIG_BT_BLE_SMP_ENABLE
+#define CONFIG_BLUEDROID_ENABLED CONFIG_BT_BLUEDROID_ENABLED
+#define CONFIG_BLUEDROID_PINNED_TO_CORE_0 CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0
+#define CONFIG_BLUFI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING
+#define CONFIG_BTC_TASK_STACK_SIZE CONFIG_BT_BTC_TASK_STACK_SIZE
+#define CONFIG_BTC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING
+#define CONFIG_BTIF_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING
+#define CONFIG_BTM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING
+#define CONFIG_BTU_TASK_STACK_SIZE CONFIG_BT_BTU_TASK_STACK_SIZE
+#define CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
+#define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
+#define CONFIG_CXX_EXCEPTIONS CONFIG_COMPILER_CXX_EXCEPTIONS
+#define CONFIG_CXX_EXCEPTIONS_EMG_POOL_SIZE CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE
+#define CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+#define CONFIG_ESP32S2_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
+#define CONFIG_ESP32_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+#define CONFIG_ESP32_APPTRACE_DEST_NONE CONFIG_APPTRACE_DEST_NONE
+#define CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY
+#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE CONFIG_ESP_COREDUMP_ENABLE_TO_NONE
+#define CONFIG_ESP32_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
+#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE
+#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER CONFIG_ESP_PHY_MAX_WIFI_TX_POWER
+#define CONFIG_ESP32_PTHREAD_STACK_MIN CONFIG_PTHREAD_STACK_MIN
+#define CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT CONFIG_PTHREAD_TASK_NAME_DEFAULT
+#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT CONFIG_PTHREAD_TASK_PRIO_DEFAULT
+#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT
+#define CONFIG_ESP_GRATUITOUS_ARP CONFIG_LWIP_ESP_GRATUITOUS_ARP
+#define CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
+#define CONFIG_GAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING
+#define CONFIG_GARP_TMR_INTERVAL CONFIG_LWIP_GARP_TMR_INTERVAL
+#define CONFIG_GATTC_ENABLE CONFIG_BT_GATTC_ENABLE
+#define CONFIG_GATTS_ENABLE CONFIG_BT_GATTS_ENABLE
+#define CONFIG_GATTS_SEND_SERVICE_CHANGE_AUTO CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO
+#define CONFIG_GATT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING
+#define CONFIG_HCI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING
+#define CONFIG_HID_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING
+#define CONFIG_INT_WDT CONFIG_ESP_INT_WDT
+#define CONFIG_INT_WDT_CHECK_CPU1 CONFIG_ESP_INT_WDT_CHECK_CPU1
+#define CONFIG_INT_WDT_TIMEOUT_MS CONFIG_ESP_INT_WDT_TIMEOUT_MS
+#define CONFIG_IPC_TASK_STACK_SIZE CONFIG_ESP_IPC_TASK_STACK_SIZE
+#define CONFIG_L2CAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING
+#define CONFIG_LOG_BOOTLOADER_LEVEL_NONE CONFIG_BOOTLOADER_LOG_LEVEL_NONE
+#define CONFIG_MAIN_TASK_STACK_SIZE CONFIG_ESP_MAIN_TASK_STACK_SIZE
+#define CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE
+#define CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT
+#define CONFIG_MB_CONTROLLER_STACK_SIZE CONFIG_FMB_CONTROLLER_STACK_SIZE
+#define CONFIG_MB_EVENT_QUEUE_TIMEOUT CONFIG_FMB_EVENT_QUEUE_TIMEOUT
+#define CONFIG_MB_MASTER_DELAY_MS_CONVERT CONFIG_FMB_MASTER_DELAY_MS_CONVERT
+#define CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND
+#define CONFIG_MB_QUEUE_LENGTH CONFIG_FMB_QUEUE_LENGTH
+#define CONFIG_MB_SERIAL_BUF_SIZE CONFIG_FMB_SERIAL_BUF_SIZE
+#define CONFIG_MB_SERIAL_TASK_PRIO CONFIG_FMB_PORT_TASK_PRIO
+#define CONFIG_MB_SERIAL_TASK_STACK_SIZE CONFIG_FMB_PORT_TASK_STACK_SIZE
+#define CONFIG_MB_TIMER_GROUP CONFIG_FMB_TIMER_GROUP
+#define CONFIG_MB_TIMER_INDEX CONFIG_FMB_TIMER_INDEX
+#define CONFIG_MB_TIMER_PORT_ENABLED CONFIG_FMB_TIMER_PORT_ENABLED
+#define CONFIG_MCA_TRACE_LEVEL_WARNING CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING
+#define CONFIG_MONITOR_BAUD_115200B CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B
+#define CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE
+#define CONFIG_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
+#define CONFIG_OSI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING
+#define CONFIG_PAN_TRACE_LEVEL_WARNING CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING
+#define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
+#define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
+#define CONFIG_RFCOMM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING
+#define CONFIG_SDP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING
+#define CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN
+#define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
+#define CONFIG_SMP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING
+#define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS
+#define CONFIG_STACK_CHECK_NORM CONFIG_COMPILER_STACK_CHECK_MODE_NORM
+#define CONFIG_SUPPORT_TERMIOS CONFIG_VFS_SUPPORT_TERMIOS
+#define CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT
+#define CONFIG_SW_COEXIST_ENABLE CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE
+#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE
+#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE
+#define CONFIG_TASK_WDT CONFIG_ESP_TASK_WDT
+#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
+#define CONFIG_TASK_WDT_PANIC CONFIG_ESP_TASK_WDT_PANIC
+#define CONFIG_TASK_WDT_TIMEOUT_S CONFIG_ESP_TASK_WDT_TIMEOUT_S
+#define CONFIG_TCPIP_RECVMBOX_SIZE CONFIG_LWIP_TCPIP_RECVMBOX_SIZE
+#define CONFIG_TCPIP_TASK_AFFINITY_CPU0 CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0
+#define CONFIG_TCPIP_TASK_STACK_SIZE CONFIG_LWIP_TCPIP_TASK_STACK_SIZE
+#define CONFIG_TCP_MAXRTX CONFIG_LWIP_TCP_MAXRTX
+#define CONFIG_TCP_MSL CONFIG_LWIP_TCP_MSL
+#define CONFIG_TCP_MSS CONFIG_LWIP_TCP_MSS
+#define CONFIG_TCP_OVERSIZE_MSS CONFIG_LWIP_TCP_OVERSIZE_MSS
+#define CONFIG_TCP_QUEUE_OOSEQ CONFIG_LWIP_TCP_QUEUE_OOSEQ
+#define CONFIG_TCP_RECVMBOX_SIZE CONFIG_LWIP_TCP_RECVMBOX_SIZE
+#define CONFIG_TCP_SND_BUF_DEFAULT CONFIG_LWIP_TCP_SND_BUF_DEFAULT
+#define CONFIG_TCP_SYNMAXRTX CONFIG_LWIP_TCP_SYNMAXRTX
+#define CONFIG_TCP_WND_DEFAULT CONFIG_LWIP_TCP_WND_DEFAULT
+#define CONFIG_TIMER_QUEUE_LENGTH CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
+#define CONFIG_TIMER_TASK_PRIORITY CONFIG_FREERTOS_TIMER_TASK_PRIORITY
+#define CONFIG_TIMER_TASK_STACK_DEPTH CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
+#define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
+#define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
+#define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
+#define CONFIG_USB_CDC_ENABLED CONFIG_TINYUSB_CDC_ENABLED
+#define CONFIG_USB_CDC_RX_BUFSIZE CONFIG_TINYUSB_CDC_RX_BUFSIZE
+#define CONFIG_USB_CDC_TX_BUFSIZE CONFIG_TINYUSB_CDC_TX_BUFSIZE
+#define CONFIG_USB_DEBUG_LEVEL CONFIG_TINYUSB_DEBUG_LEVEL
+#define CONFIG_USB_DESC_CDC_STRING CONFIG_TINYUSB_DESC_CDC_STRING
+#define CONFIG_USB_DESC_HID_STRING CONFIG_TINYUSB_DESC_HID_STRING
+#define CONFIG_USB_DESC_MSC_STRING CONFIG_TINYUSB_DESC_MSC_STRING
+#define CONFIG_USB_MSC_BUFSIZE CONFIG_TINYUSB_MSC_BUFSIZE
+#define CONFIG_USB_MSC_ENABLED CONFIG_TINYUSB_MSC_ENABLED
+#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
+#define CONFIG_ARDUINO_IDF_COMMIT "b8050b365e"
+#define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32s3/opi_qspi/libbootloader_support.a b/tools/sdk/esp32s3/opi_qspi/libbootloader_support.a
new file mode 100644
index 00000000000..e2a7ad4b953
Binary files /dev/null and b/tools/sdk/esp32s3/opi_qspi/libbootloader_support.a differ
diff --git a/tools/sdk/esp32s3/opi_qspi/libesp_hw_support.a b/tools/sdk/esp32s3/opi_qspi/libesp_hw_support.a
new file mode 100644
index 00000000000..64e69f5885b
Binary files /dev/null and b/tools/sdk/esp32s3/opi_qspi/libesp_hw_support.a differ
diff --git a/tools/sdk/esp32s3/opi_qspi/libesp_system.a b/tools/sdk/esp32s3/opi_qspi/libesp_system.a
new file mode 100644
index 00000000000..105a6a344e0
Binary files /dev/null and b/tools/sdk/esp32s3/opi_qspi/libesp_system.a differ
diff --git a/tools/sdk/esp32s3/opi_qspi/libfreertos.a b/tools/sdk/esp32s3/opi_qspi/libfreertos.a
new file mode 100644
index 00000000000..753f15178b3
Binary files /dev/null and b/tools/sdk/esp32s3/opi_qspi/libfreertos.a differ
diff --git a/tools/sdk/esp32s3/opi_qspi/libspi_flash.a b/tools/sdk/esp32s3/opi_qspi/libspi_flash.a
new file mode 100644
index 00000000000..1c8b01fd5b4
Binary files /dev/null and b/tools/sdk/esp32s3/opi_qspi/libspi_flash.a differ
diff --git a/tools/sdk/esp32s3/opi_qspi/sections.ld b/tools/sdk/esp32s3/opi_qspi/sections.ld
new file mode 100644
index 00000000000..b4a705d5024
--- /dev/null
+++ b/tools/sdk/esp32s3/opi_qspi/sections.ld
@@ -0,0 +1,596 @@
+/* Automatically generated file; DO NOT EDIT */
+/* Espressif IoT Development Framework Linker Script */
+/* Generated from: /home/runner/work/esp32-arduino-lib-builder/esp32-arduino-lib-builder/esp-idf/components/esp_system/ld/esp32s3/sections.ld.in */
+
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Default entry point */
+ENTRY(call_start_cpu0);
+
+_diram_i_start = 0x40378000;
+
+SECTIONS
+{
+  /**
+   * RTC fast memory holds RTC wake stub code,
+   * including from any source file named rtc_wake_stub*.c
+   */
+  .rtc.text :
+  {
+    . = ALIGN(4);
+    _rtc_text_start = ABSOLUTE(.);
+    *(.rtc.entry.text)
+
+    *(.rtc.literal .rtc.text .rtc.text.*)
+
+    *rtc_wake_stub*.*(.literal .text .literal.* .text.*)
+    _rtc_text_end = ABSOLUTE(.);
+  } > rtc_iram_seg
+
+  /**
+   * This section is required to skip rtc.text area because rtc_iram_seg and
+   * rtc_data_seg are reflect the same address space on different buses.
+   */
+  .rtc.dummy :
+  {
+    _rtc_dummy_start = ABSOLUTE(.);
+    _rtc_fast_start = ABSOLUTE(.);
+    . = SIZEOF(.rtc.text);
+    _rtc_dummy_end = ABSOLUTE(.);
+  } > rtc_data_seg
+
+  /**
+   * This section located in RTC FAST Memory area.
+   * It holds data marked with RTC_FAST_ATTR attribute.
+   * See the file "esp_attr.h" for more information.
+   */
+  .rtc.force_fast :
+  {
+    . = ALIGN(4);
+    _rtc_force_fast_start = ABSOLUTE(.);
+
+    _coredump_rtc_fast_start = ABSOLUTE(.);
+    *(.rtc.fast.coredump .rtc.fast.coredump.*)
+    _coredump_rtc_fast_end = ABSOLUTE(.);
+
+    *(.rtc.force_fast .rtc.force_fast.*)
+    . = ALIGN(4) ;
+    _rtc_force_fast_end = ABSOLUTE(.);
+  } > rtc_data_seg
+
+  /**
+   * RTC data section holds RTC wake stub
+   * data/rodata, including from any source file
+   * named rtc_wake_stub*.c and the data marked with
+   * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
+   * The memory location of the data is dependent on
+   * CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
+   */
+  .rtc.data :
+  {
+    _rtc_data_start = ABSOLUTE(.);
+
+    _coredump_rtc_start = ABSOLUTE(.);
+    *(.rtc.coredump .rtc.coredump.*)
+    _coredump_rtc_end = ABSOLUTE(.);
+    *(.rtc.data .rtc.data.*)
+    *(.rtc.rodata .rtc.rodata.*)
+
+    *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
+    _rtc_data_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /* RTC bss, from any source file named rtc_wake_stub*.c */
+  .rtc.bss (NOLOAD) :
+  {
+    _rtc_bss_start = ABSOLUTE(.);
+    *rtc_wake_stub*.*(.bss .bss.*)
+    *rtc_wake_stub*.*(COMMON)
+
+    *(.rtc.bss)
+
+    _rtc_bss_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /**
+   * This section holds data that should not be initialized at power up
+   * and will be retained during deep sleep.
+   * User data marked with RTC_NOINIT_ATTR will be placed
+   * into this section. See the file "esp_attr.h" for more information.
+	 * The memory location of the data is dependent on CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
+   */
+  .rtc_noinit (NOLOAD):
+  {
+    . = ALIGN(4);
+    _rtc_noinit_start = ABSOLUTE(.);
+    *(.rtc_noinit .rtc_noinit.*)
+    . = ALIGN(4) ;
+    _rtc_noinit_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /**
+   * This section located in RTC SLOW Memory area.
+   * It holds data marked with RTC_SLOW_ATTR attribute.
+   * See the file "esp_attr.h" for more information.
+   */
+  .rtc.force_slow :
+  {
+    . = ALIGN(4);
+    _rtc_force_slow_start = ABSOLUTE(.);
+    *(.rtc.force_slow .rtc.force_slow.*)
+    . = ALIGN(4) ;
+    _rtc_force_slow_end = ABSOLUTE(.);
+  } > rtc_slow_seg
+
+  /* Get size of rtc slow data based on rtc_data_location alias */
+  _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
+                        ? (_rtc_force_slow_end - _rtc_data_start)
+                        : (_rtc_force_slow_end - _rtc_force_slow_start);
+
+  _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
+                        ? (_rtc_force_fast_end - _rtc_fast_start)
+                        : (_rtc_noinit_end - _rtc_fast_start);
+
+  ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
+          "RTC_SLOW segment data does not fit.")
+
+  ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
+          "RTC_FAST segment data does not fit.")
+
+  /* Send .iram0 code to iram */
+  .iram0.vectors :
+  {
+    _iram_start = ABSOLUTE(.);
+    /* Vectors go to IRAM */
+    _vector_table = ABSOLUTE(.);
+    . = 0x0;
+    KEEP(*(.WindowVectors.text));
+    . = 0x180;
+    KEEP(*(.Level2InterruptVector.text));
+    . = 0x1c0;
+    KEEP(*(.Level3InterruptVector.text));
+    . = 0x200;
+    KEEP(*(.Level4InterruptVector.text));
+    . = 0x240;
+    KEEP(*(.Level5InterruptVector.text));
+    . = 0x280;
+    KEEP(*(.DebugExceptionVector.text));
+    . = 0x2c0;
+    KEEP(*(.NMIExceptionVector.text));
+    . = 0x300;
+    KEEP(*(.KernelExceptionVector.text));
+    . = 0x340;
+    KEEP(*(.UserExceptionVector.text));
+    . = 0x3C0;
+    KEEP(*(.DoubleExceptionVector.text));
+    . = 0x400;
+    _invalid_pc_placeholder = ABSOLUTE(.);
+    *(.*Vector.literal)
+
+    *(.UserEnter.literal);
+    *(.UserEnter.text);
+    . = ALIGN (16);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    _init_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.text :
+  {
+    /* Code marked as running out of IRAM */
+    _iram_text_start = ABSOLUTE(.);
+
+    *(.iram1 .iram1.*)
+    *libapp_trace.a:app_trace.*(.literal .literal.* .text .text.*)
+    *libapp_trace.a:app_trace_util.*(.literal .literal.* .text .text.*)
+    *libesp_event.a:default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
+    *libesp_event.a:esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
+    *libesp_hw_support.a:cpu_util.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_clk.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
+    *libesp_hw_support.a:rtc_pm.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_sleep.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_time.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_wdt.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:spiram_psram.*(.literal .literal.* .text .text.*)
+    *libesp_ringbuf.a:(.literal .literal.* .text .text.*)
+    *libesp_system.a:esp_err.*(.literal .literal.* .text .text.*)
+    *libesp_system.a:esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
+    *libesp_system.a:ubsan.*(.literal .literal.* .text .text.*)
+    *libfreertos.a:(EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal.* EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text.*)
+    *libfreertos.a:port.*(.literal.pxPortInitialiseStack .literal.unlikely.vPortEndScheduler .literal.vApplicationStackOverflowHook .literal.vPortAssertIfInISR .literal.vPortExitCritical .literal.vPortExitCriticalCompliance .literal.vPortReleaseTaskMPUSettings .literal.vPortSetStackWatchpoint .literal.vPortYieldOtherCore .literal.xPortEnterCriticalTimeout .literal.xPortEnterCriticalTimeoutCompliance .literal.xPortInIsrContext .literal.xPortStartScheduler .text .text.pxPortInitialiseStack .text.unlikely.vPortEndScheduler .text.vApplicationStackOverflowHook .text.vPortAssertIfInISR .text.vPortExitCritical .text.vPortExitCriticalCompliance .text.vPortReleaseTaskMPUSettings .text.vPortSetStackWatchpoint .text.vPortStoreTaskMPUSettings .text.vPortYieldOtherCore .text.xPortEnterCriticalTimeout .text.xPortEnterCriticalTimeoutCompliance .text.xPortGetTickRateHz .text.xPortInIsrContext .text.xPortStartScheduler)
+    *libfreertos.a:port_common.*(.literal.esp_startup_start_app_common .literal.vApplicationGetIdleTaskMemory .literal.vApplicationGetTimerTaskMemory .literal.xPortCheckValidTCBMem .literal.xPortcheckValidStackMem .text .text.esp_startup_start_app_common .text.vApplicationGetIdleTaskMemory .text.vApplicationGetTimerTaskMemory .text.xPortCheckValidTCBMem .text.xPortcheckValidStackMem)
+    *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
+    *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
+    *libgcov.a:(.literal .literal.* .text .text.*)
+    *libhal.a:cpu_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:i2c_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:ledc_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:soc_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:systimer_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:wdt_hal_iram.*(.literal .literal.* .text .text.*)
+    *libheap.a:heap_tlsf.*(.literal .literal.* .text .text.*)
+    *libheap.a:multi_heap.*(.literal .literal.* .text .text.*)
+    *libheap.a:multi_heap_poisoning.*(.literal .literal.* .text .text.*)
+    *liblog.a:log.*(.literal.esp_log_write .text.esp_log_write)
+    *liblog.a:log_freertos.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_lock .text.esp_log_impl_lock)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_lock_timeout .text.esp_log_impl_lock_timeout)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_unlock .text.esp_log_impl_unlock)
+    *liblog.a:log_freertos.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
+    *libnewlib.a:abort.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:assert.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:heap.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:stdatomic.*(.literal .literal.* .text .text.*)
+    *librtc.a:(.literal .literal.* .text .text.*)
+    *libsoc.a:lldesc.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_oct_flash_init.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_timing_tuning.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_timing_config.*(.literal .literal.* .text .text.*)
+    *libxt_hal.a:(.literal .literal.* .text .text.*)
+    *libxtensa.a:eri.*(.literal .literal.* .text .text.*)
+    *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*)
+
+  } > iram0_0_seg
+
+  /**
+   * This section is required to skip .iram0.text area because iram0_0_seg and
+   * dram0_0_seg reflect the same address space on different buses.
+   */
+  .dram0.dummy (NOLOAD):
+  {
+    . = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0);
+  } > dram0_0_seg
+
+  .dram0.data :
+  {
+    _data_start = ABSOLUTE(.);
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    *(.jcr)
+
+    _esp_system_init_fn_array_start = ABSOLUTE(.);
+    KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*)))
+    _esp_system_init_fn_array_end = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*)
+    *(.dram1 .dram1.*)
+    _coredump_dram_start = ABSOLUTE(.);
+    *(.dram2.coredump .dram2.coredump.*)
+    _coredump_dram_end = ABSOLUTE(.);
+    *libapp_trace.a:app_trace.*(.rodata .rodata.*)
+    *libapp_trace.a:app_trace_util.*(.rodata .rodata.*)
+    _bt_data_start = ABSOLUTE(.);
+    *libbt.a:(.data .data.*)
+    . = ALIGN(4);
+    _bt_data_end = ABSOLUTE(.);
+    _btdm_data_start = ABSOLUTE(.);
+    *libbtdm_app.a:(.data .data.*)
+    . = ALIGN(4);
+    _btdm_data_end = ABSOLUTE(.);
+    *libesp_hw_support.a:rtc_clk.*(.rodata .rodata.*)
+    *libesp_hw_support.a:spiram_psram.*(.rodata .rodata.*)
+    *libesp_system.a:esp_err.*(.rodata .rodata.*)
+    *libesp_system.a:ubsan.*(.rodata .rodata.*)
+    *libgcc.a:_divsf3.*(.rodata .rodata.*)
+    *libgcov.a:(.rodata .rodata.*)
+    *libhal.a:cpu_hal.*(.rodata .rodata.*)
+    *libhal.a:i2c_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:ledc_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:soc_hal.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_hal_gpspi.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_slave_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:systimer_hal.*(.rodata .rodata.*)
+    *libhal.a:wdt_hal_iram.*(.rodata .rodata.*)
+    *libheap.a:heap_tlsf.*(.rodata .rodata.*)
+    *libheap.a:multi_heap.*(.rodata .rodata.*)
+    *libheap.a:multi_heap_poisoning.*(.rodata .rodata.*)
+    *libnewlib.a:abort.*(.rodata .rodata.*)
+    *libnewlib.a:assert.*(.rodata .rodata.*)
+    *libnewlib.a:heap.*(.rodata .rodata.*)
+    *libnewlib.a:stdatomic.*(.rodata .rodata.*)
+    _nimble_data_start = ABSOLUTE(.);
+    *libnimble.a:(.data .data.*)
+    . = ALIGN(4);
+    _nimble_data_end = ABSOLUTE(.);
+    *libphy.a:(.rodata .rodata.*)
+    *libsoc.a:lldesc.*(.rodata .rodata.*)
+    *libspi_flash.a:memspi_host_driver.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_boya.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_gd.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_mxic.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_mxic_opi.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_oct_flash_init.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_rom_patch.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_timing_tuning.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_timing_config.*(.rodata .rodata.*)
+
+    _data_end = ABSOLUTE(.);
+    . = ALIGN(4);
+  } > dram0_0_seg
+
+  /**
+   * This section holds data that should not be initialized at power up.
+   * The section located in Internal SRAM memory region. The macro _NOINIT
+   * can be used as attribute to place data into this section.
+   * See the "esp_attr.h" file for more information.
+   */
+  .noinit (NOLOAD):
+  {
+    . = ALIGN(4);
+    _noinit_start = ABSOLUTE(.);
+    *(.noinit .noinit.*)
+    . = ALIGN(4) ;
+    _noinit_end = ABSOLUTE(.);
+  } > dram0_0_seg
+
+  /* Shared RAM */
+  .dram0.bss (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.ext_ram.bss*)
+
+    *(.bss .bss.*)
+    *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
+    *(.ext_ram.bss .ext_ram.bss.*)
+    *(COMMON)
+    _bt_bss_start = ABSOLUTE(.);
+    *libbt.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _bt_bss_end = ABSOLUTE(.);
+    _btdm_bss_start = ABSOLUTE(.);
+    *libbtdm_app.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _btdm_bss_end = ABSOLUTE(.);
+    _nimble_bss_start = ABSOLUTE(.);
+    *libnimble.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _nimble_bss_end = ABSOLUTE(.);
+
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.share.mem)
+    *(.gnu.linkonce.b.*)
+
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+  } > dram0_0_seg
+
+  ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")
+
+  .flash.text :
+  {
+    _stext = .;
+    _instruction_reserved_start = ABSOLUTE(.);
+    _text_start = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*)
+    *(.wifi0iram .wifi0iram.*)
+    *(.wifiorslpiram .wifiorslpiram.*)
+    *(.wifirxiram .wifirxiram.*)
+    *(.wifislpiram .wifislpiram.*)
+    *(.wifislprxiram .wifislprxiram.*)
+    *libesp_event.a:default_event_loop.*(.literal.esp_event_handler_instance_register .literal.esp_event_handler_instance_unregister .literal.esp_event_handler_register .literal.esp_event_handler_unregister .literal.esp_event_loop_create_default .literal.esp_event_loop_delete_default .literal.esp_event_post .literal.esp_event_send_to_default_loop .text .text.esp_event_handler_instance_register .text.esp_event_handler_instance_unregister .text.esp_event_handler_register .text.esp_event_handler_unregister .text.esp_event_loop_create_default .text.esp_event_loop_delete_default .text.esp_event_post .text.esp_event_send_to_default_loop)
+    *libesp_event.a:esp_event.*(.literal.base_node_add_handler .literal.esp_event_handler_instance_register_with .literal.esp_event_handler_instance_unregister_with .literal.esp_event_handler_register_with .literal.esp_event_handler_register_with_internal .literal.esp_event_handler_unregister_with .literal.esp_event_handler_unregister_with_internal .literal.esp_event_loop_create .literal.esp_event_loop_delete .literal.esp_event_loop_run .literal.esp_event_loop_run_task .literal.esp_event_post_to .literal.handler_instances_add .literal.handler_instances_remove .literal.handler_instances_remove_all$isra$1 .literal.loop_node_add_handler .text .text.base_node_add_handler .text.esp_event_dump .text.esp_event_handler_instance_register_with .text.esp_event_handler_instance_unregister_with .text.esp_event_handler_register_with .text.esp_event_handler_register_with_internal .text.esp_event_handler_unregister_with .text.esp_event_handler_unregister_with_internal .text.esp_event_loop_create .text.esp_event_loop_delete .text.esp_event_loop_run .text.esp_event_loop_run_task .text.esp_event_post_to .text.handler_instances_add .text.handler_instances_remove .text.handler_instances_remove_all$isra$1 .text.loop_node_add_handler)
+    *libesp_hw_support.a:rtc_init.*(.literal.rtc_init .literal.rtc_vddsdio_get_config .text .text.rtc_init .text.rtc_vddsdio_get_config)
+    *libesp_system.a:esp_system.*(.literal.esp_get_free_heap_size .literal.esp_get_free_internal_heap_size .literal.esp_get_idf_version .literal.esp_get_minimum_free_heap_size .literal.esp_register_shutdown_handler .literal.esp_unregister_shutdown_handler .text .text.esp_get_free_heap_size .text.esp_get_free_internal_heap_size .text.esp_get_idf_version .text.esp_get_minimum_free_heap_size .text.esp_register_shutdown_handler .text.esp_unregister_shutdown_handler)
+    *libfreertos.a:port.*(.literal.esp_startup_start_app .text.esp_startup_start_app)
+    *libfreertos.a:port.*(.literal.esp_startup_start_app_other_cores .text.esp_startup_start_app_other_cores)
+    *libfreertos.a:port_common.*(.literal.main_task .text.main_task)
+    *liblog.a:log.*(.literal.esp_log_level_get .literal.esp_log_level_set .literal.esp_log_set_vprintf .literal.esp_log_writev .literal.heap_bubble_down .literal.s_log_level_get_and_unlock .text .text.esp_log_level_get .text.esp_log_level_set .text.esp_log_set_vprintf .text.esp_log_writev .text.heap_bubble_down .text.s_log_level_get_and_unlock)
+    *liblog.a:log_freertos.*(.literal.esp_log_system_timestamp .text .text.esp_log_system_timestamp)
+
+    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+
+    /** CPU will try to prefetch up to 16 bytes of
+      * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
+      * safe access to up to 16 bytes after the last real instruction, add
+      * dummy bytes to ensure this
+      */
+    . += _esp_flash_mmap_prefetch_pad_size;
+
+    _text_end = ABSOLUTE(.);
+    _instruction_reserved_end = ABSOLUTE(.);
+    _etext = .;
+
+    /**
+     * Similar to _iram_start, this symbol goes here so it is
+     * resolved by addr2line in preference to the first symbol in
+     * the flash.text segment.
+     */
+    _flash_cache_start = ABSOLUTE(0);
+  } > default_code_seg
+
+  /**
+   * This dummy section represents the .flash.text section but in default_rodata_seg.
+   * Thus, it must have its alignement and (at least) its size.
+   */
+  .flash_rodata_dummy (NOLOAD):
+  {
+    _flash_rodata_dummy_start = .;
+    /* Start at the same alignement constraint than .flash.text */
+    . = ALIGN(ALIGNOF(.flash.text));
+    /* Create an empty gap as big as .flash.text section */
+    . = . + SIZEOF(.flash.text);
+    /* Prepare the alignement of the section above. Few bytes (0x20) must be
+     * added for the mapping header. */
+    . = ALIGN(0x10000) + 0x20;
+    _rodata_reserved_start = .;
+  } > default_rodata_seg
+
+  .flash.appdesc : ALIGN(0x10)
+  {
+    _rodata_start = ABSOLUTE(.);
+
+    *(.rodata_desc .rodata_desc.*)               /* Should be the first.  App version info.        DO NOT PUT ANYTHING BEFORE IT! */
+    *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
+
+    /* Create an empty gap within this section. Thanks to this, the end of this
+     * section will match .flah.rodata's begin address. Thus, both sections
+     * will be merged when creating the final bin image. */
+    . = ALIGN(ALIGNOF(.flash.rodata));
+  } >default_rodata_seg
+
+  .flash.rodata : ALIGN(0x10)
+  {
+    _flash_rodata_start = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_oct_flash_init.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata.*)
+    *(.rodata_wlog_error .rodata_wlog_error.*)
+
+    *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table .gcc_except_table.*)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    . = (. + 3) & ~ 3;
+    __eh_frame = ABSOLUTE(.);
+    KEEP(*(.eh_frame))
+    . = (. + 7) & ~ 3;
+    /* C++ constructor and destructor tables */
+    /* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt */
+    __init_array_start = ABSOLUTE(.);
+    KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
+    __init_array_end = ABSOLUTE(.);
+    KEEP (*crtbegin.*(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /* C++ exception handlers table: */
+    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
+    soc_reserved_memory_region_start = ABSOLUTE(.);
+    KEEP (*(.reserved_memory_address))
+    soc_reserved_memory_region_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+    /* Literals are also RO data. */
+    _lit4_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.lit4.*)
+    *(.gnu.linkonce.lit4.*)
+    _lit4_end = ABSOLUTE(.);
+    . = ALIGN(4);
+    _thread_local_start = ABSOLUTE(.);
+    *(.tdata)
+    *(.tdata.*)
+    *(.tbss)
+    *(.tbss.*)
+    _thread_local_end = ABSOLUTE(.);
+    _rodata_reserved_end = ABSOLUTE(.);
+    . = ALIGN(4);
+  } > default_rodata_seg
+
+  _flash_rodata_align = ALIGNOF(.flash.rodata);
+
+  .flash.rodata_noload (NOLOAD) :
+  {
+    . = ALIGN (4);
+    *(.rodata_wlog_debug .rodata_wlog_debug.*)
+    *(.rodata_wlog_info .rodata_wlog_info.*)
+    *(.rodata_wlog_verbose .rodata_wlog_verbose.*)
+    *(.rodata_wlog_warning .rodata_wlog_warning.*)
+  } > default_rodata_seg
+
+  /* Marks the end of IRAM code segment */
+  .iram0.text_end (NOLOAD) :
+  {
+    /* ESP32-S3 memprot requires 16B padding for possible CPU prefetch and 256B alignment for PMS split lines */
+    . += _esp_memprot_prefetch_pad_size;
+    . = ALIGN(_esp_memprot_align_size);
+    /* iram_end_test section exists for use by memprot unit tests only */
+    *(.iram_end_test)
+    _iram_text_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.data :
+  {
+    . = ALIGN(4);
+    _iram_data_start = ABSOLUTE(.);
+
+    *(.iram.data .iram.data.*)
+    _coredump_iram_start = ABSOLUTE(.);
+    *(.iram2.coredump .iram2.coredump.*)
+    _coredump_iram_end = ABSOLUTE(.);
+
+    _iram_data_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.bss (NOLOAD) :
+  {
+    . = ALIGN(4);
+    _iram_bss_start = ABSOLUTE(.);
+
+    *(.iram.bss .iram.bss.*)
+
+    _iram_bss_end = ABSOLUTE(.);
+    . = ALIGN(4);
+    _iram_end = ABSOLUTE(.);
+   } > iram0_0_seg
+
+  /* Marks the end of data, bss and possibly rodata  */
+  .dram0.heap_start (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _heap_start = ABSOLUTE(.);
+  } > dram0_0_seg
+}
+
+ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
+          "IRAM0 segment data does not fit.")
+
+ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
+          "DRAM segment data does not fit.")
diff --git a/tools/sdk/esp32s3/qspi_opi/include/sdkconfig.h b/tools/sdk/esp32s3/qspi_opi/include/sdkconfig.h
new file mode 100644
index 00000000000..4be92f58374
--- /dev/null
+++ b/tools/sdk/esp32s3/qspi_opi/include/sdkconfig.h
@@ -0,0 +1,994 @@
+/*
+ * Automatically generated file. DO NOT EDIT.
+ * Espressif IoT Development Framework (ESP-IDF) Configuration Header
+ */
+#pragma once
+#define CONFIG_IDF_CMAKE 1
+#define CONFIG_IDF_TARGET_ARCH_XTENSA 1
+#define CONFIG_IDF_TARGET "esp32s3"
+#define CONFIG_IDF_TARGET_ESP32S3 1
+#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0009
+#define CONFIG_SDK_TOOLPREFIX "xtensa-esp32s3-elf-"
+#define CONFIG_APP_BUILD_TYPE_APP_2NDBOOT 1
+#define CONFIG_APP_BUILD_GENERATE_BINARIES 1
+#define CONFIG_APP_BUILD_BOOTLOADER 1
+#define CONFIG_APP_BUILD_USE_FLASH_SECTIONS 1
+#define CONFIG_APP_COMPILE_TIME_DATE 1
+#define CONFIG_APP_RETRIEVE_LEN_ELF_SHA 16
+#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0
+#define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
+#define CONFIG_BOOTLOADER_LOG_LEVEL_NONE 1
+#define CONFIG_BOOTLOADER_LOG_LEVEL 0
+#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
+#define CONFIG_BOOTLOADER_WDT_ENABLE 1
+#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
+#define CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP 1
+#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x10
+#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
+#define CONFIG_SECURE_BOOT_SUPPORTS_RSA 1
+#define CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE 1
+#define CONFIG_BOOT_ROM_LOG_ALWAYS_ON 1
+#define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
+#define CONFIG_ESPTOOLPY_FLASHMODE_QIO 1
+#define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
+#define CONFIG_ESPTOOLPY_FLASHMODE "dio"
+#define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1
+#define CONFIG_ESPTOOLPY_FLASHFREQ "80m"
+#define CONFIG_ESPTOOLPY_FLASHSIZE_4MB 1
+#define CONFIG_ESPTOOLPY_FLASHSIZE "4MB"
+#define CONFIG_ESPTOOLPY_FLASHSIZE_DETECT 1
+#define CONFIG_ESPTOOLPY_BEFORE_RESET 1
+#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
+#define CONFIG_ESPTOOLPY_AFTER_RESET 1
+#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B 1
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL 115200
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD 115200
+#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
+#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
+#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
+#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
+#define CONFIG_PARTITION_TABLE_MD5 1
+#define CONFIG_LIB_BUILDER_FLASHMODE "qio"
+#define CONFIG_LIB_BUILDER_FLASHFREQ "80m"
+#define CONFIG_ESP_RMAKER_ASSISTED_CLAIM 1
+#define CONFIG_ESP_RMAKER_CLAIM_TYPE 2
+#define CONFIG_ESP_RMAKER_MQTT_HOST "a1p72mufdu6064-ats.iot.us-east-1.amazonaws.com"
+#define CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE 1024
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0 1
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM 0
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH 1
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD 0
+#define CONFIG_ESP_RMAKER_OTA_HTTP_RX_BUFFER_SIZE 1024
+#define CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES 10
+#define CONFIG_ESP_RMAKER_SCENES_MAX_SCENES 10
+#define CONFIG_ENABLE_ARDUINO_DEPENDS 1
+#define CONFIG_AUTOSTART_ARDUINO 1
+#define CONFIG_ARDUINO_RUN_CORE1 1
+#define CONFIG_ARDUINO_RUNNING_CORE 1
+#define CONFIG_ARDUINO_LOOP_STACK_SIZE 8192
+#define CONFIG_ARDUINO_EVENT_RUN_CORE1 1
+#define CONFIG_ARDUINO_EVENT_RUNNING_CORE 1
+#define CONFIG_ARDUINO_UDP_RUN_CORE0 1
+#define CONFIG_ARDUINO_UDP_TASK_PRIORITY 3
+#define CONFIG_ARDUINO_UDP_RUNNING_CORE 0
+#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR 1
+#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL 1
+#define CONFIG_ARDUHAL_ESP_LOG 1
+#define CONFIG_ARDUHAL_PARTITION_SCHEME_DEFAULT 1
+#define CONFIG_ARDUHAL_PARTITION_SCHEME "default"
+#define CONFIG_TINYUSB_ENABLED 1
+#define CONFIG_TINYUSB_CDC_ENABLED 1
+#define CONFIG_TINYUSB_DESC_CDC_STRING "Espressif CDC Device"
+#define CONFIG_TINYUSB_CDC_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_CDC_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_MSC_ENABLED 1
+#define CONFIG_TINYUSB_DESC_MSC_STRING "Espressif MSC Device"
+#define CONFIG_TINYUSB_MSC_BUFSIZE 4096
+#define CONFIG_TINYUSB_HID_ENABLED 1
+#define CONFIG_TINYUSB_DESC_HID_STRING "Espressif HID Device"
+#define CONFIG_TINYUSB_HID_BUFSIZE 64
+#define CONFIG_TINYUSB_MIDI_ENABLED 1
+#define CONFIG_TINYUSB_DESC_MIDI_STRING "Espressif MIDI Device"
+#define CONFIG_TINYUSB_MIDI_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_MIDI_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_VIDEO_ENABLED 1
+#define CONFIG_TINYUSB_DESC_VIDEO_STRING "Espressif VIDEO Device"
+#define CONFIG_TINYUSB_VIDEO_STREAMING_BUFSIZE 64
+#define CONFIG_TINYUSB_VIDEO_STREAMING_IFS 1
+#define CONFIG_TINYUSB_DFU_RT_ENABLED 1
+#define CONFIG_TINYUSB_DESC_DFU_RT_STRING "Espressif DFU_RT Device"
+#define CONFIG_TINYUSB_VENDOR_ENABLED 1
+#define CONFIG_TINYUSB_DESC_VENDOR_STRING "Espressif VENDOR Device"
+#define CONFIG_TINYUSB_VENDOR_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_VENDOR_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_DEBUG_LEVEL 0
+#define CONFIG_MODEL_IN_SPIFFS 1
+#define CONFIG_USE_WAKENET 1
+#define CONFIG_SR_WN_MODEL_WN8_QUANT 1
+#define CONFIG_SR_WN_WN8_HIESP 1
+#define CONFIG_USE_MULTINET 1
+#define CONFIG_SR_MN_ENGLISH 1
+#define CONFIG_SR_MN_EN_MULTINET5_SINGLE_RECOGNITION_QUANT8 1
+#define CONFIG_EN_SPEECH_COMMAND_ID0 "TfL Mm c qbK"
+#define CONFIG_EN_SPEECH_COMMAND_ID1 "Sgl c Sel"
+#define CONFIG_EN_SPEECH_COMMAND_ID2 "PLd NoZ paNcL"
+#define CONFIG_EN_SPEECH_COMMAND_ID3 "TkN nN Mi StNDBnKS"
+#define CONFIG_EN_SPEECH_COMMAND_ID4 "TkN eF Mi StNDBnKS"
+#define CONFIG_EN_SPEECH_COMMAND_ID5 "hicST VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID6 "LbcST VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID7 "gNKRmS jc VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID8 "DgKRmS jc VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID9 "TkN nN jc TmVm"
+#define CONFIG_EN_SPEECH_COMMAND_ID10 "TkN eF jc TmVm"
+#define CONFIG_EN_SPEECH_COMMAND_ID11 "MdK Mm c Tm"
+#define CONFIG_EN_SPEECH_COMMAND_ID12 "MdK Mm c KnFm"
+#define CONFIG_EN_SPEECH_COMMAND_ID13 "TkN nN jc LiT"
+#define CONFIG_EN_SPEECH_COMMAND_ID14 "TkN eF jc LiT"
+#define CONFIG_EN_SPEECH_COMMAND_ID15 "pdNq jc KcLk To RfD"
+#define CONFIG_EN_SPEECH_COMMAND_ID16 "pdNq jc KcLk To GRmN"
+#define CONFIG_EN_SPEECH_COMMAND_ID17 "TkN nN eL jc LiTS"
+#define CONFIG_EN_SPEECH_COMMAND_ID18 "TkN eF eL jc LiTS"
+#define CONFIG_EN_SPEECH_COMMAND_ID19 "TkN nN jc fR KcNDgscNk"
+#define CONFIG_EN_SPEECH_COMMAND_ID20 "TkN eF jc fR KcNDgscNk"
+#define CONFIG_EN_SPEECH_COMMAND_ID21 "SfT jc TfMPRcpk To SgKSTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID22 "SfT jc TfMPRcpk To SfVcNTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID23 "SfT jc TfMPRcpk To dTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID24 "SfT jc TfMPRcpk To NiNTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID25 "SfT jc TfMPRcpk To TWfNTm DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID26 "SfT jc TfMPRcpk To TWfNTm WcN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID27 "SfT jc TfMPRcpk To TWfNTm To DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID28 "SfT jc TfMPRcpk To TWfNTm vRm DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID29 "SfT jc TfMPRcpk To TWfNTm FeR DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID30 "SfT jc TfMPRcpk To TWfNTm FiV DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID31 "SfT jc TfMPRcpk To TWfNTm SgKS DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID32 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID33 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID34 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID35 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID36 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID37 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID38 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID39 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID40 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID41 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID42 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID43 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID44 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID45 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID46 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID47 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID48 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID49 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID50 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID51 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID52 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID53 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID54 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID55 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID56 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID57 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID58 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID59 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID60 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID61 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID62 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID63 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID64 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID65 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID66 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID67 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID68 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID69 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID70 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID71 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID72 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID73 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID74 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID75 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID76 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID77 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID78 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID79 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID80 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID81 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID82 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID83 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID84 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID85 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID86 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID87 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID88 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID89 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID90 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID91 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID92 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID93 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID94 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID95 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID96 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID97 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID98 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID99 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID100 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID101 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID102 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID103 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID104 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID105 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID106 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID107 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID108 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID109 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID110 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID111 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID112 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID113 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID114 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID115 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID116 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID117 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID118 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID119 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID120 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID121 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID122 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID123 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID124 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID125 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID126 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID127 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID128 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID129 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID130 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID131 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID132 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID133 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID134 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID135 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID136 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID137 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID138 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID139 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID140 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID141 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID142 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID143 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID144 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID145 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID146 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID147 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID148 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID149 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID150 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID151 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID152 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID153 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID154 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID155 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID156 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID157 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID158 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID159 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID160 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID161 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID162 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID163 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID164 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID165 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID166 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID167 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID168 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID169 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID170 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID171 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID172 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID173 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID174 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID175 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID176 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID177 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID178 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID179 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID180 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID181 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID182 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID183 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID184 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID185 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID186 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID187 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID188 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID189 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID190 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID191 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID192 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID193 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID194 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID195 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID196 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID197 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID198 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID199 ""
+#define CONFIG_COMPILER_OPTIMIZATION_SIZE 1
+#define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
+#define CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL 2
+#define CONFIG_COMPILER_HIDE_PATHS_MACROS 1
+#define CONFIG_COMPILER_CXX_EXCEPTIONS 1
+#define CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE 0
+#define CONFIG_COMPILER_STACK_CHECK_MODE_NORM 1
+#define CONFIG_COMPILER_STACK_CHECK 1
+#define CONFIG_COMPILER_WARN_WRITE_STRINGS 1
+#define CONFIG_APPTRACE_DEST_NONE 1
+#define CONFIG_APPTRACE_LOCK_ENABLE 1
+#define CONFIG_BT_ENABLED 1
+#define CONFIG_BT_SOC_SUPPORT_5_0 1
+#define CONFIG_BT_CTRL_MODE_EFF 1
+#define CONFIG_BT_CTRL_BLE_MAX_ACT 10
+#define CONFIG_BT_CTRL_BLE_MAX_ACT_EFF 10
+#define CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB 0
+#define CONFIG_BT_CTRL_PINNED_TO_CORE_0 1
+#define CONFIG_BT_CTRL_PINNED_TO_CORE 0
+#define CONFIG_BT_CTRL_HCI_MODE_VHCI 1
+#define CONFIG_BT_CTRL_HCI_TL 1
+#define CONFIG_BT_CTRL_ADV_DUP_FILT_MAX 30
+#define CONFIG_BT_CTRL_HW_CCA_VAL 20
+#define CONFIG_BT_CTRL_HW_CCA_EFF 0
+#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG 1
+#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF 0
+#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0 1
+#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF 0
+#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0 1
+#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF 0
+#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P3 1
+#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF 10
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM 100
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD 20
+#define CONFIG_BT_CTRL_BLE_SCAN_DUPL 1
+#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DEVICE 1
+#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE 0
+#define CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE 100
+#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS 1
+#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF 0
+#define CONFIG_BT_CTRL_SLEEP_MODE_EFF 0
+#define CONFIG_BT_CTRL_SLEEP_CLOCK_EFF 0
+#define CONFIG_BT_CTRL_HCI_TL_EFF 1
+#define CONFIG_BT_BLUEDROID_ENABLED 1
+#define CONFIG_BT_BTC_TASK_STACK_SIZE 3072
+#define CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0 1
+#define CONFIG_BT_BLUEDROID_PINNED_TO_CORE 0
+#define CONFIG_BT_BTU_TASK_STACK_SIZE 4096
+#define CONFIG_BT_BLE_ENABLED 1
+#define CONFIG_BT_GATTS_ENABLE 1
+#define CONFIG_BT_GATT_MAX_SR_PROFILES 8
+#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO 1
+#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE 0
+#define CONFIG_BT_GATTC_ENABLE 1
+#define CONFIG_BT_GATTC_CONNECT_RETRY_COUNT 3
+#define CONFIG_BT_BLE_SMP_ENABLE 1
+#define CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_HCI_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTM_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_SDP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_GAP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_PAN_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_A2D_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_MCA_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_HID_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_APPL_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_GATT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_SMP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTC_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_OSI_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL 2
+#define CONFIG_BT_ACL_CONNECTIONS 4
+#define CONFIG_BT_MULTI_CONNECTION_ENBALE 1
+#define CONFIG_BT_SMP_ENABLE 1
+#define CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT 30
+#define CONFIG_BT_BLE_RPA_SUPPORTED 1
+#define CONFIG_BT_BLE_50_FEATURES_SUPPORTED 1
+#define CONFIG_BT_BLE_42_FEATURES_SUPPORTED 1
+#define CONFIG_BLE_MESH 1
+#define CONFIG_BLE_MESH_HCI_5_0 1
+#define CONFIG_BLE_MESH_USE_DUPLICATE_SCAN 1
+#define CONFIG_BLE_MESH_MEM_ALLOC_MODE_INTERNAL 1
+#define CONFIG_BLE_MESH_DEINIT 1
+#define CONFIG_BLE_MESH_PROV 1
+#define CONFIG_BLE_MESH_PB_ADV 1
+#define CONFIG_BLE_MESH_PROXY 1
+#define CONFIG_BLE_MESH_NET_BUF_POOL_USAGE 1
+#define CONFIG_BLE_MESH_SUBNET_COUNT 3
+#define CONFIG_BLE_MESH_APP_KEY_COUNT 3
+#define CONFIG_BLE_MESH_MODEL_KEY_COUNT 3
+#define CONFIG_BLE_MESH_MODEL_GROUP_COUNT 3
+#define CONFIG_BLE_MESH_LABEL_COUNT 3
+#define CONFIG_BLE_MESH_CRPL 10
+#define CONFIG_BLE_MESH_MSG_CACHE_SIZE 10
+#define CONFIG_BLE_MESH_ADV_BUF_COUNT 60
+#define CONFIG_BLE_MESH_IVU_DIVIDER 4
+#define CONFIG_BLE_MESH_TX_SEG_MSG_COUNT 1
+#define CONFIG_BLE_MESH_RX_SEG_MSG_COUNT 1
+#define CONFIG_BLE_MESH_RX_SDU_MAX 384
+#define CONFIG_BLE_MESH_TX_SEG_MAX 32
+#define CONFIG_BLE_MESH_TRACE_LEVEL_WARNING 1
+#define CONFIG_BLE_MESH_STACK_TRACE_LEVEL 2
+#define CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL_WARNING 1
+#define CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL 2
+#define CONFIG_BLE_MESH_CLIENT_MSG_TIMEOUT 4000
+#define CONFIG_BLE_MESH_HEALTH_SRV 1
+#define CONFIG_BLE_MESH_GENERIC_SERVER 1
+#define CONFIG_BLE_MESH_SENSOR_SERVER 1
+#define CONFIG_BLE_MESH_TIME_SCENE_SERVER 1
+#define CONFIG_BLE_MESH_LIGHTING_SERVER 1
+#define CONFIG_COAP_MBEDTLS_PSK 1
+#define CONFIG_COAP_LOG_DEFAULT_LEVEL 0
+#define CONFIG_ADC_DISABLE_DAC 1
+#define CONFIG_EFUSE_MAX_BLK_LEN 256
+#define CONFIG_ESP_TLS_USING_MBEDTLS 1
+#define CONFIG_ESP_TLS_USE_DS_PERIPHERAL 1
+#define CONFIG_ESP_TLS_SERVER 1
+#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240 1
+#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 240
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB 1
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE 0x4000
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS 1
+#define CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS 8
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B 1
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE 32
+#define CONFIG_ESP32S3_DATA_CACHE_32KB 1
+#define CONFIG_ESP32S3_DATA_CACHE_SIZE 0x8000
+#define CONFIG_ESP32S3_DATA_CACHE_8WAYS 1
+#define CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS 8
+#define CONFIG_ESP32S3_DATA_CACHE_LINE_32B 1
+#define CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE 32
+#define CONFIG_ESP32S3_SPIRAM_SUPPORT 1
+#define CONFIG_SPIRAM_MODE_OCT 1
+#define CONFIG_SPIRAM_TYPE_AUTO 1
+#define CONFIG_SPIRAM_SIZE -1
+#define CONFIG_DEFAULT_PSRAM_CLK_IO 30
+#define CONFIG_DEFAULT_PSRAM_CS_IO 26
+#define CONFIG_SPIRAM_SPEED_80M 1
+#define CONFIG_SPIRAM 1
+#define CONFIG_SPIRAM_BOOT_INIT 1
+#define CONFIG_SPIRAM_IGNORE_NOTFOUND 1
+#define CONFIG_SPIRAM_USE_MALLOC 1
+#define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 4096
+#define CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP 1
+#define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 0
+#define CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM 0x0
+#define CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM 0
+#define CONFIG_ESP32S3_DEBUG_OCDAWARE 1
+#define CONFIG_ESP32S3_BROWNOUT_DET 1
+#define CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7 1
+#define CONFIG_ESP32S3_BROWNOUT_DET_LVL 7
+#define CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1 1
+#define CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC 1
+#define CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES 576
+#define CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY 2000
+#define CONFIG_ESP_ERR_TO_NAME_LOOKUP 1
+#define CONFIG_ETH_ENABLED 1
+#define CONFIG_ETH_USE_SPI_ETHERNET 1
+#define CONFIG_ETH_SPI_ETHERNET_DM9051 1
+#define CONFIG_ETH_SPI_ETHERNET_W5500 1
+#define CONFIG_ESP_EVENT_POST_FROM_ISR 1
+#define CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH 1
+#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 1024
+#define CONFIG_HTTPD_MAX_URI_LEN 512
+#define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
+#define CONFIG_HTTPD_PURGE_BUF_LEN 32
+#define CONFIG_HTTPD_WS_SUPPORT 1
+#define CONFIG_ESP_HTTPS_SERVER_ENABLE 1
+#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA 1
+#define CONFIG_ESP_MAC_ADDR_UNIVERSE_BT 1
+#define CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO 1
+#define CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES 2
+#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1
+#define CONFIG_RTC_CLOCK_BBPLL_POWER_ON_WITH_USB 1
+#define CONFIG_ESP_IPC_TASK_STACK_SIZE 1024
+#define CONFIG_ESP_IPC_USES_CALLERS_PRIORITY 1
+#define CONFIG_ESP_IPC_ISR_ENABLE 1
+#define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE 32
+#define CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL 120
+#define CONFIG_ESP_NETIF_TCPIP_LWIP 1
+#define CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER 1
+#define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
+#define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
+#define CONFIG_ESP_PHY_MAX_TX_POWER 20
+#define CONFIG_ESP_PHY_ENABLE_USB 1
+#define CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP 1
+#define CONFIG_PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP 1
+#define CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT 1
+#define CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK 1
+#define CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP 1
+#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
+#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2048
+#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 4096
+#define CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 1
+#define CONFIG_ESP_MAIN_TASK_AFFINITY 0x0
+#define CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE 2048
+#define CONFIG_ESP_CONSOLE_UART_DEFAULT 1
+#define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1
+#define CONFIG_ESP_CONSOLE_UART 1
+#define CONFIG_ESP_CONSOLE_MULTIPLE_UART 1
+#define CONFIG_ESP_CONSOLE_UART_NUM 0
+#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
+#define CONFIG_ESP_INT_WDT 1
+#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 1000
+#define CONFIG_ESP_INT_WDT_CHECK_CPU1 1
+#define CONFIG_ESP_TASK_WDT 1
+#define CONFIG_ESP_TASK_WDT_PANIC 1
+#define CONFIG_ESP_TASK_WDT_TIMEOUT_S 5
+#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 1
+#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
+#define CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER 1
+#define CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER 1
+#define CONFIG_ESP_TIMER_TASK_STACK_SIZE 4096
+#define CONFIG_ESP_TIMER_INTERRUPT_LEVEL 1
+#define CONFIG_ESP_TIMER_IMPL_SYSTIMER 1
+#define CONFIG_ESP32_WIFI_ENABLED 1
+#define CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE 1
+#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 8
+#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 32
+#define CONFIG_ESP32_WIFI_STATIC_TX_BUFFER 1
+#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 0
+#define CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM 8
+#define CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM 16
+#define CONFIG_ESP32_WIFI_CSI_ENABLED 1
+#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED 1
+#define CONFIG_ESP32_WIFI_TX_BA_WIN 6
+#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED 1
+#define CONFIG_ESP32_WIFI_RX_BA_WIN 16
+#define CONFIG_ESP32_WIFI_NVS_ENABLED 1
+#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 1
+#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN 752
+#define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM 32
+#define CONFIG_ESP_WIFI_FTM_ENABLE 1
+#define CONFIG_ESP_WIFI_FTM_INITIATOR_SUPPORT 1
+#define CONFIG_ESP_WIFI_FTM_RESPONDER_SUPPORT 1
+#define CONFIG_ESP_WIFI_SOFTAP_SUPPORT 1
+#define CONFIG_ESP_COREDUMP_ENABLE_TO_NONE 1
+#define CONFIG_FATFS_CODEPAGE_850 1
+#define CONFIG_FATFS_CODEPAGE 850
+#define CONFIG_FATFS_LFN_STACK 1
+#define CONFIG_FATFS_MAX_LFN 255
+#define CONFIG_FATFS_API_ENCODING_ANSI_OEM 1
+#define CONFIG_FATFS_FS_LOCK 0
+#define CONFIG_FATFS_TIMEOUT_MS 10000
+#define CONFIG_FATFS_PER_FILE_CACHE 1
+#define CONFIG_FATFS_ALLOC_PREFER_EXTRAM 1
+#define CONFIG_FMB_COMM_MODE_TCP_EN 1
+#define CONFIG_FMB_TCP_PORT_DEFAULT 502
+#define CONFIG_FMB_TCP_PORT_MAX_CONN 5
+#define CONFIG_FMB_TCP_CONNECTION_TOUT_SEC 20
+#define CONFIG_FMB_COMM_MODE_RTU_EN 1
+#define CONFIG_FMB_COMM_MODE_ASCII_EN 1
+#define CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND 150
+#define CONFIG_FMB_MASTER_DELAY_MS_CONVERT 200
+#define CONFIG_FMB_QUEUE_LENGTH 20
+#define CONFIG_FMB_PORT_TASK_STACK_SIZE 4096
+#define CONFIG_FMB_SERIAL_BUF_SIZE 256
+#define CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB 8
+#define CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS 1000
+#define CONFIG_FMB_PORT_TASK_PRIO 10
+#define CONFIG_FMB_PORT_TASK_AFFINITY_CPU0 1
+#define CONFIG_FMB_PORT_TASK_AFFINITY 0x0
+#define CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT 20
+#define CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE 20
+#define CONFIG_FMB_CONTROLLER_STACK_SIZE 4096
+#define CONFIG_FMB_EVENT_QUEUE_TIMEOUT 20
+#define CONFIG_FMB_TIMER_PORT_ENABLED 1
+#define CONFIG_FMB_TIMER_GROUP 0
+#define CONFIG_FMB_TIMER_INDEX 0
+#define CONFIG_FMB_MASTER_TIMER_GROUP 0
+#define CONFIG_FMB_MASTER_TIMER_INDEX 0
+#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
+#define CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER 1
+#define CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1 1
+#define CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER 1
+#define CONFIG_FREERTOS_HZ 1000
+#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
+#define CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK 1
+#define CONFIG_FREERTOS_INTERRUPT_BACKTRACE 1
+#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
+#define CONFIG_FREERTOS_ASSERT_FAIL_ABORT 1
+#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1024
+#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
+#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
+#define CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION 1
+#define CONFIG_FREERTOS_TIMER_TASK_PRIORITY 1
+#define CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH 2048
+#define CONFIG_FREERTOS_TIMER_QUEUE_LENGTH 10
+#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
+#define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
+#define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
+#define CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT 1
+#define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
+#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
+#define CONFIG_HEAP_POISONING_LIGHT 1
+#define CONFIG_HEAP_TRACING_OFF 1
+#define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
+#define CONFIG_LOG_DEFAULT_LEVEL 1
+#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
+#define CONFIG_LOG_MAXIMUM_LEVEL 1
+#define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
+#define CONFIG_LWIP_LOCAL_HOSTNAME "espressif"
+#define CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES 1
+#define CONFIG_LWIP_TIMERS_ONDEMAND 1
+#define CONFIG_LWIP_MAX_SOCKETS 16
+#define CONFIG_LWIP_SO_REUSE 1
+#define CONFIG_LWIP_SO_REUSE_RXTOALL 1
+#define CONFIG_LWIP_SO_RCVBUF 1
+#define CONFIG_LWIP_IP4_FRAG 1
+#define CONFIG_LWIP_IP6_FRAG 1
+#define CONFIG_LWIP_ETHARP_TRUST_IP_MAC 1
+#define CONFIG_LWIP_ESP_GRATUITOUS_ARP 1
+#define CONFIG_LWIP_GARP_TMR_INTERVAL 60
+#define CONFIG_LWIP_TCPIP_RECVMBOX_SIZE 32
+#define CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID 1
+#define CONFIG_LWIP_DHCP_RESTORE_LAST_IP 1
+#define CONFIG_LWIP_DHCP_OPTIONS_LEN 128
+#define CONFIG_LWIP_DHCPS 1
+#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
+#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
+#define CONFIG_LWIP_IPV6 1
+#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
+#define CONFIG_LWIP_NETIF_LOOPBACK 1
+#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
+#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
+#define CONFIG_LWIP_MAX_LISTENING_TCP 16
+#define CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION 1
+#define CONFIG_LWIP_TCP_MAXRTX 12
+#define CONFIG_LWIP_TCP_SYNMAXRTX 6
+#define CONFIG_LWIP_TCP_MSS 1436
+#define CONFIG_LWIP_TCP_TMR_INTERVAL 250
+#define CONFIG_LWIP_TCP_MSL 60000
+#define CONFIG_LWIP_TCP_SND_BUF_DEFAULT 5744
+#define CONFIG_LWIP_TCP_WND_DEFAULT 5744
+#define CONFIG_LWIP_TCP_RECVMBOX_SIZE 6
+#define CONFIG_LWIP_TCP_QUEUE_OOSEQ 1
+#define CONFIG_LWIP_TCP_OVERSIZE_MSS 1
+#define CONFIG_LWIP_TCP_RTO_TIME 3000
+#define CONFIG_LWIP_MAX_UDP_PCBS 16
+#define CONFIG_LWIP_UDP_RECVMBOX_SIZE 6
+#define CONFIG_LWIP_CHECKSUM_CHECK_ICMP 1
+#define CONFIG_LWIP_TCPIP_TASK_STACK_SIZE 2560
+#define CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 1
+#define CONFIG_LWIP_TCPIP_TASK_AFFINITY 0x0
+#define CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE 3
+#define CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS 5
+#define CONFIG_LWIP_ICMP 1
+#define CONFIG_LWIP_MAX_RAW_PCBS 16
+#define CONFIG_LWIP_SNTP_MAX_SERVERS 3
+#define CONFIG_LWIP_DHCP_GET_NTP_SRV 1
+#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
+#define CONFIG_LWIP_SNTP_UPDATE_DELAY 3600000
+#define CONFIG_LWIP_ESP_LWIP_ASSERT 1
+#define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
+#define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
+#define CONFIG_LWIP_HOOK_ND6_GET_GW_NONE 1
+#define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
+#define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
+#define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
+#define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
+#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
+#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
+#define CONFIG_MBEDTLS_HARDWARE_AES 1
+#define CONFIG_MBEDTLS_AES_USE_INTERRUPT 1
+#define CONFIG_MBEDTLS_HARDWARE_MPI 1
+#define CONFIG_MBEDTLS_HARDWARE_SHA 1
+#define CONFIG_MBEDTLS_ROM_MD5 1
+#define CONFIG_MBEDTLS_HAVE_TIME 1
+#define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
+#define CONFIG_MBEDTLS_SHA512_C 1
+#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
+#define CONFIG_MBEDTLS_TLS_SERVER 1
+#define CONFIG_MBEDTLS_TLS_CLIENT 1
+#define CONFIG_MBEDTLS_TLS_ENABLED 1
+#define CONFIG_MBEDTLS_PSK_MODES 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1
+#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
+#define CONFIG_MBEDTLS_SSL_PROTO_DTLS 1
+#define CONFIG_MBEDTLS_SSL_ALPN 1
+#define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
+#define CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE 1
+#define CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE 1
+#define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
+#define CONFIG_MBEDTLS_AES_C 1
+#define CONFIG_MBEDTLS_RC4_DISABLED 1
+#define CONFIG_MBEDTLS_CCM_C 1
+#define CONFIG_MBEDTLS_GCM_C 1
+#define CONFIG_MBEDTLS_PEM_PARSE_C 1
+#define CONFIG_MBEDTLS_PEM_WRITE_C 1
+#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1
+#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
+#define CONFIG_MBEDTLS_ECP_C 1
+#define CONFIG_MBEDTLS_ECDH_C 1
+#define CONFIG_MBEDTLS_ECDSA_C 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
+#define CONFIG_MDNS_MAX_SERVICES 10
+#define CONFIG_MDNS_TASK_PRIORITY 1
+#define CONFIG_MDNS_TASK_STACK_SIZE 4096
+#define CONFIG_MDNS_TASK_AFFINITY_CPU0 1
+#define CONFIG_MDNS_TASK_AFFINITY 0x0
+#define CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS 2000
+#define CONFIG_MDNS_TIMER_PERIOD_MS 100
+#define CONFIG_MDNS_MULTIPLE_INSTANCE 1
+#define CONFIG_MQTT_PROTOCOL_311 1
+#define CONFIG_MQTT_TRANSPORT_SSL 1
+#define CONFIG_MQTT_TRANSPORT_WEBSOCKET 1
+#define CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE 1
+#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
+#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
+#define CONFIG_OPENSSL_ERROR_STACK 1
+#define CONFIG_OPENSSL_ASSERT_DO_NOTHING 1
+#define CONFIG_PTHREAD_TASK_PRIO_DEFAULT 5
+#define CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT 2048
+#define CONFIG_PTHREAD_STACK_MIN 768
+#define CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY 1
+#define CONFIG_PTHREAD_TASK_CORE_DEFAULT -1
+#define CONFIG_PTHREAD_TASK_NAME_DEFAULT "pthread"
+#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
+#define CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS 1
+#define CONFIG_SPI_FLASH_YIELD_DURING_ERASE 1
+#define CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS 10
+#define CONFIG_SPI_FLASH_ERASE_YIELD_TICKS 2
+#define CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE 4096
+#define CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_GD_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_TH_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP 1
+#define CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE 1
+#define CONFIG_SPIFFS_MAX_PARTITIONS 3
+#define CONFIG_SPIFFS_CACHE 1
+#define CONFIG_SPIFFS_CACHE_WR 1
+#define CONFIG_SPIFFS_PAGE_CHECK 1
+#define CONFIG_SPIFFS_GC_MAX_RUNS 10
+#define CONFIG_SPIFFS_PAGE_SIZE 256
+#define CONFIG_SPIFFS_OBJ_NAME_LEN 32
+#define CONFIG_SPIFFS_USE_MAGIC 1
+#define CONFIG_SPIFFS_USE_MAGIC_LENGTH 1
+#define CONFIG_SPIFFS_META_LENGTH 4
+#define CONFIG_SPIFFS_USE_MTIME 1
+#define CONFIG_WS_TRANSPORT 1
+#define CONFIG_WS_BUFFER_SIZE 1024
+#define CONFIG_UNITY_ENABLE_FLOAT 1
+#define CONFIG_UNITY_ENABLE_DOUBLE 1
+#define CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER 1
+#define CONFIG_USB_OTG_SUPPORTED 1
+#define CONFIG_USB_HOST_CONTROL_TRANSFER_MAX_SIZE 256
+#define CONFIG_USB_HOST_HW_BUFFER_BIAS_BALANCED 1
+#define CONFIG_VFS_SUPPORT_IO 1
+#define CONFIG_VFS_SUPPORT_DIR 1
+#define CONFIG_VFS_SUPPORT_SELECT 1
+#define CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT 1
+#define CONFIG_VFS_SUPPORT_TERMIOS 1
+#define CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS 1
+#define CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN 128
+#define CONFIG_WL_SECTOR_SIZE_4096 1
+#define CONFIG_WL_SECTOR_SIZE 4096
+#define CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES 16
+#define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
+#define CONFIG_WPA_MBEDTLS_CRYPTO 1
+#define CONFIG_IO_GLITCH_FILTER_TIME_MS 50
+#define CONFIG_ESP_RMAKER_LIB_ESP_MQTT 1
+#define CONFIG_ESP_RMAKER_MQTT_GLUE_LIB 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT_443 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT 1
+#define CONFIG_ESP_RMAKER_MQTT_SEND_USERNAME 1
+#define CONFIG_ESP_RMAKER_MQTT_USERNAME "?Platform=APN/1 ESPIF,RAINMAKER,v1.0"
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK 4096
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_PRIORITY 5
+#define CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME "fctry"
+#define CONFIG_ESP_RMAKER_FACTORY_NAMESPACE "rmaker_creds"
+#define CONFIG_ESP_RMAKER_DEF_TIMEZONE "Asia/Shanghai"
+#define CONFIG_ESP_RMAKER_SNTP_SERVER_NAME "pool.ntp.org"
+#define CONFIG_DSP_OPTIMIZATIONS_SUPPORTED 1
+#define CONFIG_DSP_OPTIMIZED 1
+#define CONFIG_DSP_OPTIMIZATION 1
+#define CONFIG_DSP_MAX_FFT_SIZE_4096 1
+#define CONFIG_DSP_MAX_FFT_SIZE 4096
+#define CONFIG_OV7670_SUPPORT 1
+#define CONFIG_OV7725_SUPPORT 1
+#define CONFIG_NT99141_SUPPORT 1
+#define CONFIG_OV2640_SUPPORT 1
+#define CONFIG_OV3660_SUPPORT 1
+#define CONFIG_OV5640_SUPPORT 1
+#define CONFIG_GC2145_SUPPORT 1
+#define CONFIG_GC032A_SUPPORT 1
+#define CONFIG_GC0308_SUPPORT 1
+#define CONFIG_BF3005_SUPPORT 1
+#define CONFIG_BF20A6_SUPPORT 1
+#define CONFIG_SCCB_HARDWARE_I2C_PORT1 1
+#define CONFIG_SCCB_CLK_FREQ 100000
+#define CONFIG_GC_SENSOR_SUBSAMPLE_MODE 1
+#define CONFIG_CAMERA_CORE0 1
+#define CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX 32768
+#define CONFIG_LITTLEFS_MAX_PARTITIONS 3
+#define CONFIG_LITTLEFS_PAGE_SIZE 256
+#define CONFIG_LITTLEFS_OBJ_NAME_LEN 64
+#define CONFIG_LITTLEFS_READ_SIZE 128
+#define CONFIG_LITTLEFS_WRITE_SIZE 128
+#define CONFIG_LITTLEFS_LOOKAHEAD_SIZE 128
+#define CONFIG_LITTLEFS_CACHE_SIZE 512
+#define CONFIG_LITTLEFS_BLOCK_CYCLES 512
+#define CONFIG_LITTLEFS_USE_MTIME 1
+#define CONFIG_LITTLEFS_MTIME_USE_SECONDS 1
+
+/* List of deprecated options */
+#define CONFIG_A2D_TRACE_LEVEL_WARNING CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING
+#define CONFIG_ADC2_DISABLE_DAC CONFIG_ADC_DISABLE_DAC
+#define CONFIG_APPL_TRACE_LEVEL_WARNING CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING
+#define CONFIG_AVCT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING
+#define CONFIG_AVDT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING
+#define CONFIG_AVRC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING
+#define CONFIG_BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT
+#define CONFIG_BLE_SMP_ENABLE CONFIG_BT_BLE_SMP_ENABLE
+#define CONFIG_BLUEDROID_ENABLED CONFIG_BT_BLUEDROID_ENABLED
+#define CONFIG_BLUEDROID_PINNED_TO_CORE_0 CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0
+#define CONFIG_BLUFI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING
+#define CONFIG_BTC_TASK_STACK_SIZE CONFIG_BT_BTC_TASK_STACK_SIZE
+#define CONFIG_BTC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING
+#define CONFIG_BTIF_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING
+#define CONFIG_BTM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING
+#define CONFIG_BTU_TASK_STACK_SIZE CONFIG_BT_BTU_TASK_STACK_SIZE
+#define CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
+#define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
+#define CONFIG_CXX_EXCEPTIONS CONFIG_COMPILER_CXX_EXCEPTIONS
+#define CONFIG_CXX_EXCEPTIONS_EMG_POOL_SIZE CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE
+#define CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+#define CONFIG_ESP32S2_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
+#define CONFIG_ESP32_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+#define CONFIG_ESP32_APPTRACE_DEST_NONE CONFIG_APPTRACE_DEST_NONE
+#define CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY
+#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE CONFIG_ESP_COREDUMP_ENABLE_TO_NONE
+#define CONFIG_ESP32_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
+#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE
+#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER CONFIG_ESP_PHY_MAX_WIFI_TX_POWER
+#define CONFIG_ESP32_PTHREAD_STACK_MIN CONFIG_PTHREAD_STACK_MIN
+#define CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT CONFIG_PTHREAD_TASK_NAME_DEFAULT
+#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT CONFIG_PTHREAD_TASK_PRIO_DEFAULT
+#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT
+#define CONFIG_ESP_GRATUITOUS_ARP CONFIG_LWIP_ESP_GRATUITOUS_ARP
+#define CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
+#define CONFIG_FLASHMODE_QIO CONFIG_ESPTOOLPY_FLASHMODE_QIO
+#define CONFIG_GAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING
+#define CONFIG_GARP_TMR_INTERVAL CONFIG_LWIP_GARP_TMR_INTERVAL
+#define CONFIG_GATTC_ENABLE CONFIG_BT_GATTC_ENABLE
+#define CONFIG_GATTS_ENABLE CONFIG_BT_GATTS_ENABLE
+#define CONFIG_GATTS_SEND_SERVICE_CHANGE_AUTO CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO
+#define CONFIG_GATT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING
+#define CONFIG_HCI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING
+#define CONFIG_HID_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING
+#define CONFIG_INT_WDT CONFIG_ESP_INT_WDT
+#define CONFIG_INT_WDT_CHECK_CPU1 CONFIG_ESP_INT_WDT_CHECK_CPU1
+#define CONFIG_INT_WDT_TIMEOUT_MS CONFIG_ESP_INT_WDT_TIMEOUT_MS
+#define CONFIG_IPC_TASK_STACK_SIZE CONFIG_ESP_IPC_TASK_STACK_SIZE
+#define CONFIG_L2CAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING
+#define CONFIG_LOG_BOOTLOADER_LEVEL_NONE CONFIG_BOOTLOADER_LOG_LEVEL_NONE
+#define CONFIG_MAIN_TASK_STACK_SIZE CONFIG_ESP_MAIN_TASK_STACK_SIZE
+#define CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE
+#define CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT
+#define CONFIG_MB_CONTROLLER_STACK_SIZE CONFIG_FMB_CONTROLLER_STACK_SIZE
+#define CONFIG_MB_EVENT_QUEUE_TIMEOUT CONFIG_FMB_EVENT_QUEUE_TIMEOUT
+#define CONFIG_MB_MASTER_DELAY_MS_CONVERT CONFIG_FMB_MASTER_DELAY_MS_CONVERT
+#define CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND
+#define CONFIG_MB_QUEUE_LENGTH CONFIG_FMB_QUEUE_LENGTH
+#define CONFIG_MB_SERIAL_BUF_SIZE CONFIG_FMB_SERIAL_BUF_SIZE
+#define CONFIG_MB_SERIAL_TASK_PRIO CONFIG_FMB_PORT_TASK_PRIO
+#define CONFIG_MB_SERIAL_TASK_STACK_SIZE CONFIG_FMB_PORT_TASK_STACK_SIZE
+#define CONFIG_MB_TIMER_GROUP CONFIG_FMB_TIMER_GROUP
+#define CONFIG_MB_TIMER_INDEX CONFIG_FMB_TIMER_INDEX
+#define CONFIG_MB_TIMER_PORT_ENABLED CONFIG_FMB_TIMER_PORT_ENABLED
+#define CONFIG_MCA_TRACE_LEVEL_WARNING CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING
+#define CONFIG_MONITOR_BAUD_115200B CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B
+#define CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE
+#define CONFIG_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
+#define CONFIG_OSI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING
+#define CONFIG_PAN_TRACE_LEVEL_WARNING CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING
+#define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
+#define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
+#define CONFIG_RFCOMM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING
+#define CONFIG_SDP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING
+#define CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN
+#define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
+#define CONFIG_SMP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING
+#define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS
+#define CONFIG_STACK_CHECK_NORM CONFIG_COMPILER_STACK_CHECK_MODE_NORM
+#define CONFIG_SUPPORT_TERMIOS CONFIG_VFS_SUPPORT_TERMIOS
+#define CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT
+#define CONFIG_SW_COEXIST_ENABLE CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE
+#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE
+#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE
+#define CONFIG_TASK_WDT CONFIG_ESP_TASK_WDT
+#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
+#define CONFIG_TASK_WDT_PANIC CONFIG_ESP_TASK_WDT_PANIC
+#define CONFIG_TASK_WDT_TIMEOUT_S CONFIG_ESP_TASK_WDT_TIMEOUT_S
+#define CONFIG_TCPIP_RECVMBOX_SIZE CONFIG_LWIP_TCPIP_RECVMBOX_SIZE
+#define CONFIG_TCPIP_TASK_AFFINITY_CPU0 CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0
+#define CONFIG_TCPIP_TASK_STACK_SIZE CONFIG_LWIP_TCPIP_TASK_STACK_SIZE
+#define CONFIG_TCP_MAXRTX CONFIG_LWIP_TCP_MAXRTX
+#define CONFIG_TCP_MSL CONFIG_LWIP_TCP_MSL
+#define CONFIG_TCP_MSS CONFIG_LWIP_TCP_MSS
+#define CONFIG_TCP_OVERSIZE_MSS CONFIG_LWIP_TCP_OVERSIZE_MSS
+#define CONFIG_TCP_QUEUE_OOSEQ CONFIG_LWIP_TCP_QUEUE_OOSEQ
+#define CONFIG_TCP_RECVMBOX_SIZE CONFIG_LWIP_TCP_RECVMBOX_SIZE
+#define CONFIG_TCP_SND_BUF_DEFAULT CONFIG_LWIP_TCP_SND_BUF_DEFAULT
+#define CONFIG_TCP_SYNMAXRTX CONFIG_LWIP_TCP_SYNMAXRTX
+#define CONFIG_TCP_WND_DEFAULT CONFIG_LWIP_TCP_WND_DEFAULT
+#define CONFIG_TIMER_QUEUE_LENGTH CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
+#define CONFIG_TIMER_TASK_PRIORITY CONFIG_FREERTOS_TIMER_TASK_PRIORITY
+#define CONFIG_TIMER_TASK_STACK_DEPTH CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
+#define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
+#define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
+#define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
+#define CONFIG_USB_CDC_ENABLED CONFIG_TINYUSB_CDC_ENABLED
+#define CONFIG_USB_CDC_RX_BUFSIZE CONFIG_TINYUSB_CDC_RX_BUFSIZE
+#define CONFIG_USB_CDC_TX_BUFSIZE CONFIG_TINYUSB_CDC_TX_BUFSIZE
+#define CONFIG_USB_DEBUG_LEVEL CONFIG_TINYUSB_DEBUG_LEVEL
+#define CONFIG_USB_DESC_CDC_STRING CONFIG_TINYUSB_DESC_CDC_STRING
+#define CONFIG_USB_DESC_HID_STRING CONFIG_TINYUSB_DESC_HID_STRING
+#define CONFIG_USB_DESC_MSC_STRING CONFIG_TINYUSB_DESC_MSC_STRING
+#define CONFIG_USB_MSC_BUFSIZE CONFIG_TINYUSB_MSC_BUFSIZE
+#define CONFIG_USB_MSC_ENABLED CONFIG_TINYUSB_MSC_ENABLED
+#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
+#define CONFIG_ARDUINO_IDF_COMMIT "b8050b365e"
+#define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32s3/qspi_opi/libbootloader_support.a b/tools/sdk/esp32s3/qspi_opi/libbootloader_support.a
new file mode 100644
index 00000000000..2d9517b11df
Binary files /dev/null and b/tools/sdk/esp32s3/qspi_opi/libbootloader_support.a differ
diff --git a/tools/sdk/esp32s3/qspi_opi/libesp_hw_support.a b/tools/sdk/esp32s3/qspi_opi/libesp_hw_support.a
new file mode 100644
index 00000000000..8c0266c0a50
Binary files /dev/null and b/tools/sdk/esp32s3/qspi_opi/libesp_hw_support.a differ
diff --git a/tools/sdk/esp32s3/qspi_opi/libesp_system.a b/tools/sdk/esp32s3/qspi_opi/libesp_system.a
new file mode 100644
index 00000000000..1fc0762395c
Binary files /dev/null and b/tools/sdk/esp32s3/qspi_opi/libesp_system.a differ
diff --git a/tools/sdk/esp32s3/qspi_opi/libfreertos.a b/tools/sdk/esp32s3/qspi_opi/libfreertos.a
new file mode 100644
index 00000000000..753f15178b3
Binary files /dev/null and b/tools/sdk/esp32s3/qspi_opi/libfreertos.a differ
diff --git a/tools/sdk/esp32s3/qspi_opi/libspi_flash.a b/tools/sdk/esp32s3/qspi_opi/libspi_flash.a
new file mode 100644
index 00000000000..e2022328ba3
Binary files /dev/null and b/tools/sdk/esp32s3/qspi_opi/libspi_flash.a differ
diff --git a/tools/sdk/esp32s3/qspi_opi/sections.ld b/tools/sdk/esp32s3/qspi_opi/sections.ld
new file mode 100644
index 00000000000..37bd95eb26b
--- /dev/null
+++ b/tools/sdk/esp32s3/qspi_opi/sections.ld
@@ -0,0 +1,594 @@
+/* Automatically generated file; DO NOT EDIT */
+/* Espressif IoT Development Framework Linker Script */
+/* Generated from: /home/runner/work/esp32-arduino-lib-builder/esp32-arduino-lib-builder/esp-idf/components/esp_system/ld/esp32s3/sections.ld.in */
+
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Default entry point */
+ENTRY(call_start_cpu0);
+
+_diram_i_start = 0x40378000;
+
+SECTIONS
+{
+  /**
+   * RTC fast memory holds RTC wake stub code,
+   * including from any source file named rtc_wake_stub*.c
+   */
+  .rtc.text :
+  {
+    . = ALIGN(4);
+    _rtc_text_start = ABSOLUTE(.);
+    *(.rtc.entry.text)
+
+    *(.rtc.literal .rtc.text .rtc.text.*)
+
+    *rtc_wake_stub*.*(.literal .text .literal.* .text.*)
+    _rtc_text_end = ABSOLUTE(.);
+  } > rtc_iram_seg
+
+  /**
+   * This section is required to skip rtc.text area because rtc_iram_seg and
+   * rtc_data_seg are reflect the same address space on different buses.
+   */
+  .rtc.dummy :
+  {
+    _rtc_dummy_start = ABSOLUTE(.);
+    _rtc_fast_start = ABSOLUTE(.);
+    . = SIZEOF(.rtc.text);
+    _rtc_dummy_end = ABSOLUTE(.);
+  } > rtc_data_seg
+
+  /**
+   * This section located in RTC FAST Memory area.
+   * It holds data marked with RTC_FAST_ATTR attribute.
+   * See the file "esp_attr.h" for more information.
+   */
+  .rtc.force_fast :
+  {
+    . = ALIGN(4);
+    _rtc_force_fast_start = ABSOLUTE(.);
+
+    _coredump_rtc_fast_start = ABSOLUTE(.);
+    *(.rtc.fast.coredump .rtc.fast.coredump.*)
+    _coredump_rtc_fast_end = ABSOLUTE(.);
+
+    *(.rtc.force_fast .rtc.force_fast.*)
+    . = ALIGN(4) ;
+    _rtc_force_fast_end = ABSOLUTE(.);
+  } > rtc_data_seg
+
+  /**
+   * RTC data section holds RTC wake stub
+   * data/rodata, including from any source file
+   * named rtc_wake_stub*.c and the data marked with
+   * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
+   * The memory location of the data is dependent on
+   * CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
+   */
+  .rtc.data :
+  {
+    _rtc_data_start = ABSOLUTE(.);
+
+    _coredump_rtc_start = ABSOLUTE(.);
+    *(.rtc.coredump .rtc.coredump.*)
+    _coredump_rtc_end = ABSOLUTE(.);
+    *(.rtc.data .rtc.data.*)
+    *(.rtc.rodata .rtc.rodata.*)
+
+    *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
+    _rtc_data_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /* RTC bss, from any source file named rtc_wake_stub*.c */
+  .rtc.bss (NOLOAD) :
+  {
+    _rtc_bss_start = ABSOLUTE(.);
+    *rtc_wake_stub*.*(.bss .bss.*)
+    *rtc_wake_stub*.*(COMMON)
+
+    *(.rtc.bss)
+
+    _rtc_bss_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /**
+   * This section holds data that should not be initialized at power up
+   * and will be retained during deep sleep.
+   * User data marked with RTC_NOINIT_ATTR will be placed
+   * into this section. See the file "esp_attr.h" for more information.
+	 * The memory location of the data is dependent on CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
+   */
+  .rtc_noinit (NOLOAD):
+  {
+    . = ALIGN(4);
+    _rtc_noinit_start = ABSOLUTE(.);
+    *(.rtc_noinit .rtc_noinit.*)
+    . = ALIGN(4) ;
+    _rtc_noinit_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /**
+   * This section located in RTC SLOW Memory area.
+   * It holds data marked with RTC_SLOW_ATTR attribute.
+   * See the file "esp_attr.h" for more information.
+   */
+  .rtc.force_slow :
+  {
+    . = ALIGN(4);
+    _rtc_force_slow_start = ABSOLUTE(.);
+    *(.rtc.force_slow .rtc.force_slow.*)
+    . = ALIGN(4) ;
+    _rtc_force_slow_end = ABSOLUTE(.);
+  } > rtc_slow_seg
+
+  /* Get size of rtc slow data based on rtc_data_location alias */
+  _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
+                        ? (_rtc_force_slow_end - _rtc_data_start)
+                        : (_rtc_force_slow_end - _rtc_force_slow_start);
+
+  _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
+                        ? (_rtc_force_fast_end - _rtc_fast_start)
+                        : (_rtc_noinit_end - _rtc_fast_start);
+
+  ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
+          "RTC_SLOW segment data does not fit.")
+
+  ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
+          "RTC_FAST segment data does not fit.")
+
+  /* Send .iram0 code to iram */
+  .iram0.vectors :
+  {
+    _iram_start = ABSOLUTE(.);
+    /* Vectors go to IRAM */
+    _vector_table = ABSOLUTE(.);
+    . = 0x0;
+    KEEP(*(.WindowVectors.text));
+    . = 0x180;
+    KEEP(*(.Level2InterruptVector.text));
+    . = 0x1c0;
+    KEEP(*(.Level3InterruptVector.text));
+    . = 0x200;
+    KEEP(*(.Level4InterruptVector.text));
+    . = 0x240;
+    KEEP(*(.Level5InterruptVector.text));
+    . = 0x280;
+    KEEP(*(.DebugExceptionVector.text));
+    . = 0x2c0;
+    KEEP(*(.NMIExceptionVector.text));
+    . = 0x300;
+    KEEP(*(.KernelExceptionVector.text));
+    . = 0x340;
+    KEEP(*(.UserExceptionVector.text));
+    . = 0x3C0;
+    KEEP(*(.DoubleExceptionVector.text));
+    . = 0x400;
+    _invalid_pc_placeholder = ABSOLUTE(.);
+    *(.*Vector.literal)
+
+    *(.UserEnter.literal);
+    *(.UserEnter.text);
+    . = ALIGN (16);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    _init_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.text :
+  {
+    /* Code marked as running out of IRAM */
+    _iram_text_start = ABSOLUTE(.);
+
+    *(.iram1 .iram1.*)
+    *libapp_trace.a:app_trace.*(.literal .literal.* .text .text.*)
+    *libapp_trace.a:app_trace_util.*(.literal .literal.* .text .text.*)
+    *libesp_event.a:default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
+    *libesp_event.a:esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
+    *libesp_hw_support.a:cpu_util.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:opiram_psram.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_clk.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
+    *libesp_hw_support.a:rtc_pm.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_sleep.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_time.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_wdt.*(.literal .literal.* .text .text.*)
+    *libesp_ringbuf.a:(.literal .literal.* .text .text.*)
+    *libesp_system.a:esp_err.*(.literal .literal.* .text .text.*)
+    *libesp_system.a:esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
+    *libesp_system.a:ubsan.*(.literal .literal.* .text .text.*)
+    *libfreertos.a:(EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal.* EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text.*)
+    *libfreertos.a:port.*(.literal.pxPortInitialiseStack .literal.unlikely.vPortEndScheduler .literal.vApplicationStackOverflowHook .literal.vPortAssertIfInISR .literal.vPortExitCritical .literal.vPortExitCriticalCompliance .literal.vPortReleaseTaskMPUSettings .literal.vPortSetStackWatchpoint .literal.vPortYieldOtherCore .literal.xPortEnterCriticalTimeout .literal.xPortEnterCriticalTimeoutCompliance .literal.xPortInIsrContext .literal.xPortStartScheduler .text .text.pxPortInitialiseStack .text.unlikely.vPortEndScheduler .text.vApplicationStackOverflowHook .text.vPortAssertIfInISR .text.vPortExitCritical .text.vPortExitCriticalCompliance .text.vPortReleaseTaskMPUSettings .text.vPortSetStackWatchpoint .text.vPortStoreTaskMPUSettings .text.vPortYieldOtherCore .text.xPortEnterCriticalTimeout .text.xPortEnterCriticalTimeoutCompliance .text.xPortGetTickRateHz .text.xPortInIsrContext .text.xPortStartScheduler)
+    *libfreertos.a:port_common.*(.literal.esp_startup_start_app_common .literal.vApplicationGetIdleTaskMemory .literal.vApplicationGetTimerTaskMemory .literal.xPortCheckValidTCBMem .literal.xPortcheckValidStackMem .text .text.esp_startup_start_app_common .text.vApplicationGetIdleTaskMemory .text.vApplicationGetTimerTaskMemory .text.xPortCheckValidTCBMem .text.xPortcheckValidStackMem)
+    *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
+    *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
+    *libgcov.a:(.literal .literal.* .text .text.*)
+    *libhal.a:cpu_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:i2c_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:ledc_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:soc_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:systimer_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:wdt_hal_iram.*(.literal .literal.* .text .text.*)
+    *libheap.a:heap_tlsf.*(.literal .literal.* .text .text.*)
+    *libheap.a:multi_heap.*(.literal .literal.* .text .text.*)
+    *libheap.a:multi_heap_poisoning.*(.literal .literal.* .text .text.*)
+    *liblog.a:log.*(.literal.esp_log_write .text.esp_log_write)
+    *liblog.a:log_freertos.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_lock .text.esp_log_impl_lock)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_lock_timeout .text.esp_log_impl_lock_timeout)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_unlock .text.esp_log_impl_unlock)
+    *liblog.a:log_freertos.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
+    *libnewlib.a:abort.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:assert.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:heap.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:stdatomic.*(.literal .literal.* .text .text.*)
+    *librtc.a:(.literal .literal.* .text .text.*)
+    *libsoc.a:lldesc.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_timing_tuning.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_timing_config.*(.literal .literal.* .text .text.*)
+    *libxt_hal.a:(.literal .literal.* .text .text.*)
+    *libxtensa.a:eri.*(.literal .literal.* .text .text.*)
+    *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*)
+
+  } > iram0_0_seg
+
+  /**
+   * This section is required to skip .iram0.text area because iram0_0_seg and
+   * dram0_0_seg reflect the same address space on different buses.
+   */
+  .dram0.dummy (NOLOAD):
+  {
+    . = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0);
+  } > dram0_0_seg
+
+  .dram0.data :
+  {
+    _data_start = ABSOLUTE(.);
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    *(.jcr)
+
+    _esp_system_init_fn_array_start = ABSOLUTE(.);
+    KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*)))
+    _esp_system_init_fn_array_end = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*)
+    *(.dram1 .dram1.*)
+    _coredump_dram_start = ABSOLUTE(.);
+    *(.dram2.coredump .dram2.coredump.*)
+    _coredump_dram_end = ABSOLUTE(.);
+    *libapp_trace.a:app_trace.*(.rodata .rodata.*)
+    *libapp_trace.a:app_trace_util.*(.rodata .rodata.*)
+    _bt_data_start = ABSOLUTE(.);
+    *libbt.a:(.data .data.*)
+    . = ALIGN(4);
+    _bt_data_end = ABSOLUTE(.);
+    _btdm_data_start = ABSOLUTE(.);
+    *libbtdm_app.a:(.data .data.*)
+    . = ALIGN(4);
+    _btdm_data_end = ABSOLUTE(.);
+    *libesp_hw_support.a:opiram_psram.*(.rodata .rodata.*)
+    *libesp_hw_support.a:rtc_clk.*(.rodata .rodata.*)
+    *libesp_system.a:esp_err.*(.rodata .rodata.*)
+    *libesp_system.a:ubsan.*(.rodata .rodata.*)
+    *libgcc.a:_divsf3.*(.rodata .rodata.*)
+    *libgcov.a:(.rodata .rodata.*)
+    *libhal.a:cpu_hal.*(.rodata .rodata.*)
+    *libhal.a:i2c_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:ledc_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:soc_hal.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_hal_gpspi.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_slave_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:systimer_hal.*(.rodata .rodata.*)
+    *libhal.a:wdt_hal_iram.*(.rodata .rodata.*)
+    *libheap.a:heap_tlsf.*(.rodata .rodata.*)
+    *libheap.a:multi_heap.*(.rodata .rodata.*)
+    *libheap.a:multi_heap_poisoning.*(.rodata .rodata.*)
+    *libnewlib.a:abort.*(.rodata .rodata.*)
+    *libnewlib.a:assert.*(.rodata .rodata.*)
+    *libnewlib.a:heap.*(.rodata .rodata.*)
+    *libnewlib.a:stdatomic.*(.rodata .rodata.*)
+    _nimble_data_start = ABSOLUTE(.);
+    *libnimble.a:(.data .data.*)
+    . = ALIGN(4);
+    _nimble_data_end = ABSOLUTE(.);
+    *libphy.a:(.rodata .rodata.*)
+    *libsoc.a:lldesc.*(.rodata .rodata.*)
+    *libspi_flash.a:memspi_host_driver.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_boya.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_gd.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_mxic.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_mxic_opi.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_rom_patch.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_timing_tuning.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_timing_config.*(.rodata .rodata.*)
+
+    _data_end = ABSOLUTE(.);
+    . = ALIGN(4);
+  } > dram0_0_seg
+
+  /**
+   * This section holds data that should not be initialized at power up.
+   * The section located in Internal SRAM memory region. The macro _NOINIT
+   * can be used as attribute to place data into this section.
+   * See the "esp_attr.h" file for more information.
+   */
+  .noinit (NOLOAD):
+  {
+    . = ALIGN(4);
+    _noinit_start = ABSOLUTE(.);
+    *(.noinit .noinit.*)
+    . = ALIGN(4) ;
+    _noinit_end = ABSOLUTE(.);
+  } > dram0_0_seg
+
+  /* Shared RAM */
+  .dram0.bss (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.ext_ram.bss*)
+
+    *(.bss .bss.*)
+    *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
+    *(.ext_ram.bss .ext_ram.bss.*)
+    *(COMMON)
+    _bt_bss_start = ABSOLUTE(.);
+    *libbt.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _bt_bss_end = ABSOLUTE(.);
+    _btdm_bss_start = ABSOLUTE(.);
+    *libbtdm_app.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _btdm_bss_end = ABSOLUTE(.);
+    _nimble_bss_start = ABSOLUTE(.);
+    *libnimble.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _nimble_bss_end = ABSOLUTE(.);
+
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.share.mem)
+    *(.gnu.linkonce.b.*)
+
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+  } > dram0_0_seg
+
+  ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")
+
+  .flash.text :
+  {
+    _stext = .;
+    _instruction_reserved_start = ABSOLUTE(.);
+    _text_start = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*)
+    *(.wifi0iram .wifi0iram.*)
+    *(.wifiorslpiram .wifiorslpiram.*)
+    *(.wifirxiram .wifirxiram.*)
+    *(.wifislpiram .wifislpiram.*)
+    *(.wifislprxiram .wifislprxiram.*)
+    *libesp_event.a:default_event_loop.*(.literal.esp_event_handler_instance_register .literal.esp_event_handler_instance_unregister .literal.esp_event_handler_register .literal.esp_event_handler_unregister .literal.esp_event_loop_create_default .literal.esp_event_loop_delete_default .literal.esp_event_post .literal.esp_event_send_to_default_loop .text .text.esp_event_handler_instance_register .text.esp_event_handler_instance_unregister .text.esp_event_handler_register .text.esp_event_handler_unregister .text.esp_event_loop_create_default .text.esp_event_loop_delete_default .text.esp_event_post .text.esp_event_send_to_default_loop)
+    *libesp_event.a:esp_event.*(.literal.base_node_add_handler .literal.esp_event_handler_instance_register_with .literal.esp_event_handler_instance_unregister_with .literal.esp_event_handler_register_with .literal.esp_event_handler_register_with_internal .literal.esp_event_handler_unregister_with .literal.esp_event_handler_unregister_with_internal .literal.esp_event_loop_create .literal.esp_event_loop_delete .literal.esp_event_loop_run .literal.esp_event_loop_run_task .literal.esp_event_post_to .literal.handler_instances_add .literal.handler_instances_remove .literal.handler_instances_remove_all$isra$1 .literal.loop_node_add_handler .text .text.base_node_add_handler .text.esp_event_dump .text.esp_event_handler_instance_register_with .text.esp_event_handler_instance_unregister_with .text.esp_event_handler_register_with .text.esp_event_handler_register_with_internal .text.esp_event_handler_unregister_with .text.esp_event_handler_unregister_with_internal .text.esp_event_loop_create .text.esp_event_loop_delete .text.esp_event_loop_run .text.esp_event_loop_run_task .text.esp_event_post_to .text.handler_instances_add .text.handler_instances_remove .text.handler_instances_remove_all$isra$1 .text.loop_node_add_handler)
+    *libesp_hw_support.a:rtc_init.*(.literal.rtc_init .literal.rtc_vddsdio_get_config .text .text.rtc_init .text.rtc_vddsdio_get_config)
+    *libesp_system.a:esp_system.*(.literal.esp_get_free_heap_size .literal.esp_get_free_internal_heap_size .literal.esp_get_idf_version .literal.esp_get_minimum_free_heap_size .literal.esp_register_shutdown_handler .literal.esp_unregister_shutdown_handler .text .text.esp_get_free_heap_size .text.esp_get_free_internal_heap_size .text.esp_get_idf_version .text.esp_get_minimum_free_heap_size .text.esp_register_shutdown_handler .text.esp_unregister_shutdown_handler)
+    *libfreertos.a:port.*(.literal.esp_startup_start_app .text.esp_startup_start_app)
+    *libfreertos.a:port.*(.literal.esp_startup_start_app_other_cores .text.esp_startup_start_app_other_cores)
+    *libfreertos.a:port_common.*(.literal.main_task .text.main_task)
+    *liblog.a:log.*(.literal.esp_log_level_get .literal.esp_log_level_set .literal.esp_log_set_vprintf .literal.esp_log_writev .literal.heap_bubble_down .literal.s_log_level_get_and_unlock .text .text.esp_log_level_get .text.esp_log_level_set .text.esp_log_set_vprintf .text.esp_log_writev .text.heap_bubble_down .text.s_log_level_get_and_unlock)
+    *liblog.a:log_freertos.*(.literal.esp_log_system_timestamp .text .text.esp_log_system_timestamp)
+
+    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+
+    /** CPU will try to prefetch up to 16 bytes of
+      * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
+      * safe access to up to 16 bytes after the last real instruction, add
+      * dummy bytes to ensure this
+      */
+    . += _esp_flash_mmap_prefetch_pad_size;
+
+    _text_end = ABSOLUTE(.);
+    _instruction_reserved_end = ABSOLUTE(.);
+    _etext = .;
+
+    /**
+     * Similar to _iram_start, this symbol goes here so it is
+     * resolved by addr2line in preference to the first symbol in
+     * the flash.text segment.
+     */
+    _flash_cache_start = ABSOLUTE(0);
+  } > default_code_seg
+
+  /**
+   * This dummy section represents the .flash.text section but in default_rodata_seg.
+   * Thus, it must have its alignement and (at least) its size.
+   */
+  .flash_rodata_dummy (NOLOAD):
+  {
+    _flash_rodata_dummy_start = .;
+    /* Start at the same alignement constraint than .flash.text */
+    . = ALIGN(ALIGNOF(.flash.text));
+    /* Create an empty gap as big as .flash.text section */
+    . = . + SIZEOF(.flash.text);
+    /* Prepare the alignement of the section above. Few bytes (0x20) must be
+     * added for the mapping header. */
+    . = ALIGN(0x10000) + 0x20;
+    _rodata_reserved_start = .;
+  } > default_rodata_seg
+
+  .flash.appdesc : ALIGN(0x10)
+  {
+    _rodata_start = ABSOLUTE(.);
+
+    *(.rodata_desc .rodata_desc.*)               /* Should be the first.  App version info.        DO NOT PUT ANYTHING BEFORE IT! */
+    *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
+
+    /* Create an empty gap within this section. Thanks to this, the end of this
+     * section will match .flah.rodata's begin address. Thus, both sections
+     * will be merged when creating the final bin image. */
+    . = ALIGN(ALIGNOF(.flash.rodata));
+  } >default_rodata_seg
+
+  .flash.rodata : ALIGN(0x10)
+  {
+    _flash_rodata_start = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:opiram_psram.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata.*)
+    *(.rodata_wlog_error .rodata_wlog_error.*)
+
+    *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table .gcc_except_table.*)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    . = (. + 3) & ~ 3;
+    __eh_frame = ABSOLUTE(.);
+    KEEP(*(.eh_frame))
+    . = (. + 7) & ~ 3;
+    /* C++ constructor and destructor tables */
+    /* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt */
+    __init_array_start = ABSOLUTE(.);
+    KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
+    __init_array_end = ABSOLUTE(.);
+    KEEP (*crtbegin.*(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /* C++ exception handlers table: */
+    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
+    soc_reserved_memory_region_start = ABSOLUTE(.);
+    KEEP (*(.reserved_memory_address))
+    soc_reserved_memory_region_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+    /* Literals are also RO data. */
+    _lit4_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.lit4.*)
+    *(.gnu.linkonce.lit4.*)
+    _lit4_end = ABSOLUTE(.);
+    . = ALIGN(4);
+    _thread_local_start = ABSOLUTE(.);
+    *(.tdata)
+    *(.tdata.*)
+    *(.tbss)
+    *(.tbss.*)
+    _thread_local_end = ABSOLUTE(.);
+    _rodata_reserved_end = ABSOLUTE(.);
+    . = ALIGN(4);
+  } > default_rodata_seg
+
+  _flash_rodata_align = ALIGNOF(.flash.rodata);
+
+  .flash.rodata_noload (NOLOAD) :
+  {
+    . = ALIGN (4);
+    *(.rodata_wlog_debug .rodata_wlog_debug.*)
+    *(.rodata_wlog_info .rodata_wlog_info.*)
+    *(.rodata_wlog_verbose .rodata_wlog_verbose.*)
+    *(.rodata_wlog_warning .rodata_wlog_warning.*)
+  } > default_rodata_seg
+
+  /* Marks the end of IRAM code segment */
+  .iram0.text_end (NOLOAD) :
+  {
+    /* ESP32-S3 memprot requires 16B padding for possible CPU prefetch and 256B alignment for PMS split lines */
+    . += _esp_memprot_prefetch_pad_size;
+    . = ALIGN(_esp_memprot_align_size);
+    /* iram_end_test section exists for use by memprot unit tests only */
+    *(.iram_end_test)
+    _iram_text_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.data :
+  {
+    . = ALIGN(4);
+    _iram_data_start = ABSOLUTE(.);
+
+    *(.iram.data .iram.data.*)
+    _coredump_iram_start = ABSOLUTE(.);
+    *(.iram2.coredump .iram2.coredump.*)
+    _coredump_iram_end = ABSOLUTE(.);
+
+    _iram_data_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.bss (NOLOAD) :
+  {
+    . = ALIGN(4);
+    _iram_bss_start = ABSOLUTE(.);
+
+    *(.iram.bss .iram.bss.*)
+
+    _iram_bss_end = ABSOLUTE(.);
+    . = ALIGN(4);
+    _iram_end = ABSOLUTE(.);
+   } > iram0_0_seg
+
+  /* Marks the end of data, bss and possibly rodata  */
+  .dram0.heap_start (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _heap_start = ABSOLUTE(.);
+  } > dram0_0_seg
+}
+
+ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
+          "IRAM0 segment data does not fit.")
+
+ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
+          "DRAM segment data does not fit.")
diff --git a/tools/sdk/esp32s3/qspi_qspi/include/sdkconfig.h b/tools/sdk/esp32s3/qspi_qspi/include/sdkconfig.h
new file mode 100644
index 00000000000..e63d91dc98b
--- /dev/null
+++ b/tools/sdk/esp32s3/qspi_qspi/include/sdkconfig.h
@@ -0,0 +1,992 @@
+/*
+ * Automatically generated file. DO NOT EDIT.
+ * Espressif IoT Development Framework (ESP-IDF) Configuration Header
+ */
+#pragma once
+#define CONFIG_IDF_CMAKE 1
+#define CONFIG_IDF_TARGET_ARCH_XTENSA 1
+#define CONFIG_IDF_TARGET "esp32s3"
+#define CONFIG_IDF_TARGET_ESP32S3 1
+#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0009
+#define CONFIG_SDK_TOOLPREFIX "xtensa-esp32s3-elf-"
+#define CONFIG_APP_BUILD_TYPE_APP_2NDBOOT 1
+#define CONFIG_APP_BUILD_GENERATE_BINARIES 1
+#define CONFIG_APP_BUILD_BOOTLOADER 1
+#define CONFIG_APP_BUILD_USE_FLASH_SECTIONS 1
+#define CONFIG_APP_COMPILE_TIME_DATE 1
+#define CONFIG_APP_RETRIEVE_LEN_ELF_SHA 16
+#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0
+#define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
+#define CONFIG_BOOTLOADER_LOG_LEVEL_NONE 1
+#define CONFIG_BOOTLOADER_LOG_LEVEL 0
+#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
+#define CONFIG_BOOTLOADER_WDT_ENABLE 1
+#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
+#define CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP 1
+#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x10
+#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
+#define CONFIG_SECURE_BOOT_SUPPORTS_RSA 1
+#define CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE 1
+#define CONFIG_BOOT_ROM_LOG_ALWAYS_ON 1
+#define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
+#define CONFIG_ESPTOOLPY_FLASHMODE_QIO 1
+#define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
+#define CONFIG_ESPTOOLPY_FLASHMODE "dio"
+#define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1
+#define CONFIG_ESPTOOLPY_FLASHFREQ "80m"
+#define CONFIG_ESPTOOLPY_FLASHSIZE_4MB 1
+#define CONFIG_ESPTOOLPY_FLASHSIZE "4MB"
+#define CONFIG_ESPTOOLPY_FLASHSIZE_DETECT 1
+#define CONFIG_ESPTOOLPY_BEFORE_RESET 1
+#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
+#define CONFIG_ESPTOOLPY_AFTER_RESET 1
+#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B 1
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL 115200
+#define CONFIG_ESPTOOLPY_MONITOR_BAUD 115200
+#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
+#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
+#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
+#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
+#define CONFIG_PARTITION_TABLE_MD5 1
+#define CONFIG_LIB_BUILDER_FLASHMODE "qio"
+#define CONFIG_LIB_BUILDER_FLASHFREQ "80m"
+#define CONFIG_ESP_RMAKER_ASSISTED_CLAIM 1
+#define CONFIG_ESP_RMAKER_CLAIM_TYPE 2
+#define CONFIG_ESP_RMAKER_MQTT_HOST "a1p72mufdu6064-ats.iot.us-east-1.amazonaws.com"
+#define CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE 1024
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0 1
+#define CONFIG_ESP_RMAKER_CONSOLE_UART_NUM 0
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH 1
+#define CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD 0
+#define CONFIG_ESP_RMAKER_OTA_HTTP_RX_BUFFER_SIZE 1024
+#define CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES 10
+#define CONFIG_ESP_RMAKER_SCENES_MAX_SCENES 10
+#define CONFIG_ENABLE_ARDUINO_DEPENDS 1
+#define CONFIG_AUTOSTART_ARDUINO 1
+#define CONFIG_ARDUINO_RUN_CORE1 1
+#define CONFIG_ARDUINO_RUNNING_CORE 1
+#define CONFIG_ARDUINO_LOOP_STACK_SIZE 8192
+#define CONFIG_ARDUINO_EVENT_RUN_CORE1 1
+#define CONFIG_ARDUINO_EVENT_RUNNING_CORE 1
+#define CONFIG_ARDUINO_UDP_RUN_CORE0 1
+#define CONFIG_ARDUINO_UDP_TASK_PRIORITY 3
+#define CONFIG_ARDUINO_UDP_RUNNING_CORE 0
+#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR 1
+#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL 1
+#define CONFIG_ARDUHAL_ESP_LOG 1
+#define CONFIG_ARDUHAL_PARTITION_SCHEME_DEFAULT 1
+#define CONFIG_ARDUHAL_PARTITION_SCHEME "default"
+#define CONFIG_TINYUSB_ENABLED 1
+#define CONFIG_TINYUSB_CDC_ENABLED 1
+#define CONFIG_TINYUSB_DESC_CDC_STRING "Espressif CDC Device"
+#define CONFIG_TINYUSB_CDC_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_CDC_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_MSC_ENABLED 1
+#define CONFIG_TINYUSB_DESC_MSC_STRING "Espressif MSC Device"
+#define CONFIG_TINYUSB_MSC_BUFSIZE 4096
+#define CONFIG_TINYUSB_HID_ENABLED 1
+#define CONFIG_TINYUSB_DESC_HID_STRING "Espressif HID Device"
+#define CONFIG_TINYUSB_HID_BUFSIZE 64
+#define CONFIG_TINYUSB_MIDI_ENABLED 1
+#define CONFIG_TINYUSB_DESC_MIDI_STRING "Espressif MIDI Device"
+#define CONFIG_TINYUSB_MIDI_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_MIDI_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_VIDEO_ENABLED 1
+#define CONFIG_TINYUSB_DESC_VIDEO_STRING "Espressif VIDEO Device"
+#define CONFIG_TINYUSB_VIDEO_STREAMING_BUFSIZE 64
+#define CONFIG_TINYUSB_VIDEO_STREAMING_IFS 1
+#define CONFIG_TINYUSB_DFU_RT_ENABLED 1
+#define CONFIG_TINYUSB_DESC_DFU_RT_STRING "Espressif DFU_RT Device"
+#define CONFIG_TINYUSB_VENDOR_ENABLED 1
+#define CONFIG_TINYUSB_DESC_VENDOR_STRING "Espressif VENDOR Device"
+#define CONFIG_TINYUSB_VENDOR_RX_BUFSIZE 64
+#define CONFIG_TINYUSB_VENDOR_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_DEBUG_LEVEL 0
+#define CONFIG_MODEL_IN_SPIFFS 1
+#define CONFIG_USE_WAKENET 1
+#define CONFIG_SR_WN_MODEL_WN8_QUANT 1
+#define CONFIG_SR_WN_WN8_HIESP 1
+#define CONFIG_USE_MULTINET 1
+#define CONFIG_SR_MN_ENGLISH 1
+#define CONFIG_SR_MN_EN_MULTINET5_SINGLE_RECOGNITION_QUANT8 1
+#define CONFIG_EN_SPEECH_COMMAND_ID0 "TfL Mm c qbK"
+#define CONFIG_EN_SPEECH_COMMAND_ID1 "Sgl c Sel"
+#define CONFIG_EN_SPEECH_COMMAND_ID2 "PLd NoZ paNcL"
+#define CONFIG_EN_SPEECH_COMMAND_ID3 "TkN nN Mi StNDBnKS"
+#define CONFIG_EN_SPEECH_COMMAND_ID4 "TkN eF Mi StNDBnKS"
+#define CONFIG_EN_SPEECH_COMMAND_ID5 "hicST VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID6 "LbcST VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID7 "gNKRmS jc VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID8 "DgKRmS jc VnLYoM"
+#define CONFIG_EN_SPEECH_COMMAND_ID9 "TkN nN jc TmVm"
+#define CONFIG_EN_SPEECH_COMMAND_ID10 "TkN eF jc TmVm"
+#define CONFIG_EN_SPEECH_COMMAND_ID11 "MdK Mm c Tm"
+#define CONFIG_EN_SPEECH_COMMAND_ID12 "MdK Mm c KnFm"
+#define CONFIG_EN_SPEECH_COMMAND_ID13 "TkN nN jc LiT"
+#define CONFIG_EN_SPEECH_COMMAND_ID14 "TkN eF jc LiT"
+#define CONFIG_EN_SPEECH_COMMAND_ID15 "pdNq jc KcLk To RfD"
+#define CONFIG_EN_SPEECH_COMMAND_ID16 "pdNq jc KcLk To GRmN"
+#define CONFIG_EN_SPEECH_COMMAND_ID17 "TkN nN eL jc LiTS"
+#define CONFIG_EN_SPEECH_COMMAND_ID18 "TkN eF eL jc LiTS"
+#define CONFIG_EN_SPEECH_COMMAND_ID19 "TkN nN jc fR KcNDgscNk"
+#define CONFIG_EN_SPEECH_COMMAND_ID20 "TkN eF jc fR KcNDgscNk"
+#define CONFIG_EN_SPEECH_COMMAND_ID21 "SfT jc TfMPRcpk To SgKSTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID22 "SfT jc TfMPRcpk To SfVcNTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID23 "SfT jc TfMPRcpk To dTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID24 "SfT jc TfMPRcpk To NiNTmN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID25 "SfT jc TfMPRcpk To TWfNTm DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID26 "SfT jc TfMPRcpk To TWfNTm WcN DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID27 "SfT jc TfMPRcpk To TWfNTm To DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID28 "SfT jc TfMPRcpk To TWfNTm vRm DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID29 "SfT jc TfMPRcpk To TWfNTm FeR DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID30 "SfT jc TfMPRcpk To TWfNTm FiV DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID31 "SfT jc TfMPRcpk To TWfNTm SgKS DgGRmZ"
+#define CONFIG_EN_SPEECH_COMMAND_ID32 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID33 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID34 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID35 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID36 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID37 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID38 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID39 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID40 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID41 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID42 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID43 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID44 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID45 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID46 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID47 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID48 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID49 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID50 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID51 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID52 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID53 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID54 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID55 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID56 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID57 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID58 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID59 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID60 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID61 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID62 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID63 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID64 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID65 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID66 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID67 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID68 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID69 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID70 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID71 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID72 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID73 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID74 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID75 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID76 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID77 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID78 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID79 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID80 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID81 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID82 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID83 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID84 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID85 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID86 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID87 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID88 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID89 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID90 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID91 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID92 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID93 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID94 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID95 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID96 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID97 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID98 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID99 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID100 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID101 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID102 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID103 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID104 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID105 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID106 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID107 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID108 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID109 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID110 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID111 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID112 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID113 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID114 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID115 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID116 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID117 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID118 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID119 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID120 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID121 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID122 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID123 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID124 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID125 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID126 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID127 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID128 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID129 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID130 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID131 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID132 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID133 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID134 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID135 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID136 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID137 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID138 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID139 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID140 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID141 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID142 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID143 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID144 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID145 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID146 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID147 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID148 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID149 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID150 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID151 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID152 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID153 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID154 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID155 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID156 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID157 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID158 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID159 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID160 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID161 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID162 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID163 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID164 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID165 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID166 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID167 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID168 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID169 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID170 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID171 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID172 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID173 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID174 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID175 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID176 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID177 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID178 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID179 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID180 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID181 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID182 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID183 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID184 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID185 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID186 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID187 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID188 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID189 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID190 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID191 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID192 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID193 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID194 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID195 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID196 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID197 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID198 ""
+#define CONFIG_EN_SPEECH_COMMAND_ID199 ""
+#define CONFIG_COMPILER_OPTIMIZATION_SIZE 1
+#define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
+#define CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL 2
+#define CONFIG_COMPILER_HIDE_PATHS_MACROS 1
+#define CONFIG_COMPILER_CXX_EXCEPTIONS 1
+#define CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE 0
+#define CONFIG_COMPILER_STACK_CHECK_MODE_NORM 1
+#define CONFIG_COMPILER_STACK_CHECK 1
+#define CONFIG_COMPILER_WARN_WRITE_STRINGS 1
+#define CONFIG_APPTRACE_DEST_NONE 1
+#define CONFIG_APPTRACE_LOCK_ENABLE 1
+#define CONFIG_BT_ENABLED 1
+#define CONFIG_BT_SOC_SUPPORT_5_0 1
+#define CONFIG_BT_CTRL_MODE_EFF 1
+#define CONFIG_BT_CTRL_BLE_MAX_ACT 10
+#define CONFIG_BT_CTRL_BLE_MAX_ACT_EFF 10
+#define CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB 0
+#define CONFIG_BT_CTRL_PINNED_TO_CORE_0 1
+#define CONFIG_BT_CTRL_PINNED_TO_CORE 0
+#define CONFIG_BT_CTRL_HCI_MODE_VHCI 1
+#define CONFIG_BT_CTRL_HCI_TL 1
+#define CONFIG_BT_CTRL_ADV_DUP_FILT_MAX 30
+#define CONFIG_BT_CTRL_HW_CCA_VAL 20
+#define CONFIG_BT_CTRL_HW_CCA_EFF 0
+#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG 1
+#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF 0
+#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0 1
+#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF 0
+#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0 1
+#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF 0
+#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P3 1
+#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF 10
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM 100
+#define CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD 20
+#define CONFIG_BT_CTRL_BLE_SCAN_DUPL 1
+#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DEVICE 1
+#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE 0
+#define CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE 100
+#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS 1
+#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF 0
+#define CONFIG_BT_CTRL_SLEEP_MODE_EFF 0
+#define CONFIG_BT_CTRL_SLEEP_CLOCK_EFF 0
+#define CONFIG_BT_CTRL_HCI_TL_EFF 1
+#define CONFIG_BT_BLUEDROID_ENABLED 1
+#define CONFIG_BT_BTC_TASK_STACK_SIZE 3072
+#define CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0 1
+#define CONFIG_BT_BLUEDROID_PINNED_TO_CORE 0
+#define CONFIG_BT_BTU_TASK_STACK_SIZE 4096
+#define CONFIG_BT_BLE_ENABLED 1
+#define CONFIG_BT_GATTS_ENABLE 1
+#define CONFIG_BT_GATT_MAX_SR_PROFILES 8
+#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO 1
+#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE 0
+#define CONFIG_BT_GATTC_ENABLE 1
+#define CONFIG_BT_GATTC_CONNECT_RETRY_COUNT 3
+#define CONFIG_BT_BLE_SMP_ENABLE 1
+#define CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_HCI_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTM_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_SDP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_GAP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_PAN_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_A2D_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_MCA_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_HID_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_APPL_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_GATT_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_SMP_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BTC_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_OSI_TRACE_LEVEL 2
+#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING 1
+#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL 2
+#define CONFIG_BT_ACL_CONNECTIONS 4
+#define CONFIG_BT_MULTI_CONNECTION_ENBALE 1
+#define CONFIG_BT_SMP_ENABLE 1
+#define CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT 30
+#define CONFIG_BT_BLE_RPA_SUPPORTED 1
+#define CONFIG_BT_BLE_50_FEATURES_SUPPORTED 1
+#define CONFIG_BT_BLE_42_FEATURES_SUPPORTED 1
+#define CONFIG_BLE_MESH 1
+#define CONFIG_BLE_MESH_HCI_5_0 1
+#define CONFIG_BLE_MESH_USE_DUPLICATE_SCAN 1
+#define CONFIG_BLE_MESH_MEM_ALLOC_MODE_INTERNAL 1
+#define CONFIG_BLE_MESH_DEINIT 1
+#define CONFIG_BLE_MESH_PROV 1
+#define CONFIG_BLE_MESH_PB_ADV 1
+#define CONFIG_BLE_MESH_PROXY 1
+#define CONFIG_BLE_MESH_NET_BUF_POOL_USAGE 1
+#define CONFIG_BLE_MESH_SUBNET_COUNT 3
+#define CONFIG_BLE_MESH_APP_KEY_COUNT 3
+#define CONFIG_BLE_MESH_MODEL_KEY_COUNT 3
+#define CONFIG_BLE_MESH_MODEL_GROUP_COUNT 3
+#define CONFIG_BLE_MESH_LABEL_COUNT 3
+#define CONFIG_BLE_MESH_CRPL 10
+#define CONFIG_BLE_MESH_MSG_CACHE_SIZE 10
+#define CONFIG_BLE_MESH_ADV_BUF_COUNT 60
+#define CONFIG_BLE_MESH_IVU_DIVIDER 4
+#define CONFIG_BLE_MESH_TX_SEG_MSG_COUNT 1
+#define CONFIG_BLE_MESH_RX_SEG_MSG_COUNT 1
+#define CONFIG_BLE_MESH_RX_SDU_MAX 384
+#define CONFIG_BLE_MESH_TX_SEG_MAX 32
+#define CONFIG_BLE_MESH_TRACE_LEVEL_WARNING 1
+#define CONFIG_BLE_MESH_STACK_TRACE_LEVEL 2
+#define CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL_WARNING 1
+#define CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL 2
+#define CONFIG_BLE_MESH_CLIENT_MSG_TIMEOUT 4000
+#define CONFIG_BLE_MESH_HEALTH_SRV 1
+#define CONFIG_BLE_MESH_GENERIC_SERVER 1
+#define CONFIG_BLE_MESH_SENSOR_SERVER 1
+#define CONFIG_BLE_MESH_TIME_SCENE_SERVER 1
+#define CONFIG_BLE_MESH_LIGHTING_SERVER 1
+#define CONFIG_COAP_MBEDTLS_PSK 1
+#define CONFIG_COAP_LOG_DEFAULT_LEVEL 0
+#define CONFIG_ADC_DISABLE_DAC 1
+#define CONFIG_EFUSE_MAX_BLK_LEN 256
+#define CONFIG_ESP_TLS_USING_MBEDTLS 1
+#define CONFIG_ESP_TLS_USE_DS_PERIPHERAL 1
+#define CONFIG_ESP_TLS_SERVER 1
+#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240 1
+#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 240
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB 1
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE 0x4000
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS 1
+#define CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS 8
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B 1
+#define CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE 32
+#define CONFIG_ESP32S3_DATA_CACHE_32KB 1
+#define CONFIG_ESP32S3_DATA_CACHE_SIZE 0x8000
+#define CONFIG_ESP32S3_DATA_CACHE_8WAYS 1
+#define CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS 8
+#define CONFIG_ESP32S3_DATA_CACHE_LINE_32B 1
+#define CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE 32
+#define CONFIG_ESP32S3_SPIRAM_SUPPORT 1
+#define CONFIG_SPIRAM_MODE_QUAD 1
+#define CONFIG_SPIRAM_TYPE_AUTO 1
+#define CONFIG_SPIRAM_SIZE -1
+#define CONFIG_DEFAULT_PSRAM_CLK_IO 30
+#define CONFIG_DEFAULT_PSRAM_CS_IO 26
+#define CONFIG_SPIRAM_SPEED_80M 1
+#define CONFIG_SPIRAM 1
+#define CONFIG_SPIRAM_USE_MALLOC 1
+#define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 4096
+#define CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP 1
+#define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 0
+#define CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM 0x0
+#define CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM 0
+#define CONFIG_ESP32S3_DEBUG_OCDAWARE 1
+#define CONFIG_ESP32S3_BROWNOUT_DET 1
+#define CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7 1
+#define CONFIG_ESP32S3_BROWNOUT_DET_LVL 7
+#define CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1 1
+#define CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC 1
+#define CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES 576
+#define CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY 2000
+#define CONFIG_ESP_ERR_TO_NAME_LOOKUP 1
+#define CONFIG_ETH_ENABLED 1
+#define CONFIG_ETH_USE_SPI_ETHERNET 1
+#define CONFIG_ETH_SPI_ETHERNET_DM9051 1
+#define CONFIG_ETH_SPI_ETHERNET_W5500 1
+#define CONFIG_ESP_EVENT_POST_FROM_ISR 1
+#define CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH 1
+#define CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH 1
+#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 1024
+#define CONFIG_HTTPD_MAX_URI_LEN 512
+#define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
+#define CONFIG_HTTPD_PURGE_BUF_LEN 32
+#define CONFIG_HTTPD_WS_SUPPORT 1
+#define CONFIG_ESP_HTTPS_SERVER_ENABLE 1
+#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA 1
+#define CONFIG_ESP_MAC_ADDR_UNIVERSE_BT 1
+#define CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO 1
+#define CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES 2
+#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1
+#define CONFIG_RTC_CLOCK_BBPLL_POWER_ON_WITH_USB 1
+#define CONFIG_ESP_IPC_TASK_STACK_SIZE 1024
+#define CONFIG_ESP_IPC_USES_CALLERS_PRIORITY 1
+#define CONFIG_ESP_IPC_ISR_ENABLE 1
+#define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE 32
+#define CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL 120
+#define CONFIG_ESP_NETIF_TCPIP_LWIP 1
+#define CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER 1
+#define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
+#define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
+#define CONFIG_ESP_PHY_MAX_TX_POWER 20
+#define CONFIG_ESP_PHY_ENABLE_USB 1
+#define CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP 1
+#define CONFIG_PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP 1
+#define CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT 1
+#define CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK 1
+#define CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP 1
+#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
+#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2048
+#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 4096
+#define CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 1
+#define CONFIG_ESP_MAIN_TASK_AFFINITY 0x0
+#define CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE 2048
+#define CONFIG_ESP_CONSOLE_UART_DEFAULT 1
+#define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1
+#define CONFIG_ESP_CONSOLE_UART 1
+#define CONFIG_ESP_CONSOLE_MULTIPLE_UART 1
+#define CONFIG_ESP_CONSOLE_UART_NUM 0
+#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
+#define CONFIG_ESP_INT_WDT 1
+#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 1000
+#define CONFIG_ESP_INT_WDT_CHECK_CPU1 1
+#define CONFIG_ESP_TASK_WDT 1
+#define CONFIG_ESP_TASK_WDT_PANIC 1
+#define CONFIG_ESP_TASK_WDT_TIMEOUT_S 5
+#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 1
+#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
+#define CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER 1
+#define CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER 1
+#define CONFIG_ESP_TIMER_TASK_STACK_SIZE 4096
+#define CONFIG_ESP_TIMER_INTERRUPT_LEVEL 1
+#define CONFIG_ESP_TIMER_IMPL_SYSTIMER 1
+#define CONFIG_ESP32_WIFI_ENABLED 1
+#define CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE 1
+#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 8
+#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 32
+#define CONFIG_ESP32_WIFI_STATIC_TX_BUFFER 1
+#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 0
+#define CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM 8
+#define CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM 16
+#define CONFIG_ESP32_WIFI_CSI_ENABLED 1
+#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED 1
+#define CONFIG_ESP32_WIFI_TX_BA_WIN 6
+#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED 1
+#define CONFIG_ESP32_WIFI_RX_BA_WIN 16
+#define CONFIG_ESP32_WIFI_NVS_ENABLED 1
+#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 1
+#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN 752
+#define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM 32
+#define CONFIG_ESP_WIFI_FTM_ENABLE 1
+#define CONFIG_ESP_WIFI_FTM_INITIATOR_SUPPORT 1
+#define CONFIG_ESP_WIFI_FTM_RESPONDER_SUPPORT 1
+#define CONFIG_ESP_WIFI_SOFTAP_SUPPORT 1
+#define CONFIG_ESP_COREDUMP_ENABLE_TO_NONE 1
+#define CONFIG_FATFS_CODEPAGE_850 1
+#define CONFIG_FATFS_CODEPAGE 850
+#define CONFIG_FATFS_LFN_STACK 1
+#define CONFIG_FATFS_MAX_LFN 255
+#define CONFIG_FATFS_API_ENCODING_ANSI_OEM 1
+#define CONFIG_FATFS_FS_LOCK 0
+#define CONFIG_FATFS_TIMEOUT_MS 10000
+#define CONFIG_FATFS_PER_FILE_CACHE 1
+#define CONFIG_FATFS_ALLOC_PREFER_EXTRAM 1
+#define CONFIG_FMB_COMM_MODE_TCP_EN 1
+#define CONFIG_FMB_TCP_PORT_DEFAULT 502
+#define CONFIG_FMB_TCP_PORT_MAX_CONN 5
+#define CONFIG_FMB_TCP_CONNECTION_TOUT_SEC 20
+#define CONFIG_FMB_COMM_MODE_RTU_EN 1
+#define CONFIG_FMB_COMM_MODE_ASCII_EN 1
+#define CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND 150
+#define CONFIG_FMB_MASTER_DELAY_MS_CONVERT 200
+#define CONFIG_FMB_QUEUE_LENGTH 20
+#define CONFIG_FMB_PORT_TASK_STACK_SIZE 4096
+#define CONFIG_FMB_SERIAL_BUF_SIZE 256
+#define CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB 8
+#define CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS 1000
+#define CONFIG_FMB_PORT_TASK_PRIO 10
+#define CONFIG_FMB_PORT_TASK_AFFINITY_CPU0 1
+#define CONFIG_FMB_PORT_TASK_AFFINITY 0x0
+#define CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT 20
+#define CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE 20
+#define CONFIG_FMB_CONTROLLER_STACK_SIZE 4096
+#define CONFIG_FMB_EVENT_QUEUE_TIMEOUT 20
+#define CONFIG_FMB_TIMER_PORT_ENABLED 1
+#define CONFIG_FMB_TIMER_GROUP 0
+#define CONFIG_FMB_TIMER_INDEX 0
+#define CONFIG_FMB_MASTER_TIMER_GROUP 0
+#define CONFIG_FMB_MASTER_TIMER_INDEX 0
+#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
+#define CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER 1
+#define CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1 1
+#define CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER 1
+#define CONFIG_FREERTOS_HZ 1000
+#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
+#define CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK 1
+#define CONFIG_FREERTOS_INTERRUPT_BACKTRACE 1
+#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
+#define CONFIG_FREERTOS_ASSERT_FAIL_ABORT 1
+#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1024
+#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
+#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
+#define CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION 1
+#define CONFIG_FREERTOS_TIMER_TASK_PRIORITY 1
+#define CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH 2048
+#define CONFIG_FREERTOS_TIMER_QUEUE_LENGTH 10
+#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
+#define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
+#define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
+#define CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT 1
+#define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
+#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
+#define CONFIG_HEAP_POISONING_LIGHT 1
+#define CONFIG_HEAP_TRACING_OFF 1
+#define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
+#define CONFIG_LOG_DEFAULT_LEVEL 1
+#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
+#define CONFIG_LOG_MAXIMUM_LEVEL 1
+#define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
+#define CONFIG_LWIP_LOCAL_HOSTNAME "espressif"
+#define CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES 1
+#define CONFIG_LWIP_TIMERS_ONDEMAND 1
+#define CONFIG_LWIP_MAX_SOCKETS 16
+#define CONFIG_LWIP_SO_REUSE 1
+#define CONFIG_LWIP_SO_REUSE_RXTOALL 1
+#define CONFIG_LWIP_SO_RCVBUF 1
+#define CONFIG_LWIP_IP4_FRAG 1
+#define CONFIG_LWIP_IP6_FRAG 1
+#define CONFIG_LWIP_ETHARP_TRUST_IP_MAC 1
+#define CONFIG_LWIP_ESP_GRATUITOUS_ARP 1
+#define CONFIG_LWIP_GARP_TMR_INTERVAL 60
+#define CONFIG_LWIP_TCPIP_RECVMBOX_SIZE 32
+#define CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID 1
+#define CONFIG_LWIP_DHCP_RESTORE_LAST_IP 1
+#define CONFIG_LWIP_DHCP_OPTIONS_LEN 128
+#define CONFIG_LWIP_DHCPS 1
+#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
+#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
+#define CONFIG_LWIP_IPV6 1
+#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
+#define CONFIG_LWIP_NETIF_LOOPBACK 1
+#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
+#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
+#define CONFIG_LWIP_MAX_LISTENING_TCP 16
+#define CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION 1
+#define CONFIG_LWIP_TCP_MAXRTX 12
+#define CONFIG_LWIP_TCP_SYNMAXRTX 6
+#define CONFIG_LWIP_TCP_MSS 1436
+#define CONFIG_LWIP_TCP_TMR_INTERVAL 250
+#define CONFIG_LWIP_TCP_MSL 60000
+#define CONFIG_LWIP_TCP_SND_BUF_DEFAULT 5744
+#define CONFIG_LWIP_TCP_WND_DEFAULT 5744
+#define CONFIG_LWIP_TCP_RECVMBOX_SIZE 6
+#define CONFIG_LWIP_TCP_QUEUE_OOSEQ 1
+#define CONFIG_LWIP_TCP_OVERSIZE_MSS 1
+#define CONFIG_LWIP_TCP_RTO_TIME 3000
+#define CONFIG_LWIP_MAX_UDP_PCBS 16
+#define CONFIG_LWIP_UDP_RECVMBOX_SIZE 6
+#define CONFIG_LWIP_CHECKSUM_CHECK_ICMP 1
+#define CONFIG_LWIP_TCPIP_TASK_STACK_SIZE 2560
+#define CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 1
+#define CONFIG_LWIP_TCPIP_TASK_AFFINITY 0x0
+#define CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE 3
+#define CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS 5
+#define CONFIG_LWIP_ICMP 1
+#define CONFIG_LWIP_MAX_RAW_PCBS 16
+#define CONFIG_LWIP_SNTP_MAX_SERVERS 3
+#define CONFIG_LWIP_DHCP_GET_NTP_SRV 1
+#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
+#define CONFIG_LWIP_SNTP_UPDATE_DELAY 3600000
+#define CONFIG_LWIP_ESP_LWIP_ASSERT 1
+#define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
+#define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
+#define CONFIG_LWIP_HOOK_ND6_GET_GW_NONE 1
+#define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
+#define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
+#define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
+#define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
+#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
+#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
+#define CONFIG_MBEDTLS_HARDWARE_AES 1
+#define CONFIG_MBEDTLS_AES_USE_INTERRUPT 1
+#define CONFIG_MBEDTLS_HARDWARE_MPI 1
+#define CONFIG_MBEDTLS_HARDWARE_SHA 1
+#define CONFIG_MBEDTLS_ROM_MD5 1
+#define CONFIG_MBEDTLS_HAVE_TIME 1
+#define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
+#define CONFIG_MBEDTLS_SHA512_C 1
+#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
+#define CONFIG_MBEDTLS_TLS_SERVER 1
+#define CONFIG_MBEDTLS_TLS_CLIENT 1
+#define CONFIG_MBEDTLS_TLS_ENABLED 1
+#define CONFIG_MBEDTLS_PSK_MODES 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1
+#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1
+#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 1
+#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
+#define CONFIG_MBEDTLS_SSL_PROTO_DTLS 1
+#define CONFIG_MBEDTLS_SSL_ALPN 1
+#define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
+#define CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE 1
+#define CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE 1
+#define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
+#define CONFIG_MBEDTLS_AES_C 1
+#define CONFIG_MBEDTLS_RC4_DISABLED 1
+#define CONFIG_MBEDTLS_CCM_C 1
+#define CONFIG_MBEDTLS_GCM_C 1
+#define CONFIG_MBEDTLS_PEM_PARSE_C 1
+#define CONFIG_MBEDTLS_PEM_WRITE_C 1
+#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1
+#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
+#define CONFIG_MBEDTLS_ECP_C 1
+#define CONFIG_MBEDTLS_ECDH_C 1
+#define CONFIG_MBEDTLS_ECDSA_C 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
+#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
+#define CONFIG_MDNS_MAX_SERVICES 10
+#define CONFIG_MDNS_TASK_PRIORITY 1
+#define CONFIG_MDNS_TASK_STACK_SIZE 4096
+#define CONFIG_MDNS_TASK_AFFINITY_CPU0 1
+#define CONFIG_MDNS_TASK_AFFINITY 0x0
+#define CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS 2000
+#define CONFIG_MDNS_TIMER_PERIOD_MS 100
+#define CONFIG_MDNS_MULTIPLE_INSTANCE 1
+#define CONFIG_MQTT_PROTOCOL_311 1
+#define CONFIG_MQTT_TRANSPORT_SSL 1
+#define CONFIG_MQTT_TRANSPORT_WEBSOCKET 1
+#define CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE 1
+#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
+#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
+#define CONFIG_OPENSSL_ERROR_STACK 1
+#define CONFIG_OPENSSL_ASSERT_DO_NOTHING 1
+#define CONFIG_PTHREAD_TASK_PRIO_DEFAULT 5
+#define CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT 2048
+#define CONFIG_PTHREAD_STACK_MIN 768
+#define CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY 1
+#define CONFIG_PTHREAD_TASK_CORE_DEFAULT -1
+#define CONFIG_PTHREAD_TASK_NAME_DEFAULT "pthread"
+#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
+#define CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS 1
+#define CONFIG_SPI_FLASH_YIELD_DURING_ERASE 1
+#define CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS 10
+#define CONFIG_SPI_FLASH_ERASE_YIELD_TICKS 2
+#define CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE 4096
+#define CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_GD_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_TH_CHIP 1
+#define CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP 1
+#define CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE 1
+#define CONFIG_SPIFFS_MAX_PARTITIONS 3
+#define CONFIG_SPIFFS_CACHE 1
+#define CONFIG_SPIFFS_CACHE_WR 1
+#define CONFIG_SPIFFS_PAGE_CHECK 1
+#define CONFIG_SPIFFS_GC_MAX_RUNS 10
+#define CONFIG_SPIFFS_PAGE_SIZE 256
+#define CONFIG_SPIFFS_OBJ_NAME_LEN 32
+#define CONFIG_SPIFFS_USE_MAGIC 1
+#define CONFIG_SPIFFS_USE_MAGIC_LENGTH 1
+#define CONFIG_SPIFFS_META_LENGTH 4
+#define CONFIG_SPIFFS_USE_MTIME 1
+#define CONFIG_WS_TRANSPORT 1
+#define CONFIG_WS_BUFFER_SIZE 1024
+#define CONFIG_UNITY_ENABLE_FLOAT 1
+#define CONFIG_UNITY_ENABLE_DOUBLE 1
+#define CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER 1
+#define CONFIG_USB_OTG_SUPPORTED 1
+#define CONFIG_USB_HOST_CONTROL_TRANSFER_MAX_SIZE 256
+#define CONFIG_USB_HOST_HW_BUFFER_BIAS_BALANCED 1
+#define CONFIG_VFS_SUPPORT_IO 1
+#define CONFIG_VFS_SUPPORT_DIR 1
+#define CONFIG_VFS_SUPPORT_SELECT 1
+#define CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT 1
+#define CONFIG_VFS_SUPPORT_TERMIOS 1
+#define CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS 1
+#define CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN 128
+#define CONFIG_WL_SECTOR_SIZE_4096 1
+#define CONFIG_WL_SECTOR_SIZE 4096
+#define CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES 16
+#define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
+#define CONFIG_WPA_MBEDTLS_CRYPTO 1
+#define CONFIG_IO_GLITCH_FILTER_TIME_MS 50
+#define CONFIG_ESP_RMAKER_LIB_ESP_MQTT 1
+#define CONFIG_ESP_RMAKER_MQTT_GLUE_LIB 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT_443 1
+#define CONFIG_ESP_RMAKER_MQTT_PORT 1
+#define CONFIG_ESP_RMAKER_MQTT_SEND_USERNAME 1
+#define CONFIG_ESP_RMAKER_MQTT_USERNAME "?Platform=APN/1 ESPIF,RAINMAKER,v1.0"
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK 4096
+#define CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_PRIORITY 5
+#define CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME "fctry"
+#define CONFIG_ESP_RMAKER_FACTORY_NAMESPACE "rmaker_creds"
+#define CONFIG_ESP_RMAKER_DEF_TIMEZONE "Asia/Shanghai"
+#define CONFIG_ESP_RMAKER_SNTP_SERVER_NAME "pool.ntp.org"
+#define CONFIG_DSP_OPTIMIZATIONS_SUPPORTED 1
+#define CONFIG_DSP_OPTIMIZED 1
+#define CONFIG_DSP_OPTIMIZATION 1
+#define CONFIG_DSP_MAX_FFT_SIZE_4096 1
+#define CONFIG_DSP_MAX_FFT_SIZE 4096
+#define CONFIG_OV7670_SUPPORT 1
+#define CONFIG_OV7725_SUPPORT 1
+#define CONFIG_NT99141_SUPPORT 1
+#define CONFIG_OV2640_SUPPORT 1
+#define CONFIG_OV3660_SUPPORT 1
+#define CONFIG_OV5640_SUPPORT 1
+#define CONFIG_GC2145_SUPPORT 1
+#define CONFIG_GC032A_SUPPORT 1
+#define CONFIG_GC0308_SUPPORT 1
+#define CONFIG_BF3005_SUPPORT 1
+#define CONFIG_BF20A6_SUPPORT 1
+#define CONFIG_SCCB_HARDWARE_I2C_PORT1 1
+#define CONFIG_SCCB_CLK_FREQ 100000
+#define CONFIG_GC_SENSOR_SUBSAMPLE_MODE 1
+#define CONFIG_CAMERA_CORE0 1
+#define CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX 32768
+#define CONFIG_LITTLEFS_MAX_PARTITIONS 3
+#define CONFIG_LITTLEFS_PAGE_SIZE 256
+#define CONFIG_LITTLEFS_OBJ_NAME_LEN 64
+#define CONFIG_LITTLEFS_READ_SIZE 128
+#define CONFIG_LITTLEFS_WRITE_SIZE 128
+#define CONFIG_LITTLEFS_LOOKAHEAD_SIZE 128
+#define CONFIG_LITTLEFS_CACHE_SIZE 512
+#define CONFIG_LITTLEFS_BLOCK_CYCLES 512
+#define CONFIG_LITTLEFS_USE_MTIME 1
+#define CONFIG_LITTLEFS_MTIME_USE_SECONDS 1
+
+/* List of deprecated options */
+#define CONFIG_A2D_TRACE_LEVEL_WARNING CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING
+#define CONFIG_ADC2_DISABLE_DAC CONFIG_ADC_DISABLE_DAC
+#define CONFIG_APPL_TRACE_LEVEL_WARNING CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING
+#define CONFIG_AVCT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING
+#define CONFIG_AVDT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING
+#define CONFIG_AVRC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING
+#define CONFIG_BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT
+#define CONFIG_BLE_SMP_ENABLE CONFIG_BT_BLE_SMP_ENABLE
+#define CONFIG_BLUEDROID_ENABLED CONFIG_BT_BLUEDROID_ENABLED
+#define CONFIG_BLUEDROID_PINNED_TO_CORE_0 CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0
+#define CONFIG_BLUFI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING
+#define CONFIG_BTC_TASK_STACK_SIZE CONFIG_BT_BTC_TASK_STACK_SIZE
+#define CONFIG_BTC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING
+#define CONFIG_BTIF_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING
+#define CONFIG_BTM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING
+#define CONFIG_BTU_TASK_STACK_SIZE CONFIG_BT_BTU_TASK_STACK_SIZE
+#define CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
+#define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
+#define CONFIG_CXX_EXCEPTIONS CONFIG_COMPILER_CXX_EXCEPTIONS
+#define CONFIG_CXX_EXCEPTIONS_EMG_POOL_SIZE CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE
+#define CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+#define CONFIG_ESP32S2_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
+#define CONFIG_ESP32_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+#define CONFIG_ESP32_APPTRACE_DEST_NONE CONFIG_APPTRACE_DEST_NONE
+#define CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY
+#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE CONFIG_ESP_COREDUMP_ENABLE_TO_NONE
+#define CONFIG_ESP32_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
+#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE
+#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER CONFIG_ESP_PHY_MAX_WIFI_TX_POWER
+#define CONFIG_ESP32_PTHREAD_STACK_MIN CONFIG_PTHREAD_STACK_MIN
+#define CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT CONFIG_PTHREAD_TASK_NAME_DEFAULT
+#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT CONFIG_PTHREAD_TASK_PRIO_DEFAULT
+#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT
+#define CONFIG_ESP_GRATUITOUS_ARP CONFIG_LWIP_ESP_GRATUITOUS_ARP
+#define CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
+#define CONFIG_FLASHMODE_QIO CONFIG_ESPTOOLPY_FLASHMODE_QIO
+#define CONFIG_GAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING
+#define CONFIG_GARP_TMR_INTERVAL CONFIG_LWIP_GARP_TMR_INTERVAL
+#define CONFIG_GATTC_ENABLE CONFIG_BT_GATTC_ENABLE
+#define CONFIG_GATTS_ENABLE CONFIG_BT_GATTS_ENABLE
+#define CONFIG_GATTS_SEND_SERVICE_CHANGE_AUTO CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO
+#define CONFIG_GATT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING
+#define CONFIG_HCI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING
+#define CONFIG_HID_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING
+#define CONFIG_INT_WDT CONFIG_ESP_INT_WDT
+#define CONFIG_INT_WDT_CHECK_CPU1 CONFIG_ESP_INT_WDT_CHECK_CPU1
+#define CONFIG_INT_WDT_TIMEOUT_MS CONFIG_ESP_INT_WDT_TIMEOUT_MS
+#define CONFIG_IPC_TASK_STACK_SIZE CONFIG_ESP_IPC_TASK_STACK_SIZE
+#define CONFIG_L2CAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING
+#define CONFIG_LOG_BOOTLOADER_LEVEL_NONE CONFIG_BOOTLOADER_LOG_LEVEL_NONE
+#define CONFIG_MAIN_TASK_STACK_SIZE CONFIG_ESP_MAIN_TASK_STACK_SIZE
+#define CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE
+#define CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT
+#define CONFIG_MB_CONTROLLER_STACK_SIZE CONFIG_FMB_CONTROLLER_STACK_SIZE
+#define CONFIG_MB_EVENT_QUEUE_TIMEOUT CONFIG_FMB_EVENT_QUEUE_TIMEOUT
+#define CONFIG_MB_MASTER_DELAY_MS_CONVERT CONFIG_FMB_MASTER_DELAY_MS_CONVERT
+#define CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND
+#define CONFIG_MB_QUEUE_LENGTH CONFIG_FMB_QUEUE_LENGTH
+#define CONFIG_MB_SERIAL_BUF_SIZE CONFIG_FMB_SERIAL_BUF_SIZE
+#define CONFIG_MB_SERIAL_TASK_PRIO CONFIG_FMB_PORT_TASK_PRIO
+#define CONFIG_MB_SERIAL_TASK_STACK_SIZE CONFIG_FMB_PORT_TASK_STACK_SIZE
+#define CONFIG_MB_TIMER_GROUP CONFIG_FMB_TIMER_GROUP
+#define CONFIG_MB_TIMER_INDEX CONFIG_FMB_TIMER_INDEX
+#define CONFIG_MB_TIMER_PORT_ENABLED CONFIG_FMB_TIMER_PORT_ENABLED
+#define CONFIG_MCA_TRACE_LEVEL_WARNING CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING
+#define CONFIG_MONITOR_BAUD_115200B CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B
+#define CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE
+#define CONFIG_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
+#define CONFIG_OSI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING
+#define CONFIG_PAN_TRACE_LEVEL_WARNING CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING
+#define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
+#define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
+#define CONFIG_RFCOMM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING
+#define CONFIG_SDP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING
+#define CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN
+#define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
+#define CONFIG_SMP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING
+#define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS
+#define CONFIG_STACK_CHECK_NORM CONFIG_COMPILER_STACK_CHECK_MODE_NORM
+#define CONFIG_SUPPORT_TERMIOS CONFIG_VFS_SUPPORT_TERMIOS
+#define CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT
+#define CONFIG_SW_COEXIST_ENABLE CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE
+#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE
+#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE
+#define CONFIG_TASK_WDT CONFIG_ESP_TASK_WDT
+#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
+#define CONFIG_TASK_WDT_PANIC CONFIG_ESP_TASK_WDT_PANIC
+#define CONFIG_TASK_WDT_TIMEOUT_S CONFIG_ESP_TASK_WDT_TIMEOUT_S
+#define CONFIG_TCPIP_RECVMBOX_SIZE CONFIG_LWIP_TCPIP_RECVMBOX_SIZE
+#define CONFIG_TCPIP_TASK_AFFINITY_CPU0 CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0
+#define CONFIG_TCPIP_TASK_STACK_SIZE CONFIG_LWIP_TCPIP_TASK_STACK_SIZE
+#define CONFIG_TCP_MAXRTX CONFIG_LWIP_TCP_MAXRTX
+#define CONFIG_TCP_MSL CONFIG_LWIP_TCP_MSL
+#define CONFIG_TCP_MSS CONFIG_LWIP_TCP_MSS
+#define CONFIG_TCP_OVERSIZE_MSS CONFIG_LWIP_TCP_OVERSIZE_MSS
+#define CONFIG_TCP_QUEUE_OOSEQ CONFIG_LWIP_TCP_QUEUE_OOSEQ
+#define CONFIG_TCP_RECVMBOX_SIZE CONFIG_LWIP_TCP_RECVMBOX_SIZE
+#define CONFIG_TCP_SND_BUF_DEFAULT CONFIG_LWIP_TCP_SND_BUF_DEFAULT
+#define CONFIG_TCP_SYNMAXRTX CONFIG_LWIP_TCP_SYNMAXRTX
+#define CONFIG_TCP_WND_DEFAULT CONFIG_LWIP_TCP_WND_DEFAULT
+#define CONFIG_TIMER_QUEUE_LENGTH CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
+#define CONFIG_TIMER_TASK_PRIORITY CONFIG_FREERTOS_TIMER_TASK_PRIORITY
+#define CONFIG_TIMER_TASK_STACK_DEPTH CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
+#define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
+#define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
+#define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
+#define CONFIG_USB_CDC_ENABLED CONFIG_TINYUSB_CDC_ENABLED
+#define CONFIG_USB_CDC_RX_BUFSIZE CONFIG_TINYUSB_CDC_RX_BUFSIZE
+#define CONFIG_USB_CDC_TX_BUFSIZE CONFIG_TINYUSB_CDC_TX_BUFSIZE
+#define CONFIG_USB_DEBUG_LEVEL CONFIG_TINYUSB_DEBUG_LEVEL
+#define CONFIG_USB_DESC_CDC_STRING CONFIG_TINYUSB_DESC_CDC_STRING
+#define CONFIG_USB_DESC_HID_STRING CONFIG_TINYUSB_DESC_HID_STRING
+#define CONFIG_USB_DESC_MSC_STRING CONFIG_TINYUSB_DESC_MSC_STRING
+#define CONFIG_USB_MSC_BUFSIZE CONFIG_TINYUSB_MSC_BUFSIZE
+#define CONFIG_USB_MSC_ENABLED CONFIG_TINYUSB_MSC_ENABLED
+#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
+#define CONFIG_ARDUINO_IDF_COMMIT "b8050b365e"
+#define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32s3/qspi_qspi/libbootloader_support.a b/tools/sdk/esp32s3/qspi_qspi/libbootloader_support.a
new file mode 100644
index 00000000000..2d9517b11df
Binary files /dev/null and b/tools/sdk/esp32s3/qspi_qspi/libbootloader_support.a differ
diff --git a/tools/sdk/esp32s3/qspi_qspi/libesp_hw_support.a b/tools/sdk/esp32s3/qspi_qspi/libesp_hw_support.a
new file mode 100644
index 00000000000..64e69f5885b
Binary files /dev/null and b/tools/sdk/esp32s3/qspi_qspi/libesp_hw_support.a differ
diff --git a/tools/sdk/esp32s3/qspi_qspi/libesp_system.a b/tools/sdk/esp32s3/qspi_qspi/libesp_system.a
new file mode 100644
index 00000000000..aad064f7eea
Binary files /dev/null and b/tools/sdk/esp32s3/qspi_qspi/libesp_system.a differ
diff --git a/tools/sdk/esp32s3/qspi_qspi/libfreertos.a b/tools/sdk/esp32s3/qspi_qspi/libfreertos.a
new file mode 100644
index 00000000000..753f15178b3
Binary files /dev/null and b/tools/sdk/esp32s3/qspi_qspi/libfreertos.a differ
diff --git a/tools/sdk/esp32s3/qspi_qspi/libspi_flash.a b/tools/sdk/esp32s3/qspi_qspi/libspi_flash.a
new file mode 100644
index 00000000000..9b2ec7b8bdd
Binary files /dev/null and b/tools/sdk/esp32s3/qspi_qspi/libspi_flash.a differ
diff --git a/tools/sdk/esp32s3/qspi_qspi/sections.ld b/tools/sdk/esp32s3/qspi_qspi/sections.ld
new file mode 100644
index 00000000000..446f3ac71be
--- /dev/null
+++ b/tools/sdk/esp32s3/qspi_qspi/sections.ld
@@ -0,0 +1,594 @@
+/* Automatically generated file; DO NOT EDIT */
+/* Espressif IoT Development Framework Linker Script */
+/* Generated from: /home/runner/work/esp32-arduino-lib-builder/esp32-arduino-lib-builder/esp-idf/components/esp_system/ld/esp32s3/sections.ld.in */
+
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Default entry point */
+ENTRY(call_start_cpu0);
+
+_diram_i_start = 0x40378000;
+
+SECTIONS
+{
+  /**
+   * RTC fast memory holds RTC wake stub code,
+   * including from any source file named rtc_wake_stub*.c
+   */
+  .rtc.text :
+  {
+    . = ALIGN(4);
+    _rtc_text_start = ABSOLUTE(.);
+    *(.rtc.entry.text)
+
+    *(.rtc.literal .rtc.text .rtc.text.*)
+
+    *rtc_wake_stub*.*(.literal .text .literal.* .text.*)
+    _rtc_text_end = ABSOLUTE(.);
+  } > rtc_iram_seg
+
+  /**
+   * This section is required to skip rtc.text area because rtc_iram_seg and
+   * rtc_data_seg are reflect the same address space on different buses.
+   */
+  .rtc.dummy :
+  {
+    _rtc_dummy_start = ABSOLUTE(.);
+    _rtc_fast_start = ABSOLUTE(.);
+    . = SIZEOF(.rtc.text);
+    _rtc_dummy_end = ABSOLUTE(.);
+  } > rtc_data_seg
+
+  /**
+   * This section located in RTC FAST Memory area.
+   * It holds data marked with RTC_FAST_ATTR attribute.
+   * See the file "esp_attr.h" for more information.
+   */
+  .rtc.force_fast :
+  {
+    . = ALIGN(4);
+    _rtc_force_fast_start = ABSOLUTE(.);
+
+    _coredump_rtc_fast_start = ABSOLUTE(.);
+    *(.rtc.fast.coredump .rtc.fast.coredump.*)
+    _coredump_rtc_fast_end = ABSOLUTE(.);
+
+    *(.rtc.force_fast .rtc.force_fast.*)
+    . = ALIGN(4) ;
+    _rtc_force_fast_end = ABSOLUTE(.);
+  } > rtc_data_seg
+
+  /**
+   * RTC data section holds RTC wake stub
+   * data/rodata, including from any source file
+   * named rtc_wake_stub*.c and the data marked with
+   * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
+   * The memory location of the data is dependent on
+   * CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
+   */
+  .rtc.data :
+  {
+    _rtc_data_start = ABSOLUTE(.);
+
+    _coredump_rtc_start = ABSOLUTE(.);
+    *(.rtc.coredump .rtc.coredump.*)
+    _coredump_rtc_end = ABSOLUTE(.);
+    *(.rtc.data .rtc.data.*)
+    *(.rtc.rodata .rtc.rodata.*)
+
+    *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
+    _rtc_data_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /* RTC bss, from any source file named rtc_wake_stub*.c */
+  .rtc.bss (NOLOAD) :
+  {
+    _rtc_bss_start = ABSOLUTE(.);
+    *rtc_wake_stub*.*(.bss .bss.*)
+    *rtc_wake_stub*.*(COMMON)
+
+    *(.rtc.bss)
+
+    _rtc_bss_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /**
+   * This section holds data that should not be initialized at power up
+   * and will be retained during deep sleep.
+   * User data marked with RTC_NOINIT_ATTR will be placed
+   * into this section. See the file "esp_attr.h" for more information.
+	 * The memory location of the data is dependent on CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
+   */
+  .rtc_noinit (NOLOAD):
+  {
+    . = ALIGN(4);
+    _rtc_noinit_start = ABSOLUTE(.);
+    *(.rtc_noinit .rtc_noinit.*)
+    . = ALIGN(4) ;
+    _rtc_noinit_end = ABSOLUTE(.);
+  } > rtc_data_location
+
+  /**
+   * This section located in RTC SLOW Memory area.
+   * It holds data marked with RTC_SLOW_ATTR attribute.
+   * See the file "esp_attr.h" for more information.
+   */
+  .rtc.force_slow :
+  {
+    . = ALIGN(4);
+    _rtc_force_slow_start = ABSOLUTE(.);
+    *(.rtc.force_slow .rtc.force_slow.*)
+    . = ALIGN(4) ;
+    _rtc_force_slow_end = ABSOLUTE(.);
+  } > rtc_slow_seg
+
+  /* Get size of rtc slow data based on rtc_data_location alias */
+  _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
+                        ? (_rtc_force_slow_end - _rtc_data_start)
+                        : (_rtc_force_slow_end - _rtc_force_slow_start);
+
+  _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
+                        ? (_rtc_force_fast_end - _rtc_fast_start)
+                        : (_rtc_noinit_end - _rtc_fast_start);
+
+  ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
+          "RTC_SLOW segment data does not fit.")
+
+  ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
+          "RTC_FAST segment data does not fit.")
+
+  /* Send .iram0 code to iram */
+  .iram0.vectors :
+  {
+    _iram_start = ABSOLUTE(.);
+    /* Vectors go to IRAM */
+    _vector_table = ABSOLUTE(.);
+    . = 0x0;
+    KEEP(*(.WindowVectors.text));
+    . = 0x180;
+    KEEP(*(.Level2InterruptVector.text));
+    . = 0x1c0;
+    KEEP(*(.Level3InterruptVector.text));
+    . = 0x200;
+    KEEP(*(.Level4InterruptVector.text));
+    . = 0x240;
+    KEEP(*(.Level5InterruptVector.text));
+    . = 0x280;
+    KEEP(*(.DebugExceptionVector.text));
+    . = 0x2c0;
+    KEEP(*(.NMIExceptionVector.text));
+    . = 0x300;
+    KEEP(*(.KernelExceptionVector.text));
+    . = 0x340;
+    KEEP(*(.UserExceptionVector.text));
+    . = 0x3C0;
+    KEEP(*(.DoubleExceptionVector.text));
+    . = 0x400;
+    _invalid_pc_placeholder = ABSOLUTE(.);
+    *(.*Vector.literal)
+
+    *(.UserEnter.literal);
+    *(.UserEnter.text);
+    . = ALIGN (16);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    _init_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.text :
+  {
+    /* Code marked as running out of IRAM */
+    _iram_text_start = ABSOLUTE(.);
+
+    *(.iram1 .iram1.*)
+    *libapp_trace.a:app_trace.*(.literal .literal.* .text .text.*)
+    *libapp_trace.a:app_trace_util.*(.literal .literal.* .text .text.*)
+    *libesp_event.a:default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
+    *libesp_event.a:esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
+    *libesp_hw_support.a:cpu_util.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_clk.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
+    *libesp_hw_support.a:rtc_pm.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_sleep.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_time.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:rtc_wdt.*(.literal .literal.* .text .text.*)
+    *libesp_hw_support.a:spiram_psram.*(.literal .literal.* .text .text.*)
+    *libesp_ringbuf.a:(.literal .literal.* .text .text.*)
+    *libesp_system.a:esp_err.*(.literal .literal.* .text .text.*)
+    *libesp_system.a:esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
+    *libesp_system.a:ubsan.*(.literal .literal.* .text .text.*)
+    *libfreertos.a:(EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal.* EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text.*)
+    *libfreertos.a:port.*(.literal.pxPortInitialiseStack .literal.unlikely.vPortEndScheduler .literal.vApplicationStackOverflowHook .literal.vPortAssertIfInISR .literal.vPortExitCritical .literal.vPortExitCriticalCompliance .literal.vPortReleaseTaskMPUSettings .literal.vPortSetStackWatchpoint .literal.vPortYieldOtherCore .literal.xPortEnterCriticalTimeout .literal.xPortEnterCriticalTimeoutCompliance .literal.xPortInIsrContext .literal.xPortStartScheduler .text .text.pxPortInitialiseStack .text.unlikely.vPortEndScheduler .text.vApplicationStackOverflowHook .text.vPortAssertIfInISR .text.vPortExitCritical .text.vPortExitCriticalCompliance .text.vPortReleaseTaskMPUSettings .text.vPortSetStackWatchpoint .text.vPortStoreTaskMPUSettings .text.vPortYieldOtherCore .text.xPortEnterCriticalTimeout .text.xPortEnterCriticalTimeoutCompliance .text.xPortGetTickRateHz .text.xPortInIsrContext .text.xPortStartScheduler)
+    *libfreertos.a:port_common.*(.literal.esp_startup_start_app_common .literal.vApplicationGetIdleTaskMemory .literal.vApplicationGetTimerTaskMemory .literal.xPortCheckValidTCBMem .literal.xPortcheckValidStackMem .text .text.esp_startup_start_app_common .text.vApplicationGetIdleTaskMemory .text.vApplicationGetTimerTaskMemory .text.xPortCheckValidTCBMem .text.xPortcheckValidStackMem)
+    *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
+    *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
+    *libgcov.a:(.literal .literal.* .text .text.*)
+    *libhal.a:cpu_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:i2c_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:ledc_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:soc_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
+    *libhal.a:systimer_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:wdt_hal_iram.*(.literal .literal.* .text .text.*)
+    *libheap.a:heap_tlsf.*(.literal .literal.* .text .text.*)
+    *libheap.a:multi_heap.*(.literal .literal.* .text .text.*)
+    *libheap.a:multi_heap_poisoning.*(.literal .literal.* .text .text.*)
+    *liblog.a:log.*(.literal.esp_log_write .text.esp_log_write)
+    *liblog.a:log_freertos.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_lock .text.esp_log_impl_lock)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_lock_timeout .text.esp_log_impl_lock_timeout)
+    *liblog.a:log_freertos.*(.literal.esp_log_impl_unlock .text.esp_log_impl_unlock)
+    *liblog.a:log_freertos.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
+    *libnewlib.a:abort.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:assert.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:heap.*(.literal .literal.* .text .text.*)
+    *libnewlib.a:stdatomic.*(.literal .literal.* .text .text.*)
+    *librtc.a:(.literal .literal.* .text .text.*)
+    *libsoc.a:lldesc.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_flash_timing_tuning.*(.literal .literal.* .text .text.*)
+    *libspi_flash.a:spi_timing_config.*(.literal .literal.* .text .text.*)
+    *libxt_hal.a:(.literal .literal.* .text .text.*)
+    *libxtensa.a:eri.*(.literal .literal.* .text .text.*)
+    *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*)
+
+  } > iram0_0_seg
+
+  /**
+   * This section is required to skip .iram0.text area because iram0_0_seg and
+   * dram0_0_seg reflect the same address space on different buses.
+   */
+  .dram0.dummy (NOLOAD):
+  {
+    . = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0);
+  } > dram0_0_seg
+
+  .dram0.data :
+  {
+    _data_start = ABSOLUTE(.);
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    *(.jcr)
+
+    _esp_system_init_fn_array_start = ABSOLUTE(.);
+    KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*)))
+    _esp_system_init_fn_array_end = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*)
+    *(.dram1 .dram1.*)
+    _coredump_dram_start = ABSOLUTE(.);
+    *(.dram2.coredump .dram2.coredump.*)
+    _coredump_dram_end = ABSOLUTE(.);
+    *libapp_trace.a:app_trace.*(.rodata .rodata.*)
+    *libapp_trace.a:app_trace_util.*(.rodata .rodata.*)
+    _bt_data_start = ABSOLUTE(.);
+    *libbt.a:(.data .data.*)
+    . = ALIGN(4);
+    _bt_data_end = ABSOLUTE(.);
+    _btdm_data_start = ABSOLUTE(.);
+    *libbtdm_app.a:(.data .data.*)
+    . = ALIGN(4);
+    _btdm_data_end = ABSOLUTE(.);
+    *libesp_hw_support.a:rtc_clk.*(.rodata .rodata.*)
+    *libesp_hw_support.a:spiram_psram.*(.rodata .rodata.*)
+    *libesp_system.a:esp_err.*(.rodata .rodata.*)
+    *libesp_system.a:ubsan.*(.rodata .rodata.*)
+    *libgcc.a:_divsf3.*(.rodata .rodata.*)
+    *libgcov.a:(.rodata .rodata.*)
+    *libhal.a:cpu_hal.*(.rodata .rodata.*)
+    *libhal.a:i2c_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:ledc_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:soc_hal.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_hal_gpspi.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:spi_slave_hal_iram.*(.rodata .rodata.*)
+    *libhal.a:systimer_hal.*(.rodata .rodata.*)
+    *libhal.a:wdt_hal_iram.*(.rodata .rodata.*)
+    *libheap.a:heap_tlsf.*(.rodata .rodata.*)
+    *libheap.a:multi_heap.*(.rodata .rodata.*)
+    *libheap.a:multi_heap_poisoning.*(.rodata .rodata.*)
+    *libnewlib.a:abort.*(.rodata .rodata.*)
+    *libnewlib.a:assert.*(.rodata .rodata.*)
+    *libnewlib.a:heap.*(.rodata .rodata.*)
+    *libnewlib.a:stdatomic.*(.rodata .rodata.*)
+    _nimble_data_start = ABSOLUTE(.);
+    *libnimble.a:(.data .data.*)
+    . = ALIGN(4);
+    _nimble_data_end = ABSOLUTE(.);
+    *libphy.a:(.rodata .rodata.*)
+    *libsoc.a:lldesc.*(.rodata .rodata.*)
+    *libspi_flash.a:memspi_host_driver.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_boya.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_gd.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_mxic.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_mxic_opi.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_th.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_rom_patch.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_flash_timing_tuning.*(.rodata .rodata.*)
+    *libspi_flash.a:spi_timing_config.*(.rodata .rodata.*)
+
+    _data_end = ABSOLUTE(.);
+    . = ALIGN(4);
+  } > dram0_0_seg
+
+  /**
+   * This section holds data that should not be initialized at power up.
+   * The section located in Internal SRAM memory region. The macro _NOINIT
+   * can be used as attribute to place data into this section.
+   * See the "esp_attr.h" file for more information.
+   */
+  .noinit (NOLOAD):
+  {
+    . = ALIGN(4);
+    _noinit_start = ABSOLUTE(.);
+    *(.noinit .noinit.*)
+    . = ALIGN(4) ;
+    _noinit_end = ABSOLUTE(.);
+  } > dram0_0_seg
+
+  /* Shared RAM */
+  .dram0.bss (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.ext_ram.bss*)
+
+    *(.bss .bss.*)
+    *(.ext_ram.bss .ext_ram.bss.*)
+    *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
+    *(COMMON)
+    _bt_bss_start = ABSOLUTE(.);
+    *libbt.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _bt_bss_end = ABSOLUTE(.);
+    _btdm_bss_start = ABSOLUTE(.);
+    *libbtdm_app.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _btdm_bss_end = ABSOLUTE(.);
+    _nimble_bss_start = ABSOLUTE(.);
+    *libnimble.a:(.bss .bss.* COMMON)
+    . = ALIGN(4);
+    _nimble_bss_end = ABSOLUTE(.);
+
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.share.mem)
+    *(.gnu.linkonce.b.*)
+
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+  } > dram0_0_seg
+
+  ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")
+
+  .flash.text :
+  {
+    _stext = .;
+    _instruction_reserved_start = ABSOLUTE(.);
+    _text_start = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*)
+    *(.wifi0iram .wifi0iram.*)
+    *(.wifiorslpiram .wifiorslpiram.*)
+    *(.wifirxiram .wifirxiram.*)
+    *(.wifislpiram .wifislpiram.*)
+    *(.wifislprxiram .wifislprxiram.*)
+    *libesp_event.a:default_event_loop.*(.literal.esp_event_handler_instance_register .literal.esp_event_handler_instance_unregister .literal.esp_event_handler_register .literal.esp_event_handler_unregister .literal.esp_event_loop_create_default .literal.esp_event_loop_delete_default .literal.esp_event_post .literal.esp_event_send_to_default_loop .text .text.esp_event_handler_instance_register .text.esp_event_handler_instance_unregister .text.esp_event_handler_register .text.esp_event_handler_unregister .text.esp_event_loop_create_default .text.esp_event_loop_delete_default .text.esp_event_post .text.esp_event_send_to_default_loop)
+    *libesp_event.a:esp_event.*(.literal.base_node_add_handler .literal.esp_event_handler_instance_register_with .literal.esp_event_handler_instance_unregister_with .literal.esp_event_handler_register_with .literal.esp_event_handler_register_with_internal .literal.esp_event_handler_unregister_with .literal.esp_event_handler_unregister_with_internal .literal.esp_event_loop_create .literal.esp_event_loop_delete .literal.esp_event_loop_run .literal.esp_event_loop_run_task .literal.esp_event_post_to .literal.handler_instances_add .literal.handler_instances_remove .literal.handler_instances_remove_all$isra$1 .literal.loop_node_add_handler .text .text.base_node_add_handler .text.esp_event_dump .text.esp_event_handler_instance_register_with .text.esp_event_handler_instance_unregister_with .text.esp_event_handler_register_with .text.esp_event_handler_register_with_internal .text.esp_event_handler_unregister_with .text.esp_event_handler_unregister_with_internal .text.esp_event_loop_create .text.esp_event_loop_delete .text.esp_event_loop_run .text.esp_event_loop_run_task .text.esp_event_post_to .text.handler_instances_add .text.handler_instances_remove .text.handler_instances_remove_all$isra$1 .text.loop_node_add_handler)
+    *libesp_hw_support.a:rtc_init.*(.literal.rtc_init .literal.rtc_vddsdio_get_config .text .text.rtc_init .text.rtc_vddsdio_get_config)
+    *libesp_system.a:esp_system.*(.literal.esp_get_free_heap_size .literal.esp_get_free_internal_heap_size .literal.esp_get_idf_version .literal.esp_get_minimum_free_heap_size .literal.esp_register_shutdown_handler .literal.esp_unregister_shutdown_handler .text .text.esp_get_free_heap_size .text.esp_get_free_internal_heap_size .text.esp_get_idf_version .text.esp_get_minimum_free_heap_size .text.esp_register_shutdown_handler .text.esp_unregister_shutdown_handler)
+    *libfreertos.a:port.*(.literal.esp_startup_start_app .text.esp_startup_start_app)
+    *libfreertos.a:port.*(.literal.esp_startup_start_app_other_cores .text.esp_startup_start_app_other_cores)
+    *libfreertos.a:port_common.*(.literal.main_task .text.main_task)
+    *liblog.a:log.*(.literal.esp_log_level_get .literal.esp_log_level_set .literal.esp_log_set_vprintf .literal.esp_log_writev .literal.heap_bubble_down .literal.s_log_level_get_and_unlock .text .text.esp_log_level_get .text.esp_log_level_set .text.esp_log_set_vprintf .text.esp_log_writev .text.heap_bubble_down .text.s_log_level_get_and_unlock)
+    *liblog.a:log_freertos.*(.literal.esp_log_system_timestamp .text .text.esp_log_system_timestamp)
+
+    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+
+    /** CPU will try to prefetch up to 16 bytes of
+      * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
+      * safe access to up to 16 bytes after the last real instruction, add
+      * dummy bytes to ensure this
+      */
+    . += _esp_flash_mmap_prefetch_pad_size;
+
+    _text_end = ABSOLUTE(.);
+    _instruction_reserved_end = ABSOLUTE(.);
+    _etext = .;
+
+    /**
+     * Similar to _iram_start, this symbol goes here so it is
+     * resolved by addr2line in preference to the first symbol in
+     * the flash.text segment.
+     */
+    _flash_cache_start = ABSOLUTE(0);
+  } > default_code_seg
+
+  /**
+   * This dummy section represents the .flash.text section but in default_rodata_seg.
+   * Thus, it must have its alignement and (at least) its size.
+   */
+  .flash_rodata_dummy (NOLOAD):
+  {
+    _flash_rodata_dummy_start = .;
+    /* Start at the same alignement constraint than .flash.text */
+    . = ALIGN(ALIGNOF(.flash.text));
+    /* Create an empty gap as big as .flash.text section */
+    . = . + SIZEOF(.flash.text);
+    /* Prepare the alignement of the section above. Few bytes (0x20) must be
+     * added for the mapping header. */
+    . = ALIGN(0x10000) + 0x20;
+    _rodata_reserved_start = .;
+  } > default_rodata_seg
+
+  .flash.appdesc : ALIGN(0x10)
+  {
+    _rodata_start = ABSOLUTE(.);
+
+    *(.rodata_desc .rodata_desc.*)               /* Should be the first.  App version info.        DO NOT PUT ANYTHING BEFORE IT! */
+    *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
+
+    /* Create an empty gap within this section. Thanks to this, the end of this
+     * section will match .flah.rodata's begin address. Thus, both sections
+     * will be merged when creating the final bin image. */
+    . = ALIGN(ALIGNOF(.flash.rodata));
+  } >default_rodata_seg
+
+  .flash.rodata : ALIGN(0x10)
+  {
+    _flash_rodata_start = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:spiram_psram.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:assert.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_mxic_opi.* *libspi_flash.a:spi_flash_chip_th.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_timing_tuning.* *libspi_flash.a:spi_timing_config.*) .rodata.*)
+    *(.rodata_wlog_error .rodata_wlog_error.*)
+
+    *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table .gcc_except_table.*)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    . = (. + 3) & ~ 3;
+    __eh_frame = ABSOLUTE(.);
+    KEEP(*(.eh_frame))
+    . = (. + 7) & ~ 3;
+    /* C++ constructor and destructor tables */
+    /* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt */
+    __init_array_start = ABSOLUTE(.);
+    KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
+    __init_array_end = ABSOLUTE(.);
+    KEEP (*crtbegin.*(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /* C++ exception handlers table: */
+    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
+    soc_reserved_memory_region_start = ABSOLUTE(.);
+    KEEP (*(.reserved_memory_address))
+    soc_reserved_memory_region_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+    /* Literals are also RO data. */
+    _lit4_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.lit4.*)
+    *(.gnu.linkonce.lit4.*)
+    _lit4_end = ABSOLUTE(.);
+    . = ALIGN(4);
+    _thread_local_start = ABSOLUTE(.);
+    *(.tdata)
+    *(.tdata.*)
+    *(.tbss)
+    *(.tbss.*)
+    _thread_local_end = ABSOLUTE(.);
+    _rodata_reserved_end = ABSOLUTE(.);
+    . = ALIGN(4);
+  } > default_rodata_seg
+
+  _flash_rodata_align = ALIGNOF(.flash.rodata);
+
+  .flash.rodata_noload (NOLOAD) :
+  {
+    . = ALIGN (4);
+    *(.rodata_wlog_debug .rodata_wlog_debug.*)
+    *(.rodata_wlog_info .rodata_wlog_info.*)
+    *(.rodata_wlog_verbose .rodata_wlog_verbose.*)
+    *(.rodata_wlog_warning .rodata_wlog_warning.*)
+  } > default_rodata_seg
+
+  /* Marks the end of IRAM code segment */
+  .iram0.text_end (NOLOAD) :
+  {
+    /* ESP32-S3 memprot requires 16B padding for possible CPU prefetch and 256B alignment for PMS split lines */
+    . += _esp_memprot_prefetch_pad_size;
+    . = ALIGN(_esp_memprot_align_size);
+    /* iram_end_test section exists for use by memprot unit tests only */
+    *(.iram_end_test)
+    _iram_text_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.data :
+  {
+    . = ALIGN(4);
+    _iram_data_start = ABSOLUTE(.);
+
+    *(.iram.data .iram.data.*)
+    _coredump_iram_start = ABSOLUTE(.);
+    *(.iram2.coredump .iram2.coredump.*)
+    _coredump_iram_end = ABSOLUTE(.);
+
+    _iram_data_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.bss (NOLOAD) :
+  {
+    . = ALIGN(4);
+    _iram_bss_start = ABSOLUTE(.);
+
+    *(.iram.bss .iram.bss.*)
+
+    _iram_bss_end = ABSOLUTE(.);
+    . = ALIGN(4);
+    _iram_end = ABSOLUTE(.);
+   } > iram0_0_seg
+
+  /* Marks the end of data, bss and possibly rodata  */
+  .dram0.heap_start (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _heap_start = ABSOLUTE(.);
+  } > dram0_0_seg
+}
+
+ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
+          "IRAM0 segment data does not fit.")
+
+ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
+          "DRAM segment data does not fit.")
diff --git a/tools/sdk/esp32s3/sdkconfig b/tools/sdk/esp32s3/sdkconfig
new file mode 100644
index 00000000000..07f6a585cea
--- /dev/null
+++ b/tools/sdk/esp32s3/sdkconfig
@@ -0,0 +1,2512 @@
+#
+# Automatically generated file. DO NOT EDIT.
+# Espressif IoT Development Framework (ESP-IDF) Project Configuration
+#
+CONFIG_IDF_CMAKE=y
+CONFIG_IDF_TARGET_ARCH_XTENSA=y
+CONFIG_IDF_TARGET="esp32s3"
+CONFIG_IDF_TARGET_ESP32S3=y
+CONFIG_IDF_FIRMWARE_CHIP_ID=0x0009
+
+#
+# SDK tool configuration
+#
+CONFIG_SDK_TOOLPREFIX="xtensa-esp32s3-elf-"
+# CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS is not set
+# end of SDK tool configuration
+
+#
+# Build type
+#
+CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y
+# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set
+CONFIG_APP_BUILD_GENERATE_BINARIES=y
+CONFIG_APP_BUILD_BOOTLOADER=y
+CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y
+# end of Build type
+
+#
+# Application manager
+#
+CONFIG_APP_COMPILE_TIME_DATE=y
+# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set
+# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set
+# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set
+CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16
+# end of Application manager
+
+#
+# Bootloader config
+#
+CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x0
+CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
+# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set
+# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set
+# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set
+CONFIG_BOOTLOADER_LOG_LEVEL_NONE=y
+# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_INFO is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set
+CONFIG_BOOTLOADER_LOG_LEVEL=0
+CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y
+# CONFIG_BOOTLOADER_FACTORY_RESET is not set
+# CONFIG_BOOTLOADER_APP_TEST is not set
+CONFIG_BOOTLOADER_WDT_ENABLE=y
+# CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set
+CONFIG_BOOTLOADER_WDT_TIME_MS=9000
+# CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set
+CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP=y
+# CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON is not set
+# CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set
+CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0x10
+# CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set
+CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y
+# end of Bootloader config
+
+#
+# Security features
+#
+CONFIG_SECURE_BOOT_SUPPORTS_RSA=y
+CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE=y
+# CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set
+# CONFIG_SECURE_BOOT is not set
+# CONFIG_SECURE_FLASH_ENC_ENABLED is not set
+# end of Security features
+
+#
+# Boot ROM Behavior
+#
+CONFIG_BOOT_ROM_LOG_ALWAYS_ON=y
+# CONFIG_BOOT_ROM_LOG_ALWAYS_OFF is not set
+# CONFIG_BOOT_ROM_LOG_ON_GPIO_HIGH is not set
+# CONFIG_BOOT_ROM_LOG_ON_GPIO_LOW is not set
+# end of Boot ROM Behavior
+
+#
+# Serial flasher config
+#
+CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200
+# CONFIG_ESPTOOLPY_NO_STUB is not set
+# CONFIG_ESPTOOLPY_OCT_FLASH is not set
+CONFIG_ESPTOOLPY_FLASHMODE_QIO=y
+# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set
+# CONFIG_ESPTOOLPY_FLASHMODE_DIO is not set
+# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set
+CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y
+CONFIG_ESPTOOLPY_FLASHMODE="dio"
+# CONFIG_ESPTOOLPY_FLASHFREQ_120M is not set
+CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
+# CONFIG_ESPTOOLPY_FLASHFREQ_40M is not set
+# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set
+CONFIG_ESPTOOLPY_FLASHFREQ="80m"
+# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set
+CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
+# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set
+CONFIG_ESPTOOLPY_FLASHSIZE="4MB"
+CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y
+CONFIG_ESPTOOLPY_BEFORE_RESET=y
+# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set
+CONFIG_ESPTOOLPY_BEFORE="default_reset"
+CONFIG_ESPTOOLPY_AFTER_RESET=y
+# CONFIG_ESPTOOLPY_AFTER_NORESET is not set
+CONFIG_ESPTOOLPY_AFTER="hard_reset"
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_CONSOLE is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_9600B is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_57600B is not set
+CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B=y
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_230400B is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_921600B is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_2MB is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER is not set
+CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200
+CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
+# end of Serial flasher config
+
+#
+# Partition Table
+#
+CONFIG_PARTITION_TABLE_SINGLE_APP=y
+# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set
+# CONFIG_PARTITION_TABLE_TWO_OTA is not set
+# CONFIG_PARTITION_TABLE_CUSTOM is not set
+CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
+CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv"
+CONFIG_PARTITION_TABLE_OFFSET=0x8000
+CONFIG_PARTITION_TABLE_MD5=y
+# end of Partition Table
+
+CONFIG_LIB_BUILDER_FLASHMODE="qio"
+CONFIG_LIB_BUILDER_FLASHFREQ="80m"
+
+#
+# ESP RainMaker Config
+#
+# CONFIG_ESP_RMAKER_NO_CLAIM is not set
+# CONFIG_ESP_RMAKER_SELF_CLAIM is not set
+CONFIG_ESP_RMAKER_ASSISTED_CLAIM=y
+CONFIG_ESP_RMAKER_CLAIM_TYPE=2
+CONFIG_ESP_RMAKER_MQTT_HOST="a1p72mufdu6064-ats.iot.us-east-1.amazonaws.com"
+CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE=1024
+# CONFIG_ESP_RMAKER_DISABLE_USER_MAPPING_PROV is not set
+# CONFIG_ESP_RMAKER_USER_ID_CHECK is not set
+# CONFIG_ESP_RMAKER_LOCAL_CTRL_ENABLE is not set
+CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0=y
+# CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_1 is not set
+CONFIG_ESP_RMAKER_CONSOLE_UART_NUM=0
+
+#
+# ESP RainMaker OTA Config
+#
+CONFIG_ESP_RMAKER_OTA_AUTOFETCH=y
+CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD=0
+# CONFIG_ESP_RMAKER_SKIP_COMMON_NAME_CHECK is not set
+# CONFIG_ESP_RMAKER_SKIP_VERSION_CHECK is not set
+# CONFIG_ESP_RMAKER_SKIP_PROJECT_NAME_CHECK is not set
+CONFIG_ESP_RMAKER_OTA_HTTP_RX_BUFFER_SIZE=1024
+# end of ESP RainMaker OTA Config
+
+#
+# ESP RainMaker Scheduling
+#
+CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES=10
+# end of ESP RainMaker Scheduling
+
+#
+# ESP RainMaker Scenes
+#
+CONFIG_ESP_RMAKER_SCENES_MAX_SCENES=10
+# CONFIG_ESP_RMAKER_SCENES_DEACTIVATE_SUPPORT is not set
+# end of ESP RainMaker Scenes
+# end of ESP RainMaker Config
+
+#
+# Arduino Configuration
+#
+CONFIG_ENABLE_ARDUINO_DEPENDS=y
+CONFIG_AUTOSTART_ARDUINO=y
+# CONFIG_ARDUINO_RUN_CORE0 is not set
+CONFIG_ARDUINO_RUN_CORE1=y
+# CONFIG_ARDUINO_RUN_NO_AFFINITY is not set
+CONFIG_ARDUINO_RUNNING_CORE=1
+CONFIG_ARDUINO_LOOP_STACK_SIZE=8192
+# CONFIG_ARDUINO_EVENT_RUN_CORE0 is not set
+CONFIG_ARDUINO_EVENT_RUN_CORE1=y
+# CONFIG_ARDUINO_EVENT_RUN_NO_AFFINITY is not set
+CONFIG_ARDUINO_EVENT_RUNNING_CORE=1
+CONFIG_ARDUINO_UDP_RUN_CORE0=y
+# CONFIG_ARDUINO_UDP_RUN_CORE1 is not set
+# CONFIG_ARDUINO_UDP_RUN_NO_AFFINITY is not set
+CONFIG_ARDUINO_UDP_TASK_PRIORITY=3
+CONFIG_ARDUINO_UDP_RUNNING_CORE=0
+# CONFIG_ARDUINO_ISR_IRAM is not set
+# CONFIG_DISABLE_HAL_LOCKS is not set
+
+#
+# Debug Log Configuration
+#
+# CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_NONE is not set
+CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR=y
+# CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_WARN is not set
+# CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_INFO is not set
+# CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_DEBUG is not set
+# CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_VERBOSE is not set
+CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL=1
+# CONFIG_ARDUHAL_LOG_COLORS is not set
+CONFIG_ARDUHAL_ESP_LOG=y
+# end of Debug Log Configuration
+
+CONFIG_ARDUHAL_PARTITION_SCHEME_DEFAULT=y
+# CONFIG_ARDUHAL_PARTITION_SCHEME_MINIMAL is not set
+# CONFIG_ARDUHAL_PARTITION_SCHEME_NO_OTA is not set
+# CONFIG_ARDUHAL_PARTITION_SCHEME_HUGE_APP is not set
+# CONFIG_ARDUHAL_PARTITION_SCHEME_MIN_SPIFFS is not set
+CONFIG_ARDUHAL_PARTITION_SCHEME="default"
+# CONFIG_AUTOCONNECT_WIFI is not set
+# CONFIG_ARDUINO_SELECTIVE_COMPILATION is not set
+# end of Arduino Configuration
+
+#
+# Arduino TinyUSB
+#
+CONFIG_TINYUSB_ENABLED=y
+
+#
+# Serial (CDC) driver
+#
+CONFIG_TINYUSB_CDC_ENABLED=y
+CONFIG_TINYUSB_DESC_CDC_STRING="Espressif CDC Device"
+CONFIG_TINYUSB_CDC_RX_BUFSIZE=64
+CONFIG_TINYUSB_CDC_TX_BUFSIZE=64
+# end of Serial (CDC) driver
+
+#
+# Mass Storage (MSC) driver
+#
+CONFIG_TINYUSB_MSC_ENABLED=y
+CONFIG_TINYUSB_DESC_MSC_STRING="Espressif MSC Device"
+CONFIG_TINYUSB_MSC_BUFSIZE=4096
+# end of Mass Storage (MSC) driver
+
+#
+# Human Interface (HID) driver
+#
+CONFIG_TINYUSB_HID_ENABLED=y
+CONFIG_TINYUSB_DESC_HID_STRING="Espressif HID Device"
+CONFIG_TINYUSB_HID_BUFSIZE=64
+# end of Human Interface (HID) driver
+
+#
+# MIDI driver
+#
+CONFIG_TINYUSB_MIDI_ENABLED=y
+CONFIG_TINYUSB_DESC_MIDI_STRING="Espressif MIDI Device"
+CONFIG_TINYUSB_MIDI_RX_BUFSIZE=64
+CONFIG_TINYUSB_MIDI_TX_BUFSIZE=64
+# end of MIDI driver
+
+#
+# VIDEO driver
+#
+CONFIG_TINYUSB_VIDEO_ENABLED=y
+CONFIG_TINYUSB_DESC_VIDEO_STRING="Espressif VIDEO Device"
+CONFIG_TINYUSB_VIDEO_STREAMING_BUFSIZE=64
+CONFIG_TINYUSB_VIDEO_STREAMING_IFS=1
+# end of VIDEO driver
+
+#
+# DFU Runtime driver
+#
+CONFIG_TINYUSB_DFU_RT_ENABLED=y
+CONFIG_TINYUSB_DESC_DFU_RT_STRING="Espressif DFU_RT Device"
+# end of DFU Runtime driver
+
+#
+# VENDOR driver
+#
+CONFIG_TINYUSB_VENDOR_ENABLED=y
+CONFIG_TINYUSB_DESC_VENDOR_STRING="Espressif VENDOR Device"
+CONFIG_TINYUSB_VENDOR_RX_BUFSIZE=64
+CONFIG_TINYUSB_VENDOR_TX_BUFSIZE=64
+# end of VENDOR driver
+
+CONFIG_TINYUSB_DEBUG_LEVEL=0
+# end of Arduino TinyUSB
+
+#
+# ESP Speech Recognition
+#
+CONFIG_MODEL_IN_SPIFFS=y
+# CONFIG_MODEL_IN_SDCARD is not set
+CONFIG_USE_WAKENET=y
+# CONFIG_SR_WN_MODEL_WN7_QUANT is not set
+# CONFIG_SR_WN_MODEL_WN7_QUANT8 is not set
+CONFIG_SR_WN_MODEL_WN8_QUANT=y
+# CONFIG_SR_WN_MODEL_WN8_QUANT8 is not set
+# CONFIG_SR_WN_WN8_ALEXA is not set
+CONFIG_SR_WN_WN8_HIESP=y
+CONFIG_USE_MULTINET=y
+# CONFIG_SR_MN_CHINESE is not set
+CONFIG_SR_MN_ENGLISH=y
+CONFIG_SR_MN_EN_MULTINET5_SINGLE_RECOGNITION_QUANT8=y
+
+#
+# Add speech commands
+#
+CONFIG_EN_SPEECH_COMMAND_ID0="TfL Mm c qbK"
+CONFIG_EN_SPEECH_COMMAND_ID1="Sgl c Sel"
+CONFIG_EN_SPEECH_COMMAND_ID2="PLd NoZ paNcL"
+CONFIG_EN_SPEECH_COMMAND_ID3="TkN nN Mi StNDBnKS"
+CONFIG_EN_SPEECH_COMMAND_ID4="TkN eF Mi StNDBnKS"
+CONFIG_EN_SPEECH_COMMAND_ID5="hicST VnLYoM"
+CONFIG_EN_SPEECH_COMMAND_ID6="LbcST VnLYoM"
+CONFIG_EN_SPEECH_COMMAND_ID7="gNKRmS jc VnLYoM"
+CONFIG_EN_SPEECH_COMMAND_ID8="DgKRmS jc VnLYoM"
+CONFIG_EN_SPEECH_COMMAND_ID9="TkN nN jc TmVm"
+CONFIG_EN_SPEECH_COMMAND_ID10="TkN eF jc TmVm"
+CONFIG_EN_SPEECH_COMMAND_ID11="MdK Mm c Tm"
+CONFIG_EN_SPEECH_COMMAND_ID12="MdK Mm c KnFm"
+CONFIG_EN_SPEECH_COMMAND_ID13="TkN nN jc LiT"
+CONFIG_EN_SPEECH_COMMAND_ID14="TkN eF jc LiT"
+CONFIG_EN_SPEECH_COMMAND_ID15="pdNq jc KcLk To RfD"
+CONFIG_EN_SPEECH_COMMAND_ID16="pdNq jc KcLk To GRmN"
+CONFIG_EN_SPEECH_COMMAND_ID17="TkN nN eL jc LiTS"
+CONFIG_EN_SPEECH_COMMAND_ID18="TkN eF eL jc LiTS"
+CONFIG_EN_SPEECH_COMMAND_ID19="TkN nN jc fR KcNDgscNk"
+CONFIG_EN_SPEECH_COMMAND_ID20="TkN eF jc fR KcNDgscNk"
+CONFIG_EN_SPEECH_COMMAND_ID21="SfT jc TfMPRcpk To SgKSTmN DgGRmZ"
+CONFIG_EN_SPEECH_COMMAND_ID22="SfT jc TfMPRcpk To SfVcNTmN DgGRmZ"
+CONFIG_EN_SPEECH_COMMAND_ID23="SfT jc TfMPRcpk To dTmN DgGRmZ"
+CONFIG_EN_SPEECH_COMMAND_ID24="SfT jc TfMPRcpk To NiNTmN DgGRmZ"
+CONFIG_EN_SPEECH_COMMAND_ID25="SfT jc TfMPRcpk To TWfNTm DgGRmZ"
+CONFIG_EN_SPEECH_COMMAND_ID26="SfT jc TfMPRcpk To TWfNTm WcN DgGRmZ"
+CONFIG_EN_SPEECH_COMMAND_ID27="SfT jc TfMPRcpk To TWfNTm To DgGRmZ"
+CONFIG_EN_SPEECH_COMMAND_ID28="SfT jc TfMPRcpk To TWfNTm vRm DgGRmZ"
+CONFIG_EN_SPEECH_COMMAND_ID29="SfT jc TfMPRcpk To TWfNTm FeR DgGRmZ"
+CONFIG_EN_SPEECH_COMMAND_ID30="SfT jc TfMPRcpk To TWfNTm FiV DgGRmZ"
+CONFIG_EN_SPEECH_COMMAND_ID31="SfT jc TfMPRcpk To TWfNTm SgKS DgGRmZ"
+CONFIG_EN_SPEECH_COMMAND_ID32=""
+CONFIG_EN_SPEECH_COMMAND_ID33=""
+CONFIG_EN_SPEECH_COMMAND_ID34=""
+CONFIG_EN_SPEECH_COMMAND_ID35=""
+CONFIG_EN_SPEECH_COMMAND_ID36=""
+CONFIG_EN_SPEECH_COMMAND_ID37=""
+CONFIG_EN_SPEECH_COMMAND_ID38=""
+CONFIG_EN_SPEECH_COMMAND_ID39=""
+CONFIG_EN_SPEECH_COMMAND_ID40=""
+CONFIG_EN_SPEECH_COMMAND_ID41=""
+CONFIG_EN_SPEECH_COMMAND_ID42=""
+CONFIG_EN_SPEECH_COMMAND_ID43=""
+CONFIG_EN_SPEECH_COMMAND_ID44=""
+CONFIG_EN_SPEECH_COMMAND_ID45=""
+CONFIG_EN_SPEECH_COMMAND_ID46=""
+CONFIG_EN_SPEECH_COMMAND_ID47=""
+CONFIG_EN_SPEECH_COMMAND_ID48=""
+CONFIG_EN_SPEECH_COMMAND_ID49=""
+CONFIG_EN_SPEECH_COMMAND_ID50=""
+CONFIG_EN_SPEECH_COMMAND_ID51=""
+CONFIG_EN_SPEECH_COMMAND_ID52=""
+CONFIG_EN_SPEECH_COMMAND_ID53=""
+CONFIG_EN_SPEECH_COMMAND_ID54=""
+CONFIG_EN_SPEECH_COMMAND_ID55=""
+CONFIG_EN_SPEECH_COMMAND_ID56=""
+CONFIG_EN_SPEECH_COMMAND_ID57=""
+CONFIG_EN_SPEECH_COMMAND_ID58=""
+CONFIG_EN_SPEECH_COMMAND_ID59=""
+CONFIG_EN_SPEECH_COMMAND_ID60=""
+CONFIG_EN_SPEECH_COMMAND_ID61=""
+CONFIG_EN_SPEECH_COMMAND_ID62=""
+CONFIG_EN_SPEECH_COMMAND_ID63=""
+CONFIG_EN_SPEECH_COMMAND_ID64=""
+CONFIG_EN_SPEECH_COMMAND_ID65=""
+CONFIG_EN_SPEECH_COMMAND_ID66=""
+CONFIG_EN_SPEECH_COMMAND_ID67=""
+CONFIG_EN_SPEECH_COMMAND_ID68=""
+CONFIG_EN_SPEECH_COMMAND_ID69=""
+CONFIG_EN_SPEECH_COMMAND_ID70=""
+CONFIG_EN_SPEECH_COMMAND_ID71=""
+CONFIG_EN_SPEECH_COMMAND_ID72=""
+CONFIG_EN_SPEECH_COMMAND_ID73=""
+CONFIG_EN_SPEECH_COMMAND_ID74=""
+CONFIG_EN_SPEECH_COMMAND_ID75=""
+CONFIG_EN_SPEECH_COMMAND_ID76=""
+CONFIG_EN_SPEECH_COMMAND_ID77=""
+CONFIG_EN_SPEECH_COMMAND_ID78=""
+CONFIG_EN_SPEECH_COMMAND_ID79=""
+CONFIG_EN_SPEECH_COMMAND_ID80=""
+CONFIG_EN_SPEECH_COMMAND_ID81=""
+CONFIG_EN_SPEECH_COMMAND_ID82=""
+CONFIG_EN_SPEECH_COMMAND_ID83=""
+CONFIG_EN_SPEECH_COMMAND_ID84=""
+CONFIG_EN_SPEECH_COMMAND_ID85=""
+CONFIG_EN_SPEECH_COMMAND_ID86=""
+CONFIG_EN_SPEECH_COMMAND_ID87=""
+CONFIG_EN_SPEECH_COMMAND_ID88=""
+CONFIG_EN_SPEECH_COMMAND_ID89=""
+CONFIG_EN_SPEECH_COMMAND_ID90=""
+CONFIG_EN_SPEECH_COMMAND_ID91=""
+CONFIG_EN_SPEECH_COMMAND_ID92=""
+CONFIG_EN_SPEECH_COMMAND_ID93=""
+CONFIG_EN_SPEECH_COMMAND_ID94=""
+CONFIG_EN_SPEECH_COMMAND_ID95=""
+CONFIG_EN_SPEECH_COMMAND_ID96=""
+CONFIG_EN_SPEECH_COMMAND_ID97=""
+CONFIG_EN_SPEECH_COMMAND_ID98=""
+CONFIG_EN_SPEECH_COMMAND_ID99=""
+CONFIG_EN_SPEECH_COMMAND_ID100=""
+CONFIG_EN_SPEECH_COMMAND_ID101=""
+CONFIG_EN_SPEECH_COMMAND_ID102=""
+CONFIG_EN_SPEECH_COMMAND_ID103=""
+CONFIG_EN_SPEECH_COMMAND_ID104=""
+CONFIG_EN_SPEECH_COMMAND_ID105=""
+CONFIG_EN_SPEECH_COMMAND_ID106=""
+CONFIG_EN_SPEECH_COMMAND_ID107=""
+CONFIG_EN_SPEECH_COMMAND_ID108=""
+CONFIG_EN_SPEECH_COMMAND_ID109=""
+CONFIG_EN_SPEECH_COMMAND_ID110=""
+CONFIG_EN_SPEECH_COMMAND_ID111=""
+CONFIG_EN_SPEECH_COMMAND_ID112=""
+CONFIG_EN_SPEECH_COMMAND_ID113=""
+CONFIG_EN_SPEECH_COMMAND_ID114=""
+CONFIG_EN_SPEECH_COMMAND_ID115=""
+CONFIG_EN_SPEECH_COMMAND_ID116=""
+CONFIG_EN_SPEECH_COMMAND_ID117=""
+CONFIG_EN_SPEECH_COMMAND_ID118=""
+CONFIG_EN_SPEECH_COMMAND_ID119=""
+CONFIG_EN_SPEECH_COMMAND_ID120=""
+CONFIG_EN_SPEECH_COMMAND_ID121=""
+CONFIG_EN_SPEECH_COMMAND_ID122=""
+CONFIG_EN_SPEECH_COMMAND_ID123=""
+CONFIG_EN_SPEECH_COMMAND_ID124=""
+CONFIG_EN_SPEECH_COMMAND_ID125=""
+CONFIG_EN_SPEECH_COMMAND_ID126=""
+CONFIG_EN_SPEECH_COMMAND_ID127=""
+CONFIG_EN_SPEECH_COMMAND_ID128=""
+CONFIG_EN_SPEECH_COMMAND_ID129=""
+CONFIG_EN_SPEECH_COMMAND_ID130=""
+CONFIG_EN_SPEECH_COMMAND_ID131=""
+CONFIG_EN_SPEECH_COMMAND_ID132=""
+CONFIG_EN_SPEECH_COMMAND_ID133=""
+CONFIG_EN_SPEECH_COMMAND_ID134=""
+CONFIG_EN_SPEECH_COMMAND_ID135=""
+CONFIG_EN_SPEECH_COMMAND_ID136=""
+CONFIG_EN_SPEECH_COMMAND_ID137=""
+CONFIG_EN_SPEECH_COMMAND_ID138=""
+CONFIG_EN_SPEECH_COMMAND_ID139=""
+CONFIG_EN_SPEECH_COMMAND_ID140=""
+CONFIG_EN_SPEECH_COMMAND_ID141=""
+CONFIG_EN_SPEECH_COMMAND_ID142=""
+CONFIG_EN_SPEECH_COMMAND_ID143=""
+CONFIG_EN_SPEECH_COMMAND_ID144=""
+CONFIG_EN_SPEECH_COMMAND_ID145=""
+CONFIG_EN_SPEECH_COMMAND_ID146=""
+CONFIG_EN_SPEECH_COMMAND_ID147=""
+CONFIG_EN_SPEECH_COMMAND_ID148=""
+CONFIG_EN_SPEECH_COMMAND_ID149=""
+CONFIG_EN_SPEECH_COMMAND_ID150=""
+CONFIG_EN_SPEECH_COMMAND_ID151=""
+CONFIG_EN_SPEECH_COMMAND_ID152=""
+CONFIG_EN_SPEECH_COMMAND_ID153=""
+CONFIG_EN_SPEECH_COMMAND_ID154=""
+CONFIG_EN_SPEECH_COMMAND_ID155=""
+CONFIG_EN_SPEECH_COMMAND_ID156=""
+CONFIG_EN_SPEECH_COMMAND_ID157=""
+CONFIG_EN_SPEECH_COMMAND_ID158=""
+CONFIG_EN_SPEECH_COMMAND_ID159=""
+CONFIG_EN_SPEECH_COMMAND_ID160=""
+CONFIG_EN_SPEECH_COMMAND_ID161=""
+CONFIG_EN_SPEECH_COMMAND_ID162=""
+CONFIG_EN_SPEECH_COMMAND_ID163=""
+CONFIG_EN_SPEECH_COMMAND_ID164=""
+CONFIG_EN_SPEECH_COMMAND_ID165=""
+CONFIG_EN_SPEECH_COMMAND_ID166=""
+CONFIG_EN_SPEECH_COMMAND_ID167=""
+CONFIG_EN_SPEECH_COMMAND_ID168=""
+CONFIG_EN_SPEECH_COMMAND_ID169=""
+CONFIG_EN_SPEECH_COMMAND_ID170=""
+CONFIG_EN_SPEECH_COMMAND_ID171=""
+CONFIG_EN_SPEECH_COMMAND_ID172=""
+CONFIG_EN_SPEECH_COMMAND_ID173=""
+CONFIG_EN_SPEECH_COMMAND_ID174=""
+CONFIG_EN_SPEECH_COMMAND_ID175=""
+CONFIG_EN_SPEECH_COMMAND_ID176=""
+CONFIG_EN_SPEECH_COMMAND_ID177=""
+CONFIG_EN_SPEECH_COMMAND_ID178=""
+CONFIG_EN_SPEECH_COMMAND_ID179=""
+CONFIG_EN_SPEECH_COMMAND_ID180=""
+CONFIG_EN_SPEECH_COMMAND_ID181=""
+CONFIG_EN_SPEECH_COMMAND_ID182=""
+CONFIG_EN_SPEECH_COMMAND_ID183=""
+CONFIG_EN_SPEECH_COMMAND_ID184=""
+CONFIG_EN_SPEECH_COMMAND_ID185=""
+CONFIG_EN_SPEECH_COMMAND_ID186=""
+CONFIG_EN_SPEECH_COMMAND_ID187=""
+CONFIG_EN_SPEECH_COMMAND_ID188=""
+CONFIG_EN_SPEECH_COMMAND_ID189=""
+CONFIG_EN_SPEECH_COMMAND_ID190=""
+CONFIG_EN_SPEECH_COMMAND_ID191=""
+CONFIG_EN_SPEECH_COMMAND_ID192=""
+CONFIG_EN_SPEECH_COMMAND_ID193=""
+CONFIG_EN_SPEECH_COMMAND_ID194=""
+CONFIG_EN_SPEECH_COMMAND_ID195=""
+CONFIG_EN_SPEECH_COMMAND_ID196=""
+CONFIG_EN_SPEECH_COMMAND_ID197=""
+CONFIG_EN_SPEECH_COMMAND_ID198=""
+CONFIG_EN_SPEECH_COMMAND_ID199=""
+# end of Add speech commands
+# end of ESP Speech Recognition
+
+#
+# Compiler options
+#
+# CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set
+CONFIG_COMPILER_OPTIMIZATION_SIZE=y
+# CONFIG_COMPILER_OPTIMIZATION_PERF is not set
+# CONFIG_COMPILER_OPTIMIZATION_NONE is not set
+CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y
+# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set
+# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set
+CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=2
+# CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set
+CONFIG_COMPILER_HIDE_PATHS_MACROS=y
+CONFIG_COMPILER_CXX_EXCEPTIONS=y
+CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE=0
+# CONFIG_COMPILER_CXX_RTTI is not set
+# CONFIG_COMPILER_STACK_CHECK_MODE_NONE is not set
+CONFIG_COMPILER_STACK_CHECK_MODE_NORM=y
+# CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set
+# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set
+CONFIG_COMPILER_STACK_CHECK=y
+CONFIG_COMPILER_WARN_WRITE_STRINGS=y
+# CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set
+# CONFIG_COMPILER_DUMP_RTL_FILES is not set
+# end of Compiler options
+
+#
+# Component config
+#
+
+#
+# Application Level Tracing
+#
+# CONFIG_APPTRACE_DEST_JTAG is not set
+CONFIG_APPTRACE_DEST_NONE=y
+CONFIG_APPTRACE_LOCK_ENABLE=y
+# end of Application Level Tracing
+
+#
+# ESP-ASIO
+#
+# CONFIG_ASIO_SSL_SUPPORT is not set
+# end of ESP-ASIO
+
+#
+# Bluetooth
+#
+CONFIG_BT_ENABLED=y
+CONFIG_BT_SOC_SUPPORT_5_0=y
+
+#
+# Bluetooth controller
+#
+CONFIG_BT_CTRL_MODE_EFF=1
+CONFIG_BT_CTRL_BLE_MAX_ACT=10
+CONFIG_BT_CTRL_BLE_MAX_ACT_EFF=10
+CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB=0
+CONFIG_BT_CTRL_PINNED_TO_CORE_0=y
+# CONFIG_BT_CTRL_PINNED_TO_CORE_1 is not set
+CONFIG_BT_CTRL_PINNED_TO_CORE=0
+CONFIG_BT_CTRL_HCI_MODE_VHCI=y
+# CONFIG_BT_CTRL_HCI_MODE_UART_H4 is not set
+CONFIG_BT_CTRL_HCI_TL=1
+CONFIG_BT_CTRL_ADV_DUP_FILT_MAX=30
+# CONFIG_BT_CTRL_HW_CCA is not set
+CONFIG_BT_CTRL_HW_CCA_VAL=20
+CONFIG_BT_CTRL_HW_CCA_EFF=0
+CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG=y
+# CONFIG_BT_CTRL_CE_LENGTH_TYPE_CE is not set
+# CONFIG_BT_CTRL_CE_LENGTH_TYPE_SD is not set
+CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF=0
+CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0=y
+# CONFIG_BT_CTRL_TX_ANTENNA_INDEX_1 is not set
+CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF=0
+CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0=y
+# CONFIG_BT_CTRL_RX_ANTENNA_INDEX_1 is not set
+CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF=0
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N27 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N24 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N21 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N18 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N15 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N12 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N9 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N6 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N3 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N0 is not set
+CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P3=y
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P6 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P9 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P12 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P15 is not set
+# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P18 is not set
+CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF=10
+CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP=y
+CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM=100
+CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD=20
+CONFIG_BT_CTRL_BLE_SCAN_DUPL=y
+CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DEVICE=y
+# CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DATA is not set
+# CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DATA_DEVICE is not set
+CONFIG_BT_CTRL_SCAN_DUPL_TYPE=0
+CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE=100
+# CONFIG_BT_CTRL_BLE_MESH_SCAN_DUPL_EN is not set
+# CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EN is not set
+CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS=y
+CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF=0
+
+#
+# MODEM SLEEP Options
+#
+# CONFIG_BT_CTRL_MODEM_SLEEP is not set
+# end of MODEM SLEEP Options
+
+CONFIG_BT_CTRL_SLEEP_MODE_EFF=0
+CONFIG_BT_CTRL_SLEEP_CLOCK_EFF=0
+CONFIG_BT_CTRL_HCI_TL_EFF=1
+# CONFIG_BT_CTRL_AGC_RECORRECT_EN is not set
+# end of Bluetooth controller
+
+CONFIG_BT_BLUEDROID_ENABLED=y
+# CONFIG_BT_NIMBLE_ENABLED is not set
+# CONFIG_BT_CONTROLLER_ONLY is not set
+
+#
+# Bluedroid Options
+#
+CONFIG_BT_BTC_TASK_STACK_SIZE=3072
+CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0=y
+# CONFIG_BT_BLUEDROID_PINNED_TO_CORE_1 is not set
+CONFIG_BT_BLUEDROID_PINNED_TO_CORE=0
+CONFIG_BT_BTU_TASK_STACK_SIZE=4096
+# CONFIG_BT_BLUEDROID_MEM_DEBUG is not set
+CONFIG_BT_BLE_ENABLED=y
+CONFIG_BT_GATTS_ENABLE=y
+# CONFIG_BT_GATTS_PPCP_CHAR_GAP is not set
+# CONFIG_BT_BLE_BLUFI_ENABLE is not set
+CONFIG_BT_GATT_MAX_SR_PROFILES=8
+# CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MANUAL is not set
+CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO=y
+CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE=0
+CONFIG_BT_GATTC_ENABLE=y
+# CONFIG_BT_GATTC_CACHE_NVS_FLASH is not set
+CONFIG_BT_GATTC_CONNECT_RETRY_COUNT=3
+CONFIG_BT_BLE_SMP_ENABLE=y
+# CONFIG_BT_SMP_SLAVE_CON_PARAMS_UPD_ENABLE is not set
+# CONFIG_BT_STACK_NO_LOG is not set
+
+#
+# BT DEBUG LOG LEVEL
+#
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_HCI_TRACE_LEVEL=2
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_BTM_TRACE_LEVEL=2
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_L2CAP_TRACE_LEVEL=2
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL=2
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_SDP_TRACE_LEVEL=2
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_GAP_TRACE_LEVEL=2
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_BNEP_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_BNEP_TRACE_LEVEL=2
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_PAN_TRACE_LEVEL=2
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_A2D_TRACE_LEVEL=2
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_AVDT_TRACE_LEVEL=2
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_AVCT_TRACE_LEVEL=2
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_AVRC_TRACE_LEVEL=2
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_MCA_TRACE_LEVEL=2
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_HID_TRACE_LEVEL=2
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_APPL_TRACE_LEVEL=2
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_GATT_TRACE_LEVEL=2
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_SMP_TRACE_LEVEL=2
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_BTIF_TRACE_LEVEL=2
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_BTC_TRACE_LEVEL=2
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_OSI_TRACE_LEVEL=2
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_BLUFI_TRACE_LEVEL=2
+# end of BT DEBUG LOG LEVEL
+
+CONFIG_BT_ACL_CONNECTIONS=4
+CONFIG_BT_MULTI_CONNECTION_ENBALE=y
+# CONFIG_BT_ALLOCATION_FROM_SPIRAM_FIRST is not set
+# CONFIG_BT_BLE_DYNAMIC_ENV_MEMORY is not set
+# CONFIG_BT_BLE_HOST_QUEUE_CONG_CHECK is not set
+CONFIG_BT_SMP_ENABLE=y
+CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT=30
+CONFIG_BT_BLE_RPA_SUPPORTED=y
+CONFIG_BT_BLE_50_FEATURES_SUPPORTED=y
+CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y
+# end of Bluedroid Options
+# end of Bluetooth
+
+CONFIG_BLE_MESH=y
+CONFIG_BLE_MESH_HCI_5_0=y
+CONFIG_BLE_MESH_USE_DUPLICATE_SCAN=y
+CONFIG_BLE_MESH_MEM_ALLOC_MODE_INTERNAL=y
+# CONFIG_BLE_MESH_MEM_ALLOC_MODE_EXTERNAL is not set
+# CONFIG_BLE_MESH_MEM_ALLOC_MODE_DEFAULT is not set
+CONFIG_BLE_MESH_DEINIT=y
+
+#
+# BLE Mesh and BLE coexistence support
+#
+# CONFIG_BLE_MESH_SUPPORT_BLE_ADV is not set
+# CONFIG_BLE_MESH_SUPPORT_BLE_SCAN is not set
+# end of BLE Mesh and BLE coexistence support
+
+# CONFIG_BLE_MESH_FAST_PROV is not set
+# CONFIG_BLE_MESH_NODE is not set
+# CONFIG_BLE_MESH_PROVISIONER is not set
+CONFIG_BLE_MESH_PROV=y
+CONFIG_BLE_MESH_PB_ADV=y
+# CONFIG_BLE_MESH_PB_GATT is not set
+CONFIG_BLE_MESH_PROXY=y
+# CONFIG_BLE_MESH_GATT_PROXY_CLIENT is not set
+CONFIG_BLE_MESH_NET_BUF_POOL_USAGE=y
+# CONFIG_BLE_MESH_SETTINGS is not set
+CONFIG_BLE_MESH_SUBNET_COUNT=3
+CONFIG_BLE_MESH_APP_KEY_COUNT=3
+CONFIG_BLE_MESH_MODEL_KEY_COUNT=3
+CONFIG_BLE_MESH_MODEL_GROUP_COUNT=3
+CONFIG_BLE_MESH_LABEL_COUNT=3
+CONFIG_BLE_MESH_CRPL=10
+CONFIG_BLE_MESH_MSG_CACHE_SIZE=10
+CONFIG_BLE_MESH_ADV_BUF_COUNT=60
+CONFIG_BLE_MESH_IVU_DIVIDER=4
+CONFIG_BLE_MESH_TX_SEG_MSG_COUNT=1
+CONFIG_BLE_MESH_RX_SEG_MSG_COUNT=1
+CONFIG_BLE_MESH_RX_SDU_MAX=384
+CONFIG_BLE_MESH_TX_SEG_MAX=32
+# CONFIG_BLE_MESH_FRIEND is not set
+# CONFIG_BLE_MESH_NO_LOG is not set
+
+#
+# BLE Mesh STACK DEBUG LOG LEVEL
+#
+# CONFIG_BLE_MESH_TRACE_LEVEL_NONE is not set
+# CONFIG_BLE_MESH_TRACE_LEVEL_ERROR is not set
+CONFIG_BLE_MESH_TRACE_LEVEL_WARNING=y
+# CONFIG_BLE_MESH_TRACE_LEVEL_INFO is not set
+# CONFIG_BLE_MESH_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BLE_MESH_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BLE_MESH_STACK_TRACE_LEVEL=2
+# end of BLE Mesh STACK DEBUG LOG LEVEL
+
+#
+# BLE Mesh NET BUF DEBUG LOG LEVEL
+#
+# CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL_NONE is not set
+# CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL_ERROR is not set
+CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL_WARNING=y
+# CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL_INFO is not set
+# CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BLE_MESH_NET_BUF_TRACE_LEVEL=2
+# end of BLE Mesh NET BUF DEBUG LOG LEVEL
+
+CONFIG_BLE_MESH_CLIENT_MSG_TIMEOUT=4000
+
+#
+# Support for BLE Mesh Foundation models
+#
+# CONFIG_BLE_MESH_CFG_CLI is not set
+# CONFIG_BLE_MESH_HEALTH_CLI is not set
+CONFIG_BLE_MESH_HEALTH_SRV=y
+# end of Support for BLE Mesh Foundation models
+
+#
+# Support for BLE Mesh Client/Server models
+#
+# CONFIG_BLE_MESH_GENERIC_ONOFF_CLI is not set
+# CONFIG_BLE_MESH_GENERIC_LEVEL_CLI is not set
+# CONFIG_BLE_MESH_GENERIC_DEF_TRANS_TIME_CLI is not set
+# CONFIG_BLE_MESH_GENERIC_POWER_ONOFF_CLI is not set
+# CONFIG_BLE_MESH_GENERIC_POWER_LEVEL_CLI is not set
+# CONFIG_BLE_MESH_GENERIC_BATTERY_CLI is not set
+# CONFIG_BLE_MESH_GENERIC_LOCATION_CLI is not set
+# CONFIG_BLE_MESH_GENERIC_PROPERTY_CLI is not set
+# CONFIG_BLE_MESH_SENSOR_CLI is not set
+# CONFIG_BLE_MESH_TIME_CLI is not set
+# CONFIG_BLE_MESH_SCENE_CLI is not set
+# CONFIG_BLE_MESH_SCHEDULER_CLI is not set
+# CONFIG_BLE_MESH_LIGHT_LIGHTNESS_CLI is not set
+# CONFIG_BLE_MESH_LIGHT_CTL_CLI is not set
+# CONFIG_BLE_MESH_LIGHT_HSL_CLI is not set
+# CONFIG_BLE_MESH_LIGHT_XYL_CLI is not set
+# CONFIG_BLE_MESH_LIGHT_LC_CLI is not set
+CONFIG_BLE_MESH_GENERIC_SERVER=y
+CONFIG_BLE_MESH_SENSOR_SERVER=y
+CONFIG_BLE_MESH_TIME_SCENE_SERVER=y
+CONFIG_BLE_MESH_LIGHTING_SERVER=y
+# end of Support for BLE Mesh Client/Server models
+
+# CONFIG_BLE_MESH_IV_UPDATE_TEST is not set
+
+#
+# BLE Mesh specific test option
+#
+# CONFIG_BLE_MESH_SELF_TEST is not set
+# CONFIG_BLE_MESH_SHELL is not set
+# CONFIG_BLE_MESH_DEBUG is not set
+# end of BLE Mesh specific test option
+
+#
+# CoAP Configuration
+#
+CONFIG_COAP_MBEDTLS_PSK=y
+# CONFIG_COAP_MBEDTLS_PKI is not set
+# CONFIG_COAP_MBEDTLS_DEBUG is not set
+CONFIG_COAP_LOG_DEFAULT_LEVEL=0
+# end of CoAP Configuration
+
+#
+# Driver configurations
+#
+
+#
+# ADC configuration
+#
+# CONFIG_ADC_FORCE_XPD_FSM is not set
+CONFIG_ADC_DISABLE_DAC=y
+# end of ADC configuration
+
+#
+# MCPWM configuration
+#
+# CONFIG_MCPWM_ISR_IN_IRAM is not set
+# end of MCPWM configuration
+
+#
+# SPI configuration
+#
+# CONFIG_SPI_MASTER_IN_IRAM is not set
+# CONFIG_SPI_MASTER_ISR_IN_IRAM is not set
+# CONFIG_SPI_SLAVE_IN_IRAM is not set
+# CONFIG_SPI_SLAVE_ISR_IN_IRAM is not set
+# end of SPI configuration
+
+#
+# TWAI configuration
+#
+# CONFIG_TWAI_ISR_IN_IRAM is not set
+# end of TWAI configuration
+
+#
+# UART configuration
+#
+# CONFIG_UART_ISR_IN_IRAM is not set
+# end of UART configuration
+
+#
+# GDMA Configuration
+#
+# CONFIG_GDMA_CTRL_FUNC_IN_IRAM is not set
+# CONFIG_GDMA_ISR_IRAM_SAFE is not set
+# end of GDMA Configuration
+# end of Driver configurations
+
+#
+# eFuse Bit Manager
+#
+# CONFIG_EFUSE_CUSTOM_TABLE is not set
+# CONFIG_EFUSE_VIRTUAL is not set
+CONFIG_EFUSE_MAX_BLK_LEN=256
+# end of eFuse Bit Manager
+
+#
+# ESP-TLS
+#
+CONFIG_ESP_TLS_USING_MBEDTLS=y
+CONFIG_ESP_TLS_USE_DS_PERIPHERAL=y
+CONFIG_ESP_TLS_SERVER=y
+# CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS is not set
+# CONFIG_ESP_TLS_SERVER_SESSION_TICKETS is not set
+# CONFIG_ESP_TLS_PSK_VERIFICATION is not set
+# CONFIG_ESP_TLS_INSECURE is not set
+# end of ESP-TLS
+
+#
+# ESP32S3-Specific
+#
+# CONFIG_ESP32S3_DEFAULT_CPU_FREQ_80 is not set
+# CONFIG_ESP32S3_DEFAULT_CPU_FREQ_160 is not set
+CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240=y
+CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ=240
+
+#
+# Cache config
+#
+CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB=y
+# CONFIG_ESP32S3_INSTRUCTION_CACHE_32KB is not set
+CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE=0x4000
+# CONFIG_ESP32S3_INSTRUCTION_CACHE_4WAYS is not set
+CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS=y
+CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS=8
+# CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_16B is not set
+CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B=y
+CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE=32
+# CONFIG_ESP32S3_INSTRUCTION_CACHE_WRAP is not set
+# CONFIG_ESP32S3_DATA_CACHE_16KB is not set
+CONFIG_ESP32S3_DATA_CACHE_32KB=y
+# CONFIG_ESP32S3_DATA_CACHE_64KB is not set
+CONFIG_ESP32S3_DATA_CACHE_SIZE=0x8000
+# CONFIG_ESP32S3_DATA_CACHE_4WAYS is not set
+CONFIG_ESP32S3_DATA_CACHE_8WAYS=y
+CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS=8
+# CONFIG_ESP32S3_DATA_CACHE_LINE_16B is not set
+CONFIG_ESP32S3_DATA_CACHE_LINE_32B=y
+# CONFIG_ESP32S3_DATA_CACHE_LINE_64B is not set
+CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE=32
+# CONFIG_ESP32S3_DATA_CACHE_WRAP is not set
+# end of Cache config
+
+CONFIG_ESP32S3_SPIRAM_SUPPORT=y
+
+#
+# SPI RAM config
+#
+CONFIG_SPIRAM_MODE_QUAD=y
+# CONFIG_SPIRAM_MODE_OCT is not set
+CONFIG_SPIRAM_TYPE_AUTO=y
+# CONFIG_SPIRAM_TYPE_ESPPSRAM16 is not set
+# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
+# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
+CONFIG_SPIRAM_SIZE=-1
+
+#
+# PSRAM Clock and CS IO for ESP32S3
+#
+CONFIG_DEFAULT_PSRAM_CLK_IO=30
+CONFIG_DEFAULT_PSRAM_CS_IO=26
+# end of PSRAM Clock and CS IO for ESP32S3
+
+# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
+# CONFIG_SPIRAM_RODATA is not set
+# CONFIG_SPIRAM_SPEED_120M is not set
+CONFIG_SPIRAM_SPEED_80M=y
+# CONFIG_SPIRAM_SPEED_40M is not set
+CONFIG_SPIRAM=y
+# CONFIG_SPIRAM_BOOT_INIT is not set
+# CONFIG_SPIRAM_USE_MEMMAP is not set
+# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
+CONFIG_SPIRAM_USE_MALLOC=y
+CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=4096
+CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP=y
+CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=0
+# end of SPI RAM config
+
+# CONFIG_ESP32S3_TRAX is not set
+CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM=0x0
+# CONFIG_ESP32S3_ULP_COPROC_ENABLED is not set
+CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM=0
+CONFIG_ESP32S3_DEBUG_OCDAWARE=y
+CONFIG_ESP32S3_BROWNOUT_DET=y
+CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7=y
+# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_6 is not set
+# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_5 is not set
+# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_4 is not set
+# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_3 is not set
+# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_2 is not set
+# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_1 is not set
+CONFIG_ESP32S3_BROWNOUT_DET_LVL=7
+CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1=y
+# CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC is not set
+# CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 is not set
+# CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE is not set
+CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y
+# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=576
+CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY=2000
+# CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set
+# CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set
+# end of ESP32S3-Specific
+
+#
+# ADC-Calibration
+#
+# end of ADC-Calibration
+
+#
+# Common ESP-related
+#
+CONFIG_ESP_ERR_TO_NAME_LOOKUP=y
+# end of Common ESP-related
+
+#
+# Ethernet
+#
+CONFIG_ETH_ENABLED=y
+CONFIG_ETH_USE_SPI_ETHERNET=y
+CONFIG_ETH_SPI_ETHERNET_DM9051=y
+CONFIG_ETH_SPI_ETHERNET_W5500=y
+# CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL is not set
+# CONFIG_ETH_USE_OPENETH is not set
+# end of Ethernet
+
+#
+# Event Loop Library
+#
+# CONFIG_ESP_EVENT_LOOP_PROFILING is not set
+CONFIG_ESP_EVENT_POST_FROM_ISR=y
+CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y
+# end of Event Loop Library
+
+#
+# GDB Stub
+#
+# end of GDB Stub
+
+#
+# ESP HTTP client
+#
+CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y
+CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH=y
+CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH=y
+# end of ESP HTTP client
+
+#
+# HTTP Server
+#
+CONFIG_HTTPD_MAX_REQ_HDR_LEN=1024
+CONFIG_HTTPD_MAX_URI_LEN=512
+CONFIG_HTTPD_ERR_RESP_NO_DELAY=y
+CONFIG_HTTPD_PURGE_BUF_LEN=32
+# CONFIG_HTTPD_LOG_PURGE_DATA is not set
+CONFIG_HTTPD_WS_SUPPORT=y
+# end of HTTP Server
+
+#
+# ESP HTTPS OTA
+#
+# CONFIG_OTA_ALLOW_HTTP is not set
+# end of ESP HTTPS OTA
+
+#
+# ESP HTTPS server
+#
+CONFIG_ESP_HTTPS_SERVER_ENABLE=y
+# end of ESP HTTPS server
+
+#
+# Hardware Settings
+#
+
+#
+# MAC Config
+#
+CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y
+CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y
+CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO=y
+# CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR is not set
+CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES=2
+# end of MAC Config
+
+#
+# Sleep Config
+#
+CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y
+# CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND is not set
+# CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND is not set
+# CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND is not set
+# end of Sleep Config
+
+#
+# RTC Clock Config
+#
+CONFIG_RTC_CLOCK_BBPLL_POWER_ON_WITH_USB=y
+# end of RTC Clock Config
+# end of Hardware Settings
+
+#
+# IPC (Inter-Processor Call)
+#
+CONFIG_ESP_IPC_TASK_STACK_SIZE=1024
+CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y
+CONFIG_ESP_IPC_ISR_ENABLE=y
+# end of IPC (Inter-Processor Call)
+
+#
+# LCD and Touch Panel
+#
+
+#
+# LCD Peripheral Configuration
+#
+CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE=32
+# end of LCD Peripheral Configuration
+# end of LCD and Touch Panel
+
+#
+# ESP NETIF Adapter
+#
+CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120
+CONFIG_ESP_NETIF_TCPIP_LWIP=y
+# CONFIG_ESP_NETIF_LOOPBACK is not set
+CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER=y
+# end of ESP NETIF Adapter
+
+#
+# PHY
+#
+CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y
+# CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION is not set
+CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20
+CONFIG_ESP_PHY_MAX_TX_POWER=20
+CONFIG_ESP_PHY_ENABLE_USB=y
+# end of PHY
+
+#
+# Power Management
+#
+# CONFIG_PM_ENABLE is not set
+CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP=y
+CONFIG_PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP=y
+# end of Power Management
+
+#
+# ESP System Settings
+#
+# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set
+CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y
+# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
+# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set
+# CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME is not set
+CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y
+CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y
+
+#
+# Memory protection
+#
+# end of Memory protection
+
+CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32
+CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2048
+CONFIG_ESP_MAIN_TASK_STACK_SIZE=4096
+CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y
+# CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 is not set
+# CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set
+CONFIG_ESP_MAIN_TASK_AFFINITY=0x0
+CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048
+CONFIG_ESP_CONSOLE_UART_DEFAULT=y
+# CONFIG_ESP_CONSOLE_USB_CDC is not set
+# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG is not set
+# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set
+# CONFIG_ESP_CONSOLE_NONE is not set
+# CONFIG_ESP_CONSOLE_SECONDARY_NONE is not set
+CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG=y
+CONFIG_ESP_CONSOLE_UART=y
+CONFIG_ESP_CONSOLE_MULTIPLE_UART=y
+CONFIG_ESP_CONSOLE_UART_NUM=0
+CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
+CONFIG_ESP_INT_WDT=y
+CONFIG_ESP_INT_WDT_TIMEOUT_MS=1000
+CONFIG_ESP_INT_WDT_CHECK_CPU1=y
+CONFIG_ESP_TASK_WDT=y
+CONFIG_ESP_TASK_WDT_PANIC=y
+CONFIG_ESP_TASK_WDT_TIMEOUT_S=5
+CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
+# CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 is not set
+# CONFIG_ESP_PANIC_HANDLER_IRAM is not set
+# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set
+CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y
+# end of ESP System Settings
+
+#
+# High resolution timer (esp_timer)
+#
+# CONFIG_ESP_TIMER_PROFILING is not set
+CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y
+CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y
+CONFIG_ESP_TIMER_TASK_STACK_SIZE=4096
+CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1
+# CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is not set
+CONFIG_ESP_TIMER_IMPL_SYSTIMER=y
+# end of High resolution timer (esp_timer)
+
+#
+# Wi-Fi
+#
+CONFIG_ESP32_WIFI_ENABLED=y
+CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE=y
+CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=8
+CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32
+CONFIG_ESP32_WIFI_STATIC_TX_BUFFER=y
+CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=0
+CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM=8
+CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM=16
+CONFIG_ESP32_WIFI_CSI_ENABLED=y
+CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y
+CONFIG_ESP32_WIFI_TX_BA_WIN=6
+CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y
+CONFIG_ESP32_WIFI_RX_BA_WIN=16
+# CONFIG_ESP32_WIFI_AMSDU_TX_ENABLED is not set
+CONFIG_ESP32_WIFI_NVS_ENABLED=y
+CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y
+# CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1 is not set
+CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752
+CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32
+# CONFIG_ESP32_WIFI_IRAM_OPT is not set
+# CONFIG_ESP32_WIFI_RX_IRAM_OPT is not set
+# CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set
+# CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set
+CONFIG_ESP_WIFI_FTM_ENABLE=y
+CONFIG_ESP_WIFI_FTM_INITIATOR_SUPPORT=y
+CONFIG_ESP_WIFI_FTM_RESPONDER_SUPPORT=y
+# CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is not set
+# CONFIG_ESP_WIFI_GCMP_SUPPORT is not set
+# CONFIG_ESP_WIFI_GMAC_SUPPORT is not set
+CONFIG_ESP_WIFI_SOFTAP_SUPPORT=y
+# end of Wi-Fi
+
+#
+# Core dump
+#
+# CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH is not set
+# CONFIG_ESP_COREDUMP_ENABLE_TO_UART is not set
+CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y
+# end of Core dump
+
+#
+# FAT Filesystem support
+#
+# CONFIG_FATFS_CODEPAGE_DYNAMIC is not set
+# CONFIG_FATFS_CODEPAGE_437 is not set
+# CONFIG_FATFS_CODEPAGE_720 is not set
+# CONFIG_FATFS_CODEPAGE_737 is not set
+# CONFIG_FATFS_CODEPAGE_771 is not set
+# CONFIG_FATFS_CODEPAGE_775 is not set
+CONFIG_FATFS_CODEPAGE_850=y
+# CONFIG_FATFS_CODEPAGE_852 is not set
+# CONFIG_FATFS_CODEPAGE_855 is not set
+# CONFIG_FATFS_CODEPAGE_857 is not set
+# CONFIG_FATFS_CODEPAGE_860 is not set
+# CONFIG_FATFS_CODEPAGE_861 is not set
+# CONFIG_FATFS_CODEPAGE_862 is not set
+# CONFIG_FATFS_CODEPAGE_863 is not set
+# CONFIG_FATFS_CODEPAGE_864 is not set
+# CONFIG_FATFS_CODEPAGE_865 is not set
+# CONFIG_FATFS_CODEPAGE_866 is not set
+# CONFIG_FATFS_CODEPAGE_869 is not set
+# CONFIG_FATFS_CODEPAGE_932 is not set
+# CONFIG_FATFS_CODEPAGE_936 is not set
+# CONFIG_FATFS_CODEPAGE_949 is not set
+# CONFIG_FATFS_CODEPAGE_950 is not set
+CONFIG_FATFS_CODEPAGE=850
+# CONFIG_FATFS_LFN_NONE is not set
+# CONFIG_FATFS_LFN_HEAP is not set
+CONFIG_FATFS_LFN_STACK=y
+CONFIG_FATFS_MAX_LFN=255
+CONFIG_FATFS_API_ENCODING_ANSI_OEM=y
+# CONFIG_FATFS_API_ENCODING_UTF_16 is not set
+# CONFIG_FATFS_API_ENCODING_UTF_8 is not set
+CONFIG_FATFS_FS_LOCK=0
+CONFIG_FATFS_TIMEOUT_MS=10000
+CONFIG_FATFS_PER_FILE_CACHE=y
+CONFIG_FATFS_ALLOC_PREFER_EXTRAM=y
+# CONFIG_FATFS_USE_FASTSEEK is not set
+# end of FAT Filesystem support
+
+#
+# Modbus configuration
+#
+CONFIG_FMB_COMM_MODE_TCP_EN=y
+CONFIG_FMB_TCP_PORT_DEFAULT=502
+CONFIG_FMB_TCP_PORT_MAX_CONN=5
+CONFIG_FMB_TCP_CONNECTION_TOUT_SEC=20
+CONFIG_FMB_COMM_MODE_RTU_EN=y
+CONFIG_FMB_COMM_MODE_ASCII_EN=y
+CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND=150
+CONFIG_FMB_MASTER_DELAY_MS_CONVERT=200
+CONFIG_FMB_QUEUE_LENGTH=20
+CONFIG_FMB_PORT_TASK_STACK_SIZE=4096
+CONFIG_FMB_SERIAL_BUF_SIZE=256
+CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB=8
+CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS=1000
+CONFIG_FMB_PORT_TASK_PRIO=10
+# CONFIG_FMB_PORT_TASK_AFFINITY_NO_AFFINITY is not set
+CONFIG_FMB_PORT_TASK_AFFINITY_CPU0=y
+# CONFIG_FMB_PORT_TASK_AFFINITY_CPU1 is not set
+CONFIG_FMB_PORT_TASK_AFFINITY=0x0
+# CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT is not set
+CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT=20
+CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE=20
+CONFIG_FMB_CONTROLLER_STACK_SIZE=4096
+CONFIG_FMB_EVENT_QUEUE_TIMEOUT=20
+CONFIG_FMB_TIMER_PORT_ENABLED=y
+CONFIG_FMB_TIMER_GROUP=0
+CONFIG_FMB_TIMER_INDEX=0
+CONFIG_FMB_MASTER_TIMER_GROUP=0
+CONFIG_FMB_MASTER_TIMER_INDEX=0
+# CONFIG_FMB_TIMER_ISR_IN_IRAM is not set
+# end of Modbus configuration
+
+#
+# FreeRTOS
+#
+# CONFIG_FREERTOS_UNICORE is not set
+CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF
+CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER=y
+CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1=y
+# CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 is not set
+CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER=y
+CONFIG_FREERTOS_HZ=1000
+# CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION is not set
+# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set
+# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set
+CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y
+CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y
+CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y
+CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1
+CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y
+# CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE is not set
+# CONFIG_FREERTOS_ASSERT_DISABLE is not set
+CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1024
+CONFIG_FREERTOS_ISR_STACKSIZE=1536
+# CONFIG_FREERTOS_LEGACY_HOOKS is not set
+CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16
+CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
+# CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set
+CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1
+CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048
+CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10
+CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0
+# CONFIG_FREERTOS_USE_TRACE_FACILITY is not set
+# CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set
+CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y
+# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set
+# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set
+CONFIG_FREERTOS_DEBUG_OCDAWARE=y
+CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y
+# CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH is not set
+# end of FreeRTOS
+
+#
+# Hardware Abstraction Layer (HAL) and Low Level (LL)
+#
+CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y
+# CONFIG_HAL_ASSERTION_DISABLE is not set
+# CONFIG_HAL_ASSERTION_SILIENT is not set
+# CONFIG_HAL_ASSERTION_ENABLE is not set
+CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2
+# end of Hardware Abstraction Layer (HAL) and Low Level (LL)
+
+#
+# Heap memory debugging
+#
+# CONFIG_HEAP_POISONING_DISABLED is not set
+CONFIG_HEAP_POISONING_LIGHT=y
+# CONFIG_HEAP_POISONING_COMPREHENSIVE is not set
+CONFIG_HEAP_TRACING_OFF=y
+# CONFIG_HEAP_TRACING_STANDALONE is not set
+# CONFIG_HEAP_TRACING_TOHOST is not set
+# CONFIG_HEAP_TASK_TRACKING is not set
+# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set
+# end of Heap memory debugging
+
+#
+# jsmn
+#
+# CONFIG_JSMN_PARENT_LINKS is not set
+# CONFIG_JSMN_STRICT is not set
+# end of jsmn
+
+#
+# libsodium
+#
+# end of libsodium
+
+#
+# Log output
+#
+# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set
+CONFIG_LOG_DEFAULT_LEVEL_ERROR=y
+# CONFIG_LOG_DEFAULT_LEVEL_WARN is not set
+# CONFIG_LOG_DEFAULT_LEVEL_INFO is not set
+# CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set
+# CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set
+CONFIG_LOG_DEFAULT_LEVEL=1
+CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y
+# CONFIG_LOG_MAXIMUM_LEVEL_WARN is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_INFO is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set
+CONFIG_LOG_MAXIMUM_LEVEL=1
+# CONFIG_LOG_COLORS is not set
+CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y
+# CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set
+# end of Log output
+
+#
+# LWIP
+#
+CONFIG_LWIP_LOCAL_HOSTNAME="espressif"
+# CONFIG_LWIP_NETIF_API is not set
+# CONFIG_LWIP_TCPIP_CORE_LOCKING is not set
+CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y
+# CONFIG_LWIP_L2_TO_L3_COPY is not set
+# CONFIG_LWIP_IRAM_OPTIMIZATION is not set
+CONFIG_LWIP_TIMERS_ONDEMAND=y
+CONFIG_LWIP_MAX_SOCKETS=16
+# CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set
+# CONFIG_LWIP_SO_LINGER is not set
+CONFIG_LWIP_SO_REUSE=y
+CONFIG_LWIP_SO_REUSE_RXTOALL=y
+CONFIG_LWIP_SO_RCVBUF=y
+# CONFIG_LWIP_NETBUF_RECVINFO is not set
+CONFIG_LWIP_IP4_FRAG=y
+CONFIG_LWIP_IP6_FRAG=y
+# CONFIG_LWIP_IP4_REASSEMBLY is not set
+# CONFIG_LWIP_IP6_REASSEMBLY is not set
+# CONFIG_LWIP_IP_FORWARD is not set
+# CONFIG_LWIP_STATS is not set
+CONFIG_LWIP_ETHARP_TRUST_IP_MAC=y
+CONFIG_LWIP_ESP_GRATUITOUS_ARP=y
+CONFIG_LWIP_GARP_TMR_INTERVAL=60
+CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32
+# CONFIG_LWIP_DHCP_DOES_ARP_CHECK is not set
+# CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set
+CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID=y
+CONFIG_LWIP_DHCP_RESTORE_LAST_IP=y
+CONFIG_LWIP_DHCP_OPTIONS_LEN=128
+
+#
+# DHCP server
+#
+CONFIG_LWIP_DHCPS=y
+CONFIG_LWIP_DHCPS_LEASE_UNIT=60
+CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8
+# end of DHCP server
+
+# CONFIG_LWIP_AUTOIP is not set
+CONFIG_LWIP_IPV6=y
+# CONFIG_LWIP_IPV6_AUTOCONFIG is not set
+CONFIG_LWIP_IPV6_NUM_ADDRESSES=3
+# CONFIG_LWIP_IPV6_FORWARD is not set
+# CONFIG_LWIP_NETIF_STATUS_CALLBACK is not set
+CONFIG_LWIP_NETIF_LOOPBACK=y
+CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8
+
+#
+# TCP
+#
+CONFIG_LWIP_MAX_ACTIVE_TCP=16
+CONFIG_LWIP_MAX_LISTENING_TCP=16
+CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION=y
+CONFIG_LWIP_TCP_MAXRTX=12
+CONFIG_LWIP_TCP_SYNMAXRTX=6
+CONFIG_LWIP_TCP_MSS=1436
+CONFIG_LWIP_TCP_TMR_INTERVAL=250
+CONFIG_LWIP_TCP_MSL=60000
+CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744
+CONFIG_LWIP_TCP_WND_DEFAULT=5744
+CONFIG_LWIP_TCP_RECVMBOX_SIZE=6
+CONFIG_LWIP_TCP_QUEUE_OOSEQ=y
+# CONFIG_LWIP_TCP_SACK_OUT is not set
+# CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set
+CONFIG_LWIP_TCP_OVERSIZE_MSS=y
+# CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set
+# CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set
+# CONFIG_LWIP_WND_SCALE is not set
+CONFIG_LWIP_TCP_RTO_TIME=3000
+# end of TCP
+
+#
+# UDP
+#
+CONFIG_LWIP_MAX_UDP_PCBS=16
+CONFIG_LWIP_UDP_RECVMBOX_SIZE=6
+# end of UDP
+
+#
+# Checksums
+#
+# CONFIG_LWIP_CHECKSUM_CHECK_IP is not set
+# CONFIG_LWIP_CHECKSUM_CHECK_UDP is not set
+CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y
+# end of Checksums
+
+CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=2560
+# CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY is not set
+CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0=y
+# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set
+CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x0
+# CONFIG_LWIP_PPP_SUPPORT is not set
+CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3
+CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5
+# CONFIG_LWIP_SLIP_SUPPORT is not set
+
+#
+# ICMP
+#
+CONFIG_LWIP_ICMP=y
+# CONFIG_LWIP_MULTICAST_PING is not set
+# CONFIG_LWIP_BROADCAST_PING is not set
+# end of ICMP
+
+#
+# LWIP RAW API
+#
+CONFIG_LWIP_MAX_RAW_PCBS=16
+# end of LWIP RAW API
+
+#
+# SNTP
+#
+CONFIG_LWIP_SNTP_MAX_SERVERS=3
+CONFIG_LWIP_DHCP_GET_NTP_SRV=y
+CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1
+CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000
+# end of SNTP
+
+CONFIG_LWIP_ESP_LWIP_ASSERT=y
+
+#
+# Hooks
+#
+# CONFIG_LWIP_HOOK_TCP_ISN_NONE is not set
+CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y
+# CONFIG_LWIP_HOOK_TCP_ISN_CUSTOM is not set
+CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y
+# CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT is not set
+# CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM is not set
+CONFIG_LWIP_HOOK_ND6_GET_GW_NONE=y
+# CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT is not set
+# CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM is not set
+CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y
+# CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set
+# CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set
+# end of Hooks
+
+# CONFIG_LWIP_DEBUG is not set
+# end of LWIP
+
+#
+# mbedTLS
+#
+CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
+# CONFIG_MBEDTLS_EXTERNAL_MEM_ALLOC is not set
+# CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set
+# CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set
+CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=16384
+# CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN is not set
+# CONFIG_MBEDTLS_DEBUG is not set
+
+#
+# mbedTLS v2.28.x related
+#
+# CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set
+# CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set
+# CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set
+CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE=y
+
+#
+# DTLS-based configurations
+#
+# CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID is not set
+# CONFIG_MBEDTLS_SSL_DTLS_SRTP is not set
+# end of DTLS-based configurations
+# end of mbedTLS v2.28.x related
+
+#
+# Certificate Bundle
+#
+CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y
+CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y
+# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set
+# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set
+# CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set
+# end of Certificate Bundle
+
+# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set
+# CONFIG_MBEDTLS_CMAC_C is not set
+CONFIG_MBEDTLS_HARDWARE_AES=y
+CONFIG_MBEDTLS_AES_USE_INTERRUPT=y
+CONFIG_MBEDTLS_HARDWARE_MPI=y
+CONFIG_MBEDTLS_HARDWARE_SHA=y
+CONFIG_MBEDTLS_ROM_MD5=y
+# CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set
+# CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set
+CONFIG_MBEDTLS_HAVE_TIME=y
+# CONFIG_MBEDTLS_HAVE_TIME_DATE is not set
+CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y
+CONFIG_MBEDTLS_SHA512_C=y
+CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y
+# CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set
+# CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set
+# CONFIG_MBEDTLS_TLS_DISABLED is not set
+CONFIG_MBEDTLS_TLS_SERVER=y
+CONFIG_MBEDTLS_TLS_CLIENT=y
+CONFIG_MBEDTLS_TLS_ENABLED=y
+
+#
+# TLS Key Exchange Methods
+#
+CONFIG_MBEDTLS_PSK_MODES=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_PSK=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y
+# end of TLS Key Exchange Methods
+
+CONFIG_MBEDTLS_SSL_RENEGOTIATION=y
+# CONFIG_MBEDTLS_SSL_PROTO_SSL3 is not set
+CONFIG_MBEDTLS_SSL_PROTO_TLS1=y
+CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y
+CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y
+# CONFIG_MBEDTLS_SSL_PROTO_GMTSSL1_1 is not set
+CONFIG_MBEDTLS_SSL_PROTO_DTLS=y
+CONFIG_MBEDTLS_SSL_ALPN=y
+CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y
+CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y
+CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y
+CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y
+
+#
+# Symmetric Ciphers
+#
+CONFIG_MBEDTLS_AES_C=y
+# CONFIG_MBEDTLS_CAMELLIA_C is not set
+# CONFIG_MBEDTLS_DES_C is not set
+CONFIG_MBEDTLS_RC4_DISABLED=y
+# CONFIG_MBEDTLS_RC4_ENABLED_NO_DEFAULT is not set
+# CONFIG_MBEDTLS_RC4_ENABLED is not set
+# CONFIG_MBEDTLS_BLOWFISH_C is not set
+# CONFIG_MBEDTLS_XTEA_C is not set
+CONFIG_MBEDTLS_CCM_C=y
+CONFIG_MBEDTLS_GCM_C=y
+# CONFIG_MBEDTLS_NIST_KW_C is not set
+# end of Symmetric Ciphers
+
+# CONFIG_MBEDTLS_RIPEMD160_C is not set
+
+#
+# Certificates
+#
+CONFIG_MBEDTLS_PEM_PARSE_C=y
+CONFIG_MBEDTLS_PEM_WRITE_C=y
+CONFIG_MBEDTLS_X509_CRL_PARSE_C=y
+CONFIG_MBEDTLS_X509_CSR_PARSE_C=y
+# end of Certificates
+
+CONFIG_MBEDTLS_ECP_C=y
+CONFIG_MBEDTLS_ECDH_C=y
+CONFIG_MBEDTLS_ECDSA_C=y
+# CONFIG_MBEDTLS_ECJPAKE_C is not set
+CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y
+CONFIG_MBEDTLS_ECP_NIST_OPTIM=y
+# CONFIG_MBEDTLS_POLY1305_C is not set
+# CONFIG_MBEDTLS_CHACHA20_C is not set
+# CONFIG_MBEDTLS_HKDF_C is not set
+# CONFIG_MBEDTLS_THREADING_C is not set
+# CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI is not set
+# CONFIG_MBEDTLS_SECURITY_RISKS is not set
+# end of mbedTLS
+
+#
+# mDNS
+#
+CONFIG_MDNS_MAX_SERVICES=10
+CONFIG_MDNS_TASK_PRIORITY=1
+CONFIG_MDNS_TASK_STACK_SIZE=4096
+# CONFIG_MDNS_TASK_AFFINITY_NO_AFFINITY is not set
+CONFIG_MDNS_TASK_AFFINITY_CPU0=y
+# CONFIG_MDNS_TASK_AFFINITY_CPU1 is not set
+CONFIG_MDNS_TASK_AFFINITY=0x0
+CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS=2000
+# CONFIG_MDNS_STRICT_MODE is not set
+CONFIG_MDNS_TIMER_PERIOD_MS=100
+# CONFIG_MDNS_NETWORKING_SOCKET is not set
+CONFIG_MDNS_MULTIPLE_INSTANCE=y
+# end of mDNS
+
+#
+# ESP-MQTT Configurations
+#
+CONFIG_MQTT_PROTOCOL_311=y
+CONFIG_MQTT_TRANSPORT_SSL=y
+CONFIG_MQTT_TRANSPORT_WEBSOCKET=y
+CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE=y
+# CONFIG_MQTT_MSG_ID_INCREMENTAL is not set
+# CONFIG_MQTT_SKIP_PUBLISH_IF_DISCONNECTED is not set
+# CONFIG_MQTT_REPORT_DELETED_MESSAGES is not set
+# CONFIG_MQTT_USE_CUSTOM_CONFIG is not set
+# CONFIG_MQTT_TASK_CORE_SELECTION_ENABLED is not set
+# CONFIG_MQTT_CUSTOM_OUTBOX is not set
+# end of ESP-MQTT Configurations
+
+#
+# Newlib
+#
+CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y
+# CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set
+# CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set
+# CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set
+# CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set
+CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y
+# CONFIG_NEWLIB_NANO_FORMAT is not set
+# end of Newlib
+
+#
+# NVS
+#
+# end of NVS
+
+#
+# OpenSSL
+#
+# CONFIG_OPENSSL_DEBUG is not set
+CONFIG_OPENSSL_ERROR_STACK=y
+CONFIG_OPENSSL_ASSERT_DO_NOTHING=y
+# CONFIG_OPENSSL_ASSERT_EXIT is not set
+# end of OpenSSL
+
+#
+# OpenThread
+#
+# CONFIG_OPENTHREAD_ENABLED is not set
+# end of OpenThread
+
+#
+# PThreads
+#
+CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5
+CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=2048
+CONFIG_PTHREAD_STACK_MIN=768
+CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y
+# CONFIG_PTHREAD_DEFAULT_CORE_0 is not set
+# CONFIG_PTHREAD_DEFAULT_CORE_1 is not set
+CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1
+CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
+# end of PThreads
+
+#
+# SPI Flash driver
+#
+# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
+# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
+CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
+# CONFIG_SPI_FLASH_ROM_IMPL is not set
+CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
+# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set
+# CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set
+# CONFIG_SPI_FLASH_USE_LEGACY_IMPL is not set
+# CONFIG_SPI_FLASH_SHARE_SPI1_BUS is not set
+# CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set
+CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y
+CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=10
+CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=2
+CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=4096
+# CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set
+# CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set
+# CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set
+
+#
+# Auto-detect flash chips
+#
+CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_TH_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP=y
+# end of Auto-detect flash chips
+
+CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y
+# end of SPI Flash driver
+
+#
+# SPIFFS Configuration
+#
+CONFIG_SPIFFS_MAX_PARTITIONS=3
+
+#
+# SPIFFS Cache Configuration
+#
+CONFIG_SPIFFS_CACHE=y
+CONFIG_SPIFFS_CACHE_WR=y
+# CONFIG_SPIFFS_CACHE_STATS is not set
+# end of SPIFFS Cache Configuration
+
+CONFIG_SPIFFS_PAGE_CHECK=y
+CONFIG_SPIFFS_GC_MAX_RUNS=10
+# CONFIG_SPIFFS_GC_STATS is not set
+CONFIG_SPIFFS_PAGE_SIZE=256
+CONFIG_SPIFFS_OBJ_NAME_LEN=32
+# CONFIG_SPIFFS_FOLLOW_SYMLINKS is not set
+CONFIG_SPIFFS_USE_MAGIC=y
+CONFIG_SPIFFS_USE_MAGIC_LENGTH=y
+CONFIG_SPIFFS_META_LENGTH=4
+CONFIG_SPIFFS_USE_MTIME=y
+
+#
+# Debug Configuration
+#
+# CONFIG_SPIFFS_DBG is not set
+# CONFIG_SPIFFS_API_DBG is not set
+# CONFIG_SPIFFS_GC_DBG is not set
+# CONFIG_SPIFFS_CACHE_DBG is not set
+# CONFIG_SPIFFS_CHECK_DBG is not set
+# CONFIG_SPIFFS_TEST_VISUALISATION is not set
+# end of Debug Configuration
+# end of SPIFFS Configuration
+
+#
+# TCP Transport
+#
+
+#
+# Websocket
+#
+CONFIG_WS_TRANSPORT=y
+CONFIG_WS_BUFFER_SIZE=1024
+# end of Websocket
+# end of TCP Transport
+
+#
+# TinyUSB Stack
+#
+# CONFIG_TINYUSB is not set
+# end of TinyUSB Stack
+
+#
+# Unity unit testing library
+#
+CONFIG_UNITY_ENABLE_FLOAT=y
+CONFIG_UNITY_ENABLE_DOUBLE=y
+# CONFIG_UNITY_ENABLE_64BIT is not set
+# CONFIG_UNITY_ENABLE_COLOR is not set
+CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y
+# CONFIG_UNITY_ENABLE_FIXTURE is not set
+# CONFIG_UNITY_ENABLE_BACKTRACE_ON_FAIL is not set
+# end of Unity unit testing library
+
+#
+# USB-OTG
+#
+CONFIG_USB_OTG_SUPPORTED=y
+CONFIG_USB_HOST_CONTROL_TRANSFER_MAX_SIZE=256
+CONFIG_USB_HOST_HW_BUFFER_BIAS_BALANCED=y
+# CONFIG_USB_HOST_HW_BUFFER_BIAS_IN is not set
+# CONFIG_USB_HOST_HW_BUFFER_BIAS_PERIODIC_OUT is not set
+# end of USB-OTG
+
+#
+# Virtual file system
+#
+CONFIG_VFS_SUPPORT_IO=y
+CONFIG_VFS_SUPPORT_DIR=y
+CONFIG_VFS_SUPPORT_SELECT=y
+CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y
+CONFIG_VFS_SUPPORT_TERMIOS=y
+
+#
+# Host File System I/O (Semihosting)
+#
+CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1
+CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN=128
+# end of Host File System I/O (Semihosting)
+# end of Virtual file system
+
+#
+# Wear Levelling
+#
+# CONFIG_WL_SECTOR_SIZE_512 is not set
+CONFIG_WL_SECTOR_SIZE_4096=y
+CONFIG_WL_SECTOR_SIZE=4096
+# end of Wear Levelling
+
+#
+# Wi-Fi Provisioning Manager
+#
+CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES=16
+CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT=30
+# CONFIG_WIFI_PROV_BLE_BONDING is not set
+# end of Wi-Fi Provisioning Manager
+
+#
+# Supplicant
+#
+CONFIG_WPA_MBEDTLS_CRYPTO=y
+# CONFIG_WPA_WAPI_PSK is not set
+# CONFIG_WPA_SUITE_B_192 is not set
+# CONFIG_WPA_DEBUG_PRINT is not set
+# CONFIG_WPA_TESTING_OPTIONS is not set
+# CONFIG_WPA_WPS_STRICT is not set
+# CONFIG_WPA_11KV_SUPPORT is not set
+# end of Supplicant
+
+#
+# Button
+#
+CONFIG_IO_GLITCH_FILTER_TIME_MS=50
+# end of Button
+
+#
+# ESP RainMaker Common
+#
+CONFIG_ESP_RMAKER_LIB_ESP_MQTT=y
+# CONFIG_ESP_RMAKER_LIB_AWS_IOT is not set
+CONFIG_ESP_RMAKER_MQTT_GLUE_LIB=1
+CONFIG_ESP_RMAKER_MQTT_PORT_443=y
+# CONFIG_ESP_RMAKER_MQTT_PORT_8883 is not set
+CONFIG_ESP_RMAKER_MQTT_PORT=1
+# CONFIG_ESP_RMAKER_MQTT_PERSISTENT_SESSION is not set
+CONFIG_ESP_RMAKER_MQTT_SEND_USERNAME=y
+CONFIG_ESP_RMAKER_MQTT_USERNAME="?Platform=APN/1 ESPIF,RAINMAKER,v1.0"
+CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK=4096
+CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_PRIORITY=5
+CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME="fctry"
+CONFIG_ESP_RMAKER_FACTORY_NAMESPACE="rmaker_creds"
+CONFIG_ESP_RMAKER_DEF_TIMEZONE="Asia/Shanghai"
+CONFIG_ESP_RMAKER_SNTP_SERVER_NAME="pool.ntp.org"
+# end of ESP RainMaker Common
+
+#
+# WS2812 RGB LED
+#
+# CONFIG_WS2812_LED_ENABLE is not set
+# end of WS2812 RGB LED
+
+#
+# DSP Library
+#
+CONFIG_DSP_OPTIMIZATIONS_SUPPORTED=y
+# CONFIG_DSP_ANSI is not set
+CONFIG_DSP_OPTIMIZED=y
+CONFIG_DSP_OPTIMIZATION=1
+# CONFIG_DSP_MAX_FFT_SIZE_512 is not set
+# CONFIG_DSP_MAX_FFT_SIZE_1024 is not set
+# CONFIG_DSP_MAX_FFT_SIZE_2048 is not set
+CONFIG_DSP_MAX_FFT_SIZE_4096=y
+# CONFIG_DSP_MAX_FFT_SIZE_8192 is not set
+# CONFIG_DSP_MAX_FFT_SIZE_16384 is not set
+# CONFIG_DSP_MAX_FFT_SIZE_32768 is not set
+CONFIG_DSP_MAX_FFT_SIZE=4096
+# end of DSP Library
+
+#
+# Camera configuration
+#
+CONFIG_OV7670_SUPPORT=y
+CONFIG_OV7725_SUPPORT=y
+CONFIG_NT99141_SUPPORT=y
+CONFIG_OV2640_SUPPORT=y
+CONFIG_OV3660_SUPPORT=y
+CONFIG_OV5640_SUPPORT=y
+CONFIG_GC2145_SUPPORT=y
+CONFIG_GC032A_SUPPORT=y
+CONFIG_GC0308_SUPPORT=y
+CONFIG_BF3005_SUPPORT=y
+CONFIG_BF20A6_SUPPORT=y
+# CONFIG_SCCB_HARDWARE_I2C_PORT0 is not set
+CONFIG_SCCB_HARDWARE_I2C_PORT1=y
+CONFIG_SCCB_CLK_FREQ=100000
+# CONFIG_GC_SENSOR_WINDOWING_MODE is not set
+CONFIG_GC_SENSOR_SUBSAMPLE_MODE=y
+CONFIG_CAMERA_CORE0=y
+# CONFIG_CAMERA_CORE1 is not set
+# CONFIG_CAMERA_NO_AFFINITY is not set
+CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX=32768
+# end of Camera configuration
+
+#
+# LittleFS
+#
+CONFIG_LITTLEFS_MAX_PARTITIONS=3
+CONFIG_LITTLEFS_PAGE_SIZE=256
+CONFIG_LITTLEFS_OBJ_NAME_LEN=64
+CONFIG_LITTLEFS_READ_SIZE=128
+CONFIG_LITTLEFS_WRITE_SIZE=128
+CONFIG_LITTLEFS_LOOKAHEAD_SIZE=128
+CONFIG_LITTLEFS_CACHE_SIZE=512
+CONFIG_LITTLEFS_BLOCK_CYCLES=512
+CONFIG_LITTLEFS_USE_MTIME=y
+# CONFIG_LITTLEFS_USE_ONLY_HASH is not set
+# CONFIG_LITTLEFS_HUMAN_READABLE is not set
+CONFIG_LITTLEFS_MTIME_USE_SECONDS=y
+# CONFIG_LITTLEFS_MTIME_USE_NONCE is not set
+# CONFIG_LITTLEFS_SPIFFS_COMPAT is not set
+# CONFIG_LITTLEFS_FLUSH_FILE_EVERY_WRITE is not set
+# end of LittleFS
+# end of Component config
+
+#
+# Compatibility options
+#
+# CONFIG_LEGACY_INCLUDE_COMMON_HEADERS is not set
+# end of Compatibility options
+
+# Deprecated options for backward compatibility
+CONFIG_TOOLPREFIX="xtensa-esp32s3-elf-"
+CONFIG_LOG_BOOTLOADER_LEVEL_NONE=y
+# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set
+# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set
+# CONFIG_LOG_BOOTLOADER_LEVEL_INFO is not set
+# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set
+# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set
+CONFIG_LOG_BOOTLOADER_LEVEL=0
+# CONFIG_APP_ROLLBACK_ENABLE is not set
+# CONFIG_FLASH_ENCRYPTION_ENABLED is not set
+CONFIG_FLASHMODE_QIO=y
+# CONFIG_FLASHMODE_QOUT is not set
+# CONFIG_FLASHMODE_DIO is not set
+# CONFIG_FLASHMODE_DOUT is not set
+# CONFIG_MONITOR_BAUD_9600B is not set
+# CONFIG_MONITOR_BAUD_57600B is not set
+CONFIG_MONITOR_BAUD_115200B=y
+# CONFIG_MONITOR_BAUD_230400B is not set
+# CONFIG_MONITOR_BAUD_921600B is not set
+# CONFIG_MONITOR_BAUD_2MB is not set
+# CONFIG_MONITOR_BAUD_OTHER is not set
+CONFIG_MONITOR_BAUD_OTHER_VAL=115200
+CONFIG_MONITOR_BAUD=115200
+CONFIG_USB_CDC_ENABLED=y
+CONFIG_USB_DESC_CDC_STRING="Espressif CDC Device"
+CONFIG_USB_CDC_RX_BUFSIZE=64
+CONFIG_USB_CDC_TX_BUFSIZE=64
+CONFIG_USB_MSC_ENABLED=y
+CONFIG_USB_DESC_MSC_STRING="Espressif MSC Device"
+CONFIG_USB_MSC_BUFSIZE=4096
+CONFIG_USB_DESC_HID_STRING="Espressif HID Device"
+CONFIG_USB_DEBUG_LEVEL=0
+# CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set
+CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE=y
+CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y
+# CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set
+# CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set
+CONFIG_OPTIMIZATION_ASSERTION_LEVEL=2
+CONFIG_CXX_EXCEPTIONS=y
+CONFIG_CXX_EXCEPTIONS_EMG_POOL_SIZE=0
+# CONFIG_STACK_CHECK_NONE is not set
+CONFIG_STACK_CHECK_NORM=y
+# CONFIG_STACK_CHECK_STRONG is not set
+# CONFIG_STACK_CHECK_ALL is not set
+CONFIG_STACK_CHECK=y
+CONFIG_WARN_WRITE_STRINGS=y
+# CONFIG_DISABLE_GCC8_WARNINGS is not set
+# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set
+CONFIG_ESP32_APPTRACE_DEST_NONE=y
+CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y
+CONFIG_BLUEDROID_ENABLED=y
+# CONFIG_NIMBLE_ENABLED is not set
+CONFIG_BTC_TASK_STACK_SIZE=3072
+CONFIG_BLUEDROID_PINNED_TO_CORE_0=y
+# CONFIG_BLUEDROID_PINNED_TO_CORE_1 is not set
+CONFIG_BLUEDROID_PINNED_TO_CORE=0
+CONFIG_BTU_TASK_STACK_SIZE=4096
+# CONFIG_BLUEDROID_MEM_DEBUG is not set
+CONFIG_GATTS_ENABLE=y
+# CONFIG_GATTS_SEND_SERVICE_CHANGE_MANUAL is not set
+CONFIG_GATTS_SEND_SERVICE_CHANGE_AUTO=y
+CONFIG_GATTS_SEND_SERVICE_CHANGE_MODE=0
+CONFIG_GATTC_ENABLE=y
+# CONFIG_GATTC_CACHE_NVS_FLASH is not set
+CONFIG_BLE_SMP_ENABLE=y
+# CONFIG_SMP_SLAVE_CON_PARAMS_UPD_ENABLE is not set
+# CONFIG_HCI_TRACE_LEVEL_NONE is not set
+# CONFIG_HCI_TRACE_LEVEL_ERROR is not set
+CONFIG_HCI_TRACE_LEVEL_WARNING=y
+# CONFIG_HCI_TRACE_LEVEL_API is not set
+# CONFIG_HCI_TRACE_LEVEL_EVENT is not set
+# CONFIG_HCI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_HCI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_HCI_INITIAL_TRACE_LEVEL=2
+# CONFIG_BTM_TRACE_LEVEL_NONE is not set
+# CONFIG_BTM_TRACE_LEVEL_ERROR is not set
+CONFIG_BTM_TRACE_LEVEL_WARNING=y
+# CONFIG_BTM_TRACE_LEVEL_API is not set
+# CONFIG_BTM_TRACE_LEVEL_EVENT is not set
+# CONFIG_BTM_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BTM_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BTM_INITIAL_TRACE_LEVEL=2
+# CONFIG_L2CAP_TRACE_LEVEL_NONE is not set
+# CONFIG_L2CAP_TRACE_LEVEL_ERROR is not set
+CONFIG_L2CAP_TRACE_LEVEL_WARNING=y
+# CONFIG_L2CAP_TRACE_LEVEL_API is not set
+# CONFIG_L2CAP_TRACE_LEVEL_EVENT is not set
+# CONFIG_L2CAP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_L2CAP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_L2CAP_INITIAL_TRACE_LEVEL=2
+# CONFIG_RFCOMM_TRACE_LEVEL_NONE is not set
+# CONFIG_RFCOMM_TRACE_LEVEL_ERROR is not set
+CONFIG_RFCOMM_TRACE_LEVEL_WARNING=y
+# CONFIG_RFCOMM_TRACE_LEVEL_API is not set
+# CONFIG_RFCOMM_TRACE_LEVEL_EVENT is not set
+# CONFIG_RFCOMM_TRACE_LEVEL_DEBUG is not set
+# CONFIG_RFCOMM_TRACE_LEVEL_VERBOSE is not set
+CONFIG_RFCOMM_INITIAL_TRACE_LEVEL=2
+# CONFIG_SDP_TRACE_LEVEL_NONE is not set
+# CONFIG_SDP_TRACE_LEVEL_ERROR is not set
+CONFIG_SDP_TRACE_LEVEL_WARNING=y
+# CONFIG_SDP_TRACE_LEVEL_API is not set
+# CONFIG_SDP_TRACE_LEVEL_EVENT is not set
+# CONFIG_SDP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_SDP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BTH_LOG_SDP_INITIAL_TRACE_LEVEL=2
+# CONFIG_GAP_TRACE_LEVEL_NONE is not set
+# CONFIG_GAP_TRACE_LEVEL_ERROR is not set
+CONFIG_GAP_TRACE_LEVEL_WARNING=y
+# CONFIG_GAP_TRACE_LEVEL_API is not set
+# CONFIG_GAP_TRACE_LEVEL_EVENT is not set
+# CONFIG_GAP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_GAP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_GAP_INITIAL_TRACE_LEVEL=2
+CONFIG_BNEP_INITIAL_TRACE_LEVEL=2
+# CONFIG_PAN_TRACE_LEVEL_NONE is not set
+# CONFIG_PAN_TRACE_LEVEL_ERROR is not set
+CONFIG_PAN_TRACE_LEVEL_WARNING=y
+# CONFIG_PAN_TRACE_LEVEL_API is not set
+# CONFIG_PAN_TRACE_LEVEL_EVENT is not set
+# CONFIG_PAN_TRACE_LEVEL_DEBUG is not set
+# CONFIG_PAN_TRACE_LEVEL_VERBOSE is not set
+CONFIG_PAN_INITIAL_TRACE_LEVEL=2
+# CONFIG_A2D_TRACE_LEVEL_NONE is not set
+# CONFIG_A2D_TRACE_LEVEL_ERROR is not set
+CONFIG_A2D_TRACE_LEVEL_WARNING=y
+# CONFIG_A2D_TRACE_LEVEL_API is not set
+# CONFIG_A2D_TRACE_LEVEL_EVENT is not set
+# CONFIG_A2D_TRACE_LEVEL_DEBUG is not set
+# CONFIG_A2D_TRACE_LEVEL_VERBOSE is not set
+CONFIG_A2D_INITIAL_TRACE_LEVEL=2
+# CONFIG_AVDT_TRACE_LEVEL_NONE is not set
+# CONFIG_AVDT_TRACE_LEVEL_ERROR is not set
+CONFIG_AVDT_TRACE_LEVEL_WARNING=y
+# CONFIG_AVDT_TRACE_LEVEL_API is not set
+# CONFIG_AVDT_TRACE_LEVEL_EVENT is not set
+# CONFIG_AVDT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_AVDT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_AVDT_INITIAL_TRACE_LEVEL=2
+# CONFIG_AVCT_TRACE_LEVEL_NONE is not set
+# CONFIG_AVCT_TRACE_LEVEL_ERROR is not set
+CONFIG_AVCT_TRACE_LEVEL_WARNING=y
+# CONFIG_AVCT_TRACE_LEVEL_API is not set
+# CONFIG_AVCT_TRACE_LEVEL_EVENT is not set
+# CONFIG_AVCT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_AVCT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_AVCT_INITIAL_TRACE_LEVEL=2
+# CONFIG_AVRC_TRACE_LEVEL_NONE is not set
+# CONFIG_AVRC_TRACE_LEVEL_ERROR is not set
+CONFIG_AVRC_TRACE_LEVEL_WARNING=y
+# CONFIG_AVRC_TRACE_LEVEL_API is not set
+# CONFIG_AVRC_TRACE_LEVEL_EVENT is not set
+# CONFIG_AVRC_TRACE_LEVEL_DEBUG is not set
+# CONFIG_AVRC_TRACE_LEVEL_VERBOSE is not set
+CONFIG_AVRC_INITIAL_TRACE_LEVEL=2
+# CONFIG_MCA_TRACE_LEVEL_NONE is not set
+# CONFIG_MCA_TRACE_LEVEL_ERROR is not set
+CONFIG_MCA_TRACE_LEVEL_WARNING=y
+# CONFIG_MCA_TRACE_LEVEL_API is not set
+# CONFIG_MCA_TRACE_LEVEL_EVENT is not set
+# CONFIG_MCA_TRACE_LEVEL_DEBUG is not set
+# CONFIG_MCA_TRACE_LEVEL_VERBOSE is not set
+CONFIG_MCA_INITIAL_TRACE_LEVEL=2
+# CONFIG_HID_TRACE_LEVEL_NONE is not set
+# CONFIG_HID_TRACE_LEVEL_ERROR is not set
+CONFIG_HID_TRACE_LEVEL_WARNING=y
+# CONFIG_HID_TRACE_LEVEL_API is not set
+# CONFIG_HID_TRACE_LEVEL_EVENT is not set
+# CONFIG_HID_TRACE_LEVEL_DEBUG is not set
+# CONFIG_HID_TRACE_LEVEL_VERBOSE is not set
+CONFIG_HID_INITIAL_TRACE_LEVEL=2
+# CONFIG_APPL_TRACE_LEVEL_NONE is not set
+# CONFIG_APPL_TRACE_LEVEL_ERROR is not set
+CONFIG_APPL_TRACE_LEVEL_WARNING=y
+# CONFIG_APPL_TRACE_LEVEL_API is not set
+# CONFIG_APPL_TRACE_LEVEL_EVENT is not set
+# CONFIG_APPL_TRACE_LEVEL_DEBUG is not set
+# CONFIG_APPL_TRACE_LEVEL_VERBOSE is not set
+CONFIG_APPL_INITIAL_TRACE_LEVEL=2
+# CONFIG_GATT_TRACE_LEVEL_NONE is not set
+# CONFIG_GATT_TRACE_LEVEL_ERROR is not set
+CONFIG_GATT_TRACE_LEVEL_WARNING=y
+# CONFIG_GATT_TRACE_LEVEL_API is not set
+# CONFIG_GATT_TRACE_LEVEL_EVENT is not set
+# CONFIG_GATT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_GATT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_GATT_INITIAL_TRACE_LEVEL=2
+# CONFIG_SMP_TRACE_LEVEL_NONE is not set
+# CONFIG_SMP_TRACE_LEVEL_ERROR is not set
+CONFIG_SMP_TRACE_LEVEL_WARNING=y
+# CONFIG_SMP_TRACE_LEVEL_API is not set
+# CONFIG_SMP_TRACE_LEVEL_EVENT is not set
+# CONFIG_SMP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_SMP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_SMP_INITIAL_TRACE_LEVEL=2
+# CONFIG_BTIF_TRACE_LEVEL_NONE is not set
+# CONFIG_BTIF_TRACE_LEVEL_ERROR is not set
+CONFIG_BTIF_TRACE_LEVEL_WARNING=y
+# CONFIG_BTIF_TRACE_LEVEL_API is not set
+# CONFIG_BTIF_TRACE_LEVEL_EVENT is not set
+# CONFIG_BTIF_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BTIF_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BTIF_INITIAL_TRACE_LEVEL=2
+# CONFIG_BTC_TRACE_LEVEL_NONE is not set
+# CONFIG_BTC_TRACE_LEVEL_ERROR is not set
+CONFIG_BTC_TRACE_LEVEL_WARNING=y
+# CONFIG_BTC_TRACE_LEVEL_API is not set
+# CONFIG_BTC_TRACE_LEVEL_EVENT is not set
+# CONFIG_BTC_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BTC_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BTC_INITIAL_TRACE_LEVEL=2
+# CONFIG_OSI_TRACE_LEVEL_NONE is not set
+# CONFIG_OSI_TRACE_LEVEL_ERROR is not set
+CONFIG_OSI_TRACE_LEVEL_WARNING=y
+# CONFIG_OSI_TRACE_LEVEL_API is not set
+# CONFIG_OSI_TRACE_LEVEL_EVENT is not set
+# CONFIG_OSI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_OSI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_OSI_INITIAL_TRACE_LEVEL=2
+# CONFIG_BLUFI_TRACE_LEVEL_NONE is not set
+# CONFIG_BLUFI_TRACE_LEVEL_ERROR is not set
+CONFIG_BLUFI_TRACE_LEVEL_WARNING=y
+# CONFIG_BLUFI_TRACE_LEVEL_API is not set
+# CONFIG_BLUFI_TRACE_LEVEL_EVENT is not set
+# CONFIG_BLUFI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BLUFI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BLUFI_INITIAL_TRACE_LEVEL=2
+# CONFIG_BLE_HOST_QUEUE_CONGESTION_CHECK is not set
+CONFIG_SMP_ENABLE=y
+CONFIG_BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT=30
+# CONFIG_BLE_MESH_ALLOC_FROM_PSRAM_FIRST is not set
+CONFIG_ADC2_DISABLE_DAC=y
+# CONFIG_EVENT_LOOP_PROFILING is not set
+CONFIG_POST_EVENTS_FROM_ISR=y
+CONFIG_POST_EVENTS_FROM_IRAM_ISR=y
+# CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND is not set
+CONFIG_IPC_TASK_STACK_SIZE=1024
+CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y
+# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set
+CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20
+CONFIG_ESP32_PHY_MAX_TX_POWER=20
+CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU=y
+# CONFIG_ESP32S2_PANIC_PRINT_HALT is not set
+CONFIG_ESP32S2_PANIC_PRINT_REBOOT=y
+# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set
+# CONFIG_ESP32S2_PANIC_GDBSTUB is not set
+CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP=y
+CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32
+CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2048
+CONFIG_MAIN_TASK_STACK_SIZE=4096
+CONFIG_CONSOLE_UART_DEFAULT=y
+# CONFIG_CONSOLE_UART_CUSTOM is not set
+# CONFIG_ESP_CONSOLE_UART_NONE is not set
+CONFIG_CONSOLE_UART=y
+CONFIG_CONSOLE_UART_NUM=0
+CONFIG_CONSOLE_UART_BAUDRATE=115200
+CONFIG_INT_WDT=y
+CONFIG_INT_WDT_TIMEOUT_MS=1000
+CONFIG_INT_WDT_CHECK_CPU1=y
+CONFIG_TASK_WDT=y
+CONFIG_TASK_WDT_PANIC=y
+CONFIG_TASK_WDT_TIMEOUT_S=5
+CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
+# CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 is not set
+# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set
+CONFIG_TIMER_TASK_STACK_SIZE=4096
+CONFIG_SW_COEXIST_ENABLE=y
+# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
+# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set
+CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y
+CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND=150
+CONFIG_MB_MASTER_DELAY_MS_CONVERT=200
+CONFIG_MB_QUEUE_LENGTH=20
+CONFIG_MB_SERIAL_TASK_STACK_SIZE=4096
+CONFIG_MB_SERIAL_BUF_SIZE=256
+CONFIG_MB_SERIAL_TASK_PRIO=10
+# CONFIG_MB_CONTROLLER_SLAVE_ID_SUPPORT is not set
+CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT=20
+CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE=20
+CONFIG_MB_CONTROLLER_STACK_SIZE=4096
+CONFIG_MB_EVENT_QUEUE_TIMEOUT=20
+CONFIG_MB_TIMER_PORT_ENABLED=y
+CONFIG_MB_TIMER_GROUP=0
+CONFIG_MB_TIMER_INDEX=0
+# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set
+CONFIG_TIMER_TASK_PRIORITY=1
+CONFIG_TIMER_TASK_STACK_DEPTH=2048
+CONFIG_TIMER_QUEUE_LENGTH=10
+# CONFIG_L2_TO_L3_COPY is not set
+# CONFIG_USE_ONLY_LWIP_SELECT is not set
+CONFIG_ESP_GRATUITOUS_ARP=y
+CONFIG_GARP_TMR_INTERVAL=60
+CONFIG_TCPIP_RECVMBOX_SIZE=32
+CONFIG_TCP_MAXRTX=12
+CONFIG_TCP_SYNMAXRTX=6
+CONFIG_TCP_MSS=1436
+CONFIG_TCP_MSL=60000
+CONFIG_TCP_SND_BUF_DEFAULT=5744
+CONFIG_TCP_WND_DEFAULT=5744
+CONFIG_TCP_RECVMBOX_SIZE=6
+CONFIG_TCP_QUEUE_OOSEQ=y
+# CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set
+CONFIG_TCP_OVERSIZE_MSS=y
+# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set
+# CONFIG_TCP_OVERSIZE_DISABLE is not set
+CONFIG_UDP_RECVMBOX_SIZE=6
+CONFIG_TCPIP_TASK_STACK_SIZE=2560
+# CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY is not set
+CONFIG_TCPIP_TASK_AFFINITY_CPU0=y
+# CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set
+CONFIG_TCPIP_TASK_AFFINITY=0x0
+# CONFIG_PPP_SUPPORT is not set
+CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5
+CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=2048
+CONFIG_ESP32_PTHREAD_STACK_MIN=768
+CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y
+# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set
+# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set
+CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1
+CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread"
+CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y
+# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set
+# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set
+# CONFIG_USB_ENABLED is not set
+CONFIG_USB_DEBUG_LEVEL=0
+CONFIG_USB_DESC_CDC_STRING="Espressif CDC Device"
+CONFIG_USB_DESC_MSC_STRING="Espressif MSC Device"
+CONFIG_USB_DESC_HID_STRING="Espressif HID Device"
+CONFIG_USB_MSC_ENABLED=y
+CONFIG_USB_MSC_BUFSIZE=4096
+CONFIG_USB_CDC_ENABLED=y
+CONFIG_USB_CDC_RX_BUFSIZE=64
+CONFIG_USB_CDC_TX_BUFSIZE=64
+CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y
+CONFIG_SUPPORT_TERMIOS=y
+CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1
+CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN=128
+# End of deprecated options
diff --git a/variants/AirM2M_CORE_ESP32C3/pins_arduino.h b/variants/AirM2M_CORE_ESP32C3/pins_arduino.h
new file mode 100644
index 00000000000..d0510fe8326
--- /dev/null
+++ b/variants/AirM2M_CORE_ESP32C3/pins_arduino.h
@@ -0,0 +1,32 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define EXTERNAL_NUM_INTERRUPTS 22
+#define NUM_DIGITAL_PINS        22
+#define NUM_ANALOG_INPUTS       6
+
+#define analogInputToDigitalPin(p)  (((p)<NUM_ANALOG_INPUTS)?(esp32_adc2gpio[(p)]):-1)
+#define digitalPinToInterrupt(p)    (((p)<NUM_DIGITAL_PINS)?(p):-1)
+#define digitalPinHasPWM(p)         (p < EXTERNAL_NUM_INTERRUPTS)
+
+static const uint8_t TX = 21;
+static const uint8_t RX = 20;
+
+static const uint8_t SDA = 4;
+static const uint8_t SCL = 5;
+
+static const uint8_t SS    = 7;
+static const uint8_t MOSI  = 3;
+static const uint8_t MISO  = 10;
+static const uint8_t SCK   = 2;
+
+static const uint8_t A0 = 0;
+static const uint8_t A1 = 1;
+static const uint8_t A2 = 2;
+static const uint8_t A3 = 3;
+static const uint8_t A4 = 4;
+static const uint8_t A5 = 5;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/ET-Board/pins_arduino.h b/variants/ET-Board/pins_arduino.h
index 8ab4a0b600a..9dada4cb50d 100644
--- a/variants/ET-Board/pins_arduino.h
+++ b/variants/ET-Board/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       7
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/Microduino-esp32/pins_arduino.h b/variants/Microduino-esp32/pins_arduino.h
index 35861423e8e..368be4ad147 100644
--- a/variants/Microduino-esp32/pins_arduino.h
+++ b/variants/Microduino-esp32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        22
 #define NUM_ANALOG_INPUTS       12
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/S_ODI_Ultra_v1/pins_arduino.h b/variants/S_ODI_Ultra_v1/pins_arduino.h
index a1a968ed5c3..51278ce94be 100644
--- a/variants/S_ODI_Ultra_v1/pins_arduino.h
+++ b/variants/S_ODI_Ultra_v1/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/adafruit_feather_esp32_v2/pins_arduino.h b/variants/adafruit_feather_esp32_v2/pins_arduino.h
new file mode 100644
index 00000000000..97a09dba233
--- /dev/null
+++ b/variants/adafruit_feather_esp32_v2/pins_arduino.h
@@ -0,0 +1,73 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define EXTERNAL_NUM_INTERRUPTS 16
+#define NUM_DIGITAL_PINS        40
+#define NUM_ANALOG_INPUTS       16
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
+#define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 34)
+
+static const uint8_t LED_BUILTIN = 13;
+#define BUILTIN_LED  LED_BUILTIN // backward compatibility
+#define LED_BUILTIN LED_BUILTIN
+
+static const uint8_t TX = 8;
+static const uint8_t RX = 7;
+static const uint8_t TX1 = 8;
+static const uint8_t RX1 = 7;
+
+static const uint8_t SDA = 22;
+static const uint8_t SCL = 20;
+
+static const uint8_t SS    = 33;
+static const uint8_t MOSI  = 19;
+static const uint8_t MISO  = 21;
+static const uint8_t SCK   = 5;
+
+// mapping to match other feathers and also in order
+static const uint8_t A0 = 26; 
+static const uint8_t A1 = 25;
+static const uint8_t A2 = 34;
+static const uint8_t A3 = 39;
+static const uint8_t A4 = 36;
+static const uint8_t A5 = 4;
+static const uint8_t A6 = 14;
+static const uint8_t A7 = 32;
+static const uint8_t A8 = 15;
+static const uint8_t A9 = 33;
+static const uint8_t A10 = 27;
+static const uint8_t A11 = 12;
+static const uint8_t A12 = 13;
+static const uint8_t A13 = 35;
+
+// vbat measure
+#define BATT_MONITOR 35
+
+// internal switch
+#define BUTTON = 38;
+
+// Neopixel
+#define PIN_NEOPIXEL 0
+
+// Neopixel & I2C power
+#define NEOPIXEL_I2C_POWER 2
+
+static const uint8_t T0 = 4;
+static const uint8_t T1 = 0;
+static const uint8_t T2 = 2;
+static const uint8_t T3 = 15;
+static const uint8_t T4 = 13;
+static const uint8_t T5 = 12;
+static const uint8_t T6 = 14;
+static const uint8_t T7 = 27;
+static const uint8_t T8 = 33;
+static const uint8_t T9 = 32;
+
+static const uint8_t DAC1 = 25;
+static const uint8_t DAC2 = 26;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/adafruit_feather_esp32_v2/variant.cpp b/variants/adafruit_feather_esp32_v2/variant.cpp
new file mode 100644
index 00000000000..9345f6058a6
--- /dev/null
+++ b/variants/adafruit_feather_esp32_v2/variant.cpp
@@ -0,0 +1,40 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Ha Thach (tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "esp32-hal-gpio.h"
+#include "pins_arduino.h"
+
+extern "C" {
+
+// Initialize variant/board, called before setup()
+void initVariant(void)
+{
+  // This board has a power control pin, and we must set it to output and high
+  // in order to enable the NeoPixels & I2C
+  pinMode(NEOPIXEL_I2C_POWER, OUTPUT);
+  digitalWrite(NEOPIXEL_I2C_POWER, HIGH);
+}
+
+}
diff --git a/variants/adafruit_feather_esp32s2/bootloader.bin b/variants/adafruit_feather_esp32s2/bootloader.bin
index 857327ea6d4..543dce3106d 100644
Binary files a/variants/adafruit_feather_esp32s2/bootloader.bin and b/variants/adafruit_feather_esp32s2/bootloader.bin differ
diff --git a/variants/adafruit_feather_esp32s2/pins_arduino.h b/variants/adafruit_feather_esp32s2/pins_arduino.h
index 88e22cd1b64..261377de89c 100644
--- a/variants/adafruit_feather_esp32s2/pins_arduino.h
+++ b/variants/adafruit_feather_esp32s2/pins_arduino.h
@@ -15,7 +15,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
@@ -25,6 +25,8 @@
 #define NEOPIXEL_NUM        1     // number of neopixels
 #define NEOPIXEL_POWER      21    // power pin
 #define NEOPIXEL_POWER_ON   HIGH  // power pin state when on
+#define I2C_POWER           7     // I2C power pin
+#define PIN_I2C_POWER       7     // I2C power pin
 
 static const uint8_t SDA = 3;
 static const uint8_t SCL = 4;
diff --git a/variants/adafruit_feather_esp32s2/tinyuf2.bin b/variants/adafruit_feather_esp32s2/tinyuf2.bin
index 17143a676ee..9b39ac52093 100644
Binary files a/variants/adafruit_feather_esp32s2/tinyuf2.bin and b/variants/adafruit_feather_esp32s2/tinyuf2.bin differ
diff --git a/variants/adafruit_feather_esp32s2/variant.cpp b/variants/adafruit_feather_esp32s2/variant.cpp
new file mode 100644
index 00000000000..069f735161d
--- /dev/null
+++ b/variants/adafruit_feather_esp32s2/variant.cpp
@@ -0,0 +1,46 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Ha Thach (tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "esp32-hal-gpio.h"
+#include "pins_arduino.h"
+
+extern "C" {
+
+// Initialize variant/board, called before setup()
+void initVariant(void)
+{
+  // This board has a power control pin, and we must set it to output and high
+  // in order to enable the NeoPixels.
+  pinMode(NEOPIXEL_POWER, OUTPUT);
+  digitalWrite(NEOPIXEL_POWER, HIGH);
+
+  // turn on the I2C power by setting pin to opposite of 'rest state'
+  pinMode(PIN_I2C_POWER, INPUT);
+  delay(1);
+  bool polarity = digitalRead(PIN_I2C_POWER);
+  pinMode(PIN_I2C_POWER, OUTPUT);
+  digitalWrite(PIN_I2C_POWER, !polarity);
+}
+}
diff --git a/variants/adafruit_feather_esp32s2_reversetft/pins_arduino.h b/variants/adafruit_feather_esp32s2_reversetft/pins_arduino.h
index 84cfd2879cd..2169daae92e 100644
--- a/variants/adafruit_feather_esp32s2_reversetft/pins_arduino.h
+++ b/variants/adafruit_feather_esp32s2_reversetft/pins_arduino.h
@@ -15,7 +15,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/adafruit_feather_esp32s2_reversetft/variant.cpp b/variants/adafruit_feather_esp32s2_reversetft/variant.cpp
new file mode 100644
index 00000000000..750f5f72b02
--- /dev/null
+++ b/variants/adafruit_feather_esp32s2_reversetft/variant.cpp
@@ -0,0 +1,37 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Ha Thach (tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "esp32-hal-gpio.h"
+#include "pins_arduino.h"
+
+extern "C" {
+
+// Initialize variant/board, called before setup()
+void initVariant(void)
+{
+
+}
+
+}
diff --git a/variants/adafruit_feather_esp32s2_tft/pins_arduino.h b/variants/adafruit_feather_esp32s2_tft/pins_arduino.h
index 03ca198d8cd..0a55e7d30ae 100644
--- a/variants/adafruit_feather_esp32s2_tft/pins_arduino.h
+++ b/variants/adafruit_feather_esp32s2_tft/pins_arduino.h
@@ -15,7 +15,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/adafruit_feather_esp32s2_tft/variant.cpp b/variants/adafruit_feather_esp32s2_tft/variant.cpp
new file mode 100644
index 00000000000..548ce9ff4a1
--- /dev/null
+++ b/variants/adafruit_feather_esp32s2_tft/variant.cpp
@@ -0,0 +1,42 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Ha Thach (tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "esp32-hal-gpio.h"
+#include "pins_arduino.h"
+
+extern "C" {
+
+// Initialize variant/board, called before setup()
+void initVariant(void)
+{
+  // This board has power control pins, and we must set them to output and high
+  // in order to enable the NeoPixels, TFT & I2C
+  pinMode(NEOPIXEL_POWER, OUTPUT);
+  digitalWrite(NEOPIXEL_POWER, HIGH);
+  pinMode(TFT_I2C_POWER, OUTPUT);
+  digitalWrite(TFT_I2C_POWER, HIGH);
+}
+
+}
diff --git a/variants/adafruit_feather_esp32s3_nopsram/bootloader.bin b/variants/adafruit_feather_esp32s3_nopsram/bootloader.bin
new file mode 100644
index 00000000000..644fd7033ae
Binary files /dev/null and b/variants/adafruit_feather_esp32s3_nopsram/bootloader.bin differ
diff --git a/variants/adafruit_feather_esp32s3_nopsram/partitions.csv b/variants/adafruit_feather_esp32s3_nopsram/partitions.csv
new file mode 100644
index 00000000000..4026378b6fb
--- /dev/null
+++ b/variants/adafruit_feather_esp32s3_nopsram/partitions.csv
@@ -0,0 +1,10 @@
+# ESP-IDF Partition Table
+# Name,   Type, SubType, Offset,  Size, Flags
+# bootloader.bin,,          0x1000, 32K
+# partition table,,         0x8000, 4K
+nvs,      data, nvs,      0x9000,  20K,
+otadata,  data, ota,      0xe000,  8K,
+ota_0,    0,    ota_0,   0x10000,  2048K,
+ota_1,    0,    ota_1,  0x210000,  2048K,
+uf2,      app,  factory,0x410000,  256K,
+ffat,     data, fat,    0x450000,  3776K,
diff --git a/variants/adafruit_feather_esp32s3_nopsram/pins_arduino.h b/variants/adafruit_feather_esp32s3_nopsram/pins_arduino.h
new file mode 100644
index 00000000000..58a23a17f7c
--- /dev/null
+++ b/variants/adafruit_feather_esp32s3_nopsram/pins_arduino.h
@@ -0,0 +1,71 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define USB_VID            0x239A
+#define USB_PID            0x8113
+#define USB_MANUFACTURER   "Adafruit"
+#define USB_PRODUCT        "Feather ESP32-S3 No PSRAM"
+#define USB_SERIAL         "" // Empty string for MAC adddress
+
+#define EXTERNAL_NUM_INTERRUPTS 46
+#define NUM_DIGITAL_PINS        48
+#define NUM_ANALOG_INPUTS       20
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
+#define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 46)
+
+#define LED_BUILTIN         13
+
+#define PIN_NEOPIXEL        33
+#define NEOPIXEL_NUM        1     // number of neopixels
+#define NEOPIXEL_POWER      21    // power pin
+#define NEOPIXEL_POWER_ON   HIGH  // power pin state when on
+#define I2C_POWER           7     // I2C power pin
+#define PIN_I2C_POWER       7     // I2C power pin
+
+
+static const uint8_t TX = 39;
+static const uint8_t RX = 38;
+#define TX1 TX
+#define RX1 RX
+
+static const uint8_t SDA = 3;
+static const uint8_t SCL = 4;
+
+static const uint8_t SS    = 42;
+static const uint8_t MOSI  = 35;
+static const uint8_t SCK   = 36;
+static const uint8_t MISO  = 37;
+
+static const uint8_t A0 = 18;
+static const uint8_t A1 = 17;
+static const uint8_t A2 = 16;
+static const uint8_t A3 = 15;
+static const uint8_t A4 = 14;
+static const uint8_t A5 = 8;
+static const uint8_t A6 = 3;
+static const uint8_t A7 = 4;
+static const uint8_t A8 = 5;
+static const uint8_t A9 = 6;
+static const uint8_t A10 = 9;
+static const uint8_t A11 = 10;
+static const uint8_t A12 = 11;
+static const uint8_t A13 = 12;
+static const uint8_t A14 = 13;
+
+static const uint8_t T3 = 3;
+static const uint8_t T4 = 4;
+static const uint8_t T5 = 5;
+static const uint8_t T6 = 6;
+static const uint8_t T8 = 8;
+static const uint8_t T9 = 9;
+static const uint8_t T10 = 10;
+static const uint8_t T11 = 11;
+static const uint8_t T12 = 12;
+static const uint8_t T13 = 13;
+static const uint8_t T14 = 14;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/adafruit_feather_esp32s3_nopsram/tinyuf2.bin b/variants/adafruit_feather_esp32s3_nopsram/tinyuf2.bin
new file mode 100644
index 00000000000..18c2c554f76
Binary files /dev/null and b/variants/adafruit_feather_esp32s3_nopsram/tinyuf2.bin differ
diff --git a/variants/adafruit_feather_esp32s3_nopsram/variant.cpp b/variants/adafruit_feather_esp32s3_nopsram/variant.cpp
new file mode 100644
index 00000000000..52acb84102e
--- /dev/null
+++ b/variants/adafruit_feather_esp32s3_nopsram/variant.cpp
@@ -0,0 +1,43 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Ha Thach (tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "esp32-hal-gpio.h"
+#include "pins_arduino.h"
+
+extern "C" {
+
+// Initialize variant/board, called before setup()
+void initVariant(void)
+{
+  // This board has a power control pin, and we must set it to output and high
+  // in order to enable the NeoPixels.
+  pinMode(NEOPIXEL_POWER, OUTPUT);
+  digitalWrite(NEOPIXEL_POWER, HIGH);
+
+  // turn on the I2C power by setting LDO enable pin 'high'
+  pinMode(PIN_I2C_POWER, OUTPUT);
+  digitalWrite(PIN_I2C_POWER, HIGH);
+}
+}
diff --git a/variants/adafruit_funhouse_esp32s2/pins_arduino.h b/variants/adafruit_funhouse_esp32s2/pins_arduino.h
index a9076903fb5..587033ecbce 100644
--- a/variants/adafruit_funhouse_esp32s2/pins_arduino.h
+++ b/variants/adafruit_funhouse_esp32s2/pins_arduino.h
@@ -15,7 +15,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/adafruit_funhouse_esp32s2/variant.cpp b/variants/adafruit_funhouse_esp32s2/variant.cpp
new file mode 100644
index 00000000000..750f5f72b02
--- /dev/null
+++ b/variants/adafruit_funhouse_esp32s2/variant.cpp
@@ -0,0 +1,37 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Ha Thach (tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "esp32-hal-gpio.h"
+#include "pins_arduino.h"
+
+extern "C" {
+
+// Initialize variant/board, called before setup()
+void initVariant(void)
+{
+
+}
+
+}
diff --git a/variants/adafruit_magtag29_esp32s2/pins_arduino.h b/variants/adafruit_magtag29_esp32s2/pins_arduino.h
index 8142ab5ca6b..56e6d7cd581 100644
--- a/variants/adafruit_magtag29_esp32s2/pins_arduino.h
+++ b/variants/adafruit_magtag29_esp32s2/pins_arduino.h
@@ -15,7 +15,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/adafruit_magtag29_esp32s2/variant.cpp b/variants/adafruit_magtag29_esp32s2/variant.cpp
new file mode 100644
index 00000000000..750f5f72b02
--- /dev/null
+++ b/variants/adafruit_magtag29_esp32s2/variant.cpp
@@ -0,0 +1,37 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Ha Thach (tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "esp32-hal-gpio.h"
+#include "pins_arduino.h"
+
+extern "C" {
+
+// Initialize variant/board, called before setup()
+void initVariant(void)
+{
+
+}
+
+}
diff --git a/variants/adafruit_metro_esp32s2/pins_arduino.h b/variants/adafruit_metro_esp32s2/pins_arduino.h
index b7eb3778c1e..d78fd949097 100644
--- a/variants/adafruit_metro_esp32s2/pins_arduino.h
+++ b/variants/adafruit_metro_esp32s2/pins_arduino.h
@@ -14,7 +14,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/adafruit_metro_esp32s2/variant.cpp b/variants/adafruit_metro_esp32s2/variant.cpp
new file mode 100644
index 00000000000..750f5f72b02
--- /dev/null
+++ b/variants/adafruit_metro_esp32s2/variant.cpp
@@ -0,0 +1,37 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Ha Thach (tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "esp32-hal-gpio.h"
+#include "pins_arduino.h"
+
+extern "C" {
+
+// Initialize variant/board, called before setup()
+void initVariant(void)
+{
+
+}
+
+}
diff --git a/variants/adafruit_qtpy_esp32/pins_arduino.h b/variants/adafruit_qtpy_esp32/pins_arduino.h
new file mode 100644
index 00000000000..cfd3af3a147
--- /dev/null
+++ b/variants/adafruit_qtpy_esp32/pins_arduino.h
@@ -0,0 +1,60 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define EXTERNAL_NUM_INTERRUPTS 16
+#define NUM_DIGITAL_PINS        40
+#define NUM_ANALOG_INPUTS       16
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
+#define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 34)
+
+static const uint8_t PIN_NEOPIXEL = 5;
+static const uint8_t NEOPIXEL_POWER = 8;
+
+static const uint8_t TX = 32;
+static const uint8_t RX = 7;
+
+#define TX1 32
+#define RX1 7
+
+static const uint8_t SDA = 4;
+static const uint8_t SCL = 33;
+
+static const uint8_t SDA1 = 22;
+static const uint8_t SCL1 = 19;
+
+static const uint8_t SS    = 27;
+static const uint8_t MOSI  = 13;
+static const uint8_t MISO  = 12;
+static const uint8_t SCK   = 14;
+
+static const uint8_t A0 = 26; 
+static const uint8_t A1 = 25;
+static const uint8_t A2 = 27;
+static const uint8_t A3 = 15;
+static const uint8_t A4 = 4;
+static const uint8_t A5 = 33;
+static const uint8_t A6 = 32;
+static const uint8_t A7 = 7;
+static const uint8_t A8 = 14;
+static const uint8_t A9 = 12;
+static const uint8_t A10 = 13;
+
+static const uint8_t BUTTON = 0;
+
+static const uint8_t T0 = 4;
+static const uint8_t T3 = 15;
+static const uint8_t T4 = 13;
+static const uint8_t T5 = 12;
+static const uint8_t T6 = 14;
+static const uint8_t T7 = 27;
+static const uint8_t T8 = 33;
+static const uint8_t T9 = 32;
+
+static const uint8_t DAC1 = 25;
+static const uint8_t DAC2 = 26;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/adafruit_qtpy_esp32/variant.cpp b/variants/adafruit_qtpy_esp32/variant.cpp
new file mode 100644
index 00000000000..726ec8fa483
--- /dev/null
+++ b/variants/adafruit_qtpy_esp32/variant.cpp
@@ -0,0 +1,40 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Ha Thach (tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "esp32-hal-gpio.h"
+#include "pins_arduino.h"
+
+extern "C" {
+
+// Initialize variant/board, called before setup()
+void initVariant(void)
+{
+  // This board has a power control pin, and we must set it to output and high
+  // in order to enable the NeoPixels.
+  pinMode(NEOPIXEL_POWER, OUTPUT);
+  digitalWrite(NEOPIXEL_POWER, HIGH);
+}
+
+}
diff --git a/variants/adafruit_qtpy_esp32c3/pins_arduino.h b/variants/adafruit_qtpy_esp32c3/pins_arduino.h
new file mode 100644
index 00000000000..6c93bfd5820
--- /dev/null
+++ b/variants/adafruit_qtpy_esp32c3/pins_arduino.h
@@ -0,0 +1,34 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define EXTERNAL_NUM_INTERRUPTS 22
+#define NUM_DIGITAL_PINS        22
+#define NUM_ANALOG_INPUTS       6
+
+#define analogInputToDigitalPin(p)  (((p)<NUM_ANALOG_INPUTS)?(analogChannelToDigitalPin(p)):-1)
+#define digitalPinToInterrupt(p)    (((p)<NUM_DIGITAL_PINS)?(p):-1)
+#define digitalPinHasPWM(p)         (p < EXTERNAL_NUM_INTERRUPTS)
+
+#define BUTTON 9
+#define PIN_NEOPIXEL 2
+
+static const uint8_t TX = 21;
+static const uint8_t RX = 20;
+
+static const uint8_t SDA = 5;
+static const uint8_t SCL = 6;
+
+static const uint8_t SS    = 6;
+static const uint8_t MOSI  = 7;
+static const uint8_t MISO  = 8;
+static const uint8_t SCK   = 10;
+
+static const uint8_t A0 = 4;
+static const uint8_t A1 = 3;
+static const uint8_t A2 = 1;
+static const uint8_t A3 = 0;
+static const uint8_t A4 = 5;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/adafruit_qtpy_esp32s2/pins_arduino.h b/variants/adafruit_qtpy_esp32s2/pins_arduino.h
index 1373212ba4d..d2ebca325b4 100644
--- a/variants/adafruit_qtpy_esp32s2/pins_arduino.h
+++ b/variants/adafruit_qtpy_esp32s2/pins_arduino.h
@@ -15,7 +15,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/adafruit_qtpy_esp32s2/variant.cpp b/variants/adafruit_qtpy_esp32s2/variant.cpp
new file mode 100644
index 00000000000..726ec8fa483
--- /dev/null
+++ b/variants/adafruit_qtpy_esp32s2/variant.cpp
@@ -0,0 +1,40 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Ha Thach (tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "esp32-hal-gpio.h"
+#include "pins_arduino.h"
+
+extern "C" {
+
+// Initialize variant/board, called before setup()
+void initVariant(void)
+{
+  // This board has a power control pin, and we must set it to output and high
+  // in order to enable the NeoPixels.
+  pinMode(NEOPIXEL_POWER, OUTPUT);
+  digitalWrite(NEOPIXEL_POWER, HIGH);
+}
+
+}
diff --git a/variants/adafruit_qtpy_esp32s3_nopsram/bootloader.bin b/variants/adafruit_qtpy_esp32s3_nopsram/bootloader.bin
new file mode 100644
index 00000000000..c0bf19f1338
Binary files /dev/null and b/variants/adafruit_qtpy_esp32s3_nopsram/bootloader.bin differ
diff --git a/variants/adafruit_qtpy_esp32s3_nopsram/partitions.csv b/variants/adafruit_qtpy_esp32s3_nopsram/partitions.csv
new file mode 100644
index 00000000000..4026378b6fb
--- /dev/null
+++ b/variants/adafruit_qtpy_esp32s3_nopsram/partitions.csv
@@ -0,0 +1,10 @@
+# ESP-IDF Partition Table
+# Name,   Type, SubType, Offset,  Size, Flags
+# bootloader.bin,,          0x1000, 32K
+# partition table,,         0x8000, 4K
+nvs,      data, nvs,      0x9000,  20K,
+otadata,  data, ota,      0xe000,  8K,
+ota_0,    0,    ota_0,   0x10000,  2048K,
+ota_1,    0,    ota_1,  0x210000,  2048K,
+uf2,      app,  factory,0x410000,  256K,
+ffat,     data, fat,    0x450000,  3776K,
diff --git a/variants/adafruit_qtpy_esp32s3_nopsram/pins_arduino.h b/variants/adafruit_qtpy_esp32s3_nopsram/pins_arduino.h
new file mode 100644
index 00000000000..86e893129fe
--- /dev/null
+++ b/variants/adafruit_qtpy_esp32s3_nopsram/pins_arduino.h
@@ -0,0 +1,56 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define USB_VID            0x239A
+#define USB_PID            0x8119
+#define USB_MANUFACTURER   "Adafruit"
+#define USB_PRODUCT        "QT Py ESP32-S3 No PSRAM"
+#define USB_SERIAL         "" // Empty string for MAC adddress
+
+#define EXTERNAL_NUM_INTERRUPTS 46
+#define NUM_DIGITAL_PINS        48
+#define NUM_ANALOG_INPUTS       20
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
+#define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 46)
+
+#define PIN_NEOPIXEL        39
+#define NEOPIXEL_NUM        1     // number of neopixels
+#define NEOPIXEL_POWER      38    // power pin
+#define NEOPIXEL_POWER_ON   HIGH  // power pin state when on
+
+static const uint8_t TX = 5;
+static const uint8_t RX = 16;
+#define TX1 TX
+#define RX1 RX
+
+static const uint8_t SDA = 7;
+static const uint8_t SCL = 6;
+
+static const uint8_t SDA1 = 41;
+static const uint8_t SCL1 = 40;
+
+static const uint8_t SS    = 42;
+static const uint8_t MOSI  = 35;
+static const uint8_t SCK   = 36;
+static const uint8_t MISO  = 37;
+
+static const uint8_t A0 = 18;
+static const uint8_t A1 = 17;
+static const uint8_t A2 = 9;
+static const uint8_t A3 = 8;
+static const uint8_t A4 = 7;
+static const uint8_t A5 = 6;
+static const uint8_t A6 = 5;
+static const uint8_t A7 = 16;
+
+static const uint8_t T5 = 5;
+static const uint8_t T6 = 6;
+static const uint8_t T7 = 7;
+static const uint8_t T8 = 8;
+static const uint8_t T9 = 9;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/adafruit_qtpy_esp32s3_nopsram/tinyuf2.bin b/variants/adafruit_qtpy_esp32s3_nopsram/tinyuf2.bin
new file mode 100644
index 00000000000..748dcb7a608
Binary files /dev/null and b/variants/adafruit_qtpy_esp32s3_nopsram/tinyuf2.bin differ
diff --git a/variants/adafruit_qtpy_esp32s3_nopsram/variant.cpp b/variants/adafruit_qtpy_esp32s3_nopsram/variant.cpp
new file mode 100644
index 00000000000..5f7a3c0b55d
--- /dev/null
+++ b/variants/adafruit_qtpy_esp32s3_nopsram/variant.cpp
@@ -0,0 +1,39 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Ha Thach (tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "esp32-hal-gpio.h"
+#include "pins_arduino.h"
+
+extern "C" {
+
+// Initialize variant/board, called before setup()
+void initVariant(void)
+{
+  // This board has a power control pin, and we must set it to output and high
+  // in order to enable the NeoPixels.
+  pinMode(NEOPIXEL_POWER, OUTPUT);
+  digitalWrite(NEOPIXEL_POWER, HIGH);
+}
+}
diff --git a/variants/alksesp32/pins_arduino.h b/variants/alksesp32/pins_arduino.h
index f170b852632..a40501ab20d 100644
--- a/variants/alksesp32/pins_arduino.h
+++ b/variants/alksesp32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/atmegazero_esp32s2/pins_arduino.h b/variants/atmegazero_esp32s2/pins_arduino.h
index 86525faac21..44df45e0b18 100644
--- a/variants/atmegazero_esp32s2/pins_arduino.h
+++ b/variants/atmegazero_esp32s2/pins_arduino.h
@@ -13,7 +13,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/bpi-bit/pins_arduino.h b/variants/bpi-bit/pins_arduino.h
index 2a317a9abf9..f1ef3003662 100644
--- a/variants/bpi-bit/pins_arduino.h
+++ b/variants/bpi-bit/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS 40
 #define NUM_ANALOG_INPUTS 16
 
-#define analogInputToDigitalPin(p) (((p) < 20) ? (esp32_adc2gpio[(p)]) : -1)
+#define analogInputToDigitalPin(p) (((p) < 20) ? (analogChannelToDigitalPin(p)) : -1)
 #define digitalPinToInterrupt(p) (((p) < 40) ? (p) : -1)
 #define digitalPinHasPWM(p) (p < 34)
 
diff --git a/variants/ch_denky/pins_arduino.h b/variants/ch_denky/pins_arduino.h
index 7b61af6f029..23a786e0e53 100644
--- a/variants/ch_denky/pins_arduino.h
+++ b/variants/ch_denky/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/d-duino-32/pins_arduino.h b/variants/d-duino-32/pins_arduino.h
index 19a1eb91a16..579cdfac77b 100644
--- a/variants/d-duino-32/pins_arduino.h
+++ b/variants/d-duino-32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/d32/d32_core.h b/variants/d32/d32_core.h
index 787d08c2006..0416719f2cb 100644
--- a/variants/d32/d32_core.h
+++ b/variants/d32/d32_core.h
@@ -5,7 +5,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/deneyapkart/pins_arduino.h b/variants/deneyapkart/pins_arduino.h
index cf0c1ac9f0c..3dd496843a7 100644
--- a/variants/deneyapkart/pins_arduino.h
+++ b/variants/deneyapkart/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/deneyapkart1A/pins_arduino.h b/variants/deneyapkart1A/pins_arduino.h
new file mode 100644
index 00000000000..b97a0f3a33b
--- /dev/null
+++ b/variants/deneyapkart1A/pins_arduino.h
@@ -0,0 +1,102 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define EXTERNAL_NUM_INTERRUPTS 16
+#define NUM_DIGITAL_PINS        40
+#define NUM_ANALOG_INPUTS       16
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 34)
+
+static const uint8_t TX = 1;
+static const uint8_t RX = 3;
+
+static const uint8_t SDA = 4;
+static const uint8_t SCL = 15;
+
+static const uint8_t SS   = 21;
+static const uint8_t MOSI = 5;
+static const uint8_t MISO = 18;
+static const uint8_t SCK  = 19;
+
+static const uint8_t D0  = 23;
+static const uint8_t D1  = 22;
+static const uint8_t D2  = 1;
+static const uint8_t D3  = 3;
+static const uint8_t D4  = 21;
+static const uint8_t D5  = 19;
+static const uint8_t D6  = 18;
+static const uint8_t D7  = 5;
+static const uint8_t D8  = 0;
+static const uint8_t D9  = 2;
+static const uint8_t D10 = 4;
+static const uint8_t D11 = 15;
+static const uint8_t D12 = 13;
+static const uint8_t D13 = 12;
+static const uint8_t D14 = 14;
+static const uint8_t D15 = 27;
+
+static const uint8_t A0 = 36;
+static const uint8_t A1 = 39;
+static const uint8_t A2 = 34;
+static const uint8_t A3 = 35;
+static const uint8_t A4 = 32;
+static const uint8_t A5 = 33;
+// static const uint8_t A6 = 34;
+// static const uint8_t A7 = 35;
+// static const uint8_t A10 = 4;
+// static const uint8_t A11 = 0;
+// static const uint8_t A12 = 2;
+// static const uint8_t A13 = 15;
+// static const uint8_t A14 = 13;
+// static const uint8_t A15 = 12;
+// static const uint8_t A16 = 14;
+// static const uint8_t A17 = 27;
+// static const uint8_t A18 = 25;
+// static const uint8_t A19 = 26;
+
+static const uint8_t T0 = 32;
+static const uint8_t T1 = 33;
+static const uint8_t T2 = 27;
+static const uint8_t T3 = 14;
+static const uint8_t T4 = 12;
+static const uint8_t T5 = 13;
+// static const uint8_t T6 = 14;
+// static const uint8_t T7 = 27;
+// static const uint8_t T8 = 33;
+// static const uint8_t T9 = 32;
+
+static const uint8_t DAC1 = 25;
+static const uint8_t DAC2 = 26;
+
+static const uint8_t CAMSD = 33;
+static const uint8_t CAMSC = 25;
+static const uint8_t CAMD2 = 19;
+static const uint8_t CAMD3 = 22;
+static const uint8_t CAMD4 = 23;
+static const uint8_t CAMD5 = 21;
+static const uint8_t CAMD6 = 18;
+static const uint8_t CAMD7 = 26;
+static const uint8_t CAMD8 = 35;
+static const uint8_t CAMD9 = 34;
+static const uint8_t CAMPC = 5;
+static const uint8_t CAMXC = 32;
+static const uint8_t CAMH  = 39;
+static const uint8_t CAMV  = 36;
+
+static const uint8_t RGBLED  = 13;
+static const uint8_t BUILTIN_KEY  = 0;
+static const uint8_t GPKEY  = 0;
+
+static const uint8_t PWM0 = 23;
+static const uint8_t PWM1 = 22;
+
+static const uint8_t SDMI = 2;
+static const uint8_t SDMO = 14;
+static const uint8_t SDCS = 12;
+static const uint8_t SDCK = 27;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/deneyapmini/pins_arduino.h b/variants/deneyapmini/pins_arduino.h
index 020ce93a0af..9f638e4f3d1 100644
--- a/variants/deneyapmini/pins_arduino.h
+++ b/variants/deneyapmini/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/doitESP32devkitV1/pins_arduino.h b/variants/doitESP32devkitV1/pins_arduino.h
index 44aff01baf9..69e4138428f 100644
--- a/variants/doitESP32devkitV1/pins_arduino.h
+++ b/variants/doitESP32devkitV1/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/doitESPduino32/pins_Arduino.h b/variants/doitESPduino32/pins_arduino.h
similarity index 95%
rename from variants/doitESPduino32/pins_Arduino.h
rename to variants/doitESPduino32/pins_arduino.h
index 380f883394b..991090a5fac 100644
--- a/variants/doitESPduino32/pins_Arduino.h
+++ b/variants/doitESPduino32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/dpu_esp32/pins_arduino.h b/variants/dpu_esp32/pins_arduino.h
index 59afb94b132..ff6cb1e9ba4 100644
--- a/variants/dpu_esp32/pins_arduino.h
+++ b/variants/dpu_esp32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/esp32-devkit-lipo/pins_arduino.h b/variants/esp32-devkit-lipo/pins_arduino.h
index a405e764c6a..d784eb0297a 100644
--- a/variants/esp32-devkit-lipo/pins_arduino.h
+++ b/variants/esp32-devkit-lipo/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/esp32-evb/pins_arduino.h b/variants/esp32-evb/pins_arduino.h
index a2e02dc71a6..327a5ba92e4 100644
--- a/variants/esp32-evb/pins_arduino.h
+++ b/variants/esp32-evb/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/esp32-gateway/pins_arduino.h b/variants/esp32-gateway/pins_arduino.h
index 8e4216cdd9d..b2b6f065558 100644
--- a/variants/esp32-gateway/pins_arduino.h
+++ b/variants/esp32-gateway/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/esp32-poe-iso/pins_arduino.h b/variants/esp32-poe-iso/pins_arduino.h
index 1ab04a7578b..06a0dc15afd 100644
--- a/variants/esp32-poe-iso/pins_arduino.h
+++ b/variants/esp32-poe-iso/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/esp32-poe/pins_arduino.h b/variants/esp32-poe/pins_arduino.h
index 1ab04a7578b..06a0dc15afd 100644
--- a/variants/esp32-poe/pins_arduino.h
+++ b/variants/esp32-poe/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/esp32-trueverit-iot-driver-mkii/pins_arduino.h b/variants/esp32-trueverit-iot-driver-mkii/pins_arduino.h
index c1108275fd3..aea4585f266 100644
--- a/variants/esp32-trueverit-iot-driver-mkii/pins_arduino.h
+++ b/variants/esp32-trueverit-iot-driver-mkii/pins_arduino.h
@@ -10,7 +10,7 @@ static const uint8_t LED_BUILTIN = 18;
 #define NUM_DIGITAL_PINS 40
 #define NUM_ANALOG_INPUTS 16
 
-#define analogInputToDigitalPin(p) (((p) < 20) ? (esp32_adc2gpio[(p)]) : -1)
+#define analogInputToDigitalPin(p) (((p) < 20) ? (analogChannelToDigitalPin(p)) : -1)
 #define digitalPinToInterrupt(p) (((p) < 40) ? (p) : -1)
 #define digitalPinHasPWM(p) (p < 34)
 
diff --git a/variants/esp32-trueverit-iot-driver-mkiii/pins_arduino.h b/variants/esp32-trueverit-iot-driver-mkiii/pins_arduino.h
new file mode 100644
index 00000000000..b86654113b8
--- /dev/null
+++ b/variants/esp32-trueverit-iot-driver-mkiii/pins_arduino.h
@@ -0,0 +1,52 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+static const uint8_t LED_BUILTIN = 18;
+#define BUILTIN_LED LED_BUILTIN // backward compatibility
+
+#define EXTERNAL_NUM_INTERRUPTS 16
+#define NUM_DIGITAL_PINS 40
+#define NUM_ANALOG_INPUTS 16
+
+#define analogInputToDigitalPin(p) (((p) < 20) ? (analogChannelToDigitalPin(p)) : -1)
+#define digitalPinToInterrupt(p) (((p) < 40) ? (p) : -1)
+#define digitalPinHasPWM(p) (p < 34)
+
+#define TX1 12
+#define RX1 13
+#define TX2 33
+#define RX2 39
+
+static const uint8_t TX = 1;
+static const uint8_t RX = 3;
+
+static const uint8_t SCL = 4;
+static const uint8_t SDA = 15;
+
+static const uint8_t SS = 5;
+static const uint8_t MOSI = 23;
+static const uint8_t MISO = 32;
+static const uint8_t SCK = 18;
+
+static const uint8_t A0 = 36;
+static const uint8_t A3 = 39;
+static const uint8_t A4 = 32;
+static const uint8_t A5 = 33;
+static const uint8_t A6 = 34;
+static const uint8_t A7 = 35;
+
+static const uint8_t T0 = 4;
+static const uint8_t T2 = 2;
+static const uint8_t T8 = 33;
+static const uint8_t T9 = 32;
+
+#define ETH_PHY_ADDR 0
+#define ETH_PHY_POWER 2
+#define ETH_PHY_MDC 16
+#define ETH_PHY_MDIO 14
+#define ETH_PHY_TYPE ETH_PHY_RTL8201
+#define ETH_CLK_MODE ETH_CLOCK_GPIO17_OUT
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/esp32-trueverit-iot-driver/pins_arduino.h b/variants/esp32-trueverit-iot-driver/pins_arduino.h
index e59aa77b0a8..f6fa15fc4f2 100644
--- a/variants/esp32-trueverit-iot-driver/pins_arduino.h
+++ b/variants/esp32-trueverit-iot-driver/pins_arduino.h
@@ -10,7 +10,7 @@ static const uint8_t LED_BUILTIN = 18;
 #define NUM_DIGITAL_PINS 40
 #define NUM_ANALOG_INPUTS 16
 
-#define analogInputToDigitalPin(p) (((p) < 20) ? (esp32_adc2gpio[(p)]) : -1)
+#define analogInputToDigitalPin(p) (((p) < 20) ? (analogChannelToDigitalPin(p)) : -1)
 #define digitalPinToInterrupt(p) (((p) < 40) ? (p) : -1)
 #define digitalPinHasPWM(p) (p < 34)
 
diff --git a/variants/esp32/pins_arduino.h b/variants/esp32/pins_arduino.h
index d50715e5c91..4ad96ccef51 100644
--- a/variants/esp32/pins_arduino.h
+++ b/variants/esp32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/esp320/pins_arduino.h b/variants/esp320/pins_arduino.h
index ebb18ad3949..f62b6502c42 100644
--- a/variants/esp320/pins_arduino.h
+++ b/variants/esp320/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        12
 #define NUM_ANALOG_INPUTS       5
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/esp32c3/pins_arduino.h b/variants/esp32c3/pins_arduino.h
index 9e4d8939268..8ce191ad23a 100644
--- a/variants/esp32c3/pins_arduino.h
+++ b/variants/esp32c3/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        22
 #define NUM_ANALOG_INPUTS       6
 
-#define analogInputToDigitalPin(p)  (((p)<NUM_ANALOG_INPUTS)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<NUM_ANALOG_INPUTS)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<NUM_DIGITAL_PINS)?(p):-1)
 #define digitalPinHasPWM(p)         (p < EXTERNAL_NUM_INTERRUPTS)
 
diff --git a/variants/esp32da/pins_arduino.h b/variants/esp32da/pins_arduino.h
new file mode 100644
index 00000000000..14c1e548615
--- /dev/null
+++ b/variants/esp32da/pins_arduino.h
@@ -0,0 +1,60 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define EXTERNAL_NUM_INTERRUPTS 16
+#define NUM_DIGITAL_PINS        40
+#define NUM_ANALOG_INPUTS       16
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
+#define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 34)
+
+static const uint8_t TX = 1;
+static const uint8_t RX = 3;
+
+static const uint8_t SDA = 21;
+static const uint8_t SCL = 22;
+
+static const uint8_t SS    = 5;
+static const uint8_t MOSI  = 23;
+static const uint8_t MISO  = 19;
+static const uint8_t SCK   = 18;
+
+static const uint8_t A0 = 36;
+static const uint8_t A3 = 39;
+static const uint8_t A4 = 32;
+static const uint8_t A5 = 33;
+static const uint8_t A6 = 34;
+static const uint8_t A7 = 35;
+static const uint8_t A10 = 4;
+static const uint8_t A11 = 0;
+static const uint8_t A12 = 2;
+static const uint8_t A13 = 15;
+static const uint8_t A14 = 13;
+static const uint8_t A15 = 12;
+static const uint8_t A16 = 14;
+static const uint8_t A17 = 27;
+static const uint8_t A18 = 25;
+static const uint8_t A19 = 26;
+
+static const uint8_t T0 = 4;
+static const uint8_t T1 = 0;
+static const uint8_t T2 = 2;
+static const uint8_t T3 = 15;
+static const uint8_t T4 = 13;
+static const uint8_t T5 = 12;
+static const uint8_t T6 = 14;
+static const uint8_t T7 = 27;
+static const uint8_t T8 = 33;
+static const uint8_t T9 = 32;
+
+static const uint8_t DAC1 = 25;
+static const uint8_t DAC2 = 26;
+
+#define BOARD_HAS_DUAL_ANTENNA
+static const uint8_t ANT1 = 2;
+static const uint8_t ANT2 = 25;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/esp32micromod/pins_arduino.h b/variants/esp32micromod/pins_arduino.h
index 009ba2d18ea..80dd6ee544a 100755
--- a/variants/esp32micromod/pins_arduino.h
+++ b/variants/esp32micromod/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/esp32s2/pins_arduino.h b/variants/esp32s2/pins_arduino.h
index 85b7455d491..76d8bbf88c4 100644
--- a/variants/esp32s2/pins_arduino.h
+++ b/variants/esp32s2/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/esp32s2thing_plus/pins_arduino.h b/variants/esp32s2thing_plus/pins_arduino.h
index 1bf87ba7657..219f357981e 100644
--- a/variants/esp32s2thing_plus/pins_arduino.h
+++ b/variants/esp32s2thing_plus/pins_arduino.h
@@ -13,7 +13,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/esp32s2usb/pins_arduino.h b/variants/esp32s2usb/pins_arduino.h
index f3acb5c9540..c6d464b79b4 100644
--- a/variants/esp32s2usb/pins_arduino.h
+++ b/variants/esp32s2usb/pins_arduino.h
@@ -24,7 +24,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/esp32s3/pins_arduino.h b/variants/esp32s3/pins_arduino.h
index 85b7455d491..59f298e4965 100644
--- a/variants/esp32s3/pins_arduino.h
+++ b/variants/esp32s3/pins_arduino.h
@@ -3,11 +3,14 @@
 
 #include <stdint.h>
 
+#define USB_VID 0x303a
+#define USB_PID 0x1001
+
 #define EXTERNAL_NUM_INTERRUPTS 46
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
@@ -17,10 +20,10 @@ static const uint8_t RX = 44;
 static const uint8_t SDA = 8;
 static const uint8_t SCL = 9;
 
-static const uint8_t SS    = 34;
-static const uint8_t MOSI  = 35;
-static const uint8_t MISO  = 37;
-static const uint8_t SCK   = 36;
+static const uint8_t SS    = 10;
+static const uint8_t MOSI  = 11;
+static const uint8_t MISO  = 13;
+static const uint8_t SCK   = 12;
 
 static const uint8_t A0 = 1;
 static const uint8_t A1 = 2;
@@ -58,7 +61,4 @@ static const uint8_t T12 = 12;
 static const uint8_t T13 = 13;
 static const uint8_t T14 = 14;
 
-static const uint8_t DAC1 = 17;
-static const uint8_t DAC2 = 18;
-
 #endif /* Pins_Arduino_h */
diff --git a/variants/esp32s3box/pins_arduino.h b/variants/esp32s3box/pins_arduino.h
new file mode 100644
index 00000000000..5db18515d0a
--- /dev/null
+++ b/variants/esp32s3box/pins_arduino.h
@@ -0,0 +1,69 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define USB_VID 0x303a
+#define USB_PID 0x1001
+
+#define EXTERNAL_NUM_INTERRUPTS 46
+#define NUM_DIGITAL_PINS        48
+#define NUM_ANALOG_INPUTS       20
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 46)
+
+static const uint8_t TX = 43;
+static const uint8_t RX = 44;
+
+static const uint8_t SDA = 41;
+static const uint8_t SCL = 40;
+
+static const uint8_t SS    = 10;
+static const uint8_t MOSI  = 11;
+static const uint8_t MISO  = 13;
+static const uint8_t SCK   = 12;
+
+static const uint8_t A8 = 9;
+static const uint8_t A9 = 10;
+static const uint8_t A10 = 11;
+static const uint8_t A11 = 12;
+static const uint8_t A12 = 13;
+static const uint8_t A13 = 14;
+
+static const uint8_t T9 = 9;
+static const uint8_t T10 = 10;
+static const uint8_t T11 = 11;
+static const uint8_t T12 = 12;
+static const uint8_t T13 = 13;
+static const uint8_t T14 = 14;
+
+// Wire1 for ES7210 MIC ADC, ES8311 I2S DAC, ICM-42607-P IMU and TT21100 Touch Panel
+#define I2C_SDA     8
+#define I2C_SCL    18
+
+#define ES7210_ADDR    0x40 //MIC ADC
+#define ES8311_ADDR    0x18 //I2S DAC
+#define ICM42607P_ADDR 0x68 //IMU
+#define TT21100_ADDR   0x24 //Touch Panel
+
+#define TFT_DC      4
+#define TFT_CS      5
+#define TFT_MOSI    6
+#define TFT_CLK     7
+#define TFT_MISO    0
+#define TFT_BL     45
+#define TFT_RST    48
+
+#define I2S_LRCK   47
+#define I2S_MCLK    2
+#define I2S_SCLK   17
+#define I2S_SDIN   16
+#define I2S_DOUT   15
+
+#define PA_PIN     46 //Audio Amp Power
+#define MUTE_PIN    1 //MUTE Button
+#define TS_IRQ      3 //Touch Screen IRQ
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/esp32s3camlcd/pins_arduino.h b/variants/esp32s3camlcd/pins_arduino.h
new file mode 100644
index 00000000000..3f922c7b2dc
--- /dev/null
+++ b/variants/esp32s3camlcd/pins_arduino.h
@@ -0,0 +1,71 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define USB_VID 0x303a
+#define USB_PID 0x1001
+
+#define EXTERNAL_NUM_INTERRUPTS 46
+#define NUM_DIGITAL_PINS        48
+#define NUM_ANALOG_INPUTS       20
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 46)
+
+static const uint8_t TX = 43;
+static const uint8_t RX = 44;
+
+static const uint8_t SDA = 17;
+static const uint8_t SCL = 18;
+
+static const uint8_t SS    = 10;
+static const uint8_t MOSI  = 11;
+static const uint8_t MISO  = 13;
+static const uint8_t SCK   = 12;
+
+// Wire1 for Cam and TS
+#define I2C_SDA    17
+#define I2C_SCL    18
+
+#define PWDN_GPIO_NUM     -1
+#define RESET_GPIO_NUM    -1
+#define XCLK_GPIO_NUM     40
+#define SIOD_GPIO_NUM     17
+#define SIOC_GPIO_NUM     18
+#define Y9_GPIO_NUM       39
+#define Y8_GPIO_NUM       41
+#define Y7_GPIO_NUM       42
+#define Y6_GPIO_NUM       12
+#define Y5_GPIO_NUM        3
+#define Y4_GPIO_NUM       14
+#define Y3_GPIO_NUM       47
+#define Y2_GPIO_NUM       13
+#define VSYNC_GPIO_NUM    21
+#define HREF_GPIO_NUM     38
+#define PCLK_GPIO_NUM     11
+
+#define TFT_FREQ    40000000
+#define TFT_BITS           8
+#define TFT_WIDTH        480
+#define TFT_HEIGHT       320
+#define TFT_WR             4
+#define TFT_DC             2
+#define TFT_D0            45
+#define TFT_D1            16
+#define TFT_D2            15
+#define TFT_D3            10
+#define TFT_D4             8
+#define TFT_D5             7
+#define TFT_D6             6
+#define TFT_D7             5
+
+#define SDMMC_CMD         20
+#define SDMMC_CLK          9
+#define SDMMC_DATA        19
+
+#define MIC_CLK            0
+#define MIC_DATA           1
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/esp32s3usbotg/pins_arduino.h b/variants/esp32s3usbotg/pins_arduino.h
new file mode 100644
index 00000000000..94edeeca74c
--- /dev/null
+++ b/variants/esp32s3usbotg/pins_arduino.h
@@ -0,0 +1,98 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define USB_VID 0x303a
+#define USB_PID 0x1001
+
+#define EXTERNAL_NUM_INTERRUPTS 46
+#define NUM_DIGITAL_PINS        48
+#define NUM_ANALOG_INPUTS       20
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
+#define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 46)
+
+static const uint8_t TX = 43;
+static const uint8_t RX = 44;
+
+static const uint8_t SDA = 45;
+static const uint8_t SCL = 46;
+
+static const uint8_t SS    = 34;
+static const uint8_t MOSI  = 35;
+static const uint8_t MISO  = 37;
+static const uint8_t SCK   = 36;
+
+static const uint8_t A0 = 1;
+static const uint8_t A1 = 2;
+static const uint8_t A2 = 3;
+
+static const uint8_t T3 = 3;
+
+// SDCARD Slot
+#define BOARD_HAS_SDMMC
+#define SDMMC_D2     33 // SDMMC Data2
+#define SDMMC_D3     34 // SDMMC Data3 / SPI CS
+#define SDMMC_CMD    35 // SDMMC CMD   / SPI MOSI
+#define SDMMC_CLK    36 // SDMMC CLK   / SPI SCK
+#define SDMMC_D0     37 // SDMMC Data0 / SPI MISO
+#define SDMMC_D1     38 // SDMMC Data1
+#define BOARD_MAX_SDMMC_FREQ SDMMC_FREQ_DEFAULT
+
+// 240x240 LCD
+#define BOARD_HAS_SPI_LCD
+#define LCD_MODEL  ST7789
+#define LCD_WIDTH	240
+#define LCD_HEIGHT	240 // *RAM height is actually 320!
+#define LCD_MISO     -1 // LCD Does not use MISO.
+#define LCD_DC        4 // Used to switch data and command status.
+#define LCD_CS        5 // used to enable LCD, low level to enable.
+#define LCD_CLK       6 // LCD SPI Clock.
+#define LCD_MOSI      7 // LCD SPI MOSI.
+#define LCD_RST       8 // used to reset LCD, low level to reset.
+#define LCD_BL        9 // LCD backlight control.
+
+// Buttons
+#define BUTTON_OK     0 // OK button, low level when pressed.
+#define BUTTON_UP    10 // UP button, low level when pressed.
+#define BUTTON_DOWN  11 // Down button, low level when pressed.
+#define BUTTON_MENU  14 // Menu button, low level when pressed.
+
+// LEDs
+#define LED_GREEN    15 // the light is lit when set high level.
+#define LED_YELLOW   16 // the light is lit when set high level.
+
+// Board Controls
+#define DEV_VBUS_EN  12 // High level to enable DEV_VBUS power supply.
+#define BOOST_EN     13 // High level to enable Battery Boost circuit.
+#define LIMIT_EN     17 // Enable USB_HOST current limiting IC, high level enable.
+#define USB_HOST_EN  18 // Used to switch the USB interface. When high level, the USB_HOST interface is enabled. When low level, the USB_DEV interface is enabled.
+
+// Board Sensors
+#define OVER_CURRENT 21 // Current overrun signal, high level means overrun.
+#define HOST_VOLTS    1 // USB_DEV voltage monitoring, ADC1 channel 0. actual_v = value_v * 3.7
+#define BAT_VOLTS     2 // Battery voltage monitoring, ADC1 channel 1. actual_v = value_v * 2
+
+// USB Port
+#define USB_DN       19 // USB D-
+#define USB_DP       20 // USB D+
+
+// Bottom header
+#define MTCK         39
+#define MTDO         40
+#define MTDI         41
+#define MTMS         42
+// #define FREE_6        3 // Idle, can be customized.
+// #define FREE_4       26 // Idle, can be customized.
+// #define FREE_1       45 // Idle, can be customized.
+// #define FREE_2       46 // Idle, can be customized.
+// #define FREE_5       47 // Idle, can be customized.
+// #define FREE_3       48 // Idle, can be customized.
+
+typedef enum { USB_HOST_POWER_OFF, USB_HOST_POWER_VBUS, USB_HOST_POWER_BAT } UsbHostPower_t;
+void usbHostPower(UsbHostPower_t mode);
+void usbHostEnable(bool enable);
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/esp32s3usbotg/variant.cpp b/variants/esp32s3usbotg/variant.cpp
new file mode 100644
index 00000000000..f5f24fdac2a
--- /dev/null
+++ b/variants/esp32s3usbotg/variant.cpp
@@ -0,0 +1,46 @@
+#include "Arduino.h"
+
+void usbHostPower(UsbHostPower_t mode){
+	static UsbHostPower_t m = USB_HOST_POWER_OFF;
+	if(m == mode){
+		return;
+	}
+	if(mode == USB_HOST_POWER_OFF){
+		digitalWrite(LIMIT_EN, LOW);
+		if(m == USB_HOST_POWER_VBUS){
+			digitalWrite(DEV_VBUS_EN, LOW);
+		} else if(m == USB_HOST_POWER_BAT){
+			digitalWrite(BOOST_EN, LOW);
+		}
+	} else if(mode == USB_HOST_POWER_VBUS){
+		if(m == USB_HOST_POWER_BAT){
+			digitalWrite(BOOST_EN, LOW);
+		}
+		digitalWrite(DEV_VBUS_EN, HIGH);
+	} else if(mode == USB_HOST_POWER_BAT){
+		if(m == USB_HOST_POWER_VBUS){
+			digitalWrite(DEV_VBUS_EN, LOW);
+		}
+		digitalWrite(BOOST_EN, HIGH);
+	}
+	if(mode != USB_HOST_POWER_OFF){
+		digitalWrite(LIMIT_EN, HIGH);
+	}
+	m = mode;
+}
+
+void usbHostEnable(bool enable){
+	digitalWrite(USB_HOST_EN, enable);
+}
+
+extern "C" void initVariant(void){
+	// Route USB to Device Side
+	pinMode(BOOST_EN,    OUTPUT); digitalWrite(BOOST_EN,    LOW);
+	pinMode(LIMIT_EN,    OUTPUT); digitalWrite(LIMIT_EN,    LOW);
+	pinMode(DEV_VBUS_EN, OUTPUT); digitalWrite(DEV_VBUS_EN, LOW);
+	pinMode(USB_HOST_EN, OUTPUT); digitalWrite(USB_HOST_EN, LOW);
+
+	// Turn Off LCD
+	pinMode(LCD_RST, OUTPUT); digitalWrite(LCD_RST, LOW);
+	pinMode(LCD_BL,  OUTPUT); digitalWrite(LCD_BL,  LOW);
+}
diff --git a/variants/esp32thing/pins_arduino.h b/variants/esp32thing/pins_arduino.h
index f0f8e69eafa..2ab5614033f 100644
--- a/variants/esp32thing/pins_arduino.h
+++ b/variants/esp32thing/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/esp32thing_plus/pins_arduino.h b/variants/esp32thing_plus/pins_arduino.h
index 6cdd2950b8a..f1342b2c3c0 100644
--- a/variants/esp32thing_plus/pins_arduino.h
+++ b/variants/esp32thing_plus/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/esp32vn-iot-uno/pins_arduino.h b/variants/esp32vn-iot-uno/pins_arduino.h
index 0bdb52da4ec..c6e9127e254 100644
--- a/variants/esp32vn-iot-uno/pins_arduino.h
+++ b/variants/esp32vn-iot-uno/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/espea32/pins_arduino.h b/variants/espea32/pins_arduino.h
index 359defee34b..37985c2b476 100644
--- a/variants/espea32/pins_arduino.h
+++ b/variants/espea32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/espectro32/pins_arduino.h b/variants/espectro32/pins_arduino.h
index 43351c23a36..0be1919c1d6 100644
--- a/variants/espectro32/pins_arduino.h
+++ b/variants/espectro32/pins_arduino.h
@@ -11,7 +11,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/espino32/pins_arduino.h b/variants/espino32/pins_arduino.h
index 24f9ac51996..586f9725dc4 100644
--- a/variants/espino32/pins_arduino.h
+++ b/variants/espino32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        38
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/feather_esp32/pins_arduino.h b/variants/feather_esp32/pins_arduino.h
index 743d53c3cb2..8b2b200ddcb 100644
--- a/variants/feather_esp32/pins_arduino.h
+++ b/variants/feather_esp32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
@@ -45,14 +45,13 @@ static const uint8_t A11 = 12;
 static const uint8_t A12 = 13;
 
 // vbat measure
+static const uint8_t BATT_MONITOR = 35;
 static const uint8_t A13 = 35;
 //static const uint8_t Ax = 0; // not used/available
 //static const uint8_t Ax = 2; // not used/available
 
 
 static const uint8_t T0 = 4;
-static const uint8_t T1 = 0;
-static const uint8_t T2 = 2;
 static const uint8_t T3 = 15;
 static const uint8_t T4 = 13;
 static const uint8_t T5 = 12;
diff --git a/variants/firebeetle32/pins_arduino.h b/variants/firebeetle32/pins_arduino.h
index 8f1e9d4fb82..15d54fe9a37 100644
--- a/variants/firebeetle32/pins_arduino.h
+++ b/variants/firebeetle32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/fm-devkit/pins_arduino.h b/variants/fm-devkit/pins_arduino.h
index 2302dd9f67e..5c1054fafb5 100644
--- a/variants/fm-devkit/pins_arduino.h
+++ b/variants/fm-devkit/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/franzininho_wifi_esp32s2/pins_arduino.h b/variants/franzininho_wifi_esp32s2/pins_arduino.h
index 6e712ebe298..dd287f417d0 100644
--- a/variants/franzininho_wifi_esp32s2/pins_arduino.h
+++ b/variants/franzininho_wifi_esp32s2/pins_arduino.h
@@ -14,7 +14,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/franzininho_wifi_msc_esp32s2/pins_arduino.h b/variants/franzininho_wifi_msc_esp32s2/pins_arduino.h
index 772e4de8973..58db2039d26 100644
--- a/variants/franzininho_wifi_msc_esp32s2/pins_arduino.h
+++ b/variants/franzininho_wifi_msc_esp32s2/pins_arduino.h
@@ -21,7 +21,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/frog32/pins_arduino.h b/variants/frog32/pins_arduino.h
index d50715e5c91..4ad96ccef51 100644
--- a/variants/frog32/pins_arduino.h
+++ b/variants/frog32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/gpy/pins_arduino.h b/variants/gpy/pins_arduino.h
index 71760e37693..aa41db48bf1 100644
--- a/variants/gpy/pins_arduino.h
+++ b/variants/gpy/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       18
 
-#define analogInputToDigitalPin(p)  (((p)<40)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<40)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/healthypi4/pins_arduino.h b/variants/healthypi4/pins_arduino.h
index 15f5b189b04..b3eb897374a 100644
--- a/variants/healthypi4/pins_arduino.h
+++ b/variants/healthypi4/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/heltec_wifi_kit_32/pins_arduino.h b/variants/heltec_wifi_kit_32/pins_arduino.h
index 1409535e823..9efa252d564 100644
--- a/variants/heltec_wifi_kit_32/pins_arduino.h
+++ b/variants/heltec_wifi_kit_32/pins_arduino.h
@@ -11,7 +11,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/heltec_wifi_lora_32/pins_arduino.h b/variants/heltec_wifi_lora_32/pins_arduino.h
index 4b4ccfec050..ee5a2affd46 100644
--- a/variants/heltec_wifi_lora_32/pins_arduino.h
+++ b/variants/heltec_wifi_lora_32/pins_arduino.h
@@ -11,7 +11,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/heltec_wifi_lora_32_V2/pins_arduino.h b/variants/heltec_wifi_lora_32_V2/pins_arduino.h
index 088a0da9a91..420c23c3ffa 100644
--- a/variants/heltec_wifi_lora_32_V2/pins_arduino.h
+++ b/variants/heltec_wifi_lora_32_V2/pins_arduino.h
@@ -11,7 +11,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/heltec_wireless_stick/pins_arduino.h b/variants/heltec_wireless_stick/pins_arduino.h
index 901c62d9625..a1c4eec28c8 100644
--- a/variants/heltec_wireless_stick/pins_arduino.h
+++ b/variants/heltec_wireless_stick/pins_arduino.h
@@ -11,7 +11,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/heltec_wireless_stick_lite/pins_arduino.h b/variants/heltec_wireless_stick_lite/pins_arduino.h
index 2b4bf80f6fb..981c66b2b74 100644
--- a/variants/heltec_wireless_stick_lite/pins_arduino.h
+++ b/variants/heltec_wireless_stick_lite/pins_arduino.h
@@ -11,7 +11,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/honeylemon/pins_arduino.h b/variants/honeylemon/pins_arduino.h
index 04f62911883..0156f5d3254 100644
--- a/variants/honeylemon/pins_arduino.h
+++ b/variants/honeylemon/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        38
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/hornbill32dev/pins_arduino.h b/variants/hornbill32dev/pins_arduino.h
index a01aa4e42a3..48adf9d75a8 100644
--- a/variants/hornbill32dev/pins_arduino.h
+++ b/variants/hornbill32dev/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/hornbill32minima/pins_arduino.h b/variants/hornbill32minima/pins_arduino.h
index d18c4dacd58..c8d65c77a01 100644
--- a/variants/hornbill32minima/pins_arduino.h
+++ b/variants/hornbill32minima/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/imbrios-logsens-v1p1/pins_arduino.h b/variants/imbrios-logsens-v1p1/pins_arduino.h
index 8e90770cf10..3c3f083e034 100644
--- a/variants/imbrios-logsens-v1p1/pins_arduino.h
+++ b/variants/imbrios-logsens-v1p1/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        9
 #define NUM_ANALOG_INPUTS       7
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/intorobot-fig/pins_arduino.h b/variants/intorobot-fig/pins_arduino.h
index a48f328d833..50cb9c83ce4 100644
--- a/variants/intorobot-fig/pins_arduino.h
+++ b/variants/intorobot-fig/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        7
 #define NUM_ANALOG_INPUTS       10
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/lionbit/pins_arduino.h b/variants/lionbit/pins_arduino.h
new file mode 100644
index 00000000000..b7f5825079a
--- /dev/null
+++ b/variants/lionbit/pins_arduino.h
@@ -0,0 +1,92 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define EXTERNAL_NUM_INTERRUPTS 16
+#define NUM_DIGITAL_PINS 40
+#define NUM_ANALOG_INPUTS 16
+
+#define analogInputToDigitalPin(p) (((p) < 20) ? (analogChannelToDigitalPin(p)) : -1)
+#define digitalPinToInterrupt(p) (((p) < 40) ? (p) : -1)
+#define digitalPinHasPWM(p) (p < 34)
+
+static const uint8_t LED_BUILTIN = 0; // GPIO0, ADC2_CH1, TOUCH1, RTC_GPIO11, CLK_OUT1,EMAC_TX_CLK
+static const uint8_t SWITCH_A = 2;    //  GPIO2, ADC2_CH2, TOUCH2, RTC_GPIO12, HSPIWP, HS2_DATA0,SD_DATA0
+static const uint8_t SWITCH_B = 4;    //  GPIO4, ADC2_CH0, TOUCH0, RTC_GPIO10, HSPIHD, HS2_DATA1,SD_DATA1, EMAC_TX_ER
+
+static const uint8_t TX = 1;
+static const uint8_t RX = 3;
+
+/* LionBit pin setup */
+static const uint8_t D0 = 3; //Rx GPIO3, U0RXD, CLK_OUT2
+static const uint8_t D1 = 1; //TX GPIO1, U0TXD, CLK_OUT3, EMAC_RXD2
+//-------------------------------------------------------------------
+
+//Please do not use while using QIO SPI mode ; Use only DIO flash mode
+static const uint8_t D2 = 9;  //I/O   U1RX  GPIO9,  SD_DATA2, SPIHD, HS1_DATA2, U1RXD
+static const uint8_t D3 = 10; //I/O  U1TX  GPIO10, SD_DATA3, SPIWP, HS1_DATA3, U1TXD
+//-------------------------------------------------------------------
+static const uint8_t U1RX = 9;  //I/O   U1RX
+static const uint8_t U1TX = 10; //I/O  U1TX
+
+//Second Segment - Sector -01 (Voltage (*5v or 3.3V) can be selected by using D4-7 Jumper
+static const uint8_t D4 = 16; //I/O   U2RX  GPIO16, HS1_DATA4, U2RXD, EMAC_CLK_OUT
+static const uint8_t D5 = 17; //I/O   U2TX  GPIO17, HS1_DATA5, U2TXD, EMAC_CLK_OUT_180
+static const uint8_t D6 = 21; //I/O   SDA GPIO21, VSPIHD, EMAC_TX_EN
+static const uint8_t D7 = 22; //I/O   SCl GPIO22, VSPIWP, U0RTS, EMAC_TXD1
+
+//Second Segment - Sector -02 (Voltage (*5v or 3.3V) can be selected by using D8-11 Jumper
+static const uint8_t D8 = 5;   //I/O  GPIO5, VSPICS0, HS1_DATA6, EMAC_RX_CLK
+static const uint8_t D9 = 23;  //I/O GPIO23, VSPID, HS1_STROBE  **********************************************Don not use when display "ON or USE"*************************
+static const uint8_t D10 = 19; //I/O GPIO19, VSPIQ, U0CTS, EMAC_TXD0
+static const uint8_t D11 = 18; //I/O GPIO18, VSPICLK, HS1_DATA7 **********************************************Don not use when display "ON or USE"*************************
+
+
+// Analog to Digital Converter (Support 5V) ADC2 pins not recommended while using Wifi
+static const uint8_t A0 /*ADC2_CH3 */ = 12; //MAX 5V,I/O GPIO12, ADC2_CH5, TOUCH5, RTC_GPIO15, MTDI, HSPIQ, HS2_DATA2,SD_DATA2, EMAC_TXD3
+static const uint8_t A1 /*ADC1_CH0 */ = 14; //MAX 5V,I/O GPIO14, ADC2_CH6, TOUCH6, RTC_GPIO16, MTMS, HSPICLK, HS2_CLK,SD_CLK, EMAC_TXD2
+static const uint8_t A2 /*ADC2_CH6 */ = 34; //MAX 5V,GPIO34, ADC1_CH6, RTC_GPIO4 ***********************/////////////////////Connected LDR/////////////////////////////
+static const uint8_t A3 /*ADC1_CH7 */ = 35; //MAX 5V,GPIO35, ADC1_CH7, RTC_GPIO5
+static const uint8_t A4 /*ADC2_CH5 */ = 15; //MAX 5V,GPIO15, ADC2_CH3, TOUCH3, MTDO, HSPICS0, RTC_GPIO13, HS2_CMD,SD_CMD, EMAC_RXD3
+static const uint8_t A5 /*ADC2_CH4 */ = 13; //MAX 5V,GPIO13, ADC2_CH4, TOUCH4, RTC_GPIO14, MTCK, HSPID, HS2_DATA3,SD_DATA3, EMAC_RX_ER
+                                            //-------------------------------------------------------------------
+
+//------------------Touch Sensors-------------------------------------------------
+static const uint8_t VP = 36; //  GPIO36, ADC1_CH0, RTC_GPIO0
+static const uint8_t VN = 39; //  GPIO39, ADC1_CH3, RTC_GPIO3
+
+static const uint8_t T0 = 36;
+static const uint8_t T1 = 39;
+
+static const uint8_t DAC1 = 25; // I/O GPIO25, DAC_1, ADC2_CH8, RTC_GPIO6, EMAC_RXD0
+static const uint8_t DAC2 = 26; // I/O GPIO26, DAC_2, ADC2_CH9, RTC_GPIO7, EMAC_RXD1
+
+static const uint8_t SDA = 21;
+static const uint8_t SCL = 22;
+
+/* Hardware HSPI */
+static const uint8_t MOSI = 13; // 13;
+static const uint8_t MISO = 12; // 12;
+static const uint8_t SCK = 14;  // 14;
+static const uint8_t SS = 15;   // 15;
+
+/* Software VSPI [Note : D9 and D11 Do not use when display "ON or USE"]*/
+static const uint8_t VMOSI = 23;  //23 /*Do not use when display "ON or USE"*/
+static const uint8_t VMISO = 19; // 19
+static const uint8_t VSCK = 18;  // 18 /*Do not use when display "ON or USE"*/
+static const uint8_t VSS = 5;    // 5
+
+// Inbuilt Display Unit 128*128 ST7735 Driver
+static const uint8_t RST = 33;     // - RESET GPIO33, XTAL_32K_N (32.768 kHz crystal oscillator output),ADC1_CH5, TOUCH8, RTC_GPIO8
+static const uint8_t CLK = 18;    // - (18) CLK  (D11) and  D9 pin will engaged when display "ON or USE"
+static const uint8_t CS = 27;      // - CS    GPIO27, ADC2_CH7, TOUCH7, RTC_GPIO17, EMAC_RX_DV
+static const uint8_t DC = 32;      //- DC/A0 GPIO32, XTAL_32K_P (32.768 kHz crystal oscillator input), ADC1_CH4,TOUCH9, RTC_GPIO9
+static const uint8_t ST_MOSI = 23; // - MOSI (D9) This D9 pin will engaged when display "ON or USE"
+
+static const uint8_t MTDO = 15; // A4 JTAG SIGNAL -> TDO
+static const uint8_t MTDI = 12; // A0 JTAG SIGNAL -> TDI
+static const uint8_t MTCK = 13; // A5 JTAG SIGNAL -> TCK
+static const uint8_t MTMS = 14; // A1 JTAG SIGNAL -> TMS
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/lolin32-lite/pins_arduino.h b/variants/lolin32-lite/pins_arduino.h
index 53d81673d30..883695dfcf1 100755
--- a/variants/lolin32-lite/pins_arduino.h
+++ b/variants/lolin32-lite/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/lolin32/pins_arduino.h b/variants/lolin32/pins_arduino.h
index 6be8fe24c7b..f38be67cc58 100644
--- a/variants/lolin32/pins_arduino.h
+++ b/variants/lolin32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/lolin_c3_mini/pins_arduino.h b/variants/lolin_c3_mini/pins_arduino.h
new file mode 100644
index 00000000000..59889448572
--- /dev/null
+++ b/variants/lolin_c3_mini/pins_arduino.h
@@ -0,0 +1,35 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define EXTERNAL_NUM_INTERRUPTS 22
+#define NUM_DIGITAL_PINS        22
+#define NUM_ANALOG_INPUTS       6
+
+#define analogInputToDigitalPin(p)  (((p)<NUM_ANALOG_INPUTS)?(analogChannelToDigitalPin(p)):-1)
+#define digitalPinToInterrupt(p)    (((p)<NUM_DIGITAL_PINS)?(p):-1)
+#define digitalPinHasPWM(p)         (p < EXTERNAL_NUM_INTERRUPTS)
+
+static const uint8_t LED_BUILTIN = 7;
+#define BUILTIN_LED  LED_BUILTIN // backward compatibility
+
+static const uint8_t TX = 21;
+static const uint8_t RX = 20;
+
+static const uint8_t SDA = 8;
+static const uint8_t SCL = 10;
+
+static const uint8_t SS    = 5;
+static const uint8_t MOSI  = 4;
+static const uint8_t MISO  = 3;
+static const uint8_t SCK   = 2;
+
+static const uint8_t A0 = 0;
+static const uint8_t A1 = 1;
+static const uint8_t A2 = 2;
+static const uint8_t A3 = 3;
+static const uint8_t A4 = 4;
+static const uint8_t A5 = 5;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/lolin_s2_mini/pins_arduino.h b/variants/lolin_s2_mini/pins_arduino.h
new file mode 100644
index 00000000000..7b4596ef6a2
--- /dev/null
+++ b/variants/lolin_s2_mini/pins_arduino.h
@@ -0,0 +1,82 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+// Default USB Settings
+#define USB_VID 			0x303a
+#define USB_PID 			0x80C2
+#define USB_MANUFACTURER 	"WEMOS.CC"
+#define USB_PRODUCT 		"LOLIN-S2-MINI"
+#define USB_SERIAL 			"0"
+
+
+// Default USB FirmwareMSC Settings
+#define USB_FW_MSC_VENDOR_ID 		"ESP32-S2" 		//max 8 chars
+#define USB_FW_MSC_PRODUCT_ID 		"Firmware MSC"	//max 16 chars
+#define USB_FW_MSC_PRODUCT_REVISION	"1.23" 			//max 4 chars
+#define USB_FW_MSC_VOLUME_NAME 		"S2-Firmware" 	//max 11 chars
+#define USB_FW_MSC_SERIAL_NUMBER 	0x00000000
+
+#define EXTERNAL_NUM_INTERRUPTS 46
+#define NUM_DIGITAL_PINS        48
+#define NUM_ANALOG_INPUTS       20
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
+#define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 46)
+
+static const uint8_t LED_BUILTIN = 15;
+#define BUILTIN_LED  LED_BUILTIN // backward compatibility
+
+static const uint8_t TX = 39;
+static const uint8_t RX = 37;
+
+static const uint8_t SDA = 33;
+static const uint8_t SCL = 35;
+
+static const uint8_t SS    = 12;
+static const uint8_t MOSI  = 11;
+static const uint8_t MISO  = 9;
+static const uint8_t SCK   = 7;
+
+static const uint8_t A0 = 1;
+static const uint8_t A1 = 2;
+static const uint8_t A2 = 3;
+static const uint8_t A3 = 4;
+static const uint8_t A4 = 5;
+static const uint8_t A5 = 6;
+static const uint8_t A6 = 7;
+static const uint8_t A7 = 8;
+static const uint8_t A8 = 9;
+static const uint8_t A9 = 10;
+static const uint8_t A10 = 11;
+static const uint8_t A11 = 12;
+static const uint8_t A12 = 13;
+static const uint8_t A13 = 14;
+static const uint8_t A14 = 15;
+static const uint8_t A15 = 16;
+static const uint8_t A16 = 17;
+static const uint8_t A17 = 18;
+static const uint8_t A18 = 19;
+static const uint8_t A19 = 20;
+
+static const uint8_t T1 = 1;
+static const uint8_t T2 = 2;
+static const uint8_t T3 = 3;
+static const uint8_t T4 = 4;
+static const uint8_t T5 = 5;
+static const uint8_t T6 = 6;
+static const uint8_t T7 = 7;
+static const uint8_t T8 = 8;
+static const uint8_t T9 = 9;
+static const uint8_t T10 = 10;
+static const uint8_t T11 = 11;
+static const uint8_t T12 = 12;
+static const uint8_t T13 = 13;
+static const uint8_t T14 = 14;
+
+static const uint8_t DAC1 = 17;
+static const uint8_t DAC2 = 18;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/lolin_s2_pico/pins_arduino.h b/variants/lolin_s2_pico/pins_arduino.h
new file mode 100644
index 00000000000..10f0a9e7987
--- /dev/null
+++ b/variants/lolin_s2_pico/pins_arduino.h
@@ -0,0 +1,84 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+// Default USB Settings
+#define USB_VID 			0x303a
+#define USB_PID 			0x80C5
+#define USB_MANUFACTURER 	"WEMOS.CC"
+#define USB_PRODUCT 		"LOLIN-S2-PICO"
+#define USB_SERIAL 			"0"
+
+
+// Default USB FirmwareMSC Settings
+#define USB_FW_MSC_VENDOR_ID 		"ESP32-S2" 		//max 8 chars
+#define USB_FW_MSC_PRODUCT_ID 		"Firmware MSC"	//max 16 chars
+#define USB_FW_MSC_PRODUCT_REVISION	"1.23" 			//max 4 chars
+#define USB_FW_MSC_VOLUME_NAME 		"S2-Firmware" 	//max 11 chars
+#define USB_FW_MSC_SERIAL_NUMBER 	0x00000000
+
+#define EXTERNAL_NUM_INTERRUPTS 46
+#define NUM_DIGITAL_PINS        48
+#define NUM_ANALOG_INPUTS       20
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
+#define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 46)
+
+static const uint8_t LED_BUILTIN = 10;
+#define BUILTIN_LED  LED_BUILTIN // backward compatibility
+
+static const uint8_t TX = 38;
+static const uint8_t RX = 33;
+
+static const uint8_t SDA = 8;
+static const uint8_t SCL = 9;
+
+static const uint8_t SS    = 34;
+static const uint8_t MOSI  = 35;
+static const uint8_t MISO  = 37;
+static const uint8_t SCK   = 36;
+
+static const uint8_t A0 = 1;
+static const uint8_t A1 = 2;
+static const uint8_t A2 = 3;
+static const uint8_t A3 = 4;
+static const uint8_t A4 = 5;
+static const uint8_t A5 = 6;
+static const uint8_t A6 = 7;
+static const uint8_t A7 = 8;
+static const uint8_t A8 = 9;
+static const uint8_t A9 = 10;
+static const uint8_t A10 = 11;
+static const uint8_t A11 = 12;
+static const uint8_t A12 = 13;
+static const uint8_t A13 = 14;
+static const uint8_t A14 = 15;
+static const uint8_t A15 = 16;
+static const uint8_t A16 = 17;
+static const uint8_t A17 = 18;
+static const uint8_t A18 = 19;
+static const uint8_t A19 = 20;
+
+static const uint8_t T1 = 1;
+static const uint8_t T2 = 2;
+static const uint8_t T3 = 3;
+static const uint8_t T4 = 4;
+static const uint8_t T5 = 5;
+static const uint8_t T6 = 6;
+static const uint8_t T7 = 7;
+static const uint8_t T8 = 8;
+static const uint8_t T9 = 9;
+static const uint8_t T10 = 10;
+static const uint8_t T11 = 11;
+static const uint8_t T12 = 12;
+static const uint8_t T13 = 13;
+static const uint8_t T14 = 14;
+
+static const uint8_t DAC1 = 17;
+static const uint8_t DAC2 = 18;
+
+static const uint8_t S2_PICO_OLED_RESET = 18; 
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/lopy/pins_arduino.h b/variants/lopy/pins_arduino.h
index 40db576c9b9..235f209825a 100644
--- a/variants/lopy/pins_arduino.h
+++ b/variants/lopy/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       18
 
-#define analogInputToDigitalPin(p)  (((p)<40)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<40)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/lopy4/pins_arduino.h b/variants/lopy4/pins_arduino.h
index 3fb401a6e50..723d3fa8c3c 100644
--- a/variants/lopy4/pins_arduino.h
+++ b/variants/lopy4/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       18
 
-#define analogInputToDigitalPin(p)  (((p)<40)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<40)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/m5stack_atom/pins_arduino.h b/variants/m5stack_atom/pins_arduino.h
index b899534a071..a830f3edf89 100644
--- a/variants/m5stack_atom/pins_arduino.h
+++ b/variants/m5stack_atom/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/m5stack_core2/pins_arduino.h b/variants/m5stack_core2/pins_arduino.h
index 20ffc5144be..895c7c0de2a 100644
--- a/variants/m5stack_core2/pins_arduino.h
+++ b/variants/m5stack_core2/pins_arduino.h
@@ -4,10 +4,10 @@
 #include <stdint.h>
 
 #define EXTERNAL_NUM_INTERRUPTS 16
-#define NUM_DIGITAL_PINS        20
+#define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/m5stack_core_esp32/pins_arduino.h b/variants/m5stack_core_esp32/pins_arduino.h
index d2d87d4fa2d..8b86a0d6fdc 100644
--- a/variants/m5stack_core_esp32/pins_arduino.h
+++ b/variants/m5stack_core_esp32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        20
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/m5stack_coreink/pins_arduino.h b/variants/m5stack_coreink/pins_arduino.h
index 6ef1bf4792a..4ce9b122880 100644
--- a/variants/m5stack_coreink/pins_arduino.h
+++ b/variants/m5stack_coreink/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/m5stack_fire/pins_arduino.h b/variants/m5stack_fire/pins_arduino.h
index 5912a1c35c6..bef0491a2f0 100644
--- a/variants/m5stack_fire/pins_arduino.h
+++ b/variants/m5stack_fire/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        20
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/m5stack_timer_cam/pins_arduino.h b/variants/m5stack_timer_cam/pins_arduino.h
index ad714f7acf5..1f7f4b46aae 100644
--- a/variants/m5stack_timer_cam/pins_arduino.h
+++ b/variants/m5stack_timer_cam/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/m5stick_c/pins_arduino.h b/variants/m5stick_c/pins_arduino.h
index 048d9b5e50b..ef294e4845c 100644
--- a/variants/m5stick_c/pins_arduino.h
+++ b/variants/m5stick_c/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/magicbit/pins_arduino.h b/variants/magicbit/pins_arduino.h
index 3073ade6100..6bf769942a7 100644
--- a/variants/magicbit/pins_arduino.h
+++ b/variants/magicbit/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/metro_esp-32/pins_arduino.h b/variants/metro_esp-32/pins_arduino.h
index d2c737dc4ea..aedf2fb1f71 100644
--- a/variants/metro_esp-32/pins_arduino.h
+++ b/variants/metro_esp-32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/mgbot-iotik32a/pins_arduino.h b/variants/mgbot-iotik32a/pins_arduino.h
index 41345caeae4..283e01b2b9b 100644
--- a/variants/mgbot-iotik32a/pins_arduino.h
+++ b/variants/mgbot-iotik32a/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/mgbot-iotik32b/pins_arduino.h b/variants/mgbot-iotik32b/pins_arduino.h
index e34f62713fc..04dfe30c52f 100644
--- a/variants/mgbot-iotik32b/pins_arduino.h
+++ b/variants/mgbot-iotik32b/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/mhetesp32devkit/pins_arduino.h b/variants/mhetesp32devkit/pins_arduino.h
index ee2112b9fa6..badd89bf58c 100644
--- a/variants/mhetesp32devkit/pins_arduino.h
+++ b/variants/mhetesp32devkit/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/mhetesp32minikit/pins_arduino.h b/variants/mhetesp32minikit/pins_arduino.h
index ee2112b9fa6..badd89bf58c 100644
--- a/variants/mhetesp32minikit/pins_arduino.h
+++ b/variants/mhetesp32minikit/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/micro_s2/pins_arduino.h b/variants/micro_s2/pins_arduino.h
index d95e8f1ac30..389e51d9772 100644
--- a/variants/micro_s2/pins_arduino.h
+++ b/variants/micro_s2/pins_arduino.h
@@ -13,7 +13,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/mpython/pins_arduino.h b/variants/mpython/pins_arduino.h
index 5ecb2a555a3..301700d6355 100644
--- a/variants/mpython/pins_arduino.h
+++ b/variants/mpython/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/nano32/pins_arduino.h b/variants/nano32/pins_arduino.h
index 24f9ac51996..586f9725dc4 100644
--- a/variants/nano32/pins_arduino.h
+++ b/variants/nano32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        38
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/nina_w10/pins_arduino.h b/variants/nina_w10/pins_arduino.h
index f3ce937dd26..00bd44c05b9 100644
--- a/variants/nina_w10/pins_arduino.h
+++ b/variants/nina_w10/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/node32s/pins_arduino.h b/variants/node32s/pins_arduino.h
index df2223aa8ba..b37eaed659c 100644
--- a/variants/node32s/pins_arduino.h
+++ b/variants/node32s/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/nodemcu-32s/pins_arduino.h b/variants/nodemcu-32s/pins_arduino.h
index df2223aa8ba..b37eaed659c 100644
--- a/variants/nodemcu-32s/pins_arduino.h
+++ b/variants/nodemcu-32s/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/odroid_esp32/pins_arduino.h b/variants/odroid_esp32/pins_arduino.h
index 36af935e159..01a863ab236 100644
--- a/variants/odroid_esp32/pins_arduino.h
+++ b/variants/odroid_esp32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/onehorse32dev/pins_arduino.h b/variants/onehorse32dev/pins_arduino.h
index ab100c11435..e57615e3272 100644
--- a/variants/onehorse32dev/pins_arduino.h
+++ b/variants/onehorse32dev/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/openkb/pins_arduino.h b/variants/openkb/pins_arduino.h
index f187d251ee2..d16409617a3 100644
--- a/variants/openkb/pins_arduino.h
+++ b/variants/openkb/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        38
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/oroca_edubot/pins_arduino.h b/variants/oroca_edubot/pins_arduino.h
index 331ccdbd24a..1cfa1fb86fb 100644
--- a/variants/oroca_edubot/pins_arduino.h
+++ b/variants/oroca_edubot/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/pico32/pins_arduino.h b/variants/pico32/pins_arduino.h
index d50715e5c91..4ad96ccef51 100644
--- a/variants/pico32/pins_arduino.h
+++ b/variants/pico32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/piranha_esp-32/pins_arduino.h b/variants/piranha_esp-32/pins_arduino.h
index 3e74d0ad69e..4de761d9aa5 100644
--- a/variants/piranha_esp-32/pins_arduino.h
+++ b/variants/piranha_esp-32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/pocket_32/pins_arduino.h b/variants/pocket_32/pins_arduino.h
index a36a6bb91d7..af926f45982 100644
--- a/variants/pocket_32/pins_arduino.h
+++ b/variants/pocket_32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/quantum/pins_arduino.h b/variants/quantum/pins_arduino.h
index d50715e5c91..4ad96ccef51 100644
--- a/variants/quantum/pins_arduino.h
+++ b/variants/quantum/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/sonoff_dualr3/pins_arduino.h b/variants/sonoff_dualr3/pins_arduino.h
index eec170ae21e..1b3fae2d8bb 100644
--- a/variants/sonoff_dualr3/pins_arduino.h
+++ b/variants/sonoff_dualr3/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/sparkfun_lora_gateway_1-channel/pins_arduino.h b/variants/sparkfun_lora_gateway_1-channel/pins_arduino.h
index 0d45940f576..5d0b845764d 100755
--- a/variants/sparkfun_lora_gateway_1-channel/pins_arduino.h
+++ b/variants/sparkfun_lora_gateway_1-channel/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/tbeam/pins_arduino.h b/variants/tbeam/pins_arduino.h
index ba4f9adea8b..fdec62d96d3 100644
--- a/variants/tbeam/pins_arduino.h
+++ b/variants/tbeam/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        20
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/ttgo-lora32-v1/pins_arduino.h b/variants/ttgo-lora32-v1/pins_arduino.h
index c365f240b40..0faf524e233 100644
--- a/variants/ttgo-lora32-v1/pins_arduino.h
+++ b/variants/ttgo-lora32-v1/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
@@ -26,7 +26,7 @@
 
 static const uint8_t LED_BUILTIN = 2;
 #define BUILTIN_LED  LED_BUILTIN // backward compatibility
-#define LED_BUILTIN LED_BUILTIN
+#define LED_BUILTIN LED_BUILTIN
 
 static const uint8_t KEY_BUILTIN = 0;
 
diff --git a/variants/ttgo-lora32-v2/pins_arduino.h b/variants/ttgo-lora32-v2/pins_arduino.h
index 416034e7efa..5cf49fdd4b7 100644
--- a/variants/ttgo-lora32-v2/pins_arduino.h
+++ b/variants/ttgo-lora32-v2/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/ttgo-lora32-v21new/pins_arduino.h b/variants/ttgo-lora32-v21new/pins_arduino.h
index c8870a7cd06..cb4f917b8fc 100644
--- a/variants/ttgo-lora32-v21new/pins_arduino.h
+++ b/variants/ttgo-lora32-v21new/pins_arduino.h
@@ -13,7 +13,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/ttgo-t-oi-plus/pins_arduino.h b/variants/ttgo-t-oi-plus/pins_arduino.h
index f65bba74e5e..689f16c9a4f 100644
--- a/variants/ttgo-t-oi-plus/pins_arduino.h
+++ b/variants/ttgo-t-oi-plus/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        12
 #define NUM_ANALOG_INPUTS       3
 
-#define analogInputToDigitalPin(p)  (((p)<NUM_ANALOG_INPUTS)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<NUM_ANALOG_INPUTS)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<NUM_DIGITAL_PINS)?(p):-1)
 #define digitalPinHasPWM(p)         (p < EXTERNAL_NUM_INTERRUPTS)
 
diff --git a/variants/ttgo-t1/pins_arduino.h b/variants/ttgo-t1/pins_arduino.h
index fa20c5f9698..8adc5eaf57f 100644
--- a/variants/ttgo-t1/pins_arduino.h
+++ b/variants/ttgo-t1/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/ttgo-t7-v13-mini32/pins_arduino.h b/variants/ttgo-t7-v13-mini32/pins_arduino.h
index d6bfef14dd9..75057d726d5 100755
--- a/variants/ttgo-t7-v13-mini32/pins_arduino.h
+++ b/variants/ttgo-t7-v13-mini32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/ttgo-t7-v14-mini32/pins_arduino.h b/variants/ttgo-t7-v14-mini32/pins_arduino.h
index ca038af542f..b0ca79e64e4 100755
--- a/variants/ttgo-t7-v14-mini32/pins_arduino.h
+++ b/variants/ttgo-t7-v14-mini32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/turta_iot_node/pins_arduino.h b/variants/turta_iot_node/pins_arduino.h
index 4e1ae60fe05..f156ee2fb70 100644
--- a/variants/turta_iot_node/pins_arduino.h
+++ b/variants/turta_iot_node/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        21
 #define NUM_ANALOG_INPUTS       9
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/twatch/pins_arduino.h b/variants/twatch/pins_arduino.h
index 0bcb6737faf..b46288c7e76 100644
--- a/variants/twatch/pins_arduino.h
+++ b/variants/twatch/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        20
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/uPesy_esp32_wroom_devkit/pins_arduino.h b/variants/uPesy_esp32_wroom_devkit/pins_arduino.h
index 44aff01baf9..69e4138428f 100644
--- a/variants/uPesy_esp32_wroom_devkit/pins_arduino.h
+++ b/variants/uPesy_esp32_wroom_devkit/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/uPesy_esp32_wrover_devkit/pins_arduino.h b/variants/uPesy_esp32_wrover_devkit/pins_arduino.h
index 44aff01baf9..69e4138428f 100644
--- a/variants/uPesy_esp32_wrover_devkit/pins_arduino.h
+++ b/variants/uPesy_esp32_wrover_devkit/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/um_feathers2/pins_arduino.h b/variants/um_feathers2/pins_arduino.h
index 93998f5aa9c..26ff851d66f 100644
--- a/variants/um_feathers2/pins_arduino.h
+++ b/variants/um_feathers2/pins_arduino.h
@@ -13,7 +13,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/um_feathers2neo/pins_arduino.h b/variants/um_feathers2neo/pins_arduino.h
index 993aac1aa88..44609d463ab 100644
--- a/variants/um_feathers2neo/pins_arduino.h
+++ b/variants/um_feathers2neo/pins_arduino.h
@@ -13,7 +13,7 @@
 #define NUM_DIGITAL_PINS        22
 #define NUM_ANALOG_INPUTS       11
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
diff --git a/variants/um_feathers3/bootloader_tinyuf2.bin b/variants/um_feathers3/bootloader_tinyuf2.bin
new file mode 100644
index 00000000000..5a2cde3f57a
Binary files /dev/null and b/variants/um_feathers3/bootloader_tinyuf2.bin differ
diff --git a/variants/um_feathers3/partitions_tinyuf2.csv b/variants/um_feathers3/partitions_tinyuf2.csv
new file mode 100644
index 00000000000..003418ceac2
--- /dev/null
+++ b/variants/um_feathers3/partitions_tinyuf2.csv
@@ -0,0 +1,10 @@
+# ESP-IDF Partition Table
+# Name,   Type, SubType, Offset,  Size, Flags
+# bootloader.bin,,          0x1000, 32K
+# partition table,,         0x8000, 4K
+nvs,      data, nvs,      0x9000,  20K,
+otadata,  data, ota,      0xe000,  8K,
+ota_0,    0,    ota_0,   0x10000,  2048K,
+ota_1,    0,    ota_1,  0x210000,  2048K,
+uf2,      app,  factory,0x410000,  256K,
+ffat,     data, fat,    0x450000,  11968K,
diff --git a/variants/um_feathers3/pins_arduino.h b/variants/um_feathers3/pins_arduino.h
new file mode 100644
index 00000000000..b0c8d473c5b
--- /dev/null
+++ b/variants/um_feathers3/pins_arduino.h
@@ -0,0 +1,68 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define USB_VID 0x303A
+#define USB_PID 0x80D6
+#define USB_MANUFACTURER "Unexpected Maker"
+#define USB_PRODUCT "FeatherS3"
+#define USB_SERIAL ""
+
+#define EXTERNAL_NUM_INTERRUPTS 46
+#define NUM_DIGITAL_PINS        21
+#define NUM_ANALOG_INPUTS       13
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 46)
+
+static const uint8_t TX = 43;
+static const uint8_t RX = 44;
+
+static const uint8_t SDA = 8;
+static const uint8_t SCL = 9;
+
+static const uint8_t SS    = 5;
+static const uint8_t MOSI  = 35;
+static const uint8_t MISO  = 37;
+static const uint8_t SDO  = 35;
+static const uint8_t SDI  = 37;
+static const uint8_t SCK   = 36;
+
+static const uint8_t A0 = 1;
+static const uint8_t A1 = 2;
+static const uint8_t A2 = 3;
+static const uint8_t A3 = 4;
+static const uint8_t A4 = 5;
+static const uint8_t A5 = 6;
+static const uint8_t A6 = 7;
+static const uint8_t A7 = 8;
+static const uint8_t A8 = 9;
+static const uint8_t A9 = 10;
+static const uint8_t A10 = 11;
+static const uint8_t A11 = 12;
+static const uint8_t A12 = 13;
+
+static const uint8_t T1 = 1;
+static const uint8_t T3 = 3;
+static const uint8_t T5 = 5;
+static const uint8_t T6 = 6;
+static const uint8_t T7 = 7;
+static const uint8_t T8 = 8;
+static const uint8_t T9 = 9;
+static const uint8_t T10 = 10;
+static const uint8_t T11 = 11;
+static const uint8_t T12 = 12;
+static const uint8_t T14 = 14;
+
+static const uint8_t VBAT_SENSE = 2;
+static const uint8_t VBUS_SENSE = 34;
+
+static const uint8_t RGB_DATA = 40;
+static const uint8_t RGB_PWR = 39;
+static const uint8_t LDO2 = 39;
+static const uint8_t LED_BUILTIN = 13;
+static const uint8_t LED = 13;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/um_feathers3/tinyuf2.bin b/variants/um_feathers3/tinyuf2.bin
new file mode 100644
index 00000000000..178044761cd
Binary files /dev/null and b/variants/um_feathers3/tinyuf2.bin differ
diff --git a/variants/um_pros3/bootloader_tinyuf2.bin b/variants/um_pros3/bootloader_tinyuf2.bin
new file mode 100644
index 00000000000..e92ef2b566a
Binary files /dev/null and b/variants/um_pros3/bootloader_tinyuf2.bin differ
diff --git a/variants/um_pros3/partitions_tinyuf2.csv b/variants/um_pros3/partitions_tinyuf2.csv
new file mode 100644
index 00000000000..003418ceac2
--- /dev/null
+++ b/variants/um_pros3/partitions_tinyuf2.csv
@@ -0,0 +1,10 @@
+# ESP-IDF Partition Table
+# Name,   Type, SubType, Offset,  Size, Flags
+# bootloader.bin,,          0x1000, 32K
+# partition table,,         0x8000, 4K
+nvs,      data, nvs,      0x9000,  20K,
+otadata,  data, ota,      0xe000,  8K,
+ota_0,    0,    ota_0,   0x10000,  2048K,
+ota_1,    0,    ota_1,  0x210000,  2048K,
+uf2,      app,  factory,0x410000,  256K,
+ffat,     data, fat,    0x450000,  11968K,
diff --git a/variants/um_pros3/pins_arduino.h b/variants/um_pros3/pins_arduino.h
new file mode 100644
index 00000000000..dc8b76768b5
--- /dev/null
+++ b/variants/um_pros3/pins_arduino.h
@@ -0,0 +1,68 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define USB_VID 0x303A
+#define USB_PID 0x80D3
+#define USB_MANUFACTURER "Unexpected Maker"
+#define USB_PRODUCT "ProS3"
+#define USB_SERIAL ""
+
+#define EXTERNAL_NUM_INTERRUPTS 46
+#define NUM_DIGITAL_PINS        27
+#define NUM_ANALOG_INPUTS       14
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 46)
+
+static const uint8_t TX = 43;
+static const uint8_t RX = 44;
+
+static const uint8_t SDA = 8;
+static const uint8_t SCL = 9;
+
+static const uint8_t SS    = 34;
+static const uint8_t MOSI  = 35;
+static const uint8_t MISO  = 37;
+static const uint8_t SDO  = 35;
+static const uint8_t SDI  = 37;
+static const uint8_t SCK   = 36;
+
+static const uint8_t A0 = 1;
+static const uint8_t A1 = 2;
+static const uint8_t A2 = 3;
+static const uint8_t A3 = 4;
+static const uint8_t A4 = 5;
+static const uint8_t A5 = 6;
+static const uint8_t A6 = 7;
+static const uint8_t A7 = 8;
+static const uint8_t A8 = 9;
+static const uint8_t A11 = 12;
+static const uint8_t A12 = 13;
+static const uint8_t A13 = 14;
+static const uint8_t A14 = 15;
+static const uint8_t A15 = 16;
+
+static const uint8_t T1 = 1;
+static const uint8_t T2 = 2;
+static const uint8_t T3 = 3;
+static const uint8_t T4 = 4;
+static const uint8_t T5 = 5;
+static const uint8_t T6 = 6;
+static const uint8_t T7 = 7;
+static const uint8_t T8 = 8;
+static const uint8_t T9 = 9;
+static const uint8_t T12 = 12;
+static const uint8_t T13 = 13;
+static const uint8_t T14 = 14;
+
+static const uint8_t VBAT_SENSE = 10;
+static const uint8_t VBUS_SENSE = 33;
+
+static const uint8_t RGB_DATA = 18;
+static const uint8_t RGB_PWR = 17;
+static const uint8_t LDO2 = 17;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/um_pros3/tinyuf2.bin b/variants/um_pros3/tinyuf2.bin
new file mode 100644
index 00000000000..1e8ee8ca70f
Binary files /dev/null and b/variants/um_pros3/tinyuf2.bin differ
diff --git a/variants/um_rmp/pins_arduino.h b/variants/um_rmp/pins_arduino.h
new file mode 100644
index 00000000000..282251196d9
--- /dev/null
+++ b/variants/um_rmp/pins_arduino.h
@@ -0,0 +1,78 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define USB_VID 0x303A
+#define USB_PID 0x8001
+#define USB_MANUFACTURER "Unexpected Maker"
+#define USB_PRODUCT "RM Pro"
+#define USB_SERIAL ""
+
+#define EXTERNAL_NUM_INTERRUPTS 46
+#define NUM_DIGITAL_PINS        48
+#define NUM_ANALOG_INPUTS       20
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 46)
+
+static const uint8_t TX = 43;
+static const uint8_t RX = 44;
+
+static const uint8_t SDA = 8;
+static const uint8_t SCL = 9;
+
+static const uint8_t SS    = 14;
+static const uint8_t MOSI  = 35;
+static const uint8_t MISO  = 37;
+static const uint8_t SDO  = 35;
+static const uint8_t SDI  = 37;
+static const uint8_t SCK   = 36;
+
+static const uint8_t A0 = 1;
+static const uint8_t A1 = 2;
+static const uint8_t A2 = 3;
+static const uint8_t A3 = 4;
+static const uint8_t A4 = 5;
+static const uint8_t A5 = 6;
+static const uint8_t A6 = 7;
+static const uint8_t A7 = 8;
+static const uint8_t A8 = 9;
+static const uint8_t A9 = 10;
+static const uint8_t A10 = 11;
+static const uint8_t A11 = 12;
+static const uint8_t A12 = 13;
+static const uint8_t A13 = 14;
+static const uint8_t A14 = 15;
+static const uint8_t A15 = 16;
+static const uint8_t A16 = 17;
+static const uint8_t A17 = 18;
+static const uint8_t A18 = 19;
+static const uint8_t A19 = 20;
+
+static const uint8_t T1 = 1;
+static const uint8_t T2 = 2;
+static const uint8_t T3 = 3;
+static const uint8_t T4 = 4;
+static const uint8_t T5 = 5;
+static const uint8_t T6 = 6;
+static const uint8_t T7 = 7;
+static const uint8_t T8 = 8;
+static const uint8_t T9 = 9;
+static const uint8_t T10 = 10;
+static const uint8_t T11 = 11;
+static const uint8_t T12 = 12;
+static const uint8_t T13 = 13;
+static const uint8_t T14 = 14;
+
+static const uint8_t DAC1 = 17;
+static const uint8_t DAC2 = 18;
+
+static const uint8_t VBAT_SENSE = 3;
+static const uint8_t VBUS_SENSE = 21;
+
+static const uint8_t RGB_DATA = 1;
+static const uint8_t RGB_PWR = 2;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/um_tinypico/pins_arduino.h b/variants/um_tinypico/pins_arduino.h
index 01287cb6c60..134a5ce88d4 100644
--- a/variants/um_tinypico/pins_arduino.h
+++ b/variants/um_tinypico/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/um_tinys2/pins_arduino.h b/variants/um_tinys2/pins_arduino.h
index c79f3940295..a493a3fd78b 100644
--- a/variants/um_tinys2/pins_arduino.h
+++ b/variants/um_tinys2/pins_arduino.h
@@ -13,7 +13,7 @@
 #define NUM_DIGITAL_PINS        48
 #define NUM_ANALOG_INPUTS       20
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 46)
 
@@ -25,10 +25,10 @@ static const uint8_t SCL = 9;
 
 static const uint8_t SS    = 14;
 static const uint8_t MOSI  = 35;
-static const uint8_t MISO  = 36;
+static const uint8_t MISO  = 37;
 static const uint8_t SDO  = 35;
-static const uint8_t SDI  = 36;
-static const uint8_t SCK   = 37;
+static const uint8_t SDI  = 37;
+static const uint8_t SCK   = 36;
 
 static const uint8_t A0 = 1;
 static const uint8_t A1 = 2;
diff --git a/variants/um_tinys3/bootloader_tinyuf2.bin b/variants/um_tinys3/bootloader_tinyuf2.bin
new file mode 100644
index 00000000000..e89596f423d
Binary files /dev/null and b/variants/um_tinys3/bootloader_tinyuf2.bin differ
diff --git a/variants/um_tinys3/partitions_tinyuf2.csv b/variants/um_tinys3/partitions_tinyuf2.csv
new file mode 100644
index 00000000000..4026378b6fb
--- /dev/null
+++ b/variants/um_tinys3/partitions_tinyuf2.csv
@@ -0,0 +1,10 @@
+# ESP-IDF Partition Table
+# Name,   Type, SubType, Offset,  Size, Flags
+# bootloader.bin,,          0x1000, 32K
+# partition table,,         0x8000, 4K
+nvs,      data, nvs,      0x9000,  20K,
+otadata,  data, ota,      0xe000,  8K,
+ota_0,    0,    ota_0,   0x10000,  2048K,
+ota_1,    0,    ota_1,  0x210000,  2048K,
+uf2,      app,  factory,0x410000,  256K,
+ffat,     data, fat,    0x450000,  3776K,
diff --git a/variants/um_tinys3/pins_arduino.h b/variants/um_tinys3/pins_arduino.h
new file mode 100644
index 00000000000..780482cf5a0
--- /dev/null
+++ b/variants/um_tinys3/pins_arduino.h
@@ -0,0 +1,59 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define USB_VID 0x303A
+#define USB_PID 0x80D0
+#define USB_MANUFACTURER "Unexpected Maker"
+#define USB_PRODUCT "TinyS3"
+#define USB_SERIAL ""
+
+#define EXTERNAL_NUM_INTERRUPTS 46
+#define NUM_DIGITAL_PINS        17
+#define NUM_ANALOG_INPUTS       9
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define digitalPinToInterrupt(p)    (((p)<48)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 46)
+
+static const uint8_t TX = 43;
+static const uint8_t RX = 44;
+
+static const uint8_t SDA = 8;
+static const uint8_t SCL = 9;
+
+static const uint8_t SS    = 34;
+static const uint8_t MOSI  = 35;
+static const uint8_t MISO  = 37;
+static const uint8_t SDO  = 35;
+static const uint8_t SDI  = 37;
+static const uint8_t SCK   = 36;
+
+static const uint8_t A0 = 1;
+static const uint8_t A1 = 2;
+static const uint8_t A2 = 3;
+static const uint8_t A3 = 4;
+static const uint8_t A4 = 5;
+static const uint8_t A5 = 6;
+static const uint8_t A6 = 7;
+static const uint8_t A7 = 8;
+static const uint8_t A8 = 9;
+
+static const uint8_t T1 = 1;
+static const uint8_t T2 = 2;
+static const uint8_t T3 = 3;
+static const uint8_t T4 = 4;
+static const uint8_t T5 = 5;
+static const uint8_t T6 = 6;
+static const uint8_t T7 = 7;
+static const uint8_t T8 = 8;
+static const uint8_t T9 = 9;
+
+static const uint8_t VBAT_SENSE = 10;
+static const uint8_t VBUS_SENSE = 33;
+
+static const uint8_t RGB_DATA = 18;
+static const uint8_t RGB_PWR = 17;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/um_tinys3/tinyuf2.bin b/variants/um_tinys3/tinyuf2.bin
new file mode 100644
index 00000000000..b2723dcf3b9
Binary files /dev/null and b/variants/um_tinys3/tinyuf2.bin differ
diff --git a/variants/vintlabsdevkitv1/pins_arduino.h b/variants/vintlabsdevkitv1/pins_arduino.h
index feddfd95c71..6f0df757180 100644
--- a/variants/vintlabsdevkitv1/pins_arduino.h
+++ b/variants/vintlabsdevkitv1/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/watchy/pins_arduino.h b/variants/watchy/pins_arduino.h
new file mode 100644
index 00000000000..2c93c173429
--- /dev/null
+++ b/variants/watchy/pins_arduino.h
@@ -0,0 +1,60 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+
+#define EXTERNAL_NUM_INTERRUPTS 16
+#define NUM_DIGITAL_PINS        40
+#define NUM_ANALOG_INPUTS       16
+
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
+#define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
+#define digitalPinHasPWM(p)         (p < 34)
+
+static const uint8_t TX = 1;
+static const uint8_t RX = 3;
+
+static const uint8_t SDA = 21;
+static const uint8_t SCL = 22;
+
+static const uint8_t SS    = 5;
+static const uint8_t MOSI  = 23;
+static const uint8_t MISO  = 19;
+static const uint8_t SCK   = 18;
+
+static const uint8_t MENU_BTN_PIN  = 26;
+static const uint8_t BACK_BTN_PIN  = 25;
+static const uint8_t DOWN_BTN_PIN  = 4;
+static const uint8_t DISPLAY_CS    = 5;
+static const uint8_t DISPLAY_RES   = 9;
+static const uint8_t DISPLAY_DC    = 10;
+static const uint8_t DISPLAY_BUSY  = 19;
+static const uint8_t ACC_INT_1_PIN = 14;
+static const uint8_t ACC_INT_2_PIN = 12;
+static const uint8_t VIB_MOTOR_PIN = 13;
+static const uint8_t RTC_INT_PIN   = 27;
+
+#if	defined (ARDUINO_WATCHY_V10)
+    static const uint8_t UP_BTN_PIN   = 32;
+    static const uint8_t BATT_ADC_PIN = 33;
+    #define UP_BTN_MASK  GPIO_SEL_32
+    #define RTC_TYPE 1 //DS3231
+#elif defined (ARDUINO_WATCHY_V15)
+    static const uint8_t UP_BTN_PIN   = 32;
+    static const uint8_t BATT_ADC_PIN = 35;
+    #define UP_BTN_MASK  GPIO_SEL_32
+    #define RTC_TYPE 2 //PCF8563
+#elif defined (ARDUINO_WATCHY_V20)
+    static const uint8_t UP_BTN_PIN   = 35;
+    static const uint8_t BATT_ADC_PIN = 34;
+    #define UP_BTN_MASK  GPIO_SEL_35
+    #define RTC_TYPE 2 //PCF8563
+#endif
+
+#define MENU_BTN_MASK GPIO_SEL_26
+#define BACK_BTN_MASK GPIO_SEL_25
+#define DOWN_BTN_MASK GPIO_SEL_4
+#define ACC_INT_MASK  GPIO_SEL_14
+#define BTN_PIN_MASK  MENU_BTN_MASK|BACK_BTN_MASK|UP_BTN_MASK|DOWN_BTN_MASK
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/wesp32/pins_arduino.h b/variants/wesp32/pins_arduino.h
index c3790504155..7dbfa439e06 100644
--- a/variants/wesp32/pins_arduino.h
+++ b/variants/wesp32/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/widora-air/pins_arduino.h b/variants/widora-air/pins_arduino.h
index 52ecdd554e8..4cb0fa4da0d 100644
--- a/variants/widora-air/pins_arduino.h
+++ b/variants/widora-air/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        7
 #define NUM_ANALOG_INPUTS       10
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/wifiduino32/pins_arduino.h b/variants/wifiduino32/pins_arduino.h
index 63c04ff9eee..841721d6d8d 100644
--- a/variants/wifiduino32/pins_arduino.h
+++ b/variants/wifiduino32/pins_arduino.h
@@ -7,13 +7,13 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
 static const uint8_t LED_BUILTIN = 2;
 #define BUILTIN_LED  LED_BUILTIN // backward compatibility
-#define LED_BUILTIN LED_BUILTIN
+#define LED_BUILTIN LED_BUILTIN
 
 static const uint8_t KEY_BUILTIN = 0;
 
diff --git a/variants/wipy3/pins_arduino.h b/variants/wipy3/pins_arduino.h
index c8d9888eb9f..87792e471b4 100644
--- a/variants/wipy3/pins_arduino.h
+++ b/variants/wipy3/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       18
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)
 
diff --git a/variants/wt32-eth01/pins_arduino.h b/variants/wt32-eth01/pins_arduino.h
index 7ea22ab69c3..432705fa441 100644
--- a/variants/wt32-eth01/pins_arduino.h
+++ b/variants/wt32-eth01/pins_arduino.h
@@ -13,7 +13,7 @@
 #define NUM_DIGITAL_PINS 40
 #define NUM_ANALOG_INPUTS 16
 
-#define analogInputToDigitalPin(p) (((p) < 20) ? (esp32_adc2gpio[(p)]) : -1)
+#define analogInputToDigitalPin(p) (((p) < 20) ? (analogChannelToDigitalPin(p)) : -1)
 #define digitalPinToInterrupt(p) (((p) < 40) ? (p) : -1)
 #define digitalPinHasPWM(p) (p < 34)
 
diff --git a/variants/xinabox/pins_arduino.h b/variants/xinabox/pins_arduino.h
index 3a1763f23ad..52b3e4f12d8 100644
--- a/variants/xinabox/pins_arduino.h
+++ b/variants/xinabox/pins_arduino.h
@@ -7,7 +7,7 @@
 #define NUM_DIGITAL_PINS        40
 #define NUM_ANALOG_INPUTS       16
 
-#define analogInputToDigitalPin(p)  (((p)<20)?(esp32_adc2gpio[(p)]):-1)
+#define analogInputToDigitalPin(p)  (((p)<20)?(analogChannelToDigitalPin(p)):-1)
 #define digitalPinToInterrupt(p)    (((p)<40)?(p):-1)
 #define digitalPinHasPWM(p)         (p < 34)